diff --git a/32g431.ioc b/32g431.ioc
index 7b83866..9a8eae9 100644
--- a/32g431.ioc
+++ b/32g431.ioc
@@ -84,6 +84,7 @@ MxDb.Version=DB.6.0.170
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.FDCAN1_IT0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.LPUART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
diff --git a/Core/Inc/stm32g4xx_it.h b/Core/Inc/stm32g4xx_it.h
index ed17a7e..ca6cf3b 100644
--- a/Core/Inc/stm32g4xx_it.h
+++ b/Core/Inc/stm32g4xx_it.h
@@ -56,6 +56,7 @@ void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
 void DMA1_Channel1_IRQHandler(void);
+void FDCAN1_IT0_IRQHandler(void);
 void USART1_IRQHandler(void);
 void TIM6_DAC_IRQHandler(void);
 void LPUART1_IRQHandler(void);
diff --git a/Core/Src/fdcan.c b/Core/Src/fdcan.c
index bbd543f..bbdc624 100644
--- a/Core/Src/fdcan.c
+++ b/Core/Src/fdcan.c
@@ -100,6 +100,9 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle)
     GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN1;
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
+    /* FDCAN1 interrupt Init */
+    HAL_NVIC_SetPriority(FDCAN1_IT0_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn);
   /* USER CODE BEGIN FDCAN1_MspInit 1 */
 
   /* USER CODE END FDCAN1_MspInit 1 */
@@ -123,6 +126,8 @@ void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* fdcanHandle)
     */
     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12);
 
+    /* FDCAN1 interrupt Deinit */
+    HAL_NVIC_DisableIRQ(FDCAN1_IT0_IRQn);
   /* USER CODE BEGIN FDCAN1_MspDeInit 1 */
 
   /* USER CODE END FDCAN1_MspDeInit 1 */
diff --git a/Core/Src/main.c b/Core/Src/main.c
index 39bcd4e..1bf1f5f 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -93,7 +93,7 @@ int main(void)
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
   MX_DMA_Init();
-  //MX_IWDG_Init();
+  MX_IWDG_Init();
   MX_USART1_UART_Init();
   MX_TIM6_Init();
   MX_FDCAN1_Init();
diff --git a/Core/Src/stm32g4xx_it.c b/Core/Src/stm32g4xx_it.c
index 6224442..df84a78 100644
--- a/Core/Src/stm32g4xx_it.c
+++ b/Core/Src/stm32g4xx_it.c
@@ -55,6 +55,7 @@
 /* USER CODE END 0 */
 
 /* External variables --------------------------------------------------------*/
+extern FDCAN_HandleTypeDef hfdcan1;
 extern DMA_HandleTypeDef hdma_usart1_tx;
 extern UART_HandleTypeDef hlpuart1;
 extern UART_HandleTypeDef huart1;
@@ -215,6 +216,20 @@ void DMA1_Channel1_IRQHandler(void)
   /* USER CODE END DMA1_Channel1_IRQn 1 */
 }
 
+/**
+  * @brief This function handles FDCAN1 interrupt 0.
+  */
+void FDCAN1_IT0_IRQHandler(void)
+{
+  /* USER CODE BEGIN FDCAN1_IT0_IRQn 0 */
+
+  /* USER CODE END FDCAN1_IT0_IRQn 0 */
+  HAL_FDCAN_IRQHandler(&hfdcan1);
+  /* USER CODE BEGIN FDCAN1_IT0_IRQn 1 */
+
+  /* USER CODE END FDCAN1_IT0_IRQn 1 */
+}
+
 /**
   * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
   */
diff --git a/robot b/robot
index cb9e296..04ae58a 160000
--- a/robot
+++ b/robot
@@ -1 +1 @@
-Subproject commit cb9e2962ff29da185602fa9baaaaae02bffc17d9
+Subproject commit 04ae58a2aae3cf19c263f25ea298fa6e81208078