From 9fd5590d43faebe6f35ac1040333f3a40ac06ce0 Mon Sep 17 00:00:00 2001 From: Lizongdi <1210855344@qq.com> Date: Tue, 30 Jun 2026 16:11:40 +0800 Subject: [PATCH] =?UTF-8?q?=E8=A7=A3=E5=86=B3=E4=B8=B2=E5=8F=A3DMA?= =?UTF-8?q?=E5=8F=91=E9=80=81=E9=97=AE=E9=A2=98=EF=BC=8C=E5=B9=B6=E5=A2=9E?= =?UTF-8?q?=E5=8A=A0=E6=A0=B9=E6=8D=AE=E4=B8=80=E4=B8=AAUSE=5FPRINT?= =?UTF-8?q?=E9=80=89=E9=A1=B9=E6=8E=A7=E5=88=B6=E7=BB=88=E7=AB=AF=E6=98=AF?= =?UTF-8?q?=E4=B8=B2=E5=8F=A3=E8=BF=98=E6=98=AF=E7=BD=91=E5=8F=A3?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- CMakePresets.json | 2 ++ Core/Src/freertos.c | 2 ++ Core/Src/main.c | 15 +++++++++++++++ Core/Src/usart.c | 8 ++++---- STM32H743XG_FLASH.ld | 7 +++++++ robot | 2 +- robot_h743.ioc | 17 ++++++++++++----- 7 files changed, 43 insertions(+), 10 deletions(-) diff --git a/CMakePresets.json b/CMakePresets.json index 1ffe9a2..2353309 100644 --- a/CMakePresets.json +++ b/CMakePresets.json @@ -42,6 +42,8 @@ "USE_LUA_ST": true, "USE_TALNET": true, "USE_LWIP": true, + //"USE_PRINT": true, + "PRINT_ID": "3", "USE_FREERTOS": true } } diff --git a/Core/Src/freertos.c b/Core/Src/freertos.c index 536ec42..4a11843 100644 --- a/Core/Src/freertos.c +++ b/Core/Src/freertos.c @@ -112,6 +112,8 @@ void MX_FREERTOS_Init(void) { /* USER CODE BEGIN RTOS_THREADS */ /* add threads, ... */ + void GF_Init(void); + GF_Init(); void MyTask_Init(void); MyTask_Init(); /* USER CODE END RTOS_THREADS */ diff --git a/Core/Src/main.c b/Core/Src/main.c index 6076bd4..1d94dbe 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -131,6 +131,10 @@ int main(void) /* USER CODE BEGIN 2 */ #ifdef MEM_POOL_TOTAL_SIZE RD_INIT(); +#ifdef USE_PRINT + void Myprint_Init(void); + Myprint_Init(); +#endif #endif /* USER CODE END 2 */ @@ -266,6 +270,17 @@ void MPU_Config(void) MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE; MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; + HAL_MPU_ConfigRegion(&MPU_InitStruct); + + /** Initializes and configures the Region and the memory to be protected + */ + MPU_InitStruct.Number = MPU_REGION_NUMBER3; + MPU_InitStruct.BaseAddress = 0x24000000 ; + MPU_InitStruct.Size = MPU_REGION_SIZE_512KB; + MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; + MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE; + MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; + HAL_MPU_ConfigRegion(&MPU_InitStruct); /* Enables the MPU */ HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); diff --git a/Core/Src/usart.c b/Core/Src/usart.c index 99feb91..9e064f0 100644 --- a/Core/Src/usart.c +++ b/Core/Src/usart.c @@ -324,10 +324,10 @@ void MX_USART3_UART_Init(void) /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; - huart3.Init.BaudRate = 921600; - huart3.Init.WordLength = UART_WORDLENGTH_9B; + huart3.Init.BaudRate = 115200; + huart3.Init.WordLength = UART_WORDLENGTH_8B; huart3.Init.StopBits = UART_STOPBITS_1; - huart3.Init.Parity = UART_PARITY_EVEN; + huart3.Init.Parity = UART_PARITY_NONE; huart3.Init.Mode = UART_MODE_TX_RX; huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; huart3.Init.OverSampling = UART_OVERSAMPLING_16; @@ -348,7 +348,7 @@ void MX_USART3_UART_Init(void) { Error_Handler(); } - if (HAL_UARTEx_EnableFifoMode(&huart3) != HAL_OK) + if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK) { Error_Handler(); } diff --git a/STM32H743XG_FLASH.ld b/STM32H743XG_FLASH.ld index 107ab5e..228a3af 100644 --- a/STM32H743XG_FLASH.ld +++ b/STM32H743XG_FLASH.ld @@ -253,6 +253,13 @@ SECTIONS *(.Rx_PoolSection) } >RAM_D2 + .dma_buffer (NOLOAD) : + { + . = ALIGN(32); + *(.dma_buffer) + . = ALIGN(32); + } > RAM + /* Remove information from the standard libraries */ /DISCARD/ : { diff --git a/robot b/robot index 778a14c..6f6cd98 160000 --- a/robot +++ b/robot @@ -1 +1 @@ -Subproject commit 778a14c63b91f62ea8b058caf330792cfc4050cc +Subproject commit 6f6cd98dfe6360e6457de0b96493c9226625948d diff --git a/robot_h743.ioc b/robot_h743.ioc index 93be304..0237d54 100644 --- a/robot_h743.ioc +++ b/robot_h743.ioc @@ -14,18 +14,24 @@ CAD.provider= CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_NO_ACCESS CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_REGION_FULL_ACCESS CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_FULL_ACCESS +CORTEX_M7.AccessPermission-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_REGION_FULL_ACCESS CORTEX_M7.BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings=0 CORTEX_M7.BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings=0x30000000 CORTEX_M7.BaseAddress-Cortex_Memory_Protection_Unit_Region2_Settings=0x30004000 +CORTEX_M7.BaseAddress-Cortex_Memory_Protection_Unit_Region3_Settings=0x24000000 CORTEX_M7.CPU_DCache=Enabled CORTEX_M7.CPU_ICache=Enabled +CORTEX_M7.DisableExec-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_INSTRUCTION_ACCESS_DISABLE CORTEX_M7.Enable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_ENABLE CORTEX_M7.Enable-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_REGION_ENABLE CORTEX_M7.Enable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_ENABLE -CORTEX_M7.IPParameters=MPU_Control,CPU_ICache,CPU_DCache,Enable-Cortex_Memory_Protection_Unit_Region2_Settings,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings,Size-Cortex_Memory_Protection_Unit_Region0_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings,Enable-Cortex_Memory_Protection_Unit_Region1_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings,Size-Cortex_Memory_Protection_Unit_Region1_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region1_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings,SubRegionDisable-Cortex_Memory_Protection_Unit_Region0_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region1_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region0_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region2_Settings,Size-Cortex_Memory_Protection_Unit_Region2_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region2_Settings +CORTEX_M7.Enable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_REGION_ENABLE +CORTEX_M7.IPParameters=MPU_Control,CPU_ICache,CPU_DCache,Enable-Cortex_Memory_Protection_Unit_Region2_Settings,Enable-Cortex_Memory_Protection_Unit_Region0_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region0_Settings,Size-Cortex_Memory_Protection_Unit_Region0_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region0_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region0_Settings,Enable-Cortex_Memory_Protection_Unit_Region1_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region1_Settings,Size-Cortex_Memory_Protection_Unit_Region1_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region1_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region1_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings,SubRegionDisable-Cortex_Memory_Protection_Unit_Region0_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region1_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region0_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region2_Settings,Size-Cortex_Memory_Protection_Unit_Region2_Settings,TypeExtField-Cortex_Memory_Protection_Unit_Region2_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region2_Settings,IsShareable-Cortex_Memory_Protection_Unit_Region2_Settings,Enable-Cortex_Memory_Protection_Unit_Region3_Settings,BaseAddress-Cortex_Memory_Protection_Unit_Region3_Settings,Size-Cortex_Memory_Protection_Unit_Region3_Settings,AccessPermission-Cortex_Memory_Protection_Unit_Region3_Settings,DisableExec-Cortex_Memory_Protection_Unit_Region3_Settings,IsCacheable-Cortex_Memory_Protection_Unit_Region3_Settings,IsBufferable-Cortex_Memory_Protection_Unit_Region3_Settings CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ACCESS_NOT_BUFFERABLE CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_ACCESS_BUFFERABLE +CORTEX_M7.IsBufferable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_NOT_BUFFERABLE CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_ACCESS_NOT_CACHEABLE +CORTEX_M7.IsCacheable-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_ACCESS_NOT_CACHEABLE CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_ACCESS_SHAREABLE CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_ACCESS_NOT_SHAREABLE CORTEX_M7.IsShareable-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_ACCESS_SHAREABLE @@ -33,6 +39,7 @@ CORTEX_M7.MPU_Control=MPU_PRIVILEGED_DEFAULT CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_REGION_SIZE_4GB CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_REGION_SIZE_1KB CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region2_Settings=MPU_REGION_SIZE_16KB +CORTEX_M7.Size-Cortex_Memory_Protection_Unit_Region3_Settings=MPU_REGION_SIZE_512KB CORTEX_M7.SubRegionDisable-Cortex_Memory_Protection_Unit_Region0_Settings=0x87 CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region0_Settings=MPU_TEX_LEVEL0 CORTEX_M7.TypeExtField-Cortex_Memory_Protection_Unit_Region1_Settings=MPU_TEX_LEVEL0 @@ -902,14 +909,14 @@ USART2.DMADisableonRxErrorParam=ADVFEATURE_DMA_DISABLEONRXERROR USART2.IPParameters=VirtualMode-Asynchronous,OverrunDisableParam,DMADisableonRxErrorParam USART2.OverrunDisableParam=ADVFEATURE_OVERRUN_DISABLE USART2.VirtualMode-Asynchronous=VM_ASYNC -USART3.BaudRate=921600 +USART3.BaudRate=115200 USART3.DMADisableonRxErrorParam=ADVFEATURE_DMA_DISABLEONRXERROR -USART3.FIFOMode=FIFOMODE_ENABLE +USART3.FIFOMode=FIFOMODE_DISABLE USART3.IPParameters=VirtualMode-Asynchronous,DMADisableonRxErrorParam,OverrunDisableParam,FIFOMode,BaudRate,WordLength,Parity USART3.OverrunDisableParam=ADVFEATURE_OVERRUN_DISABLE -USART3.Parity=PARITY_EVEN +USART3.Parity=PARITY_NONE USART3.VirtualMode-Asynchronous=VM_ASYNC -USART3.WordLength=WORDLENGTH_9B +USART3.WordLength=WORDLENGTH_8B USART6.BaudRate=19200 USART6.DMADisableonRxErrorParam=ADVFEATURE_DMA_ENABLEONRXERROR USART6.FIFOMode=FIFOMODE_ENABLE