From 5b8dc0409bfc51c6e6fee7e58517bcaa856b0668 Mon Sep 17 00:00:00 2001 From: "DESKTOP-1PDT1EL\\10564" <1056470187@qq.com> Date: Wed, 26 Aug 2026 14:14:26 +0800 Subject: [PATCH] =?UTF-8?q?=E4=BF=AE=E6=94=B9=E6=8E=A8=E6=9D=86=E6=8E=A7?= =?UTF-8?q?=E5=88=B6=E8=A3=B8=E6=9C=BA=E9=98=B2=E6=AD=A2=E7=83=A7=E4=BF=9D?= =?UTF-8?q?=E9=99=A9=E4=B8=9D?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .settings/language.settings.xml | 4 +- Core/Src/main.c | 19 +- Debug/Core/Src/main.o | Bin 2232028 -> 2232128 bytes Debug/Core/Src/main.su | 8 +- Debug/EchoNewBB0825.bin | Bin 153772 -> 153820 bytes Debug/EchoNewBB0825.elf | Bin 3158032 -> 3158040 bytes Debug/EchoNewBB0825.hex | 17635 ++--- Debug/EchoNewBB0825.list | 105983 +++++++++++++++-------------- Debug/EchoNewBB0825.map | 2618 +- 9 files changed, 63152 insertions(+), 63115 deletions(-) diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml index baef797..9da6378 100644 --- a/.settings/language.settings.xml +++ b/.settings/language.settings.xml @@ -5,7 +5,7 @@ - + @@ -16,7 +16,7 @@ - + diff --git a/Core/Src/main.c b/Core/Src/main.c index e76e3ee..dded54d 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -226,12 +226,21 @@ int main(void) HAL_GPIO_TogglePin(M_OUT5_GPIO_Port, M_OUT5_Pin); HAL_GPIO_TogglePin(M_OUT6_GPIO_Port, M_OUT6_Pin); } - GF_BSP_GPIO_SetIO(7,1); - GF_BSP_GPIO_SetIO(8,0); - HAL_Delay(1000); - GF_BSP_GPIO_SetIO(7,0); + GF_BSP_GPIO_SetIO(7,1); /* 上升 0亮 1灭 不能同时为0,不能同时亮,会烧保险丝,为了给继电器吸合的反应时间*/ + GF_BSP_GPIO_SetIO(8,0);/*推杆上升下降切换时时必须经过停止,延时1s*/ + HAL_Delay(2000); + + GF_BSP_GPIO_SetIO(7,1);/*停*/ + GF_BSP_GPIO_SetIO(8,1); + HAL_Delay(2000); + + GF_BSP_GPIO_SetIO(7,0);/*下降*/ + GF_BSP_GPIO_SetIO(8,1); + HAL_Delay(2000); + + GF_BSP_GPIO_SetIO(7,1);/*停*/ GF_BSP_GPIO_SetIO(8,1); - HAL_Delay(1000); + HAL_Delay(2000); memset(InputInfo, '\0', sizeof(InputInfo)); diff --git a/Debug/Core/Src/main.o b/Debug/Core/Src/main.o index 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z5~m+P?z}577Q8l77J+90_m<+Xu@44slwYH)#TW*fUgIp-W7+>e{SidY}0oO|7KJ*qh9q{YD7~+9=CZI(+W^M*P4bOHL0y8f&fD5H?KN`o3DtB=i zQ(Fe{EPM%A;N4E|0^4e`;w#`$Xv(H{*$X@nTS3lv$(#g62f81#bWv(#aM=J%jSlx; zHpX;Erd8iI7<`!|d=oJonFaA3QV4O>d>QwR)8cBWGy~5q(_s}1ElaMKM>SG(&8@!WB8hw&6vLf>omA25TEZ~_r)Rmr=d6+YGY1bdNZEIgii(E z<>Y0>a%O9jG|$cJ6wA*h^^(tj@-y&u{: 80202c4: b508 push {r3, lr} @@ -72,7 +72,7 @@ Disassembly of section .text: 80202d2: bd08 pop {r3, pc} 80202d4: 00000000 .word 0x00000000 80202d8: 240000e0 .word 0x240000e0 - 80202dc: 08041fc0 .word 0x08041fc0 + 80202dc: 08041ff0 .word 0x08041ff0 080202e0 : 80202e0: f810 2b01 ldrb.w r2, [r0], #1 @@ -612,7 +612,7 @@ void DLT_LowLevelReceiveDmaToIdle(uint8_t *rxBuf, uint16_t Size) 80207aa: 887a ldrh r2, [r7, #2] 80207ac: 4619 mov r1, r3 80207ae: 6878 ldr r0, [r7, #4] - 80207b0: f020 f886 bl 80408c0 + 80207b0: f020 f89e bl 80408f0 } 80207b4: bf00 nop @@ -674,7 +674,7 @@ void DltInjectDataRcvd(uint32_t AppId, uint32_t ConId, uint32_t ServId, 8020818: 46bd mov sp, r7 802081a: bd80 pop {r7, pc} 802081c: 24009bb4 .word 0x24009bb4 - 8020820: 08041fd8 .word 0x08041fd8 + 8020820: 08042008 .word 0x08042008 08020824 : @@ -684,7 +684,7 @@ uint32_t GetSysTime(void) 8020824: b580 push {r7, lr} 8020826: af00 add r7, sp, #0 return HAL_GetTick(); - 8020828: f005 fbb4 bl 8025f94 + 8020828: f005 fbcc bl 8025fc4 802082c: 4603 mov r3, r0 } 802082e: 4618 mov r0, r3 @@ -738,7 +738,7 @@ void bsp_InitI2C(void) 802085c: 1d3b adds r3, r7, #4 802085e: 4619 mov r1, r3 8020860: 4808 ldr r0, [pc, #32] ; (8020884 ) - 8020862: f00c fdeb bl 802d43c + 8020862: f00c fe03 bl 802d46c gpio_init.Pin = I2C_SDA_PIN; 8020866: f44f 5300 mov.w r3, #8192 ; 0x2000 @@ -747,7 +747,7 @@ void bsp_InitI2C(void) 802086c: 1d3b adds r3, r7, #4 802086e: 4619 mov r1, r3 8020870: 4804 ldr r0, [pc, #16] ; (8020884 ) - 8020872: f00c fde3 bl 802d43c + 8020872: f00c fdfb bl 802d46c /* 给一个停止信号, 复位I2C总线上的所有设备到待机模式 */ i2c_Stop(); @@ -1390,7 +1390,7 @@ CV_struct_define GF_BSP_EEPROM_Get_CV(void) 8020bc4: 2230 movs r2, #48 ; 0x30 8020bc6: 2100 movs r1, #0 8020bc8: 4618 mov r0, r3 - 8020bca: f01f fea1 bl 8040910 + 8020bca: f01f feb9 bl 8040940 //char buffer[sizeof(CV_struct_define)]; GF_BSP_EEPROM_ReadBytes(&cv, GF_BSP_EEPROM_CV_struct_define_Start_Address, sizeof(CV_struct_define)); 8020bce: f107 0308 add.w r3, r7, #8 @@ -1429,7 +1429,7 @@ void Error_Detect_Intialzie(uint16_t DispacherPeriod) 8020c04: 80fb strh r3, [r7, #6] HardWareErrorController = (HardWareController*) malloc( 8020c06: 2018 movs r0, #24 - 8020c08: f01f fe3a bl 8040880 + 8020c08: f01f fe52 bl 80408b0 8020c0c: 4603 mov r3, r0 8020c0e: 461a mov r2, r3 8020c10: 4b10 ldr r3, [pc, #64] ; (8020c54 ) @@ -1522,63 +1522,63 @@ uint8_t GF_BSP_FDCAN_Init(void) 8020c94: 2200 movs r2, #0 8020c96: 2101 movs r1, #1 8020c98: 4818 ldr r0, [pc, #96] ; (8020cfc ) - 8020c9a: f00b fe53 bl 802c944 + 8020c9a: f00b fe6b bl 802c974 8020c9e: 4603 mov r3, r0 8020ca0: 2b00 cmp r3, #0 8020ca2: d001 beq.n 8020ca8 0) != HAL_OK) { Error_Handler(); - 8020ca4: f003 fb2a bl 80242fc + 8020ca4: f003 fb42 bl 802432c } if (HAL_FDCAN_ActivateNotification(&hfdcan1, FDCAN_IT_BUS_OFF, 0) != HAL_OK) 8020ca8: 2200 movs r2, #0 8020caa: f04f 7100 mov.w r1, #33554432 ; 0x2000000 8020cae: 4813 ldr r0, [pc, #76] ; (8020cfc ) - 8020cb0: f00b fe48 bl 802c944 + 8020cb0: f00b fe60 bl 802c974 8020cb4: 4603 mov r3, r0 8020cb6: 2b00 cmp r3, #0 8020cb8: d001 beq.n 8020cbe { Error_Handler(); - 8020cba: f003 fb1f bl 80242fc + 8020cba: f003 fb37 bl 802432c } HAL_FDCAN_Start(&hfdcan1); 8020cbe: 480f ldr r0, [pc, #60] ; (8020cfc ) - 8020cc0: f00b fc4c bl 802c55c + 8020cc0: f00b fc64 bl 802c58c if (HAL_FDCAN_ActivateNotification(&hfdcan2, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 8020cc4: 2200 movs r2, #0 8020cc6: 2101 movs r1, #1 8020cc8: 480d ldr r0, [pc, #52] ; (8020d00 ) - 8020cca: f00b fe3b bl 802c944 + 8020cca: f00b fe53 bl 802c974 8020cce: 4603 mov r3, r0 8020cd0: 2b00 cmp r3, #0 8020cd2: d001 beq.n 8020cd8 0) != HAL_OK) { Error_Handler(); - 8020cd4: f003 fb12 bl 80242fc + 8020cd4: f003 fb2a bl 802432c } if (HAL_FDCAN_ActivateNotification(&hfdcan2, FDCAN_IT_BUS_OFF, 0) != HAL_OK) 8020cd8: 2200 movs r2, #0 8020cda: f04f 7100 mov.w r1, #33554432 ; 0x2000000 8020cde: 4808 ldr r0, [pc, #32] ; (8020d00 ) - 8020ce0: f00b fe30 bl 802c944 + 8020ce0: f00b fe48 bl 802c974 8020ce4: 4603 mov r3, r0 8020ce6: 2b00 cmp r3, #0 8020ce8: d001 beq.n 8020cee { Error_Handler(); - 8020cea: f003 fb07 bl 80242fc + 8020cea: f003 fb1f bl 802432c } HAL_FDCAN_Start(&hfdcan2); 8020cee: 4804 ldr r0, [pc, #16] ; (8020d00 ) - 8020cf0: f00b fc34 bl 802c55c + 8020cf0: f00b fc4c bl 802c58c return 1; 8020cf4: 2301 movs r3, #1 @@ -1649,7 +1649,7 @@ void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs) 8020d52: 4a31 ldr r2, [pc, #196] ; (8020e18 ) 8020d54: 2140 movs r1, #64 ; 0x40 8020d56: 6878 ldr r0, [r7, #4] - 8020d58: f00b fc86 bl 802c668 + 8020d58: f00b fc9e bl 802c698 8020d5c: 4603 mov r3, r0 8020d5e: 2b00 cmp r3, #0 8020d60: d152 bne.n 8020e08 @@ -1717,7 +1717,7 @@ void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs) 8020db4: 4a18 ldr r2, [pc, #96] ; (8020e18 ) 8020db6: 2140 movs r1, #64 ; 0x40 8020db8: 6878 ldr r0, [r7, #4] - 8020dba: f00b fc55 bl 802c668 + 8020dba: f00b fc6d bl 802c698 8020dbe: 4603 mov r3, r0 8020dc0: 2b00 cmp r3, #0 8020dc2: d121 bne.n 8020e08 @@ -1836,7 +1836,7 @@ void GF_BSP_CANHandler_Init_CAN(FDCANHandler *handler, 8020e92: 601a str r2, [r3, #0] handler->dispacherController = (DispacherController*) malloc( 8020e94: 2018 movs r0, #24 - 8020e96: f01f fcf3 bl 8040880 + 8020e96: f01f fd0b bl 80408b0 8020e9a: 4603 mov r3, r0 8020e9c: 461a mov r2, r3 8020e9e: 68fb ldr r3, [r7, #12] @@ -2064,7 +2064,7 @@ void GF_CAN_Send_List_Send(FDCANHandler *handler) 8020fe6: 7a1b ldrb r3, [r3, #8] memcpy(handler->Tx_Buf, handler->pCurrentCANSendHadler->Tx_Buf, 8020fe8: 461a mov r2, r3 - 8020fea: f01f fc69 bl 80408c0 + 8020fea: f01f fc81 bl 80408f0 handler->SendList_Period=handler->pCurrentCANSendHadler->SendListTimePeriod; 8020fee: 687b ldr r3, [r7, #4] 8020ff0: 695b ldr r3, [r3, #20] @@ -2100,7 +2100,7 @@ void GF_CAN_Send_List_Send(FDCANHandler *handler) 8021020: 687b ldr r3, [r7, #4] 8021022: 695b ldr r3, [r3, #20] 8021024: 4618 mov r0, r3 - 8021026: f01f fc33 bl 8040890 + 8021026: f01f fc4b bl 80408c0 handler->pCurrentCANSendHadler = temp; 802102a: 687b ldr r3, [r7, #4] 802102c: 68fa ldr r2, [r7, #12] @@ -2116,7 +2116,7 @@ void GF_CAN_Send_List_Send(FDCANHandler *handler) 8021032: 687b ldr r3, [r7, #4] 8021034: 695b ldr r3, [r3, #20] 8021036: 4618 mov r0, r3 - 8021038: f01f fc2a bl 8040890 + 8021038: f01f fc42 bl 80408c0 handler->pCurrentCANSendHadler = NULL; 802103c: 687b ldr r3, [r7, #4] 802103e: 2200 movs r2, #0 @@ -2200,7 +2200,7 @@ void CAN_Send_t(struct _FDCANHandler *fd, uint32_t FrameID, uint8_t DataLength, 802109a: 683a ldr r2, [r7, #0] 802109c: 4914 ldr r1, [pc, #80] ; (80210f0 ) 802109e: 4813 ldr r0, [pc, #76] ; (80210ec ) - 80210a0: f00b fa87 bl 802c5b2 + 80210a0: f00b fa9f bl 802c5e2 80210a4: e01e b.n 80210e4 } else if (fd->canfd == &hfdcan2) 80210a6: 68fb ldr r3, [r7, #12] @@ -2244,7 +2244,7 @@ void CAN_Send_t(struct _FDCANHandler *fd, uint32_t FrameID, uint8_t DataLength, 80210d6: 683a ldr r2, [r7, #0] 80210d8: 4907 ldr r1, [pc, #28] ; (80210f8 ) 80210da: 4806 ldr r0, [pc, #24] ; (80210f4 ) - 80210dc: f00b fa69 bl 802c5b2 + 80210dc: f00b fa81 bl 802c5e2 80210e0: e000 b.n 80210e4 return; 80210e2: bf00 nop @@ -2305,7 +2305,7 @@ void CANHandlerAddTxList(FDCANHandler *handler, uint32_t CAN_ID, //临时指针2用于逐个申请内存 pTmp = (CANSendHandler*) malloc(sizeof(CANSendHandler)); 8021138: 201c movs r0, #28 - 802113a: f01f fba1 bl 8040880 + 802113a: f01f fbb9 bl 80408b0 802113e: 4603 mov r3, r0 8021140: 617b str r3, [r7, #20] memcpy(pTmp->Tx_Buf, Tx_Buf, SendLength); @@ -2314,7 +2314,7 @@ void CANHandlerAddTxList(FDCANHandler *handler, uint32_t CAN_ID, 8021146: 79fa ldrb r2, [r7, #7] 8021148: 6839 ldr r1, [r7, #0] 802114a: 4618 mov r0, r3 - 802114c: f01f fbb8 bl 80408c0 + 802114c: f01f fbd0 bl 80408f0 pTmp->pNext = NULL; 8021150: 697b ldr r3, [r7, #20] 8021152: 2200 movs r2, #0 @@ -2441,7 +2441,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 80211fe: 461a mov r2, r3 8021200: 2110 movs r1, #16 8021202: 481d ldr r0, [pc, #116] ; (8021278 ) - 8021204: f00c faca bl 802d79c + 8021204: f00c fae2 bl 802d7cc break; 8021208: e031 b.n 802126e case 2: @@ -2450,7 +2450,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 802120c: 461a mov r2, r3 802120e: 2101 movs r1, #1 8021210: 481a ldr r0, [pc, #104] ; (802127c ) - 8021212: f00c fac3 bl 802d79c + 8021212: f00c fadb bl 802d7cc break; 8021216: e02a b.n 802126e case 3: @@ -2459,7 +2459,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 802121a: 461a mov r2, r3 802121c: 2108 movs r1, #8 802121e: 4817 ldr r0, [pc, #92] ; (802127c ) - 8021220: f00c fabc bl 802d79c + 8021220: f00c fad4 bl 802d7cc break; 8021224: e023 b.n 802126e case 4: @@ -2468,7 +2468,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021228: 461a mov r2, r3 802122a: 2104 movs r1, #4 802122c: 4813 ldr r0, [pc, #76] ; (802127c ) - 802122e: f00c fab5 bl 802d79c + 802122e: f00c facd bl 802d7cc break; 8021232: e01c b.n 802126e case 5: @@ -2477,7 +2477,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021236: 461a mov r2, r3 8021238: 2120 movs r1, #32 802123a: 4810 ldr r0, [pc, #64] ; (802127c ) - 802123c: f00c faae bl 802d79c + 802123c: f00c fac6 bl 802d7cc break; 8021240: e015 b.n 802126e case 6: @@ -2486,7 +2486,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021244: 461a mov r2, r3 8021246: 2110 movs r1, #16 8021248: 480c ldr r0, [pc, #48] ; (802127c ) - 802124a: f00c faa7 bl 802d79c + 802124a: f00c fabf bl 802d7cc break; 802124e: e00e b.n 802126e case 7: @@ -2495,7 +2495,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021252: 461a mov r2, r3 8021254: f44f 5100 mov.w r1, #8192 ; 0x2000 8021258: 4809 ldr r0, [pc, #36] ; (8021280 ) - 802125a: f00c fa9f bl 802d79c + 802125a: f00c fab7 bl 802d7cc break; 802125e: e006 b.n 802126e case 8: @@ -2504,7 +2504,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021262: 461a mov r2, r3 8021264: 2140 movs r1, #64 ; 0x40 8021266: 4805 ldr r0, [pc, #20] ; (802127c ) - 8021268: f00c fa98 bl 802d79c + 8021268: f00c fab0 bl 802d7cc break; 802126c: bf00 nop @@ -2667,10 +2667,10 @@ uint8_t GF_BSP_TIMER_Init() 802136a: af00 add r7, sp, #0 HAL_TIM_Base_Start_IT(&htim1); 802136c: 4804 ldr r0, [pc, #16] ; (8021380 ) - 802136e: f010 feeb bl 8032148 + 802136e: f010 ff03 bl 8032178 HAL_TIM_Base_Start_IT(&htim8); 8021372: 4804 ldr r0, [pc, #16] ; (8021384 ) - 8021374: f010 fee8 bl 8032148 + 8021374: f010 ff00 bl 8032178 return 1; 8021378: 2301 movs r3, #1 } @@ -2710,7 +2710,7 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 80213a8: d104 bne.n 80213b4 { MX_LWIP_Process(); - 80213aa: f014 f989 bl 80356c0 + 80213aa: f014 f9a1 bl 80356f0 GF_BSP_Interrupt_Run_CallBack(DF_BSP_InterCall_TIM8_2ms_PeriodElapsedCallback); 80213ae: 200a movs r0, #10 80213b0: f7ff ffa6 bl 8021300 @@ -2914,7 +2914,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 80214e2: 2201 movs r2, #1 80214e4: 4934 ldr r1, [pc, #208] ; (80215b8 ) 80214e6: 4618 mov r0, r3 - 80214e8: f011 fbb0 bl 8032c4c + 80214e8: f011 fbc8 bl 8032c7c (uint8_t*) &E28_SBUS_UART_Handler.tmp_Rx_Buf, 1); @@ -2924,7 +2924,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 80214f0: 2201 movs r2, #1 80214f2: 4932 ldr r1, [pc, #200] ; (80215bc ) 80214f4: 4618 mov r0, r3 - 80214f6: f011 fba9 bl 8032c4c + 80214f6: f011 fbc1 bl 8032c7c (uint8_t*) &InterCall_DEBUG_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((RS_485_1_UART_Handler.uart), 80214fa: 4b21 ldr r3, [pc, #132] ; (8021580 ) @@ -2932,7 +2932,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 80214fe: 2201 movs r2, #1 8021500: 492f ldr r1, [pc, #188] ; (80215c0 ) 8021502: 4618 mov r0, r3 - 8021504: f011 fba2 bl 8032c4c + 8021504: f011 fbba bl 8032c7c (uint8_t*) &RS_485_1_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((RS_485_2_UART_Handler.uart), @@ -2941,7 +2941,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 802150c: 2201 movs r2, #1 802150e: 492d ldr r1, [pc, #180] ; (80215c4 ) 8021510: 4618 mov r0, r3 - 8021512: f011 fb9b bl 8032c4c + 8021512: f011 fbb3 bl 8032c7c (uint8_t*) &RS_485_2_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((RS_485_3_UART_Handler.uart), @@ -2950,7 +2950,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 802151a: 2201 movs r2, #1 802151c: 492a ldr r1, [pc, #168] ; (80215c8 ) 802151e: 4618 mov r0, r3 - 8021520: f011 fb94 bl 8032c4c + 8021520: f011 fbac bl 8032c7c (uint8_t*) &RS_485_3_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((RS_485_4_UART_Handler.uart), @@ -2959,7 +2959,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 8021528: 2201 movs r2, #1 802152a: 4928 ldr r1, [pc, #160] ; (80215cc ) 802152c: 4618 mov r0, r3 - 802152e: f011 fb8d bl 8032c4c + 802152e: f011 fba5 bl 8032c7c (uint8_t*) &RS_485_4_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((LTE_7S0_Serial_UART_Handler.uart), @@ -2968,7 +2968,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 8021536: 2201 movs r2, #1 8021538: 4925 ldr r1, [pc, #148] ; (80215d0 ) 802153a: 4618 mov r0, r3 - 802153c: f011 fb86 bl 8032c4c + 802153c: f011 fb9e bl 8032c7c (uint8_t*) <E_7S0_Serial_UART_Handler.tmp_Rx_Buf, 1); @@ -2978,7 +2978,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 8021544: 2201 movs r2, #1 8021546: 4923 ldr r1, [pc, #140] ; (80215d4 ) 8021548: 4618 mov r0, r3 - 802154a: f011 fb7f bl 8032c4c + 802154a: f011 fb97 bl 8032c7c (uint8_t*) &Airborne_UART_Handler.tmp_Rx_Buf, 1); @@ -2997,7 +2997,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 8021562: 2201 movs r2, #1 8021564: 491e ldr r1, [pc, #120] ; (80215e0 ) 8021566: 4618 mov r0, r3 - 8021568: f011 fb70 bl 8032c4c + 8021568: f011 fb88 bl 8032c7c #endif @@ -3114,7 +3114,7 @@ void UARTHandlerAddTxList(struct UARTHandler *uartHandler, uint8_t *data, //临时指针2用于逐个申请内存 pTmp = (UARTSendHandler*) malloc(sizeof(UARTSendHandler)); 8021660: f44f 7001 mov.w r0, #516 ; 0x204 - 8021664: f01f f90c bl 8040880 + 8021664: f01f f924 bl 80408b0 8021668: 4603 mov r3, r0 802166a: 617b str r3, [r7, #20] memcpy(pTmp->Tx_Buf, data, length); @@ -3123,7 +3123,7 @@ void UARTHandlerAddTxList(struct UARTHandler *uartHandler, uint8_t *data, 8021670: 88fa ldrh r2, [r7, #6] 8021672: 68b9 ldr r1, [r7, #8] 8021674: 4618 mov r0, r3 - 8021676: f01f f923 bl 80408c0 + 8021676: f01f f93b bl 80408f0 pTmp->pNext = NULL; 802167a: 697b ldr r3, [r7, #20] 802167c: 2200 movs r2, #0 @@ -3294,7 +3294,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 802177a: 2201 movs r2, #1 802177c: f44f 6180 mov.w r1, #1024 ; 0x400 8021780: 484c ldr r0, [pc, #304] ; (80218b4 ) - 8021782: f00c f80b bl 802d79c + 8021782: f00c f823 bl 802d7cc 8021786: e04b b.n 8021820 } else if (uartHandler->uart->Instance == USART3) //**RS485_2 @@ -3310,7 +3310,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 8021794: 2201 movs r2, #1 8021796: f44f 6100 mov.w r1, #2048 ; 0x800 802179a: 4846 ldr r0, [pc, #280] ; (80218b4 ) - 802179c: f00b fffe bl 802d79c + 802179c: f00c f816 bl 802d7cc 80217a0: e03e b.n 8021820 } else if (uartHandler->uart->Instance == USART6) //**RS485_3 @@ -3326,7 +3326,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 80217ae: 2201 movs r2, #1 80217b0: f44f 7180 mov.w r1, #256 ; 0x100 80217b4: 4842 ldr r0, [pc, #264] ; (80218c0 ) - 80217b6: f00b fff1 bl 802d79c + 80217b6: f00c f809 bl 802d7cc 80217ba: e031 b.n 8021820 } else if (uartHandler->uart->Instance == UART7) //**RS485_4 @@ -3341,7 +3341,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 80217c8: 2201 movs r2, #1 80217ca: f44f 7100 mov.w r1, #512 ; 0x200 80217ce: 483c ldr r0, [pc, #240] ; (80218c0 ) - 80217d0: f00b ffe4 bl 802d79c + 80217d0: f00b fffc bl 802d7cc 80217d4: e024 b.n 8021820 } else if (uartHandler->uart->Instance == USART2)//****SBUS @@ -3361,7 +3361,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 80217ee: f503 5380 add.w r3, r3, #4096 ; 0x1000 80217f2: 8c5a ldrh r2, [r3, #34] ; 0x22 80217f4: 2364 movs r3, #100 ; 0x64 - 80217f6: f011 f993 bl 8032b20 + 80217f6: f011 f9ab bl 8032b50 80217fa: e011 b.n 8021820 uartHandler->TxCount,100); @@ -3382,7 +3382,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 8021814: f503 5380 add.w r3, r3, #4096 ; 0x1000 8021818: 8c5a ldrh r2, [r3, #34] ; 0x22 802181a: 2364 movs r3, #100 ; 0x64 - 802181c: f011 f980 bl 8032b20 + 802181c: f011 f998 bl 8032b50 uartHandler->TxCount,100); } @@ -3467,7 +3467,7 @@ __STATIC_FORCEINLINE void __DSB(void) 8021882: f503 5380 add.w r3, r3, #4096 ; 0x1000 8021886: 8c5b ldrh r3, [r3, #34] ; 0x22 8021888: 461a mov r2, r3 - 802188a: f011 fa35 bl 8032cf8 + 802188a: f011 fa4d bl 8032d28 802188e: e000 b.n 8021892 return; 8021890: bf00 nop @@ -3481,9 +3481,9 @@ __STATIC_FORCEINLINE void __DSB(void) 8021894: 46bd mov sp, r7 8021896: bd80 pop {r7, pc} 8021898: 24009bb4 .word 0x24009bb4 - 802189c: 08044c7c .word 0x08044c7c - 80218a0: 08042058 .word 0x08042058 - 80218a4: 08042004 .word 0x08042004 + 802189c: 08044cac .word 0x08044cac + 80218a0: 08042088 .word 0x08042088 + 80218a4: 08042034 .word 0x08042034 80218a8: 58000c00 .word 0x58000c00 80218ac: 40004c00 .word 0x40004c00 80218b0: 40011000 .word 0x40011000 @@ -3548,7 +3548,7 @@ void UARTHandlerRX(struct UARTHandler *uartHandler) 8021924: 3303 adds r3, #3 8021926: 2201 movs r2, #1 8021928: 4619 mov r1, r3 - 802192a: f011 f98f bl 8032c4c + 802192a: f011 f9a7 bl 8032c7c uartHandler->Wait_Time_Count = 0; 802192e: 687b ldr r3, [r7, #4] @@ -3620,7 +3620,7 @@ void IntializeUARTHandler(struct UARTHandler *uartHandler, uartHandler->dispacherController = (DispacherController*) malloc( 8021998: 2018 movs r0, #24 - 802199a: f01e ff71 bl 8040880 + 802199a: f01e ff89 bl 80408b0 802199e: 4603 mov r3, r0 80219a0: 461a mov r2, r3 80219a2: 68fb ldr r3, [r7, #12] @@ -3985,7 +3985,7 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) 8021c00: 2200 movs r2, #0 8021c02: f44f 6180 mov.w r1, #1024 ; 0x400 8021c06: 481a ldr r0, [pc, #104] ; (8021c70 ) - 8021c08: f00b fdc8 bl 802d79c + 8021c08: f00b fde0 bl 802d7cc } else if (huart->Instance == UART5) //**E28 // SBUS { @@ -4003,7 +4003,7 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) 8021c18: 2200 movs r2, #0 8021c1a: f44f 6100 mov.w r1, #2048 ; 0x800 8021c1e: 4814 ldr r0, [pc, #80] ; (8021c70 ) - 8021c20: f00b fdbc bl 802d79c + 8021c20: f00b fdd4 bl 802d7cc } 8021c24: e01b b.n 8021c5e } else if (huart->Instance == USART6) //**RS485_3 @@ -4016,7 +4016,7 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) 8021c30: 2200 movs r2, #0 8021c32: f44f 7180 mov.w r1, #256 ; 0x100 8021c36: 4811 ldr r0, [pc, #68] ; (8021c7c ) - 8021c38: f00b fdb0 bl 802d79c + 8021c38: f00b fdc8 bl 802d7cc } 8021c3c: e00f b.n 8021c5e } else if (huart->Instance == UART7) //**RS485_4 @@ -4029,7 +4029,7 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) 8021c48: 2200 movs r2, #0 8021c4a: f44f 7100 mov.w r1, #512 ; 0x200 8021c4e: 480b ldr r0, [pc, #44] ; (8021c7c ) - 8021c50: f00b fda4 bl 802d79c + 8021c50: f00b fdbc bl 802d7cc } 8021c54: e003 b.n 8021c5e } else if (huart->Instance == USART2) //**E22 // External serial port @@ -4116,7 +4116,7 @@ void GF_UART_Send_List_Send(struct UARTHandler *handler) 8021ce2: 881b ldrh r3, [r3, #0] memcpy(handler->Tx_Buf, handler->pCurrentUARTSendHadler->Tx_Buf, 8021ce4: 461a mov r2, r3 - 8021ce6: f01e fdeb bl 80408c0 + 8021ce6: f01e fe03 bl 80408f0 handler->SendList_Period = handler->pCurrentUARTSendHadler->SendListTimePeriod; 8021cea: 687b ldr r3, [r7, #4] @@ -4172,7 +4172,7 @@ void GF_UART_Send_List_Send(struct UARTHandler *handler) 8021d4c: f503 5380 add.w r3, r3, #4096 ; 0x1000 8021d50: 6b5b ldr r3, [r3, #52] ; 0x34 8021d52: 4618 mov r0, r3 - 8021d54: f01e fd9c bl 8040890 + 8021d54: f01e fdb4 bl 80408c0 handler->pCurrentUARTSendHadler = temp; 8021d58: 687b ldr r3, [r7, #4] 8021d5a: f503 5380 add.w r3, r3, #4096 ; 0x1000 @@ -4191,7 +4191,7 @@ void GF_UART_Send_List_Send(struct UARTHandler *handler) 8021d68: f503 5380 add.w r3, r3, #4096 ; 0x1000 8021d6c: 6b5b ldr r3, [r3, #52] ; 0x34 8021d6e: 4618 mov r0, r3 - 8021d70: f01e fd8e bl 8040890 + 8021d70: f01e fda6 bl 80408c0 handler->pCurrentUARTSendHadler = NULL; 8021d74: 687b ldr r3, [r7, #4] 8021d76: f503 5380 add.w r3, r3, #4096 ; 0x1000 @@ -4327,7 +4327,7 @@ void Dispatcher_List_Add_t(DispacherController *uartHandler, { uartHandler->pHead = uartHandler->pTail = (Dispatcher*) malloc( 8021e20: 2008 movs r0, #8 - 8021e22: f01e fd2d bl 8040880 + 8021e22: f01e fd45 bl 80408b0 8021e26: 4603 mov r3, r0 8021e28: 461a mov r2, r3 8021e2a: 687b ldr r3, [r7, #4] @@ -4376,7 +4376,7 @@ void Dispatcher_List_Add_t(DispacherController *uartHandler, //临时指针2用于逐个申请内存 pTmp = (Dispatcher*) malloc(sizeof(Dispatcher)); 8021e68: 2008 movs r0, #8 - 8021e6a: f01e fd09 bl 8040880 + 8021e6a: f01e fd21 bl 80408b0 8021e6e: 4603 mov r3, r0 8021e70: 60fb str r3, [r7, #12] pTmp->dispache = dispache; @@ -4447,7 +4447,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, uartHandler->pComHWHead = uartHandler->pComHWTail = (ComHardWare*) malloc(sizeof(ComHardWare)); 8021ec8: 203c movs r0, #60 ; 0x3c - 8021eca: f01e fcd9 bl 8040880 + 8021eca: f01e fcf1 bl 80408b0 8021ece: 4603 mov r3, r0 8021ed0: 461a mov r2, r3 uartHandler->pComHWHead = uartHandler->pComHWTail = @@ -4464,7 +4464,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, 8021ee2: 2232 movs r2, #50 ; 0x32 8021ee4: 2100 movs r1, #0 8021ee6: 4618 mov r0, r3 - 8021ee8: f01e fd12 bl 8040910 + 8021ee8: f01e fd2a bl 8040940 sizeof(uartHandler->pComHWHead->Name)); memcpy(uartHandler->pComHWHead->Name, name, strlen(name)); 8021eec: 68fb ldr r3, [r7, #12] @@ -4476,7 +4476,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, 8021efa: 461a mov r2, r3 8021efc: 68b9 ldr r1, [r7, #8] 8021efe: 4620 mov r0, r4 - 8021f00: f01e fcde bl 80408c0 + 8021f00: f01e fcf6 bl 80408f0 uartHandler->pComHWHead->IsOnline = value; 8021f04: 68fb ldr r3, [r7, #12] 8021f06: 681b ldr r3, [r3, #0] @@ -4498,7 +4498,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, pTmp = (ComHardWare*) malloc(sizeof(ComHardWare)); 8021f20: 203c movs r0, #60 ; 0x3c - 8021f22: f01e fcad bl 8040880 + 8021f22: f01e fcc5 bl 80408b0 8021f26: 4603 mov r3, r0 8021f28: 617b str r3, [r7, #20] memset(pTmp->Name, '\0', sizeof(pTmp->Name)); @@ -4506,7 +4506,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, 8021f2c: 2232 movs r2, #50 ; 0x32 8021f2e: 2100 movs r1, #0 8021f30: 4618 mov r0, r3 - 8021f32: f01e fced bl 8040910 + 8021f32: f01e fd05 bl 8040940 memcpy(pTmp->Name, name, strlen(name)); 8021f36: 697c ldr r4, [r7, #20] 8021f38: 68b8 ldr r0, [r7, #8] @@ -4515,7 +4515,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, 8021f40: 461a mov r2, r3 8021f42: 68b9 ldr r1, [r7, #8] 8021f44: 4620 mov r0, r4 - 8021f46: f01e fcbb bl 80408c0 + 8021f46: f01e fcd3 bl 80408f0 pTmp->BitFlag = bitFlag; 8021f4a: 697b ldr r3, [r7, #20] @@ -4611,7 +4611,7 @@ void PCOMHardWare_Check_t(HardWareController *uartHandler) 8021fbe: 2232 movs r2, #50 ; 0x32 8021fc0: 2100 movs r1, #0 8021fc2: 4830 ldr r0, [pc, #192] ; (8022084 ) - 8021fc4: f01e fca4 bl 8040910 + 8021fc4: f01e fcbc bl 8040940 memcpy(str1, ptr->Name, strlen(ptr->Name)); 8021fc8: 68fc ldr r4, [r7, #12] 8021fca: 68fb ldr r3, [r7, #12] @@ -4621,7 +4621,7 @@ void PCOMHardWare_Check_t(HardWareController *uartHandler) 8021fd4: 461a mov r2, r3 8021fd6: 4621 mov r1, r4 8021fd8: 482a ldr r0, [pc, #168] ; (8022084 ) - 8021fda: f01e fc71 bl 80408c0 + 8021fda: f01e fc89 bl 80408f0 LOGFF(DL_ERROR, "connecting Error %s", ptr->Name); 8021fde: 4b2a ldr r3, [pc, #168] ; (8022088 ) 8021fe0: 781b ldrb r3, [r3, #0] @@ -4726,9 +4726,9 @@ void PCOMHardWare_Check_t(HardWareController *uartHandler) 8022082: bf00 nop 8022084: 24009b5c .word 0x24009b5c 8022088: 24009bb4 .word 0x24009bb4 - 802208c: 08044c8c .word 0x08044c8c - 8022090: 080420ac .word 0x080420ac - 8022094: 08042078 .word 0x08042078 + 802208c: 08044cbc .word 0x08044cbc + 8022090: 080420dc .word 0x080420dc + 8022094: 080420a8 .word 0x080420a8 8022098: 240000fc .word 0x240000fc 0802209c : @@ -4853,12 +4853,12 @@ int32_t read_temperature() HAL_ADC_Start(&hadc2); //开启ADC1 802212e: 4848 ldr r0, [pc, #288] ; (8022250 ) - 8022130: f004 fb54 bl 80267dc + 8022130: f004 fb6c bl 802680c if (HAL_ADC_PollForConversion(&hadc2, 100) == HAL_OK) 8022134: 2164 movs r1, #100 ; 0x64 8022136: 4846 ldr r0, [pc, #280] ; (8022250 ) - 8022138: f004 fc4e bl 80269d8 + 8022138: f004 fc66 bl 8026a08 802213c: 4603 mov r3, r0 802213e: 2b00 cmp r3, #0 8022140: d16c bne.n 802221c @@ -4866,7 +4866,7 @@ int32_t read_temperature() //16 bit resolution adc_value = HAL_ADC_GetValue(&hadc2); 8022142: 4843 ldr r0, [pc, #268] ; (8022250 ) - 8022144: f004 fd3c bl 8026bc0 + 8022144: f004 fd54 bl 8026bf0 8022148: 4603 mov r3, r0 802214a: 461a mov r2, r3 802214c: 4b41 ldr r3, [pc, #260] ; (8022254 ) @@ -4874,7 +4874,7 @@ int32_t read_temperature() HAL_ADC_Stop(&hadc2); 8022150: 483f ldr r0, [pc, #252] ; (8022250 ) - 8022152: f004 fc0d bl 8026970 + 8022152: f004 fc25 bl 80269a0 // 1. 计算热敏电阻两端电压 float voltage = (adc_value / (float) ADC_MAX_VALUE) * VREF; 8022156: 4b3f ldr r3, [pc, #252] ; (8022254 ) @@ -4909,7 +4909,7 @@ int32_t read_temperature() 80221a6: edd7 7a01 vldr s15, [r7, #4] 80221aa: eeb7 7ae7 vcvt.f64.f32 d7, s15 80221ae: eeb0 0b47 vmov.f64 d0, d7 - 80221b2: f01f fdd9 bl 8041d68 + 80221b2: f01f fdf1 bl 8041d98 80221b6: eeb0 7b40 vmov.f64 d7, d0 80221ba: eef7 7bc7 vcvt.f32.f64 s15, d7 80221be: edc7 7a01 vstr s15, [r7, #4] @@ -4952,7 +4952,7 @@ int32_t read_temperature() 8022220: 601a str r2, [r3, #0] HAL_ADC_Stop(&hadc2); 8022222: 480b ldr r0, [pc, #44] ; (8022250 ) - 8022224: f004 fba4 bl 8026970 + 8022224: f004 fbbc bl 80269a0 return 0; 8022228: 2300 movs r3, #0 } @@ -4994,7 +4994,7 @@ void tcp_server_init(uint16_t port) { // 创建TCP控制块 server_pcb = tcp_new_ip_type(IPADDR_TYPE_ANY); 8022272: 202e movs r0, #46 ; 0x2e - 8022274: f017 f882 bl 803937c + 8022274: f017 f89a bl 80393ac 8022278: 4603 mov r3, r0 802227a: 4a1e ldr r2, [pc, #120] ; (80222f4 ) 802227c: 6013 str r3, [r2, #0] @@ -5012,7 +5012,7 @@ void tcp_server_init(uint16_t port) { 802228a: 88fa ldrh r2, [r7, #6] 802228c: 491a ldr r1, [pc, #104] ; (80222f8 ) 802228e: 4618 mov r0, r3 - 8022290: f015 ffd0 bl 8038234 + 8022290: f015 ffe8 bl 8038264 8022294: 4603 mov r3, r0 8022296: 73fb strb r3, [r7, #15] if (err != ERR_OK) { @@ -5024,7 +5024,7 @@ void tcp_server_init(uint16_t port) { 80222a2: 681b ldr r3, [r3, #0] 80222a4: 4619 mov r1, r3 80222a6: 2001 movs r0, #1 - 80222a8: f014 fb9e bl 80369e8 + 80222a8: f014 fbb6 bl 8036a18 server_pcb = NULL; 80222ac: 4b11 ldr r3, [pc, #68] ; (80222f4 ) 80222ae: 2200 movs r2, #0 @@ -5039,7 +5039,7 @@ void tcp_server_init(uint16_t port) { 80222b6: 681b ldr r3, [r3, #0] 80222b8: 21ff movs r1, #255 ; 0xff 80222ba: 4618 mov r0, r3 - 80222bc: f016 f872 bl 80383a4 + 80222bc: f016 f88a bl 80383d4 80222c0: 4603 mov r3, r0 80222c2: 4a0c ldr r2, [pc, #48] ; (80222f4 ) 80222c4: 6013 str r3, [r2, #0] @@ -5056,14 +5056,14 @@ void tcp_server_init(uint16_t port) { 80222d0: 681b ldr r3, [r3, #0] 80222d2: 490a ldr r1, [pc, #40] ; (80222fc ) 80222d4: 4618 mov r0, r3 - 80222d6: f017 f8c5 bl 8039464 + 80222d6: f017 f8dd bl 8039494 // 初始化客户端数组 memset(clients, 0, sizeof(clients)); 80222da: 2218 movs r2, #24 80222dc: 2100 movs r1, #0 80222de: 4808 ldr r0, [pc, #32] ; (8022300 ) - 80222e0: f01e fb16 bl 8040910 + 80222e0: f01e fb2e bl 8040940 80222e4: e002 b.n 80222ec return; 80222e6: bf00 nop @@ -5076,7 +5076,7 @@ void tcp_server_init(uint16_t port) { 80222f0: bd80 pop {r7, pc} 80222f2: bf00 nop 80222f4: 24009bb0 .word 0x24009bb0 - 80222f8: 08044dd0 .word 0x08044dd0 + 80222f8: 08044e00 .word 0x08044e00 80222fc: 08022305 .word 0x08022305 8022300: 24009b98 .word 0x24009b98 @@ -5132,7 +5132,7 @@ static err_t tcp_accept_cb(void *arg, struct tcp_pcb *newpcb, err_t err) { // 没有可用槽位,拒绝连接 tcp_abort(newpcb); 8022346: 68b8 ldr r0, [r7, #8] - 8022348: f015 ff68 bl 803821c + 8022348: f015 ff80 bl 803824c return ERR_ABRT; 802234c: f06f 030c mvn.w r3, #12 8022350: e01b b.n 802238a @@ -5142,19 +5142,19 @@ static err_t tcp_accept_cb(void *arg, struct tcp_pcb *newpcb, err_t err) { tcp_setprio(newpcb, TCP_PRIO_MIN); 8022352: 2101 movs r1, #1 8022354: 68b8 ldr r0, [r7, #8] - 8022356: f016 fe1f bl 8038f98 + 8022356: f016 fe37 bl 8038fc8 tcp_recv(newpcb, tcp_recv_cb); 802235a: 490f ldr r1, [pc, #60] ; (8022398 ) 802235c: 68b8 ldr r0, [r7, #8] - 802235e: f017 f81b bl 8039398 + 802235e: f017 f833 bl 80393c8 tcp_err(newpcb, tcp_err_cb); 8022362: 490e ldr r1, [pc, #56] ; (802239c ) 8022364: 68b8 ldr r0, [r7, #8] - 8022366: f017 f85b bl 8039420 + 8022366: f017 f873 bl 8039450 tcp_sent(newpcb, tcp_sent_cb); 802236a: 490d ldr r1, [pc, #52] ; (80223a0 ) 802236c: 68b8 ldr r0, [r7, #8] - 802236e: f017 f835 bl 80393dc + 802236e: f017 f84d bl 803940c // 保存客户端信息 clients[free_index].pcb = newpcb; @@ -5233,7 +5233,7 @@ static err_t tcp_recv_cb(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, } tcp_close(tpcb); 80223e6: 68b8 ldr r0, [r7, #8] - 80223e8: f015 fe2e bl 8038048 + 80223e8: f015 fe46 bl 8038078 return ERR_OK; 80223ec: 2300 movs r3, #0 80223ee: e009 b.n 8022404 @@ -5245,10 +5245,10 @@ static err_t tcp_recv_cb(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, 80223f2: 891b ldrh r3, [r3, #8] 80223f4: 4619 mov r1, r3 80223f6: 68b8 ldr r0, [r7, #8] - 80223f8: f016 f8ea bl 80385d0 + 80223f8: f016 f902 bl 8038600 pbuf_free(p); 80223fc: 6878 ldr r0, [r7, #4] - 80223fe: f015 f985 bl 803770c + 80223fe: f015 f99d bl 803773c return ERR_OK; 8022402: 2300 movs r3, #0 @@ -5365,7 +5365,7 @@ void tcp_send_to_all_clients(const char *data, uint16_t len) { 80224a0: 887a ldrh r2, [r7, #2] 80224a2: 2301 movs r3, #1 80224a4: 6879 ldr r1, [r7, #4] - 80224a6: f019 fe77 bl 803c198 + 80224a6: f019 fe8f bl 803c1c8 80224aa: 4603 mov r3, r0 80224ac: 72fb strb r3, [r7, #11] TCP_WRITE_FLAG_COPY); @@ -5379,7 +5379,7 @@ void tcp_send_to_all_clients(const char *data, uint16_t len) { 80224b8: 68fb ldr r3, [r7, #12] 80224ba: f852 3033 ldr.w r3, [r2, r3, lsl #3] 80224be: 4618 mov r0, r3 - 80224c0: f01a fc54 bl 803cd6c + 80224c0: f01a fc6c bl 803cd9c for (int i = 0; i < MAX_CLIENTS; i++) { 80224c4: 68fb ldr r3, [r7, #12] 80224c6: 3301 adds r3, #1 @@ -6158,7 +6158,7 @@ void DLTuc_LogOutVarArgs(DltLogLevel_t Level, uint32_t AppId, uint32_t ContextId 802291c: 693a ldr r2, [r7, #16] 802291e: 6af9 ldr r1, [r7, #44] ; 0x2c 8022920: 4618 mov r0, r3 - 8022922: f01e f979 bl 8040c18 + 8022922: f01e f991 bl 8040c48 8022926: 4603 mov r3, r0 8022928: 83fb strh r3, [r7, #30] va_end(ap); @@ -6386,7 +6386,7 @@ void decode_MK32Data(uint8_t *buffer, uint16_t length) 8022a76: bf00 nop 8022a78: 2400ad04 .word 0x2400ad04 8022a7c: 24000280 .word 0x24000280 - 8022a80: 080420d4 .word 0x080420d4 + 8022a80: 08042104 .word 0x08042104 8022a84: 00000000 .word 0x00000000 08022a88 : @@ -6931,9 +6931,9 @@ void MK32_Sbus_UART_Handler_intialize(struct UARTHandler* Handler) 8022e80: 2400ad08 .word 0x2400ad08 8022e84: 08022a29 .word 0x08022a29 8022e88: 24000280 .word 0x24000280 - 8022e8c: 080420d4 .word 0x080420d4 + 8022e8c: 08042104 .word 0x08042104 8022e90: 24009bb4 .word 0x24009bb4 - 8022e94: 080420e0 .word 0x080420e0 + 8022e94: 08042110 .word 0x08042110 08022e98 : @@ -7027,13 +7027,13 @@ void MX_ADC2_Init(void) 8022f0a: f883 2038 strb.w r2, [r3, #56] ; 0x38 if (HAL_ADC_Init(&hadc2) != HAL_OK) 8022f0e: 4812 ldr r0, [pc, #72] ; (8022f58 ) - 8022f10: f003 fac2 bl 8026498 + 8022f10: f003 fada bl 80264c8 8022f14: 4603 mov r3, r0 8022f16: 2b00 cmp r3, #0 8022f18: d001 beq.n 8022f1e { Error_Handler(); - 8022f1a: f001 f9ef bl 80242fc + 8022f1a: f001 fa07 bl 802432c } /** Configure Regular Channel @@ -7063,13 +7063,13 @@ void MX_ADC2_Init(void) 8022f3c: 1d3b adds r3, r7, #4 8022f3e: 4619 mov r1, r3 8022f40: 4805 ldr r0, [pc, #20] ; (8022f58 ) - 8022f42: f003 fe4b bl 8026bdc + 8022f42: f003 fe63 bl 8026c0c 8022f46: 4603 mov r3, r0 8022f48: 2b00 cmp r3, #0 8022f4a: d001 beq.n 8022f50 { Error_Handler(); - 8022f4c: f001 f9d6 bl 80242fc + 8022f4c: f001 f9ee bl 802432c } /* USER CODE BEGIN ADC2_Init 2 */ @@ -7106,7 +7106,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) 8022f80: 22bc movs r2, #188 ; 0xbc 8022f82: 2100 movs r1, #0 8022f84: 4618 mov r0, r3 - 8022f86: f01d fcc3 bl 8040910 + 8022f86: f01d fcdb bl 8040940 if(adcHandle->Instance==ADC2) 8022f8a: 687b ldr r3, [r7, #4] 8022f8c: 681b ldr r3, [r3, #0] @@ -7151,13 +7151,13 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8022fc2: f107 0310 add.w r3, r7, #16 8022fc6: 4618 mov r0, r3 - 8022fc8: f00c feda bl 802fd80 + 8022fc8: f00c fef2 bl 802fdb0 8022fcc: 4603 mov r3, r0 8022fce: 2b00 cmp r3, #0 8022fd0: d001 beq.n 8022fd6 { Error_Handler(); - 8022fd2: f001 f993 bl 80242fc + 8022fd2: f001 f9ab bl 802432c } /* ADC2 clock enable */ @@ -7200,7 +7200,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) 8023024: f107 03cc add.w r3, r7, #204 ; 0xcc 8023028: 4619 mov r1, r3 802302a: 4805 ldr r0, [pc, #20] ; (8023040 ) - 802302c: f00a fa06 bl 802d43c + 802302c: f00a fa1e bl 802d46c /* USER CODE BEGIN ADC2_MspInit 1 */ @@ -7245,10 +7245,10 @@ void MX_BDMA_Init(void) 8023068: 2200 movs r2, #0 802306a: 2100 movs r1, #0 802306c: 2081 movs r0, #129 ; 0x81 - 802306e: f004 fc90 bl 8027992 + 802306e: f004 fca8 bl 80279c2 HAL_NVIC_EnableIRQ(BDMA_Channel0_IRQn); 8023072: 2081 movs r0, #129 ; 0x81 - 8023074: f004 fca7 bl 80279c6 + 8023074: f004 fcbf bl 80279f6 } 8023078: bf00 nop @@ -7287,64 +7287,64 @@ void MX_DMA_Init(void) 80230a8: 2200 movs r2, #0 80230aa: 2100 movs r1, #0 80230ac: 200b movs r0, #11 - 80230ae: f004 fc70 bl 8027992 + 80230ae: f004 fc88 bl 80279c2 HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn); 80230b2: 200b movs r0, #11 - 80230b4: f004 fc87 bl 80279c6 + 80230b4: f004 fc9f bl 80279f6 /* DMA1_Stream1_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0); 80230b8: 2200 movs r2, #0 80230ba: 2100 movs r1, #0 80230bc: 200c movs r0, #12 - 80230be: f004 fc68 bl 8027992 + 80230be: f004 fc80 bl 80279c2 HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); 80230c2: 200c movs r0, #12 - 80230c4: f004 fc7f bl 80279c6 + 80230c4: f004 fc97 bl 80279f6 /* DMA1_Stream2_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0); 80230c8: 2200 movs r2, #0 80230ca: 2100 movs r1, #0 80230cc: 200d movs r0, #13 - 80230ce: f004 fc60 bl 8027992 + 80230ce: f004 fc78 bl 80279c2 HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn); 80230d2: 200d movs r0, #13 - 80230d4: f004 fc77 bl 80279c6 + 80230d4: f004 fc8f bl 80279f6 /* DMA1_Stream3_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0); 80230d8: 2200 movs r2, #0 80230da: 2100 movs r1, #0 80230dc: 200e movs r0, #14 - 80230de: f004 fc58 bl 8027992 + 80230de: f004 fc70 bl 80279c2 HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); 80230e2: 200e movs r0, #14 - 80230e4: f004 fc6f bl 80279c6 + 80230e4: f004 fc87 bl 80279f6 /* DMA1_Stream4_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 0, 0); 80230e8: 2200 movs r2, #0 80230ea: 2100 movs r1, #0 80230ec: 200f movs r0, #15 - 80230ee: f004 fc50 bl 8027992 + 80230ee: f004 fc68 bl 80279c2 HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn); 80230f2: 200f movs r0, #15 - 80230f4: f004 fc67 bl 80279c6 + 80230f4: f004 fc7f bl 80279f6 /* DMA1_Stream5_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0); 80230f8: 2200 movs r2, #0 80230fa: 2100 movs r1, #0 80230fc: 2010 movs r0, #16 - 80230fe: f004 fc48 bl 8027992 + 80230fe: f004 fc60 bl 80279c2 HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); 8023102: 2010 movs r0, #16 - 8023104: f004 fc5f bl 80279c6 + 8023104: f004 fc77 bl 80279f6 /* DMA1_Stream6_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 0, 0); 8023108: 2200 movs r2, #0 802310a: 2100 movs r1, #0 802310c: 2011 movs r0, #17 - 802310e: f004 fc40 bl 8027992 + 802310e: f004 fc58 bl 80279c2 HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn); 8023112: 2011 movs r0, #17 - 8023114: f004 fc57 bl 80279c6 + 8023114: f004 fc6f bl 80279f6 } 8023118: bf00 nop @@ -7579,7 +7579,7 @@ void echo_back_485_1(uint8_t *buffer, uint16_t length) { 80232c4: 887a ldrh r2, [r7, #2] 80232c6: 6879 ldr r1, [r7, #4] 80232c8: 4618 mov r0, r3 - 80232ca: f01d faf9 bl 80408c0 + 80232ca: f01d fb11 bl 80408f0 echoHandler_485_1->TxCount = length; 80232ce: 4b0a ldr r3, [pc, #40] ; (80232f8 ) 80232d0: 681b ldr r3, [r3, #0] @@ -7627,7 +7627,7 @@ void echo_back_485_2(uint8_t *buffer, uint16_t length) { 8023318: 887a ldrh r2, [r7, #2] 802331a: 6879 ldr r1, [r7, #4] 802331c: 4618 mov r0, r3 - 802331e: f01d facf bl 80408c0 + 802331e: f01d fae7 bl 80408f0 echoHandler_485_2->TxCount = length; 8023322: 4b0a ldr r3, [pc, #40] ; (802334c ) 8023324: 681b ldr r3, [r3, #0] @@ -7677,7 +7677,7 @@ void echo_back_485_3(uint8_t *buffer, uint16_t length) { 802336c: 887a ldrh r2, [r7, #2] 802336e: 6879 ldr r1, [r7, #4] 8023370: 4618 mov r0, r3 - 8023372: f01d faa5 bl 80408c0 + 8023372: f01d fabd bl 80408f0 echoHandler_485_3->TxCount = length; 8023376: 4b0a ldr r3, [pc, #40] ; (80233a0 ) 8023378: 681b ldr r3, [r3, #0] @@ -7725,7 +7725,7 @@ void echo_back_485_4(uint8_t *buffer, uint16_t length) { 80233c0: 887a ldrh r2, [r7, #2] 80233c2: 6879 ldr r1, [r7, #4] 80233c4: 4618 mov r0, r3 - 80233c6: f01d fa7b bl 80408c0 + 80233c6: f01d fa93 bl 80408f0 echoHandler_485_4->TxCount = length; 80233ca: 4b0a ldr r3, [pc, #40] ; (80233f4 ) 80233cc: 681b ldr r3, [r3, #0] @@ -7775,7 +7775,7 @@ void echo_back_InterCall_DEBUG(uint8_t *buffer, uint16_t length) { 8023414: 887a ldrh r2, [r7, #2] 8023416: 6879 ldr r1, [r7, #4] 8023418: 4618 mov r0, r3 - 802341a: f01d fa51 bl 80408c0 + 802341a: f01d fa69 bl 80408f0 echoHandler_InterCall_DEBUG->TxCount = length; 802341e: 4b0a ldr r3, [pc, #40] ; (8023448 ) 8023420: 681b ldr r3, [r3, #0] @@ -7823,7 +7823,7 @@ void echo_back_Airborne_UART(uint8_t *buffer, uint16_t length) { 8023460: 887a ldrh r2, [r7, #2] 8023462: 6879 ldr r1, [r7, #4] 8023464: 4618 mov r0, r3 - 8023466: f01d fa2b bl 80408c0 + 8023466: f01d fa43 bl 80408f0 echoHandler_Airborne_UART->TxCount = length; 802346a: 4b0a ldr r3, [pc, #40] ; (8023494 ) 802346c: 681b ldr r3, [r3, #0] @@ -7870,7 +7870,7 @@ void echo_back_LTE_7S0_Serial(uint8_t *buffer, uint16_t length) { 80234b4: 887a ldrh r2, [r7, #2] 80234b6: 6879 ldr r1, [r7, #4] 80234b8: 4618 mov r0, r3 - 80234ba: f01d fa01 bl 80408c0 + 80234ba: f01d fa19 bl 80408f0 echoHandler_LTE_7S0_Serial_UART->TxCount = length; 80234be: 4b0a ldr r3, [pc, #40] ; (80234e8 ) 80234c0: 681b ldr r3, [r3, #0] @@ -7914,7 +7914,7 @@ void echo_back_LPUART1(uint8_t *buffer, uint16_t length) { 8023500: 887a ldrh r2, [r7, #2] 8023502: 6879 ldr r1, [r7, #4] 8023504: 4618 mov r0, r3 - 8023506: f01d f9db bl 80408c0 + 8023506: f01d f9f3 bl 80408f0 echoHandler_LPUART1->TxCount = length; 802350a: 4b0a ldr r3, [pc, #40] ; (8023534 ) 802350c: 681b ldr r3, [r3, #0] @@ -7960,7 +7960,7 @@ void echo_back_CANFD_1(uint32_t canID, uint8_t *buffer, uint32_t length) { 8023550: 687a ldr r2, [r7, #4] 8023552: 68b9 ldr r1, [r7, #8] 8023554: 4618 mov r0, r3 - 8023556: f01d f9b3 bl 80408c0 + 8023556: f01d f9cb bl 80408f0 echo_CANFD_1->AddCANSendList(echo_CANFD_1, 0x01, length, 802355a: 4b0a ldr r3, [pc, #40] ; (8023584 ) 802355c: 681b ldr r3, [r3, #0] @@ -8009,7 +8009,7 @@ void echo_back_CANFD_2(uint32_t canID, uint8_t *buffer, uint32_t length) { 80235a0: 687a ldr r2, [r7, #4] 80235a2: 68b9 ldr r1, [r7, #8] 80235a4: 4618 mov r0, r3 - 80235a6: f01d f98b bl 80408c0 + 80235a6: f01d f9a3 bl 80408f0 echo_CANFD_2->AddCANSendList(echo_CANFD_2, 0x02, length, 80235aa: 4b0a ldr r3, [pc, #40] ; (80235d4 ) 80235ac: 681b ldr r3, [r3, #0] @@ -8167,13 +8167,13 @@ void MX_FDCAN1_Init(void) 8023682: 669a str r2, [r3, #104] ; 0x68 if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK) 8023684: 4804 ldr r0, [pc, #16] ; (8023698 ) - 8023686: f008 fd8b bl 802c1a0 + 8023686: f008 fda3 bl 802c1d0 802368a: 4603 mov r3, r0 802368c: 2b00 cmp r3, #0 802368e: d001 beq.n 8023694 { Error_Handler(); - 8023690: f000 fe34 bl 80242fc + 8023690: f000 fe4c bl 802432c } /* USER CODE BEGIN FDCAN1_Init 2 */ @@ -8310,13 +8310,13 @@ void MX_FDCAN2_Init(void) 802374a: 669a str r2, [r3, #104] ; 0x68 if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK) 802374c: 4804 ldr r0, [pc, #16] ; (8023760 ) - 802374e: f008 fd27 bl 802c1a0 + 802374e: f008 fd3f bl 802c1d0 8023752: 4603 mov r3, r0 8023754: 2b00 cmp r3, #0 8023756: d001 beq.n 802375c { Error_Handler(); - 8023758: f000 fdd0 bl 80242fc + 8023758: f000 fde8 bl 802432c } /* USER CODE BEGIN FDCAN2_Init 2 */ @@ -8352,7 +8352,7 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) 8023784: 22bc movs r2, #188 ; 0xbc 8023786: 2100 movs r1, #0 8023788: 4618 mov r0, r3 - 802378a: f01d f8c1 bl 8040910 + 802378a: f01d f8d9 bl 8040940 if(fdcanHandle->Instance==FDCAN1) 802378e: 687b ldr r3, [r7, #4] 8023790: 681b ldr r3, [r3, #0] @@ -8373,13 +8373,13 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 80237a6: f107 0318 add.w r3, r7, #24 80237aa: 4618 mov r0, r3 - 80237ac: f00c fae8 bl 802fd80 + 80237ac: f00c fb00 bl 802fdb0 80237b0: 4603 mov r3, r0 80237b2: 2b00 cmp r3, #0 80237b4: d001 beq.n 80237ba { Error_Handler(); - 80237b6: f000 fda1 bl 80242fc + 80237b6: f000 fdb9 bl 802432c } /* FDCAN1 clock enable */ @@ -8441,17 +8441,17 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) 8023828: f107 03d4 add.w r3, r7, #212 ; 0xd4 802382c: 4619 mov r1, r3 802382e: 4838 ldr r0, [pc, #224] ; (8023910 ) - 8023830: f009 fe04 bl 802d43c + 8023830: f009 fe1c bl 802d46c /* FDCAN1 interrupt Init */ HAL_NVIC_SetPriority(FDCAN1_IT0_IRQn, 0, 0); 8023834: 2200 movs r2, #0 8023836: 2100 movs r1, #0 8023838: 2013 movs r0, #19 - 802383a: f004 f8aa bl 8027992 + 802383a: f004 f8c2 bl 80279c2 HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn); 802383e: 2013 movs r0, #19 - 8023840: f004 f8c1 bl 80279c6 + 8023840: f004 f8d9 bl 80279f6 HAL_NVIC_EnableIRQ(FDCAN2_IT0_IRQn); /* USER CODE BEGIN FDCAN2_MspInit 1 */ @@ -8474,12 +8474,12 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 802385e: f107 0318 add.w r3, r7, #24 8023862: 4618 mov r0, r3 - 8023864: f00c fa8c bl 802fd80 + 8023864: f00c faa4 bl 802fdb0 8023868: 4603 mov r3, r0 802386a: 2b00 cmp r3, #0 802386c: d001 beq.n 8023872 Error_Handler(); - 802386e: f000 fd45 bl 80242fc + 802386e: f000 fd5d bl 802432c HAL_RCC_FDCAN_CLK_ENABLED++; 8023872: 4b25 ldr r3, [pc, #148] ; (8023908 ) 8023874: 681b ldr r3, [r3, #0] @@ -8532,15 +8532,15 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) 80238de: f107 03d4 add.w r3, r7, #212 ; 0xd4 80238e2: 4619 mov r1, r3 80238e4: 480a ldr r0, [pc, #40] ; (8023910 ) - 80238e6: f009 fda9 bl 802d43c + 80238e6: f009 fdc1 bl 802d46c HAL_NVIC_SetPriority(FDCAN2_IT0_IRQn, 0, 0); 80238ea: 2200 movs r2, #0 80238ec: 2100 movs r1, #0 80238ee: 2014 movs r0, #20 - 80238f0: f004 f84f bl 8027992 + 80238f0: f004 f867 bl 80279c2 HAL_NVIC_EnableIRQ(FDCAN2_IT0_IRQn); 80238f4: 2014 movs r0, #20 - 80238f6: f004 f866 bl 80279c6 + 80238f6: f004 f87e bl 80279f6 } 80238fa: bf00 nop 80238fc: 37e8 adds r7, #232 ; 0xe8 @@ -8646,7 +8646,7 @@ void MX_GPIO_Init(void) 80239e2: 2201 movs r2, #1 80239e4: 217d movs r1, #125 ; 0x7d 80239e6: 484d ldr r0, [pc, #308] ; (8023b1c ) - 80239e8: f009 fed8 bl 802d79c + 80239e8: f009 fef0 bl 802d7cc |M_OUT8_Pin|M_OUT2_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ @@ -8654,35 +8654,35 @@ void MX_GPIO_Init(void) 80239ec: 2201 movs r2, #1 80239ee: f242 0104 movw r1, #8196 ; 0x2004 80239f2: 484b ldr r0, [pc, #300] ; (8023b20 ) - 80239f4: f009 fed2 bl 802d79c + 80239f4: f009 feea bl 802d7cc /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, S0_RESET_Pin|RS485_3_DIR_Pin|RS485_4_DIR_Pin|E22_RST_Pin, GPIO_PIN_RESET); 80239f8: 2200 movs r2, #0 80239fa: f240 7101 movw r1, #1793 ; 0x701 80239fe: 4848 ldr r0, [pc, #288] ; (8023b20 ) - 8023a00: f009 fecc bl 802d79c + 8023a00: f009 fee4 bl 802d7cc /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(ETH_RST_GPIO_Port, ETH_RST_Pin, GPIO_PIN_RESET); 8023a04: 2200 movs r2, #0 8023a06: 2140 movs r1, #64 ; 0x40 8023a08: 4846 ldr r0, [pc, #280] ; (8023b24 ) - 8023a0a: f009 fec7 bl 802d79c + 8023a0a: f009 fedf bl 802d7cc /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, EEPROM_WP_Pin|EEPROM_SCL_Pin, GPIO_PIN_RESET); 8023a0e: 2200 movs r2, #0 8023a10: f44f 51c0 mov.w r1, #6144 ; 0x1800 8023a14: 4841 ldr r0, [pc, #260] ; (8023b1c ) - 8023a16: f009 fec1 bl 802d79c + 8023a16: f009 fed9 bl 802d7cc /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, RS485_1_DIR_Pin|RS485_2_DIR_Pin|E28_M0_Pin|E28_M1_Pin 8023a1a: 2200 movs r2, #0 8023a1c: f640 410b movw r1, #3083 ; 0xc0b 8023a20: 4841 ldr r0, [pc, #260] ; (8023b28 ) - 8023a22: f009 febb bl 802d79c + 8023a22: f009 fed3 bl 802d7cc |E28_M2_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ @@ -8690,7 +8690,7 @@ void MX_GPIO_Init(void) 8023a26: 2201 movs r2, #1 8023a28: 2110 movs r1, #16 8023a2a: 4840 ldr r0, [pc, #256] ; (8023b2c ) - 8023a2c: f009 feb6 bl 802d79c + 8023a2c: f009 fece bl 802d7cc /*Configure GPIO pins : PEPin PEPin PEPin PEPin PEPin PEPin PEPin PEPin */ @@ -8711,7 +8711,7 @@ void MX_GPIO_Init(void) 8023a42: f107 031c add.w r3, r7, #28 8023a46: 4619 mov r1, r3 8023a48: 4834 ldr r0, [pc, #208] ; (8023b1c ) - 8023a4a: f009 fcf7 bl 802d43c + 8023a4a: f009 fd0f bl 802d46c /*Configure GPIO pins : PCPin PCPin PCPin PCPin PCPin PCPin */ @@ -8732,7 +8732,7 @@ void MX_GPIO_Init(void) 8023a60: f107 031c add.w r3, r7, #28 8023a64: 4619 mov r1, r3 8023a66: 482e ldr r0, [pc, #184] ; (8023b20 ) - 8023a68: f009 fce8 bl 802d43c + 8023a68: f009 fd00 bl 802d46c /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = ETH_RST_Pin; @@ -8751,7 +8751,7 @@ void MX_GPIO_Init(void) 8023a7c: f107 031c add.w r3, r7, #28 8023a80: 4619 mov r1, r3 8023a82: 4828 ldr r0, [pc, #160] ; (8023b24 ) - 8023a84: f009 fcda bl 802d43c + 8023a84: f009 fcf2 bl 802d46c /*Configure GPIO pins : PEPin PEPin */ GPIO_InitStruct.Pin = EEPROM_SDA_Pin|M_IN2_Pin; @@ -8767,7 +8767,7 @@ void MX_GPIO_Init(void) 8023a96: f107 031c add.w r3, r7, #28 8023a9a: 4619 mov r1, r3 8023a9c: 481f ldr r0, [pc, #124] ; (8023b1c ) - 8023a9e: f009 fccd bl 802d43c + 8023a9e: f009 fce5 bl 802d46c /*Configure GPIO pins : PDPin PDPin PDPin PDPin PDPin */ @@ -8788,7 +8788,7 @@ void MX_GPIO_Init(void) 8023ab4: f107 031c add.w r3, r7, #28 8023ab8: 4619 mov r1, r3 8023aba: 481b ldr r0, [pc, #108] ; (8023b28 ) - 8023abc: f009 fcbe bl 802d43c + 8023abc: f009 fcd6 bl 802d46c /*Configure GPIO pins : PD14 PDPin */ GPIO_InitStruct.Pin = GPIO_PIN_14|E28_AUX_Pin; @@ -8804,7 +8804,7 @@ void MX_GPIO_Init(void) 8023ad0: f107 031c add.w r3, r7, #28 8023ad4: 4619 mov r1, r3 8023ad6: 4814 ldr r0, [pc, #80] ; (8023b28 ) - 8023ad8: f009 fcb0 bl 802d43c + 8023ad8: f009 fcc8 bl 802d46c /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = M_OUT1_Pin; @@ -8823,7 +8823,7 @@ void MX_GPIO_Init(void) 8023aec: f107 031c add.w r3, r7, #28 8023af0: 4619 mov r1, r3 8023af2: 480e ldr r0, [pc, #56] ; (8023b2c ) - 8023af4: f009 fca2 bl 802d43c + 8023af4: f009 fcba bl 802d46c /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = M_IN1_Pin; @@ -8839,7 +8839,7 @@ void MX_GPIO_Init(void) 8023b04: f107 031c add.w r3, r7, #28 8023b08: 4619 mov r1, r3 8023b0a: 4808 ldr r0, [pc, #32] ; (8023b2c ) - 8023b0c: f009 fc96 bl 802d43c + 8023b0c: f009 fcae bl 802d46c } 8023b10: bf00 nop @@ -8905,13 +8905,13 @@ void MX_I2C4_Init(void) 8023b68: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c4) != HAL_OK) 8023b6a: 480e ldr r0, [pc, #56] ; (8023ba4 ) - 8023b6c: f009 fe4a bl 802d804 + 8023b6c: f009 fe62 bl 802d834 8023b70: 4603 mov r3, r0 8023b72: 2b00 cmp r3, #0 8023b74: d001 beq.n 8023b7a { Error_Handler(); - 8023b76: f000 fbc1 bl 80242fc + 8023b76: f000 fbd9 bl 802432c } /** Configure Analogue filter @@ -8919,13 +8919,13 @@ void MX_I2C4_Init(void) if (HAL_I2CEx_ConfigAnalogFilter(&hi2c4, I2C_ANALOGFILTER_ENABLE) != HAL_OK) 8023b7a: 2100 movs r1, #0 8023b7c: 4809 ldr r0, [pc, #36] ; (8023ba4 ) - 8023b7e: f00a fd56 bl 802e62e + 8023b7e: f00a fd6e bl 802e65e 8023b82: 4603 mov r3, r0 8023b84: 2b00 cmp r3, #0 8023b86: d001 beq.n 8023b8c { Error_Handler(); - 8023b88: f000 fbb8 bl 80242fc + 8023b88: f000 fbd0 bl 802432c } /** Configure Digital filter @@ -8933,13 +8933,13 @@ void MX_I2C4_Init(void) if (HAL_I2CEx_ConfigDigitalFilter(&hi2c4, 0) != HAL_OK) 8023b8c: 2100 movs r1, #0 8023b8e: 4805 ldr r0, [pc, #20] ; (8023ba4 ) - 8023b90: f00a fd98 bl 802e6c4 + 8023b90: f00a fdb0 bl 802e6f4 8023b94: 4603 mov r3, r0 8023b96: 2b00 cmp r3, #0 8023b98: d001 beq.n 8023b9e { Error_Handler(); - 8023b9a: f000 fbaf bl 80242fc + 8023b9a: f000 fbc7 bl 802432c } /* USER CODE BEGIN I2C4_Init 2 */ @@ -8975,7 +8975,7 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) 8023bcc: 22bc movs r2, #188 ; 0xbc 8023bce: 2100 movs r1, #0 8023bd0: 4618 mov r0, r3 - 8023bd2: f01c fe9d bl 8040910 + 8023bd2: f01c feb5 bl 8040940 if(i2cHandle->Instance==I2C4) 8023bd6: 687b ldr r3, [r7, #4] 8023bd8: 681b ldr r3, [r3, #0] @@ -8996,13 +8996,13 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8023bea: f107 0310 add.w r3, r7, #16 8023bee: 4618 mov r0, r3 - 8023bf0: f00c f8c6 bl 802fd80 + 8023bf0: f00c f8de bl 802fdb0 8023bf4: 4603 mov r3, r0 8023bf6: 2b00 cmp r3, #0 8023bf8: d001 beq.n 8023bfe { Error_Handler(); - 8023bfa: f000 fb7f bl 80242fc + 8023bfa: f000 fb97 bl 802432c } __HAL_RCC_GPIOD_CLK_ENABLE(); @@ -9039,7 +9039,7 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) 8023c3c: f107 03cc add.w r3, r7, #204 ; 0xcc 8023c40: 4619 mov r1, r3 8023c42: 4815 ldr r0, [pc, #84] ; (8023c98 ) - 8023c44: f009 fbfa bl 802d43c + 8023c44: f009 fc12 bl 802d46c /* I2C4 clock enable */ __HAL_RCC_I2C4_CLK_ENABLE(); @@ -9059,18 +9059,18 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) 8023c66: 2200 movs r2, #0 8023c68: 2100 movs r1, #0 8023c6a: 205f movs r0, #95 ; 0x5f - 8023c6c: f003 fe91 bl 8027992 + 8023c6c: f003 fea9 bl 80279c2 HAL_NVIC_EnableIRQ(I2C4_EV_IRQn); 8023c70: 205f movs r0, #95 ; 0x5f - 8023c72: f003 fea8 bl 80279c6 + 8023c72: f003 fec0 bl 80279f6 HAL_NVIC_SetPriority(I2C4_ER_IRQn, 0, 0); 8023c76: 2200 movs r2, #0 8023c78: 2100 movs r1, #0 8023c7a: 2060 movs r0, #96 ; 0x60 - 8023c7c: f003 fe89 bl 8027992 + 8023c7c: f003 fea1 bl 80279c2 HAL_NVIC_EnableIRQ(I2C4_ER_IRQn); 8023c80: 2060 movs r0, #96 ; 0x60 - 8023c82: f003 fea0 bl 80279c6 + 8023c82: f003 feb8 bl 80279f6 /* USER CODE BEGIN I2C4_MspInit 1 */ /* USER CODE END I2C4_MspInit 1 */ @@ -9101,7 +9101,7 @@ int main(void) /* MPU Configuration--------------------------------------------------------*/ MPU_Config(); - 8023ca4: f000 fadc bl 8024260 + 8023ca4: f000 faf4 bl 8024290 if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */ 8023ca8: 4b36 ldr r3, [pc, #216] ; (8023d84 ) 8023caa: 695b ldr r3, [r3, #20] @@ -9224,14 +9224,14 @@ int main(void) /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8023d8a: f002 f87d bl 8025e88 + 8023d8a: f002 f895 bl 8025eb8 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 8023d8e: f000 f9bd bl 802410c + 8023d8e: f000 f9d5 bl 802413c /* USER CODE BEGIN SysInit */ //__HAL_RCC_D2SRAM3_CLK_ENABLE(); /* USER CODE END SysInit */ @@ -9248,33 +9248,33 @@ int main(void) MX_I2C4_Init(); 8023da2: f7ff fec5 bl 8023b30 MX_TIM1_Init(); - 8023da6: f000 fe23 bl 80249f0 + 8023da6: f000 fe3b bl 8024a20 MX_UART4_Init(); - 8023daa: f000 ff65 bl 8024c78 + 8023daa: f000 ff7d bl 8024ca8 MX_UART5_Init(); - 8023dae: f000 ffb7 bl 8024d20 + 8023dae: f000 ffcf bl 8024d50 MX_UART7_Init(); - 8023db2: f001 f809 bl 8024dc8 + 8023db2: f001 f821 bl 8024df8 MX_USART1_UART_Init(); - 8023db6: f001 f85f bl 8024e78 + 8023db6: f001 f877 bl 8024ea8 MX_USART3_UART_Init(); - 8023dba: f001 f90d bl 8024fd8 + 8023dba: f001 f925 bl 8025008 MX_USART2_UART_Init(); - 8023dbe: f001 f8b3 bl 8024f28 + 8023dbe: f001 f8cb bl 8024f58 MX_USART6_UART_Init(); - 8023dc2: f001 f961 bl 8025088 + 8023dc2: f001 f979 bl 80250b8 MX_TIM8_Init(); - 8023dc6: f000 fe67 bl 8024a98 + 8023dc6: f000 fe7f bl 8024ac8 MX_LWIP_Init(); - 8023dca: f011 fb2d bl 8035428 + 8023dca: f011 fb45 bl 8035458 MX_ADC2_Init(); 8023dce: f7ff f863 bl 8022e98 MX_BDMA_Init(); 8023dd2: f7ff f937 bl 8023044 MX_QUADSPI_Init(); - 8023dd6: f000 fa97 bl 8024308 + 8023dd6: f000 faaf bl 8024338 MX_LPUART1_UART_Init(); - 8023dda: f000 fef9 bl 8024bd0 + 8023dda: f000 ff11 bl 8024c00 /* USER CODE BEGIN 2 */ SystemTimer_Intialize(); 8023dde: f7fc fc93 bl 8020708 @@ -9285,7 +9285,7 @@ int main(void) GF_BSP_EEPROM_Init(); 8023dea: f7fc fd22 bl 8020832 CV_GV_Init(); - 8023dee: f000 fa11 bl 8024214 + 8023dee: f000 fa29 bl 8024244 //初始化encoder GF_BSP_UARTHandlers_Intialize( @@ -9328,7 +9328,7 @@ int main(void) Airborne_UART_Dispacher_Time); DLT_LOG_ENABLE_LEVEL = 7; //7 send all information //0 send nothing - 8023e36: 4ba5 ldr r3, [pc, #660] ; (80240cc ) + 8023e36: 4bb1 ldr r3, [pc, #708] ; (80240fc ) 8023e38: 2207 movs r2, #7 8023e3a: 701a strb r2, [r3, #0] dLT_Log_intialize(); @@ -9336,7 +9336,7 @@ int main(void) //dLT_Log_intialize(&RS_485_4_UART_Handler); MK32_Sbus_UART_Handler_intialize(&E28_SBUS_UART_Handler); - 8023e40: 48a3 ldr r0, [pc, #652] ; (80240d0 ) + 8023e40: 48af ldr r0, [pc, #700] ; (8024100 ) 8023e42: f7fe ffd9 bl 8022df8 echo_intialize(); 8023e46: f7ff f96d bl 8023124 @@ -9344,13 +9344,13 @@ int main(void) 8023e4a: f7fc ff21 bl 8020c90 GF_BSP_CANHandler_Init(can1_sendListPeriod, can1_DispacherPeriod, - 8023e4e: 4ba1 ldr r3, [pc, #644] ; (80240d4 ) + 8023e4e: 4bad ldr r3, [pc, #692] ; (8024104 ) 8023e50: 6818 ldr r0, [r3, #0] - 8023e52: 4ba1 ldr r3, [pc, #644] ; (80240d8 ) + 8023e52: 4bad ldr r3, [pc, #692] ; (8024108 ) 8023e54: 6819 ldr r1, [r3, #0] - 8023e56: 4ba1 ldr r3, [pc, #644] ; (80240dc ) + 8023e56: 4bad ldr r3, [pc, #692] ; (802410c ) 8023e58: 681a ldr r2, [r3, #0] - 8023e5a: 4ba1 ldr r3, [pc, #644] ; (80240e0 ) + 8023e5a: 4bad ldr r3, [pc, #692] ; (8024110 ) 8023e5c: 681b ldr r3, [r3, #0] 8023e5e: f7fc ffe9 bl 8020e34 can2_sendListPeriod, can2_DispacherPeriod); @@ -9360,8 +9360,8 @@ int main(void) GF_BSP_TIMER_Init(); 8023e66: f7fd fa7f bl 8021368 P_MK32 = &GV.P_MK32; - 8023e6a: 4b9e ldr r3, [pc, #632] ; (80240e4 ) - 8023e6c: 4a9e ldr r2, [pc, #632] ; (80240e8 ) + 8023e6a: 4baa ldr r3, [pc, #680] ; (8024114 ) + 8023e6c: 4aaa ldr r2, [pc, #680] ; (8024118 ) 8023e6e: 601a str r2, [r3, #0] //TCP_Client_Init(); @@ -9377,9 +9377,9 @@ int main(void) while (1) { if (HAL_GetTick() - ledTick >= 3000) /*led翻转,表示程序运行状�?????*/ - 8023e78: f002 f88c bl 8025f94 + 8023e78: f002 f8a4 bl 8025fc4 8023e7c: 4603 mov r3, r0 - 8023e7e: 4a9b ldr r2, [pc, #620] ; (80240ec ) + 8023e7e: 4aa7 ldr r2, [pc, #668] ; (802411c ) 8023e80: 6812 ldr r2, [r2, #0] 8023e82: 1a9b subs r3, r3, r2 8023e84: f640 32b7 movw r2, #2999 ; 0xbb7 @@ -9387,77653 +9387,77678 @@ int main(void) 8023e8a: d921 bls.n 8023ed0 { ledTick = HAL_GetTick(); - 8023e8c: f002 f882 bl 8025f94 + 8023e8c: f002 f89a bl 8025fc4 8023e90: 4603 mov r3, r0 8023e92: 461a mov r2, r3 - 8023e94: 4b95 ldr r3, [pc, #596] ; (80240ec ) + 8023e94: 4ba1 ldr r3, [pc, #644] ; (802411c ) 8023e96: 601a str r2, [r3, #0] HAL_GPIO_TogglePin(IO_LED_GPIO_Port, IO_LED_Pin); //反转 8023e98: 2104 movs r1, #4 - 8023e9a: 4895 ldr r0, [pc, #596] ; (80240f0 ) - 8023e9c: f009 fc97 bl 802d7ce + 8023e9a: 48a1 ldr r0, [pc, #644] ; (8024120 ) + 8023e9c: f009 fcaf bl 802d7fe HAL_GPIO_TogglePin(M_OUT1_GPIO_Port, M_OUT1_Pin); 8023ea0: 2110 movs r1, #16 - 8023ea2: 4894 ldr r0, [pc, #592] ; (80240f4 ) - 8023ea4: f009 fc93 bl 802d7ce + 8023ea2: 48a0 ldr r0, [pc, #640] ; (8024124 ) + 8023ea4: f009 fcab bl 802d7fe HAL_GPIO_TogglePin(M_OUT2_GPIO_Port, M_OUT2_Pin); 8023ea8: 2101 movs r1, #1 - 8023eaa: 4893 ldr r0, [pc, #588] ; (80240f8 ) - 8023eac: f009 fc8f bl 802d7ce + 8023eaa: 489f ldr r0, [pc, #636] ; (8024128 ) + 8023eac: f009 fca7 bl 802d7fe HAL_GPIO_TogglePin(M_OUT3_GPIO_Port, M_OUT3_Pin); 8023eb0: 2108 movs r1, #8 - 8023eb2: 4891 ldr r0, [pc, #580] ; (80240f8 ) - 8023eb4: f009 fc8b bl 802d7ce + 8023eb2: 489d ldr r0, [pc, #628] ; (8024128 ) + 8023eb4: f009 fca3 bl 802d7fe HAL_GPIO_TogglePin(M_OUT4_GPIO_Port, M_OUT4_Pin); 8023eb8: 2104 movs r1, #4 - 8023eba: 488f ldr r0, [pc, #572] ; (80240f8 ) - 8023ebc: f009 fc87 bl 802d7ce + 8023eba: 489b ldr r0, [pc, #620] ; (8024128 ) + 8023ebc: f009 fc9f bl 802d7fe HAL_GPIO_TogglePin(M_OUT5_GPIO_Port, M_OUT5_Pin); 8023ec0: 2120 movs r1, #32 - 8023ec2: 488d ldr r0, [pc, #564] ; (80240f8 ) - 8023ec4: f009 fc83 bl 802d7ce + 8023ec2: 4899 ldr r0, [pc, #612] ; (8024128 ) + 8023ec4: f009 fc9b bl 802d7fe HAL_GPIO_TogglePin(M_OUT6_GPIO_Port, M_OUT6_Pin); 8023ec8: 2110 movs r1, #16 - 8023eca: 488b ldr r0, [pc, #556] ; (80240f8 ) - 8023ecc: f009 fc7f bl 802d7ce + 8023eca: 4897 ldr r0, [pc, #604] ; (8024128 ) + 8023ecc: f009 fc97 bl 802d7fe } - GF_BSP_GPIO_SetIO(7,1); + GF_BSP_GPIO_SetIO(7,1); /* 上升 0亮 1灭 不能同时为0,不能同时亮,会烧保险丝,为了给继电器吸合的反应时间*/ 8023ed0: 2101 movs r1, #1 8023ed2: 2007 movs r0, #7 8023ed4: f7fd f96a bl 80211ac - GF_BSP_GPIO_SetIO(8,0); + GF_BSP_GPIO_SetIO(8,0);/*推杆上升下降切换时时必须经过停止,延时1s*/ 8023ed8: 2100 movs r1, #0 8023eda: 2008 movs r0, #8 8023edc: f7fd f966 bl 80211ac - HAL_Delay(1000); - 8023ee0: f44f 707a mov.w r0, #1000 ; 0x3e8 - 8023ee4: f002 f862 bl 8025fac - GF_BSP_GPIO_SetIO(7,0); - 8023ee8: 2100 movs r1, #0 + HAL_Delay(2000); + 8023ee0: f44f 60fa mov.w r0, #2000 ; 0x7d0 + 8023ee4: f002 f87a bl 8025fdc + + GF_BSP_GPIO_SetIO(7,1);/*停*/ + 8023ee8: 2101 movs r1, #1 8023eea: 2007 movs r0, #7 8023eec: f7fd f95e bl 80211ac GF_BSP_GPIO_SetIO(8,1); 8023ef0: 2101 movs r1, #1 8023ef2: 2008 movs r0, #8 8023ef4: f7fd f95a bl 80211ac - HAL_Delay(1000); - 8023ef8: f44f 707a mov.w r0, #1000 ; 0x3e8 - 8023efc: f002 f856 bl 8025fac + HAL_Delay(2000); + 8023ef8: f44f 60fa mov.w r0, #2000 ; 0x7d0 + 8023efc: f002 f86e bl 8025fdc + + GF_BSP_GPIO_SetIO(7,0);/*下降*/ + 8023f00: 2100 movs r1, #0 + 8023f02: 2007 movs r0, #7 + 8023f04: f7fd f952 bl 80211ac + GF_BSP_GPIO_SetIO(8,1); + 8023f08: 2101 movs r1, #1 + 8023f0a: 2008 movs r0, #8 + 8023f0c: f7fd f94e bl 80211ac + HAL_Delay(2000); + 8023f10: f44f 60fa mov.w r0, #2000 ; 0x7d0 + 8023f14: f002 f862 bl 8025fdc + + GF_BSP_GPIO_SetIO(7,1);/*停*/ + 8023f18: 2101 movs r1, #1 + 8023f1a: 2007 movs r0, #7 + 8023f1c: f7fd f946 bl 80211ac + GF_BSP_GPIO_SetIO(8,1); + 8023f20: 2101 movs r1, #1 + 8023f22: 2008 movs r0, #8 + 8023f24: f7fd f942 bl 80211ac + HAL_Delay(2000); + 8023f28: f44f 60fa mov.w r0, #2000 ; 0x7d0 + 8023f2c: f002 f856 bl 8025fdc memset(InputInfo, '\0', sizeof(InputInfo)); - 8023f00: 463b mov r3, r7 - 8023f02: f44f 72fa mov.w r2, #500 ; 0x1f4 - 8023f06: 2100 movs r1, #0 - 8023f08: 4618 mov r0, r3 - 8023f0a: f01c fd01 bl 8040910 + 8023f30: 463b mov r3, r7 + 8023f32: f44f 72fa mov.w r2, #500 ; 0x1f4 + 8023f36: 2100 movs r1, #0 + 8023f38: 4618 mov r0, r3 + 8023f3a: f01c fd01 bl 8040940 sprintf(InputInfo, "the Values of sbus are: \tCH0_RY_H :%d, \tCH1_RY_V :%d \tCH2_LY_V :%d \tCH3_LY_H :%d", P_MK32->CH0_RY_H, P_MK32->CH1_RY_V, P_MK32->CH2_LY_V, - 8023f0e: 4b75 ldr r3, [pc, #468] ; (80240e4 ) - 8023f10: 681b ldr r3, [r3, #0] + 8023f3e: 4b75 ldr r3, [pc, #468] ; (8024114 ) + 8023f40: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023f12: 6859 ldr r1, [r3, #4] + 8023f42: 6859 ldr r1, [r3, #4] P_MK32->CH0_RY_H, P_MK32->CH1_RY_V, P_MK32->CH2_LY_V, - 8023f14: 4b73 ldr r3, [pc, #460] ; (80240e4 ) - 8023f16: 681b ldr r3, [r3, #0] + 8023f44: 4b73 ldr r3, [pc, #460] ; (8024114 ) + 8023f46: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023f18: 689c ldr r4, [r3, #8] + 8023f48: 689c ldr r4, [r3, #8] P_MK32->CH0_RY_H, P_MK32->CH1_RY_V, P_MK32->CH2_LY_V, - 8023f1a: 4b72 ldr r3, [pc, #456] ; (80240e4 ) - 8023f1c: 681b ldr r3, [r3, #0] + 8023f4a: 4b72 ldr r3, [pc, #456] ; (8024114 ) + 8023f4c: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023f1e: 68db ldr r3, [r3, #12] + 8023f4e: 68db ldr r3, [r3, #12] P_MK32->CH3_LY_H); - 8023f20: 4a70 ldr r2, [pc, #448] ; (80240e4 ) - 8023f22: 6812 ldr r2, [r2, #0] + 8023f50: 4a70 ldr r2, [pc, #448] ; (8024114 ) + 8023f52: 6812 ldr r2, [r2, #0] sprintf(InputInfo, - 8023f24: 6912 ldr r2, [r2, #16] - 8023f26: 4638 mov r0, r7 - 8023f28: 9201 str r2, [sp, #4] - 8023f2a: 9300 str r3, [sp, #0] - 8023f2c: 4623 mov r3, r4 - 8023f2e: 460a mov r2, r1 - 8023f30: 4972 ldr r1, [pc, #456] ; (80240fc ) - 8023f32: f01c fe3b bl 8040bac + 8023f54: 6912 ldr r2, [r2, #16] + 8023f56: 4638 mov r0, r7 + 8023f58: 9201 str r2, [sp, #4] + 8023f5a: 9300 str r3, [sp, #0] + 8023f5c: 4623 mov r3, r4 + 8023f5e: 460a mov r2, r1 + 8023f60: 4972 ldr r1, [pc, #456] ; (802412c ) + 8023f62: f01c fe3b bl 8040bdc LOGL(DL_INFO, InputInfo); - 8023f36: 4b65 ldr r3, [pc, #404] ; (80240cc ) - 8023f38: 781b ldrb r3, [r3, #0] - 8023f3a: 2b03 cmp r3, #3 - 8023f3c: d918 bls.n 8023f70 - 8023f3e: 2330 movs r3, #48 ; 0x30 - 8023f40: 061a lsls r2, r3, #24 - 8023f42: 2330 movs r3, #48 ; 0x30 - 8023f44: 041b lsls r3, r3, #16 - 8023f46: 431a orrs r2, r3 - 8023f48: 2330 movs r3, #48 ; 0x30 - 8023f4a: 021b lsls r3, r3, #8 - 8023f4c: 4313 orrs r3, r2 - 8023f4e: 2230 movs r2, #48 ; 0x30 - 8023f50: ea43 0102 orr.w r1, r3, r2 - 8023f54: 2344 movs r3, #68 ; 0x44 - 8023f56: 061a lsls r2, r3, #24 - 8023f58: 2346 movs r3, #70 ; 0x46 - 8023f5a: 041b lsls r3, r3, #16 - 8023f5c: 431a orrs r2, r3 - 8023f5e: 234c movs r3, #76 ; 0x4c - 8023f60: 021b lsls r3, r3, #8 - 8023f62: 4313 orrs r3, r2 - 8023f64: 2254 movs r2, #84 ; 0x54 - 8023f66: 431a orrs r2, r3 - 8023f68: 463b mov r3, r7 - 8023f6a: 2004 movs r0, #4 - 8023f6c: f7fe fcb0 bl 80228d0 + 8023f66: 4b65 ldr r3, [pc, #404] ; (80240fc ) + 8023f68: 781b ldrb r3, [r3, #0] + 8023f6a: 2b03 cmp r3, #3 + 8023f6c: d918 bls.n 8023fa0 + 8023f6e: 2330 movs r3, #48 ; 0x30 + 8023f70: 061a lsls r2, r3, #24 + 8023f72: 2330 movs r3, #48 ; 0x30 + 8023f74: 041b lsls r3, r3, #16 + 8023f76: 431a orrs r2, r3 + 8023f78: 2330 movs r3, #48 ; 0x30 + 8023f7a: 021b lsls r3, r3, #8 + 8023f7c: 4313 orrs r3, r2 + 8023f7e: 2230 movs r2, #48 ; 0x30 + 8023f80: ea43 0102 orr.w r1, r3, r2 + 8023f84: 2344 movs r3, #68 ; 0x44 + 8023f86: 061a lsls r2, r3, #24 + 8023f88: 2346 movs r3, #70 ; 0x46 + 8023f8a: 041b lsls r3, r3, #16 + 8023f8c: 431a orrs r2, r3 + 8023f8e: 234c movs r3, #76 ; 0x4c + 8023f90: 021b lsls r3, r3, #8 + 8023f92: 4313 orrs r3, r2 + 8023f94: 2254 movs r2, #84 ; 0x54 + 8023f96: 431a orrs r2, r3 + 8023f98: 463b mov r3, r7 + 8023f9a: 2004 movs r0, #4 + 8023f9c: f7fe fc98 bl 80228d0 memset(InputInfo, '\0', sizeof(InputInfo)); - 8023f70: 463b mov r3, r7 - 8023f72: f44f 72fa mov.w r2, #500 ; 0x1f4 - 8023f76: 2100 movs r1, #0 - 8023f78: 4618 mov r0, r3 - 8023f7a: f01c fcc9 bl 8040910 + 8023fa0: 463b mov r3, r7 + 8023fa2: f44f 72fa mov.w r2, #500 ; 0x1f4 + 8023fa6: 2100 movs r1, #0 + 8023fa8: 4618 mov r0, r3 + 8023faa: f01c fcc9 bl 8040940 sprintf(InputInfo, "the Values of sbus are: \t CH4_SA :%d, \t CH5_SB :%d \t CH6_SC :%d \t CH7_SD :%d", P_MK32->CH4_SA, P_MK32->CH5_SB, P_MK32->CH6_SC, P_MK32->CH7_SD); - 8023f7e: 4b59 ldr r3, [pc, #356] ; (80240e4 ) - 8023f80: 681b ldr r3, [r3, #0] + 8023fae: 4b59 ldr r3, [pc, #356] ; (8024114 ) + 8023fb0: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023f82: 6959 ldr r1, [r3, #20] + 8023fb2: 6959 ldr r1, [r3, #20] P_MK32->CH4_SA, P_MK32->CH5_SB, P_MK32->CH6_SC, P_MK32->CH7_SD); - 8023f84: 4b57 ldr r3, [pc, #348] ; (80240e4 ) - 8023f86: 681b ldr r3, [r3, #0] + 8023fb4: 4b57 ldr r3, [pc, #348] ; (8024114 ) + 8023fb6: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023f88: 699c ldr r4, [r3, #24] + 8023fb8: 699c ldr r4, [r3, #24] P_MK32->CH4_SA, P_MK32->CH5_SB, P_MK32->CH6_SC, P_MK32->CH7_SD); - 8023f8a: 4b56 ldr r3, [pc, #344] ; (80240e4 ) - 8023f8c: 681b ldr r3, [r3, #0] + 8023fba: 4b56 ldr r3, [pc, #344] ; (8024114 ) + 8023fbc: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023f8e: 69db ldr r3, [r3, #28] + 8023fbe: 69db ldr r3, [r3, #28] P_MK32->CH4_SA, P_MK32->CH5_SB, P_MK32->CH6_SC, P_MK32->CH7_SD); - 8023f90: 4a54 ldr r2, [pc, #336] ; (80240e4 ) - 8023f92: 6812 ldr r2, [r2, #0] + 8023fc0: 4a54 ldr r2, [pc, #336] ; (8024114 ) + 8023fc2: 6812 ldr r2, [r2, #0] sprintf(InputInfo, - 8023f94: 6a12 ldr r2, [r2, #32] - 8023f96: 4638 mov r0, r7 - 8023f98: 9201 str r2, [sp, #4] - 8023f9a: 9300 str r3, [sp, #0] - 8023f9c: 4623 mov r3, r4 - 8023f9e: 460a mov r2, r1 - 8023fa0: 4957 ldr r1, [pc, #348] ; (8024100 ) - 8023fa2: f01c fe03 bl 8040bac + 8023fc4: 6a12 ldr r2, [r2, #32] + 8023fc6: 4638 mov r0, r7 + 8023fc8: 9201 str r2, [sp, #4] + 8023fca: 9300 str r3, [sp, #0] + 8023fcc: 4623 mov r3, r4 + 8023fce: 460a mov r2, r1 + 8023fd0: 4957 ldr r1, [pc, #348] ; (8024130 ) + 8023fd2: f01c fe03 bl 8040bdc LOGL(DL_INFO, InputInfo); - 8023fa6: 4b49 ldr r3, [pc, #292] ; (80240cc ) - 8023fa8: 781b ldrb r3, [r3, #0] - 8023faa: 2b03 cmp r3, #3 - 8023fac: d918 bls.n 8023fe0 - 8023fae: 2330 movs r3, #48 ; 0x30 - 8023fb0: 061a lsls r2, r3, #24 - 8023fb2: 2330 movs r3, #48 ; 0x30 - 8023fb4: 041b lsls r3, r3, #16 - 8023fb6: 431a orrs r2, r3 - 8023fb8: 2330 movs r3, #48 ; 0x30 - 8023fba: 021b lsls r3, r3, #8 - 8023fbc: 4313 orrs r3, r2 - 8023fbe: 2230 movs r2, #48 ; 0x30 - 8023fc0: ea43 0102 orr.w r1, r3, r2 - 8023fc4: 2344 movs r3, #68 ; 0x44 - 8023fc6: 061a lsls r2, r3, #24 - 8023fc8: 2346 movs r3, #70 ; 0x46 - 8023fca: 041b lsls r3, r3, #16 - 8023fcc: 431a orrs r2, r3 - 8023fce: 234c movs r3, #76 ; 0x4c - 8023fd0: 021b lsls r3, r3, #8 - 8023fd2: 4313 orrs r3, r2 - 8023fd4: 2254 movs r2, #84 ; 0x54 - 8023fd6: 431a orrs r2, r3 - 8023fd8: 463b mov r3, r7 - 8023fda: 2004 movs r0, #4 - 8023fdc: f7fe fc78 bl 80228d0 + 8023fd6: 4b49 ldr r3, [pc, #292] ; (80240fc ) + 8023fd8: 781b ldrb r3, [r3, #0] + 8023fda: 2b03 cmp r3, #3 + 8023fdc: d918 bls.n 8024010 + 8023fde: 2330 movs r3, #48 ; 0x30 + 8023fe0: 061a lsls r2, r3, #24 + 8023fe2: 2330 movs r3, #48 ; 0x30 + 8023fe4: 041b lsls r3, r3, #16 + 8023fe6: 431a orrs r2, r3 + 8023fe8: 2330 movs r3, #48 ; 0x30 + 8023fea: 021b lsls r3, r3, #8 + 8023fec: 4313 orrs r3, r2 + 8023fee: 2230 movs r2, #48 ; 0x30 + 8023ff0: ea43 0102 orr.w r1, r3, r2 + 8023ff4: 2344 movs r3, #68 ; 0x44 + 8023ff6: 061a lsls r2, r3, #24 + 8023ff8: 2346 movs r3, #70 ; 0x46 + 8023ffa: 041b lsls r3, r3, #16 + 8023ffc: 431a orrs r2, r3 + 8023ffe: 234c movs r3, #76 ; 0x4c + 8024000: 021b lsls r3, r3, #8 + 8024002: 4313 orrs r3, r2 + 8024004: 2254 movs r2, #84 ; 0x54 + 8024006: 431a orrs r2, r3 + 8024008: 463b mov r3, r7 + 802400a: 2004 movs r0, #4 + 802400c: f7fe fc60 bl 80228d0 memset(InputInfo, '\0', sizeof(InputInfo)); - 8023fe0: 463b mov r3, r7 - 8023fe2: f44f 72fa mov.w r2, #500 ; 0x1f4 - 8023fe6: 2100 movs r1, #0 - 8023fe8: 4618 mov r0, r3 - 8023fea: f01c fc91 bl 8040910 + 8024010: 463b mov r3, r7 + 8024012: f44f 72fa mov.w r2, #500 ; 0x1f4 + 8024016: 2100 movs r1, #0 + 8024018: 4618 mov r0, r3 + 802401a: f01c fc91 bl 8040940 sprintf(InputInfo, "the Values of sbus are: \t CH8_SE :%d, \t CH9_SF :%d \t CH10_LD1 :%d \t CH11_RD1 :%d", P_MK32->CH8_SE, P_MK32->CH9_SF, P_MK32->CH10_LD1, - 8023fee: 4b3d ldr r3, [pc, #244] ; (80240e4 ) - 8023ff0: 681b ldr r3, [r3, #0] + 802401e: 4b3d ldr r3, [pc, #244] ; (8024114 ) + 8024020: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023ff2: 6a59 ldr r1, [r3, #36] ; 0x24 + 8024022: 6a59 ldr r1, [r3, #36] ; 0x24 P_MK32->CH8_SE, P_MK32->CH9_SF, P_MK32->CH10_LD1, - 8023ff4: 4b3b ldr r3, [pc, #236] ; (80240e4 ) - 8023ff6: 681b ldr r3, [r3, #0] + 8024024: 4b3b ldr r3, [pc, #236] ; (8024114 ) + 8024026: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023ff8: 6a9c ldr r4, [r3, #40] ; 0x28 + 8024028: 6a9c ldr r4, [r3, #40] ; 0x28 P_MK32->CH8_SE, P_MK32->CH9_SF, P_MK32->CH10_LD1, - 8023ffa: 4b3a ldr r3, [pc, #232] ; (80240e4 ) - 8023ffc: 681b ldr r3, [r3, #0] + 802402a: 4b3a ldr r3, [pc, #232] ; (8024114 ) + 802402c: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023ffe: 6adb ldr r3, [r3, #44] ; 0x2c + 802402e: 6adb ldr r3, [r3, #44] ; 0x2c P_MK32->CH11_RD1); - 8024000: 4a38 ldr r2, [pc, #224] ; (80240e4 ) - 8024002: 6812 ldr r2, [r2, #0] + 8024030: 4a38 ldr r2, [pc, #224] ; (8024114 ) + 8024032: 6812 ldr r2, [r2, #0] sprintf(InputInfo, - 8024004: 6b12 ldr r2, [r2, #48] ; 0x30 - 8024006: 4638 mov r0, r7 - 8024008: 9201 str r2, [sp, #4] - 802400a: 9300 str r3, [sp, #0] - 802400c: 4623 mov r3, r4 - 802400e: 460a mov r2, r1 - 8024010: 493c ldr r1, [pc, #240] ; (8024104 ) - 8024012: f01c fdcb bl 8040bac + 8024034: 6b12 ldr r2, [r2, #48] ; 0x30 + 8024036: 4638 mov r0, r7 + 8024038: 9201 str r2, [sp, #4] + 802403a: 9300 str r3, [sp, #0] + 802403c: 4623 mov r3, r4 + 802403e: 460a mov r2, r1 + 8024040: 493c ldr r1, [pc, #240] ; (8024134 ) + 8024042: f01c fdcb bl 8040bdc LOGL(DL_INFO, InputInfo); - 8024016: 4b2d ldr r3, [pc, #180] ; (80240cc ) - 8024018: 781b ldrb r3, [r3, #0] - 802401a: 2b03 cmp r3, #3 - 802401c: d918 bls.n 8024050 - 802401e: 2330 movs r3, #48 ; 0x30 - 8024020: 061a lsls r2, r3, #24 - 8024022: 2330 movs r3, #48 ; 0x30 - 8024024: 041b lsls r3, r3, #16 - 8024026: 431a orrs r2, r3 - 8024028: 2330 movs r3, #48 ; 0x30 - 802402a: 021b lsls r3, r3, #8 - 802402c: 4313 orrs r3, r2 - 802402e: 2230 movs r2, #48 ; 0x30 - 8024030: ea43 0102 orr.w r1, r3, r2 - 8024034: 2344 movs r3, #68 ; 0x44 - 8024036: 061a lsls r2, r3, #24 - 8024038: 2346 movs r3, #70 ; 0x46 - 802403a: 041b lsls r3, r3, #16 - 802403c: 431a orrs r2, r3 - 802403e: 234c movs r3, #76 ; 0x4c - 8024040: 021b lsls r3, r3, #8 - 8024042: 4313 orrs r3, r2 - 8024044: 2254 movs r2, #84 ; 0x54 - 8024046: 431a orrs r2, r3 - 8024048: 463b mov r3, r7 - 802404a: 2004 movs r0, #4 - 802404c: f7fe fc40 bl 80228d0 + 8024046: 4b2d ldr r3, [pc, #180] ; (80240fc ) + 8024048: 781b ldrb r3, [r3, #0] + 802404a: 2b03 cmp r3, #3 + 802404c: d918 bls.n 8024080 + 802404e: 2330 movs r3, #48 ; 0x30 + 8024050: 061a lsls r2, r3, #24 + 8024052: 2330 movs r3, #48 ; 0x30 + 8024054: 041b lsls r3, r3, #16 + 8024056: 431a orrs r2, r3 + 8024058: 2330 movs r3, #48 ; 0x30 + 802405a: 021b lsls r3, r3, #8 + 802405c: 4313 orrs r3, r2 + 802405e: 2230 movs r2, #48 ; 0x30 + 8024060: ea43 0102 orr.w r1, r3, r2 + 8024064: 2344 movs r3, #68 ; 0x44 + 8024066: 061a lsls r2, r3, #24 + 8024068: 2346 movs r3, #70 ; 0x46 + 802406a: 041b lsls r3, r3, #16 + 802406c: 431a orrs r2, r3 + 802406e: 234c movs r3, #76 ; 0x4c + 8024070: 021b lsls r3, r3, #8 + 8024072: 4313 orrs r3, r2 + 8024074: 2254 movs r2, #84 ; 0x54 + 8024076: 431a orrs r2, r3 + 8024078: 463b mov r3, r7 + 802407a: 2004 movs r0, #4 + 802407c: f7fe fc28 bl 80228d0 memset(InputInfo, '\0', sizeof(InputInfo)); - 8024050: 463b mov r3, r7 - 8024052: f44f 72fa mov.w r2, #500 ; 0x1f4 - 8024056: 2100 movs r1, #0 - 8024058: 4618 mov r0, r3 - 802405a: f01c fc59 bl 8040910 + 8024080: 463b mov r3, r7 + 8024082: f44f 72fa mov.w r2, #500 ; 0x1f4 + 8024086: 2100 movs r1, #0 + 8024088: 4618 mov r0, r3 + 802408a: f01c fc59 bl 8040940 sprintf(InputInfo, "the Values of sbus are: \t CH12_S1 :%d, \t CH13_S2 :%d \t CH14_LT :%d \t CH15_RT :%d \t IsOnline :%d", P_MK32->CH12_S1, P_MK32->CH13_S2, P_MK32->CH14_LT, - 802405e: 4b21 ldr r3, [pc, #132] ; (80240e4 ) - 8024060: 681b ldr r3, [r3, #0] + 802408e: 4b21 ldr r3, [pc, #132] ; (8024114 ) + 8024090: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8024062: 6b5c ldr r4, [r3, #52] ; 0x34 + 8024092: 6b5c ldr r4, [r3, #52] ; 0x34 P_MK32->CH12_S1, P_MK32->CH13_S2, P_MK32->CH14_LT, - 8024064: 4b1f ldr r3, [pc, #124] ; (80240e4 ) - 8024066: 681b ldr r3, [r3, #0] + 8024094: 4b1f ldr r3, [pc, #124] ; (8024114 ) + 8024096: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8024068: 6b9d ldr r5, [r3, #56] ; 0x38 + 8024098: 6b9d ldr r5, [r3, #56] ; 0x38 P_MK32->CH12_S1, P_MK32->CH13_S2, P_MK32->CH14_LT, - 802406a: 4b1e ldr r3, [pc, #120] ; (80240e4 ) - 802406c: 681b ldr r3, [r3, #0] + 802409a: 4b1e ldr r3, [pc, #120] ; (8024114 ) + 802409c: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 802406e: 6bdb ldr r3, [r3, #60] ; 0x3c + 802409e: 6bdb ldr r3, [r3, #60] ; 0x3c P_MK32->CH15_RT, P_MK32->IsOnline); - 8024070: 4a1c ldr r2, [pc, #112] ; (80240e4 ) - 8024072: 6812 ldr r2, [r2, #0] + 80240a0: 4a1c ldr r2, [pc, #112] ; (8024114 ) + 80240a2: 6812 ldr r2, [r2, #0] sprintf(InputInfo, - 8024074: 6c12 ldr r2, [r2, #64] ; 0x40 + 80240a4: 6c12 ldr r2, [r2, #64] ; 0x40 P_MK32->CH15_RT, P_MK32->IsOnline); - 8024076: 491b ldr r1, [pc, #108] ; (80240e4 ) - 8024078: 6809 ldr r1, [r1, #0] + 80240a6: 491b ldr r1, [pc, #108] ; (8024114 ) + 80240a8: 6809 ldr r1, [r1, #0] sprintf(InputInfo, - 802407a: 6c49 ldr r1, [r1, #68] ; 0x44 - 802407c: 4638 mov r0, r7 - 802407e: 9102 str r1, [sp, #8] - 8024080: 9201 str r2, [sp, #4] - 8024082: 9300 str r3, [sp, #0] - 8024084: 462b mov r3, r5 - 8024086: 4622 mov r2, r4 - 8024088: 491f ldr r1, [pc, #124] ; (8024108 ) - 802408a: f01c fd8f bl 8040bac + 80240aa: 6c49 ldr r1, [r1, #68] ; 0x44 + 80240ac: 4638 mov r0, r7 + 80240ae: 9102 str r1, [sp, #8] + 80240b0: 9201 str r2, [sp, #4] + 80240b2: 9300 str r3, [sp, #0] + 80240b4: 462b mov r3, r5 + 80240b6: 4622 mov r2, r4 + 80240b8: 491f ldr r1, [pc, #124] ; (8024138 ) + 80240ba: f01c fd8f bl 8040bdc LOGL(DL_INFO, InputInfo); - 802408e: 4b0f ldr r3, [pc, #60] ; (80240cc ) - 8024090: 781b ldrb r3, [r3, #0] - 8024092: 2b03 cmp r3, #3 - 8024094: f67f aef0 bls.w 8023e78 - 8024098: 2330 movs r3, #48 ; 0x30 - 802409a: 061a lsls r2, r3, #24 - 802409c: 2330 movs r3, #48 ; 0x30 - 802409e: 041b lsls r3, r3, #16 - 80240a0: 431a orrs r2, r3 - 80240a2: 2330 movs r3, #48 ; 0x30 - 80240a4: 021b lsls r3, r3, #8 - 80240a6: 4313 orrs r3, r2 - 80240a8: 2230 movs r2, #48 ; 0x30 - 80240aa: ea43 0102 orr.w r1, r3, r2 - 80240ae: 2344 movs r3, #68 ; 0x44 - 80240b0: 061a lsls r2, r3, #24 - 80240b2: 2346 movs r3, #70 ; 0x46 - 80240b4: 041b lsls r3, r3, #16 - 80240b6: 431a orrs r2, r3 - 80240b8: 234c movs r3, #76 ; 0x4c - 80240ba: 021b lsls r3, r3, #8 - 80240bc: 4313 orrs r3, r2 - 80240be: 2254 movs r2, #84 ; 0x54 - 80240c0: 431a orrs r2, r3 - 80240c2: 463b mov r3, r7 - 80240c4: 2004 movs r0, #4 - 80240c6: f7fe fc03 bl 80228d0 + 80240be: 4b0f ldr r3, [pc, #60] ; (80240fc ) + 80240c0: 781b ldrb r3, [r3, #0] + 80240c2: 2b03 cmp r3, #3 + 80240c4: f67f aed8 bls.w 8023e78 + 80240c8: 2330 movs r3, #48 ; 0x30 + 80240ca: 061a lsls r2, r3, #24 + 80240cc: 2330 movs r3, #48 ; 0x30 + 80240ce: 041b lsls r3, r3, #16 + 80240d0: 431a orrs r2, r3 + 80240d2: 2330 movs r3, #48 ; 0x30 + 80240d4: 021b lsls r3, r3, #8 + 80240d6: 4313 orrs r3, r2 + 80240d8: 2230 movs r2, #48 ; 0x30 + 80240da: ea43 0102 orr.w r1, r3, r2 + 80240de: 2344 movs r3, #68 ; 0x44 + 80240e0: 061a lsls r2, r3, #24 + 80240e2: 2346 movs r3, #70 ; 0x46 + 80240e4: 041b lsls r3, r3, #16 + 80240e6: 431a orrs r2, r3 + 80240e8: 234c movs r3, #76 ; 0x4c + 80240ea: 021b lsls r3, r3, #8 + 80240ec: 4313 orrs r3, r2 + 80240ee: 2254 movs r2, #84 ; 0x54 + 80240f0: 431a orrs r2, r3 + 80240f2: 463b mov r3, r7 + 80240f4: 2004 movs r0, #4 + 80240f6: f7fe fbeb bl 80228d0 if (HAL_GetTick() - ledTick >= 3000) /*led翻转,表示程序运行状�?????*/ - 80240ca: e6d5 b.n 8023e78 - 80240cc: 24009bb4 .word 0x24009bb4 - 80240d0: 24005a5c .word 0x24005a5c - 80240d4: 24000038 .word 0x24000038 - 80240d8: 2400003c .word 0x2400003c - 80240dc: 24000040 .word 0x24000040 - 80240e0: 24000044 .word 0x24000044 - 80240e4: 2400ad04 .word 0x2400ad04 - 80240e8: 24000140 .word 0x24000140 - 80240ec: 2400af28 .word 0x2400af28 - 80240f0: 58020800 .word 0x58020800 - 80240f4: 58020400 .word 0x58020400 - 80240f8: 58021000 .word 0x58021000 - 80240fc: 080420f4 .word 0x080420f4 - 8024100: 08042148 .word 0x08042148 - 8024104: 08042198 .word 0x08042198 - 8024108: 080421ec .word 0x080421ec - -0802410c : + 80240fa: e6bd b.n 8023e78 + 80240fc: 24009bb4 .word 0x24009bb4 + 8024100: 24005a5c .word 0x24005a5c + 8024104: 24000038 .word 0x24000038 + 8024108: 2400003c .word 0x2400003c + 802410c: 24000040 .word 0x24000040 + 8024110: 24000044 .word 0x24000044 + 8024114: 2400ad04 .word 0x2400ad04 + 8024118: 24000140 .word 0x24000140 + 802411c: 2400af28 .word 0x2400af28 + 8024120: 58020800 .word 0x58020800 + 8024124: 58020400 .word 0x58020400 + 8024128: 58021000 .word 0x58021000 + 802412c: 08042124 .word 0x08042124 + 8024130: 08042178 .word 0x08042178 + 8024134: 080421c8 .word 0x080421c8 + 8024138: 0804221c .word 0x0804221c + +0802413c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 802410c: b580 push {r7, lr} - 802410e: b09c sub sp, #112 ; 0x70 - 8024110: af00 add r7, sp, #0 + 802413c: b580 push {r7, lr} + 802413e: b09c sub sp, #112 ; 0x70 + 8024140: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8024112: f107 0324 add.w r3, r7, #36 ; 0x24 - 8024116: 224c movs r2, #76 ; 0x4c - 8024118: 2100 movs r1, #0 - 802411a: 4618 mov r0, r3 - 802411c: f01c fbf8 bl 8040910 + 8024142: f107 0324 add.w r3, r7, #36 ; 0x24 + 8024146: 224c movs r2, #76 ; 0x4c + 8024148: 2100 movs r1, #0 + 802414a: 4618 mov r0, r3 + 802414c: f01c fbf8 bl 8040940 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8024120: 1d3b adds r3, r7, #4 - 8024122: 2220 movs r2, #32 - 8024124: 2100 movs r1, #0 - 8024126: 4618 mov r0, r3 - 8024128: f01c fbf2 bl 8040910 + 8024150: 1d3b adds r3, r7, #4 + 8024152: 2220 movs r2, #32 + 8024154: 2100 movs r1, #0 + 8024156: 4618 mov r0, r3 + 8024158: f01c fbf2 bl 8040940 /** Supply configuration update enable */ HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); - 802412c: 2002 movs r0, #2 - 802412e: f00a fb3d bl 802e7ac + 802415c: 2002 movs r0, #2 + 802415e: f00a fb3d bl 802e7dc /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8024132: 2300 movs r3, #0 - 8024134: 603b str r3, [r7, #0] - 8024136: 4b34 ldr r3, [pc, #208] ; (8024208 ) - 8024138: 6adb ldr r3, [r3, #44] ; 0x2c - 802413a: 4a33 ldr r2, [pc, #204] ; (8024208 ) - 802413c: f023 0301 bic.w r3, r3, #1 - 8024140: 62d3 str r3, [r2, #44] ; 0x2c - 8024142: 4b31 ldr r3, [pc, #196] ; (8024208 ) - 8024144: 6adb ldr r3, [r3, #44] ; 0x2c - 8024146: f003 0301 and.w r3, r3, #1 - 802414a: 603b str r3, [r7, #0] - 802414c: 4b2f ldr r3, [pc, #188] ; (802420c ) - 802414e: 699b ldr r3, [r3, #24] - 8024150: 4a2e ldr r2, [pc, #184] ; (802420c ) - 8024152: f443 4340 orr.w r3, r3, #49152 ; 0xc000 - 8024156: 6193 str r3, [r2, #24] - 8024158: 4b2c ldr r3, [pc, #176] ; (802420c ) - 802415a: 699b ldr r3, [r3, #24] - 802415c: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8024160: 603b str r3, [r7, #0] - 8024162: 683b ldr r3, [r7, #0] + 8024162: 2300 movs r3, #0 + 8024164: 603b str r3, [r7, #0] + 8024166: 4b34 ldr r3, [pc, #208] ; (8024238 ) + 8024168: 6adb ldr r3, [r3, #44] ; 0x2c + 802416a: 4a33 ldr r2, [pc, #204] ; (8024238 ) + 802416c: f023 0301 bic.w r3, r3, #1 + 8024170: 62d3 str r3, [r2, #44] ; 0x2c + 8024172: 4b31 ldr r3, [pc, #196] ; (8024238 ) + 8024174: 6adb ldr r3, [r3, #44] ; 0x2c + 8024176: f003 0301 and.w r3, r3, #1 + 802417a: 603b str r3, [r7, #0] + 802417c: 4b2f ldr r3, [pc, #188] ; (802423c ) + 802417e: 699b ldr r3, [r3, #24] + 8024180: 4a2e ldr r2, [pc, #184] ; (802423c ) + 8024182: f443 4340 orr.w r3, r3, #49152 ; 0xc000 + 8024186: 6193 str r3, [r2, #24] + 8024188: 4b2c ldr r3, [pc, #176] ; (802423c ) + 802418a: 699b ldr r3, [r3, #24] + 802418c: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8024190: 603b str r3, [r7, #0] + 8024192: 683b ldr r3, [r7, #0] while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} - 8024164: bf00 nop - 8024166: 4b29 ldr r3, [pc, #164] ; (802420c ) - 8024168: 699b ldr r3, [r3, #24] - 802416a: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 802416e: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8024172: d1f8 bne.n 8024166 + 8024194: bf00 nop + 8024196: 4b29 ldr r3, [pc, #164] ; (802423c ) + 8024198: 699b ldr r3, [r3, #24] + 802419a: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 802419e: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 80241a2: d1f8 bne.n 8024196 /** Macro to configure the PLL clock source */ __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE); - 8024174: 4b26 ldr r3, [pc, #152] ; (8024210 ) - 8024176: 6a9b ldr r3, [r3, #40] ; 0x28 - 8024178: f023 0303 bic.w r3, r3, #3 - 802417c: 4a24 ldr r2, [pc, #144] ; (8024210 ) - 802417e: f043 0302 orr.w r3, r3, #2 - 8024182: 6293 str r3, [r2, #40] ; 0x28 + 80241a4: 4b26 ldr r3, [pc, #152] ; (8024240 ) + 80241a6: 6a9b ldr r3, [r3, #40] ; 0x28 + 80241a8: f023 0303 bic.w r3, r3, #3 + 80241ac: 4a24 ldr r2, [pc, #144] ; (8024240 ) + 80241ae: f043 0302 orr.w r3, r3, #2 + 80241b2: 6293 str r3, [r2, #40] ; 0x28 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8024184: 2301 movs r3, #1 - 8024186: 627b str r3, [r7, #36] ; 0x24 + 80241b4: 2301 movs r3, #1 + 80241b6: 627b str r3, [r7, #36] ; 0x24 RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8024188: f44f 3380 mov.w r3, #65536 ; 0x10000 - 802418c: 62bb str r3, [r7, #40] ; 0x28 + 80241b8: f44f 3380 mov.w r3, #65536 ; 0x10000 + 80241bc: 62bb str r3, [r7, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 802418e: 2302 movs r3, #2 - 8024190: 64bb str r3, [r7, #72] ; 0x48 + 80241be: 2302 movs r3, #2 + 80241c0: 64bb str r3, [r7, #72] ; 0x48 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 8024192: 2302 movs r3, #2 - 8024194: 64fb str r3, [r7, #76] ; 0x4c + 80241c2: 2302 movs r3, #2 + 80241c4: 64fb str r3, [r7, #76] ; 0x4c RCC_OscInitStruct.PLL.PLLM = 2; - 8024196: 2302 movs r3, #2 - 8024198: 653b str r3, [r7, #80] ; 0x50 + 80241c6: 2302 movs r3, #2 + 80241c8: 653b str r3, [r7, #80] ; 0x50 RCC_OscInitStruct.PLL.PLLN = 64; - 802419a: 2340 movs r3, #64 ; 0x40 - 802419c: 657b str r3, [r7, #84] ; 0x54 + 80241ca: 2340 movs r3, #64 ; 0x40 + 80241cc: 657b str r3, [r7, #84] ; 0x54 RCC_OscInitStruct.PLL.PLLP = 2; - 802419e: 2302 movs r3, #2 - 80241a0: 65bb str r3, [r7, #88] ; 0x58 + 80241ce: 2302 movs r3, #2 + 80241d0: 65bb str r3, [r7, #88] ; 0x58 RCC_OscInitStruct.PLL.PLLQ = 20; - 80241a2: 2314 movs r3, #20 - 80241a4: 65fb str r3, [r7, #92] ; 0x5c + 80241d2: 2314 movs r3, #20 + 80241d4: 65fb str r3, [r7, #92] ; 0x5c RCC_OscInitStruct.PLL.PLLR = 4; - 80241a6: 2304 movs r3, #4 - 80241a8: 663b str r3, [r7, #96] ; 0x60 + 80241d6: 2304 movs r3, #4 + 80241d8: 663b str r3, [r7, #96] ; 0x60 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; - 80241aa: 230c movs r3, #12 - 80241ac: 667b str r3, [r7, #100] ; 0x64 + 80241da: 230c movs r3, #12 + 80241dc: 667b str r3, [r7, #100] ; 0x64 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; - 80241ae: 2300 movs r3, #0 - 80241b0: 66bb str r3, [r7, #104] ; 0x68 + 80241de: 2300 movs r3, #0 + 80241e0: 66bb str r3, [r7, #104] ; 0x68 RCC_OscInitStruct.PLL.PLLFRACN = 0; - 80241b2: 2300 movs r3, #0 - 80241b4: 66fb str r3, [r7, #108] ; 0x6c + 80241e2: 2300 movs r3, #0 + 80241e4: 66fb str r3, [r7, #108] ; 0x6c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 80241b6: f107 0324 add.w r3, r7, #36 ; 0x24 - 80241ba: 4618 mov r0, r3 - 80241bc: f00a fe26 bl 802ee0c - 80241c0: 4603 mov r3, r0 - 80241c2: 2b00 cmp r3, #0 - 80241c4: d001 beq.n 80241ca + 80241e6: f107 0324 add.w r3, r7, #36 ; 0x24 + 80241ea: 4618 mov r0, r3 + 80241ec: f00a fe26 bl 802ee3c + 80241f0: 4603 mov r3, r0 + 80241f2: 2b00 cmp r3, #0 + 80241f4: d001 beq.n 80241fa { Error_Handler(); - 80241c6: f000 f899 bl 80242fc + 80241f6: f000 f899 bl 802432c } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 80241ca: 233f movs r3, #63 ; 0x3f - 80241cc: 607b str r3, [r7, #4] + 80241fa: 233f movs r3, #63 ; 0x3f + 80241fc: 607b str r3, [r7, #4] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 80241ce: 2303 movs r3, #3 - 80241d0: 60bb str r3, [r7, #8] + 80241fe: 2303 movs r3, #3 + 8024200: 60bb str r3, [r7, #8] RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; - 80241d2: 2300 movs r3, #0 - 80241d4: 60fb str r3, [r7, #12] + 8024202: 2300 movs r3, #0 + 8024204: 60fb str r3, [r7, #12] RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; - 80241d6: 2308 movs r3, #8 - 80241d8: 613b str r3, [r7, #16] + 8024206: 2308 movs r3, #8 + 8024208: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; - 80241da: 2340 movs r3, #64 ; 0x40 - 80241dc: 617b str r3, [r7, #20] + 802420a: 2340 movs r3, #64 ; 0x40 + 802420c: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; - 80241de: 2340 movs r3, #64 ; 0x40 - 80241e0: 61bb str r3, [r7, #24] + 802420e: 2340 movs r3, #64 ; 0x40 + 8024210: 61bb str r3, [r7, #24] RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; - 80241e2: f44f 6380 mov.w r3, #1024 ; 0x400 - 80241e6: 61fb str r3, [r7, #28] + 8024212: f44f 6380 mov.w r3, #1024 ; 0x400 + 8024216: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - 80241e8: 2340 movs r3, #64 ; 0x40 - 80241ea: 623b str r3, [r7, #32] + 8024218: 2340 movs r3, #64 ; 0x40 + 802421a: 623b str r3, [r7, #32] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) - 80241ec: 1d3b adds r3, r7, #4 - 80241ee: 2102 movs r1, #2 - 80241f0: 4618 mov r0, r3 - 80241f2: f00b fa39 bl 802f668 - 80241f6: 4603 mov r3, r0 - 80241f8: 2b00 cmp r3, #0 - 80241fa: d001 beq.n 8024200 + 802421c: 1d3b adds r3, r7, #4 + 802421e: 2102 movs r1, #2 + 8024220: 4618 mov r0, r3 + 8024222: f00b fa39 bl 802f698 + 8024226: 4603 mov r3, r0 + 8024228: 2b00 cmp r3, #0 + 802422a: d001 beq.n 8024230 { Error_Handler(); - 80241fc: f000 f87e bl 80242fc + 802422c: f000 f87e bl 802432c } } - 8024200: bf00 nop - 8024202: 3770 adds r7, #112 ; 0x70 - 8024204: 46bd mov sp, r7 - 8024206: bd80 pop {r7, pc} - 8024208: 58000400 .word 0x58000400 - 802420c: 58024800 .word 0x58024800 - 8024210: 58024400 .word 0x58024400 + 8024230: bf00 nop + 8024232: 3770 adds r7, #112 ; 0x70 + 8024234: 46bd mov sp, r7 + 8024236: bd80 pop {r7, pc} + 8024238: 58000400 .word 0x58000400 + 802423c: 58024800 .word 0x58024800 + 8024240: 58024400 .word 0x58024400 -08024214 : +08024244 : /* USER CODE BEGIN 4 */ void CV_GV_Init() { - 8024214: b5b0 push {r4, r5, r7, lr} - 8024216: b08c sub sp, #48 ; 0x30 - 8024218: af00 add r7, sp, #0 + 8024244: b5b0 push {r4, r5, r7, lr} + 8024246: b08c sub sp, #48 ; 0x30 + 8024248: af00 add r7, sp, #0 CV = GF_BSP_EEPROM_Get_CV(); //Read CV - 802421a: 4c0c ldr r4, [pc, #48] ; (802424c ) - 802421c: 463b mov r3, r7 - 802421e: 4618 mov r0, r3 - 8024220: f7fc fcca bl 8020bb8 - 8024224: 4625 mov r5, r4 - 8024226: 463c mov r4, r7 - 8024228: cc0f ldmia r4!, {r0, r1, r2, r3} - 802422a: c50f stmia r5!, {r0, r1, r2, r3} - 802422c: cc0f ldmia r4!, {r0, r1, r2, r3} - 802422e: c50f stmia r5!, {r0, r1, r2, r3} - 8024230: e894 000f ldmia.w r4, {r0, r1, r2, r3} - 8024234: e885 000f stmia.w r5, {r0, r1, r2, r3} + 802424a: 4c0c ldr r4, [pc, #48] ; (802427c ) + 802424c: 463b mov r3, r7 + 802424e: 4618 mov r0, r3 + 8024250: f7fc fcb2 bl 8020bb8 + 8024254: 4625 mov r5, r4 + 8024256: 463c mov r4, r7 + 8024258: cc0f ldmia r4!, {r0, r1, r2, r3} + 802425a: c50f stmia r5!, {r0, r1, r2, r3} + 802425c: cc0f ldmia r4!, {r0, r1, r2, r3} + 802425e: c50f stmia r5!, {r0, r1, r2, r3} + 8024260: e894 000f ldmia.w r4, {r0, r1, r2, r3} + 8024264: e885 000f stmia.w r5, {r0, r1, r2, r3} tempature = &GV.Tempature; - 8024238: 4b05 ldr r3, [pc, #20] ; (8024250 ) - 802423a: 4a06 ldr r2, [pc, #24] ; (8024254 ) - 802423c: 601a str r2, [r3, #0] + 8024268: 4b05 ldr r3, [pc, #20] ; (8024280 ) + 802426a: 4a06 ldr r2, [pc, #24] ; (8024284 ) + 802426c: 601a str r2, [r3, #0] P_MK32 = &GV.P_MK32; - 802423e: 4b06 ldr r3, [pc, #24] ; (8024258 ) - 8024240: 4a06 ldr r2, [pc, #24] ; (802425c ) - 8024242: 601a str r2, [r3, #0] + 802426e: 4b06 ldr r3, [pc, #24] ; (8024288 ) + 8024270: 4a06 ldr r2, [pc, #24] ; (802428c ) + 8024272: 601a str r2, [r3, #0] //Air_Pressure = &GV.Air_Pressure; } - 8024244: bf00 nop - 8024246: 3730 adds r7, #48 ; 0x30 - 8024248: 46bd mov sp, r7 - 802424a: bdb0 pop {r4, r5, r7, pc} - 802424c: 24000100 .word 0x24000100 - 8024250: 24009b94 .word 0x24009b94 - 8024254: 24000138 .word 0x24000138 - 8024258: 2400ad04 .word 0x2400ad04 - 802425c: 24000140 .word 0x24000140 - -08024260 : + 8024274: bf00 nop + 8024276: 3730 adds r7, #48 ; 0x30 + 8024278: 46bd mov sp, r7 + 802427a: bdb0 pop {r4, r5, r7, pc} + 802427c: 24000100 .word 0x24000100 + 8024280: 24009b94 .word 0x24009b94 + 8024284: 24000138 .word 0x24000138 + 8024288: 2400ad04 .word 0x2400ad04 + 802428c: 24000140 .word 0x24000140 + +08024290 : /* USER CODE END 4 */ /* MPU Configuration */ void MPU_Config(void) { - 8024260: b580 push {r7, lr} - 8024262: b084 sub sp, #16 - 8024264: af00 add r7, sp, #0 + 8024290: b580 push {r7, lr} + 8024292: b084 sub sp, #16 + 8024294: af00 add r7, sp, #0 MPU_Region_InitTypeDef MPU_InitStruct = {0}; - 8024266: 463b mov r3, r7 - 8024268: 2200 movs r2, #0 - 802426a: 601a str r2, [r3, #0] - 802426c: 605a str r2, [r3, #4] - 802426e: 609a str r2, [r3, #8] - 8024270: 60da str r2, [r3, #12] + 8024296: 463b mov r3, r7 + 8024298: 2200 movs r2, #0 + 802429a: 601a str r2, [r3, #0] + 802429c: 605a str r2, [r3, #4] + 802429e: 609a str r2, [r3, #8] + 80242a0: 60da str r2, [r3, #12] /* Disables the MPU */ HAL_MPU_Disable(); - 8024272: f003 fbc3 bl 80279fc + 80242a2: f003 fbc3 bl 8027a2c /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Enable = MPU_REGION_ENABLE; - 8024276: 2301 movs r3, #1 - 8024278: 703b strb r3, [r7, #0] + 80242a6: 2301 movs r3, #1 + 80242a8: 703b strb r3, [r7, #0] MPU_InitStruct.Number = MPU_REGION_NUMBER0; - 802427a: 2300 movs r3, #0 - 802427c: 707b strb r3, [r7, #1] + 80242aa: 2300 movs r3, #0 + 80242ac: 707b strb r3, [r7, #1] MPU_InitStruct.BaseAddress = 0x30040000; - 802427e: 4b1d ldr r3, [pc, #116] ; (80242f4 ) - 8024280: 607b str r3, [r7, #4] + 80242ae: 4b1d ldr r3, [pc, #116] ; (8024324 ) + 80242b0: 607b str r3, [r7, #4] MPU_InitStruct.Size = MPU_REGION_SIZE_32KB; - 8024282: 230e movs r3, #14 - 8024284: 723b strb r3, [r7, #8] + 80242b2: 230e movs r3, #14 + 80242b4: 723b strb r3, [r7, #8] MPU_InitStruct.SubRegionDisable = 0x0; - 8024286: 2300 movs r3, #0 - 8024288: 727b strb r3, [r7, #9] + 80242b6: 2300 movs r3, #0 + 80242b8: 727b strb r3, [r7, #9] MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; - 802428a: 2301 movs r3, #1 - 802428c: 72bb strb r3, [r7, #10] + 80242ba: 2301 movs r3, #1 + 80242bc: 72bb strb r3, [r7, #10] MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; - 802428e: 2303 movs r3, #3 - 8024290: 72fb strb r3, [r7, #11] + 80242be: 2303 movs r3, #3 + 80242c0: 72fb strb r3, [r7, #11] MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE; - 8024292: 2301 movs r3, #1 - 8024294: 733b strb r3, [r7, #12] + 80242c2: 2301 movs r3, #1 + 80242c4: 733b strb r3, [r7, #12] MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - 8024296: 2300 movs r3, #0 - 8024298: 737b strb r3, [r7, #13] + 80242c6: 2300 movs r3, #0 + 80242c8: 737b strb r3, [r7, #13] MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; - 802429a: 2300 movs r3, #0 - 802429c: 73bb strb r3, [r7, #14] + 80242ca: 2300 movs r3, #0 + 80242cc: 73bb strb r3, [r7, #14] MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; - 802429e: 2300 movs r3, #0 - 80242a0: 73fb strb r3, [r7, #15] + 80242ce: 2300 movs r3, #0 + 80242d0: 73fb strb r3, [r7, #15] HAL_MPU_ConfigRegion(&MPU_InitStruct); - 80242a2: 463b mov r3, r7 - 80242a4: 4618 mov r0, r3 - 80242a6: f003 fbe1 bl 8027a6c + 80242d2: 463b mov r3, r7 + 80242d4: 4618 mov r0, r3 + 80242d6: f003 fbe1 bl 8027a9c /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Number = MPU_REGION_NUMBER1; - 80242aa: 2301 movs r3, #1 - 80242ac: 707b strb r3, [r7, #1] + 80242da: 2301 movs r3, #1 + 80242dc: 707b strb r3, [r7, #1] MPU_InitStruct.Size = MPU_REGION_SIZE_1KB; - 80242ae: 2309 movs r3, #9 - 80242b0: 723b strb r3, [r7, #8] + 80242de: 2309 movs r3, #9 + 80242e0: 723b strb r3, [r7, #8] MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; - 80242b2: 2300 movs r3, #0 - 80242b4: 72bb strb r3, [r7, #10] + 80242e2: 2300 movs r3, #0 + 80242e4: 72bb strb r3, [r7, #10] MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE; - 80242b6: 2301 movs r3, #1 - 80242b8: 737b strb r3, [r7, #13] + 80242e6: 2301 movs r3, #1 + 80242e8: 737b strb r3, [r7, #13] MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; - 80242ba: 2301 movs r3, #1 - 80242bc: 73fb strb r3, [r7, #15] + 80242ea: 2301 movs r3, #1 + 80242ec: 73fb strb r3, [r7, #15] HAL_MPU_ConfigRegion(&MPU_InitStruct); - 80242be: 463b mov r3, r7 - 80242c0: 4618 mov r0, r3 - 80242c2: f003 fbd3 bl 8027a6c + 80242ee: 463b mov r3, r7 + 80242f0: 4618 mov r0, r3 + 80242f2: f003 fbd3 bl 8027a9c /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Number = MPU_REGION_NUMBER2; - 80242c6: 2302 movs r3, #2 - 80242c8: 707b strb r3, [r7, #1] + 80242f6: 2302 movs r3, #2 + 80242f8: 707b strb r3, [r7, #1] MPU_InitStruct.BaseAddress = 0x30030000; - 80242ca: 4b0b ldr r3, [pc, #44] ; (80242f8 ) - 80242cc: 607b str r3, [r7, #4] + 80242fa: 4b0b ldr r3, [pc, #44] ; (8024328 ) + 80242fc: 607b str r3, [r7, #4] MPU_InitStruct.Size = MPU_REGION_SIZE_32KB; - 80242ce: 230e movs r3, #14 - 80242d0: 723b strb r3, [r7, #8] + 80242fe: 230e movs r3, #14 + 8024300: 723b strb r3, [r7, #8] MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; - 80242d2: 2301 movs r3, #1 - 80242d4: 72bb strb r3, [r7, #10] + 8024302: 2301 movs r3, #1 + 8024304: 72bb strb r3, [r7, #10] MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - 80242d6: 2300 movs r3, #0 - 80242d8: 737b strb r3, [r7, #13] + 8024306: 2300 movs r3, #0 + 8024308: 737b strb r3, [r7, #13] MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; - 80242da: 2300 movs r3, #0 - 80242dc: 73fb strb r3, [r7, #15] + 802430a: 2300 movs r3, #0 + 802430c: 73fb strb r3, [r7, #15] HAL_MPU_ConfigRegion(&MPU_InitStruct); - 80242de: 463b mov r3, r7 - 80242e0: 4618 mov r0, r3 - 80242e2: f003 fbc3 bl 8027a6c + 802430e: 463b mov r3, r7 + 8024310: 4618 mov r0, r3 + 8024312: f003 fbc3 bl 8027a9c /* Enables the MPU */ HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); - 80242e6: 2004 movs r0, #4 - 80242e8: f003 fba0 bl 8027a2c + 8024316: 2004 movs r0, #4 + 8024318: f003 fba0 bl 8027a5c } - 80242ec: bf00 nop - 80242ee: 3710 adds r7, #16 - 80242f0: 46bd mov sp, r7 - 80242f2: bd80 pop {r7, pc} - 80242f4: 30040000 .word 0x30040000 - 80242f8: 30030000 .word 0x30030000 + 802431c: bf00 nop + 802431e: 3710 adds r7, #16 + 8024320: 46bd mov sp, r7 + 8024322: bd80 pop {r7, pc} + 8024324: 30040000 .word 0x30040000 + 8024328: 30030000 .word 0x30030000 -080242fc : +0802432c : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 80242fc: b480 push {r7} - 80242fe: af00 add r7, sp, #0 + 802432c: b480 push {r7} + 802432e: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); - 8024300: b672 cpsid i + 8024330: b672 cpsid i } - 8024302: bf00 nop + 8024332: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) { - 8024304: e7fe b.n 8024304 + 8024334: e7fe b.n 8024334 ... -08024308 : +08024338 : QSPI_HandleTypeDef hqspi; /* QUADSPI init function */ void MX_QUADSPI_Init(void) { - 8024308: b580 push {r7, lr} - 802430a: af00 add r7, sp, #0 + 8024338: b580 push {r7, lr} + 802433a: af00 add r7, sp, #0 /* USER CODE END QUADSPI_Init 0 */ /* USER CODE BEGIN QUADSPI_Init 1 */ /* USER CODE END QUADSPI_Init 1 */ hqspi.Instance = QUADSPI; - 802430c: 4b12 ldr r3, [pc, #72] ; (8024358 ) - 802430e: 4a13 ldr r2, [pc, #76] ; (802435c ) - 8024310: 601a str r2, [r3, #0] + 802433c: 4b12 ldr r3, [pc, #72] ; (8024388 ) + 802433e: 4a13 ldr r2, [pc, #76] ; (802438c ) + 8024340: 601a str r2, [r3, #0] hqspi.Init.ClockPrescaler = 2-1; - 8024312: 4b11 ldr r3, [pc, #68] ; (8024358 ) - 8024314: 2201 movs r2, #1 - 8024316: 605a str r2, [r3, #4] + 8024342: 4b11 ldr r3, [pc, #68] ; (8024388 ) + 8024344: 2201 movs r2, #1 + 8024346: 605a str r2, [r3, #4] hqspi.Init.FifoThreshold = 32; - 8024318: 4b0f ldr r3, [pc, #60] ; (8024358 ) - 802431a: 2220 movs r2, #32 - 802431c: 609a str r2, [r3, #8] + 8024348: 4b0f ldr r3, [pc, #60] ; (8024388 ) + 802434a: 2220 movs r2, #32 + 802434c: 609a str r2, [r3, #8] hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE; - 802431e: 4b0e ldr r3, [pc, #56] ; (8024358 ) - 8024320: 2210 movs r2, #16 - 8024322: 60da str r2, [r3, #12] + 802434e: 4b0e ldr r3, [pc, #56] ; (8024388 ) + 8024350: 2210 movs r2, #16 + 8024352: 60da str r2, [r3, #12] hqspi.Init.FlashSize = 23+1; - 8024324: 4b0c ldr r3, [pc, #48] ; (8024358 ) - 8024326: 2218 movs r2, #24 - 8024328: 611a str r2, [r3, #16] + 8024354: 4b0c ldr r3, [pc, #48] ; (8024388 ) + 8024356: 2218 movs r2, #24 + 8024358: 611a str r2, [r3, #16] hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_5_CYCLE; - 802432a: 4b0b ldr r3, [pc, #44] ; (8024358 ) - 802432c: f44f 6280 mov.w r2, #1024 ; 0x400 - 8024330: 615a str r2, [r3, #20] + 802435a: 4b0b ldr r3, [pc, #44] ; (8024388 ) + 802435c: f44f 6280 mov.w r2, #1024 ; 0x400 + 8024360: 615a str r2, [r3, #20] hqspi.Init.ClockMode = QSPI_CLOCK_MODE_3; - 8024332: 4b09 ldr r3, [pc, #36] ; (8024358 ) - 8024334: 2201 movs r2, #1 - 8024336: 619a str r2, [r3, #24] + 8024362: 4b09 ldr r3, [pc, #36] ; (8024388 ) + 8024364: 2201 movs r2, #1 + 8024366: 619a str r2, [r3, #24] hqspi.Init.FlashID = QSPI_FLASH_ID_2; - 8024338: 4b07 ldr r3, [pc, #28] ; (8024358 ) - 802433a: 2280 movs r2, #128 ; 0x80 - 802433c: 61da str r2, [r3, #28] + 8024368: 4b07 ldr r3, [pc, #28] ; (8024388 ) + 802436a: 2280 movs r2, #128 ; 0x80 + 802436c: 61da str r2, [r3, #28] hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE; - 802433e: 4b06 ldr r3, [pc, #24] ; (8024358 ) - 8024340: 2200 movs r2, #0 - 8024342: 621a str r2, [r3, #32] + 802436e: 4b06 ldr r3, [pc, #24] ; (8024388 ) + 8024370: 2200 movs r2, #0 + 8024372: 621a str r2, [r3, #32] if (HAL_QSPI_Init(&hqspi) != HAL_OK) - 8024344: 4804 ldr r0, [pc, #16] ; (8024358 ) - 8024346: f00a fa6b bl 802e820 - 802434a: 4603 mov r3, r0 - 802434c: 2b00 cmp r3, #0 - 802434e: d001 beq.n 8024354 + 8024374: 4804 ldr r0, [pc, #16] ; (8024388 ) + 8024376: f00a fa6b bl 802e850 + 802437a: 4603 mov r3, r0 + 802437c: 2b00 cmp r3, #0 + 802437e: d001 beq.n 8024384 { Error_Handler(); - 8024350: f7ff ffd4 bl 80242fc + 8024380: f7ff ffd4 bl 802432c } /* USER CODE BEGIN QUADSPI_Init 2 */ /* USER CODE END QUADSPI_Init 2 */ } - 8024354: bf00 nop - 8024356: bd80 pop {r7, pc} - 8024358: 2400af2c .word 0x2400af2c - 802435c: 52005000 .word 0x52005000 + 8024384: bf00 nop + 8024386: bd80 pop {r7, pc} + 8024388: 2400af2c .word 0x2400af2c + 802438c: 52005000 .word 0x52005000 -08024360 : +08024390 : void HAL_QSPI_MspInit(QSPI_HandleTypeDef* qspiHandle) { - 8024360: b580 push {r7, lr} - 8024362: b0ba sub sp, #232 ; 0xe8 - 8024364: af00 add r7, sp, #0 - 8024366: 6078 str r0, [r7, #4] + 8024390: b580 push {r7, lr} + 8024392: b0ba sub sp, #232 ; 0xe8 + 8024394: af00 add r7, sp, #0 + 8024396: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8024368: f107 03d4 add.w r3, r7, #212 ; 0xd4 - 802436c: 2200 movs r2, #0 - 802436e: 601a str r2, [r3, #0] - 8024370: 605a str r2, [r3, #4] - 8024372: 609a str r2, [r3, #8] - 8024374: 60da str r2, [r3, #12] - 8024376: 611a str r2, [r3, #16] + 8024398: f107 03d4 add.w r3, r7, #212 ; 0xd4 + 802439c: 2200 movs r2, #0 + 802439e: 601a str r2, [r3, #0] + 80243a0: 605a str r2, [r3, #4] + 80243a2: 609a str r2, [r3, #8] + 80243a4: 60da str r2, [r3, #12] + 80243a6: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 8024378: f107 0318 add.w r3, r7, #24 - 802437c: 22bc movs r2, #188 ; 0xbc - 802437e: 2100 movs r1, #0 - 8024380: 4618 mov r0, r3 - 8024382: f01c fac5 bl 8040910 + 80243a8: f107 0318 add.w r3, r7, #24 + 80243ac: 22bc movs r2, #188 ; 0xbc + 80243ae: 2100 movs r1, #0 + 80243b0: 4618 mov r0, r3 + 80243b2: f01c fac5 bl 8040940 if(qspiHandle->Instance==QUADSPI) - 8024386: 687b ldr r3, [r7, #4] - 8024388: 681b ldr r3, [r3, #0] - 802438a: 4a4e ldr r2, [pc, #312] ; (80244c4 ) - 802438c: 4293 cmp r3, r2 - 802438e: f040 8094 bne.w 80244ba + 80243b6: 687b ldr r3, [r7, #4] + 80243b8: 681b ldr r3, [r3, #0] + 80243ba: 4a4e ldr r2, [pc, #312] ; (80244f4 ) + 80243bc: 4293 cmp r3, r2 + 80243be: f040 8094 bne.w 80244ea /* USER CODE END QUADSPI_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_QSPI; - 8024392: f04f 7300 mov.w r3, #33554432 ; 0x2000000 - 8024396: 61bb str r3, [r7, #24] + 80243c2: f04f 7300 mov.w r3, #33554432 ; 0x2000000 + 80243c6: 61bb str r3, [r7, #24] PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK; - 8024398: 2300 movs r3, #0 - 802439a: 663b str r3, [r7, #96] ; 0x60 + 80243c8: 2300 movs r3, #0 + 80243ca: 663b str r3, [r7, #96] ; 0x60 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 802439c: f107 0318 add.w r3, r7, #24 - 80243a0: 4618 mov r0, r3 - 80243a2: f00b fced bl 802fd80 - 80243a6: 4603 mov r3, r0 - 80243a8: 2b00 cmp r3, #0 - 80243aa: d001 beq.n 80243b0 + 80243cc: f107 0318 add.w r3, r7, #24 + 80243d0: 4618 mov r0, r3 + 80243d2: f00b fced bl 802fdb0 + 80243d6: 4603 mov r3, r0 + 80243d8: 2b00 cmp r3, #0 + 80243da: d001 beq.n 80243e0 { Error_Handler(); - 80243ac: f7ff ffa6 bl 80242fc + 80243dc: f7ff ffa6 bl 802432c } /* QUADSPI clock enable */ __HAL_RCC_QSPI_CLK_ENABLE(); - 80243b0: 4b45 ldr r3, [pc, #276] ; (80244c8 ) - 80243b2: f8d3 30d4 ldr.w r3, [r3, #212] ; 0xd4 - 80243b6: 4a44 ldr r2, [pc, #272] ; (80244c8 ) - 80243b8: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 80243bc: f8c2 30d4 str.w r3, [r2, #212] ; 0xd4 - 80243c0: 4b41 ldr r3, [pc, #260] ; (80244c8 ) - 80243c2: f8d3 30d4 ldr.w r3, [r3, #212] ; 0xd4 - 80243c6: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 80243ca: 617b str r3, [r7, #20] - 80243cc: 697b ldr r3, [r7, #20] + 80243e0: 4b45 ldr r3, [pc, #276] ; (80244f8 ) + 80243e2: f8d3 30d4 ldr.w r3, [r3, #212] ; 0xd4 + 80243e6: 4a44 ldr r2, [pc, #272] ; (80244f8 ) + 80243e8: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 80243ec: f8c2 30d4 str.w r3, [r2, #212] ; 0xd4 + 80243f0: 4b41 ldr r3, [pc, #260] ; (80244f8 ) + 80243f2: f8d3 30d4 ldr.w r3, [r3, #212] ; 0xd4 + 80243f6: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 80243fa: 617b str r3, [r7, #20] + 80243fc: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); - 80243ce: 4b3e ldr r3, [pc, #248] ; (80244c8 ) - 80243d0: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80243d4: 4a3c ldr r2, [pc, #240] ; (80244c8 ) - 80243d6: f043 0302 orr.w r3, r3, #2 - 80243da: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 80243de: 4b3a ldr r3, [pc, #232] ; (80244c8 ) - 80243e0: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80243e4: f003 0302 and.w r3, r3, #2 - 80243e8: 613b str r3, [r7, #16] - 80243ea: 693b ldr r3, [r7, #16] + 80243fe: 4b3e ldr r3, [pc, #248] ; (80244f8 ) + 8024400: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8024404: 4a3c ldr r2, [pc, #240] ; (80244f8 ) + 8024406: f043 0302 orr.w r3, r3, #2 + 802440a: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 802440e: 4b3a ldr r3, [pc, #232] ; (80244f8 ) + 8024410: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8024414: f003 0302 and.w r3, r3, #2 + 8024418: 613b str r3, [r7, #16] + 802441a: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOE_CLK_ENABLE(); - 80243ec: 4b36 ldr r3, [pc, #216] ; (80244c8 ) - 80243ee: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80243f2: 4a35 ldr r2, [pc, #212] ; (80244c8 ) - 80243f4: f043 0310 orr.w r3, r3, #16 - 80243f8: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 80243fc: 4b32 ldr r3, [pc, #200] ; (80244c8 ) - 80243fe: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8024402: f003 0310 and.w r3, r3, #16 - 8024406: 60fb str r3, [r7, #12] - 8024408: 68fb ldr r3, [r7, #12] + 802441c: 4b36 ldr r3, [pc, #216] ; (80244f8 ) + 802441e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8024422: 4a35 ldr r2, [pc, #212] ; (80244f8 ) + 8024424: f043 0310 orr.w r3, r3, #16 + 8024428: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 802442c: 4b32 ldr r3, [pc, #200] ; (80244f8 ) + 802442e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8024432: f003 0310 and.w r3, r3, #16 + 8024436: 60fb str r3, [r7, #12] + 8024438: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOC_CLK_ENABLE(); - 802440a: 4b2f ldr r3, [pc, #188] ; (80244c8 ) - 802440c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8024410: 4a2d ldr r2, [pc, #180] ; (80244c8 ) - 8024412: f043 0304 orr.w r3, r3, #4 - 8024416: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 802441a: 4b2b ldr r3, [pc, #172] ; (80244c8 ) - 802441c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8024420: f003 0304 and.w r3, r3, #4 - 8024424: 60bb str r3, [r7, #8] - 8024426: 68bb ldr r3, [r7, #8] + 802443a: 4b2f ldr r3, [pc, #188] ; (80244f8 ) + 802443c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8024440: 4a2d ldr r2, [pc, #180] ; (80244f8 ) + 8024442: f043 0304 orr.w r3, r3, #4 + 8024446: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 802444a: 4b2b ldr r3, [pc, #172] ; (80244f8 ) + 802444c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8024450: f003 0304 and.w r3, r3, #4 + 8024454: 60bb str r3, [r7, #8] + 8024456: 68bb ldr r3, [r7, #8] PE8 ------> QUADSPI_BK2_IO1 PE9 ------> QUADSPI_BK2_IO2 PE10 ------> QUADSPI_BK2_IO3 PC11 ------> QUADSPI_BK2_NCS */ GPIO_InitStruct.Pin = GPIO_PIN_2; - 8024428: 2304 movs r3, #4 - 802442a: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 + 8024458: 2304 movs r3, #4 + 802445a: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 802442e: 2302 movs r3, #2 - 8024430: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 802445e: 2302 movs r3, #2 + 8024460: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8024434: 2300 movs r3, #0 - 8024436: f8c7 30dc str.w r3, [r7, #220] ; 0xdc + 8024464: 2300 movs r3, #0 + 8024466: f8c7 30dc str.w r3, [r7, #220] ; 0xdc GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 802443a: 2303 movs r3, #3 - 802443c: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 802446a: 2303 movs r3, #3 + 802446c: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; - 8024440: 2309 movs r3, #9 - 8024442: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 8024470: 2309 movs r3, #9 + 8024472: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8024446: f107 03d4 add.w r3, r7, #212 ; 0xd4 - 802444a: 4619 mov r1, r3 - 802444c: 481f ldr r0, [pc, #124] ; (80244cc ) - 802444e: f008 fff5 bl 802d43c + 8024476: f107 03d4 add.w r3, r7, #212 ; 0xd4 + 802447a: 4619 mov r1, r3 + 802447c: 481f ldr r0, [pc, #124] ; (80244fc ) + 802447e: f008 fff5 bl 802d46c GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10; - 8024452: f44f 63f0 mov.w r3, #1920 ; 0x780 - 8024456: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 + 8024482: f44f 63f0 mov.w r3, #1920 ; 0x780 + 8024486: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 802445a: 2302 movs r3, #2 - 802445c: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 802448a: 2302 movs r3, #2 + 802448c: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8024460: 2300 movs r3, #0 - 8024462: f8c7 30dc str.w r3, [r7, #220] ; 0xdc + 8024490: 2300 movs r3, #0 + 8024492: f8c7 30dc str.w r3, [r7, #220] ; 0xdc GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8024466: 2303 movs r3, #3 - 8024468: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 8024496: 2303 movs r3, #3 + 8024498: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; - 802446c: 230a movs r3, #10 - 802446e: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 802449c: 230a movs r3, #10 + 802449e: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 8024472: f107 03d4 add.w r3, r7, #212 ; 0xd4 - 8024476: 4619 mov r1, r3 - 8024478: 4815 ldr r0, [pc, #84] ; (80244d0 ) - 802447a: f008 ffdf bl 802d43c + 80244a2: f107 03d4 add.w r3, r7, #212 ; 0xd4 + 80244a6: 4619 mov r1, r3 + 80244a8: 4815 ldr r0, [pc, #84] ; (8024500 ) + 80244aa: f008 ffdf bl 802d46c GPIO_InitStruct.Pin = GPIO_PIN_11; - 802447e: f44f 6300 mov.w r3, #2048 ; 0x800 - 8024482: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 + 80244ae: f44f 6300 mov.w r3, #2048 ; 0x800 + 80244b2: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8024486: 2302 movs r3, #2 - 8024488: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 80244b6: 2302 movs r3, #2 + 80244b8: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 GPIO_InitStruct.Pull = GPIO_NOPULL; - 802448c: 2300 movs r3, #0 - 802448e: f8c7 30dc str.w r3, [r7, #220] ; 0xdc + 80244bc: 2300 movs r3, #0 + 80244be: f8c7 30dc str.w r3, [r7, #220] ; 0xdc GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8024492: 2303 movs r3, #3 - 8024494: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 80244c2: 2303 movs r3, #3 + 80244c4: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; - 8024498: 2309 movs r3, #9 - 802449a: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 80244c8: 2309 movs r3, #9 + 80244ca: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 802449e: f107 03d4 add.w r3, r7, #212 ; 0xd4 - 80244a2: 4619 mov r1, r3 - 80244a4: 480b ldr r0, [pc, #44] ; (80244d4 ) - 80244a6: f008 ffc9 bl 802d43c + 80244ce: f107 03d4 add.w r3, r7, #212 ; 0xd4 + 80244d2: 4619 mov r1, r3 + 80244d4: 480b ldr r0, [pc, #44] ; (8024504 ) + 80244d6: f008 ffc9 bl 802d46c /* QUADSPI interrupt Init */ HAL_NVIC_SetPriority(QUADSPI_IRQn, 0, 0); - 80244aa: 2200 movs r2, #0 - 80244ac: 2100 movs r1, #0 - 80244ae: 205c movs r0, #92 ; 0x5c - 80244b0: f003 fa6f bl 8027992 + 80244da: 2200 movs r2, #0 + 80244dc: 2100 movs r1, #0 + 80244de: 205c movs r0, #92 ; 0x5c + 80244e0: f003 fa6f bl 80279c2 HAL_NVIC_EnableIRQ(QUADSPI_IRQn); - 80244b4: 205c movs r0, #92 ; 0x5c - 80244b6: f003 fa86 bl 80279c6 + 80244e4: 205c movs r0, #92 ; 0x5c + 80244e6: f003 fa86 bl 80279f6 /* USER CODE BEGIN QUADSPI_MspInit 1 */ /* USER CODE END QUADSPI_MspInit 1 */ } } - 80244ba: bf00 nop - 80244bc: 37e8 adds r7, #232 ; 0xe8 - 80244be: 46bd mov sp, r7 - 80244c0: bd80 pop {r7, pc} - 80244c2: bf00 nop - 80244c4: 52005000 .word 0x52005000 - 80244c8: 58024400 .word 0x58024400 - 80244cc: 58020400 .word 0x58020400 - 80244d0: 58021000 .word 0x58021000 - 80244d4: 58020800 .word 0x58020800 + 80244ea: bf00 nop + 80244ec: 37e8 adds r7, #232 ; 0xe8 + 80244ee: 46bd mov sp, r7 + 80244f0: bd80 pop {r7, pc} + 80244f2: bf00 nop + 80244f4: 52005000 .word 0x52005000 + 80244f8: 58024400 .word 0x58024400 + 80244fc: 58020400 .word 0x58020400 + 8024500: 58021000 .word 0x58021000 + 8024504: 58020800 .word 0x58020800 -080244d8 : +08024508 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 80244d8: b480 push {r7} - 80244da: b083 sub sp, #12 - 80244dc: af00 add r7, sp, #0 + 8024508: b480 push {r7} + 802450a: b083 sub sp, #12 + 802450c: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 80244de: 4b0a ldr r3, [pc, #40] ; (8024508 ) - 80244e0: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 80244e4: 4a08 ldr r2, [pc, #32] ; (8024508 ) - 80244e6: f043 0302 orr.w r3, r3, #2 - 80244ea: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 - 80244ee: 4b06 ldr r3, [pc, #24] ; (8024508 ) - 80244f0: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 80244f4: f003 0302 and.w r3, r3, #2 - 80244f8: 607b str r3, [r7, #4] - 80244fa: 687b ldr r3, [r7, #4] + 802450e: 4b0a ldr r3, [pc, #40] ; (8024538 ) + 8024510: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 8024514: 4a08 ldr r2, [pc, #32] ; (8024538 ) + 8024516: f043 0302 orr.w r3, r3, #2 + 802451a: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 + 802451e: 4b06 ldr r3, [pc, #24] ; (8024538 ) + 8024520: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 8024524: f003 0302 and.w r3, r3, #2 + 8024528: 607b str r3, [r7, #4] + 802452a: 687b ldr r3, [r7, #4] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 80244fc: bf00 nop - 80244fe: 370c adds r7, #12 - 8024500: 46bd mov sp, r7 - 8024502: f85d 7b04 ldr.w r7, [sp], #4 - 8024506: 4770 bx lr - 8024508: 58024400 .word 0x58024400 + 802452c: bf00 nop + 802452e: 370c adds r7, #12 + 8024530: 46bd mov sp, r7 + 8024532: f85d 7b04 ldr.w r7, [sp], #4 + 8024536: 4770 bx lr + 8024538: 58024400 .word 0x58024400 -0802450c : +0802453c : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 802450c: b480 push {r7} - 802450e: af00 add r7, sp, #0 + 802453c: b480 push {r7} + 802453e: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8024510: e7fe b.n 8024510 + 8024540: e7fe b.n 8024540 -08024512 : +08024542 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8024512: b480 push {r7} - 8024514: af00 add r7, sp, #0 + 8024542: b480 push {r7} + 8024544: af00 add r7, sp, #0 /* USER CODE END HardFault_IRQn 0 */ while (1) - 8024516: e7fe b.n 8024516 + 8024546: e7fe b.n 8024546 -08024518 : +08024548 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8024518: b480 push {r7} - 802451a: af00 add r7, sp, #0 + 8024548: b480 push {r7} + 802454a: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 802451c: e7fe b.n 802451c + 802454c: e7fe b.n 802454c -0802451e : +0802454e : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { - 802451e: b480 push {r7} - 8024520: af00 add r7, sp, #0 + 802454e: b480 push {r7} + 8024550: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 8024522: e7fe b.n 8024522 + 8024552: e7fe b.n 8024552 -08024524 : +08024554 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 8024524: b480 push {r7} - 8024526: af00 add r7, sp, #0 + 8024554: b480 push {r7} + 8024556: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8024528: e7fe b.n 8024528 + 8024558: e7fe b.n 8024558 -0802452a : +0802455a : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 802452a: b480 push {r7} - 802452c: af00 add r7, sp, #0 + 802455a: b480 push {r7} + 802455c: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 802452e: bf00 nop - 8024530: 46bd mov sp, r7 - 8024532: f85d 7b04 ldr.w r7, [sp], #4 - 8024536: 4770 bx lr + 802455e: bf00 nop + 8024560: 46bd mov sp, r7 + 8024562: f85d 7b04 ldr.w r7, [sp], #4 + 8024566: 4770 bx lr -08024538 : +08024568 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8024538: b480 push {r7} - 802453a: af00 add r7, sp, #0 + 8024568: b480 push {r7} + 802456a: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 802453c: bf00 nop - 802453e: 46bd mov sp, r7 - 8024540: f85d 7b04 ldr.w r7, [sp], #4 - 8024544: 4770 bx lr + 802456c: bf00 nop + 802456e: 46bd mov sp, r7 + 8024570: f85d 7b04 ldr.w r7, [sp], #4 + 8024574: 4770 bx lr -08024546 : +08024576 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8024546: b480 push {r7} - 8024548: af00 add r7, sp, #0 + 8024576: b480 push {r7} + 8024578: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 802454a: bf00 nop - 802454c: 46bd mov sp, r7 - 802454e: f85d 7b04 ldr.w r7, [sp], #4 - 8024552: 4770 bx lr + 802457a: bf00 nop + 802457c: 46bd mov sp, r7 + 802457e: f85d 7b04 ldr.w r7, [sp], #4 + 8024582: 4770 bx lr -08024554 : +08024584 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8024554: b580 push {r7, lr} - 8024556: af00 add r7, sp, #0 + 8024584: b580 push {r7, lr} + 8024586: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8024558: f001 fd08 bl 8025f6c + 8024588: f001 fd08 bl 8025f9c /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 802455c: bf00 nop - 802455e: bd80 pop {r7, pc} + 802458c: bf00 nop + 802458e: bd80 pop {r7, pc} -08024560 : +08024590 : /** * @brief This function handles DMA1 stream0 global interrupt. */ void DMA1_Stream0_IRQHandler(void) { - 8024560: b580 push {r7, lr} - 8024562: af00 add r7, sp, #0 + 8024590: b580 push {r7, lr} + 8024592: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream0_IRQn 0 */ /* USER CODE END DMA1_Stream0_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_uart4_tx); - 8024564: 4802 ldr r0, [pc, #8] ; (8024570 ) - 8024566: f004 fdef bl 8029148 + 8024594: 4802 ldr r0, [pc, #8] ; (80245a0 ) + 8024596: f004 fdef bl 8029178 /* USER CODE BEGIN DMA1_Stream0_IRQn 1 */ /* USER CODE END DMA1_Stream0_IRQn 1 */ } - 802456a: bf00 nop - 802456c: bd80 pop {r7, pc} - 802456e: bf00 nop - 8024570: 2400b50c .word 0x2400b50c + 802459a: bf00 nop + 802459c: bd80 pop {r7, pc} + 802459e: bf00 nop + 80245a0: 2400b50c .word 0x2400b50c -08024574 : +080245a4 : /** * @brief This function handles DMA1 stream1 global interrupt. */ void DMA1_Stream1_IRQHandler(void) { - 8024574: b580 push {r7, lr} - 8024576: af00 add r7, sp, #0 + 80245a4: b580 push {r7, lr} + 80245a6: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */ /* USER CODE END DMA1_Stream1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_uart5_tx); - 8024578: 4802 ldr r0, [pc, #8] ; (8024584 ) - 802457a: f004 fde5 bl 8029148 + 80245a8: 4802 ldr r0, [pc, #8] ; (80245b4 ) + 80245aa: f004 fde5 bl 8029178 /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */ /* USER CODE END DMA1_Stream1_IRQn 1 */ } - 802457e: bf00 nop - 8024580: bd80 pop {r7, pc} - 8024582: bf00 nop - 8024584: 2400b584 .word 0x2400b584 + 80245ae: bf00 nop + 80245b0: bd80 pop {r7, pc} + 80245b2: bf00 nop + 80245b4: 2400b584 .word 0x2400b584 -08024588 : +080245b8 : /** * @brief This function handles DMA1 stream2 global interrupt. */ void DMA1_Stream2_IRQHandler(void) { - 8024588: b580 push {r7, lr} - 802458a: af00 add r7, sp, #0 + 80245b8: b580 push {r7, lr} + 80245ba: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream2_IRQn 0 */ /* USER CODE END DMA1_Stream2_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); - 802458c: 4802 ldr r0, [pc, #8] ; (8024598 ) - 802458e: f004 fddb bl 8029148 + 80245bc: 4802 ldr r0, [pc, #8] ; (80245c8 ) + 80245be: f004 fddb bl 8029178 /* USER CODE BEGIN DMA1_Stream2_IRQn 1 */ /* USER CODE END DMA1_Stream2_IRQn 1 */ } - 8024592: bf00 nop - 8024594: bd80 pop {r7, pc} - 8024596: bf00 nop - 8024598: 2400b674 .word 0x2400b674 + 80245c2: bf00 nop + 80245c4: bd80 pop {r7, pc} + 80245c6: bf00 nop + 80245c8: 2400b674 .word 0x2400b674 -0802459c : +080245cc : /** * @brief This function handles DMA1 stream3 global interrupt. */ void DMA1_Stream3_IRQHandler(void) { - 802459c: b580 push {r7, lr} - 802459e: af00 add r7, sp, #0 + 80245cc: b580 push {r7, lr} + 80245ce: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */ /* USER CODE END DMA1_Stream3_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_uart7_tx); - 80245a0: 4802 ldr r0, [pc, #8] ; (80245ac ) - 80245a2: f004 fdd1 bl 8029148 + 80245d0: 4802 ldr r0, [pc, #8] ; (80245dc ) + 80245d2: f004 fdd1 bl 8029178 /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */ /* USER CODE END DMA1_Stream3_IRQn 1 */ } - 80245a6: bf00 nop - 80245a8: bd80 pop {r7, pc} - 80245aa: bf00 nop - 80245ac: 2400b5fc .word 0x2400b5fc + 80245d6: bf00 nop + 80245d8: bd80 pop {r7, pc} + 80245da: bf00 nop + 80245dc: 2400b5fc .word 0x2400b5fc -080245b0 : +080245e0 : /** * @brief This function handles DMA1 stream4 global interrupt. */ void DMA1_Stream4_IRQHandler(void) { - 80245b0: b580 push {r7, lr} - 80245b2: af00 add r7, sp, #0 + 80245e0: b580 push {r7, lr} + 80245e2: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream4_IRQn 0 */ /* USER CODE END DMA1_Stream4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_tx); - 80245b4: 4802 ldr r0, [pc, #8] ; (80245c0 ) - 80245b6: f004 fdc7 bl 8029148 + 80245e4: 4802 ldr r0, [pc, #8] ; (80245f0 ) + 80245e6: f004 fdc7 bl 8029178 /* USER CODE BEGIN DMA1_Stream4_IRQn 1 */ /* USER CODE END DMA1_Stream4_IRQn 1 */ } - 80245ba: bf00 nop - 80245bc: bd80 pop {r7, pc} - 80245be: bf00 nop - 80245c0: 2400b6ec .word 0x2400b6ec + 80245ea: bf00 nop + 80245ec: bd80 pop {r7, pc} + 80245ee: bf00 nop + 80245f0: 2400b6ec .word 0x2400b6ec -080245c4 : +080245f4 : /** * @brief This function handles DMA1 stream5 global interrupt. */ void DMA1_Stream5_IRQHandler(void) { - 80245c4: b580 push {r7, lr} - 80245c6: af00 add r7, sp, #0 + 80245f4: b580 push {r7, lr} + 80245f6: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */ /* USER CODE END DMA1_Stream5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart3_tx); - 80245c8: 4802 ldr r0, [pc, #8] ; (80245d4 ) - 80245ca: f004 fdbd bl 8029148 + 80245f8: 4802 ldr r0, [pc, #8] ; (8024604 ) + 80245fa: f004 fdbd bl 8029178 /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */ /* USER CODE END DMA1_Stream5_IRQn 1 */ } - 80245ce: bf00 nop - 80245d0: bd80 pop {r7, pc} - 80245d2: bf00 nop - 80245d4: 2400b764 .word 0x2400b764 + 80245fe: bf00 nop + 8024600: bd80 pop {r7, pc} + 8024602: bf00 nop + 8024604: 2400b764 .word 0x2400b764 -080245d8 : +08024608 : /** * @brief This function handles DMA1 stream6 global interrupt. */ void DMA1_Stream6_IRQHandler(void) { - 80245d8: b580 push {r7, lr} - 80245da: af00 add r7, sp, #0 + 8024608: b580 push {r7, lr} + 802460a: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream6_IRQn 0 */ /* USER CODE END DMA1_Stream6_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart6_tx); - 80245dc: 4802 ldr r0, [pc, #8] ; (80245e8 ) - 80245de: f004 fdb3 bl 8029148 + 802460c: 4802 ldr r0, [pc, #8] ; (8024618 ) + 802460e: f004 fdb3 bl 8029178 /* USER CODE BEGIN DMA1_Stream6_IRQn 1 */ /* USER CODE END DMA1_Stream6_IRQn 1 */ } - 80245e2: bf00 nop - 80245e4: bd80 pop {r7, pc} - 80245e6: bf00 nop - 80245e8: 2400b7dc .word 0x2400b7dc + 8024612: bf00 nop + 8024614: bd80 pop {r7, pc} + 8024616: bf00 nop + 8024618: 2400b7dc .word 0x2400b7dc -080245ec : +0802461c : /** * @brief This function handles FDCAN1 interrupt 0. */ void FDCAN1_IT0_IRQHandler(void) { - 80245ec: b580 push {r7, lr} - 80245ee: af00 add r7, sp, #0 + 802461c: b580 push {r7, lr} + 802461e: af00 add r7, sp, #0 /* USER CODE BEGIN FDCAN1_IT0_IRQn 0 */ /* USER CODE END FDCAN1_IT0_IRQn 0 */ HAL_FDCAN_IRQHandler(&hfdcan1); - 80245f0: 4802 ldr r0, [pc, #8] ; (80245fc ) - 80245f2: f008 fa21 bl 802ca38 + 8024620: 4802 ldr r0, [pc, #8] ; (802462c ) + 8024622: f008 fa21 bl 802ca68 /* USER CODE BEGIN FDCAN1_IT0_IRQn 1 */ /* USER CODE END FDCAN1_IT0_IRQn 1 */ } - 80245f6: bf00 nop - 80245f8: bd80 pop {r7, pc} - 80245fa: bf00 nop - 80245fc: 2400ad98 .word 0x2400ad98 + 8024626: bf00 nop + 8024628: bd80 pop {r7, pc} + 802462a: bf00 nop + 802462c: 2400ad98 .word 0x2400ad98 -08024600 : +08024630 : /** * @brief This function handles FDCAN2 interrupt 0. */ void FDCAN2_IT0_IRQHandler(void) { - 8024600: b580 push {r7, lr} - 8024602: af00 add r7, sp, #0 + 8024630: b580 push {r7, lr} + 8024632: af00 add r7, sp, #0 /* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */ /* USER CODE END FDCAN2_IT0_IRQn 0 */ HAL_FDCAN_IRQHandler(&hfdcan2); - 8024604: 4802 ldr r0, [pc, #8] ; (8024610 ) - 8024606: f008 fa17 bl 802ca38 + 8024634: 4802 ldr r0, [pc, #8] ; (8024640 ) + 8024636: f008 fa17 bl 802ca68 /* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */ /* USER CODE END FDCAN2_IT0_IRQn 1 */ } - 802460a: bf00 nop - 802460c: bd80 pop {r7, pc} - 802460e: bf00 nop - 8024610: 2400ae38 .word 0x2400ae38 + 802463a: bf00 nop + 802463c: bd80 pop {r7, pc} + 802463e: bf00 nop + 8024640: 2400ae38 .word 0x2400ae38 -08024614 : +08024644 : /** * @brief This function handles TIM1 update interrupt. */ void TIM1_UP_IRQHandler(void) { - 8024614: b580 push {r7, lr} - 8024616: af00 add r7, sp, #0 + 8024644: b580 push {r7, lr} + 8024646: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_UP_IRQn 0 */ /* USER CODE END TIM1_UP_IRQn 0 */ HAL_TIM_IRQHandler(&htim1); - 8024618: 4802 ldr r0, [pc, #8] ; (8024624 ) - 802461a: f00d fe0d bl 8032238 + 8024648: 4802 ldr r0, [pc, #8] ; (8024654 ) + 802464a: f00d fe0d bl 8032268 /* USER CODE BEGIN TIM1_UP_IRQn 1 */ /* USER CODE END TIM1_UP_IRQn 1 */ } - 802461e: bf00 nop - 8024620: bd80 pop {r7, pc} - 8024622: bf00 nop - 8024624: 2400af7c .word 0x2400af7c + 802464e: bf00 nop + 8024650: bd80 pop {r7, pc} + 8024652: bf00 nop + 8024654: 2400af7c .word 0x2400af7c -08024628 : +08024658 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { - 8024628: b580 push {r7, lr} - 802462a: af00 add r7, sp, #0 + 8024658: b580 push {r7, lr} + 802465a: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); - 802462c: 4802 ldr r0, [pc, #8] ; (8024638 ) - 802462e: f00e fbf5 bl 8032e1c + 802465c: 4802 ldr r0, [pc, #8] ; (8024668 ) + 802465e: f00e fbf5 bl 8032e4c /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } - 8024632: bf00 nop - 8024634: bd80 pop {r7, pc} - 8024636: bf00 nop - 8024638: 2400b254 .word 0x2400b254 + 8024662: bf00 nop + 8024664: bd80 pop {r7, pc} + 8024666: bf00 nop + 8024668: 2400b254 .word 0x2400b254 -0802463c : +0802466c : /** * @brief This function handles USART2 global interrupt. */ void USART2_IRQHandler(void) { - 802463c: b580 push {r7, lr} - 802463e: af00 add r7, sp, #0 + 802466c: b580 push {r7, lr} + 802466e: af00 add r7, sp, #0 /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); - 8024640: 4802 ldr r0, [pc, #8] ; (802464c ) - 8024642: f00e fbeb bl 8032e1c + 8024670: 4802 ldr r0, [pc, #8] ; (802467c ) + 8024672: f00e fbeb bl 8032e4c /* USER CODE BEGIN USART2_IRQn 1 */ /* USER CODE END USART2_IRQn 1 */ } - 8024646: bf00 nop - 8024648: bd80 pop {r7, pc} - 802464a: bf00 nop - 802464c: 2400b2e4 .word 0x2400b2e4 + 8024676: bf00 nop + 8024678: bd80 pop {r7, pc} + 802467a: bf00 nop + 802467c: 2400b2e4 .word 0x2400b2e4 -08024650 : +08024680 : /** * @brief This function handles USART3 global interrupt. */ void USART3_IRQHandler(void) { - 8024650: b580 push {r7, lr} - 8024652: af00 add r7, sp, #0 + 8024680: b580 push {r7, lr} + 8024682: af00 add r7, sp, #0 /* USER CODE BEGIN USART3_IRQn 0 */ /* USER CODE END USART3_IRQn 0 */ HAL_UART_IRQHandler(&huart3); - 8024654: 4802 ldr r0, [pc, #8] ; (8024660 ) - 8024656: f00e fbe1 bl 8032e1c + 8024684: 4802 ldr r0, [pc, #8] ; (8024690 ) + 8024686: f00e fbe1 bl 8032e4c /* USER CODE BEGIN USART3_IRQn 1 */ /* USER CODE END USART3_IRQn 1 */ } - 802465a: bf00 nop - 802465c: bd80 pop {r7, pc} - 802465e: bf00 nop - 8024660: 2400b374 .word 0x2400b374 + 802468a: bf00 nop + 802468c: bd80 pop {r7, pc} + 802468e: bf00 nop + 8024690: 2400b374 .word 0x2400b374 -08024664 : +08024694 : /** * @brief This function handles TIM8 update interrupt and TIM13 global interrupt. */ void TIM8_UP_TIM13_IRQHandler(void) { - 8024664: b580 push {r7, lr} - 8024666: af00 add r7, sp, #0 + 8024694: b580 push {r7, lr} + 8024696: af00 add r7, sp, #0 /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */ /* USER CODE END TIM8_UP_TIM13_IRQn 0 */ HAL_TIM_IRQHandler(&htim8); - 8024668: 4802 ldr r0, [pc, #8] ; (8024674 ) - 802466a: f00d fde5 bl 8032238 + 8024698: 4802 ldr r0, [pc, #8] ; (80246a4 ) + 802469a: f00d fde5 bl 8032268 /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */ /* USER CODE END TIM8_UP_TIM13_IRQn 1 */ } - 802466e: bf00 nop - 8024670: bd80 pop {r7, pc} - 8024672: bf00 nop - 8024674: 2400afc8 .word 0x2400afc8 + 802469e: bf00 nop + 80246a0: bd80 pop {r7, pc} + 80246a2: bf00 nop + 80246a4: 2400afc8 .word 0x2400afc8 -08024678 : +080246a8 : /** * @brief This function handles UART4 global interrupt. */ void UART4_IRQHandler(void) { - 8024678: b580 push {r7, lr} - 802467a: af00 add r7, sp, #0 + 80246a8: b580 push {r7, lr} + 80246aa: af00 add r7, sp, #0 /* USER CODE BEGIN UART4_IRQn 0 */ /* USER CODE END UART4_IRQn 0 */ HAL_UART_IRQHandler(&huart4); - 802467c: 4802 ldr r0, [pc, #8] ; (8024688 ) - 802467e: f00e fbcd bl 8032e1c + 80246ac: 4802 ldr r0, [pc, #8] ; (80246b8 ) + 80246ae: f00e fbcd bl 8032e4c /* USER CODE BEGIN UART4_IRQn 1 */ /* USER CODE END UART4_IRQn 1 */ } - 8024682: bf00 nop - 8024684: bd80 pop {r7, pc} - 8024686: bf00 nop - 8024688: 2400b0a4 .word 0x2400b0a4 + 80246b2: bf00 nop + 80246b4: bd80 pop {r7, pc} + 80246b6: bf00 nop + 80246b8: 2400b0a4 .word 0x2400b0a4 -0802468c : +080246bc : /** * @brief This function handles UART5 global interrupt. */ void UART5_IRQHandler(void) { - 802468c: b580 push {r7, lr} - 802468e: af00 add r7, sp, #0 + 80246bc: b580 push {r7, lr} + 80246be: af00 add r7, sp, #0 /* USER CODE BEGIN UART5_IRQn 0 */ /* USER CODE END UART5_IRQn 0 */ HAL_UART_IRQHandler(&huart5); - 8024690: 4802 ldr r0, [pc, #8] ; (802469c ) - 8024692: f00e fbc3 bl 8032e1c + 80246c0: 4802 ldr r0, [pc, #8] ; (80246cc ) + 80246c2: f00e fbc3 bl 8032e4c /* USER CODE BEGIN UART5_IRQn 1 */ /* USER CODE END UART5_IRQn 1 */ } - 8024696: bf00 nop - 8024698: bd80 pop {r7, pc} - 802469a: bf00 nop - 802469c: 2400b134 .word 0x2400b134 + 80246c6: bf00 nop + 80246c8: bd80 pop {r7, pc} + 80246ca: bf00 nop + 80246cc: 2400b134 .word 0x2400b134 -080246a0 : +080246d0 : /** * @brief This function handles Ethernet global interrupt. */ void ETH_IRQHandler(void) { - 80246a0: b580 push {r7, lr} - 80246a2: af00 add r7, sp, #0 + 80246d0: b580 push {r7, lr} + 80246d2: af00 add r7, sp, #0 /* USER CODE BEGIN ETH_IRQn 0 */ /* USER CODE END ETH_IRQn 0 */ HAL_ETH_IRQHandler(&heth); - 80246a4: 4802 ldr r0, [pc, #8] ; (80246b0 ) - 80246a6: f006 fbcd bl 802ae44 + 80246d4: 4802 ldr r0, [pc, #8] ; (80246e0 ) + 80246d6: f006 fbcd bl 802ae74 /* USER CODE BEGIN ETH_IRQn 1 */ /* USER CODE END ETH_IRQn 1 */ } - 80246aa: bf00 nop - 80246ac: bd80 pop {r7, pc} - 80246ae: bf00 nop - 80246b0: 2400b8b4 .word 0x2400b8b4 + 80246da: bf00 nop + 80246dc: bd80 pop {r7, pc} + 80246de: bf00 nop + 80246e0: 2400b8b4 .word 0x2400b8b4 -080246b4 : +080246e4 : /** * @brief This function handles USART6 global interrupt. */ void USART6_IRQHandler(void) { - 80246b4: b580 push {r7, lr} - 80246b6: af00 add r7, sp, #0 + 80246e4: b580 push {r7, lr} + 80246e6: af00 add r7, sp, #0 /* USER CODE BEGIN USART6_IRQn 0 */ /* USER CODE END USART6_IRQn 0 */ HAL_UART_IRQHandler(&huart6); - 80246b8: 4802 ldr r0, [pc, #8] ; (80246c4 ) - 80246ba: f00e fbaf bl 8032e1c + 80246e8: 4802 ldr r0, [pc, #8] ; (80246f4 ) + 80246ea: f00e fbaf bl 8032e4c /* USER CODE BEGIN USART6_IRQn 1 */ /* USER CODE END USART6_IRQn 1 */ } - 80246be: bf00 nop - 80246c0: bd80 pop {r7, pc} - 80246c2: bf00 nop - 80246c4: 2400b404 .word 0x2400b404 + 80246ee: bf00 nop + 80246f0: bd80 pop {r7, pc} + 80246f2: bf00 nop + 80246f4: 2400b404 .word 0x2400b404 -080246c8 : +080246f8 : /** * @brief This function handles UART7 global interrupt. */ void UART7_IRQHandler(void) { - 80246c8: b580 push {r7, lr} - 80246ca: af00 add r7, sp, #0 + 80246f8: b580 push {r7, lr} + 80246fa: af00 add r7, sp, #0 /* USER CODE BEGIN UART7_IRQn 0 */ /* USER CODE END UART7_IRQn 0 */ HAL_UART_IRQHandler(&huart7); - 80246cc: 4802 ldr r0, [pc, #8] ; (80246d8 ) - 80246ce: f00e fba5 bl 8032e1c + 80246fc: 4802 ldr r0, [pc, #8] ; (8024708 ) + 80246fe: f00e fba5 bl 8032e4c /* USER CODE BEGIN UART7_IRQn 1 */ /* USER CODE END UART7_IRQn 1 */ } - 80246d2: bf00 nop - 80246d4: bd80 pop {r7, pc} - 80246d6: bf00 nop - 80246d8: 2400b1c4 .word 0x2400b1c4 + 8024702: bf00 nop + 8024704: bd80 pop {r7, pc} + 8024706: bf00 nop + 8024708: 2400b1c4 .word 0x2400b1c4 -080246dc : +0802470c : /** * @brief This function handles QUADSPI global interrupt. */ void QUADSPI_IRQHandler(void) { - 80246dc: b580 push {r7, lr} - 80246de: af00 add r7, sp, #0 + 802470c: b580 push {r7, lr} + 802470e: af00 add r7, sp, #0 /* USER CODE BEGIN QUADSPI_IRQn 0 */ /* USER CODE END QUADSPI_IRQn 0 */ HAL_QSPI_IRQHandler(&hqspi); - 80246e0: 4802 ldr r0, [pc, #8] ; (80246ec ) - 80246e2: f00a f911 bl 802e908 + 8024710: 4802 ldr r0, [pc, #8] ; (802471c ) + 8024712: f00a f911 bl 802e938 /* USER CODE BEGIN QUADSPI_IRQn 1 */ /* USER CODE END QUADSPI_IRQn 1 */ } - 80246e6: bf00 nop - 80246e8: bd80 pop {r7, pc} - 80246ea: bf00 nop - 80246ec: 2400af2c .word 0x2400af2c + 8024716: bf00 nop + 8024718: bd80 pop {r7, pc} + 802471a: bf00 nop + 802471c: 2400af2c .word 0x2400af2c -080246f0 : +08024720 : /** * @brief This function handles I2C4 event interrupt. */ void I2C4_EV_IRQHandler(void) { - 80246f0: b580 push {r7, lr} - 80246f2: af00 add r7, sp, #0 + 8024720: b580 push {r7, lr} + 8024722: af00 add r7, sp, #0 /* USER CODE BEGIN I2C4_EV_IRQn 0 */ /* USER CODE END I2C4_EV_IRQn 0 */ HAL_I2C_EV_IRQHandler(&hi2c4); - 80246f4: 4802 ldr r0, [pc, #8] ; (8024700 ) - 80246f6: f009 f915 bl 802d924 + 8024724: 4802 ldr r0, [pc, #8] ; (8024730 ) + 8024726: f009 f915 bl 802d954 /* USER CODE BEGIN I2C4_EV_IRQn 1 */ /* USER CODE END I2C4_EV_IRQn 1 */ } - 80246fa: bf00 nop - 80246fc: bd80 pop {r7, pc} - 80246fe: bf00 nop - 8024700: 2400aedc .word 0x2400aedc + 802472a: bf00 nop + 802472c: bd80 pop {r7, pc} + 802472e: bf00 nop + 8024730: 2400aedc .word 0x2400aedc -08024704 : +08024734 : /** * @brief This function handles I2C4 error interrupt. */ void I2C4_ER_IRQHandler(void) { - 8024704: b580 push {r7, lr} - 8024706: af00 add r7, sp, #0 + 8024734: b580 push {r7, lr} + 8024736: af00 add r7, sp, #0 /* USER CODE BEGIN I2C4_ER_IRQn 0 */ /* USER CODE END I2C4_ER_IRQn 0 */ HAL_I2C_ER_IRQHandler(&hi2c4); - 8024708: 4802 ldr r0, [pc, #8] ; (8024714 ) - 802470a: f009 f925 bl 802d958 + 8024738: 4802 ldr r0, [pc, #8] ; (8024744 ) + 802473a: f009 f925 bl 802d988 /* USER CODE BEGIN I2C4_ER_IRQn 1 */ /* USER CODE END I2C4_ER_IRQn 1 */ } - 802470e: bf00 nop - 8024710: bd80 pop {r7, pc} - 8024712: bf00 nop - 8024714: 2400aedc .word 0x2400aedc + 802473e: bf00 nop + 8024740: bd80 pop {r7, pc} + 8024742: bf00 nop + 8024744: 2400aedc .word 0x2400aedc -08024718 : +08024748 : /** * @brief This function handles BDMA channel0 global interrupt. */ void BDMA_Channel0_IRQHandler(void) { - 8024718: b580 push {r7, lr} - 802471a: af00 add r7, sp, #0 + 8024748: b580 push {r7, lr} + 802474a: af00 add r7, sp, #0 /* USER CODE BEGIN BDMA_Channel0_IRQn 0 */ /* USER CODE END BDMA_Channel0_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_lpuart1_tx); - 802471c: 4802 ldr r0, [pc, #8] ; (8024728 ) - 802471e: f004 fd13 bl 8029148 + 802474c: 4802 ldr r0, [pc, #8] ; (8024758 ) + 802474e: f004 fd13 bl 8029178 /* USER CODE BEGIN BDMA_Channel0_IRQn 1 */ /* USER CODE END BDMA_Channel0_IRQn 1 */ } - 8024722: bf00 nop - 8024724: bd80 pop {r7, pc} - 8024726: bf00 nop - 8024728: 2400b494 .word 0x2400b494 + 8024752: bf00 nop + 8024754: bd80 pop {r7, pc} + 8024756: bf00 nop + 8024758: 2400b494 .word 0x2400b494 -0802472c : +0802475c : /** * @brief This function handles LPUART1 global interrupt. */ void LPUART1_IRQHandler(void) { - 802472c: b580 push {r7, lr} - 802472e: af00 add r7, sp, #0 + 802475c: b580 push {r7, lr} + 802475e: af00 add r7, sp, #0 /* USER CODE BEGIN LPUART1_IRQn 0 */ /* USER CODE END LPUART1_IRQn 0 */ HAL_UART_IRQHandler(&hlpuart1); - 8024730: 4802 ldr r0, [pc, #8] ; (802473c ) - 8024732: f00e fb73 bl 8032e1c + 8024760: 4802 ldr r0, [pc, #8] ; (802476c ) + 8024762: f00e fb73 bl 8032e4c /* USER CODE BEGIN LPUART1_IRQn 1 */ /* USER CODE END LPUART1_IRQn 1 */ } - 8024736: bf00 nop - 8024738: bd80 pop {r7, pc} - 802473a: bf00 nop - 802473c: 2400b014 .word 0x2400b014 + 8024766: bf00 nop + 8024768: bd80 pop {r7, pc} + 802476a: bf00 nop + 802476c: 2400b014 .word 0x2400b014 -08024740 <_getpid>: +08024770 <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { - 8024740: b480 push {r7} - 8024742: af00 add r7, sp, #0 + 8024770: b480 push {r7} + 8024772: af00 add r7, sp, #0 return 1; - 8024744: 2301 movs r3, #1 + 8024774: 2301 movs r3, #1 } - 8024746: 4618 mov r0, r3 - 8024748: 46bd mov sp, r7 - 802474a: f85d 7b04 ldr.w r7, [sp], #4 - 802474e: 4770 bx lr + 8024776: 4618 mov r0, r3 + 8024778: 46bd mov sp, r7 + 802477a: f85d 7b04 ldr.w r7, [sp], #4 + 802477e: 4770 bx lr -08024750 <_kill>: +08024780 <_kill>: int _kill(int pid, int sig) { - 8024750: b480 push {r7} - 8024752: b083 sub sp, #12 - 8024754: af00 add r7, sp, #0 - 8024756: 6078 str r0, [r7, #4] - 8024758: 6039 str r1, [r7, #0] + 8024780: b480 push {r7} + 8024782: b083 sub sp, #12 + 8024784: af00 add r7, sp, #0 + 8024786: 6078 str r0, [r7, #4] + 8024788: 6039 str r1, [r7, #0] errno = EINVAL; - 802475a: 4b05 ldr r3, [pc, #20] ; (8024770 <_kill+0x20>) - 802475c: 2216 movs r2, #22 - 802475e: 601a str r2, [r3, #0] + 802478a: 4b05 ldr r3, [pc, #20] ; (80247a0 <_kill+0x20>) + 802478c: 2216 movs r2, #22 + 802478e: 601a str r2, [r3, #0] return -1; - 8024760: f04f 33ff mov.w r3, #4294967295 + 8024790: f04f 33ff mov.w r3, #4294967295 } - 8024764: 4618 mov r0, r3 - 8024766: 370c adds r7, #12 - 8024768: 46bd mov sp, r7 - 802476a: f85d 7b04 ldr.w r7, [sp], #4 - 802476e: 4770 bx lr - 8024770: 2400eabc .word 0x2400eabc + 8024794: 4618 mov r0, r3 + 8024796: 370c adds r7, #12 + 8024798: 46bd mov sp, r7 + 802479a: f85d 7b04 ldr.w r7, [sp], #4 + 802479e: 4770 bx lr + 80247a0: 2400eabc .word 0x2400eabc -08024774 <_exit>: +080247a4 <_exit>: void _exit (int status) { - 8024774: b580 push {r7, lr} - 8024776: b082 sub sp, #8 - 8024778: af00 add r7, sp, #0 - 802477a: 6078 str r0, [r7, #4] + 80247a4: b580 push {r7, lr} + 80247a6: b082 sub sp, #8 + 80247a8: af00 add r7, sp, #0 + 80247aa: 6078 str r0, [r7, #4] _kill(status, -1); - 802477c: f04f 31ff mov.w r1, #4294967295 - 8024780: 6878 ldr r0, [r7, #4] - 8024782: f7ff ffe5 bl 8024750 <_kill> + 80247ac: f04f 31ff mov.w r1, #4294967295 + 80247b0: 6878 ldr r0, [r7, #4] + 80247b2: f7ff ffe5 bl 8024780 <_kill> while (1) {} /* Make sure we hang here */ - 8024786: e7fe b.n 8024786 <_exit+0x12> + 80247b6: e7fe b.n 80247b6 <_exit+0x12> -08024788 <_read>: +080247b8 <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { - 8024788: b580 push {r7, lr} - 802478a: b086 sub sp, #24 - 802478c: af00 add r7, sp, #0 - 802478e: 60f8 str r0, [r7, #12] - 8024790: 60b9 str r1, [r7, #8] - 8024792: 607a str r2, [r7, #4] + 80247b8: b580 push {r7, lr} + 80247ba: b086 sub sp, #24 + 80247bc: af00 add r7, sp, #0 + 80247be: 60f8 str r0, [r7, #12] + 80247c0: 60b9 str r1, [r7, #8] + 80247c2: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) - 8024794: 2300 movs r3, #0 - 8024796: 617b str r3, [r7, #20] - 8024798: e00a b.n 80247b0 <_read+0x28> + 80247c4: 2300 movs r3, #0 + 80247c6: 617b str r3, [r7, #20] + 80247c8: e00a b.n 80247e0 <_read+0x28> { *ptr++ = __io_getchar(); - 802479a: f3af 8000 nop.w - 802479e: 4601 mov r1, r0 - 80247a0: 68bb ldr r3, [r7, #8] - 80247a2: 1c5a adds r2, r3, #1 - 80247a4: 60ba str r2, [r7, #8] - 80247a6: b2ca uxtb r2, r1 - 80247a8: 701a strb r2, [r3, #0] + 80247ca: f3af 8000 nop.w + 80247ce: 4601 mov r1, r0 + 80247d0: 68bb ldr r3, [r7, #8] + 80247d2: 1c5a adds r2, r3, #1 + 80247d4: 60ba str r2, [r7, #8] + 80247d6: b2ca uxtb r2, r1 + 80247d8: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) - 80247aa: 697b ldr r3, [r7, #20] - 80247ac: 3301 adds r3, #1 - 80247ae: 617b str r3, [r7, #20] - 80247b0: 697a ldr r2, [r7, #20] - 80247b2: 687b ldr r3, [r7, #4] - 80247b4: 429a cmp r2, r3 - 80247b6: dbf0 blt.n 802479a <_read+0x12> + 80247da: 697b ldr r3, [r7, #20] + 80247dc: 3301 adds r3, #1 + 80247de: 617b str r3, [r7, #20] + 80247e0: 697a ldr r2, [r7, #20] + 80247e2: 687b ldr r3, [r7, #4] + 80247e4: 429a cmp r2, r3 + 80247e6: dbf0 blt.n 80247ca <_read+0x12> } return len; - 80247b8: 687b ldr r3, [r7, #4] + 80247e8: 687b ldr r3, [r7, #4] } - 80247ba: 4618 mov r0, r3 - 80247bc: 3718 adds r7, #24 - 80247be: 46bd mov sp, r7 - 80247c0: bd80 pop {r7, pc} + 80247ea: 4618 mov r0, r3 + 80247ec: 3718 adds r7, #24 + 80247ee: 46bd mov sp, r7 + 80247f0: bd80 pop {r7, pc} -080247c2 <_write>: +080247f2 <_write>: __attribute__((weak)) int _write(int file, char *ptr, int len) { - 80247c2: b580 push {r7, lr} - 80247c4: b086 sub sp, #24 - 80247c6: af00 add r7, sp, #0 - 80247c8: 60f8 str r0, [r7, #12] - 80247ca: 60b9 str r1, [r7, #8] - 80247cc: 607a str r2, [r7, #4] + 80247f2: b580 push {r7, lr} + 80247f4: b086 sub sp, #24 + 80247f6: af00 add r7, sp, #0 + 80247f8: 60f8 str r0, [r7, #12] + 80247fa: 60b9 str r1, [r7, #8] + 80247fc: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) - 80247ce: 2300 movs r3, #0 - 80247d0: 617b str r3, [r7, #20] - 80247d2: e009 b.n 80247e8 <_write+0x26> + 80247fe: 2300 movs r3, #0 + 8024800: 617b str r3, [r7, #20] + 8024802: e009 b.n 8024818 <_write+0x26> { __io_putchar(*ptr++); - 80247d4: 68bb ldr r3, [r7, #8] - 80247d6: 1c5a adds r2, r3, #1 - 80247d8: 60ba str r2, [r7, #8] - 80247da: 781b ldrb r3, [r3, #0] - 80247dc: 4618 mov r0, r3 - 80247de: f3af 8000 nop.w + 8024804: 68bb ldr r3, [r7, #8] + 8024806: 1c5a adds r2, r3, #1 + 8024808: 60ba str r2, [r7, #8] + 802480a: 781b ldrb r3, [r3, #0] + 802480c: 4618 mov r0, r3 + 802480e: f3af 8000 nop.w for (DataIdx = 0; DataIdx < len; DataIdx++) - 80247e2: 697b ldr r3, [r7, #20] - 80247e4: 3301 adds r3, #1 - 80247e6: 617b str r3, [r7, #20] - 80247e8: 697a ldr r2, [r7, #20] - 80247ea: 687b ldr r3, [r7, #4] - 80247ec: 429a cmp r2, r3 - 80247ee: dbf1 blt.n 80247d4 <_write+0x12> + 8024812: 697b ldr r3, [r7, #20] + 8024814: 3301 adds r3, #1 + 8024816: 617b str r3, [r7, #20] + 8024818: 697a ldr r2, [r7, #20] + 802481a: 687b ldr r3, [r7, #4] + 802481c: 429a cmp r2, r3 + 802481e: dbf1 blt.n 8024804 <_write+0x12> } return len; - 80247f0: 687b ldr r3, [r7, #4] + 8024820: 687b ldr r3, [r7, #4] } - 80247f2: 4618 mov r0, r3 - 80247f4: 3718 adds r7, #24 - 80247f6: 46bd mov sp, r7 - 80247f8: bd80 pop {r7, pc} + 8024822: 4618 mov r0, r3 + 8024824: 3718 adds r7, #24 + 8024826: 46bd mov sp, r7 + 8024828: bd80 pop {r7, pc} -080247fa <_close>: +0802482a <_close>: int _close(int file) { - 80247fa: b480 push {r7} - 80247fc: b083 sub sp, #12 - 80247fe: af00 add r7, sp, #0 - 8024800: 6078 str r0, [r7, #4] + 802482a: b480 push {r7} + 802482c: b083 sub sp, #12 + 802482e: af00 add r7, sp, #0 + 8024830: 6078 str r0, [r7, #4] return -1; - 8024802: f04f 33ff mov.w r3, #4294967295 + 8024832: f04f 33ff mov.w r3, #4294967295 } - 8024806: 4618 mov r0, r3 - 8024808: 370c adds r7, #12 - 802480a: 46bd mov sp, r7 - 802480c: f85d 7b04 ldr.w r7, [sp], #4 - 8024810: 4770 bx lr + 8024836: 4618 mov r0, r3 + 8024838: 370c adds r7, #12 + 802483a: 46bd mov sp, r7 + 802483c: f85d 7b04 ldr.w r7, [sp], #4 + 8024840: 4770 bx lr -08024812 <_fstat>: +08024842 <_fstat>: int _fstat(int file, struct stat *st) { - 8024812: b480 push {r7} - 8024814: b083 sub sp, #12 - 8024816: af00 add r7, sp, #0 - 8024818: 6078 str r0, [r7, #4] - 802481a: 6039 str r1, [r7, #0] + 8024842: b480 push {r7} + 8024844: b083 sub sp, #12 + 8024846: af00 add r7, sp, #0 + 8024848: 6078 str r0, [r7, #4] + 802484a: 6039 str r1, [r7, #0] st->st_mode = S_IFCHR; - 802481c: 683b ldr r3, [r7, #0] - 802481e: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024822: 605a str r2, [r3, #4] + 802484c: 683b ldr r3, [r7, #0] + 802484e: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024852: 605a str r2, [r3, #4] return 0; - 8024824: 2300 movs r3, #0 + 8024854: 2300 movs r3, #0 } - 8024826: 4618 mov r0, r3 - 8024828: 370c adds r7, #12 - 802482a: 46bd mov sp, r7 - 802482c: f85d 7b04 ldr.w r7, [sp], #4 - 8024830: 4770 bx lr + 8024856: 4618 mov r0, r3 + 8024858: 370c adds r7, #12 + 802485a: 46bd mov sp, r7 + 802485c: f85d 7b04 ldr.w r7, [sp], #4 + 8024860: 4770 bx lr -08024832 <_isatty>: +08024862 <_isatty>: int _isatty(int file) { - 8024832: b480 push {r7} - 8024834: b083 sub sp, #12 - 8024836: af00 add r7, sp, #0 - 8024838: 6078 str r0, [r7, #4] + 8024862: b480 push {r7} + 8024864: b083 sub sp, #12 + 8024866: af00 add r7, sp, #0 + 8024868: 6078 str r0, [r7, #4] return 1; - 802483a: 2301 movs r3, #1 + 802486a: 2301 movs r3, #1 } - 802483c: 4618 mov r0, r3 - 802483e: 370c adds r7, #12 - 8024840: 46bd mov sp, r7 - 8024842: f85d 7b04 ldr.w r7, [sp], #4 - 8024846: 4770 bx lr + 802486c: 4618 mov r0, r3 + 802486e: 370c adds r7, #12 + 8024870: 46bd mov sp, r7 + 8024872: f85d 7b04 ldr.w r7, [sp], #4 + 8024876: 4770 bx lr -08024848 <_lseek>: +08024878 <_lseek>: int _lseek(int file, int ptr, int dir) { - 8024848: b480 push {r7} - 802484a: b085 sub sp, #20 - 802484c: af00 add r7, sp, #0 - 802484e: 60f8 str r0, [r7, #12] - 8024850: 60b9 str r1, [r7, #8] - 8024852: 607a str r2, [r7, #4] + 8024878: b480 push {r7} + 802487a: b085 sub sp, #20 + 802487c: af00 add r7, sp, #0 + 802487e: 60f8 str r0, [r7, #12] + 8024880: 60b9 str r1, [r7, #8] + 8024882: 607a str r2, [r7, #4] return 0; - 8024854: 2300 movs r3, #0 + 8024884: 2300 movs r3, #0 } - 8024856: 4618 mov r0, r3 - 8024858: 3714 adds r7, #20 - 802485a: 46bd mov sp, r7 - 802485c: f85d 7b04 ldr.w r7, [sp], #4 - 8024860: 4770 bx lr + 8024886: 4618 mov r0, r3 + 8024888: 3714 adds r7, #20 + 802488a: 46bd mov sp, r7 + 802488c: f85d 7b04 ldr.w r7, [sp], #4 + 8024890: 4770 bx lr ... -08024864 <_sbrk>: +08024894 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { - 8024864: b480 push {r7} - 8024866: b087 sub sp, #28 - 8024868: af00 add r7, sp, #0 - 802486a: 6078 str r0, [r7, #4] + 8024894: b480 push {r7} + 8024896: b087 sub sp, #28 + 8024898: af00 add r7, sp, #0 + 802489a: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; - 802486c: 4a14 ldr r2, [pc, #80] ; (80248c0 <_sbrk+0x5c>) - 802486e: 4b15 ldr r3, [pc, #84] ; (80248c4 <_sbrk+0x60>) - 8024870: 1ad3 subs r3, r2, r3 - 8024872: 617b str r3, [r7, #20] + 802489c: 4a14 ldr r2, [pc, #80] ; (80248f0 <_sbrk+0x5c>) + 802489e: 4b15 ldr r3, [pc, #84] ; (80248f4 <_sbrk+0x60>) + 80248a0: 1ad3 subs r3, r2, r3 + 80248a2: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; - 8024874: 697b ldr r3, [r7, #20] - 8024876: 613b str r3, [r7, #16] + 80248a4: 697b ldr r3, [r7, #20] + 80248a6: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) - 8024878: 4b13 ldr r3, [pc, #76] ; (80248c8 <_sbrk+0x64>) - 802487a: 681b ldr r3, [r3, #0] - 802487c: 2b00 cmp r3, #0 - 802487e: d102 bne.n 8024886 <_sbrk+0x22> + 80248a8: 4b13 ldr r3, [pc, #76] ; (80248f8 <_sbrk+0x64>) + 80248aa: 681b ldr r3, [r3, #0] + 80248ac: 2b00 cmp r3, #0 + 80248ae: d102 bne.n 80248b6 <_sbrk+0x22> { __sbrk_heap_end = &_end; - 8024880: 4b11 ldr r3, [pc, #68] ; (80248c8 <_sbrk+0x64>) - 8024882: 4a12 ldr r2, [pc, #72] ; (80248cc <_sbrk+0x68>) - 8024884: 601a str r2, [r3, #0] + 80248b0: 4b11 ldr r3, [pc, #68] ; (80248f8 <_sbrk+0x64>) + 80248b2: 4a12 ldr r2, [pc, #72] ; (80248fc <_sbrk+0x68>) + 80248b4: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) - 8024886: 4b10 ldr r3, [pc, #64] ; (80248c8 <_sbrk+0x64>) - 8024888: 681a ldr r2, [r3, #0] - 802488a: 687b ldr r3, [r7, #4] - 802488c: 4413 add r3, r2 - 802488e: 693a ldr r2, [r7, #16] - 8024890: 429a cmp r2, r3 - 8024892: d205 bcs.n 80248a0 <_sbrk+0x3c> + 80248b6: 4b10 ldr r3, [pc, #64] ; (80248f8 <_sbrk+0x64>) + 80248b8: 681a ldr r2, [r3, #0] + 80248ba: 687b ldr r3, [r7, #4] + 80248bc: 4413 add r3, r2 + 80248be: 693a ldr r2, [r7, #16] + 80248c0: 429a cmp r2, r3 + 80248c2: d205 bcs.n 80248d0 <_sbrk+0x3c> { errno = ENOMEM; - 8024894: 4b0e ldr r3, [pc, #56] ; (80248d0 <_sbrk+0x6c>) - 8024896: 220c movs r2, #12 - 8024898: 601a str r2, [r3, #0] + 80248c4: 4b0e ldr r3, [pc, #56] ; (8024900 <_sbrk+0x6c>) + 80248c6: 220c movs r2, #12 + 80248c8: 601a str r2, [r3, #0] return (void *)-1; - 802489a: f04f 33ff mov.w r3, #4294967295 - 802489e: e009 b.n 80248b4 <_sbrk+0x50> + 80248ca: f04f 33ff mov.w r3, #4294967295 + 80248ce: e009 b.n 80248e4 <_sbrk+0x50> } prev_heap_end = __sbrk_heap_end; - 80248a0: 4b09 ldr r3, [pc, #36] ; (80248c8 <_sbrk+0x64>) - 80248a2: 681b ldr r3, [r3, #0] - 80248a4: 60fb str r3, [r7, #12] + 80248d0: 4b09 ldr r3, [pc, #36] ; (80248f8 <_sbrk+0x64>) + 80248d2: 681b ldr r3, [r3, #0] + 80248d4: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; - 80248a6: 4b08 ldr r3, [pc, #32] ; (80248c8 <_sbrk+0x64>) - 80248a8: 681a ldr r2, [r3, #0] - 80248aa: 687b ldr r3, [r7, #4] - 80248ac: 4413 add r3, r2 - 80248ae: 4a06 ldr r2, [pc, #24] ; (80248c8 <_sbrk+0x64>) - 80248b0: 6013 str r3, [r2, #0] + 80248d6: 4b08 ldr r3, [pc, #32] ; (80248f8 <_sbrk+0x64>) + 80248d8: 681a ldr r2, [r3, #0] + 80248da: 687b ldr r3, [r7, #4] + 80248dc: 4413 add r3, r2 + 80248de: 4a06 ldr r2, [pc, #24] ; (80248f8 <_sbrk+0x64>) + 80248e0: 6013 str r3, [r2, #0] return (void *)prev_heap_end; - 80248b2: 68fb ldr r3, [r7, #12] -} - 80248b4: 4618 mov r0, r3 - 80248b6: 371c adds r7, #28 - 80248b8: 46bd mov sp, r7 - 80248ba: f85d 7b04 ldr.w r7, [sp], #4 - 80248be: 4770 bx lr - 80248c0: 24080000 .word 0x24080000 - 80248c4: 00001000 .word 0x00001000 - 80248c8: 2400af78 .word 0x2400af78 - 80248cc: 2400eac8 .word 0x2400eac8 - 80248d0: 2400eabc .word 0x2400eabc - -080248d4 : + 80248e2: 68fb ldr r3, [r7, #12] +} + 80248e4: 4618 mov r0, r3 + 80248e6: 371c adds r7, #28 + 80248e8: 46bd mov sp, r7 + 80248ea: f85d 7b04 ldr.w r7, [sp], #4 + 80248ee: 4770 bx lr + 80248f0: 24080000 .word 0x24080000 + 80248f4: 00001000 .word 0x00001000 + 80248f8: 2400af78 .word 0x2400af78 + 80248fc: 2400eac8 .word 0x2400eac8 + 8024900: 2400eabc .word 0x2400eabc + +08024904 : * configuration. * @param None * @retval None */ void SystemInit (void) { - 80248d4: b480 push {r7} - 80248d6: af00 add r7, sp, #0 + 8024904: b480 push {r7} + 8024906: af00 add r7, sp, #0 __IO uint32_t tmpreg; #endif /* DATA_IN_D2_SRAM */ /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */ - 80248d8: 4b39 ldr r3, [pc, #228] ; (80249c0 ) - 80248da: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 80248de: 4a38 ldr r2, [pc, #224] ; (80249c0 ) - 80248e0: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 80248e4: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 8024908: 4b39 ldr r3, [pc, #228] ; (80249f0 ) + 802490a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802490e: 4a38 ldr r2, [pc, #224] ; (80249f0 ) + 8024910: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 + 8024914: f8c2 3088 str.w r3, [r2, #136] ; 0x88 #endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Increasing the CPU frequency */ if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) - 80248e8: 4b36 ldr r3, [pc, #216] ; (80249c4 ) - 80248ea: 681b ldr r3, [r3, #0] - 80248ec: f003 030f and.w r3, r3, #15 - 80248f0: 2b06 cmp r3, #6 - 80248f2: d807 bhi.n 8024904 + 8024918: 4b36 ldr r3, [pc, #216] ; (80249f4 ) + 802491a: 681b ldr r3, [r3, #0] + 802491c: f003 030f and.w r3, r3, #15 + 8024920: 2b06 cmp r3, #6 + 8024922: d807 bhi.n 8024934 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); - 80248f4: 4b33 ldr r3, [pc, #204] ; (80249c4 ) - 80248f6: 681b ldr r3, [r3, #0] - 80248f8: f023 030f bic.w r3, r3, #15 - 80248fc: 4a31 ldr r2, [pc, #196] ; (80249c4 ) - 80248fe: f043 0307 orr.w r3, r3, #7 - 8024902: 6013 str r3, [r2, #0] + 8024924: 4b33 ldr r3, [pc, #204] ; (80249f4 ) + 8024926: 681b ldr r3, [r3, #0] + 8024928: f023 030f bic.w r3, r3, #15 + 802492c: 4a31 ldr r2, [pc, #196] ; (80249f4 ) + 802492e: f043 0307 orr.w r3, r3, #7 + 8024932: 6013 str r3, [r2, #0] } /* Set HSION bit */ RCC->CR |= RCC_CR_HSION; - 8024904: 4b30 ldr r3, [pc, #192] ; (80249c8 ) - 8024906: 681b ldr r3, [r3, #0] - 8024908: 4a2f ldr r2, [pc, #188] ; (80249c8 ) - 802490a: f043 0301 orr.w r3, r3, #1 - 802490e: 6013 str r3, [r2, #0] + 8024934: 4b30 ldr r3, [pc, #192] ; (80249f8 ) + 8024936: 681b ldr r3, [r3, #0] + 8024938: 4a2f ldr r2, [pc, #188] ; (80249f8 ) + 802493a: f043 0301 orr.w r3, r3, #1 + 802493e: 6013 str r3, [r2, #0] /* Reset CFGR register */ RCC->CFGR = 0x00000000; - 8024910: 4b2d ldr r3, [pc, #180] ; (80249c8 ) - 8024912: 2200 movs r2, #0 - 8024914: 611a str r2, [r3, #16] + 8024940: 4b2d ldr r3, [pc, #180] ; (80249f8 ) + 8024942: 2200 movs r2, #0 + 8024944: 611a str r2, [r3, #16] /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */ RCC->CR &= 0xEAF6ED7FU; - 8024916: 4b2c ldr r3, [pc, #176] ; (80249c8 ) - 8024918: 681a ldr r2, [r3, #0] - 802491a: 492b ldr r1, [pc, #172] ; (80249c8 ) - 802491c: 4b2b ldr r3, [pc, #172] ; (80249cc ) - 802491e: 4013 ands r3, r2 - 8024920: 600b str r3, [r1, #0] + 8024946: 4b2c ldr r3, [pc, #176] ; (80249f8 ) + 8024948: 681a ldr r2, [r3, #0] + 802494a: 492b ldr r1, [pc, #172] ; (80249f8 ) + 802494c: 4b2b ldr r3, [pc, #172] ; (80249fc ) + 802494e: 4013 ands r3, r2 + 8024950: 600b str r3, [r1, #0] /* Decreasing the number of wait states because of lower CPU frequency */ if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) - 8024922: 4b28 ldr r3, [pc, #160] ; (80249c4 ) - 8024924: 681b ldr r3, [r3, #0] - 8024926: f003 0308 and.w r3, r3, #8 - 802492a: 2b00 cmp r3, #0 - 802492c: d007 beq.n 802493e + 8024952: 4b28 ldr r3, [pc, #160] ; (80249f4 ) + 8024954: 681b ldr r3, [r3, #0] + 8024956: f003 0308 and.w r3, r3, #8 + 802495a: 2b00 cmp r3, #0 + 802495c: d007 beq.n 802496e { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); - 802492e: 4b25 ldr r3, [pc, #148] ; (80249c4 ) - 8024930: 681b ldr r3, [r3, #0] - 8024932: f023 030f bic.w r3, r3, #15 - 8024936: 4a23 ldr r2, [pc, #140] ; (80249c4 ) - 8024938: f043 0307 orr.w r3, r3, #7 - 802493c: 6013 str r3, [r2, #0] + 802495e: 4b25 ldr r3, [pc, #148] ; (80249f4 ) + 8024960: 681b ldr r3, [r3, #0] + 8024962: f023 030f bic.w r3, r3, #15 + 8024966: 4a23 ldr r2, [pc, #140] ; (80249f4 ) + 8024968: f043 0307 orr.w r3, r3, #7 + 802496c: 6013 str r3, [r2, #0] } #if defined(D3_SRAM_BASE) /* Reset D1CFGR register */ RCC->D1CFGR = 0x00000000; - 802493e: 4b22 ldr r3, [pc, #136] ; (80249c8 ) - 8024940: 2200 movs r2, #0 - 8024942: 619a str r2, [r3, #24] + 802496e: 4b22 ldr r3, [pc, #136] ; (80249f8 ) + 8024970: 2200 movs r2, #0 + 8024972: 619a str r2, [r3, #24] /* Reset D2CFGR register */ RCC->D2CFGR = 0x00000000; - 8024944: 4b20 ldr r3, [pc, #128] ; (80249c8 ) - 8024946: 2200 movs r2, #0 - 8024948: 61da str r2, [r3, #28] + 8024974: 4b20 ldr r3, [pc, #128] ; (80249f8 ) + 8024976: 2200 movs r2, #0 + 8024978: 61da str r2, [r3, #28] /* Reset D3CFGR register */ RCC->D3CFGR = 0x00000000; - 802494a: 4b1f ldr r3, [pc, #124] ; (80249c8 ) - 802494c: 2200 movs r2, #0 - 802494e: 621a str r2, [r3, #32] + 802497a: 4b1f ldr r3, [pc, #124] ; (80249f8 ) + 802497c: 2200 movs r2, #0 + 802497e: 621a str r2, [r3, #32] /* Reset SRDCFGR register */ RCC->SRDCFGR = 0x00000000; #endif /* Reset PLLCKSELR register */ RCC->PLLCKSELR = 0x02020200; - 8024950: 4b1d ldr r3, [pc, #116] ; (80249c8 ) - 8024952: 4a1f ldr r2, [pc, #124] ; (80249d0 ) - 8024954: 629a str r2, [r3, #40] ; 0x28 + 8024980: 4b1d ldr r3, [pc, #116] ; (80249f8 ) + 8024982: 4a1f ldr r2, [pc, #124] ; (8024a00 ) + 8024984: 629a str r2, [r3, #40] ; 0x28 /* Reset PLLCFGR register */ RCC->PLLCFGR = 0x01FF0000; - 8024956: 4b1c ldr r3, [pc, #112] ; (80249c8 ) - 8024958: 4a1e ldr r2, [pc, #120] ; (80249d4 ) - 802495a: 62da str r2, [r3, #44] ; 0x2c + 8024986: 4b1c ldr r3, [pc, #112] ; (80249f8 ) + 8024988: 4a1e ldr r2, [pc, #120] ; (8024a04 ) + 802498a: 62da str r2, [r3, #44] ; 0x2c /* Reset PLL1DIVR register */ RCC->PLL1DIVR = 0x01010280; - 802495c: 4b1a ldr r3, [pc, #104] ; (80249c8 ) - 802495e: 4a1e ldr r2, [pc, #120] ; (80249d8 ) - 8024960: 631a str r2, [r3, #48] ; 0x30 + 802498c: 4b1a ldr r3, [pc, #104] ; (80249f8 ) + 802498e: 4a1e ldr r2, [pc, #120] ; (8024a08 ) + 8024990: 631a str r2, [r3, #48] ; 0x30 /* Reset PLL1FRACR register */ RCC->PLL1FRACR = 0x00000000; - 8024962: 4b19 ldr r3, [pc, #100] ; (80249c8 ) - 8024964: 2200 movs r2, #0 - 8024966: 635a str r2, [r3, #52] ; 0x34 + 8024992: 4b19 ldr r3, [pc, #100] ; (80249f8 ) + 8024994: 2200 movs r2, #0 + 8024996: 635a str r2, [r3, #52] ; 0x34 /* Reset PLL2DIVR register */ RCC->PLL2DIVR = 0x01010280; - 8024968: 4b17 ldr r3, [pc, #92] ; (80249c8 ) - 802496a: 4a1b ldr r2, [pc, #108] ; (80249d8 ) - 802496c: 639a str r2, [r3, #56] ; 0x38 + 8024998: 4b17 ldr r3, [pc, #92] ; (80249f8 ) + 802499a: 4a1b ldr r2, [pc, #108] ; (8024a08 ) + 802499c: 639a str r2, [r3, #56] ; 0x38 /* Reset PLL2FRACR register */ RCC->PLL2FRACR = 0x00000000; - 802496e: 4b16 ldr r3, [pc, #88] ; (80249c8 ) - 8024970: 2200 movs r2, #0 - 8024972: 63da str r2, [r3, #60] ; 0x3c + 802499e: 4b16 ldr r3, [pc, #88] ; (80249f8 ) + 80249a0: 2200 movs r2, #0 + 80249a2: 63da str r2, [r3, #60] ; 0x3c /* Reset PLL3DIVR register */ RCC->PLL3DIVR = 0x01010280; - 8024974: 4b14 ldr r3, [pc, #80] ; (80249c8 ) - 8024976: 4a18 ldr r2, [pc, #96] ; (80249d8 ) - 8024978: 641a str r2, [r3, #64] ; 0x40 + 80249a4: 4b14 ldr r3, [pc, #80] ; (80249f8 ) + 80249a6: 4a18 ldr r2, [pc, #96] ; (8024a08 ) + 80249a8: 641a str r2, [r3, #64] ; 0x40 /* Reset PLL3FRACR register */ RCC->PLL3FRACR = 0x00000000; - 802497a: 4b13 ldr r3, [pc, #76] ; (80249c8 ) - 802497c: 2200 movs r2, #0 - 802497e: 645a str r2, [r3, #68] ; 0x44 + 80249aa: 4b13 ldr r3, [pc, #76] ; (80249f8 ) + 80249ac: 2200 movs r2, #0 + 80249ae: 645a str r2, [r3, #68] ; 0x44 /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; - 8024980: 4b11 ldr r3, [pc, #68] ; (80249c8 ) - 8024982: 681b ldr r3, [r3, #0] - 8024984: 4a10 ldr r2, [pc, #64] ; (80249c8 ) - 8024986: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 802498a: 6013 str r3, [r2, #0] + 80249b0: 4b11 ldr r3, [pc, #68] ; (80249f8 ) + 80249b2: 681b ldr r3, [r3, #0] + 80249b4: 4a10 ldr r2, [pc, #64] ; (80249f8 ) + 80249b6: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 80249ba: 6013 str r3, [r2, #0] /* Disable all interrupts */ RCC->CIER = 0x00000000; - 802498c: 4b0e ldr r3, [pc, #56] ; (80249c8 ) - 802498e: 2200 movs r2, #0 - 8024990: 661a str r2, [r3, #96] ; 0x60 + 80249bc: 4b0e ldr r3, [pc, #56] ; (80249f8 ) + 80249be: 2200 movs r2, #0 + 80249c0: 661a str r2, [r3, #96] ; 0x60 #if (STM32H7_DEV_ID == 0x450UL) /* dual core CM7 or single core line */ if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U) - 8024992: 4b12 ldr r3, [pc, #72] ; (80249dc ) - 8024994: 681a ldr r2, [r3, #0] - 8024996: 4b12 ldr r3, [pc, #72] ; (80249e0 ) - 8024998: 4013 ands r3, r2 - 802499a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 802499e: d202 bcs.n 80249a6 + 80249c2: 4b12 ldr r3, [pc, #72] ; (8024a0c ) + 80249c4: 681a ldr r2, [r3, #0] + 80249c6: 4b12 ldr r3, [pc, #72] ; (8024a10 ) + 80249c8: 4013 ands r3, r2 + 80249ca: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80249ce: d202 bcs.n 80249d6 { /* if stm32h7 revY*/ /* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */ *((__IO uint32_t*)0x51008108) = 0x000000001U; - 80249a0: 4b10 ldr r3, [pc, #64] ; (80249e4 ) - 80249a2: 2201 movs r2, #1 - 80249a4: 601a str r2, [r3, #0] + 80249d0: 4b10 ldr r3, [pc, #64] ; (8024a14 ) + 80249d2: 2201 movs r2, #1 + 80249d4: 601a str r2, [r3, #0] /* * Disable the FMC bank1 (enabled after reset). * This, prevents CPU speculation access on this bank which blocks the use of FMC during * 24us. During this time the others FMC master (such as LTDC) cannot use it! */ FMC_Bank1_R->BTCR[0] = 0x000030D2; - 80249a6: 4b10 ldr r3, [pc, #64] ; (80249e8 ) - 80249a8: f243 02d2 movw r2, #12498 ; 0x30d2 - 80249ac: 601a str r2, [r3, #0] + 80249d6: 4b10 ldr r3, [pc, #64] ; (8024a18 ) + 80249d8: f243 02d2 movw r2, #12498 ; 0x30d2 + 80249dc: 601a str r2, [r3, #0] /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */ - 80249ae: 4b04 ldr r3, [pc, #16] ; (80249c0 ) - 80249b0: 4a0e ldr r2, [pc, #56] ; (80249ec ) - 80249b2: 609a str r2, [r3, #8] + 80249de: 4b04 ldr r3, [pc, #16] ; (80249f0 ) + 80249e0: 4a0e ldr r2, [pc, #56] ; (8024a1c ) + 80249e2: 609a str r2, [r3, #8] #endif /* USER_VECT_TAB_ADDRESS */ #endif /*DUAL_CORE && CORE_CM4*/ } - 80249b4: bf00 nop - 80249b6: 46bd mov sp, r7 - 80249b8: f85d 7b04 ldr.w r7, [sp], #4 - 80249bc: 4770 bx lr - 80249be: bf00 nop - 80249c0: e000ed00 .word 0xe000ed00 - 80249c4: 52002000 .word 0x52002000 - 80249c8: 58024400 .word 0x58024400 - 80249cc: eaf6ed7f .word 0xeaf6ed7f - 80249d0: 02020200 .word 0x02020200 - 80249d4: 01ff0000 .word 0x01ff0000 - 80249d8: 01010280 .word 0x01010280 - 80249dc: 5c001000 .word 0x5c001000 - 80249e0: ffff0000 .word 0xffff0000 - 80249e4: 51008108 .word 0x51008108 - 80249e8: 52004000 .word 0x52004000 - 80249ec: 08020000 .word 0x08020000 - -080249f0 : + 80249e4: bf00 nop + 80249e6: 46bd mov sp, r7 + 80249e8: f85d 7b04 ldr.w r7, [sp], #4 + 80249ec: 4770 bx lr + 80249ee: bf00 nop + 80249f0: e000ed00 .word 0xe000ed00 + 80249f4: 52002000 .word 0x52002000 + 80249f8: 58024400 .word 0x58024400 + 80249fc: eaf6ed7f .word 0xeaf6ed7f + 8024a00: 02020200 .word 0x02020200 + 8024a04: 01ff0000 .word 0x01ff0000 + 8024a08: 01010280 .word 0x01010280 + 8024a0c: 5c001000 .word 0x5c001000 + 8024a10: ffff0000 .word 0xffff0000 + 8024a14: 51008108 .word 0x51008108 + 8024a18: 52004000 .word 0x52004000 + 8024a1c: 08020000 .word 0x08020000 + +08024a20 : TIM_HandleTypeDef htim1; TIM_HandleTypeDef htim8; /* TIM1 init function */ void MX_TIM1_Init(void) { - 80249f0: b580 push {r7, lr} - 80249f2: b088 sub sp, #32 - 80249f4: af00 add r7, sp, #0 + 8024a20: b580 push {r7, lr} + 8024a22: b088 sub sp, #32 + 8024a24: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_Init 0 */ /* USER CODE END TIM1_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 80249f6: f107 0310 add.w r3, r7, #16 - 80249fa: 2200 movs r2, #0 - 80249fc: 601a str r2, [r3, #0] - 80249fe: 605a str r2, [r3, #4] - 8024a00: 609a str r2, [r3, #8] - 8024a02: 60da str r2, [r3, #12] + 8024a26: f107 0310 add.w r3, r7, #16 + 8024a2a: 2200 movs r2, #0 + 8024a2c: 601a str r2, [r3, #0] + 8024a2e: 605a str r2, [r3, #4] + 8024a30: 609a str r2, [r3, #8] + 8024a32: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8024a04: 1d3b adds r3, r7, #4 - 8024a06: 2200 movs r2, #0 - 8024a08: 601a str r2, [r3, #0] - 8024a0a: 605a str r2, [r3, #4] - 8024a0c: 609a str r2, [r3, #8] + 8024a34: 1d3b adds r3, r7, #4 + 8024a36: 2200 movs r2, #0 + 8024a38: 601a str r2, [r3, #0] + 8024a3a: 605a str r2, [r3, #4] + 8024a3c: 609a str r2, [r3, #8] /* USER CODE BEGIN TIM1_Init 1 */ /* USER CODE END TIM1_Init 1 */ htim1.Instance = TIM1; - 8024a0e: 4b20 ldr r3, [pc, #128] ; (8024a90 ) - 8024a10: 4a20 ldr r2, [pc, #128] ; (8024a94 ) - 8024a12: 601a str r2, [r3, #0] + 8024a3e: 4b20 ldr r3, [pc, #128] ; (8024ac0 ) + 8024a40: 4a20 ldr r2, [pc, #128] ; (8024ac4 ) + 8024a42: 601a str r2, [r3, #0] htim1.Init.Prescaler = 2000-1; - 8024a14: 4b1e ldr r3, [pc, #120] ; (8024a90 ) - 8024a16: f240 72cf movw r2, #1999 ; 0x7cf - 8024a1a: 605a str r2, [r3, #4] + 8024a44: 4b1e ldr r3, [pc, #120] ; (8024ac0 ) + 8024a46: f240 72cf movw r2, #1999 ; 0x7cf + 8024a4a: 605a str r2, [r3, #4] htim1.Init.CounterMode = TIM_COUNTERMODE_UP; - 8024a1c: 4b1c ldr r3, [pc, #112] ; (8024a90 ) - 8024a1e: 2200 movs r2, #0 - 8024a20: 609a str r2, [r3, #8] + 8024a4c: 4b1c ldr r3, [pc, #112] ; (8024ac0 ) + 8024a4e: 2200 movs r2, #0 + 8024a50: 609a str r2, [r3, #8] htim1.Init.Period = 10000-1; - 8024a22: 4b1b ldr r3, [pc, #108] ; (8024a90 ) - 8024a24: f242 720f movw r2, #9999 ; 0x270f - 8024a28: 60da str r2, [r3, #12] + 8024a52: 4b1b ldr r3, [pc, #108] ; (8024ac0 ) + 8024a54: f242 720f movw r2, #9999 ; 0x270f + 8024a58: 60da str r2, [r3, #12] htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8024a2a: 4b19 ldr r3, [pc, #100] ; (8024a90 ) - 8024a2c: 2200 movs r2, #0 - 8024a2e: 611a str r2, [r3, #16] + 8024a5a: 4b19 ldr r3, [pc, #100] ; (8024ac0 ) + 8024a5c: 2200 movs r2, #0 + 8024a5e: 611a str r2, [r3, #16] htim1.Init.RepetitionCounter = 0; - 8024a30: 4b17 ldr r3, [pc, #92] ; (8024a90 ) - 8024a32: 2200 movs r2, #0 - 8024a34: 615a str r2, [r3, #20] + 8024a60: 4b17 ldr r3, [pc, #92] ; (8024ac0 ) + 8024a62: 2200 movs r2, #0 + 8024a64: 615a str r2, [r3, #20] htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 8024a36: 4b16 ldr r3, [pc, #88] ; (8024a90 ) - 8024a38: 2280 movs r2, #128 ; 0x80 - 8024a3a: 619a str r2, [r3, #24] + 8024a66: 4b16 ldr r3, [pc, #88] ; (8024ac0 ) + 8024a68: 2280 movs r2, #128 ; 0x80 + 8024a6a: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim1) != HAL_OK) - 8024a3c: 4814 ldr r0, [pc, #80] ; (8024a90 ) - 8024a3e: f00d fb2b bl 8032098 - 8024a42: 4603 mov r3, r0 - 8024a44: 2b00 cmp r3, #0 - 8024a46: d001 beq.n 8024a4c + 8024a6c: 4814 ldr r0, [pc, #80] ; (8024ac0 ) + 8024a6e: f00d fb2b bl 80320c8 + 8024a72: 4603 mov r3, r0 + 8024a74: 2b00 cmp r3, #0 + 8024a76: d001 beq.n 8024a7c { Error_Handler(); - 8024a48: f7ff fc58 bl 80242fc + 8024a78: f7ff fc58 bl 802432c } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8024a4c: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8024a50: 613b str r3, [r7, #16] + 8024a7c: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8024a80: 613b str r3, [r7, #16] if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 8024a52: f107 0310 add.w r3, r7, #16 - 8024a56: 4619 mov r1, r3 - 8024a58: 480d ldr r0, [pc, #52] ; (8024a90 ) - 8024a5a: f00d fd0d bl 8032478 - 8024a5e: 4603 mov r3, r0 - 8024a60: 2b00 cmp r3, #0 - 8024a62: d001 beq.n 8024a68 + 8024a82: f107 0310 add.w r3, r7, #16 + 8024a86: 4619 mov r1, r3 + 8024a88: 480d ldr r0, [pc, #52] ; (8024ac0 ) + 8024a8a: f00d fd0d bl 80324a8 + 8024a8e: 4603 mov r3, r0 + 8024a90: 2b00 cmp r3, #0 + 8024a92: d001 beq.n 8024a98 { Error_Handler(); - 8024a64: f7ff fc4a bl 80242fc + 8024a94: f7ff fc4a bl 802432c } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8024a68: 2300 movs r3, #0 - 8024a6a: 607b str r3, [r7, #4] + 8024a98: 2300 movs r3, #0 + 8024a9a: 607b str r3, [r7, #4] sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 8024a6c: 2300 movs r3, #0 - 8024a6e: 60bb str r3, [r7, #8] + 8024a9c: 2300 movs r3, #0 + 8024a9e: 60bb str r3, [r7, #8] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8024a70: 2300 movs r3, #0 - 8024a72: 60fb str r3, [r7, #12] + 8024aa0: 2300 movs r3, #0 + 8024aa2: 60fb str r3, [r7, #12] if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) - 8024a74: 1d3b adds r3, r7, #4 - 8024a76: 4619 mov r1, r3 - 8024a78: 4805 ldr r0, [pc, #20] ; (8024a90 ) - 8024a7a: f00d ff55 bl 8032928 - 8024a7e: 4603 mov r3, r0 - 8024a80: 2b00 cmp r3, #0 - 8024a82: d001 beq.n 8024a88 + 8024aa4: 1d3b adds r3, r7, #4 + 8024aa6: 4619 mov r1, r3 + 8024aa8: 4805 ldr r0, [pc, #20] ; (8024ac0 ) + 8024aaa: f00d ff55 bl 8032958 + 8024aae: 4603 mov r3, r0 + 8024ab0: 2b00 cmp r3, #0 + 8024ab2: d001 beq.n 8024ab8 { Error_Handler(); - 8024a84: f7ff fc3a bl 80242fc + 8024ab4: f7ff fc3a bl 802432c } /* USER CODE BEGIN TIM1_Init 2 */ /* USER CODE END TIM1_Init 2 */ } - 8024a88: bf00 nop - 8024a8a: 3720 adds r7, #32 - 8024a8c: 46bd mov sp, r7 - 8024a8e: bd80 pop {r7, pc} - 8024a90: 2400af7c .word 0x2400af7c - 8024a94: 40010000 .word 0x40010000 + 8024ab8: bf00 nop + 8024aba: 3720 adds r7, #32 + 8024abc: 46bd mov sp, r7 + 8024abe: bd80 pop {r7, pc} + 8024ac0: 2400af7c .word 0x2400af7c + 8024ac4: 40010000 .word 0x40010000 -08024a98 : +08024ac8 : /* TIM8 init function */ void MX_TIM8_Init(void) { - 8024a98: b580 push {r7, lr} - 8024a9a: b088 sub sp, #32 - 8024a9c: af00 add r7, sp, #0 + 8024ac8: b580 push {r7, lr} + 8024aca: b088 sub sp, #32 + 8024acc: af00 add r7, sp, #0 /* USER CODE BEGIN TIM8_Init 0 */ /* USER CODE END TIM8_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 8024a9e: f107 0310 add.w r3, r7, #16 - 8024aa2: 2200 movs r2, #0 - 8024aa4: 601a str r2, [r3, #0] - 8024aa6: 605a str r2, [r3, #4] - 8024aa8: 609a str r2, [r3, #8] - 8024aaa: 60da str r2, [r3, #12] + 8024ace: f107 0310 add.w r3, r7, #16 + 8024ad2: 2200 movs r2, #0 + 8024ad4: 601a str r2, [r3, #0] + 8024ad6: 605a str r2, [r3, #4] + 8024ad8: 609a str r2, [r3, #8] + 8024ada: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8024aac: 1d3b adds r3, r7, #4 - 8024aae: 2200 movs r2, #0 - 8024ab0: 601a str r2, [r3, #0] - 8024ab2: 605a str r2, [r3, #4] - 8024ab4: 609a str r2, [r3, #8] + 8024adc: 1d3b adds r3, r7, #4 + 8024ade: 2200 movs r2, #0 + 8024ae0: 601a str r2, [r3, #0] + 8024ae2: 605a str r2, [r3, #4] + 8024ae4: 609a str r2, [r3, #8] /* USER CODE BEGIN TIM8_Init 1 */ /* USER CODE END TIM8_Init 1 */ htim8.Instance = TIM8; - 8024ab6: 4b20 ldr r3, [pc, #128] ; (8024b38 ) - 8024ab8: 4a20 ldr r2, [pc, #128] ; (8024b3c ) - 8024aba: 601a str r2, [r3, #0] + 8024ae6: 4b20 ldr r3, [pc, #128] ; (8024b68 ) + 8024ae8: 4a20 ldr r2, [pc, #128] ; (8024b6c ) + 8024aea: 601a str r2, [r3, #0] htim8.Init.Prescaler = 2000-1; - 8024abc: 4b1e ldr r3, [pc, #120] ; (8024b38 ) - 8024abe: f240 72cf movw r2, #1999 ; 0x7cf - 8024ac2: 605a str r2, [r3, #4] + 8024aec: 4b1e ldr r3, [pc, #120] ; (8024b68 ) + 8024aee: f240 72cf movw r2, #1999 ; 0x7cf + 8024af2: 605a str r2, [r3, #4] htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 8024ac4: 4b1c ldr r3, [pc, #112] ; (8024b38 ) - 8024ac6: 2200 movs r2, #0 - 8024ac8: 609a str r2, [r3, #8] + 8024af4: 4b1c ldr r3, [pc, #112] ; (8024b68 ) + 8024af6: 2200 movs r2, #0 + 8024af8: 609a str r2, [r3, #8] htim8.Init.Period = 200-1; - 8024aca: 4b1b ldr r3, [pc, #108] ; (8024b38 ) - 8024acc: 22c7 movs r2, #199 ; 0xc7 - 8024ace: 60da str r2, [r3, #12] + 8024afa: 4b1b ldr r3, [pc, #108] ; (8024b68 ) + 8024afc: 22c7 movs r2, #199 ; 0xc7 + 8024afe: 60da str r2, [r3, #12] htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8024ad0: 4b19 ldr r3, [pc, #100] ; (8024b38 ) - 8024ad2: 2200 movs r2, #0 - 8024ad4: 611a str r2, [r3, #16] + 8024b00: 4b19 ldr r3, [pc, #100] ; (8024b68 ) + 8024b02: 2200 movs r2, #0 + 8024b04: 611a str r2, [r3, #16] htim8.Init.RepetitionCounter = 0; - 8024ad6: 4b18 ldr r3, [pc, #96] ; (8024b38 ) - 8024ad8: 2200 movs r2, #0 - 8024ada: 615a str r2, [r3, #20] + 8024b06: 4b18 ldr r3, [pc, #96] ; (8024b68 ) + 8024b08: 2200 movs r2, #0 + 8024b0a: 615a str r2, [r3, #20] htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8024adc: 4b16 ldr r3, [pc, #88] ; (8024b38 ) - 8024ade: 2200 movs r2, #0 - 8024ae0: 619a str r2, [r3, #24] + 8024b0c: 4b16 ldr r3, [pc, #88] ; (8024b68 ) + 8024b0e: 2200 movs r2, #0 + 8024b10: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 8024ae2: 4815 ldr r0, [pc, #84] ; (8024b38 ) - 8024ae4: f00d fad8 bl 8032098 - 8024ae8: 4603 mov r3, r0 - 8024aea: 2b00 cmp r3, #0 - 8024aec: d001 beq.n 8024af2 + 8024b12: 4815 ldr r0, [pc, #84] ; (8024b68 ) + 8024b14: f00d fad8 bl 80320c8 + 8024b18: 4603 mov r3, r0 + 8024b1a: 2b00 cmp r3, #0 + 8024b1c: d001 beq.n 8024b22 { Error_Handler(); - 8024aee: f7ff fc05 bl 80242fc + 8024b1e: f7ff fc05 bl 802432c } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8024af2: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8024af6: 613b str r3, [r7, #16] + 8024b22: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8024b26: 613b str r3, [r7, #16] if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 8024af8: f107 0310 add.w r3, r7, #16 - 8024afc: 4619 mov r1, r3 - 8024afe: 480e ldr r0, [pc, #56] ; (8024b38 ) - 8024b00: f00d fcba bl 8032478 - 8024b04: 4603 mov r3, r0 - 8024b06: 2b00 cmp r3, #0 - 8024b08: d001 beq.n 8024b0e + 8024b28: f107 0310 add.w r3, r7, #16 + 8024b2c: 4619 mov r1, r3 + 8024b2e: 480e ldr r0, [pc, #56] ; (8024b68 ) + 8024b30: f00d fcba bl 80324a8 + 8024b34: 4603 mov r3, r0 + 8024b36: 2b00 cmp r3, #0 + 8024b38: d001 beq.n 8024b3e { Error_Handler(); - 8024b0a: f7ff fbf7 bl 80242fc + 8024b3a: f7ff fbf7 bl 802432c } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8024b0e: 2300 movs r3, #0 - 8024b10: 607b str r3, [r7, #4] + 8024b3e: 2300 movs r3, #0 + 8024b40: 607b str r3, [r7, #4] sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 8024b12: 2300 movs r3, #0 - 8024b14: 60bb str r3, [r7, #8] + 8024b42: 2300 movs r3, #0 + 8024b44: 60bb str r3, [r7, #8] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8024b16: 2300 movs r3, #0 - 8024b18: 60fb str r3, [r7, #12] + 8024b46: 2300 movs r3, #0 + 8024b48: 60fb str r3, [r7, #12] if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 8024b1a: 1d3b adds r3, r7, #4 - 8024b1c: 4619 mov r1, r3 - 8024b1e: 4806 ldr r0, [pc, #24] ; (8024b38 ) - 8024b20: f00d ff02 bl 8032928 - 8024b24: 4603 mov r3, r0 - 8024b26: 2b00 cmp r3, #0 - 8024b28: d001 beq.n 8024b2e + 8024b4a: 1d3b adds r3, r7, #4 + 8024b4c: 4619 mov r1, r3 + 8024b4e: 4806 ldr r0, [pc, #24] ; (8024b68 ) + 8024b50: f00d ff02 bl 8032958 + 8024b54: 4603 mov r3, r0 + 8024b56: 2b00 cmp r3, #0 + 8024b58: d001 beq.n 8024b5e { Error_Handler(); - 8024b2a: f7ff fbe7 bl 80242fc + 8024b5a: f7ff fbe7 bl 802432c } /* USER CODE BEGIN TIM8_Init 2 */ /* USER CODE END TIM8_Init 2 */ } - 8024b2e: bf00 nop - 8024b30: 3720 adds r7, #32 - 8024b32: 46bd mov sp, r7 - 8024b34: bd80 pop {r7, pc} - 8024b36: bf00 nop - 8024b38: 2400afc8 .word 0x2400afc8 - 8024b3c: 40010400 .word 0x40010400 + 8024b5e: bf00 nop + 8024b60: 3720 adds r7, #32 + 8024b62: 46bd mov sp, r7 + 8024b64: bd80 pop {r7, pc} + 8024b66: bf00 nop + 8024b68: 2400afc8 .word 0x2400afc8 + 8024b6c: 40010400 .word 0x40010400 -08024b40 : +08024b70 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { - 8024b40: b580 push {r7, lr} - 8024b42: b084 sub sp, #16 - 8024b44: af00 add r7, sp, #0 - 8024b46: 6078 str r0, [r7, #4] + 8024b70: b580 push {r7, lr} + 8024b72: b084 sub sp, #16 + 8024b74: af00 add r7, sp, #0 + 8024b76: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM1) - 8024b48: 687b ldr r3, [r7, #4] - 8024b4a: 681b ldr r3, [r3, #0] - 8024b4c: 4a1d ldr r2, [pc, #116] ; (8024bc4 ) - 8024b4e: 4293 cmp r3, r2 - 8024b50: d117 bne.n 8024b82 + 8024b78: 687b ldr r3, [r7, #4] + 8024b7a: 681b ldr r3, [r3, #0] + 8024b7c: 4a1d ldr r2, [pc, #116] ; (8024bf4 ) + 8024b7e: 4293 cmp r3, r2 + 8024b80: d117 bne.n 8024bb2 { /* USER CODE BEGIN TIM1_MspInit 0 */ /* USER CODE END TIM1_MspInit 0 */ /* TIM1 clock enable */ __HAL_RCC_TIM1_CLK_ENABLE(); - 8024b52: 4b1d ldr r3, [pc, #116] ; (8024bc8 ) - 8024b54: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8024b58: 4a1b ldr r2, [pc, #108] ; (8024bc8 ) - 8024b5a: f043 0301 orr.w r3, r3, #1 - 8024b5e: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 - 8024b62: 4b19 ldr r3, [pc, #100] ; (8024bc8 ) - 8024b64: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8024b68: f003 0301 and.w r3, r3, #1 - 8024b6c: 60fb str r3, [r7, #12] - 8024b6e: 68fb ldr r3, [r7, #12] + 8024b82: 4b1d ldr r3, [pc, #116] ; (8024bf8 ) + 8024b84: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8024b88: 4a1b ldr r2, [pc, #108] ; (8024bf8 ) + 8024b8a: f043 0301 orr.w r3, r3, #1 + 8024b8e: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 8024b92: 4b19 ldr r3, [pc, #100] ; (8024bf8 ) + 8024b94: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8024b98: f003 0301 and.w r3, r3, #1 + 8024b9c: 60fb str r3, [r7, #12] + 8024b9e: 68fb ldr r3, [r7, #12] /* TIM1 interrupt Init */ HAL_NVIC_SetPriority(TIM1_UP_IRQn, 0, 0); - 8024b70: 2200 movs r2, #0 - 8024b72: 2100 movs r1, #0 - 8024b74: 2019 movs r0, #25 - 8024b76: f002 ff0c bl 8027992 + 8024ba0: 2200 movs r2, #0 + 8024ba2: 2100 movs r1, #0 + 8024ba4: 2019 movs r0, #25 + 8024ba6: f002 ff0c bl 80279c2 HAL_NVIC_EnableIRQ(TIM1_UP_IRQn); - 8024b7a: 2019 movs r0, #25 - 8024b7c: f002 ff23 bl 80279c6 + 8024baa: 2019 movs r0, #25 + 8024bac: f002 ff23 bl 80279f6 HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn); /* USER CODE BEGIN TIM8_MspInit 1 */ /* USER CODE END TIM8_MspInit 1 */ } } - 8024b80: e01b b.n 8024bba + 8024bb0: e01b b.n 8024bea else if(tim_baseHandle->Instance==TIM8) - 8024b82: 687b ldr r3, [r7, #4] - 8024b84: 681b ldr r3, [r3, #0] - 8024b86: 4a11 ldr r2, [pc, #68] ; (8024bcc ) - 8024b88: 4293 cmp r3, r2 - 8024b8a: d116 bne.n 8024bba + 8024bb2: 687b ldr r3, [r7, #4] + 8024bb4: 681b ldr r3, [r3, #0] + 8024bb6: 4a11 ldr r2, [pc, #68] ; (8024bfc ) + 8024bb8: 4293 cmp r3, r2 + 8024bba: d116 bne.n 8024bea __HAL_RCC_TIM8_CLK_ENABLE(); - 8024b8c: 4b0e ldr r3, [pc, #56] ; (8024bc8 ) - 8024b8e: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8024b92: 4a0d ldr r2, [pc, #52] ; (8024bc8 ) - 8024b94: f043 0302 orr.w r3, r3, #2 - 8024b98: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 - 8024b9c: 4b0a ldr r3, [pc, #40] ; (8024bc8 ) - 8024b9e: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8024ba2: f003 0302 and.w r3, r3, #2 - 8024ba6: 60bb str r3, [r7, #8] - 8024ba8: 68bb ldr r3, [r7, #8] + 8024bbc: 4b0e ldr r3, [pc, #56] ; (8024bf8 ) + 8024bbe: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8024bc2: 4a0d ldr r2, [pc, #52] ; (8024bf8 ) + 8024bc4: f043 0302 orr.w r3, r3, #2 + 8024bc8: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 8024bcc: 4b0a ldr r3, [pc, #40] ; (8024bf8 ) + 8024bce: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8024bd2: f003 0302 and.w r3, r3, #2 + 8024bd6: 60bb str r3, [r7, #8] + 8024bd8: 68bb ldr r3, [r7, #8] HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0); - 8024baa: 2200 movs r2, #0 - 8024bac: 2100 movs r1, #0 - 8024bae: 202c movs r0, #44 ; 0x2c - 8024bb0: f002 feef bl 8027992 + 8024bda: 2200 movs r2, #0 + 8024bdc: 2100 movs r1, #0 + 8024bde: 202c movs r0, #44 ; 0x2c + 8024be0: f002 feef bl 80279c2 HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn); - 8024bb4: 202c movs r0, #44 ; 0x2c - 8024bb6: f002 ff06 bl 80279c6 -} - 8024bba: bf00 nop - 8024bbc: 3710 adds r7, #16 - 8024bbe: 46bd mov sp, r7 - 8024bc0: bd80 pop {r7, pc} - 8024bc2: bf00 nop - 8024bc4: 40010000 .word 0x40010000 - 8024bc8: 58024400 .word 0x58024400 - 8024bcc: 40010400 .word 0x40010400 - -08024bd0 : + 8024be4: 202c movs r0, #44 ; 0x2c + 8024be6: f002 ff06 bl 80279f6 +} + 8024bea: bf00 nop + 8024bec: 3710 adds r7, #16 + 8024bee: 46bd mov sp, r7 + 8024bf0: bd80 pop {r7, pc} + 8024bf2: bf00 nop + 8024bf4: 40010000 .word 0x40010000 + 8024bf8: 58024400 .word 0x58024400 + 8024bfc: 40010400 .word 0x40010400 + +08024c00 : DMA_HandleTypeDef hdma_usart6_tx; /* LPUART1 init function */ void MX_LPUART1_UART_Init(void) { - 8024bd0: b580 push {r7, lr} - 8024bd2: af00 add r7, sp, #0 + 8024c00: b580 push {r7, lr} + 8024c02: af00 add r7, sp, #0 /* USER CODE END LPUART1_Init 0 */ /* USER CODE BEGIN LPUART1_Init 1 */ /* USER CODE END LPUART1_Init 1 */ hlpuart1.Instance = LPUART1; - 8024bd4: 4b26 ldr r3, [pc, #152] ; (8024c70 ) - 8024bd6: 4a27 ldr r2, [pc, #156] ; (8024c74 ) - 8024bd8: 601a str r2, [r3, #0] + 8024c04: 4b26 ldr r3, [pc, #152] ; (8024ca0 ) + 8024c06: 4a27 ldr r2, [pc, #156] ; (8024ca4 ) + 8024c08: 601a str r2, [r3, #0] hlpuart1.Init.BaudRate = 57600; - 8024bda: 4b25 ldr r3, [pc, #148] ; (8024c70 ) - 8024bdc: f44f 4261 mov.w r2, #57600 ; 0xe100 - 8024be0: 605a str r2, [r3, #4] + 8024c0a: 4b25 ldr r3, [pc, #148] ; (8024ca0 ) + 8024c0c: f44f 4261 mov.w r2, #57600 ; 0xe100 + 8024c10: 605a str r2, [r3, #4] hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; - 8024be2: 4b23 ldr r3, [pc, #140] ; (8024c70 ) - 8024be4: 2200 movs r2, #0 - 8024be6: 609a str r2, [r3, #8] + 8024c12: 4b23 ldr r3, [pc, #140] ; (8024ca0 ) + 8024c14: 2200 movs r2, #0 + 8024c16: 609a str r2, [r3, #8] hlpuart1.Init.StopBits = UART_STOPBITS_1; - 8024be8: 4b21 ldr r3, [pc, #132] ; (8024c70 ) - 8024bea: 2200 movs r2, #0 - 8024bec: 60da str r2, [r3, #12] + 8024c18: 4b21 ldr r3, [pc, #132] ; (8024ca0 ) + 8024c1a: 2200 movs r2, #0 + 8024c1c: 60da str r2, [r3, #12] hlpuart1.Init.Parity = UART_PARITY_NONE; - 8024bee: 4b20 ldr r3, [pc, #128] ; (8024c70 ) - 8024bf0: 2200 movs r2, #0 - 8024bf2: 611a str r2, [r3, #16] + 8024c1e: 4b20 ldr r3, [pc, #128] ; (8024ca0 ) + 8024c20: 2200 movs r2, #0 + 8024c22: 611a str r2, [r3, #16] hlpuart1.Init.Mode = UART_MODE_TX_RX; - 8024bf4: 4b1e ldr r3, [pc, #120] ; (8024c70 ) - 8024bf6: 220c movs r2, #12 - 8024bf8: 615a str r2, [r3, #20] + 8024c24: 4b1e ldr r3, [pc, #120] ; (8024ca0 ) + 8024c26: 220c movs r2, #12 + 8024c28: 615a str r2, [r3, #20] hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024bfa: 4b1d ldr r3, [pc, #116] ; (8024c70 ) - 8024bfc: 2200 movs r2, #0 - 8024bfe: 619a str r2, [r3, #24] + 8024c2a: 4b1d ldr r3, [pc, #116] ; (8024ca0 ) + 8024c2c: 2200 movs r2, #0 + 8024c2e: 619a str r2, [r3, #24] hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024c00: 4b1b ldr r3, [pc, #108] ; (8024c70 ) - 8024c02: 2200 movs r2, #0 - 8024c04: 621a str r2, [r3, #32] + 8024c30: 4b1b ldr r3, [pc, #108] ; (8024ca0 ) + 8024c32: 2200 movs r2, #0 + 8024c34: 621a str r2, [r3, #32] hlpuart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024c06: 4b1a ldr r3, [pc, #104] ; (8024c70 ) - 8024c08: 2200 movs r2, #0 - 8024c0a: 625a str r2, [r3, #36] ; 0x24 + 8024c36: 4b1a ldr r3, [pc, #104] ; (8024ca0 ) + 8024c38: 2200 movs r2, #0 + 8024c3a: 625a str r2, [r3, #36] ; 0x24 hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT|UART_ADVFEATURE_DMADISABLEONERROR_INIT; - 8024c0c: 4b18 ldr r3, [pc, #96] ; (8024c70 ) - 8024c0e: 2230 movs r2, #48 ; 0x30 - 8024c10: 629a str r2, [r3, #40] ; 0x28 + 8024c3c: 4b18 ldr r3, [pc, #96] ; (8024ca0 ) + 8024c3e: 2230 movs r2, #48 ; 0x30 + 8024c40: 629a str r2, [r3, #40] ; 0x28 hlpuart1.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024c12: 4b17 ldr r3, [pc, #92] ; (8024c70 ) - 8024c14: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024c18: 63da str r2, [r3, #60] ; 0x3c + 8024c42: 4b17 ldr r3, [pc, #92] ; (8024ca0 ) + 8024c44: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024c48: 63da str r2, [r3, #60] ; 0x3c hlpuart1.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024c1a: 4b15 ldr r3, [pc, #84] ; (8024c70 ) - 8024c1c: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024c20: 641a str r2, [r3, #64] ; 0x40 + 8024c4a: 4b15 ldr r3, [pc, #84] ; (8024ca0 ) + 8024c4c: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024c50: 641a str r2, [r3, #64] ; 0x40 hlpuart1.FifoMode = UART_FIFOMODE_DISABLE; - 8024c22: 4b13 ldr r3, [pc, #76] ; (8024c70 ) - 8024c24: 2200 movs r2, #0 - 8024c26: 665a str r2, [r3, #100] ; 0x64 + 8024c52: 4b13 ldr r3, [pc, #76] ; (8024ca0 ) + 8024c54: 2200 movs r2, #0 + 8024c56: 665a str r2, [r3, #100] ; 0x64 if (HAL_UART_Init(&hlpuart1) != HAL_OK) - 8024c28: 4811 ldr r0, [pc, #68] ; (8024c70 ) - 8024c2a: f00d ff29 bl 8032a80 - 8024c2e: 4603 mov r3, r0 - 8024c30: 2b00 cmp r3, #0 - 8024c32: d001 beq.n 8024c38 + 8024c58: 4811 ldr r0, [pc, #68] ; (8024ca0 ) + 8024c5a: f00d ff29 bl 8032ab0 + 8024c5e: 4603 mov r3, r0 + 8024c60: 2b00 cmp r3, #0 + 8024c62: d001 beq.n 8024c68 { Error_Handler(); - 8024c34: f7ff fb62 bl 80242fc + 8024c64: f7ff fb62 bl 802432c } if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024c38: 2100 movs r1, #0 - 8024c3a: 480d ldr r0, [pc, #52] ; (8024c70 ) - 8024c3c: f010 fb29 bl 8035292 - 8024c40: 4603 mov r3, r0 - 8024c42: 2b00 cmp r3, #0 - 8024c44: d001 beq.n 8024c4a + 8024c68: 2100 movs r1, #0 + 8024c6a: 480d ldr r0, [pc, #52] ; (8024ca0 ) + 8024c6c: f010 fb29 bl 80352c2 + 8024c70: 4603 mov r3, r0 + 8024c72: 2b00 cmp r3, #0 + 8024c74: d001 beq.n 8024c7a { Error_Handler(); - 8024c46: f7ff fb59 bl 80242fc + 8024c76: f7ff fb59 bl 802432c } if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024c4a: 2100 movs r1, #0 - 8024c4c: 4808 ldr r0, [pc, #32] ; (8024c70 ) - 8024c4e: f010 fb5e bl 803530e - 8024c52: 4603 mov r3, r0 - 8024c54: 2b00 cmp r3, #0 - 8024c56: d001 beq.n 8024c5c + 8024c7a: 2100 movs r1, #0 + 8024c7c: 4808 ldr r0, [pc, #32] ; (8024ca0 ) + 8024c7e: f010 fb5e bl 803533e + 8024c82: 4603 mov r3, r0 + 8024c84: 2b00 cmp r3, #0 + 8024c86: d001 beq.n 8024c8c { Error_Handler(); - 8024c58: f7ff fb50 bl 80242fc + 8024c88: f7ff fb50 bl 802432c } if (HAL_UARTEx_DisableFifoMode(&hlpuart1) != HAL_OK) - 8024c5c: 4804 ldr r0, [pc, #16] ; (8024c70 ) - 8024c5e: f010 fadf bl 8035220 - 8024c62: 4603 mov r3, r0 - 8024c64: 2b00 cmp r3, #0 - 8024c66: d001 beq.n 8024c6c + 8024c8c: 4804 ldr r0, [pc, #16] ; (8024ca0 ) + 8024c8e: f010 fadf bl 8035250 + 8024c92: 4603 mov r3, r0 + 8024c94: 2b00 cmp r3, #0 + 8024c96: d001 beq.n 8024c9c { Error_Handler(); - 8024c68: f7ff fb48 bl 80242fc + 8024c98: f7ff fb48 bl 802432c } /* USER CODE BEGIN LPUART1_Init 2 */ /* USER CODE END LPUART1_Init 2 */ } - 8024c6c: bf00 nop - 8024c6e: bd80 pop {r7, pc} - 8024c70: 2400b014 .word 0x2400b014 - 8024c74: 58000c00 .word 0x58000c00 + 8024c9c: bf00 nop + 8024c9e: bd80 pop {r7, pc} + 8024ca0: 2400b014 .word 0x2400b014 + 8024ca4: 58000c00 .word 0x58000c00 -08024c78 : +08024ca8 : /* UART4 init function */ void MX_UART4_Init(void) { - 8024c78: b580 push {r7, lr} - 8024c7a: af00 add r7, sp, #0 + 8024ca8: b580 push {r7, lr} + 8024caa: af00 add r7, sp, #0 /* USER CODE END UART4_Init 0 */ /* USER CODE BEGIN UART4_Init 1 */ /* USER CODE END UART4_Init 1 */ huart4.Instance = UART4; - 8024c7c: 4b26 ldr r3, [pc, #152] ; (8024d18 ) - 8024c7e: 4a27 ldr r2, [pc, #156] ; (8024d1c ) - 8024c80: 601a str r2, [r3, #0] + 8024cac: 4b26 ldr r3, [pc, #152] ; (8024d48 ) + 8024cae: 4a27 ldr r2, [pc, #156] ; (8024d4c ) + 8024cb0: 601a str r2, [r3, #0] huart4.Init.BaudRate = 115200; - 8024c82: 4b25 ldr r3, [pc, #148] ; (8024d18 ) - 8024c84: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8024c88: 605a str r2, [r3, #4] + 8024cb2: 4b25 ldr r3, [pc, #148] ; (8024d48 ) + 8024cb4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8024cb8: 605a str r2, [r3, #4] huart4.Init.WordLength = UART_WORDLENGTH_8B; - 8024c8a: 4b23 ldr r3, [pc, #140] ; (8024d18 ) - 8024c8c: 2200 movs r2, #0 - 8024c8e: 609a str r2, [r3, #8] + 8024cba: 4b23 ldr r3, [pc, #140] ; (8024d48 ) + 8024cbc: 2200 movs r2, #0 + 8024cbe: 609a str r2, [r3, #8] huart4.Init.StopBits = UART_STOPBITS_1; - 8024c90: 4b21 ldr r3, [pc, #132] ; (8024d18 ) - 8024c92: 2200 movs r2, #0 - 8024c94: 60da str r2, [r3, #12] + 8024cc0: 4b21 ldr r3, [pc, #132] ; (8024d48 ) + 8024cc2: 2200 movs r2, #0 + 8024cc4: 60da str r2, [r3, #12] huart4.Init.Parity = UART_PARITY_NONE; - 8024c96: 4b20 ldr r3, [pc, #128] ; (8024d18 ) - 8024c98: 2200 movs r2, #0 - 8024c9a: 611a str r2, [r3, #16] + 8024cc6: 4b20 ldr r3, [pc, #128] ; (8024d48 ) + 8024cc8: 2200 movs r2, #0 + 8024cca: 611a str r2, [r3, #16] huart4.Init.Mode = UART_MODE_TX_RX; - 8024c9c: 4b1e ldr r3, [pc, #120] ; (8024d18 ) - 8024c9e: 220c movs r2, #12 - 8024ca0: 615a str r2, [r3, #20] + 8024ccc: 4b1e ldr r3, [pc, #120] ; (8024d48 ) + 8024cce: 220c movs r2, #12 + 8024cd0: 615a str r2, [r3, #20] huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024ca2: 4b1d ldr r3, [pc, #116] ; (8024d18 ) - 8024ca4: 2200 movs r2, #0 - 8024ca6: 619a str r2, [r3, #24] + 8024cd2: 4b1d ldr r3, [pc, #116] ; (8024d48 ) + 8024cd4: 2200 movs r2, #0 + 8024cd6: 619a str r2, [r3, #24] huart4.Init.OverSampling = UART_OVERSAMPLING_16; - 8024ca8: 4b1b ldr r3, [pc, #108] ; (8024d18 ) - 8024caa: 2200 movs r2, #0 - 8024cac: 61da str r2, [r3, #28] + 8024cd8: 4b1b ldr r3, [pc, #108] ; (8024d48 ) + 8024cda: 2200 movs r2, #0 + 8024cdc: 61da str r2, [r3, #28] huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024cae: 4b1a ldr r3, [pc, #104] ; (8024d18 ) - 8024cb0: 2200 movs r2, #0 - 8024cb2: 621a str r2, [r3, #32] + 8024cde: 4b1a ldr r3, [pc, #104] ; (8024d48 ) + 8024ce0: 2200 movs r2, #0 + 8024ce2: 621a str r2, [r3, #32] huart4.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024cb4: 4b18 ldr r3, [pc, #96] ; (8024d18 ) - 8024cb6: 2200 movs r2, #0 - 8024cb8: 625a str r2, [r3, #36] ; 0x24 + 8024ce4: 4b18 ldr r3, [pc, #96] ; (8024d48 ) + 8024ce6: 2200 movs r2, #0 + 8024ce8: 625a str r2, [r3, #36] ; 0x24 huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT|UART_ADVFEATURE_DMADISABLEONERROR_INIT; - 8024cba: 4b17 ldr r3, [pc, #92] ; (8024d18 ) - 8024cbc: 2230 movs r2, #48 ; 0x30 - 8024cbe: 629a str r2, [r3, #40] ; 0x28 + 8024cea: 4b17 ldr r3, [pc, #92] ; (8024d48 ) + 8024cec: 2230 movs r2, #48 ; 0x30 + 8024cee: 629a str r2, [r3, #40] ; 0x28 huart4.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024cc0: 4b15 ldr r3, [pc, #84] ; (8024d18 ) - 8024cc2: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024cc6: 63da str r2, [r3, #60] ; 0x3c + 8024cf0: 4b15 ldr r3, [pc, #84] ; (8024d48 ) + 8024cf2: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024cf6: 63da str r2, [r3, #60] ; 0x3c huart4.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024cc8: 4b13 ldr r3, [pc, #76] ; (8024d18 ) - 8024cca: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024cce: 641a str r2, [r3, #64] ; 0x40 + 8024cf8: 4b13 ldr r3, [pc, #76] ; (8024d48 ) + 8024cfa: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024cfe: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart4) != HAL_OK) - 8024cd0: 4811 ldr r0, [pc, #68] ; (8024d18 ) - 8024cd2: f00d fed5 bl 8032a80 - 8024cd6: 4603 mov r3, r0 - 8024cd8: 2b00 cmp r3, #0 - 8024cda: d001 beq.n 8024ce0 + 8024d00: 4811 ldr r0, [pc, #68] ; (8024d48 ) + 8024d02: f00d fed5 bl 8032ab0 + 8024d06: 4603 mov r3, r0 + 8024d08: 2b00 cmp r3, #0 + 8024d0a: d001 beq.n 8024d10 { Error_Handler(); - 8024cdc: f7ff fb0e bl 80242fc + 8024d0c: f7ff fb0e bl 802432c } if (HAL_UARTEx_SetTxFifoThreshold(&huart4, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024ce0: 2100 movs r1, #0 - 8024ce2: 480d ldr r0, [pc, #52] ; (8024d18 ) - 8024ce4: f010 fad5 bl 8035292 - 8024ce8: 4603 mov r3, r0 - 8024cea: 2b00 cmp r3, #0 - 8024cec: d001 beq.n 8024cf2 + 8024d10: 2100 movs r1, #0 + 8024d12: 480d ldr r0, [pc, #52] ; (8024d48 ) + 8024d14: f010 fad5 bl 80352c2 + 8024d18: 4603 mov r3, r0 + 8024d1a: 2b00 cmp r3, #0 + 8024d1c: d001 beq.n 8024d22 { Error_Handler(); - 8024cee: f7ff fb05 bl 80242fc + 8024d1e: f7ff fb05 bl 802432c } if (HAL_UARTEx_SetRxFifoThreshold(&huart4, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024cf2: 2100 movs r1, #0 - 8024cf4: 4808 ldr r0, [pc, #32] ; (8024d18 ) - 8024cf6: f010 fb0a bl 803530e - 8024cfa: 4603 mov r3, r0 - 8024cfc: 2b00 cmp r3, #0 - 8024cfe: d001 beq.n 8024d04 + 8024d22: 2100 movs r1, #0 + 8024d24: 4808 ldr r0, [pc, #32] ; (8024d48 ) + 8024d26: f010 fb0a bl 803533e + 8024d2a: 4603 mov r3, r0 + 8024d2c: 2b00 cmp r3, #0 + 8024d2e: d001 beq.n 8024d34 { Error_Handler(); - 8024d00: f7ff fafc bl 80242fc + 8024d30: f7ff fafc bl 802432c } if (HAL_UARTEx_DisableFifoMode(&huart4) != HAL_OK) - 8024d04: 4804 ldr r0, [pc, #16] ; (8024d18 ) - 8024d06: f010 fa8b bl 8035220 - 8024d0a: 4603 mov r3, r0 - 8024d0c: 2b00 cmp r3, #0 - 8024d0e: d001 beq.n 8024d14 + 8024d34: 4804 ldr r0, [pc, #16] ; (8024d48 ) + 8024d36: f010 fa8b bl 8035250 + 8024d3a: 4603 mov r3, r0 + 8024d3c: 2b00 cmp r3, #0 + 8024d3e: d001 beq.n 8024d44 { Error_Handler(); - 8024d10: f7ff faf4 bl 80242fc + 8024d40: f7ff faf4 bl 802432c } /* USER CODE BEGIN UART4_Init 2 */ /* USER CODE END UART4_Init 2 */ } - 8024d14: bf00 nop - 8024d16: bd80 pop {r7, pc} - 8024d18: 2400b0a4 .word 0x2400b0a4 - 8024d1c: 40004c00 .word 0x40004c00 + 8024d44: bf00 nop + 8024d46: bd80 pop {r7, pc} + 8024d48: 2400b0a4 .word 0x2400b0a4 + 8024d4c: 40004c00 .word 0x40004c00 -08024d20 : +08024d50 : /* UART5 init function */ void MX_UART5_Init(void) { - 8024d20: b580 push {r7, lr} - 8024d22: af00 add r7, sp, #0 + 8024d50: b580 push {r7, lr} + 8024d52: af00 add r7, sp, #0 /* USER CODE END UART5_Init 0 */ /* USER CODE BEGIN UART5_Init 1 */ /* USER CODE END UART5_Init 1 */ huart5.Instance = UART5; - 8024d24: 4b26 ldr r3, [pc, #152] ; (8024dc0 ) - 8024d26: 4a27 ldr r2, [pc, #156] ; (8024dc4 ) - 8024d28: 601a str r2, [r3, #0] + 8024d54: 4b26 ldr r3, [pc, #152] ; (8024df0 ) + 8024d56: 4a27 ldr r2, [pc, #156] ; (8024df4 ) + 8024d58: 601a str r2, [r3, #0] huart5.Init.BaudRate = 57600; - 8024d2a: 4b25 ldr r3, [pc, #148] ; (8024dc0 ) - 8024d2c: f44f 4261 mov.w r2, #57600 ; 0xe100 - 8024d30: 605a str r2, [r3, #4] + 8024d5a: 4b25 ldr r3, [pc, #148] ; (8024df0 ) + 8024d5c: f44f 4261 mov.w r2, #57600 ; 0xe100 + 8024d60: 605a str r2, [r3, #4] huart5.Init.WordLength = UART_WORDLENGTH_8B; - 8024d32: 4b23 ldr r3, [pc, #140] ; (8024dc0 ) - 8024d34: 2200 movs r2, #0 - 8024d36: 609a str r2, [r3, #8] + 8024d62: 4b23 ldr r3, [pc, #140] ; (8024df0 ) + 8024d64: 2200 movs r2, #0 + 8024d66: 609a str r2, [r3, #8] huart5.Init.StopBits = UART_STOPBITS_1; - 8024d38: 4b21 ldr r3, [pc, #132] ; (8024dc0 ) - 8024d3a: 2200 movs r2, #0 - 8024d3c: 60da str r2, [r3, #12] + 8024d68: 4b21 ldr r3, [pc, #132] ; (8024df0 ) + 8024d6a: 2200 movs r2, #0 + 8024d6c: 60da str r2, [r3, #12] huart5.Init.Parity = UART_PARITY_NONE; - 8024d3e: 4b20 ldr r3, [pc, #128] ; (8024dc0 ) - 8024d40: 2200 movs r2, #0 - 8024d42: 611a str r2, [r3, #16] + 8024d6e: 4b20 ldr r3, [pc, #128] ; (8024df0 ) + 8024d70: 2200 movs r2, #0 + 8024d72: 611a str r2, [r3, #16] huart5.Init.Mode = UART_MODE_TX_RX; - 8024d44: 4b1e ldr r3, [pc, #120] ; (8024dc0 ) - 8024d46: 220c movs r2, #12 - 8024d48: 615a str r2, [r3, #20] + 8024d74: 4b1e ldr r3, [pc, #120] ; (8024df0 ) + 8024d76: 220c movs r2, #12 + 8024d78: 615a str r2, [r3, #20] huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024d4a: 4b1d ldr r3, [pc, #116] ; (8024dc0 ) - 8024d4c: 2200 movs r2, #0 - 8024d4e: 619a str r2, [r3, #24] + 8024d7a: 4b1d ldr r3, [pc, #116] ; (8024df0 ) + 8024d7c: 2200 movs r2, #0 + 8024d7e: 619a str r2, [r3, #24] huart5.Init.OverSampling = UART_OVERSAMPLING_16; - 8024d50: 4b1b ldr r3, [pc, #108] ; (8024dc0 ) - 8024d52: 2200 movs r2, #0 - 8024d54: 61da str r2, [r3, #28] + 8024d80: 4b1b ldr r3, [pc, #108] ; (8024df0 ) + 8024d82: 2200 movs r2, #0 + 8024d84: 61da str r2, [r3, #28] huart5.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024d56: 4b1a ldr r3, [pc, #104] ; (8024dc0 ) - 8024d58: 2200 movs r2, #0 - 8024d5a: 621a str r2, [r3, #32] + 8024d86: 4b1a ldr r3, [pc, #104] ; (8024df0 ) + 8024d88: 2200 movs r2, #0 + 8024d8a: 621a str r2, [r3, #32] huart5.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024d5c: 4b18 ldr r3, [pc, #96] ; (8024dc0 ) - 8024d5e: 2200 movs r2, #0 - 8024d60: 625a str r2, [r3, #36] ; 0x24 + 8024d8c: 4b18 ldr r3, [pc, #96] ; (8024df0 ) + 8024d8e: 2200 movs r2, #0 + 8024d90: 625a str r2, [r3, #36] ; 0x24 huart5.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT|UART_ADVFEATURE_DMADISABLEONERROR_INIT; - 8024d62: 4b17 ldr r3, [pc, #92] ; (8024dc0 ) - 8024d64: 2230 movs r2, #48 ; 0x30 - 8024d66: 629a str r2, [r3, #40] ; 0x28 + 8024d92: 4b17 ldr r3, [pc, #92] ; (8024df0 ) + 8024d94: 2230 movs r2, #48 ; 0x30 + 8024d96: 629a str r2, [r3, #40] ; 0x28 huart5.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024d68: 4b15 ldr r3, [pc, #84] ; (8024dc0 ) - 8024d6a: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024d6e: 63da str r2, [r3, #60] ; 0x3c + 8024d98: 4b15 ldr r3, [pc, #84] ; (8024df0 ) + 8024d9a: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024d9e: 63da str r2, [r3, #60] ; 0x3c huart5.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024d70: 4b13 ldr r3, [pc, #76] ; (8024dc0 ) - 8024d72: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024d76: 641a str r2, [r3, #64] ; 0x40 + 8024da0: 4b13 ldr r3, [pc, #76] ; (8024df0 ) + 8024da2: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024da6: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart5) != HAL_OK) - 8024d78: 4811 ldr r0, [pc, #68] ; (8024dc0 ) - 8024d7a: f00d fe81 bl 8032a80 - 8024d7e: 4603 mov r3, r0 - 8024d80: 2b00 cmp r3, #0 - 8024d82: d001 beq.n 8024d88 + 8024da8: 4811 ldr r0, [pc, #68] ; (8024df0 ) + 8024daa: f00d fe81 bl 8032ab0 + 8024dae: 4603 mov r3, r0 + 8024db0: 2b00 cmp r3, #0 + 8024db2: d001 beq.n 8024db8 { Error_Handler(); - 8024d84: f7ff faba bl 80242fc + 8024db4: f7ff faba bl 802432c } if (HAL_UARTEx_SetTxFifoThreshold(&huart5, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024d88: 2100 movs r1, #0 - 8024d8a: 480d ldr r0, [pc, #52] ; (8024dc0 ) - 8024d8c: f010 fa81 bl 8035292 - 8024d90: 4603 mov r3, r0 - 8024d92: 2b00 cmp r3, #0 - 8024d94: d001 beq.n 8024d9a + 8024db8: 2100 movs r1, #0 + 8024dba: 480d ldr r0, [pc, #52] ; (8024df0 ) + 8024dbc: f010 fa81 bl 80352c2 + 8024dc0: 4603 mov r3, r0 + 8024dc2: 2b00 cmp r3, #0 + 8024dc4: d001 beq.n 8024dca { Error_Handler(); - 8024d96: f7ff fab1 bl 80242fc + 8024dc6: f7ff fab1 bl 802432c } if (HAL_UARTEx_SetRxFifoThreshold(&huart5, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024d9a: 2100 movs r1, #0 - 8024d9c: 4808 ldr r0, [pc, #32] ; (8024dc0 ) - 8024d9e: f010 fab6 bl 803530e - 8024da2: 4603 mov r3, r0 - 8024da4: 2b00 cmp r3, #0 - 8024da6: d001 beq.n 8024dac + 8024dca: 2100 movs r1, #0 + 8024dcc: 4808 ldr r0, [pc, #32] ; (8024df0 ) + 8024dce: f010 fab6 bl 803533e + 8024dd2: 4603 mov r3, r0 + 8024dd4: 2b00 cmp r3, #0 + 8024dd6: d001 beq.n 8024ddc { Error_Handler(); - 8024da8: f7ff faa8 bl 80242fc + 8024dd8: f7ff faa8 bl 802432c } if (HAL_UARTEx_DisableFifoMode(&huart5) != HAL_OK) - 8024dac: 4804 ldr r0, [pc, #16] ; (8024dc0 ) - 8024dae: f010 fa37 bl 8035220 - 8024db2: 4603 mov r3, r0 - 8024db4: 2b00 cmp r3, #0 - 8024db6: d001 beq.n 8024dbc + 8024ddc: 4804 ldr r0, [pc, #16] ; (8024df0 ) + 8024dde: f010 fa37 bl 8035250 + 8024de2: 4603 mov r3, r0 + 8024de4: 2b00 cmp r3, #0 + 8024de6: d001 beq.n 8024dec { Error_Handler(); - 8024db8: f7ff faa0 bl 80242fc + 8024de8: f7ff faa0 bl 802432c } /* USER CODE BEGIN UART5_Init 2 */ /* USER CODE END UART5_Init 2 */ } - 8024dbc: bf00 nop - 8024dbe: bd80 pop {r7, pc} - 8024dc0: 2400b134 .word 0x2400b134 - 8024dc4: 40005000 .word 0x40005000 + 8024dec: bf00 nop + 8024dee: bd80 pop {r7, pc} + 8024df0: 2400b134 .word 0x2400b134 + 8024df4: 40005000 .word 0x40005000 -08024dc8 : +08024df8 : /* UART7 init function */ void MX_UART7_Init(void) { - 8024dc8: b580 push {r7, lr} - 8024dca: af00 add r7, sp, #0 + 8024df8: b580 push {r7, lr} + 8024dfa: af00 add r7, sp, #0 /* USER CODE END UART7_Init 0 */ /* USER CODE BEGIN UART7_Init 1 */ /* USER CODE END UART7_Init 1 */ huart7.Instance = UART7; - 8024dcc: 4b28 ldr r3, [pc, #160] ; (8024e70 ) - 8024dce: 4a29 ldr r2, [pc, #164] ; (8024e74 ) - 8024dd0: 601a str r2, [r3, #0] + 8024dfc: 4b28 ldr r3, [pc, #160] ; (8024ea0 ) + 8024dfe: 4a29 ldr r2, [pc, #164] ; (8024ea4 ) + 8024e00: 601a str r2, [r3, #0] huart7.Init.BaudRate = 115200; - 8024dd2: 4b27 ldr r3, [pc, #156] ; (8024e70 ) - 8024dd4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8024dd8: 605a str r2, [r3, #4] + 8024e02: 4b27 ldr r3, [pc, #156] ; (8024ea0 ) + 8024e04: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8024e08: 605a str r2, [r3, #4] huart7.Init.WordLength = UART_WORDLENGTH_8B; - 8024dda: 4b25 ldr r3, [pc, #148] ; (8024e70 ) - 8024ddc: 2200 movs r2, #0 - 8024dde: 609a str r2, [r3, #8] + 8024e0a: 4b25 ldr r3, [pc, #148] ; (8024ea0 ) + 8024e0c: 2200 movs r2, #0 + 8024e0e: 609a str r2, [r3, #8] huart7.Init.StopBits = UART_STOPBITS_1; - 8024de0: 4b23 ldr r3, [pc, #140] ; (8024e70 ) - 8024de2: 2200 movs r2, #0 - 8024de4: 60da str r2, [r3, #12] + 8024e10: 4b23 ldr r3, [pc, #140] ; (8024ea0 ) + 8024e12: 2200 movs r2, #0 + 8024e14: 60da str r2, [r3, #12] huart7.Init.Parity = UART_PARITY_NONE; - 8024de6: 4b22 ldr r3, [pc, #136] ; (8024e70 ) - 8024de8: 2200 movs r2, #0 - 8024dea: 611a str r2, [r3, #16] + 8024e16: 4b22 ldr r3, [pc, #136] ; (8024ea0 ) + 8024e18: 2200 movs r2, #0 + 8024e1a: 611a str r2, [r3, #16] huart7.Init.Mode = UART_MODE_TX_RX; - 8024dec: 4b20 ldr r3, [pc, #128] ; (8024e70 ) - 8024dee: 220c movs r2, #12 - 8024df0: 615a str r2, [r3, #20] + 8024e1c: 4b20 ldr r3, [pc, #128] ; (8024ea0 ) + 8024e1e: 220c movs r2, #12 + 8024e20: 615a str r2, [r3, #20] huart7.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024df2: 4b1f ldr r3, [pc, #124] ; (8024e70 ) - 8024df4: 2200 movs r2, #0 - 8024df6: 619a str r2, [r3, #24] + 8024e22: 4b1f ldr r3, [pc, #124] ; (8024ea0 ) + 8024e24: 2200 movs r2, #0 + 8024e26: 619a str r2, [r3, #24] huart7.Init.OverSampling = UART_OVERSAMPLING_16; - 8024df8: 4b1d ldr r3, [pc, #116] ; (8024e70 ) - 8024dfa: 2200 movs r2, #0 - 8024dfc: 61da str r2, [r3, #28] + 8024e28: 4b1d ldr r3, [pc, #116] ; (8024ea0 ) + 8024e2a: 2200 movs r2, #0 + 8024e2c: 61da str r2, [r3, #28] huart7.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024dfe: 4b1c ldr r3, [pc, #112] ; (8024e70 ) - 8024e00: 2200 movs r2, #0 - 8024e02: 621a str r2, [r3, #32] + 8024e2e: 4b1c ldr r3, [pc, #112] ; (8024ea0 ) + 8024e30: 2200 movs r2, #0 + 8024e32: 621a str r2, [r3, #32] huart7.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024e04: 4b1a ldr r3, [pc, #104] ; (8024e70 ) - 8024e06: 2200 movs r2, #0 - 8024e08: 625a str r2, [r3, #36] ; 0x24 + 8024e34: 4b1a ldr r3, [pc, #104] ; (8024ea0 ) + 8024e36: 2200 movs r2, #0 + 8024e38: 625a str r2, [r3, #36] ; 0x24 huart7.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_SWAP_INIT|UART_ADVFEATURE_RXOVERRUNDISABLE_INIT - 8024e0a: 4b19 ldr r3, [pc, #100] ; (8024e70 ) - 8024e0c: 2238 movs r2, #56 ; 0x38 - 8024e0e: 629a str r2, [r3, #40] ; 0x28 + 8024e3a: 4b19 ldr r3, [pc, #100] ; (8024ea0 ) + 8024e3c: 2238 movs r2, #56 ; 0x38 + 8024e3e: 629a str r2, [r3, #40] ; 0x28 |UART_ADVFEATURE_DMADISABLEONERROR_INIT; huart7.AdvancedInit.Swap = UART_ADVFEATURE_SWAP_ENABLE; - 8024e10: 4b17 ldr r3, [pc, #92] ; (8024e70 ) - 8024e12: f44f 4200 mov.w r2, #32768 ; 0x8000 - 8024e16: 639a str r2, [r3, #56] ; 0x38 + 8024e40: 4b17 ldr r3, [pc, #92] ; (8024ea0 ) + 8024e42: f44f 4200 mov.w r2, #32768 ; 0x8000 + 8024e46: 639a str r2, [r3, #56] ; 0x38 huart7.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024e18: 4b15 ldr r3, [pc, #84] ; (8024e70 ) - 8024e1a: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024e1e: 63da str r2, [r3, #60] ; 0x3c + 8024e48: 4b15 ldr r3, [pc, #84] ; (8024ea0 ) + 8024e4a: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024e4e: 63da str r2, [r3, #60] ; 0x3c huart7.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024e20: 4b13 ldr r3, [pc, #76] ; (8024e70 ) - 8024e22: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024e26: 641a str r2, [r3, #64] ; 0x40 + 8024e50: 4b13 ldr r3, [pc, #76] ; (8024ea0 ) + 8024e52: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024e56: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart7) != HAL_OK) - 8024e28: 4811 ldr r0, [pc, #68] ; (8024e70 ) - 8024e2a: f00d fe29 bl 8032a80 - 8024e2e: 4603 mov r3, r0 - 8024e30: 2b00 cmp r3, #0 - 8024e32: d001 beq.n 8024e38 + 8024e58: 4811 ldr r0, [pc, #68] ; (8024ea0 ) + 8024e5a: f00d fe29 bl 8032ab0 + 8024e5e: 4603 mov r3, r0 + 8024e60: 2b00 cmp r3, #0 + 8024e62: d001 beq.n 8024e68 { Error_Handler(); - 8024e34: f7ff fa62 bl 80242fc + 8024e64: f7ff fa62 bl 802432c } if (HAL_UARTEx_SetTxFifoThreshold(&huart7, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024e38: 2100 movs r1, #0 - 8024e3a: 480d ldr r0, [pc, #52] ; (8024e70 ) - 8024e3c: f010 fa29 bl 8035292 - 8024e40: 4603 mov r3, r0 - 8024e42: 2b00 cmp r3, #0 - 8024e44: d001 beq.n 8024e4a + 8024e68: 2100 movs r1, #0 + 8024e6a: 480d ldr r0, [pc, #52] ; (8024ea0 ) + 8024e6c: f010 fa29 bl 80352c2 + 8024e70: 4603 mov r3, r0 + 8024e72: 2b00 cmp r3, #0 + 8024e74: d001 beq.n 8024e7a { Error_Handler(); - 8024e46: f7ff fa59 bl 80242fc + 8024e76: f7ff fa59 bl 802432c } if (HAL_UARTEx_SetRxFifoThreshold(&huart7, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024e4a: 2100 movs r1, #0 - 8024e4c: 4808 ldr r0, [pc, #32] ; (8024e70 ) - 8024e4e: f010 fa5e bl 803530e - 8024e52: 4603 mov r3, r0 - 8024e54: 2b00 cmp r3, #0 - 8024e56: d001 beq.n 8024e5c + 8024e7a: 2100 movs r1, #0 + 8024e7c: 4808 ldr r0, [pc, #32] ; (8024ea0 ) + 8024e7e: f010 fa5e bl 803533e + 8024e82: 4603 mov r3, r0 + 8024e84: 2b00 cmp r3, #0 + 8024e86: d001 beq.n 8024e8c { Error_Handler(); - 8024e58: f7ff fa50 bl 80242fc + 8024e88: f7ff fa50 bl 802432c } if (HAL_UARTEx_DisableFifoMode(&huart7) != HAL_OK) - 8024e5c: 4804 ldr r0, [pc, #16] ; (8024e70 ) - 8024e5e: f010 f9df bl 8035220 - 8024e62: 4603 mov r3, r0 - 8024e64: 2b00 cmp r3, #0 - 8024e66: d001 beq.n 8024e6c + 8024e8c: 4804 ldr r0, [pc, #16] ; (8024ea0 ) + 8024e8e: f010 f9df bl 8035250 + 8024e92: 4603 mov r3, r0 + 8024e94: 2b00 cmp r3, #0 + 8024e96: d001 beq.n 8024e9c { Error_Handler(); - 8024e68: f7ff fa48 bl 80242fc + 8024e98: f7ff fa48 bl 802432c } /* USER CODE BEGIN UART7_Init 2 */ /* USER CODE END UART7_Init 2 */ } - 8024e6c: bf00 nop - 8024e6e: bd80 pop {r7, pc} - 8024e70: 2400b1c4 .word 0x2400b1c4 - 8024e74: 40007800 .word 0x40007800 + 8024e9c: bf00 nop + 8024e9e: bd80 pop {r7, pc} + 8024ea0: 2400b1c4 .word 0x2400b1c4 + 8024ea4: 40007800 .word 0x40007800 -08024e78 : +08024ea8 : /* USART1 init function */ void MX_USART1_UART_Init(void) { - 8024e78: b580 push {r7, lr} - 8024e7a: af00 add r7, sp, #0 + 8024ea8: b580 push {r7, lr} + 8024eaa: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; - 8024e7c: 4b28 ldr r3, [pc, #160] ; (8024f20 ) - 8024e7e: 4a29 ldr r2, [pc, #164] ; (8024f24 ) - 8024e80: 601a str r2, [r3, #0] + 8024eac: 4b28 ldr r3, [pc, #160] ; (8024f50 ) + 8024eae: 4a29 ldr r2, [pc, #164] ; (8024f54 ) + 8024eb0: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; - 8024e82: 4b27 ldr r3, [pc, #156] ; (8024f20 ) - 8024e84: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8024e88: 605a str r2, [r3, #4] + 8024eb2: 4b27 ldr r3, [pc, #156] ; (8024f50 ) + 8024eb4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8024eb8: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8024e8a: 4b25 ldr r3, [pc, #148] ; (8024f20 ) - 8024e8c: 2200 movs r2, #0 - 8024e8e: 609a str r2, [r3, #8] + 8024eba: 4b25 ldr r3, [pc, #148] ; (8024f50 ) + 8024ebc: 2200 movs r2, #0 + 8024ebe: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8024e90: 4b23 ldr r3, [pc, #140] ; (8024f20 ) - 8024e92: 2200 movs r2, #0 - 8024e94: 60da str r2, [r3, #12] + 8024ec0: 4b23 ldr r3, [pc, #140] ; (8024f50 ) + 8024ec2: 2200 movs r2, #0 + 8024ec4: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 8024e96: 4b22 ldr r3, [pc, #136] ; (8024f20 ) - 8024e98: 2200 movs r2, #0 - 8024e9a: 611a str r2, [r3, #16] + 8024ec6: 4b22 ldr r3, [pc, #136] ; (8024f50 ) + 8024ec8: 2200 movs r2, #0 + 8024eca: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 8024e9c: 4b20 ldr r3, [pc, #128] ; (8024f20 ) - 8024e9e: 220c movs r2, #12 - 8024ea0: 615a str r2, [r3, #20] + 8024ecc: 4b20 ldr r3, [pc, #128] ; (8024f50 ) + 8024ece: 220c movs r2, #12 + 8024ed0: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024ea2: 4b1f ldr r3, [pc, #124] ; (8024f20 ) - 8024ea4: 2200 movs r2, #0 - 8024ea6: 619a str r2, [r3, #24] + 8024ed2: 4b1f ldr r3, [pc, #124] ; (8024f50 ) + 8024ed4: 2200 movs r2, #0 + 8024ed6: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8024ea8: 4b1d ldr r3, [pc, #116] ; (8024f20 ) - 8024eaa: 2200 movs r2, #0 - 8024eac: 61da str r2, [r3, #28] + 8024ed8: 4b1d ldr r3, [pc, #116] ; (8024f50 ) + 8024eda: 2200 movs r2, #0 + 8024edc: 61da str r2, [r3, #28] huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024eae: 4b1c ldr r3, [pc, #112] ; (8024f20 ) - 8024eb0: 2200 movs r2, #0 - 8024eb2: 621a str r2, [r3, #32] + 8024ede: 4b1c ldr r3, [pc, #112] ; (8024f50 ) + 8024ee0: 2200 movs r2, #0 + 8024ee2: 621a str r2, [r3, #32] huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024eb4: 4b1a ldr r3, [pc, #104] ; (8024f20 ) - 8024eb6: 2200 movs r2, #0 - 8024eb8: 625a str r2, [r3, #36] ; 0x24 + 8024ee4: 4b1a ldr r3, [pc, #104] ; (8024f50 ) + 8024ee6: 2200 movs r2, #0 + 8024ee8: 625a str r2, [r3, #36] ; 0x24 huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_SWAP_INIT|UART_ADVFEATURE_RXOVERRUNDISABLE_INIT - 8024eba: 4b19 ldr r3, [pc, #100] ; (8024f20 ) - 8024ebc: 2238 movs r2, #56 ; 0x38 - 8024ebe: 629a str r2, [r3, #40] ; 0x28 + 8024eea: 4b19 ldr r3, [pc, #100] ; (8024f50 ) + 8024eec: 2238 movs r2, #56 ; 0x38 + 8024eee: 629a str r2, [r3, #40] ; 0x28 |UART_ADVFEATURE_DMADISABLEONERROR_INIT; huart1.AdvancedInit.Swap = UART_ADVFEATURE_SWAP_ENABLE; - 8024ec0: 4b17 ldr r3, [pc, #92] ; (8024f20 ) - 8024ec2: f44f 4200 mov.w r2, #32768 ; 0x8000 - 8024ec6: 639a str r2, [r3, #56] ; 0x38 + 8024ef0: 4b17 ldr r3, [pc, #92] ; (8024f50 ) + 8024ef2: f44f 4200 mov.w r2, #32768 ; 0x8000 + 8024ef6: 639a str r2, [r3, #56] ; 0x38 huart1.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024ec8: 4b15 ldr r3, [pc, #84] ; (8024f20 ) - 8024eca: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024ece: 63da str r2, [r3, #60] ; 0x3c + 8024ef8: 4b15 ldr r3, [pc, #84] ; (8024f50 ) + 8024efa: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024efe: 63da str r2, [r3, #60] ; 0x3c huart1.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024ed0: 4b13 ldr r3, [pc, #76] ; (8024f20 ) - 8024ed2: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024ed6: 641a str r2, [r3, #64] ; 0x40 + 8024f00: 4b13 ldr r3, [pc, #76] ; (8024f50 ) + 8024f02: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024f06: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart1) != HAL_OK) - 8024ed8: 4811 ldr r0, [pc, #68] ; (8024f20 ) - 8024eda: f00d fdd1 bl 8032a80 - 8024ede: 4603 mov r3, r0 - 8024ee0: 2b00 cmp r3, #0 - 8024ee2: d001 beq.n 8024ee8 + 8024f08: 4811 ldr r0, [pc, #68] ; (8024f50 ) + 8024f0a: f00d fdd1 bl 8032ab0 + 8024f0e: 4603 mov r3, r0 + 8024f10: 2b00 cmp r3, #0 + 8024f12: d001 beq.n 8024f18 { Error_Handler(); - 8024ee4: f7ff fa0a bl 80242fc + 8024f14: f7ff fa0a bl 802432c } if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024ee8: 2100 movs r1, #0 - 8024eea: 480d ldr r0, [pc, #52] ; (8024f20 ) - 8024eec: f010 f9d1 bl 8035292 - 8024ef0: 4603 mov r3, r0 - 8024ef2: 2b00 cmp r3, #0 - 8024ef4: d001 beq.n 8024efa + 8024f18: 2100 movs r1, #0 + 8024f1a: 480d ldr r0, [pc, #52] ; (8024f50 ) + 8024f1c: f010 f9d1 bl 80352c2 + 8024f20: 4603 mov r3, r0 + 8024f22: 2b00 cmp r3, #0 + 8024f24: d001 beq.n 8024f2a { Error_Handler(); - 8024ef6: f7ff fa01 bl 80242fc + 8024f26: f7ff fa01 bl 802432c } if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024efa: 2100 movs r1, #0 - 8024efc: 4808 ldr r0, [pc, #32] ; (8024f20 ) - 8024efe: f010 fa06 bl 803530e - 8024f02: 4603 mov r3, r0 - 8024f04: 2b00 cmp r3, #0 - 8024f06: d001 beq.n 8024f0c + 8024f2a: 2100 movs r1, #0 + 8024f2c: 4808 ldr r0, [pc, #32] ; (8024f50 ) + 8024f2e: f010 fa06 bl 803533e + 8024f32: 4603 mov r3, r0 + 8024f34: 2b00 cmp r3, #0 + 8024f36: d001 beq.n 8024f3c { Error_Handler(); - 8024f08: f7ff f9f8 bl 80242fc + 8024f38: f7ff f9f8 bl 802432c } if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) - 8024f0c: 4804 ldr r0, [pc, #16] ; (8024f20 ) - 8024f0e: f010 f987 bl 8035220 - 8024f12: 4603 mov r3, r0 - 8024f14: 2b00 cmp r3, #0 - 8024f16: d001 beq.n 8024f1c + 8024f3c: 4804 ldr r0, [pc, #16] ; (8024f50 ) + 8024f3e: f010 f987 bl 8035250 + 8024f42: 4603 mov r3, r0 + 8024f44: 2b00 cmp r3, #0 + 8024f46: d001 beq.n 8024f4c { Error_Handler(); - 8024f18: f7ff f9f0 bl 80242fc + 8024f48: f7ff f9f0 bl 802432c } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } - 8024f1c: bf00 nop - 8024f1e: bd80 pop {r7, pc} - 8024f20: 2400b254 .word 0x2400b254 - 8024f24: 40011000 .word 0x40011000 + 8024f4c: bf00 nop + 8024f4e: bd80 pop {r7, pc} + 8024f50: 2400b254 .word 0x2400b254 + 8024f54: 40011000 .word 0x40011000 -08024f28 : +08024f58 : /* USART2 init function */ void MX_USART2_UART_Init(void) { - 8024f28: b580 push {r7, lr} - 8024f2a: af00 add r7, sp, #0 + 8024f58: b580 push {r7, lr} + 8024f5a: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; - 8024f2c: 4b27 ldr r3, [pc, #156] ; (8024fcc ) - 8024f2e: 4a28 ldr r2, [pc, #160] ; (8024fd0 ) - 8024f30: 601a str r2, [r3, #0] + 8024f5c: 4b27 ldr r3, [pc, #156] ; (8024ffc ) + 8024f5e: 4a28 ldr r2, [pc, #160] ; (8025000 ) + 8024f60: 601a str r2, [r3, #0] huart2.Init.BaudRate = 100000; - 8024f32: 4b26 ldr r3, [pc, #152] ; (8024fcc ) - 8024f34: 4a27 ldr r2, [pc, #156] ; (8024fd4 ) - 8024f36: 605a str r2, [r3, #4] + 8024f62: 4b26 ldr r3, [pc, #152] ; (8024ffc ) + 8024f64: 4a27 ldr r2, [pc, #156] ; (8025004 ) + 8024f66: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_9B; - 8024f38: 4b24 ldr r3, [pc, #144] ; (8024fcc ) - 8024f3a: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024f3e: 609a str r2, [r3, #8] + 8024f68: 4b24 ldr r3, [pc, #144] ; (8024ffc ) + 8024f6a: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024f6e: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; - 8024f40: 4b22 ldr r3, [pc, #136] ; (8024fcc ) - 8024f42: 2200 movs r2, #0 - 8024f44: 60da str r2, [r3, #12] + 8024f70: 4b22 ldr r3, [pc, #136] ; (8024ffc ) + 8024f72: 2200 movs r2, #0 + 8024f74: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_EVEN; - 8024f46: 4b21 ldr r3, [pc, #132] ; (8024fcc ) - 8024f48: f44f 6280 mov.w r2, #1024 ; 0x400 - 8024f4c: 611a str r2, [r3, #16] + 8024f76: 4b21 ldr r3, [pc, #132] ; (8024ffc ) + 8024f78: f44f 6280 mov.w r2, #1024 ; 0x400 + 8024f7c: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; - 8024f4e: 4b1f ldr r3, [pc, #124] ; (8024fcc ) - 8024f50: 220c movs r2, #12 - 8024f52: 615a str r2, [r3, #20] + 8024f7e: 4b1f ldr r3, [pc, #124] ; (8024ffc ) + 8024f80: 220c movs r2, #12 + 8024f82: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024f54: 4b1d ldr r3, [pc, #116] ; (8024fcc ) - 8024f56: 2200 movs r2, #0 - 8024f58: 619a str r2, [r3, #24] + 8024f84: 4b1d ldr r3, [pc, #116] ; (8024ffc ) + 8024f86: 2200 movs r2, #0 + 8024f88: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 8024f5a: 4b1c ldr r3, [pc, #112] ; (8024fcc ) - 8024f5c: 2200 movs r2, #0 - 8024f5e: 61da str r2, [r3, #28] + 8024f8a: 4b1c ldr r3, [pc, #112] ; (8024ffc ) + 8024f8c: 2200 movs r2, #0 + 8024f8e: 61da str r2, [r3, #28] huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024f60: 4b1a ldr r3, [pc, #104] ; (8024fcc ) - 8024f62: 2200 movs r2, #0 - 8024f64: 621a str r2, [r3, #32] + 8024f90: 4b1a ldr r3, [pc, #104] ; (8024ffc ) + 8024f92: 2200 movs r2, #0 + 8024f94: 621a str r2, [r3, #32] huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024f66: 4b19 ldr r3, [pc, #100] ; (8024fcc ) - 8024f68: 2200 movs r2, #0 - 8024f6a: 625a str r2, [r3, #36] ; 0x24 + 8024f96: 4b19 ldr r3, [pc, #100] ; (8024ffc ) + 8024f98: 2200 movs r2, #0 + 8024f9a: 625a str r2, [r3, #36] ; 0x24 huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT|UART_ADVFEATURE_DMADISABLEONERROR_INIT; - 8024f6c: 4b17 ldr r3, [pc, #92] ; (8024fcc ) - 8024f6e: 2230 movs r2, #48 ; 0x30 - 8024f70: 629a str r2, [r3, #40] ; 0x28 + 8024f9c: 4b17 ldr r3, [pc, #92] ; (8024ffc ) + 8024f9e: 2230 movs r2, #48 ; 0x30 + 8024fa0: 629a str r2, [r3, #40] ; 0x28 huart2.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024f72: 4b16 ldr r3, [pc, #88] ; (8024fcc ) - 8024f74: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024f78: 63da str r2, [r3, #60] ; 0x3c + 8024fa2: 4b16 ldr r3, [pc, #88] ; (8024ffc ) + 8024fa4: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024fa8: 63da str r2, [r3, #60] ; 0x3c huart2.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024f7a: 4b14 ldr r3, [pc, #80] ; (8024fcc ) - 8024f7c: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024f80: 641a str r2, [r3, #64] ; 0x40 + 8024faa: 4b14 ldr r3, [pc, #80] ; (8024ffc ) + 8024fac: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024fb0: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart2) != HAL_OK) - 8024f82: 4812 ldr r0, [pc, #72] ; (8024fcc ) - 8024f84: f00d fd7c bl 8032a80 - 8024f88: 4603 mov r3, r0 - 8024f8a: 2b00 cmp r3, #0 - 8024f8c: d001 beq.n 8024f92 + 8024fb2: 4812 ldr r0, [pc, #72] ; (8024ffc ) + 8024fb4: f00d fd7c bl 8032ab0 + 8024fb8: 4603 mov r3, r0 + 8024fba: 2b00 cmp r3, #0 + 8024fbc: d001 beq.n 8024fc2 { Error_Handler(); - 8024f8e: f7ff f9b5 bl 80242fc + 8024fbe: f7ff f9b5 bl 802432c } if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024f92: 2100 movs r1, #0 - 8024f94: 480d ldr r0, [pc, #52] ; (8024fcc ) - 8024f96: f010 f97c bl 8035292 - 8024f9a: 4603 mov r3, r0 - 8024f9c: 2b00 cmp r3, #0 - 8024f9e: d001 beq.n 8024fa4 + 8024fc2: 2100 movs r1, #0 + 8024fc4: 480d ldr r0, [pc, #52] ; (8024ffc ) + 8024fc6: f010 f97c bl 80352c2 + 8024fca: 4603 mov r3, r0 + 8024fcc: 2b00 cmp r3, #0 + 8024fce: d001 beq.n 8024fd4 { Error_Handler(); - 8024fa0: f7ff f9ac bl 80242fc + 8024fd0: f7ff f9ac bl 802432c } if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024fa4: 2100 movs r1, #0 - 8024fa6: 4809 ldr r0, [pc, #36] ; (8024fcc ) - 8024fa8: f010 f9b1 bl 803530e - 8024fac: 4603 mov r3, r0 - 8024fae: 2b00 cmp r3, #0 - 8024fb0: d001 beq.n 8024fb6 + 8024fd4: 2100 movs r1, #0 + 8024fd6: 4809 ldr r0, [pc, #36] ; (8024ffc ) + 8024fd8: f010 f9b1 bl 803533e + 8024fdc: 4603 mov r3, r0 + 8024fde: 2b00 cmp r3, #0 + 8024fe0: d001 beq.n 8024fe6 { Error_Handler(); - 8024fb2: f7ff f9a3 bl 80242fc + 8024fe2: f7ff f9a3 bl 802432c } if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK) - 8024fb6: 4805 ldr r0, [pc, #20] ; (8024fcc ) - 8024fb8: f010 f932 bl 8035220 - 8024fbc: 4603 mov r3, r0 - 8024fbe: 2b00 cmp r3, #0 - 8024fc0: d001 beq.n 8024fc6 + 8024fe6: 4805 ldr r0, [pc, #20] ; (8024ffc ) + 8024fe8: f010 f932 bl 8035250 + 8024fec: 4603 mov r3, r0 + 8024fee: 2b00 cmp r3, #0 + 8024ff0: d001 beq.n 8024ff6 { Error_Handler(); - 8024fc2: f7ff f99b bl 80242fc + 8024ff2: f7ff f99b bl 802432c /* USER CODE END USART2_Init 2 */ } - 8024fc6: bf00 nop - 8024fc8: bd80 pop {r7, pc} - 8024fca: bf00 nop - 8024fcc: 2400b2e4 .word 0x2400b2e4 - 8024fd0: 40004400 .word 0x40004400 - 8024fd4: 000186a0 .word 0x000186a0 + 8024ff6: bf00 nop + 8024ff8: bd80 pop {r7, pc} + 8024ffa: bf00 nop + 8024ffc: 2400b2e4 .word 0x2400b2e4 + 8025000: 40004400 .word 0x40004400 + 8025004: 000186a0 .word 0x000186a0 -08024fd8 : +08025008 : /* USART3 init function */ void MX_USART3_UART_Init(void) { - 8024fd8: b580 push {r7, lr} - 8024fda: af00 add r7, sp, #0 + 8025008: b580 push {r7, lr} + 802500a: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; - 8024fdc: 4b28 ldr r3, [pc, #160] ; (8025080 ) - 8024fde: 4a29 ldr r2, [pc, #164] ; (8025084 ) - 8024fe0: 601a str r2, [r3, #0] + 802500c: 4b28 ldr r3, [pc, #160] ; (80250b0 ) + 802500e: 4a29 ldr r2, [pc, #164] ; (80250b4 ) + 8025010: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; - 8024fe2: 4b27 ldr r3, [pc, #156] ; (8025080 ) - 8024fe4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8024fe8: 605a str r2, [r3, #4] + 8025012: 4b27 ldr r3, [pc, #156] ; (80250b0 ) + 8025014: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8025018: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; - 8024fea: 4b25 ldr r3, [pc, #148] ; (8025080 ) - 8024fec: 2200 movs r2, #0 - 8024fee: 609a str r2, [r3, #8] + 802501a: 4b25 ldr r3, [pc, #148] ; (80250b0 ) + 802501c: 2200 movs r2, #0 + 802501e: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; - 8024ff0: 4b23 ldr r3, [pc, #140] ; (8025080 ) - 8024ff2: 2200 movs r2, #0 - 8024ff4: 60da str r2, [r3, #12] + 8025020: 4b23 ldr r3, [pc, #140] ; (80250b0 ) + 8025022: 2200 movs r2, #0 + 8025024: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; - 8024ff6: 4b22 ldr r3, [pc, #136] ; (8025080 ) - 8024ff8: 2200 movs r2, #0 - 8024ffa: 611a str r2, [r3, #16] + 8025026: 4b22 ldr r3, [pc, #136] ; (80250b0 ) + 8025028: 2200 movs r2, #0 + 802502a: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; - 8024ffc: 4b20 ldr r3, [pc, #128] ; (8025080 ) - 8024ffe: 220c movs r2, #12 - 8025000: 615a str r2, [r3, #20] + 802502c: 4b20 ldr r3, [pc, #128] ; (80250b0 ) + 802502e: 220c movs r2, #12 + 8025030: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8025002: 4b1f ldr r3, [pc, #124] ; (8025080 ) - 8025004: 2200 movs r2, #0 - 8025006: 619a str r2, [r3, #24] + 8025032: 4b1f ldr r3, [pc, #124] ; (80250b0 ) + 8025034: 2200 movs r2, #0 + 8025036: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; - 8025008: 4b1d ldr r3, [pc, #116] ; (8025080 ) - 802500a: 2200 movs r2, #0 - 802500c: 61da str r2, [r3, #28] + 8025038: 4b1d ldr r3, [pc, #116] ; (80250b0 ) + 802503a: 2200 movs r2, #0 + 802503c: 61da str r2, [r3, #28] huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 802500e: 4b1c ldr r3, [pc, #112] ; (8025080 ) - 8025010: 2200 movs r2, #0 - 8025012: 621a str r2, [r3, #32] + 802503e: 4b1c ldr r3, [pc, #112] ; (80250b0 ) + 8025040: 2200 movs r2, #0 + 8025042: 621a str r2, [r3, #32] huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8025014: 4b1a ldr r3, [pc, #104] ; (8025080 ) - 8025016: 2200 movs r2, #0 - 8025018: 625a str r2, [r3, #36] ; 0x24 + 8025044: 4b1a ldr r3, [pc, #104] ; (80250b0 ) + 8025046: 2200 movs r2, #0 + 8025048: 625a str r2, [r3, #36] ; 0x24 huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_SWAP_INIT|UART_ADVFEATURE_RXOVERRUNDISABLE_INIT - 802501a: 4b19 ldr r3, [pc, #100] ; (8025080 ) - 802501c: 2238 movs r2, #56 ; 0x38 - 802501e: 629a str r2, [r3, #40] ; 0x28 + 802504a: 4b19 ldr r3, [pc, #100] ; (80250b0 ) + 802504c: 2238 movs r2, #56 ; 0x38 + 802504e: 629a str r2, [r3, #40] ; 0x28 |UART_ADVFEATURE_DMADISABLEONERROR_INIT; huart3.AdvancedInit.Swap = UART_ADVFEATURE_SWAP_ENABLE; - 8025020: 4b17 ldr r3, [pc, #92] ; (8025080 ) - 8025022: f44f 4200 mov.w r2, #32768 ; 0x8000 - 8025026: 639a str r2, [r3, #56] ; 0x38 + 8025050: 4b17 ldr r3, [pc, #92] ; (80250b0 ) + 8025052: f44f 4200 mov.w r2, #32768 ; 0x8000 + 8025056: 639a str r2, [r3, #56] ; 0x38 huart3.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8025028: 4b15 ldr r3, [pc, #84] ; (8025080 ) - 802502a: f44f 5280 mov.w r2, #4096 ; 0x1000 - 802502e: 63da str r2, [r3, #60] ; 0x3c + 8025058: 4b15 ldr r3, [pc, #84] ; (80250b0 ) + 802505a: f44f 5280 mov.w r2, #4096 ; 0x1000 + 802505e: 63da str r2, [r3, #60] ; 0x3c huart3.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8025030: 4b13 ldr r3, [pc, #76] ; (8025080 ) - 8025032: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8025036: 641a str r2, [r3, #64] ; 0x40 + 8025060: 4b13 ldr r3, [pc, #76] ; (80250b0 ) + 8025062: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8025066: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart3) != HAL_OK) - 8025038: 4811 ldr r0, [pc, #68] ; (8025080 ) - 802503a: f00d fd21 bl 8032a80 - 802503e: 4603 mov r3, r0 - 8025040: 2b00 cmp r3, #0 - 8025042: d001 beq.n 8025048 + 8025068: 4811 ldr r0, [pc, #68] ; (80250b0 ) + 802506a: f00d fd21 bl 8032ab0 + 802506e: 4603 mov r3, r0 + 8025070: 2b00 cmp r3, #0 + 8025072: d001 beq.n 8025078 { Error_Handler(); - 8025044: f7ff f95a bl 80242fc + 8025074: f7ff f95a bl 802432c } if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8025048: 2100 movs r1, #0 - 802504a: 480d ldr r0, [pc, #52] ; (8025080 ) - 802504c: f010 f921 bl 8035292 - 8025050: 4603 mov r3, r0 - 8025052: 2b00 cmp r3, #0 - 8025054: d001 beq.n 802505a + 8025078: 2100 movs r1, #0 + 802507a: 480d ldr r0, [pc, #52] ; (80250b0 ) + 802507c: f010 f921 bl 80352c2 + 8025080: 4603 mov r3, r0 + 8025082: 2b00 cmp r3, #0 + 8025084: d001 beq.n 802508a { Error_Handler(); - 8025056: f7ff f951 bl 80242fc + 8025086: f7ff f951 bl 802432c } if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 802505a: 2100 movs r1, #0 - 802505c: 4808 ldr r0, [pc, #32] ; (8025080 ) - 802505e: f010 f956 bl 803530e - 8025062: 4603 mov r3, r0 - 8025064: 2b00 cmp r3, #0 - 8025066: d001 beq.n 802506c + 802508a: 2100 movs r1, #0 + 802508c: 4808 ldr r0, [pc, #32] ; (80250b0 ) + 802508e: f010 f956 bl 803533e + 8025092: 4603 mov r3, r0 + 8025094: 2b00 cmp r3, #0 + 8025096: d001 beq.n 802509c { Error_Handler(); - 8025068: f7ff f948 bl 80242fc + 8025098: f7ff f948 bl 802432c } if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK) - 802506c: 4804 ldr r0, [pc, #16] ; (8025080 ) - 802506e: f010 f8d7 bl 8035220 - 8025072: 4603 mov r3, r0 - 8025074: 2b00 cmp r3, #0 - 8025076: d001 beq.n 802507c + 802509c: 4804 ldr r0, [pc, #16] ; (80250b0 ) + 802509e: f010 f8d7 bl 8035250 + 80250a2: 4603 mov r3, r0 + 80250a4: 2b00 cmp r3, #0 + 80250a6: d001 beq.n 80250ac { Error_Handler(); - 8025078: f7ff f940 bl 80242fc + 80250a8: f7ff f940 bl 802432c } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } - 802507c: bf00 nop - 802507e: bd80 pop {r7, pc} - 8025080: 2400b374 .word 0x2400b374 - 8025084: 40004800 .word 0x40004800 + 80250ac: bf00 nop + 80250ae: bd80 pop {r7, pc} + 80250b0: 2400b374 .word 0x2400b374 + 80250b4: 40004800 .word 0x40004800 -08025088 : +080250b8 : /* USART6 init function */ void MX_USART6_UART_Init(void) { - 8025088: b580 push {r7, lr} - 802508a: af00 add r7, sp, #0 + 80250b8: b580 push {r7, lr} + 80250ba: af00 add r7, sp, #0 /* USER CODE END USART6_Init 0 */ /* USER CODE BEGIN USART6_Init 1 */ /* USER CODE END USART6_Init 1 */ huart6.Instance = USART6; - 802508c: 4b28 ldr r3, [pc, #160] ; (8025130 ) - 802508e: 4a29 ldr r2, [pc, #164] ; (8025134 ) - 8025090: 601a str r2, [r3, #0] + 80250bc: 4b28 ldr r3, [pc, #160] ; (8025160 ) + 80250be: 4a29 ldr r2, [pc, #164] ; (8025164 ) + 80250c0: 601a str r2, [r3, #0] huart6.Init.BaudRate = 115200; - 8025092: 4b27 ldr r3, [pc, #156] ; (8025130 ) - 8025094: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8025098: 605a str r2, [r3, #4] + 80250c2: 4b27 ldr r3, [pc, #156] ; (8025160 ) + 80250c4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 80250c8: 605a str r2, [r3, #4] huart6.Init.WordLength = UART_WORDLENGTH_8B; - 802509a: 4b25 ldr r3, [pc, #148] ; (8025130 ) - 802509c: 2200 movs r2, #0 - 802509e: 609a str r2, [r3, #8] + 80250ca: 4b25 ldr r3, [pc, #148] ; (8025160 ) + 80250cc: 2200 movs r2, #0 + 80250ce: 609a str r2, [r3, #8] huart6.Init.StopBits = UART_STOPBITS_1; - 80250a0: 4b23 ldr r3, [pc, #140] ; (8025130 ) - 80250a2: 2200 movs r2, #0 - 80250a4: 60da str r2, [r3, #12] + 80250d0: 4b23 ldr r3, [pc, #140] ; (8025160 ) + 80250d2: 2200 movs r2, #0 + 80250d4: 60da str r2, [r3, #12] huart6.Init.Parity = UART_PARITY_NONE; - 80250a6: 4b22 ldr r3, [pc, #136] ; (8025130 ) - 80250a8: 2200 movs r2, #0 - 80250aa: 611a str r2, [r3, #16] + 80250d6: 4b22 ldr r3, [pc, #136] ; (8025160 ) + 80250d8: 2200 movs r2, #0 + 80250da: 611a str r2, [r3, #16] huart6.Init.Mode = UART_MODE_TX_RX; - 80250ac: 4b20 ldr r3, [pc, #128] ; (8025130 ) - 80250ae: 220c movs r2, #12 - 80250b0: 615a str r2, [r3, #20] + 80250dc: 4b20 ldr r3, [pc, #128] ; (8025160 ) + 80250de: 220c movs r2, #12 + 80250e0: 615a str r2, [r3, #20] huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 80250b2: 4b1f ldr r3, [pc, #124] ; (8025130 ) - 80250b4: 2200 movs r2, #0 - 80250b6: 619a str r2, [r3, #24] + 80250e2: 4b1f ldr r3, [pc, #124] ; (8025160 ) + 80250e4: 2200 movs r2, #0 + 80250e6: 619a str r2, [r3, #24] huart6.Init.OverSampling = UART_OVERSAMPLING_16; - 80250b8: 4b1d ldr r3, [pc, #116] ; (8025130 ) - 80250ba: 2200 movs r2, #0 - 80250bc: 61da str r2, [r3, #28] + 80250e8: 4b1d ldr r3, [pc, #116] ; (8025160 ) + 80250ea: 2200 movs r2, #0 + 80250ec: 61da str r2, [r3, #28] huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 80250be: 4b1c ldr r3, [pc, #112] ; (8025130 ) - 80250c0: 2200 movs r2, #0 - 80250c2: 621a str r2, [r3, #32] + 80250ee: 4b1c ldr r3, [pc, #112] ; (8025160 ) + 80250f0: 2200 movs r2, #0 + 80250f2: 621a str r2, [r3, #32] huart6.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 80250c4: 4b1a ldr r3, [pc, #104] ; (8025130 ) - 80250c6: 2200 movs r2, #0 - 80250c8: 625a str r2, [r3, #36] ; 0x24 + 80250f4: 4b1a ldr r3, [pc, #104] ; (8025160 ) + 80250f6: 2200 movs r2, #0 + 80250f8: 625a str r2, [r3, #36] ; 0x24 huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_SWAP_INIT|UART_ADVFEATURE_RXOVERRUNDISABLE_INIT - 80250ca: 4b19 ldr r3, [pc, #100] ; (8025130 ) - 80250cc: 2238 movs r2, #56 ; 0x38 - 80250ce: 629a str r2, [r3, #40] ; 0x28 + 80250fa: 4b19 ldr r3, [pc, #100] ; (8025160 ) + 80250fc: 2238 movs r2, #56 ; 0x38 + 80250fe: 629a str r2, [r3, #40] ; 0x28 |UART_ADVFEATURE_DMADISABLEONERROR_INIT; huart6.AdvancedInit.Swap = UART_ADVFEATURE_SWAP_ENABLE; - 80250d0: 4b17 ldr r3, [pc, #92] ; (8025130 ) - 80250d2: f44f 4200 mov.w r2, #32768 ; 0x8000 - 80250d6: 639a str r2, [r3, #56] ; 0x38 + 8025100: 4b17 ldr r3, [pc, #92] ; (8025160 ) + 8025102: f44f 4200 mov.w r2, #32768 ; 0x8000 + 8025106: 639a str r2, [r3, #56] ; 0x38 huart6.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 80250d8: 4b15 ldr r3, [pc, #84] ; (8025130 ) - 80250da: f44f 5280 mov.w r2, #4096 ; 0x1000 - 80250de: 63da str r2, [r3, #60] ; 0x3c + 8025108: 4b15 ldr r3, [pc, #84] ; (8025160 ) + 802510a: f44f 5280 mov.w r2, #4096 ; 0x1000 + 802510e: 63da str r2, [r3, #60] ; 0x3c huart6.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 80250e0: 4b13 ldr r3, [pc, #76] ; (8025130 ) - 80250e2: f44f 5200 mov.w r2, #8192 ; 0x2000 - 80250e6: 641a str r2, [r3, #64] ; 0x40 + 8025110: 4b13 ldr r3, [pc, #76] ; (8025160 ) + 8025112: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8025116: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart6) != HAL_OK) - 80250e8: 4811 ldr r0, [pc, #68] ; (8025130 ) - 80250ea: f00d fcc9 bl 8032a80 - 80250ee: 4603 mov r3, r0 - 80250f0: 2b00 cmp r3, #0 - 80250f2: d001 beq.n 80250f8 + 8025118: 4811 ldr r0, [pc, #68] ; (8025160 ) + 802511a: f00d fcc9 bl 8032ab0 + 802511e: 4603 mov r3, r0 + 8025120: 2b00 cmp r3, #0 + 8025122: d001 beq.n 8025128 { Error_Handler(); - 80250f4: f7ff f902 bl 80242fc + 8025124: f7ff f902 bl 802432c } if (HAL_UARTEx_SetTxFifoThreshold(&huart6, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 80250f8: 2100 movs r1, #0 - 80250fa: 480d ldr r0, [pc, #52] ; (8025130 ) - 80250fc: f010 f8c9 bl 8035292 - 8025100: 4603 mov r3, r0 - 8025102: 2b00 cmp r3, #0 - 8025104: d001 beq.n 802510a + 8025128: 2100 movs r1, #0 + 802512a: 480d ldr r0, [pc, #52] ; (8025160 ) + 802512c: f010 f8c9 bl 80352c2 + 8025130: 4603 mov r3, r0 + 8025132: 2b00 cmp r3, #0 + 8025134: d001 beq.n 802513a { Error_Handler(); - 8025106: f7ff f8f9 bl 80242fc + 8025136: f7ff f8f9 bl 802432c } if (HAL_UARTEx_SetRxFifoThreshold(&huart6, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 802510a: 2100 movs r1, #0 - 802510c: 4808 ldr r0, [pc, #32] ; (8025130 ) - 802510e: f010 f8fe bl 803530e - 8025112: 4603 mov r3, r0 - 8025114: 2b00 cmp r3, #0 - 8025116: d001 beq.n 802511c + 802513a: 2100 movs r1, #0 + 802513c: 4808 ldr r0, [pc, #32] ; (8025160 ) + 802513e: f010 f8fe bl 803533e + 8025142: 4603 mov r3, r0 + 8025144: 2b00 cmp r3, #0 + 8025146: d001 beq.n 802514c { Error_Handler(); - 8025118: f7ff f8f0 bl 80242fc + 8025148: f7ff f8f0 bl 802432c } if (HAL_UARTEx_DisableFifoMode(&huart6) != HAL_OK) - 802511c: 4804 ldr r0, [pc, #16] ; (8025130 ) - 802511e: f010 f87f bl 8035220 - 8025122: 4603 mov r3, r0 - 8025124: 2b00 cmp r3, #0 - 8025126: d001 beq.n 802512c + 802514c: 4804 ldr r0, [pc, #16] ; (8025160 ) + 802514e: f010 f87f bl 8035250 + 8025152: 4603 mov r3, r0 + 8025154: 2b00 cmp r3, #0 + 8025156: d001 beq.n 802515c { Error_Handler(); - 8025128: f7ff f8e8 bl 80242fc + 8025158: f7ff f8e8 bl 802432c } /* USER CODE BEGIN USART6_Init 2 */ /* USER CODE END USART6_Init 2 */ } - 802512c: bf00 nop - 802512e: bd80 pop {r7, pc} - 8025130: 2400b404 .word 0x2400b404 - 8025134: 40011400 .word 0x40011400 + 802515c: bf00 nop + 802515e: bd80 pop {r7, pc} + 8025160: 2400b404 .word 0x2400b404 + 8025164: 40011400 .word 0x40011400 -08025138 : +08025168 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { - 8025138: b580 push {r7, lr} - 802513a: b0c8 sub sp, #288 ; 0x120 - 802513c: af00 add r7, sp, #0 - 802513e: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025142: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025146: 6018 str r0, [r3, #0] + 8025168: b580 push {r7, lr} + 802516a: b0c8 sub sp, #288 ; 0x120 + 802516c: af00 add r7, sp, #0 + 802516e: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025172: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025176: 6018 str r0, [r3, #0] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8025148: f507 7386 add.w r3, r7, #268 ; 0x10c - 802514c: 2200 movs r2, #0 - 802514e: 601a str r2, [r3, #0] - 8025150: 605a str r2, [r3, #4] - 8025152: 609a str r2, [r3, #8] - 8025154: 60da str r2, [r3, #12] - 8025156: 611a str r2, [r3, #16] + 8025178: f507 7386 add.w r3, r7, #268 ; 0x10c + 802517c: 2200 movs r2, #0 + 802517e: 601a str r2, [r3, #0] + 8025180: 605a str r2, [r3, #4] + 8025182: 609a str r2, [r3, #8] + 8025184: 60da str r2, [r3, #12] + 8025186: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 8025158: f107 0350 add.w r3, r7, #80 ; 0x50 - 802515c: 22bc movs r2, #188 ; 0xbc - 802515e: 2100 movs r1, #0 - 8025160: 4618 mov r0, r3 - 8025162: f01b fbd5 bl 8040910 + 8025188: f107 0350 add.w r3, r7, #80 ; 0x50 + 802518c: 22bc movs r2, #188 ; 0xbc + 802518e: 2100 movs r1, #0 + 8025190: 4618 mov r0, r3 + 8025192: f01b fbd5 bl 8040940 if(uartHandle->Instance==LPUART1) - 8025166: f507 7390 add.w r3, r7, #288 ; 0x120 - 802516a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802516e: 681b ldr r3, [r3, #0] - 8025170: 681b ldr r3, [r3, #0] - 8025172: 4a8b ldr r2, [pc, #556] ; (80253a0 ) - 8025174: 4293 cmp r3, r2 - 8025176: d17e bne.n 8025276 + 8025196: f507 7390 add.w r3, r7, #288 ; 0x120 + 802519a: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802519e: 681b ldr r3, [r3, #0] + 80251a0: 681b ldr r3, [r3, #0] + 80251a2: 4a8b ldr r2, [pc, #556] ; (80253d0 ) + 80251a4: 4293 cmp r3, r2 + 80251a6: d17e bne.n 80252a6 /* USER CODE END LPUART1_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; - 8025178: 2304 movs r3, #4 - 802517a: 653b str r3, [r7, #80] ; 0x50 + 80251a8: 2304 movs r3, #4 + 80251aa: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_D3PCLK1; - 802517c: 2300 movs r3, #0 - 802517e: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 80251ac: 2300 movs r3, #0 + 80251ae: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 8025182: f107 0350 add.w r3, r7, #80 ; 0x50 - 8025186: 4618 mov r0, r3 - 8025188: f00a fdfa bl 802fd80 - 802518c: 4603 mov r3, r0 - 802518e: 2b00 cmp r3, #0 - 8025190: d001 beq.n 8025196 + 80251b2: f107 0350 add.w r3, r7, #80 ; 0x50 + 80251b6: 4618 mov r0, r3 + 80251b8: f00a fdfa bl 802fdb0 + 80251bc: 4603 mov r3, r0 + 80251be: 2b00 cmp r3, #0 + 80251c0: d001 beq.n 80251c6 { Error_Handler(); - 8025192: f7ff f8b3 bl 80242fc + 80251c2: f7ff f8b3 bl 802432c } /* LPUART1 clock enable */ __HAL_RCC_LPUART1_CLK_ENABLE(); - 8025196: 4b83 ldr r3, [pc, #524] ; (80253a4 ) - 8025198: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 802519c: 4a81 ldr r2, [pc, #516] ; (80253a4 ) - 802519e: f043 0308 orr.w r3, r3, #8 - 80251a2: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 - 80251a6: 4b7f ldr r3, [pc, #508] ; (80253a4 ) - 80251a8: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 80251ac: f003 0308 and.w r3, r3, #8 - 80251b0: 64fb str r3, [r7, #76] ; 0x4c - 80251b2: 6cfb ldr r3, [r7, #76] ; 0x4c + 80251c6: 4b83 ldr r3, [pc, #524] ; (80253d4 ) + 80251c8: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 80251cc: 4a81 ldr r2, [pc, #516] ; (80253d4 ) + 80251ce: f043 0308 orr.w r3, r3, #8 + 80251d2: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 + 80251d6: 4b7f ldr r3, [pc, #508] ; (80253d4 ) + 80251d8: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 80251dc: f003 0308 and.w r3, r3, #8 + 80251e0: 64fb str r3, [r7, #76] ; 0x4c + 80251e2: 6cfb ldr r3, [r7, #76] ; 0x4c __HAL_RCC_GPIOA_CLK_ENABLE(); - 80251b4: 4b7b ldr r3, [pc, #492] ; (80253a4 ) - 80251b6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80251ba: 4a7a ldr r2, [pc, #488] ; (80253a4 ) - 80251bc: f043 0301 orr.w r3, r3, #1 - 80251c0: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 80251c4: 4b77 ldr r3, [pc, #476] ; (80253a4 ) - 80251c6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80251ca: f003 0301 and.w r3, r3, #1 - 80251ce: 64bb str r3, [r7, #72] ; 0x48 - 80251d0: 6cbb ldr r3, [r7, #72] ; 0x48 + 80251e4: 4b7b ldr r3, [pc, #492] ; (80253d4 ) + 80251e6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80251ea: 4a7a ldr r2, [pc, #488] ; (80253d4 ) + 80251ec: f043 0301 orr.w r3, r3, #1 + 80251f0: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 80251f4: 4b77 ldr r3, [pc, #476] ; (80253d4 ) + 80251f6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80251fa: f003 0301 and.w r3, r3, #1 + 80251fe: 64bb str r3, [r7, #72] ; 0x48 + 8025200: 6cbb ldr r3, [r7, #72] ; 0x48 /**LPUART1 GPIO Configuration PA9 ------> LPUART1_TX PA10 ------> LPUART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; - 80251d2: f44f 63c0 mov.w r3, #1536 ; 0x600 - 80251d6: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025202: f44f 63c0 mov.w r3, #1536 ; 0x600 + 8025206: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80251da: 2302 movs r3, #2 - 80251dc: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 802520a: 2302 movs r3, #2 + 802520c: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 80251e0: 2300 movs r3, #0 - 80251e2: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 8025210: 2300 movs r3, #0 + 8025212: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80251e6: 2300 movs r3, #0 - 80251e8: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025216: 2300 movs r3, #0 + 8025218: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF3_LPUART; - 80251ec: 2303 movs r3, #3 - 80251ee: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 802521c: 2303 movs r3, #3 + 802521e: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80251f2: f507 7386 add.w r3, r7, #268 ; 0x10c - 80251f6: 4619 mov r1, r3 - 80251f8: 486b ldr r0, [pc, #428] ; (80253a8 ) - 80251fa: f008 f91f bl 802d43c + 8025222: f507 7386 add.w r3, r7, #268 ; 0x10c + 8025226: 4619 mov r1, r3 + 8025228: 486b ldr r0, [pc, #428] ; (80253d8 ) + 802522a: f008 f91f bl 802d46c /* LPUART1 DMA Init */ /* LPUART1_TX Init */ hdma_lpuart1_tx.Instance = BDMA_Channel0; - 80251fe: 4b6b ldr r3, [pc, #428] ; (80253ac ) - 8025200: 4a6b ldr r2, [pc, #428] ; (80253b0 ) - 8025202: 601a str r2, [r3, #0] + 802522e: 4b6b ldr r3, [pc, #428] ; (80253dc ) + 8025230: 4a6b ldr r2, [pc, #428] ; (80253e0 ) + 8025232: 601a str r2, [r3, #0] hdma_lpuart1_tx.Init.Request = BDMA_REQUEST_LPUART1_TX; - 8025204: 4b69 ldr r3, [pc, #420] ; (80253ac ) - 8025206: 220a movs r2, #10 - 8025208: 605a str r2, [r3, #4] + 8025234: 4b69 ldr r3, [pc, #420] ; (80253dc ) + 8025236: 220a movs r2, #10 + 8025238: 605a str r2, [r3, #4] hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 802520a: 4b68 ldr r3, [pc, #416] ; (80253ac ) - 802520c: 2240 movs r2, #64 ; 0x40 - 802520e: 609a str r2, [r3, #8] + 802523a: 4b68 ldr r3, [pc, #416] ; (80253dc ) + 802523c: 2240 movs r2, #64 ; 0x40 + 802523e: 609a str r2, [r3, #8] hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8025210: 4b66 ldr r3, [pc, #408] ; (80253ac ) - 8025212: 2200 movs r2, #0 - 8025214: 60da str r2, [r3, #12] + 8025240: 4b66 ldr r3, [pc, #408] ; (80253dc ) + 8025242: 2200 movs r2, #0 + 8025244: 60da str r2, [r3, #12] hdma_lpuart1_tx.Init.MemInc = DMA_MINC_ENABLE; - 8025216: 4b65 ldr r3, [pc, #404] ; (80253ac ) - 8025218: f44f 6280 mov.w r2, #1024 ; 0x400 - 802521c: 611a str r2, [r3, #16] + 8025246: 4b65 ldr r3, [pc, #404] ; (80253dc ) + 8025248: f44f 6280 mov.w r2, #1024 ; 0x400 + 802524c: 611a str r2, [r3, #16] hdma_lpuart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 802521e: 4b63 ldr r3, [pc, #396] ; (80253ac ) - 8025220: 2200 movs r2, #0 - 8025222: 615a str r2, [r3, #20] + 802524e: 4b63 ldr r3, [pc, #396] ; (80253dc ) + 8025250: 2200 movs r2, #0 + 8025252: 615a str r2, [r3, #20] hdma_lpuart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8025224: 4b61 ldr r3, [pc, #388] ; (80253ac ) - 8025226: 2200 movs r2, #0 - 8025228: 619a str r2, [r3, #24] + 8025254: 4b61 ldr r3, [pc, #388] ; (80253dc ) + 8025256: 2200 movs r2, #0 + 8025258: 619a str r2, [r3, #24] hdma_lpuart1_tx.Init.Mode = DMA_NORMAL; - 802522a: 4b60 ldr r3, [pc, #384] ; (80253ac ) - 802522c: 2200 movs r2, #0 - 802522e: 61da str r2, [r3, #28] + 802525a: 4b60 ldr r3, [pc, #384] ; (80253dc ) + 802525c: 2200 movs r2, #0 + 802525e: 61da str r2, [r3, #28] hdma_lpuart1_tx.Init.Priority = DMA_PRIORITY_LOW; - 8025230: 4b5e ldr r3, [pc, #376] ; (80253ac ) - 8025232: 2200 movs r2, #0 - 8025234: 621a str r2, [r3, #32] + 8025260: 4b5e ldr r3, [pc, #376] ; (80253dc ) + 8025262: 2200 movs r2, #0 + 8025264: 621a str r2, [r3, #32] if (HAL_DMA_Init(&hdma_lpuart1_tx) != HAL_OK) - 8025236: 485d ldr r0, [pc, #372] ; (80253ac ) - 8025238: f002 fc5c bl 8027af4 - 802523c: 4603 mov r3, r0 - 802523e: 2b00 cmp r3, #0 - 8025240: d001 beq.n 8025246 + 8025266: 485d ldr r0, [pc, #372] ; (80253dc ) + 8025268: f002 fc5c bl 8027b24 + 802526c: 4603 mov r3, r0 + 802526e: 2b00 cmp r3, #0 + 8025270: d001 beq.n 8025276 { Error_Handler(); - 8025242: f7ff f85b bl 80242fc + 8025272: f7ff f85b bl 802432c } __HAL_LINKDMA(uartHandle,hdmatx,hdma_lpuart1_tx); - 8025246: f507 7390 add.w r3, r7, #288 ; 0x120 - 802524a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802524e: 681b ldr r3, [r3, #0] - 8025250: 4a56 ldr r2, [pc, #344] ; (80253ac ) - 8025252: 679a str r2, [r3, #120] ; 0x78 - 8025254: 4a55 ldr r2, [pc, #340] ; (80253ac ) - 8025256: f507 7390 add.w r3, r7, #288 ; 0x120 - 802525a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802525e: 681b ldr r3, [r3, #0] - 8025260: 6393 str r3, [r2, #56] ; 0x38 + 8025276: f507 7390 add.w r3, r7, #288 ; 0x120 + 802527a: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802527e: 681b ldr r3, [r3, #0] + 8025280: 4a56 ldr r2, [pc, #344] ; (80253dc ) + 8025282: 679a str r2, [r3, #120] ; 0x78 + 8025284: 4a55 ldr r2, [pc, #340] ; (80253dc ) + 8025286: f507 7390 add.w r3, r7, #288 ; 0x120 + 802528a: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802528e: 681b ldr r3, [r3, #0] + 8025290: 6393 str r3, [r2, #56] ; 0x38 /* LPUART1 interrupt Init */ HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0); - 8025262: 2200 movs r2, #0 - 8025264: 2100 movs r1, #0 - 8025266: 208e movs r0, #142 ; 0x8e - 8025268: f002 fb93 bl 8027992 + 8025292: 2200 movs r2, #0 + 8025294: 2100 movs r1, #0 + 8025296: 208e movs r0, #142 ; 0x8e + 8025298: f002 fb93 bl 80279c2 HAL_NVIC_EnableIRQ(LPUART1_IRQn); - 802526c: 208e movs r0, #142 ; 0x8e - 802526e: f002 fbaa bl 80279c6 + 802529c: 208e movs r0, #142 ; 0x8e + 802529e: f002 fbaa bl 80279f6 HAL_NVIC_EnableIRQ(USART6_IRQn); /* USER CODE BEGIN USART6_MspInit 1 */ /* USER CODE END USART6_MspInit 1 */ } } - 8025272: f000 bc67 b.w 8025b44 + 80252a2: f000 bc67 b.w 8025b74 else if(uartHandle->Instance==UART4) - 8025276: f507 7390 add.w r3, r7, #288 ; 0x120 - 802527a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802527e: 681b ldr r3, [r3, #0] - 8025280: 681b ldr r3, [r3, #0] - 8025282: 4a4c ldr r2, [pc, #304] ; (80253b4 ) - 8025284: 4293 cmp r3, r2 - 8025286: f040 809b bne.w 80253c0 + 80252a6: f507 7390 add.w r3, r7, #288 ; 0x120 + 80252aa: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80252ae: 681b ldr r3, [r3, #0] + 80252b0: 681b ldr r3, [r3, #0] + 80252b2: 4a4c ldr r2, [pc, #304] ; (80253e4 ) + 80252b4: 4293 cmp r3, r2 + 80252b6: f040 809b bne.w 80253f0 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART4; - 802528a: 2302 movs r3, #2 - 802528c: 653b str r3, [r7, #80] ; 0x50 + 80252ba: 2302 movs r3, #2 + 80252bc: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 802528e: 2300 movs r3, #0 - 8025290: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 80252be: 2300 movs r3, #0 + 80252c0: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 8025294: f107 0350 add.w r3, r7, #80 ; 0x50 - 8025298: 4618 mov r0, r3 - 802529a: f00a fd71 bl 802fd80 - 802529e: 4603 mov r3, r0 - 80252a0: 2b00 cmp r3, #0 - 80252a2: d001 beq.n 80252a8 + 80252c4: f107 0350 add.w r3, r7, #80 ; 0x50 + 80252c8: 4618 mov r0, r3 + 80252ca: f00a fd71 bl 802fdb0 + 80252ce: 4603 mov r3, r0 + 80252d0: 2b00 cmp r3, #0 + 80252d2: d001 beq.n 80252d8 Error_Handler(); - 80252a4: f7ff f82a bl 80242fc + 80252d4: f7ff f82a bl 802432c __HAL_RCC_UART4_CLK_ENABLE(); - 80252a8: 4b3e ldr r3, [pc, #248] ; (80253a4 ) - 80252aa: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 80252ae: 4a3d ldr r2, [pc, #244] ; (80253a4 ) - 80252b0: f443 2300 orr.w r3, r3, #524288 ; 0x80000 - 80252b4: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 80252b8: 4b3a ldr r3, [pc, #232] ; (80253a4 ) - 80252ba: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 80252be: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 80252c2: 647b str r3, [r7, #68] ; 0x44 - 80252c4: 6c7b ldr r3, [r7, #68] ; 0x44 + 80252d8: 4b3e ldr r3, [pc, #248] ; (80253d4 ) + 80252da: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 80252de: 4a3d ldr r2, [pc, #244] ; (80253d4 ) + 80252e0: f443 2300 orr.w r3, r3, #524288 ; 0x80000 + 80252e4: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 80252e8: 4b3a ldr r3, [pc, #232] ; (80253d4 ) + 80252ea: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 80252ee: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 80252f2: 647b str r3, [r7, #68] ; 0x44 + 80252f4: 6c7b ldr r3, [r7, #68] ; 0x44 __HAL_RCC_GPIOA_CLK_ENABLE(); - 80252c6: 4b37 ldr r3, [pc, #220] ; (80253a4 ) - 80252c8: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80252cc: 4a35 ldr r2, [pc, #212] ; (80253a4 ) - 80252ce: f043 0301 orr.w r3, r3, #1 - 80252d2: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 80252d6: 4b33 ldr r3, [pc, #204] ; (80253a4 ) - 80252d8: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80252dc: f003 0301 and.w r3, r3, #1 - 80252e0: 643b str r3, [r7, #64] ; 0x40 - 80252e2: 6c3b ldr r3, [r7, #64] ; 0x40 + 80252f6: 4b37 ldr r3, [pc, #220] ; (80253d4 ) + 80252f8: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80252fc: 4a35 ldr r2, [pc, #212] ; (80253d4 ) + 80252fe: f043 0301 orr.w r3, r3, #1 + 8025302: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8025306: 4b33 ldr r3, [pc, #204] ; (80253d4 ) + 8025308: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 802530c: f003 0301 and.w r3, r3, #1 + 8025310: 643b str r3, [r7, #64] ; 0x40 + 8025312: 6c3b ldr r3, [r7, #64] ; 0x40 GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; - 80252e4: f44f 53c0 mov.w r3, #6144 ; 0x1800 - 80252e8: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025314: f44f 53c0 mov.w r3, #6144 ; 0x1800 + 8025318: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80252ec: 2302 movs r3, #2 - 80252ee: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 802531c: 2302 movs r3, #2 + 802531e: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 80252f2: 2300 movs r3, #0 - 80252f4: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 8025322: 2300 movs r3, #0 + 8025324: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80252f8: 2300 movs r3, #0 - 80252fa: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025328: 2300 movs r3, #0 + 802532a: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF6_UART4; - 80252fe: 2306 movs r3, #6 - 8025300: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 802532e: 2306 movs r3, #6 + 8025330: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8025304: f507 7386 add.w r3, r7, #268 ; 0x10c - 8025308: 4619 mov r1, r3 - 802530a: 4827 ldr r0, [pc, #156] ; (80253a8 ) - 802530c: f008 f896 bl 802d43c + 8025334: f507 7386 add.w r3, r7, #268 ; 0x10c + 8025338: 4619 mov r1, r3 + 802533a: 4827 ldr r0, [pc, #156] ; (80253d8 ) + 802533c: f008 f896 bl 802d46c hdma_uart4_tx.Instance = DMA1_Stream0; - 8025310: 4b29 ldr r3, [pc, #164] ; (80253b8 ) - 8025312: 4a2a ldr r2, [pc, #168] ; (80253bc ) - 8025314: 601a str r2, [r3, #0] + 8025340: 4b29 ldr r3, [pc, #164] ; (80253e8 ) + 8025342: 4a2a ldr r2, [pc, #168] ; (80253ec ) + 8025344: 601a str r2, [r3, #0] hdma_uart4_tx.Init.Request = DMA_REQUEST_UART4_TX; - 8025316: 4b28 ldr r3, [pc, #160] ; (80253b8 ) - 8025318: 2240 movs r2, #64 ; 0x40 - 802531a: 605a str r2, [r3, #4] + 8025346: 4b28 ldr r3, [pc, #160] ; (80253e8 ) + 8025348: 2240 movs r2, #64 ; 0x40 + 802534a: 605a str r2, [r3, #4] hdma_uart4_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 802531c: 4b26 ldr r3, [pc, #152] ; (80253b8 ) - 802531e: 2240 movs r2, #64 ; 0x40 - 8025320: 609a str r2, [r3, #8] + 802534c: 4b26 ldr r3, [pc, #152] ; (80253e8 ) + 802534e: 2240 movs r2, #64 ; 0x40 + 8025350: 609a str r2, [r3, #8] hdma_uart4_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8025322: 4b25 ldr r3, [pc, #148] ; (80253b8 ) - 8025324: 2200 movs r2, #0 - 8025326: 60da str r2, [r3, #12] + 8025352: 4b25 ldr r3, [pc, #148] ; (80253e8 ) + 8025354: 2200 movs r2, #0 + 8025356: 60da str r2, [r3, #12] hdma_uart4_tx.Init.MemInc = DMA_MINC_ENABLE; - 8025328: 4b23 ldr r3, [pc, #140] ; (80253b8 ) - 802532a: f44f 6280 mov.w r2, #1024 ; 0x400 - 802532e: 611a str r2, [r3, #16] + 8025358: 4b23 ldr r3, [pc, #140] ; (80253e8 ) + 802535a: f44f 6280 mov.w r2, #1024 ; 0x400 + 802535e: 611a str r2, [r3, #16] hdma_uart4_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8025330: 4b21 ldr r3, [pc, #132] ; (80253b8 ) - 8025332: 2200 movs r2, #0 - 8025334: 615a str r2, [r3, #20] + 8025360: 4b21 ldr r3, [pc, #132] ; (80253e8 ) + 8025362: 2200 movs r2, #0 + 8025364: 615a str r2, [r3, #20] hdma_uart4_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8025336: 4b20 ldr r3, [pc, #128] ; (80253b8 ) - 8025338: 2200 movs r2, #0 - 802533a: 619a str r2, [r3, #24] + 8025366: 4b20 ldr r3, [pc, #128] ; (80253e8 ) + 8025368: 2200 movs r2, #0 + 802536a: 619a str r2, [r3, #24] hdma_uart4_tx.Init.Mode = DMA_NORMAL; - 802533c: 4b1e ldr r3, [pc, #120] ; (80253b8 ) - 802533e: 2200 movs r2, #0 - 8025340: 61da str r2, [r3, #28] + 802536c: 4b1e ldr r3, [pc, #120] ; (80253e8 ) + 802536e: 2200 movs r2, #0 + 8025370: 61da str r2, [r3, #28] hdma_uart4_tx.Init.Priority = DMA_PRIORITY_LOW; - 8025342: 4b1d ldr r3, [pc, #116] ; (80253b8 ) - 8025344: 2200 movs r2, #0 - 8025346: 621a str r2, [r3, #32] + 8025372: 4b1d ldr r3, [pc, #116] ; (80253e8 ) + 8025374: 2200 movs r2, #0 + 8025376: 621a str r2, [r3, #32] hdma_uart4_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE; - 8025348: 4b1b ldr r3, [pc, #108] ; (80253b8 ) - 802534a: 2204 movs r2, #4 - 802534c: 625a str r2, [r3, #36] ; 0x24 + 8025378: 4b1b ldr r3, [pc, #108] ; (80253e8 ) + 802537a: 2204 movs r2, #4 + 802537c: 625a str r2, [r3, #36] ; 0x24 hdma_uart4_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; - 802534e: 4b1a ldr r3, [pc, #104] ; (80253b8 ) - 8025350: 2203 movs r2, #3 - 8025352: 629a str r2, [r3, #40] ; 0x28 + 802537e: 4b1a ldr r3, [pc, #104] ; (80253e8 ) + 8025380: 2203 movs r2, #3 + 8025382: 629a str r2, [r3, #40] ; 0x28 hdma_uart4_tx.Init.MemBurst = DMA_MBURST_SINGLE; - 8025354: 4b18 ldr r3, [pc, #96] ; (80253b8 ) - 8025356: 2200 movs r2, #0 - 8025358: 62da str r2, [r3, #44] ; 0x2c + 8025384: 4b18 ldr r3, [pc, #96] ; (80253e8 ) + 8025386: 2200 movs r2, #0 + 8025388: 62da str r2, [r3, #44] ; 0x2c hdma_uart4_tx.Init.PeriphBurst = DMA_PBURST_SINGLE; - 802535a: 4b17 ldr r3, [pc, #92] ; (80253b8 ) - 802535c: 2200 movs r2, #0 - 802535e: 631a str r2, [r3, #48] ; 0x30 + 802538a: 4b17 ldr r3, [pc, #92] ; (80253e8 ) + 802538c: 2200 movs r2, #0 + 802538e: 631a str r2, [r3, #48] ; 0x30 if (HAL_DMA_Init(&hdma_uart4_tx) != HAL_OK) - 8025360: 4815 ldr r0, [pc, #84] ; (80253b8 ) - 8025362: f002 fbc7 bl 8027af4 - 8025366: 4603 mov r3, r0 - 8025368: 2b00 cmp r3, #0 - 802536a: d001 beq.n 8025370 + 8025390: 4815 ldr r0, [pc, #84] ; (80253e8 ) + 8025392: f002 fbc7 bl 8027b24 + 8025396: 4603 mov r3, r0 + 8025398: 2b00 cmp r3, #0 + 802539a: d001 beq.n 80253a0 Error_Handler(); - 802536c: f7fe ffc6 bl 80242fc + 802539c: f7fe ffc6 bl 802432c __HAL_LINKDMA(uartHandle,hdmatx,hdma_uart4_tx); - 8025370: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025374: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025378: 681b ldr r3, [r3, #0] - 802537a: 4a0f ldr r2, [pc, #60] ; (80253b8 ) - 802537c: 679a str r2, [r3, #120] ; 0x78 - 802537e: 4a0e ldr r2, [pc, #56] ; (80253b8 ) - 8025380: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025384: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025388: 681b ldr r3, [r3, #0] - 802538a: 6393 str r3, [r2, #56] ; 0x38 + 80253a0: f507 7390 add.w r3, r7, #288 ; 0x120 + 80253a4: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80253a8: 681b ldr r3, [r3, #0] + 80253aa: 4a0f ldr r2, [pc, #60] ; (80253e8 ) + 80253ac: 679a str r2, [r3, #120] ; 0x78 + 80253ae: 4a0e ldr r2, [pc, #56] ; (80253e8 ) + 80253b0: f507 7390 add.w r3, r7, #288 ; 0x120 + 80253b4: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80253b8: 681b ldr r3, [r3, #0] + 80253ba: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(UART4_IRQn, 0, 0); - 802538c: 2200 movs r2, #0 - 802538e: 2100 movs r1, #0 - 8025390: 2034 movs r0, #52 ; 0x34 - 8025392: f002 fafe bl 8027992 + 80253bc: 2200 movs r2, #0 + 80253be: 2100 movs r1, #0 + 80253c0: 2034 movs r0, #52 ; 0x34 + 80253c2: f002 fafe bl 80279c2 HAL_NVIC_EnableIRQ(UART4_IRQn); - 8025396: 2034 movs r0, #52 ; 0x34 - 8025398: f002 fb15 bl 80279c6 -} - 802539c: e3d2 b.n 8025b44 - 802539e: bf00 nop - 80253a0: 58000c00 .word 0x58000c00 - 80253a4: 58024400 .word 0x58024400 - 80253a8: 58020000 .word 0x58020000 - 80253ac: 2400b494 .word 0x2400b494 - 80253b0: 58025408 .word 0x58025408 - 80253b4: 40004c00 .word 0x40004c00 - 80253b8: 2400b50c .word 0x2400b50c - 80253bc: 40020010 .word 0x40020010 + 80253c6: 2034 movs r0, #52 ; 0x34 + 80253c8: f002 fb15 bl 80279f6 +} + 80253cc: e3d2 b.n 8025b74 + 80253ce: bf00 nop + 80253d0: 58000c00 .word 0x58000c00 + 80253d4: 58024400 .word 0x58024400 + 80253d8: 58020000 .word 0x58020000 + 80253dc: 2400b494 .word 0x2400b494 + 80253e0: 58025408 .word 0x58025408 + 80253e4: 40004c00 .word 0x40004c00 + 80253e8: 2400b50c .word 0x2400b50c + 80253ec: 40020010 .word 0x40020010 else if(uartHandle->Instance==UART5) - 80253c0: f507 7390 add.w r3, r7, #288 ; 0x120 - 80253c4: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80253c8: 681b ldr r3, [r3, #0] - 80253ca: 681b ldr r3, [r3, #0] - 80253cc: 4a99 ldr r2, [pc, #612] ; (8025634 ) - 80253ce: 4293 cmp r3, r2 - 80253d0: f040 80a5 bne.w 802551e + 80253f0: f507 7390 add.w r3, r7, #288 ; 0x120 + 80253f4: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80253f8: 681b ldr r3, [r3, #0] + 80253fa: 681b ldr r3, [r3, #0] + 80253fc: 4a99 ldr r2, [pc, #612] ; (8025664 ) + 80253fe: 4293 cmp r3, r2 + 8025400: f040 80a5 bne.w 802554e PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART5; - 80253d4: 2302 movs r3, #2 - 80253d6: 653b str r3, [r7, #80] ; 0x50 + 8025404: 2302 movs r3, #2 + 8025406: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 80253d8: 2300 movs r3, #0 - 80253da: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 8025408: 2300 movs r3, #0 + 802540a: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 80253de: f107 0350 add.w r3, r7, #80 ; 0x50 - 80253e2: 4618 mov r0, r3 - 80253e4: f00a fccc bl 802fd80 - 80253e8: 4603 mov r3, r0 - 80253ea: 2b00 cmp r3, #0 - 80253ec: d001 beq.n 80253f2 + 802540e: f107 0350 add.w r3, r7, #80 ; 0x50 + 8025412: 4618 mov r0, r3 + 8025414: f00a fccc bl 802fdb0 + 8025418: 4603 mov r3, r0 + 802541a: 2b00 cmp r3, #0 + 802541c: d001 beq.n 8025422 Error_Handler(); - 80253ee: f7fe ff85 bl 80242fc + 802541e: f7fe ff85 bl 802432c __HAL_RCC_UART5_CLK_ENABLE(); - 80253f2: 4b91 ldr r3, [pc, #580] ; (8025638 ) - 80253f4: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 80253f8: 4a8f ldr r2, [pc, #572] ; (8025638 ) - 80253fa: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 - 80253fe: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 8025402: 4b8d ldr r3, [pc, #564] ; (8025638 ) - 8025404: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025408: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 802540c: 63fb str r3, [r7, #60] ; 0x3c - 802540e: 6bfb ldr r3, [r7, #60] ; 0x3c + 8025422: 4b91 ldr r3, [pc, #580] ; (8025668 ) + 8025424: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025428: 4a8f ldr r2, [pc, #572] ; (8025668 ) + 802542a: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 + 802542e: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 8025432: 4b8d ldr r3, [pc, #564] ; (8025668 ) + 8025434: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025438: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 802543c: 63fb str r3, [r7, #60] ; 0x3c + 802543e: 6bfb ldr r3, [r7, #60] ; 0x3c __HAL_RCC_GPIOC_CLK_ENABLE(); - 8025410: 4b89 ldr r3, [pc, #548] ; (8025638 ) - 8025412: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025416: 4a88 ldr r2, [pc, #544] ; (8025638 ) - 8025418: f043 0304 orr.w r3, r3, #4 - 802541c: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8025420: 4b85 ldr r3, [pc, #532] ; (8025638 ) - 8025422: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025426: f003 0304 and.w r3, r3, #4 - 802542a: 63bb str r3, [r7, #56] ; 0x38 - 802542c: 6bbb ldr r3, [r7, #56] ; 0x38 + 8025440: 4b89 ldr r3, [pc, #548] ; (8025668 ) + 8025442: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025446: 4a88 ldr r2, [pc, #544] ; (8025668 ) + 8025448: f043 0304 orr.w r3, r3, #4 + 802544c: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8025450: 4b85 ldr r3, [pc, #532] ; (8025668 ) + 8025452: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025456: f003 0304 and.w r3, r3, #4 + 802545a: 63bb str r3, [r7, #56] ; 0x38 + 802545c: 6bbb ldr r3, [r7, #56] ; 0x38 __HAL_RCC_GPIOD_CLK_ENABLE(); - 802542e: 4b82 ldr r3, [pc, #520] ; (8025638 ) - 8025430: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025434: 4a80 ldr r2, [pc, #512] ; (8025638 ) - 8025436: f043 0308 orr.w r3, r3, #8 - 802543a: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 802543e: 4b7e ldr r3, [pc, #504] ; (8025638 ) - 8025440: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025444: f003 0308 and.w r3, r3, #8 - 8025448: 637b str r3, [r7, #52] ; 0x34 - 802544a: 6b7b ldr r3, [r7, #52] ; 0x34 + 802545e: 4b82 ldr r3, [pc, #520] ; (8025668 ) + 8025460: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025464: 4a80 ldr r2, [pc, #512] ; (8025668 ) + 8025466: f043 0308 orr.w r3, r3, #8 + 802546a: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 802546e: 4b7e ldr r3, [pc, #504] ; (8025668 ) + 8025470: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025474: f003 0308 and.w r3, r3, #8 + 8025478: 637b str r3, [r7, #52] ; 0x34 + 802547a: 6b7b ldr r3, [r7, #52] ; 0x34 GPIO_InitStruct.Pin = GPIO_PIN_12; - 802544c: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8025450: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 802547c: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8025480: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8025454: 2302 movs r3, #2 - 8025456: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025484: 2302 movs r3, #2 + 8025486: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 802545a: 2300 movs r3, #0 - 802545c: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 802548a: 2300 movs r3, #0 + 802548c: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8025460: 2300 movs r3, #0 - 8025462: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025490: 2300 movs r3, #0 + 8025492: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; - 8025466: 2308 movs r3, #8 - 8025468: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 8025496: 2308 movs r3, #8 + 8025498: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 802546c: f507 7386 add.w r3, r7, #268 ; 0x10c - 8025470: 4619 mov r1, r3 - 8025472: 4872 ldr r0, [pc, #456] ; (802563c ) - 8025474: f007 ffe2 bl 802d43c + 802549c: f507 7386 add.w r3, r7, #268 ; 0x10c + 80254a0: 4619 mov r1, r3 + 80254a2: 4872 ldr r0, [pc, #456] ; (802566c ) + 80254a4: f007 ffe2 bl 802d46c GPIO_InitStruct.Pin = GPIO_PIN_2; - 8025478: 2304 movs r3, #4 - 802547a: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 80254a8: 2304 movs r3, #4 + 80254aa: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 802547e: 2302 movs r3, #2 - 8025480: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 80254ae: 2302 movs r3, #2 + 80254b0: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8025484: 2300 movs r3, #0 - 8025486: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 80254b4: 2300 movs r3, #0 + 80254b6: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 802548a: 2300 movs r3, #0 - 802548c: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 80254ba: 2300 movs r3, #0 + 80254bc: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; - 8025490: 2308 movs r3, #8 - 8025492: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 80254c0: 2308 movs r3, #8 + 80254c2: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 8025496: f507 7386 add.w r3, r7, #268 ; 0x10c - 802549a: 4619 mov r1, r3 - 802549c: 4868 ldr r0, [pc, #416] ; (8025640 ) - 802549e: f007 ffcd bl 802d43c + 80254c6: f507 7386 add.w r3, r7, #268 ; 0x10c + 80254ca: 4619 mov r1, r3 + 80254cc: 4868 ldr r0, [pc, #416] ; (8025670 ) + 80254ce: f007 ffcd bl 802d46c hdma_uart5_tx.Instance = DMA1_Stream1; - 80254a2: 4b68 ldr r3, [pc, #416] ; (8025644 ) - 80254a4: 4a68 ldr r2, [pc, #416] ; (8025648 ) - 80254a6: 601a str r2, [r3, #0] + 80254d2: 4b68 ldr r3, [pc, #416] ; (8025674 ) + 80254d4: 4a68 ldr r2, [pc, #416] ; (8025678 ) + 80254d6: 601a str r2, [r3, #0] hdma_uart5_tx.Init.Request = DMA_REQUEST_UART5_TX; - 80254a8: 4b66 ldr r3, [pc, #408] ; (8025644 ) - 80254aa: 2242 movs r2, #66 ; 0x42 - 80254ac: 605a str r2, [r3, #4] + 80254d8: 4b66 ldr r3, [pc, #408] ; (8025674 ) + 80254da: 2242 movs r2, #66 ; 0x42 + 80254dc: 605a str r2, [r3, #4] hdma_uart5_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 80254ae: 4b65 ldr r3, [pc, #404] ; (8025644 ) - 80254b0: 2240 movs r2, #64 ; 0x40 - 80254b2: 609a str r2, [r3, #8] + 80254de: 4b65 ldr r3, [pc, #404] ; (8025674 ) + 80254e0: 2240 movs r2, #64 ; 0x40 + 80254e2: 609a str r2, [r3, #8] hdma_uart5_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 80254b4: 4b63 ldr r3, [pc, #396] ; (8025644 ) - 80254b6: 2200 movs r2, #0 - 80254b8: 60da str r2, [r3, #12] + 80254e4: 4b63 ldr r3, [pc, #396] ; (8025674 ) + 80254e6: 2200 movs r2, #0 + 80254e8: 60da str r2, [r3, #12] hdma_uart5_tx.Init.MemInc = DMA_MINC_ENABLE; - 80254ba: 4b62 ldr r3, [pc, #392] ; (8025644 ) - 80254bc: f44f 6280 mov.w r2, #1024 ; 0x400 - 80254c0: 611a str r2, [r3, #16] + 80254ea: 4b62 ldr r3, [pc, #392] ; (8025674 ) + 80254ec: f44f 6280 mov.w r2, #1024 ; 0x400 + 80254f0: 611a str r2, [r3, #16] hdma_uart5_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 80254c2: 4b60 ldr r3, [pc, #384] ; (8025644 ) - 80254c4: 2200 movs r2, #0 - 80254c6: 615a str r2, [r3, #20] + 80254f2: 4b60 ldr r3, [pc, #384] ; (8025674 ) + 80254f4: 2200 movs r2, #0 + 80254f6: 615a str r2, [r3, #20] hdma_uart5_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 80254c8: 4b5e ldr r3, [pc, #376] ; (8025644 ) - 80254ca: 2200 movs r2, #0 - 80254cc: 619a str r2, [r3, #24] + 80254f8: 4b5e ldr r3, [pc, #376] ; (8025674 ) + 80254fa: 2200 movs r2, #0 + 80254fc: 619a str r2, [r3, #24] hdma_uart5_tx.Init.Mode = DMA_NORMAL; - 80254ce: 4b5d ldr r3, [pc, #372] ; (8025644 ) - 80254d0: 2200 movs r2, #0 - 80254d2: 61da str r2, [r3, #28] + 80254fe: 4b5d ldr r3, [pc, #372] ; (8025674 ) + 8025500: 2200 movs r2, #0 + 8025502: 61da str r2, [r3, #28] hdma_uart5_tx.Init.Priority = DMA_PRIORITY_LOW; - 80254d4: 4b5b ldr r3, [pc, #364] ; (8025644 ) - 80254d6: 2200 movs r2, #0 - 80254d8: 621a str r2, [r3, #32] + 8025504: 4b5b ldr r3, [pc, #364] ; (8025674 ) + 8025506: 2200 movs r2, #0 + 8025508: 621a str r2, [r3, #32] hdma_uart5_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 80254da: 4b5a ldr r3, [pc, #360] ; (8025644 ) - 80254dc: 2200 movs r2, #0 - 80254de: 625a str r2, [r3, #36] ; 0x24 + 802550a: 4b5a ldr r3, [pc, #360] ; (8025674 ) + 802550c: 2200 movs r2, #0 + 802550e: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_uart5_tx) != HAL_OK) - 80254e0: 4858 ldr r0, [pc, #352] ; (8025644 ) - 80254e2: f002 fb07 bl 8027af4 - 80254e6: 4603 mov r3, r0 - 80254e8: 2b00 cmp r3, #0 - 80254ea: d001 beq.n 80254f0 + 8025510: 4858 ldr r0, [pc, #352] ; (8025674 ) + 8025512: f002 fb07 bl 8027b24 + 8025516: 4603 mov r3, r0 + 8025518: 2b00 cmp r3, #0 + 802551a: d001 beq.n 8025520 Error_Handler(); - 80254ec: f7fe ff06 bl 80242fc + 802551c: f7fe ff06 bl 802432c __HAL_LINKDMA(uartHandle,hdmatx,hdma_uart5_tx); - 80254f0: f507 7390 add.w r3, r7, #288 ; 0x120 - 80254f4: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80254f8: 681b ldr r3, [r3, #0] - 80254fa: 4a52 ldr r2, [pc, #328] ; (8025644 ) - 80254fc: 679a str r2, [r3, #120] ; 0x78 - 80254fe: 4a51 ldr r2, [pc, #324] ; (8025644 ) - 8025500: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025504: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025508: 681b ldr r3, [r3, #0] - 802550a: 6393 str r3, [r2, #56] ; 0x38 + 8025520: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025524: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025528: 681b ldr r3, [r3, #0] + 802552a: 4a52 ldr r2, [pc, #328] ; (8025674 ) + 802552c: 679a str r2, [r3, #120] ; 0x78 + 802552e: 4a51 ldr r2, [pc, #324] ; (8025674 ) + 8025530: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025534: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025538: 681b ldr r3, [r3, #0] + 802553a: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(UART5_IRQn, 0, 0); - 802550c: 2200 movs r2, #0 - 802550e: 2100 movs r1, #0 - 8025510: 2035 movs r0, #53 ; 0x35 - 8025512: f002 fa3e bl 8027992 + 802553c: 2200 movs r2, #0 + 802553e: 2100 movs r1, #0 + 8025540: 2035 movs r0, #53 ; 0x35 + 8025542: f002 fa3e bl 80279c2 HAL_NVIC_EnableIRQ(UART5_IRQn); - 8025516: 2035 movs r0, #53 ; 0x35 - 8025518: f002 fa55 bl 80279c6 + 8025546: 2035 movs r0, #53 ; 0x35 + 8025548: f002 fa55 bl 80279f6 } - 802551c: e312 b.n 8025b44 + 802554c: e312 b.n 8025b74 else if(uartHandle->Instance==UART7) - 802551e: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025522: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025526: 681b ldr r3, [r3, #0] - 8025528: 681b ldr r3, [r3, #0] - 802552a: 4a48 ldr r2, [pc, #288] ; (802564c ) - 802552c: 4293 cmp r3, r2 - 802552e: f040 8095 bne.w 802565c + 802554e: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025552: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025556: 681b ldr r3, [r3, #0] + 8025558: 681b ldr r3, [r3, #0] + 802555a: 4a48 ldr r2, [pc, #288] ; (802567c ) + 802555c: 4293 cmp r3, r2 + 802555e: f040 8095 bne.w 802568c PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART7; - 8025532: 2302 movs r3, #2 - 8025534: 653b str r3, [r7, #80] ; 0x50 + 8025562: 2302 movs r3, #2 + 8025564: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 8025536: 2300 movs r3, #0 - 8025538: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 8025566: 2300 movs r3, #0 + 8025568: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 802553c: f107 0350 add.w r3, r7, #80 ; 0x50 - 8025540: 4618 mov r0, r3 - 8025542: f00a fc1d bl 802fd80 - 8025546: 4603 mov r3, r0 - 8025548: 2b00 cmp r3, #0 - 802554a: d001 beq.n 8025550 + 802556c: f107 0350 add.w r3, r7, #80 ; 0x50 + 8025570: 4618 mov r0, r3 + 8025572: f00a fc1d bl 802fdb0 + 8025576: 4603 mov r3, r0 + 8025578: 2b00 cmp r3, #0 + 802557a: d001 beq.n 8025580 Error_Handler(); - 802554c: f7fe fed6 bl 80242fc + 802557c: f7fe fed6 bl 802432c __HAL_RCC_UART7_CLK_ENABLE(); - 8025550: 4b39 ldr r3, [pc, #228] ; (8025638 ) - 8025552: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025556: 4a38 ldr r2, [pc, #224] ; (8025638 ) - 8025558: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 - 802555c: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 8025560: 4b35 ldr r3, [pc, #212] ; (8025638 ) - 8025562: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025566: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 - 802556a: 633b str r3, [r7, #48] ; 0x30 - 802556c: 6b3b ldr r3, [r7, #48] ; 0x30 + 8025580: 4b39 ldr r3, [pc, #228] ; (8025668 ) + 8025582: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025586: 4a38 ldr r2, [pc, #224] ; (8025668 ) + 8025588: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 + 802558c: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 8025590: 4b35 ldr r3, [pc, #212] ; (8025668 ) + 8025592: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025596: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 + 802559a: 633b str r3, [r7, #48] ; 0x30 + 802559c: 6b3b ldr r3, [r7, #48] ; 0x30 __HAL_RCC_GPIOA_CLK_ENABLE(); - 802556e: 4b32 ldr r3, [pc, #200] ; (8025638 ) - 8025570: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025574: 4a30 ldr r2, [pc, #192] ; (8025638 ) - 8025576: f043 0301 orr.w r3, r3, #1 - 802557a: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 802557e: 4b2e ldr r3, [pc, #184] ; (8025638 ) - 8025580: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025584: f003 0301 and.w r3, r3, #1 - 8025588: 62fb str r3, [r7, #44] ; 0x2c - 802558a: 6afb ldr r3, [r7, #44] ; 0x2c + 802559e: 4b32 ldr r3, [pc, #200] ; (8025668 ) + 80255a0: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80255a4: 4a30 ldr r2, [pc, #192] ; (8025668 ) + 80255a6: f043 0301 orr.w r3, r3, #1 + 80255aa: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 80255ae: 4b2e ldr r3, [pc, #184] ; (8025668 ) + 80255b0: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80255b4: f003 0301 and.w r3, r3, #1 + 80255b8: 62fb str r3, [r7, #44] ; 0x2c + 80255ba: 6afb ldr r3, [r7, #44] ; 0x2c GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_15; - 802558c: f44f 4301 mov.w r3, #33024 ; 0x8100 - 8025590: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 80255bc: f44f 4301 mov.w r3, #33024 ; 0x8100 + 80255c0: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8025594: 2302 movs r3, #2 - 8025596: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 80255c4: 2302 movs r3, #2 + 80255c6: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 802559a: 2300 movs r3, #0 - 802559c: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 80255ca: 2300 movs r3, #0 + 80255cc: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80255a0: 2300 movs r3, #0 - 80255a2: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 80255d0: 2300 movs r3, #0 + 80255d2: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF11_UART7; - 80255a6: 230b movs r3, #11 - 80255a8: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 80255d6: 230b movs r3, #11 + 80255d8: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80255ac: f507 7386 add.w r3, r7, #268 ; 0x10c - 80255b0: 4619 mov r1, r3 - 80255b2: 4827 ldr r0, [pc, #156] ; (8025650 ) - 80255b4: f007 ff42 bl 802d43c + 80255dc: f507 7386 add.w r3, r7, #268 ; 0x10c + 80255e0: 4619 mov r1, r3 + 80255e2: 4827 ldr r0, [pc, #156] ; (8025680 ) + 80255e4: f007 ff42 bl 802d46c hdma_uart7_tx.Instance = DMA1_Stream3; - 80255b8: 4b26 ldr r3, [pc, #152] ; (8025654 ) - 80255ba: 4a27 ldr r2, [pc, #156] ; (8025658 ) - 80255bc: 601a str r2, [r3, #0] + 80255e8: 4b26 ldr r3, [pc, #152] ; (8025684 ) + 80255ea: 4a27 ldr r2, [pc, #156] ; (8025688 ) + 80255ec: 601a str r2, [r3, #0] hdma_uart7_tx.Init.Request = DMA_REQUEST_UART7_TX; - 80255be: 4b25 ldr r3, [pc, #148] ; (8025654 ) - 80255c0: 2250 movs r2, #80 ; 0x50 - 80255c2: 605a str r2, [r3, #4] + 80255ee: 4b25 ldr r3, [pc, #148] ; (8025684 ) + 80255f0: 2250 movs r2, #80 ; 0x50 + 80255f2: 605a str r2, [r3, #4] hdma_uart7_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 80255c4: 4b23 ldr r3, [pc, #140] ; (8025654 ) - 80255c6: 2240 movs r2, #64 ; 0x40 - 80255c8: 609a str r2, [r3, #8] + 80255f4: 4b23 ldr r3, [pc, #140] ; (8025684 ) + 80255f6: 2240 movs r2, #64 ; 0x40 + 80255f8: 609a str r2, [r3, #8] hdma_uart7_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 80255ca: 4b22 ldr r3, [pc, #136] ; (8025654 ) - 80255cc: 2200 movs r2, #0 - 80255ce: 60da str r2, [r3, #12] + 80255fa: 4b22 ldr r3, [pc, #136] ; (8025684 ) + 80255fc: 2200 movs r2, #0 + 80255fe: 60da str r2, [r3, #12] hdma_uart7_tx.Init.MemInc = DMA_MINC_ENABLE; - 80255d0: 4b20 ldr r3, [pc, #128] ; (8025654 ) - 80255d2: f44f 6280 mov.w r2, #1024 ; 0x400 - 80255d6: 611a str r2, [r3, #16] + 8025600: 4b20 ldr r3, [pc, #128] ; (8025684 ) + 8025602: f44f 6280 mov.w r2, #1024 ; 0x400 + 8025606: 611a str r2, [r3, #16] hdma_uart7_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 80255d8: 4b1e ldr r3, [pc, #120] ; (8025654 ) - 80255da: 2200 movs r2, #0 - 80255dc: 615a str r2, [r3, #20] + 8025608: 4b1e ldr r3, [pc, #120] ; (8025684 ) + 802560a: 2200 movs r2, #0 + 802560c: 615a str r2, [r3, #20] hdma_uart7_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 80255de: 4b1d ldr r3, [pc, #116] ; (8025654 ) - 80255e0: 2200 movs r2, #0 - 80255e2: 619a str r2, [r3, #24] + 802560e: 4b1d ldr r3, [pc, #116] ; (8025684 ) + 8025610: 2200 movs r2, #0 + 8025612: 619a str r2, [r3, #24] hdma_uart7_tx.Init.Mode = DMA_NORMAL; - 80255e4: 4b1b ldr r3, [pc, #108] ; (8025654 ) - 80255e6: 2200 movs r2, #0 - 80255e8: 61da str r2, [r3, #28] + 8025614: 4b1b ldr r3, [pc, #108] ; (8025684 ) + 8025616: 2200 movs r2, #0 + 8025618: 61da str r2, [r3, #28] hdma_uart7_tx.Init.Priority = DMA_PRIORITY_LOW; - 80255ea: 4b1a ldr r3, [pc, #104] ; (8025654 ) - 80255ec: 2200 movs r2, #0 - 80255ee: 621a str r2, [r3, #32] + 802561a: 4b1a ldr r3, [pc, #104] ; (8025684 ) + 802561c: 2200 movs r2, #0 + 802561e: 621a str r2, [r3, #32] hdma_uart7_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 80255f0: 4b18 ldr r3, [pc, #96] ; (8025654 ) - 80255f2: 2200 movs r2, #0 - 80255f4: 625a str r2, [r3, #36] ; 0x24 + 8025620: 4b18 ldr r3, [pc, #96] ; (8025684 ) + 8025622: 2200 movs r2, #0 + 8025624: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_uart7_tx) != HAL_OK) - 80255f6: 4817 ldr r0, [pc, #92] ; (8025654 ) - 80255f8: f002 fa7c bl 8027af4 - 80255fc: 4603 mov r3, r0 - 80255fe: 2b00 cmp r3, #0 - 8025600: d001 beq.n 8025606 + 8025626: 4817 ldr r0, [pc, #92] ; (8025684 ) + 8025628: f002 fa7c bl 8027b24 + 802562c: 4603 mov r3, r0 + 802562e: 2b00 cmp r3, #0 + 8025630: d001 beq.n 8025636 Error_Handler(); - 8025602: f7fe fe7b bl 80242fc + 8025632: f7fe fe7b bl 802432c __HAL_LINKDMA(uartHandle,hdmatx,hdma_uart7_tx); - 8025606: f507 7390 add.w r3, r7, #288 ; 0x120 - 802560a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802560e: 681b ldr r3, [r3, #0] - 8025610: 4a10 ldr r2, [pc, #64] ; (8025654 ) - 8025612: 679a str r2, [r3, #120] ; 0x78 - 8025614: 4a0f ldr r2, [pc, #60] ; (8025654 ) - 8025616: f507 7390 add.w r3, r7, #288 ; 0x120 - 802561a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802561e: 681b ldr r3, [r3, #0] - 8025620: 6393 str r3, [r2, #56] ; 0x38 + 8025636: f507 7390 add.w r3, r7, #288 ; 0x120 + 802563a: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802563e: 681b ldr r3, [r3, #0] + 8025640: 4a10 ldr r2, [pc, #64] ; (8025684 ) + 8025642: 679a str r2, [r3, #120] ; 0x78 + 8025644: 4a0f ldr r2, [pc, #60] ; (8025684 ) + 8025646: f507 7390 add.w r3, r7, #288 ; 0x120 + 802564a: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802564e: 681b ldr r3, [r3, #0] + 8025650: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(UART7_IRQn, 0, 0); - 8025622: 2200 movs r2, #0 - 8025624: 2100 movs r1, #0 - 8025626: 2052 movs r0, #82 ; 0x52 - 8025628: f002 f9b3 bl 8027992 + 8025652: 2200 movs r2, #0 + 8025654: 2100 movs r1, #0 + 8025656: 2052 movs r0, #82 ; 0x52 + 8025658: f002 f9b3 bl 80279c2 HAL_NVIC_EnableIRQ(UART7_IRQn); - 802562c: 2052 movs r0, #82 ; 0x52 - 802562e: f002 f9ca bl 80279c6 -} - 8025632: e287 b.n 8025b44 - 8025634: 40005000 .word 0x40005000 - 8025638: 58024400 .word 0x58024400 - 802563c: 58020800 .word 0x58020800 - 8025640: 58020c00 .word 0x58020c00 - 8025644: 2400b584 .word 0x2400b584 - 8025648: 40020028 .word 0x40020028 - 802564c: 40007800 .word 0x40007800 - 8025650: 58020000 .word 0x58020000 - 8025654: 2400b5fc .word 0x2400b5fc - 8025658: 40020058 .word 0x40020058 + 802565c: 2052 movs r0, #82 ; 0x52 + 802565e: f002 f9ca bl 80279f6 +} + 8025662: e287 b.n 8025b74 + 8025664: 40005000 .word 0x40005000 + 8025668: 58024400 .word 0x58024400 + 802566c: 58020800 .word 0x58020800 + 8025670: 58020c00 .word 0x58020c00 + 8025674: 2400b584 .word 0x2400b584 + 8025678: 40020028 .word 0x40020028 + 802567c: 40007800 .word 0x40007800 + 8025680: 58020000 .word 0x58020000 + 8025684: 2400b5fc .word 0x2400b5fc + 8025688: 40020058 .word 0x40020058 else if(uartHandle->Instance==USART1) - 802565c: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025660: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025664: 681b ldr r3, [r3, #0] - 8025666: 681b ldr r3, [r3, #0] - 8025668: 4a93 ldr r2, [pc, #588] ; (80258b8 ) - 802566a: 4293 cmp r3, r2 - 802566c: f040 808a bne.w 8025784 + 802568c: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025690: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025694: 681b ldr r3, [r3, #0] + 8025696: 681b ldr r3, [r3, #0] + 8025698: 4a93 ldr r2, [pc, #588] ; (80258e8 ) + 802569a: 4293 cmp r3, r2 + 802569c: f040 808a bne.w 80257b4 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; - 8025670: 2301 movs r3, #1 - 8025672: 653b str r3, [r7, #80] ; 0x50 + 80256a0: 2301 movs r3, #1 + 80256a2: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; - 8025674: 2300 movs r3, #0 - 8025676: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 + 80256a4: 2300 movs r3, #0 + 80256a6: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 802567a: f107 0350 add.w r3, r7, #80 ; 0x50 - 802567e: 4618 mov r0, r3 - 8025680: f00a fb7e bl 802fd80 - 8025684: 4603 mov r3, r0 - 8025686: 2b00 cmp r3, #0 - 8025688: d001 beq.n 802568e + 80256aa: f107 0350 add.w r3, r7, #80 ; 0x50 + 80256ae: 4618 mov r0, r3 + 80256b0: f00a fb7e bl 802fdb0 + 80256b4: 4603 mov r3, r0 + 80256b6: 2b00 cmp r3, #0 + 80256b8: d001 beq.n 80256be Error_Handler(); - 802568a: f7fe fe37 bl 80242fc + 80256ba: f7fe fe37 bl 802432c __HAL_RCC_USART1_CLK_ENABLE(); - 802568e: 4b8b ldr r3, [pc, #556] ; (80258bc ) - 8025690: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8025694: 4a89 ldr r2, [pc, #548] ; (80258bc ) - 8025696: f043 0310 orr.w r3, r3, #16 - 802569a: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 - 802569e: 4b87 ldr r3, [pc, #540] ; (80258bc ) - 80256a0: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 80256a4: f003 0310 and.w r3, r3, #16 - 80256a8: 62bb str r3, [r7, #40] ; 0x28 - 80256aa: 6abb ldr r3, [r7, #40] ; 0x28 + 80256be: 4b8b ldr r3, [pc, #556] ; (80258ec ) + 80256c0: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 80256c4: 4a89 ldr r2, [pc, #548] ; (80258ec ) + 80256c6: f043 0310 orr.w r3, r3, #16 + 80256ca: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 80256ce: 4b87 ldr r3, [pc, #540] ; (80258ec ) + 80256d0: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 80256d4: f003 0310 and.w r3, r3, #16 + 80256d8: 62bb str r3, [r7, #40] ; 0x28 + 80256da: 6abb ldr r3, [r7, #40] ; 0x28 __HAL_RCC_GPIOB_CLK_ENABLE(); - 80256ac: 4b83 ldr r3, [pc, #524] ; (80258bc ) - 80256ae: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80256b2: 4a82 ldr r2, [pc, #520] ; (80258bc ) - 80256b4: f043 0302 orr.w r3, r3, #2 - 80256b8: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 80256bc: 4b7f ldr r3, [pc, #508] ; (80258bc ) - 80256be: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80256c2: f003 0302 and.w r3, r3, #2 - 80256c6: 627b str r3, [r7, #36] ; 0x24 - 80256c8: 6a7b ldr r3, [r7, #36] ; 0x24 + 80256dc: 4b83 ldr r3, [pc, #524] ; (80258ec ) + 80256de: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80256e2: 4a82 ldr r2, [pc, #520] ; (80258ec ) + 80256e4: f043 0302 orr.w r3, r3, #2 + 80256e8: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 80256ec: 4b7f ldr r3, [pc, #508] ; (80258ec ) + 80256ee: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80256f2: f003 0302 and.w r3, r3, #2 + 80256f6: 627b str r3, [r7, #36] ; 0x24 + 80256f8: 6a7b ldr r3, [r7, #36] ; 0x24 GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15; - 80256ca: f44f 4340 mov.w r3, #49152 ; 0xc000 - 80256ce: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 80256fa: f44f 4340 mov.w r3, #49152 ; 0xc000 + 80256fe: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80256d2: 2302 movs r3, #2 - 80256d4: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025702: 2302 movs r3, #2 + 8025704: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 80256d8: 2300 movs r3, #0 - 80256da: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 8025708: 2300 movs r3, #0 + 802570a: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80256de: 2300 movs r3, #0 - 80256e0: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 802570e: 2300 movs r3, #0 + 8025710: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF4_USART1; - 80256e4: 2304 movs r3, #4 - 80256e6: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 8025714: 2304 movs r3, #4 + 8025716: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80256ea: f507 7386 add.w r3, r7, #268 ; 0x10c - 80256ee: 4619 mov r1, r3 - 80256f0: 4873 ldr r0, [pc, #460] ; (80258c0 ) - 80256f2: f007 fea3 bl 802d43c + 802571a: f507 7386 add.w r3, r7, #268 ; 0x10c + 802571e: 4619 mov r1, r3 + 8025720: 4873 ldr r0, [pc, #460] ; (80258f0 ) + 8025722: f007 fea3 bl 802d46c hdma_usart1_tx.Instance = DMA1_Stream2; - 80256f6: 4b73 ldr r3, [pc, #460] ; (80258c4 ) - 80256f8: 4a73 ldr r2, [pc, #460] ; (80258c8 ) - 80256fa: 601a str r2, [r3, #0] + 8025726: 4b73 ldr r3, [pc, #460] ; (80258f4 ) + 8025728: 4a73 ldr r2, [pc, #460] ; (80258f8 ) + 802572a: 601a str r2, [r3, #0] hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX; - 80256fc: 4b71 ldr r3, [pc, #452] ; (80258c4 ) - 80256fe: 222a movs r2, #42 ; 0x2a - 8025700: 605a str r2, [r3, #4] + 802572c: 4b71 ldr r3, [pc, #452] ; (80258f4 ) + 802572e: 222a movs r2, #42 ; 0x2a + 8025730: 605a str r2, [r3, #4] hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 8025702: 4b70 ldr r3, [pc, #448] ; (80258c4 ) - 8025704: 2240 movs r2, #64 ; 0x40 - 8025706: 609a str r2, [r3, #8] + 8025732: 4b70 ldr r3, [pc, #448] ; (80258f4 ) + 8025734: 2240 movs r2, #64 ; 0x40 + 8025736: 609a str r2, [r3, #8] hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8025708: 4b6e ldr r3, [pc, #440] ; (80258c4 ) - 802570a: 2200 movs r2, #0 - 802570c: 60da str r2, [r3, #12] + 8025738: 4b6e ldr r3, [pc, #440] ; (80258f4 ) + 802573a: 2200 movs r2, #0 + 802573c: 60da str r2, [r3, #12] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; - 802570e: 4b6d ldr r3, [pc, #436] ; (80258c4 ) - 8025710: f44f 6280 mov.w r2, #1024 ; 0x400 - 8025714: 611a str r2, [r3, #16] + 802573e: 4b6d ldr r3, [pc, #436] ; (80258f4 ) + 8025740: f44f 6280 mov.w r2, #1024 ; 0x400 + 8025744: 611a str r2, [r3, #16] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8025716: 4b6b ldr r3, [pc, #428] ; (80258c4 ) - 8025718: 2200 movs r2, #0 - 802571a: 615a str r2, [r3, #20] + 8025746: 4b6b ldr r3, [pc, #428] ; (80258f4 ) + 8025748: 2200 movs r2, #0 + 802574a: 615a str r2, [r3, #20] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 802571c: 4b69 ldr r3, [pc, #420] ; (80258c4 ) - 802571e: 2200 movs r2, #0 - 8025720: 619a str r2, [r3, #24] + 802574c: 4b69 ldr r3, [pc, #420] ; (80258f4 ) + 802574e: 2200 movs r2, #0 + 8025750: 619a str r2, [r3, #24] hdma_usart1_tx.Init.Mode = DMA_NORMAL; - 8025722: 4b68 ldr r3, [pc, #416] ; (80258c4 ) - 8025724: 2200 movs r2, #0 - 8025726: 61da str r2, [r3, #28] + 8025752: 4b68 ldr r3, [pc, #416] ; (80258f4 ) + 8025754: 2200 movs r2, #0 + 8025756: 61da str r2, [r3, #28] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; - 8025728: 4b66 ldr r3, [pc, #408] ; (80258c4 ) - 802572a: 2200 movs r2, #0 - 802572c: 621a str r2, [r3, #32] + 8025758: 4b66 ldr r3, [pc, #408] ; (80258f4 ) + 802575a: 2200 movs r2, #0 + 802575c: 621a str r2, [r3, #32] hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE; - 802572e: 4b65 ldr r3, [pc, #404] ; (80258c4 ) - 8025730: 2204 movs r2, #4 - 8025732: 625a str r2, [r3, #36] ; 0x24 + 802575e: 4b65 ldr r3, [pc, #404] ; (80258f4 ) + 8025760: 2204 movs r2, #4 + 8025762: 625a str r2, [r3, #36] ; 0x24 hdma_usart1_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; - 8025734: 4b63 ldr r3, [pc, #396] ; (80258c4 ) - 8025736: 2203 movs r2, #3 - 8025738: 629a str r2, [r3, #40] ; 0x28 + 8025764: 4b63 ldr r3, [pc, #396] ; (80258f4 ) + 8025766: 2203 movs r2, #3 + 8025768: 629a str r2, [r3, #40] ; 0x28 hdma_usart1_tx.Init.MemBurst = DMA_MBURST_SINGLE; - 802573a: 4b62 ldr r3, [pc, #392] ; (80258c4 ) - 802573c: 2200 movs r2, #0 - 802573e: 62da str r2, [r3, #44] ; 0x2c + 802576a: 4b62 ldr r3, [pc, #392] ; (80258f4 ) + 802576c: 2200 movs r2, #0 + 802576e: 62da str r2, [r3, #44] ; 0x2c hdma_usart1_tx.Init.PeriphBurst = DMA_PBURST_SINGLE; - 8025740: 4b60 ldr r3, [pc, #384] ; (80258c4 ) - 8025742: 2200 movs r2, #0 - 8025744: 631a str r2, [r3, #48] ; 0x30 + 8025770: 4b60 ldr r3, [pc, #384] ; (80258f4 ) + 8025772: 2200 movs r2, #0 + 8025774: 631a str r2, [r3, #48] ; 0x30 if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) - 8025746: 485f ldr r0, [pc, #380] ; (80258c4 ) - 8025748: f002 f9d4 bl 8027af4 - 802574c: 4603 mov r3, r0 - 802574e: 2b00 cmp r3, #0 - 8025750: d001 beq.n 8025756 + 8025776: 485f ldr r0, [pc, #380] ; (80258f4 ) + 8025778: f002 f9d4 bl 8027b24 + 802577c: 4603 mov r3, r0 + 802577e: 2b00 cmp r3, #0 + 8025780: d001 beq.n 8025786 Error_Handler(); - 8025752: f7fe fdd3 bl 80242fc + 8025782: f7fe fdd3 bl 802432c __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx); - 8025756: f507 7390 add.w r3, r7, #288 ; 0x120 - 802575a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802575e: 681b ldr r3, [r3, #0] - 8025760: 4a58 ldr r2, [pc, #352] ; (80258c4 ) - 8025762: 679a str r2, [r3, #120] ; 0x78 - 8025764: 4a57 ldr r2, [pc, #348] ; (80258c4 ) - 8025766: f507 7390 add.w r3, r7, #288 ; 0x120 - 802576a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802576e: 681b ldr r3, [r3, #0] - 8025770: 6393 str r3, [r2, #56] ; 0x38 + 8025786: f507 7390 add.w r3, r7, #288 ; 0x120 + 802578a: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802578e: 681b ldr r3, [r3, #0] + 8025790: 4a58 ldr r2, [pc, #352] ; (80258f4 ) + 8025792: 679a str r2, [r3, #120] ; 0x78 + 8025794: 4a57 ldr r2, [pc, #348] ; (80258f4 ) + 8025796: f507 7390 add.w r3, r7, #288 ; 0x120 + 802579a: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802579e: 681b ldr r3, [r3, #0] + 80257a0: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); - 8025772: 2200 movs r2, #0 - 8025774: 2100 movs r1, #0 - 8025776: 2025 movs r0, #37 ; 0x25 - 8025778: f002 f90b bl 8027992 + 80257a2: 2200 movs r2, #0 + 80257a4: 2100 movs r1, #0 + 80257a6: 2025 movs r0, #37 ; 0x25 + 80257a8: f002 f90b bl 80279c2 HAL_NVIC_EnableIRQ(USART1_IRQn); - 802577c: 2025 movs r0, #37 ; 0x25 - 802577e: f002 f922 bl 80279c6 + 80257ac: 2025 movs r0, #37 ; 0x25 + 80257ae: f002 f922 bl 80279f6 } - 8025782: e1df b.n 8025b44 + 80257b2: e1df b.n 8025b74 else if(uartHandle->Instance==USART2) - 8025784: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025788: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802578c: 681b ldr r3, [r3, #0] - 802578e: 681b ldr r3, [r3, #0] - 8025790: 4a4e ldr r2, [pc, #312] ; (80258cc ) - 8025792: 4293 cmp r3, r2 - 8025794: f040 80a2 bne.w 80258dc + 80257b4: f507 7390 add.w r3, r7, #288 ; 0x120 + 80257b8: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80257bc: 681b ldr r3, [r3, #0] + 80257be: 681b ldr r3, [r3, #0] + 80257c0: 4a4e ldr r2, [pc, #312] ; (80258fc ) + 80257c2: 4293 cmp r3, r2 + 80257c4: f040 80a2 bne.w 802590c PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2; - 8025798: 2302 movs r3, #2 - 802579a: 653b str r3, [r7, #80] ; 0x50 + 80257c8: 2302 movs r3, #2 + 80257ca: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 802579c: 2300 movs r3, #0 - 802579e: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 80257cc: 2300 movs r3, #0 + 80257ce: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 80257a2: f107 0350 add.w r3, r7, #80 ; 0x50 - 80257a6: 4618 mov r0, r3 - 80257a8: f00a faea bl 802fd80 - 80257ac: 4603 mov r3, r0 - 80257ae: 2b00 cmp r3, #0 - 80257b0: d001 beq.n 80257b6 + 80257d2: f107 0350 add.w r3, r7, #80 ; 0x50 + 80257d6: 4618 mov r0, r3 + 80257d8: f00a faea bl 802fdb0 + 80257dc: 4603 mov r3, r0 + 80257de: 2b00 cmp r3, #0 + 80257e0: d001 beq.n 80257e6 Error_Handler(); - 80257b2: f7fe fda3 bl 80242fc + 80257e2: f7fe fda3 bl 802432c __HAL_RCC_USART2_CLK_ENABLE(); - 80257b6: 4b41 ldr r3, [pc, #260] ; (80258bc ) - 80257b8: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 80257bc: 4a3f ldr r2, [pc, #252] ; (80258bc ) - 80257be: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80257c2: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 80257c6: 4b3d ldr r3, [pc, #244] ; (80258bc ) - 80257c8: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 80257cc: f403 3200 and.w r2, r3, #131072 ; 0x20000 - 80257d0: f507 7390 add.w r3, r7, #288 ; 0x120 - 80257d4: f5a3 7380 sub.w r3, r3, #256 ; 0x100 - 80257d8: 601a str r2, [r3, #0] - 80257da: f507 7390 add.w r3, r7, #288 ; 0x120 - 80257de: f5a3 7380 sub.w r3, r3, #256 ; 0x100 - 80257e2: 681b ldr r3, [r3, #0] + 80257e6: 4b41 ldr r3, [pc, #260] ; (80258ec ) + 80257e8: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 80257ec: 4a3f ldr r2, [pc, #252] ; (80258ec ) + 80257ee: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 80257f2: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 80257f6: 4b3d ldr r3, [pc, #244] ; (80258ec ) + 80257f8: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 80257fc: f403 3200 and.w r2, r3, #131072 ; 0x20000 + 8025800: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025804: f5a3 7380 sub.w r3, r3, #256 ; 0x100 + 8025808: 601a str r2, [r3, #0] + 802580a: f507 7390 add.w r3, r7, #288 ; 0x120 + 802580e: f5a3 7380 sub.w r3, r3, #256 ; 0x100 + 8025812: 681b ldr r3, [r3, #0] __HAL_RCC_GPIOD_CLK_ENABLE(); - 80257e4: 4b35 ldr r3, [pc, #212] ; (80258bc ) - 80257e6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80257ea: 4a34 ldr r2, [pc, #208] ; (80258bc ) - 80257ec: f043 0308 orr.w r3, r3, #8 - 80257f0: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 80257f4: 4b31 ldr r3, [pc, #196] ; (80258bc ) - 80257f6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80257fa: f003 0208 and.w r2, r3, #8 - 80257fe: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025802: f5a3 7382 sub.w r3, r3, #260 ; 0x104 - 8025806: 601a str r2, [r3, #0] - 8025808: f507 7390 add.w r3, r7, #288 ; 0x120 - 802580c: f5a3 7382 sub.w r3, r3, #260 ; 0x104 - 8025810: 681b ldr r3, [r3, #0] + 8025814: 4b35 ldr r3, [pc, #212] ; (80258ec ) + 8025816: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 802581a: 4a34 ldr r2, [pc, #208] ; (80258ec ) + 802581c: f043 0308 orr.w r3, r3, #8 + 8025820: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8025824: 4b31 ldr r3, [pc, #196] ; (80258ec ) + 8025826: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 802582a: f003 0208 and.w r2, r3, #8 + 802582e: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025832: f5a3 7382 sub.w r3, r3, #260 ; 0x104 + 8025836: 601a str r2, [r3, #0] + 8025838: f507 7390 add.w r3, r7, #288 ; 0x120 + 802583c: f5a3 7382 sub.w r3, r3, #260 ; 0x104 + 8025840: 681b ldr r3, [r3, #0] GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6; - 8025812: 2360 movs r3, #96 ; 0x60 - 8025814: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025842: 2360 movs r3, #96 ; 0x60 + 8025844: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8025818: 2302 movs r3, #2 - 802581a: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025848: 2302 movs r3, #2 + 802584a: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 802581e: 2300 movs r3, #0 - 8025820: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 802584e: 2300 movs r3, #0 + 8025850: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8025824: 2300 movs r3, #0 - 8025826: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025854: 2300 movs r3, #0 + 8025856: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF7_USART2; - 802582a: 2307 movs r3, #7 - 802582c: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 802585a: 2307 movs r3, #7 + 802585c: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 8025830: f507 7386 add.w r3, r7, #268 ; 0x10c - 8025834: 4619 mov r1, r3 - 8025836: 4826 ldr r0, [pc, #152] ; (80258d0 ) - 8025838: f007 fe00 bl 802d43c + 8025860: f507 7386 add.w r3, r7, #268 ; 0x10c + 8025864: 4619 mov r1, r3 + 8025866: 4826 ldr r0, [pc, #152] ; (8025900 ) + 8025868: f007 fe00 bl 802d46c hdma_usart2_tx.Instance = DMA1_Stream4; - 802583c: 4b25 ldr r3, [pc, #148] ; (80258d4 ) - 802583e: 4a26 ldr r2, [pc, #152] ; (80258d8 ) - 8025840: 601a str r2, [r3, #0] + 802586c: 4b25 ldr r3, [pc, #148] ; (8025904 ) + 802586e: 4a26 ldr r2, [pc, #152] ; (8025908 ) + 8025870: 601a str r2, [r3, #0] hdma_usart2_tx.Init.Request = DMA_REQUEST_USART2_TX; - 8025842: 4b24 ldr r3, [pc, #144] ; (80258d4 ) - 8025844: 222c movs r2, #44 ; 0x2c - 8025846: 605a str r2, [r3, #4] + 8025872: 4b24 ldr r3, [pc, #144] ; (8025904 ) + 8025874: 222c movs r2, #44 ; 0x2c + 8025876: 605a str r2, [r3, #4] hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 8025848: 4b22 ldr r3, [pc, #136] ; (80258d4 ) - 802584a: 2240 movs r2, #64 ; 0x40 - 802584c: 609a str r2, [r3, #8] + 8025878: 4b22 ldr r3, [pc, #136] ; (8025904 ) + 802587a: 2240 movs r2, #64 ; 0x40 + 802587c: 609a str r2, [r3, #8] hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 802584e: 4b21 ldr r3, [pc, #132] ; (80258d4 ) - 8025850: 2200 movs r2, #0 - 8025852: 60da str r2, [r3, #12] + 802587e: 4b21 ldr r3, [pc, #132] ; (8025904 ) + 8025880: 2200 movs r2, #0 + 8025882: 60da str r2, [r3, #12] hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; - 8025854: 4b1f ldr r3, [pc, #124] ; (80258d4 ) - 8025856: f44f 6280 mov.w r2, #1024 ; 0x400 - 802585a: 611a str r2, [r3, #16] + 8025884: 4b1f ldr r3, [pc, #124] ; (8025904 ) + 8025886: f44f 6280 mov.w r2, #1024 ; 0x400 + 802588a: 611a str r2, [r3, #16] hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 802585c: 4b1d ldr r3, [pc, #116] ; (80258d4 ) - 802585e: 2200 movs r2, #0 - 8025860: 615a str r2, [r3, #20] + 802588c: 4b1d ldr r3, [pc, #116] ; (8025904 ) + 802588e: 2200 movs r2, #0 + 8025890: 615a str r2, [r3, #20] hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8025862: 4b1c ldr r3, [pc, #112] ; (80258d4 ) - 8025864: 2200 movs r2, #0 - 8025866: 619a str r2, [r3, #24] + 8025892: 4b1c ldr r3, [pc, #112] ; (8025904 ) + 8025894: 2200 movs r2, #0 + 8025896: 619a str r2, [r3, #24] hdma_usart2_tx.Init.Mode = DMA_NORMAL; - 8025868: 4b1a ldr r3, [pc, #104] ; (80258d4 ) - 802586a: 2200 movs r2, #0 - 802586c: 61da str r2, [r3, #28] + 8025898: 4b1a ldr r3, [pc, #104] ; (8025904 ) + 802589a: 2200 movs r2, #0 + 802589c: 61da str r2, [r3, #28] hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW; - 802586e: 4b19 ldr r3, [pc, #100] ; (80258d4 ) - 8025870: 2200 movs r2, #0 - 8025872: 621a str r2, [r3, #32] + 802589e: 4b19 ldr r3, [pc, #100] ; (8025904 ) + 80258a0: 2200 movs r2, #0 + 80258a2: 621a str r2, [r3, #32] hdma_usart2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 8025874: 4b17 ldr r3, [pc, #92] ; (80258d4 ) - 8025876: 2200 movs r2, #0 - 8025878: 625a str r2, [r3, #36] ; 0x24 + 80258a4: 4b17 ldr r3, [pc, #92] ; (8025904 ) + 80258a6: 2200 movs r2, #0 + 80258a8: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK) - 802587a: 4816 ldr r0, [pc, #88] ; (80258d4 ) - 802587c: f002 f93a bl 8027af4 - 8025880: 4603 mov r3, r0 - 8025882: 2b00 cmp r3, #0 - 8025884: d001 beq.n 802588a + 80258aa: 4816 ldr r0, [pc, #88] ; (8025904 ) + 80258ac: f002 f93a bl 8027b24 + 80258b0: 4603 mov r3, r0 + 80258b2: 2b00 cmp r3, #0 + 80258b4: d001 beq.n 80258ba Error_Handler(); - 8025886: f7fe fd39 bl 80242fc + 80258b6: f7fe fd39 bl 802432c __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx); - 802588a: f507 7390 add.w r3, r7, #288 ; 0x120 - 802588e: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025892: 681b ldr r3, [r3, #0] - 8025894: 4a0f ldr r2, [pc, #60] ; (80258d4 ) - 8025896: 679a str r2, [r3, #120] ; 0x78 - 8025898: 4a0e ldr r2, [pc, #56] ; (80258d4 ) - 802589a: f507 7390 add.w r3, r7, #288 ; 0x120 - 802589e: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80258a2: 681b ldr r3, [r3, #0] - 80258a4: 6393 str r3, [r2, #56] ; 0x38 + 80258ba: f507 7390 add.w r3, r7, #288 ; 0x120 + 80258be: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80258c2: 681b ldr r3, [r3, #0] + 80258c4: 4a0f ldr r2, [pc, #60] ; (8025904 ) + 80258c6: 679a str r2, [r3, #120] ; 0x78 + 80258c8: 4a0e ldr r2, [pc, #56] ; (8025904 ) + 80258ca: f507 7390 add.w r3, r7, #288 ; 0x120 + 80258ce: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80258d2: 681b ldr r3, [r3, #0] + 80258d4: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); - 80258a6: 2200 movs r2, #0 - 80258a8: 2100 movs r1, #0 - 80258aa: 2026 movs r0, #38 ; 0x26 - 80258ac: f002 f871 bl 8027992 + 80258d6: 2200 movs r2, #0 + 80258d8: 2100 movs r1, #0 + 80258da: 2026 movs r0, #38 ; 0x26 + 80258dc: f002 f871 bl 80279c2 HAL_NVIC_EnableIRQ(USART2_IRQn); - 80258b0: 2026 movs r0, #38 ; 0x26 - 80258b2: f002 f888 bl 80279c6 -} - 80258b6: e145 b.n 8025b44 - 80258b8: 40011000 .word 0x40011000 - 80258bc: 58024400 .word 0x58024400 - 80258c0: 58020400 .word 0x58020400 - 80258c4: 2400b674 .word 0x2400b674 - 80258c8: 40020040 .word 0x40020040 - 80258cc: 40004400 .word 0x40004400 - 80258d0: 58020c00 .word 0x58020c00 - 80258d4: 2400b6ec .word 0x2400b6ec - 80258d8: 40020070 .word 0x40020070 + 80258e0: 2026 movs r0, #38 ; 0x26 + 80258e2: f002 f888 bl 80279f6 +} + 80258e6: e145 b.n 8025b74 + 80258e8: 40011000 .word 0x40011000 + 80258ec: 58024400 .word 0x58024400 + 80258f0: 58020400 .word 0x58020400 + 80258f4: 2400b674 .word 0x2400b674 + 80258f8: 40020040 .word 0x40020040 + 80258fc: 40004400 .word 0x40004400 + 8025900: 58020c00 .word 0x58020c00 + 8025904: 2400b6ec .word 0x2400b6ec + 8025908: 40020070 .word 0x40020070 else if(uartHandle->Instance==USART3) - 80258dc: f507 7390 add.w r3, r7, #288 ; 0x120 - 80258e0: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80258e4: 681b ldr r3, [r3, #0] - 80258e6: 681b ldr r3, [r3, #0] - 80258e8: 4a99 ldr r2, [pc, #612] ; (8025b50 ) - 80258ea: 4293 cmp r3, r2 - 80258ec: f040 8091 bne.w 8025a12 + 802590c: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025910: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025914: 681b ldr r3, [r3, #0] + 8025916: 681b ldr r3, [r3, #0] + 8025918: 4a99 ldr r2, [pc, #612] ; (8025b80 ) + 802591a: 4293 cmp r3, r2 + 802591c: f040 8091 bne.w 8025a42 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3; - 80258f0: 2302 movs r3, #2 - 80258f2: 653b str r3, [r7, #80] ; 0x50 + 8025920: 2302 movs r3, #2 + 8025922: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 80258f4: 2300 movs r3, #0 - 80258f6: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 8025924: 2300 movs r3, #0 + 8025926: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 80258fa: f107 0350 add.w r3, r7, #80 ; 0x50 - 80258fe: 4618 mov r0, r3 - 8025900: f00a fa3e bl 802fd80 - 8025904: 4603 mov r3, r0 - 8025906: 2b00 cmp r3, #0 - 8025908: d001 beq.n 802590e + 802592a: f107 0350 add.w r3, r7, #80 ; 0x50 + 802592e: 4618 mov r0, r3 + 8025930: f00a fa3e bl 802fdb0 + 8025934: 4603 mov r3, r0 + 8025936: 2b00 cmp r3, #0 + 8025938: d001 beq.n 802593e Error_Handler(); - 802590a: f7fe fcf7 bl 80242fc + 802593a: f7fe fcf7 bl 802432c __HAL_RCC_USART3_CLK_ENABLE(); - 802590e: 4b91 ldr r3, [pc, #580] ; (8025b54 ) - 8025910: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025914: 4a8f ldr r2, [pc, #572] ; (8025b54 ) - 8025916: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 802591a: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 802591e: 4b8d ldr r3, [pc, #564] ; (8025b54 ) - 8025920: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025924: f403 2280 and.w r2, r3, #262144 ; 0x40000 - 8025928: f507 7390 add.w r3, r7, #288 ; 0x120 - 802592c: f5a3 7384 sub.w r3, r3, #264 ; 0x108 - 8025930: 601a str r2, [r3, #0] - 8025932: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025936: f5a3 7384 sub.w r3, r3, #264 ; 0x108 - 802593a: 681b ldr r3, [r3, #0] + 802593e: 4b91 ldr r3, [pc, #580] ; (8025b84 ) + 8025940: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025944: 4a8f ldr r2, [pc, #572] ; (8025b84 ) + 8025946: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 802594a: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 802594e: 4b8d ldr r3, [pc, #564] ; (8025b84 ) + 8025950: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025954: f403 2280 and.w r2, r3, #262144 ; 0x40000 + 8025958: f507 7390 add.w r3, r7, #288 ; 0x120 + 802595c: f5a3 7384 sub.w r3, r3, #264 ; 0x108 + 8025960: 601a str r2, [r3, #0] + 8025962: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025966: f5a3 7384 sub.w r3, r3, #264 ; 0x108 + 802596a: 681b ldr r3, [r3, #0] __HAL_RCC_GPIOD_CLK_ENABLE(); - 802593c: 4b85 ldr r3, [pc, #532] ; (8025b54 ) - 802593e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025942: 4a84 ldr r2, [pc, #528] ; (8025b54 ) - 8025944: f043 0308 orr.w r3, r3, #8 - 8025948: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 802594c: 4b81 ldr r3, [pc, #516] ; (8025b54 ) - 802594e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025952: f003 0208 and.w r2, r3, #8 - 8025956: f507 7390 add.w r3, r7, #288 ; 0x120 - 802595a: f5a3 7386 sub.w r3, r3, #268 ; 0x10c - 802595e: 601a str r2, [r3, #0] - 8025960: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025964: f5a3 7386 sub.w r3, r3, #268 ; 0x10c - 8025968: 681b ldr r3, [r3, #0] + 802596c: 4b85 ldr r3, [pc, #532] ; (8025b84 ) + 802596e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025972: 4a84 ldr r2, [pc, #528] ; (8025b84 ) + 8025974: f043 0308 orr.w r3, r3, #8 + 8025978: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 802597c: 4b81 ldr r3, [pc, #516] ; (8025b84 ) + 802597e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025982: f003 0208 and.w r2, r3, #8 + 8025986: f507 7390 add.w r3, r7, #288 ; 0x120 + 802598a: f5a3 7386 sub.w r3, r3, #268 ; 0x10c + 802598e: 601a str r2, [r3, #0] + 8025990: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025994: f5a3 7386 sub.w r3, r3, #268 ; 0x10c + 8025998: 681b ldr r3, [r3, #0] GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; - 802596a: f44f 7340 mov.w r3, #768 ; 0x300 - 802596e: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 802599a: f44f 7340 mov.w r3, #768 ; 0x300 + 802599e: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8025972: 2302 movs r3, #2 - 8025974: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 80259a2: 2302 movs r3, #2 + 80259a4: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8025978: 2300 movs r3, #0 - 802597a: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 80259a8: 2300 movs r3, #0 + 80259aa: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 802597e: 2300 movs r3, #0 - 8025980: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 80259ae: 2300 movs r3, #0 + 80259b0: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF7_USART3; - 8025984: 2307 movs r3, #7 - 8025986: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 80259b4: 2307 movs r3, #7 + 80259b6: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 802598a: f507 7386 add.w r3, r7, #268 ; 0x10c - 802598e: 4619 mov r1, r3 - 8025990: 4871 ldr r0, [pc, #452] ; (8025b58 ) - 8025992: f007 fd53 bl 802d43c + 80259ba: f507 7386 add.w r3, r7, #268 ; 0x10c + 80259be: 4619 mov r1, r3 + 80259c0: 4871 ldr r0, [pc, #452] ; (8025b88 ) + 80259c2: f007 fd53 bl 802d46c hdma_usart3_tx.Instance = DMA1_Stream5; - 8025996: 4b71 ldr r3, [pc, #452] ; (8025b5c ) - 8025998: 4a71 ldr r2, [pc, #452] ; (8025b60 ) - 802599a: 601a str r2, [r3, #0] + 80259c6: 4b71 ldr r3, [pc, #452] ; (8025b8c ) + 80259c8: 4a71 ldr r2, [pc, #452] ; (8025b90 ) + 80259ca: 601a str r2, [r3, #0] hdma_usart3_tx.Init.Request = DMA_REQUEST_USART3_TX; - 802599c: 4b6f ldr r3, [pc, #444] ; (8025b5c ) - 802599e: 222e movs r2, #46 ; 0x2e - 80259a0: 605a str r2, [r3, #4] + 80259cc: 4b6f ldr r3, [pc, #444] ; (8025b8c ) + 80259ce: 222e movs r2, #46 ; 0x2e + 80259d0: 605a str r2, [r3, #4] hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 80259a2: 4b6e ldr r3, [pc, #440] ; (8025b5c ) - 80259a4: 2240 movs r2, #64 ; 0x40 - 80259a6: 609a str r2, [r3, #8] + 80259d2: 4b6e ldr r3, [pc, #440] ; (8025b8c ) + 80259d4: 2240 movs r2, #64 ; 0x40 + 80259d6: 609a str r2, [r3, #8] hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 80259a8: 4b6c ldr r3, [pc, #432] ; (8025b5c ) - 80259aa: 2200 movs r2, #0 - 80259ac: 60da str r2, [r3, #12] + 80259d8: 4b6c ldr r3, [pc, #432] ; (8025b8c ) + 80259da: 2200 movs r2, #0 + 80259dc: 60da str r2, [r3, #12] hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE; - 80259ae: 4b6b ldr r3, [pc, #428] ; (8025b5c ) - 80259b0: f44f 6280 mov.w r2, #1024 ; 0x400 - 80259b4: 611a str r2, [r3, #16] + 80259de: 4b6b ldr r3, [pc, #428] ; (8025b8c ) + 80259e0: f44f 6280 mov.w r2, #1024 ; 0x400 + 80259e4: 611a str r2, [r3, #16] hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 80259b6: 4b69 ldr r3, [pc, #420] ; (8025b5c ) - 80259b8: 2200 movs r2, #0 - 80259ba: 615a str r2, [r3, #20] + 80259e6: 4b69 ldr r3, [pc, #420] ; (8025b8c ) + 80259e8: 2200 movs r2, #0 + 80259ea: 615a str r2, [r3, #20] hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 80259bc: 4b67 ldr r3, [pc, #412] ; (8025b5c ) - 80259be: 2200 movs r2, #0 - 80259c0: 619a str r2, [r3, #24] + 80259ec: 4b67 ldr r3, [pc, #412] ; (8025b8c ) + 80259ee: 2200 movs r2, #0 + 80259f0: 619a str r2, [r3, #24] hdma_usart3_tx.Init.Mode = DMA_NORMAL; - 80259c2: 4b66 ldr r3, [pc, #408] ; (8025b5c ) - 80259c4: 2200 movs r2, #0 - 80259c6: 61da str r2, [r3, #28] + 80259f2: 4b66 ldr r3, [pc, #408] ; (8025b8c ) + 80259f4: 2200 movs r2, #0 + 80259f6: 61da str r2, [r3, #28] hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW; - 80259c8: 4b64 ldr r3, [pc, #400] ; (8025b5c ) - 80259ca: 2200 movs r2, #0 - 80259cc: 621a str r2, [r3, #32] + 80259f8: 4b64 ldr r3, [pc, #400] ; (8025b8c ) + 80259fa: 2200 movs r2, #0 + 80259fc: 621a str r2, [r3, #32] hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 80259ce: 4b63 ldr r3, [pc, #396] ; (8025b5c ) - 80259d0: 2200 movs r2, #0 - 80259d2: 625a str r2, [r3, #36] ; 0x24 + 80259fe: 4b63 ldr r3, [pc, #396] ; (8025b8c ) + 8025a00: 2200 movs r2, #0 + 8025a02: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK) - 80259d4: 4861 ldr r0, [pc, #388] ; (8025b5c ) - 80259d6: f002 f88d bl 8027af4 - 80259da: 4603 mov r3, r0 - 80259dc: 2b00 cmp r3, #0 - 80259de: d001 beq.n 80259e4 + 8025a04: 4861 ldr r0, [pc, #388] ; (8025b8c ) + 8025a06: f002 f88d bl 8027b24 + 8025a0a: 4603 mov r3, r0 + 8025a0c: 2b00 cmp r3, #0 + 8025a0e: d001 beq.n 8025a14 Error_Handler(); - 80259e0: f7fe fc8c bl 80242fc + 8025a10: f7fe fc8c bl 802432c __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart3_tx); - 80259e4: f507 7390 add.w r3, r7, #288 ; 0x120 - 80259e8: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80259ec: 681b ldr r3, [r3, #0] - 80259ee: 4a5b ldr r2, [pc, #364] ; (8025b5c ) - 80259f0: 679a str r2, [r3, #120] ; 0x78 - 80259f2: 4a5a ldr r2, [pc, #360] ; (8025b5c ) - 80259f4: f507 7390 add.w r3, r7, #288 ; 0x120 - 80259f8: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80259fc: 681b ldr r3, [r3, #0] - 80259fe: 6393 str r3, [r2, #56] ; 0x38 + 8025a14: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025a18: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025a1c: 681b ldr r3, [r3, #0] + 8025a1e: 4a5b ldr r2, [pc, #364] ; (8025b8c ) + 8025a20: 679a str r2, [r3, #120] ; 0x78 + 8025a22: 4a5a ldr r2, [pc, #360] ; (8025b8c ) + 8025a24: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025a28: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025a2c: 681b ldr r3, [r3, #0] + 8025a2e: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); - 8025a00: 2200 movs r2, #0 - 8025a02: 2100 movs r1, #0 - 8025a04: 2027 movs r0, #39 ; 0x27 - 8025a06: f001 ffc4 bl 8027992 + 8025a30: 2200 movs r2, #0 + 8025a32: 2100 movs r1, #0 + 8025a34: 2027 movs r0, #39 ; 0x27 + 8025a36: f001 ffc4 bl 80279c2 HAL_NVIC_EnableIRQ(USART3_IRQn); - 8025a0a: 2027 movs r0, #39 ; 0x27 - 8025a0c: f001 ffdb bl 80279c6 + 8025a3a: 2027 movs r0, #39 ; 0x27 + 8025a3c: f001 ffdb bl 80279f6 } - 8025a10: e098 b.n 8025b44 + 8025a40: e098 b.n 8025b74 else if(uartHandle->Instance==USART6) - 8025a12: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a16: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025a1a: 681b ldr r3, [r3, #0] - 8025a1c: 681b ldr r3, [r3, #0] - 8025a1e: 4a51 ldr r2, [pc, #324] ; (8025b64 ) - 8025a20: 4293 cmp r3, r2 - 8025a22: f040 808f bne.w 8025b44 + 8025a42: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025a46: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025a4a: 681b ldr r3, [r3, #0] + 8025a4c: 681b ldr r3, [r3, #0] + 8025a4e: 4a51 ldr r2, [pc, #324] ; (8025b94 ) + 8025a50: 4293 cmp r3, r2 + 8025a52: f040 808f bne.w 8025b74 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6; - 8025a26: 2301 movs r3, #1 - 8025a28: 653b str r3, [r7, #80] ; 0x50 + 8025a56: 2301 movs r3, #1 + 8025a58: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; - 8025a2a: 2300 movs r3, #0 - 8025a2c: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 + 8025a5a: 2300 movs r3, #0 + 8025a5c: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 8025a30: f107 0350 add.w r3, r7, #80 ; 0x50 - 8025a34: 4618 mov r0, r3 - 8025a36: f00a f9a3 bl 802fd80 - 8025a3a: 4603 mov r3, r0 - 8025a3c: 2b00 cmp r3, #0 - 8025a3e: d001 beq.n 8025a44 + 8025a60: f107 0350 add.w r3, r7, #80 ; 0x50 + 8025a64: 4618 mov r0, r3 + 8025a66: f00a f9a3 bl 802fdb0 + 8025a6a: 4603 mov r3, r0 + 8025a6c: 2b00 cmp r3, #0 + 8025a6e: d001 beq.n 8025a74 Error_Handler(); - 8025a40: f7fe fc5c bl 80242fc + 8025a70: f7fe fc5c bl 802432c __HAL_RCC_USART6_CLK_ENABLE(); - 8025a44: 4b43 ldr r3, [pc, #268] ; (8025b54 ) - 8025a46: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8025a4a: 4a42 ldr r2, [pc, #264] ; (8025b54 ) - 8025a4c: f043 0320 orr.w r3, r3, #32 - 8025a50: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 - 8025a54: 4b3f ldr r3, [pc, #252] ; (8025b54 ) - 8025a56: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8025a5a: f003 0220 and.w r2, r3, #32 - 8025a5e: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a62: f5a3 7388 sub.w r3, r3, #272 ; 0x110 - 8025a66: 601a str r2, [r3, #0] - 8025a68: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a6c: f5a3 7388 sub.w r3, r3, #272 ; 0x110 - 8025a70: 681b ldr r3, [r3, #0] + 8025a74: 4b43 ldr r3, [pc, #268] ; (8025b84 ) + 8025a76: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8025a7a: 4a42 ldr r2, [pc, #264] ; (8025b84 ) + 8025a7c: f043 0320 orr.w r3, r3, #32 + 8025a80: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 8025a84: 4b3f ldr r3, [pc, #252] ; (8025b84 ) + 8025a86: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8025a8a: f003 0220 and.w r2, r3, #32 + 8025a8e: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025a92: f5a3 7388 sub.w r3, r3, #272 ; 0x110 + 8025a96: 601a str r2, [r3, #0] + 8025a98: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025a9c: f5a3 7388 sub.w r3, r3, #272 ; 0x110 + 8025aa0: 681b ldr r3, [r3, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); - 8025a72: 4b38 ldr r3, [pc, #224] ; (8025b54 ) - 8025a74: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025a78: 4a36 ldr r2, [pc, #216] ; (8025b54 ) - 8025a7a: f043 0304 orr.w r3, r3, #4 - 8025a7e: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8025a82: 4b34 ldr r3, [pc, #208] ; (8025b54 ) - 8025a84: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025a88: f003 0204 and.w r2, r3, #4 - 8025a8c: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a90: f5a3 738a sub.w r3, r3, #276 ; 0x114 - 8025a94: 601a str r2, [r3, #0] - 8025a96: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a9a: f5a3 738a sub.w r3, r3, #276 ; 0x114 - 8025a9e: 681b ldr r3, [r3, #0] + 8025aa2: 4b38 ldr r3, [pc, #224] ; (8025b84 ) + 8025aa4: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025aa8: 4a36 ldr r2, [pc, #216] ; (8025b84 ) + 8025aaa: f043 0304 orr.w r3, r3, #4 + 8025aae: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8025ab2: 4b34 ldr r3, [pc, #208] ; (8025b84 ) + 8025ab4: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025ab8: f003 0204 and.w r2, r3, #4 + 8025abc: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025ac0: f5a3 738a sub.w r3, r3, #276 ; 0x114 + 8025ac4: 601a str r2, [r3, #0] + 8025ac6: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025aca: f5a3 738a sub.w r3, r3, #276 ; 0x114 + 8025ace: 681b ldr r3, [r3, #0] GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; - 8025aa0: 23c0 movs r3, #192 ; 0xc0 - 8025aa2: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025ad0: 23c0 movs r3, #192 ; 0xc0 + 8025ad2: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8025aa6: 2302 movs r3, #2 - 8025aa8: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025ad6: 2302 movs r3, #2 + 8025ad8: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8025aac: 2300 movs r3, #0 - 8025aae: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 8025adc: 2300 movs r3, #0 + 8025ade: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8025ab2: 2300 movs r3, #0 - 8025ab4: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025ae2: 2300 movs r3, #0 + 8025ae4: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF7_USART6; - 8025ab8: 2307 movs r3, #7 - 8025aba: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 8025ae8: 2307 movs r3, #7 + 8025aea: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8025abe: f507 7386 add.w r3, r7, #268 ; 0x10c - 8025ac2: 4619 mov r1, r3 - 8025ac4: 4828 ldr r0, [pc, #160] ; (8025b68 ) - 8025ac6: f007 fcb9 bl 802d43c + 8025aee: f507 7386 add.w r3, r7, #268 ; 0x10c + 8025af2: 4619 mov r1, r3 + 8025af4: 4828 ldr r0, [pc, #160] ; (8025b98 ) + 8025af6: f007 fcb9 bl 802d46c hdma_usart6_tx.Instance = DMA1_Stream6; - 8025aca: 4b28 ldr r3, [pc, #160] ; (8025b6c ) - 8025acc: 4a28 ldr r2, [pc, #160] ; (8025b70 ) - 8025ace: 601a str r2, [r3, #0] + 8025afa: 4b28 ldr r3, [pc, #160] ; (8025b9c ) + 8025afc: 4a28 ldr r2, [pc, #160] ; (8025ba0 ) + 8025afe: 601a str r2, [r3, #0] hdma_usart6_tx.Init.Request = DMA_REQUEST_USART6_TX; - 8025ad0: 4b26 ldr r3, [pc, #152] ; (8025b6c ) - 8025ad2: 2248 movs r2, #72 ; 0x48 - 8025ad4: 605a str r2, [r3, #4] + 8025b00: 4b26 ldr r3, [pc, #152] ; (8025b9c ) + 8025b02: 2248 movs r2, #72 ; 0x48 + 8025b04: 605a str r2, [r3, #4] hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 8025ad6: 4b25 ldr r3, [pc, #148] ; (8025b6c ) - 8025ad8: 2240 movs r2, #64 ; 0x40 - 8025ada: 609a str r2, [r3, #8] + 8025b06: 4b25 ldr r3, [pc, #148] ; (8025b9c ) + 8025b08: 2240 movs r2, #64 ; 0x40 + 8025b0a: 609a str r2, [r3, #8] hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8025adc: 4b23 ldr r3, [pc, #140] ; (8025b6c ) - 8025ade: 2200 movs r2, #0 - 8025ae0: 60da str r2, [r3, #12] + 8025b0c: 4b23 ldr r3, [pc, #140] ; (8025b9c ) + 8025b0e: 2200 movs r2, #0 + 8025b10: 60da str r2, [r3, #12] hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE; - 8025ae2: 4b22 ldr r3, [pc, #136] ; (8025b6c ) - 8025ae4: f44f 6280 mov.w r2, #1024 ; 0x400 - 8025ae8: 611a str r2, [r3, #16] + 8025b12: 4b22 ldr r3, [pc, #136] ; (8025b9c ) + 8025b14: f44f 6280 mov.w r2, #1024 ; 0x400 + 8025b18: 611a str r2, [r3, #16] hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8025aea: 4b20 ldr r3, [pc, #128] ; (8025b6c ) - 8025aec: 2200 movs r2, #0 - 8025aee: 615a str r2, [r3, #20] + 8025b1a: 4b20 ldr r3, [pc, #128] ; (8025b9c ) + 8025b1c: 2200 movs r2, #0 + 8025b1e: 615a str r2, [r3, #20] hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8025af0: 4b1e ldr r3, [pc, #120] ; (8025b6c ) - 8025af2: 2200 movs r2, #0 - 8025af4: 619a str r2, [r3, #24] + 8025b20: 4b1e ldr r3, [pc, #120] ; (8025b9c ) + 8025b22: 2200 movs r2, #0 + 8025b24: 619a str r2, [r3, #24] hdma_usart6_tx.Init.Mode = DMA_NORMAL; - 8025af6: 4b1d ldr r3, [pc, #116] ; (8025b6c ) - 8025af8: 2200 movs r2, #0 - 8025afa: 61da str r2, [r3, #28] + 8025b26: 4b1d ldr r3, [pc, #116] ; (8025b9c ) + 8025b28: 2200 movs r2, #0 + 8025b2a: 61da str r2, [r3, #28] hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW; - 8025afc: 4b1b ldr r3, [pc, #108] ; (8025b6c ) - 8025afe: 2200 movs r2, #0 - 8025b00: 621a str r2, [r3, #32] + 8025b2c: 4b1b ldr r3, [pc, #108] ; (8025b9c ) + 8025b2e: 2200 movs r2, #0 + 8025b30: 621a str r2, [r3, #32] hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 8025b02: 4b1a ldr r3, [pc, #104] ; (8025b6c ) - 8025b04: 2200 movs r2, #0 - 8025b06: 625a str r2, [r3, #36] ; 0x24 + 8025b32: 4b1a ldr r3, [pc, #104] ; (8025b9c ) + 8025b34: 2200 movs r2, #0 + 8025b36: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK) - 8025b08: 4818 ldr r0, [pc, #96] ; (8025b6c ) - 8025b0a: f001 fff3 bl 8027af4 - 8025b0e: 4603 mov r3, r0 - 8025b10: 2b00 cmp r3, #0 - 8025b12: d001 beq.n 8025b18 + 8025b38: 4818 ldr r0, [pc, #96] ; (8025b9c ) + 8025b3a: f001 fff3 bl 8027b24 + 8025b3e: 4603 mov r3, r0 + 8025b40: 2b00 cmp r3, #0 + 8025b42: d001 beq.n 8025b48 Error_Handler(); - 8025b14: f7fe fbf2 bl 80242fc + 8025b44: f7fe fbf2 bl 802432c __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart6_tx); - 8025b18: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025b1c: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025b20: 681b ldr r3, [r3, #0] - 8025b22: 4a12 ldr r2, [pc, #72] ; (8025b6c ) - 8025b24: 679a str r2, [r3, #120] ; 0x78 - 8025b26: 4a11 ldr r2, [pc, #68] ; (8025b6c ) - 8025b28: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025b2c: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025b30: 681b ldr r3, [r3, #0] - 8025b32: 6393 str r3, [r2, #56] ; 0x38 + 8025b48: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025b4c: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025b50: 681b ldr r3, [r3, #0] + 8025b52: 4a12 ldr r2, [pc, #72] ; (8025b9c ) + 8025b54: 679a str r2, [r3, #120] ; 0x78 + 8025b56: 4a11 ldr r2, [pc, #68] ; (8025b9c ) + 8025b58: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025b5c: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025b60: 681b ldr r3, [r3, #0] + 8025b62: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(USART6_IRQn, 0, 0); - 8025b34: 2200 movs r2, #0 - 8025b36: 2100 movs r1, #0 - 8025b38: 2047 movs r0, #71 ; 0x47 - 8025b3a: f001 ff2a bl 8027992 + 8025b64: 2200 movs r2, #0 + 8025b66: 2100 movs r1, #0 + 8025b68: 2047 movs r0, #71 ; 0x47 + 8025b6a: f001 ff2a bl 80279c2 HAL_NVIC_EnableIRQ(USART6_IRQn); - 8025b3e: 2047 movs r0, #71 ; 0x47 - 8025b40: f001 ff41 bl 80279c6 -} - 8025b44: bf00 nop - 8025b46: f507 7790 add.w r7, r7, #288 ; 0x120 - 8025b4a: 46bd mov sp, r7 - 8025b4c: bd80 pop {r7, pc} - 8025b4e: bf00 nop - 8025b50: 40004800 .word 0x40004800 - 8025b54: 58024400 .word 0x58024400 - 8025b58: 58020c00 .word 0x58020c00 - 8025b5c: 2400b764 .word 0x2400b764 - 8025b60: 40020088 .word 0x40020088 - 8025b64: 40011400 .word 0x40011400 - 8025b68: 58020800 .word 0x58020800 - 8025b6c: 2400b7dc .word 0x2400b7dc - 8025b70: 400200a0 .word 0x400200a0 - -08025b74 : - 8025b74: f8df d034 ldr.w sp, [pc, #52] ; 8025bac - 8025b78: f7fe feac bl 80248d4 - 8025b7c: 480c ldr r0, [pc, #48] ; (8025bb0 ) - 8025b7e: 490d ldr r1, [pc, #52] ; (8025bb4 ) - 8025b80: 4a0d ldr r2, [pc, #52] ; (8025bb8 ) - 8025b82: 2300 movs r3, #0 - 8025b84: e002 b.n 8025b8c - -08025b86 : - 8025b86: 58d4 ldr r4, [r2, r3] - 8025b88: 50c4 str r4, [r0, r3] - 8025b8a: 3304 adds r3, #4 - -08025b8c : - 8025b8c: 18c4 adds r4, r0, r3 - 8025b8e: 428c cmp r4, r1 - 8025b90: d3f9 bcc.n 8025b86 - 8025b92: 4a0a ldr r2, [pc, #40] ; (8025bbc ) - 8025b94: 4c0a ldr r4, [pc, #40] ; (8025bc0 ) - 8025b96: 2300 movs r3, #0 - 8025b98: e001 b.n 8025b9e - -08025b9a : - 8025b9a: 6013 str r3, [r2, #0] - 8025b9c: 3204 adds r2, #4 - -08025b9e : - 8025b9e: 42a2 cmp r2, r4 - 8025ba0: d3fb bcc.n 8025b9a - 8025ba2: f01a fe49 bl 8040838 <__libc_init_array> - 8025ba6: f7fe f879 bl 8023c9c
- 8025baa: 4770 bx lr - 8025bac: 24080000 .word 0x24080000 - 8025bb0: 24000000 .word 0x24000000 - 8025bb4: 240000dc .word 0x240000dc - 8025bb8: 080457d0 .word 0x080457d0 - 8025bbc: 240000dc .word 0x240000dc - 8025bc0: 2400eac4 .word 0x2400eac4 - -08025bc4 : - 8025bc4: e7fe b.n 8025bc4 - -08025bc6 : + 8025b6e: 2047 movs r0, #71 ; 0x47 + 8025b70: f001 ff41 bl 80279f6 +} + 8025b74: bf00 nop + 8025b76: f507 7790 add.w r7, r7, #288 ; 0x120 + 8025b7a: 46bd mov sp, r7 + 8025b7c: bd80 pop {r7, pc} + 8025b7e: bf00 nop + 8025b80: 40004800 .word 0x40004800 + 8025b84: 58024400 .word 0x58024400 + 8025b88: 58020c00 .word 0x58020c00 + 8025b8c: 2400b764 .word 0x2400b764 + 8025b90: 40020088 .word 0x40020088 + 8025b94: 40011400 .word 0x40011400 + 8025b98: 58020800 .word 0x58020800 + 8025b9c: 2400b7dc .word 0x2400b7dc + 8025ba0: 400200a0 .word 0x400200a0 + +08025ba4 : + 8025ba4: f8df d034 ldr.w sp, [pc, #52] ; 8025bdc + 8025ba8: f7fe feac bl 8024904 + 8025bac: 480c ldr r0, [pc, #48] ; (8025be0 ) + 8025bae: 490d ldr r1, [pc, #52] ; (8025be4 ) + 8025bb0: 4a0d ldr r2, [pc, #52] ; (8025be8 ) + 8025bb2: 2300 movs r3, #0 + 8025bb4: e002 b.n 8025bbc + +08025bb6 : + 8025bb6: 58d4 ldr r4, [r2, r3] + 8025bb8: 50c4 str r4, [r0, r3] + 8025bba: 3304 adds r3, #4 + +08025bbc : + 8025bbc: 18c4 adds r4, r0, r3 + 8025bbe: 428c cmp r4, r1 + 8025bc0: d3f9 bcc.n 8025bb6 + 8025bc2: 4a0a ldr r2, [pc, #40] ; (8025bec ) + 8025bc4: 4c0a ldr r4, [pc, #40] ; (8025bf0 ) + 8025bc6: 2300 movs r3, #0 + 8025bc8: e001 b.n 8025bce + +08025bca : + 8025bca: 6013 str r3, [r2, #0] + 8025bcc: 3204 adds r2, #4 + +08025bce : + 8025bce: 42a2 cmp r2, r4 + 8025bd0: d3fb bcc.n 8025bca + 8025bd2: f01a fe49 bl 8040868 <__libc_init_array> + 8025bd6: f7fe f861 bl 8023c9c
+ 8025bda: 4770 bx lr + 8025bdc: 24080000 .word 0x24080000 + 8025be0: 24000000 .word 0x24000000 + 8025be4: 240000dc .word 0x240000dc + 8025be8: 08045800 .word 0x08045800 + 8025bec: 240000dc .word 0x240000dc + 8025bf0: 2400eac4 .word 0x2400eac4 + +08025bf4 : + 8025bf4: e7fe b.n 8025bf4 + +08025bf6 : * @param ioctx: holds device IO functions. * @retval LAN8742_STATUS_OK if OK * LAN8742_STATUS_ERROR if missing mandatory function */ int32_t LAN8742_RegisterBusIO(lan8742_Object_t *pObj, lan8742_IOCtx_t *ioctx) { - 8025bc6: b480 push {r7} - 8025bc8: b083 sub sp, #12 - 8025bca: af00 add r7, sp, #0 - 8025bcc: 6078 str r0, [r7, #4] - 8025bce: 6039 str r1, [r7, #0] + 8025bf6: b480 push {r7} + 8025bf8: b083 sub sp, #12 + 8025bfa: af00 add r7, sp, #0 + 8025bfc: 6078 str r0, [r7, #4] + 8025bfe: 6039 str r1, [r7, #0] if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick) - 8025bd0: 687b ldr r3, [r7, #4] - 8025bd2: 2b00 cmp r3, #0 - 8025bd4: d00b beq.n 8025bee - 8025bd6: 683b ldr r3, [r7, #0] - 8025bd8: 68db ldr r3, [r3, #12] - 8025bda: 2b00 cmp r3, #0 - 8025bdc: d007 beq.n 8025bee - 8025bde: 683b ldr r3, [r7, #0] - 8025be0: 689b ldr r3, [r3, #8] - 8025be2: 2b00 cmp r3, #0 - 8025be4: d003 beq.n 8025bee - 8025be6: 683b ldr r3, [r7, #0] - 8025be8: 691b ldr r3, [r3, #16] - 8025bea: 2b00 cmp r3, #0 - 8025bec: d102 bne.n 8025bf4 + 8025c00: 687b ldr r3, [r7, #4] + 8025c02: 2b00 cmp r3, #0 + 8025c04: d00b beq.n 8025c1e + 8025c06: 683b ldr r3, [r7, #0] + 8025c08: 68db ldr r3, [r3, #12] + 8025c0a: 2b00 cmp r3, #0 + 8025c0c: d007 beq.n 8025c1e + 8025c0e: 683b ldr r3, [r7, #0] + 8025c10: 689b ldr r3, [r3, #8] + 8025c12: 2b00 cmp r3, #0 + 8025c14: d003 beq.n 8025c1e + 8025c16: 683b ldr r3, [r7, #0] + 8025c18: 691b ldr r3, [r3, #16] + 8025c1a: 2b00 cmp r3, #0 + 8025c1c: d102 bne.n 8025c24 { return LAN8742_STATUS_ERROR; - 8025bee: f04f 33ff mov.w r3, #4294967295 - 8025bf2: e014 b.n 8025c1e + 8025c1e: f04f 33ff mov.w r3, #4294967295 + 8025c22: e014 b.n 8025c4e } pObj->IO.Init = ioctx->Init; - 8025bf4: 683b ldr r3, [r7, #0] - 8025bf6: 681a ldr r2, [r3, #0] - 8025bf8: 687b ldr r3, [r7, #4] - 8025bfa: 609a str r2, [r3, #8] + 8025c24: 683b ldr r3, [r7, #0] + 8025c26: 681a ldr r2, [r3, #0] + 8025c28: 687b ldr r3, [r7, #4] + 8025c2a: 609a str r2, [r3, #8] pObj->IO.DeInit = ioctx->DeInit; - 8025bfc: 683b ldr r3, [r7, #0] - 8025bfe: 685a ldr r2, [r3, #4] - 8025c00: 687b ldr r3, [r7, #4] - 8025c02: 60da str r2, [r3, #12] + 8025c2c: 683b ldr r3, [r7, #0] + 8025c2e: 685a ldr r2, [r3, #4] + 8025c30: 687b ldr r3, [r7, #4] + 8025c32: 60da str r2, [r3, #12] pObj->IO.ReadReg = ioctx->ReadReg; - 8025c04: 683b ldr r3, [r7, #0] - 8025c06: 68da ldr r2, [r3, #12] - 8025c08: 687b ldr r3, [r7, #4] - 8025c0a: 615a str r2, [r3, #20] + 8025c34: 683b ldr r3, [r7, #0] + 8025c36: 68da ldr r2, [r3, #12] + 8025c38: 687b ldr r3, [r7, #4] + 8025c3a: 615a str r2, [r3, #20] pObj->IO.WriteReg = ioctx->WriteReg; - 8025c0c: 683b ldr r3, [r7, #0] - 8025c0e: 689a ldr r2, [r3, #8] - 8025c10: 687b ldr r3, [r7, #4] - 8025c12: 611a str r2, [r3, #16] + 8025c3c: 683b ldr r3, [r7, #0] + 8025c3e: 689a ldr r2, [r3, #8] + 8025c40: 687b ldr r3, [r7, #4] + 8025c42: 611a str r2, [r3, #16] pObj->IO.GetTick = ioctx->GetTick; - 8025c14: 683b ldr r3, [r7, #0] - 8025c16: 691a ldr r2, [r3, #16] - 8025c18: 687b ldr r3, [r7, #4] - 8025c1a: 619a str r2, [r3, #24] + 8025c44: 683b ldr r3, [r7, #0] + 8025c46: 691a ldr r2, [r3, #16] + 8025c48: 687b ldr r3, [r7, #4] + 8025c4a: 619a str r2, [r3, #24] return LAN8742_STATUS_OK; - 8025c1c: 2300 movs r3, #0 + 8025c4c: 2300 movs r3, #0 } - 8025c1e: 4618 mov r0, r3 - 8025c20: 370c adds r7, #12 - 8025c22: 46bd mov sp, r7 - 8025c24: f85d 7b04 ldr.w r7, [sp], #4 - 8025c28: 4770 bx lr + 8025c4e: 4618 mov r0, r3 + 8025c50: 370c adds r7, #12 + 8025c52: 46bd mov sp, r7 + 8025c54: f85d 7b04 ldr.w r7, [sp], #4 + 8025c58: 4770 bx lr -08025c2a : +08025c5a : * LAN8742_STATUS_READ_ERROR if connot read register * LAN8742_STATUS_WRITE_ERROR if connot write to register * LAN8742_STATUS_RESET_TIMEOUT if cannot perform a software reset */ int32_t LAN8742_Init(lan8742_Object_t *pObj) { - 8025c2a: b580 push {r7, lr} - 8025c2c: b086 sub sp, #24 - 8025c2e: af00 add r7, sp, #0 - 8025c30: 6078 str r0, [r7, #4] + 8025c5a: b580 push {r7, lr} + 8025c5c: b086 sub sp, #24 + 8025c5e: af00 add r7, sp, #0 + 8025c60: 6078 str r0, [r7, #4] uint32_t tickstart = 0, regvalue = 0, addr = 0; - 8025c32: 2300 movs r3, #0 - 8025c34: 60fb str r3, [r7, #12] - 8025c36: 2300 movs r3, #0 - 8025c38: 60bb str r3, [r7, #8] - 8025c3a: 2300 movs r3, #0 - 8025c3c: 617b str r3, [r7, #20] + 8025c62: 2300 movs r3, #0 + 8025c64: 60fb str r3, [r7, #12] + 8025c66: 2300 movs r3, #0 + 8025c68: 60bb str r3, [r7, #8] + 8025c6a: 2300 movs r3, #0 + 8025c6c: 617b str r3, [r7, #20] int32_t status = LAN8742_STATUS_OK; - 8025c3e: 2300 movs r3, #0 - 8025c40: 613b str r3, [r7, #16] + 8025c6e: 2300 movs r3, #0 + 8025c70: 613b str r3, [r7, #16] if(pObj->Is_Initialized == 0) - 8025c42: 687b ldr r3, [r7, #4] - 8025c44: 685b ldr r3, [r3, #4] - 8025c46: 2b00 cmp r3, #0 - 8025c48: d17c bne.n 8025d44 + 8025c72: 687b ldr r3, [r7, #4] + 8025c74: 685b ldr r3, [r3, #4] + 8025c76: 2b00 cmp r3, #0 + 8025c78: d17c bne.n 8025d74 { if(pObj->IO.Init != 0) - 8025c4a: 687b ldr r3, [r7, #4] - 8025c4c: 689b ldr r3, [r3, #8] - 8025c4e: 2b00 cmp r3, #0 - 8025c50: d002 beq.n 8025c58 + 8025c7a: 687b ldr r3, [r7, #4] + 8025c7c: 689b ldr r3, [r3, #8] + 8025c7e: 2b00 cmp r3, #0 + 8025c80: d002 beq.n 8025c88 { /* GPIO and Clocks initialization */ pObj->IO.Init(); - 8025c52: 687b ldr r3, [r7, #4] - 8025c54: 689b ldr r3, [r3, #8] - 8025c56: 4798 blx r3 + 8025c82: 687b ldr r3, [r7, #4] + 8025c84: 689b ldr r3, [r3, #8] + 8025c86: 4798 blx r3 } /* for later check */ pObj->DevAddr = LAN8742_MAX_DEV_ADDR + 1; - 8025c58: 687b ldr r3, [r7, #4] - 8025c5a: 2220 movs r2, #32 - 8025c5c: 601a str r2, [r3, #0] + 8025c88: 687b ldr r3, [r7, #4] + 8025c8a: 2220 movs r2, #32 + 8025c8c: 601a str r2, [r3, #0] /* Get the device address from special mode register */ for(addr = 0; addr <= LAN8742_MAX_DEV_ADDR; addr ++) - 8025c5e: 2300 movs r3, #0 - 8025c60: 617b str r3, [r7, #20] - 8025c62: e01c b.n 8025c9e + 8025c8e: 2300 movs r3, #0 + 8025c90: 617b str r3, [r7, #20] + 8025c92: e01c b.n 8025cce { if(pObj->IO.ReadReg(addr, LAN8742_SMR, ®value) < 0) - 8025c64: 687b ldr r3, [r7, #4] - 8025c66: 695b ldr r3, [r3, #20] - 8025c68: f107 0208 add.w r2, r7, #8 - 8025c6c: 2112 movs r1, #18 - 8025c6e: 6978 ldr r0, [r7, #20] - 8025c70: 4798 blx r3 - 8025c72: 4603 mov r3, r0 - 8025c74: 2b00 cmp r3, #0 - 8025c76: da03 bge.n 8025c80 + 8025c94: 687b ldr r3, [r7, #4] + 8025c96: 695b ldr r3, [r3, #20] + 8025c98: f107 0208 add.w r2, r7, #8 + 8025c9c: 2112 movs r1, #18 + 8025c9e: 6978 ldr r0, [r7, #20] + 8025ca0: 4798 blx r3 + 8025ca2: 4603 mov r3, r0 + 8025ca4: 2b00 cmp r3, #0 + 8025ca6: da03 bge.n 8025cb0 { status = LAN8742_STATUS_READ_ERROR; - 8025c78: f06f 0304 mvn.w r3, #4 - 8025c7c: 613b str r3, [r7, #16] + 8025ca8: f06f 0304 mvn.w r3, #4 + 8025cac: 613b str r3, [r7, #16] /* Can't read from this device address continue with next address */ continue; - 8025c7e: e00b b.n 8025c98 + 8025cae: e00b b.n 8025cc8 } if((regvalue & LAN8742_SMR_PHY_ADDR) == addr) - 8025c80: 68bb ldr r3, [r7, #8] - 8025c82: f003 031f and.w r3, r3, #31 - 8025c86: 697a ldr r2, [r7, #20] - 8025c88: 429a cmp r2, r3 - 8025c8a: d105 bne.n 8025c98 + 8025cb0: 68bb ldr r3, [r7, #8] + 8025cb2: f003 031f and.w r3, r3, #31 + 8025cb6: 697a ldr r2, [r7, #20] + 8025cb8: 429a cmp r2, r3 + 8025cba: d105 bne.n 8025cc8 { pObj->DevAddr = addr; - 8025c8c: 687b ldr r3, [r7, #4] - 8025c8e: 697a ldr r2, [r7, #20] - 8025c90: 601a str r2, [r3, #0] + 8025cbc: 687b ldr r3, [r7, #4] + 8025cbe: 697a ldr r2, [r7, #20] + 8025cc0: 601a str r2, [r3, #0] status = LAN8742_STATUS_OK; - 8025c92: 2300 movs r3, #0 - 8025c94: 613b str r3, [r7, #16] + 8025cc2: 2300 movs r3, #0 + 8025cc4: 613b str r3, [r7, #16] break; - 8025c96: e005 b.n 8025ca4 + 8025cc6: e005 b.n 8025cd4 for(addr = 0; addr <= LAN8742_MAX_DEV_ADDR; addr ++) - 8025c98: 697b ldr r3, [r7, #20] - 8025c9a: 3301 adds r3, #1 - 8025c9c: 617b str r3, [r7, #20] - 8025c9e: 697b ldr r3, [r7, #20] - 8025ca0: 2b1f cmp r3, #31 - 8025ca2: d9df bls.n 8025c64 + 8025cc8: 697b ldr r3, [r7, #20] + 8025cca: 3301 adds r3, #1 + 8025ccc: 617b str r3, [r7, #20] + 8025cce: 697b ldr r3, [r7, #20] + 8025cd0: 2b1f cmp r3, #31 + 8025cd2: d9df bls.n 8025c94 } } if(pObj->DevAddr > LAN8742_MAX_DEV_ADDR) - 8025ca4: 687b ldr r3, [r7, #4] - 8025ca6: 681b ldr r3, [r3, #0] - 8025ca8: 2b1f cmp r3, #31 - 8025caa: d902 bls.n 8025cb2 + 8025cd4: 687b ldr r3, [r7, #4] + 8025cd6: 681b ldr r3, [r3, #0] + 8025cd8: 2b1f cmp r3, #31 + 8025cda: d902 bls.n 8025ce2 { status = LAN8742_STATUS_ADDRESS_ERROR; - 8025cac: f06f 0302 mvn.w r3, #2 - 8025cb0: 613b str r3, [r7, #16] + 8025cdc: f06f 0302 mvn.w r3, #2 + 8025ce0: 613b str r3, [r7, #16] } /* if device address is matched */ if(status == LAN8742_STATUS_OK) - 8025cb2: 693b ldr r3, [r7, #16] - 8025cb4: 2b00 cmp r3, #0 - 8025cb6: d145 bne.n 8025d44 + 8025ce2: 693b ldr r3, [r7, #16] + 8025ce4: 2b00 cmp r3, #0 + 8025ce6: d145 bne.n 8025d74 { /* set a software reset */ if(pObj->IO.WriteReg(pObj->DevAddr, LAN8742_BCR, LAN8742_BCR_SOFT_RESET) >= 0) - 8025cb8: 687b ldr r3, [r7, #4] - 8025cba: 691b ldr r3, [r3, #16] - 8025cbc: 687a ldr r2, [r7, #4] - 8025cbe: 6810 ldr r0, [r2, #0] - 8025cc0: f44f 4200 mov.w r2, #32768 ; 0x8000 - 8025cc4: 2100 movs r1, #0 - 8025cc6: 4798 blx r3 - 8025cc8: 4603 mov r3, r0 - 8025cca: 2b00 cmp r3, #0 - 8025ccc: db37 blt.n 8025d3e + 8025ce8: 687b ldr r3, [r7, #4] + 8025cea: 691b ldr r3, [r3, #16] + 8025cec: 687a ldr r2, [r7, #4] + 8025cee: 6810 ldr r0, [r2, #0] + 8025cf0: f44f 4200 mov.w r2, #32768 ; 0x8000 + 8025cf4: 2100 movs r1, #0 + 8025cf6: 4798 blx r3 + 8025cf8: 4603 mov r3, r0 + 8025cfa: 2b00 cmp r3, #0 + 8025cfc: db37 blt.n 8025d6e { /* get software reset status */ if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BCR, ®value) >= 0) - 8025cce: 687b ldr r3, [r7, #4] - 8025cd0: 695b ldr r3, [r3, #20] - 8025cd2: 687a ldr r2, [r7, #4] - 8025cd4: 6810 ldr r0, [r2, #0] - 8025cd6: f107 0208 add.w r2, r7, #8 - 8025cda: 2100 movs r1, #0 - 8025cdc: 4798 blx r3 - 8025cde: 4603 mov r3, r0 - 8025ce0: 2b00 cmp r3, #0 - 8025ce2: db28 blt.n 8025d36 + 8025cfe: 687b ldr r3, [r7, #4] + 8025d00: 695b ldr r3, [r3, #20] + 8025d02: 687a ldr r2, [r7, #4] + 8025d04: 6810 ldr r0, [r2, #0] + 8025d06: f107 0208 add.w r2, r7, #8 + 8025d0a: 2100 movs r1, #0 + 8025d0c: 4798 blx r3 + 8025d0e: 4603 mov r3, r0 + 8025d10: 2b00 cmp r3, #0 + 8025d12: db28 blt.n 8025d66 { tickstart = pObj->IO.GetTick(); - 8025ce4: 687b ldr r3, [r7, #4] - 8025ce6: 699b ldr r3, [r3, #24] - 8025ce8: 4798 blx r3 - 8025cea: 4603 mov r3, r0 - 8025cec: 60fb str r3, [r7, #12] + 8025d14: 687b ldr r3, [r7, #4] + 8025d16: 699b ldr r3, [r3, #24] + 8025d18: 4798 blx r3 + 8025d1a: 4603 mov r3, r0 + 8025d1c: 60fb str r3, [r7, #12] /* wait until software reset is done or timeout occured */ while(regvalue & LAN8742_BCR_SOFT_RESET) - 8025cee: e01c b.n 8025d2a + 8025d1e: e01c b.n 8025d5a { if((pObj->IO.GetTick() - tickstart) <= LAN8742_SW_RESET_TO) - 8025cf0: 687b ldr r3, [r7, #4] - 8025cf2: 699b ldr r3, [r3, #24] - 8025cf4: 4798 blx r3 - 8025cf6: 4603 mov r3, r0 - 8025cf8: 461a mov r2, r3 - 8025cfa: 68fb ldr r3, [r7, #12] - 8025cfc: 1ad3 subs r3, r2, r3 - 8025cfe: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 - 8025d02: d80e bhi.n 8025d22 + 8025d20: 687b ldr r3, [r7, #4] + 8025d22: 699b ldr r3, [r3, #24] + 8025d24: 4798 blx r3 + 8025d26: 4603 mov r3, r0 + 8025d28: 461a mov r2, r3 + 8025d2a: 68fb ldr r3, [r7, #12] + 8025d2c: 1ad3 subs r3, r2, r3 + 8025d2e: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 + 8025d32: d80e bhi.n 8025d52 { if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BCR, ®value) < 0) - 8025d04: 687b ldr r3, [r7, #4] - 8025d06: 695b ldr r3, [r3, #20] - 8025d08: 687a ldr r2, [r7, #4] - 8025d0a: 6810 ldr r0, [r2, #0] - 8025d0c: f107 0208 add.w r2, r7, #8 - 8025d10: 2100 movs r1, #0 - 8025d12: 4798 blx r3 - 8025d14: 4603 mov r3, r0 - 8025d16: 2b00 cmp r3, #0 - 8025d18: da07 bge.n 8025d2a + 8025d34: 687b ldr r3, [r7, #4] + 8025d36: 695b ldr r3, [r3, #20] + 8025d38: 687a ldr r2, [r7, #4] + 8025d3a: 6810 ldr r0, [r2, #0] + 8025d3c: f107 0208 add.w r2, r7, #8 + 8025d40: 2100 movs r1, #0 + 8025d42: 4798 blx r3 + 8025d44: 4603 mov r3, r0 + 8025d46: 2b00 cmp r3, #0 + 8025d48: da07 bge.n 8025d5a { status = LAN8742_STATUS_READ_ERROR; - 8025d1a: f06f 0304 mvn.w r3, #4 - 8025d1e: 613b str r3, [r7, #16] + 8025d4a: f06f 0304 mvn.w r3, #4 + 8025d4e: 613b str r3, [r7, #16] break; - 8025d20: e010 b.n 8025d44 + 8025d50: e010 b.n 8025d74 } } else { status = LAN8742_STATUS_RESET_TIMEOUT; - 8025d22: f06f 0301 mvn.w r3, #1 - 8025d26: 613b str r3, [r7, #16] + 8025d52: f06f 0301 mvn.w r3, #1 + 8025d56: 613b str r3, [r7, #16] break; - 8025d28: e00c b.n 8025d44 + 8025d58: e00c b.n 8025d74 while(regvalue & LAN8742_BCR_SOFT_RESET) - 8025d2a: 68bb ldr r3, [r7, #8] - 8025d2c: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8025d30: 2b00 cmp r3, #0 - 8025d32: d1dd bne.n 8025cf0 - 8025d34: e006 b.n 8025d44 + 8025d5a: 68bb ldr r3, [r7, #8] + 8025d5c: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 8025d60: 2b00 cmp r3, #0 + 8025d62: d1dd bne.n 8025d20 + 8025d64: e006 b.n 8025d74 } } } else { status = LAN8742_STATUS_READ_ERROR; - 8025d36: f06f 0304 mvn.w r3, #4 - 8025d3a: 613b str r3, [r7, #16] - 8025d3c: e002 b.n 8025d44 + 8025d66: f06f 0304 mvn.w r3, #4 + 8025d6a: 613b str r3, [r7, #16] + 8025d6c: e002 b.n 8025d74 } } else { status = LAN8742_STATUS_WRITE_ERROR; - 8025d3e: f06f 0303 mvn.w r3, #3 - 8025d42: 613b str r3, [r7, #16] + 8025d6e: f06f 0303 mvn.w r3, #3 + 8025d72: 613b str r3, [r7, #16] } } } if(status == LAN8742_STATUS_OK) - 8025d44: 693b ldr r3, [r7, #16] - 8025d46: 2b00 cmp r3, #0 - 8025d48: d112 bne.n 8025d70 + 8025d74: 693b ldr r3, [r7, #16] + 8025d76: 2b00 cmp r3, #0 + 8025d78: d112 bne.n 8025da0 { tickstart = pObj->IO.GetTick(); - 8025d4a: 687b ldr r3, [r7, #4] - 8025d4c: 699b ldr r3, [r3, #24] - 8025d4e: 4798 blx r3 - 8025d50: 4603 mov r3, r0 - 8025d52: 60fb str r3, [r7, #12] + 8025d7a: 687b ldr r3, [r7, #4] + 8025d7c: 699b ldr r3, [r3, #24] + 8025d7e: 4798 blx r3 + 8025d80: 4603 mov r3, r0 + 8025d82: 60fb str r3, [r7, #12] /* Wait for 2s to perform initialization */ while((pObj->IO.GetTick() - tickstart) <= LAN8742_INIT_TO) - 8025d54: bf00 nop - 8025d56: 687b ldr r3, [r7, #4] - 8025d58: 699b ldr r3, [r3, #24] - 8025d5a: 4798 blx r3 - 8025d5c: 4603 mov r3, r0 - 8025d5e: 461a mov r2, r3 - 8025d60: 68fb ldr r3, [r7, #12] - 8025d62: 1ad3 subs r3, r2, r3 - 8025d64: f5b3 6ffa cmp.w r3, #2000 ; 0x7d0 - 8025d68: d9f5 bls.n 8025d56 + 8025d84: bf00 nop + 8025d86: 687b ldr r3, [r7, #4] + 8025d88: 699b ldr r3, [r3, #24] + 8025d8a: 4798 blx r3 + 8025d8c: 4603 mov r3, r0 + 8025d8e: 461a mov r2, r3 + 8025d90: 68fb ldr r3, [r7, #12] + 8025d92: 1ad3 subs r3, r2, r3 + 8025d94: f5b3 6ffa cmp.w r3, #2000 ; 0x7d0 + 8025d98: d9f5 bls.n 8025d86 { } pObj->Is_Initialized = 1; - 8025d6a: 687b ldr r3, [r7, #4] - 8025d6c: 2201 movs r2, #1 - 8025d6e: 605a str r2, [r3, #4] + 8025d9a: 687b ldr r3, [r7, #4] + 8025d9c: 2201 movs r2, #1 + 8025d9e: 605a str r2, [r3, #4] } return status; - 8025d70: 693b ldr r3, [r7, #16] + 8025da0: 693b ldr r3, [r7, #16] } - 8025d72: 4618 mov r0, r3 - 8025d74: 3718 adds r7, #24 - 8025d76: 46bd mov sp, r7 - 8025d78: bd80 pop {r7, pc} + 8025da2: 4618 mov r0, r3 + 8025da4: 3718 adds r7, #24 + 8025da6: 46bd mov sp, r7 + 8025da8: bd80 pop {r7, pc} -08025d7a : +08025daa : * LAN8742_STATUS_10MBITS_HALFDUPLEX if 10Mb/s HD * LAN8742_STATUS_READ_ERROR if connot read register * LAN8742_STATUS_WRITE_ERROR if connot write to register */ int32_t LAN8742_GetLinkState(lan8742_Object_t *pObj) { - 8025d7a: b580 push {r7, lr} - 8025d7c: b084 sub sp, #16 - 8025d7e: af00 add r7, sp, #0 - 8025d80: 6078 str r0, [r7, #4] + 8025daa: b580 push {r7, lr} + 8025dac: b084 sub sp, #16 + 8025dae: af00 add r7, sp, #0 + 8025db0: 6078 str r0, [r7, #4] uint32_t readval = 0; - 8025d82: 2300 movs r3, #0 - 8025d84: 60fb str r3, [r7, #12] + 8025db2: 2300 movs r3, #0 + 8025db4: 60fb str r3, [r7, #12] /* Read Status register */ if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BSR, &readval) < 0) - 8025d86: 687b ldr r3, [r7, #4] - 8025d88: 695b ldr r3, [r3, #20] - 8025d8a: 687a ldr r2, [r7, #4] - 8025d8c: 6810 ldr r0, [r2, #0] - 8025d8e: f107 020c add.w r2, r7, #12 - 8025d92: 2101 movs r1, #1 - 8025d94: 4798 blx r3 - 8025d96: 4603 mov r3, r0 - 8025d98: 2b00 cmp r3, #0 - 8025d9a: da02 bge.n 8025da2 + 8025db6: 687b ldr r3, [r7, #4] + 8025db8: 695b ldr r3, [r3, #20] + 8025dba: 687a ldr r2, [r7, #4] + 8025dbc: 6810 ldr r0, [r2, #0] + 8025dbe: f107 020c add.w r2, r7, #12 + 8025dc2: 2101 movs r1, #1 + 8025dc4: 4798 blx r3 + 8025dc6: 4603 mov r3, r0 + 8025dc8: 2b00 cmp r3, #0 + 8025dca: da02 bge.n 8025dd2 { return LAN8742_STATUS_READ_ERROR; - 8025d9c: f06f 0304 mvn.w r3, #4 - 8025da0: e06e b.n 8025e80 + 8025dcc: f06f 0304 mvn.w r3, #4 + 8025dd0: e06e b.n 8025eb0 } /* Read Status register again */ if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BSR, &readval) < 0) - 8025da2: 687b ldr r3, [r7, #4] - 8025da4: 695b ldr r3, [r3, #20] - 8025da6: 687a ldr r2, [r7, #4] - 8025da8: 6810 ldr r0, [r2, #0] - 8025daa: f107 020c add.w r2, r7, #12 - 8025dae: 2101 movs r1, #1 - 8025db0: 4798 blx r3 - 8025db2: 4603 mov r3, r0 - 8025db4: 2b00 cmp r3, #0 - 8025db6: da02 bge.n 8025dbe + 8025dd2: 687b ldr r3, [r7, #4] + 8025dd4: 695b ldr r3, [r3, #20] + 8025dd6: 687a ldr r2, [r7, #4] + 8025dd8: 6810 ldr r0, [r2, #0] + 8025dda: f107 020c add.w r2, r7, #12 + 8025dde: 2101 movs r1, #1 + 8025de0: 4798 blx r3 + 8025de2: 4603 mov r3, r0 + 8025de4: 2b00 cmp r3, #0 + 8025de6: da02 bge.n 8025dee { return LAN8742_STATUS_READ_ERROR; - 8025db8: f06f 0304 mvn.w r3, #4 - 8025dbc: e060 b.n 8025e80 + 8025de8: f06f 0304 mvn.w r3, #4 + 8025dec: e060 b.n 8025eb0 } if((readval & LAN8742_BSR_LINK_STATUS) == 0) - 8025dbe: 68fb ldr r3, [r7, #12] - 8025dc0: f003 0304 and.w r3, r3, #4 - 8025dc4: 2b00 cmp r3, #0 - 8025dc6: d101 bne.n 8025dcc + 8025dee: 68fb ldr r3, [r7, #12] + 8025df0: f003 0304 and.w r3, r3, #4 + 8025df4: 2b00 cmp r3, #0 + 8025df6: d101 bne.n 8025dfc { /* Return Link Down status */ return LAN8742_STATUS_LINK_DOWN; - 8025dc8: 2301 movs r3, #1 - 8025dca: e059 b.n 8025e80 + 8025df8: 2301 movs r3, #1 + 8025dfa: e059 b.n 8025eb0 } /* Check Auto negotiaition */ if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BCR, &readval) < 0) - 8025dcc: 687b ldr r3, [r7, #4] - 8025dce: 695b ldr r3, [r3, #20] - 8025dd0: 687a ldr r2, [r7, #4] - 8025dd2: 6810 ldr r0, [r2, #0] - 8025dd4: f107 020c add.w r2, r7, #12 - 8025dd8: 2100 movs r1, #0 - 8025dda: 4798 blx r3 - 8025ddc: 4603 mov r3, r0 - 8025dde: 2b00 cmp r3, #0 - 8025de0: da02 bge.n 8025de8 + 8025dfc: 687b ldr r3, [r7, #4] + 8025dfe: 695b ldr r3, [r3, #20] + 8025e00: 687a ldr r2, [r7, #4] + 8025e02: 6810 ldr r0, [r2, #0] + 8025e04: f107 020c add.w r2, r7, #12 + 8025e08: 2100 movs r1, #0 + 8025e0a: 4798 blx r3 + 8025e0c: 4603 mov r3, r0 + 8025e0e: 2b00 cmp r3, #0 + 8025e10: da02 bge.n 8025e18 { return LAN8742_STATUS_READ_ERROR; - 8025de2: f06f 0304 mvn.w r3, #4 - 8025de6: e04b b.n 8025e80 + 8025e12: f06f 0304 mvn.w r3, #4 + 8025e16: e04b b.n 8025eb0 } if((readval & LAN8742_BCR_AUTONEGO_EN) != LAN8742_BCR_AUTONEGO_EN) - 8025de8: 68fb ldr r3, [r7, #12] - 8025dea: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8025dee: 2b00 cmp r3, #0 - 8025df0: d11b bne.n 8025e2a + 8025e18: 68fb ldr r3, [r7, #12] + 8025e1a: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8025e1e: 2b00 cmp r3, #0 + 8025e20: d11b bne.n 8025e5a { if(((readval & LAN8742_BCR_SPEED_SELECT) == LAN8742_BCR_SPEED_SELECT) && ((readval & LAN8742_BCR_DUPLEX_MODE) == LAN8742_BCR_DUPLEX_MODE)) - 8025df2: 68fb ldr r3, [r7, #12] - 8025df4: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 8025df8: 2b00 cmp r3, #0 - 8025dfa: d006 beq.n 8025e0a - 8025dfc: 68fb ldr r3, [r7, #12] - 8025dfe: f403 7380 and.w r3, r3, #256 ; 0x100 - 8025e02: 2b00 cmp r3, #0 - 8025e04: d001 beq.n 8025e0a + 8025e22: 68fb ldr r3, [r7, #12] + 8025e24: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 8025e28: 2b00 cmp r3, #0 + 8025e2a: d006 beq.n 8025e3a + 8025e2c: 68fb ldr r3, [r7, #12] + 8025e2e: f403 7380 and.w r3, r3, #256 ; 0x100 + 8025e32: 2b00 cmp r3, #0 + 8025e34: d001 beq.n 8025e3a { return LAN8742_STATUS_100MBITS_FULLDUPLEX; - 8025e06: 2302 movs r3, #2 - 8025e08: e03a b.n 8025e80 + 8025e36: 2302 movs r3, #2 + 8025e38: e03a b.n 8025eb0 } else if ((readval & LAN8742_BCR_SPEED_SELECT) == LAN8742_BCR_SPEED_SELECT) - 8025e0a: 68fb ldr r3, [r7, #12] - 8025e0c: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 8025e10: 2b00 cmp r3, #0 - 8025e12: d001 beq.n 8025e18 + 8025e3a: 68fb ldr r3, [r7, #12] + 8025e3c: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 8025e40: 2b00 cmp r3, #0 + 8025e42: d001 beq.n 8025e48 { return LAN8742_STATUS_100MBITS_HALFDUPLEX; - 8025e14: 2303 movs r3, #3 - 8025e16: e033 b.n 8025e80 + 8025e44: 2303 movs r3, #3 + 8025e46: e033 b.n 8025eb0 } else if ((readval & LAN8742_BCR_DUPLEX_MODE) == LAN8742_BCR_DUPLEX_MODE) - 8025e18: 68fb ldr r3, [r7, #12] - 8025e1a: f403 7380 and.w r3, r3, #256 ; 0x100 - 8025e1e: 2b00 cmp r3, #0 - 8025e20: d001 beq.n 8025e26 + 8025e48: 68fb ldr r3, [r7, #12] + 8025e4a: f403 7380 and.w r3, r3, #256 ; 0x100 + 8025e4e: 2b00 cmp r3, #0 + 8025e50: d001 beq.n 8025e56 { return LAN8742_STATUS_10MBITS_FULLDUPLEX; - 8025e22: 2304 movs r3, #4 - 8025e24: e02c b.n 8025e80 + 8025e52: 2304 movs r3, #4 + 8025e54: e02c b.n 8025eb0 } else { return LAN8742_STATUS_10MBITS_HALFDUPLEX; - 8025e26: 2305 movs r3, #5 - 8025e28: e02a b.n 8025e80 + 8025e56: 2305 movs r3, #5 + 8025e58: e02a b.n 8025eb0 } } else /* Auto Nego enabled */ { if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_PHYSCSR, &readval) < 0) - 8025e2a: 687b ldr r3, [r7, #4] - 8025e2c: 695b ldr r3, [r3, #20] - 8025e2e: 687a ldr r2, [r7, #4] - 8025e30: 6810 ldr r0, [r2, #0] - 8025e32: f107 020c add.w r2, r7, #12 - 8025e36: 211f movs r1, #31 - 8025e38: 4798 blx r3 - 8025e3a: 4603 mov r3, r0 - 8025e3c: 2b00 cmp r3, #0 - 8025e3e: da02 bge.n 8025e46 + 8025e5a: 687b ldr r3, [r7, #4] + 8025e5c: 695b ldr r3, [r3, #20] + 8025e5e: 687a ldr r2, [r7, #4] + 8025e60: 6810 ldr r0, [r2, #0] + 8025e62: f107 020c add.w r2, r7, #12 + 8025e66: 211f movs r1, #31 + 8025e68: 4798 blx r3 + 8025e6a: 4603 mov r3, r0 + 8025e6c: 2b00 cmp r3, #0 + 8025e6e: da02 bge.n 8025e76 { return LAN8742_STATUS_READ_ERROR; - 8025e40: f06f 0304 mvn.w r3, #4 - 8025e44: e01c b.n 8025e80 + 8025e70: f06f 0304 mvn.w r3, #4 + 8025e74: e01c b.n 8025eb0 } /* Check if auto nego not done */ if((readval & LAN8742_PHYSCSR_AUTONEGO_DONE) == 0) - 8025e46: 68fb ldr r3, [r7, #12] - 8025e48: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8025e4c: 2b00 cmp r3, #0 - 8025e4e: d101 bne.n 8025e54 + 8025e76: 68fb ldr r3, [r7, #12] + 8025e78: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8025e7c: 2b00 cmp r3, #0 + 8025e7e: d101 bne.n 8025e84 { return LAN8742_STATUS_AUTONEGO_NOTDONE; - 8025e50: 2306 movs r3, #6 - 8025e52: e015 b.n 8025e80 + 8025e80: 2306 movs r3, #6 + 8025e82: e015 b.n 8025eb0 } if((readval & LAN8742_PHYSCSR_HCDSPEEDMASK) == LAN8742_PHYSCSR_100BTX_FD) - 8025e54: 68fb ldr r3, [r7, #12] - 8025e56: f003 031c and.w r3, r3, #28 - 8025e5a: 2b18 cmp r3, #24 - 8025e5c: d101 bne.n 8025e62 + 8025e84: 68fb ldr r3, [r7, #12] + 8025e86: f003 031c and.w r3, r3, #28 + 8025e8a: 2b18 cmp r3, #24 + 8025e8c: d101 bne.n 8025e92 { return LAN8742_STATUS_100MBITS_FULLDUPLEX; - 8025e5e: 2302 movs r3, #2 - 8025e60: e00e b.n 8025e80 + 8025e8e: 2302 movs r3, #2 + 8025e90: e00e b.n 8025eb0 } else if ((readval & LAN8742_PHYSCSR_HCDSPEEDMASK) == LAN8742_PHYSCSR_100BTX_HD) - 8025e62: 68fb ldr r3, [r7, #12] - 8025e64: f003 031c and.w r3, r3, #28 - 8025e68: 2b08 cmp r3, #8 - 8025e6a: d101 bne.n 8025e70 + 8025e92: 68fb ldr r3, [r7, #12] + 8025e94: f003 031c and.w r3, r3, #28 + 8025e98: 2b08 cmp r3, #8 + 8025e9a: d101 bne.n 8025ea0 { return LAN8742_STATUS_100MBITS_HALFDUPLEX; - 8025e6c: 2303 movs r3, #3 - 8025e6e: e007 b.n 8025e80 + 8025e9c: 2303 movs r3, #3 + 8025e9e: e007 b.n 8025eb0 } else if ((readval & LAN8742_PHYSCSR_HCDSPEEDMASK) == LAN8742_PHYSCSR_10BT_FD) - 8025e70: 68fb ldr r3, [r7, #12] - 8025e72: f003 031c and.w r3, r3, #28 - 8025e76: 2b14 cmp r3, #20 - 8025e78: d101 bne.n 8025e7e + 8025ea0: 68fb ldr r3, [r7, #12] + 8025ea2: f003 031c and.w r3, r3, #28 + 8025ea6: 2b14 cmp r3, #20 + 8025ea8: d101 bne.n 8025eae { return LAN8742_STATUS_10MBITS_FULLDUPLEX; - 8025e7a: 2304 movs r3, #4 - 8025e7c: e000 b.n 8025e80 + 8025eaa: 2304 movs r3, #4 + 8025eac: e000 b.n 8025eb0 } else { return LAN8742_STATUS_10MBITS_HALFDUPLEX; - 8025e7e: 2305 movs r3, #5 + 8025eae: 2305 movs r3, #5 } } } - 8025e80: 4618 mov r0, r3 - 8025e82: 3710 adds r7, #16 - 8025e84: 46bd mov sp, r7 - 8025e86: bd80 pop {r7, pc} + 8025eb0: 4618 mov r0, r3 + 8025eb2: 3710 adds r7, #16 + 8025eb4: 46bd mov sp, r7 + 8025eb6: bd80 pop {r7, pc} -08025e88 : +08025eb8 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8025e88: b580 push {r7, lr} - 8025e8a: b082 sub sp, #8 - 8025e8c: af00 add r7, sp, #0 + 8025eb8: b580 push {r7, lr} + 8025eba: b082 sub sp, #8 + 8025ebc: af00 add r7, sp, #0 __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL); /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */ __HAL_ART_ENABLE(); /* Enable the Cortex-M4 ART */ #endif /* DUAL_CORE && CORE_CM4 */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8025e8e: 2003 movs r0, #3 - 8025e90: f001 fd74 bl 802797c + 8025ebe: 2003 movs r0, #3 + 8025ec0: f001 fd74 bl 80279ac /* Update the SystemCoreClock global variable */ #if defined(RCC_D1CFGR_D1CPRE) common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU); - 8025e94: f009 fd9e bl 802f9d4 - 8025e98: 4602 mov r2, r0 - 8025e9a: 4b15 ldr r3, [pc, #84] ; (8025ef0 ) - 8025e9c: 699b ldr r3, [r3, #24] - 8025e9e: 0a1b lsrs r3, r3, #8 - 8025ea0: f003 030f and.w r3, r3, #15 - 8025ea4: 4913 ldr r1, [pc, #76] ; (8025ef4 ) - 8025ea6: 5ccb ldrb r3, [r1, r3] - 8025ea8: f003 031f and.w r3, r3, #31 - 8025eac: fa22 f303 lsr.w r3, r2, r3 - 8025eb0: 607b str r3, [r7, #4] + 8025ec4: f009 fd9e bl 802fa04 + 8025ec8: 4602 mov r2, r0 + 8025eca: 4b15 ldr r3, [pc, #84] ; (8025f20 ) + 8025ecc: 699b ldr r3, [r3, #24] + 8025ece: 0a1b lsrs r3, r3, #8 + 8025ed0: f003 030f and.w r3, r3, #15 + 8025ed4: 4913 ldr r1, [pc, #76] ; (8025f24 ) + 8025ed6: 5ccb ldrb r3, [r1, r3] + 8025ed8: f003 031f and.w r3, r3, #31 + 8025edc: fa22 f303 lsr.w r3, r2, r3 + 8025ee0: 607b str r3, [r7, #4] common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU); #endif /* Update the SystemD2Clock global variable */ #if defined(RCC_D1CFGR_HPRE) SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); - 8025eb2: 4b0f ldr r3, [pc, #60] ; (8025ef0 ) - 8025eb4: 699b ldr r3, [r3, #24] - 8025eb6: f003 030f and.w r3, r3, #15 - 8025eba: 4a0e ldr r2, [pc, #56] ; (8025ef4 ) - 8025ebc: 5cd3 ldrb r3, [r2, r3] - 8025ebe: f003 031f and.w r3, r3, #31 - 8025ec2: 687a ldr r2, [r7, #4] - 8025ec4: fa22 f303 lsr.w r3, r2, r3 - 8025ec8: 4a0b ldr r2, [pc, #44] ; (8025ef8 ) - 8025eca: 6013 str r3, [r2, #0] + 8025ee2: 4b0f ldr r3, [pc, #60] ; (8025f20 ) + 8025ee4: 699b ldr r3, [r3, #24] + 8025ee6: f003 030f and.w r3, r3, #15 + 8025eea: 4a0e ldr r2, [pc, #56] ; (8025f24 ) + 8025eec: 5cd3 ldrb r3, [r2, r3] + 8025eee: f003 031f and.w r3, r3, #31 + 8025ef2: 687a ldr r2, [r7, #4] + 8025ef4: fa22 f303 lsr.w r3, r2, r3 + 8025ef8: 4a0b ldr r2, [pc, #44] ; (8025f28 ) + 8025efa: 6013 str r3, [r2, #0] #endif #if defined(DUAL_CORE) && defined(CORE_CM4) SystemCoreClock = SystemD2Clock; #else SystemCoreClock = common_system_clock; - 8025ecc: 4a0b ldr r2, [pc, #44] ; (8025efc ) - 8025ece: 687b ldr r3, [r7, #4] - 8025ed0: 6013 str r3, [r2, #0] + 8025efc: 4a0b ldr r2, [pc, #44] ; (8025f2c ) + 8025efe: 687b ldr r3, [r7, #4] + 8025f00: 6013 str r3, [r2, #0] #endif /* DUAL_CORE && CORE_CM4 */ /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - 8025ed2: 200f movs r0, #15 - 8025ed4: f000 f814 bl 8025f00 - 8025ed8: 4603 mov r3, r0 - 8025eda: 2b00 cmp r3, #0 - 8025edc: d001 beq.n 8025ee2 + 8025f02: 200f movs r0, #15 + 8025f04: f000 f814 bl 8025f30 + 8025f08: 4603 mov r3, r0 + 8025f0a: 2b00 cmp r3, #0 + 8025f0c: d001 beq.n 8025f12 { return HAL_ERROR; - 8025ede: 2301 movs r3, #1 - 8025ee0: e002 b.n 8025ee8 + 8025f0e: 2301 movs r3, #1 + 8025f10: e002 b.n 8025f18 } /* Init the low level hardware */ HAL_MspInit(); - 8025ee2: f7fe faf9 bl 80244d8 + 8025f12: f7fe faf9 bl 8024508 /* Return function status */ return HAL_OK; - 8025ee6: 2300 movs r3, #0 -} - 8025ee8: 4618 mov r0, r3 - 8025eea: 3708 adds r7, #8 - 8025eec: 46bd mov sp, r7 - 8025eee: bd80 pop {r7, pc} - 8025ef0: 58024400 .word 0x58024400 - 8025ef4: 08044ca4 .word 0x08044ca4 - 8025ef8: 2400004c .word 0x2400004c - 8025efc: 24000048 .word 0x24000048 - -08025f00 : + 8025f16: 2300 movs r3, #0 +} + 8025f18: 4618 mov r0, r3 + 8025f1a: 3708 adds r7, #8 + 8025f1c: 46bd mov sp, r7 + 8025f1e: bd80 pop {r7, pc} + 8025f20: 58024400 .word 0x58024400 + 8025f24: 08044cd4 .word 0x08044cd4 + 8025f28: 2400004c .word 0x2400004c + 8025f2c: 24000048 .word 0x24000048 + +08025f30 : * implementation in user file. * @param TickPriority: Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8025f00: b580 push {r7, lr} - 8025f02: b082 sub sp, #8 - 8025f04: af00 add r7, sp, #0 - 8025f06: 6078 str r0, [r7, #4] + 8025f30: b580 push {r7, lr} + 8025f32: b082 sub sp, #8 + 8025f34: af00 add r7, sp, #0 + 8025f36: 6078 str r0, [r7, #4] /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that don't take the value zero)*/ if((uint32_t)uwTickFreq == 0UL) - 8025f08: 4b15 ldr r3, [pc, #84] ; (8025f60 ) - 8025f0a: 781b ldrb r3, [r3, #0] - 8025f0c: 2b00 cmp r3, #0 - 8025f0e: d101 bne.n 8025f14 + 8025f38: 4b15 ldr r3, [pc, #84] ; (8025f90 ) + 8025f3a: 781b ldrb r3, [r3, #0] + 8025f3c: 2b00 cmp r3, #0 + 8025f3e: d101 bne.n 8025f44 { return HAL_ERROR; - 8025f10: 2301 movs r3, #1 - 8025f12: e021 b.n 8025f58 + 8025f40: 2301 movs r3, #1 + 8025f42: e021 b.n 8025f88 } /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000UL / (uint32_t)uwTickFreq)) > 0U) - 8025f14: 4b13 ldr r3, [pc, #76] ; (8025f64 ) - 8025f16: 681a ldr r2, [r3, #0] - 8025f18: 4b11 ldr r3, [pc, #68] ; (8025f60 ) - 8025f1a: 781b ldrb r3, [r3, #0] - 8025f1c: 4619 mov r1, r3 - 8025f1e: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8025f22: fbb3 f3f1 udiv r3, r3, r1 - 8025f26: fbb2 f3f3 udiv r3, r2, r3 - 8025f2a: 4618 mov r0, r3 - 8025f2c: f001 fd59 bl 80279e2 - 8025f30: 4603 mov r3, r0 - 8025f32: 2b00 cmp r3, #0 - 8025f34: d001 beq.n 8025f3a + 8025f44: 4b13 ldr r3, [pc, #76] ; (8025f94 ) + 8025f46: 681a ldr r2, [r3, #0] + 8025f48: 4b11 ldr r3, [pc, #68] ; (8025f90 ) + 8025f4a: 781b ldrb r3, [r3, #0] + 8025f4c: 4619 mov r1, r3 + 8025f4e: f44f 737a mov.w r3, #1000 ; 0x3e8 + 8025f52: fbb3 f3f1 udiv r3, r3, r1 + 8025f56: fbb2 f3f3 udiv r3, r2, r3 + 8025f5a: 4618 mov r0, r3 + 8025f5c: f001 fd59 bl 8027a12 + 8025f60: 4603 mov r3, r0 + 8025f62: 2b00 cmp r3, #0 + 8025f64: d001 beq.n 8025f6a { return HAL_ERROR; - 8025f36: 2301 movs r3, #1 - 8025f38: e00e b.n 8025f58 + 8025f66: 2301 movs r3, #1 + 8025f68: e00e b.n 8025f88 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8025f3a: 687b ldr r3, [r7, #4] - 8025f3c: 2b0f cmp r3, #15 - 8025f3e: d80a bhi.n 8025f56 + 8025f6a: 687b ldr r3, [r7, #4] + 8025f6c: 2b0f cmp r3, #15 + 8025f6e: d80a bhi.n 8025f86 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8025f40: 2200 movs r2, #0 - 8025f42: 6879 ldr r1, [r7, #4] - 8025f44: f04f 30ff mov.w r0, #4294967295 - 8025f48: f001 fd23 bl 8027992 + 8025f70: 2200 movs r2, #0 + 8025f72: 6879 ldr r1, [r7, #4] + 8025f74: f04f 30ff mov.w r0, #4294967295 + 8025f78: f001 fd23 bl 80279c2 uwTickPrio = TickPriority; - 8025f4c: 4a06 ldr r2, [pc, #24] ; (8025f68 ) - 8025f4e: 687b ldr r3, [r7, #4] - 8025f50: 6013 str r3, [r2, #0] + 8025f7c: 4a06 ldr r2, [pc, #24] ; (8025f98 ) + 8025f7e: 687b ldr r3, [r7, #4] + 8025f80: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 8025f52: 2300 movs r3, #0 - 8025f54: e000 b.n 8025f58 + 8025f82: 2300 movs r3, #0 + 8025f84: e000 b.n 8025f88 return HAL_ERROR; - 8025f56: 2301 movs r3, #1 + 8025f86: 2301 movs r3, #1 } - 8025f58: 4618 mov r0, r3 - 8025f5a: 3708 adds r7, #8 - 8025f5c: 46bd mov sp, r7 - 8025f5e: bd80 pop {r7, pc} - 8025f60: 24000054 .word 0x24000054 - 8025f64: 24000048 .word 0x24000048 - 8025f68: 24000050 .word 0x24000050 + 8025f88: 4618 mov r0, r3 + 8025f8a: 3708 adds r7, #8 + 8025f8c: 46bd mov sp, r7 + 8025f8e: bd80 pop {r7, pc} + 8025f90: 24000054 .word 0x24000054 + 8025f94: 24000048 .word 0x24000048 + 8025f98: 24000050 .word 0x24000050 -08025f6c : +08025f9c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8025f6c: b480 push {r7} - 8025f6e: af00 add r7, sp, #0 + 8025f9c: b480 push {r7} + 8025f9e: af00 add r7, sp, #0 uwTick += (uint32_t)uwTickFreq; - 8025f70: 4b06 ldr r3, [pc, #24] ; (8025f8c ) - 8025f72: 781b ldrb r3, [r3, #0] - 8025f74: 461a mov r2, r3 - 8025f76: 4b06 ldr r3, [pc, #24] ; (8025f90 ) - 8025f78: 681b ldr r3, [r3, #0] - 8025f7a: 4413 add r3, r2 - 8025f7c: 4a04 ldr r2, [pc, #16] ; (8025f90 ) - 8025f7e: 6013 str r3, [r2, #0] -} - 8025f80: bf00 nop - 8025f82: 46bd mov sp, r7 - 8025f84: f85d 7b04 ldr.w r7, [sp], #4 - 8025f88: 4770 bx lr - 8025f8a: bf00 nop - 8025f8c: 24000054 .word 0x24000054 - 8025f90: 2400b854 .word 0x2400b854 - -08025f94 : + 8025fa0: 4b06 ldr r3, [pc, #24] ; (8025fbc ) + 8025fa2: 781b ldrb r3, [r3, #0] + 8025fa4: 461a mov r2, r3 + 8025fa6: 4b06 ldr r3, [pc, #24] ; (8025fc0 ) + 8025fa8: 681b ldr r3, [r3, #0] + 8025faa: 4413 add r3, r2 + 8025fac: 4a04 ldr r2, [pc, #16] ; (8025fc0 ) + 8025fae: 6013 str r3, [r2, #0] +} + 8025fb0: bf00 nop + 8025fb2: 46bd mov sp, r7 + 8025fb4: f85d 7b04 ldr.w r7, [sp], #4 + 8025fb8: 4770 bx lr + 8025fba: bf00 nop + 8025fbc: 24000054 .word 0x24000054 + 8025fc0: 2400b854 .word 0x2400b854 + +08025fc4 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8025f94: b480 push {r7} - 8025f96: af00 add r7, sp, #0 + 8025fc4: b480 push {r7} + 8025fc6: af00 add r7, sp, #0 return uwTick; - 8025f98: 4b03 ldr r3, [pc, #12] ; (8025fa8 ) - 8025f9a: 681b ldr r3, [r3, #0] + 8025fc8: 4b03 ldr r3, [pc, #12] ; (8025fd8 ) + 8025fca: 681b ldr r3, [r3, #0] } - 8025f9c: 4618 mov r0, r3 - 8025f9e: 46bd mov sp, r7 - 8025fa0: f85d 7b04 ldr.w r7, [sp], #4 - 8025fa4: 4770 bx lr - 8025fa6: bf00 nop - 8025fa8: 2400b854 .word 0x2400b854 + 8025fcc: 4618 mov r0, r3 + 8025fce: 46bd mov sp, r7 + 8025fd0: f85d 7b04 ldr.w r7, [sp], #4 + 8025fd4: 4770 bx lr + 8025fd6: bf00 nop + 8025fd8: 2400b854 .word 0x2400b854 -08025fac : +08025fdc : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 8025fac: b580 push {r7, lr} - 8025fae: b084 sub sp, #16 - 8025fb0: af00 add r7, sp, #0 - 8025fb2: 6078 str r0, [r7, #4] + 8025fdc: b580 push {r7, lr} + 8025fde: b084 sub sp, #16 + 8025fe0: af00 add r7, sp, #0 + 8025fe2: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 8025fb4: f7ff ffee bl 8025f94 - 8025fb8: 60b8 str r0, [r7, #8] + 8025fe4: f7ff ffee bl 8025fc4 + 8025fe8: 60b8 str r0, [r7, #8] uint32_t wait = Delay; - 8025fba: 687b ldr r3, [r7, #4] - 8025fbc: 60fb str r3, [r7, #12] + 8025fea: 687b ldr r3, [r7, #4] + 8025fec: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 8025fbe: 68fb ldr r3, [r7, #12] - 8025fc0: f1b3 3fff cmp.w r3, #4294967295 - 8025fc4: d005 beq.n 8025fd2 + 8025fee: 68fb ldr r3, [r7, #12] + 8025ff0: f1b3 3fff cmp.w r3, #4294967295 + 8025ff4: d005 beq.n 8026002 { wait += (uint32_t)(uwTickFreq); - 8025fc6: 4b0a ldr r3, [pc, #40] ; (8025ff0 ) - 8025fc8: 781b ldrb r3, [r3, #0] - 8025fca: 461a mov r2, r3 - 8025fcc: 68fb ldr r3, [r7, #12] - 8025fce: 4413 add r3, r2 - 8025fd0: 60fb str r3, [r7, #12] + 8025ff6: 4b0a ldr r3, [pc, #40] ; (8026020 ) + 8025ff8: 781b ldrb r3, [r3, #0] + 8025ffa: 461a mov r2, r3 + 8025ffc: 68fb ldr r3, [r7, #12] + 8025ffe: 4413 add r3, r2 + 8026000: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) - 8025fd2: bf00 nop - 8025fd4: f7ff ffde bl 8025f94 - 8025fd8: 4602 mov r2, r0 - 8025fda: 68bb ldr r3, [r7, #8] - 8025fdc: 1ad3 subs r3, r2, r3 - 8025fde: 68fa ldr r2, [r7, #12] - 8025fe0: 429a cmp r2, r3 - 8025fe2: d8f7 bhi.n 8025fd4 + 8026002: bf00 nop + 8026004: f7ff ffde bl 8025fc4 + 8026008: 4602 mov r2, r0 + 802600a: 68bb ldr r3, [r7, #8] + 802600c: 1ad3 subs r3, r2, r3 + 802600e: 68fa ldr r2, [r7, #12] + 8026010: 429a cmp r2, r3 + 8026012: d8f7 bhi.n 8026004 { } } - 8025fe4: bf00 nop - 8025fe6: bf00 nop - 8025fe8: 3710 adds r7, #16 - 8025fea: 46bd mov sp, r7 - 8025fec: bd80 pop {r7, pc} - 8025fee: bf00 nop - 8025ff0: 24000054 .word 0x24000054 + 8026014: bf00 nop + 8026016: bf00 nop + 8026018: 3710 adds r7, #16 + 802601a: 46bd mov sp, r7 + 802601c: bd80 pop {r7, pc} + 802601e: bf00 nop + 8026020: 24000054 .word 0x24000054 -08025ff4 : +08026024 : /** * @brief Returns the device revision identifier. * @retval Device revision identifier */ uint32_t HAL_GetREVID(void) { - 8025ff4: b480 push {r7} - 8025ff6: af00 add r7, sp, #0 + 8026024: b480 push {r7} + 8026026: af00 add r7, sp, #0 return((DBGMCU->IDCODE) >> 16); - 8025ff8: 4b03 ldr r3, [pc, #12] ; (8026008 ) - 8025ffa: 681b ldr r3, [r3, #0] - 8025ffc: 0c1b lsrs r3, r3, #16 + 8026028: 4b03 ldr r3, [pc, #12] ; (8026038 ) + 802602a: 681b ldr r3, [r3, #0] + 802602c: 0c1b lsrs r3, r3, #16 } - 8025ffe: 4618 mov r0, r3 - 8026000: 46bd mov sp, r7 - 8026002: f85d 7b04 ldr.w r7, [sp], #4 - 8026006: 4770 bx lr - 8026008: 5c001000 .word 0x5c001000 + 802602e: 4618 mov r0, r3 + 8026030: 46bd mov sp, r7 + 8026032: f85d 7b04 ldr.w r7, [sp], #4 + 8026036: 4770 bx lr + 8026038: 5c001000 .word 0x5c001000 -0802600c : +0802603c : * @arg SYSCFG_ETH_MII : Select the Media Independent Interface * @arg SYSCFG_ETH_RMII: Select the Reduced Media Independent Interface * @retval None */ void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface) { - 802600c: b480 push {r7} - 802600e: b083 sub sp, #12 - 8026010: af00 add r7, sp, #0 - 8026012: 6078 str r0, [r7, #4] + 802603c: b480 push {r7} + 802603e: b083 sub sp, #12 + 8026040: af00 add r7, sp, #0 + 8026042: 6078 str r0, [r7, #4] /* Check the parameter */ assert_param(IS_SYSCFG_ETHERNET_CONFIG(SYSCFG_ETHInterface)); MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface)); - 8026014: 4b06 ldr r3, [pc, #24] ; (8026030 ) - 8026016: 685b ldr r3, [r3, #4] - 8026018: f423 0260 bic.w r2, r3, #14680064 ; 0xe00000 - 802601c: 4904 ldr r1, [pc, #16] ; (8026030 ) - 802601e: 687b ldr r3, [r7, #4] - 8026020: 4313 orrs r3, r2 - 8026022: 604b str r3, [r1, #4] -} - 8026024: bf00 nop - 8026026: 370c adds r7, #12 - 8026028: 46bd mov sp, r7 - 802602a: f85d 7b04 ldr.w r7, [sp], #4 - 802602e: 4770 bx lr - 8026030: 58000400 .word 0x58000400 - -08026034 : + 8026044: 4b06 ldr r3, [pc, #24] ; (8026060 ) + 8026046: 685b ldr r3, [r3, #4] + 8026048: f423 0260 bic.w r2, r3, #14680064 ; 0xe00000 + 802604c: 4904 ldr r1, [pc, #16] ; (8026060 ) + 802604e: 687b ldr r3, [r7, #4] + 8026050: 4313 orrs r3, r2 + 8026052: 604b str r3, [r1, #4] +} + 8026054: bf00 nop + 8026056: 370c adds r7, #12 + 8026058: 46bd mov sp, r7 + 802605a: f85d 7b04 ldr.w r7, [sp], #4 + 802605e: 4770 bx lr + 8026060: 58000400 .word 0x58000400 + +08026064 : * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 * @retval None */ __STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock) { - 8026034: b480 push {r7} - 8026036: b083 sub sp, #12 - 8026038: af00 add r7, sp, #0 - 802603a: 6078 str r0, [r7, #4] - 802603c: 6039 str r1, [r7, #0] + 8026064: b480 push {r7} + 8026066: b083 sub sp, #12 + 8026068: af00 add r7, sp, #0 + 802606a: 6078 str r0, [r7, #4] + 802606c: 6039 str r1, [r7, #0] MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC, CommonClock); - 802603e: 687b ldr r3, [r7, #4] - 8026040: 689b ldr r3, [r3, #8] - 8026042: f423 127c bic.w r2, r3, #4128768 ; 0x3f0000 - 8026046: 683b ldr r3, [r7, #0] - 8026048: 431a orrs r2, r3 - 802604a: 687b ldr r3, [r7, #4] - 802604c: 609a str r2, [r3, #8] -} - 802604e: bf00 nop - 8026050: 370c adds r7, #12 - 8026052: 46bd mov sp, r7 - 8026054: f85d 7b04 ldr.w r7, [sp], #4 - 8026058: 4770 bx lr - -0802605a : + 802606e: 687b ldr r3, [r7, #4] + 8026070: 689b ldr r3, [r3, #8] + 8026072: f423 127c bic.w r2, r3, #4128768 ; 0x3f0000 + 8026076: 683b ldr r3, [r7, #0] + 8026078: 431a orrs r2, r3 + 802607a: 687b ldr r3, [r7, #4] + 802607c: 609a str r2, [r3, #8] +} + 802607e: bf00 nop + 8026080: 370c adds r7, #12 + 8026082: 46bd mov sp, r7 + 8026084: f85d 7b04 ldr.w r7, [sp], #4 + 8026088: 4770 bx lr + +0802608a : * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR * @arg @ref LL_ADC_PATH_INTERNAL_VBAT * @retval None */ __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal) { - 802605a: b480 push {r7} - 802605c: b083 sub sp, #12 - 802605e: af00 add r7, sp, #0 - 8026060: 6078 str r0, [r7, #4] - 8026062: 6039 str r1, [r7, #0] + 802608a: b480 push {r7} + 802608c: b083 sub sp, #12 + 802608e: af00 add r7, sp, #0 + 8026090: 6078 str r0, [r7, #4] + 8026092: 6039 str r1, [r7, #0] MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN, PathInternal); - 8026064: 687b ldr r3, [r7, #4] - 8026066: 689b ldr r3, [r3, #8] - 8026068: f023 72e0 bic.w r2, r3, #29360128 ; 0x1c00000 - 802606c: 683b ldr r3, [r7, #0] - 802606e: 431a orrs r2, r3 - 8026070: 687b ldr r3, [r7, #4] - 8026072: 609a str r2, [r3, #8] -} - 8026074: bf00 nop - 8026076: 370c adds r7, #12 - 8026078: 46bd mov sp, r7 - 802607a: f85d 7b04 ldr.w r7, [sp], #4 - 802607e: 4770 bx lr - -08026080 : + 8026094: 687b ldr r3, [r7, #4] + 8026096: 689b ldr r3, [r3, #8] + 8026098: f023 72e0 bic.w r2, r3, #29360128 ; 0x1c00000 + 802609c: 683b ldr r3, [r7, #0] + 802609e: 431a orrs r2, r3 + 80260a0: 687b ldr r3, [r7, #4] + 80260a2: 609a str r2, [r3, #8] +} + 80260a4: bf00 nop + 80260a6: 370c adds r7, #12 + 80260a8: 46bd mov sp, r7 + 80260aa: f85d 7b04 ldr.w r7, [sp], #4 + 80260ae: 4770 bx lr + +080260b0 : * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR * @arg @ref LL_ADC_PATH_INTERNAL_VBAT */ __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON) { - 8026080: b480 push {r7} - 8026082: b083 sub sp, #12 - 8026084: af00 add r7, sp, #0 - 8026086: 6078 str r0, [r7, #4] + 80260b0: b480 push {r7} + 80260b2: b083 sub sp, #12 + 80260b4: af00 add r7, sp, #0 + 80260b6: 6078 str r0, [r7, #4] return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN)); - 8026088: 687b ldr r3, [r7, #4] - 802608a: 689b ldr r3, [r3, #8] - 802608c: f003 73e0 and.w r3, r3, #29360128 ; 0x1c00000 + 80260b8: 687b ldr r3, [r7, #4] + 80260ba: 689b ldr r3, [r3, #8] + 80260bc: f003 73e0 and.w r3, r3, #29360128 ; 0x1c00000 } - 8026090: 4618 mov r0, r3 - 8026092: 370c adds r7, #12 - 8026094: 46bd mov sp, r7 - 8026096: f85d 7b04 ldr.w r7, [sp], #4 - 802609a: 4770 bx lr + 80260c0: 4618 mov r0, r3 + 80260c2: 370c adds r7, #12 + 80260c4: 46bd mov sp, r7 + 80260c6: f85d 7b04 ldr.w r7, [sp], #4 + 80260ca: 4770 bx lr -0802609c : +080260cc : * Other channels are slow channels (conversion rate: refer to reference manual). * @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0x1FFFFFF * @retval None */ __STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32_t OffsetLevel) { - 802609c: b480 push {r7} - 802609e: b087 sub sp, #28 - 80260a0: af00 add r7, sp, #0 - 80260a2: 60f8 str r0, [r7, #12] - 80260a4: 60b9 str r1, [r7, #8] - 80260a6: 607a str r2, [r7, #4] - 80260a8: 603b str r3, [r7, #0] + 80260cc: b480 push {r7} + 80260ce: b087 sub sp, #28 + 80260d0: af00 add r7, sp, #0 + 80260d2: 60f8 str r0, [r7, #12] + 80260d4: 60b9 str r1, [r7, #8] + 80260d6: 607a str r2, [r7, #4] + 80260d8: 603b str r3, [r7, #0] __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); - 80260aa: 68fb ldr r3, [r7, #12] - 80260ac: 3360 adds r3, #96 ; 0x60 - 80260ae: 461a mov r2, r3 - 80260b0: 68bb ldr r3, [r7, #8] - 80260b2: 009b lsls r3, r3, #2 - 80260b4: 4413 add r3, r2 - 80260b6: 617b str r3, [r7, #20] + 80260da: 68fb ldr r3, [r7, #12] + 80260dc: 3360 adds r3, #96 ; 0x60 + 80260de: 461a mov r2, r3 + 80260e0: 68bb ldr r3, [r7, #8] + 80260e2: 009b lsls r3, r3, #2 + 80260e4: 4413 add r3, r2 + 80260e6: 617b str r3, [r7, #20] ADC3_OFR1_OFFSET1_EN | (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel); } else #endif /* ADC_VER_V5_V90 */ { MODIFY_REG(*preg, - 80260b8: 697b ldr r3, [r7, #20] - 80260ba: 681b ldr r3, [r3, #0] - 80260bc: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 - 80260c0: 687b ldr r3, [r7, #4] - 80260c2: f003 41f8 and.w r1, r3, #2080374784 ; 0x7c000000 - 80260c6: 683b ldr r3, [r7, #0] - 80260c8: 430b orrs r3, r1 - 80260ca: 431a orrs r2, r3 - 80260cc: 697b ldr r3, [r7, #20] - 80260ce: 601a str r2, [r3, #0] + 80260e8: 697b ldr r3, [r7, #20] + 80260ea: 681b ldr r3, [r3, #0] + 80260ec: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 + 80260f0: 687b ldr r3, [r7, #4] + 80260f2: f003 41f8 and.w r1, r3, #2080374784 ; 0x7c000000 + 80260f6: 683b ldr r3, [r7, #0] + 80260f8: 430b orrs r3, r1 + 80260fa: 431a orrs r2, r3 + 80260fc: 697b ldr r3, [r7, #20] + 80260fe: 601a str r2, [r3, #0] ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel); } } - 80260d0: bf00 nop - 80260d2: 371c adds r7, #28 - 80260d4: 46bd mov sp, r7 - 80260d6: f85d 7b04 ldr.w r7, [sp], #4 - 80260da: 4770 bx lr + 8026100: bf00 nop + 8026102: 371c adds r7, #28 + 8026104: 46bd mov sp, r7 + 8026106: f85d 7b04 ldr.w r7, [sp], #4 + 802610a: 4770 bx lr -080260dc : +0802610c : * @arg @ref LL_ADC_OFFSET_RSHIFT_ENABLE * @arg @ref LL_ADC_OFFSET_RSHIFT_DISABLE * @retval Returned None */ __STATIC_INLINE void LL_ADC_SetDataRightShift(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t RigthShift) { - 80260dc: b480 push {r7} - 80260de: b085 sub sp, #20 - 80260e0: af00 add r7, sp, #0 - 80260e2: 60f8 str r0, [r7, #12] - 80260e4: 60b9 str r1, [r7, #8] - 80260e6: 607a str r2, [r7, #4] + 802610c: b480 push {r7} + 802610e: b085 sub sp, #20 + 8026110: af00 add r7, sp, #0 + 8026112: 60f8 str r0, [r7, #12] + 8026114: 60b9 str r1, [r7, #8] + 8026116: 607a str r2, [r7, #4] MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_RSHIFT1 | ADC_CFGR2_RSHIFT2 | ADC_CFGR2_RSHIFT3 | ADC_CFGR2_RSHIFT4), RigthShift << (Offsety & 0x1FUL)); - 80260e8: 68fb ldr r3, [r7, #12] - 80260ea: 691b ldr r3, [r3, #16] - 80260ec: f423 42f0 bic.w r2, r3, #30720 ; 0x7800 - 80260f0: 68bb ldr r3, [r7, #8] - 80260f2: f003 031f and.w r3, r3, #31 - 80260f6: 6879 ldr r1, [r7, #4] - 80260f8: fa01 f303 lsl.w r3, r1, r3 - 80260fc: 431a orrs r2, r3 - 80260fe: 68fb ldr r3, [r7, #12] - 8026100: 611a str r2, [r3, #16] -} - 8026102: bf00 nop - 8026104: 3714 adds r7, #20 - 8026106: 46bd mov sp, r7 - 8026108: f85d 7b04 ldr.w r7, [sp], #4 - 802610c: 4770 bx lr - -0802610e : + 8026118: 68fb ldr r3, [r7, #12] + 802611a: 691b ldr r3, [r3, #16] + 802611c: f423 42f0 bic.w r2, r3, #30720 ; 0x7800 + 8026120: 68bb ldr r3, [r7, #8] + 8026122: f003 031f and.w r3, r3, #31 + 8026126: 6879 ldr r1, [r7, #4] + 8026128: fa01 f303 lsl.w r3, r1, r3 + 802612c: 431a orrs r2, r3 + 802612e: 68fb ldr r3, [r7, #12] + 8026130: 611a str r2, [r3, #16] +} + 8026132: bf00 nop + 8026134: 3714 adds r7, #20 + 8026136: 46bd mov sp, r7 + 8026138: f85d 7b04 ldr.w r7, [sp], #4 + 802613c: 4770 bx lr + +0802613e : * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE * @retval Returned None */ __STATIC_INLINE void LL_ADC_SetOffsetSignedSaturation(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetSignedSaturation) { - 802610e: b480 push {r7} - 8026110: b087 sub sp, #28 - 8026112: af00 add r7, sp, #0 - 8026114: 60f8 str r0, [r7, #12] - 8026116: 60b9 str r1, [r7, #8] - 8026118: 607a str r2, [r7, #4] + 802613e: b480 push {r7} + 8026140: b087 sub sp, #28 + 8026142: af00 add r7, sp, #0 + 8026144: 60f8 str r0, [r7, #12] + 8026146: 60b9 str r1, [r7, #8] + 8026148: 607a str r2, [r7, #4] /* Function not available on this instance */ } else #endif /* ADC_VER_V5_V90 */ { __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); - 802611a: 68fb ldr r3, [r7, #12] - 802611c: 3360 adds r3, #96 ; 0x60 - 802611e: 461a mov r2, r3 - 8026120: 68bb ldr r3, [r7, #8] - 8026122: 009b lsls r3, r3, #2 - 8026124: 4413 add r3, r2 - 8026126: 617b str r3, [r7, #20] + 802614a: 68fb ldr r3, [r7, #12] + 802614c: 3360 adds r3, #96 ; 0x60 + 802614e: 461a mov r2, r3 + 8026150: 68bb ldr r3, [r7, #8] + 8026152: 009b lsls r3, r3, #2 + 8026154: 4413 add r3, r2 + 8026156: 617b str r3, [r7, #20] MODIFY_REG(*preg, ADC_OFR1_SSATE, OffsetSignedSaturation); - 8026128: 697b ldr r3, [r7, #20] - 802612a: 681b ldr r3, [r3, #0] - 802612c: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 8026130: 687b ldr r3, [r7, #4] - 8026132: 431a orrs r2, r3 - 8026134: 697b ldr r3, [r7, #20] - 8026136: 601a str r2, [r3, #0] - } -} - 8026138: bf00 nop - 802613a: 371c adds r7, #28 - 802613c: 46bd mov sp, r7 - 802613e: f85d 7b04 ldr.w r7, [sp], #4 - 8026142: 4770 bx lr - -08026144 : + 8026158: 697b ldr r3, [r7, #20] + 802615a: 681b ldr r3, [r3, #0] + 802615c: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 8026160: 687b ldr r3, [r7, #4] + 8026162: 431a orrs r2, r3 + 8026164: 697b ldr r3, [r7, #20] + 8026166: 601a str r2, [r3, #0] + } +} + 8026168: bf00 nop + 802616a: 371c adds r7, #28 + 802616c: 46bd mov sp, r7 + 802616e: f85d 7b04 ldr.w r7, [sp], #4 + 8026172: 4770 bx lr + +08026174 : * @param ADCx ADC instance * @retval Value "0" if trigger source external trigger * Value "1" if trigger source SW start. */ __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx) { - 8026144: b480 push {r7} - 8026146: b083 sub sp, #12 - 8026148: af00 add r7, sp, #0 - 802614a: 6078 str r0, [r7, #4] + 8026174: b480 push {r7} + 8026176: b083 sub sp, #12 + 8026178: af00 add r7, sp, #0 + 802617a: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1UL : 0UL); - 802614c: 687b ldr r3, [r7, #4] - 802614e: 68db ldr r3, [r3, #12] - 8026150: f403 6340 and.w r3, r3, #3072 ; 0xc00 - 8026154: 2b00 cmp r3, #0 - 8026156: d101 bne.n 802615c - 8026158: 2301 movs r3, #1 - 802615a: e000 b.n 802615e - 802615c: 2300 movs r3, #0 -} - 802615e: 4618 mov r0, r3 - 8026160: 370c adds r7, #12 - 8026162: 46bd mov sp, r7 - 8026164: f85d 7b04 ldr.w r7, [sp], #4 - 8026168: 4770 bx lr - -0802616a : + 802617c: 687b ldr r3, [r7, #4] + 802617e: 68db ldr r3, [r3, #12] + 8026180: f403 6340 and.w r3, r3, #3072 ; 0xc00 + 8026184: 2b00 cmp r3, #0 + 8026186: d101 bne.n 802618c + 8026188: 2301 movs r3, #1 + 802618a: e000 b.n 802618e + 802618c: 2300 movs r3, #0 +} + 802618e: 4618 mov r0, r3 + 8026190: 370c adds r7, #12 + 8026192: 46bd mov sp, r7 + 8026194: f85d 7b04 ldr.w r7, [sp], #4 + 8026198: 4770 bx lr + +0802619a : * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to 8 Ms/s)). * Other channels are slow channels (conversion rate: refer to reference manual). * @retval None */ __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel) { - 802616a: b480 push {r7} - 802616c: b087 sub sp, #28 - 802616e: af00 add r7, sp, #0 - 8026170: 60f8 str r0, [r7, #12] - 8026172: 60b9 str r1, [r7, #8] - 8026174: 607a str r2, [r7, #4] + 802619a: b480 push {r7} + 802619c: b087 sub sp, #28 + 802619e: af00 add r7, sp, #0 + 80261a0: 60f8 str r0, [r7, #12] + 80261a2: 60b9 str r1, [r7, #8] + 80261a4: 607a str r2, [r7, #4] /* Set bits with content of parameter "Channel" with bits position */ /* in register and register position depending on parameter "Rank". */ /* Parameters "Rank" and "Channel" are used with masks because containing */ /* other bits reserved for other purpose. */ __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> ADC_SQRX_REGOFFSET_POS)); - 8026176: 68fb ldr r3, [r7, #12] - 8026178: 3330 adds r3, #48 ; 0x30 - 802617a: 461a mov r2, r3 - 802617c: 68bb ldr r3, [r7, #8] - 802617e: 0a1b lsrs r3, r3, #8 - 8026180: 009b lsls r3, r3, #2 - 8026182: f003 030c and.w r3, r3, #12 - 8026186: 4413 add r3, r2 - 8026188: 617b str r3, [r7, #20] + 80261a6: 68fb ldr r3, [r7, #12] + 80261a8: 3330 adds r3, #48 ; 0x30 + 80261aa: 461a mov r2, r3 + 80261ac: 68bb ldr r3, [r7, #8] + 80261ae: 0a1b lsrs r3, r3, #8 + 80261b0: 009b lsls r3, r3, #2 + 80261b2: f003 030c and.w r3, r3, #12 + 80261b6: 4413 add r3, r2 + 80261b8: 617b str r3, [r7, #20] MODIFY_REG(*preg, - 802618a: 697b ldr r3, [r7, #20] - 802618c: 681a ldr r2, [r3, #0] - 802618e: 68bb ldr r3, [r7, #8] - 8026190: f003 031f and.w r3, r3, #31 - 8026194: 211f movs r1, #31 - 8026196: fa01 f303 lsl.w r3, r1, r3 - 802619a: 43db mvns r3, r3 - 802619c: 401a ands r2, r3 - 802619e: 687b ldr r3, [r7, #4] - 80261a0: 0e9b lsrs r3, r3, #26 - 80261a2: f003 011f and.w r1, r3, #31 - 80261a6: 68bb ldr r3, [r7, #8] - 80261a8: f003 031f and.w r3, r3, #31 - 80261ac: fa01 f303 lsl.w r3, r1, r3 - 80261b0: 431a orrs r2, r3 - 80261b2: 697b ldr r3, [r7, #20] - 80261b4: 601a str r2, [r3, #0] + 80261ba: 697b ldr r3, [r7, #20] + 80261bc: 681a ldr r2, [r3, #0] + 80261be: 68bb ldr r3, [r7, #8] + 80261c0: f003 031f and.w r3, r3, #31 + 80261c4: 211f movs r1, #31 + 80261c6: fa01 f303 lsl.w r3, r1, r3 + 80261ca: 43db mvns r3, r3 + 80261cc: 401a ands r2, r3 + 80261ce: 687b ldr r3, [r7, #4] + 80261d0: 0e9b lsrs r3, r3, #26 + 80261d2: f003 011f and.w r1, r3, #31 + 80261d6: 68bb ldr r3, [r7, #8] + 80261d8: f003 031f and.w r3, r3, #31 + 80261dc: fa01 f303 lsl.w r3, r1, r3 + 80261e0: 431a orrs r2, r3 + 80261e2: 697b ldr r3, [r7, #20] + 80261e4: 601a str r2, [r3, #0] ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK), ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_REG_RANK_ID_SQRX_MASK)); } - 80261b6: bf00 nop - 80261b8: 371c adds r7, #28 - 80261ba: 46bd mov sp, r7 - 80261bc: f85d 7b04 ldr.w r7, [sp], #4 - 80261c0: 4770 bx lr + 80261e6: bf00 nop + 80261e8: 371c adds r7, #28 + 80261ea: 46bd mov sp, r7 + 80261ec: f85d 7b04 ldr.w r7, [sp], #4 + 80261f0: 4770 bx lr -080261c2 : +080261f2 : * @arg @ref LL_ADC_SAMPLINGTIME_387CYCLES_5 * @arg @ref LL_ADC_SAMPLINGTIME_810CYCLES_5 * @retval None */ __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SamplingTime) { - 80261c2: b480 push {r7} - 80261c4: b087 sub sp, #28 - 80261c6: af00 add r7, sp, #0 - 80261c8: 60f8 str r0, [r7, #12] - 80261ca: 60b9 str r1, [r7, #8] - 80261cc: 607a str r2, [r7, #4] + 80261f2: b480 push {r7} + 80261f4: b087 sub sp, #28 + 80261f6: af00 add r7, sp, #0 + 80261f8: 60f8 str r0, [r7, #12] + 80261fa: 60b9 str r1, [r7, #8] + 80261fc: 607a str r2, [r7, #4] /* Set bits with content of parameter "SamplingTime" with bits position */ /* in register and register position depending on parameter "Channel". */ /* Parameter "Channel" is used with masks because containing */ /* other bits reserved for other purpose. */ __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_MASK) >> ADC_SMPRX_REGOFFSET_POS)); - 80261ce: 68fb ldr r3, [r7, #12] - 80261d0: 3314 adds r3, #20 - 80261d2: 461a mov r2, r3 - 80261d4: 68bb ldr r3, [r7, #8] - 80261d6: 0e5b lsrs r3, r3, #25 - 80261d8: 009b lsls r3, r3, #2 - 80261da: f003 0304 and.w r3, r3, #4 - 80261de: 4413 add r3, r2 - 80261e0: 617b str r3, [r7, #20] + 80261fe: 68fb ldr r3, [r7, #12] + 8026200: 3314 adds r3, #20 + 8026202: 461a mov r2, r3 + 8026204: 68bb ldr r3, [r7, #8] + 8026206: 0e5b lsrs r3, r3, #25 + 8026208: 009b lsls r3, r3, #2 + 802620a: f003 0304 and.w r3, r3, #4 + 802620e: 4413 add r3, r2 + 8026210: 617b str r3, [r7, #20] MODIFY_REG(*preg, - 80261e2: 697b ldr r3, [r7, #20] - 80261e4: 681a ldr r2, [r3, #0] - 80261e6: 68bb ldr r3, [r7, #8] - 80261e8: 0d1b lsrs r3, r3, #20 - 80261ea: f003 031f and.w r3, r3, #31 - 80261ee: 2107 movs r1, #7 - 80261f0: fa01 f303 lsl.w r3, r1, r3 - 80261f4: 43db mvns r3, r3 - 80261f6: 401a ands r2, r3 - 80261f8: 68bb ldr r3, [r7, #8] - 80261fa: 0d1b lsrs r3, r3, #20 - 80261fc: f003 031f and.w r3, r3, #31 - 8026200: 6879 ldr r1, [r7, #4] - 8026202: fa01 f303 lsl.w r3, r1, r3 - 8026206: 431a orrs r2, r3 - 8026208: 697b ldr r3, [r7, #20] - 802620a: 601a str r2, [r3, #0] + 8026212: 697b ldr r3, [r7, #20] + 8026214: 681a ldr r2, [r3, #0] + 8026216: 68bb ldr r3, [r7, #8] + 8026218: 0d1b lsrs r3, r3, #20 + 802621a: f003 031f and.w r3, r3, #31 + 802621e: 2107 movs r1, #7 + 8026220: fa01 f303 lsl.w r3, r1, r3 + 8026224: 43db mvns r3, r3 + 8026226: 401a ands r2, r3 + 8026228: 68bb ldr r3, [r7, #8] + 802622a: 0d1b lsrs r3, r3, #20 + 802622c: f003 031f and.w r3, r3, #31 + 8026230: 6879 ldr r1, [r7, #4] + 8026232: fa01 f303 lsl.w r3, r1, r3 + 8026236: 431a orrs r2, r3 + 8026238: 697b ldr r3, [r7, #20] + 802623a: 601a str r2, [r3, #0] ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS), SamplingTime << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS)); } - 802620c: bf00 nop - 802620e: 371c adds r7, #28 - 8026210: 46bd mov sp, r7 - 8026212: f85d 7b04 ldr.w r7, [sp], #4 - 8026216: 4770 bx lr + 802623c: bf00 nop + 802623e: 371c adds r7, #28 + 8026240: 46bd mov sp, r7 + 8026242: f85d 7b04 ldr.w r7, [sp], #4 + 8026246: 4770 bx lr -08026218 : +08026248 : * @arg @ref LL_ADC_SINGLE_ENDED * @arg @ref LL_ADC_DIFFERENTIAL_ENDED * @retval None */ __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SingleDiff) { - 8026218: b480 push {r7} - 802621a: b085 sub sp, #20 - 802621c: af00 add r7, sp, #0 - 802621e: 60f8 str r0, [r7, #12] - 8026220: 60b9 str r1, [r7, #8] - 8026222: 607a str r2, [r7, #4] + 8026248: b480 push {r7} + 802624a: b085 sub sp, #20 + 802624c: af00 add r7, sp, #0 + 802624e: 60f8 str r0, [r7, #12] + 8026250: 60b9 str r1, [r7, #8] + 8026252: 607a str r2, [r7, #4] } #else /* ADC_VER_V5_V90 */ /* Bits of channels in single or differential mode are set only for */ /* differential mode (for single mode, mask of bits allowed to be set is */ /* shifted out of range of bits of channels in single or differential mode. */ MODIFY_REG(ADCx->DIFSEL, - 8026224: 68fb ldr r3, [r7, #12] - 8026226: f8d3 20c0 ldr.w r2, [r3, #192] ; 0xc0 - 802622a: 68bb ldr r3, [r7, #8] - 802622c: f3c3 0313 ubfx r3, r3, #0, #20 - 8026230: 43db mvns r3, r3 - 8026232: 401a ands r2, r3 - 8026234: 687b ldr r3, [r7, #4] - 8026236: f003 0318 and.w r3, r3, #24 - 802623a: 4908 ldr r1, [pc, #32] ; (802625c ) - 802623c: 40d9 lsrs r1, r3 - 802623e: 68bb ldr r3, [r7, #8] - 8026240: 400b ands r3, r1 - 8026242: f3c3 0313 ubfx r3, r3, #0, #20 - 8026246: 431a orrs r2, r3 - 8026248: 68fb ldr r3, [r7, #12] - 802624a: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 + 8026254: 68fb ldr r3, [r7, #12] + 8026256: f8d3 20c0 ldr.w r2, [r3, #192] ; 0xc0 + 802625a: 68bb ldr r3, [r7, #8] + 802625c: f3c3 0313 ubfx r3, r3, #0, #20 + 8026260: 43db mvns r3, r3 + 8026262: 401a ands r2, r3 + 8026264: 687b ldr r3, [r7, #4] + 8026266: f003 0318 and.w r3, r3, #24 + 802626a: 4908 ldr r1, [pc, #32] ; (802628c ) + 802626c: 40d9 lsrs r1, r3 + 802626e: 68bb ldr r3, [r7, #8] + 8026270: 400b ands r3, r1 + 8026272: f3c3 0313 ubfx r3, r3, #0, #20 + 8026276: 431a orrs r2, r3 + 8026278: 68fb ldr r3, [r7, #12] + 802627a: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 Channel & ADC_SINGLEDIFF_CHANNEL_MASK, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK))); #endif } - 802624e: bf00 nop - 8026250: 3714 adds r7, #20 - 8026252: 46bd mov sp, r7 - 8026254: f85d 7b04 ldr.w r7, [sp], #4 - 8026258: 4770 bx lr - 802625a: bf00 nop - 802625c: 000fffff .word 0x000fffff + 802627e: bf00 nop + 8026280: 3714 adds r7, #20 + 8026282: 46bd mov sp, r7 + 8026284: f85d 7b04 ldr.w r7, [sp], #4 + 8026288: 4770 bx lr + 802628a: bf00 nop + 802628c: 000fffff .word 0x000fffff -08026260 : +08026290 : * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM */ __STATIC_INLINE uint32_t LL_ADC_GetMultimode(ADC_Common_TypeDef *ADCxy_COMMON) { - 8026260: b480 push {r7} - 8026262: b083 sub sp, #12 - 8026264: af00 add r7, sp, #0 - 8026266: 6078 str r0, [r7, #4] + 8026290: b480 push {r7} + 8026292: b083 sub sp, #12 + 8026294: af00 add r7, sp, #0 + 8026296: 6078 str r0, [r7, #4] return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL)); - 8026268: 687b ldr r3, [r7, #4] - 802626a: 689b ldr r3, [r3, #8] - 802626c: f003 031f and.w r3, r3, #31 + 8026298: 687b ldr r3, [r7, #4] + 802629a: 689b ldr r3, [r3, #8] + 802629c: f003 031f and.w r3, r3, #31 } - 8026270: 4618 mov r0, r3 - 8026272: 370c adds r7, #12 - 8026274: 46bd mov sp, r7 - 8026276: f85d 7b04 ldr.w r7, [sp], #4 - 802627a: 4770 bx lr + 80262a0: 4618 mov r0, r3 + 80262a2: 370c adds r7, #12 + 80262a4: 46bd mov sp, r7 + 80262a6: f85d 7b04 ldr.w r7, [sp], #4 + 80262aa: 4770 bx lr -0802627c : +080262ac : * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC * @arg @ref LL_ADC_MULTI_REG_DMA_RES_32_10B * @arg @ref LL_ADC_MULTI_REG_DMA_RES_8B */ __STATIC_INLINE uint32_t LL_ADC_GetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON) { - 802627c: b480 push {r7} - 802627e: b083 sub sp, #12 - 8026280: af00 add r7, sp, #0 - 8026282: 6078 str r0, [r7, #4] + 80262ac: b480 push {r7} + 80262ae: b083 sub sp, #12 + 80262b0: af00 add r7, sp, #0 + 80262b2: 6078 str r0, [r7, #4] return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DAMDF)); - 8026284: 687b ldr r3, [r7, #4] - 8026286: 689b ldr r3, [r3, #8] - 8026288: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 80262b4: 687b ldr r3, [r7, #4] + 80262b6: 689b ldr r3, [r3, #8] + 80262b8: f403 4340 and.w r3, r3, #49152 ; 0xc000 } - 802628c: 4618 mov r0, r3 - 802628e: 370c adds r7, #12 - 8026290: 46bd mov sp, r7 - 8026292: f85d 7b04 ldr.w r7, [sp], #4 - 8026296: 4770 bx lr + 80262bc: 4618 mov r0, r3 + 80262be: 370c adds r7, #12 + 80262c0: 46bd mov sp, r7 + 80262c2: f85d 7b04 ldr.w r7, [sp], #4 + 80262c6: 4770 bx lr -08026298 : +080262c8 : * @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx) { - 8026298: b480 push {r7} - 802629a: b083 sub sp, #12 - 802629c: af00 add r7, sp, #0 - 802629e: 6078 str r0, [r7, #4] + 80262c8: b480 push {r7} + 80262ca: b083 sub sp, #12 + 80262cc: af00 add r7, sp, #0 + 80262ce: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD | ADC_CR_BITS_PROPERTY_RS)); - 80262a0: 687b ldr r3, [r7, #4] - 80262a2: 689a ldr r2, [r3, #8] - 80262a4: 4b04 ldr r3, [pc, #16] ; (80262b8 ) - 80262a6: 4013 ands r3, r2 - 80262a8: 687a ldr r2, [r7, #4] - 80262aa: 6093 str r3, [r2, #8] -} - 80262ac: bf00 nop - 80262ae: 370c adds r7, #12 - 80262b0: 46bd mov sp, r7 - 80262b2: f85d 7b04 ldr.w r7, [sp], #4 - 80262b6: 4770 bx lr - 80262b8: 5fffffc0 .word 0x5fffffc0 - -080262bc : + 80262d0: 687b ldr r3, [r7, #4] + 80262d2: 689a ldr r2, [r3, #8] + 80262d4: 4b04 ldr r3, [pc, #16] ; (80262e8 ) + 80262d6: 4013 ands r3, r2 + 80262d8: 687a ldr r2, [r7, #4] + 80262da: 6093 str r3, [r2, #8] +} + 80262dc: bf00 nop + 80262de: 370c adds r7, #12 + 80262e0: 46bd mov sp, r7 + 80262e2: f85d 7b04 ldr.w r7, [sp], #4 + 80262e6: 4770 bx lr + 80262e8: 5fffffc0 .word 0x5fffffc0 + +080262ec : * @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled * @param ADCx ADC instance * @retval 0: deep power down is disabled, 1: deep power down is enabled. */ __STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(ADC_TypeDef *ADCx) { - 80262bc: b480 push {r7} - 80262be: b083 sub sp, #12 - 80262c0: af00 add r7, sp, #0 - 80262c2: 6078 str r0, [r7, #4] + 80262ec: b480 push {r7} + 80262ee: b083 sub sp, #12 + 80262f0: af00 add r7, sp, #0 + 80262f2: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD)) ? 1UL : 0UL); - 80262c4: 687b ldr r3, [r7, #4] - 80262c6: 689b ldr r3, [r3, #8] - 80262c8: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 80262cc: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80262d0: d101 bne.n 80262d6 - 80262d2: 2301 movs r3, #1 - 80262d4: e000 b.n 80262d8 - 80262d6: 2300 movs r3, #0 -} - 80262d8: 4618 mov r0, r3 - 80262da: 370c adds r7, #12 - 80262dc: 46bd mov sp, r7 - 80262de: f85d 7b04 ldr.w r7, [sp], #4 - 80262e2: 4770 bx lr - -080262e4 : + 80262f4: 687b ldr r3, [r7, #4] + 80262f6: 689b ldr r3, [r3, #8] + 80262f8: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 80262fc: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8026300: d101 bne.n 8026306 + 8026302: 2301 movs r3, #1 + 8026304: e000 b.n 8026308 + 8026306: 2300 movs r3, #0 +} + 8026308: 4618 mov r0, r3 + 802630a: 370c adds r7, #12 + 802630c: 46bd mov sp, r7 + 802630e: f85d 7b04 ldr.w r7, [sp], #4 + 8026312: 4770 bx lr + +08026314 : * @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx) { - 80262e4: b480 push {r7} - 80262e6: b083 sub sp, #12 - 80262e8: af00 add r7, sp, #0 - 80262ea: 6078 str r0, [r7, #4] + 8026314: b480 push {r7} + 8026316: b083 sub sp, #12 + 8026318: af00 add r7, sp, #0 + 802631a: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 80262ec: 687b ldr r3, [r7, #4] - 80262ee: 689a ldr r2, [r3, #8] - 80262f0: 4b05 ldr r3, [pc, #20] ; (8026308 ) - 80262f2: 4013 ands r3, r2 - 80262f4: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000 - 80262f8: 687b ldr r3, [r7, #4] - 80262fa: 609a str r2, [r3, #8] + 802631c: 687b ldr r3, [r7, #4] + 802631e: 689a ldr r2, [r3, #8] + 8026320: 4b05 ldr r3, [pc, #20] ; (8026338 ) + 8026322: 4013 ands r3, r2 + 8026324: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000 + 8026328: 687b ldr r3, [r7, #4] + 802632a: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADVREGEN); } - 80262fc: bf00 nop - 80262fe: 370c adds r7, #12 - 8026300: 46bd mov sp, r7 - 8026302: f85d 7b04 ldr.w r7, [sp], #4 - 8026306: 4770 bx lr - 8026308: 6fffffc0 .word 0x6fffffc0 + 802632c: bf00 nop + 802632e: 370c adds r7, #12 + 8026330: 46bd mov sp, r7 + 8026332: f85d 7b04 ldr.w r7, [sp], #4 + 8026336: 4770 bx lr + 8026338: 6fffffc0 .word 0x6fffffc0 -0802630c : +0802633c : * @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled * @param ADCx ADC instance * @retval 0: internal regulator is disabled, 1: internal regulator is enabled. */ __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx) { - 802630c: b480 push {r7} - 802630e: b083 sub sp, #12 - 8026310: af00 add r7, sp, #0 - 8026312: 6078 str r0, [r7, #4] + 802633c: b480 push {r7} + 802633e: b083 sub sp, #12 + 8026340: af00 add r7, sp, #0 + 8026342: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL); - 8026314: 687b ldr r3, [r7, #4] - 8026316: 689b ldr r3, [r3, #8] - 8026318: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 802631c: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8026320: d101 bne.n 8026326 - 8026322: 2301 movs r3, #1 - 8026324: e000 b.n 8026328 - 8026326: 2300 movs r3, #0 -} - 8026328: 4618 mov r0, r3 - 802632a: 370c adds r7, #12 - 802632c: 46bd mov sp, r7 - 802632e: f85d 7b04 ldr.w r7, [sp], #4 - 8026332: 4770 bx lr - -08026334 : + 8026344: 687b ldr r3, [r7, #4] + 8026346: 689b ldr r3, [r3, #8] + 8026348: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 802634c: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8026350: d101 bne.n 8026356 + 8026352: 2301 movs r3, #1 + 8026354: e000 b.n 8026358 + 8026356: 2300 movs r3, #0 +} + 8026358: 4618 mov r0, r3 + 802635a: 370c adds r7, #12 + 802635c: 46bd mov sp, r7 + 802635e: f85d 7b04 ldr.w r7, [sp], #4 + 8026362: 4770 bx lr + +08026364 : * @rmtoll CR ADEN LL_ADC_Enable * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx) { - 8026334: b480 push {r7} - 8026336: b083 sub sp, #12 - 8026338: af00 add r7, sp, #0 - 802633a: 6078 str r0, [r7, #4] + 8026364: b480 push {r7} + 8026366: b083 sub sp, #12 + 8026368: af00 add r7, sp, #0 + 802636a: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 802633c: 687b ldr r3, [r7, #4] - 802633e: 689a ldr r2, [r3, #8] - 8026340: 4b05 ldr r3, [pc, #20] ; (8026358 ) - 8026342: 4013 ands r3, r2 - 8026344: f043 0201 orr.w r2, r3, #1 - 8026348: 687b ldr r3, [r7, #4] - 802634a: 609a str r2, [r3, #8] + 802636c: 687b ldr r3, [r7, #4] + 802636e: 689a ldr r2, [r3, #8] + 8026370: 4b05 ldr r3, [pc, #20] ; (8026388 ) + 8026372: 4013 ands r3, r2 + 8026374: f043 0201 orr.w r2, r3, #1 + 8026378: 687b ldr r3, [r7, #4] + 802637a: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADEN); } - 802634c: bf00 nop - 802634e: 370c adds r7, #12 - 8026350: 46bd mov sp, r7 - 8026352: f85d 7b04 ldr.w r7, [sp], #4 - 8026356: 4770 bx lr - 8026358: 7fffffc0 .word 0x7fffffc0 + 802637c: bf00 nop + 802637e: 370c adds r7, #12 + 8026380: 46bd mov sp, r7 + 8026382: f85d 7b04 ldr.w r7, [sp], #4 + 8026386: 4770 bx lr + 8026388: 7fffffc0 .word 0x7fffffc0 -0802635c : +0802638c : * @rmtoll CR ADDIS LL_ADC_Disable * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx) { - 802635c: b480 push {r7} - 802635e: b083 sub sp, #12 - 8026360: af00 add r7, sp, #0 - 8026362: 6078 str r0, [r7, #4] + 802638c: b480 push {r7} + 802638e: b083 sub sp, #12 + 8026390: af00 add r7, sp, #0 + 8026392: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 8026364: 687b ldr r3, [r7, #4] - 8026366: 689a ldr r2, [r3, #8] - 8026368: 4b05 ldr r3, [pc, #20] ; (8026380 ) - 802636a: 4013 ands r3, r2 - 802636c: f043 0202 orr.w r2, r3, #2 - 8026370: 687b ldr r3, [r7, #4] - 8026372: 609a str r2, [r3, #8] + 8026394: 687b ldr r3, [r7, #4] + 8026396: 689a ldr r2, [r3, #8] + 8026398: 4b05 ldr r3, [pc, #20] ; (80263b0 ) + 802639a: 4013 ands r3, r2 + 802639c: f043 0202 orr.w r2, r3, #2 + 80263a0: 687b ldr r3, [r7, #4] + 80263a2: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADDIS); } - 8026374: bf00 nop - 8026376: 370c adds r7, #12 - 8026378: 46bd mov sp, r7 - 802637a: f85d 7b04 ldr.w r7, [sp], #4 - 802637e: 4770 bx lr - 8026380: 7fffffc0 .word 0x7fffffc0 + 80263a4: bf00 nop + 80263a6: 370c adds r7, #12 + 80263a8: 46bd mov sp, r7 + 80263aa: f85d 7b04 ldr.w r7, [sp], #4 + 80263ae: 4770 bx lr + 80263b0: 7fffffc0 .word 0x7fffffc0 -08026384 : +080263b4 : * @rmtoll CR ADEN LL_ADC_IsEnabled * @param ADCx ADC instance * @retval 0: ADC is disabled, 1: ADC is enabled. */ __STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx) { - 8026384: b480 push {r7} - 8026386: b083 sub sp, #12 - 8026388: af00 add r7, sp, #0 - 802638a: 6078 str r0, [r7, #4] + 80263b4: b480 push {r7} + 80263b6: b083 sub sp, #12 + 80263b8: af00 add r7, sp, #0 + 80263ba: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL); - 802638c: 687b ldr r3, [r7, #4] - 802638e: 689b ldr r3, [r3, #8] - 8026390: f003 0301 and.w r3, r3, #1 - 8026394: 2b01 cmp r3, #1 - 8026396: d101 bne.n 802639c - 8026398: 2301 movs r3, #1 - 802639a: e000 b.n 802639e - 802639c: 2300 movs r3, #0 -} - 802639e: 4618 mov r0, r3 - 80263a0: 370c adds r7, #12 - 80263a2: 46bd mov sp, r7 - 80263a4: f85d 7b04 ldr.w r7, [sp], #4 - 80263a8: 4770 bx lr - -080263aa : + 80263bc: 687b ldr r3, [r7, #4] + 80263be: 689b ldr r3, [r3, #8] + 80263c0: f003 0301 and.w r3, r3, #1 + 80263c4: 2b01 cmp r3, #1 + 80263c6: d101 bne.n 80263cc + 80263c8: 2301 movs r3, #1 + 80263ca: e000 b.n 80263ce + 80263cc: 2300 movs r3, #0 +} + 80263ce: 4618 mov r0, r3 + 80263d0: 370c adds r7, #12 + 80263d2: 46bd mov sp, r7 + 80263d4: f85d 7b04 ldr.w r7, [sp], #4 + 80263d8: 4770 bx lr + +080263da : * @rmtoll CR ADDIS LL_ADC_IsDisableOngoing * @param ADCx ADC instance * @retval 0: no ADC disable command on going. */ __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx) { - 80263aa: b480 push {r7} - 80263ac: b083 sub sp, #12 - 80263ae: af00 add r7, sp, #0 - 80263b0: 6078 str r0, [r7, #4] + 80263da: b480 push {r7} + 80263dc: b083 sub sp, #12 + 80263de: af00 add r7, sp, #0 + 80263e0: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS)) ? 1UL : 0UL); - 80263b2: 687b ldr r3, [r7, #4] - 80263b4: 689b ldr r3, [r3, #8] - 80263b6: f003 0302 and.w r3, r3, #2 - 80263ba: 2b02 cmp r3, #2 - 80263bc: d101 bne.n 80263c2 - 80263be: 2301 movs r3, #1 - 80263c0: e000 b.n 80263c4 - 80263c2: 2300 movs r3, #0 -} - 80263c4: 4618 mov r0, r3 - 80263c6: 370c adds r7, #12 - 80263c8: 46bd mov sp, r7 - 80263ca: f85d 7b04 ldr.w r7, [sp], #4 - 80263ce: 4770 bx lr - -080263d0 : + 80263e2: 687b ldr r3, [r7, #4] + 80263e4: 689b ldr r3, [r3, #8] + 80263e6: f003 0302 and.w r3, r3, #2 + 80263ea: 2b02 cmp r3, #2 + 80263ec: d101 bne.n 80263f2 + 80263ee: 2301 movs r3, #1 + 80263f0: e000 b.n 80263f4 + 80263f2: 2300 movs r3, #0 +} + 80263f4: 4618 mov r0, r3 + 80263f6: 370c adds r7, #12 + 80263f8: 46bd mov sp, r7 + 80263fa: f85d 7b04 ldr.w r7, [sp], #4 + 80263fe: 4770 bx lr + +08026400 : * @rmtoll CR ADSTART LL_ADC_REG_StartConversion * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx) { - 80263d0: b480 push {r7} - 80263d2: b083 sub sp, #12 - 80263d4: af00 add r7, sp, #0 - 80263d6: 6078 str r0, [r7, #4] + 8026400: b480 push {r7} + 8026402: b083 sub sp, #12 + 8026404: af00 add r7, sp, #0 + 8026406: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 80263d8: 687b ldr r3, [r7, #4] - 80263da: 689a ldr r2, [r3, #8] - 80263dc: 4b05 ldr r3, [pc, #20] ; (80263f4 ) - 80263de: 4013 ands r3, r2 - 80263e0: f043 0204 orr.w r2, r3, #4 - 80263e4: 687b ldr r3, [r7, #4] - 80263e6: 609a str r2, [r3, #8] + 8026408: 687b ldr r3, [r7, #4] + 802640a: 689a ldr r2, [r3, #8] + 802640c: 4b05 ldr r3, [pc, #20] ; (8026424 ) + 802640e: 4013 ands r3, r2 + 8026410: f043 0204 orr.w r2, r3, #4 + 8026414: 687b ldr r3, [r7, #4] + 8026416: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADSTART); } - 80263e8: bf00 nop - 80263ea: 370c adds r7, #12 - 80263ec: 46bd mov sp, r7 - 80263ee: f85d 7b04 ldr.w r7, [sp], #4 - 80263f2: 4770 bx lr - 80263f4: 7fffffc0 .word 0x7fffffc0 + 8026418: bf00 nop + 802641a: 370c adds r7, #12 + 802641c: 46bd mov sp, r7 + 802641e: f85d 7b04 ldr.w r7, [sp], #4 + 8026422: 4770 bx lr + 8026424: 7fffffc0 .word 0x7fffffc0 -080263f8 : +08026428 : * @rmtoll CR ADSTP LL_ADC_REG_StopConversion * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx) { - 80263f8: b480 push {r7} - 80263fa: b083 sub sp, #12 - 80263fc: af00 add r7, sp, #0 - 80263fe: 6078 str r0, [r7, #4] + 8026428: b480 push {r7} + 802642a: b083 sub sp, #12 + 802642c: af00 add r7, sp, #0 + 802642e: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 8026400: 687b ldr r3, [r7, #4] - 8026402: 689a ldr r2, [r3, #8] - 8026404: 4b05 ldr r3, [pc, #20] ; (802641c ) - 8026406: 4013 ands r3, r2 - 8026408: f043 0210 orr.w r2, r3, #16 - 802640c: 687b ldr r3, [r7, #4] - 802640e: 609a str r2, [r3, #8] + 8026430: 687b ldr r3, [r7, #4] + 8026432: 689a ldr r2, [r3, #8] + 8026434: 4b05 ldr r3, [pc, #20] ; (802644c ) + 8026436: 4013 ands r3, r2 + 8026438: f043 0210 orr.w r2, r3, #16 + 802643c: 687b ldr r3, [r7, #4] + 802643e: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADSTP); } - 8026410: bf00 nop - 8026412: 370c adds r7, #12 - 8026414: 46bd mov sp, r7 - 8026416: f85d 7b04 ldr.w r7, [sp], #4 - 802641a: 4770 bx lr - 802641c: 7fffffc0 .word 0x7fffffc0 + 8026440: bf00 nop + 8026442: 370c adds r7, #12 + 8026444: 46bd mov sp, r7 + 8026446: f85d 7b04 ldr.w r7, [sp], #4 + 802644a: 4770 bx lr + 802644c: 7fffffc0 .word 0x7fffffc0 -08026420 : +08026450 : * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing * @param ADCx ADC instance * @retval 0: no conversion is on going on ADC group regular. */ __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx) { - 8026420: b480 push {r7} - 8026422: b083 sub sp, #12 - 8026424: af00 add r7, sp, #0 - 8026426: 6078 str r0, [r7, #4] + 8026450: b480 push {r7} + 8026452: b083 sub sp, #12 + 8026454: af00 add r7, sp, #0 + 8026456: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL); - 8026428: 687b ldr r3, [r7, #4] - 802642a: 689b ldr r3, [r3, #8] - 802642c: f003 0304 and.w r3, r3, #4 - 8026430: 2b04 cmp r3, #4 - 8026432: d101 bne.n 8026438 - 8026434: 2301 movs r3, #1 - 8026436: e000 b.n 802643a - 8026438: 2300 movs r3, #0 -} - 802643a: 4618 mov r0, r3 - 802643c: 370c adds r7, #12 - 802643e: 46bd mov sp, r7 - 8026440: f85d 7b04 ldr.w r7, [sp], #4 - 8026444: 4770 bx lr + 8026458: 687b ldr r3, [r7, #4] + 802645a: 689b ldr r3, [r3, #8] + 802645c: f003 0304 and.w r3, r3, #4 + 8026460: 2b04 cmp r3, #4 + 8026462: d101 bne.n 8026468 + 8026464: 2301 movs r3, #1 + 8026466: e000 b.n 802646a + 8026468: 2300 movs r3, #0 +} + 802646a: 4618 mov r0, r3 + 802646c: 370c adds r7, #12 + 802646e: 46bd mov sp, r7 + 8026470: f85d 7b04 ldr.w r7, [sp], #4 + 8026474: 4770 bx lr ... -08026448 : +08026478 : * @rmtoll CR JADSTP LL_ADC_INJ_StopConversion * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_INJ_StopConversion(ADC_TypeDef *ADCx) { - 8026448: b480 push {r7} - 802644a: b083 sub sp, #12 - 802644c: af00 add r7, sp, #0 - 802644e: 6078 str r0, [r7, #4] + 8026478: b480 push {r7} + 802647a: b083 sub sp, #12 + 802647c: af00 add r7, sp, #0 + 802647e: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 8026450: 687b ldr r3, [r7, #4] - 8026452: 689a ldr r2, [r3, #8] - 8026454: 4b05 ldr r3, [pc, #20] ; (802646c ) - 8026456: 4013 ands r3, r2 - 8026458: f043 0220 orr.w r2, r3, #32 - 802645c: 687b ldr r3, [r7, #4] - 802645e: 609a str r2, [r3, #8] + 8026480: 687b ldr r3, [r7, #4] + 8026482: 689a ldr r2, [r3, #8] + 8026484: 4b05 ldr r3, [pc, #20] ; (802649c ) + 8026486: 4013 ands r3, r2 + 8026488: f043 0220 orr.w r2, r3, #32 + 802648c: 687b ldr r3, [r7, #4] + 802648e: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_JADSTP); } - 8026460: bf00 nop - 8026462: 370c adds r7, #12 - 8026464: 46bd mov sp, r7 - 8026466: f85d 7b04 ldr.w r7, [sp], #4 - 802646a: 4770 bx lr - 802646c: 7fffffc0 .word 0x7fffffc0 + 8026490: bf00 nop + 8026492: 370c adds r7, #12 + 8026494: 46bd mov sp, r7 + 8026496: f85d 7b04 ldr.w r7, [sp], #4 + 802649a: 4770 bx lr + 802649c: 7fffffc0 .word 0x7fffffc0 -08026470 : +080264a0 : * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing * @param ADCx ADC instance * @retval 0: no conversion is on going on ADC group injected. */ __STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(ADC_TypeDef *ADCx) { - 8026470: b480 push {r7} - 8026472: b083 sub sp, #12 - 8026474: af00 add r7, sp, #0 - 8026476: 6078 str r0, [r7, #4] + 80264a0: b480 push {r7} + 80264a2: b083 sub sp, #12 + 80264a4: af00 add r7, sp, #0 + 80264a6: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART)) ? 1UL : 0UL); - 8026478: 687b ldr r3, [r7, #4] - 802647a: 689b ldr r3, [r3, #8] - 802647c: f003 0308 and.w r3, r3, #8 - 8026480: 2b08 cmp r3, #8 - 8026482: d101 bne.n 8026488 - 8026484: 2301 movs r3, #1 - 8026486: e000 b.n 802648a - 8026488: 2300 movs r3, #0 -} - 802648a: 4618 mov r0, r3 - 802648c: 370c adds r7, #12 - 802648e: 46bd mov sp, r7 - 8026490: f85d 7b04 ldr.w r7, [sp], #4 - 8026494: 4770 bx lr + 80264a8: 687b ldr r3, [r7, #4] + 80264aa: 689b ldr r3, [r3, #8] + 80264ac: f003 0308 and.w r3, r3, #8 + 80264b0: 2b08 cmp r3, #8 + 80264b2: d101 bne.n 80264b8 + 80264b4: 2301 movs r3, #1 + 80264b6: e000 b.n 80264ba + 80264b8: 2300 movs r3, #0 +} + 80264ba: 4618 mov r0, r3 + 80264bc: 370c adds r7, #12 + 80264be: 46bd mov sp, r7 + 80264c0: f85d 7b04 ldr.w r7, [sp], #4 + 80264c4: 4770 bx lr ... -08026498 : +080264c8 : * without disabling the other ADCs. * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc) { - 8026498: b590 push {r4, r7, lr} - 802649a: b089 sub sp, #36 ; 0x24 - 802649c: af00 add r7, sp, #0 - 802649e: 6078 str r0, [r7, #4] + 80264c8: b590 push {r4, r7, lr} + 80264ca: b089 sub sp, #36 ; 0x24 + 80264cc: af00 add r7, sp, #0 + 80264ce: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80264a0: 2300 movs r3, #0 - 80264a2: 77fb strb r3, [r7, #31] + 80264d0: 2300 movs r3, #0 + 80264d2: 77fb strb r3, [r7, #31] uint32_t tmpCFGR; uint32_t tmp_adc_reg_is_conversion_on_going; __IO uint32_t wait_loop_index = 0UL; - 80264a4: 2300 movs r3, #0 - 80264a6: 60bb str r3, [r7, #8] + 80264d4: 2300 movs r3, #0 + 80264d6: 60bb str r3, [r7, #8] uint32_t tmp_adc_is_conversion_on_going_regular; uint32_t tmp_adc_is_conversion_on_going_injected; /* Check ADC handle */ if (hadc == NULL) - 80264a8: 687b ldr r3, [r7, #4] - 80264aa: 2b00 cmp r3, #0 - 80264ac: d101 bne.n 80264b2 + 80264d8: 687b ldr r3, [r7, #4] + 80264da: 2b00 cmp r3, #0 + 80264dc: d101 bne.n 80264e2 { return HAL_ERROR; - 80264ae: 2301 movs r3, #1 - 80264b0: e18f b.n 80267d2 + 80264de: 2301 movs r3, #1 + 80264e0: e18f b.n 8026802 assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode)); if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - 80264b2: 687b ldr r3, [r7, #4] - 80264b4: 68db ldr r3, [r3, #12] - 80264b6: 2b00 cmp r3, #0 + 80264e2: 687b ldr r3, [r7, #4] + 80264e4: 68db ldr r3, [r3, #12] + 80264e6: 2b00 cmp r3, #0 /* DISCEN and CONT bits cannot be set at the same time */ assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == ENABLE))); /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 80264b8: 687b ldr r3, [r7, #4] - 80264ba: 6d5b ldr r3, [r3, #84] ; 0x54 - 80264bc: 2b00 cmp r3, #0 - 80264be: d109 bne.n 80264d4 + 80264e8: 687b ldr r3, [r7, #4] + 80264ea: 6d5b ldr r3, [r3, #84] ; 0x54 + 80264ec: 2b00 cmp r3, #0 + 80264ee: d109 bne.n 8026504 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 80264c0: 6878 ldr r0, [r7, #4] - 80264c2: f7fc fd4f bl 8022f64 + 80264f0: 6878 ldr r0, [r7, #4] + 80264f2: f7fc fd37 bl 8022f64 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 80264c6: 687b ldr r3, [r7, #4] - 80264c8: 2200 movs r2, #0 - 80264ca: 659a str r2, [r3, #88] ; 0x58 + 80264f6: 687b ldr r3, [r7, #4] + 80264f8: 2200 movs r2, #0 + 80264fa: 659a str r2, [r3, #88] ; 0x58 /* Initialize Lock */ hadc->Lock = HAL_UNLOCKED; - 80264cc: 687b ldr r3, [r7, #4] - 80264ce: 2200 movs r2, #0 - 80264d0: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 80264fc: 687b ldr r3, [r7, #4] + 80264fe: 2200 movs r2, #0 + 8026500: f883 2050 strb.w r2, [r3, #80] ; 0x50 } /* - Exit from deep-power-down mode and ADC voltage regulator enable */ if (LL_ADC_IsDeepPowerDownEnabled(hadc->Instance) != 0UL) - 80264d4: 687b ldr r3, [r7, #4] - 80264d6: 681b ldr r3, [r3, #0] - 80264d8: 4618 mov r0, r3 - 80264da: f7ff feef bl 80262bc - 80264de: 4603 mov r3, r0 - 80264e0: 2b00 cmp r3, #0 - 80264e2: d004 beq.n 80264ee + 8026504: 687b ldr r3, [r7, #4] + 8026506: 681b ldr r3, [r3, #0] + 8026508: 4618 mov r0, r3 + 802650a: f7ff feef bl 80262ec + 802650e: 4603 mov r3, r0 + 8026510: 2b00 cmp r3, #0 + 8026512: d004 beq.n 802651e { /* Disable ADC deep power down mode */ LL_ADC_DisableDeepPowerDown(hadc->Instance); - 80264e4: 687b ldr r3, [r7, #4] - 80264e6: 681b ldr r3, [r3, #0] - 80264e8: 4618 mov r0, r3 - 80264ea: f7ff fed5 bl 8026298 + 8026514: 687b ldr r3, [r7, #4] + 8026516: 681b ldr r3, [r3, #0] + 8026518: 4618 mov r0, r3 + 802651a: f7ff fed5 bl 80262c8 /* System was in deep power down mode, calibration must be relaunched or a previously saved calibration factor re-applied once the ADC voltage regulator is enabled */ } if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) - 80264ee: 687b ldr r3, [r7, #4] - 80264f0: 681b ldr r3, [r3, #0] - 80264f2: 4618 mov r0, r3 - 80264f4: f7ff ff0a bl 802630c - 80264f8: 4603 mov r3, r0 - 80264fa: 2b00 cmp r3, #0 - 80264fc: d114 bne.n 8026528 + 802651e: 687b ldr r3, [r7, #4] + 8026520: 681b ldr r3, [r3, #0] + 8026522: 4618 mov r0, r3 + 8026524: f7ff ff0a bl 802633c + 8026528: 4603 mov r3, r0 + 802652a: 2b00 cmp r3, #0 + 802652c: d114 bne.n 8026558 { /* Enable ADC internal voltage regulator */ LL_ADC_EnableInternalRegulator(hadc->Instance); - 80264fe: 687b ldr r3, [r7, #4] - 8026500: 681b ldr r3, [r3, #0] - 8026502: 4618 mov r0, r3 - 8026504: f7ff feee bl 80262e4 + 802652e: 687b ldr r3, [r7, #4] + 8026530: 681b ldr r3, [r3, #0] + 8026532: 4618 mov r0, r3 + 8026534: f7ff feee bl 8026314 /* Note: Variable divided by 2 to compensate partially */ /* CPU processing cycles, scaling in us split to not */ /* exceed 32 bits register capacity and handle low frequency. */ wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL)); - 8026508: 4b87 ldr r3, [pc, #540] ; (8026728 ) - 802650a: 681b ldr r3, [r3, #0] - 802650c: 099b lsrs r3, r3, #6 - 802650e: 4a87 ldr r2, [pc, #540] ; (802672c ) - 8026510: fba2 2303 umull r2, r3, r2, r3 - 8026514: 099b lsrs r3, r3, #6 - 8026516: 3301 adds r3, #1 - 8026518: 60bb str r3, [r7, #8] + 8026538: 4b87 ldr r3, [pc, #540] ; (8026758 ) + 802653a: 681b ldr r3, [r3, #0] + 802653c: 099b lsrs r3, r3, #6 + 802653e: 4a87 ldr r2, [pc, #540] ; (802675c ) + 8026540: fba2 2303 umull r2, r3, r2, r3 + 8026544: 099b lsrs r3, r3, #6 + 8026546: 3301 adds r3, #1 + 8026548: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 802651a: e002 b.n 8026522 + 802654a: e002 b.n 8026552 { wait_loop_index--; - 802651c: 68bb ldr r3, [r7, #8] - 802651e: 3b01 subs r3, #1 - 8026520: 60bb str r3, [r7, #8] + 802654c: 68bb ldr r3, [r7, #8] + 802654e: 3b01 subs r3, #1 + 8026550: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 8026522: 68bb ldr r3, [r7, #8] - 8026524: 2b00 cmp r3, #0 - 8026526: d1f9 bne.n 802651c + 8026552: 68bb ldr r3, [r7, #8] + 8026554: 2b00 cmp r3, #0 + 8026556: d1f9 bne.n 802654c } /* Verification that ADC voltage regulator is correctly enabled, whether */ /* or not ADC is coming from state reset (if any potential problem of */ /* clocking, voltage regulator would not be enabled). */ if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) - 8026528: 687b ldr r3, [r7, #4] - 802652a: 681b ldr r3, [r3, #0] - 802652c: 4618 mov r0, r3 - 802652e: f7ff feed bl 802630c - 8026532: 4603 mov r3, r0 - 8026534: 2b00 cmp r3, #0 - 8026536: d10d bne.n 8026554 + 8026558: 687b ldr r3, [r7, #4] + 802655a: 681b ldr r3, [r3, #0] + 802655c: 4618 mov r0, r3 + 802655e: f7ff feed bl 802633c + 8026562: 4603 mov r3, r0 + 8026564: 2b00 cmp r3, #0 + 8026566: d10d bne.n 8026584 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8026538: 687b ldr r3, [r7, #4] - 802653a: 6d5b ldr r3, [r3, #84] ; 0x54 - 802653c: f043 0210 orr.w r2, r3, #16 - 8026540: 687b ldr r3, [r7, #4] - 8026542: 655a str r2, [r3, #84] ; 0x54 + 8026568: 687b ldr r3, [r7, #4] + 802656a: 6d5b ldr r3, [r3, #84] ; 0x54 + 802656c: f043 0210 orr.w r2, r3, #16 + 8026570: 687b ldr r3, [r7, #4] + 8026572: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8026544: 687b ldr r3, [r7, #4] - 8026546: 6d9b ldr r3, [r3, #88] ; 0x58 - 8026548: f043 0201 orr.w r2, r3, #1 - 802654c: 687b ldr r3, [r7, #4] - 802654e: 659a str r2, [r3, #88] ; 0x58 + 8026574: 687b ldr r3, [r7, #4] + 8026576: 6d9b ldr r3, [r3, #88] ; 0x58 + 8026578: f043 0201 orr.w r2, r3, #1 + 802657c: 687b ldr r3, [r7, #4] + 802657e: 659a str r2, [r3, #88] ; 0x58 tmp_hal_status = HAL_ERROR; - 8026550: 2301 movs r3, #1 - 8026552: 77fb strb r3, [r7, #31] + 8026580: 2301 movs r3, #1 + 8026582: 77fb strb r3, [r7, #31] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed and if there is no conversion on going on regular */ /* group (ADC may already be enabled at this point if HAL_ADC_Init() is */ /* called to update a parameter on the fly). */ tmp_adc_reg_is_conversion_on_going = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 8026554: 687b ldr r3, [r7, #4] - 8026556: 681b ldr r3, [r3, #0] - 8026558: 4618 mov r0, r3 - 802655a: f7ff ff61 bl 8026420 - 802655e: 6178 str r0, [r7, #20] + 8026584: 687b ldr r3, [r7, #4] + 8026586: 681b ldr r3, [r3, #0] + 8026588: 4618 mov r0, r3 + 802658a: f7ff ff61 bl 8026450 + 802658e: 6178 str r0, [r7, #20] if (((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL) - 8026560: 687b ldr r3, [r7, #4] - 8026562: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026564: f003 0310 and.w r3, r3, #16 - 8026568: 2b00 cmp r3, #0 - 802656a: f040 8129 bne.w 80267c0 + 8026590: 687b ldr r3, [r7, #4] + 8026592: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026594: f003 0310 and.w r3, r3, #16 + 8026598: 2b00 cmp r3, #0 + 802659a: f040 8129 bne.w 80267f0 && (tmp_adc_reg_is_conversion_on_going == 0UL) - 802656e: 697b ldr r3, [r7, #20] - 8026570: 2b00 cmp r3, #0 - 8026572: f040 8125 bne.w 80267c0 + 802659e: 697b ldr r3, [r7, #20] + 80265a0: 2b00 cmp r3, #0 + 80265a2: f040 8125 bne.w 80267f0 ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8026576: 687b ldr r3, [r7, #4] - 8026578: 6d5b ldr r3, [r3, #84] ; 0x54 - 802657a: f423 7381 bic.w r3, r3, #258 ; 0x102 - 802657e: f043 0202 orr.w r2, r3, #2 - 8026582: 687b ldr r3, [r7, #4] - 8026584: 655a str r2, [r3, #84] ; 0x54 + 80265a6: 687b ldr r3, [r7, #4] + 80265a8: 6d5b ldr r3, [r3, #84] ; 0x54 + 80265aa: f423 7381 bic.w r3, r3, #258 ; 0x102 + 80265ae: f043 0202 orr.w r2, r3, #2 + 80265b2: 687b ldr r3, [r7, #4] + 80265b4: 655a str r2, [r3, #84] ; 0x54 /* Configuration of common ADC parameters */ /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated only when ADC is disabled: */ /* - clock configuration */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 8026586: 687b ldr r3, [r7, #4] - 8026588: 681b ldr r3, [r3, #0] - 802658a: 4618 mov r0, r3 - 802658c: f7ff fefa bl 8026384 - 8026590: 4603 mov r3, r0 - 8026592: 2b00 cmp r3, #0 - 8026594: d136 bne.n 8026604 + 80265b6: 687b ldr r3, [r7, #4] + 80265b8: 681b ldr r3, [r3, #0] + 80265ba: 4618 mov r0, r3 + 80265bc: f7ff fefa bl 80263b4 + 80265c0: 4603 mov r3, r0 + 80265c2: 2b00 cmp r3, #0 + 80265c4: d136 bne.n 8026634 { if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) - 8026596: 687b ldr r3, [r7, #4] - 8026598: 681b ldr r3, [r3, #0] - 802659a: 4a65 ldr r2, [pc, #404] ; (8026730 ) - 802659c: 4293 cmp r3, r2 - 802659e: d004 beq.n 80265aa - 80265a0: 687b ldr r3, [r7, #4] - 80265a2: 681b ldr r3, [r3, #0] - 80265a4: 4a63 ldr r2, [pc, #396] ; (8026734 ) - 80265a6: 4293 cmp r3, r2 - 80265a8: d10e bne.n 80265c8 - 80265aa: 4861 ldr r0, [pc, #388] ; (8026730 ) - 80265ac: f7ff feea bl 8026384 - 80265b0: 4604 mov r4, r0 - 80265b2: 4860 ldr r0, [pc, #384] ; (8026734 ) - 80265b4: f7ff fee6 bl 8026384 - 80265b8: 4603 mov r3, r0 - 80265ba: 4323 orrs r3, r4 - 80265bc: 2b00 cmp r3, #0 - 80265be: bf0c ite eq - 80265c0: 2301 moveq r3, #1 - 80265c2: 2300 movne r3, #0 - 80265c4: b2db uxtb r3, r3 - 80265c6: e008 b.n 80265da - 80265c8: 485b ldr r0, [pc, #364] ; (8026738 ) - 80265ca: f7ff fedb bl 8026384 - 80265ce: 4603 mov r3, r0 - 80265d0: 2b00 cmp r3, #0 - 80265d2: bf0c ite eq - 80265d4: 2301 moveq r3, #1 - 80265d6: 2300 movne r3, #0 - 80265d8: b2db uxtb r3, r3 - 80265da: 2b00 cmp r3, #0 - 80265dc: d012 beq.n 8026604 + 80265c6: 687b ldr r3, [r7, #4] + 80265c8: 681b ldr r3, [r3, #0] + 80265ca: 4a65 ldr r2, [pc, #404] ; (8026760 ) + 80265cc: 4293 cmp r3, r2 + 80265ce: d004 beq.n 80265da + 80265d0: 687b ldr r3, [r7, #4] + 80265d2: 681b ldr r3, [r3, #0] + 80265d4: 4a63 ldr r2, [pc, #396] ; (8026764 ) + 80265d6: 4293 cmp r3, r2 + 80265d8: d10e bne.n 80265f8 + 80265da: 4861 ldr r0, [pc, #388] ; (8026760 ) + 80265dc: f7ff feea bl 80263b4 + 80265e0: 4604 mov r4, r0 + 80265e2: 4860 ldr r0, [pc, #384] ; (8026764 ) + 80265e4: f7ff fee6 bl 80263b4 + 80265e8: 4603 mov r3, r0 + 80265ea: 4323 orrs r3, r4 + 80265ec: 2b00 cmp r3, #0 + 80265ee: bf0c ite eq + 80265f0: 2301 moveq r3, #1 + 80265f2: 2300 movne r3, #0 + 80265f4: b2db uxtb r3, r3 + 80265f6: e008 b.n 802660a + 80265f8: 485b ldr r0, [pc, #364] ; (8026768 ) + 80265fa: f7ff fedb bl 80263b4 + 80265fe: 4603 mov r3, r0 + 8026600: 2b00 cmp r3, #0 + 8026602: bf0c ite eq + 8026604: 2301 moveq r3, #1 + 8026606: 2300 movne r3, #0 + 8026608: b2db uxtb r3, r3 + 802660a: 2b00 cmp r3, #0 + 802660c: d012 beq.n 8026634 /* parameters: MDMA, DMACFG, DELAY, DUAL (set by API */ /* HAL_ADCEx_MultiModeConfigChannel() ) */ /* - internal measurement paths: Vbat, temperature sensor, Vref */ /* (set into HAL_ADC_ConfigChannel() or */ /* HAL_ADCEx_InjectedConfigChannel() ) */ LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(hadc->Instance), hadc->Init.ClockPrescaler); - 80265de: 687b ldr r3, [r7, #4] - 80265e0: 681b ldr r3, [r3, #0] - 80265e2: 4a53 ldr r2, [pc, #332] ; (8026730 ) - 80265e4: 4293 cmp r3, r2 - 80265e6: d004 beq.n 80265f2 - 80265e8: 687b ldr r3, [r7, #4] - 80265ea: 681b ldr r3, [r3, #0] - 80265ec: 4a51 ldr r2, [pc, #324] ; (8026734 ) - 80265ee: 4293 cmp r3, r2 - 80265f0: d101 bne.n 80265f6 - 80265f2: 4a52 ldr r2, [pc, #328] ; (802673c ) - 80265f4: e000 b.n 80265f8 - 80265f6: 4a52 ldr r2, [pc, #328] ; (8026740 ) - 80265f8: 687b ldr r3, [r7, #4] - 80265fa: 685b ldr r3, [r3, #4] - 80265fc: 4619 mov r1, r3 - 80265fe: 4610 mov r0, r2 - 8026600: f7ff fd18 bl 8026034 + 802660e: 687b ldr r3, [r7, #4] + 8026610: 681b ldr r3, [r3, #0] + 8026612: 4a53 ldr r2, [pc, #332] ; (8026760 ) + 8026614: 4293 cmp r3, r2 + 8026616: d004 beq.n 8026622 + 8026618: 687b ldr r3, [r7, #4] + 802661a: 681b ldr r3, [r3, #0] + 802661c: 4a51 ldr r2, [pc, #324] ; (8026764 ) + 802661e: 4293 cmp r3, r2 + 8026620: d101 bne.n 8026626 + 8026622: 4a52 ldr r2, [pc, #328] ; (802676c ) + 8026624: e000 b.n 8026628 + 8026626: 4a52 ldr r2, [pc, #328] ; (8026770 ) + 8026628: 687b ldr r3, [r7, #4] + 802662a: 685b ldr r3, [r3, #4] + 802662c: 4619 mov r1, r3 + 802662e: 4610 mov r0, r2 + 8026630: f7ff fd18 bl 8026064 ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode)); } #else if ((HAL_GetREVID() > REV_ID_Y) && (ADC_RESOLUTION_8B == hadc->Init.Resolution)) - 8026604: f7ff fcf6 bl 8025ff4 - 8026608: 4603 mov r3, r0 - 802660a: f241 0203 movw r2, #4099 ; 0x1003 - 802660e: 4293 cmp r3, r2 - 8026610: d914 bls.n 802663c - 8026612: 687b ldr r3, [r7, #4] - 8026614: 689b ldr r3, [r3, #8] - 8026616: 2b10 cmp r3, #16 - 8026618: d110 bne.n 802663c + 8026634: f7ff fcf6 bl 8026024 + 8026638: 4603 mov r3, r0 + 802663a: f241 0203 movw r2, #4099 ; 0x1003 + 802663e: 4293 cmp r3, r2 + 8026640: d914 bls.n 802666c + 8026642: 687b ldr r3, [r7, #4] + 8026644: 689b ldr r3, [r3, #8] + 8026646: 2b10 cmp r3, #16 + 8026648: d110 bne.n 802666c { /* for STM32H7 silicon rev.B and above , ADC_CFGR_RES value for 8bits resolution is : b111 */ tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 802661a: 687b ldr r3, [r7, #4] - 802661c: 7d5b ldrb r3, [r3, #21] - 802661e: 035a lsls r2, r3, #13 + 802664a: 687b ldr r3, [r7, #4] + 802664c: 7d5b ldrb r3, [r3, #21] + 802664e: 035a lsls r2, r3, #13 hadc->Init.Overrun | - 8026620: 687b ldr r3, [r7, #4] - 8026622: 6b1b ldr r3, [r3, #48] ; 0x30 + 8026650: 687b ldr r3, [r7, #4] + 8026652: 6b1b ldr r3, [r3, #48] ; 0x30 tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8026624: 431a orrs r2, r3 + 8026654: 431a orrs r2, r3 hadc->Init.Resolution | (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) | - 8026626: 687b ldr r3, [r7, #4] - 8026628: 689b ldr r3, [r3, #8] + 8026656: 687b ldr r3, [r7, #4] + 8026658: 689b ldr r3, [r3, #8] hadc->Init.Overrun | - 802662a: 431a orrs r2, r3 + 802665a: 431a orrs r2, r3 ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode)); - 802662c: 687b ldr r3, [r7, #4] - 802662e: 7f1b ldrb r3, [r3, #28] - 8026630: 041b lsls r3, r3, #16 + 802665c: 687b ldr r3, [r7, #4] + 802665e: 7f1b ldrb r3, [r3, #28] + 8026660: 041b lsls r3, r3, #16 hadc->Init.Resolution | (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) | - 8026632: 4313 orrs r3, r2 + 8026662: 4313 orrs r3, r2 tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8026634: f043 030c orr.w r3, r3, #12 - 8026638: 61bb str r3, [r7, #24] - 802663a: e00d b.n 8026658 + 8026664: f043 030c orr.w r3, r3, #12 + 8026668: 61bb str r3, [r7, #24] + 802666a: e00d b.n 8026688 } else { tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 802663c: 687b ldr r3, [r7, #4] - 802663e: 7d5b ldrb r3, [r3, #21] - 8026640: 035a lsls r2, r3, #13 + 802666c: 687b ldr r3, [r7, #4] + 802666e: 7d5b ldrb r3, [r3, #21] + 8026670: 035a lsls r2, r3, #13 hadc->Init.Overrun | - 8026642: 687b ldr r3, [r7, #4] - 8026644: 6b1b ldr r3, [r3, #48] ; 0x30 + 8026672: 687b ldr r3, [r7, #4] + 8026674: 6b1b ldr r3, [r3, #48] ; 0x30 tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8026646: 431a orrs r2, r3 + 8026676: 431a orrs r2, r3 hadc->Init.Resolution | - 8026648: 687b ldr r3, [r7, #4] - 802664a: 689b ldr r3, [r3, #8] + 8026678: 687b ldr r3, [r7, #4] + 802667a: 689b ldr r3, [r3, #8] hadc->Init.Overrun | - 802664c: 431a orrs r2, r3 + 802667c: 431a orrs r2, r3 ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode)); - 802664e: 687b ldr r3, [r7, #4] - 8026650: 7f1b ldrb r3, [r3, #28] - 8026652: 041b lsls r3, r3, #16 + 802667e: 687b ldr r3, [r7, #4] + 8026680: 7f1b ldrb r3, [r3, #28] + 8026682: 041b lsls r3, r3, #16 tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8026654: 4313 orrs r3, r2 - 8026656: 61bb str r3, [r7, #24] + 8026684: 4313 orrs r3, r2 + 8026686: 61bb str r3, [r7, #24] } #endif /* ADC_VER_V5_3 */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 8026658: 687b ldr r3, [r7, #4] - 802665a: 7f1b ldrb r3, [r3, #28] - 802665c: 2b01 cmp r3, #1 - 802665e: d106 bne.n 802666e + 8026688: 687b ldr r3, [r7, #4] + 802668a: 7f1b ldrb r3, [r3, #28] + 802668c: 2b01 cmp r3, #1 + 802668e: d106 bne.n 802669e { tmpCFGR |= ADC_CFGR_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion); - 8026660: 687b ldr r3, [r7, #4] - 8026662: 6a1b ldr r3, [r3, #32] - 8026664: 3b01 subs r3, #1 - 8026666: 045b lsls r3, r3, #17 - 8026668: 69ba ldr r2, [r7, #24] - 802666a: 4313 orrs r3, r2 - 802666c: 61bb str r3, [r7, #24] + 8026690: 687b ldr r3, [r7, #4] + 8026692: 6a1b ldr r3, [r3, #32] + 8026694: 3b01 subs r3, #1 + 8026696: 045b lsls r3, r3, #17 + 8026698: 69ba ldr r2, [r7, #24] + 802669a: 4313 orrs r3, r2 + 802669c: 61bb str r3, [r7, #24] /* Enable external trigger if trigger selection is different of software */ /* start. */ /* Note: This configuration keeps the hardware feature of parameter */ /* ExternalTrigConvEdge "trigger edge none" equivalent to */ /* software start. */ if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) - 802666e: 687b ldr r3, [r7, #4] - 8026670: 6a5b ldr r3, [r3, #36] ; 0x24 - 8026672: 2b00 cmp r3, #0 - 8026674: d009 beq.n 802668a + 802669e: 687b ldr r3, [r7, #4] + 80266a0: 6a5b ldr r3, [r3, #36] ; 0x24 + 80266a2: 2b00 cmp r3, #0 + 80266a4: d009 beq.n 80266ba { tmpCFGR |= ((hadc->Init.ExternalTrigConv & ADC_CFGR_EXTSEL) - 8026676: 687b ldr r3, [r7, #4] - 8026678: 6a5b ldr r3, [r3, #36] ; 0x24 - 802667a: f403 7278 and.w r2, r3, #992 ; 0x3e0 + 80266a6: 687b ldr r3, [r7, #4] + 80266a8: 6a5b ldr r3, [r3, #36] ; 0x24 + 80266aa: f403 7278 and.w r2, r3, #992 ; 0x3e0 | hadc->Init.ExternalTrigConvEdge - 802667e: 687b ldr r3, [r7, #4] - 8026680: 6a9b ldr r3, [r3, #40] ; 0x28 - 8026682: 4313 orrs r3, r2 + 80266ae: 687b ldr r3, [r7, #4] + 80266b0: 6a9b ldr r3, [r3, #40] ; 0x28 + 80266b2: 4313 orrs r3, r2 tmpCFGR |= ((hadc->Init.ExternalTrigConv & ADC_CFGR_EXTSEL) - 8026684: 69ba ldr r2, [r7, #24] - 8026686: 4313 orrs r3, r2 - 8026688: 61bb str r3, [r7, #24] + 80266b4: 69ba ldr r2, [r7, #24] + 80266b6: 4313 orrs r3, r2 + 80266b8: 61bb str r3, [r7, #24] /* Update Configuration Register CFGR */ MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_1, tmpCFGR); } #else /* Update Configuration Register CFGR */ MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_1, tmpCFGR); - 802668a: 687b ldr r3, [r7, #4] - 802668c: 681b ldr r3, [r3, #0] - 802668e: 68da ldr r2, [r3, #12] - 8026690: 4b2c ldr r3, [pc, #176] ; (8026744 ) - 8026692: 4013 ands r3, r2 - 8026694: 687a ldr r2, [r7, #4] - 8026696: 6812 ldr r2, [r2, #0] - 8026698: 69b9 ldr r1, [r7, #24] - 802669a: 430b orrs r3, r1 - 802669c: 60d3 str r3, [r2, #12] + 80266ba: 687b ldr r3, [r7, #4] + 80266bc: 681b ldr r3, [r3, #0] + 80266be: 68da ldr r2, [r3, #12] + 80266c0: 4b2c ldr r3, [pc, #176] ; (8026774 ) + 80266c2: 4013 ands r3, r2 + 80266c4: 687a ldr r2, [r7, #4] + 80266c6: 6812 ldr r2, [r2, #0] + 80266c8: 69b9 ldr r1, [r7, #24] + 80266ca: 430b orrs r3, r1 + 80266cc: 60d3 str r3, [r2, #12] /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular and injected groups: */ /* - Conversion data management Init.ConversionDataManagement */ /* - LowPowerAutoWait feature Init.LowPowerAutoWait */ /* - Oversampling parameters Init.Oversampling */ tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 802669e: 687b ldr r3, [r7, #4] - 80266a0: 681b ldr r3, [r3, #0] - 80266a2: 4618 mov r0, r3 - 80266a4: f7ff febc bl 8026420 - 80266a8: 6138 str r0, [r7, #16] + 80266ce: 687b ldr r3, [r7, #4] + 80266d0: 681b ldr r3, [r3, #0] + 80266d2: 4618 mov r0, r3 + 80266d4: f7ff febc bl 8026450 + 80266d8: 6138 str r0, [r7, #16] tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); - 80266aa: 687b ldr r3, [r7, #4] - 80266ac: 681b ldr r3, [r3, #0] - 80266ae: 4618 mov r0, r3 - 80266b0: f7ff fede bl 8026470 - 80266b4: 60f8 str r0, [r7, #12] + 80266da: 687b ldr r3, [r7, #4] + 80266dc: 681b ldr r3, [r3, #0] + 80266de: 4618 mov r0, r3 + 80266e0: f7ff fede bl 80264a0 + 80266e4: 60f8 str r0, [r7, #12] if ((tmp_adc_is_conversion_on_going_regular == 0UL) - 80266b6: 693b ldr r3, [r7, #16] - 80266b8: 2b00 cmp r3, #0 - 80266ba: d15f bne.n 802677c + 80266e6: 693b ldr r3, [r7, #16] + 80266e8: 2b00 cmp r3, #0 + 80266ea: d15f bne.n 80267ac && (tmp_adc_is_conversion_on_going_injected == 0UL) - 80266bc: 68fb ldr r3, [r7, #12] - 80266be: 2b00 cmp r3, #0 - 80266c0: d15c bne.n 802677c + 80266ec: 68fb ldr r3, [r7, #12] + 80266ee: 2b00 cmp r3, #0 + 80266f0: d15c bne.n 80267ac ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.ConversionDataManagement)); } #else tmpCFGR = ( ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | - 80266c2: 687b ldr r3, [r7, #4] - 80266c4: 7d1b ldrb r3, [r3, #20] - 80266c6: 039a lsls r2, r3, #14 + 80266f2: 687b ldr r3, [r7, #4] + 80266f4: 7d1b ldrb r3, [r3, #20] + 80266f6: 039a lsls r2, r3, #14 ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.ConversionDataManagement)); - 80266c8: 687b ldr r3, [r7, #4] - 80266ca: 6adb ldr r3, [r3, #44] ; 0x2c + 80266f8: 687b ldr r3, [r7, #4] + 80266fa: 6adb ldr r3, [r3, #44] ; 0x2c tmpCFGR = ( - 80266cc: 4313 orrs r3, r2 - 80266ce: 61bb str r3, [r7, #24] + 80266fc: 4313 orrs r3, r2 + 80266fe: 61bb str r3, [r7, #24] #endif MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_2, tmpCFGR); - 80266d0: 687b ldr r3, [r7, #4] - 80266d2: 681b ldr r3, [r3, #0] - 80266d4: 68da ldr r2, [r3, #12] - 80266d6: 4b1c ldr r3, [pc, #112] ; (8026748 ) - 80266d8: 4013 ands r3, r2 - 80266da: 687a ldr r2, [r7, #4] - 80266dc: 6812 ldr r2, [r2, #0] - 80266de: 69b9 ldr r1, [r7, #24] - 80266e0: 430b orrs r3, r1 - 80266e2: 60d3 str r3, [r2, #12] + 8026700: 687b ldr r3, [r7, #4] + 8026702: 681b ldr r3, [r3, #0] + 8026704: 68da ldr r2, [r3, #12] + 8026706: 4b1c ldr r3, [pc, #112] ; (8026778 ) + 8026708: 4013 ands r3, r2 + 802670a: 687a ldr r2, [r7, #4] + 802670c: 6812 ldr r2, [r2, #0] + 802670e: 69b9 ldr r1, [r7, #24] + 8026710: 430b orrs r3, r1 + 8026712: 60d3 str r3, [r2, #12] if (hadc->Init.OversamplingMode == ENABLE) - 80266e4: 687b ldr r3, [r7, #4] - 80266e6: f893 3038 ldrb.w r3, [r3, #56] ; 0x38 - 80266ea: 2b01 cmp r3, #1 - 80266ec: d130 bne.n 8026750 + 8026714: 687b ldr r3, [r7, #4] + 8026716: f893 3038 ldrb.w r3, [r3, #56] ; 0x38 + 802671a: 2b01 cmp r3, #1 + 802671c: d130 bne.n 8026780 #endif assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversampling.RightBitShift)); assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversampling.TriggeredMode)); assert_param(IS_ADC_REGOVERSAMPLING_MODE(hadc->Init.Oversampling.OversamplingStopReset)); if ((hadc->Init.ExternalTrigConv == ADC_SOFTWARE_START) - 80266ee: 687b ldr r3, [r7, #4] - 80266f0: 6a5b ldr r3, [r3, #36] ; 0x24 - 80266f2: 2b00 cmp r3, #0 + 802671e: 687b ldr r3, [r7, #4] + 8026720: 6a5b ldr r3, [r3, #36] ; 0x24 + 8026722: 2b00 cmp r3, #0 /* - Oversampling Ratio */ /* - Right bit shift */ /* - Left bit shift */ /* - Triggered mode */ /* - Oversampling mode (continued/resumed) */ MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_FIELDS, - 80266f4: 687b ldr r3, [r7, #4] - 80266f6: 681b ldr r3, [r3, #0] - 80266f8: 691a ldr r2, [r3, #16] - 80266fa: 4b14 ldr r3, [pc, #80] ; (802674c ) - 80266fc: 4013 ands r3, r2 - 80266fe: 687a ldr r2, [r7, #4] - 8026700: 6bd2 ldr r2, [r2, #60] ; 0x3c - 8026702: 3a01 subs r2, #1 - 8026704: 0411 lsls r1, r2, #16 - 8026706: 687a ldr r2, [r7, #4] - 8026708: 6c12 ldr r2, [r2, #64] ; 0x40 - 802670a: 4311 orrs r1, r2 - 802670c: 687a ldr r2, [r7, #4] - 802670e: 6c52 ldr r2, [r2, #68] ; 0x44 - 8026710: 4311 orrs r1, r2 - 8026712: 687a ldr r2, [r7, #4] - 8026714: 6c92 ldr r2, [r2, #72] ; 0x48 - 8026716: 430a orrs r2, r1 - 8026718: 431a orrs r2, r3 - 802671a: 687b ldr r3, [r7, #4] - 802671c: 681b ldr r3, [r3, #0] - 802671e: f042 0201 orr.w r2, r2, #1 - 8026722: 611a str r2, [r3, #16] - 8026724: e01c b.n 8026760 - 8026726: bf00 nop - 8026728: 24000048 .word 0x24000048 - 802672c: 053e2d63 .word 0x053e2d63 - 8026730: 40022000 .word 0x40022000 - 8026734: 40022100 .word 0x40022100 - 8026738: 58026000 .word 0x58026000 - 802673c: 40022300 .word 0x40022300 - 8026740: 58026300 .word 0x58026300 - 8026744: fff0c003 .word 0xfff0c003 - 8026748: ffffbffc .word 0xffffbffc - 802674c: fc00f81e .word 0xfc00f81e + 8026724: 687b ldr r3, [r7, #4] + 8026726: 681b ldr r3, [r3, #0] + 8026728: 691a ldr r2, [r3, #16] + 802672a: 4b14 ldr r3, [pc, #80] ; (802677c ) + 802672c: 4013 ands r3, r2 + 802672e: 687a ldr r2, [r7, #4] + 8026730: 6bd2 ldr r2, [r2, #60] ; 0x3c + 8026732: 3a01 subs r2, #1 + 8026734: 0411 lsls r1, r2, #16 + 8026736: 687a ldr r2, [r7, #4] + 8026738: 6c12 ldr r2, [r2, #64] ; 0x40 + 802673a: 4311 orrs r1, r2 + 802673c: 687a ldr r2, [r7, #4] + 802673e: 6c52 ldr r2, [r2, #68] ; 0x44 + 8026740: 4311 orrs r1, r2 + 8026742: 687a ldr r2, [r7, #4] + 8026744: 6c92 ldr r2, [r2, #72] ; 0x48 + 8026746: 430a orrs r2, r1 + 8026748: 431a orrs r2, r3 + 802674a: 687b ldr r3, [r7, #4] + 802674c: 681b ldr r3, [r3, #0] + 802674e: f042 0201 orr.w r2, r2, #1 + 8026752: 611a str r2, [r3, #16] + 8026754: e01c b.n 8026790 + 8026756: bf00 nop + 8026758: 24000048 .word 0x24000048 + 802675c: 053e2d63 .word 0x053e2d63 + 8026760: 40022000 .word 0x40022000 + 8026764: 40022100 .word 0x40022100 + 8026768: 58026000 .word 0x58026000 + 802676c: 40022300 .word 0x40022300 + 8026770: 58026300 .word 0x58026300 + 8026774: fff0c003 .word 0xfff0c003 + 8026778: ffffbffc .word 0xffffbffc + 802677c: fc00f81e .word 0xfc00f81e } else { /* Disable ADC oversampling scope on ADC group regular */ CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE); - 8026750: 687b ldr r3, [r7, #4] - 8026752: 681b ldr r3, [r3, #0] - 8026754: 691a ldr r2, [r3, #16] - 8026756: 687b ldr r3, [r7, #4] - 8026758: 681b ldr r3, [r3, #0] - 802675a: f022 0201 bic.w r2, r2, #1 - 802675e: 611a str r2, [r3, #16] + 8026780: 687b ldr r3, [r7, #4] + 8026782: 681b ldr r3, [r3, #0] + 8026784: 691a ldr r2, [r3, #16] + 8026786: 687b ldr r3, [r7, #4] + 8026788: 681b ldr r3, [r3, #0] + 802678a: f022 0201 bic.w r2, r2, #1 + 802678e: 611a str r2, [r3, #16] } /* Set the LeftShift parameter: it is applied to the final result with or without oversampling */ MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_LSHIFT, hadc->Init.LeftBitShift); - 8026760: 687b ldr r3, [r7, #4] - 8026762: 681b ldr r3, [r3, #0] - 8026764: 691b ldr r3, [r3, #16] - 8026766: f023 4170 bic.w r1, r3, #4026531840 ; 0xf0000000 - 802676a: 687b ldr r3, [r7, #4] - 802676c: 6b5a ldr r2, [r3, #52] ; 0x34 - 802676e: 687b ldr r3, [r7, #4] - 8026770: 681b ldr r3, [r3, #0] - 8026772: 430a orrs r2, r1 - 8026774: 611a str r2, [r3, #16] + 8026790: 687b ldr r3, [r7, #4] + 8026792: 681b ldr r3, [r3, #0] + 8026794: 691b ldr r3, [r3, #16] + 8026796: f023 4170 bic.w r1, r3, #4026531840 ; 0xf0000000 + 802679a: 687b ldr r3, [r7, #4] + 802679c: 6b5a ldr r2, [r3, #52] ; 0x34 + 802679e: 687b ldr r3, [r7, #4] + 80267a0: 681b ldr r3, [r3, #0] + 80267a2: 430a orrs r2, r1 + 80267a4: 611a str r2, [r3, #16] /* Configure the BOOST Mode */ ADC_ConfigureBoostMode(hadc); } #else /* Configure the BOOST Mode */ ADC_ConfigureBoostMode(hadc); - 8026776: 6878 ldr r0, [r7, #4] - 8026778: f000 ff26 bl 80275c8 + 80267a6: 6878 ldr r0, [r7, #4] + 80267a8: f000 ff26 bl 80275f8 /* Note: Scan mode is not present by hardware on this device, but */ /* emulated by software for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion". */ if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE) - 802677c: 687b ldr r3, [r7, #4] - 802677e: 68db ldr r3, [r3, #12] - 8026780: 2b01 cmp r3, #1 - 8026782: d10c bne.n 802679e + 80267ac: 687b ldr r3, [r7, #4] + 80267ae: 68db ldr r3, [r3, #12] + 80267b0: 2b01 cmp r3, #1 + 80267b2: d10c bne.n 80267ce { /* Set number of ranks in regular group sequencer */ MODIFY_REG(hadc->Instance->SQR1, ADC_SQR1_L, (hadc->Init.NbrOfConversion - (uint8_t)1)); - 8026784: 687b ldr r3, [r7, #4] - 8026786: 681b ldr r3, [r3, #0] - 8026788: 6b1b ldr r3, [r3, #48] ; 0x30 - 802678a: f023 010f bic.w r1, r3, #15 - 802678e: 687b ldr r3, [r7, #4] - 8026790: 699b ldr r3, [r3, #24] - 8026792: 1e5a subs r2, r3, #1 - 8026794: 687b ldr r3, [r7, #4] - 8026796: 681b ldr r3, [r3, #0] - 8026798: 430a orrs r2, r1 - 802679a: 631a str r2, [r3, #48] ; 0x30 - 802679c: e007 b.n 80267ae + 80267b4: 687b ldr r3, [r7, #4] + 80267b6: 681b ldr r3, [r3, #0] + 80267b8: 6b1b ldr r3, [r3, #48] ; 0x30 + 80267ba: f023 010f bic.w r1, r3, #15 + 80267be: 687b ldr r3, [r7, #4] + 80267c0: 699b ldr r3, [r3, #24] + 80267c2: 1e5a subs r2, r3, #1 + 80267c4: 687b ldr r3, [r7, #4] + 80267c6: 681b ldr r3, [r3, #0] + 80267c8: 430a orrs r2, r1 + 80267ca: 631a str r2, [r3, #48] ; 0x30 + 80267cc: e007 b.n 80267de } else { CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L); - 802679e: 687b ldr r3, [r7, #4] - 80267a0: 681b ldr r3, [r3, #0] - 80267a2: 6b1a ldr r2, [r3, #48] ; 0x30 - 80267a4: 687b ldr r3, [r7, #4] - 80267a6: 681b ldr r3, [r3, #0] - 80267a8: f022 020f bic.w r2, r2, #15 - 80267ac: 631a str r2, [r3, #48] ; 0x30 + 80267ce: 687b ldr r3, [r7, #4] + 80267d0: 681b ldr r3, [r3, #0] + 80267d2: 6b1a ldr r2, [r3, #48] ; 0x30 + 80267d4: 687b ldr r3, [r7, #4] + 80267d6: 681b ldr r3, [r3, #0] + 80267d8: f022 020f bic.w r2, r2, #15 + 80267dc: 631a str r2, [r3, #48] ; 0x30 } /* Initialize the ADC state */ /* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_READY bit */ ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); - 80267ae: 687b ldr r3, [r7, #4] - 80267b0: 6d5b ldr r3, [r3, #84] ; 0x54 - 80267b2: f023 0303 bic.w r3, r3, #3 - 80267b6: f043 0201 orr.w r2, r3, #1 - 80267ba: 687b ldr r3, [r7, #4] - 80267bc: 655a str r2, [r3, #84] ; 0x54 - 80267be: e007 b.n 80267d0 + 80267de: 687b ldr r3, [r7, #4] + 80267e0: 6d5b ldr r3, [r3, #84] ; 0x54 + 80267e2: f023 0303 bic.w r3, r3, #3 + 80267e6: f043 0201 orr.w r2, r3, #1 + 80267ea: 687b ldr r3, [r7, #4] + 80267ec: 655a str r2, [r3, #84] ; 0x54 + 80267ee: e007 b.n 8026800 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80267c0: 687b ldr r3, [r7, #4] - 80267c2: 6d5b ldr r3, [r3, #84] ; 0x54 - 80267c4: f043 0210 orr.w r2, r3, #16 - 80267c8: 687b ldr r3, [r7, #4] - 80267ca: 655a str r2, [r3, #84] ; 0x54 + 80267f0: 687b ldr r3, [r7, #4] + 80267f2: 6d5b ldr r3, [r3, #84] ; 0x54 + 80267f4: f043 0210 orr.w r2, r3, #16 + 80267f8: 687b ldr r3, [r7, #4] + 80267fa: 655a str r2, [r3, #84] ; 0x54 tmp_hal_status = HAL_ERROR; - 80267cc: 2301 movs r3, #1 - 80267ce: 77fb strb r3, [r7, #31] + 80267fc: 2301 movs r3, #1 + 80267fe: 77fb strb r3, [r7, #31] } /* Return function status */ return tmp_hal_status; - 80267d0: 7ffb ldrb r3, [r7, #31] + 8026800: 7ffb ldrb r3, [r7, #31] } - 80267d2: 4618 mov r0, r3 - 80267d4: 3724 adds r7, #36 ; 0x24 - 80267d6: 46bd mov sp, r7 - 80267d8: bd90 pop {r4, r7, pc} - 80267da: bf00 nop + 8026802: 4618 mov r0, r3 + 8026804: 3724 adds r7, #36 ; 0x24 + 8026806: 46bd mov sp, r7 + 8026808: bd90 pop {r4, r7, pc} + 802680a: bf00 nop -080267dc : +0802680c : * if ADC is master, ADC is enabled and multimode conversion is started. * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef *hadc) { - 80267dc: b580 push {r7, lr} - 80267de: b086 sub sp, #24 - 80267e0: af00 add r7, sp, #0 - 80267e2: 6078 str r0, [r7, #4] + 802680c: b580 push {r7, lr} + 802680e: b086 sub sp, #24 + 8026810: af00 add r7, sp, #0 + 8026812: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status; const ADC_TypeDef *tmpADC_Master; uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 80267e4: 687b ldr r3, [r7, #4] - 80267e6: 681b ldr r3, [r3, #0] - 80267e8: 4a5c ldr r2, [pc, #368] ; (802695c ) - 80267ea: 4293 cmp r3, r2 - 80267ec: d004 beq.n 80267f8 - 80267ee: 687b ldr r3, [r7, #4] - 80267f0: 681b ldr r3, [r3, #0] - 80267f2: 4a5b ldr r2, [pc, #364] ; (8026960 ) - 80267f4: 4293 cmp r3, r2 - 80267f6: d101 bne.n 80267fc - 80267f8: 4b5a ldr r3, [pc, #360] ; (8026964 ) - 80267fa: e000 b.n 80267fe - 80267fc: 4b5a ldr r3, [pc, #360] ; (8026968 ) - 80267fe: 4618 mov r0, r3 - 8026800: f7ff fd2e bl 8026260 - 8026804: 6138 str r0, [r7, #16] + 8026814: 687b ldr r3, [r7, #4] + 8026816: 681b ldr r3, [r3, #0] + 8026818: 4a5c ldr r2, [pc, #368] ; (802698c ) + 802681a: 4293 cmp r3, r2 + 802681c: d004 beq.n 8026828 + 802681e: 687b ldr r3, [r7, #4] + 8026820: 681b ldr r3, [r3, #0] + 8026822: 4a5b ldr r2, [pc, #364] ; (8026990 ) + 8026824: 4293 cmp r3, r2 + 8026826: d101 bne.n 802682c + 8026828: 4b5a ldr r3, [pc, #360] ; (8026994 ) + 802682a: e000 b.n 802682e + 802682c: 4b5a ldr r3, [pc, #360] ; (8026998 ) + 802682e: 4618 mov r0, r3 + 8026830: f7ff fd2e bl 8026290 + 8026834: 6138 str r0, [r7, #16] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Perform ADC enable and conversion start if no conversion is on going */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) - 8026806: 687b ldr r3, [r7, #4] - 8026808: 681b ldr r3, [r3, #0] - 802680a: 4618 mov r0, r3 - 802680c: f7ff fe08 bl 8026420 - 8026810: 4603 mov r3, r0 - 8026812: 2b00 cmp r3, #0 - 8026814: f040 809a bne.w 802694c + 8026836: 687b ldr r3, [r7, #4] + 8026838: 681b ldr r3, [r3, #0] + 802683a: 4618 mov r0, r3 + 802683c: f7ff fe08 bl 8026450 + 8026840: 4603 mov r3, r0 + 8026842: 2b00 cmp r3, #0 + 8026844: f040 809a bne.w 802697c { /* Process locked */ __HAL_LOCK(hadc); - 8026818: 687b ldr r3, [r7, #4] - 802681a: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 - 802681e: 2b01 cmp r3, #1 - 8026820: d101 bne.n 8026826 - 8026822: 2302 movs r3, #2 - 8026824: e095 b.n 8026952 - 8026826: 687b ldr r3, [r7, #4] - 8026828: 2201 movs r2, #1 - 802682a: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8026848: 687b ldr r3, [r7, #4] + 802684a: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 + 802684e: 2b01 cmp r3, #1 + 8026850: d101 bne.n 8026856 + 8026852: 2302 movs r3, #2 + 8026854: e095 b.n 8026982 + 8026856: 687b ldr r3, [r7, #4] + 8026858: 2201 movs r2, #1 + 802685a: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); - 802682e: 6878 ldr r0, [r7, #4] - 8026830: f000 fde0 bl 80273f4 - 8026834: 4603 mov r3, r0 - 8026836: 75fb strb r3, [r7, #23] + 802685e: 6878 ldr r0, [r7, #4] + 8026860: f000 fde0 bl 8027424 + 8026864: 4603 mov r3, r0 + 8026866: 75fb strb r3, [r7, #23] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) - 8026838: 7dfb ldrb r3, [r7, #23] - 802683a: 2b00 cmp r3, #0 - 802683c: f040 8081 bne.w 8026942 + 8026868: 7dfb ldrb r3, [r7, #23] + 802686a: 2b00 cmp r3, #0 + 802686c: f040 8081 bne.w 8026972 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, - 8026840: 687b ldr r3, [r7, #4] - 8026842: 6d5a ldr r2, [r3, #84] ; 0x54 - 8026844: 4b49 ldr r3, [pc, #292] ; (802696c ) - 8026846: 4013 ands r3, r2 - 8026848: f443 7280 orr.w r2, r3, #256 ; 0x100 - 802684c: 687b ldr r3, [r7, #4] - 802684e: 655a str r2, [r3, #84] ; 0x54 + 8026870: 687b ldr r3, [r7, #4] + 8026872: 6d5a ldr r2, [r3, #84] ; 0x54 + 8026874: 4b49 ldr r3, [pc, #292] ; (802699c ) + 8026876: 4013 ands r3, r2 + 8026878: f443 7280 orr.w r2, r3, #256 ; 0x100 + 802687c: 687b ldr r3, [r7, #4] + 802687e: 655a str r2, [r3, #84] ; 0x54 HAL_ADC_STATE_REG_BUSY); /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit - if ADC instance is master or if multimode feature is not available - if multimode setting is disabled (ADC instance slave in independent mode) */ if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) - 8026850: 687b ldr r3, [r7, #4] - 8026852: 681b ldr r3, [r3, #0] - 8026854: 4a42 ldr r2, [pc, #264] ; (8026960 ) - 8026856: 4293 cmp r3, r2 - 8026858: d002 beq.n 8026860 - 802685a: 687b ldr r3, [r7, #4] - 802685c: 681b ldr r3, [r3, #0] - 802685e: e000 b.n 8026862 - 8026860: 4b3e ldr r3, [pc, #248] ; (802695c ) - 8026862: 687a ldr r2, [r7, #4] - 8026864: 6812 ldr r2, [r2, #0] - 8026866: 4293 cmp r3, r2 - 8026868: d002 beq.n 8026870 + 8026880: 687b ldr r3, [r7, #4] + 8026882: 681b ldr r3, [r3, #0] + 8026884: 4a42 ldr r2, [pc, #264] ; (8026990 ) + 8026886: 4293 cmp r3, r2 + 8026888: d002 beq.n 8026890 + 802688a: 687b ldr r3, [r7, #4] + 802688c: 681b ldr r3, [r3, #0] + 802688e: e000 b.n 8026892 + 8026890: 4b3e ldr r3, [pc, #248] ; (802698c ) + 8026892: 687a ldr r2, [r7, #4] + 8026894: 6812 ldr r2, [r2, #0] + 8026896: 4293 cmp r3, r2 + 8026898: d002 beq.n 80268a0 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 802686a: 693b ldr r3, [r7, #16] - 802686c: 2b00 cmp r3, #0 - 802686e: d105 bne.n 802687c + 802689a: 693b ldr r3, [r7, #16] + 802689c: 2b00 cmp r3, #0 + 802689e: d105 bne.n 80268ac ) { CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - 8026870: 687b ldr r3, [r7, #4] - 8026872: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026874: f423 1280 bic.w r2, r3, #1048576 ; 0x100000 - 8026878: 687b ldr r3, [r7, #4] - 802687a: 655a str r2, [r3, #84] ; 0x54 + 80268a0: 687b ldr r3, [r7, #4] + 80268a2: 6d5b ldr r3, [r3, #84] ; 0x54 + 80268a4: f423 1280 bic.w r2, r3, #1048576 ; 0x100000 + 80268a8: 687b ldr r3, [r7, #4] + 80268aa: 655a str r2, [r3, #84] ; 0x54 } /* Set ADC error code */ /* Check if a conversion is on going on ADC group injected */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 802687c: 687b ldr r3, [r7, #4] - 802687e: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026880: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8026884: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8026888: d106 bne.n 8026898 + 80268ac: 687b ldr r3, [r7, #4] + 80268ae: 6d5b ldr r3, [r3, #84] ; 0x54 + 80268b0: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 80268b4: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80268b8: d106 bne.n 80268c8 { /* Reset ADC error code fields related to regular conversions only */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); - 802688a: 687b ldr r3, [r7, #4] - 802688c: 6d9b ldr r3, [r3, #88] ; 0x58 - 802688e: f023 0206 bic.w r2, r3, #6 - 8026892: 687b ldr r3, [r7, #4] - 8026894: 659a str r2, [r3, #88] ; 0x58 - 8026896: e002 b.n 802689e + 80268ba: 687b ldr r3, [r7, #4] + 80268bc: 6d9b ldr r3, [r3, #88] ; 0x58 + 80268be: f023 0206 bic.w r2, r3, #6 + 80268c2: 687b ldr r3, [r7, #4] + 80268c4: 659a str r2, [r3, #88] ; 0x58 + 80268c6: e002 b.n 80268ce } else { /* Reset all ADC error code fields */ ADC_CLEAR_ERRORCODE(hadc); - 8026898: 687b ldr r3, [r7, #4] - 802689a: 2200 movs r2, #0 - 802689c: 659a str r2, [r3, #88] ; 0x58 + 80268c8: 687b ldr r3, [r7, #4] + 80268ca: 2200 movs r2, #0 + 80268cc: 659a str r2, [r3, #88] ; 0x58 } /* Clear ADC group regular conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); - 802689e: 687b ldr r3, [r7, #4] - 80268a0: 681b ldr r3, [r3, #0] - 80268a2: 221c movs r2, #28 - 80268a4: 601a str r2, [r3, #0] + 80268ce: 687b ldr r3, [r7, #4] + 80268d0: 681b ldr r3, [r3, #0] + 80268d2: 221c movs r2, #28 + 80268d4: 601a str r2, [r3, #0] /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); - 80268a6: 687b ldr r3, [r7, #4] - 80268a8: 2200 movs r2, #0 - 80268aa: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 80268d6: 687b ldr r3, [r7, #4] + 80268d8: 2200 movs r2, #0 + 80268da: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* trigger event. */ /* Case of multimode enabled (when multimode feature is available): */ /* - if ADC is slave and dual regular conversions are enabled, ADC is */ /* enabled only (conversion is not started), */ /* - if ADC is master, ADC is enabled and conversion is started. */ if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) - 80268ae: 687b ldr r3, [r7, #4] - 80268b0: 681b ldr r3, [r3, #0] - 80268b2: 4a2b ldr r2, [pc, #172] ; (8026960 ) - 80268b4: 4293 cmp r3, r2 - 80268b6: d002 beq.n 80268be - 80268b8: 687b ldr r3, [r7, #4] - 80268ba: 681b ldr r3, [r3, #0] - 80268bc: e000 b.n 80268c0 - 80268be: 4b27 ldr r3, [pc, #156] ; (802695c ) - 80268c0: 687a ldr r2, [r7, #4] - 80268c2: 6812 ldr r2, [r2, #0] - 80268c4: 4293 cmp r3, r2 - 80268c6: d008 beq.n 80268da + 80268de: 687b ldr r3, [r7, #4] + 80268e0: 681b ldr r3, [r3, #0] + 80268e2: 4a2b ldr r2, [pc, #172] ; (8026990 ) + 80268e4: 4293 cmp r3, r2 + 80268e6: d002 beq.n 80268ee + 80268e8: 687b ldr r3, [r7, #4] + 80268ea: 681b ldr r3, [r3, #0] + 80268ec: e000 b.n 80268f0 + 80268ee: 4b27 ldr r3, [pc, #156] ; (802698c ) + 80268f0: 687a ldr r2, [r7, #4] + 80268f2: 6812 ldr r2, [r2, #0] + 80268f4: 4293 cmp r3, r2 + 80268f6: d008 beq.n 802690a || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 80268c8: 693b ldr r3, [r7, #16] - 80268ca: 2b00 cmp r3, #0 - 80268cc: d005 beq.n 80268da + 80268f8: 693b ldr r3, [r7, #16] + 80268fa: 2b00 cmp r3, #0 + 80268fc: d005 beq.n 802690a || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) - 80268ce: 693b ldr r3, [r7, #16] - 80268d0: 2b05 cmp r3, #5 - 80268d2: d002 beq.n 80268da + 80268fe: 693b ldr r3, [r7, #16] + 8026900: 2b05 cmp r3, #5 + 8026902: d002 beq.n 802690a || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) - 80268d4: 693b ldr r3, [r7, #16] - 80268d6: 2b09 cmp r3, #9 - 80268d8: d114 bne.n 8026904 + 8026904: 693b ldr r3, [r7, #16] + 8026906: 2b09 cmp r3, #9 + 8026908: d114 bne.n 8026934 ) { /* ADC instance is not a multimode slave instance with multimode regular conversions enabled */ if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != 0UL) - 80268da: 687b ldr r3, [r7, #4] - 80268dc: 681b ldr r3, [r3, #0] - 80268de: 68db ldr r3, [r3, #12] - 80268e0: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80268e4: 2b00 cmp r3, #0 - 80268e6: d007 beq.n 80268f8 + 802690a: 687b ldr r3, [r7, #4] + 802690c: 681b ldr r3, [r3, #0] + 802690e: 68db ldr r3, [r3, #12] + 8026910: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8026914: 2b00 cmp r3, #0 + 8026916: d007 beq.n 8026928 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - 80268e8: 687b ldr r3, [r7, #4] - 80268ea: 6d5b ldr r3, [r3, #84] ; 0x54 - 80268ec: f423 5340 bic.w r3, r3, #12288 ; 0x3000 - 80268f0: f443 5280 orr.w r2, r3, #4096 ; 0x1000 - 80268f4: 687b ldr r3, [r7, #4] - 80268f6: 655a str r2, [r3, #84] ; 0x54 + 8026918: 687b ldr r3, [r7, #4] + 802691a: 6d5b ldr r3, [r3, #84] ; 0x54 + 802691c: f423 5340 bic.w r3, r3, #12288 ; 0x3000 + 8026920: f443 5280 orr.w r2, r3, #4096 ; 0x1000 + 8026924: 687b ldr r3, [r7, #4] + 8026926: 655a str r2, [r3, #84] ; 0x54 } /* Start ADC group regular conversion */ LL_ADC_REG_StartConversion(hadc->Instance); - 80268f8: 687b ldr r3, [r7, #4] - 80268fa: 681b ldr r3, [r3, #0] - 80268fc: 4618 mov r0, r3 - 80268fe: f7ff fd67 bl 80263d0 - 8026902: e025 b.n 8026950 + 8026928: 687b ldr r3, [r7, #4] + 802692a: 681b ldr r3, [r3, #0] + 802692c: 4618 mov r0, r3 + 802692e: f7ff fd67 bl 8026400 + 8026932: e025 b.n 8026980 } else { /* ADC instance is a multimode slave instance with multimode regular conversions enabled */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - 8026904: 687b ldr r3, [r7, #4] - 8026906: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026908: f443 1280 orr.w r2, r3, #1048576 ; 0x100000 - 802690c: 687b ldr r3, [r7, #4] - 802690e: 655a str r2, [r3, #84] ; 0x54 + 8026934: 687b ldr r3, [r7, #4] + 8026936: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026938: f443 1280 orr.w r2, r3, #1048576 ; 0x100000 + 802693c: 687b ldr r3, [r7, #4] + 802693e: 655a str r2, [r3, #84] ; 0x54 /* if Master ADC JAUTO bit is set, update Slave State in setting HAL_ADC_STATE_INJ_BUSY bit and in resetting HAL_ADC_STATE_INJ_EOC bit */ tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); - 8026910: 687b ldr r3, [r7, #4] - 8026912: 681b ldr r3, [r3, #0] - 8026914: 4a12 ldr r2, [pc, #72] ; (8026960 ) - 8026916: 4293 cmp r3, r2 - 8026918: d002 beq.n 8026920 - 802691a: 687b ldr r3, [r7, #4] - 802691c: 681b ldr r3, [r3, #0] - 802691e: e000 b.n 8026922 - 8026920: 4b0e ldr r3, [pc, #56] ; (802695c ) - 8026922: 60fb str r3, [r7, #12] + 8026940: 687b ldr r3, [r7, #4] + 8026942: 681b ldr r3, [r3, #0] + 8026944: 4a12 ldr r2, [pc, #72] ; (8026990 ) + 8026946: 4293 cmp r3, r2 + 8026948: d002 beq.n 8026950 + 802694a: 687b ldr r3, [r7, #4] + 802694c: 681b ldr r3, [r3, #0] + 802694e: e000 b.n 8026952 + 8026950: 4b0e ldr r3, [pc, #56] ; (802698c ) + 8026952: 60fb str r3, [r7, #12] if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != 0UL) - 8026924: 68fb ldr r3, [r7, #12] - 8026926: 68db ldr r3, [r3, #12] - 8026928: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802692c: 2b00 cmp r3, #0 - 802692e: d00f beq.n 8026950 + 8026954: 68fb ldr r3, [r7, #12] + 8026956: 68db ldr r3, [r3, #12] + 8026958: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 802695c: 2b00 cmp r3, #0 + 802695e: d00f beq.n 8026980 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - 8026930: 687b ldr r3, [r7, #4] - 8026932: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026934: f423 5340 bic.w r3, r3, #12288 ; 0x3000 - 8026938: f443 5280 orr.w r2, r3, #4096 ; 0x1000 - 802693c: 687b ldr r3, [r7, #4] - 802693e: 655a str r2, [r3, #84] ; 0x54 - 8026940: e006 b.n 8026950 + 8026960: 687b ldr r3, [r7, #4] + 8026962: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026964: f423 5340 bic.w r3, r3, #12288 ; 0x3000 + 8026968: f443 5280 orr.w r2, r3, #4096 ; 0x1000 + 802696c: 687b ldr r3, [r7, #4] + 802696e: 655a str r2, [r3, #84] ; 0x54 + 8026970: e006 b.n 8026980 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); - 8026942: 687b ldr r3, [r7, #4] - 8026944: 2200 movs r2, #0 - 8026946: f883 2050 strb.w r2, [r3, #80] ; 0x50 - 802694a: e001 b.n 8026950 + 8026972: 687b ldr r3, [r7, #4] + 8026974: 2200 movs r2, #0 + 8026976: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 802697a: e001 b.n 8026980 } } else { tmp_hal_status = HAL_BUSY; - 802694c: 2302 movs r3, #2 - 802694e: 75fb strb r3, [r7, #23] + 802697c: 2302 movs r3, #2 + 802697e: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; - 8026950: 7dfb ldrb r3, [r7, #23] -} - 8026952: 4618 mov r0, r3 - 8026954: 3718 adds r7, #24 - 8026956: 46bd mov sp, r7 - 8026958: bd80 pop {r7, pc} - 802695a: bf00 nop - 802695c: 40022000 .word 0x40022000 - 8026960: 40022100 .word 0x40022100 - 8026964: 40022300 .word 0x40022300 - 8026968: 58026300 .word 0x58026300 - 802696c: fffff0fe .word 0xfffff0fe - -08026970 : + 8026980: 7dfb ldrb r3, [r7, #23] +} + 8026982: 4618 mov r0, r3 + 8026984: 3718 adds r7, #24 + 8026986: 46bd mov sp, r7 + 8026988: bd80 pop {r7, pc} + 802698a: bf00 nop + 802698c: 40022000 .word 0x40022000 + 8026990: 40022100 .word 0x40022100 + 8026994: 40022300 .word 0x40022300 + 8026998: 58026300 .word 0x58026300 + 802699c: fffff0fe .word 0xfffff0fe + +080269a0 : * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef *hadc) { - 8026970: b580 push {r7, lr} - 8026972: b084 sub sp, #16 - 8026974: af00 add r7, sp, #0 - 8026976: 6078 str r0, [r7, #4] + 80269a0: b580 push {r7, lr} + 80269a2: b084 sub sp, #16 + 80269a4: af00 add r7, sp, #0 + 80269a6: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); - 8026978: 687b ldr r3, [r7, #4] - 802697a: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 - 802697e: 2b01 cmp r3, #1 - 8026980: d101 bne.n 8026986 - 8026982: 2302 movs r3, #2 - 8026984: e021 b.n 80269ca - 8026986: 687b ldr r3, [r7, #4] - 8026988: 2201 movs r2, #1 - 802698a: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 80269a8: 687b ldr r3, [r7, #4] + 80269aa: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 + 80269ae: 2b01 cmp r3, #1 + 80269b0: d101 bne.n 80269b6 + 80269b2: 2302 movs r3, #2 + 80269b4: e021 b.n 80269fa + 80269b6: 687b ldr r3, [r7, #4] + 80269b8: 2201 movs r2, #1 + 80269ba: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* 1. Stop potential conversion on going, on ADC groups regular and injected */ tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); - 802698e: 2103 movs r1, #3 - 8026990: 6878 ldr r0, [r7, #4] - 8026992: f000 fc73 bl 802727c - 8026996: 4603 mov r3, r0 - 8026998: 73fb strb r3, [r7, #15] + 80269be: 2103 movs r1, #3 + 80269c0: 6878 ldr r0, [r7, #4] + 80269c2: f000 fc73 bl 80272ac + 80269c6: 4603 mov r3, r0 + 80269c8: 73fb strb r3, [r7, #15] /* Disable ADC peripheral if conversions are effectively stopped */ if (tmp_hal_status == HAL_OK) - 802699a: 7bfb ldrb r3, [r7, #15] - 802699c: 2b00 cmp r3, #0 - 802699e: d10f bne.n 80269c0 + 80269ca: 7bfb ldrb r3, [r7, #15] + 80269cc: 2b00 cmp r3, #0 + 80269ce: d10f bne.n 80269f0 { /* 2. Disable the ADC peripheral */ tmp_hal_status = ADC_Disable(hadc); - 80269a0: 6878 ldr r0, [r7, #4] - 80269a2: f000 fdb1 bl 8027508 - 80269a6: 4603 mov r3, r0 - 80269a8: 73fb strb r3, [r7, #15] + 80269d0: 6878 ldr r0, [r7, #4] + 80269d2: f000 fdb1 bl 8027538 + 80269d6: 4603 mov r3, r0 + 80269d8: 73fb strb r3, [r7, #15] /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) - 80269aa: 7bfb ldrb r3, [r7, #15] - 80269ac: 2b00 cmp r3, #0 - 80269ae: d107 bne.n 80269c0 + 80269da: 7bfb ldrb r3, [r7, #15] + 80269dc: 2b00 cmp r3, #0 + 80269de: d107 bne.n 80269f0 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 80269b0: 687b ldr r3, [r7, #4] - 80269b2: 6d5a ldr r2, [r3, #84] ; 0x54 - 80269b4: 4b07 ldr r3, [pc, #28] ; (80269d4 ) - 80269b6: 4013 ands r3, r2 - 80269b8: f043 0201 orr.w r2, r3, #1 - 80269bc: 687b ldr r3, [r7, #4] - 80269be: 655a str r2, [r3, #84] ; 0x54 + 80269e0: 687b ldr r3, [r7, #4] + 80269e2: 6d5a ldr r2, [r3, #84] ; 0x54 + 80269e4: 4b07 ldr r3, [pc, #28] ; (8026a04 ) + 80269e6: 4013 ands r3, r2 + 80269e8: f043 0201 orr.w r2, r3, #1 + 80269ec: 687b ldr r3, [r7, #4] + 80269ee: 655a str r2, [r3, #84] ; 0x54 HAL_ADC_STATE_READY); } } /* Process unlocked */ __HAL_UNLOCK(hadc); - 80269c0: 687b ldr r3, [r7, #4] - 80269c2: 2200 movs r2, #0 - 80269c4: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 80269f0: 687b ldr r3, [r7, #4] + 80269f2: 2200 movs r2, #0 + 80269f4: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Return function status */ return tmp_hal_status; - 80269c8: 7bfb ldrb r3, [r7, #15] + 80269f8: 7bfb ldrb r3, [r7, #15] } - 80269ca: 4618 mov r0, r3 - 80269cc: 3710 adds r7, #16 - 80269ce: 46bd mov sp, r7 - 80269d0: bd80 pop {r7, pc} - 80269d2: bf00 nop - 80269d4: ffffeefe .word 0xffffeefe + 80269fa: 4618 mov r0, r3 + 80269fc: 3710 adds r7, #16 + 80269fe: 46bd mov sp, r7 + 8026a00: bd80 pop {r7, pc} + 8026a02: bf00 nop + 8026a04: ffffeefe .word 0xffffeefe -080269d8 : +08026a08 : * @param hadc ADC handle * @param Timeout Timeout value in millisecond. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout) { - 80269d8: b580 push {r7, lr} - 80269da: b088 sub sp, #32 - 80269dc: af00 add r7, sp, #0 - 80269de: 6078 str r0, [r7, #4] - 80269e0: 6039 str r1, [r7, #0] + 8026a08: b580 push {r7, lr} + 8026a0a: b088 sub sp, #32 + 8026a0c: af00 add r7, sp, #0 + 8026a0e: 6078 str r0, [r7, #4] + 8026a10: 6039 str r1, [r7, #0] uint32_t tickstart; uint32_t tmp_Flag_End; uint32_t tmp_cfgr; const ADC_TypeDef *tmpADC_Master; uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 80269e2: 687b ldr r3, [r7, #4] - 80269e4: 681b ldr r3, [r3, #0] - 80269e6: 4a72 ldr r2, [pc, #456] ; (8026bb0 ) - 80269e8: 4293 cmp r3, r2 - 80269ea: d004 beq.n 80269f6 - 80269ec: 687b ldr r3, [r7, #4] - 80269ee: 681b ldr r3, [r3, #0] - 80269f0: 4a70 ldr r2, [pc, #448] ; (8026bb4 ) - 80269f2: 4293 cmp r3, r2 - 80269f4: d101 bne.n 80269fa - 80269f6: 4b70 ldr r3, [pc, #448] ; (8026bb8 ) - 80269f8: e000 b.n 80269fc - 80269fa: 4b70 ldr r3, [pc, #448] ; (8026bbc ) - 80269fc: 4618 mov r0, r3 - 80269fe: f7ff fc2f bl 8026260 - 8026a02: 6178 str r0, [r7, #20] + 8026a12: 687b ldr r3, [r7, #4] + 8026a14: 681b ldr r3, [r3, #0] + 8026a16: 4a72 ldr r2, [pc, #456] ; (8026be0 ) + 8026a18: 4293 cmp r3, r2 + 8026a1a: d004 beq.n 8026a26 + 8026a1c: 687b ldr r3, [r7, #4] + 8026a1e: 681b ldr r3, [r3, #0] + 8026a20: 4a70 ldr r2, [pc, #448] ; (8026be4 ) + 8026a22: 4293 cmp r3, r2 + 8026a24: d101 bne.n 8026a2a + 8026a26: 4b70 ldr r3, [pc, #448] ; (8026be8 ) + 8026a28: e000 b.n 8026a2c + 8026a2a: 4b70 ldr r3, [pc, #448] ; (8026bec ) + 8026a2c: 4618 mov r0, r3 + 8026a2e: f7ff fc2f bl 8026290 + 8026a32: 6178 str r0, [r7, #20] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* If end of conversion selected to end of sequence conversions */ if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) - 8026a04: 687b ldr r3, [r7, #4] - 8026a06: 691b ldr r3, [r3, #16] - 8026a08: 2b08 cmp r3, #8 - 8026a0a: d102 bne.n 8026a12 + 8026a34: 687b ldr r3, [r7, #4] + 8026a36: 691b ldr r3, [r3, #16] + 8026a38: 2b08 cmp r3, #8 + 8026a3a: d102 bne.n 8026a42 { tmp_Flag_End = ADC_FLAG_EOS; - 8026a0c: 2308 movs r3, #8 - 8026a0e: 61fb str r3, [r7, #28] - 8026a10: e037 b.n 8026a82 + 8026a3c: 2308 movs r3, #8 + 8026a3e: 61fb str r3, [r7, #28] + 8026a40: e037 b.n 8026ab2 /* each conversion: */ /* Particular case is ADC configured in DMA mode and ADC sequencer with */ /* several ranks and polling for end of each conversion. */ /* For code simplicity sake, this particular case is generalized to */ /* ADC configured in DMA mode and and polling for end of each conversion. */ if ((tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 8026a12: 697b ldr r3, [r7, #20] - 8026a14: 2b00 cmp r3, #0 - 8026a16: d005 beq.n 8026a24 + 8026a42: 697b ldr r3, [r7, #20] + 8026a44: 2b00 cmp r3, #0 + 8026a46: d005 beq.n 8026a54 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) - 8026a18: 697b ldr r3, [r7, #20] - 8026a1a: 2b05 cmp r3, #5 - 8026a1c: d002 beq.n 8026a24 + 8026a48: 697b ldr r3, [r7, #20] + 8026a4a: 2b05 cmp r3, #5 + 8026a4c: d002 beq.n 8026a54 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) - 8026a1e: 697b ldr r3, [r7, #20] - 8026a20: 2b09 cmp r3, #9 - 8026a22: d111 bne.n 8026a48 + 8026a4e: 697b ldr r3, [r7, #20] + 8026a50: 2b09 cmp r3, #9 + 8026a52: d111 bne.n 8026a78 ) { /* Check DMNGT bit in handle ADC CFGR register */ if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMNGT_0) != 0UL) - 8026a24: 687b ldr r3, [r7, #4] - 8026a26: 681b ldr r3, [r3, #0] - 8026a28: 68db ldr r3, [r3, #12] - 8026a2a: f003 0301 and.w r3, r3, #1 - 8026a2e: 2b00 cmp r3, #0 - 8026a30: d007 beq.n 8026a42 + 8026a54: 687b ldr r3, [r7, #4] + 8026a56: 681b ldr r3, [r3, #0] + 8026a58: 68db ldr r3, [r3, #12] + 8026a5a: f003 0301 and.w r3, r3, #1 + 8026a5e: 2b00 cmp r3, #0 + 8026a60: d007 beq.n 8026a72 { SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8026a32: 687b ldr r3, [r7, #4] - 8026a34: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026a36: f043 0220 orr.w r2, r3, #32 - 8026a3a: 687b ldr r3, [r7, #4] - 8026a3c: 655a str r2, [r3, #84] ; 0x54 + 8026a62: 687b ldr r3, [r7, #4] + 8026a64: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026a66: f043 0220 orr.w r2, r3, #32 + 8026a6a: 687b ldr r3, [r7, #4] + 8026a6c: 655a str r2, [r3, #84] ; 0x54 return HAL_ERROR; - 8026a3e: 2301 movs r3, #1 - 8026a40: e0b1 b.n 8026ba6 + 8026a6e: 2301 movs r3, #1 + 8026a70: e0b1 b.n 8026bd6 } else { tmp_Flag_End = (ADC_FLAG_EOC); - 8026a42: 2304 movs r3, #4 - 8026a44: 61fb str r3, [r7, #28] + 8026a72: 2304 movs r3, #4 + 8026a74: 61fb str r3, [r7, #28] if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMNGT_0) != 0UL) - 8026a46: e01c b.n 8026a82 + 8026a76: e01c b.n 8026ab2 } } else { /* Check ADC DMA mode in multimode on ADC group regular */ if (LL_ADC_GetMultiDMATransfer(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) != LL_ADC_MULTI_REG_DMA_EACH_ADC) - 8026a48: 687b ldr r3, [r7, #4] - 8026a4a: 681b ldr r3, [r3, #0] - 8026a4c: 4a58 ldr r2, [pc, #352] ; (8026bb0 ) - 8026a4e: 4293 cmp r3, r2 - 8026a50: d004 beq.n 8026a5c - 8026a52: 687b ldr r3, [r7, #4] - 8026a54: 681b ldr r3, [r3, #0] - 8026a56: 4a57 ldr r2, [pc, #348] ; (8026bb4 ) - 8026a58: 4293 cmp r3, r2 - 8026a5a: d101 bne.n 8026a60 - 8026a5c: 4b56 ldr r3, [pc, #344] ; (8026bb8 ) - 8026a5e: e000 b.n 8026a62 - 8026a60: 4b56 ldr r3, [pc, #344] ; (8026bbc ) - 8026a62: 4618 mov r0, r3 - 8026a64: f7ff fc0a bl 802627c - 8026a68: 4603 mov r3, r0 - 8026a6a: 2b00 cmp r3, #0 - 8026a6c: d007 beq.n 8026a7e + 8026a78: 687b ldr r3, [r7, #4] + 8026a7a: 681b ldr r3, [r3, #0] + 8026a7c: 4a58 ldr r2, [pc, #352] ; (8026be0 ) + 8026a7e: 4293 cmp r3, r2 + 8026a80: d004 beq.n 8026a8c + 8026a82: 687b ldr r3, [r7, #4] + 8026a84: 681b ldr r3, [r3, #0] + 8026a86: 4a57 ldr r2, [pc, #348] ; (8026be4 ) + 8026a88: 4293 cmp r3, r2 + 8026a8a: d101 bne.n 8026a90 + 8026a8c: 4b56 ldr r3, [pc, #344] ; (8026be8 ) + 8026a8e: e000 b.n 8026a92 + 8026a90: 4b56 ldr r3, [pc, #344] ; (8026bec ) + 8026a92: 4618 mov r0, r3 + 8026a94: f7ff fc0a bl 80262ac + 8026a98: 4603 mov r3, r0 + 8026a9a: 2b00 cmp r3, #0 + 8026a9c: d007 beq.n 8026aae { SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8026a6e: 687b ldr r3, [r7, #4] - 8026a70: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026a72: f043 0220 orr.w r2, r3, #32 - 8026a76: 687b ldr r3, [r7, #4] - 8026a78: 655a str r2, [r3, #84] ; 0x54 + 8026a9e: 687b ldr r3, [r7, #4] + 8026aa0: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026aa2: f043 0220 orr.w r2, r3, #32 + 8026aa6: 687b ldr r3, [r7, #4] + 8026aa8: 655a str r2, [r3, #84] ; 0x54 return HAL_ERROR; - 8026a7a: 2301 movs r3, #1 - 8026a7c: e093 b.n 8026ba6 + 8026aaa: 2301 movs r3, #1 + 8026aac: e093 b.n 8026bd6 } else { tmp_Flag_End = (ADC_FLAG_EOC); - 8026a7e: 2304 movs r3, #4 - 8026a80: 61fb str r3, [r7, #28] + 8026aae: 2304 movs r3, #4 + 8026ab0: 61fb str r3, [r7, #28] } } } /* Get tick count */ tickstart = HAL_GetTick(); - 8026a82: f7ff fa87 bl 8025f94 - 8026a86: 6138 str r0, [r7, #16] + 8026ab2: f7ff fa87 bl 8025fc4 + 8026ab6: 6138 str r0, [r7, #16] /* Wait until End of unitary conversion or sequence conversions flag is raised */ while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) - 8026a88: e021 b.n 8026ace + 8026ab8: e021 b.n 8026afe { /* Check if timeout is disabled (set to infinite wait) */ if (Timeout != HAL_MAX_DELAY) - 8026a8a: 683b ldr r3, [r7, #0] - 8026a8c: f1b3 3fff cmp.w r3, #4294967295 - 8026a90: d01d beq.n 8026ace + 8026aba: 683b ldr r3, [r7, #0] + 8026abc: f1b3 3fff cmp.w r3, #4294967295 + 8026ac0: d01d beq.n 8026afe { if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL)) - 8026a92: f7ff fa7f bl 8025f94 - 8026a96: 4602 mov r2, r0 - 8026a98: 693b ldr r3, [r7, #16] - 8026a9a: 1ad3 subs r3, r2, r3 - 8026a9c: 683a ldr r2, [r7, #0] - 8026a9e: 429a cmp r2, r3 - 8026aa0: d302 bcc.n 8026aa8 - 8026aa2: 683b ldr r3, [r7, #0] - 8026aa4: 2b00 cmp r3, #0 - 8026aa6: d112 bne.n 8026ace + 8026ac2: f7ff fa7f bl 8025fc4 + 8026ac6: 4602 mov r2, r0 + 8026ac8: 693b ldr r3, [r7, #16] + 8026aca: 1ad3 subs r3, r2, r3 + 8026acc: 683a ldr r2, [r7, #0] + 8026ace: 429a cmp r2, r3 + 8026ad0: d302 bcc.n 8026ad8 + 8026ad2: 683b ldr r3, [r7, #0] + 8026ad4: 2b00 cmp r3, #0 + 8026ad6: d112 bne.n 8026afe { /* New check to avoid false timeout detection in case of preemption */ if((hadc->Instance->ISR & tmp_Flag_End) == 0UL) - 8026aa8: 687b ldr r3, [r7, #4] - 8026aaa: 681b ldr r3, [r3, #0] - 8026aac: 681a ldr r2, [r3, #0] - 8026aae: 69fb ldr r3, [r7, #28] - 8026ab0: 4013 ands r3, r2 - 8026ab2: 2b00 cmp r3, #0 - 8026ab4: d10b bne.n 8026ace + 8026ad8: 687b ldr r3, [r7, #4] + 8026ada: 681b ldr r3, [r3, #0] + 8026adc: 681a ldr r2, [r3, #0] + 8026ade: 69fb ldr r3, [r7, #28] + 8026ae0: 4013 ands r3, r2 + 8026ae2: 2b00 cmp r3, #0 + 8026ae4: d10b bne.n 8026afe { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); - 8026ab6: 687b ldr r3, [r7, #4] - 8026ab8: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026aba: f043 0204 orr.w r2, r3, #4 - 8026abe: 687b ldr r3, [r7, #4] - 8026ac0: 655a str r2, [r3, #84] ; 0x54 + 8026ae6: 687b ldr r3, [r7, #4] + 8026ae8: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026aea: f043 0204 orr.w r2, r3, #4 + 8026aee: 687b ldr r3, [r7, #4] + 8026af0: 655a str r2, [r3, #84] ; 0x54 /* Process unlocked */ __HAL_UNLOCK(hadc); - 8026ac2: 687b ldr r3, [r7, #4] - 8026ac4: 2200 movs r2, #0 - 8026ac6: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8026af2: 687b ldr r3, [r7, #4] + 8026af4: 2200 movs r2, #0 + 8026af6: f883 2050 strb.w r2, [r3, #80] ; 0x50 return HAL_TIMEOUT; - 8026aca: 2303 movs r3, #3 - 8026acc: e06b b.n 8026ba6 + 8026afa: 2303 movs r3, #3 + 8026afc: e06b b.n 8026bd6 while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) - 8026ace: 687b ldr r3, [r7, #4] - 8026ad0: 681b ldr r3, [r3, #0] - 8026ad2: 681a ldr r2, [r3, #0] - 8026ad4: 69fb ldr r3, [r7, #28] - 8026ad6: 4013 ands r3, r2 - 8026ad8: 2b00 cmp r3, #0 - 8026ada: d0d6 beq.n 8026a8a + 8026afe: 687b ldr r3, [r7, #4] + 8026b00: 681b ldr r3, [r3, #0] + 8026b02: 681a ldr r2, [r3, #0] + 8026b04: 69fb ldr r3, [r7, #28] + 8026b06: 4013 ands r3, r2 + 8026b08: 2b00 cmp r3, #0 + 8026b0a: d0d6 beq.n 8026aba } } } /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - 8026adc: 687b ldr r3, [r7, #4] - 8026ade: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026ae0: f443 7200 orr.w r2, r3, #512 ; 0x200 - 8026ae4: 687b ldr r3, [r7, #4] - 8026ae6: 655a str r2, [r3, #84] ; 0x54 + 8026b0c: 687b ldr r3, [r7, #4] + 8026b0e: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026b10: f443 7200 orr.w r2, r3, #512 ; 0x200 + 8026b14: 687b ldr r3, [r7, #4] + 8026b16: 655a str r2, [r3, #84] ; 0x54 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ if ((LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance) != 0UL) - 8026ae8: 687b ldr r3, [r7, #4] - 8026aea: 681b ldr r3, [r3, #0] - 8026aec: 4618 mov r0, r3 - 8026aee: f7ff fb29 bl 8026144 - 8026af2: 4603 mov r3, r0 - 8026af4: 2b00 cmp r3, #0 - 8026af6: d01c beq.n 8026b32 + 8026b18: 687b ldr r3, [r7, #4] + 8026b1a: 681b ldr r3, [r3, #0] + 8026b1c: 4618 mov r0, r3 + 8026b1e: f7ff fb29 bl 8026174 + 8026b22: 4603 mov r3, r0 + 8026b24: 2b00 cmp r3, #0 + 8026b26: d01c beq.n 8026b62 && (hadc->Init.ContinuousConvMode == DISABLE) - 8026af8: 687b ldr r3, [r7, #4] - 8026afa: 7d5b ldrb r3, [r3, #21] - 8026afc: 2b00 cmp r3, #0 - 8026afe: d118 bne.n 8026b32 + 8026b28: 687b ldr r3, [r7, #4] + 8026b2a: 7d5b ldrb r3, [r3, #21] + 8026b2c: 2b00 cmp r3, #0 + 8026b2e: d118 bne.n 8026b62 ) { /* Check whether end of sequence is reached */ if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS)) - 8026b00: 687b ldr r3, [r7, #4] - 8026b02: 681b ldr r3, [r3, #0] - 8026b04: 681b ldr r3, [r3, #0] - 8026b06: f003 0308 and.w r3, r3, #8 - 8026b0a: 2b08 cmp r3, #8 - 8026b0c: d111 bne.n 8026b32 + 8026b30: 687b ldr r3, [r7, #4] + 8026b32: 681b ldr r3, [r3, #0] + 8026b34: 681b ldr r3, [r3, #0] + 8026b36: f003 0308 and.w r3, r3, #8 + 8026b3a: 2b08 cmp r3, #8 + 8026b3c: d111 bne.n 8026b62 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - 8026b0e: 687b ldr r3, [r7, #4] - 8026b10: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026b12: f423 7280 bic.w r2, r3, #256 ; 0x100 - 8026b16: 687b ldr r3, [r7, #4] - 8026b18: 655a str r2, [r3, #84] ; 0x54 + 8026b3e: 687b ldr r3, [r7, #4] + 8026b40: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026b42: f423 7280 bic.w r2, r3, #256 ; 0x100 + 8026b46: 687b ldr r3, [r7, #4] + 8026b48: 655a str r2, [r3, #84] ; 0x54 if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) == 0UL) - 8026b1a: 687b ldr r3, [r7, #4] - 8026b1c: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026b1e: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8026b22: 2b00 cmp r3, #0 - 8026b24: d105 bne.n 8026b32 + 8026b4a: 687b ldr r3, [r7, #4] + 8026b4c: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026b4e: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8026b52: 2b00 cmp r3, #0 + 8026b54: d105 bne.n 8026b62 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); - 8026b26: 687b ldr r3, [r7, #4] - 8026b28: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026b2a: f043 0201 orr.w r2, r3, #1 - 8026b2e: 687b ldr r3, [r7, #4] - 8026b30: 655a str r2, [r3, #84] ; 0x54 + 8026b56: 687b ldr r3, [r7, #4] + 8026b58: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026b5a: f043 0201 orr.w r2, r3, #1 + 8026b5e: 687b ldr r3, [r7, #4] + 8026b60: 655a str r2, [r3, #84] ; 0x54 } /* Get relevant register CFGR in ADC instance of ADC master or slave */ /* in function of multimode state (for devices with multimode */ /* available). */ if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) - 8026b32: 687b ldr r3, [r7, #4] - 8026b34: 681b ldr r3, [r3, #0] - 8026b36: 4a1f ldr r2, [pc, #124] ; (8026bb4 ) - 8026b38: 4293 cmp r3, r2 - 8026b3a: d002 beq.n 8026b42 - 8026b3c: 687b ldr r3, [r7, #4] - 8026b3e: 681b ldr r3, [r3, #0] - 8026b40: e000 b.n 8026b44 - 8026b42: 4b1b ldr r3, [pc, #108] ; (8026bb0 ) - 8026b44: 687a ldr r2, [r7, #4] - 8026b46: 6812 ldr r2, [r2, #0] - 8026b48: 4293 cmp r3, r2 - 8026b4a: d008 beq.n 8026b5e + 8026b62: 687b ldr r3, [r7, #4] + 8026b64: 681b ldr r3, [r3, #0] + 8026b66: 4a1f ldr r2, [pc, #124] ; (8026be4 ) + 8026b68: 4293 cmp r3, r2 + 8026b6a: d002 beq.n 8026b72 + 8026b6c: 687b ldr r3, [r7, #4] + 8026b6e: 681b ldr r3, [r3, #0] + 8026b70: e000 b.n 8026b74 + 8026b72: 4b1b ldr r3, [pc, #108] ; (8026be0 ) + 8026b74: 687a ldr r2, [r7, #4] + 8026b76: 6812 ldr r2, [r2, #0] + 8026b78: 4293 cmp r3, r2 + 8026b7a: d008 beq.n 8026b8e || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 8026b4c: 697b ldr r3, [r7, #20] - 8026b4e: 2b00 cmp r3, #0 - 8026b50: d005 beq.n 8026b5e + 8026b7c: 697b ldr r3, [r7, #20] + 8026b7e: 2b00 cmp r3, #0 + 8026b80: d005 beq.n 8026b8e || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) - 8026b52: 697b ldr r3, [r7, #20] - 8026b54: 2b05 cmp r3, #5 - 8026b56: d002 beq.n 8026b5e + 8026b82: 697b ldr r3, [r7, #20] + 8026b84: 2b05 cmp r3, #5 + 8026b86: d002 beq.n 8026b8e || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) - 8026b58: 697b ldr r3, [r7, #20] - 8026b5a: 2b09 cmp r3, #9 - 8026b5c: d104 bne.n 8026b68 + 8026b88: 697b ldr r3, [r7, #20] + 8026b8a: 2b09 cmp r3, #9 + 8026b8c: d104 bne.n 8026b98 ) { /* Retrieve handle ADC CFGR register */ tmp_cfgr = READ_REG(hadc->Instance->CFGR); - 8026b5e: 687b ldr r3, [r7, #4] - 8026b60: 681b ldr r3, [r3, #0] - 8026b62: 68db ldr r3, [r3, #12] - 8026b64: 61bb str r3, [r7, #24] - 8026b66: e00c b.n 8026b82 + 8026b8e: 687b ldr r3, [r7, #4] + 8026b90: 681b ldr r3, [r3, #0] + 8026b92: 68db ldr r3, [r3, #12] + 8026b94: 61bb str r3, [r7, #24] + 8026b96: e00c b.n 8026bb2 } else { /* Retrieve Master ADC CFGR register */ tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); - 8026b68: 687b ldr r3, [r7, #4] - 8026b6a: 681b ldr r3, [r3, #0] - 8026b6c: 4a11 ldr r2, [pc, #68] ; (8026bb4 ) - 8026b6e: 4293 cmp r3, r2 - 8026b70: d002 beq.n 8026b78 - 8026b72: 687b ldr r3, [r7, #4] - 8026b74: 681b ldr r3, [r3, #0] - 8026b76: e000 b.n 8026b7a - 8026b78: 4b0d ldr r3, [pc, #52] ; (8026bb0 ) - 8026b7a: 60fb str r3, [r7, #12] + 8026b98: 687b ldr r3, [r7, #4] + 8026b9a: 681b ldr r3, [r3, #0] + 8026b9c: 4a11 ldr r2, [pc, #68] ; (8026be4 ) + 8026b9e: 4293 cmp r3, r2 + 8026ba0: d002 beq.n 8026ba8 + 8026ba2: 687b ldr r3, [r7, #4] + 8026ba4: 681b ldr r3, [r3, #0] + 8026ba6: e000 b.n 8026baa + 8026ba8: 4b0d ldr r3, [pc, #52] ; (8026be0 ) + 8026baa: 60fb str r3, [r7, #12] tmp_cfgr = READ_REG(tmpADC_Master->CFGR); - 8026b7c: 68fb ldr r3, [r7, #12] - 8026b7e: 68db ldr r3, [r3, #12] - 8026b80: 61bb str r3, [r7, #24] + 8026bac: 68fb ldr r3, [r7, #12] + 8026bae: 68db ldr r3, [r3, #12] + 8026bb0: 61bb str r3, [r7, #24] } /* Clear polled flag */ if (tmp_Flag_End == ADC_FLAG_EOS) - 8026b82: 69fb ldr r3, [r7, #28] - 8026b84: 2b08 cmp r3, #8 - 8026b86: d104 bne.n 8026b92 + 8026bb2: 69fb ldr r3, [r7, #28] + 8026bb4: 2b08 cmp r3, #8 + 8026bb6: d104 bne.n 8026bc2 { __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOS); - 8026b88: 687b ldr r3, [r7, #4] - 8026b8a: 681b ldr r3, [r3, #0] - 8026b8c: 2208 movs r2, #8 - 8026b8e: 601a str r2, [r3, #0] - 8026b90: e008 b.n 8026ba4 + 8026bb8: 687b ldr r3, [r7, #4] + 8026bba: 681b ldr r3, [r3, #0] + 8026bbc: 2208 movs r2, #8 + 8026bbe: 601a str r2, [r3, #0] + 8026bc0: e008 b.n 8026bd4 else { /* Clear end of conversion EOC flag of regular group if low power feature */ /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ /* until data register is read using function HAL_ADC_GetValue(). */ if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL) - 8026b92: 69bb ldr r3, [r7, #24] - 8026b94: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8026b98: 2b00 cmp r3, #0 - 8026b9a: d103 bne.n 8026ba4 + 8026bc2: 69bb ldr r3, [r7, #24] + 8026bc4: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8026bc8: 2b00 cmp r3, #0 + 8026bca: d103 bne.n 8026bd4 { __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); - 8026b9c: 687b ldr r3, [r7, #4] - 8026b9e: 681b ldr r3, [r3, #0] - 8026ba0: 220c movs r2, #12 - 8026ba2: 601a str r2, [r3, #0] + 8026bcc: 687b ldr r3, [r7, #4] + 8026bce: 681b ldr r3, [r3, #0] + 8026bd0: 220c movs r2, #12 + 8026bd2: 601a str r2, [r3, #0] } } /* Return function status */ return HAL_OK; - 8026ba4: 2300 movs r3, #0 -} - 8026ba6: 4618 mov r0, r3 - 8026ba8: 3720 adds r7, #32 - 8026baa: 46bd mov sp, r7 - 8026bac: bd80 pop {r7, pc} - 8026bae: bf00 nop - 8026bb0: 40022000 .word 0x40022000 - 8026bb4: 40022100 .word 0x40022100 - 8026bb8: 40022300 .word 0x40022300 - 8026bbc: 58026300 .word 0x58026300 - -08026bc0 : + 8026bd4: 2300 movs r3, #0 +} + 8026bd6: 4618 mov r0, r3 + 8026bd8: 3720 adds r7, #32 + 8026bda: 46bd mov sp, r7 + 8026bdc: bd80 pop {r7, pc} + 8026bde: bf00 nop + 8026be0: 40022000 .word 0x40022000 + 8026be4: 40022100 .word 0x40022100 + 8026be8: 40022300 .word 0x40022300 + 8026bec: 58026300 .word 0x58026300 + +08026bf0 : * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). * @param hadc ADC handle * @retval ADC group regular conversion data */ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef *hadc) { - 8026bc0: b480 push {r7} - 8026bc2: b083 sub sp, #12 - 8026bc4: af00 add r7, sp, #0 - 8026bc6: 6078 str r0, [r7, #4] + 8026bf0: b480 push {r7} + 8026bf2: b083 sub sp, #12 + 8026bf4: af00 add r7, sp, #0 + 8026bf6: 6078 str r0, [r7, #4] /* Note: EOC flag is not cleared here by software because automatically */ /* cleared by hardware when reading register DR. */ /* Return ADC converted value */ return hadc->Instance->DR; - 8026bc8: 687b ldr r3, [r7, #4] - 8026bca: 681b ldr r3, [r3, #0] - 8026bcc: 6c1b ldr r3, [r3, #64] ; 0x40 -} - 8026bce: 4618 mov r0, r3 - 8026bd0: 370c adds r7, #12 - 8026bd2: 46bd mov sp, r7 - 8026bd4: f85d 7b04 ldr.w r7, [sp], #4 - 8026bd8: 4770 bx lr + 8026bf8: 687b ldr r3, [r7, #4] + 8026bfa: 681b ldr r3, [r3, #0] + 8026bfc: 6c1b ldr r3, [r3, #64] ; 0x40 +} + 8026bfe: 4618 mov r0, r3 + 8026c00: 370c adds r7, #12 + 8026c02: 46bd mov sp, r7 + 8026c04: f85d 7b04 ldr.w r7, [sp], #4 + 8026c08: 4770 bx lr ... -08026bdc : +08026c0c : * @param hadc ADC handle * @param sConfig Structure of ADC channel assigned to ADC group regular. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig) { - 8026bdc: b590 push {r4, r7, lr} - 8026bde: b0a1 sub sp, #132 ; 0x84 - 8026be0: af00 add r7, sp, #0 - 8026be2: 6078 str r0, [r7, #4] - 8026be4: 6039 str r1, [r7, #0] + 8026c0c: b590 push {r4, r7, lr} + 8026c0e: b0a1 sub sp, #132 ; 0x84 + 8026c10: af00 add r7, sp, #0 + 8026c12: 6078 str r0, [r7, #4] + 8026c14: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8026be6: 2300 movs r3, #0 - 8026be8: f887 307f strb.w r3, [r7, #127] ; 0x7f + 8026c16: 2300 movs r3, #0 + 8026c18: f887 307f strb.w r3, [r7, #127] ; 0x7f uint32_t tmpOffsetShifted; uint32_t tmp_config_internal_channel; __IO uint32_t wait_loop_index = 0; - 8026bec: 2300 movs r3, #0 - 8026bee: 60bb str r3, [r7, #8] + 8026c1c: 2300 movs r3, #0 + 8026c1e: 60bb str r3, [r7, #8] /* if ROVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is ignored (considered as reset) */ assert_param(!((sConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENABLE))); /* Verification of channel number */ if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED) - 8026bf0: 683b ldr r3, [r7, #0] - 8026bf2: 68db ldr r3, [r3, #12] - 8026bf4: 4a9d ldr r2, [pc, #628] ; (8026e6c ) - 8026bf6: 4293 cmp r3, r2 + 8026c20: 683b ldr r3, [r7, #0] + 8026c22: 68db ldr r3, [r3, #12] + 8026c24: 4a9d ldr r2, [pc, #628] ; (8026e9c ) + 8026c26: 4293 cmp r3, r2 } #endif } /* Process locked */ __HAL_LOCK(hadc); - 8026bf8: 687b ldr r3, [r7, #4] - 8026bfa: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 - 8026bfe: 2b01 cmp r3, #1 - 8026c00: d101 bne.n 8026c06 - 8026c02: 2302 movs r3, #2 - 8026c04: e321 b.n 802724a - 8026c06: 687b ldr r3, [r7, #4] - 8026c08: 2201 movs r2, #1 - 8026c0a: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8026c28: 687b ldr r3, [r7, #4] + 8026c2a: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 + 8026c2e: 2b01 cmp r3, #1 + 8026c30: d101 bne.n 8026c36 + 8026c32: 2302 movs r3, #2 + 8026c34: e321 b.n 802727a + 8026c36: 687b ldr r3, [r7, #4] + 8026c38: 2201 movs r2, #1 + 8026c3a: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular group: */ /* - Channel number */ /* - Channel rank */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) - 8026c0e: 687b ldr r3, [r7, #4] - 8026c10: 681b ldr r3, [r3, #0] - 8026c12: 4618 mov r0, r3 - 8026c14: f7ff fc04 bl 8026420 - 8026c18: 4603 mov r3, r0 - 8026c1a: 2b00 cmp r3, #0 - 8026c1c: f040 8306 bne.w 802722c + 8026c3e: 687b ldr r3, [r7, #4] + 8026c40: 681b ldr r3, [r3, #0] + 8026c42: 4618 mov r0, r3 + 8026c44: f7ff fc04 bl 8026450 + 8026c48: 4603 mov r3, r0 + 8026c4a: 2b00 cmp r3, #0 + 8026c4c: f040 8306 bne.w 802725c /* ADC channels preselection */ hadc->Instance->PCSEL_RES0 |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) & 0x1FUL)); } #else /* ADC channels preselection */ hadc->Instance->PCSEL |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) & 0x1FUL)); - 8026c20: 683b ldr r3, [r7, #0] - 8026c22: 681b ldr r3, [r3, #0] - 8026c24: f3c3 0313 ubfx r3, r3, #0, #20 - 8026c28: 2b00 cmp r3, #0 - 8026c2a: d108 bne.n 8026c3e - 8026c2c: 683b ldr r3, [r7, #0] - 8026c2e: 681b ldr r3, [r3, #0] - 8026c30: 0e9b lsrs r3, r3, #26 - 8026c32: f003 031f and.w r3, r3, #31 - 8026c36: 2201 movs r2, #1 - 8026c38: fa02 f303 lsl.w r3, r2, r3 - 8026c3c: e016 b.n 8026c6c - 8026c3e: 683b ldr r3, [r7, #0] - 8026c40: 681b ldr r3, [r3, #0] - 8026c42: 667b str r3, [r7, #100] ; 0x64 + 8026c50: 683b ldr r3, [r7, #0] + 8026c52: 681b ldr r3, [r3, #0] + 8026c54: f3c3 0313 ubfx r3, r3, #0, #20 + 8026c58: 2b00 cmp r3, #0 + 8026c5a: d108 bne.n 8026c6e + 8026c5c: 683b ldr r3, [r7, #0] + 8026c5e: 681b ldr r3, [r3, #0] + 8026c60: 0e9b lsrs r3, r3, #26 + 8026c62: f003 031f and.w r3, r3, #31 + 8026c66: 2201 movs r2, #1 + 8026c68: fa02 f303 lsl.w r3, r2, r3 + 8026c6c: e016 b.n 8026c9c + 8026c6e: 683b ldr r3, [r7, #0] + 8026c70: 681b ldr r3, [r3, #0] + 8026c72: 667b str r3, [r7, #100] ; 0x64 uint32_t result; #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026c44: 6e7b ldr r3, [r7, #100] ; 0x64 - 8026c46: fa93 f3a3 rbit r3, r3 - 8026c4a: 663b str r3, [r7, #96] ; 0x60 + 8026c74: 6e7b ldr r3, [r7, #100] ; 0x64 + 8026c76: fa93 f3a3 rbit r3, r3 + 8026c7a: 663b str r3, [r7, #96] ; 0x60 result |= value & 1U; s--; } result <<= s; /* shift when v's highest bits are zero */ #endif return result; - 8026c4c: 6e3b ldr r3, [r7, #96] ; 0x60 - 8026c4e: 66bb str r3, [r7, #104] ; 0x68 + 8026c7c: 6e3b ldr r3, [r7, #96] ; 0x60 + 8026c7e: 66bb str r3, [r7, #104] ; 0x68 optimisations using the logic "value was passed to __builtin_clz, so it is non-zero". ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a single CLZ instruction. */ if (value == 0U) - 8026c50: 6ebb ldr r3, [r7, #104] ; 0x68 - 8026c52: 2b00 cmp r3, #0 - 8026c54: d101 bne.n 8026c5a + 8026c80: 6ebb ldr r3, [r7, #104] ; 0x68 + 8026c82: 2b00 cmp r3, #0 + 8026c84: d101 bne.n 8026c8a { return 32U; - 8026c56: 2320 movs r3, #32 - 8026c58: e003 b.n 8026c62 + 8026c86: 2320 movs r3, #32 + 8026c88: e003 b.n 8026c92 } return __builtin_clz(value); - 8026c5a: 6ebb ldr r3, [r7, #104] ; 0x68 - 8026c5c: fab3 f383 clz r3, r3 - 8026c60: b2db uxtb r3, r3 - 8026c62: f003 031f and.w r3, r3, #31 - 8026c66: 2201 movs r2, #1 - 8026c68: fa02 f303 lsl.w r3, r2, r3 - 8026c6c: 687a ldr r2, [r7, #4] - 8026c6e: 6812 ldr r2, [r2, #0] - 8026c70: 69d1 ldr r1, [r2, #28] - 8026c72: 687a ldr r2, [r7, #4] - 8026c74: 6812 ldr r2, [r2, #0] - 8026c76: 430b orrs r3, r1 - 8026c78: 61d3 str r3, [r2, #28] + 8026c8a: 6ebb ldr r3, [r7, #104] ; 0x68 + 8026c8c: fab3 f383 clz r3, r3 + 8026c90: b2db uxtb r3, r3 + 8026c92: f003 031f and.w r3, r3, #31 + 8026c96: 2201 movs r2, #1 + 8026c98: fa02 f303 lsl.w r3, r2, r3 + 8026c9c: 687a ldr r2, [r7, #4] + 8026c9e: 6812 ldr r2, [r2, #0] + 8026ca0: 69d1 ldr r1, [r2, #28] + 8026ca2: 687a ldr r2, [r7, #4] + 8026ca4: 6812 ldr r2, [r2, #0] + 8026ca6: 430b orrs r3, r1 + 8026ca8: 61d3 str r3, [r2, #28] #endif /* ADC_VER_V5_V90 */ /* Set ADC group regular sequence: channel on the selected scan sequence rank */ LL_ADC_REG_SetSequencerRanks(hadc->Instance, sConfig->Rank, sConfig->Channel); - 8026c7a: 687b ldr r3, [r7, #4] - 8026c7c: 6818 ldr r0, [r3, #0] - 8026c7e: 683b ldr r3, [r7, #0] - 8026c80: 6859 ldr r1, [r3, #4] - 8026c82: 683b ldr r3, [r7, #0] - 8026c84: 681b ldr r3, [r3, #0] - 8026c86: 461a mov r2, r3 - 8026c88: f7ff fa6f bl 802616a + 8026caa: 687b ldr r3, [r7, #4] + 8026cac: 6818 ldr r0, [r3, #0] + 8026cae: 683b ldr r3, [r7, #0] + 8026cb0: 6859 ldr r1, [r3, #4] + 8026cb2: 683b ldr r3, [r7, #0] + 8026cb4: 681b ldr r3, [r3, #0] + 8026cb6: 461a mov r2, r3 + 8026cb8: f7ff fa6f bl 802619a /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular group: */ /* - Channel sampling time */ /* - Channel offset */ tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 8026c8c: 687b ldr r3, [r7, #4] - 8026c8e: 681b ldr r3, [r3, #0] - 8026c90: 4618 mov r0, r3 - 8026c92: f7ff fbc5 bl 8026420 - 8026c96: 67b8 str r0, [r7, #120] ; 0x78 + 8026cbc: 687b ldr r3, [r7, #4] + 8026cbe: 681b ldr r3, [r3, #0] + 8026cc0: 4618 mov r0, r3 + 8026cc2: f7ff fbc5 bl 8026450 + 8026cc6: 67b8 str r0, [r7, #120] ; 0x78 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); - 8026c98: 687b ldr r3, [r7, #4] - 8026c9a: 681b ldr r3, [r3, #0] - 8026c9c: 4618 mov r0, r3 - 8026c9e: f7ff fbe7 bl 8026470 - 8026ca2: 6778 str r0, [r7, #116] ; 0x74 + 8026cc8: 687b ldr r3, [r7, #4] + 8026cca: 681b ldr r3, [r3, #0] + 8026ccc: 4618 mov r0, r3 + 8026cce: f7ff fbe7 bl 80264a0 + 8026cd2: 6778 str r0, [r7, #116] ; 0x74 if ((tmp_adc_is_conversion_on_going_regular == 0UL) - 8026ca4: 6fbb ldr r3, [r7, #120] ; 0x78 - 8026ca6: 2b00 cmp r3, #0 - 8026ca8: f040 80b3 bne.w 8026e12 + 8026cd4: 6fbb ldr r3, [r7, #120] ; 0x78 + 8026cd6: 2b00 cmp r3, #0 + 8026cd8: f040 80b3 bne.w 8026e42 && (tmp_adc_is_conversion_on_going_injected == 0UL) - 8026cac: 6f7b ldr r3, [r7, #116] ; 0x74 - 8026cae: 2b00 cmp r3, #0 - 8026cb0: f040 80af bne.w 8026e12 + 8026cdc: 6f7b ldr r3, [r7, #116] ; 0x74 + 8026cde: 2b00 cmp r3, #0 + 8026ce0: f040 80af bne.w 8026e42 ) { /* Set sampling time of the selected ADC channel */ LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfig->Channel, sConfig->SamplingTime); - 8026cb4: 687b ldr r3, [r7, #4] - 8026cb6: 6818 ldr r0, [r3, #0] - 8026cb8: 683b ldr r3, [r7, #0] - 8026cba: 6819 ldr r1, [r3, #0] - 8026cbc: 683b ldr r3, [r7, #0] - 8026cbe: 689b ldr r3, [r3, #8] - 8026cc0: 461a mov r2, r3 - 8026cc2: f7ff fa7e bl 80261c2 + 8026ce4: 687b ldr r3, [r7, #4] + 8026ce6: 6818 ldr r0, [r3, #0] + 8026ce8: 683b ldr r3, [r7, #0] + 8026cea: 6819 ldr r1, [r3, #0] + 8026cec: 683b ldr r3, [r7, #0] + 8026cee: 689b ldr r3, [r3, #8] + 8026cf0: 461a mov r2, r3 + 8026cf2: f7ff fa7e bl 80261f2 tmpOffsetShifted = ADC3_OFFSET_SHIFT_RESOLUTION(hadc, (uint32_t)sConfig->Offset); } else #endif /* ADC_VER_V5_V90 */ { tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, (uint32_t)sConfig->Offset); - 8026cc6: 4b6a ldr r3, [pc, #424] ; (8026e70 ) - 8026cc8: 681b ldr r3, [r3, #0] - 8026cca: f003 4370 and.w r3, r3, #4026531840 ; 0xf0000000 - 8026cce: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8026cd2: d10b bne.n 8026cec - 8026cd4: 683b ldr r3, [r7, #0] - 8026cd6: 695a ldr r2, [r3, #20] - 8026cd8: 687b ldr r3, [r7, #4] - 8026cda: 681b ldr r3, [r3, #0] - 8026cdc: 68db ldr r3, [r3, #12] - 8026cde: 089b lsrs r3, r3, #2 - 8026ce0: f003 0307 and.w r3, r3, #7 - 8026ce4: 005b lsls r3, r3, #1 - 8026ce6: fa02 f303 lsl.w r3, r2, r3 - 8026cea: e01d b.n 8026d28 - 8026cec: 687b ldr r3, [r7, #4] - 8026cee: 681b ldr r3, [r3, #0] - 8026cf0: 68db ldr r3, [r3, #12] - 8026cf2: f003 0310 and.w r3, r3, #16 - 8026cf6: 2b00 cmp r3, #0 - 8026cf8: d10b bne.n 8026d12 - 8026cfa: 683b ldr r3, [r7, #0] - 8026cfc: 695a ldr r2, [r3, #20] - 8026cfe: 687b ldr r3, [r7, #4] - 8026d00: 681b ldr r3, [r3, #0] - 8026d02: 68db ldr r3, [r3, #12] - 8026d04: 089b lsrs r3, r3, #2 - 8026d06: f003 0307 and.w r3, r3, #7 - 8026d0a: 005b lsls r3, r3, #1 - 8026d0c: fa02 f303 lsl.w r3, r2, r3 - 8026d10: e00a b.n 8026d28 - 8026d12: 683b ldr r3, [r7, #0] - 8026d14: 695a ldr r2, [r3, #20] - 8026d16: 687b ldr r3, [r7, #4] - 8026d18: 681b ldr r3, [r3, #0] - 8026d1a: 68db ldr r3, [r3, #12] - 8026d1c: 089b lsrs r3, r3, #2 - 8026d1e: f003 0304 and.w r3, r3, #4 - 8026d22: 005b lsls r3, r3, #1 - 8026d24: fa02 f303 lsl.w r3, r2, r3 - 8026d28: 673b str r3, [r7, #112] ; 0x70 + 8026cf6: 4b6a ldr r3, [pc, #424] ; (8026ea0 ) + 8026cf8: 681b ldr r3, [r3, #0] + 8026cfa: f003 4370 and.w r3, r3, #4026531840 ; 0xf0000000 + 8026cfe: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8026d02: d10b bne.n 8026d1c + 8026d04: 683b ldr r3, [r7, #0] + 8026d06: 695a ldr r2, [r3, #20] + 8026d08: 687b ldr r3, [r7, #4] + 8026d0a: 681b ldr r3, [r3, #0] + 8026d0c: 68db ldr r3, [r3, #12] + 8026d0e: 089b lsrs r3, r3, #2 + 8026d10: f003 0307 and.w r3, r3, #7 + 8026d14: 005b lsls r3, r3, #1 + 8026d16: fa02 f303 lsl.w r3, r2, r3 + 8026d1a: e01d b.n 8026d58 + 8026d1c: 687b ldr r3, [r7, #4] + 8026d1e: 681b ldr r3, [r3, #0] + 8026d20: 68db ldr r3, [r3, #12] + 8026d22: f003 0310 and.w r3, r3, #16 + 8026d26: 2b00 cmp r3, #0 + 8026d28: d10b bne.n 8026d42 + 8026d2a: 683b ldr r3, [r7, #0] + 8026d2c: 695a ldr r2, [r3, #20] + 8026d2e: 687b ldr r3, [r7, #4] + 8026d30: 681b ldr r3, [r3, #0] + 8026d32: 68db ldr r3, [r3, #12] + 8026d34: 089b lsrs r3, r3, #2 + 8026d36: f003 0307 and.w r3, r3, #7 + 8026d3a: 005b lsls r3, r3, #1 + 8026d3c: fa02 f303 lsl.w r3, r2, r3 + 8026d40: e00a b.n 8026d58 + 8026d42: 683b ldr r3, [r7, #0] + 8026d44: 695a ldr r2, [r3, #20] + 8026d46: 687b ldr r3, [r7, #4] + 8026d48: 681b ldr r3, [r3, #0] + 8026d4a: 68db ldr r3, [r3, #12] + 8026d4c: 089b lsrs r3, r3, #2 + 8026d4e: f003 0304 and.w r3, r3, #4 + 8026d52: 005b lsls r3, r3, #1 + 8026d54: fa02 f303 lsl.w r3, r2, r3 + 8026d58: 673b str r3, [r7, #112] ; 0x70 } if (sConfig->OffsetNumber != ADC_OFFSET_NONE) - 8026d2a: 683b ldr r3, [r7, #0] - 8026d2c: 691b ldr r3, [r3, #16] - 8026d2e: 2b04 cmp r3, #4 - 8026d30: d027 beq.n 8026d82 + 8026d5a: 683b ldr r3, [r7, #0] + 8026d5c: 691b ldr r3, [r3, #16] + 8026d5e: 2b04 cmp r3, #4 + 8026d60: d027 beq.n 8026db2 { /* Set ADC selected offset number */ LL_ADC_SetOffset(hadc->Instance, sConfig->OffsetNumber, sConfig->Channel, tmpOffsetShifted); - 8026d32: 687b ldr r3, [r7, #4] - 8026d34: 6818 ldr r0, [r3, #0] - 8026d36: 683b ldr r3, [r7, #0] - 8026d38: 6919 ldr r1, [r3, #16] - 8026d3a: 683b ldr r3, [r7, #0] - 8026d3c: 681a ldr r2, [r3, #0] - 8026d3e: 6f3b ldr r3, [r7, #112] ; 0x70 - 8026d40: f7ff f9ac bl 802609c + 8026d62: 687b ldr r3, [r7, #4] + 8026d64: 6818 ldr r0, [r3, #0] + 8026d66: 683b ldr r3, [r7, #0] + 8026d68: 6919 ldr r1, [r3, #16] + 8026d6a: 683b ldr r3, [r7, #0] + 8026d6c: 681a ldr r2, [r3, #0] + 8026d6e: 6f3b ldr r3, [r7, #112] ; 0x70 + 8026d70: f7ff f9ac bl 80260cc else #endif /* ADC_VER_V5_V90 */ { assert_param(IS_FUNCTIONAL_STATE(sConfig->OffsetSignedSaturation)); /* Set ADC selected offset signed saturation */ LL_ADC_SetOffsetSignedSaturation(hadc->Instance, sConfig->OffsetNumber, (sConfig->OffsetSignedSaturation == ENABLE) ? LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE : LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE); - 8026d44: 687b ldr r3, [r7, #4] - 8026d46: 6818 ldr r0, [r3, #0] - 8026d48: 683b ldr r3, [r7, #0] - 8026d4a: 6919 ldr r1, [r3, #16] - 8026d4c: 683b ldr r3, [r7, #0] - 8026d4e: 7e5b ldrb r3, [r3, #25] - 8026d50: 2b01 cmp r3, #1 - 8026d52: d102 bne.n 8026d5a - 8026d54: f04f 4300 mov.w r3, #2147483648 ; 0x80000000 - 8026d58: e000 b.n 8026d5c - 8026d5a: 2300 movs r3, #0 - 8026d5c: 461a mov r2, r3 - 8026d5e: f7ff f9d6 bl 802610e + 8026d74: 687b ldr r3, [r7, #4] + 8026d76: 6818 ldr r0, [r3, #0] + 8026d78: 683b ldr r3, [r7, #0] + 8026d7a: 6919 ldr r1, [r3, #16] + 8026d7c: 683b ldr r3, [r7, #0] + 8026d7e: 7e5b ldrb r3, [r3, #25] + 8026d80: 2b01 cmp r3, #1 + 8026d82: d102 bne.n 8026d8a + 8026d84: f04f 4300 mov.w r3, #2147483648 ; 0x80000000 + 8026d88: e000 b.n 8026d8c + 8026d8a: 2300 movs r3, #0 + 8026d8c: 461a mov r2, r3 + 8026d8e: f7ff f9d6 bl 802613e assert_param(IS_FUNCTIONAL_STATE(sConfig->OffsetRightShift)); /* Set ADC selected offset right shift */ LL_ADC_SetDataRightShift(hadc->Instance, sConfig->OffsetNumber, (sConfig->OffsetRightShift == ENABLE) ? LL_ADC_OFFSET_RSHIFT_ENABLE : LL_ADC_OFFSET_RSHIFT_DISABLE); - 8026d62: 687b ldr r3, [r7, #4] - 8026d64: 6818 ldr r0, [r3, #0] - 8026d66: 683b ldr r3, [r7, #0] - 8026d68: 6919 ldr r1, [r3, #16] - 8026d6a: 683b ldr r3, [r7, #0] - 8026d6c: 7e1b ldrb r3, [r3, #24] - 8026d6e: 2b01 cmp r3, #1 - 8026d70: d102 bne.n 8026d78 - 8026d72: f44f 6300 mov.w r3, #2048 ; 0x800 - 8026d76: e000 b.n 8026d7a - 8026d78: 2300 movs r3, #0 - 8026d7a: 461a mov r2, r3 - 8026d7c: f7ff f9ae bl 80260dc - 8026d80: e047 b.n 8026e12 + 8026d92: 687b ldr r3, [r7, #4] + 8026d94: 6818 ldr r0, [r3, #0] + 8026d96: 683b ldr r3, [r7, #0] + 8026d98: 6919 ldr r1, [r3, #16] + 8026d9a: 683b ldr r3, [r7, #0] + 8026d9c: 7e1b ldrb r3, [r3, #24] + 8026d9e: 2b01 cmp r3, #1 + 8026da0: d102 bne.n 8026da8 + 8026da2: f44f 6300 mov.w r3, #2048 ; 0x800 + 8026da6: e000 b.n 8026daa + 8026da8: 2300 movs r3, #0 + 8026daa: 461a mov r2, r3 + 8026dac: f7ff f9ae bl 802610c + 8026db0: e047 b.n 8026e42 } } else #endif /* ADC_VER_V5_V90 */ { if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8026d82: 687b ldr r3, [r7, #4] - 8026d84: 681b ldr r3, [r3, #0] - 8026d86: 6e1b ldr r3, [r3, #96] ; 0x60 - 8026d88: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026d8c: 683b ldr r3, [r7, #0] - 8026d8e: 681b ldr r3, [r3, #0] - 8026d90: 069b lsls r3, r3, #26 - 8026d92: 429a cmp r2, r3 - 8026d94: d107 bne.n 8026da6 + 8026db2: 687b ldr r3, [r7, #4] + 8026db4: 681b ldr r3, [r3, #0] + 8026db6: 6e1b ldr r3, [r3, #96] ; 0x60 + 8026db8: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026dbc: 683b ldr r3, [r7, #0] + 8026dbe: 681b ldr r3, [r3, #0] + 8026dc0: 069b lsls r3, r3, #26 + 8026dc2: 429a cmp r2, r3 + 8026dc4: d107 bne.n 8026dd6 { CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_SSATE); - 8026d96: 687b ldr r3, [r7, #4] - 8026d98: 681b ldr r3, [r3, #0] - 8026d9a: 6e1a ldr r2, [r3, #96] ; 0x60 - 8026d9c: 687b ldr r3, [r7, #4] - 8026d9e: 681b ldr r3, [r3, #0] - 8026da0: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8026da4: 661a str r2, [r3, #96] ; 0x60 + 8026dc6: 687b ldr r3, [r7, #4] + 8026dc8: 681b ldr r3, [r3, #0] + 8026dca: 6e1a ldr r2, [r3, #96] ; 0x60 + 8026dcc: 687b ldr r3, [r7, #4] + 8026dce: 681b ldr r3, [r3, #0] + 8026dd0: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 + 8026dd4: 661a str r2, [r3, #96] ; 0x60 } if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8026da6: 687b ldr r3, [r7, #4] - 8026da8: 681b ldr r3, [r3, #0] - 8026daa: 6e5b ldr r3, [r3, #100] ; 0x64 - 8026dac: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026db0: 683b ldr r3, [r7, #0] - 8026db2: 681b ldr r3, [r3, #0] - 8026db4: 069b lsls r3, r3, #26 - 8026db6: 429a cmp r2, r3 - 8026db8: d107 bne.n 8026dca + 8026dd6: 687b ldr r3, [r7, #4] + 8026dd8: 681b ldr r3, [r3, #0] + 8026dda: 6e5b ldr r3, [r3, #100] ; 0x64 + 8026ddc: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026de0: 683b ldr r3, [r7, #0] + 8026de2: 681b ldr r3, [r3, #0] + 8026de4: 069b lsls r3, r3, #26 + 8026de6: 429a cmp r2, r3 + 8026de8: d107 bne.n 8026dfa { CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_SSATE); - 8026dba: 687b ldr r3, [r7, #4] - 8026dbc: 681b ldr r3, [r3, #0] - 8026dbe: 6e5a ldr r2, [r3, #100] ; 0x64 - 8026dc0: 687b ldr r3, [r7, #4] - 8026dc2: 681b ldr r3, [r3, #0] - 8026dc4: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8026dc8: 665a str r2, [r3, #100] ; 0x64 + 8026dea: 687b ldr r3, [r7, #4] + 8026dec: 681b ldr r3, [r3, #0] + 8026dee: 6e5a ldr r2, [r3, #100] ; 0x64 + 8026df0: 687b ldr r3, [r7, #4] + 8026df2: 681b ldr r3, [r3, #0] + 8026df4: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 + 8026df8: 665a str r2, [r3, #100] ; 0x64 } if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8026dca: 687b ldr r3, [r7, #4] - 8026dcc: 681b ldr r3, [r3, #0] - 8026dce: 6e9b ldr r3, [r3, #104] ; 0x68 - 8026dd0: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026dd4: 683b ldr r3, [r7, #0] - 8026dd6: 681b ldr r3, [r3, #0] - 8026dd8: 069b lsls r3, r3, #26 - 8026dda: 429a cmp r2, r3 - 8026ddc: d107 bne.n 8026dee + 8026dfa: 687b ldr r3, [r7, #4] + 8026dfc: 681b ldr r3, [r3, #0] + 8026dfe: 6e9b ldr r3, [r3, #104] ; 0x68 + 8026e00: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026e04: 683b ldr r3, [r7, #0] + 8026e06: 681b ldr r3, [r3, #0] + 8026e08: 069b lsls r3, r3, #26 + 8026e0a: 429a cmp r2, r3 + 8026e0c: d107 bne.n 8026e1e { CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_SSATE); - 8026dde: 687b ldr r3, [r7, #4] - 8026de0: 681b ldr r3, [r3, #0] - 8026de2: 6e9a ldr r2, [r3, #104] ; 0x68 - 8026de4: 687b ldr r3, [r7, #4] - 8026de6: 681b ldr r3, [r3, #0] - 8026de8: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8026dec: 669a str r2, [r3, #104] ; 0x68 + 8026e0e: 687b ldr r3, [r7, #4] + 8026e10: 681b ldr r3, [r3, #0] + 8026e12: 6e9a ldr r2, [r3, #104] ; 0x68 + 8026e14: 687b ldr r3, [r7, #4] + 8026e16: 681b ldr r3, [r3, #0] + 8026e18: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 + 8026e1c: 669a str r2, [r3, #104] ; 0x68 } if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8026dee: 687b ldr r3, [r7, #4] - 8026df0: 681b ldr r3, [r3, #0] - 8026df2: 6edb ldr r3, [r3, #108] ; 0x6c - 8026df4: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026df8: 683b ldr r3, [r7, #0] - 8026dfa: 681b ldr r3, [r3, #0] - 8026dfc: 069b lsls r3, r3, #26 - 8026dfe: 429a cmp r2, r3 - 8026e00: d107 bne.n 8026e12 + 8026e1e: 687b ldr r3, [r7, #4] + 8026e20: 681b ldr r3, [r3, #0] + 8026e22: 6edb ldr r3, [r3, #108] ; 0x6c + 8026e24: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026e28: 683b ldr r3, [r7, #0] + 8026e2a: 681b ldr r3, [r3, #0] + 8026e2c: 069b lsls r3, r3, #26 + 8026e2e: 429a cmp r2, r3 + 8026e30: d107 bne.n 8026e42 { CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_SSATE); - 8026e02: 687b ldr r3, [r7, #4] - 8026e04: 681b ldr r3, [r3, #0] - 8026e06: 6eda ldr r2, [r3, #108] ; 0x6c - 8026e08: 687b ldr r3, [r7, #4] - 8026e0a: 681b ldr r3, [r3, #0] - 8026e0c: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8026e10: 66da str r2, [r3, #108] ; 0x6c + 8026e32: 687b ldr r3, [r7, #4] + 8026e34: 681b ldr r3, [r3, #0] + 8026e36: 6eda ldr r2, [r3, #108] ; 0x6c + 8026e38: 687b ldr r3, [r7, #4] + 8026e3a: 681b ldr r3, [r3, #0] + 8026e3c: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 + 8026e40: 66da str r2, [r3, #108] ; 0x6c /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated only when ADC is disabled: */ /* - Single or differential mode */ /* - Internal measurement channels: Vbat/VrefInt/TempSensor */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 8026e12: 687b ldr r3, [r7, #4] - 8026e14: 681b ldr r3, [r3, #0] - 8026e16: 4618 mov r0, r3 - 8026e18: f7ff fab4 bl 8026384 - 8026e1c: 4603 mov r3, r0 - 8026e1e: 2b00 cmp r3, #0 - 8026e20: f040 820d bne.w 802723e + 8026e42: 687b ldr r3, [r7, #4] + 8026e44: 681b ldr r3, [r3, #0] + 8026e46: 4618 mov r0, r3 + 8026e48: f7ff fab4 bl 80263b4 + 8026e4c: 4603 mov r3, r0 + 8026e4e: 2b00 cmp r3, #0 + 8026e50: f040 820d bne.w 802726e { /* Set mode single-ended or differential input of the selected ADC channel */ LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfig->Channel, sConfig->SingleDiff); - 8026e24: 687b ldr r3, [r7, #4] - 8026e26: 6818 ldr r0, [r3, #0] - 8026e28: 683b ldr r3, [r7, #0] - 8026e2a: 6819 ldr r1, [r3, #0] - 8026e2c: 683b ldr r3, [r7, #0] - 8026e2e: 68db ldr r3, [r3, #12] - 8026e30: 461a mov r2, r3 - 8026e32: f7ff f9f1 bl 8026218 + 8026e54: 687b ldr r3, [r7, #4] + 8026e56: 6818 ldr r0, [r3, #0] + 8026e58: 683b ldr r3, [r7, #0] + 8026e5a: 6819 ldr r1, [r3, #0] + 8026e5c: 683b ldr r3, [r7, #0] + 8026e5e: 68db ldr r3, [r3, #12] + 8026e60: 461a mov r2, r3 + 8026e62: f7ff f9f1 bl 8026248 /* Configuration of differential mode */ if (sConfig->SingleDiff == ADC_DIFFERENTIAL_ENDED) - 8026e36: 683b ldr r3, [r7, #0] - 8026e38: 68db ldr r3, [r3, #12] - 8026e3a: 4a0c ldr r2, [pc, #48] ; (8026e6c ) - 8026e3c: 4293 cmp r3, r2 - 8026e3e: f040 8133 bne.w 80270a8 + 8026e66: 683b ldr r3, [r7, #0] + 8026e68: 68db ldr r3, [r3, #12] + 8026e6a: 4a0c ldr r2, [pc, #48] ; (8026e9c ) + 8026e6c: 4293 cmp r3, r2 + 8026e6e: f040 8133 bne.w 80270d8 { /* Set sampling time of the selected ADC channel */ /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range */ LL_ADC_SetChannelSamplingTime(hadc->Instance, - 8026e42: 687b ldr r3, [r7, #4] - 8026e44: 6818 ldr r0, [r3, #0] + 8026e72: 687b ldr r3, [r7, #4] + 8026e74: 6818 ldr r0, [r3, #0] (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) + 1UL) & 0x1FUL)), - 8026e46: 683b ldr r3, [r7, #0] - 8026e48: 681b ldr r3, [r3, #0] - 8026e4a: f3c3 0313 ubfx r3, r3, #0, #20 - 8026e4e: 2b00 cmp r3, #0 - 8026e50: d110 bne.n 8026e74 - 8026e52: 683b ldr r3, [r7, #0] - 8026e54: 681b ldr r3, [r3, #0] - 8026e56: 0e9b lsrs r3, r3, #26 - 8026e58: 3301 adds r3, #1 - 8026e5a: f003 031f and.w r3, r3, #31 - 8026e5e: 2b09 cmp r3, #9 - 8026e60: bf94 ite ls - 8026e62: 2301 movls r3, #1 - 8026e64: 2300 movhi r3, #0 - 8026e66: b2db uxtb r3, r3 - 8026e68: e01e b.n 8026ea8 - 8026e6a: bf00 nop - 8026e6c: 47ff0000 .word 0x47ff0000 - 8026e70: 5c001000 .word 0x5c001000 - 8026e74: 683b ldr r3, [r7, #0] - 8026e76: 681b ldr r3, [r3, #0] - 8026e78: 65bb str r3, [r7, #88] ; 0x58 + 8026e76: 683b ldr r3, [r7, #0] + 8026e78: 681b ldr r3, [r3, #0] + 8026e7a: f3c3 0313 ubfx r3, r3, #0, #20 + 8026e7e: 2b00 cmp r3, #0 + 8026e80: d110 bne.n 8026ea4 + 8026e82: 683b ldr r3, [r7, #0] + 8026e84: 681b ldr r3, [r3, #0] + 8026e86: 0e9b lsrs r3, r3, #26 + 8026e88: 3301 adds r3, #1 + 8026e8a: f003 031f and.w r3, r3, #31 + 8026e8e: 2b09 cmp r3, #9 + 8026e90: bf94 ite ls + 8026e92: 2301 movls r3, #1 + 8026e94: 2300 movhi r3, #0 + 8026e96: b2db uxtb r3, r3 + 8026e98: e01e b.n 8026ed8 + 8026e9a: bf00 nop + 8026e9c: 47ff0000 .word 0x47ff0000 + 8026ea0: 5c001000 .word 0x5c001000 + 8026ea4: 683b ldr r3, [r7, #0] + 8026ea6: 681b ldr r3, [r3, #0] + 8026ea8: 65bb str r3, [r7, #88] ; 0x58 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026e7a: 6dbb ldr r3, [r7, #88] ; 0x58 - 8026e7c: fa93 f3a3 rbit r3, r3 - 8026e80: 657b str r3, [r7, #84] ; 0x54 + 8026eaa: 6dbb ldr r3, [r7, #88] ; 0x58 + 8026eac: fa93 f3a3 rbit r3, r3 + 8026eb0: 657b str r3, [r7, #84] ; 0x54 return result; - 8026e82: 6d7b ldr r3, [r7, #84] ; 0x54 - 8026e84: 65fb str r3, [r7, #92] ; 0x5c + 8026eb2: 6d7b ldr r3, [r7, #84] ; 0x54 + 8026eb4: 65fb str r3, [r7, #92] ; 0x5c if (value == 0U) - 8026e86: 6dfb ldr r3, [r7, #92] ; 0x5c - 8026e88: 2b00 cmp r3, #0 - 8026e8a: d101 bne.n 8026e90 + 8026eb6: 6dfb ldr r3, [r7, #92] ; 0x5c + 8026eb8: 2b00 cmp r3, #0 + 8026eba: d101 bne.n 8026ec0 return 32U; - 8026e8c: 2320 movs r3, #32 - 8026e8e: e003 b.n 8026e98 + 8026ebc: 2320 movs r3, #32 + 8026ebe: e003 b.n 8026ec8 return __builtin_clz(value); - 8026e90: 6dfb ldr r3, [r7, #92] ; 0x5c - 8026e92: fab3 f383 clz r3, r3 - 8026e96: b2db uxtb r3, r3 - 8026e98: 3301 adds r3, #1 - 8026e9a: f003 031f and.w r3, r3, #31 - 8026e9e: 2b09 cmp r3, #9 - 8026ea0: bf94 ite ls - 8026ea2: 2301 movls r3, #1 - 8026ea4: 2300 movhi r3, #0 - 8026ea6: b2db uxtb r3, r3 + 8026ec0: 6dfb ldr r3, [r7, #92] ; 0x5c + 8026ec2: fab3 f383 clz r3, r3 + 8026ec6: b2db uxtb r3, r3 + 8026ec8: 3301 adds r3, #1 + 8026eca: f003 031f and.w r3, r3, #31 + 8026ece: 2b09 cmp r3, #9 + 8026ed0: bf94 ite ls + 8026ed2: 2301 movls r3, #1 + 8026ed4: 2300 movhi r3, #0 + 8026ed6: b2db uxtb r3, r3 LL_ADC_SetChannelSamplingTime(hadc->Instance, - 8026ea8: 2b00 cmp r3, #0 - 8026eaa: d079 beq.n 8026fa0 + 8026ed8: 2b00 cmp r3, #0 + 8026eda: d079 beq.n 8026fd0 (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) + 1UL) & 0x1FUL)), - 8026eac: 683b ldr r3, [r7, #0] - 8026eae: 681b ldr r3, [r3, #0] - 8026eb0: f3c3 0313 ubfx r3, r3, #0, #20 - 8026eb4: 2b00 cmp r3, #0 - 8026eb6: d107 bne.n 8026ec8 - 8026eb8: 683b ldr r3, [r7, #0] - 8026eba: 681b ldr r3, [r3, #0] - 8026ebc: 0e9b lsrs r3, r3, #26 - 8026ebe: 3301 adds r3, #1 - 8026ec0: 069b lsls r3, r3, #26 - 8026ec2: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026ec6: e015 b.n 8026ef4 - 8026ec8: 683b ldr r3, [r7, #0] - 8026eca: 681b ldr r3, [r3, #0] - 8026ecc: 64fb str r3, [r7, #76] ; 0x4c + 8026edc: 683b ldr r3, [r7, #0] + 8026ede: 681b ldr r3, [r3, #0] + 8026ee0: f3c3 0313 ubfx r3, r3, #0, #20 + 8026ee4: 2b00 cmp r3, #0 + 8026ee6: d107 bne.n 8026ef8 + 8026ee8: 683b ldr r3, [r7, #0] + 8026eea: 681b ldr r3, [r3, #0] + 8026eec: 0e9b lsrs r3, r3, #26 + 8026eee: 3301 adds r3, #1 + 8026ef0: 069b lsls r3, r3, #26 + 8026ef2: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026ef6: e015 b.n 8026f24 + 8026ef8: 683b ldr r3, [r7, #0] + 8026efa: 681b ldr r3, [r3, #0] + 8026efc: 64fb str r3, [r7, #76] ; 0x4c __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026ece: 6cfb ldr r3, [r7, #76] ; 0x4c - 8026ed0: fa93 f3a3 rbit r3, r3 - 8026ed4: 64bb str r3, [r7, #72] ; 0x48 + 8026efe: 6cfb ldr r3, [r7, #76] ; 0x4c + 8026f00: fa93 f3a3 rbit r3, r3 + 8026f04: 64bb str r3, [r7, #72] ; 0x48 return result; - 8026ed6: 6cbb ldr r3, [r7, #72] ; 0x48 - 8026ed8: 653b str r3, [r7, #80] ; 0x50 + 8026f06: 6cbb ldr r3, [r7, #72] ; 0x48 + 8026f08: 653b str r3, [r7, #80] ; 0x50 if (value == 0U) - 8026eda: 6d3b ldr r3, [r7, #80] ; 0x50 - 8026edc: 2b00 cmp r3, #0 - 8026ede: d101 bne.n 8026ee4 + 8026f0a: 6d3b ldr r3, [r7, #80] ; 0x50 + 8026f0c: 2b00 cmp r3, #0 + 8026f0e: d101 bne.n 8026f14 return 32U; - 8026ee0: 2320 movs r3, #32 - 8026ee2: e003 b.n 8026eec + 8026f10: 2320 movs r3, #32 + 8026f12: e003 b.n 8026f1c return __builtin_clz(value); - 8026ee4: 6d3b ldr r3, [r7, #80] ; 0x50 - 8026ee6: fab3 f383 clz r3, r3 - 8026eea: b2db uxtb r3, r3 - 8026eec: 3301 adds r3, #1 - 8026eee: 069b lsls r3, r3, #26 - 8026ef0: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026ef4: 683b ldr r3, [r7, #0] - 8026ef6: 681b ldr r3, [r3, #0] - 8026ef8: f3c3 0313 ubfx r3, r3, #0, #20 - 8026efc: 2b00 cmp r3, #0 - 8026efe: d109 bne.n 8026f14 - 8026f00: 683b ldr r3, [r7, #0] - 8026f02: 681b ldr r3, [r3, #0] - 8026f04: 0e9b lsrs r3, r3, #26 - 8026f06: 3301 adds r3, #1 - 8026f08: f003 031f and.w r3, r3, #31 - 8026f0c: 2101 movs r1, #1 - 8026f0e: fa01 f303 lsl.w r3, r1, r3 - 8026f12: e017 b.n 8026f44 - 8026f14: 683b ldr r3, [r7, #0] - 8026f16: 681b ldr r3, [r3, #0] - 8026f18: 643b str r3, [r7, #64] ; 0x40 + 8026f14: 6d3b ldr r3, [r7, #80] ; 0x50 + 8026f16: fab3 f383 clz r3, r3 + 8026f1a: b2db uxtb r3, r3 + 8026f1c: 3301 adds r3, #1 + 8026f1e: 069b lsls r3, r3, #26 + 8026f20: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026f24: 683b ldr r3, [r7, #0] + 8026f26: 681b ldr r3, [r3, #0] + 8026f28: f3c3 0313 ubfx r3, r3, #0, #20 + 8026f2c: 2b00 cmp r3, #0 + 8026f2e: d109 bne.n 8026f44 + 8026f30: 683b ldr r3, [r7, #0] + 8026f32: 681b ldr r3, [r3, #0] + 8026f34: 0e9b lsrs r3, r3, #26 + 8026f36: 3301 adds r3, #1 + 8026f38: f003 031f and.w r3, r3, #31 + 8026f3c: 2101 movs r1, #1 + 8026f3e: fa01 f303 lsl.w r3, r1, r3 + 8026f42: e017 b.n 8026f74 + 8026f44: 683b ldr r3, [r7, #0] + 8026f46: 681b ldr r3, [r3, #0] + 8026f48: 643b str r3, [r7, #64] ; 0x40 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026f1a: 6c3b ldr r3, [r7, #64] ; 0x40 - 8026f1c: fa93 f3a3 rbit r3, r3 - 8026f20: 63fb str r3, [r7, #60] ; 0x3c + 8026f4a: 6c3b ldr r3, [r7, #64] ; 0x40 + 8026f4c: fa93 f3a3 rbit r3, r3 + 8026f50: 63fb str r3, [r7, #60] ; 0x3c return result; - 8026f22: 6bfb ldr r3, [r7, #60] ; 0x3c - 8026f24: 647b str r3, [r7, #68] ; 0x44 + 8026f52: 6bfb ldr r3, [r7, #60] ; 0x3c + 8026f54: 647b str r3, [r7, #68] ; 0x44 if (value == 0U) - 8026f26: 6c7b ldr r3, [r7, #68] ; 0x44 - 8026f28: 2b00 cmp r3, #0 - 8026f2a: d101 bne.n 8026f30 + 8026f56: 6c7b ldr r3, [r7, #68] ; 0x44 + 8026f58: 2b00 cmp r3, #0 + 8026f5a: d101 bne.n 8026f60 return 32U; - 8026f2c: 2320 movs r3, #32 - 8026f2e: e003 b.n 8026f38 + 8026f5c: 2320 movs r3, #32 + 8026f5e: e003 b.n 8026f68 return __builtin_clz(value); - 8026f30: 6c7b ldr r3, [r7, #68] ; 0x44 - 8026f32: fab3 f383 clz r3, r3 - 8026f36: b2db uxtb r3, r3 - 8026f38: 3301 adds r3, #1 - 8026f3a: f003 031f and.w r3, r3, #31 - 8026f3e: 2101 movs r1, #1 - 8026f40: fa01 f303 lsl.w r3, r1, r3 - 8026f44: ea42 0103 orr.w r1, r2, r3 - 8026f48: 683b ldr r3, [r7, #0] - 8026f4a: 681b ldr r3, [r3, #0] - 8026f4c: f3c3 0313 ubfx r3, r3, #0, #20 - 8026f50: 2b00 cmp r3, #0 - 8026f52: d10a bne.n 8026f6a - 8026f54: 683b ldr r3, [r7, #0] - 8026f56: 681b ldr r3, [r3, #0] - 8026f58: 0e9b lsrs r3, r3, #26 - 8026f5a: 3301 adds r3, #1 - 8026f5c: f003 021f and.w r2, r3, #31 - 8026f60: 4613 mov r3, r2 - 8026f62: 005b lsls r3, r3, #1 - 8026f64: 4413 add r3, r2 - 8026f66: 051b lsls r3, r3, #20 - 8026f68: e018 b.n 8026f9c - 8026f6a: 683b ldr r3, [r7, #0] - 8026f6c: 681b ldr r3, [r3, #0] - 8026f6e: 637b str r3, [r7, #52] ; 0x34 + 8026f60: 6c7b ldr r3, [r7, #68] ; 0x44 + 8026f62: fab3 f383 clz r3, r3 + 8026f66: b2db uxtb r3, r3 + 8026f68: 3301 adds r3, #1 + 8026f6a: f003 031f and.w r3, r3, #31 + 8026f6e: 2101 movs r1, #1 + 8026f70: fa01 f303 lsl.w r3, r1, r3 + 8026f74: ea42 0103 orr.w r1, r2, r3 + 8026f78: 683b ldr r3, [r7, #0] + 8026f7a: 681b ldr r3, [r3, #0] + 8026f7c: f3c3 0313 ubfx r3, r3, #0, #20 + 8026f80: 2b00 cmp r3, #0 + 8026f82: d10a bne.n 8026f9a + 8026f84: 683b ldr r3, [r7, #0] + 8026f86: 681b ldr r3, [r3, #0] + 8026f88: 0e9b lsrs r3, r3, #26 + 8026f8a: 3301 adds r3, #1 + 8026f8c: f003 021f and.w r2, r3, #31 + 8026f90: 4613 mov r3, r2 + 8026f92: 005b lsls r3, r3, #1 + 8026f94: 4413 add r3, r2 + 8026f96: 051b lsls r3, r3, #20 + 8026f98: e018 b.n 8026fcc + 8026f9a: 683b ldr r3, [r7, #0] + 8026f9c: 681b ldr r3, [r3, #0] + 8026f9e: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026f70: 6b7b ldr r3, [r7, #52] ; 0x34 - 8026f72: fa93 f3a3 rbit r3, r3 - 8026f76: 633b str r3, [r7, #48] ; 0x30 + 8026fa0: 6b7b ldr r3, [r7, #52] ; 0x34 + 8026fa2: fa93 f3a3 rbit r3, r3 + 8026fa6: 633b str r3, [r7, #48] ; 0x30 return result; - 8026f78: 6b3b ldr r3, [r7, #48] ; 0x30 - 8026f7a: 63bb str r3, [r7, #56] ; 0x38 + 8026fa8: 6b3b ldr r3, [r7, #48] ; 0x30 + 8026faa: 63bb str r3, [r7, #56] ; 0x38 if (value == 0U) - 8026f7c: 6bbb ldr r3, [r7, #56] ; 0x38 - 8026f7e: 2b00 cmp r3, #0 - 8026f80: d101 bne.n 8026f86 + 8026fac: 6bbb ldr r3, [r7, #56] ; 0x38 + 8026fae: 2b00 cmp r3, #0 + 8026fb0: d101 bne.n 8026fb6 return 32U; - 8026f82: 2320 movs r3, #32 - 8026f84: e003 b.n 8026f8e + 8026fb2: 2320 movs r3, #32 + 8026fb4: e003 b.n 8026fbe return __builtin_clz(value); - 8026f86: 6bbb ldr r3, [r7, #56] ; 0x38 - 8026f88: fab3 f383 clz r3, r3 - 8026f8c: b2db uxtb r3, r3 - 8026f8e: 3301 adds r3, #1 - 8026f90: f003 021f and.w r2, r3, #31 - 8026f94: 4613 mov r3, r2 - 8026f96: 005b lsls r3, r3, #1 - 8026f98: 4413 add r3, r2 - 8026f9a: 051b lsls r3, r3, #20 + 8026fb6: 6bbb ldr r3, [r7, #56] ; 0x38 + 8026fb8: fab3 f383 clz r3, r3 + 8026fbc: b2db uxtb r3, r3 + 8026fbe: 3301 adds r3, #1 + 8026fc0: f003 021f and.w r2, r3, #31 + 8026fc4: 4613 mov r3, r2 + 8026fc6: 005b lsls r3, r3, #1 + 8026fc8: 4413 add r3, r2 + 8026fca: 051b lsls r3, r3, #20 LL_ADC_SetChannelSamplingTime(hadc->Instance, - 8026f9c: 430b orrs r3, r1 - 8026f9e: e07e b.n 802709e + 8026fcc: 430b orrs r3, r1 + 8026fce: e07e b.n 80270ce (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) + 1UL) & 0x1FUL)), - 8026fa0: 683b ldr r3, [r7, #0] - 8026fa2: 681b ldr r3, [r3, #0] - 8026fa4: f3c3 0313 ubfx r3, r3, #0, #20 - 8026fa8: 2b00 cmp r3, #0 - 8026faa: d107 bne.n 8026fbc - 8026fac: 683b ldr r3, [r7, #0] - 8026fae: 681b ldr r3, [r3, #0] - 8026fb0: 0e9b lsrs r3, r3, #26 - 8026fb2: 3301 adds r3, #1 - 8026fb4: 069b lsls r3, r3, #26 - 8026fb6: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026fba: e015 b.n 8026fe8 - 8026fbc: 683b ldr r3, [r7, #0] - 8026fbe: 681b ldr r3, [r3, #0] - 8026fc0: 62bb str r3, [r7, #40] ; 0x28 + 8026fd0: 683b ldr r3, [r7, #0] + 8026fd2: 681b ldr r3, [r3, #0] + 8026fd4: f3c3 0313 ubfx r3, r3, #0, #20 + 8026fd8: 2b00 cmp r3, #0 + 8026fda: d107 bne.n 8026fec + 8026fdc: 683b ldr r3, [r7, #0] + 8026fde: 681b ldr r3, [r3, #0] + 8026fe0: 0e9b lsrs r3, r3, #26 + 8026fe2: 3301 adds r3, #1 + 8026fe4: 069b lsls r3, r3, #26 + 8026fe6: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026fea: e015 b.n 8027018 + 8026fec: 683b ldr r3, [r7, #0] + 8026fee: 681b ldr r3, [r3, #0] + 8026ff0: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026fc2: 6abb ldr r3, [r7, #40] ; 0x28 - 8026fc4: fa93 f3a3 rbit r3, r3 - 8026fc8: 627b str r3, [r7, #36] ; 0x24 + 8026ff2: 6abb ldr r3, [r7, #40] ; 0x28 + 8026ff4: fa93 f3a3 rbit r3, r3 + 8026ff8: 627b str r3, [r7, #36] ; 0x24 return result; - 8026fca: 6a7b ldr r3, [r7, #36] ; 0x24 - 8026fcc: 62fb str r3, [r7, #44] ; 0x2c + 8026ffa: 6a7b ldr r3, [r7, #36] ; 0x24 + 8026ffc: 62fb str r3, [r7, #44] ; 0x2c if (value == 0U) - 8026fce: 6afb ldr r3, [r7, #44] ; 0x2c - 8026fd0: 2b00 cmp r3, #0 - 8026fd2: d101 bne.n 8026fd8 + 8026ffe: 6afb ldr r3, [r7, #44] ; 0x2c + 8027000: 2b00 cmp r3, #0 + 8027002: d101 bne.n 8027008 return 32U; - 8026fd4: 2320 movs r3, #32 - 8026fd6: e003 b.n 8026fe0 + 8027004: 2320 movs r3, #32 + 8027006: e003 b.n 8027010 return __builtin_clz(value); - 8026fd8: 6afb ldr r3, [r7, #44] ; 0x2c - 8026fda: fab3 f383 clz r3, r3 - 8026fde: b2db uxtb r3, r3 - 8026fe0: 3301 adds r3, #1 - 8026fe2: 069b lsls r3, r3, #26 - 8026fe4: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026fe8: 683b ldr r3, [r7, #0] - 8026fea: 681b ldr r3, [r3, #0] - 8026fec: f3c3 0313 ubfx r3, r3, #0, #20 - 8026ff0: 2b00 cmp r3, #0 - 8026ff2: d109 bne.n 8027008 - 8026ff4: 683b ldr r3, [r7, #0] - 8026ff6: 681b ldr r3, [r3, #0] - 8026ff8: 0e9b lsrs r3, r3, #26 - 8026ffa: 3301 adds r3, #1 - 8026ffc: f003 031f and.w r3, r3, #31 - 8027000: 2101 movs r1, #1 - 8027002: fa01 f303 lsl.w r3, r1, r3 - 8027006: e017 b.n 8027038 - 8027008: 683b ldr r3, [r7, #0] - 802700a: 681b ldr r3, [r3, #0] - 802700c: 61fb str r3, [r7, #28] + 8027008: 6afb ldr r3, [r7, #44] ; 0x2c + 802700a: fab3 f383 clz r3, r3 + 802700e: b2db uxtb r3, r3 + 8027010: 3301 adds r3, #1 + 8027012: 069b lsls r3, r3, #26 + 8027014: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8027018: 683b ldr r3, [r7, #0] + 802701a: 681b ldr r3, [r3, #0] + 802701c: f3c3 0313 ubfx r3, r3, #0, #20 + 8027020: 2b00 cmp r3, #0 + 8027022: d109 bne.n 8027038 + 8027024: 683b ldr r3, [r7, #0] + 8027026: 681b ldr r3, [r3, #0] + 8027028: 0e9b lsrs r3, r3, #26 + 802702a: 3301 adds r3, #1 + 802702c: f003 031f and.w r3, r3, #31 + 8027030: 2101 movs r1, #1 + 8027032: fa01 f303 lsl.w r3, r1, r3 + 8027036: e017 b.n 8027068 + 8027038: 683b ldr r3, [r7, #0] + 802703a: 681b ldr r3, [r3, #0] + 802703c: 61fb str r3, [r7, #28] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 802700e: 69fb ldr r3, [r7, #28] - 8027010: fa93 f3a3 rbit r3, r3 - 8027014: 61bb str r3, [r7, #24] + 802703e: 69fb ldr r3, [r7, #28] + 8027040: fa93 f3a3 rbit r3, r3 + 8027044: 61bb str r3, [r7, #24] return result; - 8027016: 69bb ldr r3, [r7, #24] - 8027018: 623b str r3, [r7, #32] + 8027046: 69bb ldr r3, [r7, #24] + 8027048: 623b str r3, [r7, #32] if (value == 0U) - 802701a: 6a3b ldr r3, [r7, #32] - 802701c: 2b00 cmp r3, #0 - 802701e: d101 bne.n 8027024 + 802704a: 6a3b ldr r3, [r7, #32] + 802704c: 2b00 cmp r3, #0 + 802704e: d101 bne.n 8027054 return 32U; - 8027020: 2320 movs r3, #32 - 8027022: e003 b.n 802702c + 8027050: 2320 movs r3, #32 + 8027052: e003 b.n 802705c return __builtin_clz(value); - 8027024: 6a3b ldr r3, [r7, #32] - 8027026: fab3 f383 clz r3, r3 - 802702a: b2db uxtb r3, r3 - 802702c: 3301 adds r3, #1 - 802702e: f003 031f and.w r3, r3, #31 - 8027032: 2101 movs r1, #1 - 8027034: fa01 f303 lsl.w r3, r1, r3 - 8027038: ea42 0103 orr.w r1, r2, r3 - 802703c: 683b ldr r3, [r7, #0] - 802703e: 681b ldr r3, [r3, #0] - 8027040: f3c3 0313 ubfx r3, r3, #0, #20 - 8027044: 2b00 cmp r3, #0 - 8027046: d10d bne.n 8027064 - 8027048: 683b ldr r3, [r7, #0] - 802704a: 681b ldr r3, [r3, #0] - 802704c: 0e9b lsrs r3, r3, #26 - 802704e: 3301 adds r3, #1 - 8027050: f003 021f and.w r2, r3, #31 - 8027054: 4613 mov r3, r2 - 8027056: 005b lsls r3, r3, #1 - 8027058: 4413 add r3, r2 - 802705a: 3b1e subs r3, #30 - 802705c: 051b lsls r3, r3, #20 - 802705e: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 - 8027062: e01b b.n 802709c - 8027064: 683b ldr r3, [r7, #0] - 8027066: 681b ldr r3, [r3, #0] - 8027068: 613b str r3, [r7, #16] + 8027054: 6a3b ldr r3, [r7, #32] + 8027056: fab3 f383 clz r3, r3 + 802705a: b2db uxtb r3, r3 + 802705c: 3301 adds r3, #1 + 802705e: f003 031f and.w r3, r3, #31 + 8027062: 2101 movs r1, #1 + 8027064: fa01 f303 lsl.w r3, r1, r3 + 8027068: ea42 0103 orr.w r1, r2, r3 + 802706c: 683b ldr r3, [r7, #0] + 802706e: 681b ldr r3, [r3, #0] + 8027070: f3c3 0313 ubfx r3, r3, #0, #20 + 8027074: 2b00 cmp r3, #0 + 8027076: d10d bne.n 8027094 + 8027078: 683b ldr r3, [r7, #0] + 802707a: 681b ldr r3, [r3, #0] + 802707c: 0e9b lsrs r3, r3, #26 + 802707e: 3301 adds r3, #1 + 8027080: f003 021f and.w r2, r3, #31 + 8027084: 4613 mov r3, r2 + 8027086: 005b lsls r3, r3, #1 + 8027088: 4413 add r3, r2 + 802708a: 3b1e subs r3, #30 + 802708c: 051b lsls r3, r3, #20 + 802708e: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 + 8027092: e01b b.n 80270cc + 8027094: 683b ldr r3, [r7, #0] + 8027096: 681b ldr r3, [r3, #0] + 8027098: 613b str r3, [r7, #16] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 802706a: 693b ldr r3, [r7, #16] - 802706c: fa93 f3a3 rbit r3, r3 - 8027070: 60fb str r3, [r7, #12] + 802709a: 693b ldr r3, [r7, #16] + 802709c: fa93 f3a3 rbit r3, r3 + 80270a0: 60fb str r3, [r7, #12] return result; - 8027072: 68fb ldr r3, [r7, #12] - 8027074: 617b str r3, [r7, #20] + 80270a2: 68fb ldr r3, [r7, #12] + 80270a4: 617b str r3, [r7, #20] if (value == 0U) - 8027076: 697b ldr r3, [r7, #20] - 8027078: 2b00 cmp r3, #0 - 802707a: d101 bne.n 8027080 + 80270a6: 697b ldr r3, [r7, #20] + 80270a8: 2b00 cmp r3, #0 + 80270aa: d101 bne.n 80270b0 return 32U; - 802707c: 2320 movs r3, #32 - 802707e: e003 b.n 8027088 + 80270ac: 2320 movs r3, #32 + 80270ae: e003 b.n 80270b8 return __builtin_clz(value); - 8027080: 697b ldr r3, [r7, #20] - 8027082: fab3 f383 clz r3, r3 - 8027086: b2db uxtb r3, r3 - 8027088: 3301 adds r3, #1 - 802708a: f003 021f and.w r2, r3, #31 - 802708e: 4613 mov r3, r2 - 8027090: 005b lsls r3, r3, #1 - 8027092: 4413 add r3, r2 - 8027094: 3b1e subs r3, #30 - 8027096: 051b lsls r3, r3, #20 - 8027098: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 + 80270b0: 697b ldr r3, [r7, #20] + 80270b2: fab3 f383 clz r3, r3 + 80270b6: b2db uxtb r3, r3 + 80270b8: 3301 adds r3, #1 + 80270ba: f003 021f and.w r2, r3, #31 + 80270be: 4613 mov r3, r2 + 80270c0: 005b lsls r3, r3, #1 + 80270c2: 4413 add r3, r2 + 80270c4: 3b1e subs r3, #30 + 80270c6: 051b lsls r3, r3, #20 + 80270c8: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 LL_ADC_SetChannelSamplingTime(hadc->Instance, - 802709c: 430b orrs r3, r1 - 802709e: 683a ldr r2, [r7, #0] - 80270a0: 6892 ldr r2, [r2, #8] - 80270a2: 4619 mov r1, r3 - 80270a4: f7ff f88d bl 80261c2 + 80270cc: 430b orrs r3, r1 + 80270ce: 683a ldr r2, [r7, #0] + 80270d0: 6892 ldr r2, [r2, #8] + 80270d2: 4619 mov r1, r3 + 80270d4: f7ff f88d bl 80261f2 /* If internal channel selected, enable dedicated internal buffers and */ /* paths. */ /* Note: these internal measurement paths can be disabled using */ /* HAL_ADC_DeInit(). */ if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) - 80270a8: 683b ldr r3, [r7, #0] - 80270aa: 681b ldr r3, [r3, #0] - 80270ac: 2b00 cmp r3, #0 - 80270ae: f280 80c6 bge.w 802723e + 80270d8: 683b ldr r3, [r7, #0] + 80270da: 681b ldr r3, [r3, #0] + 80270dc: 2b00 cmp r3, #0 + 80270de: f280 80c6 bge.w 802726e { /* Configuration of common ADC parameters */ tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 80270b2: 687b ldr r3, [r7, #4] - 80270b4: 681b ldr r3, [r3, #0] - 80270b6: 4a67 ldr r2, [pc, #412] ; (8027254 ) - 80270b8: 4293 cmp r3, r2 - 80270ba: d004 beq.n 80270c6 - 80270bc: 687b ldr r3, [r7, #4] - 80270be: 681b ldr r3, [r3, #0] - 80270c0: 4a65 ldr r2, [pc, #404] ; (8027258 ) - 80270c2: 4293 cmp r3, r2 - 80270c4: d101 bne.n 80270ca - 80270c6: 4b65 ldr r3, [pc, #404] ; (802725c ) - 80270c8: e000 b.n 80270cc - 80270ca: 4b65 ldr r3, [pc, #404] ; (8027260 ) - 80270cc: 4618 mov r0, r3 - 80270ce: f7fe ffd7 bl 8026080 - 80270d2: 66f8 str r0, [r7, #108] ; 0x6c + 80270e2: 687b ldr r3, [r7, #4] + 80270e4: 681b ldr r3, [r3, #0] + 80270e6: 4a67 ldr r2, [pc, #412] ; (8027284 ) + 80270e8: 4293 cmp r3, r2 + 80270ea: d004 beq.n 80270f6 + 80270ec: 687b ldr r3, [r7, #4] + 80270ee: 681b ldr r3, [r3, #0] + 80270f0: 4a65 ldr r2, [pc, #404] ; (8027288 ) + 80270f2: 4293 cmp r3, r2 + 80270f4: d101 bne.n 80270fa + 80270f6: 4b65 ldr r3, [pc, #404] ; (802728c ) + 80270f8: e000 b.n 80270fc + 80270fa: 4b65 ldr r3, [pc, #404] ; (8027290 ) + 80270fc: 4618 mov r0, r3 + 80270fe: f7fe ffd7 bl 80260b0 + 8027102: 66f8 str r0, [r7, #108] ; 0x6c /* Software is allowed to change common parameters only when all ADCs */ /* of the common group are disabled. */ if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) - 80270d4: 687b ldr r3, [r7, #4] - 80270d6: 681b ldr r3, [r3, #0] - 80270d8: 4a5e ldr r2, [pc, #376] ; (8027254 ) - 80270da: 4293 cmp r3, r2 - 80270dc: d004 beq.n 80270e8 - 80270de: 687b ldr r3, [r7, #4] - 80270e0: 681b ldr r3, [r3, #0] - 80270e2: 4a5d ldr r2, [pc, #372] ; (8027258 ) - 80270e4: 4293 cmp r3, r2 - 80270e6: d10e bne.n 8027106 - 80270e8: 485a ldr r0, [pc, #360] ; (8027254 ) - 80270ea: f7ff f94b bl 8026384 - 80270ee: 4604 mov r4, r0 - 80270f0: 4859 ldr r0, [pc, #356] ; (8027258 ) - 80270f2: f7ff f947 bl 8026384 - 80270f6: 4603 mov r3, r0 - 80270f8: 4323 orrs r3, r4 - 80270fa: 2b00 cmp r3, #0 - 80270fc: bf0c ite eq - 80270fe: 2301 moveq r3, #1 - 8027100: 2300 movne r3, #0 - 8027102: b2db uxtb r3, r3 - 8027104: e008 b.n 8027118 - 8027106: 4857 ldr r0, [pc, #348] ; (8027264 ) - 8027108: f7ff f93c bl 8026384 - 802710c: 4603 mov r3, r0 - 802710e: 2b00 cmp r3, #0 - 8027110: bf0c ite eq - 8027112: 2301 moveq r3, #1 - 8027114: 2300 movne r3, #0 - 8027116: b2db uxtb r3, r3 - 8027118: 2b00 cmp r3, #0 - 802711a: d07d beq.n 8027218 + 8027104: 687b ldr r3, [r7, #4] + 8027106: 681b ldr r3, [r3, #0] + 8027108: 4a5e ldr r2, [pc, #376] ; (8027284 ) + 802710a: 4293 cmp r3, r2 + 802710c: d004 beq.n 8027118 + 802710e: 687b ldr r3, [r7, #4] + 8027110: 681b ldr r3, [r3, #0] + 8027112: 4a5d ldr r2, [pc, #372] ; (8027288 ) + 8027114: 4293 cmp r3, r2 + 8027116: d10e bne.n 8027136 + 8027118: 485a ldr r0, [pc, #360] ; (8027284 ) + 802711a: f7ff f94b bl 80263b4 + 802711e: 4604 mov r4, r0 + 8027120: 4859 ldr r0, [pc, #356] ; (8027288 ) + 8027122: f7ff f947 bl 80263b4 + 8027126: 4603 mov r3, r0 + 8027128: 4323 orrs r3, r4 + 802712a: 2b00 cmp r3, #0 + 802712c: bf0c ite eq + 802712e: 2301 moveq r3, #1 + 8027130: 2300 movne r3, #0 + 8027132: b2db uxtb r3, r3 + 8027134: e008 b.n 8027148 + 8027136: 4857 ldr r0, [pc, #348] ; (8027294 ) + 8027138: f7ff f93c bl 80263b4 + 802713c: 4603 mov r3, r0 + 802713e: 2b00 cmp r3, #0 + 8027140: bf0c ite eq + 8027142: 2301 moveq r3, #1 + 8027144: 2300 movne r3, #0 + 8027146: b2db uxtb r3, r3 + 8027148: 2b00 cmp r3, #0 + 802714a: d07d beq.n 8027248 { /* If the requested internal measurement path has already been enabled, */ /* bypass the configuration processing. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) - 802711c: 683b ldr r3, [r7, #0] - 802711e: 681b ldr r3, [r3, #0] - 8027120: 4a51 ldr r2, [pc, #324] ; (8027268 ) - 8027122: 4293 cmp r3, r2 - 8027124: d130 bne.n 8027188 - 8027126: 6efb ldr r3, [r7, #108] ; 0x6c - 8027128: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 802712c: 2b00 cmp r3, #0 - 802712e: d12b bne.n 8027188 + 802714c: 683b ldr r3, [r7, #0] + 802714e: 681b ldr r3, [r3, #0] + 8027150: 4a51 ldr r2, [pc, #324] ; (8027298 ) + 8027152: 4293 cmp r3, r2 + 8027154: d130 bne.n 80271b8 + 8027156: 6efb ldr r3, [r7, #108] ; 0x6c + 8027158: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 802715c: 2b00 cmp r3, #0 + 802715e: d12b bne.n 80271b8 { if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) - 8027130: 687b ldr r3, [r7, #4] - 8027132: 681b ldr r3, [r3, #0] - 8027134: 4a4b ldr r2, [pc, #300] ; (8027264 ) - 8027136: 4293 cmp r3, r2 - 8027138: f040 8081 bne.w 802723e + 8027160: 687b ldr r3, [r7, #4] + 8027162: 681b ldr r3, [r3, #0] + 8027164: 4a4b ldr r2, [pc, #300] ; (8027294 ) + 8027166: 4293 cmp r3, r2 + 8027168: f040 8081 bne.w 802726e { LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channel); - 802713c: 687b ldr r3, [r7, #4] - 802713e: 681b ldr r3, [r3, #0] - 8027140: 4a44 ldr r2, [pc, #272] ; (8027254 ) - 8027142: 4293 cmp r3, r2 - 8027144: d004 beq.n 8027150 - 8027146: 687b ldr r3, [r7, #4] - 8027148: 681b ldr r3, [r3, #0] - 802714a: 4a43 ldr r2, [pc, #268] ; (8027258 ) - 802714c: 4293 cmp r3, r2 - 802714e: d101 bne.n 8027154 - 8027150: 4a42 ldr r2, [pc, #264] ; (802725c ) - 8027152: e000 b.n 8027156 - 8027154: 4a42 ldr r2, [pc, #264] ; (8027260 ) - 8027156: 6efb ldr r3, [r7, #108] ; 0x6c - 8027158: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 - 802715c: 4619 mov r1, r3 - 802715e: 4610 mov r0, r2 - 8027160: f7fe ff7b bl 802605a + 802716c: 687b ldr r3, [r7, #4] + 802716e: 681b ldr r3, [r3, #0] + 8027170: 4a44 ldr r2, [pc, #272] ; (8027284 ) + 8027172: 4293 cmp r3, r2 + 8027174: d004 beq.n 8027180 + 8027176: 687b ldr r3, [r7, #4] + 8027178: 681b ldr r3, [r3, #0] + 802717a: 4a43 ldr r2, [pc, #268] ; (8027288 ) + 802717c: 4293 cmp r3, r2 + 802717e: d101 bne.n 8027184 + 8027180: 4a42 ldr r2, [pc, #264] ; (802728c ) + 8027182: e000 b.n 8027186 + 8027184: 4a42 ldr r2, [pc, #264] ; (8027290 ) + 8027186: 6efb ldr r3, [r7, #108] ; 0x6c + 8027188: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 + 802718c: 4619 mov r1, r3 + 802718e: 4610 mov r0, r2 + 8027190: f7fe ff7b bl 802608a /* Delay for temperature sensor stabilization time */ /* Wait loop initialization and execution */ /* Note: Variable divided by 2 to compensate partially */ /* CPU processing cycles, scaling in us split to not */ /* exceed 32 bits register capacity and handle low frequency. */ wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL)); - 8027164: 4b41 ldr r3, [pc, #260] ; (802726c ) - 8027166: 681b ldr r3, [r3, #0] - 8027168: 099b lsrs r3, r3, #6 - 802716a: 4a41 ldr r2, [pc, #260] ; (8027270 ) - 802716c: fba2 2303 umull r2, r3, r2, r3 - 8027170: 099b lsrs r3, r3, #6 - 8027172: 3301 adds r3, #1 - 8027174: 005b lsls r3, r3, #1 - 8027176: 60bb str r3, [r7, #8] + 8027194: 4b41 ldr r3, [pc, #260] ; (802729c ) + 8027196: 681b ldr r3, [r3, #0] + 8027198: 099b lsrs r3, r3, #6 + 802719a: 4a41 ldr r2, [pc, #260] ; (80272a0 ) + 802719c: fba2 2303 umull r2, r3, r2, r3 + 80271a0: 099b lsrs r3, r3, #6 + 80271a2: 3301 adds r3, #1 + 80271a4: 005b lsls r3, r3, #1 + 80271a6: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 8027178: e002 b.n 8027180 + 80271a8: e002 b.n 80271b0 { wait_loop_index--; - 802717a: 68bb ldr r3, [r7, #8] - 802717c: 3b01 subs r3, #1 - 802717e: 60bb str r3, [r7, #8] + 80271aa: 68bb ldr r3, [r7, #8] + 80271ac: 3b01 subs r3, #1 + 80271ae: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 8027180: 68bb ldr r3, [r7, #8] - 8027182: 2b00 cmp r3, #0 - 8027184: d1f9 bne.n 802717a + 80271b0: 68bb ldr r3, [r7, #8] + 80271b2: 2b00 cmp r3, #0 + 80271b4: d1f9 bne.n 80271aa if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) - 8027186: e05a b.n 802723e + 80271b6: e05a b.n 802726e } } } else if ((sConfig->Channel == ADC_CHANNEL_VBAT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL)) - 8027188: 683b ldr r3, [r7, #0] - 802718a: 681b ldr r3, [r3, #0] - 802718c: 4a39 ldr r2, [pc, #228] ; (8027274 ) - 802718e: 4293 cmp r3, r2 - 8027190: d11e bne.n 80271d0 - 8027192: 6efb ldr r3, [r7, #108] ; 0x6c - 8027194: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8027198: 2b00 cmp r3, #0 - 802719a: d119 bne.n 80271d0 + 80271b8: 683b ldr r3, [r7, #0] + 80271ba: 681b ldr r3, [r3, #0] + 80271bc: 4a39 ldr r2, [pc, #228] ; (80272a4 ) + 80271be: 4293 cmp r3, r2 + 80271c0: d11e bne.n 8027200 + 80271c2: 6efb ldr r3, [r7, #108] ; 0x6c + 80271c4: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 80271c8: 2b00 cmp r3, #0 + 80271ca: d119 bne.n 8027200 { if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) - 802719c: 687b ldr r3, [r7, #4] - 802719e: 681b ldr r3, [r3, #0] - 80271a0: 4a30 ldr r2, [pc, #192] ; (8027264 ) - 80271a2: 4293 cmp r3, r2 - 80271a4: d14b bne.n 802723e + 80271cc: 687b ldr r3, [r7, #4] + 80271ce: 681b ldr r3, [r3, #0] + 80271d0: 4a30 ldr r2, [pc, #192] ; (8027294 ) + 80271d2: 4293 cmp r3, r2 + 80271d4: d14b bne.n 802726e { LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); - 80271a6: 687b ldr r3, [r7, #4] - 80271a8: 681b ldr r3, [r3, #0] - 80271aa: 4a2a ldr r2, [pc, #168] ; (8027254 ) - 80271ac: 4293 cmp r3, r2 - 80271ae: d004 beq.n 80271ba - 80271b0: 687b ldr r3, [r7, #4] - 80271b2: 681b ldr r3, [r3, #0] - 80271b4: 4a28 ldr r2, [pc, #160] ; (8027258 ) - 80271b6: 4293 cmp r3, r2 - 80271b8: d101 bne.n 80271be - 80271ba: 4a28 ldr r2, [pc, #160] ; (802725c ) - 80271bc: e000 b.n 80271c0 - 80271be: 4a28 ldr r2, [pc, #160] ; (8027260 ) - 80271c0: 6efb ldr r3, [r7, #108] ; 0x6c - 80271c2: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 80271c6: 4619 mov r1, r3 - 80271c8: 4610 mov r0, r2 - 80271ca: f7fe ff46 bl 802605a + 80271d6: 687b ldr r3, [r7, #4] + 80271d8: 681b ldr r3, [r3, #0] + 80271da: 4a2a ldr r2, [pc, #168] ; (8027284 ) + 80271dc: 4293 cmp r3, r2 + 80271de: d004 beq.n 80271ea + 80271e0: 687b ldr r3, [r7, #4] + 80271e2: 681b ldr r3, [r3, #0] + 80271e4: 4a28 ldr r2, [pc, #160] ; (8027288 ) + 80271e6: 4293 cmp r3, r2 + 80271e8: d101 bne.n 80271ee + 80271ea: 4a28 ldr r2, [pc, #160] ; (802728c ) + 80271ec: e000 b.n 80271f0 + 80271ee: 4a28 ldr r2, [pc, #160] ; (8027290 ) + 80271f0: 6efb ldr r3, [r7, #108] ; 0x6c + 80271f2: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 80271f6: 4619 mov r1, r3 + 80271f8: 4610 mov r0, r2 + 80271fa: f7fe ff46 bl 802608a if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) - 80271ce: e036 b.n 802723e + 80271fe: e036 b.n 802726e } } else if ((sConfig->Channel == ADC_CHANNEL_VREFINT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) - 80271d0: 683b ldr r3, [r7, #0] - 80271d2: 681b ldr r3, [r3, #0] - 80271d4: 4a28 ldr r2, [pc, #160] ; (8027278 ) - 80271d6: 4293 cmp r3, r2 - 80271d8: d131 bne.n 802723e - 80271da: 6efb ldr r3, [r7, #108] ; 0x6c - 80271dc: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 80271e0: 2b00 cmp r3, #0 - 80271e2: d12c bne.n 802723e + 8027200: 683b ldr r3, [r7, #0] + 8027202: 681b ldr r3, [r3, #0] + 8027204: 4a28 ldr r2, [pc, #160] ; (80272a8 ) + 8027206: 4293 cmp r3, r2 + 8027208: d131 bne.n 802726e + 802720a: 6efb ldr r3, [r7, #108] ; 0x6c + 802720c: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8027210: 2b00 cmp r3, #0 + 8027212: d12c bne.n 802726e { if (ADC_VREFINT_INSTANCE(hadc)) - 80271e4: 687b ldr r3, [r7, #4] - 80271e6: 681b ldr r3, [r3, #0] - 80271e8: 4a1e ldr r2, [pc, #120] ; (8027264 ) - 80271ea: 4293 cmp r3, r2 - 80271ec: d127 bne.n 802723e + 8027214: 687b ldr r3, [r7, #4] + 8027216: 681b ldr r3, [r3, #0] + 8027218: 4a1e ldr r2, [pc, #120] ; (8027294 ) + 802721a: 4293 cmp r3, r2 + 802721c: d127 bne.n 802726e { LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel); - 80271ee: 687b ldr r3, [r7, #4] - 80271f0: 681b ldr r3, [r3, #0] - 80271f2: 4a18 ldr r2, [pc, #96] ; (8027254 ) - 80271f4: 4293 cmp r3, r2 - 80271f6: d004 beq.n 8027202 - 80271f8: 687b ldr r3, [r7, #4] - 80271fa: 681b ldr r3, [r3, #0] - 80271fc: 4a16 ldr r2, [pc, #88] ; (8027258 ) - 80271fe: 4293 cmp r3, r2 - 8027200: d101 bne.n 8027206 - 8027202: 4a16 ldr r2, [pc, #88] ; (802725c ) - 8027204: e000 b.n 8027208 - 8027206: 4a16 ldr r2, [pc, #88] ; (8027260 ) - 8027208: 6efb ldr r3, [r7, #108] ; 0x6c - 802720a: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 - 802720e: 4619 mov r1, r3 - 8027210: 4610 mov r0, r2 - 8027212: f7fe ff22 bl 802605a - 8027216: e012 b.n 802723e + 802721e: 687b ldr r3, [r7, #4] + 8027220: 681b ldr r3, [r3, #0] + 8027222: 4a18 ldr r2, [pc, #96] ; (8027284 ) + 8027224: 4293 cmp r3, r2 + 8027226: d004 beq.n 8027232 + 8027228: 687b ldr r3, [r7, #4] + 802722a: 681b ldr r3, [r3, #0] + 802722c: 4a16 ldr r2, [pc, #88] ; (8027288 ) + 802722e: 4293 cmp r3, r2 + 8027230: d101 bne.n 8027236 + 8027232: 4a16 ldr r2, [pc, #88] ; (802728c ) + 8027234: e000 b.n 8027238 + 8027236: 4a16 ldr r2, [pc, #88] ; (8027290 ) + 8027238: 6efb ldr r3, [r7, #108] ; 0x6c + 802723a: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 + 802723e: 4619 mov r1, r3 + 8027240: 4610 mov r0, r2 + 8027242: f7fe ff22 bl 802608a + 8027246: e012 b.n 802726e /* enabled and other ADC of the common group are enabled, internal */ /* measurement paths cannot be enabled. */ else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8027218: 687b ldr r3, [r7, #4] - 802721a: 6d5b ldr r3, [r3, #84] ; 0x54 - 802721c: f043 0220 orr.w r2, r3, #32 - 8027220: 687b ldr r3, [r7, #4] - 8027222: 655a str r2, [r3, #84] ; 0x54 + 8027248: 687b ldr r3, [r7, #4] + 802724a: 6d5b ldr r3, [r3, #84] ; 0x54 + 802724c: f043 0220 orr.w r2, r3, #32 + 8027250: 687b ldr r3, [r7, #4] + 8027252: 655a str r2, [r3, #84] ; 0x54 tmp_hal_status = HAL_ERROR; - 8027224: 2301 movs r3, #1 - 8027226: f887 307f strb.w r3, [r7, #127] ; 0x7f - 802722a: e008 b.n 802723e + 8027254: 2301 movs r3, #1 + 8027256: f887 307f strb.w r3, [r7, #127] ; 0x7f + 802725a: e008 b.n 802726e /* channel could be done on neither of the channel configuration structure */ /* parameters. */ else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 802722c: 687b ldr r3, [r7, #4] - 802722e: 6d5b ldr r3, [r3, #84] ; 0x54 - 8027230: f043 0220 orr.w r2, r3, #32 - 8027234: 687b ldr r3, [r7, #4] - 8027236: 655a str r2, [r3, #84] ; 0x54 + 802725c: 687b ldr r3, [r7, #4] + 802725e: 6d5b ldr r3, [r3, #84] ; 0x54 + 8027260: f043 0220 orr.w r2, r3, #32 + 8027264: 687b ldr r3, [r7, #4] + 8027266: 655a str r2, [r3, #84] ; 0x54 tmp_hal_status = HAL_ERROR; - 8027238: 2301 movs r3, #1 - 802723a: f887 307f strb.w r3, [r7, #127] ; 0x7f + 8027268: 2301 movs r3, #1 + 802726a: f887 307f strb.w r3, [r7, #127] ; 0x7f } /* Process unlocked */ __HAL_UNLOCK(hadc); - 802723e: 687b ldr r3, [r7, #4] - 8027240: 2200 movs r2, #0 - 8027242: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 802726e: 687b ldr r3, [r7, #4] + 8027270: 2200 movs r2, #0 + 8027272: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Return function status */ return tmp_hal_status; - 8027246: f897 307f ldrb.w r3, [r7, #127] ; 0x7f -} - 802724a: 4618 mov r0, r3 - 802724c: 3784 adds r7, #132 ; 0x84 - 802724e: 46bd mov sp, r7 - 8027250: bd90 pop {r4, r7, pc} - 8027252: bf00 nop - 8027254: 40022000 .word 0x40022000 - 8027258: 40022100 .word 0x40022100 - 802725c: 40022300 .word 0x40022300 - 8027260: 58026300 .word 0x58026300 - 8027264: 58026000 .word 0x58026000 - 8027268: cb840000 .word 0xcb840000 - 802726c: 24000048 .word 0x24000048 - 8027270: 053e2d63 .word 0x053e2d63 - 8027274: c7520000 .word 0xc7520000 - 8027278: cfb80000 .word 0xcfb80000 - -0802727c : + 8027276: f897 307f ldrb.w r3, [r7, #127] ; 0x7f +} + 802727a: 4618 mov r0, r3 + 802727c: 3784 adds r7, #132 ; 0x84 + 802727e: 46bd mov sp, r7 + 8027280: bd90 pop {r4, r7, pc} + 8027282: bf00 nop + 8027284: 40022000 .word 0x40022000 + 8027288: 40022100 .word 0x40022100 + 802728c: 40022300 .word 0x40022300 + 8027290: 58026300 .word 0x58026300 + 8027294: 58026000 .word 0x58026000 + 8027298: cb840000 .word 0xcb840000 + 802729c: 24000048 .word 0x24000048 + 80272a0: 053e2d63 .word 0x053e2d63 + 80272a4: c7520000 .word 0xc7520000 + 80272a8: cfb80000 .word 0xcfb80000 + +080272ac : * @arg @ref ADC_INJECTED_GROUP ADC injected conversion type. * @arg @ref ADC_REGULAR_INJECTED_GROUP ADC regular and injected conversion type. * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc, uint32_t ConversionGroup) { - 802727c: b580 push {r7, lr} - 802727e: b088 sub sp, #32 - 8027280: af00 add r7, sp, #0 - 8027282: 6078 str r0, [r7, #4] - 8027284: 6039 str r1, [r7, #0] + 80272ac: b580 push {r7, lr} + 80272ae: b088 sub sp, #32 + 80272b0: af00 add r7, sp, #0 + 80272b2: 6078 str r0, [r7, #4] + 80272b4: 6039 str r1, [r7, #0] uint32_t tickstart; uint32_t Conversion_Timeout_CPU_cycles = 0UL; - 8027286: 2300 movs r3, #0 - 8027288: 61fb str r3, [r7, #28] + 80272b6: 2300 movs r3, #0 + 80272b8: 61fb str r3, [r7, #28] uint32_t conversion_group_reassigned = ConversionGroup; - 802728a: 683b ldr r3, [r7, #0] - 802728c: 61bb str r3, [r7, #24] + 80272ba: 683b ldr r3, [r7, #0] + 80272bc: 61bb str r3, [r7, #24] assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); assert_param(IS_ADC_CONVERSION_GROUP(ConversionGroup)); /* Verification if ADC is not already stopped (on regular and injected */ /* groups) to bypass this function if not needed. */ tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 802728e: 687b ldr r3, [r7, #4] - 8027290: 681b ldr r3, [r3, #0] - 8027292: 4618 mov r0, r3 - 8027294: f7ff f8c4 bl 8026420 - 8027298: 6138 str r0, [r7, #16] + 80272be: 687b ldr r3, [r7, #4] + 80272c0: 681b ldr r3, [r3, #0] + 80272c2: 4618 mov r0, r3 + 80272c4: f7ff f8c4 bl 8026450 + 80272c8: 6138 str r0, [r7, #16] tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); - 802729a: 687b ldr r3, [r7, #4] - 802729c: 681b ldr r3, [r3, #0] - 802729e: 4618 mov r0, r3 - 80272a0: f7ff f8e6 bl 8026470 - 80272a4: 60f8 str r0, [r7, #12] + 80272ca: 687b ldr r3, [r7, #4] + 80272cc: 681b ldr r3, [r3, #0] + 80272ce: 4618 mov r0, r3 + 80272d0: f7ff f8e6 bl 80264a0 + 80272d4: 60f8 str r0, [r7, #12] if ((tmp_adc_is_conversion_on_going_regular != 0UL) - 80272a6: 693b ldr r3, [r7, #16] - 80272a8: 2b00 cmp r3, #0 - 80272aa: d103 bne.n 80272b4 + 80272d6: 693b ldr r3, [r7, #16] + 80272d8: 2b00 cmp r3, #0 + 80272da: d103 bne.n 80272e4 || (tmp_adc_is_conversion_on_going_injected != 0UL) - 80272ac: 68fb ldr r3, [r7, #12] - 80272ae: 2b00 cmp r3, #0 - 80272b0: f000 8098 beq.w 80273e4 + 80272dc: 68fb ldr r3, [r7, #12] + 80272de: 2b00 cmp r3, #0 + 80272e0: f000 8098 beq.w 8027414 /* auto-delay mode. */ /* In auto-injection mode, regular group stop ADC_CR_ADSTP is used (not */ /* injected group stop ADC_CR_JADSTP). */ /* Procedure to be followed: Wait until JEOS=1, clear JEOS, set ADSTP=1 */ /* (see reference manual). */ if (((hadc->Instance->CFGR & ADC_CFGR_JAUTO) != 0UL) - 80272b4: 687b ldr r3, [r7, #4] - 80272b6: 681b ldr r3, [r3, #0] - 80272b8: 68db ldr r3, [r3, #12] - 80272ba: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80272be: 2b00 cmp r3, #0 - 80272c0: d02a beq.n 8027318 + 80272e4: 687b ldr r3, [r7, #4] + 80272e6: 681b ldr r3, [r3, #0] + 80272e8: 68db ldr r3, [r3, #12] + 80272ea: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80272ee: 2b00 cmp r3, #0 + 80272f0: d02a beq.n 8027348 && (hadc->Init.ContinuousConvMode == ENABLE) - 80272c2: 687b ldr r3, [r7, #4] - 80272c4: 7d5b ldrb r3, [r3, #21] - 80272c6: 2b01 cmp r3, #1 - 80272c8: d126 bne.n 8027318 + 80272f2: 687b ldr r3, [r7, #4] + 80272f4: 7d5b ldrb r3, [r3, #21] + 80272f6: 2b01 cmp r3, #1 + 80272f8: d126 bne.n 8027348 && (hadc->Init.LowPowerAutoWait == ENABLE) - 80272ca: 687b ldr r3, [r7, #4] - 80272cc: 7d1b ldrb r3, [r3, #20] - 80272ce: 2b01 cmp r3, #1 - 80272d0: d122 bne.n 8027318 + 80272fa: 687b ldr r3, [r7, #4] + 80272fc: 7d1b ldrb r3, [r3, #20] + 80272fe: 2b01 cmp r3, #1 + 8027300: d122 bne.n 8027348 ) { /* Use stop of regular group */ conversion_group_reassigned = ADC_REGULAR_GROUP; - 80272d2: 2301 movs r3, #1 - 80272d4: 61bb str r3, [r7, #24] + 8027302: 2301 movs r3, #1 + 8027304: 61bb str r3, [r7, #24] /* Wait until JEOS=1 (maximum Timeout: 4 injected conversions) */ while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) == 0UL) - 80272d6: e014 b.n 8027302 + 8027306: e014 b.n 8027332 { if (Conversion_Timeout_CPU_cycles >= (ADC_CONVERSION_TIME_MAX_CPU_CYCLES * 4UL)) - 80272d8: 69fb ldr r3, [r7, #28] - 80272da: 4a45 ldr r2, [pc, #276] ; (80273f0 ) - 80272dc: 4293 cmp r3, r2 - 80272de: d90d bls.n 80272fc + 8027308: 69fb ldr r3, [r7, #28] + 802730a: 4a45 ldr r2, [pc, #276] ; (8027420 ) + 802730c: 4293 cmp r3, r2 + 802730e: d90d bls.n 802732c { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80272e0: 687b ldr r3, [r7, #4] - 80272e2: 6d5b ldr r3, [r3, #84] ; 0x54 - 80272e4: f043 0210 orr.w r2, r3, #16 - 80272e8: 687b ldr r3, [r7, #4] - 80272ea: 655a str r2, [r3, #84] ; 0x54 + 8027310: 687b ldr r3, [r7, #4] + 8027312: 6d5b ldr r3, [r3, #84] ; 0x54 + 8027314: f043 0210 orr.w r2, r3, #16 + 8027318: 687b ldr r3, [r7, #4] + 802731a: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80272ec: 687b ldr r3, [r7, #4] - 80272ee: 6d9b ldr r3, [r3, #88] ; 0x58 - 80272f0: f043 0201 orr.w r2, r3, #1 - 80272f4: 687b ldr r3, [r7, #4] - 80272f6: 659a str r2, [r3, #88] ; 0x58 + 802731c: 687b ldr r3, [r7, #4] + 802731e: 6d9b ldr r3, [r3, #88] ; 0x58 + 8027320: f043 0201 orr.w r2, r3, #1 + 8027324: 687b ldr r3, [r7, #4] + 8027326: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 80272f8: 2301 movs r3, #1 - 80272fa: e074 b.n 80273e6 + 8027328: 2301 movs r3, #1 + 802732a: e074 b.n 8027416 } Conversion_Timeout_CPU_cycles ++; - 80272fc: 69fb ldr r3, [r7, #28] - 80272fe: 3301 adds r3, #1 - 8027300: 61fb str r3, [r7, #28] + 802732c: 69fb ldr r3, [r7, #28] + 802732e: 3301 adds r3, #1 + 8027330: 61fb str r3, [r7, #28] while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) == 0UL) - 8027302: 687b ldr r3, [r7, #4] - 8027304: 681b ldr r3, [r3, #0] - 8027306: 681b ldr r3, [r3, #0] - 8027308: f003 0340 and.w r3, r3, #64 ; 0x40 - 802730c: 2b40 cmp r3, #64 ; 0x40 - 802730e: d1e3 bne.n 80272d8 + 8027332: 687b ldr r3, [r7, #4] + 8027334: 681b ldr r3, [r3, #0] + 8027336: 681b ldr r3, [r3, #0] + 8027338: f003 0340 and.w r3, r3, #64 ; 0x40 + 802733c: 2b40 cmp r3, #64 ; 0x40 + 802733e: d1e3 bne.n 8027308 } /* Clear JEOS */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOS); - 8027310: 687b ldr r3, [r7, #4] - 8027312: 681b ldr r3, [r3, #0] - 8027314: 2240 movs r2, #64 ; 0x40 - 8027316: 601a str r2, [r3, #0] + 8027340: 687b ldr r3, [r7, #4] + 8027342: 681b ldr r3, [r3, #0] + 8027344: 2240 movs r2, #64 ; 0x40 + 8027346: 601a str r2, [r3, #0] } /* Stop potential conversion on going on ADC group regular */ if (conversion_group_reassigned != ADC_INJECTED_GROUP) - 8027318: 69bb ldr r3, [r7, #24] - 802731a: 2b02 cmp r3, #2 - 802731c: d014 beq.n 8027348 + 8027348: 69bb ldr r3, [r7, #24] + 802734a: 2b02 cmp r3, #2 + 802734c: d014 beq.n 8027378 { /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL) - 802731e: 687b ldr r3, [r7, #4] - 8027320: 681b ldr r3, [r3, #0] - 8027322: 4618 mov r0, r3 - 8027324: f7ff f87c bl 8026420 - 8027328: 4603 mov r3, r0 - 802732a: 2b00 cmp r3, #0 - 802732c: d00c beq.n 8027348 + 802734e: 687b ldr r3, [r7, #4] + 8027350: 681b ldr r3, [r3, #0] + 8027352: 4618 mov r0, r3 + 8027354: f7ff f87c bl 8026450 + 8027358: 4603 mov r3, r0 + 802735a: 2b00 cmp r3, #0 + 802735c: d00c beq.n 8027378 { if (LL_ADC_IsDisableOngoing(hadc->Instance) == 0UL) - 802732e: 687b ldr r3, [r7, #4] - 8027330: 681b ldr r3, [r3, #0] - 8027332: 4618 mov r0, r3 - 8027334: f7ff f839 bl 80263aa - 8027338: 4603 mov r3, r0 - 802733a: 2b00 cmp r3, #0 - 802733c: d104 bne.n 8027348 + 802735e: 687b ldr r3, [r7, #4] + 8027360: 681b ldr r3, [r3, #0] + 8027362: 4618 mov r0, r3 + 8027364: f7ff f839 bl 80263da + 8027368: 4603 mov r3, r0 + 802736a: 2b00 cmp r3, #0 + 802736c: d104 bne.n 8027378 { /* Stop ADC group regular conversion */ LL_ADC_REG_StopConversion(hadc->Instance); - 802733e: 687b ldr r3, [r7, #4] - 8027340: 681b ldr r3, [r3, #0] - 8027342: 4618 mov r0, r3 - 8027344: f7ff f858 bl 80263f8 + 802736e: 687b ldr r3, [r7, #4] + 8027370: 681b ldr r3, [r3, #0] + 8027372: 4618 mov r0, r3 + 8027374: f7ff f858 bl 8026428 } } } /* Stop potential conversion on going on ADC group injected */ if (conversion_group_reassigned != ADC_REGULAR_GROUP) - 8027348: 69bb ldr r3, [r7, #24] - 802734a: 2b01 cmp r3, #1 - 802734c: d014 beq.n 8027378 + 8027378: 69bb ldr r3, [r7, #24] + 802737a: 2b01 cmp r3, #1 + 802737c: d014 beq.n 80273a8 { /* Software is allowed to set JADSTP only when JADSTART=1 and ADDIS=0 */ if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL) - 802734e: 687b ldr r3, [r7, #4] - 8027350: 681b ldr r3, [r3, #0] - 8027352: 4618 mov r0, r3 - 8027354: f7ff f88c bl 8026470 - 8027358: 4603 mov r3, r0 - 802735a: 2b00 cmp r3, #0 - 802735c: d00c beq.n 8027378 + 802737e: 687b ldr r3, [r7, #4] + 8027380: 681b ldr r3, [r3, #0] + 8027382: 4618 mov r0, r3 + 8027384: f7ff f88c bl 80264a0 + 8027388: 4603 mov r3, r0 + 802738a: 2b00 cmp r3, #0 + 802738c: d00c beq.n 80273a8 { if (LL_ADC_IsDisableOngoing(hadc->Instance) == 0UL) - 802735e: 687b ldr r3, [r7, #4] - 8027360: 681b ldr r3, [r3, #0] - 8027362: 4618 mov r0, r3 - 8027364: f7ff f821 bl 80263aa - 8027368: 4603 mov r3, r0 - 802736a: 2b00 cmp r3, #0 - 802736c: d104 bne.n 8027378 + 802738e: 687b ldr r3, [r7, #4] + 8027390: 681b ldr r3, [r3, #0] + 8027392: 4618 mov r0, r3 + 8027394: f7ff f821 bl 80263da + 8027398: 4603 mov r3, r0 + 802739a: 2b00 cmp r3, #0 + 802739c: d104 bne.n 80273a8 { /* Stop ADC group injected conversion */ LL_ADC_INJ_StopConversion(hadc->Instance); - 802736e: 687b ldr r3, [r7, #4] - 8027370: 681b ldr r3, [r3, #0] - 8027372: 4618 mov r0, r3 - 8027374: f7ff f868 bl 8026448 + 802739e: 687b ldr r3, [r7, #4] + 80273a0: 681b ldr r3, [r3, #0] + 80273a2: 4618 mov r0, r3 + 80273a4: f7ff f868 bl 8026478 } } } /* Selection of start and stop bits with respect to the regular or injected group */ switch (conversion_group_reassigned) - 8027378: 69bb ldr r3, [r7, #24] - 802737a: 2b02 cmp r3, #2 - 802737c: d005 beq.n 802738a - 802737e: 69bb ldr r3, [r7, #24] - 8027380: 2b03 cmp r3, #3 - 8027382: d105 bne.n 8027390 + 80273a8: 69bb ldr r3, [r7, #24] + 80273aa: 2b02 cmp r3, #2 + 80273ac: d005 beq.n 80273ba + 80273ae: 69bb ldr r3, [r7, #24] + 80273b0: 2b03 cmp r3, #3 + 80273b2: d105 bne.n 80273c0 { case ADC_REGULAR_INJECTED_GROUP: tmp_ADC_CR_ADSTART_JADSTART = (ADC_CR_ADSTART | ADC_CR_JADSTART); - 8027384: 230c movs r3, #12 - 8027386: 617b str r3, [r7, #20] + 80273b4: 230c movs r3, #12 + 80273b6: 617b str r3, [r7, #20] break; - 8027388: e005 b.n 8027396 + 80273b8: e005 b.n 80273c6 case ADC_INJECTED_GROUP: tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_JADSTART; - 802738a: 2308 movs r3, #8 - 802738c: 617b str r3, [r7, #20] + 80273ba: 2308 movs r3, #8 + 80273bc: 617b str r3, [r7, #20] break; - 802738e: e002 b.n 8027396 + 80273be: e002 b.n 80273c6 /* Case ADC_REGULAR_GROUP only*/ default: tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_ADSTART; - 8027390: 2304 movs r3, #4 - 8027392: 617b str r3, [r7, #20] + 80273c0: 2304 movs r3, #4 + 80273c2: 617b str r3, [r7, #20] break; - 8027394: bf00 nop + 80273c4: bf00 nop } /* Wait for conversion effectively stopped */ tickstart = HAL_GetTick(); - 8027396: f7fe fdfd bl 8025f94 - 802739a: 60b8 str r0, [r7, #8] + 80273c6: f7fe fdfd bl 8025fc4 + 80273ca: 60b8 str r0, [r7, #8] while ((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != 0UL) - 802739c: e01b b.n 80273d6 + 80273cc: e01b b.n 8027406 { if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) - 802739e: f7fe fdf9 bl 8025f94 - 80273a2: 4602 mov r2, r0 - 80273a4: 68bb ldr r3, [r7, #8] - 80273a6: 1ad3 subs r3, r2, r3 - 80273a8: 2b05 cmp r3, #5 - 80273aa: d914 bls.n 80273d6 + 80273ce: f7fe fdf9 bl 8025fc4 + 80273d2: 4602 mov r2, r0 + 80273d4: 68bb ldr r3, [r7, #8] + 80273d6: 1ad3 subs r3, r2, r3 + 80273d8: 2b05 cmp r3, #5 + 80273da: d914 bls.n 8027406 { /* New check to avoid false timeout detection in case of preemption */ if((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != 0UL) - 80273ac: 687b ldr r3, [r7, #4] - 80273ae: 681b ldr r3, [r3, #0] - 80273b0: 689a ldr r2, [r3, #8] - 80273b2: 697b ldr r3, [r7, #20] - 80273b4: 4013 ands r3, r2 - 80273b6: 2b00 cmp r3, #0 - 80273b8: d00d beq.n 80273d6 + 80273dc: 687b ldr r3, [r7, #4] + 80273de: 681b ldr r3, [r3, #0] + 80273e0: 689a ldr r2, [r3, #8] + 80273e2: 697b ldr r3, [r7, #20] + 80273e4: 4013 ands r3, r2 + 80273e6: 2b00 cmp r3, #0 + 80273e8: d00d beq.n 8027406 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80273ba: 687b ldr r3, [r7, #4] - 80273bc: 6d5b ldr r3, [r3, #84] ; 0x54 - 80273be: f043 0210 orr.w r2, r3, #16 - 80273c2: 687b ldr r3, [r7, #4] - 80273c4: 655a str r2, [r3, #84] ; 0x54 + 80273ea: 687b ldr r3, [r7, #4] + 80273ec: 6d5b ldr r3, [r3, #84] ; 0x54 + 80273ee: f043 0210 orr.w r2, r3, #16 + 80273f2: 687b ldr r3, [r7, #4] + 80273f4: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80273c6: 687b ldr r3, [r7, #4] - 80273c8: 6d9b ldr r3, [r3, #88] ; 0x58 - 80273ca: f043 0201 orr.w r2, r3, #1 - 80273ce: 687b ldr r3, [r7, #4] - 80273d0: 659a str r2, [r3, #88] ; 0x58 + 80273f6: 687b ldr r3, [r7, #4] + 80273f8: 6d9b ldr r3, [r3, #88] ; 0x58 + 80273fa: f043 0201 orr.w r2, r3, #1 + 80273fe: 687b ldr r3, [r7, #4] + 8027400: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 80273d2: 2301 movs r3, #1 - 80273d4: e007 b.n 80273e6 + 8027402: 2301 movs r3, #1 + 8027404: e007 b.n 8027416 while ((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != 0UL) - 80273d6: 687b ldr r3, [r7, #4] - 80273d8: 681b ldr r3, [r3, #0] - 80273da: 689a ldr r2, [r3, #8] - 80273dc: 697b ldr r3, [r7, #20] - 80273de: 4013 ands r3, r2 - 80273e0: 2b00 cmp r3, #0 - 80273e2: d1dc bne.n 802739e + 8027406: 687b ldr r3, [r7, #4] + 8027408: 681b ldr r3, [r3, #0] + 802740a: 689a ldr r2, [r3, #8] + 802740c: 697b ldr r3, [r7, #20] + 802740e: 4013 ands r3, r2 + 8027410: 2b00 cmp r3, #0 + 8027412: d1dc bne.n 80273ce } } /* Return HAL status */ return HAL_OK; - 80273e4: 2300 movs r3, #0 + 8027414: 2300 movs r3, #0 } - 80273e6: 4618 mov r0, r3 - 80273e8: 3720 adds r7, #32 - 80273ea: 46bd mov sp, r7 - 80273ec: bd80 pop {r7, pc} - 80273ee: bf00 nop - 80273f0: 000cdbff .word 0x000cdbff + 8027416: 4618 mov r0, r3 + 8027418: 3720 adds r7, #32 + 802741a: 46bd mov sp, r7 + 802741c: bd80 pop {r7, pc} + 802741e: bf00 nop + 8027420: 000cdbff .word 0x000cdbff -080273f4 : +08027424 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc) { - 80273f4: b580 push {r7, lr} - 80273f6: b084 sub sp, #16 - 80273f8: af00 add r7, sp, #0 - 80273fa: 6078 str r0, [r7, #4] + 8027424: b580 push {r7, lr} + 8027426: b084 sub sp, #16 + 8027428: af00 add r7, sp, #0 + 802742a: 6078 str r0, [r7, #4] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 80273fc: 687b ldr r3, [r7, #4] - 80273fe: 681b ldr r3, [r3, #0] - 8027400: 4618 mov r0, r3 - 8027402: f7fe ffbf bl 8026384 - 8027406: 4603 mov r3, r0 - 8027408: 2b00 cmp r3, #0 - 802740a: d16e bne.n 80274ea + 802742c: 687b ldr r3, [r7, #4] + 802742e: 681b ldr r3, [r3, #0] + 8027430: 4618 mov r0, r3 + 8027432: f7fe ffbf bl 80263b4 + 8027436: 4603 mov r3, r0 + 8027438: 2b00 cmp r3, #0 + 802743a: d16e bne.n 802751a { /* Check if conditions to enable the ADC are fulfilled */ if ((hadc->Instance->CR & (ADC_CR_ADCAL | ADC_CR_JADSTP | ADC_CR_ADSTP | ADC_CR_JADSTART | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN)) != 0UL) - 802740c: 687b ldr r3, [r7, #4] - 802740e: 681b ldr r3, [r3, #0] - 8027410: 689a ldr r2, [r3, #8] - 8027412: 4b38 ldr r3, [pc, #224] ; (80274f4 ) - 8027414: 4013 ands r3, r2 - 8027416: 2b00 cmp r3, #0 - 8027418: d00d beq.n 8027436 + 802743c: 687b ldr r3, [r7, #4] + 802743e: 681b ldr r3, [r3, #0] + 8027440: 689a ldr r2, [r3, #8] + 8027442: 4b38 ldr r3, [pc, #224] ; (8027524 ) + 8027444: 4013 ands r3, r2 + 8027446: 2b00 cmp r3, #0 + 8027448: d00d beq.n 8027466 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 802741a: 687b ldr r3, [r7, #4] - 802741c: 6d5b ldr r3, [r3, #84] ; 0x54 - 802741e: f043 0210 orr.w r2, r3, #16 - 8027422: 687b ldr r3, [r7, #4] - 8027424: 655a str r2, [r3, #84] ; 0x54 + 802744a: 687b ldr r3, [r7, #4] + 802744c: 6d5b ldr r3, [r3, #84] ; 0x54 + 802744e: f043 0210 orr.w r2, r3, #16 + 8027452: 687b ldr r3, [r7, #4] + 8027454: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8027426: 687b ldr r3, [r7, #4] - 8027428: 6d9b ldr r3, [r3, #88] ; 0x58 - 802742a: f043 0201 orr.w r2, r3, #1 - 802742e: 687b ldr r3, [r7, #4] - 8027430: 659a str r2, [r3, #88] ; 0x58 + 8027456: 687b ldr r3, [r7, #4] + 8027458: 6d9b ldr r3, [r3, #88] ; 0x58 + 802745a: f043 0201 orr.w r2, r3, #1 + 802745e: 687b ldr r3, [r7, #4] + 8027460: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 8027432: 2301 movs r3, #1 - 8027434: e05a b.n 80274ec + 8027462: 2301 movs r3, #1 + 8027464: e05a b.n 802751c } /* Enable the ADC peripheral */ LL_ADC_Enable(hadc->Instance); - 8027436: 687b ldr r3, [r7, #4] - 8027438: 681b ldr r3, [r3, #0] - 802743a: 4618 mov r0, r3 - 802743c: f7fe ff7a bl 8026334 + 8027466: 687b ldr r3, [r7, #4] + 8027468: 681b ldr r3, [r3, #0] + 802746a: 4618 mov r0, r3 + 802746c: f7fe ff7a bl 8026364 /* Wait for ADC effectively enabled */ tickstart = HAL_GetTick(); - 8027440: f7fe fda8 bl 8025f94 - 8027444: 60f8 str r0, [r7, #12] + 8027470: f7fe fda8 bl 8025fc4 + 8027474: 60f8 str r0, [r7, #12] /* Poll for ADC ready flag raised except case of multimode enabled and ADC slave selected. */ uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 8027446: 687b ldr r3, [r7, #4] - 8027448: 681b ldr r3, [r3, #0] - 802744a: 4a2b ldr r2, [pc, #172] ; (80274f8 ) - 802744c: 4293 cmp r3, r2 - 802744e: d004 beq.n 802745a - 8027450: 687b ldr r3, [r7, #4] - 8027452: 681b ldr r3, [r3, #0] - 8027454: 4a29 ldr r2, [pc, #164] ; (80274fc ) - 8027456: 4293 cmp r3, r2 - 8027458: d101 bne.n 802745e - 802745a: 4b29 ldr r3, [pc, #164] ; (8027500 ) - 802745c: e000 b.n 8027460 - 802745e: 4b29 ldr r3, [pc, #164] ; (8027504 ) - 8027460: 4618 mov r0, r3 - 8027462: f7fe fefd bl 8026260 - 8027466: 60b8 str r0, [r7, #8] + 8027476: 687b ldr r3, [r7, #4] + 8027478: 681b ldr r3, [r3, #0] + 802747a: 4a2b ldr r2, [pc, #172] ; (8027528 ) + 802747c: 4293 cmp r3, r2 + 802747e: d004 beq.n 802748a + 8027480: 687b ldr r3, [r7, #4] + 8027482: 681b ldr r3, [r3, #0] + 8027484: 4a29 ldr r2, [pc, #164] ; (802752c ) + 8027486: 4293 cmp r3, r2 + 8027488: d101 bne.n 802748e + 802748a: 4b29 ldr r3, [pc, #164] ; (8027530 ) + 802748c: e000 b.n 8027490 + 802748e: 4b29 ldr r3, [pc, #164] ; (8027534 ) + 8027490: 4618 mov r0, r3 + 8027492: f7fe fefd bl 8026290 + 8027496: 60b8 str r0, [r7, #8] if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) - 8027468: 687b ldr r3, [r7, #4] - 802746a: 681b ldr r3, [r3, #0] - 802746c: 4a23 ldr r2, [pc, #140] ; (80274fc ) - 802746e: 4293 cmp r3, r2 - 8027470: d002 beq.n 8027478 - 8027472: 687b ldr r3, [r7, #4] - 8027474: 681b ldr r3, [r3, #0] - 8027476: e000 b.n 802747a - 8027478: 4b1f ldr r3, [pc, #124] ; (80274f8 ) - 802747a: 687a ldr r2, [r7, #4] - 802747c: 6812 ldr r2, [r2, #0] - 802747e: 4293 cmp r3, r2 - 8027480: d02c beq.n 80274dc + 8027498: 687b ldr r3, [r7, #4] + 802749a: 681b ldr r3, [r3, #0] + 802749c: 4a23 ldr r2, [pc, #140] ; (802752c ) + 802749e: 4293 cmp r3, r2 + 80274a0: d002 beq.n 80274a8 + 80274a2: 687b ldr r3, [r7, #4] + 80274a4: 681b ldr r3, [r3, #0] + 80274a6: e000 b.n 80274aa + 80274a8: 4b1f ldr r3, [pc, #124] ; (8027528 ) + 80274aa: 687a ldr r2, [r7, #4] + 80274ac: 6812 ldr r2, [r2, #0] + 80274ae: 4293 cmp r3, r2 + 80274b0: d02c beq.n 802750c || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 8027482: 68bb ldr r3, [r7, #8] - 8027484: 2b00 cmp r3, #0 - 8027486: d130 bne.n 80274ea + 80274b2: 68bb ldr r3, [r7, #8] + 80274b4: 2b00 cmp r3, #0 + 80274b6: d130 bne.n 802751a ) { while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) - 8027488: e028 b.n 80274dc + 80274b8: e028 b.n 802750c The workaround is to continue setting ADEN until ADRDY is becomes 1. Additionally, ADC_ENABLE_TIMEOUT is defined to encompass this 4 ADC clock cycle duration */ /* Note: Test of ADC enabled required due to hardware constraint to */ /* not enable ADC if already enabled. */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 802748a: 687b ldr r3, [r7, #4] - 802748c: 681b ldr r3, [r3, #0] - 802748e: 4618 mov r0, r3 - 8027490: f7fe ff78 bl 8026384 - 8027494: 4603 mov r3, r0 - 8027496: 2b00 cmp r3, #0 - 8027498: d104 bne.n 80274a4 + 80274ba: 687b ldr r3, [r7, #4] + 80274bc: 681b ldr r3, [r3, #0] + 80274be: 4618 mov r0, r3 + 80274c0: f7fe ff78 bl 80263b4 + 80274c4: 4603 mov r3, r0 + 80274c6: 2b00 cmp r3, #0 + 80274c8: d104 bne.n 80274d4 { LL_ADC_Enable(hadc->Instance); - 802749a: 687b ldr r3, [r7, #4] - 802749c: 681b ldr r3, [r3, #0] - 802749e: 4618 mov r0, r3 - 80274a0: f7fe ff48 bl 8026334 + 80274ca: 687b ldr r3, [r7, #4] + 80274cc: 681b ldr r3, [r3, #0] + 80274ce: 4618 mov r0, r3 + 80274d0: f7fe ff48 bl 8026364 } if ((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) - 80274a4: f7fe fd76 bl 8025f94 - 80274a8: 4602 mov r2, r0 - 80274aa: 68fb ldr r3, [r7, #12] - 80274ac: 1ad3 subs r3, r2, r3 - 80274ae: 2b02 cmp r3, #2 - 80274b0: d914 bls.n 80274dc + 80274d4: f7fe fd76 bl 8025fc4 + 80274d8: 4602 mov r2, r0 + 80274da: 68fb ldr r3, [r7, #12] + 80274dc: 1ad3 subs r3, r2, r3 + 80274de: 2b02 cmp r3, #2 + 80274e0: d914 bls.n 802750c { /* New check to avoid false timeout detection in case of preemption */ if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) - 80274b2: 687b ldr r3, [r7, #4] - 80274b4: 681b ldr r3, [r3, #0] - 80274b6: 681b ldr r3, [r3, #0] - 80274b8: f003 0301 and.w r3, r3, #1 - 80274bc: 2b01 cmp r3, #1 - 80274be: d00d beq.n 80274dc + 80274e2: 687b ldr r3, [r7, #4] + 80274e4: 681b ldr r3, [r3, #0] + 80274e6: 681b ldr r3, [r3, #0] + 80274e8: f003 0301 and.w r3, r3, #1 + 80274ec: 2b01 cmp r3, #1 + 80274ee: d00d beq.n 802750c { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80274c0: 687b ldr r3, [r7, #4] - 80274c2: 6d5b ldr r3, [r3, #84] ; 0x54 - 80274c4: f043 0210 orr.w r2, r3, #16 - 80274c8: 687b ldr r3, [r7, #4] - 80274ca: 655a str r2, [r3, #84] ; 0x54 + 80274f0: 687b ldr r3, [r7, #4] + 80274f2: 6d5b ldr r3, [r3, #84] ; 0x54 + 80274f4: f043 0210 orr.w r2, r3, #16 + 80274f8: 687b ldr r3, [r7, #4] + 80274fa: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80274cc: 687b ldr r3, [r7, #4] - 80274ce: 6d9b ldr r3, [r3, #88] ; 0x58 - 80274d0: f043 0201 orr.w r2, r3, #1 - 80274d4: 687b ldr r3, [r7, #4] - 80274d6: 659a str r2, [r3, #88] ; 0x58 + 80274fc: 687b ldr r3, [r7, #4] + 80274fe: 6d9b ldr r3, [r3, #88] ; 0x58 + 8027500: f043 0201 orr.w r2, r3, #1 + 8027504: 687b ldr r3, [r7, #4] + 8027506: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 80274d8: 2301 movs r3, #1 - 80274da: e007 b.n 80274ec + 8027508: 2301 movs r3, #1 + 802750a: e007 b.n 802751c while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) - 80274dc: 687b ldr r3, [r7, #4] - 80274de: 681b ldr r3, [r3, #0] - 80274e0: 681b ldr r3, [r3, #0] - 80274e2: f003 0301 and.w r3, r3, #1 - 80274e6: 2b01 cmp r3, #1 - 80274e8: d1cf bne.n 802748a + 802750c: 687b ldr r3, [r7, #4] + 802750e: 681b ldr r3, [r3, #0] + 8027510: 681b ldr r3, [r3, #0] + 8027512: f003 0301 and.w r3, r3, #1 + 8027516: 2b01 cmp r3, #1 + 8027518: d1cf bne.n 80274ba } } } /* Return HAL status */ return HAL_OK; - 80274ea: 2300 movs r3, #0 -} - 80274ec: 4618 mov r0, r3 - 80274ee: 3710 adds r7, #16 - 80274f0: 46bd mov sp, r7 - 80274f2: bd80 pop {r7, pc} - 80274f4: 8000003f .word 0x8000003f - 80274f8: 40022000 .word 0x40022000 - 80274fc: 40022100 .word 0x40022100 - 8027500: 40022300 .word 0x40022300 - 8027504: 58026300 .word 0x58026300 - -08027508 : + 802751a: 2300 movs r3, #0 +} + 802751c: 4618 mov r0, r3 + 802751e: 3710 adds r7, #16 + 8027520: 46bd mov sp, r7 + 8027522: bd80 pop {r7, pc} + 8027524: 8000003f .word 0x8000003f + 8027528: 40022000 .word 0x40022000 + 802752c: 40022100 .word 0x40022100 + 8027530: 40022300 .word 0x40022300 + 8027534: 58026300 .word 0x58026300 + +08027538 : * stopped. * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc) { - 8027508: b580 push {r7, lr} - 802750a: b084 sub sp, #16 - 802750c: af00 add r7, sp, #0 - 802750e: 6078 str r0, [r7, #4] + 8027538: b580 push {r7, lr} + 802753a: b084 sub sp, #16 + 802753c: af00 add r7, sp, #0 + 802753e: 6078 str r0, [r7, #4] uint32_t tickstart; const uint32_t tmp_adc_is_disable_on_going = LL_ADC_IsDisableOngoing(hadc->Instance); - 8027510: 687b ldr r3, [r7, #4] - 8027512: 681b ldr r3, [r3, #0] - 8027514: 4618 mov r0, r3 - 8027516: f7fe ff48 bl 80263aa - 802751a: 60f8 str r0, [r7, #12] + 8027540: 687b ldr r3, [r7, #4] + 8027542: 681b ldr r3, [r3, #0] + 8027544: 4618 mov r0, r3 + 8027546: f7fe ff48 bl 80263da + 802754a: 60f8 str r0, [r7, #12] /* Verification if ADC is not already disabled: */ /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ /* disabled. */ if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL) - 802751c: 687b ldr r3, [r7, #4] - 802751e: 681b ldr r3, [r3, #0] - 8027520: 4618 mov r0, r3 - 8027522: f7fe ff2f bl 8026384 - 8027526: 4603 mov r3, r0 - 8027528: 2b00 cmp r3, #0 - 802752a: d047 beq.n 80275bc + 802754c: 687b ldr r3, [r7, #4] + 802754e: 681b ldr r3, [r3, #0] + 8027550: 4618 mov r0, r3 + 8027552: f7fe ff2f bl 80263b4 + 8027556: 4603 mov r3, r0 + 8027558: 2b00 cmp r3, #0 + 802755a: d047 beq.n 80275ec && (tmp_adc_is_disable_on_going == 0UL) - 802752c: 68fb ldr r3, [r7, #12] - 802752e: 2b00 cmp r3, #0 - 8027530: d144 bne.n 80275bc + 802755c: 68fb ldr r3, [r7, #12] + 802755e: 2b00 cmp r3, #0 + 8027560: d144 bne.n 80275ec ) { /* Check if conditions to disable the ADC are fulfilled */ if ((hadc->Instance->CR & (ADC_CR_JADSTART | ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN) - 8027532: 687b ldr r3, [r7, #4] - 8027534: 681b ldr r3, [r3, #0] - 8027536: 689b ldr r3, [r3, #8] - 8027538: f003 030d and.w r3, r3, #13 - 802753c: 2b01 cmp r3, #1 - 802753e: d10c bne.n 802755a + 8027562: 687b ldr r3, [r7, #4] + 8027564: 681b ldr r3, [r3, #0] + 8027566: 689b ldr r3, [r3, #8] + 8027568: f003 030d and.w r3, r3, #13 + 802756c: 2b01 cmp r3, #1 + 802756e: d10c bne.n 802758a { /* Disable the ADC peripheral */ LL_ADC_Disable(hadc->Instance); - 8027540: 687b ldr r3, [r7, #4] - 8027542: 681b ldr r3, [r3, #0] - 8027544: 4618 mov r0, r3 - 8027546: f7fe ff09 bl 802635c + 8027570: 687b ldr r3, [r7, #4] + 8027572: 681b ldr r3, [r3, #0] + 8027574: 4618 mov r0, r3 + 8027576: f7fe ff09 bl 802638c __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); - 802754a: 687b ldr r3, [r7, #4] - 802754c: 681b ldr r3, [r3, #0] - 802754e: 2203 movs r2, #3 - 8027550: 601a str r2, [r3, #0] + 802757a: 687b ldr r3, [r7, #4] + 802757c: 681b ldr r3, [r3, #0] + 802757e: 2203 movs r2, #3 + 8027580: 601a str r2, [r3, #0] return HAL_ERROR; } /* Wait for ADC effectively disabled */ /* Get tick count */ tickstart = HAL_GetTick(); - 8027552: f7fe fd1f bl 8025f94 - 8027556: 60b8 str r0, [r7, #8] + 8027582: f7fe fd1f bl 8025fc4 + 8027586: 60b8 str r0, [r7, #8] while ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) - 8027558: e029 b.n 80275ae + 8027588: e029 b.n 80275de SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 802755a: 687b ldr r3, [r7, #4] - 802755c: 6d5b ldr r3, [r3, #84] ; 0x54 - 802755e: f043 0210 orr.w r2, r3, #16 - 8027562: 687b ldr r3, [r7, #4] - 8027564: 655a str r2, [r3, #84] ; 0x54 + 802758a: 687b ldr r3, [r7, #4] + 802758c: 6d5b ldr r3, [r3, #84] ; 0x54 + 802758e: f043 0210 orr.w r2, r3, #16 + 8027592: 687b ldr r3, [r7, #4] + 8027594: 655a str r2, [r3, #84] ; 0x54 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8027566: 687b ldr r3, [r7, #4] - 8027568: 6d9b ldr r3, [r3, #88] ; 0x58 - 802756a: f043 0201 orr.w r2, r3, #1 - 802756e: 687b ldr r3, [r7, #4] - 8027570: 659a str r2, [r3, #88] ; 0x58 + 8027596: 687b ldr r3, [r7, #4] + 8027598: 6d9b ldr r3, [r3, #88] ; 0x58 + 802759a: f043 0201 orr.w r2, r3, #1 + 802759e: 687b ldr r3, [r7, #4] + 80275a0: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 8027572: 2301 movs r3, #1 - 8027574: e023 b.n 80275be + 80275a2: 2301 movs r3, #1 + 80275a4: e023 b.n 80275ee { if ((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 8027576: f7fe fd0d bl 8025f94 - 802757a: 4602 mov r2, r0 - 802757c: 68bb ldr r3, [r7, #8] - 802757e: 1ad3 subs r3, r2, r3 - 8027580: 2b02 cmp r3, #2 - 8027582: d914 bls.n 80275ae + 80275a6: f7fe fd0d bl 8025fc4 + 80275aa: 4602 mov r2, r0 + 80275ac: 68bb ldr r3, [r7, #8] + 80275ae: 1ad3 subs r3, r2, r3 + 80275b0: 2b02 cmp r3, #2 + 80275b2: d914 bls.n 80275de { /* New check to avoid false timeout detection in case of preemption */ if ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) - 8027584: 687b ldr r3, [r7, #4] - 8027586: 681b ldr r3, [r3, #0] - 8027588: 689b ldr r3, [r3, #8] - 802758a: f003 0301 and.w r3, r3, #1 - 802758e: 2b00 cmp r3, #0 - 8027590: d00d beq.n 80275ae + 80275b4: 687b ldr r3, [r7, #4] + 80275b6: 681b ldr r3, [r3, #0] + 80275b8: 689b ldr r3, [r3, #8] + 80275ba: f003 0301 and.w r3, r3, #1 + 80275be: 2b00 cmp r3, #0 + 80275c0: d00d beq.n 80275de { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8027592: 687b ldr r3, [r7, #4] - 8027594: 6d5b ldr r3, [r3, #84] ; 0x54 - 8027596: f043 0210 orr.w r2, r3, #16 - 802759a: 687b ldr r3, [r7, #4] - 802759c: 655a str r2, [r3, #84] ; 0x54 + 80275c2: 687b ldr r3, [r7, #4] + 80275c4: 6d5b ldr r3, [r3, #84] ; 0x54 + 80275c6: f043 0210 orr.w r2, r3, #16 + 80275ca: 687b ldr r3, [r7, #4] + 80275cc: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 802759e: 687b ldr r3, [r7, #4] - 80275a0: 6d9b ldr r3, [r3, #88] ; 0x58 - 80275a2: f043 0201 orr.w r2, r3, #1 - 80275a6: 687b ldr r3, [r7, #4] - 80275a8: 659a str r2, [r3, #88] ; 0x58 + 80275ce: 687b ldr r3, [r7, #4] + 80275d0: 6d9b ldr r3, [r3, #88] ; 0x58 + 80275d2: f043 0201 orr.w r2, r3, #1 + 80275d6: 687b ldr r3, [r7, #4] + 80275d8: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 80275aa: 2301 movs r3, #1 - 80275ac: e007 b.n 80275be + 80275da: 2301 movs r3, #1 + 80275dc: e007 b.n 80275ee while ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) - 80275ae: 687b ldr r3, [r7, #4] - 80275b0: 681b ldr r3, [r3, #0] - 80275b2: 689b ldr r3, [r3, #8] - 80275b4: f003 0301 and.w r3, r3, #1 - 80275b8: 2b00 cmp r3, #0 - 80275ba: d1dc bne.n 8027576 + 80275de: 687b ldr r3, [r7, #4] + 80275e0: 681b ldr r3, [r3, #0] + 80275e2: 689b ldr r3, [r3, #8] + 80275e4: f003 0301 and.w r3, r3, #1 + 80275e8: 2b00 cmp r3, #0 + 80275ea: d1dc bne.n 80275a6 } } } /* Return HAL status */ return HAL_OK; - 80275bc: 2300 movs r3, #0 + 80275ec: 2300 movs r3, #0 } - 80275be: 4618 mov r0, r3 - 80275c0: 3710 adds r7, #16 - 80275c2: 46bd mov sp, r7 - 80275c4: bd80 pop {r7, pc} + 80275ee: 4618 mov r0, r3 + 80275f0: 3710 adds r7, #16 + 80275f2: 46bd mov sp, r7 + 80275f4: bd80 pop {r7, pc} ... -080275c8 : +080275f8 : * stopped. * @param hadc ADC handle * @retval None. */ void ADC_ConfigureBoostMode(ADC_HandleTypeDef *hadc) { - 80275c8: b580 push {r7, lr} - 80275ca: b084 sub sp, #16 - 80275cc: af00 add r7, sp, #0 - 80275ce: 6078 str r0, [r7, #4] + 80275f8: b580 push {r7, lr} + 80275fa: b084 sub sp, #16 + 80275fc: af00 add r7, sp, #0 + 80275fe: 6078 str r0, [r7, #4] uint32_t freq; if (ADC_IS_SYNCHRONOUS_CLOCK_MODE(hadc)) - 80275d0: 687b ldr r3, [r7, #4] - 80275d2: 681b ldr r3, [r3, #0] - 80275d4: 4a79 ldr r2, [pc, #484] ; (80277bc ) - 80275d6: 4293 cmp r3, r2 - 80275d8: d004 beq.n 80275e4 - 80275da: 687b ldr r3, [r7, #4] - 80275dc: 681b ldr r3, [r3, #0] - 80275de: 4a78 ldr r2, [pc, #480] ; (80277c0 ) - 80275e0: 4293 cmp r3, r2 - 80275e2: d109 bne.n 80275f8 - 80275e4: 4b77 ldr r3, [pc, #476] ; (80277c4 ) - 80275e6: 689b ldr r3, [r3, #8] - 80275e8: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 80275ec: 2b00 cmp r3, #0 - 80275ee: bf14 ite ne - 80275f0: 2301 movne r3, #1 - 80275f2: 2300 moveq r3, #0 - 80275f4: b2db uxtb r3, r3 - 80275f6: e008 b.n 802760a - 80275f8: 4b73 ldr r3, [pc, #460] ; (80277c8 ) - 80275fa: 689b ldr r3, [r3, #8] - 80275fc: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 8027600: 2b00 cmp r3, #0 - 8027602: bf14 ite ne - 8027604: 2301 movne r3, #1 - 8027606: 2300 moveq r3, #0 - 8027608: b2db uxtb r3, r3 - 802760a: 2b00 cmp r3, #0 - 802760c: d01c beq.n 8027648 + 8027600: 687b ldr r3, [r7, #4] + 8027602: 681b ldr r3, [r3, #0] + 8027604: 4a79 ldr r2, [pc, #484] ; (80277ec ) + 8027606: 4293 cmp r3, r2 + 8027608: d004 beq.n 8027614 + 802760a: 687b ldr r3, [r7, #4] + 802760c: 681b ldr r3, [r3, #0] + 802760e: 4a78 ldr r2, [pc, #480] ; (80277f0 ) + 8027610: 4293 cmp r3, r2 + 8027612: d109 bne.n 8027628 + 8027614: 4b77 ldr r3, [pc, #476] ; (80277f4 ) + 8027616: 689b ldr r3, [r3, #8] + 8027618: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 802761c: 2b00 cmp r3, #0 + 802761e: bf14 ite ne + 8027620: 2301 movne r3, #1 + 8027622: 2300 moveq r3, #0 + 8027624: b2db uxtb r3, r3 + 8027626: e008 b.n 802763a + 8027628: 4b73 ldr r3, [pc, #460] ; (80277f8 ) + 802762a: 689b ldr r3, [r3, #8] + 802762c: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 8027630: 2b00 cmp r3, #0 + 8027632: bf14 ite ne + 8027634: 2301 movne r3, #1 + 8027636: 2300 moveq r3, #0 + 8027638: b2db uxtb r3, r3 + 802763a: 2b00 cmp r3, #0 + 802763c: d01c beq.n 8027678 { freq = HAL_RCC_GetHCLKFreq(); - 802760e: f008 fb5b bl 802fcc8 - 8027612: 60f8 str r0, [r7, #12] + 802763e: f008 fb5b bl 802fcf8 + 8027642: 60f8 str r0, [r7, #12] switch (hadc->Init.ClockPrescaler) - 8027614: 687b ldr r3, [r7, #4] - 8027616: 685b ldr r3, [r3, #4] - 8027618: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 - 802761c: d010 beq.n 8027640 - 802761e: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 - 8027622: d871 bhi.n 8027708 - 8027624: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8027628: d002 beq.n 8027630 - 802762a: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 802762e: d16b bne.n 8027708 + 8027644: 687b ldr r3, [r7, #4] + 8027646: 685b ldr r3, [r3, #4] + 8027648: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 + 802764c: d010 beq.n 8027670 + 802764e: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 + 8027652: d871 bhi.n 8027738 + 8027654: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8027658: d002 beq.n 8027660 + 802765a: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 802765e: d16b bne.n 8027738 { case ADC_CLOCK_SYNC_PCLK_DIV1: case ADC_CLOCK_SYNC_PCLK_DIV2: freq /= (hadc->Init.ClockPrescaler >> ADC_CCR_CKMODE_Pos); - 8027630: 687b ldr r3, [r7, #4] - 8027632: 685b ldr r3, [r3, #4] - 8027634: 0c1b lsrs r3, r3, #16 - 8027636: 68fa ldr r2, [r7, #12] - 8027638: fbb2 f3f3 udiv r3, r2, r3 - 802763c: 60fb str r3, [r7, #12] + 8027660: 687b ldr r3, [r7, #4] + 8027662: 685b ldr r3, [r3, #4] + 8027664: 0c1b lsrs r3, r3, #16 + 8027666: 68fa ldr r2, [r7, #12] + 8027668: fbb2 f3f3 udiv r3, r2, r3 + 802766c: 60fb str r3, [r7, #12] break; - 802763e: e066 b.n 802770e + 802766e: e066 b.n 802773e case ADC_CLOCK_SYNC_PCLK_DIV4: freq /= 4UL; - 8027640: 68fb ldr r3, [r7, #12] - 8027642: 089b lsrs r3, r3, #2 - 8027644: 60fb str r3, [r7, #12] + 8027670: 68fb ldr r3, [r7, #12] + 8027672: 089b lsrs r3, r3, #2 + 8027674: 60fb str r3, [r7, #12] break; - 8027646: e062 b.n 802770e + 8027676: e062 b.n 802773e break; } } else { freq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC); - 8027648: f44f 2000 mov.w r0, #524288 ; 0x80000 - 802764c: f009 fade bl 8030c0c - 8027650: 60f8 str r0, [r7, #12] + 8027678: f44f 2000 mov.w r0, #524288 ; 0x80000 + 802767c: f009 fade bl 8030c3c + 8027680: 60f8 str r0, [r7, #12] switch (hadc->Init.ClockPrescaler) - 8027652: 687b ldr r3, [r7, #4] - 8027654: 685b ldr r3, [r3, #4] - 8027656: f5b3 1f30 cmp.w r3, #2883584 ; 0x2c0000 - 802765a: d051 beq.n 8027700 - 802765c: f5b3 1f30 cmp.w r3, #2883584 ; 0x2c0000 - 8027660: d854 bhi.n 802770c - 8027662: f5b3 1f20 cmp.w r3, #2621440 ; 0x280000 - 8027666: d047 beq.n 80276f8 - 8027668: f5b3 1f20 cmp.w r3, #2621440 ; 0x280000 - 802766c: d84e bhi.n 802770c - 802766e: f5b3 1f10 cmp.w r3, #2359296 ; 0x240000 - 8027672: d03d beq.n 80276f0 - 8027674: f5b3 1f10 cmp.w r3, #2359296 ; 0x240000 - 8027678: d848 bhi.n 802770c - 802767a: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 802767e: d033 beq.n 80276e8 - 8027680: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 8027684: d842 bhi.n 802770c - 8027686: f5b3 1fe0 cmp.w r3, #1835008 ; 0x1c0000 - 802768a: d029 beq.n 80276e0 - 802768c: f5b3 1fe0 cmp.w r3, #1835008 ; 0x1c0000 - 8027690: d83c bhi.n 802770c - 8027692: f5b3 1fc0 cmp.w r3, #1572864 ; 0x180000 - 8027696: d01a beq.n 80276ce - 8027698: f5b3 1fc0 cmp.w r3, #1572864 ; 0x180000 - 802769c: d836 bhi.n 802770c - 802769e: f5b3 1fa0 cmp.w r3, #1310720 ; 0x140000 - 80276a2: d014 beq.n 80276ce - 80276a4: f5b3 1fa0 cmp.w r3, #1310720 ; 0x140000 - 80276a8: d830 bhi.n 802770c - 80276aa: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 80276ae: d00e beq.n 80276ce - 80276b0: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 80276b4: d82a bhi.n 802770c - 80276b6: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000 - 80276ba: d008 beq.n 80276ce - 80276bc: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000 - 80276c0: d824 bhi.n 802770c - 80276c2: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 - 80276c6: d002 beq.n 80276ce - 80276c8: f5b3 2f00 cmp.w r3, #524288 ; 0x80000 - 80276cc: d11e bne.n 802770c + 8027682: 687b ldr r3, [r7, #4] + 8027684: 685b ldr r3, [r3, #4] + 8027686: f5b3 1f30 cmp.w r3, #2883584 ; 0x2c0000 + 802768a: d051 beq.n 8027730 + 802768c: f5b3 1f30 cmp.w r3, #2883584 ; 0x2c0000 + 8027690: d854 bhi.n 802773c + 8027692: f5b3 1f20 cmp.w r3, #2621440 ; 0x280000 + 8027696: d047 beq.n 8027728 + 8027698: f5b3 1f20 cmp.w r3, #2621440 ; 0x280000 + 802769c: d84e bhi.n 802773c + 802769e: f5b3 1f10 cmp.w r3, #2359296 ; 0x240000 + 80276a2: d03d beq.n 8027720 + 80276a4: f5b3 1f10 cmp.w r3, #2359296 ; 0x240000 + 80276a8: d848 bhi.n 802773c + 80276aa: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 80276ae: d033 beq.n 8027718 + 80276b0: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 80276b4: d842 bhi.n 802773c + 80276b6: f5b3 1fe0 cmp.w r3, #1835008 ; 0x1c0000 + 80276ba: d029 beq.n 8027710 + 80276bc: f5b3 1fe0 cmp.w r3, #1835008 ; 0x1c0000 + 80276c0: d83c bhi.n 802773c + 80276c2: f5b3 1fc0 cmp.w r3, #1572864 ; 0x180000 + 80276c6: d01a beq.n 80276fe + 80276c8: f5b3 1fc0 cmp.w r3, #1572864 ; 0x180000 + 80276cc: d836 bhi.n 802773c + 80276ce: f5b3 1fa0 cmp.w r3, #1310720 ; 0x140000 + 80276d2: d014 beq.n 80276fe + 80276d4: f5b3 1fa0 cmp.w r3, #1310720 ; 0x140000 + 80276d8: d830 bhi.n 802773c + 80276da: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 80276de: d00e beq.n 80276fe + 80276e0: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 80276e4: d82a bhi.n 802773c + 80276e6: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000 + 80276ea: d008 beq.n 80276fe + 80276ec: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000 + 80276f0: d824 bhi.n 802773c + 80276f2: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 + 80276f6: d002 beq.n 80276fe + 80276f8: f5b3 2f00 cmp.w r3, #524288 ; 0x80000 + 80276fc: d11e bne.n 802773c case ADC_CLOCK_ASYNC_DIV4: case ADC_CLOCK_ASYNC_DIV6: case ADC_CLOCK_ASYNC_DIV8: case ADC_CLOCK_ASYNC_DIV10: case ADC_CLOCK_ASYNC_DIV12: freq /= ((hadc->Init.ClockPrescaler >> ADC_CCR_PRESC_Pos) << 1UL); - 80276ce: 687b ldr r3, [r7, #4] - 80276d0: 685b ldr r3, [r3, #4] - 80276d2: 0c9b lsrs r3, r3, #18 - 80276d4: 005b lsls r3, r3, #1 - 80276d6: 68fa ldr r2, [r7, #12] - 80276d8: fbb2 f3f3 udiv r3, r2, r3 - 80276dc: 60fb str r3, [r7, #12] + 80276fe: 687b ldr r3, [r7, #4] + 8027700: 685b ldr r3, [r3, #4] + 8027702: 0c9b lsrs r3, r3, #18 + 8027704: 005b lsls r3, r3, #1 + 8027706: 68fa ldr r2, [r7, #12] + 8027708: fbb2 f3f3 udiv r3, r2, r3 + 802770c: 60fb str r3, [r7, #12] break; - 80276de: e016 b.n 802770e + 802770e: e016 b.n 802773e case ADC_CLOCK_ASYNC_DIV16: freq /= 16UL; - 80276e0: 68fb ldr r3, [r7, #12] - 80276e2: 091b lsrs r3, r3, #4 - 80276e4: 60fb str r3, [r7, #12] + 8027710: 68fb ldr r3, [r7, #12] + 8027712: 091b lsrs r3, r3, #4 + 8027714: 60fb str r3, [r7, #12] break; - 80276e6: e012 b.n 802770e + 8027716: e012 b.n 802773e case ADC_CLOCK_ASYNC_DIV32: freq /= 32UL; - 80276e8: 68fb ldr r3, [r7, #12] - 80276ea: 095b lsrs r3, r3, #5 - 80276ec: 60fb str r3, [r7, #12] + 8027718: 68fb ldr r3, [r7, #12] + 802771a: 095b lsrs r3, r3, #5 + 802771c: 60fb str r3, [r7, #12] break; - 80276ee: e00e b.n 802770e + 802771e: e00e b.n 802773e case ADC_CLOCK_ASYNC_DIV64: freq /= 64UL; - 80276f0: 68fb ldr r3, [r7, #12] - 80276f2: 099b lsrs r3, r3, #6 - 80276f4: 60fb str r3, [r7, #12] + 8027720: 68fb ldr r3, [r7, #12] + 8027722: 099b lsrs r3, r3, #6 + 8027724: 60fb str r3, [r7, #12] break; - 80276f6: e00a b.n 802770e + 8027726: e00a b.n 802773e case ADC_CLOCK_ASYNC_DIV128: freq /= 128UL; - 80276f8: 68fb ldr r3, [r7, #12] - 80276fa: 09db lsrs r3, r3, #7 - 80276fc: 60fb str r3, [r7, #12] + 8027728: 68fb ldr r3, [r7, #12] + 802772a: 09db lsrs r3, r3, #7 + 802772c: 60fb str r3, [r7, #12] break; - 80276fe: e006 b.n 802770e + 802772e: e006 b.n 802773e case ADC_CLOCK_ASYNC_DIV256: freq /= 256UL; - 8027700: 68fb ldr r3, [r7, #12] - 8027702: 0a1b lsrs r3, r3, #8 - 8027704: 60fb str r3, [r7, #12] + 8027730: 68fb ldr r3, [r7, #12] + 8027732: 0a1b lsrs r3, r3, #8 + 8027734: 60fb str r3, [r7, #12] break; - 8027706: e002 b.n 802770e + 8027736: e002 b.n 802773e break; - 8027708: bf00 nop - 802770a: e000 b.n 802770e + 8027738: bf00 nop + 802773a: e000 b.n 802773e default: break; - 802770c: bf00 nop + 802773c: bf00 nop else /* if(freq > 25000000UL) */ { MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0); } #else if (HAL_GetREVID() <= REV_ID_Y) /* STM32H7 silicon Rev.Y */ - 802770e: f7fe fc71 bl 8025ff4 - 8027712: 4603 mov r3, r0 - 8027714: f241 0203 movw r2, #4099 ; 0x1003 - 8027718: 4293 cmp r3, r2 - 802771a: d815 bhi.n 8027748 + 802773e: f7fe fc71 bl 8026024 + 8027742: 4603 mov r3, r0 + 8027744: f241 0203 movw r2, #4099 ; 0x1003 + 8027748: 4293 cmp r3, r2 + 802774a: d815 bhi.n 8027778 { if (freq > 20000000UL) - 802771c: 68fb ldr r3, [r7, #12] - 802771e: 4a2b ldr r2, [pc, #172] ; (80277cc ) - 8027720: 4293 cmp r3, r2 - 8027722: d908 bls.n 8027736 + 802774c: 68fb ldr r3, [r7, #12] + 802774e: 4a2b ldr r2, [pc, #172] ; (80277fc ) + 8027750: 4293 cmp r3, r2 + 8027752: d908 bls.n 8027766 { SET_BIT(hadc->Instance->CR, ADC_CR_BOOST_0); - 8027724: 687b ldr r3, [r7, #4] - 8027726: 681b ldr r3, [r3, #0] - 8027728: 689a ldr r2, [r3, #8] - 802772a: 687b ldr r3, [r7, #4] - 802772c: 681b ldr r3, [r3, #0] - 802772e: f442 7280 orr.w r2, r2, #256 ; 0x100 - 8027732: 609a str r2, [r3, #8] + 8027754: 687b ldr r3, [r7, #4] + 8027756: 681b ldr r3, [r3, #0] + 8027758: 689a ldr r2, [r3, #8] + 802775a: 687b ldr r3, [r7, #4] + 802775c: 681b ldr r3, [r3, #0] + 802775e: f442 7280 orr.w r2, r2, #256 ; 0x100 + 8027762: 609a str r2, [r3, #8] { MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0); } } #endif /* ADC_VER_V5_3 */ } - 8027734: e03e b.n 80277b4 + 8027764: e03e b.n 80277e4 CLEAR_BIT(hadc->Instance->CR, ADC_CR_BOOST_0); - 8027736: 687b ldr r3, [r7, #4] - 8027738: 681b ldr r3, [r3, #0] - 802773a: 689a ldr r2, [r3, #8] - 802773c: 687b ldr r3, [r7, #4] - 802773e: 681b ldr r3, [r3, #0] - 8027740: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8027744: 609a str r2, [r3, #8] -} - 8027746: e035 b.n 80277b4 + 8027766: 687b ldr r3, [r7, #4] + 8027768: 681b ldr r3, [r3, #0] + 802776a: 689a ldr r2, [r3, #8] + 802776c: 687b ldr r3, [r7, #4] + 802776e: 681b ldr r3, [r3, #0] + 8027770: f422 7280 bic.w r2, r2, #256 ; 0x100 + 8027774: 609a str r2, [r3, #8] +} + 8027776: e035 b.n 80277e4 freq /= 2U; /* divider by 2 for Rev.V */ - 8027748: 68fb ldr r3, [r7, #12] - 802774a: 085b lsrs r3, r3, #1 - 802774c: 60fb str r3, [r7, #12] + 8027778: 68fb ldr r3, [r7, #12] + 802777a: 085b lsrs r3, r3, #1 + 802777c: 60fb str r3, [r7, #12] if (freq <= 6250000UL) - 802774e: 68fb ldr r3, [r7, #12] - 8027750: 4a1f ldr r2, [pc, #124] ; (80277d0 ) - 8027752: 4293 cmp r3, r2 - 8027754: d808 bhi.n 8027768 + 802777e: 68fb ldr r3, [r7, #12] + 8027780: 4a1f ldr r2, [pc, #124] ; (8027800 ) + 8027782: 4293 cmp r3, r2 + 8027784: d808 bhi.n 8027798 MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, 0UL); - 8027756: 687b ldr r3, [r7, #4] - 8027758: 681b ldr r3, [r3, #0] - 802775a: 689a ldr r2, [r3, #8] - 802775c: 687b ldr r3, [r7, #4] - 802775e: 681b ldr r3, [r3, #0] - 8027760: f422 7240 bic.w r2, r2, #768 ; 0x300 - 8027764: 609a str r2, [r3, #8] -} - 8027766: e025 b.n 80277b4 + 8027786: 687b ldr r3, [r7, #4] + 8027788: 681b ldr r3, [r3, #0] + 802778a: 689a ldr r2, [r3, #8] + 802778c: 687b ldr r3, [r7, #4] + 802778e: 681b ldr r3, [r3, #0] + 8027790: f422 7240 bic.w r2, r2, #768 ; 0x300 + 8027794: 609a str r2, [r3, #8] +} + 8027796: e025 b.n 80277e4 else if (freq <= 12500000UL) - 8027768: 68fb ldr r3, [r7, #12] - 802776a: 4a1a ldr r2, [pc, #104] ; (80277d4 ) - 802776c: 4293 cmp r3, r2 - 802776e: d80a bhi.n 8027786 + 8027798: 68fb ldr r3, [r7, #12] + 802779a: 4a1a ldr r2, [pc, #104] ; (8027804 ) + 802779c: 4293 cmp r3, r2 + 802779e: d80a bhi.n 80277b6 MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_0); - 8027770: 687b ldr r3, [r7, #4] - 8027772: 681b ldr r3, [r3, #0] - 8027774: 689b ldr r3, [r3, #8] - 8027776: f423 7240 bic.w r2, r3, #768 ; 0x300 - 802777a: 687b ldr r3, [r7, #4] - 802777c: 681b ldr r3, [r3, #0] - 802777e: f442 7280 orr.w r2, r2, #256 ; 0x100 - 8027782: 609a str r2, [r3, #8] -} - 8027784: e016 b.n 80277b4 - else if (freq <= 25000000UL) - 8027786: 68fb ldr r3, [r7, #12] - 8027788: 4a13 ldr r2, [pc, #76] ; (80277d8 ) - 802778a: 4293 cmp r3, r2 - 802778c: d80a bhi.n 80277a4 - MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1); - 802778e: 687b ldr r3, [r7, #4] - 8027790: 681b ldr r3, [r3, #0] - 8027792: 689b ldr r3, [r3, #8] - 8027794: f423 7240 bic.w r2, r3, #768 ; 0x300 - 8027798: 687b ldr r3, [r7, #4] - 802779a: 681b ldr r3, [r3, #0] - 802779c: f442 7200 orr.w r2, r2, #512 ; 0x200 - 80277a0: 609a str r2, [r3, #8] -} - 80277a2: e007 b.n 80277b4 - MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0); - 80277a4: 687b ldr r3, [r7, #4] - 80277a6: 681b ldr r3, [r3, #0] - 80277a8: 689a ldr r2, [r3, #8] + 80277a0: 687b ldr r3, [r7, #4] + 80277a2: 681b ldr r3, [r3, #0] + 80277a4: 689b ldr r3, [r3, #8] + 80277a6: f423 7240 bic.w r2, r3, #768 ; 0x300 80277aa: 687b ldr r3, [r7, #4] 80277ac: 681b ldr r3, [r3, #0] - 80277ae: f442 7240 orr.w r2, r2, #768 ; 0x300 + 80277ae: f442 7280 orr.w r2, r2, #256 ; 0x100 80277b2: 609a str r2, [r3, #8] } - 80277b4: bf00 nop - 80277b6: 3710 adds r7, #16 - 80277b8: 46bd mov sp, r7 - 80277ba: bd80 pop {r7, pc} - 80277bc: 40022000 .word 0x40022000 - 80277c0: 40022100 .word 0x40022100 - 80277c4: 40022300 .word 0x40022300 - 80277c8: 58026300 .word 0x58026300 - 80277cc: 01312d00 .word 0x01312d00 - 80277d0: 005f5e10 .word 0x005f5e10 - 80277d4: 00bebc20 .word 0x00bebc20 - 80277d8: 017d7840 .word 0x017d7840 - -080277dc <__NVIC_SetPriorityGrouping>: -{ - 80277dc: b480 push {r7} - 80277de: b085 sub sp, #20 - 80277e0: af00 add r7, sp, #0 - 80277e2: 6078 str r0, [r7, #4] + 80277b4: e016 b.n 80277e4 + else if (freq <= 25000000UL) + 80277b6: 68fb ldr r3, [r7, #12] + 80277b8: 4a13 ldr r2, [pc, #76] ; (8027808 ) + 80277ba: 4293 cmp r3, r2 + 80277bc: d80a bhi.n 80277d4 + MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1); + 80277be: 687b ldr r3, [r7, #4] + 80277c0: 681b ldr r3, [r3, #0] + 80277c2: 689b ldr r3, [r3, #8] + 80277c4: f423 7240 bic.w r2, r3, #768 ; 0x300 + 80277c8: 687b ldr r3, [r7, #4] + 80277ca: 681b ldr r3, [r3, #0] + 80277cc: f442 7200 orr.w r2, r2, #512 ; 0x200 + 80277d0: 609a str r2, [r3, #8] +} + 80277d2: e007 b.n 80277e4 + MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0); + 80277d4: 687b ldr r3, [r7, #4] + 80277d6: 681b ldr r3, [r3, #0] + 80277d8: 689a ldr r2, [r3, #8] + 80277da: 687b ldr r3, [r7, #4] + 80277dc: 681b ldr r3, [r3, #0] + 80277de: f442 7240 orr.w r2, r2, #768 ; 0x300 + 80277e2: 609a str r2, [r3, #8] +} + 80277e4: bf00 nop + 80277e6: 3710 adds r7, #16 + 80277e8: 46bd mov sp, r7 + 80277ea: bd80 pop {r7, pc} + 80277ec: 40022000 .word 0x40022000 + 80277f0: 40022100 .word 0x40022100 + 80277f4: 40022300 .word 0x40022300 + 80277f8: 58026300 .word 0x58026300 + 80277fc: 01312d00 .word 0x01312d00 + 8027800: 005f5e10 .word 0x005f5e10 + 8027804: 00bebc20 .word 0x00bebc20 + 8027808: 017d7840 .word 0x017d7840 + +0802780c <__NVIC_SetPriorityGrouping>: +{ + 802780c: b480 push {r7} + 802780e: b085 sub sp, #20 + 8027810: af00 add r7, sp, #0 + 8027812: 6078 str r0, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 80277e4: 687b ldr r3, [r7, #4] - 80277e6: f003 0307 and.w r3, r3, #7 - 80277ea: 60fb str r3, [r7, #12] + 8027814: 687b ldr r3, [r7, #4] + 8027816: f003 0307 and.w r3, r3, #7 + 802781a: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 80277ec: 4b0b ldr r3, [pc, #44] ; (802781c <__NVIC_SetPriorityGrouping+0x40>) - 80277ee: 68db ldr r3, [r3, #12] - 80277f0: 60bb str r3, [r7, #8] + 802781c: 4b0b ldr r3, [pc, #44] ; (802784c <__NVIC_SetPriorityGrouping+0x40>) + 802781e: 68db ldr r3, [r3, #12] + 8027820: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 80277f2: 68ba ldr r2, [r7, #8] - 80277f4: f64f 03ff movw r3, #63743 ; 0xf8ff - 80277f8: 4013 ands r3, r2 - 80277fa: 60bb str r3, [r7, #8] + 8027822: 68ba ldr r2, [r7, #8] + 8027824: f64f 03ff movw r3, #63743 ; 0xf8ff + 8027828: 4013 ands r3, r2 + 802782a: 60bb str r3, [r7, #8] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 80277fc: 68fb ldr r3, [r7, #12] - 80277fe: 021a lsls r2, r3, #8 + 802782c: 68fb ldr r3, [r7, #12] + 802782e: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8027800: 68bb ldr r3, [r7, #8] - 8027802: 431a orrs r2, r3 + 8027830: 68bb ldr r3, [r7, #8] + 8027832: 431a orrs r2, r3 reg_value = (reg_value | - 8027804: 4b06 ldr r3, [pc, #24] ; (8027820 <__NVIC_SetPriorityGrouping+0x44>) - 8027806: 4313 orrs r3, r2 - 8027808: 60bb str r3, [r7, #8] + 8027834: 4b06 ldr r3, [pc, #24] ; (8027850 <__NVIC_SetPriorityGrouping+0x44>) + 8027836: 4313 orrs r3, r2 + 8027838: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 802780a: 4a04 ldr r2, [pc, #16] ; (802781c <__NVIC_SetPriorityGrouping+0x40>) - 802780c: 68bb ldr r3, [r7, #8] - 802780e: 60d3 str r3, [r2, #12] -} - 8027810: bf00 nop - 8027812: 3714 adds r7, #20 - 8027814: 46bd mov sp, r7 - 8027816: f85d 7b04 ldr.w r7, [sp], #4 - 802781a: 4770 bx lr - 802781c: e000ed00 .word 0xe000ed00 - 8027820: 05fa0000 .word 0x05fa0000 - -08027824 <__NVIC_GetPriorityGrouping>: -{ - 8027824: b480 push {r7} - 8027826: af00 add r7, sp, #0 + 802783a: 4a04 ldr r2, [pc, #16] ; (802784c <__NVIC_SetPriorityGrouping+0x40>) + 802783c: 68bb ldr r3, [r7, #8] + 802783e: 60d3 str r3, [r2, #12] +} + 8027840: bf00 nop + 8027842: 3714 adds r7, #20 + 8027844: 46bd mov sp, r7 + 8027846: f85d 7b04 ldr.w r7, [sp], #4 + 802784a: 4770 bx lr + 802784c: e000ed00 .word 0xe000ed00 + 8027850: 05fa0000 .word 0x05fa0000 + +08027854 <__NVIC_GetPriorityGrouping>: +{ + 8027854: b480 push {r7} + 8027856: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8027828: 4b04 ldr r3, [pc, #16] ; (802783c <__NVIC_GetPriorityGrouping+0x18>) - 802782a: 68db ldr r3, [r3, #12] - 802782c: 0a1b lsrs r3, r3, #8 - 802782e: f003 0307 and.w r3, r3, #7 -} - 8027832: 4618 mov r0, r3 - 8027834: 46bd mov sp, r7 - 8027836: f85d 7b04 ldr.w r7, [sp], #4 - 802783a: 4770 bx lr - 802783c: e000ed00 .word 0xe000ed00 - -08027840 <__NVIC_EnableIRQ>: -{ - 8027840: b480 push {r7} - 8027842: b083 sub sp, #12 - 8027844: af00 add r7, sp, #0 - 8027846: 4603 mov r3, r0 - 8027848: 80fb strh r3, [r7, #6] + 8027858: 4b04 ldr r3, [pc, #16] ; (802786c <__NVIC_GetPriorityGrouping+0x18>) + 802785a: 68db ldr r3, [r3, #12] + 802785c: 0a1b lsrs r3, r3, #8 + 802785e: f003 0307 and.w r3, r3, #7 +} + 8027862: 4618 mov r0, r3 + 8027864: 46bd mov sp, r7 + 8027866: f85d 7b04 ldr.w r7, [sp], #4 + 802786a: 4770 bx lr + 802786c: e000ed00 .word 0xe000ed00 + +08027870 <__NVIC_EnableIRQ>: +{ + 8027870: b480 push {r7} + 8027872: b083 sub sp, #12 + 8027874: af00 add r7, sp, #0 + 8027876: 4603 mov r3, r0 + 8027878: 80fb strh r3, [r7, #6] if ((int32_t)(IRQn) >= 0) - 802784a: f9b7 3006 ldrsh.w r3, [r7, #6] - 802784e: 2b00 cmp r3, #0 - 8027850: db0b blt.n 802786a <__NVIC_EnableIRQ+0x2a> + 802787a: f9b7 3006 ldrsh.w r3, [r7, #6] + 802787e: 2b00 cmp r3, #0 + 8027880: db0b blt.n 802789a <__NVIC_EnableIRQ+0x2a> NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8027852: 88fb ldrh r3, [r7, #6] - 8027854: f003 021f and.w r2, r3, #31 - 8027858: 4907 ldr r1, [pc, #28] ; (8027878 <__NVIC_EnableIRQ+0x38>) - 802785a: f9b7 3006 ldrsh.w r3, [r7, #6] - 802785e: 095b lsrs r3, r3, #5 - 8027860: 2001 movs r0, #1 - 8027862: fa00 f202 lsl.w r2, r0, r2 - 8027866: f841 2023 str.w r2, [r1, r3, lsl #2] -} - 802786a: bf00 nop - 802786c: 370c adds r7, #12 - 802786e: 46bd mov sp, r7 - 8027870: f85d 7b04 ldr.w r7, [sp], #4 - 8027874: 4770 bx lr - 8027876: bf00 nop - 8027878: e000e100 .word 0xe000e100 - -0802787c <__NVIC_SetPriority>: -{ - 802787c: b480 push {r7} - 802787e: b083 sub sp, #12 - 8027880: af00 add r7, sp, #0 - 8027882: 4603 mov r3, r0 - 8027884: 6039 str r1, [r7, #0] - 8027886: 80fb strh r3, [r7, #6] + 8027882: 88fb ldrh r3, [r7, #6] + 8027884: f003 021f and.w r2, r3, #31 + 8027888: 4907 ldr r1, [pc, #28] ; (80278a8 <__NVIC_EnableIRQ+0x38>) + 802788a: f9b7 3006 ldrsh.w r3, [r7, #6] + 802788e: 095b lsrs r3, r3, #5 + 8027890: 2001 movs r0, #1 + 8027892: fa00 f202 lsl.w r2, r0, r2 + 8027896: f841 2023 str.w r2, [r1, r3, lsl #2] +} + 802789a: bf00 nop + 802789c: 370c adds r7, #12 + 802789e: 46bd mov sp, r7 + 80278a0: f85d 7b04 ldr.w r7, [sp], #4 + 80278a4: 4770 bx lr + 80278a6: bf00 nop + 80278a8: e000e100 .word 0xe000e100 + +080278ac <__NVIC_SetPriority>: +{ + 80278ac: b480 push {r7} + 80278ae: b083 sub sp, #12 + 80278b0: af00 add r7, sp, #0 + 80278b2: 4603 mov r3, r0 + 80278b4: 6039 str r1, [r7, #0] + 80278b6: 80fb strh r3, [r7, #6] if ((int32_t)(IRQn) >= 0) - 8027888: f9b7 3006 ldrsh.w r3, [r7, #6] - 802788c: 2b00 cmp r3, #0 - 802788e: db0a blt.n 80278a6 <__NVIC_SetPriority+0x2a> + 80278b8: f9b7 3006 ldrsh.w r3, [r7, #6] + 80278bc: 2b00 cmp r3, #0 + 80278be: db0a blt.n 80278d6 <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8027890: 683b ldr r3, [r7, #0] - 8027892: b2da uxtb r2, r3 - 8027894: 490c ldr r1, [pc, #48] ; (80278c8 <__NVIC_SetPriority+0x4c>) - 8027896: f9b7 3006 ldrsh.w r3, [r7, #6] - 802789a: 0112 lsls r2, r2, #4 - 802789c: b2d2 uxtb r2, r2 - 802789e: 440b add r3, r1 - 80278a0: f883 2300 strb.w r2, [r3, #768] ; 0x300 -} - 80278a4: e00a b.n 80278bc <__NVIC_SetPriority+0x40> + 80278c0: 683b ldr r3, [r7, #0] + 80278c2: b2da uxtb r2, r3 + 80278c4: 490c ldr r1, [pc, #48] ; (80278f8 <__NVIC_SetPriority+0x4c>) + 80278c6: f9b7 3006 ldrsh.w r3, [r7, #6] + 80278ca: 0112 lsls r2, r2, #4 + 80278cc: b2d2 uxtb r2, r2 + 80278ce: 440b add r3, r1 + 80278d0: f883 2300 strb.w r2, [r3, #768] ; 0x300 +} + 80278d4: e00a b.n 80278ec <__NVIC_SetPriority+0x40> SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 80278a6: 683b ldr r3, [r7, #0] - 80278a8: b2da uxtb r2, r3 - 80278aa: 4908 ldr r1, [pc, #32] ; (80278cc <__NVIC_SetPriority+0x50>) - 80278ac: 88fb ldrh r3, [r7, #6] - 80278ae: f003 030f and.w r3, r3, #15 - 80278b2: 3b04 subs r3, #4 - 80278b4: 0112 lsls r2, r2, #4 - 80278b6: b2d2 uxtb r2, r2 - 80278b8: 440b add r3, r1 - 80278ba: 761a strb r2, [r3, #24] -} - 80278bc: bf00 nop - 80278be: 370c adds r7, #12 - 80278c0: 46bd mov sp, r7 - 80278c2: f85d 7b04 ldr.w r7, [sp], #4 - 80278c6: 4770 bx lr - 80278c8: e000e100 .word 0xe000e100 - 80278cc: e000ed00 .word 0xe000ed00 - -080278d0 : -{ - 80278d0: b480 push {r7} - 80278d2: b089 sub sp, #36 ; 0x24 - 80278d4: af00 add r7, sp, #0 - 80278d6: 60f8 str r0, [r7, #12] - 80278d8: 60b9 str r1, [r7, #8] - 80278da: 607a str r2, [r7, #4] + 80278d6: 683b ldr r3, [r7, #0] + 80278d8: b2da uxtb r2, r3 + 80278da: 4908 ldr r1, [pc, #32] ; (80278fc <__NVIC_SetPriority+0x50>) + 80278dc: 88fb ldrh r3, [r7, #6] + 80278de: f003 030f and.w r3, r3, #15 + 80278e2: 3b04 subs r3, #4 + 80278e4: 0112 lsls r2, r2, #4 + 80278e6: b2d2 uxtb r2, r2 + 80278e8: 440b add r3, r1 + 80278ea: 761a strb r2, [r3, #24] +} + 80278ec: bf00 nop + 80278ee: 370c adds r7, #12 + 80278f0: 46bd mov sp, r7 + 80278f2: f85d 7b04 ldr.w r7, [sp], #4 + 80278f6: 4770 bx lr + 80278f8: e000e100 .word 0xe000e100 + 80278fc: e000ed00 .word 0xe000ed00 + +08027900 : +{ + 8027900: b480 push {r7} + 8027902: b089 sub sp, #36 ; 0x24 + 8027904: af00 add r7, sp, #0 + 8027906: 60f8 str r0, [r7, #12] + 8027908: 60b9 str r1, [r7, #8] + 802790a: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 80278dc: 68fb ldr r3, [r7, #12] - 80278de: f003 0307 and.w r3, r3, #7 - 80278e2: 61fb str r3, [r7, #28] + 802790c: 68fb ldr r3, [r7, #12] + 802790e: f003 0307 and.w r3, r3, #7 + 8027912: 61fb str r3, [r7, #28] PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 80278e4: 69fb ldr r3, [r7, #28] - 80278e6: f1c3 0307 rsb r3, r3, #7 - 80278ea: 2b04 cmp r3, #4 - 80278ec: bf28 it cs - 80278ee: 2304 movcs r3, #4 - 80278f0: 61bb str r3, [r7, #24] + 8027914: 69fb ldr r3, [r7, #28] + 8027916: f1c3 0307 rsb r3, r3, #7 + 802791a: 2b04 cmp r3, #4 + 802791c: bf28 it cs + 802791e: 2304 movcs r3, #4 + 8027920: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 80278f2: 69fb ldr r3, [r7, #28] - 80278f4: 3304 adds r3, #4 - 80278f6: 2b06 cmp r3, #6 - 80278f8: d902 bls.n 8027900 - 80278fa: 69fb ldr r3, [r7, #28] - 80278fc: 3b03 subs r3, #3 - 80278fe: e000 b.n 8027902 - 8027900: 2300 movs r3, #0 - 8027902: 617b str r3, [r7, #20] + 8027922: 69fb ldr r3, [r7, #28] + 8027924: 3304 adds r3, #4 + 8027926: 2b06 cmp r3, #6 + 8027928: d902 bls.n 8027930 + 802792a: 69fb ldr r3, [r7, #28] + 802792c: 3b03 subs r3, #3 + 802792e: e000 b.n 8027932 + 8027930: 2300 movs r3, #0 + 8027932: 617b str r3, [r7, #20] ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8027904: f04f 32ff mov.w r2, #4294967295 - 8027908: 69bb ldr r3, [r7, #24] - 802790a: fa02 f303 lsl.w r3, r2, r3 - 802790e: 43da mvns r2, r3 - 8027910: 68bb ldr r3, [r7, #8] - 8027912: 401a ands r2, r3 - 8027914: 697b ldr r3, [r7, #20] - 8027916: 409a lsls r2, r3 + 8027934: f04f 32ff mov.w r2, #4294967295 + 8027938: 69bb ldr r3, [r7, #24] + 802793a: fa02 f303 lsl.w r3, r2, r3 + 802793e: 43da mvns r2, r3 + 8027940: 68bb ldr r3, [r7, #8] + 8027942: 401a ands r2, r3 + 8027944: 697b ldr r3, [r7, #20] + 8027946: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8027918: f04f 31ff mov.w r1, #4294967295 - 802791c: 697b ldr r3, [r7, #20] - 802791e: fa01 f303 lsl.w r3, r1, r3 - 8027922: 43d9 mvns r1, r3 - 8027924: 687b ldr r3, [r7, #4] - 8027926: 400b ands r3, r1 + 8027948: f04f 31ff mov.w r1, #4294967295 + 802794c: 697b ldr r3, [r7, #20] + 802794e: fa01 f303 lsl.w r3, r1, r3 + 8027952: 43d9 mvns r1, r3 + 8027954: 687b ldr r3, [r7, #4] + 8027956: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8027928: 4313 orrs r3, r2 + 8027958: 4313 orrs r3, r2 } - 802792a: 4618 mov r0, r3 - 802792c: 3724 adds r7, #36 ; 0x24 - 802792e: 46bd mov sp, r7 - 8027930: f85d 7b04 ldr.w r7, [sp], #4 - 8027934: 4770 bx lr + 802795a: 4618 mov r0, r3 + 802795c: 3724 adds r7, #36 ; 0x24 + 802795e: 46bd mov sp, r7 + 8027960: f85d 7b04 ldr.w r7, [sp], #4 + 8027964: 4770 bx lr ... -08027938 : +08027968 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8027938: b580 push {r7, lr} - 802793a: b082 sub sp, #8 - 802793c: af00 add r7, sp, #0 - 802793e: 6078 str r0, [r7, #4] + 8027968: b580 push {r7, lr} + 802796a: b082 sub sp, #8 + 802796c: af00 add r7, sp, #0 + 802796e: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8027940: 687b ldr r3, [r7, #4] - 8027942: 3b01 subs r3, #1 - 8027944: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 8027948: d301 bcc.n 802794e + 8027970: 687b ldr r3, [r7, #4] + 8027972: 3b01 subs r3, #1 + 8027974: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 8027978: d301 bcc.n 802797e { return (1UL); /* Reload value impossible */ - 802794a: 2301 movs r3, #1 - 802794c: e00f b.n 802796e + 802797a: 2301 movs r3, #1 + 802797c: e00f b.n 802799e } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 802794e: 4a0a ldr r2, [pc, #40] ; (8027978 ) - 8027950: 687b ldr r3, [r7, #4] - 8027952: 3b01 subs r3, #1 - 8027954: 6053 str r3, [r2, #4] + 802797e: 4a0a ldr r2, [pc, #40] ; (80279a8 ) + 8027980: 687b ldr r3, [r7, #4] + 8027982: 3b01 subs r3, #1 + 8027984: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8027956: 210f movs r1, #15 - 8027958: f04f 30ff mov.w r0, #4294967295 - 802795c: f7ff ff8e bl 802787c <__NVIC_SetPriority> + 8027986: 210f movs r1, #15 + 8027988: f04f 30ff mov.w r0, #4294967295 + 802798c: f7ff ff8e bl 80278ac <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8027960: 4b05 ldr r3, [pc, #20] ; (8027978 ) - 8027962: 2200 movs r2, #0 - 8027964: 609a str r2, [r3, #8] + 8027990: 4b05 ldr r3, [pc, #20] ; (80279a8 ) + 8027992: 2200 movs r2, #0 + 8027994: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8027966: 4b04 ldr r3, [pc, #16] ; (8027978 ) - 8027968: 2207 movs r2, #7 - 802796a: 601a str r2, [r3, #0] + 8027996: 4b04 ldr r3, [pc, #16] ; (80279a8 ) + 8027998: 2207 movs r2, #7 + 802799a: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 802796c: 2300 movs r3, #0 + 802799c: 2300 movs r3, #0 } - 802796e: 4618 mov r0, r3 - 8027970: 3708 adds r7, #8 - 8027972: 46bd mov sp, r7 - 8027974: bd80 pop {r7, pc} - 8027976: bf00 nop - 8027978: e000e010 .word 0xe000e010 + 802799e: 4618 mov r0, r3 + 80279a0: 3708 adds r7, #8 + 80279a2: 46bd mov sp, r7 + 80279a4: bd80 pop {r7, pc} + 80279a6: bf00 nop + 80279a8: e000e010 .word 0xe000e010 -0802797c : +080279ac : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 802797c: b580 push {r7, lr} - 802797e: b082 sub sp, #8 - 8027980: af00 add r7, sp, #0 - 8027982: 6078 str r0, [r7, #4] + 80279ac: b580 push {r7, lr} + 80279ae: b082 sub sp, #8 + 80279b0: af00 add r7, sp, #0 + 80279b2: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8027984: 6878 ldr r0, [r7, #4] - 8027986: f7ff ff29 bl 80277dc <__NVIC_SetPriorityGrouping> + 80279b4: 6878 ldr r0, [r7, #4] + 80279b6: f7ff ff29 bl 802780c <__NVIC_SetPriorityGrouping> } - 802798a: bf00 nop - 802798c: 3708 adds r7, #8 - 802798e: 46bd mov sp, r7 - 8027990: bd80 pop {r7, pc} + 80279ba: bf00 nop + 80279bc: 3708 adds r7, #8 + 80279be: 46bd mov sp, r7 + 80279c0: bd80 pop {r7, pc} -08027992 : +080279c2 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8027992: b580 push {r7, lr} - 8027994: b086 sub sp, #24 - 8027996: af00 add r7, sp, #0 - 8027998: 4603 mov r3, r0 - 802799a: 60b9 str r1, [r7, #8] - 802799c: 607a str r2, [r7, #4] - 802799e: 81fb strh r3, [r7, #14] + 80279c2: b580 push {r7, lr} + 80279c4: b086 sub sp, #24 + 80279c6: af00 add r7, sp, #0 + 80279c8: 4603 mov r3, r0 + 80279ca: 60b9 str r1, [r7, #8] + 80279cc: 607a str r2, [r7, #4] + 80279ce: 81fb strh r3, [r7, #14] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 80279a0: f7ff ff40 bl 8027824 <__NVIC_GetPriorityGrouping> - 80279a4: 6178 str r0, [r7, #20] + 80279d0: f7ff ff40 bl 8027854 <__NVIC_GetPriorityGrouping> + 80279d4: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 80279a6: 687a ldr r2, [r7, #4] - 80279a8: 68b9 ldr r1, [r7, #8] - 80279aa: 6978 ldr r0, [r7, #20] - 80279ac: f7ff ff90 bl 80278d0 - 80279b0: 4602 mov r2, r0 - 80279b2: f9b7 300e ldrsh.w r3, [r7, #14] - 80279b6: 4611 mov r1, r2 - 80279b8: 4618 mov r0, r3 - 80279ba: f7ff ff5f bl 802787c <__NVIC_SetPriority> -} - 80279be: bf00 nop - 80279c0: 3718 adds r7, #24 - 80279c2: 46bd mov sp, r7 - 80279c4: bd80 pop {r7, pc} - -080279c6 : + 80279d6: 687a ldr r2, [r7, #4] + 80279d8: 68b9 ldr r1, [r7, #8] + 80279da: 6978 ldr r0, [r7, #20] + 80279dc: f7ff ff90 bl 8027900 + 80279e0: 4602 mov r2, r0 + 80279e2: f9b7 300e ldrsh.w r3, [r7, #14] + 80279e6: 4611 mov r1, r2 + 80279e8: 4618 mov r0, r3 + 80279ea: f7ff ff5f bl 80278ac <__NVIC_SetPriority> +} + 80279ee: bf00 nop + 80279f0: 3718 adds r7, #24 + 80279f2: 46bd mov sp, r7 + 80279f4: bd80 pop {r7, pc} + +080279f6 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32h7xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 80279c6: b580 push {r7, lr} - 80279c8: b082 sub sp, #8 - 80279ca: af00 add r7, sp, #0 - 80279cc: 4603 mov r3, r0 - 80279ce: 80fb strh r3, [r7, #6] + 80279f6: b580 push {r7, lr} + 80279f8: b082 sub sp, #8 + 80279fa: af00 add r7, sp, #0 + 80279fc: 4603 mov r3, r0 + 80279fe: 80fb strh r3, [r7, #6] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 80279d0: f9b7 3006 ldrsh.w r3, [r7, #6] - 80279d4: 4618 mov r0, r3 - 80279d6: f7ff ff33 bl 8027840 <__NVIC_EnableIRQ> + 8027a00: f9b7 3006 ldrsh.w r3, [r7, #6] + 8027a04: 4618 mov r0, r3 + 8027a06: f7ff ff33 bl 8027870 <__NVIC_EnableIRQ> } - 80279da: bf00 nop - 80279dc: 3708 adds r7, #8 - 80279de: 46bd mov sp, r7 - 80279e0: bd80 pop {r7, pc} + 8027a0a: bf00 nop + 8027a0c: 3708 adds r7, #8 + 8027a0e: 46bd mov sp, r7 + 8027a10: bd80 pop {r7, pc} -080279e2 : +08027a12 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 80279e2: b580 push {r7, lr} - 80279e4: b082 sub sp, #8 - 80279e6: af00 add r7, sp, #0 - 80279e8: 6078 str r0, [r7, #4] + 8027a12: b580 push {r7, lr} + 8027a14: b082 sub sp, #8 + 8027a16: af00 add r7, sp, #0 + 8027a18: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 80279ea: 6878 ldr r0, [r7, #4] - 80279ec: f7ff ffa4 bl 8027938 - 80279f0: 4603 mov r3, r0 -} - 80279f2: 4618 mov r0, r3 - 80279f4: 3708 adds r7, #8 - 80279f6: 46bd mov sp, r7 - 80279f8: bd80 pop {r7, pc} + 8027a1a: 6878 ldr r0, [r7, #4] + 8027a1c: f7ff ffa4 bl 8027968 + 8027a20: 4603 mov r3, r0 +} + 8027a22: 4618 mov r0, r3 + 8027a24: 3708 adds r7, #8 + 8027a26: 46bd mov sp, r7 + 8027a28: bd80 pop {r7, pc} ... -080279fc : +08027a2c : /** * @brief Disables the MPU * @retval None */ void HAL_MPU_Disable(void) { - 80279fc: b480 push {r7} - 80279fe: af00 add r7, sp, #0 + 8027a2c: b480 push {r7} + 8027a2e: af00 add r7, sp, #0 __ASM volatile ("dmb 0xF":::"memory"); - 8027a00: f3bf 8f5f dmb sy + 8027a30: f3bf 8f5f dmb sy } - 8027a04: bf00 nop + 8027a34: bf00 nop /* Make sure outstanding transfers are done */ __DMB(); /* Disable fault exceptions */ SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; - 8027a06: 4b07 ldr r3, [pc, #28] ; (8027a24 ) - 8027a08: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027a0a: 4a06 ldr r2, [pc, #24] ; (8027a24 ) - 8027a0c: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8027a10: 6253 str r3, [r2, #36] ; 0x24 + 8027a36: 4b07 ldr r3, [pc, #28] ; (8027a54 ) + 8027a38: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027a3a: 4a06 ldr r2, [pc, #24] ; (8027a54 ) + 8027a3c: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 8027a40: 6253 str r3, [r2, #36] ; 0x24 /* Disable the MPU and clear the control register*/ MPU->CTRL = 0; - 8027a12: 4b05 ldr r3, [pc, #20] ; (8027a28 ) - 8027a14: 2200 movs r2, #0 - 8027a16: 605a str r2, [r3, #4] -} - 8027a18: bf00 nop - 8027a1a: 46bd mov sp, r7 - 8027a1c: f85d 7b04 ldr.w r7, [sp], #4 - 8027a20: 4770 bx lr - 8027a22: bf00 nop - 8027a24: e000ed00 .word 0xe000ed00 - 8027a28: e000ed90 .word 0xe000ed90 - -08027a2c : + 8027a42: 4b05 ldr r3, [pc, #20] ; (8027a58 ) + 8027a44: 2200 movs r2, #0 + 8027a46: 605a str r2, [r3, #4] +} + 8027a48: bf00 nop + 8027a4a: 46bd mov sp, r7 + 8027a4c: f85d 7b04 ldr.w r7, [sp], #4 + 8027a50: 4770 bx lr + 8027a52: bf00 nop + 8027a54: e000ed00 .word 0xe000ed00 + 8027a58: e000ed90 .word 0xe000ed90 + +08027a5c : * @arg MPU_PRIVILEGED_DEFAULT * @arg MPU_HFNMI_PRIVDEF * @retval None */ void HAL_MPU_Enable(uint32_t MPU_Control) { - 8027a2c: b480 push {r7} - 8027a2e: b083 sub sp, #12 - 8027a30: af00 add r7, sp, #0 - 8027a32: 6078 str r0, [r7, #4] + 8027a5c: b480 push {r7} + 8027a5e: b083 sub sp, #12 + 8027a60: af00 add r7, sp, #0 + 8027a62: 6078 str r0, [r7, #4] /* Enable the MPU */ MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; - 8027a34: 4a0b ldr r2, [pc, #44] ; (8027a64 ) - 8027a36: 687b ldr r3, [r7, #4] - 8027a38: f043 0301 orr.w r3, r3, #1 - 8027a3c: 6053 str r3, [r2, #4] + 8027a64: 4a0b ldr r2, [pc, #44] ; (8027a94 ) + 8027a66: 687b ldr r3, [r7, #4] + 8027a68: f043 0301 orr.w r3, r3, #1 + 8027a6c: 6053 str r3, [r2, #4] /* Enable fault exceptions */ SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; - 8027a3e: 4b0a ldr r3, [pc, #40] ; (8027a68 ) - 8027a40: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027a42: 4a09 ldr r2, [pc, #36] ; (8027a68 ) - 8027a44: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8027a48: 6253 str r3, [r2, #36] ; 0x24 + 8027a6e: 4b0a ldr r3, [pc, #40] ; (8027a98 ) + 8027a70: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027a72: 4a09 ldr r2, [pc, #36] ; (8027a98 ) + 8027a74: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8027a78: 6253 str r3, [r2, #36] ; 0x24 __ASM volatile ("dsb 0xF":::"memory"); - 8027a4a: f3bf 8f4f dsb sy + 8027a7a: f3bf 8f4f dsb sy } - 8027a4e: bf00 nop + 8027a7e: bf00 nop __ASM volatile ("isb 0xF":::"memory"); - 8027a50: f3bf 8f6f isb sy + 8027a80: f3bf 8f6f isb sy } - 8027a54: bf00 nop + 8027a84: bf00 nop /* Ensure MPU setting take effects */ __DSB(); __ISB(); } - 8027a56: bf00 nop - 8027a58: 370c adds r7, #12 - 8027a5a: 46bd mov sp, r7 - 8027a5c: f85d 7b04 ldr.w r7, [sp], #4 - 8027a60: 4770 bx lr - 8027a62: bf00 nop - 8027a64: e000ed90 .word 0xe000ed90 - 8027a68: e000ed00 .word 0xe000ed00 + 8027a86: bf00 nop + 8027a88: 370c adds r7, #12 + 8027a8a: 46bd mov sp, r7 + 8027a8c: f85d 7b04 ldr.w r7, [sp], #4 + 8027a90: 4770 bx lr + 8027a92: bf00 nop + 8027a94: e000ed90 .word 0xe000ed90 + 8027a98: e000ed00 .word 0xe000ed00 -08027a6c : +08027a9c : * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains * the initialization and configuration information. * @retval None */ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) { - 8027a6c: b480 push {r7} - 8027a6e: b083 sub sp, #12 - 8027a70: af00 add r7, sp, #0 - 8027a72: 6078 str r0, [r7, #4] + 8027a9c: b480 push {r7} + 8027a9e: b083 sub sp, #12 + 8027aa0: af00 add r7, sp, #0 + 8027aa2: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number)); assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable)); /* Set the Region number */ MPU->RNR = MPU_Init->Number; - 8027a74: 687b ldr r3, [r7, #4] - 8027a76: 785a ldrb r2, [r3, #1] - 8027a78: 4b1d ldr r3, [pc, #116] ; (8027af0 ) - 8027a7a: 609a str r2, [r3, #8] + 8027aa4: 687b ldr r3, [r7, #4] + 8027aa6: 785a ldrb r2, [r3, #1] + 8027aa8: 4b1d ldr r3, [pc, #116] ; (8027b20 ) + 8027aaa: 609a str r2, [r3, #8] if ((MPU_Init->Enable) != 0UL) - 8027a7c: 687b ldr r3, [r7, #4] - 8027a7e: 781b ldrb r3, [r3, #0] - 8027a80: 2b00 cmp r3, #0 - 8027a82: d029 beq.n 8027ad8 + 8027aac: 687b ldr r3, [r7, #4] + 8027aae: 781b ldrb r3, [r3, #0] + 8027ab0: 2b00 cmp r3, #0 + 8027ab2: d029 beq.n 8027b08 assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); MPU->RBAR = MPU_Init->BaseAddress; - 8027a84: 4a1a ldr r2, [pc, #104] ; (8027af0 ) - 8027a86: 687b ldr r3, [r7, #4] - 8027a88: 685b ldr r3, [r3, #4] - 8027a8a: 60d3 str r3, [r2, #12] + 8027ab4: 4a1a ldr r2, [pc, #104] ; (8027b20 ) + 8027ab6: 687b ldr r3, [r7, #4] + 8027ab8: 685b ldr r3, [r3, #4] + 8027aba: 60d3 str r3, [r2, #12] MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - 8027a8c: 687b ldr r3, [r7, #4] - 8027a8e: 7b1b ldrb r3, [r3, #12] - 8027a90: 071a lsls r2, r3, #28 + 8027abc: 687b ldr r3, [r7, #4] + 8027abe: 7b1b ldrb r3, [r3, #12] + 8027ac0: 071a lsls r2, r3, #28 ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - 8027a92: 687b ldr r3, [r7, #4] - 8027a94: 7adb ldrb r3, [r3, #11] - 8027a96: 061b lsls r3, r3, #24 + 8027ac2: 687b ldr r3, [r7, #4] + 8027ac4: 7adb ldrb r3, [r3, #11] + 8027ac6: 061b lsls r3, r3, #24 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - 8027a98: 431a orrs r2, r3 + 8027ac8: 431a orrs r2, r3 ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | - 8027a9a: 687b ldr r3, [r7, #4] - 8027a9c: 7a9b ldrb r3, [r3, #10] - 8027a9e: 04db lsls r3, r3, #19 + 8027aca: 687b ldr r3, [r7, #4] + 8027acc: 7a9b ldrb r3, [r3, #10] + 8027ace: 04db lsls r3, r3, #19 ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - 8027aa0: 431a orrs r2, r3 + 8027ad0: 431a orrs r2, r3 ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - 8027aa2: 687b ldr r3, [r7, #4] - 8027aa4: 7b5b ldrb r3, [r3, #13] - 8027aa6: 049b lsls r3, r3, #18 + 8027ad2: 687b ldr r3, [r7, #4] + 8027ad4: 7b5b ldrb r3, [r3, #13] + 8027ad6: 049b lsls r3, r3, #18 ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | - 8027aa8: 431a orrs r2, r3 + 8027ad8: 431a orrs r2, r3 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - 8027aaa: 687b ldr r3, [r7, #4] - 8027aac: 7b9b ldrb r3, [r3, #14] - 8027aae: 045b lsls r3, r3, #17 + 8027ada: 687b ldr r3, [r7, #4] + 8027adc: 7b9b ldrb r3, [r3, #14] + 8027ade: 045b lsls r3, r3, #17 ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - 8027ab0: 431a orrs r2, r3 + 8027ae0: 431a orrs r2, r3 ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - 8027ab2: 687b ldr r3, [r7, #4] - 8027ab4: 7bdb ldrb r3, [r3, #15] - 8027ab6: 041b lsls r3, r3, #16 + 8027ae2: 687b ldr r3, [r7, #4] + 8027ae4: 7bdb ldrb r3, [r3, #15] + 8027ae6: 041b lsls r3, r3, #16 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - 8027ab8: 431a orrs r2, r3 + 8027ae8: 431a orrs r2, r3 ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - 8027aba: 687b ldr r3, [r7, #4] - 8027abc: 7a5b ldrb r3, [r3, #9] - 8027abe: 021b lsls r3, r3, #8 + 8027aea: 687b ldr r3, [r7, #4] + 8027aec: 7a5b ldrb r3, [r3, #9] + 8027aee: 021b lsls r3, r3, #8 ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - 8027ac0: 431a orrs r2, r3 + 8027af0: 431a orrs r2, r3 ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - 8027ac2: 687b ldr r3, [r7, #4] - 8027ac4: 7a1b ldrb r3, [r3, #8] - 8027ac6: 005b lsls r3, r3, #1 + 8027af2: 687b ldr r3, [r7, #4] + 8027af4: 7a1b ldrb r3, [r3, #8] + 8027af6: 005b lsls r3, r3, #1 ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - 8027ac8: 4313 orrs r3, r2 + 8027af8: 4313 orrs r3, r2 ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); - 8027aca: 687a ldr r2, [r7, #4] - 8027acc: 7812 ldrb r2, [r2, #0] - 8027ace: 4611 mov r1, r2 + 8027afa: 687a ldr r2, [r7, #4] + 8027afc: 7812 ldrb r2, [r2, #0] + 8027afe: 4611 mov r1, r2 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - 8027ad0: 4a07 ldr r2, [pc, #28] ; (8027af0 ) + 8027b00: 4a07 ldr r2, [pc, #28] ; (8027b20 ) ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - 8027ad2: 430b orrs r3, r1 + 8027b02: 430b orrs r3, r1 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - 8027ad4: 6113 str r3, [r2, #16] + 8027b04: 6113 str r3, [r2, #16] else { MPU->RBAR = 0x00; MPU->RASR = 0x00; } } - 8027ad6: e005 b.n 8027ae4 + 8027b06: e005 b.n 8027b14 MPU->RBAR = 0x00; - 8027ad8: 4b05 ldr r3, [pc, #20] ; (8027af0 ) - 8027ada: 2200 movs r2, #0 - 8027adc: 60da str r2, [r3, #12] + 8027b08: 4b05 ldr r3, [pc, #20] ; (8027b20 ) + 8027b0a: 2200 movs r2, #0 + 8027b0c: 60da str r2, [r3, #12] MPU->RASR = 0x00; - 8027ade: 4b04 ldr r3, [pc, #16] ; (8027af0 ) - 8027ae0: 2200 movs r2, #0 - 8027ae2: 611a str r2, [r3, #16] -} - 8027ae4: bf00 nop - 8027ae6: 370c adds r7, #12 - 8027ae8: 46bd mov sp, r7 - 8027aea: f85d 7b04 ldr.w r7, [sp], #4 - 8027aee: 4770 bx lr - 8027af0: e000ed90 .word 0xe000ed90 - -08027af4 : + 8027b0e: 4b04 ldr r3, [pc, #16] ; (8027b20 ) + 8027b10: 2200 movs r2, #0 + 8027b12: 611a str r2, [r3, #16] +} + 8027b14: bf00 nop + 8027b16: 370c adds r7, #12 + 8027b18: 46bd mov sp, r7 + 8027b1a: f85d 7b04 ldr.w r7, [sp], #4 + 8027b1e: 4770 bx lr + 8027b20: e000ed90 .word 0xe000ed90 + +08027b24 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { - 8027af4: b580 push {r7, lr} - 8027af6: b086 sub sp, #24 - 8027af8: af00 add r7, sp, #0 - 8027afa: 6078 str r0, [r7, #4] + 8027b24: b580 push {r7, lr} + 8027b26: b086 sub sp, #24 + 8027b28: af00 add r7, sp, #0 + 8027b2a: 6078 str r0, [r7, #4] uint32_t registerValue; uint32_t tickstart = HAL_GetTick(); - 8027afc: f7fe fa4a bl 8025f94 - 8027b00: 6138 str r0, [r7, #16] + 8027b2c: f7fe fa4a bl 8025fc4 + 8027b30: 6138 str r0, [r7, #16] DMA_Base_Registers *regs_dma; BDMA_Base_Registers *regs_bdma; /* Check the DMA peripheral handle */ if(hdma == NULL) - 8027b02: 687b ldr r3, [r7, #4] - 8027b04: 2b00 cmp r3, #0 - 8027b06: d101 bne.n 8027b0c + 8027b32: 687b ldr r3, [r7, #4] + 8027b34: 2b00 cmp r3, #0 + 8027b36: d101 bne.n 8027b3c { return HAL_ERROR; - 8027b08: 2301 movs r3, #1 - 8027b0a: e316 b.n 802813a + 8027b38: 2301 movs r3, #1 + 8027b3a: e316 b.n 802816a assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 8027b0c: 687b ldr r3, [r7, #4] - 8027b0e: 681b ldr r3, [r3, #0] - 8027b10: 4a66 ldr r2, [pc, #408] ; (8027cac ) - 8027b12: 4293 cmp r3, r2 - 8027b14: d04a beq.n 8027bac - 8027b16: 687b ldr r3, [r7, #4] - 8027b18: 681b ldr r3, [r3, #0] - 8027b1a: 4a65 ldr r2, [pc, #404] ; (8027cb0 ) - 8027b1c: 4293 cmp r3, r2 - 8027b1e: d045 beq.n 8027bac - 8027b20: 687b ldr r3, [r7, #4] - 8027b22: 681b ldr r3, [r3, #0] - 8027b24: 4a63 ldr r2, [pc, #396] ; (8027cb4 ) - 8027b26: 4293 cmp r3, r2 - 8027b28: d040 beq.n 8027bac - 8027b2a: 687b ldr r3, [r7, #4] - 8027b2c: 681b ldr r3, [r3, #0] - 8027b2e: 4a62 ldr r2, [pc, #392] ; (8027cb8 ) - 8027b30: 4293 cmp r3, r2 - 8027b32: d03b beq.n 8027bac - 8027b34: 687b ldr r3, [r7, #4] - 8027b36: 681b ldr r3, [r3, #0] - 8027b38: 4a60 ldr r2, [pc, #384] ; (8027cbc ) - 8027b3a: 4293 cmp r3, r2 - 8027b3c: d036 beq.n 8027bac - 8027b3e: 687b ldr r3, [r7, #4] - 8027b40: 681b ldr r3, [r3, #0] - 8027b42: 4a5f ldr r2, [pc, #380] ; (8027cc0 ) - 8027b44: 4293 cmp r3, r2 - 8027b46: d031 beq.n 8027bac - 8027b48: 687b ldr r3, [r7, #4] - 8027b4a: 681b ldr r3, [r3, #0] - 8027b4c: 4a5d ldr r2, [pc, #372] ; (8027cc4 ) - 8027b4e: 4293 cmp r3, r2 - 8027b50: d02c beq.n 8027bac - 8027b52: 687b ldr r3, [r7, #4] - 8027b54: 681b ldr r3, [r3, #0] - 8027b56: 4a5c ldr r2, [pc, #368] ; (8027cc8 ) - 8027b58: 4293 cmp r3, r2 - 8027b5a: d027 beq.n 8027bac - 8027b5c: 687b ldr r3, [r7, #4] - 8027b5e: 681b ldr r3, [r3, #0] - 8027b60: 4a5a ldr r2, [pc, #360] ; (8027ccc ) - 8027b62: 4293 cmp r3, r2 - 8027b64: d022 beq.n 8027bac - 8027b66: 687b ldr r3, [r7, #4] - 8027b68: 681b ldr r3, [r3, #0] - 8027b6a: 4a59 ldr r2, [pc, #356] ; (8027cd0 ) - 8027b6c: 4293 cmp r3, r2 - 8027b6e: d01d beq.n 8027bac - 8027b70: 687b ldr r3, [r7, #4] - 8027b72: 681b ldr r3, [r3, #0] - 8027b74: 4a57 ldr r2, [pc, #348] ; (8027cd4 ) - 8027b76: 4293 cmp r3, r2 - 8027b78: d018 beq.n 8027bac - 8027b7a: 687b ldr r3, [r7, #4] - 8027b7c: 681b ldr r3, [r3, #0] - 8027b7e: 4a56 ldr r2, [pc, #344] ; (8027cd8 ) - 8027b80: 4293 cmp r3, r2 - 8027b82: d013 beq.n 8027bac - 8027b84: 687b ldr r3, [r7, #4] - 8027b86: 681b ldr r3, [r3, #0] - 8027b88: 4a54 ldr r2, [pc, #336] ; (8027cdc ) - 8027b8a: 4293 cmp r3, r2 - 8027b8c: d00e beq.n 8027bac - 8027b8e: 687b ldr r3, [r7, #4] - 8027b90: 681b ldr r3, [r3, #0] - 8027b92: 4a53 ldr r2, [pc, #332] ; (8027ce0 ) - 8027b94: 4293 cmp r3, r2 - 8027b96: d009 beq.n 8027bac - 8027b98: 687b ldr r3, [r7, #4] - 8027b9a: 681b ldr r3, [r3, #0] - 8027b9c: 4a51 ldr r2, [pc, #324] ; (8027ce4 ) - 8027b9e: 4293 cmp r3, r2 - 8027ba0: d004 beq.n 8027bac - 8027ba2: 687b ldr r3, [r7, #4] - 8027ba4: 681b ldr r3, [r3, #0] - 8027ba6: 4a50 ldr r2, [pc, #320] ; (8027ce8 ) - 8027ba8: 4293 cmp r3, r2 - 8027baa: d101 bne.n 8027bb0 - 8027bac: 2301 movs r3, #1 - 8027bae: e000 b.n 8027bb2 - 8027bb0: 2300 movs r3, #0 - 8027bb2: 2b00 cmp r3, #0 - 8027bb4: f000 813b beq.w 8027e2e + 8027b3c: 687b ldr r3, [r7, #4] + 8027b3e: 681b ldr r3, [r3, #0] + 8027b40: 4a66 ldr r2, [pc, #408] ; (8027cdc ) + 8027b42: 4293 cmp r3, r2 + 8027b44: d04a beq.n 8027bdc + 8027b46: 687b ldr r3, [r7, #4] + 8027b48: 681b ldr r3, [r3, #0] + 8027b4a: 4a65 ldr r2, [pc, #404] ; (8027ce0 ) + 8027b4c: 4293 cmp r3, r2 + 8027b4e: d045 beq.n 8027bdc + 8027b50: 687b ldr r3, [r7, #4] + 8027b52: 681b ldr r3, [r3, #0] + 8027b54: 4a63 ldr r2, [pc, #396] ; (8027ce4 ) + 8027b56: 4293 cmp r3, r2 + 8027b58: d040 beq.n 8027bdc + 8027b5a: 687b ldr r3, [r7, #4] + 8027b5c: 681b ldr r3, [r3, #0] + 8027b5e: 4a62 ldr r2, [pc, #392] ; (8027ce8 ) + 8027b60: 4293 cmp r3, r2 + 8027b62: d03b beq.n 8027bdc + 8027b64: 687b ldr r3, [r7, #4] + 8027b66: 681b ldr r3, [r3, #0] + 8027b68: 4a60 ldr r2, [pc, #384] ; (8027cec ) + 8027b6a: 4293 cmp r3, r2 + 8027b6c: d036 beq.n 8027bdc + 8027b6e: 687b ldr r3, [r7, #4] + 8027b70: 681b ldr r3, [r3, #0] + 8027b72: 4a5f ldr r2, [pc, #380] ; (8027cf0 ) + 8027b74: 4293 cmp r3, r2 + 8027b76: d031 beq.n 8027bdc + 8027b78: 687b ldr r3, [r7, #4] + 8027b7a: 681b ldr r3, [r3, #0] + 8027b7c: 4a5d ldr r2, [pc, #372] ; (8027cf4 ) + 8027b7e: 4293 cmp r3, r2 + 8027b80: d02c beq.n 8027bdc + 8027b82: 687b ldr r3, [r7, #4] + 8027b84: 681b ldr r3, [r3, #0] + 8027b86: 4a5c ldr r2, [pc, #368] ; (8027cf8 ) + 8027b88: 4293 cmp r3, r2 + 8027b8a: d027 beq.n 8027bdc + 8027b8c: 687b ldr r3, [r7, #4] + 8027b8e: 681b ldr r3, [r3, #0] + 8027b90: 4a5a ldr r2, [pc, #360] ; (8027cfc ) + 8027b92: 4293 cmp r3, r2 + 8027b94: d022 beq.n 8027bdc + 8027b96: 687b ldr r3, [r7, #4] + 8027b98: 681b ldr r3, [r3, #0] + 8027b9a: 4a59 ldr r2, [pc, #356] ; (8027d00 ) + 8027b9c: 4293 cmp r3, r2 + 8027b9e: d01d beq.n 8027bdc + 8027ba0: 687b ldr r3, [r7, #4] + 8027ba2: 681b ldr r3, [r3, #0] + 8027ba4: 4a57 ldr r2, [pc, #348] ; (8027d04 ) + 8027ba6: 4293 cmp r3, r2 + 8027ba8: d018 beq.n 8027bdc + 8027baa: 687b ldr r3, [r7, #4] + 8027bac: 681b ldr r3, [r3, #0] + 8027bae: 4a56 ldr r2, [pc, #344] ; (8027d08 ) + 8027bb0: 4293 cmp r3, r2 + 8027bb2: d013 beq.n 8027bdc + 8027bb4: 687b ldr r3, [r7, #4] + 8027bb6: 681b ldr r3, [r3, #0] + 8027bb8: 4a54 ldr r2, [pc, #336] ; (8027d0c ) + 8027bba: 4293 cmp r3, r2 + 8027bbc: d00e beq.n 8027bdc + 8027bbe: 687b ldr r3, [r7, #4] + 8027bc0: 681b ldr r3, [r3, #0] + 8027bc2: 4a53 ldr r2, [pc, #332] ; (8027d10 ) + 8027bc4: 4293 cmp r3, r2 + 8027bc6: d009 beq.n 8027bdc + 8027bc8: 687b ldr r3, [r7, #4] + 8027bca: 681b ldr r3, [r3, #0] + 8027bcc: 4a51 ldr r2, [pc, #324] ; (8027d14 ) + 8027bce: 4293 cmp r3, r2 + 8027bd0: d004 beq.n 8027bdc + 8027bd2: 687b ldr r3, [r7, #4] + 8027bd4: 681b ldr r3, [r3, #0] + 8027bd6: 4a50 ldr r2, [pc, #320] ; (8027d18 ) + 8027bd8: 4293 cmp r3, r2 + 8027bda: d101 bne.n 8027be0 + 8027bdc: 2301 movs r3, #1 + 8027bde: e000 b.n 8027be2 + 8027be0: 2300 movs r3, #0 + 8027be2: 2b00 cmp r3, #0 + 8027be4: f000 813b beq.w 8027e5e assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst)); assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst)); } /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; - 8027bb8: 687b ldr r3, [r7, #4] - 8027bba: 2202 movs r2, #2 - 8027bbc: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8027be8: 687b ldr r3, [r7, #4] + 8027bea: 2202 movs r2, #2 + 8027bec: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Allocate lock resource */ __HAL_UNLOCK(hdma); - 8027bc0: 687b ldr r3, [r7, #4] - 8027bc2: 2200 movs r2, #0 - 8027bc4: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8027bf0: 687b ldr r3, [r7, #4] + 8027bf2: 2200 movs r2, #0 + 8027bf4: f883 2034 strb.w r2, [r3, #52] ; 0x34 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); - 8027bc8: 687b ldr r3, [r7, #4] - 8027bca: 681b ldr r3, [r3, #0] - 8027bcc: 4a37 ldr r2, [pc, #220] ; (8027cac ) - 8027bce: 4293 cmp r3, r2 - 8027bd0: d04a beq.n 8027c68 - 8027bd2: 687b ldr r3, [r7, #4] - 8027bd4: 681b ldr r3, [r3, #0] - 8027bd6: 4a36 ldr r2, [pc, #216] ; (8027cb0 ) - 8027bd8: 4293 cmp r3, r2 - 8027bda: d045 beq.n 8027c68 - 8027bdc: 687b ldr r3, [r7, #4] - 8027bde: 681b ldr r3, [r3, #0] - 8027be0: 4a34 ldr r2, [pc, #208] ; (8027cb4 ) - 8027be2: 4293 cmp r3, r2 - 8027be4: d040 beq.n 8027c68 - 8027be6: 687b ldr r3, [r7, #4] - 8027be8: 681b ldr r3, [r3, #0] - 8027bea: 4a33 ldr r2, [pc, #204] ; (8027cb8 ) - 8027bec: 4293 cmp r3, r2 - 8027bee: d03b beq.n 8027c68 - 8027bf0: 687b ldr r3, [r7, #4] - 8027bf2: 681b ldr r3, [r3, #0] - 8027bf4: 4a31 ldr r2, [pc, #196] ; (8027cbc ) - 8027bf6: 4293 cmp r3, r2 - 8027bf8: d036 beq.n 8027c68 - 8027bfa: 687b ldr r3, [r7, #4] - 8027bfc: 681b ldr r3, [r3, #0] - 8027bfe: 4a30 ldr r2, [pc, #192] ; (8027cc0 ) - 8027c00: 4293 cmp r3, r2 - 8027c02: d031 beq.n 8027c68 - 8027c04: 687b ldr r3, [r7, #4] - 8027c06: 681b ldr r3, [r3, #0] - 8027c08: 4a2e ldr r2, [pc, #184] ; (8027cc4 ) - 8027c0a: 4293 cmp r3, r2 - 8027c0c: d02c beq.n 8027c68 - 8027c0e: 687b ldr r3, [r7, #4] - 8027c10: 681b ldr r3, [r3, #0] - 8027c12: 4a2d ldr r2, [pc, #180] ; (8027cc8 ) - 8027c14: 4293 cmp r3, r2 - 8027c16: d027 beq.n 8027c68 - 8027c18: 687b ldr r3, [r7, #4] - 8027c1a: 681b ldr r3, [r3, #0] - 8027c1c: 4a2b ldr r2, [pc, #172] ; (8027ccc ) - 8027c1e: 4293 cmp r3, r2 - 8027c20: d022 beq.n 8027c68 - 8027c22: 687b ldr r3, [r7, #4] - 8027c24: 681b ldr r3, [r3, #0] - 8027c26: 4a2a ldr r2, [pc, #168] ; (8027cd0 ) - 8027c28: 4293 cmp r3, r2 - 8027c2a: d01d beq.n 8027c68 - 8027c2c: 687b ldr r3, [r7, #4] - 8027c2e: 681b ldr r3, [r3, #0] - 8027c30: 4a28 ldr r2, [pc, #160] ; (8027cd4 ) - 8027c32: 4293 cmp r3, r2 - 8027c34: d018 beq.n 8027c68 - 8027c36: 687b ldr r3, [r7, #4] - 8027c38: 681b ldr r3, [r3, #0] - 8027c3a: 4a27 ldr r2, [pc, #156] ; (8027cd8 ) - 8027c3c: 4293 cmp r3, r2 - 8027c3e: d013 beq.n 8027c68 - 8027c40: 687b ldr r3, [r7, #4] - 8027c42: 681b ldr r3, [r3, #0] - 8027c44: 4a25 ldr r2, [pc, #148] ; (8027cdc ) - 8027c46: 4293 cmp r3, r2 - 8027c48: d00e beq.n 8027c68 - 8027c4a: 687b ldr r3, [r7, #4] - 8027c4c: 681b ldr r3, [r3, #0] - 8027c4e: 4a24 ldr r2, [pc, #144] ; (8027ce0 ) - 8027c50: 4293 cmp r3, r2 - 8027c52: d009 beq.n 8027c68 - 8027c54: 687b ldr r3, [r7, #4] - 8027c56: 681b ldr r3, [r3, #0] - 8027c58: 4a22 ldr r2, [pc, #136] ; (8027ce4 ) - 8027c5a: 4293 cmp r3, r2 - 8027c5c: d004 beq.n 8027c68 - 8027c5e: 687b ldr r3, [r7, #4] - 8027c60: 681b ldr r3, [r3, #0] - 8027c62: 4a21 ldr r2, [pc, #132] ; (8027ce8 ) - 8027c64: 4293 cmp r3, r2 - 8027c66: d108 bne.n 8027c7a - 8027c68: 687b ldr r3, [r7, #4] - 8027c6a: 681b ldr r3, [r3, #0] - 8027c6c: 681a ldr r2, [r3, #0] - 8027c6e: 687b ldr r3, [r7, #4] - 8027c70: 681b ldr r3, [r3, #0] - 8027c72: f022 0201 bic.w r2, r2, #1 - 8027c76: 601a str r2, [r3, #0] - 8027c78: e007 b.n 8027c8a + 8027bf8: 687b ldr r3, [r7, #4] + 8027bfa: 681b ldr r3, [r3, #0] + 8027bfc: 4a37 ldr r2, [pc, #220] ; (8027cdc ) + 8027bfe: 4293 cmp r3, r2 + 8027c00: d04a beq.n 8027c98 + 8027c02: 687b ldr r3, [r7, #4] + 8027c04: 681b ldr r3, [r3, #0] + 8027c06: 4a36 ldr r2, [pc, #216] ; (8027ce0 ) + 8027c08: 4293 cmp r3, r2 + 8027c0a: d045 beq.n 8027c98 + 8027c0c: 687b ldr r3, [r7, #4] + 8027c0e: 681b ldr r3, [r3, #0] + 8027c10: 4a34 ldr r2, [pc, #208] ; (8027ce4 ) + 8027c12: 4293 cmp r3, r2 + 8027c14: d040 beq.n 8027c98 + 8027c16: 687b ldr r3, [r7, #4] + 8027c18: 681b ldr r3, [r3, #0] + 8027c1a: 4a33 ldr r2, [pc, #204] ; (8027ce8 ) + 8027c1c: 4293 cmp r3, r2 + 8027c1e: d03b beq.n 8027c98 + 8027c20: 687b ldr r3, [r7, #4] + 8027c22: 681b ldr r3, [r3, #0] + 8027c24: 4a31 ldr r2, [pc, #196] ; (8027cec ) + 8027c26: 4293 cmp r3, r2 + 8027c28: d036 beq.n 8027c98 + 8027c2a: 687b ldr r3, [r7, #4] + 8027c2c: 681b ldr r3, [r3, #0] + 8027c2e: 4a30 ldr r2, [pc, #192] ; (8027cf0 ) + 8027c30: 4293 cmp r3, r2 + 8027c32: d031 beq.n 8027c98 + 8027c34: 687b ldr r3, [r7, #4] + 8027c36: 681b ldr r3, [r3, #0] + 8027c38: 4a2e ldr r2, [pc, #184] ; (8027cf4 ) + 8027c3a: 4293 cmp r3, r2 + 8027c3c: d02c beq.n 8027c98 + 8027c3e: 687b ldr r3, [r7, #4] + 8027c40: 681b ldr r3, [r3, #0] + 8027c42: 4a2d ldr r2, [pc, #180] ; (8027cf8 ) + 8027c44: 4293 cmp r3, r2 + 8027c46: d027 beq.n 8027c98 + 8027c48: 687b ldr r3, [r7, #4] + 8027c4a: 681b ldr r3, [r3, #0] + 8027c4c: 4a2b ldr r2, [pc, #172] ; (8027cfc ) + 8027c4e: 4293 cmp r3, r2 + 8027c50: d022 beq.n 8027c98 + 8027c52: 687b ldr r3, [r7, #4] + 8027c54: 681b ldr r3, [r3, #0] + 8027c56: 4a2a ldr r2, [pc, #168] ; (8027d00 ) + 8027c58: 4293 cmp r3, r2 + 8027c5a: d01d beq.n 8027c98 + 8027c5c: 687b ldr r3, [r7, #4] + 8027c5e: 681b ldr r3, [r3, #0] + 8027c60: 4a28 ldr r2, [pc, #160] ; (8027d04 ) + 8027c62: 4293 cmp r3, r2 + 8027c64: d018 beq.n 8027c98 + 8027c66: 687b ldr r3, [r7, #4] + 8027c68: 681b ldr r3, [r3, #0] + 8027c6a: 4a27 ldr r2, [pc, #156] ; (8027d08 ) + 8027c6c: 4293 cmp r3, r2 + 8027c6e: d013 beq.n 8027c98 + 8027c70: 687b ldr r3, [r7, #4] + 8027c72: 681b ldr r3, [r3, #0] + 8027c74: 4a25 ldr r2, [pc, #148] ; (8027d0c ) + 8027c76: 4293 cmp r3, r2 + 8027c78: d00e beq.n 8027c98 8027c7a: 687b ldr r3, [r7, #4] 8027c7c: 681b ldr r3, [r3, #0] - 8027c7e: 681a ldr r2, [r3, #0] - 8027c80: 687b ldr r3, [r7, #4] - 8027c82: 681b ldr r3, [r3, #0] - 8027c84: f022 0201 bic.w r2, r2, #1 - 8027c88: 601a str r2, [r3, #0] + 8027c7e: 4a24 ldr r2, [pc, #144] ; (8027d10 ) + 8027c80: 4293 cmp r3, r2 + 8027c82: d009 beq.n 8027c98 + 8027c84: 687b ldr r3, [r7, #4] + 8027c86: 681b ldr r3, [r3, #0] + 8027c88: 4a22 ldr r2, [pc, #136] ; (8027d14 ) + 8027c8a: 4293 cmp r3, r2 + 8027c8c: d004 beq.n 8027c98 + 8027c8e: 687b ldr r3, [r7, #4] + 8027c90: 681b ldr r3, [r3, #0] + 8027c92: 4a21 ldr r2, [pc, #132] ; (8027d18 ) + 8027c94: 4293 cmp r3, r2 + 8027c96: d108 bne.n 8027caa + 8027c98: 687b ldr r3, [r7, #4] + 8027c9a: 681b ldr r3, [r3, #0] + 8027c9c: 681a ldr r2, [r3, #0] + 8027c9e: 687b ldr r3, [r7, #4] + 8027ca0: 681b ldr r3, [r3, #0] + 8027ca2: f022 0201 bic.w r2, r2, #1 + 8027ca6: 601a str r2, [r3, #0] + 8027ca8: e007 b.n 8027cba + 8027caa: 687b ldr r3, [r7, #4] + 8027cac: 681b ldr r3, [r3, #0] + 8027cae: 681a ldr r2, [r3, #0] + 8027cb0: 687b ldr r3, [r7, #4] + 8027cb2: 681b ldr r3, [r3, #0] + 8027cb4: f022 0201 bic.w r2, r2, #1 + 8027cb8: 601a str r2, [r3, #0] /* Check if the DMA Stream is effectively disabled */ while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U) - 8027c8a: e02f b.n 8027cec + 8027cba: e02f b.n 8027d1c { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) - 8027c8c: f7fe f982 bl 8025f94 - 8027c90: 4602 mov r2, r0 - 8027c92: 693b ldr r3, [r7, #16] - 8027c94: 1ad3 subs r3, r2, r3 - 8027c96: 2b05 cmp r3, #5 - 8027c98: d928 bls.n 8027cec + 8027cbc: f7fe f982 bl 8025fc4 + 8027cc0: 4602 mov r2, r0 + 8027cc2: 693b ldr r3, [r7, #16] + 8027cc4: 1ad3 subs r3, r2, r3 + 8027cc6: 2b05 cmp r3, #5 + 8027cc8: d928 bls.n 8027d1c { /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; - 8027c9a: 687b ldr r3, [r7, #4] - 8027c9c: 2220 movs r2, #32 - 8027c9e: 655a str r2, [r3, #84] ; 0x54 + 8027cca: 687b ldr r3, [r7, #4] + 8027ccc: 2220 movs r2, #32 + 8027cce: 655a str r2, [r3, #84] ; 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_ERROR; - 8027ca0: 687b ldr r3, [r7, #4] - 8027ca2: 2203 movs r2, #3 - 8027ca4: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8027cd0: 687b ldr r3, [r7, #4] + 8027cd2: 2203 movs r2, #3 + 8027cd4: f883 2035 strb.w r2, [r3, #53] ; 0x35 return HAL_ERROR; - 8027ca8: 2301 movs r3, #1 - 8027caa: e246 b.n 802813a - 8027cac: 40020010 .word 0x40020010 - 8027cb0: 40020028 .word 0x40020028 - 8027cb4: 40020040 .word 0x40020040 - 8027cb8: 40020058 .word 0x40020058 - 8027cbc: 40020070 .word 0x40020070 - 8027cc0: 40020088 .word 0x40020088 - 8027cc4: 400200a0 .word 0x400200a0 - 8027cc8: 400200b8 .word 0x400200b8 - 8027ccc: 40020410 .word 0x40020410 - 8027cd0: 40020428 .word 0x40020428 - 8027cd4: 40020440 .word 0x40020440 - 8027cd8: 40020458 .word 0x40020458 - 8027cdc: 40020470 .word 0x40020470 - 8027ce0: 40020488 .word 0x40020488 - 8027ce4: 400204a0 .word 0x400204a0 - 8027ce8: 400204b8 .word 0x400204b8 + 8027cd8: 2301 movs r3, #1 + 8027cda: e246 b.n 802816a + 8027cdc: 40020010 .word 0x40020010 + 8027ce0: 40020028 .word 0x40020028 + 8027ce4: 40020040 .word 0x40020040 + 8027ce8: 40020058 .word 0x40020058 + 8027cec: 40020070 .word 0x40020070 + 8027cf0: 40020088 .word 0x40020088 + 8027cf4: 400200a0 .word 0x400200a0 + 8027cf8: 400200b8 .word 0x400200b8 + 8027cfc: 40020410 .word 0x40020410 + 8027d00: 40020428 .word 0x40020428 + 8027d04: 40020440 .word 0x40020440 + 8027d08: 40020458 .word 0x40020458 + 8027d0c: 40020470 .word 0x40020470 + 8027d10: 40020488 .word 0x40020488 + 8027d14: 400204a0 .word 0x400204a0 + 8027d18: 400204b8 .word 0x400204b8 while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U) - 8027cec: 687b ldr r3, [r7, #4] - 8027cee: 681b ldr r3, [r3, #0] - 8027cf0: 681b ldr r3, [r3, #0] - 8027cf2: f003 0301 and.w r3, r3, #1 - 8027cf6: 2b00 cmp r3, #0 - 8027cf8: d1c8 bne.n 8027c8c + 8027d1c: 687b ldr r3, [r7, #4] + 8027d1e: 681b ldr r3, [r3, #0] + 8027d20: 681b ldr r3, [r3, #0] + 8027d22: f003 0301 and.w r3, r3, #1 + 8027d26: 2b00 cmp r3, #0 + 8027d28: d1c8 bne.n 8027cbc } } /* Get the CR register value */ registerValue = ((DMA_Stream_TypeDef *)hdma->Instance)->CR; - 8027cfa: 687b ldr r3, [r7, #4] - 8027cfc: 681b ldr r3, [r3, #0] - 8027cfe: 681b ldr r3, [r3, #0] - 8027d00: 617b str r3, [r7, #20] + 8027d2a: 687b ldr r3, [r7, #4] + 8027d2c: 681b ldr r3, [r3, #0] + 8027d2e: 681b ldr r3, [r3, #0] + 8027d30: 617b str r3, [r7, #20] /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */ registerValue &= ((uint32_t)~(DMA_SxCR_MBURST | DMA_SxCR_PBURST | \ - 8027d02: 697a ldr r2, [r7, #20] - 8027d04: 4b83 ldr r3, [pc, #524] ; (8027f14 ) - 8027d06: 4013 ands r3, r2 - 8027d08: 617b str r3, [r7, #20] + 8027d32: 697a ldr r2, [r7, #20] + 8027d34: 4b83 ldr r3, [pc, #524] ; (8027f44 ) + 8027d36: 4013 ands r3, r2 + 8027d38: 617b str r3, [r7, #20] DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \ DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \ DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM)); /* Prepare the DMA Stream configuration */ registerValue |= hdma->Init.Direction | - 8027d0a: 687b ldr r3, [r7, #4] - 8027d0c: 689a ldr r2, [r3, #8] + 8027d3a: 687b ldr r3, [r7, #4] + 8027d3c: 689a ldr r2, [r3, #8] hdma->Init.PeriphInc | hdma->Init.MemInc | - 8027d0e: 687b ldr r3, [r7, #4] - 8027d10: 68db ldr r3, [r3, #12] + 8027d3e: 687b ldr r3, [r7, #4] + 8027d40: 68db ldr r3, [r3, #12] registerValue |= hdma->Init.Direction | - 8027d12: 431a orrs r2, r3 + 8027d42: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | - 8027d14: 687b ldr r3, [r7, #4] - 8027d16: 691b ldr r3, [r3, #16] - 8027d18: 431a orrs r2, r3 + 8027d44: 687b ldr r3, [r7, #4] + 8027d46: 691b ldr r3, [r3, #16] + 8027d48: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8027d1a: 687b ldr r3, [r7, #4] - 8027d1c: 695b ldr r3, [r3, #20] + 8027d4a: 687b ldr r3, [r7, #4] + 8027d4c: 695b ldr r3, [r3, #20] hdma->Init.PeriphInc | hdma->Init.MemInc | - 8027d1e: 431a orrs r2, r3 + 8027d4e: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8027d20: 687b ldr r3, [r7, #4] - 8027d22: 699b ldr r3, [r3, #24] - 8027d24: 431a orrs r2, r3 + 8027d50: 687b ldr r3, [r7, #4] + 8027d52: 699b ldr r3, [r3, #24] + 8027d54: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; - 8027d26: 687b ldr r3, [r7, #4] - 8027d28: 69db ldr r3, [r3, #28] + 8027d56: 687b ldr r3, [r7, #4] + 8027d58: 69db ldr r3, [r3, #28] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8027d2a: 431a orrs r2, r3 + 8027d5a: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; - 8027d2c: 687b ldr r3, [r7, #4] - 8027d2e: 6a1b ldr r3, [r3, #32] - 8027d30: 4313 orrs r3, r2 + 8027d5c: 687b ldr r3, [r7, #4] + 8027d5e: 6a1b ldr r3, [r3, #32] + 8027d60: 4313 orrs r3, r2 registerValue |= hdma->Init.Direction | - 8027d32: 697a ldr r2, [r7, #20] - 8027d34: 4313 orrs r3, r2 - 8027d36: 617b str r3, [r7, #20] + 8027d62: 697a ldr r2, [r7, #20] + 8027d64: 4313 orrs r3, r2 + 8027d66: 617b str r3, [r7, #20] /* the Memory burst and peripheral burst are not used when the FIFO is disabled */ if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) - 8027d38: 687b ldr r3, [r7, #4] - 8027d3a: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027d3c: 2b04 cmp r3, #4 - 8027d3e: d107 bne.n 8027d50 + 8027d68: 687b ldr r3, [r7, #4] + 8027d6a: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027d6c: 2b04 cmp r3, #4 + 8027d6e: d107 bne.n 8027d80 { /* Get memory burst and peripheral burst */ registerValue |= hdma->Init.MemBurst | hdma->Init.PeriphBurst; - 8027d40: 687b ldr r3, [r7, #4] - 8027d42: 6ada ldr r2, [r3, #44] ; 0x2c - 8027d44: 687b ldr r3, [r7, #4] - 8027d46: 6b1b ldr r3, [r3, #48] ; 0x30 - 8027d48: 4313 orrs r3, r2 - 8027d4a: 697a ldr r2, [r7, #20] - 8027d4c: 4313 orrs r3, r2 - 8027d4e: 617b str r3, [r7, #20] + 8027d70: 687b ldr r3, [r7, #4] + 8027d72: 6ada ldr r2, [r3, #44] ; 0x2c + 8027d74: 687b ldr r3, [r7, #4] + 8027d76: 6b1b ldr r3, [r3, #48] ; 0x30 + 8027d78: 4313 orrs r3, r2 + 8027d7a: 697a ldr r2, [r7, #20] + 8027d7c: 4313 orrs r3, r2 + 8027d7e: 617b str r3, [r7, #20] } /* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be lock when transferring data to/from USART/UART */ #if (STM32H7_DEV_ID == 0x450UL) if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U) - 8027d50: 4b71 ldr r3, [pc, #452] ; (8027f18 ) - 8027d52: 681a ldr r2, [r3, #0] - 8027d54: 4b71 ldr r3, [pc, #452] ; (8027f1c ) - 8027d56: 4013 ands r3, r2 - 8027d58: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8027d5c: d328 bcc.n 8027db0 + 8027d80: 4b71 ldr r3, [pc, #452] ; (8027f48 ) + 8027d82: 681a ldr r2, [r3, #0] + 8027d84: 4b71 ldr r3, [pc, #452] ; (8027f4c ) + 8027d86: 4013 ands r3, r2 + 8027d88: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8027d8c: d328 bcc.n 8027de0 { #endif /* STM32H7_DEV_ID == 0x450UL */ if(IS_DMA_UART_USART_REQUEST(hdma->Init.Request) != 0U) - 8027d5e: 687b ldr r3, [r7, #4] - 8027d60: 685b ldr r3, [r3, #4] - 8027d62: 2b28 cmp r3, #40 ; 0x28 - 8027d64: d903 bls.n 8027d6e - 8027d66: 687b ldr r3, [r7, #4] - 8027d68: 685b ldr r3, [r3, #4] - 8027d6a: 2b2e cmp r3, #46 ; 0x2e - 8027d6c: d917 bls.n 8027d9e - 8027d6e: 687b ldr r3, [r7, #4] - 8027d70: 685b ldr r3, [r3, #4] - 8027d72: 2b3e cmp r3, #62 ; 0x3e - 8027d74: d903 bls.n 8027d7e - 8027d76: 687b ldr r3, [r7, #4] - 8027d78: 685b ldr r3, [r3, #4] - 8027d7a: 2b42 cmp r3, #66 ; 0x42 - 8027d7c: d90f bls.n 8027d9e - 8027d7e: 687b ldr r3, [r7, #4] - 8027d80: 685b ldr r3, [r3, #4] - 8027d82: 2b46 cmp r3, #70 ; 0x46 - 8027d84: d903 bls.n 8027d8e - 8027d86: 687b ldr r3, [r7, #4] - 8027d88: 685b ldr r3, [r3, #4] - 8027d8a: 2b48 cmp r3, #72 ; 0x48 - 8027d8c: d907 bls.n 8027d9e 8027d8e: 687b ldr r3, [r7, #4] 8027d90: 685b ldr r3, [r3, #4] - 8027d92: 2b4e cmp r3, #78 ; 0x4e - 8027d94: d905 bls.n 8027da2 + 8027d92: 2b28 cmp r3, #40 ; 0x28 + 8027d94: d903 bls.n 8027d9e 8027d96: 687b ldr r3, [r7, #4] 8027d98: 685b ldr r3, [r3, #4] - 8027d9a: 2b52 cmp r3, #82 ; 0x52 - 8027d9c: d801 bhi.n 8027da2 - 8027d9e: 2301 movs r3, #1 - 8027da0: e000 b.n 8027da4 - 8027da2: 2300 movs r3, #0 - 8027da4: 2b00 cmp r3, #0 - 8027da6: d003 beq.n 8027db0 + 8027d9a: 2b2e cmp r3, #46 ; 0x2e + 8027d9c: d917 bls.n 8027dce + 8027d9e: 687b ldr r3, [r7, #4] + 8027da0: 685b ldr r3, [r3, #4] + 8027da2: 2b3e cmp r3, #62 ; 0x3e + 8027da4: d903 bls.n 8027dae + 8027da6: 687b ldr r3, [r7, #4] + 8027da8: 685b ldr r3, [r3, #4] + 8027daa: 2b42 cmp r3, #66 ; 0x42 + 8027dac: d90f bls.n 8027dce + 8027dae: 687b ldr r3, [r7, #4] + 8027db0: 685b ldr r3, [r3, #4] + 8027db2: 2b46 cmp r3, #70 ; 0x46 + 8027db4: d903 bls.n 8027dbe + 8027db6: 687b ldr r3, [r7, #4] + 8027db8: 685b ldr r3, [r3, #4] + 8027dba: 2b48 cmp r3, #72 ; 0x48 + 8027dbc: d907 bls.n 8027dce + 8027dbe: 687b ldr r3, [r7, #4] + 8027dc0: 685b ldr r3, [r3, #4] + 8027dc2: 2b4e cmp r3, #78 ; 0x4e + 8027dc4: d905 bls.n 8027dd2 + 8027dc6: 687b ldr r3, [r7, #4] + 8027dc8: 685b ldr r3, [r3, #4] + 8027dca: 2b52 cmp r3, #82 ; 0x52 + 8027dcc: d801 bhi.n 8027dd2 + 8027dce: 2301 movs r3, #1 + 8027dd0: e000 b.n 8027dd4 + 8027dd2: 2300 movs r3, #0 + 8027dd4: 2b00 cmp r3, #0 + 8027dd6: d003 beq.n 8027de0 { registerValue |= DMA_SxCR_TRBUFF; - 8027da8: 697b ldr r3, [r7, #20] - 8027daa: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 - 8027dae: 617b str r3, [r7, #20] + 8027dd8: 697b ldr r3, [r7, #20] + 8027dda: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 + 8027dde: 617b str r3, [r7, #20] #if (STM32H7_DEV_ID == 0x450UL) } #endif /* STM32H7_DEV_ID == 0x450UL */ /* Write to DMA Stream CR register */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR = registerValue; - 8027db0: 687b ldr r3, [r7, #4] - 8027db2: 681b ldr r3, [r3, #0] - 8027db4: 697a ldr r2, [r7, #20] - 8027db6: 601a str r2, [r3, #0] + 8027de0: 687b ldr r3, [r7, #4] + 8027de2: 681b ldr r3, [r3, #0] + 8027de4: 697a ldr r2, [r7, #20] + 8027de6: 601a str r2, [r3, #0] /* Get the FCR register value */ registerValue = ((DMA_Stream_TypeDef *)hdma->Instance)->FCR; - 8027db8: 687b ldr r3, [r7, #4] - 8027dba: 681b ldr r3, [r3, #0] - 8027dbc: 695b ldr r3, [r3, #20] - 8027dbe: 617b str r3, [r7, #20] + 8027de8: 687b ldr r3, [r7, #4] + 8027dea: 681b ldr r3, [r3, #0] + 8027dec: 695b ldr r3, [r3, #20] + 8027dee: 617b str r3, [r7, #20] /* Clear Direct mode and FIFO threshold bits */ registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); - 8027dc0: 697b ldr r3, [r7, #20] - 8027dc2: f023 0307 bic.w r3, r3, #7 - 8027dc6: 617b str r3, [r7, #20] + 8027df0: 697b ldr r3, [r7, #20] + 8027df2: f023 0307 bic.w r3, r3, #7 + 8027df6: 617b str r3, [r7, #20] /* Prepare the DMA Stream FIFO configuration */ registerValue |= hdma->Init.FIFOMode; - 8027dc8: 687b ldr r3, [r7, #4] - 8027dca: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027dcc: 697a ldr r2, [r7, #20] - 8027dce: 4313 orrs r3, r2 - 8027dd0: 617b str r3, [r7, #20] + 8027df8: 687b ldr r3, [r7, #4] + 8027dfa: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027dfc: 697a ldr r2, [r7, #20] + 8027dfe: 4313 orrs r3, r2 + 8027e00: 617b str r3, [r7, #20] /* the FIFO threshold is not used when the FIFO mode is disabled */ if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) - 8027dd2: 687b ldr r3, [r7, #4] - 8027dd4: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027dd6: 2b04 cmp r3, #4 - 8027dd8: d117 bne.n 8027e0a + 8027e02: 687b ldr r3, [r7, #4] + 8027e04: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027e06: 2b04 cmp r3, #4 + 8027e08: d117 bne.n 8027e3a { /* Get the FIFO threshold */ registerValue |= hdma->Init.FIFOThreshold; - 8027dda: 687b ldr r3, [r7, #4] - 8027ddc: 6a9b ldr r3, [r3, #40] ; 0x28 - 8027dde: 697a ldr r2, [r7, #20] - 8027de0: 4313 orrs r3, r2 - 8027de2: 617b str r3, [r7, #20] + 8027e0a: 687b ldr r3, [r7, #4] + 8027e0c: 6a9b ldr r3, [r3, #40] ; 0x28 + 8027e0e: 697a ldr r2, [r7, #20] + 8027e10: 4313 orrs r3, r2 + 8027e12: 617b str r3, [r7, #20] /* Check compatibility between FIFO threshold level and size of the memory burst */ /* for INCR4, INCR8, INCR16 */ if(hdma->Init.MemBurst != DMA_MBURST_SINGLE) - 8027de4: 687b ldr r3, [r7, #4] - 8027de6: 6adb ldr r3, [r3, #44] ; 0x2c - 8027de8: 2b00 cmp r3, #0 - 8027dea: d00e beq.n 8027e0a + 8027e14: 687b ldr r3, [r7, #4] + 8027e16: 6adb ldr r3, [r3, #44] ; 0x2c + 8027e18: 2b00 cmp r3, #0 + 8027e1a: d00e beq.n 8027e3a { if (DMA_CheckFifoParam(hdma) != HAL_OK) - 8027dec: 6878 ldr r0, [r7, #4] - 8027dee: f002 fb41 bl 802a474 - 8027df2: 4603 mov r3, r0 - 8027df4: 2b00 cmp r3, #0 - 8027df6: d008 beq.n 8027e0a + 8027e1c: 6878 ldr r0, [r7, #4] + 8027e1e: f002 fb41 bl 802a4a4 + 8027e22: 4603 mov r3, r0 + 8027e24: 2b00 cmp r3, #0 + 8027e26: d008 beq.n 8027e3a { /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_PARAM; - 8027df8: 687b ldr r3, [r7, #4] - 8027dfa: 2240 movs r2, #64 ; 0x40 - 8027dfc: 655a str r2, [r3, #84] ; 0x54 + 8027e28: 687b ldr r3, [r7, #4] + 8027e2a: 2240 movs r2, #64 ; 0x40 + 8027e2c: 655a str r2, [r3, #84] ; 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8027dfe: 687b ldr r3, [r7, #4] - 8027e00: 2201 movs r2, #1 - 8027e02: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8027e2e: 687b ldr r3, [r7, #4] + 8027e30: 2201 movs r2, #1 + 8027e32: f883 2035 strb.w r2, [r3, #53] ; 0x35 return HAL_ERROR; - 8027e06: 2301 movs r3, #1 - 8027e08: e197 b.n 802813a + 8027e36: 2301 movs r3, #1 + 8027e38: e197 b.n 802816a } } } /* Write to DMA Stream FCR */ ((DMA_Stream_TypeDef *)hdma->Instance)->FCR = registerValue; - 8027e0a: 687b ldr r3, [r7, #4] - 8027e0c: 681b ldr r3, [r3, #0] - 8027e0e: 697a ldr r2, [r7, #20] - 8027e10: 615a str r2, [r3, #20] + 8027e3a: 687b ldr r3, [r7, #4] + 8027e3c: 681b ldr r3, [r3, #0] + 8027e3e: 697a ldr r2, [r7, #20] + 8027e40: 615a str r2, [r3, #20] /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ regs_dma = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma); - 8027e12: 6878 ldr r0, [r7, #4] - 8027e14: f002 fa7c bl 802a310 - 8027e18: 4603 mov r3, r0 - 8027e1a: 60bb str r3, [r7, #8] + 8027e42: 6878 ldr r0, [r7, #4] + 8027e44: f002 fa7c bl 802a340 + 8027e48: 4603 mov r3, r0 + 8027e4a: 60bb str r3, [r7, #8] /* Clear all interrupt flags */ regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); - 8027e1c: 687b ldr r3, [r7, #4] - 8027e1e: 6ddb ldr r3, [r3, #92] ; 0x5c - 8027e20: f003 031f and.w r3, r3, #31 - 8027e24: 223f movs r2, #63 ; 0x3f - 8027e26: 409a lsls r2, r3 - 8027e28: 68bb ldr r3, [r7, #8] - 8027e2a: 609a str r2, [r3, #8] - 8027e2c: e0cd b.n 8027fca + 8027e4c: 687b ldr r3, [r7, #4] + 8027e4e: 6ddb ldr r3, [r3, #92] ; 0x5c + 8027e50: f003 031f and.w r3, r3, #31 + 8027e54: 223f movs r2, #63 ; 0x3f + 8027e56: 409a lsls r2, r3 + 8027e58: 68bb ldr r3, [r7, #8] + 8027e5a: 609a str r2, [r3, #8] + 8027e5c: e0cd b.n 8027ffa } else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */ - 8027e2e: 687b ldr r3, [r7, #4] - 8027e30: 681b ldr r3, [r3, #0] - 8027e32: 4a3b ldr r2, [pc, #236] ; (8027f20 ) - 8027e34: 4293 cmp r3, r2 - 8027e36: d022 beq.n 8027e7e - 8027e38: 687b ldr r3, [r7, #4] - 8027e3a: 681b ldr r3, [r3, #0] - 8027e3c: 4a39 ldr r2, [pc, #228] ; (8027f24 ) - 8027e3e: 4293 cmp r3, r2 - 8027e40: d01d beq.n 8027e7e - 8027e42: 687b ldr r3, [r7, #4] - 8027e44: 681b ldr r3, [r3, #0] - 8027e46: 4a38 ldr r2, [pc, #224] ; (8027f28 ) - 8027e48: 4293 cmp r3, r2 - 8027e4a: d018 beq.n 8027e7e - 8027e4c: 687b ldr r3, [r7, #4] - 8027e4e: 681b ldr r3, [r3, #0] - 8027e50: 4a36 ldr r2, [pc, #216] ; (8027f2c ) - 8027e52: 4293 cmp r3, r2 - 8027e54: d013 beq.n 8027e7e - 8027e56: 687b ldr r3, [r7, #4] - 8027e58: 681b ldr r3, [r3, #0] - 8027e5a: 4a35 ldr r2, [pc, #212] ; (8027f30 ) - 8027e5c: 4293 cmp r3, r2 - 8027e5e: d00e beq.n 8027e7e - 8027e60: 687b ldr r3, [r7, #4] - 8027e62: 681b ldr r3, [r3, #0] - 8027e64: 4a33 ldr r2, [pc, #204] ; (8027f34 ) - 8027e66: 4293 cmp r3, r2 - 8027e68: d009 beq.n 8027e7e - 8027e6a: 687b ldr r3, [r7, #4] - 8027e6c: 681b ldr r3, [r3, #0] - 8027e6e: 4a32 ldr r2, [pc, #200] ; (8027f38 ) - 8027e70: 4293 cmp r3, r2 - 8027e72: d004 beq.n 8027e7e - 8027e74: 687b ldr r3, [r7, #4] - 8027e76: 681b ldr r3, [r3, #0] - 8027e78: 4a30 ldr r2, [pc, #192] ; (8027f3c ) - 8027e7a: 4293 cmp r3, r2 - 8027e7c: d101 bne.n 8027e82 - 8027e7e: 2301 movs r3, #1 - 8027e80: e000 b.n 8027e84 - 8027e82: 2300 movs r3, #0 - 8027e84: 2b00 cmp r3, #0 - 8027e86: f000 8097 beq.w 8027fb8 + 8027e5e: 687b ldr r3, [r7, #4] + 8027e60: 681b ldr r3, [r3, #0] + 8027e62: 4a3b ldr r2, [pc, #236] ; (8027f50 ) + 8027e64: 4293 cmp r3, r2 + 8027e66: d022 beq.n 8027eae + 8027e68: 687b ldr r3, [r7, #4] + 8027e6a: 681b ldr r3, [r3, #0] + 8027e6c: 4a39 ldr r2, [pc, #228] ; (8027f54 ) + 8027e6e: 4293 cmp r3, r2 + 8027e70: d01d beq.n 8027eae + 8027e72: 687b ldr r3, [r7, #4] + 8027e74: 681b ldr r3, [r3, #0] + 8027e76: 4a38 ldr r2, [pc, #224] ; (8027f58 ) + 8027e78: 4293 cmp r3, r2 + 8027e7a: d018 beq.n 8027eae + 8027e7c: 687b ldr r3, [r7, #4] + 8027e7e: 681b ldr r3, [r3, #0] + 8027e80: 4a36 ldr r2, [pc, #216] ; (8027f5c ) + 8027e82: 4293 cmp r3, r2 + 8027e84: d013 beq.n 8027eae + 8027e86: 687b ldr r3, [r7, #4] + 8027e88: 681b ldr r3, [r3, #0] + 8027e8a: 4a35 ldr r2, [pc, #212] ; (8027f60 ) + 8027e8c: 4293 cmp r3, r2 + 8027e8e: d00e beq.n 8027eae + 8027e90: 687b ldr r3, [r7, #4] + 8027e92: 681b ldr r3, [r3, #0] + 8027e94: 4a33 ldr r2, [pc, #204] ; (8027f64 ) + 8027e96: 4293 cmp r3, r2 + 8027e98: d009 beq.n 8027eae + 8027e9a: 687b ldr r3, [r7, #4] + 8027e9c: 681b ldr r3, [r3, #0] + 8027e9e: 4a32 ldr r2, [pc, #200] ; (8027f68 ) + 8027ea0: 4293 cmp r3, r2 + 8027ea2: d004 beq.n 8027eae + 8027ea4: 687b ldr r3, [r7, #4] + 8027ea6: 681b ldr r3, [r3, #0] + 8027ea8: 4a30 ldr r2, [pc, #192] ; (8027f6c ) + 8027eaa: 4293 cmp r3, r2 + 8027eac: d101 bne.n 8027eb2 + 8027eae: 2301 movs r3, #1 + 8027eb0: e000 b.n 8027eb4 + 8027eb2: 2300 movs r3, #0 + 8027eb4: 2b00 cmp r3, #0 + 8027eb6: f000 8097 beq.w 8027fe8 { if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U) - 8027e8a: 687b ldr r3, [r7, #4] - 8027e8c: 681b ldr r3, [r3, #0] - 8027e8e: 4a24 ldr r2, [pc, #144] ; (8027f20 ) - 8027e90: 4293 cmp r3, r2 - 8027e92: d021 beq.n 8027ed8 - 8027e94: 687b ldr r3, [r7, #4] - 8027e96: 681b ldr r3, [r3, #0] - 8027e98: 4a22 ldr r2, [pc, #136] ; (8027f24 ) - 8027e9a: 4293 cmp r3, r2 - 8027e9c: d01c beq.n 8027ed8 - 8027e9e: 687b ldr r3, [r7, #4] - 8027ea0: 681b ldr r3, [r3, #0] - 8027ea2: 4a21 ldr r2, [pc, #132] ; (8027f28 ) - 8027ea4: 4293 cmp r3, r2 - 8027ea6: d017 beq.n 8027ed8 - 8027ea8: 687b ldr r3, [r7, #4] - 8027eaa: 681b ldr r3, [r3, #0] - 8027eac: 4a1f ldr r2, [pc, #124] ; (8027f2c ) - 8027eae: 4293 cmp r3, r2 - 8027eb0: d012 beq.n 8027ed8 - 8027eb2: 687b ldr r3, [r7, #4] - 8027eb4: 681b ldr r3, [r3, #0] - 8027eb6: 4a1e ldr r2, [pc, #120] ; (8027f30 ) - 8027eb8: 4293 cmp r3, r2 - 8027eba: d00d beq.n 8027ed8 - 8027ebc: 687b ldr r3, [r7, #4] - 8027ebe: 681b ldr r3, [r3, #0] - 8027ec0: 4a1c ldr r2, [pc, #112] ; (8027f34 ) - 8027ec2: 4293 cmp r3, r2 - 8027ec4: d008 beq.n 8027ed8 - 8027ec6: 687b ldr r3, [r7, #4] - 8027ec8: 681b ldr r3, [r3, #0] - 8027eca: 4a1b ldr r2, [pc, #108] ; (8027f38 ) - 8027ecc: 4293 cmp r3, r2 - 8027ece: d003 beq.n 8027ed8 - 8027ed0: 687b ldr r3, [r7, #4] - 8027ed2: 681b ldr r3, [r3, #0] - 8027ed4: 4a19 ldr r2, [pc, #100] ; (8027f3c ) - 8027ed6: 4293 cmp r3, r2 - 8027ed8: bf00 nop + 8027eba: 687b ldr r3, [r7, #4] + 8027ebc: 681b ldr r3, [r3, #0] + 8027ebe: 4a24 ldr r2, [pc, #144] ; (8027f50 ) + 8027ec0: 4293 cmp r3, r2 + 8027ec2: d021 beq.n 8027f08 + 8027ec4: 687b ldr r3, [r7, #4] + 8027ec6: 681b ldr r3, [r3, #0] + 8027ec8: 4a22 ldr r2, [pc, #136] ; (8027f54 ) + 8027eca: 4293 cmp r3, r2 + 8027ecc: d01c beq.n 8027f08 + 8027ece: 687b ldr r3, [r7, #4] + 8027ed0: 681b ldr r3, [r3, #0] + 8027ed2: 4a21 ldr r2, [pc, #132] ; (8027f58 ) + 8027ed4: 4293 cmp r3, r2 + 8027ed6: d017 beq.n 8027f08 + 8027ed8: 687b ldr r3, [r7, #4] + 8027eda: 681b ldr r3, [r3, #0] + 8027edc: 4a1f ldr r2, [pc, #124] ; (8027f5c ) + 8027ede: 4293 cmp r3, r2 + 8027ee0: d012 beq.n 8027f08 + 8027ee2: 687b ldr r3, [r7, #4] + 8027ee4: 681b ldr r3, [r3, #0] + 8027ee6: 4a1e ldr r2, [pc, #120] ; (8027f60 ) + 8027ee8: 4293 cmp r3, r2 + 8027eea: d00d beq.n 8027f08 + 8027eec: 687b ldr r3, [r7, #4] + 8027eee: 681b ldr r3, [r3, #0] + 8027ef0: 4a1c ldr r2, [pc, #112] ; (8027f64 ) + 8027ef2: 4293 cmp r3, r2 + 8027ef4: d008 beq.n 8027f08 + 8027ef6: 687b ldr r3, [r7, #4] + 8027ef8: 681b ldr r3, [r3, #0] + 8027efa: 4a1b ldr r2, [pc, #108] ; (8027f68 ) + 8027efc: 4293 cmp r3, r2 + 8027efe: d003 beq.n 8027f08 + 8027f00: 687b ldr r3, [r7, #4] + 8027f02: 681b ldr r3, [r3, #0] + 8027f04: 4a19 ldr r2, [pc, #100] ; (8027f6c ) + 8027f06: 4293 cmp r3, r2 + 8027f08: bf00 nop /* Check the request parameter */ assert_param(IS_BDMA_REQUEST(hdma->Init.Request)); } /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; - 8027eda: 687b ldr r3, [r7, #4] - 8027edc: 2202 movs r2, #2 - 8027ede: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8027f0a: 687b ldr r3, [r7, #4] + 8027f0c: 2202 movs r2, #2 + 8027f0e: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Allocate lock resource */ __HAL_UNLOCK(hdma); - 8027ee2: 687b ldr r3, [r7, #4] - 8027ee4: 2200 movs r2, #0 - 8027ee6: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8027f12: 687b ldr r3, [r7, #4] + 8027f14: 2200 movs r2, #0 + 8027f16: f883 2034 strb.w r2, [r3, #52] ; 0x34 /* Get the CR register value */ registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR; - 8027eea: 687b ldr r3, [r7, #4] - 8027eec: 681b ldr r3, [r3, #0] - 8027eee: 681b ldr r3, [r3, #0] - 8027ef0: 617b str r3, [r7, #20] + 8027f1a: 687b ldr r3, [r7, #4] + 8027f1c: 681b ldr r3, [r3, #0] + 8027f1e: 681b ldr r3, [r3, #0] + 8027f20: 617b str r3, [r7, #20] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, MEM2MEM, DBM and CT bits */ registerValue &= ((uint32_t)~(BDMA_CCR_PL | BDMA_CCR_MSIZE | BDMA_CCR_PSIZE | \ - 8027ef2: 697a ldr r2, [r7, #20] - 8027ef4: 4b12 ldr r3, [pc, #72] ; (8027f40 ) - 8027ef6: 4013 ands r3, r2 - 8027ef8: 617b str r3, [r7, #20] + 8027f22: 697a ldr r2, [r7, #20] + 8027f24: 4b12 ldr r3, [pc, #72] ; (8027f70 ) + 8027f26: 4013 ands r3, r2 + 8027f28: 617b str r3, [r7, #20] BDMA_CCR_MINC | BDMA_CCR_PINC | BDMA_CCR_CIRC | \ BDMA_CCR_DIR | BDMA_CCR_MEM2MEM | BDMA_CCR_DBM | \ BDMA_CCR_CT)); /* Prepare the DMA Channel configuration */ registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) | - 8027efa: 687b ldr r3, [r7, #4] - 8027efc: 689b ldr r3, [r3, #8] - 8027efe: 2b40 cmp r3, #64 ; 0x40 - 8027f00: d020 beq.n 8027f44 - 8027f02: 687b ldr r3, [r7, #4] - 8027f04: 689b ldr r3, [r3, #8] - 8027f06: 2b80 cmp r3, #128 ; 0x80 - 8027f08: d102 bne.n 8027f10 - 8027f0a: f44f 4380 mov.w r3, #16384 ; 0x4000 - 8027f0e: e01a b.n 8027f46 - 8027f10: 2300 movs r3, #0 - 8027f12: e018 b.n 8027f46 - 8027f14: fe10803f .word 0xfe10803f - 8027f18: 5c001000 .word 0x5c001000 - 8027f1c: ffff0000 .word 0xffff0000 - 8027f20: 58025408 .word 0x58025408 - 8027f24: 5802541c .word 0x5802541c - 8027f28: 58025430 .word 0x58025430 - 8027f2c: 58025444 .word 0x58025444 - 8027f30: 58025458 .word 0x58025458 - 8027f34: 5802546c .word 0x5802546c - 8027f38: 58025480 .word 0x58025480 - 8027f3c: 58025494 .word 0x58025494 - 8027f40: fffe000f .word 0xfffe000f - 8027f44: 2310 movs r3, #16 + 8027f2a: 687b ldr r3, [r7, #4] + 8027f2c: 689b ldr r3, [r3, #8] + 8027f2e: 2b40 cmp r3, #64 ; 0x40 + 8027f30: d020 beq.n 8027f74 + 8027f32: 687b ldr r3, [r7, #4] + 8027f34: 689b ldr r3, [r3, #8] + 8027f36: 2b80 cmp r3, #128 ; 0x80 + 8027f38: d102 bne.n 8027f40 + 8027f3a: f44f 4380 mov.w r3, #16384 ; 0x4000 + 8027f3e: e01a b.n 8027f76 + 8027f40: 2300 movs r3, #0 + 8027f42: e018 b.n 8027f76 + 8027f44: fe10803f .word 0xfe10803f + 8027f48: 5c001000 .word 0x5c001000 + 8027f4c: ffff0000 .word 0xffff0000 + 8027f50: 58025408 .word 0x58025408 + 8027f54: 5802541c .word 0x5802541c + 8027f58: 58025430 .word 0x58025430 + 8027f5c: 58025444 .word 0x58025444 + 8027f60: 58025458 .word 0x58025458 + 8027f64: 5802546c .word 0x5802546c + 8027f68: 58025480 .word 0x58025480 + 8027f6c: 58025494 .word 0x58025494 + 8027f70: fffe000f .word 0xfffe000f + 8027f74: 2310 movs r3, #16 DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc) | - 8027f46: 687a ldr r2, [r7, #4] - 8027f48: 68d2 ldr r2, [r2, #12] - 8027f4a: 08d2 lsrs r2, r2, #3 + 8027f76: 687a ldr r2, [r7, #4] + 8027f78: 68d2 ldr r2, [r2, #12] + 8027f7a: 08d2 lsrs r2, r2, #3 registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) | - 8027f4c: 431a orrs r2, r3 + 8027f7c: 431a orrs r2, r3 DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc) | - 8027f4e: 687b ldr r3, [r7, #4] - 8027f50: 691b ldr r3, [r3, #16] - 8027f52: 08db lsrs r3, r3, #3 + 8027f7e: 687b ldr r3, [r7, #4] + 8027f80: 691b ldr r3, [r3, #16] + 8027f82: 08db lsrs r3, r3, #3 DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc) | - 8027f54: 431a orrs r2, r3 + 8027f84: 431a orrs r2, r3 DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) | - 8027f56: 687b ldr r3, [r7, #4] - 8027f58: 695b ldr r3, [r3, #20] - 8027f5a: 08db lsrs r3, r3, #3 + 8027f86: 687b ldr r3, [r7, #4] + 8027f88: 695b ldr r3, [r3, #20] + 8027f8a: 08db lsrs r3, r3, #3 DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc) | - 8027f5c: 431a orrs r2, r3 + 8027f8c: 431a orrs r2, r3 DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment) | - 8027f5e: 687b ldr r3, [r7, #4] - 8027f60: 699b ldr r3, [r3, #24] - 8027f62: 08db lsrs r3, r3, #3 + 8027f8e: 687b ldr r3, [r7, #4] + 8027f90: 699b ldr r3, [r3, #24] + 8027f92: 08db lsrs r3, r3, #3 DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) | - 8027f64: 431a orrs r2, r3 + 8027f94: 431a orrs r2, r3 DMA_TO_BDMA_MODE(hdma->Init.Mode) | - 8027f66: 687b ldr r3, [r7, #4] - 8027f68: 69db ldr r3, [r3, #28] - 8027f6a: 08db lsrs r3, r3, #3 + 8027f96: 687b ldr r3, [r7, #4] + 8027f98: 69db ldr r3, [r3, #28] + 8027f9a: 08db lsrs r3, r3, #3 DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment) | - 8027f6c: 431a orrs r2, r3 + 8027f9c: 431a orrs r2, r3 DMA_TO_BDMA_PRIORITY(hdma->Init.Priority); - 8027f6e: 687b ldr r3, [r7, #4] - 8027f70: 6a1b ldr r3, [r3, #32] - 8027f72: 091b lsrs r3, r3, #4 + 8027f9e: 687b ldr r3, [r7, #4] + 8027fa0: 6a1b ldr r3, [r3, #32] + 8027fa2: 091b lsrs r3, r3, #4 DMA_TO_BDMA_MODE(hdma->Init.Mode) | - 8027f74: 4313 orrs r3, r2 + 8027fa4: 4313 orrs r3, r2 registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) | - 8027f76: 697a ldr r2, [r7, #20] - 8027f78: 4313 orrs r3, r2 - 8027f7a: 617b str r3, [r7, #20] + 8027fa6: 697a ldr r2, [r7, #20] + 8027fa8: 4313 orrs r3, r2 + 8027faa: 617b str r3, [r7, #20] /* Write to DMA Channel CR register */ ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR = registerValue; - 8027f7c: 687b ldr r3, [r7, #4] - 8027f7e: 681b ldr r3, [r3, #0] - 8027f80: 697a ldr r2, [r7, #20] - 8027f82: 601a str r2, [r3, #0] + 8027fac: 687b ldr r3, [r7, #4] + 8027fae: 681b ldr r3, [r3, #0] + 8027fb0: 697a ldr r2, [r7, #20] + 8027fb2: 601a str r2, [r3, #0] /* calculation of the channel index */ hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_t)BDMA_Channel1 - (uint32_t)BDMA_Channel0)) << 2U; - 8027f84: 687b ldr r3, [r7, #4] - 8027f86: 681b ldr r3, [r3, #0] - 8027f88: 461a mov r2, r3 - 8027f8a: 4b6e ldr r3, [pc, #440] ; (8028144 ) - 8027f8c: 4413 add r3, r2 - 8027f8e: 4a6e ldr r2, [pc, #440] ; (8028148 ) - 8027f90: fba2 2303 umull r2, r3, r2, r3 - 8027f94: 091b lsrs r3, r3, #4 - 8027f96: 009a lsls r2, r3, #2 - 8027f98: 687b ldr r3, [r7, #4] - 8027f9a: 65da str r2, [r3, #92] ; 0x5c + 8027fb4: 687b ldr r3, [r7, #4] + 8027fb6: 681b ldr r3, [r3, #0] + 8027fb8: 461a mov r2, r3 + 8027fba: 4b6e ldr r3, [pc, #440] ; (8028174 ) + 8027fbc: 4413 add r3, r2 + 8027fbe: 4a6e ldr r2, [pc, #440] ; (8028178 ) + 8027fc0: fba2 2303 umull r2, r3, r2, r3 + 8027fc4: 091b lsrs r3, r3, #4 + 8027fc6: 009a lsls r2, r3, #2 + 8027fc8: 687b ldr r3, [r7, #4] + 8027fca: 65da str r2, [r3, #92] ; 0x5c /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ regs_bdma = (BDMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma); - 8027f9c: 6878 ldr r0, [r7, #4] - 8027f9e: f002 f9b7 bl 802a310 - 8027fa2: 4603 mov r3, r0 - 8027fa4: 60fb str r3, [r7, #12] + 8027fcc: 6878 ldr r0, [r7, #4] + 8027fce: f002 f9b7 bl 802a340 + 8027fd2: 4603 mov r3, r0 + 8027fd4: 60fb str r3, [r7, #12] /* Clear all interrupt flags */ regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); - 8027fa6: 687b ldr r3, [r7, #4] - 8027fa8: 6ddb ldr r3, [r3, #92] ; 0x5c - 8027faa: f003 031f and.w r3, r3, #31 - 8027fae: 2201 movs r2, #1 - 8027fb0: 409a lsls r2, r3 - 8027fb2: 68fb ldr r3, [r7, #12] - 8027fb4: 605a str r2, [r3, #4] - 8027fb6: e008 b.n 8027fca + 8027fd6: 687b ldr r3, [r7, #4] + 8027fd8: 6ddb ldr r3, [r3, #92] ; 0x5c + 8027fda: f003 031f and.w r3, r3, #31 + 8027fde: 2201 movs r2, #1 + 8027fe0: 409a lsls r2, r3 + 8027fe2: 68fb ldr r3, [r7, #12] + 8027fe4: 605a str r2, [r3, #4] + 8027fe6: e008 b.n 8027ffa } else { hdma->ErrorCode = HAL_DMA_ERROR_PARAM; - 8027fb8: 687b ldr r3, [r7, #4] - 8027fba: 2240 movs r2, #64 ; 0x40 - 8027fbc: 655a str r2, [r3, #84] ; 0x54 + 8027fe8: 687b ldr r3, [r7, #4] + 8027fea: 2240 movs r2, #64 ; 0x40 + 8027fec: 655a str r2, [r3, #84] ; 0x54 hdma->State = HAL_DMA_STATE_ERROR; - 8027fbe: 687b ldr r3, [r7, #4] - 8027fc0: 2203 movs r2, #3 - 8027fc2: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8027fee: 687b ldr r3, [r7, #4] + 8027ff0: 2203 movs r2, #3 + 8027ff2: f883 2035 strb.w r2, [r3, #53] ; 0x35 return HAL_ERROR; - 8027fc6: 2301 movs r3, #1 - 8027fc8: e0b7 b.n 802813a + 8027ff6: 2301 movs r3, #1 + 8027ff8: e0b7 b.n 802816a } if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 8027fca: 687b ldr r3, [r7, #4] - 8027fcc: 681b ldr r3, [r3, #0] - 8027fce: 4a5f ldr r2, [pc, #380] ; (802814c ) - 8027fd0: 4293 cmp r3, r2 - 8027fd2: d072 beq.n 80280ba - 8027fd4: 687b ldr r3, [r7, #4] - 8027fd6: 681b ldr r3, [r3, #0] - 8027fd8: 4a5d ldr r2, [pc, #372] ; (8028150 ) - 8027fda: 4293 cmp r3, r2 - 8027fdc: d06d beq.n 80280ba - 8027fde: 687b ldr r3, [r7, #4] - 8027fe0: 681b ldr r3, [r3, #0] - 8027fe2: 4a5c ldr r2, [pc, #368] ; (8028154 ) - 8027fe4: 4293 cmp r3, r2 - 8027fe6: d068 beq.n 80280ba - 8027fe8: 687b ldr r3, [r7, #4] - 8027fea: 681b ldr r3, [r3, #0] - 8027fec: 4a5a ldr r2, [pc, #360] ; (8028158 ) - 8027fee: 4293 cmp r3, r2 - 8027ff0: d063 beq.n 80280ba - 8027ff2: 687b ldr r3, [r7, #4] - 8027ff4: 681b ldr r3, [r3, #0] - 8027ff6: 4a59 ldr r2, [pc, #356] ; (802815c ) - 8027ff8: 4293 cmp r3, r2 - 8027ffa: d05e beq.n 80280ba - 8027ffc: 687b ldr r3, [r7, #4] - 8027ffe: 681b ldr r3, [r3, #0] - 8028000: 4a57 ldr r2, [pc, #348] ; (8028160 ) - 8028002: 4293 cmp r3, r2 - 8028004: d059 beq.n 80280ba - 8028006: 687b ldr r3, [r7, #4] - 8028008: 681b ldr r3, [r3, #0] - 802800a: 4a56 ldr r2, [pc, #344] ; (8028164 ) - 802800c: 4293 cmp r3, r2 - 802800e: d054 beq.n 80280ba - 8028010: 687b ldr r3, [r7, #4] - 8028012: 681b ldr r3, [r3, #0] - 8028014: 4a54 ldr r2, [pc, #336] ; (8028168 ) - 8028016: 4293 cmp r3, r2 - 8028018: d04f beq.n 80280ba - 802801a: 687b ldr r3, [r7, #4] - 802801c: 681b ldr r3, [r3, #0] - 802801e: 4a53 ldr r2, [pc, #332] ; (802816c ) - 8028020: 4293 cmp r3, r2 - 8028022: d04a beq.n 80280ba - 8028024: 687b ldr r3, [r7, #4] - 8028026: 681b ldr r3, [r3, #0] - 8028028: 4a51 ldr r2, [pc, #324] ; (8028170 ) - 802802a: 4293 cmp r3, r2 - 802802c: d045 beq.n 80280ba - 802802e: 687b ldr r3, [r7, #4] - 8028030: 681b ldr r3, [r3, #0] - 8028032: 4a50 ldr r2, [pc, #320] ; (8028174 ) - 8028034: 4293 cmp r3, r2 - 8028036: d040 beq.n 80280ba - 8028038: 687b ldr r3, [r7, #4] - 802803a: 681b ldr r3, [r3, #0] - 802803c: 4a4e ldr r2, [pc, #312] ; (8028178 ) - 802803e: 4293 cmp r3, r2 - 8028040: d03b beq.n 80280ba - 8028042: 687b ldr r3, [r7, #4] - 8028044: 681b ldr r3, [r3, #0] - 8028046: 4a4d ldr r2, [pc, #308] ; (802817c ) - 8028048: 4293 cmp r3, r2 - 802804a: d036 beq.n 80280ba - 802804c: 687b ldr r3, [r7, #4] - 802804e: 681b ldr r3, [r3, #0] - 8028050: 4a4b ldr r2, [pc, #300] ; (8028180 ) - 8028052: 4293 cmp r3, r2 - 8028054: d031 beq.n 80280ba - 8028056: 687b ldr r3, [r7, #4] - 8028058: 681b ldr r3, [r3, #0] - 802805a: 4a4a ldr r2, [pc, #296] ; (8028184 ) - 802805c: 4293 cmp r3, r2 - 802805e: d02c beq.n 80280ba - 8028060: 687b ldr r3, [r7, #4] - 8028062: 681b ldr r3, [r3, #0] - 8028064: 4a48 ldr r2, [pc, #288] ; (8028188 ) - 8028066: 4293 cmp r3, r2 - 8028068: d027 beq.n 80280ba - 802806a: 687b ldr r3, [r7, #4] - 802806c: 681b ldr r3, [r3, #0] - 802806e: 4a47 ldr r2, [pc, #284] ; (802818c ) - 8028070: 4293 cmp r3, r2 - 8028072: d022 beq.n 80280ba - 8028074: 687b ldr r3, [r7, #4] - 8028076: 681b ldr r3, [r3, #0] - 8028078: 4a45 ldr r2, [pc, #276] ; (8028190 ) - 802807a: 4293 cmp r3, r2 - 802807c: d01d beq.n 80280ba - 802807e: 687b ldr r3, [r7, #4] - 8028080: 681b ldr r3, [r3, #0] - 8028082: 4a44 ldr r2, [pc, #272] ; (8028194 ) - 8028084: 4293 cmp r3, r2 - 8028086: d018 beq.n 80280ba - 8028088: 687b ldr r3, [r7, #4] - 802808a: 681b ldr r3, [r3, #0] - 802808c: 4a42 ldr r2, [pc, #264] ; (8028198 ) - 802808e: 4293 cmp r3, r2 - 8028090: d013 beq.n 80280ba - 8028092: 687b ldr r3, [r7, #4] - 8028094: 681b ldr r3, [r3, #0] - 8028096: 4a41 ldr r2, [pc, #260] ; (802819c ) - 8028098: 4293 cmp r3, r2 - 802809a: d00e beq.n 80280ba - 802809c: 687b ldr r3, [r7, #4] - 802809e: 681b ldr r3, [r3, #0] - 80280a0: 4a3f ldr r2, [pc, #252] ; (80281a0 ) - 80280a2: 4293 cmp r3, r2 - 80280a4: d009 beq.n 80280ba - 80280a6: 687b ldr r3, [r7, #4] - 80280a8: 681b ldr r3, [r3, #0] - 80280aa: 4a3e ldr r2, [pc, #248] ; (80281a4 ) - 80280ac: 4293 cmp r3, r2 - 80280ae: d004 beq.n 80280ba - 80280b0: 687b ldr r3, [r7, #4] - 80280b2: 681b ldr r3, [r3, #0] - 80280b4: 4a3c ldr r2, [pc, #240] ; (80281a8 ) - 80280b6: 4293 cmp r3, r2 - 80280b8: d101 bne.n 80280be - 80280ba: 2301 movs r3, #1 - 80280bc: e000 b.n 80280c0 - 80280be: 2300 movs r3, #0 - 80280c0: 2b00 cmp r3, #0 - 80280c2: d032 beq.n 802812a + 8027ffa: 687b ldr r3, [r7, #4] + 8027ffc: 681b ldr r3, [r3, #0] + 8027ffe: 4a5f ldr r2, [pc, #380] ; (802817c ) + 8028000: 4293 cmp r3, r2 + 8028002: d072 beq.n 80280ea + 8028004: 687b ldr r3, [r7, #4] + 8028006: 681b ldr r3, [r3, #0] + 8028008: 4a5d ldr r2, [pc, #372] ; (8028180 ) + 802800a: 4293 cmp r3, r2 + 802800c: d06d beq.n 80280ea + 802800e: 687b ldr r3, [r7, #4] + 8028010: 681b ldr r3, [r3, #0] + 8028012: 4a5c ldr r2, [pc, #368] ; (8028184 ) + 8028014: 4293 cmp r3, r2 + 8028016: d068 beq.n 80280ea + 8028018: 687b ldr r3, [r7, #4] + 802801a: 681b ldr r3, [r3, #0] + 802801c: 4a5a ldr r2, [pc, #360] ; (8028188 ) + 802801e: 4293 cmp r3, r2 + 8028020: d063 beq.n 80280ea + 8028022: 687b ldr r3, [r7, #4] + 8028024: 681b ldr r3, [r3, #0] + 8028026: 4a59 ldr r2, [pc, #356] ; (802818c ) + 8028028: 4293 cmp r3, r2 + 802802a: d05e beq.n 80280ea + 802802c: 687b ldr r3, [r7, #4] + 802802e: 681b ldr r3, [r3, #0] + 8028030: 4a57 ldr r2, [pc, #348] ; (8028190 ) + 8028032: 4293 cmp r3, r2 + 8028034: d059 beq.n 80280ea + 8028036: 687b ldr r3, [r7, #4] + 8028038: 681b ldr r3, [r3, #0] + 802803a: 4a56 ldr r2, [pc, #344] ; (8028194 ) + 802803c: 4293 cmp r3, r2 + 802803e: d054 beq.n 80280ea + 8028040: 687b ldr r3, [r7, #4] + 8028042: 681b ldr r3, [r3, #0] + 8028044: 4a54 ldr r2, [pc, #336] ; (8028198 ) + 8028046: 4293 cmp r3, r2 + 8028048: d04f beq.n 80280ea + 802804a: 687b ldr r3, [r7, #4] + 802804c: 681b ldr r3, [r3, #0] + 802804e: 4a53 ldr r2, [pc, #332] ; (802819c ) + 8028050: 4293 cmp r3, r2 + 8028052: d04a beq.n 80280ea + 8028054: 687b ldr r3, [r7, #4] + 8028056: 681b ldr r3, [r3, #0] + 8028058: 4a51 ldr r2, [pc, #324] ; (80281a0 ) + 802805a: 4293 cmp r3, r2 + 802805c: d045 beq.n 80280ea + 802805e: 687b ldr r3, [r7, #4] + 8028060: 681b ldr r3, [r3, #0] + 8028062: 4a50 ldr r2, [pc, #320] ; (80281a4 ) + 8028064: 4293 cmp r3, r2 + 8028066: d040 beq.n 80280ea + 8028068: 687b ldr r3, [r7, #4] + 802806a: 681b ldr r3, [r3, #0] + 802806c: 4a4e ldr r2, [pc, #312] ; (80281a8 ) + 802806e: 4293 cmp r3, r2 + 8028070: d03b beq.n 80280ea + 8028072: 687b ldr r3, [r7, #4] + 8028074: 681b ldr r3, [r3, #0] + 8028076: 4a4d ldr r2, [pc, #308] ; (80281ac ) + 8028078: 4293 cmp r3, r2 + 802807a: d036 beq.n 80280ea + 802807c: 687b ldr r3, [r7, #4] + 802807e: 681b ldr r3, [r3, #0] + 8028080: 4a4b ldr r2, [pc, #300] ; (80281b0 ) + 8028082: 4293 cmp r3, r2 + 8028084: d031 beq.n 80280ea + 8028086: 687b ldr r3, [r7, #4] + 8028088: 681b ldr r3, [r3, #0] + 802808a: 4a4a ldr r2, [pc, #296] ; (80281b4 ) + 802808c: 4293 cmp r3, r2 + 802808e: d02c beq.n 80280ea + 8028090: 687b ldr r3, [r7, #4] + 8028092: 681b ldr r3, [r3, #0] + 8028094: 4a48 ldr r2, [pc, #288] ; (80281b8 ) + 8028096: 4293 cmp r3, r2 + 8028098: d027 beq.n 80280ea + 802809a: 687b ldr r3, [r7, #4] + 802809c: 681b ldr r3, [r3, #0] + 802809e: 4a47 ldr r2, [pc, #284] ; (80281bc ) + 80280a0: 4293 cmp r3, r2 + 80280a2: d022 beq.n 80280ea + 80280a4: 687b ldr r3, [r7, #4] + 80280a6: 681b ldr r3, [r3, #0] + 80280a8: 4a45 ldr r2, [pc, #276] ; (80281c0 ) + 80280aa: 4293 cmp r3, r2 + 80280ac: d01d beq.n 80280ea + 80280ae: 687b ldr r3, [r7, #4] + 80280b0: 681b ldr r3, [r3, #0] + 80280b2: 4a44 ldr r2, [pc, #272] ; (80281c4 ) + 80280b4: 4293 cmp r3, r2 + 80280b6: d018 beq.n 80280ea + 80280b8: 687b ldr r3, [r7, #4] + 80280ba: 681b ldr r3, [r3, #0] + 80280bc: 4a42 ldr r2, [pc, #264] ; (80281c8 ) + 80280be: 4293 cmp r3, r2 + 80280c0: d013 beq.n 80280ea + 80280c2: 687b ldr r3, [r7, #4] + 80280c4: 681b ldr r3, [r3, #0] + 80280c6: 4a41 ldr r2, [pc, #260] ; (80281cc ) + 80280c8: 4293 cmp r3, r2 + 80280ca: d00e beq.n 80280ea + 80280cc: 687b ldr r3, [r7, #4] + 80280ce: 681b ldr r3, [r3, #0] + 80280d0: 4a3f ldr r2, [pc, #252] ; (80281d0 ) + 80280d2: 4293 cmp r3, r2 + 80280d4: d009 beq.n 80280ea + 80280d6: 687b ldr r3, [r7, #4] + 80280d8: 681b ldr r3, [r3, #0] + 80280da: 4a3e ldr r2, [pc, #248] ; (80281d4 ) + 80280dc: 4293 cmp r3, r2 + 80280de: d004 beq.n 80280ea + 80280e0: 687b ldr r3, [r7, #4] + 80280e2: 681b ldr r3, [r3, #0] + 80280e4: 4a3c ldr r2, [pc, #240] ; (80281d8 ) + 80280e6: 4293 cmp r3, r2 + 80280e8: d101 bne.n 80280ee + 80280ea: 2301 movs r3, #1 + 80280ec: e000 b.n 80280f0 + 80280ee: 2300 movs r3, #0 + 80280f0: 2b00 cmp r3, #0 + 80280f2: d032 beq.n 802815a { /* Initialize parameters for DMAMUX channel : DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask */ DMA_CalcDMAMUXChannelBaseAndMask(hdma); - 80280c4: 6878 ldr r0, [r7, #4] - 80280c6: f002 fa51 bl 802a56c + 80280f4: 6878 ldr r0, [r7, #4] + 80280f6: f002 fa51 bl 802a59c if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) - 80280ca: 687b ldr r3, [r7, #4] - 80280cc: 689b ldr r3, [r3, #8] - 80280ce: 2b80 cmp r3, #128 ; 0x80 - 80280d0: d102 bne.n 80280d8 + 80280fa: 687b ldr r3, [r7, #4] + 80280fc: 689b ldr r3, [r3, #8] + 80280fe: 2b80 cmp r3, #128 ; 0x80 + 8028100: d102 bne.n 8028108 { /* if memory to memory force the request to 0*/ hdma->Init.Request = DMA_REQUEST_MEM2MEM; - 80280d2: 687b ldr r3, [r7, #4] - 80280d4: 2200 movs r2, #0 - 80280d6: 605a str r2, [r3, #4] + 8028102: 687b ldr r3, [r7, #4] + 8028104: 2200 movs r2, #0 + 8028106: 605a str r2, [r3, #4] } /* Set peripheral request to DMAMUX channel */ hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID); - 80280d8: 687b ldr r3, [r7, #4] - 80280da: 685a ldr r2, [r3, #4] - 80280dc: 687b ldr r3, [r7, #4] - 80280de: 6e1b ldr r3, [r3, #96] ; 0x60 - 80280e0: b2d2 uxtb r2, r2 - 80280e2: 601a str r2, [r3, #0] + 8028108: 687b ldr r3, [r7, #4] + 802810a: 685a ldr r2, [r3, #4] + 802810c: 687b ldr r3, [r7, #4] + 802810e: 6e1b ldr r3, [r3, #96] ; 0x60 + 8028110: b2d2 uxtb r2, r2 + 8028112: 601a str r2, [r3, #0] /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 80280e4: 687b ldr r3, [r7, #4] - 80280e6: 6e5b ldr r3, [r3, #100] ; 0x64 - 80280e8: 687a ldr r2, [r7, #4] - 80280ea: 6e92 ldr r2, [r2, #104] ; 0x68 - 80280ec: 605a str r2, [r3, #4] + 8028114: 687b ldr r3, [r7, #4] + 8028116: 6e5b ldr r3, [r3, #100] ; 0x64 + 8028118: 687a ldr r2, [r7, #4] + 802811a: 6e92 ldr r2, [r2, #104] ; 0x68 + 802811c: 605a str r2, [r3, #4] /* Initialize parameters for DMAMUX request generator : if the DMA request is DMA_REQUEST_GENERATOR0 to DMA_REQUEST_GENERATOR7 */ if((hdma->Init.Request >= DMA_REQUEST_GENERATOR0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR7)) - 80280ee: 687b ldr r3, [r7, #4] - 80280f0: 685b ldr r3, [r3, #4] - 80280f2: 2b00 cmp r3, #0 - 80280f4: d010 beq.n 8028118 - 80280f6: 687b ldr r3, [r7, #4] - 80280f8: 685b ldr r3, [r3, #4] - 80280fa: 2b08 cmp r3, #8 - 80280fc: d80c bhi.n 8028118 + 802811e: 687b ldr r3, [r7, #4] + 8028120: 685b ldr r3, [r3, #4] + 8028122: 2b00 cmp r3, #0 + 8028124: d010 beq.n 8028148 + 8028126: 687b ldr r3, [r7, #4] + 8028128: 685b ldr r3, [r3, #4] + 802812a: 2b08 cmp r3, #8 + 802812c: d80c bhi.n 8028148 { /* Initialize parameters for DMAMUX request generator : DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask */ DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); - 80280fe: 6878 ldr r0, [r7, #4] - 8028100: f002 face bl 802a6a0 + 802812e: 6878 ldr r0, [r7, #4] + 8028130: f002 face bl 802a6d0 /* Reset the DMAMUX request generator register */ hdma->DMAmuxRequestGen->RGCR = 0U; - 8028104: 687b ldr r3, [r7, #4] - 8028106: 6edb ldr r3, [r3, #108] ; 0x6c - 8028108: 2200 movs r2, #0 - 802810a: 601a str r2, [r3, #0] + 8028134: 687b ldr r3, [r7, #4] + 8028136: 6edb ldr r3, [r3, #108] ; 0x6c + 8028138: 2200 movs r2, #0 + 802813a: 601a str r2, [r3, #0] /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 802810c: 687b ldr r3, [r7, #4] - 802810e: 6f1b ldr r3, [r3, #112] ; 0x70 - 8028110: 687a ldr r2, [r7, #4] - 8028112: 6f52 ldr r2, [r2, #116] ; 0x74 - 8028114: 605a str r2, [r3, #4] - 8028116: e008 b.n 802812a + 802813c: 687b ldr r3, [r7, #4] + 802813e: 6f1b ldr r3, [r3, #112] ; 0x70 + 8028140: 687a ldr r2, [r7, #4] + 8028142: 6f52 ldr r2, [r2, #116] ; 0x74 + 8028144: 605a str r2, [r3, #4] + 8028146: e008 b.n 802815a } else { hdma->DMAmuxRequestGen = 0U; - 8028118: 687b ldr r3, [r7, #4] - 802811a: 2200 movs r2, #0 - 802811c: 66da str r2, [r3, #108] ; 0x6c + 8028148: 687b ldr r3, [r7, #4] + 802814a: 2200 movs r2, #0 + 802814c: 66da str r2, [r3, #108] ; 0x6c hdma->DMAmuxRequestGenStatus = 0U; - 802811e: 687b ldr r3, [r7, #4] - 8028120: 2200 movs r2, #0 - 8028122: 671a str r2, [r3, #112] ; 0x70 + 802814e: 687b ldr r3, [r7, #4] + 8028150: 2200 movs r2, #0 + 8028152: 671a str r2, [r3, #112] ; 0x70 hdma->DMAmuxRequestGenStatusMask = 0U; - 8028124: 687b ldr r3, [r7, #4] - 8028126: 2200 movs r2, #0 - 8028128: 675a str r2, [r3, #116] ; 0x74 + 8028154: 687b ldr r3, [r7, #4] + 8028156: 2200 movs r2, #0 + 8028158: 675a str r2, [r3, #116] ; 0x74 } } /* Initialize the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 802812a: 687b ldr r3, [r7, #4] - 802812c: 2200 movs r2, #0 - 802812e: 655a str r2, [r3, #84] ; 0x54 + 802815a: 687b ldr r3, [r7, #4] + 802815c: 2200 movs r2, #0 + 802815e: 655a str r2, [r3, #84] ; 0x54 /* Initialize the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8028130: 687b ldr r3, [r7, #4] - 8028132: 2201 movs r2, #1 - 8028134: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8028160: 687b ldr r3, [r7, #4] + 8028162: 2201 movs r2, #1 + 8028164: f883 2035 strb.w r2, [r3, #53] ; 0x35 return HAL_OK; - 8028138: 2300 movs r3, #0 -} - 802813a: 4618 mov r0, r3 - 802813c: 3718 adds r7, #24 - 802813e: 46bd mov sp, r7 - 8028140: bd80 pop {r7, pc} - 8028142: bf00 nop - 8028144: a7fdabf8 .word 0xa7fdabf8 - 8028148: cccccccd .word 0xcccccccd - 802814c: 40020010 .word 0x40020010 - 8028150: 40020028 .word 0x40020028 - 8028154: 40020040 .word 0x40020040 - 8028158: 40020058 .word 0x40020058 - 802815c: 40020070 .word 0x40020070 - 8028160: 40020088 .word 0x40020088 - 8028164: 400200a0 .word 0x400200a0 - 8028168: 400200b8 .word 0x400200b8 - 802816c: 40020410 .word 0x40020410 - 8028170: 40020428 .word 0x40020428 - 8028174: 40020440 .word 0x40020440 - 8028178: 40020458 .word 0x40020458 - 802817c: 40020470 .word 0x40020470 - 8028180: 40020488 .word 0x40020488 - 8028184: 400204a0 .word 0x400204a0 - 8028188: 400204b8 .word 0x400204b8 - 802818c: 58025408 .word 0x58025408 - 8028190: 5802541c .word 0x5802541c - 8028194: 58025430 .word 0x58025430 - 8028198: 58025444 .word 0x58025444 - 802819c: 58025458 .word 0x58025458 - 80281a0: 5802546c .word 0x5802546c - 80281a4: 58025480 .word 0x58025480 - 80281a8: 58025494 .word 0x58025494 - -080281ac : + 8028168: 2300 movs r3, #0 +} + 802816a: 4618 mov r0, r3 + 802816c: 3718 adds r7, #24 + 802816e: 46bd mov sp, r7 + 8028170: bd80 pop {r7, pc} + 8028172: bf00 nop + 8028174: a7fdabf8 .word 0xa7fdabf8 + 8028178: cccccccd .word 0xcccccccd + 802817c: 40020010 .word 0x40020010 + 8028180: 40020028 .word 0x40020028 + 8028184: 40020040 .word 0x40020040 + 8028188: 40020058 .word 0x40020058 + 802818c: 40020070 .word 0x40020070 + 8028190: 40020088 .word 0x40020088 + 8028194: 400200a0 .word 0x400200a0 + 8028198: 400200b8 .word 0x400200b8 + 802819c: 40020410 .word 0x40020410 + 80281a0: 40020428 .word 0x40020428 + 80281a4: 40020440 .word 0x40020440 + 80281a8: 40020458 .word 0x40020458 + 80281ac: 40020470 .word 0x40020470 + 80281b0: 40020488 .word 0x40020488 + 80281b4: 400204a0 .word 0x400204a0 + 80281b8: 400204b8 .word 0x400204b8 + 80281bc: 58025408 .word 0x58025408 + 80281c0: 5802541c .word 0x5802541c + 80281c4: 58025430 .word 0x58025430 + 80281c8: 58025444 .word 0x58025444 + 80281cc: 58025458 .word 0x58025458 + 80281d0: 5802546c .word 0x5802546c + 80281d4: 58025480 .word 0x58025480 + 80281d8: 58025494 .word 0x58025494 + +080281dc : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { - 80281ac: b580 push {r7, lr} - 80281ae: b086 sub sp, #24 - 80281b0: af00 add r7, sp, #0 - 80281b2: 60f8 str r0, [r7, #12] - 80281b4: 60b9 str r1, [r7, #8] - 80281b6: 607a str r2, [r7, #4] - 80281b8: 603b str r3, [r7, #0] + 80281dc: b580 push {r7, lr} + 80281de: b086 sub sp, #24 + 80281e0: af00 add r7, sp, #0 + 80281e2: 60f8 str r0, [r7, #12] + 80281e4: 60b9 str r1, [r7, #8] + 80281e6: 607a str r2, [r7, #4] + 80281e8: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 80281ba: 2300 movs r3, #0 - 80281bc: 75fb strb r3, [r7, #23] + 80281ea: 2300 movs r3, #0 + 80281ec: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Check the DMA peripheral handle */ if(hdma == NULL) - 80281be: 68fb ldr r3, [r7, #12] - 80281c0: 2b00 cmp r3, #0 - 80281c2: d101 bne.n 80281c8 + 80281ee: 68fb ldr r3, [r7, #12] + 80281f0: 2b00 cmp r3, #0 + 80281f2: d101 bne.n 80281f8 { return HAL_ERROR; - 80281c4: 2301 movs r3, #1 - 80281c6: e226 b.n 8028616 + 80281f4: 2301 movs r3, #1 + 80281f6: e226 b.n 8028646 } /* Process locked */ __HAL_LOCK(hdma); - 80281c8: 68fb ldr r3, [r7, #12] - 80281ca: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 80281ce: 2b01 cmp r3, #1 - 80281d0: d101 bne.n 80281d6 - 80281d2: 2302 movs r3, #2 - 80281d4: e21f b.n 8028616 - 80281d6: 68fb ldr r3, [r7, #12] - 80281d8: 2201 movs r2, #1 - 80281da: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 80281f8: 68fb ldr r3, [r7, #12] + 80281fa: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 80281fe: 2b01 cmp r3, #1 + 8028200: d101 bne.n 8028206 + 8028202: 2302 movs r3, #2 + 8028204: e21f b.n 8028646 + 8028206: 68fb ldr r3, [r7, #12] + 8028208: 2201 movs r2, #1 + 802820a: f883 2034 strb.w r2, [r3, #52] ; 0x34 if(HAL_DMA_STATE_READY == hdma->State) - 80281de: 68fb ldr r3, [r7, #12] - 80281e0: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 80281e4: b2db uxtb r3, r3 - 80281e6: 2b01 cmp r3, #1 - 80281e8: f040 820a bne.w 8028600 + 802820e: 68fb ldr r3, [r7, #12] + 8028210: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8028214: b2db uxtb r3, r3 + 8028216: 2b01 cmp r3, #1 + 8028218: f040 820a bne.w 8028630 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; - 80281ec: 68fb ldr r3, [r7, #12] - 80281ee: 2202 movs r2, #2 - 80281f0: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 802821c: 68fb ldr r3, [r7, #12] + 802821e: 2202 movs r2, #2 + 8028220: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Initialize the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 80281f4: 68fb ldr r3, [r7, #12] - 80281f6: 2200 movs r2, #0 - 80281f8: 655a str r2, [r3, #84] ; 0x54 + 8028224: 68fb ldr r3, [r7, #12] + 8028226: 2200 movs r2, #0 + 8028228: 655a str r2, [r3, #84] ; 0x54 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); - 80281fa: 68fb ldr r3, [r7, #12] - 80281fc: 681b ldr r3, [r3, #0] - 80281fe: 4a68 ldr r2, [pc, #416] ; (80283a0 ) - 8028200: 4293 cmp r3, r2 - 8028202: d04a beq.n 802829a - 8028204: 68fb ldr r3, [r7, #12] - 8028206: 681b ldr r3, [r3, #0] - 8028208: 4a66 ldr r2, [pc, #408] ; (80283a4 ) - 802820a: 4293 cmp r3, r2 - 802820c: d045 beq.n 802829a - 802820e: 68fb ldr r3, [r7, #12] - 8028210: 681b ldr r3, [r3, #0] - 8028212: 4a65 ldr r2, [pc, #404] ; (80283a8 ) - 8028214: 4293 cmp r3, r2 - 8028216: d040 beq.n 802829a - 8028218: 68fb ldr r3, [r7, #12] - 802821a: 681b ldr r3, [r3, #0] - 802821c: 4a63 ldr r2, [pc, #396] ; (80283ac ) - 802821e: 4293 cmp r3, r2 - 8028220: d03b beq.n 802829a - 8028222: 68fb ldr r3, [r7, #12] - 8028224: 681b ldr r3, [r3, #0] - 8028226: 4a62 ldr r2, [pc, #392] ; (80283b0 ) - 8028228: 4293 cmp r3, r2 - 802822a: d036 beq.n 802829a - 802822c: 68fb ldr r3, [r7, #12] - 802822e: 681b ldr r3, [r3, #0] - 8028230: 4a60 ldr r2, [pc, #384] ; (80283b4 ) - 8028232: 4293 cmp r3, r2 - 8028234: d031 beq.n 802829a - 8028236: 68fb ldr r3, [r7, #12] - 8028238: 681b ldr r3, [r3, #0] - 802823a: 4a5f ldr r2, [pc, #380] ; (80283b8 ) - 802823c: 4293 cmp r3, r2 - 802823e: d02c beq.n 802829a - 8028240: 68fb ldr r3, [r7, #12] - 8028242: 681b ldr r3, [r3, #0] - 8028244: 4a5d ldr r2, [pc, #372] ; (80283bc ) - 8028246: 4293 cmp r3, r2 - 8028248: d027 beq.n 802829a - 802824a: 68fb ldr r3, [r7, #12] - 802824c: 681b ldr r3, [r3, #0] - 802824e: 4a5c ldr r2, [pc, #368] ; (80283c0 ) - 8028250: 4293 cmp r3, r2 - 8028252: d022 beq.n 802829a - 8028254: 68fb ldr r3, [r7, #12] - 8028256: 681b ldr r3, [r3, #0] - 8028258: 4a5a ldr r2, [pc, #360] ; (80283c4 ) - 802825a: 4293 cmp r3, r2 - 802825c: d01d beq.n 802829a - 802825e: 68fb ldr r3, [r7, #12] - 8028260: 681b ldr r3, [r3, #0] - 8028262: 4a59 ldr r2, [pc, #356] ; (80283c8 ) - 8028264: 4293 cmp r3, r2 - 8028266: d018 beq.n 802829a - 8028268: 68fb ldr r3, [r7, #12] - 802826a: 681b ldr r3, [r3, #0] - 802826c: 4a57 ldr r2, [pc, #348] ; (80283cc ) - 802826e: 4293 cmp r3, r2 - 8028270: d013 beq.n 802829a - 8028272: 68fb ldr r3, [r7, #12] - 8028274: 681b ldr r3, [r3, #0] - 8028276: 4a56 ldr r2, [pc, #344] ; (80283d0 ) - 8028278: 4293 cmp r3, r2 - 802827a: d00e beq.n 802829a - 802827c: 68fb ldr r3, [r7, #12] - 802827e: 681b ldr r3, [r3, #0] - 8028280: 4a54 ldr r2, [pc, #336] ; (80283d4 ) - 8028282: 4293 cmp r3, r2 - 8028284: d009 beq.n 802829a - 8028286: 68fb ldr r3, [r7, #12] - 8028288: 681b ldr r3, [r3, #0] - 802828a: 4a53 ldr r2, [pc, #332] ; (80283d8 ) - 802828c: 4293 cmp r3, r2 - 802828e: d004 beq.n 802829a - 8028290: 68fb ldr r3, [r7, #12] - 8028292: 681b ldr r3, [r3, #0] - 8028294: 4a51 ldr r2, [pc, #324] ; (80283dc ) - 8028296: 4293 cmp r3, r2 - 8028298: d108 bne.n 80282ac - 802829a: 68fb ldr r3, [r7, #12] - 802829c: 681b ldr r3, [r3, #0] - 802829e: 681a ldr r2, [r3, #0] - 80282a0: 68fb ldr r3, [r7, #12] - 80282a2: 681b ldr r3, [r3, #0] - 80282a4: f022 0201 bic.w r2, r2, #1 - 80282a8: 601a str r2, [r3, #0] - 80282aa: e007 b.n 80282bc + 802822a: 68fb ldr r3, [r7, #12] + 802822c: 681b ldr r3, [r3, #0] + 802822e: 4a68 ldr r2, [pc, #416] ; (80283d0 ) + 8028230: 4293 cmp r3, r2 + 8028232: d04a beq.n 80282ca + 8028234: 68fb ldr r3, [r7, #12] + 8028236: 681b ldr r3, [r3, #0] + 8028238: 4a66 ldr r2, [pc, #408] ; (80283d4 ) + 802823a: 4293 cmp r3, r2 + 802823c: d045 beq.n 80282ca + 802823e: 68fb ldr r3, [r7, #12] + 8028240: 681b ldr r3, [r3, #0] + 8028242: 4a65 ldr r2, [pc, #404] ; (80283d8 ) + 8028244: 4293 cmp r3, r2 + 8028246: d040 beq.n 80282ca + 8028248: 68fb ldr r3, [r7, #12] + 802824a: 681b ldr r3, [r3, #0] + 802824c: 4a63 ldr r2, [pc, #396] ; (80283dc ) + 802824e: 4293 cmp r3, r2 + 8028250: d03b beq.n 80282ca + 8028252: 68fb ldr r3, [r7, #12] + 8028254: 681b ldr r3, [r3, #0] + 8028256: 4a62 ldr r2, [pc, #392] ; (80283e0 ) + 8028258: 4293 cmp r3, r2 + 802825a: d036 beq.n 80282ca + 802825c: 68fb ldr r3, [r7, #12] + 802825e: 681b ldr r3, [r3, #0] + 8028260: 4a60 ldr r2, [pc, #384] ; (80283e4 ) + 8028262: 4293 cmp r3, r2 + 8028264: d031 beq.n 80282ca + 8028266: 68fb ldr r3, [r7, #12] + 8028268: 681b ldr r3, [r3, #0] + 802826a: 4a5f ldr r2, [pc, #380] ; (80283e8 ) + 802826c: 4293 cmp r3, r2 + 802826e: d02c beq.n 80282ca + 8028270: 68fb ldr r3, [r7, #12] + 8028272: 681b ldr r3, [r3, #0] + 8028274: 4a5d ldr r2, [pc, #372] ; (80283ec ) + 8028276: 4293 cmp r3, r2 + 8028278: d027 beq.n 80282ca + 802827a: 68fb ldr r3, [r7, #12] + 802827c: 681b ldr r3, [r3, #0] + 802827e: 4a5c ldr r2, [pc, #368] ; (80283f0 ) + 8028280: 4293 cmp r3, r2 + 8028282: d022 beq.n 80282ca + 8028284: 68fb ldr r3, [r7, #12] + 8028286: 681b ldr r3, [r3, #0] + 8028288: 4a5a ldr r2, [pc, #360] ; (80283f4 ) + 802828a: 4293 cmp r3, r2 + 802828c: d01d beq.n 80282ca + 802828e: 68fb ldr r3, [r7, #12] + 8028290: 681b ldr r3, [r3, #0] + 8028292: 4a59 ldr r2, [pc, #356] ; (80283f8 ) + 8028294: 4293 cmp r3, r2 + 8028296: d018 beq.n 80282ca + 8028298: 68fb ldr r3, [r7, #12] + 802829a: 681b ldr r3, [r3, #0] + 802829c: 4a57 ldr r2, [pc, #348] ; (80283fc ) + 802829e: 4293 cmp r3, r2 + 80282a0: d013 beq.n 80282ca + 80282a2: 68fb ldr r3, [r7, #12] + 80282a4: 681b ldr r3, [r3, #0] + 80282a6: 4a56 ldr r2, [pc, #344] ; (8028400 ) + 80282a8: 4293 cmp r3, r2 + 80282aa: d00e beq.n 80282ca 80282ac: 68fb ldr r3, [r7, #12] 80282ae: 681b ldr r3, [r3, #0] - 80282b0: 681a ldr r2, [r3, #0] - 80282b2: 68fb ldr r3, [r7, #12] - 80282b4: 681b ldr r3, [r3, #0] - 80282b6: f022 0201 bic.w r2, r2, #1 - 80282ba: 601a str r2, [r3, #0] + 80282b0: 4a54 ldr r2, [pc, #336] ; (8028404 ) + 80282b2: 4293 cmp r3, r2 + 80282b4: d009 beq.n 80282ca + 80282b6: 68fb ldr r3, [r7, #12] + 80282b8: 681b ldr r3, [r3, #0] + 80282ba: 4a53 ldr r2, [pc, #332] ; (8028408 ) + 80282bc: 4293 cmp r3, r2 + 80282be: d004 beq.n 80282ca + 80282c0: 68fb ldr r3, [r7, #12] + 80282c2: 681b ldr r3, [r3, #0] + 80282c4: 4a51 ldr r2, [pc, #324] ; (802840c ) + 80282c6: 4293 cmp r3, r2 + 80282c8: d108 bne.n 80282dc + 80282ca: 68fb ldr r3, [r7, #12] + 80282cc: 681b ldr r3, [r3, #0] + 80282ce: 681a ldr r2, [r3, #0] + 80282d0: 68fb ldr r3, [r7, #12] + 80282d2: 681b ldr r3, [r3, #0] + 80282d4: f022 0201 bic.w r2, r2, #1 + 80282d8: 601a str r2, [r3, #0] + 80282da: e007 b.n 80282ec + 80282dc: 68fb ldr r3, [r7, #12] + 80282de: 681b ldr r3, [r3, #0] + 80282e0: 681a ldr r2, [r3, #0] + 80282e2: 68fb ldr r3, [r7, #12] + 80282e4: 681b ldr r3, [r3, #0] + 80282e6: f022 0201 bic.w r2, r2, #1 + 80282ea: 601a str r2, [r3, #0] /* Configure the source, destination address and the data length */ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - 80282bc: 683b ldr r3, [r7, #0] - 80282be: 687a ldr r2, [r7, #4] - 80282c0: 68b9 ldr r1, [r7, #8] - 80282c2: 68f8 ldr r0, [r7, #12] - 80282c4: f001 fe78 bl 8029fb8 + 80282ec: 683b ldr r3, [r7, #0] + 80282ee: 687a ldr r2, [r7, #4] + 80282f0: 68b9 ldr r1, [r7, #8] + 80282f2: 68f8 ldr r0, [r7, #12] + 80282f4: f001 fe78 bl 8029fe8 if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 80282c8: 68fb ldr r3, [r7, #12] - 80282ca: 681b ldr r3, [r3, #0] - 80282cc: 4a34 ldr r2, [pc, #208] ; (80283a0 ) - 80282ce: 4293 cmp r3, r2 - 80282d0: d04a beq.n 8028368 - 80282d2: 68fb ldr r3, [r7, #12] - 80282d4: 681b ldr r3, [r3, #0] - 80282d6: 4a33 ldr r2, [pc, #204] ; (80283a4 ) - 80282d8: 4293 cmp r3, r2 - 80282da: d045 beq.n 8028368 - 80282dc: 68fb ldr r3, [r7, #12] - 80282de: 681b ldr r3, [r3, #0] - 80282e0: 4a31 ldr r2, [pc, #196] ; (80283a8 ) - 80282e2: 4293 cmp r3, r2 - 80282e4: d040 beq.n 8028368 - 80282e6: 68fb ldr r3, [r7, #12] - 80282e8: 681b ldr r3, [r3, #0] - 80282ea: 4a30 ldr r2, [pc, #192] ; (80283ac ) - 80282ec: 4293 cmp r3, r2 - 80282ee: d03b beq.n 8028368 - 80282f0: 68fb ldr r3, [r7, #12] - 80282f2: 681b ldr r3, [r3, #0] - 80282f4: 4a2e ldr r2, [pc, #184] ; (80283b0 ) - 80282f6: 4293 cmp r3, r2 - 80282f8: d036 beq.n 8028368 - 80282fa: 68fb ldr r3, [r7, #12] - 80282fc: 681b ldr r3, [r3, #0] - 80282fe: 4a2d ldr r2, [pc, #180] ; (80283b4 ) - 8028300: 4293 cmp r3, r2 - 8028302: d031 beq.n 8028368 - 8028304: 68fb ldr r3, [r7, #12] - 8028306: 681b ldr r3, [r3, #0] - 8028308: 4a2b ldr r2, [pc, #172] ; (80283b8 ) - 802830a: 4293 cmp r3, r2 - 802830c: d02c beq.n 8028368 - 802830e: 68fb ldr r3, [r7, #12] - 8028310: 681b ldr r3, [r3, #0] - 8028312: 4a2a ldr r2, [pc, #168] ; (80283bc ) - 8028314: 4293 cmp r3, r2 - 8028316: d027 beq.n 8028368 - 8028318: 68fb ldr r3, [r7, #12] - 802831a: 681b ldr r3, [r3, #0] - 802831c: 4a28 ldr r2, [pc, #160] ; (80283c0 ) - 802831e: 4293 cmp r3, r2 - 8028320: d022 beq.n 8028368 - 8028322: 68fb ldr r3, [r7, #12] - 8028324: 681b ldr r3, [r3, #0] - 8028326: 4a27 ldr r2, [pc, #156] ; (80283c4 ) - 8028328: 4293 cmp r3, r2 - 802832a: d01d beq.n 8028368 - 802832c: 68fb ldr r3, [r7, #12] - 802832e: 681b ldr r3, [r3, #0] - 8028330: 4a25 ldr r2, [pc, #148] ; (80283c8 ) - 8028332: 4293 cmp r3, r2 - 8028334: d018 beq.n 8028368 - 8028336: 68fb ldr r3, [r7, #12] - 8028338: 681b ldr r3, [r3, #0] - 802833a: 4a24 ldr r2, [pc, #144] ; (80283cc ) - 802833c: 4293 cmp r3, r2 - 802833e: d013 beq.n 8028368 - 8028340: 68fb ldr r3, [r7, #12] - 8028342: 681b ldr r3, [r3, #0] - 8028344: 4a22 ldr r2, [pc, #136] ; (80283d0 ) - 8028346: 4293 cmp r3, r2 - 8028348: d00e beq.n 8028368 - 802834a: 68fb ldr r3, [r7, #12] - 802834c: 681b ldr r3, [r3, #0] - 802834e: 4a21 ldr r2, [pc, #132] ; (80283d4 ) - 8028350: 4293 cmp r3, r2 - 8028352: d009 beq.n 8028368 - 8028354: 68fb ldr r3, [r7, #12] - 8028356: 681b ldr r3, [r3, #0] - 8028358: 4a1f ldr r2, [pc, #124] ; (80283d8 ) - 802835a: 4293 cmp r3, r2 - 802835c: d004 beq.n 8028368 - 802835e: 68fb ldr r3, [r7, #12] - 8028360: 681b ldr r3, [r3, #0] - 8028362: 4a1e ldr r2, [pc, #120] ; (80283dc ) - 8028364: 4293 cmp r3, r2 - 8028366: d101 bne.n 802836c - 8028368: 2301 movs r3, #1 - 802836a: e000 b.n 802836e - 802836c: 2300 movs r3, #0 - 802836e: 2b00 cmp r3, #0 - 8028370: d036 beq.n 80283e0 + 80282f8: 68fb ldr r3, [r7, #12] + 80282fa: 681b ldr r3, [r3, #0] + 80282fc: 4a34 ldr r2, [pc, #208] ; (80283d0 ) + 80282fe: 4293 cmp r3, r2 + 8028300: d04a beq.n 8028398 + 8028302: 68fb ldr r3, [r7, #12] + 8028304: 681b ldr r3, [r3, #0] + 8028306: 4a33 ldr r2, [pc, #204] ; (80283d4 ) + 8028308: 4293 cmp r3, r2 + 802830a: d045 beq.n 8028398 + 802830c: 68fb ldr r3, [r7, #12] + 802830e: 681b ldr r3, [r3, #0] + 8028310: 4a31 ldr r2, [pc, #196] ; (80283d8 ) + 8028312: 4293 cmp r3, r2 + 8028314: d040 beq.n 8028398 + 8028316: 68fb ldr r3, [r7, #12] + 8028318: 681b ldr r3, [r3, #0] + 802831a: 4a30 ldr r2, [pc, #192] ; (80283dc ) + 802831c: 4293 cmp r3, r2 + 802831e: d03b beq.n 8028398 + 8028320: 68fb ldr r3, [r7, #12] + 8028322: 681b ldr r3, [r3, #0] + 8028324: 4a2e ldr r2, [pc, #184] ; (80283e0 ) + 8028326: 4293 cmp r3, r2 + 8028328: d036 beq.n 8028398 + 802832a: 68fb ldr r3, [r7, #12] + 802832c: 681b ldr r3, [r3, #0] + 802832e: 4a2d ldr r2, [pc, #180] ; (80283e4 ) + 8028330: 4293 cmp r3, r2 + 8028332: d031 beq.n 8028398 + 8028334: 68fb ldr r3, [r7, #12] + 8028336: 681b ldr r3, [r3, #0] + 8028338: 4a2b ldr r2, [pc, #172] ; (80283e8 ) + 802833a: 4293 cmp r3, r2 + 802833c: d02c beq.n 8028398 + 802833e: 68fb ldr r3, [r7, #12] + 8028340: 681b ldr r3, [r3, #0] + 8028342: 4a2a ldr r2, [pc, #168] ; (80283ec ) + 8028344: 4293 cmp r3, r2 + 8028346: d027 beq.n 8028398 + 8028348: 68fb ldr r3, [r7, #12] + 802834a: 681b ldr r3, [r3, #0] + 802834c: 4a28 ldr r2, [pc, #160] ; (80283f0 ) + 802834e: 4293 cmp r3, r2 + 8028350: d022 beq.n 8028398 + 8028352: 68fb ldr r3, [r7, #12] + 8028354: 681b ldr r3, [r3, #0] + 8028356: 4a27 ldr r2, [pc, #156] ; (80283f4 ) + 8028358: 4293 cmp r3, r2 + 802835a: d01d beq.n 8028398 + 802835c: 68fb ldr r3, [r7, #12] + 802835e: 681b ldr r3, [r3, #0] + 8028360: 4a25 ldr r2, [pc, #148] ; (80283f8 ) + 8028362: 4293 cmp r3, r2 + 8028364: d018 beq.n 8028398 + 8028366: 68fb ldr r3, [r7, #12] + 8028368: 681b ldr r3, [r3, #0] + 802836a: 4a24 ldr r2, [pc, #144] ; (80283fc ) + 802836c: 4293 cmp r3, r2 + 802836e: d013 beq.n 8028398 + 8028370: 68fb ldr r3, [r7, #12] + 8028372: 681b ldr r3, [r3, #0] + 8028374: 4a22 ldr r2, [pc, #136] ; (8028400 ) + 8028376: 4293 cmp r3, r2 + 8028378: d00e beq.n 8028398 + 802837a: 68fb ldr r3, [r7, #12] + 802837c: 681b ldr r3, [r3, #0] + 802837e: 4a21 ldr r2, [pc, #132] ; (8028404 ) + 8028380: 4293 cmp r3, r2 + 8028382: d009 beq.n 8028398 + 8028384: 68fb ldr r3, [r7, #12] + 8028386: 681b ldr r3, [r3, #0] + 8028388: 4a1f ldr r2, [pc, #124] ; (8028408 ) + 802838a: 4293 cmp r3, r2 + 802838c: d004 beq.n 8028398 + 802838e: 68fb ldr r3, [r7, #12] + 8028390: 681b ldr r3, [r3, #0] + 8028392: 4a1e ldr r2, [pc, #120] ; (802840c ) + 8028394: 4293 cmp r3, r2 + 8028396: d101 bne.n 802839c + 8028398: 2301 movs r3, #1 + 802839a: e000 b.n 802839e + 802839c: 2300 movs r3, #0 + 802839e: 2b00 cmp r3, #0 + 80283a0: d036 beq.n 8028410 { /* Enable Common interrupts*/ MODIFY_REG(((DMA_Stream_TypeDef *)hdma->Instance)->CR, (DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT), (DMA_IT_TC | DMA_IT_TE | DMA_IT_DME)); - 8028372: 68fb ldr r3, [r7, #12] - 8028374: 681b ldr r3, [r3, #0] - 8028376: 681b ldr r3, [r3, #0] - 8028378: f023 021e bic.w r2, r3, #30 - 802837c: 68fb ldr r3, [r7, #12] - 802837e: 681b ldr r3, [r3, #0] - 8028380: f042 0216 orr.w r2, r2, #22 - 8028384: 601a str r2, [r3, #0] + 80283a2: 68fb ldr r3, [r7, #12] + 80283a4: 681b ldr r3, [r3, #0] + 80283a6: 681b ldr r3, [r3, #0] + 80283a8: f023 021e bic.w r2, r3, #30 + 80283ac: 68fb ldr r3, [r7, #12] + 80283ae: 681b ldr r3, [r3, #0] + 80283b0: f042 0216 orr.w r2, r2, #22 + 80283b4: 601a str r2, [r3, #0] if(hdma->XferHalfCpltCallback != NULL) - 8028386: 68fb ldr r3, [r7, #12] - 8028388: 6c1b ldr r3, [r3, #64] ; 0x40 - 802838a: 2b00 cmp r3, #0 - 802838c: d03e beq.n 802840c + 80283b6: 68fb ldr r3, [r7, #12] + 80283b8: 6c1b ldr r3, [r3, #64] ; 0x40 + 80283ba: 2b00 cmp r3, #0 + 80283bc: d03e beq.n 802843c { /* Enable Half Transfer IT if corresponding Callback is set */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR |= DMA_IT_HT; - 802838e: 68fb ldr r3, [r7, #12] - 8028390: 681b ldr r3, [r3, #0] - 8028392: 681a ldr r2, [r3, #0] - 8028394: 68fb ldr r3, [r7, #12] - 8028396: 681b ldr r3, [r3, #0] - 8028398: f042 0208 orr.w r2, r2, #8 - 802839c: 601a str r2, [r3, #0] - 802839e: e035 b.n 802840c - 80283a0: 40020010 .word 0x40020010 - 80283a4: 40020028 .word 0x40020028 - 80283a8: 40020040 .word 0x40020040 - 80283ac: 40020058 .word 0x40020058 - 80283b0: 40020070 .word 0x40020070 - 80283b4: 40020088 .word 0x40020088 - 80283b8: 400200a0 .word 0x400200a0 - 80283bc: 400200b8 .word 0x400200b8 - 80283c0: 40020410 .word 0x40020410 - 80283c4: 40020428 .word 0x40020428 - 80283c8: 40020440 .word 0x40020440 - 80283cc: 40020458 .word 0x40020458 - 80283d0: 40020470 .word 0x40020470 - 80283d4: 40020488 .word 0x40020488 - 80283d8: 400204a0 .word 0x400204a0 - 80283dc: 400204b8 .word 0x400204b8 + 80283be: 68fb ldr r3, [r7, #12] + 80283c0: 681b ldr r3, [r3, #0] + 80283c2: 681a ldr r2, [r3, #0] + 80283c4: 68fb ldr r3, [r7, #12] + 80283c6: 681b ldr r3, [r3, #0] + 80283c8: f042 0208 orr.w r2, r2, #8 + 80283cc: 601a str r2, [r3, #0] + 80283ce: e035 b.n 802843c + 80283d0: 40020010 .word 0x40020010 + 80283d4: 40020028 .word 0x40020028 + 80283d8: 40020040 .word 0x40020040 + 80283dc: 40020058 .word 0x40020058 + 80283e0: 40020070 .word 0x40020070 + 80283e4: 40020088 .word 0x40020088 + 80283e8: 400200a0 .word 0x400200a0 + 80283ec: 400200b8 .word 0x400200b8 + 80283f0: 40020410 .word 0x40020410 + 80283f4: 40020428 .word 0x40020428 + 80283f8: 40020440 .word 0x40020440 + 80283fc: 40020458 .word 0x40020458 + 8028400: 40020470 .word 0x40020470 + 8028404: 40020488 .word 0x40020488 + 8028408: 400204a0 .word 0x400204a0 + 802840c: 400204b8 .word 0x400204b8 } } else /* BDMA channel */ { /* Enable Common interrupts */ MODIFY_REG(((BDMA_Channel_TypeDef *)hdma->Instance)->CCR, (BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE), (BDMA_CCR_TCIE | BDMA_CCR_TEIE)); - 80283e0: 68fb ldr r3, [r7, #12] - 80283e2: 681b ldr r3, [r3, #0] - 80283e4: 681b ldr r3, [r3, #0] - 80283e6: f023 020e bic.w r2, r3, #14 - 80283ea: 68fb ldr r3, [r7, #12] - 80283ec: 681b ldr r3, [r3, #0] - 80283ee: f042 020a orr.w r2, r2, #10 - 80283f2: 601a str r2, [r3, #0] + 8028410: 68fb ldr r3, [r7, #12] + 8028412: 681b ldr r3, [r3, #0] + 8028414: 681b ldr r3, [r3, #0] + 8028416: f023 020e bic.w r2, r3, #14 + 802841a: 68fb ldr r3, [r7, #12] + 802841c: 681b ldr r3, [r3, #0] + 802841e: f042 020a orr.w r2, r2, #10 + 8028422: 601a str r2, [r3, #0] if(hdma->XferHalfCpltCallback != NULL) - 80283f4: 68fb ldr r3, [r7, #12] - 80283f6: 6c1b ldr r3, [r3, #64] ; 0x40 - 80283f8: 2b00 cmp r3, #0 - 80283fa: d007 beq.n 802840c + 8028424: 68fb ldr r3, [r7, #12] + 8028426: 6c1b ldr r3, [r3, #64] ; 0x40 + 8028428: 2b00 cmp r3, #0 + 802842a: d007 beq.n 802843c { /*Enable Half Transfer IT if corresponding Callback is set */ ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR |= BDMA_CCR_HTIE; - 80283fc: 68fb ldr r3, [r7, #12] - 80283fe: 681b ldr r3, [r3, #0] - 8028400: 681a ldr r2, [r3, #0] - 8028402: 68fb ldr r3, [r7, #12] - 8028404: 681b ldr r3, [r3, #0] - 8028406: f042 0204 orr.w r2, r2, #4 - 802840a: 601a str r2, [r3, #0] + 802842c: 68fb ldr r3, [r7, #12] + 802842e: 681b ldr r3, [r3, #0] + 8028430: 681a ldr r2, [r3, #0] + 8028432: 68fb ldr r3, [r7, #12] + 8028434: 681b ldr r3, [r3, #0] + 8028436: f042 0204 orr.w r2, r2, #4 + 802843a: 601a str r2, [r3, #0] } } if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 802840c: 68fb ldr r3, [r7, #12] - 802840e: 681b ldr r3, [r3, #0] - 8028410: 4a83 ldr r2, [pc, #524] ; (8028620 ) - 8028412: 4293 cmp r3, r2 - 8028414: d072 beq.n 80284fc - 8028416: 68fb ldr r3, [r7, #12] - 8028418: 681b ldr r3, [r3, #0] - 802841a: 4a82 ldr r2, [pc, #520] ; (8028624 ) - 802841c: 4293 cmp r3, r2 - 802841e: d06d beq.n 80284fc - 8028420: 68fb ldr r3, [r7, #12] - 8028422: 681b ldr r3, [r3, #0] - 8028424: 4a80 ldr r2, [pc, #512] ; (8028628 ) - 8028426: 4293 cmp r3, r2 - 8028428: d068 beq.n 80284fc - 802842a: 68fb ldr r3, [r7, #12] - 802842c: 681b ldr r3, [r3, #0] - 802842e: 4a7f ldr r2, [pc, #508] ; (802862c ) - 8028430: 4293 cmp r3, r2 - 8028432: d063 beq.n 80284fc - 8028434: 68fb ldr r3, [r7, #12] - 8028436: 681b ldr r3, [r3, #0] - 8028438: 4a7d ldr r2, [pc, #500] ; (8028630 ) - 802843a: 4293 cmp r3, r2 - 802843c: d05e beq.n 80284fc - 802843e: 68fb ldr r3, [r7, #12] - 8028440: 681b ldr r3, [r3, #0] - 8028442: 4a7c ldr r2, [pc, #496] ; (8028634 ) - 8028444: 4293 cmp r3, r2 - 8028446: d059 beq.n 80284fc - 8028448: 68fb ldr r3, [r7, #12] - 802844a: 681b ldr r3, [r3, #0] - 802844c: 4a7a ldr r2, [pc, #488] ; (8028638 ) - 802844e: 4293 cmp r3, r2 - 8028450: d054 beq.n 80284fc - 8028452: 68fb ldr r3, [r7, #12] - 8028454: 681b ldr r3, [r3, #0] - 8028456: 4a79 ldr r2, [pc, #484] ; (802863c ) - 8028458: 4293 cmp r3, r2 - 802845a: d04f beq.n 80284fc - 802845c: 68fb ldr r3, [r7, #12] - 802845e: 681b ldr r3, [r3, #0] - 8028460: 4a77 ldr r2, [pc, #476] ; (8028640 ) - 8028462: 4293 cmp r3, r2 - 8028464: d04a beq.n 80284fc - 8028466: 68fb ldr r3, [r7, #12] - 8028468: 681b ldr r3, [r3, #0] - 802846a: 4a76 ldr r2, [pc, #472] ; (8028644 ) - 802846c: 4293 cmp r3, r2 - 802846e: d045 beq.n 80284fc - 8028470: 68fb ldr r3, [r7, #12] - 8028472: 681b ldr r3, [r3, #0] - 8028474: 4a74 ldr r2, [pc, #464] ; (8028648 ) - 8028476: 4293 cmp r3, r2 - 8028478: d040 beq.n 80284fc - 802847a: 68fb ldr r3, [r7, #12] - 802847c: 681b ldr r3, [r3, #0] - 802847e: 4a73 ldr r2, [pc, #460] ; (802864c ) - 8028480: 4293 cmp r3, r2 - 8028482: d03b beq.n 80284fc - 8028484: 68fb ldr r3, [r7, #12] - 8028486: 681b ldr r3, [r3, #0] - 8028488: 4a71 ldr r2, [pc, #452] ; (8028650 ) - 802848a: 4293 cmp r3, r2 - 802848c: d036 beq.n 80284fc - 802848e: 68fb ldr r3, [r7, #12] - 8028490: 681b ldr r3, [r3, #0] - 8028492: 4a70 ldr r2, [pc, #448] ; (8028654 ) - 8028494: 4293 cmp r3, r2 - 8028496: d031 beq.n 80284fc - 8028498: 68fb ldr r3, [r7, #12] - 802849a: 681b ldr r3, [r3, #0] - 802849c: 4a6e ldr r2, [pc, #440] ; (8028658 ) - 802849e: 4293 cmp r3, r2 - 80284a0: d02c beq.n 80284fc - 80284a2: 68fb ldr r3, [r7, #12] - 80284a4: 681b ldr r3, [r3, #0] - 80284a6: 4a6d ldr r2, [pc, #436] ; (802865c ) - 80284a8: 4293 cmp r3, r2 - 80284aa: d027 beq.n 80284fc - 80284ac: 68fb ldr r3, [r7, #12] - 80284ae: 681b ldr r3, [r3, #0] - 80284b0: 4a6b ldr r2, [pc, #428] ; (8028660 ) - 80284b2: 4293 cmp r3, r2 - 80284b4: d022 beq.n 80284fc - 80284b6: 68fb ldr r3, [r7, #12] - 80284b8: 681b ldr r3, [r3, #0] - 80284ba: 4a6a ldr r2, [pc, #424] ; (8028664 ) - 80284bc: 4293 cmp r3, r2 - 80284be: d01d beq.n 80284fc - 80284c0: 68fb ldr r3, [r7, #12] - 80284c2: 681b ldr r3, [r3, #0] - 80284c4: 4a68 ldr r2, [pc, #416] ; (8028668 ) - 80284c6: 4293 cmp r3, r2 - 80284c8: d018 beq.n 80284fc - 80284ca: 68fb ldr r3, [r7, #12] - 80284cc: 681b ldr r3, [r3, #0] - 80284ce: 4a67 ldr r2, [pc, #412] ; (802866c ) - 80284d0: 4293 cmp r3, r2 - 80284d2: d013 beq.n 80284fc - 80284d4: 68fb ldr r3, [r7, #12] - 80284d6: 681b ldr r3, [r3, #0] - 80284d8: 4a65 ldr r2, [pc, #404] ; (8028670 ) - 80284da: 4293 cmp r3, r2 - 80284dc: d00e beq.n 80284fc - 80284de: 68fb ldr r3, [r7, #12] - 80284e0: 681b ldr r3, [r3, #0] - 80284e2: 4a64 ldr r2, [pc, #400] ; (8028674 ) - 80284e4: 4293 cmp r3, r2 - 80284e6: d009 beq.n 80284fc - 80284e8: 68fb ldr r3, [r7, #12] - 80284ea: 681b ldr r3, [r3, #0] - 80284ec: 4a62 ldr r2, [pc, #392] ; (8028678 ) - 80284ee: 4293 cmp r3, r2 - 80284f0: d004 beq.n 80284fc - 80284f2: 68fb ldr r3, [r7, #12] - 80284f4: 681b ldr r3, [r3, #0] - 80284f6: 4a61 ldr r2, [pc, #388] ; (802867c ) - 80284f8: 4293 cmp r3, r2 - 80284fa: d101 bne.n 8028500 - 80284fc: 2301 movs r3, #1 - 80284fe: e000 b.n 8028502 - 8028500: 2300 movs r3, #0 - 8028502: 2b00 cmp r3, #0 - 8028504: d01a beq.n 802853c + 802843c: 68fb ldr r3, [r7, #12] + 802843e: 681b ldr r3, [r3, #0] + 8028440: 4a83 ldr r2, [pc, #524] ; (8028650 ) + 8028442: 4293 cmp r3, r2 + 8028444: d072 beq.n 802852c + 8028446: 68fb ldr r3, [r7, #12] + 8028448: 681b ldr r3, [r3, #0] + 802844a: 4a82 ldr r2, [pc, #520] ; (8028654 ) + 802844c: 4293 cmp r3, r2 + 802844e: d06d beq.n 802852c + 8028450: 68fb ldr r3, [r7, #12] + 8028452: 681b ldr r3, [r3, #0] + 8028454: 4a80 ldr r2, [pc, #512] ; (8028658 ) + 8028456: 4293 cmp r3, r2 + 8028458: d068 beq.n 802852c + 802845a: 68fb ldr r3, [r7, #12] + 802845c: 681b ldr r3, [r3, #0] + 802845e: 4a7f ldr r2, [pc, #508] ; (802865c ) + 8028460: 4293 cmp r3, r2 + 8028462: d063 beq.n 802852c + 8028464: 68fb ldr r3, [r7, #12] + 8028466: 681b ldr r3, [r3, #0] + 8028468: 4a7d ldr r2, [pc, #500] ; (8028660 ) + 802846a: 4293 cmp r3, r2 + 802846c: d05e beq.n 802852c + 802846e: 68fb ldr r3, [r7, #12] + 8028470: 681b ldr r3, [r3, #0] + 8028472: 4a7c ldr r2, [pc, #496] ; (8028664 ) + 8028474: 4293 cmp r3, r2 + 8028476: d059 beq.n 802852c + 8028478: 68fb ldr r3, [r7, #12] + 802847a: 681b ldr r3, [r3, #0] + 802847c: 4a7a ldr r2, [pc, #488] ; (8028668 ) + 802847e: 4293 cmp r3, r2 + 8028480: d054 beq.n 802852c + 8028482: 68fb ldr r3, [r7, #12] + 8028484: 681b ldr r3, [r3, #0] + 8028486: 4a79 ldr r2, [pc, #484] ; (802866c ) + 8028488: 4293 cmp r3, r2 + 802848a: d04f beq.n 802852c + 802848c: 68fb ldr r3, [r7, #12] + 802848e: 681b ldr r3, [r3, #0] + 8028490: 4a77 ldr r2, [pc, #476] ; (8028670 ) + 8028492: 4293 cmp r3, r2 + 8028494: d04a beq.n 802852c + 8028496: 68fb ldr r3, [r7, #12] + 8028498: 681b ldr r3, [r3, #0] + 802849a: 4a76 ldr r2, [pc, #472] ; (8028674 ) + 802849c: 4293 cmp r3, r2 + 802849e: d045 beq.n 802852c + 80284a0: 68fb ldr r3, [r7, #12] + 80284a2: 681b ldr r3, [r3, #0] + 80284a4: 4a74 ldr r2, [pc, #464] ; (8028678 ) + 80284a6: 4293 cmp r3, r2 + 80284a8: d040 beq.n 802852c + 80284aa: 68fb ldr r3, [r7, #12] + 80284ac: 681b ldr r3, [r3, #0] + 80284ae: 4a73 ldr r2, [pc, #460] ; (802867c ) + 80284b0: 4293 cmp r3, r2 + 80284b2: d03b beq.n 802852c + 80284b4: 68fb ldr r3, [r7, #12] + 80284b6: 681b ldr r3, [r3, #0] + 80284b8: 4a71 ldr r2, [pc, #452] ; (8028680 ) + 80284ba: 4293 cmp r3, r2 + 80284bc: d036 beq.n 802852c + 80284be: 68fb ldr r3, [r7, #12] + 80284c0: 681b ldr r3, [r3, #0] + 80284c2: 4a70 ldr r2, [pc, #448] ; (8028684 ) + 80284c4: 4293 cmp r3, r2 + 80284c6: d031 beq.n 802852c + 80284c8: 68fb ldr r3, [r7, #12] + 80284ca: 681b ldr r3, [r3, #0] + 80284cc: 4a6e ldr r2, [pc, #440] ; (8028688 ) + 80284ce: 4293 cmp r3, r2 + 80284d0: d02c beq.n 802852c + 80284d2: 68fb ldr r3, [r7, #12] + 80284d4: 681b ldr r3, [r3, #0] + 80284d6: 4a6d ldr r2, [pc, #436] ; (802868c ) + 80284d8: 4293 cmp r3, r2 + 80284da: d027 beq.n 802852c + 80284dc: 68fb ldr r3, [r7, #12] + 80284de: 681b ldr r3, [r3, #0] + 80284e0: 4a6b ldr r2, [pc, #428] ; (8028690 ) + 80284e2: 4293 cmp r3, r2 + 80284e4: d022 beq.n 802852c + 80284e6: 68fb ldr r3, [r7, #12] + 80284e8: 681b ldr r3, [r3, #0] + 80284ea: 4a6a ldr r2, [pc, #424] ; (8028694 ) + 80284ec: 4293 cmp r3, r2 + 80284ee: d01d beq.n 802852c + 80284f0: 68fb ldr r3, [r7, #12] + 80284f2: 681b ldr r3, [r3, #0] + 80284f4: 4a68 ldr r2, [pc, #416] ; (8028698 ) + 80284f6: 4293 cmp r3, r2 + 80284f8: d018 beq.n 802852c + 80284fa: 68fb ldr r3, [r7, #12] + 80284fc: 681b ldr r3, [r3, #0] + 80284fe: 4a67 ldr r2, [pc, #412] ; (802869c ) + 8028500: 4293 cmp r3, r2 + 8028502: d013 beq.n 802852c + 8028504: 68fb ldr r3, [r7, #12] + 8028506: 681b ldr r3, [r3, #0] + 8028508: 4a65 ldr r2, [pc, #404] ; (80286a0 ) + 802850a: 4293 cmp r3, r2 + 802850c: d00e beq.n 802852c + 802850e: 68fb ldr r3, [r7, #12] + 8028510: 681b ldr r3, [r3, #0] + 8028512: 4a64 ldr r2, [pc, #400] ; (80286a4 ) + 8028514: 4293 cmp r3, r2 + 8028516: d009 beq.n 802852c + 8028518: 68fb ldr r3, [r7, #12] + 802851a: 681b ldr r3, [r3, #0] + 802851c: 4a62 ldr r2, [pc, #392] ; (80286a8 ) + 802851e: 4293 cmp r3, r2 + 8028520: d004 beq.n 802852c + 8028522: 68fb ldr r3, [r7, #12] + 8028524: 681b ldr r3, [r3, #0] + 8028526: 4a61 ldr r2, [pc, #388] ; (80286ac ) + 8028528: 4293 cmp r3, r2 + 802852a: d101 bne.n 8028530 + 802852c: 2301 movs r3, #1 + 802852e: e000 b.n 8028532 + 8028530: 2300 movs r3, #0 + 8028532: 2b00 cmp r3, #0 + 8028534: d01a beq.n 802856c { /* Check if DMAMUX Synchronization is enabled */ if((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U) - 8028506: 68fb ldr r3, [r7, #12] - 8028508: 6e1b ldr r3, [r3, #96] ; 0x60 - 802850a: 681b ldr r3, [r3, #0] - 802850c: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8028510: 2b00 cmp r3, #0 - 8028512: d007 beq.n 8028524 + 8028536: 68fb ldr r3, [r7, #12] + 8028538: 6e1b ldr r3, [r3, #96] ; 0x60 + 802853a: 681b ldr r3, [r3, #0] + 802853c: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8028540: 2b00 cmp r3, #0 + 8028542: d007 beq.n 8028554 { /* Enable DMAMUX sync overrun IT*/ hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE; - 8028514: 68fb ldr r3, [r7, #12] - 8028516: 6e1b ldr r3, [r3, #96] ; 0x60 - 8028518: 681a ldr r2, [r3, #0] - 802851a: 68fb ldr r3, [r7, #12] - 802851c: 6e1b ldr r3, [r3, #96] ; 0x60 - 802851e: f442 7280 orr.w r2, r2, #256 ; 0x100 - 8028522: 601a str r2, [r3, #0] + 8028544: 68fb ldr r3, [r7, #12] + 8028546: 6e1b ldr r3, [r3, #96] ; 0x60 + 8028548: 681a ldr r2, [r3, #0] + 802854a: 68fb ldr r3, [r7, #12] + 802854c: 6e1b ldr r3, [r3, #96] ; 0x60 + 802854e: f442 7280 orr.w r2, r2, #256 ; 0x100 + 8028552: 601a str r2, [r3, #0] } if(hdma->DMAmuxRequestGen != 0U) - 8028524: 68fb ldr r3, [r7, #12] - 8028526: 6edb ldr r3, [r3, #108] ; 0x6c - 8028528: 2b00 cmp r3, #0 - 802852a: d007 beq.n 802853c + 8028554: 68fb ldr r3, [r7, #12] + 8028556: 6edb ldr r3, [r3, #108] ; 0x6c + 8028558: 2b00 cmp r3, #0 + 802855a: d007 beq.n 802856c { /* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/ /* enable the request gen overrun IT */ hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; - 802852c: 68fb ldr r3, [r7, #12] - 802852e: 6edb ldr r3, [r3, #108] ; 0x6c - 8028530: 681a ldr r2, [r3, #0] - 8028532: 68fb ldr r3, [r7, #12] - 8028534: 6edb ldr r3, [r3, #108] ; 0x6c - 8028536: f442 7280 orr.w r2, r2, #256 ; 0x100 - 802853a: 601a str r2, [r3, #0] + 802855c: 68fb ldr r3, [r7, #12] + 802855e: 6edb ldr r3, [r3, #108] ; 0x6c + 8028560: 681a ldr r2, [r3, #0] + 8028562: 68fb ldr r3, [r7, #12] + 8028564: 6edb ldr r3, [r3, #108] ; 0x6c + 8028566: f442 7280 orr.w r2, r2, #256 ; 0x100 + 802856a: 601a str r2, [r3, #0] } } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); - 802853c: 68fb ldr r3, [r7, #12] - 802853e: 681b ldr r3, [r3, #0] - 8028540: 4a37 ldr r2, [pc, #220] ; (8028620 ) - 8028542: 4293 cmp r3, r2 - 8028544: d04a beq.n 80285dc - 8028546: 68fb ldr r3, [r7, #12] - 8028548: 681b ldr r3, [r3, #0] - 802854a: 4a36 ldr r2, [pc, #216] ; (8028624 ) - 802854c: 4293 cmp r3, r2 - 802854e: d045 beq.n 80285dc - 8028550: 68fb ldr r3, [r7, #12] - 8028552: 681b ldr r3, [r3, #0] - 8028554: 4a34 ldr r2, [pc, #208] ; (8028628 ) - 8028556: 4293 cmp r3, r2 - 8028558: d040 beq.n 80285dc - 802855a: 68fb ldr r3, [r7, #12] - 802855c: 681b ldr r3, [r3, #0] - 802855e: 4a33 ldr r2, [pc, #204] ; (802862c ) - 8028560: 4293 cmp r3, r2 - 8028562: d03b beq.n 80285dc - 8028564: 68fb ldr r3, [r7, #12] - 8028566: 681b ldr r3, [r3, #0] - 8028568: 4a31 ldr r2, [pc, #196] ; (8028630 ) - 802856a: 4293 cmp r3, r2 - 802856c: d036 beq.n 80285dc - 802856e: 68fb ldr r3, [r7, #12] - 8028570: 681b ldr r3, [r3, #0] - 8028572: 4a30 ldr r2, [pc, #192] ; (8028634 ) - 8028574: 4293 cmp r3, r2 - 8028576: d031 beq.n 80285dc - 8028578: 68fb ldr r3, [r7, #12] - 802857a: 681b ldr r3, [r3, #0] - 802857c: 4a2e ldr r2, [pc, #184] ; (8028638 ) - 802857e: 4293 cmp r3, r2 - 8028580: d02c beq.n 80285dc - 8028582: 68fb ldr r3, [r7, #12] - 8028584: 681b ldr r3, [r3, #0] - 8028586: 4a2d ldr r2, [pc, #180] ; (802863c ) - 8028588: 4293 cmp r3, r2 - 802858a: d027 beq.n 80285dc - 802858c: 68fb ldr r3, [r7, #12] - 802858e: 681b ldr r3, [r3, #0] - 8028590: 4a2b ldr r2, [pc, #172] ; (8028640 ) - 8028592: 4293 cmp r3, r2 - 8028594: d022 beq.n 80285dc - 8028596: 68fb ldr r3, [r7, #12] - 8028598: 681b ldr r3, [r3, #0] - 802859a: 4a2a ldr r2, [pc, #168] ; (8028644 ) - 802859c: 4293 cmp r3, r2 - 802859e: d01d beq.n 80285dc - 80285a0: 68fb ldr r3, [r7, #12] - 80285a2: 681b ldr r3, [r3, #0] - 80285a4: 4a28 ldr r2, [pc, #160] ; (8028648 ) - 80285a6: 4293 cmp r3, r2 - 80285a8: d018 beq.n 80285dc - 80285aa: 68fb ldr r3, [r7, #12] - 80285ac: 681b ldr r3, [r3, #0] - 80285ae: 4a27 ldr r2, [pc, #156] ; (802864c ) - 80285b0: 4293 cmp r3, r2 - 80285b2: d013 beq.n 80285dc - 80285b4: 68fb ldr r3, [r7, #12] - 80285b6: 681b ldr r3, [r3, #0] - 80285b8: 4a25 ldr r2, [pc, #148] ; (8028650 ) - 80285ba: 4293 cmp r3, r2 - 80285bc: d00e beq.n 80285dc - 80285be: 68fb ldr r3, [r7, #12] - 80285c0: 681b ldr r3, [r3, #0] - 80285c2: 4a24 ldr r2, [pc, #144] ; (8028654 ) - 80285c4: 4293 cmp r3, r2 - 80285c6: d009 beq.n 80285dc - 80285c8: 68fb ldr r3, [r7, #12] - 80285ca: 681b ldr r3, [r3, #0] - 80285cc: 4a22 ldr r2, [pc, #136] ; (8028658 ) - 80285ce: 4293 cmp r3, r2 - 80285d0: d004 beq.n 80285dc - 80285d2: 68fb ldr r3, [r7, #12] - 80285d4: 681b ldr r3, [r3, #0] - 80285d6: 4a21 ldr r2, [pc, #132] ; (802865c ) - 80285d8: 4293 cmp r3, r2 - 80285da: d108 bne.n 80285ee - 80285dc: 68fb ldr r3, [r7, #12] - 80285de: 681b ldr r3, [r3, #0] - 80285e0: 681a ldr r2, [r3, #0] - 80285e2: 68fb ldr r3, [r7, #12] - 80285e4: 681b ldr r3, [r3, #0] - 80285e6: f042 0201 orr.w r2, r2, #1 - 80285ea: 601a str r2, [r3, #0] - 80285ec: e012 b.n 8028614 + 802856c: 68fb ldr r3, [r7, #12] + 802856e: 681b ldr r3, [r3, #0] + 8028570: 4a37 ldr r2, [pc, #220] ; (8028650 ) + 8028572: 4293 cmp r3, r2 + 8028574: d04a beq.n 802860c + 8028576: 68fb ldr r3, [r7, #12] + 8028578: 681b ldr r3, [r3, #0] + 802857a: 4a36 ldr r2, [pc, #216] ; (8028654 ) + 802857c: 4293 cmp r3, r2 + 802857e: d045 beq.n 802860c + 8028580: 68fb ldr r3, [r7, #12] + 8028582: 681b ldr r3, [r3, #0] + 8028584: 4a34 ldr r2, [pc, #208] ; (8028658 ) + 8028586: 4293 cmp r3, r2 + 8028588: d040 beq.n 802860c + 802858a: 68fb ldr r3, [r7, #12] + 802858c: 681b ldr r3, [r3, #0] + 802858e: 4a33 ldr r2, [pc, #204] ; (802865c ) + 8028590: 4293 cmp r3, r2 + 8028592: d03b beq.n 802860c + 8028594: 68fb ldr r3, [r7, #12] + 8028596: 681b ldr r3, [r3, #0] + 8028598: 4a31 ldr r2, [pc, #196] ; (8028660 ) + 802859a: 4293 cmp r3, r2 + 802859c: d036 beq.n 802860c + 802859e: 68fb ldr r3, [r7, #12] + 80285a0: 681b ldr r3, [r3, #0] + 80285a2: 4a30 ldr r2, [pc, #192] ; (8028664 ) + 80285a4: 4293 cmp r3, r2 + 80285a6: d031 beq.n 802860c + 80285a8: 68fb ldr r3, [r7, #12] + 80285aa: 681b ldr r3, [r3, #0] + 80285ac: 4a2e ldr r2, [pc, #184] ; (8028668 ) + 80285ae: 4293 cmp r3, r2 + 80285b0: d02c beq.n 802860c + 80285b2: 68fb ldr r3, [r7, #12] + 80285b4: 681b ldr r3, [r3, #0] + 80285b6: 4a2d ldr r2, [pc, #180] ; (802866c ) + 80285b8: 4293 cmp r3, r2 + 80285ba: d027 beq.n 802860c + 80285bc: 68fb ldr r3, [r7, #12] + 80285be: 681b ldr r3, [r3, #0] + 80285c0: 4a2b ldr r2, [pc, #172] ; (8028670 ) + 80285c2: 4293 cmp r3, r2 + 80285c4: d022 beq.n 802860c + 80285c6: 68fb ldr r3, [r7, #12] + 80285c8: 681b ldr r3, [r3, #0] + 80285ca: 4a2a ldr r2, [pc, #168] ; (8028674 ) + 80285cc: 4293 cmp r3, r2 + 80285ce: d01d beq.n 802860c + 80285d0: 68fb ldr r3, [r7, #12] + 80285d2: 681b ldr r3, [r3, #0] + 80285d4: 4a28 ldr r2, [pc, #160] ; (8028678 ) + 80285d6: 4293 cmp r3, r2 + 80285d8: d018 beq.n 802860c + 80285da: 68fb ldr r3, [r7, #12] + 80285dc: 681b ldr r3, [r3, #0] + 80285de: 4a27 ldr r2, [pc, #156] ; (802867c ) + 80285e0: 4293 cmp r3, r2 + 80285e2: d013 beq.n 802860c + 80285e4: 68fb ldr r3, [r7, #12] + 80285e6: 681b ldr r3, [r3, #0] + 80285e8: 4a25 ldr r2, [pc, #148] ; (8028680 ) + 80285ea: 4293 cmp r3, r2 + 80285ec: d00e beq.n 802860c 80285ee: 68fb ldr r3, [r7, #12] 80285f0: 681b ldr r3, [r3, #0] - 80285f2: 681a ldr r2, [r3, #0] - 80285f4: 68fb ldr r3, [r7, #12] - 80285f6: 681b ldr r3, [r3, #0] - 80285f8: f042 0201 orr.w r2, r2, #1 - 80285fc: 601a str r2, [r3, #0] - 80285fe: e009 b.n 8028614 + 80285f2: 4a24 ldr r2, [pc, #144] ; (8028684 ) + 80285f4: 4293 cmp r3, r2 + 80285f6: d009 beq.n 802860c + 80285f8: 68fb ldr r3, [r7, #12] + 80285fa: 681b ldr r3, [r3, #0] + 80285fc: 4a22 ldr r2, [pc, #136] ; (8028688 ) + 80285fe: 4293 cmp r3, r2 + 8028600: d004 beq.n 802860c + 8028602: 68fb ldr r3, [r7, #12] + 8028604: 681b ldr r3, [r3, #0] + 8028606: 4a21 ldr r2, [pc, #132] ; (802868c ) + 8028608: 4293 cmp r3, r2 + 802860a: d108 bne.n 802861e + 802860c: 68fb ldr r3, [r7, #12] + 802860e: 681b ldr r3, [r3, #0] + 8028610: 681a ldr r2, [r3, #0] + 8028612: 68fb ldr r3, [r7, #12] + 8028614: 681b ldr r3, [r3, #0] + 8028616: f042 0201 orr.w r2, r2, #1 + 802861a: 601a str r2, [r3, #0] + 802861c: e012 b.n 8028644 + 802861e: 68fb ldr r3, [r7, #12] + 8028620: 681b ldr r3, [r3, #0] + 8028622: 681a ldr r2, [r3, #0] + 8028624: 68fb ldr r3, [r7, #12] + 8028626: 681b ldr r3, [r3, #0] + 8028628: f042 0201 orr.w r2, r2, #1 + 802862c: 601a str r2, [r3, #0] + 802862e: e009 b.n 8028644 } else { /* Set the error code to busy */ hdma->ErrorCode = HAL_DMA_ERROR_BUSY; - 8028600: 68fb ldr r3, [r7, #12] - 8028602: f44f 6200 mov.w r2, #2048 ; 0x800 - 8028606: 655a str r2, [r3, #84] ; 0x54 + 8028630: 68fb ldr r3, [r7, #12] + 8028632: f44f 6200 mov.w r2, #2048 ; 0x800 + 8028636: 655a str r2, [r3, #84] ; 0x54 /* Process unlocked */ __HAL_UNLOCK(hdma); - 8028608: 68fb ldr r3, [r7, #12] - 802860a: 2200 movs r2, #0 - 802860c: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8028638: 68fb ldr r3, [r7, #12] + 802863a: 2200 movs r2, #0 + 802863c: f883 2034 strb.w r2, [r3, #52] ; 0x34 /* Return error status */ status = HAL_ERROR; - 8028610: 2301 movs r3, #1 - 8028612: 75fb strb r3, [r7, #23] + 8028640: 2301 movs r3, #1 + 8028642: 75fb strb r3, [r7, #23] } return status; - 8028614: 7dfb ldrb r3, [r7, #23] -} - 8028616: 4618 mov r0, r3 - 8028618: 3718 adds r7, #24 - 802861a: 46bd mov sp, r7 - 802861c: bd80 pop {r7, pc} - 802861e: bf00 nop - 8028620: 40020010 .word 0x40020010 - 8028624: 40020028 .word 0x40020028 - 8028628: 40020040 .word 0x40020040 - 802862c: 40020058 .word 0x40020058 - 8028630: 40020070 .word 0x40020070 - 8028634: 40020088 .word 0x40020088 - 8028638: 400200a0 .word 0x400200a0 - 802863c: 400200b8 .word 0x400200b8 - 8028640: 40020410 .word 0x40020410 - 8028644: 40020428 .word 0x40020428 - 8028648: 40020440 .word 0x40020440 - 802864c: 40020458 .word 0x40020458 - 8028650: 40020470 .word 0x40020470 - 8028654: 40020488 .word 0x40020488 - 8028658: 400204a0 .word 0x400204a0 - 802865c: 400204b8 .word 0x400204b8 - 8028660: 58025408 .word 0x58025408 - 8028664: 5802541c .word 0x5802541c - 8028668: 58025430 .word 0x58025430 - 802866c: 58025444 .word 0x58025444 - 8028670: 58025458 .word 0x58025458 - 8028674: 5802546c .word 0x5802546c - 8028678: 58025480 .word 0x58025480 - 802867c: 58025494 .word 0x58025494 - -08028680 : + 8028644: 7dfb ldrb r3, [r7, #23] +} + 8028646: 4618 mov r0, r3 + 8028648: 3718 adds r7, #24 + 802864a: 46bd mov sp, r7 + 802864c: bd80 pop {r7, pc} + 802864e: bf00 nop + 8028650: 40020010 .word 0x40020010 + 8028654: 40020028 .word 0x40020028 + 8028658: 40020040 .word 0x40020040 + 802865c: 40020058 .word 0x40020058 + 8028660: 40020070 .word 0x40020070 + 8028664: 40020088 .word 0x40020088 + 8028668: 400200a0 .word 0x400200a0 + 802866c: 400200b8 .word 0x400200b8 + 8028670: 40020410 .word 0x40020410 + 8028674: 40020428 .word 0x40020428 + 8028678: 40020440 .word 0x40020440 + 802867c: 40020458 .word 0x40020458 + 8028680: 40020470 .word 0x40020470 + 8028684: 40020488 .word 0x40020488 + 8028688: 400204a0 .word 0x400204a0 + 802868c: 400204b8 .word 0x400204b8 + 8028690: 58025408 .word 0x58025408 + 8028694: 5802541c .word 0x5802541c + 8028698: 58025430 .word 0x58025430 + 802869c: 58025444 .word 0x58025444 + 80286a0: 58025458 .word 0x58025458 + 80286a4: 5802546c .word 0x5802546c + 80286a8: 58025480 .word 0x58025480 + 80286ac: 58025494 .word 0x58025494 + +080286b0 : * and the Stream will be effectively disabled only after the transfer of * this single data is finished. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { - 8028680: b580 push {r7, lr} - 8028682: b086 sub sp, #24 - 8028684: af00 add r7, sp, #0 - 8028686: 6078 str r0, [r7, #4] + 80286b0: b580 push {r7, lr} + 80286b2: b086 sub sp, #24 + 80286b4: af00 add r7, sp, #0 + 80286b6: 6078 str r0, [r7, #4] /* calculate DMA base and stream number */ DMA_Base_Registers *regs_dma; BDMA_Base_Registers *regs_bdma; const __IO uint32_t *enableRegister; uint32_t tickstart = HAL_GetTick(); - 8028688: f7fd fc84 bl 8025f94 - 802868c: 6138 str r0, [r7, #16] + 80286b8: f7fd fc84 bl 8025fc4 + 80286bc: 6138 str r0, [r7, #16] /* Check the DMA peripheral handle */ if(hdma == NULL) - 802868e: 687b ldr r3, [r7, #4] - 8028690: 2b00 cmp r3, #0 - 8028692: d101 bne.n 8028698 + 80286be: 687b ldr r3, [r7, #4] + 80286c0: 2b00 cmp r3, #0 + 80286c2: d101 bne.n 80286c8 { return HAL_ERROR; - 8028694: 2301 movs r3, #1 - 8028696: e2dc b.n 8028c52 + 80286c4: 2301 movs r3, #1 + 80286c6: e2dc b.n 8028c82 } /* Check the DMA peripheral state */ if(hdma->State != HAL_DMA_STATE_BUSY) - 8028698: 687b ldr r3, [r7, #4] - 802869a: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 802869e: b2db uxtb r3, r3 - 80286a0: 2b02 cmp r3, #2 - 80286a2: d008 beq.n 80286b6 + 80286c8: 687b ldr r3, [r7, #4] + 80286ca: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 80286ce: b2db uxtb r3, r3 + 80286d0: 2b02 cmp r3, #2 + 80286d2: d008 beq.n 80286e6 { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 80286a4: 687b ldr r3, [r7, #4] - 80286a6: 2280 movs r2, #128 ; 0x80 - 80286a8: 655a str r2, [r3, #84] ; 0x54 + 80286d4: 687b ldr r3, [r7, #4] + 80286d6: 2280 movs r2, #128 ; 0x80 + 80286d8: 655a str r2, [r3, #84] ; 0x54 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80286aa: 687b ldr r3, [r7, #4] - 80286ac: 2200 movs r2, #0 - 80286ae: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 80286da: 687b ldr r3, [r7, #4] + 80286dc: 2200 movs r2, #0 + 80286de: f883 2034 strb.w r2, [r3, #52] ; 0x34 return HAL_ERROR; - 80286b2: 2301 movs r3, #1 - 80286b4: e2cd b.n 8028c52 + 80286e2: 2301 movs r3, #1 + 80286e4: e2cd b.n 8028c82 } else { /* Disable all the transfer interrupts */ if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 80286b6: 687b ldr r3, [r7, #4] - 80286b8: 681b ldr r3, [r3, #0] - 80286ba: 4a76 ldr r2, [pc, #472] ; (8028894 ) - 80286bc: 4293 cmp r3, r2 - 80286be: d04a beq.n 8028756 - 80286c0: 687b ldr r3, [r7, #4] - 80286c2: 681b ldr r3, [r3, #0] - 80286c4: 4a74 ldr r2, [pc, #464] ; (8028898 ) - 80286c6: 4293 cmp r3, r2 - 80286c8: d045 beq.n 8028756 - 80286ca: 687b ldr r3, [r7, #4] - 80286cc: 681b ldr r3, [r3, #0] - 80286ce: 4a73 ldr r2, [pc, #460] ; (802889c ) - 80286d0: 4293 cmp r3, r2 - 80286d2: d040 beq.n 8028756 - 80286d4: 687b ldr r3, [r7, #4] - 80286d6: 681b ldr r3, [r3, #0] - 80286d8: 4a71 ldr r2, [pc, #452] ; (80288a0 ) - 80286da: 4293 cmp r3, r2 - 80286dc: d03b beq.n 8028756 - 80286de: 687b ldr r3, [r7, #4] - 80286e0: 681b ldr r3, [r3, #0] - 80286e2: 4a70 ldr r2, [pc, #448] ; (80288a4 ) - 80286e4: 4293 cmp r3, r2 - 80286e6: d036 beq.n 8028756 - 80286e8: 687b ldr r3, [r7, #4] - 80286ea: 681b ldr r3, [r3, #0] - 80286ec: 4a6e ldr r2, [pc, #440] ; (80288a8 ) - 80286ee: 4293 cmp r3, r2 - 80286f0: d031 beq.n 8028756 - 80286f2: 687b ldr r3, [r7, #4] - 80286f4: 681b ldr r3, [r3, #0] - 80286f6: 4a6d ldr r2, [pc, #436] ; (80288ac ) - 80286f8: 4293 cmp r3, r2 - 80286fa: d02c beq.n 8028756 - 80286fc: 687b ldr r3, [r7, #4] - 80286fe: 681b ldr r3, [r3, #0] - 8028700: 4a6b ldr r2, [pc, #428] ; (80288b0 ) - 8028702: 4293 cmp r3, r2 - 8028704: d027 beq.n 8028756 - 8028706: 687b ldr r3, [r7, #4] - 8028708: 681b ldr r3, [r3, #0] - 802870a: 4a6a ldr r2, [pc, #424] ; (80288b4 ) - 802870c: 4293 cmp r3, r2 - 802870e: d022 beq.n 8028756 - 8028710: 687b ldr r3, [r7, #4] - 8028712: 681b ldr r3, [r3, #0] - 8028714: 4a68 ldr r2, [pc, #416] ; (80288b8 ) - 8028716: 4293 cmp r3, r2 - 8028718: d01d beq.n 8028756 - 802871a: 687b ldr r3, [r7, #4] - 802871c: 681b ldr r3, [r3, #0] - 802871e: 4a67 ldr r2, [pc, #412] ; (80288bc ) - 8028720: 4293 cmp r3, r2 - 8028722: d018 beq.n 8028756 - 8028724: 687b ldr r3, [r7, #4] - 8028726: 681b ldr r3, [r3, #0] - 8028728: 4a65 ldr r2, [pc, #404] ; (80288c0 ) - 802872a: 4293 cmp r3, r2 - 802872c: d013 beq.n 8028756 - 802872e: 687b ldr r3, [r7, #4] - 8028730: 681b ldr r3, [r3, #0] - 8028732: 4a64 ldr r2, [pc, #400] ; (80288c4 ) - 8028734: 4293 cmp r3, r2 - 8028736: d00e beq.n 8028756 - 8028738: 687b ldr r3, [r7, #4] - 802873a: 681b ldr r3, [r3, #0] - 802873c: 4a62 ldr r2, [pc, #392] ; (80288c8 ) - 802873e: 4293 cmp r3, r2 - 8028740: d009 beq.n 8028756 - 8028742: 687b ldr r3, [r7, #4] - 8028744: 681b ldr r3, [r3, #0] - 8028746: 4a61 ldr r2, [pc, #388] ; (80288cc ) - 8028748: 4293 cmp r3, r2 - 802874a: d004 beq.n 8028756 - 802874c: 687b ldr r3, [r7, #4] - 802874e: 681b ldr r3, [r3, #0] - 8028750: 4a5f ldr r2, [pc, #380] ; (80288d0 ) - 8028752: 4293 cmp r3, r2 - 8028754: d101 bne.n 802875a - 8028756: 2301 movs r3, #1 - 8028758: e000 b.n 802875c - 802875a: 2300 movs r3, #0 - 802875c: 2b00 cmp r3, #0 - 802875e: d013 beq.n 8028788 + 80286e6: 687b ldr r3, [r7, #4] + 80286e8: 681b ldr r3, [r3, #0] + 80286ea: 4a76 ldr r2, [pc, #472] ; (80288c4 ) + 80286ec: 4293 cmp r3, r2 + 80286ee: d04a beq.n 8028786 + 80286f0: 687b ldr r3, [r7, #4] + 80286f2: 681b ldr r3, [r3, #0] + 80286f4: 4a74 ldr r2, [pc, #464] ; (80288c8 ) + 80286f6: 4293 cmp r3, r2 + 80286f8: d045 beq.n 8028786 + 80286fa: 687b ldr r3, [r7, #4] + 80286fc: 681b ldr r3, [r3, #0] + 80286fe: 4a73 ldr r2, [pc, #460] ; (80288cc ) + 8028700: 4293 cmp r3, r2 + 8028702: d040 beq.n 8028786 + 8028704: 687b ldr r3, [r7, #4] + 8028706: 681b ldr r3, [r3, #0] + 8028708: 4a71 ldr r2, [pc, #452] ; (80288d0 ) + 802870a: 4293 cmp r3, r2 + 802870c: d03b beq.n 8028786 + 802870e: 687b ldr r3, [r7, #4] + 8028710: 681b ldr r3, [r3, #0] + 8028712: 4a70 ldr r2, [pc, #448] ; (80288d4 ) + 8028714: 4293 cmp r3, r2 + 8028716: d036 beq.n 8028786 + 8028718: 687b ldr r3, [r7, #4] + 802871a: 681b ldr r3, [r3, #0] + 802871c: 4a6e ldr r2, [pc, #440] ; (80288d8 ) + 802871e: 4293 cmp r3, r2 + 8028720: d031 beq.n 8028786 + 8028722: 687b ldr r3, [r7, #4] + 8028724: 681b ldr r3, [r3, #0] + 8028726: 4a6d ldr r2, [pc, #436] ; (80288dc ) + 8028728: 4293 cmp r3, r2 + 802872a: d02c beq.n 8028786 + 802872c: 687b ldr r3, [r7, #4] + 802872e: 681b ldr r3, [r3, #0] + 8028730: 4a6b ldr r2, [pc, #428] ; (80288e0 ) + 8028732: 4293 cmp r3, r2 + 8028734: d027 beq.n 8028786 + 8028736: 687b ldr r3, [r7, #4] + 8028738: 681b ldr r3, [r3, #0] + 802873a: 4a6a ldr r2, [pc, #424] ; (80288e4 ) + 802873c: 4293 cmp r3, r2 + 802873e: d022 beq.n 8028786 + 8028740: 687b ldr r3, [r7, #4] + 8028742: 681b ldr r3, [r3, #0] + 8028744: 4a68 ldr r2, [pc, #416] ; (80288e8 ) + 8028746: 4293 cmp r3, r2 + 8028748: d01d beq.n 8028786 + 802874a: 687b ldr r3, [r7, #4] + 802874c: 681b ldr r3, [r3, #0] + 802874e: 4a67 ldr r2, [pc, #412] ; (80288ec ) + 8028750: 4293 cmp r3, r2 + 8028752: d018 beq.n 8028786 + 8028754: 687b ldr r3, [r7, #4] + 8028756: 681b ldr r3, [r3, #0] + 8028758: 4a65 ldr r2, [pc, #404] ; (80288f0 ) + 802875a: 4293 cmp r3, r2 + 802875c: d013 beq.n 8028786 + 802875e: 687b ldr r3, [r7, #4] + 8028760: 681b ldr r3, [r3, #0] + 8028762: 4a64 ldr r2, [pc, #400] ; (80288f4 ) + 8028764: 4293 cmp r3, r2 + 8028766: d00e beq.n 8028786 + 8028768: 687b ldr r3, [r7, #4] + 802876a: 681b ldr r3, [r3, #0] + 802876c: 4a62 ldr r2, [pc, #392] ; (80288f8 ) + 802876e: 4293 cmp r3, r2 + 8028770: d009 beq.n 8028786 + 8028772: 687b ldr r3, [r7, #4] + 8028774: 681b ldr r3, [r3, #0] + 8028776: 4a61 ldr r2, [pc, #388] ; (80288fc ) + 8028778: 4293 cmp r3, r2 + 802877a: d004 beq.n 8028786 + 802877c: 687b ldr r3, [r7, #4] + 802877e: 681b ldr r3, [r3, #0] + 8028780: 4a5f ldr r2, [pc, #380] ; (8028900 ) + 8028782: 4293 cmp r3, r2 + 8028784: d101 bne.n 802878a + 8028786: 2301 movs r3, #1 + 8028788: e000 b.n 802878c + 802878a: 2300 movs r3, #0 + 802878c: 2b00 cmp r3, #0 + 802878e: d013 beq.n 80287b8 { /* Disable DMA All Interrupts */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT); - 8028760: 687b ldr r3, [r7, #4] - 8028762: 681b ldr r3, [r3, #0] - 8028764: 681a ldr r2, [r3, #0] - 8028766: 687b ldr r3, [r7, #4] - 8028768: 681b ldr r3, [r3, #0] - 802876a: f022 021e bic.w r2, r2, #30 - 802876e: 601a str r2, [r3, #0] + 8028790: 687b ldr r3, [r7, #4] + 8028792: 681b ldr r3, [r3, #0] + 8028794: 681a ldr r2, [r3, #0] + 8028796: 687b ldr r3, [r7, #4] + 8028798: 681b ldr r3, [r3, #0] + 802879a: f022 021e bic.w r2, r2, #30 + 802879e: 601a str r2, [r3, #0] ((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE); - 8028770: 687b ldr r3, [r7, #4] - 8028772: 681b ldr r3, [r3, #0] - 8028774: 695a ldr r2, [r3, #20] - 8028776: 687b ldr r3, [r7, #4] - 8028778: 681b ldr r3, [r3, #0] - 802877a: f022 0280 bic.w r2, r2, #128 ; 0x80 - 802877e: 615a str r2, [r3, #20] + 80287a0: 687b ldr r3, [r7, #4] + 80287a2: 681b ldr r3, [r3, #0] + 80287a4: 695a ldr r2, [r3, #20] + 80287a6: 687b ldr r3, [r7, #4] + 80287a8: 681b ldr r3, [r3, #0] + 80287aa: f022 0280 bic.w r2, r2, #128 ; 0x80 + 80287ae: 615a str r2, [r3, #20] enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef *)hdma->Instance)->CR)); - 8028780: 687b ldr r3, [r7, #4] - 8028782: 681b ldr r3, [r3, #0] - 8028784: 617b str r3, [r7, #20] - 8028786: e00a b.n 802879e + 80287b0: 687b ldr r3, [r7, #4] + 80287b2: 681b ldr r3, [r3, #0] + 80287b4: 617b str r3, [r7, #20] + 80287b6: e00a b.n 80287ce } else /* BDMA channel */ { /* Disable DMA All Interrupts */ ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE); - 8028788: 687b ldr r3, [r7, #4] - 802878a: 681b ldr r3, [r3, #0] - 802878c: 681a ldr r2, [r3, #0] - 802878e: 687b ldr r3, [r7, #4] - 8028790: 681b ldr r3, [r3, #0] - 8028792: f022 020e bic.w r2, r2, #14 - 8028796: 601a str r2, [r3, #0] + 80287b8: 687b ldr r3, [r7, #4] + 80287ba: 681b ldr r3, [r3, #0] + 80287bc: 681a ldr r2, [r3, #0] + 80287be: 687b ldr r3, [r7, #4] + 80287c0: 681b ldr r3, [r3, #0] + 80287c2: f022 020e bic.w r2, r2, #14 + 80287c6: 601a str r2, [r3, #0] enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef *)hdma->Instance)->CCR)); - 8028798: 687b ldr r3, [r7, #4] - 802879a: 681b ldr r3, [r3, #0] - 802879c: 617b str r3, [r7, #20] + 80287c8: 687b ldr r3, [r7, #4] + 80287ca: 681b ldr r3, [r3, #0] + 80287cc: 617b str r3, [r7, #20] } if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 802879e: 687b ldr r3, [r7, #4] - 80287a0: 681b ldr r3, [r3, #0] - 80287a2: 4a3c ldr r2, [pc, #240] ; (8028894 ) - 80287a4: 4293 cmp r3, r2 - 80287a6: d072 beq.n 802888e - 80287a8: 687b ldr r3, [r7, #4] - 80287aa: 681b ldr r3, [r3, #0] - 80287ac: 4a3a ldr r2, [pc, #232] ; (8028898 ) - 80287ae: 4293 cmp r3, r2 - 80287b0: d06d beq.n 802888e - 80287b2: 687b ldr r3, [r7, #4] - 80287b4: 681b ldr r3, [r3, #0] - 80287b6: 4a39 ldr r2, [pc, #228] ; (802889c ) - 80287b8: 4293 cmp r3, r2 - 80287ba: d068 beq.n 802888e - 80287bc: 687b ldr r3, [r7, #4] - 80287be: 681b ldr r3, [r3, #0] - 80287c0: 4a37 ldr r2, [pc, #220] ; (80288a0 ) - 80287c2: 4293 cmp r3, r2 - 80287c4: d063 beq.n 802888e - 80287c6: 687b ldr r3, [r7, #4] - 80287c8: 681b ldr r3, [r3, #0] - 80287ca: 4a36 ldr r2, [pc, #216] ; (80288a4 ) - 80287cc: 4293 cmp r3, r2 - 80287ce: d05e beq.n 802888e - 80287d0: 687b ldr r3, [r7, #4] - 80287d2: 681b ldr r3, [r3, #0] - 80287d4: 4a34 ldr r2, [pc, #208] ; (80288a8 ) - 80287d6: 4293 cmp r3, r2 - 80287d8: d059 beq.n 802888e - 80287da: 687b ldr r3, [r7, #4] - 80287dc: 681b ldr r3, [r3, #0] - 80287de: 4a33 ldr r2, [pc, #204] ; (80288ac ) - 80287e0: 4293 cmp r3, r2 - 80287e2: d054 beq.n 802888e - 80287e4: 687b ldr r3, [r7, #4] - 80287e6: 681b ldr r3, [r3, #0] - 80287e8: 4a31 ldr r2, [pc, #196] ; (80288b0 ) - 80287ea: 4293 cmp r3, r2 - 80287ec: d04f beq.n 802888e - 80287ee: 687b ldr r3, [r7, #4] - 80287f0: 681b ldr r3, [r3, #0] - 80287f2: 4a30 ldr r2, [pc, #192] ; (80288b4 ) - 80287f4: 4293 cmp r3, r2 - 80287f6: d04a beq.n 802888e - 80287f8: 687b ldr r3, [r7, #4] - 80287fa: 681b ldr r3, [r3, #0] - 80287fc: 4a2e ldr r2, [pc, #184] ; (80288b8 ) - 80287fe: 4293 cmp r3, r2 - 8028800: d045 beq.n 802888e - 8028802: 687b ldr r3, [r7, #4] - 8028804: 681b ldr r3, [r3, #0] - 8028806: 4a2d ldr r2, [pc, #180] ; (80288bc ) - 8028808: 4293 cmp r3, r2 - 802880a: d040 beq.n 802888e - 802880c: 687b ldr r3, [r7, #4] - 802880e: 681b ldr r3, [r3, #0] - 8028810: 4a2b ldr r2, [pc, #172] ; (80288c0 ) - 8028812: 4293 cmp r3, r2 - 8028814: d03b beq.n 802888e - 8028816: 687b ldr r3, [r7, #4] - 8028818: 681b ldr r3, [r3, #0] - 802881a: 4a2a ldr r2, [pc, #168] ; (80288c4 ) - 802881c: 4293 cmp r3, r2 - 802881e: d036 beq.n 802888e - 8028820: 687b ldr r3, [r7, #4] - 8028822: 681b ldr r3, [r3, #0] - 8028824: 4a28 ldr r2, [pc, #160] ; (80288c8 ) - 8028826: 4293 cmp r3, r2 - 8028828: d031 beq.n 802888e - 802882a: 687b ldr r3, [r7, #4] - 802882c: 681b ldr r3, [r3, #0] - 802882e: 4a27 ldr r2, [pc, #156] ; (80288cc ) - 8028830: 4293 cmp r3, r2 - 8028832: d02c beq.n 802888e - 8028834: 687b ldr r3, [r7, #4] - 8028836: 681b ldr r3, [r3, #0] - 8028838: 4a25 ldr r2, [pc, #148] ; (80288d0 ) - 802883a: 4293 cmp r3, r2 - 802883c: d027 beq.n 802888e - 802883e: 687b ldr r3, [r7, #4] - 8028840: 681b ldr r3, [r3, #0] - 8028842: 4a24 ldr r2, [pc, #144] ; (80288d4 ) - 8028844: 4293 cmp r3, r2 - 8028846: d022 beq.n 802888e - 8028848: 687b ldr r3, [r7, #4] - 802884a: 681b ldr r3, [r3, #0] - 802884c: 4a22 ldr r2, [pc, #136] ; (80288d8 ) - 802884e: 4293 cmp r3, r2 - 8028850: d01d beq.n 802888e - 8028852: 687b ldr r3, [r7, #4] - 8028854: 681b ldr r3, [r3, #0] - 8028856: 4a21 ldr r2, [pc, #132] ; (80288dc ) - 8028858: 4293 cmp r3, r2 - 802885a: d018 beq.n 802888e - 802885c: 687b ldr r3, [r7, #4] - 802885e: 681b ldr r3, [r3, #0] - 8028860: 4a1f ldr r2, [pc, #124] ; (80288e0 ) - 8028862: 4293 cmp r3, r2 - 8028864: d013 beq.n 802888e - 8028866: 687b ldr r3, [r7, #4] - 8028868: 681b ldr r3, [r3, #0] - 802886a: 4a1e ldr r2, [pc, #120] ; (80288e4 ) - 802886c: 4293 cmp r3, r2 - 802886e: d00e beq.n 802888e - 8028870: 687b ldr r3, [r7, #4] - 8028872: 681b ldr r3, [r3, #0] - 8028874: 4a1c ldr r2, [pc, #112] ; (80288e8 ) - 8028876: 4293 cmp r3, r2 - 8028878: d009 beq.n 802888e - 802887a: 687b ldr r3, [r7, #4] - 802887c: 681b ldr r3, [r3, #0] - 802887e: 4a1b ldr r2, [pc, #108] ; (80288ec ) - 8028880: 4293 cmp r3, r2 - 8028882: d004 beq.n 802888e - 8028884: 687b ldr r3, [r7, #4] - 8028886: 681b ldr r3, [r3, #0] - 8028888: 4a19 ldr r2, [pc, #100] ; (80288f0 ) - 802888a: 4293 cmp r3, r2 - 802888c: d132 bne.n 80288f4 - 802888e: 2301 movs r3, #1 - 8028890: e031 b.n 80288f6 - 8028892: bf00 nop - 8028894: 40020010 .word 0x40020010 - 8028898: 40020028 .word 0x40020028 - 802889c: 40020040 .word 0x40020040 - 80288a0: 40020058 .word 0x40020058 - 80288a4: 40020070 .word 0x40020070 - 80288a8: 40020088 .word 0x40020088 - 80288ac: 400200a0 .word 0x400200a0 - 80288b0: 400200b8 .word 0x400200b8 - 80288b4: 40020410 .word 0x40020410 - 80288b8: 40020428 .word 0x40020428 - 80288bc: 40020440 .word 0x40020440 - 80288c0: 40020458 .word 0x40020458 - 80288c4: 40020470 .word 0x40020470 - 80288c8: 40020488 .word 0x40020488 - 80288cc: 400204a0 .word 0x400204a0 - 80288d0: 400204b8 .word 0x400204b8 - 80288d4: 58025408 .word 0x58025408 - 80288d8: 5802541c .word 0x5802541c - 80288dc: 58025430 .word 0x58025430 - 80288e0: 58025444 .word 0x58025444 - 80288e4: 58025458 .word 0x58025458 - 80288e8: 5802546c .word 0x5802546c - 80288ec: 58025480 .word 0x58025480 - 80288f0: 58025494 .word 0x58025494 - 80288f4: 2300 movs r3, #0 - 80288f6: 2b00 cmp r3, #0 - 80288f8: d007 beq.n 802890a + 80287ce: 687b ldr r3, [r7, #4] + 80287d0: 681b ldr r3, [r3, #0] + 80287d2: 4a3c ldr r2, [pc, #240] ; (80288c4 ) + 80287d4: 4293 cmp r3, r2 + 80287d6: d072 beq.n 80288be + 80287d8: 687b ldr r3, [r7, #4] + 80287da: 681b ldr r3, [r3, #0] + 80287dc: 4a3a ldr r2, [pc, #232] ; (80288c8 ) + 80287de: 4293 cmp r3, r2 + 80287e0: d06d beq.n 80288be + 80287e2: 687b ldr r3, [r7, #4] + 80287e4: 681b ldr r3, [r3, #0] + 80287e6: 4a39 ldr r2, [pc, #228] ; (80288cc ) + 80287e8: 4293 cmp r3, r2 + 80287ea: d068 beq.n 80288be + 80287ec: 687b ldr r3, [r7, #4] + 80287ee: 681b ldr r3, [r3, #0] + 80287f0: 4a37 ldr r2, [pc, #220] ; (80288d0 ) + 80287f2: 4293 cmp r3, r2 + 80287f4: d063 beq.n 80288be + 80287f6: 687b ldr r3, [r7, #4] + 80287f8: 681b ldr r3, [r3, #0] + 80287fa: 4a36 ldr r2, [pc, #216] ; (80288d4 ) + 80287fc: 4293 cmp r3, r2 + 80287fe: d05e beq.n 80288be + 8028800: 687b ldr r3, [r7, #4] + 8028802: 681b ldr r3, [r3, #0] + 8028804: 4a34 ldr r2, [pc, #208] ; (80288d8 ) + 8028806: 4293 cmp r3, r2 + 8028808: d059 beq.n 80288be + 802880a: 687b ldr r3, [r7, #4] + 802880c: 681b ldr r3, [r3, #0] + 802880e: 4a33 ldr r2, [pc, #204] ; (80288dc ) + 8028810: 4293 cmp r3, r2 + 8028812: d054 beq.n 80288be + 8028814: 687b ldr r3, [r7, #4] + 8028816: 681b ldr r3, [r3, #0] + 8028818: 4a31 ldr r2, [pc, #196] ; (80288e0 ) + 802881a: 4293 cmp r3, r2 + 802881c: d04f beq.n 80288be + 802881e: 687b ldr r3, [r7, #4] + 8028820: 681b ldr r3, [r3, #0] + 8028822: 4a30 ldr r2, [pc, #192] ; (80288e4 ) + 8028824: 4293 cmp r3, r2 + 8028826: d04a beq.n 80288be + 8028828: 687b ldr r3, [r7, #4] + 802882a: 681b ldr r3, [r3, #0] + 802882c: 4a2e ldr r2, [pc, #184] ; (80288e8 ) + 802882e: 4293 cmp r3, r2 + 8028830: d045 beq.n 80288be + 8028832: 687b ldr r3, [r7, #4] + 8028834: 681b ldr r3, [r3, #0] + 8028836: 4a2d ldr r2, [pc, #180] ; (80288ec ) + 8028838: 4293 cmp r3, r2 + 802883a: d040 beq.n 80288be + 802883c: 687b ldr r3, [r7, #4] + 802883e: 681b ldr r3, [r3, #0] + 8028840: 4a2b ldr r2, [pc, #172] ; (80288f0 ) + 8028842: 4293 cmp r3, r2 + 8028844: d03b beq.n 80288be + 8028846: 687b ldr r3, [r7, #4] + 8028848: 681b ldr r3, [r3, #0] + 802884a: 4a2a ldr r2, [pc, #168] ; (80288f4 ) + 802884c: 4293 cmp r3, r2 + 802884e: d036 beq.n 80288be + 8028850: 687b ldr r3, [r7, #4] + 8028852: 681b ldr r3, [r3, #0] + 8028854: 4a28 ldr r2, [pc, #160] ; (80288f8 ) + 8028856: 4293 cmp r3, r2 + 8028858: d031 beq.n 80288be + 802885a: 687b ldr r3, [r7, #4] + 802885c: 681b ldr r3, [r3, #0] + 802885e: 4a27 ldr r2, [pc, #156] ; (80288fc ) + 8028860: 4293 cmp r3, r2 + 8028862: d02c beq.n 80288be + 8028864: 687b ldr r3, [r7, #4] + 8028866: 681b ldr r3, [r3, #0] + 8028868: 4a25 ldr r2, [pc, #148] ; (8028900 ) + 802886a: 4293 cmp r3, r2 + 802886c: d027 beq.n 80288be + 802886e: 687b ldr r3, [r7, #4] + 8028870: 681b ldr r3, [r3, #0] + 8028872: 4a24 ldr r2, [pc, #144] ; (8028904 ) + 8028874: 4293 cmp r3, r2 + 8028876: d022 beq.n 80288be + 8028878: 687b ldr r3, [r7, #4] + 802887a: 681b ldr r3, [r3, #0] + 802887c: 4a22 ldr r2, [pc, #136] ; (8028908 ) + 802887e: 4293 cmp r3, r2 + 8028880: d01d beq.n 80288be + 8028882: 687b ldr r3, [r7, #4] + 8028884: 681b ldr r3, [r3, #0] + 8028886: 4a21 ldr r2, [pc, #132] ; (802890c ) + 8028888: 4293 cmp r3, r2 + 802888a: d018 beq.n 80288be + 802888c: 687b ldr r3, [r7, #4] + 802888e: 681b ldr r3, [r3, #0] + 8028890: 4a1f ldr r2, [pc, #124] ; (8028910 ) + 8028892: 4293 cmp r3, r2 + 8028894: d013 beq.n 80288be + 8028896: 687b ldr r3, [r7, #4] + 8028898: 681b ldr r3, [r3, #0] + 802889a: 4a1e ldr r2, [pc, #120] ; (8028914 ) + 802889c: 4293 cmp r3, r2 + 802889e: d00e beq.n 80288be + 80288a0: 687b ldr r3, [r7, #4] + 80288a2: 681b ldr r3, [r3, #0] + 80288a4: 4a1c ldr r2, [pc, #112] ; (8028918 ) + 80288a6: 4293 cmp r3, r2 + 80288a8: d009 beq.n 80288be + 80288aa: 687b ldr r3, [r7, #4] + 80288ac: 681b ldr r3, [r3, #0] + 80288ae: 4a1b ldr r2, [pc, #108] ; (802891c ) + 80288b0: 4293 cmp r3, r2 + 80288b2: d004 beq.n 80288be + 80288b4: 687b ldr r3, [r7, #4] + 80288b6: 681b ldr r3, [r3, #0] + 80288b8: 4a19 ldr r2, [pc, #100] ; (8028920 ) + 80288ba: 4293 cmp r3, r2 + 80288bc: d132 bne.n 8028924 + 80288be: 2301 movs r3, #1 + 80288c0: e031 b.n 8028926 + 80288c2: bf00 nop + 80288c4: 40020010 .word 0x40020010 + 80288c8: 40020028 .word 0x40020028 + 80288cc: 40020040 .word 0x40020040 + 80288d0: 40020058 .word 0x40020058 + 80288d4: 40020070 .word 0x40020070 + 80288d8: 40020088 .word 0x40020088 + 80288dc: 400200a0 .word 0x400200a0 + 80288e0: 400200b8 .word 0x400200b8 + 80288e4: 40020410 .word 0x40020410 + 80288e8: 40020428 .word 0x40020428 + 80288ec: 40020440 .word 0x40020440 + 80288f0: 40020458 .word 0x40020458 + 80288f4: 40020470 .word 0x40020470 + 80288f8: 40020488 .word 0x40020488 + 80288fc: 400204a0 .word 0x400204a0 + 8028900: 400204b8 .word 0x400204b8 + 8028904: 58025408 .word 0x58025408 + 8028908: 5802541c .word 0x5802541c + 802890c: 58025430 .word 0x58025430 + 8028910: 58025444 .word 0x58025444 + 8028914: 58025458 .word 0x58025458 + 8028918: 5802546c .word 0x5802546c + 802891c: 58025480 .word 0x58025480 + 8028920: 58025494 .word 0x58025494 + 8028924: 2300 movs r3, #0 + 8028926: 2b00 cmp r3, #0 + 8028928: d007 beq.n 802893a { /* disable the DMAMUX sync overrun IT */ hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - 80288fa: 687b ldr r3, [r7, #4] - 80288fc: 6e1b ldr r3, [r3, #96] ; 0x60 - 80288fe: 681a ldr r2, [r3, #0] - 8028900: 687b ldr r3, [r7, #4] - 8028902: 6e1b ldr r3, [r3, #96] ; 0x60 - 8028904: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8028908: 601a str r2, [r3, #0] + 802892a: 687b ldr r3, [r7, #4] + 802892c: 6e1b ldr r3, [r3, #96] ; 0x60 + 802892e: 681a ldr r2, [r3, #0] + 8028930: 687b ldr r3, [r7, #4] + 8028932: 6e1b ldr r3, [r3, #96] ; 0x60 + 8028934: f422 7280 bic.w r2, r2, #256 ; 0x100 + 8028938: 601a str r2, [r3, #0] } /* Disable the stream */ __HAL_DMA_DISABLE(hdma); - 802890a: 687b ldr r3, [r7, #4] - 802890c: 681b ldr r3, [r3, #0] - 802890e: 4a6d ldr r2, [pc, #436] ; (8028ac4 ) - 8028910: 4293 cmp r3, r2 - 8028912: d04a beq.n 80289aa - 8028914: 687b ldr r3, [r7, #4] - 8028916: 681b ldr r3, [r3, #0] - 8028918: 4a6b ldr r2, [pc, #428] ; (8028ac8 ) - 802891a: 4293 cmp r3, r2 - 802891c: d045 beq.n 80289aa - 802891e: 687b ldr r3, [r7, #4] - 8028920: 681b ldr r3, [r3, #0] - 8028922: 4a6a ldr r2, [pc, #424] ; (8028acc ) - 8028924: 4293 cmp r3, r2 - 8028926: d040 beq.n 80289aa - 8028928: 687b ldr r3, [r7, #4] - 802892a: 681b ldr r3, [r3, #0] - 802892c: 4a68 ldr r2, [pc, #416] ; (8028ad0 ) - 802892e: 4293 cmp r3, r2 - 8028930: d03b beq.n 80289aa - 8028932: 687b ldr r3, [r7, #4] - 8028934: 681b ldr r3, [r3, #0] - 8028936: 4a67 ldr r2, [pc, #412] ; (8028ad4 ) - 8028938: 4293 cmp r3, r2 - 802893a: d036 beq.n 80289aa - 802893c: 687b ldr r3, [r7, #4] - 802893e: 681b ldr r3, [r3, #0] - 8028940: 4a65 ldr r2, [pc, #404] ; (8028ad8 ) - 8028942: 4293 cmp r3, r2 - 8028944: d031 beq.n 80289aa - 8028946: 687b ldr r3, [r7, #4] - 8028948: 681b ldr r3, [r3, #0] - 802894a: 4a64 ldr r2, [pc, #400] ; (8028adc ) - 802894c: 4293 cmp r3, r2 - 802894e: d02c beq.n 80289aa - 8028950: 687b ldr r3, [r7, #4] - 8028952: 681b ldr r3, [r3, #0] - 8028954: 4a62 ldr r2, [pc, #392] ; (8028ae0 ) - 8028956: 4293 cmp r3, r2 - 8028958: d027 beq.n 80289aa - 802895a: 687b ldr r3, [r7, #4] - 802895c: 681b ldr r3, [r3, #0] - 802895e: 4a61 ldr r2, [pc, #388] ; (8028ae4 ) - 8028960: 4293 cmp r3, r2 - 8028962: d022 beq.n 80289aa - 8028964: 687b ldr r3, [r7, #4] - 8028966: 681b ldr r3, [r3, #0] - 8028968: 4a5f ldr r2, [pc, #380] ; (8028ae8 ) - 802896a: 4293 cmp r3, r2 - 802896c: d01d beq.n 80289aa - 802896e: 687b ldr r3, [r7, #4] - 8028970: 681b ldr r3, [r3, #0] - 8028972: 4a5e ldr r2, [pc, #376] ; (8028aec ) - 8028974: 4293 cmp r3, r2 - 8028976: d018 beq.n 80289aa - 8028978: 687b ldr r3, [r7, #4] - 802897a: 681b ldr r3, [r3, #0] - 802897c: 4a5c ldr r2, [pc, #368] ; (8028af0 ) - 802897e: 4293 cmp r3, r2 - 8028980: d013 beq.n 80289aa - 8028982: 687b ldr r3, [r7, #4] - 8028984: 681b ldr r3, [r3, #0] - 8028986: 4a5b ldr r2, [pc, #364] ; (8028af4 ) - 8028988: 4293 cmp r3, r2 - 802898a: d00e beq.n 80289aa - 802898c: 687b ldr r3, [r7, #4] - 802898e: 681b ldr r3, [r3, #0] - 8028990: 4a59 ldr r2, [pc, #356] ; (8028af8 ) - 8028992: 4293 cmp r3, r2 - 8028994: d009 beq.n 80289aa - 8028996: 687b ldr r3, [r7, #4] - 8028998: 681b ldr r3, [r3, #0] - 802899a: 4a58 ldr r2, [pc, #352] ; (8028afc ) - 802899c: 4293 cmp r3, r2 - 802899e: d004 beq.n 80289aa - 80289a0: 687b ldr r3, [r7, #4] - 80289a2: 681b ldr r3, [r3, #0] - 80289a4: 4a56 ldr r2, [pc, #344] ; (8028b00 ) - 80289a6: 4293 cmp r3, r2 - 80289a8: d108 bne.n 80289bc - 80289aa: 687b ldr r3, [r7, #4] - 80289ac: 681b ldr r3, [r3, #0] - 80289ae: 681a ldr r2, [r3, #0] - 80289b0: 687b ldr r3, [r7, #4] - 80289b2: 681b ldr r3, [r3, #0] - 80289b4: f022 0201 bic.w r2, r2, #1 - 80289b8: 601a str r2, [r3, #0] - 80289ba: e007 b.n 80289cc + 802893a: 687b ldr r3, [r7, #4] + 802893c: 681b ldr r3, [r3, #0] + 802893e: 4a6d ldr r2, [pc, #436] ; (8028af4 ) + 8028940: 4293 cmp r3, r2 + 8028942: d04a beq.n 80289da + 8028944: 687b ldr r3, [r7, #4] + 8028946: 681b ldr r3, [r3, #0] + 8028948: 4a6b ldr r2, [pc, #428] ; (8028af8 ) + 802894a: 4293 cmp r3, r2 + 802894c: d045 beq.n 80289da + 802894e: 687b ldr r3, [r7, #4] + 8028950: 681b ldr r3, [r3, #0] + 8028952: 4a6a ldr r2, [pc, #424] ; (8028afc ) + 8028954: 4293 cmp r3, r2 + 8028956: d040 beq.n 80289da + 8028958: 687b ldr r3, [r7, #4] + 802895a: 681b ldr r3, [r3, #0] + 802895c: 4a68 ldr r2, [pc, #416] ; (8028b00 ) + 802895e: 4293 cmp r3, r2 + 8028960: d03b beq.n 80289da + 8028962: 687b ldr r3, [r7, #4] + 8028964: 681b ldr r3, [r3, #0] + 8028966: 4a67 ldr r2, [pc, #412] ; (8028b04 ) + 8028968: 4293 cmp r3, r2 + 802896a: d036 beq.n 80289da + 802896c: 687b ldr r3, [r7, #4] + 802896e: 681b ldr r3, [r3, #0] + 8028970: 4a65 ldr r2, [pc, #404] ; (8028b08 ) + 8028972: 4293 cmp r3, r2 + 8028974: d031 beq.n 80289da + 8028976: 687b ldr r3, [r7, #4] + 8028978: 681b ldr r3, [r3, #0] + 802897a: 4a64 ldr r2, [pc, #400] ; (8028b0c ) + 802897c: 4293 cmp r3, r2 + 802897e: d02c beq.n 80289da + 8028980: 687b ldr r3, [r7, #4] + 8028982: 681b ldr r3, [r3, #0] + 8028984: 4a62 ldr r2, [pc, #392] ; (8028b10 ) + 8028986: 4293 cmp r3, r2 + 8028988: d027 beq.n 80289da + 802898a: 687b ldr r3, [r7, #4] + 802898c: 681b ldr r3, [r3, #0] + 802898e: 4a61 ldr r2, [pc, #388] ; (8028b14 ) + 8028990: 4293 cmp r3, r2 + 8028992: d022 beq.n 80289da + 8028994: 687b ldr r3, [r7, #4] + 8028996: 681b ldr r3, [r3, #0] + 8028998: 4a5f ldr r2, [pc, #380] ; (8028b18 ) + 802899a: 4293 cmp r3, r2 + 802899c: d01d beq.n 80289da + 802899e: 687b ldr r3, [r7, #4] + 80289a0: 681b ldr r3, [r3, #0] + 80289a2: 4a5e ldr r2, [pc, #376] ; (8028b1c ) + 80289a4: 4293 cmp r3, r2 + 80289a6: d018 beq.n 80289da + 80289a8: 687b ldr r3, [r7, #4] + 80289aa: 681b ldr r3, [r3, #0] + 80289ac: 4a5c ldr r2, [pc, #368] ; (8028b20 ) + 80289ae: 4293 cmp r3, r2 + 80289b0: d013 beq.n 80289da + 80289b2: 687b ldr r3, [r7, #4] + 80289b4: 681b ldr r3, [r3, #0] + 80289b6: 4a5b ldr r2, [pc, #364] ; (8028b24 ) + 80289b8: 4293 cmp r3, r2 + 80289ba: d00e beq.n 80289da 80289bc: 687b ldr r3, [r7, #4] 80289be: 681b ldr r3, [r3, #0] - 80289c0: 681a ldr r2, [r3, #0] - 80289c2: 687b ldr r3, [r7, #4] - 80289c4: 681b ldr r3, [r3, #0] - 80289c6: f022 0201 bic.w r2, r2, #1 - 80289ca: 601a str r2, [r3, #0] + 80289c0: 4a59 ldr r2, [pc, #356] ; (8028b28 ) + 80289c2: 4293 cmp r3, r2 + 80289c4: d009 beq.n 80289da + 80289c6: 687b ldr r3, [r7, #4] + 80289c8: 681b ldr r3, [r3, #0] + 80289ca: 4a58 ldr r2, [pc, #352] ; (8028b2c ) + 80289cc: 4293 cmp r3, r2 + 80289ce: d004 beq.n 80289da + 80289d0: 687b ldr r3, [r7, #4] + 80289d2: 681b ldr r3, [r3, #0] + 80289d4: 4a56 ldr r2, [pc, #344] ; (8028b30 ) + 80289d6: 4293 cmp r3, r2 + 80289d8: d108 bne.n 80289ec + 80289da: 687b ldr r3, [r7, #4] + 80289dc: 681b ldr r3, [r3, #0] + 80289de: 681a ldr r2, [r3, #0] + 80289e0: 687b ldr r3, [r7, #4] + 80289e2: 681b ldr r3, [r3, #0] + 80289e4: f022 0201 bic.w r2, r2, #1 + 80289e8: 601a str r2, [r3, #0] + 80289ea: e007 b.n 80289fc + 80289ec: 687b ldr r3, [r7, #4] + 80289ee: 681b ldr r3, [r3, #0] + 80289f0: 681a ldr r2, [r3, #0] + 80289f2: 687b ldr r3, [r7, #4] + 80289f4: 681b ldr r3, [r3, #0] + 80289f6: f022 0201 bic.w r2, r2, #1 + 80289fa: 601a str r2, [r3, #0] /* Check if the DMA Stream is effectively disabled */ while(((*enableRegister) & DMA_SxCR_EN) != 0U) - 80289cc: e013 b.n 80289f6 + 80289fc: e013 b.n 8028a26 { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) - 80289ce: f7fd fae1 bl 8025f94 - 80289d2: 4602 mov r2, r0 - 80289d4: 693b ldr r3, [r7, #16] - 80289d6: 1ad3 subs r3, r2, r3 - 80289d8: 2b05 cmp r3, #5 - 80289da: d90c bls.n 80289f6 + 80289fe: f7fd fae1 bl 8025fc4 + 8028a02: 4602 mov r2, r0 + 8028a04: 693b ldr r3, [r7, #16] + 8028a06: 1ad3 subs r3, r2, r3 + 8028a08: 2b05 cmp r3, #5 + 8028a0a: d90c bls.n 8028a26 { /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; - 80289dc: 687b ldr r3, [r7, #4] - 80289de: 2220 movs r2, #32 - 80289e0: 655a str r2, [r3, #84] ; 0x54 + 8028a0c: 687b ldr r3, [r7, #4] + 8028a0e: 2220 movs r2, #32 + 8028a10: 655a str r2, [r3, #84] ; 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_ERROR; - 80289e2: 687b ldr r3, [r7, #4] - 80289e4: 2203 movs r2, #3 - 80289e6: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8028a12: 687b ldr r3, [r7, #4] + 8028a14: 2203 movs r2, #3 + 8028a16: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80289ea: 687b ldr r3, [r7, #4] - 80289ec: 2200 movs r2, #0 - 80289ee: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8028a1a: 687b ldr r3, [r7, #4] + 8028a1c: 2200 movs r2, #0 + 8028a1e: f883 2034 strb.w r2, [r3, #52] ; 0x34 return HAL_ERROR; - 80289f2: 2301 movs r3, #1 - 80289f4: e12d b.n 8028c52 + 8028a22: 2301 movs r3, #1 + 8028a24: e12d b.n 8028c82 while(((*enableRegister) & DMA_SxCR_EN) != 0U) - 80289f6: 697b ldr r3, [r7, #20] - 80289f8: 681b ldr r3, [r3, #0] - 80289fa: f003 0301 and.w r3, r3, #1 - 80289fe: 2b00 cmp r3, #0 - 8028a00: d1e5 bne.n 80289ce + 8028a26: 697b ldr r3, [r7, #20] + 8028a28: 681b ldr r3, [r3, #0] + 8028a2a: f003 0301 and.w r3, r3, #1 + 8028a2e: 2b00 cmp r3, #0 + 8028a30: d1e5 bne.n 80289fe } } /* Clear all interrupt flags at correct offset within the register */ if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 8028a02: 687b ldr r3, [r7, #4] - 8028a04: 681b ldr r3, [r3, #0] - 8028a06: 4a2f ldr r2, [pc, #188] ; (8028ac4 ) - 8028a08: 4293 cmp r3, r2 - 8028a0a: d04a beq.n 8028aa2 - 8028a0c: 687b ldr r3, [r7, #4] - 8028a0e: 681b ldr r3, [r3, #0] - 8028a10: 4a2d ldr r2, [pc, #180] ; (8028ac8 ) - 8028a12: 4293 cmp r3, r2 - 8028a14: d045 beq.n 8028aa2 - 8028a16: 687b ldr r3, [r7, #4] - 8028a18: 681b ldr r3, [r3, #0] - 8028a1a: 4a2c ldr r2, [pc, #176] ; (8028acc ) - 8028a1c: 4293 cmp r3, r2 - 8028a1e: d040 beq.n 8028aa2 - 8028a20: 687b ldr r3, [r7, #4] - 8028a22: 681b ldr r3, [r3, #0] - 8028a24: 4a2a ldr r2, [pc, #168] ; (8028ad0 ) - 8028a26: 4293 cmp r3, r2 - 8028a28: d03b beq.n 8028aa2 - 8028a2a: 687b ldr r3, [r7, #4] - 8028a2c: 681b ldr r3, [r3, #0] - 8028a2e: 4a29 ldr r2, [pc, #164] ; (8028ad4 ) - 8028a30: 4293 cmp r3, r2 - 8028a32: d036 beq.n 8028aa2 - 8028a34: 687b ldr r3, [r7, #4] - 8028a36: 681b ldr r3, [r3, #0] - 8028a38: 4a27 ldr r2, [pc, #156] ; (8028ad8 ) - 8028a3a: 4293 cmp r3, r2 - 8028a3c: d031 beq.n 8028aa2 - 8028a3e: 687b ldr r3, [r7, #4] - 8028a40: 681b ldr r3, [r3, #0] - 8028a42: 4a26 ldr r2, [pc, #152] ; (8028adc ) - 8028a44: 4293 cmp r3, r2 - 8028a46: d02c beq.n 8028aa2 - 8028a48: 687b ldr r3, [r7, #4] - 8028a4a: 681b ldr r3, [r3, #0] - 8028a4c: 4a24 ldr r2, [pc, #144] ; (8028ae0 ) - 8028a4e: 4293 cmp r3, r2 - 8028a50: d027 beq.n 8028aa2 - 8028a52: 687b ldr r3, [r7, #4] - 8028a54: 681b ldr r3, [r3, #0] - 8028a56: 4a23 ldr r2, [pc, #140] ; (8028ae4 ) - 8028a58: 4293 cmp r3, r2 - 8028a5a: d022 beq.n 8028aa2 - 8028a5c: 687b ldr r3, [r7, #4] - 8028a5e: 681b ldr r3, [r3, #0] - 8028a60: 4a21 ldr r2, [pc, #132] ; (8028ae8 ) - 8028a62: 4293 cmp r3, r2 - 8028a64: d01d beq.n 8028aa2 - 8028a66: 687b ldr r3, [r7, #4] - 8028a68: 681b ldr r3, [r3, #0] - 8028a6a: 4a20 ldr r2, [pc, #128] ; (8028aec ) - 8028a6c: 4293 cmp r3, r2 - 8028a6e: d018 beq.n 8028aa2 - 8028a70: 687b ldr r3, [r7, #4] - 8028a72: 681b ldr r3, [r3, #0] - 8028a74: 4a1e ldr r2, [pc, #120] ; (8028af0 ) - 8028a76: 4293 cmp r3, r2 - 8028a78: d013 beq.n 8028aa2 - 8028a7a: 687b ldr r3, [r7, #4] - 8028a7c: 681b ldr r3, [r3, #0] - 8028a7e: 4a1d ldr r2, [pc, #116] ; (8028af4 ) - 8028a80: 4293 cmp r3, r2 - 8028a82: d00e beq.n 8028aa2 - 8028a84: 687b ldr r3, [r7, #4] - 8028a86: 681b ldr r3, [r3, #0] - 8028a88: 4a1b ldr r2, [pc, #108] ; (8028af8 ) - 8028a8a: 4293 cmp r3, r2 - 8028a8c: d009 beq.n 8028aa2 - 8028a8e: 687b ldr r3, [r7, #4] - 8028a90: 681b ldr r3, [r3, #0] - 8028a92: 4a1a ldr r2, [pc, #104] ; (8028afc ) - 8028a94: 4293 cmp r3, r2 - 8028a96: d004 beq.n 8028aa2 - 8028a98: 687b ldr r3, [r7, #4] - 8028a9a: 681b ldr r3, [r3, #0] - 8028a9c: 4a18 ldr r2, [pc, #96] ; (8028b00 ) - 8028a9e: 4293 cmp r3, r2 - 8028aa0: d101 bne.n 8028aa6 - 8028aa2: 2301 movs r3, #1 - 8028aa4: e000 b.n 8028aa8 - 8028aa6: 2300 movs r3, #0 - 8028aa8: 2b00 cmp r3, #0 - 8028aaa: d02b beq.n 8028b04 + 8028a32: 687b ldr r3, [r7, #4] + 8028a34: 681b ldr r3, [r3, #0] + 8028a36: 4a2f ldr r2, [pc, #188] ; (8028af4 ) + 8028a38: 4293 cmp r3, r2 + 8028a3a: d04a beq.n 8028ad2 + 8028a3c: 687b ldr r3, [r7, #4] + 8028a3e: 681b ldr r3, [r3, #0] + 8028a40: 4a2d ldr r2, [pc, #180] ; (8028af8 ) + 8028a42: 4293 cmp r3, r2 + 8028a44: d045 beq.n 8028ad2 + 8028a46: 687b ldr r3, [r7, #4] + 8028a48: 681b ldr r3, [r3, #0] + 8028a4a: 4a2c ldr r2, [pc, #176] ; (8028afc ) + 8028a4c: 4293 cmp r3, r2 + 8028a4e: d040 beq.n 8028ad2 + 8028a50: 687b ldr r3, [r7, #4] + 8028a52: 681b ldr r3, [r3, #0] + 8028a54: 4a2a ldr r2, [pc, #168] ; (8028b00 ) + 8028a56: 4293 cmp r3, r2 + 8028a58: d03b beq.n 8028ad2 + 8028a5a: 687b ldr r3, [r7, #4] + 8028a5c: 681b ldr r3, [r3, #0] + 8028a5e: 4a29 ldr r2, [pc, #164] ; (8028b04 ) + 8028a60: 4293 cmp r3, r2 + 8028a62: d036 beq.n 8028ad2 + 8028a64: 687b ldr r3, [r7, #4] + 8028a66: 681b ldr r3, [r3, #0] + 8028a68: 4a27 ldr r2, [pc, #156] ; (8028b08 ) + 8028a6a: 4293 cmp r3, r2 + 8028a6c: d031 beq.n 8028ad2 + 8028a6e: 687b ldr r3, [r7, #4] + 8028a70: 681b ldr r3, [r3, #0] + 8028a72: 4a26 ldr r2, [pc, #152] ; (8028b0c ) + 8028a74: 4293 cmp r3, r2 + 8028a76: d02c beq.n 8028ad2 + 8028a78: 687b ldr r3, [r7, #4] + 8028a7a: 681b ldr r3, [r3, #0] + 8028a7c: 4a24 ldr r2, [pc, #144] ; (8028b10 ) + 8028a7e: 4293 cmp r3, r2 + 8028a80: d027 beq.n 8028ad2 + 8028a82: 687b ldr r3, [r7, #4] + 8028a84: 681b ldr r3, [r3, #0] + 8028a86: 4a23 ldr r2, [pc, #140] ; (8028b14 ) + 8028a88: 4293 cmp r3, r2 + 8028a8a: d022 beq.n 8028ad2 + 8028a8c: 687b ldr r3, [r7, #4] + 8028a8e: 681b ldr r3, [r3, #0] + 8028a90: 4a21 ldr r2, [pc, #132] ; (8028b18 ) + 8028a92: 4293 cmp r3, r2 + 8028a94: d01d beq.n 8028ad2 + 8028a96: 687b ldr r3, [r7, #4] + 8028a98: 681b ldr r3, [r3, #0] + 8028a9a: 4a20 ldr r2, [pc, #128] ; (8028b1c ) + 8028a9c: 4293 cmp r3, r2 + 8028a9e: d018 beq.n 8028ad2 + 8028aa0: 687b ldr r3, [r7, #4] + 8028aa2: 681b ldr r3, [r3, #0] + 8028aa4: 4a1e ldr r2, [pc, #120] ; (8028b20 ) + 8028aa6: 4293 cmp r3, r2 + 8028aa8: d013 beq.n 8028ad2 + 8028aaa: 687b ldr r3, [r7, #4] + 8028aac: 681b ldr r3, [r3, #0] + 8028aae: 4a1d ldr r2, [pc, #116] ; (8028b24 ) + 8028ab0: 4293 cmp r3, r2 + 8028ab2: d00e beq.n 8028ad2 + 8028ab4: 687b ldr r3, [r7, #4] + 8028ab6: 681b ldr r3, [r3, #0] + 8028ab8: 4a1b ldr r2, [pc, #108] ; (8028b28 ) + 8028aba: 4293 cmp r3, r2 + 8028abc: d009 beq.n 8028ad2 + 8028abe: 687b ldr r3, [r7, #4] + 8028ac0: 681b ldr r3, [r3, #0] + 8028ac2: 4a1a ldr r2, [pc, #104] ; (8028b2c ) + 8028ac4: 4293 cmp r3, r2 + 8028ac6: d004 beq.n 8028ad2 + 8028ac8: 687b ldr r3, [r7, #4] + 8028aca: 681b ldr r3, [r3, #0] + 8028acc: 4a18 ldr r2, [pc, #96] ; (8028b30 ) + 8028ace: 4293 cmp r3, r2 + 8028ad0: d101 bne.n 8028ad6 + 8028ad2: 2301 movs r3, #1 + 8028ad4: e000 b.n 8028ad8 + 8028ad6: 2300 movs r3, #0 + 8028ad8: 2b00 cmp r3, #0 + 8028ada: d02b beq.n 8028b34 { regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress; - 8028aac: 687b ldr r3, [r7, #4] - 8028aae: 6d9b ldr r3, [r3, #88] ; 0x58 - 8028ab0: 60bb str r3, [r7, #8] + 8028adc: 687b ldr r3, [r7, #4] + 8028ade: 6d9b ldr r3, [r3, #88] ; 0x58 + 8028ae0: 60bb str r3, [r7, #8] regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); - 8028ab2: 687b ldr r3, [r7, #4] - 8028ab4: 6ddb ldr r3, [r3, #92] ; 0x5c - 8028ab6: f003 031f and.w r3, r3, #31 - 8028aba: 223f movs r2, #63 ; 0x3f - 8028abc: 409a lsls r2, r3 - 8028abe: 68bb ldr r3, [r7, #8] - 8028ac0: 609a str r2, [r3, #8] - 8028ac2: e02a b.n 8028b1a - 8028ac4: 40020010 .word 0x40020010 - 8028ac8: 40020028 .word 0x40020028 - 8028acc: 40020040 .word 0x40020040 - 8028ad0: 40020058 .word 0x40020058 - 8028ad4: 40020070 .word 0x40020070 - 8028ad8: 40020088 .word 0x40020088 - 8028adc: 400200a0 .word 0x400200a0 - 8028ae0: 400200b8 .word 0x400200b8 - 8028ae4: 40020410 .word 0x40020410 - 8028ae8: 40020428 .word 0x40020428 - 8028aec: 40020440 .word 0x40020440 - 8028af0: 40020458 .word 0x40020458 - 8028af4: 40020470 .word 0x40020470 - 8028af8: 40020488 .word 0x40020488 - 8028afc: 400204a0 .word 0x400204a0 - 8028b00: 400204b8 .word 0x400204b8 + 8028ae2: 687b ldr r3, [r7, #4] + 8028ae4: 6ddb ldr r3, [r3, #92] ; 0x5c + 8028ae6: f003 031f and.w r3, r3, #31 + 8028aea: 223f movs r2, #63 ; 0x3f + 8028aec: 409a lsls r2, r3 + 8028aee: 68bb ldr r3, [r7, #8] + 8028af0: 609a str r2, [r3, #8] + 8028af2: e02a b.n 8028b4a + 8028af4: 40020010 .word 0x40020010 + 8028af8: 40020028 .word 0x40020028 + 8028afc: 40020040 .word 0x40020040 + 8028b00: 40020058 .word 0x40020058 + 8028b04: 40020070 .word 0x40020070 + 8028b08: 40020088 .word 0x40020088 + 8028b0c: 400200a0 .word 0x400200a0 + 8028b10: 400200b8 .word 0x400200b8 + 8028b14: 40020410 .word 0x40020410 + 8028b18: 40020428 .word 0x40020428 + 8028b1c: 40020440 .word 0x40020440 + 8028b20: 40020458 .word 0x40020458 + 8028b24: 40020470 .word 0x40020470 + 8028b28: 40020488 .word 0x40020488 + 8028b2c: 400204a0 .word 0x400204a0 + 8028b30: 400204b8 .word 0x400204b8 } else /* BDMA channel */ { regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress; - 8028b04: 687b ldr r3, [r7, #4] - 8028b06: 6d9b ldr r3, [r3, #88] ; 0x58 - 8028b08: 60fb str r3, [r7, #12] + 8028b34: 687b ldr r3, [r7, #4] + 8028b36: 6d9b ldr r3, [r3, #88] ; 0x58 + 8028b38: 60fb str r3, [r7, #12] regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); - 8028b0a: 687b ldr r3, [r7, #4] - 8028b0c: 6ddb ldr r3, [r3, #92] ; 0x5c - 8028b0e: f003 031f and.w r3, r3, #31 - 8028b12: 2201 movs r2, #1 - 8028b14: 409a lsls r2, r3 - 8028b16: 68fb ldr r3, [r7, #12] - 8028b18: 605a str r2, [r3, #4] + 8028b3a: 687b ldr r3, [r7, #4] + 8028b3c: 6ddb ldr r3, [r3, #92] ; 0x5c + 8028b3e: f003 031f and.w r3, r3, #31 + 8028b42: 2201 movs r2, #1 + 8028b44: 409a lsls r2, r3 + 8028b46: 68fb ldr r3, [r7, #12] + 8028b48: 605a str r2, [r3, #4] } if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 8028b1a: 687b ldr r3, [r7, #4] - 8028b1c: 681b ldr r3, [r3, #0] - 8028b1e: 4a4f ldr r2, [pc, #316] ; (8028c5c ) - 8028b20: 4293 cmp r3, r2 - 8028b22: d072 beq.n 8028c0a - 8028b24: 687b ldr r3, [r7, #4] - 8028b26: 681b ldr r3, [r3, #0] - 8028b28: 4a4d ldr r2, [pc, #308] ; (8028c60 ) - 8028b2a: 4293 cmp r3, r2 - 8028b2c: d06d beq.n 8028c0a - 8028b2e: 687b ldr r3, [r7, #4] - 8028b30: 681b ldr r3, [r3, #0] - 8028b32: 4a4c ldr r2, [pc, #304] ; (8028c64 ) - 8028b34: 4293 cmp r3, r2 - 8028b36: d068 beq.n 8028c0a - 8028b38: 687b ldr r3, [r7, #4] - 8028b3a: 681b ldr r3, [r3, #0] - 8028b3c: 4a4a ldr r2, [pc, #296] ; (8028c68 ) - 8028b3e: 4293 cmp r3, r2 - 8028b40: d063 beq.n 8028c0a - 8028b42: 687b ldr r3, [r7, #4] - 8028b44: 681b ldr r3, [r3, #0] - 8028b46: 4a49 ldr r2, [pc, #292] ; (8028c6c ) - 8028b48: 4293 cmp r3, r2 - 8028b4a: d05e beq.n 8028c0a - 8028b4c: 687b ldr r3, [r7, #4] - 8028b4e: 681b ldr r3, [r3, #0] - 8028b50: 4a47 ldr r2, [pc, #284] ; (8028c70 ) - 8028b52: 4293 cmp r3, r2 - 8028b54: d059 beq.n 8028c0a - 8028b56: 687b ldr r3, [r7, #4] - 8028b58: 681b ldr r3, [r3, #0] - 8028b5a: 4a46 ldr r2, [pc, #280] ; (8028c74 ) - 8028b5c: 4293 cmp r3, r2 - 8028b5e: d054 beq.n 8028c0a - 8028b60: 687b ldr r3, [r7, #4] - 8028b62: 681b ldr r3, [r3, #0] - 8028b64: 4a44 ldr r2, [pc, #272] ; (8028c78 ) - 8028b66: 4293 cmp r3, r2 - 8028b68: d04f beq.n 8028c0a - 8028b6a: 687b ldr r3, [r7, #4] - 8028b6c: 681b ldr r3, [r3, #0] - 8028b6e: 4a43 ldr r2, [pc, #268] ; (8028c7c ) - 8028b70: 4293 cmp r3, r2 - 8028b72: d04a beq.n 8028c0a - 8028b74: 687b ldr r3, [r7, #4] - 8028b76: 681b ldr r3, [r3, #0] - 8028b78: 4a41 ldr r2, [pc, #260] ; (8028c80 ) - 8028b7a: 4293 cmp r3, r2 - 8028b7c: d045 beq.n 8028c0a - 8028b7e: 687b ldr r3, [r7, #4] - 8028b80: 681b ldr r3, [r3, #0] - 8028b82: 4a40 ldr r2, [pc, #256] ; (8028c84 ) - 8028b84: 4293 cmp r3, r2 - 8028b86: d040 beq.n 8028c0a - 8028b88: 687b ldr r3, [r7, #4] - 8028b8a: 681b ldr r3, [r3, #0] - 8028b8c: 4a3e ldr r2, [pc, #248] ; (8028c88 ) - 8028b8e: 4293 cmp r3, r2 - 8028b90: d03b beq.n 8028c0a - 8028b92: 687b ldr r3, [r7, #4] - 8028b94: 681b ldr r3, [r3, #0] - 8028b96: 4a3d ldr r2, [pc, #244] ; (8028c8c ) - 8028b98: 4293 cmp r3, r2 - 8028b9a: d036 beq.n 8028c0a - 8028b9c: 687b ldr r3, [r7, #4] - 8028b9e: 681b ldr r3, [r3, #0] - 8028ba0: 4a3b ldr r2, [pc, #236] ; (8028c90 ) - 8028ba2: 4293 cmp r3, r2 - 8028ba4: d031 beq.n 8028c0a - 8028ba6: 687b ldr r3, [r7, #4] - 8028ba8: 681b ldr r3, [r3, #0] - 8028baa: 4a3a ldr r2, [pc, #232] ; (8028c94 ) - 8028bac: 4293 cmp r3, r2 - 8028bae: d02c beq.n 8028c0a - 8028bb0: 687b ldr r3, [r7, #4] - 8028bb2: 681b ldr r3, [r3, #0] - 8028bb4: 4a38 ldr r2, [pc, #224] ; (8028c98 ) - 8028bb6: 4293 cmp r3, r2 - 8028bb8: d027 beq.n 8028c0a - 8028bba: 687b ldr r3, [r7, #4] - 8028bbc: 681b ldr r3, [r3, #0] - 8028bbe: 4a37 ldr r2, [pc, #220] ; (8028c9c ) - 8028bc0: 4293 cmp r3, r2 - 8028bc2: d022 beq.n 8028c0a - 8028bc4: 687b ldr r3, [r7, #4] - 8028bc6: 681b ldr r3, [r3, #0] - 8028bc8: 4a35 ldr r2, [pc, #212] ; (8028ca0 ) - 8028bca: 4293 cmp r3, r2 - 8028bcc: d01d beq.n 8028c0a - 8028bce: 687b ldr r3, [r7, #4] - 8028bd0: 681b ldr r3, [r3, #0] - 8028bd2: 4a34 ldr r2, [pc, #208] ; (8028ca4 ) - 8028bd4: 4293 cmp r3, r2 - 8028bd6: d018 beq.n 8028c0a - 8028bd8: 687b ldr r3, [r7, #4] - 8028bda: 681b ldr r3, [r3, #0] - 8028bdc: 4a32 ldr r2, [pc, #200] ; (8028ca8 ) - 8028bde: 4293 cmp r3, r2 - 8028be0: d013 beq.n 8028c0a - 8028be2: 687b ldr r3, [r7, #4] - 8028be4: 681b ldr r3, [r3, #0] - 8028be6: 4a31 ldr r2, [pc, #196] ; (8028cac ) - 8028be8: 4293 cmp r3, r2 - 8028bea: d00e beq.n 8028c0a - 8028bec: 687b ldr r3, [r7, #4] - 8028bee: 681b ldr r3, [r3, #0] - 8028bf0: 4a2f ldr r2, [pc, #188] ; (8028cb0 ) - 8028bf2: 4293 cmp r3, r2 - 8028bf4: d009 beq.n 8028c0a - 8028bf6: 687b ldr r3, [r7, #4] - 8028bf8: 681b ldr r3, [r3, #0] - 8028bfa: 4a2e ldr r2, [pc, #184] ; (8028cb4 ) - 8028bfc: 4293 cmp r3, r2 - 8028bfe: d004 beq.n 8028c0a - 8028c00: 687b ldr r3, [r7, #4] - 8028c02: 681b ldr r3, [r3, #0] - 8028c04: 4a2c ldr r2, [pc, #176] ; (8028cb8 ) - 8028c06: 4293 cmp r3, r2 - 8028c08: d101 bne.n 8028c0e - 8028c0a: 2301 movs r3, #1 - 8028c0c: e000 b.n 8028c10 - 8028c0e: 2300 movs r3, #0 - 8028c10: 2b00 cmp r3, #0 - 8028c12: d015 beq.n 8028c40 + 8028b4a: 687b ldr r3, [r7, #4] + 8028b4c: 681b ldr r3, [r3, #0] + 8028b4e: 4a4f ldr r2, [pc, #316] ; (8028c8c ) + 8028b50: 4293 cmp r3, r2 + 8028b52: d072 beq.n 8028c3a + 8028b54: 687b ldr r3, [r7, #4] + 8028b56: 681b ldr r3, [r3, #0] + 8028b58: 4a4d ldr r2, [pc, #308] ; (8028c90 ) + 8028b5a: 4293 cmp r3, r2 + 8028b5c: d06d beq.n 8028c3a + 8028b5e: 687b ldr r3, [r7, #4] + 8028b60: 681b ldr r3, [r3, #0] + 8028b62: 4a4c ldr r2, [pc, #304] ; (8028c94 ) + 8028b64: 4293 cmp r3, r2 + 8028b66: d068 beq.n 8028c3a + 8028b68: 687b ldr r3, [r7, #4] + 8028b6a: 681b ldr r3, [r3, #0] + 8028b6c: 4a4a ldr r2, [pc, #296] ; (8028c98 ) + 8028b6e: 4293 cmp r3, r2 + 8028b70: d063 beq.n 8028c3a + 8028b72: 687b ldr r3, [r7, #4] + 8028b74: 681b ldr r3, [r3, #0] + 8028b76: 4a49 ldr r2, [pc, #292] ; (8028c9c ) + 8028b78: 4293 cmp r3, r2 + 8028b7a: d05e beq.n 8028c3a + 8028b7c: 687b ldr r3, [r7, #4] + 8028b7e: 681b ldr r3, [r3, #0] + 8028b80: 4a47 ldr r2, [pc, #284] ; (8028ca0 ) + 8028b82: 4293 cmp r3, r2 + 8028b84: d059 beq.n 8028c3a + 8028b86: 687b ldr r3, [r7, #4] + 8028b88: 681b ldr r3, [r3, #0] + 8028b8a: 4a46 ldr r2, [pc, #280] ; (8028ca4 ) + 8028b8c: 4293 cmp r3, r2 + 8028b8e: d054 beq.n 8028c3a + 8028b90: 687b ldr r3, [r7, #4] + 8028b92: 681b ldr r3, [r3, #0] + 8028b94: 4a44 ldr r2, [pc, #272] ; (8028ca8 ) + 8028b96: 4293 cmp r3, r2 + 8028b98: d04f beq.n 8028c3a + 8028b9a: 687b ldr r3, [r7, #4] + 8028b9c: 681b ldr r3, [r3, #0] + 8028b9e: 4a43 ldr r2, [pc, #268] ; (8028cac ) + 8028ba0: 4293 cmp r3, r2 + 8028ba2: d04a beq.n 8028c3a + 8028ba4: 687b ldr r3, [r7, #4] + 8028ba6: 681b ldr r3, [r3, #0] + 8028ba8: 4a41 ldr r2, [pc, #260] ; (8028cb0 ) + 8028baa: 4293 cmp r3, r2 + 8028bac: d045 beq.n 8028c3a + 8028bae: 687b ldr r3, [r7, #4] + 8028bb0: 681b ldr r3, [r3, #0] + 8028bb2: 4a40 ldr r2, [pc, #256] ; (8028cb4 ) + 8028bb4: 4293 cmp r3, r2 + 8028bb6: d040 beq.n 8028c3a + 8028bb8: 687b ldr r3, [r7, #4] + 8028bba: 681b ldr r3, [r3, #0] + 8028bbc: 4a3e ldr r2, [pc, #248] ; (8028cb8 ) + 8028bbe: 4293 cmp r3, r2 + 8028bc0: d03b beq.n 8028c3a + 8028bc2: 687b ldr r3, [r7, #4] + 8028bc4: 681b ldr r3, [r3, #0] + 8028bc6: 4a3d ldr r2, [pc, #244] ; (8028cbc ) + 8028bc8: 4293 cmp r3, r2 + 8028bca: d036 beq.n 8028c3a + 8028bcc: 687b ldr r3, [r7, #4] + 8028bce: 681b ldr r3, [r3, #0] + 8028bd0: 4a3b ldr r2, [pc, #236] ; (8028cc0 ) + 8028bd2: 4293 cmp r3, r2 + 8028bd4: d031 beq.n 8028c3a + 8028bd6: 687b ldr r3, [r7, #4] + 8028bd8: 681b ldr r3, [r3, #0] + 8028bda: 4a3a ldr r2, [pc, #232] ; (8028cc4 ) + 8028bdc: 4293 cmp r3, r2 + 8028bde: d02c beq.n 8028c3a + 8028be0: 687b ldr r3, [r7, #4] + 8028be2: 681b ldr r3, [r3, #0] + 8028be4: 4a38 ldr r2, [pc, #224] ; (8028cc8 ) + 8028be6: 4293 cmp r3, r2 + 8028be8: d027 beq.n 8028c3a + 8028bea: 687b ldr r3, [r7, #4] + 8028bec: 681b ldr r3, [r3, #0] + 8028bee: 4a37 ldr r2, [pc, #220] ; (8028ccc ) + 8028bf0: 4293 cmp r3, r2 + 8028bf2: d022 beq.n 8028c3a + 8028bf4: 687b ldr r3, [r7, #4] + 8028bf6: 681b ldr r3, [r3, #0] + 8028bf8: 4a35 ldr r2, [pc, #212] ; (8028cd0 ) + 8028bfa: 4293 cmp r3, r2 + 8028bfc: d01d beq.n 8028c3a + 8028bfe: 687b ldr r3, [r7, #4] + 8028c00: 681b ldr r3, [r3, #0] + 8028c02: 4a34 ldr r2, [pc, #208] ; (8028cd4 ) + 8028c04: 4293 cmp r3, r2 + 8028c06: d018 beq.n 8028c3a + 8028c08: 687b ldr r3, [r7, #4] + 8028c0a: 681b ldr r3, [r3, #0] + 8028c0c: 4a32 ldr r2, [pc, #200] ; (8028cd8 ) + 8028c0e: 4293 cmp r3, r2 + 8028c10: d013 beq.n 8028c3a + 8028c12: 687b ldr r3, [r7, #4] + 8028c14: 681b ldr r3, [r3, #0] + 8028c16: 4a31 ldr r2, [pc, #196] ; (8028cdc ) + 8028c18: 4293 cmp r3, r2 + 8028c1a: d00e beq.n 8028c3a + 8028c1c: 687b ldr r3, [r7, #4] + 8028c1e: 681b ldr r3, [r3, #0] + 8028c20: 4a2f ldr r2, [pc, #188] ; (8028ce0 ) + 8028c22: 4293 cmp r3, r2 + 8028c24: d009 beq.n 8028c3a + 8028c26: 687b ldr r3, [r7, #4] + 8028c28: 681b ldr r3, [r3, #0] + 8028c2a: 4a2e ldr r2, [pc, #184] ; (8028ce4 ) + 8028c2c: 4293 cmp r3, r2 + 8028c2e: d004 beq.n 8028c3a + 8028c30: 687b ldr r3, [r7, #4] + 8028c32: 681b ldr r3, [r3, #0] + 8028c34: 4a2c ldr r2, [pc, #176] ; (8028ce8 ) + 8028c36: 4293 cmp r3, r2 + 8028c38: d101 bne.n 8028c3e + 8028c3a: 2301 movs r3, #1 + 8028c3c: e000 b.n 8028c40 + 8028c3e: 2300 movs r3, #0 + 8028c40: 2b00 cmp r3, #0 + 8028c42: d015 beq.n 8028c70 { /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 8028c14: 687b ldr r3, [r7, #4] - 8028c16: 6e5b ldr r3, [r3, #100] ; 0x64 - 8028c18: 687a ldr r2, [r7, #4] - 8028c1a: 6e92 ldr r2, [r2, #104] ; 0x68 - 8028c1c: 605a str r2, [r3, #4] + 8028c44: 687b ldr r3, [r7, #4] + 8028c46: 6e5b ldr r3, [r3, #100] ; 0x64 + 8028c48: 687a ldr r2, [r7, #4] + 8028c4a: 6e92 ldr r2, [r2, #104] ; 0x68 + 8028c4c: 605a str r2, [r3, #4] if(hdma->DMAmuxRequestGen != 0U) - 8028c1e: 687b ldr r3, [r7, #4] - 8028c20: 6edb ldr r3, [r3, #108] ; 0x6c - 8028c22: 2b00 cmp r3, #0 - 8028c24: d00c beq.n 8028c40 + 8028c4e: 687b ldr r3, [r7, #4] + 8028c50: 6edb ldr r3, [r3, #108] ; 0x6c + 8028c52: 2b00 cmp r3, #0 + 8028c54: d00c beq.n 8028c70 { /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */ /* disable the request gen overrun IT */ hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - 8028c26: 687b ldr r3, [r7, #4] - 8028c28: 6edb ldr r3, [r3, #108] ; 0x6c - 8028c2a: 681a ldr r2, [r3, #0] - 8028c2c: 687b ldr r3, [r7, #4] - 8028c2e: 6edb ldr r3, [r3, #108] ; 0x6c - 8028c30: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8028c34: 601a str r2, [r3, #0] + 8028c56: 687b ldr r3, [r7, #4] + 8028c58: 6edb ldr r3, [r3, #108] ; 0x6c + 8028c5a: 681a ldr r2, [r3, #0] + 8028c5c: 687b ldr r3, [r7, #4] + 8028c5e: 6edb ldr r3, [r3, #108] ; 0x6c + 8028c60: f422 7280 bic.w r2, r2, #256 ; 0x100 + 8028c64: 601a str r2, [r3, #0] /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 8028c36: 687b ldr r3, [r7, #4] - 8028c38: 6f1b ldr r3, [r3, #112] ; 0x70 - 8028c3a: 687a ldr r2, [r7, #4] - 8028c3c: 6f52 ldr r2, [r2, #116] ; 0x74 - 8028c3e: 605a str r2, [r3, #4] + 8028c66: 687b ldr r3, [r7, #4] + 8028c68: 6f1b ldr r3, [r3, #112] ; 0x70 + 8028c6a: 687a ldr r2, [r7, #4] + 8028c6c: 6f52 ldr r2, [r2, #116] ; 0x74 + 8028c6e: 605a str r2, [r3, #4] } } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8028c40: 687b ldr r3, [r7, #4] - 8028c42: 2201 movs r2, #1 - 8028c44: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8028c70: 687b ldr r3, [r7, #4] + 8028c72: 2201 movs r2, #1 + 8028c74: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8028c48: 687b ldr r3, [r7, #4] - 8028c4a: 2200 movs r2, #0 - 8028c4c: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8028c78: 687b ldr r3, [r7, #4] + 8028c7a: 2200 movs r2, #0 + 8028c7c: f883 2034 strb.w r2, [r3, #52] ; 0x34 } return HAL_OK; - 8028c50: 2300 movs r3, #0 -} - 8028c52: 4618 mov r0, r3 - 8028c54: 3718 adds r7, #24 - 8028c56: 46bd mov sp, r7 - 8028c58: bd80 pop {r7, pc} - 8028c5a: bf00 nop - 8028c5c: 40020010 .word 0x40020010 - 8028c60: 40020028 .word 0x40020028 - 8028c64: 40020040 .word 0x40020040 - 8028c68: 40020058 .word 0x40020058 - 8028c6c: 40020070 .word 0x40020070 - 8028c70: 40020088 .word 0x40020088 - 8028c74: 400200a0 .word 0x400200a0 - 8028c78: 400200b8 .word 0x400200b8 - 8028c7c: 40020410 .word 0x40020410 - 8028c80: 40020428 .word 0x40020428 - 8028c84: 40020440 .word 0x40020440 - 8028c88: 40020458 .word 0x40020458 - 8028c8c: 40020470 .word 0x40020470 - 8028c90: 40020488 .word 0x40020488 - 8028c94: 400204a0 .word 0x400204a0 - 8028c98: 400204b8 .word 0x400204b8 - 8028c9c: 58025408 .word 0x58025408 - 8028ca0: 5802541c .word 0x5802541c - 8028ca4: 58025430 .word 0x58025430 - 8028ca8: 58025444 .word 0x58025444 - 8028cac: 58025458 .word 0x58025458 - 8028cb0: 5802546c .word 0x5802546c - 8028cb4: 58025480 .word 0x58025480 - 8028cb8: 58025494 .word 0x58025494 - -08028cbc : + 8028c80: 2300 movs r3, #0 +} + 8028c82: 4618 mov r0, r3 + 8028c84: 3718 adds r7, #24 + 8028c86: 46bd mov sp, r7 + 8028c88: bd80 pop {r7, pc} + 8028c8a: bf00 nop + 8028c8c: 40020010 .word 0x40020010 + 8028c90: 40020028 .word 0x40020028 + 8028c94: 40020040 .word 0x40020040 + 8028c98: 40020058 .word 0x40020058 + 8028c9c: 40020070 .word 0x40020070 + 8028ca0: 40020088 .word 0x40020088 + 8028ca4: 400200a0 .word 0x400200a0 + 8028ca8: 400200b8 .word 0x400200b8 + 8028cac: 40020410 .word 0x40020410 + 8028cb0: 40020428 .word 0x40020428 + 8028cb4: 40020440 .word 0x40020440 + 8028cb8: 40020458 .word 0x40020458 + 8028cbc: 40020470 .word 0x40020470 + 8028cc0: 40020488 .word 0x40020488 + 8028cc4: 400204a0 .word 0x400204a0 + 8028cc8: 400204b8 .word 0x400204b8 + 8028ccc: 58025408 .word 0x58025408 + 8028cd0: 5802541c .word 0x5802541c + 8028cd4: 58025430 .word 0x58025430 + 8028cd8: 58025444 .word 0x58025444 + 8028cdc: 58025458 .word 0x58025458 + 8028ce0: 5802546c .word 0x5802546c + 8028ce4: 58025480 .word 0x58025480 + 8028ce8: 58025494 .word 0x58025494 + +08028cec : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 8028cbc: b580 push {r7, lr} - 8028cbe: b084 sub sp, #16 - 8028cc0: af00 add r7, sp, #0 - 8028cc2: 6078 str r0, [r7, #4] + 8028cec: b580 push {r7, lr} + 8028cee: b084 sub sp, #16 + 8028cf0: af00 add r7, sp, #0 + 8028cf2: 6078 str r0, [r7, #4] BDMA_Base_Registers *regs_bdma; /* Check the DMA peripheral handle */ if(hdma == NULL) - 8028cc4: 687b ldr r3, [r7, #4] - 8028cc6: 2b00 cmp r3, #0 - 8028cc8: d101 bne.n 8028cce + 8028cf4: 687b ldr r3, [r7, #4] + 8028cf6: 2b00 cmp r3, #0 + 8028cf8: d101 bne.n 8028cfe { return HAL_ERROR; - 8028cca: 2301 movs r3, #1 - 8028ccc: e237 b.n 802913e + 8028cfa: 2301 movs r3, #1 + 8028cfc: e237 b.n 802916e } if(hdma->State != HAL_DMA_STATE_BUSY) - 8028cce: 687b ldr r3, [r7, #4] - 8028cd0: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 8028cd4: b2db uxtb r3, r3 - 8028cd6: 2b02 cmp r3, #2 - 8028cd8: d004 beq.n 8028ce4 + 8028cfe: 687b ldr r3, [r7, #4] + 8028d00: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8028d04: b2db uxtb r3, r3 + 8028d06: 2b02 cmp r3, #2 + 8028d08: d004 beq.n 8028d14 { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8028cda: 687b ldr r3, [r7, #4] - 8028cdc: 2280 movs r2, #128 ; 0x80 - 8028cde: 655a str r2, [r3, #84] ; 0x54 + 8028d0a: 687b ldr r3, [r7, #4] + 8028d0c: 2280 movs r2, #128 ; 0x80 + 8028d0e: 655a str r2, [r3, #84] ; 0x54 return HAL_ERROR; - 8028ce0: 2301 movs r3, #1 - 8028ce2: e22c b.n 802913e + 8028d10: 2301 movs r3, #1 + 8028d12: e22c b.n 802916e } else { if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 8028ce4: 687b ldr r3, [r7, #4] - 8028ce6: 681b ldr r3, [r3, #0] - 8028ce8: 4a5c ldr r2, [pc, #368] ; (8028e5c ) - 8028cea: 4293 cmp r3, r2 - 8028cec: d04a beq.n 8028d84 - 8028cee: 687b ldr r3, [r7, #4] - 8028cf0: 681b ldr r3, [r3, #0] - 8028cf2: 4a5b ldr r2, [pc, #364] ; (8028e60 ) - 8028cf4: 4293 cmp r3, r2 - 8028cf6: d045 beq.n 8028d84 - 8028cf8: 687b ldr r3, [r7, #4] - 8028cfa: 681b ldr r3, [r3, #0] - 8028cfc: 4a59 ldr r2, [pc, #356] ; (8028e64 ) - 8028cfe: 4293 cmp r3, r2 - 8028d00: d040 beq.n 8028d84 - 8028d02: 687b ldr r3, [r7, #4] - 8028d04: 681b ldr r3, [r3, #0] - 8028d06: 4a58 ldr r2, [pc, #352] ; (8028e68 ) - 8028d08: 4293 cmp r3, r2 - 8028d0a: d03b beq.n 8028d84 - 8028d0c: 687b ldr r3, [r7, #4] - 8028d0e: 681b ldr r3, [r3, #0] - 8028d10: 4a56 ldr r2, [pc, #344] ; (8028e6c ) - 8028d12: 4293 cmp r3, r2 - 8028d14: d036 beq.n 8028d84 - 8028d16: 687b ldr r3, [r7, #4] - 8028d18: 681b ldr r3, [r3, #0] - 8028d1a: 4a55 ldr r2, [pc, #340] ; (8028e70 ) - 8028d1c: 4293 cmp r3, r2 - 8028d1e: d031 beq.n 8028d84 - 8028d20: 687b ldr r3, [r7, #4] - 8028d22: 681b ldr r3, [r3, #0] - 8028d24: 4a53 ldr r2, [pc, #332] ; (8028e74 ) - 8028d26: 4293 cmp r3, r2 - 8028d28: d02c beq.n 8028d84 - 8028d2a: 687b ldr r3, [r7, #4] - 8028d2c: 681b ldr r3, [r3, #0] - 8028d2e: 4a52 ldr r2, [pc, #328] ; (8028e78 ) - 8028d30: 4293 cmp r3, r2 - 8028d32: d027 beq.n 8028d84 - 8028d34: 687b ldr r3, [r7, #4] - 8028d36: 681b ldr r3, [r3, #0] - 8028d38: 4a50 ldr r2, [pc, #320] ; (8028e7c ) - 8028d3a: 4293 cmp r3, r2 - 8028d3c: d022 beq.n 8028d84 - 8028d3e: 687b ldr r3, [r7, #4] - 8028d40: 681b ldr r3, [r3, #0] - 8028d42: 4a4f ldr r2, [pc, #316] ; (8028e80 ) - 8028d44: 4293 cmp r3, r2 - 8028d46: d01d beq.n 8028d84 - 8028d48: 687b ldr r3, [r7, #4] - 8028d4a: 681b ldr r3, [r3, #0] - 8028d4c: 4a4d ldr r2, [pc, #308] ; (8028e84 ) - 8028d4e: 4293 cmp r3, r2 - 8028d50: d018 beq.n 8028d84 - 8028d52: 687b ldr r3, [r7, #4] - 8028d54: 681b ldr r3, [r3, #0] - 8028d56: 4a4c ldr r2, [pc, #304] ; (8028e88 ) - 8028d58: 4293 cmp r3, r2 - 8028d5a: d013 beq.n 8028d84 - 8028d5c: 687b ldr r3, [r7, #4] - 8028d5e: 681b ldr r3, [r3, #0] - 8028d60: 4a4a ldr r2, [pc, #296] ; (8028e8c ) - 8028d62: 4293 cmp r3, r2 - 8028d64: d00e beq.n 8028d84 - 8028d66: 687b ldr r3, [r7, #4] - 8028d68: 681b ldr r3, [r3, #0] - 8028d6a: 4a49 ldr r2, [pc, #292] ; (8028e90 ) - 8028d6c: 4293 cmp r3, r2 - 8028d6e: d009 beq.n 8028d84 - 8028d70: 687b ldr r3, [r7, #4] - 8028d72: 681b ldr r3, [r3, #0] - 8028d74: 4a47 ldr r2, [pc, #284] ; (8028e94 ) - 8028d76: 4293 cmp r3, r2 - 8028d78: d004 beq.n 8028d84 - 8028d7a: 687b ldr r3, [r7, #4] - 8028d7c: 681b ldr r3, [r3, #0] - 8028d7e: 4a46 ldr r2, [pc, #280] ; (8028e98 ) - 8028d80: 4293 cmp r3, r2 - 8028d82: d101 bne.n 8028d88 - 8028d84: 2301 movs r3, #1 - 8028d86: e000 b.n 8028d8a - 8028d88: 2300 movs r3, #0 - 8028d8a: 2b00 cmp r3, #0 - 8028d8c: f000 8086 beq.w 8028e9c + 8028d14: 687b ldr r3, [r7, #4] + 8028d16: 681b ldr r3, [r3, #0] + 8028d18: 4a5c ldr r2, [pc, #368] ; (8028e8c ) + 8028d1a: 4293 cmp r3, r2 + 8028d1c: d04a beq.n 8028db4 + 8028d1e: 687b ldr r3, [r7, #4] + 8028d20: 681b ldr r3, [r3, #0] + 8028d22: 4a5b ldr r2, [pc, #364] ; (8028e90 ) + 8028d24: 4293 cmp r3, r2 + 8028d26: d045 beq.n 8028db4 + 8028d28: 687b ldr r3, [r7, #4] + 8028d2a: 681b ldr r3, [r3, #0] + 8028d2c: 4a59 ldr r2, [pc, #356] ; (8028e94 ) + 8028d2e: 4293 cmp r3, r2 + 8028d30: d040 beq.n 8028db4 + 8028d32: 687b ldr r3, [r7, #4] + 8028d34: 681b ldr r3, [r3, #0] + 8028d36: 4a58 ldr r2, [pc, #352] ; (8028e98 ) + 8028d38: 4293 cmp r3, r2 + 8028d3a: d03b beq.n 8028db4 + 8028d3c: 687b ldr r3, [r7, #4] + 8028d3e: 681b ldr r3, [r3, #0] + 8028d40: 4a56 ldr r2, [pc, #344] ; (8028e9c ) + 8028d42: 4293 cmp r3, r2 + 8028d44: d036 beq.n 8028db4 + 8028d46: 687b ldr r3, [r7, #4] + 8028d48: 681b ldr r3, [r3, #0] + 8028d4a: 4a55 ldr r2, [pc, #340] ; (8028ea0 ) + 8028d4c: 4293 cmp r3, r2 + 8028d4e: d031 beq.n 8028db4 + 8028d50: 687b ldr r3, [r7, #4] + 8028d52: 681b ldr r3, [r3, #0] + 8028d54: 4a53 ldr r2, [pc, #332] ; (8028ea4 ) + 8028d56: 4293 cmp r3, r2 + 8028d58: d02c beq.n 8028db4 + 8028d5a: 687b ldr r3, [r7, #4] + 8028d5c: 681b ldr r3, [r3, #0] + 8028d5e: 4a52 ldr r2, [pc, #328] ; (8028ea8 ) + 8028d60: 4293 cmp r3, r2 + 8028d62: d027 beq.n 8028db4 + 8028d64: 687b ldr r3, [r7, #4] + 8028d66: 681b ldr r3, [r3, #0] + 8028d68: 4a50 ldr r2, [pc, #320] ; (8028eac ) + 8028d6a: 4293 cmp r3, r2 + 8028d6c: d022 beq.n 8028db4 + 8028d6e: 687b ldr r3, [r7, #4] + 8028d70: 681b ldr r3, [r3, #0] + 8028d72: 4a4f ldr r2, [pc, #316] ; (8028eb0 ) + 8028d74: 4293 cmp r3, r2 + 8028d76: d01d beq.n 8028db4 + 8028d78: 687b ldr r3, [r7, #4] + 8028d7a: 681b ldr r3, [r3, #0] + 8028d7c: 4a4d ldr r2, [pc, #308] ; (8028eb4 ) + 8028d7e: 4293 cmp r3, r2 + 8028d80: d018 beq.n 8028db4 + 8028d82: 687b ldr r3, [r7, #4] + 8028d84: 681b ldr r3, [r3, #0] + 8028d86: 4a4c ldr r2, [pc, #304] ; (8028eb8 ) + 8028d88: 4293 cmp r3, r2 + 8028d8a: d013 beq.n 8028db4 + 8028d8c: 687b ldr r3, [r7, #4] + 8028d8e: 681b ldr r3, [r3, #0] + 8028d90: 4a4a ldr r2, [pc, #296] ; (8028ebc ) + 8028d92: 4293 cmp r3, r2 + 8028d94: d00e beq.n 8028db4 + 8028d96: 687b ldr r3, [r7, #4] + 8028d98: 681b ldr r3, [r3, #0] + 8028d9a: 4a49 ldr r2, [pc, #292] ; (8028ec0 ) + 8028d9c: 4293 cmp r3, r2 + 8028d9e: d009 beq.n 8028db4 + 8028da0: 687b ldr r3, [r7, #4] + 8028da2: 681b ldr r3, [r3, #0] + 8028da4: 4a47 ldr r2, [pc, #284] ; (8028ec4 ) + 8028da6: 4293 cmp r3, r2 + 8028da8: d004 beq.n 8028db4 + 8028daa: 687b ldr r3, [r7, #4] + 8028dac: 681b ldr r3, [r3, #0] + 8028dae: 4a46 ldr r2, [pc, #280] ; (8028ec8 ) + 8028db0: 4293 cmp r3, r2 + 8028db2: d101 bne.n 8028db8 + 8028db4: 2301 movs r3, #1 + 8028db6: e000 b.n 8028dba + 8028db8: 2300 movs r3, #0 + 8028dba: 2b00 cmp r3, #0 + 8028dbc: f000 8086 beq.w 8028ecc { /* Set Abort State */ hdma->State = HAL_DMA_STATE_ABORT; - 8028d90: 687b ldr r3, [r7, #4] - 8028d92: 2204 movs r2, #4 - 8028d94: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8028dc0: 687b ldr r3, [r7, #4] + 8028dc2: 2204 movs r2, #4 + 8028dc4: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Disable the stream */ __HAL_DMA_DISABLE(hdma); - 8028d98: 687b ldr r3, [r7, #4] - 8028d9a: 681b ldr r3, [r3, #0] - 8028d9c: 4a2f ldr r2, [pc, #188] ; (8028e5c ) - 8028d9e: 4293 cmp r3, r2 - 8028da0: d04a beq.n 8028e38 - 8028da2: 687b ldr r3, [r7, #4] - 8028da4: 681b ldr r3, [r3, #0] - 8028da6: 4a2e ldr r2, [pc, #184] ; (8028e60 ) - 8028da8: 4293 cmp r3, r2 - 8028daa: d045 beq.n 8028e38 - 8028dac: 687b ldr r3, [r7, #4] - 8028dae: 681b ldr r3, [r3, #0] - 8028db0: 4a2c ldr r2, [pc, #176] ; (8028e64 ) - 8028db2: 4293 cmp r3, r2 - 8028db4: d040 beq.n 8028e38 - 8028db6: 687b ldr r3, [r7, #4] - 8028db8: 681b ldr r3, [r3, #0] - 8028dba: 4a2b ldr r2, [pc, #172] ; (8028e68 ) - 8028dbc: 4293 cmp r3, r2 - 8028dbe: d03b beq.n 8028e38 - 8028dc0: 687b ldr r3, [r7, #4] - 8028dc2: 681b ldr r3, [r3, #0] - 8028dc4: 4a29 ldr r2, [pc, #164] ; (8028e6c ) - 8028dc6: 4293 cmp r3, r2 - 8028dc8: d036 beq.n 8028e38 - 8028dca: 687b ldr r3, [r7, #4] - 8028dcc: 681b ldr r3, [r3, #0] - 8028dce: 4a28 ldr r2, [pc, #160] ; (8028e70 ) - 8028dd0: 4293 cmp r3, r2 - 8028dd2: d031 beq.n 8028e38 - 8028dd4: 687b ldr r3, [r7, #4] - 8028dd6: 681b ldr r3, [r3, #0] - 8028dd8: 4a26 ldr r2, [pc, #152] ; (8028e74 ) - 8028dda: 4293 cmp r3, r2 - 8028ddc: d02c beq.n 8028e38 - 8028dde: 687b ldr r3, [r7, #4] - 8028de0: 681b ldr r3, [r3, #0] - 8028de2: 4a25 ldr r2, [pc, #148] ; (8028e78 ) - 8028de4: 4293 cmp r3, r2 - 8028de6: d027 beq.n 8028e38 - 8028de8: 687b ldr r3, [r7, #4] - 8028dea: 681b ldr r3, [r3, #0] - 8028dec: 4a23 ldr r2, [pc, #140] ; (8028e7c ) - 8028dee: 4293 cmp r3, r2 - 8028df0: d022 beq.n 8028e38 - 8028df2: 687b ldr r3, [r7, #4] - 8028df4: 681b ldr r3, [r3, #0] - 8028df6: 4a22 ldr r2, [pc, #136] ; (8028e80 ) - 8028df8: 4293 cmp r3, r2 - 8028dfa: d01d beq.n 8028e38 - 8028dfc: 687b ldr r3, [r7, #4] - 8028dfe: 681b ldr r3, [r3, #0] - 8028e00: 4a20 ldr r2, [pc, #128] ; (8028e84 ) - 8028e02: 4293 cmp r3, r2 - 8028e04: d018 beq.n 8028e38 - 8028e06: 687b ldr r3, [r7, #4] - 8028e08: 681b ldr r3, [r3, #0] - 8028e0a: 4a1f ldr r2, [pc, #124] ; (8028e88 ) - 8028e0c: 4293 cmp r3, r2 - 8028e0e: d013 beq.n 8028e38 - 8028e10: 687b ldr r3, [r7, #4] - 8028e12: 681b ldr r3, [r3, #0] - 8028e14: 4a1d ldr r2, [pc, #116] ; (8028e8c ) - 8028e16: 4293 cmp r3, r2 - 8028e18: d00e beq.n 8028e38 - 8028e1a: 687b ldr r3, [r7, #4] - 8028e1c: 681b ldr r3, [r3, #0] - 8028e1e: 4a1c ldr r2, [pc, #112] ; (8028e90 ) - 8028e20: 4293 cmp r3, r2 - 8028e22: d009 beq.n 8028e38 - 8028e24: 687b ldr r3, [r7, #4] - 8028e26: 681b ldr r3, [r3, #0] - 8028e28: 4a1a ldr r2, [pc, #104] ; (8028e94 ) - 8028e2a: 4293 cmp r3, r2 - 8028e2c: d004 beq.n 8028e38 - 8028e2e: 687b ldr r3, [r7, #4] - 8028e30: 681b ldr r3, [r3, #0] - 8028e32: 4a19 ldr r2, [pc, #100] ; (8028e98 ) - 8028e34: 4293 cmp r3, r2 - 8028e36: d108 bne.n 8028e4a - 8028e38: 687b ldr r3, [r7, #4] - 8028e3a: 681b ldr r3, [r3, #0] - 8028e3c: 681a ldr r2, [r3, #0] - 8028e3e: 687b ldr r3, [r7, #4] - 8028e40: 681b ldr r3, [r3, #0] - 8028e42: f022 0201 bic.w r2, r2, #1 - 8028e46: 601a str r2, [r3, #0] - 8028e48: e178 b.n 802913c + 8028dc8: 687b ldr r3, [r7, #4] + 8028dca: 681b ldr r3, [r3, #0] + 8028dcc: 4a2f ldr r2, [pc, #188] ; (8028e8c ) + 8028dce: 4293 cmp r3, r2 + 8028dd0: d04a beq.n 8028e68 + 8028dd2: 687b ldr r3, [r7, #4] + 8028dd4: 681b ldr r3, [r3, #0] + 8028dd6: 4a2e ldr r2, [pc, #184] ; (8028e90 ) + 8028dd8: 4293 cmp r3, r2 + 8028dda: d045 beq.n 8028e68 + 8028ddc: 687b ldr r3, [r7, #4] + 8028dde: 681b ldr r3, [r3, #0] + 8028de0: 4a2c ldr r2, [pc, #176] ; (8028e94 ) + 8028de2: 4293 cmp r3, r2 + 8028de4: d040 beq.n 8028e68 + 8028de6: 687b ldr r3, [r7, #4] + 8028de8: 681b ldr r3, [r3, #0] + 8028dea: 4a2b ldr r2, [pc, #172] ; (8028e98 ) + 8028dec: 4293 cmp r3, r2 + 8028dee: d03b beq.n 8028e68 + 8028df0: 687b ldr r3, [r7, #4] + 8028df2: 681b ldr r3, [r3, #0] + 8028df4: 4a29 ldr r2, [pc, #164] ; (8028e9c ) + 8028df6: 4293 cmp r3, r2 + 8028df8: d036 beq.n 8028e68 + 8028dfa: 687b ldr r3, [r7, #4] + 8028dfc: 681b ldr r3, [r3, #0] + 8028dfe: 4a28 ldr r2, [pc, #160] ; (8028ea0 ) + 8028e00: 4293 cmp r3, r2 + 8028e02: d031 beq.n 8028e68 + 8028e04: 687b ldr r3, [r7, #4] + 8028e06: 681b ldr r3, [r3, #0] + 8028e08: 4a26 ldr r2, [pc, #152] ; (8028ea4 ) + 8028e0a: 4293 cmp r3, r2 + 8028e0c: d02c beq.n 8028e68 + 8028e0e: 687b ldr r3, [r7, #4] + 8028e10: 681b ldr r3, [r3, #0] + 8028e12: 4a25 ldr r2, [pc, #148] ; (8028ea8 ) + 8028e14: 4293 cmp r3, r2 + 8028e16: d027 beq.n 8028e68 + 8028e18: 687b ldr r3, [r7, #4] + 8028e1a: 681b ldr r3, [r3, #0] + 8028e1c: 4a23 ldr r2, [pc, #140] ; (8028eac ) + 8028e1e: 4293 cmp r3, r2 + 8028e20: d022 beq.n 8028e68 + 8028e22: 687b ldr r3, [r7, #4] + 8028e24: 681b ldr r3, [r3, #0] + 8028e26: 4a22 ldr r2, [pc, #136] ; (8028eb0 ) + 8028e28: 4293 cmp r3, r2 + 8028e2a: d01d beq.n 8028e68 + 8028e2c: 687b ldr r3, [r7, #4] + 8028e2e: 681b ldr r3, [r3, #0] + 8028e30: 4a20 ldr r2, [pc, #128] ; (8028eb4 ) + 8028e32: 4293 cmp r3, r2 + 8028e34: d018 beq.n 8028e68 + 8028e36: 687b ldr r3, [r7, #4] + 8028e38: 681b ldr r3, [r3, #0] + 8028e3a: 4a1f ldr r2, [pc, #124] ; (8028eb8 ) + 8028e3c: 4293 cmp r3, r2 + 8028e3e: d013 beq.n 8028e68 + 8028e40: 687b ldr r3, [r7, #4] + 8028e42: 681b ldr r3, [r3, #0] + 8028e44: 4a1d ldr r2, [pc, #116] ; (8028ebc ) + 8028e46: 4293 cmp r3, r2 + 8028e48: d00e beq.n 8028e68 8028e4a: 687b ldr r3, [r7, #4] 8028e4c: 681b ldr r3, [r3, #0] - 8028e4e: 681a ldr r2, [r3, #0] - 8028e50: 687b ldr r3, [r7, #4] - 8028e52: 681b ldr r3, [r3, #0] - 8028e54: f022 0201 bic.w r2, r2, #1 - 8028e58: 601a str r2, [r3, #0] - 8028e5a: e16f b.n 802913c - 8028e5c: 40020010 .word 0x40020010 - 8028e60: 40020028 .word 0x40020028 - 8028e64: 40020040 .word 0x40020040 - 8028e68: 40020058 .word 0x40020058 - 8028e6c: 40020070 .word 0x40020070 - 8028e70: 40020088 .word 0x40020088 - 8028e74: 400200a0 .word 0x400200a0 - 8028e78: 400200b8 .word 0x400200b8 - 8028e7c: 40020410 .word 0x40020410 - 8028e80: 40020428 .word 0x40020428 - 8028e84: 40020440 .word 0x40020440 - 8028e88: 40020458 .word 0x40020458 - 8028e8c: 40020470 .word 0x40020470 - 8028e90: 40020488 .word 0x40020488 - 8028e94: 400204a0 .word 0x400204a0 - 8028e98: 400204b8 .word 0x400204b8 + 8028e4e: 4a1c ldr r2, [pc, #112] ; (8028ec0 ) + 8028e50: 4293 cmp r3, r2 + 8028e52: d009 beq.n 8028e68 + 8028e54: 687b ldr r3, [r7, #4] + 8028e56: 681b ldr r3, [r3, #0] + 8028e58: 4a1a ldr r2, [pc, #104] ; (8028ec4 ) + 8028e5a: 4293 cmp r3, r2 + 8028e5c: d004 beq.n 8028e68 + 8028e5e: 687b ldr r3, [r7, #4] + 8028e60: 681b ldr r3, [r3, #0] + 8028e62: 4a19 ldr r2, [pc, #100] ; (8028ec8 ) + 8028e64: 4293 cmp r3, r2 + 8028e66: d108 bne.n 8028e7a + 8028e68: 687b ldr r3, [r7, #4] + 8028e6a: 681b ldr r3, [r3, #0] + 8028e6c: 681a ldr r2, [r3, #0] + 8028e6e: 687b ldr r3, [r7, #4] + 8028e70: 681b ldr r3, [r3, #0] + 8028e72: f022 0201 bic.w r2, r2, #1 + 8028e76: 601a str r2, [r3, #0] + 8028e78: e178 b.n 802916c + 8028e7a: 687b ldr r3, [r7, #4] + 8028e7c: 681b ldr r3, [r3, #0] + 8028e7e: 681a ldr r2, [r3, #0] + 8028e80: 687b ldr r3, [r7, #4] + 8028e82: 681b ldr r3, [r3, #0] + 8028e84: f022 0201 bic.w r2, r2, #1 + 8028e88: 601a str r2, [r3, #0] + 8028e8a: e16f b.n 802916c + 8028e8c: 40020010 .word 0x40020010 + 8028e90: 40020028 .word 0x40020028 + 8028e94: 40020040 .word 0x40020040 + 8028e98: 40020058 .word 0x40020058 + 8028e9c: 40020070 .word 0x40020070 + 8028ea0: 40020088 .word 0x40020088 + 8028ea4: 400200a0 .word 0x400200a0 + 8028ea8: 400200b8 .word 0x400200b8 + 8028eac: 40020410 .word 0x40020410 + 8028eb0: 40020428 .word 0x40020428 + 8028eb4: 40020440 .word 0x40020440 + 8028eb8: 40020458 .word 0x40020458 + 8028ebc: 40020470 .word 0x40020470 + 8028ec0: 40020488 .word 0x40020488 + 8028ec4: 400204a0 .word 0x400204a0 + 8028ec8: 400204b8 .word 0x400204b8 } else /* BDMA channel */ { /* Disable DMA All Interrupts */ ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE); - 8028e9c: 687b ldr r3, [r7, #4] - 8028e9e: 681b ldr r3, [r3, #0] - 8028ea0: 681a ldr r2, [r3, #0] - 8028ea2: 687b ldr r3, [r7, #4] - 8028ea4: 681b ldr r3, [r3, #0] - 8028ea6: f022 020e bic.w r2, r2, #14 - 8028eaa: 601a str r2, [r3, #0] + 8028ecc: 687b ldr r3, [r7, #4] + 8028ece: 681b ldr r3, [r3, #0] + 8028ed0: 681a ldr r2, [r3, #0] + 8028ed2: 687b ldr r3, [r7, #4] + 8028ed4: 681b ldr r3, [r3, #0] + 8028ed6: f022 020e bic.w r2, r2, #14 + 8028eda: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8028eac: 687b ldr r3, [r7, #4] - 8028eae: 681b ldr r3, [r3, #0] - 8028eb0: 4a6c ldr r2, [pc, #432] ; (8029064 ) - 8028eb2: 4293 cmp r3, r2 - 8028eb4: d04a beq.n 8028f4c - 8028eb6: 687b ldr r3, [r7, #4] - 8028eb8: 681b ldr r3, [r3, #0] - 8028eba: 4a6b ldr r2, [pc, #428] ; (8029068 ) - 8028ebc: 4293 cmp r3, r2 - 8028ebe: d045 beq.n 8028f4c - 8028ec0: 687b ldr r3, [r7, #4] - 8028ec2: 681b ldr r3, [r3, #0] - 8028ec4: 4a69 ldr r2, [pc, #420] ; (802906c ) - 8028ec6: 4293 cmp r3, r2 - 8028ec8: d040 beq.n 8028f4c - 8028eca: 687b ldr r3, [r7, #4] - 8028ecc: 681b ldr r3, [r3, #0] - 8028ece: 4a68 ldr r2, [pc, #416] ; (8029070 ) - 8028ed0: 4293 cmp r3, r2 - 8028ed2: d03b beq.n 8028f4c - 8028ed4: 687b ldr r3, [r7, #4] - 8028ed6: 681b ldr r3, [r3, #0] - 8028ed8: 4a66 ldr r2, [pc, #408] ; (8029074 ) - 8028eda: 4293 cmp r3, r2 - 8028edc: d036 beq.n 8028f4c - 8028ede: 687b ldr r3, [r7, #4] - 8028ee0: 681b ldr r3, [r3, #0] - 8028ee2: 4a65 ldr r2, [pc, #404] ; (8029078 ) - 8028ee4: 4293 cmp r3, r2 - 8028ee6: d031 beq.n 8028f4c - 8028ee8: 687b ldr r3, [r7, #4] - 8028eea: 681b ldr r3, [r3, #0] - 8028eec: 4a63 ldr r2, [pc, #396] ; (802907c ) - 8028eee: 4293 cmp r3, r2 - 8028ef0: d02c beq.n 8028f4c - 8028ef2: 687b ldr r3, [r7, #4] - 8028ef4: 681b ldr r3, [r3, #0] - 8028ef6: 4a62 ldr r2, [pc, #392] ; (8029080 ) - 8028ef8: 4293 cmp r3, r2 - 8028efa: d027 beq.n 8028f4c - 8028efc: 687b ldr r3, [r7, #4] - 8028efe: 681b ldr r3, [r3, #0] - 8028f00: 4a60 ldr r2, [pc, #384] ; (8029084 ) - 8028f02: 4293 cmp r3, r2 - 8028f04: d022 beq.n 8028f4c - 8028f06: 687b ldr r3, [r7, #4] - 8028f08: 681b ldr r3, [r3, #0] - 8028f0a: 4a5f ldr r2, [pc, #380] ; (8029088 ) - 8028f0c: 4293 cmp r3, r2 - 8028f0e: d01d beq.n 8028f4c - 8028f10: 687b ldr r3, [r7, #4] - 8028f12: 681b ldr r3, [r3, #0] - 8028f14: 4a5d ldr r2, [pc, #372] ; (802908c ) - 8028f16: 4293 cmp r3, r2 - 8028f18: d018 beq.n 8028f4c - 8028f1a: 687b ldr r3, [r7, #4] - 8028f1c: 681b ldr r3, [r3, #0] - 8028f1e: 4a5c ldr r2, [pc, #368] ; (8029090 ) - 8028f20: 4293 cmp r3, r2 - 8028f22: d013 beq.n 8028f4c - 8028f24: 687b ldr r3, [r7, #4] - 8028f26: 681b ldr r3, [r3, #0] - 8028f28: 4a5a ldr r2, [pc, #360] ; (8029094 ) - 8028f2a: 4293 cmp r3, r2 - 8028f2c: d00e beq.n 8028f4c - 8028f2e: 687b ldr r3, [r7, #4] - 8028f30: 681b ldr r3, [r3, #0] - 8028f32: 4a59 ldr r2, [pc, #356] ; (8029098 ) - 8028f34: 4293 cmp r3, r2 - 8028f36: d009 beq.n 8028f4c - 8028f38: 687b ldr r3, [r7, #4] - 8028f3a: 681b ldr r3, [r3, #0] - 8028f3c: 4a57 ldr r2, [pc, #348] ; (802909c ) - 8028f3e: 4293 cmp r3, r2 - 8028f40: d004 beq.n 8028f4c - 8028f42: 687b ldr r3, [r7, #4] - 8028f44: 681b ldr r3, [r3, #0] - 8028f46: 4a56 ldr r2, [pc, #344] ; (80290a0 ) - 8028f48: 4293 cmp r3, r2 - 8028f4a: d108 bne.n 8028f5e - 8028f4c: 687b ldr r3, [r7, #4] - 8028f4e: 681b ldr r3, [r3, #0] - 8028f50: 681a ldr r2, [r3, #0] - 8028f52: 687b ldr r3, [r7, #4] - 8028f54: 681b ldr r3, [r3, #0] - 8028f56: f022 0201 bic.w r2, r2, #1 - 8028f5a: 601a str r2, [r3, #0] - 8028f5c: e007 b.n 8028f6e + 8028edc: 687b ldr r3, [r7, #4] + 8028ede: 681b ldr r3, [r3, #0] + 8028ee0: 4a6c ldr r2, [pc, #432] ; (8029094 ) + 8028ee2: 4293 cmp r3, r2 + 8028ee4: d04a beq.n 8028f7c + 8028ee6: 687b ldr r3, [r7, #4] + 8028ee8: 681b ldr r3, [r3, #0] + 8028eea: 4a6b ldr r2, [pc, #428] ; (8029098 ) + 8028eec: 4293 cmp r3, r2 + 8028eee: d045 beq.n 8028f7c + 8028ef0: 687b ldr r3, [r7, #4] + 8028ef2: 681b ldr r3, [r3, #0] + 8028ef4: 4a69 ldr r2, [pc, #420] ; (802909c ) + 8028ef6: 4293 cmp r3, r2 + 8028ef8: d040 beq.n 8028f7c + 8028efa: 687b ldr r3, [r7, #4] + 8028efc: 681b ldr r3, [r3, #0] + 8028efe: 4a68 ldr r2, [pc, #416] ; (80290a0 ) + 8028f00: 4293 cmp r3, r2 + 8028f02: d03b beq.n 8028f7c + 8028f04: 687b ldr r3, [r7, #4] + 8028f06: 681b ldr r3, [r3, #0] + 8028f08: 4a66 ldr r2, [pc, #408] ; (80290a4 ) + 8028f0a: 4293 cmp r3, r2 + 8028f0c: d036 beq.n 8028f7c + 8028f0e: 687b ldr r3, [r7, #4] + 8028f10: 681b ldr r3, [r3, #0] + 8028f12: 4a65 ldr r2, [pc, #404] ; (80290a8 ) + 8028f14: 4293 cmp r3, r2 + 8028f16: d031 beq.n 8028f7c + 8028f18: 687b ldr r3, [r7, #4] + 8028f1a: 681b ldr r3, [r3, #0] + 8028f1c: 4a63 ldr r2, [pc, #396] ; (80290ac ) + 8028f1e: 4293 cmp r3, r2 + 8028f20: d02c beq.n 8028f7c + 8028f22: 687b ldr r3, [r7, #4] + 8028f24: 681b ldr r3, [r3, #0] + 8028f26: 4a62 ldr r2, [pc, #392] ; (80290b0 ) + 8028f28: 4293 cmp r3, r2 + 8028f2a: d027 beq.n 8028f7c + 8028f2c: 687b ldr r3, [r7, #4] + 8028f2e: 681b ldr r3, [r3, #0] + 8028f30: 4a60 ldr r2, [pc, #384] ; (80290b4 ) + 8028f32: 4293 cmp r3, r2 + 8028f34: d022 beq.n 8028f7c + 8028f36: 687b ldr r3, [r7, #4] + 8028f38: 681b ldr r3, [r3, #0] + 8028f3a: 4a5f ldr r2, [pc, #380] ; (80290b8 ) + 8028f3c: 4293 cmp r3, r2 + 8028f3e: d01d beq.n 8028f7c + 8028f40: 687b ldr r3, [r7, #4] + 8028f42: 681b ldr r3, [r3, #0] + 8028f44: 4a5d ldr r2, [pc, #372] ; (80290bc ) + 8028f46: 4293 cmp r3, r2 + 8028f48: d018 beq.n 8028f7c + 8028f4a: 687b ldr r3, [r7, #4] + 8028f4c: 681b ldr r3, [r3, #0] + 8028f4e: 4a5c ldr r2, [pc, #368] ; (80290c0 ) + 8028f50: 4293 cmp r3, r2 + 8028f52: d013 beq.n 8028f7c + 8028f54: 687b ldr r3, [r7, #4] + 8028f56: 681b ldr r3, [r3, #0] + 8028f58: 4a5a ldr r2, [pc, #360] ; (80290c4 ) + 8028f5a: 4293 cmp r3, r2 + 8028f5c: d00e beq.n 8028f7c 8028f5e: 687b ldr r3, [r7, #4] 8028f60: 681b ldr r3, [r3, #0] - 8028f62: 681a ldr r2, [r3, #0] - 8028f64: 687b ldr r3, [r7, #4] - 8028f66: 681b ldr r3, [r3, #0] - 8028f68: f022 0201 bic.w r2, r2, #1 - 8028f6c: 601a str r2, [r3, #0] - - if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 8028f6e: 687b ldr r3, [r7, #4] - 8028f70: 681b ldr r3, [r3, #0] - 8028f72: 4a3c ldr r2, [pc, #240] ; (8029064 ) - 8028f74: 4293 cmp r3, r2 - 8028f76: d072 beq.n 802905e - 8028f78: 687b ldr r3, [r7, #4] - 8028f7a: 681b ldr r3, [r3, #0] - 8028f7c: 4a3a ldr r2, [pc, #232] ; (8029068 ) - 8028f7e: 4293 cmp r3, r2 - 8028f80: d06d beq.n 802905e + 8028f62: 4a59 ldr r2, [pc, #356] ; (80290c8 ) + 8028f64: 4293 cmp r3, r2 + 8028f66: d009 beq.n 8028f7c + 8028f68: 687b ldr r3, [r7, #4] + 8028f6a: 681b ldr r3, [r3, #0] + 8028f6c: 4a57 ldr r2, [pc, #348] ; (80290cc ) + 8028f6e: 4293 cmp r3, r2 + 8028f70: d004 beq.n 8028f7c + 8028f72: 687b ldr r3, [r7, #4] + 8028f74: 681b ldr r3, [r3, #0] + 8028f76: 4a56 ldr r2, [pc, #344] ; (80290d0 ) + 8028f78: 4293 cmp r3, r2 + 8028f7a: d108 bne.n 8028f8e + 8028f7c: 687b ldr r3, [r7, #4] + 8028f7e: 681b ldr r3, [r3, #0] + 8028f80: 681a ldr r2, [r3, #0] 8028f82: 687b ldr r3, [r7, #4] 8028f84: 681b ldr r3, [r3, #0] - 8028f86: 4a39 ldr r2, [pc, #228] ; (802906c ) - 8028f88: 4293 cmp r3, r2 - 8028f8a: d068 beq.n 802905e - 8028f8c: 687b ldr r3, [r7, #4] - 8028f8e: 681b ldr r3, [r3, #0] - 8028f90: 4a37 ldr r2, [pc, #220] ; (8029070 ) - 8028f92: 4293 cmp r3, r2 - 8028f94: d063 beq.n 802905e - 8028f96: 687b ldr r3, [r7, #4] - 8028f98: 681b ldr r3, [r3, #0] - 8028f9a: 4a36 ldr r2, [pc, #216] ; (8029074 ) - 8028f9c: 4293 cmp r3, r2 - 8028f9e: d05e beq.n 802905e - 8028fa0: 687b ldr r3, [r7, #4] - 8028fa2: 681b ldr r3, [r3, #0] - 8028fa4: 4a34 ldr r2, [pc, #208] ; (8029078 ) - 8028fa6: 4293 cmp r3, r2 - 8028fa8: d059 beq.n 802905e - 8028faa: 687b ldr r3, [r7, #4] - 8028fac: 681b ldr r3, [r3, #0] - 8028fae: 4a33 ldr r2, [pc, #204] ; (802907c ) - 8028fb0: 4293 cmp r3, r2 - 8028fb2: d054 beq.n 802905e - 8028fb4: 687b ldr r3, [r7, #4] - 8028fb6: 681b ldr r3, [r3, #0] - 8028fb8: 4a31 ldr r2, [pc, #196] ; (8029080 ) - 8028fba: 4293 cmp r3, r2 - 8028fbc: d04f beq.n 802905e - 8028fbe: 687b ldr r3, [r7, #4] - 8028fc0: 681b ldr r3, [r3, #0] - 8028fc2: 4a30 ldr r2, [pc, #192] ; (8029084 ) - 8028fc4: 4293 cmp r3, r2 - 8028fc6: d04a beq.n 802905e - 8028fc8: 687b ldr r3, [r7, #4] - 8028fca: 681b ldr r3, [r3, #0] - 8028fcc: 4a2e ldr r2, [pc, #184] ; (8029088 ) - 8028fce: 4293 cmp r3, r2 - 8028fd0: d045 beq.n 802905e - 8028fd2: 687b ldr r3, [r7, #4] - 8028fd4: 681b ldr r3, [r3, #0] - 8028fd6: 4a2d ldr r2, [pc, #180] ; (802908c ) - 8028fd8: 4293 cmp r3, r2 - 8028fda: d040 beq.n 802905e - 8028fdc: 687b ldr r3, [r7, #4] - 8028fde: 681b ldr r3, [r3, #0] - 8028fe0: 4a2b ldr r2, [pc, #172] ; (8029090 ) - 8028fe2: 4293 cmp r3, r2 - 8028fe4: d03b beq.n 802905e - 8028fe6: 687b ldr r3, [r7, #4] - 8028fe8: 681b ldr r3, [r3, #0] - 8028fea: 4a2a ldr r2, [pc, #168] ; (8029094 ) - 8028fec: 4293 cmp r3, r2 - 8028fee: d036 beq.n 802905e - 8028ff0: 687b ldr r3, [r7, #4] - 8028ff2: 681b ldr r3, [r3, #0] - 8028ff4: 4a28 ldr r2, [pc, #160] ; (8029098 ) - 8028ff6: 4293 cmp r3, r2 - 8028ff8: d031 beq.n 802905e - 8028ffa: 687b ldr r3, [r7, #4] - 8028ffc: 681b ldr r3, [r3, #0] - 8028ffe: 4a27 ldr r2, [pc, #156] ; (802909c ) - 8029000: 4293 cmp r3, r2 - 8029002: d02c beq.n 802905e - 8029004: 687b ldr r3, [r7, #4] - 8029006: 681b ldr r3, [r3, #0] - 8029008: 4a25 ldr r2, [pc, #148] ; (80290a0 ) - 802900a: 4293 cmp r3, r2 - 802900c: d027 beq.n 802905e - 802900e: 687b ldr r3, [r7, #4] - 8029010: 681b ldr r3, [r3, #0] - 8029012: 4a24 ldr r2, [pc, #144] ; (80290a4 ) - 8029014: 4293 cmp r3, r2 - 8029016: d022 beq.n 802905e - 8029018: 687b ldr r3, [r7, #4] - 802901a: 681b ldr r3, [r3, #0] - 802901c: 4a22 ldr r2, [pc, #136] ; (80290a8 ) - 802901e: 4293 cmp r3, r2 - 8029020: d01d beq.n 802905e - 8029022: 687b ldr r3, [r7, #4] - 8029024: 681b ldr r3, [r3, #0] - 8029026: 4a21 ldr r2, [pc, #132] ; (80290ac ) - 8029028: 4293 cmp r3, r2 - 802902a: d018 beq.n 802905e - 802902c: 687b ldr r3, [r7, #4] - 802902e: 681b ldr r3, [r3, #0] - 8029030: 4a1f ldr r2, [pc, #124] ; (80290b0 ) - 8029032: 4293 cmp r3, r2 - 8029034: d013 beq.n 802905e - 8029036: 687b ldr r3, [r7, #4] - 8029038: 681b ldr r3, [r3, #0] - 802903a: 4a1e ldr r2, [pc, #120] ; (80290b4 ) - 802903c: 4293 cmp r3, r2 - 802903e: d00e beq.n 802905e - 8029040: 687b ldr r3, [r7, #4] - 8029042: 681b ldr r3, [r3, #0] - 8029044: 4a1c ldr r2, [pc, #112] ; (80290b8 ) - 8029046: 4293 cmp r3, r2 - 8029048: d009 beq.n 802905e - 802904a: 687b ldr r3, [r7, #4] - 802904c: 681b ldr r3, [r3, #0] - 802904e: 4a1b ldr r2, [pc, #108] ; (80290bc ) - 8029050: 4293 cmp r3, r2 - 8029052: d004 beq.n 802905e - 8029054: 687b ldr r3, [r7, #4] - 8029056: 681b ldr r3, [r3, #0] - 8029058: 4a19 ldr r2, [pc, #100] ; (80290c0 ) - 802905a: 4293 cmp r3, r2 - 802905c: d132 bne.n 80290c4 - 802905e: 2301 movs r3, #1 - 8029060: e031 b.n 80290c6 - 8029062: bf00 nop - 8029064: 40020010 .word 0x40020010 - 8029068: 40020028 .word 0x40020028 - 802906c: 40020040 .word 0x40020040 - 8029070: 40020058 .word 0x40020058 - 8029074: 40020070 .word 0x40020070 - 8029078: 40020088 .word 0x40020088 - 802907c: 400200a0 .word 0x400200a0 - 8029080: 400200b8 .word 0x400200b8 - 8029084: 40020410 .word 0x40020410 - 8029088: 40020428 .word 0x40020428 - 802908c: 40020440 .word 0x40020440 - 8029090: 40020458 .word 0x40020458 - 8029094: 40020470 .word 0x40020470 - 8029098: 40020488 .word 0x40020488 - 802909c: 400204a0 .word 0x400204a0 - 80290a0: 400204b8 .word 0x400204b8 - 80290a4: 58025408 .word 0x58025408 - 80290a8: 5802541c .word 0x5802541c - 80290ac: 58025430 .word 0x58025430 - 80290b0: 58025444 .word 0x58025444 - 80290b4: 58025458 .word 0x58025458 - 80290b8: 5802546c .word 0x5802546c - 80290bc: 58025480 .word 0x58025480 - 80290c0: 58025494 .word 0x58025494 - 80290c4: 2300 movs r3, #0 - 80290c6: 2b00 cmp r3, #0 - 80290c8: d028 beq.n 802911c + 8028f86: f022 0201 bic.w r2, r2, #1 + 8028f8a: 601a str r2, [r3, #0] + 8028f8c: e007 b.n 8028f9e + 8028f8e: 687b ldr r3, [r7, #4] + 8028f90: 681b ldr r3, [r3, #0] + 8028f92: 681a ldr r2, [r3, #0] + 8028f94: 687b ldr r3, [r7, #4] + 8028f96: 681b ldr r3, [r3, #0] + 8028f98: f022 0201 bic.w r2, r2, #1 + 8028f9c: 601a str r2, [r3, #0] + + if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ + 8028f9e: 687b ldr r3, [r7, #4] + 8028fa0: 681b ldr r3, [r3, #0] + 8028fa2: 4a3c ldr r2, [pc, #240] ; (8029094 ) + 8028fa4: 4293 cmp r3, r2 + 8028fa6: d072 beq.n 802908e + 8028fa8: 687b ldr r3, [r7, #4] + 8028faa: 681b ldr r3, [r3, #0] + 8028fac: 4a3a ldr r2, [pc, #232] ; (8029098 ) + 8028fae: 4293 cmp r3, r2 + 8028fb0: d06d beq.n 802908e + 8028fb2: 687b ldr r3, [r7, #4] + 8028fb4: 681b ldr r3, [r3, #0] + 8028fb6: 4a39 ldr r2, [pc, #228] ; (802909c ) + 8028fb8: 4293 cmp r3, r2 + 8028fba: d068 beq.n 802908e + 8028fbc: 687b ldr r3, [r7, #4] + 8028fbe: 681b ldr r3, [r3, #0] + 8028fc0: 4a37 ldr r2, [pc, #220] ; (80290a0 ) + 8028fc2: 4293 cmp r3, r2 + 8028fc4: d063 beq.n 802908e + 8028fc6: 687b ldr r3, [r7, #4] + 8028fc8: 681b ldr r3, [r3, #0] + 8028fca: 4a36 ldr r2, [pc, #216] ; (80290a4 ) + 8028fcc: 4293 cmp r3, r2 + 8028fce: d05e beq.n 802908e + 8028fd0: 687b ldr r3, [r7, #4] + 8028fd2: 681b ldr r3, [r3, #0] + 8028fd4: 4a34 ldr r2, [pc, #208] ; (80290a8 ) + 8028fd6: 4293 cmp r3, r2 + 8028fd8: d059 beq.n 802908e + 8028fda: 687b ldr r3, [r7, #4] + 8028fdc: 681b ldr r3, [r3, #0] + 8028fde: 4a33 ldr r2, [pc, #204] ; (80290ac ) + 8028fe0: 4293 cmp r3, r2 + 8028fe2: d054 beq.n 802908e + 8028fe4: 687b ldr r3, [r7, #4] + 8028fe6: 681b ldr r3, [r3, #0] + 8028fe8: 4a31 ldr r2, [pc, #196] ; (80290b0 ) + 8028fea: 4293 cmp r3, r2 + 8028fec: d04f beq.n 802908e + 8028fee: 687b ldr r3, [r7, #4] + 8028ff0: 681b ldr r3, [r3, #0] + 8028ff2: 4a30 ldr r2, [pc, #192] ; (80290b4 ) + 8028ff4: 4293 cmp r3, r2 + 8028ff6: d04a beq.n 802908e + 8028ff8: 687b ldr r3, [r7, #4] + 8028ffa: 681b ldr r3, [r3, #0] + 8028ffc: 4a2e ldr r2, [pc, #184] ; (80290b8 ) + 8028ffe: 4293 cmp r3, r2 + 8029000: d045 beq.n 802908e + 8029002: 687b ldr r3, [r7, #4] + 8029004: 681b ldr r3, [r3, #0] + 8029006: 4a2d ldr r2, [pc, #180] ; (80290bc ) + 8029008: 4293 cmp r3, r2 + 802900a: d040 beq.n 802908e + 802900c: 687b ldr r3, [r7, #4] + 802900e: 681b ldr r3, [r3, #0] + 8029010: 4a2b ldr r2, [pc, #172] ; (80290c0 ) + 8029012: 4293 cmp r3, r2 + 8029014: d03b beq.n 802908e + 8029016: 687b ldr r3, [r7, #4] + 8029018: 681b ldr r3, [r3, #0] + 802901a: 4a2a ldr r2, [pc, #168] ; (80290c4 ) + 802901c: 4293 cmp r3, r2 + 802901e: d036 beq.n 802908e + 8029020: 687b ldr r3, [r7, #4] + 8029022: 681b ldr r3, [r3, #0] + 8029024: 4a28 ldr r2, [pc, #160] ; (80290c8 ) + 8029026: 4293 cmp r3, r2 + 8029028: d031 beq.n 802908e + 802902a: 687b ldr r3, [r7, #4] + 802902c: 681b ldr r3, [r3, #0] + 802902e: 4a27 ldr r2, [pc, #156] ; (80290cc ) + 8029030: 4293 cmp r3, r2 + 8029032: d02c beq.n 802908e + 8029034: 687b ldr r3, [r7, #4] + 8029036: 681b ldr r3, [r3, #0] + 8029038: 4a25 ldr r2, [pc, #148] ; (80290d0 ) + 802903a: 4293 cmp r3, r2 + 802903c: d027 beq.n 802908e + 802903e: 687b ldr r3, [r7, #4] + 8029040: 681b ldr r3, [r3, #0] + 8029042: 4a24 ldr r2, [pc, #144] ; (80290d4 ) + 8029044: 4293 cmp r3, r2 + 8029046: d022 beq.n 802908e + 8029048: 687b ldr r3, [r7, #4] + 802904a: 681b ldr r3, [r3, #0] + 802904c: 4a22 ldr r2, [pc, #136] ; (80290d8 ) + 802904e: 4293 cmp r3, r2 + 8029050: d01d beq.n 802908e + 8029052: 687b ldr r3, [r7, #4] + 8029054: 681b ldr r3, [r3, #0] + 8029056: 4a21 ldr r2, [pc, #132] ; (80290dc ) + 8029058: 4293 cmp r3, r2 + 802905a: d018 beq.n 802908e + 802905c: 687b ldr r3, [r7, #4] + 802905e: 681b ldr r3, [r3, #0] + 8029060: 4a1f ldr r2, [pc, #124] ; (80290e0 ) + 8029062: 4293 cmp r3, r2 + 8029064: d013 beq.n 802908e + 8029066: 687b ldr r3, [r7, #4] + 8029068: 681b ldr r3, [r3, #0] + 802906a: 4a1e ldr r2, [pc, #120] ; (80290e4 ) + 802906c: 4293 cmp r3, r2 + 802906e: d00e beq.n 802908e + 8029070: 687b ldr r3, [r7, #4] + 8029072: 681b ldr r3, [r3, #0] + 8029074: 4a1c ldr r2, [pc, #112] ; (80290e8 ) + 8029076: 4293 cmp r3, r2 + 8029078: d009 beq.n 802908e + 802907a: 687b ldr r3, [r7, #4] + 802907c: 681b ldr r3, [r3, #0] + 802907e: 4a1b ldr r2, [pc, #108] ; (80290ec ) + 8029080: 4293 cmp r3, r2 + 8029082: d004 beq.n 802908e + 8029084: 687b ldr r3, [r7, #4] + 8029086: 681b ldr r3, [r3, #0] + 8029088: 4a19 ldr r2, [pc, #100] ; (80290f0 ) + 802908a: 4293 cmp r3, r2 + 802908c: d132 bne.n 80290f4 + 802908e: 2301 movs r3, #1 + 8029090: e031 b.n 80290f6 + 8029092: bf00 nop + 8029094: 40020010 .word 0x40020010 + 8029098: 40020028 .word 0x40020028 + 802909c: 40020040 .word 0x40020040 + 80290a0: 40020058 .word 0x40020058 + 80290a4: 40020070 .word 0x40020070 + 80290a8: 40020088 .word 0x40020088 + 80290ac: 400200a0 .word 0x400200a0 + 80290b0: 400200b8 .word 0x400200b8 + 80290b4: 40020410 .word 0x40020410 + 80290b8: 40020428 .word 0x40020428 + 80290bc: 40020440 .word 0x40020440 + 80290c0: 40020458 .word 0x40020458 + 80290c4: 40020470 .word 0x40020470 + 80290c8: 40020488 .word 0x40020488 + 80290cc: 400204a0 .word 0x400204a0 + 80290d0: 400204b8 .word 0x400204b8 + 80290d4: 58025408 .word 0x58025408 + 80290d8: 5802541c .word 0x5802541c + 80290dc: 58025430 .word 0x58025430 + 80290e0: 58025444 .word 0x58025444 + 80290e4: 58025458 .word 0x58025458 + 80290e8: 5802546c .word 0x5802546c + 80290ec: 58025480 .word 0x58025480 + 80290f0: 58025494 .word 0x58025494 + 80290f4: 2300 movs r3, #0 + 80290f6: 2b00 cmp r3, #0 + 80290f8: d028 beq.n 802914c { /* disable the DMAMUX sync overrun IT */ hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - 80290ca: 687b ldr r3, [r7, #4] - 80290cc: 6e1b ldr r3, [r3, #96] ; 0x60 - 80290ce: 681a ldr r2, [r3, #0] - 80290d0: 687b ldr r3, [r7, #4] - 80290d2: 6e1b ldr r3, [r3, #96] ; 0x60 - 80290d4: f422 7280 bic.w r2, r2, #256 ; 0x100 - 80290d8: 601a str r2, [r3, #0] + 80290fa: 687b ldr r3, [r7, #4] + 80290fc: 6e1b ldr r3, [r3, #96] ; 0x60 + 80290fe: 681a ldr r2, [r3, #0] + 8029100: 687b ldr r3, [r7, #4] + 8029102: 6e1b ldr r3, [r3, #96] ; 0x60 + 8029104: f422 7280 bic.w r2, r2, #256 ; 0x100 + 8029108: 601a str r2, [r3, #0] /* Clear all flags */ regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress; - 80290da: 687b ldr r3, [r7, #4] - 80290dc: 6d9b ldr r3, [r3, #88] ; 0x58 - 80290de: 60fb str r3, [r7, #12] + 802910a: 687b ldr r3, [r7, #4] + 802910c: 6d9b ldr r3, [r3, #88] ; 0x58 + 802910e: 60fb str r3, [r7, #12] regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); - 80290e0: 687b ldr r3, [r7, #4] - 80290e2: 6ddb ldr r3, [r3, #92] ; 0x5c - 80290e4: f003 031f and.w r3, r3, #31 - 80290e8: 2201 movs r2, #1 - 80290ea: 409a lsls r2, r3 - 80290ec: 68fb ldr r3, [r7, #12] - 80290ee: 605a str r2, [r3, #4] + 8029110: 687b ldr r3, [r7, #4] + 8029112: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029114: f003 031f and.w r3, r3, #31 + 8029118: 2201 movs r2, #1 + 802911a: 409a lsls r2, r3 + 802911c: 68fb ldr r3, [r7, #12] + 802911e: 605a str r2, [r3, #4] /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 80290f0: 687b ldr r3, [r7, #4] - 80290f2: 6e5b ldr r3, [r3, #100] ; 0x64 - 80290f4: 687a ldr r2, [r7, #4] - 80290f6: 6e92 ldr r2, [r2, #104] ; 0x68 - 80290f8: 605a str r2, [r3, #4] + 8029120: 687b ldr r3, [r7, #4] + 8029122: 6e5b ldr r3, [r3, #100] ; 0x64 + 8029124: 687a ldr r2, [r7, #4] + 8029126: 6e92 ldr r2, [r2, #104] ; 0x68 + 8029128: 605a str r2, [r3, #4] if(hdma->DMAmuxRequestGen != 0U) - 80290fa: 687b ldr r3, [r7, #4] - 80290fc: 6edb ldr r3, [r3, #108] ; 0x6c - 80290fe: 2b00 cmp r3, #0 - 8029100: d00c beq.n 802911c + 802912a: 687b ldr r3, [r7, #4] + 802912c: 6edb ldr r3, [r3, #108] ; 0x6c + 802912e: 2b00 cmp r3, #0 + 8029130: d00c beq.n 802914c { /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/ /* disable the request gen overrun IT */ hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - 8029102: 687b ldr r3, [r7, #4] - 8029104: 6edb ldr r3, [r3, #108] ; 0x6c - 8029106: 681a ldr r2, [r3, #0] - 8029108: 687b ldr r3, [r7, #4] - 802910a: 6edb ldr r3, [r3, #108] ; 0x6c - 802910c: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8029110: 601a str r2, [r3, #0] + 8029132: 687b ldr r3, [r7, #4] + 8029134: 6edb ldr r3, [r3, #108] ; 0x6c + 8029136: 681a ldr r2, [r3, #0] + 8029138: 687b ldr r3, [r7, #4] + 802913a: 6edb ldr r3, [r3, #108] ; 0x6c + 802913c: f422 7280 bic.w r2, r2, #256 ; 0x100 + 8029140: 601a str r2, [r3, #0] /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 8029112: 687b ldr r3, [r7, #4] - 8029114: 6f1b ldr r3, [r3, #112] ; 0x70 - 8029116: 687a ldr r2, [r7, #4] - 8029118: 6f52 ldr r2, [r2, #116] ; 0x74 - 802911a: 605a str r2, [r3, #4] + 8029142: 687b ldr r3, [r7, #4] + 8029144: 6f1b ldr r3, [r3, #112] ; 0x70 + 8029146: 687a ldr r2, [r7, #4] + 8029148: 6f52 ldr r2, [r2, #116] ; 0x74 + 802914a: 605a str r2, [r3, #4] } } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 802911c: 687b ldr r3, [r7, #4] - 802911e: 2201 movs r2, #1 - 8029120: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 802914c: 687b ldr r3, [r7, #4] + 802914e: 2201 movs r2, #1 + 8029150: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029124: 687b ldr r3, [r7, #4] - 8029126: 2200 movs r2, #0 - 8029128: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8029154: 687b ldr r3, [r7, #4] + 8029156: 2200 movs r2, #0 + 8029158: f883 2034 strb.w r2, [r3, #52] ; 0x34 /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) - 802912c: 687b ldr r3, [r7, #4] - 802912e: 6d1b ldr r3, [r3, #80] ; 0x50 - 8029130: 2b00 cmp r3, #0 - 8029132: d003 beq.n 802913c + 802915c: 687b ldr r3, [r7, #4] + 802915e: 6d1b ldr r3, [r3, #80] ; 0x50 + 8029160: 2b00 cmp r3, #0 + 8029162: d003 beq.n 802916c { hdma->XferAbortCallback(hdma); - 8029134: 687b ldr r3, [r7, #4] - 8029136: 6d1b ldr r3, [r3, #80] ; 0x50 - 8029138: 6878 ldr r0, [r7, #4] - 802913a: 4798 blx r3 + 8029164: 687b ldr r3, [r7, #4] + 8029166: 6d1b ldr r3, [r3, #80] ; 0x50 + 8029168: 6878 ldr r0, [r7, #4] + 802916a: 4798 blx r3 } } } return HAL_OK; - 802913c: 2300 movs r3, #0 + 802916c: 2300 movs r3, #0 } - 802913e: 4618 mov r0, r3 - 8029140: 3710 adds r7, #16 - 8029142: 46bd mov sp, r7 - 8029144: bd80 pop {r7, pc} - 8029146: bf00 nop + 802916e: 4618 mov r0, r3 + 8029170: 3710 adds r7, #16 + 8029172: 46bd mov sp, r7 + 8029174: bd80 pop {r7, pc} + 8029176: bf00 nop -08029148 : +08029178 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { - 8029148: b580 push {r7, lr} - 802914a: b08a sub sp, #40 ; 0x28 - 802914c: af00 add r7, sp, #0 - 802914e: 6078 str r0, [r7, #4] + 8029178: b580 push {r7, lr} + 802917a: b08a sub sp, #40 ; 0x28 + 802917c: af00 add r7, sp, #0 + 802917e: 6078 str r0, [r7, #4] uint32_t tmpisr_dma, tmpisr_bdma; uint32_t ccr_reg; __IO uint32_t count = 0U; - 8029150: 2300 movs r3, #0 - 8029152: 60fb str r3, [r7, #12] + 8029180: 2300 movs r3, #0 + 8029182: 60fb str r3, [r7, #12] uint32_t timeout = SystemCoreClock / 9600U; - 8029154: 4b67 ldr r3, [pc, #412] ; (80292f4 ) - 8029156: 681b ldr r3, [r3, #0] - 8029158: 4a67 ldr r2, [pc, #412] ; (80292f8 ) - 802915a: fba2 2303 umull r2, r3, r2, r3 - 802915e: 0a9b lsrs r3, r3, #10 - 8029160: 627b str r3, [r7, #36] ; 0x24 + 8029184: 4b67 ldr r3, [pc, #412] ; (8029324 ) + 8029186: 681b ldr r3, [r3, #0] + 8029188: 4a67 ldr r2, [pc, #412] ; (8029328 ) + 802918a: fba2 2303 umull r2, r3, r2, r3 + 802918e: 0a9b lsrs r3, r3, #10 + 8029190: 627b str r3, [r7, #36] ; 0x24 /* calculate DMA base and stream number */ DMA_Base_Registers *regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress; - 8029162: 687b ldr r3, [r7, #4] - 8029164: 6d9b ldr r3, [r3, #88] ; 0x58 - 8029166: 623b str r3, [r7, #32] + 8029192: 687b ldr r3, [r7, #4] + 8029194: 6d9b ldr r3, [r3, #88] ; 0x58 + 8029196: 623b str r3, [r7, #32] BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress; - 8029168: 687b ldr r3, [r7, #4] - 802916a: 6d9b ldr r3, [r3, #88] ; 0x58 - 802916c: 61fb str r3, [r7, #28] + 8029198: 687b ldr r3, [r7, #4] + 802919a: 6d9b ldr r3, [r3, #88] ; 0x58 + 802919c: 61fb str r3, [r7, #28] tmpisr_dma = regs_dma->ISR; - 802916e: 6a3b ldr r3, [r7, #32] - 8029170: 681b ldr r3, [r3, #0] - 8029172: 61bb str r3, [r7, #24] + 802919e: 6a3b ldr r3, [r7, #32] + 80291a0: 681b ldr r3, [r3, #0] + 80291a2: 61bb str r3, [r7, #24] tmpisr_bdma = regs_bdma->ISR; - 8029174: 69fb ldr r3, [r7, #28] - 8029176: 681b ldr r3, [r3, #0] - 8029178: 617b str r3, [r7, #20] + 80291a4: 69fb ldr r3, [r7, #28] + 80291a6: 681b ldr r3, [r3, #0] + 80291a8: 617b str r3, [r7, #20] if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 802917a: 687b ldr r3, [r7, #4] - 802917c: 681b ldr r3, [r3, #0] - 802917e: 4a5f ldr r2, [pc, #380] ; (80292fc ) - 8029180: 4293 cmp r3, r2 - 8029182: d04a beq.n 802921a - 8029184: 687b ldr r3, [r7, #4] - 8029186: 681b ldr r3, [r3, #0] - 8029188: 4a5d ldr r2, [pc, #372] ; (8029300 ) - 802918a: 4293 cmp r3, r2 - 802918c: d045 beq.n 802921a - 802918e: 687b ldr r3, [r7, #4] - 8029190: 681b ldr r3, [r3, #0] - 8029192: 4a5c ldr r2, [pc, #368] ; (8029304 ) - 8029194: 4293 cmp r3, r2 - 8029196: d040 beq.n 802921a - 8029198: 687b ldr r3, [r7, #4] - 802919a: 681b ldr r3, [r3, #0] - 802919c: 4a5a ldr r2, [pc, #360] ; (8029308 ) - 802919e: 4293 cmp r3, r2 - 80291a0: d03b beq.n 802921a - 80291a2: 687b ldr r3, [r7, #4] - 80291a4: 681b ldr r3, [r3, #0] - 80291a6: 4a59 ldr r2, [pc, #356] ; (802930c ) - 80291a8: 4293 cmp r3, r2 - 80291aa: d036 beq.n 802921a - 80291ac: 687b ldr r3, [r7, #4] - 80291ae: 681b ldr r3, [r3, #0] - 80291b0: 4a57 ldr r2, [pc, #348] ; (8029310 ) - 80291b2: 4293 cmp r3, r2 - 80291b4: d031 beq.n 802921a - 80291b6: 687b ldr r3, [r7, #4] - 80291b8: 681b ldr r3, [r3, #0] - 80291ba: 4a56 ldr r2, [pc, #344] ; (8029314 ) - 80291bc: 4293 cmp r3, r2 - 80291be: d02c beq.n 802921a - 80291c0: 687b ldr r3, [r7, #4] - 80291c2: 681b ldr r3, [r3, #0] - 80291c4: 4a54 ldr r2, [pc, #336] ; (8029318 ) - 80291c6: 4293 cmp r3, r2 - 80291c8: d027 beq.n 802921a - 80291ca: 687b ldr r3, [r7, #4] - 80291cc: 681b ldr r3, [r3, #0] - 80291ce: 4a53 ldr r2, [pc, #332] ; (802931c ) - 80291d0: 4293 cmp r3, r2 - 80291d2: d022 beq.n 802921a - 80291d4: 687b ldr r3, [r7, #4] - 80291d6: 681b ldr r3, [r3, #0] - 80291d8: 4a51 ldr r2, [pc, #324] ; (8029320 ) - 80291da: 4293 cmp r3, r2 - 80291dc: d01d beq.n 802921a - 80291de: 687b ldr r3, [r7, #4] - 80291e0: 681b ldr r3, [r3, #0] - 80291e2: 4a50 ldr r2, [pc, #320] ; (8029324 ) - 80291e4: 4293 cmp r3, r2 - 80291e6: d018 beq.n 802921a - 80291e8: 687b ldr r3, [r7, #4] - 80291ea: 681b ldr r3, [r3, #0] - 80291ec: 4a4e ldr r2, [pc, #312] ; (8029328 ) - 80291ee: 4293 cmp r3, r2 - 80291f0: d013 beq.n 802921a - 80291f2: 687b ldr r3, [r7, #4] - 80291f4: 681b ldr r3, [r3, #0] - 80291f6: 4a4d ldr r2, [pc, #308] ; (802932c ) - 80291f8: 4293 cmp r3, r2 - 80291fa: d00e beq.n 802921a - 80291fc: 687b ldr r3, [r7, #4] - 80291fe: 681b ldr r3, [r3, #0] - 8029200: 4a4b ldr r2, [pc, #300] ; (8029330 ) - 8029202: 4293 cmp r3, r2 - 8029204: d009 beq.n 802921a - 8029206: 687b ldr r3, [r7, #4] - 8029208: 681b ldr r3, [r3, #0] - 802920a: 4a4a ldr r2, [pc, #296] ; (8029334 ) - 802920c: 4293 cmp r3, r2 - 802920e: d004 beq.n 802921a - 8029210: 687b ldr r3, [r7, #4] - 8029212: 681b ldr r3, [r3, #0] - 8029214: 4a48 ldr r2, [pc, #288] ; (8029338 ) - 8029216: 4293 cmp r3, r2 - 8029218: d101 bne.n 802921e - 802921a: 2301 movs r3, #1 - 802921c: e000 b.n 8029220 - 802921e: 2300 movs r3, #0 - 8029220: 2b00 cmp r3, #0 - 8029222: f000 842b beq.w 8029a7c + 80291aa: 687b ldr r3, [r7, #4] + 80291ac: 681b ldr r3, [r3, #0] + 80291ae: 4a5f ldr r2, [pc, #380] ; (802932c ) + 80291b0: 4293 cmp r3, r2 + 80291b2: d04a beq.n 802924a + 80291b4: 687b ldr r3, [r7, #4] + 80291b6: 681b ldr r3, [r3, #0] + 80291b8: 4a5d ldr r2, [pc, #372] ; (8029330 ) + 80291ba: 4293 cmp r3, r2 + 80291bc: d045 beq.n 802924a + 80291be: 687b ldr r3, [r7, #4] + 80291c0: 681b ldr r3, [r3, #0] + 80291c2: 4a5c ldr r2, [pc, #368] ; (8029334 ) + 80291c4: 4293 cmp r3, r2 + 80291c6: d040 beq.n 802924a + 80291c8: 687b ldr r3, [r7, #4] + 80291ca: 681b ldr r3, [r3, #0] + 80291cc: 4a5a ldr r2, [pc, #360] ; (8029338 ) + 80291ce: 4293 cmp r3, r2 + 80291d0: d03b beq.n 802924a + 80291d2: 687b ldr r3, [r7, #4] + 80291d4: 681b ldr r3, [r3, #0] + 80291d6: 4a59 ldr r2, [pc, #356] ; (802933c ) + 80291d8: 4293 cmp r3, r2 + 80291da: d036 beq.n 802924a + 80291dc: 687b ldr r3, [r7, #4] + 80291de: 681b ldr r3, [r3, #0] + 80291e0: 4a57 ldr r2, [pc, #348] ; (8029340 ) + 80291e2: 4293 cmp r3, r2 + 80291e4: d031 beq.n 802924a + 80291e6: 687b ldr r3, [r7, #4] + 80291e8: 681b ldr r3, [r3, #0] + 80291ea: 4a56 ldr r2, [pc, #344] ; (8029344 ) + 80291ec: 4293 cmp r3, r2 + 80291ee: d02c beq.n 802924a + 80291f0: 687b ldr r3, [r7, #4] + 80291f2: 681b ldr r3, [r3, #0] + 80291f4: 4a54 ldr r2, [pc, #336] ; (8029348 ) + 80291f6: 4293 cmp r3, r2 + 80291f8: d027 beq.n 802924a + 80291fa: 687b ldr r3, [r7, #4] + 80291fc: 681b ldr r3, [r3, #0] + 80291fe: 4a53 ldr r2, [pc, #332] ; (802934c ) + 8029200: 4293 cmp r3, r2 + 8029202: d022 beq.n 802924a + 8029204: 687b ldr r3, [r7, #4] + 8029206: 681b ldr r3, [r3, #0] + 8029208: 4a51 ldr r2, [pc, #324] ; (8029350 ) + 802920a: 4293 cmp r3, r2 + 802920c: d01d beq.n 802924a + 802920e: 687b ldr r3, [r7, #4] + 8029210: 681b ldr r3, [r3, #0] + 8029212: 4a50 ldr r2, [pc, #320] ; (8029354 ) + 8029214: 4293 cmp r3, r2 + 8029216: d018 beq.n 802924a + 8029218: 687b ldr r3, [r7, #4] + 802921a: 681b ldr r3, [r3, #0] + 802921c: 4a4e ldr r2, [pc, #312] ; (8029358 ) + 802921e: 4293 cmp r3, r2 + 8029220: d013 beq.n 802924a + 8029222: 687b ldr r3, [r7, #4] + 8029224: 681b ldr r3, [r3, #0] + 8029226: 4a4d ldr r2, [pc, #308] ; (802935c ) + 8029228: 4293 cmp r3, r2 + 802922a: d00e beq.n 802924a + 802922c: 687b ldr r3, [r7, #4] + 802922e: 681b ldr r3, [r3, #0] + 8029230: 4a4b ldr r2, [pc, #300] ; (8029360 ) + 8029232: 4293 cmp r3, r2 + 8029234: d009 beq.n 802924a + 8029236: 687b ldr r3, [r7, #4] + 8029238: 681b ldr r3, [r3, #0] + 802923a: 4a4a ldr r2, [pc, #296] ; (8029364 ) + 802923c: 4293 cmp r3, r2 + 802923e: d004 beq.n 802924a + 8029240: 687b ldr r3, [r7, #4] + 8029242: 681b ldr r3, [r3, #0] + 8029244: 4a48 ldr r2, [pc, #288] ; (8029368 ) + 8029246: 4293 cmp r3, r2 + 8029248: d101 bne.n 802924e + 802924a: 2301 movs r3, #1 + 802924c: e000 b.n 8029250 + 802924e: 2300 movs r3, #0 + 8029250: 2b00 cmp r3, #0 + 8029252: f000 842b beq.w 8029aac { /* Transfer Error Interrupt management ***************************************/ if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 8029226: 687b ldr r3, [r7, #4] - 8029228: 6ddb ldr r3, [r3, #92] ; 0x5c - 802922a: f003 031f and.w r3, r3, #31 - 802922e: 2208 movs r2, #8 - 8029230: 409a lsls r2, r3 - 8029232: 69bb ldr r3, [r7, #24] - 8029234: 4013 ands r3, r2 - 8029236: 2b00 cmp r3, #0 - 8029238: f000 80a2 beq.w 8029380 + 8029256: 687b ldr r3, [r7, #4] + 8029258: 6ddb ldr r3, [r3, #92] ; 0x5c + 802925a: f003 031f and.w r3, r3, #31 + 802925e: 2208 movs r2, #8 + 8029260: 409a lsls r2, r3 + 8029262: 69bb ldr r3, [r7, #24] + 8029264: 4013 ands r3, r2 + 8029266: 2b00 cmp r3, #0 + 8029268: f000 80a2 beq.w 80293b0 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != 0U) - 802923c: 687b ldr r3, [r7, #4] - 802923e: 681b ldr r3, [r3, #0] - 8029240: 4a2e ldr r2, [pc, #184] ; (80292fc ) - 8029242: 4293 cmp r3, r2 - 8029244: d04a beq.n 80292dc - 8029246: 687b ldr r3, [r7, #4] - 8029248: 681b ldr r3, [r3, #0] - 802924a: 4a2d ldr r2, [pc, #180] ; (8029300 ) - 802924c: 4293 cmp r3, r2 - 802924e: d045 beq.n 80292dc - 8029250: 687b ldr r3, [r7, #4] - 8029252: 681b ldr r3, [r3, #0] - 8029254: 4a2b ldr r2, [pc, #172] ; (8029304 ) - 8029256: 4293 cmp r3, r2 - 8029258: d040 beq.n 80292dc - 802925a: 687b ldr r3, [r7, #4] - 802925c: 681b ldr r3, [r3, #0] - 802925e: 4a2a ldr r2, [pc, #168] ; (8029308 ) - 8029260: 4293 cmp r3, r2 - 8029262: d03b beq.n 80292dc - 8029264: 687b ldr r3, [r7, #4] - 8029266: 681b ldr r3, [r3, #0] - 8029268: 4a28 ldr r2, [pc, #160] ; (802930c ) - 802926a: 4293 cmp r3, r2 - 802926c: d036 beq.n 80292dc - 802926e: 687b ldr r3, [r7, #4] - 8029270: 681b ldr r3, [r3, #0] - 8029272: 4a27 ldr r2, [pc, #156] ; (8029310 ) - 8029274: 4293 cmp r3, r2 - 8029276: d031 beq.n 80292dc - 8029278: 687b ldr r3, [r7, #4] - 802927a: 681b ldr r3, [r3, #0] - 802927c: 4a25 ldr r2, [pc, #148] ; (8029314 ) - 802927e: 4293 cmp r3, r2 - 8029280: d02c beq.n 80292dc - 8029282: 687b ldr r3, [r7, #4] - 8029284: 681b ldr r3, [r3, #0] - 8029286: 4a24 ldr r2, [pc, #144] ; (8029318 ) - 8029288: 4293 cmp r3, r2 - 802928a: d027 beq.n 80292dc - 802928c: 687b ldr r3, [r7, #4] - 802928e: 681b ldr r3, [r3, #0] - 8029290: 4a22 ldr r2, [pc, #136] ; (802931c ) - 8029292: 4293 cmp r3, r2 - 8029294: d022 beq.n 80292dc - 8029296: 687b ldr r3, [r7, #4] - 8029298: 681b ldr r3, [r3, #0] - 802929a: 4a21 ldr r2, [pc, #132] ; (8029320 ) - 802929c: 4293 cmp r3, r2 - 802929e: d01d beq.n 80292dc - 80292a0: 687b ldr r3, [r7, #4] - 80292a2: 681b ldr r3, [r3, #0] - 80292a4: 4a1f ldr r2, [pc, #124] ; (8029324 ) - 80292a6: 4293 cmp r3, r2 - 80292a8: d018 beq.n 80292dc - 80292aa: 687b ldr r3, [r7, #4] - 80292ac: 681b ldr r3, [r3, #0] - 80292ae: 4a1e ldr r2, [pc, #120] ; (8029328 ) - 80292b0: 4293 cmp r3, r2 - 80292b2: d013 beq.n 80292dc - 80292b4: 687b ldr r3, [r7, #4] - 80292b6: 681b ldr r3, [r3, #0] - 80292b8: 4a1c ldr r2, [pc, #112] ; (802932c ) - 80292ba: 4293 cmp r3, r2 - 80292bc: d00e beq.n 80292dc - 80292be: 687b ldr r3, [r7, #4] - 80292c0: 681b ldr r3, [r3, #0] - 80292c2: 4a1b ldr r2, [pc, #108] ; (8029330 ) - 80292c4: 4293 cmp r3, r2 - 80292c6: d009 beq.n 80292dc - 80292c8: 687b ldr r3, [r7, #4] - 80292ca: 681b ldr r3, [r3, #0] - 80292cc: 4a19 ldr r2, [pc, #100] ; (8029334 ) - 80292ce: 4293 cmp r3, r2 - 80292d0: d004 beq.n 80292dc - 80292d2: 687b ldr r3, [r7, #4] - 80292d4: 681b ldr r3, [r3, #0] - 80292d6: 4a18 ldr r2, [pc, #96] ; (8029338 ) - 80292d8: 4293 cmp r3, r2 - 80292da: d12f bne.n 802933c - 80292dc: 687b ldr r3, [r7, #4] - 80292de: 681b ldr r3, [r3, #0] - 80292e0: 681b ldr r3, [r3, #0] - 80292e2: f003 0304 and.w r3, r3, #4 - 80292e6: 2b00 cmp r3, #0 - 80292e8: bf14 ite ne - 80292ea: 2301 movne r3, #1 - 80292ec: 2300 moveq r3, #0 - 80292ee: b2db uxtb r3, r3 - 80292f0: e02e b.n 8029350 - 80292f2: bf00 nop - 80292f4: 24000048 .word 0x24000048 - 80292f8: 1b4e81b5 .word 0x1b4e81b5 - 80292fc: 40020010 .word 0x40020010 - 8029300: 40020028 .word 0x40020028 - 8029304: 40020040 .word 0x40020040 - 8029308: 40020058 .word 0x40020058 - 802930c: 40020070 .word 0x40020070 - 8029310: 40020088 .word 0x40020088 - 8029314: 400200a0 .word 0x400200a0 - 8029318: 400200b8 .word 0x400200b8 - 802931c: 40020410 .word 0x40020410 - 8029320: 40020428 .word 0x40020428 - 8029324: 40020440 .word 0x40020440 - 8029328: 40020458 .word 0x40020458 - 802932c: 40020470 .word 0x40020470 - 8029330: 40020488 .word 0x40020488 - 8029334: 400204a0 .word 0x400204a0 - 8029338: 400204b8 .word 0x400204b8 - 802933c: 687b ldr r3, [r7, #4] - 802933e: 681b ldr r3, [r3, #0] - 8029340: 681b ldr r3, [r3, #0] - 8029342: f003 0308 and.w r3, r3, #8 - 8029346: 2b00 cmp r3, #0 - 8029348: bf14 ite ne - 802934a: 2301 movne r3, #1 - 802934c: 2300 moveq r3, #0 - 802934e: b2db uxtb r3, r3 - 8029350: 2b00 cmp r3, #0 - 8029352: d015 beq.n 8029380 + 802926c: 687b ldr r3, [r7, #4] + 802926e: 681b ldr r3, [r3, #0] + 8029270: 4a2e ldr r2, [pc, #184] ; (802932c ) + 8029272: 4293 cmp r3, r2 + 8029274: d04a beq.n 802930c + 8029276: 687b ldr r3, [r7, #4] + 8029278: 681b ldr r3, [r3, #0] + 802927a: 4a2d ldr r2, [pc, #180] ; (8029330 ) + 802927c: 4293 cmp r3, r2 + 802927e: d045 beq.n 802930c + 8029280: 687b ldr r3, [r7, #4] + 8029282: 681b ldr r3, [r3, #0] + 8029284: 4a2b ldr r2, [pc, #172] ; (8029334 ) + 8029286: 4293 cmp r3, r2 + 8029288: d040 beq.n 802930c + 802928a: 687b ldr r3, [r7, #4] + 802928c: 681b ldr r3, [r3, #0] + 802928e: 4a2a ldr r2, [pc, #168] ; (8029338 ) + 8029290: 4293 cmp r3, r2 + 8029292: d03b beq.n 802930c + 8029294: 687b ldr r3, [r7, #4] + 8029296: 681b ldr r3, [r3, #0] + 8029298: 4a28 ldr r2, [pc, #160] ; (802933c ) + 802929a: 4293 cmp r3, r2 + 802929c: d036 beq.n 802930c + 802929e: 687b ldr r3, [r7, #4] + 80292a0: 681b ldr r3, [r3, #0] + 80292a2: 4a27 ldr r2, [pc, #156] ; (8029340 ) + 80292a4: 4293 cmp r3, r2 + 80292a6: d031 beq.n 802930c + 80292a8: 687b ldr r3, [r7, #4] + 80292aa: 681b ldr r3, [r3, #0] + 80292ac: 4a25 ldr r2, [pc, #148] ; (8029344 ) + 80292ae: 4293 cmp r3, r2 + 80292b0: d02c beq.n 802930c + 80292b2: 687b ldr r3, [r7, #4] + 80292b4: 681b ldr r3, [r3, #0] + 80292b6: 4a24 ldr r2, [pc, #144] ; (8029348 ) + 80292b8: 4293 cmp r3, r2 + 80292ba: d027 beq.n 802930c + 80292bc: 687b ldr r3, [r7, #4] + 80292be: 681b ldr r3, [r3, #0] + 80292c0: 4a22 ldr r2, [pc, #136] ; (802934c ) + 80292c2: 4293 cmp r3, r2 + 80292c4: d022 beq.n 802930c + 80292c6: 687b ldr r3, [r7, #4] + 80292c8: 681b ldr r3, [r3, #0] + 80292ca: 4a21 ldr r2, [pc, #132] ; (8029350 ) + 80292cc: 4293 cmp r3, r2 + 80292ce: d01d beq.n 802930c + 80292d0: 687b ldr r3, [r7, #4] + 80292d2: 681b ldr r3, [r3, #0] + 80292d4: 4a1f ldr r2, [pc, #124] ; (8029354 ) + 80292d6: 4293 cmp r3, r2 + 80292d8: d018 beq.n 802930c + 80292da: 687b ldr r3, [r7, #4] + 80292dc: 681b ldr r3, [r3, #0] + 80292de: 4a1e ldr r2, [pc, #120] ; (8029358 ) + 80292e0: 4293 cmp r3, r2 + 80292e2: d013 beq.n 802930c + 80292e4: 687b ldr r3, [r7, #4] + 80292e6: 681b ldr r3, [r3, #0] + 80292e8: 4a1c ldr r2, [pc, #112] ; (802935c ) + 80292ea: 4293 cmp r3, r2 + 80292ec: d00e beq.n 802930c + 80292ee: 687b ldr r3, [r7, #4] + 80292f0: 681b ldr r3, [r3, #0] + 80292f2: 4a1b ldr r2, [pc, #108] ; (8029360 ) + 80292f4: 4293 cmp r3, r2 + 80292f6: d009 beq.n 802930c + 80292f8: 687b ldr r3, [r7, #4] + 80292fa: 681b ldr r3, [r3, #0] + 80292fc: 4a19 ldr r2, [pc, #100] ; (8029364 ) + 80292fe: 4293 cmp r3, r2 + 8029300: d004 beq.n 802930c + 8029302: 687b ldr r3, [r7, #4] + 8029304: 681b ldr r3, [r3, #0] + 8029306: 4a18 ldr r2, [pc, #96] ; (8029368 ) + 8029308: 4293 cmp r3, r2 + 802930a: d12f bne.n 802936c + 802930c: 687b ldr r3, [r7, #4] + 802930e: 681b ldr r3, [r3, #0] + 8029310: 681b ldr r3, [r3, #0] + 8029312: f003 0304 and.w r3, r3, #4 + 8029316: 2b00 cmp r3, #0 + 8029318: bf14 ite ne + 802931a: 2301 movne r3, #1 + 802931c: 2300 moveq r3, #0 + 802931e: b2db uxtb r3, r3 + 8029320: e02e b.n 8029380 + 8029322: bf00 nop + 8029324: 24000048 .word 0x24000048 + 8029328: 1b4e81b5 .word 0x1b4e81b5 + 802932c: 40020010 .word 0x40020010 + 8029330: 40020028 .word 0x40020028 + 8029334: 40020040 .word 0x40020040 + 8029338: 40020058 .word 0x40020058 + 802933c: 40020070 .word 0x40020070 + 8029340: 40020088 .word 0x40020088 + 8029344: 400200a0 .word 0x400200a0 + 8029348: 400200b8 .word 0x400200b8 + 802934c: 40020410 .word 0x40020410 + 8029350: 40020428 .word 0x40020428 + 8029354: 40020440 .word 0x40020440 + 8029358: 40020458 .word 0x40020458 + 802935c: 40020470 .word 0x40020470 + 8029360: 40020488 .word 0x40020488 + 8029364: 400204a0 .word 0x400204a0 + 8029368: 400204b8 .word 0x400204b8 + 802936c: 687b ldr r3, [r7, #4] + 802936e: 681b ldr r3, [r3, #0] + 8029370: 681b ldr r3, [r3, #0] + 8029372: f003 0308 and.w r3, r3, #8 + 8029376: 2b00 cmp r3, #0 + 8029378: bf14 ite ne + 802937a: 2301 movne r3, #1 + 802937c: 2300 moveq r3, #0 + 802937e: b2db uxtb r3, r3 + 8029380: 2b00 cmp r3, #0 + 8029382: d015 beq.n 80293b0 { /* Disable the transfer error interrupt */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TE); - 8029354: 687b ldr r3, [r7, #4] - 8029356: 681b ldr r3, [r3, #0] - 8029358: 681a ldr r2, [r3, #0] - 802935a: 687b ldr r3, [r7, #4] - 802935c: 681b ldr r3, [r3, #0] - 802935e: f022 0204 bic.w r2, r2, #4 - 8029362: 601a str r2, [r3, #0] + 8029384: 687b ldr r3, [r7, #4] + 8029386: 681b ldr r3, [r3, #0] + 8029388: 681a ldr r2, [r3, #0] + 802938a: 687b ldr r3, [r7, #4] + 802938c: 681b ldr r3, [r3, #0] + 802938e: f022 0204 bic.w r2, r2, #4 + 8029392: 601a str r2, [r3, #0] /* Clear the transfer error flag */ regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU); - 8029364: 687b ldr r3, [r7, #4] - 8029366: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029368: f003 031f and.w r3, r3, #31 - 802936c: 2208 movs r2, #8 - 802936e: 409a lsls r2, r3 - 8029370: 6a3b ldr r3, [r7, #32] - 8029372: 609a str r2, [r3, #8] + 8029394: 687b ldr r3, [r7, #4] + 8029396: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029398: f003 031f and.w r3, r3, #31 + 802939c: 2208 movs r2, #8 + 802939e: 409a lsls r2, r3 + 80293a0: 6a3b ldr r3, [r7, #32] + 80293a2: 609a str r2, [r3, #8] /* Update error code */ hdma->ErrorCode |= HAL_DMA_ERROR_TE; - 8029374: 687b ldr r3, [r7, #4] - 8029376: 6d5b ldr r3, [r3, #84] ; 0x54 - 8029378: f043 0201 orr.w r2, r3, #1 - 802937c: 687b ldr r3, [r7, #4] - 802937e: 655a str r2, [r3, #84] ; 0x54 + 80293a4: 687b ldr r3, [r7, #4] + 80293a6: 6d5b ldr r3, [r3, #84] ; 0x54 + 80293a8: f043 0201 orr.w r2, r3, #1 + 80293ac: 687b ldr r3, [r7, #4] + 80293ae: 655a str r2, [r3, #84] ; 0x54 } } /* FIFO Error Interrupt management ******************************************/ if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 8029380: 687b ldr r3, [r7, #4] - 8029382: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029384: f003 031f and.w r3, r3, #31 - 8029388: 69ba ldr r2, [r7, #24] - 802938a: fa22 f303 lsr.w r3, r2, r3 - 802938e: f003 0301 and.w r3, r3, #1 - 8029392: 2b00 cmp r3, #0 - 8029394: d06e beq.n 8029474 + 80293b0: 687b ldr r3, [r7, #4] + 80293b2: 6ddb ldr r3, [r3, #92] ; 0x5c + 80293b4: f003 031f and.w r3, r3, #31 + 80293b8: 69ba ldr r2, [r7, #24] + 80293ba: fa22 f303 lsr.w r3, r2, r3 + 80293be: f003 0301 and.w r3, r3, #1 + 80293c2: 2b00 cmp r3, #0 + 80293c4: d06e beq.n 80294a4 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != 0U) - 8029396: 687b ldr r3, [r7, #4] - 8029398: 681b ldr r3, [r3, #0] - 802939a: 4a69 ldr r2, [pc, #420] ; (8029540 ) - 802939c: 4293 cmp r3, r2 - 802939e: d04a beq.n 8029436 - 80293a0: 687b ldr r3, [r7, #4] - 80293a2: 681b ldr r3, [r3, #0] - 80293a4: 4a67 ldr r2, [pc, #412] ; (8029544 ) - 80293a6: 4293 cmp r3, r2 - 80293a8: d045 beq.n 8029436 - 80293aa: 687b ldr r3, [r7, #4] - 80293ac: 681b ldr r3, [r3, #0] - 80293ae: 4a66 ldr r2, [pc, #408] ; (8029548 ) - 80293b0: 4293 cmp r3, r2 - 80293b2: d040 beq.n 8029436 - 80293b4: 687b ldr r3, [r7, #4] - 80293b6: 681b ldr r3, [r3, #0] - 80293b8: 4a64 ldr r2, [pc, #400] ; (802954c ) - 80293ba: 4293 cmp r3, r2 - 80293bc: d03b beq.n 8029436 - 80293be: 687b ldr r3, [r7, #4] - 80293c0: 681b ldr r3, [r3, #0] - 80293c2: 4a63 ldr r2, [pc, #396] ; (8029550 ) - 80293c4: 4293 cmp r3, r2 - 80293c6: d036 beq.n 8029436 - 80293c8: 687b ldr r3, [r7, #4] - 80293ca: 681b ldr r3, [r3, #0] - 80293cc: 4a61 ldr r2, [pc, #388] ; (8029554 ) - 80293ce: 4293 cmp r3, r2 - 80293d0: d031 beq.n 8029436 - 80293d2: 687b ldr r3, [r7, #4] - 80293d4: 681b ldr r3, [r3, #0] - 80293d6: 4a60 ldr r2, [pc, #384] ; (8029558 ) - 80293d8: 4293 cmp r3, r2 - 80293da: d02c beq.n 8029436 - 80293dc: 687b ldr r3, [r7, #4] - 80293de: 681b ldr r3, [r3, #0] - 80293e0: 4a5e ldr r2, [pc, #376] ; (802955c ) - 80293e2: 4293 cmp r3, r2 - 80293e4: d027 beq.n 8029436 - 80293e6: 687b ldr r3, [r7, #4] - 80293e8: 681b ldr r3, [r3, #0] - 80293ea: 4a5d ldr r2, [pc, #372] ; (8029560 ) - 80293ec: 4293 cmp r3, r2 - 80293ee: d022 beq.n 8029436 - 80293f0: 687b ldr r3, [r7, #4] - 80293f2: 681b ldr r3, [r3, #0] - 80293f4: 4a5b ldr r2, [pc, #364] ; (8029564 ) - 80293f6: 4293 cmp r3, r2 - 80293f8: d01d beq.n 8029436 - 80293fa: 687b ldr r3, [r7, #4] - 80293fc: 681b ldr r3, [r3, #0] - 80293fe: 4a5a ldr r2, [pc, #360] ; (8029568 ) - 8029400: 4293 cmp r3, r2 - 8029402: d018 beq.n 8029436 - 8029404: 687b ldr r3, [r7, #4] - 8029406: 681b ldr r3, [r3, #0] - 8029408: 4a58 ldr r2, [pc, #352] ; (802956c ) - 802940a: 4293 cmp r3, r2 - 802940c: d013 beq.n 8029436 - 802940e: 687b ldr r3, [r7, #4] - 8029410: 681b ldr r3, [r3, #0] - 8029412: 4a57 ldr r2, [pc, #348] ; (8029570 ) - 8029414: 4293 cmp r3, r2 - 8029416: d00e beq.n 8029436 - 8029418: 687b ldr r3, [r7, #4] - 802941a: 681b ldr r3, [r3, #0] - 802941c: 4a55 ldr r2, [pc, #340] ; (8029574 ) - 802941e: 4293 cmp r3, r2 - 8029420: d009 beq.n 8029436 - 8029422: 687b ldr r3, [r7, #4] - 8029424: 681b ldr r3, [r3, #0] - 8029426: 4a54 ldr r2, [pc, #336] ; (8029578 ) - 8029428: 4293 cmp r3, r2 - 802942a: d004 beq.n 8029436 - 802942c: 687b ldr r3, [r7, #4] - 802942e: 681b ldr r3, [r3, #0] - 8029430: 4a52 ldr r2, [pc, #328] ; (802957c ) - 8029432: 4293 cmp r3, r2 - 8029434: d10a bne.n 802944c - 8029436: 687b ldr r3, [r7, #4] - 8029438: 681b ldr r3, [r3, #0] - 802943a: 695b ldr r3, [r3, #20] - 802943c: f003 0380 and.w r3, r3, #128 ; 0x80 - 8029440: 2b00 cmp r3, #0 - 8029442: bf14 ite ne - 8029444: 2301 movne r3, #1 - 8029446: 2300 moveq r3, #0 - 8029448: b2db uxtb r3, r3 - 802944a: e003 b.n 8029454 - 802944c: 687b ldr r3, [r7, #4] - 802944e: 681b ldr r3, [r3, #0] - 8029450: 681b ldr r3, [r3, #0] - 8029452: 2300 movs r3, #0 - 8029454: 2b00 cmp r3, #0 - 8029456: d00d beq.n 8029474 + 80293c6: 687b ldr r3, [r7, #4] + 80293c8: 681b ldr r3, [r3, #0] + 80293ca: 4a69 ldr r2, [pc, #420] ; (8029570 ) + 80293cc: 4293 cmp r3, r2 + 80293ce: d04a beq.n 8029466 + 80293d0: 687b ldr r3, [r7, #4] + 80293d2: 681b ldr r3, [r3, #0] + 80293d4: 4a67 ldr r2, [pc, #412] ; (8029574 ) + 80293d6: 4293 cmp r3, r2 + 80293d8: d045 beq.n 8029466 + 80293da: 687b ldr r3, [r7, #4] + 80293dc: 681b ldr r3, [r3, #0] + 80293de: 4a66 ldr r2, [pc, #408] ; (8029578 ) + 80293e0: 4293 cmp r3, r2 + 80293e2: d040 beq.n 8029466 + 80293e4: 687b ldr r3, [r7, #4] + 80293e6: 681b ldr r3, [r3, #0] + 80293e8: 4a64 ldr r2, [pc, #400] ; (802957c ) + 80293ea: 4293 cmp r3, r2 + 80293ec: d03b beq.n 8029466 + 80293ee: 687b ldr r3, [r7, #4] + 80293f0: 681b ldr r3, [r3, #0] + 80293f2: 4a63 ldr r2, [pc, #396] ; (8029580 ) + 80293f4: 4293 cmp r3, r2 + 80293f6: d036 beq.n 8029466 + 80293f8: 687b ldr r3, [r7, #4] + 80293fa: 681b ldr r3, [r3, #0] + 80293fc: 4a61 ldr r2, [pc, #388] ; (8029584 ) + 80293fe: 4293 cmp r3, r2 + 8029400: d031 beq.n 8029466 + 8029402: 687b ldr r3, [r7, #4] + 8029404: 681b ldr r3, [r3, #0] + 8029406: 4a60 ldr r2, [pc, #384] ; (8029588 ) + 8029408: 4293 cmp r3, r2 + 802940a: d02c beq.n 8029466 + 802940c: 687b ldr r3, [r7, #4] + 802940e: 681b ldr r3, [r3, #0] + 8029410: 4a5e ldr r2, [pc, #376] ; (802958c ) + 8029412: 4293 cmp r3, r2 + 8029414: d027 beq.n 8029466 + 8029416: 687b ldr r3, [r7, #4] + 8029418: 681b ldr r3, [r3, #0] + 802941a: 4a5d ldr r2, [pc, #372] ; (8029590 ) + 802941c: 4293 cmp r3, r2 + 802941e: d022 beq.n 8029466 + 8029420: 687b ldr r3, [r7, #4] + 8029422: 681b ldr r3, [r3, #0] + 8029424: 4a5b ldr r2, [pc, #364] ; (8029594 ) + 8029426: 4293 cmp r3, r2 + 8029428: d01d beq.n 8029466 + 802942a: 687b ldr r3, [r7, #4] + 802942c: 681b ldr r3, [r3, #0] + 802942e: 4a5a ldr r2, [pc, #360] ; (8029598 ) + 8029430: 4293 cmp r3, r2 + 8029432: d018 beq.n 8029466 + 8029434: 687b ldr r3, [r7, #4] + 8029436: 681b ldr r3, [r3, #0] + 8029438: 4a58 ldr r2, [pc, #352] ; (802959c ) + 802943a: 4293 cmp r3, r2 + 802943c: d013 beq.n 8029466 + 802943e: 687b ldr r3, [r7, #4] + 8029440: 681b ldr r3, [r3, #0] + 8029442: 4a57 ldr r2, [pc, #348] ; (80295a0 ) + 8029444: 4293 cmp r3, r2 + 8029446: d00e beq.n 8029466 + 8029448: 687b ldr r3, [r7, #4] + 802944a: 681b ldr r3, [r3, #0] + 802944c: 4a55 ldr r2, [pc, #340] ; (80295a4 ) + 802944e: 4293 cmp r3, r2 + 8029450: d009 beq.n 8029466 + 8029452: 687b ldr r3, [r7, #4] + 8029454: 681b ldr r3, [r3, #0] + 8029456: 4a54 ldr r2, [pc, #336] ; (80295a8 ) + 8029458: 4293 cmp r3, r2 + 802945a: d004 beq.n 8029466 + 802945c: 687b ldr r3, [r7, #4] + 802945e: 681b ldr r3, [r3, #0] + 8029460: 4a52 ldr r2, [pc, #328] ; (80295ac ) + 8029462: 4293 cmp r3, r2 + 8029464: d10a bne.n 802947c + 8029466: 687b ldr r3, [r7, #4] + 8029468: 681b ldr r3, [r3, #0] + 802946a: 695b ldr r3, [r3, #20] + 802946c: f003 0380 and.w r3, r3, #128 ; 0x80 + 8029470: 2b00 cmp r3, #0 + 8029472: bf14 ite ne + 8029474: 2301 movne r3, #1 + 8029476: 2300 moveq r3, #0 + 8029478: b2db uxtb r3, r3 + 802947a: e003 b.n 8029484 + 802947c: 687b ldr r3, [r7, #4] + 802947e: 681b ldr r3, [r3, #0] + 8029480: 681b ldr r3, [r3, #0] + 8029482: 2300 movs r3, #0 + 8029484: 2b00 cmp r3, #0 + 8029486: d00d beq.n 80294a4 { /* Clear the FIFO error flag */ regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU); - 8029458: 687b ldr r3, [r7, #4] - 802945a: 6ddb ldr r3, [r3, #92] ; 0x5c - 802945c: f003 031f and.w r3, r3, #31 - 8029460: 2201 movs r2, #1 - 8029462: 409a lsls r2, r3 - 8029464: 6a3b ldr r3, [r7, #32] - 8029466: 609a str r2, [r3, #8] + 8029488: 687b ldr r3, [r7, #4] + 802948a: 6ddb ldr r3, [r3, #92] ; 0x5c + 802948c: f003 031f and.w r3, r3, #31 + 8029490: 2201 movs r2, #1 + 8029492: 409a lsls r2, r3 + 8029494: 6a3b ldr r3, [r7, #32] + 8029496: 609a str r2, [r3, #8] /* Update error code */ hdma->ErrorCode |= HAL_DMA_ERROR_FE; - 8029468: 687b ldr r3, [r7, #4] - 802946a: 6d5b ldr r3, [r3, #84] ; 0x54 - 802946c: f043 0202 orr.w r2, r3, #2 - 8029470: 687b ldr r3, [r7, #4] - 8029472: 655a str r2, [r3, #84] ; 0x54 + 8029498: 687b ldr r3, [r7, #4] + 802949a: 6d5b ldr r3, [r3, #84] ; 0x54 + 802949c: f043 0202 orr.w r2, r3, #2 + 80294a0: 687b ldr r3, [r7, #4] + 80294a2: 655a str r2, [r3, #84] ; 0x54 } } /* Direct Mode Error Interrupt management ***********************************/ if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 8029474: 687b ldr r3, [r7, #4] - 8029476: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029478: f003 031f and.w r3, r3, #31 - 802947c: 2204 movs r2, #4 - 802947e: 409a lsls r2, r3 - 8029480: 69bb ldr r3, [r7, #24] - 8029482: 4013 ands r3, r2 - 8029484: 2b00 cmp r3, #0 - 8029486: f000 808f beq.w 80295a8 + 80294a4: 687b ldr r3, [r7, #4] + 80294a6: 6ddb ldr r3, [r3, #92] ; 0x5c + 80294a8: f003 031f and.w r3, r3, #31 + 80294ac: 2204 movs r2, #4 + 80294ae: 409a lsls r2, r3 + 80294b0: 69bb ldr r3, [r7, #24] + 80294b2: 4013 ands r3, r2 + 80294b4: 2b00 cmp r3, #0 + 80294b6: f000 808f beq.w 80295d8 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != 0U) - 802948a: 687b ldr r3, [r7, #4] - 802948c: 681b ldr r3, [r3, #0] - 802948e: 4a2c ldr r2, [pc, #176] ; (8029540 ) - 8029490: 4293 cmp r3, r2 - 8029492: d04a beq.n 802952a - 8029494: 687b ldr r3, [r7, #4] - 8029496: 681b ldr r3, [r3, #0] - 8029498: 4a2a ldr r2, [pc, #168] ; (8029544 ) - 802949a: 4293 cmp r3, r2 - 802949c: d045 beq.n 802952a - 802949e: 687b ldr r3, [r7, #4] - 80294a0: 681b ldr r3, [r3, #0] - 80294a2: 4a29 ldr r2, [pc, #164] ; (8029548 ) - 80294a4: 4293 cmp r3, r2 - 80294a6: d040 beq.n 802952a - 80294a8: 687b ldr r3, [r7, #4] - 80294aa: 681b ldr r3, [r3, #0] - 80294ac: 4a27 ldr r2, [pc, #156] ; (802954c ) - 80294ae: 4293 cmp r3, r2 - 80294b0: d03b beq.n 802952a - 80294b2: 687b ldr r3, [r7, #4] - 80294b4: 681b ldr r3, [r3, #0] - 80294b6: 4a26 ldr r2, [pc, #152] ; (8029550 ) - 80294b8: 4293 cmp r3, r2 - 80294ba: d036 beq.n 802952a - 80294bc: 687b ldr r3, [r7, #4] - 80294be: 681b ldr r3, [r3, #0] - 80294c0: 4a24 ldr r2, [pc, #144] ; (8029554 ) - 80294c2: 4293 cmp r3, r2 - 80294c4: d031 beq.n 802952a - 80294c6: 687b ldr r3, [r7, #4] - 80294c8: 681b ldr r3, [r3, #0] - 80294ca: 4a23 ldr r2, [pc, #140] ; (8029558 ) - 80294cc: 4293 cmp r3, r2 - 80294ce: d02c beq.n 802952a - 80294d0: 687b ldr r3, [r7, #4] - 80294d2: 681b ldr r3, [r3, #0] - 80294d4: 4a21 ldr r2, [pc, #132] ; (802955c ) - 80294d6: 4293 cmp r3, r2 - 80294d8: d027 beq.n 802952a - 80294da: 687b ldr r3, [r7, #4] - 80294dc: 681b ldr r3, [r3, #0] - 80294de: 4a20 ldr r2, [pc, #128] ; (8029560 ) - 80294e0: 4293 cmp r3, r2 - 80294e2: d022 beq.n 802952a - 80294e4: 687b ldr r3, [r7, #4] - 80294e6: 681b ldr r3, [r3, #0] - 80294e8: 4a1e ldr r2, [pc, #120] ; (8029564 ) - 80294ea: 4293 cmp r3, r2 - 80294ec: d01d beq.n 802952a - 80294ee: 687b ldr r3, [r7, #4] - 80294f0: 681b ldr r3, [r3, #0] - 80294f2: 4a1d ldr r2, [pc, #116] ; (8029568 ) - 80294f4: 4293 cmp r3, r2 - 80294f6: d018 beq.n 802952a - 80294f8: 687b ldr r3, [r7, #4] - 80294fa: 681b ldr r3, [r3, #0] - 80294fc: 4a1b ldr r2, [pc, #108] ; (802956c ) - 80294fe: 4293 cmp r3, r2 - 8029500: d013 beq.n 802952a - 8029502: 687b ldr r3, [r7, #4] - 8029504: 681b ldr r3, [r3, #0] - 8029506: 4a1a ldr r2, [pc, #104] ; (8029570 ) - 8029508: 4293 cmp r3, r2 - 802950a: d00e beq.n 802952a - 802950c: 687b ldr r3, [r7, #4] - 802950e: 681b ldr r3, [r3, #0] - 8029510: 4a18 ldr r2, [pc, #96] ; (8029574 ) - 8029512: 4293 cmp r3, r2 - 8029514: d009 beq.n 802952a - 8029516: 687b ldr r3, [r7, #4] - 8029518: 681b ldr r3, [r3, #0] - 802951a: 4a17 ldr r2, [pc, #92] ; (8029578 ) - 802951c: 4293 cmp r3, r2 - 802951e: d004 beq.n 802952a - 8029520: 687b ldr r3, [r7, #4] - 8029522: 681b ldr r3, [r3, #0] - 8029524: 4a15 ldr r2, [pc, #84] ; (802957c ) - 8029526: 4293 cmp r3, r2 - 8029528: d12a bne.n 8029580 - 802952a: 687b ldr r3, [r7, #4] - 802952c: 681b ldr r3, [r3, #0] - 802952e: 681b ldr r3, [r3, #0] - 8029530: f003 0302 and.w r3, r3, #2 - 8029534: 2b00 cmp r3, #0 - 8029536: bf14 ite ne - 8029538: 2301 movne r3, #1 - 802953a: 2300 moveq r3, #0 - 802953c: b2db uxtb r3, r3 - 802953e: e023 b.n 8029588 - 8029540: 40020010 .word 0x40020010 - 8029544: 40020028 .word 0x40020028 - 8029548: 40020040 .word 0x40020040 - 802954c: 40020058 .word 0x40020058 - 8029550: 40020070 .word 0x40020070 - 8029554: 40020088 .word 0x40020088 - 8029558: 400200a0 .word 0x400200a0 - 802955c: 400200b8 .word 0x400200b8 - 8029560: 40020410 .word 0x40020410 - 8029564: 40020428 .word 0x40020428 - 8029568: 40020440 .word 0x40020440 - 802956c: 40020458 .word 0x40020458 - 8029570: 40020470 .word 0x40020470 - 8029574: 40020488 .word 0x40020488 - 8029578: 400204a0 .word 0x400204a0 - 802957c: 400204b8 .word 0x400204b8 - 8029580: 687b ldr r3, [r7, #4] - 8029582: 681b ldr r3, [r3, #0] - 8029584: 681b ldr r3, [r3, #0] - 8029586: 2300 movs r3, #0 - 8029588: 2b00 cmp r3, #0 - 802958a: d00d beq.n 80295a8 + 80294ba: 687b ldr r3, [r7, #4] + 80294bc: 681b ldr r3, [r3, #0] + 80294be: 4a2c ldr r2, [pc, #176] ; (8029570 ) + 80294c0: 4293 cmp r3, r2 + 80294c2: d04a beq.n 802955a + 80294c4: 687b ldr r3, [r7, #4] + 80294c6: 681b ldr r3, [r3, #0] + 80294c8: 4a2a ldr r2, [pc, #168] ; (8029574 ) + 80294ca: 4293 cmp r3, r2 + 80294cc: d045 beq.n 802955a + 80294ce: 687b ldr r3, [r7, #4] + 80294d0: 681b ldr r3, [r3, #0] + 80294d2: 4a29 ldr r2, [pc, #164] ; (8029578 ) + 80294d4: 4293 cmp r3, r2 + 80294d6: d040 beq.n 802955a + 80294d8: 687b ldr r3, [r7, #4] + 80294da: 681b ldr r3, [r3, #0] + 80294dc: 4a27 ldr r2, [pc, #156] ; (802957c ) + 80294de: 4293 cmp r3, r2 + 80294e0: d03b beq.n 802955a + 80294e2: 687b ldr r3, [r7, #4] + 80294e4: 681b ldr r3, [r3, #0] + 80294e6: 4a26 ldr r2, [pc, #152] ; (8029580 ) + 80294e8: 4293 cmp r3, r2 + 80294ea: d036 beq.n 802955a + 80294ec: 687b ldr r3, [r7, #4] + 80294ee: 681b ldr r3, [r3, #0] + 80294f0: 4a24 ldr r2, [pc, #144] ; (8029584 ) + 80294f2: 4293 cmp r3, r2 + 80294f4: d031 beq.n 802955a + 80294f6: 687b ldr r3, [r7, #4] + 80294f8: 681b ldr r3, [r3, #0] + 80294fa: 4a23 ldr r2, [pc, #140] ; (8029588 ) + 80294fc: 4293 cmp r3, r2 + 80294fe: d02c beq.n 802955a + 8029500: 687b ldr r3, [r7, #4] + 8029502: 681b ldr r3, [r3, #0] + 8029504: 4a21 ldr r2, [pc, #132] ; (802958c ) + 8029506: 4293 cmp r3, r2 + 8029508: d027 beq.n 802955a + 802950a: 687b ldr r3, [r7, #4] + 802950c: 681b ldr r3, [r3, #0] + 802950e: 4a20 ldr r2, [pc, #128] ; (8029590 ) + 8029510: 4293 cmp r3, r2 + 8029512: d022 beq.n 802955a + 8029514: 687b ldr r3, [r7, #4] + 8029516: 681b ldr r3, [r3, #0] + 8029518: 4a1e ldr r2, [pc, #120] ; (8029594 ) + 802951a: 4293 cmp r3, r2 + 802951c: d01d beq.n 802955a + 802951e: 687b ldr r3, [r7, #4] + 8029520: 681b ldr r3, [r3, #0] + 8029522: 4a1d ldr r2, [pc, #116] ; (8029598 ) + 8029524: 4293 cmp r3, r2 + 8029526: d018 beq.n 802955a + 8029528: 687b ldr r3, [r7, #4] + 802952a: 681b ldr r3, [r3, #0] + 802952c: 4a1b ldr r2, [pc, #108] ; (802959c ) + 802952e: 4293 cmp r3, r2 + 8029530: d013 beq.n 802955a + 8029532: 687b ldr r3, [r7, #4] + 8029534: 681b ldr r3, [r3, #0] + 8029536: 4a1a ldr r2, [pc, #104] ; (80295a0 ) + 8029538: 4293 cmp r3, r2 + 802953a: d00e beq.n 802955a + 802953c: 687b ldr r3, [r7, #4] + 802953e: 681b ldr r3, [r3, #0] + 8029540: 4a18 ldr r2, [pc, #96] ; (80295a4 ) + 8029542: 4293 cmp r3, r2 + 8029544: d009 beq.n 802955a + 8029546: 687b ldr r3, [r7, #4] + 8029548: 681b ldr r3, [r3, #0] + 802954a: 4a17 ldr r2, [pc, #92] ; (80295a8 ) + 802954c: 4293 cmp r3, r2 + 802954e: d004 beq.n 802955a + 8029550: 687b ldr r3, [r7, #4] + 8029552: 681b ldr r3, [r3, #0] + 8029554: 4a15 ldr r2, [pc, #84] ; (80295ac ) + 8029556: 4293 cmp r3, r2 + 8029558: d12a bne.n 80295b0 + 802955a: 687b ldr r3, [r7, #4] + 802955c: 681b ldr r3, [r3, #0] + 802955e: 681b ldr r3, [r3, #0] + 8029560: f003 0302 and.w r3, r3, #2 + 8029564: 2b00 cmp r3, #0 + 8029566: bf14 ite ne + 8029568: 2301 movne r3, #1 + 802956a: 2300 moveq r3, #0 + 802956c: b2db uxtb r3, r3 + 802956e: e023 b.n 80295b8 + 8029570: 40020010 .word 0x40020010 + 8029574: 40020028 .word 0x40020028 + 8029578: 40020040 .word 0x40020040 + 802957c: 40020058 .word 0x40020058 + 8029580: 40020070 .word 0x40020070 + 8029584: 40020088 .word 0x40020088 + 8029588: 400200a0 .word 0x400200a0 + 802958c: 400200b8 .word 0x400200b8 + 8029590: 40020410 .word 0x40020410 + 8029594: 40020428 .word 0x40020428 + 8029598: 40020440 .word 0x40020440 + 802959c: 40020458 .word 0x40020458 + 80295a0: 40020470 .word 0x40020470 + 80295a4: 40020488 .word 0x40020488 + 80295a8: 400204a0 .word 0x400204a0 + 80295ac: 400204b8 .word 0x400204b8 + 80295b0: 687b ldr r3, [r7, #4] + 80295b2: 681b ldr r3, [r3, #0] + 80295b4: 681b ldr r3, [r3, #0] + 80295b6: 2300 movs r3, #0 + 80295b8: 2b00 cmp r3, #0 + 80295ba: d00d beq.n 80295d8 { /* Clear the direct mode error flag */ regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU); - 802958c: 687b ldr r3, [r7, #4] - 802958e: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029590: f003 031f and.w r3, r3, #31 - 8029594: 2204 movs r2, #4 - 8029596: 409a lsls r2, r3 - 8029598: 6a3b ldr r3, [r7, #32] - 802959a: 609a str r2, [r3, #8] + 80295bc: 687b ldr r3, [r7, #4] + 80295be: 6ddb ldr r3, [r3, #92] ; 0x5c + 80295c0: f003 031f and.w r3, r3, #31 + 80295c4: 2204 movs r2, #4 + 80295c6: 409a lsls r2, r3 + 80295c8: 6a3b ldr r3, [r7, #32] + 80295ca: 609a str r2, [r3, #8] /* Update error code */ hdma->ErrorCode |= HAL_DMA_ERROR_DME; - 802959c: 687b ldr r3, [r7, #4] - 802959e: 6d5b ldr r3, [r3, #84] ; 0x54 - 80295a0: f043 0204 orr.w r2, r3, #4 - 80295a4: 687b ldr r3, [r7, #4] - 80295a6: 655a str r2, [r3, #84] ; 0x54 + 80295cc: 687b ldr r3, [r7, #4] + 80295ce: 6d5b ldr r3, [r3, #84] ; 0x54 + 80295d0: f043 0204 orr.w r2, r3, #4 + 80295d4: 687b ldr r3, [r7, #4] + 80295d6: 655a str r2, [r3, #84] ; 0x54 } } /* Half Transfer Complete Interrupt management ******************************/ if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 80295a8: 687b ldr r3, [r7, #4] - 80295aa: 6ddb ldr r3, [r3, #92] ; 0x5c - 80295ac: f003 031f and.w r3, r3, #31 - 80295b0: 2210 movs r2, #16 - 80295b2: 409a lsls r2, r3 - 80295b4: 69bb ldr r3, [r7, #24] - 80295b6: 4013 ands r3, r2 - 80295b8: 2b00 cmp r3, #0 - 80295ba: f000 80a6 beq.w 802970a + 80295d8: 687b ldr r3, [r7, #4] + 80295da: 6ddb ldr r3, [r3, #92] ; 0x5c + 80295dc: f003 031f and.w r3, r3, #31 + 80295e0: 2210 movs r2, #16 + 80295e2: 409a lsls r2, r3 + 80295e4: 69bb ldr r3, [r7, #24] + 80295e6: 4013 ands r3, r2 + 80295e8: 2b00 cmp r3, #0 + 80295ea: f000 80a6 beq.w 802973a { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != 0U) - 80295be: 687b ldr r3, [r7, #4] - 80295c0: 681b ldr r3, [r3, #0] - 80295c2: 4a85 ldr r2, [pc, #532] ; (80297d8 ) - 80295c4: 4293 cmp r3, r2 - 80295c6: d04a beq.n 802965e - 80295c8: 687b ldr r3, [r7, #4] - 80295ca: 681b ldr r3, [r3, #0] - 80295cc: 4a83 ldr r2, [pc, #524] ; (80297dc ) - 80295ce: 4293 cmp r3, r2 - 80295d0: d045 beq.n 802965e - 80295d2: 687b ldr r3, [r7, #4] - 80295d4: 681b ldr r3, [r3, #0] - 80295d6: 4a82 ldr r2, [pc, #520] ; (80297e0 ) - 80295d8: 4293 cmp r3, r2 - 80295da: d040 beq.n 802965e - 80295dc: 687b ldr r3, [r7, #4] - 80295de: 681b ldr r3, [r3, #0] - 80295e0: 4a80 ldr r2, [pc, #512] ; (80297e4 ) - 80295e2: 4293 cmp r3, r2 - 80295e4: d03b beq.n 802965e - 80295e6: 687b ldr r3, [r7, #4] - 80295e8: 681b ldr r3, [r3, #0] - 80295ea: 4a7f ldr r2, [pc, #508] ; (80297e8 ) - 80295ec: 4293 cmp r3, r2 - 80295ee: d036 beq.n 802965e - 80295f0: 687b ldr r3, [r7, #4] - 80295f2: 681b ldr r3, [r3, #0] - 80295f4: 4a7d ldr r2, [pc, #500] ; (80297ec ) - 80295f6: 4293 cmp r3, r2 - 80295f8: d031 beq.n 802965e - 80295fa: 687b ldr r3, [r7, #4] - 80295fc: 681b ldr r3, [r3, #0] - 80295fe: 4a7c ldr r2, [pc, #496] ; (80297f0 ) - 8029600: 4293 cmp r3, r2 - 8029602: d02c beq.n 802965e - 8029604: 687b ldr r3, [r7, #4] - 8029606: 681b ldr r3, [r3, #0] - 8029608: 4a7a ldr r2, [pc, #488] ; (80297f4 ) - 802960a: 4293 cmp r3, r2 - 802960c: d027 beq.n 802965e - 802960e: 687b ldr r3, [r7, #4] - 8029610: 681b ldr r3, [r3, #0] - 8029612: 4a79 ldr r2, [pc, #484] ; (80297f8 ) - 8029614: 4293 cmp r3, r2 - 8029616: d022 beq.n 802965e - 8029618: 687b ldr r3, [r7, #4] - 802961a: 681b ldr r3, [r3, #0] - 802961c: 4a77 ldr r2, [pc, #476] ; (80297fc ) - 802961e: 4293 cmp r3, r2 - 8029620: d01d beq.n 802965e - 8029622: 687b ldr r3, [r7, #4] - 8029624: 681b ldr r3, [r3, #0] - 8029626: 4a76 ldr r2, [pc, #472] ; (8029800 ) - 8029628: 4293 cmp r3, r2 - 802962a: d018 beq.n 802965e - 802962c: 687b ldr r3, [r7, #4] - 802962e: 681b ldr r3, [r3, #0] - 8029630: 4a74 ldr r2, [pc, #464] ; (8029804 ) - 8029632: 4293 cmp r3, r2 - 8029634: d013 beq.n 802965e - 8029636: 687b ldr r3, [r7, #4] - 8029638: 681b ldr r3, [r3, #0] - 802963a: 4a73 ldr r2, [pc, #460] ; (8029808 ) - 802963c: 4293 cmp r3, r2 - 802963e: d00e beq.n 802965e - 8029640: 687b ldr r3, [r7, #4] - 8029642: 681b ldr r3, [r3, #0] - 8029644: 4a71 ldr r2, [pc, #452] ; (802980c ) - 8029646: 4293 cmp r3, r2 - 8029648: d009 beq.n 802965e - 802964a: 687b ldr r3, [r7, #4] - 802964c: 681b ldr r3, [r3, #0] - 802964e: 4a70 ldr r2, [pc, #448] ; (8029810 ) - 8029650: 4293 cmp r3, r2 - 8029652: d004 beq.n 802965e - 8029654: 687b ldr r3, [r7, #4] - 8029656: 681b ldr r3, [r3, #0] - 8029658: 4a6e ldr r2, [pc, #440] ; (8029814 ) - 802965a: 4293 cmp r3, r2 - 802965c: d10a bne.n 8029674 - 802965e: 687b ldr r3, [r7, #4] - 8029660: 681b ldr r3, [r3, #0] - 8029662: 681b ldr r3, [r3, #0] - 8029664: f003 0308 and.w r3, r3, #8 - 8029668: 2b00 cmp r3, #0 - 802966a: bf14 ite ne - 802966c: 2301 movne r3, #1 - 802966e: 2300 moveq r3, #0 - 8029670: b2db uxtb r3, r3 - 8029672: e009 b.n 8029688 - 8029674: 687b ldr r3, [r7, #4] - 8029676: 681b ldr r3, [r3, #0] - 8029678: 681b ldr r3, [r3, #0] - 802967a: f003 0304 and.w r3, r3, #4 - 802967e: 2b00 cmp r3, #0 - 8029680: bf14 ite ne - 8029682: 2301 movne r3, #1 - 8029684: 2300 moveq r3, #0 - 8029686: b2db uxtb r3, r3 - 8029688: 2b00 cmp r3, #0 - 802968a: d03e beq.n 802970a + 80295ee: 687b ldr r3, [r7, #4] + 80295f0: 681b ldr r3, [r3, #0] + 80295f2: 4a85 ldr r2, [pc, #532] ; (8029808 ) + 80295f4: 4293 cmp r3, r2 + 80295f6: d04a beq.n 802968e + 80295f8: 687b ldr r3, [r7, #4] + 80295fa: 681b ldr r3, [r3, #0] + 80295fc: 4a83 ldr r2, [pc, #524] ; (802980c ) + 80295fe: 4293 cmp r3, r2 + 8029600: d045 beq.n 802968e + 8029602: 687b ldr r3, [r7, #4] + 8029604: 681b ldr r3, [r3, #0] + 8029606: 4a82 ldr r2, [pc, #520] ; (8029810 ) + 8029608: 4293 cmp r3, r2 + 802960a: d040 beq.n 802968e + 802960c: 687b ldr r3, [r7, #4] + 802960e: 681b ldr r3, [r3, #0] + 8029610: 4a80 ldr r2, [pc, #512] ; (8029814 ) + 8029612: 4293 cmp r3, r2 + 8029614: d03b beq.n 802968e + 8029616: 687b ldr r3, [r7, #4] + 8029618: 681b ldr r3, [r3, #0] + 802961a: 4a7f ldr r2, [pc, #508] ; (8029818 ) + 802961c: 4293 cmp r3, r2 + 802961e: d036 beq.n 802968e + 8029620: 687b ldr r3, [r7, #4] + 8029622: 681b ldr r3, [r3, #0] + 8029624: 4a7d ldr r2, [pc, #500] ; (802981c ) + 8029626: 4293 cmp r3, r2 + 8029628: d031 beq.n 802968e + 802962a: 687b ldr r3, [r7, #4] + 802962c: 681b ldr r3, [r3, #0] + 802962e: 4a7c ldr r2, [pc, #496] ; (8029820 ) + 8029630: 4293 cmp r3, r2 + 8029632: d02c beq.n 802968e + 8029634: 687b ldr r3, [r7, #4] + 8029636: 681b ldr r3, [r3, #0] + 8029638: 4a7a ldr r2, [pc, #488] ; (8029824 ) + 802963a: 4293 cmp r3, r2 + 802963c: d027 beq.n 802968e + 802963e: 687b ldr r3, [r7, #4] + 8029640: 681b ldr r3, [r3, #0] + 8029642: 4a79 ldr r2, [pc, #484] ; (8029828 ) + 8029644: 4293 cmp r3, r2 + 8029646: d022 beq.n 802968e + 8029648: 687b ldr r3, [r7, #4] + 802964a: 681b ldr r3, [r3, #0] + 802964c: 4a77 ldr r2, [pc, #476] ; (802982c ) + 802964e: 4293 cmp r3, r2 + 8029650: d01d beq.n 802968e + 8029652: 687b ldr r3, [r7, #4] + 8029654: 681b ldr r3, [r3, #0] + 8029656: 4a76 ldr r2, [pc, #472] ; (8029830 ) + 8029658: 4293 cmp r3, r2 + 802965a: d018 beq.n 802968e + 802965c: 687b ldr r3, [r7, #4] + 802965e: 681b ldr r3, [r3, #0] + 8029660: 4a74 ldr r2, [pc, #464] ; (8029834 ) + 8029662: 4293 cmp r3, r2 + 8029664: d013 beq.n 802968e + 8029666: 687b ldr r3, [r7, #4] + 8029668: 681b ldr r3, [r3, #0] + 802966a: 4a73 ldr r2, [pc, #460] ; (8029838 ) + 802966c: 4293 cmp r3, r2 + 802966e: d00e beq.n 802968e + 8029670: 687b ldr r3, [r7, #4] + 8029672: 681b ldr r3, [r3, #0] + 8029674: 4a71 ldr r2, [pc, #452] ; (802983c ) + 8029676: 4293 cmp r3, r2 + 8029678: d009 beq.n 802968e + 802967a: 687b ldr r3, [r7, #4] + 802967c: 681b ldr r3, [r3, #0] + 802967e: 4a70 ldr r2, [pc, #448] ; (8029840 ) + 8029680: 4293 cmp r3, r2 + 8029682: d004 beq.n 802968e + 8029684: 687b ldr r3, [r7, #4] + 8029686: 681b ldr r3, [r3, #0] + 8029688: 4a6e ldr r2, [pc, #440] ; (8029844 ) + 802968a: 4293 cmp r3, r2 + 802968c: d10a bne.n 80296a4 + 802968e: 687b ldr r3, [r7, #4] + 8029690: 681b ldr r3, [r3, #0] + 8029692: 681b ldr r3, [r3, #0] + 8029694: f003 0308 and.w r3, r3, #8 + 8029698: 2b00 cmp r3, #0 + 802969a: bf14 ite ne + 802969c: 2301 movne r3, #1 + 802969e: 2300 moveq r3, #0 + 80296a0: b2db uxtb r3, r3 + 80296a2: e009 b.n 80296b8 + 80296a4: 687b ldr r3, [r7, #4] + 80296a6: 681b ldr r3, [r3, #0] + 80296a8: 681b ldr r3, [r3, #0] + 80296aa: f003 0304 and.w r3, r3, #4 + 80296ae: 2b00 cmp r3, #0 + 80296b0: bf14 ite ne + 80296b2: 2301 movne r3, #1 + 80296b4: 2300 moveq r3, #0 + 80296b6: b2db uxtb r3, r3 + 80296b8: 2b00 cmp r3, #0 + 80296ba: d03e beq.n 802973a { /* Clear the half transfer complete flag */ regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU); - 802968c: 687b ldr r3, [r7, #4] - 802968e: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029690: f003 031f and.w r3, r3, #31 - 8029694: 2210 movs r2, #16 - 8029696: 409a lsls r2, r3 - 8029698: 6a3b ldr r3, [r7, #32] - 802969a: 609a str r2, [r3, #8] + 80296bc: 687b ldr r3, [r7, #4] + 80296be: 6ddb ldr r3, [r3, #92] ; 0x5c + 80296c0: f003 031f and.w r3, r3, #31 + 80296c4: 2210 movs r2, #16 + 80296c6: 409a lsls r2, r3 + 80296c8: 6a3b ldr r3, [r7, #32] + 80296ca: 609a str r2, [r3, #8] /* Multi_Buffering mode enabled */ if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U) - 802969c: 687b ldr r3, [r7, #4] - 802969e: 681b ldr r3, [r3, #0] - 80296a0: 681b ldr r3, [r3, #0] - 80296a2: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 80296a6: 2b00 cmp r3, #0 - 80296a8: d018 beq.n 80296dc + 80296cc: 687b ldr r3, [r7, #4] + 80296ce: 681b ldr r3, [r3, #0] + 80296d0: 681b ldr r3, [r3, #0] + 80296d2: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 80296d6: 2b00 cmp r3, #0 + 80296d8: d018 beq.n 802970c { /* Current memory buffer used is Memory 0 */ if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U) - 80296aa: 687b ldr r3, [r7, #4] - 80296ac: 681b ldr r3, [r3, #0] - 80296ae: 681b ldr r3, [r3, #0] - 80296b0: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 80296b4: 2b00 cmp r3, #0 - 80296b6: d108 bne.n 80296ca + 80296da: 687b ldr r3, [r7, #4] + 80296dc: 681b ldr r3, [r3, #0] + 80296de: 681b ldr r3, [r3, #0] + 80296e0: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 80296e4: 2b00 cmp r3, #0 + 80296e6: d108 bne.n 80296fa { if(hdma->XferHalfCpltCallback != NULL) - 80296b8: 687b ldr r3, [r7, #4] - 80296ba: 6c1b ldr r3, [r3, #64] ; 0x40 - 80296bc: 2b00 cmp r3, #0 - 80296be: d024 beq.n 802970a + 80296e8: 687b ldr r3, [r7, #4] + 80296ea: 6c1b ldr r3, [r3, #64] ; 0x40 + 80296ec: 2b00 cmp r3, #0 + 80296ee: d024 beq.n 802973a { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); - 80296c0: 687b ldr r3, [r7, #4] - 80296c2: 6c1b ldr r3, [r3, #64] ; 0x40 - 80296c4: 6878 ldr r0, [r7, #4] - 80296c6: 4798 blx r3 - 80296c8: e01f b.n 802970a + 80296f0: 687b ldr r3, [r7, #4] + 80296f2: 6c1b ldr r3, [r3, #64] ; 0x40 + 80296f4: 6878 ldr r0, [r7, #4] + 80296f6: 4798 blx r3 + 80296f8: e01f b.n 802973a } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferM1HalfCpltCallback != NULL) - 80296ca: 687b ldr r3, [r7, #4] - 80296cc: 6c9b ldr r3, [r3, #72] ; 0x48 - 80296ce: 2b00 cmp r3, #0 - 80296d0: d01b beq.n 802970a + 80296fa: 687b ldr r3, [r7, #4] + 80296fc: 6c9b ldr r3, [r3, #72] ; 0x48 + 80296fe: 2b00 cmp r3, #0 + 8029700: d01b beq.n 802973a { /* Half transfer callback */ hdma->XferM1HalfCpltCallback(hdma); - 80296d2: 687b ldr r3, [r7, #4] - 80296d4: 6c9b ldr r3, [r3, #72] ; 0x48 - 80296d6: 6878 ldr r0, [r7, #4] - 80296d8: 4798 blx r3 - 80296da: e016 b.n 802970a + 8029702: 687b ldr r3, [r7, #4] + 8029704: 6c9b ldr r3, [r3, #72] ; 0x48 + 8029706: 6878 ldr r0, [r7, #4] + 8029708: 4798 blx r3 + 802970a: e016 b.n 802973a } } else { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U) - 80296dc: 687b ldr r3, [r7, #4] - 80296de: 681b ldr r3, [r3, #0] - 80296e0: 681b ldr r3, [r3, #0] - 80296e2: f403 7380 and.w r3, r3, #256 ; 0x100 - 80296e6: 2b00 cmp r3, #0 - 80296e8: d107 bne.n 80296fa + 802970c: 687b ldr r3, [r7, #4] + 802970e: 681b ldr r3, [r3, #0] + 8029710: 681b ldr r3, [r3, #0] + 8029712: f403 7380 and.w r3, r3, #256 ; 0x100 + 8029716: 2b00 cmp r3, #0 + 8029718: d107 bne.n 802972a { /* Disable the half transfer interrupt */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_HT); - 80296ea: 687b ldr r3, [r7, #4] - 80296ec: 681b ldr r3, [r3, #0] - 80296ee: 681a ldr r2, [r3, #0] - 80296f0: 687b ldr r3, [r7, #4] - 80296f2: 681b ldr r3, [r3, #0] - 80296f4: f022 0208 bic.w r2, r2, #8 - 80296f8: 601a str r2, [r3, #0] + 802971a: 687b ldr r3, [r7, #4] + 802971c: 681b ldr r3, [r3, #0] + 802971e: 681a ldr r2, [r3, #0] + 8029720: 687b ldr r3, [r7, #4] + 8029722: 681b ldr r3, [r3, #0] + 8029724: f022 0208 bic.w r2, r2, #8 + 8029728: 601a str r2, [r3, #0] } if(hdma->XferHalfCpltCallback != NULL) - 80296fa: 687b ldr r3, [r7, #4] - 80296fc: 6c1b ldr r3, [r3, #64] ; 0x40 - 80296fe: 2b00 cmp r3, #0 - 8029700: d003 beq.n 802970a + 802972a: 687b ldr r3, [r7, #4] + 802972c: 6c1b ldr r3, [r3, #64] ; 0x40 + 802972e: 2b00 cmp r3, #0 + 8029730: d003 beq.n 802973a { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); - 8029702: 687b ldr r3, [r7, #4] - 8029704: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029706: 6878 ldr r0, [r7, #4] - 8029708: 4798 blx r3 + 8029732: 687b ldr r3, [r7, #4] + 8029734: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029736: 6878 ldr r0, [r7, #4] + 8029738: 4798 blx r3 } } } } /* Transfer Complete Interrupt management ***********************************/ if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 802970a: 687b ldr r3, [r7, #4] - 802970c: 6ddb ldr r3, [r3, #92] ; 0x5c - 802970e: f003 031f and.w r3, r3, #31 - 8029712: 2220 movs r2, #32 - 8029714: 409a lsls r2, r3 - 8029716: 69bb ldr r3, [r7, #24] - 8029718: 4013 ands r3, r2 - 802971a: 2b00 cmp r3, #0 - 802971c: f000 8110 beq.w 8029940 + 802973a: 687b ldr r3, [r7, #4] + 802973c: 6ddb ldr r3, [r3, #92] ; 0x5c + 802973e: f003 031f and.w r3, r3, #31 + 8029742: 2220 movs r2, #32 + 8029744: 409a lsls r2, r3 + 8029746: 69bb ldr r3, [r7, #24] + 8029748: 4013 ands r3, r2 + 802974a: 2b00 cmp r3, #0 + 802974c: f000 8110 beq.w 8029970 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != 0U) - 8029720: 687b ldr r3, [r7, #4] - 8029722: 681b ldr r3, [r3, #0] - 8029724: 4a2c ldr r2, [pc, #176] ; (80297d8 ) - 8029726: 4293 cmp r3, r2 - 8029728: d04a beq.n 80297c0 - 802972a: 687b ldr r3, [r7, #4] - 802972c: 681b ldr r3, [r3, #0] - 802972e: 4a2b ldr r2, [pc, #172] ; (80297dc ) - 8029730: 4293 cmp r3, r2 - 8029732: d045 beq.n 80297c0 - 8029734: 687b ldr r3, [r7, #4] - 8029736: 681b ldr r3, [r3, #0] - 8029738: 4a29 ldr r2, [pc, #164] ; (80297e0 ) - 802973a: 4293 cmp r3, r2 - 802973c: d040 beq.n 80297c0 - 802973e: 687b ldr r3, [r7, #4] - 8029740: 681b ldr r3, [r3, #0] - 8029742: 4a28 ldr r2, [pc, #160] ; (80297e4 ) - 8029744: 4293 cmp r3, r2 - 8029746: d03b beq.n 80297c0 - 8029748: 687b ldr r3, [r7, #4] - 802974a: 681b ldr r3, [r3, #0] - 802974c: 4a26 ldr r2, [pc, #152] ; (80297e8 ) - 802974e: 4293 cmp r3, r2 - 8029750: d036 beq.n 80297c0 - 8029752: 687b ldr r3, [r7, #4] - 8029754: 681b ldr r3, [r3, #0] - 8029756: 4a25 ldr r2, [pc, #148] ; (80297ec ) - 8029758: 4293 cmp r3, r2 - 802975a: d031 beq.n 80297c0 - 802975c: 687b ldr r3, [r7, #4] - 802975e: 681b ldr r3, [r3, #0] - 8029760: 4a23 ldr r2, [pc, #140] ; (80297f0 ) - 8029762: 4293 cmp r3, r2 - 8029764: d02c beq.n 80297c0 - 8029766: 687b ldr r3, [r7, #4] - 8029768: 681b ldr r3, [r3, #0] - 802976a: 4a22 ldr r2, [pc, #136] ; (80297f4 ) - 802976c: 4293 cmp r3, r2 - 802976e: d027 beq.n 80297c0 - 8029770: 687b ldr r3, [r7, #4] - 8029772: 681b ldr r3, [r3, #0] - 8029774: 4a20 ldr r2, [pc, #128] ; (80297f8 ) - 8029776: 4293 cmp r3, r2 - 8029778: d022 beq.n 80297c0 - 802977a: 687b ldr r3, [r7, #4] - 802977c: 681b ldr r3, [r3, #0] - 802977e: 4a1f ldr r2, [pc, #124] ; (80297fc ) - 8029780: 4293 cmp r3, r2 - 8029782: d01d beq.n 80297c0 - 8029784: 687b ldr r3, [r7, #4] - 8029786: 681b ldr r3, [r3, #0] - 8029788: 4a1d ldr r2, [pc, #116] ; (8029800 ) - 802978a: 4293 cmp r3, r2 - 802978c: d018 beq.n 80297c0 - 802978e: 687b ldr r3, [r7, #4] - 8029790: 681b ldr r3, [r3, #0] - 8029792: 4a1c ldr r2, [pc, #112] ; (8029804 ) - 8029794: 4293 cmp r3, r2 - 8029796: d013 beq.n 80297c0 - 8029798: 687b ldr r3, [r7, #4] - 802979a: 681b ldr r3, [r3, #0] - 802979c: 4a1a ldr r2, [pc, #104] ; (8029808 ) - 802979e: 4293 cmp r3, r2 - 80297a0: d00e beq.n 80297c0 - 80297a2: 687b ldr r3, [r7, #4] - 80297a4: 681b ldr r3, [r3, #0] - 80297a6: 4a19 ldr r2, [pc, #100] ; (802980c ) - 80297a8: 4293 cmp r3, r2 - 80297aa: d009 beq.n 80297c0 - 80297ac: 687b ldr r3, [r7, #4] - 80297ae: 681b ldr r3, [r3, #0] - 80297b0: 4a17 ldr r2, [pc, #92] ; (8029810 ) - 80297b2: 4293 cmp r3, r2 - 80297b4: d004 beq.n 80297c0 - 80297b6: 687b ldr r3, [r7, #4] - 80297b8: 681b ldr r3, [r3, #0] - 80297ba: 4a16 ldr r2, [pc, #88] ; (8029814 ) - 80297bc: 4293 cmp r3, r2 - 80297be: d12b bne.n 8029818 - 80297c0: 687b ldr r3, [r7, #4] - 80297c2: 681b ldr r3, [r3, #0] - 80297c4: 681b ldr r3, [r3, #0] - 80297c6: f003 0310 and.w r3, r3, #16 - 80297ca: 2b00 cmp r3, #0 - 80297cc: bf14 ite ne - 80297ce: 2301 movne r3, #1 - 80297d0: 2300 moveq r3, #0 - 80297d2: b2db uxtb r3, r3 - 80297d4: e02a b.n 802982c - 80297d6: bf00 nop - 80297d8: 40020010 .word 0x40020010 - 80297dc: 40020028 .word 0x40020028 - 80297e0: 40020040 .word 0x40020040 - 80297e4: 40020058 .word 0x40020058 - 80297e8: 40020070 .word 0x40020070 - 80297ec: 40020088 .word 0x40020088 - 80297f0: 400200a0 .word 0x400200a0 - 80297f4: 400200b8 .word 0x400200b8 - 80297f8: 40020410 .word 0x40020410 - 80297fc: 40020428 .word 0x40020428 - 8029800: 40020440 .word 0x40020440 - 8029804: 40020458 .word 0x40020458 - 8029808: 40020470 .word 0x40020470 - 802980c: 40020488 .word 0x40020488 - 8029810: 400204a0 .word 0x400204a0 - 8029814: 400204b8 .word 0x400204b8 - 8029818: 687b ldr r3, [r7, #4] - 802981a: 681b ldr r3, [r3, #0] - 802981c: 681b ldr r3, [r3, #0] - 802981e: f003 0302 and.w r3, r3, #2 - 8029822: 2b00 cmp r3, #0 - 8029824: bf14 ite ne - 8029826: 2301 movne r3, #1 - 8029828: 2300 moveq r3, #0 - 802982a: b2db uxtb r3, r3 - 802982c: 2b00 cmp r3, #0 - 802982e: f000 8087 beq.w 8029940 + 8029750: 687b ldr r3, [r7, #4] + 8029752: 681b ldr r3, [r3, #0] + 8029754: 4a2c ldr r2, [pc, #176] ; (8029808 ) + 8029756: 4293 cmp r3, r2 + 8029758: d04a beq.n 80297f0 + 802975a: 687b ldr r3, [r7, #4] + 802975c: 681b ldr r3, [r3, #0] + 802975e: 4a2b ldr r2, [pc, #172] ; (802980c ) + 8029760: 4293 cmp r3, r2 + 8029762: d045 beq.n 80297f0 + 8029764: 687b ldr r3, [r7, #4] + 8029766: 681b ldr r3, [r3, #0] + 8029768: 4a29 ldr r2, [pc, #164] ; (8029810 ) + 802976a: 4293 cmp r3, r2 + 802976c: d040 beq.n 80297f0 + 802976e: 687b ldr r3, [r7, #4] + 8029770: 681b ldr r3, [r3, #0] + 8029772: 4a28 ldr r2, [pc, #160] ; (8029814 ) + 8029774: 4293 cmp r3, r2 + 8029776: d03b beq.n 80297f0 + 8029778: 687b ldr r3, [r7, #4] + 802977a: 681b ldr r3, [r3, #0] + 802977c: 4a26 ldr r2, [pc, #152] ; (8029818 ) + 802977e: 4293 cmp r3, r2 + 8029780: d036 beq.n 80297f0 + 8029782: 687b ldr r3, [r7, #4] + 8029784: 681b ldr r3, [r3, #0] + 8029786: 4a25 ldr r2, [pc, #148] ; (802981c ) + 8029788: 4293 cmp r3, r2 + 802978a: d031 beq.n 80297f0 + 802978c: 687b ldr r3, [r7, #4] + 802978e: 681b ldr r3, [r3, #0] + 8029790: 4a23 ldr r2, [pc, #140] ; (8029820 ) + 8029792: 4293 cmp r3, r2 + 8029794: d02c beq.n 80297f0 + 8029796: 687b ldr r3, [r7, #4] + 8029798: 681b ldr r3, [r3, #0] + 802979a: 4a22 ldr r2, [pc, #136] ; (8029824 ) + 802979c: 4293 cmp r3, r2 + 802979e: d027 beq.n 80297f0 + 80297a0: 687b ldr r3, [r7, #4] + 80297a2: 681b ldr r3, [r3, #0] + 80297a4: 4a20 ldr r2, [pc, #128] ; (8029828 ) + 80297a6: 4293 cmp r3, r2 + 80297a8: d022 beq.n 80297f0 + 80297aa: 687b ldr r3, [r7, #4] + 80297ac: 681b ldr r3, [r3, #0] + 80297ae: 4a1f ldr r2, [pc, #124] ; (802982c ) + 80297b0: 4293 cmp r3, r2 + 80297b2: d01d beq.n 80297f0 + 80297b4: 687b ldr r3, [r7, #4] + 80297b6: 681b ldr r3, [r3, #0] + 80297b8: 4a1d ldr r2, [pc, #116] ; (8029830 ) + 80297ba: 4293 cmp r3, r2 + 80297bc: d018 beq.n 80297f0 + 80297be: 687b ldr r3, [r7, #4] + 80297c0: 681b ldr r3, [r3, #0] + 80297c2: 4a1c ldr r2, [pc, #112] ; (8029834 ) + 80297c4: 4293 cmp r3, r2 + 80297c6: d013 beq.n 80297f0 + 80297c8: 687b ldr r3, [r7, #4] + 80297ca: 681b ldr r3, [r3, #0] + 80297cc: 4a1a ldr r2, [pc, #104] ; (8029838 ) + 80297ce: 4293 cmp r3, r2 + 80297d0: d00e beq.n 80297f0 + 80297d2: 687b ldr r3, [r7, #4] + 80297d4: 681b ldr r3, [r3, #0] + 80297d6: 4a19 ldr r2, [pc, #100] ; (802983c ) + 80297d8: 4293 cmp r3, r2 + 80297da: d009 beq.n 80297f0 + 80297dc: 687b ldr r3, [r7, #4] + 80297de: 681b ldr r3, [r3, #0] + 80297e0: 4a17 ldr r2, [pc, #92] ; (8029840 ) + 80297e2: 4293 cmp r3, r2 + 80297e4: d004 beq.n 80297f0 + 80297e6: 687b ldr r3, [r7, #4] + 80297e8: 681b ldr r3, [r3, #0] + 80297ea: 4a16 ldr r2, [pc, #88] ; (8029844 ) + 80297ec: 4293 cmp r3, r2 + 80297ee: d12b bne.n 8029848 + 80297f0: 687b ldr r3, [r7, #4] + 80297f2: 681b ldr r3, [r3, #0] + 80297f4: 681b ldr r3, [r3, #0] + 80297f6: f003 0310 and.w r3, r3, #16 + 80297fa: 2b00 cmp r3, #0 + 80297fc: bf14 ite ne + 80297fe: 2301 movne r3, #1 + 8029800: 2300 moveq r3, #0 + 8029802: b2db uxtb r3, r3 + 8029804: e02a b.n 802985c + 8029806: bf00 nop + 8029808: 40020010 .word 0x40020010 + 802980c: 40020028 .word 0x40020028 + 8029810: 40020040 .word 0x40020040 + 8029814: 40020058 .word 0x40020058 + 8029818: 40020070 .word 0x40020070 + 802981c: 40020088 .word 0x40020088 + 8029820: 400200a0 .word 0x400200a0 + 8029824: 400200b8 .word 0x400200b8 + 8029828: 40020410 .word 0x40020410 + 802982c: 40020428 .word 0x40020428 + 8029830: 40020440 .word 0x40020440 + 8029834: 40020458 .word 0x40020458 + 8029838: 40020470 .word 0x40020470 + 802983c: 40020488 .word 0x40020488 + 8029840: 400204a0 .word 0x400204a0 + 8029844: 400204b8 .word 0x400204b8 + 8029848: 687b ldr r3, [r7, #4] + 802984a: 681b ldr r3, [r3, #0] + 802984c: 681b ldr r3, [r3, #0] + 802984e: f003 0302 and.w r3, r3, #2 + 8029852: 2b00 cmp r3, #0 + 8029854: bf14 ite ne + 8029856: 2301 movne r3, #1 + 8029858: 2300 moveq r3, #0 + 802985a: b2db uxtb r3, r3 + 802985c: 2b00 cmp r3, #0 + 802985e: f000 8087 beq.w 8029970 { /* Clear the transfer complete flag */ regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU); - 8029832: 687b ldr r3, [r7, #4] - 8029834: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029836: f003 031f and.w r3, r3, #31 - 802983a: 2220 movs r2, #32 - 802983c: 409a lsls r2, r3 - 802983e: 6a3b ldr r3, [r7, #32] - 8029840: 609a str r2, [r3, #8] + 8029862: 687b ldr r3, [r7, #4] + 8029864: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029866: f003 031f and.w r3, r3, #31 + 802986a: 2220 movs r2, #32 + 802986c: 409a lsls r2, r3 + 802986e: 6a3b ldr r3, [r7, #32] + 8029870: 609a str r2, [r3, #8] if(HAL_DMA_STATE_ABORT == hdma->State) - 8029842: 687b ldr r3, [r7, #4] - 8029844: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 8029848: b2db uxtb r3, r3 - 802984a: 2b04 cmp r3, #4 - 802984c: d139 bne.n 80298c2 + 8029872: 687b ldr r3, [r7, #4] + 8029874: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8029878: b2db uxtb r3, r3 + 802987a: 2b04 cmp r3, #4 + 802987c: d139 bne.n 80298f2 { /* Disable all the transfer interrupts */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME); - 802984e: 687b ldr r3, [r7, #4] - 8029850: 681b ldr r3, [r3, #0] - 8029852: 681a ldr r2, [r3, #0] - 8029854: 687b ldr r3, [r7, #4] - 8029856: 681b ldr r3, [r3, #0] - 8029858: f022 0216 bic.w r2, r2, #22 - 802985c: 601a str r2, [r3, #0] - ((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE); - 802985e: 687b ldr r3, [r7, #4] - 8029860: 681b ldr r3, [r3, #0] - 8029862: 695a ldr r2, [r3, #20] - 8029864: 687b ldr r3, [r7, #4] - 8029866: 681b ldr r3, [r3, #0] - 8029868: f022 0280 bic.w r2, r2, #128 ; 0x80 - 802986c: 615a str r2, [r3, #20] - - if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) - 802986e: 687b ldr r3, [r7, #4] - 8029870: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029872: 2b00 cmp r3, #0 - 8029874: d103 bne.n 802987e - 8029876: 687b ldr r3, [r7, #4] - 8029878: 6c9b ldr r3, [r3, #72] ; 0x48 - 802987a: 2b00 cmp r3, #0 - 802987c: d007 beq.n 802988e - { - ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_HT); 802987e: 687b ldr r3, [r7, #4] 8029880: 681b ldr r3, [r3, #0] 8029882: 681a ldr r2, [r3, #0] 8029884: 687b ldr r3, [r7, #4] 8029886: 681b ldr r3, [r3, #0] - 8029888: f022 0208 bic.w r2, r2, #8 + 8029888: f022 0216 bic.w r2, r2, #22 802988c: 601a str r2, [r3, #0] + ((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE); + 802988e: 687b ldr r3, [r7, #4] + 8029890: 681b ldr r3, [r3, #0] + 8029892: 695a ldr r2, [r3, #20] + 8029894: 687b ldr r3, [r7, #4] + 8029896: 681b ldr r3, [r3, #0] + 8029898: f022 0280 bic.w r2, r2, #128 ; 0x80 + 802989c: 615a str r2, [r3, #20] + + if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) + 802989e: 687b ldr r3, [r7, #4] + 80298a0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80298a2: 2b00 cmp r3, #0 + 80298a4: d103 bne.n 80298ae + 80298a6: 687b ldr r3, [r7, #4] + 80298a8: 6c9b ldr r3, [r3, #72] ; 0x48 + 80298aa: 2b00 cmp r3, #0 + 80298ac: d007 beq.n 80298be + { + ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_HT); + 80298ae: 687b ldr r3, [r7, #4] + 80298b0: 681b ldr r3, [r3, #0] + 80298b2: 681a ldr r2, [r3, #0] + 80298b4: 687b ldr r3, [r7, #4] + 80298b6: 681b ldr r3, [r3, #0] + 80298b8: f022 0208 bic.w r2, r2, #8 + 80298bc: 601a str r2, [r3, #0] } /* Clear all interrupt flags at correct offset within the register */ regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); - 802988e: 687b ldr r3, [r7, #4] - 8029890: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029892: f003 031f and.w r3, r3, #31 - 8029896: 223f movs r2, #63 ; 0x3f - 8029898: 409a lsls r2, r3 - 802989a: 6a3b ldr r3, [r7, #32] - 802989c: 609a str r2, [r3, #8] + 80298be: 687b ldr r3, [r7, #4] + 80298c0: 6ddb ldr r3, [r3, #92] ; 0x5c + 80298c2: f003 031f and.w r3, r3, #31 + 80298c6: 223f movs r2, #63 ; 0x3f + 80298c8: 409a lsls r2, r3 + 80298ca: 6a3b ldr r3, [r7, #32] + 80298cc: 609a str r2, [r3, #8] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 802989e: 687b ldr r3, [r7, #4] - 80298a0: 2201 movs r2, #1 - 80298a2: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 80298ce: 687b ldr r3, [r7, #4] + 80298d0: 2201 movs r2, #1 + 80298d2: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80298a6: 687b ldr r3, [r7, #4] - 80298a8: 2200 movs r2, #0 - 80298aa: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 80298d6: 687b ldr r3, [r7, #4] + 80298d8: 2200 movs r2, #0 + 80298da: f883 2034 strb.w r2, [r3, #52] ; 0x34 if(hdma->XferAbortCallback != NULL) - 80298ae: 687b ldr r3, [r7, #4] - 80298b0: 6d1b ldr r3, [r3, #80] ; 0x50 - 80298b2: 2b00 cmp r3, #0 - 80298b4: f000 834a beq.w 8029f4c + 80298de: 687b ldr r3, [r7, #4] + 80298e0: 6d1b ldr r3, [r3, #80] ; 0x50 + 80298e2: 2b00 cmp r3, #0 + 80298e4: f000 834a beq.w 8029f7c { hdma->XferAbortCallback(hdma); - 80298b8: 687b ldr r3, [r7, #4] - 80298ba: 6d1b ldr r3, [r3, #80] ; 0x50 - 80298bc: 6878 ldr r0, [r7, #4] - 80298be: 4798 blx r3 + 80298e8: 687b ldr r3, [r7, #4] + 80298ea: 6d1b ldr r3, [r3, #80] ; 0x50 + 80298ec: 6878 ldr r0, [r7, #4] + 80298ee: 4798 blx r3 } return; - 80298c0: e344 b.n 8029f4c + 80298f0: e344 b.n 8029f7c } if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U) - 80298c2: 687b ldr r3, [r7, #4] - 80298c4: 681b ldr r3, [r3, #0] - 80298c6: 681b ldr r3, [r3, #0] - 80298c8: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 80298cc: 2b00 cmp r3, #0 - 80298ce: d018 beq.n 8029902 + 80298f2: 687b ldr r3, [r7, #4] + 80298f4: 681b ldr r3, [r3, #0] + 80298f6: 681b ldr r3, [r3, #0] + 80298f8: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 80298fc: 2b00 cmp r3, #0 + 80298fe: d018 beq.n 8029932 { /* Current memory buffer used is Memory 0 */ if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U) - 80298d0: 687b ldr r3, [r7, #4] - 80298d2: 681b ldr r3, [r3, #0] - 80298d4: 681b ldr r3, [r3, #0] - 80298d6: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 80298da: 2b00 cmp r3, #0 - 80298dc: d108 bne.n 80298f0 + 8029900: 687b ldr r3, [r7, #4] + 8029902: 681b ldr r3, [r3, #0] + 8029904: 681b ldr r3, [r3, #0] + 8029906: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 802990a: 2b00 cmp r3, #0 + 802990c: d108 bne.n 8029920 { if(hdma->XferM1CpltCallback != NULL) - 80298de: 687b ldr r3, [r7, #4] - 80298e0: 6c5b ldr r3, [r3, #68] ; 0x44 - 80298e2: 2b00 cmp r3, #0 - 80298e4: d02c beq.n 8029940 + 802990e: 687b ldr r3, [r7, #4] + 8029910: 6c5b ldr r3, [r3, #68] ; 0x44 + 8029912: 2b00 cmp r3, #0 + 8029914: d02c beq.n 8029970 { /* Transfer complete Callback for memory1 */ hdma->XferM1CpltCallback(hdma); - 80298e6: 687b ldr r3, [r7, #4] - 80298e8: 6c5b ldr r3, [r3, #68] ; 0x44 - 80298ea: 6878 ldr r0, [r7, #4] - 80298ec: 4798 blx r3 - 80298ee: e027 b.n 8029940 + 8029916: 687b ldr r3, [r7, #4] + 8029918: 6c5b ldr r3, [r3, #68] ; 0x44 + 802991a: 6878 ldr r0, [r7, #4] + 802991c: 4798 blx r3 + 802991e: e027 b.n 8029970 } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferCpltCallback != NULL) - 80298f0: 687b ldr r3, [r7, #4] - 80298f2: 6bdb ldr r3, [r3, #60] ; 0x3c - 80298f4: 2b00 cmp r3, #0 - 80298f6: d023 beq.n 8029940 + 8029920: 687b ldr r3, [r7, #4] + 8029922: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029924: 2b00 cmp r3, #0 + 8029926: d023 beq.n 8029970 { /* Transfer complete Callback for memory0 */ hdma->XferCpltCallback(hdma); - 80298f8: 687b ldr r3, [r7, #4] - 80298fa: 6bdb ldr r3, [r3, #60] ; 0x3c - 80298fc: 6878 ldr r0, [r7, #4] - 80298fe: 4798 blx r3 - 8029900: e01e b.n 8029940 + 8029928: 687b ldr r3, [r7, #4] + 802992a: 6bdb ldr r3, [r3, #60] ; 0x3c + 802992c: 6878 ldr r0, [r7, #4] + 802992e: 4798 blx r3 + 8029930: e01e b.n 8029970 } } /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */ else { if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U) - 8029902: 687b ldr r3, [r7, #4] - 8029904: 681b ldr r3, [r3, #0] - 8029906: 681b ldr r3, [r3, #0] - 8029908: f403 7380 and.w r3, r3, #256 ; 0x100 - 802990c: 2b00 cmp r3, #0 - 802990e: d10f bne.n 8029930 + 8029932: 687b ldr r3, [r7, #4] + 8029934: 681b ldr r3, [r3, #0] + 8029936: 681b ldr r3, [r3, #0] + 8029938: f403 7380 and.w r3, r3, #256 ; 0x100 + 802993c: 2b00 cmp r3, #0 + 802993e: d10f bne.n 8029960 { /* Disable the transfer complete interrupt */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC); - 8029910: 687b ldr r3, [r7, #4] - 8029912: 681b ldr r3, [r3, #0] - 8029914: 681a ldr r2, [r3, #0] - 8029916: 687b ldr r3, [r7, #4] - 8029918: 681b ldr r3, [r3, #0] - 802991a: f022 0210 bic.w r2, r2, #16 - 802991e: 601a str r2, [r3, #0] + 8029940: 687b ldr r3, [r7, #4] + 8029942: 681b ldr r3, [r3, #0] + 8029944: 681a ldr r2, [r3, #0] + 8029946: 687b ldr r3, [r7, #4] + 8029948: 681b ldr r3, [r3, #0] + 802994a: f022 0210 bic.w r2, r2, #16 + 802994e: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8029920: 687b ldr r3, [r7, #4] - 8029922: 2201 movs r2, #1 - 8029924: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029950: 687b ldr r3, [r7, #4] + 8029952: 2201 movs r2, #1 + 8029954: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029928: 687b ldr r3, [r7, #4] - 802992a: 2200 movs r2, #0 - 802992c: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8029958: 687b ldr r3, [r7, #4] + 802995a: 2200 movs r2, #0 + 802995c: f883 2034 strb.w r2, [r3, #52] ; 0x34 } if(hdma->XferCpltCallback != NULL) - 8029930: 687b ldr r3, [r7, #4] - 8029932: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029934: 2b00 cmp r3, #0 - 8029936: d003 beq.n 8029940 + 8029960: 687b ldr r3, [r7, #4] + 8029962: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029964: 2b00 cmp r3, #0 + 8029966: d003 beq.n 8029970 { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); - 8029938: 687b ldr r3, [r7, #4] - 802993a: 6bdb ldr r3, [r3, #60] ; 0x3c - 802993c: 6878 ldr r0, [r7, #4] - 802993e: 4798 blx r3 + 8029968: 687b ldr r3, [r7, #4] + 802996a: 6bdb ldr r3, [r3, #60] ; 0x3c + 802996c: 6878 ldr r0, [r7, #4] + 802996e: 4798 blx r3 } } } /* manage error case */ if(hdma->ErrorCode != HAL_DMA_ERROR_NONE) - 8029940: 687b ldr r3, [r7, #4] - 8029942: 6d5b ldr r3, [r3, #84] ; 0x54 - 8029944: 2b00 cmp r3, #0 - 8029946: f000 8306 beq.w 8029f56 + 8029970: 687b ldr r3, [r7, #4] + 8029972: 6d5b ldr r3, [r3, #84] ; 0x54 + 8029974: 2b00 cmp r3, #0 + 8029976: f000 8306 beq.w 8029f86 { if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != 0U) - 802994a: 687b ldr r3, [r7, #4] - 802994c: 6d5b ldr r3, [r3, #84] ; 0x54 - 802994e: f003 0301 and.w r3, r3, #1 - 8029952: 2b00 cmp r3, #0 - 8029954: f000 8088 beq.w 8029a68 + 802997a: 687b ldr r3, [r7, #4] + 802997c: 6d5b ldr r3, [r3, #84] ; 0x54 + 802997e: f003 0301 and.w r3, r3, #1 + 8029982: 2b00 cmp r3, #0 + 8029984: f000 8088 beq.w 8029a98 { hdma->State = HAL_DMA_STATE_ABORT; - 8029958: 687b ldr r3, [r7, #4] - 802995a: 2204 movs r2, #4 - 802995c: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029988: 687b ldr r3, [r7, #4] + 802998a: 2204 movs r2, #4 + 802998c: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Disable the stream */ __HAL_DMA_DISABLE(hdma); - 8029960: 687b ldr r3, [r7, #4] - 8029962: 681b ldr r3, [r3, #0] - 8029964: 4a7a ldr r2, [pc, #488] ; (8029b50 ) - 8029966: 4293 cmp r3, r2 - 8029968: d04a beq.n 8029a00 - 802996a: 687b ldr r3, [r7, #4] - 802996c: 681b ldr r3, [r3, #0] - 802996e: 4a79 ldr r2, [pc, #484] ; (8029b54 ) - 8029970: 4293 cmp r3, r2 - 8029972: d045 beq.n 8029a00 - 8029974: 687b ldr r3, [r7, #4] - 8029976: 681b ldr r3, [r3, #0] - 8029978: 4a77 ldr r2, [pc, #476] ; (8029b58 ) - 802997a: 4293 cmp r3, r2 - 802997c: d040 beq.n 8029a00 - 802997e: 687b ldr r3, [r7, #4] - 8029980: 681b ldr r3, [r3, #0] - 8029982: 4a76 ldr r2, [pc, #472] ; (8029b5c ) - 8029984: 4293 cmp r3, r2 - 8029986: d03b beq.n 8029a00 - 8029988: 687b ldr r3, [r7, #4] - 802998a: 681b ldr r3, [r3, #0] - 802998c: 4a74 ldr r2, [pc, #464] ; (8029b60 ) - 802998e: 4293 cmp r3, r2 - 8029990: d036 beq.n 8029a00 - 8029992: 687b ldr r3, [r7, #4] - 8029994: 681b ldr r3, [r3, #0] - 8029996: 4a73 ldr r2, [pc, #460] ; (8029b64 ) - 8029998: 4293 cmp r3, r2 - 802999a: d031 beq.n 8029a00 - 802999c: 687b ldr r3, [r7, #4] - 802999e: 681b ldr r3, [r3, #0] - 80299a0: 4a71 ldr r2, [pc, #452] ; (8029b68 ) - 80299a2: 4293 cmp r3, r2 - 80299a4: d02c beq.n 8029a00 - 80299a6: 687b ldr r3, [r7, #4] - 80299a8: 681b ldr r3, [r3, #0] - 80299aa: 4a70 ldr r2, [pc, #448] ; (8029b6c ) - 80299ac: 4293 cmp r3, r2 - 80299ae: d027 beq.n 8029a00 - 80299b0: 687b ldr r3, [r7, #4] - 80299b2: 681b ldr r3, [r3, #0] - 80299b4: 4a6e ldr r2, [pc, #440] ; (8029b70 ) - 80299b6: 4293 cmp r3, r2 - 80299b8: d022 beq.n 8029a00 - 80299ba: 687b ldr r3, [r7, #4] - 80299bc: 681b ldr r3, [r3, #0] - 80299be: 4a6d ldr r2, [pc, #436] ; (8029b74 ) - 80299c0: 4293 cmp r3, r2 - 80299c2: d01d beq.n 8029a00 - 80299c4: 687b ldr r3, [r7, #4] - 80299c6: 681b ldr r3, [r3, #0] - 80299c8: 4a6b ldr r2, [pc, #428] ; (8029b78 ) - 80299ca: 4293 cmp r3, r2 - 80299cc: d018 beq.n 8029a00 - 80299ce: 687b ldr r3, [r7, #4] - 80299d0: 681b ldr r3, [r3, #0] - 80299d2: 4a6a ldr r2, [pc, #424] ; (8029b7c ) - 80299d4: 4293 cmp r3, r2 - 80299d6: d013 beq.n 8029a00 - 80299d8: 687b ldr r3, [r7, #4] - 80299da: 681b ldr r3, [r3, #0] - 80299dc: 4a68 ldr r2, [pc, #416] ; (8029b80 ) - 80299de: 4293 cmp r3, r2 - 80299e0: d00e beq.n 8029a00 - 80299e2: 687b ldr r3, [r7, #4] - 80299e4: 681b ldr r3, [r3, #0] - 80299e6: 4a67 ldr r2, [pc, #412] ; (8029b84 ) - 80299e8: 4293 cmp r3, r2 - 80299ea: d009 beq.n 8029a00 - 80299ec: 687b ldr r3, [r7, #4] - 80299ee: 681b ldr r3, [r3, #0] - 80299f0: 4a65 ldr r2, [pc, #404] ; (8029b88 ) - 80299f2: 4293 cmp r3, r2 - 80299f4: d004 beq.n 8029a00 - 80299f6: 687b ldr r3, [r7, #4] - 80299f8: 681b ldr r3, [r3, #0] - 80299fa: 4a64 ldr r2, [pc, #400] ; (8029b8c ) - 80299fc: 4293 cmp r3, r2 - 80299fe: d108 bne.n 8029a12 - 8029a00: 687b ldr r3, [r7, #4] - 8029a02: 681b ldr r3, [r3, #0] - 8029a04: 681a ldr r2, [r3, #0] - 8029a06: 687b ldr r3, [r7, #4] - 8029a08: 681b ldr r3, [r3, #0] - 8029a0a: f022 0201 bic.w r2, r2, #1 - 8029a0e: 601a str r2, [r3, #0] - 8029a10: e007 b.n 8029a22 + 8029990: 687b ldr r3, [r7, #4] + 8029992: 681b ldr r3, [r3, #0] + 8029994: 4a7a ldr r2, [pc, #488] ; (8029b80 ) + 8029996: 4293 cmp r3, r2 + 8029998: d04a beq.n 8029a30 + 802999a: 687b ldr r3, [r7, #4] + 802999c: 681b ldr r3, [r3, #0] + 802999e: 4a79 ldr r2, [pc, #484] ; (8029b84 ) + 80299a0: 4293 cmp r3, r2 + 80299a2: d045 beq.n 8029a30 + 80299a4: 687b ldr r3, [r7, #4] + 80299a6: 681b ldr r3, [r3, #0] + 80299a8: 4a77 ldr r2, [pc, #476] ; (8029b88 ) + 80299aa: 4293 cmp r3, r2 + 80299ac: d040 beq.n 8029a30 + 80299ae: 687b ldr r3, [r7, #4] + 80299b0: 681b ldr r3, [r3, #0] + 80299b2: 4a76 ldr r2, [pc, #472] ; (8029b8c ) + 80299b4: 4293 cmp r3, r2 + 80299b6: d03b beq.n 8029a30 + 80299b8: 687b ldr r3, [r7, #4] + 80299ba: 681b ldr r3, [r3, #0] + 80299bc: 4a74 ldr r2, [pc, #464] ; (8029b90 ) + 80299be: 4293 cmp r3, r2 + 80299c0: d036 beq.n 8029a30 + 80299c2: 687b ldr r3, [r7, #4] + 80299c4: 681b ldr r3, [r3, #0] + 80299c6: 4a73 ldr r2, [pc, #460] ; (8029b94 ) + 80299c8: 4293 cmp r3, r2 + 80299ca: d031 beq.n 8029a30 + 80299cc: 687b ldr r3, [r7, #4] + 80299ce: 681b ldr r3, [r3, #0] + 80299d0: 4a71 ldr r2, [pc, #452] ; (8029b98 ) + 80299d2: 4293 cmp r3, r2 + 80299d4: d02c beq.n 8029a30 + 80299d6: 687b ldr r3, [r7, #4] + 80299d8: 681b ldr r3, [r3, #0] + 80299da: 4a70 ldr r2, [pc, #448] ; (8029b9c ) + 80299dc: 4293 cmp r3, r2 + 80299de: d027 beq.n 8029a30 + 80299e0: 687b ldr r3, [r7, #4] + 80299e2: 681b ldr r3, [r3, #0] + 80299e4: 4a6e ldr r2, [pc, #440] ; (8029ba0 ) + 80299e6: 4293 cmp r3, r2 + 80299e8: d022 beq.n 8029a30 + 80299ea: 687b ldr r3, [r7, #4] + 80299ec: 681b ldr r3, [r3, #0] + 80299ee: 4a6d ldr r2, [pc, #436] ; (8029ba4 ) + 80299f0: 4293 cmp r3, r2 + 80299f2: d01d beq.n 8029a30 + 80299f4: 687b ldr r3, [r7, #4] + 80299f6: 681b ldr r3, [r3, #0] + 80299f8: 4a6b ldr r2, [pc, #428] ; (8029ba8 ) + 80299fa: 4293 cmp r3, r2 + 80299fc: d018 beq.n 8029a30 + 80299fe: 687b ldr r3, [r7, #4] + 8029a00: 681b ldr r3, [r3, #0] + 8029a02: 4a6a ldr r2, [pc, #424] ; (8029bac ) + 8029a04: 4293 cmp r3, r2 + 8029a06: d013 beq.n 8029a30 + 8029a08: 687b ldr r3, [r7, #4] + 8029a0a: 681b ldr r3, [r3, #0] + 8029a0c: 4a68 ldr r2, [pc, #416] ; (8029bb0 ) + 8029a0e: 4293 cmp r3, r2 + 8029a10: d00e beq.n 8029a30 8029a12: 687b ldr r3, [r7, #4] 8029a14: 681b ldr r3, [r3, #0] - 8029a16: 681a ldr r2, [r3, #0] - 8029a18: 687b ldr r3, [r7, #4] - 8029a1a: 681b ldr r3, [r3, #0] - 8029a1c: f022 0201 bic.w r2, r2, #1 - 8029a20: 601a str r2, [r3, #0] + 8029a16: 4a67 ldr r2, [pc, #412] ; (8029bb4 ) + 8029a18: 4293 cmp r3, r2 + 8029a1a: d009 beq.n 8029a30 + 8029a1c: 687b ldr r3, [r7, #4] + 8029a1e: 681b ldr r3, [r3, #0] + 8029a20: 4a65 ldr r2, [pc, #404] ; (8029bb8 ) + 8029a22: 4293 cmp r3, r2 + 8029a24: d004 beq.n 8029a30 + 8029a26: 687b ldr r3, [r7, #4] + 8029a28: 681b ldr r3, [r3, #0] + 8029a2a: 4a64 ldr r2, [pc, #400] ; (8029bbc ) + 8029a2c: 4293 cmp r3, r2 + 8029a2e: d108 bne.n 8029a42 + 8029a30: 687b ldr r3, [r7, #4] + 8029a32: 681b ldr r3, [r3, #0] + 8029a34: 681a ldr r2, [r3, #0] + 8029a36: 687b ldr r3, [r7, #4] + 8029a38: 681b ldr r3, [r3, #0] + 8029a3a: f022 0201 bic.w r2, r2, #1 + 8029a3e: 601a str r2, [r3, #0] + 8029a40: e007 b.n 8029a52 + 8029a42: 687b ldr r3, [r7, #4] + 8029a44: 681b ldr r3, [r3, #0] + 8029a46: 681a ldr r2, [r3, #0] + 8029a48: 687b ldr r3, [r7, #4] + 8029a4a: 681b ldr r3, [r3, #0] + 8029a4c: f022 0201 bic.w r2, r2, #1 + 8029a50: 601a str r2, [r3, #0] do { if (++count > timeout) - 8029a22: 68fb ldr r3, [r7, #12] - 8029a24: 3301 adds r3, #1 - 8029a26: 60fb str r3, [r7, #12] - 8029a28: 6a7a ldr r2, [r7, #36] ; 0x24 - 8029a2a: 429a cmp r2, r3 - 8029a2c: d307 bcc.n 8029a3e + 8029a52: 68fb ldr r3, [r7, #12] + 8029a54: 3301 adds r3, #1 + 8029a56: 60fb str r3, [r7, #12] + 8029a58: 6a7a ldr r2, [r7, #36] ; 0x24 + 8029a5a: 429a cmp r2, r3 + 8029a5c: d307 bcc.n 8029a6e { break; } } while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U); - 8029a2e: 687b ldr r3, [r7, #4] - 8029a30: 681b ldr r3, [r3, #0] - 8029a32: 681b ldr r3, [r3, #0] - 8029a34: f003 0301 and.w r3, r3, #1 - 8029a38: 2b00 cmp r3, #0 - 8029a3a: d1f2 bne.n 8029a22 - 8029a3c: e000 b.n 8029a40 + 8029a5e: 687b ldr r3, [r7, #4] + 8029a60: 681b ldr r3, [r3, #0] + 8029a62: 681b ldr r3, [r3, #0] + 8029a64: f003 0301 and.w r3, r3, #1 + 8029a68: 2b00 cmp r3, #0 + 8029a6a: d1f2 bne.n 8029a52 + 8029a6c: e000 b.n 8029a70 break; - 8029a3e: bf00 nop + 8029a6e: bf00 nop if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U) - 8029a40: 687b ldr r3, [r7, #4] - 8029a42: 681b ldr r3, [r3, #0] - 8029a44: 681b ldr r3, [r3, #0] - 8029a46: f003 0301 and.w r3, r3, #1 - 8029a4a: 2b00 cmp r3, #0 - 8029a4c: d004 beq.n 8029a58 + 8029a70: 687b ldr r3, [r7, #4] + 8029a72: 681b ldr r3, [r3, #0] + 8029a74: 681b ldr r3, [r3, #0] + 8029a76: f003 0301 and.w r3, r3, #1 + 8029a7a: 2b00 cmp r3, #0 + 8029a7c: d004 beq.n 8029a88 { /* Change the DMA state to error if DMA disable fails */ hdma->State = HAL_DMA_STATE_ERROR; - 8029a4e: 687b ldr r3, [r7, #4] - 8029a50: 2203 movs r2, #3 - 8029a52: f883 2035 strb.w r2, [r3, #53] ; 0x35 - 8029a56: e003 b.n 8029a60 + 8029a7e: 687b ldr r3, [r7, #4] + 8029a80: 2203 movs r2, #3 + 8029a82: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029a86: e003 b.n 8029a90 } else { /* Change the DMA state to Ready if DMA disable success */ hdma->State = HAL_DMA_STATE_READY; - 8029a58: 687b ldr r3, [r7, #4] - 8029a5a: 2201 movs r2, #1 - 8029a5c: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029a88: 687b ldr r3, [r7, #4] + 8029a8a: 2201 movs r2, #1 + 8029a8c: f883 2035 strb.w r2, [r3, #53] ; 0x35 } /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029a60: 687b ldr r3, [r7, #4] - 8029a62: 2200 movs r2, #0 - 8029a64: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8029a90: 687b ldr r3, [r7, #4] + 8029a92: 2200 movs r2, #0 + 8029a94: f883 2034 strb.w r2, [r3, #52] ; 0x34 } if(hdma->XferErrorCallback != NULL) - 8029a68: 687b ldr r3, [r7, #4] - 8029a6a: 6cdb ldr r3, [r3, #76] ; 0x4c - 8029a6c: 2b00 cmp r3, #0 - 8029a6e: f000 8272 beq.w 8029f56 + 8029a98: 687b ldr r3, [r7, #4] + 8029a9a: 6cdb ldr r3, [r3, #76] ; 0x4c + 8029a9c: 2b00 cmp r3, #0 + 8029a9e: f000 8272 beq.w 8029f86 { /* Transfer error callback */ hdma->XferErrorCallback(hdma); - 8029a72: 687b ldr r3, [r7, #4] - 8029a74: 6cdb ldr r3, [r3, #76] ; 0x4c - 8029a76: 6878 ldr r0, [r7, #4] - 8029a78: 4798 blx r3 - 8029a7a: e26c b.n 8029f56 + 8029aa2: 687b ldr r3, [r7, #4] + 8029aa4: 6cdb ldr r3, [r3, #76] ; 0x4c + 8029aa6: 6878 ldr r0, [r7, #4] + 8029aa8: 4798 blx r3 + 8029aaa: e26c b.n 8029f86 } } } else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */ - 8029a7c: 687b ldr r3, [r7, #4] - 8029a7e: 681b ldr r3, [r3, #0] - 8029a80: 4a43 ldr r2, [pc, #268] ; (8029b90 ) - 8029a82: 4293 cmp r3, r2 - 8029a84: d022 beq.n 8029acc - 8029a86: 687b ldr r3, [r7, #4] - 8029a88: 681b ldr r3, [r3, #0] - 8029a8a: 4a42 ldr r2, [pc, #264] ; (8029b94 ) - 8029a8c: 4293 cmp r3, r2 - 8029a8e: d01d beq.n 8029acc - 8029a90: 687b ldr r3, [r7, #4] - 8029a92: 681b ldr r3, [r3, #0] - 8029a94: 4a40 ldr r2, [pc, #256] ; (8029b98 ) - 8029a96: 4293 cmp r3, r2 - 8029a98: d018 beq.n 8029acc - 8029a9a: 687b ldr r3, [r7, #4] - 8029a9c: 681b ldr r3, [r3, #0] - 8029a9e: 4a3f ldr r2, [pc, #252] ; (8029b9c ) - 8029aa0: 4293 cmp r3, r2 - 8029aa2: d013 beq.n 8029acc - 8029aa4: 687b ldr r3, [r7, #4] - 8029aa6: 681b ldr r3, [r3, #0] - 8029aa8: 4a3d ldr r2, [pc, #244] ; (8029ba0 ) - 8029aaa: 4293 cmp r3, r2 - 8029aac: d00e beq.n 8029acc - 8029aae: 687b ldr r3, [r7, #4] - 8029ab0: 681b ldr r3, [r3, #0] - 8029ab2: 4a3c ldr r2, [pc, #240] ; (8029ba4 ) - 8029ab4: 4293 cmp r3, r2 - 8029ab6: d009 beq.n 8029acc - 8029ab8: 687b ldr r3, [r7, #4] - 8029aba: 681b ldr r3, [r3, #0] - 8029abc: 4a3a ldr r2, [pc, #232] ; (8029ba8 ) - 8029abe: 4293 cmp r3, r2 - 8029ac0: d004 beq.n 8029acc - 8029ac2: 687b ldr r3, [r7, #4] - 8029ac4: 681b ldr r3, [r3, #0] - 8029ac6: 4a39 ldr r2, [pc, #228] ; (8029bac ) - 8029ac8: 4293 cmp r3, r2 - 8029aca: d101 bne.n 8029ad0 - 8029acc: 2301 movs r3, #1 - 8029ace: e000 b.n 8029ad2 - 8029ad0: 2300 movs r3, #0 - 8029ad2: 2b00 cmp r3, #0 - 8029ad4: f000 823f beq.w 8029f56 + 8029aac: 687b ldr r3, [r7, #4] + 8029aae: 681b ldr r3, [r3, #0] + 8029ab0: 4a43 ldr r2, [pc, #268] ; (8029bc0 ) + 8029ab2: 4293 cmp r3, r2 + 8029ab4: d022 beq.n 8029afc + 8029ab6: 687b ldr r3, [r7, #4] + 8029ab8: 681b ldr r3, [r3, #0] + 8029aba: 4a42 ldr r2, [pc, #264] ; (8029bc4 ) + 8029abc: 4293 cmp r3, r2 + 8029abe: d01d beq.n 8029afc + 8029ac0: 687b ldr r3, [r7, #4] + 8029ac2: 681b ldr r3, [r3, #0] + 8029ac4: 4a40 ldr r2, [pc, #256] ; (8029bc8 ) + 8029ac6: 4293 cmp r3, r2 + 8029ac8: d018 beq.n 8029afc + 8029aca: 687b ldr r3, [r7, #4] + 8029acc: 681b ldr r3, [r3, #0] + 8029ace: 4a3f ldr r2, [pc, #252] ; (8029bcc ) + 8029ad0: 4293 cmp r3, r2 + 8029ad2: d013 beq.n 8029afc + 8029ad4: 687b ldr r3, [r7, #4] + 8029ad6: 681b ldr r3, [r3, #0] + 8029ad8: 4a3d ldr r2, [pc, #244] ; (8029bd0 ) + 8029ada: 4293 cmp r3, r2 + 8029adc: d00e beq.n 8029afc + 8029ade: 687b ldr r3, [r7, #4] + 8029ae0: 681b ldr r3, [r3, #0] + 8029ae2: 4a3c ldr r2, [pc, #240] ; (8029bd4 ) + 8029ae4: 4293 cmp r3, r2 + 8029ae6: d009 beq.n 8029afc + 8029ae8: 687b ldr r3, [r7, #4] + 8029aea: 681b ldr r3, [r3, #0] + 8029aec: 4a3a ldr r2, [pc, #232] ; (8029bd8 ) + 8029aee: 4293 cmp r3, r2 + 8029af0: d004 beq.n 8029afc + 8029af2: 687b ldr r3, [r7, #4] + 8029af4: 681b ldr r3, [r3, #0] + 8029af6: 4a39 ldr r2, [pc, #228] ; (8029bdc ) + 8029af8: 4293 cmp r3, r2 + 8029afa: d101 bne.n 8029b00 + 8029afc: 2301 movs r3, #1 + 8029afe: e000 b.n 8029b02 + 8029b00: 2300 movs r3, #0 + 8029b02: 2b00 cmp r3, #0 + 8029b04: f000 823f beq.w 8029f86 { ccr_reg = (((BDMA_Channel_TypeDef *)hdma->Instance)->CCR); - 8029ad8: 687b ldr r3, [r7, #4] - 8029ada: 681b ldr r3, [r3, #0] - 8029adc: 681b ldr r3, [r3, #0] - 8029ade: 613b str r3, [r7, #16] + 8029b08: 687b ldr r3, [r7, #4] + 8029b0a: 681b ldr r3, [r3, #0] + 8029b0c: 681b ldr r3, [r3, #0] + 8029b0e: 613b str r3, [r7, #16] /* Half Transfer Complete Interrupt management ******************************/ if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_HTIE) != 0U)) - 8029ae0: 687b ldr r3, [r7, #4] - 8029ae2: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029ae4: f003 031f and.w r3, r3, #31 - 8029ae8: 2204 movs r2, #4 - 8029aea: 409a lsls r2, r3 - 8029aec: 697b ldr r3, [r7, #20] - 8029aee: 4013 ands r3, r2 - 8029af0: 2b00 cmp r3, #0 - 8029af2: f000 80cd beq.w 8029c90 - 8029af6: 693b ldr r3, [r7, #16] - 8029af8: f003 0304 and.w r3, r3, #4 - 8029afc: 2b00 cmp r3, #0 - 8029afe: f000 80c7 beq.w 8029c90 + 8029b10: 687b ldr r3, [r7, #4] + 8029b12: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029b14: f003 031f and.w r3, r3, #31 + 8029b18: 2204 movs r2, #4 + 8029b1a: 409a lsls r2, r3 + 8029b1c: 697b ldr r3, [r7, #20] + 8029b1e: 4013 ands r3, r2 + 8029b20: 2b00 cmp r3, #0 + 8029b22: f000 80cd beq.w 8029cc0 + 8029b26: 693b ldr r3, [r7, #16] + 8029b28: f003 0304 and.w r3, r3, #4 + 8029b2c: 2b00 cmp r3, #0 + 8029b2e: f000 80c7 beq.w 8029cc0 { /* Clear the half transfer complete flag */ regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU)); - 8029b02: 687b ldr r3, [r7, #4] - 8029b04: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029b06: f003 031f and.w r3, r3, #31 - 8029b0a: 2204 movs r2, #4 - 8029b0c: 409a lsls r2, r3 - 8029b0e: 69fb ldr r3, [r7, #28] - 8029b10: 605a str r2, [r3, #4] + 8029b32: 687b ldr r3, [r7, #4] + 8029b34: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029b36: f003 031f and.w r3, r3, #31 + 8029b3a: 2204 movs r2, #4 + 8029b3c: 409a lsls r2, r3 + 8029b3e: 69fb ldr r3, [r7, #28] + 8029b40: 605a str r2, [r3, #4] /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */ if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029b12: 693b ldr r3, [r7, #16] - 8029b14: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8029b18: 2b00 cmp r3, #0 - 8029b1a: d049 beq.n 8029bb0 + 8029b42: 693b ldr r3, [r7, #16] + 8029b44: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 8029b48: 2b00 cmp r3, #0 + 8029b4a: d049 beq.n 8029be0 { /* Current memory buffer used is Memory 0 */ if((ccr_reg & BDMA_CCR_CT) == 0U) - 8029b1c: 693b ldr r3, [r7, #16] - 8029b1e: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8029b22: 2b00 cmp r3, #0 - 8029b24: d109 bne.n 8029b3a + 8029b4c: 693b ldr r3, [r7, #16] + 8029b4e: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8029b52: 2b00 cmp r3, #0 + 8029b54: d109 bne.n 8029b6a { if(hdma->XferM1HalfCpltCallback != NULL) - 8029b26: 687b ldr r3, [r7, #4] - 8029b28: 6c9b ldr r3, [r3, #72] ; 0x48 - 8029b2a: 2b00 cmp r3, #0 - 8029b2c: f000 8210 beq.w 8029f50 + 8029b56: 687b ldr r3, [r7, #4] + 8029b58: 6c9b ldr r3, [r3, #72] ; 0x48 + 8029b5a: 2b00 cmp r3, #0 + 8029b5c: f000 8210 beq.w 8029f80 { /* Half transfer Callback for Memory 1 */ hdma->XferM1HalfCpltCallback(hdma); - 8029b30: 687b ldr r3, [r7, #4] - 8029b32: 6c9b ldr r3, [r3, #72] ; 0x48 - 8029b34: 6878 ldr r0, [r7, #4] - 8029b36: 4798 blx r3 + 8029b60: 687b ldr r3, [r7, #4] + 8029b62: 6c9b ldr r3, [r3, #72] ; 0x48 + 8029b64: 6878 ldr r0, [r7, #4] + 8029b66: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029b38: e20a b.n 8029f50 + 8029b68: e20a b.n 8029f80 } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferHalfCpltCallback != NULL) - 8029b3a: 687b ldr r3, [r7, #4] - 8029b3c: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029b3e: 2b00 cmp r3, #0 - 8029b40: f000 8206 beq.w 8029f50 + 8029b6a: 687b ldr r3, [r7, #4] + 8029b6c: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029b6e: 2b00 cmp r3, #0 + 8029b70: f000 8206 beq.w 8029f80 { /* Half transfer Callback for Memory 0 */ hdma->XferHalfCpltCallback(hdma); - 8029b44: 687b ldr r3, [r7, #4] - 8029b46: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029b48: 6878 ldr r0, [r7, #4] - 8029b4a: 4798 blx r3 + 8029b74: 687b ldr r3, [r7, #4] + 8029b76: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029b78: 6878 ldr r0, [r7, #4] + 8029b7a: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029b4c: e200 b.n 8029f50 - 8029b4e: bf00 nop - 8029b50: 40020010 .word 0x40020010 - 8029b54: 40020028 .word 0x40020028 - 8029b58: 40020040 .word 0x40020040 - 8029b5c: 40020058 .word 0x40020058 - 8029b60: 40020070 .word 0x40020070 - 8029b64: 40020088 .word 0x40020088 - 8029b68: 400200a0 .word 0x400200a0 - 8029b6c: 400200b8 .word 0x400200b8 - 8029b70: 40020410 .word 0x40020410 - 8029b74: 40020428 .word 0x40020428 - 8029b78: 40020440 .word 0x40020440 - 8029b7c: 40020458 .word 0x40020458 - 8029b80: 40020470 .word 0x40020470 - 8029b84: 40020488 .word 0x40020488 - 8029b88: 400204a0 .word 0x400204a0 - 8029b8c: 400204b8 .word 0x400204b8 - 8029b90: 58025408 .word 0x58025408 - 8029b94: 5802541c .word 0x5802541c - 8029b98: 58025430 .word 0x58025430 - 8029b9c: 58025444 .word 0x58025444 - 8029ba0: 58025458 .word 0x58025458 - 8029ba4: 5802546c .word 0x5802546c - 8029ba8: 58025480 .word 0x58025480 - 8029bac: 58025494 .word 0x58025494 + 8029b7c: e200 b.n 8029f80 + 8029b7e: bf00 nop + 8029b80: 40020010 .word 0x40020010 + 8029b84: 40020028 .word 0x40020028 + 8029b88: 40020040 .word 0x40020040 + 8029b8c: 40020058 .word 0x40020058 + 8029b90: 40020070 .word 0x40020070 + 8029b94: 40020088 .word 0x40020088 + 8029b98: 400200a0 .word 0x400200a0 + 8029b9c: 400200b8 .word 0x400200b8 + 8029ba0: 40020410 .word 0x40020410 + 8029ba4: 40020428 .word 0x40020428 + 8029ba8: 40020440 .word 0x40020440 + 8029bac: 40020458 .word 0x40020458 + 8029bb0: 40020470 .word 0x40020470 + 8029bb4: 40020488 .word 0x40020488 + 8029bb8: 400204a0 .word 0x400204a0 + 8029bbc: 400204b8 .word 0x400204b8 + 8029bc0: 58025408 .word 0x58025408 + 8029bc4: 5802541c .word 0x5802541c + 8029bc8: 58025430 .word 0x58025430 + 8029bcc: 58025444 .word 0x58025444 + 8029bd0: 58025458 .word 0x58025458 + 8029bd4: 5802546c .word 0x5802546c + 8029bd8: 58025480 .word 0x58025480 + 8029bdc: 58025494 .word 0x58025494 } } } else { if((ccr_reg & BDMA_CCR_CIRC) == 0U) - 8029bb0: 693b ldr r3, [r7, #16] - 8029bb2: f003 0320 and.w r3, r3, #32 - 8029bb6: 2b00 cmp r3, #0 - 8029bb8: d160 bne.n 8029c7c + 8029be0: 693b ldr r3, [r7, #16] + 8029be2: f003 0320 and.w r3, r3, #32 + 8029be6: 2b00 cmp r3, #0 + 8029be8: d160 bne.n 8029cac { /* Disable the half transfer interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 8029bba: 687b ldr r3, [r7, #4] - 8029bbc: 681b ldr r3, [r3, #0] - 8029bbe: 4a7f ldr r2, [pc, #508] ; (8029dbc ) - 8029bc0: 4293 cmp r3, r2 - 8029bc2: d04a beq.n 8029c5a - 8029bc4: 687b ldr r3, [r7, #4] - 8029bc6: 681b ldr r3, [r3, #0] - 8029bc8: 4a7d ldr r2, [pc, #500] ; (8029dc0 ) - 8029bca: 4293 cmp r3, r2 - 8029bcc: d045 beq.n 8029c5a - 8029bce: 687b ldr r3, [r7, #4] - 8029bd0: 681b ldr r3, [r3, #0] - 8029bd2: 4a7c ldr r2, [pc, #496] ; (8029dc4 ) - 8029bd4: 4293 cmp r3, r2 - 8029bd6: d040 beq.n 8029c5a - 8029bd8: 687b ldr r3, [r7, #4] - 8029bda: 681b ldr r3, [r3, #0] - 8029bdc: 4a7a ldr r2, [pc, #488] ; (8029dc8 ) - 8029bde: 4293 cmp r3, r2 - 8029be0: d03b beq.n 8029c5a - 8029be2: 687b ldr r3, [r7, #4] - 8029be4: 681b ldr r3, [r3, #0] - 8029be6: 4a79 ldr r2, [pc, #484] ; (8029dcc ) - 8029be8: 4293 cmp r3, r2 - 8029bea: d036 beq.n 8029c5a - 8029bec: 687b ldr r3, [r7, #4] - 8029bee: 681b ldr r3, [r3, #0] - 8029bf0: 4a77 ldr r2, [pc, #476] ; (8029dd0 ) - 8029bf2: 4293 cmp r3, r2 - 8029bf4: d031 beq.n 8029c5a - 8029bf6: 687b ldr r3, [r7, #4] - 8029bf8: 681b ldr r3, [r3, #0] - 8029bfa: 4a76 ldr r2, [pc, #472] ; (8029dd4 ) - 8029bfc: 4293 cmp r3, r2 - 8029bfe: d02c beq.n 8029c5a - 8029c00: 687b ldr r3, [r7, #4] - 8029c02: 681b ldr r3, [r3, #0] - 8029c04: 4a74 ldr r2, [pc, #464] ; (8029dd8 ) - 8029c06: 4293 cmp r3, r2 - 8029c08: d027 beq.n 8029c5a - 8029c0a: 687b ldr r3, [r7, #4] - 8029c0c: 681b ldr r3, [r3, #0] - 8029c0e: 4a73 ldr r2, [pc, #460] ; (8029ddc ) - 8029c10: 4293 cmp r3, r2 - 8029c12: d022 beq.n 8029c5a - 8029c14: 687b ldr r3, [r7, #4] - 8029c16: 681b ldr r3, [r3, #0] - 8029c18: 4a71 ldr r2, [pc, #452] ; (8029de0 ) - 8029c1a: 4293 cmp r3, r2 - 8029c1c: d01d beq.n 8029c5a - 8029c1e: 687b ldr r3, [r7, #4] - 8029c20: 681b ldr r3, [r3, #0] - 8029c22: 4a70 ldr r2, [pc, #448] ; (8029de4 ) - 8029c24: 4293 cmp r3, r2 - 8029c26: d018 beq.n 8029c5a - 8029c28: 687b ldr r3, [r7, #4] - 8029c2a: 681b ldr r3, [r3, #0] - 8029c2c: 4a6e ldr r2, [pc, #440] ; (8029de8 ) - 8029c2e: 4293 cmp r3, r2 - 8029c30: d013 beq.n 8029c5a - 8029c32: 687b ldr r3, [r7, #4] - 8029c34: 681b ldr r3, [r3, #0] - 8029c36: 4a6d ldr r2, [pc, #436] ; (8029dec ) - 8029c38: 4293 cmp r3, r2 - 8029c3a: d00e beq.n 8029c5a - 8029c3c: 687b ldr r3, [r7, #4] - 8029c3e: 681b ldr r3, [r3, #0] - 8029c40: 4a6b ldr r2, [pc, #428] ; (8029df0 ) - 8029c42: 4293 cmp r3, r2 - 8029c44: d009 beq.n 8029c5a - 8029c46: 687b ldr r3, [r7, #4] - 8029c48: 681b ldr r3, [r3, #0] - 8029c4a: 4a6a ldr r2, [pc, #424] ; (8029df4 ) - 8029c4c: 4293 cmp r3, r2 - 8029c4e: d004 beq.n 8029c5a - 8029c50: 687b ldr r3, [r7, #4] - 8029c52: 681b ldr r3, [r3, #0] - 8029c54: 4a68 ldr r2, [pc, #416] ; (8029df8 ) - 8029c56: 4293 cmp r3, r2 - 8029c58: d108 bne.n 8029c6c - 8029c5a: 687b ldr r3, [r7, #4] - 8029c5c: 681b ldr r3, [r3, #0] - 8029c5e: 681a ldr r2, [r3, #0] - 8029c60: 687b ldr r3, [r7, #4] - 8029c62: 681b ldr r3, [r3, #0] - 8029c64: f022 0208 bic.w r2, r2, #8 - 8029c68: 601a str r2, [r3, #0] - 8029c6a: e007 b.n 8029c7c + 8029bea: 687b ldr r3, [r7, #4] + 8029bec: 681b ldr r3, [r3, #0] + 8029bee: 4a7f ldr r2, [pc, #508] ; (8029dec ) + 8029bf0: 4293 cmp r3, r2 + 8029bf2: d04a beq.n 8029c8a + 8029bf4: 687b ldr r3, [r7, #4] + 8029bf6: 681b ldr r3, [r3, #0] + 8029bf8: 4a7d ldr r2, [pc, #500] ; (8029df0 ) + 8029bfa: 4293 cmp r3, r2 + 8029bfc: d045 beq.n 8029c8a + 8029bfe: 687b ldr r3, [r7, #4] + 8029c00: 681b ldr r3, [r3, #0] + 8029c02: 4a7c ldr r2, [pc, #496] ; (8029df4 ) + 8029c04: 4293 cmp r3, r2 + 8029c06: d040 beq.n 8029c8a + 8029c08: 687b ldr r3, [r7, #4] + 8029c0a: 681b ldr r3, [r3, #0] + 8029c0c: 4a7a ldr r2, [pc, #488] ; (8029df8 ) + 8029c0e: 4293 cmp r3, r2 + 8029c10: d03b beq.n 8029c8a + 8029c12: 687b ldr r3, [r7, #4] + 8029c14: 681b ldr r3, [r3, #0] + 8029c16: 4a79 ldr r2, [pc, #484] ; (8029dfc ) + 8029c18: 4293 cmp r3, r2 + 8029c1a: d036 beq.n 8029c8a + 8029c1c: 687b ldr r3, [r7, #4] + 8029c1e: 681b ldr r3, [r3, #0] + 8029c20: 4a77 ldr r2, [pc, #476] ; (8029e00 ) + 8029c22: 4293 cmp r3, r2 + 8029c24: d031 beq.n 8029c8a + 8029c26: 687b ldr r3, [r7, #4] + 8029c28: 681b ldr r3, [r3, #0] + 8029c2a: 4a76 ldr r2, [pc, #472] ; (8029e04 ) + 8029c2c: 4293 cmp r3, r2 + 8029c2e: d02c beq.n 8029c8a + 8029c30: 687b ldr r3, [r7, #4] + 8029c32: 681b ldr r3, [r3, #0] + 8029c34: 4a74 ldr r2, [pc, #464] ; (8029e08 ) + 8029c36: 4293 cmp r3, r2 + 8029c38: d027 beq.n 8029c8a + 8029c3a: 687b ldr r3, [r7, #4] + 8029c3c: 681b ldr r3, [r3, #0] + 8029c3e: 4a73 ldr r2, [pc, #460] ; (8029e0c ) + 8029c40: 4293 cmp r3, r2 + 8029c42: d022 beq.n 8029c8a + 8029c44: 687b ldr r3, [r7, #4] + 8029c46: 681b ldr r3, [r3, #0] + 8029c48: 4a71 ldr r2, [pc, #452] ; (8029e10 ) + 8029c4a: 4293 cmp r3, r2 + 8029c4c: d01d beq.n 8029c8a + 8029c4e: 687b ldr r3, [r7, #4] + 8029c50: 681b ldr r3, [r3, #0] + 8029c52: 4a70 ldr r2, [pc, #448] ; (8029e14 ) + 8029c54: 4293 cmp r3, r2 + 8029c56: d018 beq.n 8029c8a + 8029c58: 687b ldr r3, [r7, #4] + 8029c5a: 681b ldr r3, [r3, #0] + 8029c5c: 4a6e ldr r2, [pc, #440] ; (8029e18 ) + 8029c5e: 4293 cmp r3, r2 + 8029c60: d013 beq.n 8029c8a + 8029c62: 687b ldr r3, [r7, #4] + 8029c64: 681b ldr r3, [r3, #0] + 8029c66: 4a6d ldr r2, [pc, #436] ; (8029e1c ) + 8029c68: 4293 cmp r3, r2 + 8029c6a: d00e beq.n 8029c8a 8029c6c: 687b ldr r3, [r7, #4] 8029c6e: 681b ldr r3, [r3, #0] - 8029c70: 681a ldr r2, [r3, #0] - 8029c72: 687b ldr r3, [r7, #4] - 8029c74: 681b ldr r3, [r3, #0] - 8029c76: f022 0204 bic.w r2, r2, #4 - 8029c7a: 601a str r2, [r3, #0] + 8029c70: 4a6b ldr r2, [pc, #428] ; (8029e20 ) + 8029c72: 4293 cmp r3, r2 + 8029c74: d009 beq.n 8029c8a + 8029c76: 687b ldr r3, [r7, #4] + 8029c78: 681b ldr r3, [r3, #0] + 8029c7a: 4a6a ldr r2, [pc, #424] ; (8029e24 ) + 8029c7c: 4293 cmp r3, r2 + 8029c7e: d004 beq.n 8029c8a + 8029c80: 687b ldr r3, [r7, #4] + 8029c82: 681b ldr r3, [r3, #0] + 8029c84: 4a68 ldr r2, [pc, #416] ; (8029e28 ) + 8029c86: 4293 cmp r3, r2 + 8029c88: d108 bne.n 8029c9c + 8029c8a: 687b ldr r3, [r7, #4] + 8029c8c: 681b ldr r3, [r3, #0] + 8029c8e: 681a ldr r2, [r3, #0] + 8029c90: 687b ldr r3, [r7, #4] + 8029c92: 681b ldr r3, [r3, #0] + 8029c94: f022 0208 bic.w r2, r2, #8 + 8029c98: 601a str r2, [r3, #0] + 8029c9a: e007 b.n 8029cac + 8029c9c: 687b ldr r3, [r7, #4] + 8029c9e: 681b ldr r3, [r3, #0] + 8029ca0: 681a ldr r2, [r3, #0] + 8029ca2: 687b ldr r3, [r7, #4] + 8029ca4: 681b ldr r3, [r3, #0] + 8029ca6: f022 0204 bic.w r2, r2, #4 + 8029caa: 601a str r2, [r3, #0] } /* DMA peripheral state is not updated in Half Transfer */ /* but in Transfer Complete case */ if(hdma->XferHalfCpltCallback != NULL) - 8029c7c: 687b ldr r3, [r7, #4] - 8029c7e: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029c80: 2b00 cmp r3, #0 - 8029c82: f000 8165 beq.w 8029f50 + 8029cac: 687b ldr r3, [r7, #4] + 8029cae: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029cb0: 2b00 cmp r3, #0 + 8029cb2: f000 8165 beq.w 8029f80 { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); - 8029c86: 687b ldr r3, [r7, #4] - 8029c88: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029c8a: 6878 ldr r0, [r7, #4] - 8029c8c: 4798 blx r3 + 8029cb6: 687b ldr r3, [r7, #4] + 8029cb8: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029cba: 6878 ldr r0, [r7, #4] + 8029cbc: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029c8e: e15f b.n 8029f50 + 8029cbe: e15f b.n 8029f80 } } } /* Transfer Complete Interrupt management ***********************************/ else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TCIE) != 0U)) - 8029c90: 687b ldr r3, [r7, #4] - 8029c92: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029c94: f003 031f and.w r3, r3, #31 - 8029c98: 2202 movs r2, #2 - 8029c9a: 409a lsls r2, r3 - 8029c9c: 697b ldr r3, [r7, #20] - 8029c9e: 4013 ands r3, r2 - 8029ca0: 2b00 cmp r3, #0 - 8029ca2: f000 80c5 beq.w 8029e30 - 8029ca6: 693b ldr r3, [r7, #16] - 8029ca8: f003 0302 and.w r3, r3, #2 - 8029cac: 2b00 cmp r3, #0 - 8029cae: f000 80bf beq.w 8029e30 + 8029cc0: 687b ldr r3, [r7, #4] + 8029cc2: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029cc4: f003 031f and.w r3, r3, #31 + 8029cc8: 2202 movs r2, #2 + 8029cca: 409a lsls r2, r3 + 8029ccc: 697b ldr r3, [r7, #20] + 8029cce: 4013 ands r3, r2 + 8029cd0: 2b00 cmp r3, #0 + 8029cd2: f000 80c5 beq.w 8029e60 + 8029cd6: 693b ldr r3, [r7, #16] + 8029cd8: f003 0302 and.w r3, r3, #2 + 8029cdc: 2b00 cmp r3, #0 + 8029cde: f000 80bf beq.w 8029e60 { /* Clear the transfer complete flag */ regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU); - 8029cb2: 687b ldr r3, [r7, #4] - 8029cb4: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029cb6: f003 031f and.w r3, r3, #31 - 8029cba: 2202 movs r2, #2 - 8029cbc: 409a lsls r2, r3 - 8029cbe: 69fb ldr r3, [r7, #28] - 8029cc0: 605a str r2, [r3, #4] + 8029ce2: 687b ldr r3, [r7, #4] + 8029ce4: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029ce6: f003 031f and.w r3, r3, #31 + 8029cea: 2202 movs r2, #2 + 8029cec: 409a lsls r2, r3 + 8029cee: 69fb ldr r3, [r7, #28] + 8029cf0: 605a str r2, [r3, #4] /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */ if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029cc2: 693b ldr r3, [r7, #16] - 8029cc4: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8029cc8: 2b00 cmp r3, #0 - 8029cca: d018 beq.n 8029cfe + 8029cf2: 693b ldr r3, [r7, #16] + 8029cf4: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 8029cf8: 2b00 cmp r3, #0 + 8029cfa: d018 beq.n 8029d2e { /* Current memory buffer used is Memory 0 */ if((ccr_reg & BDMA_CCR_CT) == 0U) - 8029ccc: 693b ldr r3, [r7, #16] - 8029cce: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8029cd2: 2b00 cmp r3, #0 - 8029cd4: d109 bne.n 8029cea + 8029cfc: 693b ldr r3, [r7, #16] + 8029cfe: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8029d02: 2b00 cmp r3, #0 + 8029d04: d109 bne.n 8029d1a { if(hdma->XferM1CpltCallback != NULL) - 8029cd6: 687b ldr r3, [r7, #4] - 8029cd8: 6c5b ldr r3, [r3, #68] ; 0x44 - 8029cda: 2b00 cmp r3, #0 - 8029cdc: f000 813a beq.w 8029f54 + 8029d06: 687b ldr r3, [r7, #4] + 8029d08: 6c5b ldr r3, [r3, #68] ; 0x44 + 8029d0a: 2b00 cmp r3, #0 + 8029d0c: f000 813a beq.w 8029f84 { /* Transfer complete Callback for Memory 1 */ hdma->XferM1CpltCallback(hdma); - 8029ce0: 687b ldr r3, [r7, #4] - 8029ce2: 6c5b ldr r3, [r3, #68] ; 0x44 - 8029ce4: 6878 ldr r0, [r7, #4] - 8029ce6: 4798 blx r3 + 8029d10: 687b ldr r3, [r7, #4] + 8029d12: 6c5b ldr r3, [r3, #68] ; 0x44 + 8029d14: 6878 ldr r0, [r7, #4] + 8029d16: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029ce8: e134 b.n 8029f54 + 8029d18: e134 b.n 8029f84 } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferCpltCallback != NULL) - 8029cea: 687b ldr r3, [r7, #4] - 8029cec: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029cee: 2b00 cmp r3, #0 - 8029cf0: f000 8130 beq.w 8029f54 + 8029d1a: 687b ldr r3, [r7, #4] + 8029d1c: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029d1e: 2b00 cmp r3, #0 + 8029d20: f000 8130 beq.w 8029f84 { /* Transfer complete Callback for Memory 0 */ hdma->XferCpltCallback(hdma); - 8029cf4: 687b ldr r3, [r7, #4] - 8029cf6: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029cf8: 6878 ldr r0, [r7, #4] - 8029cfa: 4798 blx r3 + 8029d24: 687b ldr r3, [r7, #4] + 8029d26: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029d28: 6878 ldr r0, [r7, #4] + 8029d2a: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029cfc: e12a b.n 8029f54 + 8029d2c: e12a b.n 8029f84 } } } else { if((ccr_reg & BDMA_CCR_CIRC) == 0U) - 8029cfe: 693b ldr r3, [r7, #16] - 8029d00: f003 0320 and.w r3, r3, #32 - 8029d04: 2b00 cmp r3, #0 - 8029d06: f040 8089 bne.w 8029e1c + 8029d2e: 693b ldr r3, [r7, #16] + 8029d30: f003 0320 and.w r3, r3, #32 + 8029d34: 2b00 cmp r3, #0 + 8029d36: f040 8089 bne.w 8029e4c { /* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); - 8029d0a: 687b ldr r3, [r7, #4] - 8029d0c: 681b ldr r3, [r3, #0] - 8029d0e: 4a2b ldr r2, [pc, #172] ; (8029dbc ) - 8029d10: 4293 cmp r3, r2 - 8029d12: d04a beq.n 8029daa - 8029d14: 687b ldr r3, [r7, #4] - 8029d16: 681b ldr r3, [r3, #0] - 8029d18: 4a29 ldr r2, [pc, #164] ; (8029dc0 ) - 8029d1a: 4293 cmp r3, r2 - 8029d1c: d045 beq.n 8029daa - 8029d1e: 687b ldr r3, [r7, #4] - 8029d20: 681b ldr r3, [r3, #0] - 8029d22: 4a28 ldr r2, [pc, #160] ; (8029dc4 ) - 8029d24: 4293 cmp r3, r2 - 8029d26: d040 beq.n 8029daa - 8029d28: 687b ldr r3, [r7, #4] - 8029d2a: 681b ldr r3, [r3, #0] - 8029d2c: 4a26 ldr r2, [pc, #152] ; (8029dc8 ) - 8029d2e: 4293 cmp r3, r2 - 8029d30: d03b beq.n 8029daa - 8029d32: 687b ldr r3, [r7, #4] - 8029d34: 681b ldr r3, [r3, #0] - 8029d36: 4a25 ldr r2, [pc, #148] ; (8029dcc ) - 8029d38: 4293 cmp r3, r2 - 8029d3a: d036 beq.n 8029daa - 8029d3c: 687b ldr r3, [r7, #4] - 8029d3e: 681b ldr r3, [r3, #0] - 8029d40: 4a23 ldr r2, [pc, #140] ; (8029dd0 ) - 8029d42: 4293 cmp r3, r2 - 8029d44: d031 beq.n 8029daa - 8029d46: 687b ldr r3, [r7, #4] - 8029d48: 681b ldr r3, [r3, #0] - 8029d4a: 4a22 ldr r2, [pc, #136] ; (8029dd4 ) - 8029d4c: 4293 cmp r3, r2 - 8029d4e: d02c beq.n 8029daa - 8029d50: 687b ldr r3, [r7, #4] - 8029d52: 681b ldr r3, [r3, #0] - 8029d54: 4a20 ldr r2, [pc, #128] ; (8029dd8 ) - 8029d56: 4293 cmp r3, r2 - 8029d58: d027 beq.n 8029daa - 8029d5a: 687b ldr r3, [r7, #4] - 8029d5c: 681b ldr r3, [r3, #0] - 8029d5e: 4a1f ldr r2, [pc, #124] ; (8029ddc ) - 8029d60: 4293 cmp r3, r2 - 8029d62: d022 beq.n 8029daa - 8029d64: 687b ldr r3, [r7, #4] - 8029d66: 681b ldr r3, [r3, #0] - 8029d68: 4a1d ldr r2, [pc, #116] ; (8029de0 ) - 8029d6a: 4293 cmp r3, r2 - 8029d6c: d01d beq.n 8029daa - 8029d6e: 687b ldr r3, [r7, #4] - 8029d70: 681b ldr r3, [r3, #0] - 8029d72: 4a1c ldr r2, [pc, #112] ; (8029de4 ) - 8029d74: 4293 cmp r3, r2 - 8029d76: d018 beq.n 8029daa - 8029d78: 687b ldr r3, [r7, #4] - 8029d7a: 681b ldr r3, [r3, #0] - 8029d7c: 4a1a ldr r2, [pc, #104] ; (8029de8 ) - 8029d7e: 4293 cmp r3, r2 - 8029d80: d013 beq.n 8029daa - 8029d82: 687b ldr r3, [r7, #4] - 8029d84: 681b ldr r3, [r3, #0] - 8029d86: 4a19 ldr r2, [pc, #100] ; (8029dec ) - 8029d88: 4293 cmp r3, r2 - 8029d8a: d00e beq.n 8029daa - 8029d8c: 687b ldr r3, [r7, #4] - 8029d8e: 681b ldr r3, [r3, #0] - 8029d90: 4a17 ldr r2, [pc, #92] ; (8029df0 ) - 8029d92: 4293 cmp r3, r2 - 8029d94: d009 beq.n 8029daa - 8029d96: 687b ldr r3, [r7, #4] - 8029d98: 681b ldr r3, [r3, #0] - 8029d9a: 4a16 ldr r2, [pc, #88] ; (8029df4 ) - 8029d9c: 4293 cmp r3, r2 - 8029d9e: d004 beq.n 8029daa - 8029da0: 687b ldr r3, [r7, #4] - 8029da2: 681b ldr r3, [r3, #0] - 8029da4: 4a14 ldr r2, [pc, #80] ; (8029df8 ) - 8029da6: 4293 cmp r3, r2 - 8029da8: d128 bne.n 8029dfc - 8029daa: 687b ldr r3, [r7, #4] - 8029dac: 681b ldr r3, [r3, #0] - 8029dae: 681a ldr r2, [r3, #0] - 8029db0: 687b ldr r3, [r7, #4] - 8029db2: 681b ldr r3, [r3, #0] - 8029db4: f022 0214 bic.w r2, r2, #20 - 8029db8: 601a str r2, [r3, #0] - 8029dba: e027 b.n 8029e0c - 8029dbc: 40020010 .word 0x40020010 - 8029dc0: 40020028 .word 0x40020028 - 8029dc4: 40020040 .word 0x40020040 - 8029dc8: 40020058 .word 0x40020058 - 8029dcc: 40020070 .word 0x40020070 - 8029dd0: 40020088 .word 0x40020088 - 8029dd4: 400200a0 .word 0x400200a0 - 8029dd8: 400200b8 .word 0x400200b8 - 8029ddc: 40020410 .word 0x40020410 - 8029de0: 40020428 .word 0x40020428 - 8029de4: 40020440 .word 0x40020440 - 8029de8: 40020458 .word 0x40020458 - 8029dec: 40020470 .word 0x40020470 - 8029df0: 40020488 .word 0x40020488 - 8029df4: 400204a0 .word 0x400204a0 - 8029df8: 400204b8 .word 0x400204b8 - 8029dfc: 687b ldr r3, [r7, #4] - 8029dfe: 681b ldr r3, [r3, #0] - 8029e00: 681a ldr r2, [r3, #0] - 8029e02: 687b ldr r3, [r7, #4] - 8029e04: 681b ldr r3, [r3, #0] - 8029e06: f022 020a bic.w r2, r2, #10 - 8029e0a: 601a str r2, [r3, #0] + 8029d3a: 687b ldr r3, [r7, #4] + 8029d3c: 681b ldr r3, [r3, #0] + 8029d3e: 4a2b ldr r2, [pc, #172] ; (8029dec ) + 8029d40: 4293 cmp r3, r2 + 8029d42: d04a beq.n 8029dda + 8029d44: 687b ldr r3, [r7, #4] + 8029d46: 681b ldr r3, [r3, #0] + 8029d48: 4a29 ldr r2, [pc, #164] ; (8029df0 ) + 8029d4a: 4293 cmp r3, r2 + 8029d4c: d045 beq.n 8029dda + 8029d4e: 687b ldr r3, [r7, #4] + 8029d50: 681b ldr r3, [r3, #0] + 8029d52: 4a28 ldr r2, [pc, #160] ; (8029df4 ) + 8029d54: 4293 cmp r3, r2 + 8029d56: d040 beq.n 8029dda + 8029d58: 687b ldr r3, [r7, #4] + 8029d5a: 681b ldr r3, [r3, #0] + 8029d5c: 4a26 ldr r2, [pc, #152] ; (8029df8 ) + 8029d5e: 4293 cmp r3, r2 + 8029d60: d03b beq.n 8029dda + 8029d62: 687b ldr r3, [r7, #4] + 8029d64: 681b ldr r3, [r3, #0] + 8029d66: 4a25 ldr r2, [pc, #148] ; (8029dfc ) + 8029d68: 4293 cmp r3, r2 + 8029d6a: d036 beq.n 8029dda + 8029d6c: 687b ldr r3, [r7, #4] + 8029d6e: 681b ldr r3, [r3, #0] + 8029d70: 4a23 ldr r2, [pc, #140] ; (8029e00 ) + 8029d72: 4293 cmp r3, r2 + 8029d74: d031 beq.n 8029dda + 8029d76: 687b ldr r3, [r7, #4] + 8029d78: 681b ldr r3, [r3, #0] + 8029d7a: 4a22 ldr r2, [pc, #136] ; (8029e04 ) + 8029d7c: 4293 cmp r3, r2 + 8029d7e: d02c beq.n 8029dda + 8029d80: 687b ldr r3, [r7, #4] + 8029d82: 681b ldr r3, [r3, #0] + 8029d84: 4a20 ldr r2, [pc, #128] ; (8029e08 ) + 8029d86: 4293 cmp r3, r2 + 8029d88: d027 beq.n 8029dda + 8029d8a: 687b ldr r3, [r7, #4] + 8029d8c: 681b ldr r3, [r3, #0] + 8029d8e: 4a1f ldr r2, [pc, #124] ; (8029e0c ) + 8029d90: 4293 cmp r3, r2 + 8029d92: d022 beq.n 8029dda + 8029d94: 687b ldr r3, [r7, #4] + 8029d96: 681b ldr r3, [r3, #0] + 8029d98: 4a1d ldr r2, [pc, #116] ; (8029e10 ) + 8029d9a: 4293 cmp r3, r2 + 8029d9c: d01d beq.n 8029dda + 8029d9e: 687b ldr r3, [r7, #4] + 8029da0: 681b ldr r3, [r3, #0] + 8029da2: 4a1c ldr r2, [pc, #112] ; (8029e14 ) + 8029da4: 4293 cmp r3, r2 + 8029da6: d018 beq.n 8029dda + 8029da8: 687b ldr r3, [r7, #4] + 8029daa: 681b ldr r3, [r3, #0] + 8029dac: 4a1a ldr r2, [pc, #104] ; (8029e18 ) + 8029dae: 4293 cmp r3, r2 + 8029db0: d013 beq.n 8029dda + 8029db2: 687b ldr r3, [r7, #4] + 8029db4: 681b ldr r3, [r3, #0] + 8029db6: 4a19 ldr r2, [pc, #100] ; (8029e1c ) + 8029db8: 4293 cmp r3, r2 + 8029dba: d00e beq.n 8029dda + 8029dbc: 687b ldr r3, [r7, #4] + 8029dbe: 681b ldr r3, [r3, #0] + 8029dc0: 4a17 ldr r2, [pc, #92] ; (8029e20 ) + 8029dc2: 4293 cmp r3, r2 + 8029dc4: d009 beq.n 8029dda + 8029dc6: 687b ldr r3, [r7, #4] + 8029dc8: 681b ldr r3, [r3, #0] + 8029dca: 4a16 ldr r2, [pc, #88] ; (8029e24 ) + 8029dcc: 4293 cmp r3, r2 + 8029dce: d004 beq.n 8029dda + 8029dd0: 687b ldr r3, [r7, #4] + 8029dd2: 681b ldr r3, [r3, #0] + 8029dd4: 4a14 ldr r2, [pc, #80] ; (8029e28 ) + 8029dd6: 4293 cmp r3, r2 + 8029dd8: d128 bne.n 8029e2c + 8029dda: 687b ldr r3, [r7, #4] + 8029ddc: 681b ldr r3, [r3, #0] + 8029dde: 681a ldr r2, [r3, #0] + 8029de0: 687b ldr r3, [r7, #4] + 8029de2: 681b ldr r3, [r3, #0] + 8029de4: f022 0214 bic.w r2, r2, #20 + 8029de8: 601a str r2, [r3, #0] + 8029dea: e027 b.n 8029e3c + 8029dec: 40020010 .word 0x40020010 + 8029df0: 40020028 .word 0x40020028 + 8029df4: 40020040 .word 0x40020040 + 8029df8: 40020058 .word 0x40020058 + 8029dfc: 40020070 .word 0x40020070 + 8029e00: 40020088 .word 0x40020088 + 8029e04: 400200a0 .word 0x400200a0 + 8029e08: 400200b8 .word 0x400200b8 + 8029e0c: 40020410 .word 0x40020410 + 8029e10: 40020428 .word 0x40020428 + 8029e14: 40020440 .word 0x40020440 + 8029e18: 40020458 .word 0x40020458 + 8029e1c: 40020470 .word 0x40020470 + 8029e20: 40020488 .word 0x40020488 + 8029e24: 400204a0 .word 0x400204a0 + 8029e28: 400204b8 .word 0x400204b8 + 8029e2c: 687b ldr r3, [r7, #4] + 8029e2e: 681b ldr r3, [r3, #0] + 8029e30: 681a ldr r2, [r3, #0] + 8029e32: 687b ldr r3, [r7, #4] + 8029e34: 681b ldr r3, [r3, #0] + 8029e36: f022 020a bic.w r2, r2, #10 + 8029e3a: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8029e0c: 687b ldr r3, [r7, #4] - 8029e0e: 2201 movs r2, #1 - 8029e10: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029e3c: 687b ldr r3, [r7, #4] + 8029e3e: 2201 movs r2, #1 + 8029e40: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029e14: 687b ldr r3, [r7, #4] - 8029e16: 2200 movs r2, #0 - 8029e18: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8029e44: 687b ldr r3, [r7, #4] + 8029e46: 2200 movs r2, #0 + 8029e48: f883 2034 strb.w r2, [r3, #52] ; 0x34 } if(hdma->XferCpltCallback != NULL) - 8029e1c: 687b ldr r3, [r7, #4] - 8029e1e: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029e20: 2b00 cmp r3, #0 - 8029e22: f000 8097 beq.w 8029f54 + 8029e4c: 687b ldr r3, [r7, #4] + 8029e4e: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029e50: 2b00 cmp r3, #0 + 8029e52: f000 8097 beq.w 8029f84 { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); - 8029e26: 687b ldr r3, [r7, #4] - 8029e28: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029e2a: 6878 ldr r0, [r7, #4] - 8029e2c: 4798 blx r3 + 8029e56: 687b ldr r3, [r7, #4] + 8029e58: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029e5a: 6878 ldr r0, [r7, #4] + 8029e5c: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029e2e: e091 b.n 8029f54 + 8029e5e: e091 b.n 8029f84 } } } /* Transfer Error Interrupt management **************************************/ else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TEIE) != 0U)) - 8029e30: 687b ldr r3, [r7, #4] - 8029e32: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029e34: f003 031f and.w r3, r3, #31 - 8029e38: 2208 movs r2, #8 - 8029e3a: 409a lsls r2, r3 - 8029e3c: 697b ldr r3, [r7, #20] - 8029e3e: 4013 ands r3, r2 - 8029e40: 2b00 cmp r3, #0 - 8029e42: f000 8088 beq.w 8029f56 - 8029e46: 693b ldr r3, [r7, #16] - 8029e48: f003 0308 and.w r3, r3, #8 - 8029e4c: 2b00 cmp r3, #0 - 8029e4e: f000 8082 beq.w 8029f56 + 8029e60: 687b ldr r3, [r7, #4] + 8029e62: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029e64: f003 031f and.w r3, r3, #31 + 8029e68: 2208 movs r2, #8 + 8029e6a: 409a lsls r2, r3 + 8029e6c: 697b ldr r3, [r7, #20] + 8029e6e: 4013 ands r3, r2 + 8029e70: 2b00 cmp r3, #0 + 8029e72: f000 8088 beq.w 8029f86 + 8029e76: 693b ldr r3, [r7, #16] + 8029e78: f003 0308 and.w r3, r3, #8 + 8029e7c: 2b00 cmp r3, #0 + 8029e7e: f000 8082 beq.w 8029f86 { /* When a DMA transfer error occurs */ /* A hardware clear of its EN bits is performed */ /* Disable ALL DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8029e52: 687b ldr r3, [r7, #4] - 8029e54: 681b ldr r3, [r3, #0] - 8029e56: 4a41 ldr r2, [pc, #260] ; (8029f5c ) - 8029e58: 4293 cmp r3, r2 - 8029e5a: d04a beq.n 8029ef2 - 8029e5c: 687b ldr r3, [r7, #4] - 8029e5e: 681b ldr r3, [r3, #0] - 8029e60: 4a3f ldr r2, [pc, #252] ; (8029f60 ) - 8029e62: 4293 cmp r3, r2 - 8029e64: d045 beq.n 8029ef2 - 8029e66: 687b ldr r3, [r7, #4] - 8029e68: 681b ldr r3, [r3, #0] - 8029e6a: 4a3e ldr r2, [pc, #248] ; (8029f64 ) - 8029e6c: 4293 cmp r3, r2 - 8029e6e: d040 beq.n 8029ef2 - 8029e70: 687b ldr r3, [r7, #4] - 8029e72: 681b ldr r3, [r3, #0] - 8029e74: 4a3c ldr r2, [pc, #240] ; (8029f68 ) - 8029e76: 4293 cmp r3, r2 - 8029e78: d03b beq.n 8029ef2 - 8029e7a: 687b ldr r3, [r7, #4] - 8029e7c: 681b ldr r3, [r3, #0] - 8029e7e: 4a3b ldr r2, [pc, #236] ; (8029f6c ) - 8029e80: 4293 cmp r3, r2 - 8029e82: d036 beq.n 8029ef2 - 8029e84: 687b ldr r3, [r7, #4] - 8029e86: 681b ldr r3, [r3, #0] - 8029e88: 4a39 ldr r2, [pc, #228] ; (8029f70 ) - 8029e8a: 4293 cmp r3, r2 - 8029e8c: d031 beq.n 8029ef2 - 8029e8e: 687b ldr r3, [r7, #4] - 8029e90: 681b ldr r3, [r3, #0] - 8029e92: 4a38 ldr r2, [pc, #224] ; (8029f74 ) - 8029e94: 4293 cmp r3, r2 - 8029e96: d02c beq.n 8029ef2 - 8029e98: 687b ldr r3, [r7, #4] - 8029e9a: 681b ldr r3, [r3, #0] - 8029e9c: 4a36 ldr r2, [pc, #216] ; (8029f78 ) - 8029e9e: 4293 cmp r3, r2 - 8029ea0: d027 beq.n 8029ef2 - 8029ea2: 687b ldr r3, [r7, #4] - 8029ea4: 681b ldr r3, [r3, #0] - 8029ea6: 4a35 ldr r2, [pc, #212] ; (8029f7c ) - 8029ea8: 4293 cmp r3, r2 - 8029eaa: d022 beq.n 8029ef2 - 8029eac: 687b ldr r3, [r7, #4] - 8029eae: 681b ldr r3, [r3, #0] - 8029eb0: 4a33 ldr r2, [pc, #204] ; (8029f80 ) - 8029eb2: 4293 cmp r3, r2 - 8029eb4: d01d beq.n 8029ef2 - 8029eb6: 687b ldr r3, [r7, #4] - 8029eb8: 681b ldr r3, [r3, #0] - 8029eba: 4a32 ldr r2, [pc, #200] ; (8029f84 ) - 8029ebc: 4293 cmp r3, r2 - 8029ebe: d018 beq.n 8029ef2 - 8029ec0: 687b ldr r3, [r7, #4] - 8029ec2: 681b ldr r3, [r3, #0] - 8029ec4: 4a30 ldr r2, [pc, #192] ; (8029f88 ) - 8029ec6: 4293 cmp r3, r2 - 8029ec8: d013 beq.n 8029ef2 - 8029eca: 687b ldr r3, [r7, #4] - 8029ecc: 681b ldr r3, [r3, #0] - 8029ece: 4a2f ldr r2, [pc, #188] ; (8029f8c ) - 8029ed0: 4293 cmp r3, r2 - 8029ed2: d00e beq.n 8029ef2 - 8029ed4: 687b ldr r3, [r7, #4] - 8029ed6: 681b ldr r3, [r3, #0] - 8029ed8: 4a2d ldr r2, [pc, #180] ; (8029f90 ) - 8029eda: 4293 cmp r3, r2 - 8029edc: d009 beq.n 8029ef2 - 8029ede: 687b ldr r3, [r7, #4] - 8029ee0: 681b ldr r3, [r3, #0] - 8029ee2: 4a2c ldr r2, [pc, #176] ; (8029f94 ) - 8029ee4: 4293 cmp r3, r2 - 8029ee6: d004 beq.n 8029ef2 - 8029ee8: 687b ldr r3, [r7, #4] - 8029eea: 681b ldr r3, [r3, #0] - 8029eec: 4a2a ldr r2, [pc, #168] ; (8029f98 ) - 8029eee: 4293 cmp r3, r2 - 8029ef0: d108 bne.n 8029f04 - 8029ef2: 687b ldr r3, [r7, #4] - 8029ef4: 681b ldr r3, [r3, #0] - 8029ef6: 681a ldr r2, [r3, #0] - 8029ef8: 687b ldr r3, [r7, #4] - 8029efa: 681b ldr r3, [r3, #0] - 8029efc: f022 021c bic.w r2, r2, #28 - 8029f00: 601a str r2, [r3, #0] - 8029f02: e007 b.n 8029f14 + 8029e82: 687b ldr r3, [r7, #4] + 8029e84: 681b ldr r3, [r3, #0] + 8029e86: 4a41 ldr r2, [pc, #260] ; (8029f8c ) + 8029e88: 4293 cmp r3, r2 + 8029e8a: d04a beq.n 8029f22 + 8029e8c: 687b ldr r3, [r7, #4] + 8029e8e: 681b ldr r3, [r3, #0] + 8029e90: 4a3f ldr r2, [pc, #252] ; (8029f90 ) + 8029e92: 4293 cmp r3, r2 + 8029e94: d045 beq.n 8029f22 + 8029e96: 687b ldr r3, [r7, #4] + 8029e98: 681b ldr r3, [r3, #0] + 8029e9a: 4a3e ldr r2, [pc, #248] ; (8029f94 ) + 8029e9c: 4293 cmp r3, r2 + 8029e9e: d040 beq.n 8029f22 + 8029ea0: 687b ldr r3, [r7, #4] + 8029ea2: 681b ldr r3, [r3, #0] + 8029ea4: 4a3c ldr r2, [pc, #240] ; (8029f98 ) + 8029ea6: 4293 cmp r3, r2 + 8029ea8: d03b beq.n 8029f22 + 8029eaa: 687b ldr r3, [r7, #4] + 8029eac: 681b ldr r3, [r3, #0] + 8029eae: 4a3b ldr r2, [pc, #236] ; (8029f9c ) + 8029eb0: 4293 cmp r3, r2 + 8029eb2: d036 beq.n 8029f22 + 8029eb4: 687b ldr r3, [r7, #4] + 8029eb6: 681b ldr r3, [r3, #0] + 8029eb8: 4a39 ldr r2, [pc, #228] ; (8029fa0 ) + 8029eba: 4293 cmp r3, r2 + 8029ebc: d031 beq.n 8029f22 + 8029ebe: 687b ldr r3, [r7, #4] + 8029ec0: 681b ldr r3, [r3, #0] + 8029ec2: 4a38 ldr r2, [pc, #224] ; (8029fa4 ) + 8029ec4: 4293 cmp r3, r2 + 8029ec6: d02c beq.n 8029f22 + 8029ec8: 687b ldr r3, [r7, #4] + 8029eca: 681b ldr r3, [r3, #0] + 8029ecc: 4a36 ldr r2, [pc, #216] ; (8029fa8 ) + 8029ece: 4293 cmp r3, r2 + 8029ed0: d027 beq.n 8029f22 + 8029ed2: 687b ldr r3, [r7, #4] + 8029ed4: 681b ldr r3, [r3, #0] + 8029ed6: 4a35 ldr r2, [pc, #212] ; (8029fac ) + 8029ed8: 4293 cmp r3, r2 + 8029eda: d022 beq.n 8029f22 + 8029edc: 687b ldr r3, [r7, #4] + 8029ede: 681b ldr r3, [r3, #0] + 8029ee0: 4a33 ldr r2, [pc, #204] ; (8029fb0 ) + 8029ee2: 4293 cmp r3, r2 + 8029ee4: d01d beq.n 8029f22 + 8029ee6: 687b ldr r3, [r7, #4] + 8029ee8: 681b ldr r3, [r3, #0] + 8029eea: 4a32 ldr r2, [pc, #200] ; (8029fb4 ) + 8029eec: 4293 cmp r3, r2 + 8029eee: d018 beq.n 8029f22 + 8029ef0: 687b ldr r3, [r7, #4] + 8029ef2: 681b ldr r3, [r3, #0] + 8029ef4: 4a30 ldr r2, [pc, #192] ; (8029fb8 ) + 8029ef6: 4293 cmp r3, r2 + 8029ef8: d013 beq.n 8029f22 + 8029efa: 687b ldr r3, [r7, #4] + 8029efc: 681b ldr r3, [r3, #0] + 8029efe: 4a2f ldr r2, [pc, #188] ; (8029fbc ) + 8029f00: 4293 cmp r3, r2 + 8029f02: d00e beq.n 8029f22 8029f04: 687b ldr r3, [r7, #4] 8029f06: 681b ldr r3, [r3, #0] - 8029f08: 681a ldr r2, [r3, #0] - 8029f0a: 687b ldr r3, [r7, #4] - 8029f0c: 681b ldr r3, [r3, #0] - 8029f0e: f022 020e bic.w r2, r2, #14 - 8029f12: 601a str r2, [r3, #0] + 8029f08: 4a2d ldr r2, [pc, #180] ; (8029fc0 ) + 8029f0a: 4293 cmp r3, r2 + 8029f0c: d009 beq.n 8029f22 + 8029f0e: 687b ldr r3, [r7, #4] + 8029f10: 681b ldr r3, [r3, #0] + 8029f12: 4a2c ldr r2, [pc, #176] ; (8029fc4 ) + 8029f14: 4293 cmp r3, r2 + 8029f16: d004 beq.n 8029f22 + 8029f18: 687b ldr r3, [r7, #4] + 8029f1a: 681b ldr r3, [r3, #0] + 8029f1c: 4a2a ldr r2, [pc, #168] ; (8029fc8 ) + 8029f1e: 4293 cmp r3, r2 + 8029f20: d108 bne.n 8029f34 + 8029f22: 687b ldr r3, [r7, #4] + 8029f24: 681b ldr r3, [r3, #0] + 8029f26: 681a ldr r2, [r3, #0] + 8029f28: 687b ldr r3, [r7, #4] + 8029f2a: 681b ldr r3, [r3, #0] + 8029f2c: f022 021c bic.w r2, r2, #28 + 8029f30: 601a str r2, [r3, #0] + 8029f32: e007 b.n 8029f44 + 8029f34: 687b ldr r3, [r7, #4] + 8029f36: 681b ldr r3, [r3, #0] + 8029f38: 681a ldr r2, [r3, #0] + 8029f3a: 687b ldr r3, [r7, #4] + 8029f3c: 681b ldr r3, [r3, #0] + 8029f3e: f022 020e bic.w r2, r2, #14 + 8029f42: 601a str r2, [r3, #0] /* Clear all flags */ regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU); - 8029f14: 687b ldr r3, [r7, #4] - 8029f16: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029f18: f003 031f and.w r3, r3, #31 - 8029f1c: 2201 movs r2, #1 - 8029f1e: 409a lsls r2, r3 - 8029f20: 69fb ldr r3, [r7, #28] - 8029f22: 605a str r2, [r3, #4] + 8029f44: 687b ldr r3, [r7, #4] + 8029f46: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029f48: f003 031f and.w r3, r3, #31 + 8029f4c: 2201 movs r2, #1 + 8029f4e: 409a lsls r2, r3 + 8029f50: 69fb ldr r3, [r7, #28] + 8029f52: 605a str r2, [r3, #4] /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TE; - 8029f24: 687b ldr r3, [r7, #4] - 8029f26: 2201 movs r2, #1 - 8029f28: 655a str r2, [r3, #84] ; 0x54 + 8029f54: 687b ldr r3, [r7, #4] + 8029f56: 2201 movs r2, #1 + 8029f58: 655a str r2, [r3, #84] ; 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8029f2a: 687b ldr r3, [r7, #4] - 8029f2c: 2201 movs r2, #1 - 8029f2e: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029f5a: 687b ldr r3, [r7, #4] + 8029f5c: 2201 movs r2, #1 + 8029f5e: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029f32: 687b ldr r3, [r7, #4] - 8029f34: 2200 movs r2, #0 - 8029f36: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8029f62: 687b ldr r3, [r7, #4] + 8029f64: 2200 movs r2, #0 + 8029f66: f883 2034 strb.w r2, [r3, #52] ; 0x34 if (hdma->XferErrorCallback != NULL) - 8029f3a: 687b ldr r3, [r7, #4] - 8029f3c: 6cdb ldr r3, [r3, #76] ; 0x4c - 8029f3e: 2b00 cmp r3, #0 - 8029f40: d009 beq.n 8029f56 + 8029f6a: 687b ldr r3, [r7, #4] + 8029f6c: 6cdb ldr r3, [r3, #76] ; 0x4c + 8029f6e: 2b00 cmp r3, #0 + 8029f70: d009 beq.n 8029f86 { /* Transfer error callback */ hdma->XferErrorCallback(hdma); - 8029f42: 687b ldr r3, [r7, #4] - 8029f44: 6cdb ldr r3, [r3, #76] ; 0x4c - 8029f46: 6878 ldr r0, [r7, #4] - 8029f48: 4798 blx r3 - 8029f4a: e004 b.n 8029f56 + 8029f72: 687b ldr r3, [r7, #4] + 8029f74: 6cdb ldr r3, [r3, #76] ; 0x4c + 8029f76: 6878 ldr r0, [r7, #4] + 8029f78: 4798 blx r3 + 8029f7a: e004 b.n 8029f86 return; - 8029f4c: bf00 nop - 8029f4e: e002 b.n 8029f56 + 8029f7c: bf00 nop + 8029f7e: e002 b.n 8029f86 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029f50: bf00 nop - 8029f52: e000 b.n 8029f56 + 8029f80: bf00 nop + 8029f82: e000 b.n 8029f86 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029f54: bf00 nop + 8029f84: bf00 nop } else { /* Nothing To Do */ } } - 8029f56: 3728 adds r7, #40 ; 0x28 - 8029f58: 46bd mov sp, r7 - 8029f5a: bd80 pop {r7, pc} - 8029f5c: 40020010 .word 0x40020010 - 8029f60: 40020028 .word 0x40020028 - 8029f64: 40020040 .word 0x40020040 - 8029f68: 40020058 .word 0x40020058 - 8029f6c: 40020070 .word 0x40020070 - 8029f70: 40020088 .word 0x40020088 - 8029f74: 400200a0 .word 0x400200a0 - 8029f78: 400200b8 .word 0x400200b8 - 8029f7c: 40020410 .word 0x40020410 - 8029f80: 40020428 .word 0x40020428 - 8029f84: 40020440 .word 0x40020440 - 8029f88: 40020458 .word 0x40020458 - 8029f8c: 40020470 .word 0x40020470 - 8029f90: 40020488 .word 0x40020488 - 8029f94: 400204a0 .word 0x400204a0 - 8029f98: 400204b8 .word 0x400204b8 - -08029f9c : + 8029f86: 3728 adds r7, #40 ; 0x28 + 8029f88: 46bd mov sp, r7 + 8029f8a: bd80 pop {r7, pc} + 8029f8c: 40020010 .word 0x40020010 + 8029f90: 40020028 .word 0x40020028 + 8029f94: 40020040 .word 0x40020040 + 8029f98: 40020058 .word 0x40020058 + 8029f9c: 40020070 .word 0x40020070 + 8029fa0: 40020088 .word 0x40020088 + 8029fa4: 400200a0 .word 0x400200a0 + 8029fa8: 400200b8 .word 0x400200b8 + 8029fac: 40020410 .word 0x40020410 + 8029fb0: 40020428 .word 0x40020428 + 8029fb4: 40020440 .word 0x40020440 + 8029fb8: 40020458 .word 0x40020458 + 8029fbc: 40020470 .word 0x40020470 + 8029fc0: 40020488 .word 0x40020488 + 8029fc4: 400204a0 .word 0x400204a0 + 8029fc8: 400204b8 .word 0x400204b8 + +08029fcc : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL state */ HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) { - 8029f9c: b480 push {r7} - 8029f9e: b083 sub sp, #12 - 8029fa0: af00 add r7, sp, #0 - 8029fa2: 6078 str r0, [r7, #4] + 8029fcc: b480 push {r7} + 8029fce: b083 sub sp, #12 + 8029fd0: af00 add r7, sp, #0 + 8029fd2: 6078 str r0, [r7, #4] return hdma->State; - 8029fa4: 687b ldr r3, [r7, #4] - 8029fa6: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 8029faa: b2db uxtb r3, r3 + 8029fd4: 687b ldr r3, [r7, #4] + 8029fd6: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8029fda: b2db uxtb r3, r3 } - 8029fac: 4618 mov r0, r3 - 8029fae: 370c adds r7, #12 - 8029fb0: 46bd mov sp, r7 - 8029fb2: f85d 7b04 ldr.w r7, [sp], #4 - 8029fb6: 4770 bx lr + 8029fdc: 4618 mov r0, r3 + 8029fde: 370c adds r7, #12 + 8029fe0: 46bd mov sp, r7 + 8029fe2: f85d 7b04 ldr.w r7, [sp], #4 + 8029fe6: 4770 bx lr -08029fb8 : +08029fe8 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval None */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { - 8029fb8: b480 push {r7} - 8029fba: b087 sub sp, #28 - 8029fbc: af00 add r7, sp, #0 - 8029fbe: 60f8 str r0, [r7, #12] - 8029fc0: 60b9 str r1, [r7, #8] - 8029fc2: 607a str r2, [r7, #4] - 8029fc4: 603b str r3, [r7, #0] + 8029fe8: b480 push {r7} + 8029fea: b087 sub sp, #28 + 8029fec: af00 add r7, sp, #0 + 8029fee: 60f8 str r0, [r7, #12] + 8029ff0: 60b9 str r1, [r7, #8] + 8029ff2: 607a str r2, [r7, #4] + 8029ff4: 603b str r3, [r7, #0] /* calculate DMA base and stream number */ DMA_Base_Registers *regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress; - 8029fc6: 68fb ldr r3, [r7, #12] - 8029fc8: 6d9b ldr r3, [r3, #88] ; 0x58 - 8029fca: 617b str r3, [r7, #20] + 8029ff6: 68fb ldr r3, [r7, #12] + 8029ff8: 6d9b ldr r3, [r3, #88] ; 0x58 + 8029ffa: 617b str r3, [r7, #20] BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress; - 8029fcc: 68fb ldr r3, [r7, #12] - 8029fce: 6d9b ldr r3, [r3, #88] ; 0x58 - 8029fd0: 613b str r3, [r7, #16] + 8029ffc: 68fb ldr r3, [r7, #12] + 8029ffe: 6d9b ldr r3, [r3, #88] ; 0x58 + 802a000: 613b str r3, [r7, #16] if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 8029fd2: 68fb ldr r3, [r7, #12] - 8029fd4: 681b ldr r3, [r3, #0] - 8029fd6: 4a7f ldr r2, [pc, #508] ; (802a1d4 ) - 8029fd8: 4293 cmp r3, r2 - 8029fda: d072 beq.n 802a0c2 - 8029fdc: 68fb ldr r3, [r7, #12] - 8029fde: 681b ldr r3, [r3, #0] - 8029fe0: 4a7d ldr r2, [pc, #500] ; (802a1d8 ) - 8029fe2: 4293 cmp r3, r2 - 8029fe4: d06d beq.n 802a0c2 - 8029fe6: 68fb ldr r3, [r7, #12] - 8029fe8: 681b ldr r3, [r3, #0] - 8029fea: 4a7c ldr r2, [pc, #496] ; (802a1dc ) - 8029fec: 4293 cmp r3, r2 - 8029fee: d068 beq.n 802a0c2 - 8029ff0: 68fb ldr r3, [r7, #12] - 8029ff2: 681b ldr r3, [r3, #0] - 8029ff4: 4a7a ldr r2, [pc, #488] ; (802a1e0 ) - 8029ff6: 4293 cmp r3, r2 - 8029ff8: d063 beq.n 802a0c2 - 8029ffa: 68fb ldr r3, [r7, #12] - 8029ffc: 681b ldr r3, [r3, #0] - 8029ffe: 4a79 ldr r2, [pc, #484] ; (802a1e4 ) - 802a000: 4293 cmp r3, r2 - 802a002: d05e beq.n 802a0c2 - 802a004: 68fb ldr r3, [r7, #12] - 802a006: 681b ldr r3, [r3, #0] - 802a008: 4a77 ldr r2, [pc, #476] ; (802a1e8 ) - 802a00a: 4293 cmp r3, r2 - 802a00c: d059 beq.n 802a0c2 - 802a00e: 68fb ldr r3, [r7, #12] - 802a010: 681b ldr r3, [r3, #0] - 802a012: 4a76 ldr r2, [pc, #472] ; (802a1ec ) - 802a014: 4293 cmp r3, r2 - 802a016: d054 beq.n 802a0c2 - 802a018: 68fb ldr r3, [r7, #12] - 802a01a: 681b ldr r3, [r3, #0] - 802a01c: 4a74 ldr r2, [pc, #464] ; (802a1f0 ) - 802a01e: 4293 cmp r3, r2 - 802a020: d04f beq.n 802a0c2 - 802a022: 68fb ldr r3, [r7, #12] - 802a024: 681b ldr r3, [r3, #0] - 802a026: 4a73 ldr r2, [pc, #460] ; (802a1f4 ) - 802a028: 4293 cmp r3, r2 - 802a02a: d04a beq.n 802a0c2 - 802a02c: 68fb ldr r3, [r7, #12] - 802a02e: 681b ldr r3, [r3, #0] - 802a030: 4a71 ldr r2, [pc, #452] ; (802a1f8 ) - 802a032: 4293 cmp r3, r2 - 802a034: d045 beq.n 802a0c2 - 802a036: 68fb ldr r3, [r7, #12] - 802a038: 681b ldr r3, [r3, #0] - 802a03a: 4a70 ldr r2, [pc, #448] ; (802a1fc ) - 802a03c: 4293 cmp r3, r2 - 802a03e: d040 beq.n 802a0c2 - 802a040: 68fb ldr r3, [r7, #12] - 802a042: 681b ldr r3, [r3, #0] - 802a044: 4a6e ldr r2, [pc, #440] ; (802a200 ) - 802a046: 4293 cmp r3, r2 - 802a048: d03b beq.n 802a0c2 - 802a04a: 68fb ldr r3, [r7, #12] - 802a04c: 681b ldr r3, [r3, #0] - 802a04e: 4a6d ldr r2, [pc, #436] ; (802a204 ) - 802a050: 4293 cmp r3, r2 - 802a052: d036 beq.n 802a0c2 - 802a054: 68fb ldr r3, [r7, #12] - 802a056: 681b ldr r3, [r3, #0] - 802a058: 4a6b ldr r2, [pc, #428] ; (802a208 ) - 802a05a: 4293 cmp r3, r2 - 802a05c: d031 beq.n 802a0c2 - 802a05e: 68fb ldr r3, [r7, #12] - 802a060: 681b ldr r3, [r3, #0] - 802a062: 4a6a ldr r2, [pc, #424] ; (802a20c ) - 802a064: 4293 cmp r3, r2 - 802a066: d02c beq.n 802a0c2 - 802a068: 68fb ldr r3, [r7, #12] - 802a06a: 681b ldr r3, [r3, #0] - 802a06c: 4a68 ldr r2, [pc, #416] ; (802a210 ) - 802a06e: 4293 cmp r3, r2 - 802a070: d027 beq.n 802a0c2 - 802a072: 68fb ldr r3, [r7, #12] - 802a074: 681b ldr r3, [r3, #0] - 802a076: 4a67 ldr r2, [pc, #412] ; (802a214 ) - 802a078: 4293 cmp r3, r2 - 802a07a: d022 beq.n 802a0c2 - 802a07c: 68fb ldr r3, [r7, #12] - 802a07e: 681b ldr r3, [r3, #0] - 802a080: 4a65 ldr r2, [pc, #404] ; (802a218 ) - 802a082: 4293 cmp r3, r2 - 802a084: d01d beq.n 802a0c2 - 802a086: 68fb ldr r3, [r7, #12] - 802a088: 681b ldr r3, [r3, #0] - 802a08a: 4a64 ldr r2, [pc, #400] ; (802a21c ) - 802a08c: 4293 cmp r3, r2 - 802a08e: d018 beq.n 802a0c2 - 802a090: 68fb ldr r3, [r7, #12] - 802a092: 681b ldr r3, [r3, #0] - 802a094: 4a62 ldr r2, [pc, #392] ; (802a220 ) - 802a096: 4293 cmp r3, r2 - 802a098: d013 beq.n 802a0c2 - 802a09a: 68fb ldr r3, [r7, #12] - 802a09c: 681b ldr r3, [r3, #0] - 802a09e: 4a61 ldr r2, [pc, #388] ; (802a224 ) - 802a0a0: 4293 cmp r3, r2 - 802a0a2: d00e beq.n 802a0c2 - 802a0a4: 68fb ldr r3, [r7, #12] - 802a0a6: 681b ldr r3, [r3, #0] - 802a0a8: 4a5f ldr r2, [pc, #380] ; (802a228 ) - 802a0aa: 4293 cmp r3, r2 - 802a0ac: d009 beq.n 802a0c2 - 802a0ae: 68fb ldr r3, [r7, #12] - 802a0b0: 681b ldr r3, [r3, #0] - 802a0b2: 4a5e ldr r2, [pc, #376] ; (802a22c ) - 802a0b4: 4293 cmp r3, r2 - 802a0b6: d004 beq.n 802a0c2 - 802a0b8: 68fb ldr r3, [r7, #12] - 802a0ba: 681b ldr r3, [r3, #0] - 802a0bc: 4a5c ldr r2, [pc, #368] ; (802a230 ) - 802a0be: 4293 cmp r3, r2 - 802a0c0: d101 bne.n 802a0c6 - 802a0c2: 2301 movs r3, #1 - 802a0c4: e000 b.n 802a0c8 - 802a0c6: 2300 movs r3, #0 - 802a0c8: 2b00 cmp r3, #0 - 802a0ca: d00d beq.n 802a0e8 + 802a002: 68fb ldr r3, [r7, #12] + 802a004: 681b ldr r3, [r3, #0] + 802a006: 4a7f ldr r2, [pc, #508] ; (802a204 ) + 802a008: 4293 cmp r3, r2 + 802a00a: d072 beq.n 802a0f2 + 802a00c: 68fb ldr r3, [r7, #12] + 802a00e: 681b ldr r3, [r3, #0] + 802a010: 4a7d ldr r2, [pc, #500] ; (802a208 ) + 802a012: 4293 cmp r3, r2 + 802a014: d06d beq.n 802a0f2 + 802a016: 68fb ldr r3, [r7, #12] + 802a018: 681b ldr r3, [r3, #0] + 802a01a: 4a7c ldr r2, [pc, #496] ; (802a20c ) + 802a01c: 4293 cmp r3, r2 + 802a01e: d068 beq.n 802a0f2 + 802a020: 68fb ldr r3, [r7, #12] + 802a022: 681b ldr r3, [r3, #0] + 802a024: 4a7a ldr r2, [pc, #488] ; (802a210 ) + 802a026: 4293 cmp r3, r2 + 802a028: d063 beq.n 802a0f2 + 802a02a: 68fb ldr r3, [r7, #12] + 802a02c: 681b ldr r3, [r3, #0] + 802a02e: 4a79 ldr r2, [pc, #484] ; (802a214 ) + 802a030: 4293 cmp r3, r2 + 802a032: d05e beq.n 802a0f2 + 802a034: 68fb ldr r3, [r7, #12] + 802a036: 681b ldr r3, [r3, #0] + 802a038: 4a77 ldr r2, [pc, #476] ; (802a218 ) + 802a03a: 4293 cmp r3, r2 + 802a03c: d059 beq.n 802a0f2 + 802a03e: 68fb ldr r3, [r7, #12] + 802a040: 681b ldr r3, [r3, #0] + 802a042: 4a76 ldr r2, [pc, #472] ; (802a21c ) + 802a044: 4293 cmp r3, r2 + 802a046: d054 beq.n 802a0f2 + 802a048: 68fb ldr r3, [r7, #12] + 802a04a: 681b ldr r3, [r3, #0] + 802a04c: 4a74 ldr r2, [pc, #464] ; (802a220 ) + 802a04e: 4293 cmp r3, r2 + 802a050: d04f beq.n 802a0f2 + 802a052: 68fb ldr r3, [r7, #12] + 802a054: 681b ldr r3, [r3, #0] + 802a056: 4a73 ldr r2, [pc, #460] ; (802a224 ) + 802a058: 4293 cmp r3, r2 + 802a05a: d04a beq.n 802a0f2 + 802a05c: 68fb ldr r3, [r7, #12] + 802a05e: 681b ldr r3, [r3, #0] + 802a060: 4a71 ldr r2, [pc, #452] ; (802a228 ) + 802a062: 4293 cmp r3, r2 + 802a064: d045 beq.n 802a0f2 + 802a066: 68fb ldr r3, [r7, #12] + 802a068: 681b ldr r3, [r3, #0] + 802a06a: 4a70 ldr r2, [pc, #448] ; (802a22c ) + 802a06c: 4293 cmp r3, r2 + 802a06e: d040 beq.n 802a0f2 + 802a070: 68fb ldr r3, [r7, #12] + 802a072: 681b ldr r3, [r3, #0] + 802a074: 4a6e ldr r2, [pc, #440] ; (802a230 ) + 802a076: 4293 cmp r3, r2 + 802a078: d03b beq.n 802a0f2 + 802a07a: 68fb ldr r3, [r7, #12] + 802a07c: 681b ldr r3, [r3, #0] + 802a07e: 4a6d ldr r2, [pc, #436] ; (802a234 ) + 802a080: 4293 cmp r3, r2 + 802a082: d036 beq.n 802a0f2 + 802a084: 68fb ldr r3, [r7, #12] + 802a086: 681b ldr r3, [r3, #0] + 802a088: 4a6b ldr r2, [pc, #428] ; (802a238 ) + 802a08a: 4293 cmp r3, r2 + 802a08c: d031 beq.n 802a0f2 + 802a08e: 68fb ldr r3, [r7, #12] + 802a090: 681b ldr r3, [r3, #0] + 802a092: 4a6a ldr r2, [pc, #424] ; (802a23c ) + 802a094: 4293 cmp r3, r2 + 802a096: d02c beq.n 802a0f2 + 802a098: 68fb ldr r3, [r7, #12] + 802a09a: 681b ldr r3, [r3, #0] + 802a09c: 4a68 ldr r2, [pc, #416] ; (802a240 ) + 802a09e: 4293 cmp r3, r2 + 802a0a0: d027 beq.n 802a0f2 + 802a0a2: 68fb ldr r3, [r7, #12] + 802a0a4: 681b ldr r3, [r3, #0] + 802a0a6: 4a67 ldr r2, [pc, #412] ; (802a244 ) + 802a0a8: 4293 cmp r3, r2 + 802a0aa: d022 beq.n 802a0f2 + 802a0ac: 68fb ldr r3, [r7, #12] + 802a0ae: 681b ldr r3, [r3, #0] + 802a0b0: 4a65 ldr r2, [pc, #404] ; (802a248 ) + 802a0b2: 4293 cmp r3, r2 + 802a0b4: d01d beq.n 802a0f2 + 802a0b6: 68fb ldr r3, [r7, #12] + 802a0b8: 681b ldr r3, [r3, #0] + 802a0ba: 4a64 ldr r2, [pc, #400] ; (802a24c ) + 802a0bc: 4293 cmp r3, r2 + 802a0be: d018 beq.n 802a0f2 + 802a0c0: 68fb ldr r3, [r7, #12] + 802a0c2: 681b ldr r3, [r3, #0] + 802a0c4: 4a62 ldr r2, [pc, #392] ; (802a250 ) + 802a0c6: 4293 cmp r3, r2 + 802a0c8: d013 beq.n 802a0f2 + 802a0ca: 68fb ldr r3, [r7, #12] + 802a0cc: 681b ldr r3, [r3, #0] + 802a0ce: 4a61 ldr r2, [pc, #388] ; (802a254 ) + 802a0d0: 4293 cmp r3, r2 + 802a0d2: d00e beq.n 802a0f2 + 802a0d4: 68fb ldr r3, [r7, #12] + 802a0d6: 681b ldr r3, [r3, #0] + 802a0d8: 4a5f ldr r2, [pc, #380] ; (802a258 ) + 802a0da: 4293 cmp r3, r2 + 802a0dc: d009 beq.n 802a0f2 + 802a0de: 68fb ldr r3, [r7, #12] + 802a0e0: 681b ldr r3, [r3, #0] + 802a0e2: 4a5e ldr r2, [pc, #376] ; (802a25c ) + 802a0e4: 4293 cmp r3, r2 + 802a0e6: d004 beq.n 802a0f2 + 802a0e8: 68fb ldr r3, [r7, #12] + 802a0ea: 681b ldr r3, [r3, #0] + 802a0ec: 4a5c ldr r2, [pc, #368] ; (802a260 ) + 802a0ee: 4293 cmp r3, r2 + 802a0f0: d101 bne.n 802a0f6 + 802a0f2: 2301 movs r3, #1 + 802a0f4: e000 b.n 802a0f8 + 802a0f6: 2300 movs r3, #0 + 802a0f8: 2b00 cmp r3, #0 + 802a0fa: d00d beq.n 802a118 { /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 802a0cc: 68fb ldr r3, [r7, #12] - 802a0ce: 6e5b ldr r3, [r3, #100] ; 0x64 - 802a0d0: 68fa ldr r2, [r7, #12] - 802a0d2: 6e92 ldr r2, [r2, #104] ; 0x68 - 802a0d4: 605a str r2, [r3, #4] + 802a0fc: 68fb ldr r3, [r7, #12] + 802a0fe: 6e5b ldr r3, [r3, #100] ; 0x64 + 802a100: 68fa ldr r2, [r7, #12] + 802a102: 6e92 ldr r2, [r2, #104] ; 0x68 + 802a104: 605a str r2, [r3, #4] if(hdma->DMAmuxRequestGen != 0U) - 802a0d6: 68fb ldr r3, [r7, #12] - 802a0d8: 6edb ldr r3, [r3, #108] ; 0x6c - 802a0da: 2b00 cmp r3, #0 - 802a0dc: d004 beq.n 802a0e8 + 802a106: 68fb ldr r3, [r7, #12] + 802a108: 6edb ldr r3, [r3, #108] ; 0x6c + 802a10a: 2b00 cmp r3, #0 + 802a10c: d004 beq.n 802a118 { /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 802a0de: 68fb ldr r3, [r7, #12] - 802a0e0: 6f1b ldr r3, [r3, #112] ; 0x70 - 802a0e2: 68fa ldr r2, [r7, #12] - 802a0e4: 6f52 ldr r2, [r2, #116] ; 0x74 - 802a0e6: 605a str r2, [r3, #4] + 802a10e: 68fb ldr r3, [r7, #12] + 802a110: 6f1b ldr r3, [r3, #112] ; 0x70 + 802a112: 68fa ldr r2, [r7, #12] + 802a114: 6f52 ldr r2, [r2, #116] ; 0x74 + 802a116: 605a str r2, [r3, #4] } } if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 802a0e8: 68fb ldr r3, [r7, #12] - 802a0ea: 681b ldr r3, [r3, #0] - 802a0ec: 4a39 ldr r2, [pc, #228] ; (802a1d4 ) - 802a0ee: 4293 cmp r3, r2 - 802a0f0: d04a beq.n 802a188 - 802a0f2: 68fb ldr r3, [r7, #12] - 802a0f4: 681b ldr r3, [r3, #0] - 802a0f6: 4a38 ldr r2, [pc, #224] ; (802a1d8 ) - 802a0f8: 4293 cmp r3, r2 - 802a0fa: d045 beq.n 802a188 - 802a0fc: 68fb ldr r3, [r7, #12] - 802a0fe: 681b ldr r3, [r3, #0] - 802a100: 4a36 ldr r2, [pc, #216] ; (802a1dc ) - 802a102: 4293 cmp r3, r2 - 802a104: d040 beq.n 802a188 - 802a106: 68fb ldr r3, [r7, #12] - 802a108: 681b ldr r3, [r3, #0] - 802a10a: 4a35 ldr r2, [pc, #212] ; (802a1e0 ) - 802a10c: 4293 cmp r3, r2 - 802a10e: d03b beq.n 802a188 - 802a110: 68fb ldr r3, [r7, #12] - 802a112: 681b ldr r3, [r3, #0] - 802a114: 4a33 ldr r2, [pc, #204] ; (802a1e4 ) - 802a116: 4293 cmp r3, r2 - 802a118: d036 beq.n 802a188 - 802a11a: 68fb ldr r3, [r7, #12] - 802a11c: 681b ldr r3, [r3, #0] - 802a11e: 4a32 ldr r2, [pc, #200] ; (802a1e8 ) - 802a120: 4293 cmp r3, r2 - 802a122: d031 beq.n 802a188 - 802a124: 68fb ldr r3, [r7, #12] - 802a126: 681b ldr r3, [r3, #0] - 802a128: 4a30 ldr r2, [pc, #192] ; (802a1ec ) - 802a12a: 4293 cmp r3, r2 - 802a12c: d02c beq.n 802a188 - 802a12e: 68fb ldr r3, [r7, #12] - 802a130: 681b ldr r3, [r3, #0] - 802a132: 4a2f ldr r2, [pc, #188] ; (802a1f0 ) - 802a134: 4293 cmp r3, r2 - 802a136: d027 beq.n 802a188 - 802a138: 68fb ldr r3, [r7, #12] - 802a13a: 681b ldr r3, [r3, #0] - 802a13c: 4a2d ldr r2, [pc, #180] ; (802a1f4 ) - 802a13e: 4293 cmp r3, r2 - 802a140: d022 beq.n 802a188 - 802a142: 68fb ldr r3, [r7, #12] - 802a144: 681b ldr r3, [r3, #0] - 802a146: 4a2c ldr r2, [pc, #176] ; (802a1f8 ) - 802a148: 4293 cmp r3, r2 - 802a14a: d01d beq.n 802a188 - 802a14c: 68fb ldr r3, [r7, #12] - 802a14e: 681b ldr r3, [r3, #0] - 802a150: 4a2a ldr r2, [pc, #168] ; (802a1fc ) - 802a152: 4293 cmp r3, r2 - 802a154: d018 beq.n 802a188 - 802a156: 68fb ldr r3, [r7, #12] - 802a158: 681b ldr r3, [r3, #0] - 802a15a: 4a29 ldr r2, [pc, #164] ; (802a200 ) - 802a15c: 4293 cmp r3, r2 - 802a15e: d013 beq.n 802a188 - 802a160: 68fb ldr r3, [r7, #12] - 802a162: 681b ldr r3, [r3, #0] - 802a164: 4a27 ldr r2, [pc, #156] ; (802a204 ) - 802a166: 4293 cmp r3, r2 - 802a168: d00e beq.n 802a188 - 802a16a: 68fb ldr r3, [r7, #12] - 802a16c: 681b ldr r3, [r3, #0] - 802a16e: 4a26 ldr r2, [pc, #152] ; (802a208 ) - 802a170: 4293 cmp r3, r2 - 802a172: d009 beq.n 802a188 - 802a174: 68fb ldr r3, [r7, #12] - 802a176: 681b ldr r3, [r3, #0] - 802a178: 4a24 ldr r2, [pc, #144] ; (802a20c ) - 802a17a: 4293 cmp r3, r2 - 802a17c: d004 beq.n 802a188 - 802a17e: 68fb ldr r3, [r7, #12] - 802a180: 681b ldr r3, [r3, #0] - 802a182: 4a23 ldr r2, [pc, #140] ; (802a210 ) - 802a184: 4293 cmp r3, r2 - 802a186: d101 bne.n 802a18c - 802a188: 2301 movs r3, #1 - 802a18a: e000 b.n 802a18e - 802a18c: 2300 movs r3, #0 - 802a18e: 2b00 cmp r3, #0 - 802a190: d059 beq.n 802a246 + 802a118: 68fb ldr r3, [r7, #12] + 802a11a: 681b ldr r3, [r3, #0] + 802a11c: 4a39 ldr r2, [pc, #228] ; (802a204 ) + 802a11e: 4293 cmp r3, r2 + 802a120: d04a beq.n 802a1b8 + 802a122: 68fb ldr r3, [r7, #12] + 802a124: 681b ldr r3, [r3, #0] + 802a126: 4a38 ldr r2, [pc, #224] ; (802a208 ) + 802a128: 4293 cmp r3, r2 + 802a12a: d045 beq.n 802a1b8 + 802a12c: 68fb ldr r3, [r7, #12] + 802a12e: 681b ldr r3, [r3, #0] + 802a130: 4a36 ldr r2, [pc, #216] ; (802a20c ) + 802a132: 4293 cmp r3, r2 + 802a134: d040 beq.n 802a1b8 + 802a136: 68fb ldr r3, [r7, #12] + 802a138: 681b ldr r3, [r3, #0] + 802a13a: 4a35 ldr r2, [pc, #212] ; (802a210 ) + 802a13c: 4293 cmp r3, r2 + 802a13e: d03b beq.n 802a1b8 + 802a140: 68fb ldr r3, [r7, #12] + 802a142: 681b ldr r3, [r3, #0] + 802a144: 4a33 ldr r2, [pc, #204] ; (802a214 ) + 802a146: 4293 cmp r3, r2 + 802a148: d036 beq.n 802a1b8 + 802a14a: 68fb ldr r3, [r7, #12] + 802a14c: 681b ldr r3, [r3, #0] + 802a14e: 4a32 ldr r2, [pc, #200] ; (802a218 ) + 802a150: 4293 cmp r3, r2 + 802a152: d031 beq.n 802a1b8 + 802a154: 68fb ldr r3, [r7, #12] + 802a156: 681b ldr r3, [r3, #0] + 802a158: 4a30 ldr r2, [pc, #192] ; (802a21c ) + 802a15a: 4293 cmp r3, r2 + 802a15c: d02c beq.n 802a1b8 + 802a15e: 68fb ldr r3, [r7, #12] + 802a160: 681b ldr r3, [r3, #0] + 802a162: 4a2f ldr r2, [pc, #188] ; (802a220 ) + 802a164: 4293 cmp r3, r2 + 802a166: d027 beq.n 802a1b8 + 802a168: 68fb ldr r3, [r7, #12] + 802a16a: 681b ldr r3, [r3, #0] + 802a16c: 4a2d ldr r2, [pc, #180] ; (802a224 ) + 802a16e: 4293 cmp r3, r2 + 802a170: d022 beq.n 802a1b8 + 802a172: 68fb ldr r3, [r7, #12] + 802a174: 681b ldr r3, [r3, #0] + 802a176: 4a2c ldr r2, [pc, #176] ; (802a228 ) + 802a178: 4293 cmp r3, r2 + 802a17a: d01d beq.n 802a1b8 + 802a17c: 68fb ldr r3, [r7, #12] + 802a17e: 681b ldr r3, [r3, #0] + 802a180: 4a2a ldr r2, [pc, #168] ; (802a22c ) + 802a182: 4293 cmp r3, r2 + 802a184: d018 beq.n 802a1b8 + 802a186: 68fb ldr r3, [r7, #12] + 802a188: 681b ldr r3, [r3, #0] + 802a18a: 4a29 ldr r2, [pc, #164] ; (802a230 ) + 802a18c: 4293 cmp r3, r2 + 802a18e: d013 beq.n 802a1b8 + 802a190: 68fb ldr r3, [r7, #12] + 802a192: 681b ldr r3, [r3, #0] + 802a194: 4a27 ldr r2, [pc, #156] ; (802a234 ) + 802a196: 4293 cmp r3, r2 + 802a198: d00e beq.n 802a1b8 + 802a19a: 68fb ldr r3, [r7, #12] + 802a19c: 681b ldr r3, [r3, #0] + 802a19e: 4a26 ldr r2, [pc, #152] ; (802a238 ) + 802a1a0: 4293 cmp r3, r2 + 802a1a2: d009 beq.n 802a1b8 + 802a1a4: 68fb ldr r3, [r7, #12] + 802a1a6: 681b ldr r3, [r3, #0] + 802a1a8: 4a24 ldr r2, [pc, #144] ; (802a23c ) + 802a1aa: 4293 cmp r3, r2 + 802a1ac: d004 beq.n 802a1b8 + 802a1ae: 68fb ldr r3, [r7, #12] + 802a1b0: 681b ldr r3, [r3, #0] + 802a1b2: 4a23 ldr r2, [pc, #140] ; (802a240 ) + 802a1b4: 4293 cmp r3, r2 + 802a1b6: d101 bne.n 802a1bc + 802a1b8: 2301 movs r3, #1 + 802a1ba: e000 b.n 802a1be + 802a1bc: 2300 movs r3, #0 + 802a1be: 2b00 cmp r3, #0 + 802a1c0: d059 beq.n 802a276 { /* Clear all interrupt flags at correct offset within the register */ regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); - 802a192: 68fb ldr r3, [r7, #12] - 802a194: 6ddb ldr r3, [r3, #92] ; 0x5c - 802a196: f003 031f and.w r3, r3, #31 - 802a19a: 223f movs r2, #63 ; 0x3f - 802a19c: 409a lsls r2, r3 - 802a19e: 697b ldr r3, [r7, #20] - 802a1a0: 609a str r2, [r3, #8] + 802a1c2: 68fb ldr r3, [r7, #12] + 802a1c4: 6ddb ldr r3, [r3, #92] ; 0x5c + 802a1c6: f003 031f and.w r3, r3, #31 + 802a1ca: 223f movs r2, #63 ; 0x3f + 802a1cc: 409a lsls r2, r3 + 802a1ce: 697b ldr r3, [r7, #20] + 802a1d0: 609a str r2, [r3, #8] /* Clear DBM bit */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= (uint32_t)(~DMA_SxCR_DBM); - 802a1a2: 68fb ldr r3, [r7, #12] - 802a1a4: 681b ldr r3, [r3, #0] - 802a1a6: 681a ldr r2, [r3, #0] - 802a1a8: 68fb ldr r3, [r7, #12] - 802a1aa: 681b ldr r3, [r3, #0] - 802a1ac: f422 2280 bic.w r2, r2, #262144 ; 0x40000 - 802a1b0: 601a str r2, [r3, #0] + 802a1d2: 68fb ldr r3, [r7, #12] + 802a1d4: 681b ldr r3, [r3, #0] + 802a1d6: 681a ldr r2, [r3, #0] + 802a1d8: 68fb ldr r3, [r7, #12] + 802a1da: 681b ldr r3, [r3, #0] + 802a1dc: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 802a1e0: 601a str r2, [r3, #0] /* Configure DMA Stream data length */ ((DMA_Stream_TypeDef *)hdma->Instance)->NDTR = DataLength; - 802a1b2: 68fb ldr r3, [r7, #12] - 802a1b4: 681b ldr r3, [r3, #0] - 802a1b6: 683a ldr r2, [r7, #0] - 802a1b8: 605a str r2, [r3, #4] + 802a1e2: 68fb ldr r3, [r7, #12] + 802a1e4: 681b ldr r3, [r3, #0] + 802a1e6: 683a ldr r2, [r7, #0] + 802a1e8: 605a str r2, [r3, #4] /* Peripheral to Memory */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 802a1ba: 68fb ldr r3, [r7, #12] - 802a1bc: 689b ldr r3, [r3, #8] - 802a1be: 2b40 cmp r3, #64 ; 0x40 - 802a1c0: d138 bne.n 802a234 + 802a1ea: 68fb ldr r3, [r7, #12] + 802a1ec: 689b ldr r3, [r3, #8] + 802a1ee: 2b40 cmp r3, #64 ; 0x40 + 802a1f0: d138 bne.n 802a264 { /* Configure DMA Stream destination address */ ((DMA_Stream_TypeDef *)hdma->Instance)->PAR = DstAddress; - 802a1c2: 68fb ldr r3, [r7, #12] - 802a1c4: 681b ldr r3, [r3, #0] - 802a1c6: 687a ldr r2, [r7, #4] - 802a1c8: 609a str r2, [r3, #8] + 802a1f2: 68fb ldr r3, [r7, #12] + 802a1f4: 681b ldr r3, [r3, #0] + 802a1f6: 687a ldr r2, [r7, #4] + 802a1f8: 609a str r2, [r3, #8] /* Configure DMA Stream source address */ ((DMA_Stream_TypeDef *)hdma->Instance)->M0AR = SrcAddress; - 802a1ca: 68fb ldr r3, [r7, #12] - 802a1cc: 681b ldr r3, [r3, #0] - 802a1ce: 68ba ldr r2, [r7, #8] - 802a1d0: 60da str r2, [r3, #12] + 802a1fa: 68fb ldr r3, [r7, #12] + 802a1fc: 681b ldr r3, [r3, #0] + 802a1fe: 68ba ldr r2, [r7, #8] + 802a200: 60da str r2, [r3, #12] } else { /* Nothing To Do */ } } - 802a1d2: e086 b.n 802a2e2 - 802a1d4: 40020010 .word 0x40020010 - 802a1d8: 40020028 .word 0x40020028 - 802a1dc: 40020040 .word 0x40020040 - 802a1e0: 40020058 .word 0x40020058 - 802a1e4: 40020070 .word 0x40020070 - 802a1e8: 40020088 .word 0x40020088 - 802a1ec: 400200a0 .word 0x400200a0 - 802a1f0: 400200b8 .word 0x400200b8 - 802a1f4: 40020410 .word 0x40020410 - 802a1f8: 40020428 .word 0x40020428 - 802a1fc: 40020440 .word 0x40020440 - 802a200: 40020458 .word 0x40020458 - 802a204: 40020470 .word 0x40020470 - 802a208: 40020488 .word 0x40020488 - 802a20c: 400204a0 .word 0x400204a0 - 802a210: 400204b8 .word 0x400204b8 - 802a214: 58025408 .word 0x58025408 - 802a218: 5802541c .word 0x5802541c - 802a21c: 58025430 .word 0x58025430 - 802a220: 58025444 .word 0x58025444 - 802a224: 58025458 .word 0x58025458 - 802a228: 5802546c .word 0x5802546c - 802a22c: 58025480 .word 0x58025480 - 802a230: 58025494 .word 0x58025494 + 802a202: e086 b.n 802a312 + 802a204: 40020010 .word 0x40020010 + 802a208: 40020028 .word 0x40020028 + 802a20c: 40020040 .word 0x40020040 + 802a210: 40020058 .word 0x40020058 + 802a214: 40020070 .word 0x40020070 + 802a218: 40020088 .word 0x40020088 + 802a21c: 400200a0 .word 0x400200a0 + 802a220: 400200b8 .word 0x400200b8 + 802a224: 40020410 .word 0x40020410 + 802a228: 40020428 .word 0x40020428 + 802a22c: 40020440 .word 0x40020440 + 802a230: 40020458 .word 0x40020458 + 802a234: 40020470 .word 0x40020470 + 802a238: 40020488 .word 0x40020488 + 802a23c: 400204a0 .word 0x400204a0 + 802a240: 400204b8 .word 0x400204b8 + 802a244: 58025408 .word 0x58025408 + 802a248: 5802541c .word 0x5802541c + 802a24c: 58025430 .word 0x58025430 + 802a250: 58025444 .word 0x58025444 + 802a254: 58025458 .word 0x58025458 + 802a258: 5802546c .word 0x5802546c + 802a25c: 58025480 .word 0x58025480 + 802a260: 58025494 .word 0x58025494 ((DMA_Stream_TypeDef *)hdma->Instance)->PAR = SrcAddress; - 802a234: 68fb ldr r3, [r7, #12] - 802a236: 681b ldr r3, [r3, #0] - 802a238: 68ba ldr r2, [r7, #8] - 802a23a: 609a str r2, [r3, #8] + 802a264: 68fb ldr r3, [r7, #12] + 802a266: 681b ldr r3, [r3, #0] + 802a268: 68ba ldr r2, [r7, #8] + 802a26a: 609a str r2, [r3, #8] ((DMA_Stream_TypeDef *)hdma->Instance)->M0AR = DstAddress; - 802a23c: 68fb ldr r3, [r7, #12] - 802a23e: 681b ldr r3, [r3, #0] - 802a240: 687a ldr r2, [r7, #4] - 802a242: 60da str r2, [r3, #12] + 802a26c: 68fb ldr r3, [r7, #12] + 802a26e: 681b ldr r3, [r3, #0] + 802a270: 687a ldr r2, [r7, #4] + 802a272: 60da str r2, [r3, #12] } - 802a244: e04d b.n 802a2e2 + 802a274: e04d b.n 802a312 else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */ - 802a246: 68fb ldr r3, [r7, #12] - 802a248: 681b ldr r3, [r3, #0] - 802a24a: 4a29 ldr r2, [pc, #164] ; (802a2f0 ) - 802a24c: 4293 cmp r3, r2 - 802a24e: d022 beq.n 802a296 - 802a250: 68fb ldr r3, [r7, #12] - 802a252: 681b ldr r3, [r3, #0] - 802a254: 4a27 ldr r2, [pc, #156] ; (802a2f4 ) - 802a256: 4293 cmp r3, r2 - 802a258: d01d beq.n 802a296 - 802a25a: 68fb ldr r3, [r7, #12] - 802a25c: 681b ldr r3, [r3, #0] - 802a25e: 4a26 ldr r2, [pc, #152] ; (802a2f8 ) - 802a260: 4293 cmp r3, r2 - 802a262: d018 beq.n 802a296 - 802a264: 68fb ldr r3, [r7, #12] - 802a266: 681b ldr r3, [r3, #0] - 802a268: 4a24 ldr r2, [pc, #144] ; (802a2fc ) - 802a26a: 4293 cmp r3, r2 - 802a26c: d013 beq.n 802a296 - 802a26e: 68fb ldr r3, [r7, #12] - 802a270: 681b ldr r3, [r3, #0] - 802a272: 4a23 ldr r2, [pc, #140] ; (802a300 ) - 802a274: 4293 cmp r3, r2 - 802a276: d00e beq.n 802a296 - 802a278: 68fb ldr r3, [r7, #12] - 802a27a: 681b ldr r3, [r3, #0] - 802a27c: 4a21 ldr r2, [pc, #132] ; (802a304 ) - 802a27e: 4293 cmp r3, r2 - 802a280: d009 beq.n 802a296 - 802a282: 68fb ldr r3, [r7, #12] - 802a284: 681b ldr r3, [r3, #0] - 802a286: 4a20 ldr r2, [pc, #128] ; (802a308 ) - 802a288: 4293 cmp r3, r2 - 802a28a: d004 beq.n 802a296 - 802a28c: 68fb ldr r3, [r7, #12] - 802a28e: 681b ldr r3, [r3, #0] - 802a290: 4a1e ldr r2, [pc, #120] ; (802a30c ) - 802a292: 4293 cmp r3, r2 - 802a294: d101 bne.n 802a29a - 802a296: 2301 movs r3, #1 - 802a298: e000 b.n 802a29c - 802a29a: 2300 movs r3, #0 - 802a29c: 2b00 cmp r3, #0 - 802a29e: d020 beq.n 802a2e2 + 802a276: 68fb ldr r3, [r7, #12] + 802a278: 681b ldr r3, [r3, #0] + 802a27a: 4a29 ldr r2, [pc, #164] ; (802a320 ) + 802a27c: 4293 cmp r3, r2 + 802a27e: d022 beq.n 802a2c6 + 802a280: 68fb ldr r3, [r7, #12] + 802a282: 681b ldr r3, [r3, #0] + 802a284: 4a27 ldr r2, [pc, #156] ; (802a324 ) + 802a286: 4293 cmp r3, r2 + 802a288: d01d beq.n 802a2c6 + 802a28a: 68fb ldr r3, [r7, #12] + 802a28c: 681b ldr r3, [r3, #0] + 802a28e: 4a26 ldr r2, [pc, #152] ; (802a328 ) + 802a290: 4293 cmp r3, r2 + 802a292: d018 beq.n 802a2c6 + 802a294: 68fb ldr r3, [r7, #12] + 802a296: 681b ldr r3, [r3, #0] + 802a298: 4a24 ldr r2, [pc, #144] ; (802a32c ) + 802a29a: 4293 cmp r3, r2 + 802a29c: d013 beq.n 802a2c6 + 802a29e: 68fb ldr r3, [r7, #12] + 802a2a0: 681b ldr r3, [r3, #0] + 802a2a2: 4a23 ldr r2, [pc, #140] ; (802a330 ) + 802a2a4: 4293 cmp r3, r2 + 802a2a6: d00e beq.n 802a2c6 + 802a2a8: 68fb ldr r3, [r7, #12] + 802a2aa: 681b ldr r3, [r3, #0] + 802a2ac: 4a21 ldr r2, [pc, #132] ; (802a334 ) + 802a2ae: 4293 cmp r3, r2 + 802a2b0: d009 beq.n 802a2c6 + 802a2b2: 68fb ldr r3, [r7, #12] + 802a2b4: 681b ldr r3, [r3, #0] + 802a2b6: 4a20 ldr r2, [pc, #128] ; (802a338 ) + 802a2b8: 4293 cmp r3, r2 + 802a2ba: d004 beq.n 802a2c6 + 802a2bc: 68fb ldr r3, [r7, #12] + 802a2be: 681b ldr r3, [r3, #0] + 802a2c0: 4a1e ldr r2, [pc, #120] ; (802a33c ) + 802a2c2: 4293 cmp r3, r2 + 802a2c4: d101 bne.n 802a2ca + 802a2c6: 2301 movs r3, #1 + 802a2c8: e000 b.n 802a2cc + 802a2ca: 2300 movs r3, #0 + 802a2cc: 2b00 cmp r3, #0 + 802a2ce: d020 beq.n 802a312 regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU); - 802a2a0: 68fb ldr r3, [r7, #12] - 802a2a2: 6ddb ldr r3, [r3, #92] ; 0x5c - 802a2a4: f003 031f and.w r3, r3, #31 - 802a2a8: 2201 movs r2, #1 - 802a2aa: 409a lsls r2, r3 - 802a2ac: 693b ldr r3, [r7, #16] - 802a2ae: 605a str r2, [r3, #4] + 802a2d0: 68fb ldr r3, [r7, #12] + 802a2d2: 6ddb ldr r3, [r3, #92] ; 0x5c + 802a2d4: f003 031f and.w r3, r3, #31 + 802a2d8: 2201 movs r2, #1 + 802a2da: 409a lsls r2, r3 + 802a2dc: 693b ldr r3, [r7, #16] + 802a2de: 605a str r2, [r3, #4] ((BDMA_Channel_TypeDef *)hdma->Instance)->CNDTR = DataLength; - 802a2b0: 68fb ldr r3, [r7, #12] - 802a2b2: 681b ldr r3, [r3, #0] - 802a2b4: 683a ldr r2, [r7, #0] - 802a2b6: 605a str r2, [r3, #4] + 802a2e0: 68fb ldr r3, [r7, #12] + 802a2e2: 681b ldr r3, [r3, #0] + 802a2e4: 683a ldr r2, [r7, #0] + 802a2e6: 605a str r2, [r3, #4] if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 802a2b8: 68fb ldr r3, [r7, #12] - 802a2ba: 689b ldr r3, [r3, #8] - 802a2bc: 2b40 cmp r3, #64 ; 0x40 - 802a2be: d108 bne.n 802a2d2 + 802a2e8: 68fb ldr r3, [r7, #12] + 802a2ea: 689b ldr r3, [r3, #8] + 802a2ec: 2b40 cmp r3, #64 ; 0x40 + 802a2ee: d108 bne.n 802a302 ((BDMA_Channel_TypeDef *)hdma->Instance)->CPAR = DstAddress; - 802a2c0: 68fb ldr r3, [r7, #12] - 802a2c2: 681b ldr r3, [r3, #0] - 802a2c4: 687a ldr r2, [r7, #4] - 802a2c6: 609a str r2, [r3, #8] + 802a2f0: 68fb ldr r3, [r7, #12] + 802a2f2: 681b ldr r3, [r3, #0] + 802a2f4: 687a ldr r2, [r7, #4] + 802a2f6: 609a str r2, [r3, #8] ((BDMA_Channel_TypeDef *)hdma->Instance)->CM0AR = SrcAddress; - 802a2c8: 68fb ldr r3, [r7, #12] - 802a2ca: 681b ldr r3, [r3, #0] - 802a2cc: 68ba ldr r2, [r7, #8] - 802a2ce: 60da str r2, [r3, #12] + 802a2f8: 68fb ldr r3, [r7, #12] + 802a2fa: 681b ldr r3, [r3, #0] + 802a2fc: 68ba ldr r2, [r7, #8] + 802a2fe: 60da str r2, [r3, #12] } - 802a2d0: e007 b.n 802a2e2 + 802a300: e007 b.n 802a312 ((BDMA_Channel_TypeDef *)hdma->Instance)->CPAR = SrcAddress; - 802a2d2: 68fb ldr r3, [r7, #12] - 802a2d4: 681b ldr r3, [r3, #0] - 802a2d6: 68ba ldr r2, [r7, #8] - 802a2d8: 609a str r2, [r3, #8] + 802a302: 68fb ldr r3, [r7, #12] + 802a304: 681b ldr r3, [r3, #0] + 802a306: 68ba ldr r2, [r7, #8] + 802a308: 609a str r2, [r3, #8] ((BDMA_Channel_TypeDef *)hdma->Instance)->CM0AR = DstAddress; - 802a2da: 68fb ldr r3, [r7, #12] - 802a2dc: 681b ldr r3, [r3, #0] - 802a2de: 687a ldr r2, [r7, #4] - 802a2e0: 60da str r2, [r3, #12] -} - 802a2e2: bf00 nop - 802a2e4: 371c adds r7, #28 - 802a2e6: 46bd mov sp, r7 - 802a2e8: f85d 7b04 ldr.w r7, [sp], #4 - 802a2ec: 4770 bx lr - 802a2ee: bf00 nop - 802a2f0: 58025408 .word 0x58025408 - 802a2f4: 5802541c .word 0x5802541c - 802a2f8: 58025430 .word 0x58025430 - 802a2fc: 58025444 .word 0x58025444 - 802a300: 58025458 .word 0x58025458 - 802a304: 5802546c .word 0x5802546c - 802a308: 58025480 .word 0x58025480 - 802a30c: 58025494 .word 0x58025494 - -0802a310 : + 802a30a: 68fb ldr r3, [r7, #12] + 802a30c: 681b ldr r3, [r3, #0] + 802a30e: 687a ldr r2, [r7, #4] + 802a310: 60da str r2, [r3, #12] +} + 802a312: bf00 nop + 802a314: 371c adds r7, #28 + 802a316: 46bd mov sp, r7 + 802a318: f85d 7b04 ldr.w r7, [sp], #4 + 802a31c: 4770 bx lr + 802a31e: bf00 nop + 802a320: 58025408 .word 0x58025408 + 802a324: 5802541c .word 0x5802541c + 802a328: 58025430 .word 0x58025430 + 802a32c: 58025444 .word 0x58025444 + 802a330: 58025458 .word 0x58025458 + 802a334: 5802546c .word 0x5802546c + 802a338: 58025480 .word 0x58025480 + 802a33c: 58025494 .word 0x58025494 + +0802a340 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval Stream base address */ static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) { - 802a310: b480 push {r7} - 802a312: b085 sub sp, #20 - 802a314: af00 add r7, sp, #0 - 802a316: 6078 str r0, [r7, #4] + 802a340: b480 push {r7} + 802a342: b085 sub sp, #20 + 802a344: af00 add r7, sp, #0 + 802a346: 6078 str r0, [r7, #4] if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 802a318: 687b ldr r3, [r7, #4] - 802a31a: 681b ldr r3, [r3, #0] - 802a31c: 4a42 ldr r2, [pc, #264] ; (802a428 ) - 802a31e: 4293 cmp r3, r2 - 802a320: d04a beq.n 802a3b8 - 802a322: 687b ldr r3, [r7, #4] - 802a324: 681b ldr r3, [r3, #0] - 802a326: 4a41 ldr r2, [pc, #260] ; (802a42c ) - 802a328: 4293 cmp r3, r2 - 802a32a: d045 beq.n 802a3b8 - 802a32c: 687b ldr r3, [r7, #4] - 802a32e: 681b ldr r3, [r3, #0] - 802a330: 4a3f ldr r2, [pc, #252] ; (802a430 ) - 802a332: 4293 cmp r3, r2 - 802a334: d040 beq.n 802a3b8 - 802a336: 687b ldr r3, [r7, #4] - 802a338: 681b ldr r3, [r3, #0] - 802a33a: 4a3e ldr r2, [pc, #248] ; (802a434 ) - 802a33c: 4293 cmp r3, r2 - 802a33e: d03b beq.n 802a3b8 - 802a340: 687b ldr r3, [r7, #4] - 802a342: 681b ldr r3, [r3, #0] - 802a344: 4a3c ldr r2, [pc, #240] ; (802a438 ) - 802a346: 4293 cmp r3, r2 - 802a348: d036 beq.n 802a3b8 - 802a34a: 687b ldr r3, [r7, #4] - 802a34c: 681b ldr r3, [r3, #0] - 802a34e: 4a3b ldr r2, [pc, #236] ; (802a43c ) - 802a350: 4293 cmp r3, r2 - 802a352: d031 beq.n 802a3b8 - 802a354: 687b ldr r3, [r7, #4] - 802a356: 681b ldr r3, [r3, #0] - 802a358: 4a39 ldr r2, [pc, #228] ; (802a440 ) - 802a35a: 4293 cmp r3, r2 - 802a35c: d02c beq.n 802a3b8 - 802a35e: 687b ldr r3, [r7, #4] - 802a360: 681b ldr r3, [r3, #0] - 802a362: 4a38 ldr r2, [pc, #224] ; (802a444 ) - 802a364: 4293 cmp r3, r2 - 802a366: d027 beq.n 802a3b8 - 802a368: 687b ldr r3, [r7, #4] - 802a36a: 681b ldr r3, [r3, #0] - 802a36c: 4a36 ldr r2, [pc, #216] ; (802a448 ) - 802a36e: 4293 cmp r3, r2 - 802a370: d022 beq.n 802a3b8 - 802a372: 687b ldr r3, [r7, #4] - 802a374: 681b ldr r3, [r3, #0] - 802a376: 4a35 ldr r2, [pc, #212] ; (802a44c ) - 802a378: 4293 cmp r3, r2 - 802a37a: d01d beq.n 802a3b8 - 802a37c: 687b ldr r3, [r7, #4] - 802a37e: 681b ldr r3, [r3, #0] - 802a380: 4a33 ldr r2, [pc, #204] ; (802a450 ) - 802a382: 4293 cmp r3, r2 - 802a384: d018 beq.n 802a3b8 - 802a386: 687b ldr r3, [r7, #4] - 802a388: 681b ldr r3, [r3, #0] - 802a38a: 4a32 ldr r2, [pc, #200] ; (802a454 ) - 802a38c: 4293 cmp r3, r2 - 802a38e: d013 beq.n 802a3b8 - 802a390: 687b ldr r3, [r7, #4] - 802a392: 681b ldr r3, [r3, #0] - 802a394: 4a30 ldr r2, [pc, #192] ; (802a458 ) - 802a396: 4293 cmp r3, r2 - 802a398: d00e beq.n 802a3b8 - 802a39a: 687b ldr r3, [r7, #4] - 802a39c: 681b ldr r3, [r3, #0] - 802a39e: 4a2f ldr r2, [pc, #188] ; (802a45c ) - 802a3a0: 4293 cmp r3, r2 - 802a3a2: d009 beq.n 802a3b8 - 802a3a4: 687b ldr r3, [r7, #4] - 802a3a6: 681b ldr r3, [r3, #0] - 802a3a8: 4a2d ldr r2, [pc, #180] ; (802a460 ) - 802a3aa: 4293 cmp r3, r2 - 802a3ac: d004 beq.n 802a3b8 - 802a3ae: 687b ldr r3, [r7, #4] - 802a3b0: 681b ldr r3, [r3, #0] - 802a3b2: 4a2c ldr r2, [pc, #176] ; (802a464 ) - 802a3b4: 4293 cmp r3, r2 - 802a3b6: d101 bne.n 802a3bc - 802a3b8: 2301 movs r3, #1 - 802a3ba: e000 b.n 802a3be - 802a3bc: 2300 movs r3, #0 - 802a3be: 2b00 cmp r3, #0 - 802a3c0: d024 beq.n 802a40c + 802a348: 687b ldr r3, [r7, #4] + 802a34a: 681b ldr r3, [r3, #0] + 802a34c: 4a42 ldr r2, [pc, #264] ; (802a458 ) + 802a34e: 4293 cmp r3, r2 + 802a350: d04a beq.n 802a3e8 + 802a352: 687b ldr r3, [r7, #4] + 802a354: 681b ldr r3, [r3, #0] + 802a356: 4a41 ldr r2, [pc, #260] ; (802a45c ) + 802a358: 4293 cmp r3, r2 + 802a35a: d045 beq.n 802a3e8 + 802a35c: 687b ldr r3, [r7, #4] + 802a35e: 681b ldr r3, [r3, #0] + 802a360: 4a3f ldr r2, [pc, #252] ; (802a460 ) + 802a362: 4293 cmp r3, r2 + 802a364: d040 beq.n 802a3e8 + 802a366: 687b ldr r3, [r7, #4] + 802a368: 681b ldr r3, [r3, #0] + 802a36a: 4a3e ldr r2, [pc, #248] ; (802a464 ) + 802a36c: 4293 cmp r3, r2 + 802a36e: d03b beq.n 802a3e8 + 802a370: 687b ldr r3, [r7, #4] + 802a372: 681b ldr r3, [r3, #0] + 802a374: 4a3c ldr r2, [pc, #240] ; (802a468 ) + 802a376: 4293 cmp r3, r2 + 802a378: d036 beq.n 802a3e8 + 802a37a: 687b ldr r3, [r7, #4] + 802a37c: 681b ldr r3, [r3, #0] + 802a37e: 4a3b ldr r2, [pc, #236] ; (802a46c ) + 802a380: 4293 cmp r3, r2 + 802a382: d031 beq.n 802a3e8 + 802a384: 687b ldr r3, [r7, #4] + 802a386: 681b ldr r3, [r3, #0] + 802a388: 4a39 ldr r2, [pc, #228] ; (802a470 ) + 802a38a: 4293 cmp r3, r2 + 802a38c: d02c beq.n 802a3e8 + 802a38e: 687b ldr r3, [r7, #4] + 802a390: 681b ldr r3, [r3, #0] + 802a392: 4a38 ldr r2, [pc, #224] ; (802a474 ) + 802a394: 4293 cmp r3, r2 + 802a396: d027 beq.n 802a3e8 + 802a398: 687b ldr r3, [r7, #4] + 802a39a: 681b ldr r3, [r3, #0] + 802a39c: 4a36 ldr r2, [pc, #216] ; (802a478 ) + 802a39e: 4293 cmp r3, r2 + 802a3a0: d022 beq.n 802a3e8 + 802a3a2: 687b ldr r3, [r7, #4] + 802a3a4: 681b ldr r3, [r3, #0] + 802a3a6: 4a35 ldr r2, [pc, #212] ; (802a47c ) + 802a3a8: 4293 cmp r3, r2 + 802a3aa: d01d beq.n 802a3e8 + 802a3ac: 687b ldr r3, [r7, #4] + 802a3ae: 681b ldr r3, [r3, #0] + 802a3b0: 4a33 ldr r2, [pc, #204] ; (802a480 ) + 802a3b2: 4293 cmp r3, r2 + 802a3b4: d018 beq.n 802a3e8 + 802a3b6: 687b ldr r3, [r7, #4] + 802a3b8: 681b ldr r3, [r3, #0] + 802a3ba: 4a32 ldr r2, [pc, #200] ; (802a484 ) + 802a3bc: 4293 cmp r3, r2 + 802a3be: d013 beq.n 802a3e8 + 802a3c0: 687b ldr r3, [r7, #4] + 802a3c2: 681b ldr r3, [r3, #0] + 802a3c4: 4a30 ldr r2, [pc, #192] ; (802a488 ) + 802a3c6: 4293 cmp r3, r2 + 802a3c8: d00e beq.n 802a3e8 + 802a3ca: 687b ldr r3, [r7, #4] + 802a3cc: 681b ldr r3, [r3, #0] + 802a3ce: 4a2f ldr r2, [pc, #188] ; (802a48c ) + 802a3d0: 4293 cmp r3, r2 + 802a3d2: d009 beq.n 802a3e8 + 802a3d4: 687b ldr r3, [r7, #4] + 802a3d6: 681b ldr r3, [r3, #0] + 802a3d8: 4a2d ldr r2, [pc, #180] ; (802a490 ) + 802a3da: 4293 cmp r3, r2 + 802a3dc: d004 beq.n 802a3e8 + 802a3de: 687b ldr r3, [r7, #4] + 802a3e0: 681b ldr r3, [r3, #0] + 802a3e2: 4a2c ldr r2, [pc, #176] ; (802a494 ) + 802a3e4: 4293 cmp r3, r2 + 802a3e6: d101 bne.n 802a3ec + 802a3e8: 2301 movs r3, #1 + 802a3ea: e000 b.n 802a3ee + 802a3ec: 2300 movs r3, #0 + 802a3ee: 2b00 cmp r3, #0 + 802a3f0: d024 beq.n 802a43c { uint32_t stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U; - 802a3c2: 687b ldr r3, [r7, #4] - 802a3c4: 681b ldr r3, [r3, #0] - 802a3c6: b2db uxtb r3, r3 - 802a3c8: 3b10 subs r3, #16 - 802a3ca: 4a27 ldr r2, [pc, #156] ; (802a468 ) - 802a3cc: fba2 2303 umull r2, r3, r2, r3 - 802a3d0: 091b lsrs r3, r3, #4 - 802a3d2: 60fb str r3, [r7, #12] + 802a3f2: 687b ldr r3, [r7, #4] + 802a3f4: 681b ldr r3, [r3, #0] + 802a3f6: b2db uxtb r3, r3 + 802a3f8: 3b10 subs r3, #16 + 802a3fa: 4a27 ldr r2, [pc, #156] ; (802a498 ) + 802a3fc: fba2 2303 umull r2, r3, r2, r3 + 802a400: 091b lsrs r3, r3, #4 + 802a402: 60fb str r3, [r7, #12] /* lookup table for necessary bitshift of flags within status registers */ static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U}; hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U]; - 802a3d4: 68fb ldr r3, [r7, #12] - 802a3d6: f003 0307 and.w r3, r3, #7 - 802a3da: 4a24 ldr r2, [pc, #144] ; (802a46c ) - 802a3dc: 5cd3 ldrb r3, [r2, r3] - 802a3de: 461a mov r2, r3 - 802a3e0: 687b ldr r3, [r7, #4] - 802a3e2: 65da str r2, [r3, #92] ; 0x5c + 802a404: 68fb ldr r3, [r7, #12] + 802a406: f003 0307 and.w r3, r3, #7 + 802a40a: 4a24 ldr r2, [pc, #144] ; (802a49c ) + 802a40c: 5cd3 ldrb r3, [r2, r3] + 802a40e: 461a mov r2, r3 + 802a410: 687b ldr r3, [r7, #4] + 802a412: 65da str r2, [r3, #92] ; 0x5c if (stream_number > 3U) - 802a3e4: 68fb ldr r3, [r7, #12] - 802a3e6: 2b03 cmp r3, #3 - 802a3e8: d908 bls.n 802a3fc + 802a414: 68fb ldr r3, [r7, #12] + 802a416: 2b03 cmp r3, #3 + 802a418: d908 bls.n 802a42c { /* return pointer to HISR and HIFCR */ hdma->StreamBaseAddress = (((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)) + 4U); - 802a3ea: 687b ldr r3, [r7, #4] - 802a3ec: 681b ldr r3, [r3, #0] - 802a3ee: 461a mov r2, r3 - 802a3f0: 4b1f ldr r3, [pc, #124] ; (802a470 ) - 802a3f2: 4013 ands r3, r2 - 802a3f4: 1d1a adds r2, r3, #4 - 802a3f6: 687b ldr r3, [r7, #4] - 802a3f8: 659a str r2, [r3, #88] ; 0x58 - 802a3fa: e00d b.n 802a418 + 802a41a: 687b ldr r3, [r7, #4] + 802a41c: 681b ldr r3, [r3, #0] + 802a41e: 461a mov r2, r3 + 802a420: 4b1f ldr r3, [pc, #124] ; (802a4a0 ) + 802a422: 4013 ands r3, r2 + 802a424: 1d1a adds r2, r3, #4 + 802a426: 687b ldr r3, [r7, #4] + 802a428: 659a str r2, [r3, #88] ; 0x58 + 802a42a: e00d b.n 802a448 } else { /* return pointer to LISR and LIFCR */ hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)); - 802a3fc: 687b ldr r3, [r7, #4] - 802a3fe: 681b ldr r3, [r3, #0] - 802a400: 461a mov r2, r3 - 802a402: 4b1b ldr r3, [pc, #108] ; (802a470 ) - 802a404: 4013 ands r3, r2 - 802a406: 687a ldr r2, [r7, #4] - 802a408: 6593 str r3, [r2, #88] ; 0x58 - 802a40a: e005 b.n 802a418 + 802a42c: 687b ldr r3, [r7, #4] + 802a42e: 681b ldr r3, [r3, #0] + 802a430: 461a mov r2, r3 + 802a432: 4b1b ldr r3, [pc, #108] ; (802a4a0 ) + 802a434: 4013 ands r3, r2 + 802a436: 687a ldr r2, [r7, #4] + 802a438: 6593 str r3, [r2, #88] ; 0x58 + 802a43a: e005 b.n 802a448 } } else /* BDMA instance(s) */ { /* return pointer to ISR and IFCR */ hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0xFFU)); - 802a40c: 687b ldr r3, [r7, #4] - 802a40e: 681b ldr r3, [r3, #0] - 802a410: f023 02ff bic.w r2, r3, #255 ; 0xff - 802a414: 687b ldr r3, [r7, #4] - 802a416: 659a str r2, [r3, #88] ; 0x58 + 802a43c: 687b ldr r3, [r7, #4] + 802a43e: 681b ldr r3, [r3, #0] + 802a440: f023 02ff bic.w r2, r3, #255 ; 0xff + 802a444: 687b ldr r3, [r7, #4] + 802a446: 659a str r2, [r3, #88] ; 0x58 } return hdma->StreamBaseAddress; - 802a418: 687b ldr r3, [r7, #4] - 802a41a: 6d9b ldr r3, [r3, #88] ; 0x58 -} - 802a41c: 4618 mov r0, r3 - 802a41e: 3714 adds r7, #20 - 802a420: 46bd mov sp, r7 - 802a422: f85d 7b04 ldr.w r7, [sp], #4 - 802a426: 4770 bx lr - 802a428: 40020010 .word 0x40020010 - 802a42c: 40020028 .word 0x40020028 - 802a430: 40020040 .word 0x40020040 - 802a434: 40020058 .word 0x40020058 - 802a438: 40020070 .word 0x40020070 - 802a43c: 40020088 .word 0x40020088 - 802a440: 400200a0 .word 0x400200a0 - 802a444: 400200b8 .word 0x400200b8 - 802a448: 40020410 .word 0x40020410 - 802a44c: 40020428 .word 0x40020428 - 802a450: 40020440 .word 0x40020440 - 802a454: 40020458 .word 0x40020458 - 802a458: 40020470 .word 0x40020470 - 802a45c: 40020488 .word 0x40020488 - 802a460: 400204a0 .word 0x400204a0 - 802a464: 400204b8 .word 0x400204b8 - 802a468: aaaaaaab .word 0xaaaaaaab - 802a46c: 08044cb4 .word 0x08044cb4 - 802a470: fffffc00 .word 0xfffffc00 - -0802a474 : + 802a448: 687b ldr r3, [r7, #4] + 802a44a: 6d9b ldr r3, [r3, #88] ; 0x58 +} + 802a44c: 4618 mov r0, r3 + 802a44e: 3714 adds r7, #20 + 802a450: 46bd mov sp, r7 + 802a452: f85d 7b04 ldr.w r7, [sp], #4 + 802a456: 4770 bx lr + 802a458: 40020010 .word 0x40020010 + 802a45c: 40020028 .word 0x40020028 + 802a460: 40020040 .word 0x40020040 + 802a464: 40020058 .word 0x40020058 + 802a468: 40020070 .word 0x40020070 + 802a46c: 40020088 .word 0x40020088 + 802a470: 400200a0 .word 0x400200a0 + 802a474: 400200b8 .word 0x400200b8 + 802a478: 40020410 .word 0x40020410 + 802a47c: 40020428 .word 0x40020428 + 802a480: 40020440 .word 0x40020440 + 802a484: 40020458 .word 0x40020458 + 802a488: 40020470 .word 0x40020470 + 802a48c: 40020488 .word 0x40020488 + 802a490: 400204a0 .word 0x400204a0 + 802a494: 400204b8 .word 0x400204b8 + 802a498: aaaaaaab .word 0xaaaaaaab + 802a49c: 08044ce4 .word 0x08044ce4 + 802a4a0: fffffc00 .word 0xfffffc00 + +0802a4a4 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma) { - 802a474: b480 push {r7} - 802a476: b085 sub sp, #20 - 802a478: af00 add r7, sp, #0 - 802a47a: 6078 str r0, [r7, #4] + 802a4a4: b480 push {r7} + 802a4a6: b085 sub sp, #20 + 802a4a8: af00 add r7, sp, #0 + 802a4aa: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 802a47c: 2300 movs r3, #0 - 802a47e: 73fb strb r3, [r7, #15] + 802a4ac: 2300 movs r3, #0 + 802a4ae: 73fb strb r3, [r7, #15] /* Memory Data size equal to Byte */ if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE) - 802a480: 687b ldr r3, [r7, #4] - 802a482: 699b ldr r3, [r3, #24] - 802a484: 2b00 cmp r3, #0 - 802a486: d120 bne.n 802a4ca + 802a4b0: 687b ldr r3, [r7, #4] + 802a4b2: 699b ldr r3, [r3, #24] + 802a4b4: 2b00 cmp r3, #0 + 802a4b6: d120 bne.n 802a4fa { switch (hdma->Init.FIFOThreshold) - 802a488: 687b ldr r3, [r7, #4] - 802a48a: 6a9b ldr r3, [r3, #40] ; 0x28 - 802a48c: 2b03 cmp r3, #3 - 802a48e: d858 bhi.n 802a542 - 802a490: a201 add r2, pc, #4 ; (adr r2, 802a498 ) - 802a492: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 802a496: bf00 nop - 802a498: 0802a4a9 .word 0x0802a4a9 - 802a49c: 0802a4bb .word 0x0802a4bb - 802a4a0: 0802a4a9 .word 0x0802a4a9 - 802a4a4: 0802a543 .word 0x0802a543 + 802a4b8: 687b ldr r3, [r7, #4] + 802a4ba: 6a9b ldr r3, [r3, #40] ; 0x28 + 802a4bc: 2b03 cmp r3, #3 + 802a4be: d858 bhi.n 802a572 + 802a4c0: a201 add r2, pc, #4 ; (adr r2, 802a4c8 ) + 802a4c2: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 802a4c6: bf00 nop + 802a4c8: 0802a4d9 .word 0x0802a4d9 + 802a4cc: 0802a4eb .word 0x0802a4eb + 802a4d0: 0802a4d9 .word 0x0802a4d9 + 802a4d4: 0802a573 .word 0x0802a573 { case DMA_FIFO_THRESHOLD_1QUARTERFULL: case DMA_FIFO_THRESHOLD_3QUARTERSFULL: if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) - 802a4a8: 687b ldr r3, [r7, #4] - 802a4aa: 6adb ldr r3, [r3, #44] ; 0x2c - 802a4ac: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 802a4b0: 2b00 cmp r3, #0 - 802a4b2: d048 beq.n 802a546 + 802a4d8: 687b ldr r3, [r7, #4] + 802a4da: 6adb ldr r3, [r3, #44] ; 0x2c + 802a4dc: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 802a4e0: 2b00 cmp r3, #0 + 802a4e2: d048 beq.n 802a576 { status = HAL_ERROR; - 802a4b4: 2301 movs r3, #1 - 802a4b6: 73fb strb r3, [r7, #15] + 802a4e4: 2301 movs r3, #1 + 802a4e6: 73fb strb r3, [r7, #15] } break; - 802a4b8: e045 b.n 802a546 + 802a4e8: e045 b.n 802a576 case DMA_FIFO_THRESHOLD_HALFFULL: if (hdma->Init.MemBurst == DMA_MBURST_INC16) - 802a4ba: 687b ldr r3, [r7, #4] - 802a4bc: 6adb ldr r3, [r3, #44] ; 0x2c - 802a4be: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 - 802a4c2: d142 bne.n 802a54a + 802a4ea: 687b ldr r3, [r7, #4] + 802a4ec: 6adb ldr r3, [r3, #44] ; 0x2c + 802a4ee: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 + 802a4f2: d142 bne.n 802a57a { status = HAL_ERROR; - 802a4c4: 2301 movs r3, #1 - 802a4c6: 73fb strb r3, [r7, #15] + 802a4f4: 2301 movs r3, #1 + 802a4f6: 73fb strb r3, [r7, #15] } break; - 802a4c8: e03f b.n 802a54a + 802a4f8: e03f b.n 802a57a break; } } /* Memory Data size equal to Half-Word */ else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) - 802a4ca: 687b ldr r3, [r7, #4] - 802a4cc: 699b ldr r3, [r3, #24] - 802a4ce: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 802a4d2: d123 bne.n 802a51c + 802a4fa: 687b ldr r3, [r7, #4] + 802a4fc: 699b ldr r3, [r3, #24] + 802a4fe: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 802a502: d123 bne.n 802a54c { switch (hdma->Init.FIFOThreshold) - 802a4d4: 687b ldr r3, [r7, #4] - 802a4d6: 6a9b ldr r3, [r3, #40] ; 0x28 - 802a4d8: 2b03 cmp r3, #3 - 802a4da: d838 bhi.n 802a54e - 802a4dc: a201 add r2, pc, #4 ; (adr r2, 802a4e4 ) - 802a4de: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 802a4e2: bf00 nop - 802a4e4: 0802a4f5 .word 0x0802a4f5 - 802a4e8: 0802a4fb .word 0x0802a4fb - 802a4ec: 0802a4f5 .word 0x0802a4f5 - 802a4f0: 0802a50d .word 0x0802a50d + 802a504: 687b ldr r3, [r7, #4] + 802a506: 6a9b ldr r3, [r3, #40] ; 0x28 + 802a508: 2b03 cmp r3, #3 + 802a50a: d838 bhi.n 802a57e + 802a50c: a201 add r2, pc, #4 ; (adr r2, 802a514 ) + 802a50e: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 802a512: bf00 nop + 802a514: 0802a525 .word 0x0802a525 + 802a518: 0802a52b .word 0x0802a52b + 802a51c: 0802a525 .word 0x0802a525 + 802a520: 0802a53d .word 0x0802a53d { case DMA_FIFO_THRESHOLD_1QUARTERFULL: case DMA_FIFO_THRESHOLD_3QUARTERSFULL: status = HAL_ERROR; - 802a4f4: 2301 movs r3, #1 - 802a4f6: 73fb strb r3, [r7, #15] + 802a524: 2301 movs r3, #1 + 802a526: 73fb strb r3, [r7, #15] break; - 802a4f8: e030 b.n 802a55c + 802a528: e030 b.n 802a58c case DMA_FIFO_THRESHOLD_HALFFULL: if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) - 802a4fa: 687b ldr r3, [r7, #4] - 802a4fc: 6adb ldr r3, [r3, #44] ; 0x2c - 802a4fe: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 802a502: 2b00 cmp r3, #0 - 802a504: d025 beq.n 802a552 + 802a52a: 687b ldr r3, [r7, #4] + 802a52c: 6adb ldr r3, [r3, #44] ; 0x2c + 802a52e: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 802a532: 2b00 cmp r3, #0 + 802a534: d025 beq.n 802a582 { status = HAL_ERROR; - 802a506: 2301 movs r3, #1 - 802a508: 73fb strb r3, [r7, #15] + 802a536: 2301 movs r3, #1 + 802a538: 73fb strb r3, [r7, #15] } break; - 802a50a: e022 b.n 802a552 + 802a53a: e022 b.n 802a582 case DMA_FIFO_THRESHOLD_FULL: if (hdma->Init.MemBurst == DMA_MBURST_INC16) - 802a50c: 687b ldr r3, [r7, #4] - 802a50e: 6adb ldr r3, [r3, #44] ; 0x2c - 802a510: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 - 802a514: d11f bne.n 802a556 + 802a53c: 687b ldr r3, [r7, #4] + 802a53e: 6adb ldr r3, [r3, #44] ; 0x2c + 802a540: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 + 802a544: d11f bne.n 802a586 { status = HAL_ERROR; - 802a516: 2301 movs r3, #1 - 802a518: 73fb strb r3, [r7, #15] + 802a546: 2301 movs r3, #1 + 802a548: 73fb strb r3, [r7, #15] } break; - 802a51a: e01c b.n 802a556 + 802a54a: e01c b.n 802a586 } /* Memory Data size equal to Word */ else { switch (hdma->Init.FIFOThreshold) - 802a51c: 687b ldr r3, [r7, #4] - 802a51e: 6a9b ldr r3, [r3, #40] ; 0x28 - 802a520: 2b02 cmp r3, #2 - 802a522: d902 bls.n 802a52a - 802a524: 2b03 cmp r3, #3 - 802a526: d003 beq.n 802a530 + 802a54c: 687b ldr r3, [r7, #4] + 802a54e: 6a9b ldr r3, [r3, #40] ; 0x28 + 802a550: 2b02 cmp r3, #2 + 802a552: d902 bls.n 802a55a + 802a554: 2b03 cmp r3, #3 + 802a556: d003 beq.n 802a560 status = HAL_ERROR; } break; default: break; - 802a528: e018 b.n 802a55c + 802a558: e018 b.n 802a58c status = HAL_ERROR; - 802a52a: 2301 movs r3, #1 - 802a52c: 73fb strb r3, [r7, #15] + 802a55a: 2301 movs r3, #1 + 802a55c: 73fb strb r3, [r7, #15] break; - 802a52e: e015 b.n 802a55c + 802a55e: e015 b.n 802a58c if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) - 802a530: 687b ldr r3, [r7, #4] - 802a532: 6adb ldr r3, [r3, #44] ; 0x2c - 802a534: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 802a538: 2b00 cmp r3, #0 - 802a53a: d00e beq.n 802a55a + 802a560: 687b ldr r3, [r7, #4] + 802a562: 6adb ldr r3, [r3, #44] ; 0x2c + 802a564: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 802a568: 2b00 cmp r3, #0 + 802a56a: d00e beq.n 802a58a status = HAL_ERROR; - 802a53c: 2301 movs r3, #1 - 802a53e: 73fb strb r3, [r7, #15] + 802a56c: 2301 movs r3, #1 + 802a56e: 73fb strb r3, [r7, #15] break; - 802a540: e00b b.n 802a55a + 802a570: e00b b.n 802a58a break; - 802a542: bf00 nop - 802a544: e00a b.n 802a55c + 802a572: bf00 nop + 802a574: e00a b.n 802a58c break; - 802a546: bf00 nop - 802a548: e008 b.n 802a55c + 802a576: bf00 nop + 802a578: e008 b.n 802a58c break; - 802a54a: bf00 nop - 802a54c: e006 b.n 802a55c + 802a57a: bf00 nop + 802a57c: e006 b.n 802a58c break; - 802a54e: bf00 nop - 802a550: e004 b.n 802a55c + 802a57e: bf00 nop + 802a580: e004 b.n 802a58c break; - 802a552: bf00 nop - 802a554: e002 b.n 802a55c + 802a582: bf00 nop + 802a584: e002 b.n 802a58c break; - 802a556: bf00 nop - 802a558: e000 b.n 802a55c + 802a586: bf00 nop + 802a588: e000 b.n 802a58c break; - 802a55a: bf00 nop + 802a58a: bf00 nop } } return status; - 802a55c: 7bfb ldrb r3, [r7, #15] + 802a58c: 7bfb ldrb r3, [r7, #15] } - 802a55e: 4618 mov r0, r3 - 802a560: 3714 adds r7, #20 - 802a562: 46bd mov sp, r7 - 802a564: f85d 7b04 ldr.w r7, [sp], #4 - 802a568: 4770 bx lr - 802a56a: bf00 nop + 802a58e: 4618 mov r0, r3 + 802a590: 3714 adds r7, #20 + 802a592: 46bd mov sp, r7 + 802a594: f85d 7b04 ldr.w r7, [sp], #4 + 802a598: 4770 bx lr + 802a59a: bf00 nop -0802a56c : +0802a59c : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma) { - 802a56c: b480 push {r7} - 802a56e: b085 sub sp, #20 - 802a570: af00 add r7, sp, #0 - 802a572: 6078 str r0, [r7, #4] + 802a59c: b480 push {r7} + 802a59e: b085 sub sp, #20 + 802a5a0: af00 add r7, sp, #0 + 802a5a2: 6078 str r0, [r7, #4] uint32_t stream_number; uint32_t stream_baseaddress = (uint32_t)((uint32_t*)hdma->Instance); - 802a574: 687b ldr r3, [r7, #4] - 802a576: 681b ldr r3, [r3, #0] - 802a578: 60bb str r3, [r7, #8] + 802a5a4: 687b ldr r3, [r7, #4] + 802a5a6: 681b ldr r3, [r3, #0] + 802a5a8: 60bb str r3, [r7, #8] if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U) - 802a57a: 687b ldr r3, [r7, #4] - 802a57c: 681b ldr r3, [r3, #0] - 802a57e: 4a38 ldr r2, [pc, #224] ; (802a660 ) - 802a580: 4293 cmp r3, r2 - 802a582: d022 beq.n 802a5ca - 802a584: 687b ldr r3, [r7, #4] - 802a586: 681b ldr r3, [r3, #0] - 802a588: 4a36 ldr r2, [pc, #216] ; (802a664 ) - 802a58a: 4293 cmp r3, r2 - 802a58c: d01d beq.n 802a5ca - 802a58e: 687b ldr r3, [r7, #4] - 802a590: 681b ldr r3, [r3, #0] - 802a592: 4a35 ldr r2, [pc, #212] ; (802a668 ) - 802a594: 4293 cmp r3, r2 - 802a596: d018 beq.n 802a5ca - 802a598: 687b ldr r3, [r7, #4] - 802a59a: 681b ldr r3, [r3, #0] - 802a59c: 4a33 ldr r2, [pc, #204] ; (802a66c ) - 802a59e: 4293 cmp r3, r2 - 802a5a0: d013 beq.n 802a5ca - 802a5a2: 687b ldr r3, [r7, #4] - 802a5a4: 681b ldr r3, [r3, #0] - 802a5a6: 4a32 ldr r2, [pc, #200] ; (802a670 ) - 802a5a8: 4293 cmp r3, r2 - 802a5aa: d00e beq.n 802a5ca - 802a5ac: 687b ldr r3, [r7, #4] - 802a5ae: 681b ldr r3, [r3, #0] - 802a5b0: 4a30 ldr r2, [pc, #192] ; (802a674 ) - 802a5b2: 4293 cmp r3, r2 - 802a5b4: d009 beq.n 802a5ca - 802a5b6: 687b ldr r3, [r7, #4] - 802a5b8: 681b ldr r3, [r3, #0] - 802a5ba: 4a2f ldr r2, [pc, #188] ; (802a678 ) - 802a5bc: 4293 cmp r3, r2 - 802a5be: d004 beq.n 802a5ca - 802a5c0: 687b ldr r3, [r7, #4] - 802a5c2: 681b ldr r3, [r3, #0] - 802a5c4: 4a2d ldr r2, [pc, #180] ; (802a67c ) - 802a5c6: 4293 cmp r3, r2 - 802a5c8: d101 bne.n 802a5ce - 802a5ca: 2301 movs r3, #1 - 802a5cc: e000 b.n 802a5d0 - 802a5ce: 2300 movs r3, #0 - 802a5d0: 2b00 cmp r3, #0 - 802a5d2: d01a beq.n 802a60a + 802a5aa: 687b ldr r3, [r7, #4] + 802a5ac: 681b ldr r3, [r3, #0] + 802a5ae: 4a38 ldr r2, [pc, #224] ; (802a690 ) + 802a5b0: 4293 cmp r3, r2 + 802a5b2: d022 beq.n 802a5fa + 802a5b4: 687b ldr r3, [r7, #4] + 802a5b6: 681b ldr r3, [r3, #0] + 802a5b8: 4a36 ldr r2, [pc, #216] ; (802a694 ) + 802a5ba: 4293 cmp r3, r2 + 802a5bc: d01d beq.n 802a5fa + 802a5be: 687b ldr r3, [r7, #4] + 802a5c0: 681b ldr r3, [r3, #0] + 802a5c2: 4a35 ldr r2, [pc, #212] ; (802a698 ) + 802a5c4: 4293 cmp r3, r2 + 802a5c6: d018 beq.n 802a5fa + 802a5c8: 687b ldr r3, [r7, #4] + 802a5ca: 681b ldr r3, [r3, #0] + 802a5cc: 4a33 ldr r2, [pc, #204] ; (802a69c ) + 802a5ce: 4293 cmp r3, r2 + 802a5d0: d013 beq.n 802a5fa + 802a5d2: 687b ldr r3, [r7, #4] + 802a5d4: 681b ldr r3, [r3, #0] + 802a5d6: 4a32 ldr r2, [pc, #200] ; (802a6a0 ) + 802a5d8: 4293 cmp r3, r2 + 802a5da: d00e beq.n 802a5fa + 802a5dc: 687b ldr r3, [r7, #4] + 802a5de: 681b ldr r3, [r3, #0] + 802a5e0: 4a30 ldr r2, [pc, #192] ; (802a6a4 ) + 802a5e2: 4293 cmp r3, r2 + 802a5e4: d009 beq.n 802a5fa + 802a5e6: 687b ldr r3, [r7, #4] + 802a5e8: 681b ldr r3, [r3, #0] + 802a5ea: 4a2f ldr r2, [pc, #188] ; (802a6a8 ) + 802a5ec: 4293 cmp r3, r2 + 802a5ee: d004 beq.n 802a5fa + 802a5f0: 687b ldr r3, [r7, #4] + 802a5f2: 681b ldr r3, [r3, #0] + 802a5f4: 4a2d ldr r2, [pc, #180] ; (802a6ac ) + 802a5f6: 4293 cmp r3, r2 + 802a5f8: d101 bne.n 802a5fe + 802a5fa: 2301 movs r3, #1 + 802a5fc: e000 b.n 802a600 + 802a5fe: 2300 movs r3, #0 + 802a600: 2b00 cmp r3, #0 + 802a602: d01a beq.n 802a63a { /* BDMA Channels are connected to DMAMUX2 channels */ stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 8U) / 20U; - 802a5d4: 687b ldr r3, [r7, #4] - 802a5d6: 681b ldr r3, [r3, #0] - 802a5d8: b2db uxtb r3, r3 - 802a5da: 3b08 subs r3, #8 - 802a5dc: 4a28 ldr r2, [pc, #160] ; (802a680 ) - 802a5de: fba2 2303 umull r2, r3, r2, r3 - 802a5e2: 091b lsrs r3, r3, #4 - 802a5e4: 60fb str r3, [r7, #12] + 802a604: 687b ldr r3, [r7, #4] + 802a606: 681b ldr r3, [r3, #0] + 802a608: b2db uxtb r3, r3 + 802a60a: 3b08 subs r3, #8 + 802a60c: 4a28 ldr r2, [pc, #160] ; (802a6b0 ) + 802a60e: fba2 2303 umull r2, r3, r2, r3 + 802a612: 091b lsrs r3, r3, #4 + 802a614: 60fb str r3, [r7, #12] hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_Channel0) + (stream_number * 4U))); - 802a5e6: 68fa ldr r2, [r7, #12] - 802a5e8: 4b26 ldr r3, [pc, #152] ; (802a684 ) - 802a5ea: 4413 add r3, r2 - 802a5ec: 009b lsls r3, r3, #2 - 802a5ee: 461a mov r2, r3 - 802a5f0: 687b ldr r3, [r7, #4] - 802a5f2: 661a str r2, [r3, #96] ; 0x60 + 802a616: 68fa ldr r2, [r7, #12] + 802a618: 4b26 ldr r3, [pc, #152] ; (802a6b4 ) + 802a61a: 4413 add r3, r2 + 802a61c: 009b lsls r3, r3, #2 + 802a61e: 461a mov r2, r3 + 802a620: 687b ldr r3, [r7, #4] + 802a622: 661a str r2, [r3, #96] ; 0x60 hdma->DMAmuxChannelStatus = DMAMUX2_ChannelStatus; - 802a5f4: 687b ldr r3, [r7, #4] - 802a5f6: 4a24 ldr r2, [pc, #144] ; (802a688 ) - 802a5f8: 665a str r2, [r3, #100] ; 0x64 + 802a624: 687b ldr r3, [r7, #4] + 802a626: 4a24 ldr r2, [pc, #144] ; (802a6b8 ) + 802a628: 665a str r2, [r3, #100] ; 0x64 hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU); - 802a5fa: 68fb ldr r3, [r7, #12] - 802a5fc: f003 031f and.w r3, r3, #31 - 802a600: 2201 movs r2, #1 - 802a602: 409a lsls r2, r3 - 802a604: 687b ldr r3, [r7, #4] - 802a606: 669a str r2, [r3, #104] ; 0x68 + 802a62a: 68fb ldr r3, [r7, #12] + 802a62c: f003 031f and.w r3, r3, #31 + 802a630: 2201 movs r2, #1 + 802a632: 409a lsls r2, r3 + 802a634: 687b ldr r3, [r7, #4] + 802a636: 669a str r2, [r3, #104] ; 0x68 } hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U))); hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU); } } - 802a608: e024 b.n 802a654 + 802a638: e024 b.n 802a684 stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U; - 802a60a: 687b ldr r3, [r7, #4] - 802a60c: 681b ldr r3, [r3, #0] - 802a60e: b2db uxtb r3, r3 - 802a610: 3b10 subs r3, #16 - 802a612: 4a1e ldr r2, [pc, #120] ; (802a68c ) - 802a614: fba2 2303 umull r2, r3, r2, r3 - 802a618: 091b lsrs r3, r3, #4 - 802a61a: 60fb str r3, [r7, #12] + 802a63a: 687b ldr r3, [r7, #4] + 802a63c: 681b ldr r3, [r3, #0] + 802a63e: b2db uxtb r3, r3 + 802a640: 3b10 subs r3, #16 + 802a642: 4a1e ldr r2, [pc, #120] ; (802a6bc ) + 802a644: fba2 2303 umull r2, r3, r2, r3 + 802a648: 091b lsrs r3, r3, #4 + 802a64a: 60fb str r3, [r7, #12] if((stream_baseaddress <= ((uint32_t)DMA2_Stream7) ) && \ - 802a61c: 68bb ldr r3, [r7, #8] - 802a61e: 4a1c ldr r2, [pc, #112] ; (802a690 ) - 802a620: 4293 cmp r3, r2 - 802a622: d806 bhi.n 802a632 - 802a624: 68bb ldr r3, [r7, #8] - 802a626: 4a1b ldr r2, [pc, #108] ; (802a694 ) - 802a628: 4293 cmp r3, r2 - 802a62a: d902 bls.n 802a632 + 802a64c: 68bb ldr r3, [r7, #8] + 802a64e: 4a1c ldr r2, [pc, #112] ; (802a6c0 ) + 802a650: 4293 cmp r3, r2 + 802a652: d806 bhi.n 802a662 + 802a654: 68bb ldr r3, [r7, #8] + 802a656: 4a1b ldr r2, [pc, #108] ; (802a6c4 ) + 802a658: 4293 cmp r3, r2 + 802a65a: d902 bls.n 802a662 stream_number += 8U; - 802a62c: 68fb ldr r3, [r7, #12] - 802a62e: 3308 adds r3, #8 - 802a630: 60fb str r3, [r7, #12] + 802a65c: 68fb ldr r3, [r7, #12] + 802a65e: 3308 adds r3, #8 + 802a660: 60fb str r3, [r7, #12] hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U))); - 802a632: 68fa ldr r2, [r7, #12] - 802a634: 4b18 ldr r3, [pc, #96] ; (802a698 ) - 802a636: 4413 add r3, r2 - 802a638: 009b lsls r3, r3, #2 - 802a63a: 461a mov r2, r3 - 802a63c: 687b ldr r3, [r7, #4] - 802a63e: 661a str r2, [r3, #96] ; 0x60 + 802a662: 68fa ldr r2, [r7, #12] + 802a664: 4b18 ldr r3, [pc, #96] ; (802a6c8 ) + 802a666: 4413 add r3, r2 + 802a668: 009b lsls r3, r3, #2 + 802a66a: 461a mov r2, r3 + 802a66c: 687b ldr r3, [r7, #4] + 802a66e: 661a str r2, [r3, #96] ; 0x60 hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; - 802a640: 687b ldr r3, [r7, #4] - 802a642: 4a16 ldr r2, [pc, #88] ; (802a69c ) - 802a644: 665a str r2, [r3, #100] ; 0x64 + 802a670: 687b ldr r3, [r7, #4] + 802a672: 4a16 ldr r2, [pc, #88] ; (802a6cc ) + 802a674: 665a str r2, [r3, #100] ; 0x64 hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU); - 802a646: 68fb ldr r3, [r7, #12] - 802a648: f003 031f and.w r3, r3, #31 - 802a64c: 2201 movs r2, #1 - 802a64e: 409a lsls r2, r3 - 802a650: 687b ldr r3, [r7, #4] - 802a652: 669a str r2, [r3, #104] ; 0x68 -} - 802a654: bf00 nop - 802a656: 3714 adds r7, #20 - 802a658: 46bd mov sp, r7 - 802a65a: f85d 7b04 ldr.w r7, [sp], #4 - 802a65e: 4770 bx lr - 802a660: 58025408 .word 0x58025408 - 802a664: 5802541c .word 0x5802541c - 802a668: 58025430 .word 0x58025430 - 802a66c: 58025444 .word 0x58025444 - 802a670: 58025458 .word 0x58025458 - 802a674: 5802546c .word 0x5802546c - 802a678: 58025480 .word 0x58025480 - 802a67c: 58025494 .word 0x58025494 - 802a680: cccccccd .word 0xcccccccd - 802a684: 16009600 .word 0x16009600 - 802a688: 58025880 .word 0x58025880 - 802a68c: aaaaaaab .word 0xaaaaaaab - 802a690: 400204b8 .word 0x400204b8 - 802a694: 4002040f .word 0x4002040f - 802a698: 10008200 .word 0x10008200 - 802a69c: 40020880 .word 0x40020880 - -0802a6a0 : + 802a676: 68fb ldr r3, [r7, #12] + 802a678: f003 031f and.w r3, r3, #31 + 802a67c: 2201 movs r2, #1 + 802a67e: 409a lsls r2, r3 + 802a680: 687b ldr r3, [r7, #4] + 802a682: 669a str r2, [r3, #104] ; 0x68 +} + 802a684: bf00 nop + 802a686: 3714 adds r7, #20 + 802a688: 46bd mov sp, r7 + 802a68a: f85d 7b04 ldr.w r7, [sp], #4 + 802a68e: 4770 bx lr + 802a690: 58025408 .word 0x58025408 + 802a694: 5802541c .word 0x5802541c + 802a698: 58025430 .word 0x58025430 + 802a69c: 58025444 .word 0x58025444 + 802a6a0: 58025458 .word 0x58025458 + 802a6a4: 5802546c .word 0x5802546c + 802a6a8: 58025480 .word 0x58025480 + 802a6ac: 58025494 .word 0x58025494 + 802a6b0: cccccccd .word 0xcccccccd + 802a6b4: 16009600 .word 0x16009600 + 802a6b8: 58025880 .word 0x58025880 + 802a6bc: aaaaaaab .word 0xaaaaaaab + 802a6c0: 400204b8 .word 0x400204b8 + 802a6c4: 4002040f .word 0x4002040f + 802a6c8: 10008200 .word 0x10008200 + 802a6cc: 40020880 .word 0x40020880 + +0802a6d0 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma) { - 802a6a0: b480 push {r7} - 802a6a2: b085 sub sp, #20 - 802a6a4: af00 add r7, sp, #0 - 802a6a6: 6078 str r0, [r7, #4] + 802a6d0: b480 push {r7} + 802a6d2: b085 sub sp, #20 + 802a6d4: af00 add r7, sp, #0 + 802a6d6: 6078 str r0, [r7, #4] uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID; - 802a6a8: 687b ldr r3, [r7, #4] - 802a6aa: 685b ldr r3, [r3, #4] - 802a6ac: b2db uxtb r3, r3 - 802a6ae: 60fb str r3, [r7, #12] + 802a6d8: 687b ldr r3, [r7, #4] + 802a6da: 685b ldr r3, [r3, #4] + 802a6dc: b2db uxtb r3, r3 + 802a6de: 60fb str r3, [r7, #12] if((request >= DMA_REQUEST_GENERATOR0) && (request <= DMA_REQUEST_GENERATOR7)) - 802a6b0: 68fb ldr r3, [r7, #12] - 802a6b2: 2b00 cmp r3, #0 - 802a6b4: d04a beq.n 802a74c - 802a6b6: 68fb ldr r3, [r7, #12] - 802a6b8: 2b08 cmp r3, #8 - 802a6ba: d847 bhi.n 802a74c + 802a6e0: 68fb ldr r3, [r7, #12] + 802a6e2: 2b00 cmp r3, #0 + 802a6e4: d04a beq.n 802a77c + 802a6e6: 68fb ldr r3, [r7, #12] + 802a6e8: 2b08 cmp r3, #8 + 802a6ea: d847 bhi.n 802a77c { if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U) - 802a6bc: 687b ldr r3, [r7, #4] - 802a6be: 681b ldr r3, [r3, #0] - 802a6c0: 4a25 ldr r2, [pc, #148] ; (802a758 ) - 802a6c2: 4293 cmp r3, r2 - 802a6c4: d022 beq.n 802a70c - 802a6c6: 687b ldr r3, [r7, #4] - 802a6c8: 681b ldr r3, [r3, #0] - 802a6ca: 4a24 ldr r2, [pc, #144] ; (802a75c ) - 802a6cc: 4293 cmp r3, r2 - 802a6ce: d01d beq.n 802a70c - 802a6d0: 687b ldr r3, [r7, #4] - 802a6d2: 681b ldr r3, [r3, #0] - 802a6d4: 4a22 ldr r2, [pc, #136] ; (802a760 ) - 802a6d6: 4293 cmp r3, r2 - 802a6d8: d018 beq.n 802a70c - 802a6da: 687b ldr r3, [r7, #4] - 802a6dc: 681b ldr r3, [r3, #0] - 802a6de: 4a21 ldr r2, [pc, #132] ; (802a764 ) - 802a6e0: 4293 cmp r3, r2 - 802a6e2: d013 beq.n 802a70c - 802a6e4: 687b ldr r3, [r7, #4] - 802a6e6: 681b ldr r3, [r3, #0] - 802a6e8: 4a1f ldr r2, [pc, #124] ; (802a768 ) - 802a6ea: 4293 cmp r3, r2 - 802a6ec: d00e beq.n 802a70c - 802a6ee: 687b ldr r3, [r7, #4] - 802a6f0: 681b ldr r3, [r3, #0] - 802a6f2: 4a1e ldr r2, [pc, #120] ; (802a76c ) - 802a6f4: 4293 cmp r3, r2 - 802a6f6: d009 beq.n 802a70c - 802a6f8: 687b ldr r3, [r7, #4] - 802a6fa: 681b ldr r3, [r3, #0] - 802a6fc: 4a1c ldr r2, [pc, #112] ; (802a770 ) - 802a6fe: 4293 cmp r3, r2 - 802a700: d004 beq.n 802a70c - 802a702: 687b ldr r3, [r7, #4] - 802a704: 681b ldr r3, [r3, #0] - 802a706: 4a1b ldr r2, [pc, #108] ; (802a774 ) - 802a708: 4293 cmp r3, r2 - 802a70a: d101 bne.n 802a710 - 802a70c: 2301 movs r3, #1 - 802a70e: e000 b.n 802a712 - 802a710: 2300 movs r3, #0 - 802a712: 2b00 cmp r3, #0 - 802a714: d00a beq.n 802a72c + 802a6ec: 687b ldr r3, [r7, #4] + 802a6ee: 681b ldr r3, [r3, #0] + 802a6f0: 4a25 ldr r2, [pc, #148] ; (802a788 ) + 802a6f2: 4293 cmp r3, r2 + 802a6f4: d022 beq.n 802a73c + 802a6f6: 687b ldr r3, [r7, #4] + 802a6f8: 681b ldr r3, [r3, #0] + 802a6fa: 4a24 ldr r2, [pc, #144] ; (802a78c ) + 802a6fc: 4293 cmp r3, r2 + 802a6fe: d01d beq.n 802a73c + 802a700: 687b ldr r3, [r7, #4] + 802a702: 681b ldr r3, [r3, #0] + 802a704: 4a22 ldr r2, [pc, #136] ; (802a790 ) + 802a706: 4293 cmp r3, r2 + 802a708: d018 beq.n 802a73c + 802a70a: 687b ldr r3, [r7, #4] + 802a70c: 681b ldr r3, [r3, #0] + 802a70e: 4a21 ldr r2, [pc, #132] ; (802a794 ) + 802a710: 4293 cmp r3, r2 + 802a712: d013 beq.n 802a73c + 802a714: 687b ldr r3, [r7, #4] + 802a716: 681b ldr r3, [r3, #0] + 802a718: 4a1f ldr r2, [pc, #124] ; (802a798 ) + 802a71a: 4293 cmp r3, r2 + 802a71c: d00e beq.n 802a73c + 802a71e: 687b ldr r3, [r7, #4] + 802a720: 681b ldr r3, [r3, #0] + 802a722: 4a1e ldr r2, [pc, #120] ; (802a79c ) + 802a724: 4293 cmp r3, r2 + 802a726: d009 beq.n 802a73c + 802a728: 687b ldr r3, [r7, #4] + 802a72a: 681b ldr r3, [r3, #0] + 802a72c: 4a1c ldr r2, [pc, #112] ; (802a7a0 ) + 802a72e: 4293 cmp r3, r2 + 802a730: d004 beq.n 802a73c + 802a732: 687b ldr r3, [r7, #4] + 802a734: 681b ldr r3, [r3, #0] + 802a736: 4a1b ldr r2, [pc, #108] ; (802a7a4 ) + 802a738: 4293 cmp r3, r2 + 802a73a: d101 bne.n 802a740 + 802a73c: 2301 movs r3, #1 + 802a73e: e000 b.n 802a742 + 802a740: 2300 movs r3, #0 + 802a742: 2b00 cmp r3, #0 + 802a744: d00a beq.n 802a75c { /* BDMA Channels are connected to DMAMUX2 request generator blocks */ hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_RequestGenerator0) + ((request - 1U) * 4U))); - 802a716: 68fa ldr r2, [r7, #12] - 802a718: 4b17 ldr r3, [pc, #92] ; (802a778 ) - 802a71a: 4413 add r3, r2 - 802a71c: 009b lsls r3, r3, #2 - 802a71e: 461a mov r2, r3 - 802a720: 687b ldr r3, [r7, #4] - 802a722: 66da str r2, [r3, #108] ; 0x6c + 802a746: 68fa ldr r2, [r7, #12] + 802a748: 4b17 ldr r3, [pc, #92] ; (802a7a8 ) + 802a74a: 4413 add r3, r2 + 802a74c: 009b lsls r3, r3, #2 + 802a74e: 461a mov r2, r3 + 802a750: 687b ldr r3, [r7, #4] + 802a752: 66da str r2, [r3, #108] ; 0x6c hdma->DMAmuxRequestGenStatus = DMAMUX2_RequestGenStatus; - 802a724: 687b ldr r3, [r7, #4] - 802a726: 4a15 ldr r2, [pc, #84] ; (802a77c ) - 802a728: 671a str r2, [r3, #112] ; 0x70 - 802a72a: e009 b.n 802a740 + 802a754: 687b ldr r3, [r7, #4] + 802a756: 4a15 ldr r2, [pc, #84] ; (802a7ac ) + 802a758: 671a str r2, [r3, #112] ; 0x70 + 802a75a: e009 b.n 802a770 } else { /* DMA1 and DMA2 Streams use DMAMUX1 request generator blocks */ hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U))); - 802a72c: 68fa ldr r2, [r7, #12] - 802a72e: 4b14 ldr r3, [pc, #80] ; (802a780 ) - 802a730: 4413 add r3, r2 - 802a732: 009b lsls r3, r3, #2 - 802a734: 461a mov r2, r3 - 802a736: 687b ldr r3, [r7, #4] - 802a738: 66da str r2, [r3, #108] ; 0x6c + 802a75c: 68fa ldr r2, [r7, #12] + 802a75e: 4b14 ldr r3, [pc, #80] ; (802a7b0 ) + 802a760: 4413 add r3, r2 + 802a762: 009b lsls r3, r3, #2 + 802a764: 461a mov r2, r3 + 802a766: 687b ldr r3, [r7, #4] + 802a768: 66da str r2, [r3, #108] ; 0x6c hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus; - 802a73a: 687b ldr r3, [r7, #4] - 802a73c: 4a11 ldr r2, [pc, #68] ; (802a784 ) - 802a73e: 671a str r2, [r3, #112] ; 0x70 + 802a76a: 687b ldr r3, [r7, #4] + 802a76c: 4a11 ldr r2, [pc, #68] ; (802a7b4 ) + 802a76e: 671a str r2, [r3, #112] ; 0x70 } hdma->DMAmuxRequestGenStatusMask = 1UL << (request - 1U); - 802a740: 68fb ldr r3, [r7, #12] - 802a742: 3b01 subs r3, #1 - 802a744: 2201 movs r2, #1 - 802a746: 409a lsls r2, r3 - 802a748: 687b ldr r3, [r7, #4] - 802a74a: 675a str r2, [r3, #116] ; 0x74 - } -} - 802a74c: bf00 nop - 802a74e: 3714 adds r7, #20 - 802a750: 46bd mov sp, r7 - 802a752: f85d 7b04 ldr.w r7, [sp], #4 - 802a756: 4770 bx lr - 802a758: 58025408 .word 0x58025408 - 802a75c: 5802541c .word 0x5802541c - 802a760: 58025430 .word 0x58025430 - 802a764: 58025444 .word 0x58025444 - 802a768: 58025458 .word 0x58025458 - 802a76c: 5802546c .word 0x5802546c - 802a770: 58025480 .word 0x58025480 - 802a774: 58025494 .word 0x58025494 - 802a778: 1600963f .word 0x1600963f - 802a77c: 58025940 .word 0x58025940 - 802a780: 1000823f .word 0x1000823f - 802a784: 40020940 .word 0x40020940 - -0802a788 : + 802a770: 68fb ldr r3, [r7, #12] + 802a772: 3b01 subs r3, #1 + 802a774: 2201 movs r2, #1 + 802a776: 409a lsls r2, r3 + 802a778: 687b ldr r3, [r7, #4] + 802a77a: 675a str r2, [r3, #116] ; 0x74 + } +} + 802a77c: bf00 nop + 802a77e: 3714 adds r7, #20 + 802a780: 46bd mov sp, r7 + 802a782: f85d 7b04 ldr.w r7, [sp], #4 + 802a786: 4770 bx lr + 802a788: 58025408 .word 0x58025408 + 802a78c: 5802541c .word 0x5802541c + 802a790: 58025430 .word 0x58025430 + 802a794: 58025444 .word 0x58025444 + 802a798: 58025458 .word 0x58025458 + 802a79c: 5802546c .word 0x5802546c + 802a7a0: 58025480 .word 0x58025480 + 802a7a4: 58025494 .word 0x58025494 + 802a7a8: 1600963f .word 0x1600963f + 802a7ac: 58025940 .word 0x58025940 + 802a7b0: 1000823f .word 0x1000823f + 802a7b4: 40020940 .word 0x40020940 + +0802a7b8 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth) { - 802a788: b580 push {r7, lr} - 802a78a: b084 sub sp, #16 - 802a78c: af00 add r7, sp, #0 - 802a78e: 6078 str r0, [r7, #4] + 802a7b8: b580 push {r7, lr} + 802a7ba: b084 sub sp, #16 + 802a7bc: af00 add r7, sp, #0 + 802a7be: 6078 str r0, [r7, #4] uint32_t tickstart; if (heth == NULL) - 802a790: 687b ldr r3, [r7, #4] - 802a792: 2b00 cmp r3, #0 - 802a794: d101 bne.n 802a79a + 802a7c0: 687b ldr r3, [r7, #4] + 802a7c2: 2b00 cmp r3, #0 + 802a7c4: d101 bne.n 802a7ca { return HAL_ERROR; - 802a796: 2301 movs r3, #1 - 802a798: e0cf b.n 802a93a + 802a7c6: 2301 movs r3, #1 + 802a7c8: e0cf b.n 802a96a } if (heth->gState == HAL_ETH_STATE_RESET) - 802a79a: 687b ldr r3, [r7, #4] - 802a79c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802a7a0: 2b00 cmp r3, #0 - 802a7a2: d106 bne.n 802a7b2 + 802a7ca: 687b ldr r3, [r7, #4] + 802a7cc: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802a7d0: 2b00 cmp r3, #0 + 802a7d2: d106 bne.n 802a7e2 { heth->gState = HAL_ETH_STATE_BUSY; - 802a7a4: 687b ldr r3, [r7, #4] - 802a7a6: 2223 movs r2, #35 ; 0x23 - 802a7a8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802a7d4: 687b ldr r3, [r7, #4] + 802a7d6: 2223 movs r2, #35 ; 0x23 + 802a7d8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Init the low level hardware */ heth->MspInitCallback(heth); #else /* Init the low level hardware : GPIO, CLOCK, NVIC. */ HAL_ETH_MspInit(heth); - 802a7ac: 6878 ldr r0, [r7, #4] - 802a7ae: f00b f955 bl 8035a5c + 802a7dc: 6878 ldr r0, [r7, #4] + 802a7de: f00b f955 bl 8035a8c #endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */ } __HAL_RCC_SYSCFG_CLK_ENABLE(); - 802a7b2: 4b64 ldr r3, [pc, #400] ; (802a944 ) - 802a7b4: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 802a7b8: 4a62 ldr r2, [pc, #392] ; (802a944 ) - 802a7ba: f043 0302 orr.w r3, r3, #2 - 802a7be: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 - 802a7c2: 4b60 ldr r3, [pc, #384] ; (802a944 ) - 802a7c4: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 802a7c8: f003 0302 and.w r3, r3, #2 - 802a7cc: 60bb str r3, [r7, #8] - 802a7ce: 68bb ldr r3, [r7, #8] + 802a7e2: 4b64 ldr r3, [pc, #400] ; (802a974 ) + 802a7e4: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 802a7e8: 4a62 ldr r2, [pc, #392] ; (802a974 ) + 802a7ea: f043 0302 orr.w r3, r3, #2 + 802a7ee: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 + 802a7f2: 4b60 ldr r3, [pc, #384] ; (802a974 ) + 802a7f4: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 802a7f8: f003 0302 and.w r3, r3, #2 + 802a7fc: 60bb str r3, [r7, #8] + 802a7fe: 68bb ldr r3, [r7, #8] if (heth->Init.MediaInterface == HAL_ETH_MII_MODE) - 802a7d0: 687b ldr r3, [r7, #4] - 802a7d2: 7a1b ldrb r3, [r3, #8] - 802a7d4: 2b00 cmp r3, #0 - 802a7d6: d103 bne.n 802a7e0 + 802a800: 687b ldr r3, [r7, #4] + 802a802: 7a1b ldrb r3, [r3, #8] + 802a804: 2b00 cmp r3, #0 + 802a806: d103 bne.n 802a810 { HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_MII); - 802a7d8: 2000 movs r0, #0 - 802a7da: f7fb fc17 bl 802600c - 802a7de: e003 b.n 802a7e8 + 802a808: 2000 movs r0, #0 + 802a80a: f7fb fc17 bl 802603c + 802a80e: e003 b.n 802a818 } else { HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_RMII); - 802a7e0: f44f 0000 mov.w r0, #8388608 ; 0x800000 - 802a7e4: f7fb fc12 bl 802600c + 802a810: f44f 0000 mov.w r0, #8388608 ; 0x800000 + 802a814: f7fb fc12 bl 802603c } /* Dummy read to sync with ETH */ (void)SYSCFG->PMCR; - 802a7e8: 4b57 ldr r3, [pc, #348] ; (802a948 ) - 802a7ea: 685b ldr r3, [r3, #4] + 802a818: 4b57 ldr r3, [pc, #348] ; (802a978 ) + 802a81a: 685b ldr r3, [r3, #4] /* Ethernet Software reset */ /* Set the SWR bit: resets all MAC subsystem internal registers and logic */ /* After reset all the registers holds their respective reset values */ SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR); - 802a7ec: 687b ldr r3, [r7, #4] - 802a7ee: 681b ldr r3, [r3, #0] - 802a7f0: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a7f4: 681b ldr r3, [r3, #0] - 802a7f6: 687a ldr r2, [r7, #4] - 802a7f8: 6812 ldr r2, [r2, #0] - 802a7fa: f043 0301 orr.w r3, r3, #1 - 802a7fe: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a802: 6013 str r3, [r2, #0] + 802a81c: 687b ldr r3, [r7, #4] + 802a81e: 681b ldr r3, [r3, #0] + 802a820: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802a824: 681b ldr r3, [r3, #0] + 802a826: 687a ldr r2, [r7, #4] + 802a828: 6812 ldr r2, [r2, #0] + 802a82a: f043 0301 orr.w r3, r3, #1 + 802a82e: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802a832: 6013 str r3, [r2, #0] /* Get tick */ tickstart = HAL_GetTick(); - 802a804: f7fb fbc6 bl 8025f94 - 802a808: 60f8 str r0, [r7, #12] + 802a834: f7fb fbc6 bl 8025fc4 + 802a838: 60f8 str r0, [r7, #12] /* Wait for software reset */ while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U) - 802a80a: e011 b.n 802a830 + 802a83a: e011 b.n 802a860 { if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT)) - 802a80c: f7fb fbc2 bl 8025f94 - 802a810: 4602 mov r2, r0 - 802a812: 68fb ldr r3, [r7, #12] - 802a814: 1ad3 subs r3, r2, r3 - 802a816: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 - 802a81a: d909 bls.n 802a830 + 802a83c: f7fb fbc2 bl 8025fc4 + 802a840: 4602 mov r2, r0 + 802a842: 68fb ldr r3, [r7, #12] + 802a844: 1ad3 subs r3, r2, r3 + 802a846: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 + 802a84a: d909 bls.n 802a860 { /* Set Error Code */ heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT; - 802a81c: 687b ldr r3, [r7, #4] - 802a81e: 2204 movs r2, #4 - 802a820: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802a84c: 687b ldr r3, [r7, #4] + 802a84e: 2204 movs r2, #4 + 802a850: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Set State as Error */ heth->gState = HAL_ETH_STATE_ERROR; - 802a824: 687b ldr r3, [r7, #4] - 802a826: 22e0 movs r2, #224 ; 0xe0 - 802a828: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802a854: 687b ldr r3, [r7, #4] + 802a856: 22e0 movs r2, #224 ; 0xe0 + 802a858: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Return Error */ return HAL_ERROR; - 802a82c: 2301 movs r3, #1 - 802a82e: e084 b.n 802a93a + 802a85c: 2301 movs r3, #1 + 802a85e: e084 b.n 802a96a while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U) - 802a830: 687b ldr r3, [r7, #4] - 802a832: 681b ldr r3, [r3, #0] - 802a834: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a838: 681b ldr r3, [r3, #0] - 802a83a: f003 0301 and.w r3, r3, #1 - 802a83e: 2b00 cmp r3, #0 - 802a840: d1e4 bne.n 802a80c + 802a860: 687b ldr r3, [r7, #4] + 802a862: 681b ldr r3, [r3, #0] + 802a864: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802a868: 681b ldr r3, [r3, #0] + 802a86a: f003 0301 and.w r3, r3, #1 + 802a86e: 2b00 cmp r3, #0 + 802a870: d1e4 bne.n 802a83c } } /*------------------ MDIO CSR Clock Range Configuration --------------------*/ HAL_ETH_SetMDIOClockRange(heth); - 802a842: 6878 ldr r0, [r7, #4] - 802a844: f000 fee0 bl 802b608 + 802a872: 6878 ldr r0, [r7, #4] + 802a874: f000 fee0 bl 802b638 /*------------------ MAC LPI 1US Tic Counter Configuration --------------------*/ WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U)); - 802a848: f005 fa3e bl 802fcc8 - 802a84c: 4603 mov r3, r0 - 802a84e: 4a3f ldr r2, [pc, #252] ; (802a94c ) - 802a850: fba2 2303 umull r2, r3, r2, r3 - 802a854: 0c9a lsrs r2, r3, #18 - 802a856: 687b ldr r3, [r7, #4] - 802a858: 681b ldr r3, [r3, #0] - 802a85a: 3a01 subs r2, #1 - 802a85c: f8c3 20dc str.w r2, [r3, #220] ; 0xdc + 802a878: f005 fa3e bl 802fcf8 + 802a87c: 4603 mov r3, r0 + 802a87e: 4a3f ldr r2, [pc, #252] ; (802a97c ) + 802a880: fba2 2303 umull r2, r3, r2, r3 + 802a884: 0c9a lsrs r2, r3, #18 + 802a886: 687b ldr r3, [r7, #4] + 802a888: 681b ldr r3, [r3, #0] + 802a88a: 3a01 subs r2, #1 + 802a88c: f8c3 20dc str.w r2, [r3, #220] ; 0xdc /*------------------ MAC, MTL and DMA default Configuration ----------------*/ ETH_MACDMAConfig(heth); - 802a860: 6878 ldr r0, [r7, #4] - 802a862: f001 f8cb bl 802b9fc + 802a890: 6878 ldr r0, [r7, #4] + 802a892: f001 f8cb bl 802ba2c /* SET DSL to 64 bit */ MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT); - 802a866: 687b ldr r3, [r7, #4] - 802a868: 681b ldr r3, [r3, #0] - 802a86a: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a86e: f8d3 3100 ldr.w r3, [r3, #256] ; 0x100 - 802a872: f423 13e0 bic.w r3, r3, #1835008 ; 0x1c0000 - 802a876: 687a ldr r2, [r7, #4] - 802a878: 6812 ldr r2, [r2, #0] - 802a87a: f443 2300 orr.w r3, r3, #524288 ; 0x80000 - 802a87e: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a882: f8c2 3100 str.w r3, [r2, #256] ; 0x100 + 802a896: 687b ldr r3, [r7, #4] + 802a898: 681b ldr r3, [r3, #0] + 802a89a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802a89e: f8d3 3100 ldr.w r3, [r3, #256] ; 0x100 + 802a8a2: f423 13e0 bic.w r3, r3, #1835008 ; 0x1c0000 + 802a8a6: 687a ldr r2, [r7, #4] + 802a8a8: 6812 ldr r2, [r2, #0] + 802a8aa: f443 2300 orr.w r3, r3, #524288 ; 0x80000 + 802a8ae: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802a8b2: f8c2 3100 str.w r3, [r2, #256] ; 0x100 /* Set Receive Buffers Length (must be a multiple of 4) */ if ((heth->Init.RxBuffLen % 0x4U) != 0x0U) - 802a886: 687b ldr r3, [r7, #4] - 802a888: 695b ldr r3, [r3, #20] - 802a88a: f003 0303 and.w r3, r3, #3 - 802a88e: 2b00 cmp r3, #0 - 802a890: d009 beq.n 802a8a6 + 802a8b6: 687b ldr r3, [r7, #4] + 802a8b8: 695b ldr r3, [r3, #20] + 802a8ba: f003 0303 and.w r3, r3, #3 + 802a8be: 2b00 cmp r3, #0 + 802a8c0: d009 beq.n 802a8d6 { /* Set Error Code */ heth->ErrorCode = HAL_ETH_ERROR_PARAM; - 802a892: 687b ldr r3, [r7, #4] - 802a894: 2201 movs r2, #1 - 802a896: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802a8c2: 687b ldr r3, [r7, #4] + 802a8c4: 2201 movs r2, #1 + 802a8c6: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Set State as Error */ heth->gState = HAL_ETH_STATE_ERROR; - 802a89a: 687b ldr r3, [r7, #4] - 802a89c: 22e0 movs r2, #224 ; 0xe0 - 802a89e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802a8ca: 687b ldr r3, [r7, #4] + 802a8cc: 22e0 movs r2, #224 ; 0xe0 + 802a8ce: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Return Error */ return HAL_ERROR; - 802a8a2: 2301 movs r3, #1 - 802a8a4: e049 b.n 802a93a + 802a8d2: 2301 movs r3, #1 + 802a8d4: e049 b.n 802a96a } else { MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1)); - 802a8a6: 687b ldr r3, [r7, #4] - 802a8a8: 681b ldr r3, [r3, #0] - 802a8aa: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a8ae: f8d3 2108 ldr.w r2, [r3, #264] ; 0x108 - 802a8b2: 4b27 ldr r3, [pc, #156] ; (802a950 ) - 802a8b4: 4013 ands r3, r2 - 802a8b6: 687a ldr r2, [r7, #4] - 802a8b8: 6952 ldr r2, [r2, #20] - 802a8ba: 0051 lsls r1, r2, #1 - 802a8bc: 687a ldr r2, [r7, #4] - 802a8be: 6812 ldr r2, [r2, #0] - 802a8c0: 430b orrs r3, r1 - 802a8c2: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a8c6: f8c2 3108 str.w r3, [r2, #264] ; 0x108 + 802a8d6: 687b ldr r3, [r7, #4] + 802a8d8: 681b ldr r3, [r3, #0] + 802a8da: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802a8de: f8d3 2108 ldr.w r2, [r3, #264] ; 0x108 + 802a8e2: 4b27 ldr r3, [pc, #156] ; (802a980 ) + 802a8e4: 4013 ands r3, r2 + 802a8e6: 687a ldr r2, [r7, #4] + 802a8e8: 6952 ldr r2, [r2, #20] + 802a8ea: 0051 lsls r1, r2, #1 + 802a8ec: 687a ldr r2, [r7, #4] + 802a8ee: 6812 ldr r2, [r2, #0] + 802a8f0: 430b orrs r3, r1 + 802a8f2: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802a8f6: f8c2 3108 str.w r3, [r2, #264] ; 0x108 } /*------------------ DMA Tx Descriptors Configuration ----------------------*/ ETH_DMATxDescListInit(heth); - 802a8ca: 6878 ldr r0, [r7, #4] - 802a8cc: f001 f933 bl 802bb36 + 802a8fa: 6878 ldr r0, [r7, #4] + 802a8fc: f001 f933 bl 802bb66 /*------------------ DMA Rx Descriptors Configuration ----------------------*/ ETH_DMARxDescListInit(heth); - 802a8d0: 6878 ldr r0, [r7, #4] - 802a8d2: f001 f979 bl 802bbc8 + 802a900: 6878 ldr r0, [r7, #4] + 802a902: f001 f979 bl 802bbf8 /*--------------------- ETHERNET MAC Address Configuration ------------------*/ /* Set MAC addr bits 32 to 47 */ heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr[4]); - 802a8d6: 687b ldr r3, [r7, #4] - 802a8d8: 685b ldr r3, [r3, #4] - 802a8da: 3305 adds r3, #5 - 802a8dc: 781b ldrb r3, [r3, #0] - 802a8de: 021a lsls r2, r3, #8 - 802a8e0: 687b ldr r3, [r7, #4] - 802a8e2: 685b ldr r3, [r3, #4] - 802a8e4: 3304 adds r3, #4 - 802a8e6: 781b ldrb r3, [r3, #0] - 802a8e8: 4619 mov r1, r3 - 802a8ea: 687b ldr r3, [r7, #4] - 802a8ec: 681b ldr r3, [r3, #0] - 802a8ee: 430a orrs r2, r1 - 802a8f0: f8c3 2300 str.w r2, [r3, #768] ; 0x300 + 802a906: 687b ldr r3, [r7, #4] + 802a908: 685b ldr r3, [r3, #4] + 802a90a: 3305 adds r3, #5 + 802a90c: 781b ldrb r3, [r3, #0] + 802a90e: 021a lsls r2, r3, #8 + 802a910: 687b ldr r3, [r7, #4] + 802a912: 685b ldr r3, [r3, #4] + 802a914: 3304 adds r3, #4 + 802a916: 781b ldrb r3, [r3, #0] + 802a918: 4619 mov r1, r3 + 802a91a: 687b ldr r3, [r7, #4] + 802a91c: 681b ldr r3, [r3, #0] + 802a91e: 430a orrs r2, r1 + 802a920: f8c3 2300 str.w r2, [r3, #768] ; 0x300 /* Set MAC addr bits 0 to 31 */ heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) | - 802a8f4: 687b ldr r3, [r7, #4] - 802a8f6: 685b ldr r3, [r3, #4] - 802a8f8: 3303 adds r3, #3 - 802a8fa: 781b ldrb r3, [r3, #0] - 802a8fc: 061a lsls r2, r3, #24 - 802a8fe: 687b ldr r3, [r7, #4] - 802a900: 685b ldr r3, [r3, #4] - 802a902: 3302 adds r3, #2 - 802a904: 781b ldrb r3, [r3, #0] - 802a906: 041b lsls r3, r3, #16 - 802a908: 431a orrs r2, r3 + 802a924: 687b ldr r3, [r7, #4] + 802a926: 685b ldr r3, [r3, #4] + 802a928: 3303 adds r3, #3 + 802a92a: 781b ldrb r3, [r3, #0] + 802a92c: 061a lsls r2, r3, #24 + 802a92e: 687b ldr r3, [r7, #4] + 802a930: 685b ldr r3, [r3, #4] + 802a932: 3302 adds r3, #2 + 802a934: 781b ldrb r3, [r3, #0] + 802a936: 041b lsls r3, r3, #16 + 802a938: 431a orrs r2, r3 ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]); - 802a90a: 687b ldr r3, [r7, #4] - 802a90c: 685b ldr r3, [r3, #4] - 802a90e: 3301 adds r3, #1 - 802a910: 781b ldrb r3, [r3, #0] - 802a912: 021b lsls r3, r3, #8 + 802a93a: 687b ldr r3, [r7, #4] + 802a93c: 685b ldr r3, [r3, #4] + 802a93e: 3301 adds r3, #1 + 802a940: 781b ldrb r3, [r3, #0] + 802a942: 021b lsls r3, r3, #8 heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) | - 802a914: 431a orrs r2, r3 + 802a944: 431a orrs r2, r3 ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]); - 802a916: 687b ldr r3, [r7, #4] - 802a918: 685b ldr r3, [r3, #4] - 802a91a: 781b ldrb r3, [r3, #0] - 802a91c: 4619 mov r1, r3 + 802a946: 687b ldr r3, [r7, #4] + 802a948: 685b ldr r3, [r3, #4] + 802a94a: 781b ldrb r3, [r3, #0] + 802a94c: 4619 mov r1, r3 heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) | - 802a91e: 687b ldr r3, [r7, #4] - 802a920: 681b ldr r3, [r3, #0] + 802a94e: 687b ldr r3, [r7, #4] + 802a950: 681b ldr r3, [r3, #0] ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]); - 802a922: 430a orrs r2, r1 + 802a952: 430a orrs r2, r1 heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) | - 802a924: f8c3 2304 str.w r2, [r3, #772] ; 0x304 + 802a954: f8c3 2304 str.w r2, [r3, #772] ; 0x304 heth->ErrorCode = HAL_ETH_ERROR_NONE; - 802a928: 687b ldr r3, [r7, #4] - 802a92a: 2200 movs r2, #0 - 802a92c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802a958: 687b ldr r3, [r7, #4] + 802a95a: 2200 movs r2, #0 + 802a95c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 heth->gState = HAL_ETH_STATE_READY; - 802a930: 687b ldr r3, [r7, #4] - 802a932: 2210 movs r2, #16 - 802a934: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802a960: 687b ldr r3, [r7, #4] + 802a962: 2210 movs r2, #16 + 802a964: f8c3 2084 str.w r2, [r3, #132] ; 0x84 return HAL_OK; - 802a938: 2300 movs r3, #0 -} - 802a93a: 4618 mov r0, r3 - 802a93c: 3710 adds r7, #16 - 802a93e: 46bd mov sp, r7 - 802a940: bd80 pop {r7, pc} - 802a942: bf00 nop - 802a944: 58024400 .word 0x58024400 - 802a948: 58000400 .word 0x58000400 - 802a94c: 431bde83 .word 0x431bde83 - 802a950: ffff8001 .word 0xffff8001 - -0802a954 : + 802a968: 2300 movs r3, #0 +} + 802a96a: 4618 mov r0, r3 + 802a96c: 3710 adds r7, #16 + 802a96e: 46bd mov sp, r7 + 802a970: bd80 pop {r7, pc} + 802a972: bf00 nop + 802a974: 58024400 .word 0x58024400 + 802a978: 58000400 .word 0x58000400 + 802a97c: 431bde83 .word 0x431bde83 + 802a980: ffff8001 .word 0xffff8001 + +0802a984 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth) { - 802a954: b580 push {r7, lr} - 802a956: b082 sub sp, #8 - 802a958: af00 add r7, sp, #0 - 802a95a: 6078 str r0, [r7, #4] + 802a984: b580 push {r7, lr} + 802a986: b082 sub sp, #8 + 802a988: af00 add r7, sp, #0 + 802a98a: 6078 str r0, [r7, #4] if (heth->gState == HAL_ETH_STATE_READY) - 802a95c: 687b ldr r3, [r7, #4] - 802a95e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802a962: 2b10 cmp r3, #16 - 802a964: d153 bne.n 802aa0e + 802a98c: 687b ldr r3, [r7, #4] + 802a98e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802a992: 2b10 cmp r3, #16 + 802a994: d153 bne.n 802aa3e { heth->gState = HAL_ETH_STATE_BUSY; - 802a966: 687b ldr r3, [r7, #4] - 802a968: 2223 movs r2, #35 ; 0x23 - 802a96a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802a996: 687b ldr r3, [r7, #4] + 802a998: 2223 movs r2, #35 ; 0x23 + 802a99a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Set nombre of descriptors to build */ heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT; - 802a96e: 687b ldr r3, [r7, #4] - 802a970: 2204 movs r2, #4 - 802a972: 66da str r2, [r3, #108] ; 0x6c + 802a99e: 687b ldr r3, [r7, #4] + 802a9a0: 2204 movs r2, #4 + 802a9a2: 66da str r2, [r3, #108] ; 0x6c /* Build all descriptors */ ETH_UpdateDescriptor(heth); - 802a974: 6878 ldr r0, [r7, #4] - 802a976: f000 f9f6 bl 802ad66 + 802a9a4: 6878 ldr r0, [r7, #4] + 802a9a6: f000 f9f6 bl 802ad96 /* Enable the MAC transmission */ SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE); - 802a97a: 687b ldr r3, [r7, #4] - 802a97c: 681b ldr r3, [r3, #0] - 802a97e: 681a ldr r2, [r3, #0] - 802a980: 687b ldr r3, [r7, #4] - 802a982: 681b ldr r3, [r3, #0] - 802a984: f042 0202 orr.w r2, r2, #2 - 802a988: 601a str r2, [r3, #0] + 802a9aa: 687b ldr r3, [r7, #4] + 802a9ac: 681b ldr r3, [r3, #0] + 802a9ae: 681a ldr r2, [r3, #0] + 802a9b0: 687b ldr r3, [r7, #4] + 802a9b2: 681b ldr r3, [r3, #0] + 802a9b4: f042 0202 orr.w r2, r2, #2 + 802a9b8: 601a str r2, [r3, #0] /* Enable the MAC reception */ SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); - 802a98a: 687b ldr r3, [r7, #4] - 802a98c: 681b ldr r3, [r3, #0] - 802a98e: 681a ldr r2, [r3, #0] - 802a990: 687b ldr r3, [r7, #4] - 802a992: 681b ldr r3, [r3, #0] - 802a994: f042 0201 orr.w r2, r2, #1 - 802a998: 601a str r2, [r3, #0] + 802a9ba: 687b ldr r3, [r7, #4] + 802a9bc: 681b ldr r3, [r3, #0] + 802a9be: 681a ldr r2, [r3, #0] + 802a9c0: 687b ldr r3, [r7, #4] + 802a9c2: 681b ldr r3, [r3, #0] + 802a9c4: f042 0201 orr.w r2, r2, #1 + 802a9c8: 601a str r2, [r3, #0] /* Set the Flush Transmit FIFO bit */ SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ); - 802a99a: 687b ldr r3, [r7, #4] - 802a99c: 681b ldr r3, [r3, #0] - 802a99e: f8d3 2d00 ldr.w r2, [r3, #3328] ; 0xd00 - 802a9a2: 687b ldr r3, [r7, #4] - 802a9a4: 681b ldr r3, [r3, #0] - 802a9a6: f042 0201 orr.w r2, r2, #1 - 802a9aa: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 + 802a9ca: 687b ldr r3, [r7, #4] + 802a9cc: 681b ldr r3, [r3, #0] + 802a9ce: f8d3 2d00 ldr.w r2, [r3, #3328] ; 0xd00 + 802a9d2: 687b ldr r3, [r7, #4] + 802a9d4: 681b ldr r3, [r3, #0] + 802a9d6: f042 0201 orr.w r2, r2, #1 + 802a9da: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 /* Enable the DMA transmission */ SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST); - 802a9ae: 687b ldr r3, [r7, #4] - 802a9b0: 681b ldr r3, [r3, #0] - 802a9b2: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a9b6: f8d3 3104 ldr.w r3, [r3, #260] ; 0x104 - 802a9ba: 687a ldr r2, [r7, #4] - 802a9bc: 6812 ldr r2, [r2, #0] - 802a9be: f043 0301 orr.w r3, r3, #1 - 802a9c2: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a9c6: f8c2 3104 str.w r3, [r2, #260] ; 0x104 + 802a9de: 687b ldr r3, [r7, #4] + 802a9e0: 681b ldr r3, [r3, #0] + 802a9e2: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802a9e6: f8d3 3104 ldr.w r3, [r3, #260] ; 0x104 + 802a9ea: 687a ldr r2, [r7, #4] + 802a9ec: 6812 ldr r2, [r2, #0] + 802a9ee: f043 0301 orr.w r3, r3, #1 + 802a9f2: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802a9f6: f8c2 3104 str.w r3, [r2, #260] ; 0x104 /* Enable the DMA reception */ SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR); - 802a9ca: 687b ldr r3, [r7, #4] - 802a9cc: 681b ldr r3, [r3, #0] - 802a9ce: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a9d2: f8d3 3108 ldr.w r3, [r3, #264] ; 0x108 - 802a9d6: 687a ldr r2, [r7, #4] - 802a9d8: 6812 ldr r2, [r2, #0] - 802a9da: f043 0301 orr.w r3, r3, #1 - 802a9de: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a9e2: f8c2 3108 str.w r3, [r2, #264] ; 0x108 + 802a9fa: 687b ldr r3, [r7, #4] + 802a9fc: 681b ldr r3, [r3, #0] + 802a9fe: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aa02: f8d3 3108 ldr.w r3, [r3, #264] ; 0x108 + 802aa06: 687a ldr r2, [r7, #4] + 802aa08: 6812 ldr r2, [r2, #0] + 802aa0a: f043 0301 orr.w r3, r3, #1 + 802aa0e: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802aa12: f8c2 3108 str.w r3, [r2, #264] ; 0x108 /* Clear Tx and Rx process stopped flags */ heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS); - 802a9e6: 687b ldr r3, [r7, #4] - 802a9e8: 681b ldr r3, [r3, #0] - 802a9ea: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a9ee: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802a9f2: 687a ldr r2, [r7, #4] - 802a9f4: 6812 ldr r2, [r2, #0] - 802a9f6: f443 7381 orr.w r3, r3, #258 ; 0x102 - 802a9fa: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a9fe: f8c2 3160 str.w r3, [r2, #352] ; 0x160 + 802aa16: 687b ldr r3, [r7, #4] + 802aa18: 681b ldr r3, [r3, #0] + 802aa1a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aa1e: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802aa22: 687a ldr r2, [r7, #4] + 802aa24: 6812 ldr r2, [r2, #0] + 802aa26: f443 7381 orr.w r3, r3, #258 ; 0x102 + 802aa2a: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802aa2e: f8c2 3160 str.w r3, [r2, #352] ; 0x160 heth->gState = HAL_ETH_STATE_STARTED; - 802aa02: 687b ldr r3, [r7, #4] - 802aa04: 2223 movs r2, #35 ; 0x23 - 802aa06: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802aa32: 687b ldr r3, [r7, #4] + 802aa34: 2223 movs r2, #35 ; 0x23 + 802aa36: f8c3 2084 str.w r2, [r3, #132] ; 0x84 return HAL_OK; - 802aa0a: 2300 movs r3, #0 - 802aa0c: e000 b.n 802aa10 + 802aa3a: 2300 movs r3, #0 + 802aa3c: e000 b.n 802aa40 } else { return HAL_ERROR; - 802aa0e: 2301 movs r3, #1 + 802aa3e: 2301 movs r3, #1 } } - 802aa10: 4618 mov r0, r3 - 802aa12: 3708 adds r7, #8 - 802aa14: 46bd mov sp, r7 - 802aa16: bd80 pop {r7, pc} + 802aa40: 4618 mov r0, r3 + 802aa42: 3708 adds r7, #8 + 802aa44: 46bd mov sp, r7 + 802aa46: bd80 pop {r7, pc} -0802aa18 : +0802aa48 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth) { - 802aa18: b480 push {r7} - 802aa1a: b083 sub sp, #12 - 802aa1c: af00 add r7, sp, #0 - 802aa1e: 6078 str r0, [r7, #4] + 802aa48: b480 push {r7} + 802aa4a: b083 sub sp, #12 + 802aa4c: af00 add r7, sp, #0 + 802aa4e: 6078 str r0, [r7, #4] if (heth->gState == HAL_ETH_STATE_STARTED) - 802aa20: 687b ldr r3, [r7, #4] - 802aa22: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802aa26: 2b23 cmp r3, #35 ; 0x23 - 802aa28: d13f bne.n 802aaaa + 802aa50: 687b ldr r3, [r7, #4] + 802aa52: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802aa56: 2b23 cmp r3, #35 ; 0x23 + 802aa58: d13f bne.n 802aada { /* Set the ETH peripheral state to BUSY */ heth->gState = HAL_ETH_STATE_BUSY; - 802aa2a: 687b ldr r3, [r7, #4] - 802aa2c: 2223 movs r2, #35 ; 0x23 - 802aa2e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802aa5a: 687b ldr r3, [r7, #4] + 802aa5c: 2223 movs r2, #35 ; 0x23 + 802aa5e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Disable the DMA transmission */ CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST); - 802aa32: 687b ldr r3, [r7, #4] - 802aa34: 681b ldr r3, [r3, #0] - 802aa36: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aa3a: f8d3 3104 ldr.w r3, [r3, #260] ; 0x104 - 802aa3e: 687a ldr r2, [r7, #4] - 802aa40: 6812 ldr r2, [r2, #0] - 802aa42: f023 0301 bic.w r3, r3, #1 - 802aa46: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802aa4a: f8c2 3104 str.w r3, [r2, #260] ; 0x104 + 802aa62: 687b ldr r3, [r7, #4] + 802aa64: 681b ldr r3, [r3, #0] + 802aa66: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aa6a: f8d3 3104 ldr.w r3, [r3, #260] ; 0x104 + 802aa6e: 687a ldr r2, [r7, #4] + 802aa70: 6812 ldr r2, [r2, #0] + 802aa72: f023 0301 bic.w r3, r3, #1 + 802aa76: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802aa7a: f8c2 3104 str.w r3, [r2, #260] ; 0x104 /* Disable the DMA reception */ CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR); - 802aa4e: 687b ldr r3, [r7, #4] - 802aa50: 681b ldr r3, [r3, #0] - 802aa52: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aa56: f8d3 3108 ldr.w r3, [r3, #264] ; 0x108 - 802aa5a: 687a ldr r2, [r7, #4] - 802aa5c: 6812 ldr r2, [r2, #0] - 802aa5e: f023 0301 bic.w r3, r3, #1 - 802aa62: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802aa66: f8c2 3108 str.w r3, [r2, #264] ; 0x108 + 802aa7e: 687b ldr r3, [r7, #4] + 802aa80: 681b ldr r3, [r3, #0] + 802aa82: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aa86: f8d3 3108 ldr.w r3, [r3, #264] ; 0x108 + 802aa8a: 687a ldr r2, [r7, #4] + 802aa8c: 6812 ldr r2, [r2, #0] + 802aa8e: f023 0301 bic.w r3, r3, #1 + 802aa92: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802aa96: f8c2 3108 str.w r3, [r2, #264] ; 0x108 /* Disable the MAC reception */ CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); - 802aa6a: 687b ldr r3, [r7, #4] - 802aa6c: 681b ldr r3, [r3, #0] - 802aa6e: 681a ldr r2, [r3, #0] - 802aa70: 687b ldr r3, [r7, #4] - 802aa72: 681b ldr r3, [r3, #0] - 802aa74: f022 0201 bic.w r2, r2, #1 - 802aa78: 601a str r2, [r3, #0] + 802aa9a: 687b ldr r3, [r7, #4] + 802aa9c: 681b ldr r3, [r3, #0] + 802aa9e: 681a ldr r2, [r3, #0] + 802aaa0: 687b ldr r3, [r7, #4] + 802aaa2: 681b ldr r3, [r3, #0] + 802aaa4: f022 0201 bic.w r2, r2, #1 + 802aaa8: 601a str r2, [r3, #0] /* Set the Flush Transmit FIFO bit */ SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ); - 802aa7a: 687b ldr r3, [r7, #4] - 802aa7c: 681b ldr r3, [r3, #0] - 802aa7e: f8d3 2d00 ldr.w r2, [r3, #3328] ; 0xd00 - 802aa82: 687b ldr r3, [r7, #4] - 802aa84: 681b ldr r3, [r3, #0] - 802aa86: f042 0201 orr.w r2, r2, #1 - 802aa8a: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 + 802aaaa: 687b ldr r3, [r7, #4] + 802aaac: 681b ldr r3, [r3, #0] + 802aaae: f8d3 2d00 ldr.w r2, [r3, #3328] ; 0xd00 + 802aab2: 687b ldr r3, [r7, #4] + 802aab4: 681b ldr r3, [r3, #0] + 802aab6: f042 0201 orr.w r2, r2, #1 + 802aaba: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 /* Disable the MAC transmission */ CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE); - 802aa8e: 687b ldr r3, [r7, #4] - 802aa90: 681b ldr r3, [r3, #0] - 802aa92: 681a ldr r2, [r3, #0] - 802aa94: 687b ldr r3, [r7, #4] - 802aa96: 681b ldr r3, [r3, #0] - 802aa98: f022 0202 bic.w r2, r2, #2 - 802aa9c: 601a str r2, [r3, #0] + 802aabe: 687b ldr r3, [r7, #4] + 802aac0: 681b ldr r3, [r3, #0] + 802aac2: 681a ldr r2, [r3, #0] + 802aac4: 687b ldr r3, [r7, #4] + 802aac6: 681b ldr r3, [r3, #0] + 802aac8: f022 0202 bic.w r2, r2, #2 + 802aacc: 601a str r2, [r3, #0] heth->gState = HAL_ETH_STATE_READY; - 802aa9e: 687b ldr r3, [r7, #4] - 802aaa0: 2210 movs r2, #16 - 802aaa2: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802aace: 687b ldr r3, [r7, #4] + 802aad0: 2210 movs r2, #16 + 802aad2: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Return function status */ return HAL_OK; - 802aaa6: 2300 movs r3, #0 - 802aaa8: e000 b.n 802aaac + 802aad6: 2300 movs r3, #0 + 802aad8: e000 b.n 802aadc } else { return HAL_ERROR; - 802aaaa: 2301 movs r3, #1 + 802aada: 2301 movs r3, #1 } } - 802aaac: 4618 mov r0, r3 - 802aaae: 370c adds r7, #12 - 802aab0: 46bd mov sp, r7 - 802aab2: f85d 7b04 ldr.w r7, [sp], #4 - 802aab6: 4770 bx lr + 802aadc: 4618 mov r0, r3 + 802aade: 370c adds r7, #12 + 802aae0: 46bd mov sp, r7 + 802aae2: f85d 7b04 ldr.w r7, [sp], #4 + 802aae6: 4770 bx lr -0802aab8 : +0802aae8 : * @param pTxConfig: Hold the configuration of packet to be transmitted * @param Timeout: timeout value * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_Transmit(ETH_HandleTypeDef *heth, ETH_TxPacketConfig *pTxConfig, uint32_t Timeout) { - 802aab8: b580 push {r7, lr} - 802aaba: b086 sub sp, #24 - 802aabc: af00 add r7, sp, #0 - 802aabe: 60f8 str r0, [r7, #12] - 802aac0: 60b9 str r1, [r7, #8] - 802aac2: 607a str r2, [r7, #4] + 802aae8: b580 push {r7, lr} + 802aaea: b086 sub sp, #24 + 802aaec: af00 add r7, sp, #0 + 802aaee: 60f8 str r0, [r7, #12] + 802aaf0: 60b9 str r1, [r7, #8] + 802aaf2: 607a str r2, [r7, #4] uint32_t tickstart; ETH_DMADescTypeDef *dmatxdesc; if (pTxConfig == NULL) - 802aac4: 68bb ldr r3, [r7, #8] - 802aac6: 2b00 cmp r3, #0 - 802aac8: d109 bne.n 802aade + 802aaf4: 68bb ldr r3, [r7, #8] + 802aaf6: 2b00 cmp r3, #0 + 802aaf8: d109 bne.n 802ab0e { heth->ErrorCode |= HAL_ETH_ERROR_PARAM; - 802aaca: 68fb ldr r3, [r7, #12] - 802aacc: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802aad0: f043 0201 orr.w r2, r3, #1 - 802aad4: 68fb ldr r3, [r7, #12] - 802aad6: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802aafa: 68fb ldr r3, [r7, #12] + 802aafc: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802ab00: f043 0201 orr.w r2, r3, #1 + 802ab04: 68fb ldr r3, [r7, #12] + 802ab06: f8c3 2088 str.w r2, [r3, #136] ; 0x88 return HAL_ERROR; - 802aada: 2301 movs r3, #1 - 802aadc: e07f b.n 802abde + 802ab0a: 2301 movs r3, #1 + 802ab0c: e07f b.n 802ac0e } if (heth->gState == HAL_ETH_STATE_STARTED) - 802aade: 68fb ldr r3, [r7, #12] - 802aae0: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802aae4: 2b23 cmp r3, #35 ; 0x23 - 802aae6: d179 bne.n 802abdc + 802ab0e: 68fb ldr r3, [r7, #12] + 802ab10: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802ab14: 2b23 cmp r3, #35 ; 0x23 + 802ab16: d179 bne.n 802ac0c { /* Config DMA Tx descriptor by Tx Packet info */ if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 0) != HAL_ETH_ERROR_NONE) - 802aae8: 2200 movs r2, #0 - 802aaea: 68b9 ldr r1, [r7, #8] - 802aaec: 68f8 ldr r0, [r7, #12] - 802aaee: f001 f8c9 bl 802bc84 - 802aaf2: 4603 mov r3, r0 - 802aaf4: 2b00 cmp r3, #0 - 802aaf6: d009 beq.n 802ab0c + 802ab18: 2200 movs r2, #0 + 802ab1a: 68b9 ldr r1, [r7, #8] + 802ab1c: 68f8 ldr r0, [r7, #12] + 802ab1e: f001 f8c9 bl 802bcb4 + 802ab22: 4603 mov r3, r0 + 802ab24: 2b00 cmp r3, #0 + 802ab26: d009 beq.n 802ab3c { /* Set the ETH error code */ heth->ErrorCode |= HAL_ETH_ERROR_BUSY; - 802aaf8: 68fb ldr r3, [r7, #12] - 802aafa: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802aafe: f043 0202 orr.w r2, r3, #2 - 802ab02: 68fb ldr r3, [r7, #12] - 802ab04: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802ab28: 68fb ldr r3, [r7, #12] + 802ab2a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802ab2e: f043 0202 orr.w r2, r3, #2 + 802ab32: 68fb ldr r3, [r7, #12] + 802ab34: f8c3 2088 str.w r2, [r3, #136] ; 0x88 return HAL_ERROR; - 802ab08: 2301 movs r3, #1 - 802ab0a: e068 b.n 802abde + 802ab38: 2301 movs r3, #1 + 802ab3a: e068 b.n 802ac0e __ASM volatile ("dsb 0xF":::"memory"); - 802ab0c: f3bf 8f4f dsb sy + 802ab3c: f3bf 8f4f dsb sy } - 802ab10: bf00 nop + 802ab40: bf00 nop } /* Ensure completion of descriptor preparation before transmission start */ __DSB(); dmatxdesc = (ETH_DMADescTypeDef *)(&heth->TxDescList)->TxDesc[heth->TxDescList.CurTxDesc]; - 802ab12: 68fb ldr r3, [r7, #12] - 802ab14: 6a9a ldr r2, [r3, #40] ; 0x28 - 802ab16: 68fb ldr r3, [r7, #12] - 802ab18: 3206 adds r2, #6 - 802ab1a: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802ab1e: 617b str r3, [r7, #20] + 802ab42: 68fb ldr r3, [r7, #12] + 802ab44: 6a9a ldr r2, [r3, #40] ; 0x28 + 802ab46: 68fb ldr r3, [r7, #12] + 802ab48: 3206 adds r2, #6 + 802ab4a: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802ab4e: 617b str r3, [r7, #20] /* Incr current tx desc index */ INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U); - 802ab20: 68fb ldr r3, [r7, #12] - 802ab22: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ab24: 1c5a adds r2, r3, #1 - 802ab26: 68fb ldr r3, [r7, #12] - 802ab28: 629a str r2, [r3, #40] ; 0x28 - 802ab2a: 68fb ldr r3, [r7, #12] - 802ab2c: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ab2e: 2b03 cmp r3, #3 - 802ab30: d904 bls.n 802ab3c - 802ab32: 68fb ldr r3, [r7, #12] - 802ab34: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ab36: 1f1a subs r2, r3, #4 - 802ab38: 68fb ldr r3, [r7, #12] - 802ab3a: 629a str r2, [r3, #40] ; 0x28 + 802ab50: 68fb ldr r3, [r7, #12] + 802ab52: 6a9b ldr r3, [r3, #40] ; 0x28 + 802ab54: 1c5a adds r2, r3, #1 + 802ab56: 68fb ldr r3, [r7, #12] + 802ab58: 629a str r2, [r3, #40] ; 0x28 + 802ab5a: 68fb ldr r3, [r7, #12] + 802ab5c: 6a9b ldr r3, [r3, #40] ; 0x28 + 802ab5e: 2b03 cmp r3, #3 + 802ab60: d904 bls.n 802ab6c + 802ab62: 68fb ldr r3, [r7, #12] + 802ab64: 6a9b ldr r3, [r3, #40] ; 0x28 + 802ab66: 1f1a subs r2, r3, #4 + 802ab68: 68fb ldr r3, [r7, #12] + 802ab6a: 629a str r2, [r3, #40] ; 0x28 /* Start transmission */ /* issue a poll command to Tx DMA by writing address of next immediate free descriptor */ WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc])); - 802ab3c: 68fb ldr r3, [r7, #12] - 802ab3e: 6a99 ldr r1, [r3, #40] ; 0x28 - 802ab40: 68fb ldr r3, [r7, #12] - 802ab42: 681a ldr r2, [r3, #0] - 802ab44: 68fb ldr r3, [r7, #12] - 802ab46: 3106 adds r1, #6 - 802ab48: f853 3021 ldr.w r3, [r3, r1, lsl #2] - 802ab4c: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802ab50: f8c2 3120 str.w r3, [r2, #288] ; 0x120 + 802ab6c: 68fb ldr r3, [r7, #12] + 802ab6e: 6a99 ldr r1, [r3, #40] ; 0x28 + 802ab70: 68fb ldr r3, [r7, #12] + 802ab72: 681a ldr r2, [r3, #0] + 802ab74: 68fb ldr r3, [r7, #12] + 802ab76: 3106 adds r1, #6 + 802ab78: f853 3021 ldr.w r3, [r3, r1, lsl #2] + 802ab7c: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802ab80: f8c2 3120 str.w r3, [r2, #288] ; 0x120 tickstart = HAL_GetTick(); - 802ab54: f7fb fa1e bl 8025f94 - 802ab58: 6138 str r0, [r7, #16] + 802ab84: f7fb fa1e bl 8025fc4 + 802ab88: 6138 str r0, [r7, #16] /* Wait for data to be transmitted or timeout occurred */ while ((dmatxdesc->DESC3 & ETH_DMATXNDESCWBF_OWN) != (uint32_t)RESET) - 802ab5a: e039 b.n 802abd0 + 802ab8a: e039 b.n 802ac00 { if ((heth->Instance->DMACSR & ETH_DMACSR_FBE) != (uint32_t)RESET) - 802ab5c: 68fb ldr r3, [r7, #12] - 802ab5e: 681b ldr r3, [r3, #0] - 802ab60: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ab64: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802ab68: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 802ab6c: 2b00 cmp r3, #0 - 802ab6e: d012 beq.n 802ab96 + 802ab8c: 68fb ldr r3, [r7, #12] + 802ab8e: 681b ldr r3, [r3, #0] + 802ab90: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ab94: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802ab98: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 802ab9c: 2b00 cmp r3, #0 + 802ab9e: d012 beq.n 802abc6 { heth->ErrorCode |= HAL_ETH_ERROR_DMA; - 802ab70: 68fb ldr r3, [r7, #12] - 802ab72: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802ab76: f043 0208 orr.w r2, r3, #8 - 802ab7a: 68fb ldr r3, [r7, #12] - 802ab7c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802aba0: 68fb ldr r3, [r7, #12] + 802aba2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802aba6: f043 0208 orr.w r2, r3, #8 + 802abaa: 68fb ldr r3, [r7, #12] + 802abac: f8c3 2088 str.w r2, [r3, #136] ; 0x88 heth->DMAErrorCode = heth->Instance->DMACSR; - 802ab80: 68fb ldr r3, [r7, #12] - 802ab82: 681b ldr r3, [r3, #0] - 802ab84: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ab88: f8d3 2160 ldr.w r2, [r3, #352] ; 0x160 - 802ab8c: 68fb ldr r3, [r7, #12] - 802ab8e: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 802abb0: 68fb ldr r3, [r7, #12] + 802abb2: 681b ldr r3, [r3, #0] + 802abb4: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802abb8: f8d3 2160 ldr.w r2, [r3, #352] ; 0x160 + 802abbc: 68fb ldr r3, [r7, #12] + 802abbe: f8c3 208c str.w r2, [r3, #140] ; 0x8c /* Return function status */ return HAL_ERROR; - 802ab92: 2301 movs r3, #1 - 802ab94: e023 b.n 802abde + 802abc2: 2301 movs r3, #1 + 802abc4: e023 b.n 802ac0e } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 802ab96: 687b ldr r3, [r7, #4] - 802ab98: f1b3 3fff cmp.w r3, #4294967295 - 802ab9c: d018 beq.n 802abd0 + 802abc6: 687b ldr r3, [r7, #4] + 802abc8: f1b3 3fff cmp.w r3, #4294967295 + 802abcc: d018 beq.n 802ac00 { if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) - 802ab9e: f7fb f9f9 bl 8025f94 - 802aba2: 4602 mov r2, r0 - 802aba4: 693b ldr r3, [r7, #16] - 802aba6: 1ad3 subs r3, r2, r3 - 802aba8: 687a ldr r2, [r7, #4] - 802abaa: 429a cmp r2, r3 - 802abac: d302 bcc.n 802abb4 - 802abae: 687b ldr r3, [r7, #4] - 802abb0: 2b00 cmp r3, #0 - 802abb2: d10d bne.n 802abd0 + 802abce: f7fb f9f9 bl 8025fc4 + 802abd2: 4602 mov r2, r0 + 802abd4: 693b ldr r3, [r7, #16] + 802abd6: 1ad3 subs r3, r2, r3 + 802abd8: 687a ldr r2, [r7, #4] + 802abda: 429a cmp r2, r3 + 802abdc: d302 bcc.n 802abe4 + 802abde: 687b ldr r3, [r7, #4] + 802abe0: 2b00 cmp r3, #0 + 802abe2: d10d bne.n 802ac00 { heth->ErrorCode |= HAL_ETH_ERROR_TIMEOUT; - 802abb4: 68fb ldr r3, [r7, #12] - 802abb6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802abba: f043 0204 orr.w r2, r3, #4 - 802abbe: 68fb ldr r3, [r7, #12] - 802abc0: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802abe4: 68fb ldr r3, [r7, #12] + 802abe6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802abea: f043 0204 orr.w r2, r3, #4 + 802abee: 68fb ldr r3, [r7, #12] + 802abf0: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear TX descriptor so that we can proceed */ dmatxdesc->DESC3 = (ETH_DMATXNDESCWBF_FD | ETH_DMATXNDESCWBF_LD); - 802abc4: 697b ldr r3, [r7, #20] - 802abc6: f04f 5240 mov.w r2, #805306368 ; 0x30000000 - 802abca: 60da str r2, [r3, #12] + 802abf4: 697b ldr r3, [r7, #20] + 802abf6: f04f 5240 mov.w r2, #805306368 ; 0x30000000 + 802abfa: 60da str r2, [r3, #12] return HAL_ERROR; - 802abcc: 2301 movs r3, #1 - 802abce: e006 b.n 802abde + 802abfc: 2301 movs r3, #1 + 802abfe: e006 b.n 802ac0e while ((dmatxdesc->DESC3 & ETH_DMATXNDESCWBF_OWN) != (uint32_t)RESET) - 802abd0: 697b ldr r3, [r7, #20] - 802abd2: 68db ldr r3, [r3, #12] - 802abd4: 2b00 cmp r3, #0 - 802abd6: dbc1 blt.n 802ab5c + 802ac00: 697b ldr r3, [r7, #20] + 802ac02: 68db ldr r3, [r3, #12] + 802ac04: 2b00 cmp r3, #0 + 802ac06: dbc1 blt.n 802ab8c } } } /* Return function status */ return HAL_OK; - 802abd8: 2300 movs r3, #0 - 802abda: e000 b.n 802abde + 802ac08: 2300 movs r3, #0 + 802ac0a: e000 b.n 802ac0e } else { return HAL_ERROR; - 802abdc: 2301 movs r3, #1 + 802ac0c: 2301 movs r3, #1 } } - 802abde: 4618 mov r0, r3 - 802abe0: 3718 adds r7, #24 - 802abe2: 46bd mov sp, r7 - 802abe4: bd80 pop {r7, pc} + 802ac0e: 4618 mov r0, r3 + 802ac10: 3718 adds r7, #24 + 802ac12: 46bd mov sp, r7 + 802ac14: bd80 pop {r7, pc} -0802abe6 : +0802ac16 : * the configuration information for ETHERNET module * @param pAppBuff: Pointer to an application buffer to receive the packet. * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff) { - 802abe6: b580 push {r7, lr} - 802abe8: b088 sub sp, #32 - 802abea: af00 add r7, sp, #0 - 802abec: 6078 str r0, [r7, #4] - 802abee: 6039 str r1, [r7, #0] + 802ac16: b580 push {r7, lr} + 802ac18: b088 sub sp, #32 + 802ac1a: af00 add r7, sp, #0 + 802ac1c: 6078 str r0, [r7, #4] + 802ac1e: 6039 str r1, [r7, #0] uint32_t descidx; ETH_DMADescTypeDef *dmarxdesc; uint32_t desccnt = 0U; - 802abf0: 2300 movs r3, #0 - 802abf2: 617b str r3, [r7, #20] + 802ac20: 2300 movs r3, #0 + 802ac22: 617b str r3, [r7, #20] uint32_t desccntmax; uint32_t bufflength; uint8_t rxdataready = 0U; - 802abf4: 2300 movs r3, #0 - 802abf6: 73fb strb r3, [r7, #15] + 802ac24: 2300 movs r3, #0 + 802ac26: 73fb strb r3, [r7, #15] if (pAppBuff == NULL) - 802abf8: 683b ldr r3, [r7, #0] - 802abfa: 2b00 cmp r3, #0 - 802abfc: d109 bne.n 802ac12 + 802ac28: 683b ldr r3, [r7, #0] + 802ac2a: 2b00 cmp r3, #0 + 802ac2c: d109 bne.n 802ac42 { heth->ErrorCode |= HAL_ETH_ERROR_PARAM; - 802abfe: 687b ldr r3, [r7, #4] - 802ac00: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802ac04: f043 0201 orr.w r2, r3, #1 - 802ac08: 687b ldr r3, [r7, #4] - 802ac0a: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802ac2e: 687b ldr r3, [r7, #4] + 802ac30: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802ac34: f043 0201 orr.w r2, r3, #1 + 802ac38: 687b ldr r3, [r7, #4] + 802ac3a: f8c3 2088 str.w r2, [r3, #136] ; 0x88 return HAL_ERROR; - 802ac0e: 2301 movs r3, #1 - 802ac10: e0a5 b.n 802ad5e + 802ac3e: 2301 movs r3, #1 + 802ac40: e0a5 b.n 802ad8e } if (heth->gState != HAL_ETH_STATE_STARTED) - 802ac12: 687b ldr r3, [r7, #4] - 802ac14: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802ac18: 2b23 cmp r3, #35 ; 0x23 - 802ac1a: d001 beq.n 802ac20 + 802ac42: 687b ldr r3, [r7, #4] + 802ac44: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802ac48: 2b23 cmp r3, #35 ; 0x23 + 802ac4a: d001 beq.n 802ac50 { return HAL_ERROR; - 802ac1c: 2301 movs r3, #1 - 802ac1e: e09e b.n 802ad5e + 802ac4c: 2301 movs r3, #1 + 802ac4e: e09e b.n 802ad8e } descidx = heth->RxDescList.RxDescIdx; - 802ac20: 687b ldr r3, [r7, #4] - 802ac22: 6ddb ldr r3, [r3, #92] ; 0x5c - 802ac24: 61fb str r3, [r7, #28] + 802ac50: 687b ldr r3, [r7, #4] + 802ac52: 6ddb ldr r3, [r3, #92] ; 0x5c + 802ac54: 61fb str r3, [r7, #28] dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; - 802ac26: 687b ldr r3, [r7, #4] - 802ac28: 69fa ldr r2, [r7, #28] - 802ac2a: 3212 adds r2, #18 - 802ac2c: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802ac30: 61bb str r3, [r7, #24] + 802ac56: 687b ldr r3, [r7, #4] + 802ac58: 69fa ldr r2, [r7, #28] + 802ac5a: 3212 adds r2, #18 + 802ac5c: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802ac60: 61bb str r3, [r7, #24] desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt; - 802ac32: 687b ldr r3, [r7, #4] - 802ac34: 6edb ldr r3, [r3, #108] ; 0x6c - 802ac36: f1c3 0304 rsb r3, r3, #4 - 802ac3a: 60bb str r3, [r7, #8] + 802ac62: 687b ldr r3, [r7, #4] + 802ac64: 6edb ldr r3, [r3, #108] ; 0x6c + 802ac66: f1c3 0304 rsb r3, r3, #4 + 802ac6a: 60bb str r3, [r7, #8] /* Check if descriptor is not owned by DMA */ while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax) - 802ac3c: e067 b.n 802ad0e + 802ac6c: e067 b.n 802ad3e && (rxdataready == 0U)) { if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_CTXT) != (uint32_t)RESET) - 802ac3e: 69bb ldr r3, [r7, #24] - 802ac40: 68db ldr r3, [r3, #12] - 802ac42: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 - 802ac46: 2b00 cmp r3, #0 - 802ac48: d007 beq.n 802ac5a + 802ac6e: 69bb ldr r3, [r7, #24] + 802ac70: 68db ldr r3, [r3, #12] + 802ac72: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 + 802ac76: 2b00 cmp r3, #0 + 802ac78: d007 beq.n 802ac8a { /* Get timestamp high */ heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC1; - 802ac4a: 69bb ldr r3, [r7, #24] - 802ac4c: 685a ldr r2, [r3, #4] - 802ac4e: 687b ldr r3, [r7, #4] - 802ac50: 679a str r2, [r3, #120] ; 0x78 + 802ac7a: 69bb ldr r3, [r7, #24] + 802ac7c: 685a ldr r2, [r3, #4] + 802ac7e: 687b ldr r3, [r7, #4] + 802ac80: 679a str r2, [r3, #120] ; 0x78 /* Get timestamp low */ heth->RxDescList.TimeStamp.TimeStampLow = dmarxdesc->DESC0; - 802ac52: 69bb ldr r3, [r7, #24] - 802ac54: 681a ldr r2, [r3, #0] - 802ac56: 687b ldr r3, [r7, #4] - 802ac58: 675a str r2, [r3, #116] ; 0x74 + 802ac82: 69bb ldr r3, [r7, #24] + 802ac84: 681a ldr r2, [r3, #0] + 802ac86: 687b ldr r3, [r7, #4] + 802ac88: 675a str r2, [r3, #116] ; 0x74 } if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRxStart != NULL)) - 802ac5a: 69bb ldr r3, [r7, #24] - 802ac5c: 68db ldr r3, [r3, #12] - 802ac5e: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 802ac62: 2b00 cmp r3, #0 - 802ac64: d103 bne.n 802ac6e - 802ac66: 687b ldr r3, [r7, #4] - 802ac68: 6fdb ldr r3, [r3, #124] ; 0x7c - 802ac6a: 2b00 cmp r3, #0 - 802ac6c: d03d beq.n 802acea + 802ac8a: 69bb ldr r3, [r7, #24] + 802ac8c: 68db ldr r3, [r3, #12] + 802ac8e: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 802ac92: 2b00 cmp r3, #0 + 802ac94: d103 bne.n 802ac9e + 802ac96: 687b ldr r3, [r7, #4] + 802ac98: 6fdb ldr r3, [r3, #124] ; 0x7c + 802ac9a: 2b00 cmp r3, #0 + 802ac9c: d03d beq.n 802ad1a { /* Check if first descriptor */ if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) - 802ac6e: 69bb ldr r3, [r7, #24] - 802ac70: 68db ldr r3, [r3, #12] - 802ac72: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 802ac76: 2b00 cmp r3, #0 - 802ac78: d005 beq.n 802ac86 + 802ac9e: 69bb ldr r3, [r7, #24] + 802aca0: 68db ldr r3, [r3, #12] + 802aca2: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 802aca6: 2b00 cmp r3, #0 + 802aca8: d005 beq.n 802acb6 { heth->RxDescList.RxDescCnt = 0; - 802ac7a: 687b ldr r3, [r7, #4] - 802ac7c: 2200 movs r2, #0 - 802ac7e: 661a str r2, [r3, #96] ; 0x60 + 802acaa: 687b ldr r3, [r7, #4] + 802acac: 2200 movs r2, #0 + 802acae: 661a str r2, [r3, #96] ; 0x60 heth->RxDescList.RxDataLength = 0; - 802ac80: 687b ldr r3, [r7, #4] - 802ac82: 2200 movs r2, #0 - 802ac84: 665a str r2, [r3, #100] ; 0x64 + 802acb0: 687b ldr r3, [r7, #4] + 802acb2: 2200 movs r2, #0 + 802acb4: 665a str r2, [r3, #100] ; 0x64 } /* Check if last descriptor */ bufflength = heth->Init.RxBuffLen; - 802ac86: 687b ldr r3, [r7, #4] - 802ac88: 695b ldr r3, [r3, #20] - 802ac8a: 613b str r3, [r7, #16] + 802acb6: 687b ldr r3, [r7, #4] + 802acb8: 695b ldr r3, [r3, #20] + 802acba: 613b str r3, [r7, #16] if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET) - 802ac8c: 69bb ldr r3, [r7, #24] - 802ac8e: 68db ldr r3, [r3, #12] - 802ac90: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 802ac94: 2b00 cmp r3, #0 - 802ac96: d00d beq.n 802acb4 + 802acbc: 69bb ldr r3, [r7, #24] + 802acbe: 68db ldr r3, [r3, #12] + 802acc0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 802acc4: 2b00 cmp r3, #0 + 802acc6: d00d beq.n 802ace4 { bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength; - 802ac98: 69bb ldr r3, [r7, #24] - 802ac9a: 68db ldr r3, [r3, #12] - 802ac9c: f3c3 020e ubfx r2, r3, #0, #15 - 802aca0: 687b ldr r3, [r7, #4] - 802aca2: 6e5b ldr r3, [r3, #100] ; 0x64 - 802aca4: 1ad3 subs r3, r2, r3 - 802aca6: 613b str r3, [r7, #16] + 802acc8: 69bb ldr r3, [r7, #24] + 802acca: 68db ldr r3, [r3, #12] + 802accc: f3c3 020e ubfx r2, r3, #0, #15 + 802acd0: 687b ldr r3, [r7, #4] + 802acd2: 6e5b ldr r3, [r3, #100] ; 0x64 + 802acd4: 1ad3 subs r3, r2, r3 + 802acd6: 613b str r3, [r7, #16] /* Save Last descriptor index */ heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3; - 802aca8: 69bb ldr r3, [r7, #24] - 802acaa: 68da ldr r2, [r3, #12] - 802acac: 687b ldr r3, [r7, #4] - 802acae: 671a str r2, [r3, #112] ; 0x70 + 802acd8: 69bb ldr r3, [r7, #24] + 802acda: 68da ldr r2, [r3, #12] + 802acdc: 687b ldr r3, [r7, #4] + 802acde: 671a str r2, [r3, #112] ; 0x70 /* Packet ready */ rxdataready = 1; - 802acb0: 2301 movs r3, #1 - 802acb2: 73fb strb r3, [r7, #15] + 802ace0: 2301 movs r3, #1 + 802ace2: 73fb strb r3, [r7, #15] /*Call registered Link callback*/ heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, (uint8_t *)dmarxdesc->BackupAddr0, bufflength); #else /* Link callback */ HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, - 802acb4: 687b ldr r3, [r7, #4] - 802acb6: f103 007c add.w r0, r3, #124 ; 0x7c - 802acba: 687b ldr r3, [r7, #4] - 802acbc: f103 0180 add.w r1, r3, #128 ; 0x80 + 802ace4: 687b ldr r3, [r7, #4] + 802ace6: f103 007c add.w r0, r3, #124 ; 0x7c + 802acea: 687b ldr r3, [r7, #4] + 802acec: f103 0180 add.w r1, r3, #128 ; 0x80 (uint8_t *)dmarxdesc->BackupAddr0, (uint16_t) bufflength); - 802acc0: 69bb ldr r3, [r7, #24] - 802acc2: 691b ldr r3, [r3, #16] + 802acf0: 69bb ldr r3, [r7, #24] + 802acf2: 691b ldr r3, [r3, #16] HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, - 802acc4: 461a mov r2, r3 - 802acc6: 693b ldr r3, [r7, #16] - 802acc8: b29b uxth r3, r3 - 802acca: f00b f885 bl 8035dd8 + 802acf4: 461a mov r2, r3 + 802acf6: 693b ldr r3, [r7, #16] + 802acf8: b29b uxth r3, r3 + 802acfa: f00b f885 bl 8035e08 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ heth->RxDescList.RxDescCnt++; - 802acce: 687b ldr r3, [r7, #4] - 802acd0: 6e1b ldr r3, [r3, #96] ; 0x60 - 802acd2: 1c5a adds r2, r3, #1 - 802acd4: 687b ldr r3, [r7, #4] - 802acd6: 661a str r2, [r3, #96] ; 0x60 + 802acfe: 687b ldr r3, [r7, #4] + 802ad00: 6e1b ldr r3, [r3, #96] ; 0x60 + 802ad02: 1c5a adds r2, r3, #1 + 802ad04: 687b ldr r3, [r7, #4] + 802ad06: 661a str r2, [r3, #96] ; 0x60 heth->RxDescList.RxDataLength += bufflength; - 802acd8: 687b ldr r3, [r7, #4] - 802acda: 6e5a ldr r2, [r3, #100] ; 0x64 - 802acdc: 693b ldr r3, [r7, #16] - 802acde: 441a add r2, r3 - 802ace0: 687b ldr r3, [r7, #4] - 802ace2: 665a str r2, [r3, #100] ; 0x64 + 802ad08: 687b ldr r3, [r7, #4] + 802ad0a: 6e5a ldr r2, [r3, #100] ; 0x64 + 802ad0c: 693b ldr r3, [r7, #16] + 802ad0e: 441a add r2, r3 + 802ad10: 687b ldr r3, [r7, #4] + 802ad12: 665a str r2, [r3, #100] ; 0x64 /* Clear buffer pointer */ dmarxdesc->BackupAddr0 = 0; - 802ace4: 69bb ldr r3, [r7, #24] - 802ace6: 2200 movs r2, #0 - 802ace8: 611a str r2, [r3, #16] + 802ad14: 69bb ldr r3, [r7, #24] + 802ad16: 2200 movs r2, #0 + 802ad18: 611a str r2, [r3, #16] } /* Increment current rx descriptor index */ INCR_RX_DESC_INDEX(descidx, 1U); - 802acea: 69fb ldr r3, [r7, #28] - 802acec: 3301 adds r3, #1 - 802acee: 61fb str r3, [r7, #28] - 802acf0: 69fb ldr r3, [r7, #28] - 802acf2: 2b03 cmp r3, #3 - 802acf4: d902 bls.n 802acfc - 802acf6: 69fb ldr r3, [r7, #28] - 802acf8: 3b04 subs r3, #4 - 802acfa: 61fb str r3, [r7, #28] + 802ad1a: 69fb ldr r3, [r7, #28] + 802ad1c: 3301 adds r3, #1 + 802ad1e: 61fb str r3, [r7, #28] + 802ad20: 69fb ldr r3, [r7, #28] + 802ad22: 2b03 cmp r3, #3 + 802ad24: d902 bls.n 802ad2c + 802ad26: 69fb ldr r3, [r7, #28] + 802ad28: 3b04 subs r3, #4 + 802ad2a: 61fb str r3, [r7, #28] /* Get current descriptor address */ dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; - 802acfc: 687b ldr r3, [r7, #4] - 802acfe: 69fa ldr r2, [r7, #28] - 802ad00: 3212 adds r2, #18 - 802ad02: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802ad06: 61bb str r3, [r7, #24] + 802ad2c: 687b ldr r3, [r7, #4] + 802ad2e: 69fa ldr r2, [r7, #28] + 802ad30: 3212 adds r2, #18 + 802ad32: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802ad36: 61bb str r3, [r7, #24] desccnt++; - 802ad08: 697b ldr r3, [r7, #20] - 802ad0a: 3301 adds r3, #1 - 802ad0c: 617b str r3, [r7, #20] + 802ad38: 697b ldr r3, [r7, #20] + 802ad3a: 3301 adds r3, #1 + 802ad3c: 617b str r3, [r7, #20] while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax) - 802ad0e: 69bb ldr r3, [r7, #24] - 802ad10: 68db ldr r3, [r3, #12] - 802ad12: 2b00 cmp r3, #0 - 802ad14: db06 blt.n 802ad24 - 802ad16: 697a ldr r2, [r7, #20] - 802ad18: 68bb ldr r3, [r7, #8] - 802ad1a: 429a cmp r2, r3 - 802ad1c: d202 bcs.n 802ad24 + 802ad3e: 69bb ldr r3, [r7, #24] + 802ad40: 68db ldr r3, [r3, #12] + 802ad42: 2b00 cmp r3, #0 + 802ad44: db06 blt.n 802ad54 + 802ad46: 697a ldr r2, [r7, #20] + 802ad48: 68bb ldr r3, [r7, #8] + 802ad4a: 429a cmp r2, r3 + 802ad4c: d202 bcs.n 802ad54 && (rxdataready == 0U)) - 802ad1e: 7bfb ldrb r3, [r7, #15] - 802ad20: 2b00 cmp r3, #0 - 802ad22: d08c beq.n 802ac3e + 802ad4e: 7bfb ldrb r3, [r7, #15] + 802ad50: 2b00 cmp r3, #0 + 802ad52: d08c beq.n 802ac6e } heth->RxDescList.RxBuildDescCnt += desccnt; - 802ad24: 687b ldr r3, [r7, #4] - 802ad26: 6eda ldr r2, [r3, #108] ; 0x6c - 802ad28: 697b ldr r3, [r7, #20] - 802ad2a: 441a add r2, r3 - 802ad2c: 687b ldr r3, [r7, #4] - 802ad2e: 66da str r2, [r3, #108] ; 0x6c + 802ad54: 687b ldr r3, [r7, #4] + 802ad56: 6eda ldr r2, [r3, #108] ; 0x6c + 802ad58: 697b ldr r3, [r7, #20] + 802ad5a: 441a add r2, r3 + 802ad5c: 687b ldr r3, [r7, #4] + 802ad5e: 66da str r2, [r3, #108] ; 0x6c if ((heth->RxDescList.RxBuildDescCnt) != 0U) - 802ad30: 687b ldr r3, [r7, #4] - 802ad32: 6edb ldr r3, [r3, #108] ; 0x6c - 802ad34: 2b00 cmp r3, #0 - 802ad36: d002 beq.n 802ad3e + 802ad60: 687b ldr r3, [r7, #4] + 802ad62: 6edb ldr r3, [r3, #108] ; 0x6c + 802ad64: 2b00 cmp r3, #0 + 802ad66: d002 beq.n 802ad6e { /* Update Descriptors */ ETH_UpdateDescriptor(heth); - 802ad38: 6878 ldr r0, [r7, #4] - 802ad3a: f000 f814 bl 802ad66 + 802ad68: 6878 ldr r0, [r7, #4] + 802ad6a: f000 f814 bl 802ad96 } heth->RxDescList.RxDescIdx = descidx; - 802ad3e: 687b ldr r3, [r7, #4] - 802ad40: 69fa ldr r2, [r7, #28] - 802ad42: 65da str r2, [r3, #92] ; 0x5c + 802ad6e: 687b ldr r3, [r7, #4] + 802ad70: 69fa ldr r2, [r7, #28] + 802ad72: 65da str r2, [r3, #92] ; 0x5c if (rxdataready == 1U) - 802ad44: 7bfb ldrb r3, [r7, #15] - 802ad46: 2b01 cmp r3, #1 - 802ad48: d108 bne.n 802ad5c + 802ad74: 7bfb ldrb r3, [r7, #15] + 802ad76: 2b01 cmp r3, #1 + 802ad78: d108 bne.n 802ad8c { /* Return received packet */ *pAppBuff = heth->RxDescList.pRxStart; - 802ad4a: 687b ldr r3, [r7, #4] - 802ad4c: 6fda ldr r2, [r3, #124] ; 0x7c - 802ad4e: 683b ldr r3, [r7, #0] - 802ad50: 601a str r2, [r3, #0] + 802ad7a: 687b ldr r3, [r7, #4] + 802ad7c: 6fda ldr r2, [r3, #124] ; 0x7c + 802ad7e: 683b ldr r3, [r7, #0] + 802ad80: 601a str r2, [r3, #0] /* Reset first element */ heth->RxDescList.pRxStart = NULL; - 802ad52: 687b ldr r3, [r7, #4] - 802ad54: 2200 movs r2, #0 - 802ad56: 67da str r2, [r3, #124] ; 0x7c + 802ad82: 687b ldr r3, [r7, #4] + 802ad84: 2200 movs r2, #0 + 802ad86: 67da str r2, [r3, #124] ; 0x7c return HAL_OK; - 802ad58: 2300 movs r3, #0 - 802ad5a: e000 b.n 802ad5e + 802ad88: 2300 movs r3, #0 + 802ad8a: e000 b.n 802ad8e } /* Packet not ready */ return HAL_ERROR; - 802ad5c: 2301 movs r3, #1 + 802ad8c: 2301 movs r3, #1 } - 802ad5e: 4618 mov r0, r3 - 802ad60: 3720 adds r7, #32 - 802ad62: 46bd mov sp, r7 - 802ad64: bd80 pop {r7, pc} + 802ad8e: 4618 mov r0, r3 + 802ad90: 3720 adds r7, #32 + 802ad92: 46bd mov sp, r7 + 802ad94: bd80 pop {r7, pc} -0802ad66 : +0802ad96 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth) { - 802ad66: b580 push {r7, lr} - 802ad68: b088 sub sp, #32 - 802ad6a: af00 add r7, sp, #0 - 802ad6c: 6078 str r0, [r7, #4] + 802ad96: b580 push {r7, lr} + 802ad98: b088 sub sp, #32 + 802ad9a: af00 add r7, sp, #0 + 802ad9c: 6078 str r0, [r7, #4] uint32_t descidx; uint32_t desccount; ETH_DMADescTypeDef *dmarxdesc; uint8_t *buff = NULL; - 802ad6e: 2300 movs r3, #0 - 802ad70: 60fb str r3, [r7, #12] + 802ad9e: 2300 movs r3, #0 + 802ada0: 60fb str r3, [r7, #12] uint8_t allocStatus = 1U; - 802ad72: 2301 movs r3, #1 - 802ad74: 74fb strb r3, [r7, #19] + 802ada2: 2301 movs r3, #1 + 802ada4: 74fb strb r3, [r7, #19] descidx = heth->RxDescList.RxBuildDescIdx; - 802ad76: 687b ldr r3, [r7, #4] - 802ad78: 6e9b ldr r3, [r3, #104] ; 0x68 - 802ad7a: 61fb str r3, [r7, #28] + 802ada6: 687b ldr r3, [r7, #4] + 802ada8: 6e9b ldr r3, [r3, #104] ; 0x68 + 802adaa: 61fb str r3, [r7, #28] dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; - 802ad7c: 687b ldr r3, [r7, #4] - 802ad7e: 69fa ldr r2, [r7, #28] - 802ad80: 3212 adds r2, #18 - 802ad82: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802ad86: 617b str r3, [r7, #20] + 802adac: 687b ldr r3, [r7, #4] + 802adae: 69fa ldr r2, [r7, #28] + 802adb0: 3212 adds r2, #18 + 802adb2: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802adb6: 617b str r3, [r7, #20] desccount = heth->RxDescList.RxBuildDescCnt; - 802ad88: 687b ldr r3, [r7, #4] - 802ad8a: 6edb ldr r3, [r3, #108] ; 0x6c - 802ad8c: 61bb str r3, [r7, #24] + 802adb8: 687b ldr r3, [r7, #4] + 802adba: 6edb ldr r3, [r3, #108] ; 0x6c + 802adbc: 61bb str r3, [r7, #24] while ((desccount > 0U) && (allocStatus != 0U)) - 802ad8e: e03b b.n 802ae08 + 802adbe: e03b b.n 802ae38 { /* Check if a buffer's attached the descriptor */ if (READ_REG(dmarxdesc->BackupAddr0) == 0U) - 802ad90: 697b ldr r3, [r7, #20] - 802ad92: 691b ldr r3, [r3, #16] - 802ad94: 2b00 cmp r3, #0 - 802ad96: d112 bne.n 802adbe + 802adc0: 697b ldr r3, [r7, #20] + 802adc2: 691b ldr r3, [r3, #16] + 802adc4: 2b00 cmp r3, #0 + 802adc6: d112 bne.n 802adee #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /*Call registered Allocate callback*/ heth->rxAllocateCallback(&buff); #else /* Allocate callback */ HAL_ETH_RxAllocateCallback(&buff); - 802ad98: f107 030c add.w r3, r7, #12 - 802ad9c: 4618 mov r0, r3 - 802ad9e: f00a ffeb bl 8035d78 + 802adc8: f107 030c add.w r3, r7, #12 + 802adcc: 4618 mov r0, r3 + 802adce: f00a ffeb bl 8035da8 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ if (buff == NULL) - 802ada2: 68fb ldr r3, [r7, #12] - 802ada4: 2b00 cmp r3, #0 - 802ada6: d102 bne.n 802adae + 802add2: 68fb ldr r3, [r7, #12] + 802add4: 2b00 cmp r3, #0 + 802add6: d102 bne.n 802adde { allocStatus = 0U; - 802ada8: 2300 movs r3, #0 - 802adaa: 74fb strb r3, [r7, #19] - 802adac: e007 b.n 802adbe + 802add8: 2300 movs r3, #0 + 802adda: 74fb strb r3, [r7, #19] + 802addc: e007 b.n 802adee } else { WRITE_REG(dmarxdesc->BackupAddr0, (uint32_t)buff); - 802adae: 68fb ldr r3, [r7, #12] - 802adb0: 461a mov r2, r3 - 802adb2: 697b ldr r3, [r7, #20] - 802adb4: 611a str r2, [r3, #16] + 802adde: 68fb ldr r3, [r7, #12] + 802ade0: 461a mov r2, r3 + 802ade2: 697b ldr r3, [r7, #20] + 802ade4: 611a str r2, [r3, #16] WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff); - 802adb6: 68fb ldr r3, [r7, #12] - 802adb8: 461a mov r2, r3 - 802adba: 697b ldr r3, [r7, #20] - 802adbc: 601a str r2, [r3, #0] + 802ade6: 68fb ldr r3, [r7, #12] + 802ade8: 461a mov r2, r3 + 802adea: 697b ldr r3, [r7, #20] + 802adec: 601a str r2, [r3, #0] } } if (allocStatus != 0U) - 802adbe: 7cfb ldrb r3, [r7, #19] - 802adc0: 2b00 cmp r3, #0 - 802adc2: d021 beq.n 802ae08 + 802adee: 7cfb ldrb r3, [r7, #19] + 802adf0: 2b00 cmp r3, #0 + 802adf2: d021 beq.n 802ae38 __ASM volatile ("dmb 0xF":::"memory"); - 802adc4: f3bf 8f5f dmb sy + 802adf4: f3bf 8f5f dmb sy } - 802adc8: bf00 nop + 802adf8: bf00 nop { /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); if (heth->RxDescList.ItMode != 0U) - 802adca: 687b ldr r3, [r7, #4] - 802adcc: 6d9b ldr r3, [r3, #88] ; 0x58 - 802adce: 2b00 cmp r3, #0 - 802add0: d004 beq.n 802addc + 802adfa: 687b ldr r3, [r7, #4] + 802adfc: 6d9b ldr r3, [r3, #88] ; 0x58 + 802adfe: 2b00 cmp r3, #0 + 802ae00: d004 beq.n 802ae0c { WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC); - 802add2: 697b ldr r3, [r7, #20] - 802add4: f04f 4241 mov.w r2, #3238002688 ; 0xc1000000 - 802add8: 60da str r2, [r3, #12] - 802adda: e003 b.n 802ade4 + 802ae02: 697b ldr r3, [r7, #20] + 802ae04: f04f 4241 mov.w r2, #3238002688 ; 0xc1000000 + 802ae08: 60da str r2, [r3, #12] + 802ae0a: e003 b.n 802ae14 } else { WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V); - 802addc: 697b ldr r3, [r7, #20] - 802adde: f04f 4201 mov.w r2, #2164260864 ; 0x81000000 - 802ade2: 60da str r2, [r3, #12] + 802ae0c: 697b ldr r3, [r7, #20] + 802ae0e: f04f 4201 mov.w r2, #2164260864 ; 0x81000000 + 802ae12: 60da str r2, [r3, #12] } /* Increment current rx descriptor index */ INCR_RX_DESC_INDEX(descidx, 1U); - 802ade4: 69fb ldr r3, [r7, #28] - 802ade6: 3301 adds r3, #1 - 802ade8: 61fb str r3, [r7, #28] - 802adea: 69fb ldr r3, [r7, #28] - 802adec: 2b03 cmp r3, #3 - 802adee: d902 bls.n 802adf6 - 802adf0: 69fb ldr r3, [r7, #28] - 802adf2: 3b04 subs r3, #4 - 802adf4: 61fb str r3, [r7, #28] + 802ae14: 69fb ldr r3, [r7, #28] + 802ae16: 3301 adds r3, #1 + 802ae18: 61fb str r3, [r7, #28] + 802ae1a: 69fb ldr r3, [r7, #28] + 802ae1c: 2b03 cmp r3, #3 + 802ae1e: d902 bls.n 802ae26 + 802ae20: 69fb ldr r3, [r7, #28] + 802ae22: 3b04 subs r3, #4 + 802ae24: 61fb str r3, [r7, #28] /* Get current descriptor address */ dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; - 802adf6: 687b ldr r3, [r7, #4] - 802adf8: 69fa ldr r2, [r7, #28] - 802adfa: 3212 adds r2, #18 - 802adfc: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802ae00: 617b str r3, [r7, #20] + 802ae26: 687b ldr r3, [r7, #4] + 802ae28: 69fa ldr r2, [r7, #28] + 802ae2a: 3212 adds r2, #18 + 802ae2c: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802ae30: 617b str r3, [r7, #20] desccount--; - 802ae02: 69bb ldr r3, [r7, #24] - 802ae04: 3b01 subs r3, #1 - 802ae06: 61bb str r3, [r7, #24] + 802ae32: 69bb ldr r3, [r7, #24] + 802ae34: 3b01 subs r3, #1 + 802ae36: 61bb str r3, [r7, #24] while ((desccount > 0U) && (allocStatus != 0U)) - 802ae08: 69bb ldr r3, [r7, #24] - 802ae0a: 2b00 cmp r3, #0 - 802ae0c: d002 beq.n 802ae14 - 802ae0e: 7cfb ldrb r3, [r7, #19] - 802ae10: 2b00 cmp r3, #0 - 802ae12: d1bd bne.n 802ad90 + 802ae38: 69bb ldr r3, [r7, #24] + 802ae3a: 2b00 cmp r3, #0 + 802ae3c: d002 beq.n 802ae44 + 802ae3e: 7cfb ldrb r3, [r7, #19] + 802ae40: 2b00 cmp r3, #0 + 802ae42: d1bd bne.n 802adc0 } } if (heth->RxDescList.RxBuildDescCnt != desccount) - 802ae14: 687b ldr r3, [r7, #4] - 802ae16: 6edb ldr r3, [r3, #108] ; 0x6c - 802ae18: 69ba ldr r2, [r7, #24] - 802ae1a: 429a cmp r2, r3 - 802ae1c: d00d beq.n 802ae3a + 802ae44: 687b ldr r3, [r7, #4] + 802ae46: 6edb ldr r3, [r3, #108] ; 0x6c + 802ae48: 69ba ldr r2, [r7, #24] + 802ae4a: 429a cmp r2, r3 + 802ae4c: d00d beq.n 802ae6a { /* Set the Tail pointer address */ WRITE_REG(heth->Instance->DMACRDTPR, 0); - 802ae1e: 687b ldr r3, [r7, #4] - 802ae20: 681b ldr r3, [r3, #0] - 802ae22: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ae26: 461a mov r2, r3 - 802ae28: 2300 movs r3, #0 - 802ae2a: f8c2 3128 str.w r3, [r2, #296] ; 0x128 + 802ae4e: 687b ldr r3, [r7, #4] + 802ae50: 681b ldr r3, [r3, #0] + 802ae52: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ae56: 461a mov r2, r3 + 802ae58: 2300 movs r3, #0 + 802ae5a: f8c2 3128 str.w r3, [r2, #296] ; 0x128 heth->RxDescList.RxBuildDescIdx = descidx; - 802ae2e: 687b ldr r3, [r7, #4] - 802ae30: 69fa ldr r2, [r7, #28] - 802ae32: 669a str r2, [r3, #104] ; 0x68 + 802ae5e: 687b ldr r3, [r7, #4] + 802ae60: 69fa ldr r2, [r7, #28] + 802ae62: 669a str r2, [r3, #104] ; 0x68 heth->RxDescList.RxBuildDescCnt = desccount; - 802ae34: 687b ldr r3, [r7, #4] - 802ae36: 69ba ldr r2, [r7, #24] - 802ae38: 66da str r2, [r3, #108] ; 0x6c + 802ae64: 687b ldr r3, [r7, #4] + 802ae66: 69ba ldr r2, [r7, #24] + 802ae68: 66da str r2, [r3, #108] ; 0x6c } } - 802ae3a: bf00 nop - 802ae3c: 3720 adds r7, #32 - 802ae3e: 46bd mov sp, r7 - 802ae40: bd80 pop {r7, pc} + 802ae6a: bf00 nop + 802ae6c: 3720 adds r7, #32 + 802ae6e: 46bd mov sp, r7 + 802ae70: bd80 pop {r7, pc} ... -0802ae44 : +0802ae74 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth) { - 802ae44: b580 push {r7, lr} - 802ae46: b084 sub sp, #16 - 802ae48: af00 add r7, sp, #0 - 802ae4a: 6078 str r0, [r7, #4] + 802ae74: b580 push {r7, lr} + 802ae76: b084 sub sp, #16 + 802ae78: af00 add r7, sp, #0 + 802ae7a: 6078 str r0, [r7, #4] uint32_t macirqenable; /* Packet received */ if (__HAL_ETH_DMA_GET_IT(heth, ETH_DMACSR_RI)) - 802ae4c: 687b ldr r3, [r7, #4] - 802ae4e: 681b ldr r3, [r3, #0] - 802ae50: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ae54: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802ae58: f003 0340 and.w r3, r3, #64 ; 0x40 - 802ae5c: 2b40 cmp r3, #64 ; 0x40 - 802ae5e: d115 bne.n 802ae8c + 802ae7c: 687b ldr r3, [r7, #4] + 802ae7e: 681b ldr r3, [r3, #0] + 802ae80: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ae84: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802ae88: f003 0340 and.w r3, r3, #64 ; 0x40 + 802ae8c: 2b40 cmp r3, #64 ; 0x40 + 802ae8e: d115 bne.n 802aebc { if (__HAL_ETH_DMA_GET_IT_SOURCE(heth, ETH_DMACIER_RIE)) - 802ae60: 687b ldr r3, [r7, #4] - 802ae62: 681b ldr r3, [r3, #0] - 802ae64: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ae68: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 - 802ae6c: f003 0340 and.w r3, r3, #64 ; 0x40 - 802ae70: 2b40 cmp r3, #64 ; 0x40 - 802ae72: d10b bne.n 802ae8c + 802ae90: 687b ldr r3, [r7, #4] + 802ae92: 681b ldr r3, [r3, #0] + 802ae94: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ae98: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 + 802ae9c: f003 0340 and.w r3, r3, #64 ; 0x40 + 802aea0: 2b40 cmp r3, #64 ; 0x40 + 802aea2: d10b bne.n 802aebc { /* Clear the Eth DMA Rx IT pending bits */ __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_RI | ETH_DMACSR_NIS); - 802ae74: 687b ldr r3, [r7, #4] - 802ae76: 681b ldr r3, [r3, #0] - 802ae78: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ae7c: 461a mov r2, r3 - 802ae7e: f248 0340 movw r3, #32832 ; 0x8040 - 802ae82: f8c2 3160 str.w r3, [r2, #352] ; 0x160 + 802aea4: 687b ldr r3, [r7, #4] + 802aea6: 681b ldr r3, [r3, #0] + 802aea8: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aeac: 461a mov r2, r3 + 802aeae: f248 0340 movw r3, #32832 ; 0x8040 + 802aeb2: f8c2 3160 str.w r3, [r2, #352] ; 0x160 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /*Call registered Receive complete callback*/ heth->RxCpltCallback(heth); #else /* Receive complete callback */ HAL_ETH_RxCpltCallback(heth); - 802ae86: 6878 ldr r0, [r7, #4] - 802ae88: f000 f8f6 bl 802b078 + 802aeb6: 6878 ldr r0, [r7, #4] + 802aeb8: f000 f8f6 bl 802b0a8 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ } } /* Packet transmitted */ if (__HAL_ETH_DMA_GET_IT(heth, ETH_DMACSR_TI)) - 802ae8c: 687b ldr r3, [r7, #4] - 802ae8e: 681b ldr r3, [r3, #0] - 802ae90: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ae94: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802ae98: f003 0301 and.w r3, r3, #1 - 802ae9c: 2b01 cmp r3, #1 - 802ae9e: d115 bne.n 802aecc + 802aebc: 687b ldr r3, [r7, #4] + 802aebe: 681b ldr r3, [r3, #0] + 802aec0: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aec4: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802aec8: f003 0301 and.w r3, r3, #1 + 802aecc: 2b01 cmp r3, #1 + 802aece: d115 bne.n 802aefc { if (__HAL_ETH_DMA_GET_IT_SOURCE(heth, ETH_DMACIER_TIE)) - 802aea0: 687b ldr r3, [r7, #4] - 802aea2: 681b ldr r3, [r3, #0] - 802aea4: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aea8: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 - 802aeac: f003 0301 and.w r3, r3, #1 - 802aeb0: 2b01 cmp r3, #1 - 802aeb2: d10b bne.n 802aecc + 802aed0: 687b ldr r3, [r7, #4] + 802aed2: 681b ldr r3, [r3, #0] + 802aed4: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aed8: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 + 802aedc: f003 0301 and.w r3, r3, #1 + 802aee0: 2b01 cmp r3, #1 + 802aee2: d10b bne.n 802aefc { /* Clear the Eth DMA Tx IT pending bits */ __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_TI | ETH_DMACSR_NIS); - 802aeb4: 687b ldr r3, [r7, #4] - 802aeb6: 681b ldr r3, [r3, #0] - 802aeb8: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aebc: 461a mov r2, r3 - 802aebe: f248 0301 movw r3, #32769 ; 0x8001 - 802aec2: f8c2 3160 str.w r3, [r2, #352] ; 0x160 + 802aee4: 687b ldr r3, [r7, #4] + 802aee6: 681b ldr r3, [r3, #0] + 802aee8: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aeec: 461a mov r2, r3 + 802aeee: f248 0301 movw r3, #32769 ; 0x8001 + 802aef2: f8c2 3160 str.w r3, [r2, #352] ; 0x160 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /*Call registered Transmit complete callback*/ heth->TxCpltCallback(heth); #else /* Transfer complete callback */ HAL_ETH_TxCpltCallback(heth); - 802aec6: 6878 ldr r0, [r7, #4] - 802aec8: f000 f8cc bl 802b064 + 802aef6: 6878 ldr r0, [r7, #4] + 802aef8: f000 f8cc bl 802b094 } } /* ETH DMA Error */ if (__HAL_ETH_DMA_GET_IT(heth, ETH_DMACSR_AIS)) - 802aecc: 687b ldr r3, [r7, #4] - 802aece: 681b ldr r3, [r3, #0] - 802aed0: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aed4: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802aed8: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 802aedc: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 802aee0: d153 bne.n 802af8a + 802aefc: 687b ldr r3, [r7, #4] + 802aefe: 681b ldr r3, [r3, #0] + 802af00: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af04: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802af08: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 802af0c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 802af10: d153 bne.n 802afba { if (__HAL_ETH_DMA_GET_IT_SOURCE(heth, ETH_DMACIER_AIE)) - 802aee2: 687b ldr r3, [r7, #4] - 802aee4: 681b ldr r3, [r3, #0] - 802aee6: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aeea: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 - 802aeee: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 802aef2: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 802aef6: d148 bne.n 802af8a + 802af12: 687b ldr r3, [r7, #4] + 802af14: 681b ldr r3, [r3, #0] + 802af16: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af1a: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 + 802af1e: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 802af22: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 802af26: d148 bne.n 802afba { heth->ErrorCode |= HAL_ETH_ERROR_DMA; - 802aef8: 687b ldr r3, [r7, #4] - 802aefa: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802aefe: f043 0208 orr.w r2, r3, #8 - 802af02: 687b ldr r3, [r7, #4] - 802af04: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802af28: 687b ldr r3, [r7, #4] + 802af2a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802af2e: f043 0208 orr.w r2, r3, #8 + 802af32: 687b ldr r3, [r7, #4] + 802af34: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* if fatal bus error occurred */ if (__HAL_ETH_DMA_GET_IT(heth, ETH_DMACSR_FBE)) - 802af08: 687b ldr r3, [r7, #4] - 802af0a: 681b ldr r3, [r3, #0] - 802af0c: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af10: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802af14: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 802af18: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 802af1c: d11e bne.n 802af5c + 802af38: 687b ldr r3, [r7, #4] + 802af3a: 681b ldr r3, [r3, #0] + 802af3c: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af40: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802af44: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 802af48: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 802af4c: d11e bne.n 802af8c { /* Get DMA error code */ heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_FBE | ETH_DMACSR_TPS | ETH_DMACSR_RPS)); - 802af1e: 687b ldr r3, [r7, #4] - 802af20: 681b ldr r3, [r3, #0] - 802af22: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af26: f8d3 2160 ldr.w r2, [r3, #352] ; 0x160 - 802af2a: f241 1302 movw r3, #4354 ; 0x1102 - 802af2e: 4013 ands r3, r2 - 802af30: 687a ldr r2, [r7, #4] - 802af32: f8c2 308c str.w r3, [r2, #140] ; 0x8c + 802af4e: 687b ldr r3, [r7, #4] + 802af50: 681b ldr r3, [r3, #0] + 802af52: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af56: f8d3 2160 ldr.w r2, [r3, #352] ; 0x160 + 802af5a: f241 1302 movw r3, #4354 ; 0x1102 + 802af5e: 4013 ands r3, r2 + 802af60: 687a ldr r2, [r7, #4] + 802af62: f8c2 308c str.w r3, [r2, #140] ; 0x8c /* Disable all interrupts */ __HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMACIER_NIE | ETH_DMACIER_AIE); - 802af36: 687b ldr r3, [r7, #4] - 802af38: 681b ldr r3, [r3, #0] - 802af3a: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af3e: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 - 802af42: 687a ldr r2, [r7, #4] - 802af44: 6812 ldr r2, [r2, #0] - 802af46: f423 4340 bic.w r3, r3, #49152 ; 0xc000 - 802af4a: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802af4e: f8c2 3134 str.w r3, [r2, #308] ; 0x134 + 802af66: 687b ldr r3, [r7, #4] + 802af68: 681b ldr r3, [r3, #0] + 802af6a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af6e: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 + 802af72: 687a ldr r2, [r7, #4] + 802af74: 6812 ldr r2, [r2, #0] + 802af76: f423 4340 bic.w r3, r3, #49152 ; 0xc000 + 802af7a: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802af7e: f8c2 3134 str.w r3, [r2, #308] ; 0x134 /* Set HAL state to ERROR */ heth->gState = HAL_ETH_STATE_ERROR; - 802af52: 687b ldr r3, [r7, #4] - 802af54: 22e0 movs r2, #224 ; 0xe0 - 802af56: f8c3 2084 str.w r2, [r3, #132] ; 0x84 - 802af5a: e013 b.n 802af84 + 802af82: 687b ldr r3, [r7, #4] + 802af84: 22e0 movs r2, #224 ; 0xe0 + 802af86: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802af8a: e013 b.n 802afb4 } else { /* Get DMA error status */ heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT | - 802af5c: 687b ldr r3, [r7, #4] - 802af5e: 681b ldr r3, [r3, #0] - 802af60: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af64: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802af68: f403 42cd and.w r2, r3, #26240 ; 0x6680 - 802af6c: 687b ldr r3, [r7, #4] - 802af6e: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 802af8c: 687b ldr r3, [r7, #4] + 802af8e: 681b ldr r3, [r3, #0] + 802af90: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af94: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802af98: f403 42cd and.w r2, r3, #26240 ; 0x6680 + 802af9c: 687b ldr r3, [r7, #4] + 802af9e: f8c3 208c str.w r2, [r3, #140] ; 0x8c ETH_DMACSR_RBU | ETH_DMACSR_AIS)); /* Clear the interrupt summary flag */ __HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT | - 802af72: 687b ldr r3, [r7, #4] - 802af74: 681b ldr r3, [r3, #0] - 802af76: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af7a: 461a mov r2, r3 - 802af7c: f44f 43cd mov.w r3, #26240 ; 0x6680 - 802af80: f8c2 3160 str.w r3, [r2, #352] ; 0x160 + 802afa2: 687b ldr r3, [r7, #4] + 802afa4: 681b ldr r3, [r3, #0] + 802afa6: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802afaa: 461a mov r2, r3 + 802afac: f44f 43cd mov.w r3, #26240 ; 0x6680 + 802afb0: f8c2 3160 str.w r3, [r2, #352] ; 0x160 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered Error callback*/ heth->ErrorCallback(heth); #else /* Ethernet DMA Error callback */ HAL_ETH_ErrorCallback(heth); - 802af84: 6878 ldr r0, [r7, #4] - 802af86: f000 f881 bl 802b08c + 802afb4: 6878 ldr r0, [r7, #4] + 802afb6: f000 f881 bl 802b0bc } } /* ETH MAC Error IT */ macirqenable = heth->Instance->MACIER; - 802af8a: 687b ldr r3, [r7, #4] - 802af8c: 681b ldr r3, [r3, #0] - 802af8e: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 802af92: 60fb str r3, [r7, #12] + 802afba: 687b ldr r3, [r7, #4] + 802afbc: 681b ldr r3, [r3, #0] + 802afbe: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 802afc2: 60fb str r3, [r7, #12] if (((macirqenable & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \ - 802af94: 68fb ldr r3, [r7, #12] - 802af96: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 802af9a: 2b00 cmp r3, #0 - 802af9c: d104 bne.n 802afa8 + 802afc4: 68fb ldr r3, [r7, #12] + 802afc6: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 802afca: 2b00 cmp r3, #0 + 802afcc: d104 bne.n 802afd8 ((macirqenable & ETH_MACIER_TXSTSIE) == ETH_MACIER_TXSTSIE)) - 802af9e: 68fb ldr r3, [r7, #12] - 802afa0: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 802afce: 68fb ldr r3, [r7, #12] + 802afd0: f403 5300 and.w r3, r3, #8192 ; 0x2000 if (((macirqenable & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \ - 802afa4: 2b00 cmp r3, #0 - 802afa6: d019 beq.n 802afdc + 802afd4: 2b00 cmp r3, #0 + 802afd6: d019 beq.n 802b00c { heth->ErrorCode |= HAL_ETH_ERROR_MAC; - 802afa8: 687b ldr r3, [r7, #4] - 802afaa: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802afae: f043 0210 orr.w r2, r3, #16 - 802afb2: 687b ldr r3, [r7, #4] - 802afb4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802afd8: 687b ldr r3, [r7, #4] + 802afda: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802afde: f043 0210 orr.w r2, r3, #16 + 802afe2: 687b ldr r3, [r7, #4] + 802afe4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Get MAC Rx Tx status and clear Status register pending bit */ heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR); - 802afb8: 687b ldr r3, [r7, #4] - 802afba: 681b ldr r3, [r3, #0] - 802afbc: f8d3 20b8 ldr.w r2, [r3, #184] ; 0xb8 - 802afc0: 687b ldr r3, [r7, #4] - 802afc2: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 802afe8: 687b ldr r3, [r7, #4] + 802afea: 681b ldr r3, [r3, #0] + 802afec: f8d3 20b8 ldr.w r2, [r3, #184] ; 0xb8 + 802aff0: 687b ldr r3, [r7, #4] + 802aff2: f8c3 2090 str.w r2, [r3, #144] ; 0x90 heth->gState = HAL_ETH_STATE_ERROR; - 802afc6: 687b ldr r3, [r7, #4] - 802afc8: 22e0 movs r2, #224 ; 0xe0 - 802afca: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802aff6: 687b ldr r3, [r7, #4] + 802aff8: 22e0 movs r2, #224 ; 0xe0 + 802affa: f8c3 2084 str.w r2, [r3, #132] ; 0x84 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered Error callback*/ heth->ErrorCallback(heth); #else /* Ethernet Error callback */ HAL_ETH_ErrorCallback(heth); - 802afce: 6878 ldr r0, [r7, #4] - 802afd0: f000 f85c bl 802b08c + 802affe: 6878 ldr r0, [r7, #4] + 802b000: f000 f85c bl 802b0bc #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ heth->MACErrorCode = (uint32_t)(0x0U); - 802afd4: 687b ldr r3, [r7, #4] - 802afd6: 2200 movs r2, #0 - 802afd8: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 802b004: 687b ldr r3, [r7, #4] + 802b006: 2200 movs r2, #0 + 802b008: f8c3 2090 str.w r2, [r3, #144] ; 0x90 } /* ETH PMT IT */ if (__HAL_ETH_MAC_GET_IT(heth, ETH_MAC_PMT_IT)) - 802afdc: 687b ldr r3, [r7, #4] - 802afde: 681b ldr r3, [r3, #0] - 802afe0: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802afe4: f003 0310 and.w r3, r3, #16 - 802afe8: 2b10 cmp r3, #16 - 802afea: d10f bne.n 802b00c + 802b00c: 687b ldr r3, [r7, #4] + 802b00e: 681b ldr r3, [r3, #0] + 802b010: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802b014: f003 0310 and.w r3, r3, #16 + 802b018: 2b10 cmp r3, #16 + 802b01a: d10f bne.n 802b03c { /* Get MAC Wake-up source and clear the status register pending bit */ heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPRCVD)); - 802afec: 687b ldr r3, [r7, #4] - 802afee: 681b ldr r3, [r3, #0] - 802aff0: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802aff4: f003 0260 and.w r2, r3, #96 ; 0x60 - 802aff8: 687b ldr r3, [r7, #4] - 802affa: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 802b01c: 687b ldr r3, [r7, #4] + 802b01e: 681b ldr r3, [r3, #0] + 802b020: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802b024: f003 0260 and.w r2, r3, #96 ; 0x60 + 802b028: 687b ldr r3, [r7, #4] + 802b02a: f8c3 2094 str.w r2, [r3, #148] ; 0x94 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered PMT callback*/ heth->PMTCallback(heth); #else /* Ethernet PMT callback */ HAL_ETH_PMTCallback(heth); - 802affe: 6878 ldr r0, [r7, #4] - 802b000: f000 f84e bl 802b0a0 + 802b02e: 6878 ldr r0, [r7, #4] + 802b030: f000 f84e bl 802b0d0 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ heth->MACWakeUpEvent = (uint32_t)(0x0U); - 802b004: 687b ldr r3, [r7, #4] - 802b006: 2200 movs r2, #0 - 802b008: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 802b034: 687b ldr r3, [r7, #4] + 802b036: 2200 movs r2, #0 + 802b038: f8c3 2094 str.w r2, [r3, #148] ; 0x94 } /* ETH EEE IT */ if (__HAL_ETH_MAC_GET_IT(heth, ETH_MAC_LPI_IT)) - 802b00c: 687b ldr r3, [r7, #4] - 802b00e: 681b ldr r3, [r3, #0] - 802b010: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802b014: f003 0320 and.w r3, r3, #32 - 802b018: 2b20 cmp r3, #32 - 802b01a: d10f bne.n 802b03c + 802b03c: 687b ldr r3, [r7, #4] + 802b03e: 681b ldr r3, [r3, #0] + 802b040: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802b044: f003 0320 and.w r3, r3, #32 + 802b048: 2b20 cmp r3, #32 + 802b04a: d10f bne.n 802b06c { /* Get MAC LPI interrupt source and clear the status register pending bit */ heth->MACLPIEvent = READ_BIT(heth->Instance->MACPCSR, 0x0000000FU); - 802b01c: 687b ldr r3, [r7, #4] - 802b01e: 681b ldr r3, [r3, #0] - 802b020: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802b024: f003 020f and.w r2, r3, #15 - 802b028: 687b ldr r3, [r7, #4] - 802b02a: f8c3 2098 str.w r2, [r3, #152] ; 0x98 + 802b04c: 687b ldr r3, [r7, #4] + 802b04e: 681b ldr r3, [r3, #0] + 802b050: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802b054: f003 020f and.w r2, r3, #15 + 802b058: 687b ldr r3, [r7, #4] + 802b05a: f8c3 2098 str.w r2, [r3, #152] ; 0x98 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered EEE callback*/ heth->EEECallback(heth); #else /* Ethernet EEE callback */ HAL_ETH_EEECallback(heth); - 802b02e: 6878 ldr r0, [r7, #4] - 802b030: f000 f840 bl 802b0b4 + 802b05e: 6878 ldr r0, [r7, #4] + 802b060: f000 f840 bl 802b0e4 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ heth->MACLPIEvent = (uint32_t)(0x0U); - 802b034: 687b ldr r3, [r7, #4] - 802b036: 2200 movs r2, #0 - 802b038: f8c3 2098 str.w r2, [r3, #152] ; 0x98 + 802b064: 687b ldr r3, [r7, #4] + 802b066: 2200 movs r2, #0 + 802b068: f8c3 2098 str.w r2, [r3, #152] ; 0x98 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ } } #else /* USE_HAL_ETH_REGISTER_CALLBACKS */ /* check ETH WAKEUP exti flag */ if (__HAL_ETH_WAKEUP_EXTI_GET_FLAG(ETH_WAKEUP_EXTI_LINE) != (uint32_t)RESET) - 802b03c: 4b08 ldr r3, [pc, #32] ; (802b060 ) - 802b03e: 6a9b ldr r3, [r3, #40] ; 0x28 - 802b040: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 802b044: 2b00 cmp r3, #0 - 802b046: d006 beq.n 802b056 + 802b06c: 4b08 ldr r3, [pc, #32] ; (802b090 ) + 802b06e: 6a9b ldr r3, [r3, #40] ; 0x28 + 802b070: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 802b074: 2b00 cmp r3, #0 + 802b076: d006 beq.n 802b086 { /* Clear ETH WAKEUP Exti pending bit */ __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG(ETH_WAKEUP_EXTI_LINE); - 802b048: 4b05 ldr r3, [pc, #20] ; (802b060 ) - 802b04a: f44f 0280 mov.w r2, #4194304 ; 0x400000 - 802b04e: 629a str r2, [r3, #40] ; 0x28 + 802b078: 4b05 ldr r3, [pc, #20] ; (802b090 ) + 802b07a: f44f 0280 mov.w r2, #4194304 ; 0x400000 + 802b07e: 629a str r2, [r3, #40] ; 0x28 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered WakeUp callback*/ heth->WakeUpCallback(heth); #else /* ETH WAKEUP callback */ HAL_ETH_WakeUpCallback(heth); - 802b050: 6878 ldr r0, [r7, #4] - 802b052: f000 f839 bl 802b0c8 + 802b080: 6878 ldr r0, [r7, #4] + 802b082: f000 f839 bl 802b0f8 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ } #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ } - 802b056: bf00 nop - 802b058: 3710 adds r7, #16 - 802b05a: 46bd mov sp, r7 - 802b05c: bd80 pop {r7, pc} - 802b05e: bf00 nop - 802b060: 58000080 .word 0x58000080 + 802b086: bf00 nop + 802b088: 3710 adds r7, #16 + 802b08a: 46bd mov sp, r7 + 802b08c: bd80 pop {r7, pc} + 802b08e: bf00 nop + 802b090: 58000080 .word 0x58000080 -0802b064 : +0802b094 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth) { - 802b064: b480 push {r7} - 802b066: b083 sub sp, #12 - 802b068: af00 add r7, sp, #0 - 802b06a: 6078 str r0, [r7, #4] + 802b094: b480 push {r7} + 802b096: b083 sub sp, #12 + 802b098: af00 add r7, sp, #0 + 802b09a: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_TxCpltCallback could be implemented in the user file */ } - 802b06c: bf00 nop - 802b06e: 370c adds r7, #12 - 802b070: 46bd mov sp, r7 - 802b072: f85d 7b04 ldr.w r7, [sp], #4 - 802b076: 4770 bx lr + 802b09c: bf00 nop + 802b09e: 370c adds r7, #12 + 802b0a0: 46bd mov sp, r7 + 802b0a2: f85d 7b04 ldr.w r7, [sp], #4 + 802b0a6: 4770 bx lr -0802b078 : +0802b0a8 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) { - 802b078: b480 push {r7} - 802b07a: b083 sub sp, #12 - 802b07c: af00 add r7, sp, #0 - 802b07e: 6078 str r0, [r7, #4] + 802b0a8: b480 push {r7} + 802b0aa: b083 sub sp, #12 + 802b0ac: af00 add r7, sp, #0 + 802b0ae: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_RxCpltCallback could be implemented in the user file */ } - 802b080: bf00 nop - 802b082: 370c adds r7, #12 - 802b084: 46bd mov sp, r7 - 802b086: f85d 7b04 ldr.w r7, [sp], #4 - 802b08a: 4770 bx lr + 802b0b0: bf00 nop + 802b0b2: 370c adds r7, #12 + 802b0b4: 46bd mov sp, r7 + 802b0b6: f85d 7b04 ldr.w r7, [sp], #4 + 802b0ba: 4770 bx lr -0802b08c : +0802b0bc : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth) { - 802b08c: b480 push {r7} - 802b08e: b083 sub sp, #12 - 802b090: af00 add r7, sp, #0 - 802b092: 6078 str r0, [r7, #4] + 802b0bc: b480 push {r7} + 802b0be: b083 sub sp, #12 + 802b0c0: af00 add r7, sp, #0 + 802b0c2: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_ErrorCallback could be implemented in the user file */ } - 802b094: bf00 nop - 802b096: 370c adds r7, #12 - 802b098: 46bd mov sp, r7 - 802b09a: f85d 7b04 ldr.w r7, [sp], #4 - 802b09e: 4770 bx lr + 802b0c4: bf00 nop + 802b0c6: 370c adds r7, #12 + 802b0c8: 46bd mov sp, r7 + 802b0ca: f85d 7b04 ldr.w r7, [sp], #4 + 802b0ce: 4770 bx lr -0802b0a0 : +0802b0d0 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth) { - 802b0a0: b480 push {r7} - 802b0a2: b083 sub sp, #12 - 802b0a4: af00 add r7, sp, #0 - 802b0a6: 6078 str r0, [r7, #4] + 802b0d0: b480 push {r7} + 802b0d2: b083 sub sp, #12 + 802b0d4: af00 add r7, sp, #0 + 802b0d6: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_PMTCallback could be implemented in the user file */ } - 802b0a8: bf00 nop - 802b0aa: 370c adds r7, #12 - 802b0ac: 46bd mov sp, r7 - 802b0ae: f85d 7b04 ldr.w r7, [sp], #4 - 802b0b2: 4770 bx lr + 802b0d8: bf00 nop + 802b0da: 370c adds r7, #12 + 802b0dc: 46bd mov sp, r7 + 802b0de: f85d 7b04 ldr.w r7, [sp], #4 + 802b0e2: 4770 bx lr -0802b0b4 : +0802b0e4 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth) { - 802b0b4: b480 push {r7} - 802b0b6: b083 sub sp, #12 - 802b0b8: af00 add r7, sp, #0 - 802b0ba: 6078 str r0, [r7, #4] + 802b0e4: b480 push {r7} + 802b0e6: b083 sub sp, #12 + 802b0e8: af00 add r7, sp, #0 + 802b0ea: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_EEECallback could be implemented in the user file */ } - 802b0bc: bf00 nop - 802b0be: 370c adds r7, #12 - 802b0c0: 46bd mov sp, r7 - 802b0c2: f85d 7b04 ldr.w r7, [sp], #4 - 802b0c6: 4770 bx lr + 802b0ec: bf00 nop + 802b0ee: 370c adds r7, #12 + 802b0f0: 46bd mov sp, r7 + 802b0f2: f85d 7b04 ldr.w r7, [sp], #4 + 802b0f6: 4770 bx lr -0802b0c8 : +0802b0f8 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth) { - 802b0c8: b480 push {r7} - 802b0ca: b083 sub sp, #12 - 802b0cc: af00 add r7, sp, #0 - 802b0ce: 6078 str r0, [r7, #4] + 802b0f8: b480 push {r7} + 802b0fa: b083 sub sp, #12 + 802b0fc: af00 add r7, sp, #0 + 802b0fe: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_WakeUpCallback could be implemented in the user file */ } - 802b0d0: bf00 nop - 802b0d2: 370c adds r7, #12 - 802b0d4: 46bd mov sp, r7 - 802b0d6: f85d 7b04 ldr.w r7, [sp], #4 - 802b0da: 4770 bx lr + 802b100: bf00 nop + 802b102: 370c adds r7, #12 + 802b104: 46bd mov sp, r7 + 802b106: f85d 7b04 ldr.w r7, [sp], #4 + 802b10a: 4770 bx lr -0802b0dc : +0802b10c : * @param pRegValue: parameter to hold read value * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t *pRegValue) { - 802b0dc: b580 push {r7, lr} - 802b0de: b086 sub sp, #24 - 802b0e0: af00 add r7, sp, #0 - 802b0e2: 60f8 str r0, [r7, #12] - 802b0e4: 60b9 str r1, [r7, #8] - 802b0e6: 607a str r2, [r7, #4] - 802b0e8: 603b str r3, [r7, #0] + 802b10c: b580 push {r7, lr} + 802b10e: b086 sub sp, #24 + 802b110: af00 add r7, sp, #0 + 802b112: 60f8 str r0, [r7, #12] + 802b114: 60b9 str r1, [r7, #8] + 802b116: 607a str r2, [r7, #4] + 802b118: 603b str r3, [r7, #0] uint32_t tickstart; uint32_t tmpreg; /* Check for the Busy flag */ if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET) - 802b0ea: 68fb ldr r3, [r7, #12] - 802b0ec: 681b ldr r3, [r3, #0] - 802b0ee: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b0f2: f003 0301 and.w r3, r3, #1 - 802b0f6: 2b00 cmp r3, #0 - 802b0f8: d001 beq.n 802b0fe + 802b11a: 68fb ldr r3, [r7, #12] + 802b11c: 681b ldr r3, [r3, #0] + 802b11e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b122: f003 0301 and.w r3, r3, #1 + 802b126: 2b00 cmp r3, #0 + 802b128: d001 beq.n 802b12e { return HAL_ERROR; - 802b0fa: 2301 movs r3, #1 - 802b0fc: e03e b.n 802b17c + 802b12a: 2301 movs r3, #1 + 802b12c: e03e b.n 802b1ac } /* Get the MACMDIOAR value */ WRITE_REG(tmpreg, heth->Instance->MACMDIOAR); - 802b0fe: 68fb ldr r3, [r7, #12] - 802b100: 681b ldr r3, [r3, #0] - 802b102: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b106: 617b str r3, [r7, #20] + 802b12e: 68fb ldr r3, [r7, #12] + 802b130: 681b ldr r3, [r3, #0] + 802b132: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b136: 617b str r3, [r7, #20] - Set the PHY device address - Set the PHY register address - Set the read mode - Set the MII Busy bit */ MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21)); - 802b108: 697b ldr r3, [r7, #20] - 802b10a: f023 7278 bic.w r2, r3, #65011712 ; 0x3e00000 - 802b10e: 68bb ldr r3, [r7, #8] - 802b110: 055b lsls r3, r3, #21 - 802b112: 4313 orrs r3, r2 - 802b114: 617b str r3, [r7, #20] + 802b138: 697b ldr r3, [r7, #20] + 802b13a: f023 7278 bic.w r2, r3, #65011712 ; 0x3e00000 + 802b13e: 68bb ldr r3, [r7, #8] + 802b140: 055b lsls r3, r3, #21 + 802b142: 4313 orrs r3, r2 + 802b144: 617b str r3, [r7, #20] MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16)); - 802b116: 697b ldr r3, [r7, #20] - 802b118: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 - 802b11c: 687b ldr r3, [r7, #4] - 802b11e: 041b lsls r3, r3, #16 - 802b120: 4313 orrs r3, r2 - 802b122: 617b str r3, [r7, #20] + 802b146: 697b ldr r3, [r7, #20] + 802b148: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 + 802b14c: 687b ldr r3, [r7, #4] + 802b14e: 041b lsls r3, r3, #16 + 802b150: 4313 orrs r3, r2 + 802b152: 617b str r3, [r7, #20] MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_RD); - 802b124: 697b ldr r3, [r7, #20] - 802b126: f043 030c orr.w r3, r3, #12 - 802b12a: 617b str r3, [r7, #20] + 802b154: 697b ldr r3, [r7, #20] + 802b156: f043 030c orr.w r3, r3, #12 + 802b15a: 617b str r3, [r7, #20] SET_BIT(tmpreg, ETH_MACMDIOAR_MB); - 802b12c: 697b ldr r3, [r7, #20] - 802b12e: f043 0301 orr.w r3, r3, #1 - 802b132: 617b str r3, [r7, #20] + 802b15c: 697b ldr r3, [r7, #20] + 802b15e: f043 0301 orr.w r3, r3, #1 + 802b162: 617b str r3, [r7, #20] /* Write the result value into the MDII Address register */ WRITE_REG(heth->Instance->MACMDIOAR, tmpreg); - 802b134: 68fb ldr r3, [r7, #12] - 802b136: 681b ldr r3, [r3, #0] - 802b138: 697a ldr r2, [r7, #20] - 802b13a: f8c3 2200 str.w r2, [r3, #512] ; 0x200 + 802b164: 68fb ldr r3, [r7, #12] + 802b166: 681b ldr r3, [r3, #0] + 802b168: 697a ldr r2, [r7, #20] + 802b16a: f8c3 2200 str.w r2, [r3, #512] ; 0x200 tickstart = HAL_GetTick(); - 802b13e: f7fa ff29 bl 8025f94 - 802b142: 6138 str r0, [r7, #16] + 802b16e: f7fa ff29 bl 8025fc4 + 802b172: 6138 str r0, [r7, #16] /* Wait for the Busy flag */ while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) - 802b144: e009 b.n 802b15a + 802b174: e009 b.n 802b18a { if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT)) - 802b146: f7fa ff25 bl 8025f94 - 802b14a: 4602 mov r2, r0 - 802b14c: 693b ldr r3, [r7, #16] - 802b14e: 1ad3 subs r3, r2, r3 - 802b150: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 802b154: d901 bls.n 802b15a + 802b176: f7fa ff25 bl 8025fc4 + 802b17a: 4602 mov r2, r0 + 802b17c: 693b ldr r3, [r7, #16] + 802b17e: 1ad3 subs r3, r2, r3 + 802b180: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 802b184: d901 bls.n 802b18a { return HAL_ERROR; - 802b156: 2301 movs r3, #1 - 802b158: e010 b.n 802b17c + 802b186: 2301 movs r3, #1 + 802b188: e010 b.n 802b1ac while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) - 802b15a: 68fb ldr r3, [r7, #12] - 802b15c: 681b ldr r3, [r3, #0] - 802b15e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b162: f003 0301 and.w r3, r3, #1 - 802b166: 2b00 cmp r3, #0 - 802b168: d1ed bne.n 802b146 + 802b18a: 68fb ldr r3, [r7, #12] + 802b18c: 681b ldr r3, [r3, #0] + 802b18e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b192: f003 0301 and.w r3, r3, #1 + 802b196: 2b00 cmp r3, #0 + 802b198: d1ed bne.n 802b176 } } /* Get MACMIIDR value */ WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR); - 802b16a: 68fb ldr r3, [r7, #12] - 802b16c: 681b ldr r3, [r3, #0] - 802b16e: f8d3 3204 ldr.w r3, [r3, #516] ; 0x204 - 802b172: b29b uxth r3, r3 - 802b174: 461a mov r2, r3 - 802b176: 683b ldr r3, [r7, #0] - 802b178: 601a str r2, [r3, #0] + 802b19a: 68fb ldr r3, [r7, #12] + 802b19c: 681b ldr r3, [r3, #0] + 802b19e: f8d3 3204 ldr.w r3, [r3, #516] ; 0x204 + 802b1a2: b29b uxth r3, r3 + 802b1a4: 461a mov r2, r3 + 802b1a6: 683b ldr r3, [r7, #0] + 802b1a8: 601a str r2, [r3, #0] return HAL_OK; - 802b17a: 2300 movs r3, #0 + 802b1aa: 2300 movs r3, #0 } - 802b17c: 4618 mov r0, r3 - 802b17e: 3718 adds r7, #24 - 802b180: 46bd mov sp, r7 - 802b182: bd80 pop {r7, pc} + 802b1ac: 4618 mov r0, r3 + 802b1ae: 3718 adds r7, #24 + 802b1b0: 46bd mov sp, r7 + 802b1b2: bd80 pop {r7, pc} -0802b184 : +0802b1b4 : * @param RegValue: the value to write * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t RegValue) { - 802b184: b580 push {r7, lr} - 802b186: b086 sub sp, #24 - 802b188: af00 add r7, sp, #0 - 802b18a: 60f8 str r0, [r7, #12] - 802b18c: 60b9 str r1, [r7, #8] - 802b18e: 607a str r2, [r7, #4] - 802b190: 603b str r3, [r7, #0] + 802b1b4: b580 push {r7, lr} + 802b1b6: b086 sub sp, #24 + 802b1b8: af00 add r7, sp, #0 + 802b1ba: 60f8 str r0, [r7, #12] + 802b1bc: 60b9 str r1, [r7, #8] + 802b1be: 607a str r2, [r7, #4] + 802b1c0: 603b str r3, [r7, #0] uint32_t tickstart; uint32_t tmpreg; /* Check for the Busy flag */ if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET) - 802b192: 68fb ldr r3, [r7, #12] - 802b194: 681b ldr r3, [r3, #0] - 802b196: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b19a: f003 0301 and.w r3, r3, #1 - 802b19e: 2b00 cmp r3, #0 - 802b1a0: d001 beq.n 802b1a6 + 802b1c2: 68fb ldr r3, [r7, #12] + 802b1c4: 681b ldr r3, [r3, #0] + 802b1c6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b1ca: f003 0301 and.w r3, r3, #1 + 802b1ce: 2b00 cmp r3, #0 + 802b1d0: d001 beq.n 802b1d6 { return HAL_ERROR; - 802b1a2: 2301 movs r3, #1 - 802b1a4: e03c b.n 802b220 + 802b1d2: 2301 movs r3, #1 + 802b1d4: e03c b.n 802b250 } /* Get the MACMDIOAR value */ WRITE_REG(tmpreg, heth->Instance->MACMDIOAR); - 802b1a6: 68fb ldr r3, [r7, #12] - 802b1a8: 681b ldr r3, [r3, #0] - 802b1aa: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b1ae: 617b str r3, [r7, #20] + 802b1d6: 68fb ldr r3, [r7, #12] + 802b1d8: 681b ldr r3, [r3, #0] + 802b1da: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b1de: 617b str r3, [r7, #20] - Set the PHY device address - Set the PHY register address - Set the write mode - Set the MII Busy bit */ MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21)); - 802b1b0: 697b ldr r3, [r7, #20] - 802b1b2: f023 7278 bic.w r2, r3, #65011712 ; 0x3e00000 - 802b1b6: 68bb ldr r3, [r7, #8] - 802b1b8: 055b lsls r3, r3, #21 - 802b1ba: 4313 orrs r3, r2 - 802b1bc: 617b str r3, [r7, #20] + 802b1e0: 697b ldr r3, [r7, #20] + 802b1e2: f023 7278 bic.w r2, r3, #65011712 ; 0x3e00000 + 802b1e6: 68bb ldr r3, [r7, #8] + 802b1e8: 055b lsls r3, r3, #21 + 802b1ea: 4313 orrs r3, r2 + 802b1ec: 617b str r3, [r7, #20] MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16)); - 802b1be: 697b ldr r3, [r7, #20] - 802b1c0: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 - 802b1c4: 687b ldr r3, [r7, #4] - 802b1c6: 041b lsls r3, r3, #16 - 802b1c8: 4313 orrs r3, r2 - 802b1ca: 617b str r3, [r7, #20] + 802b1ee: 697b ldr r3, [r7, #20] + 802b1f0: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 + 802b1f4: 687b ldr r3, [r7, #4] + 802b1f6: 041b lsls r3, r3, #16 + 802b1f8: 4313 orrs r3, r2 + 802b1fa: 617b str r3, [r7, #20] MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_WR); - 802b1cc: 697b ldr r3, [r7, #20] - 802b1ce: f023 030c bic.w r3, r3, #12 - 802b1d2: f043 0304 orr.w r3, r3, #4 - 802b1d6: 617b str r3, [r7, #20] + 802b1fc: 697b ldr r3, [r7, #20] + 802b1fe: f023 030c bic.w r3, r3, #12 + 802b202: f043 0304 orr.w r3, r3, #4 + 802b206: 617b str r3, [r7, #20] SET_BIT(tmpreg, ETH_MACMDIOAR_MB); - 802b1d8: 697b ldr r3, [r7, #20] - 802b1da: f043 0301 orr.w r3, r3, #1 - 802b1de: 617b str r3, [r7, #20] + 802b208: 697b ldr r3, [r7, #20] + 802b20a: f043 0301 orr.w r3, r3, #1 + 802b20e: 617b str r3, [r7, #20] /* Give the value to the MII data register */ WRITE_REG(ETH->MACMDIODR, (uint16_t)RegValue); - 802b1e0: 683b ldr r3, [r7, #0] - 802b1e2: b29a uxth r2, r3 - 802b1e4: 4b10 ldr r3, [pc, #64] ; (802b228 ) - 802b1e6: f8c3 2204 str.w r2, [r3, #516] ; 0x204 + 802b210: 683b ldr r3, [r7, #0] + 802b212: b29a uxth r2, r3 + 802b214: 4b10 ldr r3, [pc, #64] ; (802b258 ) + 802b216: f8c3 2204 str.w r2, [r3, #516] ; 0x204 /* Write the result value into the MII Address register */ WRITE_REG(ETH->MACMDIOAR, tmpreg); - 802b1ea: 4a0f ldr r2, [pc, #60] ; (802b228 ) - 802b1ec: 697b ldr r3, [r7, #20] - 802b1ee: f8c2 3200 str.w r3, [r2, #512] ; 0x200 + 802b21a: 4a0f ldr r2, [pc, #60] ; (802b258 ) + 802b21c: 697b ldr r3, [r7, #20] + 802b21e: f8c2 3200 str.w r3, [r2, #512] ; 0x200 tickstart = HAL_GetTick(); - 802b1f2: f7fa fecf bl 8025f94 - 802b1f6: 6138 str r0, [r7, #16] + 802b222: f7fa fecf bl 8025fc4 + 802b226: 6138 str r0, [r7, #16] /* Wait for the Busy flag */ while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) - 802b1f8: e009 b.n 802b20e + 802b228: e009 b.n 802b23e { if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT)) - 802b1fa: f7fa fecb bl 8025f94 - 802b1fe: 4602 mov r2, r0 - 802b200: 693b ldr r3, [r7, #16] - 802b202: 1ad3 subs r3, r2, r3 - 802b204: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 802b208: d901 bls.n 802b20e + 802b22a: f7fa fecb bl 8025fc4 + 802b22e: 4602 mov r2, r0 + 802b230: 693b ldr r3, [r7, #16] + 802b232: 1ad3 subs r3, r2, r3 + 802b234: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 802b238: d901 bls.n 802b23e { return HAL_ERROR; - 802b20a: 2301 movs r3, #1 - 802b20c: e008 b.n 802b220 + 802b23a: 2301 movs r3, #1 + 802b23c: e008 b.n 802b250 while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) - 802b20e: 68fb ldr r3, [r7, #12] - 802b210: 681b ldr r3, [r3, #0] - 802b212: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b216: f003 0301 and.w r3, r3, #1 - 802b21a: 2b00 cmp r3, #0 - 802b21c: d1ed bne.n 802b1fa + 802b23e: 68fb ldr r3, [r7, #12] + 802b240: 681b ldr r3, [r3, #0] + 802b242: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b246: f003 0301 and.w r3, r3, #1 + 802b24a: 2b00 cmp r3, #0 + 802b24c: d1ed bne.n 802b22a } } return HAL_OK; - 802b21e: 2300 movs r3, #0 + 802b24e: 2300 movs r3, #0 } - 802b220: 4618 mov r0, r3 - 802b222: 3718 adds r7, #24 - 802b224: 46bd mov sp, r7 - 802b226: bd80 pop {r7, pc} - 802b228: 40028000 .word 0x40028000 + 802b250: 4618 mov r0, r3 + 802b252: 3718 adds r7, #24 + 802b254: 46bd mov sp, r7 + 802b256: bd80 pop {r7, pc} + 802b258: 40028000 .word 0x40028000 -0802b22c : +0802b25c : * @param macconf: pointer to a ETH_MACConfigTypeDef structure that will hold * the configuration of the MAC. * @retval HAL Status */ HAL_StatusTypeDef HAL_ETH_GetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) { - 802b22c: b480 push {r7} - 802b22e: b083 sub sp, #12 - 802b230: af00 add r7, sp, #0 - 802b232: 6078 str r0, [r7, #4] - 802b234: 6039 str r1, [r7, #0] + 802b25c: b480 push {r7} + 802b25e: b083 sub sp, #12 + 802b260: af00 add r7, sp, #0 + 802b262: 6078 str r0, [r7, #4] + 802b264: 6039 str r1, [r7, #0] if (macconf == NULL) - 802b236: 683b ldr r3, [r7, #0] - 802b238: 2b00 cmp r3, #0 - 802b23a: d101 bne.n 802b240 + 802b266: 683b ldr r3, [r7, #0] + 802b268: 2b00 cmp r3, #0 + 802b26a: d101 bne.n 802b270 { return HAL_ERROR; - 802b23c: 2301 movs r3, #1 - 802b23e: e1c3 b.n 802b5c8 + 802b26c: 2301 movs r3, #1 + 802b26e: e1c3 b.n 802b5f8 } /* Get MAC parameters */ macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN); - 802b240: 687b ldr r3, [r7, #4] - 802b242: 681b ldr r3, [r3, #0] - 802b244: 681b ldr r3, [r3, #0] - 802b246: f003 020c and.w r2, r3, #12 - 802b24a: 683b ldr r3, [r7, #0] - 802b24c: 62da str r2, [r3, #44] ; 0x2c + 802b270: 687b ldr r3, [r7, #4] + 802b272: 681b ldr r3, [r3, #0] + 802b274: 681b ldr r3, [r3, #0] + 802b276: f003 020c and.w r2, r3, #12 + 802b27a: 683b ldr r3, [r7, #0] + 802b27c: 62da str r2, [r3, #44] ; 0x2c macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DISABLE; - 802b24e: 687b ldr r3, [r7, #4] - 802b250: 681b ldr r3, [r3, #0] - 802b252: 681b ldr r3, [r3, #0] - 802b254: f003 0310 and.w r3, r3, #16 - 802b258: 2b00 cmp r3, #0 - 802b25a: bf14 ite ne - 802b25c: 2301 movne r3, #1 - 802b25e: 2300 moveq r3, #0 - 802b260: b2db uxtb r3, r3 - 802b262: 461a mov r2, r3 - 802b264: 683b ldr r3, [r7, #0] - 802b266: f883 2028 strb.w r2, [r3, #40] ; 0x28 + 802b27e: 687b ldr r3, [r7, #4] + 802b280: 681b ldr r3, [r3, #0] + 802b282: 681b ldr r3, [r3, #0] + 802b284: f003 0310 and.w r3, r3, #16 + 802b288: 2b00 cmp r3, #0 + 802b28a: bf14 ite ne + 802b28c: 2301 movne r3, #1 + 802b28e: 2300 moveq r3, #0 + 802b290: b2db uxtb r3, r3 + 802b292: 461a mov r2, r3 + 802b294: 683b ldr r3, [r7, #0] + 802b296: f883 2028 strb.w r2, [r3, #40] ; 0x28 macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL); - 802b26a: 687b ldr r3, [r7, #4] - 802b26c: 681b ldr r3, [r3, #0] - 802b26e: 681b ldr r3, [r3, #0] - 802b270: f003 0260 and.w r2, r3, #96 ; 0x60 - 802b274: 683b ldr r3, [r7, #0] - 802b276: 625a str r2, [r3, #36] ; 0x24 + 802b29a: 687b ldr r3, [r7, #4] + 802b29c: 681b ldr r3, [r3, #0] + 802b29e: 681b ldr r3, [r3, #0] + 802b2a0: f003 0260 and.w r2, r3, #96 ; 0x60 + 802b2a4: 683b ldr r3, [r7, #0] + 802b2a6: 625a str r2, [r3, #36] ; 0x24 macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE; - 802b278: 687b ldr r3, [r7, #4] - 802b27a: 681b ldr r3, [r3, #0] - 802b27c: 681b ldr r3, [r3, #0] - 802b27e: f403 7380 and.w r3, r3, #256 ; 0x100 - 802b282: 2b00 cmp r3, #0 - 802b284: bf0c ite eq - 802b286: 2301 moveq r3, #1 - 802b288: 2300 movne r3, #0 - 802b28a: b2db uxtb r3, r3 - 802b28c: 461a mov r2, r3 - 802b28e: 683b ldr r3, [r7, #0] - 802b290: f883 2020 strb.w r2, [r3, #32] + 802b2a8: 687b ldr r3, [r7, #4] + 802b2aa: 681b ldr r3, [r3, #0] + 802b2ac: 681b ldr r3, [r3, #0] + 802b2ae: f403 7380 and.w r3, r3, #256 ; 0x100 + 802b2b2: 2b00 cmp r3, #0 + 802b2b4: bf0c ite eq + 802b2b6: 2301 moveq r3, #1 + 802b2b8: 2300 movne r3, #0 + 802b2ba: b2db uxtb r3, r3 + 802b2bc: 461a mov r2, r3 + 802b2be: 683b ldr r3, [r7, #0] + 802b2c0: f883 2020 strb.w r2, [r3, #32] macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U) - 802b294: 687b ldr r3, [r7, #4] - 802b296: 681b ldr r3, [r3, #0] - 802b298: 681b ldr r3, [r3, #0] - 802b29a: f403 7300 and.w r3, r3, #512 ; 0x200 + 802b2c4: 687b ldr r3, [r7, #4] + 802b2c6: 681b ldr r3, [r3, #0] + 802b2c8: 681b ldr r3, [r3, #0] + 802b2ca: f403 7300 and.w r3, r3, #512 ; 0x200 ? ENABLE : DISABLE; - 802b29e: 2b00 cmp r3, #0 - 802b2a0: bf14 ite ne - 802b2a2: 2301 movne r3, #1 - 802b2a4: 2300 moveq r3, #0 - 802b2a6: b2db uxtb r3, r3 - 802b2a8: 461a mov r2, r3 + 802b2ce: 2b00 cmp r3, #0 + 802b2d0: bf14 ite ne + 802b2d2: 2301 movne r3, #1 + 802b2d4: 2300 moveq r3, #0 + 802b2d6: b2db uxtb r3, r3 + 802b2d8: 461a mov r2, r3 macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U) - 802b2aa: 683b ldr r3, [r7, #0] - 802b2ac: 77da strb r2, [r3, #31] + 802b2da: 683b ldr r3, [r7, #0] + 802b2dc: 77da strb r2, [r3, #31] macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE; - 802b2ae: 687b ldr r3, [r7, #4] - 802b2b0: 681b ldr r3, [r3, #0] - 802b2b2: 681b ldr r3, [r3, #0] - 802b2b4: f403 6380 and.w r3, r3, #1024 ; 0x400 - 802b2b8: 2b00 cmp r3, #0 - 802b2ba: bf0c ite eq - 802b2bc: 2301 moveq r3, #1 - 802b2be: 2300 movne r3, #0 - 802b2c0: b2db uxtb r3, r3 - 802b2c2: 461a mov r2, r3 - 802b2c4: 683b ldr r3, [r7, #0] - 802b2c6: 779a strb r2, [r3, #30] + 802b2de: 687b ldr r3, [r7, #4] + 802b2e0: 681b ldr r3, [r3, #0] + 802b2e2: 681b ldr r3, [r3, #0] + 802b2e4: f403 6380 and.w r3, r3, #1024 ; 0x400 + 802b2e8: 2b00 cmp r3, #0 + 802b2ea: bf0c ite eq + 802b2ec: 2301 moveq r3, #1 + 802b2ee: 2300 movne r3, #0 + 802b2f0: b2db uxtb r3, r3 + 802b2f2: 461a mov r2, r3 + 802b2f4: 683b ldr r3, [r7, #0] + 802b2f6: 779a strb r2, [r3, #30] macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR, - 802b2c8: 687b ldr r3, [r7, #4] - 802b2ca: 681b ldr r3, [r3, #0] - 802b2cc: 681b ldr r3, [r3, #0] + 802b2f8: 687b ldr r3, [r7, #4] + 802b2fa: 681b ldr r3, [r3, #0] + 802b2fc: 681b ldr r3, [r3, #0] ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE; - 802b2ce: f403 6300 and.w r3, r3, #2048 ; 0x800 - 802b2d2: 2b00 cmp r3, #0 - 802b2d4: bf14 ite ne - 802b2d6: 2301 movne r3, #1 - 802b2d8: 2300 moveq r3, #0 - 802b2da: b2db uxtb r3, r3 - 802b2dc: 461a mov r2, r3 + 802b2fe: f403 6300 and.w r3, r3, #2048 ; 0x800 + 802b302: 2b00 cmp r3, #0 + 802b304: bf14 ite ne + 802b306: 2301 movne r3, #1 + 802b308: 2300 moveq r3, #0 + 802b30a: b2db uxtb r3, r3 + 802b30c: 461a mov r2, r3 macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR, - 802b2de: 683b ldr r3, [r7, #0] - 802b2e0: 775a strb r2, [r3, #29] + 802b30e: 683b ldr r3, [r7, #0] + 802b310: 775a strb r2, [r3, #29] macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE; - 802b2e2: 687b ldr r3, [r7, #4] - 802b2e4: 681b ldr r3, [r3, #0] - 802b2e6: 681b ldr r3, [r3, #0] - 802b2e8: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 802b2ec: 2b00 cmp r3, #0 - 802b2ee: bf14 ite ne - 802b2f0: 2301 movne r3, #1 - 802b2f2: 2300 moveq r3, #0 - 802b2f4: b2db uxtb r3, r3 - 802b2f6: 461a mov r2, r3 - 802b2f8: 683b ldr r3, [r7, #0] - 802b2fa: 771a strb r2, [r3, #28] + 802b312: 687b ldr r3, [r7, #4] + 802b314: 681b ldr r3, [r3, #0] + 802b316: 681b ldr r3, [r3, #0] + 802b318: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 802b31c: 2b00 cmp r3, #0 + 802b31e: bf14 ite ne + 802b320: 2301 movne r3, #1 + 802b322: 2300 moveq r3, #0 + 802b324: b2db uxtb r3, r3 + 802b326: 461a mov r2, r3 + 802b328: 683b ldr r3, [r7, #0] + 802b32a: 771a strb r2, [r3, #28] macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM); - 802b2fc: 687b ldr r3, [r7, #4] - 802b2fe: 681b ldr r3, [r3, #0] - 802b300: 681b ldr r3, [r3, #0] - 802b302: f403 5200 and.w r2, r3, #8192 ; 0x2000 - 802b306: 683b ldr r3, [r7, #0] - 802b308: 619a str r2, [r3, #24] + 802b32c: 687b ldr r3, [r7, #4] + 802b32e: 681b ldr r3, [r3, #0] + 802b330: 681b ldr r3, [r3, #0] + 802b332: f403 5200 and.w r2, r3, #8192 ; 0x2000 + 802b336: 683b ldr r3, [r7, #0] + 802b338: 619a str r2, [r3, #24] macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES); - 802b30a: 687b ldr r3, [r7, #4] - 802b30c: 681b ldr r3, [r3, #0] - 802b30e: 681b ldr r3, [r3, #0] - 802b310: f403 4280 and.w r2, r3, #16384 ; 0x4000 - 802b314: 683b ldr r3, [r7, #0] - 802b316: 615a str r2, [r3, #20] + 802b33a: 687b ldr r3, [r7, #4] + 802b33c: 681b ldr r3, [r3, #0] + 802b33e: 681b ldr r3, [r3, #0] + 802b340: f403 4280 and.w r2, r3, #16384 ; 0x4000 + 802b344: 683b ldr r3, [r7, #0] + 802b346: 615a str r2, [r3, #20] macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE; - 802b318: 687b ldr r3, [r7, #4] - 802b31a: 681b ldr r3, [r3, #0] - 802b31c: 681b ldr r3, [r3, #0] - 802b31e: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 802b322: 2b00 cmp r3, #0 - 802b324: bf14 ite ne - 802b326: 2301 movne r3, #1 - 802b328: 2300 moveq r3, #0 - 802b32a: b2db uxtb r3, r3 - 802b32c: 461a mov r2, r3 - 802b32e: 683b ldr r3, [r7, #0] - 802b330: 749a strb r2, [r3, #18] + 802b348: 687b ldr r3, [r7, #4] + 802b34a: 681b ldr r3, [r3, #0] + 802b34c: 681b ldr r3, [r3, #0] + 802b34e: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 802b352: 2b00 cmp r3, #0 + 802b354: bf14 ite ne + 802b356: 2301 movne r3, #1 + 802b358: 2300 moveq r3, #0 + 802b35a: b2db uxtb r3, r3 + 802b35c: 461a mov r2, r3 + 802b35e: 683b ldr r3, [r7, #0] + 802b360: 749a strb r2, [r3, #18] macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE; - 802b332: 687b ldr r3, [r7, #4] - 802b334: 681b ldr r3, [r3, #0] - 802b336: 681b ldr r3, [r3, #0] - 802b338: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802b33c: 2b00 cmp r3, #0 - 802b33e: bf0c ite eq - 802b340: 2301 moveq r3, #1 - 802b342: 2300 movne r3, #0 - 802b344: b2db uxtb r3, r3 - 802b346: 461a mov r2, r3 - 802b348: 683b ldr r3, [r7, #0] - 802b34a: 745a strb r2, [r3, #17] + 802b362: 687b ldr r3, [r7, #4] + 802b364: 681b ldr r3, [r3, #0] + 802b366: 681b ldr r3, [r3, #0] + 802b368: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802b36c: 2b00 cmp r3, #0 + 802b36e: bf0c ite eq + 802b370: 2301 moveq r3, #1 + 802b372: 2300 movne r3, #0 + 802b374: b2db uxtb r3, r3 + 802b376: 461a mov r2, r3 + 802b378: 683b ldr r3, [r7, #0] + 802b37a: 745a strb r2, [r3, #17] macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISABLE; - 802b34c: 687b ldr r3, [r7, #4] - 802b34e: 681b ldr r3, [r3, #0] - 802b350: 681b ldr r3, [r3, #0] - 802b352: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 802b356: 2b00 cmp r3, #0 - 802b358: bf0c ite eq - 802b35a: 2301 moveq r3, #1 - 802b35c: 2300 movne r3, #0 - 802b35e: b2db uxtb r3, r3 - 802b360: 461a mov r2, r3 - 802b362: 683b ldr r3, [r7, #0] - 802b364: 741a strb r2, [r3, #16] + 802b37c: 687b ldr r3, [r7, #4] + 802b37e: 681b ldr r3, [r3, #0] + 802b380: 681b ldr r3, [r3, #0] + 802b382: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 802b386: 2b00 cmp r3, #0 + 802b388: bf0c ite eq + 802b38a: 2301 moveq r3, #1 + 802b38c: 2300 movne r3, #0 + 802b38e: b2db uxtb r3, r3 + 802b390: 461a mov r2, r3 + 802b392: 683b ldr r3, [r7, #0] + 802b394: 741a strb r2, [r3, #16] macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE; - 802b366: 687b ldr r3, [r7, #4] - 802b368: 681b ldr r3, [r3, #0] - 802b36a: 681b ldr r3, [r3, #0] - 802b36c: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 802b370: 2b00 cmp r3, #0 - 802b372: bf14 ite ne - 802b374: 2301 movne r3, #1 - 802b376: 2300 moveq r3, #0 - 802b378: b2db uxtb r3, r3 - 802b37a: 461a mov r2, r3 - 802b37c: 683b ldr r3, [r7, #0] - 802b37e: 73da strb r2, [r3, #15] + 802b396: 687b ldr r3, [r7, #4] + 802b398: 681b ldr r3, [r3, #0] + 802b39a: 681b ldr r3, [r3, #0] + 802b39c: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 802b3a0: 2b00 cmp r3, #0 + 802b3a2: bf14 ite ne + 802b3a4: 2301 movne r3, #1 + 802b3a6: 2300 moveq r3, #0 + 802b3a8: b2db uxtb r3, r3 + 802b3aa: 461a mov r2, r3 + 802b3ac: 683b ldr r3, [r7, #0] + 802b3ae: 73da strb r2, [r3, #15] macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENABLE : DISABLE; - 802b380: 687b ldr r3, [r7, #4] - 802b382: 681b ldr r3, [r3, #0] - 802b384: 681b ldr r3, [r3, #0] - 802b386: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 802b38a: 2b00 cmp r3, #0 - 802b38c: bf14 ite ne - 802b38e: 2301 movne r3, #1 - 802b390: 2300 moveq r3, #0 - 802b392: b2db uxtb r3, r3 - 802b394: 461a mov r2, r3 - 802b396: 683b ldr r3, [r7, #0] - 802b398: 739a strb r2, [r3, #14] + 802b3b0: 687b ldr r3, [r7, #4] + 802b3b2: 681b ldr r3, [r3, #0] + 802b3b4: 681b ldr r3, [r3, #0] + 802b3b6: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 802b3ba: 2b00 cmp r3, #0 + 802b3bc: bf14 ite ne + 802b3be: 2301 movne r3, #1 + 802b3c0: 2300 moveq r3, #0 + 802b3c2: b2db uxtb r3, r3 + 802b3c4: 461a mov r2, r3 + 802b3c6: 683b ldr r3, [r7, #0] + 802b3c8: 739a strb r2, [r3, #14] macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE : DISABLE; - 802b39a: 687b ldr r3, [r7, #4] - 802b39c: 681b ldr r3, [r3, #0] - 802b39e: 681b ldr r3, [r3, #0] - 802b3a0: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 802b3a4: 2b00 cmp r3, #0 - 802b3a6: bf14 ite ne - 802b3a8: 2301 movne r3, #1 - 802b3aa: 2300 moveq r3, #0 - 802b3ac: b2db uxtb r3, r3 - 802b3ae: 461a mov r2, r3 - 802b3b0: 683b ldr r3, [r7, #0] - 802b3b2: 735a strb r2, [r3, #13] + 802b3ca: 687b ldr r3, [r7, #4] + 802b3cc: 681b ldr r3, [r3, #0] + 802b3ce: 681b ldr r3, [r3, #0] + 802b3d0: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 802b3d4: 2b00 cmp r3, #0 + 802b3d6: bf14 ite ne + 802b3d8: 2301 movne r3, #1 + 802b3da: 2300 moveq r3, #0 + 802b3dc: b2db uxtb r3, r3 + 802b3de: 461a mov r2, r3 + 802b3e0: 683b ldr r3, [r7, #0] + 802b3e2: 735a strb r2, [r3, #13] macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR, - 802b3b4: 687b ldr r3, [r7, #4] - 802b3b6: 681b ldr r3, [r3, #0] - 802b3b8: 681b ldr r3, [r3, #0] + 802b3e4: 687b ldr r3, [r7, #4] + 802b3e6: 681b ldr r3, [r3, #0] + 802b3e8: 681b ldr r3, [r3, #0] ETH_MACCR_GPSLCE) >> 23) > 0U) ? ENABLE : DISABLE; - 802b3ba: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 802b3be: 2b00 cmp r3, #0 - 802b3c0: bf14 ite ne - 802b3c2: 2301 movne r3, #1 - 802b3c4: 2300 moveq r3, #0 - 802b3c6: b2db uxtb r3, r3 - 802b3c8: 461a mov r2, r3 + 802b3ea: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 802b3ee: 2b00 cmp r3, #0 + 802b3f0: bf14 ite ne + 802b3f2: 2301 movne r3, #1 + 802b3f4: 2300 moveq r3, #0 + 802b3f6: b2db uxtb r3, r3 + 802b3f8: 461a mov r2, r3 macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR, - 802b3ca: 683b ldr r3, [r7, #0] - 802b3cc: 731a strb r2, [r3, #12] + 802b3fa: 683b ldr r3, [r7, #0] + 802b3fc: 731a strb r2, [r3, #12] macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG); - 802b3ce: 687b ldr r3, [r7, #4] - 802b3d0: 681b ldr r3, [r3, #0] - 802b3d2: 681b ldr r3, [r3, #0] - 802b3d4: f003 62e0 and.w r2, r3, #117440512 ; 0x7000000 - 802b3d8: 683b ldr r3, [r7, #0] - 802b3da: 609a str r2, [r3, #8] + 802b3fe: 687b ldr r3, [r7, #4] + 802b400: 681b ldr r3, [r3, #0] + 802b402: 681b ldr r3, [r3, #0] + 802b404: f003 62e0 and.w r2, r3, #117440512 ; 0x7000000 + 802b408: 683b ldr r3, [r7, #0] + 802b40a: 609a str r2, [r3, #8] macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE : DISABLE; - 802b3dc: 687b ldr r3, [r7, #4] - 802b3de: 681b ldr r3, [r3, #0] - 802b3e0: 681b ldr r3, [r3, #0] - 802b3e2: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 802b3e6: 2b00 cmp r3, #0 - 802b3e8: bf14 ite ne - 802b3ea: 2301 movne r3, #1 - 802b3ec: 2300 moveq r3, #0 - 802b3ee: b2db uxtb r3, r3 - 802b3f0: 461a mov r2, r3 - 802b3f2: 683b ldr r3, [r7, #0] - 802b3f4: 711a strb r2, [r3, #4] + 802b40c: 687b ldr r3, [r7, #4] + 802b40e: 681b ldr r3, [r3, #0] + 802b410: 681b ldr r3, [r3, #0] + 802b412: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 802b416: 2b00 cmp r3, #0 + 802b418: bf14 ite ne + 802b41a: 2301 movne r3, #1 + 802b41c: 2300 moveq r3, #0 + 802b41e: b2db uxtb r3, r3 + 802b420: 461a mov r2, r3 + 802b422: 683b ldr r3, [r7, #0] + 802b424: 711a strb r2, [r3, #4] macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC); - 802b3f6: 687b ldr r3, [r7, #4] - 802b3f8: 681b ldr r3, [r3, #0] - 802b3fa: 681b ldr r3, [r3, #0] - 802b3fc: f003 42e0 and.w r2, r3, #1879048192 ; 0x70000000 - 802b400: 683b ldr r3, [r7, #0] - 802b402: 601a str r2, [r3, #0] + 802b426: 687b ldr r3, [r7, #4] + 802b428: 681b ldr r3, [r3, #0] + 802b42a: 681b ldr r3, [r3, #0] + 802b42c: f003 42e0 and.w r2, r3, #1879048192 ; 0x70000000 + 802b430: 683b ldr r3, [r7, #0] + 802b432: 601a str r2, [r3, #0] macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL); - 802b404: 687b ldr r3, [r7, #4] - 802b406: 681b ldr r3, [r3, #0] - 802b408: 685b ldr r3, [r3, #4] - 802b40a: f3c3 020d ubfx r2, r3, #0, #14 - 802b40e: 683b ldr r3, [r7, #0] - 802b410: 635a str r2, [r3, #52] ; 0x34 + 802b434: 687b ldr r3, [r7, #4] + 802b436: 681b ldr r3, [r3, #0] + 802b438: 685b ldr r3, [r3, #4] + 802b43a: f3c3 020d ubfx r2, r3, #0, #14 + 802b43e: 683b ldr r3, [r7, #0] + 802b440: 635a str r2, [r3, #52] ; 0x34 macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_DCRCC) >> 16) == 0U) ? ENABLE : DISABLE; - 802b412: 687b ldr r3, [r7, #4] - 802b414: 681b ldr r3, [r3, #0] - 802b416: 685b ldr r3, [r3, #4] - 802b418: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 802b41c: 2b00 cmp r3, #0 - 802b41e: bf0c ite eq - 802b420: 2301 moveq r3, #1 - 802b422: 2300 movne r3, #0 - 802b424: b2db uxtb r3, r3 - 802b426: 461a mov r2, r3 - 802b428: 683b ldr r3, [r7, #0] - 802b42a: f883 2032 strb.w r2, [r3, #50] ; 0x32 + 802b442: 687b ldr r3, [r7, #4] + 802b444: 681b ldr r3, [r3, #0] + 802b446: 685b ldr r3, [r3, #4] + 802b448: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 802b44c: 2b00 cmp r3, #0 + 802b44e: bf0c ite eq + 802b450: 2301 moveq r3, #1 + 802b452: 2300 movne r3, #0 + 802b454: b2db uxtb r3, r3 + 802b456: 461a mov r2, r3 + 802b458: 683b ldr r3, [r7, #0] + 802b45a: f883 2032 strb.w r2, [r3, #50] ; 0x32 macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? ENABLE : DISABLE; - 802b42e: 687b ldr r3, [r7, #4] - 802b430: 681b ldr r3, [r3, #0] - 802b432: 685b ldr r3, [r3, #4] - 802b434: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802b438: 2b00 cmp r3, #0 - 802b43a: bf14 ite ne - 802b43c: 2301 movne r3, #1 - 802b43e: 2300 moveq r3, #0 - 802b440: b2db uxtb r3, r3 - 802b442: 461a mov r2, r3 - 802b444: 683b ldr r3, [r7, #0] - 802b446: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 802b45e: 687b ldr r3, [r7, #4] + 802b460: 681b ldr r3, [r3, #0] + 802b462: 685b ldr r3, [r3, #4] + 802b464: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802b468: 2b00 cmp r3, #0 + 802b46a: bf14 ite ne + 802b46c: 2301 movne r3, #1 + 802b46e: 2300 moveq r3, #0 + 802b470: b2db uxtb r3, r3 + 802b472: 461a mov r2, r3 + 802b474: 683b ldr r3, [r7, #0] + 802b476: f883 2031 strb.w r2, [r3, #49] ; 0x31 macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR, - 802b44a: 687b ldr r3, [r7, #4] - 802b44c: 681b ldr r3, [r3, #0] - 802b44e: 685b ldr r3, [r3, #4] + 802b47a: 687b ldr r3, [r7, #4] + 802b47c: 681b ldr r3, [r3, #0] + 802b47e: 685b ldr r3, [r3, #4] ETH_MACECR_USP) >> 18) > 0U) ? ENABLE : DISABLE; - 802b450: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 802b454: 2b00 cmp r3, #0 - 802b456: bf14 ite ne - 802b458: 2301 movne r3, #1 - 802b45a: 2300 moveq r3, #0 - 802b45c: b2db uxtb r3, r3 - 802b45e: 461a mov r2, r3 + 802b480: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 802b484: 2b00 cmp r3, #0 + 802b486: bf14 ite ne + 802b488: 2301 movne r3, #1 + 802b48a: 2300 moveq r3, #0 + 802b48c: b2db uxtb r3, r3 + 802b48e: 461a mov r2, r3 macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR, - 802b460: 683b ldr r3, [r7, #0] - 802b462: f883 2030 strb.w r2, [r3, #48] ; 0x30 + 802b490: 683b ldr r3, [r7, #0] + 802b492: f883 2030 strb.w r2, [r3, #48] ; 0x30 macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U) - 802b466: 687b ldr r3, [r7, #4] - 802b468: 681b ldr r3, [r3, #0] - 802b46a: 685b ldr r3, [r3, #4] - 802b46c: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 802b496: 687b ldr r3, [r7, #4] + 802b498: 681b ldr r3, [r3, #0] + 802b49a: 685b ldr r3, [r3, #4] + 802b49c: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 ? ENABLE : DISABLE; - 802b470: 2b00 cmp r3, #0 - 802b472: bf14 ite ne - 802b474: 2301 movne r3, #1 - 802b476: 2300 moveq r3, #0 - 802b478: b2db uxtb r3, r3 - 802b47a: 461a mov r2, r3 + 802b4a0: 2b00 cmp r3, #0 + 802b4a2: bf14 ite ne + 802b4a4: 2301 movne r3, #1 + 802b4a6: 2300 moveq r3, #0 + 802b4a8: b2db uxtb r3, r3 + 802b4aa: 461a mov r2, r3 macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U) - 802b47c: 683b ldr r3, [r7, #0] - 802b47e: f883 2038 strb.w r2, [r3, #56] ; 0x38 + 802b4ac: 683b ldr r3, [r7, #0] + 802b4ae: f883 2038 strb.w r2, [r3, #56] ; 0x38 macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25; - 802b482: 687b ldr r3, [r7, #4] - 802b484: 681b ldr r3, [r3, #0] - 802b486: 685b ldr r3, [r3, #4] - 802b488: 0e5b lsrs r3, r3, #25 - 802b48a: f003 021f and.w r2, r3, #31 - 802b48e: 683b ldr r3, [r7, #0] - 802b490: 63da str r2, [r3, #60] ; 0x3c + 802b4b2: 687b ldr r3, [r7, #4] + 802b4b4: 681b ldr r3, [r3, #0] + 802b4b6: 685b ldr r3, [r3, #4] + 802b4b8: 0e5b lsrs r3, r3, #25 + 802b4ba: f003 021f and.w r2, r3, #31 + 802b4be: 683b ldr r3, [r7, #0] + 802b4c0: 63da str r2, [r3, #60] ; 0x3c macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? ENABLE : DISABLE; - 802b492: 687b ldr r3, [r7, #4] - 802b494: 681b ldr r3, [r3, #0] - 802b496: 68db ldr r3, [r3, #12] - 802b498: f403 7380 and.w r3, r3, #256 ; 0x100 - 802b49c: 2b00 cmp r3, #0 - 802b49e: bf14 ite ne - 802b4a0: 2301 movne r3, #1 - 802b4a2: 2300 moveq r3, #0 - 802b4a4: b2db uxtb r3, r3 - 802b4a6: 461a mov r2, r3 - 802b4a8: 683b ldr r3, [r7, #0] - 802b4aa: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802b4c2: 687b ldr r3, [r7, #4] + 802b4c4: 681b ldr r3, [r3, #0] + 802b4c6: 68db ldr r3, [r3, #12] + 802b4c8: f403 7380 and.w r3, r3, #256 ; 0x100 + 802b4cc: 2b00 cmp r3, #0 + 802b4ce: bf14 ite ne + 802b4d0: 2301 movne r3, #1 + 802b4d2: 2300 moveq r3, #0 + 802b4d4: b2db uxtb r3, r3 + 802b4d6: 461a mov r2, r3 + 802b4d8: 683b ldr r3, [r7, #0] + 802b4da: f883 2040 strb.w r2, [r3, #64] ; 0x40 macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO); - 802b4ae: 687b ldr r3, [r7, #4] - 802b4b0: 681b ldr r3, [r3, #0] - 802b4b2: 68db ldr r3, [r3, #12] - 802b4b4: f003 020f and.w r2, r3, #15 - 802b4b8: 683b ldr r3, [r7, #0] - 802b4ba: 645a str r2, [r3, #68] ; 0x44 + 802b4de: 687b ldr r3, [r7, #4] + 802b4e0: 681b ldr r3, [r3, #0] + 802b4e2: 68db ldr r3, [r3, #12] + 802b4e4: f003 020f and.w r2, r3, #15 + 802b4e8: 683b ldr r3, [r7, #0] + 802b4ea: 645a str r2, [r3, #68] ; 0x44 macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_TFE) >> 1) > 0U) ? ENABLE : DISABLE; - 802b4bc: 687b ldr r3, [r7, #4] - 802b4be: 681b ldr r3, [r3, #0] - 802b4c0: 6f1b ldr r3, [r3, #112] ; 0x70 - 802b4c2: f003 0302 and.w r3, r3, #2 - 802b4c6: 2b00 cmp r3, #0 - 802b4c8: bf14 ite ne - 802b4ca: 2301 movne r3, #1 - 802b4cc: 2300 moveq r3, #0 - 802b4ce: b2db uxtb r3, r3 - 802b4d0: 461a mov r2, r3 - 802b4d2: 683b ldr r3, [r7, #0] - 802b4d4: f883 2054 strb.w r2, [r3, #84] ; 0x54 + 802b4ec: 687b ldr r3, [r7, #4] + 802b4ee: 681b ldr r3, [r3, #0] + 802b4f0: 6f1b ldr r3, [r3, #112] ; 0x70 + 802b4f2: f003 0302 and.w r3, r3, #2 + 802b4f6: 2b00 cmp r3, #0 + 802b4f8: bf14 ite ne + 802b4fa: 2301 movne r3, #1 + 802b4fc: 2300 moveq r3, #0 + 802b4fe: b2db uxtb r3, r3 + 802b500: 461a mov r2, r3 + 802b502: 683b ldr r3, [r7, #0] + 802b504: f883 2054 strb.w r2, [r3, #84] ; 0x54 macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_DZPQ) >> 7) == 0U) ? ENABLE : DISABLE; - 802b4d8: 687b ldr r3, [r7, #4] - 802b4da: 681b ldr r3, [r3, #0] - 802b4dc: 6f1b ldr r3, [r3, #112] ; 0x70 - 802b4de: f003 0380 and.w r3, r3, #128 ; 0x80 - 802b4e2: 2b00 cmp r3, #0 - 802b4e4: bf0c ite eq - 802b4e6: 2301 moveq r3, #1 - 802b4e8: 2300 movne r3, #0 - 802b4ea: b2db uxtb r3, r3 - 802b4ec: 461a mov r2, r3 - 802b4ee: 683b ldr r3, [r7, #0] - 802b4f0: f883 204c strb.w r2, [r3, #76] ; 0x4c + 802b508: 687b ldr r3, [r7, #4] + 802b50a: 681b ldr r3, [r3, #0] + 802b50c: 6f1b ldr r3, [r3, #112] ; 0x70 + 802b50e: f003 0380 and.w r3, r3, #128 ; 0x80 + 802b512: 2b00 cmp r3, #0 + 802b514: bf0c ite eq + 802b516: 2301 moveq r3, #1 + 802b518: 2300 movne r3, #0 + 802b51a: b2db uxtb r3, r3 + 802b51c: 461a mov r2, r3 + 802b51e: 683b ldr r3, [r7, #0] + 802b520: f883 204c strb.w r2, [r3, #76] ; 0x4c macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PLT); - 802b4f4: 687b ldr r3, [r7, #4] - 802b4f6: 681b ldr r3, [r3, #0] - 802b4f8: 6f1b ldr r3, [r3, #112] ; 0x70 - 802b4fa: f003 0270 and.w r2, r3, #112 ; 0x70 - 802b4fe: 683b ldr r3, [r7, #0] - 802b500: 651a str r2, [r3, #80] ; 0x50 + 802b524: 687b ldr r3, [r7, #4] + 802b526: 681b ldr r3, [r3, #0] + 802b528: 6f1b ldr r3, [r3, #112] ; 0x70 + 802b52a: f003 0270 and.w r2, r3, #112 ; 0x70 + 802b52e: 683b ldr r3, [r7, #0] + 802b530: 651a str r2, [r3, #80] ; 0x50 macconf->PauseTime = (READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PT) >> 16); - 802b502: 687b ldr r3, [r7, #4] - 802b504: 681b ldr r3, [r3, #0] - 802b506: 6f1b ldr r3, [r3, #112] ; 0x70 - 802b508: 0c1b lsrs r3, r3, #16 - 802b50a: b29a uxth r2, r3 - 802b50c: 683b ldr r3, [r7, #0] - 802b50e: 649a str r2, [r3, #72] ; 0x48 + 802b532: 687b ldr r3, [r7, #4] + 802b534: 681b ldr r3, [r3, #0] + 802b536: 6f1b ldr r3, [r3, #112] ; 0x70 + 802b538: 0c1b lsrs r3, r3, #16 + 802b53a: b29a uxth r2, r3 + 802b53c: 683b ldr r3, [r7, #0] + 802b53e: 649a str r2, [r3, #72] ; 0x48 macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_RFE) > 0U) ? ENABLE : DISABLE; - 802b510: 687b ldr r3, [r7, #4] - 802b512: 681b ldr r3, [r3, #0] - 802b514: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802b518: f003 0301 and.w r3, r3, #1 - 802b51c: 2b00 cmp r3, #0 - 802b51e: bf14 ite ne - 802b520: 2301 movne r3, #1 - 802b522: 2300 moveq r3, #0 - 802b524: b2db uxtb r3, r3 - 802b526: 461a mov r2, r3 - 802b528: 683b ldr r3, [r7, #0] - 802b52a: f883 2056 strb.w r2, [r3, #86] ; 0x56 + 802b540: 687b ldr r3, [r7, #4] + 802b542: 681b ldr r3, [r3, #0] + 802b544: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802b548: f003 0301 and.w r3, r3, #1 + 802b54c: 2b00 cmp r3, #0 + 802b54e: bf14 ite ne + 802b550: 2301 movne r3, #1 + 802b552: 2300 moveq r3, #0 + 802b554: b2db uxtb r3, r3 + 802b556: 461a mov r2, r3 + 802b558: 683b ldr r3, [r7, #0] + 802b55a: f883 2056 strb.w r2, [r3, #86] ; 0x56 macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U) - 802b52e: 687b ldr r3, [r7, #4] - 802b530: 681b ldr r3, [r3, #0] - 802b532: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802b536: f003 0302 and.w r3, r3, #2 + 802b55e: 687b ldr r3, [r7, #4] + 802b560: 681b ldr r3, [r3, #0] + 802b562: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802b566: f003 0302 and.w r3, r3, #2 ? ENABLE : DISABLE; - 802b53a: 2b00 cmp r3, #0 - 802b53c: bf14 ite ne - 802b53e: 2301 movne r3, #1 - 802b540: 2300 moveq r3, #0 - 802b542: b2db uxtb r3, r3 - 802b544: 461a mov r2, r3 + 802b56a: 2b00 cmp r3, #0 + 802b56c: bf14 ite ne + 802b56e: 2301 movne r3, #1 + 802b570: 2300 moveq r3, #0 + 802b572: b2db uxtb r3, r3 + 802b574: 461a mov r2, r3 macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U) - 802b546: 683b ldr r3, [r7, #0] - 802b548: f883 2055 strb.w r2, [r3, #85] ; 0x55 + 802b576: 683b ldr r3, [r7, #0] + 802b578: f883 2055 strb.w r2, [r3, #85] ; 0x55 macconf->TransmitQueueMode = READ_BIT(heth->Instance->MTLTQOMR, (ETH_MTLTQOMR_TTC | ETH_MTLTQOMR_TSF)); - 802b54c: 687b ldr r3, [r7, #4] - 802b54e: 681b ldr r3, [r3, #0] - 802b550: f8d3 3d00 ldr.w r3, [r3, #3328] ; 0xd00 - 802b554: f003 0272 and.w r2, r3, #114 ; 0x72 - 802b558: 683b ldr r3, [r7, #0] - 802b55a: 659a str r2, [r3, #88] ; 0x58 + 802b57c: 687b ldr r3, [r7, #4] + 802b57e: 681b ldr r3, [r3, #0] + 802b580: f8d3 3d00 ldr.w r3, [r3, #3328] ; 0xd00 + 802b584: f003 0272 and.w r2, r3, #114 ; 0x72 + 802b588: 683b ldr r3, [r7, #0] + 802b58a: 659a str r2, [r3, #88] ; 0x58 macconf->ReceiveQueueMode = READ_BIT(heth->Instance->MTLRQOMR, (ETH_MTLRQOMR_RTC | ETH_MTLRQOMR_RSF)); - 802b55c: 687b ldr r3, [r7, #4] - 802b55e: 681b ldr r3, [r3, #0] - 802b560: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 - 802b564: f003 0223 and.w r2, r3, #35 ; 0x23 - 802b568: 683b ldr r3, [r7, #0] - 802b56a: 65da str r2, [r3, #92] ; 0x5c + 802b58c: 687b ldr r3, [r7, #4] + 802b58e: 681b ldr r3, [r3, #0] + 802b590: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b594: f003 0223 and.w r2, r3, #35 ; 0x23 + 802b598: 683b ldr r3, [r7, #0] + 802b59a: 65da str r2, [r3, #92] ; 0x5c macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR, - 802b56c: 687b ldr r3, [r7, #4] - 802b56e: 681b ldr r3, [r3, #0] - 802b570: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b59c: 687b ldr r3, [r7, #4] + 802b59e: 681b ldr r3, [r3, #0] + 802b5a0: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 ETH_MTLRQOMR_FUP) >> 3) > 0U) ? ENABLE : DISABLE; - 802b574: f003 0308 and.w r3, r3, #8 - 802b578: 2b00 cmp r3, #0 - 802b57a: bf14 ite ne - 802b57c: 2301 movne r3, #1 - 802b57e: 2300 moveq r3, #0 - 802b580: b2db uxtb r3, r3 - 802b582: 461a mov r2, r3 + 802b5a4: f003 0308 and.w r3, r3, #8 + 802b5a8: 2b00 cmp r3, #0 + 802b5aa: bf14 ite ne + 802b5ac: 2301 movne r3, #1 + 802b5ae: 2300 moveq r3, #0 + 802b5b0: b2db uxtb r3, r3 + 802b5b2: 461a mov r2, r3 macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR, - 802b584: 683b ldr r3, [r7, #0] - 802b586: f883 2062 strb.w r2, [r3, #98] ; 0x62 + 802b5b4: 683b ldr r3, [r7, #0] + 802b5b6: f883 2062 strb.w r2, [r3, #98] ; 0x62 macconf->ForwardRxErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_FEP) >> 4) > 0U) ? ENABLE : DISABLE; - 802b58a: 687b ldr r3, [r7, #4] - 802b58c: 681b ldr r3, [r3, #0] - 802b58e: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 - 802b592: f003 0310 and.w r3, r3, #16 - 802b596: 2b00 cmp r3, #0 - 802b598: bf14 ite ne - 802b59a: 2301 movne r3, #1 - 802b59c: 2300 moveq r3, #0 - 802b59e: b2db uxtb r3, r3 - 802b5a0: 461a mov r2, r3 - 802b5a2: 683b ldr r3, [r7, #0] - 802b5a4: f883 2061 strb.w r2, [r3, #97] ; 0x61 + 802b5ba: 687b ldr r3, [r7, #4] + 802b5bc: 681b ldr r3, [r3, #0] + 802b5be: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b5c2: f003 0310 and.w r3, r3, #16 + 802b5c6: 2b00 cmp r3, #0 + 802b5c8: bf14 ite ne + 802b5ca: 2301 movne r3, #1 + 802b5cc: 2300 moveq r3, #0 + 802b5ce: b2db uxtb r3, r3 + 802b5d0: 461a mov r2, r3 + 802b5d2: 683b ldr r3, [r7, #0] + 802b5d4: f883 2061 strb.w r2, [r3, #97] ; 0x61 macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, - 802b5a8: 687b ldr r3, [r7, #4] - 802b5aa: 681b ldr r3, [r3, #0] - 802b5ac: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b5d8: 687b ldr r3, [r7, #4] + 802b5da: 681b ldr r3, [r3, #0] + 802b5dc: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 ETH_MTLRQOMR_DISTCPEF) >> 6) == 0U) ? ENABLE : DISABLE; - 802b5b0: f003 0340 and.w r3, r3, #64 ; 0x40 - 802b5b4: 2b00 cmp r3, #0 - 802b5b6: bf0c ite eq - 802b5b8: 2301 moveq r3, #1 - 802b5ba: 2300 movne r3, #0 - 802b5bc: b2db uxtb r3, r3 - 802b5be: 461a mov r2, r3 + 802b5e0: f003 0340 and.w r3, r3, #64 ; 0x40 + 802b5e4: 2b00 cmp r3, #0 + 802b5e6: bf0c ite eq + 802b5e8: 2301 moveq r3, #1 + 802b5ea: 2300 movne r3, #0 + 802b5ec: b2db uxtb r3, r3 + 802b5ee: 461a mov r2, r3 macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, - 802b5c0: 683b ldr r3, [r7, #0] - 802b5c2: f883 2060 strb.w r2, [r3, #96] ; 0x60 + 802b5f0: 683b ldr r3, [r7, #0] + 802b5f2: f883 2060 strb.w r2, [r3, #96] ; 0x60 return HAL_OK; - 802b5c6: 2300 movs r3, #0 + 802b5f6: 2300 movs r3, #0 } - 802b5c8: 4618 mov r0, r3 - 802b5ca: 370c adds r7, #12 - 802b5cc: 46bd mov sp, r7 - 802b5ce: f85d 7b04 ldr.w r7, [sp], #4 - 802b5d2: 4770 bx lr + 802b5f8: 4618 mov r0, r3 + 802b5fa: 370c adds r7, #12 + 802b5fc: 46bd mov sp, r7 + 802b5fe: f85d 7b04 ldr.w r7, [sp], #4 + 802b602: 4770 bx lr -0802b5d4 : +0802b604 : * @param macconf: pointer to a ETH_MACConfigTypeDef structure that contains * the configuration of the MAC. * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) { - 802b5d4: b580 push {r7, lr} - 802b5d6: b082 sub sp, #8 - 802b5d8: af00 add r7, sp, #0 - 802b5da: 6078 str r0, [r7, #4] - 802b5dc: 6039 str r1, [r7, #0] + 802b604: b580 push {r7, lr} + 802b606: b082 sub sp, #8 + 802b608: af00 add r7, sp, #0 + 802b60a: 6078 str r0, [r7, #4] + 802b60c: 6039 str r1, [r7, #0] if (macconf == NULL) - 802b5de: 683b ldr r3, [r7, #0] - 802b5e0: 2b00 cmp r3, #0 - 802b5e2: d101 bne.n 802b5e8 + 802b60e: 683b ldr r3, [r7, #0] + 802b610: 2b00 cmp r3, #0 + 802b612: d101 bne.n 802b618 { return HAL_ERROR; - 802b5e4: 2301 movs r3, #1 - 802b5e6: e00b b.n 802b600 + 802b614: 2301 movs r3, #1 + 802b616: e00b b.n 802b630 } if (heth->gState == HAL_ETH_STATE_READY) - 802b5e8: 687b ldr r3, [r7, #4] - 802b5ea: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802b5ee: 2b10 cmp r3, #16 - 802b5f0: d105 bne.n 802b5fe + 802b618: 687b ldr r3, [r7, #4] + 802b61a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802b61e: 2b10 cmp r3, #16 + 802b620: d105 bne.n 802b62e { ETH_SetMACConfig(heth, macconf); - 802b5f2: 6839 ldr r1, [r7, #0] - 802b5f4: 6878 ldr r0, [r7, #4] - 802b5f6: f000 f85f bl 802b6b8 + 802b622: 6839 ldr r1, [r7, #0] + 802b624: 6878 ldr r0, [r7, #4] + 802b626: f000 f85f bl 802b6e8 return HAL_OK; - 802b5fa: 2300 movs r3, #0 - 802b5fc: e000 b.n 802b600 + 802b62a: 2300 movs r3, #0 + 802b62c: e000 b.n 802b630 } else { return HAL_ERROR; - 802b5fe: 2301 movs r3, #1 + 802b62e: 2301 movs r3, #1 } } - 802b600: 4618 mov r0, r3 - 802b602: 3708 adds r7, #8 - 802b604: 46bd mov sp, r7 - 802b606: bd80 pop {r7, pc} + 802b630: 4618 mov r0, r3 + 802b632: 3708 adds r7, #8 + 802b634: 46bd mov sp, r7 + 802b636: bd80 pop {r7, pc} -0802b608 : +0802b638 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth) { - 802b608: b580 push {r7, lr} - 802b60a: b084 sub sp, #16 - 802b60c: af00 add r7, sp, #0 - 802b60e: 6078 str r0, [r7, #4] + 802b638: b580 push {r7, lr} + 802b63a: b084 sub sp, #16 + 802b63c: af00 add r7, sp, #0 + 802b63e: 6078 str r0, [r7, #4] uint32_t hclk; uint32_t tmpreg; /* Get the ETHERNET MACMDIOAR value */ tmpreg = (heth->Instance)->MACMDIOAR; - 802b610: 687b ldr r3, [r7, #4] - 802b612: 681b ldr r3, [r3, #0] - 802b614: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b618: 60fb str r3, [r7, #12] + 802b640: 687b ldr r3, [r7, #4] + 802b642: 681b ldr r3, [r3, #0] + 802b644: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b648: 60fb str r3, [r7, #12] /* Clear CSR Clock Range bits */ tmpreg &= ~ETH_MACMDIOAR_CR; - 802b61a: 68fb ldr r3, [r7, #12] - 802b61c: f423 6370 bic.w r3, r3, #3840 ; 0xf00 - 802b620: 60fb str r3, [r7, #12] + 802b64a: 68fb ldr r3, [r7, #12] + 802b64c: f423 6370 bic.w r3, r3, #3840 ; 0xf00 + 802b650: 60fb str r3, [r7, #12] /* Get hclk frequency value */ hclk = HAL_RCC_GetHCLKFreq(); - 802b622: f004 fb51 bl 802fcc8 - 802b626: 60b8 str r0, [r7, #8] + 802b652: f004 fb51 bl 802fcf8 + 802b656: 60b8 str r0, [r7, #8] /* Set CR bits depending on hclk value */ if ((hclk >= 20000000U) && (hclk < 35000000U)) - 802b628: 68bb ldr r3, [r7, #8] - 802b62a: 4a1e ldr r2, [pc, #120] ; (802b6a4 ) - 802b62c: 4293 cmp r3, r2 - 802b62e: d908 bls.n 802b642 - 802b630: 68bb ldr r3, [r7, #8] - 802b632: 4a1d ldr r2, [pc, #116] ; (802b6a8 ) - 802b634: 4293 cmp r3, r2 - 802b636: d804 bhi.n 802b642 + 802b658: 68bb ldr r3, [r7, #8] + 802b65a: 4a1e ldr r2, [pc, #120] ; (802b6d4 ) + 802b65c: 4293 cmp r3, r2 + 802b65e: d908 bls.n 802b672 + 802b660: 68bb ldr r3, [r7, #8] + 802b662: 4a1d ldr r2, [pc, #116] ; (802b6d8 ) + 802b664: 4293 cmp r3, r2 + 802b666: d804 bhi.n 802b672 { /* CSR Clock Range between 20-35 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV16; - 802b638: 68fb ldr r3, [r7, #12] - 802b63a: f443 7300 orr.w r3, r3, #512 ; 0x200 - 802b63e: 60fb str r3, [r7, #12] - 802b640: e027 b.n 802b692 + 802b668: 68fb ldr r3, [r7, #12] + 802b66a: f443 7300 orr.w r3, r3, #512 ; 0x200 + 802b66e: 60fb str r3, [r7, #12] + 802b670: e027 b.n 802b6c2 } else if ((hclk >= 35000000U) && (hclk < 60000000U)) - 802b642: 68bb ldr r3, [r7, #8] - 802b644: 4a18 ldr r2, [pc, #96] ; (802b6a8 ) - 802b646: 4293 cmp r3, r2 - 802b648: d908 bls.n 802b65c - 802b64a: 68bb ldr r3, [r7, #8] - 802b64c: 4a17 ldr r2, [pc, #92] ; (802b6ac ) - 802b64e: 4293 cmp r3, r2 - 802b650: d204 bcs.n 802b65c + 802b672: 68bb ldr r3, [r7, #8] + 802b674: 4a18 ldr r2, [pc, #96] ; (802b6d8 ) + 802b676: 4293 cmp r3, r2 + 802b678: d908 bls.n 802b68c + 802b67a: 68bb ldr r3, [r7, #8] + 802b67c: 4a17 ldr r2, [pc, #92] ; (802b6dc ) + 802b67e: 4293 cmp r3, r2 + 802b680: d204 bcs.n 802b68c { /* CSR Clock Range between 35-60 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV26; - 802b652: 68fb ldr r3, [r7, #12] - 802b654: f443 7340 orr.w r3, r3, #768 ; 0x300 - 802b658: 60fb str r3, [r7, #12] - 802b65a: e01a b.n 802b692 + 802b682: 68fb ldr r3, [r7, #12] + 802b684: f443 7340 orr.w r3, r3, #768 ; 0x300 + 802b688: 60fb str r3, [r7, #12] + 802b68a: e01a b.n 802b6c2 } else if ((hclk >= 60000000U) && (hclk < 100000000U)) - 802b65c: 68bb ldr r3, [r7, #8] - 802b65e: 4a13 ldr r2, [pc, #76] ; (802b6ac ) - 802b660: 4293 cmp r3, r2 - 802b662: d303 bcc.n 802b66c - 802b664: 68bb ldr r3, [r7, #8] - 802b666: 4a12 ldr r2, [pc, #72] ; (802b6b0 ) - 802b668: 4293 cmp r3, r2 - 802b66a: d911 bls.n 802b690 + 802b68c: 68bb ldr r3, [r7, #8] + 802b68e: 4a13 ldr r2, [pc, #76] ; (802b6dc ) + 802b690: 4293 cmp r3, r2 + 802b692: d303 bcc.n 802b69c + 802b694: 68bb ldr r3, [r7, #8] + 802b696: 4a12 ldr r2, [pc, #72] ; (802b6e0 ) + 802b698: 4293 cmp r3, r2 + 802b69a: d911 bls.n 802b6c0 { /* CSR Clock Range between 60-100 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42; } else if ((hclk >= 100000000U) && (hclk < 150000000U)) - 802b66c: 68bb ldr r3, [r7, #8] - 802b66e: 4a10 ldr r2, [pc, #64] ; (802b6b0 ) - 802b670: 4293 cmp r3, r2 - 802b672: d908 bls.n 802b686 - 802b674: 68bb ldr r3, [r7, #8] - 802b676: 4a0f ldr r2, [pc, #60] ; (802b6b4 ) - 802b678: 4293 cmp r3, r2 - 802b67a: d804 bhi.n 802b686 + 802b69c: 68bb ldr r3, [r7, #8] + 802b69e: 4a10 ldr r2, [pc, #64] ; (802b6e0 ) + 802b6a0: 4293 cmp r3, r2 + 802b6a2: d908 bls.n 802b6b6 + 802b6a4: 68bb ldr r3, [r7, #8] + 802b6a6: 4a0f ldr r2, [pc, #60] ; (802b6e4 ) + 802b6a8: 4293 cmp r3, r2 + 802b6aa: d804 bhi.n 802b6b6 { /* CSR Clock Range between 100-150 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV62; - 802b67c: 68fb ldr r3, [r7, #12] - 802b67e: f443 7380 orr.w r3, r3, #256 ; 0x100 - 802b682: 60fb str r3, [r7, #12] - 802b684: e005 b.n 802b692 + 802b6ac: 68fb ldr r3, [r7, #12] + 802b6ae: f443 7380 orr.w r3, r3, #256 ; 0x100 + 802b6b2: 60fb str r3, [r7, #12] + 802b6b4: e005 b.n 802b6c2 } else /* (hclk >= 150000000)&&(hclk <= 200000000) */ { /* CSR Clock Range between 150-200 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV102; - 802b686: 68fb ldr r3, [r7, #12] - 802b688: f443 6380 orr.w r3, r3, #1024 ; 0x400 - 802b68c: 60fb str r3, [r7, #12] - 802b68e: e000 b.n 802b692 + 802b6b6: 68fb ldr r3, [r7, #12] + 802b6b8: f443 6380 orr.w r3, r3, #1024 ; 0x400 + 802b6bc: 60fb str r3, [r7, #12] + 802b6be: e000 b.n 802b6c2 tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42; - 802b690: bf00 nop + 802b6c0: bf00 nop } /* Configure the CSR Clock Range */ (heth->Instance)->MACMDIOAR = (uint32_t)tmpreg; - 802b692: 687b ldr r3, [r7, #4] - 802b694: 681b ldr r3, [r3, #0] - 802b696: 68fa ldr r2, [r7, #12] - 802b698: f8c3 2200 str.w r2, [r3, #512] ; 0x200 -} - 802b69c: bf00 nop - 802b69e: 3710 adds r7, #16 - 802b6a0: 46bd mov sp, r7 - 802b6a2: bd80 pop {r7, pc} - 802b6a4: 01312cff .word 0x01312cff - 802b6a8: 02160ebf .word 0x02160ebf - 802b6ac: 03938700 .word 0x03938700 - 802b6b0: 05f5e0ff .word 0x05f5e0ff - 802b6b4: 08f0d17f .word 0x08f0d17f - -0802b6b8 : + 802b6c2: 687b ldr r3, [r7, #4] + 802b6c4: 681b ldr r3, [r3, #0] + 802b6c6: 68fa ldr r2, [r7, #12] + 802b6c8: f8c3 2200 str.w r2, [r3, #512] ; 0x200 +} + 802b6cc: bf00 nop + 802b6ce: 3710 adds r7, #16 + 802b6d0: 46bd mov sp, r7 + 802b6d2: bd80 pop {r7, pc} + 802b6d4: 01312cff .word 0x01312cff + 802b6d8: 02160ebf .word 0x02160ebf + 802b6dc: 03938700 .word 0x03938700 + 802b6e0: 05f5e0ff .word 0x05f5e0ff + 802b6e4: 08f0d17f .word 0x08f0d17f + +0802b6e8 : * @{ */ static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) { - 802b6b8: b480 push {r7} - 802b6ba: b085 sub sp, #20 - 802b6bc: af00 add r7, sp, #0 - 802b6be: 6078 str r0, [r7, #4] - 802b6c0: 6039 str r1, [r7, #0] + 802b6e8: b480 push {r7} + 802b6ea: b085 sub sp, #20 + 802b6ec: af00 add r7, sp, #0 + 802b6ee: 6078 str r0, [r7, #4] + 802b6f0: 6039 str r1, [r7, #0] uint32_t macregval; /*------------------------ MACCR Configuration --------------------*/ macregval = (macconf->InterPacketGapVal | - 802b6c2: 683b ldr r3, [r7, #0] - 802b6c4: 689a ldr r2, [r3, #8] + 802b6f2: 683b ldr r3, [r7, #0] + 802b6f4: 689a ldr r2, [r3, #8] macconf->SourceAddrControl | - 802b6c6: 683b ldr r3, [r7, #0] - 802b6c8: 681b ldr r3, [r3, #0] + 802b6f6: 683b ldr r3, [r7, #0] + 802b6f8: 681b ldr r3, [r3, #0] macregval = (macconf->InterPacketGapVal | - 802b6ca: 431a orrs r2, r3 + 802b6fa: 431a orrs r2, r3 ((uint32_t)macconf->ChecksumOffload << 27) | - 802b6cc: 683b ldr r3, [r7, #0] - 802b6ce: 791b ldrb r3, [r3, #4] - 802b6d0: 06db lsls r3, r3, #27 + 802b6fc: 683b ldr r3, [r7, #0] + 802b6fe: 791b ldrb r3, [r3, #4] + 802b700: 06db lsls r3, r3, #27 macconf->SourceAddrControl | - 802b6d2: 431a orrs r2, r3 + 802b702: 431a orrs r2, r3 ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) | - 802b6d4: 683b ldr r3, [r7, #0] - 802b6d6: 7b1b ldrb r3, [r3, #12] - 802b6d8: 05db lsls r3, r3, #23 + 802b704: 683b ldr r3, [r7, #0] + 802b706: 7b1b ldrb r3, [r3, #12] + 802b708: 05db lsls r3, r3, #23 ((uint32_t)macconf->ChecksumOffload << 27) | - 802b6da: 431a orrs r2, r3 + 802b70a: 431a orrs r2, r3 ((uint32_t)macconf->Support2KPacket << 22) | - 802b6dc: 683b ldr r3, [r7, #0] - 802b6de: 7b5b ldrb r3, [r3, #13] - 802b6e0: 059b lsls r3, r3, #22 + 802b70c: 683b ldr r3, [r7, #0] + 802b70e: 7b5b ldrb r3, [r3, #13] + 802b710: 059b lsls r3, r3, #22 ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) | - 802b6e2: 431a orrs r2, r3 + 802b712: 431a orrs r2, r3 ((uint32_t)macconf->CRCStripTypePacket << 21) | - 802b6e4: 683b ldr r3, [r7, #0] - 802b6e6: 7b9b ldrb r3, [r3, #14] - 802b6e8: 055b lsls r3, r3, #21 + 802b714: 683b ldr r3, [r7, #0] + 802b716: 7b9b ldrb r3, [r3, #14] + 802b718: 055b lsls r3, r3, #21 ((uint32_t)macconf->Support2KPacket << 22) | - 802b6ea: 431a orrs r2, r3 + 802b71a: 431a orrs r2, r3 ((uint32_t)macconf->AutomaticPadCRCStrip << 20) | - 802b6ec: 683b ldr r3, [r7, #0] - 802b6ee: 7bdb ldrb r3, [r3, #15] - 802b6f0: 051b lsls r3, r3, #20 + 802b71c: 683b ldr r3, [r7, #0] + 802b71e: 7bdb ldrb r3, [r3, #15] + 802b720: 051b lsls r3, r3, #20 ((uint32_t)macconf->CRCStripTypePacket << 21) | - 802b6f2: 4313 orrs r3, r2 + 802b722: 4313 orrs r3, r2 ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) | - 802b6f4: 683a ldr r2, [r7, #0] - 802b6f6: 7c12 ldrb r2, [r2, #16] - 802b6f8: 2a00 cmp r2, #0 - 802b6fa: d102 bne.n 802b702 - 802b6fc: f44f 2200 mov.w r2, #524288 ; 0x80000 - 802b700: e000 b.n 802b704 - 802b702: 2200 movs r2, #0 + 802b724: 683a ldr r2, [r7, #0] + 802b726: 7c12 ldrb r2, [r2, #16] + 802b728: 2a00 cmp r2, #0 + 802b72a: d102 bne.n 802b732 + 802b72c: f44f 2200 mov.w r2, #524288 ; 0x80000 + 802b730: e000 b.n 802b734 + 802b732: 2200 movs r2, #0 ((uint32_t)macconf->AutomaticPadCRCStrip << 20) | - 802b704: 4313 orrs r3, r2 + 802b734: 4313 orrs r3, r2 ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) | - 802b706: 683a ldr r2, [r7, #0] - 802b708: 7c52 ldrb r2, [r2, #17] - 802b70a: 2a00 cmp r2, #0 - 802b70c: d102 bne.n 802b714 - 802b70e: f44f 3200 mov.w r2, #131072 ; 0x20000 - 802b712: e000 b.n 802b716 - 802b714: 2200 movs r2, #0 + 802b736: 683a ldr r2, [r7, #0] + 802b738: 7c52 ldrb r2, [r2, #17] + 802b73a: 2a00 cmp r2, #0 + 802b73c: d102 bne.n 802b744 + 802b73e: f44f 3200 mov.w r2, #131072 ; 0x20000 + 802b742: e000 b.n 802b746 + 802b744: 2200 movs r2, #0 ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) | - 802b716: 431a orrs r2, r3 + 802b746: 431a orrs r2, r3 ((uint32_t)macconf->JumboPacket << 16) | - 802b718: 683b ldr r3, [r7, #0] - 802b71a: 7c9b ldrb r3, [r3, #18] - 802b71c: 041b lsls r3, r3, #16 + 802b748: 683b ldr r3, [r7, #0] + 802b74a: 7c9b ldrb r3, [r3, #18] + 802b74c: 041b lsls r3, r3, #16 ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) | - 802b71e: 431a orrs r2, r3 + 802b74e: 431a orrs r2, r3 macconf->Speed | - 802b720: 683b ldr r3, [r7, #0] - 802b722: 695b ldr r3, [r3, #20] + 802b750: 683b ldr r3, [r7, #0] + 802b752: 695b ldr r3, [r3, #20] ((uint32_t)macconf->JumboPacket << 16) | - 802b724: 431a orrs r2, r3 + 802b754: 431a orrs r2, r3 macconf->DuplexMode | - 802b726: 683b ldr r3, [r7, #0] - 802b728: 699b ldr r3, [r3, #24] + 802b756: 683b ldr r3, [r7, #0] + 802b758: 699b ldr r3, [r3, #24] macconf->Speed | - 802b72a: 431a orrs r2, r3 + 802b75a: 431a orrs r2, r3 ((uint32_t)macconf->LoopbackMode << 12) | - 802b72c: 683b ldr r3, [r7, #0] - 802b72e: 7f1b ldrb r3, [r3, #28] - 802b730: 031b lsls r3, r3, #12 + 802b75c: 683b ldr r3, [r7, #0] + 802b75e: 7f1b ldrb r3, [r3, #28] + 802b760: 031b lsls r3, r3, #12 macconf->DuplexMode | - 802b732: 431a orrs r2, r3 + 802b762: 431a orrs r2, r3 ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) | - 802b734: 683b ldr r3, [r7, #0] - 802b736: 7f5b ldrb r3, [r3, #29] - 802b738: 02db lsls r3, r3, #11 + 802b764: 683b ldr r3, [r7, #0] + 802b766: 7f5b ldrb r3, [r3, #29] + 802b768: 02db lsls r3, r3, #11 ((uint32_t)macconf->LoopbackMode << 12) | - 802b73a: 4313 orrs r3, r2 + 802b76a: 4313 orrs r3, r2 ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) | - 802b73c: 683a ldr r2, [r7, #0] - 802b73e: 7f92 ldrb r2, [r2, #30] - 802b740: 2a00 cmp r2, #0 - 802b742: d102 bne.n 802b74a - 802b744: f44f 6280 mov.w r2, #1024 ; 0x400 - 802b748: e000 b.n 802b74c - 802b74a: 2200 movs r2, #0 + 802b76c: 683a ldr r2, [r7, #0] + 802b76e: 7f92 ldrb r2, [r2, #30] + 802b770: 2a00 cmp r2, #0 + 802b772: d102 bne.n 802b77a + 802b774: f44f 6280 mov.w r2, #1024 ; 0x400 + 802b778: e000 b.n 802b77c + 802b77a: 2200 movs r2, #0 ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) | - 802b74c: 431a orrs r2, r3 + 802b77c: 431a orrs r2, r3 ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) | - 802b74e: 683b ldr r3, [r7, #0] - 802b750: 7fdb ldrb r3, [r3, #31] - 802b752: 025b lsls r3, r3, #9 + 802b77e: 683b ldr r3, [r7, #0] + 802b780: 7fdb ldrb r3, [r3, #31] + 802b782: 025b lsls r3, r3, #9 ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) | - 802b754: 4313 orrs r3, r2 + 802b784: 4313 orrs r3, r2 ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) | - 802b756: 683a ldr r2, [r7, #0] - 802b758: f892 2020 ldrb.w r2, [r2, #32] - 802b75c: 2a00 cmp r2, #0 - 802b75e: d102 bne.n 802b766 - 802b760: f44f 7280 mov.w r2, #256 ; 0x100 - 802b764: e000 b.n 802b768 - 802b766: 2200 movs r2, #0 + 802b786: 683a ldr r2, [r7, #0] + 802b788: f892 2020 ldrb.w r2, [r2, #32] + 802b78c: 2a00 cmp r2, #0 + 802b78e: d102 bne.n 802b796 + 802b790: f44f 7280 mov.w r2, #256 ; 0x100 + 802b794: e000 b.n 802b798 + 802b796: 2200 movs r2, #0 ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) | - 802b768: 431a orrs r2, r3 + 802b798: 431a orrs r2, r3 macconf->BackOffLimit | - 802b76a: 683b ldr r3, [r7, #0] - 802b76c: 6a5b ldr r3, [r3, #36] ; 0x24 + 802b79a: 683b ldr r3, [r7, #0] + 802b79c: 6a5b ldr r3, [r3, #36] ; 0x24 ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) | - 802b76e: 431a orrs r2, r3 + 802b79e: 431a orrs r2, r3 ((uint32_t)macconf->DeferralCheck << 4) | - 802b770: 683b ldr r3, [r7, #0] - 802b772: f893 3028 ldrb.w r3, [r3, #40] ; 0x28 - 802b776: 011b lsls r3, r3, #4 + 802b7a0: 683b ldr r3, [r7, #0] + 802b7a2: f893 3028 ldrb.w r3, [r3, #40] ; 0x28 + 802b7a6: 011b lsls r3, r3, #4 macconf->BackOffLimit | - 802b778: 431a orrs r2, r3 + 802b7a8: 431a orrs r2, r3 macconf->PreambleLength); - 802b77a: 683b ldr r3, [r7, #0] - 802b77c: 6adb ldr r3, [r3, #44] ; 0x2c + 802b7aa: 683b ldr r3, [r7, #0] + 802b7ac: 6adb ldr r3, [r3, #44] ; 0x2c macregval = (macconf->InterPacketGapVal | - 802b77e: 4313 orrs r3, r2 - 802b780: 60fb str r3, [r7, #12] + 802b7ae: 4313 orrs r3, r2 + 802b7b0: 60fb str r3, [r7, #12] /* Write to MACCR */ MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval); - 802b782: 687b ldr r3, [r7, #4] - 802b784: 681b ldr r3, [r3, #0] - 802b786: 681a ldr r2, [r3, #0] - 802b788: 4b56 ldr r3, [pc, #344] ; (802b8e4 ) - 802b78a: 4013 ands r3, r2 - 802b78c: 687a ldr r2, [r7, #4] - 802b78e: 6812 ldr r2, [r2, #0] - 802b790: 68f9 ldr r1, [r7, #12] - 802b792: 430b orrs r3, r1 - 802b794: 6013 str r3, [r2, #0] + 802b7b2: 687b ldr r3, [r7, #4] + 802b7b4: 681b ldr r3, [r3, #0] + 802b7b6: 681a ldr r2, [r3, #0] + 802b7b8: 4b56 ldr r3, [pc, #344] ; (802b914 ) + 802b7ba: 4013 ands r3, r2 + 802b7bc: 687a ldr r2, [r7, #4] + 802b7be: 6812 ldr r2, [r2, #0] + 802b7c0: 68f9 ldr r1, [r7, #12] + 802b7c2: 430b orrs r3, r1 + 802b7c4: 6013 str r3, [r2, #0] /*------------------------ MACECR Configuration --------------------*/ macregval = ((macconf->ExtendedInterPacketGapVal << 25) | - 802b796: 683b ldr r3, [r7, #0] - 802b798: 6bdb ldr r3, [r3, #60] ; 0x3c - 802b79a: 065a lsls r2, r3, #25 + 802b7c6: 683b ldr r3, [r7, #0] + 802b7c8: 6bdb ldr r3, [r3, #60] ; 0x3c + 802b7ca: 065a lsls r2, r3, #25 ((uint32_t)macconf->ExtendedInterPacketGap << 24) | - 802b79c: 683b ldr r3, [r7, #0] - 802b79e: f893 3038 ldrb.w r3, [r3, #56] ; 0x38 - 802b7a2: 061b lsls r3, r3, #24 + 802b7cc: 683b ldr r3, [r7, #0] + 802b7ce: f893 3038 ldrb.w r3, [r3, #56] ; 0x38 + 802b7d2: 061b lsls r3, r3, #24 macregval = ((macconf->ExtendedInterPacketGapVal << 25) | - 802b7a4: 431a orrs r2, r3 + 802b7d4: 431a orrs r2, r3 ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) | - 802b7a6: 683b ldr r3, [r7, #0] - 802b7a8: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 802b7ac: 049b lsls r3, r3, #18 + 802b7d6: 683b ldr r3, [r7, #0] + 802b7d8: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 + 802b7dc: 049b lsls r3, r3, #18 ((uint32_t)macconf->ExtendedInterPacketGap << 24) | - 802b7ae: 431a orrs r2, r3 + 802b7de: 431a orrs r2, r3 ((uint32_t)macconf->SlowProtocolDetect << 17) | - 802b7b0: 683b ldr r3, [r7, #0] - 802b7b2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 802b7b6: 045b lsls r3, r3, #17 + 802b7e0: 683b ldr r3, [r7, #0] + 802b7e2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 802b7e6: 045b lsls r3, r3, #17 ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) | - 802b7b8: 4313 orrs r3, r2 + 802b7e8: 4313 orrs r3, r2 ((uint32_t)((macconf->CRCCheckingRxPackets == DISABLE) ? 1U : 0U) << 16) | - 802b7ba: 683a ldr r2, [r7, #0] - 802b7bc: f892 2032 ldrb.w r2, [r2, #50] ; 0x32 - 802b7c0: 2a00 cmp r2, #0 - 802b7c2: d102 bne.n 802b7ca - 802b7c4: f44f 3280 mov.w r2, #65536 ; 0x10000 - 802b7c8: e000 b.n 802b7cc - 802b7ca: 2200 movs r2, #0 + 802b7ea: 683a ldr r2, [r7, #0] + 802b7ec: f892 2032 ldrb.w r2, [r2, #50] ; 0x32 + 802b7f0: 2a00 cmp r2, #0 + 802b7f2: d102 bne.n 802b7fa + 802b7f4: f44f 3280 mov.w r2, #65536 ; 0x10000 + 802b7f8: e000 b.n 802b7fc + 802b7fa: 2200 movs r2, #0 ((uint32_t)macconf->SlowProtocolDetect << 17) | - 802b7cc: 431a orrs r2, r3 + 802b7fc: 431a orrs r2, r3 macconf->GiantPacketSizeLimit); - 802b7ce: 683b ldr r3, [r7, #0] - 802b7d0: 6b5b ldr r3, [r3, #52] ; 0x34 + 802b7fe: 683b ldr r3, [r7, #0] + 802b800: 6b5b ldr r3, [r3, #52] ; 0x34 macregval = ((macconf->ExtendedInterPacketGapVal << 25) | - 802b7d2: 4313 orrs r3, r2 - 802b7d4: 60fb str r3, [r7, #12] + 802b802: 4313 orrs r3, r2 + 802b804: 60fb str r3, [r7, #12] /* Write to MACECR */ MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval); - 802b7d6: 687b ldr r3, [r7, #4] - 802b7d8: 681b ldr r3, [r3, #0] - 802b7da: 685a ldr r2, [r3, #4] - 802b7dc: 4b42 ldr r3, [pc, #264] ; (802b8e8 ) - 802b7de: 4013 ands r3, r2 - 802b7e0: 687a ldr r2, [r7, #4] - 802b7e2: 6812 ldr r2, [r2, #0] - 802b7e4: 68f9 ldr r1, [r7, #12] - 802b7e6: 430b orrs r3, r1 - 802b7e8: 6053 str r3, [r2, #4] + 802b806: 687b ldr r3, [r7, #4] + 802b808: 681b ldr r3, [r3, #0] + 802b80a: 685a ldr r2, [r3, #4] + 802b80c: 4b42 ldr r3, [pc, #264] ; (802b918 ) + 802b80e: 4013 ands r3, r2 + 802b810: 687a ldr r2, [r7, #4] + 802b812: 6812 ldr r2, [r2, #0] + 802b814: 68f9 ldr r1, [r7, #12] + 802b816: 430b orrs r3, r1 + 802b818: 6053 str r3, [r2, #4] /*------------------------ MACWTR Configuration --------------------*/ macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) | - 802b7ea: 683b ldr r3, [r7, #0] - 802b7ec: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 802b7f0: 021a lsls r2, r3, #8 + 802b81a: 683b ldr r3, [r7, #0] + 802b81c: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 + 802b820: 021a lsls r2, r3, #8 macconf->WatchdogTimeout); - 802b7f2: 683b ldr r3, [r7, #0] - 802b7f4: 6c5b ldr r3, [r3, #68] ; 0x44 + 802b822: 683b ldr r3, [r7, #0] + 802b824: 6c5b ldr r3, [r3, #68] ; 0x44 macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) | - 802b7f6: 4313 orrs r3, r2 - 802b7f8: 60fb str r3, [r7, #12] + 802b826: 4313 orrs r3, r2 + 802b828: 60fb str r3, [r7, #12] /* Write to MACWTR */ MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval); - 802b7fa: 687b ldr r3, [r7, #4] - 802b7fc: 681b ldr r3, [r3, #0] - 802b7fe: 68da ldr r2, [r3, #12] - 802b800: 4b3a ldr r3, [pc, #232] ; (802b8ec ) - 802b802: 4013 ands r3, r2 - 802b804: 687a ldr r2, [r7, #4] - 802b806: 6812 ldr r2, [r2, #0] - 802b808: 68f9 ldr r1, [r7, #12] - 802b80a: 430b orrs r3, r1 - 802b80c: 60d3 str r3, [r2, #12] + 802b82a: 687b ldr r3, [r7, #4] + 802b82c: 681b ldr r3, [r3, #0] + 802b82e: 68da ldr r2, [r3, #12] + 802b830: 4b3a ldr r3, [pc, #232] ; (802b91c ) + 802b832: 4013 ands r3, r2 + 802b834: 687a ldr r2, [r7, #4] + 802b836: 6812 ldr r2, [r2, #0] + 802b838: 68f9 ldr r1, [r7, #12] + 802b83a: 430b orrs r3, r1 + 802b83c: 60d3 str r3, [r2, #12] /*------------------------ MACTFCR Configuration --------------------*/ macregval = (((uint32_t)macconf->TransmitFlowControl << 1) | - 802b80e: 683b ldr r3, [r7, #0] - 802b810: f893 3054 ldrb.w r3, [r3, #84] ; 0x54 - 802b814: 005a lsls r2, r3, #1 + 802b83e: 683b ldr r3, [r7, #0] + 802b840: f893 3054 ldrb.w r3, [r3, #84] ; 0x54 + 802b844: 005a lsls r2, r3, #1 macconf->PauseLowThreshold | - 802b816: 683b ldr r3, [r7, #0] - 802b818: 6d1b ldr r3, [r3, #80] ; 0x50 + 802b846: 683b ldr r3, [r7, #0] + 802b848: 6d1b ldr r3, [r3, #80] ; 0x50 macregval = (((uint32_t)macconf->TransmitFlowControl << 1) | - 802b81a: 4313 orrs r3, r2 + 802b84a: 4313 orrs r3, r2 ((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7) | - 802b81c: 683a ldr r2, [r7, #0] - 802b81e: f892 204c ldrb.w r2, [r2, #76] ; 0x4c - 802b822: 2a00 cmp r2, #0 - 802b824: d101 bne.n 802b82a - 802b826: 2280 movs r2, #128 ; 0x80 - 802b828: e000 b.n 802b82c - 802b82a: 2200 movs r2, #0 + 802b84c: 683a ldr r2, [r7, #0] + 802b84e: f892 204c ldrb.w r2, [r2, #76] ; 0x4c + 802b852: 2a00 cmp r2, #0 + 802b854: d101 bne.n 802b85a + 802b856: 2280 movs r2, #128 ; 0x80 + 802b858: e000 b.n 802b85c + 802b85a: 2200 movs r2, #0 macconf->PauseLowThreshold | - 802b82c: 431a orrs r2, r3 + 802b85c: 431a orrs r2, r3 (macconf->PauseTime << 16)); - 802b82e: 683b ldr r3, [r7, #0] - 802b830: 6c9b ldr r3, [r3, #72] ; 0x48 - 802b832: 041b lsls r3, r3, #16 + 802b85e: 683b ldr r3, [r7, #0] + 802b860: 6c9b ldr r3, [r3, #72] ; 0x48 + 802b862: 041b lsls r3, r3, #16 macregval = (((uint32_t)macconf->TransmitFlowControl << 1) | - 802b834: 4313 orrs r3, r2 - 802b836: 60fb str r3, [r7, #12] + 802b864: 4313 orrs r3, r2 + 802b866: 60fb str r3, [r7, #12] /* Write to MACTFCR */ MODIFY_REG(heth->Instance->MACTFCR, ETH_MACTFCR_MASK, macregval); - 802b838: 687b ldr r3, [r7, #4] - 802b83a: 681b ldr r3, [r3, #0] - 802b83c: 6f1a ldr r2, [r3, #112] ; 0x70 - 802b83e: f64f 730d movw r3, #65293 ; 0xff0d - 802b842: 4013 ands r3, r2 - 802b844: 687a ldr r2, [r7, #4] - 802b846: 6812 ldr r2, [r2, #0] - 802b848: 68f9 ldr r1, [r7, #12] - 802b84a: 430b orrs r3, r1 - 802b84c: 6713 str r3, [r2, #112] ; 0x70 + 802b868: 687b ldr r3, [r7, #4] + 802b86a: 681b ldr r3, [r3, #0] + 802b86c: 6f1a ldr r2, [r3, #112] ; 0x70 + 802b86e: f64f 730d movw r3, #65293 ; 0xff0d + 802b872: 4013 ands r3, r2 + 802b874: 687a ldr r2, [r7, #4] + 802b876: 6812 ldr r2, [r2, #0] + 802b878: 68f9 ldr r1, [r7, #12] + 802b87a: 430b orrs r3, r1 + 802b87c: 6713 str r3, [r2, #112] ; 0x70 /*------------------------ MACRFCR Configuration --------------------*/ macregval = ((uint32_t)macconf->ReceiveFlowControl | - 802b84e: 683b ldr r3, [r7, #0] - 802b850: f893 3056 ldrb.w r3, [r3, #86] ; 0x56 - 802b854: 461a mov r2, r3 + 802b87e: 683b ldr r3, [r7, #0] + 802b880: f893 3056 ldrb.w r3, [r3, #86] ; 0x56 + 802b884: 461a mov r2, r3 ((uint32_t)macconf->UnicastPausePacketDetect << 1)); - 802b856: 683b ldr r3, [r7, #0] - 802b858: f893 3055 ldrb.w r3, [r3, #85] ; 0x55 - 802b85c: 005b lsls r3, r3, #1 + 802b886: 683b ldr r3, [r7, #0] + 802b888: f893 3055 ldrb.w r3, [r3, #85] ; 0x55 + 802b88c: 005b lsls r3, r3, #1 macregval = ((uint32_t)macconf->ReceiveFlowControl | - 802b85e: 4313 orrs r3, r2 - 802b860: 60fb str r3, [r7, #12] + 802b88e: 4313 orrs r3, r2 + 802b890: 60fb str r3, [r7, #12] /* Write to MACRFCR */ MODIFY_REG(heth->Instance->MACRFCR, ETH_MACRFCR_MASK, macregval); - 802b862: 687b ldr r3, [r7, #4] - 802b864: 681b ldr r3, [r3, #0] - 802b866: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802b86a: f023 0103 bic.w r1, r3, #3 - 802b86e: 687b ldr r3, [r7, #4] - 802b870: 681b ldr r3, [r3, #0] - 802b872: 68fa ldr r2, [r7, #12] - 802b874: 430a orrs r2, r1 - 802b876: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 802b892: 687b ldr r3, [r7, #4] + 802b894: 681b ldr r3, [r3, #0] + 802b896: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802b89a: f023 0103 bic.w r1, r3, #3 + 802b89e: 687b ldr r3, [r7, #4] + 802b8a0: 681b ldr r3, [r3, #0] + 802b8a2: 68fa ldr r2, [r7, #12] + 802b8a4: 430a orrs r2, r1 + 802b8a6: f8c3 2090 str.w r2, [r3, #144] ; 0x90 /*------------------------ MTLTQOMR Configuration --------------------*/ /* Write to MTLTQOMR */ MODIFY_REG(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_MASK, macconf->TransmitQueueMode); - 802b87a: 687b ldr r3, [r7, #4] - 802b87c: 681b ldr r3, [r3, #0] - 802b87e: f8d3 3d00 ldr.w r3, [r3, #3328] ; 0xd00 - 802b882: f023 0172 bic.w r1, r3, #114 ; 0x72 - 802b886: 683b ldr r3, [r7, #0] - 802b888: 6d9a ldr r2, [r3, #88] ; 0x58 - 802b88a: 687b ldr r3, [r7, #4] - 802b88c: 681b ldr r3, [r3, #0] - 802b88e: 430a orrs r2, r1 - 802b890: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 + 802b8aa: 687b ldr r3, [r7, #4] + 802b8ac: 681b ldr r3, [r3, #0] + 802b8ae: f8d3 3d00 ldr.w r3, [r3, #3328] ; 0xd00 + 802b8b2: f023 0172 bic.w r1, r3, #114 ; 0x72 + 802b8b6: 683b ldr r3, [r7, #0] + 802b8b8: 6d9a ldr r2, [r3, #88] ; 0x58 + 802b8ba: 687b ldr r3, [r7, #4] + 802b8bc: 681b ldr r3, [r3, #0] + 802b8be: 430a orrs r2, r1 + 802b8c0: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 /*------------------------ MTLRQOMR Configuration --------------------*/ macregval = (macconf->ReceiveQueueMode | - 802b894: 683b ldr r3, [r7, #0] - 802b896: 6ddb ldr r3, [r3, #92] ; 0x5c + 802b8c4: 683b ldr r3, [r7, #0] + 802b8c6: 6ddb ldr r3, [r3, #92] ; 0x5c ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) | - 802b898: 683a ldr r2, [r7, #0] - 802b89a: f892 2060 ldrb.w r2, [r2, #96] ; 0x60 - 802b89e: 2a00 cmp r2, #0 - 802b8a0: d101 bne.n 802b8a6 - 802b8a2: 2240 movs r2, #64 ; 0x40 - 802b8a4: e000 b.n 802b8a8 - 802b8a6: 2200 movs r2, #0 + 802b8c8: 683a ldr r2, [r7, #0] + 802b8ca: f892 2060 ldrb.w r2, [r2, #96] ; 0x60 + 802b8ce: 2a00 cmp r2, #0 + 802b8d0: d101 bne.n 802b8d6 + 802b8d2: 2240 movs r2, #64 ; 0x40 + 802b8d4: e000 b.n 802b8d8 + 802b8d6: 2200 movs r2, #0 macregval = (macconf->ReceiveQueueMode | - 802b8a8: 431a orrs r2, r3 + 802b8d8: 431a orrs r2, r3 ((uint32_t)macconf->ForwardRxErrorPacket << 4) | - 802b8aa: 683b ldr r3, [r7, #0] - 802b8ac: f893 3061 ldrb.w r3, [r3, #97] ; 0x61 - 802b8b0: 011b lsls r3, r3, #4 + 802b8da: 683b ldr r3, [r7, #0] + 802b8dc: f893 3061 ldrb.w r3, [r3, #97] ; 0x61 + 802b8e0: 011b lsls r3, r3, #4 ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) | - 802b8b2: 431a orrs r2, r3 + 802b8e2: 431a orrs r2, r3 ((uint32_t)macconf->ForwardRxUndersizedGoodPacket << 3)); - 802b8b4: 683b ldr r3, [r7, #0] - 802b8b6: f893 3062 ldrb.w r3, [r3, #98] ; 0x62 - 802b8ba: 00db lsls r3, r3, #3 + 802b8e4: 683b ldr r3, [r7, #0] + 802b8e6: f893 3062 ldrb.w r3, [r3, #98] ; 0x62 + 802b8ea: 00db lsls r3, r3, #3 macregval = (macconf->ReceiveQueueMode | - 802b8bc: 4313 orrs r3, r2 - 802b8be: 60fb str r3, [r7, #12] + 802b8ec: 4313 orrs r3, r2 + 802b8ee: 60fb str r3, [r7, #12] /* Write to MTLRQOMR */ MODIFY_REG(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_MASK, macregval); - 802b8c0: 687b ldr r3, [r7, #4] - 802b8c2: 681b ldr r3, [r3, #0] - 802b8c4: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 - 802b8c8: f023 017b bic.w r1, r3, #123 ; 0x7b - 802b8cc: 687b ldr r3, [r7, #4] - 802b8ce: 681b ldr r3, [r3, #0] - 802b8d0: 68fa ldr r2, [r7, #12] - 802b8d2: 430a orrs r2, r1 - 802b8d4: f8c3 2d30 str.w r2, [r3, #3376] ; 0xd30 -} - 802b8d8: bf00 nop - 802b8da: 3714 adds r7, #20 - 802b8dc: 46bd mov sp, r7 - 802b8de: f85d 7b04 ldr.w r7, [sp], #4 - 802b8e2: 4770 bx lr - 802b8e4: 00048083 .word 0x00048083 - 802b8e8: c0f88000 .word 0xc0f88000 - 802b8ec: fffffef0 .word 0xfffffef0 - -0802b8f0 : + 802b8f0: 687b ldr r3, [r7, #4] + 802b8f2: 681b ldr r3, [r3, #0] + 802b8f4: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b8f8: f023 017b bic.w r1, r3, #123 ; 0x7b + 802b8fc: 687b ldr r3, [r7, #4] + 802b8fe: 681b ldr r3, [r3, #0] + 802b900: 68fa ldr r2, [r7, #12] + 802b902: 430a orrs r2, r1 + 802b904: f8c3 2d30 str.w r2, [r3, #3376] ; 0xd30 +} + 802b908: bf00 nop + 802b90a: 3714 adds r7, #20 + 802b90c: 46bd mov sp, r7 + 802b90e: f85d 7b04 ldr.w r7, [sp], #4 + 802b912: 4770 bx lr + 802b914: 00048083 .word 0x00048083 + 802b918: c0f88000 .word 0xc0f88000 + 802b91c: fffffef0 .word 0xfffffef0 + +0802b920 : static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, ETH_DMAConfigTypeDef *dmaconf) { - 802b8f0: b480 push {r7} - 802b8f2: b085 sub sp, #20 - 802b8f4: af00 add r7, sp, #0 - 802b8f6: 6078 str r0, [r7, #4] - 802b8f8: 6039 str r1, [r7, #0] + 802b920: b480 push {r7} + 802b922: b085 sub sp, #20 + 802b924: af00 add r7, sp, #0 + 802b926: 6078 str r0, [r7, #4] + 802b928: 6039 str r1, [r7, #0] uint32_t dmaregval; /*------------------------ DMAMR Configuration --------------------*/ MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaconf->DMAArbitration); - 802b8fa: 687b ldr r3, [r7, #4] - 802b8fc: 681b ldr r3, [r3, #0] - 802b8fe: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b902: 681a ldr r2, [r3, #0] - 802b904: 4b38 ldr r3, [pc, #224] ; (802b9e8 ) - 802b906: 4013 ands r3, r2 - 802b908: 683a ldr r2, [r7, #0] - 802b90a: 6811 ldr r1, [r2, #0] - 802b90c: 687a ldr r2, [r7, #4] - 802b90e: 6812 ldr r2, [r2, #0] - 802b910: 430b orrs r3, r1 - 802b912: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802b916: 6013 str r3, [r2, #0] + 802b92a: 687b ldr r3, [r7, #4] + 802b92c: 681b ldr r3, [r3, #0] + 802b92e: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802b932: 681a ldr r2, [r3, #0] + 802b934: 4b38 ldr r3, [pc, #224] ; (802ba18 ) + 802b936: 4013 ands r3, r2 + 802b938: 683a ldr r2, [r7, #0] + 802b93a: 6811 ldr r1, [r2, #0] + 802b93c: 687a ldr r2, [r7, #4] + 802b93e: 6812 ldr r2, [r2, #0] + 802b940: 430b orrs r3, r1 + 802b942: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802b946: 6013 str r3, [r2, #0] /*------------------------ DMASBMR Configuration --------------------*/ dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) | - 802b918: 683b ldr r3, [r7, #0] - 802b91a: 791b ldrb r3, [r3, #4] - 802b91c: 031a lsls r2, r3, #12 + 802b948: 683b ldr r3, [r7, #0] + 802b94a: 791b ldrb r3, [r3, #4] + 802b94c: 031a lsls r2, r3, #12 dmaconf->BurstMode | - 802b91e: 683b ldr r3, [r7, #0] - 802b920: 689b ldr r3, [r3, #8] + 802b94e: 683b ldr r3, [r7, #0] + 802b950: 689b ldr r3, [r3, #8] dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) | - 802b922: 431a orrs r2, r3 + 802b952: 431a orrs r2, r3 ((uint32_t)dmaconf->RebuildINCRxBurst << 15)); - 802b924: 683b ldr r3, [r7, #0] - 802b926: 7b1b ldrb r3, [r3, #12] - 802b928: 03db lsls r3, r3, #15 + 802b954: 683b ldr r3, [r7, #0] + 802b956: 7b1b ldrb r3, [r3, #12] + 802b958: 03db lsls r3, r3, #15 dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) | - 802b92a: 4313 orrs r3, r2 - 802b92c: 60fb str r3, [r7, #12] + 802b95a: 4313 orrs r3, r2 + 802b95c: 60fb str r3, [r7, #12] MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval); - 802b92e: 687b ldr r3, [r7, #4] - 802b930: 681b ldr r3, [r3, #0] - 802b932: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b936: 685a ldr r2, [r3, #4] - 802b938: 4b2c ldr r3, [pc, #176] ; (802b9ec ) - 802b93a: 4013 ands r3, r2 - 802b93c: 687a ldr r2, [r7, #4] - 802b93e: 6812 ldr r2, [r2, #0] - 802b940: 68f9 ldr r1, [r7, #12] - 802b942: 430b orrs r3, r1 - 802b944: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802b948: 6053 str r3, [r2, #4] + 802b95e: 687b ldr r3, [r7, #4] + 802b960: 681b ldr r3, [r3, #0] + 802b962: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802b966: 685a ldr r2, [r3, #4] + 802b968: 4b2c ldr r3, [pc, #176] ; (802ba1c ) + 802b96a: 4013 ands r3, r2 + 802b96c: 687a ldr r2, [r7, #4] + 802b96e: 6812 ldr r2, [r2, #0] + 802b970: 68f9 ldr r1, [r7, #12] + 802b972: 430b orrs r3, r1 + 802b974: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802b978: 6053 str r3, [r2, #4] /*------------------------ DMACCR Configuration --------------------*/ dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) | - 802b94a: 683b ldr r3, [r7, #0] - 802b94c: 7b5b ldrb r3, [r3, #13] - 802b94e: 041a lsls r2, r3, #16 + 802b97a: 683b ldr r3, [r7, #0] + 802b97c: 7b5b ldrb r3, [r3, #13] + 802b97e: 041a lsls r2, r3, #16 dmaconf->MaximumSegmentSize); - 802b950: 683b ldr r3, [r7, #0] - 802b952: 6a1b ldr r3, [r3, #32] + 802b980: 683b ldr r3, [r7, #0] + 802b982: 6a1b ldr r3, [r3, #32] dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) | - 802b954: 4313 orrs r3, r2 - 802b956: 60fb str r3, [r7, #12] + 802b984: 4313 orrs r3, r2 + 802b986: 60fb str r3, [r7, #12] MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_MASK, dmaregval); - 802b958: 687b ldr r3, [r7, #4] - 802b95a: 681b ldr r3, [r3, #0] - 802b95c: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b960: f8d3 2100 ldr.w r2, [r3, #256] ; 0x100 - 802b964: 4b22 ldr r3, [pc, #136] ; (802b9f0 ) - 802b966: 4013 ands r3, r2 - 802b968: 687a ldr r2, [r7, #4] - 802b96a: 6812 ldr r2, [r2, #0] - 802b96c: 68f9 ldr r1, [r7, #12] - 802b96e: 430b orrs r3, r1 - 802b970: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802b974: f8c2 3100 str.w r3, [r2, #256] ; 0x100 + 802b988: 687b ldr r3, [r7, #4] + 802b98a: 681b ldr r3, [r3, #0] + 802b98c: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802b990: f8d3 2100 ldr.w r2, [r3, #256] ; 0x100 + 802b994: 4b22 ldr r3, [pc, #136] ; (802ba20 ) + 802b996: 4013 ands r3, r2 + 802b998: 687a ldr r2, [r7, #4] + 802b99a: 6812 ldr r2, [r2, #0] + 802b99c: 68f9 ldr r1, [r7, #12] + 802b99e: 430b orrs r3, r1 + 802b9a0: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802b9a4: f8c2 3100 str.w r3, [r2, #256] ; 0x100 /*------------------------ DMACTCR Configuration --------------------*/ dmaregval = (dmaconf->TxDMABurstLength | - 802b978: 683b ldr r3, [r7, #0] - 802b97a: 691a ldr r2, [r3, #16] + 802b9a8: 683b ldr r3, [r7, #0] + 802b9aa: 691a ldr r2, [r3, #16] ((uint32_t)dmaconf->SecondPacketOperate << 4) | - 802b97c: 683b ldr r3, [r7, #0] - 802b97e: 7d1b ldrb r3, [r3, #20] - 802b980: 011b lsls r3, r3, #4 + 802b9ac: 683b ldr r3, [r7, #0] + 802b9ae: 7d1b ldrb r3, [r3, #20] + 802b9b0: 011b lsls r3, r3, #4 dmaregval = (dmaconf->TxDMABurstLength | - 802b982: 431a orrs r2, r3 + 802b9b2: 431a orrs r2, r3 ((uint32_t)dmaconf->TCPSegmentation << 12)); - 802b984: 683b ldr r3, [r7, #0] - 802b986: 7f5b ldrb r3, [r3, #29] - 802b988: 031b lsls r3, r3, #12 + 802b9b4: 683b ldr r3, [r7, #0] + 802b9b6: 7f5b ldrb r3, [r3, #29] + 802b9b8: 031b lsls r3, r3, #12 dmaregval = (dmaconf->TxDMABurstLength | - 802b98a: 4313 orrs r3, r2 - 802b98c: 60fb str r3, [r7, #12] + 802b9ba: 4313 orrs r3, r2 + 802b9bc: 60fb str r3, [r7, #12] MODIFY_REG(heth->Instance->DMACTCR, ETH_DMACTCR_MASK, dmaregval); - 802b98e: 687b ldr r3, [r7, #4] - 802b990: 681b ldr r3, [r3, #0] - 802b992: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b996: f8d3 2104 ldr.w r2, [r3, #260] ; 0x104 - 802b99a: 4b16 ldr r3, [pc, #88] ; (802b9f4 ) - 802b99c: 4013 ands r3, r2 - 802b99e: 687a ldr r2, [r7, #4] - 802b9a0: 6812 ldr r2, [r2, #0] - 802b9a2: 68f9 ldr r1, [r7, #12] - 802b9a4: 430b orrs r3, r1 - 802b9a6: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802b9aa: f8c2 3104 str.w r3, [r2, #260] ; 0x104 + 802b9be: 687b ldr r3, [r7, #4] + 802b9c0: 681b ldr r3, [r3, #0] + 802b9c2: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802b9c6: f8d3 2104 ldr.w r2, [r3, #260] ; 0x104 + 802b9ca: 4b16 ldr r3, [pc, #88] ; (802ba24 ) + 802b9cc: 4013 ands r3, r2 + 802b9ce: 687a ldr r2, [r7, #4] + 802b9d0: 6812 ldr r2, [r2, #0] + 802b9d2: 68f9 ldr r1, [r7, #12] + 802b9d4: 430b orrs r3, r1 + 802b9d6: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802b9da: f8c2 3104 str.w r3, [r2, #260] ; 0x104 /*------------------------ DMACRCR Configuration --------------------*/ dmaregval = (((uint32_t)dmaconf->FlushRxPacket << 31) | - 802b9ae: 683b ldr r3, [r7, #0] - 802b9b0: 7f1b ldrb r3, [r3, #28] - 802b9b2: 07da lsls r2, r3, #31 + 802b9de: 683b ldr r3, [r7, #0] + 802b9e0: 7f1b ldrb r3, [r3, #28] + 802b9e2: 07da lsls r2, r3, #31 dmaconf->RxDMABurstLength); - 802b9b4: 683b ldr r3, [r7, #0] - 802b9b6: 699b ldr r3, [r3, #24] + 802b9e4: 683b ldr r3, [r7, #0] + 802b9e6: 699b ldr r3, [r3, #24] dmaregval = (((uint32_t)dmaconf->FlushRxPacket << 31) | - 802b9b8: 4313 orrs r3, r2 - 802b9ba: 60fb str r3, [r7, #12] + 802b9e8: 4313 orrs r3, r2 + 802b9ea: 60fb str r3, [r7, #12] /* Write to DMACRCR */ MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_MASK, dmaregval); - 802b9bc: 687b ldr r3, [r7, #4] - 802b9be: 681b ldr r3, [r3, #0] - 802b9c0: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b9c4: f8d3 2108 ldr.w r2, [r3, #264] ; 0x108 - 802b9c8: 4b0b ldr r3, [pc, #44] ; (802b9f8 ) - 802b9ca: 4013 ands r3, r2 - 802b9cc: 687a ldr r2, [r7, #4] - 802b9ce: 6812 ldr r2, [r2, #0] - 802b9d0: 68f9 ldr r1, [r7, #12] - 802b9d2: 430b orrs r3, r1 - 802b9d4: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802b9d8: f8c2 3108 str.w r3, [r2, #264] ; 0x108 -} - 802b9dc: bf00 nop - 802b9de: 3714 adds r7, #20 - 802b9e0: 46bd mov sp, r7 - 802b9e2: f85d 7b04 ldr.w r7, [sp], #4 - 802b9e6: 4770 bx lr - 802b9e8: ffff87fd .word 0xffff87fd - 802b9ec: ffff2ffe .word 0xffff2ffe - 802b9f0: fffec000 .word 0xfffec000 - 802b9f4: ffc0efef .word 0xffc0efef - 802b9f8: 7fc0ffff .word 0x7fc0ffff - -0802b9fc : + 802b9ec: 687b ldr r3, [r7, #4] + 802b9ee: 681b ldr r3, [r3, #0] + 802b9f0: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802b9f4: f8d3 2108 ldr.w r2, [r3, #264] ; 0x108 + 802b9f8: 4b0b ldr r3, [pc, #44] ; (802ba28 ) + 802b9fa: 4013 ands r3, r2 + 802b9fc: 687a ldr r2, [r7, #4] + 802b9fe: 6812 ldr r2, [r2, #0] + 802ba00: 68f9 ldr r1, [r7, #12] + 802ba02: 430b orrs r3, r1 + 802ba04: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802ba08: f8c2 3108 str.w r3, [r2, #264] ; 0x108 +} + 802ba0c: bf00 nop + 802ba0e: 3714 adds r7, #20 + 802ba10: 46bd mov sp, r7 + 802ba12: f85d 7b04 ldr.w r7, [sp], #4 + 802ba16: 4770 bx lr + 802ba18: ffff87fd .word 0xffff87fd + 802ba1c: ffff2ffe .word 0xffff2ffe + 802ba20: fffec000 .word 0xfffec000 + 802ba24: ffc0efef .word 0xffc0efef + 802ba28: 7fc0ffff .word 0x7fc0ffff + +0802ba2c : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth) { - 802b9fc: b580 push {r7, lr} - 802b9fe: b0a4 sub sp, #144 ; 0x90 - 802ba00: af00 add r7, sp, #0 - 802ba02: 6078 str r0, [r7, #4] + 802ba2c: b580 push {r7, lr} + 802ba2e: b0a4 sub sp, #144 ; 0x90 + 802ba30: af00 add r7, sp, #0 + 802ba32: 6078 str r0, [r7, #4] ETH_MACConfigTypeDef macDefaultConf; ETH_DMAConfigTypeDef dmaDefaultConf; /*--------------- ETHERNET MAC registers default Configuration --------------*/ macDefaultConf.AutomaticPadCRCStrip = ENABLE; - 802ba04: 2301 movs r3, #1 - 802ba06: f887 303b strb.w r3, [r7, #59] ; 0x3b + 802ba34: 2301 movs r3, #1 + 802ba36: f887 303b strb.w r3, [r7, #59] ; 0x3b macDefaultConf.BackOffLimit = ETH_BACKOFFLIMIT_10; - 802ba0a: 2300 movs r3, #0 - 802ba0c: 653b str r3, [r7, #80] ; 0x50 + 802ba3a: 2300 movs r3, #0 + 802ba3c: 653b str r3, [r7, #80] ; 0x50 macDefaultConf.CarrierSenseBeforeTransmit = DISABLE; - 802ba0e: 2300 movs r3, #0 - 802ba10: f887 3049 strb.w r3, [r7, #73] ; 0x49 + 802ba3e: 2300 movs r3, #0 + 802ba40: f887 3049 strb.w r3, [r7, #73] ; 0x49 macDefaultConf.CarrierSenseDuringTransmit = DISABLE; - 802ba14: 2300 movs r3, #0 - 802ba16: f887 304b strb.w r3, [r7, #75] ; 0x4b + 802ba44: 2300 movs r3, #0 + 802ba46: f887 304b strb.w r3, [r7, #75] ; 0x4b macDefaultConf.ChecksumOffload = ENABLE; - 802ba1a: 2301 movs r3, #1 - 802ba1c: f887 3030 strb.w r3, [r7, #48] ; 0x30 + 802ba4a: 2301 movs r3, #1 + 802ba4c: f887 3030 strb.w r3, [r7, #48] ; 0x30 macDefaultConf.CRCCheckingRxPackets = ENABLE; - 802ba20: 2301 movs r3, #1 - 802ba22: f887 305e strb.w r3, [r7, #94] ; 0x5e + 802ba50: 2301 movs r3, #1 + 802ba52: f887 305e strb.w r3, [r7, #94] ; 0x5e macDefaultConf.CRCStripTypePacket = ENABLE; - 802ba26: 2301 movs r3, #1 - 802ba28: f887 303a strb.w r3, [r7, #58] ; 0x3a + 802ba56: 2301 movs r3, #1 + 802ba58: f887 303a strb.w r3, [r7, #58] ; 0x3a macDefaultConf.DeferralCheck = DISABLE; - 802ba2c: 2300 movs r3, #0 - 802ba2e: f887 3054 strb.w r3, [r7, #84] ; 0x54 + 802ba5c: 2300 movs r3, #0 + 802ba5e: f887 3054 strb.w r3, [r7, #84] ; 0x54 macDefaultConf.DropTCPIPChecksumErrorPacket = ENABLE; - 802ba32: 2301 movs r3, #1 - 802ba34: f887 308c strb.w r3, [r7, #140] ; 0x8c + 802ba62: 2301 movs r3, #1 + 802ba64: f887 308c strb.w r3, [r7, #140] ; 0x8c macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE; - 802ba38: f44f 5300 mov.w r3, #8192 ; 0x2000 - 802ba3c: 647b str r3, [r7, #68] ; 0x44 + 802ba68: f44f 5300 mov.w r3, #8192 ; 0x2000 + 802ba6c: 647b str r3, [r7, #68] ; 0x44 macDefaultConf.ExtendedInterPacketGap = DISABLE; - 802ba3e: 2300 movs r3, #0 - 802ba40: f887 3064 strb.w r3, [r7, #100] ; 0x64 + 802ba6e: 2300 movs r3, #0 + 802ba70: f887 3064 strb.w r3, [r7, #100] ; 0x64 macDefaultConf.ExtendedInterPacketGapVal = 0x0; - 802ba44: 2300 movs r3, #0 - 802ba46: 66bb str r3, [r7, #104] ; 0x68 + 802ba74: 2300 movs r3, #0 + 802ba76: 66bb str r3, [r7, #104] ; 0x68 macDefaultConf.ForwardRxErrorPacket = DISABLE; - 802ba48: 2300 movs r3, #0 - 802ba4a: f887 308d strb.w r3, [r7, #141] ; 0x8d + 802ba78: 2300 movs r3, #0 + 802ba7a: f887 308d strb.w r3, [r7, #141] ; 0x8d macDefaultConf.ForwardRxUndersizedGoodPacket = DISABLE; - 802ba4e: 2300 movs r3, #0 - 802ba50: f887 308e strb.w r3, [r7, #142] ; 0x8e + 802ba7e: 2300 movs r3, #0 + 802ba80: f887 308e strb.w r3, [r7, #142] ; 0x8e macDefaultConf.GiantPacketSizeLimit = 0x618; - 802ba54: f44f 63c3 mov.w r3, #1560 ; 0x618 - 802ba58: 663b str r3, [r7, #96] ; 0x60 + 802ba84: f44f 63c3 mov.w r3, #1560 ; 0x618 + 802ba88: 663b str r3, [r7, #96] ; 0x60 macDefaultConf.GiantPacketSizeLimitControl = DISABLE; - 802ba5a: 2300 movs r3, #0 - 802ba5c: f887 3038 strb.w r3, [r7, #56] ; 0x38 + 802ba8a: 2300 movs r3, #0 + 802ba8c: f887 3038 strb.w r3, [r7, #56] ; 0x38 macDefaultConf.InterPacketGapVal = ETH_INTERPACKETGAP_96BIT; - 802ba60: 2300 movs r3, #0 - 802ba62: 637b str r3, [r7, #52] ; 0x34 + 802ba90: 2300 movs r3, #0 + 802ba92: 637b str r3, [r7, #52] ; 0x34 macDefaultConf.Jabber = ENABLE; - 802ba64: 2301 movs r3, #1 - 802ba66: f887 303d strb.w r3, [r7, #61] ; 0x3d + 802ba94: 2301 movs r3, #1 + 802ba96: f887 303d strb.w r3, [r7, #61] ; 0x3d macDefaultConf.JumboPacket = DISABLE; - 802ba6a: 2300 movs r3, #0 - 802ba6c: f887 303e strb.w r3, [r7, #62] ; 0x3e + 802ba9a: 2300 movs r3, #0 + 802ba9c: f887 303e strb.w r3, [r7, #62] ; 0x3e macDefaultConf.LoopbackMode = DISABLE; - 802ba70: 2300 movs r3, #0 - 802ba72: f887 3048 strb.w r3, [r7, #72] ; 0x48 + 802baa0: 2300 movs r3, #0 + 802baa2: f887 3048 strb.w r3, [r7, #72] ; 0x48 macDefaultConf.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS_4; - 802ba76: 2300 movs r3, #0 - 802ba78: 67fb str r3, [r7, #124] ; 0x7c + 802baa6: 2300 movs r3, #0 + 802baa8: 67fb str r3, [r7, #124] ; 0x7c macDefaultConf.PauseTime = 0x0; - 802ba7a: 2300 movs r3, #0 - 802ba7c: 677b str r3, [r7, #116] ; 0x74 + 802baaa: 2300 movs r3, #0 + 802baac: 677b str r3, [r7, #116] ; 0x74 macDefaultConf.PreambleLength = ETH_PREAMBLELENGTH_7; - 802ba7e: 2300 movs r3, #0 - 802ba80: 65bb str r3, [r7, #88] ; 0x58 + 802baae: 2300 movs r3, #0 + 802bab0: 65bb str r3, [r7, #88] ; 0x58 macDefaultConf.ProgrammableWatchdog = DISABLE; - 802ba82: 2300 movs r3, #0 - 802ba84: f887 306c strb.w r3, [r7, #108] ; 0x6c + 802bab2: 2300 movs r3, #0 + 802bab4: f887 306c strb.w r3, [r7, #108] ; 0x6c macDefaultConf.ReceiveFlowControl = DISABLE; - 802ba88: 2300 movs r3, #0 - 802ba8a: f887 3082 strb.w r3, [r7, #130] ; 0x82 + 802bab8: 2300 movs r3, #0 + 802baba: f887 3082 strb.w r3, [r7, #130] ; 0x82 macDefaultConf.ReceiveOwn = ENABLE; - 802ba8e: 2301 movs r3, #1 - 802ba90: f887 304a strb.w r3, [r7, #74] ; 0x4a + 802babe: 2301 movs r3, #1 + 802bac0: f887 304a strb.w r3, [r7, #74] ; 0x4a macDefaultConf.ReceiveQueueMode = ETH_RECEIVESTOREFORWARD; - 802ba94: 2320 movs r3, #32 - 802ba96: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 802bac4: 2320 movs r3, #32 + 802bac6: f8c7 3088 str.w r3, [r7, #136] ; 0x88 macDefaultConf.RetryTransmission = ENABLE; - 802ba9a: 2301 movs r3, #1 - 802ba9c: f887 304c strb.w r3, [r7, #76] ; 0x4c + 802baca: 2301 movs r3, #1 + 802bacc: f887 304c strb.w r3, [r7, #76] ; 0x4c macDefaultConf.SlowProtocolDetect = DISABLE; - 802baa0: 2300 movs r3, #0 - 802baa2: f887 305d strb.w r3, [r7, #93] ; 0x5d + 802bad0: 2300 movs r3, #0 + 802bad2: f887 305d strb.w r3, [r7, #93] ; 0x5d macDefaultConf.SourceAddrControl = ETH_SOURCEADDRESS_REPLACE_ADDR0; - 802baa6: f04f 5340 mov.w r3, #805306368 ; 0x30000000 - 802baaa: 62fb str r3, [r7, #44] ; 0x2c + 802bad6: f04f 5340 mov.w r3, #805306368 ; 0x30000000 + 802bada: 62fb str r3, [r7, #44] ; 0x2c macDefaultConf.Speed = ETH_SPEED_100M; - 802baac: f44f 4380 mov.w r3, #16384 ; 0x4000 - 802bab0: 643b str r3, [r7, #64] ; 0x40 + 802badc: f44f 4380 mov.w r3, #16384 ; 0x4000 + 802bae0: 643b str r3, [r7, #64] ; 0x40 macDefaultConf.Support2KPacket = DISABLE; - 802bab2: 2300 movs r3, #0 - 802bab4: f887 3039 strb.w r3, [r7, #57] ; 0x39 + 802bae2: 2300 movs r3, #0 + 802bae4: f887 3039 strb.w r3, [r7, #57] ; 0x39 macDefaultConf.TransmitQueueMode = ETH_TRANSMITSTOREFORWARD; - 802bab8: 2302 movs r3, #2 - 802baba: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 802bae8: 2302 movs r3, #2 + 802baea: f8c7 3084 str.w r3, [r7, #132] ; 0x84 macDefaultConf.TransmitFlowControl = DISABLE; - 802babe: 2300 movs r3, #0 - 802bac0: f887 3080 strb.w r3, [r7, #128] ; 0x80 + 802baee: 2300 movs r3, #0 + 802baf0: f887 3080 strb.w r3, [r7, #128] ; 0x80 macDefaultConf.UnicastPausePacketDetect = DISABLE; - 802bac4: 2300 movs r3, #0 - 802bac6: f887 3081 strb.w r3, [r7, #129] ; 0x81 + 802baf4: 2300 movs r3, #0 + 802baf6: f887 3081 strb.w r3, [r7, #129] ; 0x81 macDefaultConf.UnicastSlowProtocolPacketDetect = DISABLE; - 802baca: 2300 movs r3, #0 - 802bacc: f887 305c strb.w r3, [r7, #92] ; 0x5c + 802bafa: 2300 movs r3, #0 + 802bafc: f887 305c strb.w r3, [r7, #92] ; 0x5c macDefaultConf.Watchdog = ENABLE; - 802bad0: 2301 movs r3, #1 - 802bad2: f887 303c strb.w r3, [r7, #60] ; 0x3c + 802bb00: 2301 movs r3, #1 + 802bb02: f887 303c strb.w r3, [r7, #60] ; 0x3c macDefaultConf.WatchdogTimeout = ETH_MACWTR_WTO_2KB; - 802bad6: 2300 movs r3, #0 - 802bad8: 673b str r3, [r7, #112] ; 0x70 + 802bb06: 2300 movs r3, #0 + 802bb08: 673b str r3, [r7, #112] ; 0x70 macDefaultConf.ZeroQuantaPause = ENABLE; - 802bada: 2301 movs r3, #1 - 802badc: f887 3078 strb.w r3, [r7, #120] ; 0x78 + 802bb0a: 2301 movs r3, #1 + 802bb0c: f887 3078 strb.w r3, [r7, #120] ; 0x78 /* MAC default configuration */ ETH_SetMACConfig(heth, &macDefaultConf); - 802bae0: f107 032c add.w r3, r7, #44 ; 0x2c - 802bae4: 4619 mov r1, r3 - 802bae6: 6878 ldr r0, [r7, #4] - 802bae8: f7ff fde6 bl 802b6b8 + 802bb10: f107 032c add.w r3, r7, #44 ; 0x2c + 802bb14: 4619 mov r1, r3 + 802bb16: 6878 ldr r0, [r7, #4] + 802bb18: f7ff fde6 bl 802b6e8 /*--------------- ETHERNET DMA registers default Configuration --------------*/ dmaDefaultConf.AddressAlignedBeats = ENABLE; - 802baec: 2301 movs r3, #1 - 802baee: 733b strb r3, [r7, #12] + 802bb1c: 2301 movs r3, #1 + 802bb1e: 733b strb r3, [r7, #12] dmaDefaultConf.BurstMode = ETH_BURSTLENGTH_FIXED; - 802baf0: 2301 movs r3, #1 - 802baf2: 613b str r3, [r7, #16] + 802bb20: 2301 movs r3, #1 + 802bb22: 613b str r3, [r7, #16] dmaDefaultConf.DMAArbitration = ETH_DMAARBITRATION_RX1_TX1; - 802baf4: 2300 movs r3, #0 - 802baf6: 60bb str r3, [r7, #8] + 802bb24: 2300 movs r3, #0 + 802bb26: 60bb str r3, [r7, #8] dmaDefaultConf.FlushRxPacket = DISABLE; - 802baf8: 2300 movs r3, #0 - 802bafa: f887 3024 strb.w r3, [r7, #36] ; 0x24 + 802bb28: 2300 movs r3, #0 + 802bb2a: f887 3024 strb.w r3, [r7, #36] ; 0x24 dmaDefaultConf.PBLx8Mode = DISABLE; - 802bafe: 2300 movs r3, #0 - 802bb00: 757b strb r3, [r7, #21] + 802bb2e: 2300 movs r3, #0 + 802bb30: 757b strb r3, [r7, #21] dmaDefaultConf.RebuildINCRxBurst = DISABLE; - 802bb02: 2300 movs r3, #0 - 802bb04: 753b strb r3, [r7, #20] + 802bb32: 2300 movs r3, #0 + 802bb34: 753b strb r3, [r7, #20] dmaDefaultConf.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT; - 802bb06: f44f 1300 mov.w r3, #2097152 ; 0x200000 - 802bb0a: 623b str r3, [r7, #32] + 802bb36: f44f 1300 mov.w r3, #2097152 ; 0x200000 + 802bb3a: 623b str r3, [r7, #32] dmaDefaultConf.SecondPacketOperate = DISABLE; - 802bb0c: 2300 movs r3, #0 - 802bb0e: 773b strb r3, [r7, #28] + 802bb3c: 2300 movs r3, #0 + 802bb3e: 773b strb r3, [r7, #28] dmaDefaultConf.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT; - 802bb10: f44f 1300 mov.w r3, #2097152 ; 0x200000 - 802bb14: 61bb str r3, [r7, #24] + 802bb40: f44f 1300 mov.w r3, #2097152 ; 0x200000 + 802bb44: 61bb str r3, [r7, #24] dmaDefaultConf.TCPSegmentation = DISABLE; - 802bb16: 2300 movs r3, #0 - 802bb18: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 802bb46: 2300 movs r3, #0 + 802bb48: f887 3025 strb.w r3, [r7, #37] ; 0x25 dmaDefaultConf.MaximumSegmentSize = ETH_SEGMENT_SIZE_DEFAULT; - 802bb1c: f44f 7306 mov.w r3, #536 ; 0x218 - 802bb20: 62bb str r3, [r7, #40] ; 0x28 + 802bb4c: f44f 7306 mov.w r3, #536 ; 0x218 + 802bb50: 62bb str r3, [r7, #40] ; 0x28 /* DMA default configuration */ ETH_SetDMAConfig(heth, &dmaDefaultConf); - 802bb22: f107 0308 add.w r3, r7, #8 - 802bb26: 4619 mov r1, r3 - 802bb28: 6878 ldr r0, [r7, #4] - 802bb2a: f7ff fee1 bl 802b8f0 + 802bb52: f107 0308 add.w r3, r7, #8 + 802bb56: 4619 mov r1, r3 + 802bb58: 6878 ldr r0, [r7, #4] + 802bb5a: f7ff fee1 bl 802b920 } - 802bb2e: bf00 nop - 802bb30: 3790 adds r7, #144 ; 0x90 - 802bb32: 46bd mov sp, r7 - 802bb34: bd80 pop {r7, pc} + 802bb5e: bf00 nop + 802bb60: 3790 adds r7, #144 ; 0x90 + 802bb62: 46bd mov sp, r7 + 802bb64: bd80 pop {r7, pc} -0802bb36 : +0802bb66 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth) { - 802bb36: b480 push {r7} - 802bb38: b085 sub sp, #20 - 802bb3a: af00 add r7, sp, #0 - 802bb3c: 6078 str r0, [r7, #4] + 802bb66: b480 push {r7} + 802bb68: b085 sub sp, #20 + 802bb6a: af00 add r7, sp, #0 + 802bb6c: 6078 str r0, [r7, #4] ETH_DMADescTypeDef *dmatxdesc; uint32_t i; /* Fill each DMATxDesc descriptor with the right values */ for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++) - 802bb3e: 2300 movs r3, #0 - 802bb40: 60fb str r3, [r7, #12] - 802bb42: e01d b.n 802bb80 + 802bb6e: 2300 movs r3, #0 + 802bb70: 60fb str r3, [r7, #12] + 802bb72: e01d b.n 802bbb0 { dmatxdesc = heth->Init.TxDesc + i; - 802bb44: 687b ldr r3, [r7, #4] - 802bb46: 68d9 ldr r1, [r3, #12] - 802bb48: 68fa ldr r2, [r7, #12] - 802bb4a: 4613 mov r3, r2 - 802bb4c: 005b lsls r3, r3, #1 - 802bb4e: 4413 add r3, r2 - 802bb50: 00db lsls r3, r3, #3 - 802bb52: 440b add r3, r1 - 802bb54: 60bb str r3, [r7, #8] + 802bb74: 687b ldr r3, [r7, #4] + 802bb76: 68d9 ldr r1, [r3, #12] + 802bb78: 68fa ldr r2, [r7, #12] + 802bb7a: 4613 mov r3, r2 + 802bb7c: 005b lsls r3, r3, #1 + 802bb7e: 4413 add r3, r2 + 802bb80: 00db lsls r3, r3, #3 + 802bb82: 440b add r3, r1 + 802bb84: 60bb str r3, [r7, #8] WRITE_REG(dmatxdesc->DESC0, 0x0); - 802bb56: 68bb ldr r3, [r7, #8] - 802bb58: 2200 movs r2, #0 - 802bb5a: 601a str r2, [r3, #0] + 802bb86: 68bb ldr r3, [r7, #8] + 802bb88: 2200 movs r2, #0 + 802bb8a: 601a str r2, [r3, #0] WRITE_REG(dmatxdesc->DESC1, 0x0); - 802bb5c: 68bb ldr r3, [r7, #8] - 802bb5e: 2200 movs r2, #0 - 802bb60: 605a str r2, [r3, #4] + 802bb8c: 68bb ldr r3, [r7, #8] + 802bb8e: 2200 movs r2, #0 + 802bb90: 605a str r2, [r3, #4] WRITE_REG(dmatxdesc->DESC2, 0x0); - 802bb62: 68bb ldr r3, [r7, #8] - 802bb64: 2200 movs r2, #0 - 802bb66: 609a str r2, [r3, #8] + 802bb92: 68bb ldr r3, [r7, #8] + 802bb94: 2200 movs r2, #0 + 802bb96: 609a str r2, [r3, #8] WRITE_REG(dmatxdesc->DESC3, 0x0); - 802bb68: 68bb ldr r3, [r7, #8] - 802bb6a: 2200 movs r2, #0 - 802bb6c: 60da str r2, [r3, #12] + 802bb98: 68bb ldr r3, [r7, #8] + 802bb9a: 2200 movs r2, #0 + 802bb9c: 60da str r2, [r3, #12] WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc); - 802bb6e: 68b9 ldr r1, [r7, #8] - 802bb70: 687b ldr r3, [r7, #4] - 802bb72: 68fa ldr r2, [r7, #12] - 802bb74: 3206 adds r2, #6 - 802bb76: f843 1022 str.w r1, [r3, r2, lsl #2] + 802bb9e: 68b9 ldr r1, [r7, #8] + 802bba0: 687b ldr r3, [r7, #4] + 802bba2: 68fa ldr r2, [r7, #12] + 802bba4: 3206 adds r2, #6 + 802bba6: f843 1022 str.w r1, [r3, r2, lsl #2] for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++) - 802bb7a: 68fb ldr r3, [r7, #12] - 802bb7c: 3301 adds r3, #1 - 802bb7e: 60fb str r3, [r7, #12] - 802bb80: 68fb ldr r3, [r7, #12] - 802bb82: 2b03 cmp r3, #3 - 802bb84: d9de bls.n 802bb44 + 802bbaa: 68fb ldr r3, [r7, #12] + 802bbac: 3301 adds r3, #1 + 802bbae: 60fb str r3, [r7, #12] + 802bbb0: 68fb ldr r3, [r7, #12] + 802bbb2: 2b03 cmp r3, #3 + 802bbb4: d9de bls.n 802bb74 } heth->TxDescList.CurTxDesc = 0; - 802bb86: 687b ldr r3, [r7, #4] - 802bb88: 2200 movs r2, #0 - 802bb8a: 629a str r2, [r3, #40] ; 0x28 + 802bbb6: 687b ldr r3, [r7, #4] + 802bbb8: 2200 movs r2, #0 + 802bbba: 629a str r2, [r3, #40] ; 0x28 /* Set Transmit Descriptor Ring Length */ WRITE_REG(heth->Instance->DMACTDRLR, (ETH_TX_DESC_CNT - 1U)); - 802bb8c: 687b ldr r3, [r7, #4] - 802bb8e: 681b ldr r3, [r3, #0] - 802bb90: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bb94: 461a mov r2, r3 - 802bb96: 2303 movs r3, #3 - 802bb98: f8c2 312c str.w r3, [r2, #300] ; 0x12c + 802bbbc: 687b ldr r3, [r7, #4] + 802bbbe: 681b ldr r3, [r3, #0] + 802bbc0: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bbc4: 461a mov r2, r3 + 802bbc6: 2303 movs r3, #3 + 802bbc8: f8c2 312c str.w r3, [r2, #300] ; 0x12c /* Set Transmit Descriptor List Address */ WRITE_REG(heth->Instance->DMACTDLAR, (uint32_t) heth->Init.TxDesc); - 802bb9c: 687b ldr r3, [r7, #4] - 802bb9e: 68da ldr r2, [r3, #12] - 802bba0: 687b ldr r3, [r7, #4] - 802bba2: 681b ldr r3, [r3, #0] - 802bba4: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bba8: f8c3 2114 str.w r2, [r3, #276] ; 0x114 + 802bbcc: 687b ldr r3, [r7, #4] + 802bbce: 68da ldr r2, [r3, #12] + 802bbd0: 687b ldr r3, [r7, #4] + 802bbd2: 681b ldr r3, [r3, #0] + 802bbd4: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bbd8: f8c3 2114 str.w r2, [r3, #276] ; 0x114 /* Set Transmit Descriptor Tail pointer */ WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc); - 802bbac: 687b ldr r3, [r7, #4] - 802bbae: 68da ldr r2, [r3, #12] - 802bbb0: 687b ldr r3, [r7, #4] - 802bbb2: 681b ldr r3, [r3, #0] - 802bbb4: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bbb8: f8c3 2120 str.w r2, [r3, #288] ; 0x120 -} - 802bbbc: bf00 nop - 802bbbe: 3714 adds r7, #20 - 802bbc0: 46bd mov sp, r7 - 802bbc2: f85d 7b04 ldr.w r7, [sp], #4 - 802bbc6: 4770 bx lr - -0802bbc8 : + 802bbdc: 687b ldr r3, [r7, #4] + 802bbde: 68da ldr r2, [r3, #12] + 802bbe0: 687b ldr r3, [r7, #4] + 802bbe2: 681b ldr r3, [r3, #0] + 802bbe4: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bbe8: f8c3 2120 str.w r2, [r3, #288] ; 0x120 +} + 802bbec: bf00 nop + 802bbee: 3714 adds r7, #20 + 802bbf0: 46bd mov sp, r7 + 802bbf2: f85d 7b04 ldr.w r7, [sp], #4 + 802bbf6: 4770 bx lr + +0802bbf8 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth) { - 802bbc8: b480 push {r7} - 802bbca: b085 sub sp, #20 - 802bbcc: af00 add r7, sp, #0 - 802bbce: 6078 str r0, [r7, #4] + 802bbf8: b480 push {r7} + 802bbfa: b085 sub sp, #20 + 802bbfc: af00 add r7, sp, #0 + 802bbfe: 6078 str r0, [r7, #4] ETH_DMADescTypeDef *dmarxdesc; uint32_t i; for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++) - 802bbd0: 2300 movs r3, #0 - 802bbd2: 60fb str r3, [r7, #12] - 802bbd4: e023 b.n 802bc1e + 802bc00: 2300 movs r3, #0 + 802bc02: 60fb str r3, [r7, #12] + 802bc04: e023 b.n 802bc4e { dmarxdesc = heth->Init.RxDesc + i; - 802bbd6: 687b ldr r3, [r7, #4] - 802bbd8: 6919 ldr r1, [r3, #16] - 802bbda: 68fa ldr r2, [r7, #12] - 802bbdc: 4613 mov r3, r2 - 802bbde: 005b lsls r3, r3, #1 - 802bbe0: 4413 add r3, r2 - 802bbe2: 00db lsls r3, r3, #3 - 802bbe4: 440b add r3, r1 - 802bbe6: 60bb str r3, [r7, #8] + 802bc06: 687b ldr r3, [r7, #4] + 802bc08: 6919 ldr r1, [r3, #16] + 802bc0a: 68fa ldr r2, [r7, #12] + 802bc0c: 4613 mov r3, r2 + 802bc0e: 005b lsls r3, r3, #1 + 802bc10: 4413 add r3, r2 + 802bc12: 00db lsls r3, r3, #3 + 802bc14: 440b add r3, r1 + 802bc16: 60bb str r3, [r7, #8] WRITE_REG(dmarxdesc->DESC0, 0x0); - 802bbe8: 68bb ldr r3, [r7, #8] - 802bbea: 2200 movs r2, #0 - 802bbec: 601a str r2, [r3, #0] + 802bc18: 68bb ldr r3, [r7, #8] + 802bc1a: 2200 movs r2, #0 + 802bc1c: 601a str r2, [r3, #0] WRITE_REG(dmarxdesc->DESC1, 0x0); - 802bbee: 68bb ldr r3, [r7, #8] - 802bbf0: 2200 movs r2, #0 - 802bbf2: 605a str r2, [r3, #4] + 802bc1e: 68bb ldr r3, [r7, #8] + 802bc20: 2200 movs r2, #0 + 802bc22: 605a str r2, [r3, #4] WRITE_REG(dmarxdesc->DESC2, 0x0); - 802bbf4: 68bb ldr r3, [r7, #8] - 802bbf6: 2200 movs r2, #0 - 802bbf8: 609a str r2, [r3, #8] + 802bc24: 68bb ldr r3, [r7, #8] + 802bc26: 2200 movs r2, #0 + 802bc28: 609a str r2, [r3, #8] WRITE_REG(dmarxdesc->DESC3, 0x0); - 802bbfa: 68bb ldr r3, [r7, #8] - 802bbfc: 2200 movs r2, #0 - 802bbfe: 60da str r2, [r3, #12] + 802bc2a: 68bb ldr r3, [r7, #8] + 802bc2c: 2200 movs r2, #0 + 802bc2e: 60da str r2, [r3, #12] WRITE_REG(dmarxdesc->BackupAddr0, 0x0); - 802bc00: 68bb ldr r3, [r7, #8] - 802bc02: 2200 movs r2, #0 - 802bc04: 611a str r2, [r3, #16] + 802bc30: 68bb ldr r3, [r7, #8] + 802bc32: 2200 movs r2, #0 + 802bc34: 611a str r2, [r3, #16] WRITE_REG(dmarxdesc->BackupAddr1, 0x0); - 802bc06: 68bb ldr r3, [r7, #8] - 802bc08: 2200 movs r2, #0 - 802bc0a: 615a str r2, [r3, #20] + 802bc36: 68bb ldr r3, [r7, #8] + 802bc38: 2200 movs r2, #0 + 802bc3a: 615a str r2, [r3, #20] /* Set Rx descritors addresses */ WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc); - 802bc0c: 68b9 ldr r1, [r7, #8] - 802bc0e: 687b ldr r3, [r7, #4] - 802bc10: 68fa ldr r2, [r7, #12] - 802bc12: 3212 adds r2, #18 - 802bc14: f843 1022 str.w r1, [r3, r2, lsl #2] + 802bc3c: 68b9 ldr r1, [r7, #8] + 802bc3e: 687b ldr r3, [r7, #4] + 802bc40: 68fa ldr r2, [r7, #12] + 802bc42: 3212 adds r2, #18 + 802bc44: f843 1022 str.w r1, [r3, r2, lsl #2] for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++) - 802bc18: 68fb ldr r3, [r7, #12] - 802bc1a: 3301 adds r3, #1 - 802bc1c: 60fb str r3, [r7, #12] - 802bc1e: 68fb ldr r3, [r7, #12] - 802bc20: 2b03 cmp r3, #3 - 802bc22: d9d8 bls.n 802bbd6 + 802bc48: 68fb ldr r3, [r7, #12] + 802bc4a: 3301 adds r3, #1 + 802bc4c: 60fb str r3, [r7, #12] + 802bc4e: 68fb ldr r3, [r7, #12] + 802bc50: 2b03 cmp r3, #3 + 802bc52: d9d8 bls.n 802bc06 } WRITE_REG(heth->RxDescList.RxDescIdx, 0); - 802bc24: 687b ldr r3, [r7, #4] - 802bc26: 2200 movs r2, #0 - 802bc28: 65da str r2, [r3, #92] ; 0x5c + 802bc54: 687b ldr r3, [r7, #4] + 802bc56: 2200 movs r2, #0 + 802bc58: 65da str r2, [r3, #92] ; 0x5c WRITE_REG(heth->RxDescList.RxDescCnt, 0); - 802bc2a: 687b ldr r3, [r7, #4] - 802bc2c: 2200 movs r2, #0 - 802bc2e: 661a str r2, [r3, #96] ; 0x60 + 802bc5a: 687b ldr r3, [r7, #4] + 802bc5c: 2200 movs r2, #0 + 802bc5e: 661a str r2, [r3, #96] ; 0x60 WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0); - 802bc30: 687b ldr r3, [r7, #4] - 802bc32: 2200 movs r2, #0 - 802bc34: 669a str r2, [r3, #104] ; 0x68 + 802bc60: 687b ldr r3, [r7, #4] + 802bc62: 2200 movs r2, #0 + 802bc64: 669a str r2, [r3, #104] ; 0x68 WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0); - 802bc36: 687b ldr r3, [r7, #4] - 802bc38: 2200 movs r2, #0 - 802bc3a: 66da str r2, [r3, #108] ; 0x6c + 802bc66: 687b ldr r3, [r7, #4] + 802bc68: 2200 movs r2, #0 + 802bc6a: 66da str r2, [r3, #108] ; 0x6c WRITE_REG(heth->RxDescList.ItMode, 0); - 802bc3c: 687b ldr r3, [r7, #4] - 802bc3e: 2200 movs r2, #0 - 802bc40: 659a str r2, [r3, #88] ; 0x58 + 802bc6c: 687b ldr r3, [r7, #4] + 802bc6e: 2200 movs r2, #0 + 802bc70: 659a str r2, [r3, #88] ; 0x58 /* Set Receive Descriptor Ring Length */ WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U))); - 802bc42: 687b ldr r3, [r7, #4] - 802bc44: 681b ldr r3, [r3, #0] - 802bc46: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bc4a: 461a mov r2, r3 - 802bc4c: 2303 movs r3, #3 - 802bc4e: f8c2 3130 str.w r3, [r2, #304] ; 0x130 + 802bc72: 687b ldr r3, [r7, #4] + 802bc74: 681b ldr r3, [r3, #0] + 802bc76: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bc7a: 461a mov r2, r3 + 802bc7c: 2303 movs r3, #3 + 802bc7e: f8c2 3130 str.w r3, [r2, #304] ; 0x130 /* Set Receive Descriptor List Address */ WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc); - 802bc52: 687b ldr r3, [r7, #4] - 802bc54: 691a ldr r2, [r3, #16] - 802bc56: 687b ldr r3, [r7, #4] - 802bc58: 681b ldr r3, [r3, #0] - 802bc5a: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bc5e: f8c3 211c str.w r2, [r3, #284] ; 0x11c + 802bc82: 687b ldr r3, [r7, #4] + 802bc84: 691a ldr r2, [r3, #16] + 802bc86: 687b ldr r3, [r7, #4] + 802bc88: 681b ldr r3, [r3, #0] + 802bc8a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bc8e: f8c3 211c str.w r2, [r3, #284] ; 0x11c /* Set Receive Descriptor Tail pointer Address */ WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (uint32_t)(ETH_RX_DESC_CNT - 1U)))); - 802bc62: 687b ldr r3, [r7, #4] - 802bc64: 691b ldr r3, [r3, #16] - 802bc66: f103 0248 add.w r2, r3, #72 ; 0x48 - 802bc6a: 687b ldr r3, [r7, #4] - 802bc6c: 681b ldr r3, [r3, #0] - 802bc6e: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bc72: f8c3 2128 str.w r2, [r3, #296] ; 0x128 -} - 802bc76: bf00 nop - 802bc78: 3714 adds r7, #20 - 802bc7a: 46bd mov sp, r7 - 802bc7c: f85d 7b04 ldr.w r7, [sp], #4 - 802bc80: 4770 bx lr + 802bc92: 687b ldr r3, [r7, #4] + 802bc94: 691b ldr r3, [r3, #16] + 802bc96: f103 0248 add.w r2, r3, #72 ; 0x48 + 802bc9a: 687b ldr r3, [r7, #4] + 802bc9c: 681b ldr r3, [r3, #0] + 802bc9e: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bca2: f8c3 2128 str.w r2, [r3, #296] ; 0x128 +} + 802bca6: bf00 nop + 802bca8: 3714 adds r7, #20 + 802bcaa: 46bd mov sp, r7 + 802bcac: f85d 7b04 ldr.w r7, [sp], #4 + 802bcb0: 4770 bx lr ... -0802bc84 : +0802bcb4 : * @param pTxConfig: Tx packet configuration * @param ItMode: Enable or disable Tx EOT interrept * @retval Status */ static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, ETH_TxPacketConfig *pTxConfig, uint32_t ItMode) { - 802bc84: b480 push {r7} - 802bc86: b08d sub sp, #52 ; 0x34 - 802bc88: af00 add r7, sp, #0 - 802bc8a: 60f8 str r0, [r7, #12] - 802bc8c: 60b9 str r1, [r7, #8] - 802bc8e: 607a str r2, [r7, #4] + 802bcb4: b480 push {r7} + 802bcb6: b08d sub sp, #52 ; 0x34 + 802bcb8: af00 add r7, sp, #0 + 802bcba: 60f8 str r0, [r7, #12] + 802bcbc: 60b9 str r1, [r7, #8] + 802bcbe: 607a str r2, [r7, #4] ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; - 802bc90: 68fb ldr r3, [r7, #12] - 802bc92: 3318 adds r3, #24 - 802bc94: 617b str r3, [r7, #20] + 802bcc0: 68fb ldr r3, [r7, #12] + 802bcc2: 3318 adds r3, #24 + 802bcc4: 617b str r3, [r7, #20] uint32_t descidx = dmatxdesclist->CurTxDesc; - 802bc96: 697b ldr r3, [r7, #20] - 802bc98: 691b ldr r3, [r3, #16] - 802bc9a: 62fb str r3, [r7, #44] ; 0x2c + 802bcc6: 697b ldr r3, [r7, #20] + 802bcc8: 691b ldr r3, [r3, #16] + 802bcca: 62fb str r3, [r7, #44] ; 0x2c uint32_t firstdescidx = dmatxdesclist->CurTxDesc; - 802bc9c: 697b ldr r3, [r7, #20] - 802bc9e: 691b ldr r3, [r3, #16] - 802bca0: 613b str r3, [r7, #16] + 802bccc: 697b ldr r3, [r7, #20] + 802bcce: 691b ldr r3, [r3, #16] + 802bcd0: 613b str r3, [r7, #16] uint32_t idx; uint32_t descnbr = 0; - 802bca2: 2300 movs r3, #0 - 802bca4: 627b str r3, [r7, #36] ; 0x24 + 802bcd2: 2300 movs r3, #0 + 802bcd4: 627b str r3, [r7, #36] ; 0x24 ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802bca6: 697b ldr r3, [r7, #20] - 802bca8: 6afa ldr r2, [r7, #44] ; 0x2c - 802bcaa: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802bcae: 623b str r3, [r7, #32] + 802bcd6: 697b ldr r3, [r7, #20] + 802bcd8: 6afa ldr r2, [r7, #44] ; 0x2c + 802bcda: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802bcde: 623b str r3, [r7, #32] ETH_BufferTypeDef *txbuffer = pTxConfig->TxBuffer; - 802bcb0: 68bb ldr r3, [r7, #8] - 802bcb2: 689b ldr r3, [r3, #8] - 802bcb4: 61fb str r3, [r7, #28] + 802bce0: 68bb ldr r3, [r7, #8] + 802bce2: 689b ldr r3, [r3, #8] + 802bce4: 61fb str r3, [r7, #28] uint32_t bd_count = 0; - 802bcb6: 2300 movs r3, #0 - 802bcb8: 61bb str r3, [r7, #24] + 802bce6: 2300 movs r3, #0 + 802bce8: 61bb str r3, [r7, #24] /* Current Tx Descriptor Owned by DMA: cannot be used by the application */ if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) - 802bcba: 6a3b ldr r3, [r7, #32] - 802bcbc: 68db ldr r3, [r3, #12] - 802bcbe: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 - 802bcc2: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802bcc6: d007 beq.n 802bcd8 + 802bcea: 6a3b ldr r3, [r7, #32] + 802bcec: 68db ldr r3, [r3, #12] + 802bcee: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 + 802bcf2: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802bcf6: d007 beq.n 802bd08 || (dmatxdesclist->PacketAddress[descidx] != NULL)) - 802bcc8: 697a ldr r2, [r7, #20] - 802bcca: 6afb ldr r3, [r7, #44] ; 0x2c - 802bccc: 3304 adds r3, #4 - 802bcce: 009b lsls r3, r3, #2 - 802bcd0: 4413 add r3, r2 - 802bcd2: 685b ldr r3, [r3, #4] - 802bcd4: 2b00 cmp r3, #0 - 802bcd6: d001 beq.n 802bcdc + 802bcf8: 697a ldr r2, [r7, #20] + 802bcfa: 6afb ldr r3, [r7, #44] ; 0x2c + 802bcfc: 3304 adds r3, #4 + 802bcfe: 009b lsls r3, r3, #2 + 802bd00: 4413 add r3, r2 + 802bd02: 685b ldr r3, [r3, #4] + 802bd04: 2b00 cmp r3, #0 + 802bd06: d001 beq.n 802bd0c { return HAL_ETH_ERROR_BUSY; - 802bcd8: 2302 movs r3, #2 - 802bcda: e259 b.n 802c190 + 802bd08: 2302 movs r3, #2 + 802bd0a: e259 b.n 802c1c0 /***************************************************************************/ /***************** Context descriptor configuration (Optional) **********/ /***************************************************************************/ /* If VLAN tag is enabled for this packet */ if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET) - 802bcdc: 68bb ldr r3, [r7, #8] - 802bcde: 681b ldr r3, [r3, #0] - 802bce0: f003 0304 and.w r3, r3, #4 - 802bce4: 2b00 cmp r3, #0 - 802bce6: d044 beq.n 802bd72 + 802bd0c: 68bb ldr r3, [r7, #8] + 802bd0e: 681b ldr r3, [r3, #0] + 802bd10: f003 0304 and.w r3, r3, #4 + 802bd14: 2b00 cmp r3, #0 + 802bd16: d044 beq.n 802bda2 { /* Set vlan tag value */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag); - 802bce8: 6a3b ldr r3, [r7, #32] - 802bcea: 68da ldr r2, [r3, #12] - 802bcec: 4b75 ldr r3, [pc, #468] ; (802bec4 ) - 802bcee: 4013 ands r3, r2 - 802bcf0: 68ba ldr r2, [r7, #8] - 802bcf2: 6a52 ldr r2, [r2, #36] ; 0x24 - 802bcf4: 431a orrs r2, r3 - 802bcf6: 6a3b ldr r3, [r7, #32] - 802bcf8: 60da str r2, [r3, #12] + 802bd18: 6a3b ldr r3, [r7, #32] + 802bd1a: 68da ldr r2, [r3, #12] + 802bd1c: 4b75 ldr r3, [pc, #468] ; (802bef4 ) + 802bd1e: 4013 ands r3, r2 + 802bd20: 68ba ldr r2, [r7, #8] + 802bd22: 6a52 ldr r2, [r2, #36] ; 0x24 + 802bd24: 431a orrs r2, r3 + 802bd26: 6a3b ldr r3, [r7, #32] + 802bd28: 60da str r2, [r3, #12] /* Set vlan tag valid bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV); - 802bcfa: 6a3b ldr r3, [r7, #32] - 802bcfc: 68db ldr r3, [r3, #12] - 802bcfe: f443 3280 orr.w r2, r3, #65536 ; 0x10000 - 802bd02: 6a3b ldr r3, [r7, #32] - 802bd04: 60da str r2, [r3, #12] + 802bd2a: 6a3b ldr r3, [r7, #32] + 802bd2c: 68db ldr r3, [r3, #12] + 802bd2e: f443 3280 orr.w r2, r3, #65536 ; 0x10000 + 802bd32: 6a3b ldr r3, [r7, #32] + 802bd34: 60da str r2, [r3, #12] /* Set the descriptor as the vlan input source */ SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI); - 802bd06: 68fb ldr r3, [r7, #12] - 802bd08: 681b ldr r3, [r3, #0] - 802bd0a: 6e1a ldr r2, [r3, #96] ; 0x60 - 802bd0c: 68fb ldr r3, [r7, #12] - 802bd0e: 681b ldr r3, [r3, #0] - 802bd10: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 - 802bd14: 661a str r2, [r3, #96] ; 0x60 + 802bd36: 68fb ldr r3, [r7, #12] + 802bd38: 681b ldr r3, [r3, #0] + 802bd3a: 6e1a ldr r2, [r3, #96] ; 0x60 + 802bd3c: 68fb ldr r3, [r7, #12] + 802bd3e: 681b ldr r3, [r3, #0] + 802bd40: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 + 802bd44: 661a str r2, [r3, #96] ; 0x60 /* if inner VLAN is enabled */ if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_INNERVLANTAG) != (uint32_t)RESET) - 802bd16: 68bb ldr r3, [r7, #8] - 802bd18: 681b ldr r3, [r3, #0] - 802bd1a: f003 0308 and.w r3, r3, #8 - 802bd1e: 2b00 cmp r3, #0 - 802bd20: d027 beq.n 802bd72 + 802bd46: 68bb ldr r3, [r7, #8] + 802bd48: 681b ldr r3, [r3, #0] + 802bd4a: f003 0308 and.w r3, r3, #8 + 802bd4e: 2b00 cmp r3, #0 + 802bd50: d027 beq.n 802bda2 { /* Set inner vlan tag value */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16)); - 802bd22: 6a3b ldr r3, [r7, #32] - 802bd24: 689b ldr r3, [r3, #8] - 802bd26: b29a uxth r2, r3 - 802bd28: 68bb ldr r3, [r7, #8] - 802bd2a: 6adb ldr r3, [r3, #44] ; 0x2c - 802bd2c: 041b lsls r3, r3, #16 - 802bd2e: 431a orrs r2, r3 - 802bd30: 6a3b ldr r3, [r7, #32] - 802bd32: 609a str r2, [r3, #8] + 802bd52: 6a3b ldr r3, [r7, #32] + 802bd54: 689b ldr r3, [r3, #8] + 802bd56: b29a uxth r2, r3 + 802bd58: 68bb ldr r3, [r7, #8] + 802bd5a: 6adb ldr r3, [r3, #44] ; 0x2c + 802bd5c: 041b lsls r3, r3, #16 + 802bd5e: 431a orrs r2, r3 + 802bd60: 6a3b ldr r3, [r7, #32] + 802bd62: 609a str r2, [r3, #8] /* Set inner vlan tag valid bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV); - 802bd34: 6a3b ldr r3, [r7, #32] - 802bd36: 68db ldr r3, [r3, #12] - 802bd38: f443 3200 orr.w r2, r3, #131072 ; 0x20000 - 802bd3c: 6a3b ldr r3, [r7, #32] - 802bd3e: 60da str r2, [r3, #12] + 802bd64: 6a3b ldr r3, [r7, #32] + 802bd66: 68db ldr r3, [r3, #12] + 802bd68: f443 3200 orr.w r2, r3, #131072 ; 0x20000 + 802bd6c: 6a3b ldr r3, [r7, #32] + 802bd6e: 60da str r2, [r3, #12] /* Set Vlan Tag control */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl); - 802bd40: 6a3b ldr r3, [r7, #32] - 802bd42: 68db ldr r3, [r3, #12] - 802bd44: f423 2240 bic.w r2, r3, #786432 ; 0xc0000 - 802bd48: 68bb ldr r3, [r7, #8] - 802bd4a: 6b1b ldr r3, [r3, #48] ; 0x30 - 802bd4c: 431a orrs r2, r3 - 802bd4e: 6a3b ldr r3, [r7, #32] - 802bd50: 60da str r2, [r3, #12] + 802bd70: 6a3b ldr r3, [r7, #32] + 802bd72: 68db ldr r3, [r3, #12] + 802bd74: f423 2240 bic.w r2, r3, #786432 ; 0xc0000 + 802bd78: 68bb ldr r3, [r7, #8] + 802bd7a: 6b1b ldr r3, [r3, #48] ; 0x30 + 802bd7c: 431a orrs r2, r3 + 802bd7e: 6a3b ldr r3, [r7, #32] + 802bd80: 60da str r2, [r3, #12] /* Set the descriptor as the inner vlan input source */ SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI); - 802bd52: 68fb ldr r3, [r7, #12] - 802bd54: 681b ldr r3, [r3, #0] - 802bd56: 6e5a ldr r2, [r3, #100] ; 0x64 - 802bd58: 68fb ldr r3, [r7, #12] - 802bd5a: 681b ldr r3, [r3, #0] - 802bd5c: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 - 802bd60: 665a str r2, [r3, #100] ; 0x64 + 802bd82: 68fb ldr r3, [r7, #12] + 802bd84: 681b ldr r3, [r3, #0] + 802bd86: 6e5a ldr r2, [r3, #100] ; 0x64 + 802bd88: 68fb ldr r3, [r7, #12] + 802bd8a: 681b ldr r3, [r3, #0] + 802bd8c: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 + 802bd90: 665a str r2, [r3, #100] ; 0x64 /* Enable double VLAN processing */ SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP); - 802bd62: 68fb ldr r3, [r7, #12] - 802bd64: 681b ldr r3, [r3, #0] - 802bd66: 6d1a ldr r2, [r3, #80] ; 0x50 - 802bd68: 68fb ldr r3, [r7, #12] - 802bd6a: 681b ldr r3, [r3, #0] - 802bd6c: f042 6280 orr.w r2, r2, #67108864 ; 0x4000000 - 802bd70: 651a str r2, [r3, #80] ; 0x50 + 802bd92: 68fb ldr r3, [r7, #12] + 802bd94: 681b ldr r3, [r3, #0] + 802bd96: 6d1a ldr r2, [r3, #80] ; 0x50 + 802bd98: 68fb ldr r3, [r7, #12] + 802bd9a: 681b ldr r3, [r3, #0] + 802bd9c: f042 6280 orr.w r2, r2, #67108864 ; 0x4000000 + 802bda0: 651a str r2, [r3, #80] ; 0x50 } } /* if tcp segmentation is enabled for this packet */ if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET) - 802bd72: 68bb ldr r3, [r7, #8] - 802bd74: 681b ldr r3, [r3, #0] - 802bd76: f003 0310 and.w r3, r3, #16 - 802bd7a: 2b00 cmp r3, #0 - 802bd7c: d00e beq.n 802bd9c + 802bda2: 68bb ldr r3, [r7, #8] + 802bda4: 681b ldr r3, [r3, #0] + 802bda6: f003 0310 and.w r3, r3, #16 + 802bdaa: 2b00 cmp r3, #0 + 802bdac: d00e beq.n 802bdcc { /* Set MSS value */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize); - 802bd7e: 6a3b ldr r3, [r7, #32] - 802bd80: 689a ldr r2, [r3, #8] - 802bd82: 4b51 ldr r3, [pc, #324] ; (802bec8 ) - 802bd84: 4013 ands r3, r2 - 802bd86: 68ba ldr r2, [r7, #8] - 802bd88: 6992 ldr r2, [r2, #24] - 802bd8a: 431a orrs r2, r3 - 802bd8c: 6a3b ldr r3, [r7, #32] - 802bd8e: 609a str r2, [r3, #8] + 802bdae: 6a3b ldr r3, [r7, #32] + 802bdb0: 689a ldr r2, [r3, #8] + 802bdb2: 4b51 ldr r3, [pc, #324] ; (802bef8 ) + 802bdb4: 4013 ands r3, r2 + 802bdb6: 68ba ldr r2, [r7, #8] + 802bdb8: 6992 ldr r2, [r2, #24] + 802bdba: 431a orrs r2, r3 + 802bdbc: 6a3b ldr r3, [r7, #32] + 802bdbe: 609a str r2, [r3, #8] /* Set MSS valid bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV); - 802bd90: 6a3b ldr r3, [r7, #32] - 802bd92: 68db ldr r3, [r3, #12] - 802bd94: f043 6280 orr.w r2, r3, #67108864 ; 0x4000000 - 802bd98: 6a3b ldr r3, [r7, #32] - 802bd9a: 60da str r2, [r3, #12] + 802bdc0: 6a3b ldr r3, [r7, #32] + 802bdc2: 68db ldr r3, [r3, #12] + 802bdc4: f043 6280 orr.w r2, r3, #67108864 ; 0x4000000 + 802bdc8: 6a3b ldr r3, [r7, #32] + 802bdca: 60da str r2, [r3, #12] } if ((READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET) - 802bd9c: 68bb ldr r3, [r7, #8] - 802bd9e: 681b ldr r3, [r3, #0] - 802bda0: f003 0304 and.w r3, r3, #4 - 802bda4: 2b00 cmp r3, #0 - 802bda6: d105 bne.n 802bdb4 + 802bdcc: 68bb ldr r3, [r7, #8] + 802bdce: 681b ldr r3, [r3, #0] + 802bdd0: f003 0304 and.w r3, r3, #4 + 802bdd4: 2b00 cmp r3, #0 + 802bdd6: d105 bne.n 802bde4 || (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)) - 802bda8: 68bb ldr r3, [r7, #8] - 802bdaa: 681b ldr r3, [r3, #0] - 802bdac: f003 0310 and.w r3, r3, #16 - 802bdb0: 2b00 cmp r3, #0 - 802bdb2: d036 beq.n 802be22 + 802bdd8: 68bb ldr r3, [r7, #8] + 802bdda: 681b ldr r3, [r3, #0] + 802bddc: f003 0310 and.w r3, r3, #16 + 802bde0: 2b00 cmp r3, #0 + 802bde2: d036 beq.n 802be52 { /* Set as context descriptor */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT); - 802bdb4: 6a3b ldr r3, [r7, #32] - 802bdb6: 68db ldr r3, [r3, #12] - 802bdb8: f043 4280 orr.w r2, r3, #1073741824 ; 0x40000000 - 802bdbc: 6a3b ldr r3, [r7, #32] - 802bdbe: 60da str r2, [r3, #12] + 802bde4: 6a3b ldr r3, [r7, #32] + 802bde6: 68db ldr r3, [r3, #12] + 802bde8: f043 4280 orr.w r2, r3, #1073741824 ; 0x40000000 + 802bdec: 6a3b ldr r3, [r7, #32] + 802bdee: 60da str r2, [r3, #12] __ASM volatile ("dmb 0xF":::"memory"); - 802bdc0: f3bf 8f5f dmb sy + 802bdf0: f3bf 8f5f dmb sy } - 802bdc4: bf00 nop + 802bdf4: bf00 nop /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); /* Set own bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); - 802bdc6: 6a3b ldr r3, [r7, #32] - 802bdc8: 68db ldr r3, [r3, #12] - 802bdca: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 - 802bdce: 6a3b ldr r3, [r7, #32] - 802bdd0: 60da str r2, [r3, #12] + 802bdf6: 6a3b ldr r3, [r7, #32] + 802bdf8: 68db ldr r3, [r3, #12] + 802bdfa: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 + 802bdfe: 6a3b ldr r3, [r7, #32] + 802be00: 60da str r2, [r3, #12] /* Increment current tx descriptor index */ INCR_TX_DESC_INDEX(descidx, 1U); - 802bdd2: 6afb ldr r3, [r7, #44] ; 0x2c - 802bdd4: 3301 adds r3, #1 - 802bdd6: 62fb str r3, [r7, #44] ; 0x2c - 802bdd8: 6afb ldr r3, [r7, #44] ; 0x2c - 802bdda: 2b03 cmp r3, #3 - 802bddc: d902 bls.n 802bde4 - 802bdde: 6afb ldr r3, [r7, #44] ; 0x2c - 802bde0: 3b04 subs r3, #4 - 802bde2: 62fb str r3, [r7, #44] ; 0x2c + 802be02: 6afb ldr r3, [r7, #44] ; 0x2c + 802be04: 3301 adds r3, #1 + 802be06: 62fb str r3, [r7, #44] ; 0x2c + 802be08: 6afb ldr r3, [r7, #44] ; 0x2c + 802be0a: 2b03 cmp r3, #3 + 802be0c: d902 bls.n 802be14 + 802be0e: 6afb ldr r3, [r7, #44] ; 0x2c + 802be10: 3b04 subs r3, #4 + 802be12: 62fb str r3, [r7, #44] ; 0x2c /* Get current descriptor address */ dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802bde4: 697b ldr r3, [r7, #20] - 802bde6: 6afa ldr r2, [r7, #44] ; 0x2c - 802bde8: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802bdec: 623b str r3, [r7, #32] + 802be14: 697b ldr r3, [r7, #20] + 802be16: 6afa ldr r2, [r7, #44] ; 0x2c + 802be18: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802be1c: 623b str r3, [r7, #32] descnbr += 1U; - 802bdee: 6a7b ldr r3, [r7, #36] ; 0x24 - 802bdf0: 3301 adds r3, #1 - 802bdf2: 627b str r3, [r7, #36] ; 0x24 + 802be1e: 6a7b ldr r3, [r7, #36] ; 0x24 + 802be20: 3301 adds r3, #1 + 802be22: 627b str r3, [r7, #36] ; 0x24 /* Current Tx Descriptor Owned by DMA: cannot be used by the application */ if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) - 802bdf4: 6a3b ldr r3, [r7, #32] - 802bdf6: 68db ldr r3, [r3, #12] - 802bdf8: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 - 802bdfc: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802be00: d10f bne.n 802be22 + 802be24: 6a3b ldr r3, [r7, #32] + 802be26: 68db ldr r3, [r3, #12] + 802be28: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 + 802be2c: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802be30: d10f bne.n 802be52 { dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[firstdescidx]; - 802be02: 697b ldr r3, [r7, #20] - 802be04: 693a ldr r2, [r7, #16] - 802be06: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802be0a: 623b str r3, [r7, #32] + 802be32: 697b ldr r3, [r7, #20] + 802be34: 693a ldr r2, [r7, #16] + 802be36: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802be3a: 623b str r3, [r7, #32] __ASM volatile ("dmb 0xF":::"memory"); - 802be0c: f3bf 8f5f dmb sy + 802be3c: f3bf 8f5f dmb sy } - 802be10: bf00 nop + 802be40: bf00 nop /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); /* Clear own bit */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); - 802be12: 6a3b ldr r3, [r7, #32] - 802be14: 68db ldr r3, [r3, #12] - 802be16: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 802be1a: 6a3b ldr r3, [r7, #32] - 802be1c: 60da str r2, [r3, #12] + 802be42: 6a3b ldr r3, [r7, #32] + 802be44: 68db ldr r3, [r3, #12] + 802be46: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 802be4a: 6a3b ldr r3, [r7, #32] + 802be4c: 60da str r2, [r3, #12] return HAL_ETH_ERROR_BUSY; - 802be1e: 2302 movs r3, #2 - 802be20: e1b6 b.n 802c190 + 802be4e: 2302 movs r3, #2 + 802be50: e1b6 b.n 802c1c0 /***************************************************************************/ /***************** Normal descriptors configuration *****************/ /***************************************************************************/ descnbr += 1U; - 802be22: 6a7b ldr r3, [r7, #36] ; 0x24 - 802be24: 3301 adds r3, #1 - 802be26: 627b str r3, [r7, #36] ; 0x24 + 802be52: 6a7b ldr r3, [r7, #36] ; 0x24 + 802be54: 3301 adds r3, #1 + 802be56: 627b str r3, [r7, #36] ; 0x24 /* Set header or buffer 1 address */ WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); - 802be28: 69fb ldr r3, [r7, #28] - 802be2a: 681b ldr r3, [r3, #0] - 802be2c: 461a mov r2, r3 - 802be2e: 6a3b ldr r3, [r7, #32] - 802be30: 601a str r2, [r3, #0] + 802be58: 69fb ldr r3, [r7, #28] + 802be5a: 681b ldr r3, [r3, #0] + 802be5c: 461a mov r2, r3 + 802be5e: 6a3b ldr r3, [r7, #32] + 802be60: 601a str r2, [r3, #0] /* Set header or buffer 1 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); - 802be32: 6a3b ldr r3, [r7, #32] - 802be34: 689a ldr r2, [r3, #8] - 802be36: 4b24 ldr r3, [pc, #144] ; (802bec8 ) - 802be38: 4013 ands r3, r2 - 802be3a: 69fa ldr r2, [r7, #28] - 802be3c: 6852 ldr r2, [r2, #4] - 802be3e: 431a orrs r2, r3 - 802be40: 6a3b ldr r3, [r7, #32] - 802be42: 609a str r2, [r3, #8] + 802be62: 6a3b ldr r3, [r7, #32] + 802be64: 689a ldr r2, [r3, #8] + 802be66: 4b24 ldr r3, [pc, #144] ; (802bef8 ) + 802be68: 4013 ands r3, r2 + 802be6a: 69fa ldr r2, [r7, #28] + 802be6c: 6852 ldr r2, [r2, #4] + 802be6e: 431a orrs r2, r3 + 802be70: 6a3b ldr r3, [r7, #32] + 802be72: 609a str r2, [r3, #8] if (txbuffer->next != NULL) - 802be44: 69fb ldr r3, [r7, #28] - 802be46: 689b ldr r3, [r3, #8] - 802be48: 2b00 cmp r3, #0 - 802be4a: d012 beq.n 802be72 + 802be74: 69fb ldr r3, [r7, #28] + 802be76: 689b ldr r3, [r3, #8] + 802be78: 2b00 cmp r3, #0 + 802be7a: d012 beq.n 802bea2 { txbuffer = txbuffer->next; - 802be4c: 69fb ldr r3, [r7, #28] - 802be4e: 689b ldr r3, [r3, #8] - 802be50: 61fb str r3, [r7, #28] + 802be7c: 69fb ldr r3, [r7, #28] + 802be7e: 689b ldr r3, [r3, #8] + 802be80: 61fb str r3, [r7, #28] /* Set buffer 2 address */ WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer); - 802be52: 69fb ldr r3, [r7, #28] - 802be54: 681b ldr r3, [r3, #0] - 802be56: 461a mov r2, r3 - 802be58: 6a3b ldr r3, [r7, #32] - 802be5a: 605a str r2, [r3, #4] + 802be82: 69fb ldr r3, [r7, #28] + 802be84: 681b ldr r3, [r3, #0] + 802be86: 461a mov r2, r3 + 802be88: 6a3b ldr r3, [r7, #32] + 802be8a: 605a str r2, [r3, #4] /* Set buffer 2 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); - 802be5c: 6a3b ldr r3, [r7, #32] - 802be5e: 689a ldr r2, [r3, #8] - 802be60: 4b1a ldr r3, [pc, #104] ; (802becc ) - 802be62: 4013 ands r3, r2 - 802be64: 69fa ldr r2, [r7, #28] - 802be66: 6852 ldr r2, [r2, #4] - 802be68: 0412 lsls r2, r2, #16 - 802be6a: 431a orrs r2, r3 - 802be6c: 6a3b ldr r3, [r7, #32] - 802be6e: 609a str r2, [r3, #8] - 802be70: e008 b.n 802be84 + 802be8c: 6a3b ldr r3, [r7, #32] + 802be8e: 689a ldr r2, [r3, #8] + 802be90: 4b1a ldr r3, [pc, #104] ; (802befc ) + 802be92: 4013 ands r3, r2 + 802be94: 69fa ldr r2, [r7, #28] + 802be96: 6852 ldr r2, [r2, #4] + 802be98: 0412 lsls r2, r2, #16 + 802be9a: 431a orrs r2, r3 + 802be9c: 6a3b ldr r3, [r7, #32] + 802be9e: 609a str r2, [r3, #8] + 802bea0: e008 b.n 802beb4 } else { WRITE_REG(dmatxdesc->DESC1, 0x0); - 802be72: 6a3b ldr r3, [r7, #32] - 802be74: 2200 movs r2, #0 - 802be76: 605a str r2, [r3, #4] + 802bea2: 6a3b ldr r3, [r7, #32] + 802bea4: 2200 movs r2, #0 + 802bea6: 605a str r2, [r3, #4] /* Set buffer 2 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); - 802be78: 6a3b ldr r3, [r7, #32] - 802be7a: 689a ldr r2, [r3, #8] - 802be7c: 4b13 ldr r3, [pc, #76] ; (802becc ) - 802be7e: 4013 ands r3, r2 - 802be80: 6a3a ldr r2, [r7, #32] - 802be82: 6093 str r3, [r2, #8] + 802bea8: 6a3b ldr r3, [r7, #32] + 802beaa: 689a ldr r2, [r3, #8] + 802beac: 4b13 ldr r3, [pc, #76] ; (802befc ) + 802beae: 4013 ands r3, r2 + 802beb0: 6a3a ldr r2, [r7, #32] + 802beb2: 6093 str r3, [r2, #8] } if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET) - 802be84: 68bb ldr r3, [r7, #8] - 802be86: 681b ldr r3, [r3, #0] - 802be88: f003 0310 and.w r3, r3, #16 - 802be8c: 2b00 cmp r3, #0 - 802be8e: d021 beq.n 802bed4 + 802beb4: 68bb ldr r3, [r7, #8] + 802beb6: 681b ldr r3, [r3, #0] + 802beb8: f003 0310 and.w r3, r3, #16 + 802bebc: 2b00 cmp r3, #0 + 802bebe: d021 beq.n 802bf04 { /* Set TCP Header length */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19)); - 802be90: 6a3b ldr r3, [r7, #32] - 802be92: 68db ldr r3, [r3, #12] - 802be94: f423 02f0 bic.w r2, r3, #7864320 ; 0x780000 - 802be98: 68bb ldr r3, [r7, #8] - 802be9a: 6a1b ldr r3, [r3, #32] - 802be9c: 04db lsls r3, r3, #19 - 802be9e: 431a orrs r2, r3 - 802bea0: 6a3b ldr r3, [r7, #32] - 802bea2: 60da str r2, [r3, #12] + 802bec0: 6a3b ldr r3, [r7, #32] + 802bec2: 68db ldr r3, [r3, #12] + 802bec4: f423 02f0 bic.w r2, r3, #7864320 ; 0x780000 + 802bec8: 68bb ldr r3, [r7, #8] + 802beca: 6a1b ldr r3, [r3, #32] + 802becc: 04db lsls r3, r3, #19 + 802bece: 431a orrs r2, r3 + 802bed0: 6a3b ldr r3, [r7, #32] + 802bed2: 60da str r2, [r3, #12] /* Set TCP payload length */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); - 802bea4: 6a3b ldr r3, [r7, #32] - 802bea6: 68da ldr r2, [r3, #12] - 802bea8: 4b09 ldr r3, [pc, #36] ; (802bed0 ) - 802beaa: 4013 ands r3, r2 - 802beac: 68ba ldr r2, [r7, #8] - 802beae: 69d2 ldr r2, [r2, #28] - 802beb0: 431a orrs r2, r3 - 802beb2: 6a3b ldr r3, [r7, #32] - 802beb4: 60da str r2, [r3, #12] - /* Set TCP Segmentation Enabled bit */ - SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); - 802beb6: 6a3b ldr r3, [r7, #32] - 802beb8: 68db ldr r3, [r3, #12] - 802beba: f443 2280 orr.w r2, r3, #262144 ; 0x40000 - 802bebe: 6a3b ldr r3, [r7, #32] - 802bec0: 60da str r2, [r3, #12] - 802bec2: e02e b.n 802bf22 - 802bec4: ffff0000 .word 0xffff0000 - 802bec8: ffffc000 .word 0xffffc000 - 802becc: c000ffff .word 0xc000ffff - 802bed0: fffc0000 .word 0xfffc0000 - } - else - { - MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); 802bed4: 6a3b ldr r3, [r7, #32] 802bed6: 68da ldr r2, [r3, #12] - 802bed8: 4b7b ldr r3, [pc, #492] ; (802c0c8 ) + 802bed8: 4b09 ldr r3, [pc, #36] ; (802bf00 ) 802beda: 4013 ands r3, r2 802bedc: 68ba ldr r2, [r7, #8] - 802bede: 6852 ldr r2, [r2, #4] + 802bede: 69d2 ldr r2, [r2, #28] 802bee0: 431a orrs r2, r3 802bee2: 6a3b ldr r3, [r7, #32] 802bee4: 60da str r2, [r3, #12] + /* Set TCP Segmentation Enabled bit */ + SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); + 802bee6: 6a3b ldr r3, [r7, #32] + 802bee8: 68db ldr r3, [r3, #12] + 802beea: f443 2280 orr.w r2, r3, #262144 ; 0x40000 + 802beee: 6a3b ldr r3, [r7, #32] + 802bef0: 60da str r2, [r3, #12] + 802bef2: e02e b.n 802bf52 + 802bef4: ffff0000 .word 0xffff0000 + 802bef8: ffffc000 .word 0xffffc000 + 802befc: c000ffff .word 0xc000ffff + 802bf00: fffc0000 .word 0xfffc0000 + } + else + { + MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); + 802bf04: 6a3b ldr r3, [r7, #32] + 802bf06: 68da ldr r2, [r3, #12] + 802bf08: 4b7b ldr r3, [pc, #492] ; (802c0f8 ) + 802bf0a: 4013 ands r3, r2 + 802bf0c: 68ba ldr r2, [r7, #8] + 802bf0e: 6852 ldr r2, [r2, #4] + 802bf10: 431a orrs r2, r3 + 802bf12: 6a3b ldr r3, [r7, #32] + 802bf14: 60da str r2, [r3, #12] if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET) - 802bee6: 68bb ldr r3, [r7, #8] - 802bee8: 681b ldr r3, [r3, #0] - 802beea: f003 0301 and.w r3, r3, #1 - 802beee: 2b00 cmp r3, #0 - 802bef0: d008 beq.n 802bf04 + 802bf16: 68bb ldr r3, [r7, #8] + 802bf18: 681b ldr r3, [r3, #0] + 802bf1a: f003 0301 and.w r3, r3, #1 + 802bf1e: 2b00 cmp r3, #0 + 802bf20: d008 beq.n 802bf34 { MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); - 802bef2: 6a3b ldr r3, [r7, #32] - 802bef4: 68db ldr r3, [r3, #12] - 802bef6: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 802befa: 68bb ldr r3, [r7, #8] - 802befc: 695b ldr r3, [r3, #20] - 802befe: 431a orrs r2, r3 - 802bf00: 6a3b ldr r3, [r7, #32] - 802bf02: 60da str r2, [r3, #12] + 802bf22: 6a3b ldr r3, [r7, #32] + 802bf24: 68db ldr r3, [r3, #12] + 802bf26: f423 3240 bic.w r2, r3, #196608 ; 0x30000 + 802bf2a: 68bb ldr r3, [r7, #8] + 802bf2c: 695b ldr r3, [r3, #20] + 802bf2e: 431a orrs r2, r3 + 802bf30: 6a3b ldr r3, [r7, #32] + 802bf32: 60da str r2, [r3, #12] } if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CRCPAD) != (uint32_t)RESET) - 802bf04: 68bb ldr r3, [r7, #8] - 802bf06: 681b ldr r3, [r3, #0] - 802bf08: f003 0320 and.w r3, r3, #32 - 802bf0c: 2b00 cmp r3, #0 - 802bf0e: d008 beq.n 802bf22 + 802bf34: 68bb ldr r3, [r7, #8] + 802bf36: 681b ldr r3, [r3, #0] + 802bf38: f003 0320 and.w r3, r3, #32 + 802bf3c: 2b00 cmp r3, #0 + 802bf3e: d008 beq.n 802bf52 { MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl); - 802bf10: 6a3b ldr r3, [r7, #32] - 802bf12: 68db ldr r3, [r3, #12] - 802bf14: f023 6240 bic.w r2, r3, #201326592 ; 0xc000000 - 802bf18: 68bb ldr r3, [r7, #8] - 802bf1a: 691b ldr r3, [r3, #16] - 802bf1c: 431a orrs r2, r3 - 802bf1e: 6a3b ldr r3, [r7, #32] - 802bf20: 60da str r2, [r3, #12] + 802bf40: 6a3b ldr r3, [r7, #32] + 802bf42: 68db ldr r3, [r3, #12] + 802bf44: f023 6240 bic.w r2, r3, #201326592 ; 0xc000000 + 802bf48: 68bb ldr r3, [r7, #8] + 802bf4a: 691b ldr r3, [r3, #16] + 802bf4c: 431a orrs r2, r3 + 802bf4e: 6a3b ldr r3, [r7, #32] + 802bf50: 60da str r2, [r3, #12] } } if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET) - 802bf22: 68bb ldr r3, [r7, #8] - 802bf24: 681b ldr r3, [r3, #0] - 802bf26: f003 0304 and.w r3, r3, #4 - 802bf2a: 2b00 cmp r3, #0 - 802bf2c: d008 beq.n 802bf40 + 802bf52: 68bb ldr r3, [r7, #8] + 802bf54: 681b ldr r3, [r3, #0] + 802bf56: f003 0304 and.w r3, r3, #4 + 802bf5a: 2b00 cmp r3, #0 + 802bf5c: d008 beq.n 802bf70 { /* Set Vlan Tag control */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl); - 802bf2e: 6a3b ldr r3, [r7, #32] - 802bf30: 689b ldr r3, [r3, #8] - 802bf32: f423 4240 bic.w r2, r3, #49152 ; 0xc000 - 802bf36: 68bb ldr r3, [r7, #8] - 802bf38: 6a9b ldr r3, [r3, #40] ; 0x28 - 802bf3a: 431a orrs r2, r3 - 802bf3c: 6a3b ldr r3, [r7, #32] - 802bf3e: 609a str r2, [r3, #8] + 802bf5e: 6a3b ldr r3, [r7, #32] + 802bf60: 689b ldr r3, [r3, #8] + 802bf62: f423 4240 bic.w r2, r3, #49152 ; 0xc000 + 802bf66: 68bb ldr r3, [r7, #8] + 802bf68: 6a9b ldr r3, [r3, #40] ; 0x28 + 802bf6a: 431a orrs r2, r3 + 802bf6c: 6a3b ldr r3, [r7, #32] + 802bf6e: 609a str r2, [r3, #8] } /* Mark it as First Descriptor */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); - 802bf40: 6a3b ldr r3, [r7, #32] - 802bf42: 68db ldr r3, [r3, #12] - 802bf44: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000 - 802bf48: 6a3b ldr r3, [r7, #32] - 802bf4a: 60da str r2, [r3, #12] + 802bf70: 6a3b ldr r3, [r7, #32] + 802bf72: 68db ldr r3, [r3, #12] + 802bf74: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000 + 802bf78: 6a3b ldr r3, [r7, #32] + 802bf7a: 60da str r2, [r3, #12] /* Mark it as NORMAL descriptor */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); - 802bf4c: 6a3b ldr r3, [r7, #32] - 802bf4e: 68db ldr r3, [r3, #12] - 802bf50: f023 4280 bic.w r2, r3, #1073741824 ; 0x40000000 - 802bf54: 6a3b ldr r3, [r7, #32] - 802bf56: 60da str r2, [r3, #12] + 802bf7c: 6a3b ldr r3, [r7, #32] + 802bf7e: 68db ldr r3, [r3, #12] + 802bf80: f023 4280 bic.w r2, r3, #1073741824 ; 0x40000000 + 802bf84: 6a3b ldr r3, [r7, #32] + 802bf86: 60da str r2, [r3, #12] __ASM volatile ("dmb 0xF":::"memory"); - 802bf58: f3bf 8f5f dmb sy + 802bf88: f3bf 8f5f dmb sy } - 802bf5c: bf00 nop + 802bf8c: bf00 nop /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); /* set OWN bit of FIRST descriptor */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); - 802bf5e: 6a3b ldr r3, [r7, #32] - 802bf60: 68db ldr r3, [r3, #12] - 802bf62: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 - 802bf66: 6a3b ldr r3, [r7, #32] - 802bf68: 60da str r2, [r3, #12] + 802bf8e: 6a3b ldr r3, [r7, #32] + 802bf90: 68db ldr r3, [r3, #12] + 802bf92: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 + 802bf96: 6a3b ldr r3, [r7, #32] + 802bf98: 60da str r2, [r3, #12] /* If source address insertion/replacement is enabled for this packet */ if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_SAIC) != (uint32_t)RESET) - 802bf6a: 68bb ldr r3, [r7, #8] - 802bf6c: 681b ldr r3, [r3, #0] - 802bf6e: f003 0302 and.w r3, r3, #2 - 802bf72: 2b00 cmp r3, #0 - 802bf74: f000 80da beq.w 802c12c + 802bf9a: 68bb ldr r3, [r7, #8] + 802bf9c: 681b ldr r3, [r3, #0] + 802bf9e: f003 0302 and.w r3, r3, #2 + 802bfa2: 2b00 cmp r3, #0 + 802bfa4: f000 80da beq.w 802c15c { MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl); - 802bf78: 6a3b ldr r3, [r7, #32] - 802bf7a: 68db ldr r3, [r3, #12] - 802bf7c: f023 7260 bic.w r2, r3, #58720256 ; 0x3800000 - 802bf80: 68bb ldr r3, [r7, #8] - 802bf82: 68db ldr r3, [r3, #12] - 802bf84: 431a orrs r2, r3 - 802bf86: 6a3b ldr r3, [r7, #32] - 802bf88: 60da str r2, [r3, #12] + 802bfa8: 6a3b ldr r3, [r7, #32] + 802bfaa: 68db ldr r3, [r3, #12] + 802bfac: f023 7260 bic.w r2, r3, #58720256 ; 0x3800000 + 802bfb0: 68bb ldr r3, [r7, #8] + 802bfb2: 68db ldr r3, [r3, #12] + 802bfb4: 431a orrs r2, r3 + 802bfb6: 6a3b ldr r3, [r7, #32] + 802bfb8: 60da str r2, [r3, #12] } /* only if the packet is split into more than one descriptors > 1 */ while (txbuffer->next != NULL) - 802bf8a: e0cf b.n 802c12c + 802bfba: e0cf b.n 802c15c { /* Clear the LD bit of previous descriptor */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); - 802bf8c: 6a3b ldr r3, [r7, #32] - 802bf8e: 68db ldr r3, [r3, #12] - 802bf90: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000 - 802bf94: 6a3b ldr r3, [r7, #32] - 802bf96: 60da str r2, [r3, #12] + 802bfbc: 6a3b ldr r3, [r7, #32] + 802bfbe: 68db ldr r3, [r3, #12] + 802bfc0: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000 + 802bfc4: 6a3b ldr r3, [r7, #32] + 802bfc6: 60da str r2, [r3, #12] /* Increment current tx descriptor index */ INCR_TX_DESC_INDEX(descidx, 1U); - 802bf98: 6afb ldr r3, [r7, #44] ; 0x2c - 802bf9a: 3301 adds r3, #1 - 802bf9c: 62fb str r3, [r7, #44] ; 0x2c - 802bf9e: 6afb ldr r3, [r7, #44] ; 0x2c - 802bfa0: 2b03 cmp r3, #3 - 802bfa2: d902 bls.n 802bfaa - 802bfa4: 6afb ldr r3, [r7, #44] ; 0x2c - 802bfa6: 3b04 subs r3, #4 - 802bfa8: 62fb str r3, [r7, #44] ; 0x2c + 802bfc8: 6afb ldr r3, [r7, #44] ; 0x2c + 802bfca: 3301 adds r3, #1 + 802bfcc: 62fb str r3, [r7, #44] ; 0x2c + 802bfce: 6afb ldr r3, [r7, #44] ; 0x2c + 802bfd0: 2b03 cmp r3, #3 + 802bfd2: d902 bls.n 802bfda + 802bfd4: 6afb ldr r3, [r7, #44] ; 0x2c + 802bfd6: 3b04 subs r3, #4 + 802bfd8: 62fb str r3, [r7, #44] ; 0x2c /* Get current descriptor address */ dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802bfaa: 697b ldr r3, [r7, #20] - 802bfac: 6afa ldr r2, [r7, #44] ; 0x2c - 802bfae: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802bfb2: 623b str r3, [r7, #32] + 802bfda: 697b ldr r3, [r7, #20] + 802bfdc: 6afa ldr r2, [r7, #44] ; 0x2c + 802bfde: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802bfe2: 623b str r3, [r7, #32] /* Clear the FD bit of new Descriptor */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); - 802bfb4: 6a3b ldr r3, [r7, #32] - 802bfb6: 68db ldr r3, [r3, #12] - 802bfb8: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000 - 802bfbc: 6a3b ldr r3, [r7, #32] - 802bfbe: 60da str r2, [r3, #12] + 802bfe4: 6a3b ldr r3, [r7, #32] + 802bfe6: 68db ldr r3, [r3, #12] + 802bfe8: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000 + 802bfec: 6a3b ldr r3, [r7, #32] + 802bfee: 60da str r2, [r3, #12] /* Current Tx Descriptor Owned by DMA: cannot be used by the application */ if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN) - 802bfc0: 6a3b ldr r3, [r7, #32] - 802bfc2: 68db ldr r3, [r3, #12] - 802bfc4: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 - 802bfc8: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802bfcc: d007 beq.n 802bfde + 802bff0: 6a3b ldr r3, [r7, #32] + 802bff2: 68db ldr r3, [r3, #12] + 802bff4: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 + 802bff8: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802bffc: d007 beq.n 802c00e || (dmatxdesclist->PacketAddress[descidx] != NULL)) - 802bfce: 697a ldr r2, [r7, #20] - 802bfd0: 6afb ldr r3, [r7, #44] ; 0x2c - 802bfd2: 3304 adds r3, #4 - 802bfd4: 009b lsls r3, r3, #2 - 802bfd6: 4413 add r3, r2 - 802bfd8: 685b ldr r3, [r3, #4] - 802bfda: 2b00 cmp r3, #0 - 802bfdc: d029 beq.n 802c032 + 802bffe: 697a ldr r2, [r7, #20] + 802c000: 6afb ldr r3, [r7, #44] ; 0x2c + 802c002: 3304 adds r3, #4 + 802c004: 009b lsls r3, r3, #2 + 802c006: 4413 add r3, r2 + 802c008: 685b ldr r3, [r3, #4] + 802c00a: 2b00 cmp r3, #0 + 802c00c: d029 beq.n 802c062 { descidx = firstdescidx; - 802bfde: 693b ldr r3, [r7, #16] - 802bfe0: 62fb str r3, [r7, #44] ; 0x2c + 802c00e: 693b ldr r3, [r7, #16] + 802c010: 62fb str r3, [r7, #44] ; 0x2c dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802bfe2: 697b ldr r3, [r7, #20] - 802bfe4: 6afa ldr r2, [r7, #44] ; 0x2c - 802bfe6: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802bfea: 623b str r3, [r7, #32] + 802c012: 697b ldr r3, [r7, #20] + 802c014: 6afa ldr r2, [r7, #44] ; 0x2c + 802c016: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802c01a: 623b str r3, [r7, #32] /* clear previous desc own bit */ for (idx = 0; idx < descnbr; idx ++) - 802bfec: 2300 movs r3, #0 - 802bfee: 62bb str r3, [r7, #40] ; 0x28 - 802bff0: e019 b.n 802c026 + 802c01c: 2300 movs r3, #0 + 802c01e: 62bb str r3, [r7, #40] ; 0x28 + 802c020: e019 b.n 802c056 __ASM volatile ("dmb 0xF":::"memory"); - 802bff2: f3bf 8f5f dmb sy + 802c022: f3bf 8f5f dmb sy } - 802bff6: bf00 nop + 802c026: bf00 nop { /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); - 802bff8: 6a3b ldr r3, [r7, #32] - 802bffa: 68db ldr r3, [r3, #12] - 802bffc: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 802c000: 6a3b ldr r3, [r7, #32] - 802c002: 60da str r2, [r3, #12] + 802c028: 6a3b ldr r3, [r7, #32] + 802c02a: 68db ldr r3, [r3, #12] + 802c02c: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 802c030: 6a3b ldr r3, [r7, #32] + 802c032: 60da str r2, [r3, #12] /* Increment current tx descriptor index */ INCR_TX_DESC_INDEX(descidx, 1U); - 802c004: 6afb ldr r3, [r7, #44] ; 0x2c - 802c006: 3301 adds r3, #1 - 802c008: 62fb str r3, [r7, #44] ; 0x2c - 802c00a: 6afb ldr r3, [r7, #44] ; 0x2c - 802c00c: 2b03 cmp r3, #3 - 802c00e: d902 bls.n 802c016 - 802c010: 6afb ldr r3, [r7, #44] ; 0x2c - 802c012: 3b04 subs r3, #4 - 802c014: 62fb str r3, [r7, #44] ; 0x2c + 802c034: 6afb ldr r3, [r7, #44] ; 0x2c + 802c036: 3301 adds r3, #1 + 802c038: 62fb str r3, [r7, #44] ; 0x2c + 802c03a: 6afb ldr r3, [r7, #44] ; 0x2c + 802c03c: 2b03 cmp r3, #3 + 802c03e: d902 bls.n 802c046 + 802c040: 6afb ldr r3, [r7, #44] ; 0x2c + 802c042: 3b04 subs r3, #4 + 802c044: 62fb str r3, [r7, #44] ; 0x2c /* Get current descriptor address */ dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802c016: 697b ldr r3, [r7, #20] - 802c018: 6afa ldr r2, [r7, #44] ; 0x2c - 802c01a: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802c01e: 623b str r3, [r7, #32] + 802c046: 697b ldr r3, [r7, #20] + 802c048: 6afa ldr r2, [r7, #44] ; 0x2c + 802c04a: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802c04e: 623b str r3, [r7, #32] for (idx = 0; idx < descnbr; idx ++) - 802c020: 6abb ldr r3, [r7, #40] ; 0x28 - 802c022: 3301 adds r3, #1 - 802c024: 62bb str r3, [r7, #40] ; 0x28 - 802c026: 6aba ldr r2, [r7, #40] ; 0x28 - 802c028: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c02a: 429a cmp r2, r3 - 802c02c: d3e1 bcc.n 802bff2 + 802c050: 6abb ldr r3, [r7, #40] ; 0x28 + 802c052: 3301 adds r3, #1 + 802c054: 62bb str r3, [r7, #40] ; 0x28 + 802c056: 6aba ldr r2, [r7, #40] ; 0x28 + 802c058: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c05a: 429a cmp r2, r3 + 802c05c: d3e1 bcc.n 802c022 } return HAL_ETH_ERROR_BUSY; - 802c02e: 2302 movs r3, #2 - 802c030: e0ae b.n 802c190 + 802c05e: 2302 movs r3, #2 + 802c060: e0ae b.n 802c1c0 } descnbr += 1U; - 802c032: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c034: 3301 adds r3, #1 - 802c036: 627b str r3, [r7, #36] ; 0x24 + 802c062: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c064: 3301 adds r3, #1 + 802c066: 627b str r3, [r7, #36] ; 0x24 /* Get the next Tx buffer in the list */ txbuffer = txbuffer->next; - 802c038: 69fb ldr r3, [r7, #28] - 802c03a: 689b ldr r3, [r3, #8] - 802c03c: 61fb str r3, [r7, #28] + 802c068: 69fb ldr r3, [r7, #28] + 802c06a: 689b ldr r3, [r3, #8] + 802c06c: 61fb str r3, [r7, #28] /* Set header or buffer 1 address */ WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); - 802c03e: 69fb ldr r3, [r7, #28] - 802c040: 681b ldr r3, [r3, #0] - 802c042: 461a mov r2, r3 - 802c044: 6a3b ldr r3, [r7, #32] - 802c046: 601a str r2, [r3, #0] + 802c06e: 69fb ldr r3, [r7, #28] + 802c070: 681b ldr r3, [r3, #0] + 802c072: 461a mov r2, r3 + 802c074: 6a3b ldr r3, [r7, #32] + 802c076: 601a str r2, [r3, #0] /* Set header or buffer 1 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); - 802c048: 6a3b ldr r3, [r7, #32] - 802c04a: 689a ldr r2, [r3, #8] - 802c04c: 4b1f ldr r3, [pc, #124] ; (802c0cc ) - 802c04e: 4013 ands r3, r2 - 802c050: 69fa ldr r2, [r7, #28] - 802c052: 6852 ldr r2, [r2, #4] - 802c054: 431a orrs r2, r3 - 802c056: 6a3b ldr r3, [r7, #32] - 802c058: 609a str r2, [r3, #8] + 802c078: 6a3b ldr r3, [r7, #32] + 802c07a: 689a ldr r2, [r3, #8] + 802c07c: 4b1f ldr r3, [pc, #124] ; (802c0fc ) + 802c07e: 4013 ands r3, r2 + 802c080: 69fa ldr r2, [r7, #28] + 802c082: 6852 ldr r2, [r2, #4] + 802c084: 431a orrs r2, r3 + 802c086: 6a3b ldr r3, [r7, #32] + 802c088: 609a str r2, [r3, #8] if (txbuffer->next != NULL) - 802c05a: 69fb ldr r3, [r7, #28] - 802c05c: 689b ldr r3, [r3, #8] - 802c05e: 2b00 cmp r3, #0 - 802c060: d012 beq.n 802c088 + 802c08a: 69fb ldr r3, [r7, #28] + 802c08c: 689b ldr r3, [r3, #8] + 802c08e: 2b00 cmp r3, #0 + 802c090: d012 beq.n 802c0b8 { /* Get the next Tx buffer in the list */ txbuffer = txbuffer->next; - 802c062: 69fb ldr r3, [r7, #28] - 802c064: 689b ldr r3, [r3, #8] - 802c066: 61fb str r3, [r7, #28] + 802c092: 69fb ldr r3, [r7, #28] + 802c094: 689b ldr r3, [r3, #8] + 802c096: 61fb str r3, [r7, #28] /* Set buffer 2 address */ WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer); - 802c068: 69fb ldr r3, [r7, #28] - 802c06a: 681b ldr r3, [r3, #0] - 802c06c: 461a mov r2, r3 - 802c06e: 6a3b ldr r3, [r7, #32] - 802c070: 605a str r2, [r3, #4] + 802c098: 69fb ldr r3, [r7, #28] + 802c09a: 681b ldr r3, [r3, #0] + 802c09c: 461a mov r2, r3 + 802c09e: 6a3b ldr r3, [r7, #32] + 802c0a0: 605a str r2, [r3, #4] /* Set buffer 2 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); - 802c072: 6a3b ldr r3, [r7, #32] - 802c074: 689a ldr r2, [r3, #8] - 802c076: 4b16 ldr r3, [pc, #88] ; (802c0d0 ) - 802c078: 4013 ands r3, r2 - 802c07a: 69fa ldr r2, [r7, #28] - 802c07c: 6852 ldr r2, [r2, #4] - 802c07e: 0412 lsls r2, r2, #16 - 802c080: 431a orrs r2, r3 - 802c082: 6a3b ldr r3, [r7, #32] - 802c084: 609a str r2, [r3, #8] - 802c086: e008 b.n 802c09a + 802c0a2: 6a3b ldr r3, [r7, #32] + 802c0a4: 689a ldr r2, [r3, #8] + 802c0a6: 4b16 ldr r3, [pc, #88] ; (802c100 ) + 802c0a8: 4013 ands r3, r2 + 802c0aa: 69fa ldr r2, [r7, #28] + 802c0ac: 6852 ldr r2, [r2, #4] + 802c0ae: 0412 lsls r2, r2, #16 + 802c0b0: 431a orrs r2, r3 + 802c0b2: 6a3b ldr r3, [r7, #32] + 802c0b4: 609a str r2, [r3, #8] + 802c0b6: e008 b.n 802c0ca } else { WRITE_REG(dmatxdesc->DESC1, 0x0); - 802c088: 6a3b ldr r3, [r7, #32] - 802c08a: 2200 movs r2, #0 - 802c08c: 605a str r2, [r3, #4] + 802c0b8: 6a3b ldr r3, [r7, #32] + 802c0ba: 2200 movs r2, #0 + 802c0bc: 605a str r2, [r3, #4] /* Set buffer 2 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); - 802c08e: 6a3b ldr r3, [r7, #32] - 802c090: 689a ldr r2, [r3, #8] - 802c092: 4b0f ldr r3, [pc, #60] ; (802c0d0 ) - 802c094: 4013 ands r3, r2 - 802c096: 6a3a ldr r2, [r7, #32] - 802c098: 6093 str r3, [r2, #8] + 802c0be: 6a3b ldr r3, [r7, #32] + 802c0c0: 689a ldr r2, [r3, #8] + 802c0c2: 4b0f ldr r3, [pc, #60] ; (802c100 ) + 802c0c4: 4013 ands r3, r2 + 802c0c6: 6a3a ldr r2, [r7, #32] + 802c0c8: 6093 str r3, [r2, #8] } if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET) - 802c09a: 68bb ldr r3, [r7, #8] - 802c09c: 681b ldr r3, [r3, #0] - 802c09e: f003 0310 and.w r3, r3, #16 - 802c0a2: 2b00 cmp r3, #0 - 802c0a4: d018 beq.n 802c0d8 + 802c0ca: 68bb ldr r3, [r7, #8] + 802c0cc: 681b ldr r3, [r3, #0] + 802c0ce: f003 0310 and.w r3, r3, #16 + 802c0d2: 2b00 cmp r3, #0 + 802c0d4: d018 beq.n 802c108 { /* Set TCP payload length */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); - 802c0a6: 6a3b ldr r3, [r7, #32] - 802c0a8: 68da ldr r2, [r3, #12] - 802c0aa: 4b0a ldr r3, [pc, #40] ; (802c0d4 ) - 802c0ac: 4013 ands r3, r2 - 802c0ae: 68ba ldr r2, [r7, #8] - 802c0b0: 69d2 ldr r2, [r2, #28] - 802c0b2: 431a orrs r2, r3 - 802c0b4: 6a3b ldr r3, [r7, #32] - 802c0b6: 60da str r2, [r3, #12] + 802c0d6: 6a3b ldr r3, [r7, #32] + 802c0d8: 68da ldr r2, [r3, #12] + 802c0da: 4b0a ldr r3, [pc, #40] ; (802c104 ) + 802c0dc: 4013 ands r3, r2 + 802c0de: 68ba ldr r2, [r7, #8] + 802c0e0: 69d2 ldr r2, [r2, #28] + 802c0e2: 431a orrs r2, r3 + 802c0e4: 6a3b ldr r3, [r7, #32] + 802c0e6: 60da str r2, [r3, #12] /* Set TCP Segmentation Enabled bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); - 802c0b8: 6a3b ldr r3, [r7, #32] - 802c0ba: 68db ldr r3, [r3, #12] - 802c0bc: f443 2280 orr.w r2, r3, #262144 ; 0x40000 - 802c0c0: 6a3b ldr r3, [r7, #32] - 802c0c2: 60da str r2, [r3, #12] - 802c0c4: e020 b.n 802c108 - 802c0c6: bf00 nop - 802c0c8: ffff8000 .word 0xffff8000 - 802c0cc: ffffc000 .word 0xffffc000 - 802c0d0: c000ffff .word 0xc000ffff - 802c0d4: fffc0000 .word 0xfffc0000 + 802c0e8: 6a3b ldr r3, [r7, #32] + 802c0ea: 68db ldr r3, [r3, #12] + 802c0ec: f443 2280 orr.w r2, r3, #262144 ; 0x40000 + 802c0f0: 6a3b ldr r3, [r7, #32] + 802c0f2: 60da str r2, [r3, #12] + 802c0f4: e020 b.n 802c138 + 802c0f6: bf00 nop + 802c0f8: ffff8000 .word 0xffff8000 + 802c0fc: ffffc000 .word 0xffffc000 + 802c100: c000ffff .word 0xc000ffff + 802c104: fffc0000 .word 0xfffc0000 } else { /* Set the packet length */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); - 802c0d8: 6a3b ldr r3, [r7, #32] - 802c0da: 68da ldr r2, [r3, #12] - 802c0dc: 4b2f ldr r3, [pc, #188] ; (802c19c ) - 802c0de: 4013 ands r3, r2 - 802c0e0: 68ba ldr r2, [r7, #8] - 802c0e2: 6852 ldr r2, [r2, #4] - 802c0e4: 431a orrs r2, r3 - 802c0e6: 6a3b ldr r3, [r7, #32] - 802c0e8: 60da str r2, [r3, #12] + 802c108: 6a3b ldr r3, [r7, #32] + 802c10a: 68da ldr r2, [r3, #12] + 802c10c: 4b2f ldr r3, [pc, #188] ; (802c1cc ) + 802c10e: 4013 ands r3, r2 + 802c110: 68ba ldr r2, [r7, #8] + 802c112: 6852 ldr r2, [r2, #4] + 802c114: 431a orrs r2, r3 + 802c116: 6a3b ldr r3, [r7, #32] + 802c118: 60da str r2, [r3, #12] if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET) - 802c0ea: 68bb ldr r3, [r7, #8] - 802c0ec: 681b ldr r3, [r3, #0] - 802c0ee: f003 0301 and.w r3, r3, #1 - 802c0f2: 2b00 cmp r3, #0 - 802c0f4: d008 beq.n 802c108 + 802c11a: 68bb ldr r3, [r7, #8] + 802c11c: 681b ldr r3, [r3, #0] + 802c11e: f003 0301 and.w r3, r3, #1 + 802c122: 2b00 cmp r3, #0 + 802c124: d008 beq.n 802c138 { /* Checksum Insertion Control */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); - 802c0f6: 6a3b ldr r3, [r7, #32] - 802c0f8: 68db ldr r3, [r3, #12] - 802c0fa: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 802c0fe: 68bb ldr r3, [r7, #8] - 802c100: 695b ldr r3, [r3, #20] - 802c102: 431a orrs r2, r3 - 802c104: 6a3b ldr r3, [r7, #32] - 802c106: 60da str r2, [r3, #12] + 802c126: 6a3b ldr r3, [r7, #32] + 802c128: 68db ldr r3, [r3, #12] + 802c12a: f423 3240 bic.w r2, r3, #196608 ; 0x30000 + 802c12e: 68bb ldr r3, [r7, #8] + 802c130: 695b ldr r3, [r3, #20] + 802c132: 431a orrs r2, r3 + 802c134: 6a3b ldr r3, [r7, #32] + 802c136: 60da str r2, [r3, #12] } } bd_count += 1U; - 802c108: 69bb ldr r3, [r7, #24] - 802c10a: 3301 adds r3, #1 - 802c10c: 61bb str r3, [r7, #24] + 802c138: 69bb ldr r3, [r7, #24] + 802c13a: 3301 adds r3, #1 + 802c13c: 61bb str r3, [r7, #24] __ASM volatile ("dmb 0xF":::"memory"); - 802c10e: f3bf 8f5f dmb sy + 802c13e: f3bf 8f5f dmb sy } - 802c112: bf00 nop + 802c142: bf00 nop /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); /* Set Own bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); - 802c114: 6a3b ldr r3, [r7, #32] - 802c116: 68db ldr r3, [r3, #12] - 802c118: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 - 802c11c: 6a3b ldr r3, [r7, #32] - 802c11e: 60da str r2, [r3, #12] + 802c144: 6a3b ldr r3, [r7, #32] + 802c146: 68db ldr r3, [r3, #12] + 802c148: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 + 802c14c: 6a3b ldr r3, [r7, #32] + 802c14e: 60da str r2, [r3, #12] /* Mark it as NORMAL descriptor */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); - 802c120: 6a3b ldr r3, [r7, #32] - 802c122: 68db ldr r3, [r3, #12] - 802c124: f023 4280 bic.w r2, r3, #1073741824 ; 0x40000000 - 802c128: 6a3b ldr r3, [r7, #32] - 802c12a: 60da str r2, [r3, #12] + 802c150: 6a3b ldr r3, [r7, #32] + 802c152: 68db ldr r3, [r3, #12] + 802c154: f023 4280 bic.w r2, r3, #1073741824 ; 0x40000000 + 802c158: 6a3b ldr r3, [r7, #32] + 802c15a: 60da str r2, [r3, #12] while (txbuffer->next != NULL) - 802c12c: 69fb ldr r3, [r7, #28] - 802c12e: 689b ldr r3, [r3, #8] - 802c130: 2b00 cmp r3, #0 - 802c132: f47f af2b bne.w 802bf8c + 802c15c: 69fb ldr r3, [r7, #28] + 802c15e: 689b ldr r3, [r3, #8] + 802c160: 2b00 cmp r3, #0 + 802c162: f47f af2b bne.w 802bfbc } if (ItMode != ((uint32_t)RESET)) - 802c136: 687b ldr r3, [r7, #4] - 802c138: 2b00 cmp r3, #0 - 802c13a: d006 beq.n 802c14a + 802c166: 687b ldr r3, [r7, #4] + 802c168: 2b00 cmp r3, #0 + 802c16a: d006 beq.n 802c17a { /* Set Interrupt on completion bit */ SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); - 802c13c: 6a3b ldr r3, [r7, #32] - 802c13e: 689b ldr r3, [r3, #8] - 802c140: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 - 802c144: 6a3b ldr r3, [r7, #32] - 802c146: 609a str r2, [r3, #8] - 802c148: e005 b.n 802c156 + 802c16c: 6a3b ldr r3, [r7, #32] + 802c16e: 689b ldr r3, [r3, #8] + 802c170: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 + 802c174: 6a3b ldr r3, [r7, #32] + 802c176: 609a str r2, [r3, #8] + 802c178: e005 b.n 802c186 } else { /* Clear Interrupt on completion bit */ CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); - 802c14a: 6a3b ldr r3, [r7, #32] - 802c14c: 689b ldr r3, [r3, #8] - 802c14e: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 802c152: 6a3b ldr r3, [r7, #32] - 802c154: 609a str r2, [r3, #8] + 802c17a: 6a3b ldr r3, [r7, #32] + 802c17c: 689b ldr r3, [r3, #8] + 802c17e: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 802c182: 6a3b ldr r3, [r7, #32] + 802c184: 609a str r2, [r3, #8] } /* Mark it as LAST descriptor */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); - 802c156: 6a3b ldr r3, [r7, #32] - 802c158: 68db ldr r3, [r3, #12] - 802c15a: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000 - 802c15e: 6a3b ldr r3, [r7, #32] - 802c160: 60da str r2, [r3, #12] + 802c186: 6a3b ldr r3, [r7, #32] + 802c188: 68db ldr r3, [r3, #12] + 802c18a: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000 + 802c18e: 6a3b ldr r3, [r7, #32] + 802c190: 60da str r2, [r3, #12] /* Save the current packet address to expose it to the application */ dmatxdesclist->PacketAddress[descidx] = dmatxdesclist->CurrentPacketAddress; - 802c162: 697b ldr r3, [r7, #20] - 802c164: 6a5a ldr r2, [r3, #36] ; 0x24 - 802c166: 6979 ldr r1, [r7, #20] - 802c168: 6afb ldr r3, [r7, #44] ; 0x2c - 802c16a: 3304 adds r3, #4 - 802c16c: 009b lsls r3, r3, #2 - 802c16e: 440b add r3, r1 - 802c170: 605a str r2, [r3, #4] + 802c192: 697b ldr r3, [r7, #20] + 802c194: 6a5a ldr r2, [r3, #36] ; 0x24 + 802c196: 6979 ldr r1, [r7, #20] + 802c198: 6afb ldr r3, [r7, #44] ; 0x2c + 802c19a: 3304 adds r3, #4 + 802c19c: 009b lsls r3, r3, #2 + 802c19e: 440b add r3, r1 + 802c1a0: 605a str r2, [r3, #4] dmatxdesclist->CurTxDesc = descidx; - 802c172: 697b ldr r3, [r7, #20] - 802c174: 6afa ldr r2, [r7, #44] ; 0x2c - 802c176: 611a str r2, [r3, #16] + 802c1a2: 697b ldr r3, [r7, #20] + 802c1a4: 6afa ldr r2, [r7, #44] ; 0x2c + 802c1a6: 611a str r2, [r3, #16] __ASM volatile ("cpsid i" : : : "memory"); - 802c178: b672 cpsid i + 802c1a8: b672 cpsid i } - 802c17a: bf00 nop + 802c1aa: bf00 nop /* disable the interrupt */ __disable_irq(); dmatxdesclist->BuffersInUse += bd_count + 1U; - 802c17c: 697b ldr r3, [r7, #20] - 802c17e: 6a9a ldr r2, [r3, #40] ; 0x28 - 802c180: 69bb ldr r3, [r7, #24] - 802c182: 4413 add r3, r2 - 802c184: 1c5a adds r2, r3, #1 - 802c186: 697b ldr r3, [r7, #20] - 802c188: 629a str r2, [r3, #40] ; 0x28 + 802c1ac: 697b ldr r3, [r7, #20] + 802c1ae: 6a9a ldr r2, [r3, #40] ; 0x28 + 802c1b0: 69bb ldr r3, [r7, #24] + 802c1b2: 4413 add r3, r2 + 802c1b4: 1c5a adds r2, r3, #1 + 802c1b6: 697b ldr r3, [r7, #20] + 802c1b8: 629a str r2, [r3, #40] ; 0x28 __ASM volatile ("cpsie i" : : : "memory"); - 802c18a: b662 cpsie i + 802c1ba: b662 cpsie i } - 802c18c: bf00 nop + 802c1bc: bf00 nop /* Enable interrupts back */ __enable_irq(); /* Return function status */ return HAL_ETH_ERROR_NONE; - 802c18e: 2300 movs r3, #0 + 802c1be: 2300 movs r3, #0 } - 802c190: 4618 mov r0, r3 - 802c192: 3734 adds r7, #52 ; 0x34 - 802c194: 46bd mov sp, r7 - 802c196: f85d 7b04 ldr.w r7, [sp], #4 - 802c19a: 4770 bx lr - 802c19c: ffff8000 .word 0xffff8000 + 802c1c0: 4618 mov r0, r3 + 802c1c2: 3734 adds r7, #52 ; 0x34 + 802c1c4: 46bd mov sp, r7 + 802c1c6: f85d 7b04 ldr.w r7, [sp], #4 + 802c1ca: 4770 bx lr + 802c1cc: ffff8000 .word 0xffff8000 -0802c1a0 : +0802c1d0 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_Init(FDCAN_HandleTypeDef *hfdcan) { - 802c1a0: b580 push {r7, lr} - 802c1a2: b098 sub sp, #96 ; 0x60 - 802c1a4: af00 add r7, sp, #0 - 802c1a6: 6078 str r0, [r7, #4] + 802c1d0: b580 push {r7, lr} + 802c1d2: b098 sub sp, #96 ; 0x60 + 802c1d4: af00 add r7, sp, #0 + 802c1d6: 6078 str r0, [r7, #4] uint32_t tickstart; HAL_StatusTypeDef status; const uint32_t CvtEltSize[] = {0, 0, 0, 0, 0, 1, 2, 3, 4, 0, 5, 0, 0, 0, 6, 0, 0, 0, 7}; - 802c1a8: 4a84 ldr r2, [pc, #528] ; (802c3bc ) - 802c1aa: f107 030c add.w r3, r7, #12 - 802c1ae: 4611 mov r1, r2 - 802c1b0: 224c movs r2, #76 ; 0x4c - 802c1b2: 4618 mov r0, r3 - 802c1b4: f014 fb84 bl 80408c0 + 802c1d8: 4a84 ldr r2, [pc, #528] ; (802c3ec ) + 802c1da: f107 030c add.w r3, r7, #12 + 802c1de: 4611 mov r1, r2 + 802c1e0: 224c movs r2, #76 ; 0x4c + 802c1e2: 4618 mov r0, r3 + 802c1e4: f014 fb84 bl 80408f0 /* Check FDCAN handle */ if (hfdcan == NULL) - 802c1b8: 687b ldr r3, [r7, #4] - 802c1ba: 2b00 cmp r3, #0 - 802c1bc: d101 bne.n 802c1c2 + 802c1e8: 687b ldr r3, [r7, #4] + 802c1ea: 2b00 cmp r3, #0 + 802c1ec: d101 bne.n 802c1f2 { return HAL_ERROR; - 802c1be: 2301 movs r3, #1 - 802c1c0: e1c6 b.n 802c550 + 802c1ee: 2301 movs r3, #1 + 802c1f0: e1c6 b.n 802c580 } /* Check FDCAN instance */ if (hfdcan->Instance == FDCAN1) - 802c1c2: 687b ldr r3, [r7, #4] - 802c1c4: 681b ldr r3, [r3, #0] - 802c1c6: 4a7e ldr r2, [pc, #504] ; (802c3c0 ) - 802c1c8: 4293 cmp r3, r2 - 802c1ca: d106 bne.n 802c1da + 802c1f2: 687b ldr r3, [r7, #4] + 802c1f4: 681b ldr r3, [r3, #0] + 802c1f6: 4a7e ldr r2, [pc, #504] ; (802c3f0 ) + 802c1f8: 4293 cmp r3, r2 + 802c1fa: d106 bne.n 802c20a { hfdcan->ttcan = (TTCAN_TypeDef *)((uint32_t)hfdcan->Instance + 0x100U); - 802c1cc: 687b ldr r3, [r7, #4] - 802c1ce: 681b ldr r3, [r3, #0] - 802c1d0: f503 7380 add.w r3, r3, #256 ; 0x100 - 802c1d4: 461a mov r2, r3 - 802c1d6: 687b ldr r3, [r7, #4] - 802c1d8: 605a str r2, [r3, #4] + 802c1fc: 687b ldr r3, [r7, #4] + 802c1fe: 681b ldr r3, [r3, #0] + 802c200: f503 7380 add.w r3, r3, #256 ; 0x100 + 802c204: 461a mov r2, r3 + 802c206: 687b ldr r3, [r7, #4] + 802c208: 605a str r2, [r3, #4] /* Init the low level hardware: CLOCK, NVIC */ hfdcan->MspInitCallback(hfdcan); } #else if (hfdcan->State == HAL_FDCAN_STATE_RESET) - 802c1da: 687b ldr r3, [r7, #4] - 802c1dc: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c1e0: b2db uxtb r3, r3 - 802c1e2: 2b00 cmp r3, #0 - 802c1e4: d106 bne.n 802c1f4 + 802c20a: 687b ldr r3, [r7, #4] + 802c20c: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802c210: b2db uxtb r3, r3 + 802c212: 2b00 cmp r3, #0 + 802c214: d106 bne.n 802c224 { /* Allocate lock resource and initialize it */ hfdcan->Lock = HAL_UNLOCKED; - 802c1e6: 687b ldr r3, [r7, #4] - 802c1e8: 2200 movs r2, #0 - 802c1ea: f883 2099 strb.w r2, [r3, #153] ; 0x99 + 802c216: 687b ldr r3, [r7, #4] + 802c218: 2200 movs r2, #0 + 802c21a: f883 2099 strb.w r2, [r3, #153] ; 0x99 /* Init the low level hardware: CLOCK, NVIC */ HAL_FDCAN_MspInit(hfdcan); - 802c1ee: 6878 ldr r0, [r7, #4] - 802c1f0: f7f7 faba bl 8023768 + 802c21e: 6878 ldr r0, [r7, #4] + 802c220: f7f7 faa2 bl 8023768 } #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ /* Exit from Sleep mode */ CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR); - 802c1f4: 687b ldr r3, [r7, #4] - 802c1f6: 681b ldr r3, [r3, #0] - 802c1f8: 699a ldr r2, [r3, #24] - 802c1fa: 687b ldr r3, [r7, #4] - 802c1fc: 681b ldr r3, [r3, #0] - 802c1fe: f022 0210 bic.w r2, r2, #16 - 802c202: 619a str r2, [r3, #24] + 802c224: 687b ldr r3, [r7, #4] + 802c226: 681b ldr r3, [r3, #0] + 802c228: 699a ldr r2, [r3, #24] + 802c22a: 687b ldr r3, [r7, #4] + 802c22c: 681b ldr r3, [r3, #0] + 802c22e: f022 0210 bic.w r2, r2, #16 + 802c232: 619a str r2, [r3, #24] /* Get tick */ tickstart = HAL_GetTick(); - 802c204: f7f9 fec6 bl 8025f94 - 802c208: 65f8 str r0, [r7, #92] ; 0x5c + 802c234: f7f9 fec6 bl 8025fc4 + 802c238: 65f8 str r0, [r7, #92] ; 0x5c /* Check Sleep mode acknowledge */ while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA) - 802c20a: e014 b.n 802c236 + 802c23a: e014 b.n 802c266 { if ((HAL_GetTick() - tickstart) > FDCAN_TIMEOUT_VALUE) - 802c20c: f7f9 fec2 bl 8025f94 - 802c210: 4602 mov r2, r0 - 802c212: 6dfb ldr r3, [r7, #92] ; 0x5c - 802c214: 1ad3 subs r3, r2, r3 - 802c216: 2b0a cmp r3, #10 - 802c218: d90d bls.n 802c236 + 802c23c: f7f9 fec2 bl 8025fc4 + 802c240: 4602 mov r2, r0 + 802c242: 6dfb ldr r3, [r7, #92] ; 0x5c + 802c244: 1ad3 subs r3, r2, r3 + 802c246: 2b0a cmp r3, #10 + 802c248: d90d bls.n 802c266 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_TIMEOUT; - 802c21a: 687b ldr r3, [r7, #4] - 802c21c: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c220: f043 0201 orr.w r2, r3, #1 - 802c224: 687b ldr r3, [r7, #4] - 802c226: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c24a: 687b ldr r3, [r7, #4] + 802c24c: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c250: f043 0201 orr.w r2, r3, #1 + 802c254: 687b ldr r3, [r7, #4] + 802c256: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Change FDCAN state */ hfdcan->State = HAL_FDCAN_STATE_ERROR; - 802c22a: 687b ldr r3, [r7, #4] - 802c22c: 2203 movs r2, #3 - 802c22e: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802c25a: 687b ldr r3, [r7, #4] + 802c25c: 2203 movs r2, #3 + 802c25e: f883 2098 strb.w r2, [r3, #152] ; 0x98 return HAL_ERROR; - 802c232: 2301 movs r3, #1 - 802c234: e18c b.n 802c550 + 802c262: 2301 movs r3, #1 + 802c264: e18c b.n 802c580 while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA) - 802c236: 687b ldr r3, [r7, #4] - 802c238: 681b ldr r3, [r3, #0] - 802c23a: 699b ldr r3, [r3, #24] - 802c23c: f003 0308 and.w r3, r3, #8 - 802c240: 2b08 cmp r3, #8 - 802c242: d0e3 beq.n 802c20c + 802c266: 687b ldr r3, [r7, #4] + 802c268: 681b ldr r3, [r3, #0] + 802c26a: 699b ldr r3, [r3, #24] + 802c26c: f003 0308 and.w r3, r3, #8 + 802c270: 2b08 cmp r3, #8 + 802c272: d0e3 beq.n 802c23c } } /* Request initialisation */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT); - 802c244: 687b ldr r3, [r7, #4] - 802c246: 681b ldr r3, [r3, #0] - 802c248: 699a ldr r2, [r3, #24] - 802c24a: 687b ldr r3, [r7, #4] - 802c24c: 681b ldr r3, [r3, #0] - 802c24e: f042 0201 orr.w r2, r2, #1 - 802c252: 619a str r2, [r3, #24] + 802c274: 687b ldr r3, [r7, #4] + 802c276: 681b ldr r3, [r3, #0] + 802c278: 699a ldr r2, [r3, #24] + 802c27a: 687b ldr r3, [r7, #4] + 802c27c: 681b ldr r3, [r3, #0] + 802c27e: f042 0201 orr.w r2, r2, #1 + 802c282: 619a str r2, [r3, #24] /* Get tick */ tickstart = HAL_GetTick(); - 802c254: f7f9 fe9e bl 8025f94 - 802c258: 65f8 str r0, [r7, #92] ; 0x5c + 802c284: f7f9 fe9e bl 8025fc4 + 802c288: 65f8 str r0, [r7, #92] ; 0x5c /* Wait until the INIT bit into CCCR register is set */ while ((hfdcan->Instance->CCCR & FDCAN_CCCR_INIT) == 0U) - 802c25a: e014 b.n 802c286 + 802c28a: e014 b.n 802c2b6 { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > FDCAN_TIMEOUT_VALUE) - 802c25c: f7f9 fe9a bl 8025f94 - 802c260: 4602 mov r2, r0 - 802c262: 6dfb ldr r3, [r7, #92] ; 0x5c - 802c264: 1ad3 subs r3, r2, r3 - 802c266: 2b0a cmp r3, #10 - 802c268: d90d bls.n 802c286 + 802c28c: f7f9 fe9a bl 8025fc4 + 802c290: 4602 mov r2, r0 + 802c292: 6dfb ldr r3, [r7, #92] ; 0x5c + 802c294: 1ad3 subs r3, r2, r3 + 802c296: 2b0a cmp r3, #10 + 802c298: d90d bls.n 802c2b6 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_TIMEOUT; - 802c26a: 687b ldr r3, [r7, #4] - 802c26c: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c270: f043 0201 orr.w r2, r3, #1 - 802c274: 687b ldr r3, [r7, #4] - 802c276: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c29a: 687b ldr r3, [r7, #4] + 802c29c: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c2a0: f043 0201 orr.w r2, r3, #1 + 802c2a4: 687b ldr r3, [r7, #4] + 802c2a6: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Change FDCAN state */ hfdcan->State = HAL_FDCAN_STATE_ERROR; - 802c27a: 687b ldr r3, [r7, #4] - 802c27c: 2203 movs r2, #3 - 802c27e: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802c2aa: 687b ldr r3, [r7, #4] + 802c2ac: 2203 movs r2, #3 + 802c2ae: f883 2098 strb.w r2, [r3, #152] ; 0x98 return HAL_ERROR; - 802c282: 2301 movs r3, #1 - 802c284: e164 b.n 802c550 + 802c2b2: 2301 movs r3, #1 + 802c2b4: e164 b.n 802c580 while ((hfdcan->Instance->CCCR & FDCAN_CCCR_INIT) == 0U) - 802c286: 687b ldr r3, [r7, #4] - 802c288: 681b ldr r3, [r3, #0] - 802c28a: 699b ldr r3, [r3, #24] - 802c28c: f003 0301 and.w r3, r3, #1 - 802c290: 2b00 cmp r3, #0 - 802c292: d0e3 beq.n 802c25c + 802c2b6: 687b ldr r3, [r7, #4] + 802c2b8: 681b ldr r3, [r3, #0] + 802c2ba: 699b ldr r3, [r3, #24] + 802c2bc: f003 0301 and.w r3, r3, #1 + 802c2c0: 2b00 cmp r3, #0 + 802c2c2: d0e3 beq.n 802c28c } } /* Enable configuration change */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CCE); - 802c294: 687b ldr r3, [r7, #4] - 802c296: 681b ldr r3, [r3, #0] - 802c298: 699a ldr r2, [r3, #24] - 802c29a: 687b ldr r3, [r7, #4] - 802c29c: 681b ldr r3, [r3, #0] - 802c29e: f042 0202 orr.w r2, r2, #2 - 802c2a2: 619a str r2, [r3, #24] + 802c2c4: 687b ldr r3, [r7, #4] + 802c2c6: 681b ldr r3, [r3, #0] + 802c2c8: 699a ldr r2, [r3, #24] + 802c2ca: 687b ldr r3, [r7, #4] + 802c2cc: 681b ldr r3, [r3, #0] + 802c2ce: f042 0202 orr.w r2, r2, #2 + 802c2d2: 619a str r2, [r3, #24] /* Set the no automatic retransmission */ if (hfdcan->Init.AutoRetransmission == ENABLE) - 802c2a4: 687b ldr r3, [r7, #4] - 802c2a6: 7c1b ldrb r3, [r3, #16] - 802c2a8: 2b01 cmp r3, #1 - 802c2aa: d108 bne.n 802c2be + 802c2d4: 687b ldr r3, [r7, #4] + 802c2d6: 7c1b ldrb r3, [r3, #16] + 802c2d8: 2b01 cmp r3, #1 + 802c2da: d108 bne.n 802c2ee { CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_DAR); - 802c2ac: 687b ldr r3, [r7, #4] - 802c2ae: 681b ldr r3, [r3, #0] - 802c2b0: 699a ldr r2, [r3, #24] - 802c2b2: 687b ldr r3, [r7, #4] - 802c2b4: 681b ldr r3, [r3, #0] - 802c2b6: f022 0240 bic.w r2, r2, #64 ; 0x40 - 802c2ba: 619a str r2, [r3, #24] - 802c2bc: e007 b.n 802c2ce + 802c2dc: 687b ldr r3, [r7, #4] + 802c2de: 681b ldr r3, [r3, #0] + 802c2e0: 699a ldr r2, [r3, #24] + 802c2e2: 687b ldr r3, [r7, #4] + 802c2e4: 681b ldr r3, [r3, #0] + 802c2e6: f022 0240 bic.w r2, r2, #64 ; 0x40 + 802c2ea: 619a str r2, [r3, #24] + 802c2ec: e007 b.n 802c2fe } else { SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_DAR); - 802c2be: 687b ldr r3, [r7, #4] - 802c2c0: 681b ldr r3, [r3, #0] - 802c2c2: 699a ldr r2, [r3, #24] - 802c2c4: 687b ldr r3, [r7, #4] - 802c2c6: 681b ldr r3, [r3, #0] - 802c2c8: f042 0240 orr.w r2, r2, #64 ; 0x40 - 802c2cc: 619a str r2, [r3, #24] + 802c2ee: 687b ldr r3, [r7, #4] + 802c2f0: 681b ldr r3, [r3, #0] + 802c2f2: 699a ldr r2, [r3, #24] + 802c2f4: 687b ldr r3, [r7, #4] + 802c2f6: 681b ldr r3, [r3, #0] + 802c2f8: f042 0240 orr.w r2, r2, #64 ; 0x40 + 802c2fc: 619a str r2, [r3, #24] } /* Set the transmit pause feature */ if (hfdcan->Init.TransmitPause == ENABLE) - 802c2ce: 687b ldr r3, [r7, #4] - 802c2d0: 7c5b ldrb r3, [r3, #17] - 802c2d2: 2b01 cmp r3, #1 - 802c2d4: d108 bne.n 802c2e8 + 802c2fe: 687b ldr r3, [r7, #4] + 802c300: 7c5b ldrb r3, [r3, #17] + 802c302: 2b01 cmp r3, #1 + 802c304: d108 bne.n 802c318 { SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TXP); - 802c2d6: 687b ldr r3, [r7, #4] - 802c2d8: 681b ldr r3, [r3, #0] - 802c2da: 699a ldr r2, [r3, #24] - 802c2dc: 687b ldr r3, [r7, #4] - 802c2de: 681b ldr r3, [r3, #0] - 802c2e0: f442 4280 orr.w r2, r2, #16384 ; 0x4000 - 802c2e4: 619a str r2, [r3, #24] - 802c2e6: e007 b.n 802c2f8 + 802c306: 687b ldr r3, [r7, #4] + 802c308: 681b ldr r3, [r3, #0] + 802c30a: 699a ldr r2, [r3, #24] + 802c30c: 687b ldr r3, [r7, #4] + 802c30e: 681b ldr r3, [r3, #0] + 802c310: f442 4280 orr.w r2, r2, #16384 ; 0x4000 + 802c314: 619a str r2, [r3, #24] + 802c316: e007 b.n 802c328 } else { CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TXP); - 802c2e8: 687b ldr r3, [r7, #4] - 802c2ea: 681b ldr r3, [r3, #0] - 802c2ec: 699a ldr r2, [r3, #24] - 802c2ee: 687b ldr r3, [r7, #4] - 802c2f0: 681b ldr r3, [r3, #0] - 802c2f2: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 802c2f6: 619a str r2, [r3, #24] + 802c318: 687b ldr r3, [r7, #4] + 802c31a: 681b ldr r3, [r3, #0] + 802c31c: 699a ldr r2, [r3, #24] + 802c31e: 687b ldr r3, [r7, #4] + 802c320: 681b ldr r3, [r3, #0] + 802c322: f422 4280 bic.w r2, r2, #16384 ; 0x4000 + 802c326: 619a str r2, [r3, #24] } /* Set the Protocol Exception Handling */ if (hfdcan->Init.ProtocolException == ENABLE) - 802c2f8: 687b ldr r3, [r7, #4] - 802c2fa: 7c9b ldrb r3, [r3, #18] - 802c2fc: 2b01 cmp r3, #1 - 802c2fe: d108 bne.n 802c312 + 802c328: 687b ldr r3, [r7, #4] + 802c32a: 7c9b ldrb r3, [r3, #18] + 802c32c: 2b01 cmp r3, #1 + 802c32e: d108 bne.n 802c342 { CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_PXHD); - 802c300: 687b ldr r3, [r7, #4] - 802c302: 681b ldr r3, [r3, #0] - 802c304: 699a ldr r2, [r3, #24] - 802c306: 687b ldr r3, [r7, #4] - 802c308: 681b ldr r3, [r3, #0] - 802c30a: f422 5280 bic.w r2, r2, #4096 ; 0x1000 - 802c30e: 619a str r2, [r3, #24] - 802c310: e007 b.n 802c322 + 802c330: 687b ldr r3, [r7, #4] + 802c332: 681b ldr r3, [r3, #0] + 802c334: 699a ldr r2, [r3, #24] + 802c336: 687b ldr r3, [r7, #4] + 802c338: 681b ldr r3, [r3, #0] + 802c33a: f422 5280 bic.w r2, r2, #4096 ; 0x1000 + 802c33e: 619a str r2, [r3, #24] + 802c340: e007 b.n 802c352 } else { SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_PXHD); - 802c312: 687b ldr r3, [r7, #4] - 802c314: 681b ldr r3, [r3, #0] - 802c316: 699a ldr r2, [r3, #24] - 802c318: 687b ldr r3, [r7, #4] - 802c31a: 681b ldr r3, [r3, #0] - 802c31c: f442 5280 orr.w r2, r2, #4096 ; 0x1000 - 802c320: 619a str r2, [r3, #24] + 802c342: 687b ldr r3, [r7, #4] + 802c344: 681b ldr r3, [r3, #0] + 802c346: 699a ldr r2, [r3, #24] + 802c348: 687b ldr r3, [r7, #4] + 802c34a: 681b ldr r3, [r3, #0] + 802c34c: f442 5280 orr.w r2, r2, #4096 ; 0x1000 + 802c350: 619a str r2, [r3, #24] } /* Set FDCAN Frame Format */ MODIFY_REG(hfdcan->Instance->CCCR, FDCAN_FRAME_FD_BRS, hfdcan->Init.FrameFormat); - 802c322: 687b ldr r3, [r7, #4] - 802c324: 681b ldr r3, [r3, #0] - 802c326: 699b ldr r3, [r3, #24] - 802c328: f423 7140 bic.w r1, r3, #768 ; 0x300 - 802c32c: 687b ldr r3, [r7, #4] - 802c32e: 689a ldr r2, [r3, #8] - 802c330: 687b ldr r3, [r7, #4] - 802c332: 681b ldr r3, [r3, #0] - 802c334: 430a orrs r2, r1 - 802c336: 619a str r2, [r3, #24] + 802c352: 687b ldr r3, [r7, #4] + 802c354: 681b ldr r3, [r3, #0] + 802c356: 699b ldr r3, [r3, #24] + 802c358: f423 7140 bic.w r1, r3, #768 ; 0x300 + 802c35c: 687b ldr r3, [r7, #4] + 802c35e: 689a ldr r2, [r3, #8] + 802c360: 687b ldr r3, [r7, #4] + 802c362: 681b ldr r3, [r3, #0] + 802c364: 430a orrs r2, r1 + 802c366: 619a str r2, [r3, #24] /* Reset FDCAN Operation Mode */ CLEAR_BIT(hfdcan->Instance->CCCR, (FDCAN_CCCR_TEST | FDCAN_CCCR_MON | FDCAN_CCCR_ASM)); - 802c338: 687b ldr r3, [r7, #4] - 802c33a: 681b ldr r3, [r3, #0] - 802c33c: 699a ldr r2, [r3, #24] - 802c33e: 687b ldr r3, [r7, #4] - 802c340: 681b ldr r3, [r3, #0] - 802c342: f022 02a4 bic.w r2, r2, #164 ; 0xa4 - 802c346: 619a str r2, [r3, #24] + 802c368: 687b ldr r3, [r7, #4] + 802c36a: 681b ldr r3, [r3, #0] + 802c36c: 699a ldr r2, [r3, #24] + 802c36e: 687b ldr r3, [r7, #4] + 802c370: 681b ldr r3, [r3, #0] + 802c372: f022 02a4 bic.w r2, r2, #164 ; 0xa4 + 802c376: 619a str r2, [r3, #24] CLEAR_BIT(hfdcan->Instance->TEST, FDCAN_TEST_LBCK); - 802c348: 687b ldr r3, [r7, #4] - 802c34a: 681b ldr r3, [r3, #0] - 802c34c: 691a ldr r2, [r3, #16] - 802c34e: 687b ldr r3, [r7, #4] - 802c350: 681b ldr r3, [r3, #0] - 802c352: f022 0210 bic.w r2, r2, #16 - 802c356: 611a str r2, [r3, #16] + 802c378: 687b ldr r3, [r7, #4] + 802c37a: 681b ldr r3, [r3, #0] + 802c37c: 691a ldr r2, [r3, #16] + 802c37e: 687b ldr r3, [r7, #4] + 802c380: 681b ldr r3, [r3, #0] + 802c382: f022 0210 bic.w r2, r2, #16 + 802c386: 611a str r2, [r3, #16] CCCR.TEST | 0 | 0 | 0 | 1 | 1 CCCR.MON | 0 | 0 | 1 | 1 | 0 TEST.LBCK | 0 | 0 | 0 | 1 | 1 CCCR.ASM | 0 | 1 | 0 | 0 | 0 */ if (hfdcan->Init.Mode == FDCAN_MODE_RESTRICTED_OPERATION) - 802c358: 687b ldr r3, [r7, #4] - 802c35a: 68db ldr r3, [r3, #12] - 802c35c: 2b01 cmp r3, #1 - 802c35e: d108 bne.n 802c372 + 802c388: 687b ldr r3, [r7, #4] + 802c38a: 68db ldr r3, [r3, #12] + 802c38c: 2b01 cmp r3, #1 + 802c38e: d108 bne.n 802c3a2 { /* Enable Restricted Operation mode */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_ASM); - 802c360: 687b ldr r3, [r7, #4] - 802c362: 681b ldr r3, [r3, #0] - 802c364: 699a ldr r2, [r3, #24] - 802c366: 687b ldr r3, [r7, #4] - 802c368: 681b ldr r3, [r3, #0] - 802c36a: f042 0204 orr.w r2, r2, #4 - 802c36e: 619a str r2, [r3, #24] - 802c370: e030 b.n 802c3d4 + 802c390: 687b ldr r3, [r7, #4] + 802c392: 681b ldr r3, [r3, #0] + 802c394: 699a ldr r2, [r3, #24] + 802c396: 687b ldr r3, [r7, #4] + 802c398: 681b ldr r3, [r3, #0] + 802c39a: f042 0204 orr.w r2, r2, #4 + 802c39e: 619a str r2, [r3, #24] + 802c3a0: e030 b.n 802c404 } else if (hfdcan->Init.Mode != FDCAN_MODE_NORMAL) - 802c372: 687b ldr r3, [r7, #4] - 802c374: 68db ldr r3, [r3, #12] - 802c376: 2b00 cmp r3, #0 - 802c378: d02c beq.n 802c3d4 + 802c3a2: 687b ldr r3, [r7, #4] + 802c3a4: 68db ldr r3, [r3, #12] + 802c3a6: 2b00 cmp r3, #0 + 802c3a8: d02c beq.n 802c404 { if (hfdcan->Init.Mode != FDCAN_MODE_BUS_MONITORING) - 802c37a: 687b ldr r3, [r7, #4] - 802c37c: 68db ldr r3, [r3, #12] - 802c37e: 2b02 cmp r3, #2 - 802c380: d020 beq.n 802c3c4 + 802c3aa: 687b ldr r3, [r7, #4] + 802c3ac: 68db ldr r3, [r3, #12] + 802c3ae: 2b02 cmp r3, #2 + 802c3b0: d020 beq.n 802c3f4 { /* Enable write access to TEST register */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TEST); - 802c382: 687b ldr r3, [r7, #4] - 802c384: 681b ldr r3, [r3, #0] - 802c386: 699a ldr r2, [r3, #24] - 802c388: 687b ldr r3, [r7, #4] - 802c38a: 681b ldr r3, [r3, #0] - 802c38c: f042 0280 orr.w r2, r2, #128 ; 0x80 - 802c390: 619a str r2, [r3, #24] + 802c3b2: 687b ldr r3, [r7, #4] + 802c3b4: 681b ldr r3, [r3, #0] + 802c3b6: 699a ldr r2, [r3, #24] + 802c3b8: 687b ldr r3, [r7, #4] + 802c3ba: 681b ldr r3, [r3, #0] + 802c3bc: f042 0280 orr.w r2, r2, #128 ; 0x80 + 802c3c0: 619a str r2, [r3, #24] /* Enable LoopBack mode */ SET_BIT(hfdcan->Instance->TEST, FDCAN_TEST_LBCK); - 802c392: 687b ldr r3, [r7, #4] - 802c394: 681b ldr r3, [r3, #0] - 802c396: 691a ldr r2, [r3, #16] - 802c398: 687b ldr r3, [r7, #4] - 802c39a: 681b ldr r3, [r3, #0] - 802c39c: f042 0210 orr.w r2, r2, #16 - 802c3a0: 611a str r2, [r3, #16] + 802c3c2: 687b ldr r3, [r7, #4] + 802c3c4: 681b ldr r3, [r3, #0] + 802c3c6: 691a ldr r2, [r3, #16] + 802c3c8: 687b ldr r3, [r7, #4] + 802c3ca: 681b ldr r3, [r3, #0] + 802c3cc: f042 0210 orr.w r2, r2, #16 + 802c3d0: 611a str r2, [r3, #16] if (hfdcan->Init.Mode == FDCAN_MODE_INTERNAL_LOOPBACK) - 802c3a2: 687b ldr r3, [r7, #4] - 802c3a4: 68db ldr r3, [r3, #12] - 802c3a6: 2b03 cmp r3, #3 - 802c3a8: d114 bne.n 802c3d4 + 802c3d2: 687b ldr r3, [r7, #4] + 802c3d4: 68db ldr r3, [r3, #12] + 802c3d6: 2b03 cmp r3, #3 + 802c3d8: d114 bne.n 802c404 { SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_MON); - 802c3aa: 687b ldr r3, [r7, #4] - 802c3ac: 681b ldr r3, [r3, #0] - 802c3ae: 699a ldr r2, [r3, #24] - 802c3b0: 687b ldr r3, [r7, #4] - 802c3b2: 681b ldr r3, [r3, #0] - 802c3b4: f042 0220 orr.w r2, r2, #32 - 802c3b8: 619a str r2, [r3, #24] - 802c3ba: e00b b.n 802c3d4 - 802c3bc: 08042250 .word 0x08042250 - 802c3c0: 4000a000 .word 0x4000a000 + 802c3da: 687b ldr r3, [r7, #4] + 802c3dc: 681b ldr r3, [r3, #0] + 802c3de: 699a ldr r2, [r3, #24] + 802c3e0: 687b ldr r3, [r7, #4] + 802c3e2: 681b ldr r3, [r3, #0] + 802c3e4: f042 0220 orr.w r2, r2, #32 + 802c3e8: 619a str r2, [r3, #24] + 802c3ea: e00b b.n 802c404 + 802c3ec: 08042280 .word 0x08042280 + 802c3f0: 4000a000 .word 0x4000a000 } } else { /* Enable bus monitoring mode */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_MON); - 802c3c4: 687b ldr r3, [r7, #4] - 802c3c6: 681b ldr r3, [r3, #0] - 802c3c8: 699a ldr r2, [r3, #24] - 802c3ca: 687b ldr r3, [r7, #4] - 802c3cc: 681b ldr r3, [r3, #0] - 802c3ce: f042 0220 orr.w r2, r2, #32 - 802c3d2: 619a str r2, [r3, #24] + 802c3f4: 687b ldr r3, [r7, #4] + 802c3f6: 681b ldr r3, [r3, #0] + 802c3f8: 699a ldr r2, [r3, #24] + 802c3fa: 687b ldr r3, [r7, #4] + 802c3fc: 681b ldr r3, [r3, #0] + 802c3fe: f042 0220 orr.w r2, r2, #32 + 802c402: 619a str r2, [r3, #24] { /* Nothing to do: normal mode */ } /* Set the nominal bit timing register */ hfdcan->Instance->NBTP = ((((uint32_t)hfdcan->Init.NominalSyncJumpWidth - 1U) << FDCAN_NBTP_NSJW_Pos) | \ - 802c3d4: 687b ldr r3, [r7, #4] - 802c3d6: 699b ldr r3, [r3, #24] - 802c3d8: 3b01 subs r3, #1 - 802c3da: 065a lsls r2, r3, #25 + 802c404: 687b ldr r3, [r7, #4] + 802c406: 699b ldr r3, [r3, #24] + 802c408: 3b01 subs r3, #1 + 802c40a: 065a lsls r2, r3, #25 (((uint32_t)hfdcan->Init.NominalTimeSeg1 - 1U) << FDCAN_NBTP_NTSEG1_Pos) | \ - 802c3dc: 687b ldr r3, [r7, #4] - 802c3de: 69db ldr r3, [r3, #28] - 802c3e0: 3b01 subs r3, #1 - 802c3e2: 021b lsls r3, r3, #8 + 802c40c: 687b ldr r3, [r7, #4] + 802c40e: 69db ldr r3, [r3, #28] + 802c410: 3b01 subs r3, #1 + 802c412: 021b lsls r3, r3, #8 hfdcan->Instance->NBTP = ((((uint32_t)hfdcan->Init.NominalSyncJumpWidth - 1U) << FDCAN_NBTP_NSJW_Pos) | \ - 802c3e4: 431a orrs r2, r3 + 802c414: 431a orrs r2, r3 (((uint32_t)hfdcan->Init.NominalTimeSeg2 - 1U) << FDCAN_NBTP_NTSEG2_Pos) | \ - 802c3e6: 687b ldr r3, [r7, #4] - 802c3e8: 6a1b ldr r3, [r3, #32] - 802c3ea: 3b01 subs r3, #1 + 802c416: 687b ldr r3, [r7, #4] + 802c418: 6a1b ldr r3, [r3, #32] + 802c41a: 3b01 subs r3, #1 (((uint32_t)hfdcan->Init.NominalTimeSeg1 - 1U) << FDCAN_NBTP_NTSEG1_Pos) | \ - 802c3ec: ea42 0103 orr.w r1, r2, r3 + 802c41c: ea42 0103 orr.w r1, r2, r3 (((uint32_t)hfdcan->Init.NominalPrescaler - 1U) << FDCAN_NBTP_NBRP_Pos)); - 802c3f0: 687b ldr r3, [r7, #4] - 802c3f2: 695b ldr r3, [r3, #20] - 802c3f4: 3b01 subs r3, #1 - 802c3f6: 041a lsls r2, r3, #16 + 802c420: 687b ldr r3, [r7, #4] + 802c422: 695b ldr r3, [r3, #20] + 802c424: 3b01 subs r3, #1 + 802c426: 041a lsls r2, r3, #16 hfdcan->Instance->NBTP = ((((uint32_t)hfdcan->Init.NominalSyncJumpWidth - 1U) << FDCAN_NBTP_NSJW_Pos) | \ - 802c3f8: 687b ldr r3, [r7, #4] - 802c3fa: 681b ldr r3, [r3, #0] + 802c428: 687b ldr r3, [r7, #4] + 802c42a: 681b ldr r3, [r3, #0] (((uint32_t)hfdcan->Init.NominalTimeSeg2 - 1U) << FDCAN_NBTP_NTSEG2_Pos) | \ - 802c3fc: 430a orrs r2, r1 + 802c42c: 430a orrs r2, r1 hfdcan->Instance->NBTP = ((((uint32_t)hfdcan->Init.NominalSyncJumpWidth - 1U) << FDCAN_NBTP_NSJW_Pos) | \ - 802c3fe: 61da str r2, [r3, #28] + 802c42e: 61da str r2, [r3, #28] /* If FD operation with BRS is selected, set the data bit timing register */ if (hfdcan->Init.FrameFormat == FDCAN_FRAME_FD_BRS) - 802c400: 687b ldr r3, [r7, #4] - 802c402: 689b ldr r3, [r3, #8] - 802c404: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 802c408: d115 bne.n 802c436 + 802c430: 687b ldr r3, [r7, #4] + 802c432: 689b ldr r3, [r3, #8] + 802c434: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 802c438: d115 bne.n 802c466 { hfdcan->Instance->DBTP = ((((uint32_t)hfdcan->Init.DataSyncJumpWidth - 1U) << FDCAN_DBTP_DSJW_Pos) | \ - 802c40a: 687b ldr r3, [r7, #4] - 802c40c: 6a9b ldr r3, [r3, #40] ; 0x28 - 802c40e: 1e5a subs r2, r3, #1 + 802c43a: 687b ldr r3, [r7, #4] + 802c43c: 6a9b ldr r3, [r3, #40] ; 0x28 + 802c43e: 1e5a subs r2, r3, #1 (((uint32_t)hfdcan->Init.DataTimeSeg1 - 1U) << FDCAN_DBTP_DTSEG1_Pos) | \ - 802c410: 687b ldr r3, [r7, #4] - 802c412: 6adb ldr r3, [r3, #44] ; 0x2c - 802c414: 3b01 subs r3, #1 - 802c416: 021b lsls r3, r3, #8 + 802c440: 687b ldr r3, [r7, #4] + 802c442: 6adb ldr r3, [r3, #44] ; 0x2c + 802c444: 3b01 subs r3, #1 + 802c446: 021b lsls r3, r3, #8 hfdcan->Instance->DBTP = ((((uint32_t)hfdcan->Init.DataSyncJumpWidth - 1U) << FDCAN_DBTP_DSJW_Pos) | \ - 802c418: 431a orrs r2, r3 + 802c448: 431a orrs r2, r3 (((uint32_t)hfdcan->Init.DataTimeSeg2 - 1U) << FDCAN_DBTP_DTSEG2_Pos) | \ - 802c41a: 687b ldr r3, [r7, #4] - 802c41c: 6b1b ldr r3, [r3, #48] ; 0x30 - 802c41e: 3b01 subs r3, #1 - 802c420: 011b lsls r3, r3, #4 + 802c44a: 687b ldr r3, [r7, #4] + 802c44c: 6b1b ldr r3, [r3, #48] ; 0x30 + 802c44e: 3b01 subs r3, #1 + 802c450: 011b lsls r3, r3, #4 (((uint32_t)hfdcan->Init.DataTimeSeg1 - 1U) << FDCAN_DBTP_DTSEG1_Pos) | \ - 802c422: ea42 0103 orr.w r1, r2, r3 + 802c452: ea42 0103 orr.w r1, r2, r3 (((uint32_t)hfdcan->Init.DataPrescaler - 1U) << FDCAN_DBTP_DBRP_Pos)); - 802c426: 687b ldr r3, [r7, #4] - 802c428: 6a5b ldr r3, [r3, #36] ; 0x24 - 802c42a: 3b01 subs r3, #1 - 802c42c: 041a lsls r2, r3, #16 + 802c456: 687b ldr r3, [r7, #4] + 802c458: 6a5b ldr r3, [r3, #36] ; 0x24 + 802c45a: 3b01 subs r3, #1 + 802c45c: 041a lsls r2, r3, #16 hfdcan->Instance->DBTP = ((((uint32_t)hfdcan->Init.DataSyncJumpWidth - 1U) << FDCAN_DBTP_DSJW_Pos) | \ - 802c42e: 687b ldr r3, [r7, #4] - 802c430: 681b ldr r3, [r3, #0] + 802c45e: 687b ldr r3, [r7, #4] + 802c460: 681b ldr r3, [r3, #0] (((uint32_t)hfdcan->Init.DataTimeSeg2 - 1U) << FDCAN_DBTP_DTSEG2_Pos) | \ - 802c432: 430a orrs r2, r1 + 802c462: 430a orrs r2, r1 hfdcan->Instance->DBTP = ((((uint32_t)hfdcan->Init.DataSyncJumpWidth - 1U) << FDCAN_DBTP_DSJW_Pos) | \ - 802c434: 60da str r2, [r3, #12] + 802c464: 60da str r2, [r3, #12] } if (hfdcan->Init.TxFifoQueueElmtsNbr > 0U) - 802c436: 687b ldr r3, [r7, #4] - 802c438: 6e1b ldr r3, [r3, #96] ; 0x60 - 802c43a: 2b00 cmp r3, #0 - 802c43c: d00a beq.n 802c454 + 802c466: 687b ldr r3, [r7, #4] + 802c468: 6e1b ldr r3, [r3, #96] ; 0x60 + 802c46a: 2b00 cmp r3, #0 + 802c46c: d00a beq.n 802c484 { /* Select between Tx FIFO and Tx Queue operation modes */ SET_BIT(hfdcan->Instance->TXBC, hfdcan->Init.TxFifoQueueMode); - 802c43e: 687b ldr r3, [r7, #4] - 802c440: 681b ldr r3, [r3, #0] - 802c442: f8d3 10c0 ldr.w r1, [r3, #192] ; 0xc0 - 802c446: 687b ldr r3, [r7, #4] - 802c448: 6e5a ldr r2, [r3, #100] ; 0x64 - 802c44a: 687b ldr r3, [r7, #4] - 802c44c: 681b ldr r3, [r3, #0] - 802c44e: 430a orrs r2, r1 - 802c450: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 + 802c46e: 687b ldr r3, [r7, #4] + 802c470: 681b ldr r3, [r3, #0] + 802c472: f8d3 10c0 ldr.w r1, [r3, #192] ; 0xc0 + 802c476: 687b ldr r3, [r7, #4] + 802c478: 6e5a ldr r2, [r3, #100] ; 0x64 + 802c47a: 687b ldr r3, [r7, #4] + 802c47c: 681b ldr r3, [r3, #0] + 802c47e: 430a orrs r2, r1 + 802c480: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 } /* Configure Tx element size */ if ((hfdcan->Init.TxBuffersNbr + hfdcan->Init.TxFifoQueueElmtsNbr) > 0U) - 802c454: 687b ldr r3, [r7, #4] - 802c456: 6dda ldr r2, [r3, #92] ; 0x5c - 802c458: 687b ldr r3, [r7, #4] - 802c45a: 6e1b ldr r3, [r3, #96] ; 0x60 - 802c45c: 4413 add r3, r2 - 802c45e: 2b00 cmp r3, #0 - 802c460: d011 beq.n 802c486 + 802c484: 687b ldr r3, [r7, #4] + 802c486: 6dda ldr r2, [r3, #92] ; 0x5c + 802c488: 687b ldr r3, [r7, #4] + 802c48a: 6e1b ldr r3, [r3, #96] ; 0x60 + 802c48c: 4413 add r3, r2 + 802c48e: 2b00 cmp r3, #0 + 802c490: d011 beq.n 802c4b6 { MODIFY_REG(hfdcan->Instance->TXESC, FDCAN_TXESC_TBDS, CvtEltSize[hfdcan->Init.TxElmtSize]); - 802c462: 687b ldr r3, [r7, #4] - 802c464: 681b ldr r3, [r3, #0] - 802c466: f8d3 30c8 ldr.w r3, [r3, #200] ; 0xc8 - 802c46a: f023 0107 bic.w r1, r3, #7 - 802c46e: 687b ldr r3, [r7, #4] - 802c470: 6e9b ldr r3, [r3, #104] ; 0x68 - 802c472: 009b lsls r3, r3, #2 - 802c474: 3360 adds r3, #96 ; 0x60 - 802c476: 443b add r3, r7 - 802c478: f853 2c54 ldr.w r2, [r3, #-84] - 802c47c: 687b ldr r3, [r7, #4] - 802c47e: 681b ldr r3, [r3, #0] - 802c480: 430a orrs r2, r1 - 802c482: f8c3 20c8 str.w r2, [r3, #200] ; 0xc8 + 802c492: 687b ldr r3, [r7, #4] + 802c494: 681b ldr r3, [r3, #0] + 802c496: f8d3 30c8 ldr.w r3, [r3, #200] ; 0xc8 + 802c49a: f023 0107 bic.w r1, r3, #7 + 802c49e: 687b ldr r3, [r7, #4] + 802c4a0: 6e9b ldr r3, [r3, #104] ; 0x68 + 802c4a2: 009b lsls r3, r3, #2 + 802c4a4: 3360 adds r3, #96 ; 0x60 + 802c4a6: 443b add r3, r7 + 802c4a8: f853 2c54 ldr.w r2, [r3, #-84] + 802c4ac: 687b ldr r3, [r7, #4] + 802c4ae: 681b ldr r3, [r3, #0] + 802c4b0: 430a orrs r2, r1 + 802c4b2: f8c3 20c8 str.w r2, [r3, #200] ; 0xc8 } /* Configure Rx FIFO 0 element size */ if (hfdcan->Init.RxFifo0ElmtsNbr > 0U) - 802c486: 687b ldr r3, [r7, #4] - 802c488: 6c1b ldr r3, [r3, #64] ; 0x40 - 802c48a: 2b00 cmp r3, #0 - 802c48c: d011 beq.n 802c4b2 + 802c4b6: 687b ldr r3, [r7, #4] + 802c4b8: 6c1b ldr r3, [r3, #64] ; 0x40 + 802c4ba: 2b00 cmp r3, #0 + 802c4bc: d011 beq.n 802c4e2 { MODIFY_REG(hfdcan->Instance->RXESC, FDCAN_RXESC_F0DS, (CvtEltSize[hfdcan->Init.RxFifo0ElmtSize] << FDCAN_RXESC_F0DS_Pos)); - 802c48e: 687b ldr r3, [r7, #4] - 802c490: 681b ldr r3, [r3, #0] - 802c492: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc - 802c496: f023 0107 bic.w r1, r3, #7 - 802c49a: 687b ldr r3, [r7, #4] - 802c49c: 6c5b ldr r3, [r3, #68] ; 0x44 - 802c49e: 009b lsls r3, r3, #2 - 802c4a0: 3360 adds r3, #96 ; 0x60 - 802c4a2: 443b add r3, r7 - 802c4a4: f853 2c54 ldr.w r2, [r3, #-84] - 802c4a8: 687b ldr r3, [r7, #4] - 802c4aa: 681b ldr r3, [r3, #0] - 802c4ac: 430a orrs r2, r1 - 802c4ae: f8c3 20bc str.w r2, [r3, #188] ; 0xbc + 802c4be: 687b ldr r3, [r7, #4] + 802c4c0: 681b ldr r3, [r3, #0] + 802c4c2: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc + 802c4c6: f023 0107 bic.w r1, r3, #7 + 802c4ca: 687b ldr r3, [r7, #4] + 802c4cc: 6c5b ldr r3, [r3, #68] ; 0x44 + 802c4ce: 009b lsls r3, r3, #2 + 802c4d0: 3360 adds r3, #96 ; 0x60 + 802c4d2: 443b add r3, r7 + 802c4d4: f853 2c54 ldr.w r2, [r3, #-84] + 802c4d8: 687b ldr r3, [r7, #4] + 802c4da: 681b ldr r3, [r3, #0] + 802c4dc: 430a orrs r2, r1 + 802c4de: f8c3 20bc str.w r2, [r3, #188] ; 0xbc } /* Configure Rx FIFO 1 element size */ if (hfdcan->Init.RxFifo1ElmtsNbr > 0U) - 802c4b2: 687b ldr r3, [r7, #4] - 802c4b4: 6c9b ldr r3, [r3, #72] ; 0x48 - 802c4b6: 2b00 cmp r3, #0 - 802c4b8: d012 beq.n 802c4e0 + 802c4e2: 687b ldr r3, [r7, #4] + 802c4e4: 6c9b ldr r3, [r3, #72] ; 0x48 + 802c4e6: 2b00 cmp r3, #0 + 802c4e8: d012 beq.n 802c510 { MODIFY_REG(hfdcan->Instance->RXESC, FDCAN_RXESC_F1DS, (CvtEltSize[hfdcan->Init.RxFifo1ElmtSize] << FDCAN_RXESC_F1DS_Pos)); - 802c4ba: 687b ldr r3, [r7, #4] - 802c4bc: 681b ldr r3, [r3, #0] - 802c4be: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc - 802c4c2: f023 0170 bic.w r1, r3, #112 ; 0x70 - 802c4c6: 687b ldr r3, [r7, #4] - 802c4c8: 6cdb ldr r3, [r3, #76] ; 0x4c - 802c4ca: 009b lsls r3, r3, #2 - 802c4cc: 3360 adds r3, #96 ; 0x60 - 802c4ce: 443b add r3, r7 - 802c4d0: f853 3c54 ldr.w r3, [r3, #-84] - 802c4d4: 011a lsls r2, r3, #4 - 802c4d6: 687b ldr r3, [r7, #4] - 802c4d8: 681b ldr r3, [r3, #0] - 802c4da: 430a orrs r2, r1 - 802c4dc: f8c3 20bc str.w r2, [r3, #188] ; 0xbc + 802c4ea: 687b ldr r3, [r7, #4] + 802c4ec: 681b ldr r3, [r3, #0] + 802c4ee: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc + 802c4f2: f023 0170 bic.w r1, r3, #112 ; 0x70 + 802c4f6: 687b ldr r3, [r7, #4] + 802c4f8: 6cdb ldr r3, [r3, #76] ; 0x4c + 802c4fa: 009b lsls r3, r3, #2 + 802c4fc: 3360 adds r3, #96 ; 0x60 + 802c4fe: 443b add r3, r7 + 802c500: f853 3c54 ldr.w r3, [r3, #-84] + 802c504: 011a lsls r2, r3, #4 + 802c506: 687b ldr r3, [r7, #4] + 802c508: 681b ldr r3, [r3, #0] + 802c50a: 430a orrs r2, r1 + 802c50c: f8c3 20bc str.w r2, [r3, #188] ; 0xbc } /* Configure Rx buffer element size */ if (hfdcan->Init.RxBuffersNbr > 0U) - 802c4e0: 687b ldr r3, [r7, #4] - 802c4e2: 6d1b ldr r3, [r3, #80] ; 0x50 - 802c4e4: 2b00 cmp r3, #0 - 802c4e6: d012 beq.n 802c50e + 802c510: 687b ldr r3, [r7, #4] + 802c512: 6d1b ldr r3, [r3, #80] ; 0x50 + 802c514: 2b00 cmp r3, #0 + 802c516: d012 beq.n 802c53e { MODIFY_REG(hfdcan->Instance->RXESC, FDCAN_RXESC_RBDS, (CvtEltSize[hfdcan->Init.RxBufferSize] << FDCAN_RXESC_RBDS_Pos)); - 802c4e8: 687b ldr r3, [r7, #4] - 802c4ea: 681b ldr r3, [r3, #0] - 802c4ec: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc - 802c4f0: f423 61e0 bic.w r1, r3, #1792 ; 0x700 - 802c4f4: 687b ldr r3, [r7, #4] - 802c4f6: 6d5b ldr r3, [r3, #84] ; 0x54 - 802c4f8: 009b lsls r3, r3, #2 - 802c4fa: 3360 adds r3, #96 ; 0x60 - 802c4fc: 443b add r3, r7 - 802c4fe: f853 3c54 ldr.w r3, [r3, #-84] - 802c502: 021a lsls r2, r3, #8 - 802c504: 687b ldr r3, [r7, #4] - 802c506: 681b ldr r3, [r3, #0] - 802c508: 430a orrs r2, r1 - 802c50a: f8c3 20bc str.w r2, [r3, #188] ; 0xbc + 802c518: 687b ldr r3, [r7, #4] + 802c51a: 681b ldr r3, [r3, #0] + 802c51c: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc + 802c520: f423 61e0 bic.w r1, r3, #1792 ; 0x700 + 802c524: 687b ldr r3, [r7, #4] + 802c526: 6d5b ldr r3, [r3, #84] ; 0x54 + 802c528: 009b lsls r3, r3, #2 + 802c52a: 3360 adds r3, #96 ; 0x60 + 802c52c: 443b add r3, r7 + 802c52e: f853 3c54 ldr.w r3, [r3, #-84] + 802c532: 021a lsls r2, r3, #8 + 802c534: 687b ldr r3, [r7, #4] + 802c536: 681b ldr r3, [r3, #0] + 802c538: 430a orrs r2, r1 + 802c53a: f8c3 20bc str.w r2, [r3, #188] ; 0xbc } /* By default operation mode is set to Event-driven communication. If Time-triggered communication is needed, user should call the HAL_FDCAN_TT_ConfigOperation function just after the HAL_FDCAN_Init */ if (hfdcan->Instance == FDCAN1) - 802c50e: 687b ldr r3, [r7, #4] - 802c510: 681b ldr r3, [r3, #0] - 802c512: 4a11 ldr r2, [pc, #68] ; (802c558 ) - 802c514: 4293 cmp r3, r2 - 802c516: d107 bne.n 802c528 + 802c53e: 687b ldr r3, [r7, #4] + 802c540: 681b ldr r3, [r3, #0] + 802c542: 4a11 ldr r2, [pc, #68] ; (802c588 ) + 802c544: 4293 cmp r3, r2 + 802c546: d107 bne.n 802c558 { CLEAR_BIT(hfdcan->ttcan->TTOCF, FDCAN_TTOCF_OM); - 802c518: 687b ldr r3, [r7, #4] - 802c51a: 685b ldr r3, [r3, #4] - 802c51c: 689a ldr r2, [r3, #8] - 802c51e: 687b ldr r3, [r7, #4] - 802c520: 685b ldr r3, [r3, #4] - 802c522: f022 0203 bic.w r2, r2, #3 - 802c526: 609a str r2, [r3, #8] + 802c548: 687b ldr r3, [r7, #4] + 802c54a: 685b ldr r3, [r3, #4] + 802c54c: 689a ldr r2, [r3, #8] + 802c54e: 687b ldr r3, [r7, #4] + 802c550: 685b ldr r3, [r3, #4] + 802c552: f022 0203 bic.w r2, r2, #3 + 802c556: 609a str r2, [r3, #8] } /* Initialize the Latest Tx FIFO/Queue request buffer index */ hfdcan->LatestTxFifoQRequest = 0U; - 802c528: 687b ldr r3, [r7, #4] - 802c52a: 2200 movs r2, #0 - 802c52c: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 802c558: 687b ldr r3, [r7, #4] + 802c55a: 2200 movs r2, #0 + 802c55c: f8c3 2094 str.w r2, [r3, #148] ; 0x94 /* Initialize the error code */ hfdcan->ErrorCode = HAL_FDCAN_ERROR_NONE; - 802c530: 687b ldr r3, [r7, #4] - 802c532: 2200 movs r2, #0 - 802c534: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c560: 687b ldr r3, [r7, #4] + 802c562: 2200 movs r2, #0 + 802c564: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Initialize the FDCAN state */ hfdcan->State = HAL_FDCAN_STATE_READY; - 802c538: 687b ldr r3, [r7, #4] - 802c53a: 2201 movs r2, #1 - 802c53c: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802c568: 687b ldr r3, [r7, #4] + 802c56a: 2201 movs r2, #1 + 802c56c: f883 2098 strb.w r2, [r3, #152] ; 0x98 /* Calculate each RAM block address */ status = FDCAN_CalcultateRamBlockAddresses(hfdcan); - 802c540: 6878 ldr r0, [r7, #4] - 802c542: f000 fd77 bl 802d034 - 802c546: 4603 mov r3, r0 - 802c548: f887 305b strb.w r3, [r7, #91] ; 0x5b + 802c570: 6878 ldr r0, [r7, #4] + 802c572: f000 fd77 bl 802d064 + 802c576: 4603 mov r3, r0 + 802c578: f887 305b strb.w r3, [r7, #91] ; 0x5b /* Return function status */ return status; - 802c54c: f897 305b ldrb.w r3, [r7, #91] ; 0x5b + 802c57c: f897 305b ldrb.w r3, [r7, #91] ; 0x5b } - 802c550: 4618 mov r0, r3 - 802c552: 3760 adds r7, #96 ; 0x60 - 802c554: 46bd mov sp, r7 - 802c556: bd80 pop {r7, pc} - 802c558: 4000a000 .word 0x4000a000 + 802c580: 4618 mov r0, r3 + 802c582: 3760 adds r7, #96 ; 0x60 + 802c584: 46bd mov sp, r7 + 802c586: bd80 pop {r7, pc} + 802c588: 4000a000 .word 0x4000a000 -0802c55c : +0802c58c : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_Start(FDCAN_HandleTypeDef *hfdcan) { - 802c55c: b480 push {r7} - 802c55e: b083 sub sp, #12 - 802c560: af00 add r7, sp, #0 - 802c562: 6078 str r0, [r7, #4] + 802c58c: b480 push {r7} + 802c58e: b083 sub sp, #12 + 802c590: af00 add r7, sp, #0 + 802c592: 6078 str r0, [r7, #4] if (hfdcan->State == HAL_FDCAN_STATE_READY) - 802c564: 687b ldr r3, [r7, #4] - 802c566: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c56a: b2db uxtb r3, r3 - 802c56c: 2b01 cmp r3, #1 - 802c56e: d111 bne.n 802c594 + 802c594: 687b ldr r3, [r7, #4] + 802c596: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802c59a: b2db uxtb r3, r3 + 802c59c: 2b01 cmp r3, #1 + 802c59e: d111 bne.n 802c5c4 { /* Change FDCAN peripheral state */ hfdcan->State = HAL_FDCAN_STATE_BUSY; - 802c570: 687b ldr r3, [r7, #4] - 802c572: 2202 movs r2, #2 - 802c574: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802c5a0: 687b ldr r3, [r7, #4] + 802c5a2: 2202 movs r2, #2 + 802c5a4: f883 2098 strb.w r2, [r3, #152] ; 0x98 /* Request leave initialisation */ CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT); - 802c578: 687b ldr r3, [r7, #4] - 802c57a: 681b ldr r3, [r3, #0] - 802c57c: 699a ldr r2, [r3, #24] - 802c57e: 687b ldr r3, [r7, #4] - 802c580: 681b ldr r3, [r3, #0] - 802c582: f022 0201 bic.w r2, r2, #1 - 802c586: 619a str r2, [r3, #24] + 802c5a8: 687b ldr r3, [r7, #4] + 802c5aa: 681b ldr r3, [r3, #0] + 802c5ac: 699a ldr r2, [r3, #24] + 802c5ae: 687b ldr r3, [r7, #4] + 802c5b0: 681b ldr r3, [r3, #0] + 802c5b2: f022 0201 bic.w r2, r2, #1 + 802c5b6: 619a str r2, [r3, #24] /* Reset the FDCAN ErrorCode */ hfdcan->ErrorCode = HAL_FDCAN_ERROR_NONE; - 802c588: 687b ldr r3, [r7, #4] - 802c58a: 2200 movs r2, #0 - 802c58c: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c5b8: 687b ldr r3, [r7, #4] + 802c5ba: 2200 movs r2, #0 + 802c5bc: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Return function status */ return HAL_OK; - 802c590: 2300 movs r3, #0 - 802c592: e008 b.n 802c5a6 + 802c5c0: 2300 movs r3, #0 + 802c5c2: e008 b.n 802c5d6 } else { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_NOT_READY; - 802c594: 687b ldr r3, [r7, #4] - 802c596: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c59a: f043 0204 orr.w r2, r3, #4 - 802c59e: 687b ldr r3, [r7, #4] - 802c5a0: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c5c4: 687b ldr r3, [r7, #4] + 802c5c6: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c5ca: f043 0204 orr.w r2, r3, #4 + 802c5ce: 687b ldr r3, [r7, #4] + 802c5d0: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c5a4: 2301 movs r3, #1 + 802c5d4: 2301 movs r3, #1 } } - 802c5a6: 4618 mov r0, r3 - 802c5a8: 370c adds r7, #12 - 802c5aa: 46bd mov sp, r7 - 802c5ac: f85d 7b04 ldr.w r7, [sp], #4 - 802c5b0: 4770 bx lr + 802c5d6: 4618 mov r0, r3 + 802c5d8: 370c adds r7, #12 + 802c5da: 46bd mov sp, r7 + 802c5dc: f85d 7b04 ldr.w r7, [sp], #4 + 802c5e0: 4770 bx lr -0802c5b2 : +0802c5e2 : * @param pTxHeader pointer to a FDCAN_TxHeaderTypeDef structure. * @param pTxData pointer to a buffer containing the payload of the Tx frame. * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_AddMessageToTxFifoQ(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData) { - 802c5b2: b580 push {r7, lr} - 802c5b4: b086 sub sp, #24 - 802c5b6: af00 add r7, sp, #0 - 802c5b8: 60f8 str r0, [r7, #12] - 802c5ba: 60b9 str r1, [r7, #8] - 802c5bc: 607a str r2, [r7, #4] + 802c5e2: b580 push {r7, lr} + 802c5e4: b086 sub sp, #24 + 802c5e6: af00 add r7, sp, #0 + 802c5e8: 60f8 str r0, [r7, #12] + 802c5ea: 60b9 str r1, [r7, #8] + 802c5ec: 607a str r2, [r7, #4] assert_param(IS_FDCAN_BRS(pTxHeader->BitRateSwitch)); assert_param(IS_FDCAN_FDF(pTxHeader->FDFormat)); assert_param(IS_FDCAN_EFC(pTxHeader->TxEventFifoControl)); assert_param(IS_FDCAN_MAX_VALUE(pTxHeader->MessageMarker, 0xFFU)); if (hfdcan->State == HAL_FDCAN_STATE_BUSY) - 802c5be: 68fb ldr r3, [r7, #12] - 802c5c0: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c5c4: b2db uxtb r3, r3 - 802c5c6: 2b02 cmp r3, #2 - 802c5c8: d141 bne.n 802c64e + 802c5ee: 68fb ldr r3, [r7, #12] + 802c5f0: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802c5f4: b2db uxtb r3, r3 + 802c5f6: 2b02 cmp r3, #2 + 802c5f8: d141 bne.n 802c67e { /* Check that the Tx FIFO/Queue has an allocated area into the RAM */ if ((hfdcan->Instance->TXBC & FDCAN_TXBC_TFQS) == 0U) - 802c5ca: 68fb ldr r3, [r7, #12] - 802c5cc: 681b ldr r3, [r3, #0] - 802c5ce: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802c5d2: f003 537c and.w r3, r3, #1056964608 ; 0x3f000000 - 802c5d6: 2b00 cmp r3, #0 - 802c5d8: d109 bne.n 802c5ee + 802c5fa: 68fb ldr r3, [r7, #12] + 802c5fc: 681b ldr r3, [r3, #0] + 802c5fe: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802c602: f003 537c and.w r3, r3, #1056964608 ; 0x3f000000 + 802c606: 2b00 cmp r3, #0 + 802c608: d109 bne.n 802c61e { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802c5da: 68fb ldr r3, [r7, #12] - 802c5dc: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c5e0: f043 0220 orr.w r2, r3, #32 - 802c5e4: 68fb ldr r3, [r7, #12] - 802c5e6: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c60a: 68fb ldr r3, [r7, #12] + 802c60c: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c610: f043 0220 orr.w r2, r3, #32 + 802c614: 68fb ldr r3, [r7, #12] + 802c616: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c5ea: 2301 movs r3, #1 - 802c5ec: e038 b.n 802c660 + 802c61a: 2301 movs r3, #1 + 802c61c: e038 b.n 802c690 } /* Check that the Tx FIFO/Queue is not full */ if ((hfdcan->Instance->TXFQS & FDCAN_TXFQS_TFQF) != 0U) - 802c5ee: 68fb ldr r3, [r7, #12] - 802c5f0: 681b ldr r3, [r3, #0] - 802c5f2: f8d3 30c4 ldr.w r3, [r3, #196] ; 0xc4 - 802c5f6: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 802c5fa: 2b00 cmp r3, #0 - 802c5fc: d009 beq.n 802c612 + 802c61e: 68fb ldr r3, [r7, #12] + 802c620: 681b ldr r3, [r3, #0] + 802c622: f8d3 30c4 ldr.w r3, [r3, #196] ; 0xc4 + 802c626: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 802c62a: 2b00 cmp r3, #0 + 802c62c: d009 beq.n 802c642 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_FIFO_FULL; - 802c5fe: 68fb ldr r3, [r7, #12] - 802c600: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c604: f443 7200 orr.w r2, r3, #512 ; 0x200 - 802c608: 68fb ldr r3, [r7, #12] - 802c60a: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c62e: 68fb ldr r3, [r7, #12] + 802c630: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c634: f443 7200 orr.w r2, r3, #512 ; 0x200 + 802c638: 68fb ldr r3, [r7, #12] + 802c63a: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c60e: 2301 movs r3, #1 - 802c610: e026 b.n 802c660 + 802c63e: 2301 movs r3, #1 + 802c640: e026 b.n 802c690 } else { /* Retrieve the Tx FIFO PutIndex */ PutIndex = ((hfdcan->Instance->TXFQS & FDCAN_TXFQS_TFQPI) >> FDCAN_TXFQS_TFQPI_Pos); - 802c612: 68fb ldr r3, [r7, #12] - 802c614: 681b ldr r3, [r3, #0] - 802c616: f8d3 30c4 ldr.w r3, [r3, #196] ; 0xc4 - 802c61a: 0c1b lsrs r3, r3, #16 - 802c61c: f003 031f and.w r3, r3, #31 - 802c620: 617b str r3, [r7, #20] + 802c642: 68fb ldr r3, [r7, #12] + 802c644: 681b ldr r3, [r3, #0] + 802c646: f8d3 30c4 ldr.w r3, [r3, #196] ; 0xc4 + 802c64a: 0c1b lsrs r3, r3, #16 + 802c64c: f003 031f and.w r3, r3, #31 + 802c650: 617b str r3, [r7, #20] /* Add the message to the Tx FIFO/Queue */ FDCAN_CopyMessageToRAM(hfdcan, pTxHeader, pTxData, PutIndex); - 802c622: 697b ldr r3, [r7, #20] - 802c624: 687a ldr r2, [r7, #4] - 802c626: 68b9 ldr r1, [r7, #8] - 802c628: 68f8 ldr r0, [r7, #12] - 802c62a: f000 fe89 bl 802d340 + 802c652: 697b ldr r3, [r7, #20] + 802c654: 687a ldr r2, [r7, #4] + 802c656: 68b9 ldr r1, [r7, #8] + 802c658: 68f8 ldr r0, [r7, #12] + 802c65a: f000 fe89 bl 802d370 /* Activate the corresponding transmission request */ hfdcan->Instance->TXBAR = ((uint32_t)1 << PutIndex); - 802c62e: 68fb ldr r3, [r7, #12] - 802c630: 681b ldr r3, [r3, #0] - 802c632: 2101 movs r1, #1 - 802c634: 697a ldr r2, [r7, #20] - 802c636: fa01 f202 lsl.w r2, r1, r2 - 802c63a: f8c3 20d0 str.w r2, [r3, #208] ; 0xd0 + 802c65e: 68fb ldr r3, [r7, #12] + 802c660: 681b ldr r3, [r3, #0] + 802c662: 2101 movs r1, #1 + 802c664: 697a ldr r2, [r7, #20] + 802c666: fa01 f202 lsl.w r2, r1, r2 + 802c66a: f8c3 20d0 str.w r2, [r3, #208] ; 0xd0 /* Store the Latest Tx FIFO/Queue Request Buffer Index */ hfdcan->LatestTxFifoQRequest = ((uint32_t)1 << PutIndex); - 802c63e: 2201 movs r2, #1 - 802c640: 697b ldr r3, [r7, #20] - 802c642: 409a lsls r2, r3 - 802c644: 68fb ldr r3, [r7, #12] - 802c646: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 802c66e: 2201 movs r2, #1 + 802c670: 697b ldr r3, [r7, #20] + 802c672: 409a lsls r2, r3 + 802c674: 68fb ldr r3, [r7, #12] + 802c676: f8c3 2094 str.w r2, [r3, #148] ; 0x94 } /* Return function status */ return HAL_OK; - 802c64a: 2300 movs r3, #0 - 802c64c: e008 b.n 802c660 + 802c67a: 2300 movs r3, #0 + 802c67c: e008 b.n 802c690 } else { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_NOT_STARTED; - 802c64e: 68fb ldr r3, [r7, #12] - 802c650: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c654: f043 0208 orr.w r2, r3, #8 - 802c658: 68fb ldr r3, [r7, #12] - 802c65a: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c67e: 68fb ldr r3, [r7, #12] + 802c680: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c684: f043 0208 orr.w r2, r3, #8 + 802c688: 68fb ldr r3, [r7, #12] + 802c68a: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c65e: 2301 movs r3, #1 + 802c68e: 2301 movs r3, #1 } } - 802c660: 4618 mov r0, r3 - 802c662: 3718 adds r7, #24 - 802c664: 46bd mov sp, r7 - 802c666: bd80 pop {r7, pc} + 802c690: 4618 mov r0, r3 + 802c692: 3718 adds r7, #24 + 802c694: 46bd mov sp, r7 + 802c696: bd80 pop {r7, pc} -0802c668 : +0802c698 : * @param pRxHeader pointer to a FDCAN_RxHeaderTypeDef structure. * @param pRxData pointer to a buffer where the payload of the Rx frame will be stored. * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_GetRxMessage(FDCAN_HandleTypeDef *hfdcan, uint32_t RxLocation, FDCAN_RxHeaderTypeDef *pRxHeader, uint8_t *pRxData) { - 802c668: b480 push {r7} - 802c66a: b08b sub sp, #44 ; 0x2c - 802c66c: af00 add r7, sp, #0 - 802c66e: 60f8 str r0, [r7, #12] - 802c670: 60b9 str r1, [r7, #8] - 802c672: 607a str r2, [r7, #4] - 802c674: 603b str r3, [r7, #0] + 802c698: b480 push {r7} + 802c69a: b08b sub sp, #44 ; 0x2c + 802c69c: af00 add r7, sp, #0 + 802c69e: 60f8 str r0, [r7, #12] + 802c6a0: 60b9 str r1, [r7, #8] + 802c6a2: 607a str r2, [r7, #4] + 802c6a4: 603b str r3, [r7, #0] uint32_t *RxAddress; uint8_t *pData; uint32_t ByteCounter; uint32_t GetIndex = 0; - 802c676: 2300 movs r3, #0 - 802c678: 61fb str r3, [r7, #28] + 802c6a6: 2300 movs r3, #0 + 802c6a8: 61fb str r3, [r7, #28] HAL_FDCAN_StateTypeDef state = hfdcan->State; - 802c67a: 68fb ldr r3, [r7, #12] - 802c67c: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c680: 76fb strb r3, [r7, #27] + 802c6aa: 68fb ldr r3, [r7, #12] + 802c6ac: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802c6b0: 76fb strb r3, [r7, #27] if (state == HAL_FDCAN_STATE_BUSY) - 802c682: 7efb ldrb r3, [r7, #27] - 802c684: 2b02 cmp r3, #2 - 802c686: f040 814b bne.w 802c920 + 802c6b2: 7efb ldrb r3, [r7, #27] + 802c6b4: 2b02 cmp r3, #2 + 802c6b6: f040 814b bne.w 802c950 { if (RxLocation == FDCAN_RX_FIFO0) /* Rx element is assigned to the Rx FIFO 0 */ - 802c68a: 68bb ldr r3, [r7, #8] - 802c68c: 2b40 cmp r3, #64 ; 0x40 - 802c68e: d14d bne.n 802c72c + 802c6ba: 68bb ldr r3, [r7, #8] + 802c6bc: 2b40 cmp r3, #64 ; 0x40 + 802c6be: d14d bne.n 802c75c { /* Check that the Rx FIFO 0 has an allocated area into the RAM */ if ((hfdcan->Instance->RXF0C & FDCAN_RXF0C_F0S) == 0U) - 802c690: 68fb ldr r3, [r7, #12] - 802c692: 681b ldr r3, [r3, #0] - 802c694: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 802c698: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 802c69c: 2b00 cmp r3, #0 - 802c69e: d109 bne.n 802c6b4 + 802c6c0: 68fb ldr r3, [r7, #12] + 802c6c2: 681b ldr r3, [r3, #0] + 802c6c4: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 802c6c8: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 802c6cc: 2b00 cmp r3, #0 + 802c6ce: d109 bne.n 802c6e4 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802c6a0: 68fb ldr r3, [r7, #12] - 802c6a2: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c6a6: f043 0220 orr.w r2, r3, #32 - 802c6aa: 68fb ldr r3, [r7, #12] - 802c6ac: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c6d0: 68fb ldr r3, [r7, #12] + 802c6d2: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c6d6: f043 0220 orr.w r2, r3, #32 + 802c6da: 68fb ldr r3, [r7, #12] + 802c6dc: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c6b0: 2301 movs r3, #1 - 802c6b2: e13e b.n 802c932 + 802c6e0: 2301 movs r3, #1 + 802c6e2: e13e b.n 802c962 } /* Check that the Rx FIFO 0 is not empty */ if ((hfdcan->Instance->RXF0S & FDCAN_RXF0S_F0FL) == 0U) - 802c6b4: 68fb ldr r3, [r7, #12] - 802c6b6: 681b ldr r3, [r3, #0] - 802c6b8: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802c6bc: f003 037f and.w r3, r3, #127 ; 0x7f - 802c6c0: 2b00 cmp r3, #0 - 802c6c2: d109 bne.n 802c6d8 + 802c6e4: 68fb ldr r3, [r7, #12] + 802c6e6: 681b ldr r3, [r3, #0] + 802c6e8: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 802c6ec: f003 037f and.w r3, r3, #127 ; 0x7f + 802c6f0: 2b00 cmp r3, #0 + 802c6f2: d109 bne.n 802c708 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_FIFO_EMPTY; - 802c6c4: 68fb ldr r3, [r7, #12] - 802c6c6: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c6ca: f443 7280 orr.w r2, r3, #256 ; 0x100 - 802c6ce: 68fb ldr r3, [r7, #12] - 802c6d0: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c6f4: 68fb ldr r3, [r7, #12] + 802c6f6: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c6fa: f443 7280 orr.w r2, r3, #256 ; 0x100 + 802c6fe: 68fb ldr r3, [r7, #12] + 802c700: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c6d4: 2301 movs r3, #1 - 802c6d6: e12c b.n 802c932 + 802c704: 2301 movs r3, #1 + 802c706: e12c b.n 802c962 } else { /* Check that the Rx FIFO 0 is full & overwrite mode is on*/ if(((hfdcan->Instance->RXF0S & FDCAN_RXF0S_F0F) >> FDCAN_RXF0S_F0F_Pos) == 1U) - 802c6d8: 68fb ldr r3, [r7, #12] - 802c6da: 681b ldr r3, [r3, #0] - 802c6dc: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802c6e0: 0e1b lsrs r3, r3, #24 - 802c6e2: f003 0301 and.w r3, r3, #1 - 802c6e6: 2b01 cmp r3, #1 - 802c6e8: d10b bne.n 802c702 + 802c708: 68fb ldr r3, [r7, #12] + 802c70a: 681b ldr r3, [r3, #0] + 802c70c: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 802c710: 0e1b lsrs r3, r3, #24 + 802c712: f003 0301 and.w r3, r3, #1 + 802c716: 2b01 cmp r3, #1 + 802c718: d10b bne.n 802c732 { if(((hfdcan->Instance->RXF0C & FDCAN_RXF0C_F0OM) >> FDCAN_RXF0C_F0OM_Pos) == FDCAN_RX_FIFO_OVERWRITE) - 802c6ea: 68fb ldr r3, [r7, #12] - 802c6ec: 681b ldr r3, [r3, #0] - 802c6ee: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 802c6f2: 0fdb lsrs r3, r3, #31 - 802c6f4: f003 0301 and.w r3, r3, #1 - 802c6f8: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802c6fc: d101 bne.n 802c702 + 802c71a: 68fb ldr r3, [r7, #12] + 802c71c: 681b ldr r3, [r3, #0] + 802c71e: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 802c722: 0fdb lsrs r3, r3, #31 + 802c724: f003 0301 and.w r3, r3, #1 + 802c728: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802c72c: d101 bne.n 802c732 { /* When overwrite status is on discard first message in FIFO */ GetIndex = 1U; - 802c6fe: 2301 movs r3, #1 - 802c700: 61fb str r3, [r7, #28] + 802c72e: 2301 movs r3, #1 + 802c730: 61fb str r3, [r7, #28] } } /* Calculate Rx FIFO 0 element index*/ GetIndex += ((hfdcan->Instance->RXF0S & FDCAN_RXF0S_F0GI) >> FDCAN_RXF0S_F0GI_Pos); - 802c702: 68fb ldr r3, [r7, #12] - 802c704: 681b ldr r3, [r3, #0] - 802c706: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802c70a: 0a1b lsrs r3, r3, #8 - 802c70c: f003 033f and.w r3, r3, #63 ; 0x3f - 802c710: 69fa ldr r2, [r7, #28] - 802c712: 4413 add r3, r2 - 802c714: 61fb str r3, [r7, #28] + 802c732: 68fb ldr r3, [r7, #12] + 802c734: 681b ldr r3, [r3, #0] + 802c736: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 802c73a: 0a1b lsrs r3, r3, #8 + 802c73c: f003 033f and.w r3, r3, #63 ; 0x3f + 802c740: 69fa ldr r2, [r7, #28] + 802c742: 4413 add r3, r2 + 802c744: 61fb str r3, [r7, #28] /* Calculate Rx FIFO 0 element address */ RxAddress = (uint32_t *)(hfdcan->msgRam.RxFIFO0SA + (GetIndex * hfdcan->Init.RxFifo0ElmtSize * 4U)); - 802c716: 68fb ldr r3, [r7, #12] - 802c718: 6f5a ldr r2, [r3, #116] ; 0x74 - 802c71a: 68fb ldr r3, [r7, #12] - 802c71c: 6c5b ldr r3, [r3, #68] ; 0x44 - 802c71e: 69f9 ldr r1, [r7, #28] - 802c720: fb01 f303 mul.w r3, r1, r3 - 802c724: 009b lsls r3, r3, #2 - 802c726: 4413 add r3, r2 - 802c728: 627b str r3, [r7, #36] ; 0x24 - 802c72a: e069 b.n 802c800 + 802c746: 68fb ldr r3, [r7, #12] + 802c748: 6f5a ldr r2, [r3, #116] ; 0x74 + 802c74a: 68fb ldr r3, [r7, #12] + 802c74c: 6c5b ldr r3, [r3, #68] ; 0x44 + 802c74e: 69f9 ldr r1, [r7, #28] + 802c750: fb01 f303 mul.w r3, r1, r3 + 802c754: 009b lsls r3, r3, #2 + 802c756: 4413 add r3, r2 + 802c758: 627b str r3, [r7, #36] ; 0x24 + 802c75a: e069 b.n 802c830 } } else if (RxLocation == FDCAN_RX_FIFO1) /* Rx element is assigned to the Rx FIFO 1 */ - 802c72c: 68bb ldr r3, [r7, #8] - 802c72e: 2b41 cmp r3, #65 ; 0x41 - 802c730: d14d bne.n 802c7ce + 802c75c: 68bb ldr r3, [r7, #8] + 802c75e: 2b41 cmp r3, #65 ; 0x41 + 802c760: d14d bne.n 802c7fe { /* Check that the Rx FIFO 1 has an allocated area into the RAM */ if ((hfdcan->Instance->RXF1C & FDCAN_RXF1C_F1S) == 0U) - 802c732: 68fb ldr r3, [r7, #12] - 802c734: 681b ldr r3, [r3, #0] - 802c736: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802c73a: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 802c73e: 2b00 cmp r3, #0 - 802c740: d109 bne.n 802c756 + 802c762: 68fb ldr r3, [r7, #12] + 802c764: 681b ldr r3, [r3, #0] + 802c766: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802c76a: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 802c76e: 2b00 cmp r3, #0 + 802c770: d109 bne.n 802c786 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802c742: 68fb ldr r3, [r7, #12] - 802c744: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c748: f043 0220 orr.w r2, r3, #32 - 802c74c: 68fb ldr r3, [r7, #12] - 802c74e: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c772: 68fb ldr r3, [r7, #12] + 802c774: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c778: f043 0220 orr.w r2, r3, #32 + 802c77c: 68fb ldr r3, [r7, #12] + 802c77e: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c752: 2301 movs r3, #1 - 802c754: e0ed b.n 802c932 + 802c782: 2301 movs r3, #1 + 802c784: e0ed b.n 802c962 } /* Check that the Rx FIFO 0 is not empty */ if ((hfdcan->Instance->RXF1S & FDCAN_RXF1S_F1FL) == 0U) - 802c756: 68fb ldr r3, [r7, #12] - 802c758: 681b ldr r3, [r3, #0] - 802c75a: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 802c75e: f003 037f and.w r3, r3, #127 ; 0x7f - 802c762: 2b00 cmp r3, #0 - 802c764: d109 bne.n 802c77a + 802c786: 68fb ldr r3, [r7, #12] + 802c788: 681b ldr r3, [r3, #0] + 802c78a: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 802c78e: f003 037f and.w r3, r3, #127 ; 0x7f + 802c792: 2b00 cmp r3, #0 + 802c794: d109 bne.n 802c7aa { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_FIFO_EMPTY; - 802c766: 68fb ldr r3, [r7, #12] - 802c768: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c76c: f443 7280 orr.w r2, r3, #256 ; 0x100 - 802c770: 68fb ldr r3, [r7, #12] - 802c772: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c796: 68fb ldr r3, [r7, #12] + 802c798: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c79c: f443 7280 orr.w r2, r3, #256 ; 0x100 + 802c7a0: 68fb ldr r3, [r7, #12] + 802c7a2: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c776: 2301 movs r3, #1 - 802c778: e0db b.n 802c932 + 802c7a6: 2301 movs r3, #1 + 802c7a8: e0db b.n 802c962 } else { /* Check that the Rx FIFO 1 is full & overwrite mode is on*/ if(((hfdcan->Instance->RXF1S & FDCAN_RXF1S_F1F) >> FDCAN_RXF1S_F1F_Pos) == 1U) - 802c77a: 68fb ldr r3, [r7, #12] - 802c77c: 681b ldr r3, [r3, #0] - 802c77e: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 802c782: 0e1b lsrs r3, r3, #24 - 802c784: f003 0301 and.w r3, r3, #1 - 802c788: 2b01 cmp r3, #1 - 802c78a: d10b bne.n 802c7a4 + 802c7aa: 68fb ldr r3, [r7, #12] + 802c7ac: 681b ldr r3, [r3, #0] + 802c7ae: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 802c7b2: 0e1b lsrs r3, r3, #24 + 802c7b4: f003 0301 and.w r3, r3, #1 + 802c7b8: 2b01 cmp r3, #1 + 802c7ba: d10b bne.n 802c7d4 { if(((hfdcan->Instance->RXF1C & FDCAN_RXF1C_F1OM) >> FDCAN_RXF1C_F1OM_Pos) == FDCAN_RX_FIFO_OVERWRITE) - 802c78c: 68fb ldr r3, [r7, #12] - 802c78e: 681b ldr r3, [r3, #0] - 802c790: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802c794: 0fdb lsrs r3, r3, #31 - 802c796: f003 0301 and.w r3, r3, #1 - 802c79a: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802c79e: d101 bne.n 802c7a4 + 802c7bc: 68fb ldr r3, [r7, #12] + 802c7be: 681b ldr r3, [r3, #0] + 802c7c0: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802c7c4: 0fdb lsrs r3, r3, #31 + 802c7c6: f003 0301 and.w r3, r3, #1 + 802c7ca: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802c7ce: d101 bne.n 802c7d4 { /* When overwrite status is on discard first message in FIFO */ GetIndex = 1U; - 802c7a0: 2301 movs r3, #1 - 802c7a2: 61fb str r3, [r7, #28] + 802c7d0: 2301 movs r3, #1 + 802c7d2: 61fb str r3, [r7, #28] } } /* Calculate Rx FIFO 1 element index*/ GetIndex += ((hfdcan->Instance->RXF1S & FDCAN_RXF1S_F1GI) >> FDCAN_RXF1S_F1GI_Pos); - 802c7a4: 68fb ldr r3, [r7, #12] - 802c7a6: 681b ldr r3, [r3, #0] - 802c7a8: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 802c7ac: 0a1b lsrs r3, r3, #8 - 802c7ae: f003 033f and.w r3, r3, #63 ; 0x3f - 802c7b2: 69fa ldr r2, [r7, #28] - 802c7b4: 4413 add r3, r2 - 802c7b6: 61fb str r3, [r7, #28] + 802c7d4: 68fb ldr r3, [r7, #12] + 802c7d6: 681b ldr r3, [r3, #0] + 802c7d8: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 802c7dc: 0a1b lsrs r3, r3, #8 + 802c7de: f003 033f and.w r3, r3, #63 ; 0x3f + 802c7e2: 69fa ldr r2, [r7, #28] + 802c7e4: 4413 add r3, r2 + 802c7e6: 61fb str r3, [r7, #28] /* Calculate Rx FIFO 1 element address */ RxAddress = (uint32_t *)(hfdcan->msgRam.RxFIFO1SA + (GetIndex * hfdcan->Init.RxFifo1ElmtSize * 4U)); - 802c7b8: 68fb ldr r3, [r7, #12] - 802c7ba: 6f9a ldr r2, [r3, #120] ; 0x78 - 802c7bc: 68fb ldr r3, [r7, #12] - 802c7be: 6cdb ldr r3, [r3, #76] ; 0x4c - 802c7c0: 69f9 ldr r1, [r7, #28] - 802c7c2: fb01 f303 mul.w r3, r1, r3 - 802c7c6: 009b lsls r3, r3, #2 - 802c7c8: 4413 add r3, r2 - 802c7ca: 627b str r3, [r7, #36] ; 0x24 - 802c7cc: e018 b.n 802c800 + 802c7e8: 68fb ldr r3, [r7, #12] + 802c7ea: 6f9a ldr r2, [r3, #120] ; 0x78 + 802c7ec: 68fb ldr r3, [r7, #12] + 802c7ee: 6cdb ldr r3, [r3, #76] ; 0x4c + 802c7f0: 69f9 ldr r1, [r7, #28] + 802c7f2: fb01 f303 mul.w r3, r1, r3 + 802c7f6: 009b lsls r3, r3, #2 + 802c7f8: 4413 add r3, r2 + 802c7fa: 627b str r3, [r7, #36] ; 0x24 + 802c7fc: e018 b.n 802c830 } } else /* Rx element is assigned to a dedicated Rx buffer */ { /* Check that the selected buffer has an allocated area into the RAM */ if (RxLocation >= hfdcan->Init.RxBuffersNbr) - 802c7ce: 68fb ldr r3, [r7, #12] - 802c7d0: 6d1b ldr r3, [r3, #80] ; 0x50 - 802c7d2: 68ba ldr r2, [r7, #8] - 802c7d4: 429a cmp r2, r3 - 802c7d6: d309 bcc.n 802c7ec + 802c7fe: 68fb ldr r3, [r7, #12] + 802c800: 6d1b ldr r3, [r3, #80] ; 0x50 + 802c802: 68ba ldr r2, [r7, #8] + 802c804: 429a cmp r2, r3 + 802c806: d309 bcc.n 802c81c { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802c7d8: 68fb ldr r3, [r7, #12] - 802c7da: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c7de: f043 0220 orr.w r2, r3, #32 - 802c7e2: 68fb ldr r3, [r7, #12] - 802c7e4: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c808: 68fb ldr r3, [r7, #12] + 802c80a: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c80e: f043 0220 orr.w r2, r3, #32 + 802c812: 68fb ldr r3, [r7, #12] + 802c814: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c7e8: 2301 movs r3, #1 - 802c7ea: e0a2 b.n 802c932 + 802c818: 2301 movs r3, #1 + 802c81a: e0a2 b.n 802c962 } else { /* Calculate Rx buffer address */ RxAddress = (uint32_t *)(hfdcan->msgRam.RxBufferSA + (RxLocation * hfdcan->Init.RxBufferSize * 4U)); - 802c7ec: 68fb ldr r3, [r7, #12] - 802c7ee: 6fda ldr r2, [r3, #124] ; 0x7c - 802c7f0: 68fb ldr r3, [r7, #12] - 802c7f2: 6d5b ldr r3, [r3, #84] ; 0x54 - 802c7f4: 68b9 ldr r1, [r7, #8] - 802c7f6: fb01 f303 mul.w r3, r1, r3 - 802c7fa: 009b lsls r3, r3, #2 - 802c7fc: 4413 add r3, r2 - 802c7fe: 627b str r3, [r7, #36] ; 0x24 + 802c81c: 68fb ldr r3, [r7, #12] + 802c81e: 6fda ldr r2, [r3, #124] ; 0x7c + 802c820: 68fb ldr r3, [r7, #12] + 802c822: 6d5b ldr r3, [r3, #84] ; 0x54 + 802c824: 68b9 ldr r1, [r7, #8] + 802c826: fb01 f303 mul.w r3, r1, r3 + 802c82a: 009b lsls r3, r3, #2 + 802c82c: 4413 add r3, r2 + 802c82e: 627b str r3, [r7, #36] ; 0x24 } } /* Retrieve IdType */ pRxHeader->IdType = *RxAddress & FDCAN_ELEMENT_MASK_XTD; - 802c800: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c802: 681b ldr r3, [r3, #0] - 802c804: f003 4280 and.w r2, r3, #1073741824 ; 0x40000000 - 802c808: 687b ldr r3, [r7, #4] - 802c80a: 605a str r2, [r3, #4] + 802c830: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c832: 681b ldr r3, [r3, #0] + 802c834: f003 4280 and.w r2, r3, #1073741824 ; 0x40000000 + 802c838: 687b ldr r3, [r7, #4] + 802c83a: 605a str r2, [r3, #4] /* Retrieve Identifier */ if (pRxHeader->IdType == FDCAN_STANDARD_ID) /* Standard ID element */ - 802c80c: 687b ldr r3, [r7, #4] - 802c80e: 685b ldr r3, [r3, #4] - 802c810: 2b00 cmp r3, #0 - 802c812: d107 bne.n 802c824 + 802c83c: 687b ldr r3, [r7, #4] + 802c83e: 685b ldr r3, [r3, #4] + 802c840: 2b00 cmp r3, #0 + 802c842: d107 bne.n 802c854 { pRxHeader->Identifier = ((*RxAddress & FDCAN_ELEMENT_MASK_STDID) >> 18); - 802c814: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c816: 681b ldr r3, [r3, #0] - 802c818: 0c9b lsrs r3, r3, #18 - 802c81a: f3c3 020a ubfx r2, r3, #0, #11 - 802c81e: 687b ldr r3, [r7, #4] - 802c820: 601a str r2, [r3, #0] - 802c822: e005 b.n 802c830 + 802c844: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c846: 681b ldr r3, [r3, #0] + 802c848: 0c9b lsrs r3, r3, #18 + 802c84a: f3c3 020a ubfx r2, r3, #0, #11 + 802c84e: 687b ldr r3, [r7, #4] + 802c850: 601a str r2, [r3, #0] + 802c852: e005 b.n 802c860 } else /* Extended ID element */ { pRxHeader->Identifier = (*RxAddress & FDCAN_ELEMENT_MASK_EXTID); - 802c824: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c826: 681b ldr r3, [r3, #0] - 802c828: f023 4260 bic.w r2, r3, #3758096384 ; 0xe0000000 - 802c82c: 687b ldr r3, [r7, #4] - 802c82e: 601a str r2, [r3, #0] + 802c854: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c856: 681b ldr r3, [r3, #0] + 802c858: f023 4260 bic.w r2, r3, #3758096384 ; 0xe0000000 + 802c85c: 687b ldr r3, [r7, #4] + 802c85e: 601a str r2, [r3, #0] } /* Retrieve RxFrameType */ pRxHeader->RxFrameType = (*RxAddress & FDCAN_ELEMENT_MASK_RTR); - 802c830: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c832: 681b ldr r3, [r3, #0] - 802c834: f003 5200 and.w r2, r3, #536870912 ; 0x20000000 - 802c838: 687b ldr r3, [r7, #4] - 802c83a: 609a str r2, [r3, #8] + 802c860: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c862: 681b ldr r3, [r3, #0] + 802c864: f003 5200 and.w r2, r3, #536870912 ; 0x20000000 + 802c868: 687b ldr r3, [r7, #4] + 802c86a: 609a str r2, [r3, #8] /* Retrieve ErrorStateIndicator */ pRxHeader->ErrorStateIndicator = (*RxAddress & FDCAN_ELEMENT_MASK_ESI); - 802c83c: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c83e: 681b ldr r3, [r3, #0] - 802c840: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 - 802c844: 687b ldr r3, [r7, #4] - 802c846: 611a str r2, [r3, #16] + 802c86c: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c86e: 681b ldr r3, [r3, #0] + 802c870: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 + 802c874: 687b ldr r3, [r7, #4] + 802c876: 611a str r2, [r3, #16] /* Increment RxAddress pointer to second word of Rx FIFO element */ RxAddress++; - 802c848: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c84a: 3304 adds r3, #4 - 802c84c: 627b str r3, [r7, #36] ; 0x24 + 802c878: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c87a: 3304 adds r3, #4 + 802c87c: 627b str r3, [r7, #36] ; 0x24 /* Retrieve RxTimestamp */ pRxHeader->RxTimestamp = (*RxAddress & FDCAN_ELEMENT_MASK_TS); - 802c84e: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c850: 681b ldr r3, [r3, #0] - 802c852: b29a uxth r2, r3 - 802c854: 687b ldr r3, [r7, #4] - 802c856: 61da str r2, [r3, #28] + 802c87e: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c880: 681b ldr r3, [r3, #0] + 802c882: b29a uxth r2, r3 + 802c884: 687b ldr r3, [r7, #4] + 802c886: 61da str r2, [r3, #28] /* Retrieve DataLength */ pRxHeader->DataLength = (*RxAddress & FDCAN_ELEMENT_MASK_DLC); - 802c858: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c85a: 681b ldr r3, [r3, #0] - 802c85c: f403 2270 and.w r2, r3, #983040 ; 0xf0000 - 802c860: 687b ldr r3, [r7, #4] - 802c862: 60da str r2, [r3, #12] + 802c888: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c88a: 681b ldr r3, [r3, #0] + 802c88c: f403 2270 and.w r2, r3, #983040 ; 0xf0000 + 802c890: 687b ldr r3, [r7, #4] + 802c892: 60da str r2, [r3, #12] /* Retrieve BitRateSwitch */ pRxHeader->BitRateSwitch = (*RxAddress & FDCAN_ELEMENT_MASK_BRS); - 802c864: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c866: 681b ldr r3, [r3, #0] - 802c868: f403 1280 and.w r2, r3, #1048576 ; 0x100000 - 802c86c: 687b ldr r3, [r7, #4] - 802c86e: 615a str r2, [r3, #20] + 802c894: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c896: 681b ldr r3, [r3, #0] + 802c898: f403 1280 and.w r2, r3, #1048576 ; 0x100000 + 802c89c: 687b ldr r3, [r7, #4] + 802c89e: 615a str r2, [r3, #20] /* Retrieve FDFormat */ pRxHeader->FDFormat = (*RxAddress & FDCAN_ELEMENT_MASK_FDF); - 802c870: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c872: 681b ldr r3, [r3, #0] - 802c874: f403 1200 and.w r2, r3, #2097152 ; 0x200000 - 802c878: 687b ldr r3, [r7, #4] - 802c87a: 619a str r2, [r3, #24] + 802c8a0: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8a2: 681b ldr r3, [r3, #0] + 802c8a4: f403 1200 and.w r2, r3, #2097152 ; 0x200000 + 802c8a8: 687b ldr r3, [r7, #4] + 802c8aa: 619a str r2, [r3, #24] /* Retrieve FilterIndex */ pRxHeader->FilterIndex = ((*RxAddress & FDCAN_ELEMENT_MASK_FIDX) >> 24); - 802c87c: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c87e: 681b ldr r3, [r3, #0] - 802c880: 0e1b lsrs r3, r3, #24 - 802c882: f003 027f and.w r2, r3, #127 ; 0x7f - 802c886: 687b ldr r3, [r7, #4] - 802c888: 621a str r2, [r3, #32] + 802c8ac: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8ae: 681b ldr r3, [r3, #0] + 802c8b0: 0e1b lsrs r3, r3, #24 + 802c8b2: f003 027f and.w r2, r3, #127 ; 0x7f + 802c8b6: 687b ldr r3, [r7, #4] + 802c8b8: 621a str r2, [r3, #32] /* Retrieve NonMatchingFrame */ pRxHeader->IsFilterMatchingFrame = ((*RxAddress & FDCAN_ELEMENT_MASK_ANMF) >> 31); - 802c88a: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c88c: 681b ldr r3, [r3, #0] - 802c88e: 0fda lsrs r2, r3, #31 - 802c890: 687b ldr r3, [r7, #4] - 802c892: 625a str r2, [r3, #36] ; 0x24 + 802c8ba: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8bc: 681b ldr r3, [r3, #0] + 802c8be: 0fda lsrs r2, r3, #31 + 802c8c0: 687b ldr r3, [r7, #4] + 802c8c2: 625a str r2, [r3, #36] ; 0x24 /* Increment RxAddress pointer to payload of Rx FIFO element */ RxAddress++; - 802c894: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c896: 3304 adds r3, #4 - 802c898: 627b str r3, [r7, #36] ; 0x24 + 802c8c4: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8c6: 3304 adds r3, #4 + 802c8c8: 627b str r3, [r7, #36] ; 0x24 /* Retrieve Rx payload */ pData = (uint8_t *)RxAddress; - 802c89a: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c89c: 617b str r3, [r7, #20] + 802c8ca: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8cc: 617b str r3, [r7, #20] for (ByteCounter = 0; ByteCounter < DLCtoBytes[pRxHeader->DataLength >> 16]; ByteCounter++) - 802c89e: 2300 movs r3, #0 - 802c8a0: 623b str r3, [r7, #32] - 802c8a2: e00a b.n 802c8ba + 802c8ce: 2300 movs r3, #0 + 802c8d0: 623b str r3, [r7, #32] + 802c8d2: e00a b.n 802c8ea { pRxData[ByteCounter] = pData[ByteCounter]; - 802c8a4: 697a ldr r2, [r7, #20] - 802c8a6: 6a3b ldr r3, [r7, #32] - 802c8a8: 441a add r2, r3 - 802c8aa: 6839 ldr r1, [r7, #0] - 802c8ac: 6a3b ldr r3, [r7, #32] - 802c8ae: 440b add r3, r1 - 802c8b0: 7812 ldrb r2, [r2, #0] - 802c8b2: 701a strb r2, [r3, #0] + 802c8d4: 697a ldr r2, [r7, #20] + 802c8d6: 6a3b ldr r3, [r7, #32] + 802c8d8: 441a add r2, r3 + 802c8da: 6839 ldr r1, [r7, #0] + 802c8dc: 6a3b ldr r3, [r7, #32] + 802c8de: 440b add r3, r1 + 802c8e0: 7812 ldrb r2, [r2, #0] + 802c8e2: 701a strb r2, [r3, #0] for (ByteCounter = 0; ByteCounter < DLCtoBytes[pRxHeader->DataLength >> 16]; ByteCounter++) - 802c8b4: 6a3b ldr r3, [r7, #32] - 802c8b6: 3301 adds r3, #1 - 802c8b8: 623b str r3, [r7, #32] - 802c8ba: 687b ldr r3, [r7, #4] - 802c8bc: 68db ldr r3, [r3, #12] - 802c8be: 0c1b lsrs r3, r3, #16 - 802c8c0: 4a1f ldr r2, [pc, #124] ; (802c940 ) - 802c8c2: 5cd3 ldrb r3, [r2, r3] - 802c8c4: 461a mov r2, r3 - 802c8c6: 6a3b ldr r3, [r7, #32] - 802c8c8: 4293 cmp r3, r2 - 802c8ca: d3eb bcc.n 802c8a4 + 802c8e4: 6a3b ldr r3, [r7, #32] + 802c8e6: 3301 adds r3, #1 + 802c8e8: 623b str r3, [r7, #32] + 802c8ea: 687b ldr r3, [r7, #4] + 802c8ec: 68db ldr r3, [r3, #12] + 802c8ee: 0c1b lsrs r3, r3, #16 + 802c8f0: 4a1f ldr r2, [pc, #124] ; (802c970 ) + 802c8f2: 5cd3 ldrb r3, [r2, r3] + 802c8f4: 461a mov r2, r3 + 802c8f6: 6a3b ldr r3, [r7, #32] + 802c8f8: 4293 cmp r3, r2 + 802c8fa: d3eb bcc.n 802c8d4 } if (RxLocation == FDCAN_RX_FIFO0) /* Rx element is assigned to the Rx FIFO 0 */ - 802c8cc: 68bb ldr r3, [r7, #8] - 802c8ce: 2b40 cmp r3, #64 ; 0x40 - 802c8d0: d105 bne.n 802c8de + 802c8fc: 68bb ldr r3, [r7, #8] + 802c8fe: 2b40 cmp r3, #64 ; 0x40 + 802c900: d105 bne.n 802c90e { /* Acknowledge the Rx FIFO 0 that the oldest element is read so that it increments the GetIndex */ hfdcan->Instance->RXF0A = GetIndex; - 802c8d2: 68fb ldr r3, [r7, #12] - 802c8d4: 681b ldr r3, [r3, #0] - 802c8d6: 69fa ldr r2, [r7, #28] - 802c8d8: f8c3 20a8 str.w r2, [r3, #168] ; 0xa8 - 802c8dc: e01e b.n 802c91c + 802c902: 68fb ldr r3, [r7, #12] + 802c904: 681b ldr r3, [r3, #0] + 802c906: 69fa ldr r2, [r7, #28] + 802c908: f8c3 20a8 str.w r2, [r3, #168] ; 0xa8 + 802c90c: e01e b.n 802c94c } else if (RxLocation == FDCAN_RX_FIFO1) /* Rx element is assigned to the Rx FIFO 1 */ - 802c8de: 68bb ldr r3, [r7, #8] - 802c8e0: 2b41 cmp r3, #65 ; 0x41 - 802c8e2: d105 bne.n 802c8f0 + 802c90e: 68bb ldr r3, [r7, #8] + 802c910: 2b41 cmp r3, #65 ; 0x41 + 802c912: d105 bne.n 802c920 { /* Acknowledge the Rx FIFO 1 that the oldest element is read so that it increments the GetIndex */ hfdcan->Instance->RXF1A = GetIndex; - 802c8e4: 68fb ldr r3, [r7, #12] - 802c8e6: 681b ldr r3, [r3, #0] - 802c8e8: 69fa ldr r2, [r7, #28] - 802c8ea: f8c3 20b8 str.w r2, [r3, #184] ; 0xb8 - 802c8ee: e015 b.n 802c91c + 802c914: 68fb ldr r3, [r7, #12] + 802c916: 681b ldr r3, [r3, #0] + 802c918: 69fa ldr r2, [r7, #28] + 802c91a: f8c3 20b8 str.w r2, [r3, #184] ; 0xb8 + 802c91e: e015 b.n 802c94c } else /* Rx element is assigned to a dedicated Rx buffer */ { /* Clear the New Data flag of the current Rx buffer */ if (RxLocation < FDCAN_RX_BUFFER32) - 802c8f0: 68bb ldr r3, [r7, #8] - 802c8f2: 2b1f cmp r3, #31 - 802c8f4: d808 bhi.n 802c908 + 802c920: 68bb ldr r3, [r7, #8] + 802c922: 2b1f cmp r3, #31 + 802c924: d808 bhi.n 802c938 { hfdcan->Instance->NDAT1 = ((uint32_t)1 << RxLocation); - 802c8f6: 68fb ldr r3, [r7, #12] - 802c8f8: 681b ldr r3, [r3, #0] - 802c8fa: 2101 movs r1, #1 - 802c8fc: 68ba ldr r2, [r7, #8] - 802c8fe: fa01 f202 lsl.w r2, r1, r2 - 802c902: f8c3 2098 str.w r2, [r3, #152] ; 0x98 - 802c906: e009 b.n 802c91c + 802c926: 68fb ldr r3, [r7, #12] + 802c928: 681b ldr r3, [r3, #0] + 802c92a: 2101 movs r1, #1 + 802c92c: 68ba ldr r2, [r7, #8] + 802c92e: fa01 f202 lsl.w r2, r1, r2 + 802c932: f8c3 2098 str.w r2, [r3, #152] ; 0x98 + 802c936: e009 b.n 802c94c } else /* FDCAN_RX_BUFFER32 <= RxLocation <= FDCAN_RX_BUFFER63 */ { hfdcan->Instance->NDAT2 = ((uint32_t)1 << (RxLocation & 0x1FU)); - 802c908: 68bb ldr r3, [r7, #8] - 802c90a: f003 021f and.w r2, r3, #31 - 802c90e: 68fb ldr r3, [r7, #12] - 802c910: 681b ldr r3, [r3, #0] - 802c912: 2101 movs r1, #1 - 802c914: fa01 f202 lsl.w r2, r1, r2 - 802c918: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c938: 68bb ldr r3, [r7, #8] + 802c93a: f003 021f and.w r2, r3, #31 + 802c93e: 68fb ldr r3, [r7, #12] + 802c940: 681b ldr r3, [r3, #0] + 802c942: 2101 movs r1, #1 + 802c944: fa01 f202 lsl.w r2, r1, r2 + 802c948: f8c3 209c str.w r2, [r3, #156] ; 0x9c } } /* Return function status */ return HAL_OK; - 802c91c: 2300 movs r3, #0 - 802c91e: e008 b.n 802c932 + 802c94c: 2300 movs r3, #0 + 802c94e: e008 b.n 802c962 } else { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_NOT_STARTED; - 802c920: 68fb ldr r3, [r7, #12] - 802c922: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c926: f043 0208 orr.w r2, r3, #8 - 802c92a: 68fb ldr r3, [r7, #12] - 802c92c: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c950: 68fb ldr r3, [r7, #12] + 802c952: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c956: f043 0208 orr.w r2, r3, #8 + 802c95a: 68fb ldr r3, [r7, #12] + 802c95c: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c930: 2301 movs r3, #1 + 802c960: 2301 movs r3, #1 } } - 802c932: 4618 mov r0, r3 - 802c934: 372c adds r7, #44 ; 0x2c - 802c936: 46bd mov sp, r7 - 802c938: f85d 7b04 ldr.w r7, [sp], #4 - 802c93c: 4770 bx lr - 802c93e: bf00 nop - 802c940: 08044cbc .word 0x08044cbc + 802c962: 4618 mov r0, r3 + 802c964: 372c adds r7, #44 ; 0x2c + 802c966: 46bd mov sp, r7 + 802c968: f85d 7b04 ldr.w r7, [sp], #4 + 802c96c: 4770 bx lr + 802c96e: bf00 nop + 802c970: 08044cec .word 0x08044cec -0802c944 : +0802c974 : * - FDCAN_IT_TX_COMPLETE * - FDCAN_IT_TX_ABORT_COMPLETE * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_ActivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t ActiveITs, uint32_t BufferIndexes) { - 802c944: b480 push {r7} - 802c946: b087 sub sp, #28 - 802c948: af00 add r7, sp, #0 - 802c94a: 60f8 str r0, [r7, #12] - 802c94c: 60b9 str r1, [r7, #8] - 802c94e: 607a str r2, [r7, #4] + 802c974: b480 push {r7} + 802c976: b087 sub sp, #28 + 802c978: af00 add r7, sp, #0 + 802c97a: 60f8 str r0, [r7, #12] + 802c97c: 60b9 str r1, [r7, #8] + 802c97e: 607a str r2, [r7, #4] HAL_FDCAN_StateTypeDef state = hfdcan->State; - 802c950: 68fb ldr r3, [r7, #12] - 802c952: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c956: 75fb strb r3, [r7, #23] + 802c980: 68fb ldr r3, [r7, #12] + 802c982: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802c986: 75fb strb r3, [r7, #23] /* Check function parameters */ assert_param(IS_FDCAN_IT(ActiveITs)); if ((state == HAL_FDCAN_STATE_READY) || (state == HAL_FDCAN_STATE_BUSY)) - 802c958: 7dfb ldrb r3, [r7, #23] - 802c95a: 2b01 cmp r3, #1 - 802c95c: d002 beq.n 802c964 - 802c95e: 7dfb ldrb r3, [r7, #23] - 802c960: 2b02 cmp r3, #2 - 802c962: d155 bne.n 802ca10 + 802c988: 7dfb ldrb r3, [r7, #23] + 802c98a: 2b01 cmp r3, #1 + 802c98c: d002 beq.n 802c994 + 802c98e: 7dfb ldrb r3, [r7, #23] + 802c990: 2b02 cmp r3, #2 + 802c992: d155 bne.n 802ca40 { /* Enable Interrupt lines */ if ((ActiveITs & hfdcan->Instance->ILS) == 0U) - 802c964: 68fb ldr r3, [r7, #12] - 802c966: 681b ldr r3, [r3, #0] - 802c968: 6d9a ldr r2, [r3, #88] ; 0x58 - 802c96a: 68bb ldr r3, [r7, #8] - 802c96c: 4013 ands r3, r2 - 802c96e: 2b00 cmp r3, #0 - 802c970: d108 bne.n 802c984 + 802c994: 68fb ldr r3, [r7, #12] + 802c996: 681b ldr r3, [r3, #0] + 802c998: 6d9a ldr r2, [r3, #88] ; 0x58 + 802c99a: 68bb ldr r3, [r7, #8] + 802c99c: 4013 ands r3, r2 + 802c99e: 2b00 cmp r3, #0 + 802c9a0: d108 bne.n 802c9b4 { /* Enable Interrupt line 0 */ SET_BIT(hfdcan->Instance->ILE, FDCAN_INTERRUPT_LINE0); - 802c972: 68fb ldr r3, [r7, #12] - 802c974: 681b ldr r3, [r3, #0] - 802c976: 6dda ldr r2, [r3, #92] ; 0x5c - 802c978: 68fb ldr r3, [r7, #12] - 802c97a: 681b ldr r3, [r3, #0] - 802c97c: f042 0201 orr.w r2, r2, #1 - 802c980: 65da str r2, [r3, #92] ; 0x5c - 802c982: e014 b.n 802c9ae + 802c9a2: 68fb ldr r3, [r7, #12] + 802c9a4: 681b ldr r3, [r3, #0] + 802c9a6: 6dda ldr r2, [r3, #92] ; 0x5c + 802c9a8: 68fb ldr r3, [r7, #12] + 802c9aa: 681b ldr r3, [r3, #0] + 802c9ac: f042 0201 orr.w r2, r2, #1 + 802c9b0: 65da str r2, [r3, #92] ; 0x5c + 802c9b2: e014 b.n 802c9de } else if ((ActiveITs & hfdcan->Instance->ILS) == ActiveITs) - 802c984: 68fb ldr r3, [r7, #12] - 802c986: 681b ldr r3, [r3, #0] - 802c988: 6d9a ldr r2, [r3, #88] ; 0x58 - 802c98a: 68bb ldr r3, [r7, #8] - 802c98c: 4013 ands r3, r2 - 802c98e: 68ba ldr r2, [r7, #8] - 802c990: 429a cmp r2, r3 - 802c992: d108 bne.n 802c9a6 + 802c9b4: 68fb ldr r3, [r7, #12] + 802c9b6: 681b ldr r3, [r3, #0] + 802c9b8: 6d9a ldr r2, [r3, #88] ; 0x58 + 802c9ba: 68bb ldr r3, [r7, #8] + 802c9bc: 4013 ands r3, r2 + 802c9be: 68ba ldr r2, [r7, #8] + 802c9c0: 429a cmp r2, r3 + 802c9c2: d108 bne.n 802c9d6 { /* Enable Interrupt line 1 */ SET_BIT(hfdcan->Instance->ILE, FDCAN_INTERRUPT_LINE1); - 802c994: 68fb ldr r3, [r7, #12] - 802c996: 681b ldr r3, [r3, #0] - 802c998: 6dda ldr r2, [r3, #92] ; 0x5c - 802c99a: 68fb ldr r3, [r7, #12] - 802c99c: 681b ldr r3, [r3, #0] - 802c99e: f042 0202 orr.w r2, r2, #2 - 802c9a2: 65da str r2, [r3, #92] ; 0x5c - 802c9a4: e003 b.n 802c9ae + 802c9c4: 68fb ldr r3, [r7, #12] + 802c9c6: 681b ldr r3, [r3, #0] + 802c9c8: 6dda ldr r2, [r3, #92] ; 0x5c + 802c9ca: 68fb ldr r3, [r7, #12] + 802c9cc: 681b ldr r3, [r3, #0] + 802c9ce: f042 0202 orr.w r2, r2, #2 + 802c9d2: 65da str r2, [r3, #92] ; 0x5c + 802c9d4: e003 b.n 802c9de } else { /* Enable Interrupt lines 0 and 1 */ hfdcan->Instance->ILE = (FDCAN_INTERRUPT_LINE0 | FDCAN_INTERRUPT_LINE1); - 802c9a6: 68fb ldr r3, [r7, #12] - 802c9a8: 681b ldr r3, [r3, #0] - 802c9aa: 2203 movs r2, #3 - 802c9ac: 65da str r2, [r3, #92] ; 0x5c + 802c9d6: 68fb ldr r3, [r7, #12] + 802c9d8: 681b ldr r3, [r3, #0] + 802c9da: 2203 movs r2, #3 + 802c9dc: 65da str r2, [r3, #92] ; 0x5c } if ((ActiveITs & FDCAN_IT_TX_COMPLETE) != 0U) - 802c9ae: 68bb ldr r3, [r7, #8] - 802c9b0: f403 7300 and.w r3, r3, #512 ; 0x200 - 802c9b4: 2b00 cmp r3, #0 - 802c9b6: d009 beq.n 802c9cc + 802c9de: 68bb ldr r3, [r7, #8] + 802c9e0: f403 7300 and.w r3, r3, #512 ; 0x200 + 802c9e4: 2b00 cmp r3, #0 + 802c9e6: d009 beq.n 802c9fc { /* Enable Tx Buffer Transmission Interrupt to set TC flag in IR register, but interrupt will only occur if TC is enabled in IE register */ SET_BIT(hfdcan->Instance->TXBTIE, BufferIndexes); - 802c9b8: 68fb ldr r3, [r7, #12] - 802c9ba: 681b ldr r3, [r3, #0] - 802c9bc: f8d3 10e0 ldr.w r1, [r3, #224] ; 0xe0 - 802c9c0: 68fb ldr r3, [r7, #12] - 802c9c2: 681b ldr r3, [r3, #0] - 802c9c4: 687a ldr r2, [r7, #4] - 802c9c6: 430a orrs r2, r1 - 802c9c8: f8c3 20e0 str.w r2, [r3, #224] ; 0xe0 + 802c9e8: 68fb ldr r3, [r7, #12] + 802c9ea: 681b ldr r3, [r3, #0] + 802c9ec: f8d3 10e0 ldr.w r1, [r3, #224] ; 0xe0 + 802c9f0: 68fb ldr r3, [r7, #12] + 802c9f2: 681b ldr r3, [r3, #0] + 802c9f4: 687a ldr r2, [r7, #4] + 802c9f6: 430a orrs r2, r1 + 802c9f8: f8c3 20e0 str.w r2, [r3, #224] ; 0xe0 } if ((ActiveITs & FDCAN_IT_TX_ABORT_COMPLETE) != 0U) - 802c9cc: 68bb ldr r3, [r7, #8] - 802c9ce: f403 6380 and.w r3, r3, #1024 ; 0x400 - 802c9d2: 2b00 cmp r3, #0 - 802c9d4: d009 beq.n 802c9ea + 802c9fc: 68bb ldr r3, [r7, #8] + 802c9fe: f403 6380 and.w r3, r3, #1024 ; 0x400 + 802ca02: 2b00 cmp r3, #0 + 802ca04: d009 beq.n 802ca1a { /* Enable Tx Buffer Cancellation Finished Interrupt to set TCF flag in IR register, but interrupt will only occur if TCF is enabled in IE register */ SET_BIT(hfdcan->Instance->TXBCIE, BufferIndexes); - 802c9d6: 68fb ldr r3, [r7, #12] - 802c9d8: 681b ldr r3, [r3, #0] - 802c9da: f8d3 10e4 ldr.w r1, [r3, #228] ; 0xe4 - 802c9de: 68fb ldr r3, [r7, #12] - 802c9e0: 681b ldr r3, [r3, #0] - 802c9e2: 687a ldr r2, [r7, #4] - 802c9e4: 430a orrs r2, r1 - 802c9e6: f8c3 20e4 str.w r2, [r3, #228] ; 0xe4 + 802ca06: 68fb ldr r3, [r7, #12] + 802ca08: 681b ldr r3, [r3, #0] + 802ca0a: f8d3 10e4 ldr.w r1, [r3, #228] ; 0xe4 + 802ca0e: 68fb ldr r3, [r7, #12] + 802ca10: 681b ldr r3, [r3, #0] + 802ca12: 687a ldr r2, [r7, #4] + 802ca14: 430a orrs r2, r1 + 802ca16: f8c3 20e4 str.w r2, [r3, #228] ; 0xe4 } /* Enable the selected interrupts */ __HAL_FDCAN_ENABLE_IT(hfdcan, ActiveITs); - 802c9ea: 68fb ldr r3, [r7, #12] - 802c9ec: 681b ldr r3, [r3, #0] - 802c9ee: 6d59 ldr r1, [r3, #84] ; 0x54 - 802c9f0: 68ba ldr r2, [r7, #8] - 802c9f2: 4b0f ldr r3, [pc, #60] ; (802ca30 ) - 802c9f4: 4013 ands r3, r2 - 802c9f6: 68fa ldr r2, [r7, #12] - 802c9f8: 6812 ldr r2, [r2, #0] - 802c9fa: 430b orrs r3, r1 - 802c9fc: 6553 str r3, [r2, #84] ; 0x54 - 802c9fe: 4b0d ldr r3, [pc, #52] ; (802ca34 ) - 802ca00: 695a ldr r2, [r3, #20] - 802ca02: 68bb ldr r3, [r7, #8] - 802ca04: 0f9b lsrs r3, r3, #30 - 802ca06: 490b ldr r1, [pc, #44] ; (802ca34 ) - 802ca08: 4313 orrs r3, r2 - 802ca0a: 614b str r3, [r1, #20] + 802ca1a: 68fb ldr r3, [r7, #12] + 802ca1c: 681b ldr r3, [r3, #0] + 802ca1e: 6d59 ldr r1, [r3, #84] ; 0x54 + 802ca20: 68ba ldr r2, [r7, #8] + 802ca22: 4b0f ldr r3, [pc, #60] ; (802ca60 ) + 802ca24: 4013 ands r3, r2 + 802ca26: 68fa ldr r2, [r7, #12] + 802ca28: 6812 ldr r2, [r2, #0] + 802ca2a: 430b orrs r3, r1 + 802ca2c: 6553 str r3, [r2, #84] ; 0x54 + 802ca2e: 4b0d ldr r3, [pc, #52] ; (802ca64 ) + 802ca30: 695a ldr r2, [r3, #20] + 802ca32: 68bb ldr r3, [r7, #8] + 802ca34: 0f9b lsrs r3, r3, #30 + 802ca36: 490b ldr r1, [pc, #44] ; (802ca64 ) + 802ca38: 4313 orrs r3, r2 + 802ca3a: 614b str r3, [r1, #20] /* Return function status */ return HAL_OK; - 802ca0c: 2300 movs r3, #0 - 802ca0e: e008 b.n 802ca22 + 802ca3c: 2300 movs r3, #0 + 802ca3e: e008 b.n 802ca52 } else { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_NOT_INITIALIZED; - 802ca10: 68fb ldr r3, [r7, #12] - 802ca12: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802ca16: f043 0202 orr.w r2, r3, #2 - 802ca1a: 68fb ldr r3, [r7, #12] - 802ca1c: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802ca40: 68fb ldr r3, [r7, #12] + 802ca42: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802ca46: f043 0202 orr.w r2, r3, #2 + 802ca4a: 68fb ldr r3, [r7, #12] + 802ca4c: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802ca20: 2301 movs r3, #1 + 802ca50: 2301 movs r3, #1 } } - 802ca22: 4618 mov r0, r3 - 802ca24: 371c adds r7, #28 - 802ca26: 46bd mov sp, r7 - 802ca28: f85d 7b04 ldr.w r7, [sp], #4 - 802ca2c: 4770 bx lr - 802ca2e: bf00 nop - 802ca30: 3fcfffff .word 0x3fcfffff - 802ca34: 4000a800 .word 0x4000a800 + 802ca52: 4618 mov r0, r3 + 802ca54: 371c adds r7, #28 + 802ca56: 46bd mov sp, r7 + 802ca58: f85d 7b04 ldr.w r7, [sp], #4 + 802ca5c: 4770 bx lr + 802ca5e: bf00 nop + 802ca60: 3fcfffff .word 0x3fcfffff + 802ca64: 4000a800 .word 0x4000a800 -0802ca38 : +0802ca68 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval HAL status */ void HAL_FDCAN_IRQHandler(FDCAN_HandleTypeDef *hfdcan) { - 802ca38: b580 push {r7, lr} - 802ca3a: b096 sub sp, #88 ; 0x58 - 802ca3c: af00 add r7, sp, #0 - 802ca3e: 6078 str r0, [r7, #4] + 802ca68: b580 push {r7, lr} + 802ca6a: b096 sub sp, #88 ; 0x58 + 802ca6c: af00 add r7, sp, #0 + 802ca6e: 6078 str r0, [r7, #4] uint32_t itsourceIE; uint32_t itsourceTTIE; uint32_t itflagIR; uint32_t itflagTTIR; ClkCalibrationITs = (FDCAN_CCU->IR << 30); - 802ca40: 4b9a ldr r3, [pc, #616] ; (802ccac ) - 802ca42: 691b ldr r3, [r3, #16] - 802ca44: 079b lsls r3, r3, #30 - 802ca46: 657b str r3, [r7, #84] ; 0x54 + 802ca70: 4b9a ldr r3, [pc, #616] ; (802ccdc ) + 802ca72: 691b ldr r3, [r3, #16] + 802ca74: 079b lsls r3, r3, #30 + 802ca76: 657b str r3, [r7, #84] ; 0x54 ClkCalibrationITs &= (FDCAN_CCU->IE << 30); - 802ca48: 4b98 ldr r3, [pc, #608] ; (802ccac ) - 802ca4a: 695b ldr r3, [r3, #20] - 802ca4c: 079b lsls r3, r3, #30 - 802ca4e: 6d7a ldr r2, [r7, #84] ; 0x54 - 802ca50: 4013 ands r3, r2 - 802ca52: 657b str r3, [r7, #84] ; 0x54 - TxEventFifoITs = hfdcan->Instance->IR & FDCAN_TX_EVENT_FIFO_MASK; - 802ca54: 687b ldr r3, [r7, #4] - 802ca56: 681b ldr r3, [r3, #0] - 802ca58: 6d1b ldr r3, [r3, #80] ; 0x50 - 802ca5a: f403 4370 and.w r3, r3, #61440 ; 0xf000 - 802ca5e: 653b str r3, [r7, #80] ; 0x50 - TxEventFifoITs &= hfdcan->Instance->IE; - 802ca60: 687b ldr r3, [r7, #4] - 802ca62: 681b ldr r3, [r3, #0] - 802ca64: 6d5b ldr r3, [r3, #84] ; 0x54 - 802ca66: 6d3a ldr r2, [r7, #80] ; 0x50 - 802ca68: 4013 ands r3, r2 - 802ca6a: 653b str r3, [r7, #80] ; 0x50 - RxFifo0ITs = hfdcan->Instance->IR & FDCAN_RX_FIFO0_MASK; - 802ca6c: 687b ldr r3, [r7, #4] - 802ca6e: 681b ldr r3, [r3, #0] - 802ca70: 6d1b ldr r3, [r3, #80] ; 0x50 - 802ca72: f003 030f and.w r3, r3, #15 - 802ca76: 64fb str r3, [r7, #76] ; 0x4c - RxFifo0ITs &= hfdcan->Instance->IE; - 802ca78: 687b ldr r3, [r7, #4] - 802ca7a: 681b ldr r3, [r3, #0] - 802ca7c: 6d5b ldr r3, [r3, #84] ; 0x54 - 802ca7e: 6cfa ldr r2, [r7, #76] ; 0x4c + 802ca78: 4b98 ldr r3, [pc, #608] ; (802ccdc ) + 802ca7a: 695b ldr r3, [r3, #20] + 802ca7c: 079b lsls r3, r3, #30 + 802ca7e: 6d7a ldr r2, [r7, #84] ; 0x54 802ca80: 4013 ands r3, r2 - 802ca82: 64fb str r3, [r7, #76] ; 0x4c - RxFifo1ITs = hfdcan->Instance->IR & FDCAN_RX_FIFO1_MASK; + 802ca82: 657b str r3, [r7, #84] ; 0x54 + TxEventFifoITs = hfdcan->Instance->IR & FDCAN_TX_EVENT_FIFO_MASK; 802ca84: 687b ldr r3, [r7, #4] 802ca86: 681b ldr r3, [r3, #0] 802ca88: 6d1b ldr r3, [r3, #80] ; 0x50 - 802ca8a: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 802ca8e: 64bb str r3, [r7, #72] ; 0x48 - RxFifo1ITs &= hfdcan->Instance->IE; + 802ca8a: f403 4370 and.w r3, r3, #61440 ; 0xf000 + 802ca8e: 653b str r3, [r7, #80] ; 0x50 + TxEventFifoITs &= hfdcan->Instance->IE; 802ca90: 687b ldr r3, [r7, #4] 802ca92: 681b ldr r3, [r3, #0] 802ca94: 6d5b ldr r3, [r3, #84] ; 0x54 - 802ca96: 6cba ldr r2, [r7, #72] ; 0x48 + 802ca96: 6d3a ldr r2, [r7, #80] ; 0x50 802ca98: 4013 ands r3, r2 - 802ca9a: 64bb str r3, [r7, #72] ; 0x48 - Errors = hfdcan->Instance->IR & FDCAN_ERROR_MASK; + 802ca9a: 653b str r3, [r7, #80] ; 0x50 + RxFifo0ITs = hfdcan->Instance->IR & FDCAN_RX_FIFO0_MASK; 802ca9c: 687b ldr r3, [r7, #4] 802ca9e: 681b ldr r3, [r3, #0] 802caa0: 6d1b ldr r3, [r3, #80] ; 0x50 - 802caa2: f003 5371 and.w r3, r3, #1010827264 ; 0x3c400000 - 802caa6: 647b str r3, [r7, #68] ; 0x44 - Errors &= hfdcan->Instance->IE; + 802caa2: f003 030f and.w r3, r3, #15 + 802caa6: 64fb str r3, [r7, #76] ; 0x4c + RxFifo0ITs &= hfdcan->Instance->IE; 802caa8: 687b ldr r3, [r7, #4] 802caaa: 681b ldr r3, [r3, #0] 802caac: 6d5b ldr r3, [r3, #84] ; 0x54 - 802caae: 6c7a ldr r2, [r7, #68] ; 0x44 + 802caae: 6cfa ldr r2, [r7, #76] ; 0x4c 802cab0: 4013 ands r3, r2 - 802cab2: 647b str r3, [r7, #68] ; 0x44 - ErrorStatusITs = hfdcan->Instance->IR & FDCAN_ERROR_STATUS_MASK; + 802cab2: 64fb str r3, [r7, #76] ; 0x4c + RxFifo1ITs = hfdcan->Instance->IR & FDCAN_RX_FIFO1_MASK; 802cab4: 687b ldr r3, [r7, #4] 802cab6: 681b ldr r3, [r3, #0] 802cab8: 6d1b ldr r3, [r3, #80] ; 0x50 - 802caba: f003 7360 and.w r3, r3, #58720256 ; 0x3800000 - 802cabe: 643b str r3, [r7, #64] ; 0x40 - ErrorStatusITs &= hfdcan->Instance->IE; + 802caba: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 802cabe: 64bb str r3, [r7, #72] ; 0x48 + RxFifo1ITs &= hfdcan->Instance->IE; 802cac0: 687b ldr r3, [r7, #4] 802cac2: 681b ldr r3, [r3, #0] 802cac4: 6d5b ldr r3, [r3, #84] ; 0x54 - 802cac6: 6c3a ldr r2, [r7, #64] ; 0x40 + 802cac6: 6cba ldr r2, [r7, #72] ; 0x48 802cac8: 4013 ands r3, r2 - 802caca: 643b str r3, [r7, #64] ; 0x40 - itsourceIE = hfdcan->Instance->IE; + 802caca: 64bb str r3, [r7, #72] ; 0x48 + Errors = hfdcan->Instance->IR & FDCAN_ERROR_MASK; 802cacc: 687b ldr r3, [r7, #4] 802cace: 681b ldr r3, [r3, #0] - 802cad0: 6d5b ldr r3, [r3, #84] ; 0x54 - 802cad2: 63fb str r3, [r7, #60] ; 0x3c + 802cad0: 6d1b ldr r3, [r3, #80] ; 0x50 + 802cad2: f003 5371 and.w r3, r3, #1010827264 ; 0x3c400000 + 802cad6: 647b str r3, [r7, #68] ; 0x44 + Errors &= hfdcan->Instance->IE; + 802cad8: 687b ldr r3, [r7, #4] + 802cada: 681b ldr r3, [r3, #0] + 802cadc: 6d5b ldr r3, [r3, #84] ; 0x54 + 802cade: 6c7a ldr r2, [r7, #68] ; 0x44 + 802cae0: 4013 ands r3, r2 + 802cae2: 647b str r3, [r7, #68] ; 0x44 + ErrorStatusITs = hfdcan->Instance->IR & FDCAN_ERROR_STATUS_MASK; + 802cae4: 687b ldr r3, [r7, #4] + 802cae6: 681b ldr r3, [r3, #0] + 802cae8: 6d1b ldr r3, [r3, #80] ; 0x50 + 802caea: f003 7360 and.w r3, r3, #58720256 ; 0x3800000 + 802caee: 643b str r3, [r7, #64] ; 0x40 + ErrorStatusITs &= hfdcan->Instance->IE; + 802caf0: 687b ldr r3, [r7, #4] + 802caf2: 681b ldr r3, [r3, #0] + 802caf4: 6d5b ldr r3, [r3, #84] ; 0x54 + 802caf6: 6c3a ldr r2, [r7, #64] ; 0x40 + 802caf8: 4013 ands r3, r2 + 802cafa: 643b str r3, [r7, #64] ; 0x40 + itsourceIE = hfdcan->Instance->IE; + 802cafc: 687b ldr r3, [r7, #4] + 802cafe: 681b ldr r3, [r3, #0] + 802cb00: 6d5b ldr r3, [r3, #84] ; 0x54 + 802cb02: 63fb str r3, [r7, #60] ; 0x3c itflagIR = hfdcan->Instance->IR; - 802cad4: 687b ldr r3, [r7, #4] - 802cad6: 681b ldr r3, [r3, #0] - 802cad8: 6d1b ldr r3, [r3, #80] ; 0x50 - 802cada: 63bb str r3, [r7, #56] ; 0x38 + 802cb04: 687b ldr r3, [r7, #4] + 802cb06: 681b ldr r3, [r3, #0] + 802cb08: 6d1b ldr r3, [r3, #80] ; 0x50 + 802cb0a: 63bb str r3, [r7, #56] ; 0x38 /* High Priority Message interrupt management *******************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_RX_HIGH_PRIORITY_MSG) != RESET) - 802cadc: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cade: 0a1b lsrs r3, r3, #8 - 802cae0: f003 0301 and.w r3, r3, #1 - 802cae4: 2b00 cmp r3, #0 - 802cae6: d010 beq.n 802cb0a + 802cb0c: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cb0e: 0a1b lsrs r3, r3, #8 + 802cb10: f003 0301 and.w r3, r3, #1 + 802cb14: 2b00 cmp r3, #0 + 802cb16: d010 beq.n 802cb3a { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_RX_HIGH_PRIORITY_MSG) != RESET) - 802cae8: 6bbb ldr r3, [r7, #56] ; 0x38 - 802caea: 0a1b lsrs r3, r3, #8 - 802caec: f003 0301 and.w r3, r3, #1 - 802caf0: 2b00 cmp r3, #0 - 802caf2: d00a beq.n 802cb0a + 802cb18: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cb1a: 0a1b lsrs r3, r3, #8 + 802cb1c: f003 0301 and.w r3, r3, #1 + 802cb20: 2b00 cmp r3, #0 + 802cb22: d00a beq.n 802cb3a { /* Clear the High Priority Message flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_RX_HIGH_PRIORITY_MSG); - 802caf4: 687b ldr r3, [r7, #4] - 802caf6: 681b ldr r3, [r3, #0] - 802caf8: f44f 7280 mov.w r2, #256 ; 0x100 - 802cafc: 651a str r2, [r3, #80] ; 0x50 - 802cafe: 4b6b ldr r3, [pc, #428] ; (802ccac ) - 802cb00: 2200 movs r2, #0 - 802cb02: 611a str r2, [r3, #16] + 802cb24: 687b ldr r3, [r7, #4] + 802cb26: 681b ldr r3, [r3, #0] + 802cb28: f44f 7280 mov.w r2, #256 ; 0x100 + 802cb2c: 651a str r2, [r3, #80] ; 0x50 + 802cb2e: 4b6b ldr r3, [pc, #428] ; (802ccdc ) + 802cb30: 2200 movs r2, #0 + 802cb32: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->HighPriorityMessageCallback(hfdcan); #else /* High Priority Message Callback */ HAL_FDCAN_HighPriorityMessageCallback(hfdcan); - 802cb04: 6878 ldr r0, [r7, #4] - 802cb06: f000 fa54 bl 802cfb2 + 802cb34: 6878 ldr r0, [r7, #4] + 802cb36: f000 fa54 bl 802cfe2 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Transmission Abort interrupt management **********************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TX_ABORT_COMPLETE) != RESET) - 802cb0a: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cb0c: 0a9b lsrs r3, r3, #10 - 802cb0e: f003 0301 and.w r3, r3, #1 - 802cb12: 2b00 cmp r3, #0 - 802cb14: d01d beq.n 802cb52 + 802cb3a: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cb3c: 0a9b lsrs r3, r3, #10 + 802cb3e: f003 0301 and.w r3, r3, #1 + 802cb42: 2b00 cmp r3, #0 + 802cb44: d01d beq.n 802cb82 { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TX_ABORT_COMPLETE) != RESET) - 802cb16: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cb18: 0a9b lsrs r3, r3, #10 - 802cb1a: f003 0301 and.w r3, r3, #1 - 802cb1e: 2b00 cmp r3, #0 - 802cb20: d017 beq.n 802cb52 + 802cb46: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cb48: 0a9b lsrs r3, r3, #10 + 802cb4a: f003 0301 and.w r3, r3, #1 + 802cb4e: 2b00 cmp r3, #0 + 802cb50: d017 beq.n 802cb82 { /* List of aborted monitored buffers */ AbortedBuffers = hfdcan->Instance->TXBCF; - 802cb22: 687b ldr r3, [r7, #4] - 802cb24: 681b ldr r3, [r3, #0] - 802cb26: f8d3 30dc ldr.w r3, [r3, #220] ; 0xdc - 802cb2a: 637b str r3, [r7, #52] ; 0x34 + 802cb52: 687b ldr r3, [r7, #4] + 802cb54: 681b ldr r3, [r3, #0] + 802cb56: f8d3 30dc ldr.w r3, [r3, #220] ; 0xdc + 802cb5a: 637b str r3, [r7, #52] ; 0x34 AbortedBuffers &= hfdcan->Instance->TXBCIE; - 802cb2c: 687b ldr r3, [r7, #4] - 802cb2e: 681b ldr r3, [r3, #0] - 802cb30: f8d3 30e4 ldr.w r3, [r3, #228] ; 0xe4 - 802cb34: 6b7a ldr r2, [r7, #52] ; 0x34 - 802cb36: 4013 ands r3, r2 - 802cb38: 637b str r3, [r7, #52] ; 0x34 + 802cb5c: 687b ldr r3, [r7, #4] + 802cb5e: 681b ldr r3, [r3, #0] + 802cb60: f8d3 30e4 ldr.w r3, [r3, #228] ; 0xe4 + 802cb64: 6b7a ldr r2, [r7, #52] ; 0x34 + 802cb66: 4013 ands r3, r2 + 802cb68: 637b str r3, [r7, #52] ; 0x34 /* Clear the Transmission Cancellation flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TX_ABORT_COMPLETE); - 802cb3a: 687b ldr r3, [r7, #4] - 802cb3c: 681b ldr r3, [r3, #0] - 802cb3e: f44f 6280 mov.w r2, #1024 ; 0x400 - 802cb42: 651a str r2, [r3, #80] ; 0x50 - 802cb44: 4b59 ldr r3, [pc, #356] ; (802ccac ) - 802cb46: 2200 movs r2, #0 - 802cb48: 611a str r2, [r3, #16] + 802cb6a: 687b ldr r3, [r7, #4] + 802cb6c: 681b ldr r3, [r3, #0] + 802cb6e: f44f 6280 mov.w r2, #1024 ; 0x400 + 802cb72: 651a str r2, [r3, #80] ; 0x50 + 802cb74: 4b59 ldr r3, [pc, #356] ; (802ccdc ) + 802cb76: 2200 movs r2, #0 + 802cb78: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TxBufferAbortCallback(hfdcan, AbortedBuffers); #else /* Transmission Cancellation Callback */ HAL_FDCAN_TxBufferAbortCallback(hfdcan, AbortedBuffers); - 802cb4a: 6b79 ldr r1, [r7, #52] ; 0x34 - 802cb4c: 6878 ldr r0, [r7, #4] - 802cb4e: f000 fa07 bl 802cf60 + 802cb7a: 6b79 ldr r1, [r7, #52] ; 0x34 + 802cb7c: 6878 ldr r0, [r7, #4] + 802cb7e: f000 fa07 bl 802cf90 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Clock calibration unit interrupts management *****************************/ if (ClkCalibrationITs != 0U) - 802cb52: 6d7b ldr r3, [r7, #84] ; 0x54 - 802cb54: 2b00 cmp r3, #0 - 802cb56: d00d beq.n 802cb74 + 802cb82: 6d7b ldr r3, [r7, #84] ; 0x54 + 802cb84: 2b00 cmp r3, #0 + 802cb86: d00d beq.n 802cba4 { /* Clear the Clock Calibration flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, ClkCalibrationITs); - 802cb58: 687b ldr r3, [r7, #4] - 802cb5a: 681a ldr r2, [r3, #0] - 802cb5c: 6d79 ldr r1, [r7, #84] ; 0x54 - 802cb5e: 4b54 ldr r3, [pc, #336] ; (802ccb0 ) - 802cb60: 400b ands r3, r1 - 802cb62: 6513 str r3, [r2, #80] ; 0x50 - 802cb64: 4a51 ldr r2, [pc, #324] ; (802ccac ) - 802cb66: 6d7b ldr r3, [r7, #84] ; 0x54 - 802cb68: 0f9b lsrs r3, r3, #30 - 802cb6a: 6113 str r3, [r2, #16] + 802cb88: 687b ldr r3, [r7, #4] + 802cb8a: 681a ldr r2, [r3, #0] + 802cb8c: 6d79 ldr r1, [r7, #84] ; 0x54 + 802cb8e: 4b54 ldr r3, [pc, #336] ; (802cce0 ) + 802cb90: 400b ands r3, r1 + 802cb92: 6513 str r3, [r2, #80] ; 0x50 + 802cb94: 4a51 ldr r2, [pc, #324] ; (802ccdc ) + 802cb96: 6d7b ldr r3, [r7, #84] ; 0x54 + 802cb98: 0f9b lsrs r3, r3, #30 + 802cb9a: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->ClockCalibrationCallback(hfdcan, ClkCalibrationITs); #else /* Clock Calibration Callback */ HAL_FDCAN_ClockCalibrationCallback(hfdcan, ClkCalibrationITs); - 802cb6c: 6d79 ldr r1, [r7, #84] ; 0x54 - 802cb6e: 6878 ldr r0, [r7, #4] - 802cb70: f000 f9c0 bl 802cef4 + 802cb9c: 6d79 ldr r1, [r7, #84] ; 0x54 + 802cb9e: 6878 ldr r0, [r7, #4] + 802cba0: f000 f9c0 bl 802cf24 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Tx event FIFO interrupts management **************************************/ if (TxEventFifoITs != 0U) - 802cb74: 6d3b ldr r3, [r7, #80] ; 0x50 - 802cb76: 2b00 cmp r3, #0 - 802cb78: d00d beq.n 802cb96 + 802cba4: 6d3b ldr r3, [r7, #80] ; 0x50 + 802cba6: 2b00 cmp r3, #0 + 802cba8: d00d beq.n 802cbc6 { /* Clear the Tx Event FIFO flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, TxEventFifoITs); - 802cb7a: 687b ldr r3, [r7, #4] - 802cb7c: 681a ldr r2, [r3, #0] - 802cb7e: 6d39 ldr r1, [r7, #80] ; 0x50 - 802cb80: 4b4b ldr r3, [pc, #300] ; (802ccb0 ) - 802cb82: 400b ands r3, r1 - 802cb84: 6513 str r3, [r2, #80] ; 0x50 - 802cb86: 4a49 ldr r2, [pc, #292] ; (802ccac ) - 802cb88: 6d3b ldr r3, [r7, #80] ; 0x50 - 802cb8a: 0f9b lsrs r3, r3, #30 - 802cb8c: 6113 str r3, [r2, #16] + 802cbaa: 687b ldr r3, [r7, #4] + 802cbac: 681a ldr r2, [r3, #0] + 802cbae: 6d39 ldr r1, [r7, #80] ; 0x50 + 802cbb0: 4b4b ldr r3, [pc, #300] ; (802cce0 ) + 802cbb2: 400b ands r3, r1 + 802cbb4: 6513 str r3, [r2, #80] ; 0x50 + 802cbb6: 4a49 ldr r2, [pc, #292] ; (802ccdc ) + 802cbb8: 6d3b ldr r3, [r7, #80] ; 0x50 + 802cbba: 0f9b lsrs r3, r3, #30 + 802cbbc: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TxEventFifoCallback(hfdcan, TxEventFifoITs); #else /* Tx Event FIFO Callback */ HAL_FDCAN_TxEventFifoCallback(hfdcan, TxEventFifoITs); - 802cb8e: 6d39 ldr r1, [r7, #80] ; 0x50 - 802cb90: 6878 ldr r0, [r7, #4] - 802cb92: f000 f9ba bl 802cf0a + 802cbbe: 6d39 ldr r1, [r7, #80] ; 0x50 + 802cbc0: 6878 ldr r0, [r7, #4] + 802cbc2: f000 f9ba bl 802cf3a #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Rx FIFO 0 interrupts management ******************************************/ if (RxFifo0ITs != 0U) - 802cb96: 6cfb ldr r3, [r7, #76] ; 0x4c - 802cb98: 2b00 cmp r3, #0 - 802cb9a: d00d beq.n 802cbb8 + 802cbc6: 6cfb ldr r3, [r7, #76] ; 0x4c + 802cbc8: 2b00 cmp r3, #0 + 802cbca: d00d beq.n 802cbe8 { /* Clear the Rx FIFO 0 flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, RxFifo0ITs); - 802cb9c: 687b ldr r3, [r7, #4] - 802cb9e: 681a ldr r2, [r3, #0] - 802cba0: 6cf9 ldr r1, [r7, #76] ; 0x4c - 802cba2: 4b43 ldr r3, [pc, #268] ; (802ccb0 ) - 802cba4: 400b ands r3, r1 - 802cba6: 6513 str r3, [r2, #80] ; 0x50 - 802cba8: 4a40 ldr r2, [pc, #256] ; (802ccac ) - 802cbaa: 6cfb ldr r3, [r7, #76] ; 0x4c - 802cbac: 0f9b lsrs r3, r3, #30 - 802cbae: 6113 str r3, [r2, #16] + 802cbcc: 687b ldr r3, [r7, #4] + 802cbce: 681a ldr r2, [r3, #0] + 802cbd0: 6cf9 ldr r1, [r7, #76] ; 0x4c + 802cbd2: 4b43 ldr r3, [pc, #268] ; (802cce0 ) + 802cbd4: 400b ands r3, r1 + 802cbd6: 6513 str r3, [r2, #80] ; 0x50 + 802cbd8: 4a40 ldr r2, [pc, #256] ; (802ccdc ) + 802cbda: 6cfb ldr r3, [r7, #76] ; 0x4c + 802cbdc: 0f9b lsrs r3, r3, #30 + 802cbde: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->RxFifo0Callback(hfdcan, RxFifo0ITs); #else /* Rx FIFO 0 Callback */ HAL_FDCAN_RxFifo0Callback(hfdcan, RxFifo0ITs); - 802cbb0: 6cf9 ldr r1, [r7, #76] ; 0x4c - 802cbb2: 6878 ldr r0, [r7, #4] - 802cbb4: f7f4 f8c2 bl 8020d3c + 802cbe0: 6cf9 ldr r1, [r7, #76] ; 0x4c + 802cbe2: 6878 ldr r0, [r7, #4] + 802cbe4: f7f4 f8aa bl 8020d3c #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Rx FIFO 1 interrupts management ******************************************/ if (RxFifo1ITs != 0U) - 802cbb8: 6cbb ldr r3, [r7, #72] ; 0x48 - 802cbba: 2b00 cmp r3, #0 - 802cbbc: d00d beq.n 802cbda + 802cbe8: 6cbb ldr r3, [r7, #72] ; 0x48 + 802cbea: 2b00 cmp r3, #0 + 802cbec: d00d beq.n 802cc0a { /* Clear the Rx FIFO 1 flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, RxFifo1ITs); - 802cbbe: 687b ldr r3, [r7, #4] - 802cbc0: 681a ldr r2, [r3, #0] - 802cbc2: 6cb9 ldr r1, [r7, #72] ; 0x48 - 802cbc4: 4b3a ldr r3, [pc, #232] ; (802ccb0 ) - 802cbc6: 400b ands r3, r1 - 802cbc8: 6513 str r3, [r2, #80] ; 0x50 - 802cbca: 4a38 ldr r2, [pc, #224] ; (802ccac ) - 802cbcc: 6cbb ldr r3, [r7, #72] ; 0x48 - 802cbce: 0f9b lsrs r3, r3, #30 - 802cbd0: 6113 str r3, [r2, #16] + 802cbee: 687b ldr r3, [r7, #4] + 802cbf0: 681a ldr r2, [r3, #0] + 802cbf2: 6cb9 ldr r1, [r7, #72] ; 0x48 + 802cbf4: 4b3a ldr r3, [pc, #232] ; (802cce0 ) + 802cbf6: 400b ands r3, r1 + 802cbf8: 6513 str r3, [r2, #80] ; 0x50 + 802cbfa: 4a38 ldr r2, [pc, #224] ; (802ccdc ) + 802cbfc: 6cbb ldr r3, [r7, #72] ; 0x48 + 802cbfe: 0f9b lsrs r3, r3, #30 + 802cc00: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->RxFifo1Callback(hfdcan, RxFifo1ITs); #else /* Rx FIFO 1 Callback */ HAL_FDCAN_RxFifo1Callback(hfdcan, RxFifo1ITs); - 802cbd2: 6cb9 ldr r1, [r7, #72] ; 0x48 - 802cbd4: 6878 ldr r0, [r7, #4] - 802cbd6: f000 f9a3 bl 802cf20 + 802cc02: 6cb9 ldr r1, [r7, #72] ; 0x48 + 802cc04: 6878 ldr r0, [r7, #4] + 802cc06: f000 f9a3 bl 802cf50 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Tx FIFO empty interrupt management ***************************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TX_FIFO_EMPTY) != RESET) - 802cbda: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cbdc: 0adb lsrs r3, r3, #11 - 802cbde: f003 0301 and.w r3, r3, #1 - 802cbe2: 2b00 cmp r3, #0 - 802cbe4: d010 beq.n 802cc08 + 802cc0a: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cc0c: 0adb lsrs r3, r3, #11 + 802cc0e: f003 0301 and.w r3, r3, #1 + 802cc12: 2b00 cmp r3, #0 + 802cc14: d010 beq.n 802cc38 { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TX_FIFO_EMPTY) != RESET) - 802cbe6: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cbe8: 0adb lsrs r3, r3, #11 - 802cbea: f003 0301 and.w r3, r3, #1 - 802cbee: 2b00 cmp r3, #0 - 802cbf0: d00a beq.n 802cc08 + 802cc16: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cc18: 0adb lsrs r3, r3, #11 + 802cc1a: f003 0301 and.w r3, r3, #1 + 802cc1e: 2b00 cmp r3, #0 + 802cc20: d00a beq.n 802cc38 { /* Clear the Tx FIFO empty flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TX_FIFO_EMPTY); - 802cbf2: 687b ldr r3, [r7, #4] - 802cbf4: 681b ldr r3, [r3, #0] - 802cbf6: f44f 6200 mov.w r2, #2048 ; 0x800 - 802cbfa: 651a str r2, [r3, #80] ; 0x50 - 802cbfc: 4b2b ldr r3, [pc, #172] ; (802ccac ) - 802cbfe: 2200 movs r2, #0 - 802cc00: 611a str r2, [r3, #16] + 802cc22: 687b ldr r3, [r7, #4] + 802cc24: 681b ldr r3, [r3, #0] + 802cc26: f44f 6200 mov.w r2, #2048 ; 0x800 + 802cc2a: 651a str r2, [r3, #80] ; 0x50 + 802cc2c: 4b2b ldr r3, [pc, #172] ; (802ccdc ) + 802cc2e: 2200 movs r2, #0 + 802cc30: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TxFifoEmptyCallback(hfdcan); #else /* Tx FIFO empty Callback */ HAL_FDCAN_TxFifoEmptyCallback(hfdcan); - 802cc02: 6878 ldr r0, [r7, #4] - 802cc04: f000 f997 bl 802cf36 + 802cc32: 6878 ldr r0, [r7, #4] + 802cc34: f000 f997 bl 802cf66 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Transmission Complete interrupt management *******************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TX_COMPLETE) != RESET) - 802cc08: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cc0a: 0a5b lsrs r3, r3, #9 - 802cc0c: f003 0301 and.w r3, r3, #1 - 802cc10: 2b00 cmp r3, #0 - 802cc12: d01d beq.n 802cc50 + 802cc38: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cc3a: 0a5b lsrs r3, r3, #9 + 802cc3c: f003 0301 and.w r3, r3, #1 + 802cc40: 2b00 cmp r3, #0 + 802cc42: d01d beq.n 802cc80 { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TX_COMPLETE) != RESET) - 802cc14: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cc16: 0a5b lsrs r3, r3, #9 - 802cc18: f003 0301 and.w r3, r3, #1 - 802cc1c: 2b00 cmp r3, #0 - 802cc1e: d017 beq.n 802cc50 + 802cc44: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cc46: 0a5b lsrs r3, r3, #9 + 802cc48: f003 0301 and.w r3, r3, #1 + 802cc4c: 2b00 cmp r3, #0 + 802cc4e: d017 beq.n 802cc80 { /* List of transmitted monitored buffers */ TransmittedBuffers = hfdcan->Instance->TXBTO; - 802cc20: 687b ldr r3, [r7, #4] - 802cc22: 681b ldr r3, [r3, #0] - 802cc24: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 802cc28: 633b str r3, [r7, #48] ; 0x30 + 802cc50: 687b ldr r3, [r7, #4] + 802cc52: 681b ldr r3, [r3, #0] + 802cc54: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 802cc58: 633b str r3, [r7, #48] ; 0x30 TransmittedBuffers &= hfdcan->Instance->TXBTIE; - 802cc2a: 687b ldr r3, [r7, #4] - 802cc2c: 681b ldr r3, [r3, #0] - 802cc2e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 802cc32: 6b3a ldr r2, [r7, #48] ; 0x30 - 802cc34: 4013 ands r3, r2 - 802cc36: 633b str r3, [r7, #48] ; 0x30 + 802cc5a: 687b ldr r3, [r7, #4] + 802cc5c: 681b ldr r3, [r3, #0] + 802cc5e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 802cc62: 6b3a ldr r2, [r7, #48] ; 0x30 + 802cc64: 4013 ands r3, r2 + 802cc66: 633b str r3, [r7, #48] ; 0x30 /* Clear the Transmission Complete flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TX_COMPLETE); - 802cc38: 687b ldr r3, [r7, #4] - 802cc3a: 681b ldr r3, [r3, #0] - 802cc3c: f44f 7200 mov.w r2, #512 ; 0x200 - 802cc40: 651a str r2, [r3, #80] ; 0x50 - 802cc42: 4b1a ldr r3, [pc, #104] ; (802ccac ) - 802cc44: 2200 movs r2, #0 - 802cc46: 611a str r2, [r3, #16] + 802cc68: 687b ldr r3, [r7, #4] + 802cc6a: 681b ldr r3, [r3, #0] + 802cc6c: f44f 7200 mov.w r2, #512 ; 0x200 + 802cc70: 651a str r2, [r3, #80] ; 0x50 + 802cc72: 4b1a ldr r3, [pc, #104] ; (802ccdc ) + 802cc74: 2200 movs r2, #0 + 802cc76: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TxBufferCompleteCallback(hfdcan, TransmittedBuffers); #else /* Transmission Complete Callback */ HAL_FDCAN_TxBufferCompleteCallback(hfdcan, TransmittedBuffers); - 802cc48: 6b39 ldr r1, [r7, #48] ; 0x30 - 802cc4a: 6878 ldr r0, [r7, #4] - 802cc4c: f000 f97d bl 802cf4a + 802cc78: 6b39 ldr r1, [r7, #48] ; 0x30 + 802cc7a: 6878 ldr r0, [r7, #4] + 802cc7c: f000 f97d bl 802cf7a #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Rx Buffer New Message interrupt management *******************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_RX_BUFFER_NEW_MESSAGE) != RESET) - 802cc50: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cc52: 0cdb lsrs r3, r3, #19 - 802cc54: f003 0301 and.w r3, r3, #1 - 802cc58: 2b00 cmp r3, #0 - 802cc5a: d010 beq.n 802cc7e + 802cc80: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cc82: 0cdb lsrs r3, r3, #19 + 802cc84: f003 0301 and.w r3, r3, #1 + 802cc88: 2b00 cmp r3, #0 + 802cc8a: d010 beq.n 802ccae { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_RX_BUFFER_NEW_MESSAGE) != RESET) - 802cc5c: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cc5e: 0cdb lsrs r3, r3, #19 - 802cc60: f003 0301 and.w r3, r3, #1 - 802cc64: 2b00 cmp r3, #0 - 802cc66: d00a beq.n 802cc7e + 802cc8c: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cc8e: 0cdb lsrs r3, r3, #19 + 802cc90: f003 0301 and.w r3, r3, #1 + 802cc94: 2b00 cmp r3, #0 + 802cc96: d00a beq.n 802ccae { /* Clear the Rx Buffer New Message flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_RX_BUFFER_NEW_MESSAGE); - 802cc68: 687b ldr r3, [r7, #4] - 802cc6a: 681b ldr r3, [r3, #0] - 802cc6c: f44f 2200 mov.w r2, #524288 ; 0x80000 - 802cc70: 651a str r2, [r3, #80] ; 0x50 - 802cc72: 4b0e ldr r3, [pc, #56] ; (802ccac ) - 802cc74: 2200 movs r2, #0 - 802cc76: 611a str r2, [r3, #16] + 802cc98: 687b ldr r3, [r7, #4] + 802cc9a: 681b ldr r3, [r3, #0] + 802cc9c: f44f 2200 mov.w r2, #524288 ; 0x80000 + 802cca0: 651a str r2, [r3, #80] ; 0x50 + 802cca2: 4b0e ldr r3, [pc, #56] ; (802ccdc ) + 802cca4: 2200 movs r2, #0 + 802cca6: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->RxBufferNewMessageCallback(hfdcan); #else /* Rx Buffer New Message Callback */ HAL_FDCAN_RxBufferNewMessageCallback(hfdcan); - 802cc78: 6878 ldr r0, [r7, #4] - 802cc7a: f000 f97c bl 802cf76 + 802cca8: 6878 ldr r0, [r7, #4] + 802ccaa: f000 f97c bl 802cfa6 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Timestamp Wraparound interrupt management ********************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TIMESTAMP_WRAPAROUND) != RESET) - 802cc7e: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cc80: 0c1b lsrs r3, r3, #16 - 802cc82: f003 0301 and.w r3, r3, #1 - 802cc86: 2b00 cmp r3, #0 - 802cc88: d016 beq.n 802ccb8 + 802ccae: 6bfb ldr r3, [r7, #60] ; 0x3c + 802ccb0: 0c1b lsrs r3, r3, #16 + 802ccb2: f003 0301 and.w r3, r3, #1 + 802ccb6: 2b00 cmp r3, #0 + 802ccb8: d016 beq.n 802cce8 { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TIMESTAMP_WRAPAROUND) != RESET) - 802cc8a: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cc8c: 0c1b lsrs r3, r3, #16 - 802cc8e: f003 0301 and.w r3, r3, #1 - 802cc92: 2b00 cmp r3, #0 - 802cc94: d010 beq.n 802ccb8 + 802ccba: 6bbb ldr r3, [r7, #56] ; 0x38 + 802ccbc: 0c1b lsrs r3, r3, #16 + 802ccbe: f003 0301 and.w r3, r3, #1 + 802ccc2: 2b00 cmp r3, #0 + 802ccc4: d010 beq.n 802cce8 { /* Clear the Timestamp Wraparound flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TIMESTAMP_WRAPAROUND); - 802cc96: 687b ldr r3, [r7, #4] - 802cc98: 681b ldr r3, [r3, #0] - 802cc9a: f44f 3280 mov.w r2, #65536 ; 0x10000 - 802cc9e: 651a str r2, [r3, #80] ; 0x50 - 802cca0: 4b02 ldr r3, [pc, #8] ; (802ccac ) - 802cca2: 2200 movs r2, #0 - 802cca4: 611a str r2, [r3, #16] + 802ccc6: 687b ldr r3, [r7, #4] + 802ccc8: 681b ldr r3, [r3, #0] + 802ccca: f44f 3280 mov.w r2, #65536 ; 0x10000 + 802ccce: 651a str r2, [r3, #80] ; 0x50 + 802ccd0: 4b02 ldr r3, [pc, #8] ; (802ccdc ) + 802ccd2: 2200 movs r2, #0 + 802ccd4: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TimestampWraparoundCallback(hfdcan); #else /* Timestamp Wraparound Callback */ HAL_FDCAN_TimestampWraparoundCallback(hfdcan); - 802cca6: 6878 ldr r0, [r7, #4] - 802cca8: e004 b.n 802ccb4 - 802ccaa: bf00 nop - 802ccac: 4000a800 .word 0x4000a800 - 802ccb0: 3fcfffff .word 0x3fcfffff - 802ccb4: f000 f969 bl 802cf8a + 802ccd6: 6878 ldr r0, [r7, #4] + 802ccd8: e004 b.n 802cce4 + 802ccda: bf00 nop + 802ccdc: 4000a800 .word 0x4000a800 + 802cce0: 3fcfffff .word 0x3fcfffff + 802cce4: f000 f969 bl 802cfba #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Timeout Occurred interrupt management ************************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TIMEOUT_OCCURRED) != RESET) - 802ccb8: 6bfb ldr r3, [r7, #60] ; 0x3c - 802ccba: 0c9b lsrs r3, r3, #18 - 802ccbc: f003 0301 and.w r3, r3, #1 - 802ccc0: 2b00 cmp r3, #0 - 802ccc2: d010 beq.n 802cce6 + 802cce8: 6bfb ldr r3, [r7, #60] ; 0x3c + 802ccea: 0c9b lsrs r3, r3, #18 + 802ccec: f003 0301 and.w r3, r3, #1 + 802ccf0: 2b00 cmp r3, #0 + 802ccf2: d010 beq.n 802cd16 { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TIMEOUT_OCCURRED) != RESET) - 802ccc4: 6bbb ldr r3, [r7, #56] ; 0x38 - 802ccc6: 0c9b lsrs r3, r3, #18 - 802ccc8: f003 0301 and.w r3, r3, #1 - 802cccc: 2b00 cmp r3, #0 - 802ccce: d00a beq.n 802cce6 + 802ccf4: 6bbb ldr r3, [r7, #56] ; 0x38 + 802ccf6: 0c9b lsrs r3, r3, #18 + 802ccf8: f003 0301 and.w r3, r3, #1 + 802ccfc: 2b00 cmp r3, #0 + 802ccfe: d00a beq.n 802cd16 { /* Clear the Timeout Occurred flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TIMEOUT_OCCURRED); - 802ccd0: 687b ldr r3, [r7, #4] - 802ccd2: 681b ldr r3, [r3, #0] - 802ccd4: f44f 2280 mov.w r2, #262144 ; 0x40000 - 802ccd8: 651a str r2, [r3, #80] ; 0x50 - 802ccda: 4b83 ldr r3, [pc, #524] ; (802cee8 ) - 802ccdc: 2200 movs r2, #0 - 802ccde: 611a str r2, [r3, #16] + 802cd00: 687b ldr r3, [r7, #4] + 802cd02: 681b ldr r3, [r3, #0] + 802cd04: f44f 2280 mov.w r2, #262144 ; 0x40000 + 802cd08: 651a str r2, [r3, #80] ; 0x50 + 802cd0a: 4b83 ldr r3, [pc, #524] ; (802cf18 ) + 802cd0c: 2200 movs r2, #0 + 802cd0e: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TimeoutOccurredCallback(hfdcan); #else /* Timeout Occurred Callback */ HAL_FDCAN_TimeoutOccurredCallback(hfdcan); - 802cce0: 6878 ldr r0, [r7, #4] - 802cce2: f000 f95c bl 802cf9e + 802cd10: 6878 ldr r0, [r7, #4] + 802cd12: f000 f95c bl 802cfce #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Message RAM access failure interrupt management **************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_RAM_ACCESS_FAILURE) != RESET) - 802cce6: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cce8: 0c5b lsrs r3, r3, #17 - 802ccea: f003 0301 and.w r3, r3, #1 - 802ccee: 2b00 cmp r3, #0 - 802ccf0: d015 beq.n 802cd1e + 802cd16: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cd18: 0c5b lsrs r3, r3, #17 + 802cd1a: f003 0301 and.w r3, r3, #1 + 802cd1e: 2b00 cmp r3, #0 + 802cd20: d015 beq.n 802cd4e { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_RAM_ACCESS_FAILURE) != RESET) - 802ccf2: 6bbb ldr r3, [r7, #56] ; 0x38 - 802ccf4: 0c5b lsrs r3, r3, #17 - 802ccf6: f003 0301 and.w r3, r3, #1 - 802ccfa: 2b00 cmp r3, #0 - 802ccfc: d00f beq.n 802cd1e + 802cd22: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cd24: 0c5b lsrs r3, r3, #17 + 802cd26: f003 0301 and.w r3, r3, #1 + 802cd2a: 2b00 cmp r3, #0 + 802cd2c: d00f beq.n 802cd4e { /* Clear the Message RAM access failure flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_RAM_ACCESS_FAILURE); - 802ccfe: 687b ldr r3, [r7, #4] - 802cd00: 681b ldr r3, [r3, #0] - 802cd02: f44f 3200 mov.w r2, #131072 ; 0x20000 - 802cd06: 651a str r2, [r3, #80] ; 0x50 - 802cd08: 4b77 ldr r3, [pc, #476] ; (802cee8 ) - 802cd0a: 2200 movs r2, #0 - 802cd0c: 611a str r2, [r3, #16] + 802cd2e: 687b ldr r3, [r7, #4] + 802cd30: 681b ldr r3, [r3, #0] + 802cd32: f44f 3200 mov.w r2, #131072 ; 0x20000 + 802cd36: 651a str r2, [r3, #80] ; 0x50 + 802cd38: 4b77 ldr r3, [pc, #476] ; (802cf18 ) + 802cd3a: 2200 movs r2, #0 + 802cd3c: 611a str r2, [r3, #16] /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_RAM_ACCESS; - 802cd0e: 687b ldr r3, [r7, #4] - 802cd10: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802cd14: f043 0280 orr.w r2, r3, #128 ; 0x80 - 802cd18: 687b ldr r3, [r7, #4] - 802cd1a: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802cd3e: 687b ldr r3, [r7, #4] + 802cd40: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802cd44: f043 0280 orr.w r2, r3, #128 ; 0x80 + 802cd48: 687b ldr r3, [r7, #4] + 802cd4a: f8c3 209c str.w r2, [r3, #156] ; 0x9c } } /* Error Status interrupts management ***************************************/ if (ErrorStatusITs != 0U) - 802cd1e: 6c3b ldr r3, [r7, #64] ; 0x40 - 802cd20: 2b00 cmp r3, #0 - 802cd22: d00d beq.n 802cd40 + 802cd4e: 6c3b ldr r3, [r7, #64] ; 0x40 + 802cd50: 2b00 cmp r3, #0 + 802cd52: d00d beq.n 802cd70 { /* Clear the Error flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, ErrorStatusITs); - 802cd24: 687b ldr r3, [r7, #4] - 802cd26: 681a ldr r2, [r3, #0] - 802cd28: 6c39 ldr r1, [r7, #64] ; 0x40 - 802cd2a: 4b70 ldr r3, [pc, #448] ; (802ceec ) - 802cd2c: 400b ands r3, r1 - 802cd2e: 6513 str r3, [r2, #80] ; 0x50 - 802cd30: 4a6d ldr r2, [pc, #436] ; (802cee8 ) - 802cd32: 6c3b ldr r3, [r7, #64] ; 0x40 - 802cd34: 0f9b lsrs r3, r3, #30 - 802cd36: 6113 str r3, [r2, #16] + 802cd54: 687b ldr r3, [r7, #4] + 802cd56: 681a ldr r2, [r3, #0] + 802cd58: 6c39 ldr r1, [r7, #64] ; 0x40 + 802cd5a: 4b70 ldr r3, [pc, #448] ; (802cf1c ) + 802cd5c: 400b ands r3, r1 + 802cd5e: 6513 str r3, [r2, #80] ; 0x50 + 802cd60: 4a6d ldr r2, [pc, #436] ; (802cf18 ) + 802cd62: 6c3b ldr r3, [r7, #64] ; 0x40 + 802cd64: 0f9b lsrs r3, r3, #30 + 802cd66: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->ErrorStatusCallback(hfdcan, ErrorStatusITs); #else /* Error Status Callback */ HAL_FDCAN_ErrorStatusCallback(hfdcan, ErrorStatusITs); - 802cd38: 6c39 ldr r1, [r7, #64] ; 0x40 - 802cd3a: 6878 ldr r0, [r7, #4] - 802cd3c: f7f3 ffe2 bl 8020d04 + 802cd68: 6c39 ldr r1, [r7, #64] ; 0x40 + 802cd6a: 6878 ldr r0, [r7, #4] + 802cd6c: f7f3 ffca bl 8020d04 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Error interrupts management **********************************************/ if (Errors != 0U) - 802cd40: 6c7b ldr r3, [r7, #68] ; 0x44 - 802cd42: 2b00 cmp r3, #0 - 802cd44: d011 beq.n 802cd6a + 802cd70: 6c7b ldr r3, [r7, #68] ; 0x44 + 802cd72: 2b00 cmp r3, #0 + 802cd74: d011 beq.n 802cd9a { /* Clear the Error flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, Errors); - 802cd46: 687b ldr r3, [r7, #4] - 802cd48: 681a ldr r2, [r3, #0] - 802cd4a: 6c79 ldr r1, [r7, #68] ; 0x44 - 802cd4c: 4b67 ldr r3, [pc, #412] ; (802ceec ) - 802cd4e: 400b ands r3, r1 - 802cd50: 6513 str r3, [r2, #80] ; 0x50 - 802cd52: 4a65 ldr r2, [pc, #404] ; (802cee8 ) - 802cd54: 6c7b ldr r3, [r7, #68] ; 0x44 - 802cd56: 0f9b lsrs r3, r3, #30 - 802cd58: 6113 str r3, [r2, #16] + 802cd76: 687b ldr r3, [r7, #4] + 802cd78: 681a ldr r2, [r3, #0] + 802cd7a: 6c79 ldr r1, [r7, #68] ; 0x44 + 802cd7c: 4b67 ldr r3, [pc, #412] ; (802cf1c ) + 802cd7e: 400b ands r3, r1 + 802cd80: 6513 str r3, [r2, #80] ; 0x50 + 802cd82: 4a65 ldr r2, [pc, #404] ; (802cf18 ) + 802cd84: 6c7b ldr r3, [r7, #68] ; 0x44 + 802cd86: 0f9b lsrs r3, r3, #30 + 802cd88: 6113 str r3, [r2, #16] /* Update error code */ hfdcan->ErrorCode |= Errors; - 802cd5a: 687b ldr r3, [r7, #4] - 802cd5c: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c - 802cd60: 6c7b ldr r3, [r7, #68] ; 0x44 - 802cd62: 431a orrs r2, r3 - 802cd64: 687b ldr r3, [r7, #4] - 802cd66: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802cd8a: 687b ldr r3, [r7, #4] + 802cd8c: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c + 802cd90: 6c7b ldr r3, [r7, #68] ; 0x44 + 802cd92: 431a orrs r2, r3 + 802cd94: 687b ldr r3, [r7, #4] + 802cd96: f8c3 209c str.w r2, [r3, #156] ; 0x9c } if (hfdcan->Instance == FDCAN1) - 802cd6a: 687b ldr r3, [r7, #4] - 802cd6c: 681b ldr r3, [r3, #0] - 802cd6e: 4a60 ldr r2, [pc, #384] ; (802cef0 ) - 802cd70: 4293 cmp r3, r2 - 802cd72: f040 80ac bne.w 802cece + 802cd9a: 687b ldr r3, [r7, #4] + 802cd9c: 681b ldr r3, [r3, #0] + 802cd9e: 4a60 ldr r2, [pc, #384] ; (802cf20 ) + 802cda0: 4293 cmp r3, r2 + 802cda2: f040 80ac bne.w 802cefe { if ((hfdcan->ttcan->TTOCF & FDCAN_TTOCF_OM) != 0U) - 802cd76: 687b ldr r3, [r7, #4] - 802cd78: 685b ldr r3, [r3, #4] - 802cd7a: 689b ldr r3, [r3, #8] - 802cd7c: f003 0303 and.w r3, r3, #3 - 802cd80: 2b00 cmp r3, #0 - 802cd82: f000 80a4 beq.w 802cece + 802cda6: 687b ldr r3, [r7, #4] + 802cda8: 685b ldr r3, [r3, #4] + 802cdaa: 689b ldr r3, [r3, #8] + 802cdac: f003 0303 and.w r3, r3, #3 + 802cdb0: 2b00 cmp r3, #0 + 802cdb2: f000 80a4 beq.w 802cefe { TTSchedSyncITs = hfdcan->ttcan->TTIR & FDCAN_TT_SCHEDULE_SYNC_MASK; - 802cd86: 687b ldr r3, [r7, #4] - 802cd88: 685b ldr r3, [r3, #4] - 802cd8a: 6a1b ldr r3, [r3, #32] - 802cd8c: f003 030f and.w r3, r3, #15 - 802cd90: 62fb str r3, [r7, #44] ; 0x2c - TTSchedSyncITs &= hfdcan->ttcan->TTIE; - 802cd92: 687b ldr r3, [r7, #4] - 802cd94: 685b ldr r3, [r3, #4] - 802cd96: 6a5b ldr r3, [r3, #36] ; 0x24 - 802cd98: 6afa ldr r2, [r7, #44] ; 0x2c - 802cd9a: 4013 ands r3, r2 - 802cd9c: 62fb str r3, [r7, #44] ; 0x2c - TTTimeMarkITs = hfdcan->ttcan->TTIR & FDCAN_TT_TIME_MARK_MASK; - 802cd9e: 687b ldr r3, [r7, #4] - 802cda0: 685b ldr r3, [r3, #4] - 802cda2: 6a1b ldr r3, [r3, #32] - 802cda4: f003 0330 and.w r3, r3, #48 ; 0x30 - 802cda8: 62bb str r3, [r7, #40] ; 0x28 - TTTimeMarkITs &= hfdcan->ttcan->TTIE; - 802cdaa: 687b ldr r3, [r7, #4] - 802cdac: 685b ldr r3, [r3, #4] - 802cdae: 6a5b ldr r3, [r3, #36] ; 0x24 - 802cdb0: 6aba ldr r2, [r7, #40] ; 0x28 - 802cdb2: 4013 ands r3, r2 - 802cdb4: 62bb str r3, [r7, #40] ; 0x28 - TTGlobTimeITs = hfdcan->ttcan->TTIR & FDCAN_TT_GLOBAL_TIME_MASK; 802cdb6: 687b ldr r3, [r7, #4] 802cdb8: 685b ldr r3, [r3, #4] 802cdba: 6a1b ldr r3, [r3, #32] - 802cdbc: f403 73c0 and.w r3, r3, #384 ; 0x180 - 802cdc0: 627b str r3, [r7, #36] ; 0x24 - TTGlobTimeITs &= hfdcan->ttcan->TTIE; + 802cdbc: f003 030f and.w r3, r3, #15 + 802cdc0: 62fb str r3, [r7, #44] ; 0x2c + TTSchedSyncITs &= hfdcan->ttcan->TTIE; 802cdc2: 687b ldr r3, [r7, #4] 802cdc4: 685b ldr r3, [r3, #4] 802cdc6: 6a5b ldr r3, [r3, #36] ; 0x24 - 802cdc8: 6a7a ldr r2, [r7, #36] ; 0x24 + 802cdc8: 6afa ldr r2, [r7, #44] ; 0x2c 802cdca: 4013 ands r3, r2 - 802cdcc: 627b str r3, [r7, #36] ; 0x24 - TTDistErrors = hfdcan->ttcan->TTIR & FDCAN_TT_DISTURBING_ERROR_MASK; + 802cdcc: 62fb str r3, [r7, #44] ; 0x2c + TTTimeMarkITs = hfdcan->ttcan->TTIR & FDCAN_TT_TIME_MARK_MASK; 802cdce: 687b ldr r3, [r7, #4] 802cdd0: 685b ldr r3, [r3, #4] 802cdd2: 6a1b ldr r3, [r3, #32] - 802cdd4: f403 43fc and.w r3, r3, #32256 ; 0x7e00 - 802cdd8: 623b str r3, [r7, #32] - TTDistErrors &= hfdcan->ttcan->TTIE; + 802cdd4: f003 0330 and.w r3, r3, #48 ; 0x30 + 802cdd8: 62bb str r3, [r7, #40] ; 0x28 + TTTimeMarkITs &= hfdcan->ttcan->TTIE; 802cdda: 687b ldr r3, [r7, #4] 802cddc: 685b ldr r3, [r3, #4] 802cdde: 6a5b ldr r3, [r3, #36] ; 0x24 - 802cde0: 6a3a ldr r2, [r7, #32] + 802cde0: 6aba ldr r2, [r7, #40] ; 0x28 802cde2: 4013 ands r3, r2 - 802cde4: 623b str r3, [r7, #32] - TTFatalErrors = hfdcan->ttcan->TTIR & FDCAN_TT_FATAL_ERROR_MASK; + 802cde4: 62bb str r3, [r7, #40] ; 0x28 + TTGlobTimeITs = hfdcan->ttcan->TTIR & FDCAN_TT_GLOBAL_TIME_MASK; 802cde6: 687b ldr r3, [r7, #4] 802cde8: 685b ldr r3, [r3, #4] 802cdea: 6a1b ldr r3, [r3, #32] - 802cdec: f403 23f0 and.w r3, r3, #491520 ; 0x78000 - 802cdf0: 61fb str r3, [r7, #28] - TTFatalErrors &= hfdcan->ttcan->TTIE; + 802cdec: f403 73c0 and.w r3, r3, #384 ; 0x180 + 802cdf0: 627b str r3, [r7, #36] ; 0x24 + TTGlobTimeITs &= hfdcan->ttcan->TTIE; 802cdf2: 687b ldr r3, [r7, #4] 802cdf4: 685b ldr r3, [r3, #4] 802cdf6: 6a5b ldr r3, [r3, #36] ; 0x24 - 802cdf8: 69fa ldr r2, [r7, #28] + 802cdf8: 6a7a ldr r2, [r7, #36] ; 0x24 802cdfa: 4013 ands r3, r2 - 802cdfc: 61fb str r3, [r7, #28] - itsourceTTIE = hfdcan->ttcan->TTIE; + 802cdfc: 627b str r3, [r7, #36] ; 0x24 + TTDistErrors = hfdcan->ttcan->TTIR & FDCAN_TT_DISTURBING_ERROR_MASK; 802cdfe: 687b ldr r3, [r7, #4] 802ce00: 685b ldr r3, [r3, #4] - 802ce02: 6a5b ldr r3, [r3, #36] ; 0x24 - 802ce04: 61bb str r3, [r7, #24] + 802ce02: 6a1b ldr r3, [r3, #32] + 802ce04: f403 43fc and.w r3, r3, #32256 ; 0x7e00 + 802ce08: 623b str r3, [r7, #32] + TTDistErrors &= hfdcan->ttcan->TTIE; + 802ce0a: 687b ldr r3, [r7, #4] + 802ce0c: 685b ldr r3, [r3, #4] + 802ce0e: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ce10: 6a3a ldr r2, [r7, #32] + 802ce12: 4013 ands r3, r2 + 802ce14: 623b str r3, [r7, #32] + TTFatalErrors = hfdcan->ttcan->TTIR & FDCAN_TT_FATAL_ERROR_MASK; + 802ce16: 687b ldr r3, [r7, #4] + 802ce18: 685b ldr r3, [r3, #4] + 802ce1a: 6a1b ldr r3, [r3, #32] + 802ce1c: f403 23f0 and.w r3, r3, #491520 ; 0x78000 + 802ce20: 61fb str r3, [r7, #28] + TTFatalErrors &= hfdcan->ttcan->TTIE; + 802ce22: 687b ldr r3, [r7, #4] + 802ce24: 685b ldr r3, [r3, #4] + 802ce26: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ce28: 69fa ldr r2, [r7, #28] + 802ce2a: 4013 ands r3, r2 + 802ce2c: 61fb str r3, [r7, #28] + itsourceTTIE = hfdcan->ttcan->TTIE; + 802ce2e: 687b ldr r3, [r7, #4] + 802ce30: 685b ldr r3, [r3, #4] + 802ce32: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ce34: 61bb str r3, [r7, #24] itflagTTIR = hfdcan->ttcan->TTIR; - 802ce06: 687b ldr r3, [r7, #4] - 802ce08: 685b ldr r3, [r3, #4] - 802ce0a: 6a1b ldr r3, [r3, #32] - 802ce0c: 617b str r3, [r7, #20] + 802ce36: 687b ldr r3, [r7, #4] + 802ce38: 685b ldr r3, [r3, #4] + 802ce3a: 6a1b ldr r3, [r3, #32] + 802ce3c: 617b str r3, [r7, #20] /* TT Schedule Synchronization interrupts management **********************/ if (TTSchedSyncITs != 0U) - 802ce0e: 6afb ldr r3, [r7, #44] ; 0x2c - 802ce10: 2b00 cmp r3, #0 - 802ce12: d007 beq.n 802ce24 + 802ce3e: 6afb ldr r3, [r7, #44] ; 0x2c + 802ce40: 2b00 cmp r3, #0 + 802ce42: d007 beq.n 802ce54 { /* Clear the TT Schedule Synchronization flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTSchedSyncITs); - 802ce14: 687b ldr r3, [r7, #4] - 802ce16: 685b ldr r3, [r3, #4] - 802ce18: 6afa ldr r2, [r7, #44] ; 0x2c - 802ce1a: 621a str r2, [r3, #32] + 802ce44: 687b ldr r3, [r7, #4] + 802ce46: 685b ldr r3, [r3, #4] + 802ce48: 6afa ldr r2, [r7, #44] ; 0x2c + 802ce4a: 621a str r2, [r3, #32] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TT_ScheduleSyncCallback(hfdcan, TTSchedSyncITs); #else /* TT Schedule Synchronization Callback */ HAL_FDCAN_TT_ScheduleSyncCallback(hfdcan, TTSchedSyncITs); - 802ce1c: 6af9 ldr r1, [r7, #44] ; 0x2c - 802ce1e: 6878 ldr r0, [r7, #4] - 802ce20: f000 f8db bl 802cfda + 802ce4c: 6af9 ldr r1, [r7, #44] ; 0x2c + 802ce4e: 6878 ldr r0, [r7, #4] + 802ce50: f000 f8db bl 802d00a #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* TT Time Mark interrupts management *************************************/ if (TTTimeMarkITs != 0U) - 802ce24: 6abb ldr r3, [r7, #40] ; 0x28 - 802ce26: 2b00 cmp r3, #0 - 802ce28: d007 beq.n 802ce3a + 802ce54: 6abb ldr r3, [r7, #40] ; 0x28 + 802ce56: 2b00 cmp r3, #0 + 802ce58: d007 beq.n 802ce6a { /* Clear the TT Time Mark flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTTimeMarkITs); - 802ce2a: 687b ldr r3, [r7, #4] - 802ce2c: 685b ldr r3, [r3, #4] - 802ce2e: 6aba ldr r2, [r7, #40] ; 0x28 - 802ce30: 621a str r2, [r3, #32] + 802ce5a: 687b ldr r3, [r7, #4] + 802ce5c: 685b ldr r3, [r3, #4] + 802ce5e: 6aba ldr r2, [r7, #40] ; 0x28 + 802ce60: 621a str r2, [r3, #32] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TT_TimeMarkCallback(hfdcan, TTTimeMarkITs); #else /* TT Time Mark Callback */ HAL_FDCAN_TT_TimeMarkCallback(hfdcan, TTTimeMarkITs); - 802ce32: 6ab9 ldr r1, [r7, #40] ; 0x28 - 802ce34: 6878 ldr r0, [r7, #4] - 802ce36: f000 f8db bl 802cff0 + 802ce62: 6ab9 ldr r1, [r7, #40] ; 0x28 + 802ce64: 6878 ldr r0, [r7, #4] + 802ce66: f000 f8db bl 802d020 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* TT Stop Watch interrupt management *************************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceTTIE, FDCAN_TT_IT_STOP_WATCH) != RESET) - 802ce3a: 69bb ldr r3, [r7, #24] - 802ce3c: 099b lsrs r3, r3, #6 - 802ce3e: f003 0301 and.w r3, r3, #1 - 802ce42: 2b00 cmp r3, #0 - 802ce44: d01a beq.n 802ce7c + 802ce6a: 69bb ldr r3, [r7, #24] + 802ce6c: 099b lsrs r3, r3, #6 + 802ce6e: f003 0301 and.w r3, r3, #1 + 802ce72: 2b00 cmp r3, #0 + 802ce74: d01a beq.n 802ceac { if (FDCAN_CHECK_FLAG(itflagTTIR, FDCAN_TT_FLAG_STOP_WATCH) != RESET) - 802ce46: 697b ldr r3, [r7, #20] - 802ce48: 099b lsrs r3, r3, #6 - 802ce4a: f003 0301 and.w r3, r3, #1 - 802ce4e: 2b00 cmp r3, #0 - 802ce50: d014 beq.n 802ce7c + 802ce76: 697b ldr r3, [r7, #20] + 802ce78: 099b lsrs r3, r3, #6 + 802ce7a: f003 0301 and.w r3, r3, #1 + 802ce7e: 2b00 cmp r3, #0 + 802ce80: d014 beq.n 802ceac { /* Retrieve Stop watch Time and Cycle count */ SWTime = ((hfdcan->ttcan->TTCPT & FDCAN_TTCPT_SWV) >> FDCAN_TTCPT_SWV_Pos); - 802ce52: 687b ldr r3, [r7, #4] - 802ce54: 685b ldr r3, [r3, #4] - 802ce56: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ce58: 0c1b lsrs r3, r3, #16 - 802ce5a: b29b uxth r3, r3 - 802ce5c: 613b str r3, [r7, #16] + 802ce82: 687b ldr r3, [r7, #4] + 802ce84: 685b ldr r3, [r3, #4] + 802ce86: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ce88: 0c1b lsrs r3, r3, #16 + 802ce8a: b29b uxth r3, r3 + 802ce8c: 613b str r3, [r7, #16] SWCycleCount = ((hfdcan->ttcan->TTCPT & FDCAN_TTCPT_CCV) >> FDCAN_TTCPT_CCV_Pos); - 802ce5e: 687b ldr r3, [r7, #4] - 802ce60: 685b ldr r3, [r3, #4] - 802ce62: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ce64: f003 033f and.w r3, r3, #63 ; 0x3f - 802ce68: 60fb str r3, [r7, #12] + 802ce8e: 687b ldr r3, [r7, #4] + 802ce90: 685b ldr r3, [r3, #4] + 802ce92: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ce94: f003 033f and.w r3, r3, #63 ; 0x3f + 802ce98: 60fb str r3, [r7, #12] /* Clear the TT Stop Watch flag */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, FDCAN_TT_FLAG_STOP_WATCH); - 802ce6a: 687b ldr r3, [r7, #4] - 802ce6c: 685b ldr r3, [r3, #4] - 802ce6e: 2240 movs r2, #64 ; 0x40 - 802ce70: 621a str r2, [r3, #32] + 802ce9a: 687b ldr r3, [r7, #4] + 802ce9c: 685b ldr r3, [r3, #4] + 802ce9e: 2240 movs r2, #64 ; 0x40 + 802cea0: 621a str r2, [r3, #32] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TT_StopWatchCallback(hfdcan, SWTime, SWCycleCount); #else /* TT Stop Watch Callback */ HAL_FDCAN_TT_StopWatchCallback(hfdcan, SWTime, SWCycleCount); - 802ce72: 68fa ldr r2, [r7, #12] - 802ce74: 6939 ldr r1, [r7, #16] - 802ce76: 6878 ldr r0, [r7, #4] - 802ce78: f000 f8c5 bl 802d006 + 802cea2: 68fa ldr r2, [r7, #12] + 802cea4: 6939 ldr r1, [r7, #16] + 802cea6: 6878 ldr r0, [r7, #4] + 802cea8: f000 f8c5 bl 802d036 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* TT Global Time interrupts management ***********************************/ if (TTGlobTimeITs != 0U) - 802ce7c: 6a7b ldr r3, [r7, #36] ; 0x24 - 802ce7e: 2b00 cmp r3, #0 - 802ce80: d007 beq.n 802ce92 + 802ceac: 6a7b ldr r3, [r7, #36] ; 0x24 + 802ceae: 2b00 cmp r3, #0 + 802ceb0: d007 beq.n 802cec2 { /* Clear the TT Global Time flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTGlobTimeITs); - 802ce82: 687b ldr r3, [r7, #4] - 802ce84: 685b ldr r3, [r3, #4] - 802ce86: 6a7a ldr r2, [r7, #36] ; 0x24 - 802ce88: 621a str r2, [r3, #32] + 802ceb2: 687b ldr r3, [r7, #4] + 802ceb4: 685b ldr r3, [r3, #4] + 802ceb6: 6a7a ldr r2, [r7, #36] ; 0x24 + 802ceb8: 621a str r2, [r3, #32] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TT_GlobalTimeCallback(hfdcan, TTGlobTimeITs); #else /* TT Global Time Callback */ HAL_FDCAN_TT_GlobalTimeCallback(hfdcan, TTGlobTimeITs); - 802ce8a: 6a79 ldr r1, [r7, #36] ; 0x24 - 802ce8c: 6878 ldr r0, [r7, #4] - 802ce8e: f000 f8c6 bl 802d01e + 802ceba: 6a79 ldr r1, [r7, #36] ; 0x24 + 802cebc: 6878 ldr r0, [r7, #4] + 802cebe: f000 f8c6 bl 802d04e #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* TT Disturbing Error interrupts management ******************************/ if (TTDistErrors != 0U) - 802ce92: 6a3b ldr r3, [r7, #32] - 802ce94: 2b00 cmp r3, #0 - 802ce96: d00b beq.n 802ceb0 + 802cec2: 6a3b ldr r3, [r7, #32] + 802cec4: 2b00 cmp r3, #0 + 802cec6: d00b beq.n 802cee0 { /* Clear the TT Disturbing Error flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTDistErrors); - 802ce98: 687b ldr r3, [r7, #4] - 802ce9a: 685b ldr r3, [r3, #4] - 802ce9c: 6a3a ldr r2, [r7, #32] - 802ce9e: 621a str r2, [r3, #32] + 802cec8: 687b ldr r3, [r7, #4] + 802ceca: 685b ldr r3, [r3, #4] + 802cecc: 6a3a ldr r2, [r7, #32] + 802cece: 621a str r2, [r3, #32] /* Update error code */ hfdcan->ErrorCode |= TTDistErrors; - 802cea0: 687b ldr r3, [r7, #4] - 802cea2: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c - 802cea6: 6a3b ldr r3, [r7, #32] - 802cea8: 431a orrs r2, r3 - 802ceaa: 687b ldr r3, [r7, #4] - 802ceac: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802ced0: 687b ldr r3, [r7, #4] + 802ced2: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c + 802ced6: 6a3b ldr r3, [r7, #32] + 802ced8: 431a orrs r2, r3 + 802ceda: 687b ldr r3, [r7, #4] + 802cedc: f8c3 209c str.w r2, [r3, #156] ; 0x9c } /* TT Fatal Error interrupts management ***********************************/ if (TTFatalErrors != 0U) - 802ceb0: 69fb ldr r3, [r7, #28] - 802ceb2: 2b00 cmp r3, #0 - 802ceb4: d00b beq.n 802cece + 802cee0: 69fb ldr r3, [r7, #28] + 802cee2: 2b00 cmp r3, #0 + 802cee4: d00b beq.n 802cefe { /* Clear the TT Fatal Error flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTFatalErrors); - 802ceb6: 687b ldr r3, [r7, #4] - 802ceb8: 685b ldr r3, [r3, #4] - 802ceba: 69fa ldr r2, [r7, #28] - 802cebc: 621a str r2, [r3, #32] + 802cee6: 687b ldr r3, [r7, #4] + 802cee8: 685b ldr r3, [r3, #4] + 802ceea: 69fa ldr r2, [r7, #28] + 802ceec: 621a str r2, [r3, #32] /* Update error code */ hfdcan->ErrorCode |= TTFatalErrors; - 802cebe: 687b ldr r3, [r7, #4] - 802cec0: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c - 802cec4: 69fb ldr r3, [r7, #28] - 802cec6: 431a orrs r2, r3 - 802cec8: 687b ldr r3, [r7, #4] - 802ceca: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802ceee: 687b ldr r3, [r7, #4] + 802cef0: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c + 802cef4: 69fb ldr r3, [r7, #28] + 802cef6: 431a orrs r2, r3 + 802cef8: 687b ldr r3, [r7, #4] + 802cefa: f8c3 209c str.w r2, [r3, #156] ; 0x9c } } } if (hfdcan->ErrorCode != HAL_FDCAN_ERROR_NONE) - 802cece: 687b ldr r3, [r7, #4] - 802ced0: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802ced4: 2b00 cmp r3, #0 - 802ced6: d002 beq.n 802cede + 802cefe: 687b ldr r3, [r7, #4] + 802cf00: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802cf04: 2b00 cmp r3, #0 + 802cf06: d002 beq.n 802cf0e #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->ErrorCallback(hfdcan); #else /* Error Callback */ HAL_FDCAN_ErrorCallback(hfdcan); - 802ced8: 6878 ldr r0, [r7, #4] - 802ceda: f000 f874 bl 802cfc6 + 802cf08: 6878 ldr r0, [r7, #4] + 802cf0a: f000 f874 bl 802cff6 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } - 802cede: bf00 nop - 802cee0: 3758 adds r7, #88 ; 0x58 - 802cee2: 46bd mov sp, r7 - 802cee4: bd80 pop {r7, pc} - 802cee6: bf00 nop - 802cee8: 4000a800 .word 0x4000a800 - 802ceec: 3fcfffff .word 0x3fcfffff - 802cef0: 4000a000 .word 0x4000a000 + 802cf0e: bf00 nop + 802cf10: 3758 adds r7, #88 ; 0x58 + 802cf12: 46bd mov sp, r7 + 802cf14: bd80 pop {r7, pc} + 802cf16: bf00 nop + 802cf18: 4000a800 .word 0x4000a800 + 802cf1c: 3fcfffff .word 0x3fcfffff + 802cf20: 4000a000 .word 0x4000a000 -0802cef4 : +0802cf24 : * @param ClkCalibrationITs indicates which Clock Calibration interrupts are signaled. * This parameter can be any combination of @arg FDCAN_Clock_Calibration_Interrupts. * @retval None */ __weak void HAL_FDCAN_ClockCalibrationCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t ClkCalibrationITs) { - 802cef4: b480 push {r7} - 802cef6: b083 sub sp, #12 - 802cef8: af00 add r7, sp, #0 - 802cefa: 6078 str r0, [r7, #4] - 802cefc: 6039 str r1, [r7, #0] + 802cf24: b480 push {r7} + 802cf26: b083 sub sp, #12 + 802cf28: af00 add r7, sp, #0 + 802cf2a: 6078 str r0, [r7, #4] + 802cf2c: 6039 str r1, [r7, #0] UNUSED(ClkCalibrationITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_ClockCalibrationCallback could be implemented in the user file */ } - 802cefe: bf00 nop - 802cf00: 370c adds r7, #12 - 802cf02: 46bd mov sp, r7 - 802cf04: f85d 7b04 ldr.w r7, [sp], #4 - 802cf08: 4770 bx lr + 802cf2e: bf00 nop + 802cf30: 370c adds r7, #12 + 802cf32: 46bd mov sp, r7 + 802cf34: f85d 7b04 ldr.w r7, [sp], #4 + 802cf38: 4770 bx lr -0802cf0a : +0802cf3a : * @param TxEventFifoITs indicates which Tx Event FIFO interrupts are signaled. * This parameter can be any combination of @arg FDCAN_Tx_Event_Fifo_Interrupts. * @retval None */ __weak void HAL_FDCAN_TxEventFifoCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TxEventFifoITs) { - 802cf0a: b480 push {r7} - 802cf0c: b083 sub sp, #12 - 802cf0e: af00 add r7, sp, #0 - 802cf10: 6078 str r0, [r7, #4] - 802cf12: 6039 str r1, [r7, #0] + 802cf3a: b480 push {r7} + 802cf3c: b083 sub sp, #12 + 802cf3e: af00 add r7, sp, #0 + 802cf40: 6078 str r0, [r7, #4] + 802cf42: 6039 str r1, [r7, #0] UNUSED(TxEventFifoITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TxEventFifoCallback could be implemented in the user file */ } - 802cf14: bf00 nop - 802cf16: 370c adds r7, #12 - 802cf18: 46bd mov sp, r7 - 802cf1a: f85d 7b04 ldr.w r7, [sp], #4 - 802cf1e: 4770 bx lr + 802cf44: bf00 nop + 802cf46: 370c adds r7, #12 + 802cf48: 46bd mov sp, r7 + 802cf4a: f85d 7b04 ldr.w r7, [sp], #4 + 802cf4e: 4770 bx lr -0802cf20 : +0802cf50 : * @param RxFifo1ITs indicates which Rx FIFO 1 interrupts are signaled. * This parameter can be any combination of @arg FDCAN_Rx_Fifo1_Interrupts. * @retval None */ __weak void HAL_FDCAN_RxFifo1Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs) { - 802cf20: b480 push {r7} - 802cf22: b083 sub sp, #12 - 802cf24: af00 add r7, sp, #0 - 802cf26: 6078 str r0, [r7, #4] - 802cf28: 6039 str r1, [r7, #0] + 802cf50: b480 push {r7} + 802cf52: b083 sub sp, #12 + 802cf54: af00 add r7, sp, #0 + 802cf56: 6078 str r0, [r7, #4] + 802cf58: 6039 str r1, [r7, #0] UNUSED(RxFifo1ITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_RxFifo1Callback could be implemented in the user file */ } - 802cf2a: bf00 nop - 802cf2c: 370c adds r7, #12 - 802cf2e: 46bd mov sp, r7 - 802cf30: f85d 7b04 ldr.w r7, [sp], #4 - 802cf34: 4770 bx lr + 802cf5a: bf00 nop + 802cf5c: 370c adds r7, #12 + 802cf5e: 46bd mov sp, r7 + 802cf60: f85d 7b04 ldr.w r7, [sp], #4 + 802cf64: 4770 bx lr -0802cf36 : +0802cf66 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_TxFifoEmptyCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cf36: b480 push {r7} - 802cf38: b083 sub sp, #12 - 802cf3a: af00 add r7, sp, #0 - 802cf3c: 6078 str r0, [r7, #4] + 802cf66: b480 push {r7} + 802cf68: b083 sub sp, #12 + 802cf6a: af00 add r7, sp, #0 + 802cf6c: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TxFifoEmptyCallback could be implemented in the user file */ } - 802cf3e: bf00 nop - 802cf40: 370c adds r7, #12 - 802cf42: 46bd mov sp, r7 - 802cf44: f85d 7b04 ldr.w r7, [sp], #4 - 802cf48: 4770 bx lr + 802cf6e: bf00 nop + 802cf70: 370c adds r7, #12 + 802cf72: 46bd mov sp, r7 + 802cf74: f85d 7b04 ldr.w r7, [sp], #4 + 802cf78: 4770 bx lr -0802cf4a : +0802cf7a : * @param BufferIndexes Indexes of the transmitted buffers. * This parameter can be any combination of @arg FDCAN_Tx_location. * @retval None */ __weak void HAL_FDCAN_TxBufferCompleteCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes) { - 802cf4a: b480 push {r7} - 802cf4c: b083 sub sp, #12 - 802cf4e: af00 add r7, sp, #0 - 802cf50: 6078 str r0, [r7, #4] - 802cf52: 6039 str r1, [r7, #0] + 802cf7a: b480 push {r7} + 802cf7c: b083 sub sp, #12 + 802cf7e: af00 add r7, sp, #0 + 802cf80: 6078 str r0, [r7, #4] + 802cf82: 6039 str r1, [r7, #0] UNUSED(BufferIndexes); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TxBufferCompleteCallback could be implemented in the user file */ } - 802cf54: bf00 nop - 802cf56: 370c adds r7, #12 - 802cf58: 46bd mov sp, r7 - 802cf5a: f85d 7b04 ldr.w r7, [sp], #4 - 802cf5e: 4770 bx lr + 802cf84: bf00 nop + 802cf86: 370c adds r7, #12 + 802cf88: 46bd mov sp, r7 + 802cf8a: f85d 7b04 ldr.w r7, [sp], #4 + 802cf8e: 4770 bx lr -0802cf60 : +0802cf90 : * @param BufferIndexes Indexes of the aborted buffers. * This parameter can be any combination of @arg FDCAN_Tx_location. * @retval None */ __weak void HAL_FDCAN_TxBufferAbortCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes) { - 802cf60: b480 push {r7} - 802cf62: b083 sub sp, #12 - 802cf64: af00 add r7, sp, #0 - 802cf66: 6078 str r0, [r7, #4] - 802cf68: 6039 str r1, [r7, #0] + 802cf90: b480 push {r7} + 802cf92: b083 sub sp, #12 + 802cf94: af00 add r7, sp, #0 + 802cf96: 6078 str r0, [r7, #4] + 802cf98: 6039 str r1, [r7, #0] UNUSED(BufferIndexes); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TxBufferAbortCallback could be implemented in the user file */ } - 802cf6a: bf00 nop - 802cf6c: 370c adds r7, #12 - 802cf6e: 46bd mov sp, r7 - 802cf70: f85d 7b04 ldr.w r7, [sp], #4 - 802cf74: 4770 bx lr + 802cf9a: bf00 nop + 802cf9c: 370c adds r7, #12 + 802cf9e: 46bd mov sp, r7 + 802cfa0: f85d 7b04 ldr.w r7, [sp], #4 + 802cfa4: 4770 bx lr -0802cf76 : +0802cfa6 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_RxBufferNewMessageCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cf76: b480 push {r7} - 802cf78: b083 sub sp, #12 - 802cf7a: af00 add r7, sp, #0 - 802cf7c: 6078 str r0, [r7, #4] + 802cfa6: b480 push {r7} + 802cfa8: b083 sub sp, #12 + 802cfaa: af00 add r7, sp, #0 + 802cfac: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_RxBufferNewMessageCallback could be implemented in the user file */ } - 802cf7e: bf00 nop - 802cf80: 370c adds r7, #12 - 802cf82: 46bd mov sp, r7 - 802cf84: f85d 7b04 ldr.w r7, [sp], #4 - 802cf88: 4770 bx lr + 802cfae: bf00 nop + 802cfb0: 370c adds r7, #12 + 802cfb2: 46bd mov sp, r7 + 802cfb4: f85d 7b04 ldr.w r7, [sp], #4 + 802cfb8: 4770 bx lr -0802cf8a : +0802cfba : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_TimestampWraparoundCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cf8a: b480 push {r7} - 802cf8c: b083 sub sp, #12 - 802cf8e: af00 add r7, sp, #0 - 802cf90: 6078 str r0, [r7, #4] + 802cfba: b480 push {r7} + 802cfbc: b083 sub sp, #12 + 802cfbe: af00 add r7, sp, #0 + 802cfc0: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TimestampWraparoundCallback could be implemented in the user file */ } - 802cf92: bf00 nop - 802cf94: 370c adds r7, #12 - 802cf96: 46bd mov sp, r7 - 802cf98: f85d 7b04 ldr.w r7, [sp], #4 - 802cf9c: 4770 bx lr + 802cfc2: bf00 nop + 802cfc4: 370c adds r7, #12 + 802cfc6: 46bd mov sp, r7 + 802cfc8: f85d 7b04 ldr.w r7, [sp], #4 + 802cfcc: 4770 bx lr -0802cf9e : +0802cfce : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_TimeoutOccurredCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cf9e: b480 push {r7} - 802cfa0: b083 sub sp, #12 - 802cfa2: af00 add r7, sp, #0 - 802cfa4: 6078 str r0, [r7, #4] + 802cfce: b480 push {r7} + 802cfd0: b083 sub sp, #12 + 802cfd2: af00 add r7, sp, #0 + 802cfd4: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TimeoutOccurredCallback could be implemented in the user file */ } - 802cfa6: bf00 nop - 802cfa8: 370c adds r7, #12 - 802cfaa: 46bd mov sp, r7 - 802cfac: f85d 7b04 ldr.w r7, [sp], #4 - 802cfb0: 4770 bx lr + 802cfd6: bf00 nop + 802cfd8: 370c adds r7, #12 + 802cfda: 46bd mov sp, r7 + 802cfdc: f85d 7b04 ldr.w r7, [sp], #4 + 802cfe0: 4770 bx lr -0802cfb2 : +0802cfe2 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_HighPriorityMessageCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cfb2: b480 push {r7} - 802cfb4: b083 sub sp, #12 - 802cfb6: af00 add r7, sp, #0 - 802cfb8: 6078 str r0, [r7, #4] + 802cfe2: b480 push {r7} + 802cfe4: b083 sub sp, #12 + 802cfe6: af00 add r7, sp, #0 + 802cfe8: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_HighPriorityMessageCallback could be implemented in the user file */ } - 802cfba: bf00 nop - 802cfbc: 370c adds r7, #12 - 802cfbe: 46bd mov sp, r7 - 802cfc0: f85d 7b04 ldr.w r7, [sp], #4 - 802cfc4: 4770 bx lr + 802cfea: bf00 nop + 802cfec: 370c adds r7, #12 + 802cfee: 46bd mov sp, r7 + 802cff0: f85d 7b04 ldr.w r7, [sp], #4 + 802cff4: 4770 bx lr -0802cfc6 : +0802cff6 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_ErrorCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cfc6: b480 push {r7} - 802cfc8: b083 sub sp, #12 - 802cfca: af00 add r7, sp, #0 - 802cfcc: 6078 str r0, [r7, #4] + 802cff6: b480 push {r7} + 802cff8: b083 sub sp, #12 + 802cffa: af00 add r7, sp, #0 + 802cffc: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_ErrorCallback could be implemented in the user file */ } - 802cfce: bf00 nop - 802cfd0: 370c adds r7, #12 - 802cfd2: 46bd mov sp, r7 - 802cfd4: f85d 7b04 ldr.w r7, [sp], #4 - 802cfd8: 4770 bx lr + 802cffe: bf00 nop + 802d000: 370c adds r7, #12 + 802d002: 46bd mov sp, r7 + 802d004: f85d 7b04 ldr.w r7, [sp], #4 + 802d008: 4770 bx lr -0802cfda : +0802d00a : * @param TTSchedSyncITs indicates which TT Schedule Synchronization interrupts are signaled. * This parameter can be any combination of @arg FDCAN_TTScheduleSynchronization_Interrupts. * @retval None */ __weak void HAL_FDCAN_TT_ScheduleSyncCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTSchedSyncITs) { - 802cfda: b480 push {r7} - 802cfdc: b083 sub sp, #12 - 802cfde: af00 add r7, sp, #0 - 802cfe0: 6078 str r0, [r7, #4] - 802cfe2: 6039 str r1, [r7, #0] + 802d00a: b480 push {r7} + 802d00c: b083 sub sp, #12 + 802d00e: af00 add r7, sp, #0 + 802d010: 6078 str r0, [r7, #4] + 802d012: 6039 str r1, [r7, #0] UNUSED(TTSchedSyncITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TT_ScheduleSyncCallback could be implemented in the user file */ } - 802cfe4: bf00 nop - 802cfe6: 370c adds r7, #12 - 802cfe8: 46bd mov sp, r7 - 802cfea: f85d 7b04 ldr.w r7, [sp], #4 - 802cfee: 4770 bx lr + 802d014: bf00 nop + 802d016: 370c adds r7, #12 + 802d018: 46bd mov sp, r7 + 802d01a: f85d 7b04 ldr.w r7, [sp], #4 + 802d01e: 4770 bx lr -0802cff0 : +0802d020 : * @param TTTimeMarkITs indicates which TT Schedule Synchronization interrupts are signaled. * This parameter can be any combination of @arg FDCAN_TTTimeMark_Interrupts. * @retval None */ __weak void HAL_FDCAN_TT_TimeMarkCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTTimeMarkITs) { - 802cff0: b480 push {r7} - 802cff2: b083 sub sp, #12 - 802cff4: af00 add r7, sp, #0 - 802cff6: 6078 str r0, [r7, #4] - 802cff8: 6039 str r1, [r7, #0] + 802d020: b480 push {r7} + 802d022: b083 sub sp, #12 + 802d024: af00 add r7, sp, #0 + 802d026: 6078 str r0, [r7, #4] + 802d028: 6039 str r1, [r7, #0] UNUSED(TTTimeMarkITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TT_TimeMarkCallback could be implemented in the user file */ } - 802cffa: bf00 nop - 802cffc: 370c adds r7, #12 - 802cffe: 46bd mov sp, r7 - 802d000: f85d 7b04 ldr.w r7, [sp], #4 - 802d004: 4770 bx lr + 802d02a: bf00 nop + 802d02c: 370c adds r7, #12 + 802d02e: 46bd mov sp, r7 + 802d030: f85d 7b04 ldr.w r7, [sp], #4 + 802d034: 4770 bx lr -0802d006 : +0802d036 : * @param SWCycleCount Cycle count value captured together with SWTime. * This parameter is a number between 0 and 0x3F. * @retval None */ __weak void HAL_FDCAN_TT_StopWatchCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t SWTime, uint32_t SWCycleCount) { - 802d006: b480 push {r7} - 802d008: b085 sub sp, #20 - 802d00a: af00 add r7, sp, #0 - 802d00c: 60f8 str r0, [r7, #12] - 802d00e: 60b9 str r1, [r7, #8] - 802d010: 607a str r2, [r7, #4] + 802d036: b480 push {r7} + 802d038: b085 sub sp, #20 + 802d03a: af00 add r7, sp, #0 + 802d03c: 60f8 str r0, [r7, #12] + 802d03e: 60b9 str r1, [r7, #8] + 802d040: 607a str r2, [r7, #4] UNUSED(SWCycleCount); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TT_StopWatchCallback could be implemented in the user file */ } - 802d012: bf00 nop - 802d014: 3714 adds r7, #20 - 802d016: 46bd mov sp, r7 - 802d018: f85d 7b04 ldr.w r7, [sp], #4 - 802d01c: 4770 bx lr + 802d042: bf00 nop + 802d044: 3714 adds r7, #20 + 802d046: 46bd mov sp, r7 + 802d048: f85d 7b04 ldr.w r7, [sp], #4 + 802d04c: 4770 bx lr -0802d01e : +0802d04e : * @param TTGlobTimeITs indicates which TT Global Time interrupts are signaled. * This parameter can be any combination of @arg FDCAN_TTGlobalTime_Interrupts. * @retval None */ __weak void HAL_FDCAN_TT_GlobalTimeCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTGlobTimeITs) { - 802d01e: b480 push {r7} - 802d020: b083 sub sp, #12 - 802d022: af00 add r7, sp, #0 - 802d024: 6078 str r0, [r7, #4] - 802d026: 6039 str r1, [r7, #0] + 802d04e: b480 push {r7} + 802d050: b083 sub sp, #12 + 802d052: af00 add r7, sp, #0 + 802d054: 6078 str r0, [r7, #4] + 802d056: 6039 str r1, [r7, #0] UNUSED(TTGlobTimeITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TT_GlobalTimeCallback could be implemented in the user file */ } - 802d028: bf00 nop - 802d02a: 370c adds r7, #12 - 802d02c: 46bd mov sp, r7 - 802d02e: f85d 7b04 ldr.w r7, [sp], #4 - 802d032: 4770 bx lr + 802d058: bf00 nop + 802d05a: 370c adds r7, #12 + 802d05c: 46bd mov sp, r7 + 802d05e: f85d 7b04 ldr.w r7, [sp], #4 + 802d062: 4770 bx lr -0802d034 : +0802d064 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval HAL status */ static HAL_StatusTypeDef FDCAN_CalcultateRamBlockAddresses(FDCAN_HandleTypeDef *hfdcan) { - 802d034: b480 push {r7} - 802d036: b085 sub sp, #20 - 802d038: af00 add r7, sp, #0 - 802d03a: 6078 str r0, [r7, #4] + 802d064: b480 push {r7} + 802d066: b085 sub sp, #20 + 802d068: af00 add r7, sp, #0 + 802d06a: 6078 str r0, [r7, #4] uint32_t RAMcounter; uint32_t StartAddress; StartAddress = hfdcan->Init.MessageRAMOffset; - 802d03c: 687b ldr r3, [r7, #4] - 802d03e: 6b5b ldr r3, [r3, #52] ; 0x34 - 802d040: 60bb str r3, [r7, #8] + 802d06c: 687b ldr r3, [r7, #4] + 802d06e: 6b5b ldr r3, [r3, #52] ; 0x34 + 802d070: 60bb str r3, [r7, #8] /* Standard filter list start address */ MODIFY_REG(hfdcan->Instance->SIDFC, FDCAN_SIDFC_FLSSA, (StartAddress << FDCAN_SIDFC_FLSSA_Pos)); - 802d042: 687b ldr r3, [r7, #4] - 802d044: 681b ldr r3, [r3, #0] - 802d046: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 - 802d04a: 4ba7 ldr r3, [pc, #668] ; (802d2e8 ) - 802d04c: 4013 ands r3, r2 - 802d04e: 68ba ldr r2, [r7, #8] - 802d050: 0091 lsls r1, r2, #2 - 802d052: 687a ldr r2, [r7, #4] - 802d054: 6812 ldr r2, [r2, #0] - 802d056: 430b orrs r3, r1 - 802d058: f8c2 3084 str.w r3, [r2, #132] ; 0x84 + 802d072: 687b ldr r3, [r7, #4] + 802d074: 681b ldr r3, [r3, #0] + 802d076: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 + 802d07a: 4ba7 ldr r3, [pc, #668] ; (802d318 ) + 802d07c: 4013 ands r3, r2 + 802d07e: 68ba ldr r2, [r7, #8] + 802d080: 0091 lsls r1, r2, #2 + 802d082: 687a ldr r2, [r7, #4] + 802d084: 6812 ldr r2, [r2, #0] + 802d086: 430b orrs r3, r1 + 802d088: f8c2 3084 str.w r3, [r2, #132] ; 0x84 /* Standard filter elements number */ MODIFY_REG(hfdcan->Instance->SIDFC, FDCAN_SIDFC_LSS, (hfdcan->Init.StdFiltersNbr << FDCAN_SIDFC_LSS_Pos)); - 802d05c: 687b ldr r3, [r7, #4] - 802d05e: 681b ldr r3, [r3, #0] - 802d060: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802d064: f423 017f bic.w r1, r3, #16711680 ; 0xff0000 - 802d068: 687b ldr r3, [r7, #4] - 802d06a: 6b9b ldr r3, [r3, #56] ; 0x38 - 802d06c: 041a lsls r2, r3, #16 - 802d06e: 687b ldr r3, [r7, #4] - 802d070: 681b ldr r3, [r3, #0] - 802d072: 430a orrs r2, r1 - 802d074: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802d08c: 687b ldr r3, [r7, #4] + 802d08e: 681b ldr r3, [r3, #0] + 802d090: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802d094: f423 017f bic.w r1, r3, #16711680 ; 0xff0000 + 802d098: 687b ldr r3, [r7, #4] + 802d09a: 6b9b ldr r3, [r3, #56] ; 0x38 + 802d09c: 041a lsls r2, r3, #16 + 802d09e: 687b ldr r3, [r7, #4] + 802d0a0: 681b ldr r3, [r3, #0] + 802d0a2: 430a orrs r2, r1 + 802d0a4: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Extended filter list start address */ StartAddress += hfdcan->Init.StdFiltersNbr; - 802d078: 687b ldr r3, [r7, #4] - 802d07a: 6b9b ldr r3, [r3, #56] ; 0x38 - 802d07c: 68ba ldr r2, [r7, #8] - 802d07e: 4413 add r3, r2 - 802d080: 60bb str r3, [r7, #8] + 802d0a8: 687b ldr r3, [r7, #4] + 802d0aa: 6b9b ldr r3, [r3, #56] ; 0x38 + 802d0ac: 68ba ldr r2, [r7, #8] + 802d0ae: 4413 add r3, r2 + 802d0b0: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->XIDFC, FDCAN_XIDFC_FLESA, (StartAddress << FDCAN_XIDFC_FLESA_Pos)); - 802d082: 687b ldr r3, [r7, #4] - 802d084: 681b ldr r3, [r3, #0] - 802d086: f8d3 2088 ldr.w r2, [r3, #136] ; 0x88 - 802d08a: 4b97 ldr r3, [pc, #604] ; (802d2e8 ) - 802d08c: 4013 ands r3, r2 - 802d08e: 68ba ldr r2, [r7, #8] - 802d090: 0091 lsls r1, r2, #2 - 802d092: 687a ldr r2, [r7, #4] - 802d094: 6812 ldr r2, [r2, #0] - 802d096: 430b orrs r3, r1 - 802d098: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 802d0b2: 687b ldr r3, [r7, #4] + 802d0b4: 681b ldr r3, [r3, #0] + 802d0b6: f8d3 2088 ldr.w r2, [r3, #136] ; 0x88 + 802d0ba: 4b97 ldr r3, [pc, #604] ; (802d318 ) + 802d0bc: 4013 ands r3, r2 + 802d0be: 68ba ldr r2, [r7, #8] + 802d0c0: 0091 lsls r1, r2, #2 + 802d0c2: 687a ldr r2, [r7, #4] + 802d0c4: 6812 ldr r2, [r2, #0] + 802d0c6: 430b orrs r3, r1 + 802d0c8: f8c2 3088 str.w r3, [r2, #136] ; 0x88 /* Extended filter elements number */ MODIFY_REG(hfdcan->Instance->XIDFC, FDCAN_XIDFC_LSE, (hfdcan->Init.ExtFiltersNbr << FDCAN_XIDFC_LSE_Pos)); - 802d09c: 687b ldr r3, [r7, #4] - 802d09e: 681b ldr r3, [r3, #0] - 802d0a0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802d0a4: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 - 802d0a8: 687b ldr r3, [r7, #4] - 802d0aa: 6bdb ldr r3, [r3, #60] ; 0x3c - 802d0ac: 041a lsls r2, r3, #16 - 802d0ae: 687b ldr r3, [r7, #4] - 802d0b0: 681b ldr r3, [r3, #0] - 802d0b2: 430a orrs r2, r1 - 802d0b4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802d0cc: 687b ldr r3, [r7, #4] + 802d0ce: 681b ldr r3, [r3, #0] + 802d0d0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802d0d4: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 + 802d0d8: 687b ldr r3, [r7, #4] + 802d0da: 6bdb ldr r3, [r3, #60] ; 0x3c + 802d0dc: 041a lsls r2, r3, #16 + 802d0de: 687b ldr r3, [r7, #4] + 802d0e0: 681b ldr r3, [r3, #0] + 802d0e2: 430a orrs r2, r1 + 802d0e4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Rx FIFO 0 start address */ StartAddress += (hfdcan->Init.ExtFiltersNbr * 2U); - 802d0b8: 687b ldr r3, [r7, #4] - 802d0ba: 6bdb ldr r3, [r3, #60] ; 0x3c - 802d0bc: 005b lsls r3, r3, #1 - 802d0be: 68ba ldr r2, [r7, #8] - 802d0c0: 4413 add r3, r2 - 802d0c2: 60bb str r3, [r7, #8] + 802d0e8: 687b ldr r3, [r7, #4] + 802d0ea: 6bdb ldr r3, [r3, #60] ; 0x3c + 802d0ec: 005b lsls r3, r3, #1 + 802d0ee: 68ba ldr r2, [r7, #8] + 802d0f0: 4413 add r3, r2 + 802d0f2: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->RXF0C, FDCAN_RXF0C_F0SA, (StartAddress << FDCAN_RXF0C_F0SA_Pos)); - 802d0c4: 687b ldr r3, [r7, #4] - 802d0c6: 681b ldr r3, [r3, #0] - 802d0c8: f8d3 20a0 ldr.w r2, [r3, #160] ; 0xa0 - 802d0cc: 4b86 ldr r3, [pc, #536] ; (802d2e8 ) - 802d0ce: 4013 ands r3, r2 - 802d0d0: 68ba ldr r2, [r7, #8] - 802d0d2: 0091 lsls r1, r2, #2 - 802d0d4: 687a ldr r2, [r7, #4] - 802d0d6: 6812 ldr r2, [r2, #0] - 802d0d8: 430b orrs r3, r1 - 802d0da: f8c2 30a0 str.w r3, [r2, #160] ; 0xa0 + 802d0f4: 687b ldr r3, [r7, #4] + 802d0f6: 681b ldr r3, [r3, #0] + 802d0f8: f8d3 20a0 ldr.w r2, [r3, #160] ; 0xa0 + 802d0fc: 4b86 ldr r3, [pc, #536] ; (802d318 ) + 802d0fe: 4013 ands r3, r2 + 802d100: 68ba ldr r2, [r7, #8] + 802d102: 0091 lsls r1, r2, #2 + 802d104: 687a ldr r2, [r7, #4] + 802d106: 6812 ldr r2, [r2, #0] + 802d108: 430b orrs r3, r1 + 802d10a: f8c2 30a0 str.w r3, [r2, #160] ; 0xa0 /* Rx FIFO 0 elements number */ MODIFY_REG(hfdcan->Instance->RXF0C, FDCAN_RXF0C_F0S, (hfdcan->Init.RxFifo0ElmtsNbr << FDCAN_RXF0C_F0S_Pos)); - 802d0de: 687b ldr r3, [r7, #4] - 802d0e0: 681b ldr r3, [r3, #0] - 802d0e2: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 802d0e6: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 - 802d0ea: 687b ldr r3, [r7, #4] - 802d0ec: 6c1b ldr r3, [r3, #64] ; 0x40 - 802d0ee: 041a lsls r2, r3, #16 - 802d0f0: 687b ldr r3, [r7, #4] - 802d0f2: 681b ldr r3, [r3, #0] - 802d0f4: 430a orrs r2, r1 - 802d0f6: f8c3 20a0 str.w r2, [r3, #160] ; 0xa0 + 802d10e: 687b ldr r3, [r7, #4] + 802d110: 681b ldr r3, [r3, #0] + 802d112: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 802d116: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 + 802d11a: 687b ldr r3, [r7, #4] + 802d11c: 6c1b ldr r3, [r3, #64] ; 0x40 + 802d11e: 041a lsls r2, r3, #16 + 802d120: 687b ldr r3, [r7, #4] + 802d122: 681b ldr r3, [r3, #0] + 802d124: 430a orrs r2, r1 + 802d126: f8c3 20a0 str.w r2, [r3, #160] ; 0xa0 /* Rx FIFO 1 start address */ StartAddress += (hfdcan->Init.RxFifo0ElmtsNbr * hfdcan->Init.RxFifo0ElmtSize); - 802d0fa: 687b ldr r3, [r7, #4] - 802d0fc: 6c1b ldr r3, [r3, #64] ; 0x40 - 802d0fe: 687a ldr r2, [r7, #4] - 802d100: 6c52 ldr r2, [r2, #68] ; 0x44 - 802d102: fb02 f303 mul.w r3, r2, r3 - 802d106: 68ba ldr r2, [r7, #8] - 802d108: 4413 add r3, r2 - 802d10a: 60bb str r3, [r7, #8] + 802d12a: 687b ldr r3, [r7, #4] + 802d12c: 6c1b ldr r3, [r3, #64] ; 0x40 + 802d12e: 687a ldr r2, [r7, #4] + 802d130: 6c52 ldr r2, [r2, #68] ; 0x44 + 802d132: fb02 f303 mul.w r3, r2, r3 + 802d136: 68ba ldr r2, [r7, #8] + 802d138: 4413 add r3, r2 + 802d13a: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->RXF1C, FDCAN_RXF1C_F1SA, (StartAddress << FDCAN_RXF1C_F1SA_Pos)); - 802d10c: 687b ldr r3, [r7, #4] - 802d10e: 681b ldr r3, [r3, #0] - 802d110: f8d3 20b0 ldr.w r2, [r3, #176] ; 0xb0 - 802d114: 4b74 ldr r3, [pc, #464] ; (802d2e8 ) - 802d116: 4013 ands r3, r2 - 802d118: 68ba ldr r2, [r7, #8] - 802d11a: 0091 lsls r1, r2, #2 - 802d11c: 687a ldr r2, [r7, #4] - 802d11e: 6812 ldr r2, [r2, #0] - 802d120: 430b orrs r3, r1 - 802d122: f8c2 30b0 str.w r3, [r2, #176] ; 0xb0 + 802d13c: 687b ldr r3, [r7, #4] + 802d13e: 681b ldr r3, [r3, #0] + 802d140: f8d3 20b0 ldr.w r2, [r3, #176] ; 0xb0 + 802d144: 4b74 ldr r3, [pc, #464] ; (802d318 ) + 802d146: 4013 ands r3, r2 + 802d148: 68ba ldr r2, [r7, #8] + 802d14a: 0091 lsls r1, r2, #2 + 802d14c: 687a ldr r2, [r7, #4] + 802d14e: 6812 ldr r2, [r2, #0] + 802d150: 430b orrs r3, r1 + 802d152: f8c2 30b0 str.w r3, [r2, #176] ; 0xb0 /* Rx FIFO 1 elements number */ MODIFY_REG(hfdcan->Instance->RXF1C, FDCAN_RXF1C_F1S, (hfdcan->Init.RxFifo1ElmtsNbr << FDCAN_RXF1C_F1S_Pos)); - 802d126: 687b ldr r3, [r7, #4] - 802d128: 681b ldr r3, [r3, #0] - 802d12a: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802d12e: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 - 802d132: 687b ldr r3, [r7, #4] - 802d134: 6c9b ldr r3, [r3, #72] ; 0x48 - 802d136: 041a lsls r2, r3, #16 - 802d138: 687b ldr r3, [r7, #4] - 802d13a: 681b ldr r3, [r3, #0] - 802d13c: 430a orrs r2, r1 - 802d13e: f8c3 20b0 str.w r2, [r3, #176] ; 0xb0 + 802d156: 687b ldr r3, [r7, #4] + 802d158: 681b ldr r3, [r3, #0] + 802d15a: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802d15e: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 + 802d162: 687b ldr r3, [r7, #4] + 802d164: 6c9b ldr r3, [r3, #72] ; 0x48 + 802d166: 041a lsls r2, r3, #16 + 802d168: 687b ldr r3, [r7, #4] + 802d16a: 681b ldr r3, [r3, #0] + 802d16c: 430a orrs r2, r1 + 802d16e: f8c3 20b0 str.w r2, [r3, #176] ; 0xb0 /* Rx buffer list start address */ StartAddress += (hfdcan->Init.RxFifo1ElmtsNbr * hfdcan->Init.RxFifo1ElmtSize); - 802d142: 687b ldr r3, [r7, #4] - 802d144: 6c9b ldr r3, [r3, #72] ; 0x48 - 802d146: 687a ldr r2, [r7, #4] - 802d148: 6cd2 ldr r2, [r2, #76] ; 0x4c - 802d14a: fb02 f303 mul.w r3, r2, r3 - 802d14e: 68ba ldr r2, [r7, #8] - 802d150: 4413 add r3, r2 - 802d152: 60bb str r3, [r7, #8] + 802d172: 687b ldr r3, [r7, #4] + 802d174: 6c9b ldr r3, [r3, #72] ; 0x48 + 802d176: 687a ldr r2, [r7, #4] + 802d178: 6cd2 ldr r2, [r2, #76] ; 0x4c + 802d17a: fb02 f303 mul.w r3, r2, r3 + 802d17e: 68ba ldr r2, [r7, #8] + 802d180: 4413 add r3, r2 + 802d182: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->RXBC, FDCAN_RXBC_RBSA, (StartAddress << FDCAN_RXBC_RBSA_Pos)); - 802d154: 687b ldr r3, [r7, #4] - 802d156: 681b ldr r3, [r3, #0] - 802d158: f8d3 20ac ldr.w r2, [r3, #172] ; 0xac - 802d15c: 4b62 ldr r3, [pc, #392] ; (802d2e8 ) - 802d15e: 4013 ands r3, r2 - 802d160: 68ba ldr r2, [r7, #8] - 802d162: 0091 lsls r1, r2, #2 - 802d164: 687a ldr r2, [r7, #4] - 802d166: 6812 ldr r2, [r2, #0] - 802d168: 430b orrs r3, r1 - 802d16a: f8c2 30ac str.w r3, [r2, #172] ; 0xac + 802d184: 687b ldr r3, [r7, #4] + 802d186: 681b ldr r3, [r3, #0] + 802d188: f8d3 20ac ldr.w r2, [r3, #172] ; 0xac + 802d18c: 4b62 ldr r3, [pc, #392] ; (802d318 ) + 802d18e: 4013 ands r3, r2 + 802d190: 68ba ldr r2, [r7, #8] + 802d192: 0091 lsls r1, r2, #2 + 802d194: 687a ldr r2, [r7, #4] + 802d196: 6812 ldr r2, [r2, #0] + 802d198: 430b orrs r3, r1 + 802d19a: f8c2 30ac str.w r3, [r2, #172] ; 0xac /* Tx event FIFO start address */ StartAddress += (hfdcan->Init.RxBuffersNbr * hfdcan->Init.RxBufferSize); - 802d16e: 687b ldr r3, [r7, #4] - 802d170: 6d1b ldr r3, [r3, #80] ; 0x50 - 802d172: 687a ldr r2, [r7, #4] - 802d174: 6d52 ldr r2, [r2, #84] ; 0x54 - 802d176: fb02 f303 mul.w r3, r2, r3 - 802d17a: 68ba ldr r2, [r7, #8] - 802d17c: 4413 add r3, r2 - 802d17e: 60bb str r3, [r7, #8] + 802d19e: 687b ldr r3, [r7, #4] + 802d1a0: 6d1b ldr r3, [r3, #80] ; 0x50 + 802d1a2: 687a ldr r2, [r7, #4] + 802d1a4: 6d52 ldr r2, [r2, #84] ; 0x54 + 802d1a6: fb02 f303 mul.w r3, r2, r3 + 802d1aa: 68ba ldr r2, [r7, #8] + 802d1ac: 4413 add r3, r2 + 802d1ae: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->TXEFC, FDCAN_TXEFC_EFSA, (StartAddress << FDCAN_TXEFC_EFSA_Pos)); - 802d180: 687b ldr r3, [r7, #4] - 802d182: 681b ldr r3, [r3, #0] - 802d184: f8d3 20f0 ldr.w r2, [r3, #240] ; 0xf0 - 802d188: 4b57 ldr r3, [pc, #348] ; (802d2e8 ) - 802d18a: 4013 ands r3, r2 - 802d18c: 68ba ldr r2, [r7, #8] - 802d18e: 0091 lsls r1, r2, #2 - 802d190: 687a ldr r2, [r7, #4] - 802d192: 6812 ldr r2, [r2, #0] - 802d194: 430b orrs r3, r1 - 802d196: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 802d1b0: 687b ldr r3, [r7, #4] + 802d1b2: 681b ldr r3, [r3, #0] + 802d1b4: f8d3 20f0 ldr.w r2, [r3, #240] ; 0xf0 + 802d1b8: 4b57 ldr r3, [pc, #348] ; (802d318 ) + 802d1ba: 4013 ands r3, r2 + 802d1bc: 68ba ldr r2, [r7, #8] + 802d1be: 0091 lsls r1, r2, #2 + 802d1c0: 687a ldr r2, [r7, #4] + 802d1c2: 6812 ldr r2, [r2, #0] + 802d1c4: 430b orrs r3, r1 + 802d1c6: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 /* Tx event FIFO elements number */ MODIFY_REG(hfdcan->Instance->TXEFC, FDCAN_TXEFC_EFS, (hfdcan->Init.TxEventsNbr << FDCAN_TXEFC_EFS_Pos)); - 802d19a: 687b ldr r3, [r7, #4] - 802d19c: 681b ldr r3, [r3, #0] - 802d19e: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 802d1a2: f423 117c bic.w r1, r3, #4128768 ; 0x3f0000 - 802d1a6: 687b ldr r3, [r7, #4] - 802d1a8: 6d9b ldr r3, [r3, #88] ; 0x58 - 802d1aa: 041a lsls r2, r3, #16 - 802d1ac: 687b ldr r3, [r7, #4] - 802d1ae: 681b ldr r3, [r3, #0] - 802d1b0: 430a orrs r2, r1 - 802d1b2: f8c3 20f0 str.w r2, [r3, #240] ; 0xf0 + 802d1ca: 687b ldr r3, [r7, #4] + 802d1cc: 681b ldr r3, [r3, #0] + 802d1ce: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 802d1d2: f423 117c bic.w r1, r3, #4128768 ; 0x3f0000 + 802d1d6: 687b ldr r3, [r7, #4] + 802d1d8: 6d9b ldr r3, [r3, #88] ; 0x58 + 802d1da: 041a lsls r2, r3, #16 + 802d1dc: 687b ldr r3, [r7, #4] + 802d1de: 681b ldr r3, [r3, #0] + 802d1e0: 430a orrs r2, r1 + 802d1e2: f8c3 20f0 str.w r2, [r3, #240] ; 0xf0 /* Tx buffer list start address */ StartAddress += (hfdcan->Init.TxEventsNbr * 2U); - 802d1b6: 687b ldr r3, [r7, #4] - 802d1b8: 6d9b ldr r3, [r3, #88] ; 0x58 - 802d1ba: 005b lsls r3, r3, #1 - 802d1bc: 68ba ldr r2, [r7, #8] - 802d1be: 4413 add r3, r2 - 802d1c0: 60bb str r3, [r7, #8] + 802d1e6: 687b ldr r3, [r7, #4] + 802d1e8: 6d9b ldr r3, [r3, #88] ; 0x58 + 802d1ea: 005b lsls r3, r3, #1 + 802d1ec: 68ba ldr r2, [r7, #8] + 802d1ee: 4413 add r3, r2 + 802d1f0: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->TXBC, FDCAN_TXBC_TBSA, (StartAddress << FDCAN_TXBC_TBSA_Pos)); - 802d1c2: 687b ldr r3, [r7, #4] - 802d1c4: 681b ldr r3, [r3, #0] - 802d1c6: f8d3 20c0 ldr.w r2, [r3, #192] ; 0xc0 - 802d1ca: 4b47 ldr r3, [pc, #284] ; (802d2e8 ) - 802d1cc: 4013 ands r3, r2 - 802d1ce: 68ba ldr r2, [r7, #8] - 802d1d0: 0091 lsls r1, r2, #2 - 802d1d2: 687a ldr r2, [r7, #4] - 802d1d4: 6812 ldr r2, [r2, #0] - 802d1d6: 430b orrs r3, r1 - 802d1d8: f8c2 30c0 str.w r3, [r2, #192] ; 0xc0 + 802d1f2: 687b ldr r3, [r7, #4] + 802d1f4: 681b ldr r3, [r3, #0] + 802d1f6: f8d3 20c0 ldr.w r2, [r3, #192] ; 0xc0 + 802d1fa: 4b47 ldr r3, [pc, #284] ; (802d318 ) + 802d1fc: 4013 ands r3, r2 + 802d1fe: 68ba ldr r2, [r7, #8] + 802d200: 0091 lsls r1, r2, #2 + 802d202: 687a ldr r2, [r7, #4] + 802d204: 6812 ldr r2, [r2, #0] + 802d206: 430b orrs r3, r1 + 802d208: f8c2 30c0 str.w r3, [r2, #192] ; 0xc0 /* Dedicated Tx buffers number */ MODIFY_REG(hfdcan->Instance->TXBC, FDCAN_TXBC_NDTB, (hfdcan->Init.TxBuffersNbr << FDCAN_TXBC_NDTB_Pos)); - 802d1dc: 687b ldr r3, [r7, #4] - 802d1de: 681b ldr r3, [r3, #0] - 802d1e0: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802d1e4: f423 117c bic.w r1, r3, #4128768 ; 0x3f0000 - 802d1e8: 687b ldr r3, [r7, #4] - 802d1ea: 6ddb ldr r3, [r3, #92] ; 0x5c - 802d1ec: 041a lsls r2, r3, #16 - 802d1ee: 687b ldr r3, [r7, #4] - 802d1f0: 681b ldr r3, [r3, #0] - 802d1f2: 430a orrs r2, r1 - 802d1f4: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 + 802d20c: 687b ldr r3, [r7, #4] + 802d20e: 681b ldr r3, [r3, #0] + 802d210: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802d214: f423 117c bic.w r1, r3, #4128768 ; 0x3f0000 + 802d218: 687b ldr r3, [r7, #4] + 802d21a: 6ddb ldr r3, [r3, #92] ; 0x5c + 802d21c: 041a lsls r2, r3, #16 + 802d21e: 687b ldr r3, [r7, #4] + 802d220: 681b ldr r3, [r3, #0] + 802d222: 430a orrs r2, r1 + 802d224: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 /* Tx FIFO/queue elements number */ MODIFY_REG(hfdcan->Instance->TXBC, FDCAN_TXBC_TFQS, (hfdcan->Init.TxFifoQueueElmtsNbr << FDCAN_TXBC_TFQS_Pos)); - 802d1f8: 687b ldr r3, [r7, #4] - 802d1fa: 681b ldr r3, [r3, #0] - 802d1fc: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802d200: f023 517c bic.w r1, r3, #1056964608 ; 0x3f000000 - 802d204: 687b ldr r3, [r7, #4] - 802d206: 6e1b ldr r3, [r3, #96] ; 0x60 - 802d208: 061a lsls r2, r3, #24 - 802d20a: 687b ldr r3, [r7, #4] - 802d20c: 681b ldr r3, [r3, #0] - 802d20e: 430a orrs r2, r1 - 802d210: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 + 802d228: 687b ldr r3, [r7, #4] + 802d22a: 681b ldr r3, [r3, #0] + 802d22c: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802d230: f023 517c bic.w r1, r3, #1056964608 ; 0x3f000000 + 802d234: 687b ldr r3, [r7, #4] + 802d236: 6e1b ldr r3, [r3, #96] ; 0x60 + 802d238: 061a lsls r2, r3, #24 + 802d23a: 687b ldr r3, [r7, #4] + 802d23c: 681b ldr r3, [r3, #0] + 802d23e: 430a orrs r2, r1 + 802d240: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 hfdcan->msgRam.StandardFilterSA = SRAMCAN_BASE + (hfdcan->Init.MessageRAMOffset * 4U); - 802d214: 687b ldr r3, [r7, #4] - 802d216: 6b5a ldr r2, [r3, #52] ; 0x34 - 802d218: 4b34 ldr r3, [pc, #208] ; (802d2ec ) - 802d21a: 4413 add r3, r2 - 802d21c: 009a lsls r2, r3, #2 - 802d21e: 687b ldr r3, [r7, #4] - 802d220: 66da str r2, [r3, #108] ; 0x6c + 802d244: 687b ldr r3, [r7, #4] + 802d246: 6b5a ldr r2, [r3, #52] ; 0x34 + 802d248: 4b34 ldr r3, [pc, #208] ; (802d31c ) + 802d24a: 4413 add r3, r2 + 802d24c: 009a lsls r2, r3, #2 + 802d24e: 687b ldr r3, [r7, #4] + 802d250: 66da str r2, [r3, #108] ; 0x6c hfdcan->msgRam.ExtendedFilterSA = hfdcan->msgRam.StandardFilterSA + (hfdcan->Init.StdFiltersNbr * 4U); - 802d222: 687b ldr r3, [r7, #4] - 802d224: 6eda ldr r2, [r3, #108] ; 0x6c - 802d226: 687b ldr r3, [r7, #4] - 802d228: 6b9b ldr r3, [r3, #56] ; 0x38 - 802d22a: 009b lsls r3, r3, #2 - 802d22c: 441a add r2, r3 - 802d22e: 687b ldr r3, [r7, #4] - 802d230: 671a str r2, [r3, #112] ; 0x70 - hfdcan->msgRam.RxFIFO0SA = hfdcan->msgRam.ExtendedFilterSA + (hfdcan->Init.ExtFiltersNbr * 2U * 4U); - 802d232: 687b ldr r3, [r7, #4] - 802d234: 6f1a ldr r2, [r3, #112] ; 0x70 - 802d236: 687b ldr r3, [r7, #4] - 802d238: 6bdb ldr r3, [r3, #60] ; 0x3c - 802d23a: 00db lsls r3, r3, #3 - 802d23c: 441a add r2, r3 - 802d23e: 687b ldr r3, [r7, #4] - 802d240: 675a str r2, [r3, #116] ; 0x74 - hfdcan->msgRam.RxFIFO1SA = hfdcan->msgRam.RxFIFO0SA + (hfdcan->Init.RxFifo0ElmtsNbr * hfdcan->Init.RxFifo0ElmtSize * 4U); - 802d242: 687b ldr r3, [r7, #4] - 802d244: 6f5a ldr r2, [r3, #116] ; 0x74 - 802d246: 687b ldr r3, [r7, #4] - 802d248: 6c1b ldr r3, [r3, #64] ; 0x40 - 802d24a: 6879 ldr r1, [r7, #4] - 802d24c: 6c49 ldr r1, [r1, #68] ; 0x44 - 802d24e: fb01 f303 mul.w r3, r1, r3 - 802d252: 009b lsls r3, r3, #2 - 802d254: 441a add r2, r3 + 802d252: 687b ldr r3, [r7, #4] + 802d254: 6eda ldr r2, [r3, #108] ; 0x6c 802d256: 687b ldr r3, [r7, #4] - 802d258: 679a str r2, [r3, #120] ; 0x78 - hfdcan->msgRam.RxBufferSA = hfdcan->msgRam.RxFIFO1SA + (hfdcan->Init.RxFifo1ElmtsNbr * hfdcan->Init.RxFifo1ElmtSize * 4U); - 802d25a: 687b ldr r3, [r7, #4] - 802d25c: 6f9a ldr r2, [r3, #120] ; 0x78 + 802d258: 6b9b ldr r3, [r3, #56] ; 0x38 + 802d25a: 009b lsls r3, r3, #2 + 802d25c: 441a add r2, r3 802d25e: 687b ldr r3, [r7, #4] - 802d260: 6c9b ldr r3, [r3, #72] ; 0x48 - 802d262: 6879 ldr r1, [r7, #4] - 802d264: 6cc9 ldr r1, [r1, #76] ; 0x4c - 802d266: fb01 f303 mul.w r3, r1, r3 - 802d26a: 009b lsls r3, r3, #2 + 802d260: 671a str r2, [r3, #112] ; 0x70 + hfdcan->msgRam.RxFIFO0SA = hfdcan->msgRam.ExtendedFilterSA + (hfdcan->Init.ExtFiltersNbr * 2U * 4U); + 802d262: 687b ldr r3, [r7, #4] + 802d264: 6f1a ldr r2, [r3, #112] ; 0x70 + 802d266: 687b ldr r3, [r7, #4] + 802d268: 6bdb ldr r3, [r3, #60] ; 0x3c + 802d26a: 00db lsls r3, r3, #3 802d26c: 441a add r2, r3 802d26e: 687b ldr r3, [r7, #4] - 802d270: 67da str r2, [r3, #124] ; 0x7c - hfdcan->msgRam.TxEventFIFOSA = hfdcan->msgRam.RxBufferSA + (hfdcan->Init.RxBuffersNbr * hfdcan->Init.RxBufferSize * 4U); + 802d270: 675a str r2, [r3, #116] ; 0x74 + hfdcan->msgRam.RxFIFO1SA = hfdcan->msgRam.RxFIFO0SA + (hfdcan->Init.RxFifo0ElmtsNbr * hfdcan->Init.RxFifo0ElmtSize * 4U); 802d272: 687b ldr r3, [r7, #4] - 802d274: 6fda ldr r2, [r3, #124] ; 0x7c + 802d274: 6f5a ldr r2, [r3, #116] ; 0x74 802d276: 687b ldr r3, [r7, #4] - 802d278: 6d1b ldr r3, [r3, #80] ; 0x50 + 802d278: 6c1b ldr r3, [r3, #64] ; 0x40 802d27a: 6879 ldr r1, [r7, #4] - 802d27c: 6d49 ldr r1, [r1, #84] ; 0x54 + 802d27c: 6c49 ldr r1, [r1, #68] ; 0x44 802d27e: fb01 f303 mul.w r3, r1, r3 802d282: 009b lsls r3, r3, #2 802d284: 441a add r2, r3 802d286: 687b ldr r3, [r7, #4] - 802d288: f8c3 2080 str.w r2, [r3, #128] ; 0x80 - hfdcan->msgRam.TxBufferSA = hfdcan->msgRam.TxEventFIFOSA + (hfdcan->Init.TxEventsNbr * 2U * 4U); - 802d28c: 687b ldr r3, [r7, #4] - 802d28e: f8d3 2080 ldr.w r2, [r3, #128] ; 0x80 - 802d292: 687b ldr r3, [r7, #4] - 802d294: 6d9b ldr r3, [r3, #88] ; 0x58 - 802d296: 00db lsls r3, r3, #3 - 802d298: 441a add r2, r3 - 802d29a: 687b ldr r3, [r7, #4] - 802d29c: f8c3 2084 str.w r2, [r3, #132] ; 0x84 - hfdcan->msgRam.TxFIFOQSA = hfdcan->msgRam.TxBufferSA + (hfdcan->Init.TxBuffersNbr * hfdcan->Init.TxElmtSize * 4U); - 802d2a0: 687b ldr r3, [r7, #4] - 802d2a2: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 + 802d288: 679a str r2, [r3, #120] ; 0x78 + hfdcan->msgRam.RxBufferSA = hfdcan->msgRam.RxFIFO1SA + (hfdcan->Init.RxFifo1ElmtsNbr * hfdcan->Init.RxFifo1ElmtSize * 4U); + 802d28a: 687b ldr r3, [r7, #4] + 802d28c: 6f9a ldr r2, [r3, #120] ; 0x78 + 802d28e: 687b ldr r3, [r7, #4] + 802d290: 6c9b ldr r3, [r3, #72] ; 0x48 + 802d292: 6879 ldr r1, [r7, #4] + 802d294: 6cc9 ldr r1, [r1, #76] ; 0x4c + 802d296: fb01 f303 mul.w r3, r1, r3 + 802d29a: 009b lsls r3, r3, #2 + 802d29c: 441a add r2, r3 + 802d29e: 687b ldr r3, [r7, #4] + 802d2a0: 67da str r2, [r3, #124] ; 0x7c + hfdcan->msgRam.TxEventFIFOSA = hfdcan->msgRam.RxBufferSA + (hfdcan->Init.RxBuffersNbr * hfdcan->Init.RxBufferSize * 4U); + 802d2a2: 687b ldr r3, [r7, #4] + 802d2a4: 6fda ldr r2, [r3, #124] ; 0x7c 802d2a6: 687b ldr r3, [r7, #4] - 802d2a8: 6ddb ldr r3, [r3, #92] ; 0x5c + 802d2a8: 6d1b ldr r3, [r3, #80] ; 0x50 802d2aa: 6879 ldr r1, [r7, #4] - 802d2ac: 6e89 ldr r1, [r1, #104] ; 0x68 + 802d2ac: 6d49 ldr r1, [r1, #84] ; 0x54 802d2ae: fb01 f303 mul.w r3, r1, r3 802d2b2: 009b lsls r3, r3, #2 802d2b4: 441a add r2, r3 802d2b6: 687b ldr r3, [r7, #4] - 802d2b8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 - - hfdcan->msgRam.EndAddress = hfdcan->msgRam.TxFIFOQSA + (hfdcan->Init.TxFifoQueueElmtsNbr * hfdcan->Init.TxElmtSize * 4U); + 802d2b8: f8c3 2080 str.w r2, [r3, #128] ; 0x80 + hfdcan->msgRam.TxBufferSA = hfdcan->msgRam.TxEventFIFOSA + (hfdcan->Init.TxEventsNbr * 2U * 4U); 802d2bc: 687b ldr r3, [r7, #4] - 802d2be: f8d3 2088 ldr.w r2, [r3, #136] ; 0x88 + 802d2be: f8d3 2080 ldr.w r2, [r3, #128] ; 0x80 802d2c2: 687b ldr r3, [r7, #4] - 802d2c4: 6e1b ldr r3, [r3, #96] ; 0x60 - 802d2c6: 6879 ldr r1, [r7, #4] - 802d2c8: 6e89 ldr r1, [r1, #104] ; 0x68 - 802d2ca: fb01 f303 mul.w r3, r1, r3 - 802d2ce: 009b lsls r3, r3, #2 - 802d2d0: 441a add r2, r3 - 802d2d2: 687b ldr r3, [r7, #4] - 802d2d4: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 802d2c4: 6d9b ldr r3, [r3, #88] ; 0x58 + 802d2c6: 00db lsls r3, r3, #3 + 802d2c8: 441a add r2, r3 + 802d2ca: 687b ldr r3, [r7, #4] + 802d2cc: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + hfdcan->msgRam.TxFIFOQSA = hfdcan->msgRam.TxBufferSA + (hfdcan->Init.TxBuffersNbr * hfdcan->Init.TxElmtSize * 4U); + 802d2d0: 687b ldr r3, [r7, #4] + 802d2d2: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 + 802d2d6: 687b ldr r3, [r7, #4] + 802d2d8: 6ddb ldr r3, [r3, #92] ; 0x5c + 802d2da: 6879 ldr r1, [r7, #4] + 802d2dc: 6e89 ldr r1, [r1, #104] ; 0x68 + 802d2de: fb01 f303 mul.w r3, r1, r3 + 802d2e2: 009b lsls r3, r3, #2 + 802d2e4: 441a add r2, r3 + 802d2e6: 687b ldr r3, [r7, #4] + 802d2e8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + + hfdcan->msgRam.EndAddress = hfdcan->msgRam.TxFIFOQSA + (hfdcan->Init.TxFifoQueueElmtsNbr * hfdcan->Init.TxElmtSize * 4U); + 802d2ec: 687b ldr r3, [r7, #4] + 802d2ee: f8d3 2088 ldr.w r2, [r3, #136] ; 0x88 + 802d2f2: 687b ldr r3, [r7, #4] + 802d2f4: 6e1b ldr r3, [r3, #96] ; 0x60 + 802d2f6: 6879 ldr r1, [r7, #4] + 802d2f8: 6e89 ldr r1, [r1, #104] ; 0x68 + 802d2fa: fb01 f303 mul.w r3, r1, r3 + 802d2fe: 009b lsls r3, r3, #2 + 802d300: 441a add r2, r3 + 802d302: 687b ldr r3, [r7, #4] + 802d304: f8c3 2090 str.w r2, [r3, #144] ; 0x90 if (hfdcan->msgRam.EndAddress > FDCAN_MESSAGE_RAM_END_ADDRESS) /* Last address of the Message RAM */ - 802d2d8: 687b ldr r3, [r7, #4] - 802d2da: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802d2de: 4a04 ldr r2, [pc, #16] ; (802d2f0 ) - 802d2e0: 4293 cmp r3, r2 - 802d2e2: d915 bls.n 802d310 - 802d2e4: e006 b.n 802d2f4 - 802d2e6: bf00 nop - 802d2e8: ffff0003 .word 0xffff0003 - 802d2ec: 10002b00 .word 0x10002b00 - 802d2f0: 4000d3fc .word 0x4000d3fc + 802d308: 687b ldr r3, [r7, #4] + 802d30a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802d30e: 4a04 ldr r2, [pc, #16] ; (802d320 ) + 802d310: 4293 cmp r3, r2 + 802d312: d915 bls.n 802d340 + 802d314: e006 b.n 802d324 + 802d316: bf00 nop + 802d318: ffff0003 .word 0xffff0003 + 802d31c: 10002b00 .word 0x10002b00 + 802d320: 4000d3fc .word 0x4000d3fc { /* Update error code. Message RAM overflow */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802d2f4: 687b ldr r3, [r7, #4] - 802d2f6: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802d2fa: f043 0220 orr.w r2, r3, #32 - 802d2fe: 687b ldr r3, [r7, #4] - 802d300: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802d324: 687b ldr r3, [r7, #4] + 802d326: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802d32a: f043 0220 orr.w r2, r3, #32 + 802d32e: 687b ldr r3, [r7, #4] + 802d330: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Change FDCAN state */ hfdcan->State = HAL_FDCAN_STATE_ERROR; - 802d304: 687b ldr r3, [r7, #4] - 802d306: 2203 movs r2, #3 - 802d308: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802d334: 687b ldr r3, [r7, #4] + 802d336: 2203 movs r2, #3 + 802d338: f883 2098 strb.w r2, [r3, #152] ; 0x98 return HAL_ERROR; - 802d30c: 2301 movs r3, #1 - 802d30e: e010 b.n 802d332 + 802d33c: 2301 movs r3, #1 + 802d33e: e010 b.n 802d362 } else { /* Flush the allocated Message RAM area */ for (RAMcounter = hfdcan->msgRam.StandardFilterSA; RAMcounter < hfdcan->msgRam.EndAddress; RAMcounter += 4U) - 802d310: 687b ldr r3, [r7, #4] - 802d312: 6edb ldr r3, [r3, #108] ; 0x6c - 802d314: 60fb str r3, [r7, #12] - 802d316: e005 b.n 802d324 + 802d340: 687b ldr r3, [r7, #4] + 802d342: 6edb ldr r3, [r3, #108] ; 0x6c + 802d344: 60fb str r3, [r7, #12] + 802d346: e005 b.n 802d354 { *(uint32_t *)(RAMcounter) = 0x00000000; - 802d318: 68fb ldr r3, [r7, #12] - 802d31a: 2200 movs r2, #0 - 802d31c: 601a str r2, [r3, #0] + 802d348: 68fb ldr r3, [r7, #12] + 802d34a: 2200 movs r2, #0 + 802d34c: 601a str r2, [r3, #0] for (RAMcounter = hfdcan->msgRam.StandardFilterSA; RAMcounter < hfdcan->msgRam.EndAddress; RAMcounter += 4U) - 802d31e: 68fb ldr r3, [r7, #12] - 802d320: 3304 adds r3, #4 - 802d322: 60fb str r3, [r7, #12] - 802d324: 687b ldr r3, [r7, #4] - 802d326: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802d32a: 68fa ldr r2, [r7, #12] - 802d32c: 429a cmp r2, r3 - 802d32e: d3f3 bcc.n 802d318 + 802d34e: 68fb ldr r3, [r7, #12] + 802d350: 3304 adds r3, #4 + 802d352: 60fb str r3, [r7, #12] + 802d354: 687b ldr r3, [r7, #4] + 802d356: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802d35a: 68fa ldr r2, [r7, #12] + 802d35c: 429a cmp r2, r3 + 802d35e: d3f3 bcc.n 802d348 } } /* Return function status */ return HAL_OK; - 802d330: 2300 movs r3, #0 + 802d360: 2300 movs r3, #0 } - 802d332: 4618 mov r0, r3 - 802d334: 3714 adds r7, #20 - 802d336: 46bd mov sp, r7 - 802d338: f85d 7b04 ldr.w r7, [sp], #4 - 802d33c: 4770 bx lr - 802d33e: bf00 nop + 802d362: 4618 mov r0, r3 + 802d364: 3714 adds r7, #20 + 802d366: 46bd mov sp, r7 + 802d368: f85d 7b04 ldr.w r7, [sp], #4 + 802d36c: 4770 bx lr + 802d36e: bf00 nop -0802d340 : +0802d370 : * @param pTxData pointer to a buffer containing the payload of the Tx frame. * @param BufferIndex index of the buffer to be configured. * @retval HAL status */ static void FDCAN_CopyMessageToRAM(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData, uint32_t BufferIndex) { - 802d340: b480 push {r7} - 802d342: b089 sub sp, #36 ; 0x24 - 802d344: af00 add r7, sp, #0 - 802d346: 60f8 str r0, [r7, #12] - 802d348: 60b9 str r1, [r7, #8] - 802d34a: 607a str r2, [r7, #4] - 802d34c: 603b str r3, [r7, #0] + 802d370: b480 push {r7} + 802d372: b089 sub sp, #36 ; 0x24 + 802d374: af00 add r7, sp, #0 + 802d376: 60f8 str r0, [r7, #12] + 802d378: 60b9 str r1, [r7, #8] + 802d37a: 607a str r2, [r7, #4] + 802d37c: 603b str r3, [r7, #0] uint32_t TxElementW2; uint32_t *TxAddress; uint32_t ByteCounter; /* Build first word of Tx header element */ if (pTxHeader->IdType == FDCAN_STANDARD_ID) - 802d34e: 68bb ldr r3, [r7, #8] - 802d350: 685b ldr r3, [r3, #4] - 802d352: 2b00 cmp r3, #0 - 802d354: d10a bne.n 802d36c + 802d37e: 68bb ldr r3, [r7, #8] + 802d380: 685b ldr r3, [r3, #4] + 802d382: 2b00 cmp r3, #0 + 802d384: d10a bne.n 802d39c { TxElementW1 = (pTxHeader->ErrorStateIndicator | - 802d356: 68bb ldr r3, [r7, #8] - 802d358: 691a ldr r2, [r3, #16] + 802d386: 68bb ldr r3, [r7, #8] + 802d388: 691a ldr r2, [r3, #16] FDCAN_STANDARD_ID | pTxHeader->TxFrameType | - 802d35a: 68bb ldr r3, [r7, #8] - 802d35c: 689b ldr r3, [r3, #8] + 802d38a: 68bb ldr r3, [r7, #8] + 802d38c: 689b ldr r3, [r3, #8] FDCAN_STANDARD_ID | - 802d35e: 431a orrs r2, r3 + 802d38e: 431a orrs r2, r3 (pTxHeader->Identifier << 18)); - 802d360: 68bb ldr r3, [r7, #8] - 802d362: 681b ldr r3, [r3, #0] - 802d364: 049b lsls r3, r3, #18 + 802d390: 68bb ldr r3, [r7, #8] + 802d392: 681b ldr r3, [r3, #0] + 802d394: 049b lsls r3, r3, #18 TxElementW1 = (pTxHeader->ErrorStateIndicator | - 802d366: 4313 orrs r3, r2 - 802d368: 61fb str r3, [r7, #28] - 802d36a: e00a b.n 802d382 + 802d396: 4313 orrs r3, r2 + 802d398: 61fb str r3, [r7, #28] + 802d39a: e00a b.n 802d3b2 } else /* pTxHeader->IdType == FDCAN_EXTENDED_ID */ { TxElementW1 = (pTxHeader->ErrorStateIndicator | - 802d36c: 68bb ldr r3, [r7, #8] - 802d36e: 691a ldr r2, [r3, #16] + 802d39c: 68bb ldr r3, [r7, #8] + 802d39e: 691a ldr r2, [r3, #16] FDCAN_EXTENDED_ID | pTxHeader->TxFrameType | - 802d370: 68bb ldr r3, [r7, #8] - 802d372: 689b ldr r3, [r3, #8] + 802d3a0: 68bb ldr r3, [r7, #8] + 802d3a2: 689b ldr r3, [r3, #8] FDCAN_EXTENDED_ID | - 802d374: 431a orrs r2, r3 + 802d3a4: 431a orrs r2, r3 pTxHeader->Identifier); - 802d376: 68bb ldr r3, [r7, #8] - 802d378: 681b ldr r3, [r3, #0] + 802d3a6: 68bb ldr r3, [r7, #8] + 802d3a8: 681b ldr r3, [r3, #0] pTxHeader->TxFrameType | - 802d37a: 4313 orrs r3, r2 + 802d3aa: 4313 orrs r3, r2 TxElementW1 = (pTxHeader->ErrorStateIndicator | - 802d37c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 - 802d380: 61fb str r3, [r7, #28] + 802d3ac: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 + 802d3b0: 61fb str r3, [r7, #28] } /* Build second word of Tx header element */ TxElementW2 = ((pTxHeader->MessageMarker << 24) | - 802d382: 68bb ldr r3, [r7, #8] - 802d384: 6a1b ldr r3, [r3, #32] - 802d386: 061a lsls r2, r3, #24 + 802d3b2: 68bb ldr r3, [r7, #8] + 802d3b4: 6a1b ldr r3, [r3, #32] + 802d3b6: 061a lsls r2, r3, #24 pTxHeader->TxEventFifoControl | - 802d388: 68bb ldr r3, [r7, #8] - 802d38a: 69db ldr r3, [r3, #28] + 802d3b8: 68bb ldr r3, [r7, #8] + 802d3ba: 69db ldr r3, [r3, #28] TxElementW2 = ((pTxHeader->MessageMarker << 24) | - 802d38c: 431a orrs r2, r3 + 802d3bc: 431a orrs r2, r3 pTxHeader->FDFormat | - 802d38e: 68bb ldr r3, [r7, #8] - 802d390: 699b ldr r3, [r3, #24] + 802d3be: 68bb ldr r3, [r7, #8] + 802d3c0: 699b ldr r3, [r3, #24] pTxHeader->TxEventFifoControl | - 802d392: 431a orrs r2, r3 + 802d3c2: 431a orrs r2, r3 pTxHeader->BitRateSwitch | - 802d394: 68bb ldr r3, [r7, #8] - 802d396: 695b ldr r3, [r3, #20] + 802d3c4: 68bb ldr r3, [r7, #8] + 802d3c6: 695b ldr r3, [r3, #20] pTxHeader->FDFormat | - 802d398: 431a orrs r2, r3 + 802d3c8: 431a orrs r2, r3 pTxHeader->DataLength); - 802d39a: 68bb ldr r3, [r7, #8] - 802d39c: 68db ldr r3, [r3, #12] + 802d3ca: 68bb ldr r3, [r7, #8] + 802d3cc: 68db ldr r3, [r3, #12] TxElementW2 = ((pTxHeader->MessageMarker << 24) | - 802d39e: 4313 orrs r3, r2 - 802d3a0: 613b str r3, [r7, #16] + 802d3ce: 4313 orrs r3, r2 + 802d3d0: 613b str r3, [r7, #16] /* Calculate Tx element address */ TxAddress = (uint32_t *)(hfdcan->msgRam.TxBufferSA + (BufferIndex * hfdcan->Init.TxElmtSize * 4U)); - 802d3a2: 68fb ldr r3, [r7, #12] - 802d3a4: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 - 802d3a8: 68fb ldr r3, [r7, #12] - 802d3aa: 6e9b ldr r3, [r3, #104] ; 0x68 - 802d3ac: 6839 ldr r1, [r7, #0] - 802d3ae: fb01 f303 mul.w r3, r1, r3 - 802d3b2: 009b lsls r3, r3, #2 - 802d3b4: 4413 add r3, r2 - 802d3b6: 61bb str r3, [r7, #24] + 802d3d2: 68fb ldr r3, [r7, #12] + 802d3d4: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 + 802d3d8: 68fb ldr r3, [r7, #12] + 802d3da: 6e9b ldr r3, [r3, #104] ; 0x68 + 802d3dc: 6839 ldr r1, [r7, #0] + 802d3de: fb01 f303 mul.w r3, r1, r3 + 802d3e2: 009b lsls r3, r3, #2 + 802d3e4: 4413 add r3, r2 + 802d3e6: 61bb str r3, [r7, #24] /* Write Tx element header to the message RAM */ *TxAddress = TxElementW1; - 802d3b8: 69bb ldr r3, [r7, #24] - 802d3ba: 69fa ldr r2, [r7, #28] - 802d3bc: 601a str r2, [r3, #0] + 802d3e8: 69bb ldr r3, [r7, #24] + 802d3ea: 69fa ldr r2, [r7, #28] + 802d3ec: 601a str r2, [r3, #0] TxAddress++; - 802d3be: 69bb ldr r3, [r7, #24] - 802d3c0: 3304 adds r3, #4 - 802d3c2: 61bb str r3, [r7, #24] + 802d3ee: 69bb ldr r3, [r7, #24] + 802d3f0: 3304 adds r3, #4 + 802d3f2: 61bb str r3, [r7, #24] *TxAddress = TxElementW2; - 802d3c4: 69bb ldr r3, [r7, #24] - 802d3c6: 693a ldr r2, [r7, #16] - 802d3c8: 601a str r2, [r3, #0] + 802d3f4: 69bb ldr r3, [r7, #24] + 802d3f6: 693a ldr r2, [r7, #16] + 802d3f8: 601a str r2, [r3, #0] TxAddress++; - 802d3ca: 69bb ldr r3, [r7, #24] - 802d3cc: 3304 adds r3, #4 - 802d3ce: 61bb str r3, [r7, #24] + 802d3fa: 69bb ldr r3, [r7, #24] + 802d3fc: 3304 adds r3, #4 + 802d3fe: 61bb str r3, [r7, #24] /* Write Tx payload to the message RAM */ for (ByteCounter = 0; ByteCounter < DLCtoBytes[pTxHeader->DataLength >> 16]; ByteCounter += 4U) - 802d3d0: 2300 movs r3, #0 - 802d3d2: 617b str r3, [r7, #20] - 802d3d4: e020 b.n 802d418 + 802d400: 2300 movs r3, #0 + 802d402: 617b str r3, [r7, #20] + 802d404: e020 b.n 802d448 { *TxAddress = (((uint32_t)pTxData[ByteCounter + 3U] << 24) | - 802d3d6: 697b ldr r3, [r7, #20] - 802d3d8: 3303 adds r3, #3 - 802d3da: 687a ldr r2, [r7, #4] - 802d3dc: 4413 add r3, r2 - 802d3de: 781b ldrb r3, [r3, #0] - 802d3e0: 061a lsls r2, r3, #24 + 802d406: 697b ldr r3, [r7, #20] + 802d408: 3303 adds r3, #3 + 802d40a: 687a ldr r2, [r7, #4] + 802d40c: 4413 add r3, r2 + 802d40e: 781b ldrb r3, [r3, #0] + 802d410: 061a lsls r2, r3, #24 ((uint32_t)pTxData[ByteCounter + 2U] << 16) | - 802d3e2: 697b ldr r3, [r7, #20] - 802d3e4: 3302 adds r3, #2 - 802d3e6: 6879 ldr r1, [r7, #4] - 802d3e8: 440b add r3, r1 - 802d3ea: 781b ldrb r3, [r3, #0] - 802d3ec: 041b lsls r3, r3, #16 + 802d412: 697b ldr r3, [r7, #20] + 802d414: 3302 adds r3, #2 + 802d416: 6879 ldr r1, [r7, #4] + 802d418: 440b add r3, r1 + 802d41a: 781b ldrb r3, [r3, #0] + 802d41c: 041b lsls r3, r3, #16 *TxAddress = (((uint32_t)pTxData[ByteCounter + 3U] << 24) | - 802d3ee: 431a orrs r2, r3 + 802d41e: 431a orrs r2, r3 ((uint32_t)pTxData[ByteCounter + 1U] << 8) | - 802d3f0: 697b ldr r3, [r7, #20] - 802d3f2: 3301 adds r3, #1 - 802d3f4: 6879 ldr r1, [r7, #4] - 802d3f6: 440b add r3, r1 - 802d3f8: 781b ldrb r3, [r3, #0] - 802d3fa: 021b lsls r3, r3, #8 + 802d420: 697b ldr r3, [r7, #20] + 802d422: 3301 adds r3, #1 + 802d424: 6879 ldr r1, [r7, #4] + 802d426: 440b add r3, r1 + 802d428: 781b ldrb r3, [r3, #0] + 802d42a: 021b lsls r3, r3, #8 ((uint32_t)pTxData[ByteCounter + 2U] << 16) | - 802d3fc: 4313 orrs r3, r2 + 802d42c: 4313 orrs r3, r2 (uint32_t)pTxData[ByteCounter]); - 802d3fe: 6879 ldr r1, [r7, #4] - 802d400: 697a ldr r2, [r7, #20] - 802d402: 440a add r2, r1 - 802d404: 7812 ldrb r2, [r2, #0] + 802d42e: 6879 ldr r1, [r7, #4] + 802d430: 697a ldr r2, [r7, #20] + 802d432: 440a add r2, r1 + 802d434: 7812 ldrb r2, [r2, #0] ((uint32_t)pTxData[ByteCounter + 1U] << 8) | - 802d406: 431a orrs r2, r3 + 802d436: 431a orrs r2, r3 *TxAddress = (((uint32_t)pTxData[ByteCounter + 3U] << 24) | - 802d408: 69bb ldr r3, [r7, #24] - 802d40a: 601a str r2, [r3, #0] + 802d438: 69bb ldr r3, [r7, #24] + 802d43a: 601a str r2, [r3, #0] TxAddress++; - 802d40c: 69bb ldr r3, [r7, #24] - 802d40e: 3304 adds r3, #4 - 802d410: 61bb str r3, [r7, #24] + 802d43c: 69bb ldr r3, [r7, #24] + 802d43e: 3304 adds r3, #4 + 802d440: 61bb str r3, [r7, #24] for (ByteCounter = 0; ByteCounter < DLCtoBytes[pTxHeader->DataLength >> 16]; ByteCounter += 4U) - 802d412: 697b ldr r3, [r7, #20] - 802d414: 3304 adds r3, #4 - 802d416: 617b str r3, [r7, #20] - 802d418: 68bb ldr r3, [r7, #8] - 802d41a: 68db ldr r3, [r3, #12] - 802d41c: 0c1b lsrs r3, r3, #16 - 802d41e: 4a06 ldr r2, [pc, #24] ; (802d438 ) - 802d420: 5cd3 ldrb r3, [r2, r3] - 802d422: 461a mov r2, r3 - 802d424: 697b ldr r3, [r7, #20] - 802d426: 4293 cmp r3, r2 - 802d428: d3d5 bcc.n 802d3d6 - } -} - 802d42a: bf00 nop - 802d42c: bf00 nop - 802d42e: 3724 adds r7, #36 ; 0x24 - 802d430: 46bd mov sp, r7 - 802d432: f85d 7b04 ldr.w r7, [sp], #4 - 802d436: 4770 bx lr - 802d438: 08044cbc .word 0x08044cbc - -0802d43c : + 802d442: 697b ldr r3, [r7, #20] + 802d444: 3304 adds r3, #4 + 802d446: 617b str r3, [r7, #20] + 802d448: 68bb ldr r3, [r7, #8] + 802d44a: 68db ldr r3, [r3, #12] + 802d44c: 0c1b lsrs r3, r3, #16 + 802d44e: 4a06 ldr r2, [pc, #24] ; (802d468 ) + 802d450: 5cd3 ldrb r3, [r2, r3] + 802d452: 461a mov r2, r3 + 802d454: 697b ldr r3, [r7, #20] + 802d456: 4293 cmp r3, r2 + 802d458: d3d5 bcc.n 802d406 + } +} + 802d45a: bf00 nop + 802d45c: bf00 nop + 802d45e: 3724 adds r7, #36 ; 0x24 + 802d460: 46bd mov sp, r7 + 802d462: f85d 7b04 ldr.w r7, [sp], #4 + 802d466: 4770 bx lr + 802d468: 08044cec .word 0x08044cec + +0802d46c : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 802d43c: b480 push {r7} - 802d43e: b089 sub sp, #36 ; 0x24 - 802d440: af00 add r7, sp, #0 - 802d442: 6078 str r0, [r7, #4] - 802d444: 6039 str r1, [r7, #0] + 802d46c: b480 push {r7} + 802d46e: b089 sub sp, #36 ; 0x24 + 802d470: af00 add r7, sp, #0 + 802d472: 6078 str r0, [r7, #4] + 802d474: 6039 str r1, [r7, #0] uint32_t position = 0x00U; - 802d446: 2300 movs r3, #0 - 802d448: 61fb str r3, [r7, #28] + 802d476: 2300 movs r3, #0 + 802d478: 61fb str r3, [r7, #28] EXTI_Core_TypeDef *EXTI_CurrentCPU; #if defined(DUAL_CORE) && defined(CORE_CM4) EXTI_CurrentCPU = EXTI_D2; /* EXTI for CM4 CPU */ #else EXTI_CurrentCPU = EXTI_D1; /* EXTI for CM7 CPU */ - 802d44a: 4b89 ldr r3, [pc, #548] ; (802d670 ) - 802d44c: 617b str r3, [r7, #20] + 802d47a: 4b89 ldr r3, [pc, #548] ; (802d6a0 ) + 802d47c: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00U) - 802d44e: e194 b.n 802d77a + 802d47e: e194 b.n 802d7aa { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1UL << position); - 802d450: 683b ldr r3, [r7, #0] - 802d452: 681a ldr r2, [r3, #0] - 802d454: 2101 movs r1, #1 - 802d456: 69fb ldr r3, [r7, #28] - 802d458: fa01 f303 lsl.w r3, r1, r3 - 802d45c: 4013 ands r3, r2 - 802d45e: 613b str r3, [r7, #16] + 802d480: 683b ldr r3, [r7, #0] + 802d482: 681a ldr r2, [r3, #0] + 802d484: 2101 movs r1, #1 + 802d486: 69fb ldr r3, [r7, #28] + 802d488: fa01 f303 lsl.w r3, r1, r3 + 802d48c: 4013 ands r3, r2 + 802d48e: 613b str r3, [r7, #16] if (iocurrent != 0x00U) - 802d460: 693b ldr r3, [r7, #16] - 802d462: 2b00 cmp r3, #0 - 802d464: f000 8186 beq.w 802d774 + 802d490: 693b ldr r3, [r7, #16] + 802d492: 2b00 cmp r3, #0 + 802d494: f000 8186 beq.w 802d7a4 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 802d468: 683b ldr r3, [r7, #0] - 802d46a: 685b ldr r3, [r3, #4] - 802d46c: f003 0303 and.w r3, r3, #3 - 802d470: 2b01 cmp r3, #1 - 802d472: d005 beq.n 802d480 - 802d474: 683b ldr r3, [r7, #0] - 802d476: 685b ldr r3, [r3, #4] - 802d478: f003 0303 and.w r3, r3, #3 - 802d47c: 2b02 cmp r3, #2 - 802d47e: d130 bne.n 802d4e2 + 802d498: 683b ldr r3, [r7, #0] + 802d49a: 685b ldr r3, [r3, #4] + 802d49c: f003 0303 and.w r3, r3, #3 + 802d4a0: 2b01 cmp r3, #1 + 802d4a2: d005 beq.n 802d4b0 + 802d4a4: 683b ldr r3, [r7, #0] + 802d4a6: 685b ldr r3, [r3, #4] + 802d4a8: f003 0303 and.w r3, r3, #3 + 802d4ac: 2b02 cmp r3, #2 + 802d4ae: d130 bne.n 802d512 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 802d480: 687b ldr r3, [r7, #4] - 802d482: 689b ldr r3, [r3, #8] - 802d484: 61bb str r3, [r7, #24] + 802d4b0: 687b ldr r3, [r7, #4] + 802d4b2: 689b ldr r3, [r3, #8] + 802d4b4: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U)); - 802d486: 69fb ldr r3, [r7, #28] - 802d488: 005b lsls r3, r3, #1 - 802d48a: 2203 movs r2, #3 - 802d48c: fa02 f303 lsl.w r3, r2, r3 - 802d490: 43db mvns r3, r3 - 802d492: 69ba ldr r2, [r7, #24] - 802d494: 4013 ands r3, r2 - 802d496: 61bb str r3, [r7, #24] + 802d4b6: 69fb ldr r3, [r7, #28] + 802d4b8: 005b lsls r3, r3, #1 + 802d4ba: 2203 movs r2, #3 + 802d4bc: fa02 f303 lsl.w r3, r2, r3 + 802d4c0: 43db mvns r3, r3 + 802d4c2: 69ba ldr r2, [r7, #24] + 802d4c4: 4013 ands r3, r2 + 802d4c6: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); - 802d498: 683b ldr r3, [r7, #0] - 802d49a: 68da ldr r2, [r3, #12] - 802d49c: 69fb ldr r3, [r7, #28] - 802d49e: 005b lsls r3, r3, #1 - 802d4a0: fa02 f303 lsl.w r3, r2, r3 - 802d4a4: 69ba ldr r2, [r7, #24] - 802d4a6: 4313 orrs r3, r2 - 802d4a8: 61bb str r3, [r7, #24] + 802d4c8: 683b ldr r3, [r7, #0] + 802d4ca: 68da ldr r2, [r3, #12] + 802d4cc: 69fb ldr r3, [r7, #28] + 802d4ce: 005b lsls r3, r3, #1 + 802d4d0: fa02 f303 lsl.w r3, r2, r3 + 802d4d4: 69ba ldr r2, [r7, #24] + 802d4d6: 4313 orrs r3, r2 + 802d4d8: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; - 802d4aa: 687b ldr r3, [r7, #4] - 802d4ac: 69ba ldr r2, [r7, #24] - 802d4ae: 609a str r2, [r3, #8] + 802d4da: 687b ldr r3, [r7, #4] + 802d4dc: 69ba ldr r2, [r7, #24] + 802d4de: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 802d4b0: 687b ldr r3, [r7, #4] - 802d4b2: 685b ldr r3, [r3, #4] - 802d4b4: 61bb str r3, [r7, #24] + 802d4e0: 687b ldr r3, [r7, #4] + 802d4e2: 685b ldr r3, [r3, #4] + 802d4e4: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT0 << position) ; - 802d4b6: 2201 movs r2, #1 - 802d4b8: 69fb ldr r3, [r7, #28] - 802d4ba: fa02 f303 lsl.w r3, r2, r3 - 802d4be: 43db mvns r3, r3 - 802d4c0: 69ba ldr r2, [r7, #24] - 802d4c2: 4013 ands r3, r2 - 802d4c4: 61bb str r3, [r7, #24] + 802d4e6: 2201 movs r2, #1 + 802d4e8: 69fb ldr r3, [r7, #28] + 802d4ea: fa02 f303 lsl.w r3, r2, r3 + 802d4ee: 43db mvns r3, r3 + 802d4f0: 69ba ldr r2, [r7, #24] + 802d4f2: 4013 ands r3, r2 + 802d4f4: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 802d4c6: 683b ldr r3, [r7, #0] - 802d4c8: 685b ldr r3, [r3, #4] - 802d4ca: 091b lsrs r3, r3, #4 - 802d4cc: f003 0201 and.w r2, r3, #1 - 802d4d0: 69fb ldr r3, [r7, #28] - 802d4d2: fa02 f303 lsl.w r3, r2, r3 - 802d4d6: 69ba ldr r2, [r7, #24] - 802d4d8: 4313 orrs r3, r2 - 802d4da: 61bb str r3, [r7, #24] + 802d4f6: 683b ldr r3, [r7, #0] + 802d4f8: 685b ldr r3, [r3, #4] + 802d4fa: 091b lsrs r3, r3, #4 + 802d4fc: f003 0201 and.w r2, r3, #1 + 802d500: 69fb ldr r3, [r7, #28] + 802d502: fa02 f303 lsl.w r3, r2, r3 + 802d506: 69ba ldr r2, [r7, #24] + 802d508: 4313 orrs r3, r2 + 802d50a: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; - 802d4dc: 687b ldr r3, [r7, #4] - 802d4de: 69ba ldr r2, [r7, #24] - 802d4e0: 605a str r2, [r3, #4] + 802d50c: 687b ldr r3, [r7, #4] + 802d50e: 69ba ldr r2, [r7, #24] + 802d510: 605a str r2, [r3, #4] } if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 802d4e2: 683b ldr r3, [r7, #0] - 802d4e4: 685b ldr r3, [r3, #4] - 802d4e6: f003 0303 and.w r3, r3, #3 - 802d4ea: 2b03 cmp r3, #3 - 802d4ec: d017 beq.n 802d51e + 802d512: 683b ldr r3, [r7, #0] + 802d514: 685b ldr r3, [r3, #4] + 802d516: f003 0303 and.w r3, r3, #3 + 802d51a: 2b03 cmp r3, #3 + 802d51c: d017 beq.n 802d54e { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 802d4ee: 687b ldr r3, [r7, #4] - 802d4f0: 68db ldr r3, [r3, #12] - 802d4f2: 61bb str r3, [r7, #24] + 802d51e: 687b ldr r3, [r7, #4] + 802d520: 68db ldr r3, [r3, #12] + 802d522: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); - 802d4f4: 69fb ldr r3, [r7, #28] - 802d4f6: 005b lsls r3, r3, #1 - 802d4f8: 2203 movs r2, #3 - 802d4fa: fa02 f303 lsl.w r3, r2, r3 - 802d4fe: 43db mvns r3, r3 - 802d500: 69ba ldr r2, [r7, #24] - 802d502: 4013 ands r3, r2 - 802d504: 61bb str r3, [r7, #24] + 802d524: 69fb ldr r3, [r7, #28] + 802d526: 005b lsls r3, r3, #1 + 802d528: 2203 movs r2, #3 + 802d52a: fa02 f303 lsl.w r3, r2, r3 + 802d52e: 43db mvns r3, r3 + 802d530: 69ba ldr r2, [r7, #24] + 802d532: 4013 ands r3, r2 + 802d534: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); - 802d506: 683b ldr r3, [r7, #0] - 802d508: 689a ldr r2, [r3, #8] - 802d50a: 69fb ldr r3, [r7, #28] - 802d50c: 005b lsls r3, r3, #1 - 802d50e: fa02 f303 lsl.w r3, r2, r3 - 802d512: 69ba ldr r2, [r7, #24] - 802d514: 4313 orrs r3, r2 - 802d516: 61bb str r3, [r7, #24] + 802d536: 683b ldr r3, [r7, #0] + 802d538: 689a ldr r2, [r3, #8] + 802d53a: 69fb ldr r3, [r7, #28] + 802d53c: 005b lsls r3, r3, #1 + 802d53e: fa02 f303 lsl.w r3, r2, r3 + 802d542: 69ba ldr r2, [r7, #24] + 802d544: 4313 orrs r3, r2 + 802d546: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; - 802d518: 687b ldr r3, [r7, #4] - 802d51a: 69ba ldr r2, [r7, #24] - 802d51c: 60da str r2, [r3, #12] + 802d548: 687b ldr r3, [r7, #4] + 802d54a: 69ba ldr r2, [r7, #24] + 802d54c: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 802d51e: 683b ldr r3, [r7, #0] - 802d520: 685b ldr r3, [r3, #4] - 802d522: f003 0303 and.w r3, r3, #3 - 802d526: 2b02 cmp r3, #2 - 802d528: d123 bne.n 802d572 + 802d54e: 683b ldr r3, [r7, #0] + 802d550: 685b ldr r3, [r3, #4] + 802d552: f003 0303 and.w r3, r3, #3 + 802d556: 2b02 cmp r3, #2 + 802d558: d123 bne.n 802d5a2 /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; - 802d52a: 69fb ldr r3, [r7, #28] - 802d52c: 08da lsrs r2, r3, #3 - 802d52e: 687b ldr r3, [r7, #4] - 802d530: 3208 adds r2, #8 - 802d532: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802d536: 61bb str r3, [r7, #24] + 802d55a: 69fb ldr r3, [r7, #28] + 802d55c: 08da lsrs r2, r3, #3 + 802d55e: 687b ldr r3, [r7, #4] + 802d560: 3208 adds r2, #8 + 802d562: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802d566: 61bb str r3, [r7, #24] temp &= ~(0xFU << ((position & 0x07U) * 4U)); - 802d538: 69fb ldr r3, [r7, #28] - 802d53a: f003 0307 and.w r3, r3, #7 - 802d53e: 009b lsls r3, r3, #2 - 802d540: 220f movs r2, #15 - 802d542: fa02 f303 lsl.w r3, r2, r3 - 802d546: 43db mvns r3, r3 - 802d548: 69ba ldr r2, [r7, #24] - 802d54a: 4013 ands r3, r2 - 802d54c: 61bb str r3, [r7, #24] + 802d568: 69fb ldr r3, [r7, #28] + 802d56a: f003 0307 and.w r3, r3, #7 + 802d56e: 009b lsls r3, r3, #2 + 802d570: 220f movs r2, #15 + 802d572: fa02 f303 lsl.w r3, r2, r3 + 802d576: 43db mvns r3, r3 + 802d578: 69ba ldr r2, [r7, #24] + 802d57a: 4013 ands r3, r2 + 802d57c: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Alternate) << ((position & 0x07U) * 4U)); - 802d54e: 683b ldr r3, [r7, #0] - 802d550: 691a ldr r2, [r3, #16] - 802d552: 69fb ldr r3, [r7, #28] - 802d554: f003 0307 and.w r3, r3, #7 - 802d558: 009b lsls r3, r3, #2 - 802d55a: fa02 f303 lsl.w r3, r2, r3 - 802d55e: 69ba ldr r2, [r7, #24] - 802d560: 4313 orrs r3, r2 - 802d562: 61bb str r3, [r7, #24] + 802d57e: 683b ldr r3, [r7, #0] + 802d580: 691a ldr r2, [r3, #16] + 802d582: 69fb ldr r3, [r7, #28] + 802d584: f003 0307 and.w r3, r3, #7 + 802d588: 009b lsls r3, r3, #2 + 802d58a: fa02 f303 lsl.w r3, r2, r3 + 802d58e: 69ba ldr r2, [r7, #24] + 802d590: 4313 orrs r3, r2 + 802d592: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3U] = temp; - 802d564: 69fb ldr r3, [r7, #28] - 802d566: 08da lsrs r2, r3, #3 - 802d568: 687b ldr r3, [r7, #4] - 802d56a: 3208 adds r2, #8 - 802d56c: 69b9 ldr r1, [r7, #24] - 802d56e: f843 1022 str.w r1, [r3, r2, lsl #2] + 802d594: 69fb ldr r3, [r7, #28] + 802d596: 08da lsrs r2, r3, #3 + 802d598: 687b ldr r3, [r7, #4] + 802d59a: 3208 adds r2, #8 + 802d59c: 69b9 ldr r1, [r7, #24] + 802d59e: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 802d572: 687b ldr r3, [r7, #4] - 802d574: 681b ldr r3, [r3, #0] - 802d576: 61bb str r3, [r7, #24] + 802d5a2: 687b ldr r3, [r7, #4] + 802d5a4: 681b ldr r3, [r3, #0] + 802d5a6: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODE0 << (position * 2U)); - 802d578: 69fb ldr r3, [r7, #28] - 802d57a: 005b lsls r3, r3, #1 - 802d57c: 2203 movs r2, #3 - 802d57e: fa02 f303 lsl.w r3, r2, r3 - 802d582: 43db mvns r3, r3 - 802d584: 69ba ldr r2, [r7, #24] - 802d586: 4013 ands r3, r2 - 802d588: 61bb str r3, [r7, #24] + 802d5a8: 69fb ldr r3, [r7, #28] + 802d5aa: 005b lsls r3, r3, #1 + 802d5ac: 2203 movs r2, #3 + 802d5ae: fa02 f303 lsl.w r3, r2, r3 + 802d5b2: 43db mvns r3, r3 + 802d5b4: 69ba ldr r2, [r7, #24] + 802d5b6: 4013 ands r3, r2 + 802d5b8: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); - 802d58a: 683b ldr r3, [r7, #0] - 802d58c: 685b ldr r3, [r3, #4] - 802d58e: f003 0203 and.w r2, r3, #3 - 802d592: 69fb ldr r3, [r7, #28] - 802d594: 005b lsls r3, r3, #1 - 802d596: fa02 f303 lsl.w r3, r2, r3 - 802d59a: 69ba ldr r2, [r7, #24] - 802d59c: 4313 orrs r3, r2 - 802d59e: 61bb str r3, [r7, #24] + 802d5ba: 683b ldr r3, [r7, #0] + 802d5bc: 685b ldr r3, [r3, #4] + 802d5be: f003 0203 and.w r2, r3, #3 + 802d5c2: 69fb ldr r3, [r7, #28] + 802d5c4: 005b lsls r3, r3, #1 + 802d5c6: fa02 f303 lsl.w r3, r2, r3 + 802d5ca: 69ba ldr r2, [r7, #24] + 802d5cc: 4313 orrs r3, r2 + 802d5ce: 61bb str r3, [r7, #24] GPIOx->MODER = temp; - 802d5a0: 687b ldr r3, [r7, #4] - 802d5a2: 69ba ldr r2, [r7, #24] - 802d5a4: 601a str r2, [r3, #0] + 802d5d0: 687b ldr r3, [r7, #4] + 802d5d2: 69ba ldr r2, [r7, #24] + 802d5d4: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U) - 802d5a6: 683b ldr r3, [r7, #0] - 802d5a8: 685b ldr r3, [r3, #4] - 802d5aa: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 802d5ae: 2b00 cmp r3, #0 - 802d5b0: f000 80e0 beq.w 802d774 + 802d5d6: 683b ldr r3, [r7, #0] + 802d5d8: 685b ldr r3, [r3, #4] + 802d5da: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 802d5de: 2b00 cmp r3, #0 + 802d5e0: f000 80e0 beq.w 802d7a4 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 802d5b4: 4b2f ldr r3, [pc, #188] ; (802d674 ) - 802d5b6: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 802d5ba: 4a2e ldr r2, [pc, #184] ; (802d674 ) - 802d5bc: f043 0302 orr.w r3, r3, #2 - 802d5c0: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 - 802d5c4: 4b2b ldr r3, [pc, #172] ; (802d674 ) - 802d5c6: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 802d5ca: f003 0302 and.w r3, r3, #2 - 802d5ce: 60fb str r3, [r7, #12] - 802d5d0: 68fb ldr r3, [r7, #12] + 802d5e4: 4b2f ldr r3, [pc, #188] ; (802d6a4 ) + 802d5e6: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 802d5ea: 4a2e ldr r2, [pc, #184] ; (802d6a4 ) + 802d5ec: f043 0302 orr.w r3, r3, #2 + 802d5f0: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 + 802d5f4: 4b2b ldr r3, [pc, #172] ; (802d6a4 ) + 802d5f6: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 802d5fa: f003 0302 and.w r3, r3, #2 + 802d5fe: 60fb str r3, [r7, #12] + 802d600: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; - 802d5d2: 4a29 ldr r2, [pc, #164] ; (802d678 ) - 802d5d4: 69fb ldr r3, [r7, #28] - 802d5d6: 089b lsrs r3, r3, #2 - 802d5d8: 3302 adds r3, #2 - 802d5da: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 802d5de: 61bb str r3, [r7, #24] + 802d602: 4a29 ldr r2, [pc, #164] ; (802d6a8 ) + 802d604: 69fb ldr r3, [r7, #28] + 802d606: 089b lsrs r3, r3, #2 + 802d608: 3302 adds r3, #2 + 802d60a: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 802d60e: 61bb str r3, [r7, #24] temp &= ~(0x0FUL << (4U * (position & 0x03U))); - 802d5e0: 69fb ldr r3, [r7, #28] - 802d5e2: f003 0303 and.w r3, r3, #3 - 802d5e6: 009b lsls r3, r3, #2 - 802d5e8: 220f movs r2, #15 - 802d5ea: fa02 f303 lsl.w r3, r2, r3 - 802d5ee: 43db mvns r3, r3 - 802d5f0: 69ba ldr r2, [r7, #24] - 802d5f2: 4013 ands r3, r2 - 802d5f4: 61bb str r3, [r7, #24] + 802d610: 69fb ldr r3, [r7, #28] + 802d612: f003 0303 and.w r3, r3, #3 + 802d616: 009b lsls r3, r3, #2 + 802d618: 220f movs r2, #15 + 802d61a: fa02 f303 lsl.w r3, r2, r3 + 802d61e: 43db mvns r3, r3 + 802d620: 69ba ldr r2, [r7, #24] + 802d622: 4013 ands r3, r2 + 802d624: 61bb str r3, [r7, #24] temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U))); - 802d5f6: 687b ldr r3, [r7, #4] - 802d5f8: 4a20 ldr r2, [pc, #128] ; (802d67c ) - 802d5fa: 4293 cmp r3, r2 - 802d5fc: d052 beq.n 802d6a4 - 802d5fe: 687b ldr r3, [r7, #4] - 802d600: 4a1f ldr r2, [pc, #124] ; (802d680 ) - 802d602: 4293 cmp r3, r2 - 802d604: d031 beq.n 802d66a - 802d606: 687b ldr r3, [r7, #4] - 802d608: 4a1e ldr r2, [pc, #120] ; (802d684 ) - 802d60a: 4293 cmp r3, r2 - 802d60c: d02b beq.n 802d666 - 802d60e: 687b ldr r3, [r7, #4] - 802d610: 4a1d ldr r2, [pc, #116] ; (802d688 ) - 802d612: 4293 cmp r3, r2 - 802d614: d025 beq.n 802d662 - 802d616: 687b ldr r3, [r7, #4] - 802d618: 4a1c ldr r2, [pc, #112] ; (802d68c ) - 802d61a: 4293 cmp r3, r2 - 802d61c: d01f beq.n 802d65e - 802d61e: 687b ldr r3, [r7, #4] - 802d620: 4a1b ldr r2, [pc, #108] ; (802d690 ) - 802d622: 4293 cmp r3, r2 - 802d624: d019 beq.n 802d65a 802d626: 687b ldr r3, [r7, #4] - 802d628: 4a1a ldr r2, [pc, #104] ; (802d694 ) + 802d628: 4a20 ldr r2, [pc, #128] ; (802d6ac ) 802d62a: 4293 cmp r3, r2 - 802d62c: d013 beq.n 802d656 + 802d62c: d052 beq.n 802d6d4 802d62e: 687b ldr r3, [r7, #4] - 802d630: 4a19 ldr r2, [pc, #100] ; (802d698 ) + 802d630: 4a1f ldr r2, [pc, #124] ; (802d6b0 ) 802d632: 4293 cmp r3, r2 - 802d634: d00d beq.n 802d652 + 802d634: d031 beq.n 802d69a 802d636: 687b ldr r3, [r7, #4] - 802d638: 4a18 ldr r2, [pc, #96] ; (802d69c ) + 802d638: 4a1e ldr r2, [pc, #120] ; (802d6b4 ) 802d63a: 4293 cmp r3, r2 - 802d63c: d007 beq.n 802d64e + 802d63c: d02b beq.n 802d696 802d63e: 687b ldr r3, [r7, #4] - 802d640: 4a17 ldr r2, [pc, #92] ; (802d6a0 ) + 802d640: 4a1d ldr r2, [pc, #116] ; (802d6b8 ) 802d642: 4293 cmp r3, r2 - 802d644: d101 bne.n 802d64a - 802d646: 2309 movs r3, #9 - 802d648: e02d b.n 802d6a6 - 802d64a: 230a movs r3, #10 - 802d64c: e02b b.n 802d6a6 - 802d64e: 2308 movs r3, #8 - 802d650: e029 b.n 802d6a6 - 802d652: 2307 movs r3, #7 - 802d654: e027 b.n 802d6a6 - 802d656: 2306 movs r3, #6 - 802d658: e025 b.n 802d6a6 - 802d65a: 2305 movs r3, #5 - 802d65c: e023 b.n 802d6a6 - 802d65e: 2304 movs r3, #4 - 802d660: e021 b.n 802d6a6 - 802d662: 2303 movs r3, #3 - 802d664: e01f b.n 802d6a6 - 802d666: 2302 movs r3, #2 - 802d668: e01d b.n 802d6a6 - 802d66a: 2301 movs r3, #1 - 802d66c: e01b b.n 802d6a6 - 802d66e: bf00 nop - 802d670: 58000080 .word 0x58000080 - 802d674: 58024400 .word 0x58024400 - 802d678: 58000400 .word 0x58000400 - 802d67c: 58020000 .word 0x58020000 - 802d680: 58020400 .word 0x58020400 - 802d684: 58020800 .word 0x58020800 - 802d688: 58020c00 .word 0x58020c00 - 802d68c: 58021000 .word 0x58021000 - 802d690: 58021400 .word 0x58021400 - 802d694: 58021800 .word 0x58021800 - 802d698: 58021c00 .word 0x58021c00 - 802d69c: 58022000 .word 0x58022000 - 802d6a0: 58022400 .word 0x58022400 - 802d6a4: 2300 movs r3, #0 - 802d6a6: 69fa ldr r2, [r7, #28] - 802d6a8: f002 0203 and.w r2, r2, #3 - 802d6ac: 0092 lsls r2, r2, #2 - 802d6ae: 4093 lsls r3, r2 - 802d6b0: 69ba ldr r2, [r7, #24] - 802d6b2: 4313 orrs r3, r2 - 802d6b4: 61bb str r3, [r7, #24] + 802d644: d025 beq.n 802d692 + 802d646: 687b ldr r3, [r7, #4] + 802d648: 4a1c ldr r2, [pc, #112] ; (802d6bc ) + 802d64a: 4293 cmp r3, r2 + 802d64c: d01f beq.n 802d68e + 802d64e: 687b ldr r3, [r7, #4] + 802d650: 4a1b ldr r2, [pc, #108] ; (802d6c0 ) + 802d652: 4293 cmp r3, r2 + 802d654: d019 beq.n 802d68a + 802d656: 687b ldr r3, [r7, #4] + 802d658: 4a1a ldr r2, [pc, #104] ; (802d6c4 ) + 802d65a: 4293 cmp r3, r2 + 802d65c: d013 beq.n 802d686 + 802d65e: 687b ldr r3, [r7, #4] + 802d660: 4a19 ldr r2, [pc, #100] ; (802d6c8 ) + 802d662: 4293 cmp r3, r2 + 802d664: d00d beq.n 802d682 + 802d666: 687b ldr r3, [r7, #4] + 802d668: 4a18 ldr r2, [pc, #96] ; (802d6cc ) + 802d66a: 4293 cmp r3, r2 + 802d66c: d007 beq.n 802d67e + 802d66e: 687b ldr r3, [r7, #4] + 802d670: 4a17 ldr r2, [pc, #92] ; (802d6d0 ) + 802d672: 4293 cmp r3, r2 + 802d674: d101 bne.n 802d67a + 802d676: 2309 movs r3, #9 + 802d678: e02d b.n 802d6d6 + 802d67a: 230a movs r3, #10 + 802d67c: e02b b.n 802d6d6 + 802d67e: 2308 movs r3, #8 + 802d680: e029 b.n 802d6d6 + 802d682: 2307 movs r3, #7 + 802d684: e027 b.n 802d6d6 + 802d686: 2306 movs r3, #6 + 802d688: e025 b.n 802d6d6 + 802d68a: 2305 movs r3, #5 + 802d68c: e023 b.n 802d6d6 + 802d68e: 2304 movs r3, #4 + 802d690: e021 b.n 802d6d6 + 802d692: 2303 movs r3, #3 + 802d694: e01f b.n 802d6d6 + 802d696: 2302 movs r3, #2 + 802d698: e01d b.n 802d6d6 + 802d69a: 2301 movs r3, #1 + 802d69c: e01b b.n 802d6d6 + 802d69e: bf00 nop + 802d6a0: 58000080 .word 0x58000080 + 802d6a4: 58024400 .word 0x58024400 + 802d6a8: 58000400 .word 0x58000400 + 802d6ac: 58020000 .word 0x58020000 + 802d6b0: 58020400 .word 0x58020400 + 802d6b4: 58020800 .word 0x58020800 + 802d6b8: 58020c00 .word 0x58020c00 + 802d6bc: 58021000 .word 0x58021000 + 802d6c0: 58021400 .word 0x58021400 + 802d6c4: 58021800 .word 0x58021800 + 802d6c8: 58021c00 .word 0x58021c00 + 802d6cc: 58022000 .word 0x58022000 + 802d6d0: 58022400 .word 0x58022400 + 802d6d4: 2300 movs r3, #0 + 802d6d6: 69fa ldr r2, [r7, #28] + 802d6d8: f002 0203 and.w r2, r2, #3 + 802d6dc: 0092 lsls r2, r2, #2 + 802d6de: 4093 lsls r3, r2 + 802d6e0: 69ba ldr r2, [r7, #24] + 802d6e2: 4313 orrs r3, r2 + 802d6e4: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2U] = temp; - 802d6b6: 4938 ldr r1, [pc, #224] ; (802d798 ) - 802d6b8: 69fb ldr r3, [r7, #28] - 802d6ba: 089b lsrs r3, r3, #2 - 802d6bc: 3302 adds r3, #2 - 802d6be: 69ba ldr r2, [r7, #24] - 802d6c0: f841 2023 str.w r2, [r1, r3, lsl #2] + 802d6e6: 4938 ldr r1, [pc, #224] ; (802d7c8 ) + 802d6e8: 69fb ldr r3, [r7, #28] + 802d6ea: 089b lsrs r3, r3, #2 + 802d6ec: 3302 adds r3, #2 + 802d6ee: 69ba ldr r2, [r7, #24] + 802d6f0: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR1; - 802d6c4: f04f 43b0 mov.w r3, #1476395008 ; 0x58000000 - 802d6c8: 681b ldr r3, [r3, #0] - 802d6ca: 61bb str r3, [r7, #24] + 802d6f4: f04f 43b0 mov.w r3, #1476395008 ; 0x58000000 + 802d6f8: 681b ldr r3, [r3, #0] + 802d6fa: 61bb str r3, [r7, #24] temp &= ~(iocurrent); - 802d6cc: 693b ldr r3, [r7, #16] - 802d6ce: 43db mvns r3, r3 - 802d6d0: 69ba ldr r2, [r7, #24] - 802d6d2: 4013 ands r3, r2 - 802d6d4: 61bb str r3, [r7, #24] + 802d6fc: 693b ldr r3, [r7, #16] + 802d6fe: 43db mvns r3, r3 + 802d700: 69ba ldr r2, [r7, #24] + 802d702: 4013 ands r3, r2 + 802d704: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) - 802d6d6: 683b ldr r3, [r7, #0] - 802d6d8: 685b ldr r3, [r3, #4] - 802d6da: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 802d6de: 2b00 cmp r3, #0 - 802d6e0: d003 beq.n 802d6ea + 802d706: 683b ldr r3, [r7, #0] + 802d708: 685b ldr r3, [r3, #4] + 802d70a: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 802d70e: 2b00 cmp r3, #0 + 802d710: d003 beq.n 802d71a { temp |= iocurrent; - 802d6e2: 69ba ldr r2, [r7, #24] - 802d6e4: 693b ldr r3, [r7, #16] - 802d6e6: 4313 orrs r3, r2 - 802d6e8: 61bb str r3, [r7, #24] + 802d712: 69ba ldr r2, [r7, #24] + 802d714: 693b ldr r3, [r7, #16] + 802d716: 4313 orrs r3, r2 + 802d718: 61bb str r3, [r7, #24] } EXTI->RTSR1 = temp; - 802d6ea: f04f 42b0 mov.w r2, #1476395008 ; 0x58000000 - 802d6ee: 69bb ldr r3, [r7, #24] - 802d6f0: 6013 str r3, [r2, #0] + 802d71a: f04f 42b0 mov.w r2, #1476395008 ; 0x58000000 + 802d71e: 69bb ldr r3, [r7, #24] + 802d720: 6013 str r3, [r2, #0] temp = EXTI->FTSR1; - 802d6f2: f04f 43b0 mov.w r3, #1476395008 ; 0x58000000 - 802d6f6: 685b ldr r3, [r3, #4] - 802d6f8: 61bb str r3, [r7, #24] + 802d722: f04f 43b0 mov.w r3, #1476395008 ; 0x58000000 + 802d726: 685b ldr r3, [r3, #4] + 802d728: 61bb str r3, [r7, #24] temp &= ~(iocurrent); - 802d6fa: 693b ldr r3, [r7, #16] - 802d6fc: 43db mvns r3, r3 - 802d6fe: 69ba ldr r2, [r7, #24] - 802d700: 4013 ands r3, r2 - 802d702: 61bb str r3, [r7, #24] + 802d72a: 693b ldr r3, [r7, #16] + 802d72c: 43db mvns r3, r3 + 802d72e: 69ba ldr r2, [r7, #24] + 802d730: 4013 ands r3, r2 + 802d732: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) - 802d704: 683b ldr r3, [r7, #0] - 802d706: 685b ldr r3, [r3, #4] - 802d708: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 802d70c: 2b00 cmp r3, #0 - 802d70e: d003 beq.n 802d718 + 802d734: 683b ldr r3, [r7, #0] + 802d736: 685b ldr r3, [r3, #4] + 802d738: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 802d73c: 2b00 cmp r3, #0 + 802d73e: d003 beq.n 802d748 { temp |= iocurrent; - 802d710: 69ba ldr r2, [r7, #24] - 802d712: 693b ldr r3, [r7, #16] - 802d714: 4313 orrs r3, r2 - 802d716: 61bb str r3, [r7, #24] + 802d740: 69ba ldr r2, [r7, #24] + 802d742: 693b ldr r3, [r7, #16] + 802d744: 4313 orrs r3, r2 + 802d746: 61bb str r3, [r7, #24] } EXTI->FTSR1 = temp; - 802d718: f04f 42b0 mov.w r2, #1476395008 ; 0x58000000 - 802d71c: 69bb ldr r3, [r7, #24] - 802d71e: 6053 str r3, [r2, #4] + 802d748: f04f 42b0 mov.w r2, #1476395008 ; 0x58000000 + 802d74c: 69bb ldr r3, [r7, #24] + 802d74e: 6053 str r3, [r2, #4] temp = EXTI_CurrentCPU->EMR1; - 802d720: 697b ldr r3, [r7, #20] - 802d722: 685b ldr r3, [r3, #4] - 802d724: 61bb str r3, [r7, #24] + 802d750: 697b ldr r3, [r7, #20] + 802d752: 685b ldr r3, [r3, #4] + 802d754: 61bb str r3, [r7, #24] temp &= ~(iocurrent); - 802d726: 693b ldr r3, [r7, #16] - 802d728: 43db mvns r3, r3 - 802d72a: 69ba ldr r2, [r7, #24] - 802d72c: 4013 ands r3, r2 - 802d72e: 61bb str r3, [r7, #24] + 802d756: 693b ldr r3, [r7, #16] + 802d758: 43db mvns r3, r3 + 802d75a: 69ba ldr r2, [r7, #24] + 802d75c: 4013 ands r3, r2 + 802d75e: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U) - 802d730: 683b ldr r3, [r7, #0] - 802d732: 685b ldr r3, [r3, #4] - 802d734: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802d738: 2b00 cmp r3, #0 - 802d73a: d003 beq.n 802d744 + 802d760: 683b ldr r3, [r7, #0] + 802d762: 685b ldr r3, [r3, #4] + 802d764: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802d768: 2b00 cmp r3, #0 + 802d76a: d003 beq.n 802d774 { temp |= iocurrent; - 802d73c: 69ba ldr r2, [r7, #24] - 802d73e: 693b ldr r3, [r7, #16] - 802d740: 4313 orrs r3, r2 - 802d742: 61bb str r3, [r7, #24] + 802d76c: 69ba ldr r2, [r7, #24] + 802d76e: 693b ldr r3, [r7, #16] + 802d770: 4313 orrs r3, r2 + 802d772: 61bb str r3, [r7, #24] } EXTI_CurrentCPU->EMR1 = temp; - 802d744: 697b ldr r3, [r7, #20] - 802d746: 69ba ldr r2, [r7, #24] - 802d748: 605a str r2, [r3, #4] + 802d774: 697b ldr r3, [r7, #20] + 802d776: 69ba ldr r2, [r7, #24] + 802d778: 605a str r2, [r3, #4] /* Clear EXTI line configuration */ temp = EXTI_CurrentCPU->IMR1; - 802d74a: 697b ldr r3, [r7, #20] - 802d74c: 681b ldr r3, [r3, #0] - 802d74e: 61bb str r3, [r7, #24] + 802d77a: 697b ldr r3, [r7, #20] + 802d77c: 681b ldr r3, [r3, #0] + 802d77e: 61bb str r3, [r7, #24] temp &= ~(iocurrent); - 802d750: 693b ldr r3, [r7, #16] - 802d752: 43db mvns r3, r3 - 802d754: 69ba ldr r2, [r7, #24] - 802d756: 4013 ands r3, r2 - 802d758: 61bb str r3, [r7, #24] + 802d780: 693b ldr r3, [r7, #16] + 802d782: 43db mvns r3, r3 + 802d784: 69ba ldr r2, [r7, #24] + 802d786: 4013 ands r3, r2 + 802d788: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & EXTI_IT) != 0x00U) - 802d75a: 683b ldr r3, [r7, #0] - 802d75c: 685b ldr r3, [r3, #4] - 802d75e: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 802d762: 2b00 cmp r3, #0 - 802d764: d003 beq.n 802d76e + 802d78a: 683b ldr r3, [r7, #0] + 802d78c: 685b ldr r3, [r3, #4] + 802d78e: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 802d792: 2b00 cmp r3, #0 + 802d794: d003 beq.n 802d79e { temp |= iocurrent; - 802d766: 69ba ldr r2, [r7, #24] - 802d768: 693b ldr r3, [r7, #16] - 802d76a: 4313 orrs r3, r2 - 802d76c: 61bb str r3, [r7, #24] + 802d796: 69ba ldr r2, [r7, #24] + 802d798: 693b ldr r3, [r7, #16] + 802d79a: 4313 orrs r3, r2 + 802d79c: 61bb str r3, [r7, #24] } EXTI_CurrentCPU->IMR1 = temp; - 802d76e: 697b ldr r3, [r7, #20] - 802d770: 69ba ldr r2, [r7, #24] - 802d772: 601a str r2, [r3, #0] + 802d79e: 697b ldr r3, [r7, #20] + 802d7a0: 69ba ldr r2, [r7, #24] + 802d7a2: 601a str r2, [r3, #0] } } position++; - 802d774: 69fb ldr r3, [r7, #28] - 802d776: 3301 adds r3, #1 - 802d778: 61fb str r3, [r7, #28] + 802d7a4: 69fb ldr r3, [r7, #28] + 802d7a6: 3301 adds r3, #1 + 802d7a8: 61fb str r3, [r7, #28] while (((GPIO_Init->Pin) >> position) != 0x00U) - 802d77a: 683b ldr r3, [r7, #0] - 802d77c: 681a ldr r2, [r3, #0] - 802d77e: 69fb ldr r3, [r7, #28] - 802d780: fa22 f303 lsr.w r3, r2, r3 - 802d784: 2b00 cmp r3, #0 - 802d786: f47f ae63 bne.w 802d450 - } -} - 802d78a: bf00 nop - 802d78c: bf00 nop - 802d78e: 3724 adds r7, #36 ; 0x24 - 802d790: 46bd mov sp, r7 - 802d792: f85d 7b04 ldr.w r7, [sp], #4 - 802d796: 4770 bx lr - 802d798: 58000400 .word 0x58000400 - -0802d79c : + 802d7aa: 683b ldr r3, [r7, #0] + 802d7ac: 681a ldr r2, [r3, #0] + 802d7ae: 69fb ldr r3, [r7, #28] + 802d7b0: fa22 f303 lsr.w r3, r2, r3 + 802d7b4: 2b00 cmp r3, #0 + 802d7b6: f47f ae63 bne.w 802d480 + } +} + 802d7ba: bf00 nop + 802d7bc: bf00 nop + 802d7be: 3724 adds r7, #36 ; 0x24 + 802d7c0: 46bd mov sp, r7 + 802d7c2: f85d 7b04 ldr.w r7, [sp], #4 + 802d7c6: 4770 bx lr + 802d7c8: 58000400 .word 0x58000400 + +0802d7cc : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 802d79c: b480 push {r7} - 802d79e: b083 sub sp, #12 - 802d7a0: af00 add r7, sp, #0 - 802d7a2: 6078 str r0, [r7, #4] - 802d7a4: 460b mov r3, r1 - 802d7a6: 807b strh r3, [r7, #2] - 802d7a8: 4613 mov r3, r2 - 802d7aa: 707b strb r3, [r7, #1] + 802d7cc: b480 push {r7} + 802d7ce: b083 sub sp, #12 + 802d7d0: af00 add r7, sp, #0 + 802d7d2: 6078 str r0, [r7, #4] + 802d7d4: 460b mov r3, r1 + 802d7d6: 807b strh r3, [r7, #2] + 802d7d8: 4613 mov r3, r2 + 802d7da: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 802d7ac: 787b ldrb r3, [r7, #1] - 802d7ae: 2b00 cmp r3, #0 - 802d7b0: d003 beq.n 802d7ba + 802d7dc: 787b ldrb r3, [r7, #1] + 802d7de: 2b00 cmp r3, #0 + 802d7e0: d003 beq.n 802d7ea { GPIOx->BSRR = GPIO_Pin; - 802d7b2: 887a ldrh r2, [r7, #2] - 802d7b4: 687b ldr r3, [r7, #4] - 802d7b6: 619a str r2, [r3, #24] + 802d7e2: 887a ldrh r2, [r7, #2] + 802d7e4: 687b ldr r3, [r7, #4] + 802d7e6: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER; } } - 802d7b8: e003 b.n 802d7c2 + 802d7e8: e003 b.n 802d7f2 GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER; - 802d7ba: 887b ldrh r3, [r7, #2] - 802d7bc: 041a lsls r2, r3, #16 - 802d7be: 687b ldr r3, [r7, #4] - 802d7c0: 619a str r2, [r3, #24] -} - 802d7c2: bf00 nop - 802d7c4: 370c adds r7, #12 - 802d7c6: 46bd mov sp, r7 - 802d7c8: f85d 7b04 ldr.w r7, [sp], #4 - 802d7cc: 4770 bx lr - -0802d7ce : + 802d7ea: 887b ldrh r3, [r7, #2] + 802d7ec: 041a lsls r2, r3, #16 + 802d7ee: 687b ldr r3, [r7, #4] + 802d7f0: 619a str r2, [r3, #24] +} + 802d7f2: bf00 nop + 802d7f4: 370c adds r7, #12 + 802d7f6: 46bd mov sp, r7 + 802d7f8: f85d 7b04 ldr.w r7, [sp], #4 + 802d7fc: 4770 bx lr + +0802d7fe : * @param GPIOx: Where x can be (A..K) to select the GPIO peripheral. * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 802d7ce: b480 push {r7} - 802d7d0: b085 sub sp, #20 - 802d7d2: af00 add r7, sp, #0 - 802d7d4: 6078 str r0, [r7, #4] - 802d7d6: 460b mov r3, r1 - 802d7d8: 807b strh r3, [r7, #2] + 802d7fe: b480 push {r7} + 802d800: b085 sub sp, #20 + 802d802: af00 add r7, sp, #0 + 802d804: 6078 str r0, [r7, #4] + 802d806: 460b mov r3, r1 + 802d808: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; - 802d7da: 687b ldr r3, [r7, #4] - 802d7dc: 695b ldr r3, [r3, #20] - 802d7de: 60fb str r3, [r7, #12] + 802d80a: 687b ldr r3, [r7, #4] + 802d80c: 695b ldr r3, [r3, #20] + 802d80e: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); - 802d7e0: 887a ldrh r2, [r7, #2] - 802d7e2: 68fb ldr r3, [r7, #12] - 802d7e4: 4013 ands r3, r2 - 802d7e6: 041a lsls r2, r3, #16 - 802d7e8: 68fb ldr r3, [r7, #12] - 802d7ea: 43d9 mvns r1, r3 - 802d7ec: 887b ldrh r3, [r7, #2] - 802d7ee: 400b ands r3, r1 - 802d7f0: 431a orrs r2, r3 - 802d7f2: 687b ldr r3, [r7, #4] - 802d7f4: 619a str r2, [r3, #24] -} - 802d7f6: bf00 nop - 802d7f8: 3714 adds r7, #20 - 802d7fa: 46bd mov sp, r7 - 802d7fc: f85d 7b04 ldr.w r7, [sp], #4 - 802d800: 4770 bx lr + 802d810: 887a ldrh r2, [r7, #2] + 802d812: 68fb ldr r3, [r7, #12] + 802d814: 4013 ands r3, r2 + 802d816: 041a lsls r2, r3, #16 + 802d818: 68fb ldr r3, [r7, #12] + 802d81a: 43d9 mvns r1, r3 + 802d81c: 887b ldrh r3, [r7, #2] + 802d81e: 400b ands r3, r1 + 802d820: 431a orrs r2, r3 + 802d822: 687b ldr r3, [r7, #4] + 802d824: 619a str r2, [r3, #24] +} + 802d826: bf00 nop + 802d828: 3714 adds r7, #20 + 802d82a: 46bd mov sp, r7 + 802d82c: f85d 7b04 ldr.w r7, [sp], #4 + 802d830: 4770 bx lr ... -0802d804 : +0802d834 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { - 802d804: b580 push {r7, lr} - 802d806: b082 sub sp, #8 - 802d808: af00 add r7, sp, #0 - 802d80a: 6078 str r0, [r7, #4] + 802d834: b580 push {r7, lr} + 802d836: b082 sub sp, #8 + 802d838: af00 add r7, sp, #0 + 802d83a: 6078 str r0, [r7, #4] /* Check the I2C handle allocation */ if (hi2c == NULL) - 802d80c: 687b ldr r3, [r7, #4] - 802d80e: 2b00 cmp r3, #0 - 802d810: d101 bne.n 802d816 + 802d83c: 687b ldr r3, [r7, #4] + 802d83e: 2b00 cmp r3, #0 + 802d840: d101 bne.n 802d846 { return HAL_ERROR; - 802d812: 2301 movs r3, #1 - 802d814: e07f b.n 802d916 + 802d842: 2301 movs r3, #1 + 802d844: e07f b.n 802d946 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) - 802d816: 687b ldr r3, [r7, #4] - 802d818: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802d81c: b2db uxtb r3, r3 - 802d81e: 2b00 cmp r3, #0 - 802d820: d106 bne.n 802d830 + 802d846: 687b ldr r3, [r7, #4] + 802d848: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802d84c: b2db uxtb r3, r3 + 802d84e: 2b00 cmp r3, #0 + 802d850: d106 bne.n 802d860 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; - 802d822: 687b ldr r3, [r7, #4] - 802d824: 2200 movs r2, #0 - 802d826: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802d852: 687b ldr r3, [r7, #4] + 802d854: 2200 movs r2, #0 + 802d856: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ HAL_I2C_MspInit(hi2c); - 802d82a: 6878 ldr r0, [r7, #4] - 802d82c: f7f6 f9c0 bl 8023bb0 + 802d85a: 6878 ldr r0, [r7, #4] + 802d85c: f7f6 f9a8 bl 8023bb0 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; - 802d830: 687b ldr r3, [r7, #4] - 802d832: 2224 movs r2, #36 ; 0x24 - 802d834: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802d860: 687b ldr r3, [r7, #4] + 802d862: 2224 movs r2, #36 ; 0x24 + 802d864: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 802d838: 687b ldr r3, [r7, #4] - 802d83a: 681b ldr r3, [r3, #0] - 802d83c: 681a ldr r2, [r3, #0] - 802d83e: 687b ldr r3, [r7, #4] - 802d840: 681b ldr r3, [r3, #0] - 802d842: f022 0201 bic.w r2, r2, #1 - 802d846: 601a str r2, [r3, #0] + 802d868: 687b ldr r3, [r7, #4] + 802d86a: 681b ldr r3, [r3, #0] + 802d86c: 681a ldr r2, [r3, #0] + 802d86e: 687b ldr r3, [r7, #4] + 802d870: 681b ldr r3, [r3, #0] + 802d872: f022 0201 bic.w r2, r2, #1 + 802d876: 601a str r2, [r3, #0] /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; - 802d848: 687b ldr r3, [r7, #4] - 802d84a: 685a ldr r2, [r3, #4] - 802d84c: 687b ldr r3, [r7, #4] - 802d84e: 681b ldr r3, [r3, #0] - 802d850: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000 - 802d854: 611a str r2, [r3, #16] + 802d878: 687b ldr r3, [r7, #4] + 802d87a: 685a ldr r2, [r3, #4] + 802d87c: 687b ldr r3, [r7, #4] + 802d87e: 681b ldr r3, [r3, #0] + 802d880: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000 + 802d884: 611a str r2, [r3, #16] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Disable Own Address1 before set the Own Address1 configuration */ hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; - 802d856: 687b ldr r3, [r7, #4] - 802d858: 681b ldr r3, [r3, #0] - 802d85a: 689a ldr r2, [r3, #8] - 802d85c: 687b ldr r3, [r7, #4] - 802d85e: 681b ldr r3, [r3, #0] - 802d860: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802d864: 609a str r2, [r3, #8] + 802d886: 687b ldr r3, [r7, #4] + 802d888: 681b ldr r3, [r3, #0] + 802d88a: 689a ldr r2, [r3, #8] + 802d88c: 687b ldr r3, [r7, #4] + 802d88e: 681b ldr r3, [r3, #0] + 802d890: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802d894: 609a str r2, [r3, #8] /* Configure I2Cx: Own Address1 and ack own address1 mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 802d866: 687b ldr r3, [r7, #4] - 802d868: 68db ldr r3, [r3, #12] - 802d86a: 2b01 cmp r3, #1 - 802d86c: d107 bne.n 802d87e + 802d896: 687b ldr r3, [r7, #4] + 802d898: 68db ldr r3, [r3, #12] + 802d89a: 2b01 cmp r3, #1 + 802d89c: d107 bne.n 802d8ae { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); - 802d86e: 687b ldr r3, [r7, #4] - 802d870: 689a ldr r2, [r3, #8] - 802d872: 687b ldr r3, [r7, #4] - 802d874: 681b ldr r3, [r3, #0] - 802d876: f442 4200 orr.w r2, r2, #32768 ; 0x8000 - 802d87a: 609a str r2, [r3, #8] - 802d87c: e006 b.n 802d88c + 802d89e: 687b ldr r3, [r7, #4] + 802d8a0: 689a ldr r2, [r3, #8] + 802d8a2: 687b ldr r3, [r7, #4] + 802d8a4: 681b ldr r3, [r3, #0] + 802d8a6: f442 4200 orr.w r2, r2, #32768 ; 0x8000 + 802d8aa: 609a str r2, [r3, #8] + 802d8ac: e006 b.n 802d8bc } else /* I2C_ADDRESSINGMODE_10BIT */ { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); - 802d87e: 687b ldr r3, [r7, #4] - 802d880: 689a ldr r2, [r3, #8] - 802d882: 687b ldr r3, [r7, #4] - 802d884: 681b ldr r3, [r3, #0] - 802d886: f442 4204 orr.w r2, r2, #33792 ; 0x8400 - 802d88a: 609a str r2, [r3, #8] + 802d8ae: 687b ldr r3, [r7, #4] + 802d8b0: 689a ldr r2, [r3, #8] + 802d8b2: 687b ldr r3, [r7, #4] + 802d8b4: 681b ldr r3, [r3, #0] + 802d8b6: f442 4204 orr.w r2, r2, #33792 ; 0x8400 + 802d8ba: 609a str r2, [r3, #8] } /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - 802d88c: 687b ldr r3, [r7, #4] - 802d88e: 68db ldr r3, [r3, #12] - 802d890: 2b02 cmp r3, #2 - 802d892: d104 bne.n 802d89e + 802d8bc: 687b ldr r3, [r7, #4] + 802d8be: 68db ldr r3, [r3, #12] + 802d8c0: 2b02 cmp r3, #2 + 802d8c2: d104 bne.n 802d8ce { hi2c->Instance->CR2 = (I2C_CR2_ADD10); - 802d894: 687b ldr r3, [r7, #4] - 802d896: 681b ldr r3, [r3, #0] - 802d898: f44f 6200 mov.w r2, #2048 ; 0x800 - 802d89c: 605a str r2, [r3, #4] + 802d8c4: 687b ldr r3, [r7, #4] + 802d8c6: 681b ldr r3, [r3, #0] + 802d8c8: f44f 6200 mov.w r2, #2048 ; 0x800 + 802d8cc: 605a str r2, [r3, #4] } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); - 802d89e: 687b ldr r3, [r7, #4] - 802d8a0: 681b ldr r3, [r3, #0] - 802d8a2: 6859 ldr r1, [r3, #4] - 802d8a4: 687b ldr r3, [r7, #4] - 802d8a6: 681a ldr r2, [r3, #0] - 802d8a8: 4b1d ldr r3, [pc, #116] ; (802d920 ) - 802d8aa: 430b orrs r3, r1 - 802d8ac: 6053 str r3, [r2, #4] + 802d8ce: 687b ldr r3, [r7, #4] + 802d8d0: 681b ldr r3, [r3, #0] + 802d8d2: 6859 ldr r1, [r3, #4] + 802d8d4: 687b ldr r3, [r7, #4] + 802d8d6: 681a ldr r2, [r3, #0] + 802d8d8: 4b1d ldr r3, [pc, #116] ; (802d950 ) + 802d8da: 430b orrs r3, r1 + 802d8dc: 6053 str r3, [r2, #4] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Disable Own Address2 before set the Own Address2 configuration */ hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; - 802d8ae: 687b ldr r3, [r7, #4] - 802d8b0: 681b ldr r3, [r3, #0] - 802d8b2: 68da ldr r2, [r3, #12] - 802d8b4: 687b ldr r3, [r7, #4] - 802d8b6: 681b ldr r3, [r3, #0] - 802d8b8: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802d8bc: 60da str r2, [r3, #12] + 802d8de: 687b ldr r3, [r7, #4] + 802d8e0: 681b ldr r3, [r3, #0] + 802d8e2: 68da ldr r2, [r3, #12] + 802d8e4: 687b ldr r3, [r7, #4] + 802d8e6: 681b ldr r3, [r3, #0] + 802d8e8: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802d8ec: 60da str r2, [r3, #12] /* Configure I2Cx: Dual mode and Own Address2 */ hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ - 802d8be: 687b ldr r3, [r7, #4] - 802d8c0: 691a ldr r2, [r3, #16] - 802d8c2: 687b ldr r3, [r7, #4] - 802d8c4: 695b ldr r3, [r3, #20] - 802d8c6: ea42 0103 orr.w r1, r2, r3 + 802d8ee: 687b ldr r3, [r7, #4] + 802d8f0: 691a ldr r2, [r3, #16] + 802d8f2: 687b ldr r3, [r7, #4] + 802d8f4: 695b ldr r3, [r3, #20] + 802d8f6: ea42 0103 orr.w r1, r2, r3 (hi2c->Init.OwnAddress2Masks << 8)); - 802d8ca: 687b ldr r3, [r7, #4] - 802d8cc: 699b ldr r3, [r3, #24] - 802d8ce: 021a lsls r2, r3, #8 + 802d8fa: 687b ldr r3, [r7, #4] + 802d8fc: 699b ldr r3, [r3, #24] + 802d8fe: 021a lsls r2, r3, #8 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ - 802d8d0: 687b ldr r3, [r7, #4] - 802d8d2: 681b ldr r3, [r3, #0] - 802d8d4: 430a orrs r2, r1 - 802d8d6: 60da str r2, [r3, #12] + 802d900: 687b ldr r3, [r7, #4] + 802d902: 681b ldr r3, [r3, #0] + 802d904: 430a orrs r2, r1 + 802d906: 60da str r2, [r3, #12] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); - 802d8d8: 687b ldr r3, [r7, #4] - 802d8da: 69d9 ldr r1, [r3, #28] - 802d8dc: 687b ldr r3, [r7, #4] - 802d8de: 6a1a ldr r2, [r3, #32] - 802d8e0: 687b ldr r3, [r7, #4] - 802d8e2: 681b ldr r3, [r3, #0] - 802d8e4: 430a orrs r2, r1 - 802d8e6: 601a str r2, [r3, #0] + 802d908: 687b ldr r3, [r7, #4] + 802d90a: 69d9 ldr r1, [r3, #28] + 802d90c: 687b ldr r3, [r7, #4] + 802d90e: 6a1a ldr r2, [r3, #32] + 802d910: 687b ldr r3, [r7, #4] + 802d912: 681b ldr r3, [r3, #0] + 802d914: 430a orrs r2, r1 + 802d916: 601a str r2, [r3, #0] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 802d8e8: 687b ldr r3, [r7, #4] - 802d8ea: 681b ldr r3, [r3, #0] - 802d8ec: 681a ldr r2, [r3, #0] - 802d8ee: 687b ldr r3, [r7, #4] - 802d8f0: 681b ldr r3, [r3, #0] - 802d8f2: f042 0201 orr.w r2, r2, #1 - 802d8f6: 601a str r2, [r3, #0] + 802d918: 687b ldr r3, [r7, #4] + 802d91a: 681b ldr r3, [r3, #0] + 802d91c: 681a ldr r2, [r3, #0] + 802d91e: 687b ldr r3, [r7, #4] + 802d920: 681b ldr r3, [r3, #0] + 802d922: f042 0201 orr.w r2, r2, #1 + 802d926: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 802d8f8: 687b ldr r3, [r7, #4] - 802d8fa: 2200 movs r2, #0 - 802d8fc: 645a str r2, [r3, #68] ; 0x44 + 802d928: 687b ldr r3, [r7, #4] + 802d92a: 2200 movs r2, #0 + 802d92c: 645a str r2, [r3, #68] ; 0x44 hi2c->State = HAL_I2C_STATE_READY; - 802d8fe: 687b ldr r3, [r7, #4] - 802d900: 2220 movs r2, #32 - 802d902: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802d92e: 687b ldr r3, [r7, #4] + 802d930: 2220 movs r2, #32 + 802d932: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802d906: 687b ldr r3, [r7, #4] - 802d908: 2200 movs r2, #0 - 802d90a: 631a str r2, [r3, #48] ; 0x30 + 802d936: 687b ldr r3, [r7, #4] + 802d938: 2200 movs r2, #0 + 802d93a: 631a str r2, [r3, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; - 802d90c: 687b ldr r3, [r7, #4] - 802d90e: 2200 movs r2, #0 - 802d910: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802d93c: 687b ldr r3, [r7, #4] + 802d93e: 2200 movs r2, #0 + 802d940: f883 2042 strb.w r2, [r3, #66] ; 0x42 return HAL_OK; - 802d914: 2300 movs r3, #0 + 802d944: 2300 movs r3, #0 } - 802d916: 4618 mov r0, r3 - 802d918: 3708 adds r7, #8 - 802d91a: 46bd mov sp, r7 - 802d91c: bd80 pop {r7, pc} - 802d91e: bf00 nop - 802d920: 02008000 .word 0x02008000 + 802d946: 4618 mov r0, r3 + 802d948: 3708 adds r7, #8 + 802d94a: 46bd mov sp, r7 + 802d94c: bd80 pop {r7, pc} + 802d94e: bf00 nop + 802d950: 02008000 .word 0x02008000 -0802d924 : +0802d954 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) { - 802d924: b580 push {r7, lr} - 802d926: b084 sub sp, #16 - 802d928: af00 add r7, sp, #0 - 802d92a: 6078 str r0, [r7, #4] + 802d954: b580 push {r7, lr} + 802d956: b084 sub sp, #16 + 802d958: af00 add r7, sp, #0 + 802d95a: 6078 str r0, [r7, #4] /* Get current IT Flags and IT sources value */ uint32_t itflags = READ_REG(hi2c->Instance->ISR); - 802d92c: 687b ldr r3, [r7, #4] - 802d92e: 681b ldr r3, [r3, #0] - 802d930: 699b ldr r3, [r3, #24] - 802d932: 60fb str r3, [r7, #12] + 802d95c: 687b ldr r3, [r7, #4] + 802d95e: 681b ldr r3, [r3, #0] + 802d960: 699b ldr r3, [r3, #24] + 802d962: 60fb str r3, [r7, #12] uint32_t itsources = READ_REG(hi2c->Instance->CR1); - 802d934: 687b ldr r3, [r7, #4] - 802d936: 681b ldr r3, [r3, #0] - 802d938: 681b ldr r3, [r3, #0] - 802d93a: 60bb str r3, [r7, #8] + 802d964: 687b ldr r3, [r7, #4] + 802d966: 681b ldr r3, [r3, #0] + 802d968: 681b ldr r3, [r3, #0] + 802d96a: 60bb str r3, [r7, #8] /* I2C events treatment -------------------------------------*/ if (hi2c->XferISR != NULL) - 802d93c: 687b ldr r3, [r7, #4] - 802d93e: 6b5b ldr r3, [r3, #52] ; 0x34 - 802d940: 2b00 cmp r3, #0 - 802d942: d005 beq.n 802d950 + 802d96c: 687b ldr r3, [r7, #4] + 802d96e: 6b5b ldr r3, [r3, #52] ; 0x34 + 802d970: 2b00 cmp r3, #0 + 802d972: d005 beq.n 802d980 { hi2c->XferISR(hi2c, itflags, itsources); - 802d944: 687b ldr r3, [r7, #4] - 802d946: 6b5b ldr r3, [r3, #52] ; 0x34 - 802d948: 68ba ldr r2, [r7, #8] - 802d94a: 68f9 ldr r1, [r7, #12] - 802d94c: 6878 ldr r0, [r7, #4] - 802d94e: 4798 blx r3 + 802d974: 687b ldr r3, [r7, #4] + 802d976: 6b5b ldr r3, [r3, #52] ; 0x34 + 802d978: 68ba ldr r2, [r7, #8] + 802d97a: 68f9 ldr r1, [r7, #12] + 802d97c: 6878 ldr r0, [r7, #4] + 802d97e: 4798 blx r3 } } - 802d950: bf00 nop - 802d952: 3710 adds r7, #16 - 802d954: 46bd mov sp, r7 - 802d956: bd80 pop {r7, pc} + 802d980: bf00 nop + 802d982: 3710 adds r7, #16 + 802d984: 46bd mov sp, r7 + 802d986: bd80 pop {r7, pc} -0802d958 : +0802d988 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) { - 802d958: b580 push {r7, lr} - 802d95a: b086 sub sp, #24 - 802d95c: af00 add r7, sp, #0 - 802d95e: 6078 str r0, [r7, #4] + 802d988: b580 push {r7, lr} + 802d98a: b086 sub sp, #24 + 802d98c: af00 add r7, sp, #0 + 802d98e: 6078 str r0, [r7, #4] uint32_t itflags = READ_REG(hi2c->Instance->ISR); - 802d960: 687b ldr r3, [r7, #4] - 802d962: 681b ldr r3, [r3, #0] - 802d964: 699b ldr r3, [r3, #24] - 802d966: 617b str r3, [r7, #20] + 802d990: 687b ldr r3, [r7, #4] + 802d992: 681b ldr r3, [r3, #0] + 802d994: 699b ldr r3, [r3, #24] + 802d996: 617b str r3, [r7, #20] uint32_t itsources = READ_REG(hi2c->Instance->CR1); - 802d968: 687b ldr r3, [r7, #4] - 802d96a: 681b ldr r3, [r3, #0] - 802d96c: 681b ldr r3, [r3, #0] - 802d96e: 613b str r3, [r7, #16] + 802d998: 687b ldr r3, [r7, #4] + 802d99a: 681b ldr r3, [r3, #0] + 802d99c: 681b ldr r3, [r3, #0] + 802d99e: 613b str r3, [r7, #16] uint32_t tmperror; /* I2C Bus error interrupt occurred ------------------------------------*/ if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ - 802d970: 697b ldr r3, [r7, #20] - 802d972: 0a1b lsrs r3, r3, #8 - 802d974: f003 0301 and.w r3, r3, #1 - 802d978: 2b00 cmp r3, #0 - 802d97a: d010 beq.n 802d99e + 802d9a0: 697b ldr r3, [r7, #20] + 802d9a2: 0a1b lsrs r3, r3, #8 + 802d9a4: f003 0301 and.w r3, r3, #1 + 802d9a8: 2b00 cmp r3, #0 + 802d9aa: d010 beq.n 802d9ce (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) - 802d97c: 693b ldr r3, [r7, #16] - 802d97e: 09db lsrs r3, r3, #7 - 802d980: f003 0301 and.w r3, r3, #1 + 802d9ac: 693b ldr r3, [r7, #16] + 802d9ae: 09db lsrs r3, r3, #7 + 802d9b0: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ - 802d984: 2b00 cmp r3, #0 - 802d986: d00a beq.n 802d99e + 802d9b4: 2b00 cmp r3, #0 + 802d9b6: d00a beq.n 802d9ce { hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; - 802d988: 687b ldr r3, [r7, #4] - 802d98a: 6c5b ldr r3, [r3, #68] ; 0x44 - 802d98c: f043 0201 orr.w r2, r3, #1 - 802d990: 687b ldr r3, [r7, #4] - 802d992: 645a str r2, [r3, #68] ; 0x44 + 802d9b8: 687b ldr r3, [r7, #4] + 802d9ba: 6c5b ldr r3, [r3, #68] ; 0x44 + 802d9bc: f043 0201 orr.w r2, r3, #1 + 802d9c0: 687b ldr r3, [r7, #4] + 802d9c2: 645a str r2, [r3, #68] ; 0x44 /* Clear BERR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); - 802d994: 687b ldr r3, [r7, #4] - 802d996: 681b ldr r3, [r3, #0] - 802d998: f44f 7280 mov.w r2, #256 ; 0x100 - 802d99c: 61da str r2, [r3, #28] + 802d9c4: 687b ldr r3, [r7, #4] + 802d9c6: 681b ldr r3, [r3, #0] + 802d9c8: f44f 7280 mov.w r2, #256 ; 0x100 + 802d9cc: 61da str r2, [r3, #28] } /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ - 802d99e: 697b ldr r3, [r7, #20] - 802d9a0: 0a9b lsrs r3, r3, #10 - 802d9a2: f003 0301 and.w r3, r3, #1 - 802d9a6: 2b00 cmp r3, #0 - 802d9a8: d010 beq.n 802d9cc + 802d9ce: 697b ldr r3, [r7, #20] + 802d9d0: 0a9b lsrs r3, r3, #10 + 802d9d2: f003 0301 and.w r3, r3, #1 + 802d9d6: 2b00 cmp r3, #0 + 802d9d8: d010 beq.n 802d9fc (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) - 802d9aa: 693b ldr r3, [r7, #16] - 802d9ac: 09db lsrs r3, r3, #7 - 802d9ae: f003 0301 and.w r3, r3, #1 + 802d9da: 693b ldr r3, [r7, #16] + 802d9dc: 09db lsrs r3, r3, #7 + 802d9de: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ - 802d9b2: 2b00 cmp r3, #0 - 802d9b4: d00a beq.n 802d9cc + 802d9e2: 2b00 cmp r3, #0 + 802d9e4: d00a beq.n 802d9fc { hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; - 802d9b6: 687b ldr r3, [r7, #4] - 802d9b8: 6c5b ldr r3, [r3, #68] ; 0x44 - 802d9ba: f043 0208 orr.w r2, r3, #8 - 802d9be: 687b ldr r3, [r7, #4] - 802d9c0: 645a str r2, [r3, #68] ; 0x44 + 802d9e6: 687b ldr r3, [r7, #4] + 802d9e8: 6c5b ldr r3, [r3, #68] ; 0x44 + 802d9ea: f043 0208 orr.w r2, r3, #8 + 802d9ee: 687b ldr r3, [r7, #4] + 802d9f0: 645a str r2, [r3, #68] ; 0x44 /* Clear OVR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); - 802d9c2: 687b ldr r3, [r7, #4] - 802d9c4: 681b ldr r3, [r3, #0] - 802d9c6: f44f 6280 mov.w r2, #1024 ; 0x400 - 802d9ca: 61da str r2, [r3, #28] + 802d9f2: 687b ldr r3, [r7, #4] + 802d9f4: 681b ldr r3, [r3, #0] + 802d9f6: f44f 6280 mov.w r2, #1024 ; 0x400 + 802d9fa: 61da str r2, [r3, #28] } /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ - 802d9cc: 697b ldr r3, [r7, #20] - 802d9ce: 0a5b lsrs r3, r3, #9 - 802d9d0: f003 0301 and.w r3, r3, #1 - 802d9d4: 2b00 cmp r3, #0 - 802d9d6: d010 beq.n 802d9fa + 802d9fc: 697b ldr r3, [r7, #20] + 802d9fe: 0a5b lsrs r3, r3, #9 + 802da00: f003 0301 and.w r3, r3, #1 + 802da04: 2b00 cmp r3, #0 + 802da06: d010 beq.n 802da2a (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) - 802d9d8: 693b ldr r3, [r7, #16] - 802d9da: 09db lsrs r3, r3, #7 - 802d9dc: f003 0301 and.w r3, r3, #1 + 802da08: 693b ldr r3, [r7, #16] + 802da0a: 09db lsrs r3, r3, #7 + 802da0c: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ - 802d9e0: 2b00 cmp r3, #0 - 802d9e2: d00a beq.n 802d9fa + 802da10: 2b00 cmp r3, #0 + 802da12: d00a beq.n 802da2a { hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; - 802d9e4: 687b ldr r3, [r7, #4] - 802d9e6: 6c5b ldr r3, [r3, #68] ; 0x44 - 802d9e8: f043 0202 orr.w r2, r3, #2 - 802d9ec: 687b ldr r3, [r7, #4] - 802d9ee: 645a str r2, [r3, #68] ; 0x44 + 802da14: 687b ldr r3, [r7, #4] + 802da16: 6c5b ldr r3, [r3, #68] ; 0x44 + 802da18: f043 0202 orr.w r2, r3, #2 + 802da1c: 687b ldr r3, [r7, #4] + 802da1e: 645a str r2, [r3, #68] ; 0x44 /* Clear ARLO flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); - 802d9f0: 687b ldr r3, [r7, #4] - 802d9f2: 681b ldr r3, [r3, #0] - 802d9f4: f44f 7200 mov.w r2, #512 ; 0x200 - 802d9f8: 61da str r2, [r3, #28] + 802da20: 687b ldr r3, [r7, #4] + 802da22: 681b ldr r3, [r3, #0] + 802da24: f44f 7200 mov.w r2, #512 ; 0x200 + 802da28: 61da str r2, [r3, #28] } /* Store current volatile hi2c->ErrorCode, misra rule */ tmperror = hi2c->ErrorCode; - 802d9fa: 687b ldr r3, [r7, #4] - 802d9fc: 6c5b ldr r3, [r3, #68] ; 0x44 - 802d9fe: 60fb str r3, [r7, #12] + 802da2a: 687b ldr r3, [r7, #4] + 802da2c: 6c5b ldr r3, [r3, #68] ; 0x44 + 802da2e: 60fb str r3, [r7, #12] /* Call the Error Callback in case of Error detected */ if ((tmperror & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_NONE) - 802da00: 68fb ldr r3, [r7, #12] - 802da02: f003 030b and.w r3, r3, #11 - 802da06: 2b00 cmp r3, #0 - 802da08: d003 beq.n 802da12 + 802da30: 68fb ldr r3, [r7, #12] + 802da32: f003 030b and.w r3, r3, #11 + 802da36: 2b00 cmp r3, #0 + 802da38: d003 beq.n 802da42 { I2C_ITError(hi2c, tmperror); - 802da0a: 68f9 ldr r1, [r7, #12] - 802da0c: 6878 ldr r0, [r7, #4] - 802da0e: f000 fc77 bl 802e300 + 802da3a: 68f9 ldr r1, [r7, #12] + 802da3c: 6878 ldr r0, [r7, #4] + 802da3e: f000 fc77 bl 802e330 } } - 802da12: bf00 nop - 802da14: 3718 adds r7, #24 - 802da16: 46bd mov sp, r7 - 802da18: bd80 pop {r7, pc} + 802da42: bf00 nop + 802da44: 3718 adds r7, #24 + 802da46: 46bd mov sp, r7 + 802da48: bd80 pop {r7, pc} -0802da1a : +0802da4a : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) { - 802da1a: b480 push {r7} - 802da1c: b083 sub sp, #12 - 802da1e: af00 add r7, sp, #0 - 802da20: 6078 str r0, [r7, #4] + 802da4a: b480 push {r7} + 802da4c: b083 sub sp, #12 + 802da4e: af00 add r7, sp, #0 + 802da50: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file */ } - 802da22: bf00 nop - 802da24: 370c adds r7, #12 - 802da26: 46bd mov sp, r7 - 802da28: f85d 7b04 ldr.w r7, [sp], #4 - 802da2c: 4770 bx lr + 802da52: bf00 nop + 802da54: 370c adds r7, #12 + 802da56: 46bd mov sp, r7 + 802da58: f85d 7b04 ldr.w r7, [sp], #4 + 802da5c: 4770 bx lr -0802da2e : +0802da5e : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) { - 802da2e: b480 push {r7} - 802da30: b083 sub sp, #12 - 802da32: af00 add r7, sp, #0 - 802da34: 6078 str r0, [r7, #4] + 802da5e: b480 push {r7} + 802da60: b083 sub sp, #12 + 802da62: af00 add r7, sp, #0 + 802da64: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file */ } - 802da36: bf00 nop - 802da38: 370c adds r7, #12 - 802da3a: 46bd mov sp, r7 - 802da3c: f85d 7b04 ldr.w r7, [sp], #4 - 802da40: 4770 bx lr + 802da66: bf00 nop + 802da68: 370c adds r7, #12 + 802da6a: 46bd mov sp, r7 + 802da6c: f85d 7b04 ldr.w r7, [sp], #4 + 802da70: 4770 bx lr -0802da42 : +0802da72 : * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFERDIRECTION * @param AddrMatchCode Address Match Code * @retval None */ __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) { - 802da42: b480 push {r7} - 802da44: b083 sub sp, #12 - 802da46: af00 add r7, sp, #0 - 802da48: 6078 str r0, [r7, #4] - 802da4a: 460b mov r3, r1 - 802da4c: 70fb strb r3, [r7, #3] - 802da4e: 4613 mov r3, r2 - 802da50: 803b strh r3, [r7, #0] + 802da72: b480 push {r7} + 802da74: b083 sub sp, #12 + 802da76: af00 add r7, sp, #0 + 802da78: 6078 str r0, [r7, #4] + 802da7a: 460b mov r3, r1 + 802da7c: 70fb strb r3, [r7, #3] + 802da7e: 4613 mov r3, r2 + 802da80: 803b strh r3, [r7, #0] UNUSED(AddrMatchCode); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_AddrCallback() could be implemented in the user file */ } - 802da52: bf00 nop - 802da54: 370c adds r7, #12 - 802da56: 46bd mov sp, r7 - 802da58: f85d 7b04 ldr.w r7, [sp], #4 - 802da5c: 4770 bx lr + 802da82: bf00 nop + 802da84: 370c adds r7, #12 + 802da86: 46bd mov sp, r7 + 802da88: f85d 7b04 ldr.w r7, [sp], #4 + 802da8c: 4770 bx lr -0802da5e : +0802da8e : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) { - 802da5e: b480 push {r7} - 802da60: b083 sub sp, #12 - 802da62: af00 add r7, sp, #0 - 802da64: 6078 str r0, [r7, #4] + 802da8e: b480 push {r7} + 802da90: b083 sub sp, #12 + 802da92: af00 add r7, sp, #0 + 802da94: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_ListenCpltCallback() could be implemented in the user file */ } - 802da66: bf00 nop - 802da68: 370c adds r7, #12 - 802da6a: 46bd mov sp, r7 - 802da6c: f85d 7b04 ldr.w r7, [sp], #4 - 802da70: 4770 bx lr + 802da96: bf00 nop + 802da98: 370c adds r7, #12 + 802da9a: 46bd mov sp, r7 + 802da9c: f85d 7b04 ldr.w r7, [sp], #4 + 802daa0: 4770 bx lr -0802da72 : +0802daa2 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) { - 802da72: b480 push {r7} - 802da74: b083 sub sp, #12 - 802da76: af00 add r7, sp, #0 - 802da78: 6078 str r0, [r7, #4] + 802daa2: b480 push {r7} + 802daa4: b083 sub sp, #12 + 802daa6: af00 add r7, sp, #0 + 802daa8: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_ErrorCallback could be implemented in the user file */ } - 802da7a: bf00 nop - 802da7c: 370c adds r7, #12 - 802da7e: 46bd mov sp, r7 - 802da80: f85d 7b04 ldr.w r7, [sp], #4 - 802da84: 4770 bx lr + 802daaa: bf00 nop + 802daac: 370c adds r7, #12 + 802daae: 46bd mov sp, r7 + 802dab0: f85d 7b04 ldr.w r7, [sp], #4 + 802dab4: 4770 bx lr -0802da86 : +0802dab6 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) { - 802da86: b480 push {r7} - 802da88: b083 sub sp, #12 - 802da8a: af00 add r7, sp, #0 - 802da8c: 6078 str r0, [r7, #4] + 802dab6: b480 push {r7} + 802dab8: b083 sub sp, #12 + 802daba: af00 add r7, sp, #0 + 802dabc: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_AbortCpltCallback could be implemented in the user file */ } - 802da8e: bf00 nop - 802da90: 370c adds r7, #12 - 802da92: 46bd mov sp, r7 - 802da94: f85d 7b04 ldr.w r7, [sp], #4 - 802da98: 4770 bx lr + 802dabe: bf00 nop + 802dac0: 370c adds r7, #12 + 802dac2: 46bd mov sp, r7 + 802dac4: f85d 7b04 ldr.w r7, [sp], #4 + 802dac8: 4770 bx lr -0802da9a : +0802daca : * @param ITSources Interrupt sources enabled. * @retval HAL status */ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) { - 802da9a: b580 push {r7, lr} - 802da9c: b086 sub sp, #24 - 802da9e: af00 add r7, sp, #0 - 802daa0: 60f8 str r0, [r7, #12] - 802daa2: 60b9 str r1, [r7, #8] - 802daa4: 607a str r2, [r7, #4] + 802daca: b580 push {r7, lr} + 802dacc: b086 sub sp, #24 + 802dace: af00 add r7, sp, #0 + 802dad0: 60f8 str r0, [r7, #12] + 802dad2: 60b9 str r1, [r7, #8] + 802dad4: 607a str r2, [r7, #4] uint32_t tmpoptions = hi2c->XferOptions; - 802daa6: 68fb ldr r3, [r7, #12] - 802daa8: 6adb ldr r3, [r3, #44] ; 0x2c - 802daaa: 617b str r3, [r7, #20] + 802dad6: 68fb ldr r3, [r7, #12] + 802dad8: 6adb ldr r3, [r3, #44] ; 0x2c + 802dada: 617b str r3, [r7, #20] uint32_t tmpITFlags = ITFlags; - 802daac: 68bb ldr r3, [r7, #8] - 802daae: 613b str r3, [r7, #16] + 802dadc: 68bb ldr r3, [r7, #8] + 802dade: 613b str r3, [r7, #16] /* Process locked */ __HAL_LOCK(hi2c); - 802dab0: 68fb ldr r3, [r7, #12] - 802dab2: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 802dab6: 2b01 cmp r3, #1 - 802dab8: d101 bne.n 802dabe - 802daba: 2302 movs r3, #2 - 802dabc: e0ec b.n 802dc98 - 802dabe: 68fb ldr r3, [r7, #12] - 802dac0: 2201 movs r2, #1 - 802dac2: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802dae0: 68fb ldr r3, [r7, #12] + 802dae2: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 + 802dae6: 2b01 cmp r3, #1 + 802dae8: d101 bne.n 802daee + 802daea: 2302 movs r3, #2 + 802daec: e0ec b.n 802dcc8 + 802daee: 68fb ldr r3, [r7, #12] + 802daf0: 2201 movs r2, #1 + 802daf2: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Check if STOPF is set */ if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ - 802dac6: 693b ldr r3, [r7, #16] - 802dac8: 095b lsrs r3, r3, #5 - 802daca: f003 0301 and.w r3, r3, #1 - 802dace: 2b00 cmp r3, #0 - 802dad0: d009 beq.n 802dae6 + 802daf6: 693b ldr r3, [r7, #16] + 802daf8: 095b lsrs r3, r3, #5 + 802dafa: f003 0301 and.w r3, r3, #1 + 802dafe: 2b00 cmp r3, #0 + 802db00: d009 beq.n 802db16 (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) - 802dad2: 687b ldr r3, [r7, #4] - 802dad4: 095b lsrs r3, r3, #5 - 802dad6: f003 0301 and.w r3, r3, #1 + 802db02: 687b ldr r3, [r7, #4] + 802db04: 095b lsrs r3, r3, #5 + 802db06: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ - 802dada: 2b00 cmp r3, #0 - 802dadc: d003 beq.n 802dae6 + 802db0a: 2b00 cmp r3, #0 + 802db0c: d003 beq.n 802db16 { /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, tmpITFlags); - 802dade: 6939 ldr r1, [r7, #16] - 802dae0: 68f8 ldr r0, [r7, #12] - 802dae2: f000 f9bf bl 802de64 + 802db0e: 6939 ldr r1, [r7, #16] + 802db10: 68f8 ldr r0, [r7, #12] + 802db12: f000 f9bf bl 802de94 } if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - 802dae6: 693b ldr r3, [r7, #16] - 802dae8: 091b lsrs r3, r3, #4 - 802daea: f003 0301 and.w r3, r3, #1 - 802daee: 2b00 cmp r3, #0 - 802daf0: d04d beq.n 802db8e + 802db16: 693b ldr r3, [r7, #16] + 802db18: 091b lsrs r3, r3, #4 + 802db1a: f003 0301 and.w r3, r3, #1 + 802db1e: 2b00 cmp r3, #0 + 802db20: d04d beq.n 802dbbe (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) - 802daf2: 687b ldr r3, [r7, #4] - 802daf4: 091b lsrs r3, r3, #4 - 802daf6: f003 0301 and.w r3, r3, #1 + 802db22: 687b ldr r3, [r7, #4] + 802db24: 091b lsrs r3, r3, #4 + 802db26: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - 802dafa: 2b00 cmp r3, #0 - 802dafc: d047 beq.n 802db8e + 802db2a: 2b00 cmp r3, #0 + 802db2c: d047 beq.n 802dbbe { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ /* Mean XferCount == 0*/ /* So clear Flag NACKF only */ if (hi2c->XferCount == 0U) - 802dafe: 68fb ldr r3, [r7, #12] - 802db00: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802db02: b29b uxth r3, r3 - 802db04: 2b00 cmp r3, #0 - 802db06: d128 bne.n 802db5a + 802db2e: 68fb ldr r3, [r7, #12] + 802db30: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802db32: b29b uxth r3, r3 + 802db34: 2b00 cmp r3, #0 + 802db36: d128 bne.n 802db8a { if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) - 802db08: 68fb ldr r3, [r7, #12] - 802db0a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802db0e: b2db uxtb r3, r3 - 802db10: 2b28 cmp r3, #40 ; 0x28 - 802db12: d108 bne.n 802db26 - 802db14: 697b ldr r3, [r7, #20] - 802db16: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 802db1a: d104 bne.n 802db26 + 802db38: 68fb ldr r3, [r7, #12] + 802db3a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802db3e: b2db uxtb r3, r3 + 802db40: 2b28 cmp r3, #40 ; 0x28 + 802db42: d108 bne.n 802db56 + 802db44: 697b ldr r3, [r7, #20] + 802db46: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 802db4a: d104 bne.n 802db56 /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */ { /* Call I2C Listen complete process */ I2C_ITListenCplt(hi2c, tmpITFlags); - 802db1c: 6939 ldr r1, [r7, #16] - 802db1e: 68f8 ldr r0, [r7, #12] - 802db20: f000 fb98 bl 802e254 - 802db24: e032 b.n 802db8c + 802db4c: 6939 ldr r1, [r7, #16] + 802db4e: 68f8 ldr r0, [r7, #12] + 802db50: f000 fb98 bl 802e284 + 802db54: e032 b.n 802dbbc } else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME)) - 802db26: 68fb ldr r3, [r7, #12] - 802db28: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802db2c: b2db uxtb r3, r3 - 802db2e: 2b29 cmp r3, #41 ; 0x29 - 802db30: d10e bne.n 802db50 - 802db32: 697b ldr r3, [r7, #20] - 802db34: f513 3f80 cmn.w r3, #65536 ; 0x10000 - 802db38: d00a beq.n 802db50 + 802db56: 68fb ldr r3, [r7, #12] + 802db58: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802db5c: b2db uxtb r3, r3 + 802db5e: 2b29 cmp r3, #41 ; 0x29 + 802db60: d10e bne.n 802db80 + 802db62: 697b ldr r3, [r7, #20] + 802db64: f513 3f80 cmn.w r3, #65536 ; 0x10000 + 802db68: d00a beq.n 802db80 { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 802db3a: 68fb ldr r3, [r7, #12] - 802db3c: 681b ldr r3, [r3, #0] - 802db3e: 2210 movs r2, #16 - 802db40: 61da str r2, [r3, #28] + 802db6a: 68fb ldr r3, [r7, #12] + 802db6c: 681b ldr r3, [r3, #0] + 802db6e: 2210 movs r2, #16 + 802db70: 61da str r2, [r3, #28] /* Flush TX register */ I2C_Flush_TXDR(hi2c); - 802db42: 68f8 ldr r0, [r7, #12] - 802db44: f000 fcd3 bl 802e4ee + 802db72: 68f8 ldr r0, [r7, #12] + 802db74: f000 fcd3 bl 802e51e /* Last Byte is Transmitted */ /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 802db48: 68f8 ldr r0, [r7, #12] - 802db4a: f000 f92d bl 802dda8 - 802db4e: e01d b.n 802db8c + 802db78: 68f8 ldr r0, [r7, #12] + 802db7a: f000 f92d bl 802ddd8 + 802db7e: e01d b.n 802dbbc } else { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 802db50: 68fb ldr r3, [r7, #12] - 802db52: 681b ldr r3, [r3, #0] - 802db54: 2210 movs r2, #16 - 802db56: 61da str r2, [r3, #28] + 802db80: 68fb ldr r3, [r7, #12] + 802db82: 681b ldr r3, [r3, #0] + 802db84: 2210 movs r2, #16 + 802db86: 61da str r2, [r3, #28] if (hi2c->XferCount == 0U) - 802db58: e096 b.n 802dc88 + 802db88: e096 b.n 802dcb8 } else { /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 802db5a: 68fb ldr r3, [r7, #12] - 802db5c: 681b ldr r3, [r3, #0] - 802db5e: 2210 movs r2, #16 - 802db60: 61da str r2, [r3, #28] + 802db8a: 68fb ldr r3, [r7, #12] + 802db8c: 681b ldr r3, [r3, #0] + 802db8e: 2210 movs r2, #16 + 802db90: 61da str r2, [r3, #28] /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 802db62: 68fb ldr r3, [r7, #12] - 802db64: 6c5b ldr r3, [r3, #68] ; 0x44 - 802db66: f043 0204 orr.w r2, r3, #4 - 802db6a: 68fb ldr r3, [r7, #12] - 802db6c: 645a str r2, [r3, #68] ; 0x44 + 802db92: 68fb ldr r3, [r7, #12] + 802db94: 6c5b ldr r3, [r3, #68] ; 0x44 + 802db96: f043 0204 orr.w r2, r3, #4 + 802db9a: 68fb ldr r3, [r7, #12] + 802db9c: 645a str r2, [r3, #68] ; 0x44 if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) - 802db6e: 697b ldr r3, [r7, #20] - 802db70: 2b00 cmp r3, #0 - 802db72: d004 beq.n 802db7e - 802db74: 697b ldr r3, [r7, #20] - 802db76: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 802db7a: f040 8085 bne.w 802dc88 + 802db9e: 697b ldr r3, [r7, #20] + 802dba0: 2b00 cmp r3, #0 + 802dba2: d004 beq.n 802dbae + 802dba4: 697b ldr r3, [r7, #20] + 802dba6: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 802dbaa: f040 8085 bne.w 802dcb8 { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c, hi2c->ErrorCode); - 802db7e: 68fb ldr r3, [r7, #12] - 802db80: 6c5b ldr r3, [r3, #68] ; 0x44 - 802db82: 4619 mov r1, r3 - 802db84: 68f8 ldr r0, [r7, #12] - 802db86: f000 fbbb bl 802e300 + 802dbae: 68fb ldr r3, [r7, #12] + 802dbb0: 6c5b ldr r3, [r3, #68] ; 0x44 + 802dbb2: 4619 mov r1, r3 + 802dbb4: 68f8 ldr r0, [r7, #12] + 802dbb6: f000 fbbb bl 802e330 if (hi2c->XferCount == 0U) - 802db8a: e07d b.n 802dc88 - 802db8c: e07c b.n 802dc88 + 802dbba: e07d b.n 802dcb8 + 802dbbc: e07c b.n 802dcb8 } } } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ - 802db8e: 693b ldr r3, [r7, #16] - 802db90: 089b lsrs r3, r3, #2 - 802db92: f003 0301 and.w r3, r3, #1 - 802db96: 2b00 cmp r3, #0 - 802db98: d030 beq.n 802dbfc + 802dbbe: 693b ldr r3, [r7, #16] + 802dbc0: 089b lsrs r3, r3, #2 + 802dbc2: f003 0301 and.w r3, r3, #1 + 802dbc6: 2b00 cmp r3, #0 + 802dbc8: d030 beq.n 802dc2c (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) - 802db9a: 687b ldr r3, [r7, #4] - 802db9c: 089b lsrs r3, r3, #2 - 802db9e: f003 0301 and.w r3, r3, #1 + 802dbca: 687b ldr r3, [r7, #4] + 802dbcc: 089b lsrs r3, r3, #2 + 802dbce: f003 0301 and.w r3, r3, #1 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ - 802dba2: 2b00 cmp r3, #0 - 802dba4: d02a beq.n 802dbfc + 802dbd2: 2b00 cmp r3, #0 + 802dbd4: d02a beq.n 802dc2c { if (hi2c->XferCount > 0U) - 802dba6: 68fb ldr r3, [r7, #12] - 802dba8: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dbaa: b29b uxth r3, r3 - 802dbac: 2b00 cmp r3, #0 - 802dbae: d018 beq.n 802dbe2 + 802dbd6: 68fb ldr r3, [r7, #12] + 802dbd8: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dbda: b29b uxth r3, r3 + 802dbdc: 2b00 cmp r3, #0 + 802dbde: d018 beq.n 802dc12 { /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - 802dbb0: 68fb ldr r3, [r7, #12] - 802dbb2: 681b ldr r3, [r3, #0] - 802dbb4: 6a5a ldr r2, [r3, #36] ; 0x24 - 802dbb6: 68fb ldr r3, [r7, #12] - 802dbb8: 6a5b ldr r3, [r3, #36] ; 0x24 - 802dbba: b2d2 uxtb r2, r2 - 802dbbc: 701a strb r2, [r3, #0] + 802dbe0: 68fb ldr r3, [r7, #12] + 802dbe2: 681b ldr r3, [r3, #0] + 802dbe4: 6a5a ldr r2, [r3, #36] ; 0x24 + 802dbe6: 68fb ldr r3, [r7, #12] + 802dbe8: 6a5b ldr r3, [r3, #36] ; 0x24 + 802dbea: b2d2 uxtb r2, r2 + 802dbec: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 802dbbe: 68fb ldr r3, [r7, #12] - 802dbc0: 6a5b ldr r3, [r3, #36] ; 0x24 - 802dbc2: 1c5a adds r2, r3, #1 - 802dbc4: 68fb ldr r3, [r7, #12] - 802dbc6: 625a str r2, [r3, #36] ; 0x24 + 802dbee: 68fb ldr r3, [r7, #12] + 802dbf0: 6a5b ldr r3, [r3, #36] ; 0x24 + 802dbf2: 1c5a adds r2, r3, #1 + 802dbf4: 68fb ldr r3, [r7, #12] + 802dbf6: 625a str r2, [r3, #36] ; 0x24 hi2c->XferSize--; - 802dbc8: 68fb ldr r3, [r7, #12] - 802dbca: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802dbcc: 3b01 subs r3, #1 - 802dbce: b29a uxth r2, r3 - 802dbd0: 68fb ldr r3, [r7, #12] - 802dbd2: 851a strh r2, [r3, #40] ; 0x28 + 802dbf8: 68fb ldr r3, [r7, #12] + 802dbfa: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802dbfc: 3b01 subs r3, #1 + 802dbfe: b29a uxth r2, r3 + 802dc00: 68fb ldr r3, [r7, #12] + 802dc02: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; - 802dbd4: 68fb ldr r3, [r7, #12] - 802dbd6: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dbd8: b29b uxth r3, r3 - 802dbda: 3b01 subs r3, #1 - 802dbdc: b29a uxth r2, r3 - 802dbde: 68fb ldr r3, [r7, #12] - 802dbe0: 855a strh r2, [r3, #42] ; 0x2a + 802dc04: 68fb ldr r3, [r7, #12] + 802dc06: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dc08: b29b uxth r3, r3 + 802dc0a: 3b01 subs r3, #1 + 802dc0c: b29a uxth r2, r3 + 802dc0e: 68fb ldr r3, [r7, #12] + 802dc10: 855a strh r2, [r3, #42] ; 0x2a } if ((hi2c->XferCount == 0U) && \ - 802dbe2: 68fb ldr r3, [r7, #12] - 802dbe4: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dbe6: b29b uxth r3, r3 - 802dbe8: 2b00 cmp r3, #0 - 802dbea: d14f bne.n 802dc8c - 802dbec: 697b ldr r3, [r7, #20] - 802dbee: f513 3f80 cmn.w r3, #65536 ; 0x10000 - 802dbf2: d04b beq.n 802dc8c + 802dc12: 68fb ldr r3, [r7, #12] + 802dc14: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dc16: b29b uxth r3, r3 + 802dc18: 2b00 cmp r3, #0 + 802dc1a: d14f bne.n 802dcbc + 802dc1c: 697b ldr r3, [r7, #20] + 802dc1e: f513 3f80 cmn.w r3, #65536 ; 0x10000 + 802dc22: d04b beq.n 802dcbc (tmpoptions != I2C_NO_OPTION_FRAME)) { /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 802dbf4: 68f8 ldr r0, [r7, #12] - 802dbf6: f000 f8d7 bl 802dda8 + 802dc24: 68f8 ldr r0, [r7, #12] + 802dc26: f000 f8d7 bl 802ddd8 if ((hi2c->XferCount == 0U) && \ - 802dbfa: e047 b.n 802dc8c + 802dc2a: e047 b.n 802dcbc } } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ - 802dbfc: 693b ldr r3, [r7, #16] - 802dbfe: 08db lsrs r3, r3, #3 - 802dc00: f003 0301 and.w r3, r3, #1 - 802dc04: 2b00 cmp r3, #0 - 802dc06: d00a beq.n 802dc1e + 802dc2c: 693b ldr r3, [r7, #16] + 802dc2e: 08db lsrs r3, r3, #3 + 802dc30: f003 0301 and.w r3, r3, #1 + 802dc34: 2b00 cmp r3, #0 + 802dc36: d00a beq.n 802dc4e (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) - 802dc08: 687b ldr r3, [r7, #4] - 802dc0a: 08db lsrs r3, r3, #3 - 802dc0c: f003 0301 and.w r3, r3, #1 + 802dc38: 687b ldr r3, [r7, #4] + 802dc3a: 08db lsrs r3, r3, #3 + 802dc3c: f003 0301 and.w r3, r3, #1 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ - 802dc10: 2b00 cmp r3, #0 - 802dc12: d004 beq.n 802dc1e + 802dc40: 2b00 cmp r3, #0 + 802dc42: d004 beq.n 802dc4e { I2C_ITAddrCplt(hi2c, tmpITFlags); - 802dc14: 6939 ldr r1, [r7, #16] - 802dc16: 68f8 ldr r0, [r7, #12] - 802dc18: f000 f842 bl 802dca0 - 802dc1c: e037 b.n 802dc8e + 802dc44: 6939 ldr r1, [r7, #16] + 802dc46: 68f8 ldr r0, [r7, #12] + 802dc48: f000 f842 bl 802dcd0 + 802dc4c: e037 b.n 802dcbe } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ - 802dc1e: 693b ldr r3, [r7, #16] - 802dc20: 085b lsrs r3, r3, #1 - 802dc22: f003 0301 and.w r3, r3, #1 - 802dc26: 2b00 cmp r3, #0 - 802dc28: d031 beq.n 802dc8e + 802dc4e: 693b ldr r3, [r7, #16] + 802dc50: 085b lsrs r3, r3, #1 + 802dc52: f003 0301 and.w r3, r3, #1 + 802dc56: 2b00 cmp r3, #0 + 802dc58: d031 beq.n 802dcbe (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) - 802dc2a: 687b ldr r3, [r7, #4] - 802dc2c: 085b lsrs r3, r3, #1 - 802dc2e: f003 0301 and.w r3, r3, #1 + 802dc5a: 687b ldr r3, [r7, #4] + 802dc5c: 085b lsrs r3, r3, #1 + 802dc5e: f003 0301 and.w r3, r3, #1 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ - 802dc32: 2b00 cmp r3, #0 - 802dc34: d02b beq.n 802dc8e + 802dc62: 2b00 cmp r3, #0 + 802dc64: d02b beq.n 802dcbe { /* Write data to TXDR only if XferCount not reach "0" */ /* A TXIS flag can be set, during STOP treatment */ /* Check if all Data have already been sent */ /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ if (hi2c->XferCount > 0U) - 802dc36: 68fb ldr r3, [r7, #12] - 802dc38: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dc3a: b29b uxth r3, r3 - 802dc3c: 2b00 cmp r3, #0 - 802dc3e: d018 beq.n 802dc72 + 802dc66: 68fb ldr r3, [r7, #12] + 802dc68: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dc6a: b29b uxth r3, r3 + 802dc6c: 2b00 cmp r3, #0 + 802dc6e: d018 beq.n 802dca2 { /* Write data to TXDR */ hi2c->Instance->TXDR = *hi2c->pBuffPtr; - 802dc40: 68fb ldr r3, [r7, #12] - 802dc42: 6a5b ldr r3, [r3, #36] ; 0x24 - 802dc44: 781a ldrb r2, [r3, #0] - 802dc46: 68fb ldr r3, [r7, #12] - 802dc48: 681b ldr r3, [r3, #0] - 802dc4a: 629a str r2, [r3, #40] ; 0x28 + 802dc70: 68fb ldr r3, [r7, #12] + 802dc72: 6a5b ldr r3, [r3, #36] ; 0x24 + 802dc74: 781a ldrb r2, [r3, #0] + 802dc76: 68fb ldr r3, [r7, #12] + 802dc78: 681b ldr r3, [r3, #0] + 802dc7a: 629a str r2, [r3, #40] ; 0x28 /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 802dc4c: 68fb ldr r3, [r7, #12] - 802dc4e: 6a5b ldr r3, [r3, #36] ; 0x24 - 802dc50: 1c5a adds r2, r3, #1 - 802dc52: 68fb ldr r3, [r7, #12] - 802dc54: 625a str r2, [r3, #36] ; 0x24 + 802dc7c: 68fb ldr r3, [r7, #12] + 802dc7e: 6a5b ldr r3, [r3, #36] ; 0x24 + 802dc80: 1c5a adds r2, r3, #1 + 802dc82: 68fb ldr r3, [r7, #12] + 802dc84: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount--; - 802dc56: 68fb ldr r3, [r7, #12] - 802dc58: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dc5a: b29b uxth r3, r3 - 802dc5c: 3b01 subs r3, #1 - 802dc5e: b29a uxth r2, r3 - 802dc60: 68fb ldr r3, [r7, #12] - 802dc62: 855a strh r2, [r3, #42] ; 0x2a + 802dc86: 68fb ldr r3, [r7, #12] + 802dc88: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dc8a: b29b uxth r3, r3 + 802dc8c: 3b01 subs r3, #1 + 802dc8e: b29a uxth r2, r3 + 802dc90: 68fb ldr r3, [r7, #12] + 802dc92: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize--; - 802dc64: 68fb ldr r3, [r7, #12] - 802dc66: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802dc68: 3b01 subs r3, #1 - 802dc6a: b29a uxth r2, r3 - 802dc6c: 68fb ldr r3, [r7, #12] - 802dc6e: 851a strh r2, [r3, #40] ; 0x28 - 802dc70: e00d b.n 802dc8e + 802dc94: 68fb ldr r3, [r7, #12] + 802dc96: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802dc98: 3b01 subs r3, #1 + 802dc9a: b29a uxth r2, r3 + 802dc9c: 68fb ldr r3, [r7, #12] + 802dc9e: 851a strh r2, [r3, #40] ; 0x28 + 802dca0: e00d b.n 802dcbe } else { if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) - 802dc72: 697b ldr r3, [r7, #20] - 802dc74: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 802dc78: d002 beq.n 802dc80 - 802dc7a: 697b ldr r3, [r7, #20] - 802dc7c: 2b00 cmp r3, #0 - 802dc7e: d106 bne.n 802dc8e + 802dca2: 697b ldr r3, [r7, #20] + 802dca4: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 802dca8: d002 beq.n 802dcb0 + 802dcaa: 697b ldr r3, [r7, #20] + 802dcac: 2b00 cmp r3, #0 + 802dcae: d106 bne.n 802dcbe { /* Last Byte is Transmitted */ /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 802dc80: 68f8 ldr r0, [r7, #12] - 802dc82: f000 f891 bl 802dda8 - 802dc86: e002 b.n 802dc8e + 802dcb0: 68f8 ldr r0, [r7, #12] + 802dcb2: f000 f891 bl 802ddd8 + 802dcb6: e002 b.n 802dcbe if (hi2c->XferCount == 0U) - 802dc88: bf00 nop - 802dc8a: e000 b.n 802dc8e + 802dcb8: bf00 nop + 802dcba: e000 b.n 802dcbe if ((hi2c->XferCount == 0U) && \ - 802dc8c: bf00 nop + 802dcbc: bf00 nop { /* Nothing to do */ } /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802dc8e: 68fb ldr r3, [r7, #12] - 802dc90: 2200 movs r2, #0 - 802dc92: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802dcbe: 68fb ldr r3, [r7, #12] + 802dcc0: 2200 movs r2, #0 + 802dcc2: f883 2040 strb.w r2, [r3, #64] ; 0x40 return HAL_OK; - 802dc96: 2300 movs r3, #0 + 802dcc6: 2300 movs r3, #0 } - 802dc98: 4618 mov r0, r3 - 802dc9a: 3718 adds r7, #24 - 802dc9c: 46bd mov sp, r7 - 802dc9e: bd80 pop {r7, pc} + 802dcc8: 4618 mov r0, r3 + 802dcca: 3718 adds r7, #24 + 802dccc: 46bd mov sp, r7 + 802dcce: bd80 pop {r7, pc} -0802dca0 : +0802dcd0 : * @param hi2c I2C handle. * @param ITFlags Interrupt flags to handle. * @retval None */ static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { - 802dca0: b580 push {r7, lr} - 802dca2: b084 sub sp, #16 - 802dca4: af00 add r7, sp, #0 - 802dca6: 6078 str r0, [r7, #4] - 802dca8: 6039 str r1, [r7, #0] + 802dcd0: b580 push {r7, lr} + 802dcd2: b084 sub sp, #16 + 802dcd4: af00 add r7, sp, #0 + 802dcd6: 6078 str r0, [r7, #4] + 802dcd8: 6039 str r1, [r7, #0] /* Prevent unused argument(s) compilation warning */ UNUSED(ITFlags); /* In case of Listen state, need to inform upper layer of address match code event */ if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) - 802dcaa: 687b ldr r3, [r7, #4] - 802dcac: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802dcb0: b2db uxtb r3, r3 - 802dcb2: f003 0328 and.w r3, r3, #40 ; 0x28 - 802dcb6: 2b28 cmp r3, #40 ; 0x28 - 802dcb8: d16a bne.n 802dd90 + 802dcda: 687b ldr r3, [r7, #4] + 802dcdc: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802dce0: b2db uxtb r3, r3 + 802dce2: f003 0328 and.w r3, r3, #40 ; 0x28 + 802dce6: 2b28 cmp r3, #40 ; 0x28 + 802dce8: d16a bne.n 802ddc0 { transferdirection = I2C_GET_DIR(hi2c); - 802dcba: 687b ldr r3, [r7, #4] - 802dcbc: 681b ldr r3, [r3, #0] - 802dcbe: 699b ldr r3, [r3, #24] - 802dcc0: 0c1b lsrs r3, r3, #16 - 802dcc2: b2db uxtb r3, r3 - 802dcc4: f003 0301 and.w r3, r3, #1 - 802dcc8: 73fb strb r3, [r7, #15] + 802dcea: 687b ldr r3, [r7, #4] + 802dcec: 681b ldr r3, [r3, #0] + 802dcee: 699b ldr r3, [r3, #24] + 802dcf0: 0c1b lsrs r3, r3, #16 + 802dcf2: b2db uxtb r3, r3 + 802dcf4: f003 0301 and.w r3, r3, #1 + 802dcf8: 73fb strb r3, [r7, #15] slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); - 802dcca: 687b ldr r3, [r7, #4] - 802dccc: 681b ldr r3, [r3, #0] - 802dcce: 699b ldr r3, [r3, #24] - 802dcd0: 0c1b lsrs r3, r3, #16 - 802dcd2: b29b uxth r3, r3 - 802dcd4: f003 03fe and.w r3, r3, #254 ; 0xfe - 802dcd8: 81bb strh r3, [r7, #12] + 802dcfa: 687b ldr r3, [r7, #4] + 802dcfc: 681b ldr r3, [r3, #0] + 802dcfe: 699b ldr r3, [r3, #24] + 802dd00: 0c1b lsrs r3, r3, #16 + 802dd02: b29b uxth r3, r3 + 802dd04: f003 03fe and.w r3, r3, #254 ; 0xfe + 802dd08: 81bb strh r3, [r7, #12] ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); - 802dcda: 687b ldr r3, [r7, #4] - 802dcdc: 681b ldr r3, [r3, #0] - 802dcde: 689b ldr r3, [r3, #8] - 802dce0: b29b uxth r3, r3 - 802dce2: f3c3 0309 ubfx r3, r3, #0, #10 - 802dce6: 817b strh r3, [r7, #10] + 802dd0a: 687b ldr r3, [r7, #4] + 802dd0c: 681b ldr r3, [r3, #0] + 802dd0e: 689b ldr r3, [r3, #8] + 802dd10: b29b uxth r3, r3 + 802dd12: f3c3 0309 ubfx r3, r3, #0, #10 + 802dd16: 817b strh r3, [r7, #10] ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); - 802dce8: 687b ldr r3, [r7, #4] - 802dcea: 681b ldr r3, [r3, #0] - 802dcec: 68db ldr r3, [r3, #12] - 802dcee: b29b uxth r3, r3 - 802dcf0: f003 03fe and.w r3, r3, #254 ; 0xfe - 802dcf4: 813b strh r3, [r7, #8] + 802dd18: 687b ldr r3, [r7, #4] + 802dd1a: 681b ldr r3, [r3, #0] + 802dd1c: 68db ldr r3, [r3, #12] + 802dd1e: b29b uxth r3, r3 + 802dd20: f003 03fe and.w r3, r3, #254 ; 0xfe + 802dd24: 813b strh r3, [r7, #8] /* If 10bits addressing mode is selected */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - 802dcf6: 687b ldr r3, [r7, #4] - 802dcf8: 68db ldr r3, [r3, #12] - 802dcfa: 2b02 cmp r3, #2 - 802dcfc: d138 bne.n 802dd70 + 802dd26: 687b ldr r3, [r7, #4] + 802dd28: 68db ldr r3, [r3, #12] + 802dd2a: 2b02 cmp r3, #2 + 802dd2c: d138 bne.n 802dda0 { if ((slaveaddrcode & SLAVE_ADDR_MSK) == ((ownadd1code >> SLAVE_ADDR_SHIFT) & SLAVE_ADDR_MSK)) - 802dcfe: 897b ldrh r3, [r7, #10] - 802dd00: 09db lsrs r3, r3, #7 - 802dd02: b29a uxth r2, r3 - 802dd04: 89bb ldrh r3, [r7, #12] - 802dd06: 4053 eors r3, r2 - 802dd08: b29b uxth r3, r3 - 802dd0a: f003 0306 and.w r3, r3, #6 - 802dd0e: 2b00 cmp r3, #0 - 802dd10: d11c bne.n 802dd4c + 802dd2e: 897b ldrh r3, [r7, #10] + 802dd30: 09db lsrs r3, r3, #7 + 802dd32: b29a uxth r2, r3 + 802dd34: 89bb ldrh r3, [r7, #12] + 802dd36: 4053 eors r3, r2 + 802dd38: b29b uxth r3, r3 + 802dd3a: f003 0306 and.w r3, r3, #6 + 802dd3e: 2b00 cmp r3, #0 + 802dd40: d11c bne.n 802dd7c { slaveaddrcode = ownadd1code; - 802dd12: 897b ldrh r3, [r7, #10] - 802dd14: 81bb strh r3, [r7, #12] + 802dd42: 897b ldrh r3, [r7, #10] + 802dd44: 81bb strh r3, [r7, #12] hi2c->AddrEventCount++; - 802dd16: 687b ldr r3, [r7, #4] - 802dd18: 6c9b ldr r3, [r3, #72] ; 0x48 - 802dd1a: 1c5a adds r2, r3, #1 - 802dd1c: 687b ldr r3, [r7, #4] - 802dd1e: 649a str r2, [r3, #72] ; 0x48 + 802dd46: 687b ldr r3, [r7, #4] + 802dd48: 6c9b ldr r3, [r3, #72] ; 0x48 + 802dd4a: 1c5a adds r2, r3, #1 + 802dd4c: 687b ldr r3, [r7, #4] + 802dd4e: 649a str r2, [r3, #72] ; 0x48 if (hi2c->AddrEventCount == 2U) - 802dd20: 687b ldr r3, [r7, #4] - 802dd22: 6c9b ldr r3, [r3, #72] ; 0x48 - 802dd24: 2b02 cmp r3, #2 - 802dd26: d13b bne.n 802dda0 + 802dd50: 687b ldr r3, [r7, #4] + 802dd52: 6c9b ldr r3, [r3, #72] ; 0x48 + 802dd54: 2b02 cmp r3, #2 + 802dd56: d13b bne.n 802ddd0 { /* Reset Address Event counter */ hi2c->AddrEventCount = 0U; - 802dd28: 687b ldr r3, [r7, #4] - 802dd2a: 2200 movs r2, #0 - 802dd2c: 649a str r2, [r3, #72] ; 0x48 + 802dd58: 687b ldr r3, [r7, #4] + 802dd5a: 2200 movs r2, #0 + 802dd5c: 649a str r2, [r3, #72] ; 0x48 /* Clear ADDR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - 802dd2e: 687b ldr r3, [r7, #4] - 802dd30: 681b ldr r3, [r3, #0] - 802dd32: 2208 movs r2, #8 - 802dd34: 61da str r2, [r3, #28] + 802dd5e: 687b ldr r3, [r7, #4] + 802dd60: 681b ldr r3, [r3, #0] + 802dd62: 2208 movs r2, #8 + 802dd64: 61da str r2, [r3, #28] /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802dd36: 687b ldr r3, [r7, #4] - 802dd38: 2200 movs r2, #0 - 802dd3a: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802dd66: 687b ldr r3, [r7, #4] + 802dd68: 2200 movs r2, #0 + 802dd6a: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Call Slave Addr callback */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); #else HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - 802dd3e: 89ba ldrh r2, [r7, #12] - 802dd40: 7bfb ldrb r3, [r7, #15] - 802dd42: 4619 mov r1, r3 - 802dd44: 6878 ldr r0, [r7, #4] - 802dd46: f7ff fe7c bl 802da42 + 802dd6e: 89ba ldrh r2, [r7, #12] + 802dd70: 7bfb ldrb r3, [r7, #15] + 802dd72: 4619 mov r1, r3 + 802dd74: 6878 ldr r0, [r7, #4] + 802dd76: f7ff fe7c bl 802da72 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); /* Process Unlocked */ __HAL_UNLOCK(hi2c); } } - 802dd4a: e029 b.n 802dda0 + 802dd7a: e029 b.n 802ddd0 slaveaddrcode = ownadd2code; - 802dd4c: 893b ldrh r3, [r7, #8] - 802dd4e: 81bb strh r3, [r7, #12] + 802dd7c: 893b ldrh r3, [r7, #8] + 802dd7e: 81bb strh r3, [r7, #12] I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - 802dd50: f44f 4100 mov.w r1, #32768 ; 0x8000 - 802dd54: 6878 ldr r0, [r7, #4] - 802dd56: f000 fc0c bl 802e572 + 802dd80: f44f 4100 mov.w r1, #32768 ; 0x8000 + 802dd84: 6878 ldr r0, [r7, #4] + 802dd86: f000 fc0c bl 802e5a2 __HAL_UNLOCK(hi2c); - 802dd5a: 687b ldr r3, [r7, #4] - 802dd5c: 2200 movs r2, #0 - 802dd5e: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802dd8a: 687b ldr r3, [r7, #4] + 802dd8c: 2200 movs r2, #0 + 802dd8e: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - 802dd62: 89ba ldrh r2, [r7, #12] - 802dd64: 7bfb ldrb r3, [r7, #15] - 802dd66: 4619 mov r1, r3 - 802dd68: 6878 ldr r0, [r7, #4] - 802dd6a: f7ff fe6a bl 802da42 + 802dd92: 89ba ldrh r2, [r7, #12] + 802dd94: 7bfb ldrb r3, [r7, #15] + 802dd96: 4619 mov r1, r3 + 802dd98: 6878 ldr r0, [r7, #4] + 802dd9a: f7ff fe6a bl 802da72 } - 802dd6e: e017 b.n 802dda0 + 802dd9e: e017 b.n 802ddd0 I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - 802dd70: f44f 4100 mov.w r1, #32768 ; 0x8000 - 802dd74: 6878 ldr r0, [r7, #4] - 802dd76: f000 fbfc bl 802e572 + 802dda0: f44f 4100 mov.w r1, #32768 ; 0x8000 + 802dda4: 6878 ldr r0, [r7, #4] + 802dda6: f000 fbfc bl 802e5a2 __HAL_UNLOCK(hi2c); - 802dd7a: 687b ldr r3, [r7, #4] - 802dd7c: 2200 movs r2, #0 - 802dd7e: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802ddaa: 687b ldr r3, [r7, #4] + 802ddac: 2200 movs r2, #0 + 802ddae: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - 802dd82: 89ba ldrh r2, [r7, #12] - 802dd84: 7bfb ldrb r3, [r7, #15] - 802dd86: 4619 mov r1, r3 - 802dd88: 6878 ldr r0, [r7, #4] - 802dd8a: f7ff fe5a bl 802da42 + 802ddb2: 89ba ldrh r2, [r7, #12] + 802ddb4: 7bfb ldrb r3, [r7, #15] + 802ddb6: 4619 mov r1, r3 + 802ddb8: 6878 ldr r0, [r7, #4] + 802ddba: f7ff fe5a bl 802da72 } - 802dd8e: e007 b.n 802dda0 + 802ddbe: e007 b.n 802ddd0 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - 802dd90: 687b ldr r3, [r7, #4] - 802dd92: 681b ldr r3, [r3, #0] - 802dd94: 2208 movs r2, #8 - 802dd96: 61da str r2, [r3, #28] + 802ddc0: 687b ldr r3, [r7, #4] + 802ddc2: 681b ldr r3, [r3, #0] + 802ddc4: 2208 movs r2, #8 + 802ddc6: 61da str r2, [r3, #28] __HAL_UNLOCK(hi2c); - 802dd98: 687b ldr r3, [r7, #4] - 802dd9a: 2200 movs r2, #0 - 802dd9c: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802ddc8: 687b ldr r3, [r7, #4] + 802ddca: 2200 movs r2, #0 + 802ddcc: f883 2040 strb.w r2, [r3, #64] ; 0x40 } - 802dda0: bf00 nop - 802dda2: 3710 adds r7, #16 - 802dda4: 46bd mov sp, r7 - 802dda6: bd80 pop {r7, pc} + 802ddd0: bf00 nop + 802ddd2: 3710 adds r7, #16 + 802ddd4: 46bd mov sp, r7 + 802ddd6: bd80 pop {r7, pc} -0802dda8 : +0802ddd8 : * @brief I2C Slave sequential complete process. * @param hi2c I2C handle. * @retval None */ static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c) { - 802dda8: b580 push {r7, lr} - 802ddaa: b084 sub sp, #16 - 802ddac: af00 add r7, sp, #0 - 802ddae: 6078 str r0, [r7, #4] + 802ddd8: b580 push {r7, lr} + 802ddda: b084 sub sp, #16 + 802dddc: af00 add r7, sp, #0 + 802ddde: 6078 str r0, [r7, #4] uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); - 802ddb0: 687b ldr r3, [r7, #4] - 802ddb2: 681b ldr r3, [r3, #0] - 802ddb4: 681b ldr r3, [r3, #0] - 802ddb6: 60fb str r3, [r7, #12] + 802dde0: 687b ldr r3, [r7, #4] + 802dde2: 681b ldr r3, [r3, #0] + 802dde4: 681b ldr r3, [r3, #0] + 802dde6: 60fb str r3, [r7, #12] /* Reset I2C handle mode */ hi2c->Mode = HAL_I2C_MODE_NONE; - 802ddb8: 687b ldr r3, [r7, #4] - 802ddba: 2200 movs r2, #0 - 802ddbc: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802dde8: 687b ldr r3, [r7, #4] + 802ddea: 2200 movs r2, #0 + 802ddec: f883 2042 strb.w r2, [r3, #66] ; 0x42 /* If a DMA is ongoing, Update handle size context */ if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) - 802ddc0: 68fb ldr r3, [r7, #12] - 802ddc2: 0b9b lsrs r3, r3, #14 - 802ddc4: f003 0301 and.w r3, r3, #1 - 802ddc8: 2b00 cmp r3, #0 - 802ddca: d008 beq.n 802ddde + 802ddf0: 68fb ldr r3, [r7, #12] + 802ddf2: 0b9b lsrs r3, r3, #14 + 802ddf4: f003 0301 and.w r3, r3, #1 + 802ddf8: 2b00 cmp r3, #0 + 802ddfa: d008 beq.n 802de0e { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - 802ddcc: 687b ldr r3, [r7, #4] - 802ddce: 681b ldr r3, [r3, #0] - 802ddd0: 681a ldr r2, [r3, #0] - 802ddd2: 687b ldr r3, [r7, #4] - 802ddd4: 681b ldr r3, [r3, #0] - 802ddd6: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 802ddda: 601a str r2, [r3, #0] - 802dddc: e00d b.n 802ddfa + 802ddfc: 687b ldr r3, [r7, #4] + 802ddfe: 681b ldr r3, [r3, #0] + 802de00: 681a ldr r2, [r3, #0] + 802de02: 687b ldr r3, [r7, #4] + 802de04: 681b ldr r3, [r3, #0] + 802de06: f422 4280 bic.w r2, r2, #16384 ; 0x4000 + 802de0a: 601a str r2, [r3, #0] + 802de0c: e00d b.n 802de2a } else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) - 802ddde: 68fb ldr r3, [r7, #12] - 802dde0: 0bdb lsrs r3, r3, #15 - 802dde2: f003 0301 and.w r3, r3, #1 - 802dde6: 2b00 cmp r3, #0 - 802dde8: d007 beq.n 802ddfa + 802de0e: 68fb ldr r3, [r7, #12] + 802de10: 0bdb lsrs r3, r3, #15 + 802de12: f003 0301 and.w r3, r3, #1 + 802de16: 2b00 cmp r3, #0 + 802de18: d007 beq.n 802de2a { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - 802ddea: 687b ldr r3, [r7, #4] - 802ddec: 681b ldr r3, [r3, #0] - 802ddee: 681a ldr r2, [r3, #0] - 802ddf0: 687b ldr r3, [r7, #4] - 802ddf2: 681b ldr r3, [r3, #0] - 802ddf4: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802ddf8: 601a str r2, [r3, #0] + 802de1a: 687b ldr r3, [r7, #4] + 802de1c: 681b ldr r3, [r3, #0] + 802de1e: 681a ldr r2, [r3, #0] + 802de20: 687b ldr r3, [r7, #4] + 802de22: 681b ldr r3, [r3, #0] + 802de24: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802de28: 601a str r2, [r3, #0] else { /* Do nothing */ } if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) - 802ddfa: 687b ldr r3, [r7, #4] - 802ddfc: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802de00: b2db uxtb r3, r3 - 802de02: 2b29 cmp r3, #41 ; 0x29 - 802de04: d112 bne.n 802de2c + 802de2a: 687b ldr r3, [r7, #4] + 802de2c: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802de30: b2db uxtb r3, r3 + 802de32: 2b29 cmp r3, #41 ; 0x29 + 802de34: d112 bne.n 802de5c { /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ hi2c->State = HAL_I2C_STATE_LISTEN; - 802de06: 687b ldr r3, [r7, #4] - 802de08: 2228 movs r2, #40 ; 0x28 - 802de0a: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802de36: 687b ldr r3, [r7, #4] + 802de38: 2228 movs r2, #40 ; 0x28 + 802de3a: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; - 802de0e: 687b ldr r3, [r7, #4] - 802de10: 2221 movs r2, #33 ; 0x21 - 802de12: 631a str r2, [r3, #48] ; 0x30 + 802de3e: 687b ldr r3, [r7, #4] + 802de40: 2221 movs r2, #33 ; 0x21 + 802de42: 631a str r2, [r3, #48] ; 0x30 /* Disable Interrupts */ I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - 802de14: 2101 movs r1, #1 - 802de16: 6878 ldr r0, [r7, #4] - 802de18: f000 fbab bl 802e572 + 802de44: 2101 movs r1, #1 + 802de46: 6878 ldr r0, [r7, #4] + 802de48: f000 fbab bl 802e5a2 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802de1c: 687b ldr r3, [r7, #4] - 802de1e: 2200 movs r2, #0 - 802de20: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802de4c: 687b ldr r3, [r7, #4] + 802de4e: 2200 movs r2, #0 + 802de50: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->SlaveTxCpltCallback(hi2c); #else HAL_I2C_SlaveTxCpltCallback(hi2c); - 802de24: 6878 ldr r0, [r7, #4] - 802de26: f7ff fdf8 bl 802da1a + 802de54: 6878 ldr r0, [r7, #4] + 802de56: f7ff fdf8 bl 802da4a } else { /* Nothing to do */ } } - 802de2a: e017 b.n 802de5c + 802de5a: e017 b.n 802de8c else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) - 802de2c: 687b ldr r3, [r7, #4] - 802de2e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802de32: b2db uxtb r3, r3 - 802de34: 2b2a cmp r3, #42 ; 0x2a - 802de36: d111 bne.n 802de5c + 802de5c: 687b ldr r3, [r7, #4] + 802de5e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802de62: b2db uxtb r3, r3 + 802de64: 2b2a cmp r3, #42 ; 0x2a + 802de66: d111 bne.n 802de8c hi2c->State = HAL_I2C_STATE_LISTEN; - 802de38: 687b ldr r3, [r7, #4] - 802de3a: 2228 movs r2, #40 ; 0x28 - 802de3c: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802de68: 687b ldr r3, [r7, #4] + 802de6a: 2228 movs r2, #40 ; 0x28 + 802de6c: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; - 802de40: 687b ldr r3, [r7, #4] - 802de42: 2222 movs r2, #34 ; 0x22 - 802de44: 631a str r2, [r3, #48] ; 0x30 + 802de70: 687b ldr r3, [r7, #4] + 802de72: 2222 movs r2, #34 ; 0x22 + 802de74: 631a str r2, [r3, #48] ; 0x30 I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - 802de46: 2102 movs r1, #2 - 802de48: 6878 ldr r0, [r7, #4] - 802de4a: f000 fb92 bl 802e572 + 802de76: 2102 movs r1, #2 + 802de78: 6878 ldr r0, [r7, #4] + 802de7a: f000 fb92 bl 802e5a2 __HAL_UNLOCK(hi2c); - 802de4e: 687b ldr r3, [r7, #4] - 802de50: 2200 movs r2, #0 - 802de52: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802de7e: 687b ldr r3, [r7, #4] + 802de80: 2200 movs r2, #0 + 802de82: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_SlaveRxCpltCallback(hi2c); - 802de56: 6878 ldr r0, [r7, #4] - 802de58: f7ff fde9 bl 802da2e + 802de86: 6878 ldr r0, [r7, #4] + 802de88: f7ff fde9 bl 802da5e } - 802de5c: bf00 nop - 802de5e: 3710 adds r7, #16 - 802de60: 46bd mov sp, r7 - 802de62: bd80 pop {r7, pc} + 802de8c: bf00 nop + 802de8e: 3710 adds r7, #16 + 802de90: 46bd mov sp, r7 + 802de92: bd80 pop {r7, pc} -0802de64 : +0802de94 : * @param hi2c I2C handle. * @param ITFlags Interrupt flags to handle. * @retval None */ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { - 802de64: b580 push {r7, lr} - 802de66: b086 sub sp, #24 - 802de68: af00 add r7, sp, #0 - 802de6a: 6078 str r0, [r7, #4] - 802de6c: 6039 str r1, [r7, #0] + 802de94: b580 push {r7, lr} + 802de96: b086 sub sp, #24 + 802de98: af00 add r7, sp, #0 + 802de9a: 6078 str r0, [r7, #4] + 802de9c: 6039 str r1, [r7, #0] uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); - 802de6e: 687b ldr r3, [r7, #4] - 802de70: 681b ldr r3, [r3, #0] - 802de72: 681b ldr r3, [r3, #0] - 802de74: 613b str r3, [r7, #16] + 802de9e: 687b ldr r3, [r7, #4] + 802dea0: 681b ldr r3, [r3, #0] + 802dea2: 681b ldr r3, [r3, #0] + 802dea4: 613b str r3, [r7, #16] uint32_t tmpITFlags = ITFlags; - 802de76: 683b ldr r3, [r7, #0] - 802de78: 617b str r3, [r7, #20] + 802dea6: 683b ldr r3, [r7, #0] + 802dea8: 617b str r3, [r7, #20] HAL_I2C_StateTypeDef tmpstate = hi2c->State; - 802de7a: 687b ldr r3, [r7, #4] - 802de7c: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802de80: 73fb strb r3, [r7, #15] + 802deaa: 687b ldr r3, [r7, #4] + 802deac: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802deb0: 73fb strb r3, [r7, #15] /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 802de82: 687b ldr r3, [r7, #4] - 802de84: 681b ldr r3, [r3, #0] - 802de86: 2220 movs r2, #32 - 802de88: 61da str r2, [r3, #28] + 802deb2: 687b ldr r3, [r7, #4] + 802deb4: 681b ldr r3, [r3, #0] + 802deb6: 2220 movs r2, #32 + 802deb8: 61da str r2, [r3, #28] /* Disable Interrupts and Store Previous state */ if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) - 802de8a: 7bfb ldrb r3, [r7, #15] - 802de8c: 2b21 cmp r3, #33 ; 0x21 - 802de8e: d002 beq.n 802de96 - 802de90: 7bfb ldrb r3, [r7, #15] - 802de92: 2b29 cmp r3, #41 ; 0x29 - 802de94: d108 bne.n 802dea8 + 802deba: 7bfb ldrb r3, [r7, #15] + 802debc: 2b21 cmp r3, #33 ; 0x21 + 802debe: d002 beq.n 802dec6 + 802dec0: 7bfb ldrb r3, [r7, #15] + 802dec2: 2b29 cmp r3, #41 ; 0x29 + 802dec4: d108 bne.n 802ded8 { I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); - 802de96: f248 0101 movw r1, #32769 ; 0x8001 - 802de9a: 6878 ldr r0, [r7, #4] - 802de9c: f000 fb69 bl 802e572 + 802dec6: f248 0101 movw r1, #32769 ; 0x8001 + 802deca: 6878 ldr r0, [r7, #4] + 802decc: f000 fb69 bl 802e5a2 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; - 802dea0: 687b ldr r3, [r7, #4] - 802dea2: 2221 movs r2, #33 ; 0x21 - 802dea4: 631a str r2, [r3, #48] ; 0x30 - 802dea6: e00d b.n 802dec4 + 802ded0: 687b ldr r3, [r7, #4] + 802ded2: 2221 movs r2, #33 ; 0x21 + 802ded4: 631a str r2, [r3, #48] ; 0x30 + 802ded6: e00d b.n 802def4 } else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) - 802dea8: 7bfb ldrb r3, [r7, #15] - 802deaa: 2b22 cmp r3, #34 ; 0x22 - 802deac: d002 beq.n 802deb4 - 802deae: 7bfb ldrb r3, [r7, #15] - 802deb0: 2b2a cmp r3, #42 ; 0x2a - 802deb2: d107 bne.n 802dec4 + 802ded8: 7bfb ldrb r3, [r7, #15] + 802deda: 2b22 cmp r3, #34 ; 0x22 + 802dedc: d002 beq.n 802dee4 + 802dede: 7bfb ldrb r3, [r7, #15] + 802dee0: 2b2a cmp r3, #42 ; 0x2a + 802dee2: d107 bne.n 802def4 { I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); - 802deb4: f248 0102 movw r1, #32770 ; 0x8002 - 802deb8: 6878 ldr r0, [r7, #4] - 802deba: f000 fb5a bl 802e572 + 802dee4: f248 0102 movw r1, #32770 ; 0x8002 + 802dee8: 6878 ldr r0, [r7, #4] + 802deea: f000 fb5a bl 802e5a2 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; - 802debe: 687b ldr r3, [r7, #4] - 802dec0: 2222 movs r2, #34 ; 0x22 - 802dec2: 631a str r2, [r3, #48] ; 0x30 + 802deee: 687b ldr r3, [r7, #4] + 802def0: 2222 movs r2, #34 ; 0x22 + 802def2: 631a str r2, [r3, #48] ; 0x30 { /* Do nothing */ } /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; - 802dec4: 687b ldr r3, [r7, #4] - 802dec6: 681b ldr r3, [r3, #0] - 802dec8: 685a ldr r2, [r3, #4] - 802deca: 687b ldr r3, [r7, #4] - 802decc: 681b ldr r3, [r3, #0] - 802dece: f442 4200 orr.w r2, r2, #32768 ; 0x8000 - 802ded2: 605a str r2, [r3, #4] + 802def4: 687b ldr r3, [r7, #4] + 802def6: 681b ldr r3, [r3, #0] + 802def8: 685a ldr r2, [r3, #4] + 802defa: 687b ldr r3, [r7, #4] + 802defc: 681b ldr r3, [r3, #0] + 802defe: f442 4200 orr.w r2, r2, #32768 ; 0x8000 + 802df02: 605a str r2, [r3, #4] /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); - 802ded4: 687b ldr r3, [r7, #4] - 802ded6: 681b ldr r3, [r3, #0] - 802ded8: 6859 ldr r1, [r3, #4] - 802deda: 687b ldr r3, [r7, #4] - 802dedc: 681a ldr r2, [r3, #0] - 802dede: 4b80 ldr r3, [pc, #512] ; (802e0e0 ) - 802dee0: 400b ands r3, r1 - 802dee2: 6053 str r3, [r2, #4] + 802df04: 687b ldr r3, [r7, #4] + 802df06: 681b ldr r3, [r3, #0] + 802df08: 6859 ldr r1, [r3, #4] + 802df0a: 687b ldr r3, [r7, #4] + 802df0c: 681a ldr r2, [r3, #0] + 802df0e: 4b80 ldr r3, [pc, #512] ; (802e110 ) + 802df10: 400b ands r3, r1 + 802df12: 6053 str r3, [r2, #4] /* Flush TX register */ I2C_Flush_TXDR(hi2c); - 802dee4: 6878 ldr r0, [r7, #4] - 802dee6: f000 fb02 bl 802e4ee + 802df14: 6878 ldr r0, [r7, #4] + 802df16: f000 fb02 bl 802e51e /* If a DMA is ongoing, Update handle size context */ if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) - 802deea: 693b ldr r3, [r7, #16] - 802deec: 0b9b lsrs r3, r3, #14 - 802deee: f003 0301 and.w r3, r3, #1 - 802def2: 2b00 cmp r3, #0 - 802def4: d07a beq.n 802dfec + 802df1a: 693b ldr r3, [r7, #16] + 802df1c: 0b9b lsrs r3, r3, #14 + 802df1e: f003 0301 and.w r3, r3, #1 + 802df22: 2b00 cmp r3, #0 + 802df24: d07a beq.n 802e01c { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - 802def6: 687b ldr r3, [r7, #4] - 802def8: 681b ldr r3, [r3, #0] - 802defa: 681a ldr r2, [r3, #0] - 802defc: 687b ldr r3, [r7, #4] - 802defe: 681b ldr r3, [r3, #0] - 802df00: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 802df04: 601a str r2, [r3, #0] + 802df26: 687b ldr r3, [r7, #4] + 802df28: 681b ldr r3, [r3, #0] + 802df2a: 681a ldr r2, [r3, #0] + 802df2c: 687b ldr r3, [r7, #4] + 802df2e: 681b ldr r3, [r3, #0] + 802df30: f422 4280 bic.w r2, r2, #16384 ; 0x4000 + 802df34: 601a str r2, [r3, #0] if (hi2c->hdmatx != NULL) - 802df06: 687b ldr r3, [r7, #4] - 802df08: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df0a: 2b00 cmp r3, #0 - 802df0c: f000 8111 beq.w 802e132 + 802df36: 687b ldr r3, [r7, #4] + 802df38: 6b9b ldr r3, [r3, #56] ; 0x38 + 802df3a: 2b00 cmp r3, #0 + 802df3c: f000 8111 beq.w 802e162 { hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx); - 802df10: 687b ldr r3, [r7, #4] - 802df12: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df14: 681b ldr r3, [r3, #0] - 802df16: 4a73 ldr r2, [pc, #460] ; (802e0e4 ) - 802df18: 4293 cmp r3, r2 - 802df1a: d059 beq.n 802dfd0 - 802df1c: 687b ldr r3, [r7, #4] - 802df1e: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df20: 681b ldr r3, [r3, #0] - 802df22: 4a71 ldr r2, [pc, #452] ; (802e0e8 ) - 802df24: 4293 cmp r3, r2 - 802df26: d053 beq.n 802dfd0 - 802df28: 687b ldr r3, [r7, #4] - 802df2a: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df2c: 681b ldr r3, [r3, #0] - 802df2e: 4a6f ldr r2, [pc, #444] ; (802e0ec ) - 802df30: 4293 cmp r3, r2 - 802df32: d04d beq.n 802dfd0 - 802df34: 687b ldr r3, [r7, #4] - 802df36: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df38: 681b ldr r3, [r3, #0] - 802df3a: 4a6d ldr r2, [pc, #436] ; (802e0f0 ) - 802df3c: 4293 cmp r3, r2 - 802df3e: d047 beq.n 802dfd0 802df40: 687b ldr r3, [r7, #4] 802df42: 6b9b ldr r3, [r3, #56] ; 0x38 802df44: 681b ldr r3, [r3, #0] - 802df46: 4a6b ldr r2, [pc, #428] ; (802e0f4 ) + 802df46: 4a73 ldr r2, [pc, #460] ; (802e114 ) 802df48: 4293 cmp r3, r2 - 802df4a: d041 beq.n 802dfd0 + 802df4a: d059 beq.n 802e000 802df4c: 687b ldr r3, [r7, #4] 802df4e: 6b9b ldr r3, [r3, #56] ; 0x38 802df50: 681b ldr r3, [r3, #0] - 802df52: 4a69 ldr r2, [pc, #420] ; (802e0f8 ) + 802df52: 4a71 ldr r2, [pc, #452] ; (802e118 ) 802df54: 4293 cmp r3, r2 - 802df56: d03b beq.n 802dfd0 + 802df56: d053 beq.n 802e000 802df58: 687b ldr r3, [r7, #4] 802df5a: 6b9b ldr r3, [r3, #56] ; 0x38 802df5c: 681b ldr r3, [r3, #0] - 802df5e: 4a67 ldr r2, [pc, #412] ; (802e0fc ) + 802df5e: 4a6f ldr r2, [pc, #444] ; (802e11c ) 802df60: 4293 cmp r3, r2 - 802df62: d035 beq.n 802dfd0 + 802df62: d04d beq.n 802e000 802df64: 687b ldr r3, [r7, #4] 802df66: 6b9b ldr r3, [r3, #56] ; 0x38 802df68: 681b ldr r3, [r3, #0] - 802df6a: 4a65 ldr r2, [pc, #404] ; (802e100 ) + 802df6a: 4a6d ldr r2, [pc, #436] ; (802e120 ) 802df6c: 4293 cmp r3, r2 - 802df6e: d02f beq.n 802dfd0 + 802df6e: d047 beq.n 802e000 802df70: 687b ldr r3, [r7, #4] 802df72: 6b9b ldr r3, [r3, #56] ; 0x38 802df74: 681b ldr r3, [r3, #0] - 802df76: 4a63 ldr r2, [pc, #396] ; (802e104 ) + 802df76: 4a6b ldr r2, [pc, #428] ; (802e124 ) 802df78: 4293 cmp r3, r2 - 802df7a: d029 beq.n 802dfd0 + 802df7a: d041 beq.n 802e000 802df7c: 687b ldr r3, [r7, #4] 802df7e: 6b9b ldr r3, [r3, #56] ; 0x38 802df80: 681b ldr r3, [r3, #0] - 802df82: 4a61 ldr r2, [pc, #388] ; (802e108 ) + 802df82: 4a69 ldr r2, [pc, #420] ; (802e128 ) 802df84: 4293 cmp r3, r2 - 802df86: d023 beq.n 802dfd0 + 802df86: d03b beq.n 802e000 802df88: 687b ldr r3, [r7, #4] 802df8a: 6b9b ldr r3, [r3, #56] ; 0x38 802df8c: 681b ldr r3, [r3, #0] - 802df8e: 4a5f ldr r2, [pc, #380] ; (802e10c ) + 802df8e: 4a67 ldr r2, [pc, #412] ; (802e12c ) 802df90: 4293 cmp r3, r2 - 802df92: d01d beq.n 802dfd0 + 802df92: d035 beq.n 802e000 802df94: 687b ldr r3, [r7, #4] 802df96: 6b9b ldr r3, [r3, #56] ; 0x38 802df98: 681b ldr r3, [r3, #0] - 802df9a: 4a5d ldr r2, [pc, #372] ; (802e110 ) + 802df9a: 4a65 ldr r2, [pc, #404] ; (802e130 ) 802df9c: 4293 cmp r3, r2 - 802df9e: d017 beq.n 802dfd0 + 802df9e: d02f beq.n 802e000 802dfa0: 687b ldr r3, [r7, #4] 802dfa2: 6b9b ldr r3, [r3, #56] ; 0x38 802dfa4: 681b ldr r3, [r3, #0] - 802dfa6: 4a5b ldr r2, [pc, #364] ; (802e114 ) + 802dfa6: 4a63 ldr r2, [pc, #396] ; (802e134 ) 802dfa8: 4293 cmp r3, r2 - 802dfaa: d011 beq.n 802dfd0 + 802dfaa: d029 beq.n 802e000 802dfac: 687b ldr r3, [r7, #4] 802dfae: 6b9b ldr r3, [r3, #56] ; 0x38 802dfb0: 681b ldr r3, [r3, #0] - 802dfb2: 4a59 ldr r2, [pc, #356] ; (802e118 ) + 802dfb2: 4a61 ldr r2, [pc, #388] ; (802e138 ) 802dfb4: 4293 cmp r3, r2 - 802dfb6: d00b beq.n 802dfd0 + 802dfb6: d023 beq.n 802e000 802dfb8: 687b ldr r3, [r7, #4] 802dfba: 6b9b ldr r3, [r3, #56] ; 0x38 802dfbc: 681b ldr r3, [r3, #0] - 802dfbe: 4a57 ldr r2, [pc, #348] ; (802e11c ) + 802dfbe: 4a5f ldr r2, [pc, #380] ; (802e13c ) 802dfc0: 4293 cmp r3, r2 - 802dfc2: d005 beq.n 802dfd0 + 802dfc2: d01d beq.n 802e000 802dfc4: 687b ldr r3, [r7, #4] 802dfc6: 6b9b ldr r3, [r3, #56] ; 0x38 802dfc8: 681b ldr r3, [r3, #0] - 802dfca: 4a55 ldr r2, [pc, #340] ; (802e120 ) + 802dfca: 4a5d ldr r2, [pc, #372] ; (802e140 ) 802dfcc: 4293 cmp r3, r2 - 802dfce: d105 bne.n 802dfdc + 802dfce: d017 beq.n 802e000 802dfd0: 687b ldr r3, [r7, #4] 802dfd2: 6b9b ldr r3, [r3, #56] ; 0x38 802dfd4: 681b ldr r3, [r3, #0] - 802dfd6: 685b ldr r3, [r3, #4] - 802dfd8: b29b uxth r3, r3 - 802dfda: e004 b.n 802dfe6 + 802dfd6: 4a5b ldr r2, [pc, #364] ; (802e144 ) + 802dfd8: 4293 cmp r3, r2 + 802dfda: d011 beq.n 802e000 802dfdc: 687b ldr r3, [r7, #4] 802dfde: 6b9b ldr r3, [r3, #56] ; 0x38 802dfe0: 681b ldr r3, [r3, #0] - 802dfe2: 685b ldr r3, [r3, #4] - 802dfe4: b29b uxth r3, r3 - 802dfe6: 687a ldr r2, [r7, #4] - 802dfe8: 8553 strh r3, [r2, #42] ; 0x2a - 802dfea: e0a2 b.n 802e132 + 802dfe2: 4a59 ldr r2, [pc, #356] ; (802e148 ) + 802dfe4: 4293 cmp r3, r2 + 802dfe6: d00b beq.n 802e000 + 802dfe8: 687b ldr r3, [r7, #4] + 802dfea: 6b9b ldr r3, [r3, #56] ; 0x38 + 802dfec: 681b ldr r3, [r3, #0] + 802dfee: 4a57 ldr r2, [pc, #348] ; (802e14c ) + 802dff0: 4293 cmp r3, r2 + 802dff2: d005 beq.n 802e000 + 802dff4: 687b ldr r3, [r7, #4] + 802dff6: 6b9b ldr r3, [r3, #56] ; 0x38 + 802dff8: 681b ldr r3, [r3, #0] + 802dffa: 4a55 ldr r2, [pc, #340] ; (802e150 ) + 802dffc: 4293 cmp r3, r2 + 802dffe: d105 bne.n 802e00c + 802e000: 687b ldr r3, [r7, #4] + 802e002: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e004: 681b ldr r3, [r3, #0] + 802e006: 685b ldr r3, [r3, #4] + 802e008: b29b uxth r3, r3 + 802e00a: e004 b.n 802e016 + 802e00c: 687b ldr r3, [r7, #4] + 802e00e: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e010: 681b ldr r3, [r3, #0] + 802e012: 685b ldr r3, [r3, #4] + 802e014: b29b uxth r3, r3 + 802e016: 687a ldr r2, [r7, #4] + 802e018: 8553 strh r3, [r2, #42] ; 0x2a + 802e01a: e0a2 b.n 802e162 } } else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) - 802dfec: 693b ldr r3, [r7, #16] - 802dfee: 0bdb lsrs r3, r3, #15 - 802dff0: f003 0301 and.w r3, r3, #1 - 802dff4: 2b00 cmp r3, #0 - 802dff6: f000 809c beq.w 802e132 + 802e01c: 693b ldr r3, [r7, #16] + 802e01e: 0bdb lsrs r3, r3, #15 + 802e020: f003 0301 and.w r3, r3, #1 + 802e024: 2b00 cmp r3, #0 + 802e026: f000 809c beq.w 802e162 { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - 802dffa: 687b ldr r3, [r7, #4] - 802dffc: 681b ldr r3, [r3, #0] - 802dffe: 681a ldr r2, [r3, #0] - 802e000: 687b ldr r3, [r7, #4] - 802e002: 681b ldr r3, [r3, #0] - 802e004: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802e008: 601a str r2, [r3, #0] + 802e02a: 687b ldr r3, [r7, #4] + 802e02c: 681b ldr r3, [r3, #0] + 802e02e: 681a ldr r2, [r3, #0] + 802e030: 687b ldr r3, [r7, #4] + 802e032: 681b ldr r3, [r3, #0] + 802e034: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802e038: 601a str r2, [r3, #0] if (hi2c->hdmarx != NULL) - 802e00a: 687b ldr r3, [r7, #4] - 802e00c: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e00e: 2b00 cmp r3, #0 - 802e010: f000 808f beq.w 802e132 + 802e03a: 687b ldr r3, [r7, #4] + 802e03c: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e03e: 2b00 cmp r3, #0 + 802e040: f000 808f beq.w 802e162 { hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx); - 802e014: 687b ldr r3, [r7, #4] - 802e016: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e018: 681b ldr r3, [r3, #0] - 802e01a: 4a32 ldr r2, [pc, #200] ; (802e0e4 ) - 802e01c: 4293 cmp r3, r2 - 802e01e: d059 beq.n 802e0d4 - 802e020: 687b ldr r3, [r7, #4] - 802e022: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e024: 681b ldr r3, [r3, #0] - 802e026: 4a30 ldr r2, [pc, #192] ; (802e0e8 ) - 802e028: 4293 cmp r3, r2 - 802e02a: d053 beq.n 802e0d4 - 802e02c: 687b ldr r3, [r7, #4] - 802e02e: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e030: 681b ldr r3, [r3, #0] - 802e032: 4a2e ldr r2, [pc, #184] ; (802e0ec ) - 802e034: 4293 cmp r3, r2 - 802e036: d04d beq.n 802e0d4 - 802e038: 687b ldr r3, [r7, #4] - 802e03a: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e03c: 681b ldr r3, [r3, #0] - 802e03e: 4a2c ldr r2, [pc, #176] ; (802e0f0 ) - 802e040: 4293 cmp r3, r2 - 802e042: d047 beq.n 802e0d4 802e044: 687b ldr r3, [r7, #4] 802e046: 6bdb ldr r3, [r3, #60] ; 0x3c 802e048: 681b ldr r3, [r3, #0] - 802e04a: 4a2a ldr r2, [pc, #168] ; (802e0f4 ) + 802e04a: 4a32 ldr r2, [pc, #200] ; (802e114 ) 802e04c: 4293 cmp r3, r2 - 802e04e: d041 beq.n 802e0d4 + 802e04e: d059 beq.n 802e104 802e050: 687b ldr r3, [r7, #4] 802e052: 6bdb ldr r3, [r3, #60] ; 0x3c 802e054: 681b ldr r3, [r3, #0] - 802e056: 4a28 ldr r2, [pc, #160] ; (802e0f8 ) + 802e056: 4a30 ldr r2, [pc, #192] ; (802e118 ) 802e058: 4293 cmp r3, r2 - 802e05a: d03b beq.n 802e0d4 + 802e05a: d053 beq.n 802e104 802e05c: 687b ldr r3, [r7, #4] 802e05e: 6bdb ldr r3, [r3, #60] ; 0x3c 802e060: 681b ldr r3, [r3, #0] - 802e062: 4a26 ldr r2, [pc, #152] ; (802e0fc ) + 802e062: 4a2e ldr r2, [pc, #184] ; (802e11c ) 802e064: 4293 cmp r3, r2 - 802e066: d035 beq.n 802e0d4 + 802e066: d04d beq.n 802e104 802e068: 687b ldr r3, [r7, #4] 802e06a: 6bdb ldr r3, [r3, #60] ; 0x3c 802e06c: 681b ldr r3, [r3, #0] - 802e06e: 4a24 ldr r2, [pc, #144] ; (802e100 ) + 802e06e: 4a2c ldr r2, [pc, #176] ; (802e120 ) 802e070: 4293 cmp r3, r2 - 802e072: d02f beq.n 802e0d4 + 802e072: d047 beq.n 802e104 802e074: 687b ldr r3, [r7, #4] 802e076: 6bdb ldr r3, [r3, #60] ; 0x3c 802e078: 681b ldr r3, [r3, #0] - 802e07a: 4a22 ldr r2, [pc, #136] ; (802e104 ) + 802e07a: 4a2a ldr r2, [pc, #168] ; (802e124 ) 802e07c: 4293 cmp r3, r2 - 802e07e: d029 beq.n 802e0d4 + 802e07e: d041 beq.n 802e104 802e080: 687b ldr r3, [r7, #4] 802e082: 6bdb ldr r3, [r3, #60] ; 0x3c 802e084: 681b ldr r3, [r3, #0] - 802e086: 4a20 ldr r2, [pc, #128] ; (802e108 ) + 802e086: 4a28 ldr r2, [pc, #160] ; (802e128 ) 802e088: 4293 cmp r3, r2 - 802e08a: d023 beq.n 802e0d4 + 802e08a: d03b beq.n 802e104 802e08c: 687b ldr r3, [r7, #4] 802e08e: 6bdb ldr r3, [r3, #60] ; 0x3c 802e090: 681b ldr r3, [r3, #0] - 802e092: 4a1e ldr r2, [pc, #120] ; (802e10c ) + 802e092: 4a26 ldr r2, [pc, #152] ; (802e12c ) 802e094: 4293 cmp r3, r2 - 802e096: d01d beq.n 802e0d4 + 802e096: d035 beq.n 802e104 802e098: 687b ldr r3, [r7, #4] 802e09a: 6bdb ldr r3, [r3, #60] ; 0x3c 802e09c: 681b ldr r3, [r3, #0] - 802e09e: 4a1c ldr r2, [pc, #112] ; (802e110 ) + 802e09e: 4a24 ldr r2, [pc, #144] ; (802e130 ) 802e0a0: 4293 cmp r3, r2 - 802e0a2: d017 beq.n 802e0d4 + 802e0a2: d02f beq.n 802e104 802e0a4: 687b ldr r3, [r7, #4] 802e0a6: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0a8: 681b ldr r3, [r3, #0] - 802e0aa: 4a1a ldr r2, [pc, #104] ; (802e114 ) + 802e0aa: 4a22 ldr r2, [pc, #136] ; (802e134 ) 802e0ac: 4293 cmp r3, r2 - 802e0ae: d011 beq.n 802e0d4 + 802e0ae: d029 beq.n 802e104 802e0b0: 687b ldr r3, [r7, #4] 802e0b2: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0b4: 681b ldr r3, [r3, #0] - 802e0b6: 4a18 ldr r2, [pc, #96] ; (802e118 ) + 802e0b6: 4a20 ldr r2, [pc, #128] ; (802e138 ) 802e0b8: 4293 cmp r3, r2 - 802e0ba: d00b beq.n 802e0d4 + 802e0ba: d023 beq.n 802e104 802e0bc: 687b ldr r3, [r7, #4] 802e0be: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0c0: 681b ldr r3, [r3, #0] - 802e0c2: 4a16 ldr r2, [pc, #88] ; (802e11c ) + 802e0c2: 4a1e ldr r2, [pc, #120] ; (802e13c ) 802e0c4: 4293 cmp r3, r2 - 802e0c6: d005 beq.n 802e0d4 + 802e0c6: d01d beq.n 802e104 802e0c8: 687b ldr r3, [r7, #4] 802e0ca: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0cc: 681b ldr r3, [r3, #0] - 802e0ce: 4a14 ldr r2, [pc, #80] ; (802e120 ) + 802e0ce: 4a1c ldr r2, [pc, #112] ; (802e140 ) 802e0d0: 4293 cmp r3, r2 - 802e0d2: d127 bne.n 802e124 + 802e0d2: d017 beq.n 802e104 802e0d4: 687b ldr r3, [r7, #4] 802e0d6: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0d8: 681b ldr r3, [r3, #0] - 802e0da: 685b ldr r3, [r3, #4] - 802e0dc: b29b uxth r3, r3 - 802e0de: e026 b.n 802e12e - 802e0e0: fe00e800 .word 0xfe00e800 - 802e0e4: 40020010 .word 0x40020010 - 802e0e8: 40020028 .word 0x40020028 - 802e0ec: 40020040 .word 0x40020040 - 802e0f0: 40020058 .word 0x40020058 - 802e0f4: 40020070 .word 0x40020070 - 802e0f8: 40020088 .word 0x40020088 - 802e0fc: 400200a0 .word 0x400200a0 - 802e100: 400200b8 .word 0x400200b8 - 802e104: 40020410 .word 0x40020410 - 802e108: 40020428 .word 0x40020428 - 802e10c: 40020440 .word 0x40020440 - 802e110: 40020458 .word 0x40020458 - 802e114: 40020470 .word 0x40020470 - 802e118: 40020488 .word 0x40020488 - 802e11c: 400204a0 .word 0x400204a0 - 802e120: 400204b8 .word 0x400204b8 - 802e124: 687b ldr r3, [r7, #4] - 802e126: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e128: 681b ldr r3, [r3, #0] - 802e12a: 685b ldr r3, [r3, #4] - 802e12c: b29b uxth r3, r3 - 802e12e: 687a ldr r2, [r7, #4] - 802e130: 8553 strh r3, [r2, #42] ; 0x2a + 802e0da: 4a1a ldr r2, [pc, #104] ; (802e144 ) + 802e0dc: 4293 cmp r3, r2 + 802e0de: d011 beq.n 802e104 + 802e0e0: 687b ldr r3, [r7, #4] + 802e0e2: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e0e4: 681b ldr r3, [r3, #0] + 802e0e6: 4a18 ldr r2, [pc, #96] ; (802e148 ) + 802e0e8: 4293 cmp r3, r2 + 802e0ea: d00b beq.n 802e104 + 802e0ec: 687b ldr r3, [r7, #4] + 802e0ee: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e0f0: 681b ldr r3, [r3, #0] + 802e0f2: 4a16 ldr r2, [pc, #88] ; (802e14c ) + 802e0f4: 4293 cmp r3, r2 + 802e0f6: d005 beq.n 802e104 + 802e0f8: 687b ldr r3, [r7, #4] + 802e0fa: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e0fc: 681b ldr r3, [r3, #0] + 802e0fe: 4a14 ldr r2, [pc, #80] ; (802e150 ) + 802e100: 4293 cmp r3, r2 + 802e102: d127 bne.n 802e154 + 802e104: 687b ldr r3, [r7, #4] + 802e106: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e108: 681b ldr r3, [r3, #0] + 802e10a: 685b ldr r3, [r3, #4] + 802e10c: b29b uxth r3, r3 + 802e10e: e026 b.n 802e15e + 802e110: fe00e800 .word 0xfe00e800 + 802e114: 40020010 .word 0x40020010 + 802e118: 40020028 .word 0x40020028 + 802e11c: 40020040 .word 0x40020040 + 802e120: 40020058 .word 0x40020058 + 802e124: 40020070 .word 0x40020070 + 802e128: 40020088 .word 0x40020088 + 802e12c: 400200a0 .word 0x400200a0 + 802e130: 400200b8 .word 0x400200b8 + 802e134: 40020410 .word 0x40020410 + 802e138: 40020428 .word 0x40020428 + 802e13c: 40020440 .word 0x40020440 + 802e140: 40020458 .word 0x40020458 + 802e144: 40020470 .word 0x40020470 + 802e148: 40020488 .word 0x40020488 + 802e14c: 400204a0 .word 0x400204a0 + 802e150: 400204b8 .word 0x400204b8 + 802e154: 687b ldr r3, [r7, #4] + 802e156: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e158: 681b ldr r3, [r3, #0] + 802e15a: 685b ldr r3, [r3, #4] + 802e15c: b29b uxth r3, r3 + 802e15e: 687a ldr r2, [r7, #4] + 802e160: 8553 strh r3, [r2, #42] ; 0x2a { /* Do nothing */ } /* Store Last receive data if any */ if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) - 802e132: 697b ldr r3, [r7, #20] - 802e134: 089b lsrs r3, r3, #2 - 802e136: f003 0301 and.w r3, r3, #1 - 802e13a: 2b00 cmp r3, #0 - 802e13c: d020 beq.n 802e180 + 802e162: 697b ldr r3, [r7, #20] + 802e164: 089b lsrs r3, r3, #2 + 802e166: f003 0301 and.w r3, r3, #1 + 802e16a: 2b00 cmp r3, #0 + 802e16c: d020 beq.n 802e1b0 { /* Remove RXNE flag on temporary variable as read done */ tmpITFlags &= ~I2C_FLAG_RXNE; - 802e13e: 697b ldr r3, [r7, #20] - 802e140: f023 0304 bic.w r3, r3, #4 - 802e144: 617b str r3, [r7, #20] + 802e16e: 697b ldr r3, [r7, #20] + 802e170: f023 0304 bic.w r3, r3, #4 + 802e174: 617b str r3, [r7, #20] /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - 802e146: 687b ldr r3, [r7, #4] - 802e148: 681b ldr r3, [r3, #0] - 802e14a: 6a5a ldr r2, [r3, #36] ; 0x24 - 802e14c: 687b ldr r3, [r7, #4] - 802e14e: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e150: b2d2 uxtb r2, r2 - 802e152: 701a strb r2, [r3, #0] + 802e176: 687b ldr r3, [r7, #4] + 802e178: 681b ldr r3, [r3, #0] + 802e17a: 6a5a ldr r2, [r3, #36] ; 0x24 + 802e17c: 687b ldr r3, [r7, #4] + 802e17e: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e180: b2d2 uxtb r2, r2 + 802e182: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 802e154: 687b ldr r3, [r7, #4] - 802e156: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e158: 1c5a adds r2, r3, #1 - 802e15a: 687b ldr r3, [r7, #4] - 802e15c: 625a str r2, [r3, #36] ; 0x24 + 802e184: 687b ldr r3, [r7, #4] + 802e186: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e188: 1c5a adds r2, r3, #1 + 802e18a: 687b ldr r3, [r7, #4] + 802e18c: 625a str r2, [r3, #36] ; 0x24 if ((hi2c->XferSize > 0U)) - 802e15e: 687b ldr r3, [r7, #4] - 802e160: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802e162: 2b00 cmp r3, #0 - 802e164: d00c beq.n 802e180 + 802e18e: 687b ldr r3, [r7, #4] + 802e190: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802e192: 2b00 cmp r3, #0 + 802e194: d00c beq.n 802e1b0 { hi2c->XferSize--; - 802e166: 687b ldr r3, [r7, #4] - 802e168: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802e16a: 3b01 subs r3, #1 - 802e16c: b29a uxth r2, r3 - 802e16e: 687b ldr r3, [r7, #4] - 802e170: 851a strh r2, [r3, #40] ; 0x28 + 802e196: 687b ldr r3, [r7, #4] + 802e198: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802e19a: 3b01 subs r3, #1 + 802e19c: b29a uxth r2, r3 + 802e19e: 687b ldr r3, [r7, #4] + 802e1a0: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; - 802e172: 687b ldr r3, [r7, #4] - 802e174: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802e176: b29b uxth r3, r3 - 802e178: 3b01 subs r3, #1 - 802e17a: b29a uxth r2, r3 - 802e17c: 687b ldr r3, [r7, #4] - 802e17e: 855a strh r2, [r3, #42] ; 0x2a + 802e1a2: 687b ldr r3, [r7, #4] + 802e1a4: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802e1a6: b29b uxth r3, r3 + 802e1a8: 3b01 subs r3, #1 + 802e1aa: b29a uxth r2, r3 + 802e1ac: 687b ldr r3, [r7, #4] + 802e1ae: 855a strh r2, [r3, #42] ; 0x2a } } /* All data are not transferred, so set error code accordingly */ if (hi2c->XferCount != 0U) - 802e180: 687b ldr r3, [r7, #4] - 802e182: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802e184: b29b uxth r3, r3 - 802e186: 2b00 cmp r3, #0 - 802e188: d005 beq.n 802e196 + 802e1b0: 687b ldr r3, [r7, #4] + 802e1b2: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802e1b4: b29b uxth r3, r3 + 802e1b6: 2b00 cmp r3, #0 + 802e1b8: d005 beq.n 802e1c6 { /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 802e18a: 687b ldr r3, [r7, #4] - 802e18c: 6c5b ldr r3, [r3, #68] ; 0x44 - 802e18e: f043 0204 orr.w r2, r3, #4 - 802e192: 687b ldr r3, [r7, #4] - 802e194: 645a str r2, [r3, #68] ; 0x44 + 802e1ba: 687b ldr r3, [r7, #4] + 802e1bc: 6c5b ldr r3, [r3, #68] ; 0x44 + 802e1be: f043 0204 orr.w r2, r3, #4 + 802e1c2: 687b ldr r3, [r7, #4] + 802e1c4: 645a str r2, [r3, #68] ; 0x44 } hi2c->Mode = HAL_I2C_MODE_NONE; - 802e196: 687b ldr r3, [r7, #4] - 802e198: 2200 movs r2, #0 - 802e19a: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802e1c6: 687b ldr r3, [r7, #4] + 802e1c8: 2200 movs r2, #0 + 802e1ca: f883 2042 strb.w r2, [r3, #66] ; 0x42 hi2c->XferISR = NULL; - 802e19e: 687b ldr r3, [r7, #4] - 802e1a0: 2200 movs r2, #0 - 802e1a2: 635a str r2, [r3, #52] ; 0x34 + 802e1ce: 687b ldr r3, [r7, #4] + 802e1d0: 2200 movs r2, #0 + 802e1d2: 635a str r2, [r3, #52] ; 0x34 if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) - 802e1a4: 687b ldr r3, [r7, #4] - 802e1a6: 6c5b ldr r3, [r3, #68] ; 0x44 - 802e1a8: 2b00 cmp r3, #0 - 802e1aa: d010 beq.n 802e1ce + 802e1d4: 687b ldr r3, [r7, #4] + 802e1d6: 6c5b ldr r3, [r3, #68] ; 0x44 + 802e1d8: 2b00 cmp r3, #0 + 802e1da: d010 beq.n 802e1fe { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c, hi2c->ErrorCode); - 802e1ac: 687b ldr r3, [r7, #4] - 802e1ae: 6c5b ldr r3, [r3, #68] ; 0x44 - 802e1b0: 4619 mov r1, r3 - 802e1b2: 6878 ldr r0, [r7, #4] - 802e1b4: f000 f8a4 bl 802e300 + 802e1dc: 687b ldr r3, [r7, #4] + 802e1de: 6c5b ldr r3, [r3, #68] ; 0x44 + 802e1e0: 4619 mov r1, r3 + 802e1e2: 6878 ldr r0, [r7, #4] + 802e1e4: f000 f8a4 bl 802e330 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ if (hi2c->State == HAL_I2C_STATE_LISTEN) - 802e1b8: 687b ldr r3, [r7, #4] - 802e1ba: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e1be: b2db uxtb r3, r3 - 802e1c0: 2b28 cmp r3, #40 ; 0x28 - 802e1c2: d141 bne.n 802e248 + 802e1e8: 687b ldr r3, [r7, #4] + 802e1ea: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e1ee: b2db uxtb r3, r3 + 802e1f0: 2b28 cmp r3, #40 ; 0x28 + 802e1f2: d141 bne.n 802e278 { /* Call I2C Listen complete process */ I2C_ITListenCplt(hi2c, tmpITFlags); - 802e1c4: 6979 ldr r1, [r7, #20] - 802e1c6: 6878 ldr r0, [r7, #4] - 802e1c8: f000 f844 bl 802e254 + 802e1f4: 6979 ldr r1, [r7, #20] + 802e1f6: 6878 ldr r0, [r7, #4] + 802e1f8: f000 f844 bl 802e284 hi2c->SlaveTxCpltCallback(hi2c); #else HAL_I2C_SlaveTxCpltCallback(hi2c); #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } - 802e1cc: e03c b.n 802e248 + 802e1fc: e03c b.n 802e278 else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) - 802e1ce: 687b ldr r3, [r7, #4] - 802e1d0: 6adb ldr r3, [r3, #44] ; 0x2c - 802e1d2: f513 3f80 cmn.w r3, #65536 ; 0x10000 - 802e1d6: d014 beq.n 802e202 + 802e1fe: 687b ldr r3, [r7, #4] + 802e200: 6adb ldr r3, [r3, #44] ; 0x2c + 802e202: f513 3f80 cmn.w r3, #65536 ; 0x10000 + 802e206: d014 beq.n 802e232 I2C_ITSlaveSeqCplt(hi2c); - 802e1d8: 6878 ldr r0, [r7, #4] - 802e1da: f7ff fde5 bl 802dda8 + 802e208: 6878 ldr r0, [r7, #4] + 802e20a: f7ff fde5 bl 802ddd8 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 802e1de: 687b ldr r3, [r7, #4] - 802e1e0: 4a1b ldr r2, [pc, #108] ; (802e250 ) - 802e1e2: 62da str r2, [r3, #44] ; 0x2c + 802e20e: 687b ldr r3, [r7, #4] + 802e210: 4a1b ldr r2, [pc, #108] ; (802e280 ) + 802e212: 62da str r2, [r3, #44] ; 0x2c hi2c->State = HAL_I2C_STATE_READY; - 802e1e4: 687b ldr r3, [r7, #4] - 802e1e6: 2220 movs r2, #32 - 802e1e8: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e214: 687b ldr r3, [r7, #4] + 802e216: 2220 movs r2, #32 + 802e218: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802e1ec: 687b ldr r3, [r7, #4] - 802e1ee: 2200 movs r2, #0 - 802e1f0: 631a str r2, [r3, #48] ; 0x30 + 802e21c: 687b ldr r3, [r7, #4] + 802e21e: 2200 movs r2, #0 + 802e220: 631a str r2, [r3, #48] ; 0x30 __HAL_UNLOCK(hi2c); - 802e1f2: 687b ldr r3, [r7, #4] - 802e1f4: 2200 movs r2, #0 - 802e1f6: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e222: 687b ldr r3, [r7, #4] + 802e224: 2200 movs r2, #0 + 802e226: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_ListenCpltCallback(hi2c); - 802e1fa: 6878 ldr r0, [r7, #4] - 802e1fc: f7ff fc2f bl 802da5e + 802e22a: 6878 ldr r0, [r7, #4] + 802e22c: f7ff fc2f bl 802da8e } - 802e200: e022 b.n 802e248 + 802e230: e022 b.n 802e278 else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 802e202: 687b ldr r3, [r7, #4] - 802e204: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e208: b2db uxtb r3, r3 - 802e20a: 2b22 cmp r3, #34 ; 0x22 - 802e20c: d10e bne.n 802e22c + 802e232: 687b ldr r3, [r7, #4] + 802e234: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e238: b2db uxtb r3, r3 + 802e23a: 2b22 cmp r3, #34 ; 0x22 + 802e23c: d10e bne.n 802e25c hi2c->State = HAL_I2C_STATE_READY; - 802e20e: 687b ldr r3, [r7, #4] - 802e210: 2220 movs r2, #32 - 802e212: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e23e: 687b ldr r3, [r7, #4] + 802e240: 2220 movs r2, #32 + 802e242: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802e216: 687b ldr r3, [r7, #4] - 802e218: 2200 movs r2, #0 - 802e21a: 631a str r2, [r3, #48] ; 0x30 + 802e246: 687b ldr r3, [r7, #4] + 802e248: 2200 movs r2, #0 + 802e24a: 631a str r2, [r3, #48] ; 0x30 __HAL_UNLOCK(hi2c); - 802e21c: 687b ldr r3, [r7, #4] - 802e21e: 2200 movs r2, #0 - 802e220: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e24c: 687b ldr r3, [r7, #4] + 802e24e: 2200 movs r2, #0 + 802e250: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_SlaveRxCpltCallback(hi2c); - 802e224: 6878 ldr r0, [r7, #4] - 802e226: f7ff fc02 bl 802da2e + 802e254: 6878 ldr r0, [r7, #4] + 802e256: f7ff fc02 bl 802da5e } - 802e22a: e00d b.n 802e248 + 802e25a: e00d b.n 802e278 hi2c->State = HAL_I2C_STATE_READY; - 802e22c: 687b ldr r3, [r7, #4] - 802e22e: 2220 movs r2, #32 - 802e230: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e25c: 687b ldr r3, [r7, #4] + 802e25e: 2220 movs r2, #32 + 802e260: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802e234: 687b ldr r3, [r7, #4] - 802e236: 2200 movs r2, #0 - 802e238: 631a str r2, [r3, #48] ; 0x30 + 802e264: 687b ldr r3, [r7, #4] + 802e266: 2200 movs r2, #0 + 802e268: 631a str r2, [r3, #48] ; 0x30 __HAL_UNLOCK(hi2c); - 802e23a: 687b ldr r3, [r7, #4] - 802e23c: 2200 movs r2, #0 - 802e23e: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e26a: 687b ldr r3, [r7, #4] + 802e26c: 2200 movs r2, #0 + 802e26e: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_SlaveTxCpltCallback(hi2c); - 802e242: 6878 ldr r0, [r7, #4] - 802e244: f7ff fbe9 bl 802da1a + 802e272: 6878 ldr r0, [r7, #4] + 802e274: f7ff fbe9 bl 802da4a } - 802e248: bf00 nop - 802e24a: 3718 adds r7, #24 - 802e24c: 46bd mov sp, r7 - 802e24e: bd80 pop {r7, pc} - 802e250: ffff0000 .word 0xffff0000 + 802e278: bf00 nop + 802e27a: 3718 adds r7, #24 + 802e27c: 46bd mov sp, r7 + 802e27e: bd80 pop {r7, pc} + 802e280: ffff0000 .word 0xffff0000 -0802e254 : +0802e284 : * @param hi2c I2C handle. * @param ITFlags Interrupt flags to handle. * @retval None */ static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { - 802e254: b580 push {r7, lr} - 802e256: b082 sub sp, #8 - 802e258: af00 add r7, sp, #0 - 802e25a: 6078 str r0, [r7, #4] - 802e25c: 6039 str r1, [r7, #0] + 802e284: b580 push {r7, lr} + 802e286: b082 sub sp, #8 + 802e288: af00 add r7, sp, #0 + 802e28a: 6078 str r0, [r7, #4] + 802e28c: 6039 str r1, [r7, #0] /* Reset handle parameters */ hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 802e25e: 687b ldr r3, [r7, #4] - 802e260: 4a26 ldr r2, [pc, #152] ; (802e2fc ) - 802e262: 62da str r2, [r3, #44] ; 0x2c + 802e28e: 687b ldr r3, [r7, #4] + 802e290: 4a26 ldr r2, [pc, #152] ; (802e32c ) + 802e292: 62da str r2, [r3, #44] ; 0x2c hi2c->PreviousState = I2C_STATE_NONE; - 802e264: 687b ldr r3, [r7, #4] - 802e266: 2200 movs r2, #0 - 802e268: 631a str r2, [r3, #48] ; 0x30 + 802e294: 687b ldr r3, [r7, #4] + 802e296: 2200 movs r2, #0 + 802e298: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; - 802e26a: 687b ldr r3, [r7, #4] - 802e26c: 2220 movs r2, #32 - 802e26e: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e29a: 687b ldr r3, [r7, #4] + 802e29c: 2220 movs r2, #32 + 802e29e: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; - 802e272: 687b ldr r3, [r7, #4] - 802e274: 2200 movs r2, #0 - 802e276: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802e2a2: 687b ldr r3, [r7, #4] + 802e2a4: 2200 movs r2, #0 + 802e2a6: f883 2042 strb.w r2, [r3, #66] ; 0x42 hi2c->XferISR = NULL; - 802e27a: 687b ldr r3, [r7, #4] - 802e27c: 2200 movs r2, #0 - 802e27e: 635a str r2, [r3, #52] ; 0x34 + 802e2aa: 687b ldr r3, [r7, #4] + 802e2ac: 2200 movs r2, #0 + 802e2ae: 635a str r2, [r3, #52] ; 0x34 /* Store Last receive data if any */ if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_RXNE) != RESET) - 802e280: 683b ldr r3, [r7, #0] - 802e282: 089b lsrs r3, r3, #2 - 802e284: f003 0301 and.w r3, r3, #1 - 802e288: 2b00 cmp r3, #0 - 802e28a: d022 beq.n 802e2d2 + 802e2b0: 683b ldr r3, [r7, #0] + 802e2b2: 089b lsrs r3, r3, #2 + 802e2b4: f003 0301 and.w r3, r3, #1 + 802e2b8: 2b00 cmp r3, #0 + 802e2ba: d022 beq.n 802e302 { /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - 802e28c: 687b ldr r3, [r7, #4] - 802e28e: 681b ldr r3, [r3, #0] - 802e290: 6a5a ldr r2, [r3, #36] ; 0x24 - 802e292: 687b ldr r3, [r7, #4] - 802e294: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e296: b2d2 uxtb r2, r2 - 802e298: 701a strb r2, [r3, #0] + 802e2bc: 687b ldr r3, [r7, #4] + 802e2be: 681b ldr r3, [r3, #0] + 802e2c0: 6a5a ldr r2, [r3, #36] ; 0x24 + 802e2c2: 687b ldr r3, [r7, #4] + 802e2c4: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e2c6: b2d2 uxtb r2, r2 + 802e2c8: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 802e29a: 687b ldr r3, [r7, #4] - 802e29c: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e29e: 1c5a adds r2, r3, #1 - 802e2a0: 687b ldr r3, [r7, #4] - 802e2a2: 625a str r2, [r3, #36] ; 0x24 + 802e2ca: 687b ldr r3, [r7, #4] + 802e2cc: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e2ce: 1c5a adds r2, r3, #1 + 802e2d0: 687b ldr r3, [r7, #4] + 802e2d2: 625a str r2, [r3, #36] ; 0x24 if ((hi2c->XferSize > 0U)) - 802e2a4: 687b ldr r3, [r7, #4] - 802e2a6: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802e2a8: 2b00 cmp r3, #0 - 802e2aa: d012 beq.n 802e2d2 + 802e2d4: 687b ldr r3, [r7, #4] + 802e2d6: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802e2d8: 2b00 cmp r3, #0 + 802e2da: d012 beq.n 802e302 { hi2c->XferSize--; - 802e2ac: 687b ldr r3, [r7, #4] - 802e2ae: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802e2b0: 3b01 subs r3, #1 - 802e2b2: b29a uxth r2, r3 - 802e2b4: 687b ldr r3, [r7, #4] - 802e2b6: 851a strh r2, [r3, #40] ; 0x28 + 802e2dc: 687b ldr r3, [r7, #4] + 802e2de: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802e2e0: 3b01 subs r3, #1 + 802e2e2: b29a uxth r2, r3 + 802e2e4: 687b ldr r3, [r7, #4] + 802e2e6: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; - 802e2b8: 687b ldr r3, [r7, #4] - 802e2ba: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802e2bc: b29b uxth r3, r3 - 802e2be: 3b01 subs r3, #1 - 802e2c0: b29a uxth r2, r3 - 802e2c2: 687b ldr r3, [r7, #4] - 802e2c4: 855a strh r2, [r3, #42] ; 0x2a + 802e2e8: 687b ldr r3, [r7, #4] + 802e2ea: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802e2ec: b29b uxth r3, r3 + 802e2ee: 3b01 subs r3, #1 + 802e2f0: b29a uxth r2, r3 + 802e2f2: 687b ldr r3, [r7, #4] + 802e2f4: 855a strh r2, [r3, #42] ; 0x2a /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 802e2c6: 687b ldr r3, [r7, #4] - 802e2c8: 6c5b ldr r3, [r3, #68] ; 0x44 - 802e2ca: f043 0204 orr.w r2, r3, #4 - 802e2ce: 687b ldr r3, [r7, #4] - 802e2d0: 645a str r2, [r3, #68] ; 0x44 + 802e2f6: 687b ldr r3, [r7, #4] + 802e2f8: 6c5b ldr r3, [r3, #68] ; 0x44 + 802e2fa: f043 0204 orr.w r2, r3, #4 + 802e2fe: 687b ldr r3, [r7, #4] + 802e300: 645a str r2, [r3, #68] ; 0x44 } } /* Disable all Interrupts*/ I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - 802e2d2: f248 0103 movw r1, #32771 ; 0x8003 - 802e2d6: 6878 ldr r0, [r7, #4] - 802e2d8: f000 f94b bl 802e572 + 802e302: f248 0103 movw r1, #32771 ; 0x8003 + 802e306: 6878 ldr r0, [r7, #4] + 802e308: f000 f94b bl 802e5a2 /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 802e2dc: 687b ldr r3, [r7, #4] - 802e2de: 681b ldr r3, [r3, #0] - 802e2e0: 2210 movs r2, #16 - 802e2e2: 61da str r2, [r3, #28] + 802e30c: 687b ldr r3, [r7, #4] + 802e30e: 681b ldr r3, [r3, #0] + 802e310: 2210 movs r2, #16 + 802e312: 61da str r2, [r3, #28] /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e2e4: 687b ldr r3, [r7, #4] - 802e2e6: 2200 movs r2, #0 - 802e2e8: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e314: 687b ldr r3, [r7, #4] + 802e316: 2200 movs r2, #0 + 802e318: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->ListenCpltCallback(hi2c); #else HAL_I2C_ListenCpltCallback(hi2c); - 802e2ec: 6878 ldr r0, [r7, #4] - 802e2ee: f7ff fbb6 bl 802da5e + 802e31c: 6878 ldr r0, [r7, #4] + 802e31e: f7ff fbb6 bl 802da8e #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } - 802e2f2: bf00 nop - 802e2f4: 3708 adds r7, #8 - 802e2f6: 46bd mov sp, r7 - 802e2f8: bd80 pop {r7, pc} - 802e2fa: bf00 nop - 802e2fc: ffff0000 .word 0xffff0000 + 802e322: bf00 nop + 802e324: 3708 adds r7, #8 + 802e326: 46bd mov sp, r7 + 802e328: bd80 pop {r7, pc} + 802e32a: bf00 nop + 802e32c: ffff0000 .word 0xffff0000 -0802e300 : +0802e330 : * @param hi2c I2C handle. * @param ErrorCode Error code to handle. * @retval None */ static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) { - 802e300: b580 push {r7, lr} - 802e302: b084 sub sp, #16 - 802e304: af00 add r7, sp, #0 - 802e306: 6078 str r0, [r7, #4] - 802e308: 6039 str r1, [r7, #0] + 802e330: b580 push {r7, lr} + 802e332: b084 sub sp, #16 + 802e334: af00 add r7, sp, #0 + 802e336: 6078 str r0, [r7, #4] + 802e338: 6039 str r1, [r7, #0] HAL_I2C_StateTypeDef tmpstate = hi2c->State; - 802e30a: 687b ldr r3, [r7, #4] - 802e30c: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e310: 73fb strb r3, [r7, #15] + 802e33a: 687b ldr r3, [r7, #4] + 802e33c: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e340: 73fb strb r3, [r7, #15] uint32_t tmppreviousstate; /* Reset handle parameters */ hi2c->Mode = HAL_I2C_MODE_NONE; - 802e312: 687b ldr r3, [r7, #4] - 802e314: 2200 movs r2, #0 - 802e316: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802e342: 687b ldr r3, [r7, #4] + 802e344: 2200 movs r2, #0 + 802e346: f883 2042 strb.w r2, [r3, #66] ; 0x42 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 802e31a: 687b ldr r3, [r7, #4] - 802e31c: 4a5d ldr r2, [pc, #372] ; (802e494 ) - 802e31e: 62da str r2, [r3, #44] ; 0x2c + 802e34a: 687b ldr r3, [r7, #4] + 802e34c: 4a5d ldr r2, [pc, #372] ; (802e4c4 ) + 802e34e: 62da str r2, [r3, #44] ; 0x2c hi2c->XferCount = 0U; - 802e320: 687b ldr r3, [r7, #4] - 802e322: 2200 movs r2, #0 - 802e324: 855a strh r2, [r3, #42] ; 0x2a + 802e350: 687b ldr r3, [r7, #4] + 802e352: 2200 movs r2, #0 + 802e354: 855a strh r2, [r3, #42] ; 0x2a /* Set new error code */ hi2c->ErrorCode |= ErrorCode; - 802e326: 687b ldr r3, [r7, #4] - 802e328: 6c5a ldr r2, [r3, #68] ; 0x44 - 802e32a: 683b ldr r3, [r7, #0] - 802e32c: 431a orrs r2, r3 - 802e32e: 687b ldr r3, [r7, #4] - 802e330: 645a str r2, [r3, #68] ; 0x44 + 802e356: 687b ldr r3, [r7, #4] + 802e358: 6c5a ldr r2, [r3, #68] ; 0x44 + 802e35a: 683b ldr r3, [r7, #0] + 802e35c: 431a orrs r2, r3 + 802e35e: 687b ldr r3, [r7, #4] + 802e360: 645a str r2, [r3, #68] ; 0x44 /* Disable Interrupts */ if ((tmpstate == HAL_I2C_STATE_LISTEN) || - 802e332: 7bfb ldrb r3, [r7, #15] - 802e334: 2b28 cmp r3, #40 ; 0x28 - 802e336: d005 beq.n 802e344 - 802e338: 7bfb ldrb r3, [r7, #15] - 802e33a: 2b29 cmp r3, #41 ; 0x29 - 802e33c: d002 beq.n 802e344 + 802e362: 7bfb ldrb r3, [r7, #15] + 802e364: 2b28 cmp r3, #40 ; 0x28 + 802e366: d005 beq.n 802e374 + 802e368: 7bfb ldrb r3, [r7, #15] + 802e36a: 2b29 cmp r3, #41 ; 0x29 + 802e36c: d002 beq.n 802e374 (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || - 802e33e: 7bfb ldrb r3, [r7, #15] - 802e340: 2b2a cmp r3, #42 ; 0x2a - 802e342: d10b bne.n 802e35c + 802e36e: 7bfb ldrb r3, [r7, #15] + 802e370: 2b2a cmp r3, #42 ; 0x2a + 802e372: d10b bne.n 802e38c (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) { /* Disable all interrupts, except interrupts related to LISTEN state */ I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); - 802e344: 2103 movs r1, #3 - 802e346: 6878 ldr r0, [r7, #4] - 802e348: f000 f913 bl 802e572 + 802e374: 2103 movs r1, #3 + 802e376: 6878 ldr r0, [r7, #4] + 802e378: f000 f913 bl 802e5a2 /* keep HAL_I2C_STATE_LISTEN if set */ hi2c->State = HAL_I2C_STATE_LISTEN; - 802e34c: 687b ldr r3, [r7, #4] - 802e34e: 2228 movs r2, #40 ; 0x28 - 802e350: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e37c: 687b ldr r3, [r7, #4] + 802e37e: 2228 movs r2, #40 ; 0x28 + 802e380: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->XferISR = I2C_Slave_ISR_IT; - 802e354: 687b ldr r3, [r7, #4] - 802e356: 4a50 ldr r2, [pc, #320] ; (802e498 ) - 802e358: 635a str r2, [r3, #52] ; 0x34 - 802e35a: e011 b.n 802e380 + 802e384: 687b ldr r3, [r7, #4] + 802e386: 4a50 ldr r2, [pc, #320] ; (802e4c8 ) + 802e388: 635a str r2, [r3, #52] ; 0x34 + 802e38a: e011 b.n 802e3b0 } else { /* Disable all interrupts */ I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - 802e35c: f248 0103 movw r1, #32771 ; 0x8003 - 802e360: 6878 ldr r0, [r7, #4] - 802e362: f000 f906 bl 802e572 + 802e38c: f248 0103 movw r1, #32771 ; 0x8003 + 802e390: 6878 ldr r0, [r7, #4] + 802e392: f000 f906 bl 802e5a2 /* If state is an abort treatment on going, don't change state */ /* This change will be do later */ if (hi2c->State != HAL_I2C_STATE_ABORT) - 802e366: 687b ldr r3, [r7, #4] - 802e368: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e36c: b2db uxtb r3, r3 - 802e36e: 2b60 cmp r3, #96 ; 0x60 - 802e370: d003 beq.n 802e37a + 802e396: 687b ldr r3, [r7, #4] + 802e398: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e39c: b2db uxtb r3, r3 + 802e39e: 2b60 cmp r3, #96 ; 0x60 + 802e3a0: d003 beq.n 802e3aa { /* Set HAL_I2C_STATE_READY */ hi2c->State = HAL_I2C_STATE_READY; - 802e372: 687b ldr r3, [r7, #4] - 802e374: 2220 movs r2, #32 - 802e376: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e3a2: 687b ldr r3, [r7, #4] + 802e3a4: 2220 movs r2, #32 + 802e3a6: f883 2041 strb.w r2, [r3, #65] ; 0x41 } hi2c->XferISR = NULL; - 802e37a: 687b ldr r3, [r7, #4] - 802e37c: 2200 movs r2, #0 - 802e37e: 635a str r2, [r3, #52] ; 0x34 + 802e3aa: 687b ldr r3, [r7, #4] + 802e3ac: 2200 movs r2, #0 + 802e3ae: 635a str r2, [r3, #52] ; 0x34 } /* Abort DMA TX transfer if any */ tmppreviousstate = hi2c->PreviousState; - 802e380: 687b ldr r3, [r7, #4] - 802e382: 6b1b ldr r3, [r3, #48] ; 0x30 - 802e384: 60bb str r3, [r7, #8] + 802e3b0: 687b ldr r3, [r7, #4] + 802e3b2: 6b1b ldr r3, [r3, #48] ; 0x30 + 802e3b4: 60bb str r3, [r7, #8] if ((hi2c->hdmatx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_TX) || \ - 802e386: 687b ldr r3, [r7, #4] - 802e388: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e38a: 2b00 cmp r3, #0 - 802e38c: d039 beq.n 802e402 - 802e38e: 68bb ldr r3, [r7, #8] - 802e390: 2b11 cmp r3, #17 - 802e392: d002 beq.n 802e39a - 802e394: 68bb ldr r3, [r7, #8] - 802e396: 2b21 cmp r3, #33 ; 0x21 - 802e398: d133 bne.n 802e402 + 802e3b6: 687b ldr r3, [r7, #4] + 802e3b8: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e3ba: 2b00 cmp r3, #0 + 802e3bc: d039 beq.n 802e432 + 802e3be: 68bb ldr r3, [r7, #8] + 802e3c0: 2b11 cmp r3, #17 + 802e3c2: d002 beq.n 802e3ca + 802e3c4: 68bb ldr r3, [r7, #8] + 802e3c6: 2b21 cmp r3, #33 ; 0x21 + 802e3c8: d133 bne.n 802e432 (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) { if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) - 802e39a: 687b ldr r3, [r7, #4] - 802e39c: 681b ldr r3, [r3, #0] - 802e39e: 681b ldr r3, [r3, #0] - 802e3a0: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 802e3a4: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 802e3a8: d107 bne.n 802e3ba + 802e3ca: 687b ldr r3, [r7, #4] + 802e3cc: 681b ldr r3, [r3, #0] + 802e3ce: 681b ldr r3, [r3, #0] + 802e3d0: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 802e3d4: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 802e3d8: d107 bne.n 802e3ea { hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - 802e3aa: 687b ldr r3, [r7, #4] - 802e3ac: 681b ldr r3, [r3, #0] - 802e3ae: 681a ldr r2, [r3, #0] - 802e3b0: 687b ldr r3, [r7, #4] - 802e3b2: 681b ldr r3, [r3, #0] - 802e3b4: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 802e3b8: 601a str r2, [r3, #0] + 802e3da: 687b ldr r3, [r7, #4] + 802e3dc: 681b ldr r3, [r3, #0] + 802e3de: 681a ldr r2, [r3, #0] + 802e3e0: 687b ldr r3, [r7, #4] + 802e3e2: 681b ldr r3, [r3, #0] + 802e3e4: f422 4280 bic.w r2, r2, #16384 ; 0x4000 + 802e3e8: 601a str r2, [r3, #0] } if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 802e3ba: 687b ldr r3, [r7, #4] - 802e3bc: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e3be: 4618 mov r0, r3 - 802e3c0: f7fb fdec bl 8029f9c - 802e3c4: 4603 mov r3, r0 - 802e3c6: 2b01 cmp r3, #1 - 802e3c8: d017 beq.n 802e3fa + 802e3ea: 687b ldr r3, [r7, #4] + 802e3ec: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e3ee: 4618 mov r0, r3 + 802e3f0: f7fb fdec bl 8029fcc + 802e3f4: 4603 mov r3, r0 + 802e3f6: 2b01 cmp r3, #1 + 802e3f8: d017 beq.n 802e42a { /* Set the I2C DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; - 802e3ca: 687b ldr r3, [r7, #4] - 802e3cc: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e3ce: 4a33 ldr r2, [pc, #204] ; (802e49c ) - 802e3d0: 651a str r2, [r3, #80] ; 0x50 + 802e3fa: 687b ldr r3, [r7, #4] + 802e3fc: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e3fe: 4a33 ldr r2, [pc, #204] ; (802e4cc ) + 802e400: 651a str r2, [r3, #80] ; 0x50 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e3d2: 687b ldr r3, [r7, #4] - 802e3d4: 2200 movs r2, #0 - 802e3d6: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e402: 687b ldr r3, [r7, #4] + 802e404: 2200 movs r2, #0 + 802e406: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Abort DMA TX */ if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) - 802e3da: 687b ldr r3, [r7, #4] - 802e3dc: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e3de: 4618 mov r0, r3 - 802e3e0: f7fa fc6c bl 8028cbc - 802e3e4: 4603 mov r3, r0 - 802e3e6: 2b00 cmp r3, #0 - 802e3e8: d04d beq.n 802e486 + 802e40a: 687b ldr r3, [r7, #4] + 802e40c: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e40e: 4618 mov r0, r3 + 802e410: f7fa fc6c bl 8028cec + 802e414: 4603 mov r3, r0 + 802e416: 2b00 cmp r3, #0 + 802e418: d04d beq.n 802e4b6 { /* Call Directly XferAbortCallback function in case of error */ hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); - 802e3ea: 687b ldr r3, [r7, #4] - 802e3ec: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e3ee: 6d1b ldr r3, [r3, #80] ; 0x50 - 802e3f0: 687a ldr r2, [r7, #4] - 802e3f2: 6b92 ldr r2, [r2, #56] ; 0x38 - 802e3f4: 4610 mov r0, r2 - 802e3f6: 4798 blx r3 + 802e41a: 687b ldr r3, [r7, #4] + 802e41c: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e41e: 6d1b ldr r3, [r3, #80] ; 0x50 + 802e420: 687a ldr r2, [r7, #4] + 802e422: 6b92 ldr r2, [r2, #56] ; 0x38 + 802e424: 4610 mov r0, r2 + 802e426: 4798 blx r3 if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 802e3f8: e045 b.n 802e486 + 802e428: e045 b.n 802e4b6 } } else { I2C_TreatErrorCallback(hi2c); - 802e3fa: 6878 ldr r0, [r7, #4] - 802e3fc: f000 f850 bl 802e4a0 + 802e42a: 6878 ldr r0, [r7, #4] + 802e42c: f000 f850 bl 802e4d0 if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 802e400: e041 b.n 802e486 + 802e430: e041 b.n 802e4b6 } } /* Abort DMA RX transfer if any */ else if ((hi2c->hdmarx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_RX) || \ - 802e402: 687b ldr r3, [r7, #4] - 802e404: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e406: 2b00 cmp r3, #0 - 802e408: d039 beq.n 802e47e - 802e40a: 68bb ldr r3, [r7, #8] - 802e40c: 2b12 cmp r3, #18 - 802e40e: d002 beq.n 802e416 - 802e410: 68bb ldr r3, [r7, #8] - 802e412: 2b22 cmp r3, #34 ; 0x22 - 802e414: d133 bne.n 802e47e + 802e432: 687b ldr r3, [r7, #4] + 802e434: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e436: 2b00 cmp r3, #0 + 802e438: d039 beq.n 802e4ae + 802e43a: 68bb ldr r3, [r7, #8] + 802e43c: 2b12 cmp r3, #18 + 802e43e: d002 beq.n 802e446 + 802e440: 68bb ldr r3, [r7, #8] + 802e442: 2b22 cmp r3, #34 ; 0x22 + 802e444: d133 bne.n 802e4ae (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) { if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) - 802e416: 687b ldr r3, [r7, #4] - 802e418: 681b ldr r3, [r3, #0] - 802e41a: 681b ldr r3, [r3, #0] - 802e41c: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 802e420: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 802e424: d107 bne.n 802e436 + 802e446: 687b ldr r3, [r7, #4] + 802e448: 681b ldr r3, [r3, #0] + 802e44a: 681b ldr r3, [r3, #0] + 802e44c: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 802e450: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 802e454: d107 bne.n 802e466 { hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - 802e426: 687b ldr r3, [r7, #4] - 802e428: 681b ldr r3, [r3, #0] - 802e42a: 681a ldr r2, [r3, #0] - 802e42c: 687b ldr r3, [r7, #4] - 802e42e: 681b ldr r3, [r3, #0] - 802e430: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802e434: 601a str r2, [r3, #0] + 802e456: 687b ldr r3, [r7, #4] + 802e458: 681b ldr r3, [r3, #0] + 802e45a: 681a ldr r2, [r3, #0] + 802e45c: 687b ldr r3, [r7, #4] + 802e45e: 681b ldr r3, [r3, #0] + 802e460: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802e464: 601a str r2, [r3, #0] } if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 802e436: 687b ldr r3, [r7, #4] - 802e438: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e43a: 4618 mov r0, r3 - 802e43c: f7fb fdae bl 8029f9c - 802e440: 4603 mov r3, r0 - 802e442: 2b01 cmp r3, #1 - 802e444: d017 beq.n 802e476 + 802e466: 687b ldr r3, [r7, #4] + 802e468: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e46a: 4618 mov r0, r3 + 802e46c: f7fb fdae bl 8029fcc + 802e470: 4603 mov r3, r0 + 802e472: 2b01 cmp r3, #1 + 802e474: d017 beq.n 802e4a6 { /* Set the I2C DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; - 802e446: 687b ldr r3, [r7, #4] - 802e448: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e44a: 4a14 ldr r2, [pc, #80] ; (802e49c ) - 802e44c: 651a str r2, [r3, #80] ; 0x50 + 802e476: 687b ldr r3, [r7, #4] + 802e478: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e47a: 4a14 ldr r2, [pc, #80] ; (802e4cc ) + 802e47c: 651a str r2, [r3, #80] ; 0x50 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e44e: 687b ldr r3, [r7, #4] - 802e450: 2200 movs r2, #0 - 802e452: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e47e: 687b ldr r3, [r7, #4] + 802e480: 2200 movs r2, #0 + 802e482: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Abort DMA RX */ if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) - 802e456: 687b ldr r3, [r7, #4] - 802e458: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e45a: 4618 mov r0, r3 - 802e45c: f7fa fc2e bl 8028cbc - 802e460: 4603 mov r3, r0 - 802e462: 2b00 cmp r3, #0 - 802e464: d011 beq.n 802e48a + 802e486: 687b ldr r3, [r7, #4] + 802e488: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e48a: 4618 mov r0, r3 + 802e48c: f7fa fc2e bl 8028cec + 802e490: 4603 mov r3, r0 + 802e492: 2b00 cmp r3, #0 + 802e494: d011 beq.n 802e4ba { /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); - 802e466: 687b ldr r3, [r7, #4] - 802e468: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e46a: 6d1b ldr r3, [r3, #80] ; 0x50 - 802e46c: 687a ldr r2, [r7, #4] - 802e46e: 6bd2 ldr r2, [r2, #60] ; 0x3c - 802e470: 4610 mov r0, r2 - 802e472: 4798 blx r3 + 802e496: 687b ldr r3, [r7, #4] + 802e498: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e49a: 6d1b ldr r3, [r3, #80] ; 0x50 + 802e49c: 687a ldr r2, [r7, #4] + 802e49e: 6bd2 ldr r2, [r2, #60] ; 0x3c + 802e4a0: 4610 mov r0, r2 + 802e4a2: 4798 blx r3 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 802e474: e009 b.n 802e48a + 802e4a4: e009 b.n 802e4ba } } else { I2C_TreatErrorCallback(hi2c); - 802e476: 6878 ldr r0, [r7, #4] - 802e478: f000 f812 bl 802e4a0 + 802e4a6: 6878 ldr r0, [r7, #4] + 802e4a8: f000 f812 bl 802e4d0 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 802e47c: e005 b.n 802e48a + 802e4ac: e005 b.n 802e4ba } } else { I2C_TreatErrorCallback(hi2c); - 802e47e: 6878 ldr r0, [r7, #4] - 802e480: f000 f80e bl 802e4a0 + 802e4ae: 6878 ldr r0, [r7, #4] + 802e4b0: f000 f80e bl 802e4d0 } } - 802e484: e002 b.n 802e48c + 802e4b4: e002 b.n 802e4bc if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 802e486: bf00 nop - 802e488: e000 b.n 802e48c + 802e4b6: bf00 nop + 802e4b8: e000 b.n 802e4bc if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 802e48a: bf00 nop + 802e4ba: bf00 nop } - 802e48c: bf00 nop - 802e48e: 3710 adds r7, #16 - 802e490: 46bd mov sp, r7 - 802e492: bd80 pop {r7, pc} - 802e494: ffff0000 .word 0xffff0000 - 802e498: 0802da9b .word 0x0802da9b - 802e49c: 0802e537 .word 0x0802e537 + 802e4bc: bf00 nop + 802e4be: 3710 adds r7, #16 + 802e4c0: 46bd mov sp, r7 + 802e4c2: bd80 pop {r7, pc} + 802e4c4: ffff0000 .word 0xffff0000 + 802e4c8: 0802dacb .word 0x0802dacb + 802e4cc: 0802e567 .word 0x0802e567 -0802e4a0 : +0802e4d0 : * @brief I2C Error callback treatment. * @param hi2c I2C handle. * @retval None */ static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c) { - 802e4a0: b580 push {r7, lr} - 802e4a2: b082 sub sp, #8 - 802e4a4: af00 add r7, sp, #0 - 802e4a6: 6078 str r0, [r7, #4] + 802e4d0: b580 push {r7, lr} + 802e4d2: b082 sub sp, #8 + 802e4d4: af00 add r7, sp, #0 + 802e4d6: 6078 str r0, [r7, #4] if (hi2c->State == HAL_I2C_STATE_ABORT) - 802e4a8: 687b ldr r3, [r7, #4] - 802e4aa: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e4ae: b2db uxtb r3, r3 - 802e4b0: 2b60 cmp r3, #96 ; 0x60 - 802e4b2: d10e bne.n 802e4d2 + 802e4d8: 687b ldr r3, [r7, #4] + 802e4da: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e4de: b2db uxtb r3, r3 + 802e4e0: 2b60 cmp r3, #96 ; 0x60 + 802e4e2: d10e bne.n 802e502 { hi2c->State = HAL_I2C_STATE_READY; - 802e4b4: 687b ldr r3, [r7, #4] - 802e4b6: 2220 movs r2, #32 - 802e4b8: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e4e4: 687b ldr r3, [r7, #4] + 802e4e6: 2220 movs r2, #32 + 802e4e8: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802e4bc: 687b ldr r3, [r7, #4] - 802e4be: 2200 movs r2, #0 - 802e4c0: 631a str r2, [r3, #48] ; 0x30 + 802e4ec: 687b ldr r3, [r7, #4] + 802e4ee: 2200 movs r2, #0 + 802e4f0: 631a str r2, [r3, #48] ; 0x30 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e4c2: 687b ldr r3, [r7, #4] - 802e4c4: 2200 movs r2, #0 - 802e4c6: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e4f2: 687b ldr r3, [r7, #4] + 802e4f4: 2200 movs r2, #0 + 802e4f6: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->AbortCpltCallback(hi2c); #else HAL_I2C_AbortCpltCallback(hi2c); - 802e4ca: 6878 ldr r0, [r7, #4] - 802e4cc: f7ff fadb bl 802da86 + 802e4fa: 6878 ldr r0, [r7, #4] + 802e4fc: f7ff fadb bl 802dab6 hi2c->ErrorCallback(hi2c); #else HAL_I2C_ErrorCallback(hi2c); #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } - 802e4d0: e009 b.n 802e4e6 + 802e500: e009 b.n 802e516 hi2c->PreviousState = I2C_STATE_NONE; - 802e4d2: 687b ldr r3, [r7, #4] - 802e4d4: 2200 movs r2, #0 - 802e4d6: 631a str r2, [r3, #48] ; 0x30 + 802e502: 687b ldr r3, [r7, #4] + 802e504: 2200 movs r2, #0 + 802e506: 631a str r2, [r3, #48] ; 0x30 __HAL_UNLOCK(hi2c); - 802e4d8: 687b ldr r3, [r7, #4] - 802e4da: 2200 movs r2, #0 - 802e4dc: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e508: 687b ldr r3, [r7, #4] + 802e50a: 2200 movs r2, #0 + 802e50c: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_ErrorCallback(hi2c); - 802e4e0: 6878 ldr r0, [r7, #4] - 802e4e2: f7ff fac6 bl 802da72 + 802e510: 6878 ldr r0, [r7, #4] + 802e512: f7ff fac6 bl 802daa2 } - 802e4e6: bf00 nop - 802e4e8: 3708 adds r7, #8 - 802e4ea: 46bd mov sp, r7 - 802e4ec: bd80 pop {r7, pc} + 802e516: bf00 nop + 802e518: 3708 adds r7, #8 + 802e51a: 46bd mov sp, r7 + 802e51c: bd80 pop {r7, pc} -0802e4ee : +0802e51e : * @brief I2C Tx data register flush process. * @param hi2c I2C handle. * @retval None */ static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) { - 802e4ee: b480 push {r7} - 802e4f0: b083 sub sp, #12 - 802e4f2: af00 add r7, sp, #0 - 802e4f4: 6078 str r0, [r7, #4] + 802e51e: b480 push {r7} + 802e520: b083 sub sp, #12 + 802e522: af00 add r7, sp, #0 + 802e524: 6078 str r0, [r7, #4] /* If a pending TXIS flag is set */ /* Write a dummy data in TXDR to clear it */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) - 802e4f6: 687b ldr r3, [r7, #4] - 802e4f8: 681b ldr r3, [r3, #0] - 802e4fa: 699b ldr r3, [r3, #24] - 802e4fc: f003 0302 and.w r3, r3, #2 - 802e500: 2b02 cmp r3, #2 - 802e502: d103 bne.n 802e50c + 802e526: 687b ldr r3, [r7, #4] + 802e528: 681b ldr r3, [r3, #0] + 802e52a: 699b ldr r3, [r3, #24] + 802e52c: f003 0302 and.w r3, r3, #2 + 802e530: 2b02 cmp r3, #2 + 802e532: d103 bne.n 802e53c { hi2c->Instance->TXDR = 0x00U; - 802e504: 687b ldr r3, [r7, #4] - 802e506: 681b ldr r3, [r3, #0] - 802e508: 2200 movs r2, #0 - 802e50a: 629a str r2, [r3, #40] ; 0x28 + 802e534: 687b ldr r3, [r7, #4] + 802e536: 681b ldr r3, [r3, #0] + 802e538: 2200 movs r2, #0 + 802e53a: 629a str r2, [r3, #40] ; 0x28 } /* Flush TX register if not empty */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 802e50c: 687b ldr r3, [r7, #4] - 802e50e: 681b ldr r3, [r3, #0] - 802e510: 699b ldr r3, [r3, #24] - 802e512: f003 0301 and.w r3, r3, #1 - 802e516: 2b01 cmp r3, #1 - 802e518: d007 beq.n 802e52a + 802e53c: 687b ldr r3, [r7, #4] + 802e53e: 681b ldr r3, [r3, #0] + 802e540: 699b ldr r3, [r3, #24] + 802e542: f003 0301 and.w r3, r3, #1 + 802e546: 2b01 cmp r3, #1 + 802e548: d007 beq.n 802e55a { __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); - 802e51a: 687b ldr r3, [r7, #4] - 802e51c: 681b ldr r3, [r3, #0] - 802e51e: 699a ldr r2, [r3, #24] - 802e520: 687b ldr r3, [r7, #4] - 802e522: 681b ldr r3, [r3, #0] - 802e524: f042 0201 orr.w r2, r2, #1 - 802e528: 619a str r2, [r3, #24] - } -} - 802e52a: bf00 nop - 802e52c: 370c adds r7, #12 - 802e52e: 46bd mov sp, r7 - 802e530: f85d 7b04 ldr.w r7, [sp], #4 - 802e534: 4770 bx lr - -0802e536 : + 802e54a: 687b ldr r3, [r7, #4] + 802e54c: 681b ldr r3, [r3, #0] + 802e54e: 699a ldr r2, [r3, #24] + 802e550: 687b ldr r3, [r7, #4] + 802e552: 681b ldr r3, [r3, #0] + 802e554: f042 0201 orr.w r2, r2, #1 + 802e558: 619a str r2, [r3, #24] + } +} + 802e55a: bf00 nop + 802e55c: 370c adds r7, #12 + 802e55e: 46bd mov sp, r7 + 802e560: f85d 7b04 ldr.w r7, [sp], #4 + 802e564: 4770 bx lr + +0802e566 : * (To be called at end of DMA Abort procedure). * @param hdma DMA handle. * @retval None */ static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) { - 802e536: b580 push {r7, lr} - 802e538: b084 sub sp, #16 - 802e53a: af00 add r7, sp, #0 - 802e53c: 6078 str r0, [r7, #4] + 802e566: b580 push {r7, lr} + 802e568: b084 sub sp, #16 + 802e56a: af00 add r7, sp, #0 + 802e56c: 6078 str r0, [r7, #4] /* Derogation MISRAC2012-Rule-11.5 */ I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); - 802e53e: 687b ldr r3, [r7, #4] - 802e540: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e542: 60fb str r3, [r7, #12] + 802e56e: 687b ldr r3, [r7, #4] + 802e570: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e572: 60fb str r3, [r7, #12] /* Reset AbortCpltCallback */ if (hi2c->hdmatx != NULL) - 802e544: 68fb ldr r3, [r7, #12] - 802e546: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e548: 2b00 cmp r3, #0 - 802e54a: d003 beq.n 802e554 + 802e574: 68fb ldr r3, [r7, #12] + 802e576: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e578: 2b00 cmp r3, #0 + 802e57a: d003 beq.n 802e584 { hi2c->hdmatx->XferAbortCallback = NULL; - 802e54c: 68fb ldr r3, [r7, #12] - 802e54e: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e550: 2200 movs r2, #0 - 802e552: 651a str r2, [r3, #80] ; 0x50 + 802e57c: 68fb ldr r3, [r7, #12] + 802e57e: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e580: 2200 movs r2, #0 + 802e582: 651a str r2, [r3, #80] ; 0x50 } if (hi2c->hdmarx != NULL) - 802e554: 68fb ldr r3, [r7, #12] - 802e556: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e558: 2b00 cmp r3, #0 - 802e55a: d003 beq.n 802e564 + 802e584: 68fb ldr r3, [r7, #12] + 802e586: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e588: 2b00 cmp r3, #0 + 802e58a: d003 beq.n 802e594 { hi2c->hdmarx->XferAbortCallback = NULL; - 802e55c: 68fb ldr r3, [r7, #12] - 802e55e: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e560: 2200 movs r2, #0 - 802e562: 651a str r2, [r3, #80] ; 0x50 + 802e58c: 68fb ldr r3, [r7, #12] + 802e58e: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e590: 2200 movs r2, #0 + 802e592: 651a str r2, [r3, #80] ; 0x50 } I2C_TreatErrorCallback(hi2c); - 802e564: 68f8 ldr r0, [r7, #12] - 802e566: f7ff ff9b bl 802e4a0 + 802e594: 68f8 ldr r0, [r7, #12] + 802e596: f7ff ff9b bl 802e4d0 } - 802e56a: bf00 nop - 802e56c: 3710 adds r7, #16 - 802e56e: 46bd mov sp, r7 - 802e570: bd80 pop {r7, pc} + 802e59a: bf00 nop + 802e59c: 3710 adds r7, #16 + 802e59e: 46bd mov sp, r7 + 802e5a0: bd80 pop {r7, pc} -0802e572 : +0802e5a2 : * the configuration information for the specified I2C. * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. * @retval None */ static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) { - 802e572: b480 push {r7} - 802e574: b085 sub sp, #20 - 802e576: af00 add r7, sp, #0 - 802e578: 6078 str r0, [r7, #4] - 802e57a: 460b mov r3, r1 - 802e57c: 807b strh r3, [r7, #2] + 802e5a2: b480 push {r7} + 802e5a4: b085 sub sp, #20 + 802e5a6: af00 add r7, sp, #0 + 802e5a8: 6078 str r0, [r7, #4] + 802e5aa: 460b mov r3, r1 + 802e5ac: 807b strh r3, [r7, #2] uint32_t tmpisr = 0U; - 802e57e: 2300 movs r3, #0 - 802e580: 60fb str r3, [r7, #12] + 802e5ae: 2300 movs r3, #0 + 802e5b0: 60fb str r3, [r7, #12] if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - 802e582: 887b ldrh r3, [r7, #2] - 802e584: f003 0301 and.w r3, r3, #1 - 802e588: 2b00 cmp r3, #0 - 802e58a: d00f beq.n 802e5ac + 802e5b2: 887b ldrh r3, [r7, #2] + 802e5b4: f003 0301 and.w r3, r3, #1 + 802e5b8: 2b00 cmp r3, #0 + 802e5ba: d00f beq.n 802e5dc { /* Disable TC and TXI interrupts */ tmpisr |= I2C_IT_TCI | I2C_IT_TXI; - 802e58c: 68fb ldr r3, [r7, #12] - 802e58e: f043 0342 orr.w r3, r3, #66 ; 0x42 - 802e592: 60fb str r3, [r7, #12] + 802e5bc: 68fb ldr r3, [r7, #12] + 802e5be: f043 0342 orr.w r3, r3, #66 ; 0x42 + 802e5c2: 60fb str r3, [r7, #12] if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) - 802e594: 687b ldr r3, [r7, #4] - 802e596: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e59a: b2db uxtb r3, r3 - 802e59c: f003 0328 and.w r3, r3, #40 ; 0x28 - 802e5a0: 2b28 cmp r3, #40 ; 0x28 - 802e5a2: d003 beq.n 802e5ac + 802e5c4: 687b ldr r3, [r7, #4] + 802e5c6: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e5ca: b2db uxtb r3, r3 + 802e5cc: f003 0328 and.w r3, r3, #40 ; 0x28 + 802e5d0: 2b28 cmp r3, #40 ; 0x28 + 802e5d2: d003 beq.n 802e5dc { /* Disable NACK and STOP interrupts */ tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 802e5a4: 68fb ldr r3, [r7, #12] - 802e5a6: f043 03b0 orr.w r3, r3, #176 ; 0xb0 - 802e5aa: 60fb str r3, [r7, #12] + 802e5d4: 68fb ldr r3, [r7, #12] + 802e5d6: f043 03b0 orr.w r3, r3, #176 ; 0xb0 + 802e5da: 60fb str r3, [r7, #12] } } if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - 802e5ac: 887b ldrh r3, [r7, #2] - 802e5ae: f003 0302 and.w r3, r3, #2 - 802e5b2: 2b00 cmp r3, #0 - 802e5b4: d00f beq.n 802e5d6 + 802e5dc: 887b ldrh r3, [r7, #2] + 802e5de: f003 0302 and.w r3, r3, #2 + 802e5e2: 2b00 cmp r3, #0 + 802e5e4: d00f beq.n 802e606 { /* Disable TC and RXI interrupts */ tmpisr |= I2C_IT_TCI | I2C_IT_RXI; - 802e5b6: 68fb ldr r3, [r7, #12] - 802e5b8: f043 0344 orr.w r3, r3, #68 ; 0x44 - 802e5bc: 60fb str r3, [r7, #12] + 802e5e6: 68fb ldr r3, [r7, #12] + 802e5e8: f043 0344 orr.w r3, r3, #68 ; 0x44 + 802e5ec: 60fb str r3, [r7, #12] if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) - 802e5be: 687b ldr r3, [r7, #4] - 802e5c0: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e5c4: b2db uxtb r3, r3 - 802e5c6: f003 0328 and.w r3, r3, #40 ; 0x28 - 802e5ca: 2b28 cmp r3, #40 ; 0x28 - 802e5cc: d003 beq.n 802e5d6 + 802e5ee: 687b ldr r3, [r7, #4] + 802e5f0: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e5f4: b2db uxtb r3, r3 + 802e5f6: f003 0328 and.w r3, r3, #40 ; 0x28 + 802e5fa: 2b28 cmp r3, #40 ; 0x28 + 802e5fc: d003 beq.n 802e606 { /* Disable NACK and STOP interrupts */ tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 802e5ce: 68fb ldr r3, [r7, #12] - 802e5d0: f043 03b0 orr.w r3, r3, #176 ; 0xb0 - 802e5d4: 60fb str r3, [r7, #12] + 802e5fe: 68fb ldr r3, [r7, #12] + 802e600: f043 03b0 orr.w r3, r3, #176 ; 0xb0 + 802e604: 60fb str r3, [r7, #12] } } if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - 802e5d6: f9b7 3002 ldrsh.w r3, [r7, #2] - 802e5da: 2b00 cmp r3, #0 - 802e5dc: da03 bge.n 802e5e6 + 802e606: f9b7 3002 ldrsh.w r3, [r7, #2] + 802e60a: 2b00 cmp r3, #0 + 802e60c: da03 bge.n 802e616 { /* Disable ADDR, NACK and STOP interrupts */ tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 802e5de: 68fb ldr r3, [r7, #12] - 802e5e0: f043 03b8 orr.w r3, r3, #184 ; 0xb8 - 802e5e4: 60fb str r3, [r7, #12] + 802e60e: 68fb ldr r3, [r7, #12] + 802e610: f043 03b8 orr.w r3, r3, #184 ; 0xb8 + 802e614: 60fb str r3, [r7, #12] } if (InterruptRequest == I2C_XFER_ERROR_IT) - 802e5e6: 887b ldrh r3, [r7, #2] - 802e5e8: 2b10 cmp r3, #16 - 802e5ea: d103 bne.n 802e5f4 + 802e616: 887b ldrh r3, [r7, #2] + 802e618: 2b10 cmp r3, #16 + 802e61a: d103 bne.n 802e624 { /* Enable ERR and NACK interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; - 802e5ec: 68fb ldr r3, [r7, #12] - 802e5ee: f043 0390 orr.w r3, r3, #144 ; 0x90 - 802e5f2: 60fb str r3, [r7, #12] + 802e61c: 68fb ldr r3, [r7, #12] + 802e61e: f043 0390 orr.w r3, r3, #144 ; 0x90 + 802e622: 60fb str r3, [r7, #12] } if (InterruptRequest == I2C_XFER_CPLT_IT) - 802e5f4: 887b ldrh r3, [r7, #2] - 802e5f6: 2b20 cmp r3, #32 - 802e5f8: d103 bne.n 802e602 + 802e624: 887b ldrh r3, [r7, #2] + 802e626: 2b20 cmp r3, #32 + 802e628: d103 bne.n 802e632 { /* Enable STOP interrupts */ tmpisr |= I2C_IT_STOPI; - 802e5fa: 68fb ldr r3, [r7, #12] - 802e5fc: f043 0320 orr.w r3, r3, #32 - 802e600: 60fb str r3, [r7, #12] + 802e62a: 68fb ldr r3, [r7, #12] + 802e62c: f043 0320 orr.w r3, r3, #32 + 802e630: 60fb str r3, [r7, #12] } if (InterruptRequest == I2C_XFER_RELOAD_IT) - 802e602: 887b ldrh r3, [r7, #2] - 802e604: 2b40 cmp r3, #64 ; 0x40 - 802e606: d103 bne.n 802e610 + 802e632: 887b ldrh r3, [r7, #2] + 802e634: 2b40 cmp r3, #64 ; 0x40 + 802e636: d103 bne.n 802e640 { /* Enable TC interrupts */ tmpisr |= I2C_IT_TCI; - 802e608: 68fb ldr r3, [r7, #12] - 802e60a: f043 0340 orr.w r3, r3, #64 ; 0x40 - 802e60e: 60fb str r3, [r7, #12] + 802e638: 68fb ldr r3, [r7, #12] + 802e63a: f043 0340 orr.w r3, r3, #64 ; 0x40 + 802e63e: 60fb str r3, [r7, #12] } /* Disable interrupts only at the end */ /* to avoid a breaking situation like at "t" time */ /* all disable interrupts request are not done */ __HAL_I2C_DISABLE_IT(hi2c, tmpisr); - 802e610: 687b ldr r3, [r7, #4] - 802e612: 681b ldr r3, [r3, #0] - 802e614: 6819 ldr r1, [r3, #0] - 802e616: 68fb ldr r3, [r7, #12] - 802e618: 43da mvns r2, r3 - 802e61a: 687b ldr r3, [r7, #4] - 802e61c: 681b ldr r3, [r3, #0] - 802e61e: 400a ands r2, r1 - 802e620: 601a str r2, [r3, #0] -} - 802e622: bf00 nop - 802e624: 3714 adds r7, #20 - 802e626: 46bd mov sp, r7 - 802e628: f85d 7b04 ldr.w r7, [sp], #4 - 802e62c: 4770 bx lr - -0802e62e : + 802e640: 687b ldr r3, [r7, #4] + 802e642: 681b ldr r3, [r3, #0] + 802e644: 6819 ldr r1, [r3, #0] + 802e646: 68fb ldr r3, [r7, #12] + 802e648: 43da mvns r2, r3 + 802e64a: 687b ldr r3, [r7, #4] + 802e64c: 681b ldr r3, [r3, #0] + 802e64e: 400a ands r2, r1 + 802e650: 601a str r2, [r3, #0] +} + 802e652: bf00 nop + 802e654: 3714 adds r7, #20 + 802e656: 46bd mov sp, r7 + 802e658: f85d 7b04 ldr.w r7, [sp], #4 + 802e65c: 4770 bx lr + +0802e65e : * the configuration information for the specified I2Cx peripheral. * @param AnalogFilter New state of the Analog filter. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) { - 802e62e: b480 push {r7} - 802e630: b083 sub sp, #12 - 802e632: af00 add r7, sp, #0 - 802e634: 6078 str r0, [r7, #4] - 802e636: 6039 str r1, [r7, #0] + 802e65e: b480 push {r7} + 802e660: b083 sub sp, #12 + 802e662: af00 add r7, sp, #0 + 802e664: 6078 str r0, [r7, #4] + 802e666: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); if (hi2c->State == HAL_I2C_STATE_READY) - 802e638: 687b ldr r3, [r7, #4] - 802e63a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e63e: b2db uxtb r3, r3 - 802e640: 2b20 cmp r3, #32 - 802e642: d138 bne.n 802e6b6 + 802e668: 687b ldr r3, [r7, #4] + 802e66a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e66e: b2db uxtb r3, r3 + 802e670: 2b20 cmp r3, #32 + 802e672: d138 bne.n 802e6e6 { /* Process Locked */ __HAL_LOCK(hi2c); - 802e644: 687b ldr r3, [r7, #4] - 802e646: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 802e64a: 2b01 cmp r3, #1 - 802e64c: d101 bne.n 802e652 - 802e64e: 2302 movs r3, #2 - 802e650: e032 b.n 802e6b8 - 802e652: 687b ldr r3, [r7, #4] - 802e654: 2201 movs r2, #1 - 802e656: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e674: 687b ldr r3, [r7, #4] + 802e676: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 + 802e67a: 2b01 cmp r3, #1 + 802e67c: d101 bne.n 802e682 + 802e67e: 2302 movs r3, #2 + 802e680: e032 b.n 802e6e8 + 802e682: 687b ldr r3, [r7, #4] + 802e684: 2201 movs r2, #1 + 802e686: f883 2040 strb.w r2, [r3, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_BUSY; - 802e65a: 687b ldr r3, [r7, #4] - 802e65c: 2224 movs r2, #36 ; 0x24 - 802e65e: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e68a: 687b ldr r3, [r7, #4] + 802e68c: 2224 movs r2, #36 ; 0x24 + 802e68e: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 802e662: 687b ldr r3, [r7, #4] - 802e664: 681b ldr r3, [r3, #0] - 802e666: 681a ldr r2, [r3, #0] - 802e668: 687b ldr r3, [r7, #4] - 802e66a: 681b ldr r3, [r3, #0] - 802e66c: f022 0201 bic.w r2, r2, #1 - 802e670: 601a str r2, [r3, #0] + 802e692: 687b ldr r3, [r7, #4] + 802e694: 681b ldr r3, [r3, #0] + 802e696: 681a ldr r2, [r3, #0] + 802e698: 687b ldr r3, [r7, #4] + 802e69a: 681b ldr r3, [r3, #0] + 802e69c: f022 0201 bic.w r2, r2, #1 + 802e6a0: 601a str r2, [r3, #0] /* Reset I2Cx ANOFF bit */ hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); - 802e672: 687b ldr r3, [r7, #4] - 802e674: 681b ldr r3, [r3, #0] - 802e676: 681a ldr r2, [r3, #0] - 802e678: 687b ldr r3, [r7, #4] - 802e67a: 681b ldr r3, [r3, #0] - 802e67c: f422 5280 bic.w r2, r2, #4096 ; 0x1000 - 802e680: 601a str r2, [r3, #0] + 802e6a2: 687b ldr r3, [r7, #4] + 802e6a4: 681b ldr r3, [r3, #0] + 802e6a6: 681a ldr r2, [r3, #0] + 802e6a8: 687b ldr r3, [r7, #4] + 802e6aa: 681b ldr r3, [r3, #0] + 802e6ac: f422 5280 bic.w r2, r2, #4096 ; 0x1000 + 802e6b0: 601a str r2, [r3, #0] /* Set analog filter bit*/ hi2c->Instance->CR1 |= AnalogFilter; - 802e682: 687b ldr r3, [r7, #4] - 802e684: 681b ldr r3, [r3, #0] - 802e686: 6819 ldr r1, [r3, #0] - 802e688: 687b ldr r3, [r7, #4] - 802e68a: 681b ldr r3, [r3, #0] - 802e68c: 683a ldr r2, [r7, #0] - 802e68e: 430a orrs r2, r1 - 802e690: 601a str r2, [r3, #0] + 802e6b2: 687b ldr r3, [r7, #4] + 802e6b4: 681b ldr r3, [r3, #0] + 802e6b6: 6819 ldr r1, [r3, #0] + 802e6b8: 687b ldr r3, [r7, #4] + 802e6ba: 681b ldr r3, [r3, #0] + 802e6bc: 683a ldr r2, [r7, #0] + 802e6be: 430a orrs r2, r1 + 802e6c0: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); - 802e692: 687b ldr r3, [r7, #4] - 802e694: 681b ldr r3, [r3, #0] - 802e696: 681a ldr r2, [r3, #0] - 802e698: 687b ldr r3, [r7, #4] - 802e69a: 681b ldr r3, [r3, #0] - 802e69c: f042 0201 orr.w r2, r2, #1 - 802e6a0: 601a str r2, [r3, #0] + 802e6c2: 687b ldr r3, [r7, #4] + 802e6c4: 681b ldr r3, [r3, #0] + 802e6c6: 681a ldr r2, [r3, #0] + 802e6c8: 687b ldr r3, [r7, #4] + 802e6ca: 681b ldr r3, [r3, #0] + 802e6cc: f042 0201 orr.w r2, r2, #1 + 802e6d0: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 802e6a2: 687b ldr r3, [r7, #4] - 802e6a4: 2220 movs r2, #32 - 802e6a6: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e6d2: 687b ldr r3, [r7, #4] + 802e6d4: 2220 movs r2, #32 + 802e6d6: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e6aa: 687b ldr r3, [r7, #4] - 802e6ac: 2200 movs r2, #0 - 802e6ae: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e6da: 687b ldr r3, [r7, #4] + 802e6dc: 2200 movs r2, #0 + 802e6de: f883 2040 strb.w r2, [r3, #64] ; 0x40 return HAL_OK; - 802e6b2: 2300 movs r3, #0 - 802e6b4: e000 b.n 802e6b8 + 802e6e2: 2300 movs r3, #0 + 802e6e4: e000 b.n 802e6e8 } else { return HAL_BUSY; - 802e6b6: 2302 movs r3, #2 + 802e6e6: 2302 movs r3, #2 } } - 802e6b8: 4618 mov r0, r3 - 802e6ba: 370c adds r7, #12 - 802e6bc: 46bd mov sp, r7 - 802e6be: f85d 7b04 ldr.w r7, [sp], #4 - 802e6c2: 4770 bx lr + 802e6e8: 4618 mov r0, r3 + 802e6ea: 370c adds r7, #12 + 802e6ec: 46bd mov sp, r7 + 802e6ee: f85d 7b04 ldr.w r7, [sp], #4 + 802e6f2: 4770 bx lr -0802e6c4 : +0802e6f4 : * the configuration information for the specified I2Cx peripheral. * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) { - 802e6c4: b480 push {r7} - 802e6c6: b085 sub sp, #20 - 802e6c8: af00 add r7, sp, #0 - 802e6ca: 6078 str r0, [r7, #4] - 802e6cc: 6039 str r1, [r7, #0] + 802e6f4: b480 push {r7} + 802e6f6: b085 sub sp, #20 + 802e6f8: af00 add r7, sp, #0 + 802e6fa: 6078 str r0, [r7, #4] + 802e6fc: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); if (hi2c->State == HAL_I2C_STATE_READY) - 802e6ce: 687b ldr r3, [r7, #4] - 802e6d0: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e6d4: b2db uxtb r3, r3 - 802e6d6: 2b20 cmp r3, #32 - 802e6d8: d139 bne.n 802e74e + 802e6fe: 687b ldr r3, [r7, #4] + 802e700: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e704: b2db uxtb r3, r3 + 802e706: 2b20 cmp r3, #32 + 802e708: d139 bne.n 802e77e { /* Process Locked */ __HAL_LOCK(hi2c); - 802e6da: 687b ldr r3, [r7, #4] - 802e6dc: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 802e6e0: 2b01 cmp r3, #1 - 802e6e2: d101 bne.n 802e6e8 - 802e6e4: 2302 movs r3, #2 - 802e6e6: e033 b.n 802e750 - 802e6e8: 687b ldr r3, [r7, #4] - 802e6ea: 2201 movs r2, #1 - 802e6ec: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e70a: 687b ldr r3, [r7, #4] + 802e70c: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 + 802e710: 2b01 cmp r3, #1 + 802e712: d101 bne.n 802e718 + 802e714: 2302 movs r3, #2 + 802e716: e033 b.n 802e780 + 802e718: 687b ldr r3, [r7, #4] + 802e71a: 2201 movs r2, #1 + 802e71c: f883 2040 strb.w r2, [r3, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_BUSY; - 802e6f0: 687b ldr r3, [r7, #4] - 802e6f2: 2224 movs r2, #36 ; 0x24 - 802e6f4: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e720: 687b ldr r3, [r7, #4] + 802e722: 2224 movs r2, #36 ; 0x24 + 802e724: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 802e6f8: 687b ldr r3, [r7, #4] - 802e6fa: 681b ldr r3, [r3, #0] - 802e6fc: 681a ldr r2, [r3, #0] - 802e6fe: 687b ldr r3, [r7, #4] - 802e700: 681b ldr r3, [r3, #0] - 802e702: f022 0201 bic.w r2, r2, #1 - 802e706: 601a str r2, [r3, #0] + 802e728: 687b ldr r3, [r7, #4] + 802e72a: 681b ldr r3, [r3, #0] + 802e72c: 681a ldr r2, [r3, #0] + 802e72e: 687b ldr r3, [r7, #4] + 802e730: 681b ldr r3, [r3, #0] + 802e732: f022 0201 bic.w r2, r2, #1 + 802e736: 601a str r2, [r3, #0] /* Get the old register value */ tmpreg = hi2c->Instance->CR1; - 802e708: 687b ldr r3, [r7, #4] - 802e70a: 681b ldr r3, [r3, #0] - 802e70c: 681b ldr r3, [r3, #0] - 802e70e: 60fb str r3, [r7, #12] + 802e738: 687b ldr r3, [r7, #4] + 802e73a: 681b ldr r3, [r3, #0] + 802e73c: 681b ldr r3, [r3, #0] + 802e73e: 60fb str r3, [r7, #12] /* Reset I2Cx DNF bits [11:8] */ tmpreg &= ~(I2C_CR1_DNF); - 802e710: 68fb ldr r3, [r7, #12] - 802e712: f423 6370 bic.w r3, r3, #3840 ; 0xf00 - 802e716: 60fb str r3, [r7, #12] + 802e740: 68fb ldr r3, [r7, #12] + 802e742: f423 6370 bic.w r3, r3, #3840 ; 0xf00 + 802e746: 60fb str r3, [r7, #12] /* Set I2Cx DNF coefficient */ tmpreg |= DigitalFilter << 8U; - 802e718: 683b ldr r3, [r7, #0] - 802e71a: 021b lsls r3, r3, #8 - 802e71c: 68fa ldr r2, [r7, #12] - 802e71e: 4313 orrs r3, r2 - 802e720: 60fb str r3, [r7, #12] + 802e748: 683b ldr r3, [r7, #0] + 802e74a: 021b lsls r3, r3, #8 + 802e74c: 68fa ldr r2, [r7, #12] + 802e74e: 4313 orrs r3, r2 + 802e750: 60fb str r3, [r7, #12] /* Store the new register value */ hi2c->Instance->CR1 = tmpreg; - 802e722: 687b ldr r3, [r7, #4] - 802e724: 681b ldr r3, [r3, #0] - 802e726: 68fa ldr r2, [r7, #12] - 802e728: 601a str r2, [r3, #0] + 802e752: 687b ldr r3, [r7, #4] + 802e754: 681b ldr r3, [r3, #0] + 802e756: 68fa ldr r2, [r7, #12] + 802e758: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); - 802e72a: 687b ldr r3, [r7, #4] - 802e72c: 681b ldr r3, [r3, #0] - 802e72e: 681a ldr r2, [r3, #0] - 802e730: 687b ldr r3, [r7, #4] - 802e732: 681b ldr r3, [r3, #0] - 802e734: f042 0201 orr.w r2, r2, #1 - 802e738: 601a str r2, [r3, #0] + 802e75a: 687b ldr r3, [r7, #4] + 802e75c: 681b ldr r3, [r3, #0] + 802e75e: 681a ldr r2, [r3, #0] + 802e760: 687b ldr r3, [r7, #4] + 802e762: 681b ldr r3, [r3, #0] + 802e764: f042 0201 orr.w r2, r2, #1 + 802e768: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 802e73a: 687b ldr r3, [r7, #4] - 802e73c: 2220 movs r2, #32 - 802e73e: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e76a: 687b ldr r3, [r7, #4] + 802e76c: 2220 movs r2, #32 + 802e76e: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e742: 687b ldr r3, [r7, #4] - 802e744: 2200 movs r2, #0 - 802e746: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e772: 687b ldr r3, [r7, #4] + 802e774: 2200 movs r2, #0 + 802e776: f883 2040 strb.w r2, [r3, #64] ; 0x40 return HAL_OK; - 802e74a: 2300 movs r3, #0 - 802e74c: e000 b.n 802e750 + 802e77a: 2300 movs r3, #0 + 802e77c: e000 b.n 802e780 } else { return HAL_BUSY; - 802e74e: 2302 movs r3, #2 + 802e77e: 2302 movs r3, #2 } } - 802e750: 4618 mov r0, r3 - 802e752: 3714 adds r7, #20 - 802e754: 46bd mov sp, r7 - 802e756: f85d 7b04 ldr.w r7, [sp], #4 - 802e75a: 4770 bx lr + 802e780: 4618 mov r0, r3 + 802e782: 3714 adds r7, #20 + 802e784: 46bd mov sp, r7 + 802e786: f85d 7b04 ldr.w r7, [sp], #4 + 802e78a: 4770 bx lr -0802e75c : +0802e78c : * @param hmdma : pointer to a MDMA_HandleTypeDef structure that contains * the configuration information for the specified MDMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_MDMA_Abort_IT(MDMA_HandleTypeDef *hmdma) { - 802e75c: b480 push {r7} - 802e75e: b083 sub sp, #12 - 802e760: af00 add r7, sp, #0 - 802e762: 6078 str r0, [r7, #4] + 802e78c: b480 push {r7} + 802e78e: b083 sub sp, #12 + 802e790: af00 add r7, sp, #0 + 802e792: 6078 str r0, [r7, #4] /* Check the MDMA peripheral handle */ if(hmdma == NULL) - 802e764: 687b ldr r3, [r7, #4] - 802e766: 2b00 cmp r3, #0 - 802e768: d101 bne.n 802e76e + 802e794: 687b ldr r3, [r7, #4] + 802e796: 2b00 cmp r3, #0 + 802e798: d101 bne.n 802e79e { return HAL_ERROR; - 802e76a: 2301 movs r3, #1 - 802e76c: e017 b.n 802e79e + 802e79a: 2301 movs r3, #1 + 802e79c: e017 b.n 802e7ce } if(HAL_MDMA_STATE_BUSY != hmdma->State) - 802e76e: 687b ldr r3, [r7, #4] - 802e770: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 802e774: b2db uxtb r3, r3 - 802e776: 2b02 cmp r3, #2 - 802e778: d004 beq.n 802e784 + 802e79e: 687b ldr r3, [r7, #4] + 802e7a0: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 802e7a4: b2db uxtb r3, r3 + 802e7a6: 2b02 cmp r3, #2 + 802e7a8: d004 beq.n 802e7b4 { /* No transfer ongoing */ hmdma->ErrorCode = HAL_MDMA_ERROR_NO_XFER; - 802e77a: 687b ldr r3, [r7, #4] - 802e77c: 2280 movs r2, #128 ; 0x80 - 802e77e: 669a str r2, [r3, #104] ; 0x68 + 802e7aa: 687b ldr r3, [r7, #4] + 802e7ac: 2280 movs r2, #128 ; 0x80 + 802e7ae: 669a str r2, [r3, #104] ; 0x68 return HAL_ERROR; - 802e780: 2301 movs r3, #1 - 802e782: e00c b.n 802e79e + 802e7b0: 2301 movs r3, #1 + 802e7b2: e00c b.n 802e7ce } else { /* Set Abort State */ hmdma->State = HAL_MDMA_STATE_ABORT; - 802e784: 687b ldr r3, [r7, #4] - 802e786: 2204 movs r2, #4 - 802e788: f883 203d strb.w r2, [r3, #61] ; 0x3d + 802e7b4: 687b ldr r3, [r7, #4] + 802e7b6: 2204 movs r2, #4 + 802e7b8: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Disable the stream */ __HAL_MDMA_DISABLE(hmdma); - 802e78c: 687b ldr r3, [r7, #4] - 802e78e: 681b ldr r3, [r3, #0] - 802e790: 68da ldr r2, [r3, #12] - 802e792: 687b ldr r3, [r7, #4] - 802e794: 681b ldr r3, [r3, #0] - 802e796: f022 0201 bic.w r2, r2, #1 - 802e79a: 60da str r2, [r3, #12] + 802e7bc: 687b ldr r3, [r7, #4] + 802e7be: 681b ldr r3, [r3, #0] + 802e7c0: 68da ldr r2, [r3, #12] + 802e7c2: 687b ldr r3, [r7, #4] + 802e7c4: 681b ldr r3, [r3, #0] + 802e7c6: f022 0201 bic.w r2, r2, #1 + 802e7ca: 60da str r2, [r3, #12] } return HAL_OK; - 802e79c: 2300 movs r3, #0 + 802e7cc: 2300 movs r3, #0 } - 802e79e: 4618 mov r0, r3 - 802e7a0: 370c adds r7, #12 - 802e7a2: 46bd mov sp, r7 - 802e7a4: f85d 7b04 ldr.w r7, [sp], #4 - 802e7a8: 4770 bx lr + 802e7ce: 4618 mov r0, r3 + 802e7d0: 370c adds r7, #12 + 802e7d2: 46bd mov sp, r7 + 802e7d4: f85d 7b04 ldr.w r7, [sp], #4 + 802e7d8: 4770 bx lr ... -0802e7ac : +0802e7dc : * PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS * regulator. * @retval HAL status. */ HAL_StatusTypeDef HAL_PWREx_ConfigSupply (uint32_t SupplySource) { - 802e7ac: b580 push {r7, lr} - 802e7ae: b084 sub sp, #16 - 802e7b0: af00 add r7, sp, #0 - 802e7b2: 6078 str r0, [r7, #4] + 802e7dc: b580 push {r7, lr} + 802e7de: b084 sub sp, #16 + 802e7e0: af00 add r7, sp, #0 + 802e7e2: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param (IS_PWR_SUPPLY (SupplySource)); /* Check if supply source was configured */ #if defined (PWR_FLAG_SCUEN) if (__HAL_PWR_GET_FLAG (PWR_FLAG_SCUEN) == 0U) - 802e7b4: 4b19 ldr r3, [pc, #100] ; (802e81c ) - 802e7b6: 68db ldr r3, [r3, #12] - 802e7b8: f003 0304 and.w r3, r3, #4 - 802e7bc: 2b04 cmp r3, #4 - 802e7be: d00a beq.n 802e7d6 + 802e7e4: 4b19 ldr r3, [pc, #100] ; (802e84c ) + 802e7e6: 68db ldr r3, [r3, #12] + 802e7e8: f003 0304 and.w r3, r3, #4 + 802e7ec: 2b04 cmp r3, #4 + 802e7ee: d00a beq.n 802e806 #else if ((PWR->CR3 & (PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)) != (PWR_CR3_SMPSEN | PWR_CR3_LDOEN)) #endif /* defined (PWR_FLAG_SCUEN) */ { /* Check supply configuration */ if ((PWR->CR3 & PWR_SUPPLY_CONFIG_MASK) != SupplySource) - 802e7c0: 4b16 ldr r3, [pc, #88] ; (802e81c ) - 802e7c2: 68db ldr r3, [r3, #12] - 802e7c4: f003 0307 and.w r3, r3, #7 - 802e7c8: 687a ldr r2, [r7, #4] - 802e7ca: 429a cmp r2, r3 - 802e7cc: d001 beq.n 802e7d2 + 802e7f0: 4b16 ldr r3, [pc, #88] ; (802e84c ) + 802e7f2: 68db ldr r3, [r3, #12] + 802e7f4: f003 0307 and.w r3, r3, #7 + 802e7f8: 687a ldr r2, [r7, #4] + 802e7fa: 429a cmp r2, r3 + 802e7fc: d001 beq.n 802e802 { /* Supply configuration update locked, can't apply a new supply config */ return HAL_ERROR; - 802e7ce: 2301 movs r3, #1 - 802e7d0: e01f b.n 802e812 + 802e7fe: 2301 movs r3, #1 + 802e800: e01f b.n 802e842 else { /* Supply configuration update locked, but new supply configuration matches with old supply configuration : nothing to do */ return HAL_OK; - 802e7d2: 2300 movs r3, #0 - 802e7d4: e01d b.n 802e812 + 802e802: 2300 movs r3, #0 + 802e804: e01d b.n 802e842 } } /* Set the power supply configuration */ MODIFY_REG (PWR->CR3, PWR_SUPPLY_CONFIG_MASK, SupplySource); - 802e7d6: 4b11 ldr r3, [pc, #68] ; (802e81c ) - 802e7d8: 68db ldr r3, [r3, #12] - 802e7da: f023 0207 bic.w r2, r3, #7 - 802e7de: 490f ldr r1, [pc, #60] ; (802e81c ) - 802e7e0: 687b ldr r3, [r7, #4] - 802e7e2: 4313 orrs r3, r2 - 802e7e4: 60cb str r3, [r1, #12] + 802e806: 4b11 ldr r3, [pc, #68] ; (802e84c ) + 802e808: 68db ldr r3, [r3, #12] + 802e80a: f023 0207 bic.w r2, r3, #7 + 802e80e: 490f ldr r1, [pc, #60] ; (802e84c ) + 802e810: 687b ldr r3, [r7, #4] + 802e812: 4313 orrs r3, r2 + 802e814: 60cb str r3, [r1, #12] /* Get tick */ tickstart = HAL_GetTick (); - 802e7e6: f7f7 fbd5 bl 8025f94 - 802e7ea: 60f8 str r0, [r7, #12] + 802e816: f7f7 fbd5 bl 8025fc4 + 802e81a: 60f8 str r0, [r7, #12] /* Wait till voltage level flag is set */ while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U) - 802e7ec: e009 b.n 802e802 + 802e81c: e009 b.n 802e832 { if ((HAL_GetTick () - tickstart) > PWR_FLAG_SETTING_DELAY) - 802e7ee: f7f7 fbd1 bl 8025f94 - 802e7f2: 4602 mov r2, r0 - 802e7f4: 68fb ldr r3, [r7, #12] - 802e7f6: 1ad3 subs r3, r2, r3 - 802e7f8: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 802e7fc: d901 bls.n 802e802 + 802e81e: f7f7 fbd1 bl 8025fc4 + 802e822: 4602 mov r2, r0 + 802e824: 68fb ldr r3, [r7, #12] + 802e826: 1ad3 subs r3, r2, r3 + 802e828: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 802e82c: d901 bls.n 802e832 { return HAL_ERROR; - 802e7fe: 2301 movs r3, #1 - 802e800: e007 b.n 802e812 + 802e82e: 2301 movs r3, #1 + 802e830: e007 b.n 802e842 while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U) - 802e802: 4b06 ldr r3, [pc, #24] ; (802e81c ) - 802e804: 685b ldr r3, [r3, #4] - 802e806: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 802e80a: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 802e80e: d1ee bne.n 802e7ee + 802e832: 4b06 ldr r3, [pc, #24] ; (802e84c ) + 802e834: 685b ldr r3, [r3, #4] + 802e836: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 802e83a: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 802e83e: d1ee bne.n 802e81e } } } #endif /* defined (SMPS) */ return HAL_OK; - 802e810: 2300 movs r3, #0 + 802e840: 2300 movs r3, #0 } - 802e812: 4618 mov r0, r3 - 802e814: 3710 adds r7, #16 - 802e816: 46bd mov sp, r7 - 802e818: bd80 pop {r7, pc} - 802e81a: bf00 nop - 802e81c: 58024800 .word 0x58024800 + 802e842: 4618 mov r0, r3 + 802e844: 3710 adds r7, #16 + 802e846: 46bd mov sp, r7 + 802e848: bd80 pop {r7, pc} + 802e84a: bf00 nop + 802e84c: 58024800 .word 0x58024800 -0802e820 : +0802e850 : * in the QSPI_InitTypeDef and initialize the associated handle. * @param hqspi QSPI handle * @retval HAL status */ HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi) { - 802e820: b580 push {r7, lr} - 802e822: b086 sub sp, #24 - 802e824: af02 add r7, sp, #8 - 802e826: 6078 str r0, [r7, #4] + 802e850: b580 push {r7, lr} + 802e852: b086 sub sp, #24 + 802e854: af02 add r7, sp, #8 + 802e856: 6078 str r0, [r7, #4] HAL_StatusTypeDef status; uint32_t tickstart = HAL_GetTick(); - 802e828: f7f7 fbb4 bl 8025f94 - 802e82c: 60f8 str r0, [r7, #12] + 802e858: f7f7 fbb4 bl 8025fc4 + 802e85c: 60f8 str r0, [r7, #12] /* Check the QSPI handle allocation */ if(hqspi == NULL) - 802e82e: 687b ldr r3, [r7, #4] - 802e830: 2b00 cmp r3, #0 - 802e832: d101 bne.n 802e838 + 802e85e: 687b ldr r3, [r7, #4] + 802e860: 2b00 cmp r3, #0 + 802e862: d101 bne.n 802e868 { return HAL_ERROR; - 802e834: 2301 movs r3, #1 - 802e836: e05f b.n 802e8f8 + 802e864: 2301 movs r3, #1 + 802e866: e05f b.n 802e928 if (hqspi->Init.DualFlash != QSPI_DUALFLASH_ENABLE ) { assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID)); } if(hqspi->State == HAL_QSPI_STATE_RESET) - 802e838: 687b ldr r3, [r7, #4] - 802e83a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e83e: b2db uxtb r3, r3 - 802e840: 2b00 cmp r3, #0 - 802e842: d107 bne.n 802e854 + 802e868: 687b ldr r3, [r7, #4] + 802e86a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e86e: b2db uxtb r3, r3 + 802e870: 2b00 cmp r3, #0 + 802e872: d107 bne.n 802e884 /* Init the low level hardware */ hqspi->MspInitCallback(hqspi); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_QSPI_MspInit(hqspi); - 802e844: 6878 ldr r0, [r7, #4] - 802e846: f7f5 fd8b bl 8024360 + 802e874: 6878 ldr r0, [r7, #4] + 802e876: f7f5 fd8b bl 8024390 #endif /* Configure the default timeout for the QSPI memory access */ HAL_QSPI_SetTimeout(hqspi, HAL_QSPI_TIMEOUT_DEFAULT_VALUE); - 802e84a: f241 3188 movw r1, #5000 ; 0x1388 - 802e84e: 6878 ldr r0, [r7, #4] - 802e850: f000 fa64 bl 802ed1c + 802e87a: f241 3188 movw r1, #5000 ; 0x1388 + 802e87e: 6878 ldr r0, [r7, #4] + 802e880: f000 fa64 bl 802ed4c } /* Configure QSPI FIFO Threshold */ MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, - 802e854: 687b ldr r3, [r7, #4] - 802e856: 681b ldr r3, [r3, #0] - 802e858: 681b ldr r3, [r3, #0] - 802e85a: f423 6170 bic.w r1, r3, #3840 ; 0xf00 - 802e85e: 687b ldr r3, [r7, #4] - 802e860: 689b ldr r3, [r3, #8] - 802e862: 3b01 subs r3, #1 - 802e864: 021a lsls r2, r3, #8 - 802e866: 687b ldr r3, [r7, #4] - 802e868: 681b ldr r3, [r3, #0] - 802e86a: 430a orrs r2, r1 - 802e86c: 601a str r2, [r3, #0] + 802e884: 687b ldr r3, [r7, #4] + 802e886: 681b ldr r3, [r3, #0] + 802e888: 681b ldr r3, [r3, #0] + 802e88a: f423 6170 bic.w r1, r3, #3840 ; 0xf00 + 802e88e: 687b ldr r3, [r7, #4] + 802e890: 689b ldr r3, [r3, #8] + 802e892: 3b01 subs r3, #1 + 802e894: 021a lsls r2, r3, #8 + 802e896: 687b ldr r3, [r7, #4] + 802e898: 681b ldr r3, [r3, #0] + 802e89a: 430a orrs r2, r1 + 802e89c: 601a str r2, [r3, #0] ((hqspi->Init.FifoThreshold - 1U) << QUADSPI_CR_FTHRES_Pos)); /* Wait till BUSY flag reset */ status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); - 802e86e: 687b ldr r3, [r7, #4] - 802e870: 6c9b ldr r3, [r3, #72] ; 0x48 - 802e872: 9300 str r3, [sp, #0] - 802e874: 68fb ldr r3, [r7, #12] - 802e876: 2200 movs r2, #0 - 802e878: 2120 movs r1, #32 - 802e87a: 6878 ldr r0, [r7, #4] - 802e87c: f000 fa8f bl 802ed9e - 802e880: 4603 mov r3, r0 - 802e882: 72fb strb r3, [r7, #11] + 802e89e: 687b ldr r3, [r7, #4] + 802e8a0: 6c9b ldr r3, [r3, #72] ; 0x48 + 802e8a2: 9300 str r3, [sp, #0] + 802e8a4: 68fb ldr r3, [r7, #12] + 802e8a6: 2200 movs r2, #0 + 802e8a8: 2120 movs r1, #32 + 802e8aa: 6878 ldr r0, [r7, #4] + 802e8ac: f000 fa8f bl 802edce + 802e8b0: 4603 mov r3, r0 + 802e8b2: 72fb strb r3, [r7, #11] if(status == HAL_OK) - 802e884: 7afb ldrb r3, [r7, #11] - 802e886: 2b00 cmp r3, #0 - 802e888: d135 bne.n 802e8f6 + 802e8b4: 7afb ldrb r3, [r7, #11] + 802e8b6: 2b00 cmp r3, #0 + 802e8b8: d135 bne.n 802e926 { /* Configure QSPI Clock Prescaler and Sample Shift */ MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT | QUADSPI_CR_FSEL | QUADSPI_CR_DFM), - 802e88a: 687b ldr r3, [r7, #4] - 802e88c: 681b ldr r3, [r3, #0] - 802e88e: 681a ldr r2, [r3, #0] - 802e890: 4b1b ldr r3, [pc, #108] ; (802e900 ) - 802e892: 4013 ands r3, r2 - 802e894: 687a ldr r2, [r7, #4] - 802e896: 6852 ldr r2, [r2, #4] - 802e898: 0611 lsls r1, r2, #24 - 802e89a: 687a ldr r2, [r7, #4] - 802e89c: 68d2 ldr r2, [r2, #12] - 802e89e: 4311 orrs r1, r2 - 802e8a0: 687a ldr r2, [r7, #4] - 802e8a2: 69d2 ldr r2, [r2, #28] - 802e8a4: 4311 orrs r1, r2 - 802e8a6: 687a ldr r2, [r7, #4] - 802e8a8: 6a12 ldr r2, [r2, #32] - 802e8aa: 4311 orrs r1, r2 - 802e8ac: 687a ldr r2, [r7, #4] - 802e8ae: 6812 ldr r2, [r2, #0] - 802e8b0: 430b orrs r3, r1 - 802e8b2: 6013 str r3, [r2, #0] + 802e8ba: 687b ldr r3, [r7, #4] + 802e8bc: 681b ldr r3, [r3, #0] + 802e8be: 681a ldr r2, [r3, #0] + 802e8c0: 4b1b ldr r3, [pc, #108] ; (802e930 ) + 802e8c2: 4013 ands r3, r2 + 802e8c4: 687a ldr r2, [r7, #4] + 802e8c6: 6852 ldr r2, [r2, #4] + 802e8c8: 0611 lsls r1, r2, #24 + 802e8ca: 687a ldr r2, [r7, #4] + 802e8cc: 68d2 ldr r2, [r2, #12] + 802e8ce: 4311 orrs r1, r2 + 802e8d0: 687a ldr r2, [r7, #4] + 802e8d2: 69d2 ldr r2, [r2, #28] + 802e8d4: 4311 orrs r1, r2 + 802e8d6: 687a ldr r2, [r7, #4] + 802e8d8: 6a12 ldr r2, [r2, #32] + 802e8da: 4311 orrs r1, r2 + 802e8dc: 687a ldr r2, [r7, #4] + 802e8de: 6812 ldr r2, [r2, #0] + 802e8e0: 430b orrs r3, r1 + 802e8e2: 6013 str r3, [r2, #0] ((hqspi->Init.ClockPrescaler << QUADSPI_CR_PRESCALER_Pos) | hqspi->Init.SampleShifting | hqspi->Init.FlashID | hqspi->Init.DualFlash)); /* Configure QSPI Flash Size, CS High Time and Clock Mode */ MODIFY_REG(hqspi->Instance->DCR, (QUADSPI_DCR_FSIZE | QUADSPI_DCR_CSHT | QUADSPI_DCR_CKMODE), - 802e8b4: 687b ldr r3, [r7, #4] - 802e8b6: 681b ldr r3, [r3, #0] - 802e8b8: 685a ldr r2, [r3, #4] - 802e8ba: 4b12 ldr r3, [pc, #72] ; (802e904 ) - 802e8bc: 4013 ands r3, r2 - 802e8be: 687a ldr r2, [r7, #4] - 802e8c0: 6912 ldr r2, [r2, #16] - 802e8c2: 0411 lsls r1, r2, #16 - 802e8c4: 687a ldr r2, [r7, #4] - 802e8c6: 6952 ldr r2, [r2, #20] - 802e8c8: 4311 orrs r1, r2 - 802e8ca: 687a ldr r2, [r7, #4] - 802e8cc: 6992 ldr r2, [r2, #24] - 802e8ce: 4311 orrs r1, r2 - 802e8d0: 687a ldr r2, [r7, #4] - 802e8d2: 6812 ldr r2, [r2, #0] - 802e8d4: 430b orrs r3, r1 - 802e8d6: 6053 str r3, [r2, #4] + 802e8e4: 687b ldr r3, [r7, #4] + 802e8e6: 681b ldr r3, [r3, #0] + 802e8e8: 685a ldr r2, [r3, #4] + 802e8ea: 4b12 ldr r3, [pc, #72] ; (802e934 ) + 802e8ec: 4013 ands r3, r2 + 802e8ee: 687a ldr r2, [r7, #4] + 802e8f0: 6912 ldr r2, [r2, #16] + 802e8f2: 0411 lsls r1, r2, #16 + 802e8f4: 687a ldr r2, [r7, #4] + 802e8f6: 6952 ldr r2, [r2, #20] + 802e8f8: 4311 orrs r1, r2 + 802e8fa: 687a ldr r2, [r7, #4] + 802e8fc: 6992 ldr r2, [r2, #24] + 802e8fe: 4311 orrs r1, r2 + 802e900: 687a ldr r2, [r7, #4] + 802e902: 6812 ldr r2, [r2, #0] + 802e904: 430b orrs r3, r1 + 802e906: 6053 str r3, [r2, #4] ((hqspi->Init.FlashSize << QUADSPI_DCR_FSIZE_Pos) | hqspi->Init.ChipSelectHighTime | hqspi->Init.ClockMode)); /* Enable the QSPI peripheral */ __HAL_QSPI_ENABLE(hqspi); - 802e8d8: 687b ldr r3, [r7, #4] - 802e8da: 681b ldr r3, [r3, #0] - 802e8dc: 681a ldr r2, [r3, #0] - 802e8de: 687b ldr r3, [r7, #4] - 802e8e0: 681b ldr r3, [r3, #0] - 802e8e2: f042 0201 orr.w r2, r2, #1 - 802e8e6: 601a str r2, [r3, #0] + 802e908: 687b ldr r3, [r7, #4] + 802e90a: 681b ldr r3, [r3, #0] + 802e90c: 681a ldr r2, [r3, #0] + 802e90e: 687b ldr r3, [r7, #4] + 802e910: 681b ldr r3, [r3, #0] + 802e912: f042 0201 orr.w r2, r2, #1 + 802e916: 601a str r2, [r3, #0] /* Set QSPI error code to none */ hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; - 802e8e8: 687b ldr r3, [r7, #4] - 802e8ea: 2200 movs r2, #0 - 802e8ec: 645a str r2, [r3, #68] ; 0x44 + 802e918: 687b ldr r3, [r7, #4] + 802e91a: 2200 movs r2, #0 + 802e91c: 645a str r2, [r3, #68] ; 0x44 /* Initialize the QSPI state */ hqspi->State = HAL_QSPI_STATE_READY; - 802e8ee: 687b ldr r3, [r7, #4] - 802e8f0: 2201 movs r2, #1 - 802e8f2: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e91e: 687b ldr r3, [r7, #4] + 802e920: 2201 movs r2, #1 + 802e922: f883 2041 strb.w r2, [r3, #65] ; 0x41 } /* Return function status */ return status; - 802e8f6: 7afb ldrb r3, [r7, #11] + 802e926: 7afb ldrb r3, [r7, #11] } - 802e8f8: 4618 mov r0, r3 - 802e8fa: 3710 adds r7, #16 - 802e8fc: 46bd mov sp, r7 - 802e8fe: bd80 pop {r7, pc} - 802e900: 00ffff2f .word 0x00ffff2f - 802e904: ffe0f8fe .word 0xffe0f8fe + 802e928: 4618 mov r0, r3 + 802e92a: 3710 adds r7, #16 + 802e92c: 46bd mov sp, r7 + 802e92e: bd80 pop {r7, pc} + 802e930: 00ffff2f .word 0x00ffff2f + 802e934: ffe0f8fe .word 0xffe0f8fe -0802e908 : +0802e938 : * @brief Handle QSPI interrupt request. * @param hqspi QSPI handle * @retval None */ void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) { - 802e908: b580 push {r7, lr} - 802e90a: b086 sub sp, #24 - 802e90c: af00 add r7, sp, #0 - 802e90e: 6078 str r0, [r7, #4] + 802e938: b580 push {r7, lr} + 802e93a: b086 sub sp, #24 + 802e93c: af00 add r7, sp, #0 + 802e93e: 6078 str r0, [r7, #4] __IO uint32_t *data_reg; uint32_t flag = READ_REG(hqspi->Instance->SR); - 802e910: 687b ldr r3, [r7, #4] - 802e912: 681b ldr r3, [r3, #0] - 802e914: 689b ldr r3, [r3, #8] - 802e916: 617b str r3, [r7, #20] + 802e940: 687b ldr r3, [r7, #4] + 802e942: 681b ldr r3, [r3, #0] + 802e944: 689b ldr r3, [r3, #8] + 802e946: 617b str r3, [r7, #20] uint32_t itsource = READ_REG(hqspi->Instance->CR); - 802e918: 687b ldr r3, [r7, #4] - 802e91a: 681b ldr r3, [r3, #0] - 802e91c: 681b ldr r3, [r3, #0] - 802e91e: 613b str r3, [r7, #16] + 802e948: 687b ldr r3, [r7, #4] + 802e94a: 681b ldr r3, [r3, #0] + 802e94c: 681b ldr r3, [r3, #0] + 802e94e: 613b str r3, [r7, #16] /* QSPI Fifo Threshold interrupt occurred ----------------------------------*/ if(((flag & QSPI_FLAG_FT) != 0U) && ((itsource & QSPI_IT_FT) != 0U)) - 802e920: 697b ldr r3, [r7, #20] - 802e922: f003 0304 and.w r3, r3, #4 - 802e926: 2b00 cmp r3, #0 - 802e928: d064 beq.n 802e9f4 - 802e92a: 693b ldr r3, [r7, #16] - 802e92c: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 802e930: 2b00 cmp r3, #0 - 802e932: d05f beq.n 802e9f4 + 802e950: 697b ldr r3, [r7, #20] + 802e952: f003 0304 and.w r3, r3, #4 + 802e956: 2b00 cmp r3, #0 + 802e958: d064 beq.n 802ea24 + 802e95a: 693b ldr r3, [r7, #16] + 802e95c: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 802e960: 2b00 cmp r3, #0 + 802e962: d05f beq.n 802ea24 { data_reg = &hqspi->Instance->DR; - 802e934: 687b ldr r3, [r7, #4] - 802e936: 681b ldr r3, [r3, #0] - 802e938: 3320 adds r3, #32 - 802e93a: 60fb str r3, [r7, #12] + 802e964: 687b ldr r3, [r7, #4] + 802e966: 681b ldr r3, [r3, #0] + 802e968: 3320 adds r3, #32 + 802e96a: 60fb str r3, [r7, #12] if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802e93c: 687b ldr r3, [r7, #4] - 802e93e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e942: b2db uxtb r3, r3 - 802e944: 2b12 cmp r3, #18 - 802e946: d125 bne.n 802e994 + 802e96c: 687b ldr r3, [r7, #4] + 802e96e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e972: b2db uxtb r3, r3 + 802e974: 2b12 cmp r3, #18 + 802e976: d125 bne.n 802e9c4 { /* Transmission process */ while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) - 802e948: e01c b.n 802e984 + 802e978: e01c b.n 802e9b4 { if (hqspi->TxXferCount > 0U) - 802e94a: 687b ldr r3, [r7, #4] - 802e94c: 6adb ldr r3, [r3, #44] ; 0x2c - 802e94e: 2b00 cmp r3, #0 - 802e950: d00f beq.n 802e972 + 802e97a: 687b ldr r3, [r7, #4] + 802e97c: 6adb ldr r3, [r3, #44] ; 0x2c + 802e97e: 2b00 cmp r3, #0 + 802e980: d00f beq.n 802e9a2 { /* Fill the FIFO until the threshold is reached */ *((__IO uint8_t *)data_reg) = *hqspi->pTxBuffPtr; - 802e952: 687b ldr r3, [r7, #4] - 802e954: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e956: 781a ldrb r2, [r3, #0] - 802e958: 68fb ldr r3, [r7, #12] - 802e95a: 701a strb r2, [r3, #0] + 802e982: 687b ldr r3, [r7, #4] + 802e984: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e986: 781a ldrb r2, [r3, #0] + 802e988: 68fb ldr r3, [r7, #12] + 802e98a: 701a strb r2, [r3, #0] hqspi->pTxBuffPtr++; - 802e95c: 687b ldr r3, [r7, #4] - 802e95e: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e960: 1c5a adds r2, r3, #1 - 802e962: 687b ldr r3, [r7, #4] - 802e964: 625a str r2, [r3, #36] ; 0x24 + 802e98c: 687b ldr r3, [r7, #4] + 802e98e: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e990: 1c5a adds r2, r3, #1 + 802e992: 687b ldr r3, [r7, #4] + 802e994: 625a str r2, [r3, #36] ; 0x24 hqspi->TxXferCount--; - 802e966: 687b ldr r3, [r7, #4] - 802e968: 6adb ldr r3, [r3, #44] ; 0x2c - 802e96a: 1e5a subs r2, r3, #1 - 802e96c: 687b ldr r3, [r7, #4] - 802e96e: 62da str r2, [r3, #44] ; 0x2c - 802e970: e008 b.n 802e984 + 802e996: 687b ldr r3, [r7, #4] + 802e998: 6adb ldr r3, [r3, #44] ; 0x2c + 802e99a: 1e5a subs r2, r3, #1 + 802e99c: 687b ldr r3, [r7, #4] + 802e99e: 62da str r2, [r3, #44] ; 0x2c + 802e9a0: e008 b.n 802e9b4 } else { /* No more data available for the transfer */ /* Disable the QSPI FIFO Threshold Interrupt */ __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT); - 802e972: 687b ldr r3, [r7, #4] - 802e974: 681b ldr r3, [r3, #0] - 802e976: 681a ldr r2, [r3, #0] - 802e978: 687b ldr r3, [r7, #4] - 802e97a: 681b ldr r3, [r3, #0] - 802e97c: f422 2280 bic.w r2, r2, #262144 ; 0x40000 - 802e980: 601a str r2, [r3, #0] + 802e9a2: 687b ldr r3, [r7, #4] + 802e9a4: 681b ldr r3, [r3, #0] + 802e9a6: 681a ldr r2, [r3, #0] + 802e9a8: 687b ldr r3, [r7, #4] + 802e9aa: 681b ldr r3, [r3, #0] + 802e9ac: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 802e9b0: 601a str r2, [r3, #0] break; - 802e982: e033 b.n 802e9ec + 802e9b2: e033 b.n 802ea1c while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) - 802e984: 687b ldr r3, [r7, #4] - 802e986: 681b ldr r3, [r3, #0] - 802e988: 689b ldr r3, [r3, #8] - 802e98a: f003 0304 and.w r3, r3, #4 - 802e98e: 2b00 cmp r3, #0 - 802e990: d1db bne.n 802e94a - 802e992: e02b b.n 802e9ec + 802e9b4: 687b ldr r3, [r7, #4] + 802e9b6: 681b ldr r3, [r3, #0] + 802e9b8: 689b ldr r3, [r3, #8] + 802e9ba: f003 0304 and.w r3, r3, #4 + 802e9be: 2b00 cmp r3, #0 + 802e9c0: d1db bne.n 802e97a + 802e9c2: e02b b.n 802ea1c } } } else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) - 802e994: 687b ldr r3, [r7, #4] - 802e996: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e99a: b2db uxtb r3, r3 - 802e99c: 2b22 cmp r3, #34 ; 0x22 - 802e99e: d125 bne.n 802e9ec + 802e9c4: 687b ldr r3, [r7, #4] + 802e9c6: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e9ca: b2db uxtb r3, r3 + 802e9cc: 2b22 cmp r3, #34 ; 0x22 + 802e9ce: d125 bne.n 802ea1c { /* Receiving Process */ while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) - 802e9a0: e01d b.n 802e9de + 802e9d0: e01d b.n 802ea0e { if (hqspi->RxXferCount > 0U) - 802e9a2: 687b ldr r3, [r7, #4] - 802e9a4: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e9a6: 2b00 cmp r3, #0 - 802e9a8: d010 beq.n 802e9cc + 802e9d2: 687b ldr r3, [r7, #4] + 802e9d4: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e9d6: 2b00 cmp r3, #0 + 802e9d8: d010 beq.n 802e9fc { /* Read the FIFO until the threshold is reached */ *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg); - 802e9aa: 687b ldr r3, [r7, #4] - 802e9ac: 6b1b ldr r3, [r3, #48] ; 0x30 - 802e9ae: 68fa ldr r2, [r7, #12] - 802e9b0: 7812 ldrb r2, [r2, #0] - 802e9b2: b2d2 uxtb r2, r2 - 802e9b4: 701a strb r2, [r3, #0] + 802e9da: 687b ldr r3, [r7, #4] + 802e9dc: 6b1b ldr r3, [r3, #48] ; 0x30 + 802e9de: 68fa ldr r2, [r7, #12] + 802e9e0: 7812 ldrb r2, [r2, #0] + 802e9e2: b2d2 uxtb r2, r2 + 802e9e4: 701a strb r2, [r3, #0] hqspi->pRxBuffPtr++; - 802e9b6: 687b ldr r3, [r7, #4] - 802e9b8: 6b1b ldr r3, [r3, #48] ; 0x30 - 802e9ba: 1c5a adds r2, r3, #1 - 802e9bc: 687b ldr r3, [r7, #4] - 802e9be: 631a str r2, [r3, #48] ; 0x30 + 802e9e6: 687b ldr r3, [r7, #4] + 802e9e8: 6b1b ldr r3, [r3, #48] ; 0x30 + 802e9ea: 1c5a adds r2, r3, #1 + 802e9ec: 687b ldr r3, [r7, #4] + 802e9ee: 631a str r2, [r3, #48] ; 0x30 hqspi->RxXferCount--; - 802e9c0: 687b ldr r3, [r7, #4] - 802e9c2: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e9c4: 1e5a subs r2, r3, #1 - 802e9c6: 687b ldr r3, [r7, #4] - 802e9c8: 639a str r2, [r3, #56] ; 0x38 - 802e9ca: e008 b.n 802e9de + 802e9f0: 687b ldr r3, [r7, #4] + 802e9f2: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e9f4: 1e5a subs r2, r3, #1 + 802e9f6: 687b ldr r3, [r7, #4] + 802e9f8: 639a str r2, [r3, #56] ; 0x38 + 802e9fa: e008 b.n 802ea0e } else { /* All data have been received for the transfer */ /* Disable the QSPI FIFO Threshold Interrupt */ __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT); - 802e9cc: 687b ldr r3, [r7, #4] - 802e9ce: 681b ldr r3, [r3, #0] - 802e9d0: 681a ldr r2, [r3, #0] - 802e9d2: 687b ldr r3, [r7, #4] - 802e9d4: 681b ldr r3, [r3, #0] - 802e9d6: f422 2280 bic.w r2, r2, #262144 ; 0x40000 - 802e9da: 601a str r2, [r3, #0] + 802e9fc: 687b ldr r3, [r7, #4] + 802e9fe: 681b ldr r3, [r3, #0] + 802ea00: 681a ldr r2, [r3, #0] + 802ea02: 687b ldr r3, [r7, #4] + 802ea04: 681b ldr r3, [r3, #0] + 802ea06: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 802ea0a: 601a str r2, [r3, #0] break; - 802e9dc: e006 b.n 802e9ec + 802ea0c: e006 b.n 802ea1c while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) - 802e9de: 687b ldr r3, [r7, #4] - 802e9e0: 681b ldr r3, [r3, #0] - 802e9e2: 689b ldr r3, [r3, #8] - 802e9e4: f003 0304 and.w r3, r3, #4 - 802e9e8: 2b00 cmp r3, #0 - 802e9ea: d1da bne.n 802e9a2 + 802ea0e: 687b ldr r3, [r7, #4] + 802ea10: 681b ldr r3, [r3, #0] + 802ea12: 689b ldr r3, [r3, #8] + 802ea14: f003 0304 and.w r3, r3, #4 + 802ea18: 2b00 cmp r3, #0 + 802ea1a: d1da bne.n 802e9d2 /* FIFO Threshold callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->FifoThresholdCallback(hqspi); #else HAL_QSPI_FifoThresholdCallback(hqspi); - 802e9ec: 6878 ldr r0, [r7, #4] - 802e9ee: f000 f977 bl 802ece0 - 802e9f2: e13c b.n 802ec6e + 802ea1c: 6878 ldr r0, [r7, #4] + 802ea1e: f000 f977 bl 802ed10 + 802ea22: e13c b.n 802ec9e #endif } /* QSPI Transfer Complete interrupt occurred -------------------------------*/ else if(((flag & QSPI_FLAG_TC) != 0U) && ((itsource & QSPI_IT_TC) != 0U)) - 802e9f4: 697b ldr r3, [r7, #20] - 802e9f6: f003 0302 and.w r3, r3, #2 - 802e9fa: 2b00 cmp r3, #0 - 802e9fc: f000 80b0 beq.w 802eb60 - 802ea00: 693b ldr r3, [r7, #16] - 802ea02: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802ea06: 2b00 cmp r3, #0 - 802ea08: f000 80aa beq.w 802eb60 + 802ea24: 697b ldr r3, [r7, #20] + 802ea26: f003 0302 and.w r3, r3, #2 + 802ea2a: 2b00 cmp r3, #0 + 802ea2c: f000 80b0 beq.w 802eb90 + 802ea30: 693b ldr r3, [r7, #16] + 802ea32: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802ea36: 2b00 cmp r3, #0 + 802ea38: f000 80aa beq.w 802eb90 { /* Clear interrupt */ WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TC); - 802ea0c: 687b ldr r3, [r7, #4] - 802ea0e: 681b ldr r3, [r3, #0] - 802ea10: 2202 movs r2, #2 - 802ea12: 60da str r2, [r3, #12] + 802ea3c: 687b ldr r3, [r7, #4] + 802ea3e: 681b ldr r3, [r3, #0] + 802ea40: 2202 movs r2, #2 + 802ea42: 60da str r2, [r3, #12] /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */ __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); - 802ea14: 687b ldr r3, [r7, #4] - 802ea16: 681b ldr r3, [r3, #0] - 802ea18: 681a ldr r2, [r3, #0] - 802ea1a: 687b ldr r3, [r7, #4] - 802ea1c: 681b ldr r3, [r3, #0] - 802ea1e: f422 22e0 bic.w r2, r2, #458752 ; 0x70000 - 802ea22: 601a str r2, [r3, #0] + 802ea44: 687b ldr r3, [r7, #4] + 802ea46: 681b ldr r3, [r3, #0] + 802ea48: 681a ldr r2, [r3, #0] + 802ea4a: 687b ldr r3, [r7, #4] + 802ea4c: 681b ldr r3, [r3, #0] + 802ea4e: f422 22e0 bic.w r2, r2, #458752 ; 0x70000 + 802ea52: 601a str r2, [r3, #0] /* Transfer complete callback */ if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802ea24: 687b ldr r3, [r7, #4] - 802ea26: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802ea2a: b2db uxtb r3, r3 - 802ea2c: 2b12 cmp r3, #18 - 802ea2e: d120 bne.n 802ea72 + 802ea54: 687b ldr r3, [r7, #4] + 802ea56: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802ea5a: b2db uxtb r3, r3 + 802ea5c: 2b12 cmp r3, #18 + 802ea5e: d120 bne.n 802eaa2 { if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ea30: 687b ldr r3, [r7, #4] - 802ea32: 681b ldr r3, [r3, #0] - 802ea34: 681b ldr r3, [r3, #0] - 802ea36: f003 0304 and.w r3, r3, #4 - 802ea3a: 2b00 cmp r3, #0 - 802ea3c: d011 beq.n 802ea62 + 802ea60: 687b ldr r3, [r7, #4] + 802ea62: 681b ldr r3, [r3, #0] + 802ea64: 681b ldr r3, [r3, #0] + 802ea66: f003 0304 and.w r3, r3, #4 + 802ea6a: 2b00 cmp r3, #0 + 802ea6c: d011 beq.n 802ea92 { /* Disable using MDMA by clearing DMAEN, note that DMAEN bit is "reserved" but no impact on H7 HW and it minimize the cost in the footprint */ CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); - 802ea3e: 687b ldr r3, [r7, #4] - 802ea40: 681b ldr r3, [r3, #0] - 802ea42: 681a ldr r2, [r3, #0] - 802ea44: 687b ldr r3, [r7, #4] - 802ea46: 681b ldr r3, [r3, #0] - 802ea48: f022 0204 bic.w r2, r2, #4 - 802ea4c: 601a str r2, [r3, #0] + 802ea6e: 687b ldr r3, [r7, #4] + 802ea70: 681b ldr r3, [r3, #0] + 802ea72: 681a ldr r2, [r3, #0] + 802ea74: 687b ldr r3, [r7, #4] + 802ea76: 681b ldr r3, [r3, #0] + 802ea78: f022 0204 bic.w r2, r2, #4 + 802ea7c: 601a str r2, [r3, #0] /* Disable the MDMA channel */ __HAL_MDMA_DISABLE(hqspi->hmdma); - 802ea4e: 687b ldr r3, [r7, #4] - 802ea50: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ea52: 681b ldr r3, [r3, #0] - 802ea54: 68da ldr r2, [r3, #12] - 802ea56: 687b ldr r3, [r7, #4] - 802ea58: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ea5a: 681b ldr r3, [r3, #0] - 802ea5c: f022 0201 bic.w r2, r2, #1 - 802ea60: 60da str r2, [r3, #12] + 802ea7e: 687b ldr r3, [r7, #4] + 802ea80: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ea82: 681b ldr r3, [r3, #0] + 802ea84: 68da ldr r2, [r3, #12] + 802ea86: 687b ldr r3, [r7, #4] + 802ea88: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ea8a: 681b ldr r3, [r3, #0] + 802ea8c: f022 0201 bic.w r2, r2, #1 + 802ea90: 60da str r2, [r3, #12] } /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802ea62: 687b ldr r3, [r7, #4] - 802ea64: 2201 movs r2, #1 - 802ea66: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ea92: 687b ldr r3, [r7, #4] + 802ea94: 2201 movs r2, #1 + 802ea96: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* TX Complete callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->TxCpltCallback(hqspi); #else HAL_QSPI_TxCpltCallback(hqspi); - 802ea6a: 6878 ldr r0, [r7, #4] - 802ea6c: f000 f92e bl 802eccc + 802ea9a: 6878 ldr r0, [r7, #4] + 802ea9c: f000 f92e bl 802ecfc if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802ea70: e0fa b.n 802ec68 + 802eaa0: e0fa b.n 802ec98 #endif } else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) - 802ea72: 687b ldr r3, [r7, #4] - 802ea74: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802ea78: b2db uxtb r3, r3 - 802ea7a: 2b22 cmp r3, #34 ; 0x22 - 802ea7c: d143 bne.n 802eb06 + 802eaa2: 687b ldr r3, [r7, #4] + 802eaa4: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802eaa8: b2db uxtb r3, r3 + 802eaaa: 2b22 cmp r3, #34 ; 0x22 + 802eaac: d143 bne.n 802eb36 { if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ea7e: 687b ldr r3, [r7, #4] - 802ea80: 681b ldr r3, [r3, #0] - 802ea82: 681b ldr r3, [r3, #0] - 802ea84: f003 0304 and.w r3, r3, #4 - 802ea88: 2b00 cmp r3, #0 - 802ea8a: d012 beq.n 802eab2 + 802eaae: 687b ldr r3, [r7, #4] + 802eab0: 681b ldr r3, [r3, #0] + 802eab2: 681b ldr r3, [r3, #0] + 802eab4: f003 0304 and.w r3, r3, #4 + 802eab8: 2b00 cmp r3, #0 + 802eaba: d012 beq.n 802eae2 { /* Disable using MDMA by clearing DMAEN, note that DMAEN bit is "reserved" but no impact on H7 HW and it minimize the cost in the footprint */ CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); - 802ea8c: 687b ldr r3, [r7, #4] - 802ea8e: 681b ldr r3, [r3, #0] - 802ea90: 681a ldr r2, [r3, #0] - 802ea92: 687b ldr r3, [r7, #4] - 802ea94: 681b ldr r3, [r3, #0] - 802ea96: f022 0204 bic.w r2, r2, #4 - 802ea9a: 601a str r2, [r3, #0] + 802eabc: 687b ldr r3, [r7, #4] + 802eabe: 681b ldr r3, [r3, #0] + 802eac0: 681a ldr r2, [r3, #0] + 802eac2: 687b ldr r3, [r7, #4] + 802eac4: 681b ldr r3, [r3, #0] + 802eac6: f022 0204 bic.w r2, r2, #4 + 802eaca: 601a str r2, [r3, #0] /* Disable the MDMA channel */ __HAL_MDMA_DISABLE(hqspi->hmdma); - 802ea9c: 687b ldr r3, [r7, #4] - 802ea9e: 6bdb ldr r3, [r3, #60] ; 0x3c - 802eaa0: 681b ldr r3, [r3, #0] - 802eaa2: 68da ldr r2, [r3, #12] - 802eaa4: 687b ldr r3, [r7, #4] - 802eaa6: 6bdb ldr r3, [r3, #60] ; 0x3c - 802eaa8: 681b ldr r3, [r3, #0] - 802eaaa: f022 0201 bic.w r2, r2, #1 - 802eaae: 60da str r2, [r3, #12] - 802eab0: e021 b.n 802eaf6 + 802eacc: 687b ldr r3, [r7, #4] + 802eace: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ead0: 681b ldr r3, [r3, #0] + 802ead2: 68da ldr r2, [r3, #12] + 802ead4: 687b ldr r3, [r7, #4] + 802ead6: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ead8: 681b ldr r3, [r3, #0] + 802eada: f022 0201 bic.w r2, r2, #1 + 802eade: 60da str r2, [r3, #12] + 802eae0: e021 b.n 802eb26 } else { data_reg = &hqspi->Instance->DR; - 802eab2: 687b ldr r3, [r7, #4] - 802eab4: 681b ldr r3, [r3, #0] - 802eab6: 3320 adds r3, #32 - 802eab8: 60fb str r3, [r7, #12] + 802eae2: 687b ldr r3, [r7, #4] + 802eae4: 681b ldr r3, [r3, #0] + 802eae6: 3320 adds r3, #32 + 802eae8: 60fb str r3, [r7, #12] while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0U) - 802eaba: e013 b.n 802eae4 + 802eaea: e013 b.n 802eb14 { if (hqspi->RxXferCount > 0U) - 802eabc: 687b ldr r3, [r7, #4] - 802eabe: 6b9b ldr r3, [r3, #56] ; 0x38 - 802eac0: 2b00 cmp r3, #0 - 802eac2: d017 beq.n 802eaf4 + 802eaec: 687b ldr r3, [r7, #4] + 802eaee: 6b9b ldr r3, [r3, #56] ; 0x38 + 802eaf0: 2b00 cmp r3, #0 + 802eaf2: d017 beq.n 802eb24 { /* Read the last data received in the FIFO until it is empty */ *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg); - 802eac4: 687b ldr r3, [r7, #4] - 802eac6: 6b1b ldr r3, [r3, #48] ; 0x30 - 802eac8: 68fa ldr r2, [r7, #12] - 802eaca: 7812 ldrb r2, [r2, #0] - 802eacc: b2d2 uxtb r2, r2 - 802eace: 701a strb r2, [r3, #0] + 802eaf4: 687b ldr r3, [r7, #4] + 802eaf6: 6b1b ldr r3, [r3, #48] ; 0x30 + 802eaf8: 68fa ldr r2, [r7, #12] + 802eafa: 7812 ldrb r2, [r2, #0] + 802eafc: b2d2 uxtb r2, r2 + 802eafe: 701a strb r2, [r3, #0] hqspi->pRxBuffPtr++; - 802ead0: 687b ldr r3, [r7, #4] - 802ead2: 6b1b ldr r3, [r3, #48] ; 0x30 - 802ead4: 1c5a adds r2, r3, #1 - 802ead6: 687b ldr r3, [r7, #4] - 802ead8: 631a str r2, [r3, #48] ; 0x30 + 802eb00: 687b ldr r3, [r7, #4] + 802eb02: 6b1b ldr r3, [r3, #48] ; 0x30 + 802eb04: 1c5a adds r2, r3, #1 + 802eb06: 687b ldr r3, [r7, #4] + 802eb08: 631a str r2, [r3, #48] ; 0x30 hqspi->RxXferCount--; - 802eada: 687b ldr r3, [r7, #4] - 802eadc: 6b9b ldr r3, [r3, #56] ; 0x38 - 802eade: 1e5a subs r2, r3, #1 - 802eae0: 687b ldr r3, [r7, #4] - 802eae2: 639a str r2, [r3, #56] ; 0x38 + 802eb0a: 687b ldr r3, [r7, #4] + 802eb0c: 6b9b ldr r3, [r3, #56] ; 0x38 + 802eb0e: 1e5a subs r2, r3, #1 + 802eb10: 687b ldr r3, [r7, #4] + 802eb12: 639a str r2, [r3, #56] ; 0x38 while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0U) - 802eae4: 687b ldr r3, [r7, #4] - 802eae6: 681b ldr r3, [r3, #0] - 802eae8: 689b ldr r3, [r3, #8] - 802eaea: f403 537c and.w r3, r3, #16128 ; 0x3f00 - 802eaee: 2b00 cmp r3, #0 - 802eaf0: d1e4 bne.n 802eabc - 802eaf2: e000 b.n 802eaf6 + 802eb14: 687b ldr r3, [r7, #4] + 802eb16: 681b ldr r3, [r3, #0] + 802eb18: 689b ldr r3, [r3, #8] + 802eb1a: f403 537c and.w r3, r3, #16128 ; 0x3f00 + 802eb1e: 2b00 cmp r3, #0 + 802eb20: d1e4 bne.n 802eaec + 802eb22: e000 b.n 802eb26 } else { /* All data have been received for the transfer */ break; - 802eaf4: bf00 nop + 802eb24: bf00 nop } } /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802eaf6: 687b ldr r3, [r7, #4] - 802eaf8: 2201 movs r2, #1 - 802eafa: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802eb26: 687b ldr r3, [r7, #4] + 802eb28: 2201 movs r2, #1 + 802eb2a: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* RX Complete callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->RxCpltCallback(hqspi); #else HAL_QSPI_RxCpltCallback(hqspi); - 802eafe: 6878 ldr r0, [r7, #4] - 802eb00: f000 f8da bl 802ecb8 + 802eb2e: 6878 ldr r0, [r7, #4] + 802eb30: f000 f8da bl 802ece8 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802eb04: e0b0 b.n 802ec68 + 802eb34: e0b0 b.n 802ec98 #endif } else if(hqspi->State == HAL_QSPI_STATE_BUSY) - 802eb06: 687b ldr r3, [r7, #4] - 802eb08: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802eb0c: b2db uxtb r3, r3 - 802eb0e: 2b02 cmp r3, #2 - 802eb10: d107 bne.n 802eb22 + 802eb36: 687b ldr r3, [r7, #4] + 802eb38: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802eb3c: b2db uxtb r3, r3 + 802eb3e: 2b02 cmp r3, #2 + 802eb40: d107 bne.n 802eb52 { /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802eb12: 687b ldr r3, [r7, #4] - 802eb14: 2201 movs r2, #1 - 802eb16: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802eb42: 687b ldr r3, [r7, #4] + 802eb44: 2201 movs r2, #1 + 802eb46: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Command Complete callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->CmdCpltCallback(hqspi); #else HAL_QSPI_CmdCpltCallback(hqspi); - 802eb1a: 6878 ldr r0, [r7, #4] - 802eb1c: f000 f8c2 bl 802eca4 + 802eb4a: 6878 ldr r0, [r7, #4] + 802eb4c: f000 f8c2 bl 802ecd4 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802eb20: e0a2 b.n 802ec68 + 802eb50: e0a2 b.n 802ec98 #endif } else if(hqspi->State == HAL_QSPI_STATE_ABORT) - 802eb22: 687b ldr r3, [r7, #4] - 802eb24: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802eb28: b2db uxtb r3, r3 - 802eb2a: 2b08 cmp r3, #8 - 802eb2c: f040 809c bne.w 802ec68 + 802eb52: 687b ldr r3, [r7, #4] + 802eb54: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802eb58: b2db uxtb r3, r3 + 802eb5a: 2b08 cmp r3, #8 + 802eb5c: f040 809c bne.w 802ec98 { /* Reset functional mode configuration to indirect write mode by default */ CLEAR_BIT(hqspi->Instance->CCR, QUADSPI_CCR_FMODE); - 802eb30: 687b ldr r3, [r7, #4] - 802eb32: 681b ldr r3, [r3, #0] - 802eb34: 695a ldr r2, [r3, #20] - 802eb36: 687b ldr r3, [r7, #4] - 802eb38: 681b ldr r3, [r3, #0] - 802eb3a: f022 6240 bic.w r2, r2, #201326592 ; 0xc000000 - 802eb3e: 615a str r2, [r3, #20] + 802eb60: 687b ldr r3, [r7, #4] + 802eb62: 681b ldr r3, [r3, #0] + 802eb64: 695a ldr r2, [r3, #20] + 802eb66: 687b ldr r3, [r7, #4] + 802eb68: 681b ldr r3, [r3, #0] + 802eb6a: f022 6240 bic.w r2, r2, #201326592 ; 0xc000000 + 802eb6e: 615a str r2, [r3, #20] /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802eb40: 687b ldr r3, [r7, #4] - 802eb42: 2201 movs r2, #1 - 802eb44: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802eb70: 687b ldr r3, [r7, #4] + 802eb72: 2201 movs r2, #1 + 802eb74: f883 2041 strb.w r2, [r3, #65] ; 0x41 if (hqspi->ErrorCode == HAL_QSPI_ERROR_NONE) - 802eb48: 687b ldr r3, [r7, #4] - 802eb4a: 6c5b ldr r3, [r3, #68] ; 0x44 - 802eb4c: 2b00 cmp r3, #0 - 802eb4e: d103 bne.n 802eb58 + 802eb78: 687b ldr r3, [r7, #4] + 802eb7a: 6c5b ldr r3, [r3, #68] ; 0x44 + 802eb7c: 2b00 cmp r3, #0 + 802eb7e: d103 bne.n 802eb88 /* Abort Complete callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->AbortCpltCallback(hqspi); #else HAL_QSPI_AbortCpltCallback(hqspi); - 802eb50: 6878 ldr r0, [r7, #4] - 802eb52: f000 f89d bl 802ec90 + 802eb80: 6878 ldr r0, [r7, #4] + 802eb82: f000 f89d bl 802ecc0 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802eb56: e087 b.n 802ec68 + 802eb86: e087 b.n 802ec98 /* Error callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->ErrorCallback(hqspi); #else HAL_QSPI_ErrorCallback(hqspi); - 802eb58: 6878 ldr r0, [r7, #4] - 802eb5a: f000 f88f bl 802ec7c + 802eb88: 6878 ldr r0, [r7, #4] + 802eb8a: f000 f88f bl 802ecac if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802eb5e: e083 b.n 802ec68 + 802eb8e: e083 b.n 802ec98 /* Nothing to do */ } } /* QSPI Status Match interrupt occurred ------------------------------------*/ else if(((flag & QSPI_FLAG_SM) != 0U) && ((itsource & QSPI_IT_SM) != 0U)) - 802eb60: 697b ldr r3, [r7, #20] - 802eb62: f003 0308 and.w r3, r3, #8 - 802eb66: 2b00 cmp r3, #0 - 802eb68: d01f beq.n 802ebaa - 802eb6a: 693b ldr r3, [r7, #16] - 802eb6c: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 802eb70: 2b00 cmp r3, #0 - 802eb72: d01a beq.n 802ebaa + 802eb90: 697b ldr r3, [r7, #20] + 802eb92: f003 0308 and.w r3, r3, #8 + 802eb96: 2b00 cmp r3, #0 + 802eb98: d01f beq.n 802ebda + 802eb9a: 693b ldr r3, [r7, #16] + 802eb9c: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 802eba0: 2b00 cmp r3, #0 + 802eba2: d01a beq.n 802ebda { /* Clear interrupt */ WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_SM); - 802eb74: 687b ldr r3, [r7, #4] - 802eb76: 681b ldr r3, [r3, #0] - 802eb78: 2208 movs r2, #8 - 802eb7a: 60da str r2, [r3, #12] + 802eba4: 687b ldr r3, [r7, #4] + 802eba6: 681b ldr r3, [r3, #0] + 802eba8: 2208 movs r2, #8 + 802ebaa: 60da str r2, [r3, #12] /* Check if the automatic poll mode stop is activated */ if(READ_BIT(hqspi->Instance->CR, QUADSPI_CR_APMS) != 0U) - 802eb7c: 687b ldr r3, [r7, #4] - 802eb7e: 681b ldr r3, [r3, #0] - 802eb80: 681b ldr r3, [r3, #0] - 802eb82: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 802eb86: 2b00 cmp r3, #0 - 802eb88: d00b beq.n 802eba2 + 802ebac: 687b ldr r3, [r7, #4] + 802ebae: 681b ldr r3, [r3, #0] + 802ebb0: 681b ldr r3, [r3, #0] + 802ebb2: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 802ebb6: 2b00 cmp r3, #0 + 802ebb8: d00b beq.n 802ebd2 { /* Disable the QSPI Transfer Error and Status Match Interrupts */ __HAL_QSPI_DISABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE)); - 802eb8a: 687b ldr r3, [r7, #4] - 802eb8c: 681b ldr r3, [r3, #0] - 802eb8e: 681a ldr r2, [r3, #0] - 802eb90: 687b ldr r3, [r7, #4] - 802eb92: 681b ldr r3, [r3, #0] - 802eb94: f422 2210 bic.w r2, r2, #589824 ; 0x90000 - 802eb98: 601a str r2, [r3, #0] + 802ebba: 687b ldr r3, [r7, #4] + 802ebbc: 681b ldr r3, [r3, #0] + 802ebbe: 681a ldr r2, [r3, #0] + 802ebc0: 687b ldr r3, [r7, #4] + 802ebc2: 681b ldr r3, [r3, #0] + 802ebc4: f422 2210 bic.w r2, r2, #589824 ; 0x90000 + 802ebc8: 601a str r2, [r3, #0] /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802eb9a: 687b ldr r3, [r7, #4] - 802eb9c: 2201 movs r2, #1 - 802eb9e: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ebca: 687b ldr r3, [r7, #4] + 802ebcc: 2201 movs r2, #1 + 802ebce: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Status match callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->StatusMatchCallback(hqspi); #else HAL_QSPI_StatusMatchCallback(hqspi); - 802eba2: 6878 ldr r0, [r7, #4] - 802eba4: f000 f8a6 bl 802ecf4 - 802eba8: e061 b.n 802ec6e + 802ebd2: 6878 ldr r0, [r7, #4] + 802ebd4: f000 f8a6 bl 802ed24 + 802ebd8: e061 b.n 802ec9e #endif } /* QSPI Transfer Error interrupt occurred ----------------------------------*/ else if(((flag & QSPI_FLAG_TE) != 0U) && ((itsource & QSPI_IT_TE) != 0U)) - 802ebaa: 697b ldr r3, [r7, #20] - 802ebac: f003 0301 and.w r3, r3, #1 - 802ebb0: 2b00 cmp r3, #0 - 802ebb2: d047 beq.n 802ec44 - 802ebb4: 693b ldr r3, [r7, #16] - 802ebb6: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 802ebba: 2b00 cmp r3, #0 - 802ebbc: d042 beq.n 802ec44 + 802ebda: 697b ldr r3, [r7, #20] + 802ebdc: f003 0301 and.w r3, r3, #1 + 802ebe0: 2b00 cmp r3, #0 + 802ebe2: d047 beq.n 802ec74 + 802ebe4: 693b ldr r3, [r7, #16] + 802ebe6: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 802ebea: 2b00 cmp r3, #0 + 802ebec: d042 beq.n 802ec74 { /* Clear interrupt */ WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TE); - 802ebbe: 687b ldr r3, [r7, #4] - 802ebc0: 681b ldr r3, [r3, #0] - 802ebc2: 2201 movs r2, #1 - 802ebc4: 60da str r2, [r3, #12] + 802ebee: 687b ldr r3, [r7, #4] + 802ebf0: 681b ldr r3, [r3, #0] + 802ebf2: 2201 movs r2, #1 + 802ebf4: 60da str r2, [r3, #12] /* Disable all the QSPI Interrupts */ __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); - 802ebc6: 687b ldr r3, [r7, #4] - 802ebc8: 681b ldr r3, [r3, #0] - 802ebca: 681a ldr r2, [r3, #0] - 802ebcc: 687b ldr r3, [r7, #4] - 802ebce: 681b ldr r3, [r3, #0] - 802ebd0: f422 2270 bic.w r2, r2, #983040 ; 0xf0000 - 802ebd4: 601a str r2, [r3, #0] + 802ebf6: 687b ldr r3, [r7, #4] + 802ebf8: 681b ldr r3, [r3, #0] + 802ebfa: 681a ldr r2, [r3, #0] + 802ebfc: 687b ldr r3, [r7, #4] + 802ebfe: 681b ldr r3, [r3, #0] + 802ec00: f422 2270 bic.w r2, r2, #983040 ; 0xf0000 + 802ec04: 601a str r2, [r3, #0] /* Set error code */ hqspi->ErrorCode |= HAL_QSPI_ERROR_TRANSFER; - 802ebd6: 687b ldr r3, [r7, #4] - 802ebd8: 6c5b ldr r3, [r3, #68] ; 0x44 - 802ebda: f043 0202 orr.w r2, r3, #2 - 802ebde: 687b ldr r3, [r7, #4] - 802ebe0: 645a str r2, [r3, #68] ; 0x44 + 802ec06: 687b ldr r3, [r7, #4] + 802ec08: 6c5b ldr r3, [r3, #68] ; 0x44 + 802ec0a: f043 0202 orr.w r2, r3, #2 + 802ec0e: 687b ldr r3, [r7, #4] + 802ec10: 645a str r2, [r3, #68] ; 0x44 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ebe2: 687b ldr r3, [r7, #4] - 802ebe4: 681b ldr r3, [r3, #0] - 802ebe6: 681b ldr r3, [r3, #0] - 802ebe8: f003 0304 and.w r3, r3, #4 - 802ebec: 2b00 cmp r3, #0 - 802ebee: d021 beq.n 802ec34 + 802ec12: 687b ldr r3, [r7, #4] + 802ec14: 681b ldr r3, [r3, #0] + 802ec16: 681b ldr r3, [r3, #0] + 802ec18: f003 0304 and.w r3, r3, #4 + 802ec1c: 2b00 cmp r3, #0 + 802ec1e: d021 beq.n 802ec64 { /* Disable using MDMA by clearing DMAEN, note that DMAEN bit is "reserved" but no impact on H7 HW and it minimize the cost in the footprint */ CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); - 802ebf0: 687b ldr r3, [r7, #4] - 802ebf2: 681b ldr r3, [r3, #0] - 802ebf4: 681a ldr r2, [r3, #0] - 802ebf6: 687b ldr r3, [r7, #4] - 802ebf8: 681b ldr r3, [r3, #0] - 802ebfa: f022 0204 bic.w r2, r2, #4 - 802ebfe: 601a str r2, [r3, #0] + 802ec20: 687b ldr r3, [r7, #4] + 802ec22: 681b ldr r3, [r3, #0] + 802ec24: 681a ldr r2, [r3, #0] + 802ec26: 687b ldr r3, [r7, #4] + 802ec28: 681b ldr r3, [r3, #0] + 802ec2a: f022 0204 bic.w r2, r2, #4 + 802ec2e: 601a str r2, [r3, #0] /* Disable the MDMA channel */ hqspi->hmdma->XferAbortCallback = QSPI_DMAAbortCplt; - 802ec00: 687b ldr r3, [r7, #4] - 802ec02: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ec04: 4a1c ldr r2, [pc, #112] ; (802ec78 ) - 802ec06: 659a str r2, [r3, #88] ; 0x58 + 802ec30: 687b ldr r3, [r7, #4] + 802ec32: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ec34: 4a1c ldr r2, [pc, #112] ; (802eca8 ) + 802ec36: 659a str r2, [r3, #88] ; 0x58 if (HAL_MDMA_Abort_IT(hqspi->hmdma) != HAL_OK) - 802ec08: 687b ldr r3, [r7, #4] - 802ec0a: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ec0c: 4618 mov r0, r3 - 802ec0e: f7ff fda5 bl 802e75c - 802ec12: 4603 mov r3, r0 - 802ec14: 2b00 cmp r3, #0 - 802ec16: d029 beq.n 802ec6c + 802ec38: 687b ldr r3, [r7, #4] + 802ec3a: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ec3c: 4618 mov r0, r3 + 802ec3e: f7ff fda5 bl 802e78c + 802ec42: 4603 mov r3, r0 + 802ec44: 2b00 cmp r3, #0 + 802ec46: d029 beq.n 802ec9c { /* Set error code to DMA */ hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; - 802ec18: 687b ldr r3, [r7, #4] - 802ec1a: 6c5b ldr r3, [r3, #68] ; 0x44 - 802ec1c: f043 0204 orr.w r2, r3, #4 - 802ec20: 687b ldr r3, [r7, #4] - 802ec22: 645a str r2, [r3, #68] ; 0x44 + 802ec48: 687b ldr r3, [r7, #4] + 802ec4a: 6c5b ldr r3, [r3, #68] ; 0x44 + 802ec4c: f043 0204 orr.w r2, r3, #4 + 802ec50: 687b ldr r3, [r7, #4] + 802ec52: 645a str r2, [r3, #68] ; 0x44 /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802ec24: 687b ldr r3, [r7, #4] - 802ec26: 2201 movs r2, #1 - 802ec28: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ec54: 687b ldr r3, [r7, #4] + 802ec56: 2201 movs r2, #1 + 802ec58: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Error callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->ErrorCallback(hqspi); #else HAL_QSPI_ErrorCallback(hqspi); - 802ec2c: 6878 ldr r0, [r7, #4] - 802ec2e: f000 f825 bl 802ec7c + 802ec5c: 6878 ldr r0, [r7, #4] + 802ec5e: f000 f825 bl 802ecac if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ec32: e01b b.n 802ec6c + 802ec62: e01b b.n 802ec9c } } else { /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802ec34: 687b ldr r3, [r7, #4] - 802ec36: 2201 movs r2, #1 - 802ec38: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ec64: 687b ldr r3, [r7, #4] + 802ec66: 2201 movs r2, #1 + 802ec68: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Error callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->ErrorCallback(hqspi); #else HAL_QSPI_ErrorCallback(hqspi); - 802ec3c: 6878 ldr r0, [r7, #4] - 802ec3e: f000 f81d bl 802ec7c + 802ec6c: 6878 ldr r0, [r7, #4] + 802ec6e: f000 f81d bl 802ecac if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ec42: e013 b.n 802ec6c + 802ec72: e013 b.n 802ec9c #endif } } /* QSPI Timeout interrupt occurred -----------------------------------------*/ else if(((flag & QSPI_FLAG_TO) != 0U) && ((itsource & QSPI_IT_TO) != 0U)) - 802ec44: 697b ldr r3, [r7, #20] - 802ec46: f003 0310 and.w r3, r3, #16 - 802ec4a: 2b00 cmp r3, #0 - 802ec4c: d00f beq.n 802ec6e - 802ec4e: 693b ldr r3, [r7, #16] - 802ec50: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 802ec54: 2b00 cmp r3, #0 - 802ec56: d00a beq.n 802ec6e + 802ec74: 697b ldr r3, [r7, #20] + 802ec76: f003 0310 and.w r3, r3, #16 + 802ec7a: 2b00 cmp r3, #0 + 802ec7c: d00f beq.n 802ec9e + 802ec7e: 693b ldr r3, [r7, #16] + 802ec80: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 802ec84: 2b00 cmp r3, #0 + 802ec86: d00a beq.n 802ec9e { /* Clear interrupt */ WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TO); - 802ec58: 687b ldr r3, [r7, #4] - 802ec5a: 681b ldr r3, [r3, #0] - 802ec5c: 2210 movs r2, #16 - 802ec5e: 60da str r2, [r3, #12] + 802ec88: 687b ldr r3, [r7, #4] + 802ec8a: 681b ldr r3, [r3, #0] + 802ec8c: 2210 movs r2, #16 + 802ec8e: 60da str r2, [r3, #12] /* Timeout callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->TimeOutCallback(hqspi); #else HAL_QSPI_TimeOutCallback(hqspi); - 802ec60: 6878 ldr r0, [r7, #4] - 802ec62: f000 f851 bl 802ed08 + 802ec90: 6878 ldr r0, [r7, #4] + 802ec92: f000 f851 bl 802ed38 else { /* Nothing to do */ } } - 802ec66: e002 b.n 802ec6e + 802ec96: e002 b.n 802ec9e if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802ec68: bf00 nop - 802ec6a: e000 b.n 802ec6e + 802ec98: bf00 nop + 802ec9a: e000 b.n 802ec9e if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ec6c: bf00 nop + 802ec9c: bf00 nop } - 802ec6e: bf00 nop - 802ec70: 3718 adds r7, #24 - 802ec72: 46bd mov sp, r7 - 802ec74: bd80 pop {r7, pc} - 802ec76: bf00 nop - 802ec78: 0802ed39 .word 0x0802ed39 + 802ec9e: bf00 nop + 802eca0: 3718 adds r7, #24 + 802eca2: 46bd mov sp, r7 + 802eca4: bd80 pop {r7, pc} + 802eca6: bf00 nop + 802eca8: 0802ed69 .word 0x0802ed69 -0802ec7c : +0802ecac : * @brief Transfer Error callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_ErrorCallback(QSPI_HandleTypeDef *hqspi) { - 802ec7c: b480 push {r7} - 802ec7e: b083 sub sp, #12 - 802ec80: af00 add r7, sp, #0 - 802ec82: 6078 str r0, [r7, #4] + 802ecac: b480 push {r7} + 802ecae: b083 sub sp, #12 + 802ecb0: af00 add r7, sp, #0 + 802ecb2: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE : This function should not be modified, when the callback is needed, the HAL_QSPI_ErrorCallback could be implemented in the user file */ } - 802ec84: bf00 nop - 802ec86: 370c adds r7, #12 - 802ec88: 46bd mov sp, r7 - 802ec8a: f85d 7b04 ldr.w r7, [sp], #4 - 802ec8e: 4770 bx lr + 802ecb4: bf00 nop + 802ecb6: 370c adds r7, #12 + 802ecb8: 46bd mov sp, r7 + 802ecba: f85d 7b04 ldr.w r7, [sp], #4 + 802ecbe: 4770 bx lr -0802ec90 : +0802ecc0 : * @brief Abort completed callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_AbortCpltCallback(QSPI_HandleTypeDef *hqspi) { - 802ec90: b480 push {r7} - 802ec92: b083 sub sp, #12 - 802ec94: af00 add r7, sp, #0 - 802ec96: 6078 str r0, [r7, #4] + 802ecc0: b480 push {r7} + 802ecc2: b083 sub sp, #12 + 802ecc4: af00 add r7, sp, #0 + 802ecc6: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE: This function should not be modified, when the callback is needed, the HAL_QSPI_AbortCpltCallback could be implemented in the user file */ } - 802ec98: bf00 nop - 802ec9a: 370c adds r7, #12 - 802ec9c: 46bd mov sp, r7 - 802ec9e: f85d 7b04 ldr.w r7, [sp], #4 - 802eca2: 4770 bx lr + 802ecc8: bf00 nop + 802ecca: 370c adds r7, #12 + 802eccc: 46bd mov sp, r7 + 802ecce: f85d 7b04 ldr.w r7, [sp], #4 + 802ecd2: 4770 bx lr -0802eca4 : +0802ecd4 : * @brief Command completed callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_CmdCpltCallback(QSPI_HandleTypeDef *hqspi) { - 802eca4: b480 push {r7} - 802eca6: b083 sub sp, #12 - 802eca8: af00 add r7, sp, #0 - 802ecaa: 6078 str r0, [r7, #4] + 802ecd4: b480 push {r7} + 802ecd6: b083 sub sp, #12 + 802ecd8: af00 add r7, sp, #0 + 802ecda: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE: This function should not be modified, when the callback is needed, the HAL_QSPI_CmdCpltCallback could be implemented in the user file */ } - 802ecac: bf00 nop - 802ecae: 370c adds r7, #12 - 802ecb0: 46bd mov sp, r7 - 802ecb2: f85d 7b04 ldr.w r7, [sp], #4 - 802ecb6: 4770 bx lr + 802ecdc: bf00 nop + 802ecde: 370c adds r7, #12 + 802ece0: 46bd mov sp, r7 + 802ece2: f85d 7b04 ldr.w r7, [sp], #4 + 802ece6: 4770 bx lr -0802ecb8 : +0802ece8 : * @brief Rx Transfer completed callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_RxCpltCallback(QSPI_HandleTypeDef *hqspi) { - 802ecb8: b480 push {r7} - 802ecba: b083 sub sp, #12 - 802ecbc: af00 add r7, sp, #0 - 802ecbe: 6078 str r0, [r7, #4] + 802ece8: b480 push {r7} + 802ecea: b083 sub sp, #12 + 802ecec: af00 add r7, sp, #0 + 802ecee: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE: This function should not be modified, when the callback is needed, the HAL_QSPI_RxCpltCallback could be implemented in the user file */ } - 802ecc0: bf00 nop - 802ecc2: 370c adds r7, #12 - 802ecc4: 46bd mov sp, r7 - 802ecc6: f85d 7b04 ldr.w r7, [sp], #4 - 802ecca: 4770 bx lr + 802ecf0: bf00 nop + 802ecf2: 370c adds r7, #12 + 802ecf4: 46bd mov sp, r7 + 802ecf6: f85d 7b04 ldr.w r7, [sp], #4 + 802ecfa: 4770 bx lr -0802eccc : +0802ecfc : * @brief Tx Transfer completed callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_TxCpltCallback(QSPI_HandleTypeDef *hqspi) { - 802eccc: b480 push {r7} - 802ecce: b083 sub sp, #12 - 802ecd0: af00 add r7, sp, #0 - 802ecd2: 6078 str r0, [r7, #4] + 802ecfc: b480 push {r7} + 802ecfe: b083 sub sp, #12 + 802ed00: af00 add r7, sp, #0 + 802ed02: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE: This function should not be modified, when the callback is needed, the HAL_QSPI_TxCpltCallback could be implemented in the user file */ } - 802ecd4: bf00 nop - 802ecd6: 370c adds r7, #12 - 802ecd8: 46bd mov sp, r7 - 802ecda: f85d 7b04 ldr.w r7, [sp], #4 - 802ecde: 4770 bx lr + 802ed04: bf00 nop + 802ed06: 370c adds r7, #12 + 802ed08: 46bd mov sp, r7 + 802ed0a: f85d 7b04 ldr.w r7, [sp], #4 + 802ed0e: 4770 bx lr -0802ece0 : +0802ed10 : * @brief FIFO Threshold callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi) { - 802ece0: b480 push {r7} - 802ece2: b083 sub sp, #12 - 802ece4: af00 add r7, sp, #0 - 802ece6: 6078 str r0, [r7, #4] + 802ed10: b480 push {r7} + 802ed12: b083 sub sp, #12 + 802ed14: af00 add r7, sp, #0 + 802ed16: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE : This function should not be modified, when the callback is needed, the HAL_QSPI_FIFOThresholdCallback could be implemented in the user file */ } - 802ece8: bf00 nop - 802ecea: 370c adds r7, #12 - 802ecec: 46bd mov sp, r7 - 802ecee: f85d 7b04 ldr.w r7, [sp], #4 - 802ecf2: 4770 bx lr + 802ed18: bf00 nop + 802ed1a: 370c adds r7, #12 + 802ed1c: 46bd mov sp, r7 + 802ed1e: f85d 7b04 ldr.w r7, [sp], #4 + 802ed22: 4770 bx lr -0802ecf4 : +0802ed24 : * @brief Status Match callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi) { - 802ecf4: b480 push {r7} - 802ecf6: b083 sub sp, #12 - 802ecf8: af00 add r7, sp, #0 - 802ecfa: 6078 str r0, [r7, #4] + 802ed24: b480 push {r7} + 802ed26: b083 sub sp, #12 + 802ed28: af00 add r7, sp, #0 + 802ed2a: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE : This function should not be modified, when the callback is needed, the HAL_QSPI_StatusMatchCallback could be implemented in the user file */ } - 802ecfc: bf00 nop - 802ecfe: 370c adds r7, #12 - 802ed00: 46bd mov sp, r7 - 802ed02: f85d 7b04 ldr.w r7, [sp], #4 - 802ed06: 4770 bx lr + 802ed2c: bf00 nop + 802ed2e: 370c adds r7, #12 + 802ed30: 46bd mov sp, r7 + 802ed32: f85d 7b04 ldr.w r7, [sp], #4 + 802ed36: 4770 bx lr -0802ed08 : +0802ed38 : * @brief Timeout callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_TimeOutCallback(QSPI_HandleTypeDef *hqspi) { - 802ed08: b480 push {r7} - 802ed0a: b083 sub sp, #12 - 802ed0c: af00 add r7, sp, #0 - 802ed0e: 6078 str r0, [r7, #4] + 802ed38: b480 push {r7} + 802ed3a: b083 sub sp, #12 + 802ed3c: af00 add r7, sp, #0 + 802ed3e: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE : This function should not be modified, when the callback is needed, the HAL_QSPI_TimeOutCallback could be implemented in the user file */ } - 802ed10: bf00 nop - 802ed12: 370c adds r7, #12 - 802ed14: 46bd mov sp, r7 - 802ed16: f85d 7b04 ldr.w r7, [sp], #4 - 802ed1a: 4770 bx lr + 802ed40: bf00 nop + 802ed42: 370c adds r7, #12 + 802ed44: 46bd mov sp, r7 + 802ed46: f85d 7b04 ldr.w r7, [sp], #4 + 802ed4a: 4770 bx lr -0802ed1c : +0802ed4c : * @param hqspi QSPI handle. * @param Timeout Timeout for the QSPI memory access. * @retval None */ void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout) { - 802ed1c: b480 push {r7} - 802ed1e: b083 sub sp, #12 - 802ed20: af00 add r7, sp, #0 - 802ed22: 6078 str r0, [r7, #4] - 802ed24: 6039 str r1, [r7, #0] + 802ed4c: b480 push {r7} + 802ed4e: b083 sub sp, #12 + 802ed50: af00 add r7, sp, #0 + 802ed52: 6078 str r0, [r7, #4] + 802ed54: 6039 str r1, [r7, #0] hqspi->Timeout = Timeout; - 802ed26: 687b ldr r3, [r7, #4] - 802ed28: 683a ldr r2, [r7, #0] - 802ed2a: 649a str r2, [r3, #72] ; 0x48 + 802ed56: 687b ldr r3, [r7, #4] + 802ed58: 683a ldr r2, [r7, #0] + 802ed5a: 649a str r2, [r3, #72] ; 0x48 } - 802ed2c: bf00 nop - 802ed2e: 370c adds r7, #12 - 802ed30: 46bd mov sp, r7 - 802ed32: f85d 7b04 ldr.w r7, [sp], #4 - 802ed36: 4770 bx lr + 802ed5c: bf00 nop + 802ed5e: 370c adds r7, #12 + 802ed60: 46bd mov sp, r7 + 802ed62: f85d 7b04 ldr.w r7, [sp], #4 + 802ed66: 4770 bx lr -0802ed38 : +0802ed68 : * @brief MDMA QSPI abort complete callback. * @param hmdma MDMA handle * @retval None */ static void QSPI_DMAAbortCplt(MDMA_HandleTypeDef *hmdma) { - 802ed38: b580 push {r7, lr} - 802ed3a: b084 sub sp, #16 - 802ed3c: af00 add r7, sp, #0 - 802ed3e: 6078 str r0, [r7, #4] + 802ed68: b580 push {r7, lr} + 802ed6a: b084 sub sp, #16 + 802ed6c: af00 add r7, sp, #0 + 802ed6e: 6078 str r0, [r7, #4] QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )(hmdma->Parent); - 802ed40: 687b ldr r3, [r7, #4] - 802ed42: 6c1b ldr r3, [r3, #64] ; 0x40 - 802ed44: 60fb str r3, [r7, #12] + 802ed70: 687b ldr r3, [r7, #4] + 802ed72: 6c1b ldr r3, [r3, #64] ; 0x40 + 802ed74: 60fb str r3, [r7, #12] hqspi->RxXferCount = 0U; - 802ed46: 68fb ldr r3, [r7, #12] - 802ed48: 2200 movs r2, #0 - 802ed4a: 639a str r2, [r3, #56] ; 0x38 + 802ed76: 68fb ldr r3, [r7, #12] + 802ed78: 2200 movs r2, #0 + 802ed7a: 639a str r2, [r3, #56] ; 0x38 hqspi->TxXferCount = 0U; - 802ed4c: 68fb ldr r3, [r7, #12] - 802ed4e: 2200 movs r2, #0 - 802ed50: 62da str r2, [r3, #44] ; 0x2c + 802ed7c: 68fb ldr r3, [r7, #12] + 802ed7e: 2200 movs r2, #0 + 802ed80: 62da str r2, [r3, #44] ; 0x2c if(hqspi->State == HAL_QSPI_STATE_ABORT) - 802ed52: 68fb ldr r3, [r7, #12] - 802ed54: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802ed58: b2db uxtb r3, r3 - 802ed5a: 2b08 cmp r3, #8 - 802ed5c: d114 bne.n 802ed88 + 802ed82: 68fb ldr r3, [r7, #12] + 802ed84: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802ed88: b2db uxtb r3, r3 + 802ed8a: 2b08 cmp r3, #8 + 802ed8c: d114 bne.n 802edb8 { /* MDMA Abort called by QSPI abort */ /* Clear interrupt */ __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); - 802ed5e: 68fb ldr r3, [r7, #12] - 802ed60: 681b ldr r3, [r3, #0] - 802ed62: 2202 movs r2, #2 - 802ed64: 60da str r2, [r3, #12] + 802ed8e: 68fb ldr r3, [r7, #12] + 802ed90: 681b ldr r3, [r3, #0] + 802ed92: 2202 movs r2, #2 + 802ed94: 60da str r2, [r3, #12] /* Enable the QSPI Transfer Complete Interrupt */ __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); - 802ed66: 68fb ldr r3, [r7, #12] - 802ed68: 681b ldr r3, [r3, #0] - 802ed6a: 681a ldr r2, [r3, #0] - 802ed6c: 68fb ldr r3, [r7, #12] - 802ed6e: 681b ldr r3, [r3, #0] - 802ed70: f442 3200 orr.w r2, r2, #131072 ; 0x20000 - 802ed74: 601a str r2, [r3, #0] + 802ed96: 68fb ldr r3, [r7, #12] + 802ed98: 681b ldr r3, [r3, #0] + 802ed9a: 681a ldr r2, [r3, #0] + 802ed9c: 68fb ldr r3, [r7, #12] + 802ed9e: 681b ldr r3, [r3, #0] + 802eda0: f442 3200 orr.w r2, r2, #131072 ; 0x20000 + 802eda4: 601a str r2, [r3, #0] /* Configure QSPI: CR register with Abort request */ SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT); - 802ed76: 68fb ldr r3, [r7, #12] - 802ed78: 681b ldr r3, [r3, #0] - 802ed7a: 681a ldr r2, [r3, #0] - 802ed7c: 68fb ldr r3, [r7, #12] - 802ed7e: 681b ldr r3, [r3, #0] - 802ed80: f042 0202 orr.w r2, r2, #2 - 802ed84: 601a str r2, [r3, #0] + 802eda6: 68fb ldr r3, [r7, #12] + 802eda8: 681b ldr r3, [r3, #0] + 802edaa: 681a ldr r2, [r3, #0] + 802edac: 68fb ldr r3, [r7, #12] + 802edae: 681b ldr r3, [r3, #0] + 802edb0: f042 0202 orr.w r2, r2, #2 + 802edb4: 601a str r2, [r3, #0] hqspi->ErrorCallback(hqspi); #else HAL_QSPI_ErrorCallback(hqspi); #endif } } - 802ed86: e006 b.n 802ed96 + 802edb6: e006 b.n 802edc6 hqspi->State = HAL_QSPI_STATE_READY; - 802ed88: 68fb ldr r3, [r7, #12] - 802ed8a: 2201 movs r2, #1 - 802ed8c: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802edb8: 68fb ldr r3, [r7, #12] + 802edba: 2201 movs r2, #1 + 802edbc: f883 2041 strb.w r2, [r3, #65] ; 0x41 HAL_QSPI_ErrorCallback(hqspi); - 802ed90: 68f8 ldr r0, [r7, #12] - 802ed92: f7ff ff73 bl 802ec7c + 802edc0: 68f8 ldr r0, [r7, #12] + 802edc2: f7ff ff73 bl 802ecac } - 802ed96: bf00 nop - 802ed98: 3710 adds r7, #16 - 802ed9a: 46bd mov sp, r7 - 802ed9c: bd80 pop {r7, pc} + 802edc6: bf00 nop + 802edc8: 3710 adds r7, #16 + 802edca: 46bd mov sp, r7 + 802edcc: bd80 pop {r7, pc} -0802ed9e : +0802edce : * @param Timeout Duration of the timeout * @retval HAL status */ static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Tickstart, uint32_t Timeout) { - 802ed9e: b580 push {r7, lr} - 802eda0: b084 sub sp, #16 - 802eda2: af00 add r7, sp, #0 - 802eda4: 60f8 str r0, [r7, #12] - 802eda6: 60b9 str r1, [r7, #8] - 802eda8: 603b str r3, [r7, #0] - 802edaa: 4613 mov r3, r2 - 802edac: 71fb strb r3, [r7, #7] + 802edce: b580 push {r7, lr} + 802edd0: b084 sub sp, #16 + 802edd2: af00 add r7, sp, #0 + 802edd4: 60f8 str r0, [r7, #12] + 802edd6: 60b9 str r1, [r7, #8] + 802edd8: 603b str r3, [r7, #0] + 802edda: 4613 mov r3, r2 + 802eddc: 71fb strb r3, [r7, #7] /* Wait until flag is in expected state */ while((__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State) - 802edae: e01a b.n 802ede6 + 802edde: e01a b.n 802ee16 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 802edb0: 69bb ldr r3, [r7, #24] - 802edb2: f1b3 3fff cmp.w r3, #4294967295 - 802edb6: d016 beq.n 802ede6 + 802ede0: 69bb ldr r3, [r7, #24] + 802ede2: f1b3 3fff cmp.w r3, #4294967295 + 802ede6: d016 beq.n 802ee16 { if(((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 802edb8: f7f7 f8ec bl 8025f94 - 802edbc: 4602 mov r2, r0 - 802edbe: 683b ldr r3, [r7, #0] - 802edc0: 1ad3 subs r3, r2, r3 - 802edc2: 69ba ldr r2, [r7, #24] - 802edc4: 429a cmp r2, r3 - 802edc6: d302 bcc.n 802edce - 802edc8: 69bb ldr r3, [r7, #24] - 802edca: 2b00 cmp r3, #0 - 802edcc: d10b bne.n 802ede6 + 802ede8: f7f7 f8ec bl 8025fc4 + 802edec: 4602 mov r2, r0 + 802edee: 683b ldr r3, [r7, #0] + 802edf0: 1ad3 subs r3, r2, r3 + 802edf2: 69ba ldr r2, [r7, #24] + 802edf4: 429a cmp r2, r3 + 802edf6: d302 bcc.n 802edfe + 802edf8: 69bb ldr r3, [r7, #24] + 802edfa: 2b00 cmp r3, #0 + 802edfc: d10b bne.n 802ee16 { hqspi->State = HAL_QSPI_STATE_ERROR; - 802edce: 68fb ldr r3, [r7, #12] - 802edd0: 2204 movs r2, #4 - 802edd2: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802edfe: 68fb ldr r3, [r7, #12] + 802ee00: 2204 movs r2, #4 + 802ee02: f883 2041 strb.w r2, [r3, #65] ; 0x41 hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT; - 802edd6: 68fb ldr r3, [r7, #12] - 802edd8: 6c5b ldr r3, [r3, #68] ; 0x44 - 802edda: f043 0201 orr.w r2, r3, #1 - 802edde: 68fb ldr r3, [r7, #12] - 802ede0: 645a str r2, [r3, #68] ; 0x44 + 802ee06: 68fb ldr r3, [r7, #12] + 802ee08: 6c5b ldr r3, [r3, #68] ; 0x44 + 802ee0a: f043 0201 orr.w r2, r3, #1 + 802ee0e: 68fb ldr r3, [r7, #12] + 802ee10: 645a str r2, [r3, #68] ; 0x44 return HAL_ERROR; - 802ede2: 2301 movs r3, #1 - 802ede4: e00e b.n 802ee04 + 802ee12: 2301 movs r3, #1 + 802ee14: e00e b.n 802ee34 while((__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State) - 802ede6: 68fb ldr r3, [r7, #12] - 802ede8: 681b ldr r3, [r3, #0] - 802edea: 689a ldr r2, [r3, #8] - 802edec: 68bb ldr r3, [r7, #8] - 802edee: 4013 ands r3, r2 - 802edf0: 2b00 cmp r3, #0 - 802edf2: bf14 ite ne - 802edf4: 2301 movne r3, #1 - 802edf6: 2300 moveq r3, #0 - 802edf8: b2db uxtb r3, r3 - 802edfa: 461a mov r2, r3 - 802edfc: 79fb ldrb r3, [r7, #7] - 802edfe: 429a cmp r2, r3 - 802ee00: d1d6 bne.n 802edb0 + 802ee16: 68fb ldr r3, [r7, #12] + 802ee18: 681b ldr r3, [r3, #0] + 802ee1a: 689a ldr r2, [r3, #8] + 802ee1c: 68bb ldr r3, [r7, #8] + 802ee1e: 4013 ands r3, r2 + 802ee20: 2b00 cmp r3, #0 + 802ee22: bf14 ite ne + 802ee24: 2301 movne r3, #1 + 802ee26: 2300 moveq r3, #0 + 802ee28: b2db uxtb r3, r3 + 802ee2a: 461a mov r2, r3 + 802ee2c: 79fb ldrb r3, [r7, #7] + 802ee2e: 429a cmp r2, r3 + 802ee30: d1d6 bne.n 802ede0 } } } return HAL_OK; - 802ee02: 2300 movs r3, #0 + 802ee32: 2300 movs r3, #0 } - 802ee04: 4618 mov r0, r3 - 802ee06: 3710 adds r7, #16 - 802ee08: 46bd mov sp, r7 - 802ee0a: bd80 pop {r7, pc} + 802ee34: 4618 mov r0, r3 + 802ee36: 3710 adds r7, #16 + 802ee38: 46bd mov sp, r7 + 802ee3a: bd80 pop {r7, pc} -0802ee0c : +0802ee3c : * supported by this function. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 802ee0c: b580 push {r7, lr} - 802ee0e: b08c sub sp, #48 ; 0x30 - 802ee10: af00 add r7, sp, #0 - 802ee12: 6078 str r0, [r7, #4] + 802ee3c: b580 push {r7, lr} + 802ee3e: b08c sub sp, #48 ; 0x30 + 802ee40: af00 add r7, sp, #0 + 802ee42: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t temp1_pllckcfg, temp2_pllckcfg; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 802ee14: 687b ldr r3, [r7, #4] - 802ee16: 2b00 cmp r3, #0 - 802ee18: d102 bne.n 802ee20 + 802ee44: 687b ldr r3, [r7, #4] + 802ee46: 2b00 cmp r3, #0 + 802ee48: d102 bne.n 802ee50 { return HAL_ERROR; - 802ee1a: 2301 movs r3, #1 - 802ee1c: f000 bc1d b.w 802f65a + 802ee4a: 2301 movs r3, #1 + 802ee4c: f000 bc1d b.w 802f68a } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 802ee20: 687b ldr r3, [r7, #4] - 802ee22: 681b ldr r3, [r3, #0] - 802ee24: f003 0301 and.w r3, r3, #1 - 802ee28: 2b00 cmp r3, #0 - 802ee2a: f000 8087 beq.w 802ef3c + 802ee50: 687b ldr r3, [r7, #4] + 802ee52: 681b ldr r3, [r3, #0] + 802ee54: f003 0301 and.w r3, r3, #1 + 802ee58: 2b00 cmp r3, #0 + 802ee5a: f000 8087 beq.w 802ef6c { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 802ee2e: 4b99 ldr r3, [pc, #612] ; (802f094 ) - 802ee30: 691b ldr r3, [r3, #16] - 802ee32: f003 0338 and.w r3, r3, #56 ; 0x38 - 802ee36: 62fb str r3, [r7, #44] ; 0x2c + 802ee5e: 4b99 ldr r3, [pc, #612] ; (802f0c4 ) + 802ee60: 691b ldr r3, [r3, #16] + 802ee62: f003 0338 and.w r3, r3, #56 ; 0x38 + 802ee66: 62fb str r3, [r7, #44] ; 0x2c const uint32_t temp_pllckselr = RCC->PLLCKSELR; - 802ee38: 4b96 ldr r3, [pc, #600] ; (802f094 ) - 802ee3a: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ee3c: 62bb str r3, [r7, #40] ; 0x28 + 802ee68: 4b96 ldr r3, [pc, #600] ; (802f0c4 ) + 802ee6a: 6a9b ldr r3, [r3, #40] ; 0x28 + 802ee6c: 62bb str r3, [r7, #40] ; 0x28 /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ if((temp_sysclksrc == RCC_CFGR_SWS_HSE) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSE))) - 802ee3e: 6afb ldr r3, [r7, #44] ; 0x2c - 802ee40: 2b10 cmp r3, #16 - 802ee42: d007 beq.n 802ee54 - 802ee44: 6afb ldr r3, [r7, #44] ; 0x2c - 802ee46: 2b18 cmp r3, #24 - 802ee48: d110 bne.n 802ee6c - 802ee4a: 6abb ldr r3, [r7, #40] ; 0x28 - 802ee4c: f003 0303 and.w r3, r3, #3 - 802ee50: 2b02 cmp r3, #2 - 802ee52: d10b bne.n 802ee6c + 802ee6e: 6afb ldr r3, [r7, #44] ; 0x2c + 802ee70: 2b10 cmp r3, #16 + 802ee72: d007 beq.n 802ee84 + 802ee74: 6afb ldr r3, [r7, #44] ; 0x2c + 802ee76: 2b18 cmp r3, #24 + 802ee78: d110 bne.n 802ee9c + 802ee7a: 6abb ldr r3, [r7, #40] ; 0x28 + 802ee7c: f003 0303 and.w r3, r3, #3 + 802ee80: 2b02 cmp r3, #2 + 802ee82: d10b bne.n 802ee9c { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 802ee54: 4b8f ldr r3, [pc, #572] ; (802f094 ) - 802ee56: 681b ldr r3, [r3, #0] - 802ee58: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802ee5c: 2b00 cmp r3, #0 - 802ee5e: d06c beq.n 802ef3a - 802ee60: 687b ldr r3, [r7, #4] - 802ee62: 685b ldr r3, [r3, #4] - 802ee64: 2b00 cmp r3, #0 - 802ee66: d168 bne.n 802ef3a + 802ee84: 4b8f ldr r3, [pc, #572] ; (802f0c4 ) + 802ee86: 681b ldr r3, [r3, #0] + 802ee88: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802ee8c: 2b00 cmp r3, #0 + 802ee8e: d06c beq.n 802ef6a + 802ee90: 687b ldr r3, [r7, #4] + 802ee92: 685b ldr r3, [r3, #4] + 802ee94: 2b00 cmp r3, #0 + 802ee96: d168 bne.n 802ef6a { return HAL_ERROR; - 802ee68: 2301 movs r3, #1 - 802ee6a: e3f6 b.n 802f65a + 802ee98: 2301 movs r3, #1 + 802ee9a: e3f6 b.n 802f68a } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 802ee6c: 687b ldr r3, [r7, #4] - 802ee6e: 685b ldr r3, [r3, #4] - 802ee70: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 802ee74: d106 bne.n 802ee84 - 802ee76: 4b87 ldr r3, [pc, #540] ; (802f094 ) - 802ee78: 681b ldr r3, [r3, #0] - 802ee7a: 4a86 ldr r2, [pc, #536] ; (802f094 ) - 802ee7c: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 802ee80: 6013 str r3, [r2, #0] - 802ee82: e02e b.n 802eee2 - 802ee84: 687b ldr r3, [r7, #4] - 802ee86: 685b ldr r3, [r3, #4] - 802ee88: 2b00 cmp r3, #0 - 802ee8a: d10c bne.n 802eea6 - 802ee8c: 4b81 ldr r3, [pc, #516] ; (802f094 ) - 802ee8e: 681b ldr r3, [r3, #0] - 802ee90: 4a80 ldr r2, [pc, #512] ; (802f094 ) - 802ee92: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 802ee96: 6013 str r3, [r2, #0] - 802ee98: 4b7e ldr r3, [pc, #504] ; (802f094 ) - 802ee9a: 681b ldr r3, [r3, #0] - 802ee9c: 4a7d ldr r2, [pc, #500] ; (802f094 ) - 802ee9e: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 802eea2: 6013 str r3, [r2, #0] - 802eea4: e01d b.n 802eee2 - 802eea6: 687b ldr r3, [r7, #4] - 802eea8: 685b ldr r3, [r3, #4] - 802eeaa: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 802eeae: d10c bne.n 802eeca - 802eeb0: 4b78 ldr r3, [pc, #480] ; (802f094 ) - 802eeb2: 681b ldr r3, [r3, #0] - 802eeb4: 4a77 ldr r2, [pc, #476] ; (802f094 ) - 802eeb6: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 802eeba: 6013 str r3, [r2, #0] - 802eebc: 4b75 ldr r3, [pc, #468] ; (802f094 ) + 802ee9c: 687b ldr r3, [r7, #4] + 802ee9e: 685b ldr r3, [r3, #4] + 802eea0: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 802eea4: d106 bne.n 802eeb4 + 802eea6: 4b87 ldr r3, [pc, #540] ; (802f0c4 ) + 802eea8: 681b ldr r3, [r3, #0] + 802eeaa: 4a86 ldr r2, [pc, #536] ; (802f0c4 ) + 802eeac: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 802eeb0: 6013 str r3, [r2, #0] + 802eeb2: e02e b.n 802ef12 + 802eeb4: 687b ldr r3, [r7, #4] + 802eeb6: 685b ldr r3, [r3, #4] + 802eeb8: 2b00 cmp r3, #0 + 802eeba: d10c bne.n 802eed6 + 802eebc: 4b81 ldr r3, [pc, #516] ; (802f0c4 ) 802eebe: 681b ldr r3, [r3, #0] - 802eec0: 4a74 ldr r2, [pc, #464] ; (802f094 ) - 802eec2: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 802eec0: 4a80 ldr r2, [pc, #512] ; (802f0c4 ) + 802eec2: f423 3380 bic.w r3, r3, #65536 ; 0x10000 802eec6: 6013 str r3, [r2, #0] - 802eec8: e00b b.n 802eee2 - 802eeca: 4b72 ldr r3, [pc, #456] ; (802f094 ) - 802eecc: 681b ldr r3, [r3, #0] - 802eece: 4a71 ldr r2, [pc, #452] ; (802f094 ) - 802eed0: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 802eed4: 6013 str r3, [r2, #0] - 802eed6: 4b6f ldr r3, [pc, #444] ; (802f094 ) - 802eed8: 681b ldr r3, [r3, #0] - 802eeda: 4a6e ldr r2, [pc, #440] ; (802f094 ) - 802eedc: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 802eee0: 6013 str r3, [r2, #0] + 802eec8: 4b7e ldr r3, [pc, #504] ; (802f0c4 ) + 802eeca: 681b ldr r3, [r3, #0] + 802eecc: 4a7d ldr r2, [pc, #500] ; (802f0c4 ) + 802eece: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 802eed2: 6013 str r3, [r2, #0] + 802eed4: e01d b.n 802ef12 + 802eed6: 687b ldr r3, [r7, #4] + 802eed8: 685b ldr r3, [r3, #4] + 802eeda: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 802eede: d10c bne.n 802eefa + 802eee0: 4b78 ldr r3, [pc, #480] ; (802f0c4 ) + 802eee2: 681b ldr r3, [r3, #0] + 802eee4: 4a77 ldr r2, [pc, #476] ; (802f0c4 ) + 802eee6: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 802eeea: 6013 str r3, [r2, #0] + 802eeec: 4b75 ldr r3, [pc, #468] ; (802f0c4 ) + 802eeee: 681b ldr r3, [r3, #0] + 802eef0: 4a74 ldr r2, [pc, #464] ; (802f0c4 ) + 802eef2: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 802eef6: 6013 str r3, [r2, #0] + 802eef8: e00b b.n 802ef12 + 802eefa: 4b72 ldr r3, [pc, #456] ; (802f0c4 ) + 802eefc: 681b ldr r3, [r3, #0] + 802eefe: 4a71 ldr r2, [pc, #452] ; (802f0c4 ) + 802ef00: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 802ef04: 6013 str r3, [r2, #0] + 802ef06: 4b6f ldr r3, [pc, #444] ; (802f0c4 ) + 802ef08: 681b ldr r3, [r3, #0] + 802ef0a: 4a6e ldr r2, [pc, #440] ; (802f0c4 ) + 802ef0c: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 802ef10: 6013 str r3, [r2, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 802eee2: 687b ldr r3, [r7, #4] - 802eee4: 685b ldr r3, [r3, #4] - 802eee6: 2b00 cmp r3, #0 - 802eee8: d013 beq.n 802ef12 + 802ef12: 687b ldr r3, [r7, #4] + 802ef14: 685b ldr r3, [r3, #4] + 802ef16: 2b00 cmp r3, #0 + 802ef18: d013 beq.n 802ef42 { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802eeea: f7f7 f853 bl 8025f94 - 802eeee: 6278 str r0, [r7, #36] ; 0x24 + 802ef1a: f7f7 f853 bl 8025fc4 + 802ef1e: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 802eef0: e008 b.n 802ef04 + 802ef20: e008 b.n 802ef34 { if((uint32_t) (HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 802eef2: f7f7 f84f bl 8025f94 - 802eef6: 4602 mov r2, r0 - 802eef8: 6a7b ldr r3, [r7, #36] ; 0x24 - 802eefa: 1ad3 subs r3, r2, r3 - 802eefc: 2b64 cmp r3, #100 ; 0x64 - 802eefe: d901 bls.n 802ef04 + 802ef22: f7f7 f84f bl 8025fc4 + 802ef26: 4602 mov r2, r0 + 802ef28: 6a7b ldr r3, [r7, #36] ; 0x24 + 802ef2a: 1ad3 subs r3, r2, r3 + 802ef2c: 2b64 cmp r3, #100 ; 0x64 + 802ef2e: d901 bls.n 802ef34 { return HAL_TIMEOUT; - 802ef00: 2303 movs r3, #3 - 802ef02: e3aa b.n 802f65a + 802ef30: 2303 movs r3, #3 + 802ef32: e3aa b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 802ef04: 4b63 ldr r3, [pc, #396] ; (802f094 ) - 802ef06: 681b ldr r3, [r3, #0] - 802ef08: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802ef0c: 2b00 cmp r3, #0 - 802ef0e: d0f0 beq.n 802eef2 - 802ef10: e014 b.n 802ef3c + 802ef34: 4b63 ldr r3, [pc, #396] ; (802f0c4 ) + 802ef36: 681b ldr r3, [r3, #0] + 802ef38: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802ef3c: 2b00 cmp r3, #0 + 802ef3e: d0f0 beq.n 802ef22 + 802ef40: e014 b.n 802ef6c } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802ef12: f7f7 f83f bl 8025f94 - 802ef16: 6278 str r0, [r7, #36] ; 0x24 + 802ef42: f7f7 f83f bl 8025fc4 + 802ef46: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 802ef18: e008 b.n 802ef2c + 802ef48: e008 b.n 802ef5c { if((uint32_t) (HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 802ef1a: f7f7 f83b bl 8025f94 - 802ef1e: 4602 mov r2, r0 - 802ef20: 6a7b ldr r3, [r7, #36] ; 0x24 - 802ef22: 1ad3 subs r3, r2, r3 - 802ef24: 2b64 cmp r3, #100 ; 0x64 - 802ef26: d901 bls.n 802ef2c + 802ef4a: f7f7 f83b bl 8025fc4 + 802ef4e: 4602 mov r2, r0 + 802ef50: 6a7b ldr r3, [r7, #36] ; 0x24 + 802ef52: 1ad3 subs r3, r2, r3 + 802ef54: 2b64 cmp r3, #100 ; 0x64 + 802ef56: d901 bls.n 802ef5c { return HAL_TIMEOUT; - 802ef28: 2303 movs r3, #3 - 802ef2a: e396 b.n 802f65a + 802ef58: 2303 movs r3, #3 + 802ef5a: e396 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 802ef2c: 4b59 ldr r3, [pc, #356] ; (802f094 ) - 802ef2e: 681b ldr r3, [r3, #0] - 802ef30: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802ef34: 2b00 cmp r3, #0 - 802ef36: d1f0 bne.n 802ef1a - 802ef38: e000 b.n 802ef3c + 802ef5c: 4b59 ldr r3, [pc, #356] ; (802f0c4 ) + 802ef5e: 681b ldr r3, [r3, #0] + 802ef60: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802ef64: 2b00 cmp r3, #0 + 802ef66: d1f0 bne.n 802ef4a + 802ef68: e000 b.n 802ef6c if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 802ef3a: bf00 nop + 802ef6a: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 802ef3c: 687b ldr r3, [r7, #4] - 802ef3e: 681b ldr r3, [r3, #0] - 802ef40: f003 0302 and.w r3, r3, #2 - 802ef44: 2b00 cmp r3, #0 - 802ef46: f000 80cb beq.w 802f0e0 + 802ef6c: 687b ldr r3, [r7, #4] + 802ef6e: 681b ldr r3, [r3, #0] + 802ef70: f003 0302 and.w r3, r3, #2 + 802ef74: 2b00 cmp r3, #0 + 802ef76: f000 80cb beq.w 802f110 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_HSICALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* When the HSI is used as system clock it will not be disabled */ const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 802ef4a: 4b52 ldr r3, [pc, #328] ; (802f094 ) - 802ef4c: 691b ldr r3, [r3, #16] - 802ef4e: f003 0338 and.w r3, r3, #56 ; 0x38 - 802ef52: 623b str r3, [r7, #32] + 802ef7a: 4b52 ldr r3, [pc, #328] ; (802f0c4 ) + 802ef7c: 691b ldr r3, [r3, #16] + 802ef7e: f003 0338 and.w r3, r3, #56 ; 0x38 + 802ef82: 623b str r3, [r7, #32] const uint32_t temp_pllckselr = RCC->PLLCKSELR; - 802ef54: 4b4f ldr r3, [pc, #316] ; (802f094 ) - 802ef56: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ef58: 61fb str r3, [r7, #28] + 802ef84: 4b4f ldr r3, [pc, #316] ; (802f0c4 ) + 802ef86: 6a9b ldr r3, [r3, #40] ; 0x28 + 802ef88: 61fb str r3, [r7, #28] if((temp_sysclksrc == RCC_CFGR_SWS_HSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSI))) - 802ef5a: 6a3b ldr r3, [r7, #32] - 802ef5c: 2b00 cmp r3, #0 - 802ef5e: d007 beq.n 802ef70 - 802ef60: 6a3b ldr r3, [r7, #32] - 802ef62: 2b18 cmp r3, #24 - 802ef64: d156 bne.n 802f014 - 802ef66: 69fb ldr r3, [r7, #28] - 802ef68: f003 0303 and.w r3, r3, #3 - 802ef6c: 2b00 cmp r3, #0 - 802ef6e: d151 bne.n 802f014 + 802ef8a: 6a3b ldr r3, [r7, #32] + 802ef8c: 2b00 cmp r3, #0 + 802ef8e: d007 beq.n 802efa0 + 802ef90: 6a3b ldr r3, [r7, #32] + 802ef92: 2b18 cmp r3, #24 + 802ef94: d156 bne.n 802f044 + 802ef96: 69fb ldr r3, [r7, #28] + 802ef98: f003 0303 and.w r3, r3, #3 + 802ef9c: 2b00 cmp r3, #0 + 802ef9e: d151 bne.n 802f044 { /* When HSI is used as system clock it will not be disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 802ef70: 4b48 ldr r3, [pc, #288] ; (802f094 ) - 802ef72: 681b ldr r3, [r3, #0] - 802ef74: f003 0304 and.w r3, r3, #4 - 802ef78: 2b00 cmp r3, #0 - 802ef7a: d005 beq.n 802ef88 - 802ef7c: 687b ldr r3, [r7, #4] - 802ef7e: 68db ldr r3, [r3, #12] - 802ef80: 2b00 cmp r3, #0 - 802ef82: d101 bne.n 802ef88 + 802efa0: 4b48 ldr r3, [pc, #288] ; (802f0c4 ) + 802efa2: 681b ldr r3, [r3, #0] + 802efa4: f003 0304 and.w r3, r3, #4 + 802efa8: 2b00 cmp r3, #0 + 802efaa: d005 beq.n 802efb8 + 802efac: 687b ldr r3, [r7, #4] + 802efae: 68db ldr r3, [r3, #12] + 802efb0: 2b00 cmp r3, #0 + 802efb2: d101 bne.n 802efb8 { return HAL_ERROR; - 802ef84: 2301 movs r3, #1 - 802ef86: e368 b.n 802f65a + 802efb4: 2301 movs r3, #1 + 802efb6: e368 b.n 802f68a } /* Otherwise, only HSI division and calibration are allowed */ else { /* Enable the Internal High Speed oscillator (HSI, HSIDIV2, HSIDIV4, or HSIDIV8) */ __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState); - 802ef88: 4b42 ldr r3, [pc, #264] ; (802f094 ) - 802ef8a: 681b ldr r3, [r3, #0] - 802ef8c: f023 0219 bic.w r2, r3, #25 - 802ef90: 687b ldr r3, [r7, #4] - 802ef92: 68db ldr r3, [r3, #12] - 802ef94: 493f ldr r1, [pc, #252] ; (802f094 ) - 802ef96: 4313 orrs r3, r2 - 802ef98: 600b str r3, [r1, #0] + 802efb8: 4b42 ldr r3, [pc, #264] ; (802f0c4 ) + 802efba: 681b ldr r3, [r3, #0] + 802efbc: f023 0219 bic.w r2, r3, #25 + 802efc0: 687b ldr r3, [r7, #4] + 802efc2: 68db ldr r3, [r3, #12] + 802efc4: 493f ldr r1, [pc, #252] ; (802f0c4 ) + 802efc6: 4313 orrs r3, r2 + 802efc8: 600b str r3, [r1, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802ef9a: f7f6 fffb bl 8025f94 - 802ef9e: 6278 str r0, [r7, #36] ; 0x24 + 802efca: f7f6 fffb bl 8025fc4 + 802efce: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802efa0: e008 b.n 802efb4 + 802efd0: e008 b.n 802efe4 { if((uint32_t) (HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 802efa2: f7f6 fff7 bl 8025f94 - 802efa6: 4602 mov r2, r0 - 802efa8: 6a7b ldr r3, [r7, #36] ; 0x24 - 802efaa: 1ad3 subs r3, r2, r3 - 802efac: 2b02 cmp r3, #2 - 802efae: d901 bls.n 802efb4 + 802efd2: f7f6 fff7 bl 8025fc4 + 802efd6: 4602 mov r2, r0 + 802efd8: 6a7b ldr r3, [r7, #36] ; 0x24 + 802efda: 1ad3 subs r3, r2, r3 + 802efdc: 2b02 cmp r3, #2 + 802efde: d901 bls.n 802efe4 { return HAL_TIMEOUT; - 802efb0: 2303 movs r3, #3 - 802efb2: e352 b.n 802f65a + 802efe0: 2303 movs r3, #3 + 802efe2: e352 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802efb4: 4b37 ldr r3, [pc, #220] ; (802f094 ) - 802efb6: 681b ldr r3, [r3, #0] - 802efb8: f003 0304 and.w r3, r3, #4 - 802efbc: 2b00 cmp r3, #0 - 802efbe: d0f0 beq.n 802efa2 + 802efe4: 4b37 ldr r3, [pc, #220] ; (802f0c4 ) + 802efe6: 681b ldr r3, [r3, #0] + 802efe8: f003 0304 and.w r3, r3, #4 + 802efec: 2b00 cmp r3, #0 + 802efee: d0f0 beq.n 802efd2 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 802efc0: f7f7 f818 bl 8025ff4 - 802efc4: 4603 mov r3, r0 - 802efc6: f241 0203 movw r2, #4099 ; 0x1003 - 802efca: 4293 cmp r3, r2 - 802efcc: d817 bhi.n 802effe - 802efce: 687b ldr r3, [r7, #4] - 802efd0: 691b ldr r3, [r3, #16] - 802efd2: 2b40 cmp r3, #64 ; 0x40 - 802efd4: d108 bne.n 802efe8 - 802efd6: 4b2f ldr r3, [pc, #188] ; (802f094 ) - 802efd8: 685b ldr r3, [r3, #4] - 802efda: f423 337c bic.w r3, r3, #258048 ; 0x3f000 - 802efde: 4a2d ldr r2, [pc, #180] ; (802f094 ) - 802efe0: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802efe4: 6053 str r3, [r2, #4] + 802eff0: f7f7 f818 bl 8026024 + 802eff4: 4603 mov r3, r0 + 802eff6: f241 0203 movw r2, #4099 ; 0x1003 + 802effa: 4293 cmp r3, r2 + 802effc: d817 bhi.n 802f02e + 802effe: 687b ldr r3, [r7, #4] + 802f000: 691b ldr r3, [r3, #16] + 802f002: 2b40 cmp r3, #64 ; 0x40 + 802f004: d108 bne.n 802f018 + 802f006: 4b2f ldr r3, [pc, #188] ; (802f0c4 ) + 802f008: 685b ldr r3, [r3, #4] + 802f00a: f423 337c bic.w r3, r3, #258048 ; 0x3f000 + 802f00e: 4a2d ldr r2, [pc, #180] ; (802f0c4 ) + 802f010: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802f014: 6053 str r3, [r2, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 802efe6: e07b b.n 802f0e0 + 802f016: e07b b.n 802f110 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 802efe8: 4b2a ldr r3, [pc, #168] ; (802f094 ) - 802efea: 685b ldr r3, [r3, #4] - 802efec: f423 327c bic.w r2, r3, #258048 ; 0x3f000 - 802eff0: 687b ldr r3, [r7, #4] - 802eff2: 691b ldr r3, [r3, #16] - 802eff4: 031b lsls r3, r3, #12 - 802eff6: 4927 ldr r1, [pc, #156] ; (802f094 ) - 802eff8: 4313 orrs r3, r2 - 802effa: 604b str r3, [r1, #4] + 802f018: 4b2a ldr r3, [pc, #168] ; (802f0c4 ) + 802f01a: 685b ldr r3, [r3, #4] + 802f01c: f423 327c bic.w r2, r3, #258048 ; 0x3f000 + 802f020: 687b ldr r3, [r7, #4] + 802f022: 691b ldr r3, [r3, #16] + 802f024: 031b lsls r3, r3, #12 + 802f026: 4927 ldr r1, [pc, #156] ; (802f0c4 ) + 802f028: 4313 orrs r3, r2 + 802f02a: 604b str r3, [r1, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 802effc: e070 b.n 802f0e0 + 802f02c: e070 b.n 802f110 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 802effe: 4b25 ldr r3, [pc, #148] ; (802f094 ) - 802f000: 685b ldr r3, [r3, #4] - 802f002: f023 42fe bic.w r2, r3, #2130706432 ; 0x7f000000 - 802f006: 687b ldr r3, [r7, #4] - 802f008: 691b ldr r3, [r3, #16] - 802f00a: 061b lsls r3, r3, #24 - 802f00c: 4921 ldr r1, [pc, #132] ; (802f094 ) - 802f00e: 4313 orrs r3, r2 - 802f010: 604b str r3, [r1, #4] + 802f02e: 4b25 ldr r3, [pc, #148] ; (802f0c4 ) + 802f030: 685b ldr r3, [r3, #4] + 802f032: f023 42fe bic.w r2, r3, #2130706432 ; 0x7f000000 + 802f036: 687b ldr r3, [r7, #4] + 802f038: 691b ldr r3, [r3, #16] + 802f03a: 061b lsls r3, r3, #24 + 802f03c: 4921 ldr r1, [pc, #132] ; (802f0c4 ) + 802f03e: 4313 orrs r3, r2 + 802f040: 604b str r3, [r1, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 802f012: e065 b.n 802f0e0 + 802f042: e065 b.n 802f110 } else { /* Check the HSI State */ if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) - 802f014: 687b ldr r3, [r7, #4] - 802f016: 68db ldr r3, [r3, #12] - 802f018: 2b00 cmp r3, #0 - 802f01a: d048 beq.n 802f0ae + 802f044: 687b ldr r3, [r7, #4] + 802f046: 68db ldr r3, [r3, #12] + 802f048: 2b00 cmp r3, #0 + 802f04a: d048 beq.n 802f0de { /* Enable the Internal High Speed oscillator (HSI, HSIDIV2,HSIDIV4, or HSIDIV8) */ __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState); - 802f01c: 4b1d ldr r3, [pc, #116] ; (802f094 ) - 802f01e: 681b ldr r3, [r3, #0] - 802f020: f023 0219 bic.w r2, r3, #25 - 802f024: 687b ldr r3, [r7, #4] - 802f026: 68db ldr r3, [r3, #12] - 802f028: 491a ldr r1, [pc, #104] ; (802f094 ) - 802f02a: 4313 orrs r3, r2 - 802f02c: 600b str r3, [r1, #0] + 802f04c: 4b1d ldr r3, [pc, #116] ; (802f0c4 ) + 802f04e: 681b ldr r3, [r3, #0] + 802f050: f023 0219 bic.w r2, r3, #25 + 802f054: 687b ldr r3, [r7, #4] + 802f056: 68db ldr r3, [r3, #12] + 802f058: 491a ldr r1, [pc, #104] ; (802f0c4 ) + 802f05a: 4313 orrs r3, r2 + 802f05c: 600b str r3, [r1, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f02e: f7f6 ffb1 bl 8025f94 - 802f032: 6278 str r0, [r7, #36] ; 0x24 + 802f05e: f7f6 ffb1 bl 8025fc4 + 802f062: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802f034: e008 b.n 802f048 + 802f064: e008 b.n 802f078 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 802f036: f7f6 ffad bl 8025f94 - 802f03a: 4602 mov r2, r0 - 802f03c: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f03e: 1ad3 subs r3, r2, r3 - 802f040: 2b02 cmp r3, #2 - 802f042: d901 bls.n 802f048 + 802f066: f7f6 ffad bl 8025fc4 + 802f06a: 4602 mov r2, r0 + 802f06c: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f06e: 1ad3 subs r3, r2, r3 + 802f070: 2b02 cmp r3, #2 + 802f072: d901 bls.n 802f078 { return HAL_TIMEOUT; - 802f044: 2303 movs r3, #3 - 802f046: e308 b.n 802f65a + 802f074: 2303 movs r3, #3 + 802f076: e308 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802f048: 4b12 ldr r3, [pc, #72] ; (802f094 ) - 802f04a: 681b ldr r3, [r3, #0] - 802f04c: f003 0304 and.w r3, r3, #4 - 802f050: 2b00 cmp r3, #0 - 802f052: d0f0 beq.n 802f036 + 802f078: 4b12 ldr r3, [pc, #72] ; (802f0c4 ) + 802f07a: 681b ldr r3, [r3, #0] + 802f07c: f003 0304 and.w r3, r3, #4 + 802f080: 2b00 cmp r3, #0 + 802f082: d0f0 beq.n 802f066 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 802f054: f7f6 ffce bl 8025ff4 - 802f058: 4603 mov r3, r0 - 802f05a: f241 0203 movw r2, #4099 ; 0x1003 - 802f05e: 4293 cmp r3, r2 - 802f060: d81a bhi.n 802f098 - 802f062: 687b ldr r3, [r7, #4] - 802f064: 691b ldr r3, [r3, #16] - 802f066: 2b40 cmp r3, #64 ; 0x40 - 802f068: d108 bne.n 802f07c - 802f06a: 4b0a ldr r3, [pc, #40] ; (802f094 ) - 802f06c: 685b ldr r3, [r3, #4] - 802f06e: f423 337c bic.w r3, r3, #258048 ; 0x3f000 - 802f072: 4a08 ldr r2, [pc, #32] ; (802f094 ) - 802f074: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802f078: 6053 str r3, [r2, #4] - 802f07a: e031 b.n 802f0e0 - 802f07c: 4b05 ldr r3, [pc, #20] ; (802f094 ) - 802f07e: 685b ldr r3, [r3, #4] - 802f080: f423 327c bic.w r2, r3, #258048 ; 0x3f000 - 802f084: 687b ldr r3, [r7, #4] - 802f086: 691b ldr r3, [r3, #16] - 802f088: 031b lsls r3, r3, #12 - 802f08a: 4902 ldr r1, [pc, #8] ; (802f094 ) - 802f08c: 4313 orrs r3, r2 - 802f08e: 604b str r3, [r1, #4] - 802f090: e026 b.n 802f0e0 - 802f092: bf00 nop - 802f094: 58024400 .word 0x58024400 - 802f098: 4b9a ldr r3, [pc, #616] ; (802f304 ) - 802f09a: 685b ldr r3, [r3, #4] - 802f09c: f023 42fe bic.w r2, r3, #2130706432 ; 0x7f000000 - 802f0a0: 687b ldr r3, [r7, #4] - 802f0a2: 691b ldr r3, [r3, #16] - 802f0a4: 061b lsls r3, r3, #24 - 802f0a6: 4997 ldr r1, [pc, #604] ; (802f304 ) - 802f0a8: 4313 orrs r3, r2 - 802f0aa: 604b str r3, [r1, #4] - 802f0ac: e018 b.n 802f0e0 + 802f084: f7f6 ffce bl 8026024 + 802f088: 4603 mov r3, r0 + 802f08a: f241 0203 movw r2, #4099 ; 0x1003 + 802f08e: 4293 cmp r3, r2 + 802f090: d81a bhi.n 802f0c8 + 802f092: 687b ldr r3, [r7, #4] + 802f094: 691b ldr r3, [r3, #16] + 802f096: 2b40 cmp r3, #64 ; 0x40 + 802f098: d108 bne.n 802f0ac + 802f09a: 4b0a ldr r3, [pc, #40] ; (802f0c4 ) + 802f09c: 685b ldr r3, [r3, #4] + 802f09e: f423 337c bic.w r3, r3, #258048 ; 0x3f000 + 802f0a2: 4a08 ldr r2, [pc, #32] ; (802f0c4 ) + 802f0a4: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802f0a8: 6053 str r3, [r2, #4] + 802f0aa: e031 b.n 802f110 + 802f0ac: 4b05 ldr r3, [pc, #20] ; (802f0c4 ) + 802f0ae: 685b ldr r3, [r3, #4] + 802f0b0: f423 327c bic.w r2, r3, #258048 ; 0x3f000 + 802f0b4: 687b ldr r3, [r7, #4] + 802f0b6: 691b ldr r3, [r3, #16] + 802f0b8: 031b lsls r3, r3, #12 + 802f0ba: 4902 ldr r1, [pc, #8] ; (802f0c4 ) + 802f0bc: 4313 orrs r3, r2 + 802f0be: 604b str r3, [r1, #4] + 802f0c0: e026 b.n 802f110 + 802f0c2: bf00 nop + 802f0c4: 58024400 .word 0x58024400 + 802f0c8: 4b9a ldr r3, [pc, #616] ; (802f334 ) + 802f0ca: 685b ldr r3, [r3, #4] + 802f0cc: f023 42fe bic.w r2, r3, #2130706432 ; 0x7f000000 + 802f0d0: 687b ldr r3, [r7, #4] + 802f0d2: 691b ldr r3, [r3, #16] + 802f0d4: 061b lsls r3, r3, #24 + 802f0d6: 4997 ldr r1, [pc, #604] ; (802f334 ) + 802f0d8: 4313 orrs r3, r2 + 802f0da: 604b str r3, [r1, #4] + 802f0dc: e018 b.n 802f110 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 802f0ae: 4b95 ldr r3, [pc, #596] ; (802f304 ) - 802f0b0: 681b ldr r3, [r3, #0] - 802f0b2: 4a94 ldr r2, [pc, #592] ; (802f304 ) - 802f0b4: f023 0301 bic.w r3, r3, #1 - 802f0b8: 6013 str r3, [r2, #0] + 802f0de: 4b95 ldr r3, [pc, #596] ; (802f334 ) + 802f0e0: 681b ldr r3, [r3, #0] + 802f0e2: 4a94 ldr r2, [pc, #592] ; (802f334 ) + 802f0e4: f023 0301 bic.w r3, r3, #1 + 802f0e8: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f0ba: f7f6 ff6b bl 8025f94 - 802f0be: 6278 str r0, [r7, #36] ; 0x24 + 802f0ea: f7f6 ff6b bl 8025fc4 + 802f0ee: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 802f0c0: e008 b.n 802f0d4 + 802f0f0: e008 b.n 802f104 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 802f0c2: f7f6 ff67 bl 8025f94 - 802f0c6: 4602 mov r2, r0 - 802f0c8: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f0ca: 1ad3 subs r3, r2, r3 - 802f0cc: 2b02 cmp r3, #2 - 802f0ce: d901 bls.n 802f0d4 + 802f0f2: f7f6 ff67 bl 8025fc4 + 802f0f6: 4602 mov r2, r0 + 802f0f8: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f0fa: 1ad3 subs r3, r2, r3 + 802f0fc: 2b02 cmp r3, #2 + 802f0fe: d901 bls.n 802f104 { return HAL_TIMEOUT; - 802f0d0: 2303 movs r3, #3 - 802f0d2: e2c2 b.n 802f65a + 802f100: 2303 movs r3, #3 + 802f102: e2c2 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 802f0d4: 4b8b ldr r3, [pc, #556] ; (802f304 ) - 802f0d6: 681b ldr r3, [r3, #0] - 802f0d8: f003 0304 and.w r3, r3, #4 - 802f0dc: 2b00 cmp r3, #0 - 802f0de: d1f0 bne.n 802f0c2 + 802f104: 4b8b ldr r3, [pc, #556] ; (802f334 ) + 802f106: 681b ldr r3, [r3, #0] + 802f108: f003 0304 and.w r3, r3, #4 + 802f10c: 2b00 cmp r3, #0 + 802f10e: d1f0 bne.n 802f0f2 } } } } /*----------------------------- CSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_CSI) == RCC_OSCILLATORTYPE_CSI) - 802f0e0: 687b ldr r3, [r7, #4] - 802f0e2: 681b ldr r3, [r3, #0] - 802f0e4: f003 0310 and.w r3, r3, #16 - 802f0e8: 2b00 cmp r3, #0 - 802f0ea: f000 80a9 beq.w 802f240 + 802f110: 687b ldr r3, [r7, #4] + 802f112: 681b ldr r3, [r3, #0] + 802f114: f003 0310 and.w r3, r3, #16 + 802f118: 2b00 cmp r3, #0 + 802f11a: f000 80a9 beq.w 802f270 /* Check the parameters */ assert_param(IS_RCC_CSI(RCC_OscInitStruct->CSIState)); assert_param(IS_RCC_CSICALIBRATION_VALUE(RCC_OscInitStruct->CSICalibrationValue)); /* When the CSI is used as system clock it will not disabled */ const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 802f0ee: 4b85 ldr r3, [pc, #532] ; (802f304 ) - 802f0f0: 691b ldr r3, [r3, #16] - 802f0f2: f003 0338 and.w r3, r3, #56 ; 0x38 - 802f0f6: 61bb str r3, [r7, #24] + 802f11e: 4b85 ldr r3, [pc, #532] ; (802f334 ) + 802f120: 691b ldr r3, [r3, #16] + 802f122: f003 0338 and.w r3, r3, #56 ; 0x38 + 802f126: 61bb str r3, [r7, #24] const uint32_t temp_pllckselr = RCC->PLLCKSELR; - 802f0f8: 4b82 ldr r3, [pc, #520] ; (802f304 ) - 802f0fa: 6a9b ldr r3, [r3, #40] ; 0x28 - 802f0fc: 617b str r3, [r7, #20] + 802f128: 4b82 ldr r3, [pc, #520] ; (802f334 ) + 802f12a: 6a9b ldr r3, [r3, #40] ; 0x28 + 802f12c: 617b str r3, [r7, #20] if((temp_sysclksrc == RCC_CFGR_SWS_CSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_CSI))) - 802f0fe: 69bb ldr r3, [r7, #24] - 802f100: 2b08 cmp r3, #8 - 802f102: d007 beq.n 802f114 - 802f104: 69bb ldr r3, [r7, #24] - 802f106: 2b18 cmp r3, #24 - 802f108: d13a bne.n 802f180 - 802f10a: 697b ldr r3, [r7, #20] - 802f10c: f003 0303 and.w r3, r3, #3 - 802f110: 2b01 cmp r3, #1 - 802f112: d135 bne.n 802f180 + 802f12e: 69bb ldr r3, [r7, #24] + 802f130: 2b08 cmp r3, #8 + 802f132: d007 beq.n 802f144 + 802f134: 69bb ldr r3, [r7, #24] + 802f136: 2b18 cmp r3, #24 + 802f138: d13a bne.n 802f1b0 + 802f13a: 697b ldr r3, [r7, #20] + 802f13c: f003 0303 and.w r3, r3, #3 + 802f140: 2b01 cmp r3, #1 + 802f142: d135 bne.n 802f1b0 { /* When CSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON)) - 802f114: 4b7b ldr r3, [pc, #492] ; (802f304 ) - 802f116: 681b ldr r3, [r3, #0] - 802f118: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f11c: 2b00 cmp r3, #0 - 802f11e: d005 beq.n 802f12c - 802f120: 687b ldr r3, [r7, #4] - 802f122: 69db ldr r3, [r3, #28] - 802f124: 2b80 cmp r3, #128 ; 0x80 - 802f126: d001 beq.n 802f12c + 802f144: 4b7b ldr r3, [pc, #492] ; (802f334 ) + 802f146: 681b ldr r3, [r3, #0] + 802f148: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f14c: 2b00 cmp r3, #0 + 802f14e: d005 beq.n 802f15c + 802f150: 687b ldr r3, [r7, #4] + 802f152: 69db ldr r3, [r3, #28] + 802f154: 2b80 cmp r3, #128 ; 0x80 + 802f156: d001 beq.n 802f15c { return HAL_ERROR; - 802f128: 2301 movs r3, #1 - 802f12a: e296 b.n 802f65a + 802f158: 2301 movs r3, #1 + 802f15a: e296 b.n 802f68a } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/ __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue); - 802f12c: f7f6 ff62 bl 8025ff4 - 802f130: 4603 mov r3, r0 - 802f132: f241 0203 movw r2, #4099 ; 0x1003 - 802f136: 4293 cmp r3, r2 - 802f138: d817 bhi.n 802f16a - 802f13a: 687b ldr r3, [r7, #4] - 802f13c: 6a1b ldr r3, [r3, #32] - 802f13e: 2b20 cmp r3, #32 - 802f140: d108 bne.n 802f154 - 802f142: 4b70 ldr r3, [pc, #448] ; (802f304 ) - 802f144: 685b ldr r3, [r3, #4] - 802f146: f023 43f8 bic.w r3, r3, #2080374784 ; 0x7c000000 - 802f14a: 4a6e ldr r2, [pc, #440] ; (802f304 ) - 802f14c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 - 802f150: 6053 str r3, [r2, #4] + 802f15c: f7f6 ff62 bl 8026024 + 802f160: 4603 mov r3, r0 + 802f162: f241 0203 movw r2, #4099 ; 0x1003 + 802f166: 4293 cmp r3, r2 + 802f168: d817 bhi.n 802f19a + 802f16a: 687b ldr r3, [r7, #4] + 802f16c: 6a1b ldr r3, [r3, #32] + 802f16e: 2b20 cmp r3, #32 + 802f170: d108 bne.n 802f184 + 802f172: 4b70 ldr r3, [pc, #448] ; (802f334 ) + 802f174: 685b ldr r3, [r3, #4] + 802f176: f023 43f8 bic.w r3, r3, #2080374784 ; 0x7c000000 + 802f17a: 4a6e ldr r2, [pc, #440] ; (802f334 ) + 802f17c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 + 802f180: 6053 str r3, [r2, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON)) - 802f152: e075 b.n 802f240 + 802f182: e075 b.n 802f270 __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue); - 802f154: 4b6b ldr r3, [pc, #428] ; (802f304 ) - 802f156: 685b ldr r3, [r3, #4] - 802f158: f023 42f8 bic.w r2, r3, #2080374784 ; 0x7c000000 - 802f15c: 687b ldr r3, [r7, #4] - 802f15e: 6a1b ldr r3, [r3, #32] - 802f160: 069b lsls r3, r3, #26 - 802f162: 4968 ldr r1, [pc, #416] ; (802f304 ) - 802f164: 4313 orrs r3, r2 - 802f166: 604b str r3, [r1, #4] + 802f184: 4b6b ldr r3, [pc, #428] ; (802f334 ) + 802f186: 685b ldr r3, [r3, #4] + 802f188: f023 42f8 bic.w r2, r3, #2080374784 ; 0x7c000000 + 802f18c: 687b ldr r3, [r7, #4] + 802f18e: 6a1b ldr r3, [r3, #32] + 802f190: 069b lsls r3, r3, #26 + 802f192: 4968 ldr r1, [pc, #416] ; (802f334 ) + 802f194: 4313 orrs r3, r2 + 802f196: 604b str r3, [r1, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON)) - 802f168: e06a b.n 802f240 + 802f198: e06a b.n 802f270 __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue); - 802f16a: 4b66 ldr r3, [pc, #408] ; (802f304 ) - 802f16c: 68db ldr r3, [r3, #12] - 802f16e: f023 527c bic.w r2, r3, #1056964608 ; 0x3f000000 - 802f172: 687b ldr r3, [r7, #4] - 802f174: 6a1b ldr r3, [r3, #32] - 802f176: 061b lsls r3, r3, #24 - 802f178: 4962 ldr r1, [pc, #392] ; (802f304 ) - 802f17a: 4313 orrs r3, r2 - 802f17c: 60cb str r3, [r1, #12] + 802f19a: 4b66 ldr r3, [pc, #408] ; (802f334 ) + 802f19c: 68db ldr r3, [r3, #12] + 802f19e: f023 527c bic.w r2, r3, #1056964608 ; 0x3f000000 + 802f1a2: 687b ldr r3, [r7, #4] + 802f1a4: 6a1b ldr r3, [r3, #32] + 802f1a6: 061b lsls r3, r3, #24 + 802f1a8: 4962 ldr r1, [pc, #392] ; (802f334 ) + 802f1aa: 4313 orrs r3, r2 + 802f1ac: 60cb str r3, [r1, #12] if((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON)) - 802f17e: e05f b.n 802f240 + 802f1ae: e05f b.n 802f270 } } else { /* Check the CSI State */ if((RCC_OscInitStruct->CSIState)!= RCC_CSI_OFF) - 802f180: 687b ldr r3, [r7, #4] - 802f182: 69db ldr r3, [r3, #28] - 802f184: 2b00 cmp r3, #0 - 802f186: d042 beq.n 802f20e + 802f1b0: 687b ldr r3, [r7, #4] + 802f1b2: 69db ldr r3, [r3, #28] + 802f1b4: 2b00 cmp r3, #0 + 802f1b6: d042 beq.n 802f23e { /* Enable the Internal High Speed oscillator (CSI). */ __HAL_RCC_CSI_ENABLE(); - 802f188: 4b5e ldr r3, [pc, #376] ; (802f304 ) - 802f18a: 681b ldr r3, [r3, #0] - 802f18c: 4a5d ldr r2, [pc, #372] ; (802f304 ) - 802f18e: f043 0380 orr.w r3, r3, #128 ; 0x80 - 802f192: 6013 str r3, [r2, #0] + 802f1b8: 4b5e ldr r3, [pc, #376] ; (802f334 ) + 802f1ba: 681b ldr r3, [r3, #0] + 802f1bc: 4a5d ldr r2, [pc, #372] ; (802f334 ) + 802f1be: f043 0380 orr.w r3, r3, #128 ; 0x80 + 802f1c2: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f194: f7f6 fefe bl 8025f94 - 802f198: 6278 str r0, [r7, #36] ; 0x24 + 802f1c4: f7f6 fefe bl 8025fc4 + 802f1c8: 6278 str r0, [r7, #36] ; 0x24 /* Wait till CSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U) - 802f19a: e008 b.n 802f1ae + 802f1ca: e008 b.n 802f1de { if((HAL_GetTick() - tickstart ) > CSI_TIMEOUT_VALUE) - 802f19c: f7f6 fefa bl 8025f94 - 802f1a0: 4602 mov r2, r0 - 802f1a2: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f1a4: 1ad3 subs r3, r2, r3 - 802f1a6: 2b02 cmp r3, #2 - 802f1a8: d901 bls.n 802f1ae + 802f1cc: f7f6 fefa bl 8025fc4 + 802f1d0: 4602 mov r2, r0 + 802f1d2: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f1d4: 1ad3 subs r3, r2, r3 + 802f1d6: 2b02 cmp r3, #2 + 802f1d8: d901 bls.n 802f1de { return HAL_TIMEOUT; - 802f1aa: 2303 movs r3, #3 - 802f1ac: e255 b.n 802f65a + 802f1da: 2303 movs r3, #3 + 802f1dc: e255 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U) - 802f1ae: 4b55 ldr r3, [pc, #340] ; (802f304 ) - 802f1b0: 681b ldr r3, [r3, #0] - 802f1b2: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f1b6: 2b00 cmp r3, #0 - 802f1b8: d0f0 beq.n 802f19c + 802f1de: 4b55 ldr r3, [pc, #340] ; (802f334 ) + 802f1e0: 681b ldr r3, [r3, #0] + 802f1e2: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f1e6: 2b00 cmp r3, #0 + 802f1e8: d0f0 beq.n 802f1cc } } /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/ __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue); - 802f1ba: f7f6 ff1b bl 8025ff4 - 802f1be: 4603 mov r3, r0 - 802f1c0: f241 0203 movw r2, #4099 ; 0x1003 - 802f1c4: 4293 cmp r3, r2 - 802f1c6: d817 bhi.n 802f1f8 - 802f1c8: 687b ldr r3, [r7, #4] - 802f1ca: 6a1b ldr r3, [r3, #32] - 802f1cc: 2b20 cmp r3, #32 - 802f1ce: d108 bne.n 802f1e2 - 802f1d0: 4b4c ldr r3, [pc, #304] ; (802f304 ) - 802f1d2: 685b ldr r3, [r3, #4] - 802f1d4: f023 43f8 bic.w r3, r3, #2080374784 ; 0x7c000000 - 802f1d8: 4a4a ldr r2, [pc, #296] ; (802f304 ) - 802f1da: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 - 802f1de: 6053 str r3, [r2, #4] - 802f1e0: e02e b.n 802f240 - 802f1e2: 4b48 ldr r3, [pc, #288] ; (802f304 ) - 802f1e4: 685b ldr r3, [r3, #4] - 802f1e6: f023 42f8 bic.w r2, r3, #2080374784 ; 0x7c000000 - 802f1ea: 687b ldr r3, [r7, #4] - 802f1ec: 6a1b ldr r3, [r3, #32] - 802f1ee: 069b lsls r3, r3, #26 - 802f1f0: 4944 ldr r1, [pc, #272] ; (802f304 ) - 802f1f2: 4313 orrs r3, r2 - 802f1f4: 604b str r3, [r1, #4] - 802f1f6: e023 b.n 802f240 - 802f1f8: 4b42 ldr r3, [pc, #264] ; (802f304 ) - 802f1fa: 68db ldr r3, [r3, #12] - 802f1fc: f023 527c bic.w r2, r3, #1056964608 ; 0x3f000000 - 802f200: 687b ldr r3, [r7, #4] - 802f202: 6a1b ldr r3, [r3, #32] - 802f204: 061b lsls r3, r3, #24 - 802f206: 493f ldr r1, [pc, #252] ; (802f304 ) - 802f208: 4313 orrs r3, r2 - 802f20a: 60cb str r3, [r1, #12] - 802f20c: e018 b.n 802f240 + 802f1ea: f7f6 ff1b bl 8026024 + 802f1ee: 4603 mov r3, r0 + 802f1f0: f241 0203 movw r2, #4099 ; 0x1003 + 802f1f4: 4293 cmp r3, r2 + 802f1f6: d817 bhi.n 802f228 + 802f1f8: 687b ldr r3, [r7, #4] + 802f1fa: 6a1b ldr r3, [r3, #32] + 802f1fc: 2b20 cmp r3, #32 + 802f1fe: d108 bne.n 802f212 + 802f200: 4b4c ldr r3, [pc, #304] ; (802f334 ) + 802f202: 685b ldr r3, [r3, #4] + 802f204: f023 43f8 bic.w r3, r3, #2080374784 ; 0x7c000000 + 802f208: 4a4a ldr r2, [pc, #296] ; (802f334 ) + 802f20a: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 + 802f20e: 6053 str r3, [r2, #4] + 802f210: e02e b.n 802f270 + 802f212: 4b48 ldr r3, [pc, #288] ; (802f334 ) + 802f214: 685b ldr r3, [r3, #4] + 802f216: f023 42f8 bic.w r2, r3, #2080374784 ; 0x7c000000 + 802f21a: 687b ldr r3, [r7, #4] + 802f21c: 6a1b ldr r3, [r3, #32] + 802f21e: 069b lsls r3, r3, #26 + 802f220: 4944 ldr r1, [pc, #272] ; (802f334 ) + 802f222: 4313 orrs r3, r2 + 802f224: 604b str r3, [r1, #4] + 802f226: e023 b.n 802f270 + 802f228: 4b42 ldr r3, [pc, #264] ; (802f334 ) + 802f22a: 68db ldr r3, [r3, #12] + 802f22c: f023 527c bic.w r2, r3, #1056964608 ; 0x3f000000 + 802f230: 687b ldr r3, [r7, #4] + 802f232: 6a1b ldr r3, [r3, #32] + 802f234: 061b lsls r3, r3, #24 + 802f236: 493f ldr r1, [pc, #252] ; (802f334 ) + 802f238: 4313 orrs r3, r2 + 802f23a: 60cb str r3, [r1, #12] + 802f23c: e018 b.n 802f270 } else { /* Disable the Internal High Speed oscillator (CSI). */ __HAL_RCC_CSI_DISABLE(); - 802f20e: 4b3d ldr r3, [pc, #244] ; (802f304 ) - 802f210: 681b ldr r3, [r3, #0] - 802f212: 4a3c ldr r2, [pc, #240] ; (802f304 ) - 802f214: f023 0380 bic.w r3, r3, #128 ; 0x80 - 802f218: 6013 str r3, [r2, #0] + 802f23e: 4b3d ldr r3, [pc, #244] ; (802f334 ) + 802f240: 681b ldr r3, [r3, #0] + 802f242: 4a3c ldr r2, [pc, #240] ; (802f334 ) + 802f244: f023 0380 bic.w r3, r3, #128 ; 0x80 + 802f248: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f21a: f7f6 febb bl 8025f94 - 802f21e: 6278 str r0, [r7, #36] ; 0x24 + 802f24a: f7f6 febb bl 8025fc4 + 802f24e: 6278 str r0, [r7, #36] ; 0x24 /* Wait till CSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) - 802f220: e008 b.n 802f234 + 802f250: e008 b.n 802f264 { if((HAL_GetTick() - tickstart ) > CSI_TIMEOUT_VALUE) - 802f222: f7f6 feb7 bl 8025f94 - 802f226: 4602 mov r2, r0 - 802f228: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f22a: 1ad3 subs r3, r2, r3 - 802f22c: 2b02 cmp r3, #2 - 802f22e: d901 bls.n 802f234 + 802f252: f7f6 feb7 bl 8025fc4 + 802f256: 4602 mov r2, r0 + 802f258: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f25a: 1ad3 subs r3, r2, r3 + 802f25c: 2b02 cmp r3, #2 + 802f25e: d901 bls.n 802f264 { return HAL_TIMEOUT; - 802f230: 2303 movs r3, #3 - 802f232: e212 b.n 802f65a + 802f260: 2303 movs r3, #3 + 802f262: e212 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) - 802f234: 4b33 ldr r3, [pc, #204] ; (802f304 ) - 802f236: 681b ldr r3, [r3, #0] - 802f238: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f23c: 2b00 cmp r3, #0 - 802f23e: d1f0 bne.n 802f222 + 802f264: 4b33 ldr r3, [pc, #204] ; (802f334 ) + 802f266: 681b ldr r3, [r3, #0] + 802f268: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f26c: 2b00 cmp r3, #0 + 802f26e: d1f0 bne.n 802f252 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 802f240: 687b ldr r3, [r7, #4] - 802f242: 681b ldr r3, [r3, #0] - 802f244: f003 0308 and.w r3, r3, #8 - 802f248: 2b00 cmp r3, #0 - 802f24a: d036 beq.n 802f2ba + 802f270: 687b ldr r3, [r7, #4] + 802f272: 681b ldr r3, [r3, #0] + 802f274: f003 0308 and.w r3, r3, #8 + 802f278: 2b00 cmp r3, #0 + 802f27a: d036 beq.n 802f2ea { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) - 802f24c: 687b ldr r3, [r7, #4] - 802f24e: 695b ldr r3, [r3, #20] - 802f250: 2b00 cmp r3, #0 - 802f252: d019 beq.n 802f288 + 802f27c: 687b ldr r3, [r7, #4] + 802f27e: 695b ldr r3, [r3, #20] + 802f280: 2b00 cmp r3, #0 + 802f282: d019 beq.n 802f2b8 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 802f254: 4b2b ldr r3, [pc, #172] ; (802f304 ) - 802f256: 6f5b ldr r3, [r3, #116] ; 0x74 - 802f258: 4a2a ldr r2, [pc, #168] ; (802f304 ) - 802f25a: f043 0301 orr.w r3, r3, #1 - 802f25e: 6753 str r3, [r2, #116] ; 0x74 + 802f284: 4b2b ldr r3, [pc, #172] ; (802f334 ) + 802f286: 6f5b ldr r3, [r3, #116] ; 0x74 + 802f288: 4a2a ldr r2, [pc, #168] ; (802f334 ) + 802f28a: f043 0301 orr.w r3, r3, #1 + 802f28e: 6753 str r3, [r2, #116] ; 0x74 /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f260: f7f6 fe98 bl 8025f94 - 802f264: 6278 str r0, [r7, #36] ; 0x24 + 802f290: f7f6 fe98 bl 8025fc4 + 802f294: 6278 str r0, [r7, #36] ; 0x24 /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 802f266: e008 b.n 802f27a + 802f296: e008 b.n 802f2aa { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 802f268: f7f6 fe94 bl 8025f94 - 802f26c: 4602 mov r2, r0 - 802f26e: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f270: 1ad3 subs r3, r2, r3 - 802f272: 2b02 cmp r3, #2 - 802f274: d901 bls.n 802f27a + 802f298: f7f6 fe94 bl 8025fc4 + 802f29c: 4602 mov r2, r0 + 802f29e: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f2a0: 1ad3 subs r3, r2, r3 + 802f2a2: 2b02 cmp r3, #2 + 802f2a4: d901 bls.n 802f2aa { return HAL_TIMEOUT; - 802f276: 2303 movs r3, #3 - 802f278: e1ef b.n 802f65a + 802f2a6: 2303 movs r3, #3 + 802f2a8: e1ef b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 802f27a: 4b22 ldr r3, [pc, #136] ; (802f304 ) - 802f27c: 6f5b ldr r3, [r3, #116] ; 0x74 - 802f27e: f003 0302 and.w r3, r3, #2 - 802f282: 2b00 cmp r3, #0 - 802f284: d0f0 beq.n 802f268 - 802f286: e018 b.n 802f2ba + 802f2aa: 4b22 ldr r3, [pc, #136] ; (802f334 ) + 802f2ac: 6f5b ldr r3, [r3, #116] ; 0x74 + 802f2ae: f003 0302 and.w r3, r3, #2 + 802f2b2: 2b00 cmp r3, #0 + 802f2b4: d0f0 beq.n 802f298 + 802f2b6: e018 b.n 802f2ea } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 802f288: 4b1e ldr r3, [pc, #120] ; (802f304 ) - 802f28a: 6f5b ldr r3, [r3, #116] ; 0x74 - 802f28c: 4a1d ldr r2, [pc, #116] ; (802f304 ) - 802f28e: f023 0301 bic.w r3, r3, #1 - 802f292: 6753 str r3, [r2, #116] ; 0x74 + 802f2b8: 4b1e ldr r3, [pc, #120] ; (802f334 ) + 802f2ba: 6f5b ldr r3, [r3, #116] ; 0x74 + 802f2bc: 4a1d ldr r2, [pc, #116] ; (802f334 ) + 802f2be: f023 0301 bic.w r3, r3, #1 + 802f2c2: 6753 str r3, [r2, #116] ; 0x74 /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f294: f7f6 fe7e bl 8025f94 - 802f298: 6278 str r0, [r7, #36] ; 0x24 + 802f2c4: f7f6 fe7e bl 8025fc4 + 802f2c8: 6278 str r0, [r7, #36] ; 0x24 /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 802f29a: e008 b.n 802f2ae + 802f2ca: e008 b.n 802f2de { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 802f29c: f7f6 fe7a bl 8025f94 - 802f2a0: 4602 mov r2, r0 - 802f2a2: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f2a4: 1ad3 subs r3, r2, r3 - 802f2a6: 2b02 cmp r3, #2 - 802f2a8: d901 bls.n 802f2ae + 802f2cc: f7f6 fe7a bl 8025fc4 + 802f2d0: 4602 mov r2, r0 + 802f2d2: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f2d4: 1ad3 subs r3, r2, r3 + 802f2d6: 2b02 cmp r3, #2 + 802f2d8: d901 bls.n 802f2de { return HAL_TIMEOUT; - 802f2aa: 2303 movs r3, #3 - 802f2ac: e1d5 b.n 802f65a + 802f2da: 2303 movs r3, #3 + 802f2dc: e1d5 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 802f2ae: 4b15 ldr r3, [pc, #84] ; (802f304 ) - 802f2b0: 6f5b ldr r3, [r3, #116] ; 0x74 - 802f2b2: f003 0302 and.w r3, r3, #2 - 802f2b6: 2b00 cmp r3, #0 - 802f2b8: d1f0 bne.n 802f29c + 802f2de: 4b15 ldr r3, [pc, #84] ; (802f334 ) + 802f2e0: 6f5b ldr r3, [r3, #116] ; 0x74 + 802f2e2: f003 0302 and.w r3, r3, #2 + 802f2e6: 2b00 cmp r3, #0 + 802f2e8: d1f0 bne.n 802f2cc } } } /*------------------------------ HSI48 Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) - 802f2ba: 687b ldr r3, [r7, #4] - 802f2bc: 681b ldr r3, [r3, #0] - 802f2be: f003 0320 and.w r3, r3, #32 - 802f2c2: 2b00 cmp r3, #0 - 802f2c4: d039 beq.n 802f33a + 802f2ea: 687b ldr r3, [r7, #4] + 802f2ec: 681b ldr r3, [r3, #0] + 802f2ee: f003 0320 and.w r3, r3, #32 + 802f2f2: 2b00 cmp r3, #0 + 802f2f4: d039 beq.n 802f36a { /* Check the parameters */ assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); /* Check the HSI48 State */ if((RCC_OscInitStruct->HSI48State)!= RCC_HSI48_OFF) - 802f2c6: 687b ldr r3, [r7, #4] - 802f2c8: 699b ldr r3, [r3, #24] - 802f2ca: 2b00 cmp r3, #0 - 802f2cc: d01c beq.n 802f308 + 802f2f6: 687b ldr r3, [r7, #4] + 802f2f8: 699b ldr r3, [r3, #24] + 802f2fa: 2b00 cmp r3, #0 + 802f2fc: d01c beq.n 802f338 { /* Enable the Internal Low Speed oscillator (HSI48). */ __HAL_RCC_HSI48_ENABLE(); - 802f2ce: 4b0d ldr r3, [pc, #52] ; (802f304 ) - 802f2d0: 681b ldr r3, [r3, #0] - 802f2d2: 4a0c ldr r2, [pc, #48] ; (802f304 ) - 802f2d4: f443 5380 orr.w r3, r3, #4096 ; 0x1000 - 802f2d8: 6013 str r3, [r2, #0] + 802f2fe: 4b0d ldr r3, [pc, #52] ; (802f334 ) + 802f300: 681b ldr r3, [r3, #0] + 802f302: 4a0c ldr r2, [pc, #48] ; (802f334 ) + 802f304: f443 5380 orr.w r3, r3, #4096 ; 0x1000 + 802f308: 6013 str r3, [r2, #0] /* Get time-out */ tickstart = HAL_GetTick(); - 802f2da: f7f6 fe5b bl 8025f94 - 802f2de: 6278 str r0, [r7, #36] ; 0x24 + 802f30a: f7f6 fe5b bl 8025fc4 + 802f30e: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI48 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U) - 802f2e0: e008 b.n 802f2f4 + 802f310: e008 b.n 802f324 { if((HAL_GetTick() - tickstart ) > HSI48_TIMEOUT_VALUE) - 802f2e2: f7f6 fe57 bl 8025f94 - 802f2e6: 4602 mov r2, r0 - 802f2e8: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f2ea: 1ad3 subs r3, r2, r3 - 802f2ec: 2b02 cmp r3, #2 - 802f2ee: d901 bls.n 802f2f4 + 802f312: f7f6 fe57 bl 8025fc4 + 802f316: 4602 mov r2, r0 + 802f318: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f31a: 1ad3 subs r3, r2, r3 + 802f31c: 2b02 cmp r3, #2 + 802f31e: d901 bls.n 802f324 { return HAL_TIMEOUT; - 802f2f0: 2303 movs r3, #3 - 802f2f2: e1b2 b.n 802f65a + 802f320: 2303 movs r3, #3 + 802f322: e1b2 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U) - 802f2f4: 4b03 ldr r3, [pc, #12] ; (802f304 ) - 802f2f6: 681b ldr r3, [r3, #0] - 802f2f8: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 802f2fc: 2b00 cmp r3, #0 - 802f2fe: d0f0 beq.n 802f2e2 - 802f300: e01b b.n 802f33a - 802f302: bf00 nop - 802f304: 58024400 .word 0x58024400 + 802f324: 4b03 ldr r3, [pc, #12] ; (802f334 ) + 802f326: 681b ldr r3, [r3, #0] + 802f328: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 802f32c: 2b00 cmp r3, #0 + 802f32e: d0f0 beq.n 802f312 + 802f330: e01b b.n 802f36a + 802f332: bf00 nop + 802f334: 58024400 .word 0x58024400 } } else { /* Disable the Internal Low Speed oscillator (HSI48). */ __HAL_RCC_HSI48_DISABLE(); - 802f308: 4b9b ldr r3, [pc, #620] ; (802f578 ) - 802f30a: 681b ldr r3, [r3, #0] - 802f30c: 4a9a ldr r2, [pc, #616] ; (802f578 ) - 802f30e: f423 5380 bic.w r3, r3, #4096 ; 0x1000 - 802f312: 6013 str r3, [r2, #0] + 802f338: 4b9b ldr r3, [pc, #620] ; (802f5a8 ) + 802f33a: 681b ldr r3, [r3, #0] + 802f33c: 4a9a ldr r2, [pc, #616] ; (802f5a8 ) + 802f33e: f423 5380 bic.w r3, r3, #4096 ; 0x1000 + 802f342: 6013 str r3, [r2, #0] /* Get time-out */ tickstart = HAL_GetTick(); - 802f314: f7f6 fe3e bl 8025f94 - 802f318: 6278 str r0, [r7, #36] ; 0x24 + 802f344: f7f6 fe3e bl 8025fc4 + 802f348: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI48 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U) - 802f31a: e008 b.n 802f32e + 802f34a: e008 b.n 802f35e { if((HAL_GetTick() - tickstart ) > HSI48_TIMEOUT_VALUE) - 802f31c: f7f6 fe3a bl 8025f94 - 802f320: 4602 mov r2, r0 - 802f322: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f324: 1ad3 subs r3, r2, r3 - 802f326: 2b02 cmp r3, #2 - 802f328: d901 bls.n 802f32e + 802f34c: f7f6 fe3a bl 8025fc4 + 802f350: 4602 mov r2, r0 + 802f352: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f354: 1ad3 subs r3, r2, r3 + 802f356: 2b02 cmp r3, #2 + 802f358: d901 bls.n 802f35e { return HAL_TIMEOUT; - 802f32a: 2303 movs r3, #3 - 802f32c: e195 b.n 802f65a + 802f35a: 2303 movs r3, #3 + 802f35c: e195 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U) - 802f32e: 4b92 ldr r3, [pc, #584] ; (802f578 ) - 802f330: 681b ldr r3, [r3, #0] - 802f332: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 802f336: 2b00 cmp r3, #0 - 802f338: d1f0 bne.n 802f31c + 802f35e: 4b92 ldr r3, [pc, #584] ; (802f5a8 ) + 802f360: 681b ldr r3, [r3, #0] + 802f362: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 802f366: 2b00 cmp r3, #0 + 802f368: d1f0 bne.n 802f34c } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 802f33a: 687b ldr r3, [r7, #4] - 802f33c: 681b ldr r3, [r3, #0] - 802f33e: f003 0304 and.w r3, r3, #4 - 802f342: 2b00 cmp r3, #0 - 802f344: f000 8081 beq.w 802f44a + 802f36a: 687b ldr r3, [r7, #4] + 802f36c: 681b ldr r3, [r3, #0] + 802f36e: f003 0304 and.w r3, r3, #4 + 802f372: 2b00 cmp r3, #0 + 802f374: f000 8081 beq.w 802f47a { /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Enable write access to Backup domain */ PWR->CR1 |= PWR_CR1_DBP; - 802f348: 4b8c ldr r3, [pc, #560] ; (802f57c ) - 802f34a: 681b ldr r3, [r3, #0] - 802f34c: 4a8b ldr r2, [pc, #556] ; (802f57c ) - 802f34e: f443 7380 orr.w r3, r3, #256 ; 0x100 - 802f352: 6013 str r3, [r2, #0] + 802f378: 4b8c ldr r3, [pc, #560] ; (802f5ac ) + 802f37a: 681b ldr r3, [r3, #0] + 802f37c: 4a8b ldr r2, [pc, #556] ; (802f5ac ) + 802f37e: f443 7380 orr.w r3, r3, #256 ; 0x100 + 802f382: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 802f354: f7f6 fe1e bl 8025f94 - 802f358: 6278 str r0, [r7, #36] ; 0x24 + 802f384: f7f6 fe1e bl 8025fc4 + 802f388: 6278 str r0, [r7, #36] ; 0x24 while((PWR->CR1 & PWR_CR1_DBP) == 0U) - 802f35a: e008 b.n 802f36e + 802f38a: e008 b.n 802f39e { if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE) - 802f35c: f7f6 fe1a bl 8025f94 - 802f360: 4602 mov r2, r0 - 802f362: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f364: 1ad3 subs r3, r2, r3 - 802f366: 2b64 cmp r3, #100 ; 0x64 - 802f368: d901 bls.n 802f36e + 802f38c: f7f6 fe1a bl 8025fc4 + 802f390: 4602 mov r2, r0 + 802f392: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f394: 1ad3 subs r3, r2, r3 + 802f396: 2b64 cmp r3, #100 ; 0x64 + 802f398: d901 bls.n 802f39e { return HAL_TIMEOUT; - 802f36a: 2303 movs r3, #3 - 802f36c: e175 b.n 802f65a + 802f39a: 2303 movs r3, #3 + 802f39c: e175 b.n 802f68a while((PWR->CR1 & PWR_CR1_DBP) == 0U) - 802f36e: 4b83 ldr r3, [pc, #524] ; (802f57c ) - 802f370: 681b ldr r3, [r3, #0] - 802f372: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f376: 2b00 cmp r3, #0 - 802f378: d0f0 beq.n 802f35c + 802f39e: 4b83 ldr r3, [pc, #524] ; (802f5ac ) + 802f3a0: 681b ldr r3, [r3, #0] + 802f3a2: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f3a6: 2b00 cmp r3, #0 + 802f3a8: d0f0 beq.n 802f38c } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 802f37a: 687b ldr r3, [r7, #4] - 802f37c: 689b ldr r3, [r3, #8] - 802f37e: 2b01 cmp r3, #1 - 802f380: d106 bne.n 802f390 - 802f382: 4b7d ldr r3, [pc, #500] ; (802f578 ) - 802f384: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f386: 4a7c ldr r2, [pc, #496] ; (802f578 ) - 802f388: f043 0301 orr.w r3, r3, #1 - 802f38c: 6713 str r3, [r2, #112] ; 0x70 - 802f38e: e02d b.n 802f3ec - 802f390: 687b ldr r3, [r7, #4] - 802f392: 689b ldr r3, [r3, #8] - 802f394: 2b00 cmp r3, #0 - 802f396: d10c bne.n 802f3b2 - 802f398: 4b77 ldr r3, [pc, #476] ; (802f578 ) - 802f39a: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f39c: 4a76 ldr r2, [pc, #472] ; (802f578 ) - 802f39e: f023 0301 bic.w r3, r3, #1 - 802f3a2: 6713 str r3, [r2, #112] ; 0x70 - 802f3a4: 4b74 ldr r3, [pc, #464] ; (802f578 ) - 802f3a6: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3a8: 4a73 ldr r2, [pc, #460] ; (802f578 ) - 802f3aa: f023 0304 bic.w r3, r3, #4 - 802f3ae: 6713 str r3, [r2, #112] ; 0x70 - 802f3b0: e01c b.n 802f3ec - 802f3b2: 687b ldr r3, [r7, #4] - 802f3b4: 689b ldr r3, [r3, #8] - 802f3b6: 2b05 cmp r3, #5 - 802f3b8: d10c bne.n 802f3d4 - 802f3ba: 4b6f ldr r3, [pc, #444] ; (802f578 ) - 802f3bc: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3be: 4a6e ldr r2, [pc, #440] ; (802f578 ) - 802f3c0: f043 0304 orr.w r3, r3, #4 - 802f3c4: 6713 str r3, [r2, #112] ; 0x70 - 802f3c6: 4b6c ldr r3, [pc, #432] ; (802f578 ) - 802f3c8: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3ca: 4a6b ldr r2, [pc, #428] ; (802f578 ) - 802f3cc: f043 0301 orr.w r3, r3, #1 - 802f3d0: 6713 str r3, [r2, #112] ; 0x70 - 802f3d2: e00b b.n 802f3ec - 802f3d4: 4b68 ldr r3, [pc, #416] ; (802f578 ) + 802f3aa: 687b ldr r3, [r7, #4] + 802f3ac: 689b ldr r3, [r3, #8] + 802f3ae: 2b01 cmp r3, #1 + 802f3b0: d106 bne.n 802f3c0 + 802f3b2: 4b7d ldr r3, [pc, #500] ; (802f5a8 ) + 802f3b4: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f3b6: 4a7c ldr r2, [pc, #496] ; (802f5a8 ) + 802f3b8: f043 0301 orr.w r3, r3, #1 + 802f3bc: 6713 str r3, [r2, #112] ; 0x70 + 802f3be: e02d b.n 802f41c + 802f3c0: 687b ldr r3, [r7, #4] + 802f3c2: 689b ldr r3, [r3, #8] + 802f3c4: 2b00 cmp r3, #0 + 802f3c6: d10c bne.n 802f3e2 + 802f3c8: 4b77 ldr r3, [pc, #476] ; (802f5a8 ) + 802f3ca: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f3cc: 4a76 ldr r2, [pc, #472] ; (802f5a8 ) + 802f3ce: f023 0301 bic.w r3, r3, #1 + 802f3d2: 6713 str r3, [r2, #112] ; 0x70 + 802f3d4: 4b74 ldr r3, [pc, #464] ; (802f5a8 ) 802f3d6: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3d8: 4a67 ldr r2, [pc, #412] ; (802f578 ) - 802f3da: f023 0301 bic.w r3, r3, #1 + 802f3d8: 4a73 ldr r2, [pc, #460] ; (802f5a8 ) + 802f3da: f023 0304 bic.w r3, r3, #4 802f3de: 6713 str r3, [r2, #112] ; 0x70 - 802f3e0: 4b65 ldr r3, [pc, #404] ; (802f578 ) - 802f3e2: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3e4: 4a64 ldr r2, [pc, #400] ; (802f578 ) - 802f3e6: f023 0304 bic.w r3, r3, #4 - 802f3ea: 6713 str r3, [r2, #112] ; 0x70 + 802f3e0: e01c b.n 802f41c + 802f3e2: 687b ldr r3, [r7, #4] + 802f3e4: 689b ldr r3, [r3, #8] + 802f3e6: 2b05 cmp r3, #5 + 802f3e8: d10c bne.n 802f404 + 802f3ea: 4b6f ldr r3, [pc, #444] ; (802f5a8 ) + 802f3ec: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f3ee: 4a6e ldr r2, [pc, #440] ; (802f5a8 ) + 802f3f0: f043 0304 orr.w r3, r3, #4 + 802f3f4: 6713 str r3, [r2, #112] ; 0x70 + 802f3f6: 4b6c ldr r3, [pc, #432] ; (802f5a8 ) + 802f3f8: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f3fa: 4a6b ldr r2, [pc, #428] ; (802f5a8 ) + 802f3fc: f043 0301 orr.w r3, r3, #1 + 802f400: 6713 str r3, [r2, #112] ; 0x70 + 802f402: e00b b.n 802f41c + 802f404: 4b68 ldr r3, [pc, #416] ; (802f5a8 ) + 802f406: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f408: 4a67 ldr r2, [pc, #412] ; (802f5a8 ) + 802f40a: f023 0301 bic.w r3, r3, #1 + 802f40e: 6713 str r3, [r2, #112] ; 0x70 + 802f410: 4b65 ldr r3, [pc, #404] ; (802f5a8 ) + 802f412: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f414: 4a64 ldr r2, [pc, #400] ; (802f5a8 ) + 802f416: f023 0304 bic.w r3, r3, #4 + 802f41a: 6713 str r3, [r2, #112] ; 0x70 /* Check the LSE State */ if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) - 802f3ec: 687b ldr r3, [r7, #4] - 802f3ee: 689b ldr r3, [r3, #8] - 802f3f0: 2b00 cmp r3, #0 - 802f3f2: d015 beq.n 802f420 + 802f41c: 687b ldr r3, [r7, #4] + 802f41e: 689b ldr r3, [r3, #8] + 802f420: 2b00 cmp r3, #0 + 802f422: d015 beq.n 802f450 { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f3f4: f7f6 fdce bl 8025f94 - 802f3f8: 6278 str r0, [r7, #36] ; 0x24 + 802f424: f7f6 fdce bl 8025fc4 + 802f428: 6278 str r0, [r7, #36] ; 0x24 /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 802f3fa: e00a b.n 802f412 + 802f42a: e00a b.n 802f442 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 802f3fc: f7f6 fdca bl 8025f94 - 802f400: 4602 mov r2, r0 - 802f402: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f404: 1ad3 subs r3, r2, r3 - 802f406: f241 3288 movw r2, #5000 ; 0x1388 - 802f40a: 4293 cmp r3, r2 - 802f40c: d901 bls.n 802f412 + 802f42c: f7f6 fdca bl 8025fc4 + 802f430: 4602 mov r2, r0 + 802f432: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f434: 1ad3 subs r3, r2, r3 + 802f436: f241 3288 movw r2, #5000 ; 0x1388 + 802f43a: 4293 cmp r3, r2 + 802f43c: d901 bls.n 802f442 { return HAL_TIMEOUT; - 802f40e: 2303 movs r3, #3 - 802f410: e123 b.n 802f65a + 802f43e: 2303 movs r3, #3 + 802f440: e123 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 802f412: 4b59 ldr r3, [pc, #356] ; (802f578 ) - 802f414: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f416: f003 0302 and.w r3, r3, #2 - 802f41a: 2b00 cmp r3, #0 - 802f41c: d0ee beq.n 802f3fc - 802f41e: e014 b.n 802f44a + 802f442: 4b59 ldr r3, [pc, #356] ; (802f5a8 ) + 802f444: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f446: f003 0302 and.w r3, r3, #2 + 802f44a: 2b00 cmp r3, #0 + 802f44c: d0ee beq.n 802f42c + 802f44e: e014 b.n 802f47a } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f420: f7f6 fdb8 bl 8025f94 - 802f424: 6278 str r0, [r7, #36] ; 0x24 + 802f450: f7f6 fdb8 bl 8025fc4 + 802f454: 6278 str r0, [r7, #36] ; 0x24 /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 802f426: e00a b.n 802f43e + 802f456: e00a b.n 802f46e { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 802f428: f7f6 fdb4 bl 8025f94 - 802f42c: 4602 mov r2, r0 - 802f42e: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f430: 1ad3 subs r3, r2, r3 - 802f432: f241 3288 movw r2, #5000 ; 0x1388 - 802f436: 4293 cmp r3, r2 - 802f438: d901 bls.n 802f43e + 802f458: f7f6 fdb4 bl 8025fc4 + 802f45c: 4602 mov r2, r0 + 802f45e: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f460: 1ad3 subs r3, r2, r3 + 802f462: f241 3288 movw r2, #5000 ; 0x1388 + 802f466: 4293 cmp r3, r2 + 802f468: d901 bls.n 802f46e { return HAL_TIMEOUT; - 802f43a: 2303 movs r3, #3 - 802f43c: e10d b.n 802f65a + 802f46a: 2303 movs r3, #3 + 802f46c: e10d b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 802f43e: 4b4e ldr r3, [pc, #312] ; (802f578 ) - 802f440: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f442: f003 0302 and.w r3, r3, #2 - 802f446: 2b00 cmp r3, #0 - 802f448: d1ee bne.n 802f428 + 802f46e: 4b4e ldr r3, [pc, #312] ; (802f5a8 ) + 802f470: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f472: f003 0302 and.w r3, r3, #2 + 802f476: 2b00 cmp r3, #0 + 802f478: d1ee bne.n 802f458 } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 802f44a: 687b ldr r3, [r7, #4] - 802f44c: 6a5b ldr r3, [r3, #36] ; 0x24 - 802f44e: 2b00 cmp r3, #0 - 802f450: f000 8102 beq.w 802f658 + 802f47a: 687b ldr r3, [r7, #4] + 802f47c: 6a5b ldr r3, [r3, #36] ; 0x24 + 802f47e: 2b00 cmp r3, #0 + 802f480: f000 8102 beq.w 802f688 { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1) - 802f454: 4b48 ldr r3, [pc, #288] ; (802f578 ) - 802f456: 691b ldr r3, [r3, #16] - 802f458: f003 0338 and.w r3, r3, #56 ; 0x38 - 802f45c: 2b18 cmp r3, #24 - 802f45e: f000 80bd beq.w 802f5dc + 802f484: 4b48 ldr r3, [pc, #288] ; (802f5a8 ) + 802f486: 691b ldr r3, [r3, #16] + 802f488: f003 0338 and.w r3, r3, #56 ; 0x38 + 802f48c: 2b18 cmp r3, #24 + 802f48e: f000 80bd beq.w 802f60c { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 802f462: 687b ldr r3, [r7, #4] - 802f464: 6a5b ldr r3, [r3, #36] ; 0x24 - 802f466: 2b02 cmp r3, #2 - 802f468: f040 809e bne.w 802f5a8 + 802f492: 687b ldr r3, [r7, #4] + 802f494: 6a5b ldr r3, [r3, #36] ; 0x24 + 802f496: 2b02 cmp r3, #2 + 802f498: f040 809e bne.w 802f5d8 assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 802f46c: 4b42 ldr r3, [pc, #264] ; (802f578 ) - 802f46e: 681b ldr r3, [r3, #0] - 802f470: 4a41 ldr r2, [pc, #260] ; (802f578 ) - 802f472: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 802f476: 6013 str r3, [r2, #0] + 802f49c: 4b42 ldr r3, [pc, #264] ; (802f5a8 ) + 802f49e: 681b ldr r3, [r3, #0] + 802f4a0: 4a41 ldr r2, [pc, #260] ; (802f5a8 ) + 802f4a2: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 + 802f4a6: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f478: f7f6 fd8c bl 8025f94 - 802f47c: 6278 str r0, [r7, #36] ; 0x24 + 802f4a8: f7f6 fd8c bl 8025fc4 + 802f4ac: 6278 str r0, [r7, #36] ; 0x24 /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 802f47e: e008 b.n 802f492 + 802f4ae: e008 b.n 802f4c2 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 802f480: f7f6 fd88 bl 8025f94 - 802f484: 4602 mov r2, r0 - 802f486: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f488: 1ad3 subs r3, r2, r3 - 802f48a: 2b02 cmp r3, #2 - 802f48c: d901 bls.n 802f492 + 802f4b0: f7f6 fd88 bl 8025fc4 + 802f4b4: 4602 mov r2, r0 + 802f4b6: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f4b8: 1ad3 subs r3, r2, r3 + 802f4ba: 2b02 cmp r3, #2 + 802f4bc: d901 bls.n 802f4c2 { return HAL_TIMEOUT; - 802f48e: 2303 movs r3, #3 - 802f490: e0e3 b.n 802f65a + 802f4be: 2303 movs r3, #3 + 802f4c0: e0e3 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 802f492: 4b39 ldr r3, [pc, #228] ; (802f578 ) - 802f494: 681b ldr r3, [r3, #0] - 802f496: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802f49a: 2b00 cmp r3, #0 - 802f49c: d1f0 bne.n 802f480 + 802f4c2: 4b39 ldr r3, [pc, #228] ; (802f5a8 ) + 802f4c4: 681b ldr r3, [r3, #0] + 802f4c6: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 802f4ca: 2b00 cmp r3, #0 + 802f4cc: d1f0 bne.n 802f4b0 } } /* Configure the main PLL clock source, multiplication and division factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 802f49e: 4b36 ldr r3, [pc, #216] ; (802f578 ) - 802f4a0: 6a9a ldr r2, [r3, #40] ; 0x28 - 802f4a2: 4b37 ldr r3, [pc, #220] ; (802f580 ) - 802f4a4: 4013 ands r3, r2 - 802f4a6: 687a ldr r2, [r7, #4] - 802f4a8: 6a91 ldr r1, [r2, #40] ; 0x28 - 802f4aa: 687a ldr r2, [r7, #4] - 802f4ac: 6ad2 ldr r2, [r2, #44] ; 0x2c - 802f4ae: 0112 lsls r2, r2, #4 - 802f4b0: 430a orrs r2, r1 - 802f4b2: 4931 ldr r1, [pc, #196] ; (802f578 ) - 802f4b4: 4313 orrs r3, r2 - 802f4b6: 628b str r3, [r1, #40] ; 0x28 - 802f4b8: 687b ldr r3, [r7, #4] - 802f4ba: 6b1b ldr r3, [r3, #48] ; 0x30 - 802f4bc: 3b01 subs r3, #1 - 802f4be: f3c3 0208 ubfx r2, r3, #0, #9 - 802f4c2: 687b ldr r3, [r7, #4] - 802f4c4: 6b5b ldr r3, [r3, #52] ; 0x34 - 802f4c6: 3b01 subs r3, #1 - 802f4c8: 025b lsls r3, r3, #9 - 802f4ca: b29b uxth r3, r3 - 802f4cc: 431a orrs r2, r3 - 802f4ce: 687b ldr r3, [r7, #4] - 802f4d0: 6b9b ldr r3, [r3, #56] ; 0x38 - 802f4d2: 3b01 subs r3, #1 - 802f4d4: 041b lsls r3, r3, #16 - 802f4d6: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 802f4da: 431a orrs r2, r3 - 802f4dc: 687b ldr r3, [r7, #4] - 802f4de: 6bdb ldr r3, [r3, #60] ; 0x3c - 802f4e0: 3b01 subs r3, #1 - 802f4e2: 061b lsls r3, r3, #24 - 802f4e4: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 - 802f4e8: 4923 ldr r1, [pc, #140] ; (802f578 ) - 802f4ea: 4313 orrs r3, r2 - 802f4ec: 630b str r3, [r1, #48] ; 0x30 + 802f4ce: 4b36 ldr r3, [pc, #216] ; (802f5a8 ) + 802f4d0: 6a9a ldr r2, [r3, #40] ; 0x28 + 802f4d2: 4b37 ldr r3, [pc, #220] ; (802f5b0 ) + 802f4d4: 4013 ands r3, r2 + 802f4d6: 687a ldr r2, [r7, #4] + 802f4d8: 6a91 ldr r1, [r2, #40] ; 0x28 + 802f4da: 687a ldr r2, [r7, #4] + 802f4dc: 6ad2 ldr r2, [r2, #44] ; 0x2c + 802f4de: 0112 lsls r2, r2, #4 + 802f4e0: 430a orrs r2, r1 + 802f4e2: 4931 ldr r1, [pc, #196] ; (802f5a8 ) + 802f4e4: 4313 orrs r3, r2 + 802f4e6: 628b str r3, [r1, #40] ; 0x28 + 802f4e8: 687b ldr r3, [r7, #4] + 802f4ea: 6b1b ldr r3, [r3, #48] ; 0x30 + 802f4ec: 3b01 subs r3, #1 + 802f4ee: f3c3 0208 ubfx r2, r3, #0, #9 + 802f4f2: 687b ldr r3, [r7, #4] + 802f4f4: 6b5b ldr r3, [r3, #52] ; 0x34 + 802f4f6: 3b01 subs r3, #1 + 802f4f8: 025b lsls r3, r3, #9 + 802f4fa: b29b uxth r3, r3 + 802f4fc: 431a orrs r2, r3 + 802f4fe: 687b ldr r3, [r7, #4] + 802f500: 6b9b ldr r3, [r3, #56] ; 0x38 + 802f502: 3b01 subs r3, #1 + 802f504: 041b lsls r3, r3, #16 + 802f506: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 802f50a: 431a orrs r2, r3 + 802f50c: 687b ldr r3, [r7, #4] + 802f50e: 6bdb ldr r3, [r3, #60] ; 0x3c + 802f510: 3b01 subs r3, #1 + 802f512: 061b lsls r3, r3, #24 + 802f514: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 + 802f518: 4923 ldr r1, [pc, #140] ; (802f5a8 ) + 802f51a: 4313 orrs r3, r2 + 802f51c: 630b str r3, [r1, #48] ; 0x30 RCC_OscInitStruct->PLL.PLLP, RCC_OscInitStruct->PLL.PLLQ, RCC_OscInitStruct->PLL.PLLR); /* Disable PLLFRACN . */ __HAL_RCC_PLLFRACN_DISABLE(); - 802f4ee: 4b22 ldr r3, [pc, #136] ; (802f578 ) - 802f4f0: 6adb ldr r3, [r3, #44] ; 0x2c - 802f4f2: 4a21 ldr r2, [pc, #132] ; (802f578 ) - 802f4f4: f023 0301 bic.w r3, r3, #1 - 802f4f8: 62d3 str r3, [r2, #44] ; 0x2c + 802f51e: 4b22 ldr r3, [pc, #136] ; (802f5a8 ) + 802f520: 6adb ldr r3, [r3, #44] ; 0x2c + 802f522: 4a21 ldr r2, [pc, #132] ; (802f5a8 ) + 802f524: f023 0301 bic.w r3, r3, #1 + 802f528: 62d3 str r3, [r2, #44] ; 0x2c /* Configure PLL PLL1FRACN */ __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN); - 802f4fa: 4b1f ldr r3, [pc, #124] ; (802f578 ) - 802f4fc: 6b5a ldr r2, [r3, #52] ; 0x34 - 802f4fe: 4b21 ldr r3, [pc, #132] ; (802f584 ) - 802f500: 4013 ands r3, r2 - 802f502: 687a ldr r2, [r7, #4] - 802f504: 6c92 ldr r2, [r2, #72] ; 0x48 - 802f506: 00d2 lsls r2, r2, #3 - 802f508: 491b ldr r1, [pc, #108] ; (802f578 ) - 802f50a: 4313 orrs r3, r2 - 802f50c: 634b str r3, [r1, #52] ; 0x34 + 802f52a: 4b1f ldr r3, [pc, #124] ; (802f5a8 ) + 802f52c: 6b5a ldr r2, [r3, #52] ; 0x34 + 802f52e: 4b21 ldr r3, [pc, #132] ; (802f5b4 ) + 802f530: 4013 ands r3, r2 + 802f532: 687a ldr r2, [r7, #4] + 802f534: 6c92 ldr r2, [r2, #72] ; 0x48 + 802f536: 00d2 lsls r2, r2, #3 + 802f538: 491b ldr r1, [pc, #108] ; (802f5a8 ) + 802f53a: 4313 orrs r3, r2 + 802f53c: 634b str r3, [r1, #52] ; 0x34 /* Select PLL1 input reference frequency range: VCI */ __HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ; - 802f50e: 4b1a ldr r3, [pc, #104] ; (802f578 ) - 802f510: 6adb ldr r3, [r3, #44] ; 0x2c - 802f512: f023 020c bic.w r2, r3, #12 - 802f516: 687b ldr r3, [r7, #4] - 802f518: 6c1b ldr r3, [r3, #64] ; 0x40 - 802f51a: 4917 ldr r1, [pc, #92] ; (802f578 ) - 802f51c: 4313 orrs r3, r2 - 802f51e: 62cb str r3, [r1, #44] ; 0x2c + 802f53e: 4b1a ldr r3, [pc, #104] ; (802f5a8 ) + 802f540: 6adb ldr r3, [r3, #44] ; 0x2c + 802f542: f023 020c bic.w r2, r3, #12 + 802f546: 687b ldr r3, [r7, #4] + 802f548: 6c1b ldr r3, [r3, #64] ; 0x40 + 802f54a: 4917 ldr r1, [pc, #92] ; (802f5a8 ) + 802f54c: 4313 orrs r3, r2 + 802f54e: 62cb str r3, [r1, #44] ; 0x2c /* Select PLL1 output frequency range : VCO */ __HAL_RCC_PLL_VCORANGE(RCC_OscInitStruct->PLL.PLLVCOSEL) ; - 802f520: 4b15 ldr r3, [pc, #84] ; (802f578 ) - 802f522: 6adb ldr r3, [r3, #44] ; 0x2c - 802f524: f023 0202 bic.w r2, r3, #2 - 802f528: 687b ldr r3, [r7, #4] - 802f52a: 6c5b ldr r3, [r3, #68] ; 0x44 - 802f52c: 4912 ldr r1, [pc, #72] ; (802f578 ) - 802f52e: 4313 orrs r3, r2 - 802f530: 62cb str r3, [r1, #44] ; 0x2c + 802f550: 4b15 ldr r3, [pc, #84] ; (802f5a8 ) + 802f552: 6adb ldr r3, [r3, #44] ; 0x2c + 802f554: f023 0202 bic.w r2, r3, #2 + 802f558: 687b ldr r3, [r7, #4] + 802f55a: 6c5b ldr r3, [r3, #68] ; 0x44 + 802f55c: 4912 ldr r1, [pc, #72] ; (802f5a8 ) + 802f55e: 4313 orrs r3, r2 + 802f560: 62cb str r3, [r1, #44] ; 0x2c /* Enable PLL System Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP); - 802f532: 4b11 ldr r3, [pc, #68] ; (802f578 ) - 802f534: 6adb ldr r3, [r3, #44] ; 0x2c - 802f536: 4a10 ldr r2, [pc, #64] ; (802f578 ) - 802f538: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 802f53c: 62d3 str r3, [r2, #44] ; 0x2c + 802f562: 4b11 ldr r3, [pc, #68] ; (802f5a8 ) + 802f564: 6adb ldr r3, [r3, #44] ; 0x2c + 802f566: 4a10 ldr r2, [pc, #64] ; (802f5a8 ) + 802f568: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 802f56c: 62d3 str r3, [r2, #44] ; 0x2c /* Enable PLL1Q Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802f53e: 4b0e ldr r3, [pc, #56] ; (802f578 ) - 802f540: 6adb ldr r3, [r3, #44] ; 0x2c - 802f542: 4a0d ldr r2, [pc, #52] ; (802f578 ) - 802f544: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802f548: 62d3 str r3, [r2, #44] ; 0x2c + 802f56e: 4b0e ldr r3, [pc, #56] ; (802f5a8 ) + 802f570: 6adb ldr r3, [r3, #44] ; 0x2c + 802f572: 4a0d ldr r2, [pc, #52] ; (802f5a8 ) + 802f574: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802f578: 62d3 str r3, [r2, #44] ; 0x2c /* Enable PLL1R Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVR); - 802f54a: 4b0b ldr r3, [pc, #44] ; (802f578 ) - 802f54c: 6adb ldr r3, [r3, #44] ; 0x2c - 802f54e: 4a0a ldr r2, [pc, #40] ; (802f578 ) - 802f550: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 802f554: 62d3 str r3, [r2, #44] ; 0x2c + 802f57a: 4b0b ldr r3, [pc, #44] ; (802f5a8 ) + 802f57c: 6adb ldr r3, [r3, #44] ; 0x2c + 802f57e: 4a0a ldr r2, [pc, #40] ; (802f5a8 ) + 802f580: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 802f584: 62d3 str r3, [r2, #44] ; 0x2c /* Enable PLL1FRACN . */ __HAL_RCC_PLLFRACN_ENABLE(); - 802f556: 4b08 ldr r3, [pc, #32] ; (802f578 ) - 802f558: 6adb ldr r3, [r3, #44] ; 0x2c - 802f55a: 4a07 ldr r2, [pc, #28] ; (802f578 ) - 802f55c: f043 0301 orr.w r3, r3, #1 - 802f560: 62d3 str r3, [r2, #44] ; 0x2c + 802f586: 4b08 ldr r3, [pc, #32] ; (802f5a8 ) + 802f588: 6adb ldr r3, [r3, #44] ; 0x2c + 802f58a: 4a07 ldr r2, [pc, #28] ; (802f5a8 ) + 802f58c: f043 0301 orr.w r3, r3, #1 + 802f590: 62d3 str r3, [r2, #44] ; 0x2c /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 802f562: 4b05 ldr r3, [pc, #20] ; (802f578 ) - 802f564: 681b ldr r3, [r3, #0] - 802f566: 4a04 ldr r2, [pc, #16] ; (802f578 ) - 802f568: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 802f56c: 6013 str r3, [r2, #0] + 802f592: 4b05 ldr r3, [pc, #20] ; (802f5a8 ) + 802f594: 681b ldr r3, [r3, #0] + 802f596: 4a04 ldr r2, [pc, #16] ; (802f5a8 ) + 802f598: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 802f59c: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f56e: f7f6 fd11 bl 8025f94 - 802f572: 6278 str r0, [r7, #36] ; 0x24 + 802f59e: f7f6 fd11 bl 8025fc4 + 802f5a2: 6278 str r0, [r7, #36] ; 0x24 /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 802f574: e011 b.n 802f59a - 802f576: bf00 nop - 802f578: 58024400 .word 0x58024400 - 802f57c: 58024800 .word 0x58024800 - 802f580: fffffc0c .word 0xfffffc0c - 802f584: ffff0007 .word 0xffff0007 + 802f5a4: e011 b.n 802f5ca + 802f5a6: bf00 nop + 802f5a8: 58024400 .word 0x58024400 + 802f5ac: 58024800 .word 0x58024800 + 802f5b0: fffffc0c .word 0xfffffc0c + 802f5b4: ffff0007 .word 0xffff0007 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 802f588: f7f6 fd04 bl 8025f94 - 802f58c: 4602 mov r2, r0 - 802f58e: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f590: 1ad3 subs r3, r2, r3 - 802f592: 2b02 cmp r3, #2 - 802f594: d901 bls.n 802f59a + 802f5b8: f7f6 fd04 bl 8025fc4 + 802f5bc: 4602 mov r2, r0 + 802f5be: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f5c0: 1ad3 subs r3, r2, r3 + 802f5c2: 2b02 cmp r3, #2 + 802f5c4: d901 bls.n 802f5ca { return HAL_TIMEOUT; - 802f596: 2303 movs r3, #3 - 802f598: e05f b.n 802f65a + 802f5c6: 2303 movs r3, #3 + 802f5c8: e05f b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 802f59a: 4b32 ldr r3, [pc, #200] ; (802f664 ) - 802f59c: 681b ldr r3, [r3, #0] - 802f59e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802f5a2: 2b00 cmp r3, #0 - 802f5a4: d0f0 beq.n 802f588 - 802f5a6: e057 b.n 802f658 + 802f5ca: 4b32 ldr r3, [pc, #200] ; (802f694 ) + 802f5cc: 681b ldr r3, [r3, #0] + 802f5ce: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 802f5d2: 2b00 cmp r3, #0 + 802f5d4: d0f0 beq.n 802f5b8 + 802f5d6: e057 b.n 802f688 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 802f5a8: 4b2e ldr r3, [pc, #184] ; (802f664 ) - 802f5aa: 681b ldr r3, [r3, #0] - 802f5ac: 4a2d ldr r2, [pc, #180] ; (802f664 ) - 802f5ae: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 802f5b2: 6013 str r3, [r2, #0] + 802f5d8: 4b2e ldr r3, [pc, #184] ; (802f694 ) + 802f5da: 681b ldr r3, [r3, #0] + 802f5dc: 4a2d ldr r2, [pc, #180] ; (802f694 ) + 802f5de: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 + 802f5e2: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f5b4: f7f6 fcee bl 8025f94 - 802f5b8: 6278 str r0, [r7, #36] ; 0x24 + 802f5e4: f7f6 fcee bl 8025fc4 + 802f5e8: 6278 str r0, [r7, #36] ; 0x24 /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 802f5ba: e008 b.n 802f5ce + 802f5ea: e008 b.n 802f5fe { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 802f5bc: f7f6 fcea bl 8025f94 - 802f5c0: 4602 mov r2, r0 - 802f5c2: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f5c4: 1ad3 subs r3, r2, r3 - 802f5c6: 2b02 cmp r3, #2 - 802f5c8: d901 bls.n 802f5ce + 802f5ec: f7f6 fcea bl 8025fc4 + 802f5f0: 4602 mov r2, r0 + 802f5f2: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f5f4: 1ad3 subs r3, r2, r3 + 802f5f6: 2b02 cmp r3, #2 + 802f5f8: d901 bls.n 802f5fe { return HAL_TIMEOUT; - 802f5ca: 2303 movs r3, #3 - 802f5cc: e045 b.n 802f65a + 802f5fa: 2303 movs r3, #3 + 802f5fc: e045 b.n 802f68a while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 802f5ce: 4b25 ldr r3, [pc, #148] ; (802f664 ) - 802f5d0: 681b ldr r3, [r3, #0] - 802f5d2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802f5d6: 2b00 cmp r3, #0 - 802f5d8: d1f0 bne.n 802f5bc - 802f5da: e03d b.n 802f658 + 802f5fe: 4b25 ldr r3, [pc, #148] ; (802f694 ) + 802f600: 681b ldr r3, [r3, #0] + 802f602: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 802f606: 2b00 cmp r3, #0 + 802f608: d1f0 bne.n 802f5ec + 802f60a: e03d b.n 802f688 } } else { /* Do not return HAL_ERROR if request repeats the current configuration */ temp1_pllckcfg = RCC->PLLCKSELR; - 802f5dc: 4b21 ldr r3, [pc, #132] ; (802f664 ) - 802f5de: 6a9b ldr r3, [r3, #40] ; 0x28 - 802f5e0: 613b str r3, [r7, #16] + 802f60c: 4b21 ldr r3, [pc, #132] ; (802f694 ) + 802f60e: 6a9b ldr r3, [r3, #40] ; 0x28 + 802f610: 613b str r3, [r7, #16] temp2_pllckcfg = RCC->PLL1DIVR; - 802f5e2: 4b20 ldr r3, [pc, #128] ; (802f664 ) - 802f5e4: 6b1b ldr r3, [r3, #48] ; 0x30 - 802f5e6: 60fb str r3, [r7, #12] + 802f612: 4b20 ldr r3, [pc, #128] ; (802f694 ) + 802f614: 6b1b ldr r3, [r3, #48] ; 0x30 + 802f616: 60fb str r3, [r7, #12] if(((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 802f5e8: 687b ldr r3, [r7, #4] - 802f5ea: 6a5b ldr r3, [r3, #36] ; 0x24 - 802f5ec: 2b01 cmp r3, #1 - 802f5ee: d031 beq.n 802f654 + 802f618: 687b ldr r3, [r7, #4] + 802f61a: 6a5b ldr r3, [r3, #36] ; 0x24 + 802f61c: 2b01 cmp r3, #1 + 802f61e: d031 beq.n 802f684 (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 802f5f0: 693b ldr r3, [r7, #16] - 802f5f2: f003 0203 and.w r2, r3, #3 - 802f5f6: 687b ldr r3, [r7, #4] - 802f5f8: 6a9b ldr r3, [r3, #40] ; 0x28 + 802f620: 693b ldr r3, [r7, #16] + 802f622: f003 0203 and.w r2, r3, #3 + 802f626: 687b ldr r3, [r7, #4] + 802f628: 6a9b ldr r3, [r3, #40] ; 0x28 if(((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 802f5fa: 429a cmp r2, r3 - 802f5fc: d12a bne.n 802f654 + 802f62a: 429a cmp r2, r3 + 802f62c: d12a bne.n 802f684 ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) || - 802f5fe: 693b ldr r3, [r7, #16] - 802f600: 091b lsrs r3, r3, #4 - 802f602: f003 023f and.w r2, r3, #63 ; 0x3f - 802f606: 687b ldr r3, [r7, #4] - 802f608: 6adb ldr r3, [r3, #44] ; 0x2c + 802f62e: 693b ldr r3, [r7, #16] + 802f630: 091b lsrs r3, r3, #4 + 802f632: f003 023f and.w r2, r3, #63 ; 0x3f + 802f636: 687b ldr r3, [r7, #4] + 802f638: 6adb ldr r3, [r3, #44] ; 0x2c (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 802f60a: 429a cmp r2, r3 - 802f60c: d122 bne.n 802f654 + 802f63a: 429a cmp r2, r3 + 802f63c: d122 bne.n 802f684 (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) || - 802f60e: 68fb ldr r3, [r7, #12] - 802f610: f3c3 0208 ubfx r2, r3, #0, #9 - 802f614: 687b ldr r3, [r7, #4] - 802f616: 6b1b ldr r3, [r3, #48] ; 0x30 - 802f618: 3b01 subs r3, #1 + 802f63e: 68fb ldr r3, [r7, #12] + 802f640: f3c3 0208 ubfx r2, r3, #0, #9 + 802f644: 687b ldr r3, [r7, #4] + 802f646: 6b1b ldr r3, [r3, #48] ; 0x30 + 802f648: 3b01 subs r3, #1 ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) || - 802f61a: 429a cmp r2, r3 - 802f61c: d11a bne.n 802f654 + 802f64a: 429a cmp r2, r3 + 802f64c: d11a bne.n 802f684 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) || - 802f61e: 68fb ldr r3, [r7, #12] - 802f620: 0a5b lsrs r3, r3, #9 - 802f622: f003 027f and.w r2, r3, #127 ; 0x7f - 802f626: 687b ldr r3, [r7, #4] - 802f628: 6b5b ldr r3, [r3, #52] ; 0x34 - 802f62a: 3b01 subs r3, #1 + 802f64e: 68fb ldr r3, [r7, #12] + 802f650: 0a5b lsrs r3, r3, #9 + 802f652: f003 027f and.w r2, r3, #127 ; 0x7f + 802f656: 687b ldr r3, [r7, #4] + 802f658: 6b5b ldr r3, [r3, #52] ; 0x34 + 802f65a: 3b01 subs r3, #1 (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) || - 802f62c: 429a cmp r2, r3 - 802f62e: d111 bne.n 802f654 + 802f65c: 429a cmp r2, r3 + 802f65e: d111 bne.n 802f684 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) || - 802f630: 68fb ldr r3, [r7, #12] - 802f632: 0c1b lsrs r3, r3, #16 - 802f634: f003 027f and.w r2, r3, #127 ; 0x7f - 802f638: 687b ldr r3, [r7, #4] - 802f63a: 6b9b ldr r3, [r3, #56] ; 0x38 - 802f63c: 3b01 subs r3, #1 + 802f660: 68fb ldr r3, [r7, #12] + 802f662: 0c1b lsrs r3, r3, #16 + 802f664: f003 027f and.w r2, r3, #127 ; 0x7f + 802f668: 687b ldr r3, [r7, #4] + 802f66a: 6b9b ldr r3, [r3, #56] ; 0x38 + 802f66c: 3b01 subs r3, #1 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) || - 802f63e: 429a cmp r2, r3 - 802f640: d108 bne.n 802f654 + 802f66e: 429a cmp r2, r3 + 802f670: d108 bne.n 802f684 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_R1) >> RCC_PLL1DIVR_R1_Pos) != (RCC_OscInitStruct->PLL.PLLR - 1U))) - 802f642: 68fb ldr r3, [r7, #12] - 802f644: 0e1b lsrs r3, r3, #24 - 802f646: f003 027f and.w r2, r3, #127 ; 0x7f - 802f64a: 687b ldr r3, [r7, #4] - 802f64c: 6bdb ldr r3, [r3, #60] ; 0x3c - 802f64e: 3b01 subs r3, #1 + 802f672: 68fb ldr r3, [r7, #12] + 802f674: 0e1b lsrs r3, r3, #24 + 802f676: f003 027f and.w r2, r3, #127 ; 0x7f + 802f67a: 687b ldr r3, [r7, #4] + 802f67c: 6bdb ldr r3, [r3, #60] ; 0x3c + 802f67e: 3b01 subs r3, #1 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) || - 802f650: 429a cmp r2, r3 - 802f652: d001 beq.n 802f658 + 802f680: 429a cmp r2, r3 + 802f682: d001 beq.n 802f688 { return HAL_ERROR; - 802f654: 2301 movs r3, #1 - 802f656: e000 b.n 802f65a + 802f684: 2301 movs r3, #1 + 802f686: e000 b.n 802f68a } } } return HAL_OK; - 802f658: 2300 movs r3, #0 + 802f688: 2300 movs r3, #0 } - 802f65a: 4618 mov r0, r3 - 802f65c: 3730 adds r7, #48 ; 0x30 - 802f65e: 46bd mov sp, r7 - 802f660: bd80 pop {r7, pc} - 802f662: bf00 nop - 802f664: 58024400 .word 0x58024400 + 802f68a: 4618 mov r0, r3 + 802f68c: 3730 adds r7, #48 ; 0x30 + 802f68e: 46bd mov sp, r7 + 802f690: bd80 pop {r7, pc} + 802f692: bf00 nop + 802f694: 58024400 .word 0x58024400 -0802f668 : +0802f698 : * D1CPRE[3:0] bits to ensure that Domain1 core clock not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 802f668: b580 push {r7, lr} - 802f66a: b086 sub sp, #24 - 802f66c: af00 add r7, sp, #0 - 802f66e: 6078 str r0, [r7, #4] - 802f670: 6039 str r1, [r7, #0] + 802f698: b580 push {r7, lr} + 802f69a: b086 sub sp, #24 + 802f69c: af00 add r7, sp, #0 + 802f69e: 6078 str r0, [r7, #4] + 802f6a0: 6039 str r1, [r7, #0] HAL_StatusTypeDef halstatus; uint32_t tickstart; uint32_t common_system_clock; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 802f672: 687b ldr r3, [r7, #4] - 802f674: 2b00 cmp r3, #0 - 802f676: d101 bne.n 802f67c + 802f6a2: 687b ldr r3, [r7, #4] + 802f6a4: 2b00 cmp r3, #0 + 802f6a6: d101 bne.n 802f6ac { return HAL_ERROR; - 802f678: 2301 movs r3, #1 - 802f67a: e19c b.n 802f9b6 + 802f6a8: 2301 movs r3, #1 + 802f6aa: e19c b.n 802f9e6 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 802f67c: 4b8a ldr r3, [pc, #552] ; (802f8a8 ) - 802f67e: 681b ldr r3, [r3, #0] - 802f680: f003 030f and.w r3, r3, #15 - 802f684: 683a ldr r2, [r7, #0] - 802f686: 429a cmp r2, r3 - 802f688: d910 bls.n 802f6ac + 802f6ac: 4b8a ldr r3, [pc, #552] ; (802f8d8 ) + 802f6ae: 681b ldr r3, [r3, #0] + 802f6b0: f003 030f and.w r3, r3, #15 + 802f6b4: 683a ldr r2, [r7, #0] + 802f6b6: 429a cmp r2, r3 + 802f6b8: d910 bls.n 802f6dc { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 802f68a: 4b87 ldr r3, [pc, #540] ; (802f8a8 ) - 802f68c: 681b ldr r3, [r3, #0] - 802f68e: f023 020f bic.w r2, r3, #15 - 802f692: 4985 ldr r1, [pc, #532] ; (802f8a8 ) - 802f694: 683b ldr r3, [r7, #0] - 802f696: 4313 orrs r3, r2 - 802f698: 600b str r3, [r1, #0] + 802f6ba: 4b87 ldr r3, [pc, #540] ; (802f8d8 ) + 802f6bc: 681b ldr r3, [r3, #0] + 802f6be: f023 020f bic.w r2, r3, #15 + 802f6c2: 4985 ldr r1, [pc, #532] ; (802f8d8 ) + 802f6c4: 683b ldr r3, [r7, #0] + 802f6c6: 4313 orrs r3, r2 + 802f6c8: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 802f69a: 4b83 ldr r3, [pc, #524] ; (802f8a8 ) - 802f69c: 681b ldr r3, [r3, #0] - 802f69e: f003 030f and.w r3, r3, #15 - 802f6a2: 683a ldr r2, [r7, #0] - 802f6a4: 429a cmp r2, r3 - 802f6a6: d001 beq.n 802f6ac + 802f6ca: 4b83 ldr r3, [pc, #524] ; (802f8d8 ) + 802f6cc: 681b ldr r3, [r3, #0] + 802f6ce: f003 030f and.w r3, r3, #15 + 802f6d2: 683a ldr r2, [r7, #0] + 802f6d4: 429a cmp r2, r3 + 802f6d6: d001 beq.n 802f6dc { return HAL_ERROR; - 802f6a8: 2301 movs r3, #1 - 802f6aa: e184 b.n 802f9b6 + 802f6d8: 2301 movs r3, #1 + 802f6da: e184 b.n 802f9e6 } /* Increasing the BUS frequency divider */ /*-------------------------- D1PCLK1/CDPCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1) - 802f6ac: 687b ldr r3, [r7, #4] - 802f6ae: 681b ldr r3, [r3, #0] - 802f6b0: f003 0304 and.w r3, r3, #4 - 802f6b4: 2b00 cmp r3, #0 - 802f6b6: d010 beq.n 802f6da + 802f6dc: 687b ldr r3, [r7, #4] + 802f6de: 681b ldr r3, [r3, #0] + 802f6e0: f003 0304 and.w r3, r3, #4 + 802f6e4: 2b00 cmp r3, #0 + 802f6e6: d010 beq.n 802f70a { #if defined (RCC_D1CFGR_D1PPRE) if((RCC_ClkInitStruct->APB3CLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_D1PPRE)) - 802f6b8: 687b ldr r3, [r7, #4] - 802f6ba: 691a ldr r2, [r3, #16] - 802f6bc: 4b7b ldr r3, [pc, #492] ; (802f8ac ) - 802f6be: 699b ldr r3, [r3, #24] - 802f6c0: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f6c4: 429a cmp r2, r3 - 802f6c6: d908 bls.n 802f6da + 802f6e8: 687b ldr r3, [r7, #4] + 802f6ea: 691a ldr r2, [r3, #16] + 802f6ec: 4b7b ldr r3, [pc, #492] ; (802f8dc ) + 802f6ee: 699b ldr r3, [r3, #24] + 802f6f0: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f6f4: 429a cmp r2, r3 + 802f6f6: d908 bls.n 802f70a { assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider)); MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider); - 802f6c8: 4b78 ldr r3, [pc, #480] ; (802f8ac ) - 802f6ca: 699b ldr r3, [r3, #24] - 802f6cc: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f6d0: 687b ldr r3, [r7, #4] - 802f6d2: 691b ldr r3, [r3, #16] - 802f6d4: 4975 ldr r1, [pc, #468] ; (802f8ac ) - 802f6d6: 4313 orrs r3, r2 - 802f6d8: 618b str r3, [r1, #24] + 802f6f8: 4b78 ldr r3, [pc, #480] ; (802f8dc ) + 802f6fa: 699b ldr r3, [r3, #24] + 802f6fc: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f700: 687b ldr r3, [r7, #4] + 802f702: 691b ldr r3, [r3, #16] + 802f704: 4975 ldr r1, [pc, #468] ; (802f8dc ) + 802f706: 4313 orrs r3, r2 + 802f708: 618b str r3, [r1, #24] } #endif } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 802f6da: 687b ldr r3, [r7, #4] - 802f6dc: 681b ldr r3, [r3, #0] - 802f6de: f003 0308 and.w r3, r3, #8 - 802f6e2: 2b00 cmp r3, #0 - 802f6e4: d010 beq.n 802f708 + 802f70a: 687b ldr r3, [r7, #4] + 802f70c: 681b ldr r3, [r3, #0] + 802f70e: f003 0308 and.w r3, r3, #8 + 802f712: 2b00 cmp r3, #0 + 802f714: d010 beq.n 802f738 { #if defined (RCC_D2CFGR_D2PPRE1) if((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1)) - 802f6e6: 687b ldr r3, [r7, #4] - 802f6e8: 695a ldr r2, [r3, #20] - 802f6ea: 4b70 ldr r3, [pc, #448] ; (802f8ac ) - 802f6ec: 69db ldr r3, [r3, #28] - 802f6ee: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f6f2: 429a cmp r2, r3 - 802f6f4: d908 bls.n 802f708 + 802f716: 687b ldr r3, [r7, #4] + 802f718: 695a ldr r2, [r3, #20] + 802f71a: 4b70 ldr r3, [pc, #448] ; (802f8dc ) + 802f71c: 69db ldr r3, [r3, #28] + 802f71e: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f722: 429a cmp r2, r3 + 802f724: d908 bls.n 802f738 { assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); - 802f6f6: 4b6d ldr r3, [pc, #436] ; (802f8ac ) - 802f6f8: 69db ldr r3, [r3, #28] - 802f6fa: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f6fe: 687b ldr r3, [r7, #4] - 802f700: 695b ldr r3, [r3, #20] - 802f702: 496a ldr r1, [pc, #424] ; (802f8ac ) - 802f704: 4313 orrs r3, r2 - 802f706: 61cb str r3, [r1, #28] + 802f726: 4b6d ldr r3, [pc, #436] ; (802f8dc ) + 802f728: 69db ldr r3, [r3, #28] + 802f72a: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f72e: 687b ldr r3, [r7, #4] + 802f730: 695b ldr r3, [r3, #20] + 802f732: 496a ldr r1, [pc, #424] ; (802f8dc ) + 802f734: 4313 orrs r3, r2 + 802f736: 61cb str r3, [r1, #28] MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); } #endif } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 802f708: 687b ldr r3, [r7, #4] - 802f70a: 681b ldr r3, [r3, #0] - 802f70c: f003 0310 and.w r3, r3, #16 - 802f710: 2b00 cmp r3, #0 - 802f712: d010 beq.n 802f736 + 802f738: 687b ldr r3, [r7, #4] + 802f73a: 681b ldr r3, [r3, #0] + 802f73c: f003 0310 and.w r3, r3, #16 + 802f740: 2b00 cmp r3, #0 + 802f742: d010 beq.n 802f766 { #if defined(RCC_D2CFGR_D2PPRE2) if((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2)) - 802f714: 687b ldr r3, [r7, #4] - 802f716: 699a ldr r2, [r3, #24] - 802f718: 4b64 ldr r3, [pc, #400] ; (802f8ac ) - 802f71a: 69db ldr r3, [r3, #28] - 802f71c: f403 63e0 and.w r3, r3, #1792 ; 0x700 - 802f720: 429a cmp r2, r3 - 802f722: d908 bls.n 802f736 + 802f744: 687b ldr r3, [r7, #4] + 802f746: 699a ldr r2, [r3, #24] + 802f748: 4b64 ldr r3, [pc, #400] ; (802f8dc ) + 802f74a: 69db ldr r3, [r3, #28] + 802f74c: f403 63e0 and.w r3, r3, #1792 ; 0x700 + 802f750: 429a cmp r2, r3 + 802f752: d908 bls.n 802f766 { assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider)); - 802f724: 4b61 ldr r3, [pc, #388] ; (802f8ac ) - 802f726: 69db ldr r3, [r3, #28] - 802f728: f423 62e0 bic.w r2, r3, #1792 ; 0x700 - 802f72c: 687b ldr r3, [r7, #4] - 802f72e: 699b ldr r3, [r3, #24] - 802f730: 495e ldr r1, [pc, #376] ; (802f8ac ) - 802f732: 4313 orrs r3, r2 - 802f734: 61cb str r3, [r1, #28] + 802f754: 4b61 ldr r3, [pc, #388] ; (802f8dc ) + 802f756: 69db ldr r3, [r3, #28] + 802f758: f423 62e0 bic.w r2, r3, #1792 ; 0x700 + 802f75c: 687b ldr r3, [r7, #4] + 802f75e: 699b ldr r3, [r3, #24] + 802f760: 495e ldr r1, [pc, #376] ; (802f8dc ) + 802f762: 4313 orrs r3, r2 + 802f764: 61cb str r3, [r1, #28] } #endif } /*-------------------------- D3PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1) - 802f736: 687b ldr r3, [r7, #4] - 802f738: 681b ldr r3, [r3, #0] - 802f73a: f003 0320 and.w r3, r3, #32 - 802f73e: 2b00 cmp r3, #0 - 802f740: d010 beq.n 802f764 + 802f766: 687b ldr r3, [r7, #4] + 802f768: 681b ldr r3, [r3, #0] + 802f76a: f003 0320 and.w r3, r3, #32 + 802f76e: 2b00 cmp r3, #0 + 802f770: d010 beq.n 802f794 { #if defined(RCC_D3CFGR_D3PPRE) if((RCC_ClkInitStruct->APB4CLKDivider) > (RCC->D3CFGR & RCC_D3CFGR_D3PPRE)) - 802f742: 687b ldr r3, [r7, #4] - 802f744: 69da ldr r2, [r3, #28] - 802f746: 4b59 ldr r3, [pc, #356] ; (802f8ac ) - 802f748: 6a1b ldr r3, [r3, #32] - 802f74a: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f74e: 429a cmp r2, r3 - 802f750: d908 bls.n 802f764 + 802f772: 687b ldr r3, [r7, #4] + 802f774: 69da ldr r2, [r3, #28] + 802f776: 4b59 ldr r3, [pc, #356] ; (802f8dc ) + 802f778: 6a1b ldr r3, [r3, #32] + 802f77a: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f77e: 429a cmp r2, r3 + 802f780: d908 bls.n 802f794 { assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider)); MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider) ); - 802f752: 4b56 ldr r3, [pc, #344] ; (802f8ac ) - 802f754: 6a1b ldr r3, [r3, #32] - 802f756: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f75a: 687b ldr r3, [r7, #4] - 802f75c: 69db ldr r3, [r3, #28] - 802f75e: 4953 ldr r1, [pc, #332] ; (802f8ac ) - 802f760: 4313 orrs r3, r2 - 802f762: 620b str r3, [r1, #32] + 802f782: 4b56 ldr r3, [pc, #344] ; (802f8dc ) + 802f784: 6a1b ldr r3, [r3, #32] + 802f786: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f78a: 687b ldr r3, [r7, #4] + 802f78c: 69db ldr r3, [r3, #28] + 802f78e: 4953 ldr r1, [pc, #332] ; (802f8dc ) + 802f790: 4313 orrs r3, r2 + 802f792: 620b str r3, [r1, #32] } #endif } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 802f764: 687b ldr r3, [r7, #4] - 802f766: 681b ldr r3, [r3, #0] - 802f768: f003 0302 and.w r3, r3, #2 - 802f76c: 2b00 cmp r3, #0 - 802f76e: d010 beq.n 802f792 + 802f794: 687b ldr r3, [r7, #4] + 802f796: 681b ldr r3, [r3, #0] + 802f798: f003 0302 and.w r3, r3, #2 + 802f79c: 2b00 cmp r3, #0 + 802f79e: d010 beq.n 802f7c2 { #if defined (RCC_D1CFGR_HPRE) if((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE)) - 802f770: 687b ldr r3, [r7, #4] - 802f772: 68da ldr r2, [r3, #12] - 802f774: 4b4d ldr r3, [pc, #308] ; (802f8ac ) - 802f776: 699b ldr r3, [r3, #24] - 802f778: f003 030f and.w r3, r3, #15 - 802f77c: 429a cmp r2, r3 - 802f77e: d908 bls.n 802f792 + 802f7a0: 687b ldr r3, [r7, #4] + 802f7a2: 68da ldr r2, [r3, #12] + 802f7a4: 4b4d ldr r3, [pc, #308] ; (802f8dc ) + 802f7a6: 699b ldr r3, [r3, #24] + 802f7a8: f003 030f and.w r3, r3, #15 + 802f7ac: 429a cmp r2, r3 + 802f7ae: d908 bls.n 802f7c2 { /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 802f780: 4b4a ldr r3, [pc, #296] ; (802f8ac ) - 802f782: 699b ldr r3, [r3, #24] - 802f784: f023 020f bic.w r2, r3, #15 - 802f788: 687b ldr r3, [r7, #4] - 802f78a: 68db ldr r3, [r3, #12] - 802f78c: 4947 ldr r1, [pc, #284] ; (802f8ac ) - 802f78e: 4313 orrs r3, r2 - 802f790: 618b str r3, [r1, #24] + 802f7b0: 4b4a ldr r3, [pc, #296] ; (802f8dc ) + 802f7b2: 699b ldr r3, [r3, #24] + 802f7b4: f023 020f bic.w r2, r3, #15 + 802f7b8: 687b ldr r3, [r7, #4] + 802f7ba: 68db ldr r3, [r3, #12] + 802f7bc: 4947 ldr r1, [pc, #284] ; (802f8dc ) + 802f7be: 4313 orrs r3, r2 + 802f7c0: 618b str r3, [r1, #24] } #endif } /*------------------------- SYSCLK Configuration -------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 802f792: 687b ldr r3, [r7, #4] - 802f794: 681b ldr r3, [r3, #0] - 802f796: f003 0301 and.w r3, r3, #1 - 802f79a: 2b00 cmp r3, #0 - 802f79c: d055 beq.n 802f84a + 802f7c2: 687b ldr r3, [r7, #4] + 802f7c4: 681b ldr r3, [r3, #0] + 802f7c6: f003 0301 and.w r3, r3, #1 + 802f7ca: 2b00 cmp r3, #0 + 802f7cc: d055 beq.n 802f87a { assert_param(IS_RCC_SYSCLK(RCC_ClkInitStruct->SYSCLKDivider)); assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); #if defined(RCC_D1CFGR_D1CPRE) MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, RCC_ClkInitStruct->SYSCLKDivider); - 802f79e: 4b43 ldr r3, [pc, #268] ; (802f8ac ) - 802f7a0: 699b ldr r3, [r3, #24] - 802f7a2: f423 6270 bic.w r2, r3, #3840 ; 0xf00 - 802f7a6: 687b ldr r3, [r7, #4] - 802f7a8: 689b ldr r3, [r3, #8] - 802f7aa: 4940 ldr r1, [pc, #256] ; (802f8ac ) - 802f7ac: 4313 orrs r3, r2 - 802f7ae: 618b str r3, [r1, #24] + 802f7ce: 4b43 ldr r3, [pc, #268] ; (802f8dc ) + 802f7d0: 699b ldr r3, [r3, #24] + 802f7d2: f423 6270 bic.w r2, r3, #3840 ; 0xf00 + 802f7d6: 687b ldr r3, [r7, #4] + 802f7d8: 689b ldr r3, [r3, #8] + 802f7da: 4940 ldr r1, [pc, #256] ; (802f8dc ) + 802f7dc: 4313 orrs r3, r2 + 802f7de: 618b str r3, [r1, #24] #else MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, RCC_ClkInitStruct->SYSCLKDivider); #endif /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 802f7b0: 687b ldr r3, [r7, #4] - 802f7b2: 685b ldr r3, [r3, #4] - 802f7b4: 2b02 cmp r3, #2 - 802f7b6: d107 bne.n 802f7c8 + 802f7e0: 687b ldr r3, [r7, #4] + 802f7e2: 685b ldr r3, [r3, #4] + 802f7e4: 2b02 cmp r3, #2 + 802f7e6: d107 bne.n 802f7f8 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 802f7b8: 4b3c ldr r3, [pc, #240] ; (802f8ac ) - 802f7ba: 681b ldr r3, [r3, #0] - 802f7bc: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802f7c0: 2b00 cmp r3, #0 - 802f7c2: d121 bne.n 802f808 + 802f7e8: 4b3c ldr r3, [pc, #240] ; (802f8dc ) + 802f7ea: 681b ldr r3, [r3, #0] + 802f7ec: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802f7f0: 2b00 cmp r3, #0 + 802f7f2: d121 bne.n 802f838 { return HAL_ERROR; - 802f7c4: 2301 movs r3, #1 - 802f7c6: e0f6 b.n 802f9b6 + 802f7f4: 2301 movs r3, #1 + 802f7f6: e0f6 b.n 802f9e6 } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 802f7c8: 687b ldr r3, [r7, #4] - 802f7ca: 685b ldr r3, [r3, #4] - 802f7cc: 2b03 cmp r3, #3 - 802f7ce: d107 bne.n 802f7e0 + 802f7f8: 687b ldr r3, [r7, #4] + 802f7fa: 685b ldr r3, [r3, #4] + 802f7fc: 2b03 cmp r3, #3 + 802f7fe: d107 bne.n 802f810 { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 802f7d0: 4b36 ldr r3, [pc, #216] ; (802f8ac ) - 802f7d2: 681b ldr r3, [r3, #0] - 802f7d4: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802f7d8: 2b00 cmp r3, #0 - 802f7da: d115 bne.n 802f808 + 802f800: 4b36 ldr r3, [pc, #216] ; (802f8dc ) + 802f802: 681b ldr r3, [r3, #0] + 802f804: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 802f808: 2b00 cmp r3, #0 + 802f80a: d115 bne.n 802f838 { return HAL_ERROR; - 802f7dc: 2301 movs r3, #1 - 802f7de: e0ea b.n 802f9b6 + 802f80c: 2301 movs r3, #1 + 802f80e: e0ea b.n 802f9e6 } } /* CSI is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_CSI) - 802f7e0: 687b ldr r3, [r7, #4] - 802f7e2: 685b ldr r3, [r3, #4] - 802f7e4: 2b01 cmp r3, #1 - 802f7e6: d107 bne.n 802f7f8 + 802f810: 687b ldr r3, [r7, #4] + 802f812: 685b ldr r3, [r3, #4] + 802f814: 2b01 cmp r3, #1 + 802f816: d107 bne.n 802f828 { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U) - 802f7e8: 4b30 ldr r3, [pc, #192] ; (802f8ac ) - 802f7ea: 681b ldr r3, [r3, #0] - 802f7ec: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f7f0: 2b00 cmp r3, #0 - 802f7f2: d109 bne.n 802f808 + 802f818: 4b30 ldr r3, [pc, #192] ; (802f8dc ) + 802f81a: 681b ldr r3, [r3, #0] + 802f81c: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f820: 2b00 cmp r3, #0 + 802f822: d109 bne.n 802f838 { return HAL_ERROR; - 802f7f4: 2301 movs r3, #1 - 802f7f6: e0de b.n 802f9b6 + 802f824: 2301 movs r3, #1 + 802f826: e0de b.n 802f9e6 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802f7f8: 4b2c ldr r3, [pc, #176] ; (802f8ac ) - 802f7fa: 681b ldr r3, [r3, #0] - 802f7fc: f003 0304 and.w r3, r3, #4 - 802f800: 2b00 cmp r3, #0 - 802f802: d101 bne.n 802f808 + 802f828: 4b2c ldr r3, [pc, #176] ; (802f8dc ) + 802f82a: 681b ldr r3, [r3, #0] + 802f82c: f003 0304 and.w r3, r3, #4 + 802f830: 2b00 cmp r3, #0 + 802f832: d101 bne.n 802f838 { return HAL_ERROR; - 802f804: 2301 movs r3, #1 - 802f806: e0d6 b.n 802f9b6 + 802f834: 2301 movs r3, #1 + 802f836: e0d6 b.n 802f9e6 } } MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); - 802f808: 4b28 ldr r3, [pc, #160] ; (802f8ac ) - 802f80a: 691b ldr r3, [r3, #16] - 802f80c: f023 0207 bic.w r2, r3, #7 - 802f810: 687b ldr r3, [r7, #4] - 802f812: 685b ldr r3, [r3, #4] - 802f814: 4925 ldr r1, [pc, #148] ; (802f8ac ) - 802f816: 4313 orrs r3, r2 - 802f818: 610b str r3, [r1, #16] + 802f838: 4b28 ldr r3, [pc, #160] ; (802f8dc ) + 802f83a: 691b ldr r3, [r3, #16] + 802f83c: f023 0207 bic.w r2, r3, #7 + 802f840: 687b ldr r3, [r7, #4] + 802f842: 685b ldr r3, [r3, #4] + 802f844: 4925 ldr r1, [pc, #148] ; (802f8dc ) + 802f846: 4313 orrs r3, r2 + 802f848: 610b str r3, [r1, #16] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f81a: f7f6 fbbb bl 8025f94 - 802f81e: 6178 str r0, [r7, #20] + 802f84a: f7f6 fbbb bl 8025fc4 + 802f84e: 6178 str r0, [r7, #20] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 802f820: e00a b.n 802f838 + 802f850: e00a b.n 802f868 { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 802f822: f7f6 fbb7 bl 8025f94 - 802f826: 4602 mov r2, r0 - 802f828: 697b ldr r3, [r7, #20] - 802f82a: 1ad3 subs r3, r2, r3 - 802f82c: f241 3288 movw r2, #5000 ; 0x1388 - 802f830: 4293 cmp r3, r2 - 802f832: d901 bls.n 802f838 + 802f852: f7f6 fbb7 bl 8025fc4 + 802f856: 4602 mov r2, r0 + 802f858: 697b ldr r3, [r7, #20] + 802f85a: 1ad3 subs r3, r2, r3 + 802f85c: f241 3288 movw r2, #5000 ; 0x1388 + 802f860: 4293 cmp r3, r2 + 802f862: d901 bls.n 802f868 { return HAL_TIMEOUT; - 802f834: 2303 movs r3, #3 - 802f836: e0be b.n 802f9b6 + 802f864: 2303 movs r3, #3 + 802f866: e0be b.n 802f9e6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 802f838: 4b1c ldr r3, [pc, #112] ; (802f8ac ) - 802f83a: 691b ldr r3, [r3, #16] - 802f83c: f003 0238 and.w r2, r3, #56 ; 0x38 - 802f840: 687b ldr r3, [r7, #4] - 802f842: 685b ldr r3, [r3, #4] - 802f844: 00db lsls r3, r3, #3 - 802f846: 429a cmp r2, r3 - 802f848: d1eb bne.n 802f822 + 802f868: 4b1c ldr r3, [pc, #112] ; (802f8dc ) + 802f86a: 691b ldr r3, [r3, #16] + 802f86c: f003 0238 and.w r2, r3, #56 ; 0x38 + 802f870: 687b ldr r3, [r7, #4] + 802f872: 685b ldr r3, [r3, #4] + 802f874: 00db lsls r3, r3, #3 + 802f876: 429a cmp r2, r3 + 802f878: d1eb bne.n 802f852 } /* Decreasing the BUS frequency divider */ /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 802f84a: 687b ldr r3, [r7, #4] - 802f84c: 681b ldr r3, [r3, #0] - 802f84e: f003 0302 and.w r3, r3, #2 - 802f852: 2b00 cmp r3, #0 - 802f854: d010 beq.n 802f878 + 802f87a: 687b ldr r3, [r7, #4] + 802f87c: 681b ldr r3, [r3, #0] + 802f87e: f003 0302 and.w r3, r3, #2 + 802f882: 2b00 cmp r3, #0 + 802f884: d010 beq.n 802f8a8 { #if defined(RCC_D1CFGR_HPRE) if((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE)) - 802f856: 687b ldr r3, [r7, #4] - 802f858: 68da ldr r2, [r3, #12] - 802f85a: 4b14 ldr r3, [pc, #80] ; (802f8ac ) - 802f85c: 699b ldr r3, [r3, #24] - 802f85e: f003 030f and.w r3, r3, #15 - 802f862: 429a cmp r2, r3 - 802f864: d208 bcs.n 802f878 + 802f886: 687b ldr r3, [r7, #4] + 802f888: 68da ldr r2, [r3, #12] + 802f88a: 4b14 ldr r3, [pc, #80] ; (802f8dc ) + 802f88c: 699b ldr r3, [r3, #24] + 802f88e: f003 030f and.w r3, r3, #15 + 802f892: 429a cmp r2, r3 + 802f894: d208 bcs.n 802f8a8 { /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 802f866: 4b11 ldr r3, [pc, #68] ; (802f8ac ) - 802f868: 699b ldr r3, [r3, #24] - 802f86a: f023 020f bic.w r2, r3, #15 - 802f86e: 687b ldr r3, [r7, #4] - 802f870: 68db ldr r3, [r3, #12] - 802f872: 490e ldr r1, [pc, #56] ; (802f8ac ) - 802f874: 4313 orrs r3, r2 - 802f876: 618b str r3, [r1, #24] + 802f896: 4b11 ldr r3, [pc, #68] ; (802f8dc ) + 802f898: 699b ldr r3, [r3, #24] + 802f89a: f023 020f bic.w r2, r3, #15 + 802f89e: 687b ldr r3, [r7, #4] + 802f8a0: 68db ldr r3, [r3, #12] + 802f8a2: 490e ldr r1, [pc, #56] ; (802f8dc ) + 802f8a4: 4313 orrs r3, r2 + 802f8a6: 618b str r3, [r1, #24] } #endif } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 802f878: 4b0b ldr r3, [pc, #44] ; (802f8a8 ) - 802f87a: 681b ldr r3, [r3, #0] - 802f87c: f003 030f and.w r3, r3, #15 - 802f880: 683a ldr r2, [r7, #0] - 802f882: 429a cmp r2, r3 - 802f884: d214 bcs.n 802f8b0 + 802f8a8: 4b0b ldr r3, [pc, #44] ; (802f8d8 ) + 802f8aa: 681b ldr r3, [r3, #0] + 802f8ac: f003 030f and.w r3, r3, #15 + 802f8b0: 683a ldr r2, [r7, #0] + 802f8b2: 429a cmp r2, r3 + 802f8b4: d214 bcs.n 802f8e0 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 802f886: 4b08 ldr r3, [pc, #32] ; (802f8a8 ) - 802f888: 681b ldr r3, [r3, #0] - 802f88a: f023 020f bic.w r2, r3, #15 - 802f88e: 4906 ldr r1, [pc, #24] ; (802f8a8 ) - 802f890: 683b ldr r3, [r7, #0] - 802f892: 4313 orrs r3, r2 - 802f894: 600b str r3, [r1, #0] + 802f8b6: 4b08 ldr r3, [pc, #32] ; (802f8d8 ) + 802f8b8: 681b ldr r3, [r3, #0] + 802f8ba: f023 020f bic.w r2, r3, #15 + 802f8be: 4906 ldr r1, [pc, #24] ; (802f8d8 ) + 802f8c0: 683b ldr r3, [r7, #0] + 802f8c2: 4313 orrs r3, r2 + 802f8c4: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 802f896: 4b04 ldr r3, [pc, #16] ; (802f8a8 ) - 802f898: 681b ldr r3, [r3, #0] - 802f89a: f003 030f and.w r3, r3, #15 - 802f89e: 683a ldr r2, [r7, #0] - 802f8a0: 429a cmp r2, r3 - 802f8a2: d005 beq.n 802f8b0 + 802f8c6: 4b04 ldr r3, [pc, #16] ; (802f8d8 ) + 802f8c8: 681b ldr r3, [r3, #0] + 802f8ca: f003 030f and.w r3, r3, #15 + 802f8ce: 683a ldr r2, [r7, #0] + 802f8d0: 429a cmp r2, r3 + 802f8d2: d005 beq.n 802f8e0 { return HAL_ERROR; - 802f8a4: 2301 movs r3, #1 - 802f8a6: e086 b.n 802f9b6 - 802f8a8: 52002000 .word 0x52002000 - 802f8ac: 58024400 .word 0x58024400 + 802f8d4: 2301 movs r3, #1 + 802f8d6: e086 b.n 802f9e6 + 802f8d8: 52002000 .word 0x52002000 + 802f8dc: 58024400 .word 0x58024400 } } /*-------------------------- D1PCLK1/CDPCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1) - 802f8b0: 687b ldr r3, [r7, #4] - 802f8b2: 681b ldr r3, [r3, #0] - 802f8b4: f003 0304 and.w r3, r3, #4 - 802f8b8: 2b00 cmp r3, #0 - 802f8ba: d010 beq.n 802f8de + 802f8e0: 687b ldr r3, [r7, #4] + 802f8e2: 681b ldr r3, [r3, #0] + 802f8e4: f003 0304 and.w r3, r3, #4 + 802f8e8: 2b00 cmp r3, #0 + 802f8ea: d010 beq.n 802f90e { #if defined(RCC_D1CFGR_D1PPRE) if((RCC_ClkInitStruct->APB3CLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_D1PPRE)) - 802f8bc: 687b ldr r3, [r7, #4] - 802f8be: 691a ldr r2, [r3, #16] - 802f8c0: 4b3f ldr r3, [pc, #252] ; (802f9c0 ) - 802f8c2: 699b ldr r3, [r3, #24] - 802f8c4: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f8c8: 429a cmp r2, r3 - 802f8ca: d208 bcs.n 802f8de + 802f8ec: 687b ldr r3, [r7, #4] + 802f8ee: 691a ldr r2, [r3, #16] + 802f8f0: 4b3f ldr r3, [pc, #252] ; (802f9f0 ) + 802f8f2: 699b ldr r3, [r3, #24] + 802f8f4: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f8f8: 429a cmp r2, r3 + 802f8fa: d208 bcs.n 802f90e { assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider)); MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider); - 802f8cc: 4b3c ldr r3, [pc, #240] ; (802f9c0 ) - 802f8ce: 699b ldr r3, [r3, #24] - 802f8d0: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f8d4: 687b ldr r3, [r7, #4] - 802f8d6: 691b ldr r3, [r3, #16] - 802f8d8: 4939 ldr r1, [pc, #228] ; (802f9c0 ) - 802f8da: 4313 orrs r3, r2 - 802f8dc: 618b str r3, [r1, #24] + 802f8fc: 4b3c ldr r3, [pc, #240] ; (802f9f0 ) + 802f8fe: 699b ldr r3, [r3, #24] + 802f900: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f904: 687b ldr r3, [r7, #4] + 802f906: 691b ldr r3, [r3, #16] + 802f908: 4939 ldr r1, [pc, #228] ; (802f9f0 ) + 802f90a: 4313 orrs r3, r2 + 802f90c: 618b str r3, [r1, #24] } #endif } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 802f8de: 687b ldr r3, [r7, #4] - 802f8e0: 681b ldr r3, [r3, #0] - 802f8e2: f003 0308 and.w r3, r3, #8 - 802f8e6: 2b00 cmp r3, #0 - 802f8e8: d010 beq.n 802f90c + 802f90e: 687b ldr r3, [r7, #4] + 802f910: 681b ldr r3, [r3, #0] + 802f912: f003 0308 and.w r3, r3, #8 + 802f916: 2b00 cmp r3, #0 + 802f918: d010 beq.n 802f93c { #if defined(RCC_D2CFGR_D2PPRE1) if((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1)) - 802f8ea: 687b ldr r3, [r7, #4] - 802f8ec: 695a ldr r2, [r3, #20] - 802f8ee: 4b34 ldr r3, [pc, #208] ; (802f9c0 ) - 802f8f0: 69db ldr r3, [r3, #28] - 802f8f2: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f8f6: 429a cmp r2, r3 - 802f8f8: d208 bcs.n 802f90c + 802f91a: 687b ldr r3, [r7, #4] + 802f91c: 695a ldr r2, [r3, #20] + 802f91e: 4b34 ldr r3, [pc, #208] ; (802f9f0 ) + 802f920: 69db ldr r3, [r3, #28] + 802f922: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f926: 429a cmp r2, r3 + 802f928: d208 bcs.n 802f93c { assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); - 802f8fa: 4b31 ldr r3, [pc, #196] ; (802f9c0 ) - 802f8fc: 69db ldr r3, [r3, #28] - 802f8fe: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f902: 687b ldr r3, [r7, #4] - 802f904: 695b ldr r3, [r3, #20] - 802f906: 492e ldr r1, [pc, #184] ; (802f9c0 ) - 802f908: 4313 orrs r3, r2 - 802f90a: 61cb str r3, [r1, #28] + 802f92a: 4b31 ldr r3, [pc, #196] ; (802f9f0 ) + 802f92c: 69db ldr r3, [r3, #28] + 802f92e: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f932: 687b ldr r3, [r7, #4] + 802f934: 695b ldr r3, [r3, #20] + 802f936: 492e ldr r1, [pc, #184] ; (802f9f0 ) + 802f938: 4313 orrs r3, r2 + 802f93a: 61cb str r3, [r1, #28] } #endif } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 802f90c: 687b ldr r3, [r7, #4] - 802f90e: 681b ldr r3, [r3, #0] - 802f910: f003 0310 and.w r3, r3, #16 - 802f914: 2b00 cmp r3, #0 - 802f916: d010 beq.n 802f93a + 802f93c: 687b ldr r3, [r7, #4] + 802f93e: 681b ldr r3, [r3, #0] + 802f940: f003 0310 and.w r3, r3, #16 + 802f944: 2b00 cmp r3, #0 + 802f946: d010 beq.n 802f96a { #if defined (RCC_D2CFGR_D2PPRE2) if((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2)) - 802f918: 687b ldr r3, [r7, #4] - 802f91a: 699a ldr r2, [r3, #24] - 802f91c: 4b28 ldr r3, [pc, #160] ; (802f9c0 ) - 802f91e: 69db ldr r3, [r3, #28] - 802f920: f403 63e0 and.w r3, r3, #1792 ; 0x700 - 802f924: 429a cmp r2, r3 - 802f926: d208 bcs.n 802f93a + 802f948: 687b ldr r3, [r7, #4] + 802f94a: 699a ldr r2, [r3, #24] + 802f94c: 4b28 ldr r3, [pc, #160] ; (802f9f0 ) + 802f94e: 69db ldr r3, [r3, #28] + 802f950: f403 63e0 and.w r3, r3, #1792 ; 0x700 + 802f954: 429a cmp r2, r3 + 802f956: d208 bcs.n 802f96a { assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider)); - 802f928: 4b25 ldr r3, [pc, #148] ; (802f9c0 ) - 802f92a: 69db ldr r3, [r3, #28] - 802f92c: f423 62e0 bic.w r2, r3, #1792 ; 0x700 - 802f930: 687b ldr r3, [r7, #4] - 802f932: 699b ldr r3, [r3, #24] - 802f934: 4922 ldr r1, [pc, #136] ; (802f9c0 ) - 802f936: 4313 orrs r3, r2 - 802f938: 61cb str r3, [r1, #28] + 802f958: 4b25 ldr r3, [pc, #148] ; (802f9f0 ) + 802f95a: 69db ldr r3, [r3, #28] + 802f95c: f423 62e0 bic.w r2, r3, #1792 ; 0x700 + 802f960: 687b ldr r3, [r7, #4] + 802f962: 699b ldr r3, [r3, #24] + 802f964: 4922 ldr r1, [pc, #136] ; (802f9f0 ) + 802f966: 4313 orrs r3, r2 + 802f968: 61cb str r3, [r1, #28] } #endif } /*-------------------------- D3PCLK1/SRDPCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1) - 802f93a: 687b ldr r3, [r7, #4] - 802f93c: 681b ldr r3, [r3, #0] - 802f93e: f003 0320 and.w r3, r3, #32 - 802f942: 2b00 cmp r3, #0 - 802f944: d010 beq.n 802f968 + 802f96a: 687b ldr r3, [r7, #4] + 802f96c: 681b ldr r3, [r3, #0] + 802f96e: f003 0320 and.w r3, r3, #32 + 802f972: 2b00 cmp r3, #0 + 802f974: d010 beq.n 802f998 { #if defined(RCC_D3CFGR_D3PPRE) if((RCC_ClkInitStruct->APB4CLKDivider) < (RCC->D3CFGR & RCC_D3CFGR_D3PPRE)) - 802f946: 687b ldr r3, [r7, #4] - 802f948: 69da ldr r2, [r3, #28] - 802f94a: 4b1d ldr r3, [pc, #116] ; (802f9c0 ) - 802f94c: 6a1b ldr r3, [r3, #32] - 802f94e: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f952: 429a cmp r2, r3 - 802f954: d208 bcs.n 802f968 + 802f976: 687b ldr r3, [r7, #4] + 802f978: 69da ldr r2, [r3, #28] + 802f97a: 4b1d ldr r3, [pc, #116] ; (802f9f0 ) + 802f97c: 6a1b ldr r3, [r3, #32] + 802f97e: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f982: 429a cmp r2, r3 + 802f984: d208 bcs.n 802f998 { assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider)); MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider) ); - 802f956: 4b1a ldr r3, [pc, #104] ; (802f9c0 ) - 802f958: 6a1b ldr r3, [r3, #32] - 802f95a: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f95e: 687b ldr r3, [r7, #4] - 802f960: 69db ldr r3, [r3, #28] - 802f962: 4917 ldr r1, [pc, #92] ; (802f9c0 ) - 802f964: 4313 orrs r3, r2 - 802f966: 620b str r3, [r1, #32] + 802f986: 4b1a ldr r3, [pc, #104] ; (802f9f0 ) + 802f988: 6a1b ldr r3, [r3, #32] + 802f98a: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f98e: 687b ldr r3, [r7, #4] + 802f990: 69db ldr r3, [r3, #28] + 802f992: 4917 ldr r1, [pc, #92] ; (802f9f0 ) + 802f994: 4313 orrs r3, r2 + 802f996: 620b str r3, [r1, #32] #endif } /* Update the SystemCoreClock global variable */ #if defined(RCC_D1CFGR_D1CPRE) common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU); - 802f968: f000 f834 bl 802f9d4 - 802f96c: 4602 mov r2, r0 - 802f96e: 4b14 ldr r3, [pc, #80] ; (802f9c0 ) - 802f970: 699b ldr r3, [r3, #24] - 802f972: 0a1b lsrs r3, r3, #8 - 802f974: f003 030f and.w r3, r3, #15 - 802f978: 4912 ldr r1, [pc, #72] ; (802f9c4 ) - 802f97a: 5ccb ldrb r3, [r1, r3] - 802f97c: f003 031f and.w r3, r3, #31 - 802f980: fa22 f303 lsr.w r3, r2, r3 - 802f984: 613b str r3, [r7, #16] + 802f998: f000 f834 bl 802fa04 + 802f99c: 4602 mov r2, r0 + 802f99e: 4b14 ldr r3, [pc, #80] ; (802f9f0 ) + 802f9a0: 699b ldr r3, [r3, #24] + 802f9a2: 0a1b lsrs r3, r3, #8 + 802f9a4: f003 030f and.w r3, r3, #15 + 802f9a8: 4912 ldr r1, [pc, #72] ; (802f9f4 ) + 802f9aa: 5ccb ldrb r3, [r1, r3] + 802f9ac: f003 031f and.w r3, r3, #31 + 802f9b0: fa22 f303 lsr.w r3, r2, r3 + 802f9b4: 613b str r3, [r7, #16] #else common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU); #endif #if defined(RCC_D1CFGR_HPRE) SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); - 802f986: 4b0e ldr r3, [pc, #56] ; (802f9c0 ) - 802f988: 699b ldr r3, [r3, #24] - 802f98a: f003 030f and.w r3, r3, #15 - 802f98e: 4a0d ldr r2, [pc, #52] ; (802f9c4 ) - 802f990: 5cd3 ldrb r3, [r2, r3] - 802f992: f003 031f and.w r3, r3, #31 - 802f996: 693a ldr r2, [r7, #16] - 802f998: fa22 f303 lsr.w r3, r2, r3 - 802f99c: 4a0a ldr r2, [pc, #40] ; (802f9c8 ) - 802f99e: 6013 str r3, [r2, #0] + 802f9b6: 4b0e ldr r3, [pc, #56] ; (802f9f0 ) + 802f9b8: 699b ldr r3, [r3, #24] + 802f9ba: f003 030f and.w r3, r3, #15 + 802f9be: 4a0d ldr r2, [pc, #52] ; (802f9f4 ) + 802f9c0: 5cd3 ldrb r3, [r2, r3] + 802f9c2: f003 031f and.w r3, r3, #31 + 802f9c6: 693a ldr r2, [r7, #16] + 802f9c8: fa22 f303 lsr.w r3, r2, r3 + 802f9cc: 4a0a ldr r2, [pc, #40] ; (802f9f8 ) + 802f9ce: 6013 str r3, [r2, #0] #endif #if defined(DUAL_CORE) && defined(CORE_CM4) SystemCoreClock = SystemD2Clock; #else SystemCoreClock = common_system_clock; - 802f9a0: 4a0a ldr r2, [pc, #40] ; (802f9cc ) - 802f9a2: 693b ldr r3, [r7, #16] - 802f9a4: 6013 str r3, [r2, #0] + 802f9d0: 4a0a ldr r2, [pc, #40] ; (802f9fc ) + 802f9d2: 693b ldr r3, [r7, #16] + 802f9d4: 6013 str r3, [r2, #0] #endif /* DUAL_CORE && CORE_CM4 */ /* Configure the source of time base considering new system clocks settings*/ halstatus = HAL_InitTick (uwTickPrio); - 802f9a6: 4b0a ldr r3, [pc, #40] ; (802f9d0 ) - 802f9a8: 681b ldr r3, [r3, #0] - 802f9aa: 4618 mov r0, r3 - 802f9ac: f7f6 faa8 bl 8025f00 - 802f9b0: 4603 mov r3, r0 - 802f9b2: 73fb strb r3, [r7, #15] + 802f9d6: 4b0a ldr r3, [pc, #40] ; (802fa00 ) + 802f9d8: 681b ldr r3, [r3, #0] + 802f9da: 4618 mov r0, r3 + 802f9dc: f7f6 faa8 bl 8025f30 + 802f9e0: 4603 mov r3, r0 + 802f9e2: 73fb strb r3, [r7, #15] return halstatus; - 802f9b4: 7bfb ldrb r3, [r7, #15] -} - 802f9b6: 4618 mov r0, r3 - 802f9b8: 3718 adds r7, #24 - 802f9ba: 46bd mov sp, r7 - 802f9bc: bd80 pop {r7, pc} - 802f9be: bf00 nop - 802f9c0: 58024400 .word 0x58024400 - 802f9c4: 08044ca4 .word 0x08044ca4 - 802f9c8: 2400004c .word 0x2400004c - 802f9cc: 24000048 .word 0x24000048 - 802f9d0: 24000050 .word 0x24000050 - -0802f9d4 : + 802f9e4: 7bfb ldrb r3, [r7, #15] +} + 802f9e6: 4618 mov r0, r3 + 802f9e8: 3718 adds r7, #24 + 802f9ea: 46bd mov sp, r7 + 802f9ec: bd80 pop {r7, pc} + 802f9ee: bf00 nop + 802f9f0: 58024400 .word 0x58024400 + 802f9f4: 08044cd4 .word 0x08044cd4 + 802f9f8: 2400004c .word 0x2400004c + 802f9fc: 24000048 .word 0x24000048 + 802fa00: 24000050 .word 0x24000050 + +0802fa04 : * * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 802f9d4: b480 push {r7} - 802f9d6: b089 sub sp, #36 ; 0x24 - 802f9d8: af00 add r7, sp, #0 + 802fa04: b480 push {r7} + 802fa06: b089 sub sp, #36 ; 0x24 + 802fa08: af00 add r7, sp, #0 float_t fracn1, pllvco; uint32_t sysclockfreq; /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) - 802f9da: 4bb3 ldr r3, [pc, #716] ; (802fca8 ) - 802f9dc: 691b ldr r3, [r3, #16] - 802f9de: f003 0338 and.w r3, r3, #56 ; 0x38 - 802f9e2: 2b18 cmp r3, #24 - 802f9e4: f200 8155 bhi.w 802fc92 - 802f9e8: a201 add r2, pc, #4 ; (adr r2, 802f9f0 ) - 802f9ea: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 802f9ee: bf00 nop - 802f9f0: 0802fa55 .word 0x0802fa55 - 802f9f4: 0802fc93 .word 0x0802fc93 - 802f9f8: 0802fc93 .word 0x0802fc93 - 802f9fc: 0802fc93 .word 0x0802fc93 - 802fa00: 0802fc93 .word 0x0802fc93 - 802fa04: 0802fc93 .word 0x0802fc93 - 802fa08: 0802fc93 .word 0x0802fc93 - 802fa0c: 0802fc93 .word 0x0802fc93 - 802fa10: 0802fa7b .word 0x0802fa7b - 802fa14: 0802fc93 .word 0x0802fc93 - 802fa18: 0802fc93 .word 0x0802fc93 - 802fa1c: 0802fc93 .word 0x0802fc93 - 802fa20: 0802fc93 .word 0x0802fc93 - 802fa24: 0802fc93 .word 0x0802fc93 - 802fa28: 0802fc93 .word 0x0802fc93 - 802fa2c: 0802fc93 .word 0x0802fc93 - 802fa30: 0802fa81 .word 0x0802fa81 - 802fa34: 0802fc93 .word 0x0802fc93 - 802fa38: 0802fc93 .word 0x0802fc93 - 802fa3c: 0802fc93 .word 0x0802fc93 - 802fa40: 0802fc93 .word 0x0802fc93 - 802fa44: 0802fc93 .word 0x0802fc93 - 802fa48: 0802fc93 .word 0x0802fc93 - 802fa4c: 0802fc93 .word 0x0802fc93 - 802fa50: 0802fa87 .word 0x0802fa87 + 802fa0a: 4bb3 ldr r3, [pc, #716] ; (802fcd8 ) + 802fa0c: 691b ldr r3, [r3, #16] + 802fa0e: f003 0338 and.w r3, r3, #56 ; 0x38 + 802fa12: 2b18 cmp r3, #24 + 802fa14: f200 8155 bhi.w 802fcc2 + 802fa18: a201 add r2, pc, #4 ; (adr r2, 802fa20 ) + 802fa1a: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 802fa1e: bf00 nop + 802fa20: 0802fa85 .word 0x0802fa85 + 802fa24: 0802fcc3 .word 0x0802fcc3 + 802fa28: 0802fcc3 .word 0x0802fcc3 + 802fa2c: 0802fcc3 .word 0x0802fcc3 + 802fa30: 0802fcc3 .word 0x0802fcc3 + 802fa34: 0802fcc3 .word 0x0802fcc3 + 802fa38: 0802fcc3 .word 0x0802fcc3 + 802fa3c: 0802fcc3 .word 0x0802fcc3 + 802fa40: 0802faab .word 0x0802faab + 802fa44: 0802fcc3 .word 0x0802fcc3 + 802fa48: 0802fcc3 .word 0x0802fcc3 + 802fa4c: 0802fcc3 .word 0x0802fcc3 + 802fa50: 0802fcc3 .word 0x0802fcc3 + 802fa54: 0802fcc3 .word 0x0802fcc3 + 802fa58: 0802fcc3 .word 0x0802fcc3 + 802fa5c: 0802fcc3 .word 0x0802fcc3 + 802fa60: 0802fab1 .word 0x0802fab1 + 802fa64: 0802fcc3 .word 0x0802fcc3 + 802fa68: 0802fcc3 .word 0x0802fcc3 + 802fa6c: 0802fcc3 .word 0x0802fcc3 + 802fa70: 0802fcc3 .word 0x0802fcc3 + 802fa74: 0802fcc3 .word 0x0802fcc3 + 802fa78: 0802fcc3 .word 0x0802fcc3 + 802fa7c: 0802fcc3 .word 0x0802fcc3 + 802fa80: 0802fab7 .word 0x0802fab7 { case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 802fa54: 4b94 ldr r3, [pc, #592] ; (802fca8 ) - 802fa56: 681b ldr r3, [r3, #0] - 802fa58: f003 0320 and.w r3, r3, #32 - 802fa5c: 2b00 cmp r3, #0 - 802fa5e: d009 beq.n 802fa74 + 802fa84: 4b94 ldr r3, [pc, #592] ; (802fcd8 ) + 802fa86: 681b ldr r3, [r3, #0] + 802fa88: f003 0320 and.w r3, r3, #32 + 802fa8c: 2b00 cmp r3, #0 + 802fa8e: d009 beq.n 802faa4 { sysclockfreq = (uint32_t) (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 802fa60: 4b91 ldr r3, [pc, #580] ; (802fca8 ) - 802fa62: 681b ldr r3, [r3, #0] - 802fa64: 08db lsrs r3, r3, #3 - 802fa66: f003 0303 and.w r3, r3, #3 - 802fa6a: 4a90 ldr r2, [pc, #576] ; (802fcac ) - 802fa6c: fa22 f303 lsr.w r3, r2, r3 - 802fa70: 61bb str r3, [r7, #24] + 802fa90: 4b91 ldr r3, [pc, #580] ; (802fcd8 ) + 802fa92: 681b ldr r3, [r3, #0] + 802fa94: 08db lsrs r3, r3, #3 + 802fa96: f003 0303 and.w r3, r3, #3 + 802fa9a: 4a90 ldr r2, [pc, #576] ; (802fcdc ) + 802fa9c: fa22 f303 lsr.w r3, r2, r3 + 802faa0: 61bb str r3, [r7, #24] else { sysclockfreq = (uint32_t) HSI_VALUE; } break; - 802fa72: e111 b.n 802fc98 + 802faa2: e111 b.n 802fcc8 sysclockfreq = (uint32_t) HSI_VALUE; - 802fa74: 4b8d ldr r3, [pc, #564] ; (802fcac ) - 802fa76: 61bb str r3, [r7, #24] + 802faa4: 4b8d ldr r3, [pc, #564] ; (802fcdc ) + 802faa6: 61bb str r3, [r7, #24] break; - 802fa78: e10e b.n 802fc98 + 802faa8: e10e b.n 802fcc8 case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */ sysclockfreq = CSI_VALUE; - 802fa7a: 4b8d ldr r3, [pc, #564] ; (802fcb0 ) - 802fa7c: 61bb str r3, [r7, #24] + 802faaa: 4b8d ldr r3, [pc, #564] ; (802fce0 ) + 802faac: 61bb str r3, [r7, #24] break; - 802fa7e: e10b b.n 802fc98 + 802faae: e10b b.n 802fcc8 case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ sysclockfreq = HSE_VALUE; - 802fa80: 4b8c ldr r3, [pc, #560] ; (802fcb4 ) - 802fa82: 61bb str r3, [r7, #24] + 802fab0: 4b8c ldr r3, [pc, #560] ; (802fce4 ) + 802fab2: 61bb str r3, [r7, #24] break; - 802fa84: e108 b.n 802fc98 + 802fab4: e108 b.n 802fcc8 case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN SYSCLK = PLL_VCO / PLLR */ pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); - 802fa86: 4b88 ldr r3, [pc, #544] ; (802fca8 ) - 802fa88: 6a9b ldr r3, [r3, #40] ; 0x28 - 802fa8a: f003 0303 and.w r3, r3, #3 - 802fa8e: 617b str r3, [r7, #20] + 802fab6: 4b88 ldr r3, [pc, #544] ; (802fcd8 ) + 802fab8: 6a9b ldr r3, [r3, #40] ; 0x28 + 802faba: f003 0303 and.w r3, r3, #3 + 802fabe: 617b str r3, [r7, #20] pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; - 802fa90: 4b85 ldr r3, [pc, #532] ; (802fca8 ) - 802fa92: 6a9b ldr r3, [r3, #40] ; 0x28 - 802fa94: 091b lsrs r3, r3, #4 - 802fa96: f003 033f and.w r3, r3, #63 ; 0x3f - 802fa9a: 613b str r3, [r7, #16] + 802fac0: 4b85 ldr r3, [pc, #532] ; (802fcd8 ) + 802fac2: 6a9b ldr r3, [r3, #40] ; 0x28 + 802fac4: 091b lsrs r3, r3, #4 + 802fac6: f003 033f and.w r3, r3, #63 ; 0x3f + 802faca: 613b str r3, [r7, #16] pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); - 802fa9c: 4b82 ldr r3, [pc, #520] ; (802fca8 ) - 802fa9e: 6adb ldr r3, [r3, #44] ; 0x2c - 802faa0: f003 0301 and.w r3, r3, #1 - 802faa4: 60fb str r3, [r7, #12] + 802facc: 4b82 ldr r3, [pc, #520] ; (802fcd8 ) + 802face: 6adb ldr r3, [r3, #44] ; 0x2c + 802fad0: f003 0301 and.w r3, r3, #1 + 802fad4: 60fb str r3, [r7, #12] fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3)); - 802faa6: 4b80 ldr r3, [pc, #512] ; (802fca8 ) - 802faa8: 6b5b ldr r3, [r3, #52] ; 0x34 - 802faaa: 08db lsrs r3, r3, #3 - 802faac: f3c3 030c ubfx r3, r3, #0, #13 - 802fab0: 68fa ldr r2, [r7, #12] - 802fab2: fb02 f303 mul.w r3, r2, r3 - 802fab6: ee07 3a90 vmov s15, r3 - 802faba: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fabe: edc7 7a02 vstr s15, [r7, #8] + 802fad6: 4b80 ldr r3, [pc, #512] ; (802fcd8 ) + 802fad8: 6b5b ldr r3, [r3, #52] ; 0x34 + 802fada: 08db lsrs r3, r3, #3 + 802fadc: f3c3 030c ubfx r3, r3, #0, #13 + 802fae0: 68fa ldr r2, [r7, #12] + 802fae2: fb02 f303 mul.w r3, r2, r3 + 802fae6: ee07 3a90 vmov s15, r3 + 802faea: eef8 7a67 vcvt.f32.u32 s15, s15 + 802faee: edc7 7a02 vstr s15, [r7, #8] if (pllm != 0U) - 802fac2: 693b ldr r3, [r7, #16] - 802fac4: 2b00 cmp r3, #0 - 802fac6: f000 80e1 beq.w 802fc8c - 802faca: 697b ldr r3, [r7, #20] - 802facc: 2b02 cmp r3, #2 - 802face: f000 8083 beq.w 802fbd8 - 802fad2: 697b ldr r3, [r7, #20] - 802fad4: 2b02 cmp r3, #2 - 802fad6: f200 80a1 bhi.w 802fc1c - 802fada: 697b ldr r3, [r7, #20] - 802fadc: 2b00 cmp r3, #0 - 802fade: d003 beq.n 802fae8 - 802fae0: 697b ldr r3, [r7, #20] - 802fae2: 2b01 cmp r3, #1 - 802fae4: d056 beq.n 802fb94 - 802fae6: e099 b.n 802fc1c + 802faf2: 693b ldr r3, [r7, #16] + 802faf4: 2b00 cmp r3, #0 + 802faf6: f000 80e1 beq.w 802fcbc + 802fafa: 697b ldr r3, [r7, #20] + 802fafc: 2b02 cmp r3, #2 + 802fafe: f000 8083 beq.w 802fc08 + 802fb02: 697b ldr r3, [r7, #20] + 802fb04: 2b02 cmp r3, #2 + 802fb06: f200 80a1 bhi.w 802fc4c + 802fb0a: 697b ldr r3, [r7, #20] + 802fb0c: 2b00 cmp r3, #0 + 802fb0e: d003 beq.n 802fb18 + 802fb10: 697b ldr r3, [r7, #20] + 802fb12: 2b01 cmp r3, #1 + 802fb14: d056 beq.n 802fbc4 + 802fb16: e099 b.n 802fc4c { switch (pllsource) { case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 802fae8: 4b6f ldr r3, [pc, #444] ; (802fca8 ) - 802faea: 681b ldr r3, [r3, #0] - 802faec: f003 0320 and.w r3, r3, #32 - 802faf0: 2b00 cmp r3, #0 - 802faf2: d02d beq.n 802fb50 + 802fb18: 4b6f ldr r3, [pc, #444] ; (802fcd8 ) + 802fb1a: 681b ldr r3, [r3, #0] + 802fb1c: f003 0320 and.w r3, r3, #32 + 802fb20: 2b00 cmp r3, #0 + 802fb22: d02d beq.n 802fb80 { hsivalue= (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 802faf4: 4b6c ldr r3, [pc, #432] ; (802fca8 ) - 802faf6: 681b ldr r3, [r3, #0] - 802faf8: 08db lsrs r3, r3, #3 - 802fafa: f003 0303 and.w r3, r3, #3 - 802fafe: 4a6b ldr r2, [pc, #428] ; (802fcac ) - 802fb00: fa22 f303 lsr.w r3, r2, r3 - 802fb04: 607b str r3, [r7, #4] + 802fb24: 4b6c ldr r3, [pc, #432] ; (802fcd8 ) + 802fb26: 681b ldr r3, [r3, #0] + 802fb28: 08db lsrs r3, r3, #3 + 802fb2a: f003 0303 and.w r3, r3, #3 + 802fb2e: 4a6b ldr r2, [pc, #428] ; (802fcdc ) + 802fb30: fa22 f303 lsr.w r3, r2, r3 + 802fb34: 607b str r3, [r7, #4] pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fb06: 687b ldr r3, [r7, #4] - 802fb08: ee07 3a90 vmov s15, r3 - 802fb0c: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fb10: 693b ldr r3, [r7, #16] - 802fb12: ee07 3a90 vmov s15, r3 - 802fb16: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fb1a: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fb1e: 4b62 ldr r3, [pc, #392] ; (802fca8 ) - 802fb20: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fb22: f3c3 0308 ubfx r3, r3, #0, #9 - 802fb26: ee07 3a90 vmov s15, r3 - 802fb2a: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fb2e: ed97 6a02 vldr s12, [r7, #8] - 802fb32: eddf 5a61 vldr s11, [pc, #388] ; 802fcb8 - 802fb36: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fb3a: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fb3e: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fb42: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fb46: ee67 7a27 vmul.f32 s15, s14, s15 - 802fb4a: edc7 7a07 vstr s15, [r7, #28] + 802fb36: 687b ldr r3, [r7, #4] + 802fb38: ee07 3a90 vmov s15, r3 + 802fb3c: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fb40: 693b ldr r3, [r7, #16] + 802fb42: ee07 3a90 vmov s15, r3 + 802fb46: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fb4a: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fb4e: 4b62 ldr r3, [pc, #392] ; (802fcd8 ) + 802fb50: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fb52: f3c3 0308 ubfx r3, r3, #0, #9 + 802fb56: ee07 3a90 vmov s15, r3 + 802fb5a: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fb5e: ed97 6a02 vldr s12, [r7, #8] + 802fb62: eddf 5a61 vldr s11, [pc, #388] ; 802fce8 + 802fb66: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fb6a: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fb6e: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fb72: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fb76: ee67 7a27 vmul.f32 s15, s14, s15 + 802fb7a: edc7 7a07 vstr s15, [r7, #28] } else { pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); } break; - 802fb4e: e087 b.n 802fc60 + 802fb7e: e087 b.n 802fc90 pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fb50: 693b ldr r3, [r7, #16] - 802fb52: ee07 3a90 vmov s15, r3 - 802fb56: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fb5a: eddf 6a58 vldr s13, [pc, #352] ; 802fcbc - 802fb5e: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fb62: 4b51 ldr r3, [pc, #324] ; (802fca8 ) - 802fb64: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fb66: f3c3 0308 ubfx r3, r3, #0, #9 - 802fb6a: ee07 3a90 vmov s15, r3 - 802fb6e: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fb72: ed97 6a02 vldr s12, [r7, #8] - 802fb76: eddf 5a50 vldr s11, [pc, #320] ; 802fcb8 - 802fb7a: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fb7e: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fb82: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fb86: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fb8a: ee67 7a27 vmul.f32 s15, s14, s15 - 802fb8e: edc7 7a07 vstr s15, [r7, #28] + 802fb80: 693b ldr r3, [r7, #16] + 802fb82: ee07 3a90 vmov s15, r3 + 802fb86: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fb8a: eddf 6a58 vldr s13, [pc, #352] ; 802fcec + 802fb8e: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fb92: 4b51 ldr r3, [pc, #324] ; (802fcd8 ) + 802fb94: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fb96: f3c3 0308 ubfx r3, r3, #0, #9 + 802fb9a: ee07 3a90 vmov s15, r3 + 802fb9e: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fba2: ed97 6a02 vldr s12, [r7, #8] + 802fba6: eddf 5a50 vldr s11, [pc, #320] ; 802fce8 + 802fbaa: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fbae: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fbb2: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fbb6: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fbba: ee67 7a27 vmul.f32 s15, s14, s15 + 802fbbe: edc7 7a07 vstr s15, [r7, #28] break; - 802fb92: e065 b.n 802fc60 + 802fbc2: e065 b.n 802fc90 case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */ pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fb94: 693b ldr r3, [r7, #16] - 802fb96: ee07 3a90 vmov s15, r3 - 802fb9a: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fb9e: eddf 6a48 vldr s13, [pc, #288] ; 802fcc0 - 802fba2: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fba6: 4b40 ldr r3, [pc, #256] ; (802fca8 ) - 802fba8: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fbaa: f3c3 0308 ubfx r3, r3, #0, #9 - 802fbae: ee07 3a90 vmov s15, r3 - 802fbb2: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fbb6: ed97 6a02 vldr s12, [r7, #8] - 802fbba: eddf 5a3f vldr s11, [pc, #252] ; 802fcb8 - 802fbbe: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fbc2: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fbc6: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fbca: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fbce: ee67 7a27 vmul.f32 s15, s14, s15 - 802fbd2: edc7 7a07 vstr s15, [r7, #28] + 802fbc4: 693b ldr r3, [r7, #16] + 802fbc6: ee07 3a90 vmov s15, r3 + 802fbca: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fbce: eddf 6a48 vldr s13, [pc, #288] ; 802fcf0 + 802fbd2: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fbd6: 4b40 ldr r3, [pc, #256] ; (802fcd8 ) + 802fbd8: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fbda: f3c3 0308 ubfx r3, r3, #0, #9 + 802fbde: ee07 3a90 vmov s15, r3 + 802fbe2: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fbe6: ed97 6a02 vldr s12, [r7, #8] + 802fbea: eddf 5a3f vldr s11, [pc, #252] ; 802fce8 + 802fbee: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fbf2: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fbf6: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fbfa: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fbfe: ee67 7a27 vmul.f32 s15, s14, s15 + 802fc02: edc7 7a07 vstr s15, [r7, #28] break; - 802fbd6: e043 b.n 802fc60 + 802fc06: e043 b.n 802fc90 case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fbd8: 693b ldr r3, [r7, #16] - 802fbda: ee07 3a90 vmov s15, r3 - 802fbde: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fbe2: eddf 6a38 vldr s13, [pc, #224] ; 802fcc4 - 802fbe6: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fbea: 4b2f ldr r3, [pc, #188] ; (802fca8 ) - 802fbec: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fbee: f3c3 0308 ubfx r3, r3, #0, #9 - 802fbf2: ee07 3a90 vmov s15, r3 - 802fbf6: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fbfa: ed97 6a02 vldr s12, [r7, #8] - 802fbfe: eddf 5a2e vldr s11, [pc, #184] ; 802fcb8 - 802fc02: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fc06: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fc0a: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fc0e: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fc12: ee67 7a27 vmul.f32 s15, s14, s15 - 802fc16: edc7 7a07 vstr s15, [r7, #28] + 802fc08: 693b ldr r3, [r7, #16] + 802fc0a: ee07 3a90 vmov s15, r3 + 802fc0e: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fc12: eddf 6a38 vldr s13, [pc, #224] ; 802fcf4 + 802fc16: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fc1a: 4b2f ldr r3, [pc, #188] ; (802fcd8 ) + 802fc1c: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fc1e: f3c3 0308 ubfx r3, r3, #0, #9 + 802fc22: ee07 3a90 vmov s15, r3 + 802fc26: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fc2a: ed97 6a02 vldr s12, [r7, #8] + 802fc2e: eddf 5a2e vldr s11, [pc, #184] ; 802fce8 + 802fc32: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fc36: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fc3a: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fc3e: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fc42: ee67 7a27 vmul.f32 s15, s14, s15 + 802fc46: edc7 7a07 vstr s15, [r7, #28] break; - 802fc1a: e021 b.n 802fc60 + 802fc4a: e021 b.n 802fc90 default: pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fc1c: 693b ldr r3, [r7, #16] - 802fc1e: ee07 3a90 vmov s15, r3 - 802fc22: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fc26: eddf 6a26 vldr s13, [pc, #152] ; 802fcc0 - 802fc2a: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fc2e: 4b1e ldr r3, [pc, #120] ; (802fca8 ) - 802fc30: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fc32: f3c3 0308 ubfx r3, r3, #0, #9 - 802fc36: ee07 3a90 vmov s15, r3 - 802fc3a: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fc3e: ed97 6a02 vldr s12, [r7, #8] - 802fc42: eddf 5a1d vldr s11, [pc, #116] ; 802fcb8 - 802fc46: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fc4a: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fc4e: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fc52: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fc56: ee67 7a27 vmul.f32 s15, s14, s15 - 802fc5a: edc7 7a07 vstr s15, [r7, #28] + 802fc4c: 693b ldr r3, [r7, #16] + 802fc4e: ee07 3a90 vmov s15, r3 + 802fc52: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fc56: eddf 6a26 vldr s13, [pc, #152] ; 802fcf0 + 802fc5a: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fc5e: 4b1e ldr r3, [pc, #120] ; (802fcd8 ) + 802fc60: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fc62: f3c3 0308 ubfx r3, r3, #0, #9 + 802fc66: ee07 3a90 vmov s15, r3 + 802fc6a: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fc6e: ed97 6a02 vldr s12, [r7, #8] + 802fc72: eddf 5a1d vldr s11, [pc, #116] ; 802fce8 + 802fc76: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fc7a: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fc7e: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fc82: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fc86: ee67 7a27 vmul.f32 s15, s14, s15 + 802fc8a: edc7 7a07 vstr s15, [r7, #28] break; - 802fc5e: bf00 nop + 802fc8e: bf00 nop } pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ; - 802fc60: 4b11 ldr r3, [pc, #68] ; (802fca8 ) - 802fc62: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fc64: 0a5b lsrs r3, r3, #9 - 802fc66: f003 037f and.w r3, r3, #127 ; 0x7f - 802fc6a: 3301 adds r3, #1 - 802fc6c: 603b str r3, [r7, #0] + 802fc90: 4b11 ldr r3, [pc, #68] ; (802fcd8 ) + 802fc92: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fc94: 0a5b lsrs r3, r3, #9 + 802fc96: f003 037f and.w r3, r3, #127 ; 0x7f + 802fc9a: 3301 adds r3, #1 + 802fc9c: 603b str r3, [r7, #0] sysclockfreq = (uint32_t)(float_t)(pllvco/(float_t)pllp); - 802fc6e: 683b ldr r3, [r7, #0] - 802fc70: ee07 3a90 vmov s15, r3 - 802fc74: eeb8 7a67 vcvt.f32.u32 s14, s15 - 802fc78: edd7 6a07 vldr s13, [r7, #28] - 802fc7c: eec6 7a87 vdiv.f32 s15, s13, s14 - 802fc80: eefc 7ae7 vcvt.u32.f32 s15, s15 - 802fc84: ee17 3a90 vmov r3, s15 - 802fc88: 61bb str r3, [r7, #24] + 802fc9e: 683b ldr r3, [r7, #0] + 802fca0: ee07 3a90 vmov s15, r3 + 802fca4: eeb8 7a67 vcvt.f32.u32 s14, s15 + 802fca8: edd7 6a07 vldr s13, [r7, #28] + 802fcac: eec6 7a87 vdiv.f32 s15, s13, s14 + 802fcb0: eefc 7ae7 vcvt.u32.f32 s15, s15 + 802fcb4: ee17 3a90 vmov r3, s15 + 802fcb8: 61bb str r3, [r7, #24] } else { sysclockfreq = 0U; } break; - 802fc8a: e005 b.n 802fc98 + 802fcba: e005 b.n 802fcc8 sysclockfreq = 0U; - 802fc8c: 2300 movs r3, #0 - 802fc8e: 61bb str r3, [r7, #24] + 802fcbc: 2300 movs r3, #0 + 802fcbe: 61bb str r3, [r7, #24] break; - 802fc90: e002 b.n 802fc98 + 802fcc0: e002 b.n 802fcc8 default: sysclockfreq = CSI_VALUE; - 802fc92: 4b07 ldr r3, [pc, #28] ; (802fcb0 ) - 802fc94: 61bb str r3, [r7, #24] + 802fcc2: 4b07 ldr r3, [pc, #28] ; (802fce0 ) + 802fcc4: 61bb str r3, [r7, #24] break; - 802fc96: bf00 nop + 802fcc6: bf00 nop } return sysclockfreq; - 802fc98: 69bb ldr r3, [r7, #24] -} - 802fc9a: 4618 mov r0, r3 - 802fc9c: 3724 adds r7, #36 ; 0x24 - 802fc9e: 46bd mov sp, r7 - 802fca0: f85d 7b04 ldr.w r7, [sp], #4 - 802fca4: 4770 bx lr - 802fca6: bf00 nop - 802fca8: 58024400 .word 0x58024400 - 802fcac: 03d09000 .word 0x03d09000 - 802fcb0: 003d0900 .word 0x003d0900 - 802fcb4: 017d7840 .word 0x017d7840 - 802fcb8: 46000000 .word 0x46000000 - 802fcbc: 4c742400 .word 0x4c742400 - 802fcc0: 4a742400 .word 0x4a742400 - 802fcc4: 4bbebc20 .word 0x4bbebc20 - -0802fcc8 : + 802fcc8: 69bb ldr r3, [r7, #24] +} + 802fcca: 4618 mov r0, r3 + 802fccc: 3724 adds r7, #36 ; 0x24 + 802fcce: 46bd mov sp, r7 + 802fcd0: f85d 7b04 ldr.w r7, [sp], #4 + 802fcd4: 4770 bx lr + 802fcd6: bf00 nop + 802fcd8: 58024400 .word 0x58024400 + 802fcdc: 03d09000 .word 0x03d09000 + 802fce0: 003d0900 .word 0x003d0900 + 802fce4: 017d7840 .word 0x017d7840 + 802fce8: 46000000 .word 0x46000000 + 802fcec: 4c742400 .word 0x4c742400 + 802fcf0: 4a742400 .word 0x4a742400 + 802fcf4: 4bbebc20 .word 0x4bbebc20 + +0802fcf8 : * @note The SystemD2Clock CMSIS variable is used to store System domain2 Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 802fcc8: b580 push {r7, lr} - 802fcca: b082 sub sp, #8 - 802fccc: af00 add r7, sp, #0 + 802fcf8: b580 push {r7, lr} + 802fcfa: b082 sub sp, #8 + 802fcfc: af00 add r7, sp, #0 uint32_t common_system_clock; #if defined(RCC_D1CFGR_D1CPRE) common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos] & 0x1FU); - 802fcce: f7ff fe81 bl 802f9d4 - 802fcd2: 4602 mov r2, r0 - 802fcd4: 4b10 ldr r3, [pc, #64] ; (802fd18 ) - 802fcd6: 699b ldr r3, [r3, #24] - 802fcd8: 0a1b lsrs r3, r3, #8 - 802fcda: f003 030f and.w r3, r3, #15 - 802fcde: 490f ldr r1, [pc, #60] ; (802fd1c ) - 802fce0: 5ccb ldrb r3, [r1, r3] - 802fce2: f003 031f and.w r3, r3, #31 - 802fce6: fa22 f303 lsr.w r3, r2, r3 - 802fcea: 607b str r3, [r7, #4] + 802fcfe: f7ff fe81 bl 802fa04 + 802fd02: 4602 mov r2, r0 + 802fd04: 4b10 ldr r3, [pc, #64] ; (802fd48 ) + 802fd06: 699b ldr r3, [r3, #24] + 802fd08: 0a1b lsrs r3, r3, #8 + 802fd0a: f003 030f and.w r3, r3, #15 + 802fd0e: 490f ldr r1, [pc, #60] ; (802fd4c ) + 802fd10: 5ccb ldrb r3, [r1, r3] + 802fd12: f003 031f and.w r3, r3, #31 + 802fd16: fa22 f303 lsr.w r3, r2, r3 + 802fd1a: 607b str r3, [r7, #4] #else common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos] & 0x1FU); #endif #if defined(RCC_D1CFGR_HPRE) SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); - 802fcec: 4b0a ldr r3, [pc, #40] ; (802fd18 ) - 802fcee: 699b ldr r3, [r3, #24] - 802fcf0: f003 030f and.w r3, r3, #15 - 802fcf4: 4a09 ldr r2, [pc, #36] ; (802fd1c ) - 802fcf6: 5cd3 ldrb r3, [r2, r3] - 802fcf8: f003 031f and.w r3, r3, #31 - 802fcfc: 687a ldr r2, [r7, #4] - 802fcfe: fa22 f303 lsr.w r3, r2, r3 - 802fd02: 4a07 ldr r2, [pc, #28] ; (802fd20 ) - 802fd04: 6013 str r3, [r2, #0] + 802fd1c: 4b0a ldr r3, [pc, #40] ; (802fd48 ) + 802fd1e: 699b ldr r3, [r3, #24] + 802fd20: f003 030f and.w r3, r3, #15 + 802fd24: 4a09 ldr r2, [pc, #36] ; (802fd4c ) + 802fd26: 5cd3 ldrb r3, [r2, r3] + 802fd28: f003 031f and.w r3, r3, #31 + 802fd2c: 687a ldr r2, [r7, #4] + 802fd2e: fa22 f303 lsr.w r3, r2, r3 + 802fd32: 4a07 ldr r2, [pc, #28] ; (802fd50 ) + 802fd34: 6013 str r3, [r2, #0] #endif #if defined(DUAL_CORE) && defined(CORE_CM4) SystemCoreClock = SystemD2Clock; #else SystemCoreClock = common_system_clock; - 802fd06: 4a07 ldr r2, [pc, #28] ; (802fd24 ) - 802fd08: 687b ldr r3, [r7, #4] - 802fd0a: 6013 str r3, [r2, #0] + 802fd36: 4a07 ldr r2, [pc, #28] ; (802fd54 ) + 802fd38: 687b ldr r3, [r7, #4] + 802fd3a: 6013 str r3, [r2, #0] #endif /* DUAL_CORE && CORE_CM4 */ return SystemD2Clock; - 802fd0c: 4b04 ldr r3, [pc, #16] ; (802fd20 ) - 802fd0e: 681b ldr r3, [r3, #0] -} - 802fd10: 4618 mov r0, r3 - 802fd12: 3708 adds r7, #8 - 802fd14: 46bd mov sp, r7 - 802fd16: bd80 pop {r7, pc} - 802fd18: 58024400 .word 0x58024400 - 802fd1c: 08044ca4 .word 0x08044ca4 - 802fd20: 2400004c .word 0x2400004c - 802fd24: 24000048 .word 0x24000048 - -0802fd28 : + 802fd3c: 4b04 ldr r3, [pc, #16] ; (802fd50 ) + 802fd3e: 681b ldr r3, [r3, #0] +} + 802fd40: 4618 mov r0, r3 + 802fd42: 3708 adds r7, #8 + 802fd44: 46bd mov sp, r7 + 802fd46: bd80 pop {r7, pc} + 802fd48: 58024400 .word 0x58024400 + 802fd4c: 08044cd4 .word 0x08044cd4 + 802fd50: 2400004c .word 0x2400004c + 802fd54: 24000048 .word 0x24000048 + +0802fd58 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 802fd28: b580 push {r7, lr} - 802fd2a: af00 add r7, sp, #0 + 802fd58: b580 push {r7, lr} + 802fd5a: af00 add r7, sp, #0 #if defined (RCC_D2CFGR_D2PPRE1) /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1)>> RCC_D2CFGR_D2PPRE1_Pos]) & 0x1FU)); - 802fd2c: f7ff ffcc bl 802fcc8 - 802fd30: 4602 mov r2, r0 - 802fd32: 4b06 ldr r3, [pc, #24] ; (802fd4c ) - 802fd34: 69db ldr r3, [r3, #28] - 802fd36: 091b lsrs r3, r3, #4 - 802fd38: f003 0307 and.w r3, r3, #7 - 802fd3c: 4904 ldr r1, [pc, #16] ; (802fd50 ) - 802fd3e: 5ccb ldrb r3, [r1, r3] - 802fd40: f003 031f and.w r3, r3, #31 - 802fd44: fa22 f303 lsr.w r3, r2, r3 + 802fd5c: f7ff ffcc bl 802fcf8 + 802fd60: 4602 mov r2, r0 + 802fd62: 4b06 ldr r3, [pc, #24] ; (802fd7c ) + 802fd64: 69db ldr r3, [r3, #28] + 802fd66: 091b lsrs r3, r3, #4 + 802fd68: f003 0307 and.w r3, r3, #7 + 802fd6c: 4904 ldr r1, [pc, #16] ; (802fd80 ) + 802fd6e: 5ccb ldrb r3, [r1, r3] + 802fd70: f003 031f and.w r3, r3, #31 + 802fd74: fa22 f303 lsr.w r3, r2, r3 #else /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1)>> RCC_CDCFGR2_CDPPRE1_Pos]) & 0x1FU)); #endif } - 802fd48: 4618 mov r0, r3 - 802fd4a: bd80 pop {r7, pc} - 802fd4c: 58024400 .word 0x58024400 - 802fd50: 08044ca4 .word 0x08044ca4 + 802fd78: 4618 mov r0, r3 + 802fd7a: bd80 pop {r7, pc} + 802fd7c: 58024400 .word 0x58024400 + 802fd80: 08044cd4 .word 0x08044cd4 -0802fd54 : +0802fd84 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 802fd54: b580 push {r7, lr} - 802fd56: af00 add r7, sp, #0 + 802fd84: b580 push {r7, lr} + 802fd86: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ #if defined(RCC_D2CFGR_D2PPRE2) return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2)>> RCC_D2CFGR_D2PPRE2_Pos]) & 0x1FU)); - 802fd58: f7ff ffb6 bl 802fcc8 - 802fd5c: 4602 mov r2, r0 - 802fd5e: 4b06 ldr r3, [pc, #24] ; (802fd78 ) - 802fd60: 69db ldr r3, [r3, #28] - 802fd62: 0a1b lsrs r3, r3, #8 - 802fd64: f003 0307 and.w r3, r3, #7 - 802fd68: 4904 ldr r1, [pc, #16] ; (802fd7c ) - 802fd6a: 5ccb ldrb r3, [r1, r3] - 802fd6c: f003 031f and.w r3, r3, #31 - 802fd70: fa22 f303 lsr.w r3, r2, r3 + 802fd88: f7ff ffb6 bl 802fcf8 + 802fd8c: 4602 mov r2, r0 + 802fd8e: 4b06 ldr r3, [pc, #24] ; (802fda8 ) + 802fd90: 69db ldr r3, [r3, #28] + 802fd92: 0a1b lsrs r3, r3, #8 + 802fd94: f003 0307 and.w r3, r3, #7 + 802fd98: 4904 ldr r1, [pc, #16] ; (802fdac ) + 802fd9a: 5ccb ldrb r3, [r1, r3] + 802fd9c: f003 031f and.w r3, r3, #31 + 802fda0: fa22 f303 lsr.w r3, r2, r3 #else return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2)>> RCC_CDCFGR2_CDPPRE2_Pos]) & 0x1FU)); #endif } - 802fd74: 4618 mov r0, r3 - 802fd76: bd80 pop {r7, pc} - 802fd78: 58024400 .word 0x58024400 - 802fd7c: 08044ca4 .word 0x08044ca4 + 802fda4: 4618 mov r0, r3 + 802fda6: bd80 pop {r7, pc} + 802fda8: 58024400 .word 0x58024400 + 802fdac: 08044cd4 .word 0x08044cd4 -0802fd80 : +0802fdb0 : * (*) : Available on some STM32H7 lines only. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 802fd80: b580 push {r7, lr} - 802fd82: b086 sub sp, #24 - 802fd84: af00 add r7, sp, #0 - 802fd86: 6078 str r0, [r7, #4] + 802fdb0: b580 push {r7, lr} + 802fdb2: b086 sub sp, #24 + 802fdb4: af00 add r7, sp, #0 + 802fdb6: 6078 str r0, [r7, #4] uint32_t tmpreg; uint32_t tickstart; HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */ - 802fd88: 2300 movs r3, #0 - 802fd8a: 75fb strb r3, [r7, #23] + 802fdb8: 2300 movs r3, #0 + 802fdba: 75fb strb r3, [r7, #23] HAL_StatusTypeDef status = HAL_OK; /* Final status */ - 802fd8c: 2300 movs r3, #0 - 802fd8e: 75bb strb r3, [r7, #22] + 802fdbc: 2300 movs r3, #0 + 802fdbe: 75bb strb r3, [r7, #22] /*---------------------------- SPDIFRX configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) - 802fd90: 687b ldr r3, [r7, #4] - 802fd92: 681b ldr r3, [r3, #0] - 802fd94: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 802fd98: 2b00 cmp r3, #0 - 802fd9a: d03f beq.n 802fe1c + 802fdc0: 687b ldr r3, [r7, #4] + 802fdc2: 681b ldr r3, [r3, #0] + 802fdc4: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 802fdc8: 2b00 cmp r3, #0 + 802fdca: d03f beq.n 802fe4c { switch(PeriphClkInit->SpdifrxClockSelection) - 802fd9c: 687b ldr r3, [r7, #4] - 802fd9e: 6e5b ldr r3, [r3, #100] ; 0x64 - 802fda0: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 - 802fda4: d02a beq.n 802fdfc - 802fda6: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 - 802fdaa: d824 bhi.n 802fdf6 - 802fdac: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 802fdb0: d018 beq.n 802fde4 - 802fdb2: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 802fdb6: d81e bhi.n 802fdf6 - 802fdb8: 2b00 cmp r3, #0 - 802fdba: d003 beq.n 802fdc4 - 802fdbc: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 802fdc0: d007 beq.n 802fdd2 - 802fdc2: e018 b.n 802fdf6 + 802fdcc: 687b ldr r3, [r7, #4] + 802fdce: 6e5b ldr r3, [r3, #100] ; 0x64 + 802fdd0: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 + 802fdd4: d02a beq.n 802fe2c + 802fdd6: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 + 802fdda: d824 bhi.n 802fe26 + 802fddc: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 802fde0: d018 beq.n 802fe14 + 802fde2: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 802fde6: d81e bhi.n 802fe26 + 802fde8: 2b00 cmp r3, #0 + 802fdea: d003 beq.n 802fdf4 + 802fdec: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 802fdf0: d007 beq.n 802fe02 + 802fdf2: e018 b.n 802fe26 { case RCC_SPDIFRXCLKSOURCE_PLL: /* PLL is used as clock source for SPDIFRX*/ /* Enable PLL1Q Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802fdc4: 4ba3 ldr r3, [pc, #652] ; (8030054 ) - 802fdc6: 6adb ldr r3, [r3, #44] ; 0x2c - 802fdc8: 4aa2 ldr r2, [pc, #648] ; (8030054 ) - 802fdca: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802fdce: 62d3 str r3, [r2, #44] ; 0x2c + 802fdf4: 4ba3 ldr r3, [pc, #652] ; (8030084 ) + 802fdf6: 6adb ldr r3, [r3, #44] ; 0x2c + 802fdf8: 4aa2 ldr r2, [pc, #648] ; (8030084 ) + 802fdfa: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802fdfe: 62d3 str r3, [r2, #44] ; 0x2c /* SPDIFRX clock source configuration done later after clock selection check */ break; - 802fdd0: e015 b.n 802fdfe + 802fe00: e015 b.n 802fe2e case RCC_SPDIFRXCLKSOURCE_PLL2: /* PLL2 is used as clock source for SPDIFRX*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_R_UPDATE); - 802fdd2: 687b ldr r3, [r7, #4] - 802fdd4: 3304 adds r3, #4 - 802fdd6: 2102 movs r1, #2 - 802fdd8: 4618 mov r0, r3 - 802fdda: f001 fff9 bl 8031dd0 - 802fdde: 4603 mov r3, r0 - 802fde0: 75fb strb r3, [r7, #23] + 802fe02: 687b ldr r3, [r7, #4] + 802fe04: 3304 adds r3, #4 + 802fe06: 2102 movs r1, #2 + 802fe08: 4618 mov r0, r3 + 802fe0a: f001 fff9 bl 8031e00 + 802fe0e: 4603 mov r3, r0 + 802fe10: 75fb strb r3, [r7, #23] /* SPDIFRX clock source configuration done later after clock selection check */ break; - 802fde2: e00c b.n 802fdfe + 802fe12: e00c b.n 802fe2e case RCC_SPDIFRXCLKSOURCE_PLL3: /* PLL3 is used as clock source for SPDIFRX*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 802fde4: 687b ldr r3, [r7, #4] - 802fde6: 3324 adds r3, #36 ; 0x24 - 802fde8: 2102 movs r1, #2 - 802fdea: 4618 mov r0, r3 - 802fdec: f002 f8a2 bl 8031f34 - 802fdf0: 4603 mov r3, r0 - 802fdf2: 75fb strb r3, [r7, #23] + 802fe14: 687b ldr r3, [r7, #4] + 802fe16: 3324 adds r3, #36 ; 0x24 + 802fe18: 2102 movs r1, #2 + 802fe1a: 4618 mov r0, r3 + 802fe1c: f002 f8a2 bl 8031f64 + 802fe20: 4603 mov r3, r0 + 802fe22: 75fb strb r3, [r7, #23] /* SPDIFRX clock source configuration done later after clock selection check */ break; - 802fdf4: e003 b.n 802fdfe + 802fe24: e003 b.n 802fe2e /* Internal OSC clock is used as source of SPDIFRX clock*/ /* SPDIFRX clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 802fdf6: 2301 movs r3, #1 - 802fdf8: 75fb strb r3, [r7, #23] + 802fe26: 2301 movs r3, #1 + 802fe28: 75fb strb r3, [r7, #23] break; - 802fdfa: e000 b.n 802fdfe + 802fe2a: e000 b.n 802fe2e break; - 802fdfc: bf00 nop + 802fe2c: bf00 nop } if(ret == HAL_OK) - 802fdfe: 7dfb ldrb r3, [r7, #23] - 802fe00: 2b00 cmp r3, #0 - 802fe02: d109 bne.n 802fe18 + 802fe2e: 7dfb ldrb r3, [r7, #23] + 802fe30: 2b00 cmp r3, #0 + 802fe32: d109 bne.n 802fe48 { /* Set the source of SPDIFRX clock*/ __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifrxClockSelection); - 802fe04: 4b93 ldr r3, [pc, #588] ; (8030054 ) - 802fe06: 6d1b ldr r3, [r3, #80] ; 0x50 - 802fe08: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 - 802fe0c: 687b ldr r3, [r7, #4] - 802fe0e: 6e5b ldr r3, [r3, #100] ; 0x64 - 802fe10: 4990 ldr r1, [pc, #576] ; (8030054 ) - 802fe12: 4313 orrs r3, r2 - 802fe14: 650b str r3, [r1, #80] ; 0x50 - 802fe16: e001 b.n 802fe1c + 802fe34: 4b93 ldr r3, [pc, #588] ; (8030084 ) + 802fe36: 6d1b ldr r3, [r3, #80] ; 0x50 + 802fe38: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 + 802fe3c: 687b ldr r3, [r7, #4] + 802fe3e: 6e5b ldr r3, [r3, #100] ; 0x64 + 802fe40: 4990 ldr r1, [pc, #576] ; (8030084 ) + 802fe42: 4313 orrs r3, r2 + 802fe44: 650b str r3, [r1, #80] ; 0x50 + 802fe46: e001 b.n 802fe4c } else { /* set overall return value */ status = ret; - 802fe18: 7dfb ldrb r3, [r7, #23] - 802fe1a: 75bb strb r3, [r7, #22] + 802fe48: 7dfb ldrb r3, [r7, #23] + 802fe4a: 75bb strb r3, [r7, #22] } } /*---------------------------- SAI1 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) - 802fe1c: 687b ldr r3, [r7, #4] - 802fe1e: 681b ldr r3, [r3, #0] - 802fe20: f403 7380 and.w r3, r3, #256 ; 0x100 - 802fe24: 2b00 cmp r3, #0 - 802fe26: d03d beq.n 802fea4 + 802fe4c: 687b ldr r3, [r7, #4] + 802fe4e: 681b ldr r3, [r3, #0] + 802fe50: f403 7380 and.w r3, r3, #256 ; 0x100 + 802fe54: 2b00 cmp r3, #0 + 802fe56: d03d beq.n 802fed4 { switch(PeriphClkInit->Sai1ClockSelection) - 802fe28: 687b ldr r3, [r7, #4] - 802fe2a: 6d5b ldr r3, [r3, #84] ; 0x54 - 802fe2c: 2b04 cmp r3, #4 - 802fe2e: d826 bhi.n 802fe7e - 802fe30: a201 add r2, pc, #4 ; (adr r2, 802fe38 ) - 802fe32: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 802fe36: bf00 nop - 802fe38: 0802fe4d .word 0x0802fe4d - 802fe3c: 0802fe5b .word 0x0802fe5b - 802fe40: 0802fe6d .word 0x0802fe6d - 802fe44: 0802fe85 .word 0x0802fe85 - 802fe48: 0802fe85 .word 0x0802fe85 + 802fe58: 687b ldr r3, [r7, #4] + 802fe5a: 6d5b ldr r3, [r3, #84] ; 0x54 + 802fe5c: 2b04 cmp r3, #4 + 802fe5e: d826 bhi.n 802feae + 802fe60: a201 add r2, pc, #4 ; (adr r2, 802fe68 ) + 802fe62: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 802fe66: bf00 nop + 802fe68: 0802fe7d .word 0x0802fe7d + 802fe6c: 0802fe8b .word 0x0802fe8b + 802fe70: 0802fe9d .word 0x0802fe9d + 802fe74: 0802feb5 .word 0x0802feb5 + 802fe78: 0802feb5 .word 0x0802feb5 { case RCC_SAI1CLKSOURCE_PLL: /* PLL is used as clock source for SAI1*/ /* Enable SAI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802fe4c: 4b81 ldr r3, [pc, #516] ; (8030054 ) - 802fe4e: 6adb ldr r3, [r3, #44] ; 0x2c - 802fe50: 4a80 ldr r2, [pc, #512] ; (8030054 ) - 802fe52: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802fe56: 62d3 str r3, [r2, #44] ; 0x2c + 802fe7c: 4b81 ldr r3, [pc, #516] ; (8030084 ) + 802fe7e: 6adb ldr r3, [r3, #44] ; 0x2c + 802fe80: 4a80 ldr r2, [pc, #512] ; (8030084 ) + 802fe82: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802fe86: 62d3 str r3, [r2, #44] ; 0x2c /* SAI1 clock source configuration done later after clock selection check */ break; - 802fe58: e015 b.n 802fe86 + 802fe88: e015 b.n 802feb6 case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI1*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 802fe5a: 687b ldr r3, [r7, #4] - 802fe5c: 3304 adds r3, #4 - 802fe5e: 2100 movs r1, #0 - 802fe60: 4618 mov r0, r3 - 802fe62: f001 ffb5 bl 8031dd0 - 802fe66: 4603 mov r3, r0 - 802fe68: 75fb strb r3, [r7, #23] + 802fe8a: 687b ldr r3, [r7, #4] + 802fe8c: 3304 adds r3, #4 + 802fe8e: 2100 movs r1, #0 + 802fe90: 4618 mov r0, r3 + 802fe92: f001 ffb5 bl 8031e00 + 802fe96: 4603 mov r3, r0 + 802fe98: 75fb strb r3, [r7, #23] /* SAI1 clock source configuration done later after clock selection check */ break; - 802fe6a: e00c b.n 802fe86 + 802fe9a: e00c b.n 802feb6 case RCC_SAI1CLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI1*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_P_UPDATE); - 802fe6c: 687b ldr r3, [r7, #4] - 802fe6e: 3324 adds r3, #36 ; 0x24 - 802fe70: 2100 movs r1, #0 - 802fe72: 4618 mov r0, r3 - 802fe74: f002 f85e bl 8031f34 - 802fe78: 4603 mov r3, r0 - 802fe7a: 75fb strb r3, [r7, #23] + 802fe9c: 687b ldr r3, [r7, #4] + 802fe9e: 3324 adds r3, #36 ; 0x24 + 802fea0: 2100 movs r1, #0 + 802fea2: 4618 mov r0, r3 + 802fea4: f002 f85e bl 8031f64 + 802fea8: 4603 mov r3, r0 + 802feaa: 75fb strb r3, [r7, #23] /* SAI1 clock source configuration done later after clock selection check */ break; - 802fe7c: e003 b.n 802fe86 + 802feac: e003 b.n 802feb6 /* HSI, HSE, or CSI oscillator is used as source of SAI1 clock */ /* SAI1 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 802fe7e: 2301 movs r3, #1 - 802fe80: 75fb strb r3, [r7, #23] + 802feae: 2301 movs r3, #1 + 802feb0: 75fb strb r3, [r7, #23] break; - 802fe82: e000 b.n 802fe86 + 802feb2: e000 b.n 802feb6 break; - 802fe84: bf00 nop + 802feb4: bf00 nop } if(ret == HAL_OK) - 802fe86: 7dfb ldrb r3, [r7, #23] - 802fe88: 2b00 cmp r3, #0 - 802fe8a: d109 bne.n 802fea0 + 802feb6: 7dfb ldrb r3, [r7, #23] + 802feb8: 2b00 cmp r3, #0 + 802feba: d109 bne.n 802fed0 { /* Set the source of SAI1 clock*/ __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); - 802fe8c: 4b71 ldr r3, [pc, #452] ; (8030054 ) - 802fe8e: 6d1b ldr r3, [r3, #80] ; 0x50 - 802fe90: f023 0207 bic.w r2, r3, #7 - 802fe94: 687b ldr r3, [r7, #4] - 802fe96: 6d5b ldr r3, [r3, #84] ; 0x54 - 802fe98: 496e ldr r1, [pc, #440] ; (8030054 ) - 802fe9a: 4313 orrs r3, r2 - 802fe9c: 650b str r3, [r1, #80] ; 0x50 - 802fe9e: e001 b.n 802fea4 + 802febc: 4b71 ldr r3, [pc, #452] ; (8030084 ) + 802febe: 6d1b ldr r3, [r3, #80] ; 0x50 + 802fec0: f023 0207 bic.w r2, r3, #7 + 802fec4: 687b ldr r3, [r7, #4] + 802fec6: 6d5b ldr r3, [r3, #84] ; 0x54 + 802fec8: 496e ldr r1, [pc, #440] ; (8030084 ) + 802feca: 4313 orrs r3, r2 + 802fecc: 650b str r3, [r1, #80] ; 0x50 + 802fece: e001 b.n 802fed4 } else { /* set overall return value */ status = ret; - 802fea0: 7dfb ldrb r3, [r7, #23] - 802fea2: 75bb strb r3, [r7, #22] + 802fed0: 7dfb ldrb r3, [r7, #23] + 802fed2: 75bb strb r3, [r7, #22] } } #if defined(SAI3) /*---------------------------- SAI2/3 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI23) == RCC_PERIPHCLK_SAI23) - 802fea4: 687b ldr r3, [r7, #4] - 802fea6: 681b ldr r3, [r3, #0] - 802fea8: f403 7300 and.w r3, r3, #512 ; 0x200 - 802feac: 2b00 cmp r3, #0 - 802feae: d042 beq.n 802ff36 + 802fed4: 687b ldr r3, [r7, #4] + 802fed6: 681b ldr r3, [r3, #0] + 802fed8: f403 7300 and.w r3, r3, #512 ; 0x200 + 802fedc: 2b00 cmp r3, #0 + 802fede: d042 beq.n 802ff66 { switch(PeriphClkInit->Sai23ClockSelection) - 802feb0: 687b ldr r3, [r7, #4] - 802feb2: 6d9b ldr r3, [r3, #88] ; 0x58 - 802feb4: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 802feb8: d02b beq.n 802ff12 - 802feba: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 802febe: d825 bhi.n 802ff0c - 802fec0: 2bc0 cmp r3, #192 ; 0xc0 - 802fec2: d028 beq.n 802ff16 - 802fec4: 2bc0 cmp r3, #192 ; 0xc0 - 802fec6: d821 bhi.n 802ff0c - 802fec8: 2b80 cmp r3, #128 ; 0x80 - 802feca: d016 beq.n 802fefa - 802fecc: 2b80 cmp r3, #128 ; 0x80 - 802fece: d81d bhi.n 802ff0c - 802fed0: 2b00 cmp r3, #0 - 802fed2: d002 beq.n 802feda - 802fed4: 2b40 cmp r3, #64 ; 0x40 - 802fed6: d007 beq.n 802fee8 - 802fed8: e018 b.n 802ff0c + 802fee0: 687b ldr r3, [r7, #4] + 802fee2: 6d9b ldr r3, [r3, #88] ; 0x58 + 802fee4: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 802fee8: d02b beq.n 802ff42 + 802feea: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 802feee: d825 bhi.n 802ff3c + 802fef0: 2bc0 cmp r3, #192 ; 0xc0 + 802fef2: d028 beq.n 802ff46 + 802fef4: 2bc0 cmp r3, #192 ; 0xc0 + 802fef6: d821 bhi.n 802ff3c + 802fef8: 2b80 cmp r3, #128 ; 0x80 + 802fefa: d016 beq.n 802ff2a + 802fefc: 2b80 cmp r3, #128 ; 0x80 + 802fefe: d81d bhi.n 802ff3c + 802ff00: 2b00 cmp r3, #0 + 802ff02: d002 beq.n 802ff0a + 802ff04: 2b40 cmp r3, #64 ; 0x40 + 802ff06: d007 beq.n 802ff18 + 802ff08: e018 b.n 802ff3c { case RCC_SAI23CLKSOURCE_PLL: /* PLL is used as clock source for SAI2/3 */ /* Enable SAI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802feda: 4b5e ldr r3, [pc, #376] ; (8030054 ) - 802fedc: 6adb ldr r3, [r3, #44] ; 0x2c - 802fede: 4a5d ldr r2, [pc, #372] ; (8030054 ) - 802fee0: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802fee4: 62d3 str r3, [r2, #44] ; 0x2c + 802ff0a: 4b5e ldr r3, [pc, #376] ; (8030084 ) + 802ff0c: 6adb ldr r3, [r3, #44] ; 0x2c + 802ff0e: 4a5d ldr r2, [pc, #372] ; (8030084 ) + 802ff10: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802ff14: 62d3 str r3, [r2, #44] ; 0x2c /* SAI2/3 clock source configuration done later after clock selection check */ break; - 802fee6: e017 b.n 802ff18 + 802ff16: e017 b.n 802ff48 case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2/3 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 802fee8: 687b ldr r3, [r7, #4] - 802feea: 3304 adds r3, #4 - 802feec: 2100 movs r1, #0 - 802feee: 4618 mov r0, r3 - 802fef0: f001 ff6e bl 8031dd0 - 802fef4: 4603 mov r3, r0 - 802fef6: 75fb strb r3, [r7, #23] + 802ff18: 687b ldr r3, [r7, #4] + 802ff1a: 3304 adds r3, #4 + 802ff1c: 2100 movs r1, #0 + 802ff1e: 4618 mov r0, r3 + 802ff20: f001 ff6e bl 8031e00 + 802ff24: 4603 mov r3, r0 + 802ff26: 75fb strb r3, [r7, #23] /* SAI2/3 clock source configuration done later after clock selection check */ break; - 802fef8: e00e b.n 802ff18 + 802ff28: e00e b.n 802ff48 case RCC_SAI23CLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2/3 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_P_UPDATE); - 802fefa: 687b ldr r3, [r7, #4] - 802fefc: 3324 adds r3, #36 ; 0x24 - 802fefe: 2100 movs r1, #0 - 802ff00: 4618 mov r0, r3 - 802ff02: f002 f817 bl 8031f34 - 802ff06: 4603 mov r3, r0 - 802ff08: 75fb strb r3, [r7, #23] + 802ff2a: 687b ldr r3, [r7, #4] + 802ff2c: 3324 adds r3, #36 ; 0x24 + 802ff2e: 2100 movs r1, #0 + 802ff30: 4618 mov r0, r3 + 802ff32: f002 f817 bl 8031f64 + 802ff36: 4603 mov r3, r0 + 802ff38: 75fb strb r3, [r7, #23] /* SAI2/3 clock source configuration done later after clock selection check */ break; - 802ff0a: e005 b.n 802ff18 + 802ff3a: e005 b.n 802ff48 /* HSI, HSE, or CSI oscillator is used as source of SAI2/3 clock */ /* SAI2/3 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 802ff0c: 2301 movs r3, #1 - 802ff0e: 75fb strb r3, [r7, #23] + 802ff3c: 2301 movs r3, #1 + 802ff3e: 75fb strb r3, [r7, #23] break; - 802ff10: e002 b.n 802ff18 + 802ff40: e002 b.n 802ff48 break; - 802ff12: bf00 nop - 802ff14: e000 b.n 802ff18 + 802ff42: bf00 nop + 802ff44: e000 b.n 802ff48 break; - 802ff16: bf00 nop + 802ff46: bf00 nop } if(ret == HAL_OK) - 802ff18: 7dfb ldrb r3, [r7, #23] - 802ff1a: 2b00 cmp r3, #0 - 802ff1c: d109 bne.n 802ff32 + 802ff48: 7dfb ldrb r3, [r7, #23] + 802ff4a: 2b00 cmp r3, #0 + 802ff4c: d109 bne.n 802ff62 { /* Set the source of SAI2/3 clock*/ __HAL_RCC_SAI23_CONFIG(PeriphClkInit->Sai23ClockSelection); - 802ff1e: 4b4d ldr r3, [pc, #308] ; (8030054 ) - 802ff20: 6d1b ldr r3, [r3, #80] ; 0x50 - 802ff22: f423 72e0 bic.w r2, r3, #448 ; 0x1c0 - 802ff26: 687b ldr r3, [r7, #4] - 802ff28: 6d9b ldr r3, [r3, #88] ; 0x58 - 802ff2a: 494a ldr r1, [pc, #296] ; (8030054 ) - 802ff2c: 4313 orrs r3, r2 - 802ff2e: 650b str r3, [r1, #80] ; 0x50 - 802ff30: e001 b.n 802ff36 + 802ff4e: 4b4d ldr r3, [pc, #308] ; (8030084 ) + 802ff50: 6d1b ldr r3, [r3, #80] ; 0x50 + 802ff52: f423 72e0 bic.w r2, r3, #448 ; 0x1c0 + 802ff56: 687b ldr r3, [r7, #4] + 802ff58: 6d9b ldr r3, [r3, #88] ; 0x58 + 802ff5a: 494a ldr r1, [pc, #296] ; (8030084 ) + 802ff5c: 4313 orrs r3, r2 + 802ff5e: 650b str r3, [r1, #80] ; 0x50 + 802ff60: e001 b.n 802ff66 } else { /* set overall return value */ status = ret; - 802ff32: 7dfb ldrb r3, [r7, #23] - 802ff34: 75bb strb r3, [r7, #22] + 802ff62: 7dfb ldrb r3, [r7, #23] + 802ff64: 75bb strb r3, [r7, #22] } #endif /*SAI2B*/ #if defined(SAI4) /*---------------------------- SAI4A configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4A) == RCC_PERIPHCLK_SAI4A) - 802ff36: 687b ldr r3, [r7, #4] - 802ff38: 681b ldr r3, [r3, #0] - 802ff3a: f403 6380 and.w r3, r3, #1024 ; 0x400 - 802ff3e: 2b00 cmp r3, #0 - 802ff40: d049 beq.n 802ffd6 + 802ff66: 687b ldr r3, [r7, #4] + 802ff68: 681b ldr r3, [r3, #0] + 802ff6a: f403 6380 and.w r3, r3, #1024 ; 0x400 + 802ff6e: 2b00 cmp r3, #0 + 802ff70: d049 beq.n 8030006 { switch(PeriphClkInit->Sai4AClockSelection) - 802ff42: 687b ldr r3, [r7, #4] - 802ff44: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802ff48: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 802ff4c: d030 beq.n 802ffb0 - 802ff4e: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 802ff52: d82a bhi.n 802ffaa - 802ff54: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 - 802ff58: d02c beq.n 802ffb4 - 802ff5a: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 - 802ff5e: d824 bhi.n 802ffaa - 802ff60: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 802ff64: d018 beq.n 802ff98 - 802ff66: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 802ff6a: d81e bhi.n 802ffaa - 802ff6c: 2b00 cmp r3, #0 - 802ff6e: d003 beq.n 802ff78 - 802ff70: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 802ff74: d007 beq.n 802ff86 - 802ff76: e018 b.n 802ffaa + 802ff72: 687b ldr r3, [r7, #4] + 802ff74: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 802ff78: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 802ff7c: d030 beq.n 802ffe0 + 802ff7e: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 802ff82: d82a bhi.n 802ffda + 802ff84: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 + 802ff88: d02c beq.n 802ffe4 + 802ff8a: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 + 802ff8e: d824 bhi.n 802ffda + 802ff90: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 802ff94: d018 beq.n 802ffc8 + 802ff96: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 802ff9a: d81e bhi.n 802ffda + 802ff9c: 2b00 cmp r3, #0 + 802ff9e: d003 beq.n 802ffa8 + 802ffa0: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 802ffa4: d007 beq.n 802ffb6 + 802ffa6: e018 b.n 802ffda { case RCC_SAI4ACLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/ /* Enable SAI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802ff78: 4b36 ldr r3, [pc, #216] ; (8030054 ) - 802ff7a: 6adb ldr r3, [r3, #44] ; 0x2c - 802ff7c: 4a35 ldr r2, [pc, #212] ; (8030054 ) - 802ff7e: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802ff82: 62d3 str r3, [r2, #44] ; 0x2c + 802ffa8: 4b36 ldr r3, [pc, #216] ; (8030084 ) + 802ffaa: 6adb ldr r3, [r3, #44] ; 0x2c + 802ffac: 4a35 ldr r2, [pc, #212] ; (8030084 ) + 802ffae: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802ffb2: 62d3 str r3, [r2, #44] ; 0x2c /* SAI1 clock source configuration done later after clock selection check */ break; - 802ff84: e017 b.n 802ffb6 + 802ffb4: e017 b.n 802ffe6 case RCC_SAI4ACLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 802ff86: 687b ldr r3, [r7, #4] - 802ff88: 3304 adds r3, #4 - 802ff8a: 2100 movs r1, #0 - 802ff8c: 4618 mov r0, r3 - 802ff8e: f001 ff1f bl 8031dd0 - 802ff92: 4603 mov r3, r0 - 802ff94: 75fb strb r3, [r7, #23] + 802ffb6: 687b ldr r3, [r7, #4] + 802ffb8: 3304 adds r3, #4 + 802ffba: 2100 movs r1, #0 + 802ffbc: 4618 mov r0, r3 + 802ffbe: f001 ff1f bl 8031e00 + 802ffc2: 4603 mov r3, r0 + 802ffc4: 75fb strb r3, [r7, #23] /* SAI2 clock source configuration done later after clock selection check */ break; - 802ff96: e00e b.n 802ffb6 + 802ffc6: e00e b.n 802ffe6 case RCC_SAI4ACLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_P_UPDATE); - 802ff98: 687b ldr r3, [r7, #4] - 802ff9a: 3324 adds r3, #36 ; 0x24 - 802ff9c: 2100 movs r1, #0 - 802ff9e: 4618 mov r0, r3 - 802ffa0: f001 ffc8 bl 8031f34 - 802ffa4: 4603 mov r3, r0 - 802ffa6: 75fb strb r3, [r7, #23] + 802ffc8: 687b ldr r3, [r7, #4] + 802ffca: 3324 adds r3, #36 ; 0x24 + 802ffcc: 2100 movs r1, #0 + 802ffce: 4618 mov r0, r3 + 802ffd0: f001 ffc8 bl 8031f64 + 802ffd4: 4603 mov r3, r0 + 802ffd6: 75fb strb r3, [r7, #23] /* SAI1 clock source configuration done later after clock selection check */ break; - 802ffa8: e005 b.n 802ffb6 + 802ffd8: e005 b.n 802ffe6 /* SAI4A clock source configuration done later after clock selection check */ break; #endif /* RCC_VER_3_0 */ default: ret = HAL_ERROR; - 802ffaa: 2301 movs r3, #1 - 802ffac: 75fb strb r3, [r7, #23] + 802ffda: 2301 movs r3, #1 + 802ffdc: 75fb strb r3, [r7, #23] break; - 802ffae: e002 b.n 802ffb6 + 802ffde: e002 b.n 802ffe6 break; - 802ffb0: bf00 nop - 802ffb2: e000 b.n 802ffb6 + 802ffe0: bf00 nop + 802ffe2: e000 b.n 802ffe6 break; - 802ffb4: bf00 nop + 802ffe4: bf00 nop } if(ret == HAL_OK) - 802ffb6: 7dfb ldrb r3, [r7, #23] - 802ffb8: 2b00 cmp r3, #0 - 802ffba: d10a bne.n 802ffd2 + 802ffe6: 7dfb ldrb r3, [r7, #23] + 802ffe8: 2b00 cmp r3, #0 + 802ffea: d10a bne.n 8030002 { /* Set the source of SAI4A clock*/ __HAL_RCC_SAI4A_CONFIG(PeriphClkInit->Sai4AClockSelection); - 802ffbc: 4b25 ldr r3, [pc, #148] ; (8030054 ) - 802ffbe: 6d9b ldr r3, [r3, #88] ; 0x58 - 802ffc0: f423 0260 bic.w r2, r3, #14680064 ; 0xe00000 - 802ffc4: 687b ldr r3, [r7, #4] - 802ffc6: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802ffca: 4922 ldr r1, [pc, #136] ; (8030054 ) - 802ffcc: 4313 orrs r3, r2 - 802ffce: 658b str r3, [r1, #88] ; 0x58 - 802ffd0: e001 b.n 802ffd6 + 802ffec: 4b25 ldr r3, [pc, #148] ; (8030084 ) + 802ffee: 6d9b ldr r3, [r3, #88] ; 0x58 + 802fff0: f423 0260 bic.w r2, r3, #14680064 ; 0xe00000 + 802fff4: 687b ldr r3, [r7, #4] + 802fff6: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 802fffa: 4922 ldr r1, [pc, #136] ; (8030084 ) + 802fffc: 4313 orrs r3, r2 + 802fffe: 658b str r3, [r1, #88] ; 0x58 + 8030000: e001 b.n 8030006 } else { /* set overall return value */ status = ret; - 802ffd2: 7dfb ldrb r3, [r7, #23] - 802ffd4: 75bb strb r3, [r7, #22] + 8030002: 7dfb ldrb r3, [r7, #23] + 8030004: 75bb strb r3, [r7, #22] } } /*---------------------------- SAI4B configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4B) == RCC_PERIPHCLK_SAI4B) - 802ffd6: 687b ldr r3, [r7, #4] - 802ffd8: 681b ldr r3, [r3, #0] - 802ffda: f403 6300 and.w r3, r3, #2048 ; 0x800 - 802ffde: 2b00 cmp r3, #0 - 802ffe0: d04b beq.n 803007a + 8030006: 687b ldr r3, [r7, #4] + 8030008: 681b ldr r3, [r3, #0] + 803000a: f403 6300 and.w r3, r3, #2048 ; 0x800 + 803000e: 2b00 cmp r3, #0 + 8030010: d04b beq.n 80300aa { switch(PeriphClkInit->Sai4BClockSelection) - 802ffe2: 687b ldr r3, [r7, #4] - 802ffe4: f8d3 30a8 ldr.w r3, [r3, #168] ; 0xa8 - 802ffe8: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 - 802ffec: d030 beq.n 8030050 - 802ffee: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 - 802fff2: d82a bhi.n 803004a - 802fff4: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 - 802fff8: d02e beq.n 8030058 - 802fffa: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 - 802fffe: d824 bhi.n 803004a - 8030000: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8030004: d018 beq.n 8030038 - 8030006: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 803000a: d81e bhi.n 803004a - 803000c: 2b00 cmp r3, #0 - 803000e: d003 beq.n 8030018 - 8030010: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 8030014: d007 beq.n 8030026 - 8030016: e018 b.n 803004a + 8030012: 687b ldr r3, [r7, #4] + 8030014: f8d3 30a8 ldr.w r3, [r3, #168] ; 0xa8 + 8030018: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 + 803001c: d030 beq.n 8030080 + 803001e: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 + 8030022: d82a bhi.n 803007a + 8030024: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 + 8030028: d02e beq.n 8030088 + 803002a: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 + 803002e: d824 bhi.n 803007a + 8030030: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8030034: d018 beq.n 8030068 + 8030036: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 803003a: d81e bhi.n 803007a + 803003c: 2b00 cmp r3, #0 + 803003e: d003 beq.n 8030048 + 8030040: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 8030044: d007 beq.n 8030056 + 8030046: e018 b.n 803007a { case RCC_SAI4BCLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/ /* Enable SAI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030018: 4b0e ldr r3, [pc, #56] ; (8030054 ) - 803001a: 6adb ldr r3, [r3, #44] ; 0x2c - 803001c: 4a0d ldr r2, [pc, #52] ; (8030054 ) - 803001e: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030022: 62d3 str r3, [r2, #44] ; 0x2c + 8030048: 4b0e ldr r3, [pc, #56] ; (8030084 ) + 803004a: 6adb ldr r3, [r3, #44] ; 0x2c + 803004c: 4a0d ldr r2, [pc, #52] ; (8030084 ) + 803004e: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030052: 62d3 str r3, [r2, #44] ; 0x2c /* SAI1 clock source configuration done later after clock selection check */ break; - 8030024: e019 b.n 803005a + 8030054: e019 b.n 803008a case RCC_SAI4BCLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 8030026: 687b ldr r3, [r7, #4] - 8030028: 3304 adds r3, #4 - 803002a: 2100 movs r1, #0 - 803002c: 4618 mov r0, r3 - 803002e: f001 fecf bl 8031dd0 - 8030032: 4603 mov r3, r0 - 8030034: 75fb strb r3, [r7, #23] + 8030056: 687b ldr r3, [r7, #4] + 8030058: 3304 adds r3, #4 + 803005a: 2100 movs r1, #0 + 803005c: 4618 mov r0, r3 + 803005e: f001 fecf bl 8031e00 + 8030062: 4603 mov r3, r0 + 8030064: 75fb strb r3, [r7, #23] /* SAI2 clock source configuration done later after clock selection check */ break; - 8030036: e010 b.n 803005a + 8030066: e010 b.n 803008a case RCC_SAI4BCLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE); - 8030038: 687b ldr r3, [r7, #4] - 803003a: 3324 adds r3, #36 ; 0x24 - 803003c: 2100 movs r1, #0 - 803003e: 4618 mov r0, r3 - 8030040: f001 ff78 bl 8031f34 - 8030044: 4603 mov r3, r0 - 8030046: 75fb strb r3, [r7, #23] + 8030068: 687b ldr r3, [r7, #4] + 803006a: 3324 adds r3, #36 ; 0x24 + 803006c: 2100 movs r1, #0 + 803006e: 4618 mov r0, r3 + 8030070: f001 ff78 bl 8031f64 + 8030074: 4603 mov r3, r0 + 8030076: 75fb strb r3, [r7, #23] /* SAI1 clock source configuration done later after clock selection check */ break; - 8030048: e007 b.n 803005a + 8030078: e007 b.n 803008a /* SAI4B clock source configuration done later after clock selection check */ break; #endif /* RCC_VER_3_0 */ default: ret = HAL_ERROR; - 803004a: 2301 movs r3, #1 - 803004c: 75fb strb r3, [r7, #23] + 803007a: 2301 movs r3, #1 + 803007c: 75fb strb r3, [r7, #23] break; - 803004e: e004 b.n 803005a + 803007e: e004 b.n 803008a break; - 8030050: bf00 nop - 8030052: e002 b.n 803005a - 8030054: 58024400 .word 0x58024400 + 8030080: bf00 nop + 8030082: e002 b.n 803008a + 8030084: 58024400 .word 0x58024400 break; - 8030058: bf00 nop + 8030088: bf00 nop } if(ret == HAL_OK) - 803005a: 7dfb ldrb r3, [r7, #23] - 803005c: 2b00 cmp r3, #0 - 803005e: d10a bne.n 8030076 + 803008a: 7dfb ldrb r3, [r7, #23] + 803008c: 2b00 cmp r3, #0 + 803008e: d10a bne.n 80300a6 { /* Set the source of SAI4B clock*/ __HAL_RCC_SAI4B_CONFIG(PeriphClkInit->Sai4BClockSelection); - 8030060: 4b99 ldr r3, [pc, #612] ; (80302c8 ) - 8030062: 6d9b ldr r3, [r3, #88] ; 0x58 - 8030064: f023 62e0 bic.w r2, r3, #117440512 ; 0x7000000 - 8030068: 687b ldr r3, [r7, #4] - 803006a: f8d3 30a8 ldr.w r3, [r3, #168] ; 0xa8 - 803006e: 4996 ldr r1, [pc, #600] ; (80302c8 ) - 8030070: 4313 orrs r3, r2 - 8030072: 658b str r3, [r1, #88] ; 0x58 - 8030074: e001 b.n 803007a + 8030090: 4b99 ldr r3, [pc, #612] ; (80302f8 ) + 8030092: 6d9b ldr r3, [r3, #88] ; 0x58 + 8030094: f023 62e0 bic.w r2, r3, #117440512 ; 0x7000000 + 8030098: 687b ldr r3, [r7, #4] + 803009a: f8d3 30a8 ldr.w r3, [r3, #168] ; 0xa8 + 803009e: 4996 ldr r1, [pc, #600] ; (80302f8 ) + 80300a0: 4313 orrs r3, r2 + 80300a2: 658b str r3, [r1, #88] ; 0x58 + 80300a4: e001 b.n 80300aa } else { /* set overall return value */ status = ret; - 8030076: 7dfb ldrb r3, [r7, #23] - 8030078: 75bb strb r3, [r7, #22] + 80300a6: 7dfb ldrb r3, [r7, #23] + 80300a8: 75bb strb r3, [r7, #22] } #endif /*SAI4*/ #if defined(QUADSPI) /*---------------------------- QSPI configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI) - 803007a: 687b ldr r3, [r7, #4] - 803007c: 681b ldr r3, [r3, #0] - 803007e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8030082: 2b00 cmp r3, #0 - 8030084: d032 beq.n 80300ec + 80300aa: 687b ldr r3, [r7, #4] + 80300ac: 681b ldr r3, [r3, #0] + 80300ae: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80300b2: 2b00 cmp r3, #0 + 80300b4: d032 beq.n 803011c { switch(PeriphClkInit->QspiClockSelection) - 8030086: 687b ldr r3, [r7, #4] - 8030088: 6c9b ldr r3, [r3, #72] ; 0x48 - 803008a: 2b30 cmp r3, #48 ; 0x30 - 803008c: d01c beq.n 80300c8 - 803008e: 2b30 cmp r3, #48 ; 0x30 - 8030090: d817 bhi.n 80300c2 - 8030092: 2b20 cmp r3, #32 - 8030094: d00c beq.n 80300b0 - 8030096: 2b20 cmp r3, #32 - 8030098: d813 bhi.n 80300c2 - 803009a: 2b00 cmp r3, #0 - 803009c: d016 beq.n 80300cc - 803009e: 2b10 cmp r3, #16 - 80300a0: d10f bne.n 80300c2 + 80300b6: 687b ldr r3, [r7, #4] + 80300b8: 6c9b ldr r3, [r3, #72] ; 0x48 + 80300ba: 2b30 cmp r3, #48 ; 0x30 + 80300bc: d01c beq.n 80300f8 + 80300be: 2b30 cmp r3, #48 ; 0x30 + 80300c0: d817 bhi.n 80300f2 + 80300c2: 2b20 cmp r3, #32 + 80300c4: d00c beq.n 80300e0 + 80300c6: 2b20 cmp r3, #32 + 80300c8: d813 bhi.n 80300f2 + 80300ca: 2b00 cmp r3, #0 + 80300cc: d016 beq.n 80300fc + 80300ce: 2b10 cmp r3, #16 + 80300d0: d10f bne.n 80300f2 { case RCC_QSPICLKSOURCE_PLL: /* PLL is used as clock source for QSPI*/ /* Enable QSPI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 80300a2: 4b89 ldr r3, [pc, #548] ; (80302c8 ) - 80300a4: 6adb ldr r3, [r3, #44] ; 0x2c - 80300a6: 4a88 ldr r2, [pc, #544] ; (80302c8 ) - 80300a8: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80300ac: 62d3 str r3, [r2, #44] ; 0x2c + 80300d2: 4b89 ldr r3, [pc, #548] ; (80302f8 ) + 80300d4: 6adb ldr r3, [r3, #44] ; 0x2c + 80300d6: 4a88 ldr r2, [pc, #544] ; (80302f8 ) + 80300d8: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 80300dc: 62d3 str r3, [r2, #44] ; 0x2c /* QSPI clock source configuration done later after clock selection check */ break; - 80300ae: e00e b.n 80300ce + 80300de: e00e b.n 80300fe case RCC_QSPICLKSOURCE_PLL2: /* PLL2 is used as clock source for QSPI*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_R_UPDATE); - 80300b0: 687b ldr r3, [r7, #4] - 80300b2: 3304 adds r3, #4 - 80300b4: 2102 movs r1, #2 - 80300b6: 4618 mov r0, r3 - 80300b8: f001 fe8a bl 8031dd0 - 80300bc: 4603 mov r3, r0 - 80300be: 75fb strb r3, [r7, #23] + 80300e0: 687b ldr r3, [r7, #4] + 80300e2: 3304 adds r3, #4 + 80300e4: 2102 movs r1, #2 + 80300e6: 4618 mov r0, r3 + 80300e8: f001 fe8a bl 8031e00 + 80300ec: 4603 mov r3, r0 + 80300ee: 75fb strb r3, [r7, #23] /* QSPI clock source configuration done later after clock selection check */ break; - 80300c0: e005 b.n 80300ce + 80300f0: e005 b.n 80300fe case RCC_QSPICLKSOURCE_D1HCLK: /* Domain1 HCLK clock selected as QSPI kernel peripheral clock */ break; default: ret = HAL_ERROR; - 80300c2: 2301 movs r3, #1 - 80300c4: 75fb strb r3, [r7, #23] + 80300f2: 2301 movs r3, #1 + 80300f4: 75fb strb r3, [r7, #23] break; - 80300c6: e002 b.n 80300ce + 80300f6: e002 b.n 80300fe break; - 80300c8: bf00 nop - 80300ca: e000 b.n 80300ce + 80300f8: bf00 nop + 80300fa: e000 b.n 80300fe break; - 80300cc: bf00 nop + 80300fc: bf00 nop } if(ret == HAL_OK) - 80300ce: 7dfb ldrb r3, [r7, #23] - 80300d0: 2b00 cmp r3, #0 - 80300d2: d109 bne.n 80300e8 + 80300fe: 7dfb ldrb r3, [r7, #23] + 8030100: 2b00 cmp r3, #0 + 8030102: d109 bne.n 8030118 { /* Set the source of QSPI clock*/ __HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection); - 80300d4: 4b7c ldr r3, [pc, #496] ; (80302c8 ) - 80300d6: 6cdb ldr r3, [r3, #76] ; 0x4c - 80300d8: f023 0230 bic.w r2, r3, #48 ; 0x30 - 80300dc: 687b ldr r3, [r7, #4] - 80300de: 6c9b ldr r3, [r3, #72] ; 0x48 - 80300e0: 4979 ldr r1, [pc, #484] ; (80302c8 ) - 80300e2: 4313 orrs r3, r2 - 80300e4: 64cb str r3, [r1, #76] ; 0x4c - 80300e6: e001 b.n 80300ec + 8030104: 4b7c ldr r3, [pc, #496] ; (80302f8 ) + 8030106: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030108: f023 0230 bic.w r2, r3, #48 ; 0x30 + 803010c: 687b ldr r3, [r7, #4] + 803010e: 6c9b ldr r3, [r3, #72] ; 0x48 + 8030110: 4979 ldr r1, [pc, #484] ; (80302f8 ) + 8030112: 4313 orrs r3, r2 + 8030114: 64cb str r3, [r1, #76] ; 0x4c + 8030116: e001 b.n 803011c } else { /* set overall return value */ status = ret; - 80300e8: 7dfb ldrb r3, [r7, #23] - 80300ea: 75bb strb r3, [r7, #22] + 8030118: 7dfb ldrb r3, [r7, #23] + 803011a: 75bb strb r3, [r7, #22] } } #endif /*OCTOSPI*/ /*---------------------------- SPI1/2/3 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI123) == RCC_PERIPHCLK_SPI123) - 80300ec: 687b ldr r3, [r7, #4] - 80300ee: 681b ldr r3, [r3, #0] - 80300f0: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 80300f4: 2b00 cmp r3, #0 - 80300f6: d047 beq.n 8030188 + 803011c: 687b ldr r3, [r7, #4] + 803011e: 681b ldr r3, [r3, #0] + 8030120: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8030124: 2b00 cmp r3, #0 + 8030126: d047 beq.n 80301b8 { switch(PeriphClkInit->Spi123ClockSelection) - 80300f8: 687b ldr r3, [r7, #4] - 80300fa: 6ddb ldr r3, [r3, #92] ; 0x5c - 80300fc: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8030100: d030 beq.n 8030164 - 8030102: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8030106: d82a bhi.n 803015e - 8030108: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 803010c: d02c beq.n 8030168 - 803010e: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 8030112: d824 bhi.n 803015e - 8030114: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8030118: d018 beq.n 803014c - 803011a: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 803011e: d81e bhi.n 803015e - 8030120: 2b00 cmp r3, #0 - 8030122: d003 beq.n 803012c - 8030124: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8030128: d007 beq.n 803013a - 803012a: e018 b.n 803015e + 8030128: 687b ldr r3, [r7, #4] + 803012a: 6ddb ldr r3, [r3, #92] ; 0x5c + 803012c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8030130: d030 beq.n 8030194 + 8030132: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8030136: d82a bhi.n 803018e + 8030138: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 803013c: d02c beq.n 8030198 + 803013e: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 8030142: d824 bhi.n 803018e + 8030144: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 8030148: d018 beq.n 803017c + 803014a: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 803014e: d81e bhi.n 803018e + 8030150: 2b00 cmp r3, #0 + 8030152: d003 beq.n 803015c + 8030154: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8030158: d007 beq.n 803016a + 803015a: e018 b.n 803018e { case RCC_SPI123CLKSOURCE_PLL: /* PLL is used as clock source for SPI1/2/3 */ /* Enable SPI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 803012c: 4b66 ldr r3, [pc, #408] ; (80302c8 ) - 803012e: 6adb ldr r3, [r3, #44] ; 0x2c - 8030130: 4a65 ldr r2, [pc, #404] ; (80302c8 ) - 8030132: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030136: 62d3 str r3, [r2, #44] ; 0x2c + 803015c: 4b66 ldr r3, [pc, #408] ; (80302f8 ) + 803015e: 6adb ldr r3, [r3, #44] ; 0x2c + 8030160: 4a65 ldr r2, [pc, #404] ; (80302f8 ) + 8030162: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030166: 62d3 str r3, [r2, #44] ; 0x2c /* SPI1/2/3 clock source configuration done later after clock selection check */ break; - 8030138: e017 b.n 803016a + 8030168: e017 b.n 803019a case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI1/2/3 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 803013a: 687b ldr r3, [r7, #4] - 803013c: 3304 adds r3, #4 - 803013e: 2100 movs r1, #0 - 8030140: 4618 mov r0, r3 - 8030142: f001 fe45 bl 8031dd0 - 8030146: 4603 mov r3, r0 - 8030148: 75fb strb r3, [r7, #23] + 803016a: 687b ldr r3, [r7, #4] + 803016c: 3304 adds r3, #4 + 803016e: 2100 movs r1, #0 + 8030170: 4618 mov r0, r3 + 8030172: f001 fe45 bl 8031e00 + 8030176: 4603 mov r3, r0 + 8030178: 75fb strb r3, [r7, #23] /* SPI1/2/3 clock source configuration done later after clock selection check */ break; - 803014a: e00e b.n 803016a + 803017a: e00e b.n 803019a case RCC_SPI123CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI1/2/3 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_P_UPDATE); - 803014c: 687b ldr r3, [r7, #4] - 803014e: 3324 adds r3, #36 ; 0x24 - 8030150: 2100 movs r1, #0 - 8030152: 4618 mov r0, r3 - 8030154: f001 feee bl 8031f34 - 8030158: 4603 mov r3, r0 - 803015a: 75fb strb r3, [r7, #23] + 803017c: 687b ldr r3, [r7, #4] + 803017e: 3324 adds r3, #36 ; 0x24 + 8030180: 2100 movs r1, #0 + 8030182: 4618 mov r0, r3 + 8030184: f001 feee bl 8031f64 + 8030188: 4603 mov r3, r0 + 803018a: 75fb strb r3, [r7, #23] /* SPI1/2/3 clock source configuration done later after clock selection check */ break; - 803015c: e005 b.n 803016a + 803018c: e005 b.n 803019a /* HSI, HSE, or CSI oscillator is used as source of SPI1/2/3 clock */ /* SPI1/2/3 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 803015e: 2301 movs r3, #1 - 8030160: 75fb strb r3, [r7, #23] + 803018e: 2301 movs r3, #1 + 8030190: 75fb strb r3, [r7, #23] break; - 8030162: e002 b.n 803016a + 8030192: e002 b.n 803019a break; - 8030164: bf00 nop - 8030166: e000 b.n 803016a + 8030194: bf00 nop + 8030196: e000 b.n 803019a break; - 8030168: bf00 nop + 8030198: bf00 nop } if(ret == HAL_OK) - 803016a: 7dfb ldrb r3, [r7, #23] - 803016c: 2b00 cmp r3, #0 - 803016e: d109 bne.n 8030184 + 803019a: 7dfb ldrb r3, [r7, #23] + 803019c: 2b00 cmp r3, #0 + 803019e: d109 bne.n 80301b4 { /* Set the source of SPI1/2/3 clock*/ __HAL_RCC_SPI123_CONFIG(PeriphClkInit->Spi123ClockSelection); - 8030170: 4b55 ldr r3, [pc, #340] ; (80302c8 ) - 8030172: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030174: f423 42e0 bic.w r2, r3, #28672 ; 0x7000 - 8030178: 687b ldr r3, [r7, #4] - 803017a: 6ddb ldr r3, [r3, #92] ; 0x5c - 803017c: 4952 ldr r1, [pc, #328] ; (80302c8 ) - 803017e: 4313 orrs r3, r2 - 8030180: 650b str r3, [r1, #80] ; 0x50 - 8030182: e001 b.n 8030188 + 80301a0: 4b55 ldr r3, [pc, #340] ; (80302f8 ) + 80301a2: 6d1b ldr r3, [r3, #80] ; 0x50 + 80301a4: f423 42e0 bic.w r2, r3, #28672 ; 0x7000 + 80301a8: 687b ldr r3, [r7, #4] + 80301aa: 6ddb ldr r3, [r3, #92] ; 0x5c + 80301ac: 4952 ldr r1, [pc, #328] ; (80302f8 ) + 80301ae: 4313 orrs r3, r2 + 80301b0: 650b str r3, [r1, #80] ; 0x50 + 80301b2: e001 b.n 80301b8 } else { /* set overall return value */ status = ret; - 8030184: 7dfb ldrb r3, [r7, #23] - 8030186: 75bb strb r3, [r7, #22] + 80301b4: 7dfb ldrb r3, [r7, #23] + 80301b6: 75bb strb r3, [r7, #22] } } /*---------------------------- SPI4/5 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI45) == RCC_PERIPHCLK_SPI45) - 8030188: 687b ldr r3, [r7, #4] - 803018a: 681b ldr r3, [r3, #0] - 803018c: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 8030190: 2b00 cmp r3, #0 - 8030192: d049 beq.n 8030228 + 80301b8: 687b ldr r3, [r7, #4] + 80301ba: 681b ldr r3, [r3, #0] + 80301bc: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 80301c0: 2b00 cmp r3, #0 + 80301c2: d049 beq.n 8030258 { switch(PeriphClkInit->Spi45ClockSelection) - 8030194: 687b ldr r3, [r7, #4] - 8030196: 6e1b ldr r3, [r3, #96] ; 0x60 - 8030198: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 803019c: d02e beq.n 80301fc - 803019e: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 80301a2: d828 bhi.n 80301f6 - 80301a4: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 - 80301a8: d02a beq.n 8030200 - 80301aa: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 - 80301ae: d822 bhi.n 80301f6 - 80301b0: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 - 80301b4: d026 beq.n 8030204 - 80301b6: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 - 80301ba: d81c bhi.n 80301f6 - 80301bc: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80301c0: d010 beq.n 80301e4 - 80301c2: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80301c6: d816 bhi.n 80301f6 - 80301c8: 2b00 cmp r3, #0 - 80301ca: d01d beq.n 8030208 - 80301cc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80301d0: d111 bne.n 80301f6 + 80301c4: 687b ldr r3, [r7, #4] + 80301c6: 6e1b ldr r3, [r3, #96] ; 0x60 + 80301c8: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 80301cc: d02e beq.n 803022c + 80301ce: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 80301d2: d828 bhi.n 8030226 + 80301d4: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 + 80301d8: d02a beq.n 8030230 + 80301da: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 + 80301de: d822 bhi.n 8030226 + 80301e0: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 + 80301e4: d026 beq.n 8030234 + 80301e6: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 + 80301ea: d81c bhi.n 8030226 + 80301ec: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80301f0: d010 beq.n 8030214 + 80301f2: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80301f6: d816 bhi.n 8030226 + 80301f8: 2b00 cmp r3, #0 + 80301fa: d01d beq.n 8030238 + 80301fc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8030200: d111 bne.n 8030226 /* SPI4/5 clock source configuration done later after clock selection check */ break; case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI4/5 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 80301d2: 687b ldr r3, [r7, #4] - 80301d4: 3304 adds r3, #4 - 80301d6: 2101 movs r1, #1 - 80301d8: 4618 mov r0, r3 - 80301da: f001 fdf9 bl 8031dd0 - 80301de: 4603 mov r3, r0 - 80301e0: 75fb strb r3, [r7, #23] + 8030202: 687b ldr r3, [r7, #4] + 8030204: 3304 adds r3, #4 + 8030206: 2101 movs r1, #1 + 8030208: 4618 mov r0, r3 + 803020a: f001 fdf9 bl 8031e00 + 803020e: 4603 mov r3, r0 + 8030210: 75fb strb r3, [r7, #23] /* SPI4/5 clock source configuration done later after clock selection check */ break; - 80301e2: e012 b.n 803020a + 8030212: e012 b.n 803023a case RCC_SPI45CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI4/5 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 80301e4: 687b ldr r3, [r7, #4] - 80301e6: 3324 adds r3, #36 ; 0x24 - 80301e8: 2101 movs r1, #1 - 80301ea: 4618 mov r0, r3 - 80301ec: f001 fea2 bl 8031f34 - 80301f0: 4603 mov r3, r0 - 80301f2: 75fb strb r3, [r7, #23] + 8030214: 687b ldr r3, [r7, #4] + 8030216: 3324 adds r3, #36 ; 0x24 + 8030218: 2101 movs r1, #1 + 803021a: 4618 mov r0, r3 + 803021c: f001 fea2 bl 8031f64 + 8030220: 4603 mov r3, r0 + 8030222: 75fb strb r3, [r7, #23] /* SPI4/5 clock source configuration done later after clock selection check */ break; - 80301f4: e009 b.n 803020a + 8030224: e009 b.n 803023a /* HSE, oscillator is used as source of SPI4/5 clock */ /* SPI4/5 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 80301f6: 2301 movs r3, #1 - 80301f8: 75fb strb r3, [r7, #23] + 8030226: 2301 movs r3, #1 + 8030228: 75fb strb r3, [r7, #23] break; - 80301fa: e006 b.n 803020a + 803022a: e006 b.n 803023a break; - 80301fc: bf00 nop - 80301fe: e004 b.n 803020a + 803022c: bf00 nop + 803022e: e004 b.n 803023a break; - 8030200: bf00 nop - 8030202: e002 b.n 803020a + 8030230: bf00 nop + 8030232: e002 b.n 803023a break; - 8030204: bf00 nop - 8030206: e000 b.n 803020a + 8030234: bf00 nop + 8030236: e000 b.n 803023a break; - 8030208: bf00 nop + 8030238: bf00 nop } if(ret == HAL_OK) - 803020a: 7dfb ldrb r3, [r7, #23] - 803020c: 2b00 cmp r3, #0 - 803020e: d109 bne.n 8030224 + 803023a: 7dfb ldrb r3, [r7, #23] + 803023c: 2b00 cmp r3, #0 + 803023e: d109 bne.n 8030254 { /* Set the source of SPI4/5 clock*/ __HAL_RCC_SPI45_CONFIG(PeriphClkInit->Spi45ClockSelection); - 8030210: 4b2d ldr r3, [pc, #180] ; (80302c8 ) - 8030212: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030214: f423 22e0 bic.w r2, r3, #458752 ; 0x70000 - 8030218: 687b ldr r3, [r7, #4] - 803021a: 6e1b ldr r3, [r3, #96] ; 0x60 - 803021c: 492a ldr r1, [pc, #168] ; (80302c8 ) - 803021e: 4313 orrs r3, r2 - 8030220: 650b str r3, [r1, #80] ; 0x50 - 8030222: e001 b.n 8030228 + 8030240: 4b2d ldr r3, [pc, #180] ; (80302f8 ) + 8030242: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030244: f423 22e0 bic.w r2, r3, #458752 ; 0x70000 + 8030248: 687b ldr r3, [r7, #4] + 803024a: 6e1b ldr r3, [r3, #96] ; 0x60 + 803024c: 492a ldr r1, [pc, #168] ; (80302f8 ) + 803024e: 4313 orrs r3, r2 + 8030250: 650b str r3, [r1, #80] ; 0x50 + 8030252: e001 b.n 8030258 } else { /* set overall return value */ status = ret; - 8030224: 7dfb ldrb r3, [r7, #23] - 8030226: 75bb strb r3, [r7, #22] + 8030254: 7dfb ldrb r3, [r7, #23] + 8030256: 75bb strb r3, [r7, #22] } } /*---------------------------- SPI6 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI6) == RCC_PERIPHCLK_SPI6) - 8030228: 687b ldr r3, [r7, #4] - 803022a: 681b ldr r3, [r3, #0] - 803022c: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8030230: 2b00 cmp r3, #0 - 8030232: d04d beq.n 80302d0 + 8030258: 687b ldr r3, [r7, #4] + 803025a: 681b ldr r3, [r3, #0] + 803025c: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8030260: 2b00 cmp r3, #0 + 8030262: d04d beq.n 8030300 { switch(PeriphClkInit->Spi6ClockSelection) - 8030234: 687b ldr r3, [r7, #4] - 8030236: f8d3 30ac ldr.w r3, [r3, #172] ; 0xac - 803023a: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 803023e: d02e beq.n 803029e - 8030240: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8030244: d828 bhi.n 8030298 - 8030246: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 803024a: d02a beq.n 80302a2 - 803024c: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8030250: d822 bhi.n 8030298 - 8030252: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 8030256: d026 beq.n 80302a6 - 8030258: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 803025c: d81c bhi.n 8030298 - 803025e: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030262: d010 beq.n 8030286 - 8030264: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030268: d816 bhi.n 8030298 - 803026a: 2b00 cmp r3, #0 - 803026c: d01d beq.n 80302aa - 803026e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8030272: d111 bne.n 8030298 + 8030264: 687b ldr r3, [r7, #4] + 8030266: f8d3 30ac ldr.w r3, [r3, #172] ; 0xac + 803026a: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 803026e: d02e beq.n 80302ce + 8030270: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 8030274: d828 bhi.n 80302c8 + 8030276: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 803027a: d02a beq.n 80302d2 + 803027c: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8030280: d822 bhi.n 80302c8 + 8030282: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 8030286: d026 beq.n 80302d6 + 8030288: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 803028c: d81c bhi.n 80302c8 + 803028e: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030292: d010 beq.n 80302b6 + 8030294: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030298: d816 bhi.n 80302c8 + 803029a: 2b00 cmp r3, #0 + 803029c: d01d beq.n 80302da + 803029e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 80302a2: d111 bne.n 80302c8 /* SPI6 clock source configuration done later after clock selection check */ break; case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI6*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 8030274: 687b ldr r3, [r7, #4] - 8030276: 3304 adds r3, #4 - 8030278: 2101 movs r1, #1 - 803027a: 4618 mov r0, r3 - 803027c: f001 fda8 bl 8031dd0 - 8030280: 4603 mov r3, r0 - 8030282: 75fb strb r3, [r7, #23] + 80302a4: 687b ldr r3, [r7, #4] + 80302a6: 3304 adds r3, #4 + 80302a8: 2101 movs r1, #1 + 80302aa: 4618 mov r0, r3 + 80302ac: f001 fda8 bl 8031e00 + 80302b0: 4603 mov r3, r0 + 80302b2: 75fb strb r3, [r7, #23] /* SPI6 clock source configuration done later after clock selection check */ break; - 8030284: e012 b.n 80302ac + 80302b4: e012 b.n 80302dc case RCC_SPI6CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI6*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 8030286: 687b ldr r3, [r7, #4] - 8030288: 3324 adds r3, #36 ; 0x24 - 803028a: 2101 movs r1, #1 - 803028c: 4618 mov r0, r3 - 803028e: f001 fe51 bl 8031f34 - 8030292: 4603 mov r3, r0 - 8030294: 75fb strb r3, [r7, #23] + 80302b6: 687b ldr r3, [r7, #4] + 80302b8: 3324 adds r3, #36 ; 0x24 + 80302ba: 2101 movs r1, #1 + 80302bc: 4618 mov r0, r3 + 80302be: f001 fe51 bl 8031f64 + 80302c2: 4603 mov r3, r0 + 80302c4: 75fb strb r3, [r7, #23] /* SPI6 clock source configuration done later after clock selection check */ break; - 8030296: e009 b.n 80302ac + 80302c6: e009 b.n 80302dc /* SPI6 clock source configuration done later after clock selection check */ break; #endif default: ret = HAL_ERROR; - 8030298: 2301 movs r3, #1 - 803029a: 75fb strb r3, [r7, #23] + 80302c8: 2301 movs r3, #1 + 80302ca: 75fb strb r3, [r7, #23] break; - 803029c: e006 b.n 80302ac + 80302cc: e006 b.n 80302dc break; - 803029e: bf00 nop - 80302a0: e004 b.n 80302ac + 80302ce: bf00 nop + 80302d0: e004 b.n 80302dc break; - 80302a2: bf00 nop - 80302a4: e002 b.n 80302ac + 80302d2: bf00 nop + 80302d4: e002 b.n 80302dc break; - 80302a6: bf00 nop - 80302a8: e000 b.n 80302ac + 80302d6: bf00 nop + 80302d8: e000 b.n 80302dc break; - 80302aa: bf00 nop + 80302da: bf00 nop } if(ret == HAL_OK) - 80302ac: 7dfb ldrb r3, [r7, #23] - 80302ae: 2b00 cmp r3, #0 - 80302b0: d10c bne.n 80302cc + 80302dc: 7dfb ldrb r3, [r7, #23] + 80302de: 2b00 cmp r3, #0 + 80302e0: d10c bne.n 80302fc { /* Set the source of SPI6 clock*/ __HAL_RCC_SPI6_CONFIG(PeriphClkInit->Spi6ClockSelection); - 80302b2: 4b05 ldr r3, [pc, #20] ; (80302c8 ) - 80302b4: 6d9b ldr r3, [r3, #88] ; 0x58 - 80302b6: f023 42e0 bic.w r2, r3, #1879048192 ; 0x70000000 - 80302ba: 687b ldr r3, [r7, #4] - 80302bc: f8d3 30ac ldr.w r3, [r3, #172] ; 0xac - 80302c0: 4901 ldr r1, [pc, #4] ; (80302c8 ) - 80302c2: 4313 orrs r3, r2 - 80302c4: 658b str r3, [r1, #88] ; 0x58 - 80302c6: e003 b.n 80302d0 - 80302c8: 58024400 .word 0x58024400 + 80302e2: 4b05 ldr r3, [pc, #20] ; (80302f8 ) + 80302e4: 6d9b ldr r3, [r3, #88] ; 0x58 + 80302e6: f023 42e0 bic.w r2, r3, #1879048192 ; 0x70000000 + 80302ea: 687b ldr r3, [r7, #4] + 80302ec: f8d3 30ac ldr.w r3, [r3, #172] ; 0xac + 80302f0: 4901 ldr r1, [pc, #4] ; (80302f8 ) + 80302f2: 4313 orrs r3, r2 + 80302f4: 658b str r3, [r1, #88] ; 0x58 + 80302f6: e003 b.n 8030300 + 80302f8: 58024400 .word 0x58024400 } else { /* set overall return value */ status = ret; - 80302cc: 7dfb ldrb r3, [r7, #23] - 80302ce: 75bb strb r3, [r7, #22] + 80302fc: 7dfb ldrb r3, [r7, #23] + 80302fe: 75bb strb r3, [r7, #22] } #endif /*DSI*/ #if defined(FDCAN1) || defined(FDCAN2) /*---------------------------- FDCAN configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN) - 80302d0: 687b ldr r3, [r7, #4] - 80302d2: 681b ldr r3, [r3, #0] - 80302d4: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 80302d8: 2b00 cmp r3, #0 - 80302da: d02f beq.n 803033c + 8030300: 687b ldr r3, [r7, #4] + 8030302: 681b ldr r3, [r3, #0] + 8030304: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 8030308: 2b00 cmp r3, #0 + 803030a: d02f beq.n 803036c { switch(PeriphClkInit->FdcanClockSelection) - 80302dc: 687b ldr r3, [r7, #4] - 80302de: 6edb ldr r3, [r3, #108] ; 0x6c - 80302e0: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80302e4: d00e beq.n 8030304 - 80302e6: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80302ea: d814 bhi.n 8030316 - 80302ec: 2b00 cmp r3, #0 - 80302ee: d015 beq.n 803031c - 80302f0: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 80302f4: d10f bne.n 8030316 + 803030c: 687b ldr r3, [r7, #4] + 803030e: 6edb ldr r3, [r3, #108] ; 0x6c + 8030310: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030314: d00e beq.n 8030334 + 8030316: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803031a: d814 bhi.n 8030346 + 803031c: 2b00 cmp r3, #0 + 803031e: d015 beq.n 803034c + 8030320: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8030324: d10f bne.n 8030346 { case RCC_FDCANCLKSOURCE_PLL: /* PLL is used as clock source for FDCAN*/ /* Enable FDCAN Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 80302f6: 4baf ldr r3, [pc, #700] ; (80305b4 ) - 80302f8: 6adb ldr r3, [r3, #44] ; 0x2c - 80302fa: 4aae ldr r2, [pc, #696] ; (80305b4 ) - 80302fc: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030300: 62d3 str r3, [r2, #44] ; 0x2c + 8030326: 4baf ldr r3, [pc, #700] ; (80305e4 ) + 8030328: 6adb ldr r3, [r3, #44] ; 0x2c + 803032a: 4aae ldr r2, [pc, #696] ; (80305e4 ) + 803032c: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030330: 62d3 str r3, [r2, #44] ; 0x2c /* FDCAN clock source configuration done later after clock selection check */ break; - 8030302: e00c b.n 803031e + 8030332: e00c b.n 803034e case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is used as clock source for FDCAN*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 8030304: 687b ldr r3, [r7, #4] - 8030306: 3304 adds r3, #4 - 8030308: 2101 movs r1, #1 - 803030a: 4618 mov r0, r3 - 803030c: f001 fd60 bl 8031dd0 - 8030310: 4603 mov r3, r0 - 8030312: 75fb strb r3, [r7, #23] + 8030334: 687b ldr r3, [r7, #4] + 8030336: 3304 adds r3, #4 + 8030338: 2101 movs r1, #1 + 803033a: 4618 mov r0, r3 + 803033c: f001 fd60 bl 8031e00 + 8030340: 4603 mov r3, r0 + 8030342: 75fb strb r3, [r7, #23] /* FDCAN clock source configuration done later after clock selection check */ break; - 8030314: e003 b.n 803031e + 8030344: e003 b.n 803034e /* HSE is used as clock source for FDCAN*/ /* FDCAN clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030316: 2301 movs r3, #1 - 8030318: 75fb strb r3, [r7, #23] + 8030346: 2301 movs r3, #1 + 8030348: 75fb strb r3, [r7, #23] break; - 803031a: e000 b.n 803031e + 803034a: e000 b.n 803034e break; - 803031c: bf00 nop + 803034c: bf00 nop } if(ret == HAL_OK) - 803031e: 7dfb ldrb r3, [r7, #23] - 8030320: 2b00 cmp r3, #0 - 8030322: d109 bne.n 8030338 + 803034e: 7dfb ldrb r3, [r7, #23] + 8030350: 2b00 cmp r3, #0 + 8030352: d109 bne.n 8030368 { /* Set the source of FDCAN clock*/ __HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection); - 8030324: 4ba3 ldr r3, [pc, #652] ; (80305b4 ) - 8030326: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030328: f023 5240 bic.w r2, r3, #805306368 ; 0x30000000 - 803032c: 687b ldr r3, [r7, #4] - 803032e: 6edb ldr r3, [r3, #108] ; 0x6c - 8030330: 49a0 ldr r1, [pc, #640] ; (80305b4 ) - 8030332: 4313 orrs r3, r2 - 8030334: 650b str r3, [r1, #80] ; 0x50 - 8030336: e001 b.n 803033c + 8030354: 4ba3 ldr r3, [pc, #652] ; (80305e4 ) + 8030356: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030358: f023 5240 bic.w r2, r3, #805306368 ; 0x30000000 + 803035c: 687b ldr r3, [r7, #4] + 803035e: 6edb ldr r3, [r3, #108] ; 0x6c + 8030360: 49a0 ldr r1, [pc, #640] ; (80305e4 ) + 8030362: 4313 orrs r3, r2 + 8030364: 650b str r3, [r1, #80] ; 0x50 + 8030366: e001 b.n 803036c } else { /* set overall return value */ status = ret; - 8030338: 7dfb ldrb r3, [r7, #23] - 803033a: 75bb strb r3, [r7, #22] + 8030368: 7dfb ldrb r3, [r7, #23] + 803036a: 75bb strb r3, [r7, #22] } } #endif /*FDCAN1 || FDCAN2*/ /*---------------------------- FMC configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMC) == RCC_PERIPHCLK_FMC) - 803033c: 687b ldr r3, [r7, #4] - 803033e: 681b ldr r3, [r3, #0] - 8030340: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8030344: 2b00 cmp r3, #0 - 8030346: d032 beq.n 80303ae + 803036c: 687b ldr r3, [r7, #4] + 803036e: 681b ldr r3, [r3, #0] + 8030370: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 8030374: 2b00 cmp r3, #0 + 8030376: d032 beq.n 80303de { switch(PeriphClkInit->FmcClockSelection) - 8030348: 687b ldr r3, [r7, #4] - 803034a: 6c5b ldr r3, [r3, #68] ; 0x44 - 803034c: 2b03 cmp r3, #3 - 803034e: d81b bhi.n 8030388 - 8030350: a201 add r2, pc, #4 ; (adr r2, 8030358 ) - 8030352: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8030356: bf00 nop - 8030358: 0803038f .word 0x0803038f - 803035c: 08030369 .word 0x08030369 - 8030360: 08030377 .word 0x08030377 - 8030364: 0803038f .word 0x0803038f + 8030378: 687b ldr r3, [r7, #4] + 803037a: 6c5b ldr r3, [r3, #68] ; 0x44 + 803037c: 2b03 cmp r3, #3 + 803037e: d81b bhi.n 80303b8 + 8030380: a201 add r2, pc, #4 ; (adr r2, 8030388 ) + 8030382: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8030386: bf00 nop + 8030388: 080303bf .word 0x080303bf + 803038c: 08030399 .word 0x08030399 + 8030390: 080303a7 .word 0x080303a7 + 8030394: 080303bf .word 0x080303bf { case RCC_FMCCLKSOURCE_PLL: /* PLL is used as clock source for FMC*/ /* Enable FMC Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030368: 4b92 ldr r3, [pc, #584] ; (80305b4 ) - 803036a: 6adb ldr r3, [r3, #44] ; 0x2c - 803036c: 4a91 ldr r2, [pc, #580] ; (80305b4 ) - 803036e: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030372: 62d3 str r3, [r2, #44] ; 0x2c + 8030398: 4b92 ldr r3, [pc, #584] ; (80305e4 ) + 803039a: 6adb ldr r3, [r3, #44] ; 0x2c + 803039c: 4a91 ldr r2, [pc, #580] ; (80305e4 ) + 803039e: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 80303a2: 62d3 str r3, [r2, #44] ; 0x2c /* FMC clock source configuration done later after clock selection check */ break; - 8030374: e00c b.n 8030390 + 80303a4: e00c b.n 80303c0 case RCC_FMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for FMC*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_R_UPDATE); - 8030376: 687b ldr r3, [r7, #4] - 8030378: 3304 adds r3, #4 - 803037a: 2102 movs r1, #2 - 803037c: 4618 mov r0, r3 - 803037e: f001 fd27 bl 8031dd0 - 8030382: 4603 mov r3, r0 - 8030384: 75fb strb r3, [r7, #23] + 80303a6: 687b ldr r3, [r7, #4] + 80303a8: 3304 adds r3, #4 + 80303aa: 2102 movs r1, #2 + 80303ac: 4618 mov r0, r3 + 80303ae: f001 fd27 bl 8031e00 + 80303b2: 4603 mov r3, r0 + 80303b4: 75fb strb r3, [r7, #23] /* FMC clock source configuration done later after clock selection check */ break; - 8030386: e003 b.n 8030390 + 80303b6: e003 b.n 80303c0 case RCC_FMCCLKSOURCE_HCLK: /* D1/CD HCLK clock selected as FMC kernel peripheral clock */ break; default: ret = HAL_ERROR; - 8030388: 2301 movs r3, #1 - 803038a: 75fb strb r3, [r7, #23] + 80303b8: 2301 movs r3, #1 + 80303ba: 75fb strb r3, [r7, #23] break; - 803038c: e000 b.n 8030390 + 80303bc: e000 b.n 80303c0 break; - 803038e: bf00 nop + 80303be: bf00 nop } if(ret == HAL_OK) - 8030390: 7dfb ldrb r3, [r7, #23] - 8030392: 2b00 cmp r3, #0 - 8030394: d109 bne.n 80303aa + 80303c0: 7dfb ldrb r3, [r7, #23] + 80303c2: 2b00 cmp r3, #0 + 80303c4: d109 bne.n 80303da { /* Set the source of FMC clock*/ __HAL_RCC_FMC_CONFIG(PeriphClkInit->FmcClockSelection); - 8030396: 4b87 ldr r3, [pc, #540] ; (80305b4 ) - 8030398: 6cdb ldr r3, [r3, #76] ; 0x4c - 803039a: f023 0203 bic.w r2, r3, #3 - 803039e: 687b ldr r3, [r7, #4] - 80303a0: 6c5b ldr r3, [r3, #68] ; 0x44 - 80303a2: 4984 ldr r1, [pc, #528] ; (80305b4 ) - 80303a4: 4313 orrs r3, r2 - 80303a6: 64cb str r3, [r1, #76] ; 0x4c - 80303a8: e001 b.n 80303ae + 80303c6: 4b87 ldr r3, [pc, #540] ; (80305e4 ) + 80303c8: 6cdb ldr r3, [r3, #76] ; 0x4c + 80303ca: f023 0203 bic.w r2, r3, #3 + 80303ce: 687b ldr r3, [r7, #4] + 80303d0: 6c5b ldr r3, [r3, #68] ; 0x44 + 80303d2: 4984 ldr r1, [pc, #528] ; (80305e4 ) + 80303d4: 4313 orrs r3, r2 + 80303d6: 64cb str r3, [r1, #76] ; 0x4c + 80303d8: e001 b.n 80303de } else { /* set overall return value */ status = ret; - 80303aa: 7dfb ldrb r3, [r7, #23] - 80303ac: 75bb strb r3, [r7, #22] + 80303da: 7dfb ldrb r3, [r7, #23] + 80303dc: 75bb strb r3, [r7, #22] } } /*---------------------------- RTC configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - 80303ae: 687b ldr r3, [r7, #4] - 80303b0: 681b ldr r3, [r3, #0] - 80303b2: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 80303b6: 2b00 cmp r3, #0 - 80303b8: f000 8086 beq.w 80304c8 + 80303de: 687b ldr r3, [r7, #4] + 80303e0: 681b ldr r3, [r3, #0] + 80303e2: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 80303e6: 2b00 cmp r3, #0 + 80303e8: f000 8086 beq.w 80304f8 { /* check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable write access to Backup domain */ SET_BIT(PWR->CR1, PWR_CR1_DBP); - 80303bc: 4b7e ldr r3, [pc, #504] ; (80305b8 ) - 80303be: 681b ldr r3, [r3, #0] - 80303c0: 4a7d ldr r2, [pc, #500] ; (80305b8 ) - 80303c2: f443 7380 orr.w r3, r3, #256 ; 0x100 - 80303c6: 6013 str r3, [r2, #0] + 80303ec: 4b7e ldr r3, [pc, #504] ; (80305e8 ) + 80303ee: 681b ldr r3, [r3, #0] + 80303f0: 4a7d ldr r2, [pc, #500] ; (80305e8 ) + 80303f2: f443 7380 orr.w r3, r3, #256 ; 0x100 + 80303f6: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80303c8: f7f5 fde4 bl 8025f94 - 80303cc: 6138 str r0, [r7, #16] + 80303f8: f7f5 fde4 bl 8025fc4 + 80303fc: 6138 str r0, [r7, #16] while((PWR->CR1 & PWR_CR1_DBP) == 0U) - 80303ce: e009 b.n 80303e4 + 80303fe: e009 b.n 8030414 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80303d0: f7f5 fde0 bl 8025f94 - 80303d4: 4602 mov r2, r0 - 80303d6: 693b ldr r3, [r7, #16] - 80303d8: 1ad3 subs r3, r2, r3 - 80303da: 2b64 cmp r3, #100 ; 0x64 - 80303dc: d902 bls.n 80303e4 + 8030400: f7f5 fde0 bl 8025fc4 + 8030404: 4602 mov r2, r0 + 8030406: 693b ldr r3, [r7, #16] + 8030408: 1ad3 subs r3, r2, r3 + 803040a: 2b64 cmp r3, #100 ; 0x64 + 803040c: d902 bls.n 8030414 { ret = HAL_TIMEOUT; - 80303de: 2303 movs r3, #3 - 80303e0: 75fb strb r3, [r7, #23] + 803040e: 2303 movs r3, #3 + 8030410: 75fb strb r3, [r7, #23] break; - 80303e2: e005 b.n 80303f0 + 8030412: e005 b.n 8030420 while((PWR->CR1 & PWR_CR1_DBP) == 0U) - 80303e4: 4b74 ldr r3, [pc, #464] ; (80305b8 ) - 80303e6: 681b ldr r3, [r3, #0] - 80303e8: f403 7380 and.w r3, r3, #256 ; 0x100 - 80303ec: 2b00 cmp r3, #0 - 80303ee: d0ef beq.n 80303d0 + 8030414: 4b74 ldr r3, [pc, #464] ; (80305e8 ) + 8030416: 681b ldr r3, [r3, #0] + 8030418: f403 7380 and.w r3, r3, #256 ; 0x100 + 803041c: 2b00 cmp r3, #0 + 803041e: d0ef beq.n 8030400 } } if(ret == HAL_OK) - 80303f0: 7dfb ldrb r3, [r7, #23] - 80303f2: 2b00 cmp r3, #0 - 80303f4: d166 bne.n 80304c4 + 8030420: 7dfb ldrb r3, [r7, #23] + 8030422: 2b00 cmp r3, #0 + 8030424: d166 bne.n 80304f4 { /* Reset the Backup domain only if the RTC Clock source selection is modified */ if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)) - 80303f6: 4b6f ldr r3, [pc, #444] ; (80305b4 ) - 80303f8: 6f1a ldr r2, [r3, #112] ; 0x70 - 80303fa: 687b ldr r3, [r7, #4] - 80303fc: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 8030400: 4053 eors r3, r2 - 8030402: f403 7340 and.w r3, r3, #768 ; 0x300 - 8030406: 2b00 cmp r3, #0 - 8030408: d013 beq.n 8030432 + 8030426: 4b6f ldr r3, [pc, #444] ; (80305e4 ) + 8030428: 6f1a ldr r2, [r3, #112] ; 0x70 + 803042a: 687b ldr r3, [r7, #4] + 803042c: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 8030430: 4053 eors r3, r2 + 8030432: f403 7340 and.w r3, r3, #768 ; 0x300 + 8030436: 2b00 cmp r3, #0 + 8030438: d013 beq.n 8030462 { /* Store the content of BDCR register before the reset of Backup Domain */ tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 803040a: 4b6a ldr r3, [pc, #424] ; (80305b4 ) - 803040c: 6f1b ldr r3, [r3, #112] ; 0x70 - 803040e: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8030412: 60fb str r3, [r7, #12] + 803043a: 4b6a ldr r3, [pc, #424] ; (80305e4 ) + 803043c: 6f1b ldr r3, [r3, #112] ; 0x70 + 803043e: f423 7340 bic.w r3, r3, #768 ; 0x300 + 8030442: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 8030414: 4b67 ldr r3, [pc, #412] ; (80305b4 ) - 8030416: 6f1b ldr r3, [r3, #112] ; 0x70 - 8030418: 4a66 ldr r2, [pc, #408] ; (80305b4 ) - 803041a: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 803041e: 6713 str r3, [r2, #112] ; 0x70 + 8030444: 4b67 ldr r3, [pc, #412] ; (80305e4 ) + 8030446: 6f1b ldr r3, [r3, #112] ; 0x70 + 8030448: 4a66 ldr r2, [pc, #408] ; (80305e4 ) + 803044a: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 803044e: 6713 str r3, [r2, #112] ; 0x70 __HAL_RCC_BACKUPRESET_RELEASE(); - 8030420: 4b64 ldr r3, [pc, #400] ; (80305b4 ) - 8030422: 6f1b ldr r3, [r3, #112] ; 0x70 - 8030424: 4a63 ldr r2, [pc, #396] ; (80305b4 ) - 8030426: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 803042a: 6713 str r3, [r2, #112] ; 0x70 + 8030450: 4b64 ldr r3, [pc, #400] ; (80305e4 ) + 8030452: 6f1b ldr r3, [r3, #112] ; 0x70 + 8030454: 4a63 ldr r2, [pc, #396] ; (80305e4 ) + 8030456: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 803045a: 6713 str r3, [r2, #112] ; 0x70 /* Restore the Content of BDCR register */ RCC->BDCR = tmpreg; - 803042c: 4a61 ldr r2, [pc, #388] ; (80305b4 ) - 803042e: 68fb ldr r3, [r7, #12] - 8030430: 6713 str r3, [r2, #112] ; 0x70 + 803045c: 4a61 ldr r2, [pc, #388] ; (80305e4 ) + 803045e: 68fb ldr r3, [r7, #12] + 8030460: 6713 str r3, [r2, #112] ; 0x70 } /* If LSE is selected as RTC clock source (and enabled prior to Backup Domain reset), wait for LSE reactivation */ if(PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE) - 8030432: 687b ldr r3, [r7, #4] - 8030434: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 8030438: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803043c: d115 bne.n 803046a + 8030462: 687b ldr r3, [r7, #4] + 8030464: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 8030468: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 803046c: d115 bne.n 803049a { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 803043e: f7f5 fda9 bl 8025f94 - 8030442: 6138 str r0, [r7, #16] + 803046e: f7f5 fda9 bl 8025fc4 + 8030472: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 8030444: e00b b.n 803045e + 8030474: e00b b.n 803048e { if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8030446: f7f5 fda5 bl 8025f94 - 803044a: 4602 mov r2, r0 - 803044c: 693b ldr r3, [r7, #16] - 803044e: 1ad3 subs r3, r2, r3 - 8030450: f241 3288 movw r2, #5000 ; 0x1388 - 8030454: 4293 cmp r3, r2 - 8030456: d902 bls.n 803045e + 8030476: f7f5 fda5 bl 8025fc4 + 803047a: 4602 mov r2, r0 + 803047c: 693b ldr r3, [r7, #16] + 803047e: 1ad3 subs r3, r2, r3 + 8030480: f241 3288 movw r2, #5000 ; 0x1388 + 8030484: 4293 cmp r3, r2 + 8030486: d902 bls.n 803048e { ret = HAL_TIMEOUT; - 8030458: 2303 movs r3, #3 - 803045a: 75fb strb r3, [r7, #23] + 8030488: 2303 movs r3, #3 + 803048a: 75fb strb r3, [r7, #23] break; - 803045c: e005 b.n 803046a + 803048c: e005 b.n 803049a while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 803045e: 4b55 ldr r3, [pc, #340] ; (80305b4 ) - 8030460: 6f1b ldr r3, [r3, #112] ; 0x70 - 8030462: f003 0302 and.w r3, r3, #2 - 8030466: 2b00 cmp r3, #0 - 8030468: d0ed beq.n 8030446 + 803048e: 4b55 ldr r3, [pc, #340] ; (80305e4 ) + 8030490: 6f1b ldr r3, [r3, #112] ; 0x70 + 8030492: f003 0302 and.w r3, r3, #2 + 8030496: 2b00 cmp r3, #0 + 8030498: d0ed beq.n 8030476 } } } if(ret == HAL_OK) - 803046a: 7dfb ldrb r3, [r7, #23] - 803046c: 2b00 cmp r3, #0 - 803046e: d126 bne.n 80304be + 803049a: 7dfb ldrb r3, [r7, #23] + 803049c: 2b00 cmp r3, #0 + 803049e: d126 bne.n 80304ee { __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8030470: 687b ldr r3, [r7, #4] - 8030472: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 8030476: f403 7340 and.w r3, r3, #768 ; 0x300 - 803047a: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 803047e: d10d bne.n 803049c - 8030480: 4b4c ldr r3, [pc, #304] ; (80305b4 ) - 8030482: 691b ldr r3, [r3, #16] - 8030484: f423 527c bic.w r2, r3, #16128 ; 0x3f00 - 8030488: 687b ldr r3, [r7, #4] - 803048a: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 803048e: 0919 lsrs r1, r3, #4 - 8030490: 4b4a ldr r3, [pc, #296] ; (80305bc ) - 8030492: 400b ands r3, r1 - 8030494: 4947 ldr r1, [pc, #284] ; (80305b4 ) - 8030496: 4313 orrs r3, r2 - 8030498: 610b str r3, [r1, #16] - 803049a: e005 b.n 80304a8 - 803049c: 4b45 ldr r3, [pc, #276] ; (80305b4 ) - 803049e: 691b ldr r3, [r3, #16] - 80304a0: 4a44 ldr r2, [pc, #272] ; (80305b4 ) - 80304a2: f423 537c bic.w r3, r3, #16128 ; 0x3f00 - 80304a6: 6113 str r3, [r2, #16] - 80304a8: 4b42 ldr r3, [pc, #264] ; (80305b4 ) - 80304aa: 6f1a ldr r2, [r3, #112] ; 0x70 - 80304ac: 687b ldr r3, [r7, #4] - 80304ae: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 80304b2: f3c3 030b ubfx r3, r3, #0, #12 - 80304b6: 493f ldr r1, [pc, #252] ; (80305b4 ) - 80304b8: 4313 orrs r3, r2 - 80304ba: 670b str r3, [r1, #112] ; 0x70 - 80304bc: e004 b.n 80304c8 + 80304a0: 687b ldr r3, [r7, #4] + 80304a2: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 80304a6: f403 7340 and.w r3, r3, #768 ; 0x300 + 80304aa: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 80304ae: d10d bne.n 80304cc + 80304b0: 4b4c ldr r3, [pc, #304] ; (80305e4 ) + 80304b2: 691b ldr r3, [r3, #16] + 80304b4: f423 527c bic.w r2, r3, #16128 ; 0x3f00 + 80304b8: 687b ldr r3, [r7, #4] + 80304ba: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 80304be: 0919 lsrs r1, r3, #4 + 80304c0: 4b4a ldr r3, [pc, #296] ; (80305ec ) + 80304c2: 400b ands r3, r1 + 80304c4: 4947 ldr r1, [pc, #284] ; (80305e4 ) + 80304c6: 4313 orrs r3, r2 + 80304c8: 610b str r3, [r1, #16] + 80304ca: e005 b.n 80304d8 + 80304cc: 4b45 ldr r3, [pc, #276] ; (80305e4 ) + 80304ce: 691b ldr r3, [r3, #16] + 80304d0: 4a44 ldr r2, [pc, #272] ; (80305e4 ) + 80304d2: f423 537c bic.w r3, r3, #16128 ; 0x3f00 + 80304d6: 6113 str r3, [r2, #16] + 80304d8: 4b42 ldr r3, [pc, #264] ; (80305e4 ) + 80304da: 6f1a ldr r2, [r3, #112] ; 0x70 + 80304dc: 687b ldr r3, [r7, #4] + 80304de: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 80304e2: f3c3 030b ubfx r3, r3, #0, #12 + 80304e6: 493f ldr r1, [pc, #252] ; (80305e4 ) + 80304e8: 4313 orrs r3, r2 + 80304ea: 670b str r3, [r1, #112] ; 0x70 + 80304ec: e004 b.n 80304f8 } else { /* set overall return value */ status = ret; - 80304be: 7dfb ldrb r3, [r7, #23] - 80304c0: 75bb strb r3, [r7, #22] - 80304c2: e001 b.n 80304c8 + 80304ee: 7dfb ldrb r3, [r7, #23] + 80304f0: 75bb strb r3, [r7, #22] + 80304f2: e001 b.n 80304f8 } } else { /* set overall return value */ status = ret; - 80304c4: 7dfb ldrb r3, [r7, #23] - 80304c6: 75bb strb r3, [r7, #22] + 80304f4: 7dfb ldrb r3, [r7, #23] + 80304f6: 75bb strb r3, [r7, #22] } } /*-------------------------- USART1/6 configuration --------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART16) == RCC_PERIPHCLK_USART16) - 80304c8: 687b ldr r3, [r7, #4] - 80304ca: 681b ldr r3, [r3, #0] - 80304cc: f003 0301 and.w r3, r3, #1 - 80304d0: 2b00 cmp r3, #0 - 80304d2: f000 8085 beq.w 80305e0 + 80304f8: 687b ldr r3, [r7, #4] + 80304fa: 681b ldr r3, [r3, #0] + 80304fc: f003 0301 and.w r3, r3, #1 + 8030500: 2b00 cmp r3, #0 + 8030502: f000 8085 beq.w 8030610 { switch(PeriphClkInit->Usart16ClockSelection) - 80304d6: 687b ldr r3, [r7, #4] - 80304d8: 6f9b ldr r3, [r3, #120] ; 0x78 - 80304da: 2b28 cmp r3, #40 ; 0x28 - 80304dc: d866 bhi.n 80305ac - 80304de: a201 add r2, pc, #4 ; (adr r2, 80304e4 ) - 80304e0: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80304e4: 080305c1 .word 0x080305c1 - 80304e8: 080305ad .word 0x080305ad - 80304ec: 080305ad .word 0x080305ad - 80304f0: 080305ad .word 0x080305ad - 80304f4: 080305ad .word 0x080305ad - 80304f8: 080305ad .word 0x080305ad - 80304fc: 080305ad .word 0x080305ad - 8030500: 080305ad .word 0x080305ad - 8030504: 08030589 .word 0x08030589 - 8030508: 080305ad .word 0x080305ad - 803050c: 080305ad .word 0x080305ad - 8030510: 080305ad .word 0x080305ad - 8030514: 080305ad .word 0x080305ad - 8030518: 080305ad .word 0x080305ad - 803051c: 080305ad .word 0x080305ad - 8030520: 080305ad .word 0x080305ad - 8030524: 0803059b .word 0x0803059b - 8030528: 080305ad .word 0x080305ad - 803052c: 080305ad .word 0x080305ad - 8030530: 080305ad .word 0x080305ad - 8030534: 080305ad .word 0x080305ad - 8030538: 080305ad .word 0x080305ad - 803053c: 080305ad .word 0x080305ad - 8030540: 080305ad .word 0x080305ad - 8030544: 080305c1 .word 0x080305c1 - 8030548: 080305ad .word 0x080305ad - 803054c: 080305ad .word 0x080305ad - 8030550: 080305ad .word 0x080305ad - 8030554: 080305ad .word 0x080305ad - 8030558: 080305ad .word 0x080305ad - 803055c: 080305ad .word 0x080305ad - 8030560: 080305ad .word 0x080305ad - 8030564: 080305c1 .word 0x080305c1 - 8030568: 080305ad .word 0x080305ad - 803056c: 080305ad .word 0x080305ad - 8030570: 080305ad .word 0x080305ad - 8030574: 080305ad .word 0x080305ad - 8030578: 080305ad .word 0x080305ad - 803057c: 080305ad .word 0x080305ad - 8030580: 080305ad .word 0x080305ad - 8030584: 080305c1 .word 0x080305c1 + 8030506: 687b ldr r3, [r7, #4] + 8030508: 6f9b ldr r3, [r3, #120] ; 0x78 + 803050a: 2b28 cmp r3, #40 ; 0x28 + 803050c: d866 bhi.n 80305dc + 803050e: a201 add r2, pc, #4 ; (adr r2, 8030514 ) + 8030510: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8030514: 080305f1 .word 0x080305f1 + 8030518: 080305dd .word 0x080305dd + 803051c: 080305dd .word 0x080305dd + 8030520: 080305dd .word 0x080305dd + 8030524: 080305dd .word 0x080305dd + 8030528: 080305dd .word 0x080305dd + 803052c: 080305dd .word 0x080305dd + 8030530: 080305dd .word 0x080305dd + 8030534: 080305b9 .word 0x080305b9 + 8030538: 080305dd .word 0x080305dd + 803053c: 080305dd .word 0x080305dd + 8030540: 080305dd .word 0x080305dd + 8030544: 080305dd .word 0x080305dd + 8030548: 080305dd .word 0x080305dd + 803054c: 080305dd .word 0x080305dd + 8030550: 080305dd .word 0x080305dd + 8030554: 080305cb .word 0x080305cb + 8030558: 080305dd .word 0x080305dd + 803055c: 080305dd .word 0x080305dd + 8030560: 080305dd .word 0x080305dd + 8030564: 080305dd .word 0x080305dd + 8030568: 080305dd .word 0x080305dd + 803056c: 080305dd .word 0x080305dd + 8030570: 080305dd .word 0x080305dd + 8030574: 080305f1 .word 0x080305f1 + 8030578: 080305dd .word 0x080305dd + 803057c: 080305dd .word 0x080305dd + 8030580: 080305dd .word 0x080305dd + 8030584: 080305dd .word 0x080305dd + 8030588: 080305dd .word 0x080305dd + 803058c: 080305dd .word 0x080305dd + 8030590: 080305dd .word 0x080305dd + 8030594: 080305f1 .word 0x080305f1 + 8030598: 080305dd .word 0x080305dd + 803059c: 080305dd .word 0x080305dd + 80305a0: 080305dd .word 0x080305dd + 80305a4: 080305dd .word 0x080305dd + 80305a8: 080305dd .word 0x080305dd + 80305ac: 080305dd .word 0x080305dd + 80305b0: 080305dd .word 0x080305dd + 80305b4: 080305f1 .word 0x080305f1 case RCC_USART16CLKSOURCE_PCLK2: /* CD/D2 PCLK2 as clock source for USART1/6 */ /* USART1/6 clock source configuration done later after clock selection check */ break; case RCC_USART16CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART1/6 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 8030588: 687b ldr r3, [r7, #4] - 803058a: 3304 adds r3, #4 - 803058c: 2101 movs r1, #1 - 803058e: 4618 mov r0, r3 - 8030590: f001 fc1e bl 8031dd0 - 8030594: 4603 mov r3, r0 - 8030596: 75fb strb r3, [r7, #23] + 80305b8: 687b ldr r3, [r7, #4] + 80305ba: 3304 adds r3, #4 + 80305bc: 2101 movs r1, #1 + 80305be: 4618 mov r0, r3 + 80305c0: f001 fc1e bl 8031e00 + 80305c4: 4603 mov r3, r0 + 80305c6: 75fb strb r3, [r7, #23] /* USART1/6 clock source configuration done later after clock selection check */ break; - 8030598: e013 b.n 80305c2 + 80305c8: e013 b.n 80305f2 case RCC_USART16CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART1/6 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 803059a: 687b ldr r3, [r7, #4] - 803059c: 3324 adds r3, #36 ; 0x24 - 803059e: 2101 movs r1, #1 - 80305a0: 4618 mov r0, r3 - 80305a2: f001 fcc7 bl 8031f34 - 80305a6: 4603 mov r3, r0 - 80305a8: 75fb strb r3, [r7, #23] + 80305ca: 687b ldr r3, [r7, #4] + 80305cc: 3324 adds r3, #36 ; 0x24 + 80305ce: 2101 movs r1, #1 + 80305d0: 4618 mov r0, r3 + 80305d2: f001 fcc7 bl 8031f64 + 80305d6: 4603 mov r3, r0 + 80305d8: 75fb strb r3, [r7, #23] /* USART1/6 clock source configuration done later after clock selection check */ break; - 80305aa: e00a b.n 80305c2 + 80305da: e00a b.n 80305f2 /* LSE, oscillator is used as source of USART1/6 clock */ /* USART1/6 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 80305ac: 2301 movs r3, #1 - 80305ae: 75fb strb r3, [r7, #23] + 80305dc: 2301 movs r3, #1 + 80305de: 75fb strb r3, [r7, #23] break; - 80305b0: e007 b.n 80305c2 - 80305b2: bf00 nop - 80305b4: 58024400 .word 0x58024400 - 80305b8: 58024800 .word 0x58024800 - 80305bc: 00ffffcf .word 0x00ffffcf + 80305e0: e007 b.n 80305f2 + 80305e2: bf00 nop + 80305e4: 58024400 .word 0x58024400 + 80305e8: 58024800 .word 0x58024800 + 80305ec: 00ffffcf .word 0x00ffffcf break; - 80305c0: bf00 nop + 80305f0: bf00 nop } if(ret == HAL_OK) - 80305c2: 7dfb ldrb r3, [r7, #23] - 80305c4: 2b00 cmp r3, #0 - 80305c6: d109 bne.n 80305dc + 80305f2: 7dfb ldrb r3, [r7, #23] + 80305f4: 2b00 cmp r3, #0 + 80305f6: d109 bne.n 803060c { /* Set the source of USART1/6 clock */ __HAL_RCC_USART16_CONFIG(PeriphClkInit->Usart16ClockSelection); - 80305c8: 4b96 ldr r3, [pc, #600] ; (8030824 ) - 80305ca: 6d5b ldr r3, [r3, #84] ; 0x54 - 80305cc: f023 0238 bic.w r2, r3, #56 ; 0x38 - 80305d0: 687b ldr r3, [r7, #4] - 80305d2: 6f9b ldr r3, [r3, #120] ; 0x78 - 80305d4: 4993 ldr r1, [pc, #588] ; (8030824 ) - 80305d6: 4313 orrs r3, r2 - 80305d8: 654b str r3, [r1, #84] ; 0x54 - 80305da: e001 b.n 80305e0 + 80305f8: 4b96 ldr r3, [pc, #600] ; (8030854 ) + 80305fa: 6d5b ldr r3, [r3, #84] ; 0x54 + 80305fc: f023 0238 bic.w r2, r3, #56 ; 0x38 + 8030600: 687b ldr r3, [r7, #4] + 8030602: 6f9b ldr r3, [r3, #120] ; 0x78 + 8030604: 4993 ldr r1, [pc, #588] ; (8030854 ) + 8030606: 4313 orrs r3, r2 + 8030608: 654b str r3, [r1, #84] ; 0x54 + 803060a: e001 b.n 8030610 } else { /* set overall return value */ status = ret; - 80305dc: 7dfb ldrb r3, [r7, #23] - 80305de: 75bb strb r3, [r7, #22] + 803060c: 7dfb ldrb r3, [r7, #23] + 803060e: 75bb strb r3, [r7, #22] } } /*-------------------------- USART2/3/4/5/7/8 Configuration --------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART234578) == RCC_PERIPHCLK_USART234578) - 80305e0: 687b ldr r3, [r7, #4] - 80305e2: 681b ldr r3, [r3, #0] - 80305e4: f003 0302 and.w r3, r3, #2 - 80305e8: 2b00 cmp r3, #0 - 80305ea: d038 beq.n 803065e + 8030610: 687b ldr r3, [r7, #4] + 8030612: 681b ldr r3, [r3, #0] + 8030614: f003 0302 and.w r3, r3, #2 + 8030618: 2b00 cmp r3, #0 + 803061a: d038 beq.n 803068e { switch(PeriphClkInit->Usart234578ClockSelection) - 80305ec: 687b ldr r3, [r7, #4] - 80305ee: 6f5b ldr r3, [r3, #116] ; 0x74 - 80305f0: 2b05 cmp r3, #5 - 80305f2: d821 bhi.n 8030638 - 80305f4: a201 add r2, pc, #4 ; (adr r2, 80305fc ) - 80305f6: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80305fa: bf00 nop - 80305fc: 0803063f .word 0x0803063f - 8030600: 08030615 .word 0x08030615 - 8030604: 08030627 .word 0x08030627 - 8030608: 0803063f .word 0x0803063f - 803060c: 0803063f .word 0x0803063f - 8030610: 0803063f .word 0x0803063f + 803061c: 687b ldr r3, [r7, #4] + 803061e: 6f5b ldr r3, [r3, #116] ; 0x74 + 8030620: 2b05 cmp r3, #5 + 8030622: d821 bhi.n 8030668 + 8030624: a201 add r2, pc, #4 ; (adr r2, 803062c ) + 8030626: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 803062a: bf00 nop + 803062c: 0803066f .word 0x0803066f + 8030630: 08030645 .word 0x08030645 + 8030634: 08030657 .word 0x08030657 + 8030638: 0803066f .word 0x0803066f + 803063c: 0803066f .word 0x0803066f + 8030640: 0803066f .word 0x0803066f case RCC_USART234578CLKSOURCE_PCLK1: /* CD/D2 PCLK1 as clock source for USART2/3/4/5/7/8 */ /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */ break; case RCC_USART234578CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART2/3/4/5/7/8 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 8030614: 687b ldr r3, [r7, #4] - 8030616: 3304 adds r3, #4 - 8030618: 2101 movs r1, #1 - 803061a: 4618 mov r0, r3 - 803061c: f001 fbd8 bl 8031dd0 - 8030620: 4603 mov r3, r0 - 8030622: 75fb strb r3, [r7, #23] + 8030644: 687b ldr r3, [r7, #4] + 8030646: 3304 adds r3, #4 + 8030648: 2101 movs r1, #1 + 803064a: 4618 mov r0, r3 + 803064c: f001 fbd8 bl 8031e00 + 8030650: 4603 mov r3, r0 + 8030652: 75fb strb r3, [r7, #23] /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */ break; - 8030624: e00c b.n 8030640 + 8030654: e00c b.n 8030670 case RCC_USART234578CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART2/3/4/5/7/8 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 8030626: 687b ldr r3, [r7, #4] - 8030628: 3324 adds r3, #36 ; 0x24 - 803062a: 2101 movs r1, #1 - 803062c: 4618 mov r0, r3 - 803062e: f001 fc81 bl 8031f34 - 8030632: 4603 mov r3, r0 - 8030634: 75fb strb r3, [r7, #23] + 8030656: 687b ldr r3, [r7, #4] + 8030658: 3324 adds r3, #36 ; 0x24 + 803065a: 2101 movs r1, #1 + 803065c: 4618 mov r0, r3 + 803065e: f001 fc81 bl 8031f64 + 8030662: 4603 mov r3, r0 + 8030664: 75fb strb r3, [r7, #23] /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */ break; - 8030636: e003 b.n 8030640 + 8030666: e003 b.n 8030670 /* LSE, oscillator is used as source of USART2/3/4/5/7/8 clock */ /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030638: 2301 movs r3, #1 - 803063a: 75fb strb r3, [r7, #23] + 8030668: 2301 movs r3, #1 + 803066a: 75fb strb r3, [r7, #23] break; - 803063c: e000 b.n 8030640 + 803066c: e000 b.n 8030670 break; - 803063e: bf00 nop + 803066e: bf00 nop } if(ret == HAL_OK) - 8030640: 7dfb ldrb r3, [r7, #23] - 8030642: 2b00 cmp r3, #0 - 8030644: d109 bne.n 803065a + 8030670: 7dfb ldrb r3, [r7, #23] + 8030672: 2b00 cmp r3, #0 + 8030674: d109 bne.n 803068a { /* Set the source of USART2/3/4/5/7/8 clock */ __HAL_RCC_USART234578_CONFIG(PeriphClkInit->Usart234578ClockSelection); - 8030646: 4b77 ldr r3, [pc, #476] ; (8030824 ) - 8030648: 6d5b ldr r3, [r3, #84] ; 0x54 - 803064a: f023 0207 bic.w r2, r3, #7 - 803064e: 687b ldr r3, [r7, #4] - 8030650: 6f5b ldr r3, [r3, #116] ; 0x74 - 8030652: 4974 ldr r1, [pc, #464] ; (8030824 ) - 8030654: 4313 orrs r3, r2 - 8030656: 654b str r3, [r1, #84] ; 0x54 - 8030658: e001 b.n 803065e + 8030676: 4b77 ldr r3, [pc, #476] ; (8030854 ) + 8030678: 6d5b ldr r3, [r3, #84] ; 0x54 + 803067a: f023 0207 bic.w r2, r3, #7 + 803067e: 687b ldr r3, [r7, #4] + 8030680: 6f5b ldr r3, [r3, #116] ; 0x74 + 8030682: 4974 ldr r1, [pc, #464] ; (8030854 ) + 8030684: 4313 orrs r3, r2 + 8030686: 654b str r3, [r1, #84] ; 0x54 + 8030688: e001 b.n 803068e } else { /* set overall return value */ status = ret; - 803065a: 7dfb ldrb r3, [r7, #23] - 803065c: 75bb strb r3, [r7, #22] + 803068a: 7dfb ldrb r3, [r7, #23] + 803068c: 75bb strb r3, [r7, #22] } } /*-------------------------- LPUART1 Configuration -------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) - 803065e: 687b ldr r3, [r7, #4] - 8030660: 681b ldr r3, [r3, #0] - 8030662: f003 0304 and.w r3, r3, #4 - 8030666: 2b00 cmp r3, #0 - 8030668: d03a beq.n 80306e0 + 803068e: 687b ldr r3, [r7, #4] + 8030690: 681b ldr r3, [r3, #0] + 8030692: f003 0304 and.w r3, r3, #4 + 8030696: 2b00 cmp r3, #0 + 8030698: d03a beq.n 8030710 { switch(PeriphClkInit->Lpuart1ClockSelection) - 803066a: 687b ldr r3, [r7, #4] - 803066c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8030670: 2b05 cmp r3, #5 - 8030672: d821 bhi.n 80306b8 - 8030674: a201 add r2, pc, #4 ; (adr r2, 803067c ) - 8030676: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 803067a: bf00 nop - 803067c: 080306bf .word 0x080306bf - 8030680: 08030695 .word 0x08030695 - 8030684: 080306a7 .word 0x080306a7 - 8030688: 080306bf .word 0x080306bf - 803068c: 080306bf .word 0x080306bf - 8030690: 080306bf .word 0x080306bf + 803069a: 687b ldr r3, [r7, #4] + 803069c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80306a0: 2b05 cmp r3, #5 + 80306a2: d821 bhi.n 80306e8 + 80306a4: a201 add r2, pc, #4 ; (adr r2, 80306ac ) + 80306a6: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80306aa: bf00 nop + 80306ac: 080306ef .word 0x080306ef + 80306b0: 080306c5 .word 0x080306c5 + 80306b4: 080306d7 .word 0x080306d7 + 80306b8: 080306ef .word 0x080306ef + 80306bc: 080306ef .word 0x080306ef + 80306c0: 080306ef .word 0x080306ef case RCC_LPUART1CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPUART1 */ /* LPUART1 clock source configuration done later after clock selection check */ break; case RCC_LPUART1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPUART1 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 8030694: 687b ldr r3, [r7, #4] - 8030696: 3304 adds r3, #4 - 8030698: 2101 movs r1, #1 - 803069a: 4618 mov r0, r3 - 803069c: f001 fb98 bl 8031dd0 - 80306a0: 4603 mov r3, r0 - 80306a2: 75fb strb r3, [r7, #23] + 80306c4: 687b ldr r3, [r7, #4] + 80306c6: 3304 adds r3, #4 + 80306c8: 2101 movs r1, #1 + 80306ca: 4618 mov r0, r3 + 80306cc: f001 fb98 bl 8031e00 + 80306d0: 4603 mov r3, r0 + 80306d2: 75fb strb r3, [r7, #23] /* LPUART1 clock source configuration done later after clock selection check */ break; - 80306a4: e00c b.n 80306c0 + 80306d4: e00c b.n 80306f0 case RCC_LPUART1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPUART1 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 80306a6: 687b ldr r3, [r7, #4] - 80306a8: 3324 adds r3, #36 ; 0x24 - 80306aa: 2101 movs r1, #1 - 80306ac: 4618 mov r0, r3 - 80306ae: f001 fc41 bl 8031f34 - 80306b2: 4603 mov r3, r0 - 80306b4: 75fb strb r3, [r7, #23] + 80306d6: 687b ldr r3, [r7, #4] + 80306d8: 3324 adds r3, #36 ; 0x24 + 80306da: 2101 movs r1, #1 + 80306dc: 4618 mov r0, r3 + 80306de: f001 fc41 bl 8031f64 + 80306e2: 4603 mov r3, r0 + 80306e4: 75fb strb r3, [r7, #23] /* LPUART1 clock source configuration done later after clock selection check */ break; - 80306b6: e003 b.n 80306c0 + 80306e6: e003 b.n 80306f0 /* LSE, oscillator is used as source of LPUART1 clock */ /* LPUART1 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 80306b8: 2301 movs r3, #1 - 80306ba: 75fb strb r3, [r7, #23] + 80306e8: 2301 movs r3, #1 + 80306ea: 75fb strb r3, [r7, #23] break; - 80306bc: e000 b.n 80306c0 + 80306ec: e000 b.n 80306f0 break; - 80306be: bf00 nop + 80306ee: bf00 nop } if(ret == HAL_OK) - 80306c0: 7dfb ldrb r3, [r7, #23] - 80306c2: 2b00 cmp r3, #0 - 80306c4: d10a bne.n 80306dc + 80306f0: 7dfb ldrb r3, [r7, #23] + 80306f2: 2b00 cmp r3, #0 + 80306f4: d10a bne.n 803070c { /* Set the source of LPUART1 clock */ __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection); - 80306c6: 4b57 ldr r3, [pc, #348] ; (8030824 ) - 80306c8: 6d9b ldr r3, [r3, #88] ; 0x58 - 80306ca: f023 0207 bic.w r2, r3, #7 - 80306ce: 687b ldr r3, [r7, #4] - 80306d0: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 80306d4: 4953 ldr r1, [pc, #332] ; (8030824 ) - 80306d6: 4313 orrs r3, r2 - 80306d8: 658b str r3, [r1, #88] ; 0x58 - 80306da: e001 b.n 80306e0 + 80306f6: 4b57 ldr r3, [pc, #348] ; (8030854 ) + 80306f8: 6d9b ldr r3, [r3, #88] ; 0x58 + 80306fa: f023 0207 bic.w r2, r3, #7 + 80306fe: 687b ldr r3, [r7, #4] + 8030700: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8030704: 4953 ldr r1, [pc, #332] ; (8030854 ) + 8030706: 4313 orrs r3, r2 + 8030708: 658b str r3, [r1, #88] ; 0x58 + 803070a: e001 b.n 8030710 } else { /* set overall return value */ status = ret; - 80306dc: 7dfb ldrb r3, [r7, #23] - 80306de: 75bb strb r3, [r7, #22] + 803070c: 7dfb ldrb r3, [r7, #23] + 803070e: 75bb strb r3, [r7, #22] } } /*---------------------------- LPTIM1 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) - 80306e0: 687b ldr r3, [r7, #4] - 80306e2: 681b ldr r3, [r3, #0] - 80306e4: f003 0320 and.w r3, r3, #32 - 80306e8: 2b00 cmp r3, #0 - 80306ea: d04b beq.n 8030784 + 8030710: 687b ldr r3, [r7, #4] + 8030712: 681b ldr r3, [r3, #0] + 8030714: f003 0320 and.w r3, r3, #32 + 8030718: 2b00 cmp r3, #0 + 803071a: d04b beq.n 80307b4 { switch(PeriphClkInit->Lptim1ClockSelection) - 80306ec: 687b ldr r3, [r7, #4] - 80306ee: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 80306f2: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80306f6: d02e beq.n 8030756 - 80306f8: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80306fc: d828 bhi.n 8030750 - 80306fe: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8030702: d02a beq.n 803075a - 8030704: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8030708: d822 bhi.n 8030750 - 803070a: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 803070e: d026 beq.n 803075e - 8030710: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 8030714: d81c bhi.n 8030750 - 8030716: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 803071a: d010 beq.n 803073e - 803071c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030720: d816 bhi.n 8030750 - 8030722: 2b00 cmp r3, #0 - 8030724: d01d beq.n 8030762 - 8030726: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 803072a: d111 bne.n 8030750 + 803071c: 687b ldr r3, [r7, #4] + 803071e: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8030722: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 8030726: d02e beq.n 8030786 + 8030728: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 803072c: d828 bhi.n 8030780 + 803072e: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8030732: d02a beq.n 803078a + 8030734: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8030738: d822 bhi.n 8030780 + 803073a: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 803073e: d026 beq.n 803078e + 8030740: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 8030744: d81c bhi.n 8030780 + 8030746: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803074a: d010 beq.n 803076e + 803074c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030750: d816 bhi.n 8030780 + 8030752: 2b00 cmp r3, #0 + 8030754: d01d beq.n 8030792 + 8030756: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 803075a: d111 bne.n 8030780 /* LPTIM1 clock source configuration done later after clock selection check */ break; case RCC_LPTIM1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM1*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 803072c: 687b ldr r3, [r7, #4] - 803072e: 3304 adds r3, #4 - 8030730: 2100 movs r1, #0 - 8030732: 4618 mov r0, r3 - 8030734: f001 fb4c bl 8031dd0 - 8030738: 4603 mov r3, r0 - 803073a: 75fb strb r3, [r7, #23] + 803075c: 687b ldr r3, [r7, #4] + 803075e: 3304 adds r3, #4 + 8030760: 2100 movs r1, #0 + 8030762: 4618 mov r0, r3 + 8030764: f001 fb4c bl 8031e00 + 8030768: 4603 mov r3, r0 + 803076a: 75fb strb r3, [r7, #23] /* LPTIM1 clock source configuration done later after clock selection check */ break; - 803073c: e012 b.n 8030764 + 803076c: e012 b.n 8030794 case RCC_LPTIM1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM1*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 803073e: 687b ldr r3, [r7, #4] - 8030740: 3324 adds r3, #36 ; 0x24 - 8030742: 2102 movs r1, #2 - 8030744: 4618 mov r0, r3 - 8030746: f001 fbf5 bl 8031f34 - 803074a: 4603 mov r3, r0 - 803074c: 75fb strb r3, [r7, #23] + 803076e: 687b ldr r3, [r7, #4] + 8030770: 3324 adds r3, #36 ; 0x24 + 8030772: 2102 movs r1, #2 + 8030774: 4618 mov r0, r3 + 8030776: f001 fbf5 bl 8031f64 + 803077a: 4603 mov r3, r0 + 803077c: 75fb strb r3, [r7, #23] /* LPTIM1 clock source configuration done later after clock selection check */ break; - 803074e: e009 b.n 8030764 + 803077e: e009 b.n 8030794 /* HSI, HSE, or CSI oscillator is used as source of LPTIM1 clock */ /* LPTIM1 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030750: 2301 movs r3, #1 - 8030752: 75fb strb r3, [r7, #23] + 8030780: 2301 movs r3, #1 + 8030782: 75fb strb r3, [r7, #23] break; - 8030754: e006 b.n 8030764 + 8030784: e006 b.n 8030794 break; - 8030756: bf00 nop - 8030758: e004 b.n 8030764 + 8030786: bf00 nop + 8030788: e004 b.n 8030794 break; - 803075a: bf00 nop - 803075c: e002 b.n 8030764 + 803078a: bf00 nop + 803078c: e002 b.n 8030794 break; - 803075e: bf00 nop - 8030760: e000 b.n 8030764 + 803078e: bf00 nop + 8030790: e000 b.n 8030794 break; - 8030762: bf00 nop + 8030792: bf00 nop } if(ret == HAL_OK) - 8030764: 7dfb ldrb r3, [r7, #23] - 8030766: 2b00 cmp r3, #0 - 8030768: d10a bne.n 8030780 + 8030794: 7dfb ldrb r3, [r7, #23] + 8030796: 2b00 cmp r3, #0 + 8030798: d10a bne.n 80307b0 { /* Set the source of LPTIM1 clock*/ __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection); - 803076a: 4b2e ldr r3, [pc, #184] ; (8030824 ) - 803076c: 6d5b ldr r3, [r3, #84] ; 0x54 - 803076e: f023 42e0 bic.w r2, r3, #1879048192 ; 0x70000000 - 8030772: 687b ldr r3, [r7, #4] - 8030774: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8030778: 492a ldr r1, [pc, #168] ; (8030824 ) - 803077a: 4313 orrs r3, r2 - 803077c: 654b str r3, [r1, #84] ; 0x54 - 803077e: e001 b.n 8030784 + 803079a: 4b2e ldr r3, [pc, #184] ; (8030854 ) + 803079c: 6d5b ldr r3, [r3, #84] ; 0x54 + 803079e: f023 42e0 bic.w r2, r3, #1879048192 ; 0x70000000 + 80307a2: 687b ldr r3, [r7, #4] + 80307a4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 80307a8: 492a ldr r1, [pc, #168] ; (8030854 ) + 80307aa: 4313 orrs r3, r2 + 80307ac: 654b str r3, [r1, #84] ; 0x54 + 80307ae: e001 b.n 80307b4 } else { /* set overall return value */ status = ret; - 8030780: 7dfb ldrb r3, [r7, #23] - 8030782: 75bb strb r3, [r7, #22] + 80307b0: 7dfb ldrb r3, [r7, #23] + 80307b2: 75bb strb r3, [r7, #22] } } /*---------------------------- LPTIM2 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) - 8030784: 687b ldr r3, [r7, #4] - 8030786: 681b ldr r3, [r3, #0] - 8030788: f003 0340 and.w r3, r3, #64 ; 0x40 - 803078c: 2b00 cmp r3, #0 - 803078e: d04d beq.n 803082c + 80307b4: 687b ldr r3, [r7, #4] + 80307b6: 681b ldr r3, [r3, #0] + 80307b8: f003 0340 and.w r3, r3, #64 ; 0x40 + 80307bc: 2b00 cmp r3, #0 + 80307be: d04d beq.n 803085c { switch(PeriphClkInit->Lptim2ClockSelection) - 8030790: 687b ldr r3, [r7, #4] - 8030792: f8d3 3098 ldr.w r3, [r3, #152] ; 0x98 - 8030796: f5b3 5fa0 cmp.w r3, #5120 ; 0x1400 - 803079a: d02e beq.n 80307fa - 803079c: f5b3 5fa0 cmp.w r3, #5120 ; 0x1400 - 80307a0: d828 bhi.n 80307f4 - 80307a2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80307a6: d02a beq.n 80307fe - 80307a8: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80307ac: d822 bhi.n 80307f4 - 80307ae: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 - 80307b2: d026 beq.n 8030802 - 80307b4: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 - 80307b8: d81c bhi.n 80307f4 - 80307ba: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 80307be: d010 beq.n 80307e2 - 80307c0: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 80307c4: d816 bhi.n 80307f4 - 80307c6: 2b00 cmp r3, #0 - 80307c8: d01d beq.n 8030806 - 80307ca: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 80307ce: d111 bne.n 80307f4 + 80307c0: 687b ldr r3, [r7, #4] + 80307c2: f8d3 3098 ldr.w r3, [r3, #152] ; 0x98 + 80307c6: f5b3 5fa0 cmp.w r3, #5120 ; 0x1400 + 80307ca: d02e beq.n 803082a + 80307cc: f5b3 5fa0 cmp.w r3, #5120 ; 0x1400 + 80307d0: d828 bhi.n 8030824 + 80307d2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80307d6: d02a beq.n 803082e + 80307d8: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80307dc: d822 bhi.n 8030824 + 80307de: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 + 80307e2: d026 beq.n 8030832 + 80307e4: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 + 80307e8: d81c bhi.n 8030824 + 80307ea: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 80307ee: d010 beq.n 8030812 + 80307f0: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 80307f4: d816 bhi.n 8030824 + 80307f6: 2b00 cmp r3, #0 + 80307f8: d01d beq.n 8030836 + 80307fa: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 80307fe: d111 bne.n 8030824 /* LPTIM2 clock source configuration done later after clock selection check */ break; case RCC_LPTIM2CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM2*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 80307d0: 687b ldr r3, [r7, #4] - 80307d2: 3304 adds r3, #4 - 80307d4: 2100 movs r1, #0 - 80307d6: 4618 mov r0, r3 - 80307d8: f001 fafa bl 8031dd0 - 80307dc: 4603 mov r3, r0 - 80307de: 75fb strb r3, [r7, #23] + 8030800: 687b ldr r3, [r7, #4] + 8030802: 3304 adds r3, #4 + 8030804: 2100 movs r1, #0 + 8030806: 4618 mov r0, r3 + 8030808: f001 fafa bl 8031e00 + 803080c: 4603 mov r3, r0 + 803080e: 75fb strb r3, [r7, #23] /* LPTIM2 clock source configuration done later after clock selection check */ break; - 80307e0: e012 b.n 8030808 + 8030810: e012 b.n 8030838 case RCC_LPTIM2CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM2*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 80307e2: 687b ldr r3, [r7, #4] - 80307e4: 3324 adds r3, #36 ; 0x24 - 80307e6: 2102 movs r1, #2 - 80307e8: 4618 mov r0, r3 - 80307ea: f001 fba3 bl 8031f34 - 80307ee: 4603 mov r3, r0 - 80307f0: 75fb strb r3, [r7, #23] + 8030812: 687b ldr r3, [r7, #4] + 8030814: 3324 adds r3, #36 ; 0x24 + 8030816: 2102 movs r1, #2 + 8030818: 4618 mov r0, r3 + 803081a: f001 fba3 bl 8031f64 + 803081e: 4603 mov r3, r0 + 8030820: 75fb strb r3, [r7, #23] /* LPTIM2 clock source configuration done later after clock selection check */ break; - 80307f2: e009 b.n 8030808 + 8030822: e009 b.n 8030838 /* HSI, HSE, or CSI oscillator is used as source of LPTIM2 clock */ /* LPTIM2 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 80307f4: 2301 movs r3, #1 - 80307f6: 75fb strb r3, [r7, #23] + 8030824: 2301 movs r3, #1 + 8030826: 75fb strb r3, [r7, #23] break; - 80307f8: e006 b.n 8030808 + 8030828: e006 b.n 8030838 break; - 80307fa: bf00 nop - 80307fc: e004 b.n 8030808 + 803082a: bf00 nop + 803082c: e004 b.n 8030838 break; - 80307fe: bf00 nop - 8030800: e002 b.n 8030808 + 803082e: bf00 nop + 8030830: e002 b.n 8030838 break; - 8030802: bf00 nop - 8030804: e000 b.n 8030808 + 8030832: bf00 nop + 8030834: e000 b.n 8030838 break; - 8030806: bf00 nop + 8030836: bf00 nop } if(ret == HAL_OK) - 8030808: 7dfb ldrb r3, [r7, #23] - 803080a: 2b00 cmp r3, #0 - 803080c: d10c bne.n 8030828 + 8030838: 7dfb ldrb r3, [r7, #23] + 803083a: 2b00 cmp r3, #0 + 803083c: d10c bne.n 8030858 { /* Set the source of LPTIM2 clock*/ __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection); - 803080e: 4b05 ldr r3, [pc, #20] ; (8030824 ) - 8030810: 6d9b ldr r3, [r3, #88] ; 0x58 - 8030812: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 - 8030816: 687b ldr r3, [r7, #4] - 8030818: f8d3 3098 ldr.w r3, [r3, #152] ; 0x98 - 803081c: 4901 ldr r1, [pc, #4] ; (8030824 ) - 803081e: 4313 orrs r3, r2 - 8030820: 658b str r3, [r1, #88] ; 0x58 - 8030822: e003 b.n 803082c - 8030824: 58024400 .word 0x58024400 + 803083e: 4b05 ldr r3, [pc, #20] ; (8030854 ) + 8030840: 6d9b ldr r3, [r3, #88] ; 0x58 + 8030842: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 + 8030846: 687b ldr r3, [r7, #4] + 8030848: f8d3 3098 ldr.w r3, [r3, #152] ; 0x98 + 803084c: 4901 ldr r1, [pc, #4] ; (8030854 ) + 803084e: 4313 orrs r3, r2 + 8030850: 658b str r3, [r1, #88] ; 0x58 + 8030852: e003 b.n 803085c + 8030854: 58024400 .word 0x58024400 } else { /* set overall return value */ status = ret; - 8030828: 7dfb ldrb r3, [r7, #23] - 803082a: 75bb strb r3, [r7, #22] + 8030858: 7dfb ldrb r3, [r7, #23] + 803085a: 75bb strb r3, [r7, #22] } } /*---------------------------- LPTIM345 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM345) == RCC_PERIPHCLK_LPTIM345) - 803082c: 687b ldr r3, [r7, #4] - 803082e: 681b ldr r3, [r3, #0] - 8030830: f003 0380 and.w r3, r3, #128 ; 0x80 - 8030834: 2b00 cmp r3, #0 - 8030836: d04b beq.n 80308d0 + 803085c: 687b ldr r3, [r7, #4] + 803085e: 681b ldr r3, [r3, #0] + 8030860: f003 0380 and.w r3, r3, #128 ; 0x80 + 8030864: 2b00 cmp r3, #0 + 8030866: d04b beq.n 8030900 { switch(PeriphClkInit->Lptim345ClockSelection) - 8030838: 687b ldr r3, [r7, #4] - 803083a: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 803083e: f5b3 4f20 cmp.w r3, #40960 ; 0xa000 - 8030842: d02e beq.n 80308a2 - 8030844: f5b3 4f20 cmp.w r3, #40960 ; 0xa000 - 8030848: d828 bhi.n 803089c - 803084a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 803084e: d02a beq.n 80308a6 - 8030850: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8030854: d822 bhi.n 803089c - 8030856: f5b3 4fc0 cmp.w r3, #24576 ; 0x6000 - 803085a: d026 beq.n 80308aa - 803085c: f5b3 4fc0 cmp.w r3, #24576 ; 0x6000 - 8030860: d81c bhi.n 803089c - 8030862: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8030866: d010 beq.n 803088a - 8030868: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 803086c: d816 bhi.n 803089c - 803086e: 2b00 cmp r3, #0 - 8030870: d01d beq.n 80308ae - 8030872: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8030876: d111 bne.n 803089c + 8030868: 687b ldr r3, [r7, #4] + 803086a: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 803086e: f5b3 4f20 cmp.w r3, #40960 ; 0xa000 + 8030872: d02e beq.n 80308d2 + 8030874: f5b3 4f20 cmp.w r3, #40960 ; 0xa000 + 8030878: d828 bhi.n 80308cc + 803087a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 803087e: d02a beq.n 80308d6 + 8030880: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 8030884: d822 bhi.n 80308cc + 8030886: f5b3 4fc0 cmp.w r3, #24576 ; 0x6000 + 803088a: d026 beq.n 80308da + 803088c: f5b3 4fc0 cmp.w r3, #24576 ; 0x6000 + 8030890: d81c bhi.n 80308cc + 8030892: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8030896: d010 beq.n 80308ba + 8030898: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 803089c: d816 bhi.n 80308cc + 803089e: 2b00 cmp r3, #0 + 80308a0: d01d beq.n 80308de + 80308a2: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 80308a6: d111 bne.n 80308cc case RCC_LPTIM345CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPTIM3/4/5 */ /* LPTIM3/4/5 clock source configuration done later after clock selection check */ break; case RCC_LPTIM345CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM3/4/5 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 8030878: 687b ldr r3, [r7, #4] - 803087a: 3304 adds r3, #4 - 803087c: 2100 movs r1, #0 - 803087e: 4618 mov r0, r3 - 8030880: f001 faa6 bl 8031dd0 - 8030884: 4603 mov r3, r0 - 8030886: 75fb strb r3, [r7, #23] + 80308a8: 687b ldr r3, [r7, #4] + 80308aa: 3304 adds r3, #4 + 80308ac: 2100 movs r1, #0 + 80308ae: 4618 mov r0, r3 + 80308b0: f001 faa6 bl 8031e00 + 80308b4: 4603 mov r3, r0 + 80308b6: 75fb strb r3, [r7, #23] /* LPTIM3/4/5 clock source configuration done later after clock selection check */ break; - 8030888: e012 b.n 80308b0 + 80308b8: e012 b.n 80308e0 case RCC_LPTIM345CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM3/4/5 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 803088a: 687b ldr r3, [r7, #4] - 803088c: 3324 adds r3, #36 ; 0x24 - 803088e: 2102 movs r1, #2 - 8030890: 4618 mov r0, r3 - 8030892: f001 fb4f bl 8031f34 - 8030896: 4603 mov r3, r0 - 8030898: 75fb strb r3, [r7, #23] + 80308ba: 687b ldr r3, [r7, #4] + 80308bc: 3324 adds r3, #36 ; 0x24 + 80308be: 2102 movs r1, #2 + 80308c0: 4618 mov r0, r3 + 80308c2: f001 fb4f bl 8031f64 + 80308c6: 4603 mov r3, r0 + 80308c8: 75fb strb r3, [r7, #23] /* LPTIM3/4/5 clock source configuration done later after clock selection check */ break; - 803089a: e009 b.n 80308b0 + 80308ca: e009 b.n 80308e0 /* HSI, HSE, or CSI oscillator is used as source of LPTIM3/4/5 clock */ /* LPTIM3/4/5 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 803089c: 2301 movs r3, #1 - 803089e: 75fb strb r3, [r7, #23] + 80308cc: 2301 movs r3, #1 + 80308ce: 75fb strb r3, [r7, #23] break; - 80308a0: e006 b.n 80308b0 + 80308d0: e006 b.n 80308e0 break; - 80308a2: bf00 nop - 80308a4: e004 b.n 80308b0 + 80308d2: bf00 nop + 80308d4: e004 b.n 80308e0 break; - 80308a6: bf00 nop - 80308a8: e002 b.n 80308b0 + 80308d6: bf00 nop + 80308d8: e002 b.n 80308e0 break; - 80308aa: bf00 nop - 80308ac: e000 b.n 80308b0 + 80308da: bf00 nop + 80308dc: e000 b.n 80308e0 break; - 80308ae: bf00 nop + 80308de: bf00 nop } if(ret == HAL_OK) - 80308b0: 7dfb ldrb r3, [r7, #23] - 80308b2: 2b00 cmp r3, #0 - 80308b4: d10a bne.n 80308cc + 80308e0: 7dfb ldrb r3, [r7, #23] + 80308e2: 2b00 cmp r3, #0 + 80308e4: d10a bne.n 80308fc { /* Set the source of LPTIM3/4/5 clock */ __HAL_RCC_LPTIM345_CONFIG(PeriphClkInit->Lptim345ClockSelection); - 80308b6: 4b9d ldr r3, [pc, #628] ; (8030b2c ) - 80308b8: 6d9b ldr r3, [r3, #88] ; 0x58 - 80308ba: f423 4260 bic.w r2, r3, #57344 ; 0xe000 - 80308be: 687b ldr r3, [r7, #4] - 80308c0: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 80308c4: 4999 ldr r1, [pc, #612] ; (8030b2c ) - 80308c6: 4313 orrs r3, r2 - 80308c8: 658b str r3, [r1, #88] ; 0x58 - 80308ca: e001 b.n 80308d0 + 80308e6: 4b9d ldr r3, [pc, #628] ; (8030b5c ) + 80308e8: 6d9b ldr r3, [r3, #88] ; 0x58 + 80308ea: f423 4260 bic.w r2, r3, #57344 ; 0xe000 + 80308ee: 687b ldr r3, [r7, #4] + 80308f0: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 80308f4: 4999 ldr r1, [pc, #612] ; (8030b5c ) + 80308f6: 4313 orrs r3, r2 + 80308f8: 658b str r3, [r1, #88] ; 0x58 + 80308fa: e001 b.n 8030900 } else { /* set overall return value */ status = ret; - 80308cc: 7dfb ldrb r3, [r7, #23] - 80308ce: 75bb strb r3, [r7, #22] + 80308fc: 7dfb ldrb r3, [r7, #23] + 80308fe: 75bb strb r3, [r7, #22] __HAL_RCC_I2C1235_CONFIG(PeriphClkInit->I2c1235ClockSelection); } #else if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C123) == RCC_PERIPHCLK_I2C123) - 80308d0: 687b ldr r3, [r7, #4] - 80308d2: 681b ldr r3, [r3, #0] - 80308d4: f003 0308 and.w r3, r3, #8 - 80308d8: 2b00 cmp r3, #0 - 80308da: d01a beq.n 8030912 + 8030900: 687b ldr r3, [r7, #4] + 8030902: 681b ldr r3, [r3, #0] + 8030904: f003 0308 and.w r3, r3, #8 + 8030908: 2b00 cmp r3, #0 + 803090a: d01a beq.n 8030942 { /* Check the parameters */ assert_param(IS_RCC_I2C123CLKSOURCE(PeriphClkInit->I2c123ClockSelection)); if ((PeriphClkInit->I2c123ClockSelection )== RCC_I2C123CLKSOURCE_PLL3 ) - 80308dc: 687b ldr r3, [r7, #4] - 80308de: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 80308e2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80308e6: d10a bne.n 80308fe + 803090c: 687b ldr r3, [r7, #4] + 803090e: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 8030912: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8030916: d10a bne.n 803092e { if(RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE)!= HAL_OK) - 80308e8: 687b ldr r3, [r7, #4] - 80308ea: 3324 adds r3, #36 ; 0x24 - 80308ec: 2102 movs r1, #2 - 80308ee: 4618 mov r0, r3 - 80308f0: f001 fb20 bl 8031f34 - 80308f4: 4603 mov r3, r0 - 80308f6: 2b00 cmp r3, #0 - 80308f8: d001 beq.n 80308fe + 8030918: 687b ldr r3, [r7, #4] + 803091a: 3324 adds r3, #36 ; 0x24 + 803091c: 2102 movs r1, #2 + 803091e: 4618 mov r0, r3 + 8030920: f001 fb20 bl 8031f64 + 8030924: 4603 mov r3, r0 + 8030926: 2b00 cmp r3, #0 + 8030928: d001 beq.n 803092e { status = HAL_ERROR; - 80308fa: 2301 movs r3, #1 - 80308fc: 75bb strb r3, [r7, #22] + 803092a: 2301 movs r3, #1 + 803092c: 75bb strb r3, [r7, #22] } } __HAL_RCC_I2C123_CONFIG(PeriphClkInit->I2c123ClockSelection); - 80308fe: 4b8b ldr r3, [pc, #556] ; (8030b2c ) - 8030900: 6d5b ldr r3, [r3, #84] ; 0x54 - 8030902: f423 5240 bic.w r2, r3, #12288 ; 0x3000 - 8030906: 687b ldr r3, [r7, #4] - 8030908: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 803090c: 4987 ldr r1, [pc, #540] ; (8030b2c ) - 803090e: 4313 orrs r3, r2 - 8030910: 654b str r3, [r1, #84] ; 0x54 + 803092e: 4b8b ldr r3, [pc, #556] ; (8030b5c ) + 8030930: 6d5b ldr r3, [r3, #84] ; 0x54 + 8030932: f423 5240 bic.w r2, r3, #12288 ; 0x3000 + 8030936: 687b ldr r3, [r7, #4] + 8030938: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 803093c: 4987 ldr r1, [pc, #540] ; (8030b5c ) + 803093e: 4313 orrs r3, r2 + 8030940: 654b str r3, [r1, #84] ; 0x54 } #endif /* I2C5 */ /*------------------------------ I2C4 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) - 8030912: 687b ldr r3, [r7, #4] - 8030914: 681b ldr r3, [r3, #0] - 8030916: f003 0310 and.w r3, r3, #16 - 803091a: 2b00 cmp r3, #0 - 803091c: d01a beq.n 8030954 + 8030942: 687b ldr r3, [r7, #4] + 8030944: 681b ldr r3, [r3, #0] + 8030946: f003 0310 and.w r3, r3, #16 + 803094a: 2b00 cmp r3, #0 + 803094c: d01a beq.n 8030984 { /* Check the parameters */ assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection)); if ((PeriphClkInit->I2c4ClockSelection) == RCC_I2C4CLKSOURCE_PLL3 ) - 803091e: 687b ldr r3, [r7, #4] - 8030920: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 - 8030924: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030928: d10a bne.n 8030940 + 803094e: 687b ldr r3, [r7, #4] + 8030950: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 + 8030954: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030958: d10a bne.n 8030970 { if(RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE)!= HAL_OK) - 803092a: 687b ldr r3, [r7, #4] - 803092c: 3324 adds r3, #36 ; 0x24 - 803092e: 2102 movs r1, #2 - 8030930: 4618 mov r0, r3 - 8030932: f001 faff bl 8031f34 - 8030936: 4603 mov r3, r0 - 8030938: 2b00 cmp r3, #0 - 803093a: d001 beq.n 8030940 + 803095a: 687b ldr r3, [r7, #4] + 803095c: 3324 adds r3, #36 ; 0x24 + 803095e: 2102 movs r1, #2 + 8030960: 4618 mov r0, r3 + 8030962: f001 faff bl 8031f64 + 8030966: 4603 mov r3, r0 + 8030968: 2b00 cmp r3, #0 + 803096a: d001 beq.n 8030970 { status = HAL_ERROR; - 803093c: 2301 movs r3, #1 - 803093e: 75bb strb r3, [r7, #22] + 803096c: 2301 movs r3, #1 + 803096e: 75bb strb r3, [r7, #22] } } __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection); - 8030940: 4b7a ldr r3, [pc, #488] ; (8030b2c ) - 8030942: 6d9b ldr r3, [r3, #88] ; 0x58 - 8030944: f423 7240 bic.w r2, r3, #768 ; 0x300 - 8030948: 687b ldr r3, [r7, #4] - 803094a: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 - 803094e: 4977 ldr r1, [pc, #476] ; (8030b2c ) - 8030950: 4313 orrs r3, r2 - 8030952: 658b str r3, [r1, #88] ; 0x58 + 8030970: 4b7a ldr r3, [pc, #488] ; (8030b5c ) + 8030972: 6d9b ldr r3, [r3, #88] ; 0x58 + 8030974: f423 7240 bic.w r2, r3, #768 ; 0x300 + 8030978: 687b ldr r3, [r7, #4] + 803097a: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 + 803097e: 4977 ldr r1, [pc, #476] ; (8030b5c ) + 8030980: 4313 orrs r3, r2 + 8030982: 658b str r3, [r1, #88] ; 0x58 } /*---------------------------- ADC configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8030954: 687b ldr r3, [r7, #4] - 8030956: 681b ldr r3, [r3, #0] - 8030958: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 803095c: 2b00 cmp r3, #0 - 803095e: d034 beq.n 80309ca + 8030984: 687b ldr r3, [r7, #4] + 8030986: 681b ldr r3, [r3, #0] + 8030988: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 803098c: 2b00 cmp r3, #0 + 803098e: d034 beq.n 80309fa { switch(PeriphClkInit->AdcClockSelection) - 8030960: 687b ldr r3, [r7, #4] - 8030962: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 8030966: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 803096a: d01d beq.n 80309a8 - 803096c: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8030970: d817 bhi.n 80309a2 - 8030972: 2b00 cmp r3, #0 - 8030974: d003 beq.n 803097e - 8030976: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803097a: d009 beq.n 8030990 - 803097c: e011 b.n 80309a2 + 8030990: 687b ldr r3, [r7, #4] + 8030992: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 8030996: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 803099a: d01d beq.n 80309d8 + 803099c: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80309a0: d817 bhi.n 80309d2 + 80309a2: 2b00 cmp r3, #0 + 80309a4: d003 beq.n 80309ae + 80309a6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80309aa: d009 beq.n 80309c0 + 80309ac: e011 b.n 80309d2 { case RCC_ADCCLKSOURCE_PLL2: /* PLL2 is used as clock source for ADC*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 803097e: 687b ldr r3, [r7, #4] - 8030980: 3304 adds r3, #4 - 8030982: 2100 movs r1, #0 - 8030984: 4618 mov r0, r3 - 8030986: f001 fa23 bl 8031dd0 - 803098a: 4603 mov r3, r0 - 803098c: 75fb strb r3, [r7, #23] + 80309ae: 687b ldr r3, [r7, #4] + 80309b0: 3304 adds r3, #4 + 80309b2: 2100 movs r1, #0 + 80309b4: 4618 mov r0, r3 + 80309b6: f001 fa23 bl 8031e00 + 80309ba: 4603 mov r3, r0 + 80309bc: 75fb strb r3, [r7, #23] /* ADC clock source configuration done later after clock selection check */ break; - 803098e: e00c b.n 80309aa + 80309be: e00c b.n 80309da case RCC_ADCCLKSOURCE_PLL3: /* PLL3 is used as clock source for ADC*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 8030990: 687b ldr r3, [r7, #4] - 8030992: 3324 adds r3, #36 ; 0x24 - 8030994: 2102 movs r1, #2 - 8030996: 4618 mov r0, r3 - 8030998: f001 facc bl 8031f34 - 803099c: 4603 mov r3, r0 - 803099e: 75fb strb r3, [r7, #23] + 80309c0: 687b ldr r3, [r7, #4] + 80309c2: 3324 adds r3, #36 ; 0x24 + 80309c4: 2102 movs r1, #2 + 80309c6: 4618 mov r0, r3 + 80309c8: f001 facc bl 8031f64 + 80309cc: 4603 mov r3, r0 + 80309ce: 75fb strb r3, [r7, #23] /* ADC clock source configuration done later after clock selection check */ break; - 80309a0: e003 b.n 80309aa + 80309d0: e003 b.n 80309da /* HSI, HSE, or CSI oscillator is used as source of ADC clock */ /* ADC clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 80309a2: 2301 movs r3, #1 - 80309a4: 75fb strb r3, [r7, #23] + 80309d2: 2301 movs r3, #1 + 80309d4: 75fb strb r3, [r7, #23] break; - 80309a6: e000 b.n 80309aa + 80309d6: e000 b.n 80309da break; - 80309a8: bf00 nop + 80309d8: bf00 nop } if(ret == HAL_OK) - 80309aa: 7dfb ldrb r3, [r7, #23] - 80309ac: 2b00 cmp r3, #0 - 80309ae: d10a bne.n 80309c6 + 80309da: 7dfb ldrb r3, [r7, #23] + 80309dc: 2b00 cmp r3, #0 + 80309de: d10a bne.n 80309f6 { /* Set the source of ADC clock*/ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 80309b0: 4b5e ldr r3, [pc, #376] ; (8030b2c ) - 80309b2: 6d9b ldr r3, [r3, #88] ; 0x58 - 80309b4: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 80309b8: 687b ldr r3, [r7, #4] - 80309ba: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 80309be: 495b ldr r1, [pc, #364] ; (8030b2c ) - 80309c0: 4313 orrs r3, r2 - 80309c2: 658b str r3, [r1, #88] ; 0x58 - 80309c4: e001 b.n 80309ca + 80309e0: 4b5e ldr r3, [pc, #376] ; (8030b5c ) + 80309e2: 6d9b ldr r3, [r3, #88] ; 0x58 + 80309e4: f423 3240 bic.w r2, r3, #196608 ; 0x30000 + 80309e8: 687b ldr r3, [r7, #4] + 80309ea: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 80309ee: 495b ldr r1, [pc, #364] ; (8030b5c ) + 80309f0: 4313 orrs r3, r2 + 80309f2: 658b str r3, [r1, #88] ; 0x58 + 80309f4: e001 b.n 80309fa } else { /* set overall return value */ status = ret; - 80309c6: 7dfb ldrb r3, [r7, #23] - 80309c8: 75bb strb r3, [r7, #22] + 80309f6: 7dfb ldrb r3, [r7, #23] + 80309f8: 75bb strb r3, [r7, #22] } } /*------------------------------ USB Configuration -------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) - 80309ca: 687b ldr r3, [r7, #4] - 80309cc: 681b ldr r3, [r3, #0] - 80309ce: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 80309d2: 2b00 cmp r3, #0 - 80309d4: d033 beq.n 8030a3e + 80309fa: 687b ldr r3, [r7, #4] + 80309fc: 681b ldr r3, [r3, #0] + 80309fe: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 8030a02: 2b00 cmp r3, #0 + 8030a04: d033 beq.n 8030a6e { switch(PeriphClkInit->UsbClockSelection) - 80309d6: 687b ldr r3, [r7, #4] - 80309d8: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 80309dc: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 - 80309e0: d01c beq.n 8030a1c - 80309e2: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 - 80309e6: d816 bhi.n 8030a16 - 80309e8: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 80309ec: d003 beq.n 80309f6 - 80309ee: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 80309f2: d007 beq.n 8030a04 - 80309f4: e00f b.n 8030a16 + 8030a06: 687b ldr r3, [r7, #4] + 8030a08: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8030a0c: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 + 8030a10: d01c beq.n 8030a4c + 8030a12: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 + 8030a16: d816 bhi.n 8030a46 + 8030a18: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8030a1c: d003 beq.n 8030a26 + 8030a1e: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 8030a22: d007 beq.n 8030a34 + 8030a24: e00f b.n 8030a46 { case RCC_USBCLKSOURCE_PLL: /* PLL is used as clock source for USB*/ /* Enable USB Clock output generated form System USB . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 80309f6: 4b4d ldr r3, [pc, #308] ; (8030b2c ) - 80309f8: 6adb ldr r3, [r3, #44] ; 0x2c - 80309fa: 4a4c ldr r2, [pc, #304] ; (8030b2c ) - 80309fc: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030a00: 62d3 str r3, [r2, #44] ; 0x2c + 8030a26: 4b4d ldr r3, [pc, #308] ; (8030b5c ) + 8030a28: 6adb ldr r3, [r3, #44] ; 0x2c + 8030a2a: 4a4c ldr r2, [pc, #304] ; (8030b5c ) + 8030a2c: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030a30: 62d3 str r3, [r2, #44] ; 0x2c /* USB clock source configuration done later after clock selection check */ break; - 8030a02: e00c b.n 8030a1e + 8030a32: e00c b.n 8030a4e case RCC_USBCLKSOURCE_PLL3: /* PLL3 is used as clock source for USB*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 8030a04: 687b ldr r3, [r7, #4] - 8030a06: 3324 adds r3, #36 ; 0x24 - 8030a08: 2101 movs r1, #1 - 8030a0a: 4618 mov r0, r3 - 8030a0c: f001 fa92 bl 8031f34 - 8030a10: 4603 mov r3, r0 - 8030a12: 75fb strb r3, [r7, #23] + 8030a34: 687b ldr r3, [r7, #4] + 8030a36: 3324 adds r3, #36 ; 0x24 + 8030a38: 2101 movs r1, #1 + 8030a3a: 4618 mov r0, r3 + 8030a3c: f001 fa92 bl 8031f64 + 8030a40: 4603 mov r3, r0 + 8030a42: 75fb strb r3, [r7, #23] /* USB clock source configuration done later after clock selection check */ break; - 8030a14: e003 b.n 8030a1e + 8030a44: e003 b.n 8030a4e /* HSI48 oscillator is used as source of USB clock */ /* USB clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030a16: 2301 movs r3, #1 - 8030a18: 75fb strb r3, [r7, #23] + 8030a46: 2301 movs r3, #1 + 8030a48: 75fb strb r3, [r7, #23] break; - 8030a1a: e000 b.n 8030a1e + 8030a4a: e000 b.n 8030a4e break; - 8030a1c: bf00 nop + 8030a4c: bf00 nop } if(ret == HAL_OK) - 8030a1e: 7dfb ldrb r3, [r7, #23] - 8030a20: 2b00 cmp r3, #0 - 8030a22: d10a bne.n 8030a3a + 8030a4e: 7dfb ldrb r3, [r7, #23] + 8030a50: 2b00 cmp r3, #0 + 8030a52: d10a bne.n 8030a6a { /* Set the source of USB clock*/ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - 8030a24: 4b41 ldr r3, [pc, #260] ; (8030b2c ) - 8030a26: 6d5b ldr r3, [r3, #84] ; 0x54 - 8030a28: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 - 8030a2c: 687b ldr r3, [r7, #4] - 8030a2e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8030a32: 493e ldr r1, [pc, #248] ; (8030b2c ) - 8030a34: 4313 orrs r3, r2 - 8030a36: 654b str r3, [r1, #84] ; 0x54 - 8030a38: e001 b.n 8030a3e + 8030a54: 4b41 ldr r3, [pc, #260] ; (8030b5c ) + 8030a56: 6d5b ldr r3, [r3, #84] ; 0x54 + 8030a58: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 + 8030a5c: 687b ldr r3, [r7, #4] + 8030a5e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8030a62: 493e ldr r1, [pc, #248] ; (8030b5c ) + 8030a64: 4313 orrs r3, r2 + 8030a66: 654b str r3, [r1, #84] ; 0x54 + 8030a68: e001 b.n 8030a6e } else { /* set overall return value */ status = ret; - 8030a3a: 7dfb ldrb r3, [r7, #23] - 8030a3c: 75bb strb r3, [r7, #22] + 8030a6a: 7dfb ldrb r3, [r7, #23] + 8030a6c: 75bb strb r3, [r7, #22] } } /*------------------------------------- SDMMC Configuration ------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC) == RCC_PERIPHCLK_SDMMC) - 8030a3e: 687b ldr r3, [r7, #4] - 8030a40: 681b ldr r3, [r3, #0] - 8030a42: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8030a46: 2b00 cmp r3, #0 - 8030a48: d029 beq.n 8030a9e + 8030a6e: 687b ldr r3, [r7, #4] + 8030a70: 681b ldr r3, [r3, #0] + 8030a72: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8030a76: 2b00 cmp r3, #0 + 8030a78: d029 beq.n 8030ace { /* Check the parameters */ assert_param(IS_RCC_SDMMC(PeriphClkInit->SdmmcClockSelection)); switch(PeriphClkInit->SdmmcClockSelection) - 8030a4a: 687b ldr r3, [r7, #4] - 8030a4c: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030a4e: 2b00 cmp r3, #0 - 8030a50: d003 beq.n 8030a5a - 8030a52: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8030a56: d007 beq.n 8030a68 - 8030a58: e00f b.n 8030a7a + 8030a7a: 687b ldr r3, [r7, #4] + 8030a7c: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030a7e: 2b00 cmp r3, #0 + 8030a80: d003 beq.n 8030a8a + 8030a82: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8030a86: d007 beq.n 8030a98 + 8030a88: e00f b.n 8030aaa { case RCC_SDMMCCLKSOURCE_PLL: /* PLL is used as clock source for SDMMC*/ /* Enable SDMMC Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030a5a: 4b34 ldr r3, [pc, #208] ; (8030b2c ) - 8030a5c: 6adb ldr r3, [r3, #44] ; 0x2c - 8030a5e: 4a33 ldr r2, [pc, #204] ; (8030b2c ) - 8030a60: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030a64: 62d3 str r3, [r2, #44] ; 0x2c + 8030a8a: 4b34 ldr r3, [pc, #208] ; (8030b5c ) + 8030a8c: 6adb ldr r3, [r3, #44] ; 0x2c + 8030a8e: 4a33 ldr r2, [pc, #204] ; (8030b5c ) + 8030a90: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030a94: 62d3 str r3, [r2, #44] ; 0x2c /* SDMMC clock source configuration done later after clock selection check */ break; - 8030a66: e00b b.n 8030a80 + 8030a96: e00b b.n 8030ab0 case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for SDMMC*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_R_UPDATE); - 8030a68: 687b ldr r3, [r7, #4] - 8030a6a: 3304 adds r3, #4 - 8030a6c: 2102 movs r1, #2 - 8030a6e: 4618 mov r0, r3 - 8030a70: f001 f9ae bl 8031dd0 - 8030a74: 4603 mov r3, r0 - 8030a76: 75fb strb r3, [r7, #23] + 8030a98: 687b ldr r3, [r7, #4] + 8030a9a: 3304 adds r3, #4 + 8030a9c: 2102 movs r1, #2 + 8030a9e: 4618 mov r0, r3 + 8030aa0: f001 f9ae bl 8031e00 + 8030aa4: 4603 mov r3, r0 + 8030aa6: 75fb strb r3, [r7, #23] /* SDMMC clock source configuration done later after clock selection check */ break; - 8030a78: e002 b.n 8030a80 + 8030aa8: e002 b.n 8030ab0 default: ret = HAL_ERROR; - 8030a7a: 2301 movs r3, #1 - 8030a7c: 75fb strb r3, [r7, #23] + 8030aaa: 2301 movs r3, #1 + 8030aac: 75fb strb r3, [r7, #23] break; - 8030a7e: bf00 nop + 8030aae: bf00 nop } if(ret == HAL_OK) - 8030a80: 7dfb ldrb r3, [r7, #23] - 8030a82: 2b00 cmp r3, #0 - 8030a84: d109 bne.n 8030a9a + 8030ab0: 7dfb ldrb r3, [r7, #23] + 8030ab2: 2b00 cmp r3, #0 + 8030ab4: d109 bne.n 8030aca { /* Set the source of SDMMC clock*/ __HAL_RCC_SDMMC_CONFIG(PeriphClkInit->SdmmcClockSelection); - 8030a86: 4b29 ldr r3, [pc, #164] ; (8030b2c ) - 8030a88: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030a8a: f423 3280 bic.w r2, r3, #65536 ; 0x10000 - 8030a8e: 687b ldr r3, [r7, #4] - 8030a90: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030a92: 4926 ldr r1, [pc, #152] ; (8030b2c ) - 8030a94: 4313 orrs r3, r2 - 8030a96: 64cb str r3, [r1, #76] ; 0x4c - 8030a98: e001 b.n 8030a9e + 8030ab6: 4b29 ldr r3, [pc, #164] ; (8030b5c ) + 8030ab8: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030aba: f423 3280 bic.w r2, r3, #65536 ; 0x10000 + 8030abe: 687b ldr r3, [r7, #4] + 8030ac0: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030ac2: 4926 ldr r1, [pc, #152] ; (8030b5c ) + 8030ac4: 4313 orrs r3, r2 + 8030ac6: 64cb str r3, [r1, #76] ; 0x4c + 8030ac8: e001 b.n 8030ace } else { /* set overall return value */ status = ret; - 8030a9a: 7dfb ldrb r3, [r7, #23] - 8030a9c: 75bb strb r3, [r7, #22] + 8030aca: 7dfb ldrb r3, [r7, #23] + 8030acc: 75bb strb r3, [r7, #22] } } #if defined(LTDC) /*-------------------------------------- LTDC Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC) - 8030a9e: 687b ldr r3, [r7, #4] - 8030aa0: 681b ldr r3, [r3, #0] - 8030aa2: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8030aa6: 2b00 cmp r3, #0 - 8030aa8: d00a beq.n 8030ac0 + 8030ace: 687b ldr r3, [r7, #4] + 8030ad0: 681b ldr r3, [r3, #0] + 8030ad2: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8030ad6: 2b00 cmp r3, #0 + 8030ad8: d00a beq.n 8030af0 { if(RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE)!=HAL_OK) - 8030aaa: 687b ldr r3, [r7, #4] - 8030aac: 3324 adds r3, #36 ; 0x24 - 8030aae: 2102 movs r1, #2 - 8030ab0: 4618 mov r0, r3 - 8030ab2: f001 fa3f bl 8031f34 - 8030ab6: 4603 mov r3, r0 - 8030ab8: 2b00 cmp r3, #0 - 8030aba: d001 beq.n 8030ac0 + 8030ada: 687b ldr r3, [r7, #4] + 8030adc: 3324 adds r3, #36 ; 0x24 + 8030ade: 2102 movs r1, #2 + 8030ae0: 4618 mov r0, r3 + 8030ae2: f001 fa3f bl 8031f64 + 8030ae6: 4603 mov r3, r0 + 8030ae8: 2b00 cmp r3, #0 + 8030aea: d001 beq.n 8030af0 { status=HAL_ERROR; - 8030abc: 2301 movs r3, #1 - 8030abe: 75bb strb r3, [r7, #22] + 8030aec: 2301 movs r3, #1 + 8030aee: 75bb strb r3, [r7, #22] } } #endif /* LTDC */ /*------------------------------ RNG Configuration -------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) - 8030ac0: 687b ldr r3, [r7, #4] - 8030ac2: 681b ldr r3, [r3, #0] - 8030ac4: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8030ac8: 2b00 cmp r3, #0 - 8030aca: d033 beq.n 8030b34 + 8030af0: 687b ldr r3, [r7, #4] + 8030af2: 681b ldr r3, [r3, #0] + 8030af4: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8030af8: 2b00 cmp r3, #0 + 8030afa: d033 beq.n 8030b64 { switch(PeriphClkInit->RngClockSelection) - 8030acc: 687b ldr r3, [r7, #4] - 8030ace: 6fdb ldr r3, [r3, #124] ; 0x7c - 8030ad0: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 8030ad4: d017 beq.n 8030b06 - 8030ad6: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 8030ada: d811 bhi.n 8030b00 - 8030adc: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8030ae0: d013 beq.n 8030b0a - 8030ae2: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8030ae6: d80b bhi.n 8030b00 - 8030ae8: 2b00 cmp r3, #0 - 8030aea: d010 beq.n 8030b0e - 8030aec: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030af0: d106 bne.n 8030b00 + 8030afc: 687b ldr r3, [r7, #4] + 8030afe: 6fdb ldr r3, [r3, #124] ; 0x7c + 8030b00: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 8030b04: d017 beq.n 8030b36 + 8030b06: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 8030b0a: d811 bhi.n 8030b30 + 8030b0c: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8030b10: d013 beq.n 8030b3a + 8030b12: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8030b16: d80b bhi.n 8030b30 + 8030b18: 2b00 cmp r3, #0 + 8030b1a: d010 beq.n 8030b3e + 8030b1c: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030b20: d106 bne.n 8030b30 { case RCC_RNGCLKSOURCE_PLL: /* PLL is used as clock source for RNG*/ /* Enable RNG Clock output generated form System RNG . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030af2: 4b0e ldr r3, [pc, #56] ; (8030b2c ) - 8030af4: 6adb ldr r3, [r3, #44] ; 0x2c - 8030af6: 4a0d ldr r2, [pc, #52] ; (8030b2c ) - 8030af8: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030afc: 62d3 str r3, [r2, #44] ; 0x2c + 8030b22: 4b0e ldr r3, [pc, #56] ; (8030b5c ) + 8030b24: 6adb ldr r3, [r3, #44] ; 0x2c + 8030b26: 4a0d ldr r2, [pc, #52] ; (8030b5c ) + 8030b28: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030b2c: 62d3 str r3, [r2, #44] ; 0x2c /* RNG clock source configuration done later after clock selection check */ break; - 8030afe: e007 b.n 8030b10 + 8030b2e: e007 b.n 8030b40 /* HSI48 oscillator is used as source of RNG clock */ /* RNG clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030b00: 2301 movs r3, #1 - 8030b02: 75fb strb r3, [r7, #23] + 8030b30: 2301 movs r3, #1 + 8030b32: 75fb strb r3, [r7, #23] break; - 8030b04: e004 b.n 8030b10 + 8030b34: e004 b.n 8030b40 break; - 8030b06: bf00 nop - 8030b08: e002 b.n 8030b10 + 8030b36: bf00 nop + 8030b38: e002 b.n 8030b40 break; - 8030b0a: bf00 nop - 8030b0c: e000 b.n 8030b10 + 8030b3a: bf00 nop + 8030b3c: e000 b.n 8030b40 break; - 8030b0e: bf00 nop + 8030b3e: bf00 nop } if(ret == HAL_OK) - 8030b10: 7dfb ldrb r3, [r7, #23] - 8030b12: 2b00 cmp r3, #0 - 8030b14: d10c bne.n 8030b30 + 8030b40: 7dfb ldrb r3, [r7, #23] + 8030b42: 2b00 cmp r3, #0 + 8030b44: d10c bne.n 8030b60 { /* Set the source of RNG clock*/ __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection); - 8030b16: 4b05 ldr r3, [pc, #20] ; (8030b2c ) - 8030b18: 6d5b ldr r3, [r3, #84] ; 0x54 - 8030b1a: f423 7240 bic.w r2, r3, #768 ; 0x300 - 8030b1e: 687b ldr r3, [r7, #4] - 8030b20: 6fdb ldr r3, [r3, #124] ; 0x7c - 8030b22: 4902 ldr r1, [pc, #8] ; (8030b2c ) - 8030b24: 4313 orrs r3, r2 - 8030b26: 654b str r3, [r1, #84] ; 0x54 - 8030b28: e004 b.n 8030b34 - 8030b2a: bf00 nop - 8030b2c: 58024400 .word 0x58024400 + 8030b46: 4b05 ldr r3, [pc, #20] ; (8030b5c ) + 8030b48: 6d5b ldr r3, [r3, #84] ; 0x54 + 8030b4a: f423 7240 bic.w r2, r3, #768 ; 0x300 + 8030b4e: 687b ldr r3, [r7, #4] + 8030b50: 6fdb ldr r3, [r3, #124] ; 0x7c + 8030b52: 4902 ldr r1, [pc, #8] ; (8030b5c ) + 8030b54: 4313 orrs r3, r2 + 8030b56: 654b str r3, [r1, #84] ; 0x54 + 8030b58: e004 b.n 8030b64 + 8030b5a: bf00 nop + 8030b5c: 58024400 .word 0x58024400 } else { /* set overall return value */ status = ret; - 8030b30: 7dfb ldrb r3, [r7, #23] - 8030b32: 75bb strb r3, [r7, #22] + 8030b60: 7dfb ldrb r3, [r7, #23] + 8030b62: 75bb strb r3, [r7, #22] } } /*------------------------------ SWPMI1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) - 8030b34: 687b ldr r3, [r7, #4] - 8030b36: 681b ldr r3, [r3, #0] - 8030b38: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 8030b3c: 2b00 cmp r3, #0 - 8030b3e: d008 beq.n 8030b52 + 8030b64: 687b ldr r3, [r7, #4] + 8030b66: 681b ldr r3, [r3, #0] + 8030b68: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 8030b6c: 2b00 cmp r3, #0 + 8030b6e: d008 beq.n 8030b82 { /* Check the parameters */ assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection)); /* Configure the SWPMI1 interface clock source */ __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection); - 8030b40: 4b31 ldr r3, [pc, #196] ; (8030c08 ) - 8030b42: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030b44: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 8030b48: 687b ldr r3, [r7, #4] - 8030b4a: 6f1b ldr r3, [r3, #112] ; 0x70 - 8030b4c: 492e ldr r1, [pc, #184] ; (8030c08 ) - 8030b4e: 4313 orrs r3, r2 - 8030b50: 650b str r3, [r1, #80] ; 0x50 + 8030b70: 4b31 ldr r3, [pc, #196] ; (8030c38 ) + 8030b72: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030b74: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 8030b78: 687b ldr r3, [r7, #4] + 8030b7a: 6f1b ldr r3, [r3, #112] ; 0x70 + 8030b7c: 492e ldr r1, [pc, #184] ; (8030c38 ) + 8030b7e: 4313 orrs r3, r2 + 8030b80: 650b str r3, [r1, #80] ; 0x50 } #if defined(HRTIM1) /*------------------------------ HRTIM1 clock Configuration ----------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1) - 8030b52: 687b ldr r3, [r7, #4] - 8030b54: 681b ldr r3, [r3, #0] - 8030b56: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8030b5a: 2b00 cmp r3, #0 - 8030b5c: d009 beq.n 8030b72 + 8030b82: 687b ldr r3, [r7, #4] + 8030b84: 681b ldr r3, [r3, #0] + 8030b86: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8030b8a: 2b00 cmp r3, #0 + 8030b8c: d009 beq.n 8030ba2 { /* Check the parameters */ assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection)); /* Configure the HRTIM1 clock source */ __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection); - 8030b5e: 4b2a ldr r3, [pc, #168] ; (8030c08 ) - 8030b60: 691b ldr r3, [r3, #16] - 8030b62: f423 4280 bic.w r2, r3, #16384 ; 0x4000 - 8030b66: 687b ldr r3, [r7, #4] - 8030b68: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 8030b6c: 4926 ldr r1, [pc, #152] ; (8030c08 ) - 8030b6e: 4313 orrs r3, r2 - 8030b70: 610b str r3, [r1, #16] + 8030b8e: 4b2a ldr r3, [pc, #168] ; (8030c38 ) + 8030b90: 691b ldr r3, [r3, #16] + 8030b92: f423 4280 bic.w r2, r3, #16384 ; 0x4000 + 8030b96: 687b ldr r3, [r7, #4] + 8030b98: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 8030b9c: 4926 ldr r1, [pc, #152] ; (8030c38 ) + 8030b9e: 4313 orrs r3, r2 + 8030ba0: 610b str r3, [r1, #16] } #endif /*HRTIM1*/ /*------------------------------ DFSDM1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) - 8030b72: 687b ldr r3, [r7, #4] - 8030b74: 681b ldr r3, [r3, #0] - 8030b76: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 8030b7a: 2b00 cmp r3, #0 - 8030b7c: d008 beq.n 8030b90 + 8030ba2: 687b ldr r3, [r7, #4] + 8030ba4: 681b ldr r3, [r3, #0] + 8030ba6: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 8030baa: 2b00 cmp r3, #0 + 8030bac: d008 beq.n 8030bc0 { /* Check the parameters */ assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection)); /* Configure the DFSDM1 interface clock source */ __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection); - 8030b7e: 4b22 ldr r3, [pc, #136] ; (8030c08 ) - 8030b80: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030b82: f023 7280 bic.w r2, r3, #16777216 ; 0x1000000 - 8030b86: 687b ldr r3, [r7, #4] - 8030b88: 6e9b ldr r3, [r3, #104] ; 0x68 - 8030b8a: 491f ldr r1, [pc, #124] ; (8030c08 ) - 8030b8c: 4313 orrs r3, r2 - 8030b8e: 650b str r3, [r1, #80] ; 0x50 + 8030bae: 4b22 ldr r3, [pc, #136] ; (8030c38 ) + 8030bb0: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030bb2: f023 7280 bic.w r2, r3, #16777216 ; 0x1000000 + 8030bb6: 687b ldr r3, [r7, #4] + 8030bb8: 6e9b ldr r3, [r3, #104] ; 0x68 + 8030bba: 491f ldr r1, [pc, #124] ; (8030c38 ) + 8030bbc: 4313 orrs r3, r2 + 8030bbe: 650b str r3, [r1, #80] ; 0x50 __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection); } #endif /* DFSDM2 */ /*------------------------------------ TIM configuration --------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == RCC_PERIPHCLK_TIM) - 8030b90: 687b ldr r3, [r7, #4] - 8030b92: 681b ldr r3, [r3, #0] - 8030b94: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 - 8030b98: 2b00 cmp r3, #0 - 8030b9a: d00d beq.n 8030bb8 + 8030bc0: 687b ldr r3, [r7, #4] + 8030bc2: 681b ldr r3, [r3, #0] + 8030bc4: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 + 8030bc8: 2b00 cmp r3, #0 + 8030bca: d00d beq.n 8030be8 { /* Check the parameters */ assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection)); /* Configure Timer Prescaler */ __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection); - 8030b9c: 4b1a ldr r3, [pc, #104] ; (8030c08 ) - 8030b9e: 691b ldr r3, [r3, #16] - 8030ba0: 4a19 ldr r2, [pc, #100] ; (8030c08 ) - 8030ba2: f423 4300 bic.w r3, r3, #32768 ; 0x8000 - 8030ba6: 6113 str r3, [r2, #16] - 8030ba8: 4b17 ldr r3, [pc, #92] ; (8030c08 ) - 8030baa: 691a ldr r2, [r3, #16] - 8030bac: 687b ldr r3, [r7, #4] - 8030bae: f8d3 30b8 ldr.w r3, [r3, #184] ; 0xb8 - 8030bb2: 4915 ldr r1, [pc, #84] ; (8030c08 ) - 8030bb4: 4313 orrs r3, r2 - 8030bb6: 610b str r3, [r1, #16] + 8030bcc: 4b1a ldr r3, [pc, #104] ; (8030c38 ) + 8030bce: 691b ldr r3, [r3, #16] + 8030bd0: 4a19 ldr r2, [pc, #100] ; (8030c38 ) + 8030bd2: f423 4300 bic.w r3, r3, #32768 ; 0x8000 + 8030bd6: 6113 str r3, [r2, #16] + 8030bd8: 4b17 ldr r3, [pc, #92] ; (8030c38 ) + 8030bda: 691a ldr r2, [r3, #16] + 8030bdc: 687b ldr r3, [r7, #4] + 8030bde: f8d3 30b8 ldr.w r3, [r3, #184] ; 0xb8 + 8030be2: 4915 ldr r1, [pc, #84] ; (8030c38 ) + 8030be4: 4313 orrs r3, r2 + 8030be6: 610b str r3, [r1, #16] } /*------------------------------------ CKPER configuration --------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CKPER) == RCC_PERIPHCLK_CKPER) - 8030bb8: 687b ldr r3, [r7, #4] - 8030bba: 681b ldr r3, [r3, #0] - 8030bbc: 2b00 cmp r3, #0 - 8030bbe: da08 bge.n 8030bd2 + 8030be8: 687b ldr r3, [r7, #4] + 8030bea: 681b ldr r3, [r3, #0] + 8030bec: 2b00 cmp r3, #0 + 8030bee: da08 bge.n 8030c02 { /* Check the parameters */ assert_param(IS_RCC_CLKPSOURCE(PeriphClkInit->CkperClockSelection)); /* Configure the CKPER clock source */ __HAL_RCC_CLKP_CONFIG(PeriphClkInit->CkperClockSelection); - 8030bc0: 4b11 ldr r3, [pc, #68] ; (8030c08 ) - 8030bc2: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030bc4: f023 5240 bic.w r2, r3, #805306368 ; 0x30000000 - 8030bc8: 687b ldr r3, [r7, #4] - 8030bca: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030bcc: 490e ldr r1, [pc, #56] ; (8030c08 ) - 8030bce: 4313 orrs r3, r2 - 8030bd0: 64cb str r3, [r1, #76] ; 0x4c + 8030bf0: 4b11 ldr r3, [pc, #68] ; (8030c38 ) + 8030bf2: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030bf4: f023 5240 bic.w r2, r3, #805306368 ; 0x30000000 + 8030bf8: 687b ldr r3, [r7, #4] + 8030bfa: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030bfc: 490e ldr r1, [pc, #56] ; (8030c38 ) + 8030bfe: 4313 orrs r3, r2 + 8030c00: 64cb str r3, [r1, #76] ; 0x4c } /*------------------------------ CEC Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) - 8030bd2: 687b ldr r3, [r7, #4] - 8030bd4: 681b ldr r3, [r3, #0] - 8030bd6: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 8030bda: 2b00 cmp r3, #0 - 8030bdc: d009 beq.n 8030bf2 + 8030c02: 687b ldr r3, [r7, #4] + 8030c04: 681b ldr r3, [r3, #0] + 8030c06: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 8030c0a: 2b00 cmp r3, #0 + 8030c0c: d009 beq.n 8030c22 { /* Check the parameters */ assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); /* Configure the CEC interface clock source */ __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); - 8030bde: 4b0a ldr r3, [pc, #40] ; (8030c08 ) - 8030be0: 6d5b ldr r3, [r3, #84] ; 0x54 - 8030be2: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000 - 8030be6: 687b ldr r3, [r7, #4] - 8030be8: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8030bec: 4906 ldr r1, [pc, #24] ; (8030c08 ) - 8030bee: 4313 orrs r3, r2 - 8030bf0: 654b str r3, [r1, #84] ; 0x54 + 8030c0e: 4b0a ldr r3, [pc, #40] ; (8030c38 ) + 8030c10: 6d5b ldr r3, [r3, #84] ; 0x54 + 8030c12: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000 + 8030c16: 687b ldr r3, [r7, #4] + 8030c18: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8030c1c: 4906 ldr r1, [pc, #24] ; (8030c38 ) + 8030c1e: 4313 orrs r3, r2 + 8030c20: 654b str r3, [r1, #84] ; 0x54 } if (status == HAL_OK) - 8030bf2: 7dbb ldrb r3, [r7, #22] - 8030bf4: 2b00 cmp r3, #0 - 8030bf6: d101 bne.n 8030bfc + 8030c22: 7dbb ldrb r3, [r7, #22] + 8030c24: 2b00 cmp r3, #0 + 8030c26: d101 bne.n 8030c2c { return HAL_OK; - 8030bf8: 2300 movs r3, #0 - 8030bfa: e000 b.n 8030bfe + 8030c28: 2300 movs r3, #0 + 8030c2a: e000 b.n 8030c2e } return HAL_ERROR; - 8030bfc: 2301 movs r3, #1 + 8030c2c: 2301 movs r3, #1 } - 8030bfe: 4618 mov r0, r3 - 8030c00: 3718 adds r7, #24 - 8030c02: 46bd mov sp, r7 - 8030c04: bd80 pop {r7, pc} - 8030c06: bf00 nop - 8030c08: 58024400 .word 0x58024400 + 8030c2e: 4618 mov r0, r3 + 8030c30: 3718 adds r7, #24 + 8030c32: 46bd mov sp, r7 + 8030c34: bd80 pop {r7, pc} + 8030c36: bf00 nop + 8030c38: 58024400 .word 0x58024400 -08030c0c : +08030c3c : * @retval Frequency in KHz * * (*) : Available on some STM32H7 lines only. */ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) { - 8030c0c: b580 push {r7, lr} - 8030c0e: b090 sub sp, #64 ; 0x40 - 8030c10: af00 add r7, sp, #0 - 8030c12: 6078 str r0, [r7, #4] + 8030c3c: b580 push {r7, lr} + 8030c3e: b090 sub sp, #64 ; 0x40 + 8030c40: af00 add r7, sp, #0 + 8030c42: 6078 str r0, [r7, #4] /* This variable is used to store the SAI and CKP clock source */ uint32_t saiclocksource; uint32_t ckpclocksource; uint32_t srcclk; if (PeriphClk == RCC_PERIPHCLK_SAI1) - 8030c14: 687b ldr r3, [r7, #4] - 8030c16: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030c1a: f040 8095 bne.w 8030d48 + 8030c44: 687b ldr r3, [r7, #4] + 8030c46: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030c4a: f040 8095 bne.w 8030d78 { saiclocksource= __HAL_RCC_GET_SAI1_SOURCE(); - 8030c1e: 4b97 ldr r3, [pc, #604] ; (8030e7c ) - 8030c20: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030c22: f003 0307 and.w r3, r3, #7 - 8030c26: 633b str r3, [r7, #48] ; 0x30 + 8030c4e: 4b97 ldr r3, [pc, #604] ; (8030eac ) + 8030c50: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030c52: f003 0307 and.w r3, r3, #7 + 8030c56: 633b str r3, [r7, #48] ; 0x30 switch (saiclocksource) - 8030c28: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030c2a: 2b04 cmp r3, #4 - 8030c2c: f200 8088 bhi.w 8030d40 - 8030c30: a201 add r2, pc, #4 ; (adr r2, 8030c38 ) - 8030c32: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8030c36: bf00 nop - 8030c38: 08030c4d .word 0x08030c4d - 8030c3c: 08030c75 .word 0x08030c75 - 8030c40: 08030c9d .word 0x08030c9d - 8030c44: 08030d39 .word 0x08030d39 - 8030c48: 08030cc5 .word 0x08030cc5 + 8030c58: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030c5a: 2b04 cmp r3, #4 + 8030c5c: f200 8088 bhi.w 8030d70 + 8030c60: a201 add r2, pc, #4 ; (adr r2, 8030c68 ) + 8030c62: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8030c66: bf00 nop + 8030c68: 08030c7d .word 0x08030c7d + 8030c6c: 08030ca5 .word 0x08030ca5 + 8030c70: 08030ccd .word 0x08030ccd + 8030c74: 08030d69 .word 0x08030d69 + 8030c78: 08030cf5 .word 0x08030cf5 { case RCC_SAI1CLKSOURCE_PLL: /* PLL1 is the clock source for SAI1 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 8030c4c: 4b8b ldr r3, [pc, #556] ; (8030e7c ) - 8030c4e: 681b ldr r3, [r3, #0] - 8030c50: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8030c54: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8030c58: d108 bne.n 8030c6c + 8030c7c: 4b8b ldr r3, [pc, #556] ; (8030eac ) + 8030c7e: 681b ldr r3, [r3, #0] + 8030c80: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8030c84: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8030c88: d108 bne.n 8030c9c { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 8030c5a: f107 0324 add.w r3, r7, #36 ; 0x24 - 8030c5e: 4618 mov r0, r3 - 8030c60: f000 ff64 bl 8031b2c + 8030c8a: f107 0324 add.w r3, r7, #36 ; 0x24 + 8030c8e: 4618 mov r0, r3 + 8030c90: f000 ff64 bl 8031b5c frequency = pll1_clocks.PLL1_Q_Frequency; - 8030c64: 6abb ldr r3, [r7, #40] ; 0x28 - 8030c66: 63fb str r3, [r7, #60] ; 0x3c + 8030c94: 6abb ldr r3, [r7, #40] ; 0x28 + 8030c96: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030c68: f000 bc94 b.w 8031594 + 8030c98: f000 bc94 b.w 80315c4 frequency = 0; - 8030c6c: 2300 movs r3, #0 - 8030c6e: 63fb str r3, [r7, #60] ; 0x3c + 8030c9c: 2300 movs r3, #0 + 8030c9e: 63fb str r3, [r7, #60] ; 0x3c break; - 8030c70: f000 bc90 b.w 8031594 + 8030ca0: f000 bc90 b.w 80315c4 } case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is the clock source for SAI1 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8030c74: 4b81 ldr r3, [pc, #516] ; (8030e7c ) - 8030c76: 681b ldr r3, [r3, #0] - 8030c78: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8030c7c: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 8030c80: d108 bne.n 8030c94 + 8030ca4: 4b81 ldr r3, [pc, #516] ; (8030eac ) + 8030ca6: 681b ldr r3, [r3, #0] + 8030ca8: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8030cac: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8030cb0: d108 bne.n 8030cc4 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8030c82: f107 0318 add.w r3, r7, #24 - 8030c86: 4618 mov r0, r3 - 8030c88: f000 fca8 bl 80315dc + 8030cb2: f107 0318 add.w r3, r7, #24 + 8030cb6: 4618 mov r0, r3 + 8030cb8: f000 fca8 bl 803160c frequency = pll2_clocks.PLL2_P_Frequency; - 8030c8c: 69bb ldr r3, [r7, #24] - 8030c8e: 63fb str r3, [r7, #60] ; 0x3c + 8030cbc: 69bb ldr r3, [r7, #24] + 8030cbe: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030c90: f000 bc80 b.w 8031594 + 8030cc0: f000 bc80 b.w 80315c4 frequency = 0; - 8030c94: 2300 movs r3, #0 - 8030c96: 63fb str r3, [r7, #60] ; 0x3c + 8030cc4: 2300 movs r3, #0 + 8030cc6: 63fb str r3, [r7, #60] ; 0x3c break; - 8030c98: f000 bc7c b.w 8031594 + 8030cc8: f000 bc7c b.w 80315c4 } case RCC_SAI1CLKSOURCE_PLL3: /* PLL3 is the clock source for SAI1 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 8030c9c: 4b77 ldr r3, [pc, #476] ; (8030e7c ) - 8030c9e: 681b ldr r3, [r3, #0] - 8030ca0: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8030ca4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030ca8: d108 bne.n 8030cbc + 8030ccc: 4b77 ldr r3, [pc, #476] ; (8030eac ) + 8030cce: 681b ldr r3, [r3, #0] + 8030cd0: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8030cd4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030cd8: d108 bne.n 8030cec { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8030caa: f107 030c add.w r3, r7, #12 - 8030cae: 4618 mov r0, r3 - 8030cb0: f000 fde8 bl 8031884 + 8030cda: f107 030c add.w r3, r7, #12 + 8030cde: 4618 mov r0, r3 + 8030ce0: f000 fde8 bl 80318b4 frequency = pll3_clocks.PLL3_P_Frequency; - 8030cb4: 68fb ldr r3, [r7, #12] - 8030cb6: 63fb str r3, [r7, #60] ; 0x3c + 8030ce4: 68fb ldr r3, [r7, #12] + 8030ce6: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030cb8: f000 bc6c b.w 8031594 + 8030ce8: f000 bc6c b.w 80315c4 frequency = 0; - 8030cbc: 2300 movs r3, #0 - 8030cbe: 63fb str r3, [r7, #60] ; 0x3c + 8030cec: 2300 movs r3, #0 + 8030cee: 63fb str r3, [r7, #60] ; 0x3c break; - 8030cc0: f000 bc68 b.w 8031594 + 8030cf0: f000 bc68 b.w 80315c4 } case RCC_SAI1CLKSOURCE_CLKP: /* CKPER is the clock source for SAI1*/ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 8030cc4: 4b6d ldr r3, [pc, #436] ; (8030e7c ) - 8030cc6: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030cc8: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 8030ccc: 637b str r3, [r7, #52] ; 0x34 + 8030cf4: 4b6d ldr r3, [pc, #436] ; (8030eac ) + 8030cf6: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030cf8: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 8030cfc: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 8030cce: 4b6b ldr r3, [pc, #428] ; (8030e7c ) - 8030cd0: 681b ldr r3, [r3, #0] - 8030cd2: f003 0304 and.w r3, r3, #4 - 8030cd6: 2b04 cmp r3, #4 - 8030cd8: d10c bne.n 8030cf4 - 8030cda: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030cdc: 2b00 cmp r3, #0 - 8030cde: d109 bne.n 8030cf4 + 8030cfe: 4b6b ldr r3, [pc, #428] ; (8030eac ) + 8030d00: 681b ldr r3, [r3, #0] + 8030d02: f003 0304 and.w r3, r3, #4 + 8030d06: 2b04 cmp r3, #4 + 8030d08: d10c bne.n 8030d24 + 8030d0a: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030d0c: 2b00 cmp r3, #0 + 8030d0e: d109 bne.n 8030d24 { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8030ce0: 4b66 ldr r3, [pc, #408] ; (8030e7c ) - 8030ce2: 681b ldr r3, [r3, #0] - 8030ce4: 08db lsrs r3, r3, #3 - 8030ce6: f003 0303 and.w r3, r3, #3 - 8030cea: 4a65 ldr r2, [pc, #404] ; (8030e80 ) - 8030cec: fa22 f303 lsr.w r3, r2, r3 - 8030cf0: 63fb str r3, [r7, #60] ; 0x3c - 8030cf2: e01f b.n 8030d34 + 8030d10: 4b66 ldr r3, [pc, #408] ; (8030eac ) + 8030d12: 681b ldr r3, [r3, #0] + 8030d14: 08db lsrs r3, r3, #3 + 8030d16: f003 0303 and.w r3, r3, #3 + 8030d1a: 4a65 ldr r2, [pc, #404] ; (8030eb0 ) + 8030d1c: fa22 f303 lsr.w r3, r2, r3 + 8030d20: 63fb str r3, [r7, #60] ; 0x3c + 8030d22: e01f b.n 8030d64 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8030cf4: 4b61 ldr r3, [pc, #388] ; (8030e7c ) - 8030cf6: 681b ldr r3, [r3, #0] - 8030cf8: f403 7380 and.w r3, r3, #256 ; 0x100 - 8030cfc: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030d00: d106 bne.n 8030d10 - 8030d02: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030d04: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8030d08: d102 bne.n 8030d10 + 8030d24: 4b61 ldr r3, [pc, #388] ; (8030eac ) + 8030d26: 681b ldr r3, [r3, #0] + 8030d28: f403 7380 and.w r3, r3, #256 ; 0x100 + 8030d2c: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030d30: d106 bne.n 8030d40 + 8030d32: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030d34: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8030d38: d102 bne.n 8030d40 { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 8030d0a: 4b5e ldr r3, [pc, #376] ; (8030e84 ) - 8030d0c: 63fb str r3, [r7, #60] ; 0x3c - 8030d0e: e011 b.n 8030d34 + 8030d3a: 4b5e ldr r3, [pc, #376] ; (8030eb4 ) + 8030d3c: 63fb str r3, [r7, #60] ; 0x3c + 8030d3e: e011 b.n 8030d64 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 8030d10: 4b5a ldr r3, [pc, #360] ; (8030e7c ) - 8030d12: 681b ldr r3, [r3, #0] - 8030d14: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8030d18: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8030d1c: d106 bne.n 8030d2c - 8030d1e: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030d20: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030d24: d102 bne.n 8030d2c + 8030d40: 4b5a ldr r3, [pc, #360] ; (8030eac ) + 8030d42: 681b ldr r3, [r3, #0] + 8030d44: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8030d48: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8030d4c: d106 bne.n 8030d5c + 8030d4e: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030d50: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030d54: d102 bne.n 8030d5c { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8030d26: 4b58 ldr r3, [pc, #352] ; (8030e88 ) - 8030d28: 63fb str r3, [r7, #60] ; 0x3c - 8030d2a: e003 b.n 8030d34 + 8030d56: 4b58 ldr r3, [pc, #352] ; (8030eb8 ) + 8030d58: 63fb str r3, [r7, #60] ; 0x3c + 8030d5a: e003 b.n 8030d64 } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8030d2c: 2300 movs r3, #0 - 8030d2e: 63fb str r3, [r7, #60] ; 0x3c + 8030d5c: 2300 movs r3, #0 + 8030d5e: 63fb str r3, [r7, #60] ; 0x3c } break; - 8030d30: f000 bc30 b.w 8031594 - 8030d34: f000 bc2e b.w 8031594 + 8030d60: f000 bc30 b.w 80315c4 + 8030d64: f000 bc2e b.w 80315c4 } case (RCC_SAI1CLKSOURCE_PIN): /* External clock is the clock source for SAI1 */ { frequency = EXTERNAL_CLOCK_VALUE; - 8030d38: 4b54 ldr r3, [pc, #336] ; (8030e8c ) - 8030d3a: 63fb str r3, [r7, #60] ; 0x3c + 8030d68: 4b54 ldr r3, [pc, #336] ; (8030ebc ) + 8030d6a: 63fb str r3, [r7, #60] ; 0x3c break; - 8030d3c: f000 bc2a b.w 8031594 + 8030d6c: f000 bc2a b.w 80315c4 } default : { frequency = 0; - 8030d40: 2300 movs r3, #0 - 8030d42: 63fb str r3, [r7, #60] ; 0x3c + 8030d70: 2300 movs r3, #0 + 8030d72: 63fb str r3, [r7, #60] ; 0x3c break; - 8030d44: f000 bc26 b.w 8031594 + 8030d74: f000 bc26 b.w 80315c4 } } } #if defined(SAI3) else if (PeriphClk == RCC_PERIPHCLK_SAI23) - 8030d48: 687b ldr r3, [r7, #4] - 8030d4a: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8030d4e: f040 809f bne.w 8030e90 + 8030d78: 687b ldr r3, [r7, #4] + 8030d7a: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8030d7e: f040 809f bne.w 8030ec0 { saiclocksource= __HAL_RCC_GET_SAI23_SOURCE(); - 8030d52: 4b4a ldr r3, [pc, #296] ; (8030e7c ) - 8030d54: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030d56: f403 73e0 and.w r3, r3, #448 ; 0x1c0 - 8030d5a: 633b str r3, [r7, #48] ; 0x30 + 8030d82: 4b4a ldr r3, [pc, #296] ; (8030eac ) + 8030d84: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030d86: f403 73e0 and.w r3, r3, #448 ; 0x1c0 + 8030d8a: 633b str r3, [r7, #48] ; 0x30 switch (saiclocksource) - 8030d5c: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d5e: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030d62: d04d beq.n 8030e00 - 8030d64: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d66: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030d6a: f200 8084 bhi.w 8030e76 - 8030d6e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d70: 2bc0 cmp r3, #192 ; 0xc0 - 8030d72: d07d beq.n 8030e70 - 8030d74: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d76: 2bc0 cmp r3, #192 ; 0xc0 - 8030d78: d87d bhi.n 8030e76 - 8030d7a: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d7c: 2b80 cmp r3, #128 ; 0x80 - 8030d7e: d02d beq.n 8030ddc - 8030d80: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d82: 2b80 cmp r3, #128 ; 0x80 - 8030d84: d877 bhi.n 8030e76 - 8030d86: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d88: 2b00 cmp r3, #0 - 8030d8a: d003 beq.n 8030d94 8030d8c: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d8e: 2b40 cmp r3, #64 ; 0x40 - 8030d90: d012 beq.n 8030db8 - 8030d92: e070 b.n 8030e76 + 8030d8e: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030d92: d04d beq.n 8030e30 + 8030d94: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030d96: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030d9a: f200 8084 bhi.w 8030ea6 + 8030d9e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030da0: 2bc0 cmp r3, #192 ; 0xc0 + 8030da2: d07d beq.n 8030ea0 + 8030da4: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030da6: 2bc0 cmp r3, #192 ; 0xc0 + 8030da8: d87d bhi.n 8030ea6 + 8030daa: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030dac: 2b80 cmp r3, #128 ; 0x80 + 8030dae: d02d beq.n 8030e0c + 8030db0: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030db2: 2b80 cmp r3, #128 ; 0x80 + 8030db4: d877 bhi.n 8030ea6 + 8030db6: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030db8: 2b00 cmp r3, #0 + 8030dba: d003 beq.n 8030dc4 + 8030dbc: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030dbe: 2b40 cmp r3, #64 ; 0x40 + 8030dc0: d012 beq.n 8030de8 + 8030dc2: e070 b.n 8030ea6 { case RCC_SAI23CLKSOURCE_PLL: /* PLL1 is the clock source for SAI2/3 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 8030d94: 4b39 ldr r3, [pc, #228] ; (8030e7c ) - 8030d96: 681b ldr r3, [r3, #0] - 8030d98: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8030d9c: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8030da0: d107 bne.n 8030db2 + 8030dc4: 4b39 ldr r3, [pc, #228] ; (8030eac ) + 8030dc6: 681b ldr r3, [r3, #0] + 8030dc8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8030dcc: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8030dd0: d107 bne.n 8030de2 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 8030da2: f107 0324 add.w r3, r7, #36 ; 0x24 - 8030da6: 4618 mov r0, r3 - 8030da8: f000 fec0 bl 8031b2c + 8030dd2: f107 0324 add.w r3, r7, #36 ; 0x24 + 8030dd6: 4618 mov r0, r3 + 8030dd8: f000 fec0 bl 8031b5c frequency = pll1_clocks.PLL1_Q_Frequency; - 8030dac: 6abb ldr r3, [r7, #40] ; 0x28 - 8030dae: 63fb str r3, [r7, #60] ; 0x3c + 8030ddc: 6abb ldr r3, [r7, #40] ; 0x28 + 8030dde: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030db0: e3f0 b.n 8031594 + 8030de0: e3f0 b.n 80315c4 frequency = 0; - 8030db2: 2300 movs r3, #0 - 8030db4: 63fb str r3, [r7, #60] ; 0x3c + 8030de2: 2300 movs r3, #0 + 8030de4: 63fb str r3, [r7, #60] ; 0x3c break; - 8030db6: e3ed b.n 8031594 + 8030de6: e3ed b.n 80315c4 } case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is the clock source for SAI2/3 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8030db8: 4b30 ldr r3, [pc, #192] ; (8030e7c ) - 8030dba: 681b ldr r3, [r3, #0] - 8030dbc: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8030dc0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 8030dc4: d107 bne.n 8030dd6 + 8030de8: 4b30 ldr r3, [pc, #192] ; (8030eac ) + 8030dea: 681b ldr r3, [r3, #0] + 8030dec: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8030df0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8030df4: d107 bne.n 8030e06 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8030dc6: f107 0318 add.w r3, r7, #24 - 8030dca: 4618 mov r0, r3 - 8030dcc: f000 fc06 bl 80315dc + 8030df6: f107 0318 add.w r3, r7, #24 + 8030dfa: 4618 mov r0, r3 + 8030dfc: f000 fc06 bl 803160c frequency = pll2_clocks.PLL2_P_Frequency; - 8030dd0: 69bb ldr r3, [r7, #24] - 8030dd2: 63fb str r3, [r7, #60] ; 0x3c + 8030e00: 69bb ldr r3, [r7, #24] + 8030e02: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030dd4: e3de b.n 8031594 + 8030e04: e3de b.n 80315c4 frequency = 0; - 8030dd6: 2300 movs r3, #0 - 8030dd8: 63fb str r3, [r7, #60] ; 0x3c + 8030e06: 2300 movs r3, #0 + 8030e08: 63fb str r3, [r7, #60] ; 0x3c break; - 8030dda: e3db b.n 8031594 + 8030e0a: e3db b.n 80315c4 } case RCC_SAI23CLKSOURCE_PLL3: /* PLL3 is the clock source for SAI2/3 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 8030ddc: 4b27 ldr r3, [pc, #156] ; (8030e7c ) - 8030dde: 681b ldr r3, [r3, #0] - 8030de0: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8030de4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030de8: d107 bne.n 8030dfa + 8030e0c: 4b27 ldr r3, [pc, #156] ; (8030eac ) + 8030e0e: 681b ldr r3, [r3, #0] + 8030e10: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8030e14: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030e18: d107 bne.n 8030e2a { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8030dea: f107 030c add.w r3, r7, #12 - 8030dee: 4618 mov r0, r3 - 8030df0: f000 fd48 bl 8031884 + 8030e1a: f107 030c add.w r3, r7, #12 + 8030e1e: 4618 mov r0, r3 + 8030e20: f000 fd48 bl 80318b4 frequency = pll3_clocks.PLL3_P_Frequency; - 8030df4: 68fb ldr r3, [r7, #12] - 8030df6: 63fb str r3, [r7, #60] ; 0x3c + 8030e24: 68fb ldr r3, [r7, #12] + 8030e26: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030df8: e3cc b.n 8031594 + 8030e28: e3cc b.n 80315c4 frequency = 0; - 8030dfa: 2300 movs r3, #0 - 8030dfc: 63fb str r3, [r7, #60] ; 0x3c + 8030e2a: 2300 movs r3, #0 + 8030e2c: 63fb str r3, [r7, #60] ; 0x3c break; - 8030dfe: e3c9 b.n 8031594 + 8030e2e: e3c9 b.n 80315c4 } case RCC_SAI23CLKSOURCE_CLKP: /* CKPER is the clock source for SAI2/3 */ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 8030e00: 4b1e ldr r3, [pc, #120] ; (8030e7c ) - 8030e02: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030e04: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 8030e08: 637b str r3, [r7, #52] ; 0x34 + 8030e30: 4b1e ldr r3, [pc, #120] ; (8030eac ) + 8030e32: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030e34: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 8030e38: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 8030e0a: 4b1c ldr r3, [pc, #112] ; (8030e7c ) - 8030e0c: 681b ldr r3, [r3, #0] - 8030e0e: f003 0304 and.w r3, r3, #4 - 8030e12: 2b04 cmp r3, #4 - 8030e14: d10c bne.n 8030e30 - 8030e16: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030e18: 2b00 cmp r3, #0 - 8030e1a: d109 bne.n 8030e30 + 8030e3a: 4b1c ldr r3, [pc, #112] ; (8030eac ) + 8030e3c: 681b ldr r3, [r3, #0] + 8030e3e: f003 0304 and.w r3, r3, #4 + 8030e42: 2b04 cmp r3, #4 + 8030e44: d10c bne.n 8030e60 + 8030e46: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030e48: 2b00 cmp r3, #0 + 8030e4a: d109 bne.n 8030e60 { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8030e1c: 4b17 ldr r3, [pc, #92] ; (8030e7c ) - 8030e1e: 681b ldr r3, [r3, #0] - 8030e20: 08db lsrs r3, r3, #3 - 8030e22: f003 0303 and.w r3, r3, #3 - 8030e26: 4a16 ldr r2, [pc, #88] ; (8030e80 ) - 8030e28: fa22 f303 lsr.w r3, r2, r3 - 8030e2c: 63fb str r3, [r7, #60] ; 0x3c - 8030e2e: e01e b.n 8030e6e + 8030e4c: 4b17 ldr r3, [pc, #92] ; (8030eac ) + 8030e4e: 681b ldr r3, [r3, #0] + 8030e50: 08db lsrs r3, r3, #3 + 8030e52: f003 0303 and.w r3, r3, #3 + 8030e56: 4a16 ldr r2, [pc, #88] ; (8030eb0 ) + 8030e58: fa22 f303 lsr.w r3, r2, r3 + 8030e5c: 63fb str r3, [r7, #60] ; 0x3c + 8030e5e: e01e b.n 8030e9e } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8030e30: 4b12 ldr r3, [pc, #72] ; (8030e7c ) - 8030e32: 681b ldr r3, [r3, #0] - 8030e34: f403 7380 and.w r3, r3, #256 ; 0x100 - 8030e38: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030e3c: d106 bne.n 8030e4c - 8030e3e: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030e40: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8030e44: d102 bne.n 8030e4c + 8030e60: 4b12 ldr r3, [pc, #72] ; (8030eac ) + 8030e62: 681b ldr r3, [r3, #0] + 8030e64: f403 7380 and.w r3, r3, #256 ; 0x100 + 8030e68: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030e6c: d106 bne.n 8030e7c + 8030e6e: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030e70: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8030e74: d102 bne.n 8030e7c { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 8030e46: 4b0f ldr r3, [pc, #60] ; (8030e84 ) - 8030e48: 63fb str r3, [r7, #60] ; 0x3c - 8030e4a: e010 b.n 8030e6e + 8030e76: 4b0f ldr r3, [pc, #60] ; (8030eb4 ) + 8030e78: 63fb str r3, [r7, #60] ; 0x3c + 8030e7a: e010 b.n 8030e9e } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 8030e4c: 4b0b ldr r3, [pc, #44] ; (8030e7c ) - 8030e4e: 681b ldr r3, [r3, #0] - 8030e50: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8030e54: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8030e58: d106 bne.n 8030e68 - 8030e5a: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030e5c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030e60: d102 bne.n 8030e68 + 8030e7c: 4b0b ldr r3, [pc, #44] ; (8030eac ) + 8030e7e: 681b ldr r3, [r3, #0] + 8030e80: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8030e84: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8030e88: d106 bne.n 8030e98 + 8030e8a: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030e8c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030e90: d102 bne.n 8030e98 { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8030e62: 4b09 ldr r3, [pc, #36] ; (8030e88 ) - 8030e64: 63fb str r3, [r7, #60] ; 0x3c - 8030e66: e002 b.n 8030e6e + 8030e92: 4b09 ldr r3, [pc, #36] ; (8030eb8 ) + 8030e94: 63fb str r3, [r7, #60] ; 0x3c + 8030e96: e002 b.n 8030e9e } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8030e68: 2300 movs r3, #0 - 8030e6a: 63fb str r3, [r7, #60] ; 0x3c + 8030e98: 2300 movs r3, #0 + 8030e9a: 63fb str r3, [r7, #60] ; 0x3c } break; - 8030e6c: e392 b.n 8031594 - 8030e6e: e391 b.n 8031594 + 8030e9c: e392 b.n 80315c4 + 8030e9e: e391 b.n 80315c4 } case (RCC_SAI23CLKSOURCE_PIN): /* External clock is the clock source for SAI2/3 */ { frequency = EXTERNAL_CLOCK_VALUE; - 8030e70: 4b06 ldr r3, [pc, #24] ; (8030e8c ) - 8030e72: 63fb str r3, [r7, #60] ; 0x3c + 8030ea0: 4b06 ldr r3, [pc, #24] ; (8030ebc ) + 8030ea2: 63fb str r3, [r7, #60] ; 0x3c break; - 8030e74: e38e b.n 8031594 + 8030ea4: e38e b.n 80315c4 } default : { frequency = 0; - 8030e76: 2300 movs r3, #0 - 8030e78: 63fb str r3, [r7, #60] ; 0x3c + 8030ea6: 2300 movs r3, #0 + 8030ea8: 63fb str r3, [r7, #60] ; 0x3c break; - 8030e7a: e38b b.n 8031594 - 8030e7c: 58024400 .word 0x58024400 - 8030e80: 03d09000 .word 0x03d09000 - 8030e84: 003d0900 .word 0x003d0900 - 8030e88: 017d7840 .word 0x017d7840 - 8030e8c: 00bb8000 .word 0x00bb8000 + 8030eaa: e38b b.n 80315c4 + 8030eac: 58024400 .word 0x58024400 + 8030eb0: 03d09000 .word 0x03d09000 + 8030eb4: 003d0900 .word 0x003d0900 + 8030eb8: 017d7840 .word 0x017d7840 + 8030ebc: 00bb8000 .word 0x00bb8000 } } #endif #if defined(SAI4) else if (PeriphClk == RCC_PERIPHCLK_SAI4A) - 8030e90: 687b ldr r3, [r7, #4] - 8030e92: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8030e96: f040 809c bne.w 8030fd2 + 8030ec0: 687b ldr r3, [r7, #4] + 8030ec2: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 8030ec6: f040 809c bne.w 8031002 { saiclocksource= __HAL_RCC_GET_SAI4A_SOURCE(); - 8030e9a: 4b9d ldr r3, [pc, #628] ; (8031110 ) - 8030e9c: 6d9b ldr r3, [r3, #88] ; 0x58 - 8030e9e: f403 0360 and.w r3, r3, #14680064 ; 0xe00000 - 8030ea2: 633b str r3, [r7, #48] ; 0x30 + 8030eca: 4b9d ldr r3, [pc, #628] ; (8031140 ) + 8030ecc: 6d9b ldr r3, [r3, #88] ; 0x58 + 8030ece: f403 0360 and.w r3, r3, #14680064 ; 0xe00000 + 8030ed2: 633b str r3, [r7, #48] ; 0x30 switch (saiclocksource) - 8030ea4: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ea6: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 8030eaa: d054 beq.n 8030f56 - 8030eac: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030eae: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 8030eb2: f200 808b bhi.w 8030fcc - 8030eb6: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030eb8: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 - 8030ebc: f000 8083 beq.w 8030fc6 - 8030ec0: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ec2: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 - 8030ec6: f200 8081 bhi.w 8030fcc - 8030eca: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ecc: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 8030ed0: d02f beq.n 8030f32 - 8030ed2: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ed4: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 8030ed8: d878 bhi.n 8030fcc - 8030eda: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030edc: 2b00 cmp r3, #0 - 8030ede: d004 beq.n 8030eea - 8030ee0: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ee2: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 8030ee6: d012 beq.n 8030f0e - 8030ee8: e070 b.n 8030fcc + 8030ed4: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030ed6: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 8030eda: d054 beq.n 8030f86 + 8030edc: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030ede: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 8030ee2: f200 808b bhi.w 8030ffc + 8030ee6: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030ee8: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 + 8030eec: f000 8083 beq.w 8030ff6 + 8030ef0: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030ef2: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 + 8030ef6: f200 8081 bhi.w 8030ffc + 8030efa: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030efc: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 8030f00: d02f beq.n 8030f62 + 8030f02: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f04: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 8030f08: d878 bhi.n 8030ffc + 8030f0a: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f0c: 2b00 cmp r3, #0 + 8030f0e: d004 beq.n 8030f1a + 8030f10: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f12: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 8030f16: d012 beq.n 8030f3e + 8030f18: e070 b.n 8030ffc { case RCC_SAI4ACLKSOURCE_PLL: /* PLL1 is the clock source for SAI4A */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 8030eea: 4b89 ldr r3, [pc, #548] ; (8031110 ) - 8030eec: 681b ldr r3, [r3, #0] - 8030eee: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8030ef2: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8030ef6: d107 bne.n 8030f08 + 8030f1a: 4b89 ldr r3, [pc, #548] ; (8031140 ) + 8030f1c: 681b ldr r3, [r3, #0] + 8030f1e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8030f22: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8030f26: d107 bne.n 8030f38 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 8030ef8: f107 0324 add.w r3, r7, #36 ; 0x24 - 8030efc: 4618 mov r0, r3 - 8030efe: f000 fe15 bl 8031b2c + 8030f28: f107 0324 add.w r3, r7, #36 ; 0x24 + 8030f2c: 4618 mov r0, r3 + 8030f2e: f000 fe15 bl 8031b5c frequency = pll1_clocks.PLL1_Q_Frequency; - 8030f02: 6abb ldr r3, [r7, #40] ; 0x28 - 8030f04: 63fb str r3, [r7, #60] ; 0x3c + 8030f32: 6abb ldr r3, [r7, #40] ; 0x28 + 8030f34: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030f06: e345 b.n 8031594 + 8030f36: e345 b.n 80315c4 frequency = 0; - 8030f08: 2300 movs r3, #0 - 8030f0a: 63fb str r3, [r7, #60] ; 0x3c + 8030f38: 2300 movs r3, #0 + 8030f3a: 63fb str r3, [r7, #60] ; 0x3c break; - 8030f0c: e342 b.n 8031594 + 8030f3c: e342 b.n 80315c4 } case RCC_SAI4ACLKSOURCE_PLL2: /* PLLI2 is the clock source for SAI4A */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8030f0e: 4b80 ldr r3, [pc, #512] ; (8031110 ) - 8030f10: 681b ldr r3, [r3, #0] - 8030f12: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8030f16: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 8030f1a: d107 bne.n 8030f2c + 8030f3e: 4b80 ldr r3, [pc, #512] ; (8031140 ) + 8030f40: 681b ldr r3, [r3, #0] + 8030f42: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8030f46: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8030f4a: d107 bne.n 8030f5c { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8030f1c: f107 0318 add.w r3, r7, #24 - 8030f20: 4618 mov r0, r3 - 8030f22: f000 fb5b bl 80315dc + 8030f4c: f107 0318 add.w r3, r7, #24 + 8030f50: 4618 mov r0, r3 + 8030f52: f000 fb5b bl 803160c frequency = pll2_clocks.PLL2_P_Frequency; - 8030f26: 69bb ldr r3, [r7, #24] - 8030f28: 63fb str r3, [r7, #60] ; 0x3c + 8030f56: 69bb ldr r3, [r7, #24] + 8030f58: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030f2a: e333 b.n 8031594 + 8030f5a: e333 b.n 80315c4 frequency = 0; - 8030f2c: 2300 movs r3, #0 - 8030f2e: 63fb str r3, [r7, #60] ; 0x3c + 8030f5c: 2300 movs r3, #0 + 8030f5e: 63fb str r3, [r7, #60] ; 0x3c break; - 8030f30: e330 b.n 8031594 + 8030f60: e330 b.n 80315c4 } case RCC_SAI4ACLKSOURCE_PLL3: /* PLLI3 is the clock source for SAI4A */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 8030f32: 4b77 ldr r3, [pc, #476] ; (8031110 ) - 8030f34: 681b ldr r3, [r3, #0] - 8030f36: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8030f3a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030f3e: d107 bne.n 8030f50 + 8030f62: 4b77 ldr r3, [pc, #476] ; (8031140 ) + 8030f64: 681b ldr r3, [r3, #0] + 8030f66: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8030f6a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030f6e: d107 bne.n 8030f80 { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8030f40: f107 030c add.w r3, r7, #12 - 8030f44: 4618 mov r0, r3 - 8030f46: f000 fc9d bl 8031884 + 8030f70: f107 030c add.w r3, r7, #12 + 8030f74: 4618 mov r0, r3 + 8030f76: f000 fc9d bl 80318b4 frequency = pll3_clocks.PLL3_P_Frequency; - 8030f4a: 68fb ldr r3, [r7, #12] - 8030f4c: 63fb str r3, [r7, #60] ; 0x3c + 8030f7a: 68fb ldr r3, [r7, #12] + 8030f7c: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030f4e: e321 b.n 8031594 + 8030f7e: e321 b.n 80315c4 frequency = 0; - 8030f50: 2300 movs r3, #0 - 8030f52: 63fb str r3, [r7, #60] ; 0x3c + 8030f80: 2300 movs r3, #0 + 8030f82: 63fb str r3, [r7, #60] ; 0x3c break; - 8030f54: e31e b.n 8031594 + 8030f84: e31e b.n 80315c4 } case RCC_SAI4ACLKSOURCE_CLKP: /* CKPER is the clock source for SAI4A*/ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 8030f56: 4b6e ldr r3, [pc, #440] ; (8031110 ) - 8030f58: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030f5a: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 8030f5e: 637b str r3, [r7, #52] ; 0x34 + 8030f86: 4b6e ldr r3, [pc, #440] ; (8031140 ) + 8030f88: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030f8a: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 8030f8e: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 8030f60: 4b6b ldr r3, [pc, #428] ; (8031110 ) - 8030f62: 681b ldr r3, [r3, #0] - 8030f64: f003 0304 and.w r3, r3, #4 - 8030f68: 2b04 cmp r3, #4 - 8030f6a: d10c bne.n 8030f86 - 8030f6c: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030f6e: 2b00 cmp r3, #0 - 8030f70: d109 bne.n 8030f86 + 8030f90: 4b6b ldr r3, [pc, #428] ; (8031140 ) + 8030f92: 681b ldr r3, [r3, #0] + 8030f94: f003 0304 and.w r3, r3, #4 + 8030f98: 2b04 cmp r3, #4 + 8030f9a: d10c bne.n 8030fb6 + 8030f9c: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030f9e: 2b00 cmp r3, #0 + 8030fa0: d109 bne.n 8030fb6 { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8030f72: 4b67 ldr r3, [pc, #412] ; (8031110 ) - 8030f74: 681b ldr r3, [r3, #0] - 8030f76: 08db lsrs r3, r3, #3 - 8030f78: f003 0303 and.w r3, r3, #3 - 8030f7c: 4a65 ldr r2, [pc, #404] ; (8031114 ) - 8030f7e: fa22 f303 lsr.w r3, r2, r3 - 8030f82: 63fb str r3, [r7, #60] ; 0x3c - 8030f84: e01e b.n 8030fc4 + 8030fa2: 4b67 ldr r3, [pc, #412] ; (8031140 ) + 8030fa4: 681b ldr r3, [r3, #0] + 8030fa6: 08db lsrs r3, r3, #3 + 8030fa8: f003 0303 and.w r3, r3, #3 + 8030fac: 4a65 ldr r2, [pc, #404] ; (8031144 ) + 8030fae: fa22 f303 lsr.w r3, r2, r3 + 8030fb2: 63fb str r3, [r7, #60] ; 0x3c + 8030fb4: e01e b.n 8030ff4 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8030f86: 4b62 ldr r3, [pc, #392] ; (8031110 ) - 8030f88: 681b ldr r3, [r3, #0] - 8030f8a: f403 7380 and.w r3, r3, #256 ; 0x100 - 8030f8e: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030f92: d106 bne.n 8030fa2 - 8030f94: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030f96: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8030f9a: d102 bne.n 8030fa2 + 8030fb6: 4b62 ldr r3, [pc, #392] ; (8031140 ) + 8030fb8: 681b ldr r3, [r3, #0] + 8030fba: f403 7380 and.w r3, r3, #256 ; 0x100 + 8030fbe: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030fc2: d106 bne.n 8030fd2 + 8030fc4: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030fc6: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8030fca: d102 bne.n 8030fd2 { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 8030f9c: 4b5e ldr r3, [pc, #376] ; (8031118 ) - 8030f9e: 63fb str r3, [r7, #60] ; 0x3c - 8030fa0: e010 b.n 8030fc4 + 8030fcc: 4b5e ldr r3, [pc, #376] ; (8031148 ) + 8030fce: 63fb str r3, [r7, #60] ; 0x3c + 8030fd0: e010 b.n 8030ff4 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 8030fa2: 4b5b ldr r3, [pc, #364] ; (8031110 ) - 8030fa4: 681b ldr r3, [r3, #0] - 8030fa6: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8030faa: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8030fae: d106 bne.n 8030fbe - 8030fb0: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030fb2: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030fb6: d102 bne.n 8030fbe + 8030fd2: 4b5b ldr r3, [pc, #364] ; (8031140 ) + 8030fd4: 681b ldr r3, [r3, #0] + 8030fd6: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8030fda: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8030fde: d106 bne.n 8030fee + 8030fe0: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030fe2: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030fe6: d102 bne.n 8030fee { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8030fb8: 4b58 ldr r3, [pc, #352] ; (803111c ) - 8030fba: 63fb str r3, [r7, #60] ; 0x3c - 8030fbc: e002 b.n 8030fc4 + 8030fe8: 4b58 ldr r3, [pc, #352] ; (803114c ) + 8030fea: 63fb str r3, [r7, #60] ; 0x3c + 8030fec: e002 b.n 8030ff4 } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8030fbe: 2300 movs r3, #0 - 8030fc0: 63fb str r3, [r7, #60] ; 0x3c + 8030fee: 2300 movs r3, #0 + 8030ff0: 63fb str r3, [r7, #60] ; 0x3c } break; - 8030fc2: e2e7 b.n 8031594 - 8030fc4: e2e6 b.n 8031594 + 8030ff2: e2e7 b.n 80315c4 + 8030ff4: e2e6 b.n 80315c4 } case RCC_SAI4ACLKSOURCE_PIN: /* External clock is the clock source for SAI4A */ { frequency = EXTERNAL_CLOCK_VALUE; - 8030fc6: 4b56 ldr r3, [pc, #344] ; (8031120 ) - 8030fc8: 63fb str r3, [r7, #60] ; 0x3c + 8030ff6: 4b56 ldr r3, [pc, #344] ; (8031150 ) + 8030ff8: 63fb str r3, [r7, #60] ; 0x3c break; - 8030fca: e2e3 b.n 8031594 + 8030ffa: e2e3 b.n 80315c4 } default : { frequency = 0; - 8030fcc: 2300 movs r3, #0 - 8030fce: 63fb str r3, [r7, #60] ; 0x3c + 8030ffc: 2300 movs r3, #0 + 8030ffe: 63fb str r3, [r7, #60] ; 0x3c break; - 8030fd0: e2e0 b.n 8031594 + 8031000: e2e0 b.n 80315c4 } } } else if (PeriphClk == RCC_PERIPHCLK_SAI4B) - 8030fd2: 687b ldr r3, [r7, #4] - 8030fd4: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 8030fd8: f040 80a7 bne.w 803112a + 8031002: 687b ldr r3, [r7, #4] + 8031004: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 8031008: f040 80a7 bne.w 803115a { saiclocksource= __HAL_RCC_GET_SAI4B_SOURCE(); - 8030fdc: 4b4c ldr r3, [pc, #304] ; (8031110 ) - 8030fde: 6d9b ldr r3, [r3, #88] ; 0x58 - 8030fe0: f003 63e0 and.w r3, r3, #117440512 ; 0x7000000 - 8030fe4: 633b str r3, [r7, #48] ; 0x30 + 803100c: 4b4c ldr r3, [pc, #304] ; (8031140 ) + 803100e: 6d9b ldr r3, [r3, #88] ; 0x58 + 8031010: f003 63e0 and.w r3, r3, #117440512 ; 0x7000000 + 8031014: 633b str r3, [r7, #48] ; 0x30 switch (saiclocksource) - 8030fe6: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030fe8: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 - 8030fec: d055 beq.n 803109a - 8030fee: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ff0: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 - 8030ff4: f200 8096 bhi.w 8031124 - 8030ff8: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ffa: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 - 8030ffe: f000 8084 beq.w 803110a - 8031002: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031004: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 - 8031008: f200 808c bhi.w 8031124 - 803100c: 6b3b ldr r3, [r7, #48] ; 0x30 - 803100e: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8031012: d030 beq.n 8031076 - 8031014: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031016: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 803101a: f200 8083 bhi.w 8031124 + 8031016: 6b3b ldr r3, [r7, #48] ; 0x30 + 8031018: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 + 803101c: d055 beq.n 80310ca 803101e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031020: 2b00 cmp r3, #0 - 8031022: d004 beq.n 803102e - 8031024: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031026: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 803102a: d012 beq.n 8031052 - 803102c: e07a b.n 8031124 + 8031020: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 + 8031024: f200 8096 bhi.w 8031154 + 8031028: 6b3b ldr r3, [r7, #48] ; 0x30 + 803102a: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 + 803102e: f000 8084 beq.w 803113a + 8031032: 6b3b ldr r3, [r7, #48] ; 0x30 + 8031034: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 + 8031038: f200 808c bhi.w 8031154 + 803103c: 6b3b ldr r3, [r7, #48] ; 0x30 + 803103e: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8031042: d030 beq.n 80310a6 + 8031044: 6b3b ldr r3, [r7, #48] ; 0x30 + 8031046: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 803104a: f200 8083 bhi.w 8031154 + 803104e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8031050: 2b00 cmp r3, #0 + 8031052: d004 beq.n 803105e + 8031054: 6b3b ldr r3, [r7, #48] ; 0x30 + 8031056: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 803105a: d012 beq.n 8031082 + 803105c: e07a b.n 8031154 { case RCC_SAI4BCLKSOURCE_PLL: /* PLL1 is the clock source for SAI4B */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 803102e: 4b38 ldr r3, [pc, #224] ; (8031110 ) - 8031030: 681b ldr r3, [r3, #0] - 8031032: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8031036: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 803103a: d107 bne.n 803104c + 803105e: 4b38 ldr r3, [pc, #224] ; (8031140 ) + 8031060: 681b ldr r3, [r3, #0] + 8031062: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8031066: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 803106a: d107 bne.n 803107c { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 803103c: f107 0324 add.w r3, r7, #36 ; 0x24 - 8031040: 4618 mov r0, r3 - 8031042: f000 fd73 bl 8031b2c + 803106c: f107 0324 add.w r3, r7, #36 ; 0x24 + 8031070: 4618 mov r0, r3 + 8031072: f000 fd73 bl 8031b5c frequency = pll1_clocks.PLL1_Q_Frequency; - 8031046: 6abb ldr r3, [r7, #40] ; 0x28 - 8031048: 63fb str r3, [r7, #60] ; 0x3c + 8031076: 6abb ldr r3, [r7, #40] ; 0x28 + 8031078: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803104a: e2a3 b.n 8031594 + 803107a: e2a3 b.n 80315c4 frequency = 0; - 803104c: 2300 movs r3, #0 - 803104e: 63fb str r3, [r7, #60] ; 0x3c + 803107c: 2300 movs r3, #0 + 803107e: 63fb str r3, [r7, #60] ; 0x3c break; - 8031050: e2a0 b.n 8031594 + 8031080: e2a0 b.n 80315c4 } case RCC_SAI4BCLKSOURCE_PLL2: /* PLLI2 is the clock source for SAI4B */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8031052: 4b2f ldr r3, [pc, #188] ; (8031110 ) - 8031054: 681b ldr r3, [r3, #0] - 8031056: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 803105a: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 803105e: d107 bne.n 8031070 + 8031082: 4b2f ldr r3, [pc, #188] ; (8031140 ) + 8031084: 681b ldr r3, [r3, #0] + 8031086: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 803108a: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 803108e: d107 bne.n 80310a0 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8031060: f107 0318 add.w r3, r7, #24 - 8031064: 4618 mov r0, r3 - 8031066: f000 fab9 bl 80315dc + 8031090: f107 0318 add.w r3, r7, #24 + 8031094: 4618 mov r0, r3 + 8031096: f000 fab9 bl 803160c frequency = pll2_clocks.PLL2_P_Frequency; - 803106a: 69bb ldr r3, [r7, #24] - 803106c: 63fb str r3, [r7, #60] ; 0x3c + 803109a: 69bb ldr r3, [r7, #24] + 803109c: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803106e: e291 b.n 8031594 + 803109e: e291 b.n 80315c4 frequency = 0; - 8031070: 2300 movs r3, #0 - 8031072: 63fb str r3, [r7, #60] ; 0x3c + 80310a0: 2300 movs r3, #0 + 80310a2: 63fb str r3, [r7, #60] ; 0x3c break; - 8031074: e28e b.n 8031594 + 80310a4: e28e b.n 80315c4 } case RCC_SAI4BCLKSOURCE_PLL3: /* PLLI3 is the clock source for SAI4B */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 8031076: 4b26 ldr r3, [pc, #152] ; (8031110 ) - 8031078: 681b ldr r3, [r3, #0] - 803107a: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 803107e: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031082: d107 bne.n 8031094 + 80310a6: 4b26 ldr r3, [pc, #152] ; (8031140 ) + 80310a8: 681b ldr r3, [r3, #0] + 80310aa: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 80310ae: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80310b2: d107 bne.n 80310c4 { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8031084: f107 030c add.w r3, r7, #12 - 8031088: 4618 mov r0, r3 - 803108a: f000 fbfb bl 8031884 + 80310b4: f107 030c add.w r3, r7, #12 + 80310b8: 4618 mov r0, r3 + 80310ba: f000 fbfb bl 80318b4 frequency = pll3_clocks.PLL3_P_Frequency; - 803108e: 68fb ldr r3, [r7, #12] - 8031090: 63fb str r3, [r7, #60] ; 0x3c + 80310be: 68fb ldr r3, [r7, #12] + 80310c0: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8031092: e27f b.n 8031594 + 80310c2: e27f b.n 80315c4 frequency = 0; - 8031094: 2300 movs r3, #0 - 8031096: 63fb str r3, [r7, #60] ; 0x3c + 80310c4: 2300 movs r3, #0 + 80310c6: 63fb str r3, [r7, #60] ; 0x3c break; - 8031098: e27c b.n 8031594 + 80310c8: e27c b.n 80315c4 } case RCC_SAI4BCLKSOURCE_CLKP: /* CKPER is the clock source for SAI4B*/ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 803109a: 4b1d ldr r3, [pc, #116] ; (8031110 ) - 803109c: 6cdb ldr r3, [r3, #76] ; 0x4c - 803109e: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 80310a2: 637b str r3, [r7, #52] ; 0x34 + 80310ca: 4b1d ldr r3, [pc, #116] ; (8031140 ) + 80310cc: 6cdb ldr r3, [r3, #76] ; 0x4c + 80310ce: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 80310d2: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 80310a4: 4b1a ldr r3, [pc, #104] ; (8031110 ) - 80310a6: 681b ldr r3, [r3, #0] - 80310a8: f003 0304 and.w r3, r3, #4 - 80310ac: 2b04 cmp r3, #4 - 80310ae: d10c bne.n 80310ca - 80310b0: 6b7b ldr r3, [r7, #52] ; 0x34 - 80310b2: 2b00 cmp r3, #0 - 80310b4: d109 bne.n 80310ca + 80310d4: 4b1a ldr r3, [pc, #104] ; (8031140 ) + 80310d6: 681b ldr r3, [r3, #0] + 80310d8: f003 0304 and.w r3, r3, #4 + 80310dc: 2b04 cmp r3, #4 + 80310de: d10c bne.n 80310fa + 80310e0: 6b7b ldr r3, [r7, #52] ; 0x34 + 80310e2: 2b00 cmp r3, #0 + 80310e4: d109 bne.n 80310fa { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 80310b6: 4b16 ldr r3, [pc, #88] ; (8031110 ) - 80310b8: 681b ldr r3, [r3, #0] - 80310ba: 08db lsrs r3, r3, #3 - 80310bc: f003 0303 and.w r3, r3, #3 - 80310c0: 4a14 ldr r2, [pc, #80] ; (8031114 ) - 80310c2: fa22 f303 lsr.w r3, r2, r3 - 80310c6: 63fb str r3, [r7, #60] ; 0x3c - 80310c8: e01e b.n 8031108 + 80310e6: 4b16 ldr r3, [pc, #88] ; (8031140 ) + 80310e8: 681b ldr r3, [r3, #0] + 80310ea: 08db lsrs r3, r3, #3 + 80310ec: f003 0303 and.w r3, r3, #3 + 80310f0: 4a14 ldr r2, [pc, #80] ; (8031144 ) + 80310f2: fa22 f303 lsr.w r3, r2, r3 + 80310f6: 63fb str r3, [r7, #60] ; 0x3c + 80310f8: e01e b.n 8031138 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 80310ca: 4b11 ldr r3, [pc, #68] ; (8031110 ) - 80310cc: 681b ldr r3, [r3, #0] - 80310ce: f403 7380 and.w r3, r3, #256 ; 0x100 - 80310d2: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80310d6: d106 bne.n 80310e6 - 80310d8: 6b7b ldr r3, [r7, #52] ; 0x34 - 80310da: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 80310de: d102 bne.n 80310e6 + 80310fa: 4b11 ldr r3, [pc, #68] ; (8031140 ) + 80310fc: 681b ldr r3, [r3, #0] + 80310fe: f403 7380 and.w r3, r3, #256 ; 0x100 + 8031102: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8031106: d106 bne.n 8031116 + 8031108: 6b7b ldr r3, [r7, #52] ; 0x34 + 803110a: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 803110e: d102 bne.n 8031116 { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 80310e0: 4b0d ldr r3, [pc, #52] ; (8031118 ) - 80310e2: 63fb str r3, [r7, #60] ; 0x3c - 80310e4: e010 b.n 8031108 + 8031110: 4b0d ldr r3, [pc, #52] ; (8031148 ) + 8031112: 63fb str r3, [r7, #60] ; 0x3c + 8031114: e010 b.n 8031138 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 80310e6: 4b0a ldr r3, [pc, #40] ; (8031110 ) - 80310e8: 681b ldr r3, [r3, #0] - 80310ea: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80310ee: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80310f2: d106 bne.n 8031102 - 80310f4: 6b7b ldr r3, [r7, #52] ; 0x34 - 80310f6: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80310fa: d102 bne.n 8031102 + 8031116: 4b0a ldr r3, [pc, #40] ; (8031140 ) + 8031118: 681b ldr r3, [r3, #0] + 803111a: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 803111e: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8031122: d106 bne.n 8031132 + 8031124: 6b7b ldr r3, [r7, #52] ; 0x34 + 8031126: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803112a: d102 bne.n 8031132 { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 80310fc: 4b07 ldr r3, [pc, #28] ; (803111c ) - 80310fe: 63fb str r3, [r7, #60] ; 0x3c - 8031100: e002 b.n 8031108 + 803112c: 4b07 ldr r3, [pc, #28] ; (803114c ) + 803112e: 63fb str r3, [r7, #60] ; 0x3c + 8031130: e002 b.n 8031138 } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8031102: 2300 movs r3, #0 - 8031104: 63fb str r3, [r7, #60] ; 0x3c + 8031132: 2300 movs r3, #0 + 8031134: 63fb str r3, [r7, #60] ; 0x3c } break; - 8031106: e245 b.n 8031594 - 8031108: e244 b.n 8031594 + 8031136: e245 b.n 80315c4 + 8031138: e244 b.n 80315c4 } case RCC_SAI4BCLKSOURCE_PIN: /* External clock is the clock source for SAI4B */ { frequency = EXTERNAL_CLOCK_VALUE; - 803110a: 4b05 ldr r3, [pc, #20] ; (8031120 ) - 803110c: 63fb str r3, [r7, #60] ; 0x3c + 803113a: 4b05 ldr r3, [pc, #20] ; (8031150 ) + 803113c: 63fb str r3, [r7, #60] ; 0x3c break; - 803110e: e241 b.n 8031594 - 8031110: 58024400 .word 0x58024400 - 8031114: 03d09000 .word 0x03d09000 - 8031118: 003d0900 .word 0x003d0900 - 803111c: 017d7840 .word 0x017d7840 - 8031120: 00bb8000 .word 0x00bb8000 + 803113e: e241 b.n 80315c4 + 8031140: 58024400 .word 0x58024400 + 8031144: 03d09000 .word 0x03d09000 + 8031148: 003d0900 .word 0x003d0900 + 803114c: 017d7840 .word 0x017d7840 + 8031150: 00bb8000 .word 0x00bb8000 } default : { frequency = 0; - 8031124: 2300 movs r3, #0 - 8031126: 63fb str r3, [r7, #60] ; 0x3c + 8031154: 2300 movs r3, #0 + 8031156: 63fb str r3, [r7, #60] ; 0x3c break; - 8031128: e234 b.n 8031594 + 8031158: e234 b.n 80315c4 } } } #endif /*SAI4*/ else if (PeriphClk == RCC_PERIPHCLK_SPI123) - 803112a: 687b ldr r3, [r7, #4] - 803112c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8031130: f040 809c bne.w 803126c + 803115a: 687b ldr r3, [r7, #4] + 803115c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8031160: f040 809c bne.w 803129c { /* Get SPI1/2/3 clock source */ srcclk= __HAL_RCC_GET_SPI123_SOURCE(); - 8031134: 4b9b ldr r3, [pc, #620] ; (80313a4 ) - 8031136: 6d1b ldr r3, [r3, #80] ; 0x50 - 8031138: f403 43e0 and.w r3, r3, #28672 ; 0x7000 - 803113c: 63bb str r3, [r7, #56] ; 0x38 + 8031164: 4b9b ldr r3, [pc, #620] ; (80313d4 ) + 8031166: 6d1b ldr r3, [r3, #80] ; 0x50 + 8031168: f403 43e0 and.w r3, r3, #28672 ; 0x7000 + 803116c: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 803113e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031140: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8031144: d054 beq.n 80311f0 - 8031146: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031148: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 803114c: f200 808b bhi.w 8031266 - 8031150: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031152: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 8031156: f000 8083 beq.w 8031260 - 803115a: 6bbb ldr r3, [r7, #56] ; 0x38 - 803115c: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 8031160: f200 8081 bhi.w 8031266 - 8031164: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031166: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 803116a: d02f beq.n 80311cc - 803116c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803116e: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8031172: d878 bhi.n 8031266 - 8031174: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031176: 2b00 cmp r3, #0 - 8031178: d004 beq.n 8031184 - 803117a: 6bbb ldr r3, [r7, #56] ; 0x38 - 803117c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8031180: d012 beq.n 80311a8 - 8031182: e070 b.n 8031266 + 803116e: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031170: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8031174: d054 beq.n 8031220 + 8031176: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031178: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 803117c: f200 808b bhi.w 8031296 + 8031180: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031182: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 8031186: f000 8083 beq.w 8031290 + 803118a: 6bbb ldr r3, [r7, #56] ; 0x38 + 803118c: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 8031190: f200 8081 bhi.w 8031296 + 8031194: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031196: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 803119a: d02f beq.n 80311fc + 803119c: 6bbb ldr r3, [r7, #56] ; 0x38 + 803119e: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 80311a2: d878 bhi.n 8031296 + 80311a4: 6bbb ldr r3, [r7, #56] ; 0x38 + 80311a6: 2b00 cmp r3, #0 + 80311a8: d004 beq.n 80311b4 + 80311aa: 6bbb ldr r3, [r7, #56] ; 0x38 + 80311ac: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80311b0: d012 beq.n 80311d8 + 80311b2: e070 b.n 8031296 { case RCC_SPI123CLKSOURCE_PLL: /* PLL1 is the clock source for SPI123 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 8031184: 4b87 ldr r3, [pc, #540] ; (80313a4 ) - 8031186: 681b ldr r3, [r3, #0] - 8031188: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 803118c: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8031190: d107 bne.n 80311a2 + 80311b4: 4b87 ldr r3, [pc, #540] ; (80313d4 ) + 80311b6: 681b ldr r3, [r3, #0] + 80311b8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80311bc: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 80311c0: d107 bne.n 80311d2 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 8031192: f107 0324 add.w r3, r7, #36 ; 0x24 - 8031196: 4618 mov r0, r3 - 8031198: f000 fcc8 bl 8031b2c + 80311c2: f107 0324 add.w r3, r7, #36 ; 0x24 + 80311c6: 4618 mov r0, r3 + 80311c8: f000 fcc8 bl 8031b5c frequency = pll1_clocks.PLL1_Q_Frequency; - 803119c: 6abb ldr r3, [r7, #40] ; 0x28 - 803119e: 63fb str r3, [r7, #60] ; 0x3c + 80311cc: 6abb ldr r3, [r7, #40] ; 0x28 + 80311ce: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80311a0: e1f8 b.n 8031594 + 80311d0: e1f8 b.n 80315c4 frequency = 0; - 80311a2: 2300 movs r3, #0 - 80311a4: 63fb str r3, [r7, #60] ; 0x3c + 80311d2: 2300 movs r3, #0 + 80311d4: 63fb str r3, [r7, #60] ; 0x3c break; - 80311a6: e1f5 b.n 8031594 + 80311d6: e1f5 b.n 80315c4 } case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is the clock source for SPI123 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 80311a8: 4b7e ldr r3, [pc, #504] ; (80313a4 ) - 80311aa: 681b ldr r3, [r3, #0] - 80311ac: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 80311b0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 80311b4: d107 bne.n 80311c6 + 80311d8: 4b7e ldr r3, [pc, #504] ; (80313d4 ) + 80311da: 681b ldr r3, [r3, #0] + 80311dc: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 80311e0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 80311e4: d107 bne.n 80311f6 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 80311b6: f107 0318 add.w r3, r7, #24 - 80311ba: 4618 mov r0, r3 - 80311bc: f000 fa0e bl 80315dc + 80311e6: f107 0318 add.w r3, r7, #24 + 80311ea: 4618 mov r0, r3 + 80311ec: f000 fa0e bl 803160c frequency = pll2_clocks.PLL2_P_Frequency; - 80311c0: 69bb ldr r3, [r7, #24] - 80311c2: 63fb str r3, [r7, #60] ; 0x3c + 80311f0: 69bb ldr r3, [r7, #24] + 80311f2: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80311c4: e1e6 b.n 8031594 + 80311f4: e1e6 b.n 80315c4 frequency = 0; - 80311c6: 2300 movs r3, #0 - 80311c8: 63fb str r3, [r7, #60] ; 0x3c + 80311f6: 2300 movs r3, #0 + 80311f8: 63fb str r3, [r7, #60] ; 0x3c break; - 80311ca: e1e3 b.n 8031594 + 80311fa: e1e3 b.n 80315c4 } case RCC_SPI123CLKSOURCE_PLL3: /* PLL3 is the clock source for SPI123 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 80311cc: 4b75 ldr r3, [pc, #468] ; (80313a4 ) - 80311ce: 681b ldr r3, [r3, #0] - 80311d0: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 80311d4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80311d8: d107 bne.n 80311ea + 80311fc: 4b75 ldr r3, [pc, #468] ; (80313d4 ) + 80311fe: 681b ldr r3, [r3, #0] + 8031200: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8031204: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8031208: d107 bne.n 803121a { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 80311da: f107 030c add.w r3, r7, #12 - 80311de: 4618 mov r0, r3 - 80311e0: f000 fb50 bl 8031884 + 803120a: f107 030c add.w r3, r7, #12 + 803120e: 4618 mov r0, r3 + 8031210: f000 fb50 bl 80318b4 frequency = pll3_clocks.PLL3_P_Frequency; - 80311e4: 68fb ldr r3, [r7, #12] - 80311e6: 63fb str r3, [r7, #60] ; 0x3c + 8031214: 68fb ldr r3, [r7, #12] + 8031216: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80311e8: e1d4 b.n 8031594 + 8031218: e1d4 b.n 80315c4 frequency = 0; - 80311ea: 2300 movs r3, #0 - 80311ec: 63fb str r3, [r7, #60] ; 0x3c + 803121a: 2300 movs r3, #0 + 803121c: 63fb str r3, [r7, #60] ; 0x3c break; - 80311ee: e1d1 b.n 8031594 + 803121e: e1d1 b.n 80315c4 } case RCC_SPI123CLKSOURCE_CLKP: /* CKPER is the clock source for SPI123 */ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 80311f0: 4b6c ldr r3, [pc, #432] ; (80313a4 ) - 80311f2: 6cdb ldr r3, [r3, #76] ; 0x4c - 80311f4: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 80311f8: 637b str r3, [r7, #52] ; 0x34 + 8031220: 4b6c ldr r3, [pc, #432] ; (80313d4 ) + 8031222: 6cdb ldr r3, [r3, #76] ; 0x4c + 8031224: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 8031228: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 80311fa: 4b6a ldr r3, [pc, #424] ; (80313a4 ) - 80311fc: 681b ldr r3, [r3, #0] - 80311fe: f003 0304 and.w r3, r3, #4 - 8031202: 2b04 cmp r3, #4 - 8031204: d10c bne.n 8031220 - 8031206: 6b7b ldr r3, [r7, #52] ; 0x34 - 8031208: 2b00 cmp r3, #0 - 803120a: d109 bne.n 8031220 + 803122a: 4b6a ldr r3, [pc, #424] ; (80313d4 ) + 803122c: 681b ldr r3, [r3, #0] + 803122e: f003 0304 and.w r3, r3, #4 + 8031232: 2b04 cmp r3, #4 + 8031234: d10c bne.n 8031250 + 8031236: 6b7b ldr r3, [r7, #52] ; 0x34 + 8031238: 2b00 cmp r3, #0 + 803123a: d109 bne.n 8031250 { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 803120c: 4b65 ldr r3, [pc, #404] ; (80313a4 ) - 803120e: 681b ldr r3, [r3, #0] - 8031210: 08db lsrs r3, r3, #3 - 8031212: f003 0303 and.w r3, r3, #3 - 8031216: 4a64 ldr r2, [pc, #400] ; (80313a8 ) - 8031218: fa22 f303 lsr.w r3, r2, r3 - 803121c: 63fb str r3, [r7, #60] ; 0x3c - 803121e: e01e b.n 803125e + 803123c: 4b65 ldr r3, [pc, #404] ; (80313d4 ) + 803123e: 681b ldr r3, [r3, #0] + 8031240: 08db lsrs r3, r3, #3 + 8031242: f003 0303 and.w r3, r3, #3 + 8031246: 4a64 ldr r2, [pc, #400] ; (80313d8 ) + 8031248: fa22 f303 lsr.w r3, r2, r3 + 803124c: 63fb str r3, [r7, #60] ; 0x3c + 803124e: e01e b.n 803128e } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8031220: 4b60 ldr r3, [pc, #384] ; (80313a4 ) - 8031222: 681b ldr r3, [r3, #0] - 8031224: f403 7380 and.w r3, r3, #256 ; 0x100 - 8031228: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803122c: d106 bne.n 803123c - 803122e: 6b7b ldr r3, [r7, #52] ; 0x34 - 8031230: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8031234: d102 bne.n 803123c + 8031250: 4b60 ldr r3, [pc, #384] ; (80313d4 ) + 8031252: 681b ldr r3, [r3, #0] + 8031254: f403 7380 and.w r3, r3, #256 ; 0x100 + 8031258: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 803125c: d106 bne.n 803126c + 803125e: 6b7b ldr r3, [r7, #52] ; 0x34 + 8031260: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8031264: d102 bne.n 803126c { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 8031236: 4b5d ldr r3, [pc, #372] ; (80313ac ) - 8031238: 63fb str r3, [r7, #60] ; 0x3c - 803123a: e010 b.n 803125e + 8031266: 4b5d ldr r3, [pc, #372] ; (80313dc ) + 8031268: 63fb str r3, [r7, #60] ; 0x3c + 803126a: e010 b.n 803128e } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 803123c: 4b59 ldr r3, [pc, #356] ; (80313a4 ) - 803123e: 681b ldr r3, [r3, #0] - 8031240: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8031244: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8031248: d106 bne.n 8031258 - 803124a: 6b7b ldr r3, [r7, #52] ; 0x34 - 803124c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031250: d102 bne.n 8031258 + 803126c: 4b59 ldr r3, [pc, #356] ; (80313d4 ) + 803126e: 681b ldr r3, [r3, #0] + 8031270: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8031274: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8031278: d106 bne.n 8031288 + 803127a: 6b7b ldr r3, [r7, #52] ; 0x34 + 803127c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8031280: d102 bne.n 8031288 { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8031252: 4b57 ldr r3, [pc, #348] ; (80313b0 ) - 8031254: 63fb str r3, [r7, #60] ; 0x3c - 8031256: e002 b.n 803125e + 8031282: 4b57 ldr r3, [pc, #348] ; (80313e0 ) + 8031284: 63fb str r3, [r7, #60] ; 0x3c + 8031286: e002 b.n 803128e } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8031258: 2300 movs r3, #0 - 803125a: 63fb str r3, [r7, #60] ; 0x3c + 8031288: 2300 movs r3, #0 + 803128a: 63fb str r3, [r7, #60] ; 0x3c } break; - 803125c: e19a b.n 8031594 - 803125e: e199 b.n 8031594 + 803128c: e19a b.n 80315c4 + 803128e: e199 b.n 80315c4 } case (RCC_SPI123CLKSOURCE_PIN): /* External clock is the clock source for I2S */ { frequency = EXTERNAL_CLOCK_VALUE; - 8031260: 4b54 ldr r3, [pc, #336] ; (80313b4 ) - 8031262: 63fb str r3, [r7, #60] ; 0x3c + 8031290: 4b54 ldr r3, [pc, #336] ; (80313e4 ) + 8031292: 63fb str r3, [r7, #60] ; 0x3c break; - 8031264: e196 b.n 8031594 + 8031294: e196 b.n 80315c4 } default : { frequency = 0; - 8031266: 2300 movs r3, #0 - 8031268: 63fb str r3, [r7, #60] ; 0x3c + 8031296: 2300 movs r3, #0 + 8031298: 63fb str r3, [r7, #60] ; 0x3c break; - 803126a: e193 b.n 8031594 + 803129a: e193 b.n 80315c4 } } } else if (PeriphClk == RCC_PERIPHCLK_ADC) - 803126c: 687b ldr r3, [r7, #4] - 803126e: f5b3 2f00 cmp.w r3, #524288 ; 0x80000 - 8031272: d173 bne.n 803135c + 803129c: 687b ldr r3, [r7, #4] + 803129e: f5b3 2f00 cmp.w r3, #524288 ; 0x80000 + 80312a2: d173 bne.n 803138c { /* Get ADC clock source */ srcclk= __HAL_RCC_GET_ADC_SOURCE(); - 8031274: 4b4b ldr r3, [pc, #300] ; (80313a4 ) - 8031276: 6d9b ldr r3, [r3, #88] ; 0x58 - 8031278: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 803127c: 63bb str r3, [r7, #56] ; 0x38 + 80312a4: 4b4b ldr r3, [pc, #300] ; (80313d4 ) + 80312a6: 6d9b ldr r3, [r3, #88] ; 0x58 + 80312a8: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 80312ac: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 803127e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031280: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8031284: d02f beq.n 80312e6 - 8031286: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031288: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 803128c: d863 bhi.n 8031356 - 803128e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031290: 2b00 cmp r3, #0 - 8031292: d004 beq.n 803129e - 8031294: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031296: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803129a: d012 beq.n 80312c2 - 803129c: e05b b.n 8031356 + 80312ae: 6bbb ldr r3, [r7, #56] ; 0x38 + 80312b0: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80312b4: d02f beq.n 8031316 + 80312b6: 6bbb ldr r3, [r7, #56] ; 0x38 + 80312b8: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80312bc: d863 bhi.n 8031386 + 80312be: 6bbb ldr r3, [r7, #56] ; 0x38 + 80312c0: 2b00 cmp r3, #0 + 80312c2: d004 beq.n 80312ce + 80312c4: 6bbb ldr r3, [r7, #56] ; 0x38 + 80312c6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80312ca: d012 beq.n 80312f2 + 80312cc: e05b b.n 8031386 { case RCC_ADCCLKSOURCE_PLL2: { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 803129e: 4b41 ldr r3, [pc, #260] ; (80313a4 ) - 80312a0: 681b ldr r3, [r3, #0] - 80312a2: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 80312a6: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 80312aa: d107 bne.n 80312bc + 80312ce: 4b41 ldr r3, [pc, #260] ; (80313d4 ) + 80312d0: 681b ldr r3, [r3, #0] + 80312d2: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 80312d6: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 80312da: d107 bne.n 80312ec { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 80312ac: f107 0318 add.w r3, r7, #24 - 80312b0: 4618 mov r0, r3 - 80312b2: f000 f993 bl 80315dc + 80312dc: f107 0318 add.w r3, r7, #24 + 80312e0: 4618 mov r0, r3 + 80312e2: f000 f993 bl 803160c frequency = pll2_clocks.PLL2_P_Frequency; - 80312b6: 69bb ldr r3, [r7, #24] - 80312b8: 63fb str r3, [r7, #60] ; 0x3c + 80312e6: 69bb ldr r3, [r7, #24] + 80312e8: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80312ba: e16b b.n 8031594 + 80312ea: e16b b.n 80315c4 frequency = 0; - 80312bc: 2300 movs r3, #0 - 80312be: 63fb str r3, [r7, #60] ; 0x3c + 80312ec: 2300 movs r3, #0 + 80312ee: 63fb str r3, [r7, #60] ; 0x3c break; - 80312c0: e168 b.n 8031594 + 80312f0: e168 b.n 80315c4 } case RCC_ADCCLKSOURCE_PLL3: { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 80312c2: 4b38 ldr r3, [pc, #224] ; (80313a4 ) - 80312c4: 681b ldr r3, [r3, #0] - 80312c6: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 80312ca: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80312ce: d107 bne.n 80312e0 + 80312f2: 4b38 ldr r3, [pc, #224] ; (80313d4 ) + 80312f4: 681b ldr r3, [r3, #0] + 80312f6: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 80312fa: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80312fe: d107 bne.n 8031310 { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 80312d0: f107 030c add.w r3, r7, #12 - 80312d4: 4618 mov r0, r3 - 80312d6: f000 fad5 bl 8031884 + 8031300: f107 030c add.w r3, r7, #12 + 8031304: 4618 mov r0, r3 + 8031306: f000 fad5 bl 80318b4 frequency = pll3_clocks.PLL3_R_Frequency; - 80312da: 697b ldr r3, [r7, #20] - 80312dc: 63fb str r3, [r7, #60] ; 0x3c + 803130a: 697b ldr r3, [r7, #20] + 803130c: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80312de: e159 b.n 8031594 + 803130e: e159 b.n 80315c4 frequency = 0; - 80312e0: 2300 movs r3, #0 - 80312e2: 63fb str r3, [r7, #60] ; 0x3c + 8031310: 2300 movs r3, #0 + 8031312: 63fb str r3, [r7, #60] ; 0x3c break; - 80312e4: e156 b.n 8031594 + 8031314: e156 b.n 80315c4 } case RCC_ADCCLKSOURCE_CLKP: { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 80312e6: 4b2f ldr r3, [pc, #188] ; (80313a4 ) - 80312e8: 6cdb ldr r3, [r3, #76] ; 0x4c - 80312ea: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 80312ee: 637b str r3, [r7, #52] ; 0x34 + 8031316: 4b2f ldr r3, [pc, #188] ; (80313d4 ) + 8031318: 6cdb ldr r3, [r3, #76] ; 0x4c + 803131a: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 803131e: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 80312f0: 4b2c ldr r3, [pc, #176] ; (80313a4 ) - 80312f2: 681b ldr r3, [r3, #0] - 80312f4: f003 0304 and.w r3, r3, #4 - 80312f8: 2b04 cmp r3, #4 - 80312fa: d10c bne.n 8031316 - 80312fc: 6b7b ldr r3, [r7, #52] ; 0x34 - 80312fe: 2b00 cmp r3, #0 - 8031300: d109 bne.n 8031316 + 8031320: 4b2c ldr r3, [pc, #176] ; (80313d4 ) + 8031322: 681b ldr r3, [r3, #0] + 8031324: f003 0304 and.w r3, r3, #4 + 8031328: 2b04 cmp r3, #4 + 803132a: d10c bne.n 8031346 + 803132c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803132e: 2b00 cmp r3, #0 + 8031330: d109 bne.n 8031346 { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8031302: 4b28 ldr r3, [pc, #160] ; (80313a4 ) - 8031304: 681b ldr r3, [r3, #0] - 8031306: 08db lsrs r3, r3, #3 - 8031308: f003 0303 and.w r3, r3, #3 - 803130c: 4a26 ldr r2, [pc, #152] ; (80313a8 ) - 803130e: fa22 f303 lsr.w r3, r2, r3 - 8031312: 63fb str r3, [r7, #60] ; 0x3c - 8031314: e01e b.n 8031354 + 8031332: 4b28 ldr r3, [pc, #160] ; (80313d4 ) + 8031334: 681b ldr r3, [r3, #0] + 8031336: 08db lsrs r3, r3, #3 + 8031338: f003 0303 and.w r3, r3, #3 + 803133c: 4a26 ldr r2, [pc, #152] ; (80313d8 ) + 803133e: fa22 f303 lsr.w r3, r2, r3 + 8031342: 63fb str r3, [r7, #60] ; 0x3c + 8031344: e01e b.n 8031384 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8031316: 4b23 ldr r3, [pc, #140] ; (80313a4 ) - 8031318: 681b ldr r3, [r3, #0] - 803131a: f403 7380 and.w r3, r3, #256 ; 0x100 - 803131e: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8031322: d106 bne.n 8031332 - 8031324: 6b7b ldr r3, [r7, #52] ; 0x34 - 8031326: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 803132a: d102 bne.n 8031332 + 8031346: 4b23 ldr r3, [pc, #140] ; (80313d4 ) + 8031348: 681b ldr r3, [r3, #0] + 803134a: f403 7380 and.w r3, r3, #256 ; 0x100 + 803134e: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8031352: d106 bne.n 8031362 + 8031354: 6b7b ldr r3, [r7, #52] ; 0x34 + 8031356: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 803135a: d102 bne.n 8031362 { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 803132c: 4b1f ldr r3, [pc, #124] ; (80313ac ) - 803132e: 63fb str r3, [r7, #60] ; 0x3c - 8031330: e010 b.n 8031354 + 803135c: 4b1f ldr r3, [pc, #124] ; (80313dc ) + 803135e: 63fb str r3, [r7, #60] ; 0x3c + 8031360: e010 b.n 8031384 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 8031332: 4b1c ldr r3, [pc, #112] ; (80313a4 ) - 8031334: 681b ldr r3, [r3, #0] - 8031336: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 803133a: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 803133e: d106 bne.n 803134e - 8031340: 6b7b ldr r3, [r7, #52] ; 0x34 - 8031342: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031346: d102 bne.n 803134e + 8031362: 4b1c ldr r3, [pc, #112] ; (80313d4 ) + 8031364: 681b ldr r3, [r3, #0] + 8031366: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 803136a: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 803136e: d106 bne.n 803137e + 8031370: 6b7b ldr r3, [r7, #52] ; 0x34 + 8031372: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8031376: d102 bne.n 803137e { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8031348: 4b19 ldr r3, [pc, #100] ; (80313b0 ) - 803134a: 63fb str r3, [r7, #60] ; 0x3c - 803134c: e002 b.n 8031354 + 8031378: 4b19 ldr r3, [pc, #100] ; (80313e0 ) + 803137a: 63fb str r3, [r7, #60] ; 0x3c + 803137c: e002 b.n 8031384 } else { /* In Case the CKPER is disabled*/ frequency = 0; - 803134e: 2300 movs r3, #0 - 8031350: 63fb str r3, [r7, #60] ; 0x3c + 803137e: 2300 movs r3, #0 + 8031380: 63fb str r3, [r7, #60] ; 0x3c } break; - 8031352: e11f b.n 8031594 - 8031354: e11e b.n 8031594 + 8031382: e11f b.n 80315c4 + 8031384: e11e b.n 80315c4 } default : { frequency = 0; - 8031356: 2300 movs r3, #0 - 8031358: 63fb str r3, [r7, #60] ; 0x3c + 8031386: 2300 movs r3, #0 + 8031388: 63fb str r3, [r7, #60] ; 0x3c break; - 803135a: e11b b.n 8031594 + 803138a: e11b b.n 80315c4 } } } else if (PeriphClk == RCC_PERIPHCLK_SDMMC) - 803135c: 687b ldr r3, [r7, #4] - 803135e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8031362: d13e bne.n 80313e2 + 803138c: 687b ldr r3, [r7, #4] + 803138e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8031392: d13e bne.n 8031412 { /* Get SDMMC clock source */ srcclk= __HAL_RCC_GET_SDMMC_SOURCE(); - 8031364: 4b0f ldr r3, [pc, #60] ; (80313a4 ) - 8031366: 6cdb ldr r3, [r3, #76] ; 0x4c - 8031368: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 803136c: 63bb str r3, [r7, #56] ; 0x38 + 8031394: 4b0f ldr r3, [pc, #60] ; (80313d4 ) + 8031396: 6cdb ldr r3, [r3, #76] ; 0x4c + 8031398: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 803139c: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 803136e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031370: 2b00 cmp r3, #0 - 8031372: d004 beq.n 803137e - 8031374: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031376: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803137a: d01d beq.n 80313b8 - 803137c: e02e b.n 80313dc + 803139e: 6bbb ldr r3, [r7, #56] ; 0x38 + 80313a0: 2b00 cmp r3, #0 + 80313a2: d004 beq.n 80313ae + 80313a4: 6bbb ldr r3, [r7, #56] ; 0x38 + 80313a6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80313aa: d01d beq.n 80313e8 + 80313ac: e02e b.n 803140c { case RCC_SDMMCCLKSOURCE_PLL: /* PLL1 is the clock source for SDMMC */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 803137e: 4b09 ldr r3, [pc, #36] ; (80313a4 ) - 8031380: 681b ldr r3, [r3, #0] - 8031382: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8031386: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 803138a: d107 bne.n 803139c + 80313ae: 4b09 ldr r3, [pc, #36] ; (80313d4 ) + 80313b0: 681b ldr r3, [r3, #0] + 80313b2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80313b6: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 80313ba: d107 bne.n 80313cc { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 803138c: f107 0324 add.w r3, r7, #36 ; 0x24 - 8031390: 4618 mov r0, r3 - 8031392: f000 fbcb bl 8031b2c + 80313bc: f107 0324 add.w r3, r7, #36 ; 0x24 + 80313c0: 4618 mov r0, r3 + 80313c2: f000 fbcb bl 8031b5c frequency = pll1_clocks.PLL1_Q_Frequency; - 8031396: 6abb ldr r3, [r7, #40] ; 0x28 - 8031398: 63fb str r3, [r7, #60] ; 0x3c + 80313c6: 6abb ldr r3, [r7, #40] ; 0x28 + 80313c8: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803139a: e0fb b.n 8031594 + 80313ca: e0fb b.n 80315c4 frequency = 0; - 803139c: 2300 movs r3, #0 - 803139e: 63fb str r3, [r7, #60] ; 0x3c + 80313cc: 2300 movs r3, #0 + 80313ce: 63fb str r3, [r7, #60] ; 0x3c break; - 80313a0: e0f8 b.n 8031594 - 80313a2: bf00 nop - 80313a4: 58024400 .word 0x58024400 - 80313a8: 03d09000 .word 0x03d09000 - 80313ac: 003d0900 .word 0x003d0900 - 80313b0: 017d7840 .word 0x017d7840 - 80313b4: 00bb8000 .word 0x00bb8000 + 80313d0: e0f8 b.n 80315c4 + 80313d2: bf00 nop + 80313d4: 58024400 .word 0x58024400 + 80313d8: 03d09000 .word 0x03d09000 + 80313dc: 003d0900 .word 0x003d0900 + 80313e0: 017d7840 .word 0x017d7840 + 80313e4: 00bb8000 .word 0x00bb8000 } case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is the clock source for SDMMC */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 80313b8: 4b79 ldr r3, [pc, #484] ; (80315a0 ) - 80313ba: 681b ldr r3, [r3, #0] - 80313bc: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 80313c0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 80313c4: d107 bne.n 80313d6 + 80313e8: 4b79 ldr r3, [pc, #484] ; (80315d0 ) + 80313ea: 681b ldr r3, [r3, #0] + 80313ec: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 80313f0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 80313f4: d107 bne.n 8031406 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 80313c6: f107 0318 add.w r3, r7, #24 - 80313ca: 4618 mov r0, r3 - 80313cc: f000 f906 bl 80315dc + 80313f6: f107 0318 add.w r3, r7, #24 + 80313fa: 4618 mov r0, r3 + 80313fc: f000 f906 bl 803160c frequency = pll2_clocks.PLL2_R_Frequency; - 80313d0: 6a3b ldr r3, [r7, #32] - 80313d2: 63fb str r3, [r7, #60] ; 0x3c + 8031400: 6a3b ldr r3, [r7, #32] + 8031402: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80313d4: e0de b.n 8031594 + 8031404: e0de b.n 80315c4 frequency = 0; - 80313d6: 2300 movs r3, #0 - 80313d8: 63fb str r3, [r7, #60] ; 0x3c + 8031406: 2300 movs r3, #0 + 8031408: 63fb str r3, [r7, #60] ; 0x3c break; - 80313da: e0db b.n 8031594 + 803140a: e0db b.n 80315c4 } default : { frequency = 0; - 80313dc: 2300 movs r3, #0 - 80313de: 63fb str r3, [r7, #60] ; 0x3c + 803140c: 2300 movs r3, #0 + 803140e: 63fb str r3, [r7, #60] ; 0x3c break; - 80313e0: e0d8 b.n 8031594 + 8031410: e0d8 b.n 80315c4 } } } else if (PeriphClk == RCC_PERIPHCLK_SPI6) - 80313e2: 687b ldr r3, [r7, #4] - 80313e4: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 80313e8: f040 8085 bne.w 80314f6 + 8031412: 687b ldr r3, [r7, #4] + 8031414: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8031418: f040 8085 bne.w 8031526 { /* Get SPI6 clock source */ srcclk= __HAL_RCC_GET_SPI6_SOURCE(); - 80313ec: 4b6c ldr r3, [pc, #432] ; (80315a0 ) - 80313ee: 6d9b ldr r3, [r3, #88] ; 0x58 - 80313f0: f003 43e0 and.w r3, r3, #1879048192 ; 0x70000000 - 80313f4: 63bb str r3, [r7, #56] ; 0x38 + 803141c: 4b6c ldr r3, [pc, #432] ; (80315d0 ) + 803141e: 6d9b ldr r3, [r3, #88] ; 0x58 + 8031420: f003 43e0 and.w r3, r3, #1879048192 ; 0x70000000 + 8031424: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 80313f6: 6bbb ldr r3, [r7, #56] ; 0x38 - 80313f8: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 80313fc: d06b beq.n 80314d6 - 80313fe: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031400: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8031404: d874 bhi.n 80314f0 - 8031406: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031408: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 803140c: d056 beq.n 80314bc - 803140e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031410: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8031414: d86c bhi.n 80314f0 - 8031416: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031418: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 803141c: d03b beq.n 8031496 - 803141e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031420: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 8031424: d864 bhi.n 80314f0 8031426: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031428: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 803142c: d021 beq.n 8031472 + 8031428: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 803142c: d06b beq.n 8031506 803142e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031430: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031434: d85c bhi.n 80314f0 + 8031430: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 8031434: d874 bhi.n 8031520 8031436: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031438: 2b00 cmp r3, #0 - 803143a: d004 beq.n 8031446 - 803143c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803143e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8031442: d004 beq.n 803144e - 8031444: e054 b.n 80314f0 + 8031438: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 803143c: d056 beq.n 80314ec + 803143e: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031440: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8031444: d86c bhi.n 8031520 + 8031446: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031448: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 803144c: d03b beq.n 80314c6 + 803144e: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031450: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 8031454: d864 bhi.n 8031520 + 8031456: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031458: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803145c: d021 beq.n 80314a2 + 803145e: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031460: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8031464: d85c bhi.n 8031520 + 8031466: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031468: 2b00 cmp r3, #0 + 803146a: d004 beq.n 8031476 + 803146c: 6bbb ldr r3, [r7, #56] ; 0x38 + 803146e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8031472: d004 beq.n 803147e + 8031474: e054 b.n 8031520 { case RCC_SPI6CLKSOURCE_D3PCLK1: /* D3PCLK1 (PCLK4) is the clock source for SPI6 */ { frequency = HAL_RCCEx_GetD3PCLK1Freq(); - 8031446: f000 f8b3 bl 80315b0 - 803144a: 63f8 str r0, [r7, #60] ; 0x3c + 8031476: f000 f8b3 bl 80315e0 + 803147a: 63f8 str r0, [r7, #60] ; 0x3c break; - 803144c: e0a2 b.n 8031594 + 803147c: e0a2 b.n 80315c4 } case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 803144e: 4b54 ldr r3, [pc, #336] ; (80315a0 ) - 8031450: 681b ldr r3, [r3, #0] - 8031452: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8031456: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 803145a: d107 bne.n 803146c + 803147e: 4b54 ldr r3, [pc, #336] ; (80315d0 ) + 8031480: 681b ldr r3, [r3, #0] + 8031482: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8031486: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 803148a: d107 bne.n 803149c { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 803145c: f107 0318 add.w r3, r7, #24 - 8031460: 4618 mov r0, r3 - 8031462: f000 f8bb bl 80315dc + 803148c: f107 0318 add.w r3, r7, #24 + 8031490: 4618 mov r0, r3 + 8031492: f000 f8bb bl 803160c frequency = pll2_clocks.PLL2_Q_Frequency; - 8031466: 69fb ldr r3, [r7, #28] - 8031468: 63fb str r3, [r7, #60] ; 0x3c + 8031496: 69fb ldr r3, [r7, #28] + 8031498: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803146a: e093 b.n 8031594 + 803149a: e093 b.n 80315c4 frequency = 0; - 803146c: 2300 movs r3, #0 - 803146e: 63fb str r3, [r7, #60] ; 0x3c + 803149c: 2300 movs r3, #0 + 803149e: 63fb str r3, [r7, #60] ; 0x3c break; - 8031470: e090 b.n 8031594 + 80314a0: e090 b.n 80315c4 } case RCC_SPI6CLKSOURCE_PLL3: /* PLL3 is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 8031472: 4b4b ldr r3, [pc, #300] ; (80315a0 ) - 8031474: 681b ldr r3, [r3, #0] - 8031476: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 803147a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 803147e: d107 bne.n 8031490 + 80314a2: 4b4b ldr r3, [pc, #300] ; (80315d0 ) + 80314a4: 681b ldr r3, [r3, #0] + 80314a6: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 80314aa: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80314ae: d107 bne.n 80314c0 { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8031480: f107 030c add.w r3, r7, #12 - 8031484: 4618 mov r0, r3 - 8031486: f000 f9fd bl 8031884 + 80314b0: f107 030c add.w r3, r7, #12 + 80314b4: 4618 mov r0, r3 + 80314b6: f000 f9fd bl 80318b4 frequency = pll3_clocks.PLL3_Q_Frequency; - 803148a: 693b ldr r3, [r7, #16] - 803148c: 63fb str r3, [r7, #60] ; 0x3c + 80314ba: 693b ldr r3, [r7, #16] + 80314bc: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803148e: e081 b.n 8031594 + 80314be: e081 b.n 80315c4 frequency = 0; - 8031490: 2300 movs r3, #0 - 8031492: 63fb str r3, [r7, #60] ; 0x3c + 80314c0: 2300 movs r3, #0 + 80314c2: 63fb str r3, [r7, #60] ; 0x3c break; - 8031494: e07e b.n 8031594 + 80314c4: e07e b.n 80315c4 } case RCC_SPI6CLKSOURCE_HSI: /* HSI is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - 8031496: 4b42 ldr r3, [pc, #264] ; (80315a0 ) - 8031498: 681b ldr r3, [r3, #0] - 803149a: f003 0304 and.w r3, r3, #4 - 803149e: 2b04 cmp r3, #4 - 80314a0: d109 bne.n 80314b6 + 80314c6: 4b42 ldr r3, [pc, #264] ; (80315d0 ) + 80314c8: 681b ldr r3, [r3, #0] + 80314ca: f003 0304 and.w r3, r3, #4 + 80314ce: 2b04 cmp r3, #4 + 80314d0: d109 bne.n 80314e6 { frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 80314a2: 4b3f ldr r3, [pc, #252] ; (80315a0 ) - 80314a4: 681b ldr r3, [r3, #0] - 80314a6: 08db lsrs r3, r3, #3 - 80314a8: f003 0303 and.w r3, r3, #3 - 80314ac: 4a3d ldr r2, [pc, #244] ; (80315a4 ) - 80314ae: fa22 f303 lsr.w r3, r2, r3 - 80314b2: 63fb str r3, [r7, #60] ; 0x3c + 80314d2: 4b3f ldr r3, [pc, #252] ; (80315d0 ) + 80314d4: 681b ldr r3, [r3, #0] + 80314d6: 08db lsrs r3, r3, #3 + 80314d8: f003 0303 and.w r3, r3, #3 + 80314dc: 4a3d ldr r2, [pc, #244] ; (80315d4 ) + 80314de: fa22 f303 lsr.w r3, r2, r3 + 80314e2: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80314b4: e06e b.n 8031594 + 80314e4: e06e b.n 80315c4 frequency = 0; - 80314b6: 2300 movs r3, #0 - 80314b8: 63fb str r3, [r7, #60] ; 0x3c + 80314e6: 2300 movs r3, #0 + 80314e8: 63fb str r3, [r7, #60] ; 0x3c break; - 80314ba: e06b b.n 8031594 + 80314ea: e06b b.n 80315c4 } case RCC_SPI6CLKSOURCE_CSI: /* CSI is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) - 80314bc: 4b38 ldr r3, [pc, #224] ; (80315a0 ) - 80314be: 681b ldr r3, [r3, #0] - 80314c0: f403 7380 and.w r3, r3, #256 ; 0x100 - 80314c4: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80314c8: d102 bne.n 80314d0 + 80314ec: 4b38 ldr r3, [pc, #224] ; (80315d0 ) + 80314ee: 681b ldr r3, [r3, #0] + 80314f0: f403 7380 and.w r3, r3, #256 ; 0x100 + 80314f4: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80314f8: d102 bne.n 8031500 { frequency = CSI_VALUE; - 80314ca: 4b37 ldr r3, [pc, #220] ; (80315a8 ) - 80314cc: 63fb str r3, [r7, #60] ; 0x3c + 80314fa: 4b37 ldr r3, [pc, #220] ; (80315d8 ) + 80314fc: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80314ce: e061 b.n 8031594 + 80314fe: e061 b.n 80315c4 frequency = 0; - 80314d0: 2300 movs r3, #0 - 80314d2: 63fb str r3, [r7, #60] ; 0x3c + 8031500: 2300 movs r3, #0 + 8031502: 63fb str r3, [r7, #60] ; 0x3c break; - 80314d4: e05e b.n 8031594 + 8031504: e05e b.n 80315c4 } case RCC_SPI6CLKSOURCE_HSE: /* HSE is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) - 80314d6: 4b32 ldr r3, [pc, #200] ; (80315a0 ) - 80314d8: 681b ldr r3, [r3, #0] - 80314da: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 80314de: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80314e2: d102 bne.n 80314ea + 8031506: 4b32 ldr r3, [pc, #200] ; (80315d0 ) + 8031508: 681b ldr r3, [r3, #0] + 803150a: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 803150e: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8031512: d102 bne.n 803151a { frequency = HSE_VALUE; - 80314e4: 4b31 ldr r3, [pc, #196] ; (80315ac ) - 80314e6: 63fb str r3, [r7, #60] ; 0x3c + 8031514: 4b31 ldr r3, [pc, #196] ; (80315dc ) + 8031516: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80314e8: e054 b.n 8031594 + 8031518: e054 b.n 80315c4 frequency = 0; - 80314ea: 2300 movs r3, #0 - 80314ec: 63fb str r3, [r7, #60] ; 0x3c + 803151a: 2300 movs r3, #0 + 803151c: 63fb str r3, [r7, #60] ; 0x3c break; - 80314ee: e051 b.n 8031594 + 803151e: e051 b.n 80315c4 break; } #endif /* RCC_SPI6CLKSOURCE_PIN */ default : { frequency = 0; - 80314f0: 2300 movs r3, #0 - 80314f2: 63fb str r3, [r7, #60] ; 0x3c + 8031520: 2300 movs r3, #0 + 8031522: 63fb str r3, [r7, #60] ; 0x3c break; - 80314f4: e04e b.n 8031594 + 8031524: e04e b.n 80315c4 } } } else if (PeriphClk == RCC_PERIPHCLK_FDCAN) - 80314f6: 687b ldr r3, [r7, #4] - 80314f8: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 80314fc: d148 bne.n 8031590 + 8031526: 687b ldr r3, [r7, #4] + 8031528: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 803152c: d148 bne.n 80315c0 { /* Get FDCAN clock source */ srcclk= __HAL_RCC_GET_FDCAN_SOURCE(); - 80314fe: 4b28 ldr r3, [pc, #160] ; (80315a0 ) - 8031500: 6d1b ldr r3, [r3, #80] ; 0x50 - 8031502: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 8031506: 63bb str r3, [r7, #56] ; 0x38 + 803152e: 4b28 ldr r3, [pc, #160] ; (80315d0 ) + 8031530: 6d1b ldr r3, [r3, #80] ; 0x50 + 8031532: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 8031536: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 8031508: 6bbb ldr r3, [r7, #56] ; 0x38 - 803150a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 803150e: d02a beq.n 8031566 - 8031510: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031512: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031516: d838 bhi.n 803158a - 8031518: 6bbb ldr r3, [r7, #56] ; 0x38 - 803151a: 2b00 cmp r3, #0 - 803151c: d004 beq.n 8031528 - 803151e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031520: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8031524: d00d beq.n 8031542 - 8031526: e030 b.n 803158a + 8031538: 6bbb ldr r3, [r7, #56] ; 0x38 + 803153a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803153e: d02a beq.n 8031596 + 8031540: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031542: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8031546: d838 bhi.n 80315ba + 8031548: 6bbb ldr r3, [r7, #56] ; 0x38 + 803154a: 2b00 cmp r3, #0 + 803154c: d004 beq.n 8031558 + 803154e: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031550: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8031554: d00d beq.n 8031572 + 8031556: e030 b.n 80315ba { case RCC_FDCANCLKSOURCE_HSE: /* HSE is the clock source for FDCAN */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) - 8031528: 4b1d ldr r3, [pc, #116] ; (80315a0 ) - 803152a: 681b ldr r3, [r3, #0] - 803152c: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8031530: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8031534: d102 bne.n 803153c + 8031558: 4b1d ldr r3, [pc, #116] ; (80315d0 ) + 803155a: 681b ldr r3, [r3, #0] + 803155c: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8031560: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8031564: d102 bne.n 803156c { frequency = HSE_VALUE; - 8031536: 4b1d ldr r3, [pc, #116] ; (80315ac ) - 8031538: 63fb str r3, [r7, #60] ; 0x3c + 8031566: 4b1d ldr r3, [pc, #116] ; (80315dc ) + 8031568: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803153a: e02b b.n 8031594 + 803156a: e02b b.n 80315c4 frequency = 0; - 803153c: 2300 movs r3, #0 - 803153e: 63fb str r3, [r7, #60] ; 0x3c + 803156c: 2300 movs r3, #0 + 803156e: 63fb str r3, [r7, #60] ; 0x3c break; - 8031540: e028 b.n 8031594 + 8031570: e028 b.n 80315c4 } case RCC_FDCANCLKSOURCE_PLL: /* PLL is the clock source for FDCAN */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 8031542: 4b17 ldr r3, [pc, #92] ; (80315a0 ) - 8031544: 681b ldr r3, [r3, #0] - 8031546: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 803154a: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 803154e: d107 bne.n 8031560 + 8031572: 4b17 ldr r3, [pc, #92] ; (80315d0 ) + 8031574: 681b ldr r3, [r3, #0] + 8031576: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 803157a: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 803157e: d107 bne.n 8031590 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 8031550: f107 0324 add.w r3, r7, #36 ; 0x24 - 8031554: 4618 mov r0, r3 - 8031556: f000 fae9 bl 8031b2c + 8031580: f107 0324 add.w r3, r7, #36 ; 0x24 + 8031584: 4618 mov r0, r3 + 8031586: f000 fae9 bl 8031b5c frequency = pll1_clocks.PLL1_Q_Frequency; - 803155a: 6abb ldr r3, [r7, #40] ; 0x28 - 803155c: 63fb str r3, [r7, #60] ; 0x3c + 803158a: 6abb ldr r3, [r7, #40] ; 0x28 + 803158c: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803155e: e019 b.n 8031594 + 803158e: e019 b.n 80315c4 frequency = 0; - 8031560: 2300 movs r3, #0 - 8031562: 63fb str r3, [r7, #60] ; 0x3c + 8031590: 2300 movs r3, #0 + 8031592: 63fb str r3, [r7, #60] ; 0x3c break; - 8031564: e016 b.n 8031594 + 8031594: e016 b.n 80315c4 } case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is the clock source for FDCAN */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8031566: 4b0e ldr r3, [pc, #56] ; (80315a0 ) - 8031568: 681b ldr r3, [r3, #0] - 803156a: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 803156e: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 8031572: d107 bne.n 8031584 + 8031596: 4b0e ldr r3, [pc, #56] ; (80315d0 ) + 8031598: 681b ldr r3, [r3, #0] + 803159a: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 803159e: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 80315a2: d107 bne.n 80315b4 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8031574: f107 0318 add.w r3, r7, #24 - 8031578: 4618 mov r0, r3 - 803157a: f000 f82f bl 80315dc + 80315a4: f107 0318 add.w r3, r7, #24 + 80315a8: 4618 mov r0, r3 + 80315aa: f000 f82f bl 803160c frequency = pll2_clocks.PLL2_Q_Frequency; - 803157e: 69fb ldr r3, [r7, #28] - 8031580: 63fb str r3, [r7, #60] ; 0x3c + 80315ae: 69fb ldr r3, [r7, #28] + 80315b0: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8031582: e007 b.n 8031594 + 80315b2: e007 b.n 80315c4 frequency = 0; - 8031584: 2300 movs r3, #0 - 8031586: 63fb str r3, [r7, #60] ; 0x3c + 80315b4: 2300 movs r3, #0 + 80315b6: 63fb str r3, [r7, #60] ; 0x3c break; - 8031588: e004 b.n 8031594 + 80315b8: e004 b.n 80315c4 } default : { frequency = 0; - 803158a: 2300 movs r3, #0 - 803158c: 63fb str r3, [r7, #60] ; 0x3c + 80315ba: 2300 movs r3, #0 + 80315bc: 63fb str r3, [r7, #60] ; 0x3c break; - 803158e: e001 b.n 8031594 + 80315be: e001 b.n 80315c4 } } } else { frequency = 0; - 8031590: 2300 movs r3, #0 - 8031592: 63fb str r3, [r7, #60] ; 0x3c + 80315c0: 2300 movs r3, #0 + 80315c2: 63fb str r3, [r7, #60] ; 0x3c } return frequency; - 8031594: 6bfb ldr r3, [r7, #60] ; 0x3c -} - 8031596: 4618 mov r0, r3 - 8031598: 3740 adds r7, #64 ; 0x40 - 803159a: 46bd mov sp, r7 - 803159c: bd80 pop {r7, pc} - 803159e: bf00 nop - 80315a0: 58024400 .word 0x58024400 - 80315a4: 03d09000 .word 0x03d09000 - 80315a8: 003d0900 .word 0x003d0900 - 80315ac: 017d7840 .word 0x017d7840 - -080315b0 : + 80315c4: 6bfb ldr r3, [r7, #60] ; 0x3c +} + 80315c6: 4618 mov r0, r3 + 80315c8: 3740 adds r7, #64 ; 0x40 + 80315ca: 46bd mov sp, r7 + 80315cc: bd80 pop {r7, pc} + 80315ce: bf00 nop + 80315d0: 58024400 .word 0x58024400 + 80315d4: 03d09000 .word 0x03d09000 + 80315d8: 003d0900 .word 0x003d0900 + 80315dc: 017d7840 .word 0x017d7840 + +080315e0 : * @note Each time D3PCLK1 changes, this function must be called to update the * right D3PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval D3PCLK1 frequency */ uint32_t HAL_RCCEx_GetD3PCLK1Freq(void) { - 80315b0: b580 push {r7, lr} - 80315b2: af00 add r7, sp, #0 + 80315e0: b580 push {r7, lr} + 80315e2: af00 add r7, sp, #0 #if defined(RCC_D3CFGR_D3PPRE) /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->D3CFGR & RCC_D3CFGR_D3PPRE)>> RCC_D3CFGR_D3PPRE_Pos] & 0x1FU)); - 80315b4: f7fe fb88 bl 802fcc8 - 80315b8: 4602 mov r2, r0 - 80315ba: 4b06 ldr r3, [pc, #24] ; (80315d4 ) - 80315bc: 6a1b ldr r3, [r3, #32] - 80315be: 091b lsrs r3, r3, #4 - 80315c0: f003 0307 and.w r3, r3, #7 - 80315c4: 4904 ldr r1, [pc, #16] ; (80315d8 ) - 80315c6: 5ccb ldrb r3, [r1, r3] - 80315c8: f003 031f and.w r3, r3, #31 - 80315cc: fa22 f303 lsr.w r3, r2, r3 + 80315e4: f7fe fb88 bl 802fcf8 + 80315e8: 4602 mov r2, r0 + 80315ea: 4b06 ldr r3, [pc, #24] ; (8031604 ) + 80315ec: 6a1b ldr r3, [r3, #32] + 80315ee: 091b lsrs r3, r3, #4 + 80315f0: f003 0307 and.w r3, r3, #7 + 80315f4: 4904 ldr r1, [pc, #16] ; (8031608 ) + 80315f6: 5ccb ldrb r3, [r1, r3] + 80315f8: f003 031f and.w r3, r3, #31 + 80315fc: fa22 f303 lsr.w r3, r2, r3 #else /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE)>> RCC_SRDCFGR_SRDPPRE_Pos] & 0x1FU)); #endif } - 80315d0: 4618 mov r0, r3 - 80315d2: bd80 pop {r7, pc} - 80315d4: 58024400 .word 0x58024400 - 80315d8: 08044ca4 .word 0x08044ca4 + 8031600: 4618 mov r0, r3 + 8031602: bd80 pop {r7, pc} + 8031604: 58024400 .word 0x58024400 + 8031608: 08044cd4 .word 0x08044cd4 -080315dc : +0803160c : * right PLL2CLK value. Otherwise, any configuration based on this function will be incorrect. * @param PLL2_Clocks structure. * @retval None */ void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef* PLL2_Clocks) { - 80315dc: b480 push {r7} - 80315de: b089 sub sp, #36 ; 0x24 - 80315e0: af00 add r7, sp, #0 - 80315e2: 6078 str r0, [r7, #4] + 803160c: b480 push {r7} + 803160e: b089 sub sp, #36 ; 0x24 + 8031610: af00 add r7, sp, #0 + 8031612: 6078 str r0, [r7, #4] float_t fracn2, pll2vco; /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL2M) * PLL2N PLL2xCLK = PLL2_VCO / PLL2x */ pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); - 80315e4: 4ba1 ldr r3, [pc, #644] ; (803186c ) - 80315e6: 6a9b ldr r3, [r3, #40] ; 0x28 - 80315e8: f003 0303 and.w r3, r3, #3 - 80315ec: 61bb str r3, [r7, #24] + 8031614: 4ba1 ldr r3, [pc, #644] ; (803189c ) + 8031616: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031618: f003 0303 and.w r3, r3, #3 + 803161c: 61bb str r3, [r7, #24] pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2)>> 12); - 80315ee: 4b9f ldr r3, [pc, #636] ; (803186c ) - 80315f0: 6a9b ldr r3, [r3, #40] ; 0x28 - 80315f2: 0b1b lsrs r3, r3, #12 - 80315f4: f003 033f and.w r3, r3, #63 ; 0x3f - 80315f8: 617b str r3, [r7, #20] + 803161e: 4b9f ldr r3, [pc, #636] ; (803189c ) + 8031620: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031622: 0b1b lsrs r3, r3, #12 + 8031624: f003 033f and.w r3, r3, #63 ; 0x3f + 8031628: 617b str r3, [r7, #20] pll2fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL2FRACEN) >> RCC_PLLCFGR_PLL2FRACEN_Pos; - 80315fa: 4b9c ldr r3, [pc, #624] ; (803186c ) - 80315fc: 6adb ldr r3, [r3, #44] ; 0x2c - 80315fe: 091b lsrs r3, r3, #4 - 8031600: f003 0301 and.w r3, r3, #1 - 8031604: 613b str r3, [r7, #16] + 803162a: 4b9c ldr r3, [pc, #624] ; (803189c ) + 803162c: 6adb ldr r3, [r3, #44] ; 0x2c + 803162e: 091b lsrs r3, r3, #4 + 8031630: f003 0301 and.w r3, r3, #1 + 8031634: 613b str r3, [r7, #16] fracn2 =(float_t)(uint32_t)(pll2fracen* ((RCC->PLL2FRACR & RCC_PLL2FRACR_FRACN2)>> 3)); - 8031606: 4b99 ldr r3, [pc, #612] ; (803186c ) - 8031608: 6bdb ldr r3, [r3, #60] ; 0x3c - 803160a: 08db lsrs r3, r3, #3 - 803160c: f3c3 030c ubfx r3, r3, #0, #13 - 8031610: 693a ldr r2, [r7, #16] - 8031612: fb02 f303 mul.w r3, r2, r3 - 8031616: ee07 3a90 vmov s15, r3 - 803161a: eef8 7a67 vcvt.f32.u32 s15, s15 - 803161e: edc7 7a03 vstr s15, [r7, #12] + 8031636: 4b99 ldr r3, [pc, #612] ; (803189c ) + 8031638: 6bdb ldr r3, [r3, #60] ; 0x3c + 803163a: 08db lsrs r3, r3, #3 + 803163c: f3c3 030c ubfx r3, r3, #0, #13 + 8031640: 693a ldr r2, [r7, #16] + 8031642: fb02 f303 mul.w r3, r2, r3 + 8031646: ee07 3a90 vmov s15, r3 + 803164a: eef8 7a67 vcvt.f32.u32 s15, s15 + 803164e: edc7 7a03 vstr s15, [r7, #12] if (pll2m != 0U) - 8031622: 697b ldr r3, [r7, #20] - 8031624: 2b00 cmp r3, #0 - 8031626: f000 8111 beq.w 803184c + 8031652: 697b ldr r3, [r7, #20] + 8031654: 2b00 cmp r3, #0 + 8031656: f000 8111 beq.w 803187c { switch (pllsource) - 803162a: 69bb ldr r3, [r7, #24] - 803162c: 2b02 cmp r3, #2 - 803162e: f000 8083 beq.w 8031738 - 8031632: 69bb ldr r3, [r7, #24] - 8031634: 2b02 cmp r3, #2 - 8031636: f200 80a1 bhi.w 803177c - 803163a: 69bb ldr r3, [r7, #24] - 803163c: 2b00 cmp r3, #0 - 803163e: d003 beq.n 8031648 - 8031640: 69bb ldr r3, [r7, #24] - 8031642: 2b01 cmp r3, #1 - 8031644: d056 beq.n 80316f4 - 8031646: e099 b.n 803177c + 803165a: 69bb ldr r3, [r7, #24] + 803165c: 2b02 cmp r3, #2 + 803165e: f000 8083 beq.w 8031768 + 8031662: 69bb ldr r3, [r7, #24] + 8031664: 2b02 cmp r3, #2 + 8031666: f200 80a1 bhi.w 80317ac + 803166a: 69bb ldr r3, [r7, #24] + 803166c: 2b00 cmp r3, #0 + 803166e: d003 beq.n 8031678 + 8031670: 69bb ldr r3, [r7, #24] + 8031672: 2b01 cmp r3, #1 + 8031674: d056 beq.n 8031724 + 8031676: e099 b.n 80317ac { case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8031648: 4b88 ldr r3, [pc, #544] ; (803186c ) - 803164a: 681b ldr r3, [r3, #0] - 803164c: f003 0320 and.w r3, r3, #32 - 8031650: 2b00 cmp r3, #0 - 8031652: d02d beq.n 80316b0 + 8031678: 4b88 ldr r3, [pc, #544] ; (803189c ) + 803167a: 681b ldr r3, [r3, #0] + 803167c: f003 0320 and.w r3, r3, #32 + 8031680: 2b00 cmp r3, #0 + 8031682: d02d beq.n 80316e0 { hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8031654: 4b85 ldr r3, [pc, #532] ; (803186c ) - 8031656: 681b ldr r3, [r3, #0] - 8031658: 08db lsrs r3, r3, #3 - 803165a: f003 0303 and.w r3, r3, #3 - 803165e: 4a84 ldr r2, [pc, #528] ; (8031870 ) - 8031660: fa22 f303 lsr.w r3, r2, r3 - 8031664: 60bb str r3, [r7, #8] + 8031684: 4b85 ldr r3, [pc, #532] ; (803189c ) + 8031686: 681b ldr r3, [r3, #0] + 8031688: 08db lsrs r3, r3, #3 + 803168a: f003 0303 and.w r3, r3, #3 + 803168e: 4a84 ldr r2, [pc, #528] ; (80318a0 ) + 8031690: fa22 f303 lsr.w r3, r2, r3 + 8031694: 60bb str r3, [r7, #8] pll2vco = ( (float_t)hsivalue / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 8031666: 68bb ldr r3, [r7, #8] - 8031668: ee07 3a90 vmov s15, r3 - 803166c: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031670: 697b ldr r3, [r7, #20] - 8031672: ee07 3a90 vmov s15, r3 - 8031676: eef8 7a67 vcvt.f32.u32 s15, s15 - 803167a: ee86 7aa7 vdiv.f32 s14, s13, s15 - 803167e: 4b7b ldr r3, [pc, #492] ; (803186c ) - 8031680: 6b9b ldr r3, [r3, #56] ; 0x38 - 8031682: f3c3 0308 ubfx r3, r3, #0, #9 - 8031686: ee07 3a90 vmov s15, r3 - 803168a: eef8 6a67 vcvt.f32.u32 s13, s15 - 803168e: ed97 6a03 vldr s12, [r7, #12] - 8031692: eddf 5a78 vldr s11, [pc, #480] ; 8031874 - 8031696: eec6 7a25 vdiv.f32 s15, s12, s11 - 803169a: ee76 7aa7 vadd.f32 s15, s13, s15 - 803169e: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 80316a2: ee77 7aa6 vadd.f32 s15, s15, s13 - 80316a6: ee67 7a27 vmul.f32 s15, s14, s15 - 80316aa: edc7 7a07 vstr s15, [r7, #28] + 8031696: 68bb ldr r3, [r7, #8] + 8031698: ee07 3a90 vmov s15, r3 + 803169c: eef8 6a67 vcvt.f32.u32 s13, s15 + 80316a0: 697b ldr r3, [r7, #20] + 80316a2: ee07 3a90 vmov s15, r3 + 80316a6: eef8 7a67 vcvt.f32.u32 s15, s15 + 80316aa: ee86 7aa7 vdiv.f32 s14, s13, s15 + 80316ae: 4b7b ldr r3, [pc, #492] ; (803189c ) + 80316b0: 6b9b ldr r3, [r3, #56] ; 0x38 + 80316b2: f3c3 0308 ubfx r3, r3, #0, #9 + 80316b6: ee07 3a90 vmov s15, r3 + 80316ba: eef8 6a67 vcvt.f32.u32 s13, s15 + 80316be: ed97 6a03 vldr s12, [r7, #12] + 80316c2: eddf 5a78 vldr s11, [pc, #480] ; 80318a4 + 80316c6: eec6 7a25 vdiv.f32 s15, s12, s11 + 80316ca: ee76 7aa7 vadd.f32 s15, s13, s15 + 80316ce: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 80316d2: ee77 7aa6 vadd.f32 s15, s15, s13 + 80316d6: ee67 7a27 vmul.f32 s15, s14, s15 + 80316da: edc7 7a07 vstr s15, [r7, #28] } else { pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); } break; - 80316ae: e087 b.n 80317c0 + 80316de: e087 b.n 80317f0 pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 80316b0: 697b ldr r3, [r7, #20] - 80316b2: ee07 3a90 vmov s15, r3 - 80316b6: eef8 7a67 vcvt.f32.u32 s15, s15 - 80316ba: eddf 6a6f vldr s13, [pc, #444] ; 8031878 - 80316be: ee86 7aa7 vdiv.f32 s14, s13, s15 - 80316c2: 4b6a ldr r3, [pc, #424] ; (803186c ) - 80316c4: 6b9b ldr r3, [r3, #56] ; 0x38 - 80316c6: f3c3 0308 ubfx r3, r3, #0, #9 - 80316ca: ee07 3a90 vmov s15, r3 - 80316ce: eef8 6a67 vcvt.f32.u32 s13, s15 - 80316d2: ed97 6a03 vldr s12, [r7, #12] - 80316d6: eddf 5a67 vldr s11, [pc, #412] ; 8031874 - 80316da: eec6 7a25 vdiv.f32 s15, s12, s11 - 80316de: ee76 7aa7 vadd.f32 s15, s13, s15 - 80316e2: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 80316e6: ee77 7aa6 vadd.f32 s15, s15, s13 - 80316ea: ee67 7a27 vmul.f32 s15, s14, s15 - 80316ee: edc7 7a07 vstr s15, [r7, #28] + 80316e0: 697b ldr r3, [r7, #20] + 80316e2: ee07 3a90 vmov s15, r3 + 80316e6: eef8 7a67 vcvt.f32.u32 s15, s15 + 80316ea: eddf 6a6f vldr s13, [pc, #444] ; 80318a8 + 80316ee: ee86 7aa7 vdiv.f32 s14, s13, s15 + 80316f2: 4b6a ldr r3, [pc, #424] ; (803189c ) + 80316f4: 6b9b ldr r3, [r3, #56] ; 0x38 + 80316f6: f3c3 0308 ubfx r3, r3, #0, #9 + 80316fa: ee07 3a90 vmov s15, r3 + 80316fe: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031702: ed97 6a03 vldr s12, [r7, #12] + 8031706: eddf 5a67 vldr s11, [pc, #412] ; 80318a4 + 803170a: eec6 7a25 vdiv.f32 s15, s12, s11 + 803170e: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031712: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031716: ee77 7aa6 vadd.f32 s15, s15, s13 + 803171a: ee67 7a27 vmul.f32 s15, s14, s15 + 803171e: edc7 7a07 vstr s15, [r7, #28] break; - 80316f2: e065 b.n 80317c0 + 8031722: e065 b.n 80317f0 case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */ pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 80316f4: 697b ldr r3, [r7, #20] - 80316f6: ee07 3a90 vmov s15, r3 - 80316fa: eef8 7a67 vcvt.f32.u32 s15, s15 - 80316fe: eddf 6a5f vldr s13, [pc, #380] ; 803187c - 8031702: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031706: 4b59 ldr r3, [pc, #356] ; (803186c ) - 8031708: 6b9b ldr r3, [r3, #56] ; 0x38 - 803170a: f3c3 0308 ubfx r3, r3, #0, #9 - 803170e: ee07 3a90 vmov s15, r3 - 8031712: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031716: ed97 6a03 vldr s12, [r7, #12] - 803171a: eddf 5a56 vldr s11, [pc, #344] ; 8031874 - 803171e: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031722: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031726: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 803172a: ee77 7aa6 vadd.f32 s15, s15, s13 - 803172e: ee67 7a27 vmul.f32 s15, s14, s15 - 8031732: edc7 7a07 vstr s15, [r7, #28] + 8031724: 697b ldr r3, [r7, #20] + 8031726: ee07 3a90 vmov s15, r3 + 803172a: eef8 7a67 vcvt.f32.u32 s15, s15 + 803172e: eddf 6a5f vldr s13, [pc, #380] ; 80318ac + 8031732: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031736: 4b59 ldr r3, [pc, #356] ; (803189c ) + 8031738: 6b9b ldr r3, [r3, #56] ; 0x38 + 803173a: f3c3 0308 ubfx r3, r3, #0, #9 + 803173e: ee07 3a90 vmov s15, r3 + 8031742: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031746: ed97 6a03 vldr s12, [r7, #12] + 803174a: eddf 5a56 vldr s11, [pc, #344] ; 80318a4 + 803174e: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031752: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031756: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 803175a: ee77 7aa6 vadd.f32 s15, s15, s13 + 803175e: ee67 7a27 vmul.f32 s15, s14, s15 + 8031762: edc7 7a07 vstr s15, [r7, #28] break; - 8031736: e043 b.n 80317c0 + 8031766: e043 b.n 80317f0 case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pll2vco = ((float_t)HSE_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 8031738: 697b ldr r3, [r7, #20] - 803173a: ee07 3a90 vmov s15, r3 - 803173e: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031742: eddf 6a4f vldr s13, [pc, #316] ; 8031880 - 8031746: ee86 7aa7 vdiv.f32 s14, s13, s15 - 803174a: 4b48 ldr r3, [pc, #288] ; (803186c ) - 803174c: 6b9b ldr r3, [r3, #56] ; 0x38 - 803174e: f3c3 0308 ubfx r3, r3, #0, #9 - 8031752: ee07 3a90 vmov s15, r3 - 8031756: eef8 6a67 vcvt.f32.u32 s13, s15 - 803175a: ed97 6a03 vldr s12, [r7, #12] - 803175e: eddf 5a45 vldr s11, [pc, #276] ; 8031874 - 8031762: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031766: ee76 7aa7 vadd.f32 s15, s13, s15 - 803176a: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 803176e: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031772: ee67 7a27 vmul.f32 s15, s14, s15 - 8031776: edc7 7a07 vstr s15, [r7, #28] + 8031768: 697b ldr r3, [r7, #20] + 803176a: ee07 3a90 vmov s15, r3 + 803176e: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031772: eddf 6a4f vldr s13, [pc, #316] ; 80318b0 + 8031776: ee86 7aa7 vdiv.f32 s14, s13, s15 + 803177a: 4b48 ldr r3, [pc, #288] ; (803189c ) + 803177c: 6b9b ldr r3, [r3, #56] ; 0x38 + 803177e: f3c3 0308 ubfx r3, r3, #0, #9 + 8031782: ee07 3a90 vmov s15, r3 + 8031786: eef8 6a67 vcvt.f32.u32 s13, s15 + 803178a: ed97 6a03 vldr s12, [r7, #12] + 803178e: eddf 5a45 vldr s11, [pc, #276] ; 80318a4 + 8031792: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031796: ee76 7aa7 vadd.f32 s15, s13, s15 + 803179a: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 803179e: ee77 7aa6 vadd.f32 s15, s15, s13 + 80317a2: ee67 7a27 vmul.f32 s15, s14, s15 + 80317a6: edc7 7a07 vstr s15, [r7, #28] break; - 803177a: e021 b.n 80317c0 + 80317aa: e021 b.n 80317f0 default: pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 803177c: 697b ldr r3, [r7, #20] - 803177e: ee07 3a90 vmov s15, r3 - 8031782: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031786: eddf 6a3d vldr s13, [pc, #244] ; 803187c - 803178a: ee86 7aa7 vdiv.f32 s14, s13, s15 - 803178e: 4b37 ldr r3, [pc, #220] ; (803186c ) - 8031790: 6b9b ldr r3, [r3, #56] ; 0x38 - 8031792: f3c3 0308 ubfx r3, r3, #0, #9 - 8031796: ee07 3a90 vmov s15, r3 - 803179a: eef8 6a67 vcvt.f32.u32 s13, s15 - 803179e: ed97 6a03 vldr s12, [r7, #12] - 80317a2: eddf 5a34 vldr s11, [pc, #208] ; 8031874 - 80317a6: eec6 7a25 vdiv.f32 s15, s12, s11 - 80317aa: ee76 7aa7 vadd.f32 s15, s13, s15 - 80317ae: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 80317b2: ee77 7aa6 vadd.f32 s15, s15, s13 - 80317b6: ee67 7a27 vmul.f32 s15, s14, s15 - 80317ba: edc7 7a07 vstr s15, [r7, #28] + 80317ac: 697b ldr r3, [r7, #20] + 80317ae: ee07 3a90 vmov s15, r3 + 80317b2: eef8 7a67 vcvt.f32.u32 s15, s15 + 80317b6: eddf 6a3d vldr s13, [pc, #244] ; 80318ac + 80317ba: ee86 7aa7 vdiv.f32 s14, s13, s15 + 80317be: 4b37 ldr r3, [pc, #220] ; (803189c ) + 80317c0: 6b9b ldr r3, [r3, #56] ; 0x38 + 80317c2: f3c3 0308 ubfx r3, r3, #0, #9 + 80317c6: ee07 3a90 vmov s15, r3 + 80317ca: eef8 6a67 vcvt.f32.u32 s13, s15 + 80317ce: ed97 6a03 vldr s12, [r7, #12] + 80317d2: eddf 5a34 vldr s11, [pc, #208] ; 80318a4 + 80317d6: eec6 7a25 vdiv.f32 s15, s12, s11 + 80317da: ee76 7aa7 vadd.f32 s15, s13, s15 + 80317de: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 80317e2: ee77 7aa6 vadd.f32 s15, s15, s13 + 80317e6: ee67 7a27 vmul.f32 s15, s14, s15 + 80317ea: edc7 7a07 vstr s15, [r7, #28] break; - 80317be: bf00 nop + 80317ee: bf00 nop } PLL2_Clocks->PLL2_P_Frequency = (uint32_t)(float_t)(pll2vco/((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_P2) >>9) + (float_t)1 )) ; - 80317c0: 4b2a ldr r3, [pc, #168] ; (803186c ) - 80317c2: 6b9b ldr r3, [r3, #56] ; 0x38 - 80317c4: 0a5b lsrs r3, r3, #9 - 80317c6: f003 037f and.w r3, r3, #127 ; 0x7f - 80317ca: ee07 3a90 vmov s15, r3 - 80317ce: eef8 7a67 vcvt.f32.u32 s15, s15 - 80317d2: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 80317d6: ee37 7a87 vadd.f32 s14, s15, s14 - 80317da: edd7 6a07 vldr s13, [r7, #28] - 80317de: eec6 7a87 vdiv.f32 s15, s13, s14 - 80317e2: eefc 7ae7 vcvt.u32.f32 s15, s15 - 80317e6: ee17 2a90 vmov r2, s15 - 80317ea: 687b ldr r3, [r7, #4] - 80317ec: 601a str r2, [r3, #0] + 80317f0: 4b2a ldr r3, [pc, #168] ; (803189c ) + 80317f2: 6b9b ldr r3, [r3, #56] ; 0x38 + 80317f4: 0a5b lsrs r3, r3, #9 + 80317f6: f003 037f and.w r3, r3, #127 ; 0x7f + 80317fa: ee07 3a90 vmov s15, r3 + 80317fe: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031802: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031806: ee37 7a87 vadd.f32 s14, s15, s14 + 803180a: edd7 6a07 vldr s13, [r7, #28] + 803180e: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031812: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031816: ee17 2a90 vmov r2, s15 + 803181a: 687b ldr r3, [r7, #4] + 803181c: 601a str r2, [r3, #0] PLL2_Clocks->PLL2_Q_Frequency = (uint32_t)(float_t)(pll2vco/((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_Q2) >>16) + (float_t)1 )) ; - 80317ee: 4b1f ldr r3, [pc, #124] ; (803186c ) - 80317f0: 6b9b ldr r3, [r3, #56] ; 0x38 - 80317f2: 0c1b lsrs r3, r3, #16 - 80317f4: f003 037f and.w r3, r3, #127 ; 0x7f - 80317f8: ee07 3a90 vmov s15, r3 - 80317fc: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031800: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031804: ee37 7a87 vadd.f32 s14, s15, s14 - 8031808: edd7 6a07 vldr s13, [r7, #28] - 803180c: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031810: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031814: ee17 2a90 vmov r2, s15 - 8031818: 687b ldr r3, [r7, #4] - 803181a: 605a str r2, [r3, #4] + 803181e: 4b1f ldr r3, [pc, #124] ; (803189c ) + 8031820: 6b9b ldr r3, [r3, #56] ; 0x38 + 8031822: 0c1b lsrs r3, r3, #16 + 8031824: f003 037f and.w r3, r3, #127 ; 0x7f + 8031828: ee07 3a90 vmov s15, r3 + 803182c: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031830: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031834: ee37 7a87 vadd.f32 s14, s15, s14 + 8031838: edd7 6a07 vldr s13, [r7, #28] + 803183c: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031840: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031844: ee17 2a90 vmov r2, s15 + 8031848: 687b ldr r3, [r7, #4] + 803184a: 605a str r2, [r3, #4] PLL2_Clocks->PLL2_R_Frequency = (uint32_t)(float_t)(pll2vco/((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_R2) >>24) + (float_t)1 )) ; - 803181c: 4b13 ldr r3, [pc, #76] ; (803186c ) - 803181e: 6b9b ldr r3, [r3, #56] ; 0x38 - 8031820: 0e1b lsrs r3, r3, #24 - 8031822: f003 037f and.w r3, r3, #127 ; 0x7f - 8031826: ee07 3a90 vmov s15, r3 - 803182a: eef8 7a67 vcvt.f32.u32 s15, s15 - 803182e: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031832: ee37 7a87 vadd.f32 s14, s15, s14 - 8031836: edd7 6a07 vldr s13, [r7, #28] - 803183a: eec6 7a87 vdiv.f32 s15, s13, s14 - 803183e: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031842: ee17 2a90 vmov r2, s15 - 8031846: 687b ldr r3, [r7, #4] - 8031848: 609a str r2, [r3, #8] + 803184c: 4b13 ldr r3, [pc, #76] ; (803189c ) + 803184e: 6b9b ldr r3, [r3, #56] ; 0x38 + 8031850: 0e1b lsrs r3, r3, #24 + 8031852: f003 037f and.w r3, r3, #127 ; 0x7f + 8031856: ee07 3a90 vmov s15, r3 + 803185a: eef8 7a67 vcvt.f32.u32 s15, s15 + 803185e: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031862: ee37 7a87 vadd.f32 s14, s15, s14 + 8031866: edd7 6a07 vldr s13, [r7, #28] + 803186a: eec6 7a87 vdiv.f32 s15, s13, s14 + 803186e: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031872: ee17 2a90 vmov r2, s15 + 8031876: 687b ldr r3, [r7, #4] + 8031878: 609a str r2, [r3, #8] { PLL2_Clocks->PLL2_P_Frequency = 0U; PLL2_Clocks->PLL2_Q_Frequency = 0U; PLL2_Clocks->PLL2_R_Frequency = 0U; } } - 803184a: e008 b.n 803185e + 803187a: e008 b.n 803188e PLL2_Clocks->PLL2_P_Frequency = 0U; - 803184c: 687b ldr r3, [r7, #4] - 803184e: 2200 movs r2, #0 - 8031850: 601a str r2, [r3, #0] + 803187c: 687b ldr r3, [r7, #4] + 803187e: 2200 movs r2, #0 + 8031880: 601a str r2, [r3, #0] PLL2_Clocks->PLL2_Q_Frequency = 0U; - 8031852: 687b ldr r3, [r7, #4] - 8031854: 2200 movs r2, #0 - 8031856: 605a str r2, [r3, #4] + 8031882: 687b ldr r3, [r7, #4] + 8031884: 2200 movs r2, #0 + 8031886: 605a str r2, [r3, #4] PLL2_Clocks->PLL2_R_Frequency = 0U; - 8031858: 687b ldr r3, [r7, #4] - 803185a: 2200 movs r2, #0 - 803185c: 609a str r2, [r3, #8] -} - 803185e: bf00 nop - 8031860: 3724 adds r7, #36 ; 0x24 - 8031862: 46bd mov sp, r7 - 8031864: f85d 7b04 ldr.w r7, [sp], #4 - 8031868: 4770 bx lr - 803186a: bf00 nop - 803186c: 58024400 .word 0x58024400 - 8031870: 03d09000 .word 0x03d09000 - 8031874: 46000000 .word 0x46000000 - 8031878: 4c742400 .word 0x4c742400 - 803187c: 4a742400 .word 0x4a742400 - 8031880: 4bbebc20 .word 0x4bbebc20 - -08031884 : + 8031888: 687b ldr r3, [r7, #4] + 803188a: 2200 movs r2, #0 + 803188c: 609a str r2, [r3, #8] +} + 803188e: bf00 nop + 8031890: 3724 adds r7, #36 ; 0x24 + 8031892: 46bd mov sp, r7 + 8031894: f85d 7b04 ldr.w r7, [sp], #4 + 8031898: 4770 bx lr + 803189a: bf00 nop + 803189c: 58024400 .word 0x58024400 + 80318a0: 03d09000 .word 0x03d09000 + 80318a4: 46000000 .word 0x46000000 + 80318a8: 4c742400 .word 0x4c742400 + 80318ac: 4a742400 .word 0x4a742400 + 80318b0: 4bbebc20 .word 0x4bbebc20 + +080318b4 : * right PLL3CLK value. Otherwise, any configuration based on this function will be incorrect. * @param PLL3_Clocks structure. * @retval None */ void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef* PLL3_Clocks) { - 8031884: b480 push {r7} - 8031886: b089 sub sp, #36 ; 0x24 - 8031888: af00 add r7, sp, #0 - 803188a: 6078 str r0, [r7, #4] + 80318b4: b480 push {r7} + 80318b6: b089 sub sp, #36 ; 0x24 + 80318b8: af00 add r7, sp, #0 + 80318ba: 6078 str r0, [r7, #4] float_t fracn3, pll3vco; /* PLL3_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL3M) * PLL3N PLL3xCLK = PLL3_VCO / PLLxR */ pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); - 803188c: 4ba1 ldr r3, [pc, #644] ; (8031b14 ) - 803188e: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031890: f003 0303 and.w r3, r3, #3 - 8031894: 61bb str r3, [r7, #24] + 80318bc: 4ba1 ldr r3, [pc, #644] ; (8031b44 ) + 80318be: 6a9b ldr r3, [r3, #40] ; 0x28 + 80318c0: f003 0303 and.w r3, r3, #3 + 80318c4: 61bb str r3, [r7, #24] pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3)>> 20) ; - 8031896: 4b9f ldr r3, [pc, #636] ; (8031b14 ) - 8031898: 6a9b ldr r3, [r3, #40] ; 0x28 - 803189a: 0d1b lsrs r3, r3, #20 - 803189c: f003 033f and.w r3, r3, #63 ; 0x3f - 80318a0: 617b str r3, [r7, #20] + 80318c6: 4b9f ldr r3, [pc, #636] ; (8031b44 ) + 80318c8: 6a9b ldr r3, [r3, #40] ; 0x28 + 80318ca: 0d1b lsrs r3, r3, #20 + 80318cc: f003 033f and.w r3, r3, #63 ; 0x3f + 80318d0: 617b str r3, [r7, #20] pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN) >> RCC_PLLCFGR_PLL3FRACEN_Pos; - 80318a2: 4b9c ldr r3, [pc, #624] ; (8031b14 ) - 80318a4: 6adb ldr r3, [r3, #44] ; 0x2c - 80318a6: 0a1b lsrs r3, r3, #8 - 80318a8: f003 0301 and.w r3, r3, #1 - 80318ac: 613b str r3, [r7, #16] + 80318d2: 4b9c ldr r3, [pc, #624] ; (8031b44 ) + 80318d4: 6adb ldr r3, [r3, #44] ; 0x2c + 80318d6: 0a1b lsrs r3, r3, #8 + 80318d8: f003 0301 and.w r3, r3, #1 + 80318dc: 613b str r3, [r7, #16] fracn3 = (float_t)(uint32_t)(pll3fracen* ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACN3)>> 3)); - 80318ae: 4b99 ldr r3, [pc, #612] ; (8031b14 ) - 80318b0: 6c5b ldr r3, [r3, #68] ; 0x44 - 80318b2: 08db lsrs r3, r3, #3 - 80318b4: f3c3 030c ubfx r3, r3, #0, #13 - 80318b8: 693a ldr r2, [r7, #16] - 80318ba: fb02 f303 mul.w r3, r2, r3 - 80318be: ee07 3a90 vmov s15, r3 - 80318c2: eef8 7a67 vcvt.f32.u32 s15, s15 - 80318c6: edc7 7a03 vstr s15, [r7, #12] + 80318de: 4b99 ldr r3, [pc, #612] ; (8031b44 ) + 80318e0: 6c5b ldr r3, [r3, #68] ; 0x44 + 80318e2: 08db lsrs r3, r3, #3 + 80318e4: f3c3 030c ubfx r3, r3, #0, #13 + 80318e8: 693a ldr r2, [r7, #16] + 80318ea: fb02 f303 mul.w r3, r2, r3 + 80318ee: ee07 3a90 vmov s15, r3 + 80318f2: eef8 7a67 vcvt.f32.u32 s15, s15 + 80318f6: edc7 7a03 vstr s15, [r7, #12] if (pll3m != 0U) - 80318ca: 697b ldr r3, [r7, #20] - 80318cc: 2b00 cmp r3, #0 - 80318ce: f000 8111 beq.w 8031af4 + 80318fa: 697b ldr r3, [r7, #20] + 80318fc: 2b00 cmp r3, #0 + 80318fe: f000 8111 beq.w 8031b24 { switch (pllsource) - 80318d2: 69bb ldr r3, [r7, #24] - 80318d4: 2b02 cmp r3, #2 - 80318d6: f000 8083 beq.w 80319e0 - 80318da: 69bb ldr r3, [r7, #24] - 80318dc: 2b02 cmp r3, #2 - 80318de: f200 80a1 bhi.w 8031a24 - 80318e2: 69bb ldr r3, [r7, #24] - 80318e4: 2b00 cmp r3, #0 - 80318e6: d003 beq.n 80318f0 - 80318e8: 69bb ldr r3, [r7, #24] - 80318ea: 2b01 cmp r3, #1 - 80318ec: d056 beq.n 803199c - 80318ee: e099 b.n 8031a24 + 8031902: 69bb ldr r3, [r7, #24] + 8031904: 2b02 cmp r3, #2 + 8031906: f000 8083 beq.w 8031a10 + 803190a: 69bb ldr r3, [r7, #24] + 803190c: 2b02 cmp r3, #2 + 803190e: f200 80a1 bhi.w 8031a54 + 8031912: 69bb ldr r3, [r7, #24] + 8031914: 2b00 cmp r3, #0 + 8031916: d003 beq.n 8031920 + 8031918: 69bb ldr r3, [r7, #24] + 803191a: 2b01 cmp r3, #1 + 803191c: d056 beq.n 80319cc + 803191e: e099 b.n 8031a54 { case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 80318f0: 4b88 ldr r3, [pc, #544] ; (8031b14 ) - 80318f2: 681b ldr r3, [r3, #0] - 80318f4: f003 0320 and.w r3, r3, #32 - 80318f8: 2b00 cmp r3, #0 - 80318fa: d02d beq.n 8031958 + 8031920: 4b88 ldr r3, [pc, #544] ; (8031b44 ) + 8031922: 681b ldr r3, [r3, #0] + 8031924: f003 0320 and.w r3, r3, #32 + 8031928: 2b00 cmp r3, #0 + 803192a: d02d beq.n 8031988 { hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 80318fc: 4b85 ldr r3, [pc, #532] ; (8031b14 ) - 80318fe: 681b ldr r3, [r3, #0] - 8031900: 08db lsrs r3, r3, #3 - 8031902: f003 0303 and.w r3, r3, #3 - 8031906: 4a84 ldr r2, [pc, #528] ; (8031b18 ) - 8031908: fa22 f303 lsr.w r3, r2, r3 - 803190c: 60bb str r3, [r7, #8] + 803192c: 4b85 ldr r3, [pc, #532] ; (8031b44 ) + 803192e: 681b ldr r3, [r3, #0] + 8031930: 08db lsrs r3, r3, #3 + 8031932: f003 0303 and.w r3, r3, #3 + 8031936: 4a84 ldr r2, [pc, #528] ; (8031b48 ) + 8031938: fa22 f303 lsr.w r3, r2, r3 + 803193c: 60bb str r3, [r7, #8] pll3vco = ((float_t)hsivalue / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 803190e: 68bb ldr r3, [r7, #8] - 8031910: ee07 3a90 vmov s15, r3 - 8031914: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031918: 697b ldr r3, [r7, #20] - 803191a: ee07 3a90 vmov s15, r3 - 803191e: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031922: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031926: 4b7b ldr r3, [pc, #492] ; (8031b14 ) - 8031928: 6c1b ldr r3, [r3, #64] ; 0x40 - 803192a: f3c3 0308 ubfx r3, r3, #0, #9 - 803192e: ee07 3a90 vmov s15, r3 - 8031932: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031936: ed97 6a03 vldr s12, [r7, #12] - 803193a: eddf 5a78 vldr s11, [pc, #480] ; 8031b1c - 803193e: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031942: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031946: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 803194a: ee77 7aa6 vadd.f32 s15, s15, s13 - 803194e: ee67 7a27 vmul.f32 s15, s14, s15 - 8031952: edc7 7a07 vstr s15, [r7, #28] + 803193e: 68bb ldr r3, [r7, #8] + 8031940: ee07 3a90 vmov s15, r3 + 8031944: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031948: 697b ldr r3, [r7, #20] + 803194a: ee07 3a90 vmov s15, r3 + 803194e: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031952: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031956: 4b7b ldr r3, [pc, #492] ; (8031b44 ) + 8031958: 6c1b ldr r3, [r3, #64] ; 0x40 + 803195a: f3c3 0308 ubfx r3, r3, #0, #9 + 803195e: ee07 3a90 vmov s15, r3 + 8031962: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031966: ed97 6a03 vldr s12, [r7, #12] + 803196a: eddf 5a78 vldr s11, [pc, #480] ; 8031b4c + 803196e: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031972: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031976: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 803197a: ee77 7aa6 vadd.f32 s15, s15, s13 + 803197e: ee67 7a27 vmul.f32 s15, s14, s15 + 8031982: edc7 7a07 vstr s15, [r7, #28] } else { pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); } break; - 8031956: e087 b.n 8031a68 + 8031986: e087 b.n 8031a98 pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 8031958: 697b ldr r3, [r7, #20] - 803195a: ee07 3a90 vmov s15, r3 - 803195e: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031962: eddf 6a6f vldr s13, [pc, #444] ; 8031b20 - 8031966: ee86 7aa7 vdiv.f32 s14, s13, s15 - 803196a: 4b6a ldr r3, [pc, #424] ; (8031b14 ) - 803196c: 6c1b ldr r3, [r3, #64] ; 0x40 - 803196e: f3c3 0308 ubfx r3, r3, #0, #9 - 8031972: ee07 3a90 vmov s15, r3 - 8031976: eef8 6a67 vcvt.f32.u32 s13, s15 - 803197a: ed97 6a03 vldr s12, [r7, #12] - 803197e: eddf 5a67 vldr s11, [pc, #412] ; 8031b1c - 8031982: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031986: ee76 7aa7 vadd.f32 s15, s13, s15 - 803198a: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 803198e: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031992: ee67 7a27 vmul.f32 s15, s14, s15 - 8031996: edc7 7a07 vstr s15, [r7, #28] + 8031988: 697b ldr r3, [r7, #20] + 803198a: ee07 3a90 vmov s15, r3 + 803198e: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031992: eddf 6a6f vldr s13, [pc, #444] ; 8031b50 + 8031996: ee86 7aa7 vdiv.f32 s14, s13, s15 + 803199a: 4b6a ldr r3, [pc, #424] ; (8031b44 ) + 803199c: 6c1b ldr r3, [r3, #64] ; 0x40 + 803199e: f3c3 0308 ubfx r3, r3, #0, #9 + 80319a2: ee07 3a90 vmov s15, r3 + 80319a6: eef8 6a67 vcvt.f32.u32 s13, s15 + 80319aa: ed97 6a03 vldr s12, [r7, #12] + 80319ae: eddf 5a67 vldr s11, [pc, #412] ; 8031b4c + 80319b2: eec6 7a25 vdiv.f32 s15, s12, s11 + 80319b6: ee76 7aa7 vadd.f32 s15, s13, s15 + 80319ba: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 80319be: ee77 7aa6 vadd.f32 s15, s15, s13 + 80319c2: ee67 7a27 vmul.f32 s15, s14, s15 + 80319c6: edc7 7a07 vstr s15, [r7, #28] break; - 803199a: e065 b.n 8031a68 + 80319ca: e065 b.n 8031a98 case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */ pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 803199c: 697b ldr r3, [r7, #20] - 803199e: ee07 3a90 vmov s15, r3 - 80319a2: eef8 7a67 vcvt.f32.u32 s15, s15 - 80319a6: eddf 6a5f vldr s13, [pc, #380] ; 8031b24 - 80319aa: ee86 7aa7 vdiv.f32 s14, s13, s15 - 80319ae: 4b59 ldr r3, [pc, #356] ; (8031b14 ) - 80319b0: 6c1b ldr r3, [r3, #64] ; 0x40 - 80319b2: f3c3 0308 ubfx r3, r3, #0, #9 - 80319b6: ee07 3a90 vmov s15, r3 - 80319ba: eef8 6a67 vcvt.f32.u32 s13, s15 - 80319be: ed97 6a03 vldr s12, [r7, #12] - 80319c2: eddf 5a56 vldr s11, [pc, #344] ; 8031b1c - 80319c6: eec6 7a25 vdiv.f32 s15, s12, s11 - 80319ca: ee76 7aa7 vadd.f32 s15, s13, s15 - 80319ce: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 80319d2: ee77 7aa6 vadd.f32 s15, s15, s13 - 80319d6: ee67 7a27 vmul.f32 s15, s14, s15 - 80319da: edc7 7a07 vstr s15, [r7, #28] + 80319cc: 697b ldr r3, [r7, #20] + 80319ce: ee07 3a90 vmov s15, r3 + 80319d2: eef8 7a67 vcvt.f32.u32 s15, s15 + 80319d6: eddf 6a5f vldr s13, [pc, #380] ; 8031b54 + 80319da: ee86 7aa7 vdiv.f32 s14, s13, s15 + 80319de: 4b59 ldr r3, [pc, #356] ; (8031b44 ) + 80319e0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80319e2: f3c3 0308 ubfx r3, r3, #0, #9 + 80319e6: ee07 3a90 vmov s15, r3 + 80319ea: eef8 6a67 vcvt.f32.u32 s13, s15 + 80319ee: ed97 6a03 vldr s12, [r7, #12] + 80319f2: eddf 5a56 vldr s11, [pc, #344] ; 8031b4c + 80319f6: eec6 7a25 vdiv.f32 s15, s12, s11 + 80319fa: ee76 7aa7 vadd.f32 s15, s13, s15 + 80319fe: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031a02: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031a06: ee67 7a27 vmul.f32 s15, s14, s15 + 8031a0a: edc7 7a07 vstr s15, [r7, #28] break; - 80319de: e043 b.n 8031a68 + 8031a0e: e043 b.n 8031a98 case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pll3vco = ((float_t)HSE_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 80319e0: 697b ldr r3, [r7, #20] - 80319e2: ee07 3a90 vmov s15, r3 - 80319e6: eef8 7a67 vcvt.f32.u32 s15, s15 - 80319ea: eddf 6a4f vldr s13, [pc, #316] ; 8031b28 - 80319ee: ee86 7aa7 vdiv.f32 s14, s13, s15 - 80319f2: 4b48 ldr r3, [pc, #288] ; (8031b14 ) - 80319f4: 6c1b ldr r3, [r3, #64] ; 0x40 - 80319f6: f3c3 0308 ubfx r3, r3, #0, #9 - 80319fa: ee07 3a90 vmov s15, r3 - 80319fe: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031a02: ed97 6a03 vldr s12, [r7, #12] - 8031a06: eddf 5a45 vldr s11, [pc, #276] ; 8031b1c - 8031a0a: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031a0e: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031a12: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031a16: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031a1a: ee67 7a27 vmul.f32 s15, s14, s15 - 8031a1e: edc7 7a07 vstr s15, [r7, #28] + 8031a10: 697b ldr r3, [r7, #20] + 8031a12: ee07 3a90 vmov s15, r3 + 8031a16: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031a1a: eddf 6a4f vldr s13, [pc, #316] ; 8031b58 + 8031a1e: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031a22: 4b48 ldr r3, [pc, #288] ; (8031b44 ) + 8031a24: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031a26: f3c3 0308 ubfx r3, r3, #0, #9 + 8031a2a: ee07 3a90 vmov s15, r3 + 8031a2e: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031a32: ed97 6a03 vldr s12, [r7, #12] + 8031a36: eddf 5a45 vldr s11, [pc, #276] ; 8031b4c + 8031a3a: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031a3e: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031a42: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031a46: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031a4a: ee67 7a27 vmul.f32 s15, s14, s15 + 8031a4e: edc7 7a07 vstr s15, [r7, #28] break; - 8031a22: e021 b.n 8031a68 + 8031a52: e021 b.n 8031a98 default: pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 8031a24: 697b ldr r3, [r7, #20] - 8031a26: ee07 3a90 vmov s15, r3 - 8031a2a: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031a2e: eddf 6a3d vldr s13, [pc, #244] ; 8031b24 - 8031a32: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031a36: 4b37 ldr r3, [pc, #220] ; (8031b14 ) - 8031a38: 6c1b ldr r3, [r3, #64] ; 0x40 - 8031a3a: f3c3 0308 ubfx r3, r3, #0, #9 - 8031a3e: ee07 3a90 vmov s15, r3 - 8031a42: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031a46: ed97 6a03 vldr s12, [r7, #12] - 8031a4a: eddf 5a34 vldr s11, [pc, #208] ; 8031b1c - 8031a4e: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031a52: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031a56: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031a5a: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031a5e: ee67 7a27 vmul.f32 s15, s14, s15 - 8031a62: edc7 7a07 vstr s15, [r7, #28] + 8031a54: 697b ldr r3, [r7, #20] + 8031a56: ee07 3a90 vmov s15, r3 + 8031a5a: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031a5e: eddf 6a3d vldr s13, [pc, #244] ; 8031b54 + 8031a62: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031a66: 4b37 ldr r3, [pc, #220] ; (8031b44 ) + 8031a68: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031a6a: f3c3 0308 ubfx r3, r3, #0, #9 + 8031a6e: ee07 3a90 vmov s15, r3 + 8031a72: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031a76: ed97 6a03 vldr s12, [r7, #12] + 8031a7a: eddf 5a34 vldr s11, [pc, #208] ; 8031b4c + 8031a7e: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031a82: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031a86: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031a8a: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031a8e: ee67 7a27 vmul.f32 s15, s14, s15 + 8031a92: edc7 7a07 vstr s15, [r7, #28] break; - 8031a66: bf00 nop + 8031a96: bf00 nop } PLL3_Clocks->PLL3_P_Frequency = (uint32_t)(float_t)(pll3vco/((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >>9) + (float_t)1 )) ; - 8031a68: 4b2a ldr r3, [pc, #168] ; (8031b14 ) - 8031a6a: 6c1b ldr r3, [r3, #64] ; 0x40 - 8031a6c: 0a5b lsrs r3, r3, #9 - 8031a6e: f003 037f and.w r3, r3, #127 ; 0x7f - 8031a72: ee07 3a90 vmov s15, r3 - 8031a76: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031a7a: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031a7e: ee37 7a87 vadd.f32 s14, s15, s14 - 8031a82: edd7 6a07 vldr s13, [r7, #28] - 8031a86: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031a8a: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031a8e: ee17 2a90 vmov r2, s15 - 8031a92: 687b ldr r3, [r7, #4] - 8031a94: 601a str r2, [r3, #0] + 8031a98: 4b2a ldr r3, [pc, #168] ; (8031b44 ) + 8031a9a: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031a9c: 0a5b lsrs r3, r3, #9 + 8031a9e: f003 037f and.w r3, r3, #127 ; 0x7f + 8031aa2: ee07 3a90 vmov s15, r3 + 8031aa6: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031aaa: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031aae: ee37 7a87 vadd.f32 s14, s15, s14 + 8031ab2: edd7 6a07 vldr s13, [r7, #28] + 8031ab6: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031aba: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031abe: ee17 2a90 vmov r2, s15 + 8031ac2: 687b ldr r3, [r7, #4] + 8031ac4: 601a str r2, [r3, #0] PLL3_Clocks->PLL3_Q_Frequency = (uint32_t)(float_t)(pll3vco/((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_Q3) >>16) + (float_t)1 )) ; - 8031a96: 4b1f ldr r3, [pc, #124] ; (8031b14 ) - 8031a98: 6c1b ldr r3, [r3, #64] ; 0x40 - 8031a9a: 0c1b lsrs r3, r3, #16 - 8031a9c: f003 037f and.w r3, r3, #127 ; 0x7f - 8031aa0: ee07 3a90 vmov s15, r3 - 8031aa4: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031aa8: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031aac: ee37 7a87 vadd.f32 s14, s15, s14 - 8031ab0: edd7 6a07 vldr s13, [r7, #28] - 8031ab4: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031ab8: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031abc: ee17 2a90 vmov r2, s15 - 8031ac0: 687b ldr r3, [r7, #4] - 8031ac2: 605a str r2, [r3, #4] + 8031ac6: 4b1f ldr r3, [pc, #124] ; (8031b44 ) + 8031ac8: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031aca: 0c1b lsrs r3, r3, #16 + 8031acc: f003 037f and.w r3, r3, #127 ; 0x7f + 8031ad0: ee07 3a90 vmov s15, r3 + 8031ad4: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031ad8: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031adc: ee37 7a87 vadd.f32 s14, s15, s14 + 8031ae0: edd7 6a07 vldr s13, [r7, #28] + 8031ae4: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031ae8: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031aec: ee17 2a90 vmov r2, s15 + 8031af0: 687b ldr r3, [r7, #4] + 8031af2: 605a str r2, [r3, #4] PLL3_Clocks->PLL3_R_Frequency = (uint32_t)(float_t)(pll3vco/((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_R3) >>24) + (float_t)1 )) ; - 8031ac4: 4b13 ldr r3, [pc, #76] ; (8031b14 ) - 8031ac6: 6c1b ldr r3, [r3, #64] ; 0x40 - 8031ac8: 0e1b lsrs r3, r3, #24 - 8031aca: f003 037f and.w r3, r3, #127 ; 0x7f - 8031ace: ee07 3a90 vmov s15, r3 - 8031ad2: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031ad6: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031ada: ee37 7a87 vadd.f32 s14, s15, s14 - 8031ade: edd7 6a07 vldr s13, [r7, #28] - 8031ae2: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031ae6: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031aea: ee17 2a90 vmov r2, s15 - 8031aee: 687b ldr r3, [r7, #4] - 8031af0: 609a str r2, [r3, #8] + 8031af4: 4b13 ldr r3, [pc, #76] ; (8031b44 ) + 8031af6: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031af8: 0e1b lsrs r3, r3, #24 + 8031afa: f003 037f and.w r3, r3, #127 ; 0x7f + 8031afe: ee07 3a90 vmov s15, r3 + 8031b02: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031b06: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031b0a: ee37 7a87 vadd.f32 s14, s15, s14 + 8031b0e: edd7 6a07 vldr s13, [r7, #28] + 8031b12: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031b16: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031b1a: ee17 2a90 vmov r2, s15 + 8031b1e: 687b ldr r3, [r7, #4] + 8031b20: 609a str r2, [r3, #8] PLL3_Clocks->PLL3_P_Frequency = 0U; PLL3_Clocks->PLL3_Q_Frequency = 0U; PLL3_Clocks->PLL3_R_Frequency = 0U; } } - 8031af2: e008 b.n 8031b06 + 8031b22: e008 b.n 8031b36 PLL3_Clocks->PLL3_P_Frequency = 0U; - 8031af4: 687b ldr r3, [r7, #4] - 8031af6: 2200 movs r2, #0 - 8031af8: 601a str r2, [r3, #0] + 8031b24: 687b ldr r3, [r7, #4] + 8031b26: 2200 movs r2, #0 + 8031b28: 601a str r2, [r3, #0] PLL3_Clocks->PLL3_Q_Frequency = 0U; - 8031afa: 687b ldr r3, [r7, #4] - 8031afc: 2200 movs r2, #0 - 8031afe: 605a str r2, [r3, #4] + 8031b2a: 687b ldr r3, [r7, #4] + 8031b2c: 2200 movs r2, #0 + 8031b2e: 605a str r2, [r3, #4] PLL3_Clocks->PLL3_R_Frequency = 0U; - 8031b00: 687b ldr r3, [r7, #4] - 8031b02: 2200 movs r2, #0 - 8031b04: 609a str r2, [r3, #8] -} - 8031b06: bf00 nop - 8031b08: 3724 adds r7, #36 ; 0x24 - 8031b0a: 46bd mov sp, r7 - 8031b0c: f85d 7b04 ldr.w r7, [sp], #4 - 8031b10: 4770 bx lr - 8031b12: bf00 nop - 8031b14: 58024400 .word 0x58024400 - 8031b18: 03d09000 .word 0x03d09000 - 8031b1c: 46000000 .word 0x46000000 - 8031b20: 4c742400 .word 0x4c742400 - 8031b24: 4a742400 .word 0x4a742400 - 8031b28: 4bbebc20 .word 0x4bbebc20 - -08031b2c : + 8031b30: 687b ldr r3, [r7, #4] + 8031b32: 2200 movs r2, #0 + 8031b34: 609a str r2, [r3, #8] +} + 8031b36: bf00 nop + 8031b38: 3724 adds r7, #36 ; 0x24 + 8031b3a: 46bd mov sp, r7 + 8031b3c: f85d 7b04 ldr.w r7, [sp], #4 + 8031b40: 4770 bx lr + 8031b42: bf00 nop + 8031b44: 58024400 .word 0x58024400 + 8031b48: 03d09000 .word 0x03d09000 + 8031b4c: 46000000 .word 0x46000000 + 8031b50: 4c742400 .word 0x4c742400 + 8031b54: 4a742400 .word 0x4a742400 + 8031b58: 4bbebc20 .word 0x4bbebc20 + +08031b5c : * right PLL1CLK value. Otherwise, any configuration based on this function will be incorrect. * @param PLL1_Clocks structure. * @retval None */ void HAL_RCCEx_GetPLL1ClockFreq(PLL1_ClocksTypeDef* PLL1_Clocks) { - 8031b2c: b480 push {r7} - 8031b2e: b089 sub sp, #36 ; 0x24 - 8031b30: af00 add r7, sp, #0 - 8031b32: 6078 str r0, [r7, #4] + 8031b5c: b480 push {r7} + 8031b5e: b089 sub sp, #36 ; 0x24 + 8031b60: af00 add r7, sp, #0 + 8031b62: 6078 str r0, [r7, #4] uint32_t pllsource, pll1m, pll1fracen, hsivalue; float_t fracn1, pll1vco; pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); - 8031b34: 4ba0 ldr r3, [pc, #640] ; (8031db8 ) - 8031b36: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031b38: f003 0303 and.w r3, r3, #3 - 8031b3c: 61bb str r3, [r7, #24] + 8031b64: 4ba0 ldr r3, [pc, #640] ; (8031de8 ) + 8031b66: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031b68: f003 0303 and.w r3, r3, #3 + 8031b6c: 61bb str r3, [r7, #24] pll1m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4); - 8031b3e: 4b9e ldr r3, [pc, #632] ; (8031db8 ) - 8031b40: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031b42: 091b lsrs r3, r3, #4 - 8031b44: f003 033f and.w r3, r3, #63 ; 0x3f - 8031b48: 617b str r3, [r7, #20] + 8031b6e: 4b9e ldr r3, [pc, #632] ; (8031de8 ) + 8031b70: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031b72: 091b lsrs r3, r3, #4 + 8031b74: f003 033f and.w r3, r3, #63 ; 0x3f + 8031b78: 617b str r3, [r7, #20] pll1fracen = RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN; - 8031b4a: 4b9b ldr r3, [pc, #620] ; (8031db8 ) - 8031b4c: 6adb ldr r3, [r3, #44] ; 0x2c - 8031b4e: f003 0301 and.w r3, r3, #1 - 8031b52: 613b str r3, [r7, #16] + 8031b7a: 4b9b ldr r3, [pc, #620] ; (8031de8 ) + 8031b7c: 6adb ldr r3, [r3, #44] ; 0x2c + 8031b7e: f003 0301 and.w r3, r3, #1 + 8031b82: 613b str r3, [r7, #16] fracn1 = (float_t)(uint32_t)(pll1fracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3)); - 8031b54: 4b98 ldr r3, [pc, #608] ; (8031db8 ) - 8031b56: 6b5b ldr r3, [r3, #52] ; 0x34 - 8031b58: 08db lsrs r3, r3, #3 - 8031b5a: f3c3 030c ubfx r3, r3, #0, #13 - 8031b5e: 693a ldr r2, [r7, #16] - 8031b60: fb02 f303 mul.w r3, r2, r3 - 8031b64: ee07 3a90 vmov s15, r3 - 8031b68: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031b6c: edc7 7a03 vstr s15, [r7, #12] + 8031b84: 4b98 ldr r3, [pc, #608] ; (8031de8 ) + 8031b86: 6b5b ldr r3, [r3, #52] ; 0x34 + 8031b88: 08db lsrs r3, r3, #3 + 8031b8a: f3c3 030c ubfx r3, r3, #0, #13 + 8031b8e: 693a ldr r2, [r7, #16] + 8031b90: fb02 f303 mul.w r3, r2, r3 + 8031b94: ee07 3a90 vmov s15, r3 + 8031b98: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031b9c: edc7 7a03 vstr s15, [r7, #12] if (pll1m != 0U) - 8031b70: 697b ldr r3, [r7, #20] - 8031b72: 2b00 cmp r3, #0 - 8031b74: f000 8111 beq.w 8031d9a + 8031ba0: 697b ldr r3, [r7, #20] + 8031ba2: 2b00 cmp r3, #0 + 8031ba4: f000 8111 beq.w 8031dca { switch (pllsource) - 8031b78: 69bb ldr r3, [r7, #24] - 8031b7a: 2b02 cmp r3, #2 - 8031b7c: f000 8083 beq.w 8031c86 - 8031b80: 69bb ldr r3, [r7, #24] - 8031b82: 2b02 cmp r3, #2 - 8031b84: f200 80a1 bhi.w 8031cca - 8031b88: 69bb ldr r3, [r7, #24] - 8031b8a: 2b00 cmp r3, #0 - 8031b8c: d003 beq.n 8031b96 - 8031b8e: 69bb ldr r3, [r7, #24] - 8031b90: 2b01 cmp r3, #1 - 8031b92: d056 beq.n 8031c42 - 8031b94: e099 b.n 8031cca + 8031ba8: 69bb ldr r3, [r7, #24] + 8031baa: 2b02 cmp r3, #2 + 8031bac: f000 8083 beq.w 8031cb6 + 8031bb0: 69bb ldr r3, [r7, #24] + 8031bb2: 2b02 cmp r3, #2 + 8031bb4: f200 80a1 bhi.w 8031cfa + 8031bb8: 69bb ldr r3, [r7, #24] + 8031bba: 2b00 cmp r3, #0 + 8031bbc: d003 beq.n 8031bc6 + 8031bbe: 69bb ldr r3, [r7, #24] + 8031bc0: 2b01 cmp r3, #1 + 8031bc2: d056 beq.n 8031c72 + 8031bc4: e099 b.n 8031cfa { case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8031b96: 4b88 ldr r3, [pc, #544] ; (8031db8 ) - 8031b98: 681b ldr r3, [r3, #0] - 8031b9a: f003 0320 and.w r3, r3, #32 - 8031b9e: 2b00 cmp r3, #0 - 8031ba0: d02d beq.n 8031bfe + 8031bc6: 4b88 ldr r3, [pc, #544] ; (8031de8 ) + 8031bc8: 681b ldr r3, [r3, #0] + 8031bca: f003 0320 and.w r3, r3, #32 + 8031bce: 2b00 cmp r3, #0 + 8031bd0: d02d beq.n 8031c2e { hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8031ba2: 4b85 ldr r3, [pc, #532] ; (8031db8 ) - 8031ba4: 681b ldr r3, [r3, #0] - 8031ba6: 08db lsrs r3, r3, #3 - 8031ba8: f003 0303 and.w r3, r3, #3 - 8031bac: 4a83 ldr r2, [pc, #524] ; (8031dbc ) - 8031bae: fa22 f303 lsr.w r3, r2, r3 - 8031bb2: 60bb str r3, [r7, #8] + 8031bd2: 4b85 ldr r3, [pc, #532] ; (8031de8 ) + 8031bd4: 681b ldr r3, [r3, #0] + 8031bd6: 08db lsrs r3, r3, #3 + 8031bd8: f003 0303 and.w r3, r3, #3 + 8031bdc: 4a83 ldr r2, [pc, #524] ; (8031dec ) + 8031bde: fa22 f303 lsr.w r3, r2, r3 + 8031be2: 60bb str r3, [r7, #8] pll1vco = ((float_t)hsivalue / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031bb4: 68bb ldr r3, [r7, #8] - 8031bb6: ee07 3a90 vmov s15, r3 - 8031bba: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031bbe: 697b ldr r3, [r7, #20] - 8031bc0: ee07 3a90 vmov s15, r3 - 8031bc4: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031bc8: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031bcc: 4b7a ldr r3, [pc, #488] ; (8031db8 ) - 8031bce: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031bd0: f3c3 0308 ubfx r3, r3, #0, #9 - 8031bd4: ee07 3a90 vmov s15, r3 - 8031bd8: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031bdc: ed97 6a03 vldr s12, [r7, #12] - 8031be0: eddf 5a77 vldr s11, [pc, #476] ; 8031dc0 - 8031be4: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031be8: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031bec: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031bf0: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031bf4: ee67 7a27 vmul.f32 s15, s14, s15 - 8031bf8: edc7 7a07 vstr s15, [r7, #28] + 8031be4: 68bb ldr r3, [r7, #8] + 8031be6: ee07 3a90 vmov s15, r3 + 8031bea: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031bee: 697b ldr r3, [r7, #20] + 8031bf0: ee07 3a90 vmov s15, r3 + 8031bf4: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031bf8: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031bfc: 4b7a ldr r3, [pc, #488] ; (8031de8 ) + 8031bfe: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031c00: f3c3 0308 ubfx r3, r3, #0, #9 + 8031c04: ee07 3a90 vmov s15, r3 + 8031c08: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031c0c: ed97 6a03 vldr s12, [r7, #12] + 8031c10: eddf 5a77 vldr s11, [pc, #476] ; 8031df0 + 8031c14: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031c18: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031c1c: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031c20: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031c24: ee67 7a27 vmul.f32 s15, s14, s15 + 8031c28: edc7 7a07 vstr s15, [r7, #28] } else { pll1vco = ((float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); } break; - 8031bfc: e087 b.n 8031d0e + 8031c2c: e087 b.n 8031d3e pll1vco = ((float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031bfe: 697b ldr r3, [r7, #20] - 8031c00: ee07 3a90 vmov s15, r3 - 8031c04: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031c08: eddf 6a6e vldr s13, [pc, #440] ; 8031dc4 - 8031c0c: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031c10: 4b69 ldr r3, [pc, #420] ; (8031db8 ) - 8031c12: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031c14: f3c3 0308 ubfx r3, r3, #0, #9 - 8031c18: ee07 3a90 vmov s15, r3 - 8031c1c: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031c20: ed97 6a03 vldr s12, [r7, #12] - 8031c24: eddf 5a66 vldr s11, [pc, #408] ; 8031dc0 - 8031c28: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031c2c: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031c30: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031c34: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031c38: ee67 7a27 vmul.f32 s15, s14, s15 - 8031c3c: edc7 7a07 vstr s15, [r7, #28] + 8031c2e: 697b ldr r3, [r7, #20] + 8031c30: ee07 3a90 vmov s15, r3 + 8031c34: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031c38: eddf 6a6e vldr s13, [pc, #440] ; 8031df4 + 8031c3c: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031c40: 4b69 ldr r3, [pc, #420] ; (8031de8 ) + 8031c42: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031c44: f3c3 0308 ubfx r3, r3, #0, #9 + 8031c48: ee07 3a90 vmov s15, r3 + 8031c4c: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031c50: ed97 6a03 vldr s12, [r7, #12] + 8031c54: eddf 5a66 vldr s11, [pc, #408] ; 8031df0 + 8031c58: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031c5c: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031c60: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031c64: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031c68: ee67 7a27 vmul.f32 s15, s14, s15 + 8031c6c: edc7 7a07 vstr s15, [r7, #28] break; - 8031c40: e065 b.n 8031d0e + 8031c70: e065 b.n 8031d3e case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */ pll1vco = ((float_t)CSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031c42: 697b ldr r3, [r7, #20] - 8031c44: ee07 3a90 vmov s15, r3 - 8031c48: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031c4c: eddf 6a5e vldr s13, [pc, #376] ; 8031dc8 - 8031c50: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031c54: 4b58 ldr r3, [pc, #352] ; (8031db8 ) - 8031c56: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031c58: f3c3 0308 ubfx r3, r3, #0, #9 - 8031c5c: ee07 3a90 vmov s15, r3 - 8031c60: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031c64: ed97 6a03 vldr s12, [r7, #12] - 8031c68: eddf 5a55 vldr s11, [pc, #340] ; 8031dc0 - 8031c6c: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031c70: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031c74: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031c78: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031c7c: ee67 7a27 vmul.f32 s15, s14, s15 - 8031c80: edc7 7a07 vstr s15, [r7, #28] + 8031c72: 697b ldr r3, [r7, #20] + 8031c74: ee07 3a90 vmov s15, r3 + 8031c78: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031c7c: eddf 6a5e vldr s13, [pc, #376] ; 8031df8 + 8031c80: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031c84: 4b58 ldr r3, [pc, #352] ; (8031de8 ) + 8031c86: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031c88: f3c3 0308 ubfx r3, r3, #0, #9 + 8031c8c: ee07 3a90 vmov s15, r3 + 8031c90: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031c94: ed97 6a03 vldr s12, [r7, #12] + 8031c98: eddf 5a55 vldr s11, [pc, #340] ; 8031df0 + 8031c9c: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031ca0: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031ca4: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031ca8: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031cac: ee67 7a27 vmul.f32 s15, s14, s15 + 8031cb0: edc7 7a07 vstr s15, [r7, #28] break; - 8031c84: e043 b.n 8031d0e + 8031cb4: e043 b.n 8031d3e case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pll1vco = ((float_t)HSE_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031c86: 697b ldr r3, [r7, #20] - 8031c88: ee07 3a90 vmov s15, r3 - 8031c8c: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031c90: eddf 6a4e vldr s13, [pc, #312] ; 8031dcc - 8031c94: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031c98: 4b47 ldr r3, [pc, #284] ; (8031db8 ) - 8031c9a: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031c9c: f3c3 0308 ubfx r3, r3, #0, #9 - 8031ca0: ee07 3a90 vmov s15, r3 - 8031ca4: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031ca8: ed97 6a03 vldr s12, [r7, #12] - 8031cac: eddf 5a44 vldr s11, [pc, #272] ; 8031dc0 - 8031cb0: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031cb4: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031cb8: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031cbc: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031cc0: ee67 7a27 vmul.f32 s15, s14, s15 - 8031cc4: edc7 7a07 vstr s15, [r7, #28] + 8031cb6: 697b ldr r3, [r7, #20] + 8031cb8: ee07 3a90 vmov s15, r3 + 8031cbc: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031cc0: eddf 6a4e vldr s13, [pc, #312] ; 8031dfc + 8031cc4: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031cc8: 4b47 ldr r3, [pc, #284] ; (8031de8 ) + 8031cca: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031ccc: f3c3 0308 ubfx r3, r3, #0, #9 + 8031cd0: ee07 3a90 vmov s15, r3 + 8031cd4: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031cd8: ed97 6a03 vldr s12, [r7, #12] + 8031cdc: eddf 5a44 vldr s11, [pc, #272] ; 8031df0 + 8031ce0: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031ce4: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031ce8: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031cec: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031cf0: ee67 7a27 vmul.f32 s15, s14, s15 + 8031cf4: edc7 7a07 vstr s15, [r7, #28] break; - 8031cc8: e021 b.n 8031d0e + 8031cf8: e021 b.n 8031d3e default: pll1vco = ((float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031cca: 697b ldr r3, [r7, #20] - 8031ccc: ee07 3a90 vmov s15, r3 - 8031cd0: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031cd4: eddf 6a3b vldr s13, [pc, #236] ; 8031dc4 - 8031cd8: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031cdc: 4b36 ldr r3, [pc, #216] ; (8031db8 ) - 8031cde: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031ce0: f3c3 0308 ubfx r3, r3, #0, #9 - 8031ce4: ee07 3a90 vmov s15, r3 - 8031ce8: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031cec: ed97 6a03 vldr s12, [r7, #12] - 8031cf0: eddf 5a33 vldr s11, [pc, #204] ; 8031dc0 - 8031cf4: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031cf8: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031cfc: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031d00: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031d04: ee67 7a27 vmul.f32 s15, s14, s15 - 8031d08: edc7 7a07 vstr s15, [r7, #28] + 8031cfa: 697b ldr r3, [r7, #20] + 8031cfc: ee07 3a90 vmov s15, r3 + 8031d00: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031d04: eddf 6a3b vldr s13, [pc, #236] ; 8031df4 + 8031d08: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031d0c: 4b36 ldr r3, [pc, #216] ; (8031de8 ) + 8031d0e: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031d10: f3c3 0308 ubfx r3, r3, #0, #9 + 8031d14: ee07 3a90 vmov s15, r3 + 8031d18: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031d1c: ed97 6a03 vldr s12, [r7, #12] + 8031d20: eddf 5a33 vldr s11, [pc, #204] ; 8031df0 + 8031d24: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031d28: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031d2c: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031d30: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031d34: ee67 7a27 vmul.f32 s15, s14, s15 + 8031d38: edc7 7a07 vstr s15, [r7, #28] break; - 8031d0c: bf00 nop + 8031d3c: bf00 nop } PLL1_Clocks->PLL1_P_Frequency = (uint32_t)(float_t)(pll1vco/((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + (float_t)1 )) ; - 8031d0e: 4b2a ldr r3, [pc, #168] ; (8031db8 ) - 8031d10: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031d12: 0a5b lsrs r3, r3, #9 - 8031d14: f003 037f and.w r3, r3, #127 ; 0x7f - 8031d18: ee07 3a90 vmov s15, r3 - 8031d1c: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031d20: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031d24: ee37 7a87 vadd.f32 s14, s15, s14 - 8031d28: edd7 6a07 vldr s13, [r7, #28] - 8031d2c: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031d30: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031d34: ee17 2a90 vmov r2, s15 - 8031d38: 687b ldr r3, [r7, #4] - 8031d3a: 601a str r2, [r3, #0] + 8031d3e: 4b2a ldr r3, [pc, #168] ; (8031de8 ) + 8031d40: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031d42: 0a5b lsrs r3, r3, #9 + 8031d44: f003 037f and.w r3, r3, #127 ; 0x7f + 8031d48: ee07 3a90 vmov s15, r3 + 8031d4c: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031d50: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031d54: ee37 7a87 vadd.f32 s14, s15, s14 + 8031d58: edd7 6a07 vldr s13, [r7, #28] + 8031d5c: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031d60: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031d64: ee17 2a90 vmov r2, s15 + 8031d68: 687b ldr r3, [r7, #4] + 8031d6a: 601a str r2, [r3, #0] PLL1_Clocks->PLL1_Q_Frequency = (uint32_t)(float_t)(pll1vco/((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_Q1) >>16) + (float_t)1 )) ; - 8031d3c: 4b1e ldr r3, [pc, #120] ; (8031db8 ) - 8031d3e: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031d40: 0c1b lsrs r3, r3, #16 - 8031d42: f003 037f and.w r3, r3, #127 ; 0x7f - 8031d46: ee07 3a90 vmov s15, r3 - 8031d4a: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031d4e: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031d52: ee37 7a87 vadd.f32 s14, s15, s14 - 8031d56: edd7 6a07 vldr s13, [r7, #28] - 8031d5a: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031d5e: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031d62: ee17 2a90 vmov r2, s15 - 8031d66: 687b ldr r3, [r7, #4] - 8031d68: 605a str r2, [r3, #4] + 8031d6c: 4b1e ldr r3, [pc, #120] ; (8031de8 ) + 8031d6e: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031d70: 0c1b lsrs r3, r3, #16 + 8031d72: f003 037f and.w r3, r3, #127 ; 0x7f + 8031d76: ee07 3a90 vmov s15, r3 + 8031d7a: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031d7e: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031d82: ee37 7a87 vadd.f32 s14, s15, s14 + 8031d86: edd7 6a07 vldr s13, [r7, #28] + 8031d8a: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031d8e: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031d92: ee17 2a90 vmov r2, s15 + 8031d96: 687b ldr r3, [r7, #4] + 8031d98: 605a str r2, [r3, #4] PLL1_Clocks->PLL1_R_Frequency = (uint32_t)(float_t)(pll1vco/((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_R1) >>24) + (float_t)1 )) ; - 8031d6a: 4b13 ldr r3, [pc, #76] ; (8031db8 ) - 8031d6c: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031d6e: 0e1b lsrs r3, r3, #24 - 8031d70: f003 037f and.w r3, r3, #127 ; 0x7f - 8031d74: ee07 3a90 vmov s15, r3 - 8031d78: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031d7c: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031d80: ee37 7a87 vadd.f32 s14, s15, s14 - 8031d84: edd7 6a07 vldr s13, [r7, #28] - 8031d88: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031d8c: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031d90: ee17 2a90 vmov r2, s15 - 8031d94: 687b ldr r3, [r7, #4] - 8031d96: 609a str r2, [r3, #8] + 8031d9a: 4b13 ldr r3, [pc, #76] ; (8031de8 ) + 8031d9c: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031d9e: 0e1b lsrs r3, r3, #24 + 8031da0: f003 037f and.w r3, r3, #127 ; 0x7f + 8031da4: ee07 3a90 vmov s15, r3 + 8031da8: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031dac: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031db0: ee37 7a87 vadd.f32 s14, s15, s14 + 8031db4: edd7 6a07 vldr s13, [r7, #28] + 8031db8: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031dbc: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031dc0: ee17 2a90 vmov r2, s15 + 8031dc4: 687b ldr r3, [r7, #4] + 8031dc6: 609a str r2, [r3, #8] PLL1_Clocks->PLL1_P_Frequency = 0U; PLL1_Clocks->PLL1_Q_Frequency = 0U; PLL1_Clocks->PLL1_R_Frequency = 0U; } } - 8031d98: e008 b.n 8031dac + 8031dc8: e008 b.n 8031ddc PLL1_Clocks->PLL1_P_Frequency = 0U; - 8031d9a: 687b ldr r3, [r7, #4] - 8031d9c: 2200 movs r2, #0 - 8031d9e: 601a str r2, [r3, #0] + 8031dca: 687b ldr r3, [r7, #4] + 8031dcc: 2200 movs r2, #0 + 8031dce: 601a str r2, [r3, #0] PLL1_Clocks->PLL1_Q_Frequency = 0U; - 8031da0: 687b ldr r3, [r7, #4] - 8031da2: 2200 movs r2, #0 - 8031da4: 605a str r2, [r3, #4] + 8031dd0: 687b ldr r3, [r7, #4] + 8031dd2: 2200 movs r2, #0 + 8031dd4: 605a str r2, [r3, #4] PLL1_Clocks->PLL1_R_Frequency = 0U; - 8031da6: 687b ldr r3, [r7, #4] - 8031da8: 2200 movs r2, #0 - 8031daa: 609a str r2, [r3, #8] -} - 8031dac: bf00 nop - 8031dae: 3724 adds r7, #36 ; 0x24 - 8031db0: 46bd mov sp, r7 - 8031db2: f85d 7b04 ldr.w r7, [sp], #4 - 8031db6: 4770 bx lr - 8031db8: 58024400 .word 0x58024400 - 8031dbc: 03d09000 .word 0x03d09000 - 8031dc0: 46000000 .word 0x46000000 - 8031dc4: 4c742400 .word 0x4c742400 - 8031dc8: 4a742400 .word 0x4a742400 - 8031dcc: 4bbebc20 .word 0x4bbebc20 - -08031dd0 : + 8031dd6: 687b ldr r3, [r7, #4] + 8031dd8: 2200 movs r2, #0 + 8031dda: 609a str r2, [r3, #8] +} + 8031ddc: bf00 nop + 8031dde: 3724 adds r7, #36 ; 0x24 + 8031de0: 46bd mov sp, r7 + 8031de2: f85d 7b04 ldr.w r7, [sp], #4 + 8031de6: 4770 bx lr + 8031de8: 58024400 .word 0x58024400 + 8031dec: 03d09000 .word 0x03d09000 + 8031df0: 46000000 .word 0x46000000 + 8031df4: 4c742400 .word 0x4c742400 + 8031df8: 4a742400 .word 0x4a742400 + 8031dfc: 4bbebc20 .word 0x4bbebc20 + +08031e00 : * @note PLL2 is temporary disabled to apply new parameters * * @retval HAL status */ static HAL_StatusTypeDef RCCEx_PLL2_Config(RCC_PLL2InitTypeDef *pll2, uint32_t Divider) { - 8031dd0: b580 push {r7, lr} - 8031dd2: b084 sub sp, #16 - 8031dd4: af00 add r7, sp, #0 - 8031dd6: 6078 str r0, [r7, #4] - 8031dd8: 6039 str r1, [r7, #0] + 8031e00: b580 push {r7, lr} + 8031e02: b084 sub sp, #16 + 8031e04: af00 add r7, sp, #0 + 8031e06: 6078 str r0, [r7, #4] + 8031e08: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status = HAL_OK; - 8031dda: 2300 movs r3, #0 - 8031ddc: 73fb strb r3, [r7, #15] + 8031e0a: 2300 movs r3, #0 + 8031e0c: 73fb strb r3, [r7, #15] assert_param(IS_RCC_PLL2RGE_VALUE(pll2->PLL2RGE)); assert_param(IS_RCC_PLL2VCO_VALUE(pll2->PLL2VCOSEL)); assert_param(IS_RCC_PLLFRACN_VALUE(pll2->PLL2FRACN)); /* Check that PLL2 OSC clock source is already set */ if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE) - 8031dde: 4b53 ldr r3, [pc, #332] ; (8031f2c ) - 8031de0: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031de2: f003 0303 and.w r3, r3, #3 - 8031de6: 2b03 cmp r3, #3 - 8031de8: d101 bne.n 8031dee + 8031e0e: 4b53 ldr r3, [pc, #332] ; (8031f5c ) + 8031e10: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031e12: f003 0303 and.w r3, r3, #3 + 8031e16: 2b03 cmp r3, #3 + 8031e18: d101 bne.n 8031e1e { return HAL_ERROR; - 8031dea: 2301 movs r3, #1 - 8031dec: e099 b.n 8031f22 + 8031e1a: 2301 movs r3, #1 + 8031e1c: e099 b.n 8031f52 else { /* Disable PLL2. */ __HAL_RCC_PLL2_DISABLE(); - 8031dee: 4b4f ldr r3, [pc, #316] ; (8031f2c ) - 8031df0: 681b ldr r3, [r3, #0] - 8031df2: 4a4e ldr r2, [pc, #312] ; (8031f2c ) - 8031df4: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000 - 8031df8: 6013 str r3, [r2, #0] + 8031e1e: 4b4f ldr r3, [pc, #316] ; (8031f5c ) + 8031e20: 681b ldr r3, [r3, #0] + 8031e22: 4a4e ldr r2, [pc, #312] ; (8031f5c ) + 8031e24: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000 + 8031e28: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8031dfa: f7f4 f8cb bl 8025f94 - 8031dfe: 60b8 str r0, [r7, #8] + 8031e2a: f7f4 f8cb bl 8025fc4 + 8031e2e: 60b8 str r0, [r7, #8] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U) - 8031e00: e008 b.n 8031e14 + 8031e30: e008 b.n 8031e44 { if( (HAL_GetTick() - tickstart ) > PLL2_TIMEOUT_VALUE) - 8031e02: f7f4 f8c7 bl 8025f94 - 8031e06: 4602 mov r2, r0 - 8031e08: 68bb ldr r3, [r7, #8] - 8031e0a: 1ad3 subs r3, r2, r3 - 8031e0c: 2b02 cmp r3, #2 - 8031e0e: d901 bls.n 8031e14 + 8031e32: f7f4 f8c7 bl 8025fc4 + 8031e36: 4602 mov r2, r0 + 8031e38: 68bb ldr r3, [r7, #8] + 8031e3a: 1ad3 subs r3, r2, r3 + 8031e3c: 2b02 cmp r3, #2 + 8031e3e: d901 bls.n 8031e44 { return HAL_TIMEOUT; - 8031e10: 2303 movs r3, #3 - 8031e12: e086 b.n 8031f22 + 8031e40: 2303 movs r3, #3 + 8031e42: e086 b.n 8031f52 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U) - 8031e14: 4b45 ldr r3, [pc, #276] ; (8031f2c ) - 8031e16: 681b ldr r3, [r3, #0] - 8031e18: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8031e1c: 2b00 cmp r3, #0 - 8031e1e: d1f0 bne.n 8031e02 + 8031e44: 4b45 ldr r3, [pc, #276] ; (8031f5c ) + 8031e46: 681b ldr r3, [r3, #0] + 8031e48: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8031e4c: 2b00 cmp r3, #0 + 8031e4e: d1f0 bne.n 8031e32 } } /* Configure PLL2 multiplication and division factors. */ __HAL_RCC_PLL2_CONFIG(pll2->PLL2M, - 8031e20: 4b42 ldr r3, [pc, #264] ; (8031f2c ) - 8031e22: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031e24: f423 327c bic.w r2, r3, #258048 ; 0x3f000 - 8031e28: 687b ldr r3, [r7, #4] - 8031e2a: 681b ldr r3, [r3, #0] - 8031e2c: 031b lsls r3, r3, #12 - 8031e2e: 493f ldr r1, [pc, #252] ; (8031f2c ) - 8031e30: 4313 orrs r3, r2 - 8031e32: 628b str r3, [r1, #40] ; 0x28 - 8031e34: 687b ldr r3, [r7, #4] - 8031e36: 685b ldr r3, [r3, #4] - 8031e38: 3b01 subs r3, #1 - 8031e3a: f3c3 0208 ubfx r2, r3, #0, #9 - 8031e3e: 687b ldr r3, [r7, #4] - 8031e40: 689b ldr r3, [r3, #8] - 8031e42: 3b01 subs r3, #1 - 8031e44: 025b lsls r3, r3, #9 - 8031e46: b29b uxth r3, r3 - 8031e48: 431a orrs r2, r3 - 8031e4a: 687b ldr r3, [r7, #4] - 8031e4c: 68db ldr r3, [r3, #12] - 8031e4e: 3b01 subs r3, #1 - 8031e50: 041b lsls r3, r3, #16 - 8031e52: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 8031e56: 431a orrs r2, r3 + 8031e50: 4b42 ldr r3, [pc, #264] ; (8031f5c ) + 8031e52: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031e54: f423 327c bic.w r2, r3, #258048 ; 0x3f000 8031e58: 687b ldr r3, [r7, #4] - 8031e5a: 691b ldr r3, [r3, #16] - 8031e5c: 3b01 subs r3, #1 - 8031e5e: 061b lsls r3, r3, #24 - 8031e60: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 - 8031e64: 4931 ldr r1, [pc, #196] ; (8031f2c ) - 8031e66: 4313 orrs r3, r2 - 8031e68: 638b str r3, [r1, #56] ; 0x38 + 8031e5a: 681b ldr r3, [r3, #0] + 8031e5c: 031b lsls r3, r3, #12 + 8031e5e: 493f ldr r1, [pc, #252] ; (8031f5c ) + 8031e60: 4313 orrs r3, r2 + 8031e62: 628b str r3, [r1, #40] ; 0x28 + 8031e64: 687b ldr r3, [r7, #4] + 8031e66: 685b ldr r3, [r3, #4] + 8031e68: 3b01 subs r3, #1 + 8031e6a: f3c3 0208 ubfx r2, r3, #0, #9 + 8031e6e: 687b ldr r3, [r7, #4] + 8031e70: 689b ldr r3, [r3, #8] + 8031e72: 3b01 subs r3, #1 + 8031e74: 025b lsls r3, r3, #9 + 8031e76: b29b uxth r3, r3 + 8031e78: 431a orrs r2, r3 + 8031e7a: 687b ldr r3, [r7, #4] + 8031e7c: 68db ldr r3, [r3, #12] + 8031e7e: 3b01 subs r3, #1 + 8031e80: 041b lsls r3, r3, #16 + 8031e82: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 8031e86: 431a orrs r2, r3 + 8031e88: 687b ldr r3, [r7, #4] + 8031e8a: 691b ldr r3, [r3, #16] + 8031e8c: 3b01 subs r3, #1 + 8031e8e: 061b lsls r3, r3, #24 + 8031e90: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 + 8031e94: 4931 ldr r1, [pc, #196] ; (8031f5c ) + 8031e96: 4313 orrs r3, r2 + 8031e98: 638b str r3, [r1, #56] ; 0x38 pll2->PLL2P, pll2->PLL2Q, pll2->PLL2R); /* Select PLL2 input reference frequency range: VCI */ __HAL_RCC_PLL2_VCIRANGE(pll2->PLL2RGE) ; - 8031e6a: 4b30 ldr r3, [pc, #192] ; (8031f2c ) - 8031e6c: 6adb ldr r3, [r3, #44] ; 0x2c - 8031e6e: f023 02c0 bic.w r2, r3, #192 ; 0xc0 - 8031e72: 687b ldr r3, [r7, #4] - 8031e74: 695b ldr r3, [r3, #20] - 8031e76: 492d ldr r1, [pc, #180] ; (8031f2c ) - 8031e78: 4313 orrs r3, r2 - 8031e7a: 62cb str r3, [r1, #44] ; 0x2c + 8031e9a: 4b30 ldr r3, [pc, #192] ; (8031f5c ) + 8031e9c: 6adb ldr r3, [r3, #44] ; 0x2c + 8031e9e: f023 02c0 bic.w r2, r3, #192 ; 0xc0 + 8031ea2: 687b ldr r3, [r7, #4] + 8031ea4: 695b ldr r3, [r3, #20] + 8031ea6: 492d ldr r1, [pc, #180] ; (8031f5c ) + 8031ea8: 4313 orrs r3, r2 + 8031eaa: 62cb str r3, [r1, #44] ; 0x2c /* Select PLL2 output frequency range : VCO */ __HAL_RCC_PLL2_VCORANGE(pll2->PLL2VCOSEL) ; - 8031e7c: 4b2b ldr r3, [pc, #172] ; (8031f2c ) - 8031e7e: 6adb ldr r3, [r3, #44] ; 0x2c - 8031e80: f023 0220 bic.w r2, r3, #32 - 8031e84: 687b ldr r3, [r7, #4] - 8031e86: 699b ldr r3, [r3, #24] - 8031e88: 4928 ldr r1, [pc, #160] ; (8031f2c ) - 8031e8a: 4313 orrs r3, r2 - 8031e8c: 62cb str r3, [r1, #44] ; 0x2c + 8031eac: 4b2b ldr r3, [pc, #172] ; (8031f5c ) + 8031eae: 6adb ldr r3, [r3, #44] ; 0x2c + 8031eb0: f023 0220 bic.w r2, r3, #32 + 8031eb4: 687b ldr r3, [r7, #4] + 8031eb6: 699b ldr r3, [r3, #24] + 8031eb8: 4928 ldr r1, [pc, #160] ; (8031f5c ) + 8031eba: 4313 orrs r3, r2 + 8031ebc: 62cb str r3, [r1, #44] ; 0x2c /* Disable PLL2FRACN . */ __HAL_RCC_PLL2FRACN_DISABLE(); - 8031e8e: 4b27 ldr r3, [pc, #156] ; (8031f2c ) - 8031e90: 6adb ldr r3, [r3, #44] ; 0x2c - 8031e92: 4a26 ldr r2, [pc, #152] ; (8031f2c ) - 8031e94: f023 0310 bic.w r3, r3, #16 - 8031e98: 62d3 str r3, [r2, #44] ; 0x2c + 8031ebe: 4b27 ldr r3, [pc, #156] ; (8031f5c ) + 8031ec0: 6adb ldr r3, [r3, #44] ; 0x2c + 8031ec2: 4a26 ldr r2, [pc, #152] ; (8031f5c ) + 8031ec4: f023 0310 bic.w r3, r3, #16 + 8031ec8: 62d3 str r3, [r2, #44] ; 0x2c /* Configures PLL2 clock Fractional Part Of The Multiplication Factor */ __HAL_RCC_PLL2FRACN_CONFIG(pll2->PLL2FRACN); - 8031e9a: 4b24 ldr r3, [pc, #144] ; (8031f2c ) - 8031e9c: 6bda ldr r2, [r3, #60] ; 0x3c - 8031e9e: 4b24 ldr r3, [pc, #144] ; (8031f30 ) - 8031ea0: 4013 ands r3, r2 - 8031ea2: 687a ldr r2, [r7, #4] - 8031ea4: 69d2 ldr r2, [r2, #28] - 8031ea6: 00d2 lsls r2, r2, #3 - 8031ea8: 4920 ldr r1, [pc, #128] ; (8031f2c ) - 8031eaa: 4313 orrs r3, r2 - 8031eac: 63cb str r3, [r1, #60] ; 0x3c + 8031eca: 4b24 ldr r3, [pc, #144] ; (8031f5c ) + 8031ecc: 6bda ldr r2, [r3, #60] ; 0x3c + 8031ece: 4b24 ldr r3, [pc, #144] ; (8031f60 ) + 8031ed0: 4013 ands r3, r2 + 8031ed2: 687a ldr r2, [r7, #4] + 8031ed4: 69d2 ldr r2, [r2, #28] + 8031ed6: 00d2 lsls r2, r2, #3 + 8031ed8: 4920 ldr r1, [pc, #128] ; (8031f5c ) + 8031eda: 4313 orrs r3, r2 + 8031edc: 63cb str r3, [r1, #60] ; 0x3c /* Enable PLL2FRACN . */ __HAL_RCC_PLL2FRACN_ENABLE(); - 8031eae: 4b1f ldr r3, [pc, #124] ; (8031f2c ) - 8031eb0: 6adb ldr r3, [r3, #44] ; 0x2c - 8031eb2: 4a1e ldr r2, [pc, #120] ; (8031f2c ) - 8031eb4: f043 0310 orr.w r3, r3, #16 - 8031eb8: 62d3 str r3, [r2, #44] ; 0x2c + 8031ede: 4b1f ldr r3, [pc, #124] ; (8031f5c ) + 8031ee0: 6adb ldr r3, [r3, #44] ; 0x2c + 8031ee2: 4a1e ldr r2, [pc, #120] ; (8031f5c ) + 8031ee4: f043 0310 orr.w r3, r3, #16 + 8031ee8: 62d3 str r3, [r2, #44] ; 0x2c /* Enable the PLL2 clock output */ if(Divider == DIVIDER_P_UPDATE) - 8031eba: 683b ldr r3, [r7, #0] - 8031ebc: 2b00 cmp r3, #0 - 8031ebe: d106 bne.n 8031ece + 8031eea: 683b ldr r3, [r7, #0] + 8031eec: 2b00 cmp r3, #0 + 8031eee: d106 bne.n 8031efe { __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP); - 8031ec0: 4b1a ldr r3, [pc, #104] ; (8031f2c ) - 8031ec2: 6adb ldr r3, [r3, #44] ; 0x2c - 8031ec4: 4a19 ldr r2, [pc, #100] ; (8031f2c ) - 8031ec6: f443 2300 orr.w r3, r3, #524288 ; 0x80000 - 8031eca: 62d3 str r3, [r2, #44] ; 0x2c - 8031ecc: e00f b.n 8031eee + 8031ef0: 4b1a ldr r3, [pc, #104] ; (8031f5c ) + 8031ef2: 6adb ldr r3, [r3, #44] ; 0x2c + 8031ef4: 4a19 ldr r2, [pc, #100] ; (8031f5c ) + 8031ef6: f443 2300 orr.w r3, r3, #524288 ; 0x80000 + 8031efa: 62d3 str r3, [r2, #44] ; 0x2c + 8031efc: e00f b.n 8031f1e } else if(Divider == DIVIDER_Q_UPDATE) - 8031ece: 683b ldr r3, [r7, #0] - 8031ed0: 2b01 cmp r3, #1 - 8031ed2: d106 bne.n 8031ee2 + 8031efe: 683b ldr r3, [r7, #0] + 8031f00: 2b01 cmp r3, #1 + 8031f02: d106 bne.n 8031f12 { __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVQ); - 8031ed4: 4b15 ldr r3, [pc, #84] ; (8031f2c ) - 8031ed6: 6adb ldr r3, [r3, #44] ; 0x2c - 8031ed8: 4a14 ldr r2, [pc, #80] ; (8031f2c ) - 8031eda: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 - 8031ede: 62d3 str r3, [r2, #44] ; 0x2c - 8031ee0: e005 b.n 8031eee + 8031f04: 4b15 ldr r3, [pc, #84] ; (8031f5c ) + 8031f06: 6adb ldr r3, [r3, #44] ; 0x2c + 8031f08: 4a14 ldr r2, [pc, #80] ; (8031f5c ) + 8031f0a: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 + 8031f0e: 62d3 str r3, [r2, #44] ; 0x2c + 8031f10: e005 b.n 8031f1e } else { __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVR); - 8031ee2: 4b12 ldr r3, [pc, #72] ; (8031f2c ) - 8031ee4: 6adb ldr r3, [r3, #44] ; 0x2c - 8031ee6: 4a11 ldr r2, [pc, #68] ; (8031f2c ) - 8031ee8: f443 1300 orr.w r3, r3, #2097152 ; 0x200000 - 8031eec: 62d3 str r3, [r2, #44] ; 0x2c + 8031f12: 4b12 ldr r3, [pc, #72] ; (8031f5c ) + 8031f14: 6adb ldr r3, [r3, #44] ; 0x2c + 8031f16: 4a11 ldr r2, [pc, #68] ; (8031f5c ) + 8031f18: f443 1300 orr.w r3, r3, #2097152 ; 0x200000 + 8031f1c: 62d3 str r3, [r2, #44] ; 0x2c } /* Enable PLL2. */ __HAL_RCC_PLL2_ENABLE(); - 8031eee: 4b0f ldr r3, [pc, #60] ; (8031f2c ) - 8031ef0: 681b ldr r3, [r3, #0] - 8031ef2: 4a0e ldr r2, [pc, #56] ; (8031f2c ) - 8031ef4: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 - 8031ef8: 6013 str r3, [r2, #0] + 8031f1e: 4b0f ldr r3, [pc, #60] ; (8031f5c ) + 8031f20: 681b ldr r3, [r3, #0] + 8031f22: 4a0e ldr r2, [pc, #56] ; (8031f5c ) + 8031f24: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 + 8031f28: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8031efa: f7f4 f84b bl 8025f94 - 8031efe: 60b8 str r0, [r7, #8] + 8031f2a: f7f4 f84b bl 8025fc4 + 8031f2e: 60b8 str r0, [r7, #8] /* Wait till PLL2 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U) - 8031f00: e008 b.n 8031f14 + 8031f30: e008 b.n 8031f44 { if( (HAL_GetTick() - tickstart ) > PLL2_TIMEOUT_VALUE) - 8031f02: f7f4 f847 bl 8025f94 - 8031f06: 4602 mov r2, r0 - 8031f08: 68bb ldr r3, [r7, #8] - 8031f0a: 1ad3 subs r3, r2, r3 - 8031f0c: 2b02 cmp r3, #2 - 8031f0e: d901 bls.n 8031f14 + 8031f32: f7f4 f847 bl 8025fc4 + 8031f36: 4602 mov r2, r0 + 8031f38: 68bb ldr r3, [r7, #8] + 8031f3a: 1ad3 subs r3, r2, r3 + 8031f3c: 2b02 cmp r3, #2 + 8031f3e: d901 bls.n 8031f44 { return HAL_TIMEOUT; - 8031f10: 2303 movs r3, #3 - 8031f12: e006 b.n 8031f22 + 8031f40: 2303 movs r3, #3 + 8031f42: e006 b.n 8031f52 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U) - 8031f14: 4b05 ldr r3, [pc, #20] ; (8031f2c ) - 8031f16: 681b ldr r3, [r3, #0] - 8031f18: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8031f1c: 2b00 cmp r3, #0 - 8031f1e: d0f0 beq.n 8031f02 + 8031f44: 4b05 ldr r3, [pc, #20] ; (8031f5c ) + 8031f46: 681b ldr r3, [r3, #0] + 8031f48: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8031f4c: 2b00 cmp r3, #0 + 8031f4e: d0f0 beq.n 8031f32 } } return status; - 8031f20: 7bfb ldrb r3, [r7, #15] + 8031f50: 7bfb ldrb r3, [r7, #15] } - 8031f22: 4618 mov r0, r3 - 8031f24: 3710 adds r7, #16 - 8031f26: 46bd mov sp, r7 - 8031f28: bd80 pop {r7, pc} - 8031f2a: bf00 nop - 8031f2c: 58024400 .word 0x58024400 - 8031f30: ffff0007 .word 0xffff0007 + 8031f52: 4618 mov r0, r3 + 8031f54: 3710 adds r7, #16 + 8031f56: 46bd mov sp, r7 + 8031f58: bd80 pop {r7, pc} + 8031f5a: bf00 nop + 8031f5c: 58024400 .word 0x58024400 + 8031f60: ffff0007 .word 0xffff0007 -08031f34 : +08031f64 : * @note PLL3 is temporary disabled to apply new parameters * * @retval HAL status */ static HAL_StatusTypeDef RCCEx_PLL3_Config(RCC_PLL3InitTypeDef *pll3, uint32_t Divider) { - 8031f34: b580 push {r7, lr} - 8031f36: b084 sub sp, #16 - 8031f38: af00 add r7, sp, #0 - 8031f3a: 6078 str r0, [r7, #4] - 8031f3c: 6039 str r1, [r7, #0] + 8031f64: b580 push {r7, lr} + 8031f66: b084 sub sp, #16 + 8031f68: af00 add r7, sp, #0 + 8031f6a: 6078 str r0, [r7, #4] + 8031f6c: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status = HAL_OK; - 8031f3e: 2300 movs r3, #0 - 8031f40: 73fb strb r3, [r7, #15] + 8031f6e: 2300 movs r3, #0 + 8031f70: 73fb strb r3, [r7, #15] assert_param(IS_RCC_PLL3RGE_VALUE(pll3->PLL3RGE)); assert_param(IS_RCC_PLL3VCO_VALUE(pll3->PLL3VCOSEL)); assert_param(IS_RCC_PLLFRACN_VALUE(pll3->PLL3FRACN)); /* Check that PLL3 OSC clock source is already set */ if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE) - 8031f42: 4b53 ldr r3, [pc, #332] ; (8032090 ) - 8031f44: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031f46: f003 0303 and.w r3, r3, #3 - 8031f4a: 2b03 cmp r3, #3 - 8031f4c: d101 bne.n 8031f52 + 8031f72: 4b53 ldr r3, [pc, #332] ; (80320c0 ) + 8031f74: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031f76: f003 0303 and.w r3, r3, #3 + 8031f7a: 2b03 cmp r3, #3 + 8031f7c: d101 bne.n 8031f82 { return HAL_ERROR; - 8031f4e: 2301 movs r3, #1 - 8031f50: e099 b.n 8032086 + 8031f7e: 2301 movs r3, #1 + 8031f80: e099 b.n 80320b6 else { /* Disable PLL3. */ __HAL_RCC_PLL3_DISABLE(); - 8031f52: 4b4f ldr r3, [pc, #316] ; (8032090 ) - 8031f54: 681b ldr r3, [r3, #0] - 8031f56: 4a4e ldr r2, [pc, #312] ; (8032090 ) - 8031f58: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 8031f5c: 6013 str r3, [r2, #0] + 8031f82: 4b4f ldr r3, [pc, #316] ; (80320c0 ) + 8031f84: 681b ldr r3, [r3, #0] + 8031f86: 4a4e ldr r2, [pc, #312] ; (80320c0 ) + 8031f88: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 8031f8c: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8031f5e: f7f4 f819 bl 8025f94 - 8031f62: 60b8 str r0, [r7, #8] + 8031f8e: f7f4 f819 bl 8025fc4 + 8031f92: 60b8 str r0, [r7, #8] /* Wait till PLL3 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U) - 8031f64: e008 b.n 8031f78 + 8031f94: e008 b.n 8031fa8 { if( (HAL_GetTick() - tickstart ) > PLL3_TIMEOUT_VALUE) - 8031f66: f7f4 f815 bl 8025f94 - 8031f6a: 4602 mov r2, r0 - 8031f6c: 68bb ldr r3, [r7, #8] - 8031f6e: 1ad3 subs r3, r2, r3 - 8031f70: 2b02 cmp r3, #2 - 8031f72: d901 bls.n 8031f78 + 8031f96: f7f4 f815 bl 8025fc4 + 8031f9a: 4602 mov r2, r0 + 8031f9c: 68bb ldr r3, [r7, #8] + 8031f9e: 1ad3 subs r3, r2, r3 + 8031fa0: 2b02 cmp r3, #2 + 8031fa2: d901 bls.n 8031fa8 { return HAL_TIMEOUT; - 8031f74: 2303 movs r3, #3 - 8031f76: e086 b.n 8032086 + 8031fa4: 2303 movs r3, #3 + 8031fa6: e086 b.n 80320b6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U) - 8031f78: 4b45 ldr r3, [pc, #276] ; (8032090 ) - 8031f7a: 681b ldr r3, [r3, #0] - 8031f7c: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8031f80: 2b00 cmp r3, #0 - 8031f82: d1f0 bne.n 8031f66 + 8031fa8: 4b45 ldr r3, [pc, #276] ; (80320c0 ) + 8031faa: 681b ldr r3, [r3, #0] + 8031fac: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8031fb0: 2b00 cmp r3, #0 + 8031fb2: d1f0 bne.n 8031f96 } } /* Configure the PLL3 multiplication and division factors. */ __HAL_RCC_PLL3_CONFIG(pll3->PLL3M, - 8031f84: 4b42 ldr r3, [pc, #264] ; (8032090 ) - 8031f86: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031f88: f023 727c bic.w r2, r3, #66060288 ; 0x3f00000 - 8031f8c: 687b ldr r3, [r7, #4] - 8031f8e: 681b ldr r3, [r3, #0] - 8031f90: 051b lsls r3, r3, #20 - 8031f92: 493f ldr r1, [pc, #252] ; (8032090 ) - 8031f94: 4313 orrs r3, r2 - 8031f96: 628b str r3, [r1, #40] ; 0x28 - 8031f98: 687b ldr r3, [r7, #4] - 8031f9a: 685b ldr r3, [r3, #4] - 8031f9c: 3b01 subs r3, #1 - 8031f9e: f3c3 0208 ubfx r2, r3, #0, #9 - 8031fa2: 687b ldr r3, [r7, #4] - 8031fa4: 689b ldr r3, [r3, #8] - 8031fa6: 3b01 subs r3, #1 - 8031fa8: 025b lsls r3, r3, #9 - 8031faa: b29b uxth r3, r3 - 8031fac: 431a orrs r2, r3 - 8031fae: 687b ldr r3, [r7, #4] - 8031fb0: 68db ldr r3, [r3, #12] - 8031fb2: 3b01 subs r3, #1 - 8031fb4: 041b lsls r3, r3, #16 - 8031fb6: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 8031fba: 431a orrs r2, r3 + 8031fb4: 4b42 ldr r3, [pc, #264] ; (80320c0 ) + 8031fb6: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031fb8: f023 727c bic.w r2, r3, #66060288 ; 0x3f00000 8031fbc: 687b ldr r3, [r7, #4] - 8031fbe: 691b ldr r3, [r3, #16] - 8031fc0: 3b01 subs r3, #1 - 8031fc2: 061b lsls r3, r3, #24 - 8031fc4: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 - 8031fc8: 4931 ldr r1, [pc, #196] ; (8032090 ) - 8031fca: 4313 orrs r3, r2 - 8031fcc: 640b str r3, [r1, #64] ; 0x40 + 8031fbe: 681b ldr r3, [r3, #0] + 8031fc0: 051b lsls r3, r3, #20 + 8031fc2: 493f ldr r1, [pc, #252] ; (80320c0 ) + 8031fc4: 4313 orrs r3, r2 + 8031fc6: 628b str r3, [r1, #40] ; 0x28 + 8031fc8: 687b ldr r3, [r7, #4] + 8031fca: 685b ldr r3, [r3, #4] + 8031fcc: 3b01 subs r3, #1 + 8031fce: f3c3 0208 ubfx r2, r3, #0, #9 + 8031fd2: 687b ldr r3, [r7, #4] + 8031fd4: 689b ldr r3, [r3, #8] + 8031fd6: 3b01 subs r3, #1 + 8031fd8: 025b lsls r3, r3, #9 + 8031fda: b29b uxth r3, r3 + 8031fdc: 431a orrs r2, r3 + 8031fde: 687b ldr r3, [r7, #4] + 8031fe0: 68db ldr r3, [r3, #12] + 8031fe2: 3b01 subs r3, #1 + 8031fe4: 041b lsls r3, r3, #16 + 8031fe6: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 8031fea: 431a orrs r2, r3 + 8031fec: 687b ldr r3, [r7, #4] + 8031fee: 691b ldr r3, [r3, #16] + 8031ff0: 3b01 subs r3, #1 + 8031ff2: 061b lsls r3, r3, #24 + 8031ff4: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 + 8031ff8: 4931 ldr r1, [pc, #196] ; (80320c0 ) + 8031ffa: 4313 orrs r3, r2 + 8031ffc: 640b str r3, [r1, #64] ; 0x40 pll3->PLL3P, pll3->PLL3Q, pll3->PLL3R); /* Select PLL3 input reference frequency range: VCI */ __HAL_RCC_PLL3_VCIRANGE(pll3->PLL3RGE) ; - 8031fce: 4b30 ldr r3, [pc, #192] ; (8032090 ) - 8031fd0: 6adb ldr r3, [r3, #44] ; 0x2c - 8031fd2: f423 6240 bic.w r2, r3, #3072 ; 0xc00 - 8031fd6: 687b ldr r3, [r7, #4] - 8031fd8: 695b ldr r3, [r3, #20] - 8031fda: 492d ldr r1, [pc, #180] ; (8032090 ) - 8031fdc: 4313 orrs r3, r2 - 8031fde: 62cb str r3, [r1, #44] ; 0x2c + 8031ffe: 4b30 ldr r3, [pc, #192] ; (80320c0 ) + 8032000: 6adb ldr r3, [r3, #44] ; 0x2c + 8032002: f423 6240 bic.w r2, r3, #3072 ; 0xc00 + 8032006: 687b ldr r3, [r7, #4] + 8032008: 695b ldr r3, [r3, #20] + 803200a: 492d ldr r1, [pc, #180] ; (80320c0 ) + 803200c: 4313 orrs r3, r2 + 803200e: 62cb str r3, [r1, #44] ; 0x2c /* Select PLL3 output frequency range : VCO */ __HAL_RCC_PLL3_VCORANGE(pll3->PLL3VCOSEL) ; - 8031fe0: 4b2b ldr r3, [pc, #172] ; (8032090 ) - 8031fe2: 6adb ldr r3, [r3, #44] ; 0x2c - 8031fe4: f423 7200 bic.w r2, r3, #512 ; 0x200 - 8031fe8: 687b ldr r3, [r7, #4] - 8031fea: 699b ldr r3, [r3, #24] - 8031fec: 4928 ldr r1, [pc, #160] ; (8032090 ) - 8031fee: 4313 orrs r3, r2 - 8031ff0: 62cb str r3, [r1, #44] ; 0x2c + 8032010: 4b2b ldr r3, [pc, #172] ; (80320c0 ) + 8032012: 6adb ldr r3, [r3, #44] ; 0x2c + 8032014: f423 7200 bic.w r2, r3, #512 ; 0x200 + 8032018: 687b ldr r3, [r7, #4] + 803201a: 699b ldr r3, [r3, #24] + 803201c: 4928 ldr r1, [pc, #160] ; (80320c0 ) + 803201e: 4313 orrs r3, r2 + 8032020: 62cb str r3, [r1, #44] ; 0x2c /* Disable PLL3FRACN . */ __HAL_RCC_PLL3FRACN_DISABLE(); - 8031ff2: 4b27 ldr r3, [pc, #156] ; (8032090 ) - 8031ff4: 6adb ldr r3, [r3, #44] ; 0x2c - 8031ff6: 4a26 ldr r2, [pc, #152] ; (8032090 ) - 8031ff8: f423 7380 bic.w r3, r3, #256 ; 0x100 - 8031ffc: 62d3 str r3, [r2, #44] ; 0x2c + 8032022: 4b27 ldr r3, [pc, #156] ; (80320c0 ) + 8032024: 6adb ldr r3, [r3, #44] ; 0x2c + 8032026: 4a26 ldr r2, [pc, #152] ; (80320c0 ) + 8032028: f423 7380 bic.w r3, r3, #256 ; 0x100 + 803202c: 62d3 str r3, [r2, #44] ; 0x2c /* Configures PLL3 clock Fractional Part Of The Multiplication Factor */ __HAL_RCC_PLL3FRACN_CONFIG(pll3->PLL3FRACN); - 8031ffe: 4b24 ldr r3, [pc, #144] ; (8032090 ) - 8032000: 6c5a ldr r2, [r3, #68] ; 0x44 - 8032002: 4b24 ldr r3, [pc, #144] ; (8032094 ) - 8032004: 4013 ands r3, r2 - 8032006: 687a ldr r2, [r7, #4] - 8032008: 69d2 ldr r2, [r2, #28] - 803200a: 00d2 lsls r2, r2, #3 - 803200c: 4920 ldr r1, [pc, #128] ; (8032090 ) - 803200e: 4313 orrs r3, r2 - 8032010: 644b str r3, [r1, #68] ; 0x44 + 803202e: 4b24 ldr r3, [pc, #144] ; (80320c0 ) + 8032030: 6c5a ldr r2, [r3, #68] ; 0x44 + 8032032: 4b24 ldr r3, [pc, #144] ; (80320c4 ) + 8032034: 4013 ands r3, r2 + 8032036: 687a ldr r2, [r7, #4] + 8032038: 69d2 ldr r2, [r2, #28] + 803203a: 00d2 lsls r2, r2, #3 + 803203c: 4920 ldr r1, [pc, #128] ; (80320c0 ) + 803203e: 4313 orrs r3, r2 + 8032040: 644b str r3, [r1, #68] ; 0x44 /* Enable PLL3FRACN . */ __HAL_RCC_PLL3FRACN_ENABLE(); - 8032012: 4b1f ldr r3, [pc, #124] ; (8032090 ) - 8032014: 6adb ldr r3, [r3, #44] ; 0x2c - 8032016: 4a1e ldr r2, [pc, #120] ; (8032090 ) - 8032018: f443 7380 orr.w r3, r3, #256 ; 0x100 - 803201c: 62d3 str r3, [r2, #44] ; 0x2c + 8032042: 4b1f ldr r3, [pc, #124] ; (80320c0 ) + 8032044: 6adb ldr r3, [r3, #44] ; 0x2c + 8032046: 4a1e ldr r2, [pc, #120] ; (80320c0 ) + 8032048: f443 7380 orr.w r3, r3, #256 ; 0x100 + 803204c: 62d3 str r3, [r2, #44] ; 0x2c /* Enable the PLL3 clock output */ if(Divider == DIVIDER_P_UPDATE) - 803201e: 683b ldr r3, [r7, #0] - 8032020: 2b00 cmp r3, #0 - 8032022: d106 bne.n 8032032 + 803204e: 683b ldr r3, [r7, #0] + 8032050: 2b00 cmp r3, #0 + 8032052: d106 bne.n 8032062 { __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP); - 8032024: 4b1a ldr r3, [pc, #104] ; (8032090 ) - 8032026: 6adb ldr r3, [r3, #44] ; 0x2c - 8032028: 4a19 ldr r2, [pc, #100] ; (8032090 ) - 803202a: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 - 803202e: 62d3 str r3, [r2, #44] ; 0x2c - 8032030: e00f b.n 8032052 + 8032054: 4b1a ldr r3, [pc, #104] ; (80320c0 ) + 8032056: 6adb ldr r3, [r3, #44] ; 0x2c + 8032058: 4a19 ldr r2, [pc, #100] ; (80320c0 ) + 803205a: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 + 803205e: 62d3 str r3, [r2, #44] ; 0x2c + 8032060: e00f b.n 8032082 } else if(Divider == DIVIDER_Q_UPDATE) - 8032032: 683b ldr r3, [r7, #0] - 8032034: 2b01 cmp r3, #1 - 8032036: d106 bne.n 8032046 + 8032062: 683b ldr r3, [r7, #0] + 8032064: 2b01 cmp r3, #1 + 8032066: d106 bne.n 8032076 { __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); - 8032038: 4b15 ldr r3, [pc, #84] ; (8032090 ) - 803203a: 6adb ldr r3, [r3, #44] ; 0x2c - 803203c: 4a14 ldr r2, [pc, #80] ; (8032090 ) - 803203e: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 - 8032042: 62d3 str r3, [r2, #44] ; 0x2c - 8032044: e005 b.n 8032052 + 8032068: 4b15 ldr r3, [pc, #84] ; (80320c0 ) + 803206a: 6adb ldr r3, [r3, #44] ; 0x2c + 803206c: 4a14 ldr r2, [pc, #80] ; (80320c0 ) + 803206e: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 + 8032072: 62d3 str r3, [r2, #44] ; 0x2c + 8032074: e005 b.n 8032082 } else { __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVR); - 8032046: 4b12 ldr r3, [pc, #72] ; (8032090 ) - 8032048: 6adb ldr r3, [r3, #44] ; 0x2c - 803204a: 4a11 ldr r2, [pc, #68] ; (8032090 ) - 803204c: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 8032050: 62d3 str r3, [r2, #44] ; 0x2c + 8032076: 4b12 ldr r3, [pc, #72] ; (80320c0 ) + 8032078: 6adb ldr r3, [r3, #44] ; 0x2c + 803207a: 4a11 ldr r2, [pc, #68] ; (80320c0 ) + 803207c: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 8032080: 62d3 str r3, [r2, #44] ; 0x2c } /* Enable PLL3. */ __HAL_RCC_PLL3_ENABLE(); - 8032052: 4b0f ldr r3, [pc, #60] ; (8032090 ) - 8032054: 681b ldr r3, [r3, #0] - 8032056: 4a0e ldr r2, [pc, #56] ; (8032090 ) - 8032058: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 803205c: 6013 str r3, [r2, #0] + 8032082: 4b0f ldr r3, [pc, #60] ; (80320c0 ) + 8032084: 681b ldr r3, [r3, #0] + 8032086: 4a0e ldr r2, [pc, #56] ; (80320c0 ) + 8032088: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 803208c: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 803205e: f7f3 ff99 bl 8025f94 - 8032062: 60b8 str r0, [r7, #8] + 803208e: f7f3 ff99 bl 8025fc4 + 8032092: 60b8 str r0, [r7, #8] /* Wait till PLL3 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U) - 8032064: e008 b.n 8032078 + 8032094: e008 b.n 80320a8 { if( (HAL_GetTick() - tickstart ) > PLL3_TIMEOUT_VALUE) - 8032066: f7f3 ff95 bl 8025f94 - 803206a: 4602 mov r2, r0 - 803206c: 68bb ldr r3, [r7, #8] - 803206e: 1ad3 subs r3, r2, r3 - 8032070: 2b02 cmp r3, #2 - 8032072: d901 bls.n 8032078 + 8032096: f7f3 ff95 bl 8025fc4 + 803209a: 4602 mov r2, r0 + 803209c: 68bb ldr r3, [r7, #8] + 803209e: 1ad3 subs r3, r2, r3 + 80320a0: 2b02 cmp r3, #2 + 80320a2: d901 bls.n 80320a8 { return HAL_TIMEOUT; - 8032074: 2303 movs r3, #3 - 8032076: e006 b.n 8032086 + 80320a4: 2303 movs r3, #3 + 80320a6: e006 b.n 80320b6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U) - 8032078: 4b05 ldr r3, [pc, #20] ; (8032090 ) - 803207a: 681b ldr r3, [r3, #0] - 803207c: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8032080: 2b00 cmp r3, #0 - 8032082: d0f0 beq.n 8032066 + 80320a8: 4b05 ldr r3, [pc, #20] ; (80320c0 ) + 80320aa: 681b ldr r3, [r3, #0] + 80320ac: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 80320b0: 2b00 cmp r3, #0 + 80320b2: d0f0 beq.n 8032096 } } return status; - 8032084: 7bfb ldrb r3, [r7, #15] + 80320b4: 7bfb ldrb r3, [r7, #15] } - 8032086: 4618 mov r0, r3 - 8032088: 3710 adds r7, #16 - 803208a: 46bd mov sp, r7 - 803208c: bd80 pop {r7, pc} - 803208e: bf00 nop - 8032090: 58024400 .word 0x58024400 - 8032094: ffff0007 .word 0xffff0007 + 80320b6: 4618 mov r0, r3 + 80320b8: 3710 adds r7, #16 + 80320ba: 46bd mov sp, r7 + 80320bc: bd80 pop {r7, pc} + 80320be: bf00 nop + 80320c0: 58024400 .word 0x58024400 + 80320c4: ffff0007 .word 0xffff0007 -08032098 : +080320c8 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { - 8032098: b580 push {r7, lr} - 803209a: b082 sub sp, #8 - 803209c: af00 add r7, sp, #0 - 803209e: 6078 str r0, [r7, #4] + 80320c8: b580 push {r7, lr} + 80320ca: b082 sub sp, #8 + 80320cc: af00 add r7, sp, #0 + 80320ce: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) - 80320a0: 687b ldr r3, [r7, #4] - 80320a2: 2b00 cmp r3, #0 - 80320a4: d101 bne.n 80320aa + 80320d0: 687b ldr r3, [r7, #4] + 80320d2: 2b00 cmp r3, #0 + 80320d4: d101 bne.n 80320da { return HAL_ERROR; - 80320a6: 2301 movs r3, #1 - 80320a8: e049 b.n 803213e + 80320d6: 2301 movs r3, #1 + 80320d8: e049 b.n 803216e assert_param(IS_TIM_INSTANCE(htim->Instance)); assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) - 80320aa: 687b ldr r3, [r7, #4] - 80320ac: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 80320b0: b2db uxtb r3, r3 - 80320b2: 2b00 cmp r3, #0 - 80320b4: d106 bne.n 80320c4 + 80320da: 687b ldr r3, [r7, #4] + 80320dc: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 80320e0: b2db uxtb r3, r3 + 80320e2: 2b00 cmp r3, #0 + 80320e4: d106 bne.n 80320f4 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; - 80320b6: 687b ldr r3, [r7, #4] - 80320b8: 2200 movs r2, #0 - 80320ba: f883 203c strb.w r2, [r3, #60] ; 0x3c + 80320e6: 687b ldr r3, [r7, #4] + 80320e8: 2200 movs r2, #0 + 80320ea: f883 203c strb.w r2, [r3, #60] ; 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); - 80320be: 6878 ldr r0, [r7, #4] - 80320c0: f7f2 fd3e bl 8024b40 + 80320ee: 6878 ldr r0, [r7, #4] + 80320f0: f7f2 fd3e bl 8024b70 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 80320c4: 687b ldr r3, [r7, #4] - 80320c6: 2202 movs r2, #2 - 80320c8: f883 203d strb.w r2, [r3, #61] ; 0x3d + 80320f4: 687b ldr r3, [r7, #4] + 80320f6: 2202 movs r2, #2 + 80320f8: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); - 80320cc: 687b ldr r3, [r7, #4] - 80320ce: 681a ldr r2, [r3, #0] - 80320d0: 687b ldr r3, [r7, #4] - 80320d2: 3304 adds r3, #4 - 80320d4: 4619 mov r1, r3 - 80320d6: 4610 mov r0, r2 - 80320d8: f000 faee bl 80326b8 + 80320fc: 687b ldr r3, [r7, #4] + 80320fe: 681a ldr r2, [r3, #0] + 8032100: 687b ldr r3, [r7, #4] + 8032102: 3304 adds r3, #4 + 8032104: 4619 mov r1, r3 + 8032106: 4610 mov r0, r2 + 8032108: f000 faee bl 80326e8 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 80320dc: 687b ldr r3, [r7, #4] - 80320de: 2201 movs r2, #1 - 80320e0: f883 2048 strb.w r2, [r3, #72] ; 0x48 + 803210c: 687b ldr r3, [r7, #4] + 803210e: 2201 movs r2, #1 + 8032110: f883 2048 strb.w r2, [r3, #72] ; 0x48 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 80320e4: 687b ldr r3, [r7, #4] - 80320e6: 2201 movs r2, #1 - 80320e8: f883 203e strb.w r2, [r3, #62] ; 0x3e - 80320ec: 687b ldr r3, [r7, #4] - 80320ee: 2201 movs r2, #1 - 80320f0: f883 203f strb.w r2, [r3, #63] ; 0x3f - 80320f4: 687b ldr r3, [r7, #4] - 80320f6: 2201 movs r2, #1 - 80320f8: f883 2040 strb.w r2, [r3, #64] ; 0x40 - 80320fc: 687b ldr r3, [r7, #4] - 80320fe: 2201 movs r2, #1 - 8032100: f883 2041 strb.w r2, [r3, #65] ; 0x41 - 8032104: 687b ldr r3, [r7, #4] - 8032106: 2201 movs r2, #1 - 8032108: f883 2042 strb.w r2, [r3, #66] ; 0x42 - 803210c: 687b ldr r3, [r7, #4] - 803210e: 2201 movs r2, #1 - 8032110: f883 2043 strb.w r2, [r3, #67] ; 0x43 - TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8032114: 687b ldr r3, [r7, #4] 8032116: 2201 movs r2, #1 - 8032118: f883 2044 strb.w r2, [r3, #68] ; 0x44 + 8032118: f883 203e strb.w r2, [r3, #62] ; 0x3e 803211c: 687b ldr r3, [r7, #4] 803211e: 2201 movs r2, #1 - 8032120: f883 2045 strb.w r2, [r3, #69] ; 0x45 + 8032120: f883 203f strb.w r2, [r3, #63] ; 0x3f 8032124: 687b ldr r3, [r7, #4] 8032126: 2201 movs r2, #1 - 8032128: f883 2046 strb.w r2, [r3, #70] ; 0x46 + 8032128: f883 2040 strb.w r2, [r3, #64] ; 0x40 803212c: 687b ldr r3, [r7, #4] 803212e: 2201 movs r2, #1 - 8032130: f883 2047 strb.w r2, [r3, #71] ; 0x47 + 8032130: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 8032134: 687b ldr r3, [r7, #4] + 8032136: 2201 movs r2, #1 + 8032138: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 803213c: 687b ldr r3, [r7, #4] + 803213e: 2201 movs r2, #1 + 8032140: f883 2043 strb.w r2, [r3, #67] ; 0x43 + TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 8032144: 687b ldr r3, [r7, #4] + 8032146: 2201 movs r2, #1 + 8032148: f883 2044 strb.w r2, [r3, #68] ; 0x44 + 803214c: 687b ldr r3, [r7, #4] + 803214e: 2201 movs r2, #1 + 8032150: f883 2045 strb.w r2, [r3, #69] ; 0x45 + 8032154: 687b ldr r3, [r7, #4] + 8032156: 2201 movs r2, #1 + 8032158: f883 2046 strb.w r2, [r3, #70] ; 0x46 + 803215c: 687b ldr r3, [r7, #4] + 803215e: 2201 movs r2, #1 + 8032160: f883 2047 strb.w r2, [r3, #71] ; 0x47 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; - 8032134: 687b ldr r3, [r7, #4] - 8032136: 2201 movs r2, #1 - 8032138: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8032164: 687b ldr r3, [r7, #4] + 8032166: 2201 movs r2, #1 + 8032168: f883 203d strb.w r2, [r3, #61] ; 0x3d return HAL_OK; - 803213c: 2300 movs r3, #0 + 803216c: 2300 movs r3, #0 } - 803213e: 4618 mov r0, r3 - 8032140: 3708 adds r7, #8 - 8032142: 46bd mov sp, r7 - 8032144: bd80 pop {r7, pc} + 803216e: 4618 mov r0, r3 + 8032170: 3708 adds r7, #8 + 8032172: 46bd mov sp, r7 + 8032174: bd80 pop {r7, pc} ... -08032148 : +08032178 : * @brief Starts the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) { - 8032148: b480 push {r7} - 803214a: b085 sub sp, #20 - 803214c: af00 add r7, sp, #0 - 803214e: 6078 str r0, [r7, #4] + 8032178: b480 push {r7} + 803217a: b085 sub sp, #20 + 803217c: af00 add r7, sp, #0 + 803217e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Check the TIM state */ if (htim->State != HAL_TIM_STATE_READY) - 8032150: 687b ldr r3, [r7, #4] - 8032152: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8032156: b2db uxtb r3, r3 - 8032158: 2b01 cmp r3, #1 - 803215a: d001 beq.n 8032160 + 8032180: 687b ldr r3, [r7, #4] + 8032182: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 8032186: b2db uxtb r3, r3 + 8032188: 2b01 cmp r3, #1 + 803218a: d001 beq.n 8032190 { return HAL_ERROR; - 803215c: 2301 movs r3, #1 - 803215e: e054 b.n 803220a + 803218c: 2301 movs r3, #1 + 803218e: e054 b.n 803223a } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8032160: 687b ldr r3, [r7, #4] - 8032162: 2202 movs r2, #2 - 8032164: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8032190: 687b ldr r3, [r7, #4] + 8032192: 2202 movs r2, #2 + 8032194: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 8032168: 687b ldr r3, [r7, #4] - 803216a: 681b ldr r3, [r3, #0] - 803216c: 68da ldr r2, [r3, #12] - 803216e: 687b ldr r3, [r7, #4] - 8032170: 681b ldr r3, [r3, #0] - 8032172: f042 0201 orr.w r2, r2, #1 - 8032176: 60da str r2, [r3, #12] + 8032198: 687b ldr r3, [r7, #4] + 803219a: 681b ldr r3, [r3, #0] + 803219c: 68da ldr r2, [r3, #12] + 803219e: 687b ldr r3, [r7, #4] + 80321a0: 681b ldr r3, [r3, #0] + 80321a2: f042 0201 orr.w r2, r2, #1 + 80321a6: 60da str r2, [r3, #12] /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8032178: 687b ldr r3, [r7, #4] - 803217a: 681b ldr r3, [r3, #0] - 803217c: 4a26 ldr r2, [pc, #152] ; (8032218 ) - 803217e: 4293 cmp r3, r2 - 8032180: d022 beq.n 80321c8 - 8032182: 687b ldr r3, [r7, #4] - 8032184: 681b ldr r3, [r3, #0] - 8032186: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 803218a: d01d beq.n 80321c8 - 803218c: 687b ldr r3, [r7, #4] - 803218e: 681b ldr r3, [r3, #0] - 8032190: 4a22 ldr r2, [pc, #136] ; (803221c ) - 8032192: 4293 cmp r3, r2 - 8032194: d018 beq.n 80321c8 - 8032196: 687b ldr r3, [r7, #4] - 8032198: 681b ldr r3, [r3, #0] - 803219a: 4a21 ldr r2, [pc, #132] ; (8032220 ) - 803219c: 4293 cmp r3, r2 - 803219e: d013 beq.n 80321c8 - 80321a0: 687b ldr r3, [r7, #4] - 80321a2: 681b ldr r3, [r3, #0] - 80321a4: 4a1f ldr r2, [pc, #124] ; (8032224 ) - 80321a6: 4293 cmp r3, r2 - 80321a8: d00e beq.n 80321c8 - 80321aa: 687b ldr r3, [r7, #4] - 80321ac: 681b ldr r3, [r3, #0] - 80321ae: 4a1e ldr r2, [pc, #120] ; (8032228 ) - 80321b0: 4293 cmp r3, r2 - 80321b2: d009 beq.n 80321c8 - 80321b4: 687b ldr r3, [r7, #4] - 80321b6: 681b ldr r3, [r3, #0] - 80321b8: 4a1c ldr r2, [pc, #112] ; (803222c ) - 80321ba: 4293 cmp r3, r2 - 80321bc: d004 beq.n 80321c8 - 80321be: 687b ldr r3, [r7, #4] - 80321c0: 681b ldr r3, [r3, #0] - 80321c2: 4a1b ldr r2, [pc, #108] ; (8032230 ) - 80321c4: 4293 cmp r3, r2 - 80321c6: d115 bne.n 80321f4 + 80321a8: 687b ldr r3, [r7, #4] + 80321aa: 681b ldr r3, [r3, #0] + 80321ac: 4a26 ldr r2, [pc, #152] ; (8032248 ) + 80321ae: 4293 cmp r3, r2 + 80321b0: d022 beq.n 80321f8 + 80321b2: 687b ldr r3, [r7, #4] + 80321b4: 681b ldr r3, [r3, #0] + 80321b6: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 80321ba: d01d beq.n 80321f8 + 80321bc: 687b ldr r3, [r7, #4] + 80321be: 681b ldr r3, [r3, #0] + 80321c0: 4a22 ldr r2, [pc, #136] ; (803224c ) + 80321c2: 4293 cmp r3, r2 + 80321c4: d018 beq.n 80321f8 + 80321c6: 687b ldr r3, [r7, #4] + 80321c8: 681b ldr r3, [r3, #0] + 80321ca: 4a21 ldr r2, [pc, #132] ; (8032250 ) + 80321cc: 4293 cmp r3, r2 + 80321ce: d013 beq.n 80321f8 + 80321d0: 687b ldr r3, [r7, #4] + 80321d2: 681b ldr r3, [r3, #0] + 80321d4: 4a1f ldr r2, [pc, #124] ; (8032254 ) + 80321d6: 4293 cmp r3, r2 + 80321d8: d00e beq.n 80321f8 + 80321da: 687b ldr r3, [r7, #4] + 80321dc: 681b ldr r3, [r3, #0] + 80321de: 4a1e ldr r2, [pc, #120] ; (8032258 ) + 80321e0: 4293 cmp r3, r2 + 80321e2: d009 beq.n 80321f8 + 80321e4: 687b ldr r3, [r7, #4] + 80321e6: 681b ldr r3, [r3, #0] + 80321e8: 4a1c ldr r2, [pc, #112] ; (803225c ) + 80321ea: 4293 cmp r3, r2 + 80321ec: d004 beq.n 80321f8 + 80321ee: 687b ldr r3, [r7, #4] + 80321f0: 681b ldr r3, [r3, #0] + 80321f2: 4a1b ldr r2, [pc, #108] ; (8032260 ) + 80321f4: 4293 cmp r3, r2 + 80321f6: d115 bne.n 8032224 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 80321c8: 687b ldr r3, [r7, #4] - 80321ca: 681b ldr r3, [r3, #0] - 80321cc: 689a ldr r2, [r3, #8] - 80321ce: 4b19 ldr r3, [pc, #100] ; (8032234 ) - 80321d0: 4013 ands r3, r2 - 80321d2: 60fb str r3, [r7, #12] + 80321f8: 687b ldr r3, [r7, #4] + 80321fa: 681b ldr r3, [r3, #0] + 80321fc: 689a ldr r2, [r3, #8] + 80321fe: 4b19 ldr r3, [pc, #100] ; (8032264 ) + 8032200: 4013 ands r3, r2 + 8032202: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 80321d4: 68fb ldr r3, [r7, #12] - 80321d6: 2b06 cmp r3, #6 - 80321d8: d015 beq.n 8032206 - 80321da: 68fb ldr r3, [r7, #12] - 80321dc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80321e0: d011 beq.n 8032206 + 8032204: 68fb ldr r3, [r7, #12] + 8032206: 2b06 cmp r3, #6 + 8032208: d015 beq.n 8032236 + 803220a: 68fb ldr r3, [r7, #12] + 803220c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8032210: d011 beq.n 8032236 { __HAL_TIM_ENABLE(htim); - 80321e2: 687b ldr r3, [r7, #4] - 80321e4: 681b ldr r3, [r3, #0] - 80321e6: 681a ldr r2, [r3, #0] - 80321e8: 687b ldr r3, [r7, #4] - 80321ea: 681b ldr r3, [r3, #0] - 80321ec: f042 0201 orr.w r2, r2, #1 - 80321f0: 601a str r2, [r3, #0] + 8032212: 687b ldr r3, [r7, #4] + 8032214: 681b ldr r3, [r3, #0] + 8032216: 681a ldr r2, [r3, #0] + 8032218: 687b ldr r3, [r7, #4] + 803221a: 681b ldr r3, [r3, #0] + 803221c: f042 0201 orr.w r2, r2, #1 + 8032220: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 80321f2: e008 b.n 8032206 + 8032222: e008 b.n 8032236 } } else { __HAL_TIM_ENABLE(htim); - 80321f4: 687b ldr r3, [r7, #4] - 80321f6: 681b ldr r3, [r3, #0] - 80321f8: 681a ldr r2, [r3, #0] - 80321fa: 687b ldr r3, [r7, #4] - 80321fc: 681b ldr r3, [r3, #0] - 80321fe: f042 0201 orr.w r2, r2, #1 - 8032202: 601a str r2, [r3, #0] - 8032204: e000 b.n 8032208 + 8032224: 687b ldr r3, [r7, #4] + 8032226: 681b ldr r3, [r3, #0] + 8032228: 681a ldr r2, [r3, #0] + 803222a: 687b ldr r3, [r7, #4] + 803222c: 681b ldr r3, [r3, #0] + 803222e: f042 0201 orr.w r2, r2, #1 + 8032232: 601a str r2, [r3, #0] + 8032234: e000 b.n 8032238 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8032206: bf00 nop + 8032236: bf00 nop } /* Return function status */ return HAL_OK; - 8032208: 2300 movs r3, #0 -} - 803220a: 4618 mov r0, r3 - 803220c: 3714 adds r7, #20 - 803220e: 46bd mov sp, r7 - 8032210: f85d 7b04 ldr.w r7, [sp], #4 - 8032214: 4770 bx lr - 8032216: bf00 nop - 8032218: 40010000 .word 0x40010000 - 803221c: 40000400 .word 0x40000400 - 8032220: 40000800 .word 0x40000800 - 8032224: 40000c00 .word 0x40000c00 - 8032228: 40010400 .word 0x40010400 - 803222c: 40001800 .word 0x40001800 - 8032230: 40014000 .word 0x40014000 - 8032234: 00010007 .word 0x00010007 - -08032238 : + 8032238: 2300 movs r3, #0 +} + 803223a: 4618 mov r0, r3 + 803223c: 3714 adds r7, #20 + 803223e: 46bd mov sp, r7 + 8032240: f85d 7b04 ldr.w r7, [sp], #4 + 8032244: 4770 bx lr + 8032246: bf00 nop + 8032248: 40010000 .word 0x40010000 + 803224c: 40000400 .word 0x40000400 + 8032250: 40000800 .word 0x40000800 + 8032254: 40000c00 .word 0x40000c00 + 8032258: 40010400 .word 0x40010400 + 803225c: 40001800 .word 0x40001800 + 8032260: 40014000 .word 0x40014000 + 8032264: 00010007 .word 0x00010007 + +08032268 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { - 8032238: b580 push {r7, lr} - 803223a: b082 sub sp, #8 - 803223c: af00 add r7, sp, #0 - 803223e: 6078 str r0, [r7, #4] + 8032268: b580 push {r7, lr} + 803226a: b082 sub sp, #8 + 803226c: af00 add r7, sp, #0 + 803226e: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - 8032240: 687b ldr r3, [r7, #4] - 8032242: 681b ldr r3, [r3, #0] - 8032244: 691b ldr r3, [r3, #16] - 8032246: f003 0302 and.w r3, r3, #2 - 803224a: 2b02 cmp r3, #2 - 803224c: d122 bne.n 8032294 + 8032270: 687b ldr r3, [r7, #4] + 8032272: 681b ldr r3, [r3, #0] + 8032274: 691b ldr r3, [r3, #16] + 8032276: f003 0302 and.w r3, r3, #2 + 803227a: 2b02 cmp r3, #2 + 803227c: d122 bne.n 80322c4 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) - 803224e: 687b ldr r3, [r7, #4] - 8032250: 681b ldr r3, [r3, #0] - 8032252: 68db ldr r3, [r3, #12] - 8032254: f003 0302 and.w r3, r3, #2 - 8032258: 2b02 cmp r3, #2 - 803225a: d11b bne.n 8032294 + 803227e: 687b ldr r3, [r7, #4] + 8032280: 681b ldr r3, [r3, #0] + 8032282: 68db ldr r3, [r3, #12] + 8032284: f003 0302 and.w r3, r3, #2 + 8032288: 2b02 cmp r3, #2 + 803228a: d11b bne.n 80322c4 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - 803225c: 687b ldr r3, [r7, #4] - 803225e: 681b ldr r3, [r3, #0] - 8032260: f06f 0202 mvn.w r2, #2 - 8032264: 611a str r2, [r3, #16] + 803228c: 687b ldr r3, [r7, #4] + 803228e: 681b ldr r3, [r3, #0] + 8032290: f06f 0202 mvn.w r2, #2 + 8032294: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8032266: 687b ldr r3, [r7, #4] - 8032268: 2201 movs r2, #1 - 803226a: 771a strb r2, [r3, #28] + 8032296: 687b ldr r3, [r7, #4] + 8032298: 2201 movs r2, #1 + 803229a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 803226c: 687b ldr r3, [r7, #4] - 803226e: 681b ldr r3, [r3, #0] - 8032270: 699b ldr r3, [r3, #24] - 8032272: f003 0303 and.w r3, r3, #3 - 8032276: 2b00 cmp r3, #0 - 8032278: d003 beq.n 8032282 + 803229c: 687b ldr r3, [r7, #4] + 803229e: 681b ldr r3, [r3, #0] + 80322a0: 699b ldr r3, [r3, #24] + 80322a2: f003 0303 and.w r3, r3, #3 + 80322a6: 2b00 cmp r3, #0 + 80322a8: d003 beq.n 80322b2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 803227a: 6878 ldr r0, [r7, #4] - 803227c: f000 f9fe bl 803267c - 8032280: e005 b.n 803228e + 80322aa: 6878 ldr r0, [r7, #4] + 80322ac: f000 f9fe bl 80326ac + 80322b0: e005 b.n 80322be { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8032282: 6878 ldr r0, [r7, #4] - 8032284: f000 f9f0 bl 8032668 + 80322b2: 6878 ldr r0, [r7, #4] + 80322b4: f000 f9f0 bl 8032698 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8032288: 6878 ldr r0, [r7, #4] - 803228a: f000 fa01 bl 8032690 + 80322b8: 6878 ldr r0, [r7, #4] + 80322ba: f000 fa01 bl 80326c0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 803228e: 687b ldr r3, [r7, #4] - 8032290: 2200 movs r2, #0 - 8032292: 771a strb r2, [r3, #28] + 80322be: 687b ldr r3, [r7, #4] + 80322c0: 2200 movs r2, #0 + 80322c2: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - 8032294: 687b ldr r3, [r7, #4] - 8032296: 681b ldr r3, [r3, #0] - 8032298: 691b ldr r3, [r3, #16] - 803229a: f003 0304 and.w r3, r3, #4 - 803229e: 2b04 cmp r3, #4 - 80322a0: d122 bne.n 80322e8 + 80322c4: 687b ldr r3, [r7, #4] + 80322c6: 681b ldr r3, [r3, #0] + 80322c8: 691b ldr r3, [r3, #16] + 80322ca: f003 0304 and.w r3, r3, #4 + 80322ce: 2b04 cmp r3, #4 + 80322d0: d122 bne.n 8032318 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) - 80322a2: 687b ldr r3, [r7, #4] - 80322a4: 681b ldr r3, [r3, #0] - 80322a6: 68db ldr r3, [r3, #12] - 80322a8: f003 0304 and.w r3, r3, #4 - 80322ac: 2b04 cmp r3, #4 - 80322ae: d11b bne.n 80322e8 + 80322d2: 687b ldr r3, [r7, #4] + 80322d4: 681b ldr r3, [r3, #0] + 80322d6: 68db ldr r3, [r3, #12] + 80322d8: f003 0304 and.w r3, r3, #4 + 80322dc: 2b04 cmp r3, #4 + 80322de: d11b bne.n 8032318 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - 80322b0: 687b ldr r3, [r7, #4] - 80322b2: 681b ldr r3, [r3, #0] - 80322b4: f06f 0204 mvn.w r2, #4 - 80322b8: 611a str r2, [r3, #16] + 80322e0: 687b ldr r3, [r7, #4] + 80322e2: 681b ldr r3, [r3, #0] + 80322e4: f06f 0204 mvn.w r2, #4 + 80322e8: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 80322ba: 687b ldr r3, [r7, #4] - 80322bc: 2202 movs r2, #2 - 80322be: 771a strb r2, [r3, #28] + 80322ea: 687b ldr r3, [r7, #4] + 80322ec: 2202 movs r2, #2 + 80322ee: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 80322c0: 687b ldr r3, [r7, #4] - 80322c2: 681b ldr r3, [r3, #0] - 80322c4: 699b ldr r3, [r3, #24] - 80322c6: f403 7340 and.w r3, r3, #768 ; 0x300 - 80322ca: 2b00 cmp r3, #0 - 80322cc: d003 beq.n 80322d6 + 80322f0: 687b ldr r3, [r7, #4] + 80322f2: 681b ldr r3, [r3, #0] + 80322f4: 699b ldr r3, [r3, #24] + 80322f6: f403 7340 and.w r3, r3, #768 ; 0x300 + 80322fa: 2b00 cmp r3, #0 + 80322fc: d003 beq.n 8032306 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80322ce: 6878 ldr r0, [r7, #4] - 80322d0: f000 f9d4 bl 803267c - 80322d4: e005 b.n 80322e2 + 80322fe: 6878 ldr r0, [r7, #4] + 8032300: f000 f9d4 bl 80326ac + 8032304: e005 b.n 8032312 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 80322d6: 6878 ldr r0, [r7, #4] - 80322d8: f000 f9c6 bl 8032668 + 8032306: 6878 ldr r0, [r7, #4] + 8032308: f000 f9c6 bl 8032698 HAL_TIM_PWM_PulseFinishedCallback(htim); - 80322dc: 6878 ldr r0, [r7, #4] - 80322de: f000 f9d7 bl 8032690 + 803230c: 6878 ldr r0, [r7, #4] + 803230e: f000 f9d7 bl 80326c0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80322e2: 687b ldr r3, [r7, #4] - 80322e4: 2200 movs r2, #0 - 80322e6: 771a strb r2, [r3, #28] + 8032312: 687b ldr r3, [r7, #4] + 8032314: 2200 movs r2, #0 + 8032316: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - 80322e8: 687b ldr r3, [r7, #4] - 80322ea: 681b ldr r3, [r3, #0] - 80322ec: 691b ldr r3, [r3, #16] - 80322ee: f003 0308 and.w r3, r3, #8 - 80322f2: 2b08 cmp r3, #8 - 80322f4: d122 bne.n 803233c + 8032318: 687b ldr r3, [r7, #4] + 803231a: 681b ldr r3, [r3, #0] + 803231c: 691b ldr r3, [r3, #16] + 803231e: f003 0308 and.w r3, r3, #8 + 8032322: 2b08 cmp r3, #8 + 8032324: d122 bne.n 803236c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) - 80322f6: 687b ldr r3, [r7, #4] - 80322f8: 681b ldr r3, [r3, #0] - 80322fa: 68db ldr r3, [r3, #12] - 80322fc: f003 0308 and.w r3, r3, #8 - 8032300: 2b08 cmp r3, #8 - 8032302: d11b bne.n 803233c + 8032326: 687b ldr r3, [r7, #4] + 8032328: 681b ldr r3, [r3, #0] + 803232a: 68db ldr r3, [r3, #12] + 803232c: f003 0308 and.w r3, r3, #8 + 8032330: 2b08 cmp r3, #8 + 8032332: d11b bne.n 803236c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - 8032304: 687b ldr r3, [r7, #4] - 8032306: 681b ldr r3, [r3, #0] - 8032308: f06f 0208 mvn.w r2, #8 - 803230c: 611a str r2, [r3, #16] + 8032334: 687b ldr r3, [r7, #4] + 8032336: 681b ldr r3, [r3, #0] + 8032338: f06f 0208 mvn.w r2, #8 + 803233c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 803230e: 687b ldr r3, [r7, #4] - 8032310: 2204 movs r2, #4 - 8032312: 771a strb r2, [r3, #28] + 803233e: 687b ldr r3, [r7, #4] + 8032340: 2204 movs r2, #4 + 8032342: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8032314: 687b ldr r3, [r7, #4] - 8032316: 681b ldr r3, [r3, #0] - 8032318: 69db ldr r3, [r3, #28] - 803231a: f003 0303 and.w r3, r3, #3 - 803231e: 2b00 cmp r3, #0 - 8032320: d003 beq.n 803232a + 8032344: 687b ldr r3, [r7, #4] + 8032346: 681b ldr r3, [r3, #0] + 8032348: 69db ldr r3, [r3, #28] + 803234a: f003 0303 and.w r3, r3, #3 + 803234e: 2b00 cmp r3, #0 + 8032350: d003 beq.n 803235a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8032322: 6878 ldr r0, [r7, #4] - 8032324: f000 f9aa bl 803267c - 8032328: e005 b.n 8032336 + 8032352: 6878 ldr r0, [r7, #4] + 8032354: f000 f9aa bl 80326ac + 8032358: e005 b.n 8032366 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 803232a: 6878 ldr r0, [r7, #4] - 803232c: f000 f99c bl 8032668 + 803235a: 6878 ldr r0, [r7, #4] + 803235c: f000 f99c bl 8032698 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8032330: 6878 ldr r0, [r7, #4] - 8032332: f000 f9ad bl 8032690 + 8032360: 6878 ldr r0, [r7, #4] + 8032362: f000 f9ad bl 80326c0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8032336: 687b ldr r3, [r7, #4] - 8032338: 2200 movs r2, #0 - 803233a: 771a strb r2, [r3, #28] + 8032366: 687b ldr r3, [r7, #4] + 8032368: 2200 movs r2, #0 + 803236a: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - 803233c: 687b ldr r3, [r7, #4] - 803233e: 681b ldr r3, [r3, #0] - 8032340: 691b ldr r3, [r3, #16] - 8032342: f003 0310 and.w r3, r3, #16 - 8032346: 2b10 cmp r3, #16 - 8032348: d122 bne.n 8032390 + 803236c: 687b ldr r3, [r7, #4] + 803236e: 681b ldr r3, [r3, #0] + 8032370: 691b ldr r3, [r3, #16] + 8032372: f003 0310 and.w r3, r3, #16 + 8032376: 2b10 cmp r3, #16 + 8032378: d122 bne.n 80323c0 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) - 803234a: 687b ldr r3, [r7, #4] - 803234c: 681b ldr r3, [r3, #0] - 803234e: 68db ldr r3, [r3, #12] - 8032350: f003 0310 and.w r3, r3, #16 - 8032354: 2b10 cmp r3, #16 - 8032356: d11b bne.n 8032390 + 803237a: 687b ldr r3, [r7, #4] + 803237c: 681b ldr r3, [r3, #0] + 803237e: 68db ldr r3, [r3, #12] + 8032380: f003 0310 and.w r3, r3, #16 + 8032384: 2b10 cmp r3, #16 + 8032386: d11b bne.n 80323c0 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - 8032358: 687b ldr r3, [r7, #4] - 803235a: 681b ldr r3, [r3, #0] - 803235c: f06f 0210 mvn.w r2, #16 - 8032360: 611a str r2, [r3, #16] + 8032388: 687b ldr r3, [r7, #4] + 803238a: 681b ldr r3, [r3, #0] + 803238c: f06f 0210 mvn.w r2, #16 + 8032390: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 8032362: 687b ldr r3, [r7, #4] - 8032364: 2208 movs r2, #8 - 8032366: 771a strb r2, [r3, #28] + 8032392: 687b ldr r3, [r7, #4] + 8032394: 2208 movs r2, #8 + 8032396: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8032368: 687b ldr r3, [r7, #4] - 803236a: 681b ldr r3, [r3, #0] - 803236c: 69db ldr r3, [r3, #28] - 803236e: f403 7340 and.w r3, r3, #768 ; 0x300 - 8032372: 2b00 cmp r3, #0 - 8032374: d003 beq.n 803237e + 8032398: 687b ldr r3, [r7, #4] + 803239a: 681b ldr r3, [r3, #0] + 803239c: 69db ldr r3, [r3, #28] + 803239e: f403 7340 and.w r3, r3, #768 ; 0x300 + 80323a2: 2b00 cmp r3, #0 + 80323a4: d003 beq.n 80323ae { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8032376: 6878 ldr r0, [r7, #4] - 8032378: f000 f980 bl 803267c - 803237c: e005 b.n 803238a + 80323a6: 6878 ldr r0, [r7, #4] + 80323a8: f000 f980 bl 80326ac + 80323ac: e005 b.n 80323ba { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 803237e: 6878 ldr r0, [r7, #4] - 8032380: f000 f972 bl 8032668 + 80323ae: 6878 ldr r0, [r7, #4] + 80323b0: f000 f972 bl 8032698 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8032384: 6878 ldr r0, [r7, #4] - 8032386: f000 f983 bl 8032690 + 80323b4: 6878 ldr r0, [r7, #4] + 80323b6: f000 f983 bl 80326c0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 803238a: 687b ldr r3, [r7, #4] - 803238c: 2200 movs r2, #0 - 803238e: 771a strb r2, [r3, #28] + 80323ba: 687b ldr r3, [r7, #4] + 80323bc: 2200 movs r2, #0 + 80323be: 771a strb r2, [r3, #28] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - 8032390: 687b ldr r3, [r7, #4] - 8032392: 681b ldr r3, [r3, #0] - 8032394: 691b ldr r3, [r3, #16] - 8032396: f003 0301 and.w r3, r3, #1 - 803239a: 2b01 cmp r3, #1 - 803239c: d10e bne.n 80323bc + 80323c0: 687b ldr r3, [r7, #4] + 80323c2: 681b ldr r3, [r3, #0] + 80323c4: 691b ldr r3, [r3, #16] + 80323c6: f003 0301 and.w r3, r3, #1 + 80323ca: 2b01 cmp r3, #1 + 80323cc: d10e bne.n 80323ec { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) - 803239e: 687b ldr r3, [r7, #4] - 80323a0: 681b ldr r3, [r3, #0] - 80323a2: 68db ldr r3, [r3, #12] - 80323a4: f003 0301 and.w r3, r3, #1 - 80323a8: 2b01 cmp r3, #1 - 80323aa: d107 bne.n 80323bc + 80323ce: 687b ldr r3, [r7, #4] + 80323d0: 681b ldr r3, [r3, #0] + 80323d2: 68db ldr r3, [r3, #12] + 80323d4: f003 0301 and.w r3, r3, #1 + 80323d8: 2b01 cmp r3, #1 + 80323da: d107 bne.n 80323ec { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 80323ac: 687b ldr r3, [r7, #4] - 80323ae: 681b ldr r3, [r3, #0] - 80323b0: f06f 0201 mvn.w r2, #1 - 80323b4: 611a str r2, [r3, #16] + 80323dc: 687b ldr r3, [r7, #4] + 80323de: 681b ldr r3, [r3, #0] + 80323e0: f06f 0201 mvn.w r2, #1 + 80323e4: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); - 80323b6: 6878 ldr r0, [r7, #4] - 80323b8: f7ee ffe6 bl 8021388 + 80323e6: 6878 ldr r0, [r7, #4] + 80323e8: f7ee ffce bl 8021388 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - 80323bc: 687b ldr r3, [r7, #4] - 80323be: 681b ldr r3, [r3, #0] - 80323c0: 691b ldr r3, [r3, #16] - 80323c2: f003 0380 and.w r3, r3, #128 ; 0x80 - 80323c6: 2b80 cmp r3, #128 ; 0x80 - 80323c8: d10e bne.n 80323e8 + 80323ec: 687b ldr r3, [r7, #4] + 80323ee: 681b ldr r3, [r3, #0] + 80323f0: 691b ldr r3, [r3, #16] + 80323f2: f003 0380 and.w r3, r3, #128 ; 0x80 + 80323f6: 2b80 cmp r3, #128 ; 0x80 + 80323f8: d10e bne.n 8032418 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 80323ca: 687b ldr r3, [r7, #4] - 80323cc: 681b ldr r3, [r3, #0] - 80323ce: 68db ldr r3, [r3, #12] - 80323d0: f003 0380 and.w r3, r3, #128 ; 0x80 - 80323d4: 2b80 cmp r3, #128 ; 0x80 - 80323d6: d107 bne.n 80323e8 + 80323fa: 687b ldr r3, [r7, #4] + 80323fc: 681b ldr r3, [r3, #0] + 80323fe: 68db ldr r3, [r3, #12] + 8032400: f003 0380 and.w r3, r3, #128 ; 0x80 + 8032404: 2b80 cmp r3, #128 ; 0x80 + 8032406: d107 bne.n 8032418 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - 80323d8: 687b ldr r3, [r7, #4] - 80323da: 681b ldr r3, [r3, #0] - 80323dc: f06f 0280 mvn.w r2, #128 ; 0x80 - 80323e0: 611a str r2, [r3, #16] + 8032408: 687b ldr r3, [r7, #4] + 803240a: 681b ldr r3, [r3, #0] + 803240c: f06f 0280 mvn.w r2, #128 ; 0x80 + 8032410: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); - 80323e2: 6878 ldr r0, [r7, #4] - 80323e4: f000 fb38 bl 8032a58 + 8032412: 6878 ldr r0, [r7, #4] + 8032414: f000 fb38 bl 8032a88 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break2 input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET) - 80323e8: 687b ldr r3, [r7, #4] - 80323ea: 681b ldr r3, [r3, #0] - 80323ec: 691b ldr r3, [r3, #16] - 80323ee: f403 7380 and.w r3, r3, #256 ; 0x100 - 80323f2: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80323f6: d10e bne.n 8032416 + 8032418: 687b ldr r3, [r7, #4] + 803241a: 681b ldr r3, [r3, #0] + 803241c: 691b ldr r3, [r3, #16] + 803241e: f403 7380 and.w r3, r3, #256 ; 0x100 + 8032422: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8032426: d10e bne.n 8032446 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 80323f8: 687b ldr r3, [r7, #4] - 80323fa: 681b ldr r3, [r3, #0] - 80323fc: 68db ldr r3, [r3, #12] - 80323fe: f003 0380 and.w r3, r3, #128 ; 0x80 - 8032402: 2b80 cmp r3, #128 ; 0x80 - 8032404: d107 bne.n 8032416 + 8032428: 687b ldr r3, [r7, #4] + 803242a: 681b ldr r3, [r3, #0] + 803242c: 68db ldr r3, [r3, #12] + 803242e: f003 0380 and.w r3, r3, #128 ; 0x80 + 8032432: 2b80 cmp r3, #128 ; 0x80 + 8032434: d107 bne.n 8032446 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); - 8032406: 687b ldr r3, [r7, #4] - 8032408: 681b ldr r3, [r3, #0] - 803240a: f46f 7280 mvn.w r2, #256 ; 0x100 - 803240e: 611a str r2, [r3, #16] + 8032436: 687b ldr r3, [r7, #4] + 8032438: 681b ldr r3, [r3, #0] + 803243a: f46f 7280 mvn.w r2, #256 ; 0x100 + 803243e: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->Break2Callback(htim); #else HAL_TIMEx_Break2Callback(htim); - 8032410: 6878 ldr r0, [r7, #4] - 8032412: f000 fb2b bl 8032a6c + 8032440: 6878 ldr r0, [r7, #4] + 8032442: f000 fb2b bl 8032a9c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - 8032416: 687b ldr r3, [r7, #4] - 8032418: 681b ldr r3, [r3, #0] - 803241a: 691b ldr r3, [r3, #16] - 803241c: f003 0340 and.w r3, r3, #64 ; 0x40 - 8032420: 2b40 cmp r3, #64 ; 0x40 - 8032422: d10e bne.n 8032442 + 8032446: 687b ldr r3, [r7, #4] + 8032448: 681b ldr r3, [r3, #0] + 803244a: 691b ldr r3, [r3, #16] + 803244c: f003 0340 and.w r3, r3, #64 ; 0x40 + 8032450: 2b40 cmp r3, #64 ; 0x40 + 8032452: d10e bne.n 8032472 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) - 8032424: 687b ldr r3, [r7, #4] - 8032426: 681b ldr r3, [r3, #0] - 8032428: 68db ldr r3, [r3, #12] - 803242a: f003 0340 and.w r3, r3, #64 ; 0x40 - 803242e: 2b40 cmp r3, #64 ; 0x40 - 8032430: d107 bne.n 8032442 + 8032454: 687b ldr r3, [r7, #4] + 8032456: 681b ldr r3, [r3, #0] + 8032458: 68db ldr r3, [r3, #12] + 803245a: f003 0340 and.w r3, r3, #64 ; 0x40 + 803245e: 2b40 cmp r3, #64 ; 0x40 + 8032460: d107 bne.n 8032472 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - 8032432: 687b ldr r3, [r7, #4] - 8032434: 681b ldr r3, [r3, #0] - 8032436: f06f 0240 mvn.w r2, #64 ; 0x40 - 803243a: 611a str r2, [r3, #16] + 8032462: 687b ldr r3, [r7, #4] + 8032464: 681b ldr r3, [r3, #0] + 8032466: f06f 0240 mvn.w r2, #64 ; 0x40 + 803246a: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); - 803243c: 6878 ldr r0, [r7, #4] - 803243e: f000 f931 bl 80326a4 + 803246c: 6878 ldr r0, [r7, #4] + 803246e: f000 f931 bl 80326d4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - 8032442: 687b ldr r3, [r7, #4] - 8032444: 681b ldr r3, [r3, #0] - 8032446: 691b ldr r3, [r3, #16] - 8032448: f003 0320 and.w r3, r3, #32 - 803244c: 2b20 cmp r3, #32 - 803244e: d10e bne.n 803246e + 8032472: 687b ldr r3, [r7, #4] + 8032474: 681b ldr r3, [r3, #0] + 8032476: 691b ldr r3, [r3, #16] + 8032478: f003 0320 and.w r3, r3, #32 + 803247c: 2b20 cmp r3, #32 + 803247e: d10e bne.n 803249e { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) - 8032450: 687b ldr r3, [r7, #4] - 8032452: 681b ldr r3, [r3, #0] - 8032454: 68db ldr r3, [r3, #12] - 8032456: f003 0320 and.w r3, r3, #32 - 803245a: 2b20 cmp r3, #32 - 803245c: d107 bne.n 803246e + 8032480: 687b ldr r3, [r7, #4] + 8032482: 681b ldr r3, [r3, #0] + 8032484: 68db ldr r3, [r3, #12] + 8032486: f003 0320 and.w r3, r3, #32 + 803248a: 2b20 cmp r3, #32 + 803248c: d107 bne.n 803249e { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - 803245e: 687b ldr r3, [r7, #4] - 8032460: 681b ldr r3, [r3, #0] - 8032462: f06f 0220 mvn.w r2, #32 - 8032466: 611a str r2, [r3, #16] + 803248e: 687b ldr r3, [r7, #4] + 8032490: 681b ldr r3, [r3, #0] + 8032492: f06f 0220 mvn.w r2, #32 + 8032496: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); - 8032468: 6878 ldr r0, [r7, #4] - 803246a: f000 faeb bl 8032a44 + 8032498: 6878 ldr r0, [r7, #4] + 803249a: f000 faeb bl 8032a74 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } - 803246e: bf00 nop - 8032470: 3708 adds r7, #8 - 8032472: 46bd mov sp, r7 - 8032474: bd80 pop {r7, pc} + 803249e: bf00 nop + 80324a0: 3708 adds r7, #8 + 80324a2: 46bd mov sp, r7 + 80324a4: bd80 pop {r7, pc} ... -08032478 : +080324a8 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) { - 8032478: b580 push {r7, lr} - 803247a: b084 sub sp, #16 - 803247c: af00 add r7, sp, #0 - 803247e: 6078 str r0, [r7, #4] - 8032480: 6039 str r1, [r7, #0] + 80324a8: b580 push {r7, lr} + 80324aa: b084 sub sp, #16 + 80324ac: af00 add r7, sp, #0 + 80324ae: 6078 str r0, [r7, #4] + 80324b0: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 8032482: 2300 movs r3, #0 - 8032484: 73fb strb r3, [r7, #15] + 80324b2: 2300 movs r3, #0 + 80324b4: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); - 8032486: 687b ldr r3, [r7, #4] - 8032488: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 803248c: 2b01 cmp r3, #1 - 803248e: d101 bne.n 8032494 - 8032490: 2302 movs r3, #2 - 8032492: e0dc b.n 803264e - 8032494: 687b ldr r3, [r7, #4] - 8032496: 2201 movs r2, #1 - 8032498: f883 203c strb.w r2, [r3, #60] ; 0x3c + 80324b6: 687b ldr r3, [r7, #4] + 80324b8: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 80324bc: 2b01 cmp r3, #1 + 80324be: d101 bne.n 80324c4 + 80324c0: 2302 movs r3, #2 + 80324c2: e0dc b.n 803267e + 80324c4: 687b ldr r3, [r7, #4] + 80324c6: 2201 movs r2, #1 + 80324c8: f883 203c strb.w r2, [r3, #60] ; 0x3c htim->State = HAL_TIM_STATE_BUSY; - 803249c: 687b ldr r3, [r7, #4] - 803249e: 2202 movs r2, #2 - 80324a0: f883 203d strb.w r2, [r3, #61] ; 0x3d + 80324cc: 687b ldr r3, [r7, #4] + 80324ce: 2202 movs r2, #2 + 80324d0: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; - 80324a4: 687b ldr r3, [r7, #4] - 80324a6: 681b ldr r3, [r3, #0] - 80324a8: 689b ldr r3, [r3, #8] - 80324aa: 60bb str r3, [r7, #8] + 80324d4: 687b ldr r3, [r7, #4] + 80324d6: 681b ldr r3, [r3, #0] + 80324d8: 689b ldr r3, [r3, #8] + 80324da: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 80324ac: 68ba ldr r2, [r7, #8] - 80324ae: 4b6a ldr r3, [pc, #424] ; (8032658 ) - 80324b0: 4013 ands r3, r2 - 80324b2: 60bb str r3, [r7, #8] + 80324dc: 68ba ldr r2, [r7, #8] + 80324de: 4b6a ldr r3, [pc, #424] ; (8032688 ) + 80324e0: 4013 ands r3, r2 + 80324e2: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 80324b4: 68bb ldr r3, [r7, #8] - 80324b6: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 80324ba: 60bb str r3, [r7, #8] + 80324e4: 68bb ldr r3, [r7, #8] + 80324e6: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 80324ea: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; - 80324bc: 687b ldr r3, [r7, #4] - 80324be: 681b ldr r3, [r3, #0] - 80324c0: 68ba ldr r2, [r7, #8] - 80324c2: 609a str r2, [r3, #8] + 80324ec: 687b ldr r3, [r7, #4] + 80324ee: 681b ldr r3, [r3, #0] + 80324f0: 68ba ldr r2, [r7, #8] + 80324f2: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) - 80324c4: 683b ldr r3, [r7, #0] - 80324c6: 681b ldr r3, [r3, #0] - 80324c8: 4a64 ldr r2, [pc, #400] ; (803265c ) - 80324ca: 4293 cmp r3, r2 - 80324cc: f000 80a9 beq.w 8032622 - 80324d0: 4a62 ldr r2, [pc, #392] ; (803265c ) - 80324d2: 4293 cmp r3, r2 - 80324d4: f200 80ae bhi.w 8032634 - 80324d8: 4a61 ldr r2, [pc, #388] ; (8032660 ) - 80324da: 4293 cmp r3, r2 - 80324dc: f000 80a1 beq.w 8032622 - 80324e0: 4a5f ldr r2, [pc, #380] ; (8032660 ) - 80324e2: 4293 cmp r3, r2 - 80324e4: f200 80a6 bhi.w 8032634 - 80324e8: 4a5e ldr r2, [pc, #376] ; (8032664 ) - 80324ea: 4293 cmp r3, r2 - 80324ec: f000 8099 beq.w 8032622 - 80324f0: 4a5c ldr r2, [pc, #368] ; (8032664 ) - 80324f2: 4293 cmp r3, r2 - 80324f4: f200 809e bhi.w 8032634 - 80324f8: f1b3 1f10 cmp.w r3, #1048592 ; 0x100010 - 80324fc: f000 8091 beq.w 8032622 - 8032500: f1b3 1f10 cmp.w r3, #1048592 ; 0x100010 - 8032504: f200 8096 bhi.w 8032634 - 8032508: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 803250c: f000 8089 beq.w 8032622 - 8032510: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8032514: f200 808e bhi.w 8032634 - 8032518: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 803251c: d03e beq.n 803259c - 803251e: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8032522: f200 8087 bhi.w 8032634 - 8032526: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 803252a: f000 8086 beq.w 803263a - 803252e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8032532: d87f bhi.n 8032634 - 8032534: 2b70 cmp r3, #112 ; 0x70 - 8032536: d01a beq.n 803256e - 8032538: 2b70 cmp r3, #112 ; 0x70 - 803253a: d87b bhi.n 8032634 - 803253c: 2b60 cmp r3, #96 ; 0x60 - 803253e: d050 beq.n 80325e2 - 8032540: 2b60 cmp r3, #96 ; 0x60 - 8032542: d877 bhi.n 8032634 - 8032544: 2b50 cmp r3, #80 ; 0x50 - 8032546: d03c beq.n 80325c2 - 8032548: 2b50 cmp r3, #80 ; 0x50 - 803254a: d873 bhi.n 8032634 - 803254c: 2b40 cmp r3, #64 ; 0x40 - 803254e: d058 beq.n 8032602 - 8032550: 2b40 cmp r3, #64 ; 0x40 - 8032552: d86f bhi.n 8032634 - 8032554: 2b30 cmp r3, #48 ; 0x30 - 8032556: d064 beq.n 8032622 - 8032558: 2b30 cmp r3, #48 ; 0x30 - 803255a: d86b bhi.n 8032634 - 803255c: 2b20 cmp r3, #32 - 803255e: d060 beq.n 8032622 - 8032560: 2b20 cmp r3, #32 - 8032562: d867 bhi.n 8032634 - 8032564: 2b00 cmp r3, #0 - 8032566: d05c beq.n 8032622 - 8032568: 2b10 cmp r3, #16 - 803256a: d05a beq.n 8032622 - 803256c: e062 b.n 8032634 + 80324f4: 683b ldr r3, [r7, #0] + 80324f6: 681b ldr r3, [r3, #0] + 80324f8: 4a64 ldr r2, [pc, #400] ; (803268c ) + 80324fa: 4293 cmp r3, r2 + 80324fc: f000 80a9 beq.w 8032652 + 8032500: 4a62 ldr r2, [pc, #392] ; (803268c ) + 8032502: 4293 cmp r3, r2 + 8032504: f200 80ae bhi.w 8032664 + 8032508: 4a61 ldr r2, [pc, #388] ; (8032690 ) + 803250a: 4293 cmp r3, r2 + 803250c: f000 80a1 beq.w 8032652 + 8032510: 4a5f ldr r2, [pc, #380] ; (8032690 ) + 8032512: 4293 cmp r3, r2 + 8032514: f200 80a6 bhi.w 8032664 + 8032518: 4a5e ldr r2, [pc, #376] ; (8032694 ) + 803251a: 4293 cmp r3, r2 + 803251c: f000 8099 beq.w 8032652 + 8032520: 4a5c ldr r2, [pc, #368] ; (8032694 ) + 8032522: 4293 cmp r3, r2 + 8032524: f200 809e bhi.w 8032664 + 8032528: f1b3 1f10 cmp.w r3, #1048592 ; 0x100010 + 803252c: f000 8091 beq.w 8032652 + 8032530: f1b3 1f10 cmp.w r3, #1048592 ; 0x100010 + 8032534: f200 8096 bhi.w 8032664 + 8032538: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 803253c: f000 8089 beq.w 8032652 + 8032540: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8032544: f200 808e bhi.w 8032664 + 8032548: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 803254c: d03e beq.n 80325cc + 803254e: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 8032552: f200 8087 bhi.w 8032664 + 8032556: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 803255a: f000 8086 beq.w 803266a + 803255e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8032562: d87f bhi.n 8032664 + 8032564: 2b70 cmp r3, #112 ; 0x70 + 8032566: d01a beq.n 803259e + 8032568: 2b70 cmp r3, #112 ; 0x70 + 803256a: d87b bhi.n 8032664 + 803256c: 2b60 cmp r3, #96 ; 0x60 + 803256e: d050 beq.n 8032612 + 8032570: 2b60 cmp r3, #96 ; 0x60 + 8032572: d877 bhi.n 8032664 + 8032574: 2b50 cmp r3, #80 ; 0x50 + 8032576: d03c beq.n 80325f2 + 8032578: 2b50 cmp r3, #80 ; 0x50 + 803257a: d873 bhi.n 8032664 + 803257c: 2b40 cmp r3, #64 ; 0x40 + 803257e: d058 beq.n 8032632 + 8032580: 2b40 cmp r3, #64 ; 0x40 + 8032582: d86f bhi.n 8032664 + 8032584: 2b30 cmp r3, #48 ; 0x30 + 8032586: d064 beq.n 8032652 + 8032588: 2b30 cmp r3, #48 ; 0x30 + 803258a: d86b bhi.n 8032664 + 803258c: 2b20 cmp r3, #32 + 803258e: d060 beq.n 8032652 + 8032590: 2b20 cmp r3, #32 + 8032592: d867 bhi.n 8032664 + 8032594: 2b00 cmp r3, #0 + 8032596: d05c beq.n 8032652 + 8032598: 2b10 cmp r3, #16 + 803259a: d05a beq.n 8032652 + 803259c: e062 b.n 8032664 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 803256e: 687b ldr r3, [r7, #4] - 8032570: 6818 ldr r0, [r3, #0] - 8032572: 683b ldr r3, [r7, #0] - 8032574: 6899 ldr r1, [r3, #8] - 8032576: 683b ldr r3, [r7, #0] - 8032578: 685a ldr r2, [r3, #4] - 803257a: 683b ldr r3, [r7, #0] - 803257c: 68db ldr r3, [r3, #12] - 803257e: f000 f9b3 bl 80328e8 + 803259e: 687b ldr r3, [r7, #4] + 80325a0: 6818 ldr r0, [r3, #0] + 80325a2: 683b ldr r3, [r7, #0] + 80325a4: 6899 ldr r1, [r3, #8] + 80325a6: 683b ldr r3, [r7, #0] + 80325a8: 685a ldr r2, [r3, #4] + 80325aa: 683b ldr r3, [r7, #0] + 80325ac: 68db ldr r3, [r3, #12] + 80325ae: f000 f9b3 bl 8032918 sClockSourceConfig->ClockPrescaler, sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; - 8032582: 687b ldr r3, [r7, #4] - 8032584: 681b ldr r3, [r3, #0] - 8032586: 689b ldr r3, [r3, #8] - 8032588: 60bb str r3, [r7, #8] + 80325b2: 687b ldr r3, [r7, #4] + 80325b4: 681b ldr r3, [r3, #0] + 80325b6: 689b ldr r3, [r3, #8] + 80325b8: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 803258a: 68bb ldr r3, [r7, #8] - 803258c: f043 0377 orr.w r3, r3, #119 ; 0x77 - 8032590: 60bb str r3, [r7, #8] + 80325ba: 68bb ldr r3, [r7, #8] + 80325bc: f043 0377 orr.w r3, r3, #119 ; 0x77 + 80325c0: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 8032592: 687b ldr r3, [r7, #4] - 8032594: 681b ldr r3, [r3, #0] - 8032596: 68ba ldr r2, [r7, #8] - 8032598: 609a str r2, [r3, #8] + 80325c2: 687b ldr r3, [r7, #4] + 80325c4: 681b ldr r3, [r3, #0] + 80325c6: 68ba ldr r2, [r7, #8] + 80325c8: 609a str r2, [r3, #8] break; - 803259a: e04f b.n 803263c + 80325ca: e04f b.n 803266c assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 803259c: 687b ldr r3, [r7, #4] - 803259e: 6818 ldr r0, [r3, #0] - 80325a0: 683b ldr r3, [r7, #0] - 80325a2: 6899 ldr r1, [r3, #8] - 80325a4: 683b ldr r3, [r7, #0] - 80325a6: 685a ldr r2, [r3, #4] - 80325a8: 683b ldr r3, [r7, #0] - 80325aa: 68db ldr r3, [r3, #12] - 80325ac: f000 f99c bl 80328e8 + 80325cc: 687b ldr r3, [r7, #4] + 80325ce: 6818 ldr r0, [r3, #0] + 80325d0: 683b ldr r3, [r7, #0] + 80325d2: 6899 ldr r1, [r3, #8] + 80325d4: 683b ldr r3, [r7, #0] + 80325d6: 685a ldr r2, [r3, #4] + 80325d8: 683b ldr r3, [r7, #0] + 80325da: 68db ldr r3, [r3, #12] + 80325dc: f000 f99c bl 8032918 sClockSourceConfig->ClockPrescaler, sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; - 80325b0: 687b ldr r3, [r7, #4] - 80325b2: 681b ldr r3, [r3, #0] - 80325b4: 689a ldr r2, [r3, #8] - 80325b6: 687b ldr r3, [r7, #4] - 80325b8: 681b ldr r3, [r3, #0] - 80325ba: f442 4280 orr.w r2, r2, #16384 ; 0x4000 - 80325be: 609a str r2, [r3, #8] + 80325e0: 687b ldr r3, [r7, #4] + 80325e2: 681b ldr r3, [r3, #0] + 80325e4: 689a ldr r2, [r3, #8] + 80325e6: 687b ldr r3, [r7, #4] + 80325e8: 681b ldr r3, [r3, #0] + 80325ea: f442 4280 orr.w r2, r2, #16384 ; 0x4000 + 80325ee: 609a str r2, [r3, #8] break; - 80325c0: e03c b.n 803263c + 80325f0: e03c b.n 803266c /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 80325c2: 687b ldr r3, [r7, #4] - 80325c4: 6818 ldr r0, [r3, #0] - 80325c6: 683b ldr r3, [r7, #0] - 80325c8: 6859 ldr r1, [r3, #4] - 80325ca: 683b ldr r3, [r7, #0] - 80325cc: 68db ldr r3, [r3, #12] - 80325ce: 461a mov r2, r3 - 80325d0: f000 f90c bl 80327ec + 80325f2: 687b ldr r3, [r7, #4] + 80325f4: 6818 ldr r0, [r3, #0] + 80325f6: 683b ldr r3, [r7, #0] + 80325f8: 6859 ldr r1, [r3, #4] + 80325fa: 683b ldr r3, [r7, #0] + 80325fc: 68db ldr r3, [r3, #12] + 80325fe: 461a mov r2, r3 + 8032600: f000 f90c bl 803281c sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 80325d4: 687b ldr r3, [r7, #4] - 80325d6: 681b ldr r3, [r3, #0] - 80325d8: 2150 movs r1, #80 ; 0x50 - 80325da: 4618 mov r0, r3 - 80325dc: f000 f966 bl 80328ac + 8032604: 687b ldr r3, [r7, #4] + 8032606: 681b ldr r3, [r3, #0] + 8032608: 2150 movs r1, #80 ; 0x50 + 803260a: 4618 mov r0, r3 + 803260c: f000 f966 bl 80328dc break; - 80325e0: e02c b.n 803263c + 8032610: e02c b.n 803266c /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, - 80325e2: 687b ldr r3, [r7, #4] - 80325e4: 6818 ldr r0, [r3, #0] - 80325e6: 683b ldr r3, [r7, #0] - 80325e8: 6859 ldr r1, [r3, #4] - 80325ea: 683b ldr r3, [r7, #0] - 80325ec: 68db ldr r3, [r3, #12] - 80325ee: 461a mov r2, r3 - 80325f0: f000 f92b bl 803284a + 8032612: 687b ldr r3, [r7, #4] + 8032614: 6818 ldr r0, [r3, #0] + 8032616: 683b ldr r3, [r7, #0] + 8032618: 6859 ldr r1, [r3, #4] + 803261a: 683b ldr r3, [r7, #0] + 803261c: 68db ldr r3, [r3, #12] + 803261e: 461a mov r2, r3 + 8032620: f000 f92b bl 803287a sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 80325f4: 687b ldr r3, [r7, #4] - 80325f6: 681b ldr r3, [r3, #0] - 80325f8: 2160 movs r1, #96 ; 0x60 - 80325fa: 4618 mov r0, r3 - 80325fc: f000 f956 bl 80328ac + 8032624: 687b ldr r3, [r7, #4] + 8032626: 681b ldr r3, [r3, #0] + 8032628: 2160 movs r1, #96 ; 0x60 + 803262a: 4618 mov r0, r3 + 803262c: f000 f956 bl 80328dc break; - 8032600: e01c b.n 803263c + 8032630: e01c b.n 803266c /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 8032602: 687b ldr r3, [r7, #4] - 8032604: 6818 ldr r0, [r3, #0] - 8032606: 683b ldr r3, [r7, #0] - 8032608: 6859 ldr r1, [r3, #4] - 803260a: 683b ldr r3, [r7, #0] - 803260c: 68db ldr r3, [r3, #12] - 803260e: 461a mov r2, r3 - 8032610: f000 f8ec bl 80327ec + 8032632: 687b ldr r3, [r7, #4] + 8032634: 6818 ldr r0, [r3, #0] + 8032636: 683b ldr r3, [r7, #0] + 8032638: 6859 ldr r1, [r3, #4] + 803263a: 683b ldr r3, [r7, #0] + 803263c: 68db ldr r3, [r3, #12] + 803263e: 461a mov r2, r3 + 8032640: f000 f8ec bl 803281c sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 8032614: 687b ldr r3, [r7, #4] - 8032616: 681b ldr r3, [r3, #0] - 8032618: 2140 movs r1, #64 ; 0x40 - 803261a: 4618 mov r0, r3 - 803261c: f000 f946 bl 80328ac + 8032644: 687b ldr r3, [r7, #4] + 8032646: 681b ldr r3, [r3, #0] + 8032648: 2140 movs r1, #64 ; 0x40 + 803264a: 4618 mov r0, r3 + 803264c: f000 f946 bl 80328dc break; - 8032620: e00c b.n 803263c + 8032650: e00c b.n 803266c case TIM_CLOCKSOURCE_ITR8: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 8032622: 687b ldr r3, [r7, #4] - 8032624: 681a ldr r2, [r3, #0] - 8032626: 683b ldr r3, [r7, #0] - 8032628: 681b ldr r3, [r3, #0] - 803262a: 4619 mov r1, r3 - 803262c: 4610 mov r0, r2 - 803262e: f000 f93d bl 80328ac + 8032652: 687b ldr r3, [r7, #4] + 8032654: 681a ldr r2, [r3, #0] + 8032656: 683b ldr r3, [r7, #0] + 8032658: 681b ldr r3, [r3, #0] + 803265a: 4619 mov r1, r3 + 803265c: 4610 mov r0, r2 + 803265e: f000 f93d bl 80328dc break; - 8032632: e003 b.n 803263c + 8032662: e003 b.n 803266c } default: status = HAL_ERROR; - 8032634: 2301 movs r3, #1 - 8032636: 73fb strb r3, [r7, #15] + 8032664: 2301 movs r3, #1 + 8032666: 73fb strb r3, [r7, #15] break; - 8032638: e000 b.n 803263c + 8032668: e000 b.n 803266c break; - 803263a: bf00 nop + 803266a: bf00 nop } htim->State = HAL_TIM_STATE_READY; - 803263c: 687b ldr r3, [r7, #4] - 803263e: 2201 movs r2, #1 - 8032640: f883 203d strb.w r2, [r3, #61] ; 0x3d + 803266c: 687b ldr r3, [r7, #4] + 803266e: 2201 movs r2, #1 + 8032670: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); - 8032644: 687b ldr r3, [r7, #4] - 8032646: 2200 movs r2, #0 - 8032648: f883 203c strb.w r2, [r3, #60] ; 0x3c + 8032674: 687b ldr r3, [r7, #4] + 8032676: 2200 movs r2, #0 + 8032678: f883 203c strb.w r2, [r3, #60] ; 0x3c return status; - 803264c: 7bfb ldrb r3, [r7, #15] -} - 803264e: 4618 mov r0, r3 - 8032650: 3710 adds r7, #16 - 8032652: 46bd mov sp, r7 - 8032654: bd80 pop {r7, pc} - 8032656: bf00 nop - 8032658: ffceff88 .word 0xffceff88 - 803265c: 00100040 .word 0x00100040 - 8032660: 00100030 .word 0x00100030 - 8032664: 00100020 .word 0x00100020 - -08032668 : + 803267c: 7bfb ldrb r3, [r7, #15] +} + 803267e: 4618 mov r0, r3 + 8032680: 3710 adds r7, #16 + 8032682: 46bd mov sp, r7 + 8032684: bd80 pop {r7, pc} + 8032686: bf00 nop + 8032688: ffceff88 .word 0xffceff88 + 803268c: 00100040 .word 0x00100040 + 8032690: 00100030 .word 0x00100030 + 8032694: 00100020 .word 0x00100020 + +08032698 : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { - 8032668: b480 push {r7} - 803266a: b083 sub sp, #12 - 803266c: af00 add r7, sp, #0 - 803266e: 6078 str r0, [r7, #4] + 8032698: b480 push {r7} + 803269a: b083 sub sp, #12 + 803269c: af00 add r7, sp, #0 + 803269e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } - 8032670: bf00 nop - 8032672: 370c adds r7, #12 - 8032674: 46bd mov sp, r7 - 8032676: f85d 7b04 ldr.w r7, [sp], #4 - 803267a: 4770 bx lr + 80326a0: bf00 nop + 80326a2: 370c adds r7, #12 + 80326a4: 46bd mov sp, r7 + 80326a6: f85d 7b04 ldr.w r7, [sp], #4 + 80326aa: 4770 bx lr -0803267c : +080326ac : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { - 803267c: b480 push {r7} - 803267e: b083 sub sp, #12 - 8032680: af00 add r7, sp, #0 - 8032682: 6078 str r0, [r7, #4] + 80326ac: b480 push {r7} + 80326ae: b083 sub sp, #12 + 80326b0: af00 add r7, sp, #0 + 80326b2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } - 8032684: bf00 nop - 8032686: 370c adds r7, #12 - 8032688: 46bd mov sp, r7 - 803268a: f85d 7b04 ldr.w r7, [sp], #4 - 803268e: 4770 bx lr + 80326b4: bf00 nop + 80326b6: 370c adds r7, #12 + 80326b8: 46bd mov sp, r7 + 80326ba: f85d 7b04 ldr.w r7, [sp], #4 + 80326be: 4770 bx lr -08032690 : +080326c0 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { - 8032690: b480 push {r7} - 8032692: b083 sub sp, #12 - 8032694: af00 add r7, sp, #0 - 8032696: 6078 str r0, [r7, #4] + 80326c0: b480 push {r7} + 80326c2: b083 sub sp, #12 + 80326c4: af00 add r7, sp, #0 + 80326c6: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } - 8032698: bf00 nop - 803269a: 370c adds r7, #12 - 803269c: 46bd mov sp, r7 - 803269e: f85d 7b04 ldr.w r7, [sp], #4 - 80326a2: 4770 bx lr + 80326c8: bf00 nop + 80326ca: 370c adds r7, #12 + 80326cc: 46bd mov sp, r7 + 80326ce: f85d 7b04 ldr.w r7, [sp], #4 + 80326d2: 4770 bx lr -080326a4 : +080326d4 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { - 80326a4: b480 push {r7} - 80326a6: b083 sub sp, #12 - 80326a8: af00 add r7, sp, #0 - 80326aa: 6078 str r0, [r7, #4] + 80326d4: b480 push {r7} + 80326d6: b083 sub sp, #12 + 80326d8: af00 add r7, sp, #0 + 80326da: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } - 80326ac: bf00 nop - 80326ae: 370c adds r7, #12 - 80326b0: 46bd mov sp, r7 - 80326b2: f85d 7b04 ldr.w r7, [sp], #4 - 80326b6: 4770 bx lr + 80326dc: bf00 nop + 80326de: 370c adds r7, #12 + 80326e0: 46bd mov sp, r7 + 80326e2: f85d 7b04 ldr.w r7, [sp], #4 + 80326e6: 4770 bx lr -080326b8 : +080326e8 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) { - 80326b8: b480 push {r7} - 80326ba: b085 sub sp, #20 - 80326bc: af00 add r7, sp, #0 - 80326be: 6078 str r0, [r7, #4] - 80326c0: 6039 str r1, [r7, #0] + 80326e8: b480 push {r7} + 80326ea: b085 sub sp, #20 + 80326ec: af00 add r7, sp, #0 + 80326ee: 6078 str r0, [r7, #4] + 80326f0: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; - 80326c2: 687b ldr r3, [r7, #4] - 80326c4: 681b ldr r3, [r3, #0] - 80326c6: 60fb str r3, [r7, #12] + 80326f2: 687b ldr r3, [r7, #4] + 80326f4: 681b ldr r3, [r3, #0] + 80326f6: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 80326c8: 687b ldr r3, [r7, #4] - 80326ca: 4a40 ldr r2, [pc, #256] ; (80327cc ) - 80326cc: 4293 cmp r3, r2 - 80326ce: d013 beq.n 80326f8 - 80326d0: 687b ldr r3, [r7, #4] - 80326d2: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 80326d6: d00f beq.n 80326f8 - 80326d8: 687b ldr r3, [r7, #4] - 80326da: 4a3d ldr r2, [pc, #244] ; (80327d0 ) - 80326dc: 4293 cmp r3, r2 - 80326de: d00b beq.n 80326f8 - 80326e0: 687b ldr r3, [r7, #4] - 80326e2: 4a3c ldr r2, [pc, #240] ; (80327d4 ) - 80326e4: 4293 cmp r3, r2 - 80326e6: d007 beq.n 80326f8 - 80326e8: 687b ldr r3, [r7, #4] - 80326ea: 4a3b ldr r2, [pc, #236] ; (80327d8 ) - 80326ec: 4293 cmp r3, r2 - 80326ee: d003 beq.n 80326f8 - 80326f0: 687b ldr r3, [r7, #4] - 80326f2: 4a3a ldr r2, [pc, #232] ; (80327dc ) - 80326f4: 4293 cmp r3, r2 - 80326f6: d108 bne.n 803270a + 80326f8: 687b ldr r3, [r7, #4] + 80326fa: 4a40 ldr r2, [pc, #256] ; (80327fc ) + 80326fc: 4293 cmp r3, r2 + 80326fe: d013 beq.n 8032728 + 8032700: 687b ldr r3, [r7, #4] + 8032702: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8032706: d00f beq.n 8032728 + 8032708: 687b ldr r3, [r7, #4] + 803270a: 4a3d ldr r2, [pc, #244] ; (8032800 ) + 803270c: 4293 cmp r3, r2 + 803270e: d00b beq.n 8032728 + 8032710: 687b ldr r3, [r7, #4] + 8032712: 4a3c ldr r2, [pc, #240] ; (8032804 ) + 8032714: 4293 cmp r3, r2 + 8032716: d007 beq.n 8032728 + 8032718: 687b ldr r3, [r7, #4] + 803271a: 4a3b ldr r2, [pc, #236] ; (8032808 ) + 803271c: 4293 cmp r3, r2 + 803271e: d003 beq.n 8032728 + 8032720: 687b ldr r3, [r7, #4] + 8032722: 4a3a ldr r2, [pc, #232] ; (803280c ) + 8032724: 4293 cmp r3, r2 + 8032726: d108 bne.n 803273a { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 80326f8: 68fb ldr r3, [r7, #12] - 80326fa: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80326fe: 60fb str r3, [r7, #12] + 8032728: 68fb ldr r3, [r7, #12] + 803272a: f023 0370 bic.w r3, r3, #112 ; 0x70 + 803272e: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; - 8032700: 683b ldr r3, [r7, #0] - 8032702: 685b ldr r3, [r3, #4] - 8032704: 68fa ldr r2, [r7, #12] - 8032706: 4313 orrs r3, r2 - 8032708: 60fb str r3, [r7, #12] + 8032730: 683b ldr r3, [r7, #0] + 8032732: 685b ldr r3, [r3, #4] + 8032734: 68fa ldr r2, [r7, #12] + 8032736: 4313 orrs r3, r2 + 8032738: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 803270a: 687b ldr r3, [r7, #4] - 803270c: 4a2f ldr r2, [pc, #188] ; (80327cc ) - 803270e: 4293 cmp r3, r2 - 8032710: d01f beq.n 8032752 - 8032712: 687b ldr r3, [r7, #4] - 8032714: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8032718: d01b beq.n 8032752 - 803271a: 687b ldr r3, [r7, #4] - 803271c: 4a2c ldr r2, [pc, #176] ; (80327d0 ) - 803271e: 4293 cmp r3, r2 - 8032720: d017 beq.n 8032752 - 8032722: 687b ldr r3, [r7, #4] - 8032724: 4a2b ldr r2, [pc, #172] ; (80327d4 ) - 8032726: 4293 cmp r3, r2 - 8032728: d013 beq.n 8032752 - 803272a: 687b ldr r3, [r7, #4] - 803272c: 4a2a ldr r2, [pc, #168] ; (80327d8 ) - 803272e: 4293 cmp r3, r2 - 8032730: d00f beq.n 8032752 - 8032732: 687b ldr r3, [r7, #4] - 8032734: 4a29 ldr r2, [pc, #164] ; (80327dc ) - 8032736: 4293 cmp r3, r2 - 8032738: d00b beq.n 8032752 803273a: 687b ldr r3, [r7, #4] - 803273c: 4a28 ldr r2, [pc, #160] ; (80327e0 ) + 803273c: 4a2f ldr r2, [pc, #188] ; (80327fc ) 803273e: 4293 cmp r3, r2 - 8032740: d007 beq.n 8032752 + 8032740: d01f beq.n 8032782 8032742: 687b ldr r3, [r7, #4] - 8032744: 4a27 ldr r2, [pc, #156] ; (80327e4 ) - 8032746: 4293 cmp r3, r2 - 8032748: d003 beq.n 8032752 + 8032744: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8032748: d01b beq.n 8032782 803274a: 687b ldr r3, [r7, #4] - 803274c: 4a26 ldr r2, [pc, #152] ; (80327e8 ) + 803274c: 4a2c ldr r2, [pc, #176] ; (8032800 ) 803274e: 4293 cmp r3, r2 - 8032750: d108 bne.n 8032764 + 8032750: d017 beq.n 8032782 + 8032752: 687b ldr r3, [r7, #4] + 8032754: 4a2b ldr r2, [pc, #172] ; (8032804 ) + 8032756: 4293 cmp r3, r2 + 8032758: d013 beq.n 8032782 + 803275a: 687b ldr r3, [r7, #4] + 803275c: 4a2a ldr r2, [pc, #168] ; (8032808 ) + 803275e: 4293 cmp r3, r2 + 8032760: d00f beq.n 8032782 + 8032762: 687b ldr r3, [r7, #4] + 8032764: 4a29 ldr r2, [pc, #164] ; (803280c ) + 8032766: 4293 cmp r3, r2 + 8032768: d00b beq.n 8032782 + 803276a: 687b ldr r3, [r7, #4] + 803276c: 4a28 ldr r2, [pc, #160] ; (8032810 ) + 803276e: 4293 cmp r3, r2 + 8032770: d007 beq.n 8032782 + 8032772: 687b ldr r3, [r7, #4] + 8032774: 4a27 ldr r2, [pc, #156] ; (8032814 ) + 8032776: 4293 cmp r3, r2 + 8032778: d003 beq.n 8032782 + 803277a: 687b ldr r3, [r7, #4] + 803277c: 4a26 ldr r2, [pc, #152] ; (8032818 ) + 803277e: 4293 cmp r3, r2 + 8032780: d108 bne.n 8032794 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; - 8032752: 68fb ldr r3, [r7, #12] - 8032754: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8032758: 60fb str r3, [r7, #12] + 8032782: 68fb ldr r3, [r7, #12] + 8032784: f423 7340 bic.w r3, r3, #768 ; 0x300 + 8032788: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; - 803275a: 683b ldr r3, [r7, #0] - 803275c: 68db ldr r3, [r3, #12] - 803275e: 68fa ldr r2, [r7, #12] - 8032760: 4313 orrs r3, r2 - 8032762: 60fb str r3, [r7, #12] + 803278a: 683b ldr r3, [r7, #0] + 803278c: 68db ldr r3, [r3, #12] + 803278e: 68fa ldr r2, [r7, #12] + 8032790: 4313 orrs r3, r2 + 8032792: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8032764: 68fb ldr r3, [r7, #12] - 8032766: f023 0280 bic.w r2, r3, #128 ; 0x80 - 803276a: 683b ldr r3, [r7, #0] - 803276c: 695b ldr r3, [r3, #20] - 803276e: 4313 orrs r3, r2 - 8032770: 60fb str r3, [r7, #12] + 8032794: 68fb ldr r3, [r7, #12] + 8032796: f023 0280 bic.w r2, r3, #128 ; 0x80 + 803279a: 683b ldr r3, [r7, #0] + 803279c: 695b ldr r3, [r3, #20] + 803279e: 4313 orrs r3, r2 + 80327a0: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; - 8032772: 687b ldr r3, [r7, #4] - 8032774: 68fa ldr r2, [r7, #12] - 8032776: 601a str r2, [r3, #0] + 80327a2: 687b ldr r3, [r7, #4] + 80327a4: 68fa ldr r2, [r7, #12] + 80327a6: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; - 8032778: 683b ldr r3, [r7, #0] - 803277a: 689a ldr r2, [r3, #8] - 803277c: 687b ldr r3, [r7, #4] - 803277e: 62da str r2, [r3, #44] ; 0x2c + 80327a8: 683b ldr r3, [r7, #0] + 80327aa: 689a ldr r2, [r3, #8] + 80327ac: 687b ldr r3, [r7, #4] + 80327ae: 62da str r2, [r3, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; - 8032780: 683b ldr r3, [r7, #0] - 8032782: 681a ldr r2, [r3, #0] - 8032784: 687b ldr r3, [r7, #4] - 8032786: 629a str r2, [r3, #40] ; 0x28 + 80327b0: 683b ldr r3, [r7, #0] + 80327b2: 681a ldr r2, [r3, #0] + 80327b4: 687b ldr r3, [r7, #4] + 80327b6: 629a str r2, [r3, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 8032788: 687b ldr r3, [r7, #4] - 803278a: 4a10 ldr r2, [pc, #64] ; (80327cc ) - 803278c: 4293 cmp r3, r2 - 803278e: d00f beq.n 80327b0 - 8032790: 687b ldr r3, [r7, #4] - 8032792: 4a12 ldr r2, [pc, #72] ; (80327dc ) - 8032794: 4293 cmp r3, r2 - 8032796: d00b beq.n 80327b0 - 8032798: 687b ldr r3, [r7, #4] - 803279a: 4a11 ldr r2, [pc, #68] ; (80327e0 ) - 803279c: 4293 cmp r3, r2 - 803279e: d007 beq.n 80327b0 - 80327a0: 687b ldr r3, [r7, #4] - 80327a2: 4a10 ldr r2, [pc, #64] ; (80327e4 ) - 80327a4: 4293 cmp r3, r2 - 80327a6: d003 beq.n 80327b0 - 80327a8: 687b ldr r3, [r7, #4] - 80327aa: 4a0f ldr r2, [pc, #60] ; (80327e8 ) - 80327ac: 4293 cmp r3, r2 - 80327ae: d103 bne.n 80327b8 + 80327b8: 687b ldr r3, [r7, #4] + 80327ba: 4a10 ldr r2, [pc, #64] ; (80327fc ) + 80327bc: 4293 cmp r3, r2 + 80327be: d00f beq.n 80327e0 + 80327c0: 687b ldr r3, [r7, #4] + 80327c2: 4a12 ldr r2, [pc, #72] ; (803280c ) + 80327c4: 4293 cmp r3, r2 + 80327c6: d00b beq.n 80327e0 + 80327c8: 687b ldr r3, [r7, #4] + 80327ca: 4a11 ldr r2, [pc, #68] ; (8032810 ) + 80327cc: 4293 cmp r3, r2 + 80327ce: d007 beq.n 80327e0 + 80327d0: 687b ldr r3, [r7, #4] + 80327d2: 4a10 ldr r2, [pc, #64] ; (8032814 ) + 80327d4: 4293 cmp r3, r2 + 80327d6: d003 beq.n 80327e0 + 80327d8: 687b ldr r3, [r7, #4] + 80327da: 4a0f ldr r2, [pc, #60] ; (8032818 ) + 80327dc: 4293 cmp r3, r2 + 80327de: d103 bne.n 80327e8 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; - 80327b0: 683b ldr r3, [r7, #0] - 80327b2: 691a ldr r2, [r3, #16] - 80327b4: 687b ldr r3, [r7, #4] - 80327b6: 631a str r2, [r3, #48] ; 0x30 + 80327e0: 683b ldr r3, [r7, #0] + 80327e2: 691a ldr r2, [r3, #16] + 80327e4: 687b ldr r3, [r7, #4] + 80327e6: 631a str r2, [r3, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - 80327b8: 687b ldr r3, [r7, #4] - 80327ba: 2201 movs r2, #1 - 80327bc: 615a str r2, [r3, #20] -} - 80327be: bf00 nop - 80327c0: 3714 adds r7, #20 - 80327c2: 46bd mov sp, r7 - 80327c4: f85d 7b04 ldr.w r7, [sp], #4 - 80327c8: 4770 bx lr - 80327ca: bf00 nop - 80327cc: 40010000 .word 0x40010000 - 80327d0: 40000400 .word 0x40000400 - 80327d4: 40000800 .word 0x40000800 - 80327d8: 40000c00 .word 0x40000c00 - 80327dc: 40010400 .word 0x40010400 - 80327e0: 40014000 .word 0x40014000 - 80327e4: 40014400 .word 0x40014400 - 80327e8: 40014800 .word 0x40014800 - -080327ec : + 80327e8: 687b ldr r3, [r7, #4] + 80327ea: 2201 movs r2, #1 + 80327ec: 615a str r2, [r3, #20] +} + 80327ee: bf00 nop + 80327f0: 3714 adds r7, #20 + 80327f2: 46bd mov sp, r7 + 80327f4: f85d 7b04 ldr.w r7, [sp], #4 + 80327f8: 4770 bx lr + 80327fa: bf00 nop + 80327fc: 40010000 .word 0x40010000 + 8032800: 40000400 .word 0x40000400 + 8032804: 40000800 .word 0x40000800 + 8032808: 40000c00 .word 0x40000c00 + 803280c: 40010400 .word 0x40010400 + 8032810: 40014000 .word 0x40014000 + 8032814: 40014400 .word 0x40014400 + 8032818: 40014800 .word 0x40014800 + +0803281c : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 80327ec: b480 push {r7} - 80327ee: b087 sub sp, #28 - 80327f0: af00 add r7, sp, #0 - 80327f2: 60f8 str r0, [r7, #12] - 80327f4: 60b9 str r1, [r7, #8] - 80327f6: 607a str r2, [r7, #4] + 803281c: b480 push {r7} + 803281e: b087 sub sp, #28 + 8032820: af00 add r7, sp, #0 + 8032822: 60f8 str r0, [r7, #12] + 8032824: 60b9 str r1, [r7, #8] + 8032826: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; - 80327f8: 68fb ldr r3, [r7, #12] - 80327fa: 6a1b ldr r3, [r3, #32] - 80327fc: 617b str r3, [r7, #20] + 8032828: 68fb ldr r3, [r7, #12] + 803282a: 6a1b ldr r3, [r3, #32] + 803282c: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; - 80327fe: 68fb ldr r3, [r7, #12] - 8032800: 6a1b ldr r3, [r3, #32] - 8032802: f023 0201 bic.w r2, r3, #1 - 8032806: 68fb ldr r3, [r7, #12] - 8032808: 621a str r2, [r3, #32] + 803282e: 68fb ldr r3, [r7, #12] + 8032830: 6a1b ldr r3, [r3, #32] + 8032832: f023 0201 bic.w r2, r3, #1 + 8032836: 68fb ldr r3, [r7, #12] + 8032838: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 803280a: 68fb ldr r3, [r7, #12] - 803280c: 699b ldr r3, [r3, #24] - 803280e: 613b str r3, [r7, #16] + 803283a: 68fb ldr r3, [r7, #12] + 803283c: 699b ldr r3, [r3, #24] + 803283e: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8032810: 693b ldr r3, [r7, #16] - 8032812: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 8032816: 613b str r3, [r7, #16] + 8032840: 693b ldr r3, [r7, #16] + 8032842: f023 03f0 bic.w r3, r3, #240 ; 0xf0 + 8032846: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); - 8032818: 687b ldr r3, [r7, #4] - 803281a: 011b lsls r3, r3, #4 - 803281c: 693a ldr r2, [r7, #16] - 803281e: 4313 orrs r3, r2 - 8032820: 613b str r3, [r7, #16] + 8032848: 687b ldr r3, [r7, #4] + 803284a: 011b lsls r3, r3, #4 + 803284c: 693a ldr r2, [r7, #16] + 803284e: 4313 orrs r3, r2 + 8032850: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 8032822: 697b ldr r3, [r7, #20] - 8032824: f023 030a bic.w r3, r3, #10 - 8032828: 617b str r3, [r7, #20] + 8032852: 697b ldr r3, [r7, #20] + 8032854: f023 030a bic.w r3, r3, #10 + 8032858: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; - 803282a: 697a ldr r2, [r7, #20] - 803282c: 68bb ldr r3, [r7, #8] - 803282e: 4313 orrs r3, r2 - 8032830: 617b str r3, [r7, #20] + 803285a: 697a ldr r2, [r7, #20] + 803285c: 68bb ldr r3, [r7, #8] + 803285e: 4313 orrs r3, r2 + 8032860: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; - 8032832: 68fb ldr r3, [r7, #12] - 8032834: 693a ldr r2, [r7, #16] - 8032836: 619a str r2, [r3, #24] + 8032862: 68fb ldr r3, [r7, #12] + 8032864: 693a ldr r2, [r7, #16] + 8032866: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 8032838: 68fb ldr r3, [r7, #12] - 803283a: 697a ldr r2, [r7, #20] - 803283c: 621a str r2, [r3, #32] + 8032868: 68fb ldr r3, [r7, #12] + 803286a: 697a ldr r2, [r7, #20] + 803286c: 621a str r2, [r3, #32] } - 803283e: bf00 nop - 8032840: 371c adds r7, #28 - 8032842: 46bd mov sp, r7 - 8032844: f85d 7b04 ldr.w r7, [sp], #4 - 8032848: 4770 bx lr + 803286e: bf00 nop + 8032870: 371c adds r7, #28 + 8032872: 46bd mov sp, r7 + 8032874: f85d 7b04 ldr.w r7, [sp], #4 + 8032878: 4770 bx lr -0803284a : +0803287a : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 803284a: b480 push {r7} - 803284c: b087 sub sp, #28 - 803284e: af00 add r7, sp, #0 - 8032850: 60f8 str r0, [r7, #12] - 8032852: 60b9 str r1, [r7, #8] - 8032854: 607a str r2, [r7, #4] + 803287a: b480 push {r7} + 803287c: b087 sub sp, #28 + 803287e: af00 add r7, sp, #0 + 8032880: 60f8 str r0, [r7, #12] + 8032882: 60b9 str r1, [r7, #8] + 8032884: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; - 8032856: 68fb ldr r3, [r7, #12] - 8032858: 6a1b ldr r3, [r3, #32] - 803285a: f023 0210 bic.w r2, r3, #16 - 803285e: 68fb ldr r3, [r7, #12] - 8032860: 621a str r2, [r3, #32] + 8032886: 68fb ldr r3, [r7, #12] + 8032888: 6a1b ldr r3, [r3, #32] + 803288a: f023 0210 bic.w r2, r3, #16 + 803288e: 68fb ldr r3, [r7, #12] + 8032890: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 8032862: 68fb ldr r3, [r7, #12] - 8032864: 699b ldr r3, [r3, #24] - 8032866: 617b str r3, [r7, #20] + 8032892: 68fb ldr r3, [r7, #12] + 8032894: 699b ldr r3, [r3, #24] + 8032896: 617b str r3, [r7, #20] tmpccer = TIMx->CCER; - 8032868: 68fb ldr r3, [r7, #12] - 803286a: 6a1b ldr r3, [r3, #32] - 803286c: 613b str r3, [r7, #16] + 8032898: 68fb ldr r3, [r7, #12] + 803289a: 6a1b ldr r3, [r3, #32] + 803289c: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; - 803286e: 697b ldr r3, [r7, #20] - 8032870: f423 4370 bic.w r3, r3, #61440 ; 0xf000 - 8032874: 617b str r3, [r7, #20] + 803289e: 697b ldr r3, [r7, #20] + 80328a0: f423 4370 bic.w r3, r3, #61440 ; 0xf000 + 80328a4: 617b str r3, [r7, #20] tmpccmr1 |= (TIM_ICFilter << 12U); - 8032876: 687b ldr r3, [r7, #4] - 8032878: 031b lsls r3, r3, #12 - 803287a: 697a ldr r2, [r7, #20] - 803287c: 4313 orrs r3, r2 - 803287e: 617b str r3, [r7, #20] + 80328a6: 687b ldr r3, [r7, #4] + 80328a8: 031b lsls r3, r3, #12 + 80328aa: 697a ldr r2, [r7, #20] + 80328ac: 4313 orrs r3, r2 + 80328ae: 617b str r3, [r7, #20] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 8032880: 693b ldr r3, [r7, #16] - 8032882: f023 03a0 bic.w r3, r3, #160 ; 0xa0 - 8032886: 613b str r3, [r7, #16] + 80328b0: 693b ldr r3, [r7, #16] + 80328b2: f023 03a0 bic.w r3, r3, #160 ; 0xa0 + 80328b6: 613b str r3, [r7, #16] tmpccer |= (TIM_ICPolarity << 4U); - 8032888: 68bb ldr r3, [r7, #8] - 803288a: 011b lsls r3, r3, #4 - 803288c: 693a ldr r2, [r7, #16] - 803288e: 4313 orrs r3, r2 - 8032890: 613b str r3, [r7, #16] + 80328b8: 68bb ldr r3, [r7, #8] + 80328ba: 011b lsls r3, r3, #4 + 80328bc: 693a ldr r2, [r7, #16] + 80328be: 4313 orrs r3, r2 + 80328c0: 613b str r3, [r7, #16] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; - 8032892: 68fb ldr r3, [r7, #12] - 8032894: 697a ldr r2, [r7, #20] - 8032896: 619a str r2, [r3, #24] + 80328c2: 68fb ldr r3, [r7, #12] + 80328c4: 697a ldr r2, [r7, #20] + 80328c6: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 8032898: 68fb ldr r3, [r7, #12] - 803289a: 693a ldr r2, [r7, #16] - 803289c: 621a str r2, [r3, #32] -} - 803289e: bf00 nop - 80328a0: 371c adds r7, #28 - 80328a2: 46bd mov sp, r7 - 80328a4: f85d 7b04 ldr.w r7, [sp], #4 - 80328a8: 4770 bx lr + 80328c8: 68fb ldr r3, [r7, #12] + 80328ca: 693a ldr r2, [r7, #16] + 80328cc: 621a str r2, [r3, #32] +} + 80328ce: bf00 nop + 80328d0: 371c adds r7, #28 + 80328d2: 46bd mov sp, r7 + 80328d4: f85d 7b04 ldr.w r7, [sp], #4 + 80328d8: 4770 bx lr ... -080328ac : +080328dc : * (*) Value not defined in all devices. * * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { - 80328ac: b480 push {r7} - 80328ae: b085 sub sp, #20 - 80328b0: af00 add r7, sp, #0 - 80328b2: 6078 str r0, [r7, #4] - 80328b4: 6039 str r1, [r7, #0] + 80328dc: b480 push {r7} + 80328de: b085 sub sp, #20 + 80328e0: af00 add r7, sp, #0 + 80328e2: 6078 str r0, [r7, #4] + 80328e4: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; - 80328b6: 687b ldr r3, [r7, #4] - 80328b8: 689b ldr r3, [r3, #8] - 80328ba: 60fb str r3, [r7, #12] + 80328e6: 687b ldr r3, [r7, #4] + 80328e8: 689b ldr r3, [r3, #8] + 80328ea: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; - 80328bc: 68fa ldr r2, [r7, #12] - 80328be: 4b09 ldr r3, [pc, #36] ; (80328e4 ) - 80328c0: 4013 ands r3, r2 - 80328c2: 60fb str r3, [r7, #12] + 80328ec: 68fa ldr r2, [r7, #12] + 80328ee: 4b09 ldr r3, [pc, #36] ; (8032914 ) + 80328f0: 4013 ands r3, r2 + 80328f2: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 80328c4: 683a ldr r2, [r7, #0] - 80328c6: 68fb ldr r3, [r7, #12] - 80328c8: 4313 orrs r3, r2 - 80328ca: f043 0307 orr.w r3, r3, #7 - 80328ce: 60fb str r3, [r7, #12] + 80328f4: 683a ldr r2, [r7, #0] + 80328f6: 68fb ldr r3, [r7, #12] + 80328f8: 4313 orrs r3, r2 + 80328fa: f043 0307 orr.w r3, r3, #7 + 80328fe: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 80328d0: 687b ldr r3, [r7, #4] - 80328d2: 68fa ldr r2, [r7, #12] - 80328d4: 609a str r2, [r3, #8] -} - 80328d6: bf00 nop - 80328d8: 3714 adds r7, #20 - 80328da: 46bd mov sp, r7 - 80328dc: f85d 7b04 ldr.w r7, [sp], #4 - 80328e0: 4770 bx lr - 80328e2: bf00 nop - 80328e4: ffcfff8f .word 0xffcfff8f - -080328e8 : + 8032900: 687b ldr r3, [r7, #4] + 8032902: 68fa ldr r2, [r7, #12] + 8032904: 609a str r2, [r3, #8] +} + 8032906: bf00 nop + 8032908: 3714 adds r7, #20 + 803290a: 46bd mov sp, r7 + 803290c: f85d 7b04 ldr.w r7, [sp], #4 + 8032910: 4770 bx lr + 8032912: bf00 nop + 8032914: ffcfff8f .word 0xffcfff8f + +08032918 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { - 80328e8: b480 push {r7} - 80328ea: b087 sub sp, #28 - 80328ec: af00 add r7, sp, #0 - 80328ee: 60f8 str r0, [r7, #12] - 80328f0: 60b9 str r1, [r7, #8] - 80328f2: 607a str r2, [r7, #4] - 80328f4: 603b str r3, [r7, #0] + 8032918: b480 push {r7} + 803291a: b087 sub sp, #28 + 803291c: af00 add r7, sp, #0 + 803291e: 60f8 str r0, [r7, #12] + 8032920: 60b9 str r1, [r7, #8] + 8032922: 607a str r2, [r7, #4] + 8032924: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; - 80328f6: 68fb ldr r3, [r7, #12] - 80328f8: 689b ldr r3, [r3, #8] - 80328fa: 617b str r3, [r7, #20] + 8032926: 68fb ldr r3, [r7, #12] + 8032928: 689b ldr r3, [r3, #8] + 803292a: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 80328fc: 697b ldr r3, [r7, #20] - 80328fe: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 8032902: 617b str r3, [r7, #20] + 803292c: 697b ldr r3, [r7, #20] + 803292e: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 8032932: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 8032904: 683b ldr r3, [r7, #0] - 8032906: 021a lsls r2, r3, #8 - 8032908: 687b ldr r3, [r7, #4] - 803290a: 431a orrs r2, r3 - 803290c: 68bb ldr r3, [r7, #8] - 803290e: 4313 orrs r3, r2 - 8032910: 697a ldr r2, [r7, #20] - 8032912: 4313 orrs r3, r2 - 8032914: 617b str r3, [r7, #20] + 8032934: 683b ldr r3, [r7, #0] + 8032936: 021a lsls r2, r3, #8 + 8032938: 687b ldr r3, [r7, #4] + 803293a: 431a orrs r2, r3 + 803293c: 68bb ldr r3, [r7, #8] + 803293e: 4313 orrs r3, r2 + 8032940: 697a ldr r2, [r7, #20] + 8032942: 4313 orrs r3, r2 + 8032944: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 8032916: 68fb ldr r3, [r7, #12] - 8032918: 697a ldr r2, [r7, #20] - 803291a: 609a str r2, [r3, #8] + 8032946: 68fb ldr r3, [r7, #12] + 8032948: 697a ldr r2, [r7, #20] + 803294a: 609a str r2, [r3, #8] } - 803291c: bf00 nop - 803291e: 371c adds r7, #28 - 8032920: 46bd mov sp, r7 - 8032922: f85d 7b04 ldr.w r7, [sp], #4 - 8032926: 4770 bx lr + 803294c: bf00 nop + 803294e: 371c adds r7, #28 + 8032950: 46bd mov sp, r7 + 8032952: f85d 7b04 ldr.w r7, [sp], #4 + 8032956: 4770 bx lr -08032928 : +08032958 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig) { - 8032928: b480 push {r7} - 803292a: b085 sub sp, #20 - 803292c: af00 add r7, sp, #0 - 803292e: 6078 str r0, [r7, #4] - 8032930: 6039 str r1, [r7, #0] + 8032958: b480 push {r7} + 803295a: b085 sub sp, #20 + 803295c: af00 add r7, sp, #0 + 803295e: 6078 str r0, [r7, #4] + 8032960: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 8032932: 687b ldr r3, [r7, #4] - 8032934: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8032938: 2b01 cmp r3, #1 - 803293a: d101 bne.n 8032940 - 803293c: 2302 movs r3, #2 - 803293e: e06d b.n 8032a1c - 8032940: 687b ldr r3, [r7, #4] - 8032942: 2201 movs r2, #1 - 8032944: f883 203c strb.w r2, [r3, #60] ; 0x3c + 8032962: 687b ldr r3, [r7, #4] + 8032964: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 8032968: 2b01 cmp r3, #1 + 803296a: d101 bne.n 8032970 + 803296c: 2302 movs r3, #2 + 803296e: e06d b.n 8032a4c + 8032970: 687b ldr r3, [r7, #4] + 8032972: 2201 movs r2, #1 + 8032974: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 8032948: 687b ldr r3, [r7, #4] - 803294a: 2202 movs r2, #2 - 803294c: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8032978: 687b ldr r3, [r7, #4] + 803297a: 2202 movs r2, #2 + 803297c: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 8032950: 687b ldr r3, [r7, #4] - 8032952: 681b ldr r3, [r3, #0] - 8032954: 685b ldr r3, [r3, #4] - 8032956: 60fb str r3, [r7, #12] + 8032980: 687b ldr r3, [r7, #4] + 8032982: 681b ldr r3, [r3, #0] + 8032984: 685b ldr r3, [r3, #4] + 8032986: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 8032958: 687b ldr r3, [r7, #4] - 803295a: 681b ldr r3, [r3, #0] - 803295c: 689b ldr r3, [r3, #8] - 803295e: 60bb str r3, [r7, #8] + 8032988: 687b ldr r3, [r7, #4] + 803298a: 681b ldr r3, [r3, #0] + 803298c: 689b ldr r3, [r3, #8] + 803298e: 60bb str r3, [r7, #8] /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - 8032960: 687b ldr r3, [r7, #4] - 8032962: 681b ldr r3, [r3, #0] - 8032964: 4a30 ldr r2, [pc, #192] ; (8032a28 ) - 8032966: 4293 cmp r3, r2 - 8032968: d004 beq.n 8032974 - 803296a: 687b ldr r3, [r7, #4] - 803296c: 681b ldr r3, [r3, #0] - 803296e: 4a2f ldr r2, [pc, #188] ; (8032a2c ) - 8032970: 4293 cmp r3, r2 - 8032972: d108 bne.n 8032986 + 8032990: 687b ldr r3, [r7, #4] + 8032992: 681b ldr r3, [r3, #0] + 8032994: 4a30 ldr r2, [pc, #192] ; (8032a58 ) + 8032996: 4293 cmp r3, r2 + 8032998: d004 beq.n 80329a4 + 803299a: 687b ldr r3, [r7, #4] + 803299c: 681b ldr r3, [r3, #0] + 803299e: 4a2f ldr r2, [pc, #188] ; (8032a5c ) + 80329a0: 4293 cmp r3, r2 + 80329a2: d108 bne.n 80329b6 { /* Check the parameters */ assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); /* Clear the MMS2 bits */ tmpcr2 &= ~TIM_CR2_MMS2; - 8032974: 68fb ldr r3, [r7, #12] - 8032976: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 - 803297a: 60fb str r3, [r7, #12] + 80329a4: 68fb ldr r3, [r7, #12] + 80329a6: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 + 80329aa: 60fb str r3, [r7, #12] /* Select the TRGO2 source*/ tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - 803297c: 683b ldr r3, [r7, #0] - 803297e: 685b ldr r3, [r3, #4] - 8032980: 68fa ldr r2, [r7, #12] - 8032982: 4313 orrs r3, r2 - 8032984: 60fb str r3, [r7, #12] + 80329ac: 683b ldr r3, [r7, #0] + 80329ae: 685b ldr r3, [r3, #4] + 80329b0: 68fa ldr r2, [r7, #12] + 80329b2: 4313 orrs r3, r2 + 80329b4: 60fb str r3, [r7, #12] } /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 8032986: 68fb ldr r3, [r7, #12] - 8032988: f023 0370 bic.w r3, r3, #112 ; 0x70 - 803298c: 60fb str r3, [r7, #12] + 80329b6: 68fb ldr r3, [r7, #12] + 80329b8: f023 0370 bic.w r3, r3, #112 ; 0x70 + 80329bc: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 803298e: 683b ldr r3, [r7, #0] - 8032990: 681b ldr r3, [r3, #0] - 8032992: 68fa ldr r2, [r7, #12] - 8032994: 4313 orrs r3, r2 - 8032996: 60fb str r3, [r7, #12] + 80329be: 683b ldr r3, [r7, #0] + 80329c0: 681b ldr r3, [r3, #0] + 80329c2: 68fa ldr r2, [r7, #12] + 80329c4: 4313 orrs r3, r2 + 80329c6: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 8032998: 687b ldr r3, [r7, #4] - 803299a: 681b ldr r3, [r3, #0] - 803299c: 68fa ldr r2, [r7, #12] - 803299e: 605a str r2, [r3, #4] - - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 80329a0: 687b ldr r3, [r7, #4] - 80329a2: 681b ldr r3, [r3, #0] - 80329a4: 4a20 ldr r2, [pc, #128] ; (8032a28 ) - 80329a6: 4293 cmp r3, r2 - 80329a8: d022 beq.n 80329f0 - 80329aa: 687b ldr r3, [r7, #4] - 80329ac: 681b ldr r3, [r3, #0] - 80329ae: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 80329b2: d01d beq.n 80329f0 - 80329b4: 687b ldr r3, [r7, #4] - 80329b6: 681b ldr r3, [r3, #0] - 80329b8: 4a1d ldr r2, [pc, #116] ; (8032a30 ) - 80329ba: 4293 cmp r3, r2 - 80329bc: d018 beq.n 80329f0 - 80329be: 687b ldr r3, [r7, #4] - 80329c0: 681b ldr r3, [r3, #0] - 80329c2: 4a1c ldr r2, [pc, #112] ; (8032a34 ) - 80329c4: 4293 cmp r3, r2 - 80329c6: d013 beq.n 80329f0 80329c8: 687b ldr r3, [r7, #4] 80329ca: 681b ldr r3, [r3, #0] - 80329cc: 4a1a ldr r2, [pc, #104] ; (8032a38 ) - 80329ce: 4293 cmp r3, r2 - 80329d0: d00e beq.n 80329f0 - 80329d2: 687b ldr r3, [r7, #4] - 80329d4: 681b ldr r3, [r3, #0] - 80329d6: 4a15 ldr r2, [pc, #84] ; (8032a2c ) - 80329d8: 4293 cmp r3, r2 - 80329da: d009 beq.n 80329f0 - 80329dc: 687b ldr r3, [r7, #4] - 80329de: 681b ldr r3, [r3, #0] - 80329e0: 4a16 ldr r2, [pc, #88] ; (8032a3c ) - 80329e2: 4293 cmp r3, r2 - 80329e4: d004 beq.n 80329f0 - 80329e6: 687b ldr r3, [r7, #4] - 80329e8: 681b ldr r3, [r3, #0] - 80329ea: 4a15 ldr r2, [pc, #84] ; (8032a40 ) - 80329ec: 4293 cmp r3, r2 - 80329ee: d10c bne.n 8032a0a + 80329cc: 68fa ldr r2, [r7, #12] + 80329ce: 605a str r2, [r3, #4] + + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 80329d0: 687b ldr r3, [r7, #4] + 80329d2: 681b ldr r3, [r3, #0] + 80329d4: 4a20 ldr r2, [pc, #128] ; (8032a58 ) + 80329d6: 4293 cmp r3, r2 + 80329d8: d022 beq.n 8032a20 + 80329da: 687b ldr r3, [r7, #4] + 80329dc: 681b ldr r3, [r3, #0] + 80329de: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 80329e2: d01d beq.n 8032a20 + 80329e4: 687b ldr r3, [r7, #4] + 80329e6: 681b ldr r3, [r3, #0] + 80329e8: 4a1d ldr r2, [pc, #116] ; (8032a60 ) + 80329ea: 4293 cmp r3, r2 + 80329ec: d018 beq.n 8032a20 + 80329ee: 687b ldr r3, [r7, #4] + 80329f0: 681b ldr r3, [r3, #0] + 80329f2: 4a1c ldr r2, [pc, #112] ; (8032a64 ) + 80329f4: 4293 cmp r3, r2 + 80329f6: d013 beq.n 8032a20 + 80329f8: 687b ldr r3, [r7, #4] + 80329fa: 681b ldr r3, [r3, #0] + 80329fc: 4a1a ldr r2, [pc, #104] ; (8032a68 ) + 80329fe: 4293 cmp r3, r2 + 8032a00: d00e beq.n 8032a20 + 8032a02: 687b ldr r3, [r7, #4] + 8032a04: 681b ldr r3, [r3, #0] + 8032a06: 4a15 ldr r2, [pc, #84] ; (8032a5c ) + 8032a08: 4293 cmp r3, r2 + 8032a0a: d009 beq.n 8032a20 + 8032a0c: 687b ldr r3, [r7, #4] + 8032a0e: 681b ldr r3, [r3, #0] + 8032a10: 4a16 ldr r2, [pc, #88] ; (8032a6c ) + 8032a12: 4293 cmp r3, r2 + 8032a14: d004 beq.n 8032a20 + 8032a16: 687b ldr r3, [r7, #4] + 8032a18: 681b ldr r3, [r3, #0] + 8032a1a: 4a15 ldr r2, [pc, #84] ; (8032a70 ) + 8032a1c: 4293 cmp r3, r2 + 8032a1e: d10c bne.n 8032a3a { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 80329f0: 68bb ldr r3, [r7, #8] - 80329f2: f023 0380 bic.w r3, r3, #128 ; 0x80 - 80329f6: 60bb str r3, [r7, #8] + 8032a20: 68bb ldr r3, [r7, #8] + 8032a22: f023 0380 bic.w r3, r3, #128 ; 0x80 + 8032a26: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 80329f8: 683b ldr r3, [r7, #0] - 80329fa: 689b ldr r3, [r3, #8] - 80329fc: 68ba ldr r2, [r7, #8] - 80329fe: 4313 orrs r3, r2 - 8032a00: 60bb str r3, [r7, #8] + 8032a28: 683b ldr r3, [r7, #0] + 8032a2a: 689b ldr r3, [r3, #8] + 8032a2c: 68ba ldr r2, [r7, #8] + 8032a2e: 4313 orrs r3, r2 + 8032a30: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 8032a02: 687b ldr r3, [r7, #4] - 8032a04: 681b ldr r3, [r3, #0] - 8032a06: 68ba ldr r2, [r7, #8] - 8032a08: 609a str r2, [r3, #8] + 8032a32: 687b ldr r3, [r7, #4] + 8032a34: 681b ldr r3, [r3, #0] + 8032a36: 68ba ldr r2, [r7, #8] + 8032a38: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 8032a0a: 687b ldr r3, [r7, #4] - 8032a0c: 2201 movs r2, #1 - 8032a0e: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8032a3a: 687b ldr r3, [r7, #4] + 8032a3c: 2201 movs r2, #1 + 8032a3e: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); - 8032a12: 687b ldr r3, [r7, #4] - 8032a14: 2200 movs r2, #0 - 8032a16: f883 203c strb.w r2, [r3, #60] ; 0x3c + 8032a42: 687b ldr r3, [r7, #4] + 8032a44: 2200 movs r2, #0 + 8032a46: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; - 8032a1a: 2300 movs r3, #0 -} - 8032a1c: 4618 mov r0, r3 - 8032a1e: 3714 adds r7, #20 - 8032a20: 46bd mov sp, r7 - 8032a22: f85d 7b04 ldr.w r7, [sp], #4 - 8032a26: 4770 bx lr - 8032a28: 40010000 .word 0x40010000 - 8032a2c: 40010400 .word 0x40010400 - 8032a30: 40000400 .word 0x40000400 - 8032a34: 40000800 .word 0x40000800 - 8032a38: 40000c00 .word 0x40000c00 - 8032a3c: 40001800 .word 0x40001800 - 8032a40: 40014000 .word 0x40014000 - -08032a44 : + 8032a4a: 2300 movs r3, #0 +} + 8032a4c: 4618 mov r0, r3 + 8032a4e: 3714 adds r7, #20 + 8032a50: 46bd mov sp, r7 + 8032a52: f85d 7b04 ldr.w r7, [sp], #4 + 8032a56: 4770 bx lr + 8032a58: 40010000 .word 0x40010000 + 8032a5c: 40010400 .word 0x40010400 + 8032a60: 40000400 .word 0x40000400 + 8032a64: 40000800 .word 0x40000800 + 8032a68: 40000c00 .word 0x40000c00 + 8032a6c: 40001800 .word 0x40001800 + 8032a70: 40014000 .word 0x40014000 + +08032a74 : * @brief Hall commutation changed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { - 8032a44: b480 push {r7} - 8032a46: b083 sub sp, #12 - 8032a48: af00 add r7, sp, #0 - 8032a4a: 6078 str r0, [r7, #4] + 8032a74: b480 push {r7} + 8032a76: b083 sub sp, #12 + 8032a78: af00 add r7, sp, #0 + 8032a7a: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } - 8032a4c: bf00 nop - 8032a4e: 370c adds r7, #12 - 8032a50: 46bd mov sp, r7 - 8032a52: f85d 7b04 ldr.w r7, [sp], #4 - 8032a56: 4770 bx lr + 8032a7c: bf00 nop + 8032a7e: 370c adds r7, #12 + 8032a80: 46bd mov sp, r7 + 8032a82: f85d 7b04 ldr.w r7, [sp], #4 + 8032a86: 4770 bx lr -08032a58 : +08032a88 : * @brief Hall Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { - 8032a58: b480 push {r7} - 8032a5a: b083 sub sp, #12 - 8032a5c: af00 add r7, sp, #0 - 8032a5e: 6078 str r0, [r7, #4] + 8032a88: b480 push {r7} + 8032a8a: b083 sub sp, #12 + 8032a8c: af00 add r7, sp, #0 + 8032a8e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } - 8032a60: bf00 nop - 8032a62: 370c adds r7, #12 - 8032a64: 46bd mov sp, r7 - 8032a66: f85d 7b04 ldr.w r7, [sp], #4 - 8032a6a: 4770 bx lr + 8032a90: bf00 nop + 8032a92: 370c adds r7, #12 + 8032a94: 46bd mov sp, r7 + 8032a96: f85d 7b04 ldr.w r7, [sp], #4 + 8032a9a: 4770 bx lr -08032a6c : +08032a9c : * @brief Hall Break2 detection callback in non blocking mode * @param htim: TIM handle * @retval None */ __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) { - 8032a6c: b480 push {r7} - 8032a6e: b083 sub sp, #12 - 8032a70: af00 add r7, sp, #0 - 8032a72: 6078 str r0, [r7, #4] + 8032a9c: b480 push {r7} + 8032a9e: b083 sub sp, #12 + 8032aa0: af00 add r7, sp, #0 + 8032aa2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_TIMEx_Break2Callback could be implemented in the user file */ } - 8032a74: bf00 nop - 8032a76: 370c adds r7, #12 - 8032a78: 46bd mov sp, r7 - 8032a7a: f85d 7b04 ldr.w r7, [sp], #4 - 8032a7e: 4770 bx lr + 8032aa4: bf00 nop + 8032aa6: 370c adds r7, #12 + 8032aa8: 46bd mov sp, r7 + 8032aaa: f85d 7b04 ldr.w r7, [sp], #4 + 8032aae: 4770 bx lr -08032a80 : +08032ab0 : * parameters in the UART_InitTypeDef and initialize the associated handle. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8032a80: b580 push {r7, lr} - 8032a82: b082 sub sp, #8 - 8032a84: af00 add r7, sp, #0 - 8032a86: 6078 str r0, [r7, #4] + 8032ab0: b580 push {r7, lr} + 8032ab2: b082 sub sp, #8 + 8032ab4: af00 add r7, sp, #0 + 8032ab6: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8032a88: 687b ldr r3, [r7, #4] - 8032a8a: 2b00 cmp r3, #0 - 8032a8c: d101 bne.n 8032a92 + 8032ab8: 687b ldr r3, [r7, #4] + 8032aba: 2b00 cmp r3, #0 + 8032abc: d101 bne.n 8032ac2 { return HAL_ERROR; - 8032a8e: 2301 movs r3, #1 - 8032a90: e042 b.n 8032b18 + 8032abe: 2301 movs r3, #1 + 8032ac0: e042 b.n 8032b48 { /* Check the parameters */ assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); } if (huart->gState == HAL_UART_STATE_RESET) - 8032a92: 687b ldr r3, [r7, #4] - 8032a94: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8032a98: 2b00 cmp r3, #0 - 8032a9a: d106 bne.n 8032aaa + 8032ac2: 687b ldr r3, [r7, #4] + 8032ac4: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8032ac8: 2b00 cmp r3, #0 + 8032aca: d106 bne.n 8032ada { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8032a9c: 687b ldr r3, [r7, #4] - 8032a9e: 2200 movs r2, #0 - 8032aa0: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032acc: 687b ldr r3, [r7, #4] + 8032ace: 2200 movs r2, #0 + 8032ad0: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8032aa4: 6878 ldr r0, [r7, #4] - 8032aa6: f7f2 fb47 bl 8025138 + 8032ad4: 6878 ldr r0, [r7, #4] + 8032ad6: f7f2 fb47 bl 8025168 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8032aaa: 687b ldr r3, [r7, #4] - 8032aac: 2224 movs r2, #36 ; 0x24 - 8032aae: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032ada: 687b ldr r3, [r7, #4] + 8032adc: 2224 movs r2, #36 ; 0x24 + 8032ade: f8c3 2084 str.w r2, [r3, #132] ; 0x84 __HAL_UART_DISABLE(huart); - 8032ab2: 687b ldr r3, [r7, #4] - 8032ab4: 681b ldr r3, [r3, #0] - 8032ab6: 681a ldr r2, [r3, #0] - 8032ab8: 687b ldr r3, [r7, #4] - 8032aba: 681b ldr r3, [r3, #0] - 8032abc: f022 0201 bic.w r2, r2, #1 - 8032ac0: 601a str r2, [r3, #0] + 8032ae2: 687b ldr r3, [r7, #4] + 8032ae4: 681b ldr r3, [r3, #0] + 8032ae6: 681a ldr r2, [r3, #0] + 8032ae8: 687b ldr r3, [r7, #4] + 8032aea: 681b ldr r3, [r3, #0] + 8032aec: f022 0201 bic.w r2, r2, #1 + 8032af0: 601a str r2, [r3, #0] /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) - 8032ac2: 6878 ldr r0, [r7, #4] - 8032ac4: f000 fd68 bl 8033598 - 8032ac8: 4603 mov r3, r0 - 8032aca: 2b01 cmp r3, #1 - 8032acc: d101 bne.n 8032ad2 + 8032af2: 6878 ldr r0, [r7, #4] + 8032af4: f000 fd68 bl 80335c8 + 8032af8: 4603 mov r3, r0 + 8032afa: 2b01 cmp r3, #1 + 8032afc: d101 bne.n 8032b02 { return HAL_ERROR; - 8032ace: 2301 movs r3, #1 - 8032ad0: e022 b.n 8032b18 + 8032afe: 2301 movs r3, #1 + 8032b00: e022 b.n 8032b48 } if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 8032ad2: 687b ldr r3, [r7, #4] - 8032ad4: 6a9b ldr r3, [r3, #40] ; 0x28 - 8032ad6: 2b00 cmp r3, #0 - 8032ad8: d002 beq.n 8032ae0 + 8032b02: 687b ldr r3, [r7, #4] + 8032b04: 6a9b ldr r3, [r3, #40] ; 0x28 + 8032b06: 2b00 cmp r3, #0 + 8032b08: d002 beq.n 8032b10 { UART_AdvFeatureConfig(huart); - 8032ada: 6878 ldr r0, [r7, #4] - 8032adc: f001 fac4 bl 8034068 + 8032b0a: 6878 ldr r0, [r7, #4] + 8032b0c: f001 fac4 bl 8034098 } /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8032ae0: 687b ldr r3, [r7, #4] - 8032ae2: 681b ldr r3, [r3, #0] - 8032ae4: 685a ldr r2, [r3, #4] - 8032ae6: 687b ldr r3, [r7, #4] - 8032ae8: 681b ldr r3, [r3, #0] - 8032aea: f422 4290 bic.w r2, r2, #18432 ; 0x4800 - 8032aee: 605a str r2, [r3, #4] + 8032b10: 687b ldr r3, [r7, #4] + 8032b12: 681b ldr r3, [r3, #0] + 8032b14: 685a ldr r2, [r3, #4] + 8032b16: 687b ldr r3, [r7, #4] + 8032b18: 681b ldr r3, [r3, #0] + 8032b1a: f422 4290 bic.w r2, r2, #18432 ; 0x4800 + 8032b1e: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8032af0: 687b ldr r3, [r7, #4] - 8032af2: 681b ldr r3, [r3, #0] - 8032af4: 689a ldr r2, [r3, #8] - 8032af6: 687b ldr r3, [r7, #4] - 8032af8: 681b ldr r3, [r3, #0] - 8032afa: f022 022a bic.w r2, r2, #42 ; 0x2a - 8032afe: 609a str r2, [r3, #8] + 8032b20: 687b ldr r3, [r7, #4] + 8032b22: 681b ldr r3, [r3, #0] + 8032b24: 689a ldr r2, [r3, #8] + 8032b26: 687b ldr r3, [r7, #4] + 8032b28: 681b ldr r3, [r3, #0] + 8032b2a: f022 022a bic.w r2, r2, #42 ; 0x2a + 8032b2e: 609a str r2, [r3, #8] __HAL_UART_ENABLE(huart); - 8032b00: 687b ldr r3, [r7, #4] - 8032b02: 681b ldr r3, [r3, #0] - 8032b04: 681a ldr r2, [r3, #0] - 8032b06: 687b ldr r3, [r7, #4] - 8032b08: 681b ldr r3, [r3, #0] - 8032b0a: f042 0201 orr.w r2, r2, #1 - 8032b0e: 601a str r2, [r3, #0] + 8032b30: 687b ldr r3, [r7, #4] + 8032b32: 681b ldr r3, [r3, #0] + 8032b34: 681a ldr r2, [r3, #0] + 8032b36: 687b ldr r3, [r7, #4] + 8032b38: 681b ldr r3, [r3, #0] + 8032b3a: f042 0201 orr.w r2, r2, #1 + 8032b3e: 601a str r2, [r3, #0] /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ return (UART_CheckIdleState(huart)); - 8032b10: 6878 ldr r0, [r7, #4] - 8032b12: f001 fb4b bl 80341ac - 8032b16: 4603 mov r3, r0 + 8032b40: 6878 ldr r0, [r7, #4] + 8032b42: f001 fb4b bl 80341dc + 8032b46: 4603 mov r3, r0 } - 8032b18: 4618 mov r0, r3 - 8032b1a: 3708 adds r7, #8 - 8032b1c: 46bd mov sp, r7 - 8032b1e: bd80 pop {r7, pc} + 8032b48: 4618 mov r0, r3 + 8032b4a: 3708 adds r7, #8 + 8032b4c: 46bd mov sp, r7 + 8032b4e: bd80 pop {r7, pc} -08032b20 : +08032b50 : * @param Size Amount of data elements (u8 or u16) to be sent. * @param Timeout Timeout duration. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8032b20: b580 push {r7, lr} - 8032b22: b08a sub sp, #40 ; 0x28 - 8032b24: af02 add r7, sp, #8 - 8032b26: 60f8 str r0, [r7, #12] - 8032b28: 60b9 str r1, [r7, #8] - 8032b2a: 603b str r3, [r7, #0] - 8032b2c: 4613 mov r3, r2 - 8032b2e: 80fb strh r3, [r7, #6] + 8032b50: b580 push {r7, lr} + 8032b52: b08a sub sp, #40 ; 0x28 + 8032b54: af02 add r7, sp, #8 + 8032b56: 60f8 str r0, [r7, #12] + 8032b58: 60b9 str r1, [r7, #8] + 8032b5a: 603b str r3, [r7, #0] + 8032b5c: 4613 mov r3, r2 + 8032b5e: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart; /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8032b30: 68fb ldr r3, [r7, #12] - 8032b32: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8032b36: 2b20 cmp r3, #32 - 8032b38: f040 8083 bne.w 8032c42 + 8032b60: 68fb ldr r3, [r7, #12] + 8032b62: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8032b66: 2b20 cmp r3, #32 + 8032b68: f040 8083 bne.w 8032c72 { if ((pData == NULL) || (Size == 0U)) - 8032b3c: 68bb ldr r3, [r7, #8] - 8032b3e: 2b00 cmp r3, #0 - 8032b40: d002 beq.n 8032b48 - 8032b42: 88fb ldrh r3, [r7, #6] - 8032b44: 2b00 cmp r3, #0 - 8032b46: d101 bne.n 8032b4c + 8032b6c: 68bb ldr r3, [r7, #8] + 8032b6e: 2b00 cmp r3, #0 + 8032b70: d002 beq.n 8032b78 + 8032b72: 88fb ldrh r3, [r7, #6] + 8032b74: 2b00 cmp r3, #0 + 8032b76: d101 bne.n 8032b7c { return HAL_ERROR; - 8032b48: 2301 movs r3, #1 - 8032b4a: e07b b.n 8032c44 + 8032b78: 2301 movs r3, #1 + 8032b7a: e07b b.n 8032c74 } __HAL_LOCK(huart); - 8032b4c: 68fb ldr r3, [r7, #12] - 8032b4e: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 8032b52: 2b01 cmp r3, #1 - 8032b54: d101 bne.n 8032b5a - 8032b56: 2302 movs r3, #2 - 8032b58: e074 b.n 8032c44 - 8032b5a: 68fb ldr r3, [r7, #12] - 8032b5c: 2201 movs r2, #1 - 8032b5e: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032b7c: 68fb ldr r3, [r7, #12] + 8032b7e: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 8032b82: 2b01 cmp r3, #1 + 8032b84: d101 bne.n 8032b8a + 8032b86: 2302 movs r3, #2 + 8032b88: e074 b.n 8032c74 + 8032b8a: 68fb ldr r3, [r7, #12] + 8032b8c: 2201 movs r2, #1 + 8032b8e: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8032b62: 68fb ldr r3, [r7, #12] - 8032b64: 2200 movs r2, #0 - 8032b66: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032b92: 68fb ldr r3, [r7, #12] + 8032b94: 2200 movs r2, #0 + 8032b96: f8c3 208c str.w r2, [r3, #140] ; 0x8c huart->gState = HAL_UART_STATE_BUSY_TX; - 8032b6a: 68fb ldr r3, [r7, #12] - 8032b6c: 2221 movs r2, #33 ; 0x21 - 8032b6e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032b9a: 68fb ldr r3, [r7, #12] + 8032b9c: 2221 movs r2, #33 ; 0x21 + 8032b9e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8032b72: f7f3 fa0f bl 8025f94 - 8032b76: 6178 str r0, [r7, #20] + 8032ba2: f7f3 fa0f bl 8025fc4 + 8032ba6: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 8032b78: 68fb ldr r3, [r7, #12] - 8032b7a: 88fa ldrh r2, [r7, #6] - 8032b7c: f8a3 2054 strh.w r2, [r3, #84] ; 0x54 + 8032ba8: 68fb ldr r3, [r7, #12] + 8032baa: 88fa ldrh r2, [r7, #6] + 8032bac: f8a3 2054 strh.w r2, [r3, #84] ; 0x54 huart->TxXferCount = Size; - 8032b80: 68fb ldr r3, [r7, #12] - 8032b82: 88fa ldrh r2, [r7, #6] - 8032b84: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 8032bb0: 68fb ldr r3, [r7, #12] + 8032bb2: 88fa ldrh r2, [r7, #6] + 8032bb4: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8032b88: 68fb ldr r3, [r7, #12] - 8032b8a: 689b ldr r3, [r3, #8] - 8032b8c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8032b90: d108 bne.n 8032ba4 - 8032b92: 68fb ldr r3, [r7, #12] - 8032b94: 691b ldr r3, [r3, #16] - 8032b96: 2b00 cmp r3, #0 - 8032b98: d104 bne.n 8032ba4 + 8032bb8: 68fb ldr r3, [r7, #12] + 8032bba: 689b ldr r3, [r3, #8] + 8032bbc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8032bc0: d108 bne.n 8032bd4 + 8032bc2: 68fb ldr r3, [r7, #12] + 8032bc4: 691b ldr r3, [r3, #16] + 8032bc6: 2b00 cmp r3, #0 + 8032bc8: d104 bne.n 8032bd4 { pdata8bits = NULL; - 8032b9a: 2300 movs r3, #0 - 8032b9c: 61fb str r3, [r7, #28] + 8032bca: 2300 movs r3, #0 + 8032bcc: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 8032b9e: 68bb ldr r3, [r7, #8] - 8032ba0: 61bb str r3, [r7, #24] - 8032ba2: e003 b.n 8032bac + 8032bce: 68bb ldr r3, [r7, #8] + 8032bd0: 61bb str r3, [r7, #24] + 8032bd2: e003 b.n 8032bdc } else { pdata8bits = pData; - 8032ba4: 68bb ldr r3, [r7, #8] - 8032ba6: 61fb str r3, [r7, #28] + 8032bd4: 68bb ldr r3, [r7, #8] + 8032bd6: 61fb str r3, [r7, #28] pdata16bits = NULL; - 8032ba8: 2300 movs r3, #0 - 8032baa: 61bb str r3, [r7, #24] + 8032bd8: 2300 movs r3, #0 + 8032bda: 61bb str r3, [r7, #24] } __HAL_UNLOCK(huart); - 8032bac: 68fb ldr r3, [r7, #12] - 8032bae: 2200 movs r2, #0 - 8032bb0: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032bdc: 68fb ldr r3, [r7, #12] + 8032bde: 2200 movs r2, #0 + 8032be0: f883 2080 strb.w r2, [r3, #128] ; 0x80 while (huart->TxXferCount > 0U) - 8032bb4: e02c b.n 8032c10 + 8032be4: e02c b.n 8032c40 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 8032bb6: 683b ldr r3, [r7, #0] - 8032bb8: 9300 str r3, [sp, #0] - 8032bba: 697b ldr r3, [r7, #20] - 8032bbc: 2200 movs r2, #0 - 8032bbe: 2180 movs r1, #128 ; 0x80 - 8032bc0: 68f8 ldr r0, [r7, #12] - 8032bc2: f001 fb3e bl 8034242 - 8032bc6: 4603 mov r3, r0 - 8032bc8: 2b00 cmp r3, #0 - 8032bca: d001 beq.n 8032bd0 + 8032be6: 683b ldr r3, [r7, #0] + 8032be8: 9300 str r3, [sp, #0] + 8032bea: 697b ldr r3, [r7, #20] + 8032bec: 2200 movs r2, #0 + 8032bee: 2180 movs r1, #128 ; 0x80 + 8032bf0: 68f8 ldr r0, [r7, #12] + 8032bf2: f001 fb3e bl 8034272 + 8032bf6: 4603 mov r3, r0 + 8032bf8: 2b00 cmp r3, #0 + 8032bfa: d001 beq.n 8032c00 { return HAL_TIMEOUT; - 8032bcc: 2303 movs r3, #3 - 8032bce: e039 b.n 8032c44 + 8032bfc: 2303 movs r3, #3 + 8032bfe: e039 b.n 8032c74 } if (pdata8bits == NULL) - 8032bd0: 69fb ldr r3, [r7, #28] - 8032bd2: 2b00 cmp r3, #0 - 8032bd4: d10b bne.n 8032bee + 8032c00: 69fb ldr r3, [r7, #28] + 8032c02: 2b00 cmp r3, #0 + 8032c04: d10b bne.n 8032c1e { huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); - 8032bd6: 69bb ldr r3, [r7, #24] - 8032bd8: 881b ldrh r3, [r3, #0] - 8032bda: 461a mov r2, r3 - 8032bdc: 68fb ldr r3, [r7, #12] - 8032bde: 681b ldr r3, [r3, #0] - 8032be0: f3c2 0208 ubfx r2, r2, #0, #9 - 8032be4: 629a str r2, [r3, #40] ; 0x28 + 8032c06: 69bb ldr r3, [r7, #24] + 8032c08: 881b ldrh r3, [r3, #0] + 8032c0a: 461a mov r2, r3 + 8032c0c: 68fb ldr r3, [r7, #12] + 8032c0e: 681b ldr r3, [r3, #0] + 8032c10: f3c2 0208 ubfx r2, r2, #0, #9 + 8032c14: 629a str r2, [r3, #40] ; 0x28 pdata16bits++; - 8032be6: 69bb ldr r3, [r7, #24] - 8032be8: 3302 adds r3, #2 - 8032bea: 61bb str r3, [r7, #24] - 8032bec: e007 b.n 8032bfe + 8032c16: 69bb ldr r3, [r7, #24] + 8032c18: 3302 adds r3, #2 + 8032c1a: 61bb str r3, [r7, #24] + 8032c1c: e007 b.n 8032c2e } else { huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); - 8032bee: 69fb ldr r3, [r7, #28] - 8032bf0: 781a ldrb r2, [r3, #0] - 8032bf2: 68fb ldr r3, [r7, #12] - 8032bf4: 681b ldr r3, [r3, #0] - 8032bf6: 629a str r2, [r3, #40] ; 0x28 + 8032c1e: 69fb ldr r3, [r7, #28] + 8032c20: 781a ldrb r2, [r3, #0] + 8032c22: 68fb ldr r3, [r7, #12] + 8032c24: 681b ldr r3, [r3, #0] + 8032c26: 629a str r2, [r3, #40] ; 0x28 pdata8bits++; - 8032bf8: 69fb ldr r3, [r7, #28] - 8032bfa: 3301 adds r3, #1 - 8032bfc: 61fb str r3, [r7, #28] + 8032c28: 69fb ldr r3, [r7, #28] + 8032c2a: 3301 adds r3, #1 + 8032c2c: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 8032bfe: 68fb ldr r3, [r7, #12] - 8032c00: f8b3 3056 ldrh.w r3, [r3, #86] ; 0x56 - 8032c04: b29b uxth r3, r3 - 8032c06: 3b01 subs r3, #1 - 8032c08: b29a uxth r2, r3 - 8032c0a: 68fb ldr r3, [r7, #12] - 8032c0c: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 8032c2e: 68fb ldr r3, [r7, #12] + 8032c30: f8b3 3056 ldrh.w r3, [r3, #86] ; 0x56 + 8032c34: b29b uxth r3, r3 + 8032c36: 3b01 subs r3, #1 + 8032c38: b29a uxth r2, r3 + 8032c3a: 68fb ldr r3, [r7, #12] + 8032c3c: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 while (huart->TxXferCount > 0U) - 8032c10: 68fb ldr r3, [r7, #12] - 8032c12: f8b3 3056 ldrh.w r3, [r3, #86] ; 0x56 - 8032c16: b29b uxth r3, r3 - 8032c18: 2b00 cmp r3, #0 - 8032c1a: d1cc bne.n 8032bb6 + 8032c40: 68fb ldr r3, [r7, #12] + 8032c42: f8b3 3056 ldrh.w r3, [r3, #86] ; 0x56 + 8032c46: b29b uxth r3, r3 + 8032c48: 2b00 cmp r3, #0 + 8032c4a: d1cc bne.n 8032be6 } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 8032c1c: 683b ldr r3, [r7, #0] - 8032c1e: 9300 str r3, [sp, #0] - 8032c20: 697b ldr r3, [r7, #20] - 8032c22: 2200 movs r2, #0 - 8032c24: 2140 movs r1, #64 ; 0x40 - 8032c26: 68f8 ldr r0, [r7, #12] - 8032c28: f001 fb0b bl 8034242 - 8032c2c: 4603 mov r3, r0 - 8032c2e: 2b00 cmp r3, #0 - 8032c30: d001 beq.n 8032c36 + 8032c4c: 683b ldr r3, [r7, #0] + 8032c4e: 9300 str r3, [sp, #0] + 8032c50: 697b ldr r3, [r7, #20] + 8032c52: 2200 movs r2, #0 + 8032c54: 2140 movs r1, #64 ; 0x40 + 8032c56: 68f8 ldr r0, [r7, #12] + 8032c58: f001 fb0b bl 8034272 + 8032c5c: 4603 mov r3, r0 + 8032c5e: 2b00 cmp r3, #0 + 8032c60: d001 beq.n 8032c66 { return HAL_TIMEOUT; - 8032c32: 2303 movs r3, #3 - 8032c34: e006 b.n 8032c44 + 8032c62: 2303 movs r3, #3 + 8032c64: e006 b.n 8032c74 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8032c36: 68fb ldr r3, [r7, #12] - 8032c38: 2220 movs r2, #32 - 8032c3a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032c66: 68fb ldr r3, [r7, #12] + 8032c68: 2220 movs r2, #32 + 8032c6a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 return HAL_OK; - 8032c3e: 2300 movs r3, #0 - 8032c40: e000 b.n 8032c44 + 8032c6e: 2300 movs r3, #0 + 8032c70: e000 b.n 8032c74 } else { return HAL_BUSY; - 8032c42: 2302 movs r3, #2 + 8032c72: 2302 movs r3, #2 } } - 8032c44: 4618 mov r0, r3 - 8032c46: 3720 adds r7, #32 - 8032c48: 46bd mov sp, r7 - 8032c4a: bd80 pop {r7, pc} + 8032c74: 4618 mov r0, r3 + 8032c76: 3720 adds r7, #32 + 8032c78: 46bd mov sp, r7 + 8032c7a: bd80 pop {r7, pc} -08032c4c : +08032c7c : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - 8032c4c: b580 push {r7, lr} - 8032c4e: b08a sub sp, #40 ; 0x28 - 8032c50: af00 add r7, sp, #0 - 8032c52: 60f8 str r0, [r7, #12] - 8032c54: 60b9 str r1, [r7, #8] - 8032c56: 4613 mov r3, r2 - 8032c58: 80fb strh r3, [r7, #6] + 8032c7c: b580 push {r7, lr} + 8032c7e: b08a sub sp, #40 ; 0x28 + 8032c80: af00 add r7, sp, #0 + 8032c82: 60f8 str r0, [r7, #12] + 8032c84: 60b9 str r1, [r7, #8] + 8032c86: 4613 mov r3, r2 + 8032c88: 80fb strh r3, [r7, #6] /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) - 8032c5a: 68fb ldr r3, [r7, #12] - 8032c5c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8032c60: 2b20 cmp r3, #32 - 8032c62: d142 bne.n 8032cea + 8032c8a: 68fb ldr r3, [r7, #12] + 8032c8c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8032c90: 2b20 cmp r3, #32 + 8032c92: d142 bne.n 8032d1a { if ((pData == NULL) || (Size == 0U)) - 8032c64: 68bb ldr r3, [r7, #8] - 8032c66: 2b00 cmp r3, #0 - 8032c68: d002 beq.n 8032c70 - 8032c6a: 88fb ldrh r3, [r7, #6] - 8032c6c: 2b00 cmp r3, #0 - 8032c6e: d101 bne.n 8032c74 + 8032c94: 68bb ldr r3, [r7, #8] + 8032c96: 2b00 cmp r3, #0 + 8032c98: d002 beq.n 8032ca0 + 8032c9a: 88fb ldrh r3, [r7, #6] + 8032c9c: 2b00 cmp r3, #0 + 8032c9e: d101 bne.n 8032ca4 { return HAL_ERROR; - 8032c70: 2301 movs r3, #1 - 8032c72: e03b b.n 8032cec + 8032ca0: 2301 movs r3, #1 + 8032ca2: e03b b.n 8032d1c } __HAL_LOCK(huart); - 8032c74: 68fb ldr r3, [r7, #12] - 8032c76: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 8032c7a: 2b01 cmp r3, #1 - 8032c7c: d101 bne.n 8032c82 - 8032c7e: 2302 movs r3, #2 - 8032c80: e034 b.n 8032cec - 8032c82: 68fb ldr r3, [r7, #12] - 8032c84: 2201 movs r2, #1 - 8032c86: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032ca4: 68fb ldr r3, [r7, #12] + 8032ca6: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 8032caa: 2b01 cmp r3, #1 + 8032cac: d101 bne.n 8032cb2 + 8032cae: 2302 movs r3, #2 + 8032cb0: e034 b.n 8032d1c + 8032cb2: 68fb ldr r3, [r7, #12] + 8032cb4: 2201 movs r2, #1 + 8032cb6: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Set Reception type to Standard reception */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8032c8a: 68fb ldr r3, [r7, #12] - 8032c8c: 2200 movs r2, #0 - 8032c8e: 66da str r2, [r3, #108] ; 0x6c + 8032cba: 68fb ldr r3, [r7, #12] + 8032cbc: 2200 movs r2, #0 + 8032cbe: 66da str r2, [r3, #108] ; 0x6c if (!(IS_LPUART_INSTANCE(huart->Instance))) - 8032c90: 68fb ldr r3, [r7, #12] - 8032c92: 681b ldr r3, [r3, #0] - 8032c94: 4a17 ldr r2, [pc, #92] ; (8032cf4 ) - 8032c96: 4293 cmp r3, r2 - 8032c98: d01f beq.n 8032cda + 8032cc0: 68fb ldr r3, [r7, #12] + 8032cc2: 681b ldr r3, [r3, #0] + 8032cc4: 4a17 ldr r2, [pc, #92] ; (8032d24 ) + 8032cc6: 4293 cmp r3, r2 + 8032cc8: d01f beq.n 8032d0a { /* Check that USART RTOEN bit is set */ if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) - 8032c9a: 68fb ldr r3, [r7, #12] - 8032c9c: 681b ldr r3, [r3, #0] - 8032c9e: 685b ldr r3, [r3, #4] - 8032ca0: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 8032ca4: 2b00 cmp r3, #0 - 8032ca6: d018 beq.n 8032cda + 8032cca: 68fb ldr r3, [r7, #12] + 8032ccc: 681b ldr r3, [r3, #0] + 8032cce: 685b ldr r3, [r3, #4] + 8032cd0: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 8032cd4: 2b00 cmp r3, #0 + 8032cd6: d018 beq.n 8032d0a { /* Enable the UART Receiver Timeout Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); - 8032ca8: 68fb ldr r3, [r7, #12] - 8032caa: 681b ldr r3, [r3, #0] - 8032cac: 617b str r3, [r7, #20] + 8032cd8: 68fb ldr r3, [r7, #12] + 8032cda: 681b ldr r3, [r3, #0] + 8032cdc: 617b str r3, [r7, #20] */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8032cae: 697b ldr r3, [r7, #20] - 8032cb0: e853 3f00 ldrex r3, [r3] - 8032cb4: 613b str r3, [r7, #16] + 8032cde: 697b ldr r3, [r7, #20] + 8032ce0: e853 3f00 ldrex r3, [r3] + 8032ce4: 613b str r3, [r7, #16] return(result); - 8032cb6: 693b ldr r3, [r7, #16] - 8032cb8: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 - 8032cbc: 627b str r3, [r7, #36] ; 0x24 - 8032cbe: 68fb ldr r3, [r7, #12] - 8032cc0: 681b ldr r3, [r3, #0] - 8032cc2: 461a mov r2, r3 - 8032cc4: 6a7b ldr r3, [r7, #36] ; 0x24 - 8032cc6: 623b str r3, [r7, #32] - 8032cc8: 61fa str r2, [r7, #28] + 8032ce6: 693b ldr r3, [r7, #16] + 8032ce8: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 + 8032cec: 627b str r3, [r7, #36] ; 0x24 + 8032cee: 68fb ldr r3, [r7, #12] + 8032cf0: 681b ldr r3, [r3, #0] + 8032cf2: 461a mov r2, r3 + 8032cf4: 6a7b ldr r3, [r7, #36] ; 0x24 + 8032cf6: 623b str r3, [r7, #32] + 8032cf8: 61fa str r2, [r7, #28] */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8032cca: 69f9 ldr r1, [r7, #28] - 8032ccc: 6a3a ldr r2, [r7, #32] - 8032cce: e841 2300 strex r3, r2, [r1] - 8032cd2: 61bb str r3, [r7, #24] + 8032cfa: 69f9 ldr r1, [r7, #28] + 8032cfc: 6a3a ldr r2, [r7, #32] + 8032cfe: e841 2300 strex r3, r2, [r1] + 8032d02: 61bb str r3, [r7, #24] return(result); - 8032cd4: 69bb ldr r3, [r7, #24] - 8032cd6: 2b00 cmp r3, #0 - 8032cd8: d1e6 bne.n 8032ca8 + 8032d04: 69bb ldr r3, [r7, #24] + 8032d06: 2b00 cmp r3, #0 + 8032d08: d1e6 bne.n 8032cd8 } } return (UART_Start_Receive_IT(huart, pData, Size)); - 8032cda: 88fb ldrh r3, [r7, #6] - 8032cdc: 461a mov r2, r3 - 8032cde: 68b9 ldr r1, [r7, #8] - 8032ce0: 68f8 ldr r0, [r7, #12] - 8032ce2: f001 fb77 bl 80343d4 - 8032ce6: 4603 mov r3, r0 - 8032ce8: e000 b.n 8032cec + 8032d0a: 88fb ldrh r3, [r7, #6] + 8032d0c: 461a mov r2, r3 + 8032d0e: 68b9 ldr r1, [r7, #8] + 8032d10: 68f8 ldr r0, [r7, #12] + 8032d12: f001 fb77 bl 8034404 + 8032d16: 4603 mov r3, r0 + 8032d18: e000 b.n 8032d1c } else { return HAL_BUSY; - 8032cea: 2302 movs r3, #2 + 8032d1a: 2302 movs r3, #2 } } - 8032cec: 4618 mov r0, r3 - 8032cee: 3728 adds r7, #40 ; 0x28 - 8032cf0: 46bd mov sp, r7 - 8032cf2: bd80 pop {r7, pc} - 8032cf4: 58000c00 .word 0x58000c00 + 8032d1c: 4618 mov r0, r3 + 8032d1e: 3728 adds r7, #40 ; 0x28 + 8032d20: 46bd mov sp, r7 + 8032d22: bd80 pop {r7, pc} + 8032d24: 58000c00 .word 0x58000c00 -08032cf8 : +08032d28 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { - 8032cf8: b580 push {r7, lr} - 8032cfa: b08a sub sp, #40 ; 0x28 - 8032cfc: af00 add r7, sp, #0 - 8032cfe: 60f8 str r0, [r7, #12] - 8032d00: 60b9 str r1, [r7, #8] - 8032d02: 4613 mov r3, r2 - 8032d04: 80fb strh r3, [r7, #6] + 8032d28: b580 push {r7, lr} + 8032d2a: b08a sub sp, #40 ; 0x28 + 8032d2c: af00 add r7, sp, #0 + 8032d2e: 60f8 str r0, [r7, #12] + 8032d30: 60b9 str r1, [r7, #8] + 8032d32: 4613 mov r3, r2 + 8032d34: 80fb strh r3, [r7, #6] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8032d06: 68fb ldr r3, [r7, #12] - 8032d08: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8032d0c: 2b20 cmp r3, #32 - 8032d0e: d17a bne.n 8032e06 + 8032d36: 68fb ldr r3, [r7, #12] + 8032d38: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8032d3c: 2b20 cmp r3, #32 + 8032d3e: d17a bne.n 8032e36 { if ((pData == NULL) || (Size == 0U)) - 8032d10: 68bb ldr r3, [r7, #8] - 8032d12: 2b00 cmp r3, #0 - 8032d14: d002 beq.n 8032d1c - 8032d16: 88fb ldrh r3, [r7, #6] - 8032d18: 2b00 cmp r3, #0 - 8032d1a: d101 bne.n 8032d20 + 8032d40: 68bb ldr r3, [r7, #8] + 8032d42: 2b00 cmp r3, #0 + 8032d44: d002 beq.n 8032d4c + 8032d46: 88fb ldrh r3, [r7, #6] + 8032d48: 2b00 cmp r3, #0 + 8032d4a: d101 bne.n 8032d50 { return HAL_ERROR; - 8032d1c: 2301 movs r3, #1 - 8032d1e: e073 b.n 8032e08 + 8032d4c: 2301 movs r3, #1 + 8032d4e: e073 b.n 8032e38 } __HAL_LOCK(huart); - 8032d20: 68fb ldr r3, [r7, #12] - 8032d22: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 8032d26: 2b01 cmp r3, #1 - 8032d28: d101 bne.n 8032d2e - 8032d2a: 2302 movs r3, #2 - 8032d2c: e06c b.n 8032e08 - 8032d2e: 68fb ldr r3, [r7, #12] - 8032d30: 2201 movs r2, #1 - 8032d32: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032d50: 68fb ldr r3, [r7, #12] + 8032d52: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 8032d56: 2b01 cmp r3, #1 + 8032d58: d101 bne.n 8032d5e + 8032d5a: 2302 movs r3, #2 + 8032d5c: e06c b.n 8032e38 + 8032d5e: 68fb ldr r3, [r7, #12] + 8032d60: 2201 movs r2, #1 + 8032d62: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->pTxBuffPtr = pData; - 8032d36: 68fb ldr r3, [r7, #12] - 8032d38: 68ba ldr r2, [r7, #8] - 8032d3a: 651a str r2, [r3, #80] ; 0x50 + 8032d66: 68fb ldr r3, [r7, #12] + 8032d68: 68ba ldr r2, [r7, #8] + 8032d6a: 651a str r2, [r3, #80] ; 0x50 huart->TxXferSize = Size; - 8032d3c: 68fb ldr r3, [r7, #12] - 8032d3e: 88fa ldrh r2, [r7, #6] - 8032d40: f8a3 2054 strh.w r2, [r3, #84] ; 0x54 + 8032d6c: 68fb ldr r3, [r7, #12] + 8032d6e: 88fa ldrh r2, [r7, #6] + 8032d70: f8a3 2054 strh.w r2, [r3, #84] ; 0x54 huart->TxXferCount = Size; - 8032d44: 68fb ldr r3, [r7, #12] - 8032d46: 88fa ldrh r2, [r7, #6] - 8032d48: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 8032d74: 68fb ldr r3, [r7, #12] + 8032d76: 88fa ldrh r2, [r7, #6] + 8032d78: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8032d4c: 68fb ldr r3, [r7, #12] - 8032d4e: 2200 movs r2, #0 - 8032d50: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032d7c: 68fb ldr r3, [r7, #12] + 8032d7e: 2200 movs r2, #0 + 8032d80: f8c3 208c str.w r2, [r3, #140] ; 0x8c huart->gState = HAL_UART_STATE_BUSY_TX; - 8032d54: 68fb ldr r3, [r7, #12] - 8032d56: 2221 movs r2, #33 ; 0x21 - 8032d58: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032d84: 68fb ldr r3, [r7, #12] + 8032d86: 2221 movs r2, #33 ; 0x21 + 8032d88: f8c3 2084 str.w r2, [r3, #132] ; 0x84 if (huart->hdmatx != NULL) - 8032d5c: 68fb ldr r3, [r7, #12] - 8032d5e: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032d60: 2b00 cmp r3, #0 - 8032d62: d02c beq.n 8032dbe + 8032d8c: 68fb ldr r3, [r7, #12] + 8032d8e: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032d90: 2b00 cmp r3, #0 + 8032d92: d02c beq.n 8032dee { /* Set the UART DMA transfer complete callback */ huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; - 8032d64: 68fb ldr r3, [r7, #12] - 8032d66: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032d68: 4a29 ldr r2, [pc, #164] ; (8032e10 ) - 8032d6a: 63da str r2, [r3, #60] ; 0x3c + 8032d94: 68fb ldr r3, [r7, #12] + 8032d96: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032d98: 4a29 ldr r2, [pc, #164] ; (8032e40 ) + 8032d9a: 63da str r2, [r3, #60] ; 0x3c /* Set the UART DMA Half transfer complete callback */ huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; - 8032d6c: 68fb ldr r3, [r7, #12] - 8032d6e: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032d70: 4a28 ldr r2, [pc, #160] ; (8032e14 ) - 8032d72: 641a str r2, [r3, #64] ; 0x40 + 8032d9c: 68fb ldr r3, [r7, #12] + 8032d9e: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032da0: 4a28 ldr r2, [pc, #160] ; (8032e44 ) + 8032da2: 641a str r2, [r3, #64] ; 0x40 /* Set the DMA error callback */ huart->hdmatx->XferErrorCallback = UART_DMAError; - 8032d74: 68fb ldr r3, [r7, #12] - 8032d76: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032d78: 4a27 ldr r2, [pc, #156] ; (8032e18 ) - 8032d7a: 64da str r2, [r3, #76] ; 0x4c + 8032da4: 68fb ldr r3, [r7, #12] + 8032da6: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032da8: 4a27 ldr r2, [pc, #156] ; (8032e48 ) + 8032daa: 64da str r2, [r3, #76] ; 0x4c /* Set the DMA abort callback */ huart->hdmatx->XferAbortCallback = NULL; - 8032d7c: 68fb ldr r3, [r7, #12] - 8032d7e: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032d80: 2200 movs r2, #0 - 8032d82: 651a str r2, [r3, #80] ; 0x50 + 8032dac: 68fb ldr r3, [r7, #12] + 8032dae: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032db0: 2200 movs r2, #0 + 8032db2: 651a str r2, [r3, #80] ; 0x50 /* Enable the UART transmit DMA channel */ if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK) - 8032d84: 68fb ldr r3, [r7, #12] - 8032d86: 6f98 ldr r0, [r3, #120] ; 0x78 - 8032d88: 68fb ldr r3, [r7, #12] - 8032d8a: 6d1b ldr r3, [r3, #80] ; 0x50 - 8032d8c: 4619 mov r1, r3 - 8032d8e: 68fb ldr r3, [r7, #12] - 8032d90: 681b ldr r3, [r3, #0] - 8032d92: 3328 adds r3, #40 ; 0x28 - 8032d94: 461a mov r2, r3 - 8032d96: 88fb ldrh r3, [r7, #6] - 8032d98: f7f5 fa08 bl 80281ac - 8032d9c: 4603 mov r3, r0 - 8032d9e: 2b00 cmp r3, #0 - 8032da0: d00d beq.n 8032dbe + 8032db4: 68fb ldr r3, [r7, #12] + 8032db6: 6f98 ldr r0, [r3, #120] ; 0x78 + 8032db8: 68fb ldr r3, [r7, #12] + 8032dba: 6d1b ldr r3, [r3, #80] ; 0x50 + 8032dbc: 4619 mov r1, r3 + 8032dbe: 68fb ldr r3, [r7, #12] + 8032dc0: 681b ldr r3, [r3, #0] + 8032dc2: 3328 adds r3, #40 ; 0x28 + 8032dc4: 461a mov r2, r3 + 8032dc6: 88fb ldrh r3, [r7, #6] + 8032dc8: f7f5 fa08 bl 80281dc + 8032dcc: 4603 mov r3, r0 + 8032dce: 2b00 cmp r3, #0 + 8032dd0: d00d beq.n 8032dee { /* Set error code to DMA */ huart->ErrorCode = HAL_UART_ERROR_DMA; - 8032da2: 68fb ldr r3, [r7, #12] - 8032da4: 2210 movs r2, #16 - 8032da6: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032dd2: 68fb ldr r3, [r7, #12] + 8032dd4: 2210 movs r2, #16 + 8032dd6: f8c3 208c str.w r2, [r3, #140] ; 0x8c __HAL_UNLOCK(huart); - 8032daa: 68fb ldr r3, [r7, #12] - 8032dac: 2200 movs r2, #0 - 8032dae: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032dda: 68fb ldr r3, [r7, #12] + 8032ddc: 2200 movs r2, #0 + 8032dde: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Restore huart->gState to ready */ huart->gState = HAL_UART_STATE_READY; - 8032db2: 68fb ldr r3, [r7, #12] - 8032db4: 2220 movs r2, #32 - 8032db6: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032de2: 68fb ldr r3, [r7, #12] + 8032de4: 2220 movs r2, #32 + 8032de6: f8c3 2084 str.w r2, [r3, #132] ; 0x84 return HAL_ERROR; - 8032dba: 2301 movs r3, #1 - 8032dbc: e024 b.n 8032e08 + 8032dea: 2301 movs r3, #1 + 8032dec: e024 b.n 8032e38 } } /* Clear the TC flag in the ICR register */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); - 8032dbe: 68fb ldr r3, [r7, #12] - 8032dc0: 681b ldr r3, [r3, #0] - 8032dc2: 2240 movs r2, #64 ; 0x40 - 8032dc4: 621a str r2, [r3, #32] + 8032dee: 68fb ldr r3, [r7, #12] + 8032df0: 681b ldr r3, [r3, #0] + 8032df2: 2240 movs r2, #64 ; 0x40 + 8032df4: 621a str r2, [r3, #32] __HAL_UNLOCK(huart); - 8032dc6: 68fb ldr r3, [r7, #12] - 8032dc8: 2200 movs r2, #0 - 8032dca: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032df6: 68fb ldr r3, [r7, #12] + 8032df8: 2200 movs r2, #0 + 8032dfa: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Enable the DMA transfer for transmit request by setting the DMAT bit in the UART CR3 register */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - 8032dce: 68fb ldr r3, [r7, #12] - 8032dd0: 681b ldr r3, [r3, #0] - 8032dd2: 3308 adds r3, #8 - 8032dd4: 617b str r3, [r7, #20] + 8032dfe: 68fb ldr r3, [r7, #12] + 8032e00: 681b ldr r3, [r3, #0] + 8032e02: 3308 adds r3, #8 + 8032e04: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8032dd6: 697b ldr r3, [r7, #20] - 8032dd8: e853 3f00 ldrex r3, [r3] - 8032ddc: 613b str r3, [r7, #16] + 8032e06: 697b ldr r3, [r7, #20] + 8032e08: e853 3f00 ldrex r3, [r3] + 8032e0c: 613b str r3, [r7, #16] return(result); - 8032dde: 693b ldr r3, [r7, #16] - 8032de0: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8032de4: 627b str r3, [r7, #36] ; 0x24 - 8032de6: 68fb ldr r3, [r7, #12] - 8032de8: 681b ldr r3, [r3, #0] - 8032dea: 3308 adds r3, #8 - 8032dec: 6a7a ldr r2, [r7, #36] ; 0x24 - 8032dee: 623a str r2, [r7, #32] - 8032df0: 61fb str r3, [r7, #28] + 8032e0e: 693b ldr r3, [r7, #16] + 8032e10: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8032e14: 627b str r3, [r7, #36] ; 0x24 + 8032e16: 68fb ldr r3, [r7, #12] + 8032e18: 681b ldr r3, [r3, #0] + 8032e1a: 3308 adds r3, #8 + 8032e1c: 6a7a ldr r2, [r7, #36] ; 0x24 + 8032e1e: 623a str r2, [r7, #32] + 8032e20: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8032df2: 69f9 ldr r1, [r7, #28] - 8032df4: 6a3a ldr r2, [r7, #32] - 8032df6: e841 2300 strex r3, r2, [r1] - 8032dfa: 61bb str r3, [r7, #24] + 8032e22: 69f9 ldr r1, [r7, #28] + 8032e24: 6a3a ldr r2, [r7, #32] + 8032e26: e841 2300 strex r3, r2, [r1] + 8032e2a: 61bb str r3, [r7, #24] return(result); - 8032dfc: 69bb ldr r3, [r7, #24] - 8032dfe: 2b00 cmp r3, #0 - 8032e00: d1e5 bne.n 8032dce + 8032e2c: 69bb ldr r3, [r7, #24] + 8032e2e: 2b00 cmp r3, #0 + 8032e30: d1e5 bne.n 8032dfe return HAL_OK; - 8032e02: 2300 movs r3, #0 - 8032e04: e000 b.n 8032e08 + 8032e32: 2300 movs r3, #0 + 8032e34: e000 b.n 8032e38 } else { return HAL_BUSY; - 8032e06: 2302 movs r3, #2 + 8032e36: 2302 movs r3, #2 } } - 8032e08: 4618 mov r0, r3 - 8032e0a: 3728 adds r7, #40 ; 0x28 - 8032e0c: 46bd mov sp, r7 - 8032e0e: bd80 pop {r7, pc} - 8032e10: 08034779 .word 0x08034779 - 8032e14: 0803480f .word 0x0803480f - 8032e18: 0803482b .word 0x0803482b + 8032e38: 4618 mov r0, r3 + 8032e3a: 3728 adds r7, #40 ; 0x28 + 8032e3c: 46bd mov sp, r7 + 8032e3e: bd80 pop {r7, pc} + 8032e40: 080347a9 .word 0x080347a9 + 8032e44: 0803483f .word 0x0803483f + 8032e48: 0803485b .word 0x0803485b -08032e1c : +08032e4c : * @brief Handle UART interrupt request. * @param huart UART handle. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 8032e1c: b580 push {r7, lr} - 8032e1e: b0ba sub sp, #232 ; 0xe8 - 8032e20: af00 add r7, sp, #0 - 8032e22: 6078 str r0, [r7, #4] + 8032e4c: b580 push {r7, lr} + 8032e4e: b0ba sub sp, #232 ; 0xe8 + 8032e50: af00 add r7, sp, #0 + 8032e52: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->ISR); - 8032e24: 687b ldr r3, [r7, #4] - 8032e26: 681b ldr r3, [r3, #0] - 8032e28: 69db ldr r3, [r3, #28] - 8032e2a: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 8032e54: 687b ldr r3, [r7, #4] + 8032e56: 681b ldr r3, [r3, #0] + 8032e58: 69db ldr r3, [r3, #28] + 8032e5a: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8032e2e: 687b ldr r3, [r7, #4] - 8032e30: 681b ldr r3, [r3, #0] - 8032e32: 681b ldr r3, [r3, #0] - 8032e34: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 8032e5e: 687b ldr r3, [r7, #4] + 8032e60: 681b ldr r3, [r3, #0] + 8032e62: 681b ldr r3, [r3, #0] + 8032e64: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8032e38: 687b ldr r3, [r7, #4] - 8032e3a: 681b ldr r3, [r3, #0] - 8032e3c: 689b ldr r3, [r3, #8] - 8032e3e: f8c7 30dc str.w r3, [r7, #220] ; 0xdc + 8032e68: 687b ldr r3, [r7, #4] + 8032e6a: 681b ldr r3, [r3, #0] + 8032e6c: 689b ldr r3, [r3, #8] + 8032e6e: f8c7 30dc str.w r3, [r7, #220] ; 0xdc uint32_t errorflags; uint32_t errorcode; /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF)); - 8032e42: f8d7 20e4 ldr.w r2, [r7, #228] ; 0xe4 - 8032e46: f640 030f movw r3, #2063 ; 0x80f - 8032e4a: 4013 ands r3, r2 - 8032e4c: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 8032e72: f8d7 20e4 ldr.w r2, [r7, #228] ; 0xe4 + 8032e76: f640 030f movw r3, #2063 ; 0x80f + 8032e7a: 4013 ands r3, r2 + 8032e7c: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 if (errorflags == 0U) - 8032e50: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 - 8032e54: 2b00 cmp r3, #0 - 8032e56: d11b bne.n 8032e90 + 8032e80: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 + 8032e84: 2b00 cmp r3, #0 + 8032e86: d11b bne.n 8032ec0 { /* UART in mode Receiver ---------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) - 8032e58: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032e5c: f003 0320 and.w r3, r3, #32 - 8032e60: 2b00 cmp r3, #0 - 8032e62: d015 beq.n 8032e90 + 8032e88: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8032e8c: f003 0320 and.w r3, r3, #32 + 8032e90: 2b00 cmp r3, #0 + 8032e92: d015 beq.n 8032ec0 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) - 8032e64: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032e68: f003 0320 and.w r3, r3, #32 - 8032e6c: 2b00 cmp r3, #0 - 8032e6e: d105 bne.n 8032e7c + 8032e94: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8032e98: f003 0320 and.w r3, r3, #32 + 8032e9c: 2b00 cmp r3, #0 + 8032e9e: d105 bne.n 8032eac || ((cr3its & USART_CR3_RXFTIE) != 0U))) - 8032e70: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 8032e74: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8032e78: 2b00 cmp r3, #0 - 8032e7a: d009 beq.n 8032e90 + 8032ea0: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 8032ea4: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8032ea8: 2b00 cmp r3, #0 + 8032eaa: d009 beq.n 8032ec0 { if (huart->RxISR != NULL) - 8032e7c: 687b ldr r3, [r7, #4] - 8032e7e: 6f1b ldr r3, [r3, #112] ; 0x70 - 8032e80: 2b00 cmp r3, #0 - 8032e82: f000 835a beq.w 803353a + 8032eac: 687b ldr r3, [r7, #4] + 8032eae: 6f1b ldr r3, [r3, #112] ; 0x70 + 8032eb0: 2b00 cmp r3, #0 + 8032eb2: f000 835a beq.w 803356a { huart->RxISR(huart); - 8032e86: 687b ldr r3, [r7, #4] - 8032e88: 6f1b ldr r3, [r3, #112] ; 0x70 - 8032e8a: 6878 ldr r0, [r7, #4] - 8032e8c: 4798 blx r3 + 8032eb6: 687b ldr r3, [r7, #4] + 8032eb8: 6f1b ldr r3, [r3, #112] ; 0x70 + 8032eba: 6878 ldr r0, [r7, #4] + 8032ebc: 4798 blx r3 } return; - 8032e8e: e354 b.n 803353a + 8032ebe: e354 b.n 803356a } } /* If some errors occur */ if ((errorflags != 0U) - 8032e90: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 - 8032e94: 2b00 cmp r3, #0 - 8032e96: f000 811f beq.w 80330d8 + 8032ec0: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 + 8032ec4: 2b00 cmp r3, #0 + 8032ec6: f000 811f beq.w 8033108 && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U) - 8032e9a: f8d7 20dc ldr.w r2, [r7, #220] ; 0xdc - 8032e9e: 4b8b ldr r3, [pc, #556] ; (80330cc ) - 8032ea0: 4013 ands r3, r2 - 8032ea2: 2b00 cmp r3, #0 - 8032ea4: d106 bne.n 8032eb4 + 8032eca: f8d7 20dc ldr.w r2, [r7, #220] ; 0xdc + 8032ece: 4b8b ldr r3, [pc, #556] ; (80330fc ) + 8032ed0: 4013 ands r3, r2 + 8032ed2: 2b00 cmp r3, #0 + 8032ed4: d106 bne.n 8032ee4 || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))) - 8032ea6: f8d7 20e0 ldr.w r2, [r7, #224] ; 0xe0 - 8032eaa: 4b89 ldr r3, [pc, #548] ; (80330d0 ) - 8032eac: 4013 ands r3, r2 - 8032eae: 2b00 cmp r3, #0 - 8032eb0: f000 8112 beq.w 80330d8 + 8032ed6: f8d7 20e0 ldr.w r2, [r7, #224] ; 0xe0 + 8032eda: 4b89 ldr r3, [pc, #548] ; (8033100 ) + 8032edc: 4013 ands r3, r2 + 8032ede: 2b00 cmp r3, #0 + 8032ee0: f000 8112 beq.w 8033108 { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 8032eb4: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032eb8: f003 0301 and.w r3, r3, #1 - 8032ebc: 2b00 cmp r3, #0 - 8032ebe: d011 beq.n 8032ee4 - 8032ec0: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032ec4: f403 7380 and.w r3, r3, #256 ; 0x100 - 8032ec8: 2b00 cmp r3, #0 - 8032eca: d00b beq.n 8032ee4 - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 8032ecc: 687b ldr r3, [r7, #4] - 8032ece: 681b ldr r3, [r3, #0] - 8032ed0: 2201 movs r2, #1 - 8032ed2: 621a str r2, [r3, #32] - - huart->ErrorCode |= HAL_UART_ERROR_PE; - 8032ed4: 687b ldr r3, [r7, #4] - 8032ed6: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032eda: f043 0201 orr.w r2, r3, #1 - 8032ede: 687b ldr r3, [r7, #4] - 8032ee0: f8c3 208c str.w r2, [r3, #140] ; 0x8c - } - - /* UART frame error interrupt occurred --------------------------------------*/ - if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8032ee4: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032ee8: f003 0302 and.w r3, r3, #2 + 8032ee8: f003 0301 and.w r3, r3, #1 8032eec: 2b00 cmp r3, #0 - 8032eee: d011 beq.n 8032f14 - 8032ef0: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 8032ef4: f003 0301 and.w r3, r3, #1 + 8032eee: d011 beq.n 8032f14 + 8032ef0: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8032ef4: f403 7380 and.w r3, r3, #256 ; 0x100 8032ef8: 2b00 cmp r3, #0 - 8032efa: d00b beq.n 8032f14 + 8032efa: d00b beq.n 8032f14 { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); 8032efc: 687b ldr r3, [r7, #4] 8032efe: 681b ldr r3, [r3, #0] - 8032f00: 2202 movs r2, #2 + 8032f00: 2201 movs r2, #1 8032f02: 621a str r2, [r3, #32] - huart->ErrorCode |= HAL_UART_ERROR_FE; + huart->ErrorCode |= HAL_UART_ERROR_PE; 8032f04: 687b ldr r3, [r7, #4] 8032f06: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032f0a: f043 0204 orr.w r2, r3, #4 + 8032f0a: f043 0201 orr.w r2, r3, #1 8032f0e: 687b ldr r3, [r7, #4] 8032f10: f8c3 208c str.w r2, [r3, #140] ; 0x8c } - /* UART noise error interrupt occurred --------------------------------------*/ - if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + /* UART frame error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8032f14: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032f18: f003 0304 and.w r3, r3, #4 + 8032f18: f003 0302 and.w r3, r3, #2 8032f1c: 2b00 cmp r3, #0 - 8032f1e: d011 beq.n 8032f44 + 8032f1e: d011 beq.n 8032f44 8032f20: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc 8032f24: f003 0301 and.w r3, r3, #1 8032f28: 2b00 cmp r3, #0 - 8032f2a: d00b beq.n 8032f44 + 8032f2a: d00b beq.n 8032f44 { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); 8032f2c: 687b ldr r3, [r7, #4] 8032f2e: 681b ldr r3, [r3, #0] - 8032f30: 2204 movs r2, #4 + 8032f30: 2202 movs r2, #2 8032f32: 621a str r2, [r3, #32] - huart->ErrorCode |= HAL_UART_ERROR_NE; + huart->ErrorCode |= HAL_UART_ERROR_FE; 8032f34: 687b ldr r3, [r7, #4] 8032f36: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032f3a: f043 0202 orr.w r2, r3, #2 + 8032f3a: f043 0204 orr.w r2, r3, #4 8032f3e: 687b ldr r3, [r7, #4] 8032f40: f8c3 208c str.w r2, [r3, #140] ; 0x8c } - /* UART Over-Run interrupt occurred -----------------------------------------*/ - if (((isrflags & USART_ISR_ORE) != 0U) + /* UART noise error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8032f44: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032f48: f003 0308 and.w r3, r3, #8 + 8032f48: f003 0304 and.w r3, r3, #4 8032f4c: 2b00 cmp r3, #0 - 8032f4e: d017 beq.n 8032f80 - && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || - 8032f50: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032f54: f003 0320 and.w r3, r3, #32 + 8032f4e: d011 beq.n 8032f74 + 8032f50: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 8032f54: f003 0301 and.w r3, r3, #1 8032f58: 2b00 cmp r3, #0 - 8032f5a: d105 bne.n 8032f68 + 8032f5a: d00b beq.n 8032f74 + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + 8032f5c: 687b ldr r3, [r7, #4] + 8032f5e: 681b ldr r3, [r3, #0] + 8032f60: 2204 movs r2, #4 + 8032f62: 621a str r2, [r3, #32] + + huart->ErrorCode |= HAL_UART_ERROR_NE; + 8032f64: 687b ldr r3, [r7, #4] + 8032f66: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8032f6a: f043 0202 orr.w r2, r3, #2 + 8032f6e: 687b ldr r3, [r7, #4] + 8032f70: f8c3 208c str.w r2, [r3, #140] ; 0x8c + } + + /* UART Over-Run interrupt occurred -----------------------------------------*/ + if (((isrflags & USART_ISR_ORE) != 0U) + 8032f74: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8032f78: f003 0308 and.w r3, r3, #8 + 8032f7c: 2b00 cmp r3, #0 + 8032f7e: d017 beq.n 8032fb0 + && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || + 8032f80: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8032f84: f003 0320 and.w r3, r3, #32 + 8032f88: 2b00 cmp r3, #0 + 8032f8a: d105 bne.n 8032f98 ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U))) - 8032f5c: f8d7 20dc ldr.w r2, [r7, #220] ; 0xdc - 8032f60: 4b5a ldr r3, [pc, #360] ; (80330cc ) - 8032f62: 4013 ands r3, r2 + 8032f8c: f8d7 20dc ldr.w r2, [r7, #220] ; 0xdc + 8032f90: 4b5a ldr r3, [pc, #360] ; (80330fc ) + 8032f92: 4013 ands r3, r2 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || - 8032f64: 2b00 cmp r3, #0 - 8032f66: d00b beq.n 8032f80 + 8032f94: 2b00 cmp r3, #0 + 8032f96: d00b beq.n 8032fb0 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 8032f68: 687b ldr r3, [r7, #4] - 8032f6a: 681b ldr r3, [r3, #0] - 8032f6c: 2208 movs r2, #8 - 8032f6e: 621a str r2, [r3, #32] + 8032f98: 687b ldr r3, [r7, #4] + 8032f9a: 681b ldr r3, [r3, #0] + 8032f9c: 2208 movs r2, #8 + 8032f9e: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_ORE; - 8032f70: 687b ldr r3, [r7, #4] - 8032f72: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032f76: f043 0208 orr.w r2, r3, #8 - 8032f7a: 687b ldr r3, [r7, #4] - 8032f7c: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032fa0: 687b ldr r3, [r7, #4] + 8032fa2: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8032fa6: f043 0208 orr.w r2, r3, #8 + 8032faa: 687b ldr r3, [r7, #4] + 8032fac: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* UART Receiver Timeout interrupt occurred ---------------------------------*/ if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) - 8032f80: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032f84: f403 6300 and.w r3, r3, #2048 ; 0x800 - 8032f88: 2b00 cmp r3, #0 - 8032f8a: d012 beq.n 8032fb2 - 8032f8c: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032f90: f003 6380 and.w r3, r3, #67108864 ; 0x4000000 - 8032f94: 2b00 cmp r3, #0 - 8032f96: d00c beq.n 8032fb2 + 8032fb0: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8032fb4: f403 6300 and.w r3, r3, #2048 ; 0x800 + 8032fb8: 2b00 cmp r3, #0 + 8032fba: d012 beq.n 8032fe2 + 8032fbc: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8032fc0: f003 6380 and.w r3, r3, #67108864 ; 0x4000000 + 8032fc4: 2b00 cmp r3, #0 + 8032fc6: d00c beq.n 8032fe2 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 8032f98: 687b ldr r3, [r7, #4] - 8032f9a: 681b ldr r3, [r3, #0] - 8032f9c: f44f 6200 mov.w r2, #2048 ; 0x800 - 8032fa0: 621a str r2, [r3, #32] + 8032fc8: 687b ldr r3, [r7, #4] + 8032fca: 681b ldr r3, [r3, #0] + 8032fcc: f44f 6200 mov.w r2, #2048 ; 0x800 + 8032fd0: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_RTO; - 8032fa2: 687b ldr r3, [r7, #4] - 8032fa4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032fa8: f043 0220 orr.w r2, r3, #32 - 8032fac: 687b ldr r3, [r7, #4] - 8032fae: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032fd2: 687b ldr r3, [r7, #4] + 8032fd4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8032fd8: f043 0220 orr.w r2, r3, #32 + 8032fdc: 687b ldr r3, [r7, #4] + 8032fde: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* Call UART Error Call back function if need be ----------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8032fb2: 687b ldr r3, [r7, #4] - 8032fb4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032fb8: 2b00 cmp r3, #0 - 8032fba: f000 82c0 beq.w 803353e + 8032fe2: 687b ldr r3, [r7, #4] + 8032fe4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8032fe8: 2b00 cmp r3, #0 + 8032fea: f000 82c0 beq.w 803356e { /* UART in mode Receiver --------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) - 8032fbe: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032fc2: f003 0320 and.w r3, r3, #32 - 8032fc6: 2b00 cmp r3, #0 - 8032fc8: d013 beq.n 8032ff2 + 8032fee: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8032ff2: f003 0320 and.w r3, r3, #32 + 8032ff6: 2b00 cmp r3, #0 + 8032ff8: d013 beq.n 8033022 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) - 8032fca: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032fce: f003 0320 and.w r3, r3, #32 - 8032fd2: 2b00 cmp r3, #0 - 8032fd4: d105 bne.n 8032fe2 + 8032ffa: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8032ffe: f003 0320 and.w r3, r3, #32 + 8033002: 2b00 cmp r3, #0 + 8033004: d105 bne.n 8033012 || ((cr3its & USART_CR3_RXFTIE) != 0U))) - 8032fd6: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 8032fda: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8032fde: 2b00 cmp r3, #0 - 8032fe0: d007 beq.n 8032ff2 + 8033006: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 803300a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 803300e: 2b00 cmp r3, #0 + 8033010: d007 beq.n 8033022 { if (huart->RxISR != NULL) - 8032fe2: 687b ldr r3, [r7, #4] - 8032fe4: 6f1b ldr r3, [r3, #112] ; 0x70 - 8032fe6: 2b00 cmp r3, #0 - 8032fe8: d003 beq.n 8032ff2 + 8033012: 687b ldr r3, [r7, #4] + 8033014: 6f1b ldr r3, [r3, #112] ; 0x70 + 8033016: 2b00 cmp r3, #0 + 8033018: d003 beq.n 8033022 { huart->RxISR(huart); - 8032fea: 687b ldr r3, [r7, #4] - 8032fec: 6f1b ldr r3, [r3, #112] ; 0x70 - 8032fee: 6878 ldr r0, [r7, #4] - 8032ff0: 4798 blx r3 + 803301a: 687b ldr r3, [r7, #4] + 803301c: 6f1b ldr r3, [r3, #112] ; 0x70 + 803301e: 6878 ldr r0, [r7, #4] + 8033020: 4798 blx r3 /* If Error is to be considered as blocking : - Receiver Timeout error in Reception - Overrun error in Reception - any error occurs in DMA mode reception */ errorcode = huart->ErrorCode; - 8032ff2: 687b ldr r3, [r7, #4] - 8032ff4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032ff8: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 + 8033022: 687b ldr r3, [r7, #4] + 8033024: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8033028: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8032ffc: 687b ldr r3, [r7, #4] - 8032ffe: 681b ldr r3, [r3, #0] - 8033000: 689b ldr r3, [r3, #8] - 8033002: f003 0340 and.w r3, r3, #64 ; 0x40 - 8033006: 2b40 cmp r3, #64 ; 0x40 - 8033008: d005 beq.n 8033016 + 803302c: 687b ldr r3, [r7, #4] + 803302e: 681b ldr r3, [r3, #0] + 8033030: 689b ldr r3, [r3, #8] + 8033032: f003 0340 and.w r3, r3, #64 ; 0x40 + 8033036: 2b40 cmp r3, #64 ; 0x40 + 8033038: d005 beq.n 8033046 ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) - 803300a: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4 - 803300e: f003 0328 and.w r3, r3, #40 ; 0x28 + 803303a: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4 + 803303e: f003 0328 and.w r3, r3, #40 ; 0x28 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8033012: 2b00 cmp r3, #0 - 8033014: d04f beq.n 80330b6 + 8033042: 2b00 cmp r3, #0 + 8033044: d04f beq.n 80330e6 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 8033016: 6878 ldr r0, [r7, #4] - 8033018: f001 fb48 bl 80346ac + 8033046: 6878 ldr r0, [r7, #4] + 8033048: f001 fb48 bl 80346dc /* Abort the UART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 803301c: 687b ldr r3, [r7, #4] - 803301e: 681b ldr r3, [r3, #0] - 8033020: 689b ldr r3, [r3, #8] - 8033022: f003 0340 and.w r3, r3, #64 ; 0x40 - 8033026: 2b40 cmp r3, #64 ; 0x40 - 8033028: d141 bne.n 80330ae + 803304c: 687b ldr r3, [r7, #4] + 803304e: 681b ldr r3, [r3, #0] + 8033050: 689b ldr r3, [r3, #8] + 8033052: f003 0340 and.w r3, r3, #64 ; 0x40 + 8033056: 2b40 cmp r3, #64 ; 0x40 + 8033058: d141 bne.n 80330de { /* Disable the UART DMA Rx request if enabled */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 803302a: 687b ldr r3, [r7, #4] - 803302c: 681b ldr r3, [r3, #0] - 803302e: 3308 adds r3, #8 - 8033030: f8c7 309c str.w r3, [r7, #156] ; 0x9c + 803305a: 687b ldr r3, [r7, #4] + 803305c: 681b ldr r3, [r3, #0] + 803305e: 3308 adds r3, #8 + 8033060: f8c7 309c str.w r3, [r7, #156] ; 0x9c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8033034: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8033038: e853 3f00 ldrex r3, [r3] - 803303c: f8c7 3098 str.w r3, [r7, #152] ; 0x98 + 8033064: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 8033068: e853 3f00 ldrex r3, [r3] + 803306c: f8c7 3098 str.w r3, [r7, #152] ; 0x98 return(result); - 8033040: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98 - 8033044: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8033048: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0 - 803304c: 687b ldr r3, [r7, #4] - 803304e: 681b ldr r3, [r3, #0] - 8033050: 3308 adds r3, #8 - 8033052: f8d7 20d0 ldr.w r2, [r7, #208] ; 0xd0 - 8033056: f8c7 20a8 str.w r2, [r7, #168] ; 0xa8 - 803305a: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 + 8033070: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98 + 8033074: f023 0340 bic.w r3, r3, #64 ; 0x40 + 8033078: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0 + 803307c: 687b ldr r3, [r7, #4] + 803307e: 681b ldr r3, [r3, #0] + 8033080: 3308 adds r3, #8 + 8033082: f8d7 20d0 ldr.w r2, [r7, #208] ; 0xd0 + 8033086: f8c7 20a8 str.w r2, [r7, #168] ; 0xa8 + 803308a: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803305e: f8d7 10a4 ldr.w r1, [r7, #164] ; 0xa4 - 8033062: f8d7 20a8 ldr.w r2, [r7, #168] ; 0xa8 - 8033066: e841 2300 strex r3, r2, [r1] - 803306a: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 + 803308e: f8d7 10a4 ldr.w r1, [r7, #164] ; 0xa4 + 8033092: f8d7 20a8 ldr.w r2, [r7, #168] ; 0xa8 + 8033096: e841 2300 strex r3, r2, [r1] + 803309a: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 return(result); - 803306e: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0 - 8033072: 2b00 cmp r3, #0 - 8033074: d1d9 bne.n 803302a + 803309e: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0 + 80330a2: 2b00 cmp r3, #0 + 80330a4: d1d9 bne.n 803305a /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 8033076: 687b ldr r3, [r7, #4] - 8033078: 6fdb ldr r3, [r3, #124] ; 0x7c - 803307a: 2b00 cmp r3, #0 - 803307c: d013 beq.n 80330a6 + 80330a6: 687b ldr r3, [r7, #4] + 80330a8: 6fdb ldr r3, [r3, #124] ; 0x7c + 80330aa: 2b00 cmp r3, #0 + 80330ac: d013 beq.n 80330d6 { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 803307e: 687b ldr r3, [r7, #4] - 8033080: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033082: 4a14 ldr r2, [pc, #80] ; (80330d4 ) - 8033084: 651a str r2, [r3, #80] ; 0x50 + 80330ae: 687b ldr r3, [r7, #4] + 80330b0: 6fdb ldr r3, [r3, #124] ; 0x7c + 80330b2: 4a14 ldr r2, [pc, #80] ; (8033104 ) + 80330b4: 651a str r2, [r3, #80] ; 0x50 /* Abort DMA RX */ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 8033086: 687b ldr r3, [r7, #4] - 8033088: 6fdb ldr r3, [r3, #124] ; 0x7c - 803308a: 4618 mov r0, r3 - 803308c: f7f5 fe16 bl 8028cbc - 8033090: 4603 mov r3, r0 - 8033092: 2b00 cmp r3, #0 - 8033094: d017 beq.n 80330c6 + 80330b6: 687b ldr r3, [r7, #4] + 80330b8: 6fdb ldr r3, [r3, #124] ; 0x7c + 80330ba: 4618 mov r0, r3 + 80330bc: f7f5 fe16 bl 8028cec + 80330c0: 4603 mov r3, r0 + 80330c2: 2b00 cmp r3, #0 + 80330c4: d017 beq.n 80330f6 { /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 8033096: 687b ldr r3, [r7, #4] - 8033098: 6fdb ldr r3, [r3, #124] ; 0x7c - 803309a: 6d1b ldr r3, [r3, #80] ; 0x50 - 803309c: 687a ldr r2, [r7, #4] - 803309e: 6fd2 ldr r2, [r2, #124] ; 0x7c - 80330a0: 4610 mov r0, r2 - 80330a2: 4798 blx r3 + 80330c6: 687b ldr r3, [r7, #4] + 80330c8: 6fdb ldr r3, [r3, #124] ; 0x7c + 80330ca: 6d1b ldr r3, [r3, #80] ; 0x50 + 80330cc: 687a ldr r2, [r7, #4] + 80330ce: 6fd2 ldr r2, [r2, #124] ; 0x7c + 80330d0: 4610 mov r0, r2 + 80330d2: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80330a4: e00f b.n 80330c6 + 80330d4: e00f b.n 80330f6 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80330a6: 6878 ldr r0, [r7, #4] - 80330a8: f000 fa60 bl 803356c + 80330d6: 6878 ldr r0, [r7, #4] + 80330d8: f000 fa60 bl 803359c if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80330ac: e00b b.n 80330c6 + 80330dc: e00b b.n 80330f6 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80330ae: 6878 ldr r0, [r7, #4] - 80330b0: f000 fa5c bl 803356c + 80330de: 6878 ldr r0, [r7, #4] + 80330e0: f000 fa5c bl 803359c if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80330b4: e007 b.n 80330c6 + 80330e4: e007 b.n 80330f6 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80330b6: 6878 ldr r0, [r7, #4] - 80330b8: f000 fa58 bl 803356c + 80330e6: 6878 ldr r0, [r7, #4] + 80330e8: f000 fa58 bl 803359c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 80330bc: 687b ldr r3, [r7, #4] - 80330be: 2200 movs r2, #0 - 80330c0: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 80330ec: 687b ldr r3, [r7, #4] + 80330ee: 2200 movs r2, #0 + 80330f0: f8c3 208c str.w r2, [r3, #140] ; 0x8c } } return; - 80330c4: e23b b.n 803353e + 80330f4: e23b b.n 803356e if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80330c6: bf00 nop + 80330f6: bf00 nop return; - 80330c8: e239 b.n 803353e - 80330ca: bf00 nop - 80330cc: 10000001 .word 0x10000001 - 80330d0: 04000120 .word 0x04000120 - 80330d4: 080348ab .word 0x080348ab + 80330f8: e239 b.n 803356e + 80330fa: bf00 nop + 80330fc: 10000001 .word 0x10000001 + 8033100: 04000120 .word 0x04000120 + 8033104: 080348db .word 0x080348db } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80330d8: 687b ldr r3, [r7, #4] - 80330da: 6edb ldr r3, [r3, #108] ; 0x6c - 80330dc: 2b01 cmp r3, #1 - 80330de: f040 81ce bne.w 803347e + 8033108: 687b ldr r3, [r7, #4] + 803310a: 6edb ldr r3, [r3, #108] ; 0x6c + 803310c: 2b01 cmp r3, #1 + 803310e: f040 81ce bne.w 80334ae && ((isrflags & USART_ISR_IDLE) != 0U) - 80330e2: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80330e6: f003 0310 and.w r3, r3, #16 - 80330ea: 2b00 cmp r3, #0 - 80330ec: f000 81c7 beq.w 803347e + 8033112: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8033116: f003 0310 and.w r3, r3, #16 + 803311a: 2b00 cmp r3, #0 + 803311c: f000 81c7 beq.w 80334ae && ((cr1its & USART_ISR_IDLE) != 0U)) - 80330f0: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 80330f4: f003 0310 and.w r3, r3, #16 - 80330f8: 2b00 cmp r3, #0 - 80330fa: f000 81c0 beq.w 803347e + 8033120: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8033124: f003 0310 and.w r3, r3, #16 + 8033128: 2b00 cmp r3, #0 + 803312a: f000 81c0 beq.w 80334ae { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 80330fe: 687b ldr r3, [r7, #4] - 8033100: 681b ldr r3, [r3, #0] - 8033102: 2210 movs r2, #16 - 8033104: 621a str r2, [r3, #32] + 803312e: 687b ldr r3, [r7, #4] + 8033130: 681b ldr r3, [r3, #0] + 8033132: 2210 movs r2, #16 + 8033134: 621a str r2, [r3, #32] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8033106: 687b ldr r3, [r7, #4] - 8033108: 681b ldr r3, [r3, #0] - 803310a: 689b ldr r3, [r3, #8] - 803310c: f003 0340 and.w r3, r3, #64 ; 0x40 - 8033110: 2b40 cmp r3, #64 ; 0x40 - 8033112: f040 813b bne.w 803338c + 8033136: 687b ldr r3, [r7, #4] + 8033138: 681b ldr r3, [r3, #0] + 803313a: 689b ldr r3, [r3, #8] + 803313c: f003 0340 and.w r3, r3, #64 ; 0x40 + 8033140: 2b40 cmp r3, #64 ; 0x40 + 8033142: f040 813b bne.w 80333bc { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 8033116: 687b ldr r3, [r7, #4] - 8033118: 6fdb ldr r3, [r3, #124] ; 0x7c - 803311a: 681b ldr r3, [r3, #0] - 803311c: 4a8b ldr r2, [pc, #556] ; (803334c ) - 803311e: 4293 cmp r3, r2 - 8033120: d059 beq.n 80331d6 - 8033122: 687b ldr r3, [r7, #4] - 8033124: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033126: 681b ldr r3, [r3, #0] - 8033128: 4a89 ldr r2, [pc, #548] ; (8033350 ) - 803312a: 4293 cmp r3, r2 - 803312c: d053 beq.n 80331d6 - 803312e: 687b ldr r3, [r7, #4] - 8033130: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033132: 681b ldr r3, [r3, #0] - 8033134: 4a87 ldr r2, [pc, #540] ; (8033354 ) - 8033136: 4293 cmp r3, r2 - 8033138: d04d beq.n 80331d6 - 803313a: 687b ldr r3, [r7, #4] - 803313c: 6fdb ldr r3, [r3, #124] ; 0x7c - 803313e: 681b ldr r3, [r3, #0] - 8033140: 4a85 ldr r2, [pc, #532] ; (8033358 ) - 8033142: 4293 cmp r3, r2 - 8033144: d047 beq.n 80331d6 8033146: 687b ldr r3, [r7, #4] 8033148: 6fdb ldr r3, [r3, #124] ; 0x7c 803314a: 681b ldr r3, [r3, #0] - 803314c: 4a83 ldr r2, [pc, #524] ; (803335c ) + 803314c: 4a8b ldr r2, [pc, #556] ; (803337c ) 803314e: 4293 cmp r3, r2 - 8033150: d041 beq.n 80331d6 + 8033150: d059 beq.n 8033206 8033152: 687b ldr r3, [r7, #4] 8033154: 6fdb ldr r3, [r3, #124] ; 0x7c 8033156: 681b ldr r3, [r3, #0] - 8033158: 4a81 ldr r2, [pc, #516] ; (8033360 ) + 8033158: 4a89 ldr r2, [pc, #548] ; (8033380 ) 803315a: 4293 cmp r3, r2 - 803315c: d03b beq.n 80331d6 + 803315c: d053 beq.n 8033206 803315e: 687b ldr r3, [r7, #4] 8033160: 6fdb ldr r3, [r3, #124] ; 0x7c 8033162: 681b ldr r3, [r3, #0] - 8033164: 4a7f ldr r2, [pc, #508] ; (8033364 ) + 8033164: 4a87 ldr r2, [pc, #540] ; (8033384 ) 8033166: 4293 cmp r3, r2 - 8033168: d035 beq.n 80331d6 + 8033168: d04d beq.n 8033206 803316a: 687b ldr r3, [r7, #4] 803316c: 6fdb ldr r3, [r3, #124] ; 0x7c 803316e: 681b ldr r3, [r3, #0] - 8033170: 4a7d ldr r2, [pc, #500] ; (8033368 ) + 8033170: 4a85 ldr r2, [pc, #532] ; (8033388 ) 8033172: 4293 cmp r3, r2 - 8033174: d02f beq.n 80331d6 + 8033174: d047 beq.n 8033206 8033176: 687b ldr r3, [r7, #4] 8033178: 6fdb ldr r3, [r3, #124] ; 0x7c 803317a: 681b ldr r3, [r3, #0] - 803317c: 4a7b ldr r2, [pc, #492] ; (803336c ) + 803317c: 4a83 ldr r2, [pc, #524] ; (803338c ) 803317e: 4293 cmp r3, r2 - 8033180: d029 beq.n 80331d6 + 8033180: d041 beq.n 8033206 8033182: 687b ldr r3, [r7, #4] 8033184: 6fdb ldr r3, [r3, #124] ; 0x7c 8033186: 681b ldr r3, [r3, #0] - 8033188: 4a79 ldr r2, [pc, #484] ; (8033370 ) + 8033188: 4a81 ldr r2, [pc, #516] ; (8033390 ) 803318a: 4293 cmp r3, r2 - 803318c: d023 beq.n 80331d6 + 803318c: d03b beq.n 8033206 803318e: 687b ldr r3, [r7, #4] 8033190: 6fdb ldr r3, [r3, #124] ; 0x7c 8033192: 681b ldr r3, [r3, #0] - 8033194: 4a77 ldr r2, [pc, #476] ; (8033374 ) + 8033194: 4a7f ldr r2, [pc, #508] ; (8033394 ) 8033196: 4293 cmp r3, r2 - 8033198: d01d beq.n 80331d6 + 8033198: d035 beq.n 8033206 803319a: 687b ldr r3, [r7, #4] 803319c: 6fdb ldr r3, [r3, #124] ; 0x7c 803319e: 681b ldr r3, [r3, #0] - 80331a0: 4a75 ldr r2, [pc, #468] ; (8033378 ) + 80331a0: 4a7d ldr r2, [pc, #500] ; (8033398 ) 80331a2: 4293 cmp r3, r2 - 80331a4: d017 beq.n 80331d6 + 80331a4: d02f beq.n 8033206 80331a6: 687b ldr r3, [r7, #4] 80331a8: 6fdb ldr r3, [r3, #124] ; 0x7c 80331aa: 681b ldr r3, [r3, #0] - 80331ac: 4a73 ldr r2, [pc, #460] ; (803337c ) + 80331ac: 4a7b ldr r2, [pc, #492] ; (803339c ) 80331ae: 4293 cmp r3, r2 - 80331b0: d011 beq.n 80331d6 + 80331b0: d029 beq.n 8033206 80331b2: 687b ldr r3, [r7, #4] 80331b4: 6fdb ldr r3, [r3, #124] ; 0x7c 80331b6: 681b ldr r3, [r3, #0] - 80331b8: 4a71 ldr r2, [pc, #452] ; (8033380 ) + 80331b8: 4a79 ldr r2, [pc, #484] ; (80333a0 ) 80331ba: 4293 cmp r3, r2 - 80331bc: d00b beq.n 80331d6 + 80331bc: d023 beq.n 8033206 80331be: 687b ldr r3, [r7, #4] 80331c0: 6fdb ldr r3, [r3, #124] ; 0x7c 80331c2: 681b ldr r3, [r3, #0] - 80331c4: 4a6f ldr r2, [pc, #444] ; (8033384 ) + 80331c4: 4a77 ldr r2, [pc, #476] ; (80333a4 ) 80331c6: 4293 cmp r3, r2 - 80331c8: d005 beq.n 80331d6 + 80331c8: d01d beq.n 8033206 80331ca: 687b ldr r3, [r7, #4] 80331cc: 6fdb ldr r3, [r3, #124] ; 0x7c 80331ce: 681b ldr r3, [r3, #0] - 80331d0: 4a6d ldr r2, [pc, #436] ; (8033388 ) + 80331d0: 4a75 ldr r2, [pc, #468] ; (80333a8 ) 80331d2: 4293 cmp r3, r2 - 80331d4: d105 bne.n 80331e2 + 80331d4: d017 beq.n 8033206 80331d6: 687b ldr r3, [r7, #4] 80331d8: 6fdb ldr r3, [r3, #124] ; 0x7c 80331da: 681b ldr r3, [r3, #0] - 80331dc: 685b ldr r3, [r3, #4] - 80331de: b29b uxth r3, r3 - 80331e0: e004 b.n 80331ec + 80331dc: 4a73 ldr r2, [pc, #460] ; (80333ac ) + 80331de: 4293 cmp r3, r2 + 80331e0: d011 beq.n 8033206 80331e2: 687b ldr r3, [r7, #4] 80331e4: 6fdb ldr r3, [r3, #124] ; 0x7c 80331e6: 681b ldr r3, [r3, #0] - 80331e8: 685b ldr r3, [r3, #4] - 80331ea: b29b uxth r3, r3 - 80331ec: f8a7 30be strh.w r3, [r7, #190] ; 0xbe + 80331e8: 4a71 ldr r2, [pc, #452] ; (80333b0 ) + 80331ea: 4293 cmp r3, r2 + 80331ec: d00b beq.n 8033206 + 80331ee: 687b ldr r3, [r7, #4] + 80331f0: 6fdb ldr r3, [r3, #124] ; 0x7c + 80331f2: 681b ldr r3, [r3, #0] + 80331f4: 4a6f ldr r2, [pc, #444] ; (80333b4 ) + 80331f6: 4293 cmp r3, r2 + 80331f8: d005 beq.n 8033206 + 80331fa: 687b ldr r3, [r7, #4] + 80331fc: 6fdb ldr r3, [r3, #124] ; 0x7c + 80331fe: 681b ldr r3, [r3, #0] + 8033200: 4a6d ldr r2, [pc, #436] ; (80333b8 ) + 8033202: 4293 cmp r3, r2 + 8033204: d105 bne.n 8033212 + 8033206: 687b ldr r3, [r7, #4] + 8033208: 6fdb ldr r3, [r3, #124] ; 0x7c + 803320a: 681b ldr r3, [r3, #0] + 803320c: 685b ldr r3, [r3, #4] + 803320e: b29b uxth r3, r3 + 8033210: e004 b.n 803321c + 8033212: 687b ldr r3, [r7, #4] + 8033214: 6fdb ldr r3, [r3, #124] ; 0x7c + 8033216: 681b ldr r3, [r3, #0] + 8033218: 685b ldr r3, [r3, #4] + 803321a: b29b uxth r3, r3 + 803321c: f8a7 30be strh.w r3, [r7, #190] ; 0xbe if ((nb_remaining_rx_data > 0U) - 80331f0: f8b7 30be ldrh.w r3, [r7, #190] ; 0xbe - 80331f4: 2b00 cmp r3, #0 - 80331f6: f000 81a4 beq.w 8033542 + 8033220: f8b7 30be ldrh.w r3, [r7, #190] ; 0xbe + 8033224: 2b00 cmp r3, #0 + 8033226: f000 81a4 beq.w 8033572 && (nb_remaining_rx_data < huart->RxXferSize)) - 80331fa: 687b ldr r3, [r7, #4] - 80331fc: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 8033200: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe - 8033204: 429a cmp r2, r3 - 8033206: f080 819c bcs.w 8033542 + 803322a: 687b ldr r3, [r7, #4] + 803322c: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 8033230: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe + 8033234: 429a cmp r2, r3 + 8033236: f080 819c bcs.w 8033572 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; - 803320a: 687b ldr r3, [r7, #4] - 803320c: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe - 8033210: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 803323a: 687b ldr r3, [r7, #4] + 803323c: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe + 8033240: f8a3 205e strh.w r2, [r3, #94] ; 0x5e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - 8033214: 687b ldr r3, [r7, #4] - 8033216: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033218: 69db ldr r3, [r3, #28] - 803321a: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803321e: f000 8086 beq.w 803332e + 8033244: 687b ldr r3, [r7, #4] + 8033246: 6fdb ldr r3, [r3, #124] ; 0x7c + 8033248: 69db ldr r3, [r3, #28] + 803324a: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 803324e: f000 8086 beq.w 803335e { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8033222: 687b ldr r3, [r7, #4] - 8033224: 681b ldr r3, [r3, #0] - 8033226: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 8033252: 687b ldr r3, [r7, #4] + 8033254: 681b ldr r3, [r3, #0] + 8033256: f8c7 3088 str.w r3, [r7, #136] ; 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803322a: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 - 803322e: e853 3f00 ldrex r3, [r3] - 8033232: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 803325a: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 + 803325e: e853 3f00 ldrex r3, [r3] + 8033262: f8c7 3084 str.w r3, [r7, #132] ; 0x84 return(result); - 8033236: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84 - 803323a: f423 7380 bic.w r3, r3, #256 ; 0x100 - 803323e: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 - 8033242: 687b ldr r3, [r7, #4] - 8033244: 681b ldr r3, [r3, #0] - 8033246: 461a mov r2, r3 - 8033248: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8 - 803324c: f8c7 3094 str.w r3, [r7, #148] ; 0x94 - 8033250: f8c7 2090 str.w r2, [r7, #144] ; 0x90 + 8033266: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84 + 803326a: f423 7380 bic.w r3, r3, #256 ; 0x100 + 803326e: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 + 8033272: 687b ldr r3, [r7, #4] + 8033274: 681b ldr r3, [r3, #0] + 8033276: 461a mov r2, r3 + 8033278: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8 + 803327c: f8c7 3094 str.w r3, [r7, #148] ; 0x94 + 8033280: f8c7 2090 str.w r2, [r7, #144] ; 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033254: f8d7 1090 ldr.w r1, [r7, #144] ; 0x90 - 8033258: f8d7 2094 ldr.w r2, [r7, #148] ; 0x94 - 803325c: e841 2300 strex r3, r2, [r1] - 8033260: f8c7 308c str.w r3, [r7, #140] ; 0x8c + 8033284: f8d7 1090 ldr.w r1, [r7, #144] ; 0x90 + 8033288: f8d7 2094 ldr.w r2, [r7, #148] ; 0x94 + 803328c: e841 2300 strex r3, r2, [r1] + 8033290: f8c7 308c str.w r3, [r7, #140] ; 0x8c return(result); - 8033264: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c - 8033268: 2b00 cmp r3, #0 - 803326a: d1da bne.n 8033222 + 8033294: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c + 8033298: 2b00 cmp r3, #0 + 803329a: d1da bne.n 8033252 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 803326c: 687b ldr r3, [r7, #4] - 803326e: 681b ldr r3, [r3, #0] - 8033270: 3308 adds r3, #8 - 8033272: 677b str r3, [r7, #116] ; 0x74 + 803329c: 687b ldr r3, [r7, #4] + 803329e: 681b ldr r3, [r3, #0] + 80332a0: 3308 adds r3, #8 + 80332a2: 677b str r3, [r7, #116] ; 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8033274: 6f7b ldr r3, [r7, #116] ; 0x74 - 8033276: e853 3f00 ldrex r3, [r3] - 803327a: 673b str r3, [r7, #112] ; 0x70 + 80332a4: 6f7b ldr r3, [r7, #116] ; 0x74 + 80332a6: e853 3f00 ldrex r3, [r3] + 80332aa: 673b str r3, [r7, #112] ; 0x70 return(result); - 803327c: 6f3b ldr r3, [r7, #112] ; 0x70 - 803327e: f023 0301 bic.w r3, r3, #1 - 8033282: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4 - 8033286: 687b ldr r3, [r7, #4] - 8033288: 681b ldr r3, [r3, #0] - 803328a: 3308 adds r3, #8 - 803328c: f8d7 20b4 ldr.w r2, [r7, #180] ; 0xb4 - 8033290: f8c7 2080 str.w r2, [r7, #128] ; 0x80 - 8033294: 67fb str r3, [r7, #124] ; 0x7c + 80332ac: 6f3b ldr r3, [r7, #112] ; 0x70 + 80332ae: f023 0301 bic.w r3, r3, #1 + 80332b2: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4 + 80332b6: 687b ldr r3, [r7, #4] + 80332b8: 681b ldr r3, [r3, #0] + 80332ba: 3308 adds r3, #8 + 80332bc: f8d7 20b4 ldr.w r2, [r7, #180] ; 0xb4 + 80332c0: f8c7 2080 str.w r2, [r7, #128] ; 0x80 + 80332c4: 67fb str r3, [r7, #124] ; 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033296: 6ff9 ldr r1, [r7, #124] ; 0x7c - 8033298: f8d7 2080 ldr.w r2, [r7, #128] ; 0x80 - 803329c: e841 2300 strex r3, r2, [r1] - 80332a0: 67bb str r3, [r7, #120] ; 0x78 + 80332c6: 6ff9 ldr r1, [r7, #124] ; 0x7c + 80332c8: f8d7 2080 ldr.w r2, [r7, #128] ; 0x80 + 80332cc: e841 2300 strex r3, r2, [r1] + 80332d0: 67bb str r3, [r7, #120] ; 0x78 return(result); - 80332a2: 6fbb ldr r3, [r7, #120] ; 0x78 - 80332a4: 2b00 cmp r3, #0 - 80332a6: d1e1 bne.n 803326c + 80332d2: 6fbb ldr r3, [r7, #120] ; 0x78 + 80332d4: 2b00 cmp r3, #0 + 80332d6: d1e1 bne.n 803329c /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 80332a8: 687b ldr r3, [r7, #4] - 80332aa: 681b ldr r3, [r3, #0] - 80332ac: 3308 adds r3, #8 - 80332ae: 663b str r3, [r7, #96] ; 0x60 + 80332d8: 687b ldr r3, [r7, #4] + 80332da: 681b ldr r3, [r3, #0] + 80332dc: 3308 adds r3, #8 + 80332de: 663b str r3, [r7, #96] ; 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80332b0: 6e3b ldr r3, [r7, #96] ; 0x60 - 80332b2: e853 3f00 ldrex r3, [r3] - 80332b6: 65fb str r3, [r7, #92] ; 0x5c + 80332e0: 6e3b ldr r3, [r7, #96] ; 0x60 + 80332e2: e853 3f00 ldrex r3, [r3] + 80332e6: 65fb str r3, [r7, #92] ; 0x5c return(result); - 80332b8: 6dfb ldr r3, [r7, #92] ; 0x5c - 80332ba: f023 0340 bic.w r3, r3, #64 ; 0x40 - 80332be: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0 - 80332c2: 687b ldr r3, [r7, #4] - 80332c4: 681b ldr r3, [r3, #0] - 80332c6: 3308 adds r3, #8 - 80332c8: f8d7 20b0 ldr.w r2, [r7, #176] ; 0xb0 - 80332cc: 66fa str r2, [r7, #108] ; 0x6c - 80332ce: 66bb str r3, [r7, #104] ; 0x68 + 80332e8: 6dfb ldr r3, [r7, #92] ; 0x5c + 80332ea: f023 0340 bic.w r3, r3, #64 ; 0x40 + 80332ee: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0 + 80332f2: 687b ldr r3, [r7, #4] + 80332f4: 681b ldr r3, [r3, #0] + 80332f6: 3308 adds r3, #8 + 80332f8: f8d7 20b0 ldr.w r2, [r7, #176] ; 0xb0 + 80332fc: 66fa str r2, [r7, #108] ; 0x6c + 80332fe: 66bb str r3, [r7, #104] ; 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80332d0: 6eb9 ldr r1, [r7, #104] ; 0x68 - 80332d2: 6efa ldr r2, [r7, #108] ; 0x6c - 80332d4: e841 2300 strex r3, r2, [r1] - 80332d8: 667b str r3, [r7, #100] ; 0x64 + 8033300: 6eb9 ldr r1, [r7, #104] ; 0x68 + 8033302: 6efa ldr r2, [r7, #108] ; 0x6c + 8033304: e841 2300 strex r3, r2, [r1] + 8033308: 667b str r3, [r7, #100] ; 0x64 return(result); - 80332da: 6e7b ldr r3, [r7, #100] ; 0x64 - 80332dc: 2b00 cmp r3, #0 - 80332de: d1e3 bne.n 80332a8 + 803330a: 6e7b ldr r3, [r7, #100] ; 0x64 + 803330c: 2b00 cmp r3, #0 + 803330e: d1e3 bne.n 80332d8 /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 80332e0: 687b ldr r3, [r7, #4] - 80332e2: 2220 movs r2, #32 - 80332e4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8033310: 687b ldr r3, [r7, #4] + 8033312: 2220 movs r2, #32 + 8033314: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80332e8: 687b ldr r3, [r7, #4] - 80332ea: 2200 movs r2, #0 - 80332ec: 66da str r2, [r3, #108] ; 0x6c + 8033318: 687b ldr r3, [r7, #4] + 803331a: 2200 movs r2, #0 + 803331c: 66da str r2, [r3, #108] ; 0x6c ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 80332ee: 687b ldr r3, [r7, #4] - 80332f0: 681b ldr r3, [r3, #0] - 80332f2: 64fb str r3, [r7, #76] ; 0x4c + 803331e: 687b ldr r3, [r7, #4] + 8033320: 681b ldr r3, [r3, #0] + 8033322: 64fb str r3, [r7, #76] ; 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80332f4: 6cfb ldr r3, [r7, #76] ; 0x4c - 80332f6: e853 3f00 ldrex r3, [r3] - 80332fa: 64bb str r3, [r7, #72] ; 0x48 + 8033324: 6cfb ldr r3, [r7, #76] ; 0x4c + 8033326: e853 3f00 ldrex r3, [r3] + 803332a: 64bb str r3, [r7, #72] ; 0x48 return(result); - 80332fc: 6cbb ldr r3, [r7, #72] ; 0x48 - 80332fe: f023 0310 bic.w r3, r3, #16 - 8033302: f8c7 30ac str.w r3, [r7, #172] ; 0xac - 8033306: 687b ldr r3, [r7, #4] - 8033308: 681b ldr r3, [r3, #0] - 803330a: 461a mov r2, r3 - 803330c: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac - 8033310: 65bb str r3, [r7, #88] ; 0x58 - 8033312: 657a str r2, [r7, #84] ; 0x54 + 803332c: 6cbb ldr r3, [r7, #72] ; 0x48 + 803332e: f023 0310 bic.w r3, r3, #16 + 8033332: f8c7 30ac str.w r3, [r7, #172] ; 0xac + 8033336: 687b ldr r3, [r7, #4] + 8033338: 681b ldr r3, [r3, #0] + 803333a: 461a mov r2, r3 + 803333c: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac + 8033340: 65bb str r3, [r7, #88] ; 0x58 + 8033342: 657a str r2, [r7, #84] ; 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033314: 6d79 ldr r1, [r7, #84] ; 0x54 - 8033316: 6dba ldr r2, [r7, #88] ; 0x58 - 8033318: e841 2300 strex r3, r2, [r1] - 803331c: 653b str r3, [r7, #80] ; 0x50 + 8033344: 6d79 ldr r1, [r7, #84] ; 0x54 + 8033346: 6dba ldr r2, [r7, #88] ; 0x58 + 8033348: e841 2300 strex r3, r2, [r1] + 803334c: 653b str r3, [r7, #80] ; 0x50 return(result); - 803331e: 6d3b ldr r3, [r7, #80] ; 0x50 - 8033320: 2b00 cmp r3, #0 - 8033322: d1e4 bne.n 80332ee + 803334e: 6d3b ldr r3, [r7, #80] ; 0x50 + 8033350: 2b00 cmp r3, #0 + 8033352: d1e4 bne.n 803331e /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); - 8033324: 687b ldr r3, [r7, #4] - 8033326: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033328: 4618 mov r0, r3 - 803332a: f7f5 f9a9 bl 8028680 + 8033354: 687b ldr r3, [r7, #4] + 8033356: 6fdb ldr r3, [r3, #124] ; 0x7c + 8033358: 4618 mov r0, r3 + 803335a: f7f5 f9a9 bl 80286b0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 803332e: 687b ldr r3, [r7, #4] - 8033330: f8b3 205c ldrh.w r2, [r3, #92] ; 0x5c - 8033334: 687b ldr r3, [r7, #4] - 8033336: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 803333a: b29b uxth r3, r3 - 803333c: 1ad3 subs r3, r2, r3 - 803333e: b29b uxth r3, r3 - 8033340: 4619 mov r1, r3 - 8033342: 6878 ldr r0, [r7, #4] - 8033344: f000 f91c bl 8033580 + 803335e: 687b ldr r3, [r7, #4] + 8033360: f8b3 205c ldrh.w r2, [r3, #92] ; 0x5c + 8033364: 687b ldr r3, [r7, #4] + 8033366: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 803336a: b29b uxth r3, r3 + 803336c: 1ad3 subs r3, r2, r3 + 803336e: b29b uxth r3, r3 + 8033370: 4619 mov r1, r3 + 8033372: 6878 ldr r0, [r7, #4] + 8033374: f000 f91c bl 80335b0 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } return; - 8033348: e0fb b.n 8033542 - 803334a: bf00 nop - 803334c: 40020010 .word 0x40020010 - 8033350: 40020028 .word 0x40020028 - 8033354: 40020040 .word 0x40020040 - 8033358: 40020058 .word 0x40020058 - 803335c: 40020070 .word 0x40020070 - 8033360: 40020088 .word 0x40020088 - 8033364: 400200a0 .word 0x400200a0 - 8033368: 400200b8 .word 0x400200b8 - 803336c: 40020410 .word 0x40020410 - 8033370: 40020428 .word 0x40020428 - 8033374: 40020440 .word 0x40020440 - 8033378: 40020458 .word 0x40020458 - 803337c: 40020470 .word 0x40020470 - 8033380: 40020488 .word 0x40020488 - 8033384: 400204a0 .word 0x400204a0 - 8033388: 400204b8 .word 0x400204b8 + 8033378: e0fb b.n 8033572 + 803337a: bf00 nop + 803337c: 40020010 .word 0x40020010 + 8033380: 40020028 .word 0x40020028 + 8033384: 40020040 .word 0x40020040 + 8033388: 40020058 .word 0x40020058 + 803338c: 40020070 .word 0x40020070 + 8033390: 40020088 .word 0x40020088 + 8033394: 400200a0 .word 0x400200a0 + 8033398: 400200b8 .word 0x400200b8 + 803339c: 40020410 .word 0x40020410 + 80333a0: 40020428 .word 0x40020428 + 80333a4: 40020440 .word 0x40020440 + 80333a8: 40020458 .word 0x40020458 + 80333ac: 40020470 .word 0x40020470 + 80333b0: 40020488 .word 0x40020488 + 80333b4: 400204a0 .word 0x400204a0 + 80333b8: 400204b8 .word 0x400204b8 else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 803338c: 687b ldr r3, [r7, #4] - 803338e: f8b3 205c ldrh.w r2, [r3, #92] ; 0x5c - 8033392: 687b ldr r3, [r7, #4] - 8033394: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8033398: b29b uxth r3, r3 - 803339a: 1ad3 subs r3, r2, r3 - 803339c: f8a7 30ce strh.w r3, [r7, #206] ; 0xce + 80333bc: 687b ldr r3, [r7, #4] + 80333be: f8b3 205c ldrh.w r2, [r3, #92] ; 0x5c + 80333c2: 687b ldr r3, [r7, #4] + 80333c4: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 80333c8: b29b uxth r3, r3 + 80333ca: 1ad3 subs r3, r2, r3 + 80333cc: f8a7 30ce strh.w r3, [r7, #206] ; 0xce if ((huart->RxXferCount > 0U) - 80333a0: 687b ldr r3, [r7, #4] - 80333a2: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 80333a6: b29b uxth r3, r3 - 80333a8: 2b00 cmp r3, #0 - 80333aa: f000 80cc beq.w 8033546 + 80333d0: 687b ldr r3, [r7, #4] + 80333d2: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 80333d6: b29b uxth r3, r3 + 80333d8: 2b00 cmp r3, #0 + 80333da: f000 80cc beq.w 8033576 && (nb_rx_data > 0U)) - 80333ae: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce - 80333b2: 2b00 cmp r3, #0 - 80333b4: f000 80c7 beq.w 8033546 + 80333de: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce + 80333e2: 2b00 cmp r3, #0 + 80333e4: f000 80c7 beq.w 8033576 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 80333b8: 687b ldr r3, [r7, #4] - 80333ba: 681b ldr r3, [r3, #0] - 80333bc: 63bb str r3, [r7, #56] ; 0x38 + 80333e8: 687b ldr r3, [r7, #4] + 80333ea: 681b ldr r3, [r3, #0] + 80333ec: 63bb str r3, [r7, #56] ; 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80333be: 6bbb ldr r3, [r7, #56] ; 0x38 - 80333c0: e853 3f00 ldrex r3, [r3] - 80333c4: 637b str r3, [r7, #52] ; 0x34 + 80333ee: 6bbb ldr r3, [r7, #56] ; 0x38 + 80333f0: e853 3f00 ldrex r3, [r3] + 80333f4: 637b str r3, [r7, #52] ; 0x34 return(result); - 80333c6: 6b7b ldr r3, [r7, #52] ; 0x34 - 80333c8: f423 7390 bic.w r3, r3, #288 ; 0x120 - 80333cc: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 - 80333d0: 687b ldr r3, [r7, #4] - 80333d2: 681b ldr r3, [r3, #0] - 80333d4: 461a mov r2, r3 - 80333d6: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8 - 80333da: 647b str r3, [r7, #68] ; 0x44 - 80333dc: 643a str r2, [r7, #64] ; 0x40 + 80333f6: 6b7b ldr r3, [r7, #52] ; 0x34 + 80333f8: f423 7390 bic.w r3, r3, #288 ; 0x120 + 80333fc: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 + 8033400: 687b ldr r3, [r7, #4] + 8033402: 681b ldr r3, [r3, #0] + 8033404: 461a mov r2, r3 + 8033406: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8 + 803340a: 647b str r3, [r7, #68] ; 0x44 + 803340c: 643a str r2, [r7, #64] ; 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80333de: 6c39 ldr r1, [r7, #64] ; 0x40 - 80333e0: 6c7a ldr r2, [r7, #68] ; 0x44 - 80333e2: e841 2300 strex r3, r2, [r1] - 80333e6: 63fb str r3, [r7, #60] ; 0x3c + 803340e: 6c39 ldr r1, [r7, #64] ; 0x40 + 8033410: 6c7a ldr r2, [r7, #68] ; 0x44 + 8033412: e841 2300 strex r3, r2, [r1] + 8033416: 63fb str r3, [r7, #60] ; 0x3c return(result); - 80333e8: 6bfb ldr r3, [r7, #60] ; 0x3c - 80333ea: 2b00 cmp r3, #0 - 80333ec: d1e4 bne.n 80333b8 + 8033418: 6bfb ldr r3, [r7, #60] ; 0x3c + 803341a: 2b00 cmp r3, #0 + 803341c: d1e4 bne.n 80333e8 /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 80333ee: 687b ldr r3, [r7, #4] - 80333f0: 681b ldr r3, [r3, #0] - 80333f2: 3308 adds r3, #8 - 80333f4: 627b str r3, [r7, #36] ; 0x24 + 803341e: 687b ldr r3, [r7, #4] + 8033420: 681b ldr r3, [r3, #0] + 8033422: 3308 adds r3, #8 + 8033424: 627b str r3, [r7, #36] ; 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80333f6: 6a7b ldr r3, [r7, #36] ; 0x24 - 80333f8: e853 3f00 ldrex r3, [r3] - 80333fc: 623b str r3, [r7, #32] + 8033426: 6a7b ldr r3, [r7, #36] ; 0x24 + 8033428: e853 3f00 ldrex r3, [r3] + 803342c: 623b str r3, [r7, #32] return(result); - 80333fe: 6a3a ldr r2, [r7, #32] - 8033400: 4b54 ldr r3, [pc, #336] ; (8033554 ) - 8033402: 4013 ands r3, r2 - 8033404: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 - 8033408: 687b ldr r3, [r7, #4] - 803340a: 681b ldr r3, [r3, #0] - 803340c: 3308 adds r3, #8 - 803340e: f8d7 20c4 ldr.w r2, [r7, #196] ; 0xc4 - 8033412: 633a str r2, [r7, #48] ; 0x30 - 8033414: 62fb str r3, [r7, #44] ; 0x2c + 803342e: 6a3a ldr r2, [r7, #32] + 8033430: 4b54 ldr r3, [pc, #336] ; (8033584 ) + 8033432: 4013 ands r3, r2 + 8033434: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 8033438: 687b ldr r3, [r7, #4] + 803343a: 681b ldr r3, [r3, #0] + 803343c: 3308 adds r3, #8 + 803343e: f8d7 20c4 ldr.w r2, [r7, #196] ; 0xc4 + 8033442: 633a str r2, [r7, #48] ; 0x30 + 8033444: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033416: 6af9 ldr r1, [r7, #44] ; 0x2c - 8033418: 6b3a ldr r2, [r7, #48] ; 0x30 - 803341a: e841 2300 strex r3, r2, [r1] - 803341e: 62bb str r3, [r7, #40] ; 0x28 + 8033446: 6af9 ldr r1, [r7, #44] ; 0x2c + 8033448: 6b3a ldr r2, [r7, #48] ; 0x30 + 803344a: e841 2300 strex r3, r2, [r1] + 803344e: 62bb str r3, [r7, #40] ; 0x28 return(result); - 8033420: 6abb ldr r3, [r7, #40] ; 0x28 - 8033422: 2b00 cmp r3, #0 - 8033424: d1e3 bne.n 80333ee + 8033450: 6abb ldr r3, [r7, #40] ; 0x28 + 8033452: 2b00 cmp r3, #0 + 8033454: d1e3 bne.n 803341e /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8033426: 687b ldr r3, [r7, #4] - 8033428: 2220 movs r2, #32 - 803342a: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8033456: 687b ldr r3, [r7, #4] + 8033458: 2220 movs r2, #32 + 803345a: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 803342e: 687b ldr r3, [r7, #4] - 8033430: 2200 movs r2, #0 - 8033432: 66da str r2, [r3, #108] ; 0x6c + 803345e: 687b ldr r3, [r7, #4] + 8033460: 2200 movs r2, #0 + 8033462: 66da str r2, [r3, #108] ; 0x6c /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8033434: 687b ldr r3, [r7, #4] - 8033436: 2200 movs r2, #0 - 8033438: 671a str r2, [r3, #112] ; 0x70 + 8033464: 687b ldr r3, [r7, #4] + 8033466: 2200 movs r2, #0 + 8033468: 671a str r2, [r3, #112] ; 0x70 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 803343a: 687b ldr r3, [r7, #4] - 803343c: 681b ldr r3, [r3, #0] - 803343e: 613b str r3, [r7, #16] + 803346a: 687b ldr r3, [r7, #4] + 803346c: 681b ldr r3, [r3, #0] + 803346e: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8033440: 693b ldr r3, [r7, #16] - 8033442: e853 3f00 ldrex r3, [r3] - 8033446: 60fb str r3, [r7, #12] + 8033470: 693b ldr r3, [r7, #16] + 8033472: e853 3f00 ldrex r3, [r3] + 8033476: 60fb str r3, [r7, #12] return(result); - 8033448: 68fb ldr r3, [r7, #12] - 803344a: f023 0310 bic.w r3, r3, #16 - 803344e: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0 - 8033452: 687b ldr r3, [r7, #4] - 8033454: 681b ldr r3, [r3, #0] - 8033456: 461a mov r2, r3 - 8033458: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0 - 803345c: 61fb str r3, [r7, #28] - 803345e: 61ba str r2, [r7, #24] + 8033478: 68fb ldr r3, [r7, #12] + 803347a: f023 0310 bic.w r3, r3, #16 + 803347e: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0 + 8033482: 687b ldr r3, [r7, #4] + 8033484: 681b ldr r3, [r3, #0] + 8033486: 461a mov r2, r3 + 8033488: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0 + 803348c: 61fb str r3, [r7, #28] + 803348e: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033460: 69b9 ldr r1, [r7, #24] - 8033462: 69fa ldr r2, [r7, #28] - 8033464: e841 2300 strex r3, r2, [r1] - 8033468: 617b str r3, [r7, #20] + 8033490: 69b9 ldr r1, [r7, #24] + 8033492: 69fa ldr r2, [r7, #28] + 8033494: e841 2300 strex r3, r2, [r1] + 8033498: 617b str r3, [r7, #20] return(result); - 803346a: 697b ldr r3, [r7, #20] - 803346c: 2b00 cmp r3, #0 - 803346e: d1e4 bne.n 803343a + 803349a: 697b ldr r3, [r7, #20] + 803349c: 2b00 cmp r3, #0 + 803349e: d1e4 bne.n 803346a #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 8033470: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce - 8033474: 4619 mov r1, r3 - 8033476: 6878 ldr r0, [r7, #4] - 8033478: f000 f882 bl 8033580 + 80334a0: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce + 80334a4: 4619 mov r1, r3 + 80334a6: 6878 ldr r0, [r7, #4] + 80334a8: f000 f882 bl 80335b0 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } return; - 803347c: e063 b.n 8033546 + 80334ac: e063 b.n 8033576 } } /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) - 803347e: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8033482: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 8033486: 2b00 cmp r3, #0 - 8033488: d00e beq.n 80334a8 - 803348a: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 803348e: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8033492: 2b00 cmp r3, #0 - 8033494: d008 beq.n 80334a8 + 80334ae: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 80334b2: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 80334b6: 2b00 cmp r3, #0 + 80334b8: d00e beq.n 80334d8 + 80334ba: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 80334be: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 80334c2: 2b00 cmp r3, #0 + 80334c4: d008 beq.n 80334d8 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); - 8033496: 687b ldr r3, [r7, #4] - 8033498: 681b ldr r3, [r3, #0] - 803349a: f44f 1280 mov.w r2, #1048576 ; 0x100000 - 803349e: 621a str r2, [r3, #32] + 80334c6: 687b ldr r3, [r7, #4] + 80334c8: 681b ldr r3, [r3, #0] + 80334ca: f44f 1280 mov.w r2, #1048576 ; 0x100000 + 80334ce: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Wakeup Callback */ huart->WakeupCallback(huart); #else /* Call legacy weak Wakeup Callback */ HAL_UARTEx_WakeupCallback(huart); - 80334a0: 6878 ldr r0, [r7, #4] - 80334a2: f001 fe9f bl 80351e4 + 80334d0: 6878 ldr r0, [r7, #4] + 80334d2: f001 fe9f bl 8035214 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; - 80334a6: e051 b.n 803354c + 80334d6: e051 b.n 803357c } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_ISR_TXE_TXFNF) != 0U) - 80334a8: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80334ac: f003 0380 and.w r3, r3, #128 ; 0x80 - 80334b0: 2b00 cmp r3, #0 - 80334b2: d014 beq.n 80334de + 80334d8: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 80334dc: f003 0380 and.w r3, r3, #128 ; 0x80 + 80334e0: 2b00 cmp r3, #0 + 80334e2: d014 beq.n 803350e && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U) - 80334b4: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 80334b8: f003 0380 and.w r3, r3, #128 ; 0x80 - 80334bc: 2b00 cmp r3, #0 - 80334be: d105 bne.n 80334cc + 80334e4: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 80334e8: f003 0380 and.w r3, r3, #128 ; 0x80 + 80334ec: 2b00 cmp r3, #0 + 80334ee: d105 bne.n 80334fc || ((cr3its & USART_CR3_TXFTIE) != 0U))) - 80334c0: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 80334c4: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 80334c8: 2b00 cmp r3, #0 - 80334ca: d008 beq.n 80334de + 80334f0: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 80334f4: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 80334f8: 2b00 cmp r3, #0 + 80334fa: d008 beq.n 803350e { if (huart->TxISR != NULL) - 80334cc: 687b ldr r3, [r7, #4] - 80334ce: 6f5b ldr r3, [r3, #116] ; 0x74 - 80334d0: 2b00 cmp r3, #0 - 80334d2: d03a beq.n 803354a + 80334fc: 687b ldr r3, [r7, #4] + 80334fe: 6f5b ldr r3, [r3, #116] ; 0x74 + 8033500: 2b00 cmp r3, #0 + 8033502: d03a beq.n 803357a { huart->TxISR(huart); - 80334d4: 687b ldr r3, [r7, #4] - 80334d6: 6f5b ldr r3, [r3, #116] ; 0x74 - 80334d8: 6878 ldr r0, [r7, #4] - 80334da: 4798 blx r3 + 8033504: 687b ldr r3, [r7, #4] + 8033506: 6f5b ldr r3, [r3, #116] ; 0x74 + 8033508: 6878 ldr r0, [r7, #4] + 803350a: 4798 blx r3 } return; - 80334dc: e035 b.n 803354a + 803350c: e035 b.n 803357a } /* UART in mode Transmitter (transmission end) -----------------------------*/ if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) - 80334de: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80334e2: f003 0340 and.w r3, r3, #64 ; 0x40 - 80334e6: 2b00 cmp r3, #0 - 80334e8: d009 beq.n 80334fe - 80334ea: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 80334ee: f003 0340 and.w r3, r3, #64 ; 0x40 - 80334f2: 2b00 cmp r3, #0 - 80334f4: d003 beq.n 80334fe + 803350e: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8033512: f003 0340 and.w r3, r3, #64 ; 0x40 + 8033516: 2b00 cmp r3, #0 + 8033518: d009 beq.n 803352e + 803351a: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 803351e: f003 0340 and.w r3, r3, #64 ; 0x40 + 8033522: 2b00 cmp r3, #0 + 8033524: d003 beq.n 803352e { UART_EndTransmit_IT(huart); - 80334f6: 6878 ldr r0, [r7, #4] - 80334f8: f001 f9ed bl 80348d6 + 8033526: 6878 ldr r0, [r7, #4] + 8033528: f001 f9ed bl 8034906 return; - 80334fc: e026 b.n 803354c + 803352c: e026 b.n 803357c } /* UART TX Fifo Empty occurred ----------------------------------------------*/ if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U)) - 80334fe: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8033502: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 8033506: 2b00 cmp r3, #0 - 8033508: d009 beq.n 803351e - 803350a: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 803350e: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 - 8033512: 2b00 cmp r3, #0 - 8033514: d003 beq.n 803351e + 803352e: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8033532: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 8033536: 2b00 cmp r3, #0 + 8033538: d009 beq.n 803354e + 803353a: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 803353e: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 + 8033542: 2b00 cmp r3, #0 + 8033544: d003 beq.n 803354e #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Tx Fifo Empty Callback */ huart->TxFifoEmptyCallback(huart); #else /* Call legacy weak Tx Fifo Empty Callback */ HAL_UARTEx_TxFifoEmptyCallback(huart); - 8033516: 6878 ldr r0, [r7, #4] - 8033518: f001 fe78 bl 803520c + 8033546: 6878 ldr r0, [r7, #4] + 8033548: f001 fe78 bl 803523c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; - 803351c: e016 b.n 803354c + 803354c: e016 b.n 803357c } /* UART RX Fifo Full occurred ----------------------------------------------*/ if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U)) - 803351e: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8033522: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8033526: 2b00 cmp r3, #0 - 8033528: d010 beq.n 803354c - 803352a: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 803352e: 2b00 cmp r3, #0 - 8033530: da0c bge.n 803354c + 803354e: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8033552: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 8033556: 2b00 cmp r3, #0 + 8033558: d010 beq.n 803357c + 803355a: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 803355e: 2b00 cmp r3, #0 + 8033560: da0c bge.n 803357c #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Rx Fifo Full Callback */ huart->RxFifoFullCallback(huart); #else /* Call legacy weak Rx Fifo Full Callback */ HAL_UARTEx_RxFifoFullCallback(huart); - 8033532: 6878 ldr r0, [r7, #4] - 8033534: f001 fe60 bl 80351f8 + 8033562: 6878 ldr r0, [r7, #4] + 8033564: f001 fe60 bl 8035228 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; - 8033538: e008 b.n 803354c + 8033568: e008 b.n 803357c return; - 803353a: bf00 nop - 803353c: e006 b.n 803354c + 803356a: bf00 nop + 803356c: e006 b.n 803357c return; - 803353e: bf00 nop - 8033540: e004 b.n 803354c + 803356e: bf00 nop + 8033570: e004 b.n 803357c return; - 8033542: bf00 nop - 8033544: e002 b.n 803354c + 8033572: bf00 nop + 8033574: e002 b.n 803357c return; - 8033546: bf00 nop - 8033548: e000 b.n 803354c + 8033576: bf00 nop + 8033578: e000 b.n 803357c return; - 803354a: bf00 nop + 803357a: bf00 nop } } - 803354c: 37e8 adds r7, #232 ; 0xe8 - 803354e: 46bd mov sp, r7 - 8033550: bd80 pop {r7, pc} - 8033552: bf00 nop - 8033554: effffffe .word 0xeffffffe + 803357c: 37e8 adds r7, #232 ; 0xe8 + 803357e: 46bd mov sp, r7 + 8033580: bd80 pop {r7, pc} + 8033582: bf00 nop + 8033584: effffffe .word 0xeffffffe -08033558 : +08033588 : * @brief Tx Half Transfer completed callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) { - 8033558: b480 push {r7} - 803355a: b083 sub sp, #12 - 803355c: af00 add r7, sp, #0 - 803355e: 6078 str r0, [r7, #4] + 8033588: b480 push {r7} + 803358a: b083 sub sp, #12 + 803358c: af00 add r7, sp, #0 + 803358e: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxHalfCpltCallback can be implemented in the user file. */ } - 8033560: bf00 nop - 8033562: 370c adds r7, #12 - 8033564: 46bd mov sp, r7 - 8033566: f85d 7b04 ldr.w r7, [sp], #4 - 803356a: 4770 bx lr + 8033590: bf00 nop + 8033592: 370c adds r7, #12 + 8033594: 46bd mov sp, r7 + 8033596: f85d 7b04 ldr.w r7, [sp], #4 + 803359a: 4770 bx lr -0803356c : +0803359c : * @brief UART error callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 803356c: b480 push {r7} - 803356e: b083 sub sp, #12 - 8033570: af00 add r7, sp, #0 - 8033572: 6078 str r0, [r7, #4] + 803359c: b480 push {r7} + 803359e: b083 sub sp, #12 + 80335a0: af00 add r7, sp, #0 + 80335a2: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback can be implemented in the user file. */ } - 8033574: bf00 nop - 8033576: 370c adds r7, #12 - 8033578: 46bd mov sp, r7 - 803357a: f85d 7b04 ldr.w r7, [sp], #4 - 803357e: 4770 bx lr + 80335a4: bf00 nop + 80335a6: 370c adds r7, #12 + 80335a8: 46bd mov sp, r7 + 80335aa: f85d 7b04 ldr.w r7, [sp], #4 + 80335ae: 4770 bx lr -08033580 : +080335b0 : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { - 8033580: b480 push {r7} - 8033582: b083 sub sp, #12 - 8033584: af00 add r7, sp, #0 - 8033586: 6078 str r0, [r7, #4] - 8033588: 460b mov r3, r1 - 803358a: 807b strh r3, [r7, #2] + 80335b0: b480 push {r7} + 80335b2: b083 sub sp, #12 + 80335b4: af00 add r7, sp, #0 + 80335b6: 6078 str r0, [r7, #4] + 80335b8: 460b mov r3, r1 + 80335ba: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } - 803358c: bf00 nop - 803358e: 370c adds r7, #12 - 8033590: 46bd mov sp, r7 - 8033592: f85d 7b04 ldr.w r7, [sp], #4 - 8033596: 4770 bx lr + 80335bc: bf00 nop + 80335be: 370c adds r7, #12 + 80335c0: 46bd mov sp, r7 + 80335c2: f85d 7b04 ldr.w r7, [sp], #4 + 80335c6: 4770 bx lr -08033598 : +080335c8 : * @brief Configure the UART peripheral. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) { - 8033598: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} - 803359c: b092 sub sp, #72 ; 0x48 - 803359e: af00 add r7, sp, #0 - 80335a0: 6178 str r0, [r7, #20] + 80335c8: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 80335cc: b092 sub sp, #72 ; 0x48 + 80335ce: af00 add r7, sp, #0 + 80335d0: 6178 str r0, [r7, #20] uint32_t tmpreg; uint16_t brrtemp; UART_ClockSourceTypeDef clocksource; uint32_t usartdiv; HAL_StatusTypeDef ret = HAL_OK; - 80335a2: 2300 movs r3, #0 - 80335a4: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 80335d2: 2300 movs r3, #0 + 80335d4: f887 3042 strb.w r3, [r7, #66] ; 0x42 * the UART Word Length, Parity, Mode and oversampling: * set the M bits according to huart->Init.WordLength value * set PCE and PS bits according to huart->Init.Parity value * set TE and RE bits according to huart->Init.Mode value * set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 80335a8: 697b ldr r3, [r7, #20] - 80335aa: 689a ldr r2, [r3, #8] - 80335ac: 697b ldr r3, [r7, #20] - 80335ae: 691b ldr r3, [r3, #16] - 80335b0: 431a orrs r2, r3 - 80335b2: 697b ldr r3, [r7, #20] - 80335b4: 695b ldr r3, [r3, #20] - 80335b6: 431a orrs r2, r3 - 80335b8: 697b ldr r3, [r7, #20] - 80335ba: 69db ldr r3, [r3, #28] - 80335bc: 4313 orrs r3, r2 - 80335be: 647b str r3, [r7, #68] ; 0x44 + 80335d8: 697b ldr r3, [r7, #20] + 80335da: 689a ldr r2, [r3, #8] + 80335dc: 697b ldr r3, [r7, #20] + 80335de: 691b ldr r3, [r3, #16] + 80335e0: 431a orrs r2, r3 + 80335e2: 697b ldr r3, [r7, #20] + 80335e4: 695b ldr r3, [r3, #20] + 80335e6: 431a orrs r2, r3 + 80335e8: 697b ldr r3, [r7, #20] + 80335ea: 69db ldr r3, [r3, #28] + 80335ec: 4313 orrs r3, r2 + 80335ee: 647b str r3, [r7, #68] ; 0x44 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 80335c0: 697b ldr r3, [r7, #20] - 80335c2: 681b ldr r3, [r3, #0] - 80335c4: 681a ldr r2, [r3, #0] - 80335c6: 4bbe ldr r3, [pc, #760] ; (80338c0 ) - 80335c8: 4013 ands r3, r2 - 80335ca: 697a ldr r2, [r7, #20] - 80335cc: 6812 ldr r2, [r2, #0] - 80335ce: 6c79 ldr r1, [r7, #68] ; 0x44 - 80335d0: 430b orrs r3, r1 - 80335d2: 6013 str r3, [r2, #0] + 80335f0: 697b ldr r3, [r7, #20] + 80335f2: 681b ldr r3, [r3, #0] + 80335f4: 681a ldr r2, [r3, #0] + 80335f6: 4bbe ldr r3, [pc, #760] ; (80338f0 ) + 80335f8: 4013 ands r3, r2 + 80335fa: 697a ldr r2, [r7, #20] + 80335fc: 6812 ldr r2, [r2, #0] + 80335fe: 6c79 ldr r1, [r7, #68] ; 0x44 + 8033600: 430b orrs r3, r1 + 8033602: 6013 str r3, [r2, #0] /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 80335d4: 697b ldr r3, [r7, #20] - 80335d6: 681b ldr r3, [r3, #0] - 80335d8: 685b ldr r3, [r3, #4] - 80335da: f423 5140 bic.w r1, r3, #12288 ; 0x3000 - 80335de: 697b ldr r3, [r7, #20] - 80335e0: 68da ldr r2, [r3, #12] - 80335e2: 697b ldr r3, [r7, #20] - 80335e4: 681b ldr r3, [r3, #0] - 80335e6: 430a orrs r2, r1 - 80335e8: 605a str r2, [r3, #4] + 8033604: 697b ldr r3, [r7, #20] + 8033606: 681b ldr r3, [r3, #0] + 8033608: 685b ldr r3, [r3, #4] + 803360a: f423 5140 bic.w r1, r3, #12288 ; 0x3000 + 803360e: 697b ldr r3, [r7, #20] + 8033610: 68da ldr r2, [r3, #12] + 8033612: 697b ldr r3, [r7, #20] + 8033614: 681b ldr r3, [r3, #0] + 8033616: 430a orrs r2, r1 + 8033618: 605a str r2, [r3, #4] /* Configure * - UART HardWare Flow Control: set CTSE and RTSE bits according * to huart->Init.HwFlowCtl value * - one-bit sampling method versus three samples' majority rule according * to huart->Init.OneBitSampling (not applicable to LPUART) */ tmpreg = (uint32_t)huart->Init.HwFlowCtl; - 80335ea: 697b ldr r3, [r7, #20] - 80335ec: 699b ldr r3, [r3, #24] - 80335ee: 647b str r3, [r7, #68] ; 0x44 + 803361a: 697b ldr r3, [r7, #20] + 803361c: 699b ldr r3, [r3, #24] + 803361e: 647b str r3, [r7, #68] ; 0x44 if (!(UART_INSTANCE_LOWPOWER(huart))) - 80335f0: 697b ldr r3, [r7, #20] - 80335f2: 681b ldr r3, [r3, #0] - 80335f4: 4ab3 ldr r2, [pc, #716] ; (80338c4 ) - 80335f6: 4293 cmp r3, r2 - 80335f8: d004 beq.n 8033604 + 8033620: 697b ldr r3, [r7, #20] + 8033622: 681b ldr r3, [r3, #0] + 8033624: 4ab3 ldr r2, [pc, #716] ; (80338f4 ) + 8033626: 4293 cmp r3, r2 + 8033628: d004 beq.n 8033634 { tmpreg |= huart->Init.OneBitSampling; - 80335fa: 697b ldr r3, [r7, #20] - 80335fc: 6a1b ldr r3, [r3, #32] - 80335fe: 6c7a ldr r2, [r7, #68] ; 0x44 - 8033600: 4313 orrs r3, r2 - 8033602: 647b str r3, [r7, #68] ; 0x44 + 803362a: 697b ldr r3, [r7, #20] + 803362c: 6a1b ldr r3, [r3, #32] + 803362e: 6c7a ldr r2, [r7, #68] ; 0x44 + 8033630: 4313 orrs r3, r2 + 8033632: 647b str r3, [r7, #68] ; 0x44 } MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 8033604: 697b ldr r3, [r7, #20] - 8033606: 681b ldr r3, [r3, #0] - 8033608: 689a ldr r2, [r3, #8] - 803360a: 4baf ldr r3, [pc, #700] ; (80338c8 ) - 803360c: 4013 ands r3, r2 - 803360e: 697a ldr r2, [r7, #20] - 8033610: 6812 ldr r2, [r2, #0] - 8033612: 6c79 ldr r1, [r7, #68] ; 0x44 - 8033614: 430b orrs r3, r1 - 8033616: 6093 str r3, [r2, #8] + 8033634: 697b ldr r3, [r7, #20] + 8033636: 681b ldr r3, [r3, #0] + 8033638: 689a ldr r2, [r3, #8] + 803363a: 4baf ldr r3, [pc, #700] ; (80338f8 ) + 803363c: 4013 ands r3, r2 + 803363e: 697a ldr r2, [r7, #20] + 8033640: 6812 ldr r2, [r2, #0] + 8033642: 6c79 ldr r1, [r7, #68] ; 0x44 + 8033644: 430b orrs r3, r1 + 8033646: 6093 str r3, [r2, #8] /*-------------------------- USART PRESC Configuration -----------------------*/ /* Configure * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */ MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); - 8033618: 697b ldr r3, [r7, #20] - 803361a: 681b ldr r3, [r3, #0] - 803361c: 6adb ldr r3, [r3, #44] ; 0x2c - 803361e: f023 010f bic.w r1, r3, #15 - 8033622: 697b ldr r3, [r7, #20] - 8033624: 6a5a ldr r2, [r3, #36] ; 0x24 - 8033626: 697b ldr r3, [r7, #20] - 8033628: 681b ldr r3, [r3, #0] - 803362a: 430a orrs r2, r1 - 803362c: 62da str r2, [r3, #44] ; 0x2c + 8033648: 697b ldr r3, [r7, #20] + 803364a: 681b ldr r3, [r3, #0] + 803364c: 6adb ldr r3, [r3, #44] ; 0x2c + 803364e: f023 010f bic.w r1, r3, #15 + 8033652: 697b ldr r3, [r7, #20] + 8033654: 6a5a ldr r2, [r3, #36] ; 0x24 + 8033656: 697b ldr r3, [r7, #20] + 8033658: 681b ldr r3, [r3, #0] + 803365a: 430a orrs r2, r1 + 803365c: 62da str r2, [r3, #44] ; 0x2c /*-------------------------- USART BRR Configuration -----------------------*/ UART_GETCLOCKSOURCE(huart, clocksource); - 803362e: 697b ldr r3, [r7, #20] - 8033630: 681b ldr r3, [r3, #0] - 8033632: 4aa6 ldr r2, [pc, #664] ; (80338cc ) - 8033634: 4293 cmp r3, r2 - 8033636: d177 bne.n 8033728 - 8033638: 4ba5 ldr r3, [pc, #660] ; (80338d0 ) - 803363a: 6d5b ldr r3, [r3, #84] ; 0x54 - 803363c: f003 0338 and.w r3, r3, #56 ; 0x38 - 8033640: 2b28 cmp r3, #40 ; 0x28 - 8033642: d86d bhi.n 8033720 - 8033644: a201 add r2, pc, #4 ; (adr r2, 803364c ) - 8033646: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 803364a: bf00 nop - 803364c: 080336f1 .word 0x080336f1 - 8033650: 08033721 .word 0x08033721 - 8033654: 08033721 .word 0x08033721 - 8033658: 08033721 .word 0x08033721 - 803365c: 08033721 .word 0x08033721 - 8033660: 08033721 .word 0x08033721 - 8033664: 08033721 .word 0x08033721 - 8033668: 08033721 .word 0x08033721 - 803366c: 080336f9 .word 0x080336f9 - 8033670: 08033721 .word 0x08033721 - 8033674: 08033721 .word 0x08033721 - 8033678: 08033721 .word 0x08033721 + 803365e: 697b ldr r3, [r7, #20] + 8033660: 681b ldr r3, [r3, #0] + 8033662: 4aa6 ldr r2, [pc, #664] ; (80338fc ) + 8033664: 4293 cmp r3, r2 + 8033666: d177 bne.n 8033758 + 8033668: 4ba5 ldr r3, [pc, #660] ; (8033900 ) + 803366a: 6d5b ldr r3, [r3, #84] ; 0x54 + 803366c: f003 0338 and.w r3, r3, #56 ; 0x38 + 8033670: 2b28 cmp r3, #40 ; 0x28 + 8033672: d86d bhi.n 8033750 + 8033674: a201 add r2, pc, #4 ; (adr r2, 803367c ) + 8033676: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 803367a: bf00 nop 803367c: 08033721 .word 0x08033721 - 8033680: 08033721 .word 0x08033721 - 8033684: 08033721 .word 0x08033721 - 8033688: 08033721 .word 0x08033721 - 803368c: 08033701 .word 0x08033701 - 8033690: 08033721 .word 0x08033721 - 8033694: 08033721 .word 0x08033721 - 8033698: 08033721 .word 0x08033721 - 803369c: 08033721 .word 0x08033721 - 80336a0: 08033721 .word 0x08033721 - 80336a4: 08033721 .word 0x08033721 - 80336a8: 08033721 .word 0x08033721 - 80336ac: 08033709 .word 0x08033709 - 80336b0: 08033721 .word 0x08033721 - 80336b4: 08033721 .word 0x08033721 - 80336b8: 08033721 .word 0x08033721 - 80336bc: 08033721 .word 0x08033721 - 80336c0: 08033721 .word 0x08033721 - 80336c4: 08033721 .word 0x08033721 - 80336c8: 08033721 .word 0x08033721 - 80336cc: 08033711 .word 0x08033711 - 80336d0: 08033721 .word 0x08033721 - 80336d4: 08033721 .word 0x08033721 - 80336d8: 08033721 .word 0x08033721 - 80336dc: 08033721 .word 0x08033721 - 80336e0: 08033721 .word 0x08033721 - 80336e4: 08033721 .word 0x08033721 - 80336e8: 08033721 .word 0x08033721 - 80336ec: 08033719 .word 0x08033719 - 80336f0: 2301 movs r3, #1 - 80336f2: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80336f6: e222 b.n 8033b3e - 80336f8: 2304 movs r3, #4 - 80336fa: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80336fe: e21e b.n 8033b3e - 8033700: 2308 movs r3, #8 - 8033702: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033706: e21a b.n 8033b3e - 8033708: 2310 movs r3, #16 - 803370a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803370e: e216 b.n 8033b3e - 8033710: 2320 movs r3, #32 - 8033712: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033716: e212 b.n 8033b3e - 8033718: 2340 movs r3, #64 ; 0x40 - 803371a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803371e: e20e b.n 8033b3e - 8033720: 2380 movs r3, #128 ; 0x80 + 8033680: 08033751 .word 0x08033751 + 8033684: 08033751 .word 0x08033751 + 8033688: 08033751 .word 0x08033751 + 803368c: 08033751 .word 0x08033751 + 8033690: 08033751 .word 0x08033751 + 8033694: 08033751 .word 0x08033751 + 8033698: 08033751 .word 0x08033751 + 803369c: 08033729 .word 0x08033729 + 80336a0: 08033751 .word 0x08033751 + 80336a4: 08033751 .word 0x08033751 + 80336a8: 08033751 .word 0x08033751 + 80336ac: 08033751 .word 0x08033751 + 80336b0: 08033751 .word 0x08033751 + 80336b4: 08033751 .word 0x08033751 + 80336b8: 08033751 .word 0x08033751 + 80336bc: 08033731 .word 0x08033731 + 80336c0: 08033751 .word 0x08033751 + 80336c4: 08033751 .word 0x08033751 + 80336c8: 08033751 .word 0x08033751 + 80336cc: 08033751 .word 0x08033751 + 80336d0: 08033751 .word 0x08033751 + 80336d4: 08033751 .word 0x08033751 + 80336d8: 08033751 .word 0x08033751 + 80336dc: 08033739 .word 0x08033739 + 80336e0: 08033751 .word 0x08033751 + 80336e4: 08033751 .word 0x08033751 + 80336e8: 08033751 .word 0x08033751 + 80336ec: 08033751 .word 0x08033751 + 80336f0: 08033751 .word 0x08033751 + 80336f4: 08033751 .word 0x08033751 + 80336f8: 08033751 .word 0x08033751 + 80336fc: 08033741 .word 0x08033741 + 8033700: 08033751 .word 0x08033751 + 8033704: 08033751 .word 0x08033751 + 8033708: 08033751 .word 0x08033751 + 803370c: 08033751 .word 0x08033751 + 8033710: 08033751 .word 0x08033751 + 8033714: 08033751 .word 0x08033751 + 8033718: 08033751 .word 0x08033751 + 803371c: 08033749 .word 0x08033749 + 8033720: 2301 movs r3, #1 8033722: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033726: e20a b.n 8033b3e - 8033728: 697b ldr r3, [r7, #20] - 803372a: 681b ldr r3, [r3, #0] - 803372c: 4a69 ldr r2, [pc, #420] ; (80338d4 ) - 803372e: 4293 cmp r3, r2 - 8033730: d130 bne.n 8033794 - 8033732: 4b67 ldr r3, [pc, #412] ; (80338d0 ) - 8033734: 6d5b ldr r3, [r3, #84] ; 0x54 - 8033736: f003 0307 and.w r3, r3, #7 - 803373a: 2b05 cmp r3, #5 - 803373c: d826 bhi.n 803378c - 803373e: a201 add r2, pc, #4 ; (adr r2, 8033744 ) - 8033740: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033744: 0803375d .word 0x0803375d - 8033748: 08033765 .word 0x08033765 - 803374c: 0803376d .word 0x0803376d - 8033750: 08033775 .word 0x08033775 - 8033754: 0803377d .word 0x0803377d - 8033758: 08033785 .word 0x08033785 - 803375c: 2300 movs r3, #0 - 803375e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033762: e1ec b.n 8033b3e - 8033764: 2304 movs r3, #4 - 8033766: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803376a: e1e8 b.n 8033b3e - 803376c: 2308 movs r3, #8 - 803376e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033772: e1e4 b.n 8033b3e - 8033774: 2310 movs r3, #16 - 8033776: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803377a: e1e0 b.n 8033b3e - 803377c: 2320 movs r3, #32 - 803377e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033782: e1dc b.n 8033b3e - 8033784: 2340 movs r3, #64 ; 0x40 - 8033786: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803378a: e1d8 b.n 8033b3e - 803378c: 2380 movs r3, #128 ; 0x80 + 8033726: e222 b.n 8033b6e + 8033728: 2304 movs r3, #4 + 803372a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803372e: e21e b.n 8033b6e + 8033730: 2308 movs r3, #8 + 8033732: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033736: e21a b.n 8033b6e + 8033738: 2310 movs r3, #16 + 803373a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803373e: e216 b.n 8033b6e + 8033740: 2320 movs r3, #32 + 8033742: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033746: e212 b.n 8033b6e + 8033748: 2340 movs r3, #64 ; 0x40 + 803374a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803374e: e20e b.n 8033b6e + 8033750: 2380 movs r3, #128 ; 0x80 + 8033752: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033756: e20a b.n 8033b6e + 8033758: 697b ldr r3, [r7, #20] + 803375a: 681b ldr r3, [r3, #0] + 803375c: 4a69 ldr r2, [pc, #420] ; (8033904 ) + 803375e: 4293 cmp r3, r2 + 8033760: d130 bne.n 80337c4 + 8033762: 4b67 ldr r3, [pc, #412] ; (8033900 ) + 8033764: 6d5b ldr r3, [r3, #84] ; 0x54 + 8033766: f003 0307 and.w r3, r3, #7 + 803376a: 2b05 cmp r3, #5 + 803376c: d826 bhi.n 80337bc + 803376e: a201 add r2, pc, #4 ; (adr r2, 8033774 ) + 8033770: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033774: 0803378d .word 0x0803378d + 8033778: 08033795 .word 0x08033795 + 803377c: 0803379d .word 0x0803379d + 8033780: 080337a5 .word 0x080337a5 + 8033784: 080337ad .word 0x080337ad + 8033788: 080337b5 .word 0x080337b5 + 803378c: 2300 movs r3, #0 803378e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033792: e1d4 b.n 8033b3e - 8033794: 697b ldr r3, [r7, #20] - 8033796: 681b ldr r3, [r3, #0] - 8033798: 4a4f ldr r2, [pc, #316] ; (80338d8 ) - 803379a: 4293 cmp r3, r2 - 803379c: d130 bne.n 8033800 - 803379e: 4b4c ldr r3, [pc, #304] ; (80338d0 ) - 80337a0: 6d5b ldr r3, [r3, #84] ; 0x54 - 80337a2: f003 0307 and.w r3, r3, #7 - 80337a6: 2b05 cmp r3, #5 - 80337a8: d826 bhi.n 80337f8 - 80337aa: a201 add r2, pc, #4 ; (adr r2, 80337b0 ) - 80337ac: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80337b0: 080337c9 .word 0x080337c9 - 80337b4: 080337d1 .word 0x080337d1 - 80337b8: 080337d9 .word 0x080337d9 - 80337bc: 080337e1 .word 0x080337e1 - 80337c0: 080337e9 .word 0x080337e9 - 80337c4: 080337f1 .word 0x080337f1 - 80337c8: 2300 movs r3, #0 - 80337ca: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337ce: e1b6 b.n 8033b3e - 80337d0: 2304 movs r3, #4 - 80337d2: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337d6: e1b2 b.n 8033b3e - 80337d8: 2308 movs r3, #8 - 80337da: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337de: e1ae b.n 8033b3e - 80337e0: 2310 movs r3, #16 - 80337e2: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337e6: e1aa b.n 8033b3e - 80337e8: 2320 movs r3, #32 - 80337ea: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337ee: e1a6 b.n 8033b3e - 80337f0: 2340 movs r3, #64 ; 0x40 - 80337f2: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337f6: e1a2 b.n 8033b3e - 80337f8: 2380 movs r3, #128 ; 0x80 + 8033792: e1ec b.n 8033b6e + 8033794: 2304 movs r3, #4 + 8033796: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803379a: e1e8 b.n 8033b6e + 803379c: 2308 movs r3, #8 + 803379e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80337a2: e1e4 b.n 8033b6e + 80337a4: 2310 movs r3, #16 + 80337a6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80337aa: e1e0 b.n 8033b6e + 80337ac: 2320 movs r3, #32 + 80337ae: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80337b2: e1dc b.n 8033b6e + 80337b4: 2340 movs r3, #64 ; 0x40 + 80337b6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80337ba: e1d8 b.n 8033b6e + 80337bc: 2380 movs r3, #128 ; 0x80 + 80337be: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80337c2: e1d4 b.n 8033b6e + 80337c4: 697b ldr r3, [r7, #20] + 80337c6: 681b ldr r3, [r3, #0] + 80337c8: 4a4f ldr r2, [pc, #316] ; (8033908 ) + 80337ca: 4293 cmp r3, r2 + 80337cc: d130 bne.n 8033830 + 80337ce: 4b4c ldr r3, [pc, #304] ; (8033900 ) + 80337d0: 6d5b ldr r3, [r3, #84] ; 0x54 + 80337d2: f003 0307 and.w r3, r3, #7 + 80337d6: 2b05 cmp r3, #5 + 80337d8: d826 bhi.n 8033828 + 80337da: a201 add r2, pc, #4 ; (adr r2, 80337e0 ) + 80337dc: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80337e0: 080337f9 .word 0x080337f9 + 80337e4: 08033801 .word 0x08033801 + 80337e8: 08033809 .word 0x08033809 + 80337ec: 08033811 .word 0x08033811 + 80337f0: 08033819 .word 0x08033819 + 80337f4: 08033821 .word 0x08033821 + 80337f8: 2300 movs r3, #0 80337fa: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337fe: e19e b.n 8033b3e - 8033800: 697b ldr r3, [r7, #20] - 8033802: 681b ldr r3, [r3, #0] - 8033804: 4a35 ldr r2, [pc, #212] ; (80338dc ) - 8033806: 4293 cmp r3, r2 - 8033808: d130 bne.n 803386c - 803380a: 4b31 ldr r3, [pc, #196] ; (80338d0 ) - 803380c: 6d5b ldr r3, [r3, #84] ; 0x54 - 803380e: f003 0307 and.w r3, r3, #7 - 8033812: 2b05 cmp r3, #5 - 8033814: d826 bhi.n 8033864 - 8033816: a201 add r2, pc, #4 ; (adr r2, 803381c ) - 8033818: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 803381c: 08033835 .word 0x08033835 - 8033820: 0803383d .word 0x0803383d - 8033824: 08033845 .word 0x08033845 - 8033828: 0803384d .word 0x0803384d - 803382c: 08033855 .word 0x08033855 - 8033830: 0803385d .word 0x0803385d - 8033834: 2300 movs r3, #0 - 8033836: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803383a: e180 b.n 8033b3e - 803383c: 2304 movs r3, #4 - 803383e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033842: e17c b.n 8033b3e - 8033844: 2308 movs r3, #8 - 8033846: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803384a: e178 b.n 8033b3e - 803384c: 2310 movs r3, #16 - 803384e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033852: e174 b.n 8033b3e - 8033854: 2320 movs r3, #32 - 8033856: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803385a: e170 b.n 8033b3e - 803385c: 2340 movs r3, #64 ; 0x40 - 803385e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033862: e16c b.n 8033b3e - 8033864: 2380 movs r3, #128 ; 0x80 + 80337fe: e1b6 b.n 8033b6e + 8033800: 2304 movs r3, #4 + 8033802: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033806: e1b2 b.n 8033b6e + 8033808: 2308 movs r3, #8 + 803380a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803380e: e1ae b.n 8033b6e + 8033810: 2310 movs r3, #16 + 8033812: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033816: e1aa b.n 8033b6e + 8033818: 2320 movs r3, #32 + 803381a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803381e: e1a6 b.n 8033b6e + 8033820: 2340 movs r3, #64 ; 0x40 + 8033822: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033826: e1a2 b.n 8033b6e + 8033828: 2380 movs r3, #128 ; 0x80 + 803382a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803382e: e19e b.n 8033b6e + 8033830: 697b ldr r3, [r7, #20] + 8033832: 681b ldr r3, [r3, #0] + 8033834: 4a35 ldr r2, [pc, #212] ; (803390c ) + 8033836: 4293 cmp r3, r2 + 8033838: d130 bne.n 803389c + 803383a: 4b31 ldr r3, [pc, #196] ; (8033900 ) + 803383c: 6d5b ldr r3, [r3, #84] ; 0x54 + 803383e: f003 0307 and.w r3, r3, #7 + 8033842: 2b05 cmp r3, #5 + 8033844: d826 bhi.n 8033894 + 8033846: a201 add r2, pc, #4 ; (adr r2, 803384c ) + 8033848: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 803384c: 08033865 .word 0x08033865 + 8033850: 0803386d .word 0x0803386d + 8033854: 08033875 .word 0x08033875 + 8033858: 0803387d .word 0x0803387d + 803385c: 08033885 .word 0x08033885 + 8033860: 0803388d .word 0x0803388d + 8033864: 2300 movs r3, #0 8033866: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803386a: e168 b.n 8033b3e - 803386c: 697b ldr r3, [r7, #20] - 803386e: 681b ldr r3, [r3, #0] - 8033870: 4a1b ldr r2, [pc, #108] ; (80338e0 ) - 8033872: 4293 cmp r3, r2 - 8033874: d142 bne.n 80338fc - 8033876: 4b16 ldr r3, [pc, #88] ; (80338d0 ) - 8033878: 6d5b ldr r3, [r3, #84] ; 0x54 - 803387a: f003 0307 and.w r3, r3, #7 - 803387e: 2b05 cmp r3, #5 - 8033880: d838 bhi.n 80338f4 - 8033882: a201 add r2, pc, #4 ; (adr r2, 8033888 ) - 8033884: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033888: 080338a1 .word 0x080338a1 - 803388c: 080338a9 .word 0x080338a9 - 8033890: 080338b1 .word 0x080338b1 - 8033894: 080338b9 .word 0x080338b9 - 8033898: 080338e5 .word 0x080338e5 - 803389c: 080338ed .word 0x080338ed - 80338a0: 2300 movs r3, #0 - 80338a2: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338a6: e14a b.n 8033b3e - 80338a8: 2304 movs r3, #4 - 80338aa: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338ae: e146 b.n 8033b3e - 80338b0: 2308 movs r3, #8 - 80338b2: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338b6: e142 b.n 8033b3e - 80338b8: 2310 movs r3, #16 - 80338ba: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338be: e13e b.n 8033b3e - 80338c0: cfff69f3 .word 0xcfff69f3 - 80338c4: 58000c00 .word 0x58000c00 - 80338c8: 11fff4ff .word 0x11fff4ff - 80338cc: 40011000 .word 0x40011000 - 80338d0: 58024400 .word 0x58024400 - 80338d4: 40004400 .word 0x40004400 - 80338d8: 40004800 .word 0x40004800 - 80338dc: 40004c00 .word 0x40004c00 - 80338e0: 40005000 .word 0x40005000 - 80338e4: 2320 movs r3, #32 - 80338e6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338ea: e128 b.n 8033b3e - 80338ec: 2340 movs r3, #64 ; 0x40 - 80338ee: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338f2: e124 b.n 8033b3e - 80338f4: 2380 movs r3, #128 ; 0x80 - 80338f6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338fa: e120 b.n 8033b3e - 80338fc: 697b ldr r3, [r7, #20] - 80338fe: 681b ldr r3, [r3, #0] - 8033900: 4acb ldr r2, [pc, #812] ; (8033c30 ) - 8033902: 4293 cmp r3, r2 - 8033904: d176 bne.n 80339f4 - 8033906: 4bcb ldr r3, [pc, #812] ; (8033c34 ) - 8033908: 6d5b ldr r3, [r3, #84] ; 0x54 - 803390a: f003 0338 and.w r3, r3, #56 ; 0x38 - 803390e: 2b28 cmp r3, #40 ; 0x28 - 8033910: d86c bhi.n 80339ec - 8033912: a201 add r2, pc, #4 ; (adr r2, 8033918 ) - 8033914: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033918: 080339bd .word 0x080339bd - 803391c: 080339ed .word 0x080339ed - 8033920: 080339ed .word 0x080339ed - 8033924: 080339ed .word 0x080339ed - 8033928: 080339ed .word 0x080339ed - 803392c: 080339ed .word 0x080339ed - 8033930: 080339ed .word 0x080339ed - 8033934: 080339ed .word 0x080339ed - 8033938: 080339c5 .word 0x080339c5 - 803393c: 080339ed .word 0x080339ed - 8033940: 080339ed .word 0x080339ed - 8033944: 080339ed .word 0x080339ed + 803386a: e180 b.n 8033b6e + 803386c: 2304 movs r3, #4 + 803386e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033872: e17c b.n 8033b6e + 8033874: 2308 movs r3, #8 + 8033876: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803387a: e178 b.n 8033b6e + 803387c: 2310 movs r3, #16 + 803387e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033882: e174 b.n 8033b6e + 8033884: 2320 movs r3, #32 + 8033886: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803388a: e170 b.n 8033b6e + 803388c: 2340 movs r3, #64 ; 0x40 + 803388e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033892: e16c b.n 8033b6e + 8033894: 2380 movs r3, #128 ; 0x80 + 8033896: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803389a: e168 b.n 8033b6e + 803389c: 697b ldr r3, [r7, #20] + 803389e: 681b ldr r3, [r3, #0] + 80338a0: 4a1b ldr r2, [pc, #108] ; (8033910 ) + 80338a2: 4293 cmp r3, r2 + 80338a4: d142 bne.n 803392c + 80338a6: 4b16 ldr r3, [pc, #88] ; (8033900 ) + 80338a8: 6d5b ldr r3, [r3, #84] ; 0x54 + 80338aa: f003 0307 and.w r3, r3, #7 + 80338ae: 2b05 cmp r3, #5 + 80338b0: d838 bhi.n 8033924 + 80338b2: a201 add r2, pc, #4 ; (adr r2, 80338b8 ) + 80338b4: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80338b8: 080338d1 .word 0x080338d1 + 80338bc: 080338d9 .word 0x080338d9 + 80338c0: 080338e1 .word 0x080338e1 + 80338c4: 080338e9 .word 0x080338e9 + 80338c8: 08033915 .word 0x08033915 + 80338cc: 0803391d .word 0x0803391d + 80338d0: 2300 movs r3, #0 + 80338d2: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80338d6: e14a b.n 8033b6e + 80338d8: 2304 movs r3, #4 + 80338da: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80338de: e146 b.n 8033b6e + 80338e0: 2308 movs r3, #8 + 80338e2: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80338e6: e142 b.n 8033b6e + 80338e8: 2310 movs r3, #16 + 80338ea: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80338ee: e13e b.n 8033b6e + 80338f0: cfff69f3 .word 0xcfff69f3 + 80338f4: 58000c00 .word 0x58000c00 + 80338f8: 11fff4ff .word 0x11fff4ff + 80338fc: 40011000 .word 0x40011000 + 8033900: 58024400 .word 0x58024400 + 8033904: 40004400 .word 0x40004400 + 8033908: 40004800 .word 0x40004800 + 803390c: 40004c00 .word 0x40004c00 + 8033910: 40005000 .word 0x40005000 + 8033914: 2320 movs r3, #32 + 8033916: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803391a: e128 b.n 8033b6e + 803391c: 2340 movs r3, #64 ; 0x40 + 803391e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033922: e124 b.n 8033b6e + 8033924: 2380 movs r3, #128 ; 0x80 + 8033926: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803392a: e120 b.n 8033b6e + 803392c: 697b ldr r3, [r7, #20] + 803392e: 681b ldr r3, [r3, #0] + 8033930: 4acb ldr r2, [pc, #812] ; (8033c60 ) + 8033932: 4293 cmp r3, r2 + 8033934: d176 bne.n 8033a24 + 8033936: 4bcb ldr r3, [pc, #812] ; (8033c64 ) + 8033938: 6d5b ldr r3, [r3, #84] ; 0x54 + 803393a: f003 0338 and.w r3, r3, #56 ; 0x38 + 803393e: 2b28 cmp r3, #40 ; 0x28 + 8033940: d86c bhi.n 8033a1c + 8033942: a201 add r2, pc, #4 ; (adr r2, 8033948 ) + 8033944: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8033948: 080339ed .word 0x080339ed - 803394c: 080339ed .word 0x080339ed - 8033950: 080339ed .word 0x080339ed - 8033954: 080339ed .word 0x080339ed - 8033958: 080339cd .word 0x080339cd - 803395c: 080339ed .word 0x080339ed - 8033960: 080339ed .word 0x080339ed - 8033964: 080339ed .word 0x080339ed - 8033968: 080339ed .word 0x080339ed - 803396c: 080339ed .word 0x080339ed - 8033970: 080339ed .word 0x080339ed - 8033974: 080339ed .word 0x080339ed - 8033978: 080339d5 .word 0x080339d5 - 803397c: 080339ed .word 0x080339ed - 8033980: 080339ed .word 0x080339ed - 8033984: 080339ed .word 0x080339ed - 8033988: 080339ed .word 0x080339ed - 803398c: 080339ed .word 0x080339ed - 8033990: 080339ed .word 0x080339ed - 8033994: 080339ed .word 0x080339ed - 8033998: 080339dd .word 0x080339dd - 803399c: 080339ed .word 0x080339ed - 80339a0: 080339ed .word 0x080339ed - 80339a4: 080339ed .word 0x080339ed - 80339a8: 080339ed .word 0x080339ed - 80339ac: 080339ed .word 0x080339ed - 80339b0: 080339ed .word 0x080339ed - 80339b4: 080339ed .word 0x080339ed - 80339b8: 080339e5 .word 0x080339e5 - 80339bc: 2301 movs r3, #1 - 80339be: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80339c2: e0bc b.n 8033b3e - 80339c4: 2304 movs r3, #4 - 80339c6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80339ca: e0b8 b.n 8033b3e - 80339cc: 2308 movs r3, #8 - 80339ce: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80339d2: e0b4 b.n 8033b3e - 80339d4: 2310 movs r3, #16 - 80339d6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80339da: e0b0 b.n 8033b3e - 80339dc: 2320 movs r3, #32 - 80339de: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80339e2: e0ac b.n 8033b3e - 80339e4: 2340 movs r3, #64 ; 0x40 - 80339e6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80339ea: e0a8 b.n 8033b3e - 80339ec: 2380 movs r3, #128 ; 0x80 + 803394c: 08033a1d .word 0x08033a1d + 8033950: 08033a1d .word 0x08033a1d + 8033954: 08033a1d .word 0x08033a1d + 8033958: 08033a1d .word 0x08033a1d + 803395c: 08033a1d .word 0x08033a1d + 8033960: 08033a1d .word 0x08033a1d + 8033964: 08033a1d .word 0x08033a1d + 8033968: 080339f5 .word 0x080339f5 + 803396c: 08033a1d .word 0x08033a1d + 8033970: 08033a1d .word 0x08033a1d + 8033974: 08033a1d .word 0x08033a1d + 8033978: 08033a1d .word 0x08033a1d + 803397c: 08033a1d .word 0x08033a1d + 8033980: 08033a1d .word 0x08033a1d + 8033984: 08033a1d .word 0x08033a1d + 8033988: 080339fd .word 0x080339fd + 803398c: 08033a1d .word 0x08033a1d + 8033990: 08033a1d .word 0x08033a1d + 8033994: 08033a1d .word 0x08033a1d + 8033998: 08033a1d .word 0x08033a1d + 803399c: 08033a1d .word 0x08033a1d + 80339a0: 08033a1d .word 0x08033a1d + 80339a4: 08033a1d .word 0x08033a1d + 80339a8: 08033a05 .word 0x08033a05 + 80339ac: 08033a1d .word 0x08033a1d + 80339b0: 08033a1d .word 0x08033a1d + 80339b4: 08033a1d .word 0x08033a1d + 80339b8: 08033a1d .word 0x08033a1d + 80339bc: 08033a1d .word 0x08033a1d + 80339c0: 08033a1d .word 0x08033a1d + 80339c4: 08033a1d .word 0x08033a1d + 80339c8: 08033a0d .word 0x08033a0d + 80339cc: 08033a1d .word 0x08033a1d + 80339d0: 08033a1d .word 0x08033a1d + 80339d4: 08033a1d .word 0x08033a1d + 80339d8: 08033a1d .word 0x08033a1d + 80339dc: 08033a1d .word 0x08033a1d + 80339e0: 08033a1d .word 0x08033a1d + 80339e4: 08033a1d .word 0x08033a1d + 80339e8: 08033a15 .word 0x08033a15 + 80339ec: 2301 movs r3, #1 80339ee: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80339f2: e0a4 b.n 8033b3e - 80339f4: 697b ldr r3, [r7, #20] - 80339f6: 681b ldr r3, [r3, #0] - 80339f8: 4a8f ldr r2, [pc, #572] ; (8033c38 ) - 80339fa: 4293 cmp r3, r2 - 80339fc: d130 bne.n 8033a60 - 80339fe: 4b8d ldr r3, [pc, #564] ; (8033c34 ) - 8033a00: 6d5b ldr r3, [r3, #84] ; 0x54 - 8033a02: f003 0307 and.w r3, r3, #7 - 8033a06: 2b05 cmp r3, #5 - 8033a08: d826 bhi.n 8033a58 - 8033a0a: a201 add r2, pc, #4 ; (adr r2, 8033a10 ) - 8033a0c: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033a10: 08033a29 .word 0x08033a29 - 8033a14: 08033a31 .word 0x08033a31 - 8033a18: 08033a39 .word 0x08033a39 - 8033a1c: 08033a41 .word 0x08033a41 - 8033a20: 08033a49 .word 0x08033a49 - 8033a24: 08033a51 .word 0x08033a51 - 8033a28: 2300 movs r3, #0 - 8033a2a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a2e: e086 b.n 8033b3e - 8033a30: 2304 movs r3, #4 - 8033a32: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a36: e082 b.n 8033b3e - 8033a38: 2308 movs r3, #8 - 8033a3a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a3e: e07e b.n 8033b3e - 8033a40: 2310 movs r3, #16 - 8033a42: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a46: e07a b.n 8033b3e - 8033a48: 2320 movs r3, #32 - 8033a4a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a4e: e076 b.n 8033b3e - 8033a50: 2340 movs r3, #64 ; 0x40 - 8033a52: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a56: e072 b.n 8033b3e - 8033a58: 2380 movs r3, #128 ; 0x80 + 80339f2: e0bc b.n 8033b6e + 80339f4: 2304 movs r3, #4 + 80339f6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80339fa: e0b8 b.n 8033b6e + 80339fc: 2308 movs r3, #8 + 80339fe: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a02: e0b4 b.n 8033b6e + 8033a04: 2310 movs r3, #16 + 8033a06: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a0a: e0b0 b.n 8033b6e + 8033a0c: 2320 movs r3, #32 + 8033a0e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a12: e0ac b.n 8033b6e + 8033a14: 2340 movs r3, #64 ; 0x40 + 8033a16: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a1a: e0a8 b.n 8033b6e + 8033a1c: 2380 movs r3, #128 ; 0x80 + 8033a1e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a22: e0a4 b.n 8033b6e + 8033a24: 697b ldr r3, [r7, #20] + 8033a26: 681b ldr r3, [r3, #0] + 8033a28: 4a8f ldr r2, [pc, #572] ; (8033c68 ) + 8033a2a: 4293 cmp r3, r2 + 8033a2c: d130 bne.n 8033a90 + 8033a2e: 4b8d ldr r3, [pc, #564] ; (8033c64 ) + 8033a30: 6d5b ldr r3, [r3, #84] ; 0x54 + 8033a32: f003 0307 and.w r3, r3, #7 + 8033a36: 2b05 cmp r3, #5 + 8033a38: d826 bhi.n 8033a88 + 8033a3a: a201 add r2, pc, #4 ; (adr r2, 8033a40 ) + 8033a3c: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033a40: 08033a59 .word 0x08033a59 + 8033a44: 08033a61 .word 0x08033a61 + 8033a48: 08033a69 .word 0x08033a69 + 8033a4c: 08033a71 .word 0x08033a71 + 8033a50: 08033a79 .word 0x08033a79 + 8033a54: 08033a81 .word 0x08033a81 + 8033a58: 2300 movs r3, #0 8033a5a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a5e: e06e b.n 8033b3e - 8033a60: 697b ldr r3, [r7, #20] - 8033a62: 681b ldr r3, [r3, #0] - 8033a64: 4a75 ldr r2, [pc, #468] ; (8033c3c ) - 8033a66: 4293 cmp r3, r2 - 8033a68: d130 bne.n 8033acc - 8033a6a: 4b72 ldr r3, [pc, #456] ; (8033c34 ) - 8033a6c: 6d5b ldr r3, [r3, #84] ; 0x54 - 8033a6e: f003 0307 and.w r3, r3, #7 - 8033a72: 2b05 cmp r3, #5 - 8033a74: d826 bhi.n 8033ac4 - 8033a76: a201 add r2, pc, #4 ; (adr r2, 8033a7c ) - 8033a78: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033a7c: 08033a95 .word 0x08033a95 - 8033a80: 08033a9d .word 0x08033a9d - 8033a84: 08033aa5 .word 0x08033aa5 - 8033a88: 08033aad .word 0x08033aad - 8033a8c: 08033ab5 .word 0x08033ab5 - 8033a90: 08033abd .word 0x08033abd - 8033a94: 2300 movs r3, #0 - 8033a96: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a9a: e050 b.n 8033b3e - 8033a9c: 2304 movs r3, #4 - 8033a9e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033aa2: e04c b.n 8033b3e - 8033aa4: 2308 movs r3, #8 - 8033aa6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033aaa: e048 b.n 8033b3e - 8033aac: 2310 movs r3, #16 - 8033aae: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033ab2: e044 b.n 8033b3e - 8033ab4: 2320 movs r3, #32 - 8033ab6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033aba: e040 b.n 8033b3e - 8033abc: 2340 movs r3, #64 ; 0x40 - 8033abe: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033ac2: e03c b.n 8033b3e - 8033ac4: 2380 movs r3, #128 ; 0x80 + 8033a5e: e086 b.n 8033b6e + 8033a60: 2304 movs r3, #4 + 8033a62: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a66: e082 b.n 8033b6e + 8033a68: 2308 movs r3, #8 + 8033a6a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a6e: e07e b.n 8033b6e + 8033a70: 2310 movs r3, #16 + 8033a72: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a76: e07a b.n 8033b6e + 8033a78: 2320 movs r3, #32 + 8033a7a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a7e: e076 b.n 8033b6e + 8033a80: 2340 movs r3, #64 ; 0x40 + 8033a82: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a86: e072 b.n 8033b6e + 8033a88: 2380 movs r3, #128 ; 0x80 + 8033a8a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a8e: e06e b.n 8033b6e + 8033a90: 697b ldr r3, [r7, #20] + 8033a92: 681b ldr r3, [r3, #0] + 8033a94: 4a75 ldr r2, [pc, #468] ; (8033c6c ) + 8033a96: 4293 cmp r3, r2 + 8033a98: d130 bne.n 8033afc + 8033a9a: 4b72 ldr r3, [pc, #456] ; (8033c64 ) + 8033a9c: 6d5b ldr r3, [r3, #84] ; 0x54 + 8033a9e: f003 0307 and.w r3, r3, #7 + 8033aa2: 2b05 cmp r3, #5 + 8033aa4: d826 bhi.n 8033af4 + 8033aa6: a201 add r2, pc, #4 ; (adr r2, 8033aac ) + 8033aa8: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033aac: 08033ac5 .word 0x08033ac5 + 8033ab0: 08033acd .word 0x08033acd + 8033ab4: 08033ad5 .word 0x08033ad5 + 8033ab8: 08033add .word 0x08033add + 8033abc: 08033ae5 .word 0x08033ae5 + 8033ac0: 08033aed .word 0x08033aed + 8033ac4: 2300 movs r3, #0 8033ac6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033aca: e038 b.n 8033b3e - 8033acc: 697b ldr r3, [r7, #20] - 8033ace: 681b ldr r3, [r3, #0] - 8033ad0: 4a5b ldr r2, [pc, #364] ; (8033c40 ) - 8033ad2: 4293 cmp r3, r2 - 8033ad4: d130 bne.n 8033b38 - 8033ad6: 4b57 ldr r3, [pc, #348] ; (8033c34 ) - 8033ad8: 6d9b ldr r3, [r3, #88] ; 0x58 - 8033ada: f003 0307 and.w r3, r3, #7 - 8033ade: 2b05 cmp r3, #5 - 8033ae0: d826 bhi.n 8033b30 - 8033ae2: a201 add r2, pc, #4 ; (adr r2, 8033ae8 ) - 8033ae4: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033ae8: 08033b01 .word 0x08033b01 - 8033aec: 08033b09 .word 0x08033b09 - 8033af0: 08033b11 .word 0x08033b11 - 8033af4: 08033b19 .word 0x08033b19 - 8033af8: 08033b21 .word 0x08033b21 - 8033afc: 08033b29 .word 0x08033b29 - 8033b00: 2302 movs r3, #2 - 8033b02: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b06: e01a b.n 8033b3e - 8033b08: 2304 movs r3, #4 - 8033b0a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b0e: e016 b.n 8033b3e - 8033b10: 2308 movs r3, #8 - 8033b12: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b16: e012 b.n 8033b3e - 8033b18: 2310 movs r3, #16 - 8033b1a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b1e: e00e b.n 8033b3e - 8033b20: 2320 movs r3, #32 - 8033b22: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b26: e00a b.n 8033b3e - 8033b28: 2340 movs r3, #64 ; 0x40 - 8033b2a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b2e: e006 b.n 8033b3e - 8033b30: 2380 movs r3, #128 ; 0x80 + 8033aca: e050 b.n 8033b6e + 8033acc: 2304 movs r3, #4 + 8033ace: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033ad2: e04c b.n 8033b6e + 8033ad4: 2308 movs r3, #8 + 8033ad6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033ada: e048 b.n 8033b6e + 8033adc: 2310 movs r3, #16 + 8033ade: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033ae2: e044 b.n 8033b6e + 8033ae4: 2320 movs r3, #32 + 8033ae6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033aea: e040 b.n 8033b6e + 8033aec: 2340 movs r3, #64 ; 0x40 + 8033aee: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033af2: e03c b.n 8033b6e + 8033af4: 2380 movs r3, #128 ; 0x80 + 8033af6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033afa: e038 b.n 8033b6e + 8033afc: 697b ldr r3, [r7, #20] + 8033afe: 681b ldr r3, [r3, #0] + 8033b00: 4a5b ldr r2, [pc, #364] ; (8033c70 ) + 8033b02: 4293 cmp r3, r2 + 8033b04: d130 bne.n 8033b68 + 8033b06: 4b57 ldr r3, [pc, #348] ; (8033c64 ) + 8033b08: 6d9b ldr r3, [r3, #88] ; 0x58 + 8033b0a: f003 0307 and.w r3, r3, #7 + 8033b0e: 2b05 cmp r3, #5 + 8033b10: d826 bhi.n 8033b60 + 8033b12: a201 add r2, pc, #4 ; (adr r2, 8033b18 ) + 8033b14: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033b18: 08033b31 .word 0x08033b31 + 8033b1c: 08033b39 .word 0x08033b39 + 8033b20: 08033b41 .word 0x08033b41 + 8033b24: 08033b49 .word 0x08033b49 + 8033b28: 08033b51 .word 0x08033b51 + 8033b2c: 08033b59 .word 0x08033b59 + 8033b30: 2302 movs r3, #2 8033b32: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b36: e002 b.n 8033b3e - 8033b38: 2380 movs r3, #128 ; 0x80 + 8033b36: e01a b.n 8033b6e + 8033b38: 2304 movs r3, #4 8033b3a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b3e: e016 b.n 8033b6e + 8033b40: 2308 movs r3, #8 + 8033b42: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b46: e012 b.n 8033b6e + 8033b48: 2310 movs r3, #16 + 8033b4a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b4e: e00e b.n 8033b6e + 8033b50: 2320 movs r3, #32 + 8033b52: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b56: e00a b.n 8033b6e + 8033b58: 2340 movs r3, #64 ; 0x40 + 8033b5a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b5e: e006 b.n 8033b6e + 8033b60: 2380 movs r3, #128 ; 0x80 + 8033b62: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b66: e002 b.n 8033b6e + 8033b68: 2380 movs r3, #128 ; 0x80 + 8033b6a: f887 3043 strb.w r3, [r7, #67] ; 0x43 /* Check LPUART instance */ if (UART_INSTANCE_LOWPOWER(huart)) - 8033b3e: 697b ldr r3, [r7, #20] - 8033b40: 681b ldr r3, [r3, #0] - 8033b42: 4a3f ldr r2, [pc, #252] ; (8033c40 ) - 8033b44: 4293 cmp r3, r2 - 8033b46: f040 80f8 bne.w 8033d3a + 8033b6e: 697b ldr r3, [r7, #20] + 8033b70: 681b ldr r3, [r3, #0] + 8033b72: 4a3f ldr r2, [pc, #252] ; (8033c70 ) + 8033b74: 4293 cmp r3, r2 + 8033b76: f040 80f8 bne.w 8033d6a { /* Retrieve frequency clock */ switch (clocksource) - 8033b4a: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 - 8033b4e: 2b20 cmp r3, #32 - 8033b50: dc46 bgt.n 8033be0 - 8033b52: 2b02 cmp r3, #2 - 8033b54: f2c0 8082 blt.w 8033c5c - 8033b58: 3b02 subs r3, #2 - 8033b5a: 2b1e cmp r3, #30 - 8033b5c: d87e bhi.n 8033c5c - 8033b5e: a201 add r2, pc, #4 ; (adr r2, 8033b64 ) - 8033b60: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033b64: 08033be7 .word 0x08033be7 - 8033b68: 08033c5d .word 0x08033c5d - 8033b6c: 08033bef .word 0x08033bef - 8033b70: 08033c5d .word 0x08033c5d - 8033b74: 08033c5d .word 0x08033c5d - 8033b78: 08033c5d .word 0x08033c5d - 8033b7c: 08033bff .word 0x08033bff - 8033b80: 08033c5d .word 0x08033c5d - 8033b84: 08033c5d .word 0x08033c5d - 8033b88: 08033c5d .word 0x08033c5d - 8033b8c: 08033c5d .word 0x08033c5d - 8033b90: 08033c5d .word 0x08033c5d - 8033b94: 08033c5d .word 0x08033c5d - 8033b98: 08033c5d .word 0x08033c5d - 8033b9c: 08033c0f .word 0x08033c0f - 8033ba0: 08033c5d .word 0x08033c5d - 8033ba4: 08033c5d .word 0x08033c5d - 8033ba8: 08033c5d .word 0x08033c5d - 8033bac: 08033c5d .word 0x08033c5d - 8033bb0: 08033c5d .word 0x08033c5d - 8033bb4: 08033c5d .word 0x08033c5d - 8033bb8: 08033c5d .word 0x08033c5d - 8033bbc: 08033c5d .word 0x08033c5d - 8033bc0: 08033c5d .word 0x08033c5d - 8033bc4: 08033c5d .word 0x08033c5d - 8033bc8: 08033c5d .word 0x08033c5d - 8033bcc: 08033c5d .word 0x08033c5d - 8033bd0: 08033c5d .word 0x08033c5d - 8033bd4: 08033c5d .word 0x08033c5d - 8033bd8: 08033c5d .word 0x08033c5d - 8033bdc: 08033c4f .word 0x08033c4f - 8033be0: 2b40 cmp r3, #64 ; 0x40 - 8033be2: d037 beq.n 8033c54 - 8033be4: e03a b.n 8033c5c + 8033b7a: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 + 8033b7e: 2b20 cmp r3, #32 + 8033b80: dc46 bgt.n 8033c10 + 8033b82: 2b02 cmp r3, #2 + 8033b84: f2c0 8082 blt.w 8033c8c + 8033b88: 3b02 subs r3, #2 + 8033b8a: 2b1e cmp r3, #30 + 8033b8c: d87e bhi.n 8033c8c + 8033b8e: a201 add r2, pc, #4 ; (adr r2, 8033b94 ) + 8033b90: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033b94: 08033c17 .word 0x08033c17 + 8033b98: 08033c8d .word 0x08033c8d + 8033b9c: 08033c1f .word 0x08033c1f + 8033ba0: 08033c8d .word 0x08033c8d + 8033ba4: 08033c8d .word 0x08033c8d + 8033ba8: 08033c8d .word 0x08033c8d + 8033bac: 08033c2f .word 0x08033c2f + 8033bb0: 08033c8d .word 0x08033c8d + 8033bb4: 08033c8d .word 0x08033c8d + 8033bb8: 08033c8d .word 0x08033c8d + 8033bbc: 08033c8d .word 0x08033c8d + 8033bc0: 08033c8d .word 0x08033c8d + 8033bc4: 08033c8d .word 0x08033c8d + 8033bc8: 08033c8d .word 0x08033c8d + 8033bcc: 08033c3f .word 0x08033c3f + 8033bd0: 08033c8d .word 0x08033c8d + 8033bd4: 08033c8d .word 0x08033c8d + 8033bd8: 08033c8d .word 0x08033c8d + 8033bdc: 08033c8d .word 0x08033c8d + 8033be0: 08033c8d .word 0x08033c8d + 8033be4: 08033c8d .word 0x08033c8d + 8033be8: 08033c8d .word 0x08033c8d + 8033bec: 08033c8d .word 0x08033c8d + 8033bf0: 08033c8d .word 0x08033c8d + 8033bf4: 08033c8d .word 0x08033c8d + 8033bf8: 08033c8d .word 0x08033c8d + 8033bfc: 08033c8d .word 0x08033c8d + 8033c00: 08033c8d .word 0x08033c8d + 8033c04: 08033c8d .word 0x08033c8d + 8033c08: 08033c8d .word 0x08033c8d + 8033c0c: 08033c7f .word 0x08033c7f + 8033c10: 2b40 cmp r3, #64 ; 0x40 + 8033c12: d037 beq.n 8033c84 + 8033c14: e03a b.n 8033c8c { case UART_CLOCKSOURCE_D3PCLK1: pclk = HAL_RCCEx_GetD3PCLK1Freq(); - 8033be6: f7fd fce3 bl 80315b0 - 8033bea: 63f8 str r0, [r7, #60] ; 0x3c + 8033c16: f7fd fce3 bl 80315e0 + 8033c1a: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033bec: e03c b.n 8033c68 + 8033c1c: e03c b.n 8033c98 case UART_CLOCKSOURCE_PLL2: HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8033bee: f107 0324 add.w r3, r7, #36 ; 0x24 - 8033bf2: 4618 mov r0, r3 - 8033bf4: f7fd fcf2 bl 80315dc + 8033c1e: f107 0324 add.w r3, r7, #36 ; 0x24 + 8033c22: 4618 mov r0, r3 + 8033c24: f7fd fcf2 bl 803160c pclk = pll2_clocks.PLL2_Q_Frequency; - 8033bf8: 6abb ldr r3, [r7, #40] ; 0x28 - 8033bfa: 63fb str r3, [r7, #60] ; 0x3c + 8033c28: 6abb ldr r3, [r7, #40] ; 0x28 + 8033c2a: 63fb str r3, [r7, #60] ; 0x3c break; - 8033bfc: e034 b.n 8033c68 + 8033c2c: e034 b.n 8033c98 case UART_CLOCKSOURCE_PLL3: HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8033bfe: f107 0318 add.w r3, r7, #24 - 8033c02: 4618 mov r0, r3 - 8033c04: f7fd fe3e bl 8031884 + 8033c2e: f107 0318 add.w r3, r7, #24 + 8033c32: 4618 mov r0, r3 + 8033c34: f7fd fe3e bl 80318b4 pclk = pll3_clocks.PLL3_Q_Frequency; - 8033c08: 69fb ldr r3, [r7, #28] - 8033c0a: 63fb str r3, [r7, #60] ; 0x3c + 8033c38: 69fb ldr r3, [r7, #28] + 8033c3a: 63fb str r3, [r7, #60] ; 0x3c break; - 8033c0c: e02c b.n 8033c68 + 8033c3c: e02c b.n 8033c98 case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8033c0e: 4b09 ldr r3, [pc, #36] ; (8033c34 ) - 8033c10: 681b ldr r3, [r3, #0] - 8033c12: f003 0320 and.w r3, r3, #32 - 8033c16: 2b00 cmp r3, #0 - 8033c18: d016 beq.n 8033c48 + 8033c3e: 4b09 ldr r3, [pc, #36] ; (8033c64 ) + 8033c40: 681b ldr r3, [r3, #0] + 8033c42: f003 0320 and.w r3, r3, #32 + 8033c46: 2b00 cmp r3, #0 + 8033c48: d016 beq.n 8033c78 { pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U)); - 8033c1a: 4b06 ldr r3, [pc, #24] ; (8033c34 ) - 8033c1c: 681b ldr r3, [r3, #0] - 8033c1e: 08db lsrs r3, r3, #3 - 8033c20: f003 0303 and.w r3, r3, #3 - 8033c24: 4a07 ldr r2, [pc, #28] ; (8033c44 ) - 8033c26: fa22 f303 lsr.w r3, r2, r3 - 8033c2a: 63fb str r3, [r7, #60] ; 0x3c + 8033c4a: 4b06 ldr r3, [pc, #24] ; (8033c64 ) + 8033c4c: 681b ldr r3, [r3, #0] + 8033c4e: 08db lsrs r3, r3, #3 + 8033c50: f003 0303 and.w r3, r3, #3 + 8033c54: 4a07 ldr r2, [pc, #28] ; (8033c74 ) + 8033c56: fa22 f303 lsr.w r3, r2, r3 + 8033c5a: 63fb str r3, [r7, #60] ; 0x3c } else { pclk = (uint32_t) HSI_VALUE; } break; - 8033c2c: e01c b.n 8033c68 - 8033c2e: bf00 nop - 8033c30: 40011400 .word 0x40011400 - 8033c34: 58024400 .word 0x58024400 - 8033c38: 40007800 .word 0x40007800 - 8033c3c: 40007c00 .word 0x40007c00 - 8033c40: 58000c00 .word 0x58000c00 - 8033c44: 03d09000 .word 0x03d09000 + 8033c5c: e01c b.n 8033c98 + 8033c5e: bf00 nop + 8033c60: 40011400 .word 0x40011400 + 8033c64: 58024400 .word 0x58024400 + 8033c68: 40007800 .word 0x40007800 + 8033c6c: 40007c00 .word 0x40007c00 + 8033c70: 58000c00 .word 0x58000c00 + 8033c74: 03d09000 .word 0x03d09000 pclk = (uint32_t) HSI_VALUE; - 8033c48: 4b9d ldr r3, [pc, #628] ; (8033ec0 ) - 8033c4a: 63fb str r3, [r7, #60] ; 0x3c + 8033c78: 4b9d ldr r3, [pc, #628] ; (8033ef0 ) + 8033c7a: 63fb str r3, [r7, #60] ; 0x3c break; - 8033c4c: e00c b.n 8033c68 + 8033c7c: e00c b.n 8033c98 case UART_CLOCKSOURCE_CSI: pclk = (uint32_t) CSI_VALUE; - 8033c4e: 4b9d ldr r3, [pc, #628] ; (8033ec4 ) - 8033c50: 63fb str r3, [r7, #60] ; 0x3c + 8033c7e: 4b9d ldr r3, [pc, #628] ; (8033ef4 ) + 8033c80: 63fb str r3, [r7, #60] ; 0x3c break; - 8033c52: e009 b.n 8033c68 + 8033c82: e009 b.n 8033c98 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 8033c54: f44f 4300 mov.w r3, #32768 ; 0x8000 - 8033c58: 63fb str r3, [r7, #60] ; 0x3c + 8033c84: f44f 4300 mov.w r3, #32768 ; 0x8000 + 8033c88: 63fb str r3, [r7, #60] ; 0x3c break; - 8033c5a: e005 b.n 8033c68 + 8033c8a: e005 b.n 8033c98 default: pclk = 0U; - 8033c5c: 2300 movs r3, #0 - 8033c5e: 63fb str r3, [r7, #60] ; 0x3c + 8033c8c: 2300 movs r3, #0 + 8033c8e: 63fb str r3, [r7, #60] ; 0x3c ret = HAL_ERROR; - 8033c60: 2301 movs r3, #1 - 8033c62: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033c90: 2301 movs r3, #1 + 8033c92: f887 3042 strb.w r3, [r7, #66] ; 0x42 break; - 8033c66: bf00 nop + 8033c96: bf00 nop } /* If proper clock source reported */ if (pclk != 0U) - 8033c68: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033c6a: 2b00 cmp r3, #0 - 8033c6c: f000 81de beq.w 803402c + 8033c98: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033c9a: 2b00 cmp r3, #0 + 8033c9c: f000 81de beq.w 803405c { /* Compute clock after Prescaler */ lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]); - 8033c70: 697b ldr r3, [r7, #20] - 8033c72: 6a5b ldr r3, [r3, #36] ; 0x24 - 8033c74: 4a94 ldr r2, [pc, #592] ; (8033ec8 ) - 8033c76: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8033c7a: 461a mov r2, r3 - 8033c7c: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033c7e: fbb3 f3f2 udiv r3, r3, r2 - 8033c82: 633b str r3, [r7, #48] ; 0x30 + 8033ca0: 697b ldr r3, [r7, #20] + 8033ca2: 6a5b ldr r3, [r3, #36] ; 0x24 + 8033ca4: 4a94 ldr r2, [pc, #592] ; (8033ef8 ) + 8033ca6: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8033caa: 461a mov r2, r3 + 8033cac: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033cae: fbb3 f3f2 udiv r3, r3, r2 + 8033cb2: 633b str r3, [r7, #48] ; 0x30 /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) || - 8033c84: 697b ldr r3, [r7, #20] - 8033c86: 685a ldr r2, [r3, #4] - 8033c88: 4613 mov r3, r2 - 8033c8a: 005b lsls r3, r3, #1 - 8033c8c: 4413 add r3, r2 - 8033c8e: 6b3a ldr r2, [r7, #48] ; 0x30 - 8033c90: 429a cmp r2, r3 - 8033c92: d305 bcc.n 8033ca0 + 8033cb4: 697b ldr r3, [r7, #20] + 8033cb6: 685a ldr r2, [r3, #4] + 8033cb8: 4613 mov r3, r2 + 8033cba: 005b lsls r3, r3, #1 + 8033cbc: 4413 add r3, r2 + 8033cbe: 6b3a ldr r2, [r7, #48] ; 0x30 + 8033cc0: 429a cmp r2, r3 + 8033cc2: d305 bcc.n 8033cd0 (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate))) - 8033c94: 697b ldr r3, [r7, #20] - 8033c96: 685b ldr r3, [r3, #4] - 8033c98: 031b lsls r3, r3, #12 + 8033cc4: 697b ldr r3, [r7, #20] + 8033cc6: 685b ldr r3, [r3, #4] + 8033cc8: 031b lsls r3, r3, #12 if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) || - 8033c9a: 6b3a ldr r2, [r7, #48] ; 0x30 - 8033c9c: 429a cmp r2, r3 - 8033c9e: d903 bls.n 8033ca8 + 8033cca: 6b3a ldr r2, [r7, #48] ; 0x30 + 8033ccc: 429a cmp r2, r3 + 8033cce: d903 bls.n 8033cd8 { ret = HAL_ERROR; - 8033ca0: 2301 movs r3, #1 - 8033ca2: f887 3042 strb.w r3, [r7, #66] ; 0x42 - 8033ca6: e1c1 b.n 803402c + 8033cd0: 2301 movs r3, #1 + 8033cd2: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033cd6: e1c1 b.n 803405c } else { /* Check computed UsartDiv value is in allocated range (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */ usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 8033ca8: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033caa: 2200 movs r2, #0 - 8033cac: 60bb str r3, [r7, #8] - 8033cae: 60fa str r2, [r7, #12] - 8033cb0: 697b ldr r3, [r7, #20] - 8033cb2: 6a5b ldr r3, [r3, #36] ; 0x24 - 8033cb4: 4a84 ldr r2, [pc, #528] ; (8033ec8 ) - 8033cb6: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8033cba: b29b uxth r3, r3 - 8033cbc: 2200 movs r2, #0 - 8033cbe: 603b str r3, [r7, #0] - 8033cc0: 607a str r2, [r7, #4] - 8033cc2: e9d7 2300 ldrd r2, r3, [r7] - 8033cc6: e9d7 0102 ldrd r0, r1, [r7, #8] - 8033cca: f7ec fb71 bl 80203b0 <__aeabi_uldivmod> - 8033cce: 4602 mov r2, r0 - 8033cd0: 460b mov r3, r1 - 8033cd2: 4610 mov r0, r2 - 8033cd4: 4619 mov r1, r3 - 8033cd6: f04f 0200 mov.w r2, #0 - 8033cda: f04f 0300 mov.w r3, #0 - 8033cde: 020b lsls r3, r1, #8 - 8033ce0: ea43 6310 orr.w r3, r3, r0, lsr #24 - 8033ce4: 0202 lsls r2, r0, #8 - 8033ce6: 6979 ldr r1, [r7, #20] - 8033ce8: 6849 ldr r1, [r1, #4] - 8033cea: 0849 lsrs r1, r1, #1 - 8033cec: 2000 movs r0, #0 - 8033cee: 460c mov r4, r1 - 8033cf0: 4605 mov r5, r0 - 8033cf2: eb12 0804 adds.w r8, r2, r4 - 8033cf6: eb43 0905 adc.w r9, r3, r5 - 8033cfa: 697b ldr r3, [r7, #20] - 8033cfc: 685b ldr r3, [r3, #4] - 8033cfe: 2200 movs r2, #0 - 8033d00: 469a mov sl, r3 - 8033d02: 4693 mov fp, r2 - 8033d04: 4652 mov r2, sl - 8033d06: 465b mov r3, fp - 8033d08: 4640 mov r0, r8 - 8033d0a: 4649 mov r1, r9 - 8033d0c: f7ec fb50 bl 80203b0 <__aeabi_uldivmod> - 8033d10: 4602 mov r2, r0 - 8033d12: 460b mov r3, r1 - 8033d14: 4613 mov r3, r2 - 8033d16: 63bb str r3, [r7, #56] ; 0x38 + 8033cd8: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033cda: 2200 movs r2, #0 + 8033cdc: 60bb str r3, [r7, #8] + 8033cde: 60fa str r2, [r7, #12] + 8033ce0: 697b ldr r3, [r7, #20] + 8033ce2: 6a5b ldr r3, [r3, #36] ; 0x24 + 8033ce4: 4a84 ldr r2, [pc, #528] ; (8033ef8 ) + 8033ce6: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8033cea: b29b uxth r3, r3 + 8033cec: 2200 movs r2, #0 + 8033cee: 603b str r3, [r7, #0] + 8033cf0: 607a str r2, [r7, #4] + 8033cf2: e9d7 2300 ldrd r2, r3, [r7] + 8033cf6: e9d7 0102 ldrd r0, r1, [r7, #8] + 8033cfa: f7ec fb59 bl 80203b0 <__aeabi_uldivmod> + 8033cfe: 4602 mov r2, r0 + 8033d00: 460b mov r3, r1 + 8033d02: 4610 mov r0, r2 + 8033d04: 4619 mov r1, r3 + 8033d06: f04f 0200 mov.w r2, #0 + 8033d0a: f04f 0300 mov.w r3, #0 + 8033d0e: 020b lsls r3, r1, #8 + 8033d10: ea43 6310 orr.w r3, r3, r0, lsr #24 + 8033d14: 0202 lsls r2, r0, #8 + 8033d16: 6979 ldr r1, [r7, #20] + 8033d18: 6849 ldr r1, [r1, #4] + 8033d1a: 0849 lsrs r1, r1, #1 + 8033d1c: 2000 movs r0, #0 + 8033d1e: 460c mov r4, r1 + 8033d20: 4605 mov r5, r0 + 8033d22: eb12 0804 adds.w r8, r2, r4 + 8033d26: eb43 0905 adc.w r9, r3, r5 + 8033d2a: 697b ldr r3, [r7, #20] + 8033d2c: 685b ldr r3, [r3, #4] + 8033d2e: 2200 movs r2, #0 + 8033d30: 469a mov sl, r3 + 8033d32: 4693 mov fp, r2 + 8033d34: 4652 mov r2, sl + 8033d36: 465b mov r3, fp + 8033d38: 4640 mov r0, r8 + 8033d3a: 4649 mov r1, r9 + 8033d3c: f7ec fb38 bl 80203b0 <__aeabi_uldivmod> + 8033d40: 4602 mov r2, r0 + 8033d42: 460b mov r3, r1 + 8033d44: 4613 mov r3, r2 + 8033d46: 63bb str r3, [r7, #56] ; 0x38 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX)) - 8033d18: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033d1a: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 8033d1e: d308 bcc.n 8033d32 - 8033d20: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033d22: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8033d26: d204 bcs.n 8033d32 + 8033d48: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033d4a: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 8033d4e: d308 bcc.n 8033d62 + 8033d50: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033d52: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8033d56: d204 bcs.n 8033d62 { huart->Instance->BRR = usartdiv; - 8033d28: 697b ldr r3, [r7, #20] - 8033d2a: 681b ldr r3, [r3, #0] - 8033d2c: 6bba ldr r2, [r7, #56] ; 0x38 - 8033d2e: 60da str r2, [r3, #12] - 8033d30: e17c b.n 803402c + 8033d58: 697b ldr r3, [r7, #20] + 8033d5a: 681b ldr r3, [r3, #0] + 8033d5c: 6bba ldr r2, [r7, #56] ; 0x38 + 8033d5e: 60da str r2, [r3, #12] + 8033d60: e17c b.n 803405c } else { ret = HAL_ERROR; - 8033d32: 2301 movs r3, #1 - 8033d34: f887 3042 strb.w r3, [r7, #66] ; 0x42 - 8033d38: e178 b.n 803402c + 8033d62: 2301 movs r3, #1 + 8033d64: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033d68: e178 b.n 803405c } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */ } /* if (pclk != 0) */ } /* Check UART Over Sampling to set Baud Rate Register */ else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 8033d3a: 697b ldr r3, [r7, #20] - 8033d3c: 69db ldr r3, [r3, #28] - 8033d3e: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8033d42: f040 80c5 bne.w 8033ed0 + 8033d6a: 697b ldr r3, [r7, #20] + 8033d6c: 69db ldr r3, [r3, #28] + 8033d6e: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 8033d72: f040 80c5 bne.w 8033f00 { switch (clocksource) - 8033d46: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 - 8033d4a: 2b20 cmp r3, #32 - 8033d4c: dc48 bgt.n 8033de0 - 8033d4e: 2b00 cmp r3, #0 - 8033d50: db7b blt.n 8033e4a - 8033d52: 2b20 cmp r3, #32 - 8033d54: d879 bhi.n 8033e4a - 8033d56: a201 add r2, pc, #4 ; (adr r2, 8033d5c ) - 8033d58: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033d5c: 08033de7 .word 0x08033de7 - 8033d60: 08033def .word 0x08033def - 8033d64: 08033e4b .word 0x08033e4b - 8033d68: 08033e4b .word 0x08033e4b - 8033d6c: 08033df7 .word 0x08033df7 - 8033d70: 08033e4b .word 0x08033e4b - 8033d74: 08033e4b .word 0x08033e4b - 8033d78: 08033e4b .word 0x08033e4b - 8033d7c: 08033e07 .word 0x08033e07 - 8033d80: 08033e4b .word 0x08033e4b - 8033d84: 08033e4b .word 0x08033e4b - 8033d88: 08033e4b .word 0x08033e4b - 8033d8c: 08033e4b .word 0x08033e4b - 8033d90: 08033e4b .word 0x08033e4b - 8033d94: 08033e4b .word 0x08033e4b - 8033d98: 08033e4b .word 0x08033e4b - 8033d9c: 08033e17 .word 0x08033e17 - 8033da0: 08033e4b .word 0x08033e4b - 8033da4: 08033e4b .word 0x08033e4b - 8033da8: 08033e4b .word 0x08033e4b - 8033dac: 08033e4b .word 0x08033e4b - 8033db0: 08033e4b .word 0x08033e4b - 8033db4: 08033e4b .word 0x08033e4b - 8033db8: 08033e4b .word 0x08033e4b - 8033dbc: 08033e4b .word 0x08033e4b - 8033dc0: 08033e4b .word 0x08033e4b - 8033dc4: 08033e4b .word 0x08033e4b - 8033dc8: 08033e4b .word 0x08033e4b - 8033dcc: 08033e4b .word 0x08033e4b - 8033dd0: 08033e4b .word 0x08033e4b - 8033dd4: 08033e4b .word 0x08033e4b - 8033dd8: 08033e4b .word 0x08033e4b - 8033ddc: 08033e3d .word 0x08033e3d - 8033de0: 2b40 cmp r3, #64 ; 0x40 - 8033de2: d02e beq.n 8033e42 - 8033de4: e031 b.n 8033e4a + 8033d76: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 + 8033d7a: 2b20 cmp r3, #32 + 8033d7c: dc48 bgt.n 8033e10 + 8033d7e: 2b00 cmp r3, #0 + 8033d80: db7b blt.n 8033e7a + 8033d82: 2b20 cmp r3, #32 + 8033d84: d879 bhi.n 8033e7a + 8033d86: a201 add r2, pc, #4 ; (adr r2, 8033d8c ) + 8033d88: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033d8c: 08033e17 .word 0x08033e17 + 8033d90: 08033e1f .word 0x08033e1f + 8033d94: 08033e7b .word 0x08033e7b + 8033d98: 08033e7b .word 0x08033e7b + 8033d9c: 08033e27 .word 0x08033e27 + 8033da0: 08033e7b .word 0x08033e7b + 8033da4: 08033e7b .word 0x08033e7b + 8033da8: 08033e7b .word 0x08033e7b + 8033dac: 08033e37 .word 0x08033e37 + 8033db0: 08033e7b .word 0x08033e7b + 8033db4: 08033e7b .word 0x08033e7b + 8033db8: 08033e7b .word 0x08033e7b + 8033dbc: 08033e7b .word 0x08033e7b + 8033dc0: 08033e7b .word 0x08033e7b + 8033dc4: 08033e7b .word 0x08033e7b + 8033dc8: 08033e7b .word 0x08033e7b + 8033dcc: 08033e47 .word 0x08033e47 + 8033dd0: 08033e7b .word 0x08033e7b + 8033dd4: 08033e7b .word 0x08033e7b + 8033dd8: 08033e7b .word 0x08033e7b + 8033ddc: 08033e7b .word 0x08033e7b + 8033de0: 08033e7b .word 0x08033e7b + 8033de4: 08033e7b .word 0x08033e7b + 8033de8: 08033e7b .word 0x08033e7b + 8033dec: 08033e7b .word 0x08033e7b + 8033df0: 08033e7b .word 0x08033e7b + 8033df4: 08033e7b .word 0x08033e7b + 8033df8: 08033e7b .word 0x08033e7b + 8033dfc: 08033e7b .word 0x08033e7b + 8033e00: 08033e7b .word 0x08033e7b + 8033e04: 08033e7b .word 0x08033e7b + 8033e08: 08033e7b .word 0x08033e7b + 8033e0c: 08033e6d .word 0x08033e6d + 8033e10: 2b40 cmp r3, #64 ; 0x40 + 8033e12: d02e beq.n 8033e72 + 8033e14: e031 b.n 8033e7a { case UART_CLOCKSOURCE_D2PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 8033de6: f7fb ff9f bl 802fd28 - 8033dea: 63f8 str r0, [r7, #60] ; 0x3c + 8033e16: f7fb ff9f bl 802fd58 + 8033e1a: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033dec: e033 b.n 8033e56 + 8033e1c: e033 b.n 8033e86 case UART_CLOCKSOURCE_D2PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - 8033dee: f7fb ffb1 bl 802fd54 - 8033df2: 63f8 str r0, [r7, #60] ; 0x3c + 8033e1e: f7fb ffb1 bl 802fd84 + 8033e22: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033df4: e02f b.n 8033e56 + 8033e24: e02f b.n 8033e86 case UART_CLOCKSOURCE_PLL2: HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8033df6: f107 0324 add.w r3, r7, #36 ; 0x24 - 8033dfa: 4618 mov r0, r3 - 8033dfc: f7fd fbee bl 80315dc + 8033e26: f107 0324 add.w r3, r7, #36 ; 0x24 + 8033e2a: 4618 mov r0, r3 + 8033e2c: f7fd fbee bl 803160c pclk = pll2_clocks.PLL2_Q_Frequency; - 8033e00: 6abb ldr r3, [r7, #40] ; 0x28 - 8033e02: 63fb str r3, [r7, #60] ; 0x3c + 8033e30: 6abb ldr r3, [r7, #40] ; 0x28 + 8033e32: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e04: e027 b.n 8033e56 + 8033e34: e027 b.n 8033e86 case UART_CLOCKSOURCE_PLL3: HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8033e06: f107 0318 add.w r3, r7, #24 - 8033e0a: 4618 mov r0, r3 - 8033e0c: f7fd fd3a bl 8031884 + 8033e36: f107 0318 add.w r3, r7, #24 + 8033e3a: 4618 mov r0, r3 + 8033e3c: f7fd fd3a bl 80318b4 pclk = pll3_clocks.PLL3_Q_Frequency; - 8033e10: 69fb ldr r3, [r7, #28] - 8033e12: 63fb str r3, [r7, #60] ; 0x3c + 8033e40: 69fb ldr r3, [r7, #28] + 8033e42: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e14: e01f b.n 8033e56 + 8033e44: e01f b.n 8033e86 case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8033e16: 4b2d ldr r3, [pc, #180] ; (8033ecc ) - 8033e18: 681b ldr r3, [r3, #0] - 8033e1a: f003 0320 and.w r3, r3, #32 - 8033e1e: 2b00 cmp r3, #0 - 8033e20: d009 beq.n 8033e36 + 8033e46: 4b2d ldr r3, [pc, #180] ; (8033efc ) + 8033e48: 681b ldr r3, [r3, #0] + 8033e4a: f003 0320 and.w r3, r3, #32 + 8033e4e: 2b00 cmp r3, #0 + 8033e50: d009 beq.n 8033e66 { pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U)); - 8033e22: 4b2a ldr r3, [pc, #168] ; (8033ecc ) - 8033e24: 681b ldr r3, [r3, #0] - 8033e26: 08db lsrs r3, r3, #3 - 8033e28: f003 0303 and.w r3, r3, #3 - 8033e2c: 4a24 ldr r2, [pc, #144] ; (8033ec0 ) - 8033e2e: fa22 f303 lsr.w r3, r2, r3 - 8033e32: 63fb str r3, [r7, #60] ; 0x3c + 8033e52: 4b2a ldr r3, [pc, #168] ; (8033efc ) + 8033e54: 681b ldr r3, [r3, #0] + 8033e56: 08db lsrs r3, r3, #3 + 8033e58: f003 0303 and.w r3, r3, #3 + 8033e5c: 4a24 ldr r2, [pc, #144] ; (8033ef0 ) + 8033e5e: fa22 f303 lsr.w r3, r2, r3 + 8033e62: 63fb str r3, [r7, #60] ; 0x3c } else { pclk = (uint32_t) HSI_VALUE; } break; - 8033e34: e00f b.n 8033e56 + 8033e64: e00f b.n 8033e86 pclk = (uint32_t) HSI_VALUE; - 8033e36: 4b22 ldr r3, [pc, #136] ; (8033ec0 ) - 8033e38: 63fb str r3, [r7, #60] ; 0x3c + 8033e66: 4b22 ldr r3, [pc, #136] ; (8033ef0 ) + 8033e68: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e3a: e00c b.n 8033e56 + 8033e6a: e00c b.n 8033e86 case UART_CLOCKSOURCE_CSI: pclk = (uint32_t) CSI_VALUE; - 8033e3c: 4b21 ldr r3, [pc, #132] ; (8033ec4 ) - 8033e3e: 63fb str r3, [r7, #60] ; 0x3c + 8033e6c: 4b21 ldr r3, [pc, #132] ; (8033ef4 ) + 8033e6e: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e40: e009 b.n 8033e56 + 8033e70: e009 b.n 8033e86 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 8033e42: f44f 4300 mov.w r3, #32768 ; 0x8000 - 8033e46: 63fb str r3, [r7, #60] ; 0x3c + 8033e72: f44f 4300 mov.w r3, #32768 ; 0x8000 + 8033e76: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e48: e005 b.n 8033e56 + 8033e78: e005 b.n 8033e86 default: pclk = 0U; - 8033e4a: 2300 movs r3, #0 - 8033e4c: 63fb str r3, [r7, #60] ; 0x3c + 8033e7a: 2300 movs r3, #0 + 8033e7c: 63fb str r3, [r7, #60] ; 0x3c ret = HAL_ERROR; - 8033e4e: 2301 movs r3, #1 - 8033e50: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033e7e: 2301 movs r3, #1 + 8033e80: f887 3042 strb.w r3, [r7, #66] ; 0x42 break; - 8033e54: bf00 nop + 8033e84: bf00 nop } /* USARTDIV must be greater than or equal to 0d16 */ if (pclk != 0U) - 8033e56: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033e58: 2b00 cmp r3, #0 - 8033e5a: f000 80e7 beq.w 803402c + 8033e86: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033e88: 2b00 cmp r3, #0 + 8033e8a: f000 80e7 beq.w 803405c { usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 8033e5e: 697b ldr r3, [r7, #20] - 8033e60: 6a5b ldr r3, [r3, #36] ; 0x24 - 8033e62: 4a19 ldr r2, [pc, #100] ; (8033ec8 ) - 8033e64: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8033e68: 461a mov r2, r3 - 8033e6a: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033e6c: fbb3 f3f2 udiv r3, r3, r2 - 8033e70: 005a lsls r2, r3, #1 - 8033e72: 697b ldr r3, [r7, #20] - 8033e74: 685b ldr r3, [r3, #4] - 8033e76: 085b lsrs r3, r3, #1 - 8033e78: 441a add r2, r3 - 8033e7a: 697b ldr r3, [r7, #20] - 8033e7c: 685b ldr r3, [r3, #4] - 8033e7e: fbb2 f3f3 udiv r3, r2, r3 - 8033e82: 63bb str r3, [r7, #56] ; 0x38 + 8033e8e: 697b ldr r3, [r7, #20] + 8033e90: 6a5b ldr r3, [r3, #36] ; 0x24 + 8033e92: 4a19 ldr r2, [pc, #100] ; (8033ef8 ) + 8033e94: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8033e98: 461a mov r2, r3 + 8033e9a: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033e9c: fbb3 f3f2 udiv r3, r3, r2 + 8033ea0: 005a lsls r2, r3, #1 + 8033ea2: 697b ldr r3, [r7, #20] + 8033ea4: 685b ldr r3, [r3, #4] + 8033ea6: 085b lsrs r3, r3, #1 + 8033ea8: 441a add r2, r3 + 8033eaa: 697b ldr r3, [r7, #20] + 8033eac: 685b ldr r3, [r3, #4] + 8033eae: fbb2 f3f3 udiv r3, r2, r3 + 8033eb2: 63bb str r3, [r7, #56] ; 0x38 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 8033e84: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033e86: 2b0f cmp r3, #15 - 8033e88: d916 bls.n 8033eb8 - 8033e8a: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033e8c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8033e90: d212 bcs.n 8033eb8 + 8033eb4: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033eb6: 2b0f cmp r3, #15 + 8033eb8: d916 bls.n 8033ee8 + 8033eba: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033ebc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8033ec0: d212 bcs.n 8033ee8 { brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 8033e92: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033e94: b29b uxth r3, r3 - 8033e96: f023 030f bic.w r3, r3, #15 - 8033e9a: 86fb strh r3, [r7, #54] ; 0x36 + 8033ec2: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033ec4: b29b uxth r3, r3 + 8033ec6: f023 030f bic.w r3, r3, #15 + 8033eca: 86fb strh r3, [r7, #54] ; 0x36 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 8033e9c: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033e9e: 085b lsrs r3, r3, #1 - 8033ea0: b29b uxth r3, r3 - 8033ea2: f003 0307 and.w r3, r3, #7 - 8033ea6: b29a uxth r2, r3 - 8033ea8: 8efb ldrh r3, [r7, #54] ; 0x36 - 8033eaa: 4313 orrs r3, r2 - 8033eac: 86fb strh r3, [r7, #54] ; 0x36 + 8033ecc: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033ece: 085b lsrs r3, r3, #1 + 8033ed0: b29b uxth r3, r3 + 8033ed2: f003 0307 and.w r3, r3, #7 + 8033ed6: b29a uxth r2, r3 + 8033ed8: 8efb ldrh r3, [r7, #54] ; 0x36 + 8033eda: 4313 orrs r3, r2 + 8033edc: 86fb strh r3, [r7, #54] ; 0x36 huart->Instance->BRR = brrtemp; - 8033eae: 697b ldr r3, [r7, #20] - 8033eb0: 681b ldr r3, [r3, #0] - 8033eb2: 8efa ldrh r2, [r7, #54] ; 0x36 - 8033eb4: 60da str r2, [r3, #12] - 8033eb6: e0b9 b.n 803402c + 8033ede: 697b ldr r3, [r7, #20] + 8033ee0: 681b ldr r3, [r3, #0] + 8033ee2: 8efa ldrh r2, [r7, #54] ; 0x36 + 8033ee4: 60da str r2, [r3, #12] + 8033ee6: e0b9 b.n 803405c } else { ret = HAL_ERROR; - 8033eb8: 2301 movs r3, #1 - 8033eba: f887 3042 strb.w r3, [r7, #66] ; 0x42 - 8033ebe: e0b5 b.n 803402c - 8033ec0: 03d09000 .word 0x03d09000 - 8033ec4: 003d0900 .word 0x003d0900 - 8033ec8: 08044ccc .word 0x08044ccc - 8033ecc: 58024400 .word 0x58024400 + 8033ee8: 2301 movs r3, #1 + 8033eea: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033eee: e0b5 b.n 803405c + 8033ef0: 03d09000 .word 0x03d09000 + 8033ef4: 003d0900 .word 0x003d0900 + 8033ef8: 08044cfc .word 0x08044cfc + 8033efc: 58024400 .word 0x58024400 } } } else { switch (clocksource) - 8033ed0: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 - 8033ed4: 2b20 cmp r3, #32 - 8033ed6: dc49 bgt.n 8033f6c - 8033ed8: 2b00 cmp r3, #0 - 8033eda: db7c blt.n 8033fd6 - 8033edc: 2b20 cmp r3, #32 - 8033ede: d87a bhi.n 8033fd6 - 8033ee0: a201 add r2, pc, #4 ; (adr r2, 8033ee8 ) - 8033ee2: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033ee6: bf00 nop - 8033ee8: 08033f73 .word 0x08033f73 - 8033eec: 08033f7b .word 0x08033f7b - 8033ef0: 08033fd7 .word 0x08033fd7 - 8033ef4: 08033fd7 .word 0x08033fd7 - 8033ef8: 08033f83 .word 0x08033f83 - 8033efc: 08033fd7 .word 0x08033fd7 - 8033f00: 08033fd7 .word 0x08033fd7 - 8033f04: 08033fd7 .word 0x08033fd7 - 8033f08: 08033f93 .word 0x08033f93 - 8033f0c: 08033fd7 .word 0x08033fd7 - 8033f10: 08033fd7 .word 0x08033fd7 - 8033f14: 08033fd7 .word 0x08033fd7 - 8033f18: 08033fd7 .word 0x08033fd7 - 8033f1c: 08033fd7 .word 0x08033fd7 - 8033f20: 08033fd7 .word 0x08033fd7 - 8033f24: 08033fd7 .word 0x08033fd7 - 8033f28: 08033fa3 .word 0x08033fa3 - 8033f2c: 08033fd7 .word 0x08033fd7 - 8033f30: 08033fd7 .word 0x08033fd7 - 8033f34: 08033fd7 .word 0x08033fd7 - 8033f38: 08033fd7 .word 0x08033fd7 - 8033f3c: 08033fd7 .word 0x08033fd7 - 8033f40: 08033fd7 .word 0x08033fd7 - 8033f44: 08033fd7 .word 0x08033fd7 - 8033f48: 08033fd7 .word 0x08033fd7 - 8033f4c: 08033fd7 .word 0x08033fd7 - 8033f50: 08033fd7 .word 0x08033fd7 - 8033f54: 08033fd7 .word 0x08033fd7 - 8033f58: 08033fd7 .word 0x08033fd7 - 8033f5c: 08033fd7 .word 0x08033fd7 - 8033f60: 08033fd7 .word 0x08033fd7 - 8033f64: 08033fd7 .word 0x08033fd7 - 8033f68: 08033fc9 .word 0x08033fc9 - 8033f6c: 2b40 cmp r3, #64 ; 0x40 - 8033f6e: d02e beq.n 8033fce - 8033f70: e031 b.n 8033fd6 + 8033f00: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 + 8033f04: 2b20 cmp r3, #32 + 8033f06: dc49 bgt.n 8033f9c + 8033f08: 2b00 cmp r3, #0 + 8033f0a: db7c blt.n 8034006 + 8033f0c: 2b20 cmp r3, #32 + 8033f0e: d87a bhi.n 8034006 + 8033f10: a201 add r2, pc, #4 ; (adr r2, 8033f18 ) + 8033f12: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033f16: bf00 nop + 8033f18: 08033fa3 .word 0x08033fa3 + 8033f1c: 08033fab .word 0x08033fab + 8033f20: 08034007 .word 0x08034007 + 8033f24: 08034007 .word 0x08034007 + 8033f28: 08033fb3 .word 0x08033fb3 + 8033f2c: 08034007 .word 0x08034007 + 8033f30: 08034007 .word 0x08034007 + 8033f34: 08034007 .word 0x08034007 + 8033f38: 08033fc3 .word 0x08033fc3 + 8033f3c: 08034007 .word 0x08034007 + 8033f40: 08034007 .word 0x08034007 + 8033f44: 08034007 .word 0x08034007 + 8033f48: 08034007 .word 0x08034007 + 8033f4c: 08034007 .word 0x08034007 + 8033f50: 08034007 .word 0x08034007 + 8033f54: 08034007 .word 0x08034007 + 8033f58: 08033fd3 .word 0x08033fd3 + 8033f5c: 08034007 .word 0x08034007 + 8033f60: 08034007 .word 0x08034007 + 8033f64: 08034007 .word 0x08034007 + 8033f68: 08034007 .word 0x08034007 + 8033f6c: 08034007 .word 0x08034007 + 8033f70: 08034007 .word 0x08034007 + 8033f74: 08034007 .word 0x08034007 + 8033f78: 08034007 .word 0x08034007 + 8033f7c: 08034007 .word 0x08034007 + 8033f80: 08034007 .word 0x08034007 + 8033f84: 08034007 .word 0x08034007 + 8033f88: 08034007 .word 0x08034007 + 8033f8c: 08034007 .word 0x08034007 + 8033f90: 08034007 .word 0x08034007 + 8033f94: 08034007 .word 0x08034007 + 8033f98: 08033ff9 .word 0x08033ff9 + 8033f9c: 2b40 cmp r3, #64 ; 0x40 + 8033f9e: d02e beq.n 8033ffe + 8033fa0: e031 b.n 8034006 { case UART_CLOCKSOURCE_D2PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 8033f72: f7fb fed9 bl 802fd28 - 8033f76: 63f8 str r0, [r7, #60] ; 0x3c + 8033fa2: f7fb fed9 bl 802fd58 + 8033fa6: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033f78: e033 b.n 8033fe2 + 8033fa8: e033 b.n 8034012 case UART_CLOCKSOURCE_D2PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - 8033f7a: f7fb feeb bl 802fd54 - 8033f7e: 63f8 str r0, [r7, #60] ; 0x3c + 8033faa: f7fb feeb bl 802fd84 + 8033fae: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033f80: e02f b.n 8033fe2 + 8033fb0: e02f b.n 8034012 case UART_CLOCKSOURCE_PLL2: HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8033f82: f107 0324 add.w r3, r7, #36 ; 0x24 - 8033f86: 4618 mov r0, r3 - 8033f88: f7fd fb28 bl 80315dc + 8033fb2: f107 0324 add.w r3, r7, #36 ; 0x24 + 8033fb6: 4618 mov r0, r3 + 8033fb8: f7fd fb28 bl 803160c pclk = pll2_clocks.PLL2_Q_Frequency; - 8033f8c: 6abb ldr r3, [r7, #40] ; 0x28 - 8033f8e: 63fb str r3, [r7, #60] ; 0x3c + 8033fbc: 6abb ldr r3, [r7, #40] ; 0x28 + 8033fbe: 63fb str r3, [r7, #60] ; 0x3c break; - 8033f90: e027 b.n 8033fe2 + 8033fc0: e027 b.n 8034012 case UART_CLOCKSOURCE_PLL3: HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8033f92: f107 0318 add.w r3, r7, #24 - 8033f96: 4618 mov r0, r3 - 8033f98: f7fd fc74 bl 8031884 + 8033fc2: f107 0318 add.w r3, r7, #24 + 8033fc6: 4618 mov r0, r3 + 8033fc8: f7fd fc74 bl 80318b4 pclk = pll3_clocks.PLL3_Q_Frequency; - 8033f9c: 69fb ldr r3, [r7, #28] - 8033f9e: 63fb str r3, [r7, #60] ; 0x3c + 8033fcc: 69fb ldr r3, [r7, #28] + 8033fce: 63fb str r3, [r7, #60] ; 0x3c break; - 8033fa0: e01f b.n 8033fe2 + 8033fd0: e01f b.n 8034012 case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8033fa2: 4b2d ldr r3, [pc, #180] ; (8034058 ) - 8033fa4: 681b ldr r3, [r3, #0] - 8033fa6: f003 0320 and.w r3, r3, #32 - 8033faa: 2b00 cmp r3, #0 - 8033fac: d009 beq.n 8033fc2 + 8033fd2: 4b2d ldr r3, [pc, #180] ; (8034088 ) + 8033fd4: 681b ldr r3, [r3, #0] + 8033fd6: f003 0320 and.w r3, r3, #32 + 8033fda: 2b00 cmp r3, #0 + 8033fdc: d009 beq.n 8033ff2 { pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U)); - 8033fae: 4b2a ldr r3, [pc, #168] ; (8034058 ) - 8033fb0: 681b ldr r3, [r3, #0] - 8033fb2: 08db lsrs r3, r3, #3 - 8033fb4: f003 0303 and.w r3, r3, #3 - 8033fb8: 4a28 ldr r2, [pc, #160] ; (803405c ) - 8033fba: fa22 f303 lsr.w r3, r2, r3 - 8033fbe: 63fb str r3, [r7, #60] ; 0x3c + 8033fde: 4b2a ldr r3, [pc, #168] ; (8034088 ) + 8033fe0: 681b ldr r3, [r3, #0] + 8033fe2: 08db lsrs r3, r3, #3 + 8033fe4: f003 0303 and.w r3, r3, #3 + 8033fe8: 4a28 ldr r2, [pc, #160] ; (803408c ) + 8033fea: fa22 f303 lsr.w r3, r2, r3 + 8033fee: 63fb str r3, [r7, #60] ; 0x3c } else { pclk = (uint32_t) HSI_VALUE; } break; - 8033fc0: e00f b.n 8033fe2 + 8033ff0: e00f b.n 8034012 pclk = (uint32_t) HSI_VALUE; - 8033fc2: 4b26 ldr r3, [pc, #152] ; (803405c ) - 8033fc4: 63fb str r3, [r7, #60] ; 0x3c + 8033ff2: 4b26 ldr r3, [pc, #152] ; (803408c ) + 8033ff4: 63fb str r3, [r7, #60] ; 0x3c break; - 8033fc6: e00c b.n 8033fe2 + 8033ff6: e00c b.n 8034012 case UART_CLOCKSOURCE_CSI: pclk = (uint32_t) CSI_VALUE; - 8033fc8: 4b25 ldr r3, [pc, #148] ; (8034060 ) - 8033fca: 63fb str r3, [r7, #60] ; 0x3c + 8033ff8: 4b25 ldr r3, [pc, #148] ; (8034090 ) + 8033ffa: 63fb str r3, [r7, #60] ; 0x3c break; - 8033fcc: e009 b.n 8033fe2 + 8033ffc: e009 b.n 8034012 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 8033fce: f44f 4300 mov.w r3, #32768 ; 0x8000 - 8033fd2: 63fb str r3, [r7, #60] ; 0x3c + 8033ffe: f44f 4300 mov.w r3, #32768 ; 0x8000 + 8034002: 63fb str r3, [r7, #60] ; 0x3c break; - 8033fd4: e005 b.n 8033fe2 + 8034004: e005 b.n 8034012 default: pclk = 0U; - 8033fd6: 2300 movs r3, #0 - 8033fd8: 63fb str r3, [r7, #60] ; 0x3c + 8034006: 2300 movs r3, #0 + 8034008: 63fb str r3, [r7, #60] ; 0x3c ret = HAL_ERROR; - 8033fda: 2301 movs r3, #1 - 8033fdc: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 803400a: 2301 movs r3, #1 + 803400c: f887 3042 strb.w r3, [r7, #66] ; 0x42 break; - 8033fe0: bf00 nop + 8034010: bf00 nop } if (pclk != 0U) - 8033fe2: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033fe4: 2b00 cmp r3, #0 - 8033fe6: d021 beq.n 803402c + 8034012: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034014: 2b00 cmp r3, #0 + 8034016: d021 beq.n 803405c { /* USARTDIV must be greater than or equal to 0d16 */ usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 8033fe8: 697b ldr r3, [r7, #20] - 8033fea: 6a5b ldr r3, [r3, #36] ; 0x24 - 8033fec: 4a1d ldr r2, [pc, #116] ; (8034064 ) - 8033fee: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8033ff2: 461a mov r2, r3 - 8033ff4: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033ff6: fbb3 f2f2 udiv r2, r3, r2 - 8033ffa: 697b ldr r3, [r7, #20] - 8033ffc: 685b ldr r3, [r3, #4] - 8033ffe: 085b lsrs r3, r3, #1 - 8034000: 441a add r2, r3 - 8034002: 697b ldr r3, [r7, #20] - 8034004: 685b ldr r3, [r3, #4] - 8034006: fbb2 f3f3 udiv r3, r2, r3 - 803400a: 63bb str r3, [r7, #56] ; 0x38 + 8034018: 697b ldr r3, [r7, #20] + 803401a: 6a5b ldr r3, [r3, #36] ; 0x24 + 803401c: 4a1d ldr r2, [pc, #116] ; (8034094 ) + 803401e: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8034022: 461a mov r2, r3 + 8034024: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034026: fbb3 f2f2 udiv r2, r3, r2 + 803402a: 697b ldr r3, [r7, #20] + 803402c: 685b ldr r3, [r3, #4] + 803402e: 085b lsrs r3, r3, #1 + 8034030: 441a add r2, r3 + 8034032: 697b ldr r3, [r7, #20] + 8034034: 685b ldr r3, [r3, #4] + 8034036: fbb2 f3f3 udiv r3, r2, r3 + 803403a: 63bb str r3, [r7, #56] ; 0x38 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 803400c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803400e: 2b0f cmp r3, #15 - 8034010: d909 bls.n 8034026 - 8034012: 6bbb ldr r3, [r7, #56] ; 0x38 - 8034014: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8034018: d205 bcs.n 8034026 + 803403c: 6bbb ldr r3, [r7, #56] ; 0x38 + 803403e: 2b0f cmp r3, #15 + 8034040: d909 bls.n 8034056 + 8034042: 6bbb ldr r3, [r7, #56] ; 0x38 + 8034044: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8034048: d205 bcs.n 8034056 { huart->Instance->BRR = (uint16_t)usartdiv; - 803401a: 6bbb ldr r3, [r7, #56] ; 0x38 - 803401c: b29a uxth r2, r3 - 803401e: 697b ldr r3, [r7, #20] - 8034020: 681b ldr r3, [r3, #0] - 8034022: 60da str r2, [r3, #12] - 8034024: e002 b.n 803402c + 803404a: 6bbb ldr r3, [r7, #56] ; 0x38 + 803404c: b29a uxth r2, r3 + 803404e: 697b ldr r3, [r7, #20] + 8034050: 681b ldr r3, [r3, #0] + 8034052: 60da str r2, [r3, #12] + 8034054: e002 b.n 803405c } else { ret = HAL_ERROR; - 8034026: 2301 movs r3, #1 - 8034028: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8034056: 2301 movs r3, #1 + 8034058: f887 3042 strb.w r3, [r7, #66] ; 0x42 } } } /* Initialize the number of data to process during RX/TX ISR execution */ huart->NbTxDataToProcess = 1; - 803402c: 697b ldr r3, [r7, #20] - 803402e: 2201 movs r2, #1 - 8034030: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803405c: 697b ldr r3, [r7, #20] + 803405e: 2201 movs r2, #1 + 8034060: f8a3 206a strh.w r2, [r3, #106] ; 0x6a huart->NbRxDataToProcess = 1; - 8034034: 697b ldr r3, [r7, #20] - 8034036: 2201 movs r2, #1 - 8034038: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 8034064: 697b ldr r3, [r7, #20] + 8034066: 2201 movs r2, #1 + 8034068: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 /* Clear ISR function pointers */ huart->RxISR = NULL; - 803403c: 697b ldr r3, [r7, #20] - 803403e: 2200 movs r2, #0 - 8034040: 671a str r2, [r3, #112] ; 0x70 + 803406c: 697b ldr r3, [r7, #20] + 803406e: 2200 movs r2, #0 + 8034070: 671a str r2, [r3, #112] ; 0x70 huart->TxISR = NULL; - 8034042: 697b ldr r3, [r7, #20] - 8034044: 2200 movs r2, #0 - 8034046: 675a str r2, [r3, #116] ; 0x74 + 8034072: 697b ldr r3, [r7, #20] + 8034074: 2200 movs r2, #0 + 8034076: 675a str r2, [r3, #116] ; 0x74 return ret; - 8034048: f897 3042 ldrb.w r3, [r7, #66] ; 0x42 -} - 803404c: 4618 mov r0, r3 - 803404e: 3748 adds r7, #72 ; 0x48 - 8034050: 46bd mov sp, r7 - 8034052: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} - 8034056: bf00 nop - 8034058: 58024400 .word 0x58024400 - 803405c: 03d09000 .word 0x03d09000 - 8034060: 003d0900 .word 0x003d0900 - 8034064: 08044ccc .word 0x08044ccc - -08034068 : + 8034078: f897 3042 ldrb.w r3, [r7, #66] ; 0x42 +} + 803407c: 4618 mov r0, r3 + 803407e: 3748 adds r7, #72 ; 0x48 + 8034080: 46bd mov sp, r7 + 8034082: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 8034086: bf00 nop + 8034088: 58024400 .word 0x58024400 + 803408c: 03d09000 .word 0x03d09000 + 8034090: 003d0900 .word 0x003d0900 + 8034094: 08044cfc .word 0x08044cfc + +08034098 : * @brief Configure the UART peripheral advanced features. * @param huart UART handle. * @retval None */ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) { - 8034068: b480 push {r7} - 803406a: b083 sub sp, #12 - 803406c: af00 add r7, sp, #0 - 803406e: 6078 str r0, [r7, #4] + 8034098: b480 push {r7} + 803409a: b083 sub sp, #12 + 803409c: af00 add r7, sp, #0 + 803409e: 6078 str r0, [r7, #4] /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - 8034070: 687b ldr r3, [r7, #4] - 8034072: 6a9b ldr r3, [r3, #40] ; 0x28 - 8034074: f003 0301 and.w r3, r3, #1 - 8034078: 2b00 cmp r3, #0 - 803407a: d00a beq.n 8034092 + 80340a0: 687b ldr r3, [r7, #4] + 80340a2: 6a9b ldr r3, [r3, #40] ; 0x28 + 80340a4: f003 0301 and.w r3, r3, #1 + 80340a8: 2b00 cmp r3, #0 + 80340aa: d00a beq.n 80340c2 { assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - 803407c: 687b ldr r3, [r7, #4] - 803407e: 681b ldr r3, [r3, #0] - 8034080: 685b ldr r3, [r3, #4] - 8034082: f423 3100 bic.w r1, r3, #131072 ; 0x20000 - 8034086: 687b ldr r3, [r7, #4] - 8034088: 6ada ldr r2, [r3, #44] ; 0x2c - 803408a: 687b ldr r3, [r7, #4] - 803408c: 681b ldr r3, [r3, #0] - 803408e: 430a orrs r2, r1 - 8034090: 605a str r2, [r3, #4] + 80340ac: 687b ldr r3, [r7, #4] + 80340ae: 681b ldr r3, [r3, #0] + 80340b0: 685b ldr r3, [r3, #4] + 80340b2: f423 3100 bic.w r1, r3, #131072 ; 0x20000 + 80340b6: 687b ldr r3, [r7, #4] + 80340b8: 6ada ldr r2, [r3, #44] ; 0x2c + 80340ba: 687b ldr r3, [r7, #4] + 80340bc: 681b ldr r3, [r3, #0] + 80340be: 430a orrs r2, r1 + 80340c0: 605a str r2, [r3, #4] } /* if required, configure RX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - 8034092: 687b ldr r3, [r7, #4] - 8034094: 6a9b ldr r3, [r3, #40] ; 0x28 - 8034096: f003 0302 and.w r3, r3, #2 - 803409a: 2b00 cmp r3, #0 - 803409c: d00a beq.n 80340b4 + 80340c2: 687b ldr r3, [r7, #4] + 80340c4: 6a9b ldr r3, [r3, #40] ; 0x28 + 80340c6: f003 0302 and.w r3, r3, #2 + 80340ca: 2b00 cmp r3, #0 + 80340cc: d00a beq.n 80340e4 { assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - 803409e: 687b ldr r3, [r7, #4] - 80340a0: 681b ldr r3, [r3, #0] - 80340a2: 685b ldr r3, [r3, #4] - 80340a4: f423 3180 bic.w r1, r3, #65536 ; 0x10000 - 80340a8: 687b ldr r3, [r7, #4] - 80340aa: 6b1a ldr r2, [r3, #48] ; 0x30 - 80340ac: 687b ldr r3, [r7, #4] - 80340ae: 681b ldr r3, [r3, #0] - 80340b0: 430a orrs r2, r1 - 80340b2: 605a str r2, [r3, #4] + 80340ce: 687b ldr r3, [r7, #4] + 80340d0: 681b ldr r3, [r3, #0] + 80340d2: 685b ldr r3, [r3, #4] + 80340d4: f423 3180 bic.w r1, r3, #65536 ; 0x10000 + 80340d8: 687b ldr r3, [r7, #4] + 80340da: 6b1a ldr r2, [r3, #48] ; 0x30 + 80340dc: 687b ldr r3, [r7, #4] + 80340de: 681b ldr r3, [r3, #0] + 80340e0: 430a orrs r2, r1 + 80340e2: 605a str r2, [r3, #4] } /* if required, configure data inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - 80340b4: 687b ldr r3, [r7, #4] - 80340b6: 6a9b ldr r3, [r3, #40] ; 0x28 - 80340b8: f003 0304 and.w r3, r3, #4 - 80340bc: 2b00 cmp r3, #0 - 80340be: d00a beq.n 80340d6 + 80340e4: 687b ldr r3, [r7, #4] + 80340e6: 6a9b ldr r3, [r3, #40] ; 0x28 + 80340e8: f003 0304 and.w r3, r3, #4 + 80340ec: 2b00 cmp r3, #0 + 80340ee: d00a beq.n 8034106 { assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - 80340c0: 687b ldr r3, [r7, #4] - 80340c2: 681b ldr r3, [r3, #0] - 80340c4: 685b ldr r3, [r3, #4] - 80340c6: f423 2180 bic.w r1, r3, #262144 ; 0x40000 - 80340ca: 687b ldr r3, [r7, #4] - 80340cc: 6b5a ldr r2, [r3, #52] ; 0x34 - 80340ce: 687b ldr r3, [r7, #4] - 80340d0: 681b ldr r3, [r3, #0] - 80340d2: 430a orrs r2, r1 - 80340d4: 605a str r2, [r3, #4] + 80340f0: 687b ldr r3, [r7, #4] + 80340f2: 681b ldr r3, [r3, #0] + 80340f4: 685b ldr r3, [r3, #4] + 80340f6: f423 2180 bic.w r1, r3, #262144 ; 0x40000 + 80340fa: 687b ldr r3, [r7, #4] + 80340fc: 6b5a ldr r2, [r3, #52] ; 0x34 + 80340fe: 687b ldr r3, [r7, #4] + 8034100: 681b ldr r3, [r3, #0] + 8034102: 430a orrs r2, r1 + 8034104: 605a str r2, [r3, #4] } /* if required, configure RX/TX pins swap */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 80340d6: 687b ldr r3, [r7, #4] - 80340d8: 6a9b ldr r3, [r3, #40] ; 0x28 - 80340da: f003 0308 and.w r3, r3, #8 - 80340de: 2b00 cmp r3, #0 - 80340e0: d00a beq.n 80340f8 + 8034106: 687b ldr r3, [r7, #4] + 8034108: 6a9b ldr r3, [r3, #40] ; 0x28 + 803410a: f003 0308 and.w r3, r3, #8 + 803410e: 2b00 cmp r3, #0 + 8034110: d00a beq.n 8034128 { assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - 80340e2: 687b ldr r3, [r7, #4] - 80340e4: 681b ldr r3, [r3, #0] - 80340e6: 685b ldr r3, [r3, #4] - 80340e8: f423 4100 bic.w r1, r3, #32768 ; 0x8000 - 80340ec: 687b ldr r3, [r7, #4] - 80340ee: 6b9a ldr r2, [r3, #56] ; 0x38 - 80340f0: 687b ldr r3, [r7, #4] - 80340f2: 681b ldr r3, [r3, #0] - 80340f4: 430a orrs r2, r1 - 80340f6: 605a str r2, [r3, #4] + 8034112: 687b ldr r3, [r7, #4] + 8034114: 681b ldr r3, [r3, #0] + 8034116: 685b ldr r3, [r3, #4] + 8034118: f423 4100 bic.w r1, r3, #32768 ; 0x8000 + 803411c: 687b ldr r3, [r7, #4] + 803411e: 6b9a ldr r2, [r3, #56] ; 0x38 + 8034120: 687b ldr r3, [r7, #4] + 8034122: 681b ldr r3, [r3, #0] + 8034124: 430a orrs r2, r1 + 8034126: 605a str r2, [r3, #4] } /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - 80340f8: 687b ldr r3, [r7, #4] - 80340fa: 6a9b ldr r3, [r3, #40] ; 0x28 - 80340fc: f003 0310 and.w r3, r3, #16 - 8034100: 2b00 cmp r3, #0 - 8034102: d00a beq.n 803411a + 8034128: 687b ldr r3, [r7, #4] + 803412a: 6a9b ldr r3, [r3, #40] ; 0x28 + 803412c: f003 0310 and.w r3, r3, #16 + 8034130: 2b00 cmp r3, #0 + 8034132: d00a beq.n 803414a { assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - 8034104: 687b ldr r3, [r7, #4] - 8034106: 681b ldr r3, [r3, #0] - 8034108: 689b ldr r3, [r3, #8] - 803410a: f423 5180 bic.w r1, r3, #4096 ; 0x1000 - 803410e: 687b ldr r3, [r7, #4] - 8034110: 6bda ldr r2, [r3, #60] ; 0x3c - 8034112: 687b ldr r3, [r7, #4] - 8034114: 681b ldr r3, [r3, #0] - 8034116: 430a orrs r2, r1 - 8034118: 609a str r2, [r3, #8] + 8034134: 687b ldr r3, [r7, #4] + 8034136: 681b ldr r3, [r3, #0] + 8034138: 689b ldr r3, [r3, #8] + 803413a: f423 5180 bic.w r1, r3, #4096 ; 0x1000 + 803413e: 687b ldr r3, [r7, #4] + 8034140: 6bda ldr r2, [r3, #60] ; 0x3c + 8034142: 687b ldr r3, [r7, #4] + 8034144: 681b ldr r3, [r3, #0] + 8034146: 430a orrs r2, r1 + 8034148: 609a str r2, [r3, #8] } /* if required, configure DMA disabling on reception error */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - 803411a: 687b ldr r3, [r7, #4] - 803411c: 6a9b ldr r3, [r3, #40] ; 0x28 - 803411e: f003 0320 and.w r3, r3, #32 - 8034122: 2b00 cmp r3, #0 - 8034124: d00a beq.n 803413c + 803414a: 687b ldr r3, [r7, #4] + 803414c: 6a9b ldr r3, [r3, #40] ; 0x28 + 803414e: f003 0320 and.w r3, r3, #32 + 8034152: 2b00 cmp r3, #0 + 8034154: d00a beq.n 803416c { assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - 8034126: 687b ldr r3, [r7, #4] - 8034128: 681b ldr r3, [r3, #0] - 803412a: 689b ldr r3, [r3, #8] - 803412c: f423 5100 bic.w r1, r3, #8192 ; 0x2000 - 8034130: 687b ldr r3, [r7, #4] - 8034132: 6c1a ldr r2, [r3, #64] ; 0x40 - 8034134: 687b ldr r3, [r7, #4] - 8034136: 681b ldr r3, [r3, #0] - 8034138: 430a orrs r2, r1 - 803413a: 609a str r2, [r3, #8] + 8034156: 687b ldr r3, [r7, #4] + 8034158: 681b ldr r3, [r3, #0] + 803415a: 689b ldr r3, [r3, #8] + 803415c: f423 5100 bic.w r1, r3, #8192 ; 0x2000 + 8034160: 687b ldr r3, [r7, #4] + 8034162: 6c1a ldr r2, [r3, #64] ; 0x40 + 8034164: 687b ldr r3, [r7, #4] + 8034166: 681b ldr r3, [r3, #0] + 8034168: 430a orrs r2, r1 + 803416a: 609a str r2, [r3, #8] } /* if required, configure auto Baud rate detection scheme */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - 803413c: 687b ldr r3, [r7, #4] - 803413e: 6a9b ldr r3, [r3, #40] ; 0x28 - 8034140: f003 0340 and.w r3, r3, #64 ; 0x40 - 8034144: 2b00 cmp r3, #0 - 8034146: d01a beq.n 803417e + 803416c: 687b ldr r3, [r7, #4] + 803416e: 6a9b ldr r3, [r3, #40] ; 0x28 + 8034170: f003 0340 and.w r3, r3, #64 ; 0x40 + 8034174: 2b00 cmp r3, #0 + 8034176: d01a beq.n 80341ae { assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - 8034148: 687b ldr r3, [r7, #4] - 803414a: 681b ldr r3, [r3, #0] - 803414c: 685b ldr r3, [r3, #4] - 803414e: f423 1180 bic.w r1, r3, #1048576 ; 0x100000 - 8034152: 687b ldr r3, [r7, #4] - 8034154: 6c5a ldr r2, [r3, #68] ; 0x44 - 8034156: 687b ldr r3, [r7, #4] - 8034158: 681b ldr r3, [r3, #0] - 803415a: 430a orrs r2, r1 - 803415c: 605a str r2, [r3, #4] + 8034178: 687b ldr r3, [r7, #4] + 803417a: 681b ldr r3, [r3, #0] + 803417c: 685b ldr r3, [r3, #4] + 803417e: f423 1180 bic.w r1, r3, #1048576 ; 0x100000 + 8034182: 687b ldr r3, [r7, #4] + 8034184: 6c5a ldr r2, [r3, #68] ; 0x44 + 8034186: 687b ldr r3, [r7, #4] + 8034188: 681b ldr r3, [r3, #0] + 803418a: 430a orrs r2, r1 + 803418c: 605a str r2, [r3, #4] /* set auto Baudrate detection parameters if detection is enabled */ if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - 803415e: 687b ldr r3, [r7, #4] - 8034160: 6c5b ldr r3, [r3, #68] ; 0x44 - 8034162: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8034166: d10a bne.n 803417e + 803418e: 687b ldr r3, [r7, #4] + 8034190: 6c5b ldr r3, [r3, #68] ; 0x44 + 8034192: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8034196: d10a bne.n 80341ae { assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - 8034168: 687b ldr r3, [r7, #4] - 803416a: 681b ldr r3, [r3, #0] - 803416c: 685b ldr r3, [r3, #4] - 803416e: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000 - 8034172: 687b ldr r3, [r7, #4] - 8034174: 6c9a ldr r2, [r3, #72] ; 0x48 - 8034176: 687b ldr r3, [r7, #4] - 8034178: 681b ldr r3, [r3, #0] - 803417a: 430a orrs r2, r1 - 803417c: 605a str r2, [r3, #4] + 8034198: 687b ldr r3, [r7, #4] + 803419a: 681b ldr r3, [r3, #0] + 803419c: 685b ldr r3, [r3, #4] + 803419e: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000 + 80341a2: 687b ldr r3, [r7, #4] + 80341a4: 6c9a ldr r2, [r3, #72] ; 0x48 + 80341a6: 687b ldr r3, [r7, #4] + 80341a8: 681b ldr r3, [r3, #0] + 80341aa: 430a orrs r2, r1 + 80341ac: 605a str r2, [r3, #4] } } /* if required, configure MSB first on communication line */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - 803417e: 687b ldr r3, [r7, #4] - 8034180: 6a9b ldr r3, [r3, #40] ; 0x28 - 8034182: f003 0380 and.w r3, r3, #128 ; 0x80 - 8034186: 2b00 cmp r3, #0 - 8034188: d00a beq.n 80341a0 + 80341ae: 687b ldr r3, [r7, #4] + 80341b0: 6a9b ldr r3, [r3, #40] ; 0x28 + 80341b2: f003 0380 and.w r3, r3, #128 ; 0x80 + 80341b6: 2b00 cmp r3, #0 + 80341b8: d00a beq.n 80341d0 { assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - 803418a: 687b ldr r3, [r7, #4] - 803418c: 681b ldr r3, [r3, #0] - 803418e: 685b ldr r3, [r3, #4] - 8034190: f423 2100 bic.w r1, r3, #524288 ; 0x80000 - 8034194: 687b ldr r3, [r7, #4] - 8034196: 6cda ldr r2, [r3, #76] ; 0x4c - 8034198: 687b ldr r3, [r7, #4] - 803419a: 681b ldr r3, [r3, #0] - 803419c: 430a orrs r2, r1 - 803419e: 605a str r2, [r3, #4] - } -} - 80341a0: bf00 nop - 80341a2: 370c adds r7, #12 - 80341a4: 46bd mov sp, r7 - 80341a6: f85d 7b04 ldr.w r7, [sp], #4 - 80341aa: 4770 bx lr - -080341ac : + 80341ba: 687b ldr r3, [r7, #4] + 80341bc: 681b ldr r3, [r3, #0] + 80341be: 685b ldr r3, [r3, #4] + 80341c0: f423 2100 bic.w r1, r3, #524288 ; 0x80000 + 80341c4: 687b ldr r3, [r7, #4] + 80341c6: 6cda ldr r2, [r3, #76] ; 0x4c + 80341c8: 687b ldr r3, [r7, #4] + 80341ca: 681b ldr r3, [r3, #0] + 80341cc: 430a orrs r2, r1 + 80341ce: 605a str r2, [r3, #4] + } +} + 80341d0: bf00 nop + 80341d2: 370c adds r7, #12 + 80341d4: 46bd mov sp, r7 + 80341d6: f85d 7b04 ldr.w r7, [sp], #4 + 80341da: 4770 bx lr + +080341dc : * @brief Check the UART Idle State. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) { - 80341ac: b580 push {r7, lr} - 80341ae: b086 sub sp, #24 - 80341b0: af02 add r7, sp, #8 - 80341b2: 6078 str r0, [r7, #4] + 80341dc: b580 push {r7, lr} + 80341de: b086 sub sp, #24 + 80341e0: af02 add r7, sp, #8 + 80341e2: 6078 str r0, [r7, #4] uint32_t tickstart; /* Initialize the UART ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 80341b4: 687b ldr r3, [r7, #4] - 80341b6: 2200 movs r2, #0 - 80341b8: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 80341e4: 687b ldr r3, [r7, #4] + 80341e6: 2200 movs r2, #0 + 80341e8: f8c3 208c str.w r2, [r3, #140] ; 0x8c /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 80341bc: f7f1 feea bl 8025f94 - 80341c0: 60f8 str r0, [r7, #12] + 80341ec: f7f1 feea bl 8025fc4 + 80341f0: 60f8 str r0, [r7, #12] /* Check if the Transmitter is enabled */ if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 80341c2: 687b ldr r3, [r7, #4] - 80341c4: 681b ldr r3, [r3, #0] - 80341c6: 681b ldr r3, [r3, #0] - 80341c8: f003 0308 and.w r3, r3, #8 - 80341cc: 2b08 cmp r3, #8 - 80341ce: d10e bne.n 80341ee + 80341f2: 687b ldr r3, [r7, #4] + 80341f4: 681b ldr r3, [r3, #0] + 80341f6: 681b ldr r3, [r3, #0] + 80341f8: f003 0308 and.w r3, r3, #8 + 80341fc: 2b08 cmp r3, #8 + 80341fe: d10e bne.n 803421e { /* Wait until TEACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 80341d0: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 - 80341d4: 9300 str r3, [sp, #0] - 80341d6: 68fb ldr r3, [r7, #12] - 80341d8: 2200 movs r2, #0 - 80341da: f44f 1100 mov.w r1, #2097152 ; 0x200000 - 80341de: 6878 ldr r0, [r7, #4] - 80341e0: f000 f82f bl 8034242 - 80341e4: 4603 mov r3, r0 - 80341e6: 2b00 cmp r3, #0 - 80341e8: d001 beq.n 80341ee + 8034200: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 + 8034204: 9300 str r3, [sp, #0] + 8034206: 68fb ldr r3, [r7, #12] + 8034208: 2200 movs r2, #0 + 803420a: f44f 1100 mov.w r1, #2097152 ; 0x200000 + 803420e: 6878 ldr r0, [r7, #4] + 8034210: f000 f82f bl 8034272 + 8034214: 4603 mov r3, r0 + 8034216: 2b00 cmp r3, #0 + 8034218: d001 beq.n 803421e { /* Timeout occurred */ return HAL_TIMEOUT; - 80341ea: 2303 movs r3, #3 - 80341ec: e025 b.n 803423a + 803421a: 2303 movs r3, #3 + 803421c: e025 b.n 803426a } } /* Check if the Receiver is enabled */ if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - 80341ee: 687b ldr r3, [r7, #4] - 80341f0: 681b ldr r3, [r3, #0] - 80341f2: 681b ldr r3, [r3, #0] - 80341f4: f003 0304 and.w r3, r3, #4 - 80341f8: 2b04 cmp r3, #4 - 80341fa: d10e bne.n 803421a + 803421e: 687b ldr r3, [r7, #4] + 8034220: 681b ldr r3, [r3, #0] + 8034222: 681b ldr r3, [r3, #0] + 8034224: f003 0304 and.w r3, r3, #4 + 8034228: 2b04 cmp r3, #4 + 803422a: d10e bne.n 803424a { /* Wait until REACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 80341fc: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 - 8034200: 9300 str r3, [sp, #0] - 8034202: 68fb ldr r3, [r7, #12] - 8034204: 2200 movs r2, #0 - 8034206: f44f 0180 mov.w r1, #4194304 ; 0x400000 - 803420a: 6878 ldr r0, [r7, #4] - 803420c: f000 f819 bl 8034242 - 8034210: 4603 mov r3, r0 - 8034212: 2b00 cmp r3, #0 - 8034214: d001 beq.n 803421a + 803422c: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 + 8034230: 9300 str r3, [sp, #0] + 8034232: 68fb ldr r3, [r7, #12] + 8034234: 2200 movs r2, #0 + 8034236: f44f 0180 mov.w r1, #4194304 ; 0x400000 + 803423a: 6878 ldr r0, [r7, #4] + 803423c: f000 f819 bl 8034272 + 8034240: 4603 mov r3, r0 + 8034242: 2b00 cmp r3, #0 + 8034244: d001 beq.n 803424a { /* Timeout occurred */ return HAL_TIMEOUT; - 8034216: 2303 movs r3, #3 - 8034218: e00f b.n 803423a + 8034246: 2303 movs r3, #3 + 8034248: e00f b.n 803426a } } /* Initialize the UART State */ huart->gState = HAL_UART_STATE_READY; - 803421a: 687b ldr r3, [r7, #4] - 803421c: 2220 movs r2, #32 - 803421e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 803424a: 687b ldr r3, [r7, #4] + 803424c: 2220 movs r2, #32 + 803424e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 huart->RxState = HAL_UART_STATE_READY; - 8034222: 687b ldr r3, [r7, #4] - 8034224: 2220 movs r2, #32 - 8034226: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034252: 687b ldr r3, [r7, #4] + 8034254: 2220 movs r2, #32 + 8034256: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 803422a: 687b ldr r3, [r7, #4] - 803422c: 2200 movs r2, #0 - 803422e: 66da str r2, [r3, #108] ; 0x6c + 803425a: 687b ldr r3, [r7, #4] + 803425c: 2200 movs r2, #0 + 803425e: 66da str r2, [r3, #108] ; 0x6c __HAL_UNLOCK(huart); - 8034230: 687b ldr r3, [r7, #4] - 8034232: 2200 movs r2, #0 - 8034234: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8034260: 687b ldr r3, [r7, #4] + 8034262: 2200 movs r2, #0 + 8034264: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_OK; - 8034238: 2300 movs r3, #0 + 8034268: 2300 movs r3, #0 } - 803423a: 4618 mov r0, r3 - 803423c: 3710 adds r7, #16 - 803423e: 46bd mov sp, r7 - 8034240: bd80 pop {r7, pc} + 803426a: 4618 mov r0, r3 + 803426c: 3710 adds r7, #16 + 803426e: 46bd mov sp, r7 + 8034270: bd80 pop {r7, pc} -08034242 : +08034272 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8034242: b580 push {r7, lr} - 8034244: b09c sub sp, #112 ; 0x70 - 8034246: af00 add r7, sp, #0 - 8034248: 60f8 str r0, [r7, #12] - 803424a: 60b9 str r1, [r7, #8] - 803424c: 603b str r3, [r7, #0] - 803424e: 4613 mov r3, r2 - 8034250: 71fb strb r3, [r7, #7] + 8034272: b580 push {r7, lr} + 8034274: b09c sub sp, #112 ; 0x70 + 8034276: af00 add r7, sp, #0 + 8034278: 60f8 str r0, [r7, #12] + 803427a: 60b9 str r1, [r7, #8] + 803427c: 603b str r3, [r7, #0] + 803427e: 4613 mov r3, r2 + 8034280: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8034252: e0a9 b.n 80343a8 + 8034282: e0a9 b.n 80343d8 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8034254: 6fbb ldr r3, [r7, #120] ; 0x78 - 8034256: f1b3 3fff cmp.w r3, #4294967295 - 803425a: f000 80a5 beq.w 80343a8 + 8034284: 6fbb ldr r3, [r7, #120] ; 0x78 + 8034286: f1b3 3fff cmp.w r3, #4294967295 + 803428a: f000 80a5 beq.w 80343d8 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 803425e: f7f1 fe99 bl 8025f94 - 8034262: 4602 mov r2, r0 - 8034264: 683b ldr r3, [r7, #0] - 8034266: 1ad3 subs r3, r2, r3 - 8034268: 6fba ldr r2, [r7, #120] ; 0x78 - 803426a: 429a cmp r2, r3 - 803426c: d302 bcc.n 8034274 - 803426e: 6fbb ldr r3, [r7, #120] ; 0x78 - 8034270: 2b00 cmp r3, #0 - 8034272: d140 bne.n 80342f6 + 803428e: f7f1 fe99 bl 8025fc4 + 8034292: 4602 mov r2, r0 + 8034294: 683b ldr r3, [r7, #0] + 8034296: 1ad3 subs r3, r2, r3 + 8034298: 6fba ldr r2, [r7, #120] ; 0x78 + 803429a: 429a cmp r2, r3 + 803429c: d302 bcc.n 80342a4 + 803429e: 6fbb ldr r3, [r7, #120] ; 0x78 + 80342a0: 2b00 cmp r3, #0 + 80342a2: d140 bne.n 8034326 { /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | - 8034274: 68fb ldr r3, [r7, #12] - 8034276: 681b ldr r3, [r3, #0] - 8034278: 653b str r3, [r7, #80] ; 0x50 + 80342a4: 68fb ldr r3, [r7, #12] + 80342a6: 681b ldr r3, [r3, #0] + 80342a8: 653b str r3, [r7, #80] ; 0x50 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803427a: 6d3b ldr r3, [r7, #80] ; 0x50 - 803427c: e853 3f00 ldrex r3, [r3] - 8034280: 64fb str r3, [r7, #76] ; 0x4c + 80342aa: 6d3b ldr r3, [r7, #80] ; 0x50 + 80342ac: e853 3f00 ldrex r3, [r3] + 80342b0: 64fb str r3, [r7, #76] ; 0x4c return(result); - 8034282: 6cfb ldr r3, [r7, #76] ; 0x4c - 8034284: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 - 8034288: 667b str r3, [r7, #100] ; 0x64 - 803428a: 68fb ldr r3, [r7, #12] - 803428c: 681b ldr r3, [r3, #0] - 803428e: 461a mov r2, r3 - 8034290: 6e7b ldr r3, [r7, #100] ; 0x64 - 8034292: 65fb str r3, [r7, #92] ; 0x5c - 8034294: 65ba str r2, [r7, #88] ; 0x58 + 80342b2: 6cfb ldr r3, [r7, #76] ; 0x4c + 80342b4: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 + 80342b8: 667b str r3, [r7, #100] ; 0x64 + 80342ba: 68fb ldr r3, [r7, #12] + 80342bc: 681b ldr r3, [r3, #0] + 80342be: 461a mov r2, r3 + 80342c0: 6e7b ldr r3, [r7, #100] ; 0x64 + 80342c2: 65fb str r3, [r7, #92] ; 0x5c + 80342c4: 65ba str r2, [r7, #88] ; 0x58 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034296: 6db9 ldr r1, [r7, #88] ; 0x58 - 8034298: 6dfa ldr r2, [r7, #92] ; 0x5c - 803429a: e841 2300 strex r3, r2, [r1] - 803429e: 657b str r3, [r7, #84] ; 0x54 + 80342c6: 6db9 ldr r1, [r7, #88] ; 0x58 + 80342c8: 6dfa ldr r2, [r7, #92] ; 0x5c + 80342ca: e841 2300 strex r3, r2, [r1] + 80342ce: 657b str r3, [r7, #84] ; 0x54 return(result); - 80342a0: 6d7b ldr r3, [r7, #84] ; 0x54 - 80342a2: 2b00 cmp r3, #0 - 80342a4: d1e6 bne.n 8034274 + 80342d0: 6d7b ldr r3, [r7, #84] ; 0x54 + 80342d2: 2b00 cmp r3, #0 + 80342d4: d1e6 bne.n 80342a4 USART_CR1_TXEIE_TXFNFIE)); ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80342a6: 68fb ldr r3, [r7, #12] - 80342a8: 681b ldr r3, [r3, #0] - 80342aa: 3308 adds r3, #8 - 80342ac: 63fb str r3, [r7, #60] ; 0x3c + 80342d6: 68fb ldr r3, [r7, #12] + 80342d8: 681b ldr r3, [r3, #0] + 80342da: 3308 adds r3, #8 + 80342dc: 63fb str r3, [r7, #60] ; 0x3c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80342ae: 6bfb ldr r3, [r7, #60] ; 0x3c - 80342b0: e853 3f00 ldrex r3, [r3] - 80342b4: 63bb str r3, [r7, #56] ; 0x38 + 80342de: 6bfb ldr r3, [r7, #60] ; 0x3c + 80342e0: e853 3f00 ldrex r3, [r3] + 80342e4: 63bb str r3, [r7, #56] ; 0x38 return(result); - 80342b6: 6bbb ldr r3, [r7, #56] ; 0x38 - 80342b8: f023 0301 bic.w r3, r3, #1 - 80342bc: 663b str r3, [r7, #96] ; 0x60 - 80342be: 68fb ldr r3, [r7, #12] - 80342c0: 681b ldr r3, [r3, #0] - 80342c2: 3308 adds r3, #8 - 80342c4: 6e3a ldr r2, [r7, #96] ; 0x60 - 80342c6: 64ba str r2, [r7, #72] ; 0x48 - 80342c8: 647b str r3, [r7, #68] ; 0x44 + 80342e6: 6bbb ldr r3, [r7, #56] ; 0x38 + 80342e8: f023 0301 bic.w r3, r3, #1 + 80342ec: 663b str r3, [r7, #96] ; 0x60 + 80342ee: 68fb ldr r3, [r7, #12] + 80342f0: 681b ldr r3, [r3, #0] + 80342f2: 3308 adds r3, #8 + 80342f4: 6e3a ldr r2, [r7, #96] ; 0x60 + 80342f6: 64ba str r2, [r7, #72] ; 0x48 + 80342f8: 647b str r3, [r7, #68] ; 0x44 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80342ca: 6c79 ldr r1, [r7, #68] ; 0x44 - 80342cc: 6cba ldr r2, [r7, #72] ; 0x48 - 80342ce: e841 2300 strex r3, r2, [r1] - 80342d2: 643b str r3, [r7, #64] ; 0x40 + 80342fa: 6c79 ldr r1, [r7, #68] ; 0x44 + 80342fc: 6cba ldr r2, [r7, #72] ; 0x48 + 80342fe: e841 2300 strex r3, r2, [r1] + 8034302: 643b str r3, [r7, #64] ; 0x40 return(result); - 80342d4: 6c3b ldr r3, [r7, #64] ; 0x40 - 80342d6: 2b00 cmp r3, #0 - 80342d8: d1e5 bne.n 80342a6 + 8034304: 6c3b ldr r3, [r7, #64] ; 0x40 + 8034306: 2b00 cmp r3, #0 + 8034308: d1e5 bne.n 80342d6 huart->gState = HAL_UART_STATE_READY; - 80342da: 68fb ldr r3, [r7, #12] - 80342dc: 2220 movs r2, #32 - 80342de: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 803430a: 68fb ldr r3, [r7, #12] + 803430c: 2220 movs r2, #32 + 803430e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 huart->RxState = HAL_UART_STATE_READY; - 80342e2: 68fb ldr r3, [r7, #12] - 80342e4: 2220 movs r2, #32 - 80342e6: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034312: 68fb ldr r3, [r7, #12] + 8034314: 2220 movs r2, #32 + 8034316: f8c3 2088 str.w r2, [r3, #136] ; 0x88 __HAL_UNLOCK(huart); - 80342ea: 68fb ldr r3, [r7, #12] - 80342ec: 2200 movs r2, #0 - 80342ee: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 803431a: 68fb ldr r3, [r7, #12] + 803431c: 2200 movs r2, #0 + 803431e: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_TIMEOUT; - 80342f2: 2303 movs r3, #3 - 80342f4: e069 b.n 80343ca + 8034322: 2303 movs r3, #3 + 8034324: e069 b.n 80343fa } if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) - 80342f6: 68fb ldr r3, [r7, #12] - 80342f8: 681b ldr r3, [r3, #0] - 80342fa: 681b ldr r3, [r3, #0] - 80342fc: f003 0304 and.w r3, r3, #4 - 8034300: 2b00 cmp r3, #0 - 8034302: d051 beq.n 80343a8 + 8034326: 68fb ldr r3, [r7, #12] + 8034328: 681b ldr r3, [r3, #0] + 803432a: 681b ldr r3, [r3, #0] + 803432c: f003 0304 and.w r3, r3, #4 + 8034330: 2b00 cmp r3, #0 + 8034332: d051 beq.n 80343d8 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) - 8034304: 68fb ldr r3, [r7, #12] - 8034306: 681b ldr r3, [r3, #0] - 8034308: 69db ldr r3, [r3, #28] - 803430a: f403 6300 and.w r3, r3, #2048 ; 0x800 - 803430e: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 8034312: d149 bne.n 80343a8 + 8034334: 68fb ldr r3, [r7, #12] + 8034336: 681b ldr r3, [r3, #0] + 8034338: 69db ldr r3, [r3, #28] + 803433a: f403 6300 and.w r3, r3, #2048 ; 0x800 + 803433e: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 8034342: d149 bne.n 80343d8 { /* Clear Receiver Timeout flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 8034314: 68fb ldr r3, [r7, #12] - 8034316: 681b ldr r3, [r3, #0] - 8034318: f44f 6200 mov.w r2, #2048 ; 0x800 - 803431c: 621a str r2, [r3, #32] + 8034344: 68fb ldr r3, [r7, #12] + 8034346: 681b ldr r3, [r3, #0] + 8034348: f44f 6200 mov.w r2, #2048 ; 0x800 + 803434c: 621a str r2, [r3, #32] /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | - 803431e: 68fb ldr r3, [r7, #12] - 8034320: 681b ldr r3, [r3, #0] - 8034322: 62bb str r3, [r7, #40] ; 0x28 + 803434e: 68fb ldr r3, [r7, #12] + 8034350: 681b ldr r3, [r3, #0] + 8034352: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034324: 6abb ldr r3, [r7, #40] ; 0x28 - 8034326: e853 3f00 ldrex r3, [r3] - 803432a: 627b str r3, [r7, #36] ; 0x24 + 8034354: 6abb ldr r3, [r7, #40] ; 0x28 + 8034356: e853 3f00 ldrex r3, [r3] + 803435a: 627b str r3, [r7, #36] ; 0x24 return(result); - 803432c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803432e: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 - 8034332: 66fb str r3, [r7, #108] ; 0x6c - 8034334: 68fb ldr r3, [r7, #12] - 8034336: 681b ldr r3, [r3, #0] - 8034338: 461a mov r2, r3 - 803433a: 6efb ldr r3, [r7, #108] ; 0x6c - 803433c: 637b str r3, [r7, #52] ; 0x34 - 803433e: 633a str r2, [r7, #48] ; 0x30 + 803435c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803435e: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 + 8034362: 66fb str r3, [r7, #108] ; 0x6c + 8034364: 68fb ldr r3, [r7, #12] + 8034366: 681b ldr r3, [r3, #0] + 8034368: 461a mov r2, r3 + 803436a: 6efb ldr r3, [r7, #108] ; 0x6c + 803436c: 637b str r3, [r7, #52] ; 0x34 + 803436e: 633a str r2, [r7, #48] ; 0x30 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034340: 6b39 ldr r1, [r7, #48] ; 0x30 - 8034342: 6b7a ldr r2, [r7, #52] ; 0x34 - 8034344: e841 2300 strex r3, r2, [r1] - 8034348: 62fb str r3, [r7, #44] ; 0x2c + 8034370: 6b39 ldr r1, [r7, #48] ; 0x30 + 8034372: 6b7a ldr r2, [r7, #52] ; 0x34 + 8034374: e841 2300 strex r3, r2, [r1] + 8034378: 62fb str r3, [r7, #44] ; 0x2c return(result); - 803434a: 6afb ldr r3, [r7, #44] ; 0x2c - 803434c: 2b00 cmp r3, #0 - 803434e: d1e6 bne.n 803431e + 803437a: 6afb ldr r3, [r7, #44] ; 0x2c + 803437c: 2b00 cmp r3, #0 + 803437e: d1e6 bne.n 803434e USART_CR1_TXEIE_TXFNFIE)); ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8034350: 68fb ldr r3, [r7, #12] - 8034352: 681b ldr r3, [r3, #0] - 8034354: 3308 adds r3, #8 - 8034356: 617b str r3, [r7, #20] + 8034380: 68fb ldr r3, [r7, #12] + 8034382: 681b ldr r3, [r3, #0] + 8034384: 3308 adds r3, #8 + 8034386: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034358: 697b ldr r3, [r7, #20] - 803435a: e853 3f00 ldrex r3, [r3] - 803435e: 613b str r3, [r7, #16] + 8034388: 697b ldr r3, [r7, #20] + 803438a: e853 3f00 ldrex r3, [r3] + 803438e: 613b str r3, [r7, #16] return(result); - 8034360: 693b ldr r3, [r7, #16] - 8034362: f023 0301 bic.w r3, r3, #1 - 8034366: 66bb str r3, [r7, #104] ; 0x68 - 8034368: 68fb ldr r3, [r7, #12] - 803436a: 681b ldr r3, [r3, #0] - 803436c: 3308 adds r3, #8 - 803436e: 6eba ldr r2, [r7, #104] ; 0x68 - 8034370: 623a str r2, [r7, #32] - 8034372: 61fb str r3, [r7, #28] + 8034390: 693b ldr r3, [r7, #16] + 8034392: f023 0301 bic.w r3, r3, #1 + 8034396: 66bb str r3, [r7, #104] ; 0x68 + 8034398: 68fb ldr r3, [r7, #12] + 803439a: 681b ldr r3, [r3, #0] + 803439c: 3308 adds r3, #8 + 803439e: 6eba ldr r2, [r7, #104] ; 0x68 + 80343a0: 623a str r2, [r7, #32] + 80343a2: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034374: 69f9 ldr r1, [r7, #28] - 8034376: 6a3a ldr r2, [r7, #32] - 8034378: e841 2300 strex r3, r2, [r1] - 803437c: 61bb str r3, [r7, #24] + 80343a4: 69f9 ldr r1, [r7, #28] + 80343a6: 6a3a ldr r2, [r7, #32] + 80343a8: e841 2300 strex r3, r2, [r1] + 80343ac: 61bb str r3, [r7, #24] return(result); - 803437e: 69bb ldr r3, [r7, #24] - 8034380: 2b00 cmp r3, #0 - 8034382: d1e5 bne.n 8034350 + 80343ae: 69bb ldr r3, [r7, #24] + 80343b0: 2b00 cmp r3, #0 + 80343b2: d1e5 bne.n 8034380 huart->gState = HAL_UART_STATE_READY; - 8034384: 68fb ldr r3, [r7, #12] - 8034386: 2220 movs r2, #32 - 8034388: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80343b4: 68fb ldr r3, [r7, #12] + 80343b6: 2220 movs r2, #32 + 80343b8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 huart->RxState = HAL_UART_STATE_READY; - 803438c: 68fb ldr r3, [r7, #12] - 803438e: 2220 movs r2, #32 - 8034390: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 80343bc: 68fb ldr r3, [r7, #12] + 80343be: 2220 movs r2, #32 + 80343c0: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ErrorCode = HAL_UART_ERROR_RTO; - 8034394: 68fb ldr r3, [r7, #12] - 8034396: 2220 movs r2, #32 - 8034398: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 80343c4: 68fb ldr r3, [r7, #12] + 80343c6: 2220 movs r2, #32 + 80343c8: f8c3 208c str.w r2, [r3, #140] ; 0x8c /* Process Unlocked */ __HAL_UNLOCK(huart); - 803439c: 68fb ldr r3, [r7, #12] - 803439e: 2200 movs r2, #0 - 80343a0: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80343cc: 68fb ldr r3, [r7, #12] + 80343ce: 2200 movs r2, #0 + 80343d0: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_TIMEOUT; - 80343a4: 2303 movs r3, #3 - 80343a6: e010 b.n 80343ca + 80343d4: 2303 movs r3, #3 + 80343d6: e010 b.n 80343fa while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80343a8: 68fb ldr r3, [r7, #12] - 80343aa: 681b ldr r3, [r3, #0] - 80343ac: 69da ldr r2, [r3, #28] - 80343ae: 68bb ldr r3, [r7, #8] - 80343b0: 4013 ands r3, r2 - 80343b2: 68ba ldr r2, [r7, #8] - 80343b4: 429a cmp r2, r3 - 80343b6: bf0c ite eq - 80343b8: 2301 moveq r3, #1 - 80343ba: 2300 movne r3, #0 - 80343bc: b2db uxtb r3, r3 - 80343be: 461a mov r2, r3 - 80343c0: 79fb ldrb r3, [r7, #7] - 80343c2: 429a cmp r2, r3 - 80343c4: f43f af46 beq.w 8034254 + 80343d8: 68fb ldr r3, [r7, #12] + 80343da: 681b ldr r3, [r3, #0] + 80343dc: 69da ldr r2, [r3, #28] + 80343de: 68bb ldr r3, [r7, #8] + 80343e0: 4013 ands r3, r2 + 80343e2: 68ba ldr r2, [r7, #8] + 80343e4: 429a cmp r2, r3 + 80343e6: bf0c ite eq + 80343e8: 2301 moveq r3, #1 + 80343ea: 2300 movne r3, #0 + 80343ec: b2db uxtb r3, r3 + 80343ee: 461a mov r2, r3 + 80343f0: 79fb ldrb r3, [r7, #7] + 80343f2: 429a cmp r2, r3 + 80343f4: f43f af46 beq.w 8034284 } } } } return HAL_OK; - 80343c8: 2300 movs r3, #0 + 80343f8: 2300 movs r3, #0 } - 80343ca: 4618 mov r0, r3 - 80343cc: 3770 adds r7, #112 ; 0x70 - 80343ce: 46bd mov sp, r7 - 80343d0: bd80 pop {r7, pc} + 80343fa: 4618 mov r0, r3 + 80343fc: 3770 adds r7, #112 ; 0x70 + 80343fe: 46bd mov sp, r7 + 8034400: bd80 pop {r7, pc} ... -080343d4 : +08034404 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - 80343d4: b480 push {r7} - 80343d6: b0a3 sub sp, #140 ; 0x8c - 80343d8: af00 add r7, sp, #0 - 80343da: 60f8 str r0, [r7, #12] - 80343dc: 60b9 str r1, [r7, #8] - 80343de: 4613 mov r3, r2 - 80343e0: 80fb strh r3, [r7, #6] + 8034404: b480 push {r7} + 8034406: b0a3 sub sp, #140 ; 0x8c + 8034408: af00 add r7, sp, #0 + 803440a: 60f8 str r0, [r7, #12] + 803440c: 60b9 str r1, [r7, #8] + 803440e: 4613 mov r3, r2 + 8034410: 80fb strh r3, [r7, #6] huart->pRxBuffPtr = pData; - 80343e2: 68fb ldr r3, [r7, #12] - 80343e4: 68ba ldr r2, [r7, #8] - 80343e6: 659a str r2, [r3, #88] ; 0x58 + 8034412: 68fb ldr r3, [r7, #12] + 8034414: 68ba ldr r2, [r7, #8] + 8034416: 659a str r2, [r3, #88] ; 0x58 huart->RxXferSize = Size; - 80343e8: 68fb ldr r3, [r7, #12] - 80343ea: 88fa ldrh r2, [r7, #6] - 80343ec: f8a3 205c strh.w r2, [r3, #92] ; 0x5c + 8034418: 68fb ldr r3, [r7, #12] + 803441a: 88fa ldrh r2, [r7, #6] + 803441c: f8a3 205c strh.w r2, [r3, #92] ; 0x5c huart->RxXferCount = Size; - 80343f0: 68fb ldr r3, [r7, #12] - 80343f2: 88fa ldrh r2, [r7, #6] - 80343f4: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 8034420: 68fb ldr r3, [r7, #12] + 8034422: 88fa ldrh r2, [r7, #6] + 8034424: f8a3 205e strh.w r2, [r3, #94] ; 0x5e huart->RxISR = NULL; - 80343f8: 68fb ldr r3, [r7, #12] - 80343fa: 2200 movs r2, #0 - 80343fc: 671a str r2, [r3, #112] ; 0x70 + 8034428: 68fb ldr r3, [r7, #12] + 803442a: 2200 movs r2, #0 + 803442c: 671a str r2, [r3, #112] ; 0x70 /* Computation of UART mask to apply to RDR register */ UART_MASK_COMPUTATION(huart); - 80343fe: 68fb ldr r3, [r7, #12] - 8034400: 689b ldr r3, [r3, #8] - 8034402: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8034406: d10e bne.n 8034426 - 8034408: 68fb ldr r3, [r7, #12] - 803440a: 691b ldr r3, [r3, #16] - 803440c: 2b00 cmp r3, #0 - 803440e: d105 bne.n 803441c - 8034410: 68fb ldr r3, [r7, #12] - 8034412: f240 12ff movw r2, #511 ; 0x1ff - 8034416: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 803441a: e02d b.n 8034478 - 803441c: 68fb ldr r3, [r7, #12] - 803441e: 22ff movs r2, #255 ; 0xff - 8034420: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 8034424: e028 b.n 8034478 - 8034426: 68fb ldr r3, [r7, #12] - 8034428: 689b ldr r3, [r3, #8] - 803442a: 2b00 cmp r3, #0 - 803442c: d10d bne.n 803444a 803442e: 68fb ldr r3, [r7, #12] - 8034430: 691b ldr r3, [r3, #16] - 8034432: 2b00 cmp r3, #0 - 8034434: d104 bne.n 8034440 - 8034436: 68fb ldr r3, [r7, #12] - 8034438: 22ff movs r2, #255 ; 0xff - 803443a: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 803443e: e01b b.n 8034478 + 8034430: 689b ldr r3, [r3, #8] + 8034432: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8034436: d10e bne.n 8034456 + 8034438: 68fb ldr r3, [r7, #12] + 803443a: 691b ldr r3, [r3, #16] + 803443c: 2b00 cmp r3, #0 + 803443e: d105 bne.n 803444c 8034440: 68fb ldr r3, [r7, #12] - 8034442: 227f movs r2, #127 ; 0x7f - 8034444: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 8034448: e016 b.n 8034478 - 803444a: 68fb ldr r3, [r7, #12] - 803444c: 689b ldr r3, [r3, #8] - 803444e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8034452: d10d bne.n 8034470 - 8034454: 68fb ldr r3, [r7, #12] - 8034456: 691b ldr r3, [r3, #16] - 8034458: 2b00 cmp r3, #0 - 803445a: d104 bne.n 8034466 - 803445c: 68fb ldr r3, [r7, #12] - 803445e: 227f movs r2, #127 ; 0x7f - 8034460: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 8034464: e008 b.n 8034478 + 8034442: f240 12ff movw r2, #511 ; 0x1ff + 8034446: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 803444a: e02d b.n 80344a8 + 803444c: 68fb ldr r3, [r7, #12] + 803444e: 22ff movs r2, #255 ; 0xff + 8034450: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 8034454: e028 b.n 80344a8 + 8034456: 68fb ldr r3, [r7, #12] + 8034458: 689b ldr r3, [r3, #8] + 803445a: 2b00 cmp r3, #0 + 803445c: d10d bne.n 803447a + 803445e: 68fb ldr r3, [r7, #12] + 8034460: 691b ldr r3, [r3, #16] + 8034462: 2b00 cmp r3, #0 + 8034464: d104 bne.n 8034470 8034466: 68fb ldr r3, [r7, #12] - 8034468: 223f movs r2, #63 ; 0x3f + 8034468: 22ff movs r2, #255 ; 0xff 803446a: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 803446e: e003 b.n 8034478 + 803446e: e01b b.n 80344a8 8034470: 68fb ldr r3, [r7, #12] - 8034472: 2200 movs r2, #0 + 8034472: 227f movs r2, #127 ; 0x7f 8034474: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 8034478: e016 b.n 80344a8 + 803447a: 68fb ldr r3, [r7, #12] + 803447c: 689b ldr r3, [r3, #8] + 803447e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8034482: d10d bne.n 80344a0 + 8034484: 68fb ldr r3, [r7, #12] + 8034486: 691b ldr r3, [r3, #16] + 8034488: 2b00 cmp r3, #0 + 803448a: d104 bne.n 8034496 + 803448c: 68fb ldr r3, [r7, #12] + 803448e: 227f movs r2, #127 ; 0x7f + 8034490: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 8034494: e008 b.n 80344a8 + 8034496: 68fb ldr r3, [r7, #12] + 8034498: 223f movs r2, #63 ; 0x3f + 803449a: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 803449e: e003 b.n 80344a8 + 80344a0: 68fb ldr r3, [r7, #12] + 80344a2: 2200 movs r2, #0 + 80344a4: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8034478: 68fb ldr r3, [r7, #12] - 803447a: 2200 movs r2, #0 - 803447c: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 80344a8: 68fb ldr r3, [r7, #12] + 80344aa: 2200 movs r2, #0 + 80344ac: f8c3 208c str.w r2, [r3, #140] ; 0x8c huart->RxState = HAL_UART_STATE_BUSY_RX; - 8034480: 68fb ldr r3, [r7, #12] - 8034482: 2222 movs r2, #34 ; 0x22 - 8034484: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 80344b0: 68fb ldr r3, [r7, #12] + 80344b2: 2222 movs r2, #34 ; 0x22 + 80344b4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8034488: 68fb ldr r3, [r7, #12] - 803448a: 681b ldr r3, [r3, #0] - 803448c: 3308 adds r3, #8 - 803448e: 667b str r3, [r7, #100] ; 0x64 + 80344b8: 68fb ldr r3, [r7, #12] + 80344ba: 681b ldr r3, [r3, #0] + 80344bc: 3308 adds r3, #8 + 80344be: 667b str r3, [r7, #100] ; 0x64 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034490: 6e7b ldr r3, [r7, #100] ; 0x64 - 8034492: e853 3f00 ldrex r3, [r3] - 8034496: 663b str r3, [r7, #96] ; 0x60 + 80344c0: 6e7b ldr r3, [r7, #100] ; 0x64 + 80344c2: e853 3f00 ldrex r3, [r3] + 80344c6: 663b str r3, [r7, #96] ; 0x60 return(result); - 8034498: 6e3b ldr r3, [r7, #96] ; 0x60 - 803449a: f043 0301 orr.w r3, r3, #1 - 803449e: f8c7 3084 str.w r3, [r7, #132] ; 0x84 - 80344a2: 68fb ldr r3, [r7, #12] - 80344a4: 681b ldr r3, [r3, #0] - 80344a6: 3308 adds r3, #8 - 80344a8: f8d7 2084 ldr.w r2, [r7, #132] ; 0x84 - 80344ac: 673a str r2, [r7, #112] ; 0x70 - 80344ae: 66fb str r3, [r7, #108] ; 0x6c + 80344c8: 6e3b ldr r3, [r7, #96] ; 0x60 + 80344ca: f043 0301 orr.w r3, r3, #1 + 80344ce: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 80344d2: 68fb ldr r3, [r7, #12] + 80344d4: 681b ldr r3, [r3, #0] + 80344d6: 3308 adds r3, #8 + 80344d8: f8d7 2084 ldr.w r2, [r7, #132] ; 0x84 + 80344dc: 673a str r2, [r7, #112] ; 0x70 + 80344de: 66fb str r3, [r7, #108] ; 0x6c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80344b0: 6ef9 ldr r1, [r7, #108] ; 0x6c - 80344b2: 6f3a ldr r2, [r7, #112] ; 0x70 - 80344b4: e841 2300 strex r3, r2, [r1] - 80344b8: 66bb str r3, [r7, #104] ; 0x68 + 80344e0: 6ef9 ldr r1, [r7, #108] ; 0x6c + 80344e2: 6f3a ldr r2, [r7, #112] ; 0x70 + 80344e4: e841 2300 strex r3, r2, [r1] + 80344e8: 66bb str r3, [r7, #104] ; 0x68 return(result); - 80344ba: 6ebb ldr r3, [r7, #104] ; 0x68 - 80344bc: 2b00 cmp r3, #0 - 80344be: d1e3 bne.n 8034488 + 80344ea: 6ebb ldr r3, [r7, #104] ; 0x68 + 80344ec: 2b00 cmp r3, #0 + 80344ee: d1e3 bne.n 80344b8 /* Configure Rx interrupt processing */ if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess)) - 80344c0: 68fb ldr r3, [r7, #12] - 80344c2: 6e5b ldr r3, [r3, #100] ; 0x64 - 80344c4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80344c8: d153 bne.n 8034572 - 80344ca: 68fb ldr r3, [r7, #12] - 80344cc: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 80344d0: 88fa ldrh r2, [r7, #6] - 80344d2: 429a cmp r2, r3 - 80344d4: d34d bcc.n 8034572 + 80344f0: 68fb ldr r3, [r7, #12] + 80344f2: 6e5b ldr r3, [r3, #100] ; 0x64 + 80344f4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80344f8: d153 bne.n 80345a2 + 80344fa: 68fb ldr r3, [r7, #12] + 80344fc: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 8034500: 88fa ldrh r2, [r7, #6] + 8034502: 429a cmp r2, r3 + 8034504: d34d bcc.n 80345a2 { /* Set the Rx ISR function pointer according to the data word length */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80344d6: 68fb ldr r3, [r7, #12] - 80344d8: 689b ldr r3, [r3, #8] - 80344da: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80344de: d107 bne.n 80344f0 - 80344e0: 68fb ldr r3, [r7, #12] - 80344e2: 691b ldr r3, [r3, #16] - 80344e4: 2b00 cmp r3, #0 - 80344e6: d103 bne.n 80344f0 + 8034506: 68fb ldr r3, [r7, #12] + 8034508: 689b ldr r3, [r3, #8] + 803450a: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 803450e: d107 bne.n 8034520 + 8034510: 68fb ldr r3, [r7, #12] + 8034512: 691b ldr r3, [r3, #16] + 8034514: 2b00 cmp r3, #0 + 8034516: d103 bne.n 8034520 { huart->RxISR = UART_RxISR_16BIT_FIFOEN; - 80344e8: 68fb ldr r3, [r7, #12] - 80344ea: 4a4b ldr r2, [pc, #300] ; (8034618 ) - 80344ec: 671a str r2, [r3, #112] ; 0x70 - 80344ee: e002 b.n 80344f6 + 8034518: 68fb ldr r3, [r7, #12] + 803451a: 4a4b ldr r2, [pc, #300] ; (8034648 ) + 803451c: 671a str r2, [r3, #112] ; 0x70 + 803451e: e002 b.n 8034526 } else { huart->RxISR = UART_RxISR_8BIT_FIFOEN; - 80344f0: 68fb ldr r3, [r7, #12] - 80344f2: 4a4a ldr r2, [pc, #296] ; (803461c ) - 80344f4: 671a str r2, [r3, #112] ; 0x70 + 8034520: 68fb ldr r3, [r7, #12] + 8034522: 4a4a ldr r2, [pc, #296] ; (803464c ) + 8034524: 671a str r2, [r3, #112] ; 0x70 } __HAL_UNLOCK(huart); - 80344f6: 68fb ldr r3, [r7, #12] - 80344f8: 2200 movs r2, #0 - 80344fa: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8034526: 68fb ldr r3, [r7, #12] + 8034528: 2200 movs r2, #0 + 803452a: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */ if (huart->Init.Parity != UART_PARITY_NONE) - 80344fe: 68fb ldr r3, [r7, #12] - 8034500: 691b ldr r3, [r3, #16] - 8034502: 2b00 cmp r3, #0 - 8034504: d01a beq.n 803453c + 803452e: 68fb ldr r3, [r7, #12] + 8034530: 691b ldr r3, [r3, #16] + 8034532: 2b00 cmp r3, #0 + 8034534: d01a beq.n 803456c { ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8034506: 68fb ldr r3, [r7, #12] - 8034508: 681b ldr r3, [r3, #0] - 803450a: 653b str r3, [r7, #80] ; 0x50 + 8034536: 68fb ldr r3, [r7, #12] + 8034538: 681b ldr r3, [r3, #0] + 803453a: 653b str r3, [r7, #80] ; 0x50 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803450c: 6d3b ldr r3, [r7, #80] ; 0x50 - 803450e: e853 3f00 ldrex r3, [r3] - 8034512: 64fb str r3, [r7, #76] ; 0x4c + 803453c: 6d3b ldr r3, [r7, #80] ; 0x50 + 803453e: e853 3f00 ldrex r3, [r3] + 8034542: 64fb str r3, [r7, #76] ; 0x4c return(result); - 8034514: 6cfb ldr r3, [r7, #76] ; 0x4c - 8034516: f443 7380 orr.w r3, r3, #256 ; 0x100 - 803451a: f8c7 3080 str.w r3, [r7, #128] ; 0x80 - 803451e: 68fb ldr r3, [r7, #12] - 8034520: 681b ldr r3, [r3, #0] - 8034522: 461a mov r2, r3 - 8034524: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80 - 8034528: 65fb str r3, [r7, #92] ; 0x5c - 803452a: 65ba str r2, [r7, #88] ; 0x58 + 8034544: 6cfb ldr r3, [r7, #76] ; 0x4c + 8034546: f443 7380 orr.w r3, r3, #256 ; 0x100 + 803454a: f8c7 3080 str.w r3, [r7, #128] ; 0x80 + 803454e: 68fb ldr r3, [r7, #12] + 8034550: 681b ldr r3, [r3, #0] + 8034552: 461a mov r2, r3 + 8034554: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80 + 8034558: 65fb str r3, [r7, #92] ; 0x5c + 803455a: 65ba str r2, [r7, #88] ; 0x58 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803452c: 6db9 ldr r1, [r7, #88] ; 0x58 - 803452e: 6dfa ldr r2, [r7, #92] ; 0x5c - 8034530: e841 2300 strex r3, r2, [r1] - 8034534: 657b str r3, [r7, #84] ; 0x54 + 803455c: 6db9 ldr r1, [r7, #88] ; 0x58 + 803455e: 6dfa ldr r2, [r7, #92] ; 0x5c + 8034560: e841 2300 strex r3, r2, [r1] + 8034564: 657b str r3, [r7, #84] ; 0x54 return(result); - 8034536: 6d7b ldr r3, [r7, #84] ; 0x54 - 8034538: 2b00 cmp r3, #0 - 803453a: d1e4 bne.n 8034506 + 8034566: 6d7b ldr r3, [r7, #84] ; 0x54 + 8034568: 2b00 cmp r3, #0 + 803456a: d1e4 bne.n 8034536 } ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - 803453c: 68fb ldr r3, [r7, #12] - 803453e: 681b ldr r3, [r3, #0] - 8034540: 3308 adds r3, #8 - 8034542: 63fb str r3, [r7, #60] ; 0x3c + 803456c: 68fb ldr r3, [r7, #12] + 803456e: 681b ldr r3, [r3, #0] + 8034570: 3308 adds r3, #8 + 8034572: 63fb str r3, [r7, #60] ; 0x3c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034544: 6bfb ldr r3, [r7, #60] ; 0x3c - 8034546: e853 3f00 ldrex r3, [r3] - 803454a: 63bb str r3, [r7, #56] ; 0x38 + 8034574: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034576: e853 3f00 ldrex r3, [r3] + 803457a: 63bb str r3, [r7, #56] ; 0x38 return(result); - 803454c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803454e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8034552: 67fb str r3, [r7, #124] ; 0x7c - 8034554: 68fb ldr r3, [r7, #12] - 8034556: 681b ldr r3, [r3, #0] - 8034558: 3308 adds r3, #8 - 803455a: 6ffa ldr r2, [r7, #124] ; 0x7c - 803455c: 64ba str r2, [r7, #72] ; 0x48 - 803455e: 647b str r3, [r7, #68] ; 0x44 + 803457c: 6bbb ldr r3, [r7, #56] ; 0x38 + 803457e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8034582: 67fb str r3, [r7, #124] ; 0x7c + 8034584: 68fb ldr r3, [r7, #12] + 8034586: 681b ldr r3, [r3, #0] + 8034588: 3308 adds r3, #8 + 803458a: 6ffa ldr r2, [r7, #124] ; 0x7c + 803458c: 64ba str r2, [r7, #72] ; 0x48 + 803458e: 647b str r3, [r7, #68] ; 0x44 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034560: 6c79 ldr r1, [r7, #68] ; 0x44 - 8034562: 6cba ldr r2, [r7, #72] ; 0x48 - 8034564: e841 2300 strex r3, r2, [r1] - 8034568: 643b str r3, [r7, #64] ; 0x40 + 8034590: 6c79 ldr r1, [r7, #68] ; 0x44 + 8034592: 6cba ldr r2, [r7, #72] ; 0x48 + 8034594: e841 2300 strex r3, r2, [r1] + 8034598: 643b str r3, [r7, #64] ; 0x40 return(result); - 803456a: 6c3b ldr r3, [r7, #64] ; 0x40 - 803456c: 2b00 cmp r3, #0 - 803456e: d1e5 bne.n 803453c - 8034570: e04a b.n 8034608 + 803459a: 6c3b ldr r3, [r7, #64] ; 0x40 + 803459c: 2b00 cmp r3, #0 + 803459e: d1e5 bne.n 803456c + 80345a0: e04a b.n 8034638 } else { /* Set the Rx ISR function pointer according to the data word length */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8034572: 68fb ldr r3, [r7, #12] - 8034574: 689b ldr r3, [r3, #8] - 8034576: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 803457a: d107 bne.n 803458c - 803457c: 68fb ldr r3, [r7, #12] - 803457e: 691b ldr r3, [r3, #16] - 8034580: 2b00 cmp r3, #0 - 8034582: d103 bne.n 803458c + 80345a2: 68fb ldr r3, [r7, #12] + 80345a4: 689b ldr r3, [r3, #8] + 80345a6: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80345aa: d107 bne.n 80345bc + 80345ac: 68fb ldr r3, [r7, #12] + 80345ae: 691b ldr r3, [r3, #16] + 80345b0: 2b00 cmp r3, #0 + 80345b2: d103 bne.n 80345bc { huart->RxISR = UART_RxISR_16BIT; - 8034584: 68fb ldr r3, [r7, #12] - 8034586: 4a26 ldr r2, [pc, #152] ; (8034620 ) - 8034588: 671a str r2, [r3, #112] ; 0x70 - 803458a: e002 b.n 8034592 + 80345b4: 68fb ldr r3, [r7, #12] + 80345b6: 4a26 ldr r2, [pc, #152] ; (8034650 ) + 80345b8: 671a str r2, [r3, #112] ; 0x70 + 80345ba: e002 b.n 80345c2 } else { huart->RxISR = UART_RxISR_8BIT; - 803458c: 68fb ldr r3, [r7, #12] - 803458e: 4a25 ldr r2, [pc, #148] ; (8034624 ) - 8034590: 671a str r2, [r3, #112] ; 0x70 + 80345bc: 68fb ldr r3, [r7, #12] + 80345be: 4a25 ldr r2, [pc, #148] ; (8034654 ) + 80345c0: 671a str r2, [r3, #112] ; 0x70 } __HAL_UNLOCK(huart); - 8034592: 68fb ldr r3, [r7, #12] - 8034594: 2200 movs r2, #0 - 8034596: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80345c2: 68fb ldr r3, [r7, #12] + 80345c4: 2200 movs r2, #0 + 80345c6: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ if (huart->Init.Parity != UART_PARITY_NONE) - 803459a: 68fb ldr r3, [r7, #12] - 803459c: 691b ldr r3, [r3, #16] - 803459e: 2b00 cmp r3, #0 - 80345a0: d019 beq.n 80345d6 + 80345ca: 68fb ldr r3, [r7, #12] + 80345cc: 691b ldr r3, [r3, #16] + 80345ce: 2b00 cmp r3, #0 + 80345d0: d019 beq.n 8034606 { ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); - 80345a2: 68fb ldr r3, [r7, #12] - 80345a4: 681b ldr r3, [r3, #0] - 80345a6: 62bb str r3, [r7, #40] ; 0x28 + 80345d2: 68fb ldr r3, [r7, #12] + 80345d4: 681b ldr r3, [r3, #0] + 80345d6: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80345a8: 6abb ldr r3, [r7, #40] ; 0x28 - 80345aa: e853 3f00 ldrex r3, [r3] - 80345ae: 627b str r3, [r7, #36] ; 0x24 + 80345d8: 6abb ldr r3, [r7, #40] ; 0x28 + 80345da: e853 3f00 ldrex r3, [r3] + 80345de: 627b str r3, [r7, #36] ; 0x24 return(result); - 80345b0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80345b2: f443 7390 orr.w r3, r3, #288 ; 0x120 - 80345b6: 677b str r3, [r7, #116] ; 0x74 - 80345b8: 68fb ldr r3, [r7, #12] - 80345ba: 681b ldr r3, [r3, #0] - 80345bc: 461a mov r2, r3 - 80345be: 6f7b ldr r3, [r7, #116] ; 0x74 - 80345c0: 637b str r3, [r7, #52] ; 0x34 - 80345c2: 633a str r2, [r7, #48] ; 0x30 + 80345e0: 6a7b ldr r3, [r7, #36] ; 0x24 + 80345e2: f443 7390 orr.w r3, r3, #288 ; 0x120 + 80345e6: 677b str r3, [r7, #116] ; 0x74 + 80345e8: 68fb ldr r3, [r7, #12] + 80345ea: 681b ldr r3, [r3, #0] + 80345ec: 461a mov r2, r3 + 80345ee: 6f7b ldr r3, [r7, #116] ; 0x74 + 80345f0: 637b str r3, [r7, #52] ; 0x34 + 80345f2: 633a str r2, [r7, #48] ; 0x30 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80345c4: 6b39 ldr r1, [r7, #48] ; 0x30 - 80345c6: 6b7a ldr r2, [r7, #52] ; 0x34 - 80345c8: e841 2300 strex r3, r2, [r1] - 80345cc: 62fb str r3, [r7, #44] ; 0x2c + 80345f4: 6b39 ldr r1, [r7, #48] ; 0x30 + 80345f6: 6b7a ldr r2, [r7, #52] ; 0x34 + 80345f8: e841 2300 strex r3, r2, [r1] + 80345fc: 62fb str r3, [r7, #44] ; 0x2c return(result); - 80345ce: 6afb ldr r3, [r7, #44] ; 0x2c - 80345d0: 2b00 cmp r3, #0 - 80345d2: d1e6 bne.n 80345a2 - 80345d4: e018 b.n 8034608 + 80345fe: 6afb ldr r3, [r7, #44] ; 0x2c + 8034600: 2b00 cmp r3, #0 + 8034602: d1e6 bne.n 80345d2 + 8034604: e018 b.n 8034638 } else { ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - 80345d6: 68fb ldr r3, [r7, #12] - 80345d8: 681b ldr r3, [r3, #0] - 80345da: 617b str r3, [r7, #20] + 8034606: 68fb ldr r3, [r7, #12] + 8034608: 681b ldr r3, [r3, #0] + 803460a: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80345dc: 697b ldr r3, [r7, #20] - 80345de: e853 3f00 ldrex r3, [r3] - 80345e2: 613b str r3, [r7, #16] + 803460c: 697b ldr r3, [r7, #20] + 803460e: e853 3f00 ldrex r3, [r3] + 8034612: 613b str r3, [r7, #16] return(result); - 80345e4: 693b ldr r3, [r7, #16] - 80345e6: f043 0320 orr.w r3, r3, #32 - 80345ea: 67bb str r3, [r7, #120] ; 0x78 - 80345ec: 68fb ldr r3, [r7, #12] - 80345ee: 681b ldr r3, [r3, #0] - 80345f0: 461a mov r2, r3 - 80345f2: 6fbb ldr r3, [r7, #120] ; 0x78 - 80345f4: 623b str r3, [r7, #32] - 80345f6: 61fa str r2, [r7, #28] + 8034614: 693b ldr r3, [r7, #16] + 8034616: f043 0320 orr.w r3, r3, #32 + 803461a: 67bb str r3, [r7, #120] ; 0x78 + 803461c: 68fb ldr r3, [r7, #12] + 803461e: 681b ldr r3, [r3, #0] + 8034620: 461a mov r2, r3 + 8034622: 6fbb ldr r3, [r7, #120] ; 0x78 + 8034624: 623b str r3, [r7, #32] + 8034626: 61fa str r2, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80345f8: 69f9 ldr r1, [r7, #28] - 80345fa: 6a3a ldr r2, [r7, #32] - 80345fc: e841 2300 strex r3, r2, [r1] - 8034600: 61bb str r3, [r7, #24] + 8034628: 69f9 ldr r1, [r7, #28] + 803462a: 6a3a ldr r2, [r7, #32] + 803462c: e841 2300 strex r3, r2, [r1] + 8034630: 61bb str r3, [r7, #24] return(result); - 8034602: 69bb ldr r3, [r7, #24] - 8034604: 2b00 cmp r3, #0 - 8034606: d1e6 bne.n 80345d6 + 8034632: 69bb ldr r3, [r7, #24] + 8034634: 2b00 cmp r3, #0 + 8034636: d1e6 bne.n 8034606 } } return HAL_OK; - 8034608: 2300 movs r3, #0 -} - 803460a: 4618 mov r0, r3 - 803460c: 378c adds r7, #140 ; 0x8c - 803460e: 46bd mov sp, r7 - 8034610: f85d 7b04 ldr.w r7, [sp], #4 - 8034614: 4770 bx lr - 8034616: bf00 nop - 8034618: 08034ee5 .word 0x08034ee5 - 803461c: 08034bed .word 0x08034bed - 8034620: 08034a8d .word 0x08034a8d - 8034624: 0803492d .word 0x0803492d - -08034628 : + 8034638: 2300 movs r3, #0 +} + 803463a: 4618 mov r0, r3 + 803463c: 378c adds r7, #140 ; 0x8c + 803463e: 46bd mov sp, r7 + 8034640: f85d 7b04 ldr.w r7, [sp], #4 + 8034644: 4770 bx lr + 8034646: bf00 nop + 8034648: 08034f15 .word 0x08034f15 + 803464c: 08034c1d .word 0x08034c1d + 8034650: 08034abd .word 0x08034abd + 8034654: 0803495d .word 0x0803495d + +08034658 : * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). * @param huart UART handle. * @retval None */ static void UART_EndTxTransfer(UART_HandleTypeDef *huart) { - 8034628: b480 push {r7} - 803462a: b08f sub sp, #60 ; 0x3c - 803462c: af00 add r7, sp, #0 - 803462e: 6078 str r0, [r7, #4] + 8034658: b480 push {r7} + 803465a: b08f sub sp, #60 ; 0x3c + 803465c: af00 add r7, sp, #0 + 803465e: 6078 str r0, [r7, #4] /* Disable TXEIE, TCIE, TXFT interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); - 8034630: 687b ldr r3, [r7, #4] - 8034632: 681b ldr r3, [r3, #0] - 8034634: 623b str r3, [r7, #32] + 8034660: 687b ldr r3, [r7, #4] + 8034662: 681b ldr r3, [r3, #0] + 8034664: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034636: 6a3b ldr r3, [r7, #32] - 8034638: e853 3f00 ldrex r3, [r3] - 803463c: 61fb str r3, [r7, #28] + 8034666: 6a3b ldr r3, [r7, #32] + 8034668: e853 3f00 ldrex r3, [r3] + 803466c: 61fb str r3, [r7, #28] return(result); - 803463e: 69fb ldr r3, [r7, #28] - 8034640: f023 03c0 bic.w r3, r3, #192 ; 0xc0 - 8034644: 637b str r3, [r7, #52] ; 0x34 - 8034646: 687b ldr r3, [r7, #4] - 8034648: 681b ldr r3, [r3, #0] - 803464a: 461a mov r2, r3 - 803464c: 6b7b ldr r3, [r7, #52] ; 0x34 - 803464e: 62fb str r3, [r7, #44] ; 0x2c - 8034650: 62ba str r2, [r7, #40] ; 0x28 + 803466e: 69fb ldr r3, [r7, #28] + 8034670: f023 03c0 bic.w r3, r3, #192 ; 0xc0 + 8034674: 637b str r3, [r7, #52] ; 0x34 + 8034676: 687b ldr r3, [r7, #4] + 8034678: 681b ldr r3, [r3, #0] + 803467a: 461a mov r2, r3 + 803467c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803467e: 62fb str r3, [r7, #44] ; 0x2c + 8034680: 62ba str r2, [r7, #40] ; 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034652: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8034654: 6afa ldr r2, [r7, #44] ; 0x2c - 8034656: e841 2300 strex r3, r2, [r1] - 803465a: 627b str r3, [r7, #36] ; 0x24 + 8034682: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8034684: 6afa ldr r2, [r7, #44] ; 0x2c + 8034686: e841 2300 strex r3, r2, [r1] + 803468a: 627b str r3, [r7, #36] ; 0x24 return(result); - 803465c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803465e: 2b00 cmp r3, #0 - 8034660: d1e6 bne.n 8034630 + 803468c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803468e: 2b00 cmp r3, #0 + 8034690: d1e6 bne.n 8034660 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE)); - 8034662: 687b ldr r3, [r7, #4] - 8034664: 681b ldr r3, [r3, #0] - 8034666: 3308 adds r3, #8 - 8034668: 60fb str r3, [r7, #12] + 8034692: 687b ldr r3, [r7, #4] + 8034694: 681b ldr r3, [r3, #0] + 8034696: 3308 adds r3, #8 + 8034698: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803466a: 68fb ldr r3, [r7, #12] - 803466c: e853 3f00 ldrex r3, [r3] - 8034670: 60bb str r3, [r7, #8] + 803469a: 68fb ldr r3, [r7, #12] + 803469c: e853 3f00 ldrex r3, [r3] + 80346a0: 60bb str r3, [r7, #8] return(result); - 8034672: 68bb ldr r3, [r7, #8] - 8034674: f423 0300 bic.w r3, r3, #8388608 ; 0x800000 - 8034678: 633b str r3, [r7, #48] ; 0x30 - 803467a: 687b ldr r3, [r7, #4] - 803467c: 681b ldr r3, [r3, #0] - 803467e: 3308 adds r3, #8 - 8034680: 6b3a ldr r2, [r7, #48] ; 0x30 - 8034682: 61ba str r2, [r7, #24] - 8034684: 617b str r3, [r7, #20] + 80346a2: 68bb ldr r3, [r7, #8] + 80346a4: f423 0300 bic.w r3, r3, #8388608 ; 0x800000 + 80346a8: 633b str r3, [r7, #48] ; 0x30 + 80346aa: 687b ldr r3, [r7, #4] + 80346ac: 681b ldr r3, [r3, #0] + 80346ae: 3308 adds r3, #8 + 80346b0: 6b3a ldr r2, [r7, #48] ; 0x30 + 80346b2: 61ba str r2, [r7, #24] + 80346b4: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034686: 6979 ldr r1, [r7, #20] - 8034688: 69ba ldr r2, [r7, #24] - 803468a: e841 2300 strex r3, r2, [r1] - 803468e: 613b str r3, [r7, #16] + 80346b6: 6979 ldr r1, [r7, #20] + 80346b8: 69ba ldr r2, [r7, #24] + 80346ba: e841 2300 strex r3, r2, [r1] + 80346be: 613b str r3, [r7, #16] return(result); - 8034690: 693b ldr r3, [r7, #16] - 8034692: 2b00 cmp r3, #0 - 8034694: d1e5 bne.n 8034662 + 80346c0: 693b ldr r3, [r7, #16] + 80346c2: 2b00 cmp r3, #0 + 80346c4: d1e5 bne.n 8034692 /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8034696: 687b ldr r3, [r7, #4] - 8034698: 2220 movs r2, #32 - 803469a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 -} - 803469e: bf00 nop - 80346a0: 373c adds r7, #60 ; 0x3c - 80346a2: 46bd mov sp, r7 - 80346a4: f85d 7b04 ldr.w r7, [sp], #4 - 80346a8: 4770 bx lr + 80346c6: 687b ldr r3, [r7, #4] + 80346c8: 2220 movs r2, #32 + 80346ca: f8c3 2084 str.w r2, [r3, #132] ; 0x84 +} + 80346ce: bf00 nop + 80346d0: 373c adds r7, #60 ; 0x3c + 80346d2: 46bd mov sp, r7 + 80346d4: f85d 7b04 ldr.w r7, [sp], #4 + 80346d8: 4770 bx lr ... -080346ac : +080346dc : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 80346ac: b480 push {r7} - 80346ae: b095 sub sp, #84 ; 0x54 - 80346b0: af00 add r7, sp, #0 - 80346b2: 6078 str r0, [r7, #4] + 80346dc: b480 push {r7} + 80346de: b095 sub sp, #84 ; 0x54 + 80346e0: af00 add r7, sp, #0 + 80346e2: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 80346b4: 687b ldr r3, [r7, #4] - 80346b6: 681b ldr r3, [r3, #0] - 80346b8: 637b str r3, [r7, #52] ; 0x34 + 80346e4: 687b ldr r3, [r7, #4] + 80346e6: 681b ldr r3, [r3, #0] + 80346e8: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80346ba: 6b7b ldr r3, [r7, #52] ; 0x34 - 80346bc: e853 3f00 ldrex r3, [r3] - 80346c0: 633b str r3, [r7, #48] ; 0x30 + 80346ea: 6b7b ldr r3, [r7, #52] ; 0x34 + 80346ec: e853 3f00 ldrex r3, [r3] + 80346f0: 633b str r3, [r7, #48] ; 0x30 return(result); - 80346c2: 6b3b ldr r3, [r7, #48] ; 0x30 - 80346c4: f423 7390 bic.w r3, r3, #288 ; 0x120 - 80346c8: 64fb str r3, [r7, #76] ; 0x4c - 80346ca: 687b ldr r3, [r7, #4] - 80346cc: 681b ldr r3, [r3, #0] - 80346ce: 461a mov r2, r3 - 80346d0: 6cfb ldr r3, [r7, #76] ; 0x4c - 80346d2: 643b str r3, [r7, #64] ; 0x40 - 80346d4: 63fa str r2, [r7, #60] ; 0x3c + 80346f2: 6b3b ldr r3, [r7, #48] ; 0x30 + 80346f4: f423 7390 bic.w r3, r3, #288 ; 0x120 + 80346f8: 64fb str r3, [r7, #76] ; 0x4c + 80346fa: 687b ldr r3, [r7, #4] + 80346fc: 681b ldr r3, [r3, #0] + 80346fe: 461a mov r2, r3 + 8034700: 6cfb ldr r3, [r7, #76] ; 0x4c + 8034702: 643b str r3, [r7, #64] ; 0x40 + 8034704: 63fa str r2, [r7, #60] ; 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80346d6: 6bf9 ldr r1, [r7, #60] ; 0x3c - 80346d8: 6c3a ldr r2, [r7, #64] ; 0x40 - 80346da: e841 2300 strex r3, r2, [r1] - 80346de: 63bb str r3, [r7, #56] ; 0x38 + 8034706: 6bf9 ldr r1, [r7, #60] ; 0x3c + 8034708: 6c3a ldr r2, [r7, #64] ; 0x40 + 803470a: e841 2300 strex r3, r2, [r1] + 803470e: 63bb str r3, [r7, #56] ; 0x38 return(result); - 80346e0: 6bbb ldr r3, [r7, #56] ; 0x38 - 80346e2: 2b00 cmp r3, #0 - 80346e4: d1e6 bne.n 80346b4 + 8034710: 6bbb ldr r3, [r7, #56] ; 0x38 + 8034712: 2b00 cmp r3, #0 + 8034714: d1e6 bne.n 80346e4 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 80346e6: 687b ldr r3, [r7, #4] - 80346e8: 681b ldr r3, [r3, #0] - 80346ea: 3308 adds r3, #8 - 80346ec: 623b str r3, [r7, #32] + 8034716: 687b ldr r3, [r7, #4] + 8034718: 681b ldr r3, [r3, #0] + 803471a: 3308 adds r3, #8 + 803471c: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80346ee: 6a3b ldr r3, [r7, #32] - 80346f0: e853 3f00 ldrex r3, [r3] - 80346f4: 61fb str r3, [r7, #28] + 803471e: 6a3b ldr r3, [r7, #32] + 8034720: e853 3f00 ldrex r3, [r3] + 8034724: 61fb str r3, [r7, #28] return(result); - 80346f6: 69fa ldr r2, [r7, #28] - 80346f8: 4b1e ldr r3, [pc, #120] ; (8034774 ) - 80346fa: 4013 ands r3, r2 - 80346fc: 64bb str r3, [r7, #72] ; 0x48 - 80346fe: 687b ldr r3, [r7, #4] - 8034700: 681b ldr r3, [r3, #0] - 8034702: 3308 adds r3, #8 - 8034704: 6cba ldr r2, [r7, #72] ; 0x48 - 8034706: 62fa str r2, [r7, #44] ; 0x2c - 8034708: 62bb str r3, [r7, #40] ; 0x28 + 8034726: 69fa ldr r2, [r7, #28] + 8034728: 4b1e ldr r3, [pc, #120] ; (80347a4 ) + 803472a: 4013 ands r3, r2 + 803472c: 64bb str r3, [r7, #72] ; 0x48 + 803472e: 687b ldr r3, [r7, #4] + 8034730: 681b ldr r3, [r3, #0] + 8034732: 3308 adds r3, #8 + 8034734: 6cba ldr r2, [r7, #72] ; 0x48 + 8034736: 62fa str r2, [r7, #44] ; 0x2c + 8034738: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803470a: 6ab9 ldr r1, [r7, #40] ; 0x28 - 803470c: 6afa ldr r2, [r7, #44] ; 0x2c - 803470e: e841 2300 strex r3, r2, [r1] - 8034712: 627b str r3, [r7, #36] ; 0x24 + 803473a: 6ab9 ldr r1, [r7, #40] ; 0x28 + 803473c: 6afa ldr r2, [r7, #44] ; 0x2c + 803473e: e841 2300 strex r3, r2, [r1] + 8034742: 627b str r3, [r7, #36] ; 0x24 return(result); - 8034714: 6a7b ldr r3, [r7, #36] ; 0x24 - 8034716: 2b00 cmp r3, #0 - 8034718: d1e5 bne.n 80346e6 + 8034744: 6a7b ldr r3, [r7, #36] ; 0x24 + 8034746: 2b00 cmp r3, #0 + 8034748: d1e5 bne.n 8034716 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 803471a: 687b ldr r3, [r7, #4] - 803471c: 6edb ldr r3, [r3, #108] ; 0x6c - 803471e: 2b01 cmp r3, #1 - 8034720: d118 bne.n 8034754 + 803474a: 687b ldr r3, [r7, #4] + 803474c: 6edb ldr r3, [r3, #108] ; 0x6c + 803474e: 2b01 cmp r3, #1 + 8034750: d118 bne.n 8034784 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8034722: 687b ldr r3, [r7, #4] - 8034724: 681b ldr r3, [r3, #0] - 8034726: 60fb str r3, [r7, #12] + 8034752: 687b ldr r3, [r7, #4] + 8034754: 681b ldr r3, [r3, #0] + 8034756: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034728: 68fb ldr r3, [r7, #12] - 803472a: e853 3f00 ldrex r3, [r3] - 803472e: 60bb str r3, [r7, #8] + 8034758: 68fb ldr r3, [r7, #12] + 803475a: e853 3f00 ldrex r3, [r3] + 803475e: 60bb str r3, [r7, #8] return(result); - 8034730: 68bb ldr r3, [r7, #8] - 8034732: f023 0310 bic.w r3, r3, #16 - 8034736: 647b str r3, [r7, #68] ; 0x44 - 8034738: 687b ldr r3, [r7, #4] - 803473a: 681b ldr r3, [r3, #0] - 803473c: 461a mov r2, r3 - 803473e: 6c7b ldr r3, [r7, #68] ; 0x44 - 8034740: 61bb str r3, [r7, #24] - 8034742: 617a str r2, [r7, #20] + 8034760: 68bb ldr r3, [r7, #8] + 8034762: f023 0310 bic.w r3, r3, #16 + 8034766: 647b str r3, [r7, #68] ; 0x44 + 8034768: 687b ldr r3, [r7, #4] + 803476a: 681b ldr r3, [r3, #0] + 803476c: 461a mov r2, r3 + 803476e: 6c7b ldr r3, [r7, #68] ; 0x44 + 8034770: 61bb str r3, [r7, #24] + 8034772: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034744: 6979 ldr r1, [r7, #20] - 8034746: 69ba ldr r2, [r7, #24] - 8034748: e841 2300 strex r3, r2, [r1] - 803474c: 613b str r3, [r7, #16] + 8034774: 6979 ldr r1, [r7, #20] + 8034776: 69ba ldr r2, [r7, #24] + 8034778: e841 2300 strex r3, r2, [r1] + 803477c: 613b str r3, [r7, #16] return(result); - 803474e: 693b ldr r3, [r7, #16] - 8034750: 2b00 cmp r3, #0 - 8034752: d1e6 bne.n 8034722 + 803477e: 693b ldr r3, [r7, #16] + 8034780: 2b00 cmp r3, #0 + 8034782: d1e6 bne.n 8034752 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8034754: 687b ldr r3, [r7, #4] - 8034756: 2220 movs r2, #32 - 8034758: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034784: 687b ldr r3, [r7, #4] + 8034786: 2220 movs r2, #32 + 8034788: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 803475c: 687b ldr r3, [r7, #4] - 803475e: 2200 movs r2, #0 - 8034760: 66da str r2, [r3, #108] ; 0x6c + 803478c: 687b ldr r3, [r7, #4] + 803478e: 2200 movs r2, #0 + 8034790: 66da str r2, [r3, #108] ; 0x6c /* Reset RxIsr function pointer */ huart->RxISR = NULL; - 8034762: 687b ldr r3, [r7, #4] - 8034764: 2200 movs r2, #0 - 8034766: 671a str r2, [r3, #112] ; 0x70 -} - 8034768: bf00 nop - 803476a: 3754 adds r7, #84 ; 0x54 - 803476c: 46bd mov sp, r7 - 803476e: f85d 7b04 ldr.w r7, [sp], #4 - 8034772: 4770 bx lr - 8034774: effffffe .word 0xeffffffe - -08034778 : + 8034792: 687b ldr r3, [r7, #4] + 8034794: 2200 movs r2, #0 + 8034796: 671a str r2, [r3, #112] ; 0x70 +} + 8034798: bf00 nop + 803479a: 3754 adds r7, #84 ; 0x54 + 803479c: 46bd mov sp, r7 + 803479e: f85d 7b04 ldr.w r7, [sp], #4 + 80347a2: 4770 bx lr + 80347a4: effffffe .word 0xeffffffe + +080347a8 : * @brief DMA UART transmit process complete callback. * @param hdma DMA handle. * @retval None */ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) { - 8034778: b580 push {r7, lr} - 803477a: b090 sub sp, #64 ; 0x40 - 803477c: af00 add r7, sp, #0 - 803477e: 6078 str r0, [r7, #4] + 80347a8: b580 push {r7, lr} + 80347aa: b090 sub sp, #64 ; 0x40 + 80347ac: af00 add r7, sp, #0 + 80347ae: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8034780: 687b ldr r3, [r7, #4] - 8034782: 6b9b ldr r3, [r3, #56] ; 0x38 - 8034784: 63fb str r3, [r7, #60] ; 0x3c + 80347b0: 687b ldr r3, [r7, #4] + 80347b2: 6b9b ldr r3, [r3, #56] ; 0x38 + 80347b4: 63fb str r3, [r7, #60] ; 0x3c /* DMA Normal mode */ if (hdma->Init.Mode != DMA_CIRCULAR) - 8034786: 687b ldr r3, [r7, #4] - 8034788: 69db ldr r3, [r3, #28] - 803478a: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803478e: d037 beq.n 8034800 + 80347b6: 687b ldr r3, [r7, #4] + 80347b8: 69db ldr r3, [r3, #28] + 80347ba: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80347be: d037 beq.n 8034830 { huart->TxXferCount = 0U; - 8034790: 6bfb ldr r3, [r7, #60] ; 0x3c - 8034792: 2200 movs r2, #0 - 8034794: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 80347c0: 6bfb ldr r3, [r7, #60] ; 0x3c + 80347c2: 2200 movs r2, #0 + 80347c4: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 /* Disable the DMA transfer for transmit request by resetting the DMAT bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - 8034798: 6bfb ldr r3, [r7, #60] ; 0x3c - 803479a: 681b ldr r3, [r3, #0] - 803479c: 3308 adds r3, #8 - 803479e: 627b str r3, [r7, #36] ; 0x24 + 80347c8: 6bfb ldr r3, [r7, #60] ; 0x3c + 80347ca: 681b ldr r3, [r3, #0] + 80347cc: 3308 adds r3, #8 + 80347ce: 627b str r3, [r7, #36] ; 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80347a0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80347a2: e853 3f00 ldrex r3, [r3] - 80347a6: 623b str r3, [r7, #32] + 80347d0: 6a7b ldr r3, [r7, #36] ; 0x24 + 80347d2: e853 3f00 ldrex r3, [r3] + 80347d6: 623b str r3, [r7, #32] return(result); - 80347a8: 6a3b ldr r3, [r7, #32] - 80347aa: f023 0380 bic.w r3, r3, #128 ; 0x80 - 80347ae: 63bb str r3, [r7, #56] ; 0x38 - 80347b0: 6bfb ldr r3, [r7, #60] ; 0x3c - 80347b2: 681b ldr r3, [r3, #0] - 80347b4: 3308 adds r3, #8 - 80347b6: 6bba ldr r2, [r7, #56] ; 0x38 - 80347b8: 633a str r2, [r7, #48] ; 0x30 - 80347ba: 62fb str r3, [r7, #44] ; 0x2c + 80347d8: 6a3b ldr r3, [r7, #32] + 80347da: f023 0380 bic.w r3, r3, #128 ; 0x80 + 80347de: 63bb str r3, [r7, #56] ; 0x38 + 80347e0: 6bfb ldr r3, [r7, #60] ; 0x3c + 80347e2: 681b ldr r3, [r3, #0] + 80347e4: 3308 adds r3, #8 + 80347e6: 6bba ldr r2, [r7, #56] ; 0x38 + 80347e8: 633a str r2, [r7, #48] ; 0x30 + 80347ea: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80347bc: 6af9 ldr r1, [r7, #44] ; 0x2c - 80347be: 6b3a ldr r2, [r7, #48] ; 0x30 - 80347c0: e841 2300 strex r3, r2, [r1] - 80347c4: 62bb str r3, [r7, #40] ; 0x28 + 80347ec: 6af9 ldr r1, [r7, #44] ; 0x2c + 80347ee: 6b3a ldr r2, [r7, #48] ; 0x30 + 80347f0: e841 2300 strex r3, r2, [r1] + 80347f4: 62bb str r3, [r7, #40] ; 0x28 return(result); - 80347c6: 6abb ldr r3, [r7, #40] ; 0x28 - 80347c8: 2b00 cmp r3, #0 - 80347ca: d1e5 bne.n 8034798 + 80347f6: 6abb ldr r3, [r7, #40] ; 0x28 + 80347f8: 2b00 cmp r3, #0 + 80347fa: d1e5 bne.n 80347c8 /* Enable the UART Transmit Complete Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 80347cc: 6bfb ldr r3, [r7, #60] ; 0x3c - 80347ce: 681b ldr r3, [r3, #0] - 80347d0: 613b str r3, [r7, #16] + 80347fc: 6bfb ldr r3, [r7, #60] ; 0x3c + 80347fe: 681b ldr r3, [r3, #0] + 8034800: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80347d2: 693b ldr r3, [r7, #16] - 80347d4: e853 3f00 ldrex r3, [r3] - 80347d8: 60fb str r3, [r7, #12] + 8034802: 693b ldr r3, [r7, #16] + 8034804: e853 3f00 ldrex r3, [r3] + 8034808: 60fb str r3, [r7, #12] return(result); - 80347da: 68fb ldr r3, [r7, #12] - 80347dc: f043 0340 orr.w r3, r3, #64 ; 0x40 - 80347e0: 637b str r3, [r7, #52] ; 0x34 - 80347e2: 6bfb ldr r3, [r7, #60] ; 0x3c - 80347e4: 681b ldr r3, [r3, #0] - 80347e6: 461a mov r2, r3 - 80347e8: 6b7b ldr r3, [r7, #52] ; 0x34 - 80347ea: 61fb str r3, [r7, #28] - 80347ec: 61ba str r2, [r7, #24] + 803480a: 68fb ldr r3, [r7, #12] + 803480c: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8034810: 637b str r3, [r7, #52] ; 0x34 + 8034812: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034814: 681b ldr r3, [r3, #0] + 8034816: 461a mov r2, r3 + 8034818: 6b7b ldr r3, [r7, #52] ; 0x34 + 803481a: 61fb str r3, [r7, #28] + 803481c: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80347ee: 69b9 ldr r1, [r7, #24] - 80347f0: 69fa ldr r2, [r7, #28] - 80347f2: e841 2300 strex r3, r2, [r1] - 80347f6: 617b str r3, [r7, #20] + 803481e: 69b9 ldr r1, [r7, #24] + 8034820: 69fa ldr r2, [r7, #28] + 8034822: e841 2300 strex r3, r2, [r1] + 8034826: 617b str r3, [r7, #20] return(result); - 80347f8: 697b ldr r3, [r7, #20] - 80347fa: 2b00 cmp r3, #0 - 80347fc: d1e6 bne.n 80347cc + 8034828: 697b ldr r3, [r7, #20] + 803482a: 2b00 cmp r3, #0 + 803482c: d1e6 bne.n 80347fc #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } } - 80347fe: e002 b.n 8034806 + 803482e: e002 b.n 8034836 HAL_UART_TxCpltCallback(huart); - 8034800: 6bf8 ldr r0, [r7, #60] ; 0x3c - 8034802: f7ed f9ef bl 8021be4 + 8034830: 6bf8 ldr r0, [r7, #60] ; 0x3c + 8034832: f7ed f9d7 bl 8021be4 } - 8034806: bf00 nop - 8034808: 3740 adds r7, #64 ; 0x40 - 803480a: 46bd mov sp, r7 - 803480c: bd80 pop {r7, pc} + 8034836: bf00 nop + 8034838: 3740 adds r7, #64 ; 0x40 + 803483a: 46bd mov sp, r7 + 803483c: bd80 pop {r7, pc} -0803480e : +0803483e : * @brief DMA UART transmit process half complete callback. * @param hdma DMA handle. * @retval None */ static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) { - 803480e: b580 push {r7, lr} - 8034810: b084 sub sp, #16 - 8034812: af00 add r7, sp, #0 - 8034814: 6078 str r0, [r7, #4] + 803483e: b580 push {r7, lr} + 8034840: b084 sub sp, #16 + 8034842: af00 add r7, sp, #0 + 8034844: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8034816: 687b ldr r3, [r7, #4] - 8034818: 6b9b ldr r3, [r3, #56] ; 0x38 - 803481a: 60fb str r3, [r7, #12] + 8034846: 687b ldr r3, [r7, #4] + 8034848: 6b9b ldr r3, [r3, #56] ; 0x38 + 803484a: 60fb str r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx Half complete callback*/ huart->TxHalfCpltCallback(huart); #else /*Call legacy weak Tx Half complete callback*/ HAL_UART_TxHalfCpltCallback(huart); - 803481c: 68f8 ldr r0, [r7, #12] - 803481e: f7fe fe9b bl 8033558 + 803484c: 68f8 ldr r0, [r7, #12] + 803484e: f7fe fe9b bl 8033588 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8034822: bf00 nop - 8034824: 3710 adds r7, #16 - 8034826: 46bd mov sp, r7 - 8034828: bd80 pop {r7, pc} + 8034852: bf00 nop + 8034854: 3710 adds r7, #16 + 8034856: 46bd mov sp, r7 + 8034858: bd80 pop {r7, pc} -0803482a : +0803485a : * @brief DMA UART communication error callback. * @param hdma DMA handle. * @retval None */ static void UART_DMAError(DMA_HandleTypeDef *hdma) { - 803482a: b580 push {r7, lr} - 803482c: b086 sub sp, #24 - 803482e: af00 add r7, sp, #0 - 8034830: 6078 str r0, [r7, #4] + 803485a: b580 push {r7, lr} + 803485c: b086 sub sp, #24 + 803485e: af00 add r7, sp, #0 + 8034860: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8034832: 687b ldr r3, [r7, #4] - 8034834: 6b9b ldr r3, [r3, #56] ; 0x38 - 8034836: 617b str r3, [r7, #20] + 8034862: 687b ldr r3, [r7, #4] + 8034864: 6b9b ldr r3, [r3, #56] ; 0x38 + 8034866: 617b str r3, [r7, #20] const HAL_UART_StateTypeDef gstate = huart->gState; - 8034838: 697b ldr r3, [r7, #20] - 803483a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 803483e: 613b str r3, [r7, #16] + 8034868: 697b ldr r3, [r7, #20] + 803486a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 803486e: 613b str r3, [r7, #16] const HAL_UART_StateTypeDef rxstate = huart->RxState; - 8034840: 697b ldr r3, [r7, #20] - 8034842: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034846: 60fb str r3, [r7, #12] + 8034870: 697b ldr r3, [r7, #20] + 8034872: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8034876: 60fb str r3, [r7, #12] /* Stop UART DMA Tx request if ongoing */ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && - 8034848: 697b ldr r3, [r7, #20] - 803484a: 681b ldr r3, [r3, #0] - 803484c: 689b ldr r3, [r3, #8] - 803484e: f003 0380 and.w r3, r3, #128 ; 0x80 - 8034852: 2b80 cmp r3, #128 ; 0x80 - 8034854: d109 bne.n 803486a - 8034856: 693b ldr r3, [r7, #16] - 8034858: 2b21 cmp r3, #33 ; 0x21 - 803485a: d106 bne.n 803486a + 8034878: 697b ldr r3, [r7, #20] + 803487a: 681b ldr r3, [r3, #0] + 803487c: 689b ldr r3, [r3, #8] + 803487e: f003 0380 and.w r3, r3, #128 ; 0x80 + 8034882: 2b80 cmp r3, #128 ; 0x80 + 8034884: d109 bne.n 803489a + 8034886: 693b ldr r3, [r7, #16] + 8034888: 2b21 cmp r3, #33 ; 0x21 + 803488a: d106 bne.n 803489a (gstate == HAL_UART_STATE_BUSY_TX)) { huart->TxXferCount = 0U; - 803485c: 697b ldr r3, [r7, #20] - 803485e: 2200 movs r2, #0 - 8034860: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 803488c: 697b ldr r3, [r7, #20] + 803488e: 2200 movs r2, #0 + 8034890: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 UART_EndTxTransfer(huart); - 8034864: 6978 ldr r0, [r7, #20] - 8034866: f7ff fedf bl 8034628 + 8034894: 6978 ldr r0, [r7, #20] + 8034896: f7ff fedf bl 8034658 } /* Stop UART DMA Rx request if ongoing */ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && - 803486a: 697b ldr r3, [r7, #20] - 803486c: 681b ldr r3, [r3, #0] - 803486e: 689b ldr r3, [r3, #8] - 8034870: f003 0340 and.w r3, r3, #64 ; 0x40 - 8034874: 2b40 cmp r3, #64 ; 0x40 - 8034876: d109 bne.n 803488c - 8034878: 68fb ldr r3, [r7, #12] - 803487a: 2b22 cmp r3, #34 ; 0x22 - 803487c: d106 bne.n 803488c + 803489a: 697b ldr r3, [r7, #20] + 803489c: 681b ldr r3, [r3, #0] + 803489e: 689b ldr r3, [r3, #8] + 80348a0: f003 0340 and.w r3, r3, #64 ; 0x40 + 80348a4: 2b40 cmp r3, #64 ; 0x40 + 80348a6: d109 bne.n 80348bc + 80348a8: 68fb ldr r3, [r7, #12] + 80348aa: 2b22 cmp r3, #34 ; 0x22 + 80348ac: d106 bne.n 80348bc (rxstate == HAL_UART_STATE_BUSY_RX)) { huart->RxXferCount = 0U; - 803487e: 697b ldr r3, [r7, #20] - 8034880: 2200 movs r2, #0 - 8034882: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 80348ae: 697b ldr r3, [r7, #20] + 80348b0: 2200 movs r2, #0 + 80348b2: f8a3 205e strh.w r2, [r3, #94] ; 0x5e UART_EndRxTransfer(huart); - 8034886: 6978 ldr r0, [r7, #20] - 8034888: f7ff ff10 bl 80346ac + 80348b6: 6978 ldr r0, [r7, #20] + 80348b8: f7ff ff10 bl 80346dc } huart->ErrorCode |= HAL_UART_ERROR_DMA; - 803488c: 697b ldr r3, [r7, #20] - 803488e: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034892: f043 0210 orr.w r2, r3, #16 - 8034896: 697b ldr r3, [r7, #20] - 8034898: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 80348bc: 697b ldr r3, [r7, #20] + 80348be: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 80348c2: f043 0210 orr.w r2, r3, #16 + 80348c6: 697b ldr r3, [r7, #20] + 80348c8: f8c3 208c str.w r2, [r3, #140] ; 0x8c #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 803489c: 6978 ldr r0, [r7, #20] - 803489e: f7fe fe65 bl 803356c + 80348cc: 6978 ldr r0, [r7, #20] + 80348ce: f7fe fe65 bl 803359c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 80348a2: bf00 nop - 80348a4: 3718 adds r7, #24 - 80348a6: 46bd mov sp, r7 - 80348a8: bd80 pop {r7, pc} + 80348d2: bf00 nop + 80348d4: 3718 adds r7, #24 + 80348d6: 46bd mov sp, r7 + 80348d8: bd80 pop {r7, pc} -080348aa : +080348da : * (To be called at end of DMA Abort procedure following error occurrence). * @param hdma DMA handle. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 80348aa: b580 push {r7, lr} - 80348ac: b084 sub sp, #16 - 80348ae: af00 add r7, sp, #0 - 80348b0: 6078 str r0, [r7, #4] + 80348da: b580 push {r7, lr} + 80348dc: b084 sub sp, #16 + 80348de: af00 add r7, sp, #0 + 80348e0: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 80348b2: 687b ldr r3, [r7, #4] - 80348b4: 6b9b ldr r3, [r3, #56] ; 0x38 - 80348b6: 60fb str r3, [r7, #12] + 80348e2: 687b ldr r3, [r7, #4] + 80348e4: 6b9b ldr r3, [r3, #56] ; 0x38 + 80348e6: 60fb str r3, [r7, #12] huart->RxXferCount = 0U; - 80348b8: 68fb ldr r3, [r7, #12] - 80348ba: 2200 movs r2, #0 - 80348bc: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 80348e8: 68fb ldr r3, [r7, #12] + 80348ea: 2200 movs r2, #0 + 80348ec: f8a3 205e strh.w r2, [r3, #94] ; 0x5e huart->TxXferCount = 0U; - 80348c0: 68fb ldr r3, [r7, #12] - 80348c2: 2200 movs r2, #0 - 80348c4: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 80348f0: 68fb ldr r3, [r7, #12] + 80348f2: 2200 movs r2, #0 + 80348f4: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80348c8: 68f8 ldr r0, [r7, #12] - 80348ca: f7fe fe4f bl 803356c + 80348f8: 68f8 ldr r0, [r7, #12] + 80348fa: f7fe fe4f bl 803359c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 80348ce: bf00 nop - 80348d0: 3710 adds r7, #16 - 80348d2: 46bd mov sp, r7 - 80348d4: bd80 pop {r7, pc} + 80348fe: bf00 nop + 8034900: 3710 adds r7, #16 + 8034902: 46bd mov sp, r7 + 8034904: bd80 pop {r7, pc} -080348d6 : +08034906 : * @param huart pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 80348d6: b580 push {r7, lr} - 80348d8: b088 sub sp, #32 - 80348da: af00 add r7, sp, #0 - 80348dc: 6078 str r0, [r7, #4] + 8034906: b580 push {r7, lr} + 8034908: b088 sub sp, #32 + 803490a: af00 add r7, sp, #0 + 803490c: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 80348de: 687b ldr r3, [r7, #4] - 80348e0: 681b ldr r3, [r3, #0] - 80348e2: 60fb str r3, [r7, #12] + 803490e: 687b ldr r3, [r7, #4] + 8034910: 681b ldr r3, [r3, #0] + 8034912: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80348e4: 68fb ldr r3, [r7, #12] - 80348e6: e853 3f00 ldrex r3, [r3] - 80348ea: 60bb str r3, [r7, #8] + 8034914: 68fb ldr r3, [r7, #12] + 8034916: e853 3f00 ldrex r3, [r3] + 803491a: 60bb str r3, [r7, #8] return(result); - 80348ec: 68bb ldr r3, [r7, #8] - 80348ee: f023 0340 bic.w r3, r3, #64 ; 0x40 - 80348f2: 61fb str r3, [r7, #28] - 80348f4: 687b ldr r3, [r7, #4] - 80348f6: 681b ldr r3, [r3, #0] - 80348f8: 461a mov r2, r3 - 80348fa: 69fb ldr r3, [r7, #28] - 80348fc: 61bb str r3, [r7, #24] - 80348fe: 617a str r2, [r7, #20] + 803491c: 68bb ldr r3, [r7, #8] + 803491e: f023 0340 bic.w r3, r3, #64 ; 0x40 + 8034922: 61fb str r3, [r7, #28] + 8034924: 687b ldr r3, [r7, #4] + 8034926: 681b ldr r3, [r3, #0] + 8034928: 461a mov r2, r3 + 803492a: 69fb ldr r3, [r7, #28] + 803492c: 61bb str r3, [r7, #24] + 803492e: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034900: 6979 ldr r1, [r7, #20] - 8034902: 69ba ldr r2, [r7, #24] - 8034904: e841 2300 strex r3, r2, [r1] - 8034908: 613b str r3, [r7, #16] + 8034930: 6979 ldr r1, [r7, #20] + 8034932: 69ba ldr r2, [r7, #24] + 8034934: e841 2300 strex r3, r2, [r1] + 8034938: 613b str r3, [r7, #16] return(result); - 803490a: 693b ldr r3, [r7, #16] - 803490c: 2b00 cmp r3, #0 - 803490e: d1e6 bne.n 80348de + 803493a: 693b ldr r3, [r7, #16] + 803493c: 2b00 cmp r3, #0 + 803493e: d1e6 bne.n 803490e /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8034910: 687b ldr r3, [r7, #4] - 8034912: 2220 movs r2, #32 - 8034914: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8034940: 687b ldr r3, [r7, #4] + 8034942: 2220 movs r2, #32 + 8034944: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Cleat TxISR function pointer */ huart->TxISR = NULL; - 8034918: 687b ldr r3, [r7, #4] - 803491a: 2200 movs r2, #0 - 803491c: 675a str r2, [r3, #116] ; 0x74 + 8034948: 687b ldr r3, [r7, #4] + 803494a: 2200 movs r2, #0 + 803494c: 675a str r2, [r3, #116] ; 0x74 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 803491e: 6878 ldr r0, [r7, #4] - 8034920: f7ed f960 bl 8021be4 + 803494e: 6878 ldr r0, [r7, #4] + 8034950: f7ed f948 bl 8021be4 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8034924: bf00 nop - 8034926: 3720 adds r7, #32 - 8034928: 46bd mov sp, r7 - 803492a: bd80 pop {r7, pc} + 8034954: bf00 nop + 8034956: 3720 adds r7, #32 + 8034958: 46bd mov sp, r7 + 803495a: bd80 pop {r7, pc} -0803492c : +0803495c : * @brief RX interrupt handler for 7 or 8 bits data word length . * @param huart UART handle. * @retval None */ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) { - 803492c: b580 push {r7, lr} - 803492e: b096 sub sp, #88 ; 0x58 - 8034930: af00 add r7, sp, #0 - 8034932: 6078 str r0, [r7, #4] + 803495c: b580 push {r7, lr} + 803495e: b096 sub sp, #88 ; 0x58 + 8034960: af00 add r7, sp, #0 + 8034962: 6078 str r0, [r7, #4] uint16_t uhMask = huart->Mask; - 8034934: 687b ldr r3, [r7, #4] - 8034936: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803493a: f8a7 3056 strh.w r3, [r7, #86] ; 0x56 + 8034964: 687b ldr r3, [r7, #4] + 8034966: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803496a: f8a7 3056 strh.w r3, [r7, #86] ; 0x56 uint16_t uhdata; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 803493e: 687b ldr r3, [r7, #4] - 8034940: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034944: 2b22 cmp r3, #34 ; 0x22 - 8034946: f040 8095 bne.w 8034a74 + 803496e: 687b ldr r3, [r7, #4] + 8034970: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8034974: 2b22 cmp r3, #34 ; 0x22 + 8034976: f040 8095 bne.w 8034aa4 { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 803494a: 687b ldr r3, [r7, #4] - 803494c: 681b ldr r3, [r3, #0] - 803494e: 6a5b ldr r3, [r3, #36] ; 0x24 - 8034950: f8a7 3054 strh.w r3, [r7, #84] ; 0x54 + 803497a: 687b ldr r3, [r7, #4] + 803497c: 681b ldr r3, [r3, #0] + 803497e: 6a5b ldr r3, [r3, #36] ; 0x24 + 8034980: f8a7 3054 strh.w r3, [r7, #84] ; 0x54 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); - 8034954: f8b7 3054 ldrh.w r3, [r7, #84] ; 0x54 - 8034958: b2d9 uxtb r1, r3 - 803495a: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56 - 803495e: b2da uxtb r2, r3 - 8034960: 687b ldr r3, [r7, #4] - 8034962: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034964: 400a ands r2, r1 - 8034966: b2d2 uxtb r2, r2 - 8034968: 701a strb r2, [r3, #0] + 8034984: f8b7 3054 ldrh.w r3, [r7, #84] ; 0x54 + 8034988: b2d9 uxtb r1, r3 + 803498a: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56 + 803498e: b2da uxtb r2, r3 + 8034990: 687b ldr r3, [r7, #4] + 8034992: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034994: 400a ands r2, r1 + 8034996: b2d2 uxtb r2, r2 + 8034998: 701a strb r2, [r3, #0] huart->pRxBuffPtr++; - 803496a: 687b ldr r3, [r7, #4] - 803496c: 6d9b ldr r3, [r3, #88] ; 0x58 - 803496e: 1c5a adds r2, r3, #1 - 8034970: 687b ldr r3, [r7, #4] - 8034972: 659a str r2, [r3, #88] ; 0x58 + 803499a: 687b ldr r3, [r7, #4] + 803499c: 6d9b ldr r3, [r3, #88] ; 0x58 + 803499e: 1c5a adds r2, r3, #1 + 80349a0: 687b ldr r3, [r7, #4] + 80349a2: 659a str r2, [r3, #88] ; 0x58 huart->RxXferCount--; - 8034974: 687b ldr r3, [r7, #4] - 8034976: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 803497a: b29b uxth r3, r3 - 803497c: 3b01 subs r3, #1 - 803497e: b29a uxth r2, r3 - 8034980: 687b ldr r3, [r7, #4] - 8034982: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 80349a4: 687b ldr r3, [r7, #4] + 80349a6: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 80349aa: b29b uxth r3, r3 + 80349ac: 3b01 subs r3, #1 + 80349ae: b29a uxth r2, r3 + 80349b0: 687b ldr r3, [r7, #4] + 80349b2: f8a3 205e strh.w r2, [r3, #94] ; 0x5e if (huart->RxXferCount == 0U) - 8034986: 687b ldr r3, [r7, #4] - 8034988: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 803498c: b29b uxth r3, r3 - 803498e: 2b00 cmp r3, #0 - 8034990: d178 bne.n 8034a84 + 80349b6: 687b ldr r3, [r7, #4] + 80349b8: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 80349bc: b29b uxth r3, r3 + 80349be: 2b00 cmp r3, #0 + 80349c0: d178 bne.n 8034ab4 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 8034992: 687b ldr r3, [r7, #4] - 8034994: 681b ldr r3, [r3, #0] - 8034996: 63bb str r3, [r7, #56] ; 0x38 + 80349c2: 687b ldr r3, [r7, #4] + 80349c4: 681b ldr r3, [r3, #0] + 80349c6: 63bb str r3, [r7, #56] ; 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034998: 6bbb ldr r3, [r7, #56] ; 0x38 - 803499a: e853 3f00 ldrex r3, [r3] - 803499e: 637b str r3, [r7, #52] ; 0x34 + 80349c8: 6bbb ldr r3, [r7, #56] ; 0x38 + 80349ca: e853 3f00 ldrex r3, [r3] + 80349ce: 637b str r3, [r7, #52] ; 0x34 return(result); - 80349a0: 6b7b ldr r3, [r7, #52] ; 0x34 - 80349a2: f423 7390 bic.w r3, r3, #288 ; 0x120 - 80349a6: 653b str r3, [r7, #80] ; 0x50 - 80349a8: 687b ldr r3, [r7, #4] - 80349aa: 681b ldr r3, [r3, #0] - 80349ac: 461a mov r2, r3 - 80349ae: 6d3b ldr r3, [r7, #80] ; 0x50 - 80349b0: 647b str r3, [r7, #68] ; 0x44 - 80349b2: 643a str r2, [r7, #64] ; 0x40 + 80349d0: 6b7b ldr r3, [r7, #52] ; 0x34 + 80349d2: f423 7390 bic.w r3, r3, #288 ; 0x120 + 80349d6: 653b str r3, [r7, #80] ; 0x50 + 80349d8: 687b ldr r3, [r7, #4] + 80349da: 681b ldr r3, [r3, #0] + 80349dc: 461a mov r2, r3 + 80349de: 6d3b ldr r3, [r7, #80] ; 0x50 + 80349e0: 647b str r3, [r7, #68] ; 0x44 + 80349e2: 643a str r2, [r7, #64] ; 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80349b4: 6c39 ldr r1, [r7, #64] ; 0x40 - 80349b6: 6c7a ldr r2, [r7, #68] ; 0x44 - 80349b8: e841 2300 strex r3, r2, [r1] - 80349bc: 63fb str r3, [r7, #60] ; 0x3c + 80349e4: 6c39 ldr r1, [r7, #64] ; 0x40 + 80349e6: 6c7a ldr r2, [r7, #68] ; 0x44 + 80349e8: e841 2300 strex r3, r2, [r1] + 80349ec: 63fb str r3, [r7, #60] ; 0x3c return(result); - 80349be: 6bfb ldr r3, [r7, #60] ; 0x3c - 80349c0: 2b00 cmp r3, #0 - 80349c2: d1e6 bne.n 8034992 + 80349ee: 6bfb ldr r3, [r7, #60] ; 0x3c + 80349f0: 2b00 cmp r3, #0 + 80349f2: d1e6 bne.n 80349c2 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80349c4: 687b ldr r3, [r7, #4] - 80349c6: 681b ldr r3, [r3, #0] - 80349c8: 3308 adds r3, #8 - 80349ca: 627b str r3, [r7, #36] ; 0x24 + 80349f4: 687b ldr r3, [r7, #4] + 80349f6: 681b ldr r3, [r3, #0] + 80349f8: 3308 adds r3, #8 + 80349fa: 627b str r3, [r7, #36] ; 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80349cc: 6a7b ldr r3, [r7, #36] ; 0x24 - 80349ce: e853 3f00 ldrex r3, [r3] - 80349d2: 623b str r3, [r7, #32] + 80349fc: 6a7b ldr r3, [r7, #36] ; 0x24 + 80349fe: e853 3f00 ldrex r3, [r3] + 8034a02: 623b str r3, [r7, #32] return(result); - 80349d4: 6a3b ldr r3, [r7, #32] - 80349d6: f023 0301 bic.w r3, r3, #1 - 80349da: 64fb str r3, [r7, #76] ; 0x4c - 80349dc: 687b ldr r3, [r7, #4] - 80349de: 681b ldr r3, [r3, #0] - 80349e0: 3308 adds r3, #8 - 80349e2: 6cfa ldr r2, [r7, #76] ; 0x4c - 80349e4: 633a str r2, [r7, #48] ; 0x30 - 80349e6: 62fb str r3, [r7, #44] ; 0x2c + 8034a04: 6a3b ldr r3, [r7, #32] + 8034a06: f023 0301 bic.w r3, r3, #1 + 8034a0a: 64fb str r3, [r7, #76] ; 0x4c + 8034a0c: 687b ldr r3, [r7, #4] + 8034a0e: 681b ldr r3, [r3, #0] + 8034a10: 3308 adds r3, #8 + 8034a12: 6cfa ldr r2, [r7, #76] ; 0x4c + 8034a14: 633a str r2, [r7, #48] ; 0x30 + 8034a16: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80349e8: 6af9 ldr r1, [r7, #44] ; 0x2c - 80349ea: 6b3a ldr r2, [r7, #48] ; 0x30 - 80349ec: e841 2300 strex r3, r2, [r1] - 80349f0: 62bb str r3, [r7, #40] ; 0x28 + 8034a18: 6af9 ldr r1, [r7, #44] ; 0x2c + 8034a1a: 6b3a ldr r2, [r7, #48] ; 0x30 + 8034a1c: e841 2300 strex r3, r2, [r1] + 8034a20: 62bb str r3, [r7, #40] ; 0x28 return(result); - 80349f2: 6abb ldr r3, [r7, #40] ; 0x28 - 80349f4: 2b00 cmp r3, #0 - 80349f6: d1e5 bne.n 80349c4 + 8034a22: 6abb ldr r3, [r7, #40] ; 0x28 + 8034a24: 2b00 cmp r3, #0 + 8034a26: d1e5 bne.n 80349f4 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 80349f8: 687b ldr r3, [r7, #4] - 80349fa: 2220 movs r2, #32 - 80349fc: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034a28: 687b ldr r3, [r7, #4] + 8034a2a: 2220 movs r2, #32 + 8034a2c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8034a00: 687b ldr r3, [r7, #4] - 8034a02: 2200 movs r2, #0 - 8034a04: 671a str r2, [r3, #112] ; 0x70 + 8034a30: 687b ldr r3, [r7, #4] + 8034a32: 2200 movs r2, #0 + 8034a34: 671a str r2, [r3, #112] ; 0x70 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8034a06: 687b ldr r3, [r7, #4] - 8034a08: 6edb ldr r3, [r3, #108] ; 0x6c - 8034a0a: 2b01 cmp r3, #1 - 8034a0c: d12e bne.n 8034a6c + 8034a36: 687b ldr r3, [r7, #4] + 8034a38: 6edb ldr r3, [r3, #108] ; 0x6c + 8034a3a: 2b01 cmp r3, #1 + 8034a3c: d12e bne.n 8034a9c { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8034a0e: 687b ldr r3, [r7, #4] - 8034a10: 2200 movs r2, #0 - 8034a12: 66da str r2, [r3, #108] ; 0x6c + 8034a3e: 687b ldr r3, [r7, #4] + 8034a40: 2200 movs r2, #0 + 8034a42: 66da str r2, [r3, #108] ; 0x6c /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8034a14: 687b ldr r3, [r7, #4] - 8034a16: 681b ldr r3, [r3, #0] - 8034a18: 613b str r3, [r7, #16] + 8034a44: 687b ldr r3, [r7, #4] + 8034a46: 681b ldr r3, [r3, #0] + 8034a48: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034a1a: 693b ldr r3, [r7, #16] - 8034a1c: e853 3f00 ldrex r3, [r3] - 8034a20: 60fb str r3, [r7, #12] + 8034a4a: 693b ldr r3, [r7, #16] + 8034a4c: e853 3f00 ldrex r3, [r3] + 8034a50: 60fb str r3, [r7, #12] return(result); - 8034a22: 68fb ldr r3, [r7, #12] - 8034a24: f023 0310 bic.w r3, r3, #16 - 8034a28: 64bb str r3, [r7, #72] ; 0x48 - 8034a2a: 687b ldr r3, [r7, #4] - 8034a2c: 681b ldr r3, [r3, #0] - 8034a2e: 461a mov r2, r3 - 8034a30: 6cbb ldr r3, [r7, #72] ; 0x48 - 8034a32: 61fb str r3, [r7, #28] - 8034a34: 61ba str r2, [r7, #24] + 8034a52: 68fb ldr r3, [r7, #12] + 8034a54: f023 0310 bic.w r3, r3, #16 + 8034a58: 64bb str r3, [r7, #72] ; 0x48 + 8034a5a: 687b ldr r3, [r7, #4] + 8034a5c: 681b ldr r3, [r3, #0] + 8034a5e: 461a mov r2, r3 + 8034a60: 6cbb ldr r3, [r7, #72] ; 0x48 + 8034a62: 61fb str r3, [r7, #28] + 8034a64: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034a36: 69b9 ldr r1, [r7, #24] - 8034a38: 69fa ldr r2, [r7, #28] - 8034a3a: e841 2300 strex r3, r2, [r1] - 8034a3e: 617b str r3, [r7, #20] + 8034a66: 69b9 ldr r1, [r7, #24] + 8034a68: 69fa ldr r2, [r7, #28] + 8034a6a: e841 2300 strex r3, r2, [r1] + 8034a6e: 617b str r3, [r7, #20] return(result); - 8034a40: 697b ldr r3, [r7, #20] - 8034a42: 2b00 cmp r3, #0 - 8034a44: d1e6 bne.n 8034a14 + 8034a70: 697b ldr r3, [r7, #20] + 8034a72: 2b00 cmp r3, #0 + 8034a74: d1e6 bne.n 8034a44 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) - 8034a46: 687b ldr r3, [r7, #4] - 8034a48: 681b ldr r3, [r3, #0] - 8034a4a: 69db ldr r3, [r3, #28] - 8034a4c: f003 0310 and.w r3, r3, #16 - 8034a50: 2b10 cmp r3, #16 - 8034a52: d103 bne.n 8034a5c + 8034a76: 687b ldr r3, [r7, #4] + 8034a78: 681b ldr r3, [r3, #0] + 8034a7a: 69db ldr r3, [r3, #28] + 8034a7c: f003 0310 and.w r3, r3, #16 + 8034a80: 2b10 cmp r3, #16 + 8034a82: d103 bne.n 8034a8c { /* Clear IDLE Flag */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8034a54: 687b ldr r3, [r7, #4] - 8034a56: 681b ldr r3, [r3, #0] - 8034a58: 2210 movs r2, #16 - 8034a5a: 621a str r2, [r3, #32] + 8034a84: 687b ldr r3, [r7, #4] + 8034a86: 681b ldr r3, [r3, #0] + 8034a88: 2210 movs r2, #16 + 8034a8a: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8034a5c: 687b ldr r3, [r7, #4] - 8034a5e: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 8034a62: 4619 mov r1, r3 - 8034a64: 6878 ldr r0, [r7, #4] - 8034a66: f7fe fd8b bl 8033580 + 8034a8c: 687b ldr r3, [r7, #4] + 8034a8e: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 8034a92: 4619 mov r1, r3 + 8034a94: 6878 ldr r0, [r7, #4] + 8034a96: f7fe fd8b bl 80335b0 else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 8034a6a: e00b b.n 8034a84 + 8034a9a: e00b b.n 8034ab4 HAL_UART_RxCpltCallback(huart); - 8034a6c: 6878 ldr r0, [r7, #4] - 8034a6e: f7ed f83f bl 8021af0 + 8034a9c: 6878 ldr r0, [r7, #4] + 8034a9e: f7ed f827 bl 8021af0 } - 8034a72: e007 b.n 8034a84 + 8034aa2: e007 b.n 8034ab4 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 8034a74: 687b ldr r3, [r7, #4] - 8034a76: 681b ldr r3, [r3, #0] - 8034a78: 699a ldr r2, [r3, #24] - 8034a7a: 687b ldr r3, [r7, #4] - 8034a7c: 681b ldr r3, [r3, #0] - 8034a7e: f042 0208 orr.w r2, r2, #8 - 8034a82: 619a str r2, [r3, #24] -} - 8034a84: bf00 nop - 8034a86: 3758 adds r7, #88 ; 0x58 - 8034a88: 46bd mov sp, r7 - 8034a8a: bd80 pop {r7, pc} - -08034a8c : + 8034aa4: 687b ldr r3, [r7, #4] + 8034aa6: 681b ldr r3, [r3, #0] + 8034aa8: 699a ldr r2, [r3, #24] + 8034aaa: 687b ldr r3, [r7, #4] + 8034aac: 681b ldr r3, [r3, #0] + 8034aae: f042 0208 orr.w r2, r2, #8 + 8034ab2: 619a str r2, [r3, #24] +} + 8034ab4: bf00 nop + 8034ab6: 3758 adds r7, #88 ; 0x58 + 8034ab8: 46bd mov sp, r7 + 8034aba: bd80 pop {r7, pc} + +08034abc : * interruptions have been enabled by HAL_UART_Receive_IT() * @param huart UART handle. * @retval None */ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) { - 8034a8c: b580 push {r7, lr} - 8034a8e: b096 sub sp, #88 ; 0x58 - 8034a90: af00 add r7, sp, #0 - 8034a92: 6078 str r0, [r7, #4] + 8034abc: b580 push {r7, lr} + 8034abe: b096 sub sp, #88 ; 0x58 + 8034ac0: af00 add r7, sp, #0 + 8034ac2: 6078 str r0, [r7, #4] uint16_t *tmp; uint16_t uhMask = huart->Mask; - 8034a94: 687b ldr r3, [r7, #4] - 8034a96: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 8034a9a: f8a7 3056 strh.w r3, [r7, #86] ; 0x56 + 8034ac4: 687b ldr r3, [r7, #4] + 8034ac6: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 8034aca: f8a7 3056 strh.w r3, [r7, #86] ; 0x56 uint16_t uhdata; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8034a9e: 687b ldr r3, [r7, #4] - 8034aa0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034aa4: 2b22 cmp r3, #34 ; 0x22 - 8034aa6: f040 8095 bne.w 8034bd4 + 8034ace: 687b ldr r3, [r7, #4] + 8034ad0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8034ad4: 2b22 cmp r3, #34 ; 0x22 + 8034ad6: f040 8095 bne.w 8034c04 { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 8034aaa: 687b ldr r3, [r7, #4] - 8034aac: 681b ldr r3, [r3, #0] - 8034aae: 6a5b ldr r3, [r3, #36] ; 0x24 - 8034ab0: f8a7 3054 strh.w r3, [r7, #84] ; 0x54 + 8034ada: 687b ldr r3, [r7, #4] + 8034adc: 681b ldr r3, [r3, #0] + 8034ade: 6a5b ldr r3, [r3, #36] ; 0x24 + 8034ae0: f8a7 3054 strh.w r3, [r7, #84] ; 0x54 tmp = (uint16_t *) huart->pRxBuffPtr ; - 8034ab4: 687b ldr r3, [r7, #4] - 8034ab6: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034ab8: 653b str r3, [r7, #80] ; 0x50 + 8034ae4: 687b ldr r3, [r7, #4] + 8034ae6: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034ae8: 653b str r3, [r7, #80] ; 0x50 *tmp = (uint16_t)(uhdata & uhMask); - 8034aba: f8b7 2054 ldrh.w r2, [r7, #84] ; 0x54 - 8034abe: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56 - 8034ac2: 4013 ands r3, r2 - 8034ac4: b29a uxth r2, r3 - 8034ac6: 6d3b ldr r3, [r7, #80] ; 0x50 - 8034ac8: 801a strh r2, [r3, #0] + 8034aea: f8b7 2054 ldrh.w r2, [r7, #84] ; 0x54 + 8034aee: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56 + 8034af2: 4013 ands r3, r2 + 8034af4: b29a uxth r2, r3 + 8034af6: 6d3b ldr r3, [r7, #80] ; 0x50 + 8034af8: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 8034aca: 687b ldr r3, [r7, #4] - 8034acc: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034ace: 1c9a adds r2, r3, #2 - 8034ad0: 687b ldr r3, [r7, #4] - 8034ad2: 659a str r2, [r3, #88] ; 0x58 + 8034afa: 687b ldr r3, [r7, #4] + 8034afc: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034afe: 1c9a adds r2, r3, #2 + 8034b00: 687b ldr r3, [r7, #4] + 8034b02: 659a str r2, [r3, #88] ; 0x58 huart->RxXferCount--; - 8034ad4: 687b ldr r3, [r7, #4] - 8034ad6: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034ada: b29b uxth r3, r3 - 8034adc: 3b01 subs r3, #1 - 8034ade: b29a uxth r2, r3 - 8034ae0: 687b ldr r3, [r7, #4] - 8034ae2: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 8034b04: 687b ldr r3, [r7, #4] + 8034b06: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034b0a: b29b uxth r3, r3 + 8034b0c: 3b01 subs r3, #1 + 8034b0e: b29a uxth r2, r3 + 8034b10: 687b ldr r3, [r7, #4] + 8034b12: f8a3 205e strh.w r2, [r3, #94] ; 0x5e if (huart->RxXferCount == 0U) - 8034ae6: 687b ldr r3, [r7, #4] - 8034ae8: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034aec: b29b uxth r3, r3 - 8034aee: 2b00 cmp r3, #0 - 8034af0: d178 bne.n 8034be4 + 8034b16: 687b ldr r3, [r7, #4] + 8034b18: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034b1c: b29b uxth r3, r3 + 8034b1e: 2b00 cmp r3, #0 + 8034b20: d178 bne.n 8034c14 { /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 8034af2: 687b ldr r3, [r7, #4] - 8034af4: 681b ldr r3, [r3, #0] - 8034af6: 637b str r3, [r7, #52] ; 0x34 + 8034b22: 687b ldr r3, [r7, #4] + 8034b24: 681b ldr r3, [r3, #0] + 8034b26: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034af8: 6b7b ldr r3, [r7, #52] ; 0x34 - 8034afa: e853 3f00 ldrex r3, [r3] - 8034afe: 633b str r3, [r7, #48] ; 0x30 + 8034b28: 6b7b ldr r3, [r7, #52] ; 0x34 + 8034b2a: e853 3f00 ldrex r3, [r3] + 8034b2e: 633b str r3, [r7, #48] ; 0x30 return(result); - 8034b00: 6b3b ldr r3, [r7, #48] ; 0x30 - 8034b02: f423 7390 bic.w r3, r3, #288 ; 0x120 - 8034b06: 64fb str r3, [r7, #76] ; 0x4c - 8034b08: 687b ldr r3, [r7, #4] - 8034b0a: 681b ldr r3, [r3, #0] - 8034b0c: 461a mov r2, r3 - 8034b0e: 6cfb ldr r3, [r7, #76] ; 0x4c - 8034b10: 643b str r3, [r7, #64] ; 0x40 - 8034b12: 63fa str r2, [r7, #60] ; 0x3c + 8034b30: 6b3b ldr r3, [r7, #48] ; 0x30 + 8034b32: f423 7390 bic.w r3, r3, #288 ; 0x120 + 8034b36: 64fb str r3, [r7, #76] ; 0x4c + 8034b38: 687b ldr r3, [r7, #4] + 8034b3a: 681b ldr r3, [r3, #0] + 8034b3c: 461a mov r2, r3 + 8034b3e: 6cfb ldr r3, [r7, #76] ; 0x4c + 8034b40: 643b str r3, [r7, #64] ; 0x40 + 8034b42: 63fa str r2, [r7, #60] ; 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034b14: 6bf9 ldr r1, [r7, #60] ; 0x3c - 8034b16: 6c3a ldr r2, [r7, #64] ; 0x40 - 8034b18: e841 2300 strex r3, r2, [r1] - 8034b1c: 63bb str r3, [r7, #56] ; 0x38 + 8034b44: 6bf9 ldr r1, [r7, #60] ; 0x3c + 8034b46: 6c3a ldr r2, [r7, #64] ; 0x40 + 8034b48: e841 2300 strex r3, r2, [r1] + 8034b4c: 63bb str r3, [r7, #56] ; 0x38 return(result); - 8034b1e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8034b20: 2b00 cmp r3, #0 - 8034b22: d1e6 bne.n 8034af2 + 8034b4e: 6bbb ldr r3, [r7, #56] ; 0x38 + 8034b50: 2b00 cmp r3, #0 + 8034b52: d1e6 bne.n 8034b22 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8034b24: 687b ldr r3, [r7, #4] - 8034b26: 681b ldr r3, [r3, #0] - 8034b28: 3308 adds r3, #8 - 8034b2a: 623b str r3, [r7, #32] + 8034b54: 687b ldr r3, [r7, #4] + 8034b56: 681b ldr r3, [r3, #0] + 8034b58: 3308 adds r3, #8 + 8034b5a: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034b2c: 6a3b ldr r3, [r7, #32] - 8034b2e: e853 3f00 ldrex r3, [r3] - 8034b32: 61fb str r3, [r7, #28] + 8034b5c: 6a3b ldr r3, [r7, #32] + 8034b5e: e853 3f00 ldrex r3, [r3] + 8034b62: 61fb str r3, [r7, #28] return(result); - 8034b34: 69fb ldr r3, [r7, #28] - 8034b36: f023 0301 bic.w r3, r3, #1 - 8034b3a: 64bb str r3, [r7, #72] ; 0x48 - 8034b3c: 687b ldr r3, [r7, #4] - 8034b3e: 681b ldr r3, [r3, #0] - 8034b40: 3308 adds r3, #8 - 8034b42: 6cba ldr r2, [r7, #72] ; 0x48 - 8034b44: 62fa str r2, [r7, #44] ; 0x2c - 8034b46: 62bb str r3, [r7, #40] ; 0x28 + 8034b64: 69fb ldr r3, [r7, #28] + 8034b66: f023 0301 bic.w r3, r3, #1 + 8034b6a: 64bb str r3, [r7, #72] ; 0x48 + 8034b6c: 687b ldr r3, [r7, #4] + 8034b6e: 681b ldr r3, [r3, #0] + 8034b70: 3308 adds r3, #8 + 8034b72: 6cba ldr r2, [r7, #72] ; 0x48 + 8034b74: 62fa str r2, [r7, #44] ; 0x2c + 8034b76: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034b48: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8034b4a: 6afa ldr r2, [r7, #44] ; 0x2c - 8034b4c: e841 2300 strex r3, r2, [r1] - 8034b50: 627b str r3, [r7, #36] ; 0x24 + 8034b78: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8034b7a: 6afa ldr r2, [r7, #44] ; 0x2c + 8034b7c: e841 2300 strex r3, r2, [r1] + 8034b80: 627b str r3, [r7, #36] ; 0x24 return(result); - 8034b52: 6a7b ldr r3, [r7, #36] ; 0x24 - 8034b54: 2b00 cmp r3, #0 - 8034b56: d1e5 bne.n 8034b24 + 8034b82: 6a7b ldr r3, [r7, #36] ; 0x24 + 8034b84: 2b00 cmp r3, #0 + 8034b86: d1e5 bne.n 8034b54 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8034b58: 687b ldr r3, [r7, #4] - 8034b5a: 2220 movs r2, #32 - 8034b5c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034b88: 687b ldr r3, [r7, #4] + 8034b8a: 2220 movs r2, #32 + 8034b8c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8034b60: 687b ldr r3, [r7, #4] - 8034b62: 2200 movs r2, #0 - 8034b64: 671a str r2, [r3, #112] ; 0x70 + 8034b90: 687b ldr r3, [r7, #4] + 8034b92: 2200 movs r2, #0 + 8034b94: 671a str r2, [r3, #112] ; 0x70 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8034b66: 687b ldr r3, [r7, #4] - 8034b68: 6edb ldr r3, [r3, #108] ; 0x6c - 8034b6a: 2b01 cmp r3, #1 - 8034b6c: d12e bne.n 8034bcc + 8034b96: 687b ldr r3, [r7, #4] + 8034b98: 6edb ldr r3, [r3, #108] ; 0x6c + 8034b9a: 2b01 cmp r3, #1 + 8034b9c: d12e bne.n 8034bfc { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8034b6e: 687b ldr r3, [r7, #4] - 8034b70: 2200 movs r2, #0 - 8034b72: 66da str r2, [r3, #108] ; 0x6c + 8034b9e: 687b ldr r3, [r7, #4] + 8034ba0: 2200 movs r2, #0 + 8034ba2: 66da str r2, [r3, #108] ; 0x6c /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8034b74: 687b ldr r3, [r7, #4] - 8034b76: 681b ldr r3, [r3, #0] - 8034b78: 60fb str r3, [r7, #12] + 8034ba4: 687b ldr r3, [r7, #4] + 8034ba6: 681b ldr r3, [r3, #0] + 8034ba8: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034b7a: 68fb ldr r3, [r7, #12] - 8034b7c: e853 3f00 ldrex r3, [r3] - 8034b80: 60bb str r3, [r7, #8] + 8034baa: 68fb ldr r3, [r7, #12] + 8034bac: e853 3f00 ldrex r3, [r3] + 8034bb0: 60bb str r3, [r7, #8] return(result); - 8034b82: 68bb ldr r3, [r7, #8] - 8034b84: f023 0310 bic.w r3, r3, #16 - 8034b88: 647b str r3, [r7, #68] ; 0x44 - 8034b8a: 687b ldr r3, [r7, #4] - 8034b8c: 681b ldr r3, [r3, #0] - 8034b8e: 461a mov r2, r3 - 8034b90: 6c7b ldr r3, [r7, #68] ; 0x44 - 8034b92: 61bb str r3, [r7, #24] - 8034b94: 617a str r2, [r7, #20] + 8034bb2: 68bb ldr r3, [r7, #8] + 8034bb4: f023 0310 bic.w r3, r3, #16 + 8034bb8: 647b str r3, [r7, #68] ; 0x44 + 8034bba: 687b ldr r3, [r7, #4] + 8034bbc: 681b ldr r3, [r3, #0] + 8034bbe: 461a mov r2, r3 + 8034bc0: 6c7b ldr r3, [r7, #68] ; 0x44 + 8034bc2: 61bb str r3, [r7, #24] + 8034bc4: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034b96: 6979 ldr r1, [r7, #20] - 8034b98: 69ba ldr r2, [r7, #24] - 8034b9a: e841 2300 strex r3, r2, [r1] - 8034b9e: 613b str r3, [r7, #16] + 8034bc6: 6979 ldr r1, [r7, #20] + 8034bc8: 69ba ldr r2, [r7, #24] + 8034bca: e841 2300 strex r3, r2, [r1] + 8034bce: 613b str r3, [r7, #16] return(result); - 8034ba0: 693b ldr r3, [r7, #16] - 8034ba2: 2b00 cmp r3, #0 - 8034ba4: d1e6 bne.n 8034b74 + 8034bd0: 693b ldr r3, [r7, #16] + 8034bd2: 2b00 cmp r3, #0 + 8034bd4: d1e6 bne.n 8034ba4 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) - 8034ba6: 687b ldr r3, [r7, #4] - 8034ba8: 681b ldr r3, [r3, #0] - 8034baa: 69db ldr r3, [r3, #28] - 8034bac: f003 0310 and.w r3, r3, #16 - 8034bb0: 2b10 cmp r3, #16 - 8034bb2: d103 bne.n 8034bbc + 8034bd6: 687b ldr r3, [r7, #4] + 8034bd8: 681b ldr r3, [r3, #0] + 8034bda: 69db ldr r3, [r3, #28] + 8034bdc: f003 0310 and.w r3, r3, #16 + 8034be0: 2b10 cmp r3, #16 + 8034be2: d103 bne.n 8034bec { /* Clear IDLE Flag */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8034bb4: 687b ldr r3, [r7, #4] - 8034bb6: 681b ldr r3, [r3, #0] - 8034bb8: 2210 movs r2, #16 - 8034bba: 621a str r2, [r3, #32] + 8034be4: 687b ldr r3, [r7, #4] + 8034be6: 681b ldr r3, [r3, #0] + 8034be8: 2210 movs r2, #16 + 8034bea: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8034bbc: 687b ldr r3, [r7, #4] - 8034bbe: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 8034bc2: 4619 mov r1, r3 - 8034bc4: 6878 ldr r0, [r7, #4] - 8034bc6: f7fe fcdb bl 8033580 + 8034bec: 687b ldr r3, [r7, #4] + 8034bee: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 8034bf2: 4619 mov r1, r3 + 8034bf4: 6878 ldr r0, [r7, #4] + 8034bf6: f7fe fcdb bl 80335b0 else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 8034bca: e00b b.n 8034be4 + 8034bfa: e00b b.n 8034c14 HAL_UART_RxCpltCallback(huart); - 8034bcc: 6878 ldr r0, [r7, #4] - 8034bce: f7ec ff8f bl 8021af0 + 8034bfc: 6878 ldr r0, [r7, #4] + 8034bfe: f7ec ff77 bl 8021af0 } - 8034bd2: e007 b.n 8034be4 + 8034c02: e007 b.n 8034c14 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 8034bd4: 687b ldr r3, [r7, #4] - 8034bd6: 681b ldr r3, [r3, #0] - 8034bd8: 699a ldr r2, [r3, #24] - 8034bda: 687b ldr r3, [r7, #4] - 8034bdc: 681b ldr r3, [r3, #0] - 8034bde: f042 0208 orr.w r2, r2, #8 - 8034be2: 619a str r2, [r3, #24] -} - 8034be4: bf00 nop - 8034be6: 3758 adds r7, #88 ; 0x58 - 8034be8: 46bd mov sp, r7 - 8034bea: bd80 pop {r7, pc} - -08034bec : + 8034c04: 687b ldr r3, [r7, #4] + 8034c06: 681b ldr r3, [r3, #0] + 8034c08: 699a ldr r2, [r3, #24] + 8034c0a: 687b ldr r3, [r7, #4] + 8034c0c: 681b ldr r3, [r3, #0] + 8034c0e: f042 0208 orr.w r2, r2, #8 + 8034c12: 619a str r2, [r3, #24] +} + 8034c14: bf00 nop + 8034c16: 3758 adds r7, #88 ; 0x58 + 8034c18: 46bd mov sp, r7 + 8034c1a: bd80 pop {r7, pc} + +08034c1c : * interruptions have been enabled by HAL_UART_Receive_IT() * @param huart UART handle. * @retval None */ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) { - 8034bec: b580 push {r7, lr} - 8034bee: b0a6 sub sp, #152 ; 0x98 - 8034bf0: af00 add r7, sp, #0 - 8034bf2: 6078 str r0, [r7, #4] + 8034c1c: b580 push {r7, lr} + 8034c1e: b0a6 sub sp, #152 ; 0x98 + 8034c20: af00 add r7, sp, #0 + 8034c22: 6078 str r0, [r7, #4] uint16_t uhMask = huart->Mask; - 8034bf4: 687b ldr r3, [r7, #4] - 8034bf6: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 8034bfa: f8a7 3092 strh.w r3, [r7, #146] ; 0x92 + 8034c24: 687b ldr r3, [r7, #4] + 8034c26: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 8034c2a: f8a7 3092 strh.w r3, [r7, #146] ; 0x92 uint16_t uhdata; uint16_t nb_rx_data; uint16_t rxdatacount; uint32_t isrflags = READ_REG(huart->Instance->ISR); - 8034bfe: 687b ldr r3, [r7, #4] - 8034c00: 681b ldr r3, [r3, #0] - 8034c02: 69db ldr r3, [r3, #28] - 8034c04: f8c7 3094 str.w r3, [r7, #148] ; 0x94 + 8034c2e: 687b ldr r3, [r7, #4] + 8034c30: 681b ldr r3, [r3, #0] + 8034c32: 69db ldr r3, [r3, #28] + 8034c34: f8c7 3094 str.w r3, [r7, #148] ; 0x94 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8034c08: 687b ldr r3, [r7, #4] - 8034c0a: 681b ldr r3, [r3, #0] - 8034c0c: 681b ldr r3, [r3, #0] - 8034c0e: f8c7 308c str.w r3, [r7, #140] ; 0x8c + 8034c38: 687b ldr r3, [r7, #4] + 8034c3a: 681b ldr r3, [r3, #0] + 8034c3c: 681b ldr r3, [r3, #0] + 8034c3e: f8c7 308c str.w r3, [r7, #140] ; 0x8c uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8034c12: 687b ldr r3, [r7, #4] - 8034c14: 681b ldr r3, [r3, #0] - 8034c16: 689b ldr r3, [r3, #8] - 8034c18: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 8034c42: 687b ldr r3, [r7, #4] + 8034c44: 681b ldr r3, [r3, #0] + 8034c46: 689b ldr r3, [r3, #8] + 8034c48: f8c7 3088 str.w r3, [r7, #136] ; 0x88 /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8034c1c: 687b ldr r3, [r7, #4] - 8034c1e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034c22: 2b22 cmp r3, #34 ; 0x22 - 8034c24: f040 814d bne.w 8034ec2 + 8034c4c: 687b ldr r3, [r7, #4] + 8034c4e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8034c52: 2b22 cmp r3, #34 ; 0x22 + 8034c54: f040 814d bne.w 8034ef2 { nb_rx_data = huart->NbRxDataToProcess; - 8034c28: 687b ldr r3, [r7, #4] - 8034c2a: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 8034c2e: f8a7 3086 strh.w r3, [r7, #134] ; 0x86 + 8034c58: 687b ldr r3, [r7, #4] + 8034c5a: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 8034c5e: f8a7 3086 strh.w r3, [r7, #134] ; 0x86 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) - 8034c32: e0f4 b.n 8034e1e + 8034c62: e0f4 b.n 8034e4e { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 8034c34: 687b ldr r3, [r7, #4] - 8034c36: 681b ldr r3, [r3, #0] - 8034c38: 6a5b ldr r3, [r3, #36] ; 0x24 - 8034c3a: f8a7 3084 strh.w r3, [r7, #132] ; 0x84 + 8034c64: 687b ldr r3, [r7, #4] + 8034c66: 681b ldr r3, [r3, #0] + 8034c68: 6a5b ldr r3, [r3, #36] ; 0x24 + 8034c6a: f8a7 3084 strh.w r3, [r7, #132] ; 0x84 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); - 8034c3e: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 - 8034c42: b2d9 uxtb r1, r3 - 8034c44: f8b7 3092 ldrh.w r3, [r7, #146] ; 0x92 - 8034c48: b2da uxtb r2, r3 - 8034c4a: 687b ldr r3, [r7, #4] - 8034c4c: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034c4e: 400a ands r2, r1 - 8034c50: b2d2 uxtb r2, r2 - 8034c52: 701a strb r2, [r3, #0] + 8034c6e: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 + 8034c72: b2d9 uxtb r1, r3 + 8034c74: f8b7 3092 ldrh.w r3, [r7, #146] ; 0x92 + 8034c78: b2da uxtb r2, r3 + 8034c7a: 687b ldr r3, [r7, #4] + 8034c7c: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034c7e: 400a ands r2, r1 + 8034c80: b2d2 uxtb r2, r2 + 8034c82: 701a strb r2, [r3, #0] huart->pRxBuffPtr++; - 8034c54: 687b ldr r3, [r7, #4] - 8034c56: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034c58: 1c5a adds r2, r3, #1 - 8034c5a: 687b ldr r3, [r7, #4] - 8034c5c: 659a str r2, [r3, #88] ; 0x58 + 8034c84: 687b ldr r3, [r7, #4] + 8034c86: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034c88: 1c5a adds r2, r3, #1 + 8034c8a: 687b ldr r3, [r7, #4] + 8034c8c: 659a str r2, [r3, #88] ; 0x58 huart->RxXferCount--; - 8034c5e: 687b ldr r3, [r7, #4] - 8034c60: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034c64: b29b uxth r3, r3 - 8034c66: 3b01 subs r3, #1 - 8034c68: b29a uxth r2, r3 - 8034c6a: 687b ldr r3, [r7, #4] - 8034c6c: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 8034c8e: 687b ldr r3, [r7, #4] + 8034c90: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034c94: b29b uxth r3, r3 + 8034c96: 3b01 subs r3, #1 + 8034c98: b29a uxth r2, r3 + 8034c9a: 687b ldr r3, [r7, #4] + 8034c9c: f8a3 205e strh.w r2, [r3, #94] ; 0x5e isrflags = READ_REG(huart->Instance->ISR); - 8034c70: 687b ldr r3, [r7, #4] - 8034c72: 681b ldr r3, [r3, #0] - 8034c74: 69db ldr r3, [r3, #28] - 8034c76: f8c7 3094 str.w r3, [r7, #148] ; 0x94 + 8034ca0: 687b ldr r3, [r7, #4] + 8034ca2: 681b ldr r3, [r3, #0] + 8034ca4: 69db ldr r3, [r3, #28] + 8034ca6: f8c7 3094 str.w r3, [r7, #148] ; 0x94 /* If some non blocking errors occurred */ if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U) - 8034c7a: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034c7e: f003 0307 and.w r3, r3, #7 - 8034c82: 2b00 cmp r3, #0 - 8034c84: d053 beq.n 8034d2e + 8034caa: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8034cae: f003 0307 and.w r3, r3, #7 + 8034cb2: 2b00 cmp r3, #0 + 8034cb4: d053 beq.n 8034d5e { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 8034c86: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034c8a: f003 0301 and.w r3, r3, #1 - 8034c8e: 2b00 cmp r3, #0 - 8034c90: d011 beq.n 8034cb6 - 8034c92: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c - 8034c96: f403 7380 and.w r3, r3, #256 ; 0x100 - 8034c9a: 2b00 cmp r3, #0 - 8034c9c: d00b beq.n 8034cb6 - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 8034c9e: 687b ldr r3, [r7, #4] - 8034ca0: 681b ldr r3, [r3, #0] - 8034ca2: 2201 movs r2, #1 - 8034ca4: 621a str r2, [r3, #32] - - huart->ErrorCode |= HAL_UART_ERROR_PE; - 8034ca6: 687b ldr r3, [r7, #4] - 8034ca8: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034cac: f043 0201 orr.w r2, r3, #1 - 8034cb0: 687b ldr r3, [r7, #4] - 8034cb2: f8c3 208c str.w r2, [r3, #140] ; 0x8c - } - - /* UART frame error interrupt occurred --------------------------------------*/ - if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8034cb6: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034cba: f003 0302 and.w r3, r3, #2 + 8034cba: f003 0301 and.w r3, r3, #1 8034cbe: 2b00 cmp r3, #0 - 8034cc0: d011 beq.n 8034ce6 - 8034cc2: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 - 8034cc6: f003 0301 and.w r3, r3, #1 + 8034cc0: d011 beq.n 8034ce6 + 8034cc2: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c + 8034cc6: f403 7380 and.w r3, r3, #256 ; 0x100 8034cca: 2b00 cmp r3, #0 - 8034ccc: d00b beq.n 8034ce6 + 8034ccc: d00b beq.n 8034ce6 { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); 8034cce: 687b ldr r3, [r7, #4] 8034cd0: 681b ldr r3, [r3, #0] - 8034cd2: 2202 movs r2, #2 + 8034cd2: 2201 movs r2, #1 8034cd4: 621a str r2, [r3, #32] - huart->ErrorCode |= HAL_UART_ERROR_FE; + huart->ErrorCode |= HAL_UART_ERROR_PE; 8034cd6: 687b ldr r3, [r7, #4] 8034cd8: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034cdc: f043 0204 orr.w r2, r3, #4 + 8034cdc: f043 0201 orr.w r2, r3, #1 8034ce0: 687b ldr r3, [r7, #4] 8034ce2: f8c3 208c str.w r2, [r3, #140] ; 0x8c } - /* UART noise error interrupt occurred --------------------------------------*/ - if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + /* UART frame error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8034ce6: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034cea: f003 0304 and.w r3, r3, #4 + 8034cea: f003 0302 and.w r3, r3, #2 8034cee: 2b00 cmp r3, #0 - 8034cf0: d011 beq.n 8034d16 + 8034cf0: d011 beq.n 8034d16 8034cf2: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 8034cf6: f003 0301 and.w r3, r3, #1 8034cfa: 2b00 cmp r3, #0 - 8034cfc: d00b beq.n 8034d16 + 8034cfc: d00b beq.n 8034d16 { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); 8034cfe: 687b ldr r3, [r7, #4] 8034d00: 681b ldr r3, [r3, #0] - 8034d02: 2204 movs r2, #4 + 8034d02: 2202 movs r2, #2 8034d04: 621a str r2, [r3, #32] - huart->ErrorCode |= HAL_UART_ERROR_NE; + huart->ErrorCode |= HAL_UART_ERROR_FE; 8034d06: 687b ldr r3, [r7, #4] 8034d08: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034d0c: f043 0202 orr.w r2, r3, #2 + 8034d0c: f043 0204 orr.w r2, r3, #4 8034d10: 687b ldr r3, [r7, #4] 8034d12: f8c3 208c str.w r2, [r3, #140] ; 0x8c } + /* UART noise error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + 8034d16: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8034d1a: f003 0304 and.w r3, r3, #4 + 8034d1e: 2b00 cmp r3, #0 + 8034d20: d011 beq.n 8034d46 + 8034d22: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 + 8034d26: f003 0301 and.w r3, r3, #1 + 8034d2a: 2b00 cmp r3, #0 + 8034d2c: d00b beq.n 8034d46 + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + 8034d2e: 687b ldr r3, [r7, #4] + 8034d30: 681b ldr r3, [r3, #0] + 8034d32: 2204 movs r2, #4 + 8034d34: 621a str r2, [r3, #32] + + huart->ErrorCode |= HAL_UART_ERROR_NE; + 8034d36: 687b ldr r3, [r7, #4] + 8034d38: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8034d3c: f043 0202 orr.w r2, r3, #2 + 8034d40: 687b ldr r3, [r7, #4] + 8034d42: f8c3 208c str.w r2, [r3, #140] ; 0x8c + } + /* Call UART Error Call back function if need be ----------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8034d16: 687b ldr r3, [r7, #4] - 8034d18: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034d1c: 2b00 cmp r3, #0 - 8034d1e: d006 beq.n 8034d2e + 8034d46: 687b ldr r3, [r7, #4] + 8034d48: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8034d4c: 2b00 cmp r3, #0 + 8034d4e: d006 beq.n 8034d5e #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8034d20: 6878 ldr r0, [r7, #4] - 8034d22: f7fe fc23 bl 803356c + 8034d50: 6878 ldr r0, [r7, #4] + 8034d52: f7fe fc23 bl 803359c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8034d26: 687b ldr r3, [r7, #4] - 8034d28: 2200 movs r2, #0 - 8034d2a: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8034d56: 687b ldr r3, [r7, #4] + 8034d58: 2200 movs r2, #0 + 8034d5a: f8c3 208c str.w r2, [r3, #140] ; 0x8c } } if (huart->RxXferCount == 0U) - 8034d2e: 687b ldr r3, [r7, #4] - 8034d30: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034d34: b29b uxth r3, r3 - 8034d36: 2b00 cmp r3, #0 - 8034d38: d171 bne.n 8034e1e + 8034d5e: 687b ldr r3, [r7, #4] + 8034d60: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034d64: b29b uxth r3, r3 + 8034d66: 2b00 cmp r3, #0 + 8034d68: d171 bne.n 8034e4e { /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8034d3a: 687b ldr r3, [r7, #4] - 8034d3c: 681b ldr r3, [r3, #0] - 8034d3e: 65fb str r3, [r7, #92] ; 0x5c + 8034d6a: 687b ldr r3, [r7, #4] + 8034d6c: 681b ldr r3, [r3, #0] + 8034d6e: 65fb str r3, [r7, #92] ; 0x5c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034d40: 6dfb ldr r3, [r7, #92] ; 0x5c - 8034d42: e853 3f00 ldrex r3, [r3] - 8034d46: 65bb str r3, [r7, #88] ; 0x58 + 8034d70: 6dfb ldr r3, [r7, #92] ; 0x5c + 8034d72: e853 3f00 ldrex r3, [r3] + 8034d76: 65bb str r3, [r7, #88] ; 0x58 return(result); - 8034d48: 6dbb ldr r3, [r7, #88] ; 0x58 - 8034d4a: f423 7380 bic.w r3, r3, #256 ; 0x100 - 8034d4e: f8c7 3080 str.w r3, [r7, #128] ; 0x80 - 8034d52: 687b ldr r3, [r7, #4] - 8034d54: 681b ldr r3, [r3, #0] - 8034d56: 461a mov r2, r3 - 8034d58: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80 - 8034d5c: 66bb str r3, [r7, #104] ; 0x68 - 8034d5e: 667a str r2, [r7, #100] ; 0x64 + 8034d78: 6dbb ldr r3, [r7, #88] ; 0x58 + 8034d7a: f423 7380 bic.w r3, r3, #256 ; 0x100 + 8034d7e: f8c7 3080 str.w r3, [r7, #128] ; 0x80 + 8034d82: 687b ldr r3, [r7, #4] + 8034d84: 681b ldr r3, [r3, #0] + 8034d86: 461a mov r2, r3 + 8034d88: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80 + 8034d8c: 66bb str r3, [r7, #104] ; 0x68 + 8034d8e: 667a str r2, [r7, #100] ; 0x64 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034d60: 6e79 ldr r1, [r7, #100] ; 0x64 - 8034d62: 6eba ldr r2, [r7, #104] ; 0x68 - 8034d64: e841 2300 strex r3, r2, [r1] - 8034d68: 663b str r3, [r7, #96] ; 0x60 + 8034d90: 6e79 ldr r1, [r7, #100] ; 0x64 + 8034d92: 6eba ldr r2, [r7, #104] ; 0x68 + 8034d94: e841 2300 strex r3, r2, [r1] + 8034d98: 663b str r3, [r7, #96] ; 0x60 return(result); - 8034d6a: 6e3b ldr r3, [r7, #96] ; 0x60 - 8034d6c: 2b00 cmp r3, #0 - 8034d6e: d1e4 bne.n 8034d3a + 8034d9a: 6e3b ldr r3, [r7, #96] ; 0x60 + 8034d9c: 2b00 cmp r3, #0 + 8034d9e: d1e4 bne.n 8034d6a /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 8034d70: 687b ldr r3, [r7, #4] - 8034d72: 681b ldr r3, [r3, #0] - 8034d74: 3308 adds r3, #8 - 8034d76: 64bb str r3, [r7, #72] ; 0x48 + 8034da0: 687b ldr r3, [r7, #4] + 8034da2: 681b ldr r3, [r3, #0] + 8034da4: 3308 adds r3, #8 + 8034da6: 64bb str r3, [r7, #72] ; 0x48 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034d78: 6cbb ldr r3, [r7, #72] ; 0x48 - 8034d7a: e853 3f00 ldrex r3, [r3] - 8034d7e: 647b str r3, [r7, #68] ; 0x44 + 8034da8: 6cbb ldr r3, [r7, #72] ; 0x48 + 8034daa: e853 3f00 ldrex r3, [r3] + 8034dae: 647b str r3, [r7, #68] ; 0x44 return(result); - 8034d80: 6c7a ldr r2, [r7, #68] ; 0x44 - 8034d82: 4b56 ldr r3, [pc, #344] ; (8034edc ) - 8034d84: 4013 ands r3, r2 - 8034d86: 67fb str r3, [r7, #124] ; 0x7c - 8034d88: 687b ldr r3, [r7, #4] - 8034d8a: 681b ldr r3, [r3, #0] - 8034d8c: 3308 adds r3, #8 - 8034d8e: 6ffa ldr r2, [r7, #124] ; 0x7c - 8034d90: 657a str r2, [r7, #84] ; 0x54 - 8034d92: 653b str r3, [r7, #80] ; 0x50 + 8034db0: 6c7a ldr r2, [r7, #68] ; 0x44 + 8034db2: 4b56 ldr r3, [pc, #344] ; (8034f0c ) + 8034db4: 4013 ands r3, r2 + 8034db6: 67fb str r3, [r7, #124] ; 0x7c + 8034db8: 687b ldr r3, [r7, #4] + 8034dba: 681b ldr r3, [r3, #0] + 8034dbc: 3308 adds r3, #8 + 8034dbe: 6ffa ldr r2, [r7, #124] ; 0x7c + 8034dc0: 657a str r2, [r7, #84] ; 0x54 + 8034dc2: 653b str r3, [r7, #80] ; 0x50 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034d94: 6d39 ldr r1, [r7, #80] ; 0x50 - 8034d96: 6d7a ldr r2, [r7, #84] ; 0x54 - 8034d98: e841 2300 strex r3, r2, [r1] - 8034d9c: 64fb str r3, [r7, #76] ; 0x4c + 8034dc4: 6d39 ldr r1, [r7, #80] ; 0x50 + 8034dc6: 6d7a ldr r2, [r7, #84] ; 0x54 + 8034dc8: e841 2300 strex r3, r2, [r1] + 8034dcc: 64fb str r3, [r7, #76] ; 0x4c return(result); - 8034d9e: 6cfb ldr r3, [r7, #76] ; 0x4c - 8034da0: 2b00 cmp r3, #0 - 8034da2: d1e5 bne.n 8034d70 + 8034dce: 6cfb ldr r3, [r7, #76] ; 0x4c + 8034dd0: 2b00 cmp r3, #0 + 8034dd2: d1e5 bne.n 8034da0 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8034da4: 687b ldr r3, [r7, #4] - 8034da6: 2220 movs r2, #32 - 8034da8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034dd4: 687b ldr r3, [r7, #4] + 8034dd6: 2220 movs r2, #32 + 8034dd8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8034dac: 687b ldr r3, [r7, #4] - 8034dae: 2200 movs r2, #0 - 8034db0: 671a str r2, [r3, #112] ; 0x70 + 8034ddc: 687b ldr r3, [r7, #4] + 8034dde: 2200 movs r2, #0 + 8034de0: 671a str r2, [r3, #112] ; 0x70 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8034db2: 687b ldr r3, [r7, #4] - 8034db4: 6edb ldr r3, [r3, #108] ; 0x6c - 8034db6: 2b01 cmp r3, #1 - 8034db8: d12e bne.n 8034e18 + 8034de2: 687b ldr r3, [r7, #4] + 8034de4: 6edb ldr r3, [r3, #108] ; 0x6c + 8034de6: 2b01 cmp r3, #1 + 8034de8: d12e bne.n 8034e48 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8034dba: 687b ldr r3, [r7, #4] - 8034dbc: 2200 movs r2, #0 - 8034dbe: 66da str r2, [r3, #108] ; 0x6c + 8034dea: 687b ldr r3, [r7, #4] + 8034dec: 2200 movs r2, #0 + 8034dee: 66da str r2, [r3, #108] ; 0x6c /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8034dc0: 687b ldr r3, [r7, #4] - 8034dc2: 681b ldr r3, [r3, #0] - 8034dc4: 637b str r3, [r7, #52] ; 0x34 + 8034df0: 687b ldr r3, [r7, #4] + 8034df2: 681b ldr r3, [r3, #0] + 8034df4: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034dc6: 6b7b ldr r3, [r7, #52] ; 0x34 - 8034dc8: e853 3f00 ldrex r3, [r3] - 8034dcc: 633b str r3, [r7, #48] ; 0x30 + 8034df6: 6b7b ldr r3, [r7, #52] ; 0x34 + 8034df8: e853 3f00 ldrex r3, [r3] + 8034dfc: 633b str r3, [r7, #48] ; 0x30 return(result); - 8034dce: 6b3b ldr r3, [r7, #48] ; 0x30 - 8034dd0: f023 0310 bic.w r3, r3, #16 - 8034dd4: 67bb str r3, [r7, #120] ; 0x78 - 8034dd6: 687b ldr r3, [r7, #4] - 8034dd8: 681b ldr r3, [r3, #0] - 8034dda: 461a mov r2, r3 - 8034ddc: 6fbb ldr r3, [r7, #120] ; 0x78 - 8034dde: 643b str r3, [r7, #64] ; 0x40 - 8034de0: 63fa str r2, [r7, #60] ; 0x3c + 8034dfe: 6b3b ldr r3, [r7, #48] ; 0x30 + 8034e00: f023 0310 bic.w r3, r3, #16 + 8034e04: 67bb str r3, [r7, #120] ; 0x78 + 8034e06: 687b ldr r3, [r7, #4] + 8034e08: 681b ldr r3, [r3, #0] + 8034e0a: 461a mov r2, r3 + 8034e0c: 6fbb ldr r3, [r7, #120] ; 0x78 + 8034e0e: 643b str r3, [r7, #64] ; 0x40 + 8034e10: 63fa str r2, [r7, #60] ; 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034de2: 6bf9 ldr r1, [r7, #60] ; 0x3c - 8034de4: 6c3a ldr r2, [r7, #64] ; 0x40 - 8034de6: e841 2300 strex r3, r2, [r1] - 8034dea: 63bb str r3, [r7, #56] ; 0x38 + 8034e12: 6bf9 ldr r1, [r7, #60] ; 0x3c + 8034e14: 6c3a ldr r2, [r7, #64] ; 0x40 + 8034e16: e841 2300 strex r3, r2, [r1] + 8034e1a: 63bb str r3, [r7, #56] ; 0x38 return(result); - 8034dec: 6bbb ldr r3, [r7, #56] ; 0x38 - 8034dee: 2b00 cmp r3, #0 - 8034df0: d1e6 bne.n 8034dc0 + 8034e1c: 6bbb ldr r3, [r7, #56] ; 0x38 + 8034e1e: 2b00 cmp r3, #0 + 8034e20: d1e6 bne.n 8034df0 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) - 8034df2: 687b ldr r3, [r7, #4] - 8034df4: 681b ldr r3, [r3, #0] - 8034df6: 69db ldr r3, [r3, #28] - 8034df8: f003 0310 and.w r3, r3, #16 - 8034dfc: 2b10 cmp r3, #16 - 8034dfe: d103 bne.n 8034e08 + 8034e22: 687b ldr r3, [r7, #4] + 8034e24: 681b ldr r3, [r3, #0] + 8034e26: 69db ldr r3, [r3, #28] + 8034e28: f003 0310 and.w r3, r3, #16 + 8034e2c: 2b10 cmp r3, #16 + 8034e2e: d103 bne.n 8034e38 { /* Clear IDLE Flag */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8034e00: 687b ldr r3, [r7, #4] - 8034e02: 681b ldr r3, [r3, #0] - 8034e04: 2210 movs r2, #16 - 8034e06: 621a str r2, [r3, #32] + 8034e30: 687b ldr r3, [r7, #4] + 8034e32: 681b ldr r3, [r3, #0] + 8034e34: 2210 movs r2, #16 + 8034e36: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8034e08: 687b ldr r3, [r7, #4] - 8034e0a: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 8034e0e: 4619 mov r1, r3 - 8034e10: 6878 ldr r0, [r7, #4] - 8034e12: f7fe fbb5 bl 8033580 - 8034e16: e002 b.n 8034e1e + 8034e38: 687b ldr r3, [r7, #4] + 8034e3a: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 8034e3e: 4619 mov r1, r3 + 8034e40: 6878 ldr r0, [r7, #4] + 8034e42: f7fe fbb5 bl 80335b0 + 8034e46: e002 b.n 8034e4e #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 8034e18: 6878 ldr r0, [r7, #4] - 8034e1a: f7ec fe69 bl 8021af0 + 8034e48: 6878 ldr r0, [r7, #4] + 8034e4a: f7ec fe51 bl 8021af0 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) - 8034e1e: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86 - 8034e22: 2b00 cmp r3, #0 - 8034e24: d006 beq.n 8034e34 - 8034e26: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034e2a: f003 0320 and.w r3, r3, #32 - 8034e2e: 2b00 cmp r3, #0 - 8034e30: f47f af00 bne.w 8034c34 + 8034e4e: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86 + 8034e52: 2b00 cmp r3, #0 + 8034e54: d006 beq.n 8034e64 + 8034e56: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8034e5a: f003 0320 and.w r3, r3, #32 + 8034e5e: 2b00 cmp r3, #0 + 8034e60: f47f af00 bne.w 8034c64 /* When remaining number of bytes to receive is less than the RX FIFO threshold, next incoming frames are processed as if FIFO mode was disabled (i.e. one interrupt per received frame). */ rxdatacount = huart->RxXferCount; - 8034e34: 687b ldr r3, [r7, #4] - 8034e36: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034e3a: f8a7 3076 strh.w r3, [r7, #118] ; 0x76 + 8034e64: 687b ldr r3, [r7, #4] + 8034e66: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034e6a: f8a7 3076 strh.w r3, [r7, #118] ; 0x76 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess)) - 8034e3e: f8b7 3076 ldrh.w r3, [r7, #118] ; 0x76 - 8034e42: 2b00 cmp r3, #0 - 8034e44: d045 beq.n 8034ed2 - 8034e46: 687b ldr r3, [r7, #4] - 8034e48: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 8034e4c: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76 - 8034e50: 429a cmp r2, r3 - 8034e52: d23e bcs.n 8034ed2 + 8034e6e: f8b7 3076 ldrh.w r3, [r7, #118] ; 0x76 + 8034e72: 2b00 cmp r3, #0 + 8034e74: d045 beq.n 8034f02 + 8034e76: 687b ldr r3, [r7, #4] + 8034e78: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 8034e7c: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76 + 8034e80: 429a cmp r2, r3 + 8034e82: d23e bcs.n 8034f02 { /* Disable the UART RXFT interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - 8034e54: 687b ldr r3, [r7, #4] - 8034e56: 681b ldr r3, [r3, #0] - 8034e58: 3308 adds r3, #8 - 8034e5a: 623b str r3, [r7, #32] + 8034e84: 687b ldr r3, [r7, #4] + 8034e86: 681b ldr r3, [r3, #0] + 8034e88: 3308 adds r3, #8 + 8034e8a: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034e5c: 6a3b ldr r3, [r7, #32] - 8034e5e: e853 3f00 ldrex r3, [r3] - 8034e62: 61fb str r3, [r7, #28] + 8034e8c: 6a3b ldr r3, [r7, #32] + 8034e8e: e853 3f00 ldrex r3, [r3] + 8034e92: 61fb str r3, [r7, #28] return(result); - 8034e64: 69fb ldr r3, [r7, #28] - 8034e66: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 8034e6a: 673b str r3, [r7, #112] ; 0x70 - 8034e6c: 687b ldr r3, [r7, #4] - 8034e6e: 681b ldr r3, [r3, #0] - 8034e70: 3308 adds r3, #8 - 8034e72: 6f3a ldr r2, [r7, #112] ; 0x70 - 8034e74: 62fa str r2, [r7, #44] ; 0x2c - 8034e76: 62bb str r3, [r7, #40] ; 0x28 + 8034e94: 69fb ldr r3, [r7, #28] + 8034e96: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 8034e9a: 673b str r3, [r7, #112] ; 0x70 + 8034e9c: 687b ldr r3, [r7, #4] + 8034e9e: 681b ldr r3, [r3, #0] + 8034ea0: 3308 adds r3, #8 + 8034ea2: 6f3a ldr r2, [r7, #112] ; 0x70 + 8034ea4: 62fa str r2, [r7, #44] ; 0x2c + 8034ea6: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034e78: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8034e7a: 6afa ldr r2, [r7, #44] ; 0x2c - 8034e7c: e841 2300 strex r3, r2, [r1] - 8034e80: 627b str r3, [r7, #36] ; 0x24 + 8034ea8: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8034eaa: 6afa ldr r2, [r7, #44] ; 0x2c + 8034eac: e841 2300 strex r3, r2, [r1] + 8034eb0: 627b str r3, [r7, #36] ; 0x24 return(result); - 8034e82: 6a7b ldr r3, [r7, #36] ; 0x24 - 8034e84: 2b00 cmp r3, #0 - 8034e86: d1e5 bne.n 8034e54 + 8034eb2: 6a7b ldr r3, [r7, #36] ; 0x24 + 8034eb4: 2b00 cmp r3, #0 + 8034eb6: d1e5 bne.n 8034e84 /* Update the RxISR function pointer */ huart->RxISR = UART_RxISR_8BIT; - 8034e88: 687b ldr r3, [r7, #4] - 8034e8a: 4a15 ldr r2, [pc, #84] ; (8034ee0 ) - 8034e8c: 671a str r2, [r3, #112] ; 0x70 + 8034eb8: 687b ldr r3, [r7, #4] + 8034eba: 4a15 ldr r2, [pc, #84] ; (8034f10 ) + 8034ebc: 671a str r2, [r3, #112] ; 0x70 /* Enable the UART Data Register Not Empty interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - 8034e8e: 687b ldr r3, [r7, #4] - 8034e90: 681b ldr r3, [r3, #0] - 8034e92: 60fb str r3, [r7, #12] + 8034ebe: 687b ldr r3, [r7, #4] + 8034ec0: 681b ldr r3, [r3, #0] + 8034ec2: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034e94: 68fb ldr r3, [r7, #12] - 8034e96: e853 3f00 ldrex r3, [r3] - 8034e9a: 60bb str r3, [r7, #8] + 8034ec4: 68fb ldr r3, [r7, #12] + 8034ec6: e853 3f00 ldrex r3, [r3] + 8034eca: 60bb str r3, [r7, #8] return(result); - 8034e9c: 68bb ldr r3, [r7, #8] - 8034e9e: f043 0320 orr.w r3, r3, #32 - 8034ea2: 66fb str r3, [r7, #108] ; 0x6c - 8034ea4: 687b ldr r3, [r7, #4] - 8034ea6: 681b ldr r3, [r3, #0] - 8034ea8: 461a mov r2, r3 - 8034eaa: 6efb ldr r3, [r7, #108] ; 0x6c - 8034eac: 61bb str r3, [r7, #24] - 8034eae: 617a str r2, [r7, #20] + 8034ecc: 68bb ldr r3, [r7, #8] + 8034ece: f043 0320 orr.w r3, r3, #32 + 8034ed2: 66fb str r3, [r7, #108] ; 0x6c + 8034ed4: 687b ldr r3, [r7, #4] + 8034ed6: 681b ldr r3, [r3, #0] + 8034ed8: 461a mov r2, r3 + 8034eda: 6efb ldr r3, [r7, #108] ; 0x6c + 8034edc: 61bb str r3, [r7, #24] + 8034ede: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034eb0: 6979 ldr r1, [r7, #20] - 8034eb2: 69ba ldr r2, [r7, #24] - 8034eb4: e841 2300 strex r3, r2, [r1] - 8034eb8: 613b str r3, [r7, #16] + 8034ee0: 6979 ldr r1, [r7, #20] + 8034ee2: 69ba ldr r2, [r7, #24] + 8034ee4: e841 2300 strex r3, r2, [r1] + 8034ee8: 613b str r3, [r7, #16] return(result); - 8034eba: 693b ldr r3, [r7, #16] - 8034ebc: 2b00 cmp r3, #0 - 8034ebe: d1e6 bne.n 8034e8e + 8034eea: 693b ldr r3, [r7, #16] + 8034eec: 2b00 cmp r3, #0 + 8034eee: d1e6 bne.n 8034ebe else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 8034ec0: e007 b.n 8034ed2 + 8034ef0: e007 b.n 8034f02 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 8034ec2: 687b ldr r3, [r7, #4] - 8034ec4: 681b ldr r3, [r3, #0] - 8034ec6: 699a ldr r2, [r3, #24] - 8034ec8: 687b ldr r3, [r7, #4] - 8034eca: 681b ldr r3, [r3, #0] - 8034ecc: f042 0208 orr.w r2, r2, #8 - 8034ed0: 619a str r2, [r3, #24] -} - 8034ed2: bf00 nop - 8034ed4: 3798 adds r7, #152 ; 0x98 - 8034ed6: 46bd mov sp, r7 - 8034ed8: bd80 pop {r7, pc} - 8034eda: bf00 nop - 8034edc: effffffe .word 0xeffffffe - 8034ee0: 0803492d .word 0x0803492d - -08034ee4 : + 8034ef2: 687b ldr r3, [r7, #4] + 8034ef4: 681b ldr r3, [r3, #0] + 8034ef6: 699a ldr r2, [r3, #24] + 8034ef8: 687b ldr r3, [r7, #4] + 8034efa: 681b ldr r3, [r3, #0] + 8034efc: f042 0208 orr.w r2, r2, #8 + 8034f00: 619a str r2, [r3, #24] +} + 8034f02: bf00 nop + 8034f04: 3798 adds r7, #152 ; 0x98 + 8034f06: 46bd mov sp, r7 + 8034f08: bd80 pop {r7, pc} + 8034f0a: bf00 nop + 8034f0c: effffffe .word 0xeffffffe + 8034f10: 0803495d .word 0x0803495d + +08034f14 : * interruptions have been enabled by HAL_UART_Receive_IT() * @param huart UART handle. * @retval None */ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) { - 8034ee4: b580 push {r7, lr} - 8034ee6: b0a8 sub sp, #160 ; 0xa0 - 8034ee8: af00 add r7, sp, #0 - 8034eea: 6078 str r0, [r7, #4] + 8034f14: b580 push {r7, lr} + 8034f16: b0a8 sub sp, #160 ; 0xa0 + 8034f18: af00 add r7, sp, #0 + 8034f1a: 6078 str r0, [r7, #4] uint16_t *tmp; uint16_t uhMask = huart->Mask; - 8034eec: 687b ldr r3, [r7, #4] - 8034eee: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 8034ef2: f8a7 309a strh.w r3, [r7, #154] ; 0x9a + 8034f1c: 687b ldr r3, [r7, #4] + 8034f1e: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 8034f22: f8a7 309a strh.w r3, [r7, #154] ; 0x9a uint16_t uhdata; uint16_t nb_rx_data; uint16_t rxdatacount; uint32_t isrflags = READ_REG(huart->Instance->ISR); - 8034ef6: 687b ldr r3, [r7, #4] - 8034ef8: 681b ldr r3, [r3, #0] - 8034efa: 69db ldr r3, [r3, #28] - 8034efc: f8c7 309c str.w r3, [r7, #156] ; 0x9c + 8034f26: 687b ldr r3, [r7, #4] + 8034f28: 681b ldr r3, [r3, #0] + 8034f2a: 69db ldr r3, [r3, #28] + 8034f2c: f8c7 309c str.w r3, [r7, #156] ; 0x9c uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8034f00: 687b ldr r3, [r7, #4] - 8034f02: 681b ldr r3, [r3, #0] - 8034f04: 681b ldr r3, [r3, #0] - 8034f06: f8c7 3094 str.w r3, [r7, #148] ; 0x94 + 8034f30: 687b ldr r3, [r7, #4] + 8034f32: 681b ldr r3, [r3, #0] + 8034f34: 681b ldr r3, [r3, #0] + 8034f36: f8c7 3094 str.w r3, [r7, #148] ; 0x94 uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8034f0a: 687b ldr r3, [r7, #4] - 8034f0c: 681b ldr r3, [r3, #0] - 8034f0e: 689b ldr r3, [r3, #8] - 8034f10: f8c7 3090 str.w r3, [r7, #144] ; 0x90 + 8034f3a: 687b ldr r3, [r7, #4] + 8034f3c: 681b ldr r3, [r3, #0] + 8034f3e: 689b ldr r3, [r3, #8] + 8034f40: f8c7 3090 str.w r3, [r7, #144] ; 0x90 /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8034f14: 687b ldr r3, [r7, #4] - 8034f16: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034f1a: 2b22 cmp r3, #34 ; 0x22 - 8034f1c: f040 8151 bne.w 80351c2 + 8034f44: 687b ldr r3, [r7, #4] + 8034f46: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8034f4a: 2b22 cmp r3, #34 ; 0x22 + 8034f4c: f040 8151 bne.w 80351f2 { nb_rx_data = huart->NbRxDataToProcess; - 8034f20: 687b ldr r3, [r7, #4] - 8034f22: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 8034f26: f8a7 308e strh.w r3, [r7, #142] ; 0x8e + 8034f50: 687b ldr r3, [r7, #4] + 8034f52: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 8034f56: f8a7 308e strh.w r3, [r7, #142] ; 0x8e while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) - 8034f2a: e0f8 b.n 803511e + 8034f5a: e0f8 b.n 803514e { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 8034f2c: 687b ldr r3, [r7, #4] - 8034f2e: 681b ldr r3, [r3, #0] - 8034f30: 6a5b ldr r3, [r3, #36] ; 0x24 - 8034f32: f8a7 308c strh.w r3, [r7, #140] ; 0x8c + 8034f5c: 687b ldr r3, [r7, #4] + 8034f5e: 681b ldr r3, [r3, #0] + 8034f60: 6a5b ldr r3, [r3, #36] ; 0x24 + 8034f62: f8a7 308c strh.w r3, [r7, #140] ; 0x8c tmp = (uint16_t *) huart->pRxBuffPtr ; - 8034f36: 687b ldr r3, [r7, #4] - 8034f38: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034f3a: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 8034f66: 687b ldr r3, [r7, #4] + 8034f68: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034f6a: f8c7 3088 str.w r3, [r7, #136] ; 0x88 *tmp = (uint16_t)(uhdata & uhMask); - 8034f3e: f8b7 208c ldrh.w r2, [r7, #140] ; 0x8c - 8034f42: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a - 8034f46: 4013 ands r3, r2 - 8034f48: b29a uxth r2, r3 - 8034f4a: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 - 8034f4e: 801a strh r2, [r3, #0] + 8034f6e: f8b7 208c ldrh.w r2, [r7, #140] ; 0x8c + 8034f72: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a + 8034f76: 4013 ands r3, r2 + 8034f78: b29a uxth r2, r3 + 8034f7a: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 + 8034f7e: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 8034f50: 687b ldr r3, [r7, #4] - 8034f52: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034f54: 1c9a adds r2, r3, #2 - 8034f56: 687b ldr r3, [r7, #4] - 8034f58: 659a str r2, [r3, #88] ; 0x58 + 8034f80: 687b ldr r3, [r7, #4] + 8034f82: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034f84: 1c9a adds r2, r3, #2 + 8034f86: 687b ldr r3, [r7, #4] + 8034f88: 659a str r2, [r3, #88] ; 0x58 huart->RxXferCount--; - 8034f5a: 687b ldr r3, [r7, #4] - 8034f5c: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034f60: b29b uxth r3, r3 - 8034f62: 3b01 subs r3, #1 - 8034f64: b29a uxth r2, r3 - 8034f66: 687b ldr r3, [r7, #4] - 8034f68: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 8034f8a: 687b ldr r3, [r7, #4] + 8034f8c: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034f90: b29b uxth r3, r3 + 8034f92: 3b01 subs r3, #1 + 8034f94: b29a uxth r2, r3 + 8034f96: 687b ldr r3, [r7, #4] + 8034f98: f8a3 205e strh.w r2, [r3, #94] ; 0x5e isrflags = READ_REG(huart->Instance->ISR); - 8034f6c: 687b ldr r3, [r7, #4] - 8034f6e: 681b ldr r3, [r3, #0] - 8034f70: 69db ldr r3, [r3, #28] - 8034f72: f8c7 309c str.w r3, [r7, #156] ; 0x9c + 8034f9c: 687b ldr r3, [r7, #4] + 8034f9e: 681b ldr r3, [r3, #0] + 8034fa0: 69db ldr r3, [r3, #28] + 8034fa2: f8c7 309c str.w r3, [r7, #156] ; 0x9c /* If some non blocking errors occurred */ if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U) - 8034f76: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8034f7a: f003 0307 and.w r3, r3, #7 - 8034f7e: 2b00 cmp r3, #0 - 8034f80: d053 beq.n 803502a + 8034fa6: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 8034faa: f003 0307 and.w r3, r3, #7 + 8034fae: 2b00 cmp r3, #0 + 8034fb0: d053 beq.n 803505a { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 8034f82: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8034f86: f003 0301 and.w r3, r3, #1 - 8034f8a: 2b00 cmp r3, #0 - 8034f8c: d011 beq.n 8034fb2 - 8034f8e: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034f92: f403 7380 and.w r3, r3, #256 ; 0x100 - 8034f96: 2b00 cmp r3, #0 - 8034f98: d00b beq.n 8034fb2 - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 8034f9a: 687b ldr r3, [r7, #4] - 8034f9c: 681b ldr r3, [r3, #0] - 8034f9e: 2201 movs r2, #1 - 8034fa0: 621a str r2, [r3, #32] - - huart->ErrorCode |= HAL_UART_ERROR_PE; - 8034fa2: 687b ldr r3, [r7, #4] - 8034fa4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034fa8: f043 0201 orr.w r2, r3, #1 - 8034fac: 687b ldr r3, [r7, #4] - 8034fae: f8c3 208c str.w r2, [r3, #140] ; 0x8c - } - - /* UART frame error interrupt occurred --------------------------------------*/ - if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8034fb2: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8034fb6: f003 0302 and.w r3, r3, #2 + 8034fb6: f003 0301 and.w r3, r3, #1 8034fba: 2b00 cmp r3, #0 - 8034fbc: d011 beq.n 8034fe2 - 8034fbe: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90 - 8034fc2: f003 0301 and.w r3, r3, #1 + 8034fbc: d011 beq.n 8034fe2 + 8034fbe: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8034fc2: f403 7380 and.w r3, r3, #256 ; 0x100 8034fc6: 2b00 cmp r3, #0 - 8034fc8: d00b beq.n 8034fe2 + 8034fc8: d00b beq.n 8034fe2 { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); 8034fca: 687b ldr r3, [r7, #4] 8034fcc: 681b ldr r3, [r3, #0] - 8034fce: 2202 movs r2, #2 + 8034fce: 2201 movs r2, #1 8034fd0: 621a str r2, [r3, #32] - huart->ErrorCode |= HAL_UART_ERROR_FE; + huart->ErrorCode |= HAL_UART_ERROR_PE; 8034fd2: 687b ldr r3, [r7, #4] 8034fd4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034fd8: f043 0204 orr.w r2, r3, #4 + 8034fd8: f043 0201 orr.w r2, r3, #1 8034fdc: 687b ldr r3, [r7, #4] 8034fde: f8c3 208c str.w r2, [r3, #140] ; 0x8c } - /* UART noise error interrupt occurred --------------------------------------*/ - if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + /* UART frame error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) 8034fe2: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8034fe6: f003 0304 and.w r3, r3, #4 + 8034fe6: f003 0302 and.w r3, r3, #2 8034fea: 2b00 cmp r3, #0 - 8034fec: d011 beq.n 8035012 + 8034fec: d011 beq.n 8035012 8034fee: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90 8034ff2: f003 0301 and.w r3, r3, #1 8034ff6: 2b00 cmp r3, #0 - 8034ff8: d00b beq.n 8035012 + 8034ff8: d00b beq.n 8035012 { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); 8034ffa: 687b ldr r3, [r7, #4] 8034ffc: 681b ldr r3, [r3, #0] - 8034ffe: 2204 movs r2, #4 + 8034ffe: 2202 movs r2, #2 8035000: 621a str r2, [r3, #32] - huart->ErrorCode |= HAL_UART_ERROR_NE; + huart->ErrorCode |= HAL_UART_ERROR_FE; 8035002: 687b ldr r3, [r7, #4] 8035004: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8035008: f043 0202 orr.w r2, r3, #2 + 8035008: f043 0204 orr.w r2, r3, #4 803500c: 687b ldr r3, [r7, #4] 803500e: f8c3 208c str.w r2, [r3, #140] ; 0x8c } + /* UART noise error interrupt occurred --------------------------------------*/ + if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) + 8035012: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 8035016: f003 0304 and.w r3, r3, #4 + 803501a: 2b00 cmp r3, #0 + 803501c: d011 beq.n 8035042 + 803501e: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90 + 8035022: f003 0301 and.w r3, r3, #1 + 8035026: 2b00 cmp r3, #0 + 8035028: d00b beq.n 8035042 + { + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); + 803502a: 687b ldr r3, [r7, #4] + 803502c: 681b ldr r3, [r3, #0] + 803502e: 2204 movs r2, #4 + 8035030: 621a str r2, [r3, #32] + + huart->ErrorCode |= HAL_UART_ERROR_NE; + 8035032: 687b ldr r3, [r7, #4] + 8035034: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8035038: f043 0202 orr.w r2, r3, #2 + 803503c: 687b ldr r3, [r7, #4] + 803503e: f8c3 208c str.w r2, [r3, #140] ; 0x8c + } + /* Call UART Error Call back function if need be ----------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8035012: 687b ldr r3, [r7, #4] - 8035014: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8035018: 2b00 cmp r3, #0 - 803501a: d006 beq.n 803502a + 8035042: 687b ldr r3, [r7, #4] + 8035044: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8035048: 2b00 cmp r3, #0 + 803504a: d006 beq.n 803505a #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 803501c: 6878 ldr r0, [r7, #4] - 803501e: f7fe faa5 bl 803356c + 803504c: 6878 ldr r0, [r7, #4] + 803504e: f7fe faa5 bl 803359c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8035022: 687b ldr r3, [r7, #4] - 8035024: 2200 movs r2, #0 - 8035026: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8035052: 687b ldr r3, [r7, #4] + 8035054: 2200 movs r2, #0 + 8035056: f8c3 208c str.w r2, [r3, #140] ; 0x8c } } if (huart->RxXferCount == 0U) - 803502a: 687b ldr r3, [r7, #4] - 803502c: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8035030: b29b uxth r3, r3 - 8035032: 2b00 cmp r3, #0 - 8035034: d173 bne.n 803511e + 803505a: 687b ldr r3, [r7, #4] + 803505c: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8035060: b29b uxth r3, r3 + 8035062: 2b00 cmp r3, #0 + 8035064: d173 bne.n 803514e { /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8035036: 687b ldr r3, [r7, #4] - 8035038: 681b ldr r3, [r3, #0] - 803503a: 663b str r3, [r7, #96] ; 0x60 + 8035066: 687b ldr r3, [r7, #4] + 8035068: 681b ldr r3, [r3, #0] + 803506a: 663b str r3, [r7, #96] ; 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803503c: 6e3b ldr r3, [r7, #96] ; 0x60 - 803503e: e853 3f00 ldrex r3, [r3] - 8035042: 65fb str r3, [r7, #92] ; 0x5c + 803506c: 6e3b ldr r3, [r7, #96] ; 0x60 + 803506e: e853 3f00 ldrex r3, [r3] + 8035072: 65fb str r3, [r7, #92] ; 0x5c return(result); - 8035044: 6dfb ldr r3, [r7, #92] ; 0x5c - 8035046: f423 7380 bic.w r3, r3, #256 ; 0x100 - 803504a: f8c7 3084 str.w r3, [r7, #132] ; 0x84 - 803504e: 687b ldr r3, [r7, #4] - 8035050: 681b ldr r3, [r3, #0] - 8035052: 461a mov r2, r3 - 8035054: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84 - 8035058: 66fb str r3, [r7, #108] ; 0x6c - 803505a: 66ba str r2, [r7, #104] ; 0x68 + 8035074: 6dfb ldr r3, [r7, #92] ; 0x5c + 8035076: f423 7380 bic.w r3, r3, #256 ; 0x100 + 803507a: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 803507e: 687b ldr r3, [r7, #4] + 8035080: 681b ldr r3, [r3, #0] + 8035082: 461a mov r2, r3 + 8035084: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84 + 8035088: 66fb str r3, [r7, #108] ; 0x6c + 803508a: 66ba str r2, [r7, #104] ; 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803505c: 6eb9 ldr r1, [r7, #104] ; 0x68 - 803505e: 6efa ldr r2, [r7, #108] ; 0x6c - 8035060: e841 2300 strex r3, r2, [r1] - 8035064: 667b str r3, [r7, #100] ; 0x64 + 803508c: 6eb9 ldr r1, [r7, #104] ; 0x68 + 803508e: 6efa ldr r2, [r7, #108] ; 0x6c + 8035090: e841 2300 strex r3, r2, [r1] + 8035094: 667b str r3, [r7, #100] ; 0x64 return(result); - 8035066: 6e7b ldr r3, [r7, #100] ; 0x64 - 8035068: 2b00 cmp r3, #0 - 803506a: d1e4 bne.n 8035036 + 8035096: 6e7b ldr r3, [r7, #100] ; 0x64 + 8035098: 2b00 cmp r3, #0 + 803509a: d1e4 bne.n 8035066 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 803506c: 687b ldr r3, [r7, #4] - 803506e: 681b ldr r3, [r3, #0] - 8035070: 3308 adds r3, #8 - 8035072: 64fb str r3, [r7, #76] ; 0x4c + 803509c: 687b ldr r3, [r7, #4] + 803509e: 681b ldr r3, [r3, #0] + 80350a0: 3308 adds r3, #8 + 80350a2: 64fb str r3, [r7, #76] ; 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8035074: 6cfb ldr r3, [r7, #76] ; 0x4c - 8035076: e853 3f00 ldrex r3, [r3] - 803507a: 64bb str r3, [r7, #72] ; 0x48 + 80350a4: 6cfb ldr r3, [r7, #76] ; 0x4c + 80350a6: e853 3f00 ldrex r3, [r3] + 80350aa: 64bb str r3, [r7, #72] ; 0x48 return(result); - 803507c: 6cba ldr r2, [r7, #72] ; 0x48 - 803507e: 4b57 ldr r3, [pc, #348] ; (80351dc ) - 8035080: 4013 ands r3, r2 - 8035082: f8c7 3080 str.w r3, [r7, #128] ; 0x80 - 8035086: 687b ldr r3, [r7, #4] - 8035088: 681b ldr r3, [r3, #0] - 803508a: 3308 adds r3, #8 - 803508c: f8d7 2080 ldr.w r2, [r7, #128] ; 0x80 - 8035090: 65ba str r2, [r7, #88] ; 0x58 - 8035092: 657b str r3, [r7, #84] ; 0x54 + 80350ac: 6cba ldr r2, [r7, #72] ; 0x48 + 80350ae: 4b57 ldr r3, [pc, #348] ; (803520c ) + 80350b0: 4013 ands r3, r2 + 80350b2: f8c7 3080 str.w r3, [r7, #128] ; 0x80 + 80350b6: 687b ldr r3, [r7, #4] + 80350b8: 681b ldr r3, [r3, #0] + 80350ba: 3308 adds r3, #8 + 80350bc: f8d7 2080 ldr.w r2, [r7, #128] ; 0x80 + 80350c0: 65ba str r2, [r7, #88] ; 0x58 + 80350c2: 657b str r3, [r7, #84] ; 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8035094: 6d79 ldr r1, [r7, #84] ; 0x54 - 8035096: 6dba ldr r2, [r7, #88] ; 0x58 - 8035098: e841 2300 strex r3, r2, [r1] - 803509c: 653b str r3, [r7, #80] ; 0x50 + 80350c4: 6d79 ldr r1, [r7, #84] ; 0x54 + 80350c6: 6dba ldr r2, [r7, #88] ; 0x58 + 80350c8: e841 2300 strex r3, r2, [r1] + 80350cc: 653b str r3, [r7, #80] ; 0x50 return(result); - 803509e: 6d3b ldr r3, [r7, #80] ; 0x50 - 80350a0: 2b00 cmp r3, #0 - 80350a2: d1e3 bne.n 803506c + 80350ce: 6d3b ldr r3, [r7, #80] ; 0x50 + 80350d0: 2b00 cmp r3, #0 + 80350d2: d1e3 bne.n 803509c /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 80350a4: 687b ldr r3, [r7, #4] - 80350a6: 2220 movs r2, #32 - 80350a8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 80350d4: 687b ldr r3, [r7, #4] + 80350d6: 2220 movs r2, #32 + 80350d8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 80350ac: 687b ldr r3, [r7, #4] - 80350ae: 2200 movs r2, #0 - 80350b0: 671a str r2, [r3, #112] ; 0x70 + 80350dc: 687b ldr r3, [r7, #4] + 80350de: 2200 movs r2, #0 + 80350e0: 671a str r2, [r3, #112] ; 0x70 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80350b2: 687b ldr r3, [r7, #4] - 80350b4: 6edb ldr r3, [r3, #108] ; 0x6c - 80350b6: 2b01 cmp r3, #1 - 80350b8: d12e bne.n 8035118 + 80350e2: 687b ldr r3, [r7, #4] + 80350e4: 6edb ldr r3, [r3, #108] ; 0x6c + 80350e6: 2b01 cmp r3, #1 + 80350e8: d12e bne.n 8035148 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80350ba: 687b ldr r3, [r7, #4] - 80350bc: 2200 movs r2, #0 - 80350be: 66da str r2, [r3, #108] ; 0x6c + 80350ea: 687b ldr r3, [r7, #4] + 80350ec: 2200 movs r2, #0 + 80350ee: 66da str r2, [r3, #108] ; 0x6c /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 80350c0: 687b ldr r3, [r7, #4] - 80350c2: 681b ldr r3, [r3, #0] - 80350c4: 63bb str r3, [r7, #56] ; 0x38 + 80350f0: 687b ldr r3, [r7, #4] + 80350f2: 681b ldr r3, [r3, #0] + 80350f4: 63bb str r3, [r7, #56] ; 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80350c6: 6bbb ldr r3, [r7, #56] ; 0x38 - 80350c8: e853 3f00 ldrex r3, [r3] - 80350cc: 637b str r3, [r7, #52] ; 0x34 + 80350f6: 6bbb ldr r3, [r7, #56] ; 0x38 + 80350f8: e853 3f00 ldrex r3, [r3] + 80350fc: 637b str r3, [r7, #52] ; 0x34 return(result); - 80350ce: 6b7b ldr r3, [r7, #52] ; 0x34 - 80350d0: f023 0310 bic.w r3, r3, #16 - 80350d4: 67fb str r3, [r7, #124] ; 0x7c - 80350d6: 687b ldr r3, [r7, #4] - 80350d8: 681b ldr r3, [r3, #0] - 80350da: 461a mov r2, r3 - 80350dc: 6ffb ldr r3, [r7, #124] ; 0x7c - 80350de: 647b str r3, [r7, #68] ; 0x44 - 80350e0: 643a str r2, [r7, #64] ; 0x40 + 80350fe: 6b7b ldr r3, [r7, #52] ; 0x34 + 8035100: f023 0310 bic.w r3, r3, #16 + 8035104: 67fb str r3, [r7, #124] ; 0x7c + 8035106: 687b ldr r3, [r7, #4] + 8035108: 681b ldr r3, [r3, #0] + 803510a: 461a mov r2, r3 + 803510c: 6ffb ldr r3, [r7, #124] ; 0x7c + 803510e: 647b str r3, [r7, #68] ; 0x44 + 8035110: 643a str r2, [r7, #64] ; 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80350e2: 6c39 ldr r1, [r7, #64] ; 0x40 - 80350e4: 6c7a ldr r2, [r7, #68] ; 0x44 - 80350e6: e841 2300 strex r3, r2, [r1] - 80350ea: 63fb str r3, [r7, #60] ; 0x3c + 8035112: 6c39 ldr r1, [r7, #64] ; 0x40 + 8035114: 6c7a ldr r2, [r7, #68] ; 0x44 + 8035116: e841 2300 strex r3, r2, [r1] + 803511a: 63fb str r3, [r7, #60] ; 0x3c return(result); - 80350ec: 6bfb ldr r3, [r7, #60] ; 0x3c - 80350ee: 2b00 cmp r3, #0 - 80350f0: d1e6 bne.n 80350c0 + 803511c: 6bfb ldr r3, [r7, #60] ; 0x3c + 803511e: 2b00 cmp r3, #0 + 8035120: d1e6 bne.n 80350f0 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) - 80350f2: 687b ldr r3, [r7, #4] - 80350f4: 681b ldr r3, [r3, #0] - 80350f6: 69db ldr r3, [r3, #28] - 80350f8: f003 0310 and.w r3, r3, #16 - 80350fc: 2b10 cmp r3, #16 - 80350fe: d103 bne.n 8035108 + 8035122: 687b ldr r3, [r7, #4] + 8035124: 681b ldr r3, [r3, #0] + 8035126: 69db ldr r3, [r3, #28] + 8035128: f003 0310 and.w r3, r3, #16 + 803512c: 2b10 cmp r3, #16 + 803512e: d103 bne.n 8035138 { /* Clear IDLE Flag */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8035100: 687b ldr r3, [r7, #4] - 8035102: 681b ldr r3, [r3, #0] - 8035104: 2210 movs r2, #16 - 8035106: 621a str r2, [r3, #32] + 8035130: 687b ldr r3, [r7, #4] + 8035132: 681b ldr r3, [r3, #0] + 8035134: 2210 movs r2, #16 + 8035136: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8035108: 687b ldr r3, [r7, #4] - 803510a: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 803510e: 4619 mov r1, r3 - 8035110: 6878 ldr r0, [r7, #4] - 8035112: f7fe fa35 bl 8033580 - 8035116: e002 b.n 803511e + 8035138: 687b ldr r3, [r7, #4] + 803513a: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 803513e: 4619 mov r1, r3 + 8035140: 6878 ldr r0, [r7, #4] + 8035142: f7fe fa35 bl 80335b0 + 8035146: e002 b.n 803514e #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 8035118: 6878 ldr r0, [r7, #4] - 803511a: f7ec fce9 bl 8021af0 + 8035148: 6878 ldr r0, [r7, #4] + 803514a: f7ec fcd1 bl 8021af0 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) - 803511e: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e - 8035122: 2b00 cmp r3, #0 - 8035124: d006 beq.n 8035134 - 8035126: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 803512a: f003 0320 and.w r3, r3, #32 - 803512e: 2b00 cmp r3, #0 - 8035130: f47f aefc bne.w 8034f2c + 803514e: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e + 8035152: 2b00 cmp r3, #0 + 8035154: d006 beq.n 8035164 + 8035156: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 803515a: f003 0320 and.w r3, r3, #32 + 803515e: 2b00 cmp r3, #0 + 8035160: f47f aefc bne.w 8034f5c /* When remaining number of bytes to receive is less than the RX FIFO threshold, next incoming frames are processed as if FIFO mode was disabled (i.e. one interrupt per received frame). */ rxdatacount = huart->RxXferCount; - 8035134: 687b ldr r3, [r7, #4] - 8035136: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 803513a: f8a7 307a strh.w r3, [r7, #122] ; 0x7a + 8035164: 687b ldr r3, [r7, #4] + 8035166: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 803516a: f8a7 307a strh.w r3, [r7, #122] ; 0x7a if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess)) - 803513e: f8b7 307a ldrh.w r3, [r7, #122] ; 0x7a - 8035142: 2b00 cmp r3, #0 - 8035144: d045 beq.n 80351d2 - 8035146: 687b ldr r3, [r7, #4] - 8035148: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 803514c: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a - 8035150: 429a cmp r2, r3 - 8035152: d23e bcs.n 80351d2 + 803516e: f8b7 307a ldrh.w r3, [r7, #122] ; 0x7a + 8035172: 2b00 cmp r3, #0 + 8035174: d045 beq.n 8035202 + 8035176: 687b ldr r3, [r7, #4] + 8035178: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 803517c: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a + 8035180: 429a cmp r2, r3 + 8035182: d23e bcs.n 8035202 { /* Disable the UART RXFT interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - 8035154: 687b ldr r3, [r7, #4] - 8035156: 681b ldr r3, [r3, #0] - 8035158: 3308 adds r3, #8 - 803515a: 627b str r3, [r7, #36] ; 0x24 + 8035184: 687b ldr r3, [r7, #4] + 8035186: 681b ldr r3, [r3, #0] + 8035188: 3308 adds r3, #8 + 803518a: 627b str r3, [r7, #36] ; 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803515c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803515e: e853 3f00 ldrex r3, [r3] - 8035162: 623b str r3, [r7, #32] + 803518c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803518e: e853 3f00 ldrex r3, [r3] + 8035192: 623b str r3, [r7, #32] return(result); - 8035164: 6a3b ldr r3, [r7, #32] - 8035166: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 803516a: 677b str r3, [r7, #116] ; 0x74 - 803516c: 687b ldr r3, [r7, #4] - 803516e: 681b ldr r3, [r3, #0] - 8035170: 3308 adds r3, #8 - 8035172: 6f7a ldr r2, [r7, #116] ; 0x74 - 8035174: 633a str r2, [r7, #48] ; 0x30 - 8035176: 62fb str r3, [r7, #44] ; 0x2c + 8035194: 6a3b ldr r3, [r7, #32] + 8035196: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 803519a: 677b str r3, [r7, #116] ; 0x74 + 803519c: 687b ldr r3, [r7, #4] + 803519e: 681b ldr r3, [r3, #0] + 80351a0: 3308 adds r3, #8 + 80351a2: 6f7a ldr r2, [r7, #116] ; 0x74 + 80351a4: 633a str r2, [r7, #48] ; 0x30 + 80351a6: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8035178: 6af9 ldr r1, [r7, #44] ; 0x2c - 803517a: 6b3a ldr r2, [r7, #48] ; 0x30 - 803517c: e841 2300 strex r3, r2, [r1] - 8035180: 62bb str r3, [r7, #40] ; 0x28 + 80351a8: 6af9 ldr r1, [r7, #44] ; 0x2c + 80351aa: 6b3a ldr r2, [r7, #48] ; 0x30 + 80351ac: e841 2300 strex r3, r2, [r1] + 80351b0: 62bb str r3, [r7, #40] ; 0x28 return(result); - 8035182: 6abb ldr r3, [r7, #40] ; 0x28 - 8035184: 2b00 cmp r3, #0 - 8035186: d1e5 bne.n 8035154 + 80351b2: 6abb ldr r3, [r7, #40] ; 0x28 + 80351b4: 2b00 cmp r3, #0 + 80351b6: d1e5 bne.n 8035184 /* Update the RxISR function pointer */ huart->RxISR = UART_RxISR_16BIT; - 8035188: 687b ldr r3, [r7, #4] - 803518a: 4a15 ldr r2, [pc, #84] ; (80351e0 ) - 803518c: 671a str r2, [r3, #112] ; 0x70 + 80351b8: 687b ldr r3, [r7, #4] + 80351ba: 4a15 ldr r2, [pc, #84] ; (8035210 ) + 80351bc: 671a str r2, [r3, #112] ; 0x70 /* Enable the UART Data Register Not Empty interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - 803518e: 687b ldr r3, [r7, #4] - 8035190: 681b ldr r3, [r3, #0] - 8035192: 613b str r3, [r7, #16] + 80351be: 687b ldr r3, [r7, #4] + 80351c0: 681b ldr r3, [r3, #0] + 80351c2: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8035194: 693b ldr r3, [r7, #16] - 8035196: e853 3f00 ldrex r3, [r3] - 803519a: 60fb str r3, [r7, #12] + 80351c4: 693b ldr r3, [r7, #16] + 80351c6: e853 3f00 ldrex r3, [r3] + 80351ca: 60fb str r3, [r7, #12] return(result); - 803519c: 68fb ldr r3, [r7, #12] - 803519e: f043 0320 orr.w r3, r3, #32 - 80351a2: 673b str r3, [r7, #112] ; 0x70 - 80351a4: 687b ldr r3, [r7, #4] - 80351a6: 681b ldr r3, [r3, #0] - 80351a8: 461a mov r2, r3 - 80351aa: 6f3b ldr r3, [r7, #112] ; 0x70 - 80351ac: 61fb str r3, [r7, #28] - 80351ae: 61ba str r2, [r7, #24] + 80351cc: 68fb ldr r3, [r7, #12] + 80351ce: f043 0320 orr.w r3, r3, #32 + 80351d2: 673b str r3, [r7, #112] ; 0x70 + 80351d4: 687b ldr r3, [r7, #4] + 80351d6: 681b ldr r3, [r3, #0] + 80351d8: 461a mov r2, r3 + 80351da: 6f3b ldr r3, [r7, #112] ; 0x70 + 80351dc: 61fb str r3, [r7, #28] + 80351de: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80351b0: 69b9 ldr r1, [r7, #24] - 80351b2: 69fa ldr r2, [r7, #28] - 80351b4: e841 2300 strex r3, r2, [r1] - 80351b8: 617b str r3, [r7, #20] + 80351e0: 69b9 ldr r1, [r7, #24] + 80351e2: 69fa ldr r2, [r7, #28] + 80351e4: e841 2300 strex r3, r2, [r1] + 80351e8: 617b str r3, [r7, #20] return(result); - 80351ba: 697b ldr r3, [r7, #20] - 80351bc: 2b00 cmp r3, #0 - 80351be: d1e6 bne.n 803518e + 80351ea: 697b ldr r3, [r7, #20] + 80351ec: 2b00 cmp r3, #0 + 80351ee: d1e6 bne.n 80351be else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 80351c0: e007 b.n 80351d2 + 80351f0: e007 b.n 8035202 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 80351c2: 687b ldr r3, [r7, #4] - 80351c4: 681b ldr r3, [r3, #0] - 80351c6: 699a ldr r2, [r3, #24] - 80351c8: 687b ldr r3, [r7, #4] - 80351ca: 681b ldr r3, [r3, #0] - 80351cc: f042 0208 orr.w r2, r2, #8 - 80351d0: 619a str r2, [r3, #24] -} - 80351d2: bf00 nop - 80351d4: 37a0 adds r7, #160 ; 0xa0 - 80351d6: 46bd mov sp, r7 - 80351d8: bd80 pop {r7, pc} - 80351da: bf00 nop - 80351dc: effffffe .word 0xeffffffe - 80351e0: 08034a8d .word 0x08034a8d - -080351e4 : + 80351f2: 687b ldr r3, [r7, #4] + 80351f4: 681b ldr r3, [r3, #0] + 80351f6: 699a ldr r2, [r3, #24] + 80351f8: 687b ldr r3, [r7, #4] + 80351fa: 681b ldr r3, [r3, #0] + 80351fc: f042 0208 orr.w r2, r2, #8 + 8035200: 619a str r2, [r3, #24] +} + 8035202: bf00 nop + 8035204: 37a0 adds r7, #160 ; 0xa0 + 8035206: 46bd mov sp, r7 + 8035208: bd80 pop {r7, pc} + 803520a: bf00 nop + 803520c: effffffe .word 0xeffffffe + 8035210: 08034abd .word 0x08034abd + +08035214 : * @brief UART wakeup from Stop mode callback. * @param huart UART handle. * @retval None */ __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) { - 80351e4: b480 push {r7} - 80351e6: b083 sub sp, #12 - 80351e8: af00 add r7, sp, #0 - 80351ea: 6078 str r0, [r7, #4] + 8035214: b480 push {r7} + 8035216: b083 sub sp, #12 + 8035218: af00 add r7, sp, #0 + 803521a: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_WakeupCallback can be implemented in the user file. */ } - 80351ec: bf00 nop - 80351ee: 370c adds r7, #12 - 80351f0: 46bd mov sp, r7 - 80351f2: f85d 7b04 ldr.w r7, [sp], #4 - 80351f6: 4770 bx lr + 803521c: bf00 nop + 803521e: 370c adds r7, #12 + 8035220: 46bd mov sp, r7 + 8035222: f85d 7b04 ldr.w r7, [sp], #4 + 8035226: 4770 bx lr -080351f8 : +08035228 : * @brief UART RX Fifo full callback. * @param huart UART handle. * @retval None */ __weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart) { - 80351f8: b480 push {r7} - 80351fa: b083 sub sp, #12 - 80351fc: af00 add r7, sp, #0 - 80351fe: 6078 str r0, [r7, #4] + 8035228: b480 push {r7} + 803522a: b083 sub sp, #12 + 803522c: af00 add r7, sp, #0 + 803522e: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file. */ } - 8035200: bf00 nop - 8035202: 370c adds r7, #12 - 8035204: 46bd mov sp, r7 - 8035206: f85d 7b04 ldr.w r7, [sp], #4 - 803520a: 4770 bx lr + 8035230: bf00 nop + 8035232: 370c adds r7, #12 + 8035234: 46bd mov sp, r7 + 8035236: f85d 7b04 ldr.w r7, [sp], #4 + 803523a: 4770 bx lr -0803520c : +0803523c : * @brief UART TX Fifo empty callback. * @param huart UART handle. * @retval None */ __weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart) { - 803520c: b480 push {r7} - 803520e: b083 sub sp, #12 - 8035210: af00 add r7, sp, #0 - 8035212: 6078 str r0, [r7, #4] + 803523c: b480 push {r7} + 803523e: b083 sub sp, #12 + 8035240: af00 add r7, sp, #0 + 8035242: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file. */ } - 8035214: bf00 nop - 8035216: 370c adds r7, #12 - 8035218: 46bd mov sp, r7 - 803521a: f85d 7b04 ldr.w r7, [sp], #4 - 803521e: 4770 bx lr + 8035244: bf00 nop + 8035246: 370c adds r7, #12 + 8035248: 46bd mov sp, r7 + 803524a: f85d 7b04 ldr.w r7, [sp], #4 + 803524e: 4770 bx lr -08035220 : +08035250 : * @brief Disable the FIFO mode. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart) { - 8035220: b480 push {r7} - 8035222: b085 sub sp, #20 - 8035224: af00 add r7, sp, #0 - 8035226: 6078 str r0, [r7, #4] + 8035250: b480 push {r7} + 8035252: b085 sub sp, #20 + 8035254: af00 add r7, sp, #0 + 8035256: 6078 str r0, [r7, #4] /* Check parameters */ assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); /* Process Locked */ __HAL_LOCK(huart); - 8035228: 687b ldr r3, [r7, #4] - 803522a: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 803522e: 2b01 cmp r3, #1 - 8035230: d101 bne.n 8035236 - 8035232: 2302 movs r3, #2 - 8035234: e027 b.n 8035286 - 8035236: 687b ldr r3, [r7, #4] - 8035238: 2201 movs r2, #1 - 803523a: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8035258: 687b ldr r3, [r7, #4] + 803525a: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 803525e: 2b01 cmp r3, #1 + 8035260: d101 bne.n 8035266 + 8035262: 2302 movs r3, #2 + 8035264: e027 b.n 80352b6 + 8035266: 687b ldr r3, [r7, #4] + 8035268: 2201 movs r2, #1 + 803526a: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->gState = HAL_UART_STATE_BUSY; - 803523e: 687b ldr r3, [r7, #4] - 8035240: 2224 movs r2, #36 ; 0x24 - 8035242: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 803526e: 687b ldr r3, [r7, #4] + 8035270: 2224 movs r2, #36 ; 0x24 + 8035272: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Save actual UART configuration */ tmpcr1 = READ_REG(huart->Instance->CR1); - 8035246: 687b ldr r3, [r7, #4] - 8035248: 681b ldr r3, [r3, #0] - 803524a: 681b ldr r3, [r3, #0] - 803524c: 60fb str r3, [r7, #12] + 8035276: 687b ldr r3, [r7, #4] + 8035278: 681b ldr r3, [r3, #0] + 803527a: 681b ldr r3, [r3, #0] + 803527c: 60fb str r3, [r7, #12] /* Disable UART */ __HAL_UART_DISABLE(huart); - 803524e: 687b ldr r3, [r7, #4] - 8035250: 681b ldr r3, [r3, #0] - 8035252: 681a ldr r2, [r3, #0] - 8035254: 687b ldr r3, [r7, #4] - 8035256: 681b ldr r3, [r3, #0] - 8035258: f022 0201 bic.w r2, r2, #1 - 803525c: 601a str r2, [r3, #0] + 803527e: 687b ldr r3, [r7, #4] + 8035280: 681b ldr r3, [r3, #0] + 8035282: 681a ldr r2, [r3, #0] + 8035284: 687b ldr r3, [r7, #4] + 8035286: 681b ldr r3, [r3, #0] + 8035288: f022 0201 bic.w r2, r2, #1 + 803528c: 601a str r2, [r3, #0] /* Enable FIFO mode */ CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); - 803525e: 68fb ldr r3, [r7, #12] - 8035260: f023 5300 bic.w r3, r3, #536870912 ; 0x20000000 - 8035264: 60fb str r3, [r7, #12] + 803528e: 68fb ldr r3, [r7, #12] + 8035290: f023 5300 bic.w r3, r3, #536870912 ; 0x20000000 + 8035294: 60fb str r3, [r7, #12] huart->FifoMode = UART_FIFOMODE_DISABLE; - 8035266: 687b ldr r3, [r7, #4] - 8035268: 2200 movs r2, #0 - 803526a: 665a str r2, [r3, #100] ; 0x64 + 8035296: 687b ldr r3, [r7, #4] + 8035298: 2200 movs r2, #0 + 803529a: 665a str r2, [r3, #100] ; 0x64 /* Restore UART configuration */ WRITE_REG(huart->Instance->CR1, tmpcr1); - 803526c: 687b ldr r3, [r7, #4] - 803526e: 681b ldr r3, [r3, #0] - 8035270: 68fa ldr r2, [r7, #12] - 8035272: 601a str r2, [r3, #0] + 803529c: 687b ldr r3, [r7, #4] + 803529e: 681b ldr r3, [r3, #0] + 80352a0: 68fa ldr r2, [r7, #12] + 80352a2: 601a str r2, [r3, #0] huart->gState = HAL_UART_STATE_READY; - 8035274: 687b ldr r3, [r7, #4] - 8035276: 2220 movs r2, #32 - 8035278: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80352a4: 687b ldr r3, [r7, #4] + 80352a6: 2220 movs r2, #32 + 80352a8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); - 803527c: 687b ldr r3, [r7, #4] - 803527e: 2200 movs r2, #0 - 8035280: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80352ac: 687b ldr r3, [r7, #4] + 80352ae: 2200 movs r2, #0 + 80352b0: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_OK; - 8035284: 2300 movs r3, #0 + 80352b4: 2300 movs r3, #0 } - 8035286: 4618 mov r0, r3 - 8035288: 3714 adds r7, #20 - 803528a: 46bd mov sp, r7 - 803528c: f85d 7b04 ldr.w r7, [sp], #4 - 8035290: 4770 bx lr + 80352b6: 4618 mov r0, r3 + 80352b8: 3714 adds r7, #20 + 80352ba: 46bd mov sp, r7 + 80352bc: f85d 7b04 ldr.w r7, [sp], #4 + 80352c0: 4770 bx lr -08035292 : +080352c2 : * @arg @ref UART_TXFIFO_THRESHOLD_7_8 * @arg @ref UART_TXFIFO_THRESHOLD_8_8 * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) { - 8035292: b580 push {r7, lr} - 8035294: b084 sub sp, #16 - 8035296: af00 add r7, sp, #0 - 8035298: 6078 str r0, [r7, #4] - 803529a: 6039 str r1, [r7, #0] + 80352c2: b580 push {r7, lr} + 80352c4: b084 sub sp, #16 + 80352c6: af00 add r7, sp, #0 + 80352c8: 6078 str r0, [r7, #4] + 80352ca: 6039 str r1, [r7, #0] /* Check parameters */ assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold)); /* Process Locked */ __HAL_LOCK(huart); - 803529c: 687b ldr r3, [r7, #4] - 803529e: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 80352a2: 2b01 cmp r3, #1 - 80352a4: d101 bne.n 80352aa - 80352a6: 2302 movs r3, #2 - 80352a8: e02d b.n 8035306 - 80352aa: 687b ldr r3, [r7, #4] - 80352ac: 2201 movs r2, #1 - 80352ae: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80352cc: 687b ldr r3, [r7, #4] + 80352ce: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 80352d2: 2b01 cmp r3, #1 + 80352d4: d101 bne.n 80352da + 80352d6: 2302 movs r3, #2 + 80352d8: e02d b.n 8035336 + 80352da: 687b ldr r3, [r7, #4] + 80352dc: 2201 movs r2, #1 + 80352de: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->gState = HAL_UART_STATE_BUSY; - 80352b2: 687b ldr r3, [r7, #4] - 80352b4: 2224 movs r2, #36 ; 0x24 - 80352b6: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80352e2: 687b ldr r3, [r7, #4] + 80352e4: 2224 movs r2, #36 ; 0x24 + 80352e6: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Save actual UART configuration */ tmpcr1 = READ_REG(huart->Instance->CR1); - 80352ba: 687b ldr r3, [r7, #4] - 80352bc: 681b ldr r3, [r3, #0] - 80352be: 681b ldr r3, [r3, #0] - 80352c0: 60fb str r3, [r7, #12] + 80352ea: 687b ldr r3, [r7, #4] + 80352ec: 681b ldr r3, [r3, #0] + 80352ee: 681b ldr r3, [r3, #0] + 80352f0: 60fb str r3, [r7, #12] /* Disable UART */ __HAL_UART_DISABLE(huart); - 80352c2: 687b ldr r3, [r7, #4] - 80352c4: 681b ldr r3, [r3, #0] - 80352c6: 681a ldr r2, [r3, #0] - 80352c8: 687b ldr r3, [r7, #4] - 80352ca: 681b ldr r3, [r3, #0] - 80352cc: f022 0201 bic.w r2, r2, #1 - 80352d0: 601a str r2, [r3, #0] + 80352f2: 687b ldr r3, [r7, #4] + 80352f4: 681b ldr r3, [r3, #0] + 80352f6: 681a ldr r2, [r3, #0] + 80352f8: 687b ldr r3, [r7, #4] + 80352fa: 681b ldr r3, [r3, #0] + 80352fc: f022 0201 bic.w r2, r2, #1 + 8035300: 601a str r2, [r3, #0] /* Update TX threshold configuration */ MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); - 80352d2: 687b ldr r3, [r7, #4] - 80352d4: 681b ldr r3, [r3, #0] - 80352d6: 689b ldr r3, [r3, #8] - 80352d8: f023 4160 bic.w r1, r3, #3758096384 ; 0xe0000000 - 80352dc: 687b ldr r3, [r7, #4] - 80352de: 681b ldr r3, [r3, #0] - 80352e0: 683a ldr r2, [r7, #0] - 80352e2: 430a orrs r2, r1 - 80352e4: 609a str r2, [r3, #8] + 8035302: 687b ldr r3, [r7, #4] + 8035304: 681b ldr r3, [r3, #0] + 8035306: 689b ldr r3, [r3, #8] + 8035308: f023 4160 bic.w r1, r3, #3758096384 ; 0xe0000000 + 803530c: 687b ldr r3, [r7, #4] + 803530e: 681b ldr r3, [r3, #0] + 8035310: 683a ldr r2, [r7, #0] + 8035312: 430a orrs r2, r1 + 8035314: 609a str r2, [r3, #8] /* Determine the number of data to process during RX/TX ISR execution */ UARTEx_SetNbDataToProcess(huart); - 80352e6: 6878 ldr r0, [r7, #4] - 80352e8: f000 f850 bl 803538c + 8035316: 6878 ldr r0, [r7, #4] + 8035318: f000 f850 bl 80353bc /* Restore UART configuration */ WRITE_REG(huart->Instance->CR1, tmpcr1); - 80352ec: 687b ldr r3, [r7, #4] - 80352ee: 681b ldr r3, [r3, #0] - 80352f0: 68fa ldr r2, [r7, #12] - 80352f2: 601a str r2, [r3, #0] + 803531c: 687b ldr r3, [r7, #4] + 803531e: 681b ldr r3, [r3, #0] + 8035320: 68fa ldr r2, [r7, #12] + 8035322: 601a str r2, [r3, #0] huart->gState = HAL_UART_STATE_READY; - 80352f4: 687b ldr r3, [r7, #4] - 80352f6: 2220 movs r2, #32 - 80352f8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8035324: 687b ldr r3, [r7, #4] + 8035326: 2220 movs r2, #32 + 8035328: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); - 80352fc: 687b ldr r3, [r7, #4] - 80352fe: 2200 movs r2, #0 - 8035300: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 803532c: 687b ldr r3, [r7, #4] + 803532e: 2200 movs r2, #0 + 8035330: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_OK; - 8035304: 2300 movs r3, #0 + 8035334: 2300 movs r3, #0 } - 8035306: 4618 mov r0, r3 - 8035308: 3710 adds r7, #16 - 803530a: 46bd mov sp, r7 - 803530c: bd80 pop {r7, pc} + 8035336: 4618 mov r0, r3 + 8035338: 3710 adds r7, #16 + 803533a: 46bd mov sp, r7 + 803533c: bd80 pop {r7, pc} -0803530e : +0803533e : * @arg @ref UART_RXFIFO_THRESHOLD_7_8 * @arg @ref UART_RXFIFO_THRESHOLD_8_8 * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) { - 803530e: b580 push {r7, lr} - 8035310: b084 sub sp, #16 - 8035312: af00 add r7, sp, #0 - 8035314: 6078 str r0, [r7, #4] - 8035316: 6039 str r1, [r7, #0] + 803533e: b580 push {r7, lr} + 8035340: b084 sub sp, #16 + 8035342: af00 add r7, sp, #0 + 8035344: 6078 str r0, [r7, #4] + 8035346: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold)); /* Process Locked */ __HAL_LOCK(huart); - 8035318: 687b ldr r3, [r7, #4] - 803531a: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 803531e: 2b01 cmp r3, #1 - 8035320: d101 bne.n 8035326 - 8035322: 2302 movs r3, #2 - 8035324: e02d b.n 8035382 - 8035326: 687b ldr r3, [r7, #4] - 8035328: 2201 movs r2, #1 - 803532a: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8035348: 687b ldr r3, [r7, #4] + 803534a: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 803534e: 2b01 cmp r3, #1 + 8035350: d101 bne.n 8035356 + 8035352: 2302 movs r3, #2 + 8035354: e02d b.n 80353b2 + 8035356: 687b ldr r3, [r7, #4] + 8035358: 2201 movs r2, #1 + 803535a: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->gState = HAL_UART_STATE_BUSY; - 803532e: 687b ldr r3, [r7, #4] - 8035330: 2224 movs r2, #36 ; 0x24 - 8035332: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 803535e: 687b ldr r3, [r7, #4] + 8035360: 2224 movs r2, #36 ; 0x24 + 8035362: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Save actual UART configuration */ tmpcr1 = READ_REG(huart->Instance->CR1); - 8035336: 687b ldr r3, [r7, #4] - 8035338: 681b ldr r3, [r3, #0] - 803533a: 681b ldr r3, [r3, #0] - 803533c: 60fb str r3, [r7, #12] + 8035366: 687b ldr r3, [r7, #4] + 8035368: 681b ldr r3, [r3, #0] + 803536a: 681b ldr r3, [r3, #0] + 803536c: 60fb str r3, [r7, #12] /* Disable UART */ __HAL_UART_DISABLE(huart); - 803533e: 687b ldr r3, [r7, #4] - 8035340: 681b ldr r3, [r3, #0] - 8035342: 681a ldr r2, [r3, #0] - 8035344: 687b ldr r3, [r7, #4] - 8035346: 681b ldr r3, [r3, #0] - 8035348: f022 0201 bic.w r2, r2, #1 - 803534c: 601a str r2, [r3, #0] + 803536e: 687b ldr r3, [r7, #4] + 8035370: 681b ldr r3, [r3, #0] + 8035372: 681a ldr r2, [r3, #0] + 8035374: 687b ldr r3, [r7, #4] + 8035376: 681b ldr r3, [r3, #0] + 8035378: f022 0201 bic.w r2, r2, #1 + 803537c: 601a str r2, [r3, #0] /* Update RX threshold configuration */ MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); - 803534e: 687b ldr r3, [r7, #4] - 8035350: 681b ldr r3, [r3, #0] - 8035352: 689b ldr r3, [r3, #8] - 8035354: f023 6160 bic.w r1, r3, #234881024 ; 0xe000000 - 8035358: 687b ldr r3, [r7, #4] - 803535a: 681b ldr r3, [r3, #0] - 803535c: 683a ldr r2, [r7, #0] - 803535e: 430a orrs r2, r1 - 8035360: 609a str r2, [r3, #8] + 803537e: 687b ldr r3, [r7, #4] + 8035380: 681b ldr r3, [r3, #0] + 8035382: 689b ldr r3, [r3, #8] + 8035384: f023 6160 bic.w r1, r3, #234881024 ; 0xe000000 + 8035388: 687b ldr r3, [r7, #4] + 803538a: 681b ldr r3, [r3, #0] + 803538c: 683a ldr r2, [r7, #0] + 803538e: 430a orrs r2, r1 + 8035390: 609a str r2, [r3, #8] /* Determine the number of data to process during RX/TX ISR execution */ UARTEx_SetNbDataToProcess(huart); - 8035362: 6878 ldr r0, [r7, #4] - 8035364: f000 f812 bl 803538c + 8035392: 6878 ldr r0, [r7, #4] + 8035394: f000 f812 bl 80353bc /* Restore UART configuration */ WRITE_REG(huart->Instance->CR1, tmpcr1); - 8035368: 687b ldr r3, [r7, #4] - 803536a: 681b ldr r3, [r3, #0] - 803536c: 68fa ldr r2, [r7, #12] - 803536e: 601a str r2, [r3, #0] + 8035398: 687b ldr r3, [r7, #4] + 803539a: 681b ldr r3, [r3, #0] + 803539c: 68fa ldr r2, [r7, #12] + 803539e: 601a str r2, [r3, #0] huart->gState = HAL_UART_STATE_READY; - 8035370: 687b ldr r3, [r7, #4] - 8035372: 2220 movs r2, #32 - 8035374: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80353a0: 687b ldr r3, [r7, #4] + 80353a2: 2220 movs r2, #32 + 80353a4: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); - 8035378: 687b ldr r3, [r7, #4] - 803537a: 2200 movs r2, #0 - 803537c: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80353a8: 687b ldr r3, [r7, #4] + 80353aa: 2200 movs r2, #0 + 80353ac: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_OK; - 8035380: 2300 movs r3, #0 + 80353b0: 2300 movs r3, #0 } - 8035382: 4618 mov r0, r3 - 8035384: 3710 adds r7, #16 - 8035386: 46bd mov sp, r7 - 8035388: bd80 pop {r7, pc} + 80353b2: 4618 mov r0, r3 + 80353b4: 3710 adds r7, #16 + 80353b6: 46bd mov sp, r7 + 80353b8: bd80 pop {r7, pc} ... -0803538c : +080353bc : * the UART configuration registers. * @param huart UART handle. * @retval None */ static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart) { - 803538c: b480 push {r7} - 803538e: b085 sub sp, #20 - 8035390: af00 add r7, sp, #0 - 8035392: 6078 str r0, [r7, #4] + 80353bc: b480 push {r7} + 80353be: b085 sub sp, #20 + 80353c0: af00 add r7, sp, #0 + 80353c2: 6078 str r0, [r7, #4] uint8_t rx_fifo_threshold; uint8_t tx_fifo_threshold; static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U}; static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U}; if (huart->FifoMode == UART_FIFOMODE_DISABLE) - 8035394: 687b ldr r3, [r7, #4] - 8035396: 6e5b ldr r3, [r3, #100] ; 0x64 - 8035398: 2b00 cmp r3, #0 - 803539a: d108 bne.n 80353ae + 80353c4: 687b ldr r3, [r7, #4] + 80353c6: 6e5b ldr r3, [r3, #100] ; 0x64 + 80353c8: 2b00 cmp r3, #0 + 80353ca: d108 bne.n 80353de { huart->NbTxDataToProcess = 1U; - 803539c: 687b ldr r3, [r7, #4] - 803539e: 2201 movs r2, #1 - 80353a0: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 80353cc: 687b ldr r3, [r7, #4] + 80353ce: 2201 movs r2, #1 + 80353d0: f8a3 206a strh.w r2, [r3, #106] ; 0x6a huart->NbRxDataToProcess = 1U; - 80353a4: 687b ldr r3, [r7, #4] - 80353a6: 2201 movs r2, #1 - 80353a8: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 80353d4: 687b ldr r3, [r7, #4] + 80353d6: 2201 movs r2, #1 + 80353d8: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / (uint16_t)denominator[tx_fifo_threshold]; huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / (uint16_t)denominator[rx_fifo_threshold]; } } - 80353ac: e031 b.n 8035412 + 80353dc: e031 b.n 8035442 rx_fifo_depth = RX_FIFO_DEPTH; - 80353ae: 2310 movs r3, #16 - 80353b0: 73fb strb r3, [r7, #15] + 80353de: 2310 movs r3, #16 + 80353e0: 73fb strb r3, [r7, #15] tx_fifo_depth = TX_FIFO_DEPTH; - 80353b2: 2310 movs r3, #16 - 80353b4: 73bb strb r3, [r7, #14] + 80353e2: 2310 movs r3, #16 + 80353e4: 73bb strb r3, [r7, #14] rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - 80353b6: 687b ldr r3, [r7, #4] - 80353b8: 681b ldr r3, [r3, #0] - 80353ba: 689b ldr r3, [r3, #8] - 80353bc: 0e5b lsrs r3, r3, #25 - 80353be: b2db uxtb r3, r3 - 80353c0: f003 0307 and.w r3, r3, #7 - 80353c4: 737b strb r3, [r7, #13] + 80353e6: 687b ldr r3, [r7, #4] + 80353e8: 681b ldr r3, [r3, #0] + 80353ea: 689b ldr r3, [r3, #8] + 80353ec: 0e5b lsrs r3, r3, #25 + 80353ee: b2db uxtb r3, r3 + 80353f0: f003 0307 and.w r3, r3, #7 + 80353f4: 737b strb r3, [r7, #13] tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); - 80353c6: 687b ldr r3, [r7, #4] - 80353c8: 681b ldr r3, [r3, #0] - 80353ca: 689b ldr r3, [r3, #8] - 80353cc: 0f5b lsrs r3, r3, #29 - 80353ce: b2db uxtb r3, r3 - 80353d0: f003 0307 and.w r3, r3, #7 - 80353d4: 733b strb r3, [r7, #12] + 80353f6: 687b ldr r3, [r7, #4] + 80353f8: 681b ldr r3, [r3, #0] + 80353fa: 689b ldr r3, [r3, #8] + 80353fc: 0f5b lsrs r3, r3, #29 + 80353fe: b2db uxtb r3, r3 + 8035400: f003 0307 and.w r3, r3, #7 + 8035404: 733b strb r3, [r7, #12] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 80353d6: 7bbb ldrb r3, [r7, #14] - 80353d8: 7b3a ldrb r2, [r7, #12] - 80353da: 4911 ldr r1, [pc, #68] ; (8035420 ) - 80353dc: 5c8a ldrb r2, [r1, r2] - 80353de: fb02 f303 mul.w r3, r2, r3 + 8035406: 7bbb ldrb r3, [r7, #14] + 8035408: 7b3a ldrb r2, [r7, #12] + 803540a: 4911 ldr r1, [pc, #68] ; (8035450 ) + 803540c: 5c8a ldrb r2, [r1, r2] + 803540e: fb02 f303 mul.w r3, r2, r3 (uint16_t)denominator[tx_fifo_threshold]; - 80353e2: 7b3a ldrb r2, [r7, #12] - 80353e4: 490f ldr r1, [pc, #60] ; (8035424 ) - 80353e6: 5c8a ldrb r2, [r1, r2] + 8035412: 7b3a ldrb r2, [r7, #12] + 8035414: 490f ldr r1, [pc, #60] ; (8035454 ) + 8035416: 5c8a ldrb r2, [r1, r2] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 80353e8: fb93 f3f2 sdiv r3, r3, r2 - 80353ec: b29a uxth r2, r3 - 80353ee: 687b ldr r3, [r7, #4] - 80353f0: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 8035418: fb93 f3f2 sdiv r3, r3, r2 + 803541c: b29a uxth r2, r3 + 803541e: 687b ldr r3, [r7, #4] + 8035420: f8a3 206a strh.w r2, [r3, #106] ; 0x6a huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / - 80353f4: 7bfb ldrb r3, [r7, #15] - 80353f6: 7b7a ldrb r2, [r7, #13] - 80353f8: 4909 ldr r1, [pc, #36] ; (8035420 ) - 80353fa: 5c8a ldrb r2, [r1, r2] - 80353fc: fb02 f303 mul.w r3, r2, r3 + 8035424: 7bfb ldrb r3, [r7, #15] + 8035426: 7b7a ldrb r2, [r7, #13] + 8035428: 4909 ldr r1, [pc, #36] ; (8035450 ) + 803542a: 5c8a ldrb r2, [r1, r2] + 803542c: fb02 f303 mul.w r3, r2, r3 (uint16_t)denominator[rx_fifo_threshold]; - 8035400: 7b7a ldrb r2, [r7, #13] - 8035402: 4908 ldr r1, [pc, #32] ; (8035424 ) - 8035404: 5c8a ldrb r2, [r1, r2] + 8035430: 7b7a ldrb r2, [r7, #13] + 8035432: 4908 ldr r1, [pc, #32] ; (8035454 ) + 8035434: 5c8a ldrb r2, [r1, r2] huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / - 8035406: fb93 f3f2 sdiv r3, r3, r2 - 803540a: b29a uxth r2, r3 - 803540c: 687b ldr r3, [r7, #4] - 803540e: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 -} - 8035412: bf00 nop - 8035414: 3714 adds r7, #20 - 8035416: 46bd mov sp, r7 - 8035418: f85d 7b04 ldr.w r7, [sp], #4 - 803541c: 4770 bx lr - 803541e: bf00 nop - 8035420: 08044ce4 .word 0x08044ce4 - 8035424: 08044cec .word 0x08044cec - -08035428 : + 8035436: fb93 f3f2 sdiv r3, r3, r2 + 803543a: b29a uxth r2, r3 + 803543c: 687b ldr r3, [r7, #4] + 803543e: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 +} + 8035442: bf00 nop + 8035444: 3714 adds r7, #20 + 8035446: 46bd mov sp, r7 + 8035448: f85d 7b04 ldr.w r7, [sp], #4 + 803544c: 4770 bx lr + 803544e: bf00 nop + 8035450: 08044d14 .word 0x08044d14 + 8035454: 08044d1c .word 0x08044d1c + +08035458 : /** * LwIP initialization function */ void MX_LWIP_Init(void) { - 8035428: b580 push {r7, lr} - 803542a: b084 sub sp, #16 - 803542c: af04 add r7, sp, #16 + 8035458: b580 push {r7, lr} + 803545a: b084 sub sp, #16 + 803545c: af04 add r7, sp, #16 /* IP addresses initialization */ IP_ADDRESS[0] = 192; - 803542e: 4b8d ldr r3, [pc, #564] ; (8035664 ) - 8035430: 22c0 movs r2, #192 ; 0xc0 - 8035432: 701a strb r2, [r3, #0] + 803545e: 4b8d ldr r3, [pc, #564] ; (8035694 ) + 8035460: 22c0 movs r2, #192 ; 0xc0 + 8035462: 701a strb r2, [r3, #0] IP_ADDRESS[1] = 168; - 8035434: 4b8b ldr r3, [pc, #556] ; (8035664 ) - 8035436: 22a8 movs r2, #168 ; 0xa8 - 8035438: 705a strb r2, [r3, #1] + 8035464: 4b8b ldr r3, [pc, #556] ; (8035694 ) + 8035466: 22a8 movs r2, #168 ; 0xa8 + 8035468: 705a strb r2, [r3, #1] IP_ADDRESS[2] = 144; - 803543a: 4b8a ldr r3, [pc, #552] ; (8035664 ) - 803543c: 2290 movs r2, #144 ; 0x90 - 803543e: 709a strb r2, [r3, #2] + 803546a: 4b8a ldr r3, [pc, #552] ; (8035694 ) + 803546c: 2290 movs r2, #144 ; 0x90 + 803546e: 709a strb r2, [r3, #2] IP_ADDRESS[3] = 98; - 8035440: 4b88 ldr r3, [pc, #544] ; (8035664 ) - 8035442: 2262 movs r2, #98 ; 0x62 - 8035444: 70da strb r2, [r3, #3] + 8035470: 4b88 ldr r3, [pc, #544] ; (8035694 ) + 8035472: 2262 movs r2, #98 ; 0x62 + 8035474: 70da strb r2, [r3, #3] NETMASK_ADDRESS[0] = 255; - 8035446: 4b88 ldr r3, [pc, #544] ; (8035668 ) - 8035448: 22ff movs r2, #255 ; 0xff - 803544a: 701a strb r2, [r3, #0] + 8035476: 4b88 ldr r3, [pc, #544] ; (8035698 ) + 8035478: 22ff movs r2, #255 ; 0xff + 803547a: 701a strb r2, [r3, #0] NETMASK_ADDRESS[1] = 255; - 803544c: 4b86 ldr r3, [pc, #536] ; (8035668 ) - 803544e: 22ff movs r2, #255 ; 0xff - 8035450: 705a strb r2, [r3, #1] + 803547c: 4b86 ldr r3, [pc, #536] ; (8035698 ) + 803547e: 22ff movs r2, #255 ; 0xff + 8035480: 705a strb r2, [r3, #1] NETMASK_ADDRESS[2] = 255; - 8035452: 4b85 ldr r3, [pc, #532] ; (8035668 ) - 8035454: 22ff movs r2, #255 ; 0xff - 8035456: 709a strb r2, [r3, #2] + 8035482: 4b85 ldr r3, [pc, #532] ; (8035698 ) + 8035484: 22ff movs r2, #255 ; 0xff + 8035486: 709a strb r2, [r3, #2] NETMASK_ADDRESS[3] = 0; - 8035458: 4b83 ldr r3, [pc, #524] ; (8035668 ) - 803545a: 2200 movs r2, #0 - 803545c: 70da strb r2, [r3, #3] + 8035488: 4b83 ldr r3, [pc, #524] ; (8035698 ) + 803548a: 2200 movs r2, #0 + 803548c: 70da strb r2, [r3, #3] GATEWAY_ADDRESS[0] = 192; - 803545e: 4b83 ldr r3, [pc, #524] ; (803566c ) - 8035460: 22c0 movs r2, #192 ; 0xc0 - 8035462: 701a strb r2, [r3, #0] + 803548e: 4b83 ldr r3, [pc, #524] ; (803569c ) + 8035490: 22c0 movs r2, #192 ; 0xc0 + 8035492: 701a strb r2, [r3, #0] GATEWAY_ADDRESS[1] = 168; - 8035464: 4b81 ldr r3, [pc, #516] ; (803566c ) - 8035466: 22a8 movs r2, #168 ; 0xa8 - 8035468: 705a strb r2, [r3, #1] + 8035494: 4b81 ldr r3, [pc, #516] ; (803569c ) + 8035496: 22a8 movs r2, #168 ; 0xa8 + 8035498: 705a strb r2, [r3, #1] GATEWAY_ADDRESS[2] = 144; - 803546a: 4b80 ldr r3, [pc, #512] ; (803566c ) - 803546c: 2290 movs r2, #144 ; 0x90 - 803546e: 709a strb r2, [r3, #2] + 803549a: 4b80 ldr r3, [pc, #512] ; (803569c ) + 803549c: 2290 movs r2, #144 ; 0x90 + 803549e: 709a strb r2, [r3, #2] GATEWAY_ADDRESS[3] = 1; - 8035470: 4b7e ldr r3, [pc, #504] ; (803566c ) - 8035472: 2201 movs r2, #1 - 8035474: 70da strb r2, [r3, #3] + 80354a0: 4b7e ldr r3, [pc, #504] ; (803569c ) + 80354a2: 2201 movs r2, #1 + 80354a4: 70da strb r2, [r3, #3] /* USER CODE BEGIN IP_ADDRESSES */ /* USER CODE END IP_ADDRESSES */ /* Initilialize the LwIP stack without RTOS */ lwip_init(); - 8035476: f000 fe01 bl 803607c + 80354a6: f000 fe01 bl 80360ac /* IP addresses initialization without DHCP (IPv4) */ IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]); - 803547a: 4b7a ldr r3, [pc, #488] ; (8035664 ) - 803547c: 781b ldrb r3, [r3, #0] - 803547e: 061a lsls r2, r3, #24 - 8035480: 4b78 ldr r3, [pc, #480] ; (8035664 ) - 8035482: 785b ldrb r3, [r3, #1] - 8035484: 041b lsls r3, r3, #16 - 8035486: 431a orrs r2, r3 - 8035488: 4b76 ldr r3, [pc, #472] ; (8035664 ) - 803548a: 789b ldrb r3, [r3, #2] - 803548c: 021b lsls r3, r3, #8 - 803548e: 4313 orrs r3, r2 - 8035490: 4a74 ldr r2, [pc, #464] ; (8035664 ) - 8035492: 78d2 ldrb r2, [r2, #3] - 8035494: 4313 orrs r3, r2 - 8035496: 061a lsls r2, r3, #24 - 8035498: 4b72 ldr r3, [pc, #456] ; (8035664 ) - 803549a: 781b ldrb r3, [r3, #0] - 803549c: 0619 lsls r1, r3, #24 - 803549e: 4b71 ldr r3, [pc, #452] ; (8035664 ) - 80354a0: 785b ldrb r3, [r3, #1] - 80354a2: 041b lsls r3, r3, #16 - 80354a4: 4319 orrs r1, r3 - 80354a6: 4b6f ldr r3, [pc, #444] ; (8035664 ) - 80354a8: 789b ldrb r3, [r3, #2] - 80354aa: 021b lsls r3, r3, #8 - 80354ac: 430b orrs r3, r1 - 80354ae: 496d ldr r1, [pc, #436] ; (8035664 ) - 80354b0: 78c9 ldrb r1, [r1, #3] - 80354b2: 430b orrs r3, r1 - 80354b4: 021b lsls r3, r3, #8 - 80354b6: f403 037f and.w r3, r3, #16711680 ; 0xff0000 - 80354ba: 431a orrs r2, r3 - 80354bc: 4b69 ldr r3, [pc, #420] ; (8035664 ) - 80354be: 781b ldrb r3, [r3, #0] - 80354c0: 0619 lsls r1, r3, #24 - 80354c2: 4b68 ldr r3, [pc, #416] ; (8035664 ) - 80354c4: 785b ldrb r3, [r3, #1] - 80354c6: 041b lsls r3, r3, #16 - 80354c8: 4319 orrs r1, r3 - 80354ca: 4b66 ldr r3, [pc, #408] ; (8035664 ) - 80354cc: 789b ldrb r3, [r3, #2] - 80354ce: 021b lsls r3, r3, #8 - 80354d0: 430b orrs r3, r1 - 80354d2: 4964 ldr r1, [pc, #400] ; (8035664 ) - 80354d4: 78c9 ldrb r1, [r1, #3] - 80354d6: 430b orrs r3, r1 - 80354d8: 0a1b lsrs r3, r3, #8 - 80354da: f403 437f and.w r3, r3, #65280 ; 0xff00 - 80354de: 431a orrs r2, r3 - 80354e0: 4b60 ldr r3, [pc, #384] ; (8035664 ) - 80354e2: 781b ldrb r3, [r3, #0] - 80354e4: 0619 lsls r1, r3, #24 - 80354e6: 4b5f ldr r3, [pc, #380] ; (8035664 ) - 80354e8: 785b ldrb r3, [r3, #1] - 80354ea: 041b lsls r3, r3, #16 - 80354ec: 4319 orrs r1, r3 - 80354ee: 4b5d ldr r3, [pc, #372] ; (8035664 ) - 80354f0: 789b ldrb r3, [r3, #2] - 80354f2: 021b lsls r3, r3, #8 - 80354f4: 430b orrs r3, r1 - 80354f6: 495b ldr r1, [pc, #364] ; (8035664 ) - 80354f8: 78c9 ldrb r1, [r1, #3] - 80354fa: 430b orrs r3, r1 - 80354fc: 0e1b lsrs r3, r3, #24 - 80354fe: 4313 orrs r3, r2 - 8035500: 4a5b ldr r2, [pc, #364] ; (8035670 ) - 8035502: 6013 str r3, [r2, #0] + 80354aa: 4b7a ldr r3, [pc, #488] ; (8035694 ) + 80354ac: 781b ldrb r3, [r3, #0] + 80354ae: 061a lsls r2, r3, #24 + 80354b0: 4b78 ldr r3, [pc, #480] ; (8035694 ) + 80354b2: 785b ldrb r3, [r3, #1] + 80354b4: 041b lsls r3, r3, #16 + 80354b6: 431a orrs r2, r3 + 80354b8: 4b76 ldr r3, [pc, #472] ; (8035694 ) + 80354ba: 789b ldrb r3, [r3, #2] + 80354bc: 021b lsls r3, r3, #8 + 80354be: 4313 orrs r3, r2 + 80354c0: 4a74 ldr r2, [pc, #464] ; (8035694 ) + 80354c2: 78d2 ldrb r2, [r2, #3] + 80354c4: 4313 orrs r3, r2 + 80354c6: 061a lsls r2, r3, #24 + 80354c8: 4b72 ldr r3, [pc, #456] ; (8035694 ) + 80354ca: 781b ldrb r3, [r3, #0] + 80354cc: 0619 lsls r1, r3, #24 + 80354ce: 4b71 ldr r3, [pc, #452] ; (8035694 ) + 80354d0: 785b ldrb r3, [r3, #1] + 80354d2: 041b lsls r3, r3, #16 + 80354d4: 4319 orrs r1, r3 + 80354d6: 4b6f ldr r3, [pc, #444] ; (8035694 ) + 80354d8: 789b ldrb r3, [r3, #2] + 80354da: 021b lsls r3, r3, #8 + 80354dc: 430b orrs r3, r1 + 80354de: 496d ldr r1, [pc, #436] ; (8035694 ) + 80354e0: 78c9 ldrb r1, [r1, #3] + 80354e2: 430b orrs r3, r1 + 80354e4: 021b lsls r3, r3, #8 + 80354e6: f403 037f and.w r3, r3, #16711680 ; 0xff0000 + 80354ea: 431a orrs r2, r3 + 80354ec: 4b69 ldr r3, [pc, #420] ; (8035694 ) + 80354ee: 781b ldrb r3, [r3, #0] + 80354f0: 0619 lsls r1, r3, #24 + 80354f2: 4b68 ldr r3, [pc, #416] ; (8035694 ) + 80354f4: 785b ldrb r3, [r3, #1] + 80354f6: 041b lsls r3, r3, #16 + 80354f8: 4319 orrs r1, r3 + 80354fa: 4b66 ldr r3, [pc, #408] ; (8035694 ) + 80354fc: 789b ldrb r3, [r3, #2] + 80354fe: 021b lsls r3, r3, #8 + 8035500: 430b orrs r3, r1 + 8035502: 4964 ldr r1, [pc, #400] ; (8035694 ) + 8035504: 78c9 ldrb r1, [r1, #3] + 8035506: 430b orrs r3, r1 + 8035508: 0a1b lsrs r3, r3, #8 + 803550a: f403 437f and.w r3, r3, #65280 ; 0xff00 + 803550e: 431a orrs r2, r3 + 8035510: 4b60 ldr r3, [pc, #384] ; (8035694 ) + 8035512: 781b ldrb r3, [r3, #0] + 8035514: 0619 lsls r1, r3, #24 + 8035516: 4b5f ldr r3, [pc, #380] ; (8035694 ) + 8035518: 785b ldrb r3, [r3, #1] + 803551a: 041b lsls r3, r3, #16 + 803551c: 4319 orrs r1, r3 + 803551e: 4b5d ldr r3, [pc, #372] ; (8035694 ) + 8035520: 789b ldrb r3, [r3, #2] + 8035522: 021b lsls r3, r3, #8 + 8035524: 430b orrs r3, r1 + 8035526: 495b ldr r1, [pc, #364] ; (8035694 ) + 8035528: 78c9 ldrb r1, [r1, #3] + 803552a: 430b orrs r3, r1 + 803552c: 0e1b lsrs r3, r3, #24 + 803552e: 4313 orrs r3, r2 + 8035530: 4a5b ldr r2, [pc, #364] ; (80356a0 ) + 8035532: 6013 str r3, [r2, #0] IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]); - 8035504: 4b58 ldr r3, [pc, #352] ; (8035668 ) - 8035506: 781b ldrb r3, [r3, #0] - 8035508: 061a lsls r2, r3, #24 - 803550a: 4b57 ldr r3, [pc, #348] ; (8035668 ) - 803550c: 785b ldrb r3, [r3, #1] - 803550e: 041b lsls r3, r3, #16 - 8035510: 431a orrs r2, r3 - 8035512: 4b55 ldr r3, [pc, #340] ; (8035668 ) - 8035514: 789b ldrb r3, [r3, #2] - 8035516: 021b lsls r3, r3, #8 - 8035518: 4313 orrs r3, r2 - 803551a: 4a53 ldr r2, [pc, #332] ; (8035668 ) - 803551c: 78d2 ldrb r2, [r2, #3] - 803551e: 4313 orrs r3, r2 - 8035520: 061a lsls r2, r3, #24 - 8035522: 4b51 ldr r3, [pc, #324] ; (8035668 ) - 8035524: 781b ldrb r3, [r3, #0] - 8035526: 0619 lsls r1, r3, #24 - 8035528: 4b4f ldr r3, [pc, #316] ; (8035668 ) - 803552a: 785b ldrb r3, [r3, #1] - 803552c: 041b lsls r3, r3, #16 - 803552e: 4319 orrs r1, r3 - 8035530: 4b4d ldr r3, [pc, #308] ; (8035668 ) - 8035532: 789b ldrb r3, [r3, #2] - 8035534: 021b lsls r3, r3, #8 - 8035536: 430b orrs r3, r1 - 8035538: 494b ldr r1, [pc, #300] ; (8035668 ) - 803553a: 78c9 ldrb r1, [r1, #3] - 803553c: 430b orrs r3, r1 - 803553e: 021b lsls r3, r3, #8 - 8035540: f403 037f and.w r3, r3, #16711680 ; 0xff0000 - 8035544: 431a orrs r2, r3 - 8035546: 4b48 ldr r3, [pc, #288] ; (8035668 ) - 8035548: 781b ldrb r3, [r3, #0] - 803554a: 0619 lsls r1, r3, #24 - 803554c: 4b46 ldr r3, [pc, #280] ; (8035668 ) - 803554e: 785b ldrb r3, [r3, #1] - 8035550: 041b lsls r3, r3, #16 - 8035552: 4319 orrs r1, r3 - 8035554: 4b44 ldr r3, [pc, #272] ; (8035668 ) - 8035556: 789b ldrb r3, [r3, #2] - 8035558: 021b lsls r3, r3, #8 - 803555a: 430b orrs r3, r1 - 803555c: 4942 ldr r1, [pc, #264] ; (8035668 ) - 803555e: 78c9 ldrb r1, [r1, #3] - 8035560: 430b orrs r3, r1 - 8035562: 0a1b lsrs r3, r3, #8 - 8035564: f403 437f and.w r3, r3, #65280 ; 0xff00 - 8035568: 431a orrs r2, r3 - 803556a: 4b3f ldr r3, [pc, #252] ; (8035668 ) - 803556c: 781b ldrb r3, [r3, #0] - 803556e: 0619 lsls r1, r3, #24 - 8035570: 4b3d ldr r3, [pc, #244] ; (8035668 ) - 8035572: 785b ldrb r3, [r3, #1] - 8035574: 041b lsls r3, r3, #16 - 8035576: 4319 orrs r1, r3 - 8035578: 4b3b ldr r3, [pc, #236] ; (8035668 ) - 803557a: 789b ldrb r3, [r3, #2] - 803557c: 021b lsls r3, r3, #8 - 803557e: 430b orrs r3, r1 - 8035580: 4939 ldr r1, [pc, #228] ; (8035668 ) - 8035582: 78c9 ldrb r1, [r1, #3] - 8035584: 430b orrs r3, r1 - 8035586: 0e1b lsrs r3, r3, #24 - 8035588: 4313 orrs r3, r2 - 803558a: 4a3a ldr r2, [pc, #232] ; (8035674 ) - 803558c: 6013 str r3, [r2, #0] + 8035534: 4b58 ldr r3, [pc, #352] ; (8035698 ) + 8035536: 781b ldrb r3, [r3, #0] + 8035538: 061a lsls r2, r3, #24 + 803553a: 4b57 ldr r3, [pc, #348] ; (8035698 ) + 803553c: 785b ldrb r3, [r3, #1] + 803553e: 041b lsls r3, r3, #16 + 8035540: 431a orrs r2, r3 + 8035542: 4b55 ldr r3, [pc, #340] ; (8035698 ) + 8035544: 789b ldrb r3, [r3, #2] + 8035546: 021b lsls r3, r3, #8 + 8035548: 4313 orrs r3, r2 + 803554a: 4a53 ldr r2, [pc, #332] ; (8035698 ) + 803554c: 78d2 ldrb r2, [r2, #3] + 803554e: 4313 orrs r3, r2 + 8035550: 061a lsls r2, r3, #24 + 8035552: 4b51 ldr r3, [pc, #324] ; (8035698 ) + 8035554: 781b ldrb r3, [r3, #0] + 8035556: 0619 lsls r1, r3, #24 + 8035558: 4b4f ldr r3, [pc, #316] ; (8035698 ) + 803555a: 785b ldrb r3, [r3, #1] + 803555c: 041b lsls r3, r3, #16 + 803555e: 4319 orrs r1, r3 + 8035560: 4b4d ldr r3, [pc, #308] ; (8035698 ) + 8035562: 789b ldrb r3, [r3, #2] + 8035564: 021b lsls r3, r3, #8 + 8035566: 430b orrs r3, r1 + 8035568: 494b ldr r1, [pc, #300] ; (8035698 ) + 803556a: 78c9 ldrb r1, [r1, #3] + 803556c: 430b orrs r3, r1 + 803556e: 021b lsls r3, r3, #8 + 8035570: f403 037f and.w r3, r3, #16711680 ; 0xff0000 + 8035574: 431a orrs r2, r3 + 8035576: 4b48 ldr r3, [pc, #288] ; (8035698 ) + 8035578: 781b ldrb r3, [r3, #0] + 803557a: 0619 lsls r1, r3, #24 + 803557c: 4b46 ldr r3, [pc, #280] ; (8035698 ) + 803557e: 785b ldrb r3, [r3, #1] + 8035580: 041b lsls r3, r3, #16 + 8035582: 4319 orrs r1, r3 + 8035584: 4b44 ldr r3, [pc, #272] ; (8035698 ) + 8035586: 789b ldrb r3, [r3, #2] + 8035588: 021b lsls r3, r3, #8 + 803558a: 430b orrs r3, r1 + 803558c: 4942 ldr r1, [pc, #264] ; (8035698 ) + 803558e: 78c9 ldrb r1, [r1, #3] + 8035590: 430b orrs r3, r1 + 8035592: 0a1b lsrs r3, r3, #8 + 8035594: f403 437f and.w r3, r3, #65280 ; 0xff00 + 8035598: 431a orrs r2, r3 + 803559a: 4b3f ldr r3, [pc, #252] ; (8035698 ) + 803559c: 781b ldrb r3, [r3, #0] + 803559e: 0619 lsls r1, r3, #24 + 80355a0: 4b3d ldr r3, [pc, #244] ; (8035698 ) + 80355a2: 785b ldrb r3, [r3, #1] + 80355a4: 041b lsls r3, r3, #16 + 80355a6: 4319 orrs r1, r3 + 80355a8: 4b3b ldr r3, [pc, #236] ; (8035698 ) + 80355aa: 789b ldrb r3, [r3, #2] + 80355ac: 021b lsls r3, r3, #8 + 80355ae: 430b orrs r3, r1 + 80355b0: 4939 ldr r1, [pc, #228] ; (8035698 ) + 80355b2: 78c9 ldrb r1, [r1, #3] + 80355b4: 430b orrs r3, r1 + 80355b6: 0e1b lsrs r3, r3, #24 + 80355b8: 4313 orrs r3, r2 + 80355ba: 4a3a ldr r2, [pc, #232] ; (80356a4 ) + 80355bc: 6013 str r3, [r2, #0] IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]); - 803558e: 4b37 ldr r3, [pc, #220] ; (803566c ) - 8035590: 781b ldrb r3, [r3, #0] - 8035592: 061a lsls r2, r3, #24 - 8035594: 4b35 ldr r3, [pc, #212] ; (803566c ) - 8035596: 785b ldrb r3, [r3, #1] - 8035598: 041b lsls r3, r3, #16 - 803559a: 431a orrs r2, r3 - 803559c: 4b33 ldr r3, [pc, #204] ; (803566c ) - 803559e: 789b ldrb r3, [r3, #2] - 80355a0: 021b lsls r3, r3, #8 - 80355a2: 4313 orrs r3, r2 - 80355a4: 4a31 ldr r2, [pc, #196] ; (803566c ) - 80355a6: 78d2 ldrb r2, [r2, #3] - 80355a8: 4313 orrs r3, r2 - 80355aa: 061a lsls r2, r3, #24 - 80355ac: 4b2f ldr r3, [pc, #188] ; (803566c ) - 80355ae: 781b ldrb r3, [r3, #0] - 80355b0: 0619 lsls r1, r3, #24 - 80355b2: 4b2e ldr r3, [pc, #184] ; (803566c ) - 80355b4: 785b ldrb r3, [r3, #1] - 80355b6: 041b lsls r3, r3, #16 - 80355b8: 4319 orrs r1, r3 - 80355ba: 4b2c ldr r3, [pc, #176] ; (803566c ) - 80355bc: 789b ldrb r3, [r3, #2] - 80355be: 021b lsls r3, r3, #8 - 80355c0: 430b orrs r3, r1 - 80355c2: 492a ldr r1, [pc, #168] ; (803566c ) - 80355c4: 78c9 ldrb r1, [r1, #3] - 80355c6: 430b orrs r3, r1 - 80355c8: 021b lsls r3, r3, #8 - 80355ca: f403 037f and.w r3, r3, #16711680 ; 0xff0000 - 80355ce: 431a orrs r2, r3 - 80355d0: 4b26 ldr r3, [pc, #152] ; (803566c ) - 80355d2: 781b ldrb r3, [r3, #0] - 80355d4: 0619 lsls r1, r3, #24 - 80355d6: 4b25 ldr r3, [pc, #148] ; (803566c ) - 80355d8: 785b ldrb r3, [r3, #1] - 80355da: 041b lsls r3, r3, #16 - 80355dc: 4319 orrs r1, r3 - 80355de: 4b23 ldr r3, [pc, #140] ; (803566c ) - 80355e0: 789b ldrb r3, [r3, #2] - 80355e2: 021b lsls r3, r3, #8 - 80355e4: 430b orrs r3, r1 - 80355e6: 4921 ldr r1, [pc, #132] ; (803566c ) - 80355e8: 78c9 ldrb r1, [r1, #3] - 80355ea: 430b orrs r3, r1 - 80355ec: 0a1b lsrs r3, r3, #8 - 80355ee: f403 437f and.w r3, r3, #65280 ; 0xff00 - 80355f2: 431a orrs r2, r3 - 80355f4: 4b1d ldr r3, [pc, #116] ; (803566c ) - 80355f6: 781b ldrb r3, [r3, #0] - 80355f8: 0619 lsls r1, r3, #24 - 80355fa: 4b1c ldr r3, [pc, #112] ; (803566c ) - 80355fc: 785b ldrb r3, [r3, #1] - 80355fe: 041b lsls r3, r3, #16 - 8035600: 4319 orrs r1, r3 - 8035602: 4b1a ldr r3, [pc, #104] ; (803566c ) - 8035604: 789b ldrb r3, [r3, #2] - 8035606: 021b lsls r3, r3, #8 - 8035608: 430b orrs r3, r1 - 803560a: 4918 ldr r1, [pc, #96] ; (803566c ) - 803560c: 78c9 ldrb r1, [r1, #3] - 803560e: 430b orrs r3, r1 - 8035610: 0e1b lsrs r3, r3, #24 - 8035612: 4313 orrs r3, r2 - 8035614: 4a18 ldr r2, [pc, #96] ; (8035678 ) - 8035616: 6013 str r3, [r2, #0] + 80355be: 4b37 ldr r3, [pc, #220] ; (803569c ) + 80355c0: 781b ldrb r3, [r3, #0] + 80355c2: 061a lsls r2, r3, #24 + 80355c4: 4b35 ldr r3, [pc, #212] ; (803569c ) + 80355c6: 785b ldrb r3, [r3, #1] + 80355c8: 041b lsls r3, r3, #16 + 80355ca: 431a orrs r2, r3 + 80355cc: 4b33 ldr r3, [pc, #204] ; (803569c ) + 80355ce: 789b ldrb r3, [r3, #2] + 80355d0: 021b lsls r3, r3, #8 + 80355d2: 4313 orrs r3, r2 + 80355d4: 4a31 ldr r2, [pc, #196] ; (803569c ) + 80355d6: 78d2 ldrb r2, [r2, #3] + 80355d8: 4313 orrs r3, r2 + 80355da: 061a lsls r2, r3, #24 + 80355dc: 4b2f ldr r3, [pc, #188] ; (803569c ) + 80355de: 781b ldrb r3, [r3, #0] + 80355e0: 0619 lsls r1, r3, #24 + 80355e2: 4b2e ldr r3, [pc, #184] ; (803569c ) + 80355e4: 785b ldrb r3, [r3, #1] + 80355e6: 041b lsls r3, r3, #16 + 80355e8: 4319 orrs r1, r3 + 80355ea: 4b2c ldr r3, [pc, #176] ; (803569c ) + 80355ec: 789b ldrb r3, [r3, #2] + 80355ee: 021b lsls r3, r3, #8 + 80355f0: 430b orrs r3, r1 + 80355f2: 492a ldr r1, [pc, #168] ; (803569c ) + 80355f4: 78c9 ldrb r1, [r1, #3] + 80355f6: 430b orrs r3, r1 + 80355f8: 021b lsls r3, r3, #8 + 80355fa: f403 037f and.w r3, r3, #16711680 ; 0xff0000 + 80355fe: 431a orrs r2, r3 + 8035600: 4b26 ldr r3, [pc, #152] ; (803569c ) + 8035602: 781b ldrb r3, [r3, #0] + 8035604: 0619 lsls r1, r3, #24 + 8035606: 4b25 ldr r3, [pc, #148] ; (803569c ) + 8035608: 785b ldrb r3, [r3, #1] + 803560a: 041b lsls r3, r3, #16 + 803560c: 4319 orrs r1, r3 + 803560e: 4b23 ldr r3, [pc, #140] ; (803569c ) + 8035610: 789b ldrb r3, [r3, #2] + 8035612: 021b lsls r3, r3, #8 + 8035614: 430b orrs r3, r1 + 8035616: 4921 ldr r1, [pc, #132] ; (803569c ) + 8035618: 78c9 ldrb r1, [r1, #3] + 803561a: 430b orrs r3, r1 + 803561c: 0a1b lsrs r3, r3, #8 + 803561e: f403 437f and.w r3, r3, #65280 ; 0xff00 + 8035622: 431a orrs r2, r3 + 8035624: 4b1d ldr r3, [pc, #116] ; (803569c ) + 8035626: 781b ldrb r3, [r3, #0] + 8035628: 0619 lsls r1, r3, #24 + 803562a: 4b1c ldr r3, [pc, #112] ; (803569c ) + 803562c: 785b ldrb r3, [r3, #1] + 803562e: 041b lsls r3, r3, #16 + 8035630: 4319 orrs r1, r3 + 8035632: 4b1a ldr r3, [pc, #104] ; (803569c ) + 8035634: 789b ldrb r3, [r3, #2] + 8035636: 021b lsls r3, r3, #8 + 8035638: 430b orrs r3, r1 + 803563a: 4918 ldr r1, [pc, #96] ; (803569c ) + 803563c: 78c9 ldrb r1, [r1, #3] + 803563e: 430b orrs r3, r1 + 8035640: 0e1b lsrs r3, r3, #24 + 8035642: 4313 orrs r3, r2 + 8035644: 4a18 ldr r2, [pc, #96] ; (80356a8 ) + 8035646: 6013 str r3, [r2, #0] /* add the network interface (IPv4/IPv6) without RTOS */ netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, ðernetif_init, ðernet_input); - 8035618: 4b18 ldr r3, [pc, #96] ; (803567c ) - 803561a: 9302 str r3, [sp, #8] - 803561c: 4b18 ldr r3, [pc, #96] ; (8035680 ) - 803561e: 9301 str r3, [sp, #4] - 8035620: 2300 movs r3, #0 - 8035622: 9300 str r3, [sp, #0] - 8035624: 4b14 ldr r3, [pc, #80] ; (8035678 ) - 8035626: 4a13 ldr r2, [pc, #76] ; (8035674 ) - 8035628: 4911 ldr r1, [pc, #68] ; (8035670 ) - 803562a: 4816 ldr r0, [pc, #88] ; (8035684 ) - 803562c: f001 fa0e bl 8036a4c + 8035648: 4b18 ldr r3, [pc, #96] ; (80356ac ) + 803564a: 9302 str r3, [sp, #8] + 803564c: 4b18 ldr r3, [pc, #96] ; (80356b0 ) + 803564e: 9301 str r3, [sp, #4] + 8035650: 2300 movs r3, #0 + 8035652: 9300 str r3, [sp, #0] + 8035654: 4b14 ldr r3, [pc, #80] ; (80356a8 ) + 8035656: 4a13 ldr r2, [pc, #76] ; (80356a4 ) + 8035658: 4911 ldr r1, [pc, #68] ; (80356a0 ) + 803565a: 4816 ldr r0, [pc, #88] ; (80356b4 ) + 803565c: f001 fa0e bl 8036a7c /* Registers the default network interface */ netif_set_default(&gnetif); - 8035630: 4814 ldr r0, [pc, #80] ; (8035684 ) - 8035632: f001 fbc9 bl 8036dc8 + 8035660: 4814 ldr r0, [pc, #80] ; (80356b4 ) + 8035662: f001 fbc9 bl 8036df8 if (netif_is_link_up(&gnetif)) - 8035636: 4b13 ldr r3, [pc, #76] ; (8035684 ) - 8035638: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803563c: 089b lsrs r3, r3, #2 - 803563e: f003 0301 and.w r3, r3, #1 - 8035642: b2db uxtb r3, r3 - 8035644: 2b00 cmp r3, #0 - 8035646: d003 beq.n 8035650 + 8035666: 4b13 ldr r3, [pc, #76] ; (80356b4 ) + 8035668: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803566c: 089b lsrs r3, r3, #2 + 803566e: f003 0301 and.w r3, r3, #1 + 8035672: b2db uxtb r3, r3 + 8035674: 2b00 cmp r3, #0 + 8035676: d003 beq.n 8035680 { /* When the netif is fully configured this function must be called */ netif_set_up(&gnetif); - 8035648: 480e ldr r0, [pc, #56] ; (8035684 ) - 803564a: f001 fbcd bl 8036de8 - 803564e: e002 b.n 8035656 + 8035678: 480e ldr r0, [pc, #56] ; (80356b4 ) + 803567a: f001 fbcd bl 8036e18 + 803567e: e002 b.n 8035686 } else { /* When the netif link is down this function must be called */ netif_set_down(&gnetif); - 8035650: 480c ldr r0, [pc, #48] ; (8035684 ) - 8035652: f001 fc3d bl 8036ed0 + 8035680: 480c ldr r0, [pc, #48] ; (80356b4 ) + 8035682: f001 fc3d bl 8036f00 } /* Set the link callback function, this function is called on change of link status*/ netif_set_link_callback(&gnetif, ethernet_link_status_updated); - 8035656: 490c ldr r1, [pc, #48] ; (8035688 ) - 8035658: 480a ldr r0, [pc, #40] ; (8035684 ) - 803565a: f001 fcd7 bl 803700c + 8035686: 490c ldr r1, [pc, #48] ; (80356b8 ) + 8035688: 480a ldr r0, [pc, #40] ; (80356b4 ) + 803568a: f001 fcd7 bl 803703c /* Create the Ethernet link handler thread */ /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ } - 803565e: bf00 nop - 8035660: 46bd mov sp, r7 - 8035662: bd80 pop {r7, pc} - 8035664: 2400b8a0 .word 0x2400b8a0 - 8035668: 2400b8a4 .word 0x2400b8a4 - 803566c: 2400b8a8 .word 0x2400b8a8 - 8035670: 2400b894 .word 0x2400b894 - 8035674: 2400b898 .word 0x2400b898 - 8035678: 2400b89c .word 0x2400b89c - 803567c: 0804068d .word 0x0804068d - 8035680: 080359bd .word 0x080359bd - 8035684: 2400b85c .word 0x2400b85c - 8035688: 080356dd .word 0x080356dd - -0803568c : + 803568e: bf00 nop + 8035690: 46bd mov sp, r7 + 8035692: bd80 pop {r7, pc} + 8035694: 2400b8a0 .word 0x2400b8a0 + 8035698: 2400b8a4 .word 0x2400b8a4 + 803569c: 2400b8a8 .word 0x2400b8a8 + 80356a0: 2400b894 .word 0x2400b894 + 80356a4: 2400b898 .word 0x2400b898 + 80356a8: 2400b89c .word 0x2400b89c + 80356ac: 080406bd .word 0x080406bd + 80356b0: 080359ed .word 0x080359ed + 80356b4: 2400b85c .word 0x2400b85c + 80356b8: 0803570d .word 0x0803570d + +080356bc : * @brief Ethernet Link periodic check * @param netif * @retval None */ static void Ethernet_Link_Periodic_Handle(struct netif *netif) { - 803568c: b580 push {r7, lr} - 803568e: b082 sub sp, #8 - 8035690: af00 add r7, sp, #0 - 8035692: 6078 str r0, [r7, #4] + 80356bc: b580 push {r7, lr} + 80356be: b082 sub sp, #8 + 80356c0: af00 add r7, sp, #0 + 80356c2: 6078 str r0, [r7, #4] /* USER CODE BEGIN 4_4_1 */ /* USER CODE END 4_4_1 */ /* Ethernet Link every 100ms */ if (HAL_GetTick() - EthernetLinkTimer >= 100) - 8035694: f7f0 fc7e bl 8025f94 - 8035698: 4602 mov r2, r0 - 803569a: 4b08 ldr r3, [pc, #32] ; (80356bc ) - 803569c: 681b ldr r3, [r3, #0] - 803569e: 1ad3 subs r3, r2, r3 - 80356a0: 2b63 cmp r3, #99 ; 0x63 - 80356a2: d907 bls.n 80356b4 + 80356c4: f7f0 fc7e bl 8025fc4 + 80356c8: 4602 mov r2, r0 + 80356ca: 4b08 ldr r3, [pc, #32] ; (80356ec ) + 80356cc: 681b ldr r3, [r3, #0] + 80356ce: 1ad3 subs r3, r2, r3 + 80356d0: 2b63 cmp r3, #99 ; 0x63 + 80356d2: d907 bls.n 80356e4 { EthernetLinkTimer = HAL_GetTick(); - 80356a4: f7f0 fc76 bl 8025f94 - 80356a8: 4603 mov r3, r0 - 80356aa: 4a04 ldr r2, [pc, #16] ; (80356bc ) - 80356ac: 6013 str r3, [r2, #0] + 80356d4: f7f0 fc76 bl 8025fc4 + 80356d8: 4603 mov r3, r0 + 80356da: 4a04 ldr r2, [pc, #16] ; (80356ec ) + 80356dc: 6013 str r3, [r2, #0] ethernet_link_check_state(netif); - 80356ae: 6878 ldr r0, [r7, #4] - 80356b0: f000 fad6 bl 8035c60 + 80356de: 6878 ldr r0, [r7, #4] + 80356e0: f000 fad6 bl 8035c90 } /* USER CODE BEGIN 4_4 */ /* USER CODE END 4_4 */ } - 80356b4: bf00 nop - 80356b6: 3708 adds r7, #8 - 80356b8: 46bd mov sp, r7 - 80356ba: bd80 pop {r7, pc} - 80356bc: 2400b858 .word 0x2400b858 + 80356e4: bf00 nop + 80356e6: 3708 adds r7, #8 + 80356e8: 46bd mov sp, r7 + 80356ea: bd80 pop {r7, pc} + 80356ec: 2400b858 .word 0x2400b858 -080356c0 : +080356f0 : * Send it to the lwIP stack for handling * Handle timeouts if LWIP_TIMERS is set and without RTOS * Handle the llink status if LWIP_NETIF_LINK_CALLBACK is set and without RTOS */ void MX_LWIP_Process(void) { - 80356c0: b580 push {r7, lr} - 80356c2: af00 add r7, sp, #0 + 80356f0: b580 push {r7, lr} + 80356f2: af00 add r7, sp, #0 /* USER CODE BEGIN 4_1 */ /* USER CODE END 4_1 */ ethernetif_input(&gnetif); - 80356c4: 4804 ldr r0, [pc, #16] ; (80356d8 ) - 80356c6: f000 f959 bl 803597c + 80356f4: 4804 ldr r0, [pc, #16] ; (8035708 ) + 80356f6: f000 f959 bl 80359ac /* USER CODE BEGIN 4_2 */ /* USER CODE END 4_2 */ /* Handle timeouts */ sys_check_timeouts(); - 80356ca: f008 fbcd bl 803de68 + 80356fa: f008 fbcd bl 803de98 Ethernet_Link_Periodic_Handle(&gnetif); - 80356ce: 4802 ldr r0, [pc, #8] ; (80356d8 ) - 80356d0: f7ff ffdc bl 803568c + 80356fe: 4802 ldr r0, [pc, #8] ; (8035708 ) + 8035700: f7ff ffdc bl 80356bc /* USER CODE BEGIN 4_3 */ /* USER CODE END 4_3 */ } - 80356d4: bf00 nop - 80356d6: bd80 pop {r7, pc} - 80356d8: 2400b85c .word 0x2400b85c + 8035704: bf00 nop + 8035706: bd80 pop {r7, pc} + 8035708: 2400b85c .word 0x2400b85c -080356dc : +0803570c : * @brief Notify the User about the network interface config status * @param netif: the network interface * @retval None */ static void ethernet_link_status_updated(struct netif *netif) { - 80356dc: b480 push {r7} - 80356de: b083 sub sp, #12 - 80356e0: af00 add r7, sp, #0 - 80356e2: 6078 str r0, [r7, #4] + 803570c: b480 push {r7} + 803570e: b083 sub sp, #12 + 8035710: af00 add r7, sp, #0 + 8035712: 6078 str r0, [r7, #4] else /* netif is down */ { /* USER CODE BEGIN 6 */ /* USER CODE END 6 */ } } - 80356e4: bf00 nop - 80356e6: 370c adds r7, #12 - 80356e8: 46bd mov sp, r7 - 80356ea: f85d 7b04 ldr.w r7, [sp], #4 - 80356ee: 4770 bx lr + 8035714: bf00 nop + 8035716: 370c adds r7, #12 + 8035718: 46bd mov sp, r7 + 803571a: f85d 7b04 ldr.w r7, [sp], #4 + 803571e: 4770 bx lr -080356f0 : +08035720 : * * @param netif the already initialized lwip network interface structure * for this ethernetif */ static void low_level_init(struct netif *netif) { - 80356f0: b580 push {r7, lr} - 80356f2: b084 sub sp, #16 - 80356f4: af00 add r7, sp, #0 - 80356f6: 6078 str r0, [r7, #4] + 8035720: b580 push {r7, lr} + 8035722: b084 sub sp, #16 + 8035724: af00 add r7, sp, #0 + 8035726: 6078 str r0, [r7, #4] HAL_StatusTypeDef hal_eth_init_status = HAL_OK; - 80356f8: 2300 movs r3, #0 - 80356fa: 73fb strb r3, [r7, #15] + 8035728: 2300 movs r3, #0 + 803572a: 73fb strb r3, [r7, #15] /* Start ETH HAL Init */ uint8_t MACAddr[6] ; heth.Instance = ETH; - 80356fc: 4b48 ldr r3, [pc, #288] ; (8035820 ) - 80356fe: 4a49 ldr r2, [pc, #292] ; (8035824 ) - 8035700: 601a str r2, [r3, #0] + 803572c: 4b48 ldr r3, [pc, #288] ; (8035850 ) + 803572e: 4a49 ldr r2, [pc, #292] ; (8035854 ) + 8035730: 601a str r2, [r3, #0] MACAddr[0] = 0x00; - 8035702: 2300 movs r3, #0 - 8035704: 723b strb r3, [r7, #8] + 8035732: 2300 movs r3, #0 + 8035734: 723b strb r3, [r7, #8] MACAddr[1] = 0x80; - 8035706: 2380 movs r3, #128 ; 0x80 - 8035708: 727b strb r3, [r7, #9] + 8035736: 2380 movs r3, #128 ; 0x80 + 8035738: 727b strb r3, [r7, #9] MACAddr[2] = 0xE1; - 803570a: 23e1 movs r3, #225 ; 0xe1 - 803570c: 72bb strb r3, [r7, #10] + 803573a: 23e1 movs r3, #225 ; 0xe1 + 803573c: 72bb strb r3, [r7, #10] MACAddr[3] = 0x00; - 803570e: 2300 movs r3, #0 - 8035710: 72fb strb r3, [r7, #11] + 803573e: 2300 movs r3, #0 + 8035740: 72fb strb r3, [r7, #11] MACAddr[4] = 0x00; - 8035712: 2300 movs r3, #0 - 8035714: 733b strb r3, [r7, #12] + 8035742: 2300 movs r3, #0 + 8035744: 733b strb r3, [r7, #12] MACAddr[5] = 0x00; - 8035716: 2300 movs r3, #0 - 8035718: 737b strb r3, [r7, #13] + 8035746: 2300 movs r3, #0 + 8035748: 737b strb r3, [r7, #13] heth.Init.MACAddr = &MACAddr[0]; - 803571a: 4a41 ldr r2, [pc, #260] ; (8035820 ) - 803571c: f107 0308 add.w r3, r7, #8 - 8035720: 6053 str r3, [r2, #4] + 803574a: 4a41 ldr r2, [pc, #260] ; (8035850 ) + 803574c: f107 0308 add.w r3, r7, #8 + 8035750: 6053 str r3, [r2, #4] heth.Init.MediaInterface = HAL_ETH_RMII_MODE; - 8035722: 4b3f ldr r3, [pc, #252] ; (8035820 ) - 8035724: 2201 movs r2, #1 - 8035726: 721a strb r2, [r3, #8] + 8035752: 4b3f ldr r3, [pc, #252] ; (8035850 ) + 8035754: 2201 movs r2, #1 + 8035756: 721a strb r2, [r3, #8] heth.Init.TxDesc = DMATxDscrTab; - 8035728: 4b3d ldr r3, [pc, #244] ; (8035820 ) - 803572a: 4a3f ldr r2, [pc, #252] ; (8035828 ) - 803572c: 60da str r2, [r3, #12] + 8035758: 4b3d ldr r3, [pc, #244] ; (8035850 ) + 803575a: 4a3f ldr r2, [pc, #252] ; (8035858 ) + 803575c: 60da str r2, [r3, #12] heth.Init.RxDesc = DMARxDscrTab; - 803572e: 4b3c ldr r3, [pc, #240] ; (8035820 ) - 8035730: 4a3e ldr r2, [pc, #248] ; (803582c ) - 8035732: 611a str r2, [r3, #16] + 803575e: 4b3c ldr r3, [pc, #240] ; (8035850 ) + 8035760: 4a3e ldr r2, [pc, #248] ; (803585c ) + 8035762: 611a str r2, [r3, #16] heth.Init.RxBuffLen = 1528; - 8035734: 4b3a ldr r3, [pc, #232] ; (8035820 ) - 8035736: f44f 62bf mov.w r2, #1528 ; 0x5f8 - 803573a: 615a str r2, [r3, #20] + 8035764: 4b3a ldr r3, [pc, #232] ; (8035850 ) + 8035766: f44f 62bf mov.w r2, #1528 ; 0x5f8 + 803576a: 615a str r2, [r3, #20] /* USER CODE BEGIN MACADDRESS */ /* USER CODE END MACADDRESS */ hal_eth_init_status = HAL_ETH_Init(&heth); - 803573c: 4838 ldr r0, [pc, #224] ; (8035820 ) - 803573e: f7f5 f823 bl 802a788 - 8035742: 4603 mov r3, r0 - 8035744: 73fb strb r3, [r7, #15] + 803576c: 4838 ldr r0, [pc, #224] ; (8035850 ) + 803576e: f7f5 f823 bl 802a7b8 + 8035772: 4603 mov r3, r0 + 8035774: 73fb strb r3, [r7, #15] memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig)); - 8035746: 2238 movs r2, #56 ; 0x38 - 8035748: 2100 movs r1, #0 - 803574a: 4839 ldr r0, [pc, #228] ; (8035830 ) - 803574c: f00b f8e0 bl 8040910 + 8035776: 2238 movs r2, #56 ; 0x38 + 8035778: 2100 movs r1, #0 + 803577a: 4839 ldr r0, [pc, #228] ; (8035860 ) + 803577c: f00b f8e0 bl 8040940 TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; - 8035750: 4b37 ldr r3, [pc, #220] ; (8035830 ) - 8035752: 2221 movs r2, #33 ; 0x21 - 8035754: 601a str r2, [r3, #0] + 8035780: 4b37 ldr r3, [pc, #220] ; (8035860 ) + 8035782: 2221 movs r2, #33 ; 0x21 + 8035784: 601a str r2, [r3, #0] TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; - 8035756: 4b36 ldr r3, [pc, #216] ; (8035830 ) - 8035758: f44f 3240 mov.w r2, #196608 ; 0x30000 - 803575c: 615a str r2, [r3, #20] + 8035786: 4b36 ldr r3, [pc, #216] ; (8035860 ) + 8035788: f44f 3240 mov.w r2, #196608 ; 0x30000 + 803578c: 615a str r2, [r3, #20] TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; - 803575e: 4b34 ldr r3, [pc, #208] ; (8035830 ) - 8035760: 2200 movs r2, #0 - 8035762: 611a str r2, [r3, #16] + 803578e: 4b34 ldr r3, [pc, #208] ; (8035860 ) + 8035790: 2200 movs r2, #0 + 8035792: 611a str r2, [r3, #16] /* End ETH HAL Init */ /* Initialize the RX POOL */ LWIP_MEMPOOL_INIT(RX_POOL); - 8035764: 4833 ldr r0, [pc, #204] ; (8035834 ) - 8035766: f001 f839 bl 80367dc + 8035794: 4833 ldr r0, [pc, #204] ; (8035864 ) + 8035796: f001 f839 bl 803680c #if LWIP_ARP || LWIP_ETHERNET /* set MAC hardware address length */ netif->hwaddr_len = ETH_HWADDR_LEN; - 803576a: 687b ldr r3, [r7, #4] - 803576c: 2206 movs r2, #6 - 803576e: f883 2030 strb.w r2, [r3, #48] ; 0x30 + 803579a: 687b ldr r3, [r7, #4] + 803579c: 2206 movs r2, #6 + 803579e: f883 2030 strb.w r2, [r3, #48] ; 0x30 /* set MAC hardware address */ netif->hwaddr[0] = heth.Init.MACAddr[0]; - 8035772: 4b2b ldr r3, [pc, #172] ; (8035820 ) - 8035774: 685b ldr r3, [r3, #4] - 8035776: 781a ldrb r2, [r3, #0] - 8035778: 687b ldr r3, [r7, #4] - 803577a: f883 202a strb.w r2, [r3, #42] ; 0x2a + 80357a2: 4b2b ldr r3, [pc, #172] ; (8035850 ) + 80357a4: 685b ldr r3, [r3, #4] + 80357a6: 781a ldrb r2, [r3, #0] + 80357a8: 687b ldr r3, [r7, #4] + 80357aa: f883 202a strb.w r2, [r3, #42] ; 0x2a netif->hwaddr[1] = heth.Init.MACAddr[1]; - 803577e: 4b28 ldr r3, [pc, #160] ; (8035820 ) - 8035780: 685b ldr r3, [r3, #4] - 8035782: 785a ldrb r2, [r3, #1] - 8035784: 687b ldr r3, [r7, #4] - 8035786: f883 202b strb.w r2, [r3, #43] ; 0x2b + 80357ae: 4b28 ldr r3, [pc, #160] ; (8035850 ) + 80357b0: 685b ldr r3, [r3, #4] + 80357b2: 785a ldrb r2, [r3, #1] + 80357b4: 687b ldr r3, [r7, #4] + 80357b6: f883 202b strb.w r2, [r3, #43] ; 0x2b netif->hwaddr[2] = heth.Init.MACAddr[2]; - 803578a: 4b25 ldr r3, [pc, #148] ; (8035820 ) - 803578c: 685b ldr r3, [r3, #4] - 803578e: 789a ldrb r2, [r3, #2] - 8035790: 687b ldr r3, [r7, #4] - 8035792: f883 202c strb.w r2, [r3, #44] ; 0x2c + 80357ba: 4b25 ldr r3, [pc, #148] ; (8035850 ) + 80357bc: 685b ldr r3, [r3, #4] + 80357be: 789a ldrb r2, [r3, #2] + 80357c0: 687b ldr r3, [r7, #4] + 80357c2: f883 202c strb.w r2, [r3, #44] ; 0x2c netif->hwaddr[3] = heth.Init.MACAddr[3]; - 8035796: 4b22 ldr r3, [pc, #136] ; (8035820 ) - 8035798: 685b ldr r3, [r3, #4] - 803579a: 78da ldrb r2, [r3, #3] - 803579c: 687b ldr r3, [r7, #4] - 803579e: f883 202d strb.w r2, [r3, #45] ; 0x2d + 80357c6: 4b22 ldr r3, [pc, #136] ; (8035850 ) + 80357c8: 685b ldr r3, [r3, #4] + 80357ca: 78da ldrb r2, [r3, #3] + 80357cc: 687b ldr r3, [r7, #4] + 80357ce: f883 202d strb.w r2, [r3, #45] ; 0x2d netif->hwaddr[4] = heth.Init.MACAddr[4]; - 80357a2: 4b1f ldr r3, [pc, #124] ; (8035820 ) - 80357a4: 685b ldr r3, [r3, #4] - 80357a6: 791a ldrb r2, [r3, #4] - 80357a8: 687b ldr r3, [r7, #4] - 80357aa: f883 202e strb.w r2, [r3, #46] ; 0x2e + 80357d2: 4b1f ldr r3, [pc, #124] ; (8035850 ) + 80357d4: 685b ldr r3, [r3, #4] + 80357d6: 791a ldrb r2, [r3, #4] + 80357d8: 687b ldr r3, [r7, #4] + 80357da: f883 202e strb.w r2, [r3, #46] ; 0x2e netif->hwaddr[5] = heth.Init.MACAddr[5]; - 80357ae: 4b1c ldr r3, [pc, #112] ; (8035820 ) - 80357b0: 685b ldr r3, [r3, #4] - 80357b2: 795a ldrb r2, [r3, #5] - 80357b4: 687b ldr r3, [r7, #4] - 80357b6: f883 202f strb.w r2, [r3, #47] ; 0x2f + 80357de: 4b1c ldr r3, [pc, #112] ; (8035850 ) + 80357e0: 685b ldr r3, [r3, #4] + 80357e2: 795a ldrb r2, [r3, #5] + 80357e4: 687b ldr r3, [r7, #4] + 80357e6: f883 202f strb.w r2, [r3, #47] ; 0x2f /* maximum transfer unit */ netif->mtu = ETH_MAX_PAYLOAD; - 80357ba: 687b ldr r3, [r7, #4] - 80357bc: f240 52dc movw r2, #1500 ; 0x5dc - 80357c0: 851a strh r2, [r3, #40] ; 0x28 + 80357ea: 687b ldr r3, [r7, #4] + 80357ec: f240 52dc movw r2, #1500 ; 0x5dc + 80357f0: 851a strh r2, [r3, #40] ; 0x28 /* Accept broadcast address and ARP traffic */ /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */ #if LWIP_ARP netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; - 80357c2: 687b ldr r3, [r7, #4] - 80357c4: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 80357c8: f043 030a orr.w r3, r3, #10 - 80357cc: b2da uxtb r2, r3 - 80357ce: 687b ldr r3, [r7, #4] - 80357d0: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 80357f2: 687b ldr r3, [r7, #4] + 80357f4: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 80357f8: f043 030a orr.w r3, r3, #10 + 80357fc: b2da uxtb r2, r3 + 80357fe: 687b ldr r3, [r7, #4] + 8035800: f883 2031 strb.w r2, [r3, #49] ; 0x31 netif->flags |= NETIF_FLAG_BROADCAST; #endif /* LWIP_ARP */ /* USER CODE BEGIN PHY_PRE_CONFIG */ HAL_GPIO_WritePin(ETH_RST_GPIO_Port,ETH_RST_Pin,GPIO_PIN_RESET); - 80357d4: 2200 movs r2, #0 - 80357d6: 2140 movs r1, #64 ; 0x40 - 80357d8: 4817 ldr r0, [pc, #92] ; (8035838 ) - 80357da: f7f7 ffdf bl 802d79c + 8035804: 2200 movs r2, #0 + 8035806: 2140 movs r1, #64 ; 0x40 + 8035808: 4817 ldr r0, [pc, #92] ; (8035868 ) + 803580a: f7f7 ffdf bl 802d7cc HAL_Delay(1000); - 80357de: f44f 707a mov.w r0, #1000 ; 0x3e8 - 80357e2: f7f0 fbe3 bl 8025fac + 803580e: f44f 707a mov.w r0, #1000 ; 0x3e8 + 8035812: f7f0 fbe3 bl 8025fdc HAL_GPIO_WritePin(ETH_RST_GPIO_Port,ETH_RST_Pin,GPIO_PIN_SET); - 80357e6: 2201 movs r2, #1 - 80357e8: 2140 movs r1, #64 ; 0x40 - 80357ea: 4813 ldr r0, [pc, #76] ; (8035838 ) - 80357ec: f7f7 ffd6 bl 802d79c + 8035816: 2201 movs r2, #1 + 8035818: 2140 movs r1, #64 ; 0x40 + 803581a: 4813 ldr r0, [pc, #76] ; (8035868 ) + 803581c: f7f7 ffd6 bl 802d7cc HAL_Delay(1000); - 80357f0: f44f 707a mov.w r0, #1000 ; 0x3e8 - 80357f4: f7f0 fbda bl 8025fac + 8035820: f44f 707a mov.w r0, #1000 ; 0x3e8 + 8035824: f7f0 fbda bl 8025fdc /* USER CODE END PHY_PRE_CONFIG */ /* Set PHY IO functions */ LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx); - 80357f8: 4910 ldr r1, [pc, #64] ; (803583c ) - 80357fa: 4811 ldr r0, [pc, #68] ; (8035840 ) - 80357fc: f7f0 f9e3 bl 8025bc6 + 8035828: 4910 ldr r1, [pc, #64] ; (803586c ) + 803582a: 4811 ldr r0, [pc, #68] ; (8035870 ) + 803582c: f7f0 f9e3 bl 8025bf6 /* Initialize the LAN8742 ETH PHY */ LAN8742_Init(&LAN8742); - 8035800: 480f ldr r0, [pc, #60] ; (8035840 ) - 8035802: f7f0 fa12 bl 8025c2a + 8035830: 480f ldr r0, [pc, #60] ; (8035870 ) + 8035832: f7f0 fa12 bl 8025c5a if (hal_eth_init_status == HAL_OK) - 8035806: 7bfb ldrb r3, [r7, #15] - 8035808: 2b00 cmp r3, #0 - 803580a: d103 bne.n 8035814 + 8035836: 7bfb ldrb r3, [r7, #15] + 8035838: 2b00 cmp r3, #0 + 803583a: d103 bne.n 8035844 { /* Get link state */ ethernet_link_check_state(netif); - 803580c: 6878 ldr r0, [r7, #4] - 803580e: f000 fa27 bl 8035c60 + 803583c: 6878 ldr r0, [r7, #4] + 803583e: f000 fa27 bl 8035c90 #endif /* LWIP_ARP || LWIP_ETHERNET */ /* USER CODE BEGIN LOW_LEVEL_INIT */ /* USER CODE END LOW_LEVEL_INIT */ } - 8035812: e001 b.n 8035818 + 8035842: e001 b.n 8035848 Error_Handler(); - 8035814: f7ee fd72 bl 80242fc -} - 8035818: bf00 nop - 803581a: 3710 adds r7, #16 - 803581c: 46bd mov sp, r7 - 803581e: bd80 pop {r7, pc} - 8035820: 2400b8b4 .word 0x2400b8b4 - 8035824: 40028000 .word 0x40028000 - 8035828: 30040200 .word 0x30040200 - 803582c: 30040000 .word 0x30040000 - 8035830: 2400b964 .word 0x2400b964 - 8035834: 08044cf4 .word 0x08044cf4 - 8035838: 58020000 .word 0x58020000 - 803583c: 24000058 .word 0x24000058 - 8035840: 2400b99c .word 0x2400b99c - -08035844 : + 8035844: f7ee fd72 bl 802432c +} + 8035848: bf00 nop + 803584a: 3710 adds r7, #16 + 803584c: 46bd mov sp, r7 + 803584e: bd80 pop {r7, pc} + 8035850: 2400b8b4 .word 0x2400b8b4 + 8035854: 40028000 .word 0x40028000 + 8035858: 30040200 .word 0x30040200 + 803585c: 30040000 .word 0x30040000 + 8035860: 2400b964 .word 0x2400b964 + 8035864: 08044d24 .word 0x08044d24 + 8035868: 58020000 .word 0x58020000 + 803586c: 24000058 .word 0x24000058 + 8035870: 2400b99c .word 0x2400b99c + +08035874 : * to become available since the stack doesn't retry to send a packet * dropped because of memory failure (except for the TCP timers). */ static err_t low_level_output(struct netif *netif, struct pbuf *p) { - 8035844: b580 push {r7, lr} - 8035846: b092 sub sp, #72 ; 0x48 - 8035848: af00 add r7, sp, #0 - 803584a: 6078 str r0, [r7, #4] - 803584c: 6039 str r1, [r7, #0] + 8035874: b580 push {r7, lr} + 8035876: b092 sub sp, #72 ; 0x48 + 8035878: af00 add r7, sp, #0 + 803587a: 6078 str r0, [r7, #4] + 803587c: 6039 str r1, [r7, #0] uint32_t i = 0U; - 803584e: 2300 movs r3, #0 - 8035850: 647b str r3, [r7, #68] ; 0x44 + 803587e: 2300 movs r3, #0 + 8035880: 647b str r3, [r7, #68] ; 0x44 struct pbuf *q = NULL; - 8035852: 2300 movs r3, #0 - 8035854: 643b str r3, [r7, #64] ; 0x40 + 8035882: 2300 movs r3, #0 + 8035884: 643b str r3, [r7, #64] ; 0x40 err_t errval = ERR_OK; - 8035856: 2300 movs r3, #0 - 8035858: f887 303f strb.w r3, [r7, #63] ; 0x3f + 8035886: 2300 movs r3, #0 + 8035888: f887 303f strb.w r3, [r7, #63] ; 0x3f ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0}; - 803585c: f107 030c add.w r3, r7, #12 - 8035860: 2230 movs r2, #48 ; 0x30 - 8035862: 2100 movs r1, #0 - 8035864: 4618 mov r0, r3 - 8035866: f00b f853 bl 8040910 + 803588c: f107 030c add.w r3, r7, #12 + 8035890: 2230 movs r2, #48 ; 0x30 + 8035892: 2100 movs r1, #0 + 8035894: 4618 mov r0, r3 + 8035896: f00b f853 bl 8040940 memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef)); - 803586a: f107 030c add.w r3, r7, #12 - 803586e: 2230 movs r2, #48 ; 0x30 - 8035870: 2100 movs r1, #0 - 8035872: 4618 mov r0, r3 - 8035874: f00b f84c bl 8040910 + 803589a: f107 030c add.w r3, r7, #12 + 803589e: 2230 movs r2, #48 ; 0x30 + 80358a0: 2100 movs r1, #0 + 80358a2: 4618 mov r0, r3 + 80358a4: f00b f84c bl 8040940 for(q = p; q != NULL; q = q->next) - 8035878: 683b ldr r3, [r7, #0] - 803587a: 643b str r3, [r7, #64] ; 0x40 - 803587c: e045 b.n 803590a + 80358a8: 683b ldr r3, [r7, #0] + 80358aa: 643b str r3, [r7, #64] ; 0x40 + 80358ac: e045 b.n 803593a { if(i >= ETH_TX_DESC_CNT) - 803587e: 6c7b ldr r3, [r7, #68] ; 0x44 - 8035880: 2b03 cmp r3, #3 - 8035882: d902 bls.n 803588a + 80358ae: 6c7b ldr r3, [r7, #68] ; 0x44 + 80358b0: 2b03 cmp r3, #3 + 80358b2: d902 bls.n 80358ba return ERR_IF; - 8035884: f06f 030b mvn.w r3, #11 - 8035888: e055 b.n 8035936 + 80358b4: f06f 030b mvn.w r3, #11 + 80358b8: e055 b.n 8035966 Txbuffer[i].buffer = q->payload; - 803588a: 6c3b ldr r3, [r7, #64] ; 0x40 - 803588c: 6859 ldr r1, [r3, #4] - 803588e: 6c7a ldr r2, [r7, #68] ; 0x44 - 8035890: 4613 mov r3, r2 - 8035892: 005b lsls r3, r3, #1 - 8035894: 4413 add r3, r2 - 8035896: 009b lsls r3, r3, #2 - 8035898: 3348 adds r3, #72 ; 0x48 - 803589a: 443b add r3, r7 - 803589c: 3b3c subs r3, #60 ; 0x3c - 803589e: 6019 str r1, [r3, #0] + 80358ba: 6c3b ldr r3, [r7, #64] ; 0x40 + 80358bc: 6859 ldr r1, [r3, #4] + 80358be: 6c7a ldr r2, [r7, #68] ; 0x44 + 80358c0: 4613 mov r3, r2 + 80358c2: 005b lsls r3, r3, #1 + 80358c4: 4413 add r3, r2 + 80358c6: 009b lsls r3, r3, #2 + 80358c8: 3348 adds r3, #72 ; 0x48 + 80358ca: 443b add r3, r7 + 80358cc: 3b3c subs r3, #60 ; 0x3c + 80358ce: 6019 str r1, [r3, #0] Txbuffer[i].len = q->len; - 80358a0: 6c3b ldr r3, [r7, #64] ; 0x40 - 80358a2: 895b ldrh r3, [r3, #10] - 80358a4: 4619 mov r1, r3 - 80358a6: 6c7a ldr r2, [r7, #68] ; 0x44 - 80358a8: 4613 mov r3, r2 - 80358aa: 005b lsls r3, r3, #1 - 80358ac: 4413 add r3, r2 - 80358ae: 009b lsls r3, r3, #2 - 80358b0: 3348 adds r3, #72 ; 0x48 - 80358b2: 443b add r3, r7 - 80358b4: 3b38 subs r3, #56 ; 0x38 - 80358b6: 6019 str r1, [r3, #0] + 80358d0: 6c3b ldr r3, [r7, #64] ; 0x40 + 80358d2: 895b ldrh r3, [r3, #10] + 80358d4: 4619 mov r1, r3 + 80358d6: 6c7a ldr r2, [r7, #68] ; 0x44 + 80358d8: 4613 mov r3, r2 + 80358da: 005b lsls r3, r3, #1 + 80358dc: 4413 add r3, r2 + 80358de: 009b lsls r3, r3, #2 + 80358e0: 3348 adds r3, #72 ; 0x48 + 80358e2: 443b add r3, r7 + 80358e4: 3b38 subs r3, #56 ; 0x38 + 80358e6: 6019 str r1, [r3, #0] if(i>0) - 80358b8: 6c7b ldr r3, [r7, #68] ; 0x44 - 80358ba: 2b00 cmp r3, #0 - 80358bc: d011 beq.n 80358e2 + 80358e8: 6c7b ldr r3, [r7, #68] ; 0x44 + 80358ea: 2b00 cmp r3, #0 + 80358ec: d011 beq.n 8035912 { Txbuffer[i-1].next = &Txbuffer[i]; - 80358be: 6c7b ldr r3, [r7, #68] ; 0x44 - 80358c0: 1e5a subs r2, r3, #1 - 80358c2: f107 000c add.w r0, r7, #12 - 80358c6: 6c79 ldr r1, [r7, #68] ; 0x44 - 80358c8: 460b mov r3, r1 - 80358ca: 005b lsls r3, r3, #1 - 80358cc: 440b add r3, r1 - 80358ce: 009b lsls r3, r3, #2 - 80358d0: 18c1 adds r1, r0, r3 - 80358d2: 4613 mov r3, r2 - 80358d4: 005b lsls r3, r3, #1 - 80358d6: 4413 add r3, r2 - 80358d8: 009b lsls r3, r3, #2 - 80358da: 3348 adds r3, #72 ; 0x48 - 80358dc: 443b add r3, r7 - 80358de: 3b34 subs r3, #52 ; 0x34 - 80358e0: 6019 str r1, [r3, #0] + 80358ee: 6c7b ldr r3, [r7, #68] ; 0x44 + 80358f0: 1e5a subs r2, r3, #1 + 80358f2: f107 000c add.w r0, r7, #12 + 80358f6: 6c79 ldr r1, [r7, #68] ; 0x44 + 80358f8: 460b mov r3, r1 + 80358fa: 005b lsls r3, r3, #1 + 80358fc: 440b add r3, r1 + 80358fe: 009b lsls r3, r3, #2 + 8035900: 18c1 adds r1, r0, r3 + 8035902: 4613 mov r3, r2 + 8035904: 005b lsls r3, r3, #1 + 8035906: 4413 add r3, r2 + 8035908: 009b lsls r3, r3, #2 + 803590a: 3348 adds r3, #72 ; 0x48 + 803590c: 443b add r3, r7 + 803590e: 3b34 subs r3, #52 ; 0x34 + 8035910: 6019 str r1, [r3, #0] } if(q->next == NULL) - 80358e2: 6c3b ldr r3, [r7, #64] ; 0x40 - 80358e4: 681b ldr r3, [r3, #0] - 80358e6: 2b00 cmp r3, #0 - 80358e8: d109 bne.n 80358fe + 8035912: 6c3b ldr r3, [r7, #64] ; 0x40 + 8035914: 681b ldr r3, [r3, #0] + 8035916: 2b00 cmp r3, #0 + 8035918: d109 bne.n 803592e { Txbuffer[i].next = NULL; - 80358ea: 6c7a ldr r2, [r7, #68] ; 0x44 - 80358ec: 4613 mov r3, r2 - 80358ee: 005b lsls r3, r3, #1 - 80358f0: 4413 add r3, r2 - 80358f2: 009b lsls r3, r3, #2 - 80358f4: 3348 adds r3, #72 ; 0x48 - 80358f6: 443b add r3, r7 - 80358f8: 3b34 subs r3, #52 ; 0x34 - 80358fa: 2200 movs r2, #0 - 80358fc: 601a str r2, [r3, #0] + 803591a: 6c7a ldr r2, [r7, #68] ; 0x44 + 803591c: 4613 mov r3, r2 + 803591e: 005b lsls r3, r3, #1 + 8035920: 4413 add r3, r2 + 8035922: 009b lsls r3, r3, #2 + 8035924: 3348 adds r3, #72 ; 0x48 + 8035926: 443b add r3, r7 + 8035928: 3b34 subs r3, #52 ; 0x34 + 803592a: 2200 movs r2, #0 + 803592c: 601a str r2, [r3, #0] } i++; - 80358fe: 6c7b ldr r3, [r7, #68] ; 0x44 - 8035900: 3301 adds r3, #1 - 8035902: 647b str r3, [r7, #68] ; 0x44 + 803592e: 6c7b ldr r3, [r7, #68] ; 0x44 + 8035930: 3301 adds r3, #1 + 8035932: 647b str r3, [r7, #68] ; 0x44 for(q = p; q != NULL; q = q->next) - 8035904: 6c3b ldr r3, [r7, #64] ; 0x40 - 8035906: 681b ldr r3, [r3, #0] - 8035908: 643b str r3, [r7, #64] ; 0x40 - 803590a: 6c3b ldr r3, [r7, #64] ; 0x40 - 803590c: 2b00 cmp r3, #0 - 803590e: d1b6 bne.n 803587e + 8035934: 6c3b ldr r3, [r7, #64] ; 0x40 + 8035936: 681b ldr r3, [r3, #0] + 8035938: 643b str r3, [r7, #64] ; 0x40 + 803593a: 6c3b ldr r3, [r7, #64] ; 0x40 + 803593c: 2b00 cmp r3, #0 + 803593e: d1b6 bne.n 80358ae } TxConfig.Length = p->tot_len; - 8035910: 683b ldr r3, [r7, #0] - 8035912: 891b ldrh r3, [r3, #8] - 8035914: 461a mov r2, r3 - 8035916: 4b0a ldr r3, [pc, #40] ; (8035940 ) - 8035918: 605a str r2, [r3, #4] + 8035940: 683b ldr r3, [r7, #0] + 8035942: 891b ldrh r3, [r3, #8] + 8035944: 461a mov r2, r3 + 8035946: 4b0a ldr r3, [pc, #40] ; (8035970 ) + 8035948: 605a str r2, [r3, #4] TxConfig.TxBuffer = Txbuffer; - 803591a: 4a09 ldr r2, [pc, #36] ; (8035940 ) - 803591c: f107 030c add.w r3, r7, #12 - 8035920: 6093 str r3, [r2, #8] + 803594a: 4a09 ldr r2, [pc, #36] ; (8035970 ) + 803594c: f107 030c add.w r3, r7, #12 + 8035950: 6093 str r3, [r2, #8] TxConfig.pData = p; - 8035922: 4a07 ldr r2, [pc, #28] ; (8035940 ) - 8035924: 683b ldr r3, [r7, #0] - 8035926: 6353 str r3, [r2, #52] ; 0x34 + 8035952: 4a07 ldr r2, [pc, #28] ; (8035970 ) + 8035954: 683b ldr r3, [r7, #0] + 8035956: 6353 str r3, [r2, #52] ; 0x34 HAL_ETH_Transmit(&heth, &TxConfig, ETH_DMA_TRANSMIT_TIMEOUT); - 8035928: 2214 movs r2, #20 - 803592a: 4905 ldr r1, [pc, #20] ; (8035940 ) - 803592c: 4805 ldr r0, [pc, #20] ; (8035944 ) - 803592e: f7f5 f8c3 bl 802aab8 + 8035958: 2214 movs r2, #20 + 803595a: 4905 ldr r1, [pc, #20] ; (8035970 ) + 803595c: 4805 ldr r0, [pc, #20] ; (8035974 ) + 803595e: f7f5 f8c3 bl 802aae8 return errval; - 8035932: f997 303f ldrsb.w r3, [r7, #63] ; 0x3f + 8035962: f997 303f ldrsb.w r3, [r7, #63] ; 0x3f } - 8035936: 4618 mov r0, r3 - 8035938: 3748 adds r7, #72 ; 0x48 - 803593a: 46bd mov sp, r7 - 803593c: bd80 pop {r7, pc} - 803593e: bf00 nop - 8035940: 2400b964 .word 0x2400b964 - 8035944: 2400b8b4 .word 0x2400b8b4 + 8035966: 4618 mov r0, r3 + 8035968: 3748 adds r7, #72 ; 0x48 + 803596a: 46bd mov sp, r7 + 803596c: bd80 pop {r7, pc} + 803596e: bf00 nop + 8035970: 2400b964 .word 0x2400b964 + 8035974: 2400b8b4 .word 0x2400b8b4 -08035948 : +08035978 : * @param netif the lwip network interface structure for this ethernetif * @return a pbuf filled with the received packet (including MAC header) * NULL on memory error */ static struct pbuf * low_level_input(struct netif *netif) { - 8035948: b580 push {r7, lr} - 803594a: b084 sub sp, #16 - 803594c: af00 add r7, sp, #0 - 803594e: 6078 str r0, [r7, #4] + 8035978: b580 push {r7, lr} + 803597a: b084 sub sp, #16 + 803597c: af00 add r7, sp, #0 + 803597e: 6078 str r0, [r7, #4] struct pbuf *p = NULL; - 8035950: 2300 movs r3, #0 - 8035952: 60fb str r3, [r7, #12] + 8035980: 2300 movs r3, #0 + 8035982: 60fb str r3, [r7, #12] if(RxAllocStatus == RX_ALLOC_OK) - 8035954: 4b07 ldr r3, [pc, #28] ; (8035974 ) - 8035956: 781b ldrb r3, [r3, #0] - 8035958: 2b00 cmp r3, #0 - 803595a: d105 bne.n 8035968 + 8035984: 4b07 ldr r3, [pc, #28] ; (80359a4 ) + 8035986: 781b ldrb r3, [r3, #0] + 8035988: 2b00 cmp r3, #0 + 803598a: d105 bne.n 8035998 { HAL_ETH_ReadData(&heth, (void **)&p); - 803595c: f107 030c add.w r3, r7, #12 - 8035960: 4619 mov r1, r3 - 8035962: 4805 ldr r0, [pc, #20] ; (8035978 ) - 8035964: f7f5 f93f bl 802abe6 + 803598c: f107 030c add.w r3, r7, #12 + 8035990: 4619 mov r1, r3 + 8035992: 4805 ldr r0, [pc, #20] ; (80359a8 ) + 8035994: f7f5 f93f bl 802ac16 } return p; - 8035968: 68fb ldr r3, [r7, #12] + 8035998: 68fb ldr r3, [r7, #12] } - 803596a: 4618 mov r0, r3 - 803596c: 3710 adds r7, #16 - 803596e: 46bd mov sp, r7 - 8035970: bd80 pop {r7, pc} - 8035972: bf00 nop - 8035974: 2400b8b0 .word 0x2400b8b0 - 8035978: 2400b8b4 .word 0x2400b8b4 + 803599a: 4618 mov r0, r3 + 803599c: 3710 adds r7, #16 + 803599e: 46bd mov sp, r7 + 80359a0: bd80 pop {r7, pc} + 80359a2: bf00 nop + 80359a4: 2400b8b0 .word 0x2400b8b0 + 80359a8: 2400b8b4 .word 0x2400b8b4 -0803597c : +080359ac : * the appropriate input function is called. * * @param netif the lwip network interface structure for this ethernetif */ void ethernetif_input(struct netif *netif) { - 803597c: b580 push {r7, lr} - 803597e: b084 sub sp, #16 - 8035980: af00 add r7, sp, #0 - 8035982: 6078 str r0, [r7, #4] + 80359ac: b580 push {r7, lr} + 80359ae: b084 sub sp, #16 + 80359b0: af00 add r7, sp, #0 + 80359b2: 6078 str r0, [r7, #4] struct pbuf *p = NULL; - 8035984: 2300 movs r3, #0 - 8035986: 60fb str r3, [r7, #12] + 80359b4: 2300 movs r3, #0 + 80359b6: 60fb str r3, [r7, #12] do { p = low_level_input( netif ); - 8035988: 6878 ldr r0, [r7, #4] - 803598a: f7ff ffdd bl 8035948 - 803598e: 60f8 str r0, [r7, #12] + 80359b8: 6878 ldr r0, [r7, #4] + 80359ba: f7ff ffdd bl 8035978 + 80359be: 60f8 str r0, [r7, #12] if (p != NULL) - 8035990: 68fb ldr r3, [r7, #12] - 8035992: 2b00 cmp r3, #0 - 8035994: d00a beq.n 80359ac + 80359c0: 68fb ldr r3, [r7, #12] + 80359c2: 2b00 cmp r3, #0 + 80359c4: d00a beq.n 80359dc { if (netif->input( p, netif) != ERR_OK ) - 8035996: 687b ldr r3, [r7, #4] - 8035998: 691b ldr r3, [r3, #16] - 803599a: 6879 ldr r1, [r7, #4] - 803599c: 68f8 ldr r0, [r7, #12] - 803599e: 4798 blx r3 - 80359a0: 4603 mov r3, r0 - 80359a2: 2b00 cmp r3, #0 - 80359a4: d002 beq.n 80359ac + 80359c6: 687b ldr r3, [r7, #4] + 80359c8: 691b ldr r3, [r3, #16] + 80359ca: 6879 ldr r1, [r7, #4] + 80359cc: 68f8 ldr r0, [r7, #12] + 80359ce: 4798 blx r3 + 80359d0: 4603 mov r3, r0 + 80359d2: 2b00 cmp r3, #0 + 80359d4: d002 beq.n 80359dc { pbuf_free(p); - 80359a6: 68f8 ldr r0, [r7, #12] - 80359a8: f001 feb0 bl 803770c + 80359d6: 68f8 ldr r0, [r7, #12] + 80359d8: f001 feb0 bl 803773c } } } while(p!=NULL); - 80359ac: 68fb ldr r3, [r7, #12] - 80359ae: 2b00 cmp r3, #0 - 80359b0: d1ea bne.n 8035988 + 80359dc: 68fb ldr r3, [r7, #12] + 80359de: 2b00 cmp r3, #0 + 80359e0: d1ea bne.n 80359b8 } - 80359b2: bf00 nop - 80359b4: bf00 nop - 80359b6: 3710 adds r7, #16 - 80359b8: 46bd mov sp, r7 - 80359ba: bd80 pop {r7, pc} + 80359e2: bf00 nop + 80359e4: bf00 nop + 80359e6: 3710 adds r7, #16 + 80359e8: 46bd mov sp, r7 + 80359ea: bd80 pop {r7, pc} -080359bc : +080359ec : * @return ERR_OK if the loopif is initialized * ERR_MEM if private data couldn't be allocated * any other err_t on error */ err_t ethernetif_init(struct netif *netif) { - 80359bc: b580 push {r7, lr} - 80359be: b082 sub sp, #8 - 80359c0: af00 add r7, sp, #0 - 80359c2: 6078 str r0, [r7, #4] + 80359ec: b580 push {r7, lr} + 80359ee: b082 sub sp, #8 + 80359f0: af00 add r7, sp, #0 + 80359f2: 6078 str r0, [r7, #4] LWIP_ASSERT("netif != NULL", (netif != NULL)); - 80359c4: 687b ldr r3, [r7, #4] - 80359c6: 2b00 cmp r3, #0 - 80359c8: d106 bne.n 80359d8 - 80359ca: 4b0e ldr r3, [pc, #56] ; (8035a04 ) - 80359cc: f240 128b movw r2, #395 ; 0x18b - 80359d0: 490d ldr r1, [pc, #52] ; (8035a08 ) - 80359d2: 480e ldr r0, [pc, #56] ; (8035a0c ) - 80359d4: f00b f884 bl 8040ae0 + 80359f4: 687b ldr r3, [r7, #4] + 80359f6: 2b00 cmp r3, #0 + 80359f8: d106 bne.n 8035a08 + 80359fa: 4b0e ldr r3, [pc, #56] ; (8035a34 ) + 80359fc: f240 128b movw r2, #395 ; 0x18b + 8035a00: 490d ldr r1, [pc, #52] ; (8035a38 ) + 8035a02: 480e ldr r0, [pc, #56] ; (8035a3c ) + 8035a04: f00b f884 bl 8040b10 * The last argument should be replaced with your link speed, in units * of bits per second. */ // MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS); netif->name[0] = IFNAME0; - 80359d8: 687b ldr r3, [r7, #4] - 80359da: 2273 movs r2, #115 ; 0x73 - 80359dc: f883 2032 strb.w r2, [r3, #50] ; 0x32 + 8035a08: 687b ldr r3, [r7, #4] + 8035a0a: 2273 movs r2, #115 ; 0x73 + 8035a0c: f883 2032 strb.w r2, [r3, #50] ; 0x32 netif->name[1] = IFNAME1; - 80359e0: 687b ldr r3, [r7, #4] - 80359e2: 2274 movs r2, #116 ; 0x74 - 80359e4: f883 2033 strb.w r2, [r3, #51] ; 0x33 + 8035a10: 687b ldr r3, [r7, #4] + 8035a12: 2274 movs r2, #116 ; 0x74 + 8035a14: f883 2033 strb.w r2, [r3, #51] ; 0x33 * is available...) */ #if LWIP_IPV4 #if LWIP_ARP || LWIP_ETHERNET #if LWIP_ARP netif->output = etharp_output; - 80359e8: 687b ldr r3, [r7, #4] - 80359ea: 4a09 ldr r2, [pc, #36] ; (8035a10 ) - 80359ec: 615a str r2, [r3, #20] + 8035a18: 687b ldr r3, [r7, #4] + 8035a1a: 4a09 ldr r2, [pc, #36] ; (8035a40 ) + 8035a1c: 615a str r2, [r3, #20] #if LWIP_IPV6 netif->output_ip6 = ethip6_output; #endif /* LWIP_IPV6 */ netif->linkoutput = low_level_output; - 80359ee: 687b ldr r3, [r7, #4] - 80359f0: 4a08 ldr r2, [pc, #32] ; (8035a14 ) - 80359f2: 619a str r2, [r3, #24] + 8035a1e: 687b ldr r3, [r7, #4] + 8035a20: 4a08 ldr r2, [pc, #32] ; (8035a44 ) + 8035a22: 619a str r2, [r3, #24] /* initialize the hardware */ low_level_init(netif); - 80359f4: 6878 ldr r0, [r7, #4] - 80359f6: f7ff fe7b bl 80356f0 + 8035a24: 6878 ldr r0, [r7, #4] + 8035a26: f7ff fe7b bl 8035720 return ERR_OK; - 80359fa: 2300 movs r3, #0 -} - 80359fc: 4618 mov r0, r3 - 80359fe: 3708 adds r7, #8 - 8035a00: 46bd mov sp, r7 - 8035a02: bd80 pop {r7, pc} - 8035a04: 0804229c .word 0x0804229c - 8035a08: 080422b8 .word 0x080422b8 - 8035a0c: 080422c8 .word 0x080422c8 - 8035a10: 0803eaf9 .word 0x0803eaf9 - 8035a14: 08035845 .word 0x08035845 - -08035a18 : + 8035a2a: 2300 movs r3, #0 +} + 8035a2c: 4618 mov r0, r3 + 8035a2e: 3708 adds r7, #8 + 8035a30: 46bd mov sp, r7 + 8035a32: bd80 pop {r7, pc} + 8035a34: 080422cc .word 0x080422cc + 8035a38: 080422e8 .word 0x080422e8 + 8035a3c: 080422f8 .word 0x080422f8 + 8035a40: 0803eb29 .word 0x0803eb29 + 8035a44: 08035875 .word 0x08035875 + +08035a48 : * @brief Custom Rx pbuf free callback * @param pbuf: pbuf to be freed * @retval None */ void pbuf_free_custom(struct pbuf *p) { - 8035a18: b580 push {r7, lr} - 8035a1a: b084 sub sp, #16 - 8035a1c: af00 add r7, sp, #0 - 8035a1e: 6078 str r0, [r7, #4] + 8035a48: b580 push {r7, lr} + 8035a4a: b084 sub sp, #16 + 8035a4c: af00 add r7, sp, #0 + 8035a4e: 6078 str r0, [r7, #4] struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p; - 8035a20: 687b ldr r3, [r7, #4] - 8035a22: 60fb str r3, [r7, #12] + 8035a50: 687b ldr r3, [r7, #4] + 8035a52: 60fb str r3, [r7, #12] LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf); - 8035a24: 68f9 ldr r1, [r7, #12] - 8035a26: 4807 ldr r0, [pc, #28] ; (8035a44 ) - 8035a28: f000 ffba bl 80369a0 + 8035a54: 68f9 ldr r1, [r7, #12] + 8035a56: 4807 ldr r0, [pc, #28] ; (8035a74 ) + 8035a58: f000 ffba bl 80369d0 /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to * call HAL_ETH_GetRxDataBuffer to rebuild the Rx descriptors. */ if (RxAllocStatus == RX_ALLOC_ERROR) - 8035a2c: 4b06 ldr r3, [pc, #24] ; (8035a48 ) - 8035a2e: 781b ldrb r3, [r3, #0] - 8035a30: 2b01 cmp r3, #1 - 8035a32: d102 bne.n 8035a3a + 8035a5c: 4b06 ldr r3, [pc, #24] ; (8035a78 ) + 8035a5e: 781b ldrb r3, [r3, #0] + 8035a60: 2b01 cmp r3, #1 + 8035a62: d102 bne.n 8035a6a { RxAllocStatus = RX_ALLOC_OK; - 8035a34: 4b04 ldr r3, [pc, #16] ; (8035a48 ) - 8035a36: 2200 movs r2, #0 - 8035a38: 701a strb r2, [r3, #0] + 8035a64: 4b04 ldr r3, [pc, #16] ; (8035a78 ) + 8035a66: 2200 movs r2, #0 + 8035a68: 701a strb r2, [r3, #0] } } - 8035a3a: bf00 nop - 8035a3c: 3710 adds r7, #16 - 8035a3e: 46bd mov sp, r7 - 8035a40: bd80 pop {r7, pc} - 8035a42: bf00 nop - 8035a44: 08044cf4 .word 0x08044cf4 - 8035a48: 2400b8b0 .word 0x2400b8b0 + 8035a6a: bf00 nop + 8035a6c: 3710 adds r7, #16 + 8035a6e: 46bd mov sp, r7 + 8035a70: bd80 pop {r7, pc} + 8035a72: bf00 nop + 8035a74: 08044d24 .word 0x08044d24 + 8035a78: 2400b8b0 .word 0x2400b8b0 -08035a4c : +08035a7c : * when LWIP_TIMERS == 1 and NO_SYS == 1 * @param None * @retval Current Time value */ u32_t sys_now(void) { - 8035a4c: b580 push {r7, lr} - 8035a4e: af00 add r7, sp, #0 + 8035a7c: b580 push {r7, lr} + 8035a7e: af00 add r7, sp, #0 return HAL_GetTick(); - 8035a50: f7f0 faa0 bl 8025f94 - 8035a54: 4603 mov r3, r0 + 8035a80: f7f0 faa0 bl 8025fc4 + 8035a84: 4603 mov r3, r0 } - 8035a56: 4618 mov r0, r3 - 8035a58: bd80 pop {r7, pc} + 8035a86: 4618 mov r0, r3 + 8035a88: bd80 pop {r7, pc} ... -08035a5c : +08035a8c : * @param ethHandle: ETH handle * @retval None */ void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle) { - 8035a5c: b580 push {r7, lr} - 8035a5e: b08e sub sp, #56 ; 0x38 - 8035a60: af00 add r7, sp, #0 - 8035a62: 6078 str r0, [r7, #4] + 8035a8c: b580 push {r7, lr} + 8035a8e: b08e sub sp, #56 ; 0x38 + 8035a90: af00 add r7, sp, #0 + 8035a92: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8035a64: f107 0324 add.w r3, r7, #36 ; 0x24 - 8035a68: 2200 movs r2, #0 - 8035a6a: 601a str r2, [r3, #0] - 8035a6c: 605a str r2, [r3, #4] - 8035a6e: 609a str r2, [r3, #8] - 8035a70: 60da str r2, [r3, #12] - 8035a72: 611a str r2, [r3, #16] + 8035a94: f107 0324 add.w r3, r7, #36 ; 0x24 + 8035a98: 2200 movs r2, #0 + 8035a9a: 601a str r2, [r3, #0] + 8035a9c: 605a str r2, [r3, #4] + 8035a9e: 609a str r2, [r3, #8] + 8035aa0: 60da str r2, [r3, #12] + 8035aa2: 611a str r2, [r3, #16] if(ethHandle->Instance==ETH) - 8035a74: 687b ldr r3, [r7, #4] - 8035a76: 681b ldr r3, [r3, #0] - 8035a78: 4a4d ldr r2, [pc, #308] ; (8035bb0 ) - 8035a7a: 4293 cmp r3, r2 - 8035a7c: f040 8093 bne.w 8035ba6 + 8035aa4: 687b ldr r3, [r7, #4] + 8035aa6: 681b ldr r3, [r3, #0] + 8035aa8: 4a4d ldr r2, [pc, #308] ; (8035be0 ) + 8035aaa: 4293 cmp r3, r2 + 8035aac: f040 8093 bne.w 8035bd6 { /* USER CODE BEGIN ETH_MspInit 0 */ /* USER CODE END ETH_MspInit 0 */ /* Enable Peripheral clock */ __HAL_RCC_ETH1MAC_CLK_ENABLE(); - 8035a80: 4b4c ldr r3, [pc, #304] ; (8035bb4 ) - 8035a82: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035a86: 4a4b ldr r2, [pc, #300] ; (8035bb4 ) - 8035a88: f443 4300 orr.w r3, r3, #32768 ; 0x8000 - 8035a8c: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 - 8035a90: 4b48 ldr r3, [pc, #288] ; (8035bb4 ) - 8035a92: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035a96: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8035a9a: 623b str r3, [r7, #32] - 8035a9c: 6a3b ldr r3, [r7, #32] + 8035ab0: 4b4c ldr r3, [pc, #304] ; (8035be4 ) + 8035ab2: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035ab6: 4a4b ldr r2, [pc, #300] ; (8035be4 ) + 8035ab8: f443 4300 orr.w r3, r3, #32768 ; 0x8000 + 8035abc: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 + 8035ac0: 4b48 ldr r3, [pc, #288] ; (8035be4 ) + 8035ac2: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035ac6: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 8035aca: 623b str r3, [r7, #32] + 8035acc: 6a3b ldr r3, [r7, #32] __HAL_RCC_ETH1TX_CLK_ENABLE(); - 8035a9e: 4b45 ldr r3, [pc, #276] ; (8035bb4 ) - 8035aa0: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035aa4: 4a43 ldr r2, [pc, #268] ; (8035bb4 ) - 8035aa6: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8035aaa: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 - 8035aae: 4b41 ldr r3, [pc, #260] ; (8035bb4 ) - 8035ab0: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035ab4: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8035ab8: 61fb str r3, [r7, #28] - 8035aba: 69fb ldr r3, [r7, #28] + 8035ace: 4b45 ldr r3, [pc, #276] ; (8035be4 ) + 8035ad0: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035ad4: 4a43 ldr r2, [pc, #268] ; (8035be4 ) + 8035ad6: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8035ada: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 + 8035ade: 4b41 ldr r3, [pc, #260] ; (8035be4 ) + 8035ae0: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035ae4: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8035ae8: 61fb str r3, [r7, #28] + 8035aea: 69fb ldr r3, [r7, #28] __HAL_RCC_ETH1RX_CLK_ENABLE(); - 8035abc: 4b3d ldr r3, [pc, #244] ; (8035bb4 ) - 8035abe: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035ac2: 4a3c ldr r2, [pc, #240] ; (8035bb4 ) - 8035ac4: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8035ac8: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 - 8035acc: 4b39 ldr r3, [pc, #228] ; (8035bb4 ) - 8035ace: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035ad2: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8035ad6: 61bb str r3, [r7, #24] - 8035ad8: 69bb ldr r3, [r7, #24] + 8035aec: 4b3d ldr r3, [pc, #244] ; (8035be4 ) + 8035aee: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035af2: 4a3c ldr r2, [pc, #240] ; (8035be4 ) + 8035af4: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8035af8: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 + 8035afc: 4b39 ldr r3, [pc, #228] ; (8035be4 ) + 8035afe: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035b02: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8035b06: 61bb str r3, [r7, #24] + 8035b08: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOC_CLK_ENABLE(); - 8035ada: 4b36 ldr r3, [pc, #216] ; (8035bb4 ) - 8035adc: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035ae0: 4a34 ldr r2, [pc, #208] ; (8035bb4 ) - 8035ae2: f043 0304 orr.w r3, r3, #4 - 8035ae6: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8035aea: 4b32 ldr r3, [pc, #200] ; (8035bb4 ) - 8035aec: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035af0: f003 0304 and.w r3, r3, #4 - 8035af4: 617b str r3, [r7, #20] - 8035af6: 697b ldr r3, [r7, #20] + 8035b0a: 4b36 ldr r3, [pc, #216] ; (8035be4 ) + 8035b0c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035b10: 4a34 ldr r2, [pc, #208] ; (8035be4 ) + 8035b12: f043 0304 orr.w r3, r3, #4 + 8035b16: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8035b1a: 4b32 ldr r3, [pc, #200] ; (8035be4 ) + 8035b1c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035b20: f003 0304 and.w r3, r3, #4 + 8035b24: 617b str r3, [r7, #20] + 8035b26: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8035af8: 4b2e ldr r3, [pc, #184] ; (8035bb4 ) - 8035afa: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035afe: 4a2d ldr r2, [pc, #180] ; (8035bb4 ) - 8035b00: f043 0301 orr.w r3, r3, #1 - 8035b04: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8035b08: 4b2a ldr r3, [pc, #168] ; (8035bb4 ) - 8035b0a: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035b0e: f003 0301 and.w r3, r3, #1 - 8035b12: 613b str r3, [r7, #16] - 8035b14: 693b ldr r3, [r7, #16] + 8035b28: 4b2e ldr r3, [pc, #184] ; (8035be4 ) + 8035b2a: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035b2e: 4a2d ldr r2, [pc, #180] ; (8035be4 ) + 8035b30: f043 0301 orr.w r3, r3, #1 + 8035b34: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8035b38: 4b2a ldr r3, [pc, #168] ; (8035be4 ) + 8035b3a: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035b3e: f003 0301 and.w r3, r3, #1 + 8035b42: 613b str r3, [r7, #16] + 8035b44: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8035b16: 4b27 ldr r3, [pc, #156] ; (8035bb4 ) - 8035b18: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035b1c: 4a25 ldr r2, [pc, #148] ; (8035bb4 ) - 8035b1e: f043 0302 orr.w r3, r3, #2 - 8035b22: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8035b26: 4b23 ldr r3, [pc, #140] ; (8035bb4 ) - 8035b28: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035b2c: f003 0302 and.w r3, r3, #2 - 8035b30: 60fb str r3, [r7, #12] - 8035b32: 68fb ldr r3, [r7, #12] + 8035b46: 4b27 ldr r3, [pc, #156] ; (8035be4 ) + 8035b48: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035b4c: 4a25 ldr r2, [pc, #148] ; (8035be4 ) + 8035b4e: f043 0302 orr.w r3, r3, #2 + 8035b52: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8035b56: 4b23 ldr r3, [pc, #140] ; (8035be4 ) + 8035b58: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035b5c: f003 0302 and.w r3, r3, #2 + 8035b60: 60fb str r3, [r7, #12] + 8035b62: 68fb ldr r3, [r7, #12] PC5 ------> ETH_RXD1 PB11 ------> ETH_TX_EN PB12 ------> ETH_TXD0 PB13 ------> ETH_TXD1 */ GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5; - 8035b34: 2332 movs r3, #50 ; 0x32 - 8035b36: 627b str r3, [r7, #36] ; 0x24 + 8035b64: 2332 movs r3, #50 ; 0x32 + 8035b66: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8035b38: 2302 movs r3, #2 - 8035b3a: 62bb str r3, [r7, #40] ; 0x28 + 8035b68: 2302 movs r3, #2 + 8035b6a: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8035b3c: 2300 movs r3, #0 - 8035b3e: 62fb str r3, [r7, #44] ; 0x2c + 8035b6c: 2300 movs r3, #0 + 8035b6e: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8035b40: 2303 movs r3, #3 - 8035b42: 633b str r3, [r7, #48] ; 0x30 + 8035b70: 2303 movs r3, #3 + 8035b72: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8035b44: 230b movs r3, #11 - 8035b46: 637b str r3, [r7, #52] ; 0x34 + 8035b74: 230b movs r3, #11 + 8035b76: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8035b48: f107 0324 add.w r3, r7, #36 ; 0x24 - 8035b4c: 4619 mov r1, r3 - 8035b4e: 481a ldr r0, [pc, #104] ; (8035bb8 ) - 8035b50: f7f7 fc74 bl 802d43c + 8035b78: f107 0324 add.w r3, r7, #36 ; 0x24 + 8035b7c: 4619 mov r1, r3 + 8035b7e: 481a ldr r0, [pc, #104] ; (8035be8 ) + 8035b80: f7f7 fc74 bl 802d46c GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7; - 8035b54: 2386 movs r3, #134 ; 0x86 - 8035b56: 627b str r3, [r7, #36] ; 0x24 + 8035b84: 2386 movs r3, #134 ; 0x86 + 8035b86: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8035b58: 2302 movs r3, #2 - 8035b5a: 62bb str r3, [r7, #40] ; 0x28 + 8035b88: 2302 movs r3, #2 + 8035b8a: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8035b5c: 2300 movs r3, #0 - 8035b5e: 62fb str r3, [r7, #44] ; 0x2c + 8035b8c: 2300 movs r3, #0 + 8035b8e: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8035b60: 2303 movs r3, #3 - 8035b62: 633b str r3, [r7, #48] ; 0x30 + 8035b90: 2303 movs r3, #3 + 8035b92: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8035b64: 230b movs r3, #11 - 8035b66: 637b str r3, [r7, #52] ; 0x34 + 8035b94: 230b movs r3, #11 + 8035b96: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8035b68: f107 0324 add.w r3, r7, #36 ; 0x24 - 8035b6c: 4619 mov r1, r3 - 8035b6e: 4813 ldr r0, [pc, #76] ; (8035bbc ) - 8035b70: f7f7 fc64 bl 802d43c + 8035b98: f107 0324 add.w r3, r7, #36 ; 0x24 + 8035b9c: 4619 mov r1, r3 + 8035b9e: 4813 ldr r0, [pc, #76] ; (8035bec ) + 8035ba0: f7f7 fc64 bl 802d46c GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13; - 8035b74: f44f 5360 mov.w r3, #14336 ; 0x3800 - 8035b78: 627b str r3, [r7, #36] ; 0x24 + 8035ba4: f44f 5360 mov.w r3, #14336 ; 0x3800 + 8035ba8: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8035b7a: 2302 movs r3, #2 - 8035b7c: 62bb str r3, [r7, #40] ; 0x28 + 8035baa: 2302 movs r3, #2 + 8035bac: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8035b7e: 2300 movs r3, #0 - 8035b80: 62fb str r3, [r7, #44] ; 0x2c + 8035bae: 2300 movs r3, #0 + 8035bb0: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8035b82: 2303 movs r3, #3 - 8035b84: 633b str r3, [r7, #48] ; 0x30 + 8035bb2: 2303 movs r3, #3 + 8035bb4: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8035b86: 230b movs r3, #11 - 8035b88: 637b str r3, [r7, #52] ; 0x34 + 8035bb6: 230b movs r3, #11 + 8035bb8: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8035b8a: f107 0324 add.w r3, r7, #36 ; 0x24 - 8035b8e: 4619 mov r1, r3 - 8035b90: 480b ldr r0, [pc, #44] ; (8035bc0 ) - 8035b92: f7f7 fc53 bl 802d43c + 8035bba: f107 0324 add.w r3, r7, #36 ; 0x24 + 8035bbe: 4619 mov r1, r3 + 8035bc0: 480b ldr r0, [pc, #44] ; (8035bf0 ) + 8035bc2: f7f7 fc53 bl 802d46c /* Peripheral interrupt init */ HAL_NVIC_SetPriority(ETH_IRQn, 6, 0); - 8035b96: 2200 movs r2, #0 - 8035b98: 2106 movs r1, #6 - 8035b9a: 203d movs r0, #61 ; 0x3d - 8035b9c: f7f1 fef9 bl 8027992 + 8035bc6: 2200 movs r2, #0 + 8035bc8: 2106 movs r1, #6 + 8035bca: 203d movs r0, #61 ; 0x3d + 8035bcc: f7f1 fef9 bl 80279c2 HAL_NVIC_EnableIRQ(ETH_IRQn); - 8035ba0: 203d movs r0, #61 ; 0x3d - 8035ba2: f7f1 ff10 bl 80279c6 + 8035bd0: 203d movs r0, #61 ; 0x3d + 8035bd2: f7f1 ff10 bl 80279f6 /* USER CODE BEGIN ETH_MspInit 1 */ /* USER CODE END ETH_MspInit 1 */ } } - 8035ba6: bf00 nop - 8035ba8: 3738 adds r7, #56 ; 0x38 - 8035baa: 46bd mov sp, r7 - 8035bac: bd80 pop {r7, pc} - 8035bae: bf00 nop - 8035bb0: 40028000 .word 0x40028000 - 8035bb4: 58024400 .word 0x58024400 - 8035bb8: 58020800 .word 0x58020800 - 8035bbc: 58020000 .word 0x58020000 - 8035bc0: 58020400 .word 0x58020400 + 8035bd6: bf00 nop + 8035bd8: 3738 adds r7, #56 ; 0x38 + 8035bda: 46bd mov sp, r7 + 8035bdc: bd80 pop {r7, pc} + 8035bde: bf00 nop + 8035be0: 40028000 .word 0x40028000 + 8035be4: 58024400 .word 0x58024400 + 8035be8: 58020800 .word 0x58020800 + 8035bec: 58020000 .word 0x58020000 + 8035bf0: 58020400 .word 0x58020400 -08035bc4 : +08035bf4 : * @brief Initializes the MDIO interface GPIO and clocks. * @param None * @retval 0 if OK, -1 if ERROR */ int32_t ETH_PHY_IO_Init(void) { - 8035bc4: b580 push {r7, lr} - 8035bc6: af00 add r7, sp, #0 + 8035bf4: b580 push {r7, lr} + 8035bf6: af00 add r7, sp, #0 /* We assume that MDIO GPIO configuration is already done in the ETH_MspInit() else it should be done here */ /* Configure the MDIO Clock */ HAL_ETH_SetMDIOClockRange(&heth); - 8035bc8: 4802 ldr r0, [pc, #8] ; (8035bd4 ) - 8035bca: f7f5 fd1d bl 802b608 + 8035bf8: 4802 ldr r0, [pc, #8] ; (8035c04 ) + 8035bfa: f7f5 fd1d bl 802b638 return 0; - 8035bce: 2300 movs r3, #0 + 8035bfe: 2300 movs r3, #0 } - 8035bd0: 4618 mov r0, r3 - 8035bd2: bd80 pop {r7, pc} - 8035bd4: 2400b8b4 .word 0x2400b8b4 + 8035c00: 4618 mov r0, r3 + 8035c02: bd80 pop {r7, pc} + 8035c04: 2400b8b4 .word 0x2400b8b4 -08035bd8 : +08035c08 : * @brief De-Initializes the MDIO interface . * @param None * @retval 0 if OK, -1 if ERROR */ int32_t ETH_PHY_IO_DeInit (void) { - 8035bd8: b480 push {r7} - 8035bda: af00 add r7, sp, #0 + 8035c08: b480 push {r7} + 8035c0a: af00 add r7, sp, #0 return 0; - 8035bdc: 2300 movs r3, #0 + 8035c0c: 2300 movs r3, #0 } - 8035bde: 4618 mov r0, r3 - 8035be0: 46bd mov sp, r7 - 8035be2: f85d 7b04 ldr.w r7, [sp], #4 - 8035be6: 4770 bx lr + 8035c0e: 4618 mov r0, r3 + 8035c10: 46bd mov sp, r7 + 8035c12: f85d 7b04 ldr.w r7, [sp], #4 + 8035c16: 4770 bx lr -08035be8 : +08035c18 : * @param RegAddr: PHY register address * @param pRegVal: pointer to hold the register value * @retval 0 if OK -1 if Error */ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal) { - 8035be8: b580 push {r7, lr} - 8035bea: b084 sub sp, #16 - 8035bec: af00 add r7, sp, #0 - 8035bee: 60f8 str r0, [r7, #12] - 8035bf0: 60b9 str r1, [r7, #8] - 8035bf2: 607a str r2, [r7, #4] + 8035c18: b580 push {r7, lr} + 8035c1a: b084 sub sp, #16 + 8035c1c: af00 add r7, sp, #0 + 8035c1e: 60f8 str r0, [r7, #12] + 8035c20: 60b9 str r1, [r7, #8] + 8035c22: 607a str r2, [r7, #4] if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK) - 8035bf4: 687b ldr r3, [r7, #4] - 8035bf6: 68ba ldr r2, [r7, #8] - 8035bf8: 68f9 ldr r1, [r7, #12] - 8035bfa: 4807 ldr r0, [pc, #28] ; (8035c18 ) - 8035bfc: f7f5 fa6e bl 802b0dc - 8035c00: 4603 mov r3, r0 - 8035c02: 2b00 cmp r3, #0 - 8035c04: d002 beq.n 8035c0c + 8035c24: 687b ldr r3, [r7, #4] + 8035c26: 68ba ldr r2, [r7, #8] + 8035c28: 68f9 ldr r1, [r7, #12] + 8035c2a: 4807 ldr r0, [pc, #28] ; (8035c48 ) + 8035c2c: f7f5 fa6e bl 802b10c + 8035c30: 4603 mov r3, r0 + 8035c32: 2b00 cmp r3, #0 + 8035c34: d002 beq.n 8035c3c { return -1; - 8035c06: f04f 33ff mov.w r3, #4294967295 - 8035c0a: e000 b.n 8035c0e + 8035c36: f04f 33ff mov.w r3, #4294967295 + 8035c3a: e000 b.n 8035c3e } return 0; - 8035c0c: 2300 movs r3, #0 + 8035c3c: 2300 movs r3, #0 } - 8035c0e: 4618 mov r0, r3 - 8035c10: 3710 adds r7, #16 - 8035c12: 46bd mov sp, r7 - 8035c14: bd80 pop {r7, pc} - 8035c16: bf00 nop - 8035c18: 2400b8b4 .word 0x2400b8b4 + 8035c3e: 4618 mov r0, r3 + 8035c40: 3710 adds r7, #16 + 8035c42: 46bd mov sp, r7 + 8035c44: bd80 pop {r7, pc} + 8035c46: bf00 nop + 8035c48: 2400b8b4 .word 0x2400b8b4 -08035c1c : +08035c4c : * @param RegAddr: PHY register address * @param RegVal: Value to be written * @retval 0 if OK -1 if Error */ int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal) { - 8035c1c: b580 push {r7, lr} - 8035c1e: b084 sub sp, #16 - 8035c20: af00 add r7, sp, #0 - 8035c22: 60f8 str r0, [r7, #12] - 8035c24: 60b9 str r1, [r7, #8] - 8035c26: 607a str r2, [r7, #4] + 8035c4c: b580 push {r7, lr} + 8035c4e: b084 sub sp, #16 + 8035c50: af00 add r7, sp, #0 + 8035c52: 60f8 str r0, [r7, #12] + 8035c54: 60b9 str r1, [r7, #8] + 8035c56: 607a str r2, [r7, #4] if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK) - 8035c28: 687b ldr r3, [r7, #4] - 8035c2a: 68ba ldr r2, [r7, #8] - 8035c2c: 68f9 ldr r1, [r7, #12] - 8035c2e: 4807 ldr r0, [pc, #28] ; (8035c4c ) - 8035c30: f7f5 faa8 bl 802b184 - 8035c34: 4603 mov r3, r0 - 8035c36: 2b00 cmp r3, #0 - 8035c38: d002 beq.n 8035c40 + 8035c58: 687b ldr r3, [r7, #4] + 8035c5a: 68ba ldr r2, [r7, #8] + 8035c5c: 68f9 ldr r1, [r7, #12] + 8035c5e: 4807 ldr r0, [pc, #28] ; (8035c7c ) + 8035c60: f7f5 faa8 bl 802b1b4 + 8035c64: 4603 mov r3, r0 + 8035c66: 2b00 cmp r3, #0 + 8035c68: d002 beq.n 8035c70 { return -1; - 8035c3a: f04f 33ff mov.w r3, #4294967295 - 8035c3e: e000 b.n 8035c42 + 8035c6a: f04f 33ff mov.w r3, #4294967295 + 8035c6e: e000 b.n 8035c72 } return 0; - 8035c40: 2300 movs r3, #0 + 8035c70: 2300 movs r3, #0 } - 8035c42: 4618 mov r0, r3 - 8035c44: 3710 adds r7, #16 - 8035c46: 46bd mov sp, r7 - 8035c48: bd80 pop {r7, pc} - 8035c4a: bf00 nop - 8035c4c: 2400b8b4 .word 0x2400b8b4 + 8035c72: 4618 mov r0, r3 + 8035c74: 3710 adds r7, #16 + 8035c76: 46bd mov sp, r7 + 8035c78: bd80 pop {r7, pc} + 8035c7a: bf00 nop + 8035c7c: 2400b8b4 .word 0x2400b8b4 -08035c50 : +08035c80 : /** * @brief Get the time in millisecons used for internal PHY driver process. * @retval Time value */ int32_t ETH_PHY_IO_GetTick(void) { - 8035c50: b580 push {r7, lr} - 8035c52: af00 add r7, sp, #0 + 8035c80: b580 push {r7, lr} + 8035c82: af00 add r7, sp, #0 return HAL_GetTick(); - 8035c54: f7f0 f99e bl 8025f94 - 8035c58: 4603 mov r3, r0 + 8035c84: f7f0 f99e bl 8025fc4 + 8035c88: 4603 mov r3, r0 } - 8035c5a: 4618 mov r0, r3 - 8035c5c: bd80 pop {r7, pc} + 8035c8a: 4618 mov r0, r3 + 8035c8c: bd80 pop {r7, pc} ... -08035c60 : +08035c90 : /** * @brief Check the ETH link state then update ETH driver and netif link accordingly. * @retval None */ void ethernet_link_check_state(struct netif *netif) { - 8035c60: b580 push {r7, lr} - 8035c62: b0a0 sub sp, #128 ; 0x80 - 8035c64: af00 add r7, sp, #0 - 8035c66: 6078 str r0, [r7, #4] + 8035c90: b580 push {r7, lr} + 8035c92: b0a0 sub sp, #128 ; 0x80 + 8035c94: af00 add r7, sp, #0 + 8035c96: 6078 str r0, [r7, #4] ETH_MACConfigTypeDef MACConf = {0}; - 8035c68: f107 030c add.w r3, r7, #12 - 8035c6c: 2264 movs r2, #100 ; 0x64 - 8035c6e: 2100 movs r1, #0 - 8035c70: 4618 mov r0, r3 - 8035c72: f00a fe4d bl 8040910 + 8035c98: f107 030c add.w r3, r7, #12 + 8035c9c: 2264 movs r2, #100 ; 0x64 + 8035c9e: 2100 movs r1, #0 + 8035ca0: 4618 mov r0, r3 + 8035ca2: f00a fe4d bl 8040940 int32_t PHYLinkState = 0; - 8035c76: 2300 movs r3, #0 - 8035c78: 673b str r3, [r7, #112] ; 0x70 + 8035ca6: 2300 movs r3, #0 + 8035ca8: 673b str r3, [r7, #112] ; 0x70 uint32_t linkchanged = 0U, speed = 0U, duplex = 0U; - 8035c7a: 2300 movs r3, #0 - 8035c7c: 67fb str r3, [r7, #124] ; 0x7c - 8035c7e: 2300 movs r3, #0 - 8035c80: 67bb str r3, [r7, #120] ; 0x78 - 8035c82: 2300 movs r3, #0 - 8035c84: 677b str r3, [r7, #116] ; 0x74 + 8035caa: 2300 movs r3, #0 + 8035cac: 67fb str r3, [r7, #124] ; 0x7c + 8035cae: 2300 movs r3, #0 + 8035cb0: 67bb str r3, [r7, #120] ; 0x78 + 8035cb2: 2300 movs r3, #0 + 8035cb4: 677b str r3, [r7, #116] ; 0x74 PHYLinkState = LAN8742_GetLinkState(&LAN8742); - 8035c86: 483a ldr r0, [pc, #232] ; (8035d70 ) - 8035c88: f7f0 f877 bl 8025d7a - 8035c8c: 6738 str r0, [r7, #112] ; 0x70 + 8035cb6: 483a ldr r0, [pc, #232] ; (8035da0 ) + 8035cb8: f7f0 f877 bl 8025daa + 8035cbc: 6738 str r0, [r7, #112] ; 0x70 if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)) - 8035c8e: 687b ldr r3, [r7, #4] - 8035c90: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8035c94: 089b lsrs r3, r3, #2 - 8035c96: f003 0301 and.w r3, r3, #1 - 8035c9a: b2db uxtb r3, r3 - 8035c9c: 2b00 cmp r3, #0 - 8035c9e: d00c beq.n 8035cba - 8035ca0: 6f3b ldr r3, [r7, #112] ; 0x70 - 8035ca2: 2b01 cmp r3, #1 - 8035ca4: dc09 bgt.n 8035cba + 8035cbe: 687b ldr r3, [r7, #4] + 8035cc0: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8035cc4: 089b lsrs r3, r3, #2 + 8035cc6: f003 0301 and.w r3, r3, #1 + 8035cca: b2db uxtb r3, r3 + 8035ccc: 2b00 cmp r3, #0 + 8035cce: d00c beq.n 8035cea + 8035cd0: 6f3b ldr r3, [r7, #112] ; 0x70 + 8035cd2: 2b01 cmp r3, #1 + 8035cd4: dc09 bgt.n 8035cea { HAL_ETH_Stop(&heth); - 8035ca6: 4833 ldr r0, [pc, #204] ; (8035d74 ) - 8035ca8: f7f4 feb6 bl 802aa18 + 8035cd6: 4833 ldr r0, [pc, #204] ; (8035da4 ) + 8035cd8: f7f4 feb6 bl 802aa48 netif_set_down(netif); - 8035cac: 6878 ldr r0, [r7, #4] - 8035cae: f001 f90f bl 8036ed0 + 8035cdc: 6878 ldr r0, [r7, #4] + 8035cde: f001 f90f bl 8036f00 netif_set_link_down(netif); - 8035cb2: 6878 ldr r0, [r7, #4] - 8035cb4: f001 f97a bl 8036fac + 8035ce2: 6878 ldr r0, [r7, #4] + 8035ce4: f001 f97a bl 8036fdc netif_set_up(netif); netif_set_link_up(netif); } } } - 8035cb8: e055 b.n 8035d66 + 8035ce8: e055 b.n 8035d96 else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN)) - 8035cba: 687b ldr r3, [r7, #4] - 8035cbc: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8035cc0: f003 0304 and.w r3, r3, #4 - 8035cc4: 2b00 cmp r3, #0 - 8035cc6: d14e bne.n 8035d66 - 8035cc8: 6f3b ldr r3, [r7, #112] ; 0x70 - 8035cca: 2b01 cmp r3, #1 - 8035ccc: dd4b ble.n 8035d66 + 8035cea: 687b ldr r3, [r7, #4] + 8035cec: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8035cf0: f003 0304 and.w r3, r3, #4 + 8035cf4: 2b00 cmp r3, #0 + 8035cf6: d14e bne.n 8035d96 + 8035cf8: 6f3b ldr r3, [r7, #112] ; 0x70 + 8035cfa: 2b01 cmp r3, #1 + 8035cfc: dd4b ble.n 8035d96 switch (PHYLinkState) - 8035cce: 6f3b ldr r3, [r7, #112] ; 0x70 - 8035cd0: 3b02 subs r3, #2 - 8035cd2: 2b03 cmp r3, #3 - 8035cd4: d82a bhi.n 8035d2c - 8035cd6: a201 add r2, pc, #4 ; (adr r2, 8035cdc ) - 8035cd8: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8035cdc: 08035ced .word 0x08035ced - 8035ce0: 08035cff .word 0x08035cff - 8035ce4: 08035d0f .word 0x08035d0f - 8035ce8: 08035d1f .word 0x08035d1f + 8035cfe: 6f3b ldr r3, [r7, #112] ; 0x70 + 8035d00: 3b02 subs r3, #2 + 8035d02: 2b03 cmp r3, #3 + 8035d04: d82a bhi.n 8035d5c + 8035d06: a201 add r2, pc, #4 ; (adr r2, 8035d0c ) + 8035d08: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8035d0c: 08035d1d .word 0x08035d1d + 8035d10: 08035d2f .word 0x08035d2f + 8035d14: 08035d3f .word 0x08035d3f + 8035d18: 08035d4f .word 0x08035d4f duplex = ETH_FULLDUPLEX_MODE; - 8035cec: f44f 5300 mov.w r3, #8192 ; 0x2000 - 8035cf0: 677b str r3, [r7, #116] ; 0x74 + 8035d1c: f44f 5300 mov.w r3, #8192 ; 0x2000 + 8035d20: 677b str r3, [r7, #116] ; 0x74 speed = ETH_SPEED_100M; - 8035cf2: f44f 4380 mov.w r3, #16384 ; 0x4000 - 8035cf6: 67bb str r3, [r7, #120] ; 0x78 + 8035d22: f44f 4380 mov.w r3, #16384 ; 0x4000 + 8035d26: 67bb str r3, [r7, #120] ; 0x78 linkchanged = 1; - 8035cf8: 2301 movs r3, #1 - 8035cfa: 67fb str r3, [r7, #124] ; 0x7c + 8035d28: 2301 movs r3, #1 + 8035d2a: 67fb str r3, [r7, #124] ; 0x7c break; - 8035cfc: e017 b.n 8035d2e + 8035d2c: e017 b.n 8035d5e duplex = ETH_HALFDUPLEX_MODE; - 8035cfe: 2300 movs r3, #0 - 8035d00: 677b str r3, [r7, #116] ; 0x74 + 8035d2e: 2300 movs r3, #0 + 8035d30: 677b str r3, [r7, #116] ; 0x74 speed = ETH_SPEED_100M; - 8035d02: f44f 4380 mov.w r3, #16384 ; 0x4000 - 8035d06: 67bb str r3, [r7, #120] ; 0x78 + 8035d32: f44f 4380 mov.w r3, #16384 ; 0x4000 + 8035d36: 67bb str r3, [r7, #120] ; 0x78 linkchanged = 1; - 8035d08: 2301 movs r3, #1 - 8035d0a: 67fb str r3, [r7, #124] ; 0x7c + 8035d38: 2301 movs r3, #1 + 8035d3a: 67fb str r3, [r7, #124] ; 0x7c break; - 8035d0c: e00f b.n 8035d2e + 8035d3c: e00f b.n 8035d5e duplex = ETH_FULLDUPLEX_MODE; - 8035d0e: f44f 5300 mov.w r3, #8192 ; 0x2000 - 8035d12: 677b str r3, [r7, #116] ; 0x74 + 8035d3e: f44f 5300 mov.w r3, #8192 ; 0x2000 + 8035d42: 677b str r3, [r7, #116] ; 0x74 speed = ETH_SPEED_10M; - 8035d14: 2300 movs r3, #0 - 8035d16: 67bb str r3, [r7, #120] ; 0x78 + 8035d44: 2300 movs r3, #0 + 8035d46: 67bb str r3, [r7, #120] ; 0x78 linkchanged = 1; - 8035d18: 2301 movs r3, #1 - 8035d1a: 67fb str r3, [r7, #124] ; 0x7c + 8035d48: 2301 movs r3, #1 + 8035d4a: 67fb str r3, [r7, #124] ; 0x7c break; - 8035d1c: e007 b.n 8035d2e + 8035d4c: e007 b.n 8035d5e duplex = ETH_HALFDUPLEX_MODE; - 8035d1e: 2300 movs r3, #0 - 8035d20: 677b str r3, [r7, #116] ; 0x74 + 8035d4e: 2300 movs r3, #0 + 8035d50: 677b str r3, [r7, #116] ; 0x74 speed = ETH_SPEED_10M; - 8035d22: 2300 movs r3, #0 - 8035d24: 67bb str r3, [r7, #120] ; 0x78 + 8035d52: 2300 movs r3, #0 + 8035d54: 67bb str r3, [r7, #120] ; 0x78 linkchanged = 1; - 8035d26: 2301 movs r3, #1 - 8035d28: 67fb str r3, [r7, #124] ; 0x7c + 8035d56: 2301 movs r3, #1 + 8035d58: 67fb str r3, [r7, #124] ; 0x7c break; - 8035d2a: e000 b.n 8035d2e + 8035d5a: e000 b.n 8035d5e break; - 8035d2c: bf00 nop + 8035d5c: bf00 nop if(linkchanged) - 8035d2e: 6ffb ldr r3, [r7, #124] ; 0x7c - 8035d30: 2b00 cmp r3, #0 - 8035d32: d018 beq.n 8035d66 + 8035d5e: 6ffb ldr r3, [r7, #124] ; 0x7c + 8035d60: 2b00 cmp r3, #0 + 8035d62: d018 beq.n 8035d96 HAL_ETH_GetMACConfig(&heth, &MACConf); - 8035d34: f107 030c add.w r3, r7, #12 - 8035d38: 4619 mov r1, r3 - 8035d3a: 480e ldr r0, [pc, #56] ; (8035d74 ) - 8035d3c: f7f5 fa76 bl 802b22c + 8035d64: f107 030c add.w r3, r7, #12 + 8035d68: 4619 mov r1, r3 + 8035d6a: 480e ldr r0, [pc, #56] ; (8035da4 ) + 8035d6c: f7f5 fa76 bl 802b25c MACConf.DuplexMode = duplex; - 8035d40: 6f7b ldr r3, [r7, #116] ; 0x74 - 8035d42: 627b str r3, [r7, #36] ; 0x24 + 8035d70: 6f7b ldr r3, [r7, #116] ; 0x74 + 8035d72: 627b str r3, [r7, #36] ; 0x24 MACConf.Speed = speed; - 8035d44: 6fbb ldr r3, [r7, #120] ; 0x78 - 8035d46: 623b str r3, [r7, #32] + 8035d74: 6fbb ldr r3, [r7, #120] ; 0x78 + 8035d76: 623b str r3, [r7, #32] HAL_ETH_SetMACConfig(&heth, &MACConf); - 8035d48: f107 030c add.w r3, r7, #12 - 8035d4c: 4619 mov r1, r3 - 8035d4e: 4809 ldr r0, [pc, #36] ; (8035d74 ) - 8035d50: f7f5 fc40 bl 802b5d4 + 8035d78: f107 030c add.w r3, r7, #12 + 8035d7c: 4619 mov r1, r3 + 8035d7e: 4809 ldr r0, [pc, #36] ; (8035da4 ) + 8035d80: f7f5 fc40 bl 802b604 HAL_ETH_Start(&heth); - 8035d54: 4807 ldr r0, [pc, #28] ; (8035d74 ) - 8035d56: f7f4 fdfd bl 802a954 + 8035d84: 4807 ldr r0, [pc, #28] ; (8035da4 ) + 8035d86: f7f4 fdfd bl 802a984 netif_set_up(netif); - 8035d5a: 6878 ldr r0, [r7, #4] - 8035d5c: f001 f844 bl 8036de8 + 8035d8a: 6878 ldr r0, [r7, #4] + 8035d8c: f001 f844 bl 8036e18 netif_set_link_up(netif); - 8035d60: 6878 ldr r0, [r7, #4] - 8035d62: f001 f8ef bl 8036f44 + 8035d90: 6878 ldr r0, [r7, #4] + 8035d92: f001 f8ef bl 8036f74 } - 8035d66: bf00 nop - 8035d68: 3780 adds r7, #128 ; 0x80 - 8035d6a: 46bd mov sp, r7 - 8035d6c: bd80 pop {r7, pc} - 8035d6e: bf00 nop - 8035d70: 2400b99c .word 0x2400b99c - 8035d74: 2400b8b4 .word 0x2400b8b4 + 8035d96: bf00 nop + 8035d98: 3780 adds r7, #128 ; 0x80 + 8035d9a: 46bd mov sp, r7 + 8035d9c: bd80 pop {r7, pc} + 8035d9e: bf00 nop + 8035da0: 2400b99c .word 0x2400b99c + 8035da4: 2400b8b4 .word 0x2400b8b4 -08035d78 : +08035da8 : void HAL_ETH_RxAllocateCallback(uint8_t **buff) { - 8035d78: b580 push {r7, lr} - 8035d7a: b086 sub sp, #24 - 8035d7c: af02 add r7, sp, #8 - 8035d7e: 6078 str r0, [r7, #4] + 8035da8: b580 push {r7, lr} + 8035daa: b086 sub sp, #24 + 8035dac: af02 add r7, sp, #8 + 8035dae: 6078 str r0, [r7, #4] /* USER CODE BEGIN HAL ETH RxAllocateCallback */ struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL); - 8035d80: 4812 ldr r0, [pc, #72] ; (8035dcc ) - 8035d82: f000 fd9f bl 80368c4 - 8035d86: 60f8 str r0, [r7, #12] + 8035db0: 4812 ldr r0, [pc, #72] ; (8035dfc ) + 8035db2: f000 fd9f bl 80368f4 + 8035db6: 60f8 str r0, [r7, #12] if (p) - 8035d88: 68fb ldr r3, [r7, #12] - 8035d8a: 2b00 cmp r3, #0 - 8035d8c: d014 beq.n 8035db8 + 8035db8: 68fb ldr r3, [r7, #12] + 8035dba: 2b00 cmp r3, #0 + 8035dbc: d014 beq.n 8035de8 { /* Get the buff from the struct pbuf address. */ *buff = (uint8_t *)p + offsetof(RxBuff_t, buff); - 8035d8e: 68fb ldr r3, [r7, #12] - 8035d90: f103 0220 add.w r2, r3, #32 - 8035d94: 687b ldr r3, [r7, #4] - 8035d96: 601a str r2, [r3, #0] + 8035dbe: 68fb ldr r3, [r7, #12] + 8035dc0: f103 0220 add.w r2, r3, #32 + 8035dc4: 687b ldr r3, [r7, #4] + 8035dc6: 601a str r2, [r3, #0] p->custom_free_function = pbuf_free_custom; - 8035d98: 68fb ldr r3, [r7, #12] - 8035d9a: 4a0d ldr r2, [pc, #52] ; (8035dd0 ) - 8035d9c: 611a str r2, [r3, #16] + 8035dc8: 68fb ldr r3, [r7, #12] + 8035dca: 4a0d ldr r2, [pc, #52] ; (8035e00 ) + 8035dcc: 611a str r2, [r3, #16] /* Initialize the struct pbuf. * This must be performed whenever a buffer's allocated because it may be * changed by lwIP or the app, e.g., pbuf_free decrements ref. */ pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUFFER_SIZE); - 8035d9e: 687b ldr r3, [r7, #4] - 8035da0: 681b ldr r3, [r3, #0] - 8035da2: f44f 62bf mov.w r2, #1528 ; 0x5f8 - 8035da6: 9201 str r2, [sp, #4] - 8035da8: 9300 str r3, [sp, #0] - 8035daa: 68fb ldr r3, [r7, #12] - 8035dac: 2241 movs r2, #65 ; 0x41 - 8035dae: 2100 movs r1, #0 - 8035db0: 2000 movs r0, #0 - 8035db2: f001 faf1 bl 8037398 + 8035dce: 687b ldr r3, [r7, #4] + 8035dd0: 681b ldr r3, [r3, #0] + 8035dd2: f44f 62bf mov.w r2, #1528 ; 0x5f8 + 8035dd6: 9201 str r2, [sp, #4] + 8035dd8: 9300 str r3, [sp, #0] + 8035dda: 68fb ldr r3, [r7, #12] + 8035ddc: 2241 movs r2, #65 ; 0x41 + 8035dde: 2100 movs r1, #0 + 8035de0: 2000 movs r0, #0 + 8035de2: f001 faf1 bl 80373c8 { RxAllocStatus = RX_ALLOC_ERROR; *buff = NULL; } /* USER CODE END HAL ETH RxAllocateCallback */ } - 8035db6: e005 b.n 8035dc4 + 8035de6: e005 b.n 8035df4 RxAllocStatus = RX_ALLOC_ERROR; - 8035db8: 4b06 ldr r3, [pc, #24] ; (8035dd4 ) - 8035dba: 2201 movs r2, #1 - 8035dbc: 701a strb r2, [r3, #0] + 8035de8: 4b06 ldr r3, [pc, #24] ; (8035e04 ) + 8035dea: 2201 movs r2, #1 + 8035dec: 701a strb r2, [r3, #0] *buff = NULL; - 8035dbe: 687b ldr r3, [r7, #4] - 8035dc0: 2200 movs r2, #0 - 8035dc2: 601a str r2, [r3, #0] + 8035dee: 687b ldr r3, [r7, #4] + 8035df0: 2200 movs r2, #0 + 8035df2: 601a str r2, [r3, #0] } - 8035dc4: bf00 nop - 8035dc6: 3710 adds r7, #16 - 8035dc8: 46bd mov sp, r7 - 8035dca: bd80 pop {r7, pc} - 8035dcc: 08044cf4 .word 0x08044cf4 - 8035dd0: 08035a19 .word 0x08035a19 - 8035dd4: 2400b8b0 .word 0x2400b8b0 + 8035df4: bf00 nop + 8035df6: 3710 adds r7, #16 + 8035df8: 46bd mov sp, r7 + 8035dfa: bd80 pop {r7, pc} + 8035dfc: 08044d24 .word 0x08044d24 + 8035e00: 08035a49 .word 0x08035a49 + 8035e04: 2400b8b0 .word 0x2400b8b0 -08035dd8 : +08035e08 : void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length) { - 8035dd8: b480 push {r7} - 8035dda: b08d sub sp, #52 ; 0x34 - 8035ddc: af00 add r7, sp, #0 - 8035dde: 60f8 str r0, [r7, #12] - 8035de0: 60b9 str r1, [r7, #8] - 8035de2: 607a str r2, [r7, #4] - 8035de4: 807b strh r3, [r7, #2] + 8035e08: b480 push {r7} + 8035e0a: b08d sub sp, #52 ; 0x34 + 8035e0c: af00 add r7, sp, #0 + 8035e0e: 60f8 str r0, [r7, #12] + 8035e10: 60b9 str r1, [r7, #8] + 8035e12: 607a str r2, [r7, #4] + 8035e14: 807b strh r3, [r7, #2] /* USER CODE BEGIN HAL ETH RxLinkCallback */ struct pbuf **ppStart = (struct pbuf **)pStart; - 8035de6: 68fb ldr r3, [r7, #12] - 8035de8: 62bb str r3, [r7, #40] ; 0x28 + 8035e16: 68fb ldr r3, [r7, #12] + 8035e18: 62bb str r3, [r7, #40] ; 0x28 struct pbuf **ppEnd = (struct pbuf **)pEnd; - 8035dea: 68bb ldr r3, [r7, #8] - 8035dec: 627b str r3, [r7, #36] ; 0x24 + 8035e1a: 68bb ldr r3, [r7, #8] + 8035e1c: 627b str r3, [r7, #36] ; 0x24 struct pbuf *p = NULL; - 8035dee: 2300 movs r3, #0 - 8035df0: 62fb str r3, [r7, #44] ; 0x2c + 8035e1e: 2300 movs r3, #0 + 8035e20: 62fb str r3, [r7, #44] ; 0x2c /* Get the struct pbuf from the buff address. */ p = (struct pbuf *)(buff - offsetof(RxBuff_t, buff)); - 8035df2: 687b ldr r3, [r7, #4] - 8035df4: 3b20 subs r3, #32 - 8035df6: 62fb str r3, [r7, #44] ; 0x2c + 8035e22: 687b ldr r3, [r7, #4] + 8035e24: 3b20 subs r3, #32 + 8035e26: 62fb str r3, [r7, #44] ; 0x2c p->next = NULL; - 8035df8: 6afb ldr r3, [r7, #44] ; 0x2c - 8035dfa: 2200 movs r2, #0 - 8035dfc: 601a str r2, [r3, #0] + 8035e28: 6afb ldr r3, [r7, #44] ; 0x2c + 8035e2a: 2200 movs r2, #0 + 8035e2c: 601a str r2, [r3, #0] p->tot_len = 0; - 8035dfe: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e00: 2200 movs r2, #0 - 8035e02: 811a strh r2, [r3, #8] + 8035e2e: 6afb ldr r3, [r7, #44] ; 0x2c + 8035e30: 2200 movs r2, #0 + 8035e32: 811a strh r2, [r3, #8] p->len = Length; - 8035e04: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e06: 887a ldrh r2, [r7, #2] - 8035e08: 815a strh r2, [r3, #10] + 8035e34: 6afb ldr r3, [r7, #44] ; 0x2c + 8035e36: 887a ldrh r2, [r7, #2] + 8035e38: 815a strh r2, [r3, #10] /* Chain the buffer. */ if (!*ppStart) - 8035e0a: 6abb ldr r3, [r7, #40] ; 0x28 - 8035e0c: 681b ldr r3, [r3, #0] - 8035e0e: 2b00 cmp r3, #0 - 8035e10: d103 bne.n 8035e1a + 8035e3a: 6abb ldr r3, [r7, #40] ; 0x28 + 8035e3c: 681b ldr r3, [r3, #0] + 8035e3e: 2b00 cmp r3, #0 + 8035e40: d103 bne.n 8035e4a { /* The first buffer of the packet. */ *ppStart = p; - 8035e12: 6abb ldr r3, [r7, #40] ; 0x28 - 8035e14: 6afa ldr r2, [r7, #44] ; 0x2c - 8035e16: 601a str r2, [r3, #0] - 8035e18: e003 b.n 8035e22 + 8035e42: 6abb ldr r3, [r7, #40] ; 0x28 + 8035e44: 6afa ldr r2, [r7, #44] ; 0x2c + 8035e46: 601a str r2, [r3, #0] + 8035e48: e003 b.n 8035e52 } else { /* Chain the buffer to the end of the packet. */ (*ppEnd)->next = p; - 8035e1a: 6a7b ldr r3, [r7, #36] ; 0x24 - 8035e1c: 681b ldr r3, [r3, #0] - 8035e1e: 6afa ldr r2, [r7, #44] ; 0x2c - 8035e20: 601a str r2, [r3, #0] + 8035e4a: 6a7b ldr r3, [r7, #36] ; 0x24 + 8035e4c: 681b ldr r3, [r3, #0] + 8035e4e: 6afa ldr r2, [r7, #44] ; 0x2c + 8035e50: 601a str r2, [r3, #0] } *ppEnd = p; - 8035e22: 6a7b ldr r3, [r7, #36] ; 0x24 - 8035e24: 6afa ldr r2, [r7, #44] ; 0x2c - 8035e26: 601a str r2, [r3, #0] + 8035e52: 6a7b ldr r3, [r7, #36] ; 0x24 + 8035e54: 6afa ldr r2, [r7, #44] ; 0x2c + 8035e56: 601a str r2, [r3, #0] /* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len * set to its own length, plus the length of all the following pbufs in the chain. */ for (p = *ppStart; p != NULL; p = p->next) - 8035e28: 6abb ldr r3, [r7, #40] ; 0x28 - 8035e2a: 681b ldr r3, [r3, #0] - 8035e2c: 62fb str r3, [r7, #44] ; 0x2c - 8035e2e: e009 b.n 8035e44 + 8035e58: 6abb ldr r3, [r7, #40] ; 0x28 + 8035e5a: 681b ldr r3, [r3, #0] + 8035e5c: 62fb str r3, [r7, #44] ; 0x2c + 8035e5e: e009 b.n 8035e74 { p->tot_len += Length; - 8035e30: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e32: 891a ldrh r2, [r3, #8] - 8035e34: 887b ldrh r3, [r7, #2] - 8035e36: 4413 add r3, r2 - 8035e38: b29a uxth r2, r3 - 8035e3a: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e3c: 811a strh r2, [r3, #8] + 8035e60: 6afb ldr r3, [r7, #44] ; 0x2c + 8035e62: 891a ldrh r2, [r3, #8] + 8035e64: 887b ldrh r3, [r7, #2] + 8035e66: 4413 add r3, r2 + 8035e68: b29a uxth r2, r3 + 8035e6a: 6afb ldr r3, [r7, #44] ; 0x2c + 8035e6c: 811a strh r2, [r3, #8] for (p = *ppStart; p != NULL; p = p->next) - 8035e3e: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e40: 681b ldr r3, [r3, #0] - 8035e42: 62fb str r3, [r7, #44] ; 0x2c - 8035e44: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e46: 2b00 cmp r3, #0 - 8035e48: d1f2 bne.n 8035e30 + 8035e6e: 6afb ldr r3, [r7, #44] ; 0x2c + 8035e70: 681b ldr r3, [r3, #0] + 8035e72: 62fb str r3, [r7, #44] ; 0x2c + 8035e74: 6afb ldr r3, [r7, #44] ; 0x2c + 8035e76: 2b00 cmp r3, #0 + 8035e78: d1f2 bne.n 8035e60 } /* Invalidate data cache because Rx DMA's writing to physical memory makes it stale. */ SCB_InvalidateDCache_by_Addr((uint32_t *)buff, Length); - 8035e4a: 887b ldrh r3, [r7, #2] - 8035e4c: 687a ldr r2, [r7, #4] - 8035e4e: 623a str r2, [r7, #32] - 8035e50: 61fb str r3, [r7, #28] + 8035e7a: 887b ldrh r3, [r7, #2] + 8035e7c: 687a ldr r2, [r7, #4] + 8035e7e: 623a str r2, [r7, #32] + 8035e80: 61fb str r3, [r7, #28] if ( dsize > 0 ) { - 8035e52: 69fb ldr r3, [r7, #28] - 8035e54: 2b00 cmp r3, #0 - 8035e56: dd1d ble.n 8035e94 + 8035e82: 69fb ldr r3, [r7, #28] + 8035e84: 2b00 cmp r3, #0 + 8035e86: dd1d ble.n 8035ec4 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); - 8035e58: 6a3b ldr r3, [r7, #32] - 8035e5a: f003 021f and.w r2, r3, #31 - 8035e5e: 69fb ldr r3, [r7, #28] - 8035e60: 4413 add r3, r2 - 8035e62: 61bb str r3, [r7, #24] + 8035e88: 6a3b ldr r3, [r7, #32] + 8035e8a: f003 021f and.w r2, r3, #31 + 8035e8e: 69fb ldr r3, [r7, #28] + 8035e90: 4413 add r3, r2 + 8035e92: 61bb str r3, [r7, #24] uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - 8035e64: 6a3b ldr r3, [r7, #32] - 8035e66: 617b str r3, [r7, #20] + 8035e94: 6a3b ldr r3, [r7, #32] + 8035e96: 617b str r3, [r7, #20] __ASM volatile ("dsb 0xF":::"memory"); - 8035e68: f3bf 8f4f dsb sy + 8035e98: f3bf 8f4f dsb sy } - 8035e6c: bf00 nop + 8035e9c: bf00 nop SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - 8035e6e: 4a0d ldr r2, [pc, #52] ; (8035ea4 ) - 8035e70: 697b ldr r3, [r7, #20] - 8035e72: f8c2 325c str.w r3, [r2, #604] ; 0x25c + 8035e9e: 4a0d ldr r2, [pc, #52] ; (8035ed4 ) + 8035ea0: 697b ldr r3, [r7, #20] + 8035ea2: f8c2 325c str.w r3, [r2, #604] ; 0x25c op_addr += __SCB_DCACHE_LINE_SIZE; - 8035e76: 697b ldr r3, [r7, #20] - 8035e78: 3320 adds r3, #32 - 8035e7a: 617b str r3, [r7, #20] + 8035ea6: 697b ldr r3, [r7, #20] + 8035ea8: 3320 adds r3, #32 + 8035eaa: 617b str r3, [r7, #20] op_size -= __SCB_DCACHE_LINE_SIZE; - 8035e7c: 69bb ldr r3, [r7, #24] - 8035e7e: 3b20 subs r3, #32 - 8035e80: 61bb str r3, [r7, #24] + 8035eac: 69bb ldr r3, [r7, #24] + 8035eae: 3b20 subs r3, #32 + 8035eb0: 61bb str r3, [r7, #24] } while ( op_size > 0 ); - 8035e82: 69bb ldr r3, [r7, #24] - 8035e84: 2b00 cmp r3, #0 - 8035e86: dcf2 bgt.n 8035e6e + 8035eb2: 69bb ldr r3, [r7, #24] + 8035eb4: 2b00 cmp r3, #0 + 8035eb6: dcf2 bgt.n 8035e9e __ASM volatile ("dsb 0xF":::"memory"); - 8035e88: f3bf 8f4f dsb sy + 8035eb8: f3bf 8f4f dsb sy } - 8035e8c: bf00 nop + 8035ebc: bf00 nop __ASM volatile ("isb 0xF":::"memory"); - 8035e8e: f3bf 8f6f isb sy + 8035ebe: f3bf 8f6f isb sy } - 8035e92: bf00 nop + 8035ec2: bf00 nop } - 8035e94: bf00 nop + 8035ec4: bf00 nop /* USER CODE END HAL ETH RxLinkCallback */ } - 8035e96: bf00 nop - 8035e98: 3734 adds r7, #52 ; 0x34 - 8035e9a: 46bd mov sp, r7 - 8035e9c: f85d 7b04 ldr.w r7, [sp], #4 - 8035ea0: 4770 bx lr - 8035ea2: bf00 nop - 8035ea4: e000ed00 .word 0xe000ed00 + 8035ec6: bf00 nop + 8035ec8: 3734 adds r7, #52 ; 0x34 + 8035eca: 46bd mov sp, r7 + 8035ecc: f85d 7b04 ldr.w r7, [sp], #4 + 8035ed0: 4770 bx lr + 8035ed2: bf00 nop + 8035ed4: e000ed00 .word 0xe000ed00 -08035ea8 : +08035ed8 : * @param n u16_t in host byte order * @return n in network byte order */ u16_t lwip_htons(u16_t n) { - 8035ea8: b480 push {r7} - 8035eaa: b083 sub sp, #12 - 8035eac: af00 add r7, sp, #0 - 8035eae: 4603 mov r3, r0 - 8035eb0: 80fb strh r3, [r7, #6] + 8035ed8: b480 push {r7} + 8035eda: b083 sub sp, #12 + 8035edc: af00 add r7, sp, #0 + 8035ede: 4603 mov r3, r0 + 8035ee0: 80fb strh r3, [r7, #6] return PP_HTONS(n); - 8035eb2: 88fb ldrh r3, [r7, #6] - 8035eb4: 021b lsls r3, r3, #8 - 8035eb6: b21a sxth r2, r3 - 8035eb8: 88fb ldrh r3, [r7, #6] - 8035eba: 0a1b lsrs r3, r3, #8 - 8035ebc: b29b uxth r3, r3 - 8035ebe: b21b sxth r3, r3 - 8035ec0: 4313 orrs r3, r2 - 8035ec2: b21b sxth r3, r3 - 8035ec4: b29b uxth r3, r3 -} - 8035ec6: 4618 mov r0, r3 - 8035ec8: 370c adds r7, #12 - 8035eca: 46bd mov sp, r7 - 8035ecc: f85d 7b04 ldr.w r7, [sp], #4 - 8035ed0: 4770 bx lr - -08035ed2 : + 8035ee2: 88fb ldrh r3, [r7, #6] + 8035ee4: 021b lsls r3, r3, #8 + 8035ee6: b21a sxth r2, r3 + 8035ee8: 88fb ldrh r3, [r7, #6] + 8035eea: 0a1b lsrs r3, r3, #8 + 8035eec: b29b uxth r3, r3 + 8035eee: b21b sxth r3, r3 + 8035ef0: 4313 orrs r3, r2 + 8035ef2: b21b sxth r3, r3 + 8035ef4: b29b uxth r3, r3 +} + 8035ef6: 4618 mov r0, r3 + 8035ef8: 370c adds r7, #12 + 8035efa: 46bd mov sp, r7 + 8035efc: f85d 7b04 ldr.w r7, [sp], #4 + 8035f00: 4770 bx lr + +08035f02 : * @param n u32_t in host byte order * @return n in network byte order */ u32_t lwip_htonl(u32_t n) { - 8035ed2: b480 push {r7} - 8035ed4: b083 sub sp, #12 - 8035ed6: af00 add r7, sp, #0 - 8035ed8: 6078 str r0, [r7, #4] + 8035f02: b480 push {r7} + 8035f04: b083 sub sp, #12 + 8035f06: af00 add r7, sp, #0 + 8035f08: 6078 str r0, [r7, #4] return PP_HTONL(n); - 8035eda: 687b ldr r3, [r7, #4] - 8035edc: 061a lsls r2, r3, #24 - 8035ede: 687b ldr r3, [r7, #4] - 8035ee0: 021b lsls r3, r3, #8 - 8035ee2: f403 037f and.w r3, r3, #16711680 ; 0xff0000 - 8035ee6: 431a orrs r2, r3 - 8035ee8: 687b ldr r3, [r7, #4] - 8035eea: 0a1b lsrs r3, r3, #8 - 8035eec: f403 437f and.w r3, r3, #65280 ; 0xff00 - 8035ef0: 431a orrs r2, r3 - 8035ef2: 687b ldr r3, [r7, #4] - 8035ef4: 0e1b lsrs r3, r3, #24 - 8035ef6: 4313 orrs r3, r2 -} - 8035ef8: 4618 mov r0, r3 - 8035efa: 370c adds r7, #12 - 8035efc: 46bd mov sp, r7 - 8035efe: f85d 7b04 ldr.w r7, [sp], #4 - 8035f02: 4770 bx lr - -08035f04 : + 8035f0a: 687b ldr r3, [r7, #4] + 8035f0c: 061a lsls r2, r3, #24 + 8035f0e: 687b ldr r3, [r7, #4] + 8035f10: 021b lsls r3, r3, #8 + 8035f12: f403 037f and.w r3, r3, #16711680 ; 0xff0000 + 8035f16: 431a orrs r2, r3 + 8035f18: 687b ldr r3, [r7, #4] + 8035f1a: 0a1b lsrs r3, r3, #8 + 8035f1c: f403 437f and.w r3, r3, #65280 ; 0xff00 + 8035f20: 431a orrs r2, r3 + 8035f22: 687b ldr r3, [r7, #4] + 8035f24: 0e1b lsrs r3, r3, #24 + 8035f26: 4313 orrs r3, r2 +} + 8035f28: 4618 mov r0, r3 + 8035f2a: 370c adds r7, #12 + 8035f2c: 46bd mov sp, r7 + 8035f2e: f85d 7b04 ldr.w r7, [sp], #4 + 8035f32: 4770 bx lr + +08035f34 : * @param len length of data to be summed * @return host order (!) lwip checksum (non-inverted Internet sum) */ u16_t lwip_standard_chksum(const void *dataptr, int len) { - 8035f04: b480 push {r7} - 8035f06: b089 sub sp, #36 ; 0x24 - 8035f08: af00 add r7, sp, #0 - 8035f0a: 6078 str r0, [r7, #4] - 8035f0c: 6039 str r1, [r7, #0] + 8035f34: b480 push {r7} + 8035f36: b089 sub sp, #36 ; 0x24 + 8035f38: af00 add r7, sp, #0 + 8035f3a: 6078 str r0, [r7, #4] + 8035f3c: 6039 str r1, [r7, #0] const u8_t *pb = (const u8_t *)dataptr; - 8035f0e: 687b ldr r3, [r7, #4] - 8035f10: 61fb str r3, [r7, #28] + 8035f3e: 687b ldr r3, [r7, #4] + 8035f40: 61fb str r3, [r7, #28] const u16_t *ps; u16_t t = 0; - 8035f12: 2300 movs r3, #0 - 8035f14: 81fb strh r3, [r7, #14] + 8035f42: 2300 movs r3, #0 + 8035f44: 81fb strh r3, [r7, #14] u32_t sum = 0; - 8035f16: 2300 movs r3, #0 - 8035f18: 617b str r3, [r7, #20] + 8035f46: 2300 movs r3, #0 + 8035f48: 617b str r3, [r7, #20] int odd = ((mem_ptr_t)pb & 1); - 8035f1a: 69fb ldr r3, [r7, #28] - 8035f1c: f003 0301 and.w r3, r3, #1 - 8035f20: 613b str r3, [r7, #16] + 8035f4a: 69fb ldr r3, [r7, #28] + 8035f4c: f003 0301 and.w r3, r3, #1 + 8035f50: 613b str r3, [r7, #16] /* Get aligned to u16_t */ if (odd && len > 0) { - 8035f22: 693b ldr r3, [r7, #16] - 8035f24: 2b00 cmp r3, #0 - 8035f26: d00d beq.n 8035f44 - 8035f28: 683b ldr r3, [r7, #0] - 8035f2a: 2b00 cmp r3, #0 - 8035f2c: dd0a ble.n 8035f44 + 8035f52: 693b ldr r3, [r7, #16] + 8035f54: 2b00 cmp r3, #0 + 8035f56: d00d beq.n 8035f74 + 8035f58: 683b ldr r3, [r7, #0] + 8035f5a: 2b00 cmp r3, #0 + 8035f5c: dd0a ble.n 8035f74 ((u8_t *)&t)[1] = *pb++; - 8035f2e: 69fa ldr r2, [r7, #28] - 8035f30: 1c53 adds r3, r2, #1 - 8035f32: 61fb str r3, [r7, #28] - 8035f34: f107 030e add.w r3, r7, #14 - 8035f38: 3301 adds r3, #1 - 8035f3a: 7812 ldrb r2, [r2, #0] - 8035f3c: 701a strb r2, [r3, #0] + 8035f5e: 69fa ldr r2, [r7, #28] + 8035f60: 1c53 adds r3, r2, #1 + 8035f62: 61fb str r3, [r7, #28] + 8035f64: f107 030e add.w r3, r7, #14 + 8035f68: 3301 adds r3, #1 + 8035f6a: 7812 ldrb r2, [r2, #0] + 8035f6c: 701a strb r2, [r3, #0] len--; - 8035f3e: 683b ldr r3, [r7, #0] - 8035f40: 3b01 subs r3, #1 - 8035f42: 603b str r3, [r7, #0] + 8035f6e: 683b ldr r3, [r7, #0] + 8035f70: 3b01 subs r3, #1 + 8035f72: 603b str r3, [r7, #0] } /* Add the bulk of the data */ ps = (const u16_t *)(const void *)pb; - 8035f44: 69fb ldr r3, [r7, #28] - 8035f46: 61bb str r3, [r7, #24] + 8035f74: 69fb ldr r3, [r7, #28] + 8035f76: 61bb str r3, [r7, #24] while (len > 1) { - 8035f48: e00a b.n 8035f60 + 8035f78: e00a b.n 8035f90 sum += *ps++; - 8035f4a: 69bb ldr r3, [r7, #24] - 8035f4c: 1c9a adds r2, r3, #2 - 8035f4e: 61ba str r2, [r7, #24] - 8035f50: 881b ldrh r3, [r3, #0] - 8035f52: 461a mov r2, r3 - 8035f54: 697b ldr r3, [r7, #20] - 8035f56: 4413 add r3, r2 - 8035f58: 617b str r3, [r7, #20] + 8035f7a: 69bb ldr r3, [r7, #24] + 8035f7c: 1c9a adds r2, r3, #2 + 8035f7e: 61ba str r2, [r7, #24] + 8035f80: 881b ldrh r3, [r3, #0] + 8035f82: 461a mov r2, r3 + 8035f84: 697b ldr r3, [r7, #20] + 8035f86: 4413 add r3, r2 + 8035f88: 617b str r3, [r7, #20] len -= 2; - 8035f5a: 683b ldr r3, [r7, #0] - 8035f5c: 3b02 subs r3, #2 - 8035f5e: 603b str r3, [r7, #0] + 8035f8a: 683b ldr r3, [r7, #0] + 8035f8c: 3b02 subs r3, #2 + 8035f8e: 603b str r3, [r7, #0] while (len > 1) { - 8035f60: 683b ldr r3, [r7, #0] - 8035f62: 2b01 cmp r3, #1 - 8035f64: dcf1 bgt.n 8035f4a + 8035f90: 683b ldr r3, [r7, #0] + 8035f92: 2b01 cmp r3, #1 + 8035f94: dcf1 bgt.n 8035f7a } /* Consume left-over byte, if any */ if (len > 0) { - 8035f66: 683b ldr r3, [r7, #0] - 8035f68: 2b00 cmp r3, #0 - 8035f6a: dd04 ble.n 8035f76 + 8035f96: 683b ldr r3, [r7, #0] + 8035f98: 2b00 cmp r3, #0 + 8035f9a: dd04 ble.n 8035fa6 ((u8_t *)&t)[0] = *(const u8_t *)ps; - 8035f6c: f107 030e add.w r3, r7, #14 - 8035f70: 69ba ldr r2, [r7, #24] - 8035f72: 7812 ldrb r2, [r2, #0] - 8035f74: 701a strb r2, [r3, #0] + 8035f9c: f107 030e add.w r3, r7, #14 + 8035fa0: 69ba ldr r2, [r7, #24] + 8035fa2: 7812 ldrb r2, [r2, #0] + 8035fa4: 701a strb r2, [r3, #0] } /* Add end bytes */ sum += t; - 8035f76: 89fb ldrh r3, [r7, #14] - 8035f78: 461a mov r2, r3 - 8035f7a: 697b ldr r3, [r7, #20] - 8035f7c: 4413 add r3, r2 - 8035f7e: 617b str r3, [r7, #20] + 8035fa6: 89fb ldrh r3, [r7, #14] + 8035fa8: 461a mov r2, r3 + 8035faa: 697b ldr r3, [r7, #20] + 8035fac: 4413 add r3, r2 + 8035fae: 617b str r3, [r7, #20] /* Fold 32-bit sum to 16 bits calling this twice is probably faster than if statements... */ sum = FOLD_U32T(sum); - 8035f80: 697b ldr r3, [r7, #20] - 8035f82: 0c1a lsrs r2, r3, #16 - 8035f84: 697b ldr r3, [r7, #20] - 8035f86: b29b uxth r3, r3 - 8035f88: 4413 add r3, r2 - 8035f8a: 617b str r3, [r7, #20] + 8035fb0: 697b ldr r3, [r7, #20] + 8035fb2: 0c1a lsrs r2, r3, #16 + 8035fb4: 697b ldr r3, [r7, #20] + 8035fb6: b29b uxth r3, r3 + 8035fb8: 4413 add r3, r2 + 8035fba: 617b str r3, [r7, #20] sum = FOLD_U32T(sum); - 8035f8c: 697b ldr r3, [r7, #20] - 8035f8e: 0c1a lsrs r2, r3, #16 - 8035f90: 697b ldr r3, [r7, #20] - 8035f92: b29b uxth r3, r3 - 8035f94: 4413 add r3, r2 - 8035f96: 617b str r3, [r7, #20] + 8035fbc: 697b ldr r3, [r7, #20] + 8035fbe: 0c1a lsrs r2, r3, #16 + 8035fc0: 697b ldr r3, [r7, #20] + 8035fc2: b29b uxth r3, r3 + 8035fc4: 4413 add r3, r2 + 8035fc6: 617b str r3, [r7, #20] /* Swap if alignment was odd */ if (odd) { - 8035f98: 693b ldr r3, [r7, #16] - 8035f9a: 2b00 cmp r3, #0 - 8035f9c: d007 beq.n 8035fae + 8035fc8: 693b ldr r3, [r7, #16] + 8035fca: 2b00 cmp r3, #0 + 8035fcc: d007 beq.n 8035fde sum = SWAP_BYTES_IN_WORD(sum); - 8035f9e: 697b ldr r3, [r7, #20] - 8035fa0: 021b lsls r3, r3, #8 - 8035fa2: b29a uxth r2, r3 - 8035fa4: 697b ldr r3, [r7, #20] - 8035fa6: 0a1b lsrs r3, r3, #8 - 8035fa8: b2db uxtb r3, r3 - 8035faa: 4313 orrs r3, r2 - 8035fac: 617b str r3, [r7, #20] + 8035fce: 697b ldr r3, [r7, #20] + 8035fd0: 021b lsls r3, r3, #8 + 8035fd2: b29a uxth r2, r3 + 8035fd4: 697b ldr r3, [r7, #20] + 8035fd6: 0a1b lsrs r3, r3, #8 + 8035fd8: b2db uxtb r3, r3 + 8035fda: 4313 orrs r3, r2 + 8035fdc: 617b str r3, [r7, #20] } return (u16_t)sum; - 8035fae: 697b ldr r3, [r7, #20] - 8035fb0: b29b uxth r3, r3 + 8035fde: 697b ldr r3, [r7, #20] + 8035fe0: b29b uxth r3, r3 } - 8035fb2: 4618 mov r0, r3 - 8035fb4: 3724 adds r7, #36 ; 0x24 - 8035fb6: 46bd mov sp, r7 - 8035fb8: f85d 7b04 ldr.w r7, [sp], #4 - 8035fbc: 4770 bx lr + 8035fe2: 4618 mov r0, r3 + 8035fe4: 3724 adds r7, #36 ; 0x24 + 8035fe6: 46bd mov sp, r7 + 8035fe8: f85d 7b04 ldr.w r7, [sp], #4 + 8035fec: 4770 bx lr -08035fbe : +08035fee : * @return checksum (as u16_t) to be saved directly in the protocol header */ u16_t inet_chksum(const void *dataptr, u16_t len) { - 8035fbe: b580 push {r7, lr} - 8035fc0: b082 sub sp, #8 - 8035fc2: af00 add r7, sp, #0 - 8035fc4: 6078 str r0, [r7, #4] - 8035fc6: 460b mov r3, r1 - 8035fc8: 807b strh r3, [r7, #2] + 8035fee: b580 push {r7, lr} + 8035ff0: b082 sub sp, #8 + 8035ff2: af00 add r7, sp, #0 + 8035ff4: 6078 str r0, [r7, #4] + 8035ff6: 460b mov r3, r1 + 8035ff8: 807b strh r3, [r7, #2] return (u16_t)~(unsigned int)LWIP_CHKSUM(dataptr, len); - 8035fca: 887b ldrh r3, [r7, #2] - 8035fcc: 4619 mov r1, r3 - 8035fce: 6878 ldr r0, [r7, #4] - 8035fd0: f7ff ff98 bl 8035f04 - 8035fd4: 4603 mov r3, r0 - 8035fd6: 43db mvns r3, r3 - 8035fd8: b29b uxth r3, r3 -} - 8035fda: 4618 mov r0, r3 - 8035fdc: 3708 adds r7, #8 - 8035fde: 46bd mov sp, r7 - 8035fe0: bd80 pop {r7, pc} - -08035fe2 : + 8035ffa: 887b ldrh r3, [r7, #2] + 8035ffc: 4619 mov r1, r3 + 8035ffe: 6878 ldr r0, [r7, #4] + 8036000: f7ff ff98 bl 8035f34 + 8036004: 4603 mov r3, r0 + 8036006: 43db mvns r3, r3 + 8036008: b29b uxth r3, r3 +} + 803600a: 4618 mov r0, r3 + 803600c: 3708 adds r7, #8 + 803600e: 46bd mov sp, r7 + 8036010: bd80 pop {r7, pc} + +08036012 : * @param p pbuf chain over that the checksum should be calculated * @return checksum (as u16_t) to be saved directly in the protocol header */ u16_t inet_chksum_pbuf(struct pbuf *p) { - 8035fe2: b580 push {r7, lr} - 8035fe4: b086 sub sp, #24 - 8035fe6: af00 add r7, sp, #0 - 8035fe8: 6078 str r0, [r7, #4] + 8036012: b580 push {r7, lr} + 8036014: b086 sub sp, #24 + 8036016: af00 add r7, sp, #0 + 8036018: 6078 str r0, [r7, #4] u32_t acc; struct pbuf *q; int swapped = 0; - 8035fea: 2300 movs r3, #0 - 8035fec: 60fb str r3, [r7, #12] + 803601a: 2300 movs r3, #0 + 803601c: 60fb str r3, [r7, #12] acc = 0; - 8035fee: 2300 movs r3, #0 - 8035ff0: 617b str r3, [r7, #20] + 803601e: 2300 movs r3, #0 + 8036020: 617b str r3, [r7, #20] for (q = p; q != NULL; q = q->next) { - 8035ff2: 687b ldr r3, [r7, #4] - 8035ff4: 613b str r3, [r7, #16] - 8035ff6: e02b b.n 8036050 + 8036022: 687b ldr r3, [r7, #4] + 8036024: 613b str r3, [r7, #16] + 8036026: e02b b.n 8036080 acc += LWIP_CHKSUM(q->payload, q->len); - 8035ff8: 693b ldr r3, [r7, #16] - 8035ffa: 685a ldr r2, [r3, #4] - 8035ffc: 693b ldr r3, [r7, #16] - 8035ffe: 895b ldrh r3, [r3, #10] - 8036000: 4619 mov r1, r3 - 8036002: 4610 mov r0, r2 - 8036004: f7ff ff7e bl 8035f04 - 8036008: 4603 mov r3, r0 - 803600a: 461a mov r2, r3 - 803600c: 697b ldr r3, [r7, #20] - 803600e: 4413 add r3, r2 - 8036010: 617b str r3, [r7, #20] + 8036028: 693b ldr r3, [r7, #16] + 803602a: 685a ldr r2, [r3, #4] + 803602c: 693b ldr r3, [r7, #16] + 803602e: 895b ldrh r3, [r3, #10] + 8036030: 4619 mov r1, r3 + 8036032: 4610 mov r0, r2 + 8036034: f7ff ff7e bl 8035f34 + 8036038: 4603 mov r3, r0 + 803603a: 461a mov r2, r3 + 803603c: 697b ldr r3, [r7, #20] + 803603e: 4413 add r3, r2 + 8036040: 617b str r3, [r7, #20] acc = FOLD_U32T(acc); - 8036012: 697b ldr r3, [r7, #20] - 8036014: 0c1a lsrs r2, r3, #16 - 8036016: 697b ldr r3, [r7, #20] - 8036018: b29b uxth r3, r3 - 803601a: 4413 add r3, r2 - 803601c: 617b str r3, [r7, #20] + 8036042: 697b ldr r3, [r7, #20] + 8036044: 0c1a lsrs r2, r3, #16 + 8036046: 697b ldr r3, [r7, #20] + 8036048: b29b uxth r3, r3 + 803604a: 4413 add r3, r2 + 803604c: 617b str r3, [r7, #20] if (q->len % 2 != 0) { - 803601e: 693b ldr r3, [r7, #16] - 8036020: 895b ldrh r3, [r3, #10] - 8036022: f003 0301 and.w r3, r3, #1 - 8036026: b29b uxth r3, r3 - 8036028: 2b00 cmp r3, #0 - 803602a: d00e beq.n 803604a + 803604e: 693b ldr r3, [r7, #16] + 8036050: 895b ldrh r3, [r3, #10] + 8036052: f003 0301 and.w r3, r3, #1 + 8036056: b29b uxth r3, r3 + 8036058: 2b00 cmp r3, #0 + 803605a: d00e beq.n 803607a swapped = !swapped; - 803602c: 68fb ldr r3, [r7, #12] - 803602e: 2b00 cmp r3, #0 - 8036030: bf0c ite eq - 8036032: 2301 moveq r3, #1 - 8036034: 2300 movne r3, #0 - 8036036: b2db uxtb r3, r3 - 8036038: 60fb str r3, [r7, #12] + 803605c: 68fb ldr r3, [r7, #12] + 803605e: 2b00 cmp r3, #0 + 8036060: bf0c ite eq + 8036062: 2301 moveq r3, #1 + 8036064: 2300 movne r3, #0 + 8036066: b2db uxtb r3, r3 + 8036068: 60fb str r3, [r7, #12] acc = SWAP_BYTES_IN_WORD(acc); - 803603a: 697b ldr r3, [r7, #20] - 803603c: 021b lsls r3, r3, #8 - 803603e: b29a uxth r2, r3 - 8036040: 697b ldr r3, [r7, #20] - 8036042: 0a1b lsrs r3, r3, #8 - 8036044: b2db uxtb r3, r3 - 8036046: 4313 orrs r3, r2 - 8036048: 617b str r3, [r7, #20] + 803606a: 697b ldr r3, [r7, #20] + 803606c: 021b lsls r3, r3, #8 + 803606e: b29a uxth r2, r3 + 8036070: 697b ldr r3, [r7, #20] + 8036072: 0a1b lsrs r3, r3, #8 + 8036074: b2db uxtb r3, r3 + 8036076: 4313 orrs r3, r2 + 8036078: 617b str r3, [r7, #20] for (q = p; q != NULL; q = q->next) { - 803604a: 693b ldr r3, [r7, #16] - 803604c: 681b ldr r3, [r3, #0] - 803604e: 613b str r3, [r7, #16] - 8036050: 693b ldr r3, [r7, #16] - 8036052: 2b00 cmp r3, #0 - 8036054: d1d0 bne.n 8035ff8 + 803607a: 693b ldr r3, [r7, #16] + 803607c: 681b ldr r3, [r3, #0] + 803607e: 613b str r3, [r7, #16] + 8036080: 693b ldr r3, [r7, #16] + 8036082: 2b00 cmp r3, #0 + 8036084: d1d0 bne.n 8036028 } } if (swapped) { - 8036056: 68fb ldr r3, [r7, #12] - 8036058: 2b00 cmp r3, #0 - 803605a: d007 beq.n 803606c + 8036086: 68fb ldr r3, [r7, #12] + 8036088: 2b00 cmp r3, #0 + 803608a: d007 beq.n 803609c acc = SWAP_BYTES_IN_WORD(acc); - 803605c: 697b ldr r3, [r7, #20] - 803605e: 021b lsls r3, r3, #8 - 8036060: b29a uxth r2, r3 - 8036062: 697b ldr r3, [r7, #20] - 8036064: 0a1b lsrs r3, r3, #8 - 8036066: b2db uxtb r3, r3 - 8036068: 4313 orrs r3, r2 - 803606a: 617b str r3, [r7, #20] + 803608c: 697b ldr r3, [r7, #20] + 803608e: 021b lsls r3, r3, #8 + 8036090: b29a uxth r2, r3 + 8036092: 697b ldr r3, [r7, #20] + 8036094: 0a1b lsrs r3, r3, #8 + 8036096: b2db uxtb r3, r3 + 8036098: 4313 orrs r3, r2 + 803609a: 617b str r3, [r7, #20] } return (u16_t)~(acc & 0xffffUL); - 803606c: 697b ldr r3, [r7, #20] - 803606e: b29b uxth r3, r3 - 8036070: 43db mvns r3, r3 - 8036072: b29b uxth r3, r3 + 803609c: 697b ldr r3, [r7, #20] + 803609e: b29b uxth r3, r3 + 80360a0: 43db mvns r3, r3 + 80360a2: b29b uxth r3, r3 } - 8036074: 4618 mov r0, r3 - 8036076: 3718 adds r7, #24 - 8036078: 46bd mov sp, r7 - 803607a: bd80 pop {r7, pc} + 80360a4: 4618 mov r0, r3 + 80360a6: 3718 adds r7, #24 + 80360a8: 46bd mov sp, r7 + 80360aa: bd80 pop {r7, pc} -0803607c : +080360ac : * Initialize all modules. * Use this in NO_SYS mode. Use tcpip_init() otherwise. */ void lwip_init(void) { - 803607c: b580 push {r7, lr} - 803607e: b082 sub sp, #8 - 8036080: af00 add r7, sp, #0 + 80360ac: b580 push {r7, lr} + 80360ae: b082 sub sp, #8 + 80360b0: af00 add r7, sp, #0 #ifndef LWIP_SKIP_CONST_CHECK int a = 0; - 8036082: 2300 movs r3, #0 - 8036084: 607b str r3, [r7, #4] + 80360b2: 2300 movs r3, #0 + 80360b4: 607b str r3, [r7, #4] /* Modules initialization */ stats_init(); #if !NO_SYS sys_init(); #endif /* !NO_SYS */ mem_init(); - 8036086: f000 f8d5 bl 8036234 + 80360b6: f000 f8d5 bl 8036264 memp_init(); - 803608a: f000 fbd7 bl 803683c + 80360ba: f000 fbd7 bl 803686c pbuf_init(); netif_init(); - 803608e: f000 fcd5 bl 8036a3c + 80360be: f000 fcd5 bl 8036a6c #endif /* LWIP_IPV4 */ #if LWIP_RAW raw_init(); #endif /* LWIP_RAW */ #if LWIP_UDP udp_init(); - 8036092: f007 ff2b bl 803deec + 80360c2: f007 ff2b bl 803df1c #endif /* LWIP_UDP */ #if LWIP_TCP tcp_init(); - 8036096: f001 fdc7 bl 8037c28 + 80360c6: f001 fdc7 bl 8037c58 #if PPP_SUPPORT ppp_init(); #endif #if LWIP_TIMERS sys_timeouts_init(); - 803609a: f007 fe9d bl 803ddd8 + 80360ca: f007 fe9d bl 803de08 #endif /* LWIP_TIMERS */ } - 803609e: bf00 nop - 80360a0: 3708 adds r7, #8 - 80360a2: 46bd mov sp, r7 - 80360a4: bd80 pop {r7, pc} + 80360ce: bf00 nop + 80360d0: 3708 adds r7, #8 + 80360d2: 46bd mov sp, r7 + 80360d4: bd80 pop {r7, pc} ... -080360a8 : +080360d8 : #define mem_overflow_check_element(mem) #endif /* MEM_OVERFLOW_CHECK */ static struct mem * ptr_to_mem(mem_size_t ptr) { - 80360a8: b480 push {r7} - 80360aa: b083 sub sp, #12 - 80360ac: af00 add r7, sp, #0 - 80360ae: 4603 mov r3, r0 - 80360b0: 80fb strh r3, [r7, #6] + 80360d8: b480 push {r7} + 80360da: b083 sub sp, #12 + 80360dc: af00 add r7, sp, #0 + 80360de: 4603 mov r3, r0 + 80360e0: 80fb strh r3, [r7, #6] return (struct mem *)(void *)&ram[ptr]; - 80360b2: 4b05 ldr r3, [pc, #20] ; (80360c8 ) - 80360b4: 681a ldr r2, [r3, #0] - 80360b6: 88fb ldrh r3, [r7, #6] - 80360b8: 4413 add r3, r2 + 80360e2: 4b05 ldr r3, [pc, #20] ; (80360f8 ) + 80360e4: 681a ldr r2, [r3, #0] + 80360e6: 88fb ldrh r3, [r7, #6] + 80360e8: 4413 add r3, r2 } - 80360ba: 4618 mov r0, r3 - 80360bc: 370c adds r7, #12 - 80360be: 46bd mov sp, r7 - 80360c0: f85d 7b04 ldr.w r7, [sp], #4 - 80360c4: 4770 bx lr - 80360c6: bf00 nop - 80360c8: 2400b9d4 .word 0x2400b9d4 + 80360ea: 4618 mov r0, r3 + 80360ec: 370c adds r7, #12 + 80360ee: 46bd mov sp, r7 + 80360f0: f85d 7b04 ldr.w r7, [sp], #4 + 80360f4: 4770 bx lr + 80360f6: bf00 nop + 80360f8: 2400b9d4 .word 0x2400b9d4 -080360cc : +080360fc : static mem_size_t mem_to_ptr(void *mem) { - 80360cc: b480 push {r7} - 80360ce: b083 sub sp, #12 - 80360d0: af00 add r7, sp, #0 - 80360d2: 6078 str r0, [r7, #4] + 80360fc: b480 push {r7} + 80360fe: b083 sub sp, #12 + 8036100: af00 add r7, sp, #0 + 8036102: 6078 str r0, [r7, #4] return (mem_size_t)((u8_t *)mem - ram); - 80360d4: 4b05 ldr r3, [pc, #20] ; (80360ec ) - 80360d6: 681b ldr r3, [r3, #0] - 80360d8: 687a ldr r2, [r7, #4] - 80360da: 1ad3 subs r3, r2, r3 - 80360dc: b29b uxth r3, r3 -} - 80360de: 4618 mov r0, r3 - 80360e0: 370c adds r7, #12 - 80360e2: 46bd mov sp, r7 - 80360e4: f85d 7b04 ldr.w r7, [sp], #4 - 80360e8: 4770 bx lr - 80360ea: bf00 nop - 80360ec: 2400b9d4 .word 0x2400b9d4 - -080360f0 : + 8036104: 4b05 ldr r3, [pc, #20] ; (803611c ) + 8036106: 681b ldr r3, [r3, #0] + 8036108: 687a ldr r2, [r7, #4] + 803610a: 1ad3 subs r3, r2, r3 + 803610c: b29b uxth r3, r3 +} + 803610e: 4618 mov r0, r3 + 8036110: 370c adds r7, #12 + 8036112: 46bd mov sp, r7 + 8036114: f85d 7b04 ldr.w r7, [sp], #4 + 8036118: 4770 bx lr + 803611a: bf00 nop + 803611c: 2400b9d4 .word 0x2400b9d4 + +08036120 : * This assumes access to the heap is protected by the calling function * already. */ static void plug_holes(struct mem *mem) { - 80360f0: b590 push {r4, r7, lr} - 80360f2: b085 sub sp, #20 - 80360f4: af00 add r7, sp, #0 - 80360f6: 6078 str r0, [r7, #4] + 8036120: b590 push {r4, r7, lr} + 8036122: b085 sub sp, #20 + 8036124: af00 add r7, sp, #0 + 8036126: 6078 str r0, [r7, #4] struct mem *nmem; struct mem *pmem; LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); - 80360f8: 4b45 ldr r3, [pc, #276] ; (8036210 ) - 80360fa: 681b ldr r3, [r3, #0] - 80360fc: 687a ldr r2, [r7, #4] - 80360fe: 429a cmp r2, r3 - 8036100: d206 bcs.n 8036110 - 8036102: 4b44 ldr r3, [pc, #272] ; (8036214 ) - 8036104: f240 12df movw r2, #479 ; 0x1df - 8036108: 4943 ldr r1, [pc, #268] ; (8036218 ) - 803610a: 4844 ldr r0, [pc, #272] ; (803621c ) - 803610c: f00a fce8 bl 8040ae0 + 8036128: 4b45 ldr r3, [pc, #276] ; (8036240 ) + 803612a: 681b ldr r3, [r3, #0] + 803612c: 687a ldr r2, [r7, #4] + 803612e: 429a cmp r2, r3 + 8036130: d206 bcs.n 8036140 + 8036132: 4b44 ldr r3, [pc, #272] ; (8036244 ) + 8036134: f240 12df movw r2, #479 ; 0x1df + 8036138: 4943 ldr r1, [pc, #268] ; (8036248 ) + 803613a: 4844 ldr r0, [pc, #272] ; (803624c ) + 803613c: f00a fce8 bl 8040b10 LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end); - 8036110: 4b43 ldr r3, [pc, #268] ; (8036220 ) - 8036112: 681b ldr r3, [r3, #0] - 8036114: 687a ldr r2, [r7, #4] - 8036116: 429a cmp r2, r3 - 8036118: d306 bcc.n 8036128 - 803611a: 4b3e ldr r3, [pc, #248] ; (8036214 ) - 803611c: f44f 72f0 mov.w r2, #480 ; 0x1e0 - 8036120: 4940 ldr r1, [pc, #256] ; (8036224 ) - 8036122: 483e ldr r0, [pc, #248] ; (803621c ) - 8036124: f00a fcdc bl 8040ae0 + 8036140: 4b43 ldr r3, [pc, #268] ; (8036250 ) + 8036142: 681b ldr r3, [r3, #0] + 8036144: 687a ldr r2, [r7, #4] + 8036146: 429a cmp r2, r3 + 8036148: d306 bcc.n 8036158 + 803614a: 4b3e ldr r3, [pc, #248] ; (8036244 ) + 803614c: f44f 72f0 mov.w r2, #480 ; 0x1e0 + 8036150: 4940 ldr r1, [pc, #256] ; (8036254 ) + 8036152: 483e ldr r0, [pc, #248] ; (803624c ) + 8036154: f00a fcdc bl 8040b10 LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0); - 8036128: 687b ldr r3, [r7, #4] - 803612a: 791b ldrb r3, [r3, #4] - 803612c: 2b00 cmp r3, #0 - 803612e: d006 beq.n 803613e - 8036130: 4b38 ldr r3, [pc, #224] ; (8036214 ) - 8036132: f240 12e1 movw r2, #481 ; 0x1e1 - 8036136: 493c ldr r1, [pc, #240] ; (8036228 ) - 8036138: 4838 ldr r0, [pc, #224] ; (803621c ) - 803613a: f00a fcd1 bl 8040ae0 + 8036158: 687b ldr r3, [r7, #4] + 803615a: 791b ldrb r3, [r3, #4] + 803615c: 2b00 cmp r3, #0 + 803615e: d006 beq.n 803616e + 8036160: 4b38 ldr r3, [pc, #224] ; (8036244 ) + 8036162: f240 12e1 movw r2, #481 ; 0x1e1 + 8036166: 493c ldr r1, [pc, #240] ; (8036258 ) + 8036168: 4838 ldr r0, [pc, #224] ; (803624c ) + 803616a: f00a fcd1 bl 8040b10 /* plug hole forward */ LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED); - 803613e: 687b ldr r3, [r7, #4] - 8036140: 881b ldrh r3, [r3, #0] - 8036142: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036146: d906 bls.n 8036156 - 8036148: 4b32 ldr r3, [pc, #200] ; (8036214 ) - 803614a: f44f 72f2 mov.w r2, #484 ; 0x1e4 - 803614e: 4937 ldr r1, [pc, #220] ; (803622c ) - 8036150: 4832 ldr r0, [pc, #200] ; (803621c ) - 8036152: f00a fcc5 bl 8040ae0 + 803616e: 687b ldr r3, [r7, #4] + 8036170: 881b ldrh r3, [r3, #0] + 8036172: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036176: d906 bls.n 8036186 + 8036178: 4b32 ldr r3, [pc, #200] ; (8036244 ) + 803617a: f44f 72f2 mov.w r2, #484 ; 0x1e4 + 803617e: 4937 ldr r1, [pc, #220] ; (803625c ) + 8036180: 4832 ldr r0, [pc, #200] ; (803624c ) + 8036182: f00a fcc5 bl 8040b10 nmem = ptr_to_mem(mem->next); - 8036156: 687b ldr r3, [r7, #4] - 8036158: 881b ldrh r3, [r3, #0] - 803615a: 4618 mov r0, r3 - 803615c: f7ff ffa4 bl 80360a8 - 8036160: 60f8 str r0, [r7, #12] + 8036186: 687b ldr r3, [r7, #4] + 8036188: 881b ldrh r3, [r3, #0] + 803618a: 4618 mov r0, r3 + 803618c: f7ff ffa4 bl 80360d8 + 8036190: 60f8 str r0, [r7, #12] if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) { - 8036162: 687a ldr r2, [r7, #4] - 8036164: 68fb ldr r3, [r7, #12] - 8036166: 429a cmp r2, r3 - 8036168: d024 beq.n 80361b4 - 803616a: 68fb ldr r3, [r7, #12] - 803616c: 791b ldrb r3, [r3, #4] - 803616e: 2b00 cmp r3, #0 - 8036170: d120 bne.n 80361b4 - 8036172: 4b2b ldr r3, [pc, #172] ; (8036220 ) - 8036174: 681b ldr r3, [r3, #0] - 8036176: 68fa ldr r2, [r7, #12] - 8036178: 429a cmp r2, r3 - 803617a: d01b beq.n 80361b4 + 8036192: 687a ldr r2, [r7, #4] + 8036194: 68fb ldr r3, [r7, #12] + 8036196: 429a cmp r2, r3 + 8036198: d024 beq.n 80361e4 + 803619a: 68fb ldr r3, [r7, #12] + 803619c: 791b ldrb r3, [r3, #4] + 803619e: 2b00 cmp r3, #0 + 80361a0: d120 bne.n 80361e4 + 80361a2: 4b2b ldr r3, [pc, #172] ; (8036250 ) + 80361a4: 681b ldr r3, [r3, #0] + 80361a6: 68fa ldr r2, [r7, #12] + 80361a8: 429a cmp r2, r3 + 80361aa: d01b beq.n 80361e4 /* if mem->next is unused and not end of ram, combine mem and mem->next */ if (lfree == nmem) { - 803617c: 4b2c ldr r3, [pc, #176] ; (8036230 ) - 803617e: 681b ldr r3, [r3, #0] - 8036180: 68fa ldr r2, [r7, #12] - 8036182: 429a cmp r2, r3 - 8036184: d102 bne.n 803618c + 80361ac: 4b2c ldr r3, [pc, #176] ; (8036260 ) + 80361ae: 681b ldr r3, [r3, #0] + 80361b0: 68fa ldr r2, [r7, #12] + 80361b2: 429a cmp r2, r3 + 80361b4: d102 bne.n 80361bc lfree = mem; - 8036186: 4a2a ldr r2, [pc, #168] ; (8036230 ) - 8036188: 687b ldr r3, [r7, #4] - 803618a: 6013 str r3, [r2, #0] + 80361b6: 4a2a ldr r2, [pc, #168] ; (8036260 ) + 80361b8: 687b ldr r3, [r7, #4] + 80361ba: 6013 str r3, [r2, #0] } mem->next = nmem->next; - 803618c: 68fb ldr r3, [r7, #12] - 803618e: 881a ldrh r2, [r3, #0] - 8036190: 687b ldr r3, [r7, #4] - 8036192: 801a strh r2, [r3, #0] + 80361bc: 68fb ldr r3, [r7, #12] + 80361be: 881a ldrh r2, [r3, #0] + 80361c0: 687b ldr r3, [r7, #4] + 80361c2: 801a strh r2, [r3, #0] if (nmem->next != MEM_SIZE_ALIGNED) { - 8036194: 68fb ldr r3, [r7, #12] - 8036196: 881b ldrh r3, [r3, #0] - 8036198: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 803619c: d00a beq.n 80361b4 + 80361c4: 68fb ldr r3, [r7, #12] + 80361c6: 881b ldrh r3, [r3, #0] + 80361c8: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80361cc: d00a beq.n 80361e4 ptr_to_mem(nmem->next)->prev = mem_to_ptr(mem); - 803619e: 68fb ldr r3, [r7, #12] - 80361a0: 881b ldrh r3, [r3, #0] - 80361a2: 4618 mov r0, r3 - 80361a4: f7ff ff80 bl 80360a8 - 80361a8: 4604 mov r4, r0 - 80361aa: 6878 ldr r0, [r7, #4] - 80361ac: f7ff ff8e bl 80360cc - 80361b0: 4603 mov r3, r0 - 80361b2: 8063 strh r3, [r4, #2] + 80361ce: 68fb ldr r3, [r7, #12] + 80361d0: 881b ldrh r3, [r3, #0] + 80361d2: 4618 mov r0, r3 + 80361d4: f7ff ff80 bl 80360d8 + 80361d8: 4604 mov r4, r0 + 80361da: 6878 ldr r0, [r7, #4] + 80361dc: f7ff ff8e bl 80360fc + 80361e0: 4603 mov r3, r0 + 80361e2: 8063 strh r3, [r4, #2] } } /* plug hole backward */ pmem = ptr_to_mem(mem->prev); - 80361b4: 687b ldr r3, [r7, #4] - 80361b6: 885b ldrh r3, [r3, #2] - 80361b8: 4618 mov r0, r3 - 80361ba: f7ff ff75 bl 80360a8 - 80361be: 60b8 str r0, [r7, #8] + 80361e4: 687b ldr r3, [r7, #4] + 80361e6: 885b ldrh r3, [r3, #2] + 80361e8: 4618 mov r0, r3 + 80361ea: f7ff ff75 bl 80360d8 + 80361ee: 60b8 str r0, [r7, #8] if (pmem != mem && pmem->used == 0) { - 80361c0: 68ba ldr r2, [r7, #8] - 80361c2: 687b ldr r3, [r7, #4] - 80361c4: 429a cmp r2, r3 - 80361c6: d01f beq.n 8036208 - 80361c8: 68bb ldr r3, [r7, #8] - 80361ca: 791b ldrb r3, [r3, #4] - 80361cc: 2b00 cmp r3, #0 - 80361ce: d11b bne.n 8036208 + 80361f0: 68ba ldr r2, [r7, #8] + 80361f2: 687b ldr r3, [r7, #4] + 80361f4: 429a cmp r2, r3 + 80361f6: d01f beq.n 8036238 + 80361f8: 68bb ldr r3, [r7, #8] + 80361fa: 791b ldrb r3, [r3, #4] + 80361fc: 2b00 cmp r3, #0 + 80361fe: d11b bne.n 8036238 /* if mem->prev is unused, combine mem and mem->prev */ if (lfree == mem) { - 80361d0: 4b17 ldr r3, [pc, #92] ; (8036230 ) - 80361d2: 681b ldr r3, [r3, #0] - 80361d4: 687a ldr r2, [r7, #4] - 80361d6: 429a cmp r2, r3 - 80361d8: d102 bne.n 80361e0 + 8036200: 4b17 ldr r3, [pc, #92] ; (8036260 ) + 8036202: 681b ldr r3, [r3, #0] + 8036204: 687a ldr r2, [r7, #4] + 8036206: 429a cmp r2, r3 + 8036208: d102 bne.n 8036210 lfree = pmem; - 80361da: 4a15 ldr r2, [pc, #84] ; (8036230 ) - 80361dc: 68bb ldr r3, [r7, #8] - 80361de: 6013 str r3, [r2, #0] + 803620a: 4a15 ldr r2, [pc, #84] ; (8036260 ) + 803620c: 68bb ldr r3, [r7, #8] + 803620e: 6013 str r3, [r2, #0] } pmem->next = mem->next; - 80361e0: 687b ldr r3, [r7, #4] - 80361e2: 881a ldrh r2, [r3, #0] - 80361e4: 68bb ldr r3, [r7, #8] - 80361e6: 801a strh r2, [r3, #0] + 8036210: 687b ldr r3, [r7, #4] + 8036212: 881a ldrh r2, [r3, #0] + 8036214: 68bb ldr r3, [r7, #8] + 8036216: 801a strh r2, [r3, #0] if (mem->next != MEM_SIZE_ALIGNED) { - 80361e8: 687b ldr r3, [r7, #4] - 80361ea: 881b ldrh r3, [r3, #0] - 80361ec: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80361f0: d00a beq.n 8036208 + 8036218: 687b ldr r3, [r7, #4] + 803621a: 881b ldrh r3, [r3, #0] + 803621c: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036220: d00a beq.n 8036238 ptr_to_mem(mem->next)->prev = mem_to_ptr(pmem); - 80361f2: 687b ldr r3, [r7, #4] - 80361f4: 881b ldrh r3, [r3, #0] - 80361f6: 4618 mov r0, r3 - 80361f8: f7ff ff56 bl 80360a8 - 80361fc: 4604 mov r4, r0 - 80361fe: 68b8 ldr r0, [r7, #8] - 8036200: f7ff ff64 bl 80360cc - 8036204: 4603 mov r3, r0 - 8036206: 8063 strh r3, [r4, #2] + 8036222: 687b ldr r3, [r7, #4] + 8036224: 881b ldrh r3, [r3, #0] + 8036226: 4618 mov r0, r3 + 8036228: f7ff ff56 bl 80360d8 + 803622c: 4604 mov r4, r0 + 803622e: 68b8 ldr r0, [r7, #8] + 8036230: f7ff ff64 bl 80360fc + 8036234: 4603 mov r3, r0 + 8036236: 8063 strh r3, [r4, #2] } } } - 8036208: bf00 nop - 803620a: 3714 adds r7, #20 - 803620c: 46bd mov sp, r7 - 803620e: bd90 pop {r4, r7, pc} - 8036210: 2400b9d4 .word 0x2400b9d4 - 8036214: 080422f0 .word 0x080422f0 - 8036218: 08042320 .word 0x08042320 - 803621c: 08042338 .word 0x08042338 - 8036220: 2400b9d8 .word 0x2400b9d8 - 8036224: 08042360 .word 0x08042360 - 8036228: 0804237c .word 0x0804237c - 803622c: 08042398 .word 0x08042398 - 8036230: 2400b9dc .word 0x2400b9dc - -08036234 : + 8036238: bf00 nop + 803623a: 3714 adds r7, #20 + 803623c: 46bd mov sp, r7 + 803623e: bd90 pop {r4, r7, pc} + 8036240: 2400b9d4 .word 0x2400b9d4 + 8036244: 08042320 .word 0x08042320 + 8036248: 08042350 .word 0x08042350 + 803624c: 08042368 .word 0x08042368 + 8036250: 2400b9d8 .word 0x2400b9d8 + 8036254: 08042390 .word 0x08042390 + 8036258: 080423ac .word 0x080423ac + 803625c: 080423c8 .word 0x080423c8 + 8036260: 2400b9dc .word 0x2400b9dc + +08036264 : /** * Zero the heap and initialize start, end and lowest-free */ void mem_init(void) { - 8036234: b580 push {r7, lr} - 8036236: b082 sub sp, #8 - 8036238: af00 add r7, sp, #0 + 8036264: b580 push {r7, lr} + 8036266: b082 sub sp, #8 + 8036268: af00 add r7, sp, #0 LWIP_ASSERT("Sanity check alignment", (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT - 1)) == 0); /* align the heap */ ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER); - 803623a: 4b16 ldr r3, [pc, #88] ; (8036294 ) - 803623c: 4a16 ldr r2, [pc, #88] ; (8036298 ) - 803623e: 601a str r2, [r3, #0] + 803626a: 4b16 ldr r3, [pc, #88] ; (80362c4 ) + 803626c: 4a16 ldr r2, [pc, #88] ; (80362c8 ) + 803626e: 601a str r2, [r3, #0] /* initialize the start of the heap */ mem = (struct mem *)(void *)ram; - 8036240: 4b14 ldr r3, [pc, #80] ; (8036294 ) - 8036242: 681b ldr r3, [r3, #0] - 8036244: 607b str r3, [r7, #4] + 8036270: 4b14 ldr r3, [pc, #80] ; (80362c4 ) + 8036272: 681b ldr r3, [r3, #0] + 8036274: 607b str r3, [r7, #4] mem->next = MEM_SIZE_ALIGNED; - 8036246: 687b ldr r3, [r7, #4] - 8036248: f44f 62c8 mov.w r2, #1600 ; 0x640 - 803624c: 801a strh r2, [r3, #0] + 8036276: 687b ldr r3, [r7, #4] + 8036278: f44f 62c8 mov.w r2, #1600 ; 0x640 + 803627c: 801a strh r2, [r3, #0] mem->prev = 0; - 803624e: 687b ldr r3, [r7, #4] - 8036250: 2200 movs r2, #0 - 8036252: 805a strh r2, [r3, #2] + 803627e: 687b ldr r3, [r7, #4] + 8036280: 2200 movs r2, #0 + 8036282: 805a strh r2, [r3, #2] mem->used = 0; - 8036254: 687b ldr r3, [r7, #4] - 8036256: 2200 movs r2, #0 - 8036258: 711a strb r2, [r3, #4] + 8036284: 687b ldr r3, [r7, #4] + 8036286: 2200 movs r2, #0 + 8036288: 711a strb r2, [r3, #4] /* initialize the end of the heap */ ram_end = ptr_to_mem(MEM_SIZE_ALIGNED); - 803625a: f44f 60c8 mov.w r0, #1600 ; 0x640 - 803625e: f7ff ff23 bl 80360a8 - 8036262: 4603 mov r3, r0 - 8036264: 4a0d ldr r2, [pc, #52] ; (803629c ) - 8036266: 6013 str r3, [r2, #0] + 803628a: f44f 60c8 mov.w r0, #1600 ; 0x640 + 803628e: f7ff ff23 bl 80360d8 + 8036292: 4603 mov r3, r0 + 8036294: 4a0d ldr r2, [pc, #52] ; (80362cc ) + 8036296: 6013 str r3, [r2, #0] ram_end->used = 1; - 8036268: 4b0c ldr r3, [pc, #48] ; (803629c ) - 803626a: 681b ldr r3, [r3, #0] - 803626c: 2201 movs r2, #1 - 803626e: 711a strb r2, [r3, #4] + 8036298: 4b0c ldr r3, [pc, #48] ; (80362cc ) + 803629a: 681b ldr r3, [r3, #0] + 803629c: 2201 movs r2, #1 + 803629e: 711a strb r2, [r3, #4] ram_end->next = MEM_SIZE_ALIGNED; - 8036270: 4b0a ldr r3, [pc, #40] ; (803629c ) - 8036272: 681b ldr r3, [r3, #0] - 8036274: f44f 62c8 mov.w r2, #1600 ; 0x640 - 8036278: 801a strh r2, [r3, #0] + 80362a0: 4b0a ldr r3, [pc, #40] ; (80362cc ) + 80362a2: 681b ldr r3, [r3, #0] + 80362a4: f44f 62c8 mov.w r2, #1600 ; 0x640 + 80362a8: 801a strh r2, [r3, #0] ram_end->prev = MEM_SIZE_ALIGNED; - 803627a: 4b08 ldr r3, [pc, #32] ; (803629c ) - 803627c: 681b ldr r3, [r3, #0] - 803627e: f44f 62c8 mov.w r2, #1600 ; 0x640 - 8036282: 805a strh r2, [r3, #2] + 80362aa: 4b08 ldr r3, [pc, #32] ; (80362cc ) + 80362ac: 681b ldr r3, [r3, #0] + 80362ae: f44f 62c8 mov.w r2, #1600 ; 0x640 + 80362b2: 805a strh r2, [r3, #2] MEM_SANITY(); /* initialize the lowest-free pointer to the start of the heap */ lfree = (struct mem *)(void *)ram; - 8036284: 4b03 ldr r3, [pc, #12] ; (8036294 ) - 8036286: 681b ldr r3, [r3, #0] - 8036288: 4a05 ldr r2, [pc, #20] ; (80362a0 ) - 803628a: 6013 str r3, [r2, #0] + 80362b4: 4b03 ldr r3, [pc, #12] ; (80362c4 ) + 80362b6: 681b ldr r3, [r3, #0] + 80362b8: 4a05 ldr r2, [pc, #20] ; (80362d0 ) + 80362ba: 6013 str r3, [r2, #0] MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED); if (sys_mutex_new(&mem_mutex) != ERR_OK) { LWIP_ASSERT("failed to create mem_mutex", 0); } } - 803628c: bf00 nop - 803628e: 3708 adds r7, #8 - 8036290: 46bd mov sp, r7 - 8036292: bd80 pop {r7, pc} - 8036294: 2400b9d4 .word 0x2400b9d4 - 8036298: 30044000 .word 0x30044000 - 803629c: 2400b9d8 .word 0x2400b9d8 - 80362a0: 2400b9dc .word 0x2400b9dc + 80362bc: bf00 nop + 80362be: 3708 adds r7, #8 + 80362c0: 46bd mov sp, r7 + 80362c2: bd80 pop {r7, pc} + 80362c4: 2400b9d4 .word 0x2400b9d4 + 80362c8: 30044000 .word 0x30044000 + 80362cc: 2400b9d8 .word 0x2400b9d8 + 80362d0: 2400b9dc .word 0x2400b9dc -080362a4 : +080362d4 : /* Check if a struct mem is correctly linked. * If not, double-free is a possible reason. */ static int mem_link_valid(struct mem *mem) { - 80362a4: b580 push {r7, lr} - 80362a6: b086 sub sp, #24 - 80362a8: af00 add r7, sp, #0 - 80362aa: 6078 str r0, [r7, #4] + 80362d4: b580 push {r7, lr} + 80362d6: b086 sub sp, #24 + 80362d8: af00 add r7, sp, #0 + 80362da: 6078 str r0, [r7, #4] struct mem *nmem, *pmem; mem_size_t rmem_idx; rmem_idx = mem_to_ptr(mem); - 80362ac: 6878 ldr r0, [r7, #4] - 80362ae: f7ff ff0d bl 80360cc - 80362b2: 4603 mov r3, r0 - 80362b4: 82fb strh r3, [r7, #22] + 80362dc: 6878 ldr r0, [r7, #4] + 80362de: f7ff ff0d bl 80360fc + 80362e2: 4603 mov r3, r0 + 80362e4: 82fb strh r3, [r7, #22] nmem = ptr_to_mem(mem->next); - 80362b6: 687b ldr r3, [r7, #4] - 80362b8: 881b ldrh r3, [r3, #0] - 80362ba: 4618 mov r0, r3 - 80362bc: f7ff fef4 bl 80360a8 - 80362c0: 6138 str r0, [r7, #16] + 80362e6: 687b ldr r3, [r7, #4] + 80362e8: 881b ldrh r3, [r3, #0] + 80362ea: 4618 mov r0, r3 + 80362ec: f7ff fef4 bl 80360d8 + 80362f0: 6138 str r0, [r7, #16] pmem = ptr_to_mem(mem->prev); - 80362c2: 687b ldr r3, [r7, #4] - 80362c4: 885b ldrh r3, [r3, #2] - 80362c6: 4618 mov r0, r3 - 80362c8: f7ff feee bl 80360a8 - 80362cc: 60f8 str r0, [r7, #12] + 80362f2: 687b ldr r3, [r7, #4] + 80362f4: 885b ldrh r3, [r3, #2] + 80362f6: 4618 mov r0, r3 + 80362f8: f7ff feee bl 80360d8 + 80362fc: 60f8 str r0, [r7, #12] if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) || - 80362ce: 687b ldr r3, [r7, #4] - 80362d0: 881b ldrh r3, [r3, #0] - 80362d2: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80362d6: d818 bhi.n 803630a - 80362d8: 687b ldr r3, [r7, #4] - 80362da: 885b ldrh r3, [r3, #2] - 80362dc: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80362e0: d813 bhi.n 803630a + 80362fe: 687b ldr r3, [r7, #4] + 8036300: 881b ldrh r3, [r3, #0] + 8036302: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036306: d818 bhi.n 803633a + 8036308: 687b ldr r3, [r7, #4] + 803630a: 885b ldrh r3, [r3, #2] + 803630c: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036310: d813 bhi.n 803633a ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) || - 80362e2: 687b ldr r3, [r7, #4] - 80362e4: 885b ldrh r3, [r3, #2] + 8036312: 687b ldr r3, [r7, #4] + 8036314: 885b ldrh r3, [r3, #2] if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) || - 80362e6: 8afa ldrh r2, [r7, #22] - 80362e8: 429a cmp r2, r3 - 80362ea: d004 beq.n 80362f6 + 8036316: 8afa ldrh r2, [r7, #22] + 8036318: 429a cmp r2, r3 + 803631a: d004 beq.n 8036326 ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) || - 80362ec: 68fb ldr r3, [r7, #12] - 80362ee: 881b ldrh r3, [r3, #0] - 80362f0: 8afa ldrh r2, [r7, #22] - 80362f2: 429a cmp r2, r3 - 80362f4: d109 bne.n 803630a + 803631c: 68fb ldr r3, [r7, #12] + 803631e: 881b ldrh r3, [r3, #0] + 8036320: 8afa ldrh r2, [r7, #22] + 8036322: 429a cmp r2, r3 + 8036324: d109 bne.n 803633a ((nmem != ram_end) && (nmem->prev != rmem_idx))) { - 80362f6: 4b08 ldr r3, [pc, #32] ; (8036318 ) - 80362f8: 681b ldr r3, [r3, #0] + 8036326: 4b08 ldr r3, [pc, #32] ; (8036348 ) + 8036328: 681b ldr r3, [r3, #0] ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) || - 80362fa: 693a ldr r2, [r7, #16] - 80362fc: 429a cmp r2, r3 - 80362fe: d006 beq.n 803630e + 803632a: 693a ldr r2, [r7, #16] + 803632c: 429a cmp r2, r3 + 803632e: d006 beq.n 803633e ((nmem != ram_end) && (nmem->prev != rmem_idx))) { - 8036300: 693b ldr r3, [r7, #16] - 8036302: 885b ldrh r3, [r3, #2] - 8036304: 8afa ldrh r2, [r7, #22] - 8036306: 429a cmp r2, r3 - 8036308: d001 beq.n 803630e + 8036330: 693b ldr r3, [r7, #16] + 8036332: 885b ldrh r3, [r3, #2] + 8036334: 8afa ldrh r2, [r7, #22] + 8036336: 429a cmp r2, r3 + 8036338: d001 beq.n 803633e return 0; - 803630a: 2300 movs r3, #0 - 803630c: e000 b.n 8036310 + 803633a: 2300 movs r3, #0 + 803633c: e000 b.n 8036340 } return 1; - 803630e: 2301 movs r3, #1 + 803633e: 2301 movs r3, #1 } - 8036310: 4618 mov r0, r3 - 8036312: 3718 adds r7, #24 - 8036314: 46bd mov sp, r7 - 8036316: bd80 pop {r7, pc} - 8036318: 2400b9d8 .word 0x2400b9d8 + 8036340: 4618 mov r0, r3 + 8036342: 3718 adds r7, #24 + 8036344: 46bd mov sp, r7 + 8036346: bd80 pop {r7, pc} + 8036348: 2400b9d8 .word 0x2400b9d8 -0803631c : +0803634c : * @param rmem is the data portion of a struct mem as returned by a previous * call to mem_malloc() */ void mem_free(void *rmem) { - 803631c: b580 push {r7, lr} - 803631e: b084 sub sp, #16 - 8036320: af00 add r7, sp, #0 - 8036322: 6078 str r0, [r7, #4] + 803634c: b580 push {r7, lr} + 803634e: b084 sub sp, #16 + 8036350: af00 add r7, sp, #0 + 8036352: 6078 str r0, [r7, #4] struct mem *mem; LWIP_MEM_FREE_DECL_PROTECT(); if (rmem == NULL) { - 8036324: 687b ldr r3, [r7, #4] - 8036326: 2b00 cmp r3, #0 - 8036328: d04c beq.n 80363c4 + 8036354: 687b ldr r3, [r7, #4] + 8036356: 2b00 cmp r3, #0 + 8036358: d04c beq.n 80363f4 LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n")); return; } if ((((mem_ptr_t)rmem) & (MEM_ALIGNMENT - 1)) != 0) { - 803632a: 687b ldr r3, [r7, #4] - 803632c: f003 0303 and.w r3, r3, #3 - 8036330: 2b00 cmp r3, #0 - 8036332: d007 beq.n 8036344 + 803635a: 687b ldr r3, [r7, #4] + 803635c: f003 0303 and.w r3, r3, #3 + 8036360: 2b00 cmp r3, #0 + 8036362: d007 beq.n 8036374 LWIP_MEM_ILLEGAL_FREE("mem_free: sanity check alignment"); - 8036334: 4b25 ldr r3, [pc, #148] ; (80363cc ) - 8036336: f240 2273 movw r2, #627 ; 0x273 - 803633a: 4925 ldr r1, [pc, #148] ; (80363d0 ) - 803633c: 4825 ldr r0, [pc, #148] ; (80363d4 ) - 803633e: f00a fbcf bl 8040ae0 + 8036364: 4b25 ldr r3, [pc, #148] ; (80363fc ) + 8036366: f240 2273 movw r2, #627 ; 0x273 + 803636a: 4925 ldr r1, [pc, #148] ; (8036400 ) + 803636c: 4825 ldr r0, [pc, #148] ; (8036404 ) + 803636e: f00a fbcf bl 8040b10 LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: sanity check alignment\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return; - 8036342: e040 b.n 80363c6 + 8036372: e040 b.n 80363f6 } /* Get the corresponding struct mem: */ /* cast through void* to get rid of alignment warnings */ mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET)); - 8036344: 687b ldr r3, [r7, #4] - 8036346: 3b08 subs r3, #8 - 8036348: 60fb str r3, [r7, #12] + 8036374: 687b ldr r3, [r7, #4] + 8036376: 3b08 subs r3, #8 + 8036378: 60fb str r3, [r7, #12] if ((u8_t *)mem < ram || (u8_t *)rmem + MIN_SIZE_ALIGNED > (u8_t *)ram_end) { - 803634a: 4b23 ldr r3, [pc, #140] ; (80363d8 ) - 803634c: 681b ldr r3, [r3, #0] - 803634e: 68fa ldr r2, [r7, #12] - 8036350: 429a cmp r2, r3 - 8036352: d306 bcc.n 8036362 - 8036354: 687b ldr r3, [r7, #4] - 8036356: f103 020c add.w r2, r3, #12 - 803635a: 4b20 ldr r3, [pc, #128] ; (80363dc ) - 803635c: 681b ldr r3, [r3, #0] - 803635e: 429a cmp r2, r3 - 8036360: d907 bls.n 8036372 + 803637a: 4b23 ldr r3, [pc, #140] ; (8036408 ) + 803637c: 681b ldr r3, [r3, #0] + 803637e: 68fa ldr r2, [r7, #12] + 8036380: 429a cmp r2, r3 + 8036382: d306 bcc.n 8036392 + 8036384: 687b ldr r3, [r7, #4] + 8036386: f103 020c add.w r2, r3, #12 + 803638a: 4b20 ldr r3, [pc, #128] ; (803640c ) + 803638c: 681b ldr r3, [r3, #0] + 803638e: 429a cmp r2, r3 + 8036390: d907 bls.n 80363a2 LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory"); - 8036362: 4b1a ldr r3, [pc, #104] ; (80363cc ) - 8036364: f240 227f movw r2, #639 ; 0x27f - 8036368: 491d ldr r1, [pc, #116] ; (80363e0 ) - 803636a: 481a ldr r0, [pc, #104] ; (80363d4 ) - 803636c: f00a fbb8 bl 8040ae0 + 8036392: 4b1a ldr r3, [pc, #104] ; (80363fc ) + 8036394: f240 227f movw r2, #639 ; 0x27f + 8036398: 491d ldr r1, [pc, #116] ; (8036410 ) + 803639a: 481a ldr r0, [pc, #104] ; (8036404 ) + 803639c: f00a fbb8 bl 8040b10 LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return; - 8036370: e029 b.n 80363c6 + 80363a0: e029 b.n 80363f6 mem_overflow_check_element(mem); #endif /* protect the heap from concurrent access */ LWIP_MEM_FREE_PROTECT(); /* mem has to be in a used state */ if (!mem->used) { - 8036372: 68fb ldr r3, [r7, #12] - 8036374: 791b ldrb r3, [r3, #4] - 8036376: 2b00 cmp r3, #0 - 8036378: d107 bne.n 803638a + 80363a2: 68fb ldr r3, [r7, #12] + 80363a4: 791b ldrb r3, [r3, #4] + 80363a6: 2b00 cmp r3, #0 + 80363a8: d107 bne.n 80363ba LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: double free"); - 803637a: 4b14 ldr r3, [pc, #80] ; (80363cc ) - 803637c: f44f 7223 mov.w r2, #652 ; 0x28c - 8036380: 4918 ldr r1, [pc, #96] ; (80363e4 ) - 8036382: 4814 ldr r0, [pc, #80] ; (80363d4 ) - 8036384: f00a fbac bl 8040ae0 + 80363aa: 4b14 ldr r3, [pc, #80] ; (80363fc ) + 80363ac: f44f 7223 mov.w r2, #652 ; 0x28c + 80363b0: 4918 ldr r1, [pc, #96] ; (8036414 ) + 80363b2: 4814 ldr r0, [pc, #80] ; (8036404 ) + 80363b4: f00a fbac bl 8040b10 LWIP_MEM_FREE_UNPROTECT(); LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: double free?\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return; - 8036388: e01d b.n 80363c6 + 80363b8: e01d b.n 80363f6 } if (!mem_link_valid(mem)) { - 803638a: 68f8 ldr r0, [r7, #12] - 803638c: f7ff ff8a bl 80362a4 - 8036390: 4603 mov r3, r0 - 8036392: 2b00 cmp r3, #0 - 8036394: d107 bne.n 80363a6 + 80363ba: 68f8 ldr r0, [r7, #12] + 80363bc: f7ff ff8a bl 80362d4 + 80363c0: 4603 mov r3, r0 + 80363c2: 2b00 cmp r3, #0 + 80363c4: d107 bne.n 80363d6 LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: non-linked: double free"); - 8036396: 4b0d ldr r3, [pc, #52] ; (80363cc ) - 8036398: f240 2295 movw r2, #661 ; 0x295 - 803639c: 4912 ldr r1, [pc, #72] ; (80363e8 ) - 803639e: 480d ldr r0, [pc, #52] ; (80363d4 ) - 80363a0: f00a fb9e bl 8040ae0 + 80363c6: 4b0d ldr r3, [pc, #52] ; (80363fc ) + 80363c8: f240 2295 movw r2, #661 ; 0x295 + 80363cc: 4912 ldr r1, [pc, #72] ; (8036418 ) + 80363ce: 480d ldr r0, [pc, #52] ; (8036404 ) + 80363d0: f00a fb9e bl 8040b10 LWIP_MEM_FREE_UNPROTECT(); LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: non-linked: double free?\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return; - 80363a4: e00f b.n 80363c6 + 80363d4: e00f b.n 80363f6 } /* mem is now unused. */ mem->used = 0; - 80363a6: 68fb ldr r3, [r7, #12] - 80363a8: 2200 movs r2, #0 - 80363aa: 711a strb r2, [r3, #4] + 80363d6: 68fb ldr r3, [r7, #12] + 80363d8: 2200 movs r2, #0 + 80363da: 711a strb r2, [r3, #4] if (mem < lfree) { - 80363ac: 4b0f ldr r3, [pc, #60] ; (80363ec ) - 80363ae: 681b ldr r3, [r3, #0] - 80363b0: 68fa ldr r2, [r7, #12] - 80363b2: 429a cmp r2, r3 - 80363b4: d202 bcs.n 80363bc + 80363dc: 4b0f ldr r3, [pc, #60] ; (803641c ) + 80363de: 681b ldr r3, [r3, #0] + 80363e0: 68fa ldr r2, [r7, #12] + 80363e2: 429a cmp r2, r3 + 80363e4: d202 bcs.n 80363ec /* the newly freed struct is now the lowest */ lfree = mem; - 80363b6: 4a0d ldr r2, [pc, #52] ; (80363ec ) - 80363b8: 68fb ldr r3, [r7, #12] - 80363ba: 6013 str r3, [r2, #0] + 80363e6: 4a0d ldr r2, [pc, #52] ; (803641c ) + 80363e8: 68fb ldr r3, [r7, #12] + 80363ea: 6013 str r3, [r2, #0] } MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram))); /* finally, see if prev or next are free also */ plug_holes(mem); - 80363bc: 68f8 ldr r0, [r7, #12] - 80363be: f7ff fe97 bl 80360f0 - 80363c2: e000 b.n 80363c6 + 80363ec: 68f8 ldr r0, [r7, #12] + 80363ee: f7ff fe97 bl 8036120 + 80363f2: e000 b.n 80363f6 return; - 80363c4: bf00 nop + 80363f4: bf00 nop MEM_SANITY(); #if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT mem_free_count = 1; #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ LWIP_MEM_FREE_UNPROTECT(); } - 80363c6: 3710 adds r7, #16 - 80363c8: 46bd mov sp, r7 - 80363ca: bd80 pop {r7, pc} - 80363cc: 080422f0 .word 0x080422f0 - 80363d0: 080423c4 .word 0x080423c4 - 80363d4: 08042338 .word 0x08042338 - 80363d8: 2400b9d4 .word 0x2400b9d4 - 80363dc: 2400b9d8 .word 0x2400b9d8 - 80363e0: 080423e8 .word 0x080423e8 - 80363e4: 08042404 .word 0x08042404 - 80363e8: 0804242c .word 0x0804242c - 80363ec: 2400b9dc .word 0x2400b9dc - -080363f0 : + 80363f6: 3710 adds r7, #16 + 80363f8: 46bd mov sp, r7 + 80363fa: bd80 pop {r7, pc} + 80363fc: 08042320 .word 0x08042320 + 8036400: 080423f4 .word 0x080423f4 + 8036404: 08042368 .word 0x08042368 + 8036408: 2400b9d4 .word 0x2400b9d4 + 803640c: 2400b9d8 .word 0x2400b9d8 + 8036410: 08042418 .word 0x08042418 + 8036414: 08042434 .word 0x08042434 + 8036418: 0804245c .word 0x0804245c + 803641c: 2400b9dc .word 0x2400b9dc + +08036420 : * or NULL if newsize is > old size, in which case rmem is NOT touched * or freed! */ void * mem_trim(void *rmem, mem_size_t new_size) { - 80363f0: b580 push {r7, lr} - 80363f2: b088 sub sp, #32 - 80363f4: af00 add r7, sp, #0 - 80363f6: 6078 str r0, [r7, #4] - 80363f8: 460b mov r3, r1 - 80363fa: 807b strh r3, [r7, #2] + 8036420: b580 push {r7, lr} + 8036422: b088 sub sp, #32 + 8036424: af00 add r7, sp, #0 + 8036426: 6078 str r0, [r7, #4] + 8036428: 460b mov r3, r1 + 803642a: 807b strh r3, [r7, #2] /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */ LWIP_MEM_FREE_DECL_PROTECT(); /* Expand the size of the allocated memory region so that we can adjust for alignment. */ newsize = (mem_size_t)LWIP_MEM_ALIGN_SIZE(new_size); - 80363fc: 887b ldrh r3, [r7, #2] - 80363fe: 3303 adds r3, #3 - 8036400: b29b uxth r3, r3 - 8036402: f023 0303 bic.w r3, r3, #3 - 8036406: 83fb strh r3, [r7, #30] + 803642c: 887b ldrh r3, [r7, #2] + 803642e: 3303 adds r3, #3 + 8036430: b29b uxth r3, r3 + 8036432: f023 0303 bic.w r3, r3, #3 + 8036436: 83fb strh r3, [r7, #30] if (newsize < MIN_SIZE_ALIGNED) { - 8036408: 8bfb ldrh r3, [r7, #30] - 803640a: 2b0b cmp r3, #11 - 803640c: d801 bhi.n 8036412 + 8036438: 8bfb ldrh r3, [r7, #30] + 803643a: 2b0b cmp r3, #11 + 803643c: d801 bhi.n 8036442 /* every data block must be at least MIN_SIZE_ALIGNED long */ newsize = MIN_SIZE_ALIGNED; - 803640e: 230c movs r3, #12 - 8036410: 83fb strh r3, [r7, #30] + 803643e: 230c movs r3, #12 + 8036440: 83fb strh r3, [r7, #30] } #if MEM_OVERFLOW_CHECK newsize += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED; #endif if ((newsize > MEM_SIZE_ALIGNED) || (newsize < new_size)) { - 8036412: 8bfb ldrh r3, [r7, #30] - 8036414: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036418: d803 bhi.n 8036422 - 803641a: 8bfa ldrh r2, [r7, #30] - 803641c: 887b ldrh r3, [r7, #2] - 803641e: 429a cmp r2, r3 - 8036420: d201 bcs.n 8036426 + 8036442: 8bfb ldrh r3, [r7, #30] + 8036444: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036448: d803 bhi.n 8036452 + 803644a: 8bfa ldrh r2, [r7, #30] + 803644c: 887b ldrh r3, [r7, #2] + 803644e: 429a cmp r2, r3 + 8036450: d201 bcs.n 8036456 return NULL; - 8036422: 2300 movs r3, #0 - 8036424: e0cc b.n 80365c0 + 8036452: 2300 movs r3, #0 + 8036454: e0cc b.n 80365f0 } LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram && - 8036426: 4b68 ldr r3, [pc, #416] ; (80365c8 ) - 8036428: 681b ldr r3, [r3, #0] - 803642a: 687a ldr r2, [r7, #4] - 803642c: 429a cmp r2, r3 - 803642e: d304 bcc.n 803643a - 8036430: 4b66 ldr r3, [pc, #408] ; (80365cc ) - 8036432: 681b ldr r3, [r3, #0] - 8036434: 687a ldr r2, [r7, #4] - 8036436: 429a cmp r2, r3 - 8036438: d306 bcc.n 8036448 - 803643a: 4b65 ldr r3, [pc, #404] ; (80365d0 ) - 803643c: f240 22d1 movw r2, #721 ; 0x2d1 - 8036440: 4964 ldr r1, [pc, #400] ; (80365d4 ) - 8036442: 4865 ldr r0, [pc, #404] ; (80365d8 ) - 8036444: f00a fb4c bl 8040ae0 + 8036456: 4b68 ldr r3, [pc, #416] ; (80365f8 ) + 8036458: 681b ldr r3, [r3, #0] + 803645a: 687a ldr r2, [r7, #4] + 803645c: 429a cmp r2, r3 + 803645e: d304 bcc.n 803646a + 8036460: 4b66 ldr r3, [pc, #408] ; (80365fc ) + 8036462: 681b ldr r3, [r3, #0] + 8036464: 687a ldr r2, [r7, #4] + 8036466: 429a cmp r2, r3 + 8036468: d306 bcc.n 8036478 + 803646a: 4b65 ldr r3, [pc, #404] ; (8036600 ) + 803646c: f240 22d1 movw r2, #721 ; 0x2d1 + 8036470: 4964 ldr r1, [pc, #400] ; (8036604 ) + 8036472: 4865 ldr r0, [pc, #404] ; (8036608 ) + 8036474: f00a fb4c bl 8040b10 (u8_t *)rmem < (u8_t *)ram_end); if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { - 8036448: 4b5f ldr r3, [pc, #380] ; (80365c8 ) - 803644a: 681b ldr r3, [r3, #0] - 803644c: 687a ldr r2, [r7, #4] - 803644e: 429a cmp r2, r3 - 8036450: d304 bcc.n 803645c - 8036452: 4b5e ldr r3, [pc, #376] ; (80365cc ) - 8036454: 681b ldr r3, [r3, #0] - 8036456: 687a ldr r2, [r7, #4] - 8036458: 429a cmp r2, r3 - 803645a: d301 bcc.n 8036460 + 8036478: 4b5f ldr r3, [pc, #380] ; (80365f8 ) + 803647a: 681b ldr r3, [r3, #0] + 803647c: 687a ldr r2, [r7, #4] + 803647e: 429a cmp r2, r3 + 8036480: d304 bcc.n 803648c + 8036482: 4b5e ldr r3, [pc, #376] ; (80365fc ) + 8036484: 681b ldr r3, [r3, #0] + 8036486: 687a ldr r2, [r7, #4] + 8036488: 429a cmp r2, r3 + 803648a: d301 bcc.n 8036490 LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return rmem; - 803645c: 687b ldr r3, [r7, #4] - 803645e: e0af b.n 80365c0 + 803648c: 687b ldr r3, [r7, #4] + 803648e: e0af b.n 80365f0 } /* Get the corresponding struct mem ... */ /* cast through void* to get rid of alignment warnings */ mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET)); - 8036460: 687b ldr r3, [r7, #4] - 8036462: 3b08 subs r3, #8 - 8036464: 61bb str r3, [r7, #24] + 8036490: 687b ldr r3, [r7, #4] + 8036492: 3b08 subs r3, #8 + 8036494: 61bb str r3, [r7, #24] #if MEM_OVERFLOW_CHECK mem_overflow_check_element(mem); #endif /* ... and its offset pointer */ ptr = mem_to_ptr(mem); - 8036466: 69b8 ldr r0, [r7, #24] - 8036468: f7ff fe30 bl 80360cc - 803646c: 4603 mov r3, r0 - 803646e: 82fb strh r3, [r7, #22] + 8036496: 69b8 ldr r0, [r7, #24] + 8036498: f7ff fe30 bl 80360fc + 803649c: 4603 mov r3, r0 + 803649e: 82fb strh r3, [r7, #22] size = (mem_size_t)((mem_size_t)(mem->next - ptr) - (SIZEOF_STRUCT_MEM + MEM_SANITY_OVERHEAD)); - 8036470: 69bb ldr r3, [r7, #24] - 8036472: 881a ldrh r2, [r3, #0] - 8036474: 8afb ldrh r3, [r7, #22] - 8036476: 1ad3 subs r3, r2, r3 - 8036478: b29b uxth r3, r3 - 803647a: 3b08 subs r3, #8 - 803647c: 82bb strh r3, [r7, #20] + 80364a0: 69bb ldr r3, [r7, #24] + 80364a2: 881a ldrh r2, [r3, #0] + 80364a4: 8afb ldrh r3, [r7, #22] + 80364a6: 1ad3 subs r3, r2, r3 + 80364a8: b29b uxth r3, r3 + 80364aa: 3b08 subs r3, #8 + 80364ac: 82bb strh r3, [r7, #20] LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size); - 803647e: 8bfa ldrh r2, [r7, #30] - 8036480: 8abb ldrh r3, [r7, #20] - 8036482: 429a cmp r2, r3 - 8036484: d906 bls.n 8036494 - 8036486: 4b52 ldr r3, [pc, #328] ; (80365d0 ) - 8036488: f44f 7239 mov.w r2, #740 ; 0x2e4 - 803648c: 4953 ldr r1, [pc, #332] ; (80365dc ) - 803648e: 4852 ldr r0, [pc, #328] ; (80365d8 ) - 8036490: f00a fb26 bl 8040ae0 + 80364ae: 8bfa ldrh r2, [r7, #30] + 80364b0: 8abb ldrh r3, [r7, #20] + 80364b2: 429a cmp r2, r3 + 80364b4: d906 bls.n 80364c4 + 80364b6: 4b52 ldr r3, [pc, #328] ; (8036600 ) + 80364b8: f44f 7239 mov.w r2, #740 ; 0x2e4 + 80364bc: 4953 ldr r1, [pc, #332] ; (803660c ) + 80364be: 4852 ldr r0, [pc, #328] ; (8036608 ) + 80364c0: f00a fb26 bl 8040b10 if (newsize > size) { - 8036494: 8bfa ldrh r2, [r7, #30] - 8036496: 8abb ldrh r3, [r7, #20] - 8036498: 429a cmp r2, r3 - 803649a: d901 bls.n 80364a0 + 80364c4: 8bfa ldrh r2, [r7, #30] + 80364c6: 8abb ldrh r3, [r7, #20] + 80364c8: 429a cmp r2, r3 + 80364ca: d901 bls.n 80364d0 /* not supported */ return NULL; - 803649c: 2300 movs r3, #0 - 803649e: e08f b.n 80365c0 + 80364cc: 2300 movs r3, #0 + 80364ce: e08f b.n 80365f0 } if (newsize == size) { - 80364a0: 8bfa ldrh r2, [r7, #30] - 80364a2: 8abb ldrh r3, [r7, #20] - 80364a4: 429a cmp r2, r3 - 80364a6: d101 bne.n 80364ac + 80364d0: 8bfa ldrh r2, [r7, #30] + 80364d2: 8abb ldrh r3, [r7, #20] + 80364d4: 429a cmp r2, r3 + 80364d6: d101 bne.n 80364dc /* No change in size, simply return */ return rmem; - 80364a8: 687b ldr r3, [r7, #4] - 80364aa: e089 b.n 80365c0 + 80364d8: 687b ldr r3, [r7, #4] + 80364da: e089 b.n 80365f0 } /* protect the heap from concurrent access */ LWIP_MEM_FREE_PROTECT(); mem2 = ptr_to_mem(mem->next); - 80364ac: 69bb ldr r3, [r7, #24] - 80364ae: 881b ldrh r3, [r3, #0] - 80364b0: 4618 mov r0, r3 - 80364b2: f7ff fdf9 bl 80360a8 - 80364b6: 6138 str r0, [r7, #16] + 80364dc: 69bb ldr r3, [r7, #24] + 80364de: 881b ldrh r3, [r3, #0] + 80364e0: 4618 mov r0, r3 + 80364e2: f7ff fdf9 bl 80360d8 + 80364e6: 6138 str r0, [r7, #16] if (mem2->used == 0) { - 80364b8: 693b ldr r3, [r7, #16] - 80364ba: 791b ldrb r3, [r3, #4] - 80364bc: 2b00 cmp r3, #0 - 80364be: d13f bne.n 8036540 + 80364e8: 693b ldr r3, [r7, #16] + 80364ea: 791b ldrb r3, [r3, #4] + 80364ec: 2b00 cmp r3, #0 + 80364ee: d13f bne.n 8036570 /* The next struct is unused, we can simply move it at little */ mem_size_t next; LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED); - 80364c0: 69bb ldr r3, [r7, #24] - 80364c2: 881b ldrh r3, [r3, #0] - 80364c4: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80364c8: d106 bne.n 80364d8 - 80364ca: 4b41 ldr r3, [pc, #260] ; (80365d0 ) - 80364cc: f240 22f5 movw r2, #757 ; 0x2f5 - 80364d0: 4943 ldr r1, [pc, #268] ; (80365e0 ) - 80364d2: 4841 ldr r0, [pc, #260] ; (80365d8 ) - 80364d4: f00a fb04 bl 8040ae0 + 80364f0: 69bb ldr r3, [r7, #24] + 80364f2: 881b ldrh r3, [r3, #0] + 80364f4: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80364f8: d106 bne.n 8036508 + 80364fa: 4b41 ldr r3, [pc, #260] ; (8036600 ) + 80364fc: f240 22f5 movw r2, #757 ; 0x2f5 + 8036500: 4943 ldr r1, [pc, #268] ; (8036610 ) + 8036502: 4841 ldr r0, [pc, #260] ; (8036608 ) + 8036504: f00a fb04 bl 8040b10 /* remember the old next pointer */ next = mem2->next; - 80364d8: 693b ldr r3, [r7, #16] - 80364da: 881b ldrh r3, [r3, #0] - 80364dc: 81bb strh r3, [r7, #12] + 8036508: 693b ldr r3, [r7, #16] + 803650a: 881b ldrh r3, [r3, #0] + 803650c: 81bb strh r3, [r7, #12] /* create new struct mem which is moved directly after the shrinked mem */ ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize); - 80364de: 8afa ldrh r2, [r7, #22] - 80364e0: 8bfb ldrh r3, [r7, #30] - 80364e2: 4413 add r3, r2 - 80364e4: b29b uxth r3, r3 - 80364e6: 3308 adds r3, #8 - 80364e8: 81fb strh r3, [r7, #14] + 803650e: 8afa ldrh r2, [r7, #22] + 8036510: 8bfb ldrh r3, [r7, #30] + 8036512: 4413 add r3, r2 + 8036514: b29b uxth r3, r3 + 8036516: 3308 adds r3, #8 + 8036518: 81fb strh r3, [r7, #14] if (lfree == mem2) { - 80364ea: 4b3e ldr r3, [pc, #248] ; (80365e4 ) - 80364ec: 681b ldr r3, [r3, #0] - 80364ee: 693a ldr r2, [r7, #16] - 80364f0: 429a cmp r2, r3 - 80364f2: d106 bne.n 8036502 + 803651a: 4b3e ldr r3, [pc, #248] ; (8036614 ) + 803651c: 681b ldr r3, [r3, #0] + 803651e: 693a ldr r2, [r7, #16] + 8036520: 429a cmp r2, r3 + 8036522: d106 bne.n 8036532 lfree = ptr_to_mem(ptr2); - 80364f4: 89fb ldrh r3, [r7, #14] - 80364f6: 4618 mov r0, r3 - 80364f8: f7ff fdd6 bl 80360a8 - 80364fc: 4603 mov r3, r0 - 80364fe: 4a39 ldr r2, [pc, #228] ; (80365e4 ) - 8036500: 6013 str r3, [r2, #0] + 8036524: 89fb ldrh r3, [r7, #14] + 8036526: 4618 mov r0, r3 + 8036528: f7ff fdd6 bl 80360d8 + 803652c: 4603 mov r3, r0 + 803652e: 4a39 ldr r2, [pc, #228] ; (8036614 ) + 8036530: 6013 str r3, [r2, #0] } mem2 = ptr_to_mem(ptr2); - 8036502: 89fb ldrh r3, [r7, #14] - 8036504: 4618 mov r0, r3 - 8036506: f7ff fdcf bl 80360a8 - 803650a: 6138 str r0, [r7, #16] + 8036532: 89fb ldrh r3, [r7, #14] + 8036534: 4618 mov r0, r3 + 8036536: f7ff fdcf bl 80360d8 + 803653a: 6138 str r0, [r7, #16] mem2->used = 0; - 803650c: 693b ldr r3, [r7, #16] - 803650e: 2200 movs r2, #0 - 8036510: 711a strb r2, [r3, #4] + 803653c: 693b ldr r3, [r7, #16] + 803653e: 2200 movs r2, #0 + 8036540: 711a strb r2, [r3, #4] /* restore the next pointer */ mem2->next = next; - 8036512: 693b ldr r3, [r7, #16] - 8036514: 89ba ldrh r2, [r7, #12] - 8036516: 801a strh r2, [r3, #0] + 8036542: 693b ldr r3, [r7, #16] + 8036544: 89ba ldrh r2, [r7, #12] + 8036546: 801a strh r2, [r3, #0] /* link it back to mem */ mem2->prev = ptr; - 8036518: 693b ldr r3, [r7, #16] - 803651a: 8afa ldrh r2, [r7, #22] - 803651c: 805a strh r2, [r3, #2] + 8036548: 693b ldr r3, [r7, #16] + 803654a: 8afa ldrh r2, [r7, #22] + 803654c: 805a strh r2, [r3, #2] /* link mem to it */ mem->next = ptr2; - 803651e: 69bb ldr r3, [r7, #24] - 8036520: 89fa ldrh r2, [r7, #14] - 8036522: 801a strh r2, [r3, #0] + 803654e: 69bb ldr r3, [r7, #24] + 8036550: 89fa ldrh r2, [r7, #14] + 8036552: 801a strh r2, [r3, #0] /* last thing to restore linked list: as we have moved mem2, * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not * the end of the heap */ if (mem2->next != MEM_SIZE_ALIGNED) { - 8036524: 693b ldr r3, [r7, #16] - 8036526: 881b ldrh r3, [r3, #0] - 8036528: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 803652c: d047 beq.n 80365be + 8036554: 693b ldr r3, [r7, #16] + 8036556: 881b ldrh r3, [r3, #0] + 8036558: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 803655c: d047 beq.n 80365ee ptr_to_mem(mem2->next)->prev = ptr2; - 803652e: 693b ldr r3, [r7, #16] - 8036530: 881b ldrh r3, [r3, #0] - 8036532: 4618 mov r0, r3 - 8036534: f7ff fdb8 bl 80360a8 - 8036538: 4602 mov r2, r0 - 803653a: 89fb ldrh r3, [r7, #14] - 803653c: 8053 strh r3, [r2, #2] - 803653e: e03e b.n 80365be + 803655e: 693b ldr r3, [r7, #16] + 8036560: 881b ldrh r3, [r3, #0] + 8036562: 4618 mov r0, r3 + 8036564: f7ff fdb8 bl 80360d8 + 8036568: 4602 mov r2, r0 + 803656a: 89fb ldrh r3, [r7, #14] + 803656c: 8053 strh r3, [r2, #2] + 803656e: e03e b.n 80365ee } MEM_STATS_DEC_USED(used, (size - newsize)); /* no need to plug holes, we've already done that */ } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) { - 8036540: 8bfb ldrh r3, [r7, #30] - 8036542: f103 0214 add.w r2, r3, #20 - 8036546: 8abb ldrh r3, [r7, #20] - 8036548: 429a cmp r2, r3 - 803654a: d838 bhi.n 80365be + 8036570: 8bfb ldrh r3, [r7, #30] + 8036572: f103 0214 add.w r2, r3, #20 + 8036576: 8abb ldrh r3, [r7, #20] + 8036578: 429a cmp r2, r3 + 803657a: d838 bhi.n 80365ee * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED'). * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty * region that couldn't hold data, but when mem->next gets freed, * the 2 regions would be combined, resulting in more free memory */ ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize); - 803654c: 8afa ldrh r2, [r7, #22] - 803654e: 8bfb ldrh r3, [r7, #30] - 8036550: 4413 add r3, r2 - 8036552: b29b uxth r3, r3 - 8036554: 3308 adds r3, #8 - 8036556: 81fb strh r3, [r7, #14] + 803657c: 8afa ldrh r2, [r7, #22] + 803657e: 8bfb ldrh r3, [r7, #30] + 8036580: 4413 add r3, r2 + 8036582: b29b uxth r3, r3 + 8036584: 3308 adds r3, #8 + 8036586: 81fb strh r3, [r7, #14] LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED); - 8036558: 69bb ldr r3, [r7, #24] - 803655a: 881b ldrh r3, [r3, #0] - 803655c: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036560: d106 bne.n 8036570 - 8036562: 4b1b ldr r3, [pc, #108] ; (80365d0 ) - 8036564: f240 3216 movw r2, #790 ; 0x316 - 8036568: 491d ldr r1, [pc, #116] ; (80365e0 ) - 803656a: 481b ldr r0, [pc, #108] ; (80365d8 ) - 803656c: f00a fab8 bl 8040ae0 + 8036588: 69bb ldr r3, [r7, #24] + 803658a: 881b ldrh r3, [r3, #0] + 803658c: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036590: d106 bne.n 80365a0 + 8036592: 4b1b ldr r3, [pc, #108] ; (8036600 ) + 8036594: f240 3216 movw r2, #790 ; 0x316 + 8036598: 491d ldr r1, [pc, #116] ; (8036610 ) + 803659a: 481b ldr r0, [pc, #108] ; (8036608 ) + 803659c: f00a fab8 bl 8040b10 mem2 = ptr_to_mem(ptr2); - 8036570: 89fb ldrh r3, [r7, #14] - 8036572: 4618 mov r0, r3 - 8036574: f7ff fd98 bl 80360a8 - 8036578: 6138 str r0, [r7, #16] + 80365a0: 89fb ldrh r3, [r7, #14] + 80365a2: 4618 mov r0, r3 + 80365a4: f7ff fd98 bl 80360d8 + 80365a8: 6138 str r0, [r7, #16] if (mem2 < lfree) { - 803657a: 4b1a ldr r3, [pc, #104] ; (80365e4 ) - 803657c: 681b ldr r3, [r3, #0] - 803657e: 693a ldr r2, [r7, #16] - 8036580: 429a cmp r2, r3 - 8036582: d202 bcs.n 803658a + 80365aa: 4b1a ldr r3, [pc, #104] ; (8036614 ) + 80365ac: 681b ldr r3, [r3, #0] + 80365ae: 693a ldr r2, [r7, #16] + 80365b0: 429a cmp r2, r3 + 80365b2: d202 bcs.n 80365ba lfree = mem2; - 8036584: 4a17 ldr r2, [pc, #92] ; (80365e4 ) - 8036586: 693b ldr r3, [r7, #16] - 8036588: 6013 str r3, [r2, #0] + 80365b4: 4a17 ldr r2, [pc, #92] ; (8036614 ) + 80365b6: 693b ldr r3, [r7, #16] + 80365b8: 6013 str r3, [r2, #0] } mem2->used = 0; - 803658a: 693b ldr r3, [r7, #16] - 803658c: 2200 movs r2, #0 - 803658e: 711a strb r2, [r3, #4] + 80365ba: 693b ldr r3, [r7, #16] + 80365bc: 2200 movs r2, #0 + 80365be: 711a strb r2, [r3, #4] mem2->next = mem->next; - 8036590: 69bb ldr r3, [r7, #24] - 8036592: 881a ldrh r2, [r3, #0] - 8036594: 693b ldr r3, [r7, #16] - 8036596: 801a strh r2, [r3, #0] + 80365c0: 69bb ldr r3, [r7, #24] + 80365c2: 881a ldrh r2, [r3, #0] + 80365c4: 693b ldr r3, [r7, #16] + 80365c6: 801a strh r2, [r3, #0] mem2->prev = ptr; - 8036598: 693b ldr r3, [r7, #16] - 803659a: 8afa ldrh r2, [r7, #22] - 803659c: 805a strh r2, [r3, #2] + 80365c8: 693b ldr r3, [r7, #16] + 80365ca: 8afa ldrh r2, [r7, #22] + 80365cc: 805a strh r2, [r3, #2] mem->next = ptr2; - 803659e: 69bb ldr r3, [r7, #24] - 80365a0: 89fa ldrh r2, [r7, #14] - 80365a2: 801a strh r2, [r3, #0] + 80365ce: 69bb ldr r3, [r7, #24] + 80365d0: 89fa ldrh r2, [r7, #14] + 80365d2: 801a strh r2, [r3, #0] if (mem2->next != MEM_SIZE_ALIGNED) { - 80365a4: 693b ldr r3, [r7, #16] - 80365a6: 881b ldrh r3, [r3, #0] - 80365a8: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80365ac: d007 beq.n 80365be + 80365d4: 693b ldr r3, [r7, #16] + 80365d6: 881b ldrh r3, [r3, #0] + 80365d8: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80365dc: d007 beq.n 80365ee ptr_to_mem(mem2->next)->prev = ptr2; - 80365ae: 693b ldr r3, [r7, #16] - 80365b0: 881b ldrh r3, [r3, #0] - 80365b2: 4618 mov r0, r3 - 80365b4: f7ff fd78 bl 80360a8 - 80365b8: 4602 mov r2, r0 - 80365ba: 89fb ldrh r3, [r7, #14] - 80365bc: 8053 strh r3, [r2, #2] + 80365de: 693b ldr r3, [r7, #16] + 80365e0: 881b ldrh r3, [r3, #0] + 80365e2: 4618 mov r0, r3 + 80365e4: f7ff fd78 bl 80360d8 + 80365e8: 4602 mov r2, r0 + 80365ea: 89fb ldrh r3, [r7, #14] + 80365ec: 8053 strh r3, [r2, #2] MEM_SANITY(); #if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT mem_free_count = 1; #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ LWIP_MEM_FREE_UNPROTECT(); return rmem; - 80365be: 687b ldr r3, [r7, #4] -} - 80365c0: 4618 mov r0, r3 - 80365c2: 3720 adds r7, #32 - 80365c4: 46bd mov sp, r7 - 80365c6: bd80 pop {r7, pc} - 80365c8: 2400b9d4 .word 0x2400b9d4 - 80365cc: 2400b9d8 .word 0x2400b9d8 - 80365d0: 080422f0 .word 0x080422f0 - 80365d4: 08042460 .word 0x08042460 - 80365d8: 08042338 .word 0x08042338 - 80365dc: 08042478 .word 0x08042478 - 80365e0: 08042498 .word 0x08042498 - 80365e4: 2400b9dc .word 0x2400b9dc - -080365e8 : + 80365ee: 687b ldr r3, [r7, #4] +} + 80365f0: 4618 mov r0, r3 + 80365f2: 3720 adds r7, #32 + 80365f4: 46bd mov sp, r7 + 80365f6: bd80 pop {r7, pc} + 80365f8: 2400b9d4 .word 0x2400b9d4 + 80365fc: 2400b9d8 .word 0x2400b9d8 + 8036600: 08042320 .word 0x08042320 + 8036604: 08042490 .word 0x08042490 + 8036608: 08042368 .word 0x08042368 + 803660c: 080424a8 .word 0x080424a8 + 8036610: 080424c8 .word 0x080424c8 + 8036614: 2400b9dc .word 0x2400b9dc + +08036618 : * * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT). */ void * mem_malloc(mem_size_t size_in) { - 80365e8: b580 push {r7, lr} - 80365ea: b088 sub sp, #32 - 80365ec: af00 add r7, sp, #0 - 80365ee: 4603 mov r3, r0 - 80365f0: 80fb strh r3, [r7, #6] + 8036618: b580 push {r7, lr} + 803661a: b088 sub sp, #32 + 803661c: af00 add r7, sp, #0 + 803661e: 4603 mov r3, r0 + 8036620: 80fb strh r3, [r7, #6] #if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT u8_t local_mem_free_count = 0; #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ LWIP_MEM_ALLOC_DECL_PROTECT(); if (size_in == 0) { - 80365f2: 88fb ldrh r3, [r7, #6] - 80365f4: 2b00 cmp r3, #0 - 80365f6: d101 bne.n 80365fc + 8036622: 88fb ldrh r3, [r7, #6] + 8036624: 2b00 cmp r3, #0 + 8036626: d101 bne.n 803662c return NULL; - 80365f8: 2300 movs r3, #0 - 80365fa: e0d9 b.n 80367b0 + 8036628: 2300 movs r3, #0 + 803662a: e0d9 b.n 80367e0 } /* Expand the size of the allocated memory region so that we can adjust for alignment. */ size = (mem_size_t)LWIP_MEM_ALIGN_SIZE(size_in); - 80365fc: 88fb ldrh r3, [r7, #6] - 80365fe: 3303 adds r3, #3 - 8036600: b29b uxth r3, r3 - 8036602: f023 0303 bic.w r3, r3, #3 - 8036606: 83bb strh r3, [r7, #28] + 803662c: 88fb ldrh r3, [r7, #6] + 803662e: 3303 adds r3, #3 + 8036630: b29b uxth r3, r3 + 8036632: f023 0303 bic.w r3, r3, #3 + 8036636: 83bb strh r3, [r7, #28] if (size < MIN_SIZE_ALIGNED) { - 8036608: 8bbb ldrh r3, [r7, #28] - 803660a: 2b0b cmp r3, #11 - 803660c: d801 bhi.n 8036612 + 8036638: 8bbb ldrh r3, [r7, #28] + 803663a: 2b0b cmp r3, #11 + 803663c: d801 bhi.n 8036642 /* every data block must be at least MIN_SIZE_ALIGNED long */ size = MIN_SIZE_ALIGNED; - 803660e: 230c movs r3, #12 - 8036610: 83bb strh r3, [r7, #28] + 803663e: 230c movs r3, #12 + 8036640: 83bb strh r3, [r7, #28] } #if MEM_OVERFLOW_CHECK size += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED; #endif if ((size > MEM_SIZE_ALIGNED) || (size < size_in)) { - 8036612: 8bbb ldrh r3, [r7, #28] - 8036614: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036618: d803 bhi.n 8036622 - 803661a: 8bba ldrh r2, [r7, #28] - 803661c: 88fb ldrh r3, [r7, #6] - 803661e: 429a cmp r2, r3 - 8036620: d201 bcs.n 8036626 + 8036642: 8bbb ldrh r3, [r7, #28] + 8036644: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036648: d803 bhi.n 8036652 + 803664a: 8bba ldrh r2, [r7, #28] + 803664c: 88fb ldrh r3, [r7, #6] + 803664e: 429a cmp r2, r3 + 8036650: d201 bcs.n 8036656 return NULL; - 8036622: 2300 movs r3, #0 - 8036624: e0c4 b.n 80367b0 + 8036652: 2300 movs r3, #0 + 8036654: e0c4 b.n 80367e0 #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ /* Scan through the heap searching for a free block that is big enough, * beginning with the lowest free block. */ for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size; - 8036626: 4b64 ldr r3, [pc, #400] ; (80367b8 ) - 8036628: 681b ldr r3, [r3, #0] - 803662a: 4618 mov r0, r3 - 803662c: f7ff fd4e bl 80360cc - 8036630: 4603 mov r3, r0 - 8036632: 83fb strh r3, [r7, #30] - 8036634: e0b4 b.n 80367a0 + 8036656: 4b64 ldr r3, [pc, #400] ; (80367e8 ) + 8036658: 681b ldr r3, [r3, #0] + 803665a: 4618 mov r0, r3 + 803665c: f7ff fd4e bl 80360fc + 8036660: 4603 mov r3, r0 + 8036662: 83fb strh r3, [r7, #30] + 8036664: e0b4 b.n 80367d0 ptr = ptr_to_mem(ptr)->next) { mem = ptr_to_mem(ptr); - 8036636: 8bfb ldrh r3, [r7, #30] - 8036638: 4618 mov r0, r3 - 803663a: f7ff fd35 bl 80360a8 - 803663e: 6178 str r0, [r7, #20] + 8036666: 8bfb ldrh r3, [r7, #30] + 8036668: 4618 mov r0, r3 + 803666a: f7ff fd35 bl 80360d8 + 803666e: 6178 str r0, [r7, #20] local_mem_free_count = 1; break; } #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ if ((!mem->used) && - 8036640: 697b ldr r3, [r7, #20] - 8036642: 791b ldrb r3, [r3, #4] - 8036644: 2b00 cmp r3, #0 - 8036646: f040 80a4 bne.w 8036792 + 8036670: 697b ldr r3, [r7, #20] + 8036672: 791b ldrb r3, [r3, #4] + 8036674: 2b00 cmp r3, #0 + 8036676: f040 80a4 bne.w 80367c2 (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) { - 803664a: 697b ldr r3, [r7, #20] - 803664c: 881b ldrh r3, [r3, #0] - 803664e: 461a mov r2, r3 - 8036650: 8bfb ldrh r3, [r7, #30] - 8036652: 1ad3 subs r3, r2, r3 - 8036654: f1a3 0208 sub.w r2, r3, #8 - 8036658: 8bbb ldrh r3, [r7, #28] + 803667a: 697b ldr r3, [r7, #20] + 803667c: 881b ldrh r3, [r3, #0] + 803667e: 461a mov r2, r3 + 8036680: 8bfb ldrh r3, [r7, #30] + 8036682: 1ad3 subs r3, r2, r3 + 8036684: f1a3 0208 sub.w r2, r3, #8 + 8036688: 8bbb ldrh r3, [r7, #28] if ((!mem->used) && - 803665a: 429a cmp r2, r3 - 803665c: f0c0 8099 bcc.w 8036792 + 803668a: 429a cmp r2, r3 + 803668c: f0c0 8099 bcc.w 80367c2 /* mem is not used and at least perfect fit is possible: * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */ if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) { - 8036660: 697b ldr r3, [r7, #20] - 8036662: 881b ldrh r3, [r3, #0] - 8036664: 461a mov r2, r3 - 8036666: 8bfb ldrh r3, [r7, #30] - 8036668: 1ad3 subs r3, r2, r3 - 803666a: f1a3 0208 sub.w r2, r3, #8 - 803666e: 8bbb ldrh r3, [r7, #28] - 8036670: 3314 adds r3, #20 - 8036672: 429a cmp r2, r3 - 8036674: d333 bcc.n 80366de + 8036690: 697b ldr r3, [r7, #20] + 8036692: 881b ldrh r3, [r3, #0] + 8036694: 461a mov r2, r3 + 8036696: 8bfb ldrh r3, [r7, #30] + 8036698: 1ad3 subs r3, r2, r3 + 803669a: f1a3 0208 sub.w r2, r3, #8 + 803669e: 8bbb ldrh r3, [r7, #28] + 80366a0: 3314 adds r3, #20 + 80366a2: 429a cmp r2, r3 + 80366a4: d333 bcc.n 803670e * struct mem would fit in but no data between mem2 and mem2->next * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty * region that couldn't hold data, but when mem->next gets freed, * the 2 regions would be combined, resulting in more free memory */ ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + size); - 8036676: 8bfa ldrh r2, [r7, #30] - 8036678: 8bbb ldrh r3, [r7, #28] - 803667a: 4413 add r3, r2 - 803667c: b29b uxth r3, r3 - 803667e: 3308 adds r3, #8 - 8036680: 827b strh r3, [r7, #18] + 80366a6: 8bfa ldrh r2, [r7, #30] + 80366a8: 8bbb ldrh r3, [r7, #28] + 80366aa: 4413 add r3, r2 + 80366ac: b29b uxth r3, r3 + 80366ae: 3308 adds r3, #8 + 80366b0: 827b strh r3, [r7, #18] LWIP_ASSERT("invalid next ptr",ptr2 != MEM_SIZE_ALIGNED); - 8036682: 8a7b ldrh r3, [r7, #18] - 8036684: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036688: d106 bne.n 8036698 - 803668a: 4b4c ldr r3, [pc, #304] ; (80367bc ) - 803668c: f240 3287 movw r2, #903 ; 0x387 - 8036690: 494b ldr r1, [pc, #300] ; (80367c0 ) - 8036692: 484c ldr r0, [pc, #304] ; (80367c4 ) - 8036694: f00a fa24 bl 8040ae0 + 80366b2: 8a7b ldrh r3, [r7, #18] + 80366b4: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80366b8: d106 bne.n 80366c8 + 80366ba: 4b4c ldr r3, [pc, #304] ; (80367ec ) + 80366bc: f240 3287 movw r2, #903 ; 0x387 + 80366c0: 494b ldr r1, [pc, #300] ; (80367f0 ) + 80366c2: 484c ldr r0, [pc, #304] ; (80367f4 ) + 80366c4: f00a fa24 bl 8040b10 /* create mem2 struct */ mem2 = ptr_to_mem(ptr2); - 8036698: 8a7b ldrh r3, [r7, #18] - 803669a: 4618 mov r0, r3 - 803669c: f7ff fd04 bl 80360a8 - 80366a0: 60f8 str r0, [r7, #12] + 80366c8: 8a7b ldrh r3, [r7, #18] + 80366ca: 4618 mov r0, r3 + 80366cc: f7ff fd04 bl 80360d8 + 80366d0: 60f8 str r0, [r7, #12] mem2->used = 0; - 80366a2: 68fb ldr r3, [r7, #12] - 80366a4: 2200 movs r2, #0 - 80366a6: 711a strb r2, [r3, #4] + 80366d2: 68fb ldr r3, [r7, #12] + 80366d4: 2200 movs r2, #0 + 80366d6: 711a strb r2, [r3, #4] mem2->next = mem->next; - 80366a8: 697b ldr r3, [r7, #20] - 80366aa: 881a ldrh r2, [r3, #0] - 80366ac: 68fb ldr r3, [r7, #12] - 80366ae: 801a strh r2, [r3, #0] + 80366d8: 697b ldr r3, [r7, #20] + 80366da: 881a ldrh r2, [r3, #0] + 80366dc: 68fb ldr r3, [r7, #12] + 80366de: 801a strh r2, [r3, #0] mem2->prev = ptr; - 80366b0: 68fb ldr r3, [r7, #12] - 80366b2: 8bfa ldrh r2, [r7, #30] - 80366b4: 805a strh r2, [r3, #2] + 80366e0: 68fb ldr r3, [r7, #12] + 80366e2: 8bfa ldrh r2, [r7, #30] + 80366e4: 805a strh r2, [r3, #2] /* and insert it between mem and mem->next */ mem->next = ptr2; - 80366b6: 697b ldr r3, [r7, #20] - 80366b8: 8a7a ldrh r2, [r7, #18] - 80366ba: 801a strh r2, [r3, #0] + 80366e6: 697b ldr r3, [r7, #20] + 80366e8: 8a7a ldrh r2, [r7, #18] + 80366ea: 801a strh r2, [r3, #0] mem->used = 1; - 80366bc: 697b ldr r3, [r7, #20] - 80366be: 2201 movs r2, #1 - 80366c0: 711a strb r2, [r3, #4] + 80366ec: 697b ldr r3, [r7, #20] + 80366ee: 2201 movs r2, #1 + 80366f0: 711a strb r2, [r3, #4] if (mem2->next != MEM_SIZE_ALIGNED) { - 80366c2: 68fb ldr r3, [r7, #12] - 80366c4: 881b ldrh r3, [r3, #0] - 80366c6: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80366ca: d00b beq.n 80366e4 + 80366f2: 68fb ldr r3, [r7, #12] + 80366f4: 881b ldrh r3, [r3, #0] + 80366f6: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80366fa: d00b beq.n 8036714 ptr_to_mem(mem2->next)->prev = ptr2; - 80366cc: 68fb ldr r3, [r7, #12] - 80366ce: 881b ldrh r3, [r3, #0] - 80366d0: 4618 mov r0, r3 - 80366d2: f7ff fce9 bl 80360a8 - 80366d6: 4602 mov r2, r0 - 80366d8: 8a7b ldrh r3, [r7, #18] - 80366da: 8053 strh r3, [r2, #2] - 80366dc: e002 b.n 80366e4 + 80366fc: 68fb ldr r3, [r7, #12] + 80366fe: 881b ldrh r3, [r3, #0] + 8036700: 4618 mov r0, r3 + 8036702: f7ff fce9 bl 80360d8 + 8036706: 4602 mov r2, r0 + 8036708: 8a7b ldrh r3, [r7, #18] + 803670a: 8053 strh r3, [r2, #2] + 803670c: e002 b.n 8036714 * take care of this). * -> near fit or exact fit: do not split, no mem2 creation * also can't move mem->next directly behind mem, since mem->next * will always be used at this point! */ mem->used = 1; - 80366de: 697b ldr r3, [r7, #20] - 80366e0: 2201 movs r2, #1 - 80366e2: 711a strb r2, [r3, #4] + 803670e: 697b ldr r3, [r7, #20] + 8036710: 2201 movs r2, #1 + 8036712: 711a strb r2, [r3, #4] MEM_STATS_INC_USED(used, mem->next - mem_to_ptr(mem)); } #if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT mem_malloc_adjust_lfree: #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ if (mem == lfree) { - 80366e4: 4b34 ldr r3, [pc, #208] ; (80367b8 ) - 80366e6: 681b ldr r3, [r3, #0] - 80366e8: 697a ldr r2, [r7, #20] - 80366ea: 429a cmp r2, r3 - 80366ec: d127 bne.n 803673e + 8036714: 4b34 ldr r3, [pc, #208] ; (80367e8 ) + 8036716: 681b ldr r3, [r3, #0] + 8036718: 697a ldr r2, [r7, #20] + 803671a: 429a cmp r2, r3 + 803671c: d127 bne.n 803676e struct mem *cur = lfree; - 80366ee: 4b32 ldr r3, [pc, #200] ; (80367b8 ) - 80366f0: 681b ldr r3, [r3, #0] - 80366f2: 61bb str r3, [r7, #24] + 803671e: 4b32 ldr r3, [pc, #200] ; (80367e8 ) + 8036720: 681b ldr r3, [r3, #0] + 8036722: 61bb str r3, [r7, #24] /* Find next free block after mem and update lowest free pointer */ while (cur->used && cur != ram_end) { - 80366f4: e005 b.n 8036702 + 8036724: e005 b.n 8036732 /* If mem_free or mem_trim have run, we have to restart since they could have altered our current struct mem or lfree. */ goto mem_malloc_adjust_lfree; } #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ cur = ptr_to_mem(cur->next); - 80366f6: 69bb ldr r3, [r7, #24] - 80366f8: 881b ldrh r3, [r3, #0] - 80366fa: 4618 mov r0, r3 - 80366fc: f7ff fcd4 bl 80360a8 - 8036700: 61b8 str r0, [r7, #24] + 8036726: 69bb ldr r3, [r7, #24] + 8036728: 881b ldrh r3, [r3, #0] + 803672a: 4618 mov r0, r3 + 803672c: f7ff fcd4 bl 80360d8 + 8036730: 61b8 str r0, [r7, #24] while (cur->used && cur != ram_end) { - 8036702: 69bb ldr r3, [r7, #24] - 8036704: 791b ldrb r3, [r3, #4] - 8036706: 2b00 cmp r3, #0 - 8036708: d004 beq.n 8036714 - 803670a: 4b2f ldr r3, [pc, #188] ; (80367c8 ) - 803670c: 681b ldr r3, [r3, #0] - 803670e: 69ba ldr r2, [r7, #24] - 8036710: 429a cmp r2, r3 - 8036712: d1f0 bne.n 80366f6 + 8036732: 69bb ldr r3, [r7, #24] + 8036734: 791b ldrb r3, [r3, #4] + 8036736: 2b00 cmp r3, #0 + 8036738: d004 beq.n 8036744 + 803673a: 4b2f ldr r3, [pc, #188] ; (80367f8 ) + 803673c: 681b ldr r3, [r3, #0] + 803673e: 69ba ldr r2, [r7, #24] + 8036740: 429a cmp r2, r3 + 8036742: d1f0 bne.n 8036726 } lfree = cur; - 8036714: 4a28 ldr r2, [pc, #160] ; (80367b8 ) - 8036716: 69bb ldr r3, [r7, #24] - 8036718: 6013 str r3, [r2, #0] + 8036744: 4a28 ldr r2, [pc, #160] ; (80367e8 ) + 8036746: 69bb ldr r3, [r7, #24] + 8036748: 6013 str r3, [r2, #0] LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used))); - 803671a: 4b27 ldr r3, [pc, #156] ; (80367b8 ) - 803671c: 681a ldr r2, [r3, #0] - 803671e: 4b2a ldr r3, [pc, #168] ; (80367c8 ) - 8036720: 681b ldr r3, [r3, #0] - 8036722: 429a cmp r2, r3 - 8036724: d00b beq.n 803673e - 8036726: 4b24 ldr r3, [pc, #144] ; (80367b8 ) - 8036728: 681b ldr r3, [r3, #0] - 803672a: 791b ldrb r3, [r3, #4] - 803672c: 2b00 cmp r3, #0 - 803672e: d006 beq.n 803673e - 8036730: 4b22 ldr r3, [pc, #136] ; (80367bc ) - 8036732: f240 32b5 movw r2, #949 ; 0x3b5 - 8036736: 4925 ldr r1, [pc, #148] ; (80367cc ) - 8036738: 4822 ldr r0, [pc, #136] ; (80367c4 ) - 803673a: f00a f9d1 bl 8040ae0 + 803674a: 4b27 ldr r3, [pc, #156] ; (80367e8 ) + 803674c: 681a ldr r2, [r3, #0] + 803674e: 4b2a ldr r3, [pc, #168] ; (80367f8 ) + 8036750: 681b ldr r3, [r3, #0] + 8036752: 429a cmp r2, r3 + 8036754: d00b beq.n 803676e + 8036756: 4b24 ldr r3, [pc, #144] ; (80367e8 ) + 8036758: 681b ldr r3, [r3, #0] + 803675a: 791b ldrb r3, [r3, #4] + 803675c: 2b00 cmp r3, #0 + 803675e: d006 beq.n 803676e + 8036760: 4b22 ldr r3, [pc, #136] ; (80367ec ) + 8036762: f240 32b5 movw r2, #949 ; 0x3b5 + 8036766: 4925 ldr r1, [pc, #148] ; (80367fc ) + 8036768: 4822 ldr r0, [pc, #136] ; (80367f4 ) + 803676a: f00a f9d1 bl 8040b10 } LWIP_MEM_ALLOC_UNPROTECT(); sys_mutex_unlock(&mem_mutex); LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.", - 803673e: 8bba ldrh r2, [r7, #28] - 8036740: 697b ldr r3, [r7, #20] - 8036742: 4413 add r3, r2 - 8036744: 3308 adds r3, #8 - 8036746: 4a20 ldr r2, [pc, #128] ; (80367c8 ) - 8036748: 6812 ldr r2, [r2, #0] - 803674a: 4293 cmp r3, r2 - 803674c: d906 bls.n 803675c - 803674e: 4b1b ldr r3, [pc, #108] ; (80367bc ) - 8036750: f240 32b9 movw r2, #953 ; 0x3b9 - 8036754: 491e ldr r1, [pc, #120] ; (80367d0 ) - 8036756: 481b ldr r0, [pc, #108] ; (80367c4 ) - 8036758: f00a f9c2 bl 8040ae0 + 803676e: 8bba ldrh r2, [r7, #28] + 8036770: 697b ldr r3, [r7, #20] + 8036772: 4413 add r3, r2 + 8036774: 3308 adds r3, #8 + 8036776: 4a20 ldr r2, [pc, #128] ; (80367f8 ) + 8036778: 6812 ldr r2, [r2, #0] + 803677a: 4293 cmp r3, r2 + 803677c: d906 bls.n 803678c + 803677e: 4b1b ldr r3, [pc, #108] ; (80367ec ) + 8036780: f240 32b9 movw r2, #953 ; 0x3b9 + 8036784: 491e ldr r1, [pc, #120] ; (8036800 ) + 8036786: 481b ldr r0, [pc, #108] ; (80367f4 ) + 8036788: f00a f9c2 bl 8040b10 (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end); LWIP_ASSERT("mem_malloc: allocated memory properly aligned.", - 803675c: 697b ldr r3, [r7, #20] - 803675e: f003 0303 and.w r3, r3, #3 - 8036762: 2b00 cmp r3, #0 - 8036764: d006 beq.n 8036774 - 8036766: 4b15 ldr r3, [pc, #84] ; (80367bc ) - 8036768: f240 32bb movw r2, #955 ; 0x3bb - 803676c: 4919 ldr r1, [pc, #100] ; (80367d4 ) - 803676e: 4815 ldr r0, [pc, #84] ; (80367c4 ) - 8036770: f00a f9b6 bl 8040ae0 + 803678c: 697b ldr r3, [r7, #20] + 803678e: f003 0303 and.w r3, r3, #3 + 8036792: 2b00 cmp r3, #0 + 8036794: d006 beq.n 80367a4 + 8036796: 4b15 ldr r3, [pc, #84] ; (80367ec ) + 8036798: f240 32bb movw r2, #955 ; 0x3bb + 803679c: 4919 ldr r1, [pc, #100] ; (8036804 ) + 803679e: 4815 ldr r0, [pc, #84] ; (80367f4 ) + 80367a0: f00a f9b6 bl 8040b10 ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0); LWIP_ASSERT("mem_malloc: sanity check alignment", - 8036774: 697b ldr r3, [r7, #20] - 8036776: f003 0303 and.w r3, r3, #3 - 803677a: 2b00 cmp r3, #0 - 803677c: d006 beq.n 803678c - 803677e: 4b0f ldr r3, [pc, #60] ; (80367bc ) - 8036780: f240 32bd movw r2, #957 ; 0x3bd - 8036784: 4914 ldr r1, [pc, #80] ; (80367d8 ) - 8036786: 480f ldr r0, [pc, #60] ; (80367c4 ) - 8036788: f00a f9aa bl 8040ae0 + 80367a4: 697b ldr r3, [r7, #20] + 80367a6: f003 0303 and.w r3, r3, #3 + 80367aa: 2b00 cmp r3, #0 + 80367ac: d006 beq.n 80367bc + 80367ae: 4b0f ldr r3, [pc, #60] ; (80367ec ) + 80367b0: f240 32bd movw r2, #957 ; 0x3bd + 80367b4: 4914 ldr r1, [pc, #80] ; (8036808 ) + 80367b6: 480f ldr r0, [pc, #60] ; (80367f4 ) + 80367b8: f00a f9aa bl 8040b10 #if MEM_OVERFLOW_CHECK mem_overflow_init_element(mem, size_in); #endif MEM_SANITY(); return (u8_t *)mem + SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET; - 803678c: 697b ldr r3, [r7, #20] - 803678e: 3308 adds r3, #8 - 8036790: e00e b.n 80367b0 + 80367bc: 697b ldr r3, [r7, #20] + 80367be: 3308 adds r3, #8 + 80367c0: e00e b.n 80367e0 ptr = ptr_to_mem(ptr)->next) { - 8036792: 8bfb ldrh r3, [r7, #30] - 8036794: 4618 mov r0, r3 - 8036796: f7ff fc87 bl 80360a8 - 803679a: 4603 mov r3, r0 - 803679c: 881b ldrh r3, [r3, #0] - 803679e: 83fb strh r3, [r7, #30] + 80367c2: 8bfb ldrh r3, [r7, #30] + 80367c4: 4618 mov r0, r3 + 80367c6: f7ff fc87 bl 80360d8 + 80367ca: 4603 mov r3, r0 + 80367cc: 881b ldrh r3, [r3, #0] + 80367ce: 83fb strh r3, [r7, #30] for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size; - 80367a0: 8bfa ldrh r2, [r7, #30] - 80367a2: 8bbb ldrh r3, [r7, #28] - 80367a4: f5c3 63c8 rsb r3, r3, #1600 ; 0x640 - 80367a8: 429a cmp r2, r3 - 80367aa: f4ff af44 bcc.w 8036636 + 80367d0: 8bfa ldrh r2, [r7, #30] + 80367d2: 8bbb ldrh r3, [r7, #28] + 80367d4: f5c3 63c8 rsb r3, r3, #1600 ; 0x640 + 80367d8: 429a cmp r2, r3 + 80367da: f4ff af44 bcc.w 8036666 #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ MEM_STATS_INC(err); LWIP_MEM_ALLOC_UNPROTECT(); sys_mutex_unlock(&mem_mutex); LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size)); return NULL; - 80367ae: 2300 movs r3, #0 -} - 80367b0: 4618 mov r0, r3 - 80367b2: 3720 adds r7, #32 - 80367b4: 46bd mov sp, r7 - 80367b6: bd80 pop {r7, pc} - 80367b8: 2400b9dc .word 0x2400b9dc - 80367bc: 080422f0 .word 0x080422f0 - 80367c0: 08042498 .word 0x08042498 - 80367c4: 08042338 .word 0x08042338 - 80367c8: 2400b9d8 .word 0x2400b9d8 - 80367cc: 080424ac .word 0x080424ac - 80367d0: 080424c8 .word 0x080424c8 - 80367d4: 080424f8 .word 0x080424f8 - 80367d8: 08042528 .word 0x08042528 - -080367dc : + 80367de: 2300 movs r3, #0 +} + 80367e0: 4618 mov r0, r3 + 80367e2: 3720 adds r7, #32 + 80367e4: 46bd mov sp, r7 + 80367e6: bd80 pop {r7, pc} + 80367e8: 2400b9dc .word 0x2400b9dc + 80367ec: 08042320 .word 0x08042320 + 80367f0: 080424c8 .word 0x080424c8 + 80367f4: 08042368 .word 0x08042368 + 80367f8: 2400b9d8 .word 0x2400b9d8 + 80367fc: 080424dc .word 0x080424dc + 8036800: 080424f8 .word 0x080424f8 + 8036804: 08042528 .word 0x08042528 + 8036808: 08042558 .word 0x08042558 + +0803680c : * * @param desc pool to initialize */ void memp_init_pool(const struct memp_desc *desc) { - 80367dc: b480 push {r7} - 80367de: b085 sub sp, #20 - 80367e0: af00 add r7, sp, #0 - 80367e2: 6078 str r0, [r7, #4] + 803680c: b480 push {r7} + 803680e: b085 sub sp, #20 + 8036810: af00 add r7, sp, #0 + 8036812: 6078 str r0, [r7, #4] LWIP_UNUSED_ARG(desc); #else int i; struct memp *memp; *desc->tab = NULL; - 80367e4: 687b ldr r3, [r7, #4] - 80367e6: 689b ldr r3, [r3, #8] - 80367e8: 2200 movs r2, #0 - 80367ea: 601a str r2, [r3, #0] + 8036814: 687b ldr r3, [r7, #4] + 8036816: 689b ldr r3, [r3, #8] + 8036818: 2200 movs r2, #0 + 803681a: 601a str r2, [r3, #0] memp = (struct memp *)LWIP_MEM_ALIGN(desc->base); - 80367ec: 687b ldr r3, [r7, #4] - 80367ee: 685b ldr r3, [r3, #4] - 80367f0: 3303 adds r3, #3 - 80367f2: f023 0303 bic.w r3, r3, #3 - 80367f6: 60bb str r3, [r7, #8] + 803681c: 687b ldr r3, [r7, #4] + 803681e: 685b ldr r3, [r3, #4] + 8036820: 3303 adds r3, #3 + 8036822: f023 0303 bic.w r3, r3, #3 + 8036826: 60bb str r3, [r7, #8] + MEM_SANITY_REGION_AFTER_ALIGNED #endif )); #endif /* create a linked list of memp elements */ for (i = 0; i < desc->num; ++i) { - 80367f8: 2300 movs r3, #0 - 80367fa: 60fb str r3, [r7, #12] - 80367fc: e011 b.n 8036822 + 8036828: 2300 movs r3, #0 + 803682a: 60fb str r3, [r7, #12] + 803682c: e011 b.n 8036852 memp->next = *desc->tab; - 80367fe: 687b ldr r3, [r7, #4] - 8036800: 689b ldr r3, [r3, #8] - 8036802: 681a ldr r2, [r3, #0] - 8036804: 68bb ldr r3, [r7, #8] - 8036806: 601a str r2, [r3, #0] + 803682e: 687b ldr r3, [r7, #4] + 8036830: 689b ldr r3, [r3, #8] + 8036832: 681a ldr r2, [r3, #0] + 8036834: 68bb ldr r3, [r7, #8] + 8036836: 601a str r2, [r3, #0] *desc->tab = memp; - 8036808: 687b ldr r3, [r7, #4] - 803680a: 689b ldr r3, [r3, #8] - 803680c: 68ba ldr r2, [r7, #8] - 803680e: 601a str r2, [r3, #0] + 8036838: 687b ldr r3, [r7, #4] + 803683a: 689b ldr r3, [r3, #8] + 803683c: 68ba ldr r2, [r7, #8] + 803683e: 601a str r2, [r3, #0] #if MEMP_OVERFLOW_CHECK memp_overflow_init_element(memp, desc); #endif /* MEMP_OVERFLOW_CHECK */ /* cast through void* to get rid of alignment warnings */ memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + desc->size - 8036810: 687b ldr r3, [r7, #4] - 8036812: 881b ldrh r3, [r3, #0] - 8036814: 461a mov r2, r3 - 8036816: 68bb ldr r3, [r7, #8] - 8036818: 4413 add r3, r2 - 803681a: 60bb str r3, [r7, #8] + 8036840: 687b ldr r3, [r7, #4] + 8036842: 881b ldrh r3, [r3, #0] + 8036844: 461a mov r2, r3 + 8036846: 68bb ldr r3, [r7, #8] + 8036848: 4413 add r3, r2 + 803684a: 60bb str r3, [r7, #8] for (i = 0; i < desc->num; ++i) { - 803681c: 68fb ldr r3, [r7, #12] - 803681e: 3301 adds r3, #1 - 8036820: 60fb str r3, [r7, #12] - 8036822: 687b ldr r3, [r7, #4] - 8036824: 885b ldrh r3, [r3, #2] - 8036826: 461a mov r2, r3 - 8036828: 68fb ldr r3, [r7, #12] - 803682a: 4293 cmp r3, r2 - 803682c: dbe7 blt.n 80367fe + 803684c: 68fb ldr r3, [r7, #12] + 803684e: 3301 adds r3, #1 + 8036850: 60fb str r3, [r7, #12] + 8036852: 687b ldr r3, [r7, #4] + 8036854: 885b ldrh r3, [r3, #2] + 8036856: 461a mov r2, r3 + 8036858: 68fb ldr r3, [r7, #12] + 803685a: 4293 cmp r3, r2 + 803685c: dbe7 blt.n 803682e #endif /* !MEMP_MEM_MALLOC */ #if MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) desc->stats->name = desc->desc; #endif /* MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) */ } - 803682e: bf00 nop - 8036830: bf00 nop - 8036832: 3714 adds r7, #20 - 8036834: 46bd mov sp, r7 - 8036836: f85d 7b04 ldr.w r7, [sp], #4 - 803683a: 4770 bx lr + 803685e: bf00 nop + 8036860: bf00 nop + 8036862: 3714 adds r7, #20 + 8036864: 46bd mov sp, r7 + 8036866: f85d 7b04 ldr.w r7, [sp], #4 + 803686a: 4770 bx lr -0803683c : +0803686c : * * Carves out memp_memory into linked lists for each pool-type. */ void memp_init(void) { - 803683c: b580 push {r7, lr} - 803683e: b082 sub sp, #8 - 8036840: af00 add r7, sp, #0 + 803686c: b580 push {r7, lr} + 803686e: b082 sub sp, #8 + 8036870: af00 add r7, sp, #0 u16_t i; /* for every pool: */ for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) { - 8036842: 2300 movs r3, #0 - 8036844: 80fb strh r3, [r7, #6] - 8036846: e009 b.n 803685c + 8036872: 2300 movs r3, #0 + 8036874: 80fb strh r3, [r7, #6] + 8036876: e009 b.n 803688c memp_init_pool(memp_pools[i]); - 8036848: 88fb ldrh r3, [r7, #6] - 803684a: 4a08 ldr r2, [pc, #32] ; (803686c ) - 803684c: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8036850: 4618 mov r0, r3 - 8036852: f7ff ffc3 bl 80367dc + 8036878: 88fb ldrh r3, [r7, #6] + 803687a: 4a08 ldr r2, [pc, #32] ; (803689c ) + 803687c: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8036880: 4618 mov r0, r3 + 8036882: f7ff ffc3 bl 803680c for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) { - 8036856: 88fb ldrh r3, [r7, #6] - 8036858: 3301 adds r3, #1 - 803685a: 80fb strh r3, [r7, #6] - 803685c: 88fb ldrh r3, [r7, #6] - 803685e: 2b08 cmp r3, #8 - 8036860: d9f2 bls.n 8036848 + 8036886: 88fb ldrh r3, [r7, #6] + 8036888: 3301 adds r3, #1 + 803688a: 80fb strh r3, [r7, #6] + 803688c: 88fb ldrh r3, [r7, #6] + 803688e: 2b08 cmp r3, #8 + 8036890: d9f2 bls.n 8036878 #if MEMP_OVERFLOW_CHECK >= 2 /* check everything a first time to see if it worked */ memp_overflow_check_all(); #endif /* MEMP_OVERFLOW_CHECK >= 2 */ } - 8036862: bf00 nop - 8036864: bf00 nop - 8036866: 3708 adds r7, #8 - 8036868: 46bd mov sp, r7 - 803686a: bd80 pop {r7, pc} - 803686c: 08044d6c .word 0x08044d6c + 8036892: bf00 nop + 8036894: bf00 nop + 8036896: 3708 adds r7, #8 + 8036898: 46bd mov sp, r7 + 803689a: bd80 pop {r7, pc} + 803689c: 08044d9c .word 0x08044d9c -08036870 : +080368a0 : #if !MEMP_OVERFLOW_CHECK do_memp_malloc_pool(const struct memp_desc *desc) #else do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line) #endif { - 8036870: b580 push {r7, lr} - 8036872: b084 sub sp, #16 - 8036874: af00 add r7, sp, #0 - 8036876: 6078 str r0, [r7, #4] + 80368a0: b580 push {r7, lr} + 80368a2: b084 sub sp, #16 + 80368a4: af00 add r7, sp, #0 + 80368a6: 6078 str r0, [r7, #4] memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size)); SYS_ARCH_PROTECT(old_level); #else /* MEMP_MEM_MALLOC */ SYS_ARCH_PROTECT(old_level); memp = *desc->tab; - 8036878: 687b ldr r3, [r7, #4] - 803687a: 689b ldr r3, [r3, #8] - 803687c: 681b ldr r3, [r3, #0] - 803687e: 60fb str r3, [r7, #12] + 80368a8: 687b ldr r3, [r7, #4] + 80368aa: 689b ldr r3, [r3, #8] + 80368ac: 681b ldr r3, [r3, #0] + 80368ae: 60fb str r3, [r7, #12] #endif /* MEMP_MEM_MALLOC */ if (memp != NULL) { - 8036880: 68fb ldr r3, [r7, #12] - 8036882: 2b00 cmp r3, #0 - 8036884: d012 beq.n 80368ac + 80368b0: 68fb ldr r3, [r7, #12] + 80368b2: 2b00 cmp r3, #0 + 80368b4: d012 beq.n 80368dc #if !MEMP_MEM_MALLOC #if MEMP_OVERFLOW_CHECK == 1 memp_overflow_check_element(memp, desc); #endif /* MEMP_OVERFLOW_CHECK */ *desc->tab = memp->next; - 8036886: 687b ldr r3, [r7, #4] - 8036888: 689b ldr r3, [r3, #8] - 803688a: 68fa ldr r2, [r7, #12] - 803688c: 6812 ldr r2, [r2, #0] - 803688e: 601a str r2, [r3, #0] + 80368b6: 687b ldr r3, [r7, #4] + 80368b8: 689b ldr r3, [r3, #8] + 80368ba: 68fa ldr r2, [r7, #12] + 80368bc: 6812 ldr r2, [r2, #0] + 80368be: 601a str r2, [r3, #0] memp->line = line; #if MEMP_MEM_MALLOC memp_overflow_init_element(memp, desc); #endif /* MEMP_MEM_MALLOC */ #endif /* MEMP_OVERFLOW_CHECK */ LWIP_ASSERT("memp_malloc: memp properly aligned", - 8036890: 68fb ldr r3, [r7, #12] - 8036892: f003 0303 and.w r3, r3, #3 - 8036896: 2b00 cmp r3, #0 - 8036898: d006 beq.n 80368a8 - 803689a: 4b07 ldr r3, [pc, #28] ; (80368b8 ) - 803689c: f44f 728c mov.w r2, #280 ; 0x118 - 80368a0: 4906 ldr r1, [pc, #24] ; (80368bc ) - 80368a2: 4807 ldr r0, [pc, #28] ; (80368c0 ) - 80368a4: f00a f91c bl 8040ae0 + 80368c0: 68fb ldr r3, [r7, #12] + 80368c2: f003 0303 and.w r3, r3, #3 + 80368c6: 2b00 cmp r3, #0 + 80368c8: d006 beq.n 80368d8 + 80368ca: 4b07 ldr r3, [pc, #28] ; (80368e8 ) + 80368cc: f44f 728c mov.w r2, #280 ; 0x118 + 80368d0: 4906 ldr r1, [pc, #24] ; (80368ec ) + 80368d2: 4807 ldr r0, [pc, #28] ; (80368f0 ) + 80368d4: f00a f91c bl 8040b10 desc->stats->max = desc->stats->used; } #endif SYS_ARCH_UNPROTECT(old_level); /* cast through u8_t* to get rid of alignment warnings */ return ((u8_t *)memp + MEMP_SIZE); - 80368a8: 68fb ldr r3, [r7, #12] - 80368aa: e000 b.n 80368ae + 80368d8: 68fb ldr r3, [r7, #12] + 80368da: e000 b.n 80368de #endif SYS_ARCH_UNPROTECT(old_level); LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", desc->desc)); } return NULL; - 80368ac: 2300 movs r3, #0 -} - 80368ae: 4618 mov r0, r3 - 80368b0: 3710 adds r7, #16 - 80368b2: 46bd mov sp, r7 - 80368b4: bd80 pop {r7, pc} - 80368b6: bf00 nop - 80368b8: 0804254c .word 0x0804254c - 80368bc: 0804257c .word 0x0804257c - 80368c0: 080425a0 .word 0x080425a0 - -080368c4 : + 80368dc: 2300 movs r3, #0 +} + 80368de: 4618 mov r0, r3 + 80368e0: 3710 adds r7, #16 + 80368e2: 46bd mov sp, r7 + 80368e4: bd80 pop {r7, pc} + 80368e6: bf00 nop + 80368e8: 0804257c .word 0x0804257c + 80368ec: 080425ac .word 0x080425ac + 80368f0: 080425d0 .word 0x080425d0 + +080368f4 : #if !MEMP_OVERFLOW_CHECK memp_malloc_pool(const struct memp_desc *desc) #else memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line) #endif { - 80368c4: b580 push {r7, lr} - 80368c6: b082 sub sp, #8 - 80368c8: af00 add r7, sp, #0 - 80368ca: 6078 str r0, [r7, #4] + 80368f4: b580 push {r7, lr} + 80368f6: b082 sub sp, #8 + 80368f8: af00 add r7, sp, #0 + 80368fa: 6078 str r0, [r7, #4] LWIP_ASSERT("invalid pool desc", desc != NULL); - 80368cc: 687b ldr r3, [r7, #4] - 80368ce: 2b00 cmp r3, #0 - 80368d0: d106 bne.n 80368e0 - 80368d2: 4b0a ldr r3, [pc, #40] ; (80368fc ) - 80368d4: f44f 729e mov.w r2, #316 ; 0x13c - 80368d8: 4909 ldr r1, [pc, #36] ; (8036900 ) - 80368da: 480a ldr r0, [pc, #40] ; (8036904 ) - 80368dc: f00a f900 bl 8040ae0 + 80368fc: 687b ldr r3, [r7, #4] + 80368fe: 2b00 cmp r3, #0 + 8036900: d106 bne.n 8036910 + 8036902: 4b0a ldr r3, [pc, #40] ; (803692c ) + 8036904: f44f 729e mov.w r2, #316 ; 0x13c + 8036908: 4909 ldr r1, [pc, #36] ; (8036930 ) + 803690a: 480a ldr r0, [pc, #40] ; (8036934 ) + 803690c: f00a f900 bl 8040b10 if (desc == NULL) { - 80368e0: 687b ldr r3, [r7, #4] - 80368e2: 2b00 cmp r3, #0 - 80368e4: d101 bne.n 80368ea + 8036910: 687b ldr r3, [r7, #4] + 8036912: 2b00 cmp r3, #0 + 8036914: d101 bne.n 803691a return NULL; - 80368e6: 2300 movs r3, #0 - 80368e8: e003 b.n 80368f2 + 8036916: 2300 movs r3, #0 + 8036918: e003 b.n 8036922 } #if !MEMP_OVERFLOW_CHECK return do_memp_malloc_pool(desc); - 80368ea: 6878 ldr r0, [r7, #4] - 80368ec: f7ff ffc0 bl 8036870 - 80368f0: 4603 mov r3, r0 + 803691a: 6878 ldr r0, [r7, #4] + 803691c: f7ff ffc0 bl 80368a0 + 8036920: 4603 mov r3, r0 #else return do_memp_malloc_pool_fn(desc, file, line); #endif } - 80368f2: 4618 mov r0, r3 - 80368f4: 3708 adds r7, #8 - 80368f6: 46bd mov sp, r7 - 80368f8: bd80 pop {r7, pc} - 80368fa: bf00 nop - 80368fc: 0804254c .word 0x0804254c - 8036900: 080425c8 .word 0x080425c8 - 8036904: 080425a0 .word 0x080425a0 + 8036922: 4618 mov r0, r3 + 8036924: 3708 adds r7, #8 + 8036926: 46bd mov sp, r7 + 8036928: bd80 pop {r7, pc} + 803692a: bf00 nop + 803692c: 0804257c .word 0x0804257c + 8036930: 080425f8 .word 0x080425f8 + 8036934: 080425d0 .word 0x080425d0 -08036908 : +08036938 : #if !MEMP_OVERFLOW_CHECK memp_malloc(memp_t type) #else memp_malloc_fn(memp_t type, const char *file, const int line) #endif { - 8036908: b580 push {r7, lr} - 803690a: b084 sub sp, #16 - 803690c: af00 add r7, sp, #0 - 803690e: 4603 mov r3, r0 - 8036910: 71fb strb r3, [r7, #7] + 8036938: b580 push {r7, lr} + 803693a: b084 sub sp, #16 + 803693c: af00 add r7, sp, #0 + 803693e: 4603 mov r3, r0 + 8036940: 71fb strb r3, [r7, #7] void *memp; LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;); - 8036912: 79fb ldrb r3, [r7, #7] - 8036914: 2b08 cmp r3, #8 - 8036916: d908 bls.n 803692a - 8036918: 4b0a ldr r3, [pc, #40] ; (8036944 ) - 803691a: f240 1257 movw r2, #343 ; 0x157 - 803691e: 490a ldr r1, [pc, #40] ; (8036948 ) - 8036920: 480a ldr r0, [pc, #40] ; (803694c ) - 8036922: f00a f8dd bl 8040ae0 - 8036926: 2300 movs r3, #0 - 8036928: e008 b.n 803693c + 8036942: 79fb ldrb r3, [r7, #7] + 8036944: 2b08 cmp r3, #8 + 8036946: d908 bls.n 803695a + 8036948: 4b0a ldr r3, [pc, #40] ; (8036974 ) + 803694a: f240 1257 movw r2, #343 ; 0x157 + 803694e: 490a ldr r1, [pc, #40] ; (8036978 ) + 8036950: 480a ldr r0, [pc, #40] ; (803697c ) + 8036952: f00a f8dd bl 8040b10 + 8036956: 2300 movs r3, #0 + 8036958: e008 b.n 803696c #if MEMP_OVERFLOW_CHECK >= 2 memp_overflow_check_all(); #endif /* MEMP_OVERFLOW_CHECK >= 2 */ #if !MEMP_OVERFLOW_CHECK memp = do_memp_malloc_pool(memp_pools[type]); - 803692a: 79fb ldrb r3, [r7, #7] - 803692c: 4a08 ldr r2, [pc, #32] ; (8036950 ) - 803692e: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8036932: 4618 mov r0, r3 - 8036934: f7ff ff9c bl 8036870 - 8036938: 60f8 str r0, [r7, #12] + 803695a: 79fb ldrb r3, [r7, #7] + 803695c: 4a08 ldr r2, [pc, #32] ; (8036980 ) + 803695e: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8036962: 4618 mov r0, r3 + 8036964: f7ff ff9c bl 80368a0 + 8036968: 60f8 str r0, [r7, #12] #else memp = do_memp_malloc_pool_fn(memp_pools[type], file, line); #endif return memp; - 803693a: 68fb ldr r3, [r7, #12] + 803696a: 68fb ldr r3, [r7, #12] } - 803693c: 4618 mov r0, r3 - 803693e: 3710 adds r7, #16 - 8036940: 46bd mov sp, r7 - 8036942: bd80 pop {r7, pc} - 8036944: 0804254c .word 0x0804254c - 8036948: 080425dc .word 0x080425dc - 803694c: 080425a0 .word 0x080425a0 - 8036950: 08044d6c .word 0x08044d6c + 803696c: 4618 mov r0, r3 + 803696e: 3710 adds r7, #16 + 8036970: 46bd mov sp, r7 + 8036972: bd80 pop {r7, pc} + 8036974: 0804257c .word 0x0804257c + 8036978: 0804260c .word 0x0804260c + 803697c: 080425d0 .word 0x080425d0 + 8036980: 08044d9c .word 0x08044d9c -08036954 : +08036984 : static void do_memp_free_pool(const struct memp_desc *desc, void *mem) { - 8036954: b580 push {r7, lr} - 8036956: b084 sub sp, #16 - 8036958: af00 add r7, sp, #0 - 803695a: 6078 str r0, [r7, #4] - 803695c: 6039 str r1, [r7, #0] + 8036984: b580 push {r7, lr} + 8036986: b084 sub sp, #16 + 8036988: af00 add r7, sp, #0 + 803698a: 6078 str r0, [r7, #4] + 803698c: 6039 str r1, [r7, #0] struct memp *memp; SYS_ARCH_DECL_PROTECT(old_level); LWIP_ASSERT("memp_free: mem properly aligned", - 803695e: 683b ldr r3, [r7, #0] - 8036960: f003 0303 and.w r3, r3, #3 - 8036964: 2b00 cmp r3, #0 - 8036966: d006 beq.n 8036976 - 8036968: 4b0a ldr r3, [pc, #40] ; (8036994 ) - 803696a: f44f 72b6 mov.w r2, #364 ; 0x16c - 803696e: 490a ldr r1, [pc, #40] ; (8036998 ) - 8036970: 480a ldr r0, [pc, #40] ; (803699c ) - 8036972: f00a f8b5 bl 8040ae0 + 803698e: 683b ldr r3, [r7, #0] + 8036990: f003 0303 and.w r3, r3, #3 + 8036994: 2b00 cmp r3, #0 + 8036996: d006 beq.n 80369a6 + 8036998: 4b0a ldr r3, [pc, #40] ; (80369c4 ) + 803699a: f44f 72b6 mov.w r2, #364 ; 0x16c + 803699e: 490a ldr r1, [pc, #40] ; (80369c8 ) + 80369a0: 480a ldr r0, [pc, #40] ; (80369cc ) + 80369a2: f00a f8b5 bl 8040b10 ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0); /* cast through void* to get rid of alignment warnings */ memp = (struct memp *)(void *)((u8_t *)mem - MEMP_SIZE); - 8036976: 683b ldr r3, [r7, #0] - 8036978: 60fb str r3, [r7, #12] + 80369a6: 683b ldr r3, [r7, #0] + 80369a8: 60fb str r3, [r7, #12] #if MEMP_MEM_MALLOC LWIP_UNUSED_ARG(desc); SYS_ARCH_UNPROTECT(old_level); mem_free(memp); #else /* MEMP_MEM_MALLOC */ memp->next = *desc->tab; - 803697a: 687b ldr r3, [r7, #4] - 803697c: 689b ldr r3, [r3, #8] - 803697e: 681a ldr r2, [r3, #0] - 8036980: 68fb ldr r3, [r7, #12] - 8036982: 601a str r2, [r3, #0] + 80369aa: 687b ldr r3, [r7, #4] + 80369ac: 689b ldr r3, [r3, #8] + 80369ae: 681a ldr r2, [r3, #0] + 80369b0: 68fb ldr r3, [r7, #12] + 80369b2: 601a str r2, [r3, #0] *desc->tab = memp; - 8036984: 687b ldr r3, [r7, #4] - 8036986: 689b ldr r3, [r3, #8] - 8036988: 68fa ldr r2, [r7, #12] - 803698a: 601a str r2, [r3, #0] + 80369b4: 687b ldr r3, [r7, #4] + 80369b6: 689b ldr r3, [r3, #8] + 80369b8: 68fa ldr r2, [r7, #12] + 80369ba: 601a str r2, [r3, #0] LWIP_ASSERT("memp sanity", memp_sanity(desc)); #endif /* MEMP_SANITY_CHECK */ SYS_ARCH_UNPROTECT(old_level); #endif /* !MEMP_MEM_MALLOC */ } - 803698c: bf00 nop - 803698e: 3710 adds r7, #16 - 8036990: 46bd mov sp, r7 - 8036992: bd80 pop {r7, pc} - 8036994: 0804254c .word 0x0804254c - 8036998: 080425fc .word 0x080425fc - 803699c: 080425a0 .word 0x080425a0 + 80369bc: bf00 nop + 80369be: 3710 adds r7, #16 + 80369c0: 46bd mov sp, r7 + 80369c2: bd80 pop {r7, pc} + 80369c4: 0804257c .word 0x0804257c + 80369c8: 0804262c .word 0x0804262c + 80369cc: 080425d0 .word 0x080425d0 -080369a0 : +080369d0 : * @param desc the pool where to put mem * @param mem the memp element to free */ void memp_free_pool(const struct memp_desc *desc, void *mem) { - 80369a0: b580 push {r7, lr} - 80369a2: b082 sub sp, #8 - 80369a4: af00 add r7, sp, #0 - 80369a6: 6078 str r0, [r7, #4] - 80369a8: 6039 str r1, [r7, #0] + 80369d0: b580 push {r7, lr} + 80369d2: b082 sub sp, #8 + 80369d4: af00 add r7, sp, #0 + 80369d6: 6078 str r0, [r7, #4] + 80369d8: 6039 str r1, [r7, #0] LWIP_ASSERT("invalid pool desc", desc != NULL); - 80369aa: 687b ldr r3, [r7, #4] - 80369ac: 2b00 cmp r3, #0 - 80369ae: d106 bne.n 80369be - 80369b0: 4b0a ldr r3, [pc, #40] ; (80369dc ) - 80369b2: f240 1295 movw r2, #405 ; 0x195 - 80369b6: 490a ldr r1, [pc, #40] ; (80369e0 ) - 80369b8: 480a ldr r0, [pc, #40] ; (80369e4 ) - 80369ba: f00a f891 bl 8040ae0 + 80369da: 687b ldr r3, [r7, #4] + 80369dc: 2b00 cmp r3, #0 + 80369de: d106 bne.n 80369ee + 80369e0: 4b0a ldr r3, [pc, #40] ; (8036a0c ) + 80369e2: f240 1295 movw r2, #405 ; 0x195 + 80369e6: 490a ldr r1, [pc, #40] ; (8036a10 ) + 80369e8: 480a ldr r0, [pc, #40] ; (8036a14 ) + 80369ea: f00a f891 bl 8040b10 if ((desc == NULL) || (mem == NULL)) { - 80369be: 687b ldr r3, [r7, #4] - 80369c0: 2b00 cmp r3, #0 - 80369c2: d007 beq.n 80369d4 - 80369c4: 683b ldr r3, [r7, #0] - 80369c6: 2b00 cmp r3, #0 - 80369c8: d004 beq.n 80369d4 + 80369ee: 687b ldr r3, [r7, #4] + 80369f0: 2b00 cmp r3, #0 + 80369f2: d007 beq.n 8036a04 + 80369f4: 683b ldr r3, [r7, #0] + 80369f6: 2b00 cmp r3, #0 + 80369f8: d004 beq.n 8036a04 return; } do_memp_free_pool(desc, mem); - 80369ca: 6839 ldr r1, [r7, #0] - 80369cc: 6878 ldr r0, [r7, #4] - 80369ce: f7ff ffc1 bl 8036954 - 80369d2: e000 b.n 80369d6 + 80369fa: 6839 ldr r1, [r7, #0] + 80369fc: 6878 ldr r0, [r7, #4] + 80369fe: f7ff ffc1 bl 8036984 + 8036a02: e000 b.n 8036a06 return; - 80369d4: bf00 nop + 8036a04: bf00 nop } - 80369d6: 3708 adds r7, #8 - 80369d8: 46bd mov sp, r7 - 80369da: bd80 pop {r7, pc} - 80369dc: 0804254c .word 0x0804254c - 80369e0: 080425c8 .word 0x080425c8 - 80369e4: 080425a0 .word 0x080425a0 + 8036a06: 3708 adds r7, #8 + 8036a08: 46bd mov sp, r7 + 8036a0a: bd80 pop {r7, pc} + 8036a0c: 0804257c .word 0x0804257c + 8036a10: 080425f8 .word 0x080425f8 + 8036a14: 080425d0 .word 0x080425d0 -080369e8 : +08036a18 : * @param type the pool where to put mem * @param mem the memp element to free */ void memp_free(memp_t type, void *mem) { - 80369e8: b580 push {r7, lr} - 80369ea: b082 sub sp, #8 - 80369ec: af00 add r7, sp, #0 - 80369ee: 4603 mov r3, r0 - 80369f0: 6039 str r1, [r7, #0] - 80369f2: 71fb strb r3, [r7, #7] + 8036a18: b580 push {r7, lr} + 8036a1a: b082 sub sp, #8 + 8036a1c: af00 add r7, sp, #0 + 8036a1e: 4603 mov r3, r0 + 8036a20: 6039 str r1, [r7, #0] + 8036a22: 71fb strb r3, [r7, #7] #ifdef LWIP_HOOK_MEMP_AVAILABLE struct memp *old_first; #endif LWIP_ERROR("memp_free: type < MEMP_MAX", (type < MEMP_MAX), return;); - 80369f4: 79fb ldrb r3, [r7, #7] - 80369f6: 2b08 cmp r3, #8 - 80369f8: d907 bls.n 8036a0a - 80369fa: 4b0c ldr r3, [pc, #48] ; (8036a2c ) - 80369fc: f44f 72d5 mov.w r2, #426 ; 0x1aa - 8036a00: 490b ldr r1, [pc, #44] ; (8036a30 ) - 8036a02: 480c ldr r0, [pc, #48] ; (8036a34 ) - 8036a04: f00a f86c bl 8040ae0 - 8036a08: e00c b.n 8036a24 + 8036a24: 79fb ldrb r3, [r7, #7] + 8036a26: 2b08 cmp r3, #8 + 8036a28: d907 bls.n 8036a3a + 8036a2a: 4b0c ldr r3, [pc, #48] ; (8036a5c ) + 8036a2c: f44f 72d5 mov.w r2, #426 ; 0x1aa + 8036a30: 490b ldr r1, [pc, #44] ; (8036a60 ) + 8036a32: 480c ldr r0, [pc, #48] ; (8036a64 ) + 8036a34: f00a f86c bl 8040b10 + 8036a38: e00c b.n 8036a54 if (mem == NULL) { - 8036a0a: 683b ldr r3, [r7, #0] - 8036a0c: 2b00 cmp r3, #0 - 8036a0e: d008 beq.n 8036a22 + 8036a3a: 683b ldr r3, [r7, #0] + 8036a3c: 2b00 cmp r3, #0 + 8036a3e: d008 beq.n 8036a52 #ifdef LWIP_HOOK_MEMP_AVAILABLE old_first = *memp_pools[type]->tab; #endif do_memp_free_pool(memp_pools[type], mem); - 8036a10: 79fb ldrb r3, [r7, #7] - 8036a12: 4a09 ldr r2, [pc, #36] ; (8036a38 ) - 8036a14: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8036a18: 6839 ldr r1, [r7, #0] - 8036a1a: 4618 mov r0, r3 - 8036a1c: f7ff ff9a bl 8036954 - 8036a20: e000 b.n 8036a24 + 8036a40: 79fb ldrb r3, [r7, #7] + 8036a42: 4a09 ldr r2, [pc, #36] ; (8036a68 ) + 8036a44: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8036a48: 6839 ldr r1, [r7, #0] + 8036a4a: 4618 mov r0, r3 + 8036a4c: f7ff ff9a bl 8036984 + 8036a50: e000 b.n 8036a54 return; - 8036a22: bf00 nop + 8036a52: bf00 nop #ifdef LWIP_HOOK_MEMP_AVAILABLE if (old_first == NULL) { LWIP_HOOK_MEMP_AVAILABLE(type); } #endif } - 8036a24: 3708 adds r7, #8 - 8036a26: 46bd mov sp, r7 - 8036a28: bd80 pop {r7, pc} - 8036a2a: bf00 nop - 8036a2c: 0804254c .word 0x0804254c - 8036a30: 0804261c .word 0x0804261c - 8036a34: 080425a0 .word 0x080425a0 - 8036a38: 08044d6c .word 0x08044d6c + 8036a54: 3708 adds r7, #8 + 8036a56: 46bd mov sp, r7 + 8036a58: bd80 pop {r7, pc} + 8036a5a: bf00 nop + 8036a5c: 0804257c .word 0x0804257c + 8036a60: 0804264c .word 0x0804264c + 8036a64: 080425d0 .word 0x080425d0 + 8036a68: 08044d9c .word 0x08044d9c -08036a3c : +08036a6c : } #endif /* LWIP_HAVE_LOOPIF */ void netif_init(void) { - 8036a3c: b480 push {r7} - 8036a3e: af00 add r7, sp, #0 + 8036a6c: b480 push {r7} + 8036a6e: af00 add r7, sp, #0 netif_set_link_up(&loop_netif); netif_set_up(&loop_netif); #endif /* LWIP_HAVE_LOOPIF */ } - 8036a40: bf00 nop - 8036a42: 46bd mov sp, r7 - 8036a44: f85d 7b04 ldr.w r7, [sp], #4 - 8036a48: 4770 bx lr + 8036a70: bf00 nop + 8036a72: 46bd mov sp, r7 + 8036a74: f85d 7b04 ldr.w r7, [sp], #4 + 8036a78: 4770 bx lr ... -08036a4c : +08036a7c : netif_add(struct netif *netif, #if LWIP_IPV4 const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw, #endif /* LWIP_IPV4 */ void *state, netif_init_fn init, netif_input_fn input) { - 8036a4c: b580 push {r7, lr} - 8036a4e: b086 sub sp, #24 - 8036a50: af00 add r7, sp, #0 - 8036a52: 60f8 str r0, [r7, #12] - 8036a54: 60b9 str r1, [r7, #8] - 8036a56: 607a str r2, [r7, #4] - 8036a58: 603b str r3, [r7, #0] + 8036a7c: b580 push {r7, lr} + 8036a7e: b086 sub sp, #24 + 8036a80: af00 add r7, sp, #0 + 8036a82: 60f8 str r0, [r7, #12] + 8036a84: 60b9 str r1, [r7, #8] + 8036a86: 607a str r2, [r7, #4] + 8036a88: 603b str r3, [r7, #0] LWIP_ASSERT("single netif already set", 0); return NULL; } #endif LWIP_ERROR("netif_add: invalid netif", netif != NULL, return NULL); - 8036a5a: 68fb ldr r3, [r7, #12] - 8036a5c: 2b00 cmp r3, #0 - 8036a5e: d108 bne.n 8036a72 - 8036a60: 4b59 ldr r3, [pc, #356] ; (8036bc8 ) - 8036a62: f240 1227 movw r2, #295 ; 0x127 - 8036a66: 4959 ldr r1, [pc, #356] ; (8036bcc ) - 8036a68: 4859 ldr r0, [pc, #356] ; (8036bd0 ) - 8036a6a: f00a f839 bl 8040ae0 - 8036a6e: 2300 movs r3, #0 - 8036a70: e0a5 b.n 8036bbe + 8036a8a: 68fb ldr r3, [r7, #12] + 8036a8c: 2b00 cmp r3, #0 + 8036a8e: d108 bne.n 8036aa2 + 8036a90: 4b59 ldr r3, [pc, #356] ; (8036bf8 ) + 8036a92: f240 1227 movw r2, #295 ; 0x127 + 8036a96: 4959 ldr r1, [pc, #356] ; (8036bfc ) + 8036a98: 4859 ldr r0, [pc, #356] ; (8036c00 ) + 8036a9a: f00a f839 bl 8040b10 + 8036a9e: 2300 movs r3, #0 + 8036aa0: e0a5 b.n 8036bee LWIP_ERROR("netif_add: No init function given", init != NULL, return NULL); - 8036a72: 6a7b ldr r3, [r7, #36] ; 0x24 - 8036a74: 2b00 cmp r3, #0 - 8036a76: d108 bne.n 8036a8a - 8036a78: 4b53 ldr r3, [pc, #332] ; (8036bc8 ) - 8036a7a: f44f 7294 mov.w r2, #296 ; 0x128 - 8036a7e: 4955 ldr r1, [pc, #340] ; (8036bd4 ) - 8036a80: 4853 ldr r0, [pc, #332] ; (8036bd0 ) - 8036a82: f00a f82d bl 8040ae0 - 8036a86: 2300 movs r3, #0 - 8036a88: e099 b.n 8036bbe + 8036aa2: 6a7b ldr r3, [r7, #36] ; 0x24 + 8036aa4: 2b00 cmp r3, #0 + 8036aa6: d108 bne.n 8036aba + 8036aa8: 4b53 ldr r3, [pc, #332] ; (8036bf8 ) + 8036aaa: f44f 7294 mov.w r2, #296 ; 0x128 + 8036aae: 4955 ldr r1, [pc, #340] ; (8036c04 ) + 8036ab0: 4853 ldr r0, [pc, #332] ; (8036c00 ) + 8036ab2: f00a f82d bl 8040b10 + 8036ab6: 2300 movs r3, #0 + 8036ab8: e099 b.n 8036bee #if LWIP_IPV4 if (ipaddr == NULL) { - 8036a8a: 68bb ldr r3, [r7, #8] - 8036a8c: 2b00 cmp r3, #0 - 8036a8e: d101 bne.n 8036a94 + 8036aba: 68bb ldr r3, [r7, #8] + 8036abc: 2b00 cmp r3, #0 + 8036abe: d101 bne.n 8036ac4 ipaddr = ip_2_ip4(IP4_ADDR_ANY); - 8036a90: 4b51 ldr r3, [pc, #324] ; (8036bd8 ) - 8036a92: 60bb str r3, [r7, #8] + 8036ac0: 4b51 ldr r3, [pc, #324] ; (8036c08 ) + 8036ac2: 60bb str r3, [r7, #8] } if (netmask == NULL) { - 8036a94: 687b ldr r3, [r7, #4] - 8036a96: 2b00 cmp r3, #0 - 8036a98: d101 bne.n 8036a9e + 8036ac4: 687b ldr r3, [r7, #4] + 8036ac6: 2b00 cmp r3, #0 + 8036ac8: d101 bne.n 8036ace netmask = ip_2_ip4(IP4_ADDR_ANY); - 8036a9a: 4b4f ldr r3, [pc, #316] ; (8036bd8 ) - 8036a9c: 607b str r3, [r7, #4] + 8036aca: 4b4f ldr r3, [pc, #316] ; (8036c08 ) + 8036acc: 607b str r3, [r7, #4] } if (gw == NULL) { - 8036a9e: 683b ldr r3, [r7, #0] - 8036aa0: 2b00 cmp r3, #0 - 8036aa2: d101 bne.n 8036aa8 + 8036ace: 683b ldr r3, [r7, #0] + 8036ad0: 2b00 cmp r3, #0 + 8036ad2: d101 bne.n 8036ad8 gw = ip_2_ip4(IP4_ADDR_ANY); - 8036aa4: 4b4c ldr r3, [pc, #304] ; (8036bd8 ) - 8036aa6: 603b str r3, [r7, #0] + 8036ad4: 4b4c ldr r3, [pc, #304] ; (8036c08 ) + 8036ad6: 603b str r3, [r7, #0] } /* reset new interface configuration state */ ip_addr_set_zero_ip4(&netif->ip_addr); - 8036aa8: 68fb ldr r3, [r7, #12] - 8036aaa: 2200 movs r2, #0 - 8036aac: 605a str r2, [r3, #4] + 8036ad8: 68fb ldr r3, [r7, #12] + 8036ada: 2200 movs r2, #0 + 8036adc: 605a str r2, [r3, #4] ip_addr_set_zero_ip4(&netif->netmask); - 8036aae: 68fb ldr r3, [r7, #12] - 8036ab0: 2200 movs r2, #0 - 8036ab2: 609a str r2, [r3, #8] + 8036ade: 68fb ldr r3, [r7, #12] + 8036ae0: 2200 movs r2, #0 + 8036ae2: 609a str r2, [r3, #8] ip_addr_set_zero_ip4(&netif->gw); - 8036ab4: 68fb ldr r3, [r7, #12] - 8036ab6: 2200 movs r2, #0 - 8036ab8: 60da str r2, [r3, #12] + 8036ae4: 68fb ldr r3, [r7, #12] + 8036ae6: 2200 movs r2, #0 + 8036ae8: 60da str r2, [r3, #12] netif->output = netif_null_output_ip4; - 8036aba: 68fb ldr r3, [r7, #12] - 8036abc: 4a47 ldr r2, [pc, #284] ; (8036bdc ) - 8036abe: 615a str r2, [r3, #20] + 8036aea: 68fb ldr r3, [r7, #12] + 8036aec: 4a47 ldr r2, [pc, #284] ; (8036c0c ) + 8036aee: 615a str r2, [r3, #20] #endif /* LWIP_IPV6_ADDRESS_LIFETIMES */ } netif->output_ip6 = netif_null_output_ip6; #endif /* LWIP_IPV6 */ NETIF_SET_CHECKSUM_CTRL(netif, NETIF_CHECKSUM_ENABLE_ALL); netif->mtu = 0; - 8036ac0: 68fb ldr r3, [r7, #12] - 8036ac2: 2200 movs r2, #0 - 8036ac4: 851a strh r2, [r3, #40] ; 0x28 + 8036af0: 68fb ldr r3, [r7, #12] + 8036af2: 2200 movs r2, #0 + 8036af4: 851a strh r2, [r3, #40] ; 0x28 netif->flags = 0; - 8036ac6: 68fb ldr r3, [r7, #12] - 8036ac8: 2200 movs r2, #0 - 8036aca: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8036af6: 68fb ldr r3, [r7, #12] + 8036af8: 2200 movs r2, #0 + 8036afa: f883 2031 strb.w r2, [r3, #49] ; 0x31 netif->ip6_autoconfig_enabled = 0; #endif /* LWIP_IPV6_AUTOCONFIG */ nd6_restart_netif(netif); #endif /* LWIP_IPV6 */ #if LWIP_NETIF_STATUS_CALLBACK netif->status_callback = NULL; - 8036ace: 68fb ldr r3, [r7, #12] - 8036ad0: 2200 movs r2, #0 - 8036ad2: 61da str r2, [r3, #28] + 8036afe: 68fb ldr r3, [r7, #12] + 8036b00: 2200 movs r2, #0 + 8036b02: 61da str r2, [r3, #28] #endif /* LWIP_NETIF_STATUS_CALLBACK */ #if LWIP_NETIF_LINK_CALLBACK netif->link_callback = NULL; - 8036ad4: 68fb ldr r3, [r7, #12] - 8036ad6: 2200 movs r2, #0 - 8036ad8: 621a str r2, [r3, #32] + 8036b04: 68fb ldr r3, [r7, #12] + 8036b06: 2200 movs r2, #0 + 8036b08: 621a str r2, [r3, #32] netif->loop_first = NULL; netif->loop_last = NULL; #endif /* ENABLE_LOOPBACK */ /* remember netif specific state information data */ netif->state = state; - 8036ada: 68fb ldr r3, [r7, #12] - 8036adc: 6a3a ldr r2, [r7, #32] - 8036ade: 625a str r2, [r3, #36] ; 0x24 + 8036b0a: 68fb ldr r3, [r7, #12] + 8036b0c: 6a3a ldr r2, [r7, #32] + 8036b0e: 625a str r2, [r3, #36] ; 0x24 netif->num = netif_num; - 8036ae0: 4b3f ldr r3, [pc, #252] ; (8036be0 ) - 8036ae2: 781a ldrb r2, [r3, #0] - 8036ae4: 68fb ldr r3, [r7, #12] - 8036ae6: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8036b10: 4b3f ldr r3, [pc, #252] ; (8036c10 ) + 8036b12: 781a ldrb r2, [r3, #0] + 8036b14: 68fb ldr r3, [r7, #12] + 8036b16: f883 2034 strb.w r2, [r3, #52] ; 0x34 netif->input = input; - 8036aea: 68fb ldr r3, [r7, #12] - 8036aec: 6aba ldr r2, [r7, #40] ; 0x28 - 8036aee: 611a str r2, [r3, #16] + 8036b1a: 68fb ldr r3, [r7, #12] + 8036b1c: 6aba ldr r2, [r7, #40] ; 0x28 + 8036b1e: 611a str r2, [r3, #16] #if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS netif->loop_cnt_current = 0; #endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */ #if LWIP_IPV4 netif_set_addr(netif, ipaddr, netmask, gw); - 8036af0: 683b ldr r3, [r7, #0] - 8036af2: 687a ldr r2, [r7, #4] - 8036af4: 68b9 ldr r1, [r7, #8] - 8036af6: 68f8 ldr r0, [r7, #12] - 8036af8: f000 f91c bl 8036d34 + 8036b20: 683b ldr r3, [r7, #0] + 8036b22: 687a ldr r2, [r7, #4] + 8036b24: 68b9 ldr r1, [r7, #8] + 8036b26: 68f8 ldr r0, [r7, #12] + 8036b28: f000 f91c bl 8036d64 #endif /* LWIP_IPV4 */ /* call user specified initialization function for netif */ if (init(netif) != ERR_OK) { - 8036afc: 6a7b ldr r3, [r7, #36] ; 0x24 - 8036afe: 68f8 ldr r0, [r7, #12] - 8036b00: 4798 blx r3 - 8036b02: 4603 mov r3, r0 - 8036b04: 2b00 cmp r3, #0 - 8036b06: d001 beq.n 8036b0c + 8036b2c: 6a7b ldr r3, [r7, #36] ; 0x24 + 8036b2e: 68f8 ldr r0, [r7, #12] + 8036b30: 4798 blx r3 + 8036b32: 4603 mov r3, r0 + 8036b34: 2b00 cmp r3, #0 + 8036b36: d001 beq.n 8036b3c return NULL; - 8036b08: 2300 movs r3, #0 - 8036b0a: e058 b.n 8036bbe + 8036b38: 2300 movs r3, #0 + 8036b3a: e058 b.n 8036bee */ { struct netif *netif2; int num_netifs; do { if (netif->num == 255) { - 8036b0c: 68fb ldr r3, [r7, #12] - 8036b0e: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036b12: 2bff cmp r3, #255 ; 0xff - 8036b14: d103 bne.n 8036b1e + 8036b3c: 68fb ldr r3, [r7, #12] + 8036b3e: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036b42: 2bff cmp r3, #255 ; 0xff + 8036b44: d103 bne.n 8036b4e netif->num = 0; - 8036b16: 68fb ldr r3, [r7, #12] - 8036b18: 2200 movs r2, #0 - 8036b1a: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8036b46: 68fb ldr r3, [r7, #12] + 8036b48: 2200 movs r2, #0 + 8036b4a: f883 2034 strb.w r2, [r3, #52] ; 0x34 } num_netifs = 0; - 8036b1e: 2300 movs r3, #0 - 8036b20: 613b str r3, [r7, #16] + 8036b4e: 2300 movs r3, #0 + 8036b50: 613b str r3, [r7, #16] for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) { - 8036b22: 4b30 ldr r3, [pc, #192] ; (8036be4 ) - 8036b24: 681b ldr r3, [r3, #0] - 8036b26: 617b str r3, [r7, #20] - 8036b28: e02b b.n 8036b82 + 8036b52: 4b30 ldr r3, [pc, #192] ; (8036c14 ) + 8036b54: 681b ldr r3, [r3, #0] + 8036b56: 617b str r3, [r7, #20] + 8036b58: e02b b.n 8036bb2 LWIP_ASSERT("netif already added", netif2 != netif); - 8036b2a: 697a ldr r2, [r7, #20] - 8036b2c: 68fb ldr r3, [r7, #12] - 8036b2e: 429a cmp r2, r3 - 8036b30: d106 bne.n 8036b40 - 8036b32: 4b25 ldr r3, [pc, #148] ; (8036bc8 ) - 8036b34: f240 128b movw r2, #395 ; 0x18b - 8036b38: 492b ldr r1, [pc, #172] ; (8036be8 ) - 8036b3a: 4825 ldr r0, [pc, #148] ; (8036bd0 ) - 8036b3c: f009 ffd0 bl 8040ae0 + 8036b5a: 697a ldr r2, [r7, #20] + 8036b5c: 68fb ldr r3, [r7, #12] + 8036b5e: 429a cmp r2, r3 + 8036b60: d106 bne.n 8036b70 + 8036b62: 4b25 ldr r3, [pc, #148] ; (8036bf8 ) + 8036b64: f240 128b movw r2, #395 ; 0x18b + 8036b68: 492b ldr r1, [pc, #172] ; (8036c18 ) + 8036b6a: 4825 ldr r0, [pc, #148] ; (8036c00 ) + 8036b6c: f009 ffd0 bl 8040b10 num_netifs++; - 8036b40: 693b ldr r3, [r7, #16] - 8036b42: 3301 adds r3, #1 - 8036b44: 613b str r3, [r7, #16] + 8036b70: 693b ldr r3, [r7, #16] + 8036b72: 3301 adds r3, #1 + 8036b74: 613b str r3, [r7, #16] LWIP_ASSERT("too many netifs, max. supported number is 255", num_netifs <= 255); - 8036b46: 693b ldr r3, [r7, #16] - 8036b48: 2bff cmp r3, #255 ; 0xff - 8036b4a: dd06 ble.n 8036b5a - 8036b4c: 4b1e ldr r3, [pc, #120] ; (8036bc8 ) - 8036b4e: f240 128d movw r2, #397 ; 0x18d - 8036b52: 4926 ldr r1, [pc, #152] ; (8036bec ) - 8036b54: 481e ldr r0, [pc, #120] ; (8036bd0 ) - 8036b56: f009 ffc3 bl 8040ae0 + 8036b76: 693b ldr r3, [r7, #16] + 8036b78: 2bff cmp r3, #255 ; 0xff + 8036b7a: dd06 ble.n 8036b8a + 8036b7c: 4b1e ldr r3, [pc, #120] ; (8036bf8 ) + 8036b7e: f240 128d movw r2, #397 ; 0x18d + 8036b82: 4926 ldr r1, [pc, #152] ; (8036c1c ) + 8036b84: 481e ldr r0, [pc, #120] ; (8036c00 ) + 8036b86: f009 ffc3 bl 8040b10 if (netif2->num == netif->num) { - 8036b5a: 697b ldr r3, [r7, #20] - 8036b5c: f893 2034 ldrb.w r2, [r3, #52] ; 0x34 - 8036b60: 68fb ldr r3, [r7, #12] - 8036b62: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036b66: 429a cmp r2, r3 - 8036b68: d108 bne.n 8036b7c + 8036b8a: 697b ldr r3, [r7, #20] + 8036b8c: f893 2034 ldrb.w r2, [r3, #52] ; 0x34 + 8036b90: 68fb ldr r3, [r7, #12] + 8036b92: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036b96: 429a cmp r2, r3 + 8036b98: d108 bne.n 8036bac netif->num++; - 8036b6a: 68fb ldr r3, [r7, #12] - 8036b6c: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036b70: 3301 adds r3, #1 - 8036b72: b2da uxtb r2, r3 - 8036b74: 68fb ldr r3, [r7, #12] - 8036b76: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8036b9a: 68fb ldr r3, [r7, #12] + 8036b9c: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036ba0: 3301 adds r3, #1 + 8036ba2: b2da uxtb r2, r3 + 8036ba4: 68fb ldr r3, [r7, #12] + 8036ba6: f883 2034 strb.w r2, [r3, #52] ; 0x34 break; - 8036b7a: e005 b.n 8036b88 + 8036baa: e005 b.n 8036bb8 for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) { - 8036b7c: 697b ldr r3, [r7, #20] - 8036b7e: 681b ldr r3, [r3, #0] - 8036b80: 617b str r3, [r7, #20] - 8036b82: 697b ldr r3, [r7, #20] - 8036b84: 2b00 cmp r3, #0 - 8036b86: d1d0 bne.n 8036b2a + 8036bac: 697b ldr r3, [r7, #20] + 8036bae: 681b ldr r3, [r3, #0] + 8036bb0: 617b str r3, [r7, #20] + 8036bb2: 697b ldr r3, [r7, #20] + 8036bb4: 2b00 cmp r3, #0 + 8036bb6: d1d0 bne.n 8036b5a } } } while (netif2 != NULL); - 8036b88: 697b ldr r3, [r7, #20] - 8036b8a: 2b00 cmp r3, #0 - 8036b8c: d1be bne.n 8036b0c + 8036bb8: 697b ldr r3, [r7, #20] + 8036bba: 2b00 cmp r3, #0 + 8036bbc: d1be bne.n 8036b3c } if (netif->num == 254) { - 8036b8e: 68fb ldr r3, [r7, #12] - 8036b90: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036b94: 2bfe cmp r3, #254 ; 0xfe - 8036b96: d103 bne.n 8036ba0 + 8036bbe: 68fb ldr r3, [r7, #12] + 8036bc0: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036bc4: 2bfe cmp r3, #254 ; 0xfe + 8036bc6: d103 bne.n 8036bd0 netif_num = 0; - 8036b98: 4b11 ldr r3, [pc, #68] ; (8036be0 ) - 8036b9a: 2200 movs r2, #0 - 8036b9c: 701a strb r2, [r3, #0] - 8036b9e: e006 b.n 8036bae + 8036bc8: 4b11 ldr r3, [pc, #68] ; (8036c10 ) + 8036bca: 2200 movs r2, #0 + 8036bcc: 701a strb r2, [r3, #0] + 8036bce: e006 b.n 8036bde } else { netif_num = (u8_t)(netif->num + 1); - 8036ba0: 68fb ldr r3, [r7, #12] - 8036ba2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036ba6: 3301 adds r3, #1 - 8036ba8: b2da uxtb r2, r3 - 8036baa: 4b0d ldr r3, [pc, #52] ; (8036be0 ) - 8036bac: 701a strb r2, [r3, #0] + 8036bd0: 68fb ldr r3, [r7, #12] + 8036bd2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036bd6: 3301 adds r3, #1 + 8036bd8: b2da uxtb r2, r3 + 8036bda: 4b0d ldr r3, [pc, #52] ; (8036c10 ) + 8036bdc: 701a strb r2, [r3, #0] } /* add this netif to the list */ netif->next = netif_list; - 8036bae: 4b0d ldr r3, [pc, #52] ; (8036be4 ) - 8036bb0: 681a ldr r2, [r3, #0] - 8036bb2: 68fb ldr r3, [r7, #12] - 8036bb4: 601a str r2, [r3, #0] + 8036bde: 4b0d ldr r3, [pc, #52] ; (8036c14 ) + 8036be0: 681a ldr r2, [r3, #0] + 8036be2: 68fb ldr r3, [r7, #12] + 8036be4: 601a str r2, [r3, #0] netif_list = netif; - 8036bb6: 4a0b ldr r2, [pc, #44] ; (8036be4 ) - 8036bb8: 68fb ldr r3, [r7, #12] - 8036bba: 6013 str r3, [r2, #0] + 8036be6: 4a0b ldr r2, [pc, #44] ; (8036c14 ) + 8036be8: 68fb ldr r3, [r7, #12] + 8036bea: 6013 str r3, [r2, #0] #endif /* LWIP_IPV4 */ LWIP_DEBUGF(NETIF_DEBUG, ("\n")); netif_invoke_ext_callback(netif, LWIP_NSC_NETIF_ADDED, NULL); return netif; - 8036bbc: 68fb ldr r3, [r7, #12] -} - 8036bbe: 4618 mov r0, r3 - 8036bc0: 3718 adds r7, #24 - 8036bc2: 46bd mov sp, r7 - 8036bc4: bd80 pop {r7, pc} - 8036bc6: bf00 nop - 8036bc8: 08042638 .word 0x08042638 - 8036bcc: 080426cc .word 0x080426cc - 8036bd0: 08042688 .word 0x08042688 - 8036bd4: 080426e8 .word 0x080426e8 - 8036bd8: 08044dd0 .word 0x08044dd0 - 8036bdc: 0803702f .word 0x0803702f - 8036be0: 2400e954 .word 0x2400e954 - 8036be4: 2400e94c .word 0x2400e94c - 8036be8: 0804270c .word 0x0804270c - 8036bec: 08042720 .word 0x08042720 - -08036bf0 : + 8036bec: 68fb ldr r3, [r7, #12] +} + 8036bee: 4618 mov r0, r3 + 8036bf0: 3718 adds r7, #24 + 8036bf2: 46bd mov sp, r7 + 8036bf4: bd80 pop {r7, pc} + 8036bf6: bf00 nop + 8036bf8: 08042668 .word 0x08042668 + 8036bfc: 080426fc .word 0x080426fc + 8036c00: 080426b8 .word 0x080426b8 + 8036c04: 08042718 .word 0x08042718 + 8036c08: 08044e00 .word 0x08044e00 + 8036c0c: 0803705f .word 0x0803705f + 8036c10: 2400e954 .word 0x2400e954 + 8036c14: 2400e94c .word 0x2400e94c + 8036c18: 0804273c .word 0x0804273c + 8036c1c: 08042750 .word 0x08042750 + +08036c20 : static void netif_do_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr) { - 8036bf0: b580 push {r7, lr} - 8036bf2: b082 sub sp, #8 - 8036bf4: af00 add r7, sp, #0 - 8036bf6: 6078 str r0, [r7, #4] - 8036bf8: 6039 str r1, [r7, #0] + 8036c20: b580 push {r7, lr} + 8036c22: b082 sub sp, #8 + 8036c24: af00 add r7, sp, #0 + 8036c26: 6078 str r0, [r7, #4] + 8036c28: 6039 str r1, [r7, #0] #if LWIP_TCP tcp_netif_ip_addr_changed(old_addr, new_addr); - 8036bfa: 6839 ldr r1, [r7, #0] - 8036bfc: 6878 ldr r0, [r7, #4] - 8036bfe: f002 fdbf bl 8039780 + 8036c2a: 6839 ldr r1, [r7, #0] + 8036c2c: 6878 ldr r0, [r7, #4] + 8036c2e: f002 fdbf bl 80397b0 #endif /* LWIP_TCP */ #if LWIP_UDP udp_netif_ip_addr_changed(old_addr, new_addr); - 8036c02: 6839 ldr r1, [r7, #0] - 8036c04: 6878 ldr r0, [r7, #4] - 8036c06: f007 fafb bl 803e200 + 8036c32: 6839 ldr r1, [r7, #0] + 8036c34: 6878 ldr r0, [r7, #4] + 8036c36: f007 fafb bl 803e230 #endif /* LWIP_UDP */ #if LWIP_RAW raw_netif_ip_addr_changed(old_addr, new_addr); #endif /* LWIP_RAW */ } - 8036c0a: bf00 nop - 8036c0c: 3708 adds r7, #8 - 8036c0e: 46bd mov sp, r7 - 8036c10: bd80 pop {r7, pc} + 8036c3a: bf00 nop + 8036c3c: 3708 adds r7, #8 + 8036c3e: 46bd mov sp, r7 + 8036c40: bd80 pop {r7, pc} ... -08036c14 : +08036c44 : #if LWIP_IPV4 static int netif_do_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr, ip_addr_t *old_addr) { - 8036c14: b580 push {r7, lr} - 8036c16: b086 sub sp, #24 - 8036c18: af00 add r7, sp, #0 - 8036c1a: 60f8 str r0, [r7, #12] - 8036c1c: 60b9 str r1, [r7, #8] - 8036c1e: 607a str r2, [r7, #4] + 8036c44: b580 push {r7, lr} + 8036c46: b086 sub sp, #24 + 8036c48: af00 add r7, sp, #0 + 8036c4a: 60f8 str r0, [r7, #12] + 8036c4c: 60b9 str r1, [r7, #8] + 8036c4e: 607a str r2, [r7, #4] LWIP_ASSERT("invalid pointer", ipaddr != NULL); - 8036c20: 68bb ldr r3, [r7, #8] - 8036c22: 2b00 cmp r3, #0 - 8036c24: d106 bne.n 8036c34 - 8036c26: 4b21 ldr r3, [pc, #132] ; (8036cac ) - 8036c28: f240 12cb movw r2, #459 ; 0x1cb - 8036c2c: 4920 ldr r1, [pc, #128] ; (8036cb0 ) - 8036c2e: 4821 ldr r0, [pc, #132] ; (8036cb4 ) - 8036c30: f009 ff56 bl 8040ae0 + 8036c50: 68bb ldr r3, [r7, #8] + 8036c52: 2b00 cmp r3, #0 + 8036c54: d106 bne.n 8036c64 + 8036c56: 4b21 ldr r3, [pc, #132] ; (8036cdc ) + 8036c58: f240 12cb movw r2, #459 ; 0x1cb + 8036c5c: 4920 ldr r1, [pc, #128] ; (8036ce0 ) + 8036c5e: 4821 ldr r0, [pc, #132] ; (8036ce4 ) + 8036c60: f009 ff56 bl 8040b10 LWIP_ASSERT("invalid pointer", old_addr != NULL); - 8036c34: 687b ldr r3, [r7, #4] - 8036c36: 2b00 cmp r3, #0 - 8036c38: d106 bne.n 8036c48 - 8036c3a: 4b1c ldr r3, [pc, #112] ; (8036cac ) - 8036c3c: f44f 72e6 mov.w r2, #460 ; 0x1cc - 8036c40: 491b ldr r1, [pc, #108] ; (8036cb0 ) - 8036c42: 481c ldr r0, [pc, #112] ; (8036cb4 ) - 8036c44: f009 ff4c bl 8040ae0 + 8036c64: 687b ldr r3, [r7, #4] + 8036c66: 2b00 cmp r3, #0 + 8036c68: d106 bne.n 8036c78 + 8036c6a: 4b1c ldr r3, [pc, #112] ; (8036cdc ) + 8036c6c: f44f 72e6 mov.w r2, #460 ; 0x1cc + 8036c70: 491b ldr r1, [pc, #108] ; (8036ce0 ) + 8036c72: 481c ldr r0, [pc, #112] ; (8036ce4 ) + 8036c74: f009 ff4c bl 8040b10 /* address is actually being changed? */ if (ip4_addr_cmp(ipaddr, netif_ip4_addr(netif)) == 0) { - 8036c48: 68bb ldr r3, [r7, #8] - 8036c4a: 681a ldr r2, [r3, #0] - 8036c4c: 68fb ldr r3, [r7, #12] - 8036c4e: 3304 adds r3, #4 - 8036c50: 681b ldr r3, [r3, #0] - 8036c52: 429a cmp r2, r3 - 8036c54: d024 beq.n 8036ca0 + 8036c78: 68bb ldr r3, [r7, #8] + 8036c7a: 681a ldr r2, [r3, #0] + 8036c7c: 68fb ldr r3, [r7, #12] + 8036c7e: 3304 adds r3, #4 + 8036c80: 681b ldr r3, [r3, #0] + 8036c82: 429a cmp r2, r3 + 8036c84: d024 beq.n 8036cd0 ip_addr_t new_addr; *ip_2_ip4(&new_addr) = *ipaddr; - 8036c56: 68bb ldr r3, [r7, #8] - 8036c58: 681b ldr r3, [r3, #0] - 8036c5a: 617b str r3, [r7, #20] + 8036c86: 68bb ldr r3, [r7, #8] + 8036c88: 681b ldr r3, [r3, #0] + 8036c8a: 617b str r3, [r7, #20] IP_SET_TYPE_VAL(new_addr, IPADDR_TYPE_V4); ip_addr_copy(*old_addr, *netif_ip_addr4(netif)); - 8036c5c: 68fb ldr r3, [r7, #12] - 8036c5e: 3304 adds r3, #4 - 8036c60: 681a ldr r2, [r3, #0] - 8036c62: 687b ldr r3, [r7, #4] - 8036c64: 601a str r2, [r3, #0] + 8036c8c: 68fb ldr r3, [r7, #12] + 8036c8e: 3304 adds r3, #4 + 8036c90: 681a ldr r2, [r3, #0] + 8036c92: 687b ldr r3, [r7, #4] + 8036c94: 601a str r2, [r3, #0] LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n")); netif_do_ip_addr_changed(old_addr, &new_addr); - 8036c66: f107 0314 add.w r3, r7, #20 - 8036c6a: 4619 mov r1, r3 - 8036c6c: 6878 ldr r0, [r7, #4] - 8036c6e: f7ff ffbf bl 8036bf0 + 8036c96: f107 0314 add.w r3, r7, #20 + 8036c9a: 4619 mov r1, r3 + 8036c9c: 6878 ldr r0, [r7, #4] + 8036c9e: f7ff ffbf bl 8036c20 mib2_remove_ip4(netif); mib2_remove_route_ip4(0, netif); /* set new IP address to netif */ ip4_addr_set(ip_2_ip4(&netif->ip_addr), ipaddr); - 8036c72: 68bb ldr r3, [r7, #8] - 8036c74: 2b00 cmp r3, #0 - 8036c76: d002 beq.n 8036c7e - 8036c78: 68bb ldr r3, [r7, #8] - 8036c7a: 681b ldr r3, [r3, #0] - 8036c7c: e000 b.n 8036c80 - 8036c7e: 2300 movs r3, #0 - 8036c80: 68fa ldr r2, [r7, #12] - 8036c82: 6053 str r3, [r2, #4] + 8036ca2: 68bb ldr r3, [r7, #8] + 8036ca4: 2b00 cmp r3, #0 + 8036ca6: d002 beq.n 8036cae + 8036ca8: 68bb ldr r3, [r7, #8] + 8036caa: 681b ldr r3, [r3, #0] + 8036cac: e000 b.n 8036cb0 + 8036cae: 2300 movs r3, #0 + 8036cb0: 68fa ldr r2, [r7, #12] + 8036cb2: 6053 str r3, [r2, #4] IP_SET_TYPE_VAL(netif->ip_addr, IPADDR_TYPE_V4); mib2_add_ip4(netif); mib2_add_route_ip4(0, netif); netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4); - 8036c84: 2101 movs r1, #1 - 8036c86: 68f8 ldr r0, [r7, #12] - 8036c88: f000 f8e2 bl 8036e50 + 8036cb4: 2101 movs r1, #1 + 8036cb6: 68f8 ldr r0, [r7, #12] + 8036cb8: f000 f8e2 bl 8036e80 NETIF_STATUS_CALLBACK(netif); - 8036c8c: 68fb ldr r3, [r7, #12] - 8036c8e: 69db ldr r3, [r3, #28] - 8036c90: 2b00 cmp r3, #0 - 8036c92: d003 beq.n 8036c9c - 8036c94: 68fb ldr r3, [r7, #12] - 8036c96: 69db ldr r3, [r3, #28] - 8036c98: 68f8 ldr r0, [r7, #12] - 8036c9a: 4798 blx r3 + 8036cbc: 68fb ldr r3, [r7, #12] + 8036cbe: 69db ldr r3, [r3, #28] + 8036cc0: 2b00 cmp r3, #0 + 8036cc2: d003 beq.n 8036ccc + 8036cc4: 68fb ldr r3, [r7, #12] + 8036cc6: 69db ldr r3, [r3, #28] + 8036cc8: 68f8 ldr r0, [r7, #12] + 8036cca: 4798 blx r3 return 1; /* address changed */ - 8036c9c: 2301 movs r3, #1 - 8036c9e: e000 b.n 8036ca2 + 8036ccc: 2301 movs r3, #1 + 8036cce: e000 b.n 8036cd2 } return 0; /* address unchanged */ - 8036ca0: 2300 movs r3, #0 + 8036cd0: 2300 movs r3, #0 } - 8036ca2: 4618 mov r0, r3 - 8036ca4: 3718 adds r7, #24 - 8036ca6: 46bd mov sp, r7 - 8036ca8: bd80 pop {r7, pc} - 8036caa: bf00 nop - 8036cac: 08042638 .word 0x08042638 - 8036cb0: 08042750 .word 0x08042750 - 8036cb4: 08042688 .word 0x08042688 + 8036cd2: 4618 mov r0, r3 + 8036cd4: 3718 adds r7, #24 + 8036cd6: 46bd mov sp, r7 + 8036cd8: bd80 pop {r7, pc} + 8036cda: bf00 nop + 8036cdc: 08042668 .word 0x08042668 + 8036ce0: 08042780 .word 0x08042780 + 8036ce4: 080426b8 .word 0x080426b8 -08036cb8 : +08036ce8 : } } static int netif_do_set_netmask(struct netif *netif, const ip4_addr_t *netmask, ip_addr_t *old_nm) { - 8036cb8: b480 push {r7} - 8036cba: b085 sub sp, #20 - 8036cbc: af00 add r7, sp, #0 - 8036cbe: 60f8 str r0, [r7, #12] - 8036cc0: 60b9 str r1, [r7, #8] - 8036cc2: 607a str r2, [r7, #4] + 8036ce8: b480 push {r7} + 8036cea: b085 sub sp, #20 + 8036cec: af00 add r7, sp, #0 + 8036cee: 60f8 str r0, [r7, #12] + 8036cf0: 60b9 str r1, [r7, #8] + 8036cf2: 607a str r2, [r7, #4] /* address is actually being changed? */ if (ip4_addr_cmp(netmask, netif_ip4_netmask(netif)) == 0) { - 8036cc4: 68bb ldr r3, [r7, #8] - 8036cc6: 681a ldr r2, [r3, #0] - 8036cc8: 68fb ldr r3, [r7, #12] - 8036cca: 3308 adds r3, #8 - 8036ccc: 681b ldr r3, [r3, #0] - 8036cce: 429a cmp r2, r3 - 8036cd0: d00a beq.n 8036ce8 + 8036cf4: 68bb ldr r3, [r7, #8] + 8036cf6: 681a ldr r2, [r3, #0] + 8036cf8: 68fb ldr r3, [r7, #12] + 8036cfa: 3308 adds r3, #8 + 8036cfc: 681b ldr r3, [r3, #0] + 8036cfe: 429a cmp r2, r3 + 8036d00: d00a beq.n 8036d18 #else LWIP_UNUSED_ARG(old_nm); #endif mib2_remove_route_ip4(0, netif); /* set new netmask to netif */ ip4_addr_set(ip_2_ip4(&netif->netmask), netmask); - 8036cd2: 68bb ldr r3, [r7, #8] - 8036cd4: 2b00 cmp r3, #0 - 8036cd6: d002 beq.n 8036cde - 8036cd8: 68bb ldr r3, [r7, #8] - 8036cda: 681b ldr r3, [r3, #0] - 8036cdc: e000 b.n 8036ce0 - 8036cde: 2300 movs r3, #0 - 8036ce0: 68fa ldr r2, [r7, #12] - 8036ce2: 6093 str r3, [r2, #8] + 8036d02: 68bb ldr r3, [r7, #8] + 8036d04: 2b00 cmp r3, #0 + 8036d06: d002 beq.n 8036d0e + 8036d08: 68bb ldr r3, [r7, #8] + 8036d0a: 681b ldr r3, [r3, #0] + 8036d0c: e000 b.n 8036d10 + 8036d0e: 2300 movs r3, #0 + 8036d10: 68fa ldr r2, [r7, #12] + 8036d12: 6093 str r3, [r2, #8] netif->name[0], netif->name[1], ip4_addr1_16(netif_ip4_netmask(netif)), ip4_addr2_16(netif_ip4_netmask(netif)), ip4_addr3_16(netif_ip4_netmask(netif)), ip4_addr4_16(netif_ip4_netmask(netif)))); return 1; /* netmask changed */ - 8036ce4: 2301 movs r3, #1 - 8036ce6: e000 b.n 8036cea + 8036d14: 2301 movs r3, #1 + 8036d16: e000 b.n 8036d1a } return 0; /* netmask unchanged */ - 8036ce8: 2300 movs r3, #0 + 8036d18: 2300 movs r3, #0 } - 8036cea: 4618 mov r0, r3 - 8036cec: 3714 adds r7, #20 - 8036cee: 46bd mov sp, r7 - 8036cf0: f85d 7b04 ldr.w r7, [sp], #4 - 8036cf4: 4770 bx lr + 8036d1a: 4618 mov r0, r3 + 8036d1c: 3714 adds r7, #20 + 8036d1e: 46bd mov sp, r7 + 8036d20: f85d 7b04 ldr.w r7, [sp], #4 + 8036d24: 4770 bx lr -08036cf6 : +08036d26 : } } static int netif_do_set_gw(struct netif *netif, const ip4_addr_t *gw, ip_addr_t *old_gw) { - 8036cf6: b480 push {r7} - 8036cf8: b085 sub sp, #20 - 8036cfa: af00 add r7, sp, #0 - 8036cfc: 60f8 str r0, [r7, #12] - 8036cfe: 60b9 str r1, [r7, #8] - 8036d00: 607a str r2, [r7, #4] + 8036d26: b480 push {r7} + 8036d28: b085 sub sp, #20 + 8036d2a: af00 add r7, sp, #0 + 8036d2c: 60f8 str r0, [r7, #12] + 8036d2e: 60b9 str r1, [r7, #8] + 8036d30: 607a str r2, [r7, #4] /* address is actually being changed? */ if (ip4_addr_cmp(gw, netif_ip4_gw(netif)) == 0) { - 8036d02: 68bb ldr r3, [r7, #8] - 8036d04: 681a ldr r2, [r3, #0] - 8036d06: 68fb ldr r3, [r7, #12] - 8036d08: 330c adds r3, #12 - 8036d0a: 681b ldr r3, [r3, #0] - 8036d0c: 429a cmp r2, r3 - 8036d0e: d00a beq.n 8036d26 + 8036d32: 68bb ldr r3, [r7, #8] + 8036d34: 681a ldr r2, [r3, #0] + 8036d36: 68fb ldr r3, [r7, #12] + 8036d38: 330c adds r3, #12 + 8036d3a: 681b ldr r3, [r3, #0] + 8036d3c: 429a cmp r2, r3 + 8036d3e: d00a beq.n 8036d56 ip_addr_copy(*old_gw, *netif_ip_gw4(netif)); #else LWIP_UNUSED_ARG(old_gw); #endif ip4_addr_set(ip_2_ip4(&netif->gw), gw); - 8036d10: 68bb ldr r3, [r7, #8] - 8036d12: 2b00 cmp r3, #0 - 8036d14: d002 beq.n 8036d1c - 8036d16: 68bb ldr r3, [r7, #8] - 8036d18: 681b ldr r3, [r3, #0] - 8036d1a: e000 b.n 8036d1e - 8036d1c: 2300 movs r3, #0 - 8036d1e: 68fa ldr r2, [r7, #12] - 8036d20: 60d3 str r3, [r2, #12] + 8036d40: 68bb ldr r3, [r7, #8] + 8036d42: 2b00 cmp r3, #0 + 8036d44: d002 beq.n 8036d4c + 8036d46: 68bb ldr r3, [r7, #8] + 8036d48: 681b ldr r3, [r3, #0] + 8036d4a: e000 b.n 8036d4e + 8036d4c: 2300 movs r3, #0 + 8036d4e: 68fa ldr r2, [r7, #12] + 8036d50: 60d3 str r3, [r2, #12] netif->name[0], netif->name[1], ip4_addr1_16(netif_ip4_gw(netif)), ip4_addr2_16(netif_ip4_gw(netif)), ip4_addr3_16(netif_ip4_gw(netif)), ip4_addr4_16(netif_ip4_gw(netif)))); return 1; /* gateway changed */ - 8036d22: 2301 movs r3, #1 - 8036d24: e000 b.n 8036d28 + 8036d52: 2301 movs r3, #1 + 8036d54: e000 b.n 8036d58 } return 0; /* gateway unchanged */ - 8036d26: 2300 movs r3, #0 + 8036d56: 2300 movs r3, #0 } - 8036d28: 4618 mov r0, r3 - 8036d2a: 3714 adds r7, #20 - 8036d2c: 46bd mov sp, r7 - 8036d2e: f85d 7b04 ldr.w r7, [sp], #4 - 8036d32: 4770 bx lr + 8036d58: 4618 mov r0, r3 + 8036d5a: 3714 adds r7, #20 + 8036d5c: 46bd mov sp, r7 + 8036d5e: f85d 7b04 ldr.w r7, [sp], #4 + 8036d62: 4770 bx lr -08036d34 : +08036d64 : * @param gw the new default gateway */ void netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw) { - 8036d34: b580 push {r7, lr} - 8036d36: b088 sub sp, #32 - 8036d38: af00 add r7, sp, #0 - 8036d3a: 60f8 str r0, [r7, #12] - 8036d3c: 60b9 str r1, [r7, #8] - 8036d3e: 607a str r2, [r7, #4] - 8036d40: 603b str r3, [r7, #0] + 8036d64: b580 push {r7, lr} + 8036d66: b088 sub sp, #32 + 8036d68: af00 add r7, sp, #0 + 8036d6a: 60f8 str r0, [r7, #12] + 8036d6c: 60b9 str r1, [r7, #8] + 8036d6e: 607a str r2, [r7, #4] + 8036d70: 603b str r3, [r7, #0] ip_addr_t old_nm_val; ip_addr_t old_gw_val; ip_addr_t *old_nm = &old_nm_val; ip_addr_t *old_gw = &old_gw_val; #else ip_addr_t *old_nm = NULL; - 8036d42: 2300 movs r3, #0 - 8036d44: 61fb str r3, [r7, #28] + 8036d72: 2300 movs r3, #0 + 8036d74: 61fb str r3, [r7, #28] ip_addr_t *old_gw = NULL; - 8036d46: 2300 movs r3, #0 - 8036d48: 61bb str r3, [r7, #24] + 8036d76: 2300 movs r3, #0 + 8036d78: 61bb str r3, [r7, #24] int remove; LWIP_ASSERT_CORE_LOCKED(); /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */ if (ipaddr == NULL) { - 8036d4a: 68bb ldr r3, [r7, #8] - 8036d4c: 2b00 cmp r3, #0 - 8036d4e: d101 bne.n 8036d54 + 8036d7a: 68bb ldr r3, [r7, #8] + 8036d7c: 2b00 cmp r3, #0 + 8036d7e: d101 bne.n 8036d84 ipaddr = IP4_ADDR_ANY4; - 8036d50: 4b1c ldr r3, [pc, #112] ; (8036dc4 ) - 8036d52: 60bb str r3, [r7, #8] + 8036d80: 4b1c ldr r3, [pc, #112] ; (8036df4 ) + 8036d82: 60bb str r3, [r7, #8] } if (netmask == NULL) { - 8036d54: 687b ldr r3, [r7, #4] - 8036d56: 2b00 cmp r3, #0 - 8036d58: d101 bne.n 8036d5e + 8036d84: 687b ldr r3, [r7, #4] + 8036d86: 2b00 cmp r3, #0 + 8036d88: d101 bne.n 8036d8e netmask = IP4_ADDR_ANY4; - 8036d5a: 4b1a ldr r3, [pc, #104] ; (8036dc4 ) - 8036d5c: 607b str r3, [r7, #4] + 8036d8a: 4b1a ldr r3, [pc, #104] ; (8036df4 ) + 8036d8c: 607b str r3, [r7, #4] } if (gw == NULL) { - 8036d5e: 683b ldr r3, [r7, #0] - 8036d60: 2b00 cmp r3, #0 - 8036d62: d101 bne.n 8036d68 + 8036d8e: 683b ldr r3, [r7, #0] + 8036d90: 2b00 cmp r3, #0 + 8036d92: d101 bne.n 8036d98 gw = IP4_ADDR_ANY4; - 8036d64: 4b17 ldr r3, [pc, #92] ; (8036dc4 ) - 8036d66: 603b str r3, [r7, #0] + 8036d94: 4b17 ldr r3, [pc, #92] ; (8036df4 ) + 8036d96: 603b str r3, [r7, #0] } remove = ip4_addr_isany(ipaddr); - 8036d68: 68bb ldr r3, [r7, #8] - 8036d6a: 2b00 cmp r3, #0 - 8036d6c: d003 beq.n 8036d76 - 8036d6e: 68bb ldr r3, [r7, #8] - 8036d70: 681b ldr r3, [r3, #0] - 8036d72: 2b00 cmp r3, #0 - 8036d74: d101 bne.n 8036d7a - 8036d76: 2301 movs r3, #1 - 8036d78: e000 b.n 8036d7c - 8036d7a: 2300 movs r3, #0 - 8036d7c: 617b str r3, [r7, #20] + 8036d98: 68bb ldr r3, [r7, #8] + 8036d9a: 2b00 cmp r3, #0 + 8036d9c: d003 beq.n 8036da6 + 8036d9e: 68bb ldr r3, [r7, #8] + 8036da0: 681b ldr r3, [r3, #0] + 8036da2: 2b00 cmp r3, #0 + 8036da4: d101 bne.n 8036daa + 8036da6: 2301 movs r3, #1 + 8036da8: e000 b.n 8036dac + 8036daa: 2300 movs r3, #0 + 8036dac: 617b str r3, [r7, #20] if (remove) { - 8036d7e: 697b ldr r3, [r7, #20] - 8036d80: 2b00 cmp r3, #0 - 8036d82: d006 beq.n 8036d92 + 8036dae: 697b ldr r3, [r7, #20] + 8036db0: 2b00 cmp r3, #0 + 8036db2: d006 beq.n 8036dc2 /* when removing an address, we have to remove it *before* changing netmask/gw to ensure that tcp RST segment can be sent correctly */ if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) { - 8036d84: f107 0310 add.w r3, r7, #16 - 8036d88: 461a mov r2, r3 - 8036d8a: 68b9 ldr r1, [r7, #8] - 8036d8c: 68f8 ldr r0, [r7, #12] - 8036d8e: f7ff ff41 bl 8036c14 + 8036db4: f107 0310 add.w r3, r7, #16 + 8036db8: 461a mov r2, r3 + 8036dba: 68b9 ldr r1, [r7, #8] + 8036dbc: 68f8 ldr r0, [r7, #12] + 8036dbe: f7ff ff41 bl 8036c44 change_reason |= LWIP_NSC_IPV4_ADDRESS_CHANGED; cb_args.ipv4_changed.old_address = &old_addr; #endif } } if (netif_do_set_netmask(netif, netmask, old_nm)) { - 8036d92: 69fa ldr r2, [r7, #28] - 8036d94: 6879 ldr r1, [r7, #4] - 8036d96: 68f8 ldr r0, [r7, #12] - 8036d98: f7ff ff8e bl 8036cb8 + 8036dc2: 69fa ldr r2, [r7, #28] + 8036dc4: 6879 ldr r1, [r7, #4] + 8036dc6: 68f8 ldr r0, [r7, #12] + 8036dc8: f7ff ff8e bl 8036ce8 #if LWIP_NETIF_EXT_STATUS_CALLBACK change_reason |= LWIP_NSC_IPV4_NETMASK_CHANGED; cb_args.ipv4_changed.old_netmask = old_nm; #endif } if (netif_do_set_gw(netif, gw, old_gw)) { - 8036d9c: 69ba ldr r2, [r7, #24] - 8036d9e: 6839 ldr r1, [r7, #0] - 8036da0: 68f8 ldr r0, [r7, #12] - 8036da2: f7ff ffa8 bl 8036cf6 + 8036dcc: 69ba ldr r2, [r7, #24] + 8036dce: 6839 ldr r1, [r7, #0] + 8036dd0: 68f8 ldr r0, [r7, #12] + 8036dd2: f7ff ffa8 bl 8036d26 #if LWIP_NETIF_EXT_STATUS_CALLBACK change_reason |= LWIP_NSC_IPV4_GATEWAY_CHANGED; cb_args.ipv4_changed.old_gw = old_gw; #endif } if (!remove) { - 8036da6: 697b ldr r3, [r7, #20] - 8036da8: 2b00 cmp r3, #0 - 8036daa: d106 bne.n 8036dba + 8036dd6: 697b ldr r3, [r7, #20] + 8036dd8: 2b00 cmp r3, #0 + 8036dda: d106 bne.n 8036dea /* set ipaddr last to ensure netmask/gw have been set when status callback is called */ if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) { - 8036dac: f107 0310 add.w r3, r7, #16 - 8036db0: 461a mov r2, r3 - 8036db2: 68b9 ldr r1, [r7, #8] - 8036db4: 68f8 ldr r0, [r7, #12] - 8036db6: f7ff ff2d bl 8036c14 + 8036ddc: f107 0310 add.w r3, r7, #16 + 8036de0: 461a mov r2, r3 + 8036de2: 68b9 ldr r1, [r7, #8] + 8036de4: 68f8 ldr r0, [r7, #12] + 8036de6: f7ff ff2d bl 8036c44 if (change_reason != LWIP_NSC_NONE) { change_reason |= LWIP_NSC_IPV4_SETTINGS_CHANGED; netif_invoke_ext_callback(netif, change_reason, &cb_args); } #endif } - 8036dba: bf00 nop - 8036dbc: 3720 adds r7, #32 - 8036dbe: 46bd mov sp, r7 - 8036dc0: bd80 pop {r7, pc} - 8036dc2: bf00 nop - 8036dc4: 08044dd0 .word 0x08044dd0 + 8036dea: bf00 nop + 8036dec: 3720 adds r7, #32 + 8036dee: 46bd mov sp, r7 + 8036df0: bd80 pop {r7, pc} + 8036df2: bf00 nop + 8036df4: 08044e00 .word 0x08044e00 -08036dc8 : +08036df8 : * * @param netif the default network interface */ void netif_set_default(struct netif *netif) { - 8036dc8: b480 push {r7} - 8036dca: b083 sub sp, #12 - 8036dcc: af00 add r7, sp, #0 - 8036dce: 6078 str r0, [r7, #4] + 8036df8: b480 push {r7} + 8036dfa: b083 sub sp, #12 + 8036dfc: af00 add r7, sp, #0 + 8036dfe: 6078 str r0, [r7, #4] mib2_remove_route_ip4(1, netif); } else { /* install default route */ mib2_add_route_ip4(1, netif); } netif_default = netif; - 8036dd0: 4a04 ldr r2, [pc, #16] ; (8036de4 ) - 8036dd2: 687b ldr r3, [r7, #4] - 8036dd4: 6013 str r3, [r2, #0] + 8036e00: 4a04 ldr r2, [pc, #16] ; (8036e14 ) + 8036e02: 687b ldr r3, [r7, #4] + 8036e04: 6013 str r3, [r2, #0] LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n", netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\'')); } - 8036dd6: bf00 nop - 8036dd8: 370c adds r7, #12 - 8036dda: 46bd mov sp, r7 - 8036ddc: f85d 7b04 ldr.w r7, [sp], #4 - 8036de0: 4770 bx lr - 8036de2: bf00 nop - 8036de4: 2400e950 .word 0x2400e950 + 8036e06: bf00 nop + 8036e08: 370c adds r7, #12 + 8036e0a: 46bd mov sp, r7 + 8036e0c: f85d 7b04 ldr.w r7, [sp], #4 + 8036e10: 4770 bx lr + 8036e12: bf00 nop + 8036e14: 2400e950 .word 0x2400e950 -08036de8 : +08036e18 : * Bring an interface up, available for processing * traffic. */ void netif_set_up(struct netif *netif) { - 8036de8: b580 push {r7, lr} - 8036dea: b082 sub sp, #8 - 8036dec: af00 add r7, sp, #0 - 8036dee: 6078 str r0, [r7, #4] + 8036e18: b580 push {r7, lr} + 8036e1a: b082 sub sp, #8 + 8036e1c: af00 add r7, sp, #0 + 8036e1e: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif_set_up: invalid netif", netif != NULL, return); - 8036df0: 687b ldr r3, [r7, #4] - 8036df2: 2b00 cmp r3, #0 - 8036df4: d107 bne.n 8036e06 - 8036df6: 4b13 ldr r3, [pc, #76] ; (8036e44 ) - 8036df8: f44f 7254 mov.w r2, #848 ; 0x350 - 8036dfc: 4912 ldr r1, [pc, #72] ; (8036e48 ) - 8036dfe: 4813 ldr r0, [pc, #76] ; (8036e4c ) - 8036e00: f009 fe6e bl 8040ae0 - 8036e04: e01b b.n 8036e3e + 8036e20: 687b ldr r3, [r7, #4] + 8036e22: 2b00 cmp r3, #0 + 8036e24: d107 bne.n 8036e36 + 8036e26: 4b13 ldr r3, [pc, #76] ; (8036e74 ) + 8036e28: f44f 7254 mov.w r2, #848 ; 0x350 + 8036e2c: 4912 ldr r1, [pc, #72] ; (8036e78 ) + 8036e2e: 4813 ldr r0, [pc, #76] ; (8036e7c ) + 8036e30: f009 fe6e bl 8040b10 + 8036e34: e01b b.n 8036e6e if (!(netif->flags & NETIF_FLAG_UP)) { - 8036e06: 687b ldr r3, [r7, #4] - 8036e08: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036e0c: f003 0301 and.w r3, r3, #1 - 8036e10: 2b00 cmp r3, #0 - 8036e12: d114 bne.n 8036e3e + 8036e36: 687b ldr r3, [r7, #4] + 8036e38: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036e3c: f003 0301 and.w r3, r3, #1 + 8036e40: 2b00 cmp r3, #0 + 8036e42: d114 bne.n 8036e6e netif_set_flags(netif, NETIF_FLAG_UP); - 8036e14: 687b ldr r3, [r7, #4] - 8036e16: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036e1a: f043 0301 orr.w r3, r3, #1 - 8036e1e: b2da uxtb r2, r3 - 8036e20: 687b ldr r3, [r7, #4] - 8036e22: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8036e44: 687b ldr r3, [r7, #4] + 8036e46: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036e4a: f043 0301 orr.w r3, r3, #1 + 8036e4e: b2da uxtb r2, r3 + 8036e50: 687b ldr r3, [r7, #4] + 8036e52: f883 2031 strb.w r2, [r3, #49] ; 0x31 MIB2_COPY_SYSUPTIME_TO(&netif->ts); NETIF_STATUS_CALLBACK(netif); - 8036e26: 687b ldr r3, [r7, #4] - 8036e28: 69db ldr r3, [r3, #28] - 8036e2a: 2b00 cmp r3, #0 - 8036e2c: d003 beq.n 8036e36 - 8036e2e: 687b ldr r3, [r7, #4] - 8036e30: 69db ldr r3, [r3, #28] - 8036e32: 6878 ldr r0, [r7, #4] - 8036e34: 4798 blx r3 + 8036e56: 687b ldr r3, [r7, #4] + 8036e58: 69db ldr r3, [r3, #28] + 8036e5a: 2b00 cmp r3, #0 + 8036e5c: d003 beq.n 8036e66 + 8036e5e: 687b ldr r3, [r7, #4] + 8036e60: 69db ldr r3, [r3, #28] + 8036e62: 6878 ldr r0, [r7, #4] + 8036e64: 4798 blx r3 args.status_changed.state = 1; netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args); } #endif netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6); - 8036e36: 2103 movs r1, #3 - 8036e38: 6878 ldr r0, [r7, #4] - 8036e3a: f000 f809 bl 8036e50 + 8036e66: 2103 movs r1, #3 + 8036e68: 6878 ldr r0, [r7, #4] + 8036e6a: f000 f809 bl 8036e80 #if LWIP_IPV6 nd6_restart_netif(netif); #endif /* LWIP_IPV6 */ } } - 8036e3e: 3708 adds r7, #8 - 8036e40: 46bd mov sp, r7 - 8036e42: bd80 pop {r7, pc} - 8036e44: 08042638 .word 0x08042638 - 8036e48: 080427c0 .word 0x080427c0 - 8036e4c: 08042688 .word 0x08042688 + 8036e6e: 3708 adds r7, #8 + 8036e70: 46bd mov sp, r7 + 8036e72: bd80 pop {r7, pc} + 8036e74: 08042668 .word 0x08042668 + 8036e78: 080427f0 .word 0x080427f0 + 8036e7c: 080426b8 .word 0x080426b8 -08036e50 : +08036e80 : /** Send ARP/IGMP/MLD/RS events, e.g. on link-up/netif-up or addr-change */ static void netif_issue_reports(struct netif *netif, u8_t report_type) { - 8036e50: b580 push {r7, lr} - 8036e52: b082 sub sp, #8 - 8036e54: af00 add r7, sp, #0 - 8036e56: 6078 str r0, [r7, #4] - 8036e58: 460b mov r3, r1 - 8036e5a: 70fb strb r3, [r7, #3] + 8036e80: b580 push {r7, lr} + 8036e82: b082 sub sp, #8 + 8036e84: af00 add r7, sp, #0 + 8036e86: 6078 str r0, [r7, #4] + 8036e88: 460b mov r3, r1 + 8036e8a: 70fb strb r3, [r7, #3] LWIP_ASSERT("netif_issue_reports: invalid netif", netif != NULL); - 8036e5c: 687b ldr r3, [r7, #4] - 8036e5e: 2b00 cmp r3, #0 - 8036e60: d106 bne.n 8036e70 - 8036e62: 4b18 ldr r3, [pc, #96] ; (8036ec4 ) - 8036e64: f240 326d movw r2, #877 ; 0x36d - 8036e68: 4917 ldr r1, [pc, #92] ; (8036ec8 ) - 8036e6a: 4818 ldr r0, [pc, #96] ; (8036ecc ) - 8036e6c: f009 fe38 bl 8040ae0 + 8036e8c: 687b ldr r3, [r7, #4] + 8036e8e: 2b00 cmp r3, #0 + 8036e90: d106 bne.n 8036ea0 + 8036e92: 4b18 ldr r3, [pc, #96] ; (8036ef4 ) + 8036e94: f240 326d movw r2, #877 ; 0x36d + 8036e98: 4917 ldr r1, [pc, #92] ; (8036ef8 ) + 8036e9a: 4818 ldr r0, [pc, #96] ; (8036efc ) + 8036e9c: f009 fe38 bl 8040b10 /* Only send reports when both link and admin states are up */ if (!(netif->flags & NETIF_FLAG_LINK_UP) || - 8036e70: 687b ldr r3, [r7, #4] - 8036e72: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036e76: f003 0304 and.w r3, r3, #4 - 8036e7a: 2b00 cmp r3, #0 - 8036e7c: d01e beq.n 8036ebc + 8036ea0: 687b ldr r3, [r7, #4] + 8036ea2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036ea6: f003 0304 and.w r3, r3, #4 + 8036eaa: 2b00 cmp r3, #0 + 8036eac: d01e beq.n 8036eec !(netif->flags & NETIF_FLAG_UP)) { - 8036e7e: 687b ldr r3, [r7, #4] - 8036e80: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036e84: f003 0301 and.w r3, r3, #1 + 8036eae: 687b ldr r3, [r7, #4] + 8036eb0: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036eb4: f003 0301 and.w r3, r3, #1 if (!(netif->flags & NETIF_FLAG_LINK_UP) || - 8036e88: 2b00 cmp r3, #0 - 8036e8a: d017 beq.n 8036ebc + 8036eb8: 2b00 cmp r3, #0 + 8036eba: d017 beq.n 8036eec return; } #if LWIP_IPV4 if ((report_type & NETIF_REPORT_TYPE_IPV4) && - 8036e8c: 78fb ldrb r3, [r7, #3] - 8036e8e: f003 0301 and.w r3, r3, #1 - 8036e92: 2b00 cmp r3, #0 - 8036e94: d013 beq.n 8036ebe + 8036ebc: 78fb ldrb r3, [r7, #3] + 8036ebe: f003 0301 and.w r3, r3, #1 + 8036ec2: 2b00 cmp r3, #0 + 8036ec4: d013 beq.n 8036eee !ip4_addr_isany_val(*netif_ip4_addr(netif))) { - 8036e96: 687b ldr r3, [r7, #4] - 8036e98: 3304 adds r3, #4 - 8036e9a: 681b ldr r3, [r3, #0] + 8036ec6: 687b ldr r3, [r7, #4] + 8036ec8: 3304 adds r3, #4 + 8036eca: 681b ldr r3, [r3, #0] if ((report_type & NETIF_REPORT_TYPE_IPV4) && - 8036e9c: 2b00 cmp r3, #0 - 8036e9e: d00e beq.n 8036ebe + 8036ecc: 2b00 cmp r3, #0 + 8036ece: d00e beq.n 8036eee #if LWIP_ARP /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */ if (netif->flags & (NETIF_FLAG_ETHARP)) { - 8036ea0: 687b ldr r3, [r7, #4] - 8036ea2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036ea6: f003 0308 and.w r3, r3, #8 - 8036eaa: 2b00 cmp r3, #0 - 8036eac: d007 beq.n 8036ebe + 8036ed0: 687b ldr r3, [r7, #4] + 8036ed2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036ed6: f003 0308 and.w r3, r3, #8 + 8036eda: 2b00 cmp r3, #0 + 8036edc: d007 beq.n 8036eee etharp_gratuitous(netif); - 8036eae: 687b ldr r3, [r7, #4] - 8036eb0: 3304 adds r3, #4 - 8036eb2: 4619 mov r1, r3 - 8036eb4: 6878 ldr r0, [r7, #4] - 8036eb6: f008 f90d bl 803f0d4 - 8036eba: e000 b.n 8036ebe + 8036ede: 687b ldr r3, [r7, #4] + 8036ee0: 3304 adds r3, #4 + 8036ee2: 4619 mov r1, r3 + 8036ee4: 6878 ldr r0, [r7, #4] + 8036ee6: f008 f90d bl 803f104 + 8036eea: e000 b.n 8036eee return; - 8036ebc: bf00 nop + 8036eec: bf00 nop /* send mld memberships */ mld6_report_groups(netif); #endif /* LWIP_IPV6_MLD */ } #endif /* LWIP_IPV6 */ } - 8036ebe: 3708 adds r7, #8 - 8036ec0: 46bd mov sp, r7 - 8036ec2: bd80 pop {r7, pc} - 8036ec4: 08042638 .word 0x08042638 - 8036ec8: 080427dc .word 0x080427dc - 8036ecc: 08042688 .word 0x08042688 + 8036eee: 3708 adds r7, #8 + 8036ef0: 46bd mov sp, r7 + 8036ef2: bd80 pop {r7, pc} + 8036ef4: 08042668 .word 0x08042668 + 8036ef8: 0804280c .word 0x0804280c + 8036efc: 080426b8 .word 0x080426b8 -08036ed0 : +08036f00 : * @ingroup netif * Bring an interface down, disabling any traffic processing. */ void netif_set_down(struct netif *netif) { - 8036ed0: b580 push {r7, lr} - 8036ed2: b082 sub sp, #8 - 8036ed4: af00 add r7, sp, #0 - 8036ed6: 6078 str r0, [r7, #4] + 8036f00: b580 push {r7, lr} + 8036f02: b082 sub sp, #8 + 8036f04: af00 add r7, sp, #0 + 8036f06: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif_set_down: invalid netif", netif != NULL, return); - 8036ed8: 687b ldr r3, [r7, #4] - 8036eda: 2b00 cmp r3, #0 - 8036edc: d107 bne.n 8036eee - 8036ede: 4b16 ldr r3, [pc, #88] ; (8036f38 ) - 8036ee0: f240 329b movw r2, #923 ; 0x39b - 8036ee4: 4915 ldr r1, [pc, #84] ; (8036f3c ) - 8036ee6: 4816 ldr r0, [pc, #88] ; (8036f40 ) - 8036ee8: f009 fdfa bl 8040ae0 - 8036eec: e021 b.n 8036f32 + 8036f08: 687b ldr r3, [r7, #4] + 8036f0a: 2b00 cmp r3, #0 + 8036f0c: d107 bne.n 8036f1e + 8036f0e: 4b16 ldr r3, [pc, #88] ; (8036f68 ) + 8036f10: f240 329b movw r2, #923 ; 0x39b + 8036f14: 4915 ldr r1, [pc, #84] ; (8036f6c ) + 8036f16: 4816 ldr r0, [pc, #88] ; (8036f70 ) + 8036f18: f009 fdfa bl 8040b10 + 8036f1c: e021 b.n 8036f62 if (netif->flags & NETIF_FLAG_UP) { - 8036eee: 687b ldr r3, [r7, #4] - 8036ef0: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036ef4: f003 0301 and.w r3, r3, #1 - 8036ef8: 2b00 cmp r3, #0 - 8036efa: d01a beq.n 8036f32 + 8036f1e: 687b ldr r3, [r7, #4] + 8036f20: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036f24: f003 0301 and.w r3, r3, #1 + 8036f28: 2b00 cmp r3, #0 + 8036f2a: d01a beq.n 8036f62 args.status_changed.state = 0; netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args); } #endif netif_clear_flags(netif, NETIF_FLAG_UP); - 8036efc: 687b ldr r3, [r7, #4] - 8036efe: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036f02: f023 0301 bic.w r3, r3, #1 - 8036f06: b2da uxtb r2, r3 - 8036f08: 687b ldr r3, [r7, #4] - 8036f0a: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8036f2c: 687b ldr r3, [r7, #4] + 8036f2e: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036f32: f023 0301 bic.w r3, r3, #1 + 8036f36: b2da uxtb r2, r3 + 8036f38: 687b ldr r3, [r7, #4] + 8036f3a: f883 2031 strb.w r2, [r3, #49] ; 0x31 MIB2_COPY_SYSUPTIME_TO(&netif->ts); #if LWIP_IPV4 && LWIP_ARP if (netif->flags & NETIF_FLAG_ETHARP) { - 8036f0e: 687b ldr r3, [r7, #4] - 8036f10: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036f14: f003 0308 and.w r3, r3, #8 - 8036f18: 2b00 cmp r3, #0 - 8036f1a: d002 beq.n 8036f22 + 8036f3e: 687b ldr r3, [r7, #4] + 8036f40: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036f44: f003 0308 and.w r3, r3, #8 + 8036f48: 2b00 cmp r3, #0 + 8036f4a: d002 beq.n 8036f52 etharp_cleanup_netif(netif); - 8036f1c: 6878 ldr r0, [r7, #4] - 8036f1e: f007 fc97 bl 803e850 + 8036f4c: 6878 ldr r0, [r7, #4] + 8036f4e: f007 fc97 bl 803e880 #if LWIP_IPV6 nd6_cleanup_netif(netif); #endif /* LWIP_IPV6 */ NETIF_STATUS_CALLBACK(netif); - 8036f22: 687b ldr r3, [r7, #4] - 8036f24: 69db ldr r3, [r3, #28] - 8036f26: 2b00 cmp r3, #0 - 8036f28: d003 beq.n 8036f32 - 8036f2a: 687b ldr r3, [r7, #4] - 8036f2c: 69db ldr r3, [r3, #28] - 8036f2e: 6878 ldr r0, [r7, #4] - 8036f30: 4798 blx r3 - } -} - 8036f32: 3708 adds r7, #8 - 8036f34: 46bd mov sp, r7 - 8036f36: bd80 pop {r7, pc} - 8036f38: 08042638 .word 0x08042638 - 8036f3c: 08042800 .word 0x08042800 - 8036f40: 08042688 .word 0x08042688 - -08036f44 : + 8036f52: 687b ldr r3, [r7, #4] + 8036f54: 69db ldr r3, [r3, #28] + 8036f56: 2b00 cmp r3, #0 + 8036f58: d003 beq.n 8036f62 + 8036f5a: 687b ldr r3, [r7, #4] + 8036f5c: 69db ldr r3, [r3, #28] + 8036f5e: 6878 ldr r0, [r7, #4] + 8036f60: 4798 blx r3 + } +} + 8036f62: 3708 adds r7, #8 + 8036f64: 46bd mov sp, r7 + 8036f66: bd80 pop {r7, pc} + 8036f68: 08042668 .word 0x08042668 + 8036f6c: 08042830 .word 0x08042830 + 8036f70: 080426b8 .word 0x080426b8 + +08036f74 : * @ingroup netif * Called by a driver when its link goes up */ void netif_set_link_up(struct netif *netif) { - 8036f44: b580 push {r7, lr} - 8036f46: b082 sub sp, #8 - 8036f48: af00 add r7, sp, #0 - 8036f4a: 6078 str r0, [r7, #4] + 8036f74: b580 push {r7, lr} + 8036f76: b082 sub sp, #8 + 8036f78: af00 add r7, sp, #0 + 8036f7a: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif_set_link_up: invalid netif", netif != NULL, return); - 8036f4c: 687b ldr r3, [r7, #4] - 8036f4e: 2b00 cmp r3, #0 - 8036f50: d107 bne.n 8036f62 - 8036f52: 4b13 ldr r3, [pc, #76] ; (8036fa0 ) - 8036f54: f44f 7278 mov.w r2, #992 ; 0x3e0 - 8036f58: 4912 ldr r1, [pc, #72] ; (8036fa4 ) - 8036f5a: 4813 ldr r0, [pc, #76] ; (8036fa8 ) - 8036f5c: f009 fdc0 bl 8040ae0 - 8036f60: e01b b.n 8036f9a + 8036f7c: 687b ldr r3, [r7, #4] + 8036f7e: 2b00 cmp r3, #0 + 8036f80: d107 bne.n 8036f92 + 8036f82: 4b13 ldr r3, [pc, #76] ; (8036fd0 ) + 8036f84: f44f 7278 mov.w r2, #992 ; 0x3e0 + 8036f88: 4912 ldr r1, [pc, #72] ; (8036fd4 ) + 8036f8a: 4813 ldr r0, [pc, #76] ; (8036fd8 ) + 8036f8c: f009 fdc0 bl 8040b10 + 8036f90: e01b b.n 8036fca if (!(netif->flags & NETIF_FLAG_LINK_UP)) { - 8036f62: 687b ldr r3, [r7, #4] - 8036f64: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036f68: f003 0304 and.w r3, r3, #4 - 8036f6c: 2b00 cmp r3, #0 - 8036f6e: d114 bne.n 8036f9a + 8036f92: 687b ldr r3, [r7, #4] + 8036f94: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036f98: f003 0304 and.w r3, r3, #4 + 8036f9c: 2b00 cmp r3, #0 + 8036f9e: d114 bne.n 8036fca netif_set_flags(netif, NETIF_FLAG_LINK_UP); - 8036f70: 687b ldr r3, [r7, #4] - 8036f72: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036f76: f043 0304 orr.w r3, r3, #4 - 8036f7a: b2da uxtb r2, r3 - 8036f7c: 687b ldr r3, [r7, #4] - 8036f7e: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8036fa0: 687b ldr r3, [r7, #4] + 8036fa2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036fa6: f043 0304 orr.w r3, r3, #4 + 8036faa: b2da uxtb r2, r3 + 8036fac: 687b ldr r3, [r7, #4] + 8036fae: f883 2031 strb.w r2, [r3, #49] ; 0x31 #if LWIP_AUTOIP autoip_network_changed(netif); #endif /* LWIP_AUTOIP */ netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6); - 8036f82: 2103 movs r1, #3 - 8036f84: 6878 ldr r0, [r7, #4] - 8036f86: f7ff ff63 bl 8036e50 + 8036fb2: 2103 movs r1, #3 + 8036fb4: 6878 ldr r0, [r7, #4] + 8036fb6: f7ff ff63 bl 8036e80 #if LWIP_IPV6 nd6_restart_netif(netif); #endif /* LWIP_IPV6 */ NETIF_LINK_CALLBACK(netif); - 8036f8a: 687b ldr r3, [r7, #4] - 8036f8c: 6a1b ldr r3, [r3, #32] - 8036f8e: 2b00 cmp r3, #0 - 8036f90: d003 beq.n 8036f9a - 8036f92: 687b ldr r3, [r7, #4] - 8036f94: 6a1b ldr r3, [r3, #32] - 8036f96: 6878 ldr r0, [r7, #4] - 8036f98: 4798 blx r3 + 8036fba: 687b ldr r3, [r7, #4] + 8036fbc: 6a1b ldr r3, [r3, #32] + 8036fbe: 2b00 cmp r3, #0 + 8036fc0: d003 beq.n 8036fca + 8036fc2: 687b ldr r3, [r7, #4] + 8036fc4: 6a1b ldr r3, [r3, #32] + 8036fc6: 6878 ldr r0, [r7, #4] + 8036fc8: 4798 blx r3 args.link_changed.state = 1; netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args); } #endif } } - 8036f9a: 3708 adds r7, #8 - 8036f9c: 46bd mov sp, r7 - 8036f9e: bd80 pop {r7, pc} - 8036fa0: 08042638 .word 0x08042638 - 8036fa4: 08042820 .word 0x08042820 - 8036fa8: 08042688 .word 0x08042688 + 8036fca: 3708 adds r7, #8 + 8036fcc: 46bd mov sp, r7 + 8036fce: bd80 pop {r7, pc} + 8036fd0: 08042668 .word 0x08042668 + 8036fd4: 08042850 .word 0x08042850 + 8036fd8: 080426b8 .word 0x080426b8 -08036fac : +08036fdc : * @ingroup netif * Called by a driver when its link goes down */ void netif_set_link_down(struct netif *netif) { - 8036fac: b580 push {r7, lr} - 8036fae: b082 sub sp, #8 - 8036fb0: af00 add r7, sp, #0 - 8036fb2: 6078 str r0, [r7, #4] + 8036fdc: b580 push {r7, lr} + 8036fde: b082 sub sp, #8 + 8036fe0: af00 add r7, sp, #0 + 8036fe2: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif_set_link_down: invalid netif", netif != NULL, return); - 8036fb4: 687b ldr r3, [r7, #4] - 8036fb6: 2b00 cmp r3, #0 - 8036fb8: d107 bne.n 8036fca - 8036fba: 4b11 ldr r3, [pc, #68] ; (8037000 ) - 8036fbc: f240 4206 movw r2, #1030 ; 0x406 - 8036fc0: 4910 ldr r1, [pc, #64] ; (8037004 ) - 8036fc2: 4811 ldr r0, [pc, #68] ; (8037008 ) - 8036fc4: f009 fd8c bl 8040ae0 - 8036fc8: e017 b.n 8036ffa + 8036fe4: 687b ldr r3, [r7, #4] + 8036fe6: 2b00 cmp r3, #0 + 8036fe8: d107 bne.n 8036ffa + 8036fea: 4b11 ldr r3, [pc, #68] ; (8037030 ) + 8036fec: f240 4206 movw r2, #1030 ; 0x406 + 8036ff0: 4910 ldr r1, [pc, #64] ; (8037034 ) + 8036ff2: 4811 ldr r0, [pc, #68] ; (8037038 ) + 8036ff4: f009 fd8c bl 8040b10 + 8036ff8: e017 b.n 803702a if (netif->flags & NETIF_FLAG_LINK_UP) { - 8036fca: 687b ldr r3, [r7, #4] - 8036fcc: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036fd0: f003 0304 and.w r3, r3, #4 - 8036fd4: 2b00 cmp r3, #0 - 8036fd6: d010 beq.n 8036ffa + 8036ffa: 687b ldr r3, [r7, #4] + 8036ffc: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8037000: f003 0304 and.w r3, r3, #4 + 8037004: 2b00 cmp r3, #0 + 8037006: d010 beq.n 803702a netif_clear_flags(netif, NETIF_FLAG_LINK_UP); - 8036fd8: 687b ldr r3, [r7, #4] - 8036fda: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036fde: f023 0304 bic.w r3, r3, #4 - 8036fe2: b2da uxtb r2, r3 - 8036fe4: 687b ldr r3, [r7, #4] - 8036fe6: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8037008: 687b ldr r3, [r7, #4] + 803700a: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803700e: f023 0304 bic.w r3, r3, #4 + 8037012: b2da uxtb r2, r3 + 8037014: 687b ldr r3, [r7, #4] + 8037016: f883 2031 strb.w r2, [r3, #49] ; 0x31 NETIF_LINK_CALLBACK(netif); - 8036fea: 687b ldr r3, [r7, #4] - 8036fec: 6a1b ldr r3, [r3, #32] - 8036fee: 2b00 cmp r3, #0 - 8036ff0: d003 beq.n 8036ffa - 8036ff2: 687b ldr r3, [r7, #4] - 8036ff4: 6a1b ldr r3, [r3, #32] - 8036ff6: 6878 ldr r0, [r7, #4] - 8036ff8: 4798 blx r3 + 803701a: 687b ldr r3, [r7, #4] + 803701c: 6a1b ldr r3, [r3, #32] + 803701e: 2b00 cmp r3, #0 + 8037020: d003 beq.n 803702a + 8037022: 687b ldr r3, [r7, #4] + 8037024: 6a1b ldr r3, [r3, #32] + 8037026: 6878 ldr r0, [r7, #4] + 8037028: 4798 blx r3 args.link_changed.state = 0; netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args); } #endif } } - 8036ffa: 3708 adds r7, #8 - 8036ffc: 46bd mov sp, r7 - 8036ffe: bd80 pop {r7, pc} - 8037000: 08042638 .word 0x08042638 - 8037004: 08042844 .word 0x08042844 - 8037008: 08042688 .word 0x08042688 + 803702a: 3708 adds r7, #8 + 803702c: 46bd mov sp, r7 + 803702e: bd80 pop {r7, pc} + 8037030: 08042668 .word 0x08042668 + 8037034: 08042874 .word 0x08042874 + 8037038: 080426b8 .word 0x080426b8 -0803700c : +0803703c : * @ingroup netif * Set callback to be called when link is brought up/down */ void netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback) { - 803700c: b480 push {r7} - 803700e: b083 sub sp, #12 - 8037010: af00 add r7, sp, #0 - 8037012: 6078 str r0, [r7, #4] - 8037014: 6039 str r1, [r7, #0] + 803703c: b480 push {r7} + 803703e: b083 sub sp, #12 + 8037040: af00 add r7, sp, #0 + 8037042: 6078 str r0, [r7, #4] + 8037044: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if (netif) { - 8037016: 687b ldr r3, [r7, #4] - 8037018: 2b00 cmp r3, #0 - 803701a: d002 beq.n 8037022 + 8037046: 687b ldr r3, [r7, #4] + 8037048: 2b00 cmp r3, #0 + 803704a: d002 beq.n 8037052 netif->link_callback = link_callback; - 803701c: 687b ldr r3, [r7, #4] - 803701e: 683a ldr r2, [r7, #0] - 8037020: 621a str r2, [r3, #32] + 803704c: 687b ldr r3, [r7, #4] + 803704e: 683a ldr r2, [r7, #0] + 8037050: 621a str r2, [r3, #32] } } - 8037022: bf00 nop - 8037024: 370c adds r7, #12 - 8037026: 46bd mov sp, r7 - 8037028: f85d 7b04 ldr.w r7, [sp], #4 - 803702c: 4770 bx lr + 8037052: bf00 nop + 8037054: 370c adds r7, #12 + 8037056: 46bd mov sp, r7 + 8037058: f85d 7b04 ldr.w r7, [sp], #4 + 803705c: 4770 bx lr -0803702e : +0803705e : #if LWIP_IPV4 /** Dummy IPv4 output function for netifs not supporting IPv4 */ static err_t netif_null_output_ip4(struct netif *netif, struct pbuf *p, const ip4_addr_t *ipaddr) { - 803702e: b480 push {r7} - 8037030: b085 sub sp, #20 - 8037032: af00 add r7, sp, #0 - 8037034: 60f8 str r0, [r7, #12] - 8037036: 60b9 str r1, [r7, #8] - 8037038: 607a str r2, [r7, #4] + 803705e: b480 push {r7} + 8037060: b085 sub sp, #20 + 8037062: af00 add r7, sp, #0 + 8037064: 60f8 str r0, [r7, #12] + 8037066: 60b9 str r1, [r7, #8] + 8037068: 607a str r2, [r7, #4] LWIP_UNUSED_ARG(netif); LWIP_UNUSED_ARG(p); LWIP_UNUSED_ARG(ipaddr); return ERR_IF; - 803703a: f06f 030b mvn.w r3, #11 + 803706a: f06f 030b mvn.w r3, #11 } - 803703e: 4618 mov r0, r3 - 8037040: 3714 adds r7, #20 - 8037042: 46bd mov sp, r7 - 8037044: f85d 7b04 ldr.w r7, [sp], #4 - 8037048: 4770 bx lr + 803706e: 4618 mov r0, r3 + 8037070: 3714 adds r7, #20 + 8037072: 46bd mov sp, r7 + 8037074: f85d 7b04 ldr.w r7, [sp], #4 + 8037078: 4770 bx lr ... -0803704c : +0803707c : * * @param idx index of netif to find */ struct netif * netif_get_by_index(u8_t idx) { - 803704c: b480 push {r7} - 803704e: b085 sub sp, #20 - 8037050: af00 add r7, sp, #0 - 8037052: 4603 mov r3, r0 - 8037054: 71fb strb r3, [r7, #7] + 803707c: b480 push {r7} + 803707e: b085 sub sp, #20 + 8037080: af00 add r7, sp, #0 + 8037082: 4603 mov r3, r0 + 8037084: 71fb strb r3, [r7, #7] struct netif *netif; LWIP_ASSERT_CORE_LOCKED(); if (idx != NETIF_NO_INDEX) { - 8037056: 79fb ldrb r3, [r7, #7] - 8037058: 2b00 cmp r3, #0 - 803705a: d013 beq.n 8037084 + 8037086: 79fb ldrb r3, [r7, #7] + 8037088: 2b00 cmp r3, #0 + 803708a: d013 beq.n 80370b4 NETIF_FOREACH(netif) { - 803705c: 4b0d ldr r3, [pc, #52] ; (8037094 ) - 803705e: 681b ldr r3, [r3, #0] - 8037060: 60fb str r3, [r7, #12] - 8037062: e00c b.n 803707e + 803708c: 4b0d ldr r3, [pc, #52] ; (80370c4 ) + 803708e: 681b ldr r3, [r3, #0] + 8037090: 60fb str r3, [r7, #12] + 8037092: e00c b.n 80370ae if (idx == netif_get_index(netif)) { - 8037064: 68fb ldr r3, [r7, #12] - 8037066: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 803706a: 3301 adds r3, #1 - 803706c: b2db uxtb r3, r3 - 803706e: 79fa ldrb r2, [r7, #7] - 8037070: 429a cmp r2, r3 - 8037072: d101 bne.n 8037078 + 8037094: 68fb ldr r3, [r7, #12] + 8037096: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 803709a: 3301 adds r3, #1 + 803709c: b2db uxtb r3, r3 + 803709e: 79fa ldrb r2, [r7, #7] + 80370a0: 429a cmp r2, r3 + 80370a2: d101 bne.n 80370a8 return netif; /* found! */ - 8037074: 68fb ldr r3, [r7, #12] - 8037076: e006 b.n 8037086 + 80370a4: 68fb ldr r3, [r7, #12] + 80370a6: e006 b.n 80370b6 NETIF_FOREACH(netif) { - 8037078: 68fb ldr r3, [r7, #12] - 803707a: 681b ldr r3, [r3, #0] - 803707c: 60fb str r3, [r7, #12] - 803707e: 68fb ldr r3, [r7, #12] - 8037080: 2b00 cmp r3, #0 - 8037082: d1ef bne.n 8037064 + 80370a8: 68fb ldr r3, [r7, #12] + 80370aa: 681b ldr r3, [r3, #0] + 80370ac: 60fb str r3, [r7, #12] + 80370ae: 68fb ldr r3, [r7, #12] + 80370b0: 2b00 cmp r3, #0 + 80370b2: d1ef bne.n 8037094 } } } return NULL; - 8037084: 2300 movs r3, #0 + 80370b4: 2300 movs r3, #0 } - 8037086: 4618 mov r0, r3 - 8037088: 3714 adds r7, #20 - 803708a: 46bd mov sp, r7 - 803708c: f85d 7b04 ldr.w r7, [sp], #4 - 8037090: 4770 bx lr - 8037092: bf00 nop - 8037094: 2400e94c .word 0x2400e94c + 80370b6: 4618 mov r0, r3 + 80370b8: 3714 adds r7, #20 + 80370ba: 46bd mov sp, r7 + 80370bc: f85d 7b04 ldr.w r7, [sp], #4 + 80370c0: 4770 bx lr + 80370c2: bf00 nop + 80370c4: 2400e94c .word 0x2400e94c -08037098 : +080370c8 : #if !NO_SYS static #endif /* !NO_SYS */ void pbuf_free_ooseq(void) { - 8037098: b580 push {r7, lr} - 803709a: b082 sub sp, #8 - 803709c: af00 add r7, sp, #0 + 80370c8: b580 push {r7, lr} + 80370ca: b082 sub sp, #8 + 80370cc: af00 add r7, sp, #0 struct tcp_pcb *pcb; SYS_ARCH_SET(pbuf_free_ooseq_pending, 0); - 803709e: 4b0c ldr r3, [pc, #48] ; (80370d0 ) - 80370a0: 2200 movs r2, #0 - 80370a2: 701a strb r2, [r3, #0] + 80370ce: 4b0c ldr r3, [pc, #48] ; (8037100 ) + 80370d0: 2200 movs r2, #0 + 80370d2: 701a strb r2, [r3, #0] for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) { - 80370a4: 4b0b ldr r3, [pc, #44] ; (80370d4 ) - 80370a6: 681b ldr r3, [r3, #0] - 80370a8: 607b str r3, [r7, #4] - 80370aa: e00a b.n 80370c2 + 80370d4: 4b0b ldr r3, [pc, #44] ; (8037104 ) + 80370d6: 681b ldr r3, [r3, #0] + 80370d8: 607b str r3, [r7, #4] + 80370da: e00a b.n 80370f2 if (pcb->ooseq != NULL) { - 80370ac: 687b ldr r3, [r7, #4] - 80370ae: 6f5b ldr r3, [r3, #116] ; 0x74 - 80370b0: 2b00 cmp r3, #0 - 80370b2: d003 beq.n 80370bc + 80370dc: 687b ldr r3, [r7, #4] + 80370de: 6f5b ldr r3, [r3, #116] ; 0x74 + 80370e0: 2b00 cmp r3, #0 + 80370e2: d003 beq.n 80370ec /** Free the ooseq pbufs of one PCB only */ LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n")); tcp_free_ooseq(pcb); - 80370b4: 6878 ldr r0, [r7, #4] - 80370b6: f002 fba1 bl 80397fc + 80370e4: 6878 ldr r0, [r7, #4] + 80370e6: f002 fba1 bl 803982c return; - 80370ba: e005 b.n 80370c8 + 80370ea: e005 b.n 80370f8 for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) { - 80370bc: 687b ldr r3, [r7, #4] - 80370be: 68db ldr r3, [r3, #12] - 80370c0: 607b str r3, [r7, #4] - 80370c2: 687b ldr r3, [r7, #4] - 80370c4: 2b00 cmp r3, #0 - 80370c6: d1f1 bne.n 80370ac + 80370ec: 687b ldr r3, [r7, #4] + 80370ee: 68db ldr r3, [r3, #12] + 80370f0: 607b str r3, [r7, #4] + 80370f2: 687b ldr r3, [r7, #4] + 80370f4: 2b00 cmp r3, #0 + 80370f6: d1f1 bne.n 80370dc } } } - 80370c8: 3708 adds r7, #8 - 80370ca: 46bd mov sp, r7 - 80370cc: bd80 pop {r7, pc} - 80370ce: bf00 nop - 80370d0: 2400e955 .word 0x2400e955 - 80370d4: 2400e964 .word 0x2400e964 + 80370f8: 3708 adds r7, #8 + 80370fa: 46bd mov sp, r7 + 80370fc: bd80 pop {r7, pc} + 80370fe: bf00 nop + 8037100: 2400e955 .word 0x2400e955 + 8037104: 2400e964 .word 0x2400e964 -080370d8 : +08037108 : #endif /* !NO_SYS */ /** Queue a call to pbuf_free_ooseq if not already queued. */ static void pbuf_pool_is_empty(void) { - 80370d8: b480 push {r7} - 80370da: af00 add r7, sp, #0 + 8037108: b480 push {r7} + 803710a: af00 add r7, sp, #0 #ifndef PBUF_POOL_FREE_OOSEQ_QUEUE_CALL SYS_ARCH_SET(pbuf_free_ooseq_pending, 1); - 80370dc: 4b03 ldr r3, [pc, #12] ; (80370ec ) - 80370de: 2201 movs r2, #1 - 80370e0: 701a strb r2, [r3, #0] + 803710c: 4b03 ldr r3, [pc, #12] ; (803711c ) + 803710e: 2201 movs r2, #1 + 8037110: 701a strb r2, [r3, #0] if (!queued) { /* queue a call to pbuf_free_ooseq if not already queued */ PBUF_POOL_FREE_OOSEQ_QUEUE_CALL(); } #endif /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */ } - 80370e2: bf00 nop - 80370e4: 46bd mov sp, r7 - 80370e6: f85d 7b04 ldr.w r7, [sp], #4 - 80370ea: 4770 bx lr - 80370ec: 2400e955 .word 0x2400e955 + 8037112: bf00 nop + 8037114: 46bd mov sp, r7 + 8037116: f85d 7b04 ldr.w r7, [sp], #4 + 803711a: 4770 bx lr + 803711c: 2400e955 .word 0x2400e955 -080370f0 : +08037120 : #endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || !PBUF_POOL_FREE_OOSEQ */ /* Initialize members of struct pbuf after allocation */ static void pbuf_init_alloced_pbuf(struct pbuf *p, void *payload, u16_t tot_len, u16_t len, pbuf_type type, u8_t flags) { - 80370f0: b480 push {r7} - 80370f2: b085 sub sp, #20 - 80370f4: af00 add r7, sp, #0 - 80370f6: 60f8 str r0, [r7, #12] - 80370f8: 60b9 str r1, [r7, #8] - 80370fa: 4611 mov r1, r2 - 80370fc: 461a mov r2, r3 - 80370fe: 460b mov r3, r1 - 8037100: 80fb strh r3, [r7, #6] - 8037102: 4613 mov r3, r2 - 8037104: 80bb strh r3, [r7, #4] + 8037120: b480 push {r7} + 8037122: b085 sub sp, #20 + 8037124: af00 add r7, sp, #0 + 8037126: 60f8 str r0, [r7, #12] + 8037128: 60b9 str r1, [r7, #8] + 803712a: 4611 mov r1, r2 + 803712c: 461a mov r2, r3 + 803712e: 460b mov r3, r1 + 8037130: 80fb strh r3, [r7, #6] + 8037132: 4613 mov r3, r2 + 8037134: 80bb strh r3, [r7, #4] p->next = NULL; - 8037106: 68fb ldr r3, [r7, #12] - 8037108: 2200 movs r2, #0 - 803710a: 601a str r2, [r3, #0] + 8037136: 68fb ldr r3, [r7, #12] + 8037138: 2200 movs r2, #0 + 803713a: 601a str r2, [r3, #0] p->payload = payload; - 803710c: 68fb ldr r3, [r7, #12] - 803710e: 68ba ldr r2, [r7, #8] - 8037110: 605a str r2, [r3, #4] + 803713c: 68fb ldr r3, [r7, #12] + 803713e: 68ba ldr r2, [r7, #8] + 8037140: 605a str r2, [r3, #4] p->tot_len = tot_len; - 8037112: 68fb ldr r3, [r7, #12] - 8037114: 88fa ldrh r2, [r7, #6] - 8037116: 811a strh r2, [r3, #8] + 8037142: 68fb ldr r3, [r7, #12] + 8037144: 88fa ldrh r2, [r7, #6] + 8037146: 811a strh r2, [r3, #8] p->len = len; - 8037118: 68fb ldr r3, [r7, #12] - 803711a: 88ba ldrh r2, [r7, #4] - 803711c: 815a strh r2, [r3, #10] + 8037148: 68fb ldr r3, [r7, #12] + 803714a: 88ba ldrh r2, [r7, #4] + 803714c: 815a strh r2, [r3, #10] p->type_internal = (u8_t)type; - 803711e: 8b3b ldrh r3, [r7, #24] - 8037120: b2da uxtb r2, r3 - 8037122: 68fb ldr r3, [r7, #12] - 8037124: 731a strb r2, [r3, #12] + 803714e: 8b3b ldrh r3, [r7, #24] + 8037150: b2da uxtb r2, r3 + 8037152: 68fb ldr r3, [r7, #12] + 8037154: 731a strb r2, [r3, #12] p->flags = flags; - 8037126: 68fb ldr r3, [r7, #12] - 8037128: 7f3a ldrb r2, [r7, #28] - 803712a: 735a strb r2, [r3, #13] + 8037156: 68fb ldr r3, [r7, #12] + 8037158: 7f3a ldrb r2, [r7, #28] + 803715a: 735a strb r2, [r3, #13] p->ref = 1; - 803712c: 68fb ldr r3, [r7, #12] - 803712e: 2201 movs r2, #1 - 8037130: 739a strb r2, [r3, #14] + 803715c: 68fb ldr r3, [r7, #12] + 803715e: 2201 movs r2, #1 + 8037160: 739a strb r2, [r3, #14] p->if_idx = NETIF_NO_INDEX; - 8037132: 68fb ldr r3, [r7, #12] - 8037134: 2200 movs r2, #0 - 8037136: 73da strb r2, [r3, #15] + 8037162: 68fb ldr r3, [r7, #12] + 8037164: 2200 movs r2, #0 + 8037166: 73da strb r2, [r3, #15] } - 8037138: bf00 nop - 803713a: 3714 adds r7, #20 - 803713c: 46bd mov sp, r7 - 803713e: f85d 7b04 ldr.w r7, [sp], #4 - 8037142: 4770 bx lr + 8037168: bf00 nop + 803716a: 3714 adds r7, #20 + 803716c: 46bd mov sp, r7 + 803716e: f85d 7b04 ldr.w r7, [sp], #4 + 8037172: 4770 bx lr -08037144 : +08037174 : * @return the allocated pbuf. If multiple pbufs where allocated, this * is the first pbuf of a pbuf chain. */ struct pbuf * pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type) { - 8037144: b580 push {r7, lr} - 8037146: b08c sub sp, #48 ; 0x30 - 8037148: af02 add r7, sp, #8 - 803714a: 4603 mov r3, r0 - 803714c: 71fb strb r3, [r7, #7] - 803714e: 460b mov r3, r1 - 8037150: 80bb strh r3, [r7, #4] - 8037152: 4613 mov r3, r2 - 8037154: 807b strh r3, [r7, #2] + 8037174: b580 push {r7, lr} + 8037176: b08c sub sp, #48 ; 0x30 + 8037178: af02 add r7, sp, #8 + 803717a: 4603 mov r3, r0 + 803717c: 71fb strb r3, [r7, #7] + 803717e: 460b mov r3, r1 + 8037180: 80bb strh r3, [r7, #4] + 8037182: 4613 mov r3, r2 + 8037184: 807b strh r3, [r7, #2] struct pbuf *p; u16_t offset = (u16_t)layer; - 8037156: 79fb ldrb r3, [r7, #7] - 8037158: 847b strh r3, [r7, #34] ; 0x22 + 8037186: 79fb ldrb r3, [r7, #7] + 8037188: 847b strh r3, [r7, #34] ; 0x22 LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length)); switch (type) { - 803715a: 887b ldrh r3, [r7, #2] - 803715c: f5b3 7f20 cmp.w r3, #640 ; 0x280 - 8037160: d07f beq.n 8037262 - 8037162: f5b3 7f20 cmp.w r3, #640 ; 0x280 - 8037166: f300 80c8 bgt.w 80372fa - 803716a: f5b3 7fc1 cmp.w r3, #386 ; 0x182 - 803716e: d010 beq.n 8037192 - 8037170: f5b3 7fc1 cmp.w r3, #386 ; 0x182 - 8037174: f300 80c1 bgt.w 80372fa - 8037178: 2b01 cmp r3, #1 - 803717a: d002 beq.n 8037182 - 803717c: 2b41 cmp r3, #65 ; 0x41 - 803717e: f040 80bc bne.w 80372fa + 803718a: 887b ldrh r3, [r7, #2] + 803718c: f5b3 7f20 cmp.w r3, #640 ; 0x280 + 8037190: d07f beq.n 8037292 + 8037192: f5b3 7f20 cmp.w r3, #640 ; 0x280 + 8037196: f300 80c8 bgt.w 803732a + 803719a: f5b3 7fc1 cmp.w r3, #386 ; 0x182 + 803719e: d010 beq.n 80371c2 + 80371a0: f5b3 7fc1 cmp.w r3, #386 ; 0x182 + 80371a4: f300 80c1 bgt.w 803732a + 80371a8: 2b01 cmp r3, #1 + 80371aa: d002 beq.n 80371b2 + 80371ac: 2b41 cmp r3, #65 ; 0x41 + 80371ae: f040 80bc bne.w 803732a case PBUF_REF: /* fall through */ case PBUF_ROM: p = pbuf_alloc_reference(NULL, length, type); - 8037182: 887a ldrh r2, [r7, #2] - 8037184: 88bb ldrh r3, [r7, #4] - 8037186: 4619 mov r1, r3 - 8037188: 2000 movs r0, #0 - 803718a: f000 f8d1 bl 8037330 - 803718e: 6278 str r0, [r7, #36] ; 0x24 + 80371b2: 887a ldrh r2, [r7, #2] + 80371b4: 88bb ldrh r3, [r7, #4] + 80371b6: 4619 mov r1, r3 + 80371b8: 2000 movs r0, #0 + 80371ba: f000 f8d1 bl 8037360 + 80371be: 6278 str r0, [r7, #36] ; 0x24 break; - 8037190: e0bd b.n 803730e + 80371c0: e0bd b.n 803733e case PBUF_POOL: { struct pbuf *q, *last; u16_t rem_len; /* remaining length */ p = NULL; - 8037192: 2300 movs r3, #0 - 8037194: 627b str r3, [r7, #36] ; 0x24 + 80371c2: 2300 movs r3, #0 + 80371c4: 627b str r3, [r7, #36] ; 0x24 last = NULL; - 8037196: 2300 movs r3, #0 - 8037198: 61fb str r3, [r7, #28] + 80371c6: 2300 movs r3, #0 + 80371c8: 61fb str r3, [r7, #28] rem_len = length; - 803719a: 88bb ldrh r3, [r7, #4] - 803719c: 837b strh r3, [r7, #26] + 80371ca: 88bb ldrh r3, [r7, #4] + 80371cc: 837b strh r3, [r7, #26] do { u16_t qlen; q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL); - 803719e: 2008 movs r0, #8 - 80371a0: f7ff fbb2 bl 8036908 - 80371a4: 6138 str r0, [r7, #16] + 80371ce: 2008 movs r0, #8 + 80371d0: f7ff fbb2 bl 8036938 + 80371d4: 6138 str r0, [r7, #16] if (q == NULL) { - 80371a6: 693b ldr r3, [r7, #16] - 80371a8: 2b00 cmp r3, #0 - 80371aa: d109 bne.n 80371c0 + 80371d6: 693b ldr r3, [r7, #16] + 80371d8: 2b00 cmp r3, #0 + 80371da: d109 bne.n 80371f0 PBUF_POOL_IS_EMPTY(); - 80371ac: f7ff ff94 bl 80370d8 + 80371dc: f7ff ff94 bl 8037108 /* free chain so far allocated */ if (p) { - 80371b0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80371b2: 2b00 cmp r3, #0 - 80371b4: d002 beq.n 80371bc + 80371e0: 6a7b ldr r3, [r7, #36] ; 0x24 + 80371e2: 2b00 cmp r3, #0 + 80371e4: d002 beq.n 80371ec pbuf_free(p); - 80371b6: 6a78 ldr r0, [r7, #36] ; 0x24 - 80371b8: f000 faa8 bl 803770c + 80371e6: 6a78 ldr r0, [r7, #36] ; 0x24 + 80371e8: f000 faa8 bl 803773c } /* bail out unsuccessfully */ return NULL; - 80371bc: 2300 movs r3, #0 - 80371be: e0a7 b.n 8037310 + 80371ec: 2300 movs r3, #0 + 80371ee: e0a7 b.n 8037340 } qlen = LWIP_MIN(rem_len, (u16_t)(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset))); - 80371c0: 8c7b ldrh r3, [r7, #34] ; 0x22 - 80371c2: 3303 adds r3, #3 - 80371c4: b29b uxth r3, r3 - 80371c6: f023 0303 bic.w r3, r3, #3 - 80371ca: b29b uxth r3, r3 - 80371cc: f5c3 7314 rsb r3, r3, #592 ; 0x250 - 80371d0: b29b uxth r3, r3 - 80371d2: 8b7a ldrh r2, [r7, #26] - 80371d4: 4293 cmp r3, r2 - 80371d6: bf28 it cs - 80371d8: 4613 movcs r3, r2 - 80371da: 81fb strh r3, [r7, #14] + 80371f0: 8c7b ldrh r3, [r7, #34] ; 0x22 + 80371f2: 3303 adds r3, #3 + 80371f4: b29b uxth r3, r3 + 80371f6: f023 0303 bic.w r3, r3, #3 + 80371fa: b29b uxth r3, r3 + 80371fc: f5c3 7314 rsb r3, r3, #592 ; 0x250 + 8037200: b29b uxth r3, r3 + 8037202: 8b7a ldrh r2, [r7, #26] + 8037204: 4293 cmp r3, r2 + 8037206: bf28 it cs + 8037208: 4613 movcs r3, r2 + 803720a: 81fb strh r3, [r7, #14] pbuf_init_alloced_pbuf(q, LWIP_MEM_ALIGN((void *)((u8_t *)q + SIZEOF_STRUCT_PBUF + offset)), - 80371dc: 8c7b ldrh r3, [r7, #34] ; 0x22 - 80371de: 3310 adds r3, #16 - 80371e0: 693a ldr r2, [r7, #16] - 80371e2: 4413 add r3, r2 - 80371e4: 3303 adds r3, #3 - 80371e6: f023 0303 bic.w r3, r3, #3 - 80371ea: 4618 mov r0, r3 - 80371ec: 89f9 ldrh r1, [r7, #14] - 80371ee: 8b7a ldrh r2, [r7, #26] - 80371f0: 2300 movs r3, #0 - 80371f2: 9301 str r3, [sp, #4] - 80371f4: 887b ldrh r3, [r7, #2] - 80371f6: 9300 str r3, [sp, #0] - 80371f8: 460b mov r3, r1 - 80371fa: 4601 mov r1, r0 - 80371fc: 6938 ldr r0, [r7, #16] - 80371fe: f7ff ff77 bl 80370f0 + 803720c: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803720e: 3310 adds r3, #16 + 8037210: 693a ldr r2, [r7, #16] + 8037212: 4413 add r3, r2 + 8037214: 3303 adds r3, #3 + 8037216: f023 0303 bic.w r3, r3, #3 + 803721a: 4618 mov r0, r3 + 803721c: 89f9 ldrh r1, [r7, #14] + 803721e: 8b7a ldrh r2, [r7, #26] + 8037220: 2300 movs r3, #0 + 8037222: 9301 str r3, [sp, #4] + 8037224: 887b ldrh r3, [r7, #2] + 8037226: 9300 str r3, [sp, #0] + 8037228: 460b mov r3, r1 + 803722a: 4601 mov r1, r0 + 803722c: 6938 ldr r0, [r7, #16] + 803722e: f7ff ff77 bl 8037120 rem_len, qlen, type, 0); LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned", - 8037202: 693b ldr r3, [r7, #16] - 8037204: 685b ldr r3, [r3, #4] - 8037206: f003 0303 and.w r3, r3, #3 - 803720a: 2b00 cmp r3, #0 - 803720c: d006 beq.n 803721c - 803720e: 4b42 ldr r3, [pc, #264] ; (8037318 ) - 8037210: f44f 7280 mov.w r2, #256 ; 0x100 - 8037214: 4941 ldr r1, [pc, #260] ; (803731c ) - 8037216: 4842 ldr r0, [pc, #264] ; (8037320 ) - 8037218: f009 fc62 bl 8040ae0 + 8037232: 693b ldr r3, [r7, #16] + 8037234: 685b ldr r3, [r3, #4] + 8037236: f003 0303 and.w r3, r3, #3 + 803723a: 2b00 cmp r3, #0 + 803723c: d006 beq.n 803724c + 803723e: 4b42 ldr r3, [pc, #264] ; (8037348 ) + 8037240: f44f 7280 mov.w r2, #256 ; 0x100 + 8037244: 4941 ldr r1, [pc, #260] ; (803734c ) + 8037246: 4842 ldr r0, [pc, #264] ; (8037350 ) + 8037248: f009 fc62 bl 8040b10 ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0); LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT", - 803721c: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803721e: 3303 adds r3, #3 - 8037220: f023 0303 bic.w r3, r3, #3 - 8037224: f5b3 7f14 cmp.w r3, #592 ; 0x250 - 8037228: d106 bne.n 8037238 - 803722a: 4b3b ldr r3, [pc, #236] ; (8037318 ) - 803722c: f44f 7281 mov.w r2, #258 ; 0x102 - 8037230: 493c ldr r1, [pc, #240] ; (8037324 ) - 8037232: 483b ldr r0, [pc, #236] ; (8037320 ) - 8037234: f009 fc54 bl 8040ae0 + 803724c: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803724e: 3303 adds r3, #3 + 8037250: f023 0303 bic.w r3, r3, #3 + 8037254: f5b3 7f14 cmp.w r3, #592 ; 0x250 + 8037258: d106 bne.n 8037268 + 803725a: 4b3b ldr r3, [pc, #236] ; (8037348 ) + 803725c: f44f 7281 mov.w r2, #258 ; 0x102 + 8037260: 493c ldr r1, [pc, #240] ; (8037354 ) + 8037262: 483b ldr r0, [pc, #236] ; (8037350 ) + 8037264: f009 fc54 bl 8040b10 (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 ); if (p == NULL) { - 8037238: 6a7b ldr r3, [r7, #36] ; 0x24 - 803723a: 2b00 cmp r3, #0 - 803723c: d102 bne.n 8037244 + 8037268: 6a7b ldr r3, [r7, #36] ; 0x24 + 803726a: 2b00 cmp r3, #0 + 803726c: d102 bne.n 8037274 /* allocated head of pbuf chain (into p) */ p = q; - 803723e: 693b ldr r3, [r7, #16] - 8037240: 627b str r3, [r7, #36] ; 0x24 - 8037242: e002 b.n 803724a + 803726e: 693b ldr r3, [r7, #16] + 8037270: 627b str r3, [r7, #36] ; 0x24 + 8037272: e002 b.n 803727a } else { /* make previous pbuf point to this pbuf */ last->next = q; - 8037244: 69fb ldr r3, [r7, #28] - 8037246: 693a ldr r2, [r7, #16] - 8037248: 601a str r2, [r3, #0] + 8037274: 69fb ldr r3, [r7, #28] + 8037276: 693a ldr r2, [r7, #16] + 8037278: 601a str r2, [r3, #0] } last = q; - 803724a: 693b ldr r3, [r7, #16] - 803724c: 61fb str r3, [r7, #28] + 803727a: 693b ldr r3, [r7, #16] + 803727c: 61fb str r3, [r7, #28] rem_len = (u16_t)(rem_len - qlen); - 803724e: 8b7a ldrh r2, [r7, #26] - 8037250: 89fb ldrh r3, [r7, #14] - 8037252: 1ad3 subs r3, r2, r3 - 8037254: 837b strh r3, [r7, #26] + 803727e: 8b7a ldrh r2, [r7, #26] + 8037280: 89fb ldrh r3, [r7, #14] + 8037282: 1ad3 subs r3, r2, r3 + 8037284: 837b strh r3, [r7, #26] offset = 0; - 8037256: 2300 movs r3, #0 - 8037258: 847b strh r3, [r7, #34] ; 0x22 + 8037286: 2300 movs r3, #0 + 8037288: 847b strh r3, [r7, #34] ; 0x22 } while (rem_len > 0); - 803725a: 8b7b ldrh r3, [r7, #26] - 803725c: 2b00 cmp r3, #0 - 803725e: d19e bne.n 803719e + 803728a: 8b7b ldrh r3, [r7, #26] + 803728c: 2b00 cmp r3, #0 + 803728e: d19e bne.n 80371ce break; - 8037260: e055 b.n 803730e + 8037290: e055 b.n 803733e } case PBUF_RAM: { u16_t payload_len = (u16_t)(LWIP_MEM_ALIGN_SIZE(offset) + LWIP_MEM_ALIGN_SIZE(length)); - 8037262: 8c7b ldrh r3, [r7, #34] ; 0x22 - 8037264: 3303 adds r3, #3 - 8037266: b29b uxth r3, r3 - 8037268: f023 0303 bic.w r3, r3, #3 - 803726c: b29a uxth r2, r3 - 803726e: 88bb ldrh r3, [r7, #4] - 8037270: 3303 adds r3, #3 - 8037272: b29b uxth r3, r3 - 8037274: f023 0303 bic.w r3, r3, #3 - 8037278: b29b uxth r3, r3 - 803727a: 4413 add r3, r2 - 803727c: 833b strh r3, [r7, #24] + 8037292: 8c7b ldrh r3, [r7, #34] ; 0x22 + 8037294: 3303 adds r3, #3 + 8037296: b29b uxth r3, r3 + 8037298: f023 0303 bic.w r3, r3, #3 + 803729c: b29a uxth r2, r3 + 803729e: 88bb ldrh r3, [r7, #4] + 80372a0: 3303 adds r3, #3 + 80372a2: b29b uxth r3, r3 + 80372a4: f023 0303 bic.w r3, r3, #3 + 80372a8: b29b uxth r3, r3 + 80372aa: 4413 add r3, r2 + 80372ac: 833b strh r3, [r7, #24] mem_size_t alloc_len = (mem_size_t)(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF) + payload_len); - 803727e: 8b3b ldrh r3, [r7, #24] - 8037280: 3310 adds r3, #16 - 8037282: 82fb strh r3, [r7, #22] + 80372ae: 8b3b ldrh r3, [r7, #24] + 80372b0: 3310 adds r3, #16 + 80372b2: 82fb strh r3, [r7, #22] /* bug #50040: Check for integer overflow when calculating alloc_len */ if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) || - 8037284: 8b3a ldrh r2, [r7, #24] - 8037286: 88bb ldrh r3, [r7, #4] - 8037288: 3303 adds r3, #3 - 803728a: f023 0303 bic.w r3, r3, #3 - 803728e: 429a cmp r2, r3 - 8037290: d306 bcc.n 80372a0 + 80372b4: 8b3a ldrh r2, [r7, #24] + 80372b6: 88bb ldrh r3, [r7, #4] + 80372b8: 3303 adds r3, #3 + 80372ba: f023 0303 bic.w r3, r3, #3 + 80372be: 429a cmp r2, r3 + 80372c0: d306 bcc.n 80372d0 (alloc_len < LWIP_MEM_ALIGN_SIZE(length))) { - 8037292: 8afa ldrh r2, [r7, #22] - 8037294: 88bb ldrh r3, [r7, #4] - 8037296: 3303 adds r3, #3 - 8037298: f023 0303 bic.w r3, r3, #3 + 80372c2: 8afa ldrh r2, [r7, #22] + 80372c4: 88bb ldrh r3, [r7, #4] + 80372c6: 3303 adds r3, #3 + 80372c8: f023 0303 bic.w r3, r3, #3 if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) || - 803729c: 429a cmp r2, r3 - 803729e: d201 bcs.n 80372a4 + 80372cc: 429a cmp r2, r3 + 80372ce: d201 bcs.n 80372d4 return NULL; - 80372a0: 2300 movs r3, #0 - 80372a2: e035 b.n 8037310 + 80372d0: 2300 movs r3, #0 + 80372d2: e035 b.n 8037340 } /* If pbuf is to be allocated in RAM, allocate memory for it. */ p = (struct pbuf *)mem_malloc(alloc_len); - 80372a4: 8afb ldrh r3, [r7, #22] - 80372a6: 4618 mov r0, r3 - 80372a8: f7ff f99e bl 80365e8 - 80372ac: 6278 str r0, [r7, #36] ; 0x24 + 80372d4: 8afb ldrh r3, [r7, #22] + 80372d6: 4618 mov r0, r3 + 80372d8: f7ff f99e bl 8036618 + 80372dc: 6278 str r0, [r7, #36] ; 0x24 if (p == NULL) { - 80372ae: 6a7b ldr r3, [r7, #36] ; 0x24 - 80372b0: 2b00 cmp r3, #0 - 80372b2: d101 bne.n 80372b8 + 80372de: 6a7b ldr r3, [r7, #36] ; 0x24 + 80372e0: 2b00 cmp r3, #0 + 80372e2: d101 bne.n 80372e8 return NULL; - 80372b4: 2300 movs r3, #0 - 80372b6: e02b b.n 8037310 + 80372e4: 2300 movs r3, #0 + 80372e6: e02b b.n 8037340 } pbuf_init_alloced_pbuf(p, LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)), - 80372b8: 8c7b ldrh r3, [r7, #34] ; 0x22 - 80372ba: 3310 adds r3, #16 - 80372bc: 6a7a ldr r2, [r7, #36] ; 0x24 - 80372be: 4413 add r3, r2 - 80372c0: 3303 adds r3, #3 - 80372c2: f023 0303 bic.w r3, r3, #3 - 80372c6: 4618 mov r0, r3 - 80372c8: 88b9 ldrh r1, [r7, #4] - 80372ca: 88ba ldrh r2, [r7, #4] - 80372cc: 2300 movs r3, #0 - 80372ce: 9301 str r3, [sp, #4] - 80372d0: 887b ldrh r3, [r7, #2] - 80372d2: 9300 str r3, [sp, #0] - 80372d4: 460b mov r3, r1 - 80372d6: 4601 mov r1, r0 - 80372d8: 6a78 ldr r0, [r7, #36] ; 0x24 - 80372da: f7ff ff09 bl 80370f0 + 80372e8: 8c7b ldrh r3, [r7, #34] ; 0x22 + 80372ea: 3310 adds r3, #16 + 80372ec: 6a7a ldr r2, [r7, #36] ; 0x24 + 80372ee: 4413 add r3, r2 + 80372f0: 3303 adds r3, #3 + 80372f2: f023 0303 bic.w r3, r3, #3 + 80372f6: 4618 mov r0, r3 + 80372f8: 88b9 ldrh r1, [r7, #4] + 80372fa: 88ba ldrh r2, [r7, #4] + 80372fc: 2300 movs r3, #0 + 80372fe: 9301 str r3, [sp, #4] + 8037300: 887b ldrh r3, [r7, #2] + 8037302: 9300 str r3, [sp, #0] + 8037304: 460b mov r3, r1 + 8037306: 4601 mov r1, r0 + 8037308: 6a78 ldr r0, [r7, #36] ; 0x24 + 803730a: f7ff ff09 bl 8037120 length, length, type, 0); LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned", - 80372de: 6a7b ldr r3, [r7, #36] ; 0x24 - 80372e0: 685b ldr r3, [r3, #4] - 80372e2: f003 0303 and.w r3, r3, #3 - 80372e6: 2b00 cmp r3, #0 - 80372e8: d010 beq.n 803730c - 80372ea: 4b0b ldr r3, [pc, #44] ; (8037318 ) - 80372ec: f44f 7291 mov.w r2, #290 ; 0x122 - 80372f0: 490d ldr r1, [pc, #52] ; (8037328 ) - 80372f2: 480b ldr r0, [pc, #44] ; (8037320 ) - 80372f4: f009 fbf4 bl 8040ae0 + 803730e: 6a7b ldr r3, [r7, #36] ; 0x24 + 8037310: 685b ldr r3, [r3, #4] + 8037312: f003 0303 and.w r3, r3, #3 + 8037316: 2b00 cmp r3, #0 + 8037318: d010 beq.n 803733c + 803731a: 4b0b ldr r3, [pc, #44] ; (8037348 ) + 803731c: f44f 7291 mov.w r2, #290 ; 0x122 + 8037320: 490d ldr r1, [pc, #52] ; (8037358 ) + 8037322: 480b ldr r0, [pc, #44] ; (8037350 ) + 8037324: f009 fbf4 bl 8040b10 ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); break; - 80372f8: e008 b.n 803730c + 8037328: e008 b.n 803733c } default: LWIP_ASSERT("pbuf_alloc: erroneous type", 0); - 80372fa: 4b07 ldr r3, [pc, #28] ; (8037318 ) - 80372fc: f240 1227 movw r2, #295 ; 0x127 - 8037300: 490a ldr r1, [pc, #40] ; (803732c ) - 8037302: 4807 ldr r0, [pc, #28] ; (8037320 ) - 8037304: f009 fbec bl 8040ae0 + 803732a: 4b07 ldr r3, [pc, #28] ; (8037348 ) + 803732c: f240 1227 movw r2, #295 ; 0x127 + 8037330: 490a ldr r1, [pc, #40] ; (803735c ) + 8037332: 4807 ldr r0, [pc, #28] ; (8037350 ) + 8037334: f009 fbec bl 8040b10 return NULL; - 8037308: 2300 movs r3, #0 - 803730a: e001 b.n 8037310 + 8037338: 2300 movs r3, #0 + 803733a: e001 b.n 8037340 break; - 803730c: bf00 nop + 803733c: bf00 nop } LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p)); return p; - 803730e: 6a7b ldr r3, [r7, #36] ; 0x24 -} - 8037310: 4618 mov r0, r3 - 8037312: 3728 adds r7, #40 ; 0x28 - 8037314: 46bd mov sp, r7 - 8037316: bd80 pop {r7, pc} - 8037318: 08042868 .word 0x08042868 - 803731c: 08042898 .word 0x08042898 - 8037320: 080428c8 .word 0x080428c8 - 8037324: 080428f0 .word 0x080428f0 - 8037328: 08042924 .word 0x08042924 - 803732c: 08042950 .word 0x08042950 - -08037330 : + 803733e: 6a7b ldr r3, [r7, #36] ; 0x24 +} + 8037340: 4618 mov r0, r3 + 8037342: 3728 adds r7, #40 ; 0x28 + 8037344: 46bd mov sp, r7 + 8037346: bd80 pop {r7, pc} + 8037348: 08042898 .word 0x08042898 + 803734c: 080428c8 .word 0x080428c8 + 8037350: 080428f8 .word 0x080428f8 + 8037354: 08042920 .word 0x08042920 + 8037358: 08042954 .word 0x08042954 + 803735c: 08042980 .word 0x08042980 + +08037360 : * * @return the allocated pbuf. */ struct pbuf * pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type) { - 8037330: b580 push {r7, lr} - 8037332: b086 sub sp, #24 - 8037334: af02 add r7, sp, #8 - 8037336: 6078 str r0, [r7, #4] - 8037338: 460b mov r3, r1 - 803733a: 807b strh r3, [r7, #2] - 803733c: 4613 mov r3, r2 - 803733e: 803b strh r3, [r7, #0] + 8037360: b580 push {r7, lr} + 8037362: b086 sub sp, #24 + 8037364: af02 add r7, sp, #8 + 8037366: 6078 str r0, [r7, #4] + 8037368: 460b mov r3, r1 + 803736a: 807b strh r3, [r7, #2] + 803736c: 4613 mov r3, r2 + 803736e: 803b strh r3, [r7, #0] struct pbuf *p; LWIP_ASSERT("invalid pbuf_type", (type == PBUF_REF) || (type == PBUF_ROM)); - 8037340: 883b ldrh r3, [r7, #0] - 8037342: 2b41 cmp r3, #65 ; 0x41 - 8037344: d009 beq.n 803735a - 8037346: 883b ldrh r3, [r7, #0] - 8037348: 2b01 cmp r3, #1 - 803734a: d006 beq.n 803735a - 803734c: 4b0f ldr r3, [pc, #60] ; (803738c ) - 803734e: f44f 72a5 mov.w r2, #330 ; 0x14a - 8037352: 490f ldr r1, [pc, #60] ; (8037390 ) - 8037354: 480f ldr r0, [pc, #60] ; (8037394 ) - 8037356: f009 fbc3 bl 8040ae0 + 8037370: 883b ldrh r3, [r7, #0] + 8037372: 2b41 cmp r3, #65 ; 0x41 + 8037374: d009 beq.n 803738a + 8037376: 883b ldrh r3, [r7, #0] + 8037378: 2b01 cmp r3, #1 + 803737a: d006 beq.n 803738a + 803737c: 4b0f ldr r3, [pc, #60] ; (80373bc ) + 803737e: f44f 72a5 mov.w r2, #330 ; 0x14a + 8037382: 490f ldr r1, [pc, #60] ; (80373c0 ) + 8037384: 480f ldr r0, [pc, #60] ; (80373c4 ) + 8037386: f009 fbc3 bl 8040b10 /* only allocate memory for the pbuf structure */ p = (struct pbuf *)memp_malloc(MEMP_PBUF); - 803735a: 2007 movs r0, #7 - 803735c: f7ff fad4 bl 8036908 - 8037360: 60f8 str r0, [r7, #12] + 803738a: 2007 movs r0, #7 + 803738c: f7ff fad4 bl 8036938 + 8037390: 60f8 str r0, [r7, #12] if (p == NULL) { - 8037362: 68fb ldr r3, [r7, #12] - 8037364: 2b00 cmp r3, #0 - 8037366: d101 bne.n 803736c + 8037392: 68fb ldr r3, [r7, #12] + 8037394: 2b00 cmp r3, #0 + 8037396: d101 bne.n 803739c LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("pbuf_alloc_reference: Could not allocate MEMP_PBUF for PBUF_%s.\n", (type == PBUF_ROM) ? "ROM" : "REF")); return NULL; - 8037368: 2300 movs r3, #0 - 803736a: e00b b.n 8037384 + 8037398: 2300 movs r3, #0 + 803739a: e00b b.n 80373b4 } pbuf_init_alloced_pbuf(p, payload, length, length, type, 0); - 803736c: 8879 ldrh r1, [r7, #2] - 803736e: 887a ldrh r2, [r7, #2] - 8037370: 2300 movs r3, #0 - 8037372: 9301 str r3, [sp, #4] - 8037374: 883b ldrh r3, [r7, #0] - 8037376: 9300 str r3, [sp, #0] - 8037378: 460b mov r3, r1 - 803737a: 6879 ldr r1, [r7, #4] - 803737c: 68f8 ldr r0, [r7, #12] - 803737e: f7ff feb7 bl 80370f0 + 803739c: 8879 ldrh r1, [r7, #2] + 803739e: 887a ldrh r2, [r7, #2] + 80373a0: 2300 movs r3, #0 + 80373a2: 9301 str r3, [sp, #4] + 80373a4: 883b ldrh r3, [r7, #0] + 80373a6: 9300 str r3, [sp, #0] + 80373a8: 460b mov r3, r1 + 80373aa: 6879 ldr r1, [r7, #4] + 80373ac: 68f8 ldr r0, [r7, #12] + 80373ae: f7ff feb7 bl 8037120 return p; - 8037382: 68fb ldr r3, [r7, #12] + 80373b2: 68fb ldr r3, [r7, #12] } - 8037384: 4618 mov r0, r3 - 8037386: 3710 adds r7, #16 - 8037388: 46bd mov sp, r7 - 803738a: bd80 pop {r7, pc} - 803738c: 08042868 .word 0x08042868 - 8037390: 0804296c .word 0x0804296c - 8037394: 080428c8 .word 0x080428c8 + 80373b4: 4618 mov r0, r3 + 80373b6: 3710 adds r7, #16 + 80373b8: 46bd mov sp, r7 + 80373ba: bd80 pop {r7, pc} + 80373bc: 08042898 .word 0x08042898 + 80373c0: 0804299c .word 0x0804299c + 80373c4: 080428f8 .word 0x080428f8 -08037398 : +080373c8 : * big enough to hold 'length' plus the header size */ struct pbuf * pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p, void *payload_mem, u16_t payload_mem_len) { - 8037398: b580 push {r7, lr} - 803739a: b088 sub sp, #32 - 803739c: af02 add r7, sp, #8 - 803739e: 607b str r3, [r7, #4] - 80373a0: 4603 mov r3, r0 - 80373a2: 73fb strb r3, [r7, #15] - 80373a4: 460b mov r3, r1 - 80373a6: 81bb strh r3, [r7, #12] - 80373a8: 4613 mov r3, r2 - 80373aa: 817b strh r3, [r7, #10] + 80373c8: b580 push {r7, lr} + 80373ca: b088 sub sp, #32 + 80373cc: af02 add r7, sp, #8 + 80373ce: 607b str r3, [r7, #4] + 80373d0: 4603 mov r3, r0 + 80373d2: 73fb strb r3, [r7, #15] + 80373d4: 460b mov r3, r1 + 80373d6: 81bb strh r3, [r7, #12] + 80373d8: 4613 mov r3, r2 + 80373da: 817b strh r3, [r7, #10] u16_t offset = (u16_t)l; - 80373ac: 7bfb ldrb r3, [r7, #15] - 80373ae: 827b strh r3, [r7, #18] + 80373dc: 7bfb ldrb r3, [r7, #15] + 80373de: 827b strh r3, [r7, #18] void *payload; LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length)); if (LWIP_MEM_ALIGN_SIZE(offset) + length > payload_mem_len) { - 80373b0: 8a7b ldrh r3, [r7, #18] - 80373b2: 3303 adds r3, #3 - 80373b4: f023 0203 bic.w r2, r3, #3 - 80373b8: 89bb ldrh r3, [r7, #12] - 80373ba: 441a add r2, r3 - 80373bc: 8cbb ldrh r3, [r7, #36] ; 0x24 - 80373be: 429a cmp r2, r3 - 80373c0: d901 bls.n 80373c6 + 80373e0: 8a7b ldrh r3, [r7, #18] + 80373e2: 3303 adds r3, #3 + 80373e4: f023 0203 bic.w r2, r3, #3 + 80373e8: 89bb ldrh r3, [r7, #12] + 80373ea: 441a add r2, r3 + 80373ec: 8cbb ldrh r3, [r7, #36] ; 0x24 + 80373ee: 429a cmp r2, r3 + 80373f0: d901 bls.n 80373f6 LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length)); return NULL; - 80373c2: 2300 movs r3, #0 - 80373c4: e018 b.n 80373f8 + 80373f2: 2300 movs r3, #0 + 80373f4: e018 b.n 8037428 } if (payload_mem != NULL) { - 80373c6: 6a3b ldr r3, [r7, #32] - 80373c8: 2b00 cmp r3, #0 - 80373ca: d007 beq.n 80373dc + 80373f6: 6a3b ldr r3, [r7, #32] + 80373f8: 2b00 cmp r3, #0 + 80373fa: d007 beq.n 803740c payload = (u8_t *)payload_mem + LWIP_MEM_ALIGN_SIZE(offset); - 80373cc: 8a7b ldrh r3, [r7, #18] - 80373ce: 3303 adds r3, #3 - 80373d0: f023 0303 bic.w r3, r3, #3 - 80373d4: 6a3a ldr r2, [r7, #32] - 80373d6: 4413 add r3, r2 - 80373d8: 617b str r3, [r7, #20] - 80373da: e001 b.n 80373e0 + 80373fc: 8a7b ldrh r3, [r7, #18] + 80373fe: 3303 adds r3, #3 + 8037400: f023 0303 bic.w r3, r3, #3 + 8037404: 6a3a ldr r2, [r7, #32] + 8037406: 4413 add r3, r2 + 8037408: 617b str r3, [r7, #20] + 803740a: e001 b.n 8037410 } else { payload = NULL; - 80373dc: 2300 movs r3, #0 - 80373de: 617b str r3, [r7, #20] + 803740c: 2300 movs r3, #0 + 803740e: 617b str r3, [r7, #20] } pbuf_init_alloced_pbuf(&p->pbuf, payload, length, length, type, PBUF_FLAG_IS_CUSTOM); - 80373e0: 6878 ldr r0, [r7, #4] - 80373e2: 89b9 ldrh r1, [r7, #12] - 80373e4: 89ba ldrh r2, [r7, #12] - 80373e6: 2302 movs r3, #2 - 80373e8: 9301 str r3, [sp, #4] - 80373ea: 897b ldrh r3, [r7, #10] - 80373ec: 9300 str r3, [sp, #0] - 80373ee: 460b mov r3, r1 - 80373f0: 6979 ldr r1, [r7, #20] - 80373f2: f7ff fe7d bl 80370f0 + 8037410: 6878 ldr r0, [r7, #4] + 8037412: 89b9 ldrh r1, [r7, #12] + 8037414: 89ba ldrh r2, [r7, #12] + 8037416: 2302 movs r3, #2 + 8037418: 9301 str r3, [sp, #4] + 803741a: 897b ldrh r3, [r7, #10] + 803741c: 9300 str r3, [sp, #0] + 803741e: 460b mov r3, r1 + 8037420: 6979 ldr r1, [r7, #20] + 8037422: f7ff fe7d bl 8037120 return &p->pbuf; - 80373f6: 687b ldr r3, [r7, #4] + 8037426: 687b ldr r3, [r7, #4] } - 80373f8: 4618 mov r0, r3 - 80373fa: 3718 adds r7, #24 - 80373fc: 46bd mov sp, r7 - 80373fe: bd80 pop {r7, pc} + 8037428: 4618 mov r0, r3 + 803742a: 3718 adds r7, #24 + 803742c: 46bd mov sp, r7 + 803742e: bd80 pop {r7, pc} -08037400 : +08037430 : * * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain). */ void pbuf_realloc(struct pbuf *p, u16_t new_len) { - 8037400: b580 push {r7, lr} - 8037402: b084 sub sp, #16 - 8037404: af00 add r7, sp, #0 - 8037406: 6078 str r0, [r7, #4] - 8037408: 460b mov r3, r1 - 803740a: 807b strh r3, [r7, #2] + 8037430: b580 push {r7, lr} + 8037432: b084 sub sp, #16 + 8037434: af00 add r7, sp, #0 + 8037436: 6078 str r0, [r7, #4] + 8037438: 460b mov r3, r1 + 803743a: 807b strh r3, [r7, #2] struct pbuf *q; u16_t rem_len; /* remaining length */ u16_t shrink; LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL); - 803740c: 687b ldr r3, [r7, #4] - 803740e: 2b00 cmp r3, #0 - 8037410: d106 bne.n 8037420 - 8037412: 4b3a ldr r3, [pc, #232] ; (80374fc ) - 8037414: f44f 72cc mov.w r2, #408 ; 0x198 - 8037418: 4939 ldr r1, [pc, #228] ; (8037500 ) - 803741a: 483a ldr r0, [pc, #232] ; (8037504 ) - 803741c: f009 fb60 bl 8040ae0 + 803743c: 687b ldr r3, [r7, #4] + 803743e: 2b00 cmp r3, #0 + 8037440: d106 bne.n 8037450 + 8037442: 4b3a ldr r3, [pc, #232] ; (803752c ) + 8037444: f44f 72cc mov.w r2, #408 ; 0x198 + 8037448: 4939 ldr r1, [pc, #228] ; (8037530 ) + 803744a: 483a ldr r0, [pc, #232] ; (8037534 ) + 803744c: f009 fb60 bl 8040b10 /* desired length larger than current length? */ if (new_len >= p->tot_len) { - 8037420: 687b ldr r3, [r7, #4] - 8037422: 891b ldrh r3, [r3, #8] - 8037424: 887a ldrh r2, [r7, #2] - 8037426: 429a cmp r2, r3 - 8037428: d263 bcs.n 80374f2 + 8037450: 687b ldr r3, [r7, #4] + 8037452: 891b ldrh r3, [r3, #8] + 8037454: 887a ldrh r2, [r7, #2] + 8037456: 429a cmp r2, r3 + 8037458: d263 bcs.n 8037522 return; } /* the pbuf chain grows by (new_len - p->tot_len) bytes * (which may be negative in case of shrinking) */ shrink = (u16_t)(p->tot_len - new_len); - 803742a: 687b ldr r3, [r7, #4] - 803742c: 891a ldrh r2, [r3, #8] - 803742e: 887b ldrh r3, [r7, #2] - 8037430: 1ad3 subs r3, r2, r3 - 8037432: 813b strh r3, [r7, #8] + 803745a: 687b ldr r3, [r7, #4] + 803745c: 891a ldrh r2, [r3, #8] + 803745e: 887b ldrh r3, [r7, #2] + 8037460: 1ad3 subs r3, r2, r3 + 8037462: 813b strh r3, [r7, #8] /* first, step over any pbufs that should remain in the chain */ rem_len = new_len; - 8037434: 887b ldrh r3, [r7, #2] - 8037436: 817b strh r3, [r7, #10] + 8037464: 887b ldrh r3, [r7, #2] + 8037466: 817b strh r3, [r7, #10] q = p; - 8037438: 687b ldr r3, [r7, #4] - 803743a: 60fb str r3, [r7, #12] + 8037468: 687b ldr r3, [r7, #4] + 803746a: 60fb str r3, [r7, #12] /* should this pbuf be kept? */ while (rem_len > q->len) { - 803743c: e018 b.n 8037470 + 803746c: e018 b.n 80374a0 /* decrease remaining length by pbuf length */ rem_len = (u16_t)(rem_len - q->len); - 803743e: 68fb ldr r3, [r7, #12] - 8037440: 895b ldrh r3, [r3, #10] - 8037442: 897a ldrh r2, [r7, #10] - 8037444: 1ad3 subs r3, r2, r3 - 8037446: 817b strh r3, [r7, #10] + 803746e: 68fb ldr r3, [r7, #12] + 8037470: 895b ldrh r3, [r3, #10] + 8037472: 897a ldrh r2, [r7, #10] + 8037474: 1ad3 subs r3, r2, r3 + 8037476: 817b strh r3, [r7, #10] /* decrease total length indicator */ q->tot_len = (u16_t)(q->tot_len - shrink); - 8037448: 68fb ldr r3, [r7, #12] - 803744a: 891a ldrh r2, [r3, #8] - 803744c: 893b ldrh r3, [r7, #8] - 803744e: 1ad3 subs r3, r2, r3 - 8037450: b29a uxth r2, r3 - 8037452: 68fb ldr r3, [r7, #12] - 8037454: 811a strh r2, [r3, #8] + 8037478: 68fb ldr r3, [r7, #12] + 803747a: 891a ldrh r2, [r3, #8] + 803747c: 893b ldrh r3, [r7, #8] + 803747e: 1ad3 subs r3, r2, r3 + 8037480: b29a uxth r2, r3 + 8037482: 68fb ldr r3, [r7, #12] + 8037484: 811a strh r2, [r3, #8] /* proceed to next pbuf in chain */ q = q->next; - 8037456: 68fb ldr r3, [r7, #12] - 8037458: 681b ldr r3, [r3, #0] - 803745a: 60fb str r3, [r7, #12] + 8037486: 68fb ldr r3, [r7, #12] + 8037488: 681b ldr r3, [r3, #0] + 803748a: 60fb str r3, [r7, #12] LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL); - 803745c: 68fb ldr r3, [r7, #12] - 803745e: 2b00 cmp r3, #0 - 8037460: d106 bne.n 8037470 - 8037462: 4b26 ldr r3, [pc, #152] ; (80374fc ) - 8037464: f240 12af movw r2, #431 ; 0x1af - 8037468: 4927 ldr r1, [pc, #156] ; (8037508 ) - 803746a: 4826 ldr r0, [pc, #152] ; (8037504 ) - 803746c: f009 fb38 bl 8040ae0 + 803748c: 68fb ldr r3, [r7, #12] + 803748e: 2b00 cmp r3, #0 + 8037490: d106 bne.n 80374a0 + 8037492: 4b26 ldr r3, [pc, #152] ; (803752c ) + 8037494: f240 12af movw r2, #431 ; 0x1af + 8037498: 4927 ldr r1, [pc, #156] ; (8037538 ) + 803749a: 4826 ldr r0, [pc, #152] ; (8037534 ) + 803749c: f009 fb38 bl 8040b10 while (rem_len > q->len) { - 8037470: 68fb ldr r3, [r7, #12] - 8037472: 895b ldrh r3, [r3, #10] - 8037474: 897a ldrh r2, [r7, #10] - 8037476: 429a cmp r2, r3 - 8037478: d8e1 bhi.n 803743e + 80374a0: 68fb ldr r3, [r7, #12] + 80374a2: 895b ldrh r3, [r3, #10] + 80374a4: 897a ldrh r2, [r7, #10] + 80374a6: 429a cmp r2, r3 + 80374a8: d8e1 bhi.n 803746e /* we have now reached the new last pbuf (in q) */ /* rem_len == desired length for pbuf q */ /* shrink allocated memory for PBUF_RAM */ /* (other types merely adjust their length fields */ if (pbuf_match_allocsrc(q, PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) && (rem_len != q->len) - 803747a: 68fb ldr r3, [r7, #12] - 803747c: 7b1b ldrb r3, [r3, #12] - 803747e: f003 030f and.w r3, r3, #15 - 8037482: 2b00 cmp r3, #0 - 8037484: d121 bne.n 80374ca - 8037486: 68fb ldr r3, [r7, #12] - 8037488: 895b ldrh r3, [r3, #10] - 803748a: 897a ldrh r2, [r7, #10] - 803748c: 429a cmp r2, r3 - 803748e: d01c beq.n 80374ca + 80374aa: 68fb ldr r3, [r7, #12] + 80374ac: 7b1b ldrb r3, [r3, #12] + 80374ae: f003 030f and.w r3, r3, #15 + 80374b2: 2b00 cmp r3, #0 + 80374b4: d121 bne.n 80374fa + 80374b6: 68fb ldr r3, [r7, #12] + 80374b8: 895b ldrh r3, [r3, #10] + 80374ba: 897a ldrh r2, [r7, #10] + 80374bc: 429a cmp r2, r3 + 80374be: d01c beq.n 80374fa #if LWIP_SUPPORT_CUSTOM_PBUF && ((q->flags & PBUF_FLAG_IS_CUSTOM) == 0) - 8037490: 68fb ldr r3, [r7, #12] - 8037492: 7b5b ldrb r3, [r3, #13] - 8037494: f003 0302 and.w r3, r3, #2 - 8037498: 2b00 cmp r3, #0 - 803749a: d116 bne.n 80374ca + 80374c0: 68fb ldr r3, [r7, #12] + 80374c2: 7b5b ldrb r3, [r3, #13] + 80374c4: f003 0302 and.w r3, r3, #2 + 80374c8: 2b00 cmp r3, #0 + 80374ca: d116 bne.n 80374fa #endif /* LWIP_SUPPORT_CUSTOM_PBUF */ ) { /* reallocate and adjust the length of the pbuf that will be split */ q = (struct pbuf *)mem_trim(q, (mem_size_t)(((u8_t *)q->payload - (u8_t *)q) + rem_len)); - 803749c: 68fb ldr r3, [r7, #12] - 803749e: 685a ldr r2, [r3, #4] - 80374a0: 68fb ldr r3, [r7, #12] - 80374a2: 1ad3 subs r3, r2, r3 - 80374a4: b29a uxth r2, r3 - 80374a6: 897b ldrh r3, [r7, #10] - 80374a8: 4413 add r3, r2 - 80374aa: b29b uxth r3, r3 - 80374ac: 4619 mov r1, r3 - 80374ae: 68f8 ldr r0, [r7, #12] - 80374b0: f7fe ff9e bl 80363f0 - 80374b4: 60f8 str r0, [r7, #12] + 80374cc: 68fb ldr r3, [r7, #12] + 80374ce: 685a ldr r2, [r3, #4] + 80374d0: 68fb ldr r3, [r7, #12] + 80374d2: 1ad3 subs r3, r2, r3 + 80374d4: b29a uxth r2, r3 + 80374d6: 897b ldrh r3, [r7, #10] + 80374d8: 4413 add r3, r2 + 80374da: b29b uxth r3, r3 + 80374dc: 4619 mov r1, r3 + 80374de: 68f8 ldr r0, [r7, #12] + 80374e0: f7fe ff9e bl 8036420 + 80374e4: 60f8 str r0, [r7, #12] LWIP_ASSERT("mem_trim returned q == NULL", q != NULL); - 80374b6: 68fb ldr r3, [r7, #12] - 80374b8: 2b00 cmp r3, #0 - 80374ba: d106 bne.n 80374ca - 80374bc: 4b0f ldr r3, [pc, #60] ; (80374fc ) - 80374be: f240 12bd movw r2, #445 ; 0x1bd - 80374c2: 4912 ldr r1, [pc, #72] ; (803750c ) - 80374c4: 480f ldr r0, [pc, #60] ; (8037504 ) - 80374c6: f009 fb0b bl 8040ae0 + 80374e6: 68fb ldr r3, [r7, #12] + 80374e8: 2b00 cmp r3, #0 + 80374ea: d106 bne.n 80374fa + 80374ec: 4b0f ldr r3, [pc, #60] ; (803752c ) + 80374ee: f240 12bd movw r2, #445 ; 0x1bd + 80374f2: 4912 ldr r1, [pc, #72] ; (803753c ) + 80374f4: 480f ldr r0, [pc, #60] ; (8037534 ) + 80374f6: f009 fb0b bl 8040b10 } /* adjust length fields for new last pbuf */ q->len = rem_len; - 80374ca: 68fb ldr r3, [r7, #12] - 80374cc: 897a ldrh r2, [r7, #10] - 80374ce: 815a strh r2, [r3, #10] + 80374fa: 68fb ldr r3, [r7, #12] + 80374fc: 897a ldrh r2, [r7, #10] + 80374fe: 815a strh r2, [r3, #10] q->tot_len = q->len; - 80374d0: 68fb ldr r3, [r7, #12] - 80374d2: 895a ldrh r2, [r3, #10] - 80374d4: 68fb ldr r3, [r7, #12] - 80374d6: 811a strh r2, [r3, #8] + 8037500: 68fb ldr r3, [r7, #12] + 8037502: 895a ldrh r2, [r3, #10] + 8037504: 68fb ldr r3, [r7, #12] + 8037506: 811a strh r2, [r3, #8] /* any remaining pbufs in chain? */ if (q->next != NULL) { - 80374d8: 68fb ldr r3, [r7, #12] - 80374da: 681b ldr r3, [r3, #0] - 80374dc: 2b00 cmp r3, #0 - 80374de: d004 beq.n 80374ea + 8037508: 68fb ldr r3, [r7, #12] + 803750a: 681b ldr r3, [r3, #0] + 803750c: 2b00 cmp r3, #0 + 803750e: d004 beq.n 803751a /* free remaining pbufs in chain */ pbuf_free(q->next); - 80374e0: 68fb ldr r3, [r7, #12] - 80374e2: 681b ldr r3, [r3, #0] - 80374e4: 4618 mov r0, r3 - 80374e6: f000 f911 bl 803770c + 8037510: 68fb ldr r3, [r7, #12] + 8037512: 681b ldr r3, [r3, #0] + 8037514: 4618 mov r0, r3 + 8037516: f000 f911 bl 803773c } /* q is last packet in chain */ q->next = NULL; - 80374ea: 68fb ldr r3, [r7, #12] - 80374ec: 2200 movs r2, #0 - 80374ee: 601a str r2, [r3, #0] - 80374f0: e000 b.n 80374f4 + 803751a: 68fb ldr r3, [r7, #12] + 803751c: 2200 movs r2, #0 + 803751e: 601a str r2, [r3, #0] + 8037520: e000 b.n 8037524 return; - 80374f2: bf00 nop + 8037522: bf00 nop } - 80374f4: 3710 adds r7, #16 - 80374f6: 46bd mov sp, r7 - 80374f8: bd80 pop {r7, pc} - 80374fa: bf00 nop - 80374fc: 08042868 .word 0x08042868 - 8037500: 08042980 .word 0x08042980 - 8037504: 080428c8 .word 0x080428c8 - 8037508: 08042998 .word 0x08042998 - 803750c: 080429b0 .word 0x080429b0 + 8037524: 3710 adds r7, #16 + 8037526: 46bd mov sp, r7 + 8037528: bd80 pop {r7, pc} + 803752a: bf00 nop + 803752c: 08042898 .word 0x08042898 + 8037530: 080429b0 .word 0x080429b0 + 8037534: 080428f8 .word 0x080428f8 + 8037538: 080429c8 .word 0x080429c8 + 803753c: 080429e0 .word 0x080429e0 -08037510 : +08037540 : * @return non-zero on failure, zero on success. * */ static u8_t pbuf_add_header_impl(struct pbuf *p, size_t header_size_increment, u8_t force) { - 8037510: b580 push {r7, lr} - 8037512: b086 sub sp, #24 - 8037514: af00 add r7, sp, #0 - 8037516: 60f8 str r0, [r7, #12] - 8037518: 60b9 str r1, [r7, #8] - 803751a: 4613 mov r3, r2 - 803751c: 71fb strb r3, [r7, #7] + 8037540: b580 push {r7, lr} + 8037542: b086 sub sp, #24 + 8037544: af00 add r7, sp, #0 + 8037546: 60f8 str r0, [r7, #12] + 8037548: 60b9 str r1, [r7, #8] + 803754a: 4613 mov r3, r2 + 803754c: 71fb strb r3, [r7, #7] u16_t type_internal; void *payload; u16_t increment_magnitude; LWIP_ASSERT("p != NULL", p != NULL); - 803751e: 68fb ldr r3, [r7, #12] - 8037520: 2b00 cmp r3, #0 - 8037522: d106 bne.n 8037532 - 8037524: 4b2b ldr r3, [pc, #172] ; (80375d4 ) - 8037526: f240 12df movw r2, #479 ; 0x1df - 803752a: 492b ldr r1, [pc, #172] ; (80375d8 ) - 803752c: 482b ldr r0, [pc, #172] ; (80375dc ) - 803752e: f009 fad7 bl 8040ae0 + 803754e: 68fb ldr r3, [r7, #12] + 8037550: 2b00 cmp r3, #0 + 8037552: d106 bne.n 8037562 + 8037554: 4b2b ldr r3, [pc, #172] ; (8037604 ) + 8037556: f240 12df movw r2, #479 ; 0x1df + 803755a: 492b ldr r1, [pc, #172] ; (8037608 ) + 803755c: 482b ldr r0, [pc, #172] ; (803760c ) + 803755e: f009 fad7 bl 8040b10 if ((p == NULL) || (header_size_increment > 0xFFFF)) { - 8037532: 68fb ldr r3, [r7, #12] - 8037534: 2b00 cmp r3, #0 - 8037536: d003 beq.n 8037540 - 8037538: 68bb ldr r3, [r7, #8] - 803753a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803753e: d301 bcc.n 8037544 + 8037562: 68fb ldr r3, [r7, #12] + 8037564: 2b00 cmp r3, #0 + 8037566: d003 beq.n 8037570 + 8037568: 68bb ldr r3, [r7, #8] + 803756a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 803756e: d301 bcc.n 8037574 return 1; - 8037540: 2301 movs r3, #1 - 8037542: e043 b.n 80375cc + 8037570: 2301 movs r3, #1 + 8037572: e043 b.n 80375fc } if (header_size_increment == 0) { - 8037544: 68bb ldr r3, [r7, #8] - 8037546: 2b00 cmp r3, #0 - 8037548: d101 bne.n 803754e + 8037574: 68bb ldr r3, [r7, #8] + 8037576: 2b00 cmp r3, #0 + 8037578: d101 bne.n 803757e return 0; - 803754a: 2300 movs r3, #0 - 803754c: e03e b.n 80375cc + 803757a: 2300 movs r3, #0 + 803757c: e03e b.n 80375fc } increment_magnitude = (u16_t)header_size_increment; - 803754e: 68bb ldr r3, [r7, #8] - 8037550: 827b strh r3, [r7, #18] + 803757e: 68bb ldr r3, [r7, #8] + 8037580: 827b strh r3, [r7, #18] /* Do not allow tot_len to wrap as a result. */ if ((u16_t)(increment_magnitude + p->tot_len) < increment_magnitude) { - 8037552: 68fb ldr r3, [r7, #12] - 8037554: 891a ldrh r2, [r3, #8] - 8037556: 8a7b ldrh r3, [r7, #18] - 8037558: 4413 add r3, r2 - 803755a: b29b uxth r3, r3 - 803755c: 8a7a ldrh r2, [r7, #18] - 803755e: 429a cmp r2, r3 - 8037560: d901 bls.n 8037566 + 8037582: 68fb ldr r3, [r7, #12] + 8037584: 891a ldrh r2, [r3, #8] + 8037586: 8a7b ldrh r3, [r7, #18] + 8037588: 4413 add r3, r2 + 803758a: b29b uxth r3, r3 + 803758c: 8a7a ldrh r2, [r7, #18] + 803758e: 429a cmp r2, r3 + 8037590: d901 bls.n 8037596 return 1; - 8037562: 2301 movs r3, #1 - 8037564: e032 b.n 80375cc + 8037592: 2301 movs r3, #1 + 8037594: e032 b.n 80375fc } type_internal = p->type_internal; - 8037566: 68fb ldr r3, [r7, #12] - 8037568: 7b1b ldrb r3, [r3, #12] - 803756a: 823b strh r3, [r7, #16] + 8037596: 68fb ldr r3, [r7, #12] + 8037598: 7b1b ldrb r3, [r3, #12] + 803759a: 823b strh r3, [r7, #16] /* pbuf types containing payloads? */ if (type_internal & PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS) { - 803756c: 8a3b ldrh r3, [r7, #16] - 803756e: f003 0380 and.w r3, r3, #128 ; 0x80 - 8037572: 2b00 cmp r3, #0 - 8037574: d00c beq.n 8037590 + 803759c: 8a3b ldrh r3, [r7, #16] + 803759e: f003 0380 and.w r3, r3, #128 ; 0x80 + 80375a2: 2b00 cmp r3, #0 + 80375a4: d00c beq.n 80375c0 /* set new payload pointer */ payload = (u8_t *)p->payload - header_size_increment; - 8037576: 68fb ldr r3, [r7, #12] - 8037578: 685a ldr r2, [r3, #4] - 803757a: 68bb ldr r3, [r7, #8] - 803757c: 425b negs r3, r3 - 803757e: 4413 add r3, r2 - 8037580: 617b str r3, [r7, #20] + 80375a6: 68fb ldr r3, [r7, #12] + 80375a8: 685a ldr r2, [r3, #4] + 80375aa: 68bb ldr r3, [r7, #8] + 80375ac: 425b negs r3, r3 + 80375ae: 4413 add r3, r2 + 80375b0: 617b str r3, [r7, #20] /* boundary check fails? */ if ((u8_t *)payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) { - 8037582: 68fb ldr r3, [r7, #12] - 8037584: 3310 adds r3, #16 - 8037586: 697a ldr r2, [r7, #20] - 8037588: 429a cmp r2, r3 - 803758a: d20d bcs.n 80375a8 + 80375b2: 68fb ldr r3, [r7, #12] + 80375b4: 3310 adds r3, #16 + 80375b6: 697a ldr r2, [r7, #20] + 80375b8: 429a cmp r2, r3 + 80375ba: d20d bcs.n 80375d8 LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: failed as %p < %p (not enough space for new header size)\n", (void *)payload, (void *)((u8_t *)p + SIZEOF_STRUCT_PBUF))); /* bail out unsuccessfully */ return 1; - 803758c: 2301 movs r3, #1 - 803758e: e01d b.n 80375cc + 80375bc: 2301 movs r3, #1 + 80375be: e01d b.n 80375fc } /* pbuf types referring to external payloads? */ } else { /* hide a header in the payload? */ if (force) { - 8037590: 79fb ldrb r3, [r7, #7] - 8037592: 2b00 cmp r3, #0 - 8037594: d006 beq.n 80375a4 + 80375c0: 79fb ldrb r3, [r7, #7] + 80375c2: 2b00 cmp r3, #0 + 80375c4: d006 beq.n 80375d4 payload = (u8_t *)p->payload - header_size_increment; - 8037596: 68fb ldr r3, [r7, #12] - 8037598: 685a ldr r2, [r3, #4] - 803759a: 68bb ldr r3, [r7, #8] - 803759c: 425b negs r3, r3 - 803759e: 4413 add r3, r2 - 80375a0: 617b str r3, [r7, #20] - 80375a2: e001 b.n 80375a8 + 80375c6: 68fb ldr r3, [r7, #12] + 80375c8: 685a ldr r2, [r3, #4] + 80375ca: 68bb ldr r3, [r7, #8] + 80375cc: 425b negs r3, r3 + 80375ce: 4413 add r3, r2 + 80375d0: 617b str r3, [r7, #20] + 80375d2: e001 b.n 80375d8 } else { /* cannot expand payload to front (yet!) * bail out unsuccessfully */ return 1; - 80375a4: 2301 movs r3, #1 - 80375a6: e011 b.n 80375cc + 80375d4: 2301 movs r3, #1 + 80375d6: e011 b.n 80375fc } LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: old %p new %p (%"U16_F")\n", (void *)p->payload, (void *)payload, increment_magnitude)); /* modify pbuf fields */ p->payload = payload; - 80375a8: 68fb ldr r3, [r7, #12] - 80375aa: 697a ldr r2, [r7, #20] - 80375ac: 605a str r2, [r3, #4] + 80375d8: 68fb ldr r3, [r7, #12] + 80375da: 697a ldr r2, [r7, #20] + 80375dc: 605a str r2, [r3, #4] p->len = (u16_t)(p->len + increment_magnitude); - 80375ae: 68fb ldr r3, [r7, #12] - 80375b0: 895a ldrh r2, [r3, #10] - 80375b2: 8a7b ldrh r3, [r7, #18] - 80375b4: 4413 add r3, r2 - 80375b6: b29a uxth r2, r3 - 80375b8: 68fb ldr r3, [r7, #12] - 80375ba: 815a strh r2, [r3, #10] + 80375de: 68fb ldr r3, [r7, #12] + 80375e0: 895a ldrh r2, [r3, #10] + 80375e2: 8a7b ldrh r3, [r7, #18] + 80375e4: 4413 add r3, r2 + 80375e6: b29a uxth r2, r3 + 80375e8: 68fb ldr r3, [r7, #12] + 80375ea: 815a strh r2, [r3, #10] p->tot_len = (u16_t)(p->tot_len + increment_magnitude); - 80375bc: 68fb ldr r3, [r7, #12] - 80375be: 891a ldrh r2, [r3, #8] - 80375c0: 8a7b ldrh r3, [r7, #18] - 80375c2: 4413 add r3, r2 - 80375c4: b29a uxth r2, r3 - 80375c6: 68fb ldr r3, [r7, #12] - 80375c8: 811a strh r2, [r3, #8] + 80375ec: 68fb ldr r3, [r7, #12] + 80375ee: 891a ldrh r2, [r3, #8] + 80375f0: 8a7b ldrh r3, [r7, #18] + 80375f2: 4413 add r3, r2 + 80375f4: b29a uxth r2, r3 + 80375f6: 68fb ldr r3, [r7, #12] + 80375f8: 811a strh r2, [r3, #8] return 0; - 80375ca: 2300 movs r3, #0 + 80375fa: 2300 movs r3, #0 } - 80375cc: 4618 mov r0, r3 - 80375ce: 3718 adds r7, #24 - 80375d0: 46bd mov sp, r7 - 80375d2: bd80 pop {r7, pc} - 80375d4: 08042868 .word 0x08042868 - 80375d8: 080429cc .word 0x080429cc - 80375dc: 080428c8 .word 0x080428c8 + 80375fc: 4618 mov r0, r3 + 80375fe: 3718 adds r7, #24 + 8037600: 46bd mov sp, r7 + 8037602: bd80 pop {r7, pc} + 8037604: 08042898 .word 0x08042898 + 8037608: 080429fc .word 0x080429fc + 803760c: 080428f8 .word 0x080428f8 -080375e0 : +08037610 : * @return non-zero on failure, zero on success. * */ u8_t pbuf_add_header(struct pbuf *p, size_t header_size_increment) { - 80375e0: b580 push {r7, lr} - 80375e2: b082 sub sp, #8 - 80375e4: af00 add r7, sp, #0 - 80375e6: 6078 str r0, [r7, #4] - 80375e8: 6039 str r1, [r7, #0] + 8037610: b580 push {r7, lr} + 8037612: b082 sub sp, #8 + 8037614: af00 add r7, sp, #0 + 8037616: 6078 str r0, [r7, #4] + 8037618: 6039 str r1, [r7, #0] return pbuf_add_header_impl(p, header_size_increment, 0); - 80375ea: 2200 movs r2, #0 - 80375ec: 6839 ldr r1, [r7, #0] - 80375ee: 6878 ldr r0, [r7, #4] - 80375f0: f7ff ff8e bl 8037510 - 80375f4: 4603 mov r3, r0 -} - 80375f6: 4618 mov r0, r3 - 80375f8: 3708 adds r7, #8 - 80375fa: 46bd mov sp, r7 - 80375fc: bd80 pop {r7, pc} + 803761a: 2200 movs r2, #0 + 803761c: 6839 ldr r1, [r7, #0] + 803761e: 6878 ldr r0, [r7, #4] + 8037620: f7ff ff8e bl 8037540 + 8037624: 4603 mov r3, r0 +} + 8037626: 4618 mov r0, r3 + 8037628: 3708 adds r7, #8 + 803762a: 46bd mov sp, r7 + 803762c: bd80 pop {r7, pc} ... -08037600 : +08037630 : * @return non-zero on failure, zero on success. * */ u8_t pbuf_remove_header(struct pbuf *p, size_t header_size_decrement) { - 8037600: b580 push {r7, lr} - 8037602: b084 sub sp, #16 - 8037604: af00 add r7, sp, #0 - 8037606: 6078 str r0, [r7, #4] - 8037608: 6039 str r1, [r7, #0] + 8037630: b580 push {r7, lr} + 8037632: b084 sub sp, #16 + 8037634: af00 add r7, sp, #0 + 8037636: 6078 str r0, [r7, #4] + 8037638: 6039 str r1, [r7, #0] void *payload; u16_t increment_magnitude; LWIP_ASSERT("p != NULL", p != NULL); - 803760a: 687b ldr r3, [r7, #4] - 803760c: 2b00 cmp r3, #0 - 803760e: d106 bne.n 803761e - 8037610: 4b20 ldr r3, [pc, #128] ; (8037694 ) - 8037612: f240 224b movw r2, #587 ; 0x24b - 8037616: 4920 ldr r1, [pc, #128] ; (8037698 ) - 8037618: 4820 ldr r0, [pc, #128] ; (803769c ) - 803761a: f009 fa61 bl 8040ae0 + 803763a: 687b ldr r3, [r7, #4] + 803763c: 2b00 cmp r3, #0 + 803763e: d106 bne.n 803764e + 8037640: 4b20 ldr r3, [pc, #128] ; (80376c4 ) + 8037642: f240 224b movw r2, #587 ; 0x24b + 8037646: 4920 ldr r1, [pc, #128] ; (80376c8 ) + 8037648: 4820 ldr r0, [pc, #128] ; (80376cc ) + 803764a: f009 fa61 bl 8040b10 if ((p == NULL) || (header_size_decrement > 0xFFFF)) { - 803761e: 687b ldr r3, [r7, #4] - 8037620: 2b00 cmp r3, #0 - 8037622: d003 beq.n 803762c - 8037624: 683b ldr r3, [r7, #0] - 8037626: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803762a: d301 bcc.n 8037630 + 803764e: 687b ldr r3, [r7, #4] + 8037650: 2b00 cmp r3, #0 + 8037652: d003 beq.n 803765c + 8037654: 683b ldr r3, [r7, #0] + 8037656: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 803765a: d301 bcc.n 8037660 return 1; - 803762c: 2301 movs r3, #1 - 803762e: e02c b.n 803768a + 803765c: 2301 movs r3, #1 + 803765e: e02c b.n 80376ba } if (header_size_decrement == 0) { - 8037630: 683b ldr r3, [r7, #0] - 8037632: 2b00 cmp r3, #0 - 8037634: d101 bne.n 803763a + 8037660: 683b ldr r3, [r7, #0] + 8037662: 2b00 cmp r3, #0 + 8037664: d101 bne.n 803766a return 0; - 8037636: 2300 movs r3, #0 - 8037638: e027 b.n 803768a + 8037666: 2300 movs r3, #0 + 8037668: e027 b.n 80376ba } increment_magnitude = (u16_t)header_size_decrement; - 803763a: 683b ldr r3, [r7, #0] - 803763c: 81fb strh r3, [r7, #14] + 803766a: 683b ldr r3, [r7, #0] + 803766c: 81fb strh r3, [r7, #14] /* Check that we aren't going to move off the end of the pbuf */ LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;); - 803763e: 687b ldr r3, [r7, #4] - 8037640: 895b ldrh r3, [r3, #10] - 8037642: 89fa ldrh r2, [r7, #14] - 8037644: 429a cmp r2, r3 - 8037646: d908 bls.n 803765a - 8037648: 4b12 ldr r3, [pc, #72] ; (8037694 ) - 803764a: f240 2255 movw r2, #597 ; 0x255 - 803764e: 4914 ldr r1, [pc, #80] ; (80376a0 ) - 8037650: 4812 ldr r0, [pc, #72] ; (803769c ) - 8037652: f009 fa45 bl 8040ae0 - 8037656: 2301 movs r3, #1 - 8037658: e017 b.n 803768a + 803766e: 687b ldr r3, [r7, #4] + 8037670: 895b ldrh r3, [r3, #10] + 8037672: 89fa ldrh r2, [r7, #14] + 8037674: 429a cmp r2, r3 + 8037676: d908 bls.n 803768a + 8037678: 4b12 ldr r3, [pc, #72] ; (80376c4 ) + 803767a: f240 2255 movw r2, #597 ; 0x255 + 803767e: 4914 ldr r1, [pc, #80] ; (80376d0 ) + 8037680: 4812 ldr r0, [pc, #72] ; (80376cc ) + 8037682: f009 fa45 bl 8040b10 + 8037686: 2301 movs r3, #1 + 8037688: e017 b.n 80376ba /* remember current payload pointer */ payload = p->payload; - 803765a: 687b ldr r3, [r7, #4] - 803765c: 685b ldr r3, [r3, #4] - 803765e: 60bb str r3, [r7, #8] + 803768a: 687b ldr r3, [r7, #4] + 803768c: 685b ldr r3, [r3, #4] + 803768e: 60bb str r3, [r7, #8] LWIP_UNUSED_ARG(payload); /* only used in LWIP_DEBUGF below */ /* increase payload pointer (guarded by length check above) */ p->payload = (u8_t *)p->payload + header_size_decrement; - 8037660: 687b ldr r3, [r7, #4] - 8037662: 685a ldr r2, [r3, #4] - 8037664: 683b ldr r3, [r7, #0] - 8037666: 441a add r2, r3 - 8037668: 687b ldr r3, [r7, #4] - 803766a: 605a str r2, [r3, #4] + 8037690: 687b ldr r3, [r7, #4] + 8037692: 685a ldr r2, [r3, #4] + 8037694: 683b ldr r3, [r7, #0] + 8037696: 441a add r2, r3 + 8037698: 687b ldr r3, [r7, #4] + 803769a: 605a str r2, [r3, #4] /* modify pbuf length fields */ p->len = (u16_t)(p->len - increment_magnitude); - 803766c: 687b ldr r3, [r7, #4] - 803766e: 895a ldrh r2, [r3, #10] - 8037670: 89fb ldrh r3, [r7, #14] - 8037672: 1ad3 subs r3, r2, r3 - 8037674: b29a uxth r2, r3 - 8037676: 687b ldr r3, [r7, #4] - 8037678: 815a strh r2, [r3, #10] + 803769c: 687b ldr r3, [r7, #4] + 803769e: 895a ldrh r2, [r3, #10] + 80376a0: 89fb ldrh r3, [r7, #14] + 80376a2: 1ad3 subs r3, r2, r3 + 80376a4: b29a uxth r2, r3 + 80376a6: 687b ldr r3, [r7, #4] + 80376a8: 815a strh r2, [r3, #10] p->tot_len = (u16_t)(p->tot_len - increment_magnitude); - 803767a: 687b ldr r3, [r7, #4] - 803767c: 891a ldrh r2, [r3, #8] - 803767e: 89fb ldrh r3, [r7, #14] - 8037680: 1ad3 subs r3, r2, r3 - 8037682: b29a uxth r2, r3 - 8037684: 687b ldr r3, [r7, #4] - 8037686: 811a strh r2, [r3, #8] + 80376aa: 687b ldr r3, [r7, #4] + 80376ac: 891a ldrh r2, [r3, #8] + 80376ae: 89fb ldrh r3, [r7, #14] + 80376b0: 1ad3 subs r3, r2, r3 + 80376b2: b29a uxth r2, r3 + 80376b4: 687b ldr r3, [r7, #4] + 80376b6: 811a strh r2, [r3, #8] LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_remove_header: old %p new %p (%"U16_F")\n", (void *)payload, (void *)p->payload, increment_magnitude)); return 0; - 8037688: 2300 movs r3, #0 + 80376b8: 2300 movs r3, #0 } - 803768a: 4618 mov r0, r3 - 803768c: 3710 adds r7, #16 - 803768e: 46bd mov sp, r7 - 8037690: bd80 pop {r7, pc} - 8037692: bf00 nop - 8037694: 08042868 .word 0x08042868 - 8037698: 080429cc .word 0x080429cc - 803769c: 080428c8 .word 0x080428c8 - 80376a0: 080429d8 .word 0x080429d8 + 80376ba: 4618 mov r0, r3 + 80376bc: 3710 adds r7, #16 + 80376be: 46bd mov sp, r7 + 80376c0: bd80 pop {r7, pc} + 80376c2: bf00 nop + 80376c4: 08042898 .word 0x08042898 + 80376c8: 080429fc .word 0x080429fc + 80376cc: 080428f8 .word 0x080428f8 + 80376d0: 08042a08 .word 0x08042a08 -080376a4 : +080376d4 : static u8_t pbuf_header_impl(struct pbuf *p, s16_t header_size_increment, u8_t force) { - 80376a4: b580 push {r7, lr} - 80376a6: b082 sub sp, #8 - 80376a8: af00 add r7, sp, #0 - 80376aa: 6078 str r0, [r7, #4] - 80376ac: 460b mov r3, r1 - 80376ae: 807b strh r3, [r7, #2] - 80376b0: 4613 mov r3, r2 - 80376b2: 707b strb r3, [r7, #1] + 80376d4: b580 push {r7, lr} + 80376d6: b082 sub sp, #8 + 80376d8: af00 add r7, sp, #0 + 80376da: 6078 str r0, [r7, #4] + 80376dc: 460b mov r3, r1 + 80376de: 807b strh r3, [r7, #2] + 80376e0: 4613 mov r3, r2 + 80376e2: 707b strb r3, [r7, #1] if (header_size_increment < 0) { - 80376b4: f9b7 3002 ldrsh.w r3, [r7, #2] - 80376b8: 2b00 cmp r3, #0 - 80376ba: da08 bge.n 80376ce + 80376e4: f9b7 3002 ldrsh.w r3, [r7, #2] + 80376e8: 2b00 cmp r3, #0 + 80376ea: da08 bge.n 80376fe return pbuf_remove_header(p, (size_t) - header_size_increment); - 80376bc: f9b7 3002 ldrsh.w r3, [r7, #2] - 80376c0: 425b negs r3, r3 - 80376c2: 4619 mov r1, r3 - 80376c4: 6878 ldr r0, [r7, #4] - 80376c6: f7ff ff9b bl 8037600 - 80376ca: 4603 mov r3, r0 - 80376cc: e007 b.n 80376de + 80376ec: f9b7 3002 ldrsh.w r3, [r7, #2] + 80376f0: 425b negs r3, r3 + 80376f2: 4619 mov r1, r3 + 80376f4: 6878 ldr r0, [r7, #4] + 80376f6: f7ff ff9b bl 8037630 + 80376fa: 4603 mov r3, r0 + 80376fc: e007 b.n 803770e } else { return pbuf_add_header_impl(p, (size_t)header_size_increment, force); - 80376ce: f9b7 3002 ldrsh.w r3, [r7, #2] - 80376d2: 787a ldrb r2, [r7, #1] - 80376d4: 4619 mov r1, r3 - 80376d6: 6878 ldr r0, [r7, #4] - 80376d8: f7ff ff1a bl 8037510 - 80376dc: 4603 mov r3, r0 + 80376fe: f9b7 3002 ldrsh.w r3, [r7, #2] + 8037702: 787a ldrb r2, [r7, #1] + 8037704: 4619 mov r1, r3 + 8037706: 6878 ldr r0, [r7, #4] + 8037708: f7ff ff1a bl 8037540 + 803770c: 4603 mov r3, r0 } } - 80376de: 4618 mov r0, r3 - 80376e0: 3708 adds r7, #8 - 80376e2: 46bd mov sp, r7 - 80376e4: bd80 pop {r7, pc} + 803770e: 4618 mov r0, r3 + 8037710: 3708 adds r7, #8 + 8037712: 46bd mov sp, r7 + 8037714: bd80 pop {r7, pc} -080376e6 : +08037716 : * Same as pbuf_header but does not check if 'header_size > 0' is allowed. * This is used internally only, to allow PBUF_REF for RX. */ u8_t pbuf_header_force(struct pbuf *p, s16_t header_size_increment) { - 80376e6: b580 push {r7, lr} - 80376e8: b082 sub sp, #8 - 80376ea: af00 add r7, sp, #0 - 80376ec: 6078 str r0, [r7, #4] - 80376ee: 460b mov r3, r1 - 80376f0: 807b strh r3, [r7, #2] + 8037716: b580 push {r7, lr} + 8037718: b082 sub sp, #8 + 803771a: af00 add r7, sp, #0 + 803771c: 6078 str r0, [r7, #4] + 803771e: 460b mov r3, r1 + 8037720: 807b strh r3, [r7, #2] return pbuf_header_impl(p, header_size_increment, 1); - 80376f2: f9b7 3002 ldrsh.w r3, [r7, #2] - 80376f6: 2201 movs r2, #1 - 80376f8: 4619 mov r1, r3 - 80376fa: 6878 ldr r0, [r7, #4] - 80376fc: f7ff ffd2 bl 80376a4 - 8037700: 4603 mov r3, r0 -} - 8037702: 4618 mov r0, r3 - 8037704: 3708 adds r7, #8 - 8037706: 46bd mov sp, r7 - 8037708: bd80 pop {r7, pc} + 8037722: f9b7 3002 ldrsh.w r3, [r7, #2] + 8037726: 2201 movs r2, #1 + 8037728: 4619 mov r1, r3 + 803772a: 6878 ldr r0, [r7, #4] + 803772c: f7ff ffd2 bl 80376d4 + 8037730: 4603 mov r3, r0 +} + 8037732: 4618 mov r0, r3 + 8037734: 3708 adds r7, #8 + 8037736: 46bd mov sp, r7 + 8037738: bd80 pop {r7, pc} ... -0803770c : +0803773c : * 1->1->1 becomes ....... * */ u8_t pbuf_free(struct pbuf *p) { - 803770c: b580 push {r7, lr} - 803770e: b086 sub sp, #24 - 8037710: af00 add r7, sp, #0 - 8037712: 6078 str r0, [r7, #4] + 803773c: b580 push {r7, lr} + 803773e: b086 sub sp, #24 + 8037740: af00 add r7, sp, #0 + 8037742: 6078 str r0, [r7, #4] u8_t alloc_src; struct pbuf *q; u8_t count; if (p == NULL) { - 8037714: 687b ldr r3, [r7, #4] - 8037716: 2b00 cmp r3, #0 - 8037718: d10b bne.n 8037732 + 8037744: 687b ldr r3, [r7, #4] + 8037746: 2b00 cmp r3, #0 + 8037748: d10b bne.n 8037762 LWIP_ASSERT("p != NULL", p != NULL); - 803771a: 687b ldr r3, [r7, #4] - 803771c: 2b00 cmp r3, #0 - 803771e: d106 bne.n 803772e - 8037720: 4b38 ldr r3, [pc, #224] ; (8037804 ) - 8037722: f44f 7237 mov.w r2, #732 ; 0x2dc - 8037726: 4938 ldr r1, [pc, #224] ; (8037808 ) - 8037728: 4838 ldr r0, [pc, #224] ; (803780c ) - 803772a: f009 f9d9 bl 8040ae0 + 803774a: 687b ldr r3, [r7, #4] + 803774c: 2b00 cmp r3, #0 + 803774e: d106 bne.n 803775e + 8037750: 4b38 ldr r3, [pc, #224] ; (8037834 ) + 8037752: f44f 7237 mov.w r2, #732 ; 0x2dc + 8037756: 4938 ldr r1, [pc, #224] ; (8037838 ) + 8037758: 4838 ldr r0, [pc, #224] ; (803783c ) + 803775a: f009 f9d9 bl 8040b10 /* if assertions are disabled, proceed with debug output */ LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("pbuf_free(p == NULL) was called.\n")); return 0; - 803772e: 2300 movs r3, #0 - 8037730: e063 b.n 80377fa + 803775e: 2300 movs r3, #0 + 8037760: e063 b.n 803782a } LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p)); PERF_START; count = 0; - 8037732: 2300 movs r3, #0 - 8037734: 75fb strb r3, [r7, #23] + 8037762: 2300 movs r3, #0 + 8037764: 75fb strb r3, [r7, #23] /* de-allocate all consecutive pbufs from the head of the chain that * obtain a zero reference count after decrementing*/ while (p != NULL) { - 8037736: e05c b.n 80377f2 + 8037766: e05c b.n 8037822 /* Since decrementing ref cannot be guaranteed to be a single machine operation * we must protect it. We put the new ref into a local variable to prevent * further protection. */ SYS_ARCH_PROTECT(old_level); /* all pbufs in a chain are referenced at least once */ LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0); - 8037738: 687b ldr r3, [r7, #4] - 803773a: 7b9b ldrb r3, [r3, #14] - 803773c: 2b00 cmp r3, #0 - 803773e: d106 bne.n 803774e - 8037740: 4b30 ldr r3, [pc, #192] ; (8037804 ) - 8037742: f240 22f1 movw r2, #753 ; 0x2f1 - 8037746: 4932 ldr r1, [pc, #200] ; (8037810 ) - 8037748: 4830 ldr r0, [pc, #192] ; (803780c ) - 803774a: f009 f9c9 bl 8040ae0 + 8037768: 687b ldr r3, [r7, #4] + 803776a: 7b9b ldrb r3, [r3, #14] + 803776c: 2b00 cmp r3, #0 + 803776e: d106 bne.n 803777e + 8037770: 4b30 ldr r3, [pc, #192] ; (8037834 ) + 8037772: f240 22f1 movw r2, #753 ; 0x2f1 + 8037776: 4932 ldr r1, [pc, #200] ; (8037840 ) + 8037778: 4830 ldr r0, [pc, #192] ; (803783c ) + 803777a: f009 f9c9 bl 8040b10 /* decrease reference count (number of pointers to pbuf) */ ref = --(p->ref); - 803774e: 687b ldr r3, [r7, #4] - 8037750: 7b9b ldrb r3, [r3, #14] - 8037752: 3b01 subs r3, #1 - 8037754: b2da uxtb r2, r3 - 8037756: 687b ldr r3, [r7, #4] - 8037758: 739a strb r2, [r3, #14] - 803775a: 687b ldr r3, [r7, #4] - 803775c: 7b9b ldrb r3, [r3, #14] - 803775e: 75bb strb r3, [r7, #22] + 803777e: 687b ldr r3, [r7, #4] + 8037780: 7b9b ldrb r3, [r3, #14] + 8037782: 3b01 subs r3, #1 + 8037784: b2da uxtb r2, r3 + 8037786: 687b ldr r3, [r7, #4] + 8037788: 739a strb r2, [r3, #14] + 803778a: 687b ldr r3, [r7, #4] + 803778c: 7b9b ldrb r3, [r3, #14] + 803778e: 75bb strb r3, [r7, #22] SYS_ARCH_UNPROTECT(old_level); /* this pbuf is no longer referenced to? */ if (ref == 0) { - 8037760: 7dbb ldrb r3, [r7, #22] - 8037762: 2b00 cmp r3, #0 - 8037764: d143 bne.n 80377ee + 8037790: 7dbb ldrb r3, [r7, #22] + 8037792: 2b00 cmp r3, #0 + 8037794: d143 bne.n 803781e /* remember next pbuf in chain for next iteration */ q = p->next; - 8037766: 687b ldr r3, [r7, #4] - 8037768: 681b ldr r3, [r3, #0] - 803776a: 613b str r3, [r7, #16] + 8037796: 687b ldr r3, [r7, #4] + 8037798: 681b ldr r3, [r3, #0] + 803779a: 613b str r3, [r7, #16] LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p)); alloc_src = pbuf_get_allocsrc(p); - 803776c: 687b ldr r3, [r7, #4] - 803776e: 7b1b ldrb r3, [r3, #12] - 8037770: f003 030f and.w r3, r3, #15 - 8037774: 73fb strb r3, [r7, #15] + 803779c: 687b ldr r3, [r7, #4] + 803779e: 7b1b ldrb r3, [r3, #12] + 80377a0: f003 030f and.w r3, r3, #15 + 80377a4: 73fb strb r3, [r7, #15] #if LWIP_SUPPORT_CUSTOM_PBUF /* is this a custom pbuf? */ if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) { - 8037776: 687b ldr r3, [r7, #4] - 8037778: 7b5b ldrb r3, [r3, #13] - 803777a: f003 0302 and.w r3, r3, #2 - 803777e: 2b00 cmp r3, #0 - 8037780: d011 beq.n 80377a6 + 80377a6: 687b ldr r3, [r7, #4] + 80377a8: 7b5b ldrb r3, [r3, #13] + 80377aa: f003 0302 and.w r3, r3, #2 + 80377ae: 2b00 cmp r3, #0 + 80377b0: d011 beq.n 80377d6 struct pbuf_custom *pc = (struct pbuf_custom *)p; - 8037782: 687b ldr r3, [r7, #4] - 8037784: 60bb str r3, [r7, #8] + 80377b2: 687b ldr r3, [r7, #4] + 80377b4: 60bb str r3, [r7, #8] LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL); - 8037786: 68bb ldr r3, [r7, #8] - 8037788: 691b ldr r3, [r3, #16] - 803778a: 2b00 cmp r3, #0 - 803778c: d106 bne.n 803779c - 803778e: 4b1d ldr r3, [pc, #116] ; (8037804 ) - 8037790: f240 22ff movw r2, #767 ; 0x2ff - 8037794: 491f ldr r1, [pc, #124] ; (8037814 ) - 8037796: 481d ldr r0, [pc, #116] ; (803780c ) - 8037798: f009 f9a2 bl 8040ae0 + 80377b6: 68bb ldr r3, [r7, #8] + 80377b8: 691b ldr r3, [r3, #16] + 80377ba: 2b00 cmp r3, #0 + 80377bc: d106 bne.n 80377cc + 80377be: 4b1d ldr r3, [pc, #116] ; (8037834 ) + 80377c0: f240 22ff movw r2, #767 ; 0x2ff + 80377c4: 491f ldr r1, [pc, #124] ; (8037844 ) + 80377c6: 481d ldr r0, [pc, #116] ; (803783c ) + 80377c8: f009 f9a2 bl 8040b10 pc->custom_free_function(p); - 803779c: 68bb ldr r3, [r7, #8] - 803779e: 691b ldr r3, [r3, #16] - 80377a0: 6878 ldr r0, [r7, #4] - 80377a2: 4798 blx r3 - 80377a4: e01d b.n 80377e2 + 80377cc: 68bb ldr r3, [r7, #8] + 80377ce: 691b ldr r3, [r3, #16] + 80377d0: 6878 ldr r0, [r7, #4] + 80377d2: 4798 blx r3 + 80377d4: e01d b.n 8037812 } else #endif /* LWIP_SUPPORT_CUSTOM_PBUF */ { /* is this a pbuf from the pool? */ if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL) { - 80377a6: 7bfb ldrb r3, [r7, #15] - 80377a8: 2b02 cmp r3, #2 - 80377aa: d104 bne.n 80377b6 + 80377d6: 7bfb ldrb r3, [r7, #15] + 80377d8: 2b02 cmp r3, #2 + 80377da: d104 bne.n 80377e6 memp_free(MEMP_PBUF_POOL, p); - 80377ac: 6879 ldr r1, [r7, #4] - 80377ae: 2008 movs r0, #8 - 80377b0: f7ff f91a bl 80369e8 - 80377b4: e015 b.n 80377e2 + 80377dc: 6879 ldr r1, [r7, #4] + 80377de: 2008 movs r0, #8 + 80377e0: f7ff f91a bl 8036a18 + 80377e4: e015 b.n 8037812 /* is this a ROM or RAM referencing pbuf? */ } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF) { - 80377b6: 7bfb ldrb r3, [r7, #15] - 80377b8: 2b01 cmp r3, #1 - 80377ba: d104 bne.n 80377c6 + 80377e6: 7bfb ldrb r3, [r7, #15] + 80377e8: 2b01 cmp r3, #1 + 80377ea: d104 bne.n 80377f6 memp_free(MEMP_PBUF, p); - 80377bc: 6879 ldr r1, [r7, #4] - 80377be: 2007 movs r0, #7 - 80377c0: f7ff f912 bl 80369e8 - 80377c4: e00d b.n 80377e2 + 80377ec: 6879 ldr r1, [r7, #4] + 80377ee: 2007 movs r0, #7 + 80377f0: f7ff f912 bl 8036a18 + 80377f4: e00d b.n 8037812 /* type == PBUF_RAM */ } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) { - 80377c6: 7bfb ldrb r3, [r7, #15] - 80377c8: 2b00 cmp r3, #0 - 80377ca: d103 bne.n 80377d4 + 80377f6: 7bfb ldrb r3, [r7, #15] + 80377f8: 2b00 cmp r3, #0 + 80377fa: d103 bne.n 8037804 mem_free(p); - 80377cc: 6878 ldr r0, [r7, #4] - 80377ce: f7fe fda5 bl 803631c - 80377d2: e006 b.n 80377e2 + 80377fc: 6878 ldr r0, [r7, #4] + 80377fe: f7fe fda5 bl 803634c + 8037802: e006 b.n 8037812 } else { /* @todo: support freeing other types */ LWIP_ASSERT("invalid pbuf type", 0); - 80377d4: 4b0b ldr r3, [pc, #44] ; (8037804 ) - 80377d6: f240 320f movw r2, #783 ; 0x30f - 80377da: 490f ldr r1, [pc, #60] ; (8037818 ) - 80377dc: 480b ldr r0, [pc, #44] ; (803780c ) - 80377de: f009 f97f bl 8040ae0 + 8037804: 4b0b ldr r3, [pc, #44] ; (8037834 ) + 8037806: f240 320f movw r2, #783 ; 0x30f + 803780a: 490f ldr r1, [pc, #60] ; (8037848 ) + 803780c: 480b ldr r0, [pc, #44] ; (803783c ) + 803780e: f009 f97f bl 8040b10 } } count++; - 80377e2: 7dfb ldrb r3, [r7, #23] - 80377e4: 3301 adds r3, #1 - 80377e6: 75fb strb r3, [r7, #23] + 8037812: 7dfb ldrb r3, [r7, #23] + 8037814: 3301 adds r3, #1 + 8037816: 75fb strb r3, [r7, #23] /* proceed to next pbuf */ p = q; - 80377e8: 693b ldr r3, [r7, #16] - 80377ea: 607b str r3, [r7, #4] - 80377ec: e001 b.n 80377f2 + 8037818: 693b ldr r3, [r7, #16] + 803781a: 607b str r3, [r7, #4] + 803781c: e001 b.n 8037822 /* p->ref > 0, this pbuf is still referenced to */ /* (and so the remaining pbufs in chain as well) */ } else { LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)ref)); /* stop walking through the chain */ p = NULL; - 80377ee: 2300 movs r3, #0 - 80377f0: 607b str r3, [r7, #4] + 803781e: 2300 movs r3, #0 + 8037820: 607b str r3, [r7, #4] while (p != NULL) { - 80377f2: 687b ldr r3, [r7, #4] - 80377f4: 2b00 cmp r3, #0 - 80377f6: d19f bne.n 8037738 + 8037822: 687b ldr r3, [r7, #4] + 8037824: 2b00 cmp r3, #0 + 8037826: d19f bne.n 8037768 } } PERF_STOP("pbuf_free"); /* return number of de-allocated pbufs */ return count; - 80377f8: 7dfb ldrb r3, [r7, #23] -} - 80377fa: 4618 mov r0, r3 - 80377fc: 3718 adds r7, #24 - 80377fe: 46bd mov sp, r7 - 8037800: bd80 pop {r7, pc} - 8037802: bf00 nop - 8037804: 08042868 .word 0x08042868 - 8037808: 080429cc .word 0x080429cc - 803780c: 080428c8 .word 0x080428c8 - 8037810: 080429f8 .word 0x080429f8 - 8037814: 08042a10 .word 0x08042a10 - 8037818: 08042a34 .word 0x08042a34 - -0803781c : + 8037828: 7dfb ldrb r3, [r7, #23] +} + 803782a: 4618 mov r0, r3 + 803782c: 3718 adds r7, #24 + 803782e: 46bd mov sp, r7 + 8037830: bd80 pop {r7, pc} + 8037832: bf00 nop + 8037834: 08042898 .word 0x08042898 + 8037838: 080429fc .word 0x080429fc + 803783c: 080428f8 .word 0x080428f8 + 8037840: 08042a28 .word 0x08042a28 + 8037844: 08042a40 .word 0x08042a40 + 8037848: 08042a64 .word 0x08042a64 + +0803784c : * @param p first pbuf of chain * @return the number of pbufs in a chain */ u16_t pbuf_clen(const struct pbuf *p) { - 803781c: b480 push {r7} - 803781e: b085 sub sp, #20 - 8037820: af00 add r7, sp, #0 - 8037822: 6078 str r0, [r7, #4] + 803784c: b480 push {r7} + 803784e: b085 sub sp, #20 + 8037850: af00 add r7, sp, #0 + 8037852: 6078 str r0, [r7, #4] u16_t len; len = 0; - 8037824: 2300 movs r3, #0 - 8037826: 81fb strh r3, [r7, #14] + 8037854: 2300 movs r3, #0 + 8037856: 81fb strh r3, [r7, #14] while (p != NULL) { - 8037828: e005 b.n 8037836 + 8037858: e005 b.n 8037866 ++len; - 803782a: 89fb ldrh r3, [r7, #14] - 803782c: 3301 adds r3, #1 - 803782e: 81fb strh r3, [r7, #14] + 803785a: 89fb ldrh r3, [r7, #14] + 803785c: 3301 adds r3, #1 + 803785e: 81fb strh r3, [r7, #14] p = p->next; - 8037830: 687b ldr r3, [r7, #4] - 8037832: 681b ldr r3, [r3, #0] - 8037834: 607b str r3, [r7, #4] + 8037860: 687b ldr r3, [r7, #4] + 8037862: 681b ldr r3, [r3, #0] + 8037864: 607b str r3, [r7, #4] while (p != NULL) { - 8037836: 687b ldr r3, [r7, #4] - 8037838: 2b00 cmp r3, #0 - 803783a: d1f6 bne.n 803782a + 8037866: 687b ldr r3, [r7, #4] + 8037868: 2b00 cmp r3, #0 + 803786a: d1f6 bne.n 803785a } return len; - 803783c: 89fb ldrh r3, [r7, #14] + 803786c: 89fb ldrh r3, [r7, #14] } - 803783e: 4618 mov r0, r3 - 8037840: 3714 adds r7, #20 - 8037842: 46bd mov sp, r7 - 8037844: f85d 7b04 ldr.w r7, [sp], #4 - 8037848: 4770 bx lr + 803786e: 4618 mov r0, r3 + 8037870: 3714 adds r7, #20 + 8037872: 46bd mov sp, r7 + 8037874: f85d 7b04 ldr.w r7, [sp], #4 + 8037878: 4770 bx lr ... -0803784c : +0803787c : * @param p pbuf to increase reference counter of * */ void pbuf_ref(struct pbuf *p) { - 803784c: b580 push {r7, lr} - 803784e: b082 sub sp, #8 - 8037850: af00 add r7, sp, #0 - 8037852: 6078 str r0, [r7, #4] + 803787c: b580 push {r7, lr} + 803787e: b082 sub sp, #8 + 8037880: af00 add r7, sp, #0 + 8037882: 6078 str r0, [r7, #4] /* pbuf given? */ if (p != NULL) { - 8037854: 687b ldr r3, [r7, #4] - 8037856: 2b00 cmp r3, #0 - 8037858: d010 beq.n 803787c + 8037884: 687b ldr r3, [r7, #4] + 8037886: 2b00 cmp r3, #0 + 8037888: d010 beq.n 80378ac SYS_ARCH_SET(p->ref, (LWIP_PBUF_REF_T)(p->ref + 1)); - 803785a: 687b ldr r3, [r7, #4] - 803785c: 7b9b ldrb r3, [r3, #14] - 803785e: 3301 adds r3, #1 - 8037860: b2da uxtb r2, r3 - 8037862: 687b ldr r3, [r7, #4] - 8037864: 739a strb r2, [r3, #14] + 803788a: 687b ldr r3, [r7, #4] + 803788c: 7b9b ldrb r3, [r3, #14] + 803788e: 3301 adds r3, #1 + 8037890: b2da uxtb r2, r3 + 8037892: 687b ldr r3, [r7, #4] + 8037894: 739a strb r2, [r3, #14] LWIP_ASSERT("pbuf ref overflow", p->ref > 0); - 8037866: 687b ldr r3, [r7, #4] - 8037868: 7b9b ldrb r3, [r3, #14] - 803786a: 2b00 cmp r3, #0 - 803786c: d106 bne.n 803787c - 803786e: 4b05 ldr r3, [pc, #20] ; (8037884 ) - 8037870: f240 3242 movw r2, #834 ; 0x342 - 8037874: 4904 ldr r1, [pc, #16] ; (8037888 ) - 8037876: 4805 ldr r0, [pc, #20] ; (803788c ) - 8037878: f009 f932 bl 8040ae0 - } -} - 803787c: bf00 nop - 803787e: 3708 adds r7, #8 - 8037880: 46bd mov sp, r7 - 8037882: bd80 pop {r7, pc} - 8037884: 08042868 .word 0x08042868 - 8037888: 08042a48 .word 0x08042a48 - 803788c: 080428c8 .word 0x080428c8 - -08037890 : + 8037896: 687b ldr r3, [r7, #4] + 8037898: 7b9b ldrb r3, [r3, #14] + 803789a: 2b00 cmp r3, #0 + 803789c: d106 bne.n 80378ac + 803789e: 4b05 ldr r3, [pc, #20] ; (80378b4 ) + 80378a0: f240 3242 movw r2, #834 ; 0x342 + 80378a4: 4904 ldr r1, [pc, #16] ; (80378b8 ) + 80378a6: 4805 ldr r0, [pc, #20] ; (80378bc ) + 80378a8: f009 f932 bl 8040b10 + } +} + 80378ac: bf00 nop + 80378ae: 3708 adds r7, #8 + 80378b0: 46bd mov sp, r7 + 80378b2: bd80 pop {r7, pc} + 80378b4: 08042898 .word 0x08042898 + 80378b8: 08042a78 .word 0x08042a78 + 80378bc: 080428f8 .word 0x080428f8 + +080378c0 : * * @see pbuf_chain() */ void pbuf_cat(struct pbuf *h, struct pbuf *t) { - 8037890: b580 push {r7, lr} - 8037892: b084 sub sp, #16 - 8037894: af00 add r7, sp, #0 - 8037896: 6078 str r0, [r7, #4] - 8037898: 6039 str r1, [r7, #0] + 80378c0: b580 push {r7, lr} + 80378c2: b084 sub sp, #16 + 80378c4: af00 add r7, sp, #0 + 80378c6: 6078 str r0, [r7, #4] + 80378c8: 6039 str r1, [r7, #0] struct pbuf *p; LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)", - 803789a: 687b ldr r3, [r7, #4] - 803789c: 2b00 cmp r3, #0 - 803789e: d002 beq.n 80378a6 - 80378a0: 683b ldr r3, [r7, #0] - 80378a2: 2b00 cmp r3, #0 - 80378a4: d107 bne.n 80378b6 - 80378a6: 4b20 ldr r3, [pc, #128] ; (8037928 ) - 80378a8: f240 3259 movw r2, #857 ; 0x359 - 80378ac: 491f ldr r1, [pc, #124] ; (803792c ) - 80378ae: 4820 ldr r0, [pc, #128] ; (8037930 ) - 80378b0: f009 f916 bl 8040ae0 - 80378b4: e034 b.n 8037920 + 80378ca: 687b ldr r3, [r7, #4] + 80378cc: 2b00 cmp r3, #0 + 80378ce: d002 beq.n 80378d6 + 80378d0: 683b ldr r3, [r7, #0] + 80378d2: 2b00 cmp r3, #0 + 80378d4: d107 bne.n 80378e6 + 80378d6: 4b20 ldr r3, [pc, #128] ; (8037958 ) + 80378d8: f240 3259 movw r2, #857 ; 0x359 + 80378dc: 491f ldr r1, [pc, #124] ; (803795c ) + 80378de: 4820 ldr r0, [pc, #128] ; (8037960 ) + 80378e0: f009 f916 bl 8040b10 + 80378e4: e034 b.n 8037950 ((h != NULL) && (t != NULL)), return;); /* proceed to last pbuf of chain */ for (p = h; p->next != NULL; p = p->next) { - 80378b6: 687b ldr r3, [r7, #4] - 80378b8: 60fb str r3, [r7, #12] - 80378ba: e00a b.n 80378d2 + 80378e6: 687b ldr r3, [r7, #4] + 80378e8: 60fb str r3, [r7, #12] + 80378ea: e00a b.n 8037902 /* add total length of second chain to all totals of first chain */ p->tot_len = (u16_t)(p->tot_len + t->tot_len); - 80378bc: 68fb ldr r3, [r7, #12] - 80378be: 891a ldrh r2, [r3, #8] - 80378c0: 683b ldr r3, [r7, #0] - 80378c2: 891b ldrh r3, [r3, #8] - 80378c4: 4413 add r3, r2 - 80378c6: b29a uxth r2, r3 - 80378c8: 68fb ldr r3, [r7, #12] - 80378ca: 811a strh r2, [r3, #8] + 80378ec: 68fb ldr r3, [r7, #12] + 80378ee: 891a ldrh r2, [r3, #8] + 80378f0: 683b ldr r3, [r7, #0] + 80378f2: 891b ldrh r3, [r3, #8] + 80378f4: 4413 add r3, r2 + 80378f6: b29a uxth r2, r3 + 80378f8: 68fb ldr r3, [r7, #12] + 80378fa: 811a strh r2, [r3, #8] for (p = h; p->next != NULL; p = p->next) { - 80378cc: 68fb ldr r3, [r7, #12] - 80378ce: 681b ldr r3, [r3, #0] - 80378d0: 60fb str r3, [r7, #12] - 80378d2: 68fb ldr r3, [r7, #12] - 80378d4: 681b ldr r3, [r3, #0] - 80378d6: 2b00 cmp r3, #0 - 80378d8: d1f0 bne.n 80378bc + 80378fc: 68fb ldr r3, [r7, #12] + 80378fe: 681b ldr r3, [r3, #0] + 8037900: 60fb str r3, [r7, #12] + 8037902: 68fb ldr r3, [r7, #12] + 8037904: 681b ldr r3, [r3, #0] + 8037906: 2b00 cmp r3, #0 + 8037908: d1f0 bne.n 80378ec } /* { p is last pbuf of first h chain, p->next == NULL } */ LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len); - 80378da: 68fb ldr r3, [r7, #12] - 80378dc: 891a ldrh r2, [r3, #8] - 80378de: 68fb ldr r3, [r7, #12] - 80378e0: 895b ldrh r3, [r3, #10] - 80378e2: 429a cmp r2, r3 - 80378e4: d006 beq.n 80378f4 - 80378e6: 4b10 ldr r3, [pc, #64] ; (8037928 ) - 80378e8: f240 3262 movw r2, #866 ; 0x362 - 80378ec: 4911 ldr r1, [pc, #68] ; (8037934 ) - 80378ee: 4810 ldr r0, [pc, #64] ; (8037930 ) - 80378f0: f009 f8f6 bl 8040ae0 + 803790a: 68fb ldr r3, [r7, #12] + 803790c: 891a ldrh r2, [r3, #8] + 803790e: 68fb ldr r3, [r7, #12] + 8037910: 895b ldrh r3, [r3, #10] + 8037912: 429a cmp r2, r3 + 8037914: d006 beq.n 8037924 + 8037916: 4b10 ldr r3, [pc, #64] ; (8037958 ) + 8037918: f240 3262 movw r2, #866 ; 0x362 + 803791c: 4911 ldr r1, [pc, #68] ; (8037964 ) + 803791e: 4810 ldr r0, [pc, #64] ; (8037960 ) + 8037920: f009 f8f6 bl 8040b10 LWIP_ASSERT("p->next == NULL", p->next == NULL); - 80378f4: 68fb ldr r3, [r7, #12] - 80378f6: 681b ldr r3, [r3, #0] - 80378f8: 2b00 cmp r3, #0 - 80378fa: d006 beq.n 803790a - 80378fc: 4b0a ldr r3, [pc, #40] ; (8037928 ) - 80378fe: f240 3263 movw r2, #867 ; 0x363 - 8037902: 490d ldr r1, [pc, #52] ; (8037938 ) - 8037904: 480a ldr r0, [pc, #40] ; (8037930 ) - 8037906: f009 f8eb bl 8040ae0 + 8037924: 68fb ldr r3, [r7, #12] + 8037926: 681b ldr r3, [r3, #0] + 8037928: 2b00 cmp r3, #0 + 803792a: d006 beq.n 803793a + 803792c: 4b0a ldr r3, [pc, #40] ; (8037958 ) + 803792e: f240 3263 movw r2, #867 ; 0x363 + 8037932: 490d ldr r1, [pc, #52] ; (8037968 ) + 8037934: 480a ldr r0, [pc, #40] ; (8037960 ) + 8037936: f009 f8eb bl 8040b10 /* add total length of second chain to last pbuf total of first chain */ p->tot_len = (u16_t)(p->tot_len + t->tot_len); - 803790a: 68fb ldr r3, [r7, #12] - 803790c: 891a ldrh r2, [r3, #8] - 803790e: 683b ldr r3, [r7, #0] - 8037910: 891b ldrh r3, [r3, #8] - 8037912: 4413 add r3, r2 - 8037914: b29a uxth r2, r3 - 8037916: 68fb ldr r3, [r7, #12] - 8037918: 811a strh r2, [r3, #8] + 803793a: 68fb ldr r3, [r7, #12] + 803793c: 891a ldrh r2, [r3, #8] + 803793e: 683b ldr r3, [r7, #0] + 8037940: 891b ldrh r3, [r3, #8] + 8037942: 4413 add r3, r2 + 8037944: b29a uxth r2, r3 + 8037946: 68fb ldr r3, [r7, #12] + 8037948: 811a strh r2, [r3, #8] /* chain last pbuf of head (p) with first of tail (t) */ p->next = t; - 803791a: 68fb ldr r3, [r7, #12] - 803791c: 683a ldr r2, [r7, #0] - 803791e: 601a str r2, [r3, #0] + 803794a: 68fb ldr r3, [r7, #12] + 803794c: 683a ldr r2, [r7, #0] + 803794e: 601a str r2, [r3, #0] /* p->next now references t, but the caller will drop its reference to t, * so netto there is no change to the reference count of t. */ } - 8037920: 3710 adds r7, #16 - 8037922: 46bd mov sp, r7 - 8037924: bd80 pop {r7, pc} - 8037926: bf00 nop - 8037928: 08042868 .word 0x08042868 - 803792c: 08042a5c .word 0x08042a5c - 8037930: 080428c8 .word 0x080428c8 - 8037934: 08042a94 .word 0x08042a94 - 8037938: 08042ac4 .word 0x08042ac4 - -0803793c : + 8037950: 3710 adds r7, #16 + 8037952: 46bd mov sp, r7 + 8037954: bd80 pop {r7, pc} + 8037956: bf00 nop + 8037958: 08042898 .word 0x08042898 + 803795c: 08042a8c .word 0x08042a8c + 8037960: 080428f8 .word 0x080428f8 + 8037964: 08042ac4 .word 0x08042ac4 + 8037968: 08042af4 .word 0x08042af4 + +0803796c : * ERR_ARG if one of the pbufs is NULL or p_to is not big * enough to hold p_from */ err_t pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from) { - 803793c: b580 push {r7, lr} - 803793e: b086 sub sp, #24 - 8037940: af00 add r7, sp, #0 - 8037942: 6078 str r0, [r7, #4] - 8037944: 6039 str r1, [r7, #0] + 803796c: b580 push {r7, lr} + 803796e: b086 sub sp, #24 + 8037970: af00 add r7, sp, #0 + 8037972: 6078 str r0, [r7, #4] + 8037974: 6039 str r1, [r7, #0] size_t offset_to = 0, offset_from = 0, len; - 8037946: 2300 movs r3, #0 - 8037948: 617b str r3, [r7, #20] - 803794a: 2300 movs r3, #0 - 803794c: 613b str r3, [r7, #16] + 8037976: 2300 movs r3, #0 + 8037978: 617b str r3, [r7, #20] + 803797a: 2300 movs r3, #0 + 803797c: 613b str r3, [r7, #16] LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n", (const void *)p_to, (const void *)p_from)); /* is the target big enough to hold the source? */ LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) && - 803794e: 687b ldr r3, [r7, #4] - 8037950: 2b00 cmp r3, #0 - 8037952: d008 beq.n 8037966 - 8037954: 683b ldr r3, [r7, #0] - 8037956: 2b00 cmp r3, #0 - 8037958: d005 beq.n 8037966 - 803795a: 687b ldr r3, [r7, #4] - 803795c: 891a ldrh r2, [r3, #8] - 803795e: 683b ldr r3, [r7, #0] - 8037960: 891b ldrh r3, [r3, #8] - 8037962: 429a cmp r2, r3 - 8037964: d209 bcs.n 803797a - 8037966: 4b57 ldr r3, [pc, #348] ; (8037ac4 ) - 8037968: f240 32c9 movw r2, #969 ; 0x3c9 - 803796c: 4956 ldr r1, [pc, #344] ; (8037ac8 ) - 803796e: 4857 ldr r0, [pc, #348] ; (8037acc ) - 8037970: f009 f8b6 bl 8040ae0 - 8037974: f06f 030f mvn.w r3, #15 - 8037978: e09f b.n 8037aba + 803797e: 687b ldr r3, [r7, #4] + 8037980: 2b00 cmp r3, #0 + 8037982: d008 beq.n 8037996 + 8037984: 683b ldr r3, [r7, #0] + 8037986: 2b00 cmp r3, #0 + 8037988: d005 beq.n 8037996 + 803798a: 687b ldr r3, [r7, #4] + 803798c: 891a ldrh r2, [r3, #8] + 803798e: 683b ldr r3, [r7, #0] + 8037990: 891b ldrh r3, [r3, #8] + 8037992: 429a cmp r2, r3 + 8037994: d209 bcs.n 80379aa + 8037996: 4b57 ldr r3, [pc, #348] ; (8037af4 ) + 8037998: f240 32c9 movw r2, #969 ; 0x3c9 + 803799c: 4956 ldr r1, [pc, #344] ; (8037af8 ) + 803799e: 4857 ldr r0, [pc, #348] ; (8037afc ) + 80379a0: f009 f8b6 bl 8040b10 + 80379a4: f06f 030f mvn.w r3, #15 + 80379a8: e09f b.n 8037aea (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;); /* iterate through pbuf chain */ do { /* copy one part of the original chain */ if ((p_to->len - offset_to) >= (p_from->len - offset_from)) { - 803797a: 687b ldr r3, [r7, #4] - 803797c: 895b ldrh r3, [r3, #10] - 803797e: 461a mov r2, r3 - 8037980: 697b ldr r3, [r7, #20] - 8037982: 1ad2 subs r2, r2, r3 - 8037984: 683b ldr r3, [r7, #0] - 8037986: 895b ldrh r3, [r3, #10] - 8037988: 4619 mov r1, r3 - 803798a: 693b ldr r3, [r7, #16] - 803798c: 1acb subs r3, r1, r3 - 803798e: 429a cmp r2, r3 - 8037990: d306 bcc.n 80379a0 + 80379aa: 687b ldr r3, [r7, #4] + 80379ac: 895b ldrh r3, [r3, #10] + 80379ae: 461a mov r2, r3 + 80379b0: 697b ldr r3, [r7, #20] + 80379b2: 1ad2 subs r2, r2, r3 + 80379b4: 683b ldr r3, [r7, #0] + 80379b6: 895b ldrh r3, [r3, #10] + 80379b8: 4619 mov r1, r3 + 80379ba: 693b ldr r3, [r7, #16] + 80379bc: 1acb subs r3, r1, r3 + 80379be: 429a cmp r2, r3 + 80379c0: d306 bcc.n 80379d0 /* complete current p_from fits into current p_to */ len = p_from->len - offset_from; - 8037992: 683b ldr r3, [r7, #0] - 8037994: 895b ldrh r3, [r3, #10] - 8037996: 461a mov r2, r3 - 8037998: 693b ldr r3, [r7, #16] - 803799a: 1ad3 subs r3, r2, r3 - 803799c: 60fb str r3, [r7, #12] - 803799e: e005 b.n 80379ac + 80379c2: 683b ldr r3, [r7, #0] + 80379c4: 895b ldrh r3, [r3, #10] + 80379c6: 461a mov r2, r3 + 80379c8: 693b ldr r3, [r7, #16] + 80379ca: 1ad3 subs r3, r2, r3 + 80379cc: 60fb str r3, [r7, #12] + 80379ce: e005 b.n 80379dc } else { /* current p_from does not fit into current p_to */ len = p_to->len - offset_to; - 80379a0: 687b ldr r3, [r7, #4] - 80379a2: 895b ldrh r3, [r3, #10] - 80379a4: 461a mov r2, r3 - 80379a6: 697b ldr r3, [r7, #20] - 80379a8: 1ad3 subs r3, r2, r3 - 80379aa: 60fb str r3, [r7, #12] + 80379d0: 687b ldr r3, [r7, #4] + 80379d2: 895b ldrh r3, [r3, #10] + 80379d4: 461a mov r2, r3 + 80379d6: 697b ldr r3, [r7, #20] + 80379d8: 1ad3 subs r3, r2, r3 + 80379da: 60fb str r3, [r7, #12] } MEMCPY((u8_t *)p_to->payload + offset_to, (u8_t *)p_from->payload + offset_from, len); - 80379ac: 687b ldr r3, [r7, #4] - 80379ae: 685a ldr r2, [r3, #4] - 80379b0: 697b ldr r3, [r7, #20] - 80379b2: 18d0 adds r0, r2, r3 - 80379b4: 683b ldr r3, [r7, #0] - 80379b6: 685a ldr r2, [r3, #4] - 80379b8: 693b ldr r3, [r7, #16] - 80379ba: 4413 add r3, r2 - 80379bc: 68fa ldr r2, [r7, #12] - 80379be: 4619 mov r1, r3 - 80379c0: f008 ff7e bl 80408c0 + 80379dc: 687b ldr r3, [r7, #4] + 80379de: 685a ldr r2, [r3, #4] + 80379e0: 697b ldr r3, [r7, #20] + 80379e2: 18d0 adds r0, r2, r3 + 80379e4: 683b ldr r3, [r7, #0] + 80379e6: 685a ldr r2, [r3, #4] + 80379e8: 693b ldr r3, [r7, #16] + 80379ea: 4413 add r3, r2 + 80379ec: 68fa ldr r2, [r7, #12] + 80379ee: 4619 mov r1, r3 + 80379f0: f008 ff7e bl 80408f0 offset_to += len; - 80379c4: 697a ldr r2, [r7, #20] - 80379c6: 68fb ldr r3, [r7, #12] - 80379c8: 4413 add r3, r2 - 80379ca: 617b str r3, [r7, #20] + 80379f4: 697a ldr r2, [r7, #20] + 80379f6: 68fb ldr r3, [r7, #12] + 80379f8: 4413 add r3, r2 + 80379fa: 617b str r3, [r7, #20] offset_from += len; - 80379cc: 693a ldr r2, [r7, #16] - 80379ce: 68fb ldr r3, [r7, #12] - 80379d0: 4413 add r3, r2 - 80379d2: 613b str r3, [r7, #16] + 80379fc: 693a ldr r2, [r7, #16] + 80379fe: 68fb ldr r3, [r7, #12] + 8037a00: 4413 add r3, r2 + 8037a02: 613b str r3, [r7, #16] LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len); - 80379d4: 687b ldr r3, [r7, #4] - 80379d6: 895b ldrh r3, [r3, #10] - 80379d8: 461a mov r2, r3 - 80379da: 697b ldr r3, [r7, #20] - 80379dc: 4293 cmp r3, r2 - 80379de: d906 bls.n 80379ee - 80379e0: 4b38 ldr r3, [pc, #224] ; (8037ac4 ) - 80379e2: f240 32d9 movw r2, #985 ; 0x3d9 - 80379e6: 493a ldr r1, [pc, #232] ; (8037ad0 ) - 80379e8: 4838 ldr r0, [pc, #224] ; (8037acc ) - 80379ea: f009 f879 bl 8040ae0 + 8037a04: 687b ldr r3, [r7, #4] + 8037a06: 895b ldrh r3, [r3, #10] + 8037a08: 461a mov r2, r3 + 8037a0a: 697b ldr r3, [r7, #20] + 8037a0c: 4293 cmp r3, r2 + 8037a0e: d906 bls.n 8037a1e + 8037a10: 4b38 ldr r3, [pc, #224] ; (8037af4 ) + 8037a12: f240 32d9 movw r2, #985 ; 0x3d9 + 8037a16: 493a ldr r1, [pc, #232] ; (8037b00 ) + 8037a18: 4838 ldr r0, [pc, #224] ; (8037afc ) + 8037a1a: f009 f879 bl 8040b10 LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len); - 80379ee: 683b ldr r3, [r7, #0] - 80379f0: 895b ldrh r3, [r3, #10] - 80379f2: 461a mov r2, r3 - 80379f4: 693b ldr r3, [r7, #16] - 80379f6: 4293 cmp r3, r2 - 80379f8: d906 bls.n 8037a08 - 80379fa: 4b32 ldr r3, [pc, #200] ; (8037ac4 ) - 80379fc: f240 32da movw r2, #986 ; 0x3da - 8037a00: 4934 ldr r1, [pc, #208] ; (8037ad4 ) - 8037a02: 4832 ldr r0, [pc, #200] ; (8037acc ) - 8037a04: f009 f86c bl 8040ae0 + 8037a1e: 683b ldr r3, [r7, #0] + 8037a20: 895b ldrh r3, [r3, #10] + 8037a22: 461a mov r2, r3 + 8037a24: 693b ldr r3, [r7, #16] + 8037a26: 4293 cmp r3, r2 + 8037a28: d906 bls.n 8037a38 + 8037a2a: 4b32 ldr r3, [pc, #200] ; (8037af4 ) + 8037a2c: f240 32da movw r2, #986 ; 0x3da + 8037a30: 4934 ldr r1, [pc, #208] ; (8037b04 ) + 8037a32: 4832 ldr r0, [pc, #200] ; (8037afc ) + 8037a34: f009 f86c bl 8040b10 if (offset_from >= p_from->len) { - 8037a08: 683b ldr r3, [r7, #0] - 8037a0a: 895b ldrh r3, [r3, #10] - 8037a0c: 461a mov r2, r3 - 8037a0e: 693b ldr r3, [r7, #16] - 8037a10: 4293 cmp r3, r2 - 8037a12: d304 bcc.n 8037a1e + 8037a38: 683b ldr r3, [r7, #0] + 8037a3a: 895b ldrh r3, [r3, #10] + 8037a3c: 461a mov r2, r3 + 8037a3e: 693b ldr r3, [r7, #16] + 8037a40: 4293 cmp r3, r2 + 8037a42: d304 bcc.n 8037a4e /* on to next p_from (if any) */ offset_from = 0; - 8037a14: 2300 movs r3, #0 - 8037a16: 613b str r3, [r7, #16] + 8037a44: 2300 movs r3, #0 + 8037a46: 613b str r3, [r7, #16] p_from = p_from->next; - 8037a18: 683b ldr r3, [r7, #0] - 8037a1a: 681b ldr r3, [r3, #0] - 8037a1c: 603b str r3, [r7, #0] + 8037a48: 683b ldr r3, [r7, #0] + 8037a4a: 681b ldr r3, [r3, #0] + 8037a4c: 603b str r3, [r7, #0] } if (offset_to == p_to->len) { - 8037a1e: 687b ldr r3, [r7, #4] - 8037a20: 895b ldrh r3, [r3, #10] - 8037a22: 461a mov r2, r3 - 8037a24: 697b ldr r3, [r7, #20] - 8037a26: 4293 cmp r3, r2 - 8037a28: d114 bne.n 8037a54 + 8037a4e: 687b ldr r3, [r7, #4] + 8037a50: 895b ldrh r3, [r3, #10] + 8037a52: 461a mov r2, r3 + 8037a54: 697b ldr r3, [r7, #20] + 8037a56: 4293 cmp r3, r2 + 8037a58: d114 bne.n 8037a84 /* on to next p_to (if any) */ offset_to = 0; - 8037a2a: 2300 movs r3, #0 - 8037a2c: 617b str r3, [r7, #20] + 8037a5a: 2300 movs r3, #0 + 8037a5c: 617b str r3, [r7, #20] p_to = p_to->next; - 8037a2e: 687b ldr r3, [r7, #4] - 8037a30: 681b ldr r3, [r3, #0] - 8037a32: 607b str r3, [r7, #4] + 8037a5e: 687b ldr r3, [r7, #4] + 8037a60: 681b ldr r3, [r3, #0] + 8037a62: 607b str r3, [r7, #4] LWIP_ERROR("p_to != NULL", (p_to != NULL) || (p_from == NULL), return ERR_ARG;); - 8037a34: 687b ldr r3, [r7, #4] - 8037a36: 2b00 cmp r3, #0 - 8037a38: d10c bne.n 8037a54 - 8037a3a: 683b ldr r3, [r7, #0] - 8037a3c: 2b00 cmp r3, #0 - 8037a3e: d009 beq.n 8037a54 - 8037a40: 4b20 ldr r3, [pc, #128] ; (8037ac4 ) - 8037a42: f44f 7279 mov.w r2, #996 ; 0x3e4 - 8037a46: 4924 ldr r1, [pc, #144] ; (8037ad8 ) - 8037a48: 4820 ldr r0, [pc, #128] ; (8037acc ) - 8037a4a: f009 f849 bl 8040ae0 - 8037a4e: f06f 030f mvn.w r3, #15 - 8037a52: e032 b.n 8037aba + 8037a64: 687b ldr r3, [r7, #4] + 8037a66: 2b00 cmp r3, #0 + 8037a68: d10c bne.n 8037a84 + 8037a6a: 683b ldr r3, [r7, #0] + 8037a6c: 2b00 cmp r3, #0 + 8037a6e: d009 beq.n 8037a84 + 8037a70: 4b20 ldr r3, [pc, #128] ; (8037af4 ) + 8037a72: f44f 7279 mov.w r2, #996 ; 0x3e4 + 8037a76: 4924 ldr r1, [pc, #144] ; (8037b08 ) + 8037a78: 4820 ldr r0, [pc, #128] ; (8037afc ) + 8037a7a: f009 f849 bl 8040b10 + 8037a7e: f06f 030f mvn.w r3, #15 + 8037a82: e032 b.n 8037aea } if ((p_from != NULL) && (p_from->len == p_from->tot_len)) { - 8037a54: 683b ldr r3, [r7, #0] - 8037a56: 2b00 cmp r3, #0 - 8037a58: d013 beq.n 8037a82 - 8037a5a: 683b ldr r3, [r7, #0] - 8037a5c: 895a ldrh r2, [r3, #10] - 8037a5e: 683b ldr r3, [r7, #0] - 8037a60: 891b ldrh r3, [r3, #8] - 8037a62: 429a cmp r2, r3 - 8037a64: d10d bne.n 8037a82 + 8037a84: 683b ldr r3, [r7, #0] + 8037a86: 2b00 cmp r3, #0 + 8037a88: d013 beq.n 8037ab2 + 8037a8a: 683b ldr r3, [r7, #0] + 8037a8c: 895a ldrh r2, [r3, #10] + 8037a8e: 683b ldr r3, [r7, #0] + 8037a90: 891b ldrh r3, [r3, #8] + 8037a92: 429a cmp r2, r3 + 8037a94: d10d bne.n 8037ab2 /* don't copy more than one packet! */ LWIP_ERROR("pbuf_copy() does not allow packet queues!", - 8037a66: 683b ldr r3, [r7, #0] - 8037a68: 681b ldr r3, [r3, #0] - 8037a6a: 2b00 cmp r3, #0 - 8037a6c: d009 beq.n 8037a82 - 8037a6e: 4b15 ldr r3, [pc, #84] ; (8037ac4 ) - 8037a70: f240 32e9 movw r2, #1001 ; 0x3e9 - 8037a74: 4919 ldr r1, [pc, #100] ; (8037adc ) - 8037a76: 4815 ldr r0, [pc, #84] ; (8037acc ) - 8037a78: f009 f832 bl 8040ae0 - 8037a7c: f06f 0305 mvn.w r3, #5 - 8037a80: e01b b.n 8037aba + 8037a96: 683b ldr r3, [r7, #0] + 8037a98: 681b ldr r3, [r3, #0] + 8037a9a: 2b00 cmp r3, #0 + 8037a9c: d009 beq.n 8037ab2 + 8037a9e: 4b15 ldr r3, [pc, #84] ; (8037af4 ) + 8037aa0: f240 32e9 movw r2, #1001 ; 0x3e9 + 8037aa4: 4919 ldr r1, [pc, #100] ; (8037b0c ) + 8037aa6: 4815 ldr r0, [pc, #84] ; (8037afc ) + 8037aa8: f009 f832 bl 8040b10 + 8037aac: f06f 0305 mvn.w r3, #5 + 8037ab0: e01b b.n 8037aea (p_from->next == NULL), return ERR_VAL;); } if ((p_to != NULL) && (p_to->len == p_to->tot_len)) { - 8037a82: 687b ldr r3, [r7, #4] - 8037a84: 2b00 cmp r3, #0 - 8037a86: d013 beq.n 8037ab0 - 8037a88: 687b ldr r3, [r7, #4] - 8037a8a: 895a ldrh r2, [r3, #10] - 8037a8c: 687b ldr r3, [r7, #4] - 8037a8e: 891b ldrh r3, [r3, #8] - 8037a90: 429a cmp r2, r3 - 8037a92: d10d bne.n 8037ab0 + 8037ab2: 687b ldr r3, [r7, #4] + 8037ab4: 2b00 cmp r3, #0 + 8037ab6: d013 beq.n 8037ae0 + 8037ab8: 687b ldr r3, [r7, #4] + 8037aba: 895a ldrh r2, [r3, #10] + 8037abc: 687b ldr r3, [r7, #4] + 8037abe: 891b ldrh r3, [r3, #8] + 8037ac0: 429a cmp r2, r3 + 8037ac2: d10d bne.n 8037ae0 /* don't copy more than one packet! */ LWIP_ERROR("pbuf_copy() does not allow packet queues!", - 8037a94: 687b ldr r3, [r7, #4] - 8037a96: 681b ldr r3, [r3, #0] - 8037a98: 2b00 cmp r3, #0 - 8037a9a: d009 beq.n 8037ab0 - 8037a9c: 4b09 ldr r3, [pc, #36] ; (8037ac4 ) - 8037a9e: f240 32ee movw r2, #1006 ; 0x3ee - 8037aa2: 490e ldr r1, [pc, #56] ; (8037adc ) - 8037aa4: 4809 ldr r0, [pc, #36] ; (8037acc ) - 8037aa6: f009 f81b bl 8040ae0 - 8037aaa: f06f 0305 mvn.w r3, #5 - 8037aae: e004 b.n 8037aba + 8037ac4: 687b ldr r3, [r7, #4] + 8037ac6: 681b ldr r3, [r3, #0] + 8037ac8: 2b00 cmp r3, #0 + 8037aca: d009 beq.n 8037ae0 + 8037acc: 4b09 ldr r3, [pc, #36] ; (8037af4 ) + 8037ace: f240 32ee movw r2, #1006 ; 0x3ee + 8037ad2: 490e ldr r1, [pc, #56] ; (8037b0c ) + 8037ad4: 4809 ldr r0, [pc, #36] ; (8037afc ) + 8037ad6: f009 f81b bl 8040b10 + 8037ada: f06f 0305 mvn.w r3, #5 + 8037ade: e004 b.n 8037aea (p_to->next == NULL), return ERR_VAL;); } } while (p_from); - 8037ab0: 683b ldr r3, [r7, #0] - 8037ab2: 2b00 cmp r3, #0 - 8037ab4: f47f af61 bne.w 803797a + 8037ae0: 683b ldr r3, [r7, #0] + 8037ae2: 2b00 cmp r3, #0 + 8037ae4: f47f af61 bne.w 80379aa LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n")); return ERR_OK; - 8037ab8: 2300 movs r3, #0 -} - 8037aba: 4618 mov r0, r3 - 8037abc: 3718 adds r7, #24 - 8037abe: 46bd mov sp, r7 - 8037ac0: bd80 pop {r7, pc} - 8037ac2: bf00 nop - 8037ac4: 08042868 .word 0x08042868 - 8037ac8: 08042b10 .word 0x08042b10 - 8037acc: 080428c8 .word 0x080428c8 - 8037ad0: 08042b40 .word 0x08042b40 - 8037ad4: 08042b58 .word 0x08042b58 - 8037ad8: 08042b74 .word 0x08042b74 - 8037adc: 08042b84 .word 0x08042b84 - -08037ae0 : + 8037ae8: 2300 movs r3, #0 +} + 8037aea: 4618 mov r0, r3 + 8037aec: 3718 adds r7, #24 + 8037aee: 46bd mov sp, r7 + 8037af0: bd80 pop {r7, pc} + 8037af2: bf00 nop + 8037af4: 08042898 .word 0x08042898 + 8037af8: 08042b40 .word 0x08042b40 + 8037afc: 080428f8 .word 0x080428f8 + 8037b00: 08042b70 .word 0x08042b70 + 8037b04: 08042b88 .word 0x08042b88 + 8037b08: 08042ba4 .word 0x08042ba4 + 8037b0c: 08042bb4 .word 0x08042bb4 + +08037b10 : * @param offset offset into the packet buffer from where to begin copying len bytes * @return the number of bytes copied, or 0 on failure */ u16_t pbuf_copy_partial(const struct pbuf *buf, void *dataptr, u16_t len, u16_t offset) { - 8037ae0: b580 push {r7, lr} - 8037ae2: b088 sub sp, #32 - 8037ae4: af00 add r7, sp, #0 - 8037ae6: 60f8 str r0, [r7, #12] - 8037ae8: 60b9 str r1, [r7, #8] - 8037aea: 4611 mov r1, r2 - 8037aec: 461a mov r2, r3 - 8037aee: 460b mov r3, r1 - 8037af0: 80fb strh r3, [r7, #6] - 8037af2: 4613 mov r3, r2 - 8037af4: 80bb strh r3, [r7, #4] + 8037b10: b580 push {r7, lr} + 8037b12: b088 sub sp, #32 + 8037b14: af00 add r7, sp, #0 + 8037b16: 60f8 str r0, [r7, #12] + 8037b18: 60b9 str r1, [r7, #8] + 8037b1a: 4611 mov r1, r2 + 8037b1c: 461a mov r2, r3 + 8037b1e: 460b mov r3, r1 + 8037b20: 80fb strh r3, [r7, #6] + 8037b22: 4613 mov r3, r2 + 8037b24: 80bb strh r3, [r7, #4] const struct pbuf *p; u16_t left = 0; - 8037af6: 2300 movs r3, #0 - 8037af8: 837b strh r3, [r7, #26] + 8037b26: 2300 movs r3, #0 + 8037b28: 837b strh r3, [r7, #26] u16_t buf_copy_len; u16_t copied_total = 0; - 8037afa: 2300 movs r3, #0 - 8037afc: 82fb strh r3, [r7, #22] + 8037b2a: 2300 movs r3, #0 + 8037b2c: 82fb strh r3, [r7, #22] LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;); - 8037afe: 68fb ldr r3, [r7, #12] - 8037b00: 2b00 cmp r3, #0 - 8037b02: d108 bne.n 8037b16 - 8037b04: 4b2b ldr r3, [pc, #172] ; (8037bb4 ) - 8037b06: f240 420a movw r2, #1034 ; 0x40a - 8037b0a: 492b ldr r1, [pc, #172] ; (8037bb8 ) - 8037b0c: 482b ldr r0, [pc, #172] ; (8037bbc ) - 8037b0e: f008 ffe7 bl 8040ae0 - 8037b12: 2300 movs r3, #0 - 8037b14: e04a b.n 8037bac + 8037b2e: 68fb ldr r3, [r7, #12] + 8037b30: 2b00 cmp r3, #0 + 8037b32: d108 bne.n 8037b46 + 8037b34: 4b2b ldr r3, [pc, #172] ; (8037be4 ) + 8037b36: f240 420a movw r2, #1034 ; 0x40a + 8037b3a: 492b ldr r1, [pc, #172] ; (8037be8 ) + 8037b3c: 482b ldr r0, [pc, #172] ; (8037bec ) + 8037b3e: f008 ffe7 bl 8040b10 + 8037b42: 2300 movs r3, #0 + 8037b44: e04a b.n 8037bdc LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;); - 8037b16: 68bb ldr r3, [r7, #8] - 8037b18: 2b00 cmp r3, #0 - 8037b1a: d108 bne.n 8037b2e - 8037b1c: 4b25 ldr r3, [pc, #148] ; (8037bb4 ) - 8037b1e: f240 420b movw r2, #1035 ; 0x40b - 8037b22: 4927 ldr r1, [pc, #156] ; (8037bc0 ) - 8037b24: 4825 ldr r0, [pc, #148] ; (8037bbc ) - 8037b26: f008 ffdb bl 8040ae0 - 8037b2a: 2300 movs r3, #0 - 8037b2c: e03e b.n 8037bac + 8037b46: 68bb ldr r3, [r7, #8] + 8037b48: 2b00 cmp r3, #0 + 8037b4a: d108 bne.n 8037b5e + 8037b4c: 4b25 ldr r3, [pc, #148] ; (8037be4 ) + 8037b4e: f240 420b movw r2, #1035 ; 0x40b + 8037b52: 4927 ldr r1, [pc, #156] ; (8037bf0 ) + 8037b54: 4825 ldr r0, [pc, #148] ; (8037bec ) + 8037b56: f008 ffdb bl 8040b10 + 8037b5a: 2300 movs r3, #0 + 8037b5c: e03e b.n 8037bdc /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */ for (p = buf; len != 0 && p != NULL; p = p->next) { - 8037b2e: 68fb ldr r3, [r7, #12] - 8037b30: 61fb str r3, [r7, #28] - 8037b32: e034 b.n 8037b9e + 8037b5e: 68fb ldr r3, [r7, #12] + 8037b60: 61fb str r3, [r7, #28] + 8037b62: e034 b.n 8037bce if ((offset != 0) && (offset >= p->len)) { - 8037b34: 88bb ldrh r3, [r7, #4] - 8037b36: 2b00 cmp r3, #0 - 8037b38: d00a beq.n 8037b50 - 8037b3a: 69fb ldr r3, [r7, #28] - 8037b3c: 895b ldrh r3, [r3, #10] - 8037b3e: 88ba ldrh r2, [r7, #4] - 8037b40: 429a cmp r2, r3 - 8037b42: d305 bcc.n 8037b50 + 8037b64: 88bb ldrh r3, [r7, #4] + 8037b66: 2b00 cmp r3, #0 + 8037b68: d00a beq.n 8037b80 + 8037b6a: 69fb ldr r3, [r7, #28] + 8037b6c: 895b ldrh r3, [r3, #10] + 8037b6e: 88ba ldrh r2, [r7, #4] + 8037b70: 429a cmp r2, r3 + 8037b72: d305 bcc.n 8037b80 /* don't copy from this buffer -> on to the next */ offset = (u16_t)(offset - p->len); - 8037b44: 69fb ldr r3, [r7, #28] - 8037b46: 895b ldrh r3, [r3, #10] - 8037b48: 88ba ldrh r2, [r7, #4] - 8037b4a: 1ad3 subs r3, r2, r3 - 8037b4c: 80bb strh r3, [r7, #4] - 8037b4e: e023 b.n 8037b98 + 8037b74: 69fb ldr r3, [r7, #28] + 8037b76: 895b ldrh r3, [r3, #10] + 8037b78: 88ba ldrh r2, [r7, #4] + 8037b7a: 1ad3 subs r3, r2, r3 + 8037b7c: 80bb strh r3, [r7, #4] + 8037b7e: e023 b.n 8037bc8 } else { /* copy from this buffer. maybe only partially. */ buf_copy_len = (u16_t)(p->len - offset); - 8037b50: 69fb ldr r3, [r7, #28] - 8037b52: 895a ldrh r2, [r3, #10] - 8037b54: 88bb ldrh r3, [r7, #4] - 8037b56: 1ad3 subs r3, r2, r3 - 8037b58: 833b strh r3, [r7, #24] + 8037b80: 69fb ldr r3, [r7, #28] + 8037b82: 895a ldrh r2, [r3, #10] + 8037b84: 88bb ldrh r3, [r7, #4] + 8037b86: 1ad3 subs r3, r2, r3 + 8037b88: 833b strh r3, [r7, #24] if (buf_copy_len > len) { - 8037b5a: 8b3a ldrh r2, [r7, #24] - 8037b5c: 88fb ldrh r3, [r7, #6] - 8037b5e: 429a cmp r2, r3 - 8037b60: d901 bls.n 8037b66 + 8037b8a: 8b3a ldrh r2, [r7, #24] + 8037b8c: 88fb ldrh r3, [r7, #6] + 8037b8e: 429a cmp r2, r3 + 8037b90: d901 bls.n 8037b96 buf_copy_len = len; - 8037b62: 88fb ldrh r3, [r7, #6] - 8037b64: 833b strh r3, [r7, #24] + 8037b92: 88fb ldrh r3, [r7, #6] + 8037b94: 833b strh r3, [r7, #24] } /* copy the necessary parts of the buffer */ MEMCPY(&((char *)dataptr)[left], &((char *)p->payload)[offset], buf_copy_len); - 8037b66: 8b7b ldrh r3, [r7, #26] - 8037b68: 68ba ldr r2, [r7, #8] - 8037b6a: 18d0 adds r0, r2, r3 - 8037b6c: 69fb ldr r3, [r7, #28] - 8037b6e: 685a ldr r2, [r3, #4] - 8037b70: 88bb ldrh r3, [r7, #4] - 8037b72: 4413 add r3, r2 - 8037b74: 8b3a ldrh r2, [r7, #24] - 8037b76: 4619 mov r1, r3 - 8037b78: f008 fea2 bl 80408c0 + 8037b96: 8b7b ldrh r3, [r7, #26] + 8037b98: 68ba ldr r2, [r7, #8] + 8037b9a: 18d0 adds r0, r2, r3 + 8037b9c: 69fb ldr r3, [r7, #28] + 8037b9e: 685a ldr r2, [r3, #4] + 8037ba0: 88bb ldrh r3, [r7, #4] + 8037ba2: 4413 add r3, r2 + 8037ba4: 8b3a ldrh r2, [r7, #24] + 8037ba6: 4619 mov r1, r3 + 8037ba8: f008 fea2 bl 80408f0 copied_total = (u16_t)(copied_total + buf_copy_len); - 8037b7c: 8afa ldrh r2, [r7, #22] - 8037b7e: 8b3b ldrh r3, [r7, #24] - 8037b80: 4413 add r3, r2 - 8037b82: 82fb strh r3, [r7, #22] + 8037bac: 8afa ldrh r2, [r7, #22] + 8037bae: 8b3b ldrh r3, [r7, #24] + 8037bb0: 4413 add r3, r2 + 8037bb2: 82fb strh r3, [r7, #22] left = (u16_t)(left + buf_copy_len); - 8037b84: 8b7a ldrh r2, [r7, #26] - 8037b86: 8b3b ldrh r3, [r7, #24] - 8037b88: 4413 add r3, r2 - 8037b8a: 837b strh r3, [r7, #26] + 8037bb4: 8b7a ldrh r2, [r7, #26] + 8037bb6: 8b3b ldrh r3, [r7, #24] + 8037bb8: 4413 add r3, r2 + 8037bba: 837b strh r3, [r7, #26] len = (u16_t)(len - buf_copy_len); - 8037b8c: 88fa ldrh r2, [r7, #6] - 8037b8e: 8b3b ldrh r3, [r7, #24] - 8037b90: 1ad3 subs r3, r2, r3 - 8037b92: 80fb strh r3, [r7, #6] + 8037bbc: 88fa ldrh r2, [r7, #6] + 8037bbe: 8b3b ldrh r3, [r7, #24] + 8037bc0: 1ad3 subs r3, r2, r3 + 8037bc2: 80fb strh r3, [r7, #6] offset = 0; - 8037b94: 2300 movs r3, #0 - 8037b96: 80bb strh r3, [r7, #4] + 8037bc4: 2300 movs r3, #0 + 8037bc6: 80bb strh r3, [r7, #4] for (p = buf; len != 0 && p != NULL; p = p->next) { - 8037b98: 69fb ldr r3, [r7, #28] - 8037b9a: 681b ldr r3, [r3, #0] - 8037b9c: 61fb str r3, [r7, #28] - 8037b9e: 88fb ldrh r3, [r7, #6] - 8037ba0: 2b00 cmp r3, #0 - 8037ba2: d002 beq.n 8037baa - 8037ba4: 69fb ldr r3, [r7, #28] - 8037ba6: 2b00 cmp r3, #0 - 8037ba8: d1c4 bne.n 8037b34 + 8037bc8: 69fb ldr r3, [r7, #28] + 8037bca: 681b ldr r3, [r3, #0] + 8037bcc: 61fb str r3, [r7, #28] + 8037bce: 88fb ldrh r3, [r7, #6] + 8037bd0: 2b00 cmp r3, #0 + 8037bd2: d002 beq.n 8037bda + 8037bd4: 69fb ldr r3, [r7, #28] + 8037bd6: 2b00 cmp r3, #0 + 8037bd8: d1c4 bne.n 8037b64 } } return copied_total; - 8037baa: 8afb ldrh r3, [r7, #22] -} - 8037bac: 4618 mov r0, r3 - 8037bae: 3720 adds r7, #32 - 8037bb0: 46bd mov sp, r7 - 8037bb2: bd80 pop {r7, pc} - 8037bb4: 08042868 .word 0x08042868 - 8037bb8: 08042bb0 .word 0x08042bb0 - 8037bbc: 080428c8 .word 0x080428c8 - 8037bc0: 08042bd0 .word 0x08042bd0 - -08037bc4 : + 8037bda: 8afb ldrh r3, [r7, #22] +} + 8037bdc: 4618 mov r0, r3 + 8037bde: 3720 adds r7, #32 + 8037be0: 46bd mov sp, r7 + 8037be2: bd80 pop {r7, pc} + 8037be4: 08042898 .word 0x08042898 + 8037be8: 08042be0 .word 0x08042be0 + 8037bec: 080428f8 .word 0x080428f8 + 8037bf0: 08042c00 .word 0x08042c00 + +08037bf4 : * * @return a new pbuf or NULL if allocation fails */ struct pbuf * pbuf_clone(pbuf_layer layer, pbuf_type type, struct pbuf *p) { - 8037bc4: b580 push {r7, lr} - 8037bc6: b084 sub sp, #16 - 8037bc8: af00 add r7, sp, #0 - 8037bca: 4603 mov r3, r0 - 8037bcc: 603a str r2, [r7, #0] - 8037bce: 71fb strb r3, [r7, #7] - 8037bd0: 460b mov r3, r1 - 8037bd2: 80bb strh r3, [r7, #4] + 8037bf4: b580 push {r7, lr} + 8037bf6: b084 sub sp, #16 + 8037bf8: af00 add r7, sp, #0 + 8037bfa: 4603 mov r3, r0 + 8037bfc: 603a str r2, [r7, #0] + 8037bfe: 71fb strb r3, [r7, #7] + 8037c00: 460b mov r3, r1 + 8037c02: 80bb strh r3, [r7, #4] struct pbuf *q; err_t err; q = pbuf_alloc(layer, p->tot_len, type); - 8037bd4: 683b ldr r3, [r7, #0] - 8037bd6: 8919 ldrh r1, [r3, #8] - 8037bd8: 88ba ldrh r2, [r7, #4] - 8037bda: 79fb ldrb r3, [r7, #7] - 8037bdc: 4618 mov r0, r3 - 8037bde: f7ff fab1 bl 8037144 - 8037be2: 60f8 str r0, [r7, #12] + 8037c04: 683b ldr r3, [r7, #0] + 8037c06: 8919 ldrh r1, [r3, #8] + 8037c08: 88ba ldrh r2, [r7, #4] + 8037c0a: 79fb ldrb r3, [r7, #7] + 8037c0c: 4618 mov r0, r3 + 8037c0e: f7ff fab1 bl 8037174 + 8037c12: 60f8 str r0, [r7, #12] if (q == NULL) { - 8037be4: 68fb ldr r3, [r7, #12] - 8037be6: 2b00 cmp r3, #0 - 8037be8: d101 bne.n 8037bee + 8037c14: 68fb ldr r3, [r7, #12] + 8037c16: 2b00 cmp r3, #0 + 8037c18: d101 bne.n 8037c1e return NULL; - 8037bea: 2300 movs r3, #0 - 8037bec: e011 b.n 8037c12 + 8037c1a: 2300 movs r3, #0 + 8037c1c: e011 b.n 8037c42 } err = pbuf_copy(q, p); - 8037bee: 6839 ldr r1, [r7, #0] - 8037bf0: 68f8 ldr r0, [r7, #12] - 8037bf2: f7ff fea3 bl 803793c - 8037bf6: 4603 mov r3, r0 - 8037bf8: 72fb strb r3, [r7, #11] + 8037c1e: 6839 ldr r1, [r7, #0] + 8037c20: 68f8 ldr r0, [r7, #12] + 8037c22: f7ff fea3 bl 803796c + 8037c26: 4603 mov r3, r0 + 8037c28: 72fb strb r3, [r7, #11] LWIP_UNUSED_ARG(err); /* in case of LWIP_NOASSERT */ LWIP_ASSERT("pbuf_copy failed", err == ERR_OK); - 8037bfa: f997 300b ldrsb.w r3, [r7, #11] - 8037bfe: 2b00 cmp r3, #0 - 8037c00: d006 beq.n 8037c10 - 8037c02: 4b06 ldr r3, [pc, #24] ; (8037c1c ) - 8037c04: f240 5224 movw r2, #1316 ; 0x524 - 8037c08: 4905 ldr r1, [pc, #20] ; (8037c20 ) - 8037c0a: 4806 ldr r0, [pc, #24] ; (8037c24 ) - 8037c0c: f008 ff68 bl 8040ae0 + 8037c2a: f997 300b ldrsb.w r3, [r7, #11] + 8037c2e: 2b00 cmp r3, #0 + 8037c30: d006 beq.n 8037c40 + 8037c32: 4b06 ldr r3, [pc, #24] ; (8037c4c ) + 8037c34: f240 5224 movw r2, #1316 ; 0x524 + 8037c38: 4905 ldr r1, [pc, #20] ; (8037c50 ) + 8037c3a: 4806 ldr r0, [pc, #24] ; (8037c54 ) + 8037c3c: f008 ff68 bl 8040b10 return q; - 8037c10: 68fb ldr r3, [r7, #12] -} - 8037c12: 4618 mov r0, r3 - 8037c14: 3710 adds r7, #16 - 8037c16: 46bd mov sp, r7 - 8037c18: bd80 pop {r7, pc} - 8037c1a: bf00 nop - 8037c1c: 08042868 .word 0x08042868 - 8037c20: 08042cdc .word 0x08042cdc - 8037c24: 080428c8 .word 0x080428c8 - -08037c28 : + 8037c40: 68fb ldr r3, [r7, #12] +} + 8037c42: 4618 mov r0, r3 + 8037c44: 3710 adds r7, #16 + 8037c46: 46bd mov sp, r7 + 8037c48: bd80 pop {r7, pc} + 8037c4a: bf00 nop + 8037c4c: 08042898 .word 0x08042898 + 8037c50: 08042d0c .word 0x08042d0c + 8037c54: 080428f8 .word 0x080428f8 + +08037c58 : /** * Initialize this module. */ void tcp_init(void) { - 8037c28: b580 push {r7, lr} - 8037c2a: af00 add r7, sp, #0 + 8037c58: b580 push {r7, lr} + 8037c5a: af00 add r7, sp, #0 #ifdef LWIP_RAND tcp_port = TCP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND()); - 8037c2c: f008 ff70 bl 8040b10 - 8037c30: 4603 mov r3, r0 - 8037c32: b29b uxth r3, r3 - 8037c34: f3c3 030d ubfx r3, r3, #0, #14 - 8037c38: b29b uxth r3, r3 - 8037c3a: f5a3 4380 sub.w r3, r3, #16384 ; 0x4000 - 8037c3e: b29a uxth r2, r3 - 8037c40: 4b01 ldr r3, [pc, #4] ; (8037c48 ) - 8037c42: 801a strh r2, [r3, #0] + 8037c5c: f008 ff70 bl 8040b40 + 8037c60: 4603 mov r3, r0 + 8037c62: b29b uxth r3, r3 + 8037c64: f3c3 030d ubfx r3, r3, #0, #14 + 8037c68: b29b uxth r3, r3 + 8037c6a: f5a3 4380 sub.w r3, r3, #16384 ; 0x4000 + 8037c6e: b29a uxth r2, r3 + 8037c70: 4b01 ldr r3, [pc, #4] ; (8037c78 ) + 8037c72: 801a strh r2, [r3, #0] #endif /* LWIP_RAND */ } - 8037c44: bf00 nop - 8037c46: bd80 pop {r7, pc} - 8037c48: 2400006c .word 0x2400006c + 8037c74: bf00 nop + 8037c76: bd80 pop {r7, pc} + 8037c78: 2400006c .word 0x2400006c -08037c4c : +08037c7c : /** Free a tcp pcb */ void tcp_free(struct tcp_pcb *pcb) { - 8037c4c: b580 push {r7, lr} - 8037c4e: b082 sub sp, #8 - 8037c50: af00 add r7, sp, #0 - 8037c52: 6078 str r0, [r7, #4] + 8037c7c: b580 push {r7, lr} + 8037c7e: b082 sub sp, #8 + 8037c80: af00 add r7, sp, #0 + 8037c82: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_free: LISTEN", pcb->state != LISTEN); - 8037c54: 687b ldr r3, [r7, #4] - 8037c56: 7d1b ldrb r3, [r3, #20] - 8037c58: 2b01 cmp r3, #1 - 8037c5a: d105 bne.n 8037c68 - 8037c5c: 4b06 ldr r3, [pc, #24] ; (8037c78 ) - 8037c5e: 22d4 movs r2, #212 ; 0xd4 - 8037c60: 4906 ldr r1, [pc, #24] ; (8037c7c ) - 8037c62: 4807 ldr r0, [pc, #28] ; (8037c80 ) - 8037c64: f008 ff3c bl 8040ae0 + 8037c84: 687b ldr r3, [r7, #4] + 8037c86: 7d1b ldrb r3, [r3, #20] + 8037c88: 2b01 cmp r3, #1 + 8037c8a: d105 bne.n 8037c98 + 8037c8c: 4b06 ldr r3, [pc, #24] ; (8037ca8 ) + 8037c8e: 22d4 movs r2, #212 ; 0xd4 + 8037c90: 4906 ldr r1, [pc, #24] ; (8037cac ) + 8037c92: 4807 ldr r0, [pc, #28] ; (8037cb0 ) + 8037c94: f008 ff3c bl 8040b10 #if LWIP_TCP_PCB_NUM_EXT_ARGS tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args); #endif memp_free(MEMP_TCP_PCB, pcb); - 8037c68: 6879 ldr r1, [r7, #4] - 8037c6a: 2001 movs r0, #1 - 8037c6c: f7fe febc bl 80369e8 + 8037c98: 6879 ldr r1, [r7, #4] + 8037c9a: 2001 movs r0, #1 + 8037c9c: f7fe febc bl 8036a18 } - 8037c70: bf00 nop - 8037c72: 3708 adds r7, #8 - 8037c74: 46bd mov sp, r7 - 8037c76: bd80 pop {r7, pc} - 8037c78: 08042d68 .word 0x08042d68 - 8037c7c: 08042d98 .word 0x08042d98 - 8037c80: 08042dac .word 0x08042dac + 8037ca0: bf00 nop + 8037ca2: 3708 adds r7, #8 + 8037ca4: 46bd mov sp, r7 + 8037ca6: bd80 pop {r7, pc} + 8037ca8: 08042d98 .word 0x08042d98 + 8037cac: 08042dc8 .word 0x08042dc8 + 8037cb0: 08042ddc .word 0x08042ddc -08037c84 : +08037cb4 : /** Free a tcp listen pcb */ static void tcp_free_listen(struct tcp_pcb *pcb) { - 8037c84: b580 push {r7, lr} - 8037c86: b082 sub sp, #8 - 8037c88: af00 add r7, sp, #0 - 8037c8a: 6078 str r0, [r7, #4] + 8037cb4: b580 push {r7, lr} + 8037cb6: b082 sub sp, #8 + 8037cb8: af00 add r7, sp, #0 + 8037cba: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_free_listen: !LISTEN", pcb->state != LISTEN); - 8037c8c: 687b ldr r3, [r7, #4] - 8037c8e: 7d1b ldrb r3, [r3, #20] - 8037c90: 2b01 cmp r3, #1 - 8037c92: d105 bne.n 8037ca0 - 8037c94: 4b06 ldr r3, [pc, #24] ; (8037cb0 ) - 8037c96: 22df movs r2, #223 ; 0xdf - 8037c98: 4906 ldr r1, [pc, #24] ; (8037cb4 ) - 8037c9a: 4807 ldr r0, [pc, #28] ; (8037cb8 ) - 8037c9c: f008 ff20 bl 8040ae0 + 8037cbc: 687b ldr r3, [r7, #4] + 8037cbe: 7d1b ldrb r3, [r3, #20] + 8037cc0: 2b01 cmp r3, #1 + 8037cc2: d105 bne.n 8037cd0 + 8037cc4: 4b06 ldr r3, [pc, #24] ; (8037ce0 ) + 8037cc6: 22df movs r2, #223 ; 0xdf + 8037cc8: 4906 ldr r1, [pc, #24] ; (8037ce4 ) + 8037cca: 4807 ldr r0, [pc, #28] ; (8037ce8 ) + 8037ccc: f008 ff20 bl 8040b10 #if LWIP_TCP_PCB_NUM_EXT_ARGS tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args); #endif memp_free(MEMP_TCP_PCB_LISTEN, pcb); - 8037ca0: 6879 ldr r1, [r7, #4] - 8037ca2: 2002 movs r0, #2 - 8037ca4: f7fe fea0 bl 80369e8 -} - 8037ca8: bf00 nop - 8037caa: 3708 adds r7, #8 - 8037cac: 46bd mov sp, r7 - 8037cae: bd80 pop {r7, pc} - 8037cb0: 08042d68 .word 0x08042d68 - 8037cb4: 08042dd4 .word 0x08042dd4 - 8037cb8: 08042dac .word 0x08042dac - -08037cbc : + 8037cd0: 6879 ldr r1, [r7, #4] + 8037cd2: 2002 movs r0, #2 + 8037cd4: f7fe fea0 bl 8036a18 +} + 8037cd8: bf00 nop + 8037cda: 3708 adds r7, #8 + 8037cdc: 46bd mov sp, r7 + 8037cde: bd80 pop {r7, pc} + 8037ce0: 08042d98 .word 0x08042d98 + 8037ce4: 08042e04 .word 0x08042e04 + 8037ce8: 08042ddc .word 0x08042ddc + +08037cec : /** * Called periodically to dispatch TCP timers. */ void tcp_tmr(void) { - 8037cbc: b580 push {r7, lr} - 8037cbe: af00 add r7, sp, #0 + 8037cec: b580 push {r7, lr} + 8037cee: af00 add r7, sp, #0 /* Call tcp_fasttmr() every 250 ms */ tcp_fasttmr(); - 8037cc0: f001 f85c bl 8038d7c + 8037cf0: f001 f85c bl 8038dac if (++tcp_timer & 1) { - 8037cc4: 4b07 ldr r3, [pc, #28] ; (8037ce4 ) - 8037cc6: 781b ldrb r3, [r3, #0] - 8037cc8: 3301 adds r3, #1 - 8037cca: b2da uxtb r2, r3 - 8037ccc: 4b05 ldr r3, [pc, #20] ; (8037ce4 ) - 8037cce: 701a strb r2, [r3, #0] - 8037cd0: 4b04 ldr r3, [pc, #16] ; (8037ce4 ) - 8037cd2: 781b ldrb r3, [r3, #0] - 8037cd4: f003 0301 and.w r3, r3, #1 - 8037cd8: 2b00 cmp r3, #0 - 8037cda: d001 beq.n 8037ce0 + 8037cf4: 4b07 ldr r3, [pc, #28] ; (8037d14 ) + 8037cf6: 781b ldrb r3, [r3, #0] + 8037cf8: 3301 adds r3, #1 + 8037cfa: b2da uxtb r2, r3 + 8037cfc: 4b05 ldr r3, [pc, #20] ; (8037d14 ) + 8037cfe: 701a strb r2, [r3, #0] + 8037d00: 4b04 ldr r3, [pc, #16] ; (8037d14 ) + 8037d02: 781b ldrb r3, [r3, #0] + 8037d04: f003 0301 and.w r3, r3, #1 + 8037d08: 2b00 cmp r3, #0 + 8037d0a: d001 beq.n 8037d10 /* Call tcp_slowtmr() every 500 ms, i.e., every other timer tcp_tmr() is called. */ tcp_slowtmr(); - 8037cdc: f000 fd0e bl 80386fc + 8037d0c: f000 fd0e bl 803872c } } - 8037ce0: bf00 nop - 8037ce2: bd80 pop {r7, pc} - 8037ce4: 2400e96d .word 0x2400e96d + 8037d10: bf00 nop + 8037d12: bd80 pop {r7, pc} + 8037d14: 2400e96d .word 0x2400e96d -08037ce8 : +08037d18 : /** Called when a listen pcb is closed. Iterates one pcb list and removes the * closed listener pcb from pcb->listener if matching. */ static void tcp_remove_listener(struct tcp_pcb *list, struct tcp_pcb_listen *lpcb) { - 8037ce8: b580 push {r7, lr} - 8037cea: b084 sub sp, #16 - 8037cec: af00 add r7, sp, #0 - 8037cee: 6078 str r0, [r7, #4] - 8037cf0: 6039 str r1, [r7, #0] + 8037d18: b580 push {r7, lr} + 8037d1a: b084 sub sp, #16 + 8037d1c: af00 add r7, sp, #0 + 8037d1e: 6078 str r0, [r7, #4] + 8037d20: 6039 str r1, [r7, #0] struct tcp_pcb *pcb; LWIP_ASSERT("tcp_remove_listener: invalid listener", lpcb != NULL); - 8037cf2: 683b ldr r3, [r7, #0] - 8037cf4: 2b00 cmp r3, #0 - 8037cf6: d105 bne.n 8037d04 - 8037cf8: 4b0d ldr r3, [pc, #52] ; (8037d30 ) - 8037cfa: 22ff movs r2, #255 ; 0xff - 8037cfc: 490d ldr r1, [pc, #52] ; (8037d34 ) - 8037cfe: 480e ldr r0, [pc, #56] ; (8037d38 ) - 8037d00: f008 feee bl 8040ae0 + 8037d22: 683b ldr r3, [r7, #0] + 8037d24: 2b00 cmp r3, #0 + 8037d26: d105 bne.n 8037d34 + 8037d28: 4b0d ldr r3, [pc, #52] ; (8037d60 ) + 8037d2a: 22ff movs r2, #255 ; 0xff + 8037d2c: 490d ldr r1, [pc, #52] ; (8037d64 ) + 8037d2e: 480e ldr r0, [pc, #56] ; (8037d68 ) + 8037d30: f008 feee bl 8040b10 for (pcb = list; pcb != NULL; pcb = pcb->next) { - 8037d04: 687b ldr r3, [r7, #4] - 8037d06: 60fb str r3, [r7, #12] - 8037d08: e00a b.n 8037d20 + 8037d34: 687b ldr r3, [r7, #4] + 8037d36: 60fb str r3, [r7, #12] + 8037d38: e00a b.n 8037d50 if (pcb->listener == lpcb) { - 8037d0a: 68fb ldr r3, [r7, #12] - 8037d0c: 6fdb ldr r3, [r3, #124] ; 0x7c - 8037d0e: 683a ldr r2, [r7, #0] - 8037d10: 429a cmp r2, r3 - 8037d12: d102 bne.n 8037d1a + 8037d3a: 68fb ldr r3, [r7, #12] + 8037d3c: 6fdb ldr r3, [r3, #124] ; 0x7c + 8037d3e: 683a ldr r2, [r7, #0] + 8037d40: 429a cmp r2, r3 + 8037d42: d102 bne.n 8037d4a pcb->listener = NULL; - 8037d14: 68fb ldr r3, [r7, #12] - 8037d16: 2200 movs r2, #0 - 8037d18: 67da str r2, [r3, #124] ; 0x7c + 8037d44: 68fb ldr r3, [r7, #12] + 8037d46: 2200 movs r2, #0 + 8037d48: 67da str r2, [r3, #124] ; 0x7c for (pcb = list; pcb != NULL; pcb = pcb->next) { - 8037d1a: 68fb ldr r3, [r7, #12] - 8037d1c: 68db ldr r3, [r3, #12] - 8037d1e: 60fb str r3, [r7, #12] - 8037d20: 68fb ldr r3, [r7, #12] - 8037d22: 2b00 cmp r3, #0 - 8037d24: d1f1 bne.n 8037d0a + 8037d4a: 68fb ldr r3, [r7, #12] + 8037d4c: 68db ldr r3, [r3, #12] + 8037d4e: 60fb str r3, [r7, #12] + 8037d50: 68fb ldr r3, [r7, #12] + 8037d52: 2b00 cmp r3, #0 + 8037d54: d1f1 bne.n 8037d3a } } } - 8037d26: bf00 nop - 8037d28: bf00 nop - 8037d2a: 3710 adds r7, #16 - 8037d2c: 46bd mov sp, r7 - 8037d2e: bd80 pop {r7, pc} - 8037d30: 08042d68 .word 0x08042d68 - 8037d34: 08042df0 .word 0x08042df0 - 8037d38: 08042dac .word 0x08042dac + 8037d56: bf00 nop + 8037d58: bf00 nop + 8037d5a: 3710 adds r7, #16 + 8037d5c: 46bd mov sp, r7 + 8037d5e: bd80 pop {r7, pc} + 8037d60: 08042d98 .word 0x08042d98 + 8037d64: 08042e20 .word 0x08042e20 + 8037d68: 08042ddc .word 0x08042ddc -08037d3c : +08037d6c : /** Called when a listen pcb is closed. Iterates all pcb lists and removes the * closed listener pcb from pcb->listener if matching. */ static void tcp_listen_closed(struct tcp_pcb *pcb) { - 8037d3c: b580 push {r7, lr} - 8037d3e: b084 sub sp, #16 - 8037d40: af00 add r7, sp, #0 - 8037d42: 6078 str r0, [r7, #4] + 8037d6c: b580 push {r7, lr} + 8037d6e: b084 sub sp, #16 + 8037d70: af00 add r7, sp, #0 + 8037d72: 6078 str r0, [r7, #4] #if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG size_t i; LWIP_ASSERT("pcb != NULL", pcb != NULL); - 8037d44: 687b ldr r3, [r7, #4] - 8037d46: 2b00 cmp r3, #0 - 8037d48: d106 bne.n 8037d58 - 8037d4a: 4b14 ldr r3, [pc, #80] ; (8037d9c ) - 8037d4c: f240 1211 movw r2, #273 ; 0x111 - 8037d50: 4913 ldr r1, [pc, #76] ; (8037da0 ) - 8037d52: 4814 ldr r0, [pc, #80] ; (8037da4 ) - 8037d54: f008 fec4 bl 8040ae0 + 8037d74: 687b ldr r3, [r7, #4] + 8037d76: 2b00 cmp r3, #0 + 8037d78: d106 bne.n 8037d88 + 8037d7a: 4b14 ldr r3, [pc, #80] ; (8037dcc ) + 8037d7c: f240 1211 movw r2, #273 ; 0x111 + 8037d80: 4913 ldr r1, [pc, #76] ; (8037dd0 ) + 8037d82: 4814 ldr r0, [pc, #80] ; (8037dd4 ) + 8037d84: f008 fec4 bl 8040b10 LWIP_ASSERT("pcb->state == LISTEN", pcb->state == LISTEN); - 8037d58: 687b ldr r3, [r7, #4] - 8037d5a: 7d1b ldrb r3, [r3, #20] - 8037d5c: 2b01 cmp r3, #1 - 8037d5e: d006 beq.n 8037d6e - 8037d60: 4b0e ldr r3, [pc, #56] ; (8037d9c ) - 8037d62: f44f 7289 mov.w r2, #274 ; 0x112 - 8037d66: 4910 ldr r1, [pc, #64] ; (8037da8 ) - 8037d68: 480e ldr r0, [pc, #56] ; (8037da4 ) - 8037d6a: f008 feb9 bl 8040ae0 + 8037d88: 687b ldr r3, [r7, #4] + 8037d8a: 7d1b ldrb r3, [r3, #20] + 8037d8c: 2b01 cmp r3, #1 + 8037d8e: d006 beq.n 8037d9e + 8037d90: 4b0e ldr r3, [pc, #56] ; (8037dcc ) + 8037d92: f44f 7289 mov.w r2, #274 ; 0x112 + 8037d96: 4910 ldr r1, [pc, #64] ; (8037dd8 ) + 8037d98: 480e ldr r0, [pc, #56] ; (8037dd4 ) + 8037d9a: f008 feb9 bl 8040b10 for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) { - 8037d6e: 2301 movs r3, #1 - 8037d70: 60fb str r3, [r7, #12] - 8037d72: e00b b.n 8037d8c + 8037d9e: 2301 movs r3, #1 + 8037da0: 60fb str r3, [r7, #12] + 8037da2: e00b b.n 8037dbc tcp_remove_listener(*tcp_pcb_lists[i], (struct tcp_pcb_listen *)pcb); - 8037d74: 4a0d ldr r2, [pc, #52] ; (8037dac ) - 8037d76: 68fb ldr r3, [r7, #12] - 8037d78: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8037d7c: 681b ldr r3, [r3, #0] - 8037d7e: 6879 ldr r1, [r7, #4] - 8037d80: 4618 mov r0, r3 - 8037d82: f7ff ffb1 bl 8037ce8 + 8037da4: 4a0d ldr r2, [pc, #52] ; (8037ddc ) + 8037da6: 68fb ldr r3, [r7, #12] + 8037da8: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8037dac: 681b ldr r3, [r3, #0] + 8037dae: 6879 ldr r1, [r7, #4] + 8037db0: 4618 mov r0, r3 + 8037db2: f7ff ffb1 bl 8037d18 for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) { - 8037d86: 68fb ldr r3, [r7, #12] - 8037d88: 3301 adds r3, #1 - 8037d8a: 60fb str r3, [r7, #12] - 8037d8c: 68fb ldr r3, [r7, #12] - 8037d8e: 2b03 cmp r3, #3 - 8037d90: d9f0 bls.n 8037d74 + 8037db6: 68fb ldr r3, [r7, #12] + 8037db8: 3301 adds r3, #1 + 8037dba: 60fb str r3, [r7, #12] + 8037dbc: 68fb ldr r3, [r7, #12] + 8037dbe: 2b03 cmp r3, #3 + 8037dc0: d9f0 bls.n 8037da4 } #endif LWIP_UNUSED_ARG(pcb); } - 8037d92: bf00 nop - 8037d94: bf00 nop - 8037d96: 3710 adds r7, #16 - 8037d98: 46bd mov sp, r7 - 8037d9a: bd80 pop {r7, pc} - 8037d9c: 08042d68 .word 0x08042d68 - 8037da0: 08042e18 .word 0x08042e18 - 8037da4: 08042dac .word 0x08042dac - 8037da8: 08042e24 .word 0x08042e24 - 8037dac: 08044da8 .word 0x08044da8 - -08037db0 : + 8037dc2: bf00 nop + 8037dc4: bf00 nop + 8037dc6: 3710 adds r7, #16 + 8037dc8: 46bd mov sp, r7 + 8037dca: bd80 pop {r7, pc} + 8037dcc: 08042d98 .word 0x08042d98 + 8037dd0: 08042e48 .word 0x08042e48 + 8037dd4: 08042ddc .word 0x08042ddc + 8037dd8: 08042e54 .word 0x08042e54 + 8037ddc: 08044dd8 .word 0x08044dd8 + +08037de0 : * @return ERR_OK if connection has been closed * another err_t if closing failed and pcb is not freed */ static err_t tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data) { - 8037db0: b5b0 push {r4, r5, r7, lr} - 8037db2: b088 sub sp, #32 - 8037db4: af04 add r7, sp, #16 - 8037db6: 6078 str r0, [r7, #4] - 8037db8: 460b mov r3, r1 - 8037dba: 70fb strb r3, [r7, #3] + 8037de0: b5b0 push {r4, r5, r7, lr} + 8037de2: b088 sub sp, #32 + 8037de4: af04 add r7, sp, #16 + 8037de6: 6078 str r0, [r7, #4] + 8037de8: 460b mov r3, r1 + 8037dea: 70fb strb r3, [r7, #3] LWIP_ASSERT("tcp_close_shutdown: invalid pcb", pcb != NULL); - 8037dbc: 687b ldr r3, [r7, #4] - 8037dbe: 2b00 cmp r3, #0 - 8037dc0: d106 bne.n 8037dd0 - 8037dc2: 4b63 ldr r3, [pc, #396] ; (8037f50 ) - 8037dc4: f44f 72af mov.w r2, #350 ; 0x15e - 8037dc8: 4962 ldr r1, [pc, #392] ; (8037f54 ) - 8037dca: 4863 ldr r0, [pc, #396] ; (8037f58 ) - 8037dcc: f008 fe88 bl 8040ae0 + 8037dec: 687b ldr r3, [r7, #4] + 8037dee: 2b00 cmp r3, #0 + 8037df0: d106 bne.n 8037e00 + 8037df2: 4b63 ldr r3, [pc, #396] ; (8037f80 ) + 8037df4: f44f 72af mov.w r2, #350 ; 0x15e + 8037df8: 4962 ldr r1, [pc, #392] ; (8037f84 ) + 8037dfa: 4863 ldr r0, [pc, #396] ; (8037f88 ) + 8037dfc: f008 fe88 bl 8040b10 if (rst_on_unacked_data && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) { - 8037dd0: 78fb ldrb r3, [r7, #3] - 8037dd2: 2b00 cmp r3, #0 - 8037dd4: d066 beq.n 8037ea4 - 8037dd6: 687b ldr r3, [r7, #4] - 8037dd8: 7d1b ldrb r3, [r3, #20] - 8037dda: 2b04 cmp r3, #4 - 8037ddc: d003 beq.n 8037de6 - 8037dde: 687b ldr r3, [r7, #4] - 8037de0: 7d1b ldrb r3, [r3, #20] - 8037de2: 2b07 cmp r3, #7 - 8037de4: d15e bne.n 8037ea4 + 8037e00: 78fb ldrb r3, [r7, #3] + 8037e02: 2b00 cmp r3, #0 + 8037e04: d066 beq.n 8037ed4 + 8037e06: 687b ldr r3, [r7, #4] + 8037e08: 7d1b ldrb r3, [r3, #20] + 8037e0a: 2b04 cmp r3, #4 + 8037e0c: d003 beq.n 8037e16 + 8037e0e: 687b ldr r3, [r7, #4] + 8037e10: 7d1b ldrb r3, [r3, #20] + 8037e12: 2b07 cmp r3, #7 + 8037e14: d15e bne.n 8037ed4 if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND_MAX(pcb))) { - 8037de6: 687b ldr r3, [r7, #4] - 8037de8: 6f9b ldr r3, [r3, #120] ; 0x78 - 8037dea: 2b00 cmp r3, #0 - 8037dec: d104 bne.n 8037df8 - 8037dee: 687b ldr r3, [r7, #4] - 8037df0: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8037df2: f5b3 6f06 cmp.w r3, #2144 ; 0x860 - 8037df6: d055 beq.n 8037ea4 + 8037e16: 687b ldr r3, [r7, #4] + 8037e18: 6f9b ldr r3, [r3, #120] ; 0x78 + 8037e1a: 2b00 cmp r3, #0 + 8037e1c: d104 bne.n 8037e28 + 8037e1e: 687b ldr r3, [r7, #4] + 8037e20: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8037e22: f5b3 6f06 cmp.w r3, #2144 ; 0x860 + 8037e26: d055 beq.n 8037ed4 /* Not all data received by application, send RST to tell the remote side about this. */ LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED); - 8037df8: 687b ldr r3, [r7, #4] - 8037dfa: 8b5b ldrh r3, [r3, #26] - 8037dfc: f003 0310 and.w r3, r3, #16 - 8037e00: 2b00 cmp r3, #0 - 8037e02: d106 bne.n 8037e12 - 8037e04: 4b52 ldr r3, [pc, #328] ; (8037f50 ) - 8037e06: f44f 72b2 mov.w r2, #356 ; 0x164 - 8037e0a: 4954 ldr r1, [pc, #336] ; (8037f5c ) - 8037e0c: 4852 ldr r0, [pc, #328] ; (8037f58 ) - 8037e0e: f008 fe67 bl 8040ae0 + 8037e28: 687b ldr r3, [r7, #4] + 8037e2a: 8b5b ldrh r3, [r3, #26] + 8037e2c: f003 0310 and.w r3, r3, #16 + 8037e30: 2b00 cmp r3, #0 + 8037e32: d106 bne.n 8037e42 + 8037e34: 4b52 ldr r3, [pc, #328] ; (8037f80 ) + 8037e36: f44f 72b2 mov.w r2, #356 ; 0x164 + 8037e3a: 4954 ldr r1, [pc, #336] ; (8037f8c ) + 8037e3c: 4852 ldr r0, [pc, #328] ; (8037f88 ) + 8037e3e: f008 fe67 bl 8040b10 /* don't call tcp_abort here: we must not deallocate the pcb since that might not be expected when calling tcp_close */ tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip, - 8037e12: 687b ldr r3, [r7, #4] - 8037e14: 6d18 ldr r0, [r3, #80] ; 0x50 - 8037e16: 687b ldr r3, [r7, #4] - 8037e18: 6a5c ldr r4, [r3, #36] ; 0x24 - 8037e1a: 687d ldr r5, [r7, #4] - 8037e1c: 687b ldr r3, [r7, #4] - 8037e1e: 3304 adds r3, #4 - 8037e20: 687a ldr r2, [r7, #4] - 8037e22: 8ad2 ldrh r2, [r2, #22] - 8037e24: 6879 ldr r1, [r7, #4] - 8037e26: 8b09 ldrh r1, [r1, #24] - 8037e28: 9102 str r1, [sp, #8] - 8037e2a: 9201 str r2, [sp, #4] - 8037e2c: 9300 str r3, [sp, #0] - 8037e2e: 462b mov r3, r5 - 8037e30: 4622 mov r2, r4 - 8037e32: 4601 mov r1, r0 - 8037e34: 6878 ldr r0, [r7, #4] - 8037e36: f005 fd4d bl 803d8d4 + 8037e42: 687b ldr r3, [r7, #4] + 8037e44: 6d18 ldr r0, [r3, #80] ; 0x50 + 8037e46: 687b ldr r3, [r7, #4] + 8037e48: 6a5c ldr r4, [r3, #36] ; 0x24 + 8037e4a: 687d ldr r5, [r7, #4] + 8037e4c: 687b ldr r3, [r7, #4] + 8037e4e: 3304 adds r3, #4 + 8037e50: 687a ldr r2, [r7, #4] + 8037e52: 8ad2 ldrh r2, [r2, #22] + 8037e54: 6879 ldr r1, [r7, #4] + 8037e56: 8b09 ldrh r1, [r1, #24] + 8037e58: 9102 str r1, [sp, #8] + 8037e5a: 9201 str r2, [sp, #4] + 8037e5c: 9300 str r3, [sp, #0] + 8037e5e: 462b mov r3, r5 + 8037e60: 4622 mov r2, r4 + 8037e62: 4601 mov r1, r0 + 8037e64: 6878 ldr r0, [r7, #4] + 8037e66: f005 fd4d bl 803d904 pcb->local_port, pcb->remote_port); tcp_pcb_purge(pcb); - 8037e3a: 6878 ldr r0, [r7, #4] - 8037e3c: f001 fb2a bl 8039494 + 8037e6a: 6878 ldr r0, [r7, #4] + 8037e6c: f001 fb2a bl 80394c4 TCP_RMV_ACTIVE(pcb); - 8037e40: 4b47 ldr r3, [pc, #284] ; (8037f60 ) - 8037e42: 681b ldr r3, [r3, #0] - 8037e44: 687a ldr r2, [r7, #4] - 8037e46: 429a cmp r2, r3 - 8037e48: d105 bne.n 8037e56 - 8037e4a: 4b45 ldr r3, [pc, #276] ; (8037f60 ) - 8037e4c: 681b ldr r3, [r3, #0] - 8037e4e: 68db ldr r3, [r3, #12] - 8037e50: 4a43 ldr r2, [pc, #268] ; (8037f60 ) - 8037e52: 6013 str r3, [r2, #0] - 8037e54: e013 b.n 8037e7e - 8037e56: 4b42 ldr r3, [pc, #264] ; (8037f60 ) - 8037e58: 681b ldr r3, [r3, #0] - 8037e5a: 60fb str r3, [r7, #12] - 8037e5c: e00c b.n 8037e78 - 8037e5e: 68fb ldr r3, [r7, #12] - 8037e60: 68db ldr r3, [r3, #12] - 8037e62: 687a ldr r2, [r7, #4] - 8037e64: 429a cmp r2, r3 - 8037e66: d104 bne.n 8037e72 - 8037e68: 687b ldr r3, [r7, #4] - 8037e6a: 68da ldr r2, [r3, #12] - 8037e6c: 68fb ldr r3, [r7, #12] - 8037e6e: 60da str r2, [r3, #12] - 8037e70: e005 b.n 8037e7e - 8037e72: 68fb ldr r3, [r7, #12] - 8037e74: 68db ldr r3, [r3, #12] - 8037e76: 60fb str r3, [r7, #12] - 8037e78: 68fb ldr r3, [r7, #12] - 8037e7a: 2b00 cmp r3, #0 - 8037e7c: d1ef bne.n 8037e5e - 8037e7e: 687b ldr r3, [r7, #4] - 8037e80: 2200 movs r2, #0 - 8037e82: 60da str r2, [r3, #12] - 8037e84: 4b37 ldr r3, [pc, #220] ; (8037f64 ) - 8037e86: 2201 movs r2, #1 - 8037e88: 701a strb r2, [r3, #0] + 8037e70: 4b47 ldr r3, [pc, #284] ; (8037f90 ) + 8037e72: 681b ldr r3, [r3, #0] + 8037e74: 687a ldr r2, [r7, #4] + 8037e76: 429a cmp r2, r3 + 8037e78: d105 bne.n 8037e86 + 8037e7a: 4b45 ldr r3, [pc, #276] ; (8037f90 ) + 8037e7c: 681b ldr r3, [r3, #0] + 8037e7e: 68db ldr r3, [r3, #12] + 8037e80: 4a43 ldr r2, [pc, #268] ; (8037f90 ) + 8037e82: 6013 str r3, [r2, #0] + 8037e84: e013 b.n 8037eae + 8037e86: 4b42 ldr r3, [pc, #264] ; (8037f90 ) + 8037e88: 681b ldr r3, [r3, #0] + 8037e8a: 60fb str r3, [r7, #12] + 8037e8c: e00c b.n 8037ea8 + 8037e8e: 68fb ldr r3, [r7, #12] + 8037e90: 68db ldr r3, [r3, #12] + 8037e92: 687a ldr r2, [r7, #4] + 8037e94: 429a cmp r2, r3 + 8037e96: d104 bne.n 8037ea2 + 8037e98: 687b ldr r3, [r7, #4] + 8037e9a: 68da ldr r2, [r3, #12] + 8037e9c: 68fb ldr r3, [r7, #12] + 8037e9e: 60da str r2, [r3, #12] + 8037ea0: e005 b.n 8037eae + 8037ea2: 68fb ldr r3, [r7, #12] + 8037ea4: 68db ldr r3, [r3, #12] + 8037ea6: 60fb str r3, [r7, #12] + 8037ea8: 68fb ldr r3, [r7, #12] + 8037eaa: 2b00 cmp r3, #0 + 8037eac: d1ef bne.n 8037e8e + 8037eae: 687b ldr r3, [r7, #4] + 8037eb0: 2200 movs r2, #0 + 8037eb2: 60da str r2, [r3, #12] + 8037eb4: 4b37 ldr r3, [pc, #220] ; (8037f94 ) + 8037eb6: 2201 movs r2, #1 + 8037eb8: 701a strb r2, [r3, #0] /* Deallocate the pcb since we already sent a RST for it */ if (tcp_input_pcb == pcb) { - 8037e8a: 4b37 ldr r3, [pc, #220] ; (8037f68 ) - 8037e8c: 681b ldr r3, [r3, #0] - 8037e8e: 687a ldr r2, [r7, #4] - 8037e90: 429a cmp r2, r3 - 8037e92: d102 bne.n 8037e9a + 8037eba: 4b37 ldr r3, [pc, #220] ; (8037f98 ) + 8037ebc: 681b ldr r3, [r3, #0] + 8037ebe: 687a ldr r2, [r7, #4] + 8037ec0: 429a cmp r2, r3 + 8037ec2: d102 bne.n 8037eca /* prevent using a deallocated pcb: free it from tcp_input later */ tcp_trigger_input_pcb_close(); - 8037e94: f003 ffc2 bl 803be1c - 8037e98: e002 b.n 8037ea0 + 8037ec4: f003 ffc2 bl 803be4c + 8037ec8: e002 b.n 8037ed0 } else { tcp_free(pcb); - 8037e9a: 6878 ldr r0, [r7, #4] - 8037e9c: f7ff fed6 bl 8037c4c + 8037eca: 6878 ldr r0, [r7, #4] + 8037ecc: f7ff fed6 bl 8037c7c } return ERR_OK; - 8037ea0: 2300 movs r3, #0 - 8037ea2: e050 b.n 8037f46 + 8037ed0: 2300 movs r3, #0 + 8037ed2: e050 b.n 8037f76 } } /* - states which free the pcb are handled here, - states which send FIN and change state are handled in tcp_close_shutdown_fin() */ switch (pcb->state) { - 8037ea4: 687b ldr r3, [r7, #4] - 8037ea6: 7d1b ldrb r3, [r3, #20] - 8037ea8: 2b02 cmp r3, #2 - 8037eaa: d03b beq.n 8037f24 - 8037eac: 2b02 cmp r3, #2 - 8037eae: dc44 bgt.n 8037f3a - 8037eb0: 2b00 cmp r3, #0 - 8037eb2: d002 beq.n 8037eba - 8037eb4: 2b01 cmp r3, #1 - 8037eb6: d02a beq.n 8037f0e - 8037eb8: e03f b.n 8037f3a + 8037ed4: 687b ldr r3, [r7, #4] + 8037ed6: 7d1b ldrb r3, [r3, #20] + 8037ed8: 2b02 cmp r3, #2 + 8037eda: d03b beq.n 8037f54 + 8037edc: 2b02 cmp r3, #2 + 8037ede: dc44 bgt.n 8037f6a + 8037ee0: 2b00 cmp r3, #0 + 8037ee2: d002 beq.n 8037eea + 8037ee4: 2b01 cmp r3, #1 + 8037ee6: d02a beq.n 8037f3e + 8037ee8: e03f b.n 8037f6a * and the user needs some way to free it should the need arise. * Calling tcp_close() with a pcb that has already been closed, (i.e. twice) * or for a pcb that has been used and then entered the CLOSED state * is erroneous, but this should never happen as the pcb has in those cases * been freed, and so any remaining handles are bogus. */ if (pcb->local_port != 0) { - 8037eba: 687b ldr r3, [r7, #4] - 8037ebc: 8adb ldrh r3, [r3, #22] - 8037ebe: 2b00 cmp r3, #0 - 8037ec0: d021 beq.n 8037f06 - TCP_RMV(&tcp_bound_pcbs, pcb); - 8037ec2: 4b2a ldr r3, [pc, #168] ; (8037f6c ) - 8037ec4: 681b ldr r3, [r3, #0] - 8037ec6: 687a ldr r2, [r7, #4] - 8037ec8: 429a cmp r2, r3 - 8037eca: d105 bne.n 8037ed8 - 8037ecc: 4b27 ldr r3, [pc, #156] ; (8037f6c ) - 8037ece: 681b ldr r3, [r3, #0] - 8037ed0: 68db ldr r3, [r3, #12] - 8037ed2: 4a26 ldr r2, [pc, #152] ; (8037f6c ) - 8037ed4: 6013 str r3, [r2, #0] - 8037ed6: e013 b.n 8037f00 - 8037ed8: 4b24 ldr r3, [pc, #144] ; (8037f6c ) - 8037eda: 681b ldr r3, [r3, #0] - 8037edc: 60bb str r3, [r7, #8] - 8037ede: e00c b.n 8037efa - 8037ee0: 68bb ldr r3, [r7, #8] - 8037ee2: 68db ldr r3, [r3, #12] - 8037ee4: 687a ldr r2, [r7, #4] - 8037ee6: 429a cmp r2, r3 - 8037ee8: d104 bne.n 8037ef4 8037eea: 687b ldr r3, [r7, #4] - 8037eec: 68da ldr r2, [r3, #12] - 8037eee: 68bb ldr r3, [r7, #8] - 8037ef0: 60da str r2, [r3, #12] - 8037ef2: e005 b.n 8037f00 - 8037ef4: 68bb ldr r3, [r7, #8] - 8037ef6: 68db ldr r3, [r3, #12] - 8037ef8: 60bb str r3, [r7, #8] - 8037efa: 68bb ldr r3, [r7, #8] - 8037efc: 2b00 cmp r3, #0 - 8037efe: d1ef bne.n 8037ee0 - 8037f00: 687b ldr r3, [r7, #4] - 8037f02: 2200 movs r2, #0 - 8037f04: 60da str r2, [r3, #12] + 8037eec: 8adb ldrh r3, [r3, #22] + 8037eee: 2b00 cmp r3, #0 + 8037ef0: d021 beq.n 8037f36 + TCP_RMV(&tcp_bound_pcbs, pcb); + 8037ef2: 4b2a ldr r3, [pc, #168] ; (8037f9c ) + 8037ef4: 681b ldr r3, [r3, #0] + 8037ef6: 687a ldr r2, [r7, #4] + 8037ef8: 429a cmp r2, r3 + 8037efa: d105 bne.n 8037f08 + 8037efc: 4b27 ldr r3, [pc, #156] ; (8037f9c ) + 8037efe: 681b ldr r3, [r3, #0] + 8037f00: 68db ldr r3, [r3, #12] + 8037f02: 4a26 ldr r2, [pc, #152] ; (8037f9c ) + 8037f04: 6013 str r3, [r2, #0] + 8037f06: e013 b.n 8037f30 + 8037f08: 4b24 ldr r3, [pc, #144] ; (8037f9c ) + 8037f0a: 681b ldr r3, [r3, #0] + 8037f0c: 60bb str r3, [r7, #8] + 8037f0e: e00c b.n 8037f2a + 8037f10: 68bb ldr r3, [r7, #8] + 8037f12: 68db ldr r3, [r3, #12] + 8037f14: 687a ldr r2, [r7, #4] + 8037f16: 429a cmp r2, r3 + 8037f18: d104 bne.n 8037f24 + 8037f1a: 687b ldr r3, [r7, #4] + 8037f1c: 68da ldr r2, [r3, #12] + 8037f1e: 68bb ldr r3, [r7, #8] + 8037f20: 60da str r2, [r3, #12] + 8037f22: e005 b.n 8037f30 + 8037f24: 68bb ldr r3, [r7, #8] + 8037f26: 68db ldr r3, [r3, #12] + 8037f28: 60bb str r3, [r7, #8] + 8037f2a: 68bb ldr r3, [r7, #8] + 8037f2c: 2b00 cmp r3, #0 + 8037f2e: d1ef bne.n 8037f10 + 8037f30: 687b ldr r3, [r7, #4] + 8037f32: 2200 movs r2, #0 + 8037f34: 60da str r2, [r3, #12] } tcp_free(pcb); - 8037f06: 6878 ldr r0, [r7, #4] - 8037f08: f7ff fea0 bl 8037c4c + 8037f36: 6878 ldr r0, [r7, #4] + 8037f38: f7ff fea0 bl 8037c7c break; - 8037f0c: e01a b.n 8037f44 + 8037f3c: e01a b.n 8037f74 case LISTEN: tcp_listen_closed(pcb); - 8037f0e: 6878 ldr r0, [r7, #4] - 8037f10: f7ff ff14 bl 8037d3c + 8037f3e: 6878 ldr r0, [r7, #4] + 8037f40: f7ff ff14 bl 8037d6c tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb); - 8037f14: 6879 ldr r1, [r7, #4] - 8037f16: 4816 ldr r0, [pc, #88] ; (8037f70 ) - 8037f18: f001 fb0c bl 8039534 + 8037f44: 6879 ldr r1, [r7, #4] + 8037f46: 4816 ldr r0, [pc, #88] ; (8037fa0 ) + 8037f48: f001 fb0c bl 8039564 tcp_free_listen(pcb); - 8037f1c: 6878 ldr r0, [r7, #4] - 8037f1e: f7ff feb1 bl 8037c84 + 8037f4c: 6878 ldr r0, [r7, #4] + 8037f4e: f7ff feb1 bl 8037cb4 break; - 8037f22: e00f b.n 8037f44 + 8037f52: e00f b.n 8037f74 case SYN_SENT: TCP_PCB_REMOVE_ACTIVE(pcb); - 8037f24: 6879 ldr r1, [r7, #4] - 8037f26: 480e ldr r0, [pc, #56] ; (8037f60 ) - 8037f28: f001 fb04 bl 8039534 - 8037f2c: 4b0d ldr r3, [pc, #52] ; (8037f64 ) - 8037f2e: 2201 movs r2, #1 - 8037f30: 701a strb r2, [r3, #0] + 8037f54: 6879 ldr r1, [r7, #4] + 8037f56: 480e ldr r0, [pc, #56] ; (8037f90 ) + 8037f58: f001 fb04 bl 8039564 + 8037f5c: 4b0d ldr r3, [pc, #52] ; (8037f94 ) + 8037f5e: 2201 movs r2, #1 + 8037f60: 701a strb r2, [r3, #0] tcp_free(pcb); - 8037f32: 6878 ldr r0, [r7, #4] - 8037f34: f7ff fe8a bl 8037c4c + 8037f62: 6878 ldr r0, [r7, #4] + 8037f64: f7ff fe8a bl 8037c7c MIB2_STATS_INC(mib2.tcpattemptfails); break; - 8037f38: e004 b.n 8037f44 + 8037f68: e004 b.n 8037f74 default: return tcp_close_shutdown_fin(pcb); - 8037f3a: 6878 ldr r0, [r7, #4] - 8037f3c: f000 f81a bl 8037f74 - 8037f40: 4603 mov r3, r0 - 8037f42: e000 b.n 8037f46 + 8037f6a: 6878 ldr r0, [r7, #4] + 8037f6c: f000 f81a bl 8037fa4 + 8037f70: 4603 mov r3, r0 + 8037f72: e000 b.n 8037f76 } return ERR_OK; - 8037f44: 2300 movs r3, #0 -} - 8037f46: 4618 mov r0, r3 - 8037f48: 3710 adds r7, #16 - 8037f4a: 46bd mov sp, r7 - 8037f4c: bdb0 pop {r4, r5, r7, pc} - 8037f4e: bf00 nop - 8037f50: 08042d68 .word 0x08042d68 - 8037f54: 08042e3c .word 0x08042e3c - 8037f58: 08042dac .word 0x08042dac - 8037f5c: 08042e5c .word 0x08042e5c - 8037f60: 2400e964 .word 0x2400e964 - 8037f64: 2400e96c .word 0x2400e96c - 8037f68: 2400e9a4 .word 0x2400e9a4 - 8037f6c: 2400e95c .word 0x2400e95c - 8037f70: 2400e960 .word 0x2400e960 - -08037f74 : + 8037f74: 2300 movs r3, #0 +} + 8037f76: 4618 mov r0, r3 + 8037f78: 3710 adds r7, #16 + 8037f7a: 46bd mov sp, r7 + 8037f7c: bdb0 pop {r4, r5, r7, pc} + 8037f7e: bf00 nop + 8037f80: 08042d98 .word 0x08042d98 + 8037f84: 08042e6c .word 0x08042e6c + 8037f88: 08042ddc .word 0x08042ddc + 8037f8c: 08042e8c .word 0x08042e8c + 8037f90: 2400e964 .word 0x2400e964 + 8037f94: 2400e96c .word 0x2400e96c + 8037f98: 2400e9a4 .word 0x2400e9a4 + 8037f9c: 2400e95c .word 0x2400e95c + 8037fa0: 2400e960 .word 0x2400e960 + +08037fa4 : static err_t tcp_close_shutdown_fin(struct tcp_pcb *pcb) { - 8037f74: b580 push {r7, lr} - 8037f76: b084 sub sp, #16 - 8037f78: af00 add r7, sp, #0 - 8037f7a: 6078 str r0, [r7, #4] + 8037fa4: b580 push {r7, lr} + 8037fa6: b084 sub sp, #16 + 8037fa8: af00 add r7, sp, #0 + 8037faa: 6078 str r0, [r7, #4] err_t err; LWIP_ASSERT("pcb != NULL", pcb != NULL); - 8037f7c: 687b ldr r3, [r7, #4] - 8037f7e: 2b00 cmp r3, #0 - 8037f80: d106 bne.n 8037f90 - 8037f82: 4b2e ldr r3, [pc, #184] ; (803803c ) - 8037f84: f44f 72ce mov.w r2, #412 ; 0x19c - 8037f88: 492d ldr r1, [pc, #180] ; (8038040 ) - 8037f8a: 482e ldr r0, [pc, #184] ; (8038044 ) - 8037f8c: f008 fda8 bl 8040ae0 + 8037fac: 687b ldr r3, [r7, #4] + 8037fae: 2b00 cmp r3, #0 + 8037fb0: d106 bne.n 8037fc0 + 8037fb2: 4b2e ldr r3, [pc, #184] ; (803806c ) + 8037fb4: f44f 72ce mov.w r2, #412 ; 0x19c + 8037fb8: 492d ldr r1, [pc, #180] ; (8038070 ) + 8037fba: 482e ldr r0, [pc, #184] ; (8038074 ) + 8037fbc: f008 fda8 bl 8040b10 switch (pcb->state) { - 8037f90: 687b ldr r3, [r7, #4] - 8037f92: 7d1b ldrb r3, [r3, #20] - 8037f94: 2b07 cmp r3, #7 - 8037f96: d020 beq.n 8037fda - 8037f98: 2b07 cmp r3, #7 - 8037f9a: dc2b bgt.n 8037ff4 - 8037f9c: 2b03 cmp r3, #3 - 8037f9e: d002 beq.n 8037fa6 - 8037fa0: 2b04 cmp r3, #4 - 8037fa2: d00d beq.n 8037fc0 - 8037fa4: e026 b.n 8037ff4 + 8037fc0: 687b ldr r3, [r7, #4] + 8037fc2: 7d1b ldrb r3, [r3, #20] + 8037fc4: 2b07 cmp r3, #7 + 8037fc6: d020 beq.n 803800a + 8037fc8: 2b07 cmp r3, #7 + 8037fca: dc2b bgt.n 8038024 + 8037fcc: 2b03 cmp r3, #3 + 8037fce: d002 beq.n 8037fd6 + 8037fd0: 2b04 cmp r3, #4 + 8037fd2: d00d beq.n 8037ff0 + 8037fd4: e026 b.n 8038024 case SYN_RCVD: err = tcp_send_fin(pcb); - 8037fa6: 6878 ldr r0, [r7, #4] - 8037fa8: f004 fda2 bl 803caf0 - 8037fac: 4603 mov r3, r0 - 8037fae: 73fb strb r3, [r7, #15] + 8037fd6: 6878 ldr r0, [r7, #4] + 8037fd8: f004 fda2 bl 803cb20 + 8037fdc: 4603 mov r3, r0 + 8037fde: 73fb strb r3, [r7, #15] if (err == ERR_OK) { - 8037fb0: f997 300f ldrsb.w r3, [r7, #15] - 8037fb4: 2b00 cmp r3, #0 - 8037fb6: d11f bne.n 8037ff8 + 8037fe0: f997 300f ldrsb.w r3, [r7, #15] + 8037fe4: 2b00 cmp r3, #0 + 8037fe6: d11f bne.n 8038028 tcp_backlog_accepted(pcb); MIB2_STATS_INC(mib2.tcpattemptfails); pcb->state = FIN_WAIT_1; - 8037fb8: 687b ldr r3, [r7, #4] - 8037fba: 2205 movs r2, #5 - 8037fbc: 751a strb r2, [r3, #20] + 8037fe8: 687b ldr r3, [r7, #4] + 8037fea: 2205 movs r2, #5 + 8037fec: 751a strb r2, [r3, #20] } break; - 8037fbe: e01b b.n 8037ff8 + 8037fee: e01b b.n 8038028 case ESTABLISHED: err = tcp_send_fin(pcb); - 8037fc0: 6878 ldr r0, [r7, #4] - 8037fc2: f004 fd95 bl 803caf0 - 8037fc6: 4603 mov r3, r0 - 8037fc8: 73fb strb r3, [r7, #15] + 8037ff0: 6878 ldr r0, [r7, #4] + 8037ff2: f004 fd95 bl 803cb20 + 8037ff6: 4603 mov r3, r0 + 8037ff8: 73fb strb r3, [r7, #15] if (err == ERR_OK) { - 8037fca: f997 300f ldrsb.w r3, [r7, #15] - 8037fce: 2b00 cmp r3, #0 - 8037fd0: d114 bne.n 8037ffc + 8037ffa: f997 300f ldrsb.w r3, [r7, #15] + 8037ffe: 2b00 cmp r3, #0 + 8038000: d114 bne.n 803802c MIB2_STATS_INC(mib2.tcpestabresets); pcb->state = FIN_WAIT_1; - 8037fd2: 687b ldr r3, [r7, #4] - 8037fd4: 2205 movs r2, #5 - 8037fd6: 751a strb r2, [r3, #20] + 8038002: 687b ldr r3, [r7, #4] + 8038004: 2205 movs r2, #5 + 8038006: 751a strb r2, [r3, #20] } break; - 8037fd8: e010 b.n 8037ffc + 8038008: e010 b.n 803802c case CLOSE_WAIT: err = tcp_send_fin(pcb); - 8037fda: 6878 ldr r0, [r7, #4] - 8037fdc: f004 fd88 bl 803caf0 - 8037fe0: 4603 mov r3, r0 - 8037fe2: 73fb strb r3, [r7, #15] + 803800a: 6878 ldr r0, [r7, #4] + 803800c: f004 fd88 bl 803cb20 + 8038010: 4603 mov r3, r0 + 8038012: 73fb strb r3, [r7, #15] if (err == ERR_OK) { - 8037fe4: f997 300f ldrsb.w r3, [r7, #15] - 8037fe8: 2b00 cmp r3, #0 - 8037fea: d109 bne.n 8038000 + 8038014: f997 300f ldrsb.w r3, [r7, #15] + 8038018: 2b00 cmp r3, #0 + 803801a: d109 bne.n 8038030 MIB2_STATS_INC(mib2.tcpestabresets); pcb->state = LAST_ACK; - 8037fec: 687b ldr r3, [r7, #4] - 8037fee: 2209 movs r2, #9 - 8037ff0: 751a strb r2, [r3, #20] + 803801c: 687b ldr r3, [r7, #4] + 803801e: 2209 movs r2, #9 + 8038020: 751a strb r2, [r3, #20] } break; - 8037ff2: e005 b.n 8038000 + 8038022: e005 b.n 8038030 default: /* Has already been closed, do nothing. */ return ERR_OK; - 8037ff4: 2300 movs r3, #0 - 8037ff6: e01c b.n 8038032 + 8038024: 2300 movs r3, #0 + 8038026: e01c b.n 8038062 break; - 8037ff8: bf00 nop - 8037ffa: e002 b.n 8038002 + 8038028: bf00 nop + 803802a: e002 b.n 8038032 break; - 8037ffc: bf00 nop - 8037ffe: e000 b.n 8038002 + 803802c: bf00 nop + 803802e: e000 b.n 8038032 break; - 8038000: bf00 nop + 8038030: bf00 nop } if (err == ERR_OK) { - 8038002: f997 300f ldrsb.w r3, [r7, #15] - 8038006: 2b00 cmp r3, #0 - 8038008: d103 bne.n 8038012 + 8038032: f997 300f ldrsb.w r3, [r7, #15] + 8038036: 2b00 cmp r3, #0 + 8038038: d103 bne.n 8038042 /* To ensure all data has been sent when tcp_close returns, we have to make sure tcp_output doesn't fail. Since we don't really have to ensure all data has been sent when tcp_close returns (unsent data is sent from tcp timer functions, also), we don't care for the return value of tcp_output for now. */ tcp_output(pcb); - 803800a: 6878 ldr r0, [r7, #4] - 803800c: f004 feae bl 803cd6c - 8038010: e00d b.n 803802e + 803803a: 6878 ldr r0, [r7, #4] + 803803c: f004 feae bl 803cd9c + 8038040: e00d b.n 803805e } else if (err == ERR_MEM) { - 8038012: f997 300f ldrsb.w r3, [r7, #15] - 8038016: f1b3 3fff cmp.w r3, #4294967295 - 803801a: d108 bne.n 803802e + 8038042: f997 300f ldrsb.w r3, [r7, #15] + 8038046: f1b3 3fff cmp.w r3, #4294967295 + 803804a: d108 bne.n 803805e /* Mark this pcb for closing. Closing is retried from tcp_tmr. */ tcp_set_flags(pcb, TF_CLOSEPEND); - 803801c: 687b ldr r3, [r7, #4] - 803801e: 8b5b ldrh r3, [r3, #26] - 8038020: f043 0308 orr.w r3, r3, #8 - 8038024: b29a uxth r2, r3 - 8038026: 687b ldr r3, [r7, #4] - 8038028: 835a strh r2, [r3, #26] + 803804c: 687b ldr r3, [r7, #4] + 803804e: 8b5b ldrh r3, [r3, #26] + 8038050: f043 0308 orr.w r3, r3, #8 + 8038054: b29a uxth r2, r3 + 8038056: 687b ldr r3, [r7, #4] + 8038058: 835a strh r2, [r3, #26] /* We have to return ERR_OK from here to indicate to the callers that this pcb should not be used any more as it will be freed soon via tcp_tmr. This is OK here since sending FIN does not guarantee a time frime for actually freeing the pcb, either (it is left in closure states for remote ACK or timeout) */ return ERR_OK; - 803802a: 2300 movs r3, #0 - 803802c: e001 b.n 8038032 + 803805a: 2300 movs r3, #0 + 803805c: e001 b.n 8038062 } return err; - 803802e: f997 300f ldrsb.w r3, [r7, #15] -} - 8038032: 4618 mov r0, r3 - 8038034: 3710 adds r7, #16 - 8038036: 46bd mov sp, r7 - 8038038: bd80 pop {r7, pc} - 803803a: bf00 nop - 803803c: 08042d68 .word 0x08042d68 - 8038040: 08042e18 .word 0x08042e18 - 8038044: 08042dac .word 0x08042dac - -08038048 : + 803805e: f997 300f ldrsb.w r3, [r7, #15] +} + 8038062: 4618 mov r0, r3 + 8038064: 3710 adds r7, #16 + 8038066: 46bd mov sp, r7 + 8038068: bd80 pop {r7, pc} + 803806a: bf00 nop + 803806c: 08042d98 .word 0x08042d98 + 8038070: 08042e48 .word 0x08042e48 + 8038074: 08042ddc .word 0x08042ddc + +08038078 : * @return ERR_OK if connection has been closed * another err_t if closing failed and pcb is not freed */ err_t tcp_close(struct tcp_pcb *pcb) { - 8038048: b580 push {r7, lr} - 803804a: b082 sub sp, #8 - 803804c: af00 add r7, sp, #0 - 803804e: 6078 str r0, [r7, #4] + 8038078: b580 push {r7, lr} + 803807a: b082 sub sp, #8 + 803807c: af00 add r7, sp, #0 + 803807e: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_close: invalid pcb", pcb != NULL, return ERR_ARG); - 8038050: 687b ldr r3, [r7, #4] - 8038052: 2b00 cmp r3, #0 - 8038054: d109 bne.n 803806a - 8038056: 4b0f ldr r3, [pc, #60] ; (8038094 ) - 8038058: f44f 72f4 mov.w r2, #488 ; 0x1e8 - 803805c: 490e ldr r1, [pc, #56] ; (8038098 ) - 803805e: 480f ldr r0, [pc, #60] ; (803809c ) - 8038060: f008 fd3e bl 8040ae0 - 8038064: f06f 030f mvn.w r3, #15 - 8038068: e00f b.n 803808a + 8038080: 687b ldr r3, [r7, #4] + 8038082: 2b00 cmp r3, #0 + 8038084: d109 bne.n 803809a + 8038086: 4b0f ldr r3, [pc, #60] ; (80380c4 ) + 8038088: f44f 72f4 mov.w r2, #488 ; 0x1e8 + 803808c: 490e ldr r1, [pc, #56] ; (80380c8 ) + 803808e: 480f ldr r0, [pc, #60] ; (80380cc ) + 8038090: f008 fd3e bl 8040b10 + 8038094: f06f 030f mvn.w r3, #15 + 8038098: e00f b.n 80380ba LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in ")); tcp_debug_print_state(pcb->state); if (pcb->state != LISTEN) { - 803806a: 687b ldr r3, [r7, #4] - 803806c: 7d1b ldrb r3, [r3, #20] - 803806e: 2b01 cmp r3, #1 - 8038070: d006 beq.n 8038080 + 803809a: 687b ldr r3, [r7, #4] + 803809c: 7d1b ldrb r3, [r3, #20] + 803809e: 2b01 cmp r3, #1 + 80380a0: d006 beq.n 80380b0 /* Set a flag not to receive any more data... */ tcp_set_flags(pcb, TF_RXCLOSED); - 8038072: 687b ldr r3, [r7, #4] - 8038074: 8b5b ldrh r3, [r3, #26] - 8038076: f043 0310 orr.w r3, r3, #16 - 803807a: b29a uxth r2, r3 - 803807c: 687b ldr r3, [r7, #4] - 803807e: 835a strh r2, [r3, #26] + 80380a2: 687b ldr r3, [r7, #4] + 80380a4: 8b5b ldrh r3, [r3, #26] + 80380a6: f043 0310 orr.w r3, r3, #16 + 80380aa: b29a uxth r2, r3 + 80380ac: 687b ldr r3, [r7, #4] + 80380ae: 835a strh r2, [r3, #26] } /* ... and close */ return tcp_close_shutdown(pcb, 1); - 8038080: 2101 movs r1, #1 - 8038082: 6878 ldr r0, [r7, #4] - 8038084: f7ff fe94 bl 8037db0 - 8038088: 4603 mov r3, r0 -} - 803808a: 4618 mov r0, r3 - 803808c: 3708 adds r7, #8 - 803808e: 46bd mov sp, r7 - 8038090: bd80 pop {r7, pc} - 8038092: bf00 nop - 8038094: 08042d68 .word 0x08042d68 - 8038098: 08042e78 .word 0x08042e78 - 803809c: 08042dac .word 0x08042dac - -080380a0 : + 80380b0: 2101 movs r1, #1 + 80380b2: 6878 ldr r0, [r7, #4] + 80380b4: f7ff fe94 bl 8037de0 + 80380b8: 4603 mov r3, r0 +} + 80380ba: 4618 mov r0, r3 + 80380bc: 3708 adds r7, #8 + 80380be: 46bd mov sp, r7 + 80380c0: bd80 pop {r7, pc} + 80380c2: bf00 nop + 80380c4: 08042d98 .word 0x08042d98 + 80380c8: 08042ea8 .word 0x08042ea8 + 80380cc: 08042ddc .word 0x08042ddc + +080380d0 : * @param pcb the tcp_pcb to abort * @param reset boolean to indicate whether a reset should be sent */ void tcp_abandon(struct tcp_pcb *pcb, int reset) { - 80380a0: b580 push {r7, lr} - 80380a2: b08e sub sp, #56 ; 0x38 - 80380a4: af04 add r7, sp, #16 - 80380a6: 6078 str r0, [r7, #4] - 80380a8: 6039 str r1, [r7, #0] + 80380d0: b580 push {r7, lr} + 80380d2: b08e sub sp, #56 ; 0x38 + 80380d4: af04 add r7, sp, #16 + 80380d6: 6078 str r0, [r7, #4] + 80380d8: 6039 str r1, [r7, #0] #endif /* LWIP_CALLBACK_API */ void *errf_arg; LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_abandon: invalid pcb", pcb != NULL, return); - 80380aa: 687b ldr r3, [r7, #4] - 80380ac: 2b00 cmp r3, #0 - 80380ae: d107 bne.n 80380c0 - 80380b0: 4b52 ldr r3, [pc, #328] ; (80381fc ) - 80380b2: f240 223d movw r2, #573 ; 0x23d - 80380b6: 4952 ldr r1, [pc, #328] ; (8038200 ) - 80380b8: 4852 ldr r0, [pc, #328] ; (8038204 ) - 80380ba: f008 fd11 bl 8040ae0 - 80380be: e099 b.n 80381f4 + 80380da: 687b ldr r3, [r7, #4] + 80380dc: 2b00 cmp r3, #0 + 80380de: d107 bne.n 80380f0 + 80380e0: 4b52 ldr r3, [pc, #328] ; (803822c ) + 80380e2: f240 223d movw r2, #573 ; 0x23d + 80380e6: 4952 ldr r1, [pc, #328] ; (8038230 ) + 80380e8: 4852 ldr r0, [pc, #328] ; (8038234 ) + 80380ea: f008 fd11 bl 8040b10 + 80380ee: e099 b.n 8038224 /* pcb->state LISTEN not allowed here */ LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs", - 80380c0: 687b ldr r3, [r7, #4] - 80380c2: 7d1b ldrb r3, [r3, #20] - 80380c4: 2b01 cmp r3, #1 - 80380c6: d106 bne.n 80380d6 - 80380c8: 4b4c ldr r3, [pc, #304] ; (80381fc ) - 80380ca: f44f 7210 mov.w r2, #576 ; 0x240 - 80380ce: 494e ldr r1, [pc, #312] ; (8038208 ) - 80380d0: 484c ldr r0, [pc, #304] ; (8038204 ) - 80380d2: f008 fd05 bl 8040ae0 + 80380f0: 687b ldr r3, [r7, #4] + 80380f2: 7d1b ldrb r3, [r3, #20] + 80380f4: 2b01 cmp r3, #1 + 80380f6: d106 bne.n 8038106 + 80380f8: 4b4c ldr r3, [pc, #304] ; (803822c ) + 80380fa: f44f 7210 mov.w r2, #576 ; 0x240 + 80380fe: 494e ldr r1, [pc, #312] ; (8038238 ) + 8038100: 484c ldr r0, [pc, #304] ; (8038234 ) + 8038102: f008 fd05 bl 8040b10 pcb->state != LISTEN); /* Figure out on which TCP PCB list we are, and remove us. If we are in an active state, call the receive function associated with the PCB with a NULL argument, and send an RST to the remote end. */ if (pcb->state == TIME_WAIT) { - 80380d6: 687b ldr r3, [r7, #4] - 80380d8: 7d1b ldrb r3, [r3, #20] - 80380da: 2b0a cmp r3, #10 - 80380dc: d107 bne.n 80380ee + 8038106: 687b ldr r3, [r7, #4] + 8038108: 7d1b ldrb r3, [r3, #20] + 803810a: 2b0a cmp r3, #10 + 803810c: d107 bne.n 803811e tcp_pcb_remove(&tcp_tw_pcbs, pcb); - 80380de: 6879 ldr r1, [r7, #4] - 80380e0: 484a ldr r0, [pc, #296] ; (803820c ) - 80380e2: f001 fa27 bl 8039534 + 803810e: 6879 ldr r1, [r7, #4] + 8038110: 484a ldr r0, [pc, #296] ; (803823c ) + 8038112: f001 fa27 bl 8039564 tcp_free(pcb); - 80380e6: 6878 ldr r0, [r7, #4] - 80380e8: f7ff fdb0 bl 8037c4c - 80380ec: e082 b.n 80381f4 + 8038116: 6878 ldr r0, [r7, #4] + 8038118: f7ff fdb0 bl 8037c7c + 803811c: e082 b.n 8038224 } else { int send_rst = 0; - 80380ee: 2300 movs r3, #0 - 80380f0: 627b str r3, [r7, #36] ; 0x24 + 803811e: 2300 movs r3, #0 + 8038120: 627b str r3, [r7, #36] ; 0x24 u16_t local_port = 0; - 80380f2: 2300 movs r3, #0 - 80380f4: 847b strh r3, [r7, #34] ; 0x22 + 8038122: 2300 movs r3, #0 + 8038124: 847b strh r3, [r7, #34] ; 0x22 enum tcp_state last_state; seqno = pcb->snd_nxt; - 80380f6: 687b ldr r3, [r7, #4] - 80380f8: 6d1b ldr r3, [r3, #80] ; 0x50 - 80380fa: 61bb str r3, [r7, #24] + 8038126: 687b ldr r3, [r7, #4] + 8038128: 6d1b ldr r3, [r3, #80] ; 0x50 + 803812a: 61bb str r3, [r7, #24] ackno = pcb->rcv_nxt; - 80380fc: 687b ldr r3, [r7, #4] - 80380fe: 6a5b ldr r3, [r3, #36] ; 0x24 - 8038100: 617b str r3, [r7, #20] + 803812c: 687b ldr r3, [r7, #4] + 803812e: 6a5b ldr r3, [r3, #36] ; 0x24 + 8038130: 617b str r3, [r7, #20] #if LWIP_CALLBACK_API errf = pcb->errf; - 8038102: 687b ldr r3, [r7, #4] - 8038104: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8038108: 613b str r3, [r7, #16] + 8038132: 687b ldr r3, [r7, #4] + 8038134: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8038138: 613b str r3, [r7, #16] #endif /* LWIP_CALLBACK_API */ errf_arg = pcb->callback_arg; - 803810a: 687b ldr r3, [r7, #4] - 803810c: 691b ldr r3, [r3, #16] - 803810e: 60fb str r3, [r7, #12] + 803813a: 687b ldr r3, [r7, #4] + 803813c: 691b ldr r3, [r3, #16] + 803813e: 60fb str r3, [r7, #12] if (pcb->state == CLOSED) { - 8038110: 687b ldr r3, [r7, #4] - 8038112: 7d1b ldrb r3, [r3, #20] - 8038114: 2b00 cmp r3, #0 - 8038116: d126 bne.n 8038166 + 8038140: 687b ldr r3, [r7, #4] + 8038142: 7d1b ldrb r3, [r3, #20] + 8038144: 2b00 cmp r3, #0 + 8038146: d126 bne.n 8038196 if (pcb->local_port != 0) { - 8038118: 687b ldr r3, [r7, #4] - 803811a: 8adb ldrh r3, [r3, #22] - 803811c: 2b00 cmp r3, #0 - 803811e: d02e beq.n 803817e + 8038148: 687b ldr r3, [r7, #4] + 803814a: 8adb ldrh r3, [r3, #22] + 803814c: 2b00 cmp r3, #0 + 803814e: d02e beq.n 80381ae /* bound, not yet opened */ TCP_RMV(&tcp_bound_pcbs, pcb); - 8038120: 4b3b ldr r3, [pc, #236] ; (8038210 ) - 8038122: 681b ldr r3, [r3, #0] - 8038124: 687a ldr r2, [r7, #4] - 8038126: 429a cmp r2, r3 - 8038128: d105 bne.n 8038136 - 803812a: 4b39 ldr r3, [pc, #228] ; (8038210 ) - 803812c: 681b ldr r3, [r3, #0] - 803812e: 68db ldr r3, [r3, #12] - 8038130: 4a37 ldr r2, [pc, #220] ; (8038210 ) - 8038132: 6013 str r3, [r2, #0] - 8038134: e013 b.n 803815e - 8038136: 4b36 ldr r3, [pc, #216] ; (8038210 ) - 8038138: 681b ldr r3, [r3, #0] - 803813a: 61fb str r3, [r7, #28] - 803813c: e00c b.n 8038158 - 803813e: 69fb ldr r3, [r7, #28] - 8038140: 68db ldr r3, [r3, #12] - 8038142: 687a ldr r2, [r7, #4] - 8038144: 429a cmp r2, r3 - 8038146: d104 bne.n 8038152 - 8038148: 687b ldr r3, [r7, #4] - 803814a: 68da ldr r2, [r3, #12] - 803814c: 69fb ldr r3, [r7, #28] - 803814e: 60da str r2, [r3, #12] - 8038150: e005 b.n 803815e - 8038152: 69fb ldr r3, [r7, #28] - 8038154: 68db ldr r3, [r3, #12] - 8038156: 61fb str r3, [r7, #28] - 8038158: 69fb ldr r3, [r7, #28] - 803815a: 2b00 cmp r3, #0 - 803815c: d1ef bne.n 803813e - 803815e: 687b ldr r3, [r7, #4] - 8038160: 2200 movs r2, #0 - 8038162: 60da str r2, [r3, #12] - 8038164: e00b b.n 803817e + 8038150: 4b3b ldr r3, [pc, #236] ; (8038240 ) + 8038152: 681b ldr r3, [r3, #0] + 8038154: 687a ldr r2, [r7, #4] + 8038156: 429a cmp r2, r3 + 8038158: d105 bne.n 8038166 + 803815a: 4b39 ldr r3, [pc, #228] ; (8038240 ) + 803815c: 681b ldr r3, [r3, #0] + 803815e: 68db ldr r3, [r3, #12] + 8038160: 4a37 ldr r2, [pc, #220] ; (8038240 ) + 8038162: 6013 str r3, [r2, #0] + 8038164: e013 b.n 803818e + 8038166: 4b36 ldr r3, [pc, #216] ; (8038240 ) + 8038168: 681b ldr r3, [r3, #0] + 803816a: 61fb str r3, [r7, #28] + 803816c: e00c b.n 8038188 + 803816e: 69fb ldr r3, [r7, #28] + 8038170: 68db ldr r3, [r3, #12] + 8038172: 687a ldr r2, [r7, #4] + 8038174: 429a cmp r2, r3 + 8038176: d104 bne.n 8038182 + 8038178: 687b ldr r3, [r7, #4] + 803817a: 68da ldr r2, [r3, #12] + 803817c: 69fb ldr r3, [r7, #28] + 803817e: 60da str r2, [r3, #12] + 8038180: e005 b.n 803818e + 8038182: 69fb ldr r3, [r7, #28] + 8038184: 68db ldr r3, [r3, #12] + 8038186: 61fb str r3, [r7, #28] + 8038188: 69fb ldr r3, [r7, #28] + 803818a: 2b00 cmp r3, #0 + 803818c: d1ef bne.n 803816e + 803818e: 687b ldr r3, [r7, #4] + 8038190: 2200 movs r2, #0 + 8038192: 60da str r2, [r3, #12] + 8038194: e00b b.n 80381ae } } else { send_rst = reset; - 8038166: 683b ldr r3, [r7, #0] - 8038168: 627b str r3, [r7, #36] ; 0x24 + 8038196: 683b ldr r3, [r7, #0] + 8038198: 627b str r3, [r7, #36] ; 0x24 local_port = pcb->local_port; - 803816a: 687b ldr r3, [r7, #4] - 803816c: 8adb ldrh r3, [r3, #22] - 803816e: 847b strh r3, [r7, #34] ; 0x22 + 803819a: 687b ldr r3, [r7, #4] + 803819c: 8adb ldrh r3, [r3, #22] + 803819e: 847b strh r3, [r7, #34] ; 0x22 TCP_PCB_REMOVE_ACTIVE(pcb); - 8038170: 6879 ldr r1, [r7, #4] - 8038172: 4828 ldr r0, [pc, #160] ; (8038214 ) - 8038174: f001 f9de bl 8039534 - 8038178: 4b27 ldr r3, [pc, #156] ; (8038218 ) - 803817a: 2201 movs r2, #1 - 803817c: 701a strb r2, [r3, #0] + 80381a0: 6879 ldr r1, [r7, #4] + 80381a2: 4828 ldr r0, [pc, #160] ; (8038244 ) + 80381a4: f001 f9de bl 8039564 + 80381a8: 4b27 ldr r3, [pc, #156] ; (8038248 ) + 80381aa: 2201 movs r2, #1 + 80381ac: 701a strb r2, [r3, #0] } if (pcb->unacked != NULL) { - 803817e: 687b ldr r3, [r7, #4] - 8038180: 6f1b ldr r3, [r3, #112] ; 0x70 - 8038182: 2b00 cmp r3, #0 - 8038184: d004 beq.n 8038190 + 80381ae: 687b ldr r3, [r7, #4] + 80381b0: 6f1b ldr r3, [r3, #112] ; 0x70 + 80381b2: 2b00 cmp r3, #0 + 80381b4: d004 beq.n 80381c0 tcp_segs_free(pcb->unacked); - 8038186: 687b ldr r3, [r7, #4] - 8038188: 6f1b ldr r3, [r3, #112] ; 0x70 - 803818a: 4618 mov r0, r3 - 803818c: f000 fed6 bl 8038f3c + 80381b6: 687b ldr r3, [r7, #4] + 80381b8: 6f1b ldr r3, [r3, #112] ; 0x70 + 80381ba: 4618 mov r0, r3 + 80381bc: f000 fed6 bl 8038f6c } if (pcb->unsent != NULL) { - 8038190: 687b ldr r3, [r7, #4] - 8038192: 6edb ldr r3, [r3, #108] ; 0x6c - 8038194: 2b00 cmp r3, #0 - 8038196: d004 beq.n 80381a2 + 80381c0: 687b ldr r3, [r7, #4] + 80381c2: 6edb ldr r3, [r3, #108] ; 0x6c + 80381c4: 2b00 cmp r3, #0 + 80381c6: d004 beq.n 80381d2 tcp_segs_free(pcb->unsent); - 8038198: 687b ldr r3, [r7, #4] - 803819a: 6edb ldr r3, [r3, #108] ; 0x6c - 803819c: 4618 mov r0, r3 - 803819e: f000 fecd bl 8038f3c + 80381c8: 687b ldr r3, [r7, #4] + 80381ca: 6edb ldr r3, [r3, #108] ; 0x6c + 80381cc: 4618 mov r0, r3 + 80381ce: f000 fecd bl 8038f6c } #if TCP_QUEUE_OOSEQ if (pcb->ooseq != NULL) { - 80381a2: 687b ldr r3, [r7, #4] - 80381a4: 6f5b ldr r3, [r3, #116] ; 0x74 - 80381a6: 2b00 cmp r3, #0 - 80381a8: d004 beq.n 80381b4 + 80381d2: 687b ldr r3, [r7, #4] + 80381d4: 6f5b ldr r3, [r3, #116] ; 0x74 + 80381d6: 2b00 cmp r3, #0 + 80381d8: d004 beq.n 80381e4 tcp_segs_free(pcb->ooseq); - 80381aa: 687b ldr r3, [r7, #4] - 80381ac: 6f5b ldr r3, [r3, #116] ; 0x74 - 80381ae: 4618 mov r0, r3 - 80381b0: f000 fec4 bl 8038f3c + 80381da: 687b ldr r3, [r7, #4] + 80381dc: 6f5b ldr r3, [r3, #116] ; 0x74 + 80381de: 4618 mov r0, r3 + 80381e0: f000 fec4 bl 8038f6c } #endif /* TCP_QUEUE_OOSEQ */ tcp_backlog_accepted(pcb); if (send_rst) { - 80381b4: 6a7b ldr r3, [r7, #36] ; 0x24 - 80381b6: 2b00 cmp r3, #0 - 80381b8: d00e beq.n 80381d8 + 80381e4: 6a7b ldr r3, [r7, #36] ; 0x24 + 80381e6: 2b00 cmp r3, #0 + 80381e8: d00e beq.n 8038208 LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n")); tcp_rst(pcb, seqno, ackno, &pcb->local_ip, &pcb->remote_ip, local_port, pcb->remote_port); - 80381ba: 6879 ldr r1, [r7, #4] - 80381bc: 687b ldr r3, [r7, #4] - 80381be: 3304 adds r3, #4 - 80381c0: 687a ldr r2, [r7, #4] - 80381c2: 8b12 ldrh r2, [r2, #24] - 80381c4: 9202 str r2, [sp, #8] - 80381c6: 8c7a ldrh r2, [r7, #34] ; 0x22 - 80381c8: 9201 str r2, [sp, #4] - 80381ca: 9300 str r3, [sp, #0] - 80381cc: 460b mov r3, r1 - 80381ce: 697a ldr r2, [r7, #20] - 80381d0: 69b9 ldr r1, [r7, #24] - 80381d2: 6878 ldr r0, [r7, #4] - 80381d4: f005 fb7e bl 803d8d4 + 80381ea: 6879 ldr r1, [r7, #4] + 80381ec: 687b ldr r3, [r7, #4] + 80381ee: 3304 adds r3, #4 + 80381f0: 687a ldr r2, [r7, #4] + 80381f2: 8b12 ldrh r2, [r2, #24] + 80381f4: 9202 str r2, [sp, #8] + 80381f6: 8c7a ldrh r2, [r7, #34] ; 0x22 + 80381f8: 9201 str r2, [sp, #4] + 80381fa: 9300 str r3, [sp, #0] + 80381fc: 460b mov r3, r1 + 80381fe: 697a ldr r2, [r7, #20] + 8038200: 69b9 ldr r1, [r7, #24] + 8038202: 6878 ldr r0, [r7, #4] + 8038204: f005 fb7e bl 803d904 } last_state = pcb->state; - 80381d8: 687b ldr r3, [r7, #4] - 80381da: 7d1b ldrb r3, [r3, #20] - 80381dc: 72fb strb r3, [r7, #11] + 8038208: 687b ldr r3, [r7, #4] + 803820a: 7d1b ldrb r3, [r3, #20] + 803820c: 72fb strb r3, [r7, #11] tcp_free(pcb); - 80381de: 6878 ldr r0, [r7, #4] - 80381e0: f7ff fd34 bl 8037c4c + 803820e: 6878 ldr r0, [r7, #4] + 8038210: f7ff fd34 bl 8037c7c TCP_EVENT_ERR(last_state, errf, errf_arg, ERR_ABRT); - 80381e4: 693b ldr r3, [r7, #16] - 80381e6: 2b00 cmp r3, #0 - 80381e8: d004 beq.n 80381f4 - 80381ea: 693b ldr r3, [r7, #16] - 80381ec: f06f 010c mvn.w r1, #12 - 80381f0: 68f8 ldr r0, [r7, #12] - 80381f2: 4798 blx r3 - } -} - 80381f4: 3728 adds r7, #40 ; 0x28 - 80381f6: 46bd mov sp, r7 - 80381f8: bd80 pop {r7, pc} - 80381fa: bf00 nop - 80381fc: 08042d68 .word 0x08042d68 - 8038200: 08042eac .word 0x08042eac - 8038204: 08042dac .word 0x08042dac - 8038208: 08042ec8 .word 0x08042ec8 - 803820c: 2400e968 .word 0x2400e968 - 8038210: 2400e95c .word 0x2400e95c - 8038214: 2400e964 .word 0x2400e964 - 8038218: 2400e96c .word 0x2400e96c - -0803821c : + 8038214: 693b ldr r3, [r7, #16] + 8038216: 2b00 cmp r3, #0 + 8038218: d004 beq.n 8038224 + 803821a: 693b ldr r3, [r7, #16] + 803821c: f06f 010c mvn.w r1, #12 + 8038220: 68f8 ldr r0, [r7, #12] + 8038222: 4798 blx r3 + } +} + 8038224: 3728 adds r7, #40 ; 0x28 + 8038226: 46bd mov sp, r7 + 8038228: bd80 pop {r7, pc} + 803822a: bf00 nop + 803822c: 08042d98 .word 0x08042d98 + 8038230: 08042edc .word 0x08042edc + 8038234: 08042ddc .word 0x08042ddc + 8038238: 08042ef8 .word 0x08042ef8 + 803823c: 2400e968 .word 0x2400e968 + 8038240: 2400e95c .word 0x2400e95c + 8038244: 2400e964 .word 0x2400e964 + 8038248: 2400e96c .word 0x2400e96c + +0803824c : * * @param pcb the tcp pcb to abort */ void tcp_abort(struct tcp_pcb *pcb) { - 803821c: b580 push {r7, lr} - 803821e: b082 sub sp, #8 - 8038220: af00 add r7, sp, #0 - 8038222: 6078 str r0, [r7, #4] + 803824c: b580 push {r7, lr} + 803824e: b082 sub sp, #8 + 8038250: af00 add r7, sp, #0 + 8038252: 6078 str r0, [r7, #4] tcp_abandon(pcb, 1); - 8038224: 2101 movs r1, #1 - 8038226: 6878 ldr r0, [r7, #4] - 8038228: f7ff ff3a bl 80380a0 + 8038254: 2101 movs r1, #1 + 8038256: 6878 ldr r0, [r7, #4] + 8038258: f7ff ff3a bl 80380d0 } - 803822c: bf00 nop - 803822e: 3708 adds r7, #8 - 8038230: 46bd mov sp, r7 - 8038232: bd80 pop {r7, pc} + 803825c: bf00 nop + 803825e: 3708 adds r7, #8 + 8038260: 46bd mov sp, r7 + 8038262: bd80 pop {r7, pc} -08038234 : +08038264 : * ERR_VAL if bind failed because the PCB is not in a valid state * ERR_OK if bound */ err_t tcp_bind(struct tcp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port) { - 8038234: b580 push {r7, lr} - 8038236: b088 sub sp, #32 - 8038238: af00 add r7, sp, #0 - 803823a: 60f8 str r0, [r7, #12] - 803823c: 60b9 str r1, [r7, #8] - 803823e: 4613 mov r3, r2 - 8038240: 80fb strh r3, [r7, #6] + 8038264: b580 push {r7, lr} + 8038266: b088 sub sp, #32 + 8038268: af00 add r7, sp, #0 + 803826a: 60f8 str r0, [r7, #12] + 803826c: 60b9 str r1, [r7, #8] + 803826e: 4613 mov r3, r2 + 8038270: 80fb strh r3, [r7, #6] int i; int max_pcb_list = NUM_TCP_PCB_LISTS; - 8038242: 2304 movs r3, #4 - 8038244: 617b str r3, [r7, #20] + 8038272: 2304 movs r3, #4 + 8038274: 617b str r3, [r7, #20] LWIP_ASSERT_CORE_LOCKED(); #if LWIP_IPV4 /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */ if (ipaddr == NULL) { - 8038246: 68bb ldr r3, [r7, #8] - 8038248: 2b00 cmp r3, #0 - 803824a: d101 bne.n 8038250 + 8038276: 68bb ldr r3, [r7, #8] + 8038278: 2b00 cmp r3, #0 + 803827a: d101 bne.n 8038280 ipaddr = IP4_ADDR_ANY; - 803824c: 4b3e ldr r3, [pc, #248] ; (8038348 ) - 803824e: 60bb str r3, [r7, #8] + 803827c: 4b3e ldr r3, [pc, #248] ; (8038378 ) + 803827e: 60bb str r3, [r7, #8] } #else /* LWIP_IPV4 */ LWIP_ERROR("tcp_bind: invalid ipaddr", ipaddr != NULL, return ERR_ARG); #endif /* LWIP_IPV4 */ LWIP_ERROR("tcp_bind: invalid pcb", pcb != NULL, return ERR_ARG); - 8038250: 68fb ldr r3, [r7, #12] - 8038252: 2b00 cmp r3, #0 - 8038254: d109 bne.n 803826a - 8038256: 4b3d ldr r3, [pc, #244] ; (803834c ) - 8038258: f240 22a9 movw r2, #681 ; 0x2a9 - 803825c: 493c ldr r1, [pc, #240] ; (8038350 ) - 803825e: 483d ldr r0, [pc, #244] ; (8038354 ) - 8038260: f008 fc3e bl 8040ae0 - 8038264: f06f 030f mvn.w r3, #15 - 8038268: e06a b.n 8038340 + 8038280: 68fb ldr r3, [r7, #12] + 8038282: 2b00 cmp r3, #0 + 8038284: d109 bne.n 803829a + 8038286: 4b3d ldr r3, [pc, #244] ; (803837c ) + 8038288: f240 22a9 movw r2, #681 ; 0x2a9 + 803828c: 493c ldr r1, [pc, #240] ; (8038380 ) + 803828e: 483d ldr r0, [pc, #244] ; (8038384 ) + 8038290: f008 fc3e bl 8040b10 + 8038294: f06f 030f mvn.w r3, #15 + 8038298: e06a b.n 8038370 LWIP_ERROR("tcp_bind: can only bind in state CLOSED", pcb->state == CLOSED, return ERR_VAL); - 803826a: 68fb ldr r3, [r7, #12] - 803826c: 7d1b ldrb r3, [r3, #20] - 803826e: 2b00 cmp r3, #0 - 8038270: d009 beq.n 8038286 - 8038272: 4b36 ldr r3, [pc, #216] ; (803834c ) - 8038274: f240 22ab movw r2, #683 ; 0x2ab - 8038278: 4937 ldr r1, [pc, #220] ; (8038358 ) - 803827a: 4836 ldr r0, [pc, #216] ; (8038354 ) - 803827c: f008 fc30 bl 8040ae0 - 8038280: f06f 0305 mvn.w r3, #5 - 8038284: e05c b.n 8038340 + 803829a: 68fb ldr r3, [r7, #12] + 803829c: 7d1b ldrb r3, [r3, #20] + 803829e: 2b00 cmp r3, #0 + 80382a0: d009 beq.n 80382b6 + 80382a2: 4b36 ldr r3, [pc, #216] ; (803837c ) + 80382a4: f240 22ab movw r2, #683 ; 0x2ab + 80382a8: 4937 ldr r1, [pc, #220] ; (8038388 ) + 80382aa: 4836 ldr r0, [pc, #216] ; (8038384 ) + 80382ac: f008 fc30 bl 8040b10 + 80382b0: f06f 0305 mvn.w r3, #5 + 80382b4: e05c b.n 8038370 ip6_addr_select_zone(ip_2_ip6(&zoned_ipaddr), ip_2_ip6(&zoned_ipaddr)); ipaddr = &zoned_ipaddr; } #endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */ if (port == 0) { - 8038286: 88fb ldrh r3, [r7, #6] - 8038288: 2b00 cmp r3, #0 - 803828a: d109 bne.n 80382a0 + 80382b6: 88fb ldrh r3, [r7, #6] + 80382b8: 2b00 cmp r3, #0 + 80382ba: d109 bne.n 80382d0 port = tcp_new_port(); - 803828c: f000 f9f0 bl 8038670 - 8038290: 4603 mov r3, r0 - 8038292: 80fb strh r3, [r7, #6] + 80382bc: f000 f9f0 bl 80386a0 + 80382c0: 4603 mov r3, r0 + 80382c2: 80fb strh r3, [r7, #6] if (port == 0) { - 8038294: 88fb ldrh r3, [r7, #6] - 8038296: 2b00 cmp r3, #0 - 8038298: d135 bne.n 8038306 + 80382c4: 88fb ldrh r3, [r7, #6] + 80382c6: 2b00 cmp r3, #0 + 80382c8: d135 bne.n 8038336 return ERR_BUF; - 803829a: f06f 0301 mvn.w r3, #1 - 803829e: e04f b.n 8038340 + 80382ca: f06f 0301 mvn.w r3, #1 + 80382ce: e04f b.n 8038370 } } else { /* Check if the address already is in use (on all lists) */ for (i = 0; i < max_pcb_list; i++) { - 80382a0: 2300 movs r3, #0 - 80382a2: 61fb str r3, [r7, #28] - 80382a4: e02b b.n 80382fe + 80382d0: 2300 movs r3, #0 + 80382d2: 61fb str r3, [r7, #28] + 80382d4: e02b b.n 803832e for (cpcb = *tcp_pcb_lists[i]; cpcb != NULL; cpcb = cpcb->next) { - 80382a6: 4a2d ldr r2, [pc, #180] ; (803835c ) - 80382a8: 69fb ldr r3, [r7, #28] - 80382aa: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 80382ae: 681b ldr r3, [r3, #0] - 80382b0: 61bb str r3, [r7, #24] - 80382b2: e01e b.n 80382f2 + 80382d6: 4a2d ldr r2, [pc, #180] ; (803838c ) + 80382d8: 69fb ldr r3, [r7, #28] + 80382da: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 80382de: 681b ldr r3, [r3, #0] + 80382e0: 61bb str r3, [r7, #24] + 80382e2: e01e b.n 8038322 if (cpcb->local_port == port) { - 80382b4: 69bb ldr r3, [r7, #24] - 80382b6: 8adb ldrh r3, [r3, #22] - 80382b8: 88fa ldrh r2, [r7, #6] - 80382ba: 429a cmp r2, r3 - 80382bc: d116 bne.n 80382ec + 80382e4: 69bb ldr r3, [r7, #24] + 80382e6: 8adb ldrh r3, [r3, #22] + 80382e8: 88fa ldrh r2, [r7, #6] + 80382ea: 429a cmp r2, r3 + 80382ec: d116 bne.n 803831c !ip_get_option(cpcb, SOF_REUSEADDR)) #endif /* SO_REUSE */ { /* @todo: check accept_any_ip_version */ if ((IP_IS_V6(ipaddr) == IP_IS_V6_VAL(cpcb->local_ip)) && (ip_addr_isany(&cpcb->local_ip) || - 80382be: 69bb ldr r3, [r7, #24] + 80382ee: 69bb ldr r3, [r7, #24] if ((IP_IS_V6(ipaddr) == IP_IS_V6_VAL(cpcb->local_ip)) && - 80382c0: 2b00 cmp r3, #0 - 80382c2: d010 beq.n 80382e6 + 80382f0: 2b00 cmp r3, #0 + 80382f2: d010 beq.n 8038316 (ip_addr_isany(&cpcb->local_ip) || - 80382c4: 69bb ldr r3, [r7, #24] - 80382c6: 681b ldr r3, [r3, #0] - 80382c8: 2b00 cmp r3, #0 - 80382ca: d00c beq.n 80382e6 - 80382cc: 68bb ldr r3, [r7, #8] - 80382ce: 2b00 cmp r3, #0 - 80382d0: d009 beq.n 80382e6 + 80382f4: 69bb ldr r3, [r7, #24] + 80382f6: 681b ldr r3, [r3, #0] + 80382f8: 2b00 cmp r3, #0 + 80382fa: d00c beq.n 8038316 + 80382fc: 68bb ldr r3, [r7, #8] + 80382fe: 2b00 cmp r3, #0 + 8038300: d009 beq.n 8038316 ip_addr_isany(ipaddr) || - 80382d2: 68bb ldr r3, [r7, #8] - 80382d4: 681b ldr r3, [r3, #0] - 80382d6: 2b00 cmp r3, #0 - 80382d8: d005 beq.n 80382e6 + 8038302: 68bb ldr r3, [r7, #8] + 8038304: 681b ldr r3, [r3, #0] + 8038306: 2b00 cmp r3, #0 + 8038308: d005 beq.n 8038316 ip_addr_cmp(&cpcb->local_ip, ipaddr))) { - 80382da: 69bb ldr r3, [r7, #24] - 80382dc: 681a ldr r2, [r3, #0] - 80382de: 68bb ldr r3, [r7, #8] - 80382e0: 681b ldr r3, [r3, #0] + 803830a: 69bb ldr r3, [r7, #24] + 803830c: 681a ldr r2, [r3, #0] + 803830e: 68bb ldr r3, [r7, #8] + 8038310: 681b ldr r3, [r3, #0] if ((IP_IS_V6(ipaddr) == IP_IS_V6_VAL(cpcb->local_ip)) && - 80382e2: 429a cmp r2, r3 - 80382e4: d102 bne.n 80382ec + 8038312: 429a cmp r2, r3 + 8038314: d102 bne.n 803831c return ERR_USE; - 80382e6: f06f 0307 mvn.w r3, #7 - 80382ea: e029 b.n 8038340 + 8038316: f06f 0307 mvn.w r3, #7 + 803831a: e029 b.n 8038370 for (cpcb = *tcp_pcb_lists[i]; cpcb != NULL; cpcb = cpcb->next) { - 80382ec: 69bb ldr r3, [r7, #24] - 80382ee: 68db ldr r3, [r3, #12] - 80382f0: 61bb str r3, [r7, #24] - 80382f2: 69bb ldr r3, [r7, #24] - 80382f4: 2b00 cmp r3, #0 - 80382f6: d1dd bne.n 80382b4 + 803831c: 69bb ldr r3, [r7, #24] + 803831e: 68db ldr r3, [r3, #12] + 8038320: 61bb str r3, [r7, #24] + 8038322: 69bb ldr r3, [r7, #24] + 8038324: 2b00 cmp r3, #0 + 8038326: d1dd bne.n 80382e4 for (i = 0; i < max_pcb_list; i++) { - 80382f8: 69fb ldr r3, [r7, #28] - 80382fa: 3301 adds r3, #1 - 80382fc: 61fb str r3, [r7, #28] - 80382fe: 69fa ldr r2, [r7, #28] - 8038300: 697b ldr r3, [r7, #20] - 8038302: 429a cmp r2, r3 - 8038304: dbcf blt.n 80382a6 + 8038328: 69fb ldr r3, [r7, #28] + 803832a: 3301 adds r3, #1 + 803832c: 61fb str r3, [r7, #28] + 803832e: 69fa ldr r2, [r7, #28] + 8038330: 697b ldr r3, [r7, #20] + 8038332: 429a cmp r2, r3 + 8038334: dbcf blt.n 80382d6 } } } } if (!ip_addr_isany(ipaddr) - 8038306: 68bb ldr r3, [r7, #8] - 8038308: 2b00 cmp r3, #0 - 803830a: d00c beq.n 8038326 - 803830c: 68bb ldr r3, [r7, #8] - 803830e: 681b ldr r3, [r3, #0] - 8038310: 2b00 cmp r3, #0 - 8038312: d008 beq.n 8038326 + 8038336: 68bb ldr r3, [r7, #8] + 8038338: 2b00 cmp r3, #0 + 803833a: d00c beq.n 8038356 + 803833c: 68bb ldr r3, [r7, #8] + 803833e: 681b ldr r3, [r3, #0] + 8038340: 2b00 cmp r3, #0 + 8038342: d008 beq.n 8038356 #if LWIP_IPV4 && LWIP_IPV6 || (IP_GET_TYPE(ipaddr) != IP_GET_TYPE(&pcb->local_ip)) #endif /* LWIP_IPV4 && LWIP_IPV6 */ ) { ip_addr_set(&pcb->local_ip, ipaddr); - 8038314: 68bb ldr r3, [r7, #8] - 8038316: 2b00 cmp r3, #0 - 8038318: d002 beq.n 8038320 - 803831a: 68bb ldr r3, [r7, #8] - 803831c: 681b ldr r3, [r3, #0] - 803831e: e000 b.n 8038322 - 8038320: 2300 movs r3, #0 - 8038322: 68fa ldr r2, [r7, #12] - 8038324: 6013 str r3, [r2, #0] + 8038344: 68bb ldr r3, [r7, #8] + 8038346: 2b00 cmp r3, #0 + 8038348: d002 beq.n 8038350 + 803834a: 68bb ldr r3, [r7, #8] + 803834c: 681b ldr r3, [r3, #0] + 803834e: e000 b.n 8038352 + 8038350: 2300 movs r3, #0 + 8038352: 68fa ldr r2, [r7, #12] + 8038354: 6013 str r3, [r2, #0] } pcb->local_port = port; - 8038326: 68fb ldr r3, [r7, #12] - 8038328: 88fa ldrh r2, [r7, #6] - 803832a: 82da strh r2, [r3, #22] + 8038356: 68fb ldr r3, [r7, #12] + 8038358: 88fa ldrh r2, [r7, #6] + 803835a: 82da strh r2, [r3, #22] TCP_REG(&tcp_bound_pcbs, pcb); - 803832c: 4b0c ldr r3, [pc, #48] ; (8038360 ) - 803832e: 681a ldr r2, [r3, #0] - 8038330: 68fb ldr r3, [r7, #12] - 8038332: 60da str r2, [r3, #12] - 8038334: 4a0a ldr r2, [pc, #40] ; (8038360 ) - 8038336: 68fb ldr r3, [r7, #12] - 8038338: 6013 str r3, [r2, #0] - 803833a: f005 fc8d bl 803dc58 + 803835c: 4b0c ldr r3, [pc, #48] ; (8038390 ) + 803835e: 681a ldr r2, [r3, #0] + 8038360: 68fb ldr r3, [r7, #12] + 8038362: 60da str r2, [r3, #12] + 8038364: 4a0a ldr r2, [pc, #40] ; (8038390 ) + 8038366: 68fb ldr r3, [r7, #12] + 8038368: 6013 str r3, [r2, #0] + 803836a: f005 fc8d bl 803dc88 LWIP_DEBUGF(TCP_DEBUG, ("tcp_bind: bind to port %"U16_F"\n", port)); return ERR_OK; - 803833e: 2300 movs r3, #0 -} - 8038340: 4618 mov r0, r3 - 8038342: 3720 adds r7, #32 - 8038344: 46bd mov sp, r7 - 8038346: bd80 pop {r7, pc} - 8038348: 08044dd0 .word 0x08044dd0 - 803834c: 08042d68 .word 0x08042d68 - 8038350: 08042efc .word 0x08042efc - 8038354: 08042dac .word 0x08042dac - 8038358: 08042f14 .word 0x08042f14 - 803835c: 08044da8 .word 0x08044da8 - 8038360: 2400e95c .word 0x2400e95c - -08038364 : + 803836e: 2300 movs r3, #0 +} + 8038370: 4618 mov r0, r3 + 8038372: 3720 adds r7, #32 + 8038374: 46bd mov sp, r7 + 8038376: bd80 pop {r7, pc} + 8038378: 08044e00 .word 0x08044e00 + 803837c: 08042d98 .word 0x08042d98 + 8038380: 08042f2c .word 0x08042f2c + 8038384: 08042ddc .word 0x08042ddc + 8038388: 08042f44 .word 0x08042f44 + 803838c: 08044dd8 .word 0x08044dd8 + 8038390: 2400e95c .word 0x2400e95c + +08038394 : /** * Default accept callback if no accept callback is specified by the user. */ static err_t tcp_accept_null(void *arg, struct tcp_pcb *pcb, err_t err) { - 8038364: b580 push {r7, lr} - 8038366: b084 sub sp, #16 - 8038368: af00 add r7, sp, #0 - 803836a: 60f8 str r0, [r7, #12] - 803836c: 60b9 str r1, [r7, #8] - 803836e: 4613 mov r3, r2 - 8038370: 71fb strb r3, [r7, #7] + 8038394: b580 push {r7, lr} + 8038396: b084 sub sp, #16 + 8038398: af00 add r7, sp, #0 + 803839a: 60f8 str r0, [r7, #12] + 803839c: 60b9 str r1, [r7, #8] + 803839e: 4613 mov r3, r2 + 80383a0: 71fb strb r3, [r7, #7] LWIP_UNUSED_ARG(arg); LWIP_UNUSED_ARG(err); LWIP_ASSERT("tcp_accept_null: invalid pcb", pcb != NULL); - 8038372: 68bb ldr r3, [r7, #8] - 8038374: 2b00 cmp r3, #0 - 8038376: d106 bne.n 8038386 - 8038378: 4b07 ldr r3, [pc, #28] ; (8038398 ) - 803837a: f240 320f movw r2, #783 ; 0x30f - 803837e: 4907 ldr r1, [pc, #28] ; (803839c ) - 8038380: 4807 ldr r0, [pc, #28] ; (80383a0 ) - 8038382: f008 fbad bl 8040ae0 + 80383a2: 68bb ldr r3, [r7, #8] + 80383a4: 2b00 cmp r3, #0 + 80383a6: d106 bne.n 80383b6 + 80383a8: 4b07 ldr r3, [pc, #28] ; (80383c8 ) + 80383aa: f240 320f movw r2, #783 ; 0x30f + 80383ae: 4907 ldr r1, [pc, #28] ; (80383cc ) + 80383b0: 4807 ldr r0, [pc, #28] ; (80383d0 ) + 80383b2: f008 fbad bl 8040b10 tcp_abort(pcb); - 8038386: 68b8 ldr r0, [r7, #8] - 8038388: f7ff ff48 bl 803821c + 80383b6: 68b8 ldr r0, [r7, #8] + 80383b8: f7ff ff48 bl 803824c return ERR_ABRT; - 803838c: f06f 030c mvn.w r3, #12 + 80383bc: f06f 030c mvn.w r3, #12 } - 8038390: 4618 mov r0, r3 - 8038392: 3710 adds r7, #16 - 8038394: 46bd mov sp, r7 - 8038396: bd80 pop {r7, pc} - 8038398: 08042d68 .word 0x08042d68 - 803839c: 08042f3c .word 0x08042f3c - 80383a0: 08042dac .word 0x08042dac + 80383c0: 4618 mov r0, r3 + 80383c2: 3710 adds r7, #16 + 80383c4: 46bd mov sp, r7 + 80383c6: bd80 pop {r7, pc} + 80383c8: 08042d98 .word 0x08042d98 + 80383cc: 08042f6c .word 0x08042f6c + 80383d0: 08042ddc .word 0x08042ddc -080383a4 : +080383d4 : * called like this: * tpcb = tcp_listen_with_backlog(tpcb, backlog); */ struct tcp_pcb * tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog) { - 80383a4: b580 push {r7, lr} - 80383a6: b082 sub sp, #8 - 80383a8: af00 add r7, sp, #0 - 80383aa: 6078 str r0, [r7, #4] - 80383ac: 460b mov r3, r1 - 80383ae: 70fb strb r3, [r7, #3] + 80383d4: b580 push {r7, lr} + 80383d6: b082 sub sp, #8 + 80383d8: af00 add r7, sp, #0 + 80383da: 6078 str r0, [r7, #4] + 80383dc: 460b mov r3, r1 + 80383de: 70fb strb r3, [r7, #3] LWIP_ASSERT_CORE_LOCKED(); return tcp_listen_with_backlog_and_err(pcb, backlog, NULL); - 80383b0: 78fb ldrb r3, [r7, #3] - 80383b2: 2200 movs r2, #0 - 80383b4: 4619 mov r1, r3 - 80383b6: 6878 ldr r0, [r7, #4] - 80383b8: f000 f806 bl 80383c8 - 80383bc: 4603 mov r3, r0 -} - 80383be: 4618 mov r0, r3 - 80383c0: 3708 adds r7, #8 - 80383c2: 46bd mov sp, r7 - 80383c4: bd80 pop {r7, pc} + 80383e0: 78fb ldrb r3, [r7, #3] + 80383e2: 2200 movs r2, #0 + 80383e4: 4619 mov r1, r3 + 80383e6: 6878 ldr r0, [r7, #4] + 80383e8: f000 f806 bl 80383f8 + 80383ec: 4603 mov r3, r0 +} + 80383ee: 4618 mov r0, r3 + 80383f0: 3708 adds r7, #8 + 80383f2: 46bd mov sp, r7 + 80383f4: bd80 pop {r7, pc} ... -080383c8 : +080383f8 : * called like this: * tpcb = tcp_listen_with_backlog_and_err(tpcb, backlog, &err); */ struct tcp_pcb * tcp_listen_with_backlog_and_err(struct tcp_pcb *pcb, u8_t backlog, err_t *err) { - 80383c8: b580 push {r7, lr} - 80383ca: b088 sub sp, #32 - 80383cc: af00 add r7, sp, #0 - 80383ce: 60f8 str r0, [r7, #12] - 80383d0: 460b mov r3, r1 - 80383d2: 607a str r2, [r7, #4] - 80383d4: 72fb strb r3, [r7, #11] + 80383f8: b580 push {r7, lr} + 80383fa: b088 sub sp, #32 + 80383fc: af00 add r7, sp, #0 + 80383fe: 60f8 str r0, [r7, #12] + 8038400: 460b mov r3, r1 + 8038402: 607a str r2, [r7, #4] + 8038404: 72fb strb r3, [r7, #11] struct tcp_pcb_listen *lpcb = NULL; - 80383d6: 2300 movs r3, #0 - 80383d8: 61fb str r3, [r7, #28] + 8038406: 2300 movs r3, #0 + 8038408: 61fb str r3, [r7, #28] LWIP_UNUSED_ARG(backlog); LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_listen_with_backlog_and_err: invalid pcb", pcb != NULL, res = ERR_ARG; goto done); - 80383da: 68fb ldr r3, [r7, #12] - 80383dc: 2b00 cmp r3, #0 - 80383de: d109 bne.n 80383f4 - 80383e0: 4b47 ldr r3, [pc, #284] ; (8038500 ) - 80383e2: f240 3259 movw r2, #857 ; 0x359 - 80383e6: 4947 ldr r1, [pc, #284] ; (8038504 ) - 80383e8: 4847 ldr r0, [pc, #284] ; (8038508 ) - 80383ea: f008 fb79 bl 8040ae0 - 80383ee: 23f0 movs r3, #240 ; 0xf0 - 80383f0: 76fb strb r3, [r7, #27] - 80383f2: e079 b.n 80384e8 + 803840a: 68fb ldr r3, [r7, #12] + 803840c: 2b00 cmp r3, #0 + 803840e: d109 bne.n 8038424 + 8038410: 4b47 ldr r3, [pc, #284] ; (8038530 ) + 8038412: f240 3259 movw r2, #857 ; 0x359 + 8038416: 4947 ldr r1, [pc, #284] ; (8038534 ) + 8038418: 4847 ldr r0, [pc, #284] ; (8038538 ) + 803841a: f008 fb79 bl 8040b10 + 803841e: 23f0 movs r3, #240 ; 0xf0 + 8038420: 76fb strb r3, [r7, #27] + 8038422: e079 b.n 8038518 LWIP_ERROR("tcp_listen_with_backlog_and_err: pcb already connected", pcb->state == CLOSED, res = ERR_CLSD; goto done); - 80383f4: 68fb ldr r3, [r7, #12] - 80383f6: 7d1b ldrb r3, [r3, #20] - 80383f8: 2b00 cmp r3, #0 - 80383fa: d009 beq.n 8038410 - 80383fc: 4b40 ldr r3, [pc, #256] ; (8038500 ) - 80383fe: f240 325a movw r2, #858 ; 0x35a - 8038402: 4942 ldr r1, [pc, #264] ; (803850c ) - 8038404: 4840 ldr r0, [pc, #256] ; (8038508 ) - 8038406: f008 fb6b bl 8040ae0 - 803840a: 23f1 movs r3, #241 ; 0xf1 - 803840c: 76fb strb r3, [r7, #27] - 803840e: e06b b.n 80384e8 + 8038424: 68fb ldr r3, [r7, #12] + 8038426: 7d1b ldrb r3, [r3, #20] + 8038428: 2b00 cmp r3, #0 + 803842a: d009 beq.n 8038440 + 803842c: 4b40 ldr r3, [pc, #256] ; (8038530 ) + 803842e: f240 325a movw r2, #858 ; 0x35a + 8038432: 4942 ldr r1, [pc, #264] ; (803853c ) + 8038434: 4840 ldr r0, [pc, #256] ; (8038538 ) + 8038436: f008 fb6b bl 8040b10 + 803843a: 23f1 movs r3, #241 ; 0xf1 + 803843c: 76fb strb r3, [r7, #27] + 803843e: e06b b.n 8038518 /* already listening? */ if (pcb->state == LISTEN) { - 8038410: 68fb ldr r3, [r7, #12] - 8038412: 7d1b ldrb r3, [r3, #20] - 8038414: 2b01 cmp r3, #1 - 8038416: d104 bne.n 8038422 + 8038440: 68fb ldr r3, [r7, #12] + 8038442: 7d1b ldrb r3, [r3, #20] + 8038444: 2b01 cmp r3, #1 + 8038446: d104 bne.n 8038452 lpcb = (struct tcp_pcb_listen *)pcb; - 8038418: 68fb ldr r3, [r7, #12] - 803841a: 61fb str r3, [r7, #28] + 8038448: 68fb ldr r3, [r7, #12] + 803844a: 61fb str r3, [r7, #28] res = ERR_ALREADY; - 803841c: 23f7 movs r3, #247 ; 0xf7 - 803841e: 76fb strb r3, [r7, #27] + 803844c: 23f7 movs r3, #247 ; 0xf7 + 803844e: 76fb strb r3, [r7, #27] goto done; - 8038420: e062 b.n 80384e8 + 8038450: e062 b.n 8038518 goto done; } } } #endif /* SO_REUSE */ lpcb = (struct tcp_pcb_listen *)memp_malloc(MEMP_TCP_PCB_LISTEN); - 8038422: 2002 movs r0, #2 - 8038424: f7fe fa70 bl 8036908 - 8038428: 61f8 str r0, [r7, #28] + 8038452: 2002 movs r0, #2 + 8038454: f7fe fa70 bl 8036938 + 8038458: 61f8 str r0, [r7, #28] if (lpcb == NULL) { - 803842a: 69fb ldr r3, [r7, #28] - 803842c: 2b00 cmp r3, #0 - 803842e: d102 bne.n 8038436 + 803845a: 69fb ldr r3, [r7, #28] + 803845c: 2b00 cmp r3, #0 + 803845e: d102 bne.n 8038466 res = ERR_MEM; - 8038430: 23ff movs r3, #255 ; 0xff - 8038432: 76fb strb r3, [r7, #27] + 8038460: 23ff movs r3, #255 ; 0xff + 8038462: 76fb strb r3, [r7, #27] goto done; - 8038434: e058 b.n 80384e8 + 8038464: e058 b.n 8038518 } lpcb->callback_arg = pcb->callback_arg; - 8038436: 68fb ldr r3, [r7, #12] - 8038438: 691a ldr r2, [r3, #16] - 803843a: 69fb ldr r3, [r7, #28] - 803843c: 611a str r2, [r3, #16] + 8038466: 68fb ldr r3, [r7, #12] + 8038468: 691a ldr r2, [r3, #16] + 803846a: 69fb ldr r3, [r7, #28] + 803846c: 611a str r2, [r3, #16] lpcb->local_port = pcb->local_port; - 803843e: 68fb ldr r3, [r7, #12] - 8038440: 8ada ldrh r2, [r3, #22] - 8038442: 69fb ldr r3, [r7, #28] - 8038444: 82da strh r2, [r3, #22] + 803846e: 68fb ldr r3, [r7, #12] + 8038470: 8ada ldrh r2, [r3, #22] + 8038472: 69fb ldr r3, [r7, #28] + 8038474: 82da strh r2, [r3, #22] lpcb->state = LISTEN; - 8038446: 69fb ldr r3, [r7, #28] - 8038448: 2201 movs r2, #1 - 803844a: 751a strb r2, [r3, #20] + 8038476: 69fb ldr r3, [r7, #28] + 8038478: 2201 movs r2, #1 + 803847a: 751a strb r2, [r3, #20] lpcb->prio = pcb->prio; - 803844c: 68fb ldr r3, [r7, #12] - 803844e: 7d5a ldrb r2, [r3, #21] - 8038450: 69fb ldr r3, [r7, #28] - 8038452: 755a strb r2, [r3, #21] + 803847c: 68fb ldr r3, [r7, #12] + 803847e: 7d5a ldrb r2, [r3, #21] + 8038480: 69fb ldr r3, [r7, #28] + 8038482: 755a strb r2, [r3, #21] lpcb->so_options = pcb->so_options; - 8038454: 68fb ldr r3, [r7, #12] - 8038456: 7a5a ldrb r2, [r3, #9] - 8038458: 69fb ldr r3, [r7, #28] - 803845a: 725a strb r2, [r3, #9] + 8038484: 68fb ldr r3, [r7, #12] + 8038486: 7a5a ldrb r2, [r3, #9] + 8038488: 69fb ldr r3, [r7, #28] + 803848a: 725a strb r2, [r3, #9] lpcb->netif_idx = NETIF_NO_INDEX; - 803845c: 69fb ldr r3, [r7, #28] - 803845e: 2200 movs r2, #0 - 8038460: 721a strb r2, [r3, #8] + 803848c: 69fb ldr r3, [r7, #28] + 803848e: 2200 movs r2, #0 + 8038490: 721a strb r2, [r3, #8] lpcb->ttl = pcb->ttl; - 8038462: 68fb ldr r3, [r7, #12] - 8038464: 7ada ldrb r2, [r3, #11] - 8038466: 69fb ldr r3, [r7, #28] - 8038468: 72da strb r2, [r3, #11] + 8038492: 68fb ldr r3, [r7, #12] + 8038494: 7ada ldrb r2, [r3, #11] + 8038496: 69fb ldr r3, [r7, #28] + 8038498: 72da strb r2, [r3, #11] lpcb->tos = pcb->tos; - 803846a: 68fb ldr r3, [r7, #12] - 803846c: 7a9a ldrb r2, [r3, #10] - 803846e: 69fb ldr r3, [r7, #28] - 8038470: 729a strb r2, [r3, #10] + 803849a: 68fb ldr r3, [r7, #12] + 803849c: 7a9a ldrb r2, [r3, #10] + 803849e: 69fb ldr r3, [r7, #28] + 80384a0: 729a strb r2, [r3, #10] #if LWIP_IPV4 && LWIP_IPV6 IP_SET_TYPE_VAL(lpcb->remote_ip, pcb->local_ip.type); #endif /* LWIP_IPV4 && LWIP_IPV6 */ ip_addr_copy(lpcb->local_ip, pcb->local_ip); - 8038472: 68fb ldr r3, [r7, #12] - 8038474: 681a ldr r2, [r3, #0] - 8038476: 69fb ldr r3, [r7, #28] - 8038478: 601a str r2, [r3, #0] + 80384a2: 68fb ldr r3, [r7, #12] + 80384a4: 681a ldr r2, [r3, #0] + 80384a6: 69fb ldr r3, [r7, #28] + 80384a8: 601a str r2, [r3, #0] if (pcb->local_port != 0) { - 803847a: 68fb ldr r3, [r7, #12] - 803847c: 8adb ldrh r3, [r3, #22] - 803847e: 2b00 cmp r3, #0 - 8038480: d021 beq.n 80384c6 - TCP_RMV(&tcp_bound_pcbs, pcb); - 8038482: 4b23 ldr r3, [pc, #140] ; (8038510 ) - 8038484: 681b ldr r3, [r3, #0] - 8038486: 68fa ldr r2, [r7, #12] - 8038488: 429a cmp r2, r3 - 803848a: d105 bne.n 8038498 - 803848c: 4b20 ldr r3, [pc, #128] ; (8038510 ) - 803848e: 681b ldr r3, [r3, #0] - 8038490: 68db ldr r3, [r3, #12] - 8038492: 4a1f ldr r2, [pc, #124] ; (8038510 ) - 8038494: 6013 str r3, [r2, #0] - 8038496: e013 b.n 80384c0 - 8038498: 4b1d ldr r3, [pc, #116] ; (8038510 ) - 803849a: 681b ldr r3, [r3, #0] - 803849c: 617b str r3, [r7, #20] - 803849e: e00c b.n 80384ba - 80384a0: 697b ldr r3, [r7, #20] - 80384a2: 68db ldr r3, [r3, #12] - 80384a4: 68fa ldr r2, [r7, #12] - 80384a6: 429a cmp r2, r3 - 80384a8: d104 bne.n 80384b4 80384aa: 68fb ldr r3, [r7, #12] - 80384ac: 68da ldr r2, [r3, #12] - 80384ae: 697b ldr r3, [r7, #20] - 80384b0: 60da str r2, [r3, #12] - 80384b2: e005 b.n 80384c0 - 80384b4: 697b ldr r3, [r7, #20] - 80384b6: 68db ldr r3, [r3, #12] - 80384b8: 617b str r3, [r7, #20] - 80384ba: 697b ldr r3, [r7, #20] - 80384bc: 2b00 cmp r3, #0 - 80384be: d1ef bne.n 80384a0 - 80384c0: 68fb ldr r3, [r7, #12] - 80384c2: 2200 movs r2, #0 - 80384c4: 60da str r2, [r3, #12] + 80384ac: 8adb ldrh r3, [r3, #22] + 80384ae: 2b00 cmp r3, #0 + 80384b0: d021 beq.n 80384f6 + TCP_RMV(&tcp_bound_pcbs, pcb); + 80384b2: 4b23 ldr r3, [pc, #140] ; (8038540 ) + 80384b4: 681b ldr r3, [r3, #0] + 80384b6: 68fa ldr r2, [r7, #12] + 80384b8: 429a cmp r2, r3 + 80384ba: d105 bne.n 80384c8 + 80384bc: 4b20 ldr r3, [pc, #128] ; (8038540 ) + 80384be: 681b ldr r3, [r3, #0] + 80384c0: 68db ldr r3, [r3, #12] + 80384c2: 4a1f ldr r2, [pc, #124] ; (8038540 ) + 80384c4: 6013 str r3, [r2, #0] + 80384c6: e013 b.n 80384f0 + 80384c8: 4b1d ldr r3, [pc, #116] ; (8038540 ) + 80384ca: 681b ldr r3, [r3, #0] + 80384cc: 617b str r3, [r7, #20] + 80384ce: e00c b.n 80384ea + 80384d0: 697b ldr r3, [r7, #20] + 80384d2: 68db ldr r3, [r3, #12] + 80384d4: 68fa ldr r2, [r7, #12] + 80384d6: 429a cmp r2, r3 + 80384d8: d104 bne.n 80384e4 + 80384da: 68fb ldr r3, [r7, #12] + 80384dc: 68da ldr r2, [r3, #12] + 80384de: 697b ldr r3, [r7, #20] + 80384e0: 60da str r2, [r3, #12] + 80384e2: e005 b.n 80384f0 + 80384e4: 697b ldr r3, [r7, #20] + 80384e6: 68db ldr r3, [r3, #12] + 80384e8: 617b str r3, [r7, #20] + 80384ea: 697b ldr r3, [r7, #20] + 80384ec: 2b00 cmp r3, #0 + 80384ee: d1ef bne.n 80384d0 + 80384f0: 68fb ldr r3, [r7, #12] + 80384f2: 2200 movs r2, #0 + 80384f4: 60da str r2, [r3, #12] } #if LWIP_TCP_PCB_NUM_EXT_ARGS /* copy over ext_args to listening pcb */ memcpy(&lpcb->ext_args, &pcb->ext_args, sizeof(pcb->ext_args)); #endif tcp_free(pcb); - 80384c6: 68f8 ldr r0, [r7, #12] - 80384c8: f7ff fbc0 bl 8037c4c + 80384f6: 68f8 ldr r0, [r7, #12] + 80384f8: f7ff fbc0 bl 8037c7c #if LWIP_CALLBACK_API lpcb->accept = tcp_accept_null; - 80384cc: 69fb ldr r3, [r7, #28] - 80384ce: 4a11 ldr r2, [pc, #68] ; (8038514 ) - 80384d0: 619a str r2, [r3, #24] + 80384fc: 69fb ldr r3, [r7, #28] + 80384fe: 4a11 ldr r2, [pc, #68] ; (8038544 ) + 8038500: 619a str r2, [r3, #24] #endif /* LWIP_CALLBACK_API */ #if TCP_LISTEN_BACKLOG lpcb->accepts_pending = 0; tcp_backlog_set(lpcb, backlog); #endif /* TCP_LISTEN_BACKLOG */ TCP_REG(&tcp_listen_pcbs.pcbs, (struct tcp_pcb *)lpcb); - 80384d2: 4b11 ldr r3, [pc, #68] ; (8038518 ) - 80384d4: 681a ldr r2, [r3, #0] - 80384d6: 69fb ldr r3, [r7, #28] - 80384d8: 60da str r2, [r3, #12] - 80384da: 4a0f ldr r2, [pc, #60] ; (8038518 ) - 80384dc: 69fb ldr r3, [r7, #28] - 80384de: 6013 str r3, [r2, #0] - 80384e0: f005 fbba bl 803dc58 + 8038502: 4b11 ldr r3, [pc, #68] ; (8038548 ) + 8038504: 681a ldr r2, [r3, #0] + 8038506: 69fb ldr r3, [r7, #28] + 8038508: 60da str r2, [r3, #12] + 803850a: 4a0f ldr r2, [pc, #60] ; (8038548 ) + 803850c: 69fb ldr r3, [r7, #28] + 803850e: 6013 str r3, [r2, #0] + 8038510: f005 fbba bl 803dc88 res = ERR_OK; - 80384e4: 2300 movs r3, #0 - 80384e6: 76fb strb r3, [r7, #27] + 8038514: 2300 movs r3, #0 + 8038516: 76fb strb r3, [r7, #27] done: if (err != NULL) { - 80384e8: 687b ldr r3, [r7, #4] - 80384ea: 2b00 cmp r3, #0 - 80384ec: d002 beq.n 80384f4 + 8038518: 687b ldr r3, [r7, #4] + 803851a: 2b00 cmp r3, #0 + 803851c: d002 beq.n 8038524 *err = res; - 80384ee: 687b ldr r3, [r7, #4] - 80384f0: 7efa ldrb r2, [r7, #27] - 80384f2: 701a strb r2, [r3, #0] + 803851e: 687b ldr r3, [r7, #4] + 8038520: 7efa ldrb r2, [r7, #27] + 8038522: 701a strb r2, [r3, #0] } return (struct tcp_pcb *)lpcb; - 80384f4: 69fb ldr r3, [r7, #28] -} - 80384f6: 4618 mov r0, r3 - 80384f8: 3720 adds r7, #32 - 80384fa: 46bd mov sp, r7 - 80384fc: bd80 pop {r7, pc} - 80384fe: bf00 nop - 8038500: 08042d68 .word 0x08042d68 - 8038504: 08042f5c .word 0x08042f5c - 8038508: 08042dac .word 0x08042dac - 803850c: 08042f8c .word 0x08042f8c - 8038510: 2400e95c .word 0x2400e95c - 8038514: 08038365 .word 0x08038365 - 8038518: 2400e960 .word 0x2400e960 - -0803851c : + 8038524: 69fb ldr r3, [r7, #28] +} + 8038526: 4618 mov r0, r3 + 8038528: 3720 adds r7, #32 + 803852a: 46bd mov sp, r7 + 803852c: bd80 pop {r7, pc} + 803852e: bf00 nop + 8038530: 08042d98 .word 0x08042d98 + 8038534: 08042f8c .word 0x08042f8c + 8038538: 08042ddc .word 0x08042ddc + 803853c: 08042fbc .word 0x08042fbc + 8038540: 2400e95c .word 0x2400e95c + 8038544: 08038395 .word 0x08038395 + 8038548: 2400e960 .word 0x2400e960 + +0803854c : * Returns how much extra window would be advertised if we sent an * update now. */ u32_t tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb) { - 803851c: b580 push {r7, lr} - 803851e: b084 sub sp, #16 - 8038520: af00 add r7, sp, #0 - 8038522: 6078 str r0, [r7, #4] + 803854c: b580 push {r7, lr} + 803854e: b084 sub sp, #16 + 8038550: af00 add r7, sp, #0 + 8038552: 6078 str r0, [r7, #4] u32_t new_right_edge; LWIP_ASSERT("tcp_update_rcv_ann_wnd: invalid pcb", pcb != NULL); - 8038524: 687b ldr r3, [r7, #4] - 8038526: 2b00 cmp r3, #0 - 8038528: d106 bne.n 8038538 - 803852a: 4b25 ldr r3, [pc, #148] ; (80385c0 ) - 803852c: f240 32a6 movw r2, #934 ; 0x3a6 - 8038530: 4924 ldr r1, [pc, #144] ; (80385c4 ) - 8038532: 4825 ldr r0, [pc, #148] ; (80385c8 ) - 8038534: f008 fad4 bl 8040ae0 + 8038554: 687b ldr r3, [r7, #4] + 8038556: 2b00 cmp r3, #0 + 8038558: d106 bne.n 8038568 + 803855a: 4b25 ldr r3, [pc, #148] ; (80385f0 ) + 803855c: f240 32a6 movw r2, #934 ; 0x3a6 + 8038560: 4924 ldr r1, [pc, #144] ; (80385f4 ) + 8038562: 4825 ldr r0, [pc, #148] ; (80385f8 ) + 8038564: f008 fad4 bl 8040b10 new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd; - 8038538: 687b ldr r3, [r7, #4] - 803853a: 6a5b ldr r3, [r3, #36] ; 0x24 - 803853c: 687a ldr r2, [r7, #4] - 803853e: 8d12 ldrh r2, [r2, #40] ; 0x28 - 8038540: 4413 add r3, r2 - 8038542: 60fb str r3, [r7, #12] + 8038568: 687b ldr r3, [r7, #4] + 803856a: 6a5b ldr r3, [r3, #36] ; 0x24 + 803856c: 687a ldr r2, [r7, #4] + 803856e: 8d12 ldrh r2, [r2, #40] ; 0x28 + 8038570: 4413 add r3, r2 + 8038572: 60fb str r3, [r7, #12] if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) { - 8038544: 687b ldr r3, [r7, #4] - 8038546: 6adb ldr r3, [r3, #44] ; 0x2c - 8038548: 687a ldr r2, [r7, #4] - 803854a: 8e52 ldrh r2, [r2, #50] ; 0x32 - 803854c: f5b2 6f86 cmp.w r2, #1072 ; 0x430 - 8038550: bf28 it cs - 8038552: f44f 6286 movcs.w r2, #1072 ; 0x430 - 8038556: b292 uxth r2, r2 - 8038558: 4413 add r3, r2 - 803855a: 68fa ldr r2, [r7, #12] - 803855c: 1ad3 subs r3, r2, r3 - 803855e: 2b00 cmp r3, #0 - 8038560: db08 blt.n 8038574 + 8038574: 687b ldr r3, [r7, #4] + 8038576: 6adb ldr r3, [r3, #44] ; 0x2c + 8038578: 687a ldr r2, [r7, #4] + 803857a: 8e52 ldrh r2, [r2, #50] ; 0x32 + 803857c: f5b2 6f86 cmp.w r2, #1072 ; 0x430 + 8038580: bf28 it cs + 8038582: f44f 6286 movcs.w r2, #1072 ; 0x430 + 8038586: b292 uxth r2, r2 + 8038588: 4413 add r3, r2 + 803858a: 68fa ldr r2, [r7, #12] + 803858c: 1ad3 subs r3, r2, r3 + 803858e: 2b00 cmp r3, #0 + 8038590: db08 blt.n 80385a4 /* we can advertise more window */ pcb->rcv_ann_wnd = pcb->rcv_wnd; - 8038562: 687b ldr r3, [r7, #4] - 8038564: 8d1a ldrh r2, [r3, #40] ; 0x28 - 8038566: 687b ldr r3, [r7, #4] - 8038568: 855a strh r2, [r3, #42] ; 0x2a + 8038592: 687b ldr r3, [r7, #4] + 8038594: 8d1a ldrh r2, [r3, #40] ; 0x28 + 8038596: 687b ldr r3, [r7, #4] + 8038598: 855a strh r2, [r3, #42] ; 0x2a return new_right_edge - pcb->rcv_ann_right_edge; - 803856a: 687b ldr r3, [r7, #4] - 803856c: 6adb ldr r3, [r3, #44] ; 0x2c - 803856e: 68fa ldr r2, [r7, #12] - 8038570: 1ad3 subs r3, r2, r3 - 8038572: e020 b.n 80385b6 + 803859a: 687b ldr r3, [r7, #4] + 803859c: 6adb ldr r3, [r3, #44] ; 0x2c + 803859e: 68fa ldr r2, [r7, #12] + 80385a0: 1ad3 subs r3, r2, r3 + 80385a2: e020 b.n 80385e6 } else { if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) { - 8038574: 687b ldr r3, [r7, #4] - 8038576: 6a5a ldr r2, [r3, #36] ; 0x24 - 8038578: 687b ldr r3, [r7, #4] - 803857a: 6adb ldr r3, [r3, #44] ; 0x2c - 803857c: 1ad3 subs r3, r2, r3 - 803857e: 2b00 cmp r3, #0 - 8038580: dd03 ble.n 803858a + 80385a4: 687b ldr r3, [r7, #4] + 80385a6: 6a5a ldr r2, [r3, #36] ; 0x24 + 80385a8: 687b ldr r3, [r7, #4] + 80385aa: 6adb ldr r3, [r3, #44] ; 0x2c + 80385ac: 1ad3 subs r3, r2, r3 + 80385ae: 2b00 cmp r3, #0 + 80385b0: dd03 ble.n 80385ba /* Can happen due to other end sending out of advertised window, * but within actual available (but not yet advertised) window */ pcb->rcv_ann_wnd = 0; - 8038582: 687b ldr r3, [r7, #4] - 8038584: 2200 movs r2, #0 - 8038586: 855a strh r2, [r3, #42] ; 0x2a - 8038588: e014 b.n 80385b4 + 80385b2: 687b ldr r3, [r7, #4] + 80385b4: 2200 movs r2, #0 + 80385b6: 855a strh r2, [r3, #42] ; 0x2a + 80385b8: e014 b.n 80385e4 } else { /* keep the right edge of window constant */ u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt; - 803858a: 687b ldr r3, [r7, #4] - 803858c: 6ada ldr r2, [r3, #44] ; 0x2c - 803858e: 687b ldr r3, [r7, #4] - 8038590: 6a5b ldr r3, [r3, #36] ; 0x24 - 8038592: 1ad3 subs r3, r2, r3 - 8038594: 60bb str r3, [r7, #8] + 80385ba: 687b ldr r3, [r7, #4] + 80385bc: 6ada ldr r2, [r3, #44] ; 0x2c + 80385be: 687b ldr r3, [r7, #4] + 80385c0: 6a5b ldr r3, [r3, #36] ; 0x24 + 80385c2: 1ad3 subs r3, r2, r3 + 80385c4: 60bb str r3, [r7, #8] #if !LWIP_WND_SCALE LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff); - 8038596: 68bb ldr r3, [r7, #8] - 8038598: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803859c: d306 bcc.n 80385ac - 803859e: 4b08 ldr r3, [pc, #32] ; (80385c0 ) - 80385a0: f240 32b6 movw r2, #950 ; 0x3b6 - 80385a4: 4909 ldr r1, [pc, #36] ; (80385cc ) - 80385a6: 4808 ldr r0, [pc, #32] ; (80385c8 ) - 80385a8: f008 fa9a bl 8040ae0 + 80385c6: 68bb ldr r3, [r7, #8] + 80385c8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80385cc: d306 bcc.n 80385dc + 80385ce: 4b08 ldr r3, [pc, #32] ; (80385f0 ) + 80385d0: f240 32b6 movw r2, #950 ; 0x3b6 + 80385d4: 4909 ldr r1, [pc, #36] ; (80385fc ) + 80385d6: 4808 ldr r0, [pc, #32] ; (80385f8 ) + 80385d8: f008 fa9a bl 8040b10 #endif pcb->rcv_ann_wnd = (tcpwnd_size_t)new_rcv_ann_wnd; - 80385ac: 68bb ldr r3, [r7, #8] - 80385ae: b29a uxth r2, r3 - 80385b0: 687b ldr r3, [r7, #4] - 80385b2: 855a strh r2, [r3, #42] ; 0x2a + 80385dc: 68bb ldr r3, [r7, #8] + 80385de: b29a uxth r2, r3 + 80385e0: 687b ldr r3, [r7, #4] + 80385e2: 855a strh r2, [r3, #42] ; 0x2a } return 0; - 80385b4: 2300 movs r3, #0 + 80385e4: 2300 movs r3, #0 } } - 80385b6: 4618 mov r0, r3 - 80385b8: 3710 adds r7, #16 - 80385ba: 46bd mov sp, r7 - 80385bc: bd80 pop {r7, pc} - 80385be: bf00 nop - 80385c0: 08042d68 .word 0x08042d68 - 80385c4: 08042fc4 .word 0x08042fc4 - 80385c8: 08042dac .word 0x08042dac - 80385cc: 08042fe8 .word 0x08042fe8 + 80385e6: 4618 mov r0, r3 + 80385e8: 3710 adds r7, #16 + 80385ea: 46bd mov sp, r7 + 80385ec: bd80 pop {r7, pc} + 80385ee: bf00 nop + 80385f0: 08042d98 .word 0x08042d98 + 80385f4: 08042ff4 .word 0x08042ff4 + 80385f8: 08042ddc .word 0x08042ddc + 80385fc: 08043018 .word 0x08043018 -080385d0 : +08038600 : * @param pcb the tcp_pcb for which data is read * @param len the amount of bytes that have been read by the application */ void tcp_recved(struct tcp_pcb *pcb, u16_t len) { - 80385d0: b580 push {r7, lr} - 80385d2: b084 sub sp, #16 - 80385d4: af00 add r7, sp, #0 - 80385d6: 6078 str r0, [r7, #4] - 80385d8: 460b mov r3, r1 - 80385da: 807b strh r3, [r7, #2] + 8038600: b580 push {r7, lr} + 8038602: b084 sub sp, #16 + 8038604: af00 add r7, sp, #0 + 8038606: 6078 str r0, [r7, #4] + 8038608: 460b mov r3, r1 + 803860a: 807b strh r3, [r7, #2] u32_t wnd_inflation; tcpwnd_size_t rcv_wnd; LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_recved: invalid pcb", pcb != NULL, return); - 80385dc: 687b ldr r3, [r7, #4] - 80385de: 2b00 cmp r3, #0 - 80385e0: d107 bne.n 80385f2 - 80385e2: 4b1f ldr r3, [pc, #124] ; (8038660 ) - 80385e4: f240 32cf movw r2, #975 ; 0x3cf - 80385e8: 491e ldr r1, [pc, #120] ; (8038664 ) - 80385ea: 481f ldr r0, [pc, #124] ; (8038668 ) - 80385ec: f008 fa78 bl 8040ae0 - 80385f0: e032 b.n 8038658 + 803860c: 687b ldr r3, [r7, #4] + 803860e: 2b00 cmp r3, #0 + 8038610: d107 bne.n 8038622 + 8038612: 4b1f ldr r3, [pc, #124] ; (8038690 ) + 8038614: f240 32cf movw r2, #975 ; 0x3cf + 8038618: 491e ldr r1, [pc, #120] ; (8038694 ) + 803861a: 481f ldr r0, [pc, #124] ; (8038698 ) + 803861c: f008 fa78 bl 8040b10 + 8038620: e032 b.n 8038688 /* pcb->state LISTEN not allowed here */ LWIP_ASSERT("don't call tcp_recved for listen-pcbs", - 80385f2: 687b ldr r3, [r7, #4] - 80385f4: 7d1b ldrb r3, [r3, #20] - 80385f6: 2b01 cmp r3, #1 - 80385f8: d106 bne.n 8038608 - 80385fa: 4b19 ldr r3, [pc, #100] ; (8038660 ) - 80385fc: f240 32d2 movw r2, #978 ; 0x3d2 - 8038600: 491a ldr r1, [pc, #104] ; (803866c ) - 8038602: 4819 ldr r0, [pc, #100] ; (8038668 ) - 8038604: f008 fa6c bl 8040ae0 + 8038622: 687b ldr r3, [r7, #4] + 8038624: 7d1b ldrb r3, [r3, #20] + 8038626: 2b01 cmp r3, #1 + 8038628: d106 bne.n 8038638 + 803862a: 4b19 ldr r3, [pc, #100] ; (8038690 ) + 803862c: f240 32d2 movw r2, #978 ; 0x3d2 + 8038630: 491a ldr r1, [pc, #104] ; (803869c ) + 8038632: 4819 ldr r0, [pc, #100] ; (8038698 ) + 8038634: f008 fa6c bl 8040b10 pcb->state != LISTEN); rcv_wnd = (tcpwnd_size_t)(pcb->rcv_wnd + len); - 8038608: 687b ldr r3, [r7, #4] - 803860a: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803860c: 887b ldrh r3, [r7, #2] - 803860e: 4413 add r3, r2 - 8038610: 81fb strh r3, [r7, #14] + 8038638: 687b ldr r3, [r7, #4] + 803863a: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803863c: 887b ldrh r3, [r7, #2] + 803863e: 4413 add r3, r2 + 8038640: 81fb strh r3, [r7, #14] if ((rcv_wnd > TCP_WND_MAX(pcb)) || (rcv_wnd < pcb->rcv_wnd)) { - 8038612: 89fb ldrh r3, [r7, #14] - 8038614: f5b3 6f06 cmp.w r3, #2144 ; 0x860 - 8038618: d804 bhi.n 8038624 - 803861a: 687b ldr r3, [r7, #4] - 803861c: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803861e: 89fa ldrh r2, [r7, #14] - 8038620: 429a cmp r2, r3 - 8038622: d204 bcs.n 803862e + 8038642: 89fb ldrh r3, [r7, #14] + 8038644: f5b3 6f06 cmp.w r3, #2144 ; 0x860 + 8038648: d804 bhi.n 8038654 + 803864a: 687b ldr r3, [r7, #4] + 803864c: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803864e: 89fa ldrh r2, [r7, #14] + 8038650: 429a cmp r2, r3 + 8038652: d204 bcs.n 803865e /* window got too big or tcpwnd_size_t overflow */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: window got too big or tcpwnd_size_t overflow\n")); pcb->rcv_wnd = TCP_WND_MAX(pcb); - 8038624: 687b ldr r3, [r7, #4] - 8038626: f44f 6206 mov.w r2, #2144 ; 0x860 - 803862a: 851a strh r2, [r3, #40] ; 0x28 - 803862c: e002 b.n 8038634 + 8038654: 687b ldr r3, [r7, #4] + 8038656: f44f 6206 mov.w r2, #2144 ; 0x860 + 803865a: 851a strh r2, [r3, #40] ; 0x28 + 803865c: e002 b.n 8038664 } else { pcb->rcv_wnd = rcv_wnd; - 803862e: 687b ldr r3, [r7, #4] - 8038630: 89fa ldrh r2, [r7, #14] - 8038632: 851a strh r2, [r3, #40] ; 0x28 + 803865e: 687b ldr r3, [r7, #4] + 8038660: 89fa ldrh r2, [r7, #14] + 8038662: 851a strh r2, [r3, #40] ; 0x28 } wnd_inflation = tcp_update_rcv_ann_wnd(pcb); - 8038634: 6878 ldr r0, [r7, #4] - 8038636: f7ff ff71 bl 803851c - 803863a: 60b8 str r0, [r7, #8] + 8038664: 6878 ldr r0, [r7, #4] + 8038666: f7ff ff71 bl 803854c + 803866a: 60b8 str r0, [r7, #8] /* If the change in the right edge of window is significant (default * watermark is TCP_WND/4), then send an explicit update now. * Otherwise wait for a packet to be sent in the normal course of * events (or more window to be available later) */ if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) { - 803863c: 68bb ldr r3, [r7, #8] - 803863e: f5b3 7f06 cmp.w r3, #536 ; 0x218 - 8038642: d309 bcc.n 8038658 + 803866c: 68bb ldr r3, [r7, #8] + 803866e: f5b3 7f06 cmp.w r3, #536 ; 0x218 + 8038672: d309 bcc.n 8038688 tcp_ack_now(pcb); - 8038644: 687b ldr r3, [r7, #4] - 8038646: 8b5b ldrh r3, [r3, #26] - 8038648: f043 0302 orr.w r3, r3, #2 - 803864c: b29a uxth r2, r3 - 803864e: 687b ldr r3, [r7, #4] - 8038650: 835a strh r2, [r3, #26] + 8038674: 687b ldr r3, [r7, #4] + 8038676: 8b5b ldrh r3, [r3, #26] + 8038678: f043 0302 orr.w r3, r3, #2 + 803867c: b29a uxth r2, r3 + 803867e: 687b ldr r3, [r7, #4] + 8038680: 835a strh r2, [r3, #26] tcp_output(pcb); - 8038652: 6878 ldr r0, [r7, #4] - 8038654: f004 fb8a bl 803cd6c + 8038682: 6878 ldr r0, [r7, #4] + 8038684: f004 fb8a bl 803cd9c } LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: received %"U16_F" bytes, wnd %"TCPWNDSIZE_F" (%"TCPWNDSIZE_F").\n", len, pcb->rcv_wnd, (u16_t)(TCP_WND_MAX(pcb) - pcb->rcv_wnd))); } - 8038658: 3710 adds r7, #16 - 803865a: 46bd mov sp, r7 - 803865c: bd80 pop {r7, pc} - 803865e: bf00 nop - 8038660: 08042d68 .word 0x08042d68 - 8038664: 08043004 .word 0x08043004 - 8038668: 08042dac .word 0x08042dac - 803866c: 0804301c .word 0x0804301c + 8038688: 3710 adds r7, #16 + 803868a: 46bd mov sp, r7 + 803868c: bd80 pop {r7, pc} + 803868e: bf00 nop + 8038690: 08042d98 .word 0x08042d98 + 8038694: 08043034 .word 0x08043034 + 8038698: 08042ddc .word 0x08042ddc + 803869c: 0804304c .word 0x0804304c -08038670 : +080386a0 : * * @return a new (free) local TCP port number */ static u16_t tcp_new_port(void) { - 8038670: b480 push {r7} - 8038672: b083 sub sp, #12 - 8038674: af00 add r7, sp, #0 + 80386a0: b480 push {r7} + 80386a2: b083 sub sp, #12 + 80386a4: af00 add r7, sp, #0 u8_t i; u16_t n = 0; - 8038676: 2300 movs r3, #0 - 8038678: 80bb strh r3, [r7, #4] + 80386a6: 2300 movs r3, #0 + 80386a8: 80bb strh r3, [r7, #4] struct tcp_pcb *pcb; again: tcp_port++; - 803867a: 4b1e ldr r3, [pc, #120] ; (80386f4 ) - 803867c: 881b ldrh r3, [r3, #0] - 803867e: 3301 adds r3, #1 - 8038680: b29a uxth r2, r3 - 8038682: 4b1c ldr r3, [pc, #112] ; (80386f4 ) - 8038684: 801a strh r2, [r3, #0] + 80386aa: 4b1e ldr r3, [pc, #120] ; (8038724 ) + 80386ac: 881b ldrh r3, [r3, #0] + 80386ae: 3301 adds r3, #1 + 80386b0: b29a uxth r2, r3 + 80386b2: 4b1c ldr r3, [pc, #112] ; (8038724 ) + 80386b4: 801a strh r2, [r3, #0] if (tcp_port == TCP_LOCAL_PORT_RANGE_END) { - 8038686: 4b1b ldr r3, [pc, #108] ; (80386f4 ) - 8038688: 881b ldrh r3, [r3, #0] - 803868a: f64f 72ff movw r2, #65535 ; 0xffff - 803868e: 4293 cmp r3, r2 - 8038690: d103 bne.n 803869a + 80386b6: 4b1b ldr r3, [pc, #108] ; (8038724 ) + 80386b8: 881b ldrh r3, [r3, #0] + 80386ba: f64f 72ff movw r2, #65535 ; 0xffff + 80386be: 4293 cmp r3, r2 + 80386c0: d103 bne.n 80386ca tcp_port = TCP_LOCAL_PORT_RANGE_START; - 8038692: 4b18 ldr r3, [pc, #96] ; (80386f4 ) - 8038694: f44f 4240 mov.w r2, #49152 ; 0xc000 - 8038698: 801a strh r2, [r3, #0] + 80386c2: 4b18 ldr r3, [pc, #96] ; (8038724 ) + 80386c4: f44f 4240 mov.w r2, #49152 ; 0xc000 + 80386c8: 801a strh r2, [r3, #0] } /* Check all PCB lists. */ for (i = 0; i < NUM_TCP_PCB_LISTS; i++) { - 803869a: 2300 movs r3, #0 - 803869c: 71fb strb r3, [r7, #7] - 803869e: e01e b.n 80386de + 80386ca: 2300 movs r3, #0 + 80386cc: 71fb strb r3, [r7, #7] + 80386ce: e01e b.n 803870e for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) { - 80386a0: 79fb ldrb r3, [r7, #7] - 80386a2: 4a15 ldr r2, [pc, #84] ; (80386f8 ) - 80386a4: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 80386a8: 681b ldr r3, [r3, #0] - 80386aa: 603b str r3, [r7, #0] - 80386ac: e011 b.n 80386d2 + 80386d0: 79fb ldrb r3, [r7, #7] + 80386d2: 4a15 ldr r2, [pc, #84] ; (8038728 ) + 80386d4: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 80386d8: 681b ldr r3, [r3, #0] + 80386da: 603b str r3, [r7, #0] + 80386dc: e011 b.n 8038702 if (pcb->local_port == tcp_port) { - 80386ae: 683b ldr r3, [r7, #0] - 80386b0: 8ada ldrh r2, [r3, #22] - 80386b2: 4b10 ldr r3, [pc, #64] ; (80386f4 ) - 80386b4: 881b ldrh r3, [r3, #0] - 80386b6: 429a cmp r2, r3 - 80386b8: d108 bne.n 80386cc + 80386de: 683b ldr r3, [r7, #0] + 80386e0: 8ada ldrh r2, [r3, #22] + 80386e2: 4b10 ldr r3, [pc, #64] ; (8038724 ) + 80386e4: 881b ldrh r3, [r3, #0] + 80386e6: 429a cmp r2, r3 + 80386e8: d108 bne.n 80386fc n++; - 80386ba: 88bb ldrh r3, [r7, #4] - 80386bc: 3301 adds r3, #1 - 80386be: 80bb strh r3, [r7, #4] + 80386ea: 88bb ldrh r3, [r7, #4] + 80386ec: 3301 adds r3, #1 + 80386ee: 80bb strh r3, [r7, #4] if (n > (TCP_LOCAL_PORT_RANGE_END - TCP_LOCAL_PORT_RANGE_START)) { - 80386c0: 88bb ldrh r3, [r7, #4] - 80386c2: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 80386c6: d3d8 bcc.n 803867a + 80386f0: 88bb ldrh r3, [r7, #4] + 80386f2: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 80386f6: d3d8 bcc.n 80386aa return 0; - 80386c8: 2300 movs r3, #0 - 80386ca: e00d b.n 80386e8 + 80386f8: 2300 movs r3, #0 + 80386fa: e00d b.n 8038718 for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) { - 80386cc: 683b ldr r3, [r7, #0] - 80386ce: 68db ldr r3, [r3, #12] - 80386d0: 603b str r3, [r7, #0] - 80386d2: 683b ldr r3, [r7, #0] - 80386d4: 2b00 cmp r3, #0 - 80386d6: d1ea bne.n 80386ae + 80386fc: 683b ldr r3, [r7, #0] + 80386fe: 68db ldr r3, [r3, #12] + 8038700: 603b str r3, [r7, #0] + 8038702: 683b ldr r3, [r7, #0] + 8038704: 2b00 cmp r3, #0 + 8038706: d1ea bne.n 80386de for (i = 0; i < NUM_TCP_PCB_LISTS; i++) { - 80386d8: 79fb ldrb r3, [r7, #7] - 80386da: 3301 adds r3, #1 - 80386dc: 71fb strb r3, [r7, #7] - 80386de: 79fb ldrb r3, [r7, #7] - 80386e0: 2b03 cmp r3, #3 - 80386e2: d9dd bls.n 80386a0 + 8038708: 79fb ldrb r3, [r7, #7] + 803870a: 3301 adds r3, #1 + 803870c: 71fb strb r3, [r7, #7] + 803870e: 79fb ldrb r3, [r7, #7] + 8038710: 2b03 cmp r3, #3 + 8038712: d9dd bls.n 80386d0 } goto again; } } } return tcp_port; - 80386e4: 4b03 ldr r3, [pc, #12] ; (80386f4 ) - 80386e6: 881b ldrh r3, [r3, #0] -} - 80386e8: 4618 mov r0, r3 - 80386ea: 370c adds r7, #12 - 80386ec: 46bd mov sp, r7 - 80386ee: f85d 7b04 ldr.w r7, [sp], #4 - 80386f2: 4770 bx lr - 80386f4: 2400006c .word 0x2400006c - 80386f8: 08044da8 .word 0x08044da8 - -080386fc : + 8038714: 4b03 ldr r3, [pc, #12] ; (8038724 ) + 8038716: 881b ldrh r3, [r3, #0] +} + 8038718: 4618 mov r0, r3 + 803871a: 370c adds r7, #12 + 803871c: 46bd mov sp, r7 + 803871e: f85d 7b04 ldr.w r7, [sp], #4 + 8038722: 4770 bx lr + 8038724: 2400006c .word 0x2400006c + 8038728: 08044dd8 .word 0x08044dd8 + +0803872c : * * Automatically called from tcp_tmr(). */ void tcp_slowtmr(void) { - 80386fc: b5b0 push {r4, r5, r7, lr} - 80386fe: b090 sub sp, #64 ; 0x40 - 8038700: af04 add r7, sp, #16 + 803872c: b5b0 push {r4, r5, r7, lr} + 803872e: b090 sub sp, #64 ; 0x40 + 8038730: af04 add r7, sp, #16 tcpwnd_size_t eff_wnd; u8_t pcb_remove; /* flag if a PCB should be removed */ u8_t pcb_reset; /* flag if a RST should be sent when removing */ err_t err; err = ERR_OK; - 8038702: 2300 movs r3, #0 - 8038704: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 8038732: 2300 movs r3, #0 + 8038734: f887 3025 strb.w r3, [r7, #37] ; 0x25 ++tcp_ticks; - 8038708: 4b94 ldr r3, [pc, #592] ; (803895c ) - 803870a: 681b ldr r3, [r3, #0] - 803870c: 3301 adds r3, #1 - 803870e: 4a93 ldr r2, [pc, #588] ; (803895c ) - 8038710: 6013 str r3, [r2, #0] + 8038738: 4b94 ldr r3, [pc, #592] ; (803898c ) + 803873a: 681b ldr r3, [r3, #0] + 803873c: 3301 adds r3, #1 + 803873e: 4a93 ldr r2, [pc, #588] ; (803898c ) + 8038740: 6013 str r3, [r2, #0] ++tcp_timer_ctr; - 8038712: 4b93 ldr r3, [pc, #588] ; (8038960 ) - 8038714: 781b ldrb r3, [r3, #0] - 8038716: 3301 adds r3, #1 - 8038718: b2da uxtb r2, r3 - 803871a: 4b91 ldr r3, [pc, #580] ; (8038960 ) - 803871c: 701a strb r2, [r3, #0] + 8038742: 4b93 ldr r3, [pc, #588] ; (8038990 ) + 8038744: 781b ldrb r3, [r3, #0] + 8038746: 3301 adds r3, #1 + 8038748: b2da uxtb r2, r3 + 803874a: 4b91 ldr r3, [pc, #580] ; (8038990 ) + 803874c: 701a strb r2, [r3, #0] tcp_slowtmr_start: /* Steps through all of the active PCBs. */ prev = NULL; - 803871e: 2300 movs r3, #0 - 8038720: 62bb str r3, [r7, #40] ; 0x28 + 803874e: 2300 movs r3, #0 + 8038750: 62bb str r3, [r7, #40] ; 0x28 pcb = tcp_active_pcbs; - 8038722: 4b90 ldr r3, [pc, #576] ; (8038964 ) - 8038724: 681b ldr r3, [r3, #0] - 8038726: 62fb str r3, [r7, #44] ; 0x2c + 8038752: 4b90 ldr r3, [pc, #576] ; (8038994 ) + 8038754: 681b ldr r3, [r3, #0] + 8038756: 62fb str r3, [r7, #44] ; 0x2c if (pcb == NULL) { LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: no active pcbs\n")); } while (pcb != NULL) { - 8038728: e29d b.n 8038c66 + 8038758: e29d b.n 8038c96 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: processing active pcb\n")); LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED); - 803872a: 6afb ldr r3, [r7, #44] ; 0x2c - 803872c: 7d1b ldrb r3, [r3, #20] - 803872e: 2b00 cmp r3, #0 - 8038730: d106 bne.n 8038740 - 8038732: 4b8d ldr r3, [pc, #564] ; (8038968 ) - 8038734: f240 42be movw r2, #1214 ; 0x4be - 8038738: 498c ldr r1, [pc, #560] ; (803896c ) - 803873a: 488d ldr r0, [pc, #564] ; (8038970 ) - 803873c: f008 f9d0 bl 8040ae0 + 803875a: 6afb ldr r3, [r7, #44] ; 0x2c + 803875c: 7d1b ldrb r3, [r3, #20] + 803875e: 2b00 cmp r3, #0 + 8038760: d106 bne.n 8038770 + 8038762: 4b8d ldr r3, [pc, #564] ; (8038998 ) + 8038764: f240 42be movw r2, #1214 ; 0x4be + 8038768: 498c ldr r1, [pc, #560] ; (803899c ) + 803876a: 488d ldr r0, [pc, #564] ; (80389a0 ) + 803876c: f008 f9d0 bl 8040b10 LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN); - 8038740: 6afb ldr r3, [r7, #44] ; 0x2c - 8038742: 7d1b ldrb r3, [r3, #20] - 8038744: 2b01 cmp r3, #1 - 8038746: d106 bne.n 8038756 - 8038748: 4b87 ldr r3, [pc, #540] ; (8038968 ) - 803874a: f240 42bf movw r2, #1215 ; 0x4bf - 803874e: 4989 ldr r1, [pc, #548] ; (8038974 ) - 8038750: 4887 ldr r0, [pc, #540] ; (8038970 ) - 8038752: f008 f9c5 bl 8040ae0 + 8038770: 6afb ldr r3, [r7, #44] ; 0x2c + 8038772: 7d1b ldrb r3, [r3, #20] + 8038774: 2b01 cmp r3, #1 + 8038776: d106 bne.n 8038786 + 8038778: 4b87 ldr r3, [pc, #540] ; (8038998 ) + 803877a: f240 42bf movw r2, #1215 ; 0x4bf + 803877e: 4989 ldr r1, [pc, #548] ; (80389a4 ) + 8038780: 4887 ldr r0, [pc, #540] ; (80389a0 ) + 8038782: f008 f9c5 bl 8040b10 LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT); - 8038756: 6afb ldr r3, [r7, #44] ; 0x2c - 8038758: 7d1b ldrb r3, [r3, #20] - 803875a: 2b0a cmp r3, #10 - 803875c: d106 bne.n 803876c - 803875e: 4b82 ldr r3, [pc, #520] ; (8038968 ) - 8038760: f44f 6298 mov.w r2, #1216 ; 0x4c0 - 8038764: 4984 ldr r1, [pc, #528] ; (8038978 ) - 8038766: 4882 ldr r0, [pc, #520] ; (8038970 ) - 8038768: f008 f9ba bl 8040ae0 + 8038786: 6afb ldr r3, [r7, #44] ; 0x2c + 8038788: 7d1b ldrb r3, [r3, #20] + 803878a: 2b0a cmp r3, #10 + 803878c: d106 bne.n 803879c + 803878e: 4b82 ldr r3, [pc, #520] ; (8038998 ) + 8038790: f44f 6298 mov.w r2, #1216 ; 0x4c0 + 8038794: 4984 ldr r1, [pc, #528] ; (80389a8 ) + 8038796: 4882 ldr r0, [pc, #520] ; (80389a0 ) + 8038798: f008 f9ba bl 8040b10 if (pcb->last_timer == tcp_timer_ctr) { - 803876c: 6afb ldr r3, [r7, #44] ; 0x2c - 803876e: 7f9a ldrb r2, [r3, #30] - 8038770: 4b7b ldr r3, [pc, #492] ; (8038960 ) - 8038772: 781b ldrb r3, [r3, #0] - 8038774: 429a cmp r2, r3 - 8038776: d105 bne.n 8038784 + 803879c: 6afb ldr r3, [r7, #44] ; 0x2c + 803879e: 7f9a ldrb r2, [r3, #30] + 80387a0: 4b7b ldr r3, [pc, #492] ; (8038990 ) + 80387a2: 781b ldrb r3, [r3, #0] + 80387a4: 429a cmp r2, r3 + 80387a6: d105 bne.n 80387b4 /* skip this pcb, we have already processed it */ prev = pcb; - 8038778: 6afb ldr r3, [r7, #44] ; 0x2c - 803877a: 62bb str r3, [r7, #40] ; 0x28 + 80387a8: 6afb ldr r3, [r7, #44] ; 0x2c + 80387aa: 62bb str r3, [r7, #40] ; 0x28 pcb = pcb->next; - 803877c: 6afb ldr r3, [r7, #44] ; 0x2c - 803877e: 68db ldr r3, [r3, #12] - 8038780: 62fb str r3, [r7, #44] ; 0x2c + 80387ac: 6afb ldr r3, [r7, #44] ; 0x2c + 80387ae: 68db ldr r3, [r3, #12] + 80387b0: 62fb str r3, [r7, #44] ; 0x2c continue; - 8038782: e270 b.n 8038c66 + 80387b2: e270 b.n 8038c96 } pcb->last_timer = tcp_timer_ctr; - 8038784: 4b76 ldr r3, [pc, #472] ; (8038960 ) - 8038786: 781a ldrb r2, [r3, #0] - 8038788: 6afb ldr r3, [r7, #44] ; 0x2c - 803878a: 779a strb r2, [r3, #30] + 80387b4: 4b76 ldr r3, [pc, #472] ; (8038990 ) + 80387b6: 781a ldrb r2, [r3, #0] + 80387b8: 6afb ldr r3, [r7, #44] ; 0x2c + 80387ba: 779a strb r2, [r3, #30] pcb_remove = 0; - 803878c: 2300 movs r3, #0 - 803878e: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 80387bc: 2300 movs r3, #0 + 80387be: f887 3027 strb.w r3, [r7, #39] ; 0x27 pcb_reset = 0; - 8038792: 2300 movs r3, #0 - 8038794: f887 3026 strb.w r3, [r7, #38] ; 0x26 + 80387c2: 2300 movs r3, #0 + 80387c4: f887 3026 strb.w r3, [r7, #38] ; 0x26 if (pcb->state == SYN_SENT && pcb->nrtx >= TCP_SYNMAXRTX) { - 8038798: 6afb ldr r3, [r7, #44] ; 0x2c - 803879a: 7d1b ldrb r3, [r3, #20] - 803879c: 2b02 cmp r3, #2 - 803879e: d10a bne.n 80387b6 - 80387a0: 6afb ldr r3, [r7, #44] ; 0x2c - 80387a2: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 80387a6: 2b05 cmp r3, #5 - 80387a8: d905 bls.n 80387b6 + 80387c8: 6afb ldr r3, [r7, #44] ; 0x2c + 80387ca: 7d1b ldrb r3, [r3, #20] + 80387cc: 2b02 cmp r3, #2 + 80387ce: d10a bne.n 80387e6 + 80387d0: 6afb ldr r3, [r7, #44] ; 0x2c + 80387d2: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 80387d6: 2b05 cmp r3, #5 + 80387d8: d905 bls.n 80387e6 ++pcb_remove; - 80387aa: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 80387ae: 3301 adds r3, #1 - 80387b0: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 80387b4: e11e b.n 80389f4 + 80387da: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 80387de: 3301 adds r3, #1 + 80387e0: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 80387e4: e11e b.n 8038a24 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n")); } else if (pcb->nrtx >= TCP_MAXRTX) { - 80387b6: 6afb ldr r3, [r7, #44] ; 0x2c - 80387b8: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 80387bc: 2b0b cmp r3, #11 - 80387be: d905 bls.n 80387cc + 80387e6: 6afb ldr r3, [r7, #44] ; 0x2c + 80387e8: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 80387ec: 2b0b cmp r3, #11 + 80387ee: d905 bls.n 80387fc ++pcb_remove; - 80387c0: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 80387c4: 3301 adds r3, #1 - 80387c6: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 80387ca: e113 b.n 80389f4 + 80387f0: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 80387f4: 3301 adds r3, #1 + 80387f6: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 80387fa: e113 b.n 8038a24 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max DATA retries reached\n")); } else { if (pcb->persist_backoff > 0) { - 80387cc: 6afb ldr r3, [r7, #44] ; 0x2c - 80387ce: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 80387d2: 2b00 cmp r3, #0 - 80387d4: d075 beq.n 80388c2 + 80387fc: 6afb ldr r3, [r7, #44] ; 0x2c + 80387fe: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 8038802: 2b00 cmp r3, #0 + 8038804: d075 beq.n 80388f2 LWIP_ASSERT("tcp_slowtimr: persist ticking with in-flight data", pcb->unacked == NULL); - 80387d6: 6afb ldr r3, [r7, #44] ; 0x2c - 80387d8: 6f1b ldr r3, [r3, #112] ; 0x70 - 80387da: 2b00 cmp r3, #0 - 80387dc: d006 beq.n 80387ec - 80387de: 4b62 ldr r3, [pc, #392] ; (8038968 ) - 80387e0: f240 42d4 movw r2, #1236 ; 0x4d4 - 80387e4: 4965 ldr r1, [pc, #404] ; (803897c ) - 80387e6: 4862 ldr r0, [pc, #392] ; (8038970 ) - 80387e8: f008 f97a bl 8040ae0 + 8038806: 6afb ldr r3, [r7, #44] ; 0x2c + 8038808: 6f1b ldr r3, [r3, #112] ; 0x70 + 803880a: 2b00 cmp r3, #0 + 803880c: d006 beq.n 803881c + 803880e: 4b62 ldr r3, [pc, #392] ; (8038998 ) + 8038810: f240 42d4 movw r2, #1236 ; 0x4d4 + 8038814: 4965 ldr r1, [pc, #404] ; (80389ac ) + 8038816: 4862 ldr r0, [pc, #392] ; (80389a0 ) + 8038818: f008 f97a bl 8040b10 LWIP_ASSERT("tcp_slowtimr: persist ticking with empty send buffer", pcb->unsent != NULL); - 80387ec: 6afb ldr r3, [r7, #44] ; 0x2c - 80387ee: 6edb ldr r3, [r3, #108] ; 0x6c - 80387f0: 2b00 cmp r3, #0 - 80387f2: d106 bne.n 8038802 - 80387f4: 4b5c ldr r3, [pc, #368] ; (8038968 ) - 80387f6: f240 42d5 movw r2, #1237 ; 0x4d5 - 80387fa: 4961 ldr r1, [pc, #388] ; (8038980 ) - 80387fc: 485c ldr r0, [pc, #368] ; (8038970 ) - 80387fe: f008 f96f bl 8040ae0 + 803881c: 6afb ldr r3, [r7, #44] ; 0x2c + 803881e: 6edb ldr r3, [r3, #108] ; 0x6c + 8038820: 2b00 cmp r3, #0 + 8038822: d106 bne.n 8038832 + 8038824: 4b5c ldr r3, [pc, #368] ; (8038998 ) + 8038826: f240 42d5 movw r2, #1237 ; 0x4d5 + 803882a: 4961 ldr r1, [pc, #388] ; (80389b0 ) + 803882c: 485c ldr r0, [pc, #368] ; (80389a0 ) + 803882e: f008 f96f bl 8040b10 if (pcb->persist_probe >= TCP_MAXRTX) { - 8038802: 6afb ldr r3, [r7, #44] ; 0x2c - 8038804: f893 309a ldrb.w r3, [r3, #154] ; 0x9a - 8038808: 2b0b cmp r3, #11 - 803880a: d905 bls.n 8038818 + 8038832: 6afb ldr r3, [r7, #44] ; 0x2c + 8038834: f893 309a ldrb.w r3, [r3, #154] ; 0x9a + 8038838: 2b0b cmp r3, #11 + 803883a: d905 bls.n 8038848 ++pcb_remove; /* max probes reached */ - 803880c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038810: 3301 adds r3, #1 - 8038812: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 8038816: e0ed b.n 80389f4 + 803883c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038840: 3301 adds r3, #1 + 8038842: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038846: e0ed b.n 8038a24 } else { u8_t backoff_cnt = tcp_persist_backoff[pcb->persist_backoff - 1]; - 8038818: 6afb ldr r3, [r7, #44] ; 0x2c - 803881a: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 803881e: 3b01 subs r3, #1 - 8038820: 4a58 ldr r2, [pc, #352] ; (8038984 ) - 8038822: 5cd3 ldrb r3, [r2, r3] - 8038824: 747b strb r3, [r7, #17] + 8038848: 6afb ldr r3, [r7, #44] ; 0x2c + 803884a: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 803884e: 3b01 subs r3, #1 + 8038850: 4a58 ldr r2, [pc, #352] ; (80389b4 ) + 8038852: 5cd3 ldrb r3, [r2, r3] + 8038854: 747b strb r3, [r7, #17] if (pcb->persist_cnt < backoff_cnt) { - 8038826: 6afb ldr r3, [r7, #44] ; 0x2c - 8038828: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 803882c: 7c7a ldrb r2, [r7, #17] - 803882e: 429a cmp r2, r3 - 8038830: d907 bls.n 8038842 + 8038856: 6afb ldr r3, [r7, #44] ; 0x2c + 8038858: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 803885c: 7c7a ldrb r2, [r7, #17] + 803885e: 429a cmp r2, r3 + 8038860: d907 bls.n 8038872 pcb->persist_cnt++; - 8038832: 6afb ldr r3, [r7, #44] ; 0x2c - 8038834: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 8038838: 3301 adds r3, #1 - 803883a: b2da uxtb r2, r3 - 803883c: 6afb ldr r3, [r7, #44] ; 0x2c - 803883e: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 8038862: 6afb ldr r3, [r7, #44] ; 0x2c + 8038864: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 8038868: 3301 adds r3, #1 + 803886a: b2da uxtb r2, r3 + 803886c: 6afb ldr r3, [r7, #44] ; 0x2c + 803886e: f883 2098 strb.w r2, [r3, #152] ; 0x98 } if (pcb->persist_cnt >= backoff_cnt) { - 8038842: 6afb ldr r3, [r7, #44] ; 0x2c - 8038844: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 8038848: 7c7a ldrb r2, [r7, #17] - 803884a: 429a cmp r2, r3 - 803884c: f200 80d2 bhi.w 80389f4 + 8038872: 6afb ldr r3, [r7, #44] ; 0x2c + 8038874: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 8038878: 7c7a ldrb r2, [r7, #17] + 803887a: 429a cmp r2, r3 + 803887c: f200 80d2 bhi.w 8038a24 int next_slot = 1; /* increment timer to next slot */ - 8038850: 2301 movs r3, #1 - 8038852: 623b str r3, [r7, #32] + 8038880: 2301 movs r3, #1 + 8038882: 623b str r3, [r7, #32] /* If snd_wnd is zero, send 1 byte probes */ if (pcb->snd_wnd == 0) { - 8038854: 6afb ldr r3, [r7, #44] ; 0x2c - 8038856: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803885a: 2b00 cmp r3, #0 - 803885c: d108 bne.n 8038870 + 8038884: 6afb ldr r3, [r7, #44] ; 0x2c + 8038886: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803888a: 2b00 cmp r3, #0 + 803888c: d108 bne.n 80388a0 if (tcp_zero_window_probe(pcb) != ERR_OK) { - 803885e: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038860: f005 f92c bl 803dabc - 8038864: 4603 mov r3, r0 - 8038866: 2b00 cmp r3, #0 - 8038868: d014 beq.n 8038894 + 803888e: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038890: f005 f92c bl 803daec + 8038894: 4603 mov r3, r0 + 8038896: 2b00 cmp r3, #0 + 8038898: d014 beq.n 80388c4 next_slot = 0; /* try probe again with current slot */ - 803886a: 2300 movs r3, #0 - 803886c: 623b str r3, [r7, #32] - 803886e: e011 b.n 8038894 + 803889a: 2300 movs r3, #0 + 803889c: 623b str r3, [r7, #32] + 803889e: e011 b.n 80388c4 } /* snd_wnd not fully closed, split unsent head and fill window */ } else { if (tcp_split_unsent_seg(pcb, (u16_t)pcb->snd_wnd) == ERR_OK) { - 8038870: 6afb ldr r3, [r7, #44] ; 0x2c - 8038872: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 8038876: 4619 mov r1, r3 - 8038878: 6af8 ldr r0, [r7, #44] ; 0x2c - 803887a: f003 fff1 bl 803c860 - 803887e: 4603 mov r3, r0 - 8038880: 2b00 cmp r3, #0 - 8038882: d107 bne.n 8038894 + 80388a0: 6afb ldr r3, [r7, #44] ; 0x2c + 80388a2: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 80388a6: 4619 mov r1, r3 + 80388a8: 6af8 ldr r0, [r7, #44] ; 0x2c + 80388aa: f003 fff1 bl 803c890 + 80388ae: 4603 mov r3, r0 + 80388b0: 2b00 cmp r3, #0 + 80388b2: d107 bne.n 80388c4 if (tcp_output(pcb) == ERR_OK) { - 8038884: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038886: f004 fa71 bl 803cd6c - 803888a: 4603 mov r3, r0 - 803888c: 2b00 cmp r3, #0 - 803888e: d101 bne.n 8038894 + 80388b4: 6af8 ldr r0, [r7, #44] ; 0x2c + 80388b6: f004 fa71 bl 803cd9c + 80388ba: 4603 mov r3, r0 + 80388bc: 2b00 cmp r3, #0 + 80388be: d101 bne.n 80388c4 /* sending will cancel persist timer, else retry with current slot */ next_slot = 0; - 8038890: 2300 movs r3, #0 - 8038892: 623b str r3, [r7, #32] + 80388c0: 2300 movs r3, #0 + 80388c2: 623b str r3, [r7, #32] } } } if (next_slot) { - 8038894: 6a3b ldr r3, [r7, #32] - 8038896: 2b00 cmp r3, #0 - 8038898: f000 80ac beq.w 80389f4 + 80388c4: 6a3b ldr r3, [r7, #32] + 80388c6: 2b00 cmp r3, #0 + 80388c8: f000 80ac beq.w 8038a24 pcb->persist_cnt = 0; - 803889c: 6afb ldr r3, [r7, #44] ; 0x2c - 803889e: 2200 movs r2, #0 - 80388a0: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 80388cc: 6afb ldr r3, [r7, #44] ; 0x2c + 80388ce: 2200 movs r2, #0 + 80388d0: f883 2098 strb.w r2, [r3, #152] ; 0x98 if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) { - 80388a4: 6afb ldr r3, [r7, #44] ; 0x2c - 80388a6: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 80388aa: 2b06 cmp r3, #6 - 80388ac: f200 80a2 bhi.w 80389f4 + 80388d4: 6afb ldr r3, [r7, #44] ; 0x2c + 80388d6: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 80388da: 2b06 cmp r3, #6 + 80388dc: f200 80a2 bhi.w 8038a24 pcb->persist_backoff++; - 80388b0: 6afb ldr r3, [r7, #44] ; 0x2c - 80388b2: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 80388b6: 3301 adds r3, #1 - 80388b8: b2da uxtb r2, r3 - 80388ba: 6afb ldr r3, [r7, #44] ; 0x2c - 80388bc: f883 2099 strb.w r2, [r3, #153] ; 0x99 - 80388c0: e098 b.n 80389f4 + 80388e0: 6afb ldr r3, [r7, #44] ; 0x2c + 80388e2: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 80388e6: 3301 adds r3, #1 + 80388e8: b2da uxtb r2, r3 + 80388ea: 6afb ldr r3, [r7, #44] ; 0x2c + 80388ec: f883 2099 strb.w r2, [r3, #153] ; 0x99 + 80388f0: e098 b.n 8038a24 } } } } else { /* Increase the retransmission timer if it is running */ if ((pcb->rtime >= 0) && (pcb->rtime < 0x7FFF)) { - 80388c2: 6afb ldr r3, [r7, #44] ; 0x2c - 80388c4: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 80388c8: 2b00 cmp r3, #0 - 80388ca: db0f blt.n 80388ec - 80388cc: 6afb ldr r3, [r7, #44] ; 0x2c - 80388ce: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 80388d2: f647 72ff movw r2, #32767 ; 0x7fff - 80388d6: 4293 cmp r3, r2 - 80388d8: d008 beq.n 80388ec + 80388f2: 6afb ldr r3, [r7, #44] ; 0x2c + 80388f4: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 80388f8: 2b00 cmp r3, #0 + 80388fa: db0f blt.n 803891c + 80388fc: 6afb ldr r3, [r7, #44] ; 0x2c + 80388fe: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 8038902: f647 72ff movw r2, #32767 ; 0x7fff + 8038906: 4293 cmp r3, r2 + 8038908: d008 beq.n 803891c ++pcb->rtime; - 80388da: 6afb ldr r3, [r7, #44] ; 0x2c - 80388dc: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 80388e0: b29b uxth r3, r3 - 80388e2: 3301 adds r3, #1 - 80388e4: b29b uxth r3, r3 - 80388e6: b21a sxth r2, r3 - 80388e8: 6afb ldr r3, [r7, #44] ; 0x2c - 80388ea: 861a strh r2, [r3, #48] ; 0x30 + 803890a: 6afb ldr r3, [r7, #44] ; 0x2c + 803890c: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 8038910: b29b uxth r3, r3 + 8038912: 3301 adds r3, #1 + 8038914: b29b uxth r3, r3 + 8038916: b21a sxth r2, r3 + 8038918: 6afb ldr r3, [r7, #44] ; 0x2c + 803891a: 861a strh r2, [r3, #48] ; 0x30 } if (pcb->rtime >= pcb->rto) { - 80388ec: 6afb ldr r3, [r7, #44] ; 0x2c - 80388ee: f9b3 2030 ldrsh.w r2, [r3, #48] ; 0x30 - 80388f2: 6afb ldr r3, [r7, #44] ; 0x2c - 80388f4: f9b3 3040 ldrsh.w r3, [r3, #64] ; 0x40 - 80388f8: 429a cmp r2, r3 - 80388fa: db7b blt.n 80389f4 + 803891c: 6afb ldr r3, [r7, #44] ; 0x2c + 803891e: f9b3 2030 ldrsh.w r2, [r3, #48] ; 0x30 + 8038922: 6afb ldr r3, [r7, #44] ; 0x2c + 8038924: f9b3 3040 ldrsh.w r3, [r3, #64] ; 0x40 + 8038928: 429a cmp r2, r3 + 803892a: db7b blt.n 8038a24 " pcb->rto %"S16_F"\n", pcb->rtime, pcb->rto)); /* If prepare phase fails but we have unsent data but no unacked data, still execute the backoff calculations below, as this means we somehow failed to send segment. */ if ((tcp_rexmit_rto_prepare(pcb) == ERR_OK) || ((pcb->unacked == NULL) && (pcb->unsent != NULL))) { - 80388fc: 6af8 ldr r0, [r7, #44] ; 0x2c - 80388fe: f004 fd27 bl 803d350 - 8038902: 4603 mov r3, r0 - 8038904: 2b00 cmp r3, #0 - 8038906: d007 beq.n 8038918 - 8038908: 6afb ldr r3, [r7, #44] ; 0x2c - 803890a: 6f1b ldr r3, [r3, #112] ; 0x70 - 803890c: 2b00 cmp r3, #0 - 803890e: d171 bne.n 80389f4 - 8038910: 6afb ldr r3, [r7, #44] ; 0x2c - 8038912: 6edb ldr r3, [r3, #108] ; 0x6c - 8038914: 2b00 cmp r3, #0 - 8038916: d06d beq.n 80389f4 + 803892c: 6af8 ldr r0, [r7, #44] ; 0x2c + 803892e: f004 fd27 bl 803d380 + 8038932: 4603 mov r3, r0 + 8038934: 2b00 cmp r3, #0 + 8038936: d007 beq.n 8038948 + 8038938: 6afb ldr r3, [r7, #44] ; 0x2c + 803893a: 6f1b ldr r3, [r3, #112] ; 0x70 + 803893c: 2b00 cmp r3, #0 + 803893e: d171 bne.n 8038a24 + 8038940: 6afb ldr r3, [r7, #44] ; 0x2c + 8038942: 6edb ldr r3, [r3, #108] ; 0x6c + 8038944: 2b00 cmp r3, #0 + 8038946: d06d beq.n 8038a24 /* Double retransmission time-out unless we are trying to * connect to somebody (i.e., we are in SYN_SENT). */ if (pcb->state != SYN_SENT) { - 8038918: 6afb ldr r3, [r7, #44] ; 0x2c - 803891a: 7d1b ldrb r3, [r3, #20] - 803891c: 2b02 cmp r3, #2 - 803891e: d03a beq.n 8038996 + 8038948: 6afb ldr r3, [r7, #44] ; 0x2c + 803894a: 7d1b ldrb r3, [r3, #20] + 803894c: 2b02 cmp r3, #2 + 803894e: d03a beq.n 80389c6 u8_t backoff_idx = LWIP_MIN(pcb->nrtx, sizeof(tcp_backoff) - 1); - 8038920: 6afb ldr r3, [r7, #44] ; 0x2c - 8038922: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 8038926: 2b0c cmp r3, #12 - 8038928: bf28 it cs - 803892a: 230c movcs r3, #12 - 803892c: 76fb strb r3, [r7, #27] + 8038950: 6afb ldr r3, [r7, #44] ; 0x2c + 8038952: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 8038956: 2b0c cmp r3, #12 + 8038958: bf28 it cs + 803895a: 230c movcs r3, #12 + 803895c: 76fb strb r3, [r7, #27] int calc_rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[backoff_idx]; - 803892e: 6afb ldr r3, [r7, #44] ; 0x2c - 8038930: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 8038934: 10db asrs r3, r3, #3 - 8038936: b21b sxth r3, r3 - 8038938: 461a mov r2, r3 - 803893a: 6afb ldr r3, [r7, #44] ; 0x2c - 803893c: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 8038940: 4413 add r3, r2 - 8038942: 7efa ldrb r2, [r7, #27] - 8038944: 4910 ldr r1, [pc, #64] ; (8038988 ) - 8038946: 5c8a ldrb r2, [r1, r2] - 8038948: 4093 lsls r3, r2 - 803894a: 617b str r3, [r7, #20] + 803895e: 6afb ldr r3, [r7, #44] ; 0x2c + 8038960: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 8038964: 10db asrs r3, r3, #3 + 8038966: b21b sxth r3, r3 + 8038968: 461a mov r2, r3 + 803896a: 6afb ldr r3, [r7, #44] ; 0x2c + 803896c: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 8038970: 4413 add r3, r2 + 8038972: 7efa ldrb r2, [r7, #27] + 8038974: 4910 ldr r1, [pc, #64] ; (80389b8 ) + 8038976: 5c8a ldrb r2, [r1, r2] + 8038978: 4093 lsls r3, r2 + 803897a: 617b str r3, [r7, #20] pcb->rto = (s16_t)LWIP_MIN(calc_rto, 0x7FFF); - 803894c: 697b ldr r3, [r7, #20] - 803894e: f647 72fe movw r2, #32766 ; 0x7ffe - 8038952: 4293 cmp r3, r2 - 8038954: dc1a bgt.n 803898c - 8038956: 697b ldr r3, [r7, #20] - 8038958: b21a sxth r2, r3 - 803895a: e019 b.n 8038990 - 803895c: 2400e958 .word 0x2400e958 - 8038960: 2400e96e .word 0x2400e96e - 8038964: 2400e964 .word 0x2400e964 - 8038968: 08042d68 .word 0x08042d68 - 803896c: 080430ac .word 0x080430ac - 8038970: 08042dac .word 0x08042dac - 8038974: 080430d8 .word 0x080430d8 - 8038978: 08043104 .word 0x08043104 - 803897c: 08043134 .word 0x08043134 - 8038980: 08043168 .word 0x08043168 - 8038984: 08044da0 .word 0x08044da0 - 8038988: 08044d90 .word 0x08044d90 - 803898c: f647 72ff movw r2, #32767 ; 0x7fff - 8038990: 6afb ldr r3, [r7, #44] ; 0x2c - 8038992: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 + 803897c: 697b ldr r3, [r7, #20] + 803897e: f647 72fe movw r2, #32766 ; 0x7ffe + 8038982: 4293 cmp r3, r2 + 8038984: dc1a bgt.n 80389bc + 8038986: 697b ldr r3, [r7, #20] + 8038988: b21a sxth r2, r3 + 803898a: e019 b.n 80389c0 + 803898c: 2400e958 .word 0x2400e958 + 8038990: 2400e96e .word 0x2400e96e + 8038994: 2400e964 .word 0x2400e964 + 8038998: 08042d98 .word 0x08042d98 + 803899c: 080430dc .word 0x080430dc + 80389a0: 08042ddc .word 0x08042ddc + 80389a4: 08043108 .word 0x08043108 + 80389a8: 08043134 .word 0x08043134 + 80389ac: 08043164 .word 0x08043164 + 80389b0: 08043198 .word 0x08043198 + 80389b4: 08044dd0 .word 0x08044dd0 + 80389b8: 08044dc0 .word 0x08044dc0 + 80389bc: f647 72ff movw r2, #32767 ; 0x7fff + 80389c0: 6afb ldr r3, [r7, #44] ; 0x2c + 80389c2: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 } /* Reset the retransmission timer. */ pcb->rtime = 0; - 8038996: 6afb ldr r3, [r7, #44] ; 0x2c - 8038998: 2200 movs r2, #0 - 803899a: 861a strh r2, [r3, #48] ; 0x30 + 80389c6: 6afb ldr r3, [r7, #44] ; 0x2c + 80389c8: 2200 movs r2, #0 + 80389ca: 861a strh r2, [r3, #48] ; 0x30 /* Reduce congestion window and ssthresh. */ eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd); - 803899c: 6afb ldr r3, [r7, #44] ; 0x2c - 803899e: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 80389a2: 6afb ldr r3, [r7, #44] ; 0x2c - 80389a4: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 80389a8: 4293 cmp r3, r2 - 80389aa: bf28 it cs - 80389ac: 4613 movcs r3, r2 - 80389ae: 827b strh r3, [r7, #18] + 80389cc: 6afb ldr r3, [r7, #44] ; 0x2c + 80389ce: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 80389d2: 6afb ldr r3, [r7, #44] ; 0x2c + 80389d4: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 80389d8: 4293 cmp r3, r2 + 80389da: bf28 it cs + 80389dc: 4613 movcs r3, r2 + 80389de: 827b strh r3, [r7, #18] pcb->ssthresh = eff_wnd >> 1; - 80389b0: 8a7b ldrh r3, [r7, #18] - 80389b2: 085b lsrs r3, r3, #1 - 80389b4: b29a uxth r2, r3 - 80389b6: 6afb ldr r3, [r7, #44] ; 0x2c - 80389b8: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 80389e0: 8a7b ldrh r3, [r7, #18] + 80389e2: 085b lsrs r3, r3, #1 + 80389e4: b29a uxth r2, r3 + 80389e6: 6afb ldr r3, [r7, #44] ; 0x2c + 80389e8: f8a3 204a strh.w r2, [r3, #74] ; 0x4a if (pcb->ssthresh < (tcpwnd_size_t)(pcb->mss << 1)) { - 80389bc: 6afb ldr r3, [r7, #44] ; 0x2c - 80389be: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a - 80389c2: 6afb ldr r3, [r7, #44] ; 0x2c - 80389c4: 8e5b ldrh r3, [r3, #50] ; 0x32 - 80389c6: 005b lsls r3, r3, #1 - 80389c8: b29b uxth r3, r3 - 80389ca: 429a cmp r2, r3 - 80389cc: d206 bcs.n 80389dc + 80389ec: 6afb ldr r3, [r7, #44] ; 0x2c + 80389ee: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a + 80389f2: 6afb ldr r3, [r7, #44] ; 0x2c + 80389f4: 8e5b ldrh r3, [r3, #50] ; 0x32 + 80389f6: 005b lsls r3, r3, #1 + 80389f8: b29b uxth r3, r3 + 80389fa: 429a cmp r2, r3 + 80389fc: d206 bcs.n 8038a0c pcb->ssthresh = (tcpwnd_size_t)(pcb->mss << 1); - 80389ce: 6afb ldr r3, [r7, #44] ; 0x2c - 80389d0: 8e5b ldrh r3, [r3, #50] ; 0x32 - 80389d2: 005b lsls r3, r3, #1 - 80389d4: b29a uxth r2, r3 - 80389d6: 6afb ldr r3, [r7, #44] ; 0x2c - 80389d8: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 80389fe: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a00: 8e5b ldrh r3, [r3, #50] ; 0x32 + 8038a02: 005b lsls r3, r3, #1 + 8038a04: b29a uxth r2, r3 + 8038a06: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a08: f8a3 204a strh.w r2, [r3, #74] ; 0x4a } pcb->cwnd = pcb->mss; - 80389dc: 6afb ldr r3, [r7, #44] ; 0x2c - 80389de: 8e5a ldrh r2, [r3, #50] ; 0x32 - 80389e0: 6afb ldr r3, [r7, #44] ; 0x2c - 80389e2: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 8038a0c: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a0e: 8e5a ldrh r2, [r3, #50] ; 0x32 + 8038a10: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a12: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: cwnd %"TCPWNDSIZE_F " ssthresh %"TCPWNDSIZE_F"\n", pcb->cwnd, pcb->ssthresh)); pcb->bytes_acked = 0; - 80389e6: 6afb ldr r3, [r7, #44] ; 0x2c - 80389e8: 2200 movs r2, #0 - 80389ea: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 8038a16: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a18: 2200 movs r2, #0 + 8038a1a: f8a3 206a strh.w r2, [r3, #106] ; 0x6a /* The following needs to be called AFTER cwnd is set to one mss - STJ */ tcp_rexmit_rto_commit(pcb); - 80389ee: 6af8 ldr r0, [r7, #44] ; 0x2c - 80389f0: f004 fd1e bl 803d430 + 8038a1e: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038a20: f004 fd1e bl 803d460 } } } } /* Check if this PCB has stayed too long in FIN-WAIT-2 */ if (pcb->state == FIN_WAIT_2) { - 80389f4: 6afb ldr r3, [r7, #44] ; 0x2c - 80389f6: 7d1b ldrb r3, [r3, #20] - 80389f8: 2b06 cmp r3, #6 - 80389fa: d111 bne.n 8038a20 + 8038a24: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a26: 7d1b ldrb r3, [r3, #20] + 8038a28: 2b06 cmp r3, #6 + 8038a2a: d111 bne.n 8038a50 /* If this PCB is in FIN_WAIT_2 because of SHUT_WR don't let it time out. */ if (pcb->flags & TF_RXCLOSED) { - 80389fc: 6afb ldr r3, [r7, #44] ; 0x2c - 80389fe: 8b5b ldrh r3, [r3, #26] - 8038a00: f003 0310 and.w r3, r3, #16 - 8038a04: 2b00 cmp r3, #0 - 8038a06: d00b beq.n 8038a20 + 8038a2c: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a2e: 8b5b ldrh r3, [r3, #26] + 8038a30: f003 0310 and.w r3, r3, #16 + 8038a34: 2b00 cmp r3, #0 + 8038a36: d00b beq.n 8038a50 /* PCB was fully closed (either through close() or SHUT_RDWR): normal FIN-WAIT timeout handling. */ if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038a08: 4b9c ldr r3, [pc, #624] ; (8038c7c ) - 8038a0a: 681a ldr r2, [r3, #0] - 8038a0c: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a0e: 6a1b ldr r3, [r3, #32] - 8038a10: 1ad3 subs r3, r2, r3 - 8038a12: 2b28 cmp r3, #40 ; 0x28 - 8038a14: d904 bls.n 8038a20 + 8038a38: 4b9c ldr r3, [pc, #624] ; (8038cac ) + 8038a3a: 681a ldr r2, [r3, #0] + 8038a3c: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a3e: 6a1b ldr r3, [r3, #32] + 8038a40: 1ad3 subs r3, r2, r3 + 8038a42: 2b28 cmp r3, #40 ; 0x28 + 8038a44: d904 bls.n 8038a50 TCP_FIN_WAIT_TIMEOUT / TCP_SLOW_INTERVAL) { ++pcb_remove; - 8038a16: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038a1a: 3301 adds r3, #1 - 8038a1c: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038a46: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038a4a: 3301 adds r3, #1 + 8038a4c: f887 3027 strb.w r3, [r7, #39] ; 0x27 } } } /* Check if KEEPALIVE should be sent */ if (ip_get_option(pcb, SOF_KEEPALIVE) && - 8038a20: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a22: 7a5b ldrb r3, [r3, #9] - 8038a24: f003 0308 and.w r3, r3, #8 - 8038a28: 2b00 cmp r3, #0 - 8038a2a: d04a beq.n 8038ac2 + 8038a50: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a52: 7a5b ldrb r3, [r3, #9] + 8038a54: f003 0308 and.w r3, r3, #8 + 8038a58: 2b00 cmp r3, #0 + 8038a5a: d04a beq.n 8038af2 ((pcb->state == ESTABLISHED) || - 8038a2c: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a2e: 7d1b ldrb r3, [r3, #20] + 8038a5c: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a5e: 7d1b ldrb r3, [r3, #20] if (ip_get_option(pcb, SOF_KEEPALIVE) && - 8038a30: 2b04 cmp r3, #4 - 8038a32: d003 beq.n 8038a3c + 8038a60: 2b04 cmp r3, #4 + 8038a62: d003 beq.n 8038a6c (pcb->state == CLOSE_WAIT))) { - 8038a34: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a36: 7d1b ldrb r3, [r3, #20] + 8038a64: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a66: 7d1b ldrb r3, [r3, #20] ((pcb->state == ESTABLISHED) || - 8038a38: 2b07 cmp r3, #7 - 8038a3a: d142 bne.n 8038ac2 + 8038a68: 2b07 cmp r3, #7 + 8038a6a: d142 bne.n 8038af2 if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038a3c: 4b8f ldr r3, [pc, #572] ; (8038c7c ) - 8038a3e: 681a ldr r2, [r3, #0] - 8038a40: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a42: 6a1b ldr r3, [r3, #32] - 8038a44: 1ad2 subs r2, r2, r3 + 8038a6c: 4b8f ldr r3, [pc, #572] ; (8038cac ) + 8038a6e: 681a ldr r2, [r3, #0] + 8038a70: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a72: 6a1b ldr r3, [r3, #32] + 8038a74: 1ad2 subs r2, r2, r3 (pcb->keep_idle + TCP_KEEP_DUR(pcb)) / TCP_SLOW_INTERVAL) { - 8038a46: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a48: f8d3 1094 ldr.w r1, [r3, #148] ; 0x94 - 8038a4c: 4b8c ldr r3, [pc, #560] ; (8038c80 ) - 8038a4e: 440b add r3, r1 - 8038a50: 498c ldr r1, [pc, #560] ; (8038c84 ) - 8038a52: fba1 1303 umull r1, r3, r1, r3 - 8038a56: 095b lsrs r3, r3, #5 + 8038a76: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a78: f8d3 1094 ldr.w r1, [r3, #148] ; 0x94 + 8038a7c: 4b8c ldr r3, [pc, #560] ; (8038cb0 ) + 8038a7e: 440b add r3, r1 + 8038a80: 498c ldr r1, [pc, #560] ; (8038cb4 ) + 8038a82: fba1 1303 umull r1, r3, r1, r3 + 8038a86: 095b lsrs r3, r3, #5 if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038a58: 429a cmp r2, r3 - 8038a5a: d90a bls.n 8038a72 + 8038a88: 429a cmp r2, r3 + 8038a8a: d90a bls.n 8038aa2 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: KEEPALIVE timeout. Aborting connection to ")); ip_addr_debug_print_val(TCP_DEBUG, pcb->remote_ip); LWIP_DEBUGF(TCP_DEBUG, ("\n")); ++pcb_remove; - 8038a5c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038a60: 3301 adds r3, #1 - 8038a62: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038a8c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038a90: 3301 adds r3, #1 + 8038a92: f887 3027 strb.w r3, [r7, #39] ; 0x27 ++pcb_reset; - 8038a66: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 - 8038a6a: 3301 adds r3, #1 - 8038a6c: f887 3026 strb.w r3, [r7, #38] ; 0x26 - 8038a70: e027 b.n 8038ac2 + 8038a96: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 + 8038a9a: 3301 adds r3, #1 + 8038a9c: f887 3026 strb.w r3, [r7, #38] ; 0x26 + 8038aa0: e027 b.n 8038af2 } else if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038a72: 4b82 ldr r3, [pc, #520] ; (8038c7c ) - 8038a74: 681a ldr r2, [r3, #0] - 8038a76: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a78: 6a1b ldr r3, [r3, #32] - 8038a7a: 1ad2 subs r2, r2, r3 + 8038aa2: 4b82 ldr r3, [pc, #520] ; (8038cac ) + 8038aa4: 681a ldr r2, [r3, #0] + 8038aa6: 6afb ldr r3, [r7, #44] ; 0x2c + 8038aa8: 6a1b ldr r3, [r3, #32] + 8038aaa: 1ad2 subs r2, r2, r3 (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEP_INTVL(pcb)) - 8038a7c: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a7e: f8d3 1094 ldr.w r1, [r3, #148] ; 0x94 - 8038a82: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a84: f893 309b ldrb.w r3, [r3, #155] ; 0x9b - 8038a88: 4618 mov r0, r3 - 8038a8a: 4b7f ldr r3, [pc, #508] ; (8038c88 ) - 8038a8c: fb00 f303 mul.w r3, r0, r3 - 8038a90: 440b add r3, r1 + 8038aac: 6afb ldr r3, [r7, #44] ; 0x2c + 8038aae: f8d3 1094 ldr.w r1, [r3, #148] ; 0x94 + 8038ab2: 6afb ldr r3, [r7, #44] ; 0x2c + 8038ab4: f893 309b ldrb.w r3, [r3, #155] ; 0x9b + 8038ab8: 4618 mov r0, r3 + 8038aba: 4b7f ldr r3, [pc, #508] ; (8038cb8 ) + 8038abc: fb00 f303 mul.w r3, r0, r3 + 8038ac0: 440b add r3, r1 / TCP_SLOW_INTERVAL) { - 8038a92: 497c ldr r1, [pc, #496] ; (8038c84 ) - 8038a94: fba1 1303 umull r1, r3, r1, r3 - 8038a98: 095b lsrs r3, r3, #5 + 8038ac2: 497c ldr r1, [pc, #496] ; (8038cb4 ) + 8038ac4: fba1 1303 umull r1, r3, r1, r3 + 8038ac8: 095b lsrs r3, r3, #5 } else if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038a9a: 429a cmp r2, r3 - 8038a9c: d911 bls.n 8038ac2 + 8038aca: 429a cmp r2, r3 + 8038acc: d911 bls.n 8038af2 err = tcp_keepalive(pcb); - 8038a9e: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038aa0: f004 ffcc bl 803da3c - 8038aa4: 4603 mov r3, r0 - 8038aa6: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 8038ace: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038ad0: f004 ffcc bl 803da6c + 8038ad4: 4603 mov r3, r0 + 8038ad6: f887 3025 strb.w r3, [r7, #37] ; 0x25 if (err == ERR_OK) { - 8038aaa: f997 3025 ldrsb.w r3, [r7, #37] ; 0x25 - 8038aae: 2b00 cmp r3, #0 - 8038ab0: d107 bne.n 8038ac2 + 8038ada: f997 3025 ldrsb.w r3, [r7, #37] ; 0x25 + 8038ade: 2b00 cmp r3, #0 + 8038ae0: d107 bne.n 8038af2 pcb->keep_cnt_sent++; - 8038ab2: 6afb ldr r3, [r7, #44] ; 0x2c - 8038ab4: f893 309b ldrb.w r3, [r3, #155] ; 0x9b - 8038ab8: 3301 adds r3, #1 - 8038aba: b2da uxtb r2, r3 - 8038abc: 6afb ldr r3, [r7, #44] ; 0x2c - 8038abe: f883 209b strb.w r2, [r3, #155] ; 0x9b + 8038ae2: 6afb ldr r3, [r7, #44] ; 0x2c + 8038ae4: f893 309b ldrb.w r3, [r3, #155] ; 0x9b + 8038ae8: 3301 adds r3, #1 + 8038aea: b2da uxtb r2, r3 + 8038aec: 6afb ldr r3, [r7, #44] ; 0x2c + 8038aee: f883 209b strb.w r2, [r3, #155] ; 0x9b /* If this PCB has queued out of sequence data, but has been inactive for too long, will drop the data (it will eventually be retransmitted). */ #if TCP_QUEUE_OOSEQ if (pcb->ooseq != NULL && - 8038ac2: 6afb ldr r3, [r7, #44] ; 0x2c - 8038ac4: 6f5b ldr r3, [r3, #116] ; 0x74 - 8038ac6: 2b00 cmp r3, #0 - 8038ac8: d011 beq.n 8038aee + 8038af2: 6afb ldr r3, [r7, #44] ; 0x2c + 8038af4: 6f5b ldr r3, [r3, #116] ; 0x74 + 8038af6: 2b00 cmp r3, #0 + 8038af8: d011 beq.n 8038b1e (tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) { - 8038aca: 4b6c ldr r3, [pc, #432] ; (8038c7c ) - 8038acc: 681a ldr r2, [r3, #0] - 8038ace: 6afb ldr r3, [r7, #44] ; 0x2c - 8038ad0: 6a1b ldr r3, [r3, #32] - 8038ad2: 1ad2 subs r2, r2, r3 - 8038ad4: 6afb ldr r3, [r7, #44] ; 0x2c - 8038ad6: f9b3 3040 ldrsh.w r3, [r3, #64] ; 0x40 - 8038ada: 4619 mov r1, r3 - 8038adc: 460b mov r3, r1 - 8038ade: 005b lsls r3, r3, #1 - 8038ae0: 440b add r3, r1 - 8038ae2: 005b lsls r3, r3, #1 + 8038afa: 4b6c ldr r3, [pc, #432] ; (8038cac ) + 8038afc: 681a ldr r2, [r3, #0] + 8038afe: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b00: 6a1b ldr r3, [r3, #32] + 8038b02: 1ad2 subs r2, r2, r3 + 8038b04: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b06: f9b3 3040 ldrsh.w r3, [r3, #64] ; 0x40 + 8038b0a: 4619 mov r1, r3 + 8038b0c: 460b mov r3, r1 + 8038b0e: 005b lsls r3, r3, #1 + 8038b10: 440b add r3, r1 + 8038b12: 005b lsls r3, r3, #1 if (pcb->ooseq != NULL && - 8038ae4: 429a cmp r2, r3 - 8038ae6: d302 bcc.n 8038aee + 8038b14: 429a cmp r2, r3 + 8038b16: d302 bcc.n 8038b1e LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: dropping OOSEQ queued data\n")); tcp_free_ooseq(pcb); - 8038ae8: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038aea: f000 fe87 bl 80397fc + 8038b18: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038b1a: f000 fe87 bl 803982c } #endif /* TCP_QUEUE_OOSEQ */ /* Check if this PCB has stayed too long in SYN-RCVD */ if (pcb->state == SYN_RCVD) { - 8038aee: 6afb ldr r3, [r7, #44] ; 0x2c - 8038af0: 7d1b ldrb r3, [r3, #20] - 8038af2: 2b03 cmp r3, #3 - 8038af4: d10b bne.n 8038b0e + 8038b1e: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b20: 7d1b ldrb r3, [r3, #20] + 8038b22: 2b03 cmp r3, #3 + 8038b24: d10b bne.n 8038b3e if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038af6: 4b61 ldr r3, [pc, #388] ; (8038c7c ) - 8038af8: 681a ldr r2, [r3, #0] - 8038afa: 6afb ldr r3, [r7, #44] ; 0x2c - 8038afc: 6a1b ldr r3, [r3, #32] - 8038afe: 1ad3 subs r3, r2, r3 - 8038b00: 2b28 cmp r3, #40 ; 0x28 - 8038b02: d904 bls.n 8038b0e + 8038b26: 4b61 ldr r3, [pc, #388] ; (8038cac ) + 8038b28: 681a ldr r2, [r3, #0] + 8038b2a: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b2c: 6a1b ldr r3, [r3, #32] + 8038b2e: 1ad3 subs r3, r2, r3 + 8038b30: 2b28 cmp r3, #40 ; 0x28 + 8038b32: d904 bls.n 8038b3e TCP_SYN_RCVD_TIMEOUT / TCP_SLOW_INTERVAL) { ++pcb_remove; - 8038b04: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038b08: 3301 adds r3, #1 - 8038b0a: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038b34: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038b38: 3301 adds r3, #1 + 8038b3a: f887 3027 strb.w r3, [r7, #39] ; 0x27 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in SYN-RCVD\n")); } } /* Check if this PCB has stayed too long in LAST-ACK */ if (pcb->state == LAST_ACK) { - 8038b0e: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b10: 7d1b ldrb r3, [r3, #20] - 8038b12: 2b09 cmp r3, #9 - 8038b14: d10b bne.n 8038b2e + 8038b3e: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b40: 7d1b ldrb r3, [r3, #20] + 8038b42: 2b09 cmp r3, #9 + 8038b44: d10b bne.n 8038b5e if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { - 8038b16: 4b59 ldr r3, [pc, #356] ; (8038c7c ) - 8038b18: 681a ldr r2, [r3, #0] - 8038b1a: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b1c: 6a1b ldr r3, [r3, #32] - 8038b1e: 1ad3 subs r3, r2, r3 - 8038b20: 2bf0 cmp r3, #240 ; 0xf0 - 8038b22: d904 bls.n 8038b2e + 8038b46: 4b59 ldr r3, [pc, #356] ; (8038cac ) + 8038b48: 681a ldr r2, [r3, #0] + 8038b4a: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b4c: 6a1b ldr r3, [r3, #32] + 8038b4e: 1ad3 subs r3, r2, r3 + 8038b50: 2bf0 cmp r3, #240 ; 0xf0 + 8038b52: d904 bls.n 8038b5e ++pcb_remove; - 8038b24: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038b28: 3301 adds r3, #1 - 8038b2a: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038b54: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038b58: 3301 adds r3, #1 + 8038b5a: f887 3027 strb.w r3, [r7, #39] ; 0x27 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in LAST-ACK\n")); } } /* If the PCB should be removed, do it. */ if (pcb_remove) { - 8038b2e: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038b32: 2b00 cmp r3, #0 - 8038b34: d060 beq.n 8038bf8 + 8038b5e: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038b62: 2b00 cmp r3, #0 + 8038b64: d060 beq.n 8038c28 struct tcp_pcb *pcb2; #if LWIP_CALLBACK_API tcp_err_fn err_fn = pcb->errf; - 8038b36: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b38: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8038b3c: 60fb str r3, [r7, #12] + 8038b66: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b68: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8038b6c: 60fb str r3, [r7, #12] #endif /* LWIP_CALLBACK_API */ void *err_arg; enum tcp_state last_state; tcp_pcb_purge(pcb); - 8038b3e: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038b40: f000 fca8 bl 8039494 + 8038b6e: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038b70: f000 fca8 bl 80394c4 /* Remove PCB from tcp_active_pcbs list. */ if (prev != NULL) { - 8038b44: 6abb ldr r3, [r7, #40] ; 0x28 - 8038b46: 2b00 cmp r3, #0 - 8038b48: d010 beq.n 8038b6c + 8038b74: 6abb ldr r3, [r7, #40] ; 0x28 + 8038b76: 2b00 cmp r3, #0 + 8038b78: d010 beq.n 8038b9c LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs); - 8038b4a: 4b50 ldr r3, [pc, #320] ; (8038c8c ) - 8038b4c: 681b ldr r3, [r3, #0] - 8038b4e: 6afa ldr r2, [r7, #44] ; 0x2c - 8038b50: 429a cmp r2, r3 - 8038b52: d106 bne.n 8038b62 - 8038b54: 4b4e ldr r3, [pc, #312] ; (8038c90 ) - 8038b56: f240 526d movw r2, #1389 ; 0x56d - 8038b5a: 494e ldr r1, [pc, #312] ; (8038c94 ) - 8038b5c: 484e ldr r0, [pc, #312] ; (8038c98 ) - 8038b5e: f007 ffbf bl 8040ae0 + 8038b7a: 4b50 ldr r3, [pc, #320] ; (8038cbc ) + 8038b7c: 681b ldr r3, [r3, #0] + 8038b7e: 6afa ldr r2, [r7, #44] ; 0x2c + 8038b80: 429a cmp r2, r3 + 8038b82: d106 bne.n 8038b92 + 8038b84: 4b4e ldr r3, [pc, #312] ; (8038cc0 ) + 8038b86: f240 526d movw r2, #1389 ; 0x56d + 8038b8a: 494e ldr r1, [pc, #312] ; (8038cc4 ) + 8038b8c: 484e ldr r0, [pc, #312] ; (8038cc8 ) + 8038b8e: f007 ffbf bl 8040b10 prev->next = pcb->next; - 8038b62: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b64: 68da ldr r2, [r3, #12] - 8038b66: 6abb ldr r3, [r7, #40] ; 0x28 - 8038b68: 60da str r2, [r3, #12] - 8038b6a: e00f b.n 8038b8c + 8038b92: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b94: 68da ldr r2, [r3, #12] + 8038b96: 6abb ldr r3, [r7, #40] ; 0x28 + 8038b98: 60da str r2, [r3, #12] + 8038b9a: e00f b.n 8038bbc } else { /* This PCB was the first. */ LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb); - 8038b6c: 4b47 ldr r3, [pc, #284] ; (8038c8c ) - 8038b6e: 681b ldr r3, [r3, #0] - 8038b70: 6afa ldr r2, [r7, #44] ; 0x2c - 8038b72: 429a cmp r2, r3 - 8038b74: d006 beq.n 8038b84 - 8038b76: 4b46 ldr r3, [pc, #280] ; (8038c90 ) - 8038b78: f240 5271 movw r2, #1393 ; 0x571 - 8038b7c: 4947 ldr r1, [pc, #284] ; (8038c9c ) - 8038b7e: 4846 ldr r0, [pc, #280] ; (8038c98 ) - 8038b80: f007 ffae bl 8040ae0 + 8038b9c: 4b47 ldr r3, [pc, #284] ; (8038cbc ) + 8038b9e: 681b ldr r3, [r3, #0] + 8038ba0: 6afa ldr r2, [r7, #44] ; 0x2c + 8038ba2: 429a cmp r2, r3 + 8038ba4: d006 beq.n 8038bb4 + 8038ba6: 4b46 ldr r3, [pc, #280] ; (8038cc0 ) + 8038ba8: f240 5271 movw r2, #1393 ; 0x571 + 8038bac: 4947 ldr r1, [pc, #284] ; (8038ccc ) + 8038bae: 4846 ldr r0, [pc, #280] ; (8038cc8 ) + 8038bb0: f007 ffae bl 8040b10 tcp_active_pcbs = pcb->next; - 8038b84: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b86: 68db ldr r3, [r3, #12] - 8038b88: 4a40 ldr r2, [pc, #256] ; (8038c8c ) - 8038b8a: 6013 str r3, [r2, #0] + 8038bb4: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bb6: 68db ldr r3, [r3, #12] + 8038bb8: 4a40 ldr r2, [pc, #256] ; (8038cbc ) + 8038bba: 6013 str r3, [r2, #0] } if (pcb_reset) { - 8038b8c: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 - 8038b90: 2b00 cmp r3, #0 - 8038b92: d013 beq.n 8038bbc + 8038bbc: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 + 8038bc0: 2b00 cmp r3, #0 + 8038bc2: d013 beq.n 8038bec tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip, - 8038b94: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b96: 6d18 ldr r0, [r3, #80] ; 0x50 - 8038b98: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b9a: 6a5c ldr r4, [r3, #36] ; 0x24 - 8038b9c: 6afd ldr r5, [r7, #44] ; 0x2c - 8038b9e: 6afb ldr r3, [r7, #44] ; 0x2c - 8038ba0: 3304 adds r3, #4 - 8038ba2: 6afa ldr r2, [r7, #44] ; 0x2c - 8038ba4: 8ad2 ldrh r2, [r2, #22] - 8038ba6: 6af9 ldr r1, [r7, #44] ; 0x2c - 8038ba8: 8b09 ldrh r1, [r1, #24] - 8038baa: 9102 str r1, [sp, #8] - 8038bac: 9201 str r2, [sp, #4] - 8038bae: 9300 str r3, [sp, #0] - 8038bb0: 462b mov r3, r5 - 8038bb2: 4622 mov r2, r4 - 8038bb4: 4601 mov r1, r0 - 8038bb6: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038bb8: f004 fe8c bl 803d8d4 + 8038bc4: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bc6: 6d18 ldr r0, [r3, #80] ; 0x50 + 8038bc8: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bca: 6a5c ldr r4, [r3, #36] ; 0x24 + 8038bcc: 6afd ldr r5, [r7, #44] ; 0x2c + 8038bce: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bd0: 3304 adds r3, #4 + 8038bd2: 6afa ldr r2, [r7, #44] ; 0x2c + 8038bd4: 8ad2 ldrh r2, [r2, #22] + 8038bd6: 6af9 ldr r1, [r7, #44] ; 0x2c + 8038bd8: 8b09 ldrh r1, [r1, #24] + 8038bda: 9102 str r1, [sp, #8] + 8038bdc: 9201 str r2, [sp, #4] + 8038bde: 9300 str r3, [sp, #0] + 8038be0: 462b mov r3, r5 + 8038be2: 4622 mov r2, r4 + 8038be4: 4601 mov r1, r0 + 8038be6: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038be8: f004 fe8c bl 803d904 pcb->local_port, pcb->remote_port); } err_arg = pcb->callback_arg; - 8038bbc: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bbe: 691b ldr r3, [r3, #16] - 8038bc0: 60bb str r3, [r7, #8] + 8038bec: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bee: 691b ldr r3, [r3, #16] + 8038bf0: 60bb str r3, [r7, #8] last_state = pcb->state; - 8038bc2: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bc4: 7d1b ldrb r3, [r3, #20] - 8038bc6: 71fb strb r3, [r7, #7] + 8038bf2: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bf4: 7d1b ldrb r3, [r3, #20] + 8038bf6: 71fb strb r3, [r7, #7] pcb2 = pcb; - 8038bc8: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bca: 603b str r3, [r7, #0] + 8038bf8: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bfa: 603b str r3, [r7, #0] pcb = pcb->next; - 8038bcc: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bce: 68db ldr r3, [r3, #12] - 8038bd0: 62fb str r3, [r7, #44] ; 0x2c + 8038bfc: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bfe: 68db ldr r3, [r3, #12] + 8038c00: 62fb str r3, [r7, #44] ; 0x2c tcp_free(pcb2); - 8038bd2: 6838 ldr r0, [r7, #0] - 8038bd4: f7ff f83a bl 8037c4c + 8038c02: 6838 ldr r0, [r7, #0] + 8038c04: f7ff f83a bl 8037c7c tcp_active_pcbs_changed = 0; - 8038bd8: 4b31 ldr r3, [pc, #196] ; (8038ca0 ) - 8038bda: 2200 movs r2, #0 - 8038bdc: 701a strb r2, [r3, #0] + 8038c08: 4b31 ldr r3, [pc, #196] ; (8038cd0 ) + 8038c0a: 2200 movs r2, #0 + 8038c0c: 701a strb r2, [r3, #0] TCP_EVENT_ERR(last_state, err_fn, err_arg, ERR_ABRT); - 8038bde: 68fb ldr r3, [r7, #12] - 8038be0: 2b00 cmp r3, #0 - 8038be2: d004 beq.n 8038bee - 8038be4: 68fb ldr r3, [r7, #12] - 8038be6: f06f 010c mvn.w r1, #12 - 8038bea: 68b8 ldr r0, [r7, #8] - 8038bec: 4798 blx r3 + 8038c0e: 68fb ldr r3, [r7, #12] + 8038c10: 2b00 cmp r3, #0 + 8038c12: d004 beq.n 8038c1e + 8038c14: 68fb ldr r3, [r7, #12] + 8038c16: f06f 010c mvn.w r1, #12 + 8038c1a: 68b8 ldr r0, [r7, #8] + 8038c1c: 4798 blx r3 if (tcp_active_pcbs_changed) { - 8038bee: 4b2c ldr r3, [pc, #176] ; (8038ca0 ) - 8038bf0: 781b ldrb r3, [r3, #0] - 8038bf2: 2b00 cmp r3, #0 - 8038bf4: d037 beq.n 8038c66 + 8038c1e: 4b2c ldr r3, [pc, #176] ; (8038cd0 ) + 8038c20: 781b ldrb r3, [r3, #0] + 8038c22: 2b00 cmp r3, #0 + 8038c24: d037 beq.n 8038c96 goto tcp_slowtmr_start; - 8038bf6: e592 b.n 803871e + 8038c26: e592 b.n 803874e } } else { /* get the 'next' element now and work with 'prev' below (in case of abort) */ prev = pcb; - 8038bf8: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bfa: 62bb str r3, [r7, #40] ; 0x28 + 8038c28: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c2a: 62bb str r3, [r7, #40] ; 0x28 pcb = pcb->next; - 8038bfc: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bfe: 68db ldr r3, [r3, #12] - 8038c00: 62fb str r3, [r7, #44] ; 0x2c + 8038c2c: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c2e: 68db ldr r3, [r3, #12] + 8038c30: 62fb str r3, [r7, #44] ; 0x2c /* We check if we should poll the connection. */ ++prev->polltmr; - 8038c02: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c04: 7f1b ldrb r3, [r3, #28] - 8038c06: 3301 adds r3, #1 - 8038c08: b2da uxtb r2, r3 - 8038c0a: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c0c: 771a strb r2, [r3, #28] + 8038c32: 6abb ldr r3, [r7, #40] ; 0x28 + 8038c34: 7f1b ldrb r3, [r3, #28] + 8038c36: 3301 adds r3, #1 + 8038c38: b2da uxtb r2, r3 + 8038c3a: 6abb ldr r3, [r7, #40] ; 0x28 + 8038c3c: 771a strb r2, [r3, #28] if (prev->polltmr >= prev->pollinterval) { - 8038c0e: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c10: 7f1a ldrb r2, [r3, #28] - 8038c12: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c14: 7f5b ldrb r3, [r3, #29] - 8038c16: 429a cmp r2, r3 - 8038c18: d325 bcc.n 8038c66 + 8038c3e: 6abb ldr r3, [r7, #40] ; 0x28 + 8038c40: 7f1a ldrb r2, [r3, #28] + 8038c42: 6abb ldr r3, [r7, #40] ; 0x28 + 8038c44: 7f5b ldrb r3, [r3, #29] + 8038c46: 429a cmp r2, r3 + 8038c48: d325 bcc.n 8038c96 prev->polltmr = 0; - 8038c1a: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c1c: 2200 movs r2, #0 - 8038c1e: 771a strb r2, [r3, #28] + 8038c4a: 6abb ldr r3, [r7, #40] ; 0x28 + 8038c4c: 2200 movs r2, #0 + 8038c4e: 771a strb r2, [r3, #28] LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n")); tcp_active_pcbs_changed = 0; - 8038c20: 4b1f ldr r3, [pc, #124] ; (8038ca0 ) - 8038c22: 2200 movs r2, #0 - 8038c24: 701a strb r2, [r3, #0] + 8038c50: 4b1f ldr r3, [pc, #124] ; (8038cd0 ) + 8038c52: 2200 movs r2, #0 + 8038c54: 701a strb r2, [r3, #0] TCP_EVENT_POLL(prev, err); - 8038c26: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c28: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8038c2c: 2b00 cmp r3, #0 - 8038c2e: d00b beq.n 8038c48 - 8038c30: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c32: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8038c36: 6aba ldr r2, [r7, #40] ; 0x28 - 8038c38: 6912 ldr r2, [r2, #16] - 8038c3a: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8038c3c: 4610 mov r0, r2 - 8038c3e: 4798 blx r3 - 8038c40: 4603 mov r3, r0 - 8038c42: f887 3025 strb.w r3, [r7, #37] ; 0x25 - 8038c46: e002 b.n 8038c4e - 8038c48: 2300 movs r3, #0 - 8038c4a: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 8038c56: 6abb ldr r3, [r7, #40] ; 0x28 + 8038c58: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8038c5c: 2b00 cmp r3, #0 + 8038c5e: d00b beq.n 8038c78 + 8038c60: 6abb ldr r3, [r7, #40] ; 0x28 + 8038c62: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8038c66: 6aba ldr r2, [r7, #40] ; 0x28 + 8038c68: 6912 ldr r2, [r2, #16] + 8038c6a: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8038c6c: 4610 mov r0, r2 + 8038c6e: 4798 blx r3 + 8038c70: 4603 mov r3, r0 + 8038c72: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 8038c76: e002 b.n 8038c7e + 8038c78: 2300 movs r3, #0 + 8038c7a: f887 3025 strb.w r3, [r7, #37] ; 0x25 if (tcp_active_pcbs_changed) { - 8038c4e: 4b14 ldr r3, [pc, #80] ; (8038ca0 ) - 8038c50: 781b ldrb r3, [r3, #0] - 8038c52: 2b00 cmp r3, #0 - 8038c54: d000 beq.n 8038c58 + 8038c7e: 4b14 ldr r3, [pc, #80] ; (8038cd0 ) + 8038c80: 781b ldrb r3, [r3, #0] + 8038c82: 2b00 cmp r3, #0 + 8038c84: d000 beq.n 8038c88 goto tcp_slowtmr_start; - 8038c56: e562 b.n 803871e + 8038c86: e562 b.n 803874e } /* if err == ERR_ABRT, 'prev' is already deallocated */ if (err == ERR_OK) { - 8038c58: f997 3025 ldrsb.w r3, [r7, #37] ; 0x25 - 8038c5c: 2b00 cmp r3, #0 - 8038c5e: d102 bne.n 8038c66 + 8038c88: f997 3025 ldrsb.w r3, [r7, #37] ; 0x25 + 8038c8c: 2b00 cmp r3, #0 + 8038c8e: d102 bne.n 8038c96 tcp_output(prev); - 8038c60: 6ab8 ldr r0, [r7, #40] ; 0x28 - 8038c62: f004 f883 bl 803cd6c + 8038c90: 6ab8 ldr r0, [r7, #40] ; 0x28 + 8038c92: f004 f883 bl 803cd9c while (pcb != NULL) { - 8038c66: 6afb ldr r3, [r7, #44] ; 0x2c - 8038c68: 2b00 cmp r3, #0 - 8038c6a: f47f ad5e bne.w 803872a + 8038c96: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c98: 2b00 cmp r3, #0 + 8038c9a: f47f ad5e bne.w 803875a } } /* Steps through all of the TIME-WAIT PCBs. */ prev = NULL; - 8038c6e: 2300 movs r3, #0 - 8038c70: 62bb str r3, [r7, #40] ; 0x28 + 8038c9e: 2300 movs r3, #0 + 8038ca0: 62bb str r3, [r7, #40] ; 0x28 pcb = tcp_tw_pcbs; - 8038c72: 4b0c ldr r3, [pc, #48] ; (8038ca4 ) - 8038c74: 681b ldr r3, [r3, #0] - 8038c76: 62fb str r3, [r7, #44] ; 0x2c + 8038ca2: 4b0c ldr r3, [pc, #48] ; (8038cd4 ) + 8038ca4: 681b ldr r3, [r3, #0] + 8038ca6: 62fb str r3, [r7, #44] ; 0x2c while (pcb != NULL) { - 8038c78: e069 b.n 8038d4e - 8038c7a: bf00 nop - 8038c7c: 2400e958 .word 0x2400e958 - 8038c80: 000a4cb8 .word 0x000a4cb8 - 8038c84: 10624dd3 .word 0x10624dd3 - 8038c88: 000124f8 .word 0x000124f8 - 8038c8c: 2400e964 .word 0x2400e964 - 8038c90: 08042d68 .word 0x08042d68 - 8038c94: 080431a0 .word 0x080431a0 - 8038c98: 08042dac .word 0x08042dac - 8038c9c: 080431cc .word 0x080431cc - 8038ca0: 2400e96c .word 0x2400e96c - 8038ca4: 2400e968 .word 0x2400e968 + 8038ca8: e069 b.n 8038d7e + 8038caa: bf00 nop + 8038cac: 2400e958 .word 0x2400e958 + 8038cb0: 000a4cb8 .word 0x000a4cb8 + 8038cb4: 10624dd3 .word 0x10624dd3 + 8038cb8: 000124f8 .word 0x000124f8 + 8038cbc: 2400e964 .word 0x2400e964 + 8038cc0: 08042d98 .word 0x08042d98 + 8038cc4: 080431d0 .word 0x080431d0 + 8038cc8: 08042ddc .word 0x08042ddc + 8038ccc: 080431fc .word 0x080431fc + 8038cd0: 2400e96c .word 0x2400e96c + 8038cd4: 2400e968 .word 0x2400e968 LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - 8038ca8: 6afb ldr r3, [r7, #44] ; 0x2c - 8038caa: 7d1b ldrb r3, [r3, #20] - 8038cac: 2b0a cmp r3, #10 - 8038cae: d006 beq.n 8038cbe - 8038cb0: 4b2b ldr r3, [pc, #172] ; (8038d60 ) - 8038cb2: f240 52a1 movw r2, #1441 ; 0x5a1 - 8038cb6: 492b ldr r1, [pc, #172] ; (8038d64 ) - 8038cb8: 482b ldr r0, [pc, #172] ; (8038d68 ) - 8038cba: f007 ff11 bl 8040ae0 + 8038cd8: 6afb ldr r3, [r7, #44] ; 0x2c + 8038cda: 7d1b ldrb r3, [r3, #20] + 8038cdc: 2b0a cmp r3, #10 + 8038cde: d006 beq.n 8038cee + 8038ce0: 4b2b ldr r3, [pc, #172] ; (8038d90 ) + 8038ce2: f240 52a1 movw r2, #1441 ; 0x5a1 + 8038ce6: 492b ldr r1, [pc, #172] ; (8038d94 ) + 8038ce8: 482b ldr r0, [pc, #172] ; (8038d98 ) + 8038cea: f007 ff11 bl 8040b10 pcb_remove = 0; - 8038cbe: 2300 movs r3, #0 - 8038cc0: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038cee: 2300 movs r3, #0 + 8038cf0: f887 3027 strb.w r3, [r7, #39] ; 0x27 /* Check if this PCB has stayed long enough in TIME-WAIT */ if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { - 8038cc4: 4b29 ldr r3, [pc, #164] ; (8038d6c ) - 8038cc6: 681a ldr r2, [r3, #0] - 8038cc8: 6afb ldr r3, [r7, #44] ; 0x2c - 8038cca: 6a1b ldr r3, [r3, #32] - 8038ccc: 1ad3 subs r3, r2, r3 - 8038cce: 2bf0 cmp r3, #240 ; 0xf0 - 8038cd0: d904 bls.n 8038cdc + 8038cf4: 4b29 ldr r3, [pc, #164] ; (8038d9c ) + 8038cf6: 681a ldr r2, [r3, #0] + 8038cf8: 6afb ldr r3, [r7, #44] ; 0x2c + 8038cfa: 6a1b ldr r3, [r3, #32] + 8038cfc: 1ad3 subs r3, r2, r3 + 8038cfe: 2bf0 cmp r3, #240 ; 0xf0 + 8038d00: d904 bls.n 8038d0c ++pcb_remove; - 8038cd2: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038cd6: 3301 adds r3, #1 - 8038cd8: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038d02: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038d06: 3301 adds r3, #1 + 8038d08: f887 3027 strb.w r3, [r7, #39] ; 0x27 } /* If the PCB should be removed, do it. */ if (pcb_remove) { - 8038cdc: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038ce0: 2b00 cmp r3, #0 - 8038ce2: d02f beq.n 8038d44 + 8038d0c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038d10: 2b00 cmp r3, #0 + 8038d12: d02f beq.n 8038d74 struct tcp_pcb *pcb2; tcp_pcb_purge(pcb); - 8038ce4: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038ce6: f000 fbd5 bl 8039494 + 8038d14: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038d16: f000 fbd5 bl 80394c4 /* Remove PCB from tcp_tw_pcbs list. */ if (prev != NULL) { - 8038cea: 6abb ldr r3, [r7, #40] ; 0x28 - 8038cec: 2b00 cmp r3, #0 - 8038cee: d010 beq.n 8038d12 + 8038d1a: 6abb ldr r3, [r7, #40] ; 0x28 + 8038d1c: 2b00 cmp r3, #0 + 8038d1e: d010 beq.n 8038d42 LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs); - 8038cf0: 4b1f ldr r3, [pc, #124] ; (8038d70 ) - 8038cf2: 681b ldr r3, [r3, #0] - 8038cf4: 6afa ldr r2, [r7, #44] ; 0x2c - 8038cf6: 429a cmp r2, r3 - 8038cf8: d106 bne.n 8038d08 - 8038cfa: 4b19 ldr r3, [pc, #100] ; (8038d60 ) - 8038cfc: f240 52af movw r2, #1455 ; 0x5af - 8038d00: 491c ldr r1, [pc, #112] ; (8038d74 ) - 8038d02: 4819 ldr r0, [pc, #100] ; (8038d68 ) - 8038d04: f007 feec bl 8040ae0 + 8038d20: 4b1f ldr r3, [pc, #124] ; (8038da0 ) + 8038d22: 681b ldr r3, [r3, #0] + 8038d24: 6afa ldr r2, [r7, #44] ; 0x2c + 8038d26: 429a cmp r2, r3 + 8038d28: d106 bne.n 8038d38 + 8038d2a: 4b19 ldr r3, [pc, #100] ; (8038d90 ) + 8038d2c: f240 52af movw r2, #1455 ; 0x5af + 8038d30: 491c ldr r1, [pc, #112] ; (8038da4 ) + 8038d32: 4819 ldr r0, [pc, #100] ; (8038d98 ) + 8038d34: f007 feec bl 8040b10 prev->next = pcb->next; - 8038d08: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d0a: 68da ldr r2, [r3, #12] - 8038d0c: 6abb ldr r3, [r7, #40] ; 0x28 - 8038d0e: 60da str r2, [r3, #12] - 8038d10: e00f b.n 8038d32 + 8038d38: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d3a: 68da ldr r2, [r3, #12] + 8038d3c: 6abb ldr r3, [r7, #40] ; 0x28 + 8038d3e: 60da str r2, [r3, #12] + 8038d40: e00f b.n 8038d62 } else { /* This PCB was the first. */ LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb); - 8038d12: 4b17 ldr r3, [pc, #92] ; (8038d70 ) - 8038d14: 681b ldr r3, [r3, #0] - 8038d16: 6afa ldr r2, [r7, #44] ; 0x2c - 8038d18: 429a cmp r2, r3 - 8038d1a: d006 beq.n 8038d2a - 8038d1c: 4b10 ldr r3, [pc, #64] ; (8038d60 ) - 8038d1e: f240 52b3 movw r2, #1459 ; 0x5b3 - 8038d22: 4915 ldr r1, [pc, #84] ; (8038d78 ) - 8038d24: 4810 ldr r0, [pc, #64] ; (8038d68 ) - 8038d26: f007 fedb bl 8040ae0 + 8038d42: 4b17 ldr r3, [pc, #92] ; (8038da0 ) + 8038d44: 681b ldr r3, [r3, #0] + 8038d46: 6afa ldr r2, [r7, #44] ; 0x2c + 8038d48: 429a cmp r2, r3 + 8038d4a: d006 beq.n 8038d5a + 8038d4c: 4b10 ldr r3, [pc, #64] ; (8038d90 ) + 8038d4e: f240 52b3 movw r2, #1459 ; 0x5b3 + 8038d52: 4915 ldr r1, [pc, #84] ; (8038da8 ) + 8038d54: 4810 ldr r0, [pc, #64] ; (8038d98 ) + 8038d56: f007 fedb bl 8040b10 tcp_tw_pcbs = pcb->next; - 8038d2a: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d2c: 68db ldr r3, [r3, #12] - 8038d2e: 4a10 ldr r2, [pc, #64] ; (8038d70 ) - 8038d30: 6013 str r3, [r2, #0] + 8038d5a: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d5c: 68db ldr r3, [r3, #12] + 8038d5e: 4a10 ldr r2, [pc, #64] ; (8038da0 ) + 8038d60: 6013 str r3, [r2, #0] } pcb2 = pcb; - 8038d32: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d34: 61fb str r3, [r7, #28] + 8038d62: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d64: 61fb str r3, [r7, #28] pcb = pcb->next; - 8038d36: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d38: 68db ldr r3, [r3, #12] - 8038d3a: 62fb str r3, [r7, #44] ; 0x2c + 8038d66: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d68: 68db ldr r3, [r3, #12] + 8038d6a: 62fb str r3, [r7, #44] ; 0x2c tcp_free(pcb2); - 8038d3c: 69f8 ldr r0, [r7, #28] - 8038d3e: f7fe ff85 bl 8037c4c - 8038d42: e004 b.n 8038d4e + 8038d6c: 69f8 ldr r0, [r7, #28] + 8038d6e: f7fe ff85 bl 8037c7c + 8038d72: e004 b.n 8038d7e } else { prev = pcb; - 8038d44: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d46: 62bb str r3, [r7, #40] ; 0x28 + 8038d74: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d76: 62bb str r3, [r7, #40] ; 0x28 pcb = pcb->next; - 8038d48: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d4a: 68db ldr r3, [r3, #12] - 8038d4c: 62fb str r3, [r7, #44] ; 0x2c + 8038d78: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d7a: 68db ldr r3, [r3, #12] + 8038d7c: 62fb str r3, [r7, #44] ; 0x2c while (pcb != NULL) { - 8038d4e: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d50: 2b00 cmp r3, #0 - 8038d52: d1a9 bne.n 8038ca8 + 8038d7e: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d80: 2b00 cmp r3, #0 + 8038d82: d1a9 bne.n 8038cd8 } } } - 8038d54: bf00 nop - 8038d56: bf00 nop - 8038d58: 3730 adds r7, #48 ; 0x30 - 8038d5a: 46bd mov sp, r7 - 8038d5c: bdb0 pop {r4, r5, r7, pc} - 8038d5e: bf00 nop - 8038d60: 08042d68 .word 0x08042d68 - 8038d64: 080431f8 .word 0x080431f8 - 8038d68: 08042dac .word 0x08042dac - 8038d6c: 2400e958 .word 0x2400e958 - 8038d70: 2400e968 .word 0x2400e968 - 8038d74: 08043228 .word 0x08043228 - 8038d78: 08043250 .word 0x08043250 - -08038d7c : + 8038d84: bf00 nop + 8038d86: bf00 nop + 8038d88: 3730 adds r7, #48 ; 0x30 + 8038d8a: 46bd mov sp, r7 + 8038d8c: bdb0 pop {r4, r5, r7, pc} + 8038d8e: bf00 nop + 8038d90: 08042d98 .word 0x08042d98 + 8038d94: 08043228 .word 0x08043228 + 8038d98: 08042ddc .word 0x08042ddc + 8038d9c: 2400e958 .word 0x2400e958 + 8038da0: 2400e968 .word 0x2400e968 + 8038da4: 08043258 .word 0x08043258 + 8038da8: 08043280 .word 0x08043280 + +08038dac : * * Automatically called from tcp_tmr(). */ void tcp_fasttmr(void) { - 8038d7c: b580 push {r7, lr} - 8038d7e: b082 sub sp, #8 - 8038d80: af00 add r7, sp, #0 + 8038dac: b580 push {r7, lr} + 8038dae: b082 sub sp, #8 + 8038db0: af00 add r7, sp, #0 struct tcp_pcb *pcb; ++tcp_timer_ctr; - 8038d82: 4b2d ldr r3, [pc, #180] ; (8038e38 ) - 8038d84: 781b ldrb r3, [r3, #0] - 8038d86: 3301 adds r3, #1 - 8038d88: b2da uxtb r2, r3 - 8038d8a: 4b2b ldr r3, [pc, #172] ; (8038e38 ) - 8038d8c: 701a strb r2, [r3, #0] + 8038db2: 4b2d ldr r3, [pc, #180] ; (8038e68 ) + 8038db4: 781b ldrb r3, [r3, #0] + 8038db6: 3301 adds r3, #1 + 8038db8: b2da uxtb r2, r3 + 8038dba: 4b2b ldr r3, [pc, #172] ; (8038e68 ) + 8038dbc: 701a strb r2, [r3, #0] tcp_fasttmr_start: pcb = tcp_active_pcbs; - 8038d8e: 4b2b ldr r3, [pc, #172] ; (8038e3c ) - 8038d90: 681b ldr r3, [r3, #0] - 8038d92: 607b str r3, [r7, #4] + 8038dbe: 4b2b ldr r3, [pc, #172] ; (8038e6c ) + 8038dc0: 681b ldr r3, [r3, #0] + 8038dc2: 607b str r3, [r7, #4] while (pcb != NULL) { - 8038d94: e048 b.n 8038e28 + 8038dc4: e048 b.n 8038e58 if (pcb->last_timer != tcp_timer_ctr) { - 8038d96: 687b ldr r3, [r7, #4] - 8038d98: 7f9a ldrb r2, [r3, #30] - 8038d9a: 4b27 ldr r3, [pc, #156] ; (8038e38 ) - 8038d9c: 781b ldrb r3, [r3, #0] - 8038d9e: 429a cmp r2, r3 - 8038da0: d03f beq.n 8038e22 + 8038dc6: 687b ldr r3, [r7, #4] + 8038dc8: 7f9a ldrb r2, [r3, #30] + 8038dca: 4b27 ldr r3, [pc, #156] ; (8038e68 ) + 8038dcc: 781b ldrb r3, [r3, #0] + 8038dce: 429a cmp r2, r3 + 8038dd0: d03f beq.n 8038e52 struct tcp_pcb *next; pcb->last_timer = tcp_timer_ctr; - 8038da2: 4b25 ldr r3, [pc, #148] ; (8038e38 ) - 8038da4: 781a ldrb r2, [r3, #0] - 8038da6: 687b ldr r3, [r7, #4] - 8038da8: 779a strb r2, [r3, #30] + 8038dd2: 4b25 ldr r3, [pc, #148] ; (8038e68 ) + 8038dd4: 781a ldrb r2, [r3, #0] + 8038dd6: 687b ldr r3, [r7, #4] + 8038dd8: 779a strb r2, [r3, #30] /* send delayed ACKs */ if (pcb->flags & TF_ACK_DELAY) { - 8038daa: 687b ldr r3, [r7, #4] - 8038dac: 8b5b ldrh r3, [r3, #26] - 8038dae: f003 0301 and.w r3, r3, #1 - 8038db2: 2b00 cmp r3, #0 - 8038db4: d010 beq.n 8038dd8 + 8038dda: 687b ldr r3, [r7, #4] + 8038ddc: 8b5b ldrh r3, [r3, #26] + 8038dde: f003 0301 and.w r3, r3, #1 + 8038de2: 2b00 cmp r3, #0 + 8038de4: d010 beq.n 8038e08 LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n")); tcp_ack_now(pcb); - 8038db6: 687b ldr r3, [r7, #4] - 8038db8: 8b5b ldrh r3, [r3, #26] - 8038dba: f043 0302 orr.w r3, r3, #2 - 8038dbe: b29a uxth r2, r3 - 8038dc0: 687b ldr r3, [r7, #4] - 8038dc2: 835a strh r2, [r3, #26] + 8038de6: 687b ldr r3, [r7, #4] + 8038de8: 8b5b ldrh r3, [r3, #26] + 8038dea: f043 0302 orr.w r3, r3, #2 + 8038dee: b29a uxth r2, r3 + 8038df0: 687b ldr r3, [r7, #4] + 8038df2: 835a strh r2, [r3, #26] tcp_output(pcb); - 8038dc4: 6878 ldr r0, [r7, #4] - 8038dc6: f003 ffd1 bl 803cd6c + 8038df4: 6878 ldr r0, [r7, #4] + 8038df6: f003 ffd1 bl 803cd9c tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 8038dca: 687b ldr r3, [r7, #4] - 8038dcc: 8b5b ldrh r3, [r3, #26] - 8038dce: f023 0303 bic.w r3, r3, #3 - 8038dd2: b29a uxth r2, r3 - 8038dd4: 687b ldr r3, [r7, #4] - 8038dd6: 835a strh r2, [r3, #26] + 8038dfa: 687b ldr r3, [r7, #4] + 8038dfc: 8b5b ldrh r3, [r3, #26] + 8038dfe: f023 0303 bic.w r3, r3, #3 + 8038e02: b29a uxth r2, r3 + 8038e04: 687b ldr r3, [r7, #4] + 8038e06: 835a strh r2, [r3, #26] } /* send pending FIN */ if (pcb->flags & TF_CLOSEPEND) { - 8038dd8: 687b ldr r3, [r7, #4] - 8038dda: 8b5b ldrh r3, [r3, #26] - 8038ddc: f003 0308 and.w r3, r3, #8 - 8038de0: 2b00 cmp r3, #0 - 8038de2: d009 beq.n 8038df8 + 8038e08: 687b ldr r3, [r7, #4] + 8038e0a: 8b5b ldrh r3, [r3, #26] + 8038e0c: f003 0308 and.w r3, r3, #8 + 8038e10: 2b00 cmp r3, #0 + 8038e12: d009 beq.n 8038e28 LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: pending FIN\n")); tcp_clear_flags(pcb, TF_CLOSEPEND); - 8038de4: 687b ldr r3, [r7, #4] - 8038de6: 8b5b ldrh r3, [r3, #26] - 8038de8: f023 0308 bic.w r3, r3, #8 - 8038dec: b29a uxth r2, r3 - 8038dee: 687b ldr r3, [r7, #4] - 8038df0: 835a strh r2, [r3, #26] + 8038e14: 687b ldr r3, [r7, #4] + 8038e16: 8b5b ldrh r3, [r3, #26] + 8038e18: f023 0308 bic.w r3, r3, #8 + 8038e1c: b29a uxth r2, r3 + 8038e1e: 687b ldr r3, [r7, #4] + 8038e20: 835a strh r2, [r3, #26] tcp_close_shutdown_fin(pcb); - 8038df2: 6878 ldr r0, [r7, #4] - 8038df4: f7ff f8be bl 8037f74 + 8038e22: 6878 ldr r0, [r7, #4] + 8038e24: f7ff f8be bl 8037fa4 } next = pcb->next; - 8038df8: 687b ldr r3, [r7, #4] - 8038dfa: 68db ldr r3, [r3, #12] - 8038dfc: 603b str r3, [r7, #0] + 8038e28: 687b ldr r3, [r7, #4] + 8038e2a: 68db ldr r3, [r3, #12] + 8038e2c: 603b str r3, [r7, #0] /* If there is data which was previously "refused" by upper layer */ if (pcb->refused_data != NULL) { - 8038dfe: 687b ldr r3, [r7, #4] - 8038e00: 6f9b ldr r3, [r3, #120] ; 0x78 - 8038e02: 2b00 cmp r3, #0 - 8038e04: d00a beq.n 8038e1c + 8038e2e: 687b ldr r3, [r7, #4] + 8038e30: 6f9b ldr r3, [r3, #120] ; 0x78 + 8038e32: 2b00 cmp r3, #0 + 8038e34: d00a beq.n 8038e4c tcp_active_pcbs_changed = 0; - 8038e06: 4b0e ldr r3, [pc, #56] ; (8038e40 ) - 8038e08: 2200 movs r2, #0 - 8038e0a: 701a strb r2, [r3, #0] + 8038e36: 4b0e ldr r3, [pc, #56] ; (8038e70 ) + 8038e38: 2200 movs r2, #0 + 8038e3a: 701a strb r2, [r3, #0] tcp_process_refused_data(pcb); - 8038e0c: 6878 ldr r0, [r7, #4] - 8038e0e: f000 f819 bl 8038e44 + 8038e3c: 6878 ldr r0, [r7, #4] + 8038e3e: f000 f819 bl 8038e74 if (tcp_active_pcbs_changed) { - 8038e12: 4b0b ldr r3, [pc, #44] ; (8038e40 ) - 8038e14: 781b ldrb r3, [r3, #0] - 8038e16: 2b00 cmp r3, #0 - 8038e18: d000 beq.n 8038e1c + 8038e42: 4b0b ldr r3, [pc, #44] ; (8038e70 ) + 8038e44: 781b ldrb r3, [r3, #0] + 8038e46: 2b00 cmp r3, #0 + 8038e48: d000 beq.n 8038e4c /* application callback has changed the pcb list: restart the loop */ goto tcp_fasttmr_start; - 8038e1a: e7b8 b.n 8038d8e + 8038e4a: e7b8 b.n 8038dbe } } pcb = next; - 8038e1c: 683b ldr r3, [r7, #0] - 8038e1e: 607b str r3, [r7, #4] - 8038e20: e002 b.n 8038e28 + 8038e4c: 683b ldr r3, [r7, #0] + 8038e4e: 607b str r3, [r7, #4] + 8038e50: e002 b.n 8038e58 } else { pcb = pcb->next; - 8038e22: 687b ldr r3, [r7, #4] - 8038e24: 68db ldr r3, [r3, #12] - 8038e26: 607b str r3, [r7, #4] + 8038e52: 687b ldr r3, [r7, #4] + 8038e54: 68db ldr r3, [r3, #12] + 8038e56: 607b str r3, [r7, #4] while (pcb != NULL) { - 8038e28: 687b ldr r3, [r7, #4] - 8038e2a: 2b00 cmp r3, #0 - 8038e2c: d1b3 bne.n 8038d96 + 8038e58: 687b ldr r3, [r7, #4] + 8038e5a: 2b00 cmp r3, #0 + 8038e5c: d1b3 bne.n 8038dc6 } } } - 8038e2e: bf00 nop - 8038e30: bf00 nop - 8038e32: 3708 adds r7, #8 - 8038e34: 46bd mov sp, r7 - 8038e36: bd80 pop {r7, pc} - 8038e38: 2400e96e .word 0x2400e96e - 8038e3c: 2400e964 .word 0x2400e964 - 8038e40: 2400e96c .word 0x2400e96c + 8038e5e: bf00 nop + 8038e60: bf00 nop + 8038e62: 3708 adds r7, #8 + 8038e64: 46bd mov sp, r7 + 8038e66: bd80 pop {r7, pc} + 8038e68: 2400e96e .word 0x2400e96e + 8038e6c: 2400e964 .word 0x2400e964 + 8038e70: 2400e96c .word 0x2400e96c -08038e44 : +08038e74 : } /** Pass pcb->refused_data to the recv callback */ err_t tcp_process_refused_data(struct tcp_pcb *pcb) { - 8038e44: b590 push {r4, r7, lr} - 8038e46: b085 sub sp, #20 - 8038e48: af00 add r7, sp, #0 - 8038e4a: 6078 str r0, [r7, #4] + 8038e74: b590 push {r4, r7, lr} + 8038e76: b085 sub sp, #20 + 8038e78: af00 add r7, sp, #0 + 8038e7a: 6078 str r0, [r7, #4] #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE struct pbuf *rest; #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ LWIP_ERROR("tcp_process_refused_data: invalid pcb", pcb != NULL, return ERR_ARG); - 8038e4c: 687b ldr r3, [r7, #4] - 8038e4e: 2b00 cmp r3, #0 - 8038e50: d109 bne.n 8038e66 - 8038e52: 4b37 ldr r3, [pc, #220] ; (8038f30 ) - 8038e54: f240 6209 movw r2, #1545 ; 0x609 - 8038e58: 4936 ldr r1, [pc, #216] ; (8038f34 ) - 8038e5a: 4837 ldr r0, [pc, #220] ; (8038f38 ) - 8038e5c: f007 fe40 bl 8040ae0 - 8038e60: f06f 030f mvn.w r3, #15 - 8038e64: e060 b.n 8038f28 + 8038e7c: 687b ldr r3, [r7, #4] + 8038e7e: 2b00 cmp r3, #0 + 8038e80: d109 bne.n 8038e96 + 8038e82: 4b37 ldr r3, [pc, #220] ; (8038f60 ) + 8038e84: f240 6209 movw r2, #1545 ; 0x609 + 8038e88: 4936 ldr r1, [pc, #216] ; (8038f64 ) + 8038e8a: 4837 ldr r0, [pc, #220] ; (8038f68 ) + 8038e8c: f007 fe40 bl 8040b10 + 8038e90: f06f 030f mvn.w r3, #15 + 8038e94: e060 b.n 8038f58 #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE while (pcb->refused_data != NULL) #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ { err_t err; u8_t refused_flags = pcb->refused_data->flags; - 8038e66: 687b ldr r3, [r7, #4] - 8038e68: 6f9b ldr r3, [r3, #120] ; 0x78 - 8038e6a: 7b5b ldrb r3, [r3, #13] - 8038e6c: 73bb strb r3, [r7, #14] + 8038e96: 687b ldr r3, [r7, #4] + 8038e98: 6f9b ldr r3, [r3, #120] ; 0x78 + 8038e9a: 7b5b ldrb r3, [r3, #13] + 8038e9c: 73bb strb r3, [r7, #14] /* set pcb->refused_data to NULL in case the callback frees it and then closes the pcb */ struct pbuf *refused_data = pcb->refused_data; - 8038e6e: 687b ldr r3, [r7, #4] - 8038e70: 6f9b ldr r3, [r3, #120] ; 0x78 - 8038e72: 60bb str r3, [r7, #8] + 8038e9e: 687b ldr r3, [r7, #4] + 8038ea0: 6f9b ldr r3, [r3, #120] ; 0x78 + 8038ea2: 60bb str r3, [r7, #8] #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE pbuf_split_64k(refused_data, &rest); pcb->refused_data = rest; #else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ pcb->refused_data = NULL; - 8038e74: 687b ldr r3, [r7, #4] - 8038e76: 2200 movs r2, #0 - 8038e78: 679a str r2, [r3, #120] ; 0x78 + 8038ea4: 687b ldr r3, [r7, #4] + 8038ea6: 2200 movs r2, #0 + 8038ea8: 679a str r2, [r3, #120] ; 0x78 #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ /* Notify again application with data previously received. */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n")); TCP_EVENT_RECV(pcb, refused_data, ERR_OK, err); - 8038e7a: 687b ldr r3, [r7, #4] - 8038e7c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8038e80: 2b00 cmp r3, #0 - 8038e82: d00b beq.n 8038e9c - 8038e84: 687b ldr r3, [r7, #4] - 8038e86: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 - 8038e8a: 687b ldr r3, [r7, #4] - 8038e8c: 6918 ldr r0, [r3, #16] - 8038e8e: 2300 movs r3, #0 - 8038e90: 68ba ldr r2, [r7, #8] - 8038e92: 6879 ldr r1, [r7, #4] - 8038e94: 47a0 blx r4 - 8038e96: 4603 mov r3, r0 - 8038e98: 73fb strb r3, [r7, #15] - 8038e9a: e007 b.n 8038eac - 8038e9c: 2300 movs r3, #0 - 8038e9e: 68ba ldr r2, [r7, #8] - 8038ea0: 6879 ldr r1, [r7, #4] - 8038ea2: 2000 movs r0, #0 - 8038ea4: f000 f8c2 bl 803902c - 8038ea8: 4603 mov r3, r0 - 8038eaa: 73fb strb r3, [r7, #15] - if (err == ERR_OK) { - 8038eac: f997 300f ldrsb.w r3, [r7, #15] + 8038eaa: 687b ldr r3, [r7, #4] + 8038eac: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 8038eb0: 2b00 cmp r3, #0 - 8038eb2: d12a bne.n 8038f0a + 8038eb2: d00b beq.n 8038ecc + 8038eb4: 687b ldr r3, [r7, #4] + 8038eb6: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 + 8038eba: 687b ldr r3, [r7, #4] + 8038ebc: 6918 ldr r0, [r3, #16] + 8038ebe: 2300 movs r3, #0 + 8038ec0: 68ba ldr r2, [r7, #8] + 8038ec2: 6879 ldr r1, [r7, #4] + 8038ec4: 47a0 blx r4 + 8038ec6: 4603 mov r3, r0 + 8038ec8: 73fb strb r3, [r7, #15] + 8038eca: e007 b.n 8038edc + 8038ecc: 2300 movs r3, #0 + 8038ece: 68ba ldr r2, [r7, #8] + 8038ed0: 6879 ldr r1, [r7, #4] + 8038ed2: 2000 movs r0, #0 + 8038ed4: f000 f8c2 bl 803905c + 8038ed8: 4603 mov r3, r0 + 8038eda: 73fb strb r3, [r7, #15] + if (err == ERR_OK) { + 8038edc: f997 300f ldrsb.w r3, [r7, #15] + 8038ee0: 2b00 cmp r3, #0 + 8038ee2: d12a bne.n 8038f3a /* did refused_data include a FIN? */ if ((refused_flags & PBUF_FLAG_TCP_FIN) - 8038eb4: 7bbb ldrb r3, [r7, #14] - 8038eb6: f003 0320 and.w r3, r3, #32 - 8038eba: 2b00 cmp r3, #0 - 8038ebc: d033 beq.n 8038f26 + 8038ee4: 7bbb ldrb r3, [r7, #14] + 8038ee6: f003 0320 and.w r3, r3, #32 + 8038eea: 2b00 cmp r3, #0 + 8038eec: d033 beq.n 8038f56 && (rest == NULL) #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ ) { /* correct rcv_wnd as the application won't call tcp_recved() for the FIN's seqno */ if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) { - 8038ebe: 687b ldr r3, [r7, #4] - 8038ec0: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8038ec2: f5b3 6f06 cmp.w r3, #2144 ; 0x860 - 8038ec6: d005 beq.n 8038ed4 + 8038eee: 687b ldr r3, [r7, #4] + 8038ef0: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8038ef2: f5b3 6f06 cmp.w r3, #2144 ; 0x860 + 8038ef6: d005 beq.n 8038f04 pcb->rcv_wnd++; - 8038ec8: 687b ldr r3, [r7, #4] - 8038eca: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8038ecc: 3301 adds r3, #1 - 8038ece: b29a uxth r2, r3 - 8038ed0: 687b ldr r3, [r7, #4] - 8038ed2: 851a strh r2, [r3, #40] ; 0x28 + 8038ef8: 687b ldr r3, [r7, #4] + 8038efa: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8038efc: 3301 adds r3, #1 + 8038efe: b29a uxth r2, r3 + 8038f00: 687b ldr r3, [r7, #4] + 8038f02: 851a strh r2, [r3, #40] ; 0x28 } TCP_EVENT_CLOSED(pcb, err); - 8038ed4: 687b ldr r3, [r7, #4] - 8038ed6: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8038eda: 2b00 cmp r3, #0 - 8038edc: d00b beq.n 8038ef6 - 8038ede: 687b ldr r3, [r7, #4] - 8038ee0: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 - 8038ee4: 687b ldr r3, [r7, #4] - 8038ee6: 6918 ldr r0, [r3, #16] - 8038ee8: 2300 movs r3, #0 - 8038eea: 2200 movs r2, #0 - 8038eec: 6879 ldr r1, [r7, #4] - 8038eee: 47a0 blx r4 - 8038ef0: 4603 mov r3, r0 - 8038ef2: 73fb strb r3, [r7, #15] - 8038ef4: e001 b.n 8038efa - 8038ef6: 2300 movs r3, #0 - 8038ef8: 73fb strb r3, [r7, #15] + 8038f04: 687b ldr r3, [r7, #4] + 8038f06: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8038f0a: 2b00 cmp r3, #0 + 8038f0c: d00b beq.n 8038f26 + 8038f0e: 687b ldr r3, [r7, #4] + 8038f10: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 + 8038f14: 687b ldr r3, [r7, #4] + 8038f16: 6918 ldr r0, [r3, #16] + 8038f18: 2300 movs r3, #0 + 8038f1a: 2200 movs r2, #0 + 8038f1c: 6879 ldr r1, [r7, #4] + 8038f1e: 47a0 blx r4 + 8038f20: 4603 mov r3, r0 + 8038f22: 73fb strb r3, [r7, #15] + 8038f24: e001 b.n 8038f2a + 8038f26: 2300 movs r3, #0 + 8038f28: 73fb strb r3, [r7, #15] if (err == ERR_ABRT) { - 8038efa: f997 300f ldrsb.w r3, [r7, #15] - 8038efe: f113 0f0d cmn.w r3, #13 - 8038f02: d110 bne.n 8038f26 + 8038f2a: f997 300f ldrsb.w r3, [r7, #15] + 8038f2e: f113 0f0d cmn.w r3, #13 + 8038f32: d110 bne.n 8038f56 return ERR_ABRT; - 8038f04: f06f 030c mvn.w r3, #12 - 8038f08: e00e b.n 8038f28 + 8038f34: f06f 030c mvn.w r3, #12 + 8038f38: e00e b.n 8038f58 } } } else if (err == ERR_ABRT) { - 8038f0a: f997 300f ldrsb.w r3, [r7, #15] - 8038f0e: f113 0f0d cmn.w r3, #13 - 8038f12: d102 bne.n 8038f1a + 8038f3a: f997 300f ldrsb.w r3, [r7, #15] + 8038f3e: f113 0f0d cmn.w r3, #13 + 8038f42: d102 bne.n 8038f4a /* if err == ERR_ABRT, 'pcb' is already deallocated */ /* Drop incoming packets because pcb is "full" (only if the incoming segment contains data). */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n")); return ERR_ABRT; - 8038f14: f06f 030c mvn.w r3, #12 - 8038f18: e006 b.n 8038f28 + 8038f44: f06f 030c mvn.w r3, #12 + 8038f48: e006 b.n 8038f58 #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE if (rest != NULL) { pbuf_cat(refused_data, rest); } #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ pcb->refused_data = refused_data; - 8038f1a: 687b ldr r3, [r7, #4] - 8038f1c: 68ba ldr r2, [r7, #8] - 8038f1e: 679a str r2, [r3, #120] ; 0x78 + 8038f4a: 687b ldr r3, [r7, #4] + 8038f4c: 68ba ldr r2, [r7, #8] + 8038f4e: 679a str r2, [r3, #120] ; 0x78 return ERR_INPROGRESS; - 8038f20: f06f 0304 mvn.w r3, #4 - 8038f24: e000 b.n 8038f28 + 8038f50: f06f 0304 mvn.w r3, #4 + 8038f54: e000 b.n 8038f58 } } return ERR_OK; - 8038f26: 2300 movs r3, #0 + 8038f56: 2300 movs r3, #0 } - 8038f28: 4618 mov r0, r3 - 8038f2a: 3714 adds r7, #20 - 8038f2c: 46bd mov sp, r7 - 8038f2e: bd90 pop {r4, r7, pc} - 8038f30: 08042d68 .word 0x08042d68 - 8038f34: 08043278 .word 0x08043278 - 8038f38: 08042dac .word 0x08042dac + 8038f58: 4618 mov r0, r3 + 8038f5a: 3714 adds r7, #20 + 8038f5c: 46bd mov sp, r7 + 8038f5e: bd90 pop {r4, r7, pc} + 8038f60: 08042d98 .word 0x08042d98 + 8038f64: 080432a8 .word 0x080432a8 + 8038f68: 08042ddc .word 0x08042ddc -08038f3c : +08038f6c : * * @param seg tcp_seg list of TCP segments to free */ void tcp_segs_free(struct tcp_seg *seg) { - 8038f3c: b580 push {r7, lr} - 8038f3e: b084 sub sp, #16 - 8038f40: af00 add r7, sp, #0 - 8038f42: 6078 str r0, [r7, #4] + 8038f6c: b580 push {r7, lr} + 8038f6e: b084 sub sp, #16 + 8038f70: af00 add r7, sp, #0 + 8038f72: 6078 str r0, [r7, #4] while (seg != NULL) { - 8038f44: e007 b.n 8038f56 + 8038f74: e007 b.n 8038f86 struct tcp_seg *next = seg->next; - 8038f46: 687b ldr r3, [r7, #4] - 8038f48: 681b ldr r3, [r3, #0] - 8038f4a: 60fb str r3, [r7, #12] + 8038f76: 687b ldr r3, [r7, #4] + 8038f78: 681b ldr r3, [r3, #0] + 8038f7a: 60fb str r3, [r7, #12] tcp_seg_free(seg); - 8038f4c: 6878 ldr r0, [r7, #4] - 8038f4e: f000 f80a bl 8038f66 + 8038f7c: 6878 ldr r0, [r7, #4] + 8038f7e: f000 f80a bl 8038f96 seg = next; - 8038f52: 68fb ldr r3, [r7, #12] - 8038f54: 607b str r3, [r7, #4] + 8038f82: 68fb ldr r3, [r7, #12] + 8038f84: 607b str r3, [r7, #4] while (seg != NULL) { - 8038f56: 687b ldr r3, [r7, #4] - 8038f58: 2b00 cmp r3, #0 - 8038f5a: d1f4 bne.n 8038f46 + 8038f86: 687b ldr r3, [r7, #4] + 8038f88: 2b00 cmp r3, #0 + 8038f8a: d1f4 bne.n 8038f76 } } - 8038f5c: bf00 nop - 8038f5e: bf00 nop - 8038f60: 3710 adds r7, #16 - 8038f62: 46bd mov sp, r7 - 8038f64: bd80 pop {r7, pc} + 8038f8c: bf00 nop + 8038f8e: bf00 nop + 8038f90: 3710 adds r7, #16 + 8038f92: 46bd mov sp, r7 + 8038f94: bd80 pop {r7, pc} -08038f66 : +08038f96 : * * @param seg single tcp_seg to free */ void tcp_seg_free(struct tcp_seg *seg) { - 8038f66: b580 push {r7, lr} - 8038f68: b082 sub sp, #8 - 8038f6a: af00 add r7, sp, #0 - 8038f6c: 6078 str r0, [r7, #4] + 8038f96: b580 push {r7, lr} + 8038f98: b082 sub sp, #8 + 8038f9a: af00 add r7, sp, #0 + 8038f9c: 6078 str r0, [r7, #4] if (seg != NULL) { - 8038f6e: 687b ldr r3, [r7, #4] - 8038f70: 2b00 cmp r3, #0 - 8038f72: d00c beq.n 8038f8e + 8038f9e: 687b ldr r3, [r7, #4] + 8038fa0: 2b00 cmp r3, #0 + 8038fa2: d00c beq.n 8038fbe if (seg->p != NULL) { - 8038f74: 687b ldr r3, [r7, #4] - 8038f76: 685b ldr r3, [r3, #4] - 8038f78: 2b00 cmp r3, #0 - 8038f7a: d004 beq.n 8038f86 + 8038fa4: 687b ldr r3, [r7, #4] + 8038fa6: 685b ldr r3, [r3, #4] + 8038fa8: 2b00 cmp r3, #0 + 8038faa: d004 beq.n 8038fb6 pbuf_free(seg->p); - 8038f7c: 687b ldr r3, [r7, #4] - 8038f7e: 685b ldr r3, [r3, #4] - 8038f80: 4618 mov r0, r3 - 8038f82: f7fe fbc3 bl 803770c + 8038fac: 687b ldr r3, [r7, #4] + 8038fae: 685b ldr r3, [r3, #4] + 8038fb0: 4618 mov r0, r3 + 8038fb2: f7fe fbc3 bl 803773c #if TCP_DEBUG seg->p = NULL; #endif /* TCP_DEBUG */ } memp_free(MEMP_TCP_SEG, seg); - 8038f86: 6879 ldr r1, [r7, #4] - 8038f88: 2003 movs r0, #3 - 8038f8a: f7fd fd2d bl 80369e8 + 8038fb6: 6879 ldr r1, [r7, #4] + 8038fb8: 2003 movs r0, #3 + 8038fba: f7fd fd2d bl 8036a18 } } - 8038f8e: bf00 nop - 8038f90: 3708 adds r7, #8 - 8038f92: 46bd mov sp, r7 - 8038f94: bd80 pop {r7, pc} + 8038fbe: bf00 nop + 8038fc0: 3708 adds r7, #8 + 8038fc2: 46bd mov sp, r7 + 8038fc4: bd80 pop {r7, pc} ... -08038f98 : +08038fc8 : * @param pcb the tcp_pcb to manipulate * @param prio new priority */ void tcp_setprio(struct tcp_pcb *pcb, u8_t prio) { - 8038f98: b580 push {r7, lr} - 8038f9a: b082 sub sp, #8 - 8038f9c: af00 add r7, sp, #0 - 8038f9e: 6078 str r0, [r7, #4] - 8038fa0: 460b mov r3, r1 - 8038fa2: 70fb strb r3, [r7, #3] + 8038fc8: b580 push {r7, lr} + 8038fca: b082 sub sp, #8 + 8038fcc: af00 add r7, sp, #0 + 8038fce: 6078 str r0, [r7, #4] + 8038fd0: 460b mov r3, r1 + 8038fd2: 70fb strb r3, [r7, #3] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_setprio: invalid pcb", pcb != NULL, return); - 8038fa4: 687b ldr r3, [r7, #4] - 8038fa6: 2b00 cmp r3, #0 - 8038fa8: d107 bne.n 8038fba - 8038faa: 4b07 ldr r3, [pc, #28] ; (8038fc8 ) - 8038fac: f44f 62ce mov.w r2, #1648 ; 0x670 - 8038fb0: 4906 ldr r1, [pc, #24] ; (8038fcc ) - 8038fb2: 4807 ldr r0, [pc, #28] ; (8038fd0 ) - 8038fb4: f007 fd94 bl 8040ae0 - 8038fb8: e002 b.n 8038fc0 + 8038fd4: 687b ldr r3, [r7, #4] + 8038fd6: 2b00 cmp r3, #0 + 8038fd8: d107 bne.n 8038fea + 8038fda: 4b07 ldr r3, [pc, #28] ; (8038ff8 ) + 8038fdc: f44f 62ce mov.w r2, #1648 ; 0x670 + 8038fe0: 4906 ldr r1, [pc, #24] ; (8038ffc ) + 8038fe2: 4807 ldr r0, [pc, #28] ; (8039000 ) + 8038fe4: f007 fd94 bl 8040b10 + 8038fe8: e002 b.n 8038ff0 pcb->prio = prio; - 8038fba: 687b ldr r3, [r7, #4] - 8038fbc: 78fa ldrb r2, [r7, #3] - 8038fbe: 755a strb r2, [r3, #21] -} - 8038fc0: 3708 adds r7, #8 - 8038fc2: 46bd mov sp, r7 - 8038fc4: bd80 pop {r7, pc} - 8038fc6: bf00 nop - 8038fc8: 08042d68 .word 0x08042d68 - 8038fcc: 080432a0 .word 0x080432a0 - 8038fd0: 08042dac .word 0x08042dac - -08038fd4 : + 8038fea: 687b ldr r3, [r7, #4] + 8038fec: 78fa ldrb r2, [r7, #3] + 8038fee: 755a strb r2, [r3, #21] +} + 8038ff0: 3708 adds r7, #8 + 8038ff2: 46bd mov sp, r7 + 8038ff4: bd80 pop {r7, pc} + 8038ff6: bf00 nop + 8038ff8: 08042d98 .word 0x08042d98 + 8038ffc: 080432d0 .word 0x080432d0 + 8039000: 08042ddc .word 0x08042ddc + +08039004 : * @param seg the old tcp_seg * @return a copy of seg */ struct tcp_seg * tcp_seg_copy(struct tcp_seg *seg) { - 8038fd4: b580 push {r7, lr} - 8038fd6: b084 sub sp, #16 - 8038fd8: af00 add r7, sp, #0 - 8038fda: 6078 str r0, [r7, #4] + 8039004: b580 push {r7, lr} + 8039006: b084 sub sp, #16 + 8039008: af00 add r7, sp, #0 + 803900a: 6078 str r0, [r7, #4] struct tcp_seg *cseg; LWIP_ASSERT("tcp_seg_copy: invalid seg", seg != NULL); - 8038fdc: 687b ldr r3, [r7, #4] - 8038fde: 2b00 cmp r3, #0 - 8038fe0: d106 bne.n 8038ff0 - 8038fe2: 4b0f ldr r3, [pc, #60] ; (8039020 ) - 8038fe4: f240 6282 movw r2, #1666 ; 0x682 - 8038fe8: 490e ldr r1, [pc, #56] ; (8039024 ) - 8038fea: 480f ldr r0, [pc, #60] ; (8039028 ) - 8038fec: f007 fd78 bl 8040ae0 + 803900c: 687b ldr r3, [r7, #4] + 803900e: 2b00 cmp r3, #0 + 8039010: d106 bne.n 8039020 + 8039012: 4b0f ldr r3, [pc, #60] ; (8039050 ) + 8039014: f240 6282 movw r2, #1666 ; 0x682 + 8039018: 490e ldr r1, [pc, #56] ; (8039054 ) + 803901a: 480f ldr r0, [pc, #60] ; (8039058 ) + 803901c: f007 fd78 bl 8040b10 cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG); - 8038ff0: 2003 movs r0, #3 - 8038ff2: f7fd fc89 bl 8036908 - 8038ff6: 60f8 str r0, [r7, #12] + 8039020: 2003 movs r0, #3 + 8039022: f7fd fc89 bl 8036938 + 8039026: 60f8 str r0, [r7, #12] if (cseg == NULL) { - 8038ff8: 68fb ldr r3, [r7, #12] - 8038ffa: 2b00 cmp r3, #0 - 8038ffc: d101 bne.n 8039002 + 8039028: 68fb ldr r3, [r7, #12] + 803902a: 2b00 cmp r3, #0 + 803902c: d101 bne.n 8039032 return NULL; - 8038ffe: 2300 movs r3, #0 - 8039000: e00a b.n 8039018 + 803902e: 2300 movs r3, #0 + 8039030: e00a b.n 8039048 } SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg)); - 8039002: 2210 movs r2, #16 - 8039004: 6879 ldr r1, [r7, #4] - 8039006: 68f8 ldr r0, [r7, #12] - 8039008: f007 fc5a bl 80408c0 + 8039032: 2210 movs r2, #16 + 8039034: 6879 ldr r1, [r7, #4] + 8039036: 68f8 ldr r0, [r7, #12] + 8039038: f007 fc5a bl 80408f0 pbuf_ref(cseg->p); - 803900c: 68fb ldr r3, [r7, #12] - 803900e: 685b ldr r3, [r3, #4] - 8039010: 4618 mov r0, r3 - 8039012: f7fe fc1b bl 803784c + 803903c: 68fb ldr r3, [r7, #12] + 803903e: 685b ldr r3, [r3, #4] + 8039040: 4618 mov r0, r3 + 8039042: f7fe fc1b bl 803787c return cseg; - 8039016: 68fb ldr r3, [r7, #12] + 8039046: 68fb ldr r3, [r7, #12] } - 8039018: 4618 mov r0, r3 - 803901a: 3710 adds r7, #16 - 803901c: 46bd mov sp, r7 - 803901e: bd80 pop {r7, pc} - 8039020: 08042d68 .word 0x08042d68 - 8039024: 080432bc .word 0x080432bc - 8039028: 08042dac .word 0x08042dac + 8039048: 4618 mov r0, r3 + 803904a: 3710 adds r7, #16 + 803904c: 46bd mov sp, r7 + 803904e: bd80 pop {r7, pc} + 8039050: 08042d98 .word 0x08042d98 + 8039054: 080432ec .word 0x080432ec + 8039058: 08042ddc .word 0x08042ddc -0803902c : +0803905c : * Default receive callback that is called if the user didn't register * a recv callback for the pcb. */ err_t tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) { - 803902c: b580 push {r7, lr} - 803902e: b084 sub sp, #16 - 8039030: af00 add r7, sp, #0 - 8039032: 60f8 str r0, [r7, #12] - 8039034: 60b9 str r1, [r7, #8] - 8039036: 607a str r2, [r7, #4] - 8039038: 70fb strb r3, [r7, #3] + 803905c: b580 push {r7, lr} + 803905e: b084 sub sp, #16 + 8039060: af00 add r7, sp, #0 + 8039062: 60f8 str r0, [r7, #12] + 8039064: 60b9 str r1, [r7, #8] + 8039066: 607a str r2, [r7, #4] + 8039068: 70fb strb r3, [r7, #3] LWIP_UNUSED_ARG(arg); LWIP_ERROR("tcp_recv_null: invalid pcb", pcb != NULL, return ERR_ARG); - 803903a: 68bb ldr r3, [r7, #8] - 803903c: 2b00 cmp r3, #0 - 803903e: d109 bne.n 8039054 - 8039040: 4b12 ldr r3, [pc, #72] ; (803908c ) - 8039042: f44f 62d3 mov.w r2, #1688 ; 0x698 - 8039046: 4912 ldr r1, [pc, #72] ; (8039090 ) - 8039048: 4812 ldr r0, [pc, #72] ; (8039094 ) - 803904a: f007 fd49 bl 8040ae0 - 803904e: f06f 030f mvn.w r3, #15 - 8039052: e016 b.n 8039082 + 803906a: 68bb ldr r3, [r7, #8] + 803906c: 2b00 cmp r3, #0 + 803906e: d109 bne.n 8039084 + 8039070: 4b12 ldr r3, [pc, #72] ; (80390bc ) + 8039072: f44f 62d3 mov.w r2, #1688 ; 0x698 + 8039076: 4912 ldr r1, [pc, #72] ; (80390c0 ) + 8039078: 4812 ldr r0, [pc, #72] ; (80390c4 ) + 803907a: f007 fd49 bl 8040b10 + 803907e: f06f 030f mvn.w r3, #15 + 8039082: e016 b.n 80390b2 if (p != NULL) { - 8039054: 687b ldr r3, [r7, #4] - 8039056: 2b00 cmp r3, #0 - 8039058: d009 beq.n 803906e + 8039084: 687b ldr r3, [r7, #4] + 8039086: 2b00 cmp r3, #0 + 8039088: d009 beq.n 803909e tcp_recved(pcb, p->tot_len); - 803905a: 687b ldr r3, [r7, #4] - 803905c: 891b ldrh r3, [r3, #8] - 803905e: 4619 mov r1, r3 - 8039060: 68b8 ldr r0, [r7, #8] - 8039062: f7ff fab5 bl 80385d0 + 803908a: 687b ldr r3, [r7, #4] + 803908c: 891b ldrh r3, [r3, #8] + 803908e: 4619 mov r1, r3 + 8039090: 68b8 ldr r0, [r7, #8] + 8039092: f7ff fab5 bl 8038600 pbuf_free(p); - 8039066: 6878 ldr r0, [r7, #4] - 8039068: f7fe fb50 bl 803770c - 803906c: e008 b.n 8039080 + 8039096: 6878 ldr r0, [r7, #4] + 8039098: f7fe fb50 bl 803773c + 803909c: e008 b.n 80390b0 } else if (err == ERR_OK) { - 803906e: f997 3003 ldrsb.w r3, [r7, #3] - 8039072: 2b00 cmp r3, #0 - 8039074: d104 bne.n 8039080 + 803909e: f997 3003 ldrsb.w r3, [r7, #3] + 80390a2: 2b00 cmp r3, #0 + 80390a4: d104 bne.n 80390b0 return tcp_close(pcb); - 8039076: 68b8 ldr r0, [r7, #8] - 8039078: f7fe ffe6 bl 8038048 - 803907c: 4603 mov r3, r0 - 803907e: e000 b.n 8039082 + 80390a6: 68b8 ldr r0, [r7, #8] + 80390a8: f7fe ffe6 bl 8038078 + 80390ac: 4603 mov r3, r0 + 80390ae: e000 b.n 80390b2 } return ERR_OK; - 8039080: 2300 movs r3, #0 -} - 8039082: 4618 mov r0, r3 - 8039084: 3710 adds r7, #16 - 8039086: 46bd mov sp, r7 - 8039088: bd80 pop {r7, pc} - 803908a: bf00 nop - 803908c: 08042d68 .word 0x08042d68 - 8039090: 080432d8 .word 0x080432d8 - 8039094: 08042dac .word 0x08042dac - -08039098 : + 80390b0: 2300 movs r3, #0 +} + 80390b2: 4618 mov r0, r3 + 80390b4: 3710 adds r7, #16 + 80390b6: 46bd mov sp, r7 + 80390b8: bd80 pop {r7, pc} + 80390ba: bf00 nop + 80390bc: 08042d98 .word 0x08042d98 + 80390c0: 08043308 .word 0x08043308 + 80390c4: 08042ddc .word 0x08042ddc + +080390c8 : * * @param prio minimum priority */ static void tcp_kill_prio(u8_t prio) { - 8039098: b580 push {r7, lr} - 803909a: b086 sub sp, #24 - 803909c: af00 add r7, sp, #0 - 803909e: 4603 mov r3, r0 - 80390a0: 71fb strb r3, [r7, #7] + 80390c8: b580 push {r7, lr} + 80390ca: b086 sub sp, #24 + 80390cc: af00 add r7, sp, #0 + 80390ce: 4603 mov r3, r0 + 80390d0: 71fb strb r3, [r7, #7] struct tcp_pcb *pcb, *inactive; u32_t inactivity; u8_t mprio; mprio = LWIP_MIN(TCP_PRIO_MAX, prio); - 80390a2: f997 3007 ldrsb.w r3, [r7, #7] - 80390a6: 2b00 cmp r3, #0 - 80390a8: db01 blt.n 80390ae - 80390aa: 79fb ldrb r3, [r7, #7] - 80390ac: e000 b.n 80390b0 - 80390ae: 237f movs r3, #127 ; 0x7f - 80390b0: 72fb strb r3, [r7, #11] + 80390d2: f997 3007 ldrsb.w r3, [r7, #7] + 80390d6: 2b00 cmp r3, #0 + 80390d8: db01 blt.n 80390de + 80390da: 79fb ldrb r3, [r7, #7] + 80390dc: e000 b.n 80390e0 + 80390de: 237f movs r3, #127 ; 0x7f + 80390e0: 72fb strb r3, [r7, #11] /* We want to kill connections with a lower prio, so bail out if * supplied prio is 0 - there can never be a lower prio */ if (mprio == 0) { - 80390b2: 7afb ldrb r3, [r7, #11] - 80390b4: 2b00 cmp r3, #0 - 80390b6: d034 beq.n 8039122 + 80390e2: 7afb ldrb r3, [r7, #11] + 80390e4: 2b00 cmp r3, #0 + 80390e6: d034 beq.n 8039152 /* We only want kill connections with a lower prio, so decrement prio by one * and start searching for oldest connection with same or lower priority than mprio. * We want to find the connections with the lowest possible prio, and among * these the one with the longest inactivity time. */ mprio--; - 80390b8: 7afb ldrb r3, [r7, #11] - 80390ba: 3b01 subs r3, #1 - 80390bc: 72fb strb r3, [r7, #11] + 80390e8: 7afb ldrb r3, [r7, #11] + 80390ea: 3b01 subs r3, #1 + 80390ec: 72fb strb r3, [r7, #11] inactivity = 0; - 80390be: 2300 movs r3, #0 - 80390c0: 60fb str r3, [r7, #12] + 80390ee: 2300 movs r3, #0 + 80390f0: 60fb str r3, [r7, #12] inactive = NULL; - 80390c2: 2300 movs r3, #0 - 80390c4: 613b str r3, [r7, #16] + 80390f2: 2300 movs r3, #0 + 80390f4: 613b str r3, [r7, #16] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 80390c6: 4b19 ldr r3, [pc, #100] ; (803912c ) - 80390c8: 681b ldr r3, [r3, #0] - 80390ca: 617b str r3, [r7, #20] - 80390cc: e01f b.n 803910e + 80390f6: 4b19 ldr r3, [pc, #100] ; (803915c ) + 80390f8: 681b ldr r3, [r3, #0] + 80390fa: 617b str r3, [r7, #20] + 80390fc: e01f b.n 803913e /* lower prio is always a kill candidate */ if ((pcb->prio < mprio) || - 80390ce: 697b ldr r3, [r7, #20] - 80390d0: 7d5b ldrb r3, [r3, #21] - 80390d2: 7afa ldrb r2, [r7, #11] - 80390d4: 429a cmp r2, r3 - 80390d6: d80c bhi.n 80390f2 + 80390fe: 697b ldr r3, [r7, #20] + 8039100: 7d5b ldrb r3, [r3, #21] + 8039102: 7afa ldrb r2, [r7, #11] + 8039104: 429a cmp r2, r3 + 8039106: d80c bhi.n 8039122 /* longer inactivity is also a kill candidate */ ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) { - 80390d8: 697b ldr r3, [r7, #20] - 80390da: 7d5b ldrb r3, [r3, #21] + 8039108: 697b ldr r3, [r7, #20] + 803910a: 7d5b ldrb r3, [r3, #21] if ((pcb->prio < mprio) || - 80390dc: 7afa ldrb r2, [r7, #11] - 80390de: 429a cmp r2, r3 - 80390e0: d112 bne.n 8039108 + 803910c: 7afa ldrb r2, [r7, #11] + 803910e: 429a cmp r2, r3 + 8039110: d112 bne.n 8039138 ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) { - 80390e2: 4b13 ldr r3, [pc, #76] ; (8039130 ) - 80390e4: 681a ldr r2, [r3, #0] - 80390e6: 697b ldr r3, [r7, #20] - 80390e8: 6a1b ldr r3, [r3, #32] - 80390ea: 1ad3 subs r3, r2, r3 - 80390ec: 68fa ldr r2, [r7, #12] - 80390ee: 429a cmp r2, r3 - 80390f0: d80a bhi.n 8039108 + 8039112: 4b13 ldr r3, [pc, #76] ; (8039160 ) + 8039114: 681a ldr r2, [r3, #0] + 8039116: 697b ldr r3, [r7, #20] + 8039118: 6a1b ldr r3, [r3, #32] + 803911a: 1ad3 subs r3, r2, r3 + 803911c: 68fa ldr r2, [r7, #12] + 803911e: 429a cmp r2, r3 + 8039120: d80a bhi.n 8039138 inactivity = tcp_ticks - pcb->tmr; - 80390f2: 4b0f ldr r3, [pc, #60] ; (8039130 ) - 80390f4: 681a ldr r2, [r3, #0] - 80390f6: 697b ldr r3, [r7, #20] - 80390f8: 6a1b ldr r3, [r3, #32] - 80390fa: 1ad3 subs r3, r2, r3 - 80390fc: 60fb str r3, [r7, #12] + 8039122: 4b0f ldr r3, [pc, #60] ; (8039160 ) + 8039124: 681a ldr r2, [r3, #0] + 8039126: 697b ldr r3, [r7, #20] + 8039128: 6a1b ldr r3, [r3, #32] + 803912a: 1ad3 subs r3, r2, r3 + 803912c: 60fb str r3, [r7, #12] inactive = pcb; - 80390fe: 697b ldr r3, [r7, #20] - 8039100: 613b str r3, [r7, #16] + 803912e: 697b ldr r3, [r7, #20] + 8039130: 613b str r3, [r7, #16] mprio = pcb->prio; - 8039102: 697b ldr r3, [r7, #20] - 8039104: 7d5b ldrb r3, [r3, #21] - 8039106: 72fb strb r3, [r7, #11] + 8039132: 697b ldr r3, [r7, #20] + 8039134: 7d5b ldrb r3, [r3, #21] + 8039136: 72fb strb r3, [r7, #11] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 8039108: 697b ldr r3, [r7, #20] - 803910a: 68db ldr r3, [r3, #12] - 803910c: 617b str r3, [r7, #20] - 803910e: 697b ldr r3, [r7, #20] - 8039110: 2b00 cmp r3, #0 - 8039112: d1dc bne.n 80390ce + 8039138: 697b ldr r3, [r7, #20] + 803913a: 68db ldr r3, [r3, #12] + 803913c: 617b str r3, [r7, #20] + 803913e: 697b ldr r3, [r7, #20] + 8039140: 2b00 cmp r3, #0 + 8039142: d1dc bne.n 80390fe } } if (inactive != NULL) { - 8039114: 693b ldr r3, [r7, #16] - 8039116: 2b00 cmp r3, #0 - 8039118: d004 beq.n 8039124 + 8039144: 693b ldr r3, [r7, #16] + 8039146: 2b00 cmp r3, #0 + 8039148: d004 beq.n 8039154 LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n", (void *)inactive, inactivity)); tcp_abort(inactive); - 803911a: 6938 ldr r0, [r7, #16] - 803911c: f7ff f87e bl 803821c - 8039120: e000 b.n 8039124 + 803914a: 6938 ldr r0, [r7, #16] + 803914c: f7ff f87e bl 803824c + 8039150: e000 b.n 8039154 return; - 8039122: bf00 nop + 8039152: bf00 nop } } - 8039124: 3718 adds r7, #24 - 8039126: 46bd mov sp, r7 - 8039128: bd80 pop {r7, pc} - 803912a: bf00 nop - 803912c: 2400e964 .word 0x2400e964 - 8039130: 2400e958 .word 0x2400e958 + 8039154: 3718 adds r7, #24 + 8039156: 46bd mov sp, r7 + 8039158: bd80 pop {r7, pc} + 803915a: bf00 nop + 803915c: 2400e964 .word 0x2400e964 + 8039160: 2400e958 .word 0x2400e958 -08039134 : +08039164 : * Kills the oldest connection that is in specific state. * Called from tcp_alloc() for LAST_ACK and CLOSING if no more connections are available. */ static void tcp_kill_state(enum tcp_state state) { - 8039134: b580 push {r7, lr} - 8039136: b086 sub sp, #24 - 8039138: af00 add r7, sp, #0 - 803913a: 4603 mov r3, r0 - 803913c: 71fb strb r3, [r7, #7] + 8039164: b580 push {r7, lr} + 8039166: b086 sub sp, #24 + 8039168: af00 add r7, sp, #0 + 803916a: 4603 mov r3, r0 + 803916c: 71fb strb r3, [r7, #7] struct tcp_pcb *pcb, *inactive; u32_t inactivity; LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK)); - 803913e: 79fb ldrb r3, [r7, #7] - 8039140: 2b08 cmp r3, #8 - 8039142: d009 beq.n 8039158 - 8039144: 79fb ldrb r3, [r7, #7] - 8039146: 2b09 cmp r3, #9 - 8039148: d006 beq.n 8039158 - 803914a: 4b1a ldr r3, [pc, #104] ; (80391b4 ) - 803914c: f240 62dd movw r2, #1757 ; 0x6dd - 8039150: 4919 ldr r1, [pc, #100] ; (80391b8 ) - 8039152: 481a ldr r0, [pc, #104] ; (80391bc ) - 8039154: f007 fcc4 bl 8040ae0 + 803916e: 79fb ldrb r3, [r7, #7] + 8039170: 2b08 cmp r3, #8 + 8039172: d009 beq.n 8039188 + 8039174: 79fb ldrb r3, [r7, #7] + 8039176: 2b09 cmp r3, #9 + 8039178: d006 beq.n 8039188 + 803917a: 4b1a ldr r3, [pc, #104] ; (80391e4 ) + 803917c: f240 62dd movw r2, #1757 ; 0x6dd + 8039180: 4919 ldr r1, [pc, #100] ; (80391e8 ) + 8039182: 481a ldr r0, [pc, #104] ; (80391ec ) + 8039184: f007 fcc4 bl 8040b10 inactivity = 0; - 8039158: 2300 movs r3, #0 - 803915a: 60fb str r3, [r7, #12] + 8039188: 2300 movs r3, #0 + 803918a: 60fb str r3, [r7, #12] inactive = NULL; - 803915c: 2300 movs r3, #0 - 803915e: 613b str r3, [r7, #16] + 803918c: 2300 movs r3, #0 + 803918e: 613b str r3, [r7, #16] /* Go through the list of active pcbs and get the oldest pcb that is in state CLOSING/LAST_ACK. */ for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 8039160: 4b17 ldr r3, [pc, #92] ; (80391c0 ) - 8039162: 681b ldr r3, [r3, #0] - 8039164: 617b str r3, [r7, #20] - 8039166: e017 b.n 8039198 + 8039190: 4b17 ldr r3, [pc, #92] ; (80391f0 ) + 8039192: 681b ldr r3, [r3, #0] + 8039194: 617b str r3, [r7, #20] + 8039196: e017 b.n 80391c8 if (pcb->state == state) { - 8039168: 697b ldr r3, [r7, #20] - 803916a: 7d1b ldrb r3, [r3, #20] - 803916c: 79fa ldrb r2, [r7, #7] - 803916e: 429a cmp r2, r3 - 8039170: d10f bne.n 8039192 + 8039198: 697b ldr r3, [r7, #20] + 803919a: 7d1b ldrb r3, [r3, #20] + 803919c: 79fa ldrb r2, [r7, #7] + 803919e: 429a cmp r2, r3 + 80391a0: d10f bne.n 80391c2 if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { - 8039172: 4b14 ldr r3, [pc, #80] ; (80391c4 ) - 8039174: 681a ldr r2, [r3, #0] - 8039176: 697b ldr r3, [r7, #20] - 8039178: 6a1b ldr r3, [r3, #32] - 803917a: 1ad3 subs r3, r2, r3 - 803917c: 68fa ldr r2, [r7, #12] - 803917e: 429a cmp r2, r3 - 8039180: d807 bhi.n 8039192 + 80391a2: 4b14 ldr r3, [pc, #80] ; (80391f4 ) + 80391a4: 681a ldr r2, [r3, #0] + 80391a6: 697b ldr r3, [r7, #20] + 80391a8: 6a1b ldr r3, [r3, #32] + 80391aa: 1ad3 subs r3, r2, r3 + 80391ac: 68fa ldr r2, [r7, #12] + 80391ae: 429a cmp r2, r3 + 80391b0: d807 bhi.n 80391c2 inactivity = tcp_ticks - pcb->tmr; - 8039182: 4b10 ldr r3, [pc, #64] ; (80391c4 ) - 8039184: 681a ldr r2, [r3, #0] - 8039186: 697b ldr r3, [r7, #20] - 8039188: 6a1b ldr r3, [r3, #32] - 803918a: 1ad3 subs r3, r2, r3 - 803918c: 60fb str r3, [r7, #12] + 80391b2: 4b10 ldr r3, [pc, #64] ; (80391f4 ) + 80391b4: 681a ldr r2, [r3, #0] + 80391b6: 697b ldr r3, [r7, #20] + 80391b8: 6a1b ldr r3, [r3, #32] + 80391ba: 1ad3 subs r3, r2, r3 + 80391bc: 60fb str r3, [r7, #12] inactive = pcb; - 803918e: 697b ldr r3, [r7, #20] - 8039190: 613b str r3, [r7, #16] + 80391be: 697b ldr r3, [r7, #20] + 80391c0: 613b str r3, [r7, #16] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 8039192: 697b ldr r3, [r7, #20] - 8039194: 68db ldr r3, [r3, #12] - 8039196: 617b str r3, [r7, #20] - 8039198: 697b ldr r3, [r7, #20] - 803919a: 2b00 cmp r3, #0 - 803919c: d1e4 bne.n 8039168 + 80391c2: 697b ldr r3, [r7, #20] + 80391c4: 68db ldr r3, [r3, #12] + 80391c6: 617b str r3, [r7, #20] + 80391c8: 697b ldr r3, [r7, #20] + 80391ca: 2b00 cmp r3, #0 + 80391cc: d1e4 bne.n 8039198 } } } if (inactive != NULL) { - 803919e: 693b ldr r3, [r7, #16] - 80391a0: 2b00 cmp r3, #0 - 80391a2: d003 beq.n 80391ac + 80391ce: 693b ldr r3, [r7, #16] + 80391d0: 2b00 cmp r3, #0 + 80391d2: d003 beq.n 80391dc LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_closing: killing oldest %s PCB %p (%"S32_F")\n", tcp_state_str[state], (void *)inactive, inactivity)); /* Don't send a RST, since no data is lost. */ tcp_abandon(inactive, 0); - 80391a4: 2100 movs r1, #0 - 80391a6: 6938 ldr r0, [r7, #16] - 80391a8: f7fe ff7a bl 80380a0 - } -} - 80391ac: bf00 nop - 80391ae: 3718 adds r7, #24 - 80391b0: 46bd mov sp, r7 - 80391b2: bd80 pop {r7, pc} - 80391b4: 08042d68 .word 0x08042d68 - 80391b8: 080432f4 .word 0x080432f4 - 80391bc: 08042dac .word 0x08042dac - 80391c0: 2400e964 .word 0x2400e964 - 80391c4: 2400e958 .word 0x2400e958 - -080391c8 : + 80391d4: 2100 movs r1, #0 + 80391d6: 6938 ldr r0, [r7, #16] + 80391d8: f7fe ff7a bl 80380d0 + } +} + 80391dc: bf00 nop + 80391de: 3718 adds r7, #24 + 80391e0: 46bd mov sp, r7 + 80391e2: bd80 pop {r7, pc} + 80391e4: 08042d98 .word 0x08042d98 + 80391e8: 08043324 .word 0x08043324 + 80391ec: 08042ddc .word 0x08042ddc + 80391f0: 2400e964 .word 0x2400e964 + 80391f4: 2400e958 .word 0x2400e958 + +080391f8 : * Kills the oldest connection that is in TIME_WAIT state. * Called from tcp_alloc() if no more connections are available. */ static void tcp_kill_timewait(void) { - 80391c8: b580 push {r7, lr} - 80391ca: b084 sub sp, #16 - 80391cc: af00 add r7, sp, #0 + 80391f8: b580 push {r7, lr} + 80391fa: b084 sub sp, #16 + 80391fc: af00 add r7, sp, #0 struct tcp_pcb *pcb, *inactive; u32_t inactivity; inactivity = 0; - 80391ce: 2300 movs r3, #0 - 80391d0: 607b str r3, [r7, #4] + 80391fe: 2300 movs r3, #0 + 8039200: 607b str r3, [r7, #4] inactive = NULL; - 80391d2: 2300 movs r3, #0 - 80391d4: 60bb str r3, [r7, #8] + 8039202: 2300 movs r3, #0 + 8039204: 60bb str r3, [r7, #8] /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */ for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - 80391d6: 4b12 ldr r3, [pc, #72] ; (8039220 ) - 80391d8: 681b ldr r3, [r3, #0] - 80391da: 60fb str r3, [r7, #12] - 80391dc: e012 b.n 8039204 + 8039206: 4b12 ldr r3, [pc, #72] ; (8039250 ) + 8039208: 681b ldr r3, [r3, #0] + 803920a: 60fb str r3, [r7, #12] + 803920c: e012 b.n 8039234 if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { - 80391de: 4b11 ldr r3, [pc, #68] ; (8039224 ) - 80391e0: 681a ldr r2, [r3, #0] - 80391e2: 68fb ldr r3, [r7, #12] - 80391e4: 6a1b ldr r3, [r3, #32] - 80391e6: 1ad3 subs r3, r2, r3 - 80391e8: 687a ldr r2, [r7, #4] - 80391ea: 429a cmp r2, r3 - 80391ec: d807 bhi.n 80391fe + 803920e: 4b11 ldr r3, [pc, #68] ; (8039254 ) + 8039210: 681a ldr r2, [r3, #0] + 8039212: 68fb ldr r3, [r7, #12] + 8039214: 6a1b ldr r3, [r3, #32] + 8039216: 1ad3 subs r3, r2, r3 + 8039218: 687a ldr r2, [r7, #4] + 803921a: 429a cmp r2, r3 + 803921c: d807 bhi.n 803922e inactivity = tcp_ticks - pcb->tmr; - 80391ee: 4b0d ldr r3, [pc, #52] ; (8039224 ) - 80391f0: 681a ldr r2, [r3, #0] - 80391f2: 68fb ldr r3, [r7, #12] - 80391f4: 6a1b ldr r3, [r3, #32] - 80391f6: 1ad3 subs r3, r2, r3 - 80391f8: 607b str r3, [r7, #4] + 803921e: 4b0d ldr r3, [pc, #52] ; (8039254 ) + 8039220: 681a ldr r2, [r3, #0] + 8039222: 68fb ldr r3, [r7, #12] + 8039224: 6a1b ldr r3, [r3, #32] + 8039226: 1ad3 subs r3, r2, r3 + 8039228: 607b str r3, [r7, #4] inactive = pcb; - 80391fa: 68fb ldr r3, [r7, #12] - 80391fc: 60bb str r3, [r7, #8] + 803922a: 68fb ldr r3, [r7, #12] + 803922c: 60bb str r3, [r7, #8] for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - 80391fe: 68fb ldr r3, [r7, #12] - 8039200: 68db ldr r3, [r3, #12] - 8039202: 60fb str r3, [r7, #12] - 8039204: 68fb ldr r3, [r7, #12] - 8039206: 2b00 cmp r3, #0 - 8039208: d1e9 bne.n 80391de + 803922e: 68fb ldr r3, [r7, #12] + 8039230: 68db ldr r3, [r3, #12] + 8039232: 60fb str r3, [r7, #12] + 8039234: 68fb ldr r3, [r7, #12] + 8039236: 2b00 cmp r3, #0 + 8039238: d1e9 bne.n 803920e } } if (inactive != NULL) { - 803920a: 68bb ldr r3, [r7, #8] - 803920c: 2b00 cmp r3, #0 - 803920e: d002 beq.n 8039216 + 803923a: 68bb ldr r3, [r7, #8] + 803923c: 2b00 cmp r3, #0 + 803923e: d002 beq.n 8039246 LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n", (void *)inactive, inactivity)); tcp_abort(inactive); - 8039210: 68b8 ldr r0, [r7, #8] - 8039212: f7ff f803 bl 803821c + 8039240: 68b8 ldr r0, [r7, #8] + 8039242: f7ff f803 bl 803824c } } - 8039216: bf00 nop - 8039218: 3710 adds r7, #16 - 803921a: 46bd mov sp, r7 - 803921c: bd80 pop {r7, pc} - 803921e: bf00 nop - 8039220: 2400e968 .word 0x2400e968 - 8039224: 2400e958 .word 0x2400e958 + 8039246: bf00 nop + 8039248: 3710 adds r7, #16 + 803924a: 46bd mov sp, r7 + 803924c: bd80 pop {r7, pc} + 803924e: bf00 nop + 8039250: 2400e968 .word 0x2400e968 + 8039254: 2400e958 .word 0x2400e958 -08039228 : +08039258 : * now send the FIN (which failed before), the pcb might be in a state that is * OK for us to now free it. */ static void tcp_handle_closepend(void) { - 8039228: b580 push {r7, lr} - 803922a: b082 sub sp, #8 - 803922c: af00 add r7, sp, #0 + 8039258: b580 push {r7, lr} + 803925a: b082 sub sp, #8 + 803925c: af00 add r7, sp, #0 struct tcp_pcb *pcb = tcp_active_pcbs; - 803922e: 4b10 ldr r3, [pc, #64] ; (8039270 ) - 8039230: 681b ldr r3, [r3, #0] - 8039232: 607b str r3, [r7, #4] + 803925e: 4b10 ldr r3, [pc, #64] ; (80392a0 ) + 8039260: 681b ldr r3, [r3, #0] + 8039262: 607b str r3, [r7, #4] while (pcb != NULL) { - 8039234: e014 b.n 8039260 + 8039264: e014 b.n 8039290 struct tcp_pcb *next = pcb->next; - 8039236: 687b ldr r3, [r7, #4] - 8039238: 68db ldr r3, [r3, #12] - 803923a: 603b str r3, [r7, #0] + 8039266: 687b ldr r3, [r7, #4] + 8039268: 68db ldr r3, [r3, #12] + 803926a: 603b str r3, [r7, #0] /* send pending FIN */ if (pcb->flags & TF_CLOSEPEND) { - 803923c: 687b ldr r3, [r7, #4] - 803923e: 8b5b ldrh r3, [r3, #26] - 8039240: f003 0308 and.w r3, r3, #8 - 8039244: 2b00 cmp r3, #0 - 8039246: d009 beq.n 803925c + 803926c: 687b ldr r3, [r7, #4] + 803926e: 8b5b ldrh r3, [r3, #26] + 8039270: f003 0308 and.w r3, r3, #8 + 8039274: 2b00 cmp r3, #0 + 8039276: d009 beq.n 803928c LWIP_DEBUGF(TCP_DEBUG, ("tcp_handle_closepend: pending FIN\n")); tcp_clear_flags(pcb, TF_CLOSEPEND); - 8039248: 687b ldr r3, [r7, #4] - 803924a: 8b5b ldrh r3, [r3, #26] - 803924c: f023 0308 bic.w r3, r3, #8 - 8039250: b29a uxth r2, r3 - 8039252: 687b ldr r3, [r7, #4] - 8039254: 835a strh r2, [r3, #26] + 8039278: 687b ldr r3, [r7, #4] + 803927a: 8b5b ldrh r3, [r3, #26] + 803927c: f023 0308 bic.w r3, r3, #8 + 8039280: b29a uxth r2, r3 + 8039282: 687b ldr r3, [r7, #4] + 8039284: 835a strh r2, [r3, #26] tcp_close_shutdown_fin(pcb); - 8039256: 6878 ldr r0, [r7, #4] - 8039258: f7fe fe8c bl 8037f74 + 8039286: 6878 ldr r0, [r7, #4] + 8039288: f7fe fe8c bl 8037fa4 } pcb = next; - 803925c: 683b ldr r3, [r7, #0] - 803925e: 607b str r3, [r7, #4] + 803928c: 683b ldr r3, [r7, #0] + 803928e: 607b str r3, [r7, #4] while (pcb != NULL) { - 8039260: 687b ldr r3, [r7, #4] - 8039262: 2b00 cmp r3, #0 - 8039264: d1e7 bne.n 8039236 + 8039290: 687b ldr r3, [r7, #4] + 8039292: 2b00 cmp r3, #0 + 8039294: d1e7 bne.n 8039266 } } - 8039266: bf00 nop - 8039268: bf00 nop - 803926a: 3708 adds r7, #8 - 803926c: 46bd mov sp, r7 - 803926e: bd80 pop {r7, pc} - 8039270: 2400e964 .word 0x2400e964 + 8039296: bf00 nop + 8039298: bf00 nop + 803929a: 3708 adds r7, #8 + 803929c: 46bd mov sp, r7 + 803929e: bd80 pop {r7, pc} + 80392a0: 2400e964 .word 0x2400e964 -08039274 : +080392a4 : * @param prio priority for the new pcb * @return a new tcp_pcb that initially is in state CLOSED */ struct tcp_pcb * tcp_alloc(u8_t prio) { - 8039274: b580 push {r7, lr} - 8039276: b084 sub sp, #16 - 8039278: af00 add r7, sp, #0 - 803927a: 4603 mov r3, r0 - 803927c: 71fb strb r3, [r7, #7] + 80392a4: b580 push {r7, lr} + 80392a6: b084 sub sp, #16 + 80392a8: af00 add r7, sp, #0 + 80392aa: 4603 mov r3, r0 + 80392ac: 71fb strb r3, [r7, #7] struct tcp_pcb *pcb; LWIP_ASSERT_CORE_LOCKED(); pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 803927e: 2001 movs r0, #1 - 8039280: f7fd fb42 bl 8036908 - 8039284: 60f8 str r0, [r7, #12] + 80392ae: 2001 movs r0, #1 + 80392b0: f7fd fb42 bl 8036938 + 80392b4: 60f8 str r0, [r7, #12] if (pcb == NULL) { - 8039286: 68fb ldr r3, [r7, #12] - 8039288: 2b00 cmp r3, #0 - 803928a: d126 bne.n 80392da + 80392b6: 68fb ldr r3, [r7, #12] + 80392b8: 2b00 cmp r3, #0 + 80392ba: d126 bne.n 803930a /* Try to send FIN for all pcbs stuck in TF_CLOSEPEND first */ tcp_handle_closepend(); - 803928c: f7ff ffcc bl 8039228 + 80392bc: f7ff ffcc bl 8039258 /* Try killing oldest connection in TIME-WAIT. */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n")); tcp_kill_timewait(); - 8039290: f7ff ff9a bl 80391c8 + 80392c0: f7ff ff9a bl 80391f8 /* Try to allocate a tcp_pcb again. */ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 8039294: 2001 movs r0, #1 - 8039296: f7fd fb37 bl 8036908 - 803929a: 60f8 str r0, [r7, #12] + 80392c4: 2001 movs r0, #1 + 80392c6: f7fd fb37 bl 8036938 + 80392ca: 60f8 str r0, [r7, #12] if (pcb == NULL) { - 803929c: 68fb ldr r3, [r7, #12] - 803929e: 2b00 cmp r3, #0 - 80392a0: d11b bne.n 80392da + 80392cc: 68fb ldr r3, [r7, #12] + 80392ce: 2b00 cmp r3, #0 + 80392d0: d11b bne.n 803930a /* Try killing oldest connection in LAST-ACK (these wouldn't go to TIME-WAIT). */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest LAST-ACK connection\n")); tcp_kill_state(LAST_ACK); - 80392a2: 2009 movs r0, #9 - 80392a4: f7ff ff46 bl 8039134 + 80392d2: 2009 movs r0, #9 + 80392d4: f7ff ff46 bl 8039164 /* Try to allocate a tcp_pcb again. */ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 80392a8: 2001 movs r0, #1 - 80392aa: f7fd fb2d bl 8036908 - 80392ae: 60f8 str r0, [r7, #12] + 80392d8: 2001 movs r0, #1 + 80392da: f7fd fb2d bl 8036938 + 80392de: 60f8 str r0, [r7, #12] if (pcb == NULL) { - 80392b0: 68fb ldr r3, [r7, #12] - 80392b2: 2b00 cmp r3, #0 - 80392b4: d111 bne.n 80392da + 80392e0: 68fb ldr r3, [r7, #12] + 80392e2: 2b00 cmp r3, #0 + 80392e4: d111 bne.n 803930a /* Try killing oldest connection in CLOSING. */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest CLOSING connection\n")); tcp_kill_state(CLOSING); - 80392b6: 2008 movs r0, #8 - 80392b8: f7ff ff3c bl 8039134 + 80392e6: 2008 movs r0, #8 + 80392e8: f7ff ff3c bl 8039164 /* Try to allocate a tcp_pcb again. */ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 80392bc: 2001 movs r0, #1 - 80392be: f7fd fb23 bl 8036908 - 80392c2: 60f8 str r0, [r7, #12] + 80392ec: 2001 movs r0, #1 + 80392ee: f7fd fb23 bl 8036938 + 80392f2: 60f8 str r0, [r7, #12] if (pcb == NULL) { - 80392c4: 68fb ldr r3, [r7, #12] - 80392c6: 2b00 cmp r3, #0 - 80392c8: d107 bne.n 80392da + 80392f4: 68fb ldr r3, [r7, #12] + 80392f6: 2b00 cmp r3, #0 + 80392f8: d107 bne.n 803930a /* Try killing oldest active connection with lower priority than the new one. */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio)); tcp_kill_prio(prio); - 80392ca: 79fb ldrb r3, [r7, #7] - 80392cc: 4618 mov r0, r3 - 80392ce: f7ff fee3 bl 8039098 + 80392fa: 79fb ldrb r3, [r7, #7] + 80392fc: 4618 mov r0, r3 + 80392fe: f7ff fee3 bl 80390c8 /* Try to allocate a tcp_pcb again. */ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 80392d2: 2001 movs r0, #1 - 80392d4: f7fd fb18 bl 8036908 - 80392d8: 60f8 str r0, [r7, #12] + 8039302: 2001 movs r0, #1 + 8039304: f7fd fb18 bl 8036938 + 8039308: 60f8 str r0, [r7, #12] if (pcb != NULL) { /* adjust err stats: memp_malloc failed above */ MEMP_STATS_DEC(err, MEMP_TCP_PCB); } } if (pcb != NULL) { - 80392da: 68fb ldr r3, [r7, #12] - 80392dc: 2b00 cmp r3, #0 - 80392de: d03f beq.n 8039360 + 803930a: 68fb ldr r3, [r7, #12] + 803930c: 2b00 cmp r3, #0 + 803930e: d03f beq.n 8039390 /* zero out the whole pcb, so there is no need to initialize members to zero */ memset(pcb, 0, sizeof(struct tcp_pcb)); - 80392e0: 229c movs r2, #156 ; 0x9c - 80392e2: 2100 movs r1, #0 - 80392e4: 68f8 ldr r0, [r7, #12] - 80392e6: f007 fb13 bl 8040910 + 8039310: 229c movs r2, #156 ; 0x9c + 8039312: 2100 movs r1, #0 + 8039314: 68f8 ldr r0, [r7, #12] + 8039316: f007 fb13 bl 8040940 pcb->prio = prio; - 80392ea: 68fb ldr r3, [r7, #12] - 80392ec: 79fa ldrb r2, [r7, #7] - 80392ee: 755a strb r2, [r3, #21] + 803931a: 68fb ldr r3, [r7, #12] + 803931c: 79fa ldrb r2, [r7, #7] + 803931e: 755a strb r2, [r3, #21] pcb->snd_buf = TCP_SND_BUF; - 80392f0: 68fb ldr r3, [r7, #12] - 80392f2: f44f 6206 mov.w r2, #2144 ; 0x860 - 80392f6: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 + 8039320: 68fb ldr r3, [r7, #12] + 8039322: f44f 6206 mov.w r2, #2144 ; 0x860 + 8039326: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 /* Start with a window that does not need scaling. When window scaling is enabled and used, the window is enlarged when both sides agree on scaling. */ pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND); - 80392fa: 68fb ldr r3, [r7, #12] - 80392fc: f44f 6206 mov.w r2, #2144 ; 0x860 - 8039300: 855a strh r2, [r3, #42] ; 0x2a - 8039302: 68fb ldr r3, [r7, #12] - 8039304: 8d5a ldrh r2, [r3, #42] ; 0x2a - 8039306: 68fb ldr r3, [r7, #12] - 8039308: 851a strh r2, [r3, #40] ; 0x28 + 803932a: 68fb ldr r3, [r7, #12] + 803932c: f44f 6206 mov.w r2, #2144 ; 0x860 + 8039330: 855a strh r2, [r3, #42] ; 0x2a + 8039332: 68fb ldr r3, [r7, #12] + 8039334: 8d5a ldrh r2, [r3, #42] ; 0x2a + 8039336: 68fb ldr r3, [r7, #12] + 8039338: 851a strh r2, [r3, #40] ; 0x28 pcb->ttl = TCP_TTL; - 803930a: 68fb ldr r3, [r7, #12] - 803930c: 22ff movs r2, #255 ; 0xff - 803930e: 72da strb r2, [r3, #11] + 803933a: 68fb ldr r3, [r7, #12] + 803933c: 22ff movs r2, #255 ; 0xff + 803933e: 72da strb r2, [r3, #11] /* As initial send MSS, we use TCP_MSS but limit it to 536. The send MSS is updated when an MSS option is received. */ pcb->mss = INITIAL_MSS; - 8039310: 68fb ldr r3, [r7, #12] - 8039312: f44f 7206 mov.w r2, #536 ; 0x218 - 8039316: 865a strh r2, [r3, #50] ; 0x32 + 8039340: 68fb ldr r3, [r7, #12] + 8039342: f44f 7206 mov.w r2, #536 ; 0x218 + 8039346: 865a strh r2, [r3, #50] ; 0x32 pcb->rto = 3000 / TCP_SLOW_INTERVAL; - 8039318: 68fb ldr r3, [r7, #12] - 803931a: 2206 movs r2, #6 - 803931c: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 + 8039348: 68fb ldr r3, [r7, #12] + 803934a: 2206 movs r2, #6 + 803934c: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 pcb->sv = 3000 / TCP_SLOW_INTERVAL; - 8039320: 68fb ldr r3, [r7, #12] - 8039322: 2206 movs r2, #6 - 8039324: 87da strh r2, [r3, #62] ; 0x3e + 8039350: 68fb ldr r3, [r7, #12] + 8039352: 2206 movs r2, #6 + 8039354: 87da strh r2, [r3, #62] ; 0x3e pcb->rtime = -1; - 8039326: 68fb ldr r3, [r7, #12] - 8039328: f64f 72ff movw r2, #65535 ; 0xffff - 803932c: 861a strh r2, [r3, #48] ; 0x30 + 8039356: 68fb ldr r3, [r7, #12] + 8039358: f64f 72ff movw r2, #65535 ; 0xffff + 803935c: 861a strh r2, [r3, #48] ; 0x30 pcb->cwnd = 1; - 803932e: 68fb ldr r3, [r7, #12] - 8039330: 2201 movs r2, #1 - 8039332: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803935e: 68fb ldr r3, [r7, #12] + 8039360: 2201 movs r2, #1 + 8039362: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 pcb->tmr = tcp_ticks; - 8039336: 4b0d ldr r3, [pc, #52] ; (803936c ) - 8039338: 681a ldr r2, [r3, #0] - 803933a: 68fb ldr r3, [r7, #12] - 803933c: 621a str r2, [r3, #32] + 8039366: 4b0d ldr r3, [pc, #52] ; (803939c ) + 8039368: 681a ldr r2, [r3, #0] + 803936a: 68fb ldr r3, [r7, #12] + 803936c: 621a str r2, [r3, #32] pcb->last_timer = tcp_timer_ctr; - 803933e: 4b0c ldr r3, [pc, #48] ; (8039370 ) - 8039340: 781a ldrb r2, [r3, #0] - 8039342: 68fb ldr r3, [r7, #12] - 8039344: 779a strb r2, [r3, #30] + 803936e: 4b0c ldr r3, [pc, #48] ; (80393a0 ) + 8039370: 781a ldrb r2, [r3, #0] + 8039372: 68fb ldr r3, [r7, #12] + 8039374: 779a strb r2, [r3, #30] of using the largest advertised receive window. We've seen complications with receiving TCPs that use window scaling and/or window auto-tuning where the initial advertised window is very small and then grows rapidly once the connection is established. To avoid these complications, we set ssthresh to the largest effective cwnd (amount of in-flight data) that the sender can have. */ pcb->ssthresh = TCP_SND_BUF; - 8039346: 68fb ldr r3, [r7, #12] - 8039348: f44f 6206 mov.w r2, #2144 ; 0x860 - 803934c: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 8039376: 68fb ldr r3, [r7, #12] + 8039378: f44f 6206 mov.w r2, #2144 ; 0x860 + 803937c: f8a3 204a strh.w r2, [r3, #74] ; 0x4a #if LWIP_CALLBACK_API pcb->recv = tcp_recv_null; - 8039350: 68fb ldr r3, [r7, #12] - 8039352: 4a08 ldr r2, [pc, #32] ; (8039374 ) - 8039354: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8039380: 68fb ldr r3, [r7, #12] + 8039382: 4a08 ldr r2, [pc, #32] ; (80393a4 ) + 8039384: f8c3 2084 str.w r2, [r3, #132] ; 0x84 #endif /* LWIP_CALLBACK_API */ /* Init KEEPALIVE timer */ pcb->keep_idle = TCP_KEEPIDLE_DEFAULT; - 8039358: 68fb ldr r3, [r7, #12] - 803935a: 4a07 ldr r2, [pc, #28] ; (8039378 ) - 803935c: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 8039388: 68fb ldr r3, [r7, #12] + 803938a: 4a07 ldr r2, [pc, #28] ; (80393a8 ) + 803938c: f8c3 2094 str.w r2, [r3, #148] ; 0x94 #if LWIP_TCP_KEEPALIVE pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT; pcb->keep_cnt = TCP_KEEPCNT_DEFAULT; #endif /* LWIP_TCP_KEEPALIVE */ } return pcb; - 8039360: 68fb ldr r3, [r7, #12] -} - 8039362: 4618 mov r0, r3 - 8039364: 3710 adds r7, #16 - 8039366: 46bd mov sp, r7 - 8039368: bd80 pop {r7, pc} - 803936a: bf00 nop - 803936c: 2400e958 .word 0x2400e958 - 8039370: 2400e96e .word 0x2400e96e - 8039374: 0803902d .word 0x0803902d - 8039378: 006ddd00 .word 0x006ddd00 - -0803937c : + 8039390: 68fb ldr r3, [r7, #12] +} + 8039392: 4618 mov r0, r3 + 8039394: 3710 adds r7, #16 + 8039396: 46bd mov sp, r7 + 8039398: bd80 pop {r7, pc} + 803939a: bf00 nop + 803939c: 2400e958 .word 0x2400e958 + 80393a0: 2400e96e .word 0x2400e96e + 80393a4: 0803905d .word 0x0803905d + 80393a8: 006ddd00 .word 0x006ddd00 + +080393ac : * supply @ref IPADDR_TYPE_ANY as argument and bind to @ref IP_ANY_TYPE. * @return a new tcp_pcb that initially is in state CLOSED */ struct tcp_pcb * tcp_new_ip_type(u8_t type) { - 803937c: b580 push {r7, lr} - 803937e: b084 sub sp, #16 - 8039380: af00 add r7, sp, #0 - 8039382: 4603 mov r3, r0 - 8039384: 71fb strb r3, [r7, #7] + 80393ac: b580 push {r7, lr} + 80393ae: b084 sub sp, #16 + 80393b0: af00 add r7, sp, #0 + 80393b2: 4603 mov r3, r0 + 80393b4: 71fb strb r3, [r7, #7] struct tcp_pcb *pcb; pcb = tcp_alloc(TCP_PRIO_NORMAL); - 8039386: 2040 movs r0, #64 ; 0x40 - 8039388: f7ff ff74 bl 8039274 - 803938c: 60f8 str r0, [r7, #12] + 80393b6: 2040 movs r0, #64 ; 0x40 + 80393b8: f7ff ff74 bl 80392a4 + 80393bc: 60f8 str r0, [r7, #12] IP_SET_TYPE_VAL(pcb->remote_ip, type); } #else LWIP_UNUSED_ARG(type); #endif /* LWIP_IPV4 && LWIP_IPV6 */ return pcb; - 803938e: 68fb ldr r3, [r7, #12] + 80393be: 68fb ldr r3, [r7, #12] } - 8039390: 4618 mov r0, r3 - 8039392: 3710 adds r7, #16 - 8039394: 46bd mov sp, r7 - 8039396: bd80 pop {r7, pc} + 80393c0: 4618 mov r0, r3 + 80393c2: 3710 adds r7, #16 + 80393c4: 46bd mov sp, r7 + 80393c6: bd80 pop {r7, pc} -08039398 : +080393c8 : * @param pcb tcp_pcb to set the recv callback * @param recv callback function to call for this pcb when data is received */ void tcp_recv(struct tcp_pcb *pcb, tcp_recv_fn recv) { - 8039398: b580 push {r7, lr} - 803939a: b082 sub sp, #8 - 803939c: af00 add r7, sp, #0 - 803939e: 6078 str r0, [r7, #4] - 80393a0: 6039 str r1, [r7, #0] + 80393c8: b580 push {r7, lr} + 80393ca: b082 sub sp, #8 + 80393cc: af00 add r7, sp, #0 + 80393ce: 6078 str r0, [r7, #4] + 80393d0: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if (pcb != NULL) { - 80393a2: 687b ldr r3, [r7, #4] - 80393a4: 2b00 cmp r3, #0 - 80393a6: d00e beq.n 80393c6 + 80393d2: 687b ldr r3, [r7, #4] + 80393d4: 2b00 cmp r3, #0 + 80393d6: d00e beq.n 80393f6 LWIP_ASSERT("invalid socket state for recv callback", pcb->state != LISTEN); - 80393a8: 687b ldr r3, [r7, #4] - 80393aa: 7d1b ldrb r3, [r3, #20] - 80393ac: 2b01 cmp r3, #1 - 80393ae: d106 bne.n 80393be - 80393b0: 4b07 ldr r3, [pc, #28] ; (80393d0 ) - 80393b2: f240 72df movw r2, #2015 ; 0x7df - 80393b6: 4907 ldr r1, [pc, #28] ; (80393d4 ) - 80393b8: 4807 ldr r0, [pc, #28] ; (80393d8 ) - 80393ba: f007 fb91 bl 8040ae0 + 80393d8: 687b ldr r3, [r7, #4] + 80393da: 7d1b ldrb r3, [r3, #20] + 80393dc: 2b01 cmp r3, #1 + 80393de: d106 bne.n 80393ee + 80393e0: 4b07 ldr r3, [pc, #28] ; (8039400 ) + 80393e2: f240 72df movw r2, #2015 ; 0x7df + 80393e6: 4907 ldr r1, [pc, #28] ; (8039404 ) + 80393e8: 4807 ldr r0, [pc, #28] ; (8039408 ) + 80393ea: f007 fb91 bl 8040b10 pcb->recv = recv; - 80393be: 687b ldr r3, [r7, #4] - 80393c0: 683a ldr r2, [r7, #0] - 80393c2: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80393ee: 687b ldr r3, [r7, #4] + 80393f0: 683a ldr r2, [r7, #0] + 80393f2: f8c3 2084 str.w r2, [r3, #132] ; 0x84 } } - 80393c6: bf00 nop - 80393c8: 3708 adds r7, #8 - 80393ca: 46bd mov sp, r7 - 80393cc: bd80 pop {r7, pc} - 80393ce: bf00 nop - 80393d0: 08042d68 .word 0x08042d68 - 80393d4: 08043304 .word 0x08043304 - 80393d8: 08042dac .word 0x08042dac + 80393f6: bf00 nop + 80393f8: 3708 adds r7, #8 + 80393fa: 46bd mov sp, r7 + 80393fc: bd80 pop {r7, pc} + 80393fe: bf00 nop + 8039400: 08042d98 .word 0x08042d98 + 8039404: 08043334 .word 0x08043334 + 8039408: 08042ddc .word 0x08042ddc -080393dc : +0803940c : * @param pcb tcp_pcb to set the sent callback * @param sent callback function to call for this pcb when data is successfully sent */ void tcp_sent(struct tcp_pcb *pcb, tcp_sent_fn sent) { - 80393dc: b580 push {r7, lr} - 80393de: b082 sub sp, #8 - 80393e0: af00 add r7, sp, #0 - 80393e2: 6078 str r0, [r7, #4] - 80393e4: 6039 str r1, [r7, #0] + 803940c: b580 push {r7, lr} + 803940e: b082 sub sp, #8 + 8039410: af00 add r7, sp, #0 + 8039412: 6078 str r0, [r7, #4] + 8039414: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if (pcb != NULL) { - 80393e6: 687b ldr r3, [r7, #4] - 80393e8: 2b00 cmp r3, #0 - 80393ea: d00e beq.n 803940a + 8039416: 687b ldr r3, [r7, #4] + 8039418: 2b00 cmp r3, #0 + 803941a: d00e beq.n 803943a LWIP_ASSERT("invalid socket state for sent callback", pcb->state != LISTEN); - 80393ec: 687b ldr r3, [r7, #4] - 80393ee: 7d1b ldrb r3, [r3, #20] - 80393f0: 2b01 cmp r3, #1 - 80393f2: d106 bne.n 8039402 - 80393f4: 4b07 ldr r3, [pc, #28] ; (8039414 ) - 80393f6: f240 72f3 movw r2, #2035 ; 0x7f3 - 80393fa: 4907 ldr r1, [pc, #28] ; (8039418 ) - 80393fc: 4807 ldr r0, [pc, #28] ; (803941c ) - 80393fe: f007 fb6f bl 8040ae0 + 803941c: 687b ldr r3, [r7, #4] + 803941e: 7d1b ldrb r3, [r3, #20] + 8039420: 2b01 cmp r3, #1 + 8039422: d106 bne.n 8039432 + 8039424: 4b07 ldr r3, [pc, #28] ; (8039444 ) + 8039426: f240 72f3 movw r2, #2035 ; 0x7f3 + 803942a: 4907 ldr r1, [pc, #28] ; (8039448 ) + 803942c: 4807 ldr r0, [pc, #28] ; (803944c ) + 803942e: f007 fb6f bl 8040b10 pcb->sent = sent; - 8039402: 687b ldr r3, [r7, #4] - 8039404: 683a ldr r2, [r7, #0] - 8039406: f8c3 2080 str.w r2, [r3, #128] ; 0x80 + 8039432: 687b ldr r3, [r7, #4] + 8039434: 683a ldr r2, [r7, #0] + 8039436: f8c3 2080 str.w r2, [r3, #128] ; 0x80 } } - 803940a: bf00 nop - 803940c: 3708 adds r7, #8 - 803940e: 46bd mov sp, r7 - 8039410: bd80 pop {r7, pc} - 8039412: bf00 nop - 8039414: 08042d68 .word 0x08042d68 - 8039418: 0804332c .word 0x0804332c - 803941c: 08042dac .word 0x08042dac + 803943a: bf00 nop + 803943c: 3708 adds r7, #8 + 803943e: 46bd mov sp, r7 + 8039440: bd80 pop {r7, pc} + 8039442: bf00 nop + 8039444: 08042d98 .word 0x08042d98 + 8039448: 0804335c .word 0x0804335c + 803944c: 08042ddc .word 0x08042ddc -08039420 : +08039450 : * @param err callback function to call for this pcb when a fatal error * has occurred on the connection */ void tcp_err(struct tcp_pcb *pcb, tcp_err_fn err) { - 8039420: b580 push {r7, lr} - 8039422: b082 sub sp, #8 - 8039424: af00 add r7, sp, #0 - 8039426: 6078 str r0, [r7, #4] - 8039428: 6039 str r1, [r7, #0] + 8039450: b580 push {r7, lr} + 8039452: b082 sub sp, #8 + 8039454: af00 add r7, sp, #0 + 8039456: 6078 str r0, [r7, #4] + 8039458: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if (pcb != NULL) { - 803942a: 687b ldr r3, [r7, #4] - 803942c: 2b00 cmp r3, #0 - 803942e: d00e beq.n 803944e + 803945a: 687b ldr r3, [r7, #4] + 803945c: 2b00 cmp r3, #0 + 803945e: d00e beq.n 803947e LWIP_ASSERT("invalid socket state for err callback", pcb->state != LISTEN); - 8039430: 687b ldr r3, [r7, #4] - 8039432: 7d1b ldrb r3, [r3, #20] - 8039434: 2b01 cmp r3, #1 - 8039436: d106 bne.n 8039446 - 8039438: 4b07 ldr r3, [pc, #28] ; (8039458 ) - 803943a: f640 020d movw r2, #2061 ; 0x80d - 803943e: 4907 ldr r1, [pc, #28] ; (803945c ) - 8039440: 4807 ldr r0, [pc, #28] ; (8039460 ) - 8039442: f007 fb4d bl 8040ae0 + 8039460: 687b ldr r3, [r7, #4] + 8039462: 7d1b ldrb r3, [r3, #20] + 8039464: 2b01 cmp r3, #1 + 8039466: d106 bne.n 8039476 + 8039468: 4b07 ldr r3, [pc, #28] ; (8039488 ) + 803946a: f640 020d movw r2, #2061 ; 0x80d + 803946e: 4907 ldr r1, [pc, #28] ; (803948c ) + 8039470: 4807 ldr r0, [pc, #28] ; (8039490 ) + 8039472: f007 fb4d bl 8040b10 pcb->errf = err; - 8039446: 687b ldr r3, [r7, #4] - 8039448: 683a ldr r2, [r7, #0] - 803944a: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 8039476: 687b ldr r3, [r7, #4] + 8039478: 683a ldr r2, [r7, #0] + 803947a: f8c3 2090 str.w r2, [r3, #144] ; 0x90 } } - 803944e: bf00 nop - 8039450: 3708 adds r7, #8 - 8039452: 46bd mov sp, r7 - 8039454: bd80 pop {r7, pc} - 8039456: bf00 nop - 8039458: 08042d68 .word 0x08042d68 - 803945c: 08043354 .word 0x08043354 - 8039460: 08042dac .word 0x08042dac + 803947e: bf00 nop + 8039480: 3708 adds r7, #8 + 8039482: 46bd mov sp, r7 + 8039484: bd80 pop {r7, pc} + 8039486: bf00 nop + 8039488: 08042d98 .word 0x08042d98 + 803948c: 08043384 .word 0x08043384 + 8039490: 08042ddc .word 0x08042ddc -08039464 : +08039494 : * @param accept callback function to call for this pcb when LISTENing * connection has been connected to another host */ void tcp_accept(struct tcp_pcb *pcb, tcp_accept_fn accept) { - 8039464: b480 push {r7} - 8039466: b085 sub sp, #20 - 8039468: af00 add r7, sp, #0 - 803946a: 6078 str r0, [r7, #4] - 803946c: 6039 str r1, [r7, #0] + 8039494: b480 push {r7} + 8039496: b085 sub sp, #20 + 8039498: af00 add r7, sp, #0 + 803949a: 6078 str r0, [r7, #4] + 803949c: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if ((pcb != NULL) && (pcb->state == LISTEN)) { - 803946e: 687b ldr r3, [r7, #4] - 8039470: 2b00 cmp r3, #0 - 8039472: d008 beq.n 8039486 - 8039474: 687b ldr r3, [r7, #4] - 8039476: 7d1b ldrb r3, [r3, #20] - 8039478: 2b01 cmp r3, #1 - 803947a: d104 bne.n 8039486 + 803949e: 687b ldr r3, [r7, #4] + 80394a0: 2b00 cmp r3, #0 + 80394a2: d008 beq.n 80394b6 + 80394a4: 687b ldr r3, [r7, #4] + 80394a6: 7d1b ldrb r3, [r3, #20] + 80394a8: 2b01 cmp r3, #1 + 80394aa: d104 bne.n 80394b6 struct tcp_pcb_listen *lpcb = (struct tcp_pcb_listen *)pcb; - 803947c: 687b ldr r3, [r7, #4] - 803947e: 60fb str r3, [r7, #12] + 80394ac: 687b ldr r3, [r7, #4] + 80394ae: 60fb str r3, [r7, #12] lpcb->accept = accept; - 8039480: 68fb ldr r3, [r7, #12] - 8039482: 683a ldr r2, [r7, #0] - 8039484: 619a str r2, [r3, #24] + 80394b0: 68fb ldr r3, [r7, #12] + 80394b2: 683a ldr r2, [r7, #0] + 80394b4: 619a str r2, [r3, #24] } } - 8039486: bf00 nop - 8039488: 3714 adds r7, #20 - 803948a: 46bd mov sp, r7 - 803948c: f85d 7b04 ldr.w r7, [sp], #4 - 8039490: 4770 bx lr + 80394b6: bf00 nop + 80394b8: 3714 adds r7, #20 + 80394ba: 46bd mov sp, r7 + 80394bc: f85d 7b04 ldr.w r7, [sp], #4 + 80394c0: 4770 bx lr ... -08039494 : +080394c4 : * * @param pcb tcp_pcb to purge. The pcb itself is not deallocated! */ void tcp_pcb_purge(struct tcp_pcb *pcb) { - 8039494: b580 push {r7, lr} - 8039496: b082 sub sp, #8 - 8039498: af00 add r7, sp, #0 - 803949a: 6078 str r0, [r7, #4] + 80394c4: b580 push {r7, lr} + 80394c6: b082 sub sp, #8 + 80394c8: af00 add r7, sp, #0 + 80394ca: 6078 str r0, [r7, #4] LWIP_ERROR("tcp_pcb_purge: invalid pcb", pcb != NULL, return); - 803949c: 687b ldr r3, [r7, #4] - 803949e: 2b00 cmp r3, #0 - 80394a0: d107 bne.n 80394b2 - 80394a2: 4b21 ldr r3, [pc, #132] ; (8039528 ) - 80394a4: f640 0251 movw r2, #2129 ; 0x851 - 80394a8: 4920 ldr r1, [pc, #128] ; (803952c ) - 80394aa: 4821 ldr r0, [pc, #132] ; (8039530 ) - 80394ac: f007 fb18 bl 8040ae0 - 80394b0: e037 b.n 8039522 + 80394cc: 687b ldr r3, [r7, #4] + 80394ce: 2b00 cmp r3, #0 + 80394d0: d107 bne.n 80394e2 + 80394d2: 4b21 ldr r3, [pc, #132] ; (8039558 ) + 80394d4: f640 0251 movw r2, #2129 ; 0x851 + 80394d8: 4920 ldr r1, [pc, #128] ; (803955c ) + 80394da: 4821 ldr r0, [pc, #132] ; (8039560 ) + 80394dc: f007 fb18 bl 8040b10 + 80394e0: e037 b.n 8039552 if (pcb->state != CLOSED && - 80394b2: 687b ldr r3, [r7, #4] - 80394b4: 7d1b ldrb r3, [r3, #20] - 80394b6: 2b00 cmp r3, #0 - 80394b8: d033 beq.n 8039522 + 80394e2: 687b ldr r3, [r7, #4] + 80394e4: 7d1b ldrb r3, [r3, #20] + 80394e6: 2b00 cmp r3, #0 + 80394e8: d033 beq.n 8039552 pcb->state != TIME_WAIT && - 80394ba: 687b ldr r3, [r7, #4] - 80394bc: 7d1b ldrb r3, [r3, #20] + 80394ea: 687b ldr r3, [r7, #4] + 80394ec: 7d1b ldrb r3, [r3, #20] if (pcb->state != CLOSED && - 80394be: 2b0a cmp r3, #10 - 80394c0: d02f beq.n 8039522 + 80394ee: 2b0a cmp r3, #10 + 80394f0: d02f beq.n 8039552 pcb->state != LISTEN) { - 80394c2: 687b ldr r3, [r7, #4] - 80394c4: 7d1b ldrb r3, [r3, #20] + 80394f2: 687b ldr r3, [r7, #4] + 80394f4: 7d1b ldrb r3, [r3, #20] pcb->state != TIME_WAIT && - 80394c6: 2b01 cmp r3, #1 - 80394c8: d02b beq.n 8039522 + 80394f6: 2b01 cmp r3, #1 + 80394f8: d02b beq.n 8039552 LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n")); tcp_backlog_accepted(pcb); if (pcb->refused_data != NULL) { - 80394ca: 687b ldr r3, [r7, #4] - 80394cc: 6f9b ldr r3, [r3, #120] ; 0x78 - 80394ce: 2b00 cmp r3, #0 - 80394d0: d007 beq.n 80394e2 + 80394fa: 687b ldr r3, [r7, #4] + 80394fc: 6f9b ldr r3, [r3, #120] ; 0x78 + 80394fe: 2b00 cmp r3, #0 + 8039500: d007 beq.n 8039512 LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n")); pbuf_free(pcb->refused_data); - 80394d2: 687b ldr r3, [r7, #4] - 80394d4: 6f9b ldr r3, [r3, #120] ; 0x78 - 80394d6: 4618 mov r0, r3 - 80394d8: f7fe f918 bl 803770c + 8039502: 687b ldr r3, [r7, #4] + 8039504: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039506: 4618 mov r0, r3 + 8039508: f7fe f918 bl 803773c pcb->refused_data = NULL; - 80394dc: 687b ldr r3, [r7, #4] - 80394de: 2200 movs r2, #0 - 80394e0: 679a str r2, [r3, #120] ; 0x78 + 803950c: 687b ldr r3, [r7, #4] + 803950e: 2200 movs r2, #0 + 8039510: 679a str r2, [r3, #120] ; 0x78 } if (pcb->unacked != NULL) { LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n")); } #if TCP_QUEUE_OOSEQ if (pcb->ooseq != NULL) { - 80394e2: 687b ldr r3, [r7, #4] - 80394e4: 6f5b ldr r3, [r3, #116] ; 0x74 - 80394e6: 2b00 cmp r3, #0 - 80394e8: d002 beq.n 80394f0 + 8039512: 687b ldr r3, [r7, #4] + 8039514: 6f5b ldr r3, [r3, #116] ; 0x74 + 8039516: 2b00 cmp r3, #0 + 8039518: d002 beq.n 8039520 LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n")); tcp_free_ooseq(pcb); - 80394ea: 6878 ldr r0, [r7, #4] - 80394ec: f000 f986 bl 80397fc + 803951a: 6878 ldr r0, [r7, #4] + 803951c: f000 f986 bl 803982c } #endif /* TCP_QUEUE_OOSEQ */ /* Stop the retransmission timer as it will expect data on unacked queue if it fires */ pcb->rtime = -1; - 80394f0: 687b ldr r3, [r7, #4] - 80394f2: f64f 72ff movw r2, #65535 ; 0xffff - 80394f6: 861a strh r2, [r3, #48] ; 0x30 + 8039520: 687b ldr r3, [r7, #4] + 8039522: f64f 72ff movw r2, #65535 ; 0xffff + 8039526: 861a strh r2, [r3, #48] ; 0x30 tcp_segs_free(pcb->unsent); - 80394f8: 687b ldr r3, [r7, #4] - 80394fa: 6edb ldr r3, [r3, #108] ; 0x6c - 80394fc: 4618 mov r0, r3 - 80394fe: f7ff fd1d bl 8038f3c + 8039528: 687b ldr r3, [r7, #4] + 803952a: 6edb ldr r3, [r3, #108] ; 0x6c + 803952c: 4618 mov r0, r3 + 803952e: f7ff fd1d bl 8038f6c tcp_segs_free(pcb->unacked); - 8039502: 687b ldr r3, [r7, #4] - 8039504: 6f1b ldr r3, [r3, #112] ; 0x70 - 8039506: 4618 mov r0, r3 - 8039508: f7ff fd18 bl 8038f3c + 8039532: 687b ldr r3, [r7, #4] + 8039534: 6f1b ldr r3, [r3, #112] ; 0x70 + 8039536: 4618 mov r0, r3 + 8039538: f7ff fd18 bl 8038f6c pcb->unacked = pcb->unsent = NULL; - 803950c: 687b ldr r3, [r7, #4] - 803950e: 2200 movs r2, #0 - 8039510: 66da str r2, [r3, #108] ; 0x6c - 8039512: 687b ldr r3, [r7, #4] - 8039514: 6eda ldr r2, [r3, #108] ; 0x6c - 8039516: 687b ldr r3, [r7, #4] - 8039518: 671a str r2, [r3, #112] ; 0x70 + 803953c: 687b ldr r3, [r7, #4] + 803953e: 2200 movs r2, #0 + 8039540: 66da str r2, [r3, #108] ; 0x6c + 8039542: 687b ldr r3, [r7, #4] + 8039544: 6eda ldr r2, [r3, #108] ; 0x6c + 8039546: 687b ldr r3, [r7, #4] + 8039548: 671a str r2, [r3, #112] ; 0x70 #if TCP_OVERSIZE pcb->unsent_oversize = 0; - 803951a: 687b ldr r3, [r7, #4] - 803951c: 2200 movs r2, #0 - 803951e: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803954a: 687b ldr r3, [r7, #4] + 803954c: 2200 movs r2, #0 + 803954e: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 #endif /* TCP_OVERSIZE */ } } - 8039522: 3708 adds r7, #8 - 8039524: 46bd mov sp, r7 - 8039526: bd80 pop {r7, pc} - 8039528: 08042d68 .word 0x08042d68 - 803952c: 080433b4 .word 0x080433b4 - 8039530: 08042dac .word 0x08042dac + 8039552: 3708 adds r7, #8 + 8039554: 46bd mov sp, r7 + 8039556: bd80 pop {r7, pc} + 8039558: 08042d98 .word 0x08042d98 + 803955c: 080433e4 .word 0x080433e4 + 8039560: 08042ddc .word 0x08042ddc -08039534 : +08039564 : * @param pcblist PCB list to purge. * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated! */ void tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb) { - 8039534: b580 push {r7, lr} - 8039536: b084 sub sp, #16 - 8039538: af00 add r7, sp, #0 - 803953a: 6078 str r0, [r7, #4] - 803953c: 6039 str r1, [r7, #0] + 8039564: b580 push {r7, lr} + 8039566: b084 sub sp, #16 + 8039568: af00 add r7, sp, #0 + 803956a: 6078 str r0, [r7, #4] + 803956c: 6039 str r1, [r7, #0] LWIP_ASSERT("tcp_pcb_remove: invalid pcb", pcb != NULL); - 803953e: 683b ldr r3, [r7, #0] - 8039540: 2b00 cmp r3, #0 - 8039542: d106 bne.n 8039552 - 8039544: 4b3e ldr r3, [pc, #248] ; (8039640 ) - 8039546: f640 0283 movw r2, #2179 ; 0x883 - 803954a: 493e ldr r1, [pc, #248] ; (8039644 ) - 803954c: 483e ldr r0, [pc, #248] ; (8039648 ) - 803954e: f007 fac7 bl 8040ae0 + 803956e: 683b ldr r3, [r7, #0] + 8039570: 2b00 cmp r3, #0 + 8039572: d106 bne.n 8039582 + 8039574: 4b3e ldr r3, [pc, #248] ; (8039670 ) + 8039576: f640 0283 movw r2, #2179 ; 0x883 + 803957a: 493e ldr r1, [pc, #248] ; (8039674 ) + 803957c: 483e ldr r0, [pc, #248] ; (8039678 ) + 803957e: f007 fac7 bl 8040b10 LWIP_ASSERT("tcp_pcb_remove: invalid pcblist", pcblist != NULL); - 8039552: 687b ldr r3, [r7, #4] - 8039554: 2b00 cmp r3, #0 - 8039556: d106 bne.n 8039566 - 8039558: 4b39 ldr r3, [pc, #228] ; (8039640 ) - 803955a: f640 0284 movw r2, #2180 ; 0x884 - 803955e: 493b ldr r1, [pc, #236] ; (803964c ) - 8039560: 4839 ldr r0, [pc, #228] ; (8039648 ) - 8039562: f007 fabd bl 8040ae0 + 8039582: 687b ldr r3, [r7, #4] + 8039584: 2b00 cmp r3, #0 + 8039586: d106 bne.n 8039596 + 8039588: 4b39 ldr r3, [pc, #228] ; (8039670 ) + 803958a: f640 0284 movw r2, #2180 ; 0x884 + 803958e: 493b ldr r1, [pc, #236] ; (803967c ) + 8039590: 4839 ldr r0, [pc, #228] ; (8039678 ) + 8039592: f007 fabd bl 8040b10 TCP_RMV(pcblist, pcb); - 8039566: 687b ldr r3, [r7, #4] - 8039568: 681b ldr r3, [r3, #0] - 803956a: 683a ldr r2, [r7, #0] - 803956c: 429a cmp r2, r3 - 803956e: d105 bne.n 803957c - 8039570: 687b ldr r3, [r7, #4] - 8039572: 681b ldr r3, [r3, #0] - 8039574: 68da ldr r2, [r3, #12] - 8039576: 687b ldr r3, [r7, #4] - 8039578: 601a str r2, [r3, #0] - 803957a: e013 b.n 80395a4 - 803957c: 687b ldr r3, [r7, #4] - 803957e: 681b ldr r3, [r3, #0] - 8039580: 60fb str r3, [r7, #12] - 8039582: e00c b.n 803959e - 8039584: 68fb ldr r3, [r7, #12] - 8039586: 68db ldr r3, [r3, #12] - 8039588: 683a ldr r2, [r7, #0] - 803958a: 429a cmp r2, r3 - 803958c: d104 bne.n 8039598 - 803958e: 683b ldr r3, [r7, #0] - 8039590: 68da ldr r2, [r3, #12] - 8039592: 68fb ldr r3, [r7, #12] - 8039594: 60da str r2, [r3, #12] - 8039596: e005 b.n 80395a4 - 8039598: 68fb ldr r3, [r7, #12] - 803959a: 68db ldr r3, [r3, #12] - 803959c: 60fb str r3, [r7, #12] - 803959e: 68fb ldr r3, [r7, #12] - 80395a0: 2b00 cmp r3, #0 - 80395a2: d1ef bne.n 8039584 - 80395a4: 683b ldr r3, [r7, #0] - 80395a6: 2200 movs r2, #0 - 80395a8: 60da str r2, [r3, #12] + 8039596: 687b ldr r3, [r7, #4] + 8039598: 681b ldr r3, [r3, #0] + 803959a: 683a ldr r2, [r7, #0] + 803959c: 429a cmp r2, r3 + 803959e: d105 bne.n 80395ac + 80395a0: 687b ldr r3, [r7, #4] + 80395a2: 681b ldr r3, [r3, #0] + 80395a4: 68da ldr r2, [r3, #12] + 80395a6: 687b ldr r3, [r7, #4] + 80395a8: 601a str r2, [r3, #0] + 80395aa: e013 b.n 80395d4 + 80395ac: 687b ldr r3, [r7, #4] + 80395ae: 681b ldr r3, [r3, #0] + 80395b0: 60fb str r3, [r7, #12] + 80395b2: e00c b.n 80395ce + 80395b4: 68fb ldr r3, [r7, #12] + 80395b6: 68db ldr r3, [r3, #12] + 80395b8: 683a ldr r2, [r7, #0] + 80395ba: 429a cmp r2, r3 + 80395bc: d104 bne.n 80395c8 + 80395be: 683b ldr r3, [r7, #0] + 80395c0: 68da ldr r2, [r3, #12] + 80395c2: 68fb ldr r3, [r7, #12] + 80395c4: 60da str r2, [r3, #12] + 80395c6: e005 b.n 80395d4 + 80395c8: 68fb ldr r3, [r7, #12] + 80395ca: 68db ldr r3, [r3, #12] + 80395cc: 60fb str r3, [r7, #12] + 80395ce: 68fb ldr r3, [r7, #12] + 80395d0: 2b00 cmp r3, #0 + 80395d2: d1ef bne.n 80395b4 + 80395d4: 683b ldr r3, [r7, #0] + 80395d6: 2200 movs r2, #0 + 80395d8: 60da str r2, [r3, #12] tcp_pcb_purge(pcb); - 80395aa: 6838 ldr r0, [r7, #0] - 80395ac: f7ff ff72 bl 8039494 + 80395da: 6838 ldr r0, [r7, #0] + 80395dc: f7ff ff72 bl 80394c4 /* if there is an outstanding delayed ACKs, send it */ if ((pcb->state != TIME_WAIT) && - 80395b0: 683b ldr r3, [r7, #0] - 80395b2: 7d1b ldrb r3, [r3, #20] - 80395b4: 2b0a cmp r3, #10 - 80395b6: d013 beq.n 80395e0 + 80395e0: 683b ldr r3, [r7, #0] + 80395e2: 7d1b ldrb r3, [r3, #20] + 80395e4: 2b0a cmp r3, #10 + 80395e6: d013 beq.n 8039610 (pcb->state != LISTEN) && - 80395b8: 683b ldr r3, [r7, #0] - 80395ba: 7d1b ldrb r3, [r3, #20] + 80395e8: 683b ldr r3, [r7, #0] + 80395ea: 7d1b ldrb r3, [r3, #20] if ((pcb->state != TIME_WAIT) && - 80395bc: 2b01 cmp r3, #1 - 80395be: d00f beq.n 80395e0 + 80395ec: 2b01 cmp r3, #1 + 80395ee: d00f beq.n 8039610 (pcb->flags & TF_ACK_DELAY)) { - 80395c0: 683b ldr r3, [r7, #0] - 80395c2: 8b5b ldrh r3, [r3, #26] - 80395c4: f003 0301 and.w r3, r3, #1 + 80395f0: 683b ldr r3, [r7, #0] + 80395f2: 8b5b ldrh r3, [r3, #26] + 80395f4: f003 0301 and.w r3, r3, #1 (pcb->state != LISTEN) && - 80395c8: 2b00 cmp r3, #0 - 80395ca: d009 beq.n 80395e0 + 80395f8: 2b00 cmp r3, #0 + 80395fa: d009 beq.n 8039610 tcp_ack_now(pcb); - 80395cc: 683b ldr r3, [r7, #0] - 80395ce: 8b5b ldrh r3, [r3, #26] - 80395d0: f043 0302 orr.w r3, r3, #2 - 80395d4: b29a uxth r2, r3 - 80395d6: 683b ldr r3, [r7, #0] - 80395d8: 835a strh r2, [r3, #26] + 80395fc: 683b ldr r3, [r7, #0] + 80395fe: 8b5b ldrh r3, [r3, #26] + 8039600: f043 0302 orr.w r3, r3, #2 + 8039604: b29a uxth r2, r3 + 8039606: 683b ldr r3, [r7, #0] + 8039608: 835a strh r2, [r3, #26] tcp_output(pcb); - 80395da: 6838 ldr r0, [r7, #0] - 80395dc: f003 fbc6 bl 803cd6c + 803960a: 6838 ldr r0, [r7, #0] + 803960c: f003 fbc6 bl 803cd9c } if (pcb->state != LISTEN) { - 80395e0: 683b ldr r3, [r7, #0] - 80395e2: 7d1b ldrb r3, [r3, #20] - 80395e4: 2b01 cmp r3, #1 - 80395e6: d020 beq.n 803962a + 8039610: 683b ldr r3, [r7, #0] + 8039612: 7d1b ldrb r3, [r3, #20] + 8039614: 2b01 cmp r3, #1 + 8039616: d020 beq.n 803965a LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL); - 80395e8: 683b ldr r3, [r7, #0] - 80395ea: 6edb ldr r3, [r3, #108] ; 0x6c - 80395ec: 2b00 cmp r3, #0 - 80395ee: d006 beq.n 80395fe - 80395f0: 4b13 ldr r3, [pc, #76] ; (8039640 ) - 80395f2: f640 0293 movw r2, #2195 ; 0x893 - 80395f6: 4916 ldr r1, [pc, #88] ; (8039650 ) - 80395f8: 4813 ldr r0, [pc, #76] ; (8039648 ) - 80395fa: f007 fa71 bl 8040ae0 + 8039618: 683b ldr r3, [r7, #0] + 803961a: 6edb ldr r3, [r3, #108] ; 0x6c + 803961c: 2b00 cmp r3, #0 + 803961e: d006 beq.n 803962e + 8039620: 4b13 ldr r3, [pc, #76] ; (8039670 ) + 8039622: f640 0293 movw r2, #2195 ; 0x893 + 8039626: 4916 ldr r1, [pc, #88] ; (8039680 ) + 8039628: 4813 ldr r0, [pc, #76] ; (8039678 ) + 803962a: f007 fa71 bl 8040b10 LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL); - 80395fe: 683b ldr r3, [r7, #0] - 8039600: 6f1b ldr r3, [r3, #112] ; 0x70 - 8039602: 2b00 cmp r3, #0 - 8039604: d006 beq.n 8039614 - 8039606: 4b0e ldr r3, [pc, #56] ; (8039640 ) - 8039608: f640 0294 movw r2, #2196 ; 0x894 - 803960c: 4911 ldr r1, [pc, #68] ; (8039654 ) - 803960e: 480e ldr r0, [pc, #56] ; (8039648 ) - 8039610: f007 fa66 bl 8040ae0 + 803962e: 683b ldr r3, [r7, #0] + 8039630: 6f1b ldr r3, [r3, #112] ; 0x70 + 8039632: 2b00 cmp r3, #0 + 8039634: d006 beq.n 8039644 + 8039636: 4b0e ldr r3, [pc, #56] ; (8039670 ) + 8039638: f640 0294 movw r2, #2196 ; 0x894 + 803963c: 4911 ldr r1, [pc, #68] ; (8039684 ) + 803963e: 480e ldr r0, [pc, #56] ; (8039678 ) + 8039640: f007 fa66 bl 8040b10 #if TCP_QUEUE_OOSEQ LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL); - 8039614: 683b ldr r3, [r7, #0] - 8039616: 6f5b ldr r3, [r3, #116] ; 0x74 - 8039618: 2b00 cmp r3, #0 - 803961a: d006 beq.n 803962a - 803961c: 4b08 ldr r3, [pc, #32] ; (8039640 ) - 803961e: f640 0296 movw r2, #2198 ; 0x896 - 8039622: 490d ldr r1, [pc, #52] ; (8039658 ) - 8039624: 4808 ldr r0, [pc, #32] ; (8039648 ) - 8039626: f007 fa5b bl 8040ae0 + 8039644: 683b ldr r3, [r7, #0] + 8039646: 6f5b ldr r3, [r3, #116] ; 0x74 + 8039648: 2b00 cmp r3, #0 + 803964a: d006 beq.n 803965a + 803964c: 4b08 ldr r3, [pc, #32] ; (8039670 ) + 803964e: f640 0296 movw r2, #2198 ; 0x896 + 8039652: 490d ldr r1, [pc, #52] ; (8039688 ) + 8039654: 4808 ldr r0, [pc, #32] ; (8039678 ) + 8039656: f007 fa5b bl 8040b10 #endif /* TCP_QUEUE_OOSEQ */ } pcb->state = CLOSED; - 803962a: 683b ldr r3, [r7, #0] - 803962c: 2200 movs r2, #0 - 803962e: 751a strb r2, [r3, #20] + 803965a: 683b ldr r3, [r7, #0] + 803965c: 2200 movs r2, #0 + 803965e: 751a strb r2, [r3, #20] /* reset the local port to prevent the pcb from being 'bound' */ pcb->local_port = 0; - 8039630: 683b ldr r3, [r7, #0] - 8039632: 2200 movs r2, #0 - 8039634: 82da strh r2, [r3, #22] + 8039660: 683b ldr r3, [r7, #0] + 8039662: 2200 movs r2, #0 + 8039664: 82da strh r2, [r3, #22] LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane()); } - 8039636: bf00 nop - 8039638: 3710 adds r7, #16 - 803963a: 46bd mov sp, r7 - 803963c: bd80 pop {r7, pc} - 803963e: bf00 nop - 8039640: 08042d68 .word 0x08042d68 - 8039644: 080433d0 .word 0x080433d0 - 8039648: 08042dac .word 0x08042dac - 803964c: 080433ec .word 0x080433ec - 8039650: 0804340c .word 0x0804340c - 8039654: 08043424 .word 0x08043424 - 8039658: 08043440 .word 0x08043440 - -0803965c : + 8039666: bf00 nop + 8039668: 3710 adds r7, #16 + 803966a: 46bd mov sp, r7 + 803966c: bd80 pop {r7, pc} + 803966e: bf00 nop + 8039670: 08042d98 .word 0x08042d98 + 8039674: 08043400 .word 0x08043400 + 8039678: 08042ddc .word 0x08042ddc + 803967c: 0804341c .word 0x0804341c + 8039680: 0804343c .word 0x0804343c + 8039684: 08043454 .word 0x08043454 + 8039688: 08043470 .word 0x08043470 + +0803968c : * * @return u32_t pseudo random sequence number */ u32_t tcp_next_iss(struct tcp_pcb *pcb) { - 803965c: b580 push {r7, lr} - 803965e: b082 sub sp, #8 - 8039660: af00 add r7, sp, #0 - 8039662: 6078 str r0, [r7, #4] + 803968c: b580 push {r7, lr} + 803968e: b082 sub sp, #8 + 8039690: af00 add r7, sp, #0 + 8039692: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL); return LWIP_HOOK_TCP_ISN(&pcb->local_ip, pcb->local_port, &pcb->remote_ip, pcb->remote_port); #else /* LWIP_HOOK_TCP_ISN */ static u32_t iss = 6510; LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL); - 8039664: 687b ldr r3, [r7, #4] - 8039666: 2b00 cmp r3, #0 - 8039668: d106 bne.n 8039678 - 803966a: 4b0a ldr r3, [pc, #40] ; (8039694 ) - 803966c: f640 02af movw r2, #2223 ; 0x8af - 8039670: 4909 ldr r1, [pc, #36] ; (8039698 ) - 8039672: 480a ldr r0, [pc, #40] ; (803969c ) - 8039674: f007 fa34 bl 8040ae0 + 8039694: 687b ldr r3, [r7, #4] + 8039696: 2b00 cmp r3, #0 + 8039698: d106 bne.n 80396a8 + 803969a: 4b0a ldr r3, [pc, #40] ; (80396c4 ) + 803969c: f640 02af movw r2, #2223 ; 0x8af + 80396a0: 4909 ldr r1, [pc, #36] ; (80396c8 ) + 80396a2: 480a ldr r0, [pc, #40] ; (80396cc ) + 80396a4: f007 fa34 bl 8040b10 LWIP_UNUSED_ARG(pcb); iss += tcp_ticks; /* XXX */ - 8039678: 4b09 ldr r3, [pc, #36] ; (80396a0 ) - 803967a: 681a ldr r2, [r3, #0] - 803967c: 4b09 ldr r3, [pc, #36] ; (80396a4 ) - 803967e: 681b ldr r3, [r3, #0] - 8039680: 4413 add r3, r2 - 8039682: 4a07 ldr r2, [pc, #28] ; (80396a0 ) - 8039684: 6013 str r3, [r2, #0] + 80396a8: 4b09 ldr r3, [pc, #36] ; (80396d0 ) + 80396aa: 681a ldr r2, [r3, #0] + 80396ac: 4b09 ldr r3, [pc, #36] ; (80396d4 ) + 80396ae: 681b ldr r3, [r3, #0] + 80396b0: 4413 add r3, r2 + 80396b2: 4a07 ldr r2, [pc, #28] ; (80396d0 ) + 80396b4: 6013 str r3, [r2, #0] return iss; - 8039686: 4b06 ldr r3, [pc, #24] ; (80396a0 ) - 8039688: 681b ldr r3, [r3, #0] + 80396b6: 4b06 ldr r3, [pc, #24] ; (80396d0 ) + 80396b8: 681b ldr r3, [r3, #0] #endif /* LWIP_HOOK_TCP_ISN */ } - 803968a: 4618 mov r0, r3 - 803968c: 3708 adds r7, #8 - 803968e: 46bd mov sp, r7 - 8039690: bd80 pop {r7, pc} - 8039692: bf00 nop - 8039694: 08042d68 .word 0x08042d68 - 8039698: 08043458 .word 0x08043458 - 803969c: 08042dac .word 0x08042dac - 80396a0: 24000070 .word 0x24000070 - 80396a4: 2400e958 .word 0x2400e958 - -080396a8 : + 80396ba: 4618 mov r0, r3 + 80396bc: 3708 adds r7, #8 + 80396be: 46bd mov sp, r7 + 80396c0: bd80 pop {r7, pc} + 80396c2: bf00 nop + 80396c4: 08042d98 .word 0x08042d98 + 80396c8: 08043488 .word 0x08043488 + 80396cc: 08042ddc .word 0x08042ddc + 80396d0: 24000070 .word 0x24000070 + 80396d4: 2400e958 .word 0x2400e958 + +080396d8 : * by calculating the minimum of TCP_MSS and the mtu (if set) of the target * netif (if not NULL). */ u16_t tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif, const ip_addr_t *dest) { - 80396a8: b580 push {r7, lr} - 80396aa: b086 sub sp, #24 - 80396ac: af00 add r7, sp, #0 - 80396ae: 4603 mov r3, r0 - 80396b0: 60b9 str r1, [r7, #8] - 80396b2: 607a str r2, [r7, #4] - 80396b4: 81fb strh r3, [r7, #14] + 80396d8: b580 push {r7, lr} + 80396da: b086 sub sp, #24 + 80396dc: af00 add r7, sp, #0 + 80396de: 4603 mov r3, r0 + 80396e0: 60b9 str r1, [r7, #8] + 80396e2: 607a str r2, [r7, #4] + 80396e4: 81fb strh r3, [r7, #14] u16_t mss_s; u16_t mtu; LWIP_UNUSED_ARG(dest); /* in case IPv6 is disabled */ LWIP_ASSERT("tcp_eff_send_mss_netif: invalid dst_ip", dest != NULL); - 80396b6: 687b ldr r3, [r7, #4] - 80396b8: 2b00 cmp r3, #0 - 80396ba: d106 bne.n 80396ca - 80396bc: 4b14 ldr r3, [pc, #80] ; (8039710 ) - 80396be: f640 02c5 movw r2, #2245 ; 0x8c5 - 80396c2: 4914 ldr r1, [pc, #80] ; (8039714 ) - 80396c4: 4814 ldr r0, [pc, #80] ; (8039718 ) - 80396c6: f007 fa0b bl 8040ae0 + 80396e6: 687b ldr r3, [r7, #4] + 80396e8: 2b00 cmp r3, #0 + 80396ea: d106 bne.n 80396fa + 80396ec: 4b14 ldr r3, [pc, #80] ; (8039740 ) + 80396ee: f640 02c5 movw r2, #2245 ; 0x8c5 + 80396f2: 4914 ldr r1, [pc, #80] ; (8039744 ) + 80396f4: 4814 ldr r0, [pc, #80] ; (8039748 ) + 80396f6: f007 fa0b bl 8040b10 else #endif /* LWIP_IPV4 */ #endif /* LWIP_IPV6 */ #if LWIP_IPV4 { if (outif == NULL) { - 80396ca: 68bb ldr r3, [r7, #8] - 80396cc: 2b00 cmp r3, #0 - 80396ce: d101 bne.n 80396d4 + 80396fa: 68bb ldr r3, [r7, #8] + 80396fc: 2b00 cmp r3, #0 + 80396fe: d101 bne.n 8039704 return sendmss; - 80396d0: 89fb ldrh r3, [r7, #14] - 80396d2: e019 b.n 8039708 + 8039700: 89fb ldrh r3, [r7, #14] + 8039702: e019 b.n 8039738 } mtu = outif->mtu; - 80396d4: 68bb ldr r3, [r7, #8] - 80396d6: 8d1b ldrh r3, [r3, #40] ; 0x28 - 80396d8: 82fb strh r3, [r7, #22] + 8039704: 68bb ldr r3, [r7, #8] + 8039706: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8039708: 82fb strh r3, [r7, #22] } #endif /* LWIP_IPV4 */ if (mtu != 0) { - 80396da: 8afb ldrh r3, [r7, #22] - 80396dc: 2b00 cmp r3, #0 - 80396de: d012 beq.n 8039706 + 803970a: 8afb ldrh r3, [r7, #22] + 803970c: 2b00 cmp r3, #0 + 803970e: d012 beq.n 8039736 else #endif /* LWIP_IPV4 */ #endif /* LWIP_IPV6 */ #if LWIP_IPV4 { offset = IP_HLEN + TCP_HLEN; - 80396e0: 2328 movs r3, #40 ; 0x28 - 80396e2: 82bb strh r3, [r7, #20] + 8039710: 2328 movs r3, #40 ; 0x28 + 8039712: 82bb strh r3, [r7, #20] } #endif /* LWIP_IPV4 */ mss_s = (mtu > offset) ? (u16_t)(mtu - offset) : 0; - 80396e4: 8afa ldrh r2, [r7, #22] - 80396e6: 8abb ldrh r3, [r7, #20] - 80396e8: 429a cmp r2, r3 - 80396ea: d904 bls.n 80396f6 - 80396ec: 8afa ldrh r2, [r7, #22] - 80396ee: 8abb ldrh r3, [r7, #20] - 80396f0: 1ad3 subs r3, r2, r3 - 80396f2: b29b uxth r3, r3 - 80396f4: e000 b.n 80396f8 - 80396f6: 2300 movs r3, #0 - 80396f8: 827b strh r3, [r7, #18] + 8039714: 8afa ldrh r2, [r7, #22] + 8039716: 8abb ldrh r3, [r7, #20] + 8039718: 429a cmp r2, r3 + 803971a: d904 bls.n 8039726 + 803971c: 8afa ldrh r2, [r7, #22] + 803971e: 8abb ldrh r3, [r7, #20] + 8039720: 1ad3 subs r3, r2, r3 + 8039722: b29b uxth r3, r3 + 8039724: e000 b.n 8039728 + 8039726: 2300 movs r3, #0 + 8039728: 827b strh r3, [r7, #18] /* RFC 1122, chap 4.2.2.6: * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize * We correct for TCP options in tcp_write(), and don't support IP options. */ sendmss = LWIP_MIN(sendmss, mss_s); - 80396fa: 8a7a ldrh r2, [r7, #18] - 80396fc: 89fb ldrh r3, [r7, #14] - 80396fe: 4293 cmp r3, r2 - 8039700: bf28 it cs - 8039702: 4613 movcs r3, r2 - 8039704: 81fb strh r3, [r7, #14] + 803972a: 8a7a ldrh r2, [r7, #18] + 803972c: 89fb ldrh r3, [r7, #14] + 803972e: 4293 cmp r3, r2 + 8039730: bf28 it cs + 8039732: 4613 movcs r3, r2 + 8039734: 81fb strh r3, [r7, #14] } return sendmss; - 8039706: 89fb ldrh r3, [r7, #14] + 8039736: 89fb ldrh r3, [r7, #14] } - 8039708: 4618 mov r0, r3 - 803970a: 3718 adds r7, #24 - 803970c: 46bd mov sp, r7 - 803970e: bd80 pop {r7, pc} - 8039710: 08042d68 .word 0x08042d68 - 8039714: 08043474 .word 0x08043474 - 8039718: 08042dac .word 0x08042dac + 8039738: 4618 mov r0, r3 + 803973a: 3718 adds r7, #24 + 803973c: 46bd mov sp, r7 + 803973e: bd80 pop {r7, pc} + 8039740: 08042d98 .word 0x08042d98 + 8039744: 080434a4 .word 0x080434a4 + 8039748: 08042ddc .word 0x08042ddc -0803971c : +0803974c : #endif /* TCP_CALCULATE_EFF_SEND_MSS */ /** Helper function for tcp_netif_ip_addr_changed() that iterates a pcb list */ static void tcp_netif_ip_addr_changed_pcblist(const ip_addr_t *old_addr, struct tcp_pcb *pcb_list) { - 803971c: b580 push {r7, lr} - 803971e: b084 sub sp, #16 - 8039720: af00 add r7, sp, #0 - 8039722: 6078 str r0, [r7, #4] - 8039724: 6039 str r1, [r7, #0] + 803974c: b580 push {r7, lr} + 803974e: b084 sub sp, #16 + 8039750: af00 add r7, sp, #0 + 8039752: 6078 str r0, [r7, #4] + 8039754: 6039 str r1, [r7, #0] struct tcp_pcb *pcb; pcb = pcb_list; - 8039726: 683b ldr r3, [r7, #0] - 8039728: 60fb str r3, [r7, #12] + 8039756: 683b ldr r3, [r7, #0] + 8039758: 60fb str r3, [r7, #12] LWIP_ASSERT("tcp_netif_ip_addr_changed_pcblist: invalid old_addr", old_addr != NULL); - 803972a: 687b ldr r3, [r7, #4] - 803972c: 2b00 cmp r3, #0 - 803972e: d119 bne.n 8039764 - 8039730: 4b10 ldr r3, [pc, #64] ; (8039774 ) - 8039732: f44f 6210 mov.w r2, #2304 ; 0x900 - 8039736: 4910 ldr r1, [pc, #64] ; (8039778 ) - 8039738: 4810 ldr r0, [pc, #64] ; (803977c ) - 803973a: f007 f9d1 bl 8040ae0 + 803975a: 687b ldr r3, [r7, #4] + 803975c: 2b00 cmp r3, #0 + 803975e: d119 bne.n 8039794 + 8039760: 4b10 ldr r3, [pc, #64] ; (80397a4 ) + 8039762: f44f 6210 mov.w r2, #2304 ; 0x900 + 8039766: 4910 ldr r1, [pc, #64] ; (80397a8 ) + 8039768: 4810 ldr r0, [pc, #64] ; (80397ac ) + 803976a: f007 f9d1 bl 8040b10 while (pcb != NULL) { - 803973e: e011 b.n 8039764 + 803976e: e011 b.n 8039794 /* PCB bound to current local interface address? */ if (ip_addr_cmp(&pcb->local_ip, old_addr) - 8039740: 68fb ldr r3, [r7, #12] - 8039742: 681a ldr r2, [r3, #0] - 8039744: 687b ldr r3, [r7, #4] - 8039746: 681b ldr r3, [r3, #0] - 8039748: 429a cmp r2, r3 - 803974a: d108 bne.n 803975e + 8039770: 68fb ldr r3, [r7, #12] + 8039772: 681a ldr r2, [r3, #0] + 8039774: 687b ldr r3, [r7, #4] + 8039776: 681b ldr r3, [r3, #0] + 8039778: 429a cmp r2, r3 + 803977a: d108 bne.n 803978e /* connections to link-local addresses must persist (RFC3927 ch. 1.9) */ && (!IP_IS_V4_VAL(pcb->local_ip) || !ip4_addr_islinklocal(ip_2_ip4(&pcb->local_ip))) #endif /* LWIP_AUTOIP */ ) { /* this connection must be aborted */ struct tcp_pcb *next = pcb->next; - 803974c: 68fb ldr r3, [r7, #12] - 803974e: 68db ldr r3, [r3, #12] - 8039750: 60bb str r3, [r7, #8] + 803977c: 68fb ldr r3, [r7, #12] + 803977e: 68db ldr r3, [r3, #12] + 8039780: 60bb str r3, [r7, #8] LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb)); tcp_abort(pcb); - 8039752: 68f8 ldr r0, [r7, #12] - 8039754: f7fe fd62 bl 803821c + 8039782: 68f8 ldr r0, [r7, #12] + 8039784: f7fe fd62 bl 803824c pcb = next; - 8039758: 68bb ldr r3, [r7, #8] - 803975a: 60fb str r3, [r7, #12] - 803975c: e002 b.n 8039764 + 8039788: 68bb ldr r3, [r7, #8] + 803978a: 60fb str r3, [r7, #12] + 803978c: e002 b.n 8039794 } else { pcb = pcb->next; - 803975e: 68fb ldr r3, [r7, #12] - 8039760: 68db ldr r3, [r3, #12] - 8039762: 60fb str r3, [r7, #12] + 803978e: 68fb ldr r3, [r7, #12] + 8039790: 68db ldr r3, [r3, #12] + 8039792: 60fb str r3, [r7, #12] while (pcb != NULL) { - 8039764: 68fb ldr r3, [r7, #12] - 8039766: 2b00 cmp r3, #0 - 8039768: d1ea bne.n 8039740 + 8039794: 68fb ldr r3, [r7, #12] + 8039796: 2b00 cmp r3, #0 + 8039798: d1ea bne.n 8039770 } } } - 803976a: bf00 nop - 803976c: bf00 nop - 803976e: 3710 adds r7, #16 - 8039770: 46bd mov sp, r7 - 8039772: bd80 pop {r7, pc} - 8039774: 08042d68 .word 0x08042d68 - 8039778: 0804349c .word 0x0804349c - 803977c: 08042dac .word 0x08042dac + 803979a: bf00 nop + 803979c: bf00 nop + 803979e: 3710 adds r7, #16 + 80397a0: 46bd mov sp, r7 + 80397a2: bd80 pop {r7, pc} + 80397a4: 08042d98 .word 0x08042d98 + 80397a8: 080434cc .word 0x080434cc + 80397ac: 08042ddc .word 0x08042ddc -08039780 : +080397b0 : * @param old_addr IP address of the netif before change * @param new_addr IP address of the netif after change or NULL if netif has been removed */ void tcp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr) { - 8039780: b580 push {r7, lr} - 8039782: b084 sub sp, #16 - 8039784: af00 add r7, sp, #0 - 8039786: 6078 str r0, [r7, #4] - 8039788: 6039 str r1, [r7, #0] + 80397b0: b580 push {r7, lr} + 80397b2: b084 sub sp, #16 + 80397b4: af00 add r7, sp, #0 + 80397b6: 6078 str r0, [r7, #4] + 80397b8: 6039 str r1, [r7, #0] struct tcp_pcb_listen *lpcb; if (!ip_addr_isany(old_addr)) { - 803978a: 687b ldr r3, [r7, #4] - 803978c: 2b00 cmp r3, #0 - 803978e: d02a beq.n 80397e6 - 8039790: 687b ldr r3, [r7, #4] - 8039792: 681b ldr r3, [r3, #0] - 8039794: 2b00 cmp r3, #0 - 8039796: d026 beq.n 80397e6 + 80397ba: 687b ldr r3, [r7, #4] + 80397bc: 2b00 cmp r3, #0 + 80397be: d02a beq.n 8039816 + 80397c0: 687b ldr r3, [r7, #4] + 80397c2: 681b ldr r3, [r3, #0] + 80397c4: 2b00 cmp r3, #0 + 80397c6: d026 beq.n 8039816 tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_active_pcbs); - 8039798: 4b15 ldr r3, [pc, #84] ; (80397f0 ) - 803979a: 681b ldr r3, [r3, #0] - 803979c: 4619 mov r1, r3 - 803979e: 6878 ldr r0, [r7, #4] - 80397a0: f7ff ffbc bl 803971c + 80397c8: 4b15 ldr r3, [pc, #84] ; (8039820 ) + 80397ca: 681b ldr r3, [r3, #0] + 80397cc: 4619 mov r1, r3 + 80397ce: 6878 ldr r0, [r7, #4] + 80397d0: f7ff ffbc bl 803974c tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_bound_pcbs); - 80397a4: 4b13 ldr r3, [pc, #76] ; (80397f4 ) - 80397a6: 681b ldr r3, [r3, #0] - 80397a8: 4619 mov r1, r3 - 80397aa: 6878 ldr r0, [r7, #4] - 80397ac: f7ff ffb6 bl 803971c + 80397d4: 4b13 ldr r3, [pc, #76] ; (8039824 ) + 80397d6: 681b ldr r3, [r3, #0] + 80397d8: 4619 mov r1, r3 + 80397da: 6878 ldr r0, [r7, #4] + 80397dc: f7ff ffb6 bl 803974c if (!ip_addr_isany(new_addr)) { - 80397b0: 683b ldr r3, [r7, #0] - 80397b2: 2b00 cmp r3, #0 - 80397b4: d017 beq.n 80397e6 - 80397b6: 683b ldr r3, [r7, #0] - 80397b8: 681b ldr r3, [r3, #0] - 80397ba: 2b00 cmp r3, #0 - 80397bc: d013 beq.n 80397e6 + 80397e0: 683b ldr r3, [r7, #0] + 80397e2: 2b00 cmp r3, #0 + 80397e4: d017 beq.n 8039816 + 80397e6: 683b ldr r3, [r7, #0] + 80397e8: 681b ldr r3, [r3, #0] + 80397ea: 2b00 cmp r3, #0 + 80397ec: d013 beq.n 8039816 /* PCB bound to current local interface address? */ for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - 80397be: 4b0e ldr r3, [pc, #56] ; (80397f8 ) - 80397c0: 681b ldr r3, [r3, #0] - 80397c2: 60fb str r3, [r7, #12] - 80397c4: e00c b.n 80397e0 + 80397ee: 4b0e ldr r3, [pc, #56] ; (8039828 ) + 80397f0: 681b ldr r3, [r3, #0] + 80397f2: 60fb str r3, [r7, #12] + 80397f4: e00c b.n 8039810 /* PCB bound to current local interface address? */ if (ip_addr_cmp(&lpcb->local_ip, old_addr)) { - 80397c6: 68fb ldr r3, [r7, #12] - 80397c8: 681a ldr r2, [r3, #0] - 80397ca: 687b ldr r3, [r7, #4] - 80397cc: 681b ldr r3, [r3, #0] - 80397ce: 429a cmp r2, r3 - 80397d0: d103 bne.n 80397da + 80397f6: 68fb ldr r3, [r7, #12] + 80397f8: 681a ldr r2, [r3, #0] + 80397fa: 687b ldr r3, [r7, #4] + 80397fc: 681b ldr r3, [r3, #0] + 80397fe: 429a cmp r2, r3 + 8039800: d103 bne.n 803980a /* The PCB is listening to the old ipaddr and * is set to listen to the new one instead */ ip_addr_copy(lpcb->local_ip, *new_addr); - 80397d2: 683b ldr r3, [r7, #0] - 80397d4: 681a ldr r2, [r3, #0] - 80397d6: 68fb ldr r3, [r7, #12] - 80397d8: 601a str r2, [r3, #0] + 8039802: 683b ldr r3, [r7, #0] + 8039804: 681a ldr r2, [r3, #0] + 8039806: 68fb ldr r3, [r7, #12] + 8039808: 601a str r2, [r3, #0] for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - 80397da: 68fb ldr r3, [r7, #12] - 80397dc: 68db ldr r3, [r3, #12] - 80397de: 60fb str r3, [r7, #12] - 80397e0: 68fb ldr r3, [r7, #12] - 80397e2: 2b00 cmp r3, #0 - 80397e4: d1ef bne.n 80397c6 + 803980a: 68fb ldr r3, [r7, #12] + 803980c: 68db ldr r3, [r3, #12] + 803980e: 60fb str r3, [r7, #12] + 8039810: 68fb ldr r3, [r7, #12] + 8039812: 2b00 cmp r3, #0 + 8039814: d1ef bne.n 80397f6 } } } } } - 80397e6: bf00 nop - 80397e8: 3710 adds r7, #16 - 80397ea: 46bd mov sp, r7 - 80397ec: bd80 pop {r7, pc} - 80397ee: bf00 nop - 80397f0: 2400e964 .word 0x2400e964 - 80397f4: 2400e95c .word 0x2400e95c - 80397f8: 2400e960 .word 0x2400e960 + 8039816: bf00 nop + 8039818: 3710 adds r7, #16 + 803981a: 46bd mov sp, r7 + 803981c: bd80 pop {r7, pc} + 803981e: bf00 nop + 8039820: 2400e964 .word 0x2400e964 + 8039824: 2400e95c .word 0x2400e95c + 8039828: 2400e960 .word 0x2400e960 -080397fc : +0803982c : #if TCP_QUEUE_OOSEQ /* Free all ooseq pbufs (and possibly reset SACK state) */ void tcp_free_ooseq(struct tcp_pcb *pcb) { - 80397fc: b580 push {r7, lr} - 80397fe: b082 sub sp, #8 - 8039800: af00 add r7, sp, #0 - 8039802: 6078 str r0, [r7, #4] + 803982c: b580 push {r7, lr} + 803982e: b082 sub sp, #8 + 8039830: af00 add r7, sp, #0 + 8039832: 6078 str r0, [r7, #4] if (pcb->ooseq) { - 8039804: 687b ldr r3, [r7, #4] - 8039806: 6f5b ldr r3, [r3, #116] ; 0x74 - 8039808: 2b00 cmp r3, #0 - 803980a: d007 beq.n 803981c + 8039834: 687b ldr r3, [r7, #4] + 8039836: 6f5b ldr r3, [r3, #116] ; 0x74 + 8039838: 2b00 cmp r3, #0 + 803983a: d007 beq.n 803984c tcp_segs_free(pcb->ooseq); - 803980c: 687b ldr r3, [r7, #4] - 803980e: 6f5b ldr r3, [r3, #116] ; 0x74 - 8039810: 4618 mov r0, r3 - 8039812: f7ff fb93 bl 8038f3c + 803983c: 687b ldr r3, [r7, #4] + 803983e: 6f5b ldr r3, [r3, #116] ; 0x74 + 8039840: 4618 mov r0, r3 + 8039842: f7ff fb93 bl 8038f6c pcb->ooseq = NULL; - 8039816: 687b ldr r3, [r7, #4] - 8039818: 2200 movs r2, #0 - 803981a: 675a str r2, [r3, #116] ; 0x74 + 8039846: 687b ldr r3, [r7, #4] + 8039848: 2200 movs r2, #0 + 803984a: 675a str r2, [r3, #116] ; 0x74 #if LWIP_TCP_SACK_OUT memset(pcb->rcv_sacks, 0, sizeof(pcb->rcv_sacks)); #endif /* LWIP_TCP_SACK_OUT */ } } - 803981c: bf00 nop - 803981e: 3708 adds r7, #8 - 8039820: 46bd mov sp, r7 - 8039822: bd80 pop {r7, pc} + 803984c: bf00 nop + 803984e: 3708 adds r7, #8 + 8039850: 46bd mov sp, r7 + 8039852: bd80 pop {r7, pc} -08039824 : +08039854 : * @param p received TCP segment to process (p->payload pointing to the TCP header) * @param inp network interface on which this segment was received */ void tcp_input(struct pbuf *p, struct netif *inp) { - 8039824: b590 push {r4, r7, lr} - 8039826: b08d sub sp, #52 ; 0x34 - 8039828: af04 add r7, sp, #16 - 803982a: 6078 str r0, [r7, #4] - 803982c: 6039 str r1, [r7, #0] + 8039854: b590 push {r4, r7, lr} + 8039856: b08d sub sp, #52 ; 0x34 + 8039858: af04 add r7, sp, #16 + 803985a: 6078 str r0, [r7, #4] + 803985c: 6039 str r1, [r7, #0] u8_t hdrlen_bytes; err_t err; LWIP_UNUSED_ARG(inp); LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("tcp_input: invalid pbuf", p != NULL); - 803982e: 687b ldr r3, [r7, #4] - 8039830: 2b00 cmp r3, #0 - 8039832: d105 bne.n 8039840 - 8039834: 4b9b ldr r3, [pc, #620] ; (8039aa4 ) - 8039836: 2283 movs r2, #131 ; 0x83 - 8039838: 499b ldr r1, [pc, #620] ; (8039aa8 ) - 803983a: 489c ldr r0, [pc, #624] ; (8039aac ) - 803983c: f007 f950 bl 8040ae0 + 803985e: 687b ldr r3, [r7, #4] + 8039860: 2b00 cmp r3, #0 + 8039862: d105 bne.n 8039870 + 8039864: 4b9b ldr r3, [pc, #620] ; (8039ad4 ) + 8039866: 2283 movs r2, #131 ; 0x83 + 8039868: 499b ldr r1, [pc, #620] ; (8039ad8 ) + 803986a: 489c ldr r0, [pc, #624] ; (8039adc ) + 803986c: f007 f950 bl 8040b10 PERF_START; TCP_STATS_INC(tcp.recv); MIB2_STATS_INC(mib2.tcpinsegs); tcphdr = (struct tcp_hdr *)p->payload; - 8039840: 687b ldr r3, [r7, #4] - 8039842: 685b ldr r3, [r3, #4] - 8039844: 4a9a ldr r2, [pc, #616] ; (8039ab0 ) - 8039846: 6013 str r3, [r2, #0] + 8039870: 687b ldr r3, [r7, #4] + 8039872: 685b ldr r3, [r3, #4] + 8039874: 4a9a ldr r2, [pc, #616] ; (8039ae0 ) + 8039876: 6013 str r3, [r2, #0] #if TCP_INPUT_DEBUG tcp_debug_print(tcphdr); #endif /* Check that TCP header fits in payload */ if (p->len < TCP_HLEN) { - 8039848: 687b ldr r3, [r7, #4] - 803984a: 895b ldrh r3, [r3, #10] - 803984c: 2b13 cmp r3, #19 - 803984e: f240 83d1 bls.w 8039ff4 + 8039878: 687b ldr r3, [r7, #4] + 803987a: 895b ldrh r3, [r3, #10] + 803987c: 2b13 cmp r3, #19 + 803987e: f240 83d1 bls.w 803a024 TCP_STATS_INC(tcp.lenerr); goto dropped; } /* Don't even process incoming broadcasts/multicasts. */ if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) || - 8039852: 4b98 ldr r3, [pc, #608] ; (8039ab4 ) - 8039854: 695b ldr r3, [r3, #20] - 8039856: 4a97 ldr r2, [pc, #604] ; (8039ab4 ) - 8039858: 6812 ldr r2, [r2, #0] - 803985a: 4611 mov r1, r2 - 803985c: 4618 mov r0, r3 - 803985e: f006 f895 bl 803f98c - 8039862: 4603 mov r3, r0 - 8039864: 2b00 cmp r3, #0 - 8039866: f040 83c7 bne.w 8039ff8 + 8039882: 4b98 ldr r3, [pc, #608] ; (8039ae4 ) + 8039884: 695b ldr r3, [r3, #20] + 8039886: 4a97 ldr r2, [pc, #604] ; (8039ae4 ) + 8039888: 6812 ldr r2, [r2, #0] + 803988a: 4611 mov r1, r2 + 803988c: 4618 mov r0, r3 + 803988e: f006 f895 bl 803f9bc + 8039892: 4603 mov r3, r0 + 8039894: 2b00 cmp r3, #0 + 8039896: f040 83c7 bne.w 803a028 ip_addr_ismulticast(ip_current_dest_addr())) { - 803986a: 4b92 ldr r3, [pc, #584] ; (8039ab4 ) - 803986c: 695b ldr r3, [r3, #20] - 803986e: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803989a: 4b92 ldr r3, [pc, #584] ; (8039ae4 ) + 803989c: 695b ldr r3, [r3, #20] + 803989e: f003 03f0 and.w r3, r3, #240 ; 0xf0 if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) || - 8039872: 2be0 cmp r3, #224 ; 0xe0 - 8039874: f000 83c0 beq.w 8039ff8 + 80398a2: 2be0 cmp r3, #224 ; 0xe0 + 80398a4: f000 83c0 beq.w 803a028 } } #endif /* CHECKSUM_CHECK_TCP */ /* sanity-check header length */ hdrlen_bytes = TCPH_HDRLEN_BYTES(tcphdr); - 8039878: 4b8d ldr r3, [pc, #564] ; (8039ab0 ) - 803987a: 681b ldr r3, [r3, #0] - 803987c: 899b ldrh r3, [r3, #12] - 803987e: b29b uxth r3, r3 - 8039880: 4618 mov r0, r3 - 8039882: f7fc fb11 bl 8035ea8 - 8039886: 4603 mov r3, r0 - 8039888: 0b1b lsrs r3, r3, #12 - 803988a: b29b uxth r3, r3 - 803988c: b2db uxtb r3, r3 - 803988e: 009b lsls r3, r3, #2 - 8039890: 74bb strb r3, [r7, #18] + 80398a8: 4b8d ldr r3, [pc, #564] ; (8039ae0 ) + 80398aa: 681b ldr r3, [r3, #0] + 80398ac: 899b ldrh r3, [r3, #12] + 80398ae: b29b uxth r3, r3 + 80398b0: 4618 mov r0, r3 + 80398b2: f7fc fb11 bl 8035ed8 + 80398b6: 4603 mov r3, r0 + 80398b8: 0b1b lsrs r3, r3, #12 + 80398ba: b29b uxth r3, r3 + 80398bc: b2db uxtb r3, r3 + 80398be: 009b lsls r3, r3, #2 + 80398c0: 74bb strb r3, [r7, #18] if ((hdrlen_bytes < TCP_HLEN) || (hdrlen_bytes > p->tot_len)) { - 8039892: 7cbb ldrb r3, [r7, #18] - 8039894: 2b13 cmp r3, #19 - 8039896: f240 83b1 bls.w 8039ffc - 803989a: 7cbb ldrb r3, [r7, #18] - 803989c: b29a uxth r2, r3 - 803989e: 687b ldr r3, [r7, #4] - 80398a0: 891b ldrh r3, [r3, #8] - 80398a2: 429a cmp r2, r3 - 80398a4: f200 83aa bhi.w 8039ffc + 80398c2: 7cbb ldrb r3, [r7, #18] + 80398c4: 2b13 cmp r3, #19 + 80398c6: f240 83b1 bls.w 803a02c + 80398ca: 7cbb ldrb r3, [r7, #18] + 80398cc: b29a uxth r2, r3 + 80398ce: 687b ldr r3, [r7, #4] + 80398d0: 891b ldrh r3, [r3, #8] + 80398d2: 429a cmp r2, r3 + 80398d4: f200 83aa bhi.w 803a02c goto dropped; } /* Move the payload pointer in the pbuf so that it points to the TCP data instead of the TCP header. */ tcphdr_optlen = (u16_t)(hdrlen_bytes - TCP_HLEN); - 80398a8: 7cbb ldrb r3, [r7, #18] - 80398aa: b29b uxth r3, r3 - 80398ac: 3b14 subs r3, #20 - 80398ae: b29a uxth r2, r3 - 80398b0: 4b81 ldr r3, [pc, #516] ; (8039ab8 ) - 80398b2: 801a strh r2, [r3, #0] + 80398d8: 7cbb ldrb r3, [r7, #18] + 80398da: b29b uxth r3, r3 + 80398dc: 3b14 subs r3, #20 + 80398de: b29a uxth r2, r3 + 80398e0: 4b81 ldr r3, [pc, #516] ; (8039ae8 ) + 80398e2: 801a strh r2, [r3, #0] tcphdr_opt2 = NULL; - 80398b4: 4b81 ldr r3, [pc, #516] ; (8039abc ) - 80398b6: 2200 movs r2, #0 - 80398b8: 601a str r2, [r3, #0] + 80398e4: 4b81 ldr r3, [pc, #516] ; (8039aec ) + 80398e6: 2200 movs r2, #0 + 80398e8: 601a str r2, [r3, #0] if (p->len >= hdrlen_bytes) { - 80398ba: 687b ldr r3, [r7, #4] - 80398bc: 895a ldrh r2, [r3, #10] - 80398be: 7cbb ldrb r3, [r7, #18] - 80398c0: b29b uxth r3, r3 - 80398c2: 429a cmp r2, r3 - 80398c4: d309 bcc.n 80398da + 80398ea: 687b ldr r3, [r7, #4] + 80398ec: 895a ldrh r2, [r3, #10] + 80398ee: 7cbb ldrb r3, [r7, #18] + 80398f0: b29b uxth r3, r3 + 80398f2: 429a cmp r2, r3 + 80398f4: d309 bcc.n 803990a /* all options are in the first pbuf */ tcphdr_opt1len = tcphdr_optlen; - 80398c6: 4b7c ldr r3, [pc, #496] ; (8039ab8 ) - 80398c8: 881a ldrh r2, [r3, #0] - 80398ca: 4b7d ldr r3, [pc, #500] ; (8039ac0 ) - 80398cc: 801a strh r2, [r3, #0] + 80398f6: 4b7c ldr r3, [pc, #496] ; (8039ae8 ) + 80398f8: 881a ldrh r2, [r3, #0] + 80398fa: 4b7d ldr r3, [pc, #500] ; (8039af0 ) + 80398fc: 801a strh r2, [r3, #0] pbuf_remove_header(p, hdrlen_bytes); /* cannot fail */ - 80398ce: 7cbb ldrb r3, [r7, #18] - 80398d0: 4619 mov r1, r3 - 80398d2: 6878 ldr r0, [r7, #4] - 80398d4: f7fd fe94 bl 8037600 - 80398d8: e04e b.n 8039978 + 80398fe: 7cbb ldrb r3, [r7, #18] + 8039900: 4619 mov r1, r3 + 8039902: 6878 ldr r0, [r7, #4] + 8039904: f7fd fe94 bl 8037630 + 8039908: e04e b.n 80399a8 } else { u16_t opt2len; /* TCP header fits into first pbuf, options don't - data is in the next pbuf */ /* there must be a next pbuf, due to hdrlen_bytes sanity check above */ LWIP_ASSERT("p->next != NULL", p->next != NULL); - 80398da: 687b ldr r3, [r7, #4] - 80398dc: 681b ldr r3, [r3, #0] - 80398de: 2b00 cmp r3, #0 - 80398e0: d105 bne.n 80398ee - 80398e2: 4b70 ldr r3, [pc, #448] ; (8039aa4 ) - 80398e4: 22c2 movs r2, #194 ; 0xc2 - 80398e6: 4977 ldr r1, [pc, #476] ; (8039ac4 ) - 80398e8: 4870 ldr r0, [pc, #448] ; (8039aac ) - 80398ea: f007 f8f9 bl 8040ae0 + 803990a: 687b ldr r3, [r7, #4] + 803990c: 681b ldr r3, [r3, #0] + 803990e: 2b00 cmp r3, #0 + 8039910: d105 bne.n 803991e + 8039912: 4b70 ldr r3, [pc, #448] ; (8039ad4 ) + 8039914: 22c2 movs r2, #194 ; 0xc2 + 8039916: 4977 ldr r1, [pc, #476] ; (8039af4 ) + 8039918: 4870 ldr r0, [pc, #448] ; (8039adc ) + 803991a: f007 f8f9 bl 8040b10 /* advance over the TCP header (cannot fail) */ pbuf_remove_header(p, TCP_HLEN); - 80398ee: 2114 movs r1, #20 - 80398f0: 6878 ldr r0, [r7, #4] - 80398f2: f7fd fe85 bl 8037600 + 803991e: 2114 movs r1, #20 + 8039920: 6878 ldr r0, [r7, #4] + 8039922: f7fd fe85 bl 8037630 /* determine how long the first and second parts of the options are */ tcphdr_opt1len = p->len; - 80398f6: 687b ldr r3, [r7, #4] - 80398f8: 895a ldrh r2, [r3, #10] - 80398fa: 4b71 ldr r3, [pc, #452] ; (8039ac0 ) - 80398fc: 801a strh r2, [r3, #0] + 8039926: 687b ldr r3, [r7, #4] + 8039928: 895a ldrh r2, [r3, #10] + 803992a: 4b71 ldr r3, [pc, #452] ; (8039af0 ) + 803992c: 801a strh r2, [r3, #0] opt2len = (u16_t)(tcphdr_optlen - tcphdr_opt1len); - 80398fe: 4b6e ldr r3, [pc, #440] ; (8039ab8 ) - 8039900: 881a ldrh r2, [r3, #0] - 8039902: 4b6f ldr r3, [pc, #444] ; (8039ac0 ) - 8039904: 881b ldrh r3, [r3, #0] - 8039906: 1ad3 subs r3, r2, r3 - 8039908: 823b strh r3, [r7, #16] + 803992e: 4b6e ldr r3, [pc, #440] ; (8039ae8 ) + 8039930: 881a ldrh r2, [r3, #0] + 8039932: 4b6f ldr r3, [pc, #444] ; (8039af0 ) + 8039934: 881b ldrh r3, [r3, #0] + 8039936: 1ad3 subs r3, r2, r3 + 8039938: 823b strh r3, [r7, #16] /* options continue in the next pbuf: set p to zero length and hide the options in the next pbuf (adjusting p->tot_len) */ pbuf_remove_header(p, tcphdr_opt1len); - 803990a: 4b6d ldr r3, [pc, #436] ; (8039ac0 ) - 803990c: 881b ldrh r3, [r3, #0] - 803990e: 4619 mov r1, r3 - 8039910: 6878 ldr r0, [r7, #4] - 8039912: f7fd fe75 bl 8037600 + 803993a: 4b6d ldr r3, [pc, #436] ; (8039af0 ) + 803993c: 881b ldrh r3, [r3, #0] + 803993e: 4619 mov r1, r3 + 8039940: 6878 ldr r0, [r7, #4] + 8039942: f7fd fe75 bl 8037630 /* check that the options fit in the second pbuf */ if (opt2len > p->next->len) { - 8039916: 687b ldr r3, [r7, #4] - 8039918: 681b ldr r3, [r3, #0] - 803991a: 895b ldrh r3, [r3, #10] - 803991c: 8a3a ldrh r2, [r7, #16] - 803991e: 429a cmp r2, r3 - 8039920: f200 836e bhi.w 803a000 + 8039946: 687b ldr r3, [r7, #4] + 8039948: 681b ldr r3, [r3, #0] + 803994a: 895b ldrh r3, [r3, #10] + 803994c: 8a3a ldrh r2, [r7, #16] + 803994e: 429a cmp r2, r3 + 8039950: f200 836e bhi.w 803a030 TCP_STATS_INC(tcp.lenerr); goto dropped; } /* remember the pointer to the second part of the options */ tcphdr_opt2 = (u8_t *)p->next->payload; - 8039924: 687b ldr r3, [r7, #4] - 8039926: 681b ldr r3, [r3, #0] - 8039928: 685b ldr r3, [r3, #4] - 803992a: 4a64 ldr r2, [pc, #400] ; (8039abc ) - 803992c: 6013 str r3, [r2, #0] + 8039954: 687b ldr r3, [r7, #4] + 8039956: 681b ldr r3, [r3, #0] + 8039958: 685b ldr r3, [r3, #4] + 803995a: 4a64 ldr r2, [pc, #400] ; (8039aec ) + 803995c: 6013 str r3, [r2, #0] /* advance p->next to point after the options, and manually adjust p->tot_len to keep it consistent with the changed p->next */ pbuf_remove_header(p->next, opt2len); - 803992e: 687b ldr r3, [r7, #4] - 8039930: 681b ldr r3, [r3, #0] - 8039932: 8a3a ldrh r2, [r7, #16] - 8039934: 4611 mov r1, r2 - 8039936: 4618 mov r0, r3 - 8039938: f7fd fe62 bl 8037600 + 803995e: 687b ldr r3, [r7, #4] + 8039960: 681b ldr r3, [r3, #0] + 8039962: 8a3a ldrh r2, [r7, #16] + 8039964: 4611 mov r1, r2 + 8039966: 4618 mov r0, r3 + 8039968: f7fd fe62 bl 8037630 p->tot_len = (u16_t)(p->tot_len - opt2len); - 803993c: 687b ldr r3, [r7, #4] - 803993e: 891a ldrh r2, [r3, #8] - 8039940: 8a3b ldrh r3, [r7, #16] - 8039942: 1ad3 subs r3, r2, r3 - 8039944: b29a uxth r2, r3 - 8039946: 687b ldr r3, [r7, #4] - 8039948: 811a strh r2, [r3, #8] + 803996c: 687b ldr r3, [r7, #4] + 803996e: 891a ldrh r2, [r3, #8] + 8039970: 8a3b ldrh r3, [r7, #16] + 8039972: 1ad3 subs r3, r2, r3 + 8039974: b29a uxth r2, r3 + 8039976: 687b ldr r3, [r7, #4] + 8039978: 811a strh r2, [r3, #8] LWIP_ASSERT("p->len == 0", p->len == 0); - 803994a: 687b ldr r3, [r7, #4] - 803994c: 895b ldrh r3, [r3, #10] - 803994e: 2b00 cmp r3, #0 - 8039950: d005 beq.n 803995e - 8039952: 4b54 ldr r3, [pc, #336] ; (8039aa4 ) - 8039954: 22df movs r2, #223 ; 0xdf - 8039956: 495c ldr r1, [pc, #368] ; (8039ac8 ) - 8039958: 4854 ldr r0, [pc, #336] ; (8039aac ) - 803995a: f007 f8c1 bl 8040ae0 + 803997a: 687b ldr r3, [r7, #4] + 803997c: 895b ldrh r3, [r3, #10] + 803997e: 2b00 cmp r3, #0 + 8039980: d005 beq.n 803998e + 8039982: 4b54 ldr r3, [pc, #336] ; (8039ad4 ) + 8039984: 22df movs r2, #223 ; 0xdf + 8039986: 495c ldr r1, [pc, #368] ; (8039af8 ) + 8039988: 4854 ldr r0, [pc, #336] ; (8039adc ) + 803998a: f007 f8c1 bl 8040b10 LWIP_ASSERT("p->tot_len == p->next->tot_len", p->tot_len == p->next->tot_len); - 803995e: 687b ldr r3, [r7, #4] - 8039960: 891a ldrh r2, [r3, #8] - 8039962: 687b ldr r3, [r7, #4] - 8039964: 681b ldr r3, [r3, #0] - 8039966: 891b ldrh r3, [r3, #8] - 8039968: 429a cmp r2, r3 - 803996a: d005 beq.n 8039978 - 803996c: 4b4d ldr r3, [pc, #308] ; (8039aa4 ) - 803996e: 22e0 movs r2, #224 ; 0xe0 - 8039970: 4956 ldr r1, [pc, #344] ; (8039acc ) - 8039972: 484e ldr r0, [pc, #312] ; (8039aac ) - 8039974: f007 f8b4 bl 8040ae0 + 803998e: 687b ldr r3, [r7, #4] + 8039990: 891a ldrh r2, [r3, #8] + 8039992: 687b ldr r3, [r7, #4] + 8039994: 681b ldr r3, [r3, #0] + 8039996: 891b ldrh r3, [r3, #8] + 8039998: 429a cmp r2, r3 + 803999a: d005 beq.n 80399a8 + 803999c: 4b4d ldr r3, [pc, #308] ; (8039ad4 ) + 803999e: 22e0 movs r2, #224 ; 0xe0 + 80399a0: 4956 ldr r1, [pc, #344] ; (8039afc ) + 80399a2: 484e ldr r0, [pc, #312] ; (8039adc ) + 80399a4: f007 f8b4 bl 8040b10 } /* Convert fields in TCP header to host byte order. */ tcphdr->src = lwip_ntohs(tcphdr->src); - 8039978: 4b4d ldr r3, [pc, #308] ; (8039ab0 ) - 803997a: 681b ldr r3, [r3, #0] - 803997c: 881b ldrh r3, [r3, #0] - 803997e: b29b uxth r3, r3 - 8039980: 4a4b ldr r2, [pc, #300] ; (8039ab0 ) - 8039982: 6814 ldr r4, [r2, #0] - 8039984: 4618 mov r0, r3 - 8039986: f7fc fa8f bl 8035ea8 - 803998a: 4603 mov r3, r0 - 803998c: 8023 strh r3, [r4, #0] + 80399a8: 4b4d ldr r3, [pc, #308] ; (8039ae0 ) + 80399aa: 681b ldr r3, [r3, #0] + 80399ac: 881b ldrh r3, [r3, #0] + 80399ae: b29b uxth r3, r3 + 80399b0: 4a4b ldr r2, [pc, #300] ; (8039ae0 ) + 80399b2: 6814 ldr r4, [r2, #0] + 80399b4: 4618 mov r0, r3 + 80399b6: f7fc fa8f bl 8035ed8 + 80399ba: 4603 mov r3, r0 + 80399bc: 8023 strh r3, [r4, #0] tcphdr->dest = lwip_ntohs(tcphdr->dest); - 803998e: 4b48 ldr r3, [pc, #288] ; (8039ab0 ) - 8039990: 681b ldr r3, [r3, #0] - 8039992: 885b ldrh r3, [r3, #2] - 8039994: b29b uxth r3, r3 - 8039996: 4a46 ldr r2, [pc, #280] ; (8039ab0 ) - 8039998: 6814 ldr r4, [r2, #0] - 803999a: 4618 mov r0, r3 - 803999c: f7fc fa84 bl 8035ea8 - 80399a0: 4603 mov r3, r0 - 80399a2: 8063 strh r3, [r4, #2] + 80399be: 4b48 ldr r3, [pc, #288] ; (8039ae0 ) + 80399c0: 681b ldr r3, [r3, #0] + 80399c2: 885b ldrh r3, [r3, #2] + 80399c4: b29b uxth r3, r3 + 80399c6: 4a46 ldr r2, [pc, #280] ; (8039ae0 ) + 80399c8: 6814 ldr r4, [r2, #0] + 80399ca: 4618 mov r0, r3 + 80399cc: f7fc fa84 bl 8035ed8 + 80399d0: 4603 mov r3, r0 + 80399d2: 8063 strh r3, [r4, #2] seqno = tcphdr->seqno = lwip_ntohl(tcphdr->seqno); - 80399a4: 4b42 ldr r3, [pc, #264] ; (8039ab0 ) - 80399a6: 681b ldr r3, [r3, #0] - 80399a8: 685b ldr r3, [r3, #4] - 80399aa: 4a41 ldr r2, [pc, #260] ; (8039ab0 ) - 80399ac: 6814 ldr r4, [r2, #0] - 80399ae: 4618 mov r0, r3 - 80399b0: f7fc fa8f bl 8035ed2 - 80399b4: 4603 mov r3, r0 - 80399b6: 6063 str r3, [r4, #4] - 80399b8: 6863 ldr r3, [r4, #4] - 80399ba: 4a45 ldr r2, [pc, #276] ; (8039ad0 ) - 80399bc: 6013 str r3, [r2, #0] + 80399d4: 4b42 ldr r3, [pc, #264] ; (8039ae0 ) + 80399d6: 681b ldr r3, [r3, #0] + 80399d8: 685b ldr r3, [r3, #4] + 80399da: 4a41 ldr r2, [pc, #260] ; (8039ae0 ) + 80399dc: 6814 ldr r4, [r2, #0] + 80399de: 4618 mov r0, r3 + 80399e0: f7fc fa8f bl 8035f02 + 80399e4: 4603 mov r3, r0 + 80399e6: 6063 str r3, [r4, #4] + 80399e8: 6863 ldr r3, [r4, #4] + 80399ea: 4a45 ldr r2, [pc, #276] ; (8039b00 ) + 80399ec: 6013 str r3, [r2, #0] ackno = tcphdr->ackno = lwip_ntohl(tcphdr->ackno); - 80399be: 4b3c ldr r3, [pc, #240] ; (8039ab0 ) - 80399c0: 681b ldr r3, [r3, #0] - 80399c2: 689b ldr r3, [r3, #8] - 80399c4: 4a3a ldr r2, [pc, #232] ; (8039ab0 ) - 80399c6: 6814 ldr r4, [r2, #0] - 80399c8: 4618 mov r0, r3 - 80399ca: f7fc fa82 bl 8035ed2 - 80399ce: 4603 mov r3, r0 - 80399d0: 60a3 str r3, [r4, #8] - 80399d2: 68a3 ldr r3, [r4, #8] - 80399d4: 4a3f ldr r2, [pc, #252] ; (8039ad4 ) - 80399d6: 6013 str r3, [r2, #0] + 80399ee: 4b3c ldr r3, [pc, #240] ; (8039ae0 ) + 80399f0: 681b ldr r3, [r3, #0] + 80399f2: 689b ldr r3, [r3, #8] + 80399f4: 4a3a ldr r2, [pc, #232] ; (8039ae0 ) + 80399f6: 6814 ldr r4, [r2, #0] + 80399f8: 4618 mov r0, r3 + 80399fa: f7fc fa82 bl 8035f02 + 80399fe: 4603 mov r3, r0 + 8039a00: 60a3 str r3, [r4, #8] + 8039a02: 68a3 ldr r3, [r4, #8] + 8039a04: 4a3f ldr r2, [pc, #252] ; (8039b04 ) + 8039a06: 6013 str r3, [r2, #0] tcphdr->wnd = lwip_ntohs(tcphdr->wnd); - 80399d8: 4b35 ldr r3, [pc, #212] ; (8039ab0 ) - 80399da: 681b ldr r3, [r3, #0] - 80399dc: 89db ldrh r3, [r3, #14] - 80399de: b29b uxth r3, r3 - 80399e0: 4a33 ldr r2, [pc, #204] ; (8039ab0 ) - 80399e2: 6814 ldr r4, [r2, #0] - 80399e4: 4618 mov r0, r3 - 80399e6: f7fc fa5f bl 8035ea8 - 80399ea: 4603 mov r3, r0 - 80399ec: 81e3 strh r3, [r4, #14] + 8039a08: 4b35 ldr r3, [pc, #212] ; (8039ae0 ) + 8039a0a: 681b ldr r3, [r3, #0] + 8039a0c: 89db ldrh r3, [r3, #14] + 8039a0e: b29b uxth r3, r3 + 8039a10: 4a33 ldr r2, [pc, #204] ; (8039ae0 ) + 8039a12: 6814 ldr r4, [r2, #0] + 8039a14: 4618 mov r0, r3 + 8039a16: f7fc fa5f bl 8035ed8 + 8039a1a: 4603 mov r3, r0 + 8039a1c: 81e3 strh r3, [r4, #14] flags = TCPH_FLAGS(tcphdr); - 80399ee: 4b30 ldr r3, [pc, #192] ; (8039ab0 ) - 80399f0: 681b ldr r3, [r3, #0] - 80399f2: 899b ldrh r3, [r3, #12] - 80399f4: b29b uxth r3, r3 - 80399f6: 4618 mov r0, r3 - 80399f8: f7fc fa56 bl 8035ea8 - 80399fc: 4603 mov r3, r0 - 80399fe: b2db uxtb r3, r3 - 8039a00: f003 033f and.w r3, r3, #63 ; 0x3f - 8039a04: b2da uxtb r2, r3 - 8039a06: 4b34 ldr r3, [pc, #208] ; (8039ad8 ) - 8039a08: 701a strb r2, [r3, #0] + 8039a1e: 4b30 ldr r3, [pc, #192] ; (8039ae0 ) + 8039a20: 681b ldr r3, [r3, #0] + 8039a22: 899b ldrh r3, [r3, #12] + 8039a24: b29b uxth r3, r3 + 8039a26: 4618 mov r0, r3 + 8039a28: f7fc fa56 bl 8035ed8 + 8039a2c: 4603 mov r3, r0 + 8039a2e: b2db uxtb r3, r3 + 8039a30: f003 033f and.w r3, r3, #63 ; 0x3f + 8039a34: b2da uxtb r2, r3 + 8039a36: 4b34 ldr r3, [pc, #208] ; (8039b08 ) + 8039a38: 701a strb r2, [r3, #0] tcplen = p->tot_len; - 8039a0a: 687b ldr r3, [r7, #4] - 8039a0c: 891a ldrh r2, [r3, #8] - 8039a0e: 4b33 ldr r3, [pc, #204] ; (8039adc ) - 8039a10: 801a strh r2, [r3, #0] + 8039a3a: 687b ldr r3, [r7, #4] + 8039a3c: 891a ldrh r2, [r3, #8] + 8039a3e: 4b33 ldr r3, [pc, #204] ; (8039b0c ) + 8039a40: 801a strh r2, [r3, #0] if (flags & (TCP_FIN | TCP_SYN)) { - 8039a12: 4b31 ldr r3, [pc, #196] ; (8039ad8 ) - 8039a14: 781b ldrb r3, [r3, #0] - 8039a16: f003 0303 and.w r3, r3, #3 - 8039a1a: 2b00 cmp r3, #0 - 8039a1c: d00c beq.n 8039a38 + 8039a42: 4b31 ldr r3, [pc, #196] ; (8039b08 ) + 8039a44: 781b ldrb r3, [r3, #0] + 8039a46: f003 0303 and.w r3, r3, #3 + 8039a4a: 2b00 cmp r3, #0 + 8039a4c: d00c beq.n 8039a68 tcplen++; - 8039a1e: 4b2f ldr r3, [pc, #188] ; (8039adc ) - 8039a20: 881b ldrh r3, [r3, #0] - 8039a22: 3301 adds r3, #1 - 8039a24: b29a uxth r2, r3 - 8039a26: 4b2d ldr r3, [pc, #180] ; (8039adc ) - 8039a28: 801a strh r2, [r3, #0] + 8039a4e: 4b2f ldr r3, [pc, #188] ; (8039b0c ) + 8039a50: 881b ldrh r3, [r3, #0] + 8039a52: 3301 adds r3, #1 + 8039a54: b29a uxth r2, r3 + 8039a56: 4b2d ldr r3, [pc, #180] ; (8039b0c ) + 8039a58: 801a strh r2, [r3, #0] if (tcplen < p->tot_len) { - 8039a2a: 687b ldr r3, [r7, #4] - 8039a2c: 891a ldrh r2, [r3, #8] - 8039a2e: 4b2b ldr r3, [pc, #172] ; (8039adc ) - 8039a30: 881b ldrh r3, [r3, #0] - 8039a32: 429a cmp r2, r3 - 8039a34: f200 82e6 bhi.w 803a004 + 8039a5a: 687b ldr r3, [r7, #4] + 8039a5c: 891a ldrh r2, [r3, #8] + 8039a5e: 4b2b ldr r3, [pc, #172] ; (8039b0c ) + 8039a60: 881b ldrh r3, [r3, #0] + 8039a62: 429a cmp r2, r3 + 8039a64: f200 82e6 bhi.w 803a034 } } /* Demultiplex an incoming segment. First, we check if it is destined for an active connection. */ prev = NULL; - 8039a38: 2300 movs r3, #0 - 8039a3a: 61bb str r3, [r7, #24] + 8039a68: 2300 movs r3, #0 + 8039a6a: 61bb str r3, [r7, #24] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 8039a3c: 4b28 ldr r3, [pc, #160] ; (8039ae0 ) - 8039a3e: 681b ldr r3, [r3, #0] - 8039a40: 61fb str r3, [r7, #28] - 8039a42: e09d b.n 8039b80 + 8039a6c: 4b28 ldr r3, [pc, #160] ; (8039b10 ) + 8039a6e: 681b ldr r3, [r3, #0] + 8039a70: 61fb str r3, [r7, #28] + 8039a72: e09d b.n 8039bb0 LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED); - 8039a44: 69fb ldr r3, [r7, #28] - 8039a46: 7d1b ldrb r3, [r3, #20] - 8039a48: 2b00 cmp r3, #0 - 8039a4a: d105 bne.n 8039a58 - 8039a4c: 4b15 ldr r3, [pc, #84] ; (8039aa4 ) - 8039a4e: 22fb movs r2, #251 ; 0xfb - 8039a50: 4924 ldr r1, [pc, #144] ; (8039ae4 ) - 8039a52: 4816 ldr r0, [pc, #88] ; (8039aac ) - 8039a54: f007 f844 bl 8040ae0 + 8039a74: 69fb ldr r3, [r7, #28] + 8039a76: 7d1b ldrb r3, [r3, #20] + 8039a78: 2b00 cmp r3, #0 + 8039a7a: d105 bne.n 8039a88 + 8039a7c: 4b15 ldr r3, [pc, #84] ; (8039ad4 ) + 8039a7e: 22fb movs r2, #251 ; 0xfb + 8039a80: 4924 ldr r1, [pc, #144] ; (8039b14 ) + 8039a82: 4816 ldr r0, [pc, #88] ; (8039adc ) + 8039a84: f007 f844 bl 8040b10 LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); - 8039a58: 69fb ldr r3, [r7, #28] - 8039a5a: 7d1b ldrb r3, [r3, #20] - 8039a5c: 2b0a cmp r3, #10 - 8039a5e: d105 bne.n 8039a6c - 8039a60: 4b10 ldr r3, [pc, #64] ; (8039aa4 ) - 8039a62: 22fc movs r2, #252 ; 0xfc - 8039a64: 4920 ldr r1, [pc, #128] ; (8039ae8 ) - 8039a66: 4811 ldr r0, [pc, #68] ; (8039aac ) - 8039a68: f007 f83a bl 8040ae0 + 8039a88: 69fb ldr r3, [r7, #28] + 8039a8a: 7d1b ldrb r3, [r3, #20] + 8039a8c: 2b0a cmp r3, #10 + 8039a8e: d105 bne.n 8039a9c + 8039a90: 4b10 ldr r3, [pc, #64] ; (8039ad4 ) + 8039a92: 22fc movs r2, #252 ; 0xfc + 8039a94: 4920 ldr r1, [pc, #128] ; (8039b18 ) + 8039a96: 4811 ldr r0, [pc, #68] ; (8039adc ) + 8039a98: f007 f83a bl 8040b10 LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN); - 8039a6c: 69fb ldr r3, [r7, #28] - 8039a6e: 7d1b ldrb r3, [r3, #20] - 8039a70: 2b01 cmp r3, #1 - 8039a72: d105 bne.n 8039a80 - 8039a74: 4b0b ldr r3, [pc, #44] ; (8039aa4 ) - 8039a76: 22fd movs r2, #253 ; 0xfd - 8039a78: 491c ldr r1, [pc, #112] ; (8039aec ) - 8039a7a: 480c ldr r0, [pc, #48] ; (8039aac ) - 8039a7c: f007 f830 bl 8040ae0 + 8039a9c: 69fb ldr r3, [r7, #28] + 8039a9e: 7d1b ldrb r3, [r3, #20] + 8039aa0: 2b01 cmp r3, #1 + 8039aa2: d105 bne.n 8039ab0 + 8039aa4: 4b0b ldr r3, [pc, #44] ; (8039ad4 ) + 8039aa6: 22fd movs r2, #253 ; 0xfd + 8039aa8: 491c ldr r1, [pc, #112] ; (8039b1c ) + 8039aaa: 480c ldr r0, [pc, #48] ; (8039adc ) + 8039aac: f007 f830 bl 8040b10 /* check if PCB is bound to specific netif */ if ((pcb->netif_idx != NETIF_NO_INDEX) && - 8039a80: 69fb ldr r3, [r7, #28] - 8039a82: 7a1b ldrb r3, [r3, #8] - 8039a84: 2b00 cmp r3, #0 - 8039a86: d033 beq.n 8039af0 + 8039ab0: 69fb ldr r3, [r7, #28] + 8039ab2: 7a1b ldrb r3, [r3, #8] + 8039ab4: 2b00 cmp r3, #0 + 8039ab6: d033 beq.n 8039b20 (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) { - 8039a88: 69fb ldr r3, [r7, #28] - 8039a8a: 7a1a ldrb r2, [r3, #8] - 8039a8c: 4b09 ldr r3, [pc, #36] ; (8039ab4 ) - 8039a8e: 685b ldr r3, [r3, #4] - 8039a90: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8039a94: 3301 adds r3, #1 - 8039a96: b2db uxtb r3, r3 + 8039ab8: 69fb ldr r3, [r7, #28] + 8039aba: 7a1a ldrb r2, [r3, #8] + 8039abc: 4b09 ldr r3, [pc, #36] ; (8039ae4 ) + 8039abe: 685b ldr r3, [r3, #4] + 8039ac0: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8039ac4: 3301 adds r3, #1 + 8039ac6: b2db uxtb r3, r3 if ((pcb->netif_idx != NETIF_NO_INDEX) && - 8039a98: 429a cmp r2, r3 - 8039a9a: d029 beq.n 8039af0 + 8039ac8: 429a cmp r2, r3 + 8039aca: d029 beq.n 8039b20 prev = pcb; - 8039a9c: 69fb ldr r3, [r7, #28] - 8039a9e: 61bb str r3, [r7, #24] + 8039acc: 69fb ldr r3, [r7, #28] + 8039ace: 61bb str r3, [r7, #24] continue; - 8039aa0: e06b b.n 8039b7a - 8039aa2: bf00 nop - 8039aa4: 080434d0 .word 0x080434d0 - 8039aa8: 08043504 .word 0x08043504 - 8039aac: 0804351c .word 0x0804351c - 8039ab0: 2400e980 .word 0x2400e980 - 8039ab4: 2400b9bc .word 0x2400b9bc - 8039ab8: 2400e984 .word 0x2400e984 - 8039abc: 2400e988 .word 0x2400e988 - 8039ac0: 2400e986 .word 0x2400e986 - 8039ac4: 08043544 .word 0x08043544 - 8039ac8: 08043554 .word 0x08043554 - 8039acc: 08043560 .word 0x08043560 - 8039ad0: 2400e990 .word 0x2400e990 - 8039ad4: 2400e994 .word 0x2400e994 - 8039ad8: 2400e99c .word 0x2400e99c - 8039adc: 2400e99a .word 0x2400e99a - 8039ae0: 2400e964 .word 0x2400e964 - 8039ae4: 08043580 .word 0x08043580 - 8039ae8: 080435a8 .word 0x080435a8 - 8039aec: 080435d4 .word 0x080435d4 + 8039ad0: e06b b.n 8039baa + 8039ad2: bf00 nop + 8039ad4: 08043500 .word 0x08043500 + 8039ad8: 08043534 .word 0x08043534 + 8039adc: 0804354c .word 0x0804354c + 8039ae0: 2400e980 .word 0x2400e980 + 8039ae4: 2400b9bc .word 0x2400b9bc + 8039ae8: 2400e984 .word 0x2400e984 + 8039aec: 2400e988 .word 0x2400e988 + 8039af0: 2400e986 .word 0x2400e986 + 8039af4: 08043574 .word 0x08043574 + 8039af8: 08043584 .word 0x08043584 + 8039afc: 08043590 .word 0x08043590 + 8039b00: 2400e990 .word 0x2400e990 + 8039b04: 2400e994 .word 0x2400e994 + 8039b08: 2400e99c .word 0x2400e99c + 8039b0c: 2400e99a .word 0x2400e99a + 8039b10: 2400e964 .word 0x2400e964 + 8039b14: 080435b0 .word 0x080435b0 + 8039b18: 080435d8 .word 0x080435d8 + 8039b1c: 08043604 .word 0x08043604 } if (pcb->remote_port == tcphdr->src && - 8039af0: 69fb ldr r3, [r7, #28] - 8039af2: 8b1a ldrh r2, [r3, #24] - 8039af4: 4b72 ldr r3, [pc, #456] ; (8039cc0 ) - 8039af6: 681b ldr r3, [r3, #0] - 8039af8: 881b ldrh r3, [r3, #0] - 8039afa: b29b uxth r3, r3 - 8039afc: 429a cmp r2, r3 - 8039afe: d13a bne.n 8039b76 + 8039b20: 69fb ldr r3, [r7, #28] + 8039b22: 8b1a ldrh r2, [r3, #24] + 8039b24: 4b72 ldr r3, [pc, #456] ; (8039cf0 ) + 8039b26: 681b ldr r3, [r3, #0] + 8039b28: 881b ldrh r3, [r3, #0] + 8039b2a: b29b uxth r3, r3 + 8039b2c: 429a cmp r2, r3 + 8039b2e: d13a bne.n 8039ba6 pcb->local_port == tcphdr->dest && - 8039b00: 69fb ldr r3, [r7, #28] - 8039b02: 8ada ldrh r2, [r3, #22] - 8039b04: 4b6e ldr r3, [pc, #440] ; (8039cc0 ) - 8039b06: 681b ldr r3, [r3, #0] - 8039b08: 885b ldrh r3, [r3, #2] - 8039b0a: b29b uxth r3, r3 + 8039b30: 69fb ldr r3, [r7, #28] + 8039b32: 8ada ldrh r2, [r3, #22] + 8039b34: 4b6e ldr r3, [pc, #440] ; (8039cf0 ) + 8039b36: 681b ldr r3, [r3, #0] + 8039b38: 885b ldrh r3, [r3, #2] + 8039b3a: b29b uxth r3, r3 if (pcb->remote_port == tcphdr->src && - 8039b0c: 429a cmp r2, r3 - 8039b0e: d132 bne.n 8039b76 + 8039b3c: 429a cmp r2, r3 + 8039b3e: d132 bne.n 8039ba6 ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) && - 8039b10: 69fb ldr r3, [r7, #28] - 8039b12: 685a ldr r2, [r3, #4] - 8039b14: 4b6b ldr r3, [pc, #428] ; (8039cc4 ) - 8039b16: 691b ldr r3, [r3, #16] + 8039b40: 69fb ldr r3, [r7, #28] + 8039b42: 685a ldr r2, [r3, #4] + 8039b44: 4b6b ldr r3, [pc, #428] ; (8039cf4 ) + 8039b46: 691b ldr r3, [r3, #16] pcb->local_port == tcphdr->dest && - 8039b18: 429a cmp r2, r3 - 8039b1a: d12c bne.n 8039b76 + 8039b48: 429a cmp r2, r3 + 8039b4a: d12c bne.n 8039ba6 ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) { - 8039b1c: 69fb ldr r3, [r7, #28] - 8039b1e: 681a ldr r2, [r3, #0] - 8039b20: 4b68 ldr r3, [pc, #416] ; (8039cc4 ) - 8039b22: 695b ldr r3, [r3, #20] + 8039b4c: 69fb ldr r3, [r7, #28] + 8039b4e: 681a ldr r2, [r3, #0] + 8039b50: 4b68 ldr r3, [pc, #416] ; (8039cf4 ) + 8039b52: 695b ldr r3, [r3, #20] ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) && - 8039b24: 429a cmp r2, r3 - 8039b26: d126 bne.n 8039b76 + 8039b54: 429a cmp r2, r3 + 8039b56: d126 bne.n 8039ba6 /* Move this PCB to the front of the list so that subsequent lookups will be faster (we exploit locality in TCP segment arrivals). */ LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb); - 8039b28: 69fb ldr r3, [r7, #28] - 8039b2a: 68db ldr r3, [r3, #12] - 8039b2c: 69fa ldr r2, [r7, #28] - 8039b2e: 429a cmp r2, r3 - 8039b30: d106 bne.n 8039b40 - 8039b32: 4b65 ldr r3, [pc, #404] ; (8039cc8 ) - 8039b34: f240 120d movw r2, #269 ; 0x10d - 8039b38: 4964 ldr r1, [pc, #400] ; (8039ccc ) - 8039b3a: 4865 ldr r0, [pc, #404] ; (8039cd0 ) - 8039b3c: f006 ffd0 bl 8040ae0 + 8039b58: 69fb ldr r3, [r7, #28] + 8039b5a: 68db ldr r3, [r3, #12] + 8039b5c: 69fa ldr r2, [r7, #28] + 8039b5e: 429a cmp r2, r3 + 8039b60: d106 bne.n 8039b70 + 8039b62: 4b65 ldr r3, [pc, #404] ; (8039cf8 ) + 8039b64: f240 120d movw r2, #269 ; 0x10d + 8039b68: 4964 ldr r1, [pc, #400] ; (8039cfc ) + 8039b6a: 4865 ldr r0, [pc, #404] ; (8039d00 ) + 8039b6c: f006 ffd0 bl 8040b10 if (prev != NULL) { - 8039b40: 69bb ldr r3, [r7, #24] - 8039b42: 2b00 cmp r3, #0 - 8039b44: d00a beq.n 8039b5c + 8039b70: 69bb ldr r3, [r7, #24] + 8039b72: 2b00 cmp r3, #0 + 8039b74: d00a beq.n 8039b8c prev->next = pcb->next; - 8039b46: 69fb ldr r3, [r7, #28] - 8039b48: 68da ldr r2, [r3, #12] - 8039b4a: 69bb ldr r3, [r7, #24] - 8039b4c: 60da str r2, [r3, #12] + 8039b76: 69fb ldr r3, [r7, #28] + 8039b78: 68da ldr r2, [r3, #12] + 8039b7a: 69bb ldr r3, [r7, #24] + 8039b7c: 60da str r2, [r3, #12] pcb->next = tcp_active_pcbs; - 8039b4e: 4b61 ldr r3, [pc, #388] ; (8039cd4 ) - 8039b50: 681a ldr r2, [r3, #0] - 8039b52: 69fb ldr r3, [r7, #28] - 8039b54: 60da str r2, [r3, #12] + 8039b7e: 4b61 ldr r3, [pc, #388] ; (8039d04 ) + 8039b80: 681a ldr r2, [r3, #0] + 8039b82: 69fb ldr r3, [r7, #28] + 8039b84: 60da str r2, [r3, #12] tcp_active_pcbs = pcb; - 8039b56: 4a5f ldr r2, [pc, #380] ; (8039cd4 ) - 8039b58: 69fb ldr r3, [r7, #28] - 8039b5a: 6013 str r3, [r2, #0] + 8039b86: 4a5f ldr r2, [pc, #380] ; (8039d04 ) + 8039b88: 69fb ldr r3, [r7, #28] + 8039b8a: 6013 str r3, [r2, #0] } else { TCP_STATS_INC(tcp.cachehit); } LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb); - 8039b5c: 69fb ldr r3, [r7, #28] - 8039b5e: 68db ldr r3, [r3, #12] - 8039b60: 69fa ldr r2, [r7, #28] - 8039b62: 429a cmp r2, r3 - 8039b64: d111 bne.n 8039b8a - 8039b66: 4b58 ldr r3, [pc, #352] ; (8039cc8 ) - 8039b68: f240 1215 movw r2, #277 ; 0x115 - 8039b6c: 495a ldr r1, [pc, #360] ; (8039cd8 ) - 8039b6e: 4858 ldr r0, [pc, #352] ; (8039cd0 ) - 8039b70: f006 ffb6 bl 8040ae0 + 8039b8c: 69fb ldr r3, [r7, #28] + 8039b8e: 68db ldr r3, [r3, #12] + 8039b90: 69fa ldr r2, [r7, #28] + 8039b92: 429a cmp r2, r3 + 8039b94: d111 bne.n 8039bba + 8039b96: 4b58 ldr r3, [pc, #352] ; (8039cf8 ) + 8039b98: f240 1215 movw r2, #277 ; 0x115 + 8039b9c: 495a ldr r1, [pc, #360] ; (8039d08 ) + 8039b9e: 4858 ldr r0, [pc, #352] ; (8039d00 ) + 8039ba0: f006 ffb6 bl 8040b10 break; - 8039b74: e009 b.n 8039b8a + 8039ba4: e009 b.n 8039bba } prev = pcb; - 8039b76: 69fb ldr r3, [r7, #28] - 8039b78: 61bb str r3, [r7, #24] + 8039ba6: 69fb ldr r3, [r7, #28] + 8039ba8: 61bb str r3, [r7, #24] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 8039b7a: 69fb ldr r3, [r7, #28] - 8039b7c: 68db ldr r3, [r3, #12] - 8039b7e: 61fb str r3, [r7, #28] - 8039b80: 69fb ldr r3, [r7, #28] - 8039b82: 2b00 cmp r3, #0 - 8039b84: f47f af5e bne.w 8039a44 - 8039b88: e000 b.n 8039b8c + 8039baa: 69fb ldr r3, [r7, #28] + 8039bac: 68db ldr r3, [r3, #12] + 8039bae: 61fb str r3, [r7, #28] + 8039bb0: 69fb ldr r3, [r7, #28] + 8039bb2: 2b00 cmp r3, #0 + 8039bb4: f47f af5e bne.w 8039a74 + 8039bb8: e000 b.n 8039bbc break; - 8039b8a: bf00 nop + 8039bba: bf00 nop } if (pcb == NULL) { - 8039b8c: 69fb ldr r3, [r7, #28] - 8039b8e: 2b00 cmp r3, #0 - 8039b90: f040 80aa bne.w 8039ce8 + 8039bbc: 69fb ldr r3, [r7, #28] + 8039bbe: 2b00 cmp r3, #0 + 8039bc0: f040 80aa bne.w 8039d18 /* If it did not go to an active connection, we check the connections in the TIME-WAIT state. */ for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - 8039b94: 4b51 ldr r3, [pc, #324] ; (8039cdc ) - 8039b96: 681b ldr r3, [r3, #0] - 8039b98: 61fb str r3, [r7, #28] - 8039b9a: e03f b.n 8039c1c + 8039bc4: 4b51 ldr r3, [pc, #324] ; (8039d0c ) + 8039bc6: 681b ldr r3, [r3, #0] + 8039bc8: 61fb str r3, [r7, #28] + 8039bca: e03f b.n 8039c4c LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - 8039b9c: 69fb ldr r3, [r7, #28] - 8039b9e: 7d1b ldrb r3, [r3, #20] - 8039ba0: 2b0a cmp r3, #10 - 8039ba2: d006 beq.n 8039bb2 - 8039ba4: 4b48 ldr r3, [pc, #288] ; (8039cc8 ) - 8039ba6: f240 121f movw r2, #287 ; 0x11f - 8039baa: 494d ldr r1, [pc, #308] ; (8039ce0 ) - 8039bac: 4848 ldr r0, [pc, #288] ; (8039cd0 ) - 8039bae: f006 ff97 bl 8040ae0 + 8039bcc: 69fb ldr r3, [r7, #28] + 8039bce: 7d1b ldrb r3, [r3, #20] + 8039bd0: 2b0a cmp r3, #10 + 8039bd2: d006 beq.n 8039be2 + 8039bd4: 4b48 ldr r3, [pc, #288] ; (8039cf8 ) + 8039bd6: f240 121f movw r2, #287 ; 0x11f + 8039bda: 494d ldr r1, [pc, #308] ; (8039d10 ) + 8039bdc: 4848 ldr r0, [pc, #288] ; (8039d00 ) + 8039bde: f006 ff97 bl 8040b10 /* check if PCB is bound to specific netif */ if ((pcb->netif_idx != NETIF_NO_INDEX) && - 8039bb2: 69fb ldr r3, [r7, #28] - 8039bb4: 7a1b ldrb r3, [r3, #8] - 8039bb6: 2b00 cmp r3, #0 - 8039bb8: d009 beq.n 8039bce + 8039be2: 69fb ldr r3, [r7, #28] + 8039be4: 7a1b ldrb r3, [r3, #8] + 8039be6: 2b00 cmp r3, #0 + 8039be8: d009 beq.n 8039bfe (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) { - 8039bba: 69fb ldr r3, [r7, #28] - 8039bbc: 7a1a ldrb r2, [r3, #8] - 8039bbe: 4b41 ldr r3, [pc, #260] ; (8039cc4 ) - 8039bc0: 685b ldr r3, [r3, #4] - 8039bc2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8039bc6: 3301 adds r3, #1 - 8039bc8: b2db uxtb r3, r3 + 8039bea: 69fb ldr r3, [r7, #28] + 8039bec: 7a1a ldrb r2, [r3, #8] + 8039bee: 4b41 ldr r3, [pc, #260] ; (8039cf4 ) + 8039bf0: 685b ldr r3, [r3, #4] + 8039bf2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8039bf6: 3301 adds r3, #1 + 8039bf8: b2db uxtb r3, r3 if ((pcb->netif_idx != NETIF_NO_INDEX) && - 8039bca: 429a cmp r2, r3 - 8039bcc: d122 bne.n 8039c14 + 8039bfa: 429a cmp r2, r3 + 8039bfc: d122 bne.n 8039c44 continue; } if (pcb->remote_port == tcphdr->src && - 8039bce: 69fb ldr r3, [r7, #28] - 8039bd0: 8b1a ldrh r2, [r3, #24] - 8039bd2: 4b3b ldr r3, [pc, #236] ; (8039cc0 ) - 8039bd4: 681b ldr r3, [r3, #0] - 8039bd6: 881b ldrh r3, [r3, #0] - 8039bd8: b29b uxth r3, r3 - 8039bda: 429a cmp r2, r3 - 8039bdc: d11b bne.n 8039c16 + 8039bfe: 69fb ldr r3, [r7, #28] + 8039c00: 8b1a ldrh r2, [r3, #24] + 8039c02: 4b3b ldr r3, [pc, #236] ; (8039cf0 ) + 8039c04: 681b ldr r3, [r3, #0] + 8039c06: 881b ldrh r3, [r3, #0] + 8039c08: b29b uxth r3, r3 + 8039c0a: 429a cmp r2, r3 + 8039c0c: d11b bne.n 8039c46 pcb->local_port == tcphdr->dest && - 8039bde: 69fb ldr r3, [r7, #28] - 8039be0: 8ada ldrh r2, [r3, #22] - 8039be2: 4b37 ldr r3, [pc, #220] ; (8039cc0 ) - 8039be4: 681b ldr r3, [r3, #0] - 8039be6: 885b ldrh r3, [r3, #2] - 8039be8: b29b uxth r3, r3 + 8039c0e: 69fb ldr r3, [r7, #28] + 8039c10: 8ada ldrh r2, [r3, #22] + 8039c12: 4b37 ldr r3, [pc, #220] ; (8039cf0 ) + 8039c14: 681b ldr r3, [r3, #0] + 8039c16: 885b ldrh r3, [r3, #2] + 8039c18: b29b uxth r3, r3 if (pcb->remote_port == tcphdr->src && - 8039bea: 429a cmp r2, r3 - 8039bec: d113 bne.n 8039c16 + 8039c1a: 429a cmp r2, r3 + 8039c1c: d113 bne.n 8039c46 ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) && - 8039bee: 69fb ldr r3, [r7, #28] - 8039bf0: 685a ldr r2, [r3, #4] - 8039bf2: 4b34 ldr r3, [pc, #208] ; (8039cc4 ) - 8039bf4: 691b ldr r3, [r3, #16] + 8039c1e: 69fb ldr r3, [r7, #28] + 8039c20: 685a ldr r2, [r3, #4] + 8039c22: 4b34 ldr r3, [pc, #208] ; (8039cf4 ) + 8039c24: 691b ldr r3, [r3, #16] pcb->local_port == tcphdr->dest && - 8039bf6: 429a cmp r2, r3 - 8039bf8: d10d bne.n 8039c16 + 8039c26: 429a cmp r2, r3 + 8039c28: d10d bne.n 8039c46 ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) { - 8039bfa: 69fb ldr r3, [r7, #28] - 8039bfc: 681a ldr r2, [r3, #0] - 8039bfe: 4b31 ldr r3, [pc, #196] ; (8039cc4 ) - 8039c00: 695b ldr r3, [r3, #20] + 8039c2a: 69fb ldr r3, [r7, #28] + 8039c2c: 681a ldr r2, [r3, #0] + 8039c2e: 4b31 ldr r3, [pc, #196] ; (8039cf4 ) + 8039c30: 695b ldr r3, [r3, #20] ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) && - 8039c02: 429a cmp r2, r3 - 8039c04: d107 bne.n 8039c16 + 8039c32: 429a cmp r2, r3 + 8039c34: d107 bne.n 8039c46 #ifdef LWIP_HOOK_TCP_INPACKET_PCB if (LWIP_HOOK_TCP_INPACKET_PCB(pcb, tcphdr, tcphdr_optlen, tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK) #endif { tcp_timewait_input(pcb); - 8039c06: 69f8 ldr r0, [r7, #28] - 8039c08: f000 fb56 bl 803a2b8 + 8039c36: 69f8 ldr r0, [r7, #28] + 8039c38: f000 fb56 bl 803a2e8 } pbuf_free(p); - 8039c0c: 6878 ldr r0, [r7, #4] - 8039c0e: f7fd fd7d bl 803770c + 8039c3c: 6878 ldr r0, [r7, #4] + 8039c3e: f7fd fd7d bl 803773c return; - 8039c12: e1fd b.n 803a010 + 8039c42: e1fd b.n 803a040 continue; - 8039c14: bf00 nop + 8039c44: bf00 nop for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - 8039c16: 69fb ldr r3, [r7, #28] - 8039c18: 68db ldr r3, [r3, #12] - 8039c1a: 61fb str r3, [r7, #28] - 8039c1c: 69fb ldr r3, [r7, #28] - 8039c1e: 2b00 cmp r3, #0 - 8039c20: d1bc bne.n 8039b9c + 8039c46: 69fb ldr r3, [r7, #28] + 8039c48: 68db ldr r3, [r3, #12] + 8039c4a: 61fb str r3, [r7, #28] + 8039c4c: 69fb ldr r3, [r7, #28] + 8039c4e: 2b00 cmp r3, #0 + 8039c50: d1bc bne.n 8039bcc } } /* Finally, if we still did not get a match, we check all PCBs that are LISTENing for incoming connections. */ prev = NULL; - 8039c22: 2300 movs r3, #0 - 8039c24: 61bb str r3, [r7, #24] + 8039c52: 2300 movs r3, #0 + 8039c54: 61bb str r3, [r7, #24] for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - 8039c26: 4b2f ldr r3, [pc, #188] ; (8039ce4 ) - 8039c28: 681b ldr r3, [r3, #0] - 8039c2a: 617b str r3, [r7, #20] - 8039c2c: e02a b.n 8039c84 + 8039c56: 4b2f ldr r3, [pc, #188] ; (8039d14 ) + 8039c58: 681b ldr r3, [r3, #0] + 8039c5a: 617b str r3, [r7, #20] + 8039c5c: e02a b.n 8039cb4 /* check if PCB is bound to specific netif */ if ((lpcb->netif_idx != NETIF_NO_INDEX) && - 8039c2e: 697b ldr r3, [r7, #20] - 8039c30: 7a1b ldrb r3, [r3, #8] - 8039c32: 2b00 cmp r3, #0 - 8039c34: d00c beq.n 8039c50 + 8039c5e: 697b ldr r3, [r7, #20] + 8039c60: 7a1b ldrb r3, [r3, #8] + 8039c62: 2b00 cmp r3, #0 + 8039c64: d00c beq.n 8039c80 (lpcb->netif_idx != netif_get_index(ip_data.current_input_netif))) { - 8039c36: 697b ldr r3, [r7, #20] - 8039c38: 7a1a ldrb r2, [r3, #8] - 8039c3a: 4b22 ldr r3, [pc, #136] ; (8039cc4 ) - 8039c3c: 685b ldr r3, [r3, #4] - 8039c3e: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8039c42: 3301 adds r3, #1 - 8039c44: b2db uxtb r3, r3 + 8039c66: 697b ldr r3, [r7, #20] + 8039c68: 7a1a ldrb r2, [r3, #8] + 8039c6a: 4b22 ldr r3, [pc, #136] ; (8039cf4 ) + 8039c6c: 685b ldr r3, [r3, #4] + 8039c6e: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8039c72: 3301 adds r3, #1 + 8039c74: b2db uxtb r3, r3 if ((lpcb->netif_idx != NETIF_NO_INDEX) && - 8039c46: 429a cmp r2, r3 - 8039c48: d002 beq.n 8039c50 + 8039c76: 429a cmp r2, r3 + 8039c78: d002 beq.n 8039c80 prev = (struct tcp_pcb *)lpcb; - 8039c4a: 697b ldr r3, [r7, #20] - 8039c4c: 61bb str r3, [r7, #24] + 8039c7a: 697b ldr r3, [r7, #20] + 8039c7c: 61bb str r3, [r7, #24] continue; - 8039c4e: e016 b.n 8039c7e + 8039c7e: e016 b.n 8039cae } if (lpcb->local_port == tcphdr->dest) { - 8039c50: 697b ldr r3, [r7, #20] - 8039c52: 8ada ldrh r2, [r3, #22] - 8039c54: 4b1a ldr r3, [pc, #104] ; (8039cc0 ) - 8039c56: 681b ldr r3, [r3, #0] - 8039c58: 885b ldrh r3, [r3, #2] - 8039c5a: b29b uxth r3, r3 - 8039c5c: 429a cmp r2, r3 - 8039c5e: d10c bne.n 8039c7a + 8039c80: 697b ldr r3, [r7, #20] + 8039c82: 8ada ldrh r2, [r3, #22] + 8039c84: 4b1a ldr r3, [pc, #104] ; (8039cf0 ) + 8039c86: 681b ldr r3, [r3, #0] + 8039c88: 885b ldrh r3, [r3, #2] + 8039c8a: b29b uxth r3, r3 + 8039c8c: 429a cmp r2, r3 + 8039c8e: d10c bne.n 8039caa lpcb_prev = prev; #else /* SO_REUSE */ break; #endif /* SO_REUSE */ } else if (IP_ADDR_PCB_VERSION_MATCH_EXACT(lpcb, ip_current_dest_addr())) { if (ip_addr_cmp(&lpcb->local_ip, ip_current_dest_addr())) { - 8039c60: 697b ldr r3, [r7, #20] - 8039c62: 681a ldr r2, [r3, #0] - 8039c64: 4b17 ldr r3, [pc, #92] ; (8039cc4 ) - 8039c66: 695b ldr r3, [r3, #20] - 8039c68: 429a cmp r2, r3 - 8039c6a: d00f beq.n 8039c8c + 8039c90: 697b ldr r3, [r7, #20] + 8039c92: 681a ldr r2, [r3, #0] + 8039c94: 4b17 ldr r3, [pc, #92] ; (8039cf4 ) + 8039c96: 695b ldr r3, [r3, #20] + 8039c98: 429a cmp r2, r3 + 8039c9a: d00f beq.n 8039cbc /* found an exact match */ break; } else if (ip_addr_isany(&lpcb->local_ip)) { - 8039c6c: 697b ldr r3, [r7, #20] - 8039c6e: 2b00 cmp r3, #0 - 8039c70: d00d beq.n 8039c8e - 8039c72: 697b ldr r3, [r7, #20] - 8039c74: 681b ldr r3, [r3, #0] - 8039c76: 2b00 cmp r3, #0 - 8039c78: d009 beq.n 8039c8e + 8039c9c: 697b ldr r3, [r7, #20] + 8039c9e: 2b00 cmp r3, #0 + 8039ca0: d00d beq.n 8039cbe + 8039ca2: 697b ldr r3, [r7, #20] + 8039ca4: 681b ldr r3, [r3, #0] + 8039ca6: 2b00 cmp r3, #0 + 8039ca8: d009 beq.n 8039cbe break; #endif /* SO_REUSE */ } } } prev = (struct tcp_pcb *)lpcb; - 8039c7a: 697b ldr r3, [r7, #20] - 8039c7c: 61bb str r3, [r7, #24] + 8039caa: 697b ldr r3, [r7, #20] + 8039cac: 61bb str r3, [r7, #24] for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - 8039c7e: 697b ldr r3, [r7, #20] - 8039c80: 68db ldr r3, [r3, #12] - 8039c82: 617b str r3, [r7, #20] - 8039c84: 697b ldr r3, [r7, #20] - 8039c86: 2b00 cmp r3, #0 - 8039c88: d1d1 bne.n 8039c2e - 8039c8a: e000 b.n 8039c8e + 8039cae: 697b ldr r3, [r7, #20] + 8039cb0: 68db ldr r3, [r3, #12] + 8039cb2: 617b str r3, [r7, #20] + 8039cb4: 697b ldr r3, [r7, #20] + 8039cb6: 2b00 cmp r3, #0 + 8039cb8: d1d1 bne.n 8039c5e + 8039cba: e000 b.n 8039cbe break; - 8039c8c: bf00 nop + 8039cbc: bf00 nop /* only pass to ANY if no specific local IP has been found */ lpcb = lpcb_any; prev = lpcb_prev; } #endif /* SO_REUSE */ if (lpcb != NULL) { - 8039c8e: 697b ldr r3, [r7, #20] - 8039c90: 2b00 cmp r3, #0 - 8039c92: d029 beq.n 8039ce8 + 8039cbe: 697b ldr r3, [r7, #20] + 8039cc0: 2b00 cmp r3, #0 + 8039cc2: d029 beq.n 8039d18 /* Move this PCB to the front of the list so that subsequent lookups will be faster (we exploit locality in TCP segment arrivals). */ if (prev != NULL) { - 8039c94: 69bb ldr r3, [r7, #24] - 8039c96: 2b00 cmp r3, #0 - 8039c98: d00a beq.n 8039cb0 + 8039cc4: 69bb ldr r3, [r7, #24] + 8039cc6: 2b00 cmp r3, #0 + 8039cc8: d00a beq.n 8039ce0 ((struct tcp_pcb_listen *)prev)->next = lpcb->next; - 8039c9a: 697b ldr r3, [r7, #20] - 8039c9c: 68da ldr r2, [r3, #12] - 8039c9e: 69bb ldr r3, [r7, #24] - 8039ca0: 60da str r2, [r3, #12] + 8039cca: 697b ldr r3, [r7, #20] + 8039ccc: 68da ldr r2, [r3, #12] + 8039cce: 69bb ldr r3, [r7, #24] + 8039cd0: 60da str r2, [r3, #12] /* our successor is the remainder of the listening list */ lpcb->next = tcp_listen_pcbs.listen_pcbs; - 8039ca2: 4b10 ldr r3, [pc, #64] ; (8039ce4 ) - 8039ca4: 681a ldr r2, [r3, #0] - 8039ca6: 697b ldr r3, [r7, #20] - 8039ca8: 60da str r2, [r3, #12] + 8039cd2: 4b10 ldr r3, [pc, #64] ; (8039d14 ) + 8039cd4: 681a ldr r2, [r3, #0] + 8039cd6: 697b ldr r3, [r7, #20] + 8039cd8: 60da str r2, [r3, #12] /* put this listening pcb at the head of the listening list */ tcp_listen_pcbs.listen_pcbs = lpcb; - 8039caa: 4a0e ldr r2, [pc, #56] ; (8039ce4 ) - 8039cac: 697b ldr r3, [r7, #20] - 8039cae: 6013 str r3, [r2, #0] + 8039cda: 4a0e ldr r2, [pc, #56] ; (8039d14 ) + 8039cdc: 697b ldr r3, [r7, #20] + 8039cde: 6013 str r3, [r2, #0] #ifdef LWIP_HOOK_TCP_INPACKET_PCB if (LWIP_HOOK_TCP_INPACKET_PCB((struct tcp_pcb *)lpcb, tcphdr, tcphdr_optlen, tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK) #endif { tcp_listen_input(lpcb); - 8039cb0: 6978 ldr r0, [r7, #20] - 8039cb2: f000 fa03 bl 803a0bc + 8039ce0: 6978 ldr r0, [r7, #20] + 8039ce2: f000 fa03 bl 803a0ec } pbuf_free(p); - 8039cb6: 6878 ldr r0, [r7, #4] - 8039cb8: f7fd fd28 bl 803770c + 8039ce6: 6878 ldr r0, [r7, #4] + 8039ce8: f7fd fd28 bl 803773c return; - 8039cbc: e1a8 b.n 803a010 - 8039cbe: bf00 nop - 8039cc0: 2400e980 .word 0x2400e980 - 8039cc4: 2400b9bc .word 0x2400b9bc - 8039cc8: 080434d0 .word 0x080434d0 - 8039ccc: 080435fc .word 0x080435fc - 8039cd0: 0804351c .word 0x0804351c - 8039cd4: 2400e964 .word 0x2400e964 - 8039cd8: 08043628 .word 0x08043628 - 8039cdc: 2400e968 .word 0x2400e968 - 8039ce0: 08043654 .word 0x08043654 - 8039ce4: 2400e960 .word 0x2400e960 + 8039cec: e1a8 b.n 803a040 + 8039cee: bf00 nop + 8039cf0: 2400e980 .word 0x2400e980 + 8039cf4: 2400b9bc .word 0x2400b9bc + 8039cf8: 08043500 .word 0x08043500 + 8039cfc: 0804362c .word 0x0804362c + 8039d00: 0804354c .word 0x0804354c + 8039d04: 2400e964 .word 0x2400e964 + 8039d08: 08043658 .word 0x08043658 + 8039d0c: 2400e968 .word 0x2400e968 + 8039d10: 08043684 .word 0x08043684 + 8039d14: 2400e960 .word 0x2400e960 tcphdr_opt1len, tcphdr_opt2, p) != ERR_OK) { pbuf_free(p); return; } #endif if (pcb != NULL) { - 8039ce8: 69fb ldr r3, [r7, #28] - 8039cea: 2b00 cmp r3, #0 - 8039cec: f000 8158 beq.w 8039fa0 + 8039d18: 69fb ldr r3, [r7, #28] + 8039d1a: 2b00 cmp r3, #0 + 8039d1c: f000 8158 beq.w 8039fd0 #if TCP_INPUT_DEBUG tcp_debug_print_state(pcb->state); #endif /* TCP_INPUT_DEBUG */ /* Set up a tcp_seg structure. */ inseg.next = NULL; - 8039cf0: 4b95 ldr r3, [pc, #596] ; (8039f48 ) - 8039cf2: 2200 movs r2, #0 - 8039cf4: 601a str r2, [r3, #0] + 8039d20: 4b95 ldr r3, [pc, #596] ; (8039f78 ) + 8039d22: 2200 movs r2, #0 + 8039d24: 601a str r2, [r3, #0] inseg.len = p->tot_len; - 8039cf6: 687b ldr r3, [r7, #4] - 8039cf8: 891a ldrh r2, [r3, #8] - 8039cfa: 4b93 ldr r3, [pc, #588] ; (8039f48 ) - 8039cfc: 811a strh r2, [r3, #8] + 8039d26: 687b ldr r3, [r7, #4] + 8039d28: 891a ldrh r2, [r3, #8] + 8039d2a: 4b93 ldr r3, [pc, #588] ; (8039f78 ) + 8039d2c: 811a strh r2, [r3, #8] inseg.p = p; - 8039cfe: 4a92 ldr r2, [pc, #584] ; (8039f48 ) - 8039d00: 687b ldr r3, [r7, #4] - 8039d02: 6053 str r3, [r2, #4] + 8039d2e: 4a92 ldr r2, [pc, #584] ; (8039f78 ) + 8039d30: 687b ldr r3, [r7, #4] + 8039d32: 6053 str r3, [r2, #4] inseg.tcphdr = tcphdr; - 8039d04: 4b91 ldr r3, [pc, #580] ; (8039f4c ) - 8039d06: 681b ldr r3, [r3, #0] - 8039d08: 4a8f ldr r2, [pc, #572] ; (8039f48 ) - 8039d0a: 60d3 str r3, [r2, #12] + 8039d34: 4b91 ldr r3, [pc, #580] ; (8039f7c ) + 8039d36: 681b ldr r3, [r3, #0] + 8039d38: 4a8f ldr r2, [pc, #572] ; (8039f78 ) + 8039d3a: 60d3 str r3, [r2, #12] recv_data = NULL; - 8039d0c: 4b90 ldr r3, [pc, #576] ; (8039f50 ) - 8039d0e: 2200 movs r2, #0 - 8039d10: 601a str r2, [r3, #0] + 8039d3c: 4b90 ldr r3, [pc, #576] ; (8039f80 ) + 8039d3e: 2200 movs r2, #0 + 8039d40: 601a str r2, [r3, #0] recv_flags = 0; - 8039d12: 4b90 ldr r3, [pc, #576] ; (8039f54 ) - 8039d14: 2200 movs r2, #0 - 8039d16: 701a strb r2, [r3, #0] + 8039d42: 4b90 ldr r3, [pc, #576] ; (8039f84 ) + 8039d44: 2200 movs r2, #0 + 8039d46: 701a strb r2, [r3, #0] recv_acked = 0; - 8039d18: 4b8f ldr r3, [pc, #572] ; (8039f58 ) - 8039d1a: 2200 movs r2, #0 - 8039d1c: 801a strh r2, [r3, #0] + 8039d48: 4b8f ldr r3, [pc, #572] ; (8039f88 ) + 8039d4a: 2200 movs r2, #0 + 8039d4c: 801a strh r2, [r3, #0] if (flags & TCP_PSH) { - 8039d1e: 4b8f ldr r3, [pc, #572] ; (8039f5c ) - 8039d20: 781b ldrb r3, [r3, #0] - 8039d22: f003 0308 and.w r3, r3, #8 - 8039d26: 2b00 cmp r3, #0 - 8039d28: d006 beq.n 8039d38 + 8039d4e: 4b8f ldr r3, [pc, #572] ; (8039f8c ) + 8039d50: 781b ldrb r3, [r3, #0] + 8039d52: f003 0308 and.w r3, r3, #8 + 8039d56: 2b00 cmp r3, #0 + 8039d58: d006 beq.n 8039d68 p->flags |= PBUF_FLAG_PUSH; - 8039d2a: 687b ldr r3, [r7, #4] - 8039d2c: 7b5b ldrb r3, [r3, #13] - 8039d2e: f043 0301 orr.w r3, r3, #1 - 8039d32: b2da uxtb r2, r3 - 8039d34: 687b ldr r3, [r7, #4] - 8039d36: 735a strb r2, [r3, #13] + 8039d5a: 687b ldr r3, [r7, #4] + 8039d5c: 7b5b ldrb r3, [r3, #13] + 8039d5e: f043 0301 orr.w r3, r3, #1 + 8039d62: b2da uxtb r2, r3 + 8039d64: 687b ldr r3, [r7, #4] + 8039d66: 735a strb r2, [r3, #13] } /* If there is data which was previously "refused" by upper layer */ if (pcb->refused_data != NULL) { - 8039d38: 69fb ldr r3, [r7, #28] - 8039d3a: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039d3c: 2b00 cmp r3, #0 - 8039d3e: d017 beq.n 8039d70 + 8039d68: 69fb ldr r3, [r7, #28] + 8039d6a: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039d6c: 2b00 cmp r3, #0 + 8039d6e: d017 beq.n 8039da0 if ((tcp_process_refused_data(pcb) == ERR_ABRT) || - 8039d40: 69f8 ldr r0, [r7, #28] - 8039d42: f7ff f87f bl 8038e44 - 8039d46: 4603 mov r3, r0 - 8039d48: f113 0f0d cmn.w r3, #13 - 8039d4c: d007 beq.n 8039d5e + 8039d70: 69f8 ldr r0, [r7, #28] + 8039d72: f7ff f87f bl 8038e74 + 8039d76: 4603 mov r3, r0 + 8039d78: f113 0f0d cmn.w r3, #13 + 8039d7c: d007 beq.n 8039d8e ((pcb->refused_data != NULL) && (tcplen > 0))) { - 8039d4e: 69fb ldr r3, [r7, #28] - 8039d50: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039d7e: 69fb ldr r3, [r7, #28] + 8039d80: 6f9b ldr r3, [r3, #120] ; 0x78 if ((tcp_process_refused_data(pcb) == ERR_ABRT) || - 8039d52: 2b00 cmp r3, #0 - 8039d54: d00c beq.n 8039d70 + 8039d82: 2b00 cmp r3, #0 + 8039d84: d00c beq.n 8039da0 ((pcb->refused_data != NULL) && (tcplen > 0))) { - 8039d56: 4b82 ldr r3, [pc, #520] ; (8039f60 ) - 8039d58: 881b ldrh r3, [r3, #0] - 8039d5a: 2b00 cmp r3, #0 - 8039d5c: d008 beq.n 8039d70 + 8039d86: 4b82 ldr r3, [pc, #520] ; (8039f90 ) + 8039d88: 881b ldrh r3, [r3, #0] + 8039d8a: 2b00 cmp r3, #0 + 8039d8c: d008 beq.n 8039da0 /* pcb has been aborted or refused data is still refused and the new segment contains data */ if (pcb->rcv_ann_wnd == 0) { - 8039d5e: 69fb ldr r3, [r7, #28] - 8039d60: 8d5b ldrh r3, [r3, #42] ; 0x2a - 8039d62: 2b00 cmp r3, #0 - 8039d64: f040 80e3 bne.w 8039f2e + 8039d8e: 69fb ldr r3, [r7, #28] + 8039d90: 8d5b ldrh r3, [r3, #42] ; 0x2a + 8039d92: 2b00 cmp r3, #0 + 8039d94: f040 80e3 bne.w 8039f5e /* this is a zero-window probe, we respond to it with current RCV.NXT and drop the data segment */ tcp_send_empty_ack(pcb); - 8039d68: 69f8 ldr r0, [r7, #28] - 8039d6a: f003 fe05 bl 803d978 + 8039d98: 69f8 ldr r0, [r7, #28] + 8039d9a: f003 fe05 bl 803d9a8 } TCP_STATS_INC(tcp.drop); MIB2_STATS_INC(mib2.tcpinerrs); goto aborted; - 8039d6e: e0de b.n 8039f2e + 8039d9e: e0de b.n 8039f5e } } tcp_input_pcb = pcb; - 8039d70: 4a7c ldr r2, [pc, #496] ; (8039f64 ) - 8039d72: 69fb ldr r3, [r7, #28] - 8039d74: 6013 str r3, [r2, #0] + 8039da0: 4a7c ldr r2, [pc, #496] ; (8039f94 ) + 8039da2: 69fb ldr r3, [r7, #28] + 8039da4: 6013 str r3, [r2, #0] err = tcp_process(pcb); - 8039d76: 69f8 ldr r0, [r7, #28] - 8039d78: f000 fb18 bl 803a3ac - 8039d7c: 4603 mov r3, r0 - 8039d7e: 74fb strb r3, [r7, #19] + 8039da6: 69f8 ldr r0, [r7, #28] + 8039da8: f000 fb18 bl 803a3dc + 8039dac: 4603 mov r3, r0 + 8039dae: 74fb strb r3, [r7, #19] /* A return value of ERR_ABRT means that tcp_abort() was called and that the pcb has been freed. If so, we don't do anything. */ if (err != ERR_ABRT) { - 8039d80: f997 3013 ldrsb.w r3, [r7, #19] - 8039d84: f113 0f0d cmn.w r3, #13 - 8039d88: f000 80d3 beq.w 8039f32 + 8039db0: f997 3013 ldrsb.w r3, [r7, #19] + 8039db4: f113 0f0d cmn.w r3, #13 + 8039db8: f000 80d3 beq.w 8039f62 if (recv_flags & TF_RESET) { - 8039d8c: 4b71 ldr r3, [pc, #452] ; (8039f54 ) - 8039d8e: 781b ldrb r3, [r3, #0] - 8039d90: f003 0308 and.w r3, r3, #8 - 8039d94: 2b00 cmp r3, #0 - 8039d96: d015 beq.n 8039dc4 + 8039dbc: 4b71 ldr r3, [pc, #452] ; (8039f84 ) + 8039dbe: 781b ldrb r3, [r3, #0] + 8039dc0: f003 0308 and.w r3, r3, #8 + 8039dc4: 2b00 cmp r3, #0 + 8039dc6: d015 beq.n 8039df4 /* TF_RESET means that the connection was reset by the other end. We then call the error callback to inform the application that the connection is dead before we deallocate the PCB. */ TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_RST); - 8039d98: 69fb ldr r3, [r7, #28] - 8039d9a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8039d9e: 2b00 cmp r3, #0 - 8039da0: d008 beq.n 8039db4 - 8039da2: 69fb ldr r3, [r7, #28] - 8039da4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8039da8: 69fa ldr r2, [r7, #28] - 8039daa: 6912 ldr r2, [r2, #16] - 8039dac: f06f 010d mvn.w r1, #13 - 8039db0: 4610 mov r0, r2 - 8039db2: 4798 blx r3 + 8039dc8: 69fb ldr r3, [r7, #28] + 8039dca: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8039dce: 2b00 cmp r3, #0 + 8039dd0: d008 beq.n 8039de4 + 8039dd2: 69fb ldr r3, [r7, #28] + 8039dd4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8039dd8: 69fa ldr r2, [r7, #28] + 8039dda: 6912 ldr r2, [r2, #16] + 8039ddc: f06f 010d mvn.w r1, #13 + 8039de0: 4610 mov r0, r2 + 8039de2: 4798 blx r3 tcp_pcb_remove(&tcp_active_pcbs, pcb); - 8039db4: 69f9 ldr r1, [r7, #28] - 8039db6: 486c ldr r0, [pc, #432] ; (8039f68 ) - 8039db8: f7ff fbbc bl 8039534 + 8039de4: 69f9 ldr r1, [r7, #28] + 8039de6: 486c ldr r0, [pc, #432] ; (8039f98 ) + 8039de8: f7ff fbbc bl 8039564 tcp_free(pcb); - 8039dbc: 69f8 ldr r0, [r7, #28] - 8039dbe: f7fd ff45 bl 8037c4c - 8039dc2: e0da b.n 8039f7a + 8039dec: 69f8 ldr r0, [r7, #28] + 8039dee: f7fd ff45 bl 8037c7c + 8039df2: e0da b.n 8039faa } else { err = ERR_OK; - 8039dc4: 2300 movs r3, #0 - 8039dc6: 74fb strb r3, [r7, #19] + 8039df4: 2300 movs r3, #0 + 8039df6: 74fb strb r3, [r7, #19] /* If the application has registered a "sent" function to be called when new send buffer space is available, we call it now. */ if (recv_acked > 0) { - 8039dc8: 4b63 ldr r3, [pc, #396] ; (8039f58 ) - 8039dca: 881b ldrh r3, [r3, #0] - 8039dcc: 2b00 cmp r3, #0 - 8039dce: d01d beq.n 8039e0c + 8039df8: 4b63 ldr r3, [pc, #396] ; (8039f88 ) + 8039dfa: 881b ldrh r3, [r3, #0] + 8039dfc: 2b00 cmp r3, #0 + 8039dfe: d01d beq.n 8039e3c while (acked > 0) { acked16 = (u16_t)LWIP_MIN(acked, 0xffffu); acked -= acked16; #else { acked16 = recv_acked; - 8039dd0: 4b61 ldr r3, [pc, #388] ; (8039f58 ) - 8039dd2: 881b ldrh r3, [r3, #0] - 8039dd4: 81fb strh r3, [r7, #14] + 8039e00: 4b61 ldr r3, [pc, #388] ; (8039f88 ) + 8039e02: 881b ldrh r3, [r3, #0] + 8039e04: 81fb strh r3, [r7, #14] #endif TCP_EVENT_SENT(pcb, (u16_t)acked16, err); - 8039dd6: 69fb ldr r3, [r7, #28] - 8039dd8: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 8039ddc: 2b00 cmp r3, #0 - 8039dde: d00a beq.n 8039df6 - 8039de0: 69fb ldr r3, [r7, #28] - 8039de2: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 8039de6: 69fa ldr r2, [r7, #28] - 8039de8: 6910 ldr r0, [r2, #16] - 8039dea: 89fa ldrh r2, [r7, #14] - 8039dec: 69f9 ldr r1, [r7, #28] - 8039dee: 4798 blx r3 - 8039df0: 4603 mov r3, r0 - 8039df2: 74fb strb r3, [r7, #19] - 8039df4: e001 b.n 8039dfa - 8039df6: 2300 movs r3, #0 - 8039df8: 74fb strb r3, [r7, #19] + 8039e06: 69fb ldr r3, [r7, #28] + 8039e08: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 8039e0c: 2b00 cmp r3, #0 + 8039e0e: d00a beq.n 8039e26 + 8039e10: 69fb ldr r3, [r7, #28] + 8039e12: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 8039e16: 69fa ldr r2, [r7, #28] + 8039e18: 6910 ldr r0, [r2, #16] + 8039e1a: 89fa ldrh r2, [r7, #14] + 8039e1c: 69f9 ldr r1, [r7, #28] + 8039e1e: 4798 blx r3 + 8039e20: 4603 mov r3, r0 + 8039e22: 74fb strb r3, [r7, #19] + 8039e24: e001 b.n 8039e2a + 8039e26: 2300 movs r3, #0 + 8039e28: 74fb strb r3, [r7, #19] if (err == ERR_ABRT) { - 8039dfa: f997 3013 ldrsb.w r3, [r7, #19] - 8039dfe: f113 0f0d cmn.w r3, #13 - 8039e02: f000 8098 beq.w 8039f36 + 8039e2a: f997 3013 ldrsb.w r3, [r7, #19] + 8039e2e: f113 0f0d cmn.w r3, #13 + 8039e32: f000 8098 beq.w 8039f66 goto aborted; } } recv_acked = 0; - 8039e06: 4b54 ldr r3, [pc, #336] ; (8039f58 ) - 8039e08: 2200 movs r2, #0 - 8039e0a: 801a strh r2, [r3, #0] + 8039e36: 4b54 ldr r3, [pc, #336] ; (8039f88 ) + 8039e38: 2200 movs r2, #0 + 8039e3a: 801a strh r2, [r3, #0] } if (tcp_input_delayed_close(pcb)) { - 8039e0c: 69f8 ldr r0, [r7, #28] - 8039e0e: f000 f915 bl 803a03c - 8039e12: 4603 mov r3, r0 - 8039e14: 2b00 cmp r3, #0 - 8039e16: f040 8090 bne.w 8039f3a + 8039e3c: 69f8 ldr r0, [r7, #28] + 8039e3e: f000 f915 bl 803a06c + 8039e42: 4603 mov r3, r0 + 8039e44: 2b00 cmp r3, #0 + 8039e46: f040 8090 bne.w 8039f6a #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE while (recv_data != NULL) { struct pbuf *rest = NULL; pbuf_split_64k(recv_data, &rest); #else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ if (recv_data != NULL) { - 8039e1a: 4b4d ldr r3, [pc, #308] ; (8039f50 ) - 8039e1c: 681b ldr r3, [r3, #0] - 8039e1e: 2b00 cmp r3, #0 - 8039e20: d041 beq.n 8039ea6 + 8039e4a: 4b4d ldr r3, [pc, #308] ; (8039f80 ) + 8039e4c: 681b ldr r3, [r3, #0] + 8039e4e: 2b00 cmp r3, #0 + 8039e50: d041 beq.n 8039ed6 #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL); - 8039e22: 69fb ldr r3, [r7, #28] - 8039e24: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039e26: 2b00 cmp r3, #0 - 8039e28: d006 beq.n 8039e38 - 8039e2a: 4b50 ldr r3, [pc, #320] ; (8039f6c ) - 8039e2c: f44f 72f3 mov.w r2, #486 ; 0x1e6 - 8039e30: 494f ldr r1, [pc, #316] ; (8039f70 ) - 8039e32: 4850 ldr r0, [pc, #320] ; (8039f74 ) - 8039e34: f006 fe54 bl 8040ae0 + 8039e52: 69fb ldr r3, [r7, #28] + 8039e54: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039e56: 2b00 cmp r3, #0 + 8039e58: d006 beq.n 8039e68 + 8039e5a: 4b50 ldr r3, [pc, #320] ; (8039f9c ) + 8039e5c: f44f 72f3 mov.w r2, #486 ; 0x1e6 + 8039e60: 494f ldr r1, [pc, #316] ; (8039fa0 ) + 8039e62: 4850 ldr r0, [pc, #320] ; (8039fa4 ) + 8039e64: f006 fe54 bl 8040b10 if (pcb->flags & TF_RXCLOSED) { - 8039e38: 69fb ldr r3, [r7, #28] - 8039e3a: 8b5b ldrh r3, [r3, #26] - 8039e3c: f003 0310 and.w r3, r3, #16 - 8039e40: 2b00 cmp r3, #0 - 8039e42: d008 beq.n 8039e56 + 8039e68: 69fb ldr r3, [r7, #28] + 8039e6a: 8b5b ldrh r3, [r3, #26] + 8039e6c: f003 0310 and.w r3, r3, #16 + 8039e70: 2b00 cmp r3, #0 + 8039e72: d008 beq.n 8039e86 /* received data although already closed -> abort (send RST) to notify the remote host that not all data has been processed */ pbuf_free(recv_data); - 8039e44: 4b42 ldr r3, [pc, #264] ; (8039f50 ) - 8039e46: 681b ldr r3, [r3, #0] - 8039e48: 4618 mov r0, r3 - 8039e4a: f7fd fc5f bl 803770c + 8039e74: 4b42 ldr r3, [pc, #264] ; (8039f80 ) + 8039e76: 681b ldr r3, [r3, #0] + 8039e78: 4618 mov r0, r3 + 8039e7a: f7fd fc5f bl 803773c #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE if (rest != NULL) { pbuf_free(rest); } #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ tcp_abort(pcb); - 8039e4e: 69f8 ldr r0, [r7, #28] - 8039e50: f7fe f9e4 bl 803821c + 8039e7e: 69f8 ldr r0, [r7, #28] + 8039e80: f7fe f9e4 bl 803824c goto aborted; - 8039e54: e091 b.n 8039f7a + 8039e84: e091 b.n 8039faa } /* Notify application that data has been received. */ TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err); - 8039e56: 69fb ldr r3, [r7, #28] - 8039e58: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8039e5c: 2b00 cmp r3, #0 - 8039e5e: d00c beq.n 8039e7a - 8039e60: 69fb ldr r3, [r7, #28] - 8039e62: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 - 8039e66: 69fb ldr r3, [r7, #28] - 8039e68: 6918 ldr r0, [r3, #16] - 8039e6a: 4b39 ldr r3, [pc, #228] ; (8039f50 ) - 8039e6c: 681a ldr r2, [r3, #0] - 8039e6e: 2300 movs r3, #0 - 8039e70: 69f9 ldr r1, [r7, #28] - 8039e72: 47a0 blx r4 - 8039e74: 4603 mov r3, r0 - 8039e76: 74fb strb r3, [r7, #19] - 8039e78: e008 b.n 8039e8c - 8039e7a: 4b35 ldr r3, [pc, #212] ; (8039f50 ) - 8039e7c: 681a ldr r2, [r3, #0] - 8039e7e: 2300 movs r3, #0 - 8039e80: 69f9 ldr r1, [r7, #28] - 8039e82: 2000 movs r0, #0 - 8039e84: f7ff f8d2 bl 803902c - 8039e88: 4603 mov r3, r0 - 8039e8a: 74fb strb r3, [r7, #19] + 8039e86: 69fb ldr r3, [r7, #28] + 8039e88: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8039e8c: 2b00 cmp r3, #0 + 8039e8e: d00c beq.n 8039eaa + 8039e90: 69fb ldr r3, [r7, #28] + 8039e92: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 + 8039e96: 69fb ldr r3, [r7, #28] + 8039e98: 6918 ldr r0, [r3, #16] + 8039e9a: 4b39 ldr r3, [pc, #228] ; (8039f80 ) + 8039e9c: 681a ldr r2, [r3, #0] + 8039e9e: 2300 movs r3, #0 + 8039ea0: 69f9 ldr r1, [r7, #28] + 8039ea2: 47a0 blx r4 + 8039ea4: 4603 mov r3, r0 + 8039ea6: 74fb strb r3, [r7, #19] + 8039ea8: e008 b.n 8039ebc + 8039eaa: 4b35 ldr r3, [pc, #212] ; (8039f80 ) + 8039eac: 681a ldr r2, [r3, #0] + 8039eae: 2300 movs r3, #0 + 8039eb0: 69f9 ldr r1, [r7, #28] + 8039eb2: 2000 movs r0, #0 + 8039eb4: f7ff f8d2 bl 803905c + 8039eb8: 4603 mov r3, r0 + 8039eba: 74fb strb r3, [r7, #19] if (err == ERR_ABRT) { - 8039e8c: f997 3013 ldrsb.w r3, [r7, #19] - 8039e90: f113 0f0d cmn.w r3, #13 - 8039e94: d053 beq.n 8039f3e + 8039ebc: f997 3013 ldrsb.w r3, [r7, #19] + 8039ec0: f113 0f0d cmn.w r3, #13 + 8039ec4: d053 beq.n 8039f6e #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ goto aborted; } /* If the upper layer can't receive this data, store it */ if (err != ERR_OK) { - 8039e96: f997 3013 ldrsb.w r3, [r7, #19] - 8039e9a: 2b00 cmp r3, #0 - 8039e9c: d003 beq.n 8039ea6 + 8039ec6: f997 3013 ldrsb.w r3, [r7, #19] + 8039eca: 2b00 cmp r3, #0 + 8039ecc: d003 beq.n 8039ed6 #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE if (rest != NULL) { pbuf_cat(recv_data, rest); } #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ pcb->refused_data = recv_data; - 8039e9e: 4b2c ldr r3, [pc, #176] ; (8039f50 ) - 8039ea0: 681a ldr r2, [r3, #0] - 8039ea2: 69fb ldr r3, [r7, #28] - 8039ea4: 679a str r2, [r3, #120] ; 0x78 + 8039ece: 4b2c ldr r3, [pc, #176] ; (8039f80 ) + 8039ed0: 681a ldr r2, [r3, #0] + 8039ed2: 69fb ldr r3, [r7, #28] + 8039ed4: 679a str r2, [r3, #120] ; 0x78 } } /* If a FIN segment was received, we call the callback function with a NULL buffer to indicate EOF. */ if (recv_flags & TF_GOT_FIN) { - 8039ea6: 4b2b ldr r3, [pc, #172] ; (8039f54 ) - 8039ea8: 781b ldrb r3, [r3, #0] - 8039eaa: f003 0320 and.w r3, r3, #32 - 8039eae: 2b00 cmp r3, #0 - 8039eb0: d030 beq.n 8039f14 + 8039ed6: 4b2b ldr r3, [pc, #172] ; (8039f84 ) + 8039ed8: 781b ldrb r3, [r3, #0] + 8039eda: f003 0320 and.w r3, r3, #32 + 8039ede: 2b00 cmp r3, #0 + 8039ee0: d030 beq.n 8039f44 if (pcb->refused_data != NULL) { - 8039eb2: 69fb ldr r3, [r7, #28] - 8039eb4: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039eb6: 2b00 cmp r3, #0 - 8039eb8: d009 beq.n 8039ece + 8039ee2: 69fb ldr r3, [r7, #28] + 8039ee4: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039ee6: 2b00 cmp r3, #0 + 8039ee8: d009 beq.n 8039efe /* Delay this if we have refused data. */ pcb->refused_data->flags |= PBUF_FLAG_TCP_FIN; - 8039eba: 69fb ldr r3, [r7, #28] - 8039ebc: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039ebe: 7b5a ldrb r2, [r3, #13] - 8039ec0: 69fb ldr r3, [r7, #28] - 8039ec2: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039ec4: f042 0220 orr.w r2, r2, #32 - 8039ec8: b2d2 uxtb r2, r2 - 8039eca: 735a strb r2, [r3, #13] - 8039ecc: e022 b.n 8039f14 + 8039eea: 69fb ldr r3, [r7, #28] + 8039eec: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039eee: 7b5a ldrb r2, [r3, #13] + 8039ef0: 69fb ldr r3, [r7, #28] + 8039ef2: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039ef4: f042 0220 orr.w r2, r2, #32 + 8039ef8: b2d2 uxtb r2, r2 + 8039efa: 735a strb r2, [r3, #13] + 8039efc: e022 b.n 8039f44 } else { /* correct rcv_wnd as the application won't call tcp_recved() for the FIN's seqno */ if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) { - 8039ece: 69fb ldr r3, [r7, #28] - 8039ed0: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8039ed2: f5b3 6f06 cmp.w r3, #2144 ; 0x860 - 8039ed6: d005 beq.n 8039ee4 + 8039efe: 69fb ldr r3, [r7, #28] + 8039f00: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8039f02: f5b3 6f06 cmp.w r3, #2144 ; 0x860 + 8039f06: d005 beq.n 8039f14 pcb->rcv_wnd++; - 8039ed8: 69fb ldr r3, [r7, #28] - 8039eda: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8039edc: 3301 adds r3, #1 - 8039ede: b29a uxth r2, r3 - 8039ee0: 69fb ldr r3, [r7, #28] - 8039ee2: 851a strh r2, [r3, #40] ; 0x28 + 8039f08: 69fb ldr r3, [r7, #28] + 8039f0a: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8039f0c: 3301 adds r3, #1 + 8039f0e: b29a uxth r2, r3 + 8039f10: 69fb ldr r3, [r7, #28] + 8039f12: 851a strh r2, [r3, #40] ; 0x28 } TCP_EVENT_CLOSED(pcb, err); - 8039ee4: 69fb ldr r3, [r7, #28] - 8039ee6: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8039eea: 2b00 cmp r3, #0 - 8039eec: d00b beq.n 8039f06 - 8039eee: 69fb ldr r3, [r7, #28] - 8039ef0: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 - 8039ef4: 69fb ldr r3, [r7, #28] - 8039ef6: 6918 ldr r0, [r3, #16] - 8039ef8: 2300 movs r3, #0 - 8039efa: 2200 movs r2, #0 - 8039efc: 69f9 ldr r1, [r7, #28] - 8039efe: 47a0 blx r4 - 8039f00: 4603 mov r3, r0 - 8039f02: 74fb strb r3, [r7, #19] - 8039f04: e001 b.n 8039f0a - 8039f06: 2300 movs r3, #0 - 8039f08: 74fb strb r3, [r7, #19] + 8039f14: 69fb ldr r3, [r7, #28] + 8039f16: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8039f1a: 2b00 cmp r3, #0 + 8039f1c: d00b beq.n 8039f36 + 8039f1e: 69fb ldr r3, [r7, #28] + 8039f20: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 + 8039f24: 69fb ldr r3, [r7, #28] + 8039f26: 6918 ldr r0, [r3, #16] + 8039f28: 2300 movs r3, #0 + 8039f2a: 2200 movs r2, #0 + 8039f2c: 69f9 ldr r1, [r7, #28] + 8039f2e: 47a0 blx r4 + 8039f30: 4603 mov r3, r0 + 8039f32: 74fb strb r3, [r7, #19] + 8039f34: e001 b.n 8039f3a + 8039f36: 2300 movs r3, #0 + 8039f38: 74fb strb r3, [r7, #19] if (err == ERR_ABRT) { - 8039f0a: f997 3013 ldrsb.w r3, [r7, #19] - 8039f0e: f113 0f0d cmn.w r3, #13 - 8039f12: d016 beq.n 8039f42 + 8039f3a: f997 3013 ldrsb.w r3, [r7, #19] + 8039f3e: f113 0f0d cmn.w r3, #13 + 8039f42: d016 beq.n 8039f72 goto aborted; } } } tcp_input_pcb = NULL; - 8039f14: 4b13 ldr r3, [pc, #76] ; (8039f64 ) - 8039f16: 2200 movs r2, #0 - 8039f18: 601a str r2, [r3, #0] + 8039f44: 4b13 ldr r3, [pc, #76] ; (8039f94 ) + 8039f46: 2200 movs r2, #0 + 8039f48: 601a str r2, [r3, #0] if (tcp_input_delayed_close(pcb)) { - 8039f1a: 69f8 ldr r0, [r7, #28] - 8039f1c: f000 f88e bl 803a03c - 8039f20: 4603 mov r3, r0 - 8039f22: 2b00 cmp r3, #0 - 8039f24: d128 bne.n 8039f78 + 8039f4a: 69f8 ldr r0, [r7, #28] + 8039f4c: f000 f88e bl 803a06c + 8039f50: 4603 mov r3, r0 + 8039f52: 2b00 cmp r3, #0 + 8039f54: d128 bne.n 8039fa8 goto aborted; } /* Try to send something out. */ tcp_output(pcb); - 8039f26: 69f8 ldr r0, [r7, #28] - 8039f28: f002 ff20 bl 803cd6c - 8039f2c: e025 b.n 8039f7a + 8039f56: 69f8 ldr r0, [r7, #28] + 8039f58: f002 ff20 bl 803cd9c + 8039f5c: e025 b.n 8039faa goto aborted; - 8039f2e: bf00 nop - 8039f30: e023 b.n 8039f7a + 8039f5e: bf00 nop + 8039f60: e023 b.n 8039faa #endif /* TCP_INPUT_DEBUG */ } } /* Jump target if pcb has been aborted in a callback (by calling tcp_abort()). Below this line, 'pcb' may not be dereferenced! */ aborted: - 8039f32: bf00 nop - 8039f34: e021 b.n 8039f7a + 8039f62: bf00 nop + 8039f64: e021 b.n 8039faa goto aborted; - 8039f36: bf00 nop - 8039f38: e01f b.n 8039f7a + 8039f66: bf00 nop + 8039f68: e01f b.n 8039faa goto aborted; - 8039f3a: bf00 nop - 8039f3c: e01d b.n 8039f7a + 8039f6a: bf00 nop + 8039f6c: e01d b.n 8039faa goto aborted; - 8039f3e: bf00 nop - 8039f40: e01b b.n 8039f7a + 8039f6e: bf00 nop + 8039f70: e01b b.n 8039faa goto aborted; - 8039f42: bf00 nop - 8039f44: e019 b.n 8039f7a - 8039f46: bf00 nop - 8039f48: 2400e970 .word 0x2400e970 - 8039f4c: 2400e980 .word 0x2400e980 - 8039f50: 2400e9a0 .word 0x2400e9a0 - 8039f54: 2400e99d .word 0x2400e99d - 8039f58: 2400e998 .word 0x2400e998 - 8039f5c: 2400e99c .word 0x2400e99c - 8039f60: 2400e99a .word 0x2400e99a - 8039f64: 2400e9a4 .word 0x2400e9a4 - 8039f68: 2400e964 .word 0x2400e964 - 8039f6c: 080434d0 .word 0x080434d0 - 8039f70: 08043684 .word 0x08043684 - 8039f74: 0804351c .word 0x0804351c + 8039f72: bf00 nop + 8039f74: e019 b.n 8039faa + 8039f76: bf00 nop + 8039f78: 2400e970 .word 0x2400e970 + 8039f7c: 2400e980 .word 0x2400e980 + 8039f80: 2400e9a0 .word 0x2400e9a0 + 8039f84: 2400e99d .word 0x2400e99d + 8039f88: 2400e998 .word 0x2400e998 + 8039f8c: 2400e99c .word 0x2400e99c + 8039f90: 2400e99a .word 0x2400e99a + 8039f94: 2400e9a4 .word 0x2400e9a4 + 8039f98: 2400e964 .word 0x2400e964 + 8039f9c: 08043500 .word 0x08043500 + 8039fa0: 080436b4 .word 0x080436b4 + 8039fa4: 0804354c .word 0x0804354c goto aborted; - 8039f78: bf00 nop + 8039fa8: bf00 nop tcp_input_pcb = NULL; - 8039f7a: 4b27 ldr r3, [pc, #156] ; (803a018 ) - 8039f7c: 2200 movs r2, #0 - 8039f7e: 601a str r2, [r3, #0] + 8039faa: 4b27 ldr r3, [pc, #156] ; (803a048 ) + 8039fac: 2200 movs r2, #0 + 8039fae: 601a str r2, [r3, #0] recv_data = NULL; - 8039f80: 4b26 ldr r3, [pc, #152] ; (803a01c ) - 8039f82: 2200 movs r2, #0 - 8039f84: 601a str r2, [r3, #0] + 8039fb0: 4b26 ldr r3, [pc, #152] ; (803a04c ) + 8039fb2: 2200 movs r2, #0 + 8039fb4: 601a str r2, [r3, #0] /* give up our reference to inseg.p */ if (inseg.p != NULL) { - 8039f86: 4b26 ldr r3, [pc, #152] ; (803a020 ) - 8039f88: 685b ldr r3, [r3, #4] - 8039f8a: 2b00 cmp r3, #0 - 8039f8c: d03f beq.n 803a00e + 8039fb6: 4b26 ldr r3, [pc, #152] ; (803a050 ) + 8039fb8: 685b ldr r3, [r3, #4] + 8039fba: 2b00 cmp r3, #0 + 8039fbc: d03f beq.n 803a03e pbuf_free(inseg.p); - 8039f8e: 4b24 ldr r3, [pc, #144] ; (803a020 ) - 8039f90: 685b ldr r3, [r3, #4] - 8039f92: 4618 mov r0, r3 - 8039f94: f7fd fbba bl 803770c + 8039fbe: 4b24 ldr r3, [pc, #144] ; (803a050 ) + 8039fc0: 685b ldr r3, [r3, #4] + 8039fc2: 4618 mov r0, r3 + 8039fc4: f7fd fbba bl 803773c inseg.p = NULL; - 8039f98: 4b21 ldr r3, [pc, #132] ; (803a020 ) - 8039f9a: 2200 movs r2, #0 - 8039f9c: 605a str r2, [r3, #4] + 8039fc8: 4b21 ldr r3, [pc, #132] ; (803a050 ) + 8039fca: 2200 movs r2, #0 + 8039fcc: 605a str r2, [r3, #4] pbuf_free(p); } LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane()); PERF_STOP("tcp_input"); return; - 8039f9e: e036 b.n 803a00e + 8039fce: e036 b.n 803a03e if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) { - 8039fa0: 4b20 ldr r3, [pc, #128] ; (803a024 ) - 8039fa2: 681b ldr r3, [r3, #0] - 8039fa4: 899b ldrh r3, [r3, #12] - 8039fa6: b29b uxth r3, r3 - 8039fa8: 4618 mov r0, r3 - 8039faa: f7fb ff7d bl 8035ea8 - 8039fae: 4603 mov r3, r0 - 8039fb0: b2db uxtb r3, r3 - 8039fb2: f003 0304 and.w r3, r3, #4 - 8039fb6: 2b00 cmp r3, #0 - 8039fb8: d118 bne.n 8039fec + 8039fd0: 4b20 ldr r3, [pc, #128] ; (803a054 ) + 8039fd2: 681b ldr r3, [r3, #0] + 8039fd4: 899b ldrh r3, [r3, #12] + 8039fd6: b29b uxth r3, r3 + 8039fd8: 4618 mov r0, r3 + 8039fda: f7fb ff7d bl 8035ed8 + 8039fde: 4603 mov r3, r0 + 8039fe0: b2db uxtb r3, r3 + 8039fe2: f003 0304 and.w r3, r3, #4 + 8039fe6: 2b00 cmp r3, #0 + 8039fe8: d118 bne.n 803a01c tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(), - 8039fba: 4b1b ldr r3, [pc, #108] ; (803a028 ) - 8039fbc: 6819 ldr r1, [r3, #0] - 8039fbe: 4b1b ldr r3, [pc, #108] ; (803a02c ) - 8039fc0: 881b ldrh r3, [r3, #0] - 8039fc2: 461a mov r2, r3 - 8039fc4: 4b1a ldr r3, [pc, #104] ; (803a030 ) - 8039fc6: 681b ldr r3, [r3, #0] - 8039fc8: 18d0 adds r0, r2, r3 + 8039fea: 4b1b ldr r3, [pc, #108] ; (803a058 ) + 8039fec: 6819 ldr r1, [r3, #0] + 8039fee: 4b1b ldr r3, [pc, #108] ; (803a05c ) + 8039ff0: 881b ldrh r3, [r3, #0] + 8039ff2: 461a mov r2, r3 + 8039ff4: 4b1a ldr r3, [pc, #104] ; (803a060 ) + 8039ff6: 681b ldr r3, [r3, #0] + 8039ff8: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 8039fca: 4b16 ldr r3, [pc, #88] ; (803a024 ) - 8039fcc: 681b ldr r3, [r3, #0] + 8039ffa: 4b16 ldr r3, [pc, #88] ; (803a054 ) + 8039ffc: 681b ldr r3, [r3, #0] tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(), - 8039fce: 885b ldrh r3, [r3, #2] - 8039fd0: b29b uxth r3, r3 + 8039ffe: 885b ldrh r3, [r3, #2] + 803a000: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 8039fd2: 4a14 ldr r2, [pc, #80] ; (803a024 ) - 8039fd4: 6812 ldr r2, [r2, #0] + 803a002: 4a14 ldr r2, [pc, #80] ; (803a054 ) + 803a004: 6812 ldr r2, [r2, #0] tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(), - 8039fd6: 8812 ldrh r2, [r2, #0] - 8039fd8: b292 uxth r2, r2 - 8039fda: 9202 str r2, [sp, #8] - 8039fdc: 9301 str r3, [sp, #4] - 8039fde: 4b15 ldr r3, [pc, #84] ; (803a034 ) - 8039fe0: 9300 str r3, [sp, #0] - 8039fe2: 4b15 ldr r3, [pc, #84] ; (803a038 ) - 8039fe4: 4602 mov r2, r0 - 8039fe6: 2000 movs r0, #0 - 8039fe8: f003 fc74 bl 803d8d4 + 803a006: 8812 ldrh r2, [r2, #0] + 803a008: b292 uxth r2, r2 + 803a00a: 9202 str r2, [sp, #8] + 803a00c: 9301 str r3, [sp, #4] + 803a00e: 4b15 ldr r3, [pc, #84] ; (803a064 ) + 803a010: 9300 str r3, [sp, #0] + 803a012: 4b15 ldr r3, [pc, #84] ; (803a068 ) + 803a014: 4602 mov r2, r0 + 803a016: 2000 movs r0, #0 + 803a018: f003 fc74 bl 803d904 pbuf_free(p); - 8039fec: 6878 ldr r0, [r7, #4] - 8039fee: f7fd fb8d bl 803770c + 803a01c: 6878 ldr r0, [r7, #4] + 803a01e: f7fd fb8d bl 803773c return; - 8039ff2: e00c b.n 803a00e + 803a022: e00c b.n 803a03e goto dropped; - 8039ff4: bf00 nop - 8039ff6: e006 b.n 803a006 + 803a024: bf00 nop + 803a026: e006 b.n 803a036 goto dropped; - 8039ff8: bf00 nop - 8039ffa: e004 b.n 803a006 + 803a028: bf00 nop + 803a02a: e004 b.n 803a036 goto dropped; - 8039ffc: bf00 nop - 8039ffe: e002 b.n 803a006 + 803a02c: bf00 nop + 803a02e: e002 b.n 803a036 goto dropped; - 803a000: bf00 nop - 803a002: e000 b.n 803a006 + 803a030: bf00 nop + 803a032: e000 b.n 803a036 goto dropped; - 803a004: bf00 nop + 803a034: bf00 nop dropped: TCP_STATS_INC(tcp.drop); MIB2_STATS_INC(mib2.tcpinerrs); pbuf_free(p); - 803a006: 6878 ldr r0, [r7, #4] - 803a008: f7fd fb80 bl 803770c - 803a00c: e000 b.n 803a010 + 803a036: 6878 ldr r0, [r7, #4] + 803a038: f7fd fb80 bl 803773c + 803a03c: e000 b.n 803a040 return; - 803a00e: bf00 nop -} - 803a010: 3724 adds r7, #36 ; 0x24 - 803a012: 46bd mov sp, r7 - 803a014: bd90 pop {r4, r7, pc} - 803a016: bf00 nop - 803a018: 2400e9a4 .word 0x2400e9a4 - 803a01c: 2400e9a0 .word 0x2400e9a0 - 803a020: 2400e970 .word 0x2400e970 - 803a024: 2400e980 .word 0x2400e980 - 803a028: 2400e994 .word 0x2400e994 - 803a02c: 2400e99a .word 0x2400e99a - 803a030: 2400e990 .word 0x2400e990 - 803a034: 2400b9cc .word 0x2400b9cc - 803a038: 2400b9d0 .word 0x2400b9d0 - -0803a03c : + 803a03e: bf00 nop +} + 803a040: 3724 adds r7, #36 ; 0x24 + 803a042: 46bd mov sp, r7 + 803a044: bd90 pop {r4, r7, pc} + 803a046: bf00 nop + 803a048: 2400e9a4 .word 0x2400e9a4 + 803a04c: 2400e9a0 .word 0x2400e9a0 + 803a050: 2400e970 .word 0x2400e970 + 803a054: 2400e980 .word 0x2400e980 + 803a058: 2400e994 .word 0x2400e994 + 803a05c: 2400e99a .word 0x2400e99a + 803a060: 2400e990 .word 0x2400e990 + 803a064: 2400b9cc .word 0x2400b9cc + 803a068: 2400b9d0 .word 0x2400b9d0 + +0803a06c : * any more. * @returns 1 if the pcb has been closed and deallocated, 0 otherwise */ static int tcp_input_delayed_close(struct tcp_pcb *pcb) { - 803a03c: b580 push {r7, lr} - 803a03e: b082 sub sp, #8 - 803a040: af00 add r7, sp, #0 - 803a042: 6078 str r0, [r7, #4] + 803a06c: b580 push {r7, lr} + 803a06e: b082 sub sp, #8 + 803a070: af00 add r7, sp, #0 + 803a072: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_input_delayed_close: invalid pcb", pcb != NULL); - 803a044: 687b ldr r3, [r7, #4] - 803a046: 2b00 cmp r3, #0 - 803a048: d106 bne.n 803a058 - 803a04a: 4b17 ldr r3, [pc, #92] ; (803a0a8 ) - 803a04c: f240 225a movw r2, #602 ; 0x25a - 803a050: 4916 ldr r1, [pc, #88] ; (803a0ac ) - 803a052: 4817 ldr r0, [pc, #92] ; (803a0b0 ) - 803a054: f006 fd44 bl 8040ae0 + 803a074: 687b ldr r3, [r7, #4] + 803a076: 2b00 cmp r3, #0 + 803a078: d106 bne.n 803a088 + 803a07a: 4b17 ldr r3, [pc, #92] ; (803a0d8 ) + 803a07c: f240 225a movw r2, #602 ; 0x25a + 803a080: 4916 ldr r1, [pc, #88] ; (803a0dc ) + 803a082: 4817 ldr r0, [pc, #92] ; (803a0e0 ) + 803a084: f006 fd44 bl 8040b10 if (recv_flags & TF_CLOSED) { - 803a058: 4b16 ldr r3, [pc, #88] ; (803a0b4 ) - 803a05a: 781b ldrb r3, [r3, #0] - 803a05c: f003 0310 and.w r3, r3, #16 - 803a060: 2b00 cmp r3, #0 - 803a062: d01c beq.n 803a09e + 803a088: 4b16 ldr r3, [pc, #88] ; (803a0e4 ) + 803a08a: 781b ldrb r3, [r3, #0] + 803a08c: f003 0310 and.w r3, r3, #16 + 803a090: 2b00 cmp r3, #0 + 803a092: d01c beq.n 803a0ce /* The connection has been closed and we will deallocate the PCB. */ if (!(pcb->flags & TF_RXCLOSED)) { - 803a064: 687b ldr r3, [r7, #4] - 803a066: 8b5b ldrh r3, [r3, #26] - 803a068: f003 0310 and.w r3, r3, #16 - 803a06c: 2b00 cmp r3, #0 - 803a06e: d10d bne.n 803a08c + 803a094: 687b ldr r3, [r7, #4] + 803a096: 8b5b ldrh r3, [r3, #26] + 803a098: f003 0310 and.w r3, r3, #16 + 803a09c: 2b00 cmp r3, #0 + 803a09e: d10d bne.n 803a0bc /* Connection closed although the application has only shut down the tx side: call the PCB's err callback and indicate the closure to ensure the application doesn't continue using the PCB. */ TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_CLSD); - 803a070: 687b ldr r3, [r7, #4] - 803a072: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 803a076: 2b00 cmp r3, #0 - 803a078: d008 beq.n 803a08c - 803a07a: 687b ldr r3, [r7, #4] - 803a07c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 803a080: 687a ldr r2, [r7, #4] - 803a082: 6912 ldr r2, [r2, #16] - 803a084: f06f 010e mvn.w r1, #14 - 803a088: 4610 mov r0, r2 - 803a08a: 4798 blx r3 + 803a0a0: 687b ldr r3, [r7, #4] + 803a0a2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 803a0a6: 2b00 cmp r3, #0 + 803a0a8: d008 beq.n 803a0bc + 803a0aa: 687b ldr r3, [r7, #4] + 803a0ac: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 803a0b0: 687a ldr r2, [r7, #4] + 803a0b2: 6912 ldr r2, [r2, #16] + 803a0b4: f06f 010e mvn.w r1, #14 + 803a0b8: 4610 mov r0, r2 + 803a0ba: 4798 blx r3 } tcp_pcb_remove(&tcp_active_pcbs, pcb); - 803a08c: 6879 ldr r1, [r7, #4] - 803a08e: 480a ldr r0, [pc, #40] ; (803a0b8 ) - 803a090: f7ff fa50 bl 8039534 + 803a0bc: 6879 ldr r1, [r7, #4] + 803a0be: 480a ldr r0, [pc, #40] ; (803a0e8 ) + 803a0c0: f7ff fa50 bl 8039564 tcp_free(pcb); - 803a094: 6878 ldr r0, [r7, #4] - 803a096: f7fd fdd9 bl 8037c4c + 803a0c4: 6878 ldr r0, [r7, #4] + 803a0c6: f7fd fdd9 bl 8037c7c return 1; - 803a09a: 2301 movs r3, #1 - 803a09c: e000 b.n 803a0a0 + 803a0ca: 2301 movs r3, #1 + 803a0cc: e000 b.n 803a0d0 } return 0; - 803a09e: 2300 movs r3, #0 -} - 803a0a0: 4618 mov r0, r3 - 803a0a2: 3708 adds r7, #8 - 803a0a4: 46bd mov sp, r7 - 803a0a6: bd80 pop {r7, pc} - 803a0a8: 080434d0 .word 0x080434d0 - 803a0ac: 080436a0 .word 0x080436a0 - 803a0b0: 0804351c .word 0x0804351c - 803a0b4: 2400e99d .word 0x2400e99d - 803a0b8: 2400e964 .word 0x2400e964 - -0803a0bc : + 803a0ce: 2300 movs r3, #0 +} + 803a0d0: 4618 mov r0, r3 + 803a0d2: 3708 adds r7, #8 + 803a0d4: 46bd mov sp, r7 + 803a0d6: bd80 pop {r7, pc} + 803a0d8: 08043500 .word 0x08043500 + 803a0dc: 080436d0 .word 0x080436d0 + 803a0e0: 0804354c .word 0x0804354c + 803a0e4: 2400e99d .word 0x2400e99d + 803a0e8: 2400e964 .word 0x2400e964 + +0803a0ec : * @note the segment which arrived is saved in global variables, therefore only the pcb * involved is passed as a parameter to this function */ static void tcp_listen_input(struct tcp_pcb_listen *pcb) { - 803a0bc: b590 push {r4, r7, lr} - 803a0be: b08b sub sp, #44 ; 0x2c - 803a0c0: af04 add r7, sp, #16 - 803a0c2: 6078 str r0, [r7, #4] + 803a0ec: b590 push {r4, r7, lr} + 803a0ee: b08b sub sp, #44 ; 0x2c + 803a0f0: af04 add r7, sp, #16 + 803a0f2: 6078 str r0, [r7, #4] struct tcp_pcb *npcb; u32_t iss; err_t rc; if (flags & TCP_RST) { - 803a0c4: 4b6f ldr r3, [pc, #444] ; (803a284 ) - 803a0c6: 781b ldrb r3, [r3, #0] - 803a0c8: f003 0304 and.w r3, r3, #4 - 803a0cc: 2b00 cmp r3, #0 - 803a0ce: f040 80d2 bne.w 803a276 + 803a0f4: 4b6f ldr r3, [pc, #444] ; (803a2b4 ) + 803a0f6: 781b ldrb r3, [r3, #0] + 803a0f8: f003 0304 and.w r3, r3, #4 + 803a0fc: 2b00 cmp r3, #0 + 803a0fe: f040 80d2 bne.w 803a2a6 /* An incoming RST should be ignored. Return. */ return; } LWIP_ASSERT("tcp_listen_input: invalid pcb", pcb != NULL); - 803a0d2: 687b ldr r3, [r7, #4] - 803a0d4: 2b00 cmp r3, #0 - 803a0d6: d106 bne.n 803a0e6 - 803a0d8: 4b6b ldr r3, [pc, #428] ; (803a288 ) - 803a0da: f240 2281 movw r2, #641 ; 0x281 - 803a0de: 496b ldr r1, [pc, #428] ; (803a28c ) - 803a0e0: 486b ldr r0, [pc, #428] ; (803a290 ) - 803a0e2: f006 fcfd bl 8040ae0 + 803a102: 687b ldr r3, [r7, #4] + 803a104: 2b00 cmp r3, #0 + 803a106: d106 bne.n 803a116 + 803a108: 4b6b ldr r3, [pc, #428] ; (803a2b8 ) + 803a10a: f240 2281 movw r2, #641 ; 0x281 + 803a10e: 496b ldr r1, [pc, #428] ; (803a2bc ) + 803a110: 486b ldr r0, [pc, #428] ; (803a2c0 ) + 803a112: f006 fcfd bl 8040b10 /* In the LISTEN state, we check for incoming SYN segments, creates a new PCB, and responds with a SYN|ACK. */ if (flags & TCP_ACK) { - 803a0e6: 4b67 ldr r3, [pc, #412] ; (803a284 ) - 803a0e8: 781b ldrb r3, [r3, #0] - 803a0ea: f003 0310 and.w r3, r3, #16 - 803a0ee: 2b00 cmp r3, #0 - 803a0f0: d019 beq.n 803a126 + 803a116: 4b67 ldr r3, [pc, #412] ; (803a2b4 ) + 803a118: 781b ldrb r3, [r3, #0] + 803a11a: f003 0310 and.w r3, r3, #16 + 803a11e: 2b00 cmp r3, #0 + 803a120: d019 beq.n 803a156 /* For incoming segments with the ACK flag set, respond with a RST. */ LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n")); tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a0f2: 4b68 ldr r3, [pc, #416] ; (803a294 ) - 803a0f4: 6819 ldr r1, [r3, #0] - 803a0f6: 4b68 ldr r3, [pc, #416] ; (803a298 ) - 803a0f8: 881b ldrh r3, [r3, #0] - 803a0fa: 461a mov r2, r3 - 803a0fc: 4b67 ldr r3, [pc, #412] ; (803a29c ) - 803a0fe: 681b ldr r3, [r3, #0] - 803a100: 18d0 adds r0, r2, r3 + 803a122: 4b68 ldr r3, [pc, #416] ; (803a2c4 ) + 803a124: 6819 ldr r1, [r3, #0] + 803a126: 4b68 ldr r3, [pc, #416] ; (803a2c8 ) + 803a128: 881b ldrh r3, [r3, #0] + 803a12a: 461a mov r2, r3 + 803a12c: 4b67 ldr r3, [pc, #412] ; (803a2cc ) + 803a12e: 681b ldr r3, [r3, #0] + 803a130: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a102: 4b67 ldr r3, [pc, #412] ; (803a2a0 ) - 803a104: 681b ldr r3, [r3, #0] + 803a132: 4b67 ldr r3, [pc, #412] ; (803a2d0 ) + 803a134: 681b ldr r3, [r3, #0] tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a106: 885b ldrh r3, [r3, #2] - 803a108: b29b uxth r3, r3 + 803a136: 885b ldrh r3, [r3, #2] + 803a138: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a10a: 4a65 ldr r2, [pc, #404] ; (803a2a0 ) - 803a10c: 6812 ldr r2, [r2, #0] + 803a13a: 4a65 ldr r2, [pc, #404] ; (803a2d0 ) + 803a13c: 6812 ldr r2, [r2, #0] tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a10e: 8812 ldrh r2, [r2, #0] - 803a110: b292 uxth r2, r2 - 803a112: 9202 str r2, [sp, #8] - 803a114: 9301 str r3, [sp, #4] - 803a116: 4b63 ldr r3, [pc, #396] ; (803a2a4 ) - 803a118: 9300 str r3, [sp, #0] - 803a11a: 4b63 ldr r3, [pc, #396] ; (803a2a8 ) - 803a11c: 4602 mov r2, r0 - 803a11e: 6878 ldr r0, [r7, #4] - 803a120: f003 fbd8 bl 803d8d4 + 803a13e: 8812 ldrh r2, [r2, #0] + 803a140: b292 uxth r2, r2 + 803a142: 9202 str r2, [sp, #8] + 803a144: 9301 str r3, [sp, #4] + 803a146: 4b63 ldr r3, [pc, #396] ; (803a2d4 ) + 803a148: 9300 str r3, [sp, #0] + 803a14a: 4b63 ldr r3, [pc, #396] ; (803a2d8 ) + 803a14c: 4602 mov r2, r0 + 803a14e: 6878 ldr r0, [r7, #4] + 803a150: f003 fbd8 bl 803d904 tcp_abandon(npcb, 0); return; } tcp_output(npcb); } return; - 803a124: e0a9 b.n 803a27a + 803a154: e0a9 b.n 803a2aa } else if (flags & TCP_SYN) { - 803a126: 4b57 ldr r3, [pc, #348] ; (803a284 ) - 803a128: 781b ldrb r3, [r3, #0] - 803a12a: f003 0302 and.w r3, r3, #2 - 803a12e: 2b00 cmp r3, #0 - 803a130: f000 80a3 beq.w 803a27a + 803a156: 4b57 ldr r3, [pc, #348] ; (803a2b4 ) + 803a158: 781b ldrb r3, [r3, #0] + 803a15a: f003 0302 and.w r3, r3, #2 + 803a15e: 2b00 cmp r3, #0 + 803a160: f000 80a3 beq.w 803a2aa npcb = tcp_alloc(pcb->prio); - 803a134: 687b ldr r3, [r7, #4] - 803a136: 7d5b ldrb r3, [r3, #21] - 803a138: 4618 mov r0, r3 - 803a13a: f7ff f89b bl 8039274 - 803a13e: 6178 str r0, [r7, #20] + 803a164: 687b ldr r3, [r7, #4] + 803a166: 7d5b ldrb r3, [r3, #21] + 803a168: 4618 mov r0, r3 + 803a16a: f7ff f89b bl 80392a4 + 803a16e: 6178 str r0, [r7, #20] if (npcb == NULL) { - 803a140: 697b ldr r3, [r7, #20] - 803a142: 2b00 cmp r3, #0 - 803a144: d111 bne.n 803a16a + 803a170: 697b ldr r3, [r7, #20] + 803a172: 2b00 cmp r3, #0 + 803a174: d111 bne.n 803a19a TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err); - 803a146: 687b ldr r3, [r7, #4] - 803a148: 699b ldr r3, [r3, #24] - 803a14a: 2b00 cmp r3, #0 - 803a14c: d00a beq.n 803a164 - 803a14e: 687b ldr r3, [r7, #4] - 803a150: 699b ldr r3, [r3, #24] - 803a152: 687a ldr r2, [r7, #4] - 803a154: 6910 ldr r0, [r2, #16] - 803a156: f04f 32ff mov.w r2, #4294967295 - 803a15a: 2100 movs r1, #0 - 803a15c: 4798 blx r3 - 803a15e: 4603 mov r3, r0 - 803a160: 73bb strb r3, [r7, #14] + 803a176: 687b ldr r3, [r7, #4] + 803a178: 699b ldr r3, [r3, #24] + 803a17a: 2b00 cmp r3, #0 + 803a17c: d00a beq.n 803a194 + 803a17e: 687b ldr r3, [r7, #4] + 803a180: 699b ldr r3, [r3, #24] + 803a182: 687a ldr r2, [r7, #4] + 803a184: 6910 ldr r0, [r2, #16] + 803a186: f04f 32ff mov.w r2, #4294967295 + 803a18a: 2100 movs r1, #0 + 803a18c: 4798 blx r3 + 803a18e: 4603 mov r3, r0 + 803a190: 73bb strb r3, [r7, #14] return; - 803a162: e08b b.n 803a27c + 803a192: e08b b.n 803a2ac TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err); - 803a164: 23f0 movs r3, #240 ; 0xf0 - 803a166: 73bb strb r3, [r7, #14] + 803a194: 23f0 movs r3, #240 ; 0xf0 + 803a196: 73bb strb r3, [r7, #14] return; - 803a168: e088 b.n 803a27c + 803a198: e088 b.n 803a2ac ip_addr_copy(npcb->local_ip, *ip_current_dest_addr()); - 803a16a: 4b50 ldr r3, [pc, #320] ; (803a2ac ) - 803a16c: 695a ldr r2, [r3, #20] - 803a16e: 697b ldr r3, [r7, #20] - 803a170: 601a str r2, [r3, #0] + 803a19a: 4b50 ldr r3, [pc, #320] ; (803a2dc ) + 803a19c: 695a ldr r2, [r3, #20] + 803a19e: 697b ldr r3, [r7, #20] + 803a1a0: 601a str r2, [r3, #0] ip_addr_copy(npcb->remote_ip, *ip_current_src_addr()); - 803a172: 4b4e ldr r3, [pc, #312] ; (803a2ac ) - 803a174: 691a ldr r2, [r3, #16] - 803a176: 697b ldr r3, [r7, #20] - 803a178: 605a str r2, [r3, #4] + 803a1a2: 4b4e ldr r3, [pc, #312] ; (803a2dc ) + 803a1a4: 691a ldr r2, [r3, #16] + 803a1a6: 697b ldr r3, [r7, #20] + 803a1a8: 605a str r2, [r3, #4] npcb->local_port = pcb->local_port; - 803a17a: 687b ldr r3, [r7, #4] - 803a17c: 8ada ldrh r2, [r3, #22] - 803a17e: 697b ldr r3, [r7, #20] - 803a180: 82da strh r2, [r3, #22] + 803a1aa: 687b ldr r3, [r7, #4] + 803a1ac: 8ada ldrh r2, [r3, #22] + 803a1ae: 697b ldr r3, [r7, #20] + 803a1b0: 82da strh r2, [r3, #22] npcb->remote_port = tcphdr->src; - 803a182: 4b47 ldr r3, [pc, #284] ; (803a2a0 ) - 803a184: 681b ldr r3, [r3, #0] - 803a186: 881b ldrh r3, [r3, #0] - 803a188: b29a uxth r2, r3 - 803a18a: 697b ldr r3, [r7, #20] - 803a18c: 831a strh r2, [r3, #24] + 803a1b2: 4b47 ldr r3, [pc, #284] ; (803a2d0 ) + 803a1b4: 681b ldr r3, [r3, #0] + 803a1b6: 881b ldrh r3, [r3, #0] + 803a1b8: b29a uxth r2, r3 + 803a1ba: 697b ldr r3, [r7, #20] + 803a1bc: 831a strh r2, [r3, #24] npcb->state = SYN_RCVD; - 803a18e: 697b ldr r3, [r7, #20] - 803a190: 2203 movs r2, #3 - 803a192: 751a strb r2, [r3, #20] + 803a1be: 697b ldr r3, [r7, #20] + 803a1c0: 2203 movs r2, #3 + 803a1c2: 751a strb r2, [r3, #20] npcb->rcv_nxt = seqno + 1; - 803a194: 4b41 ldr r3, [pc, #260] ; (803a29c ) - 803a196: 681b ldr r3, [r3, #0] - 803a198: 1c5a adds r2, r3, #1 - 803a19a: 697b ldr r3, [r7, #20] - 803a19c: 625a str r2, [r3, #36] ; 0x24 + 803a1c4: 4b41 ldr r3, [pc, #260] ; (803a2cc ) + 803a1c6: 681b ldr r3, [r3, #0] + 803a1c8: 1c5a adds r2, r3, #1 + 803a1ca: 697b ldr r3, [r7, #20] + 803a1cc: 625a str r2, [r3, #36] ; 0x24 npcb->rcv_ann_right_edge = npcb->rcv_nxt; - 803a19e: 697b ldr r3, [r7, #20] - 803a1a0: 6a5a ldr r2, [r3, #36] ; 0x24 - 803a1a2: 697b ldr r3, [r7, #20] - 803a1a4: 62da str r2, [r3, #44] ; 0x2c + 803a1ce: 697b ldr r3, [r7, #20] + 803a1d0: 6a5a ldr r2, [r3, #36] ; 0x24 + 803a1d2: 697b ldr r3, [r7, #20] + 803a1d4: 62da str r2, [r3, #44] ; 0x2c iss = tcp_next_iss(npcb); - 803a1a6: 6978 ldr r0, [r7, #20] - 803a1a8: f7ff fa58 bl 803965c - 803a1ac: 6138 str r0, [r7, #16] + 803a1d6: 6978 ldr r0, [r7, #20] + 803a1d8: f7ff fa58 bl 803968c + 803a1dc: 6138 str r0, [r7, #16] npcb->snd_wl2 = iss; - 803a1ae: 697b ldr r3, [r7, #20] - 803a1b0: 693a ldr r2, [r7, #16] - 803a1b2: 659a str r2, [r3, #88] ; 0x58 + 803a1de: 697b ldr r3, [r7, #20] + 803a1e0: 693a ldr r2, [r7, #16] + 803a1e2: 659a str r2, [r3, #88] ; 0x58 npcb->snd_nxt = iss; - 803a1b4: 697b ldr r3, [r7, #20] - 803a1b6: 693a ldr r2, [r7, #16] - 803a1b8: 651a str r2, [r3, #80] ; 0x50 + 803a1e4: 697b ldr r3, [r7, #20] + 803a1e6: 693a ldr r2, [r7, #16] + 803a1e8: 651a str r2, [r3, #80] ; 0x50 npcb->lastack = iss; - 803a1ba: 697b ldr r3, [r7, #20] - 803a1bc: 693a ldr r2, [r7, #16] - 803a1be: 645a str r2, [r3, #68] ; 0x44 + 803a1ea: 697b ldr r3, [r7, #20] + 803a1ec: 693a ldr r2, [r7, #16] + 803a1ee: 645a str r2, [r3, #68] ; 0x44 npcb->snd_lbb = iss; - 803a1c0: 697b ldr r3, [r7, #20] - 803a1c2: 693a ldr r2, [r7, #16] - 803a1c4: 65da str r2, [r3, #92] ; 0x5c + 803a1f0: 697b ldr r3, [r7, #20] + 803a1f2: 693a ldr r2, [r7, #16] + 803a1f4: 65da str r2, [r3, #92] ; 0x5c npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */ - 803a1c6: 4b35 ldr r3, [pc, #212] ; (803a29c ) - 803a1c8: 681b ldr r3, [r3, #0] - 803a1ca: 1e5a subs r2, r3, #1 - 803a1cc: 697b ldr r3, [r7, #20] - 803a1ce: 655a str r2, [r3, #84] ; 0x54 + 803a1f6: 4b35 ldr r3, [pc, #212] ; (803a2cc ) + 803a1f8: 681b ldr r3, [r3, #0] + 803a1fa: 1e5a subs r2, r3, #1 + 803a1fc: 697b ldr r3, [r7, #20] + 803a1fe: 655a str r2, [r3, #84] ; 0x54 npcb->callback_arg = pcb->callback_arg; - 803a1d0: 687b ldr r3, [r7, #4] - 803a1d2: 691a ldr r2, [r3, #16] - 803a1d4: 697b ldr r3, [r7, #20] - 803a1d6: 611a str r2, [r3, #16] + 803a200: 687b ldr r3, [r7, #4] + 803a202: 691a ldr r2, [r3, #16] + 803a204: 697b ldr r3, [r7, #20] + 803a206: 611a str r2, [r3, #16] npcb->listener = pcb; - 803a1d8: 697b ldr r3, [r7, #20] - 803a1da: 687a ldr r2, [r7, #4] - 803a1dc: 67da str r2, [r3, #124] ; 0x7c + 803a208: 697b ldr r3, [r7, #20] + 803a20a: 687a ldr r2, [r7, #4] + 803a20c: 67da str r2, [r3, #124] ; 0x7c npcb->so_options = pcb->so_options & SOF_INHERITED; - 803a1de: 687b ldr r3, [r7, #4] - 803a1e0: 7a5b ldrb r3, [r3, #9] - 803a1e2: f003 030c and.w r3, r3, #12 - 803a1e6: b2da uxtb r2, r3 - 803a1e8: 697b ldr r3, [r7, #20] - 803a1ea: 725a strb r2, [r3, #9] + 803a20e: 687b ldr r3, [r7, #4] + 803a210: 7a5b ldrb r3, [r3, #9] + 803a212: f003 030c and.w r3, r3, #12 + 803a216: b2da uxtb r2, r3 + 803a218: 697b ldr r3, [r7, #20] + 803a21a: 725a strb r2, [r3, #9] npcb->netif_idx = pcb->netif_idx; - 803a1ec: 687b ldr r3, [r7, #4] - 803a1ee: 7a1a ldrb r2, [r3, #8] - 803a1f0: 697b ldr r3, [r7, #20] - 803a1f2: 721a strb r2, [r3, #8] + 803a21c: 687b ldr r3, [r7, #4] + 803a21e: 7a1a ldrb r2, [r3, #8] + 803a220: 697b ldr r3, [r7, #20] + 803a222: 721a strb r2, [r3, #8] TCP_REG_ACTIVE(npcb); - 803a1f4: 4b2e ldr r3, [pc, #184] ; (803a2b0 ) - 803a1f6: 681a ldr r2, [r3, #0] - 803a1f8: 697b ldr r3, [r7, #20] - 803a1fa: 60da str r2, [r3, #12] - 803a1fc: 4a2c ldr r2, [pc, #176] ; (803a2b0 ) - 803a1fe: 697b ldr r3, [r7, #20] - 803a200: 6013 str r3, [r2, #0] - 803a202: f003 fd29 bl 803dc58 - 803a206: 4b2b ldr r3, [pc, #172] ; (803a2b4 ) - 803a208: 2201 movs r2, #1 - 803a20a: 701a strb r2, [r3, #0] + 803a224: 4b2e ldr r3, [pc, #184] ; (803a2e0 ) + 803a226: 681a ldr r2, [r3, #0] + 803a228: 697b ldr r3, [r7, #20] + 803a22a: 60da str r2, [r3, #12] + 803a22c: 4a2c ldr r2, [pc, #176] ; (803a2e0 ) + 803a22e: 697b ldr r3, [r7, #20] + 803a230: 6013 str r3, [r2, #0] + 803a232: f003 fd29 bl 803dc88 + 803a236: 4b2b ldr r3, [pc, #172] ; (803a2e4 ) + 803a238: 2201 movs r2, #1 + 803a23a: 701a strb r2, [r3, #0] tcp_parseopt(npcb); - 803a20c: 6978 ldr r0, [r7, #20] - 803a20e: f001 fd8f bl 803bd30 + 803a23c: 6978 ldr r0, [r7, #20] + 803a23e: f001 fd8f bl 803bd60 npcb->snd_wnd = tcphdr->wnd; - 803a212: 4b23 ldr r3, [pc, #140] ; (803a2a0 ) - 803a214: 681b ldr r3, [r3, #0] - 803a216: 89db ldrh r3, [r3, #14] - 803a218: b29a uxth r2, r3 - 803a21a: 697b ldr r3, [r7, #20] - 803a21c: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 803a242: 4b23 ldr r3, [pc, #140] ; (803a2d0 ) + 803a244: 681b ldr r3, [r3, #0] + 803a246: 89db ldrh r3, [r3, #14] + 803a248: b29a uxth r2, r3 + 803a24a: 697b ldr r3, [r7, #20] + 803a24c: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 npcb->snd_wnd_max = npcb->snd_wnd; - 803a220: 697b ldr r3, [r7, #20] - 803a222: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 803a226: 697b ldr r3, [r7, #20] - 803a228: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 + 803a250: 697b ldr r3, [r7, #20] + 803a252: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 803a256: 697b ldr r3, [r7, #20] + 803a258: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 npcb->mss = tcp_eff_send_mss(npcb->mss, &npcb->local_ip, &npcb->remote_ip); - 803a22c: 697b ldr r3, [r7, #20] - 803a22e: 8e5c ldrh r4, [r3, #50] ; 0x32 - 803a230: 697b ldr r3, [r7, #20] - 803a232: 3304 adds r3, #4 - 803a234: 4618 mov r0, r3 - 803a236: f005 f913 bl 803f460 - 803a23a: 4601 mov r1, r0 - 803a23c: 697b ldr r3, [r7, #20] - 803a23e: 3304 adds r3, #4 - 803a240: 461a mov r2, r3 - 803a242: 4620 mov r0, r4 - 803a244: f7ff fa30 bl 80396a8 - 803a248: 4603 mov r3, r0 - 803a24a: 461a mov r2, r3 - 803a24c: 697b ldr r3, [r7, #20] - 803a24e: 865a strh r2, [r3, #50] ; 0x32 + 803a25c: 697b ldr r3, [r7, #20] + 803a25e: 8e5c ldrh r4, [r3, #50] ; 0x32 + 803a260: 697b ldr r3, [r7, #20] + 803a262: 3304 adds r3, #4 + 803a264: 4618 mov r0, r3 + 803a266: f005 f913 bl 803f490 + 803a26a: 4601 mov r1, r0 + 803a26c: 697b ldr r3, [r7, #20] + 803a26e: 3304 adds r3, #4 + 803a270: 461a mov r2, r3 + 803a272: 4620 mov r0, r4 + 803a274: f7ff fa30 bl 80396d8 + 803a278: 4603 mov r3, r0 + 803a27a: 461a mov r2, r3 + 803a27c: 697b ldr r3, [r7, #20] + 803a27e: 865a strh r2, [r3, #50] ; 0x32 rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK); - 803a250: 2112 movs r1, #18 - 803a252: 6978 ldr r0, [r7, #20] - 803a254: f002 fc9c bl 803cb90 - 803a258: 4603 mov r3, r0 - 803a25a: 73fb strb r3, [r7, #15] + 803a280: 2112 movs r1, #18 + 803a282: 6978 ldr r0, [r7, #20] + 803a284: f002 fc9c bl 803cbc0 + 803a288: 4603 mov r3, r0 + 803a28a: 73fb strb r3, [r7, #15] if (rc != ERR_OK) { - 803a25c: f997 300f ldrsb.w r3, [r7, #15] - 803a260: 2b00 cmp r3, #0 - 803a262: d004 beq.n 803a26e + 803a28c: f997 300f ldrsb.w r3, [r7, #15] + 803a290: 2b00 cmp r3, #0 + 803a292: d004 beq.n 803a29e tcp_abandon(npcb, 0); - 803a264: 2100 movs r1, #0 - 803a266: 6978 ldr r0, [r7, #20] - 803a268: f7fd ff1a bl 80380a0 + 803a294: 2100 movs r1, #0 + 803a296: 6978 ldr r0, [r7, #20] + 803a298: f7fd ff1a bl 80380d0 return; - 803a26c: e006 b.n 803a27c + 803a29c: e006 b.n 803a2ac tcp_output(npcb); - 803a26e: 6978 ldr r0, [r7, #20] - 803a270: f002 fd7c bl 803cd6c + 803a29e: 6978 ldr r0, [r7, #20] + 803a2a0: f002 fd7c bl 803cd9c return; - 803a274: e001 b.n 803a27a + 803a2a4: e001 b.n 803a2aa return; - 803a276: bf00 nop - 803a278: e000 b.n 803a27c + 803a2a6: bf00 nop + 803a2a8: e000 b.n 803a2ac return; - 803a27a: bf00 nop -} - 803a27c: 371c adds r7, #28 - 803a27e: 46bd mov sp, r7 - 803a280: bd90 pop {r4, r7, pc} - 803a282: bf00 nop - 803a284: 2400e99c .word 0x2400e99c - 803a288: 080434d0 .word 0x080434d0 - 803a28c: 080436c8 .word 0x080436c8 - 803a290: 0804351c .word 0x0804351c - 803a294: 2400e994 .word 0x2400e994 - 803a298: 2400e99a .word 0x2400e99a - 803a29c: 2400e990 .word 0x2400e990 - 803a2a0: 2400e980 .word 0x2400e980 - 803a2a4: 2400b9cc .word 0x2400b9cc - 803a2a8: 2400b9d0 .word 0x2400b9d0 - 803a2ac: 2400b9bc .word 0x2400b9bc - 803a2b0: 2400e964 .word 0x2400e964 - 803a2b4: 2400e96c .word 0x2400e96c - -0803a2b8 : + 803a2aa: bf00 nop +} + 803a2ac: 371c adds r7, #28 + 803a2ae: 46bd mov sp, r7 + 803a2b0: bd90 pop {r4, r7, pc} + 803a2b2: bf00 nop + 803a2b4: 2400e99c .word 0x2400e99c + 803a2b8: 08043500 .word 0x08043500 + 803a2bc: 080436f8 .word 0x080436f8 + 803a2c0: 0804354c .word 0x0804354c + 803a2c4: 2400e994 .word 0x2400e994 + 803a2c8: 2400e99a .word 0x2400e99a + 803a2cc: 2400e990 .word 0x2400e990 + 803a2d0: 2400e980 .word 0x2400e980 + 803a2d4: 2400b9cc .word 0x2400b9cc + 803a2d8: 2400b9d0 .word 0x2400b9d0 + 803a2dc: 2400b9bc .word 0x2400b9bc + 803a2e0: 2400e964 .word 0x2400e964 + 803a2e4: 2400e96c .word 0x2400e96c + +0803a2e8 : * @note the segment which arrived is saved in global variables, therefore only the pcb * involved is passed as a parameter to this function */ static void tcp_timewait_input(struct tcp_pcb *pcb) { - 803a2b8: b580 push {r7, lr} - 803a2ba: b086 sub sp, #24 - 803a2bc: af04 add r7, sp, #16 - 803a2be: 6078 str r0, [r7, #4] + 803a2e8: b580 push {r7, lr} + 803a2ea: b086 sub sp, #24 + 803a2ec: af04 add r7, sp, #16 + 803a2ee: 6078 str r0, [r7, #4] /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */ /* RFC 793 3.9 Event Processing - Segment Arrives: * - first check sequence number - we skip that one in TIME_WAIT (always * acceptable since we only send ACKs) * - second check the RST bit (... return) */ if (flags & TCP_RST) { - 803a2c0: 4b2f ldr r3, [pc, #188] ; (803a380 ) - 803a2c2: 781b ldrb r3, [r3, #0] - 803a2c4: f003 0304 and.w r3, r3, #4 - 803a2c8: 2b00 cmp r3, #0 - 803a2ca: d153 bne.n 803a374 + 803a2f0: 4b2f ldr r3, [pc, #188] ; (803a3b0 ) + 803a2f2: 781b ldrb r3, [r3, #0] + 803a2f4: f003 0304 and.w r3, r3, #4 + 803a2f8: 2b00 cmp r3, #0 + 803a2fa: d153 bne.n 803a3a4 return; } LWIP_ASSERT("tcp_timewait_input: invalid pcb", pcb != NULL); - 803a2cc: 687b ldr r3, [r7, #4] - 803a2ce: 2b00 cmp r3, #0 - 803a2d0: d106 bne.n 803a2e0 - 803a2d2: 4b2c ldr r3, [pc, #176] ; (803a384 ) - 803a2d4: f240 22ee movw r2, #750 ; 0x2ee - 803a2d8: 492b ldr r1, [pc, #172] ; (803a388 ) - 803a2da: 482c ldr r0, [pc, #176] ; (803a38c ) - 803a2dc: f006 fc00 bl 8040ae0 + 803a2fc: 687b ldr r3, [r7, #4] + 803a2fe: 2b00 cmp r3, #0 + 803a300: d106 bne.n 803a310 + 803a302: 4b2c ldr r3, [pc, #176] ; (803a3b4 ) + 803a304: f240 22ee movw r2, #750 ; 0x2ee + 803a308: 492b ldr r1, [pc, #172] ; (803a3b8 ) + 803a30a: 482c ldr r0, [pc, #176] ; (803a3bc ) + 803a30c: f006 fc00 bl 8040b10 /* - fourth, check the SYN bit, */ if (flags & TCP_SYN) { - 803a2e0: 4b27 ldr r3, [pc, #156] ; (803a380 ) - 803a2e2: 781b ldrb r3, [r3, #0] - 803a2e4: f003 0302 and.w r3, r3, #2 - 803a2e8: 2b00 cmp r3, #0 - 803a2ea: d02a beq.n 803a342 + 803a310: 4b27 ldr r3, [pc, #156] ; (803a3b0 ) + 803a312: 781b ldrb r3, [r3, #0] + 803a314: f003 0302 and.w r3, r3, #2 + 803a318: 2b00 cmp r3, #0 + 803a31a: d02a beq.n 803a372 /* If an incoming segment is not acceptable, an acknowledgment should be sent in reply */ if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd)) { - 803a2ec: 4b28 ldr r3, [pc, #160] ; (803a390 ) - 803a2ee: 681a ldr r2, [r3, #0] - 803a2f0: 687b ldr r3, [r7, #4] - 803a2f2: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a2f4: 1ad3 subs r3, r2, r3 - 803a2f6: 2b00 cmp r3, #0 - 803a2f8: db2d blt.n 803a356 - 803a2fa: 4b25 ldr r3, [pc, #148] ; (803a390 ) - 803a2fc: 681a ldr r2, [r3, #0] - 803a2fe: 687b ldr r3, [r7, #4] - 803a300: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a302: 6879 ldr r1, [r7, #4] - 803a304: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803a306: 440b add r3, r1 - 803a308: 1ad3 subs r3, r2, r3 - 803a30a: 2b00 cmp r3, #0 - 803a30c: dc23 bgt.n 803a356 + 803a31c: 4b28 ldr r3, [pc, #160] ; (803a3c0 ) + 803a31e: 681a ldr r2, [r3, #0] + 803a320: 687b ldr r3, [r7, #4] + 803a322: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a324: 1ad3 subs r3, r2, r3 + 803a326: 2b00 cmp r3, #0 + 803a328: db2d blt.n 803a386 + 803a32a: 4b25 ldr r3, [pc, #148] ; (803a3c0 ) + 803a32c: 681a ldr r2, [r3, #0] + 803a32e: 687b ldr r3, [r7, #4] + 803a330: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a332: 6879 ldr r1, [r7, #4] + 803a334: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803a336: 440b add r3, r1 + 803a338: 1ad3 subs r3, r2, r3 + 803a33a: 2b00 cmp r3, #0 + 803a33c: dc23 bgt.n 803a386 /* If the SYN is in the window it is an error, send a reset */ tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a30e: 4b21 ldr r3, [pc, #132] ; (803a394 ) - 803a310: 6819 ldr r1, [r3, #0] - 803a312: 4b21 ldr r3, [pc, #132] ; (803a398 ) - 803a314: 881b ldrh r3, [r3, #0] - 803a316: 461a mov r2, r3 - 803a318: 4b1d ldr r3, [pc, #116] ; (803a390 ) - 803a31a: 681b ldr r3, [r3, #0] - 803a31c: 18d0 adds r0, r2, r3 + 803a33e: 4b21 ldr r3, [pc, #132] ; (803a3c4 ) + 803a340: 6819 ldr r1, [r3, #0] + 803a342: 4b21 ldr r3, [pc, #132] ; (803a3c8 ) + 803a344: 881b ldrh r3, [r3, #0] + 803a346: 461a mov r2, r3 + 803a348: 4b1d ldr r3, [pc, #116] ; (803a3c0 ) + 803a34a: 681b ldr r3, [r3, #0] + 803a34c: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a31e: 4b1f ldr r3, [pc, #124] ; (803a39c ) - 803a320: 681b ldr r3, [r3, #0] + 803a34e: 4b1f ldr r3, [pc, #124] ; (803a3cc ) + 803a350: 681b ldr r3, [r3, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a322: 885b ldrh r3, [r3, #2] - 803a324: b29b uxth r3, r3 + 803a352: 885b ldrh r3, [r3, #2] + 803a354: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a326: 4a1d ldr r2, [pc, #116] ; (803a39c ) - 803a328: 6812 ldr r2, [r2, #0] + 803a356: 4a1d ldr r2, [pc, #116] ; (803a3cc ) + 803a358: 6812 ldr r2, [r2, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a32a: 8812 ldrh r2, [r2, #0] - 803a32c: b292 uxth r2, r2 - 803a32e: 9202 str r2, [sp, #8] - 803a330: 9301 str r3, [sp, #4] - 803a332: 4b1b ldr r3, [pc, #108] ; (803a3a0 ) - 803a334: 9300 str r3, [sp, #0] - 803a336: 4b1b ldr r3, [pc, #108] ; (803a3a4 ) - 803a338: 4602 mov r2, r0 - 803a33a: 6878 ldr r0, [r7, #4] - 803a33c: f003 faca bl 803d8d4 + 803a35a: 8812 ldrh r2, [r2, #0] + 803a35c: b292 uxth r2, r2 + 803a35e: 9202 str r2, [sp, #8] + 803a360: 9301 str r3, [sp, #4] + 803a362: 4b1b ldr r3, [pc, #108] ; (803a3d0 ) + 803a364: 9300 str r3, [sp, #0] + 803a366: 4b1b ldr r3, [pc, #108] ; (803a3d4 ) + 803a368: 4602 mov r2, r0 + 803a36a: 6878 ldr r0, [r7, #4] + 803a36c: f003 faca bl 803d904 return; - 803a340: e01b b.n 803a37a + 803a370: e01b b.n 803a3aa } } else if (flags & TCP_FIN) { - 803a342: 4b0f ldr r3, [pc, #60] ; (803a380 ) - 803a344: 781b ldrb r3, [r3, #0] - 803a346: f003 0301 and.w r3, r3, #1 - 803a34a: 2b00 cmp r3, #0 - 803a34c: d003 beq.n 803a356 + 803a372: 4b0f ldr r3, [pc, #60] ; (803a3b0 ) + 803a374: 781b ldrb r3, [r3, #0] + 803a376: f003 0301 and.w r3, r3, #1 + 803a37a: 2b00 cmp r3, #0 + 803a37c: d003 beq.n 803a386 /* - eighth, check the FIN bit: Remain in the TIME-WAIT state. Restart the 2 MSL time-wait timeout.*/ pcb->tmr = tcp_ticks; - 803a34e: 4b16 ldr r3, [pc, #88] ; (803a3a8 ) - 803a350: 681a ldr r2, [r3, #0] - 803a352: 687b ldr r3, [r7, #4] - 803a354: 621a str r2, [r3, #32] + 803a37e: 4b16 ldr r3, [pc, #88] ; (803a3d8 ) + 803a380: 681a ldr r2, [r3, #0] + 803a382: 687b ldr r3, [r7, #4] + 803a384: 621a str r2, [r3, #32] } if ((tcplen > 0)) { - 803a356: 4b10 ldr r3, [pc, #64] ; (803a398 ) - 803a358: 881b ldrh r3, [r3, #0] - 803a35a: 2b00 cmp r3, #0 - 803a35c: d00c beq.n 803a378 + 803a386: 4b10 ldr r3, [pc, #64] ; (803a3c8 ) + 803a388: 881b ldrh r3, [r3, #0] + 803a38a: 2b00 cmp r3, #0 + 803a38c: d00c beq.n 803a3a8 /* Acknowledge data, FIN or out-of-window SYN */ tcp_ack_now(pcb); - 803a35e: 687b ldr r3, [r7, #4] - 803a360: 8b5b ldrh r3, [r3, #26] - 803a362: f043 0302 orr.w r3, r3, #2 - 803a366: b29a uxth r2, r3 - 803a368: 687b ldr r3, [r7, #4] - 803a36a: 835a strh r2, [r3, #26] + 803a38e: 687b ldr r3, [r7, #4] + 803a390: 8b5b ldrh r3, [r3, #26] + 803a392: f043 0302 orr.w r3, r3, #2 + 803a396: b29a uxth r2, r3 + 803a398: 687b ldr r3, [r7, #4] + 803a39a: 835a strh r2, [r3, #26] tcp_output(pcb); - 803a36c: 6878 ldr r0, [r7, #4] - 803a36e: f002 fcfd bl 803cd6c + 803a39c: 6878 ldr r0, [r7, #4] + 803a39e: f002 fcfd bl 803cd9c } return; - 803a372: e001 b.n 803a378 + 803a3a2: e001 b.n 803a3a8 return; - 803a374: bf00 nop - 803a376: e000 b.n 803a37a + 803a3a4: bf00 nop + 803a3a6: e000 b.n 803a3aa return; - 803a378: bf00 nop -} - 803a37a: 3708 adds r7, #8 - 803a37c: 46bd mov sp, r7 - 803a37e: bd80 pop {r7, pc} - 803a380: 2400e99c .word 0x2400e99c - 803a384: 080434d0 .word 0x080434d0 - 803a388: 080436e8 .word 0x080436e8 - 803a38c: 0804351c .word 0x0804351c - 803a390: 2400e990 .word 0x2400e990 - 803a394: 2400e994 .word 0x2400e994 - 803a398: 2400e99a .word 0x2400e99a - 803a39c: 2400e980 .word 0x2400e980 - 803a3a0: 2400b9cc .word 0x2400b9cc - 803a3a4: 2400b9d0 .word 0x2400b9d0 - 803a3a8: 2400e958 .word 0x2400e958 - -0803a3ac : + 803a3a8: bf00 nop +} + 803a3aa: 3708 adds r7, #8 + 803a3ac: 46bd mov sp, r7 + 803a3ae: bd80 pop {r7, pc} + 803a3b0: 2400e99c .word 0x2400e99c + 803a3b4: 08043500 .word 0x08043500 + 803a3b8: 08043718 .word 0x08043718 + 803a3bc: 0804354c .word 0x0804354c + 803a3c0: 2400e990 .word 0x2400e990 + 803a3c4: 2400e994 .word 0x2400e994 + 803a3c8: 2400e99a .word 0x2400e99a + 803a3cc: 2400e980 .word 0x2400e980 + 803a3d0: 2400b9cc .word 0x2400b9cc + 803a3d4: 2400b9d0 .word 0x2400b9d0 + 803a3d8: 2400e958 .word 0x2400e958 + +0803a3dc : * @note the segment which arrived is saved in global variables, therefore only the pcb * involved is passed as a parameter to this function */ static err_t tcp_process(struct tcp_pcb *pcb) { - 803a3ac: b590 push {r4, r7, lr} - 803a3ae: b08d sub sp, #52 ; 0x34 - 803a3b0: af04 add r7, sp, #16 - 803a3b2: 6078 str r0, [r7, #4] + 803a3dc: b590 push {r4, r7, lr} + 803a3de: b08d sub sp, #52 ; 0x34 + 803a3e0: af04 add r7, sp, #16 + 803a3e2: 6078 str r0, [r7, #4] struct tcp_seg *rseg; u8_t acceptable = 0; - 803a3b4: 2300 movs r3, #0 - 803a3b6: 76fb strb r3, [r7, #27] + 803a3e4: 2300 movs r3, #0 + 803a3e6: 76fb strb r3, [r7, #27] err_t err; err = ERR_OK; - 803a3b8: 2300 movs r3, #0 - 803a3ba: 76bb strb r3, [r7, #26] + 803a3e8: 2300 movs r3, #0 + 803a3ea: 76bb strb r3, [r7, #26] LWIP_ASSERT("tcp_process: invalid pcb", pcb != NULL); - 803a3bc: 687b ldr r3, [r7, #4] - 803a3be: 2b00 cmp r3, #0 - 803a3c0: d106 bne.n 803a3d0 - 803a3c2: 4b9d ldr r3, [pc, #628] ; (803a638 ) - 803a3c4: f44f 7247 mov.w r2, #796 ; 0x31c - 803a3c8: 499c ldr r1, [pc, #624] ; (803a63c ) - 803a3ca: 489d ldr r0, [pc, #628] ; (803a640 ) - 803a3cc: f006 fb88 bl 8040ae0 + 803a3ec: 687b ldr r3, [r7, #4] + 803a3ee: 2b00 cmp r3, #0 + 803a3f0: d106 bne.n 803a400 + 803a3f2: 4b9d ldr r3, [pc, #628] ; (803a668 ) + 803a3f4: f44f 7247 mov.w r2, #796 ; 0x31c + 803a3f8: 499c ldr r1, [pc, #624] ; (803a66c ) + 803a3fa: 489d ldr r0, [pc, #628] ; (803a670 ) + 803a3fc: f006 fb88 bl 8040b10 /* Process incoming RST segments. */ if (flags & TCP_RST) { - 803a3d0: 4b9c ldr r3, [pc, #624] ; (803a644 ) - 803a3d2: 781b ldrb r3, [r3, #0] - 803a3d4: f003 0304 and.w r3, r3, #4 - 803a3d8: 2b00 cmp r3, #0 - 803a3da: d04e beq.n 803a47a + 803a400: 4b9c ldr r3, [pc, #624] ; (803a674 ) + 803a402: 781b ldrb r3, [r3, #0] + 803a404: f003 0304 and.w r3, r3, #4 + 803a408: 2b00 cmp r3, #0 + 803a40a: d04e beq.n 803a4aa /* First, determine if the reset is acceptable. */ if (pcb->state == SYN_SENT) { - 803a3dc: 687b ldr r3, [r7, #4] - 803a3de: 7d1b ldrb r3, [r3, #20] - 803a3e0: 2b02 cmp r3, #2 - 803a3e2: d108 bne.n 803a3f6 + 803a40c: 687b ldr r3, [r7, #4] + 803a40e: 7d1b ldrb r3, [r3, #20] + 803a410: 2b02 cmp r3, #2 + 803a412: d108 bne.n 803a426 /* "In the SYN-SENT state (a RST received in response to an initial SYN), the RST is acceptable if the ACK field acknowledges the SYN." */ if (ackno == pcb->snd_nxt) { - 803a3e4: 687b ldr r3, [r7, #4] - 803a3e6: 6d1a ldr r2, [r3, #80] ; 0x50 - 803a3e8: 4b97 ldr r3, [pc, #604] ; (803a648 ) - 803a3ea: 681b ldr r3, [r3, #0] - 803a3ec: 429a cmp r2, r3 - 803a3ee: d123 bne.n 803a438 + 803a414: 687b ldr r3, [r7, #4] + 803a416: 6d1a ldr r2, [r3, #80] ; 0x50 + 803a418: 4b97 ldr r3, [pc, #604] ; (803a678 ) + 803a41a: 681b ldr r3, [r3, #0] + 803a41c: 429a cmp r2, r3 + 803a41e: d123 bne.n 803a468 acceptable = 1; - 803a3f0: 2301 movs r3, #1 - 803a3f2: 76fb strb r3, [r7, #27] - 803a3f4: e020 b.n 803a438 + 803a420: 2301 movs r3, #1 + 803a422: 76fb strb r3, [r7, #27] + 803a424: e020 b.n 803a468 } } else { /* "In all states except SYN-SENT, all reset (RST) segments are validated by checking their SEQ-fields." */ if (seqno == pcb->rcv_nxt) { - 803a3f6: 687b ldr r3, [r7, #4] - 803a3f8: 6a5a ldr r2, [r3, #36] ; 0x24 - 803a3fa: 4b94 ldr r3, [pc, #592] ; (803a64c ) - 803a3fc: 681b ldr r3, [r3, #0] - 803a3fe: 429a cmp r2, r3 - 803a400: d102 bne.n 803a408 + 803a426: 687b ldr r3, [r7, #4] + 803a428: 6a5a ldr r2, [r3, #36] ; 0x24 + 803a42a: 4b94 ldr r3, [pc, #592] ; (803a67c ) + 803a42c: 681b ldr r3, [r3, #0] + 803a42e: 429a cmp r2, r3 + 803a430: d102 bne.n 803a438 acceptable = 1; - 803a402: 2301 movs r3, #1 - 803a404: 76fb strb r3, [r7, #27] - 803a406: e017 b.n 803a438 + 803a432: 2301 movs r3, #1 + 803a434: 76fb strb r3, [r7, #27] + 803a436: e017 b.n 803a468 } else if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, - 803a408: 4b90 ldr r3, [pc, #576] ; (803a64c ) - 803a40a: 681a ldr r2, [r3, #0] - 803a40c: 687b ldr r3, [r7, #4] - 803a40e: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a410: 1ad3 subs r3, r2, r3 - 803a412: 2b00 cmp r3, #0 - 803a414: db10 blt.n 803a438 - 803a416: 4b8d ldr r3, [pc, #564] ; (803a64c ) - 803a418: 681a ldr r2, [r3, #0] - 803a41a: 687b ldr r3, [r7, #4] - 803a41c: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a41e: 6879 ldr r1, [r7, #4] - 803a420: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803a422: 440b add r3, r1 - 803a424: 1ad3 subs r3, r2, r3 - 803a426: 2b00 cmp r3, #0 - 803a428: dc06 bgt.n 803a438 + 803a438: 4b90 ldr r3, [pc, #576] ; (803a67c ) + 803a43a: 681a ldr r2, [r3, #0] + 803a43c: 687b ldr r3, [r7, #4] + 803a43e: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a440: 1ad3 subs r3, r2, r3 + 803a442: 2b00 cmp r3, #0 + 803a444: db10 blt.n 803a468 + 803a446: 4b8d ldr r3, [pc, #564] ; (803a67c ) + 803a448: 681a ldr r2, [r3, #0] + 803a44a: 687b ldr r3, [r7, #4] + 803a44c: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a44e: 6879 ldr r1, [r7, #4] + 803a450: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803a452: 440b add r3, r1 + 803a454: 1ad3 subs r3, r2, r3 + 803a456: 2b00 cmp r3, #0 + 803a458: dc06 bgt.n 803a468 pcb->rcv_nxt + pcb->rcv_wnd)) { /* If the sequence number is inside the window, we send a challenge ACK and wait for a re-send with matching sequence number. This follows RFC 5961 section 3.2 and addresses CVE-2004-0230 (RST spoofing attack), which is present in RFC 793 RST handling. */ tcp_ack_now(pcb); - 803a42a: 687b ldr r3, [r7, #4] - 803a42c: 8b5b ldrh r3, [r3, #26] - 803a42e: f043 0302 orr.w r3, r3, #2 - 803a432: b29a uxth r2, r3 - 803a434: 687b ldr r3, [r7, #4] - 803a436: 835a strh r2, [r3, #26] + 803a45a: 687b ldr r3, [r7, #4] + 803a45c: 8b5b ldrh r3, [r3, #26] + 803a45e: f043 0302 orr.w r3, r3, #2 + 803a462: b29a uxth r2, r3 + 803a464: 687b ldr r3, [r7, #4] + 803a466: 835a strh r2, [r3, #26] } } if (acceptable) { - 803a438: 7efb ldrb r3, [r7, #27] - 803a43a: 2b00 cmp r3, #0 - 803a43c: d01b beq.n 803a476 + 803a468: 7efb ldrb r3, [r7, #27] + 803a46a: 2b00 cmp r3, #0 + 803a46c: d01b beq.n 803a4a6 LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n")); LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED); - 803a43e: 687b ldr r3, [r7, #4] - 803a440: 7d1b ldrb r3, [r3, #20] - 803a442: 2b00 cmp r3, #0 - 803a444: d106 bne.n 803a454 - 803a446: 4b7c ldr r3, [pc, #496] ; (803a638 ) - 803a448: f44f 724e mov.w r2, #824 ; 0x338 - 803a44c: 4980 ldr r1, [pc, #512] ; (803a650 ) - 803a44e: 487c ldr r0, [pc, #496] ; (803a640 ) - 803a450: f006 fb46 bl 8040ae0 + 803a46e: 687b ldr r3, [r7, #4] + 803a470: 7d1b ldrb r3, [r3, #20] + 803a472: 2b00 cmp r3, #0 + 803a474: d106 bne.n 803a484 + 803a476: 4b7c ldr r3, [pc, #496] ; (803a668 ) + 803a478: f44f 724e mov.w r2, #824 ; 0x338 + 803a47c: 4980 ldr r1, [pc, #512] ; (803a680 ) + 803a47e: 487c ldr r0, [pc, #496] ; (803a670 ) + 803a480: f006 fb46 bl 8040b10 recv_flags |= TF_RESET; - 803a454: 4b7f ldr r3, [pc, #508] ; (803a654 ) - 803a456: 781b ldrb r3, [r3, #0] - 803a458: f043 0308 orr.w r3, r3, #8 - 803a45c: b2da uxtb r2, r3 - 803a45e: 4b7d ldr r3, [pc, #500] ; (803a654 ) - 803a460: 701a strb r2, [r3, #0] + 803a484: 4b7f ldr r3, [pc, #508] ; (803a684 ) + 803a486: 781b ldrb r3, [r3, #0] + 803a488: f043 0308 orr.w r3, r3, #8 + 803a48c: b2da uxtb r2, r3 + 803a48e: 4b7d ldr r3, [pc, #500] ; (803a684 ) + 803a490: 701a strb r2, [r3, #0] tcp_clear_flags(pcb, TF_ACK_DELAY); - 803a462: 687b ldr r3, [r7, #4] - 803a464: 8b5b ldrh r3, [r3, #26] - 803a466: f023 0301 bic.w r3, r3, #1 - 803a46a: b29a uxth r2, r3 - 803a46c: 687b ldr r3, [r7, #4] - 803a46e: 835a strh r2, [r3, #26] + 803a492: 687b ldr r3, [r7, #4] + 803a494: 8b5b ldrh r3, [r3, #26] + 803a496: f023 0301 bic.w r3, r3, #1 + 803a49a: b29a uxth r2, r3 + 803a49c: 687b ldr r3, [r7, #4] + 803a49e: 835a strh r2, [r3, #26] return ERR_RST; - 803a470: f06f 030d mvn.w r3, #13 - 803a474: e37a b.n 803ab6c + 803a4a0: f06f 030d mvn.w r3, #13 + 803a4a4: e37a b.n 803ab9c } else { LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", seqno, pcb->rcv_nxt)); LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", seqno, pcb->rcv_nxt)); return ERR_OK; - 803a476: 2300 movs r3, #0 - 803a478: e378 b.n 803ab6c + 803a4a6: 2300 movs r3, #0 + 803a4a8: e378 b.n 803ab9c } } if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) { - 803a47a: 4b72 ldr r3, [pc, #456] ; (803a644 ) - 803a47c: 781b ldrb r3, [r3, #0] - 803a47e: f003 0302 and.w r3, r3, #2 - 803a482: 2b00 cmp r3, #0 - 803a484: d010 beq.n 803a4a8 - 803a486: 687b ldr r3, [r7, #4] - 803a488: 7d1b ldrb r3, [r3, #20] - 803a48a: 2b02 cmp r3, #2 - 803a48c: d00c beq.n 803a4a8 - 803a48e: 687b ldr r3, [r7, #4] - 803a490: 7d1b ldrb r3, [r3, #20] - 803a492: 2b03 cmp r3, #3 - 803a494: d008 beq.n 803a4a8 + 803a4aa: 4b72 ldr r3, [pc, #456] ; (803a674 ) + 803a4ac: 781b ldrb r3, [r3, #0] + 803a4ae: f003 0302 and.w r3, r3, #2 + 803a4b2: 2b00 cmp r3, #0 + 803a4b4: d010 beq.n 803a4d8 + 803a4b6: 687b ldr r3, [r7, #4] + 803a4b8: 7d1b ldrb r3, [r3, #20] + 803a4ba: 2b02 cmp r3, #2 + 803a4bc: d00c beq.n 803a4d8 + 803a4be: 687b ldr r3, [r7, #4] + 803a4c0: 7d1b ldrb r3, [r3, #20] + 803a4c2: 2b03 cmp r3, #3 + 803a4c4: d008 beq.n 803a4d8 /* Cope with new connection attempt after remote end crashed */ tcp_ack_now(pcb); - 803a496: 687b ldr r3, [r7, #4] - 803a498: 8b5b ldrh r3, [r3, #26] - 803a49a: f043 0302 orr.w r3, r3, #2 - 803a49e: b29a uxth r2, r3 - 803a4a0: 687b ldr r3, [r7, #4] - 803a4a2: 835a strh r2, [r3, #26] + 803a4c6: 687b ldr r3, [r7, #4] + 803a4c8: 8b5b ldrh r3, [r3, #26] + 803a4ca: f043 0302 orr.w r3, r3, #2 + 803a4ce: b29a uxth r2, r3 + 803a4d0: 687b ldr r3, [r7, #4] + 803a4d2: 835a strh r2, [r3, #26] return ERR_OK; - 803a4a4: 2300 movs r3, #0 - 803a4a6: e361 b.n 803ab6c + 803a4d4: 2300 movs r3, #0 + 803a4d6: e361 b.n 803ab9c } if ((pcb->flags & TF_RXCLOSED) == 0) { - 803a4a8: 687b ldr r3, [r7, #4] - 803a4aa: 8b5b ldrh r3, [r3, #26] - 803a4ac: f003 0310 and.w r3, r3, #16 - 803a4b0: 2b00 cmp r3, #0 - 803a4b2: d103 bne.n 803a4bc + 803a4d8: 687b ldr r3, [r7, #4] + 803a4da: 8b5b ldrh r3, [r3, #26] + 803a4dc: f003 0310 and.w r3, r3, #16 + 803a4e0: 2b00 cmp r3, #0 + 803a4e2: d103 bne.n 803a4ec /* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */ pcb->tmr = tcp_ticks; - 803a4b4: 4b68 ldr r3, [pc, #416] ; (803a658 ) - 803a4b6: 681a ldr r2, [r3, #0] - 803a4b8: 687b ldr r3, [r7, #4] - 803a4ba: 621a str r2, [r3, #32] + 803a4e4: 4b68 ldr r3, [pc, #416] ; (803a688 ) + 803a4e6: 681a ldr r2, [r3, #0] + 803a4e8: 687b ldr r3, [r7, #4] + 803a4ea: 621a str r2, [r3, #32] } pcb->keep_cnt_sent = 0; - 803a4bc: 687b ldr r3, [r7, #4] - 803a4be: 2200 movs r2, #0 - 803a4c0: f883 209b strb.w r2, [r3, #155] ; 0x9b + 803a4ec: 687b ldr r3, [r7, #4] + 803a4ee: 2200 movs r2, #0 + 803a4f0: f883 209b strb.w r2, [r3, #155] ; 0x9b pcb->persist_probe = 0; - 803a4c4: 687b ldr r3, [r7, #4] - 803a4c6: 2200 movs r2, #0 - 803a4c8: f883 209a strb.w r2, [r3, #154] ; 0x9a + 803a4f4: 687b ldr r3, [r7, #4] + 803a4f6: 2200 movs r2, #0 + 803a4f8: f883 209a strb.w r2, [r3, #154] ; 0x9a tcp_parseopt(pcb); - 803a4cc: 6878 ldr r0, [r7, #4] - 803a4ce: f001 fc2f bl 803bd30 + 803a4fc: 6878 ldr r0, [r7, #4] + 803a4fe: f001 fc2f bl 803bd60 /* Do different things depending on the TCP state. */ switch (pcb->state) { - 803a4d2: 687b ldr r3, [r7, #4] - 803a4d4: 7d1b ldrb r3, [r3, #20] - 803a4d6: 3b02 subs r3, #2 - 803a4d8: 2b07 cmp r3, #7 - 803a4da: f200 8337 bhi.w 803ab4c - 803a4de: a201 add r2, pc, #4 ; (adr r2, 803a4e4 ) - 803a4e0: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 803a4e4: 0803a505 .word 0x0803a505 - 803a4e8: 0803a735 .word 0x0803a735 - 803a4ec: 0803a8ad .word 0x0803a8ad - 803a4f0: 0803a8d7 .word 0x0803a8d7 - 803a4f4: 0803a9fb .word 0x0803a9fb - 803a4f8: 0803a8ad .word 0x0803a8ad - 803a4fc: 0803aa87 .word 0x0803aa87 - 803a500: 0803ab17 .word 0x0803ab17 + 803a502: 687b ldr r3, [r7, #4] + 803a504: 7d1b ldrb r3, [r3, #20] + 803a506: 3b02 subs r3, #2 + 803a508: 2b07 cmp r3, #7 + 803a50a: f200 8337 bhi.w 803ab7c + 803a50e: a201 add r2, pc, #4 ; (adr r2, 803a514 ) + 803a510: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 803a514: 0803a535 .word 0x0803a535 + 803a518: 0803a765 .word 0x0803a765 + 803a51c: 0803a8dd .word 0x0803a8dd + 803a520: 0803a907 .word 0x0803a907 + 803a524: 0803aa2b .word 0x0803aa2b + 803a528: 0803a8dd .word 0x0803a8dd + 803a52c: 0803aab7 .word 0x0803aab7 + 803a530: 0803ab47 .word 0x0803ab47 case SYN_SENT: LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno, pcb->snd_nxt, lwip_ntohl(pcb->unacked->tcphdr->seqno))); /* received SYN ACK with expected sequence number? */ if ((flags & TCP_ACK) && (flags & TCP_SYN) - 803a504: 4b4f ldr r3, [pc, #316] ; (803a644 ) - 803a506: 781b ldrb r3, [r3, #0] - 803a508: f003 0310 and.w r3, r3, #16 - 803a50c: 2b00 cmp r3, #0 - 803a50e: f000 80e4 beq.w 803a6da - 803a512: 4b4c ldr r3, [pc, #304] ; (803a644 ) - 803a514: 781b ldrb r3, [r3, #0] - 803a516: f003 0302 and.w r3, r3, #2 - 803a51a: 2b00 cmp r3, #0 - 803a51c: f000 80dd beq.w 803a6da + 803a534: 4b4f ldr r3, [pc, #316] ; (803a674 ) + 803a536: 781b ldrb r3, [r3, #0] + 803a538: f003 0310 and.w r3, r3, #16 + 803a53c: 2b00 cmp r3, #0 + 803a53e: f000 80e4 beq.w 803a70a + 803a542: 4b4c ldr r3, [pc, #304] ; (803a674 ) + 803a544: 781b ldrb r3, [r3, #0] + 803a546: f003 0302 and.w r3, r3, #2 + 803a54a: 2b00 cmp r3, #0 + 803a54c: f000 80dd beq.w 803a70a && (ackno == pcb->lastack + 1)) { - 803a520: 687b ldr r3, [r7, #4] - 803a522: 6c5b ldr r3, [r3, #68] ; 0x44 - 803a524: 1c5a adds r2, r3, #1 - 803a526: 4b48 ldr r3, [pc, #288] ; (803a648 ) - 803a528: 681b ldr r3, [r3, #0] - 803a52a: 429a cmp r2, r3 - 803a52c: f040 80d5 bne.w 803a6da + 803a550: 687b ldr r3, [r7, #4] + 803a552: 6c5b ldr r3, [r3, #68] ; 0x44 + 803a554: 1c5a adds r2, r3, #1 + 803a556: 4b48 ldr r3, [pc, #288] ; (803a678 ) + 803a558: 681b ldr r3, [r3, #0] + 803a55a: 429a cmp r2, r3 + 803a55c: f040 80d5 bne.w 803a70a pcb->rcv_nxt = seqno + 1; - 803a530: 4b46 ldr r3, [pc, #280] ; (803a64c ) - 803a532: 681b ldr r3, [r3, #0] - 803a534: 1c5a adds r2, r3, #1 - 803a536: 687b ldr r3, [r7, #4] - 803a538: 625a str r2, [r3, #36] ; 0x24 + 803a560: 4b46 ldr r3, [pc, #280] ; (803a67c ) + 803a562: 681b ldr r3, [r3, #0] + 803a564: 1c5a adds r2, r3, #1 + 803a566: 687b ldr r3, [r7, #4] + 803a568: 625a str r2, [r3, #36] ; 0x24 pcb->rcv_ann_right_edge = pcb->rcv_nxt; - 803a53a: 687b ldr r3, [r7, #4] - 803a53c: 6a5a ldr r2, [r3, #36] ; 0x24 - 803a53e: 687b ldr r3, [r7, #4] - 803a540: 62da str r2, [r3, #44] ; 0x2c + 803a56a: 687b ldr r3, [r7, #4] + 803a56c: 6a5a ldr r2, [r3, #36] ; 0x24 + 803a56e: 687b ldr r3, [r7, #4] + 803a570: 62da str r2, [r3, #44] ; 0x2c pcb->lastack = ackno; - 803a542: 4b41 ldr r3, [pc, #260] ; (803a648 ) - 803a544: 681a ldr r2, [r3, #0] - 803a546: 687b ldr r3, [r7, #4] - 803a548: 645a str r2, [r3, #68] ; 0x44 + 803a572: 4b41 ldr r3, [pc, #260] ; (803a678 ) + 803a574: 681a ldr r2, [r3, #0] + 803a576: 687b ldr r3, [r7, #4] + 803a578: 645a str r2, [r3, #68] ; 0x44 pcb->snd_wnd = tcphdr->wnd; - 803a54a: 4b44 ldr r3, [pc, #272] ; (803a65c ) - 803a54c: 681b ldr r3, [r3, #0] - 803a54e: 89db ldrh r3, [r3, #14] - 803a550: b29a uxth r2, r3 - 803a552: 687b ldr r3, [r7, #4] - 803a554: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 803a57a: 4b44 ldr r3, [pc, #272] ; (803a68c ) + 803a57c: 681b ldr r3, [r3, #0] + 803a57e: 89db ldrh r3, [r3, #14] + 803a580: b29a uxth r2, r3 + 803a582: 687b ldr r3, [r7, #4] + 803a584: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 pcb->snd_wnd_max = pcb->snd_wnd; - 803a558: 687b ldr r3, [r7, #4] - 803a55a: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 803a55e: 687b ldr r3, [r7, #4] - 803a560: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 + 803a588: 687b ldr r3, [r7, #4] + 803a58a: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 803a58e: 687b ldr r3, [r7, #4] + 803a590: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */ - 803a564: 4b39 ldr r3, [pc, #228] ; (803a64c ) - 803a566: 681b ldr r3, [r3, #0] - 803a568: 1e5a subs r2, r3, #1 - 803a56a: 687b ldr r3, [r7, #4] - 803a56c: 655a str r2, [r3, #84] ; 0x54 + 803a594: 4b39 ldr r3, [pc, #228] ; (803a67c ) + 803a596: 681b ldr r3, [r3, #0] + 803a598: 1e5a subs r2, r3, #1 + 803a59a: 687b ldr r3, [r7, #4] + 803a59c: 655a str r2, [r3, #84] ; 0x54 pcb->state = ESTABLISHED; - 803a56e: 687b ldr r3, [r7, #4] - 803a570: 2204 movs r2, #4 - 803a572: 751a strb r2, [r3, #20] + 803a59e: 687b ldr r3, [r7, #4] + 803a5a0: 2204 movs r2, #4 + 803a5a2: 751a strb r2, [r3, #20] #if TCP_CALCULATE_EFF_SEND_MSS pcb->mss = tcp_eff_send_mss(pcb->mss, &pcb->local_ip, &pcb->remote_ip); - 803a574: 687b ldr r3, [r7, #4] - 803a576: 8e5c ldrh r4, [r3, #50] ; 0x32 - 803a578: 687b ldr r3, [r7, #4] - 803a57a: 3304 adds r3, #4 - 803a57c: 4618 mov r0, r3 - 803a57e: f004 ff6f bl 803f460 - 803a582: 4601 mov r1, r0 - 803a584: 687b ldr r3, [r7, #4] - 803a586: 3304 adds r3, #4 - 803a588: 461a mov r2, r3 - 803a58a: 4620 mov r0, r4 - 803a58c: f7ff f88c bl 80396a8 - 803a590: 4603 mov r3, r0 - 803a592: 461a mov r2, r3 - 803a594: 687b ldr r3, [r7, #4] - 803a596: 865a strh r2, [r3, #50] ; 0x32 + 803a5a4: 687b ldr r3, [r7, #4] + 803a5a6: 8e5c ldrh r4, [r3, #50] ; 0x32 + 803a5a8: 687b ldr r3, [r7, #4] + 803a5aa: 3304 adds r3, #4 + 803a5ac: 4618 mov r0, r3 + 803a5ae: f004 ff6f bl 803f490 + 803a5b2: 4601 mov r1, r0 + 803a5b4: 687b ldr r3, [r7, #4] + 803a5b6: 3304 adds r3, #4 + 803a5b8: 461a mov r2, r3 + 803a5ba: 4620 mov r0, r4 + 803a5bc: f7ff f88c bl 80396d8 + 803a5c0: 4603 mov r3, r0 + 803a5c2: 461a mov r2, r3 + 803a5c4: 687b ldr r3, [r7, #4] + 803a5c6: 865a strh r2, [r3, #50] ; 0x32 #endif /* TCP_CALCULATE_EFF_SEND_MSS */ pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss); - 803a598: 687b ldr r3, [r7, #4] - 803a59a: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a59c: 009a lsls r2, r3, #2 - 803a59e: 687b ldr r3, [r7, #4] - 803a5a0: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a5a2: 005b lsls r3, r3, #1 - 803a5a4: f241 111c movw r1, #4380 ; 0x111c - 803a5a8: 428b cmp r3, r1 - 803a5aa: bf38 it cc - 803a5ac: 460b movcc r3, r1 - 803a5ae: 429a cmp r2, r3 - 803a5b0: d204 bcs.n 803a5bc - 803a5b2: 687b ldr r3, [r7, #4] - 803a5b4: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a5b6: 009b lsls r3, r3, #2 - 803a5b8: b29b uxth r3, r3 - 803a5ba: e00d b.n 803a5d8 - 803a5bc: 687b ldr r3, [r7, #4] - 803a5be: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a5c0: 005b lsls r3, r3, #1 - 803a5c2: f241 121c movw r2, #4380 ; 0x111c - 803a5c6: 4293 cmp r3, r2 - 803a5c8: d904 bls.n 803a5d4 - 803a5ca: 687b ldr r3, [r7, #4] - 803a5cc: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a5ce: 005b lsls r3, r3, #1 - 803a5d0: b29b uxth r3, r3 - 803a5d2: e001 b.n 803a5d8 - 803a5d4: f241 131c movw r3, #4380 ; 0x111c - 803a5d8: 687a ldr r2, [r7, #4] - 803a5da: f8a2 3048 strh.w r3, [r2, #72] ; 0x48 + 803a5c8: 687b ldr r3, [r7, #4] + 803a5ca: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a5cc: 009a lsls r2, r3, #2 + 803a5ce: 687b ldr r3, [r7, #4] + 803a5d0: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a5d2: 005b lsls r3, r3, #1 + 803a5d4: f241 111c movw r1, #4380 ; 0x111c + 803a5d8: 428b cmp r3, r1 + 803a5da: bf38 it cc + 803a5dc: 460b movcc r3, r1 + 803a5de: 429a cmp r2, r3 + 803a5e0: d204 bcs.n 803a5ec + 803a5e2: 687b ldr r3, [r7, #4] + 803a5e4: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a5e6: 009b lsls r3, r3, #2 + 803a5e8: b29b uxth r3, r3 + 803a5ea: e00d b.n 803a608 + 803a5ec: 687b ldr r3, [r7, #4] + 803a5ee: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a5f0: 005b lsls r3, r3, #1 + 803a5f2: f241 121c movw r2, #4380 ; 0x111c + 803a5f6: 4293 cmp r3, r2 + 803a5f8: d904 bls.n 803a604 + 803a5fa: 687b ldr r3, [r7, #4] + 803a5fc: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a5fe: 005b lsls r3, r3, #1 + 803a600: b29b uxth r3, r3 + 803a602: e001 b.n 803a608 + 803a604: f241 131c movw r3, #4380 ; 0x111c + 803a608: 687a ldr r2, [r7, #4] + 803a60a: f8a2 3048 strh.w r3, [r2, #72] ; 0x48 LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SENT): cwnd %"TCPWNDSIZE_F " ssthresh %"TCPWNDSIZE_F"\n", pcb->cwnd, pcb->ssthresh)); LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0)); - 803a5de: 687b ldr r3, [r7, #4] - 803a5e0: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803a5e4: 2b00 cmp r3, #0 - 803a5e6: d106 bne.n 803a5f6 - 803a5e8: 4b13 ldr r3, [pc, #76] ; (803a638 ) - 803a5ea: f44f 725b mov.w r2, #876 ; 0x36c - 803a5ee: 491c ldr r1, [pc, #112] ; (803a660 ) - 803a5f0: 4813 ldr r0, [pc, #76] ; (803a640 ) - 803a5f2: f006 fa75 bl 8040ae0 + 803a60e: 687b ldr r3, [r7, #4] + 803a610: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803a614: 2b00 cmp r3, #0 + 803a616: d106 bne.n 803a626 + 803a618: 4b13 ldr r3, [pc, #76] ; (803a668 ) + 803a61a: f44f 725b mov.w r2, #876 ; 0x36c + 803a61e: 491c ldr r1, [pc, #112] ; (803a690 ) + 803a620: 4813 ldr r0, [pc, #76] ; (803a670 ) + 803a622: f006 fa75 bl 8040b10 --pcb->snd_queuelen; - 803a5f6: 687b ldr r3, [r7, #4] - 803a5f8: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803a5fc: 3b01 subs r3, #1 - 803a5fe: b29a uxth r2, r3 - 803a600: 687b ldr r3, [r7, #4] - 803a602: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803a626: 687b ldr r3, [r7, #4] + 803a628: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803a62c: 3b01 subs r3, #1 + 803a62e: b29a uxth r2, r3 + 803a630: 687b ldr r3, [r7, #4] + 803a632: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen)); rseg = pcb->unacked; - 803a606: 687b ldr r3, [r7, #4] - 803a608: 6f1b ldr r3, [r3, #112] ; 0x70 - 803a60a: 61fb str r3, [r7, #28] + 803a636: 687b ldr r3, [r7, #4] + 803a638: 6f1b ldr r3, [r3, #112] ; 0x70 + 803a63a: 61fb str r3, [r7, #28] if (rseg == NULL) { - 803a60c: 69fb ldr r3, [r7, #28] - 803a60e: 2b00 cmp r3, #0 - 803a610: d12a bne.n 803a668 + 803a63c: 69fb ldr r3, [r7, #28] + 803a63e: 2b00 cmp r3, #0 + 803a640: d12a bne.n 803a698 /* might happen if tcp_output fails in tcp_rexmit_rto() in which case the segment is on the unsent list */ rseg = pcb->unsent; - 803a612: 687b ldr r3, [r7, #4] - 803a614: 6edb ldr r3, [r3, #108] ; 0x6c - 803a616: 61fb str r3, [r7, #28] + 803a642: 687b ldr r3, [r7, #4] + 803a644: 6edb ldr r3, [r3, #108] ; 0x6c + 803a646: 61fb str r3, [r7, #28] LWIP_ASSERT("no segment to free", rseg != NULL); - 803a618: 69fb ldr r3, [r7, #28] - 803a61a: 2b00 cmp r3, #0 - 803a61c: d106 bne.n 803a62c - 803a61e: 4b06 ldr r3, [pc, #24] ; (803a638 ) - 803a620: f44f 725d mov.w r2, #884 ; 0x374 - 803a624: 490f ldr r1, [pc, #60] ; (803a664 ) - 803a626: 4806 ldr r0, [pc, #24] ; (803a640 ) - 803a628: f006 fa5a bl 8040ae0 + 803a648: 69fb ldr r3, [r7, #28] + 803a64a: 2b00 cmp r3, #0 + 803a64c: d106 bne.n 803a65c + 803a64e: 4b06 ldr r3, [pc, #24] ; (803a668 ) + 803a650: f44f 725d mov.w r2, #884 ; 0x374 + 803a654: 490f ldr r1, [pc, #60] ; (803a694 ) + 803a656: 4806 ldr r0, [pc, #24] ; (803a670 ) + 803a658: f006 fa5a bl 8040b10 pcb->unsent = rseg->next; - 803a62c: 69fb ldr r3, [r7, #28] - 803a62e: 681a ldr r2, [r3, #0] - 803a630: 687b ldr r3, [r7, #4] - 803a632: 66da str r2, [r3, #108] ; 0x6c - 803a634: e01c b.n 803a670 - 803a636: bf00 nop - 803a638: 080434d0 .word 0x080434d0 - 803a63c: 08043708 .word 0x08043708 - 803a640: 0804351c .word 0x0804351c - 803a644: 2400e99c .word 0x2400e99c - 803a648: 2400e994 .word 0x2400e994 - 803a64c: 2400e990 .word 0x2400e990 - 803a650: 08043724 .word 0x08043724 - 803a654: 2400e99d .word 0x2400e99d - 803a658: 2400e958 .word 0x2400e958 - 803a65c: 2400e980 .word 0x2400e980 - 803a660: 08043744 .word 0x08043744 - 803a664: 0804375c .word 0x0804375c + 803a65c: 69fb ldr r3, [r7, #28] + 803a65e: 681a ldr r2, [r3, #0] + 803a660: 687b ldr r3, [r7, #4] + 803a662: 66da str r2, [r3, #108] ; 0x6c + 803a664: e01c b.n 803a6a0 + 803a666: bf00 nop + 803a668: 08043500 .word 0x08043500 + 803a66c: 08043738 .word 0x08043738 + 803a670: 0804354c .word 0x0804354c + 803a674: 2400e99c .word 0x2400e99c + 803a678: 2400e994 .word 0x2400e994 + 803a67c: 2400e990 .word 0x2400e990 + 803a680: 08043754 .word 0x08043754 + 803a684: 2400e99d .word 0x2400e99d + 803a688: 2400e958 .word 0x2400e958 + 803a68c: 2400e980 .word 0x2400e980 + 803a690: 08043774 .word 0x08043774 + 803a694: 0804378c .word 0x0804378c } else { pcb->unacked = rseg->next; - 803a668: 69fb ldr r3, [r7, #28] - 803a66a: 681a ldr r2, [r3, #0] - 803a66c: 687b ldr r3, [r7, #4] - 803a66e: 671a str r2, [r3, #112] ; 0x70 + 803a698: 69fb ldr r3, [r7, #28] + 803a69a: 681a ldr r2, [r3, #0] + 803a69c: 687b ldr r3, [r7, #4] + 803a69e: 671a str r2, [r3, #112] ; 0x70 } tcp_seg_free(rseg); - 803a670: 69f8 ldr r0, [r7, #28] - 803a672: f7fe fc78 bl 8038f66 + 803a6a0: 69f8 ldr r0, [r7, #28] + 803a6a2: f7fe fc78 bl 8038f96 /* If there's nothing left to acknowledge, stop the retransmit timer, otherwise reset it to start again */ if (pcb->unacked == NULL) { - 803a676: 687b ldr r3, [r7, #4] - 803a678: 6f1b ldr r3, [r3, #112] ; 0x70 - 803a67a: 2b00 cmp r3, #0 - 803a67c: d104 bne.n 803a688 + 803a6a6: 687b ldr r3, [r7, #4] + 803a6a8: 6f1b ldr r3, [r3, #112] ; 0x70 + 803a6aa: 2b00 cmp r3, #0 + 803a6ac: d104 bne.n 803a6b8 pcb->rtime = -1; - 803a67e: 687b ldr r3, [r7, #4] - 803a680: f64f 72ff movw r2, #65535 ; 0xffff - 803a684: 861a strh r2, [r3, #48] ; 0x30 - 803a686: e006 b.n 803a696 + 803a6ae: 687b ldr r3, [r7, #4] + 803a6b0: f64f 72ff movw r2, #65535 ; 0xffff + 803a6b4: 861a strh r2, [r3, #48] ; 0x30 + 803a6b6: e006 b.n 803a6c6 } else { pcb->rtime = 0; - 803a688: 687b ldr r3, [r7, #4] - 803a68a: 2200 movs r2, #0 - 803a68c: 861a strh r2, [r3, #48] ; 0x30 + 803a6b8: 687b ldr r3, [r7, #4] + 803a6ba: 2200 movs r2, #0 + 803a6bc: 861a strh r2, [r3, #48] ; 0x30 pcb->nrtx = 0; - 803a68e: 687b ldr r3, [r7, #4] - 803a690: 2200 movs r2, #0 - 803a692: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 803a6be: 687b ldr r3, [r7, #4] + 803a6c0: 2200 movs r2, #0 + 803a6c2: f883 2042 strb.w r2, [r3, #66] ; 0x42 } /* Call the user specified function to call when successfully * connected. */ TCP_EVENT_CONNECTED(pcb, ERR_OK, err); - 803a696: 687b ldr r3, [r7, #4] - 803a698: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 803a69c: 2b00 cmp r3, #0 - 803a69e: d00a beq.n 803a6b6 - 803a6a0: 687b ldr r3, [r7, #4] - 803a6a2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 803a6a6: 687a ldr r2, [r7, #4] - 803a6a8: 6910 ldr r0, [r2, #16] - 803a6aa: 2200 movs r2, #0 - 803a6ac: 6879 ldr r1, [r7, #4] - 803a6ae: 4798 blx r3 - 803a6b0: 4603 mov r3, r0 - 803a6b2: 76bb strb r3, [r7, #26] - 803a6b4: e001 b.n 803a6ba - 803a6b6: 2300 movs r3, #0 - 803a6b8: 76bb strb r3, [r7, #26] + 803a6c6: 687b ldr r3, [r7, #4] + 803a6c8: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 803a6cc: 2b00 cmp r3, #0 + 803a6ce: d00a beq.n 803a6e6 + 803a6d0: 687b ldr r3, [r7, #4] + 803a6d2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 803a6d6: 687a ldr r2, [r7, #4] + 803a6d8: 6910 ldr r0, [r2, #16] + 803a6da: 2200 movs r2, #0 + 803a6dc: 6879 ldr r1, [r7, #4] + 803a6de: 4798 blx r3 + 803a6e0: 4603 mov r3, r0 + 803a6e2: 76bb strb r3, [r7, #26] + 803a6e4: e001 b.n 803a6ea + 803a6e6: 2300 movs r3, #0 + 803a6e8: 76bb strb r3, [r7, #26] if (err == ERR_ABRT) { - 803a6ba: f997 301a ldrsb.w r3, [r7, #26] - 803a6be: f113 0f0d cmn.w r3, #13 - 803a6c2: d102 bne.n 803a6ca + 803a6ea: f997 301a ldrsb.w r3, [r7, #26] + 803a6ee: f113 0f0d cmn.w r3, #13 + 803a6f2: d102 bne.n 803a6fa return ERR_ABRT; - 803a6c4: f06f 030c mvn.w r3, #12 - 803a6c8: e250 b.n 803ab6c + 803a6f4: f06f 030c mvn.w r3, #12 + 803a6f8: e250 b.n 803ab9c } tcp_ack_now(pcb); - 803a6ca: 687b ldr r3, [r7, #4] - 803a6cc: 8b5b ldrh r3, [r3, #26] - 803a6ce: f043 0302 orr.w r3, r3, #2 - 803a6d2: b29a uxth r2, r3 - 803a6d4: 687b ldr r3, [r7, #4] - 803a6d6: 835a strh r2, [r3, #26] + 803a6fa: 687b ldr r3, [r7, #4] + 803a6fc: 8b5b ldrh r3, [r3, #26] + 803a6fe: f043 0302 orr.w r3, r3, #2 + 803a702: b29a uxth r2, r3 + 803a704: 687b ldr r3, [r7, #4] + 803a706: 835a strh r2, [r3, #26] if (pcb->nrtx < TCP_SYNMAXRTX) { pcb->rtime = 0; tcp_rexmit_rto(pcb); } } break; - 803a6d8: e23a b.n 803ab50 + 803a708: e23a b.n 803ab80 else if (flags & TCP_ACK) { - 803a6da: 4b98 ldr r3, [pc, #608] ; (803a93c ) - 803a6dc: 781b ldrb r3, [r3, #0] - 803a6de: f003 0310 and.w r3, r3, #16 - 803a6e2: 2b00 cmp r3, #0 - 803a6e4: f000 8234 beq.w 803ab50 + 803a70a: 4b98 ldr r3, [pc, #608] ; (803a96c ) + 803a70c: 781b ldrb r3, [r3, #0] + 803a70e: f003 0310 and.w r3, r3, #16 + 803a712: 2b00 cmp r3, #0 + 803a714: f000 8234 beq.w 803ab80 tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a6e8: 4b95 ldr r3, [pc, #596] ; (803a940 ) - 803a6ea: 6819 ldr r1, [r3, #0] - 803a6ec: 4b95 ldr r3, [pc, #596] ; (803a944 ) - 803a6ee: 881b ldrh r3, [r3, #0] - 803a6f0: 461a mov r2, r3 - 803a6f2: 4b95 ldr r3, [pc, #596] ; (803a948 ) - 803a6f4: 681b ldr r3, [r3, #0] - 803a6f6: 18d0 adds r0, r2, r3 + 803a718: 4b95 ldr r3, [pc, #596] ; (803a970 ) + 803a71a: 6819 ldr r1, [r3, #0] + 803a71c: 4b95 ldr r3, [pc, #596] ; (803a974 ) + 803a71e: 881b ldrh r3, [r3, #0] + 803a720: 461a mov r2, r3 + 803a722: 4b95 ldr r3, [pc, #596] ; (803a978 ) + 803a724: 681b ldr r3, [r3, #0] + 803a726: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a6f8: 4b94 ldr r3, [pc, #592] ; (803a94c ) - 803a6fa: 681b ldr r3, [r3, #0] + 803a728: 4b94 ldr r3, [pc, #592] ; (803a97c ) + 803a72a: 681b ldr r3, [r3, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a6fc: 885b ldrh r3, [r3, #2] - 803a6fe: b29b uxth r3, r3 + 803a72c: 885b ldrh r3, [r3, #2] + 803a72e: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a700: 4a92 ldr r2, [pc, #584] ; (803a94c ) - 803a702: 6812 ldr r2, [r2, #0] + 803a730: 4a92 ldr r2, [pc, #584] ; (803a97c ) + 803a732: 6812 ldr r2, [r2, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a704: 8812 ldrh r2, [r2, #0] - 803a706: b292 uxth r2, r2 - 803a708: 9202 str r2, [sp, #8] - 803a70a: 9301 str r3, [sp, #4] - 803a70c: 4b90 ldr r3, [pc, #576] ; (803a950 ) - 803a70e: 9300 str r3, [sp, #0] - 803a710: 4b90 ldr r3, [pc, #576] ; (803a954 ) - 803a712: 4602 mov r2, r0 - 803a714: 6878 ldr r0, [r7, #4] - 803a716: f003 f8dd bl 803d8d4 + 803a734: 8812 ldrh r2, [r2, #0] + 803a736: b292 uxth r2, r2 + 803a738: 9202 str r2, [sp, #8] + 803a73a: 9301 str r3, [sp, #4] + 803a73c: 4b90 ldr r3, [pc, #576] ; (803a980 ) + 803a73e: 9300 str r3, [sp, #0] + 803a740: 4b90 ldr r3, [pc, #576] ; (803a984 ) + 803a742: 4602 mov r2, r0 + 803a744: 6878 ldr r0, [r7, #4] + 803a746: f003 f8dd bl 803d904 if (pcb->nrtx < TCP_SYNMAXRTX) { - 803a71a: 687b ldr r3, [r7, #4] - 803a71c: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803a720: 2b05 cmp r3, #5 - 803a722: f200 8215 bhi.w 803ab50 + 803a74a: 687b ldr r3, [r7, #4] + 803a74c: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803a750: 2b05 cmp r3, #5 + 803a752: f200 8215 bhi.w 803ab80 pcb->rtime = 0; - 803a726: 687b ldr r3, [r7, #4] - 803a728: 2200 movs r2, #0 - 803a72a: 861a strh r2, [r3, #48] ; 0x30 + 803a756: 687b ldr r3, [r7, #4] + 803a758: 2200 movs r2, #0 + 803a75a: 861a strh r2, [r3, #48] ; 0x30 tcp_rexmit_rto(pcb); - 803a72c: 6878 ldr r0, [r7, #4] - 803a72e: f002 fea7 bl 803d480 + 803a75c: 6878 ldr r0, [r7, #4] + 803a75e: f002 fea7 bl 803d4b0 break; - 803a732: e20d b.n 803ab50 + 803a762: e20d b.n 803ab80 case SYN_RCVD: if (flags & TCP_ACK) { - 803a734: 4b81 ldr r3, [pc, #516] ; (803a93c ) - 803a736: 781b ldrb r3, [r3, #0] - 803a738: f003 0310 and.w r3, r3, #16 - 803a73c: 2b00 cmp r3, #0 - 803a73e: f000 80a1 beq.w 803a884 + 803a764: 4b81 ldr r3, [pc, #516] ; (803a96c ) + 803a766: 781b ldrb r3, [r3, #0] + 803a768: f003 0310 and.w r3, r3, #16 + 803a76c: 2b00 cmp r3, #0 + 803a76e: f000 80a1 beq.w 803a8b4 /* expected ACK number? */ if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803a742: 4b7f ldr r3, [pc, #508] ; (803a940 ) - 803a744: 681a ldr r2, [r3, #0] - 803a746: 687b ldr r3, [r7, #4] - 803a748: 6c5b ldr r3, [r3, #68] ; 0x44 - 803a74a: 1ad3 subs r3, r2, r3 - 803a74c: 3b01 subs r3, #1 - 803a74e: 2b00 cmp r3, #0 - 803a750: db7e blt.n 803a850 - 803a752: 4b7b ldr r3, [pc, #492] ; (803a940 ) - 803a754: 681a ldr r2, [r3, #0] - 803a756: 687b ldr r3, [r7, #4] - 803a758: 6d1b ldr r3, [r3, #80] ; 0x50 - 803a75a: 1ad3 subs r3, r2, r3 - 803a75c: 2b00 cmp r3, #0 - 803a75e: dc77 bgt.n 803a850 + 803a772: 4b7f ldr r3, [pc, #508] ; (803a970 ) + 803a774: 681a ldr r2, [r3, #0] + 803a776: 687b ldr r3, [r7, #4] + 803a778: 6c5b ldr r3, [r3, #68] ; 0x44 + 803a77a: 1ad3 subs r3, r2, r3 + 803a77c: 3b01 subs r3, #1 + 803a77e: 2b00 cmp r3, #0 + 803a780: db7e blt.n 803a880 + 803a782: 4b7b ldr r3, [pc, #492] ; (803a970 ) + 803a784: 681a ldr r2, [r3, #0] + 803a786: 687b ldr r3, [r7, #4] + 803a788: 6d1b ldr r3, [r3, #80] ; 0x50 + 803a78a: 1ad3 subs r3, r2, r3 + 803a78c: 2b00 cmp r3, #0 + 803a78e: dc77 bgt.n 803a880 pcb->state = ESTABLISHED; - 803a760: 687b ldr r3, [r7, #4] - 803a762: 2204 movs r2, #4 - 803a764: 751a strb r2, [r3, #20] + 803a790: 687b ldr r3, [r7, #4] + 803a792: 2204 movs r2, #4 + 803a794: 751a strb r2, [r3, #20] LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); #if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG if (pcb->listener == NULL) { - 803a766: 687b ldr r3, [r7, #4] - 803a768: 6fdb ldr r3, [r3, #124] ; 0x7c - 803a76a: 2b00 cmp r3, #0 - 803a76c: d102 bne.n 803a774 + 803a796: 687b ldr r3, [r7, #4] + 803a798: 6fdb ldr r3, [r3, #124] ; 0x7c + 803a79a: 2b00 cmp r3, #0 + 803a79c: d102 bne.n 803a7a4 /* listen pcb might be closed by now */ err = ERR_VAL; - 803a76e: 23fa movs r3, #250 ; 0xfa - 803a770: 76bb strb r3, [r7, #26] - 803a772: e01d b.n 803a7b0 + 803a79e: 23fa movs r3, #250 ; 0xfa + 803a7a0: 76bb strb r3, [r7, #26] + 803a7a2: e01d b.n 803a7e0 } else #endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */ { #if LWIP_CALLBACK_API LWIP_ASSERT("pcb->listener->accept != NULL", pcb->listener->accept != NULL); - 803a774: 687b ldr r3, [r7, #4] - 803a776: 6fdb ldr r3, [r3, #124] ; 0x7c - 803a778: 699b ldr r3, [r3, #24] - 803a77a: 2b00 cmp r3, #0 - 803a77c: d106 bne.n 803a78c - 803a77e: 4b76 ldr r3, [pc, #472] ; (803a958 ) - 803a780: f44f 726a mov.w r2, #936 ; 0x3a8 - 803a784: 4975 ldr r1, [pc, #468] ; (803a95c ) - 803a786: 4876 ldr r0, [pc, #472] ; (803a960 ) - 803a788: f006 f9aa bl 8040ae0 + 803a7a4: 687b ldr r3, [r7, #4] + 803a7a6: 6fdb ldr r3, [r3, #124] ; 0x7c + 803a7a8: 699b ldr r3, [r3, #24] + 803a7aa: 2b00 cmp r3, #0 + 803a7ac: d106 bne.n 803a7bc + 803a7ae: 4b76 ldr r3, [pc, #472] ; (803a988 ) + 803a7b0: f44f 726a mov.w r2, #936 ; 0x3a8 + 803a7b4: 4975 ldr r1, [pc, #468] ; (803a98c ) + 803a7b6: 4876 ldr r0, [pc, #472] ; (803a990 ) + 803a7b8: f006 f9aa bl 8040b10 #endif tcp_backlog_accepted(pcb); /* Call the accept function. */ TCP_EVENT_ACCEPT(pcb->listener, pcb, pcb->callback_arg, ERR_OK, err); - 803a78c: 687b ldr r3, [r7, #4] - 803a78e: 6fdb ldr r3, [r3, #124] ; 0x7c - 803a790: 699b ldr r3, [r3, #24] - 803a792: 2b00 cmp r3, #0 - 803a794: d00a beq.n 803a7ac - 803a796: 687b ldr r3, [r7, #4] - 803a798: 6fdb ldr r3, [r3, #124] ; 0x7c - 803a79a: 699b ldr r3, [r3, #24] - 803a79c: 687a ldr r2, [r7, #4] - 803a79e: 6910 ldr r0, [r2, #16] - 803a7a0: 2200 movs r2, #0 - 803a7a2: 6879 ldr r1, [r7, #4] - 803a7a4: 4798 blx r3 - 803a7a6: 4603 mov r3, r0 - 803a7a8: 76bb strb r3, [r7, #26] - 803a7aa: e001 b.n 803a7b0 - 803a7ac: 23f0 movs r3, #240 ; 0xf0 - 803a7ae: 76bb strb r3, [r7, #26] + 803a7bc: 687b ldr r3, [r7, #4] + 803a7be: 6fdb ldr r3, [r3, #124] ; 0x7c + 803a7c0: 699b ldr r3, [r3, #24] + 803a7c2: 2b00 cmp r3, #0 + 803a7c4: d00a beq.n 803a7dc + 803a7c6: 687b ldr r3, [r7, #4] + 803a7c8: 6fdb ldr r3, [r3, #124] ; 0x7c + 803a7ca: 699b ldr r3, [r3, #24] + 803a7cc: 687a ldr r2, [r7, #4] + 803a7ce: 6910 ldr r0, [r2, #16] + 803a7d0: 2200 movs r2, #0 + 803a7d2: 6879 ldr r1, [r7, #4] + 803a7d4: 4798 blx r3 + 803a7d6: 4603 mov r3, r0 + 803a7d8: 76bb strb r3, [r7, #26] + 803a7da: e001 b.n 803a7e0 + 803a7dc: 23f0 movs r3, #240 ; 0xf0 + 803a7de: 76bb strb r3, [r7, #26] } if (err != ERR_OK) { - 803a7b0: f997 301a ldrsb.w r3, [r7, #26] - 803a7b4: 2b00 cmp r3, #0 - 803a7b6: d00a beq.n 803a7ce + 803a7e0: f997 301a ldrsb.w r3, [r7, #26] + 803a7e4: 2b00 cmp r3, #0 + 803a7e6: d00a beq.n 803a7fe /* If the accept function returns with an error, we abort * the connection. */ /* Already aborted? */ if (err != ERR_ABRT) { - 803a7b8: f997 301a ldrsb.w r3, [r7, #26] - 803a7bc: f113 0f0d cmn.w r3, #13 - 803a7c0: d002 beq.n 803a7c8 + 803a7e8: f997 301a ldrsb.w r3, [r7, #26] + 803a7ec: f113 0f0d cmn.w r3, #13 + 803a7f0: d002 beq.n 803a7f8 tcp_abort(pcb); - 803a7c2: 6878 ldr r0, [r7, #4] - 803a7c4: f7fd fd2a bl 803821c + 803a7f2: 6878 ldr r0, [r7, #4] + 803a7f4: f7fd fd2a bl 803824c } return ERR_ABRT; - 803a7c8: f06f 030c mvn.w r3, #12 - 803a7cc: e1ce b.n 803ab6c + 803a7f8: f06f 030c mvn.w r3, #12 + 803a7fc: e1ce b.n 803ab9c } /* If there was any data contained within this ACK, * we'd better pass it on to the application as well. */ tcp_receive(pcb); - 803a7ce: 6878 ldr r0, [r7, #4] - 803a7d0: f000 fae0 bl 803ad94 + 803a7fe: 6878 ldr r0, [r7, #4] + 803a800: f000 fae0 bl 803adc4 /* Prevent ACK for SYN to generate a sent event */ if (recv_acked != 0) { - 803a7d4: 4b63 ldr r3, [pc, #396] ; (803a964 ) - 803a7d6: 881b ldrh r3, [r3, #0] - 803a7d8: 2b00 cmp r3, #0 - 803a7da: d005 beq.n 803a7e8 + 803a804: 4b63 ldr r3, [pc, #396] ; (803a994 ) + 803a806: 881b ldrh r3, [r3, #0] + 803a808: 2b00 cmp r3, #0 + 803a80a: d005 beq.n 803a818 recv_acked--; - 803a7dc: 4b61 ldr r3, [pc, #388] ; (803a964 ) - 803a7de: 881b ldrh r3, [r3, #0] - 803a7e0: 3b01 subs r3, #1 - 803a7e2: b29a uxth r2, r3 - 803a7e4: 4b5f ldr r3, [pc, #380] ; (803a964 ) - 803a7e6: 801a strh r2, [r3, #0] + 803a80c: 4b61 ldr r3, [pc, #388] ; (803a994 ) + 803a80e: 881b ldrh r3, [r3, #0] + 803a810: 3b01 subs r3, #1 + 803a812: b29a uxth r2, r3 + 803a814: 4b5f ldr r3, [pc, #380] ; (803a994 ) + 803a816: 801a strh r2, [r3, #0] } pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss); - 803a7e8: 687b ldr r3, [r7, #4] - 803a7ea: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a7ec: 009a lsls r2, r3, #2 - 803a7ee: 687b ldr r3, [r7, #4] - 803a7f0: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a7f2: 005b lsls r3, r3, #1 - 803a7f4: f241 111c movw r1, #4380 ; 0x111c - 803a7f8: 428b cmp r3, r1 - 803a7fa: bf38 it cc - 803a7fc: 460b movcc r3, r1 - 803a7fe: 429a cmp r2, r3 - 803a800: d204 bcs.n 803a80c - 803a802: 687b ldr r3, [r7, #4] - 803a804: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a806: 009b lsls r3, r3, #2 - 803a808: b29b uxth r3, r3 - 803a80a: e00d b.n 803a828 - 803a80c: 687b ldr r3, [r7, #4] - 803a80e: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a810: 005b lsls r3, r3, #1 - 803a812: f241 121c movw r2, #4380 ; 0x111c - 803a816: 4293 cmp r3, r2 - 803a818: d904 bls.n 803a824 - 803a81a: 687b ldr r3, [r7, #4] - 803a81c: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a81e: 005b lsls r3, r3, #1 - 803a820: b29b uxth r3, r3 - 803a822: e001 b.n 803a828 - 803a824: f241 131c movw r3, #4380 ; 0x111c - 803a828: 687a ldr r2, [r7, #4] - 803a82a: f8a2 3048 strh.w r3, [r2, #72] ; 0x48 + 803a818: 687b ldr r3, [r7, #4] + 803a81a: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a81c: 009a lsls r2, r3, #2 + 803a81e: 687b ldr r3, [r7, #4] + 803a820: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a822: 005b lsls r3, r3, #1 + 803a824: f241 111c movw r1, #4380 ; 0x111c + 803a828: 428b cmp r3, r1 + 803a82a: bf38 it cc + 803a82c: 460b movcc r3, r1 + 803a82e: 429a cmp r2, r3 + 803a830: d204 bcs.n 803a83c + 803a832: 687b ldr r3, [r7, #4] + 803a834: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a836: 009b lsls r3, r3, #2 + 803a838: b29b uxth r3, r3 + 803a83a: e00d b.n 803a858 + 803a83c: 687b ldr r3, [r7, #4] + 803a83e: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a840: 005b lsls r3, r3, #1 + 803a842: f241 121c movw r2, #4380 ; 0x111c + 803a846: 4293 cmp r3, r2 + 803a848: d904 bls.n 803a854 + 803a84a: 687b ldr r3, [r7, #4] + 803a84c: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a84e: 005b lsls r3, r3, #1 + 803a850: b29b uxth r3, r3 + 803a852: e001 b.n 803a858 + 803a854: f241 131c movw r3, #4380 ; 0x111c + 803a858: 687a ldr r2, [r7, #4] + 803a85a: f8a2 3048 strh.w r3, [r2, #72] ; 0x48 LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SYN_RCVD): cwnd %"TCPWNDSIZE_F " ssthresh %"TCPWNDSIZE_F"\n", pcb->cwnd, pcb->ssthresh)); if (recv_flags & TF_GOT_FIN) { - 803a82e: 4b4e ldr r3, [pc, #312] ; (803a968 ) - 803a830: 781b ldrb r3, [r3, #0] - 803a832: f003 0320 and.w r3, r3, #32 - 803a836: 2b00 cmp r3, #0 - 803a838: d037 beq.n 803a8aa + 803a85e: 4b4e ldr r3, [pc, #312] ; (803a998 ) + 803a860: 781b ldrb r3, [r3, #0] + 803a862: f003 0320 and.w r3, r3, #32 + 803a866: 2b00 cmp r3, #0 + 803a868: d037 beq.n 803a8da tcp_ack_now(pcb); - 803a83a: 687b ldr r3, [r7, #4] - 803a83c: 8b5b ldrh r3, [r3, #26] - 803a83e: f043 0302 orr.w r3, r3, #2 - 803a842: b29a uxth r2, r3 - 803a844: 687b ldr r3, [r7, #4] - 803a846: 835a strh r2, [r3, #26] + 803a86a: 687b ldr r3, [r7, #4] + 803a86c: 8b5b ldrh r3, [r3, #26] + 803a86e: f043 0302 orr.w r3, r3, #2 + 803a872: b29a uxth r2, r3 + 803a874: 687b ldr r3, [r7, #4] + 803a876: 835a strh r2, [r3, #26] pcb->state = CLOSE_WAIT; - 803a848: 687b ldr r3, [r7, #4] - 803a84a: 2207 movs r2, #7 - 803a84c: 751a strb r2, [r3, #20] + 803a878: 687b ldr r3, [r7, #4] + 803a87a: 2207 movs r2, #7 + 803a87c: 751a strb r2, [r3, #20] if (recv_flags & TF_GOT_FIN) { - 803a84e: e02c b.n 803a8aa + 803a87e: e02c b.n 803a8da } } else { /* incorrect ACK number, send RST */ tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a850: 4b3b ldr r3, [pc, #236] ; (803a940 ) - 803a852: 6819 ldr r1, [r3, #0] - 803a854: 4b3b ldr r3, [pc, #236] ; (803a944 ) - 803a856: 881b ldrh r3, [r3, #0] - 803a858: 461a mov r2, r3 - 803a85a: 4b3b ldr r3, [pc, #236] ; (803a948 ) - 803a85c: 681b ldr r3, [r3, #0] - 803a85e: 18d0 adds r0, r2, r3 + 803a880: 4b3b ldr r3, [pc, #236] ; (803a970 ) + 803a882: 6819 ldr r1, [r3, #0] + 803a884: 4b3b ldr r3, [pc, #236] ; (803a974 ) + 803a886: 881b ldrh r3, [r3, #0] + 803a888: 461a mov r2, r3 + 803a88a: 4b3b ldr r3, [pc, #236] ; (803a978 ) + 803a88c: 681b ldr r3, [r3, #0] + 803a88e: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a860: 4b3a ldr r3, [pc, #232] ; (803a94c ) - 803a862: 681b ldr r3, [r3, #0] + 803a890: 4b3a ldr r3, [pc, #232] ; (803a97c ) + 803a892: 681b ldr r3, [r3, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a864: 885b ldrh r3, [r3, #2] - 803a866: b29b uxth r3, r3 + 803a894: 885b ldrh r3, [r3, #2] + 803a896: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a868: 4a38 ldr r2, [pc, #224] ; (803a94c ) - 803a86a: 6812 ldr r2, [r2, #0] + 803a898: 4a38 ldr r2, [pc, #224] ; (803a97c ) + 803a89a: 6812 ldr r2, [r2, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a86c: 8812 ldrh r2, [r2, #0] - 803a86e: b292 uxth r2, r2 - 803a870: 9202 str r2, [sp, #8] - 803a872: 9301 str r3, [sp, #4] - 803a874: 4b36 ldr r3, [pc, #216] ; (803a950 ) - 803a876: 9300 str r3, [sp, #0] - 803a878: 4b36 ldr r3, [pc, #216] ; (803a954 ) - 803a87a: 4602 mov r2, r0 - 803a87c: 6878 ldr r0, [r7, #4] - 803a87e: f003 f829 bl 803d8d4 + 803a89c: 8812 ldrh r2, [r2, #0] + 803a89e: b292 uxth r2, r2 + 803a8a0: 9202 str r2, [sp, #8] + 803a8a2: 9301 str r3, [sp, #4] + 803a8a4: 4b36 ldr r3, [pc, #216] ; (803a980 ) + 803a8a6: 9300 str r3, [sp, #0] + 803a8a8: 4b36 ldr r3, [pc, #216] ; (803a984 ) + 803a8aa: 4602 mov r2, r0 + 803a8ac: 6878 ldr r0, [r7, #4] + 803a8ae: f003 f829 bl 803d904 } } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) { /* Looks like another copy of the SYN - retransmit our SYN-ACK */ tcp_rexmit(pcb); } break; - 803a882: e167 b.n 803ab54 + 803a8b2: e167 b.n 803ab84 } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) { - 803a884: 4b2d ldr r3, [pc, #180] ; (803a93c ) - 803a886: 781b ldrb r3, [r3, #0] - 803a888: f003 0302 and.w r3, r3, #2 - 803a88c: 2b00 cmp r3, #0 - 803a88e: f000 8161 beq.w 803ab54 - 803a892: 687b ldr r3, [r7, #4] - 803a894: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a896: 1e5a subs r2, r3, #1 - 803a898: 4b2b ldr r3, [pc, #172] ; (803a948 ) - 803a89a: 681b ldr r3, [r3, #0] - 803a89c: 429a cmp r2, r3 - 803a89e: f040 8159 bne.w 803ab54 + 803a8b4: 4b2d ldr r3, [pc, #180] ; (803a96c ) + 803a8b6: 781b ldrb r3, [r3, #0] + 803a8b8: f003 0302 and.w r3, r3, #2 + 803a8bc: 2b00 cmp r3, #0 + 803a8be: f000 8161 beq.w 803ab84 + 803a8c2: 687b ldr r3, [r7, #4] + 803a8c4: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a8c6: 1e5a subs r2, r3, #1 + 803a8c8: 4b2b ldr r3, [pc, #172] ; (803a978 ) + 803a8ca: 681b ldr r3, [r3, #0] + 803a8cc: 429a cmp r2, r3 + 803a8ce: f040 8159 bne.w 803ab84 tcp_rexmit(pcb); - 803a8a2: 6878 ldr r0, [r7, #4] - 803a8a4: f002 fe0e bl 803d4c4 + 803a8d2: 6878 ldr r0, [r7, #4] + 803a8d4: f002 fe0e bl 803d4f4 break; - 803a8a8: e154 b.n 803ab54 - 803a8aa: e153 b.n 803ab54 + 803a8d8: e154 b.n 803ab84 + 803a8da: e153 b.n 803ab84 case CLOSE_WAIT: /* FALLTHROUGH */ case ESTABLISHED: tcp_receive(pcb); - 803a8ac: 6878 ldr r0, [r7, #4] - 803a8ae: f000 fa71 bl 803ad94 + 803a8dc: 6878 ldr r0, [r7, #4] + 803a8de: f000 fa71 bl 803adc4 if (recv_flags & TF_GOT_FIN) { /* passive close */ - 803a8b2: 4b2d ldr r3, [pc, #180] ; (803a968 ) - 803a8b4: 781b ldrb r3, [r3, #0] - 803a8b6: f003 0320 and.w r3, r3, #32 - 803a8ba: 2b00 cmp r3, #0 - 803a8bc: f000 814c beq.w 803ab58 + 803a8e2: 4b2d ldr r3, [pc, #180] ; (803a998 ) + 803a8e4: 781b ldrb r3, [r3, #0] + 803a8e6: f003 0320 and.w r3, r3, #32 + 803a8ea: 2b00 cmp r3, #0 + 803a8ec: f000 814c beq.w 803ab88 tcp_ack_now(pcb); - 803a8c0: 687b ldr r3, [r7, #4] - 803a8c2: 8b5b ldrh r3, [r3, #26] - 803a8c4: f043 0302 orr.w r3, r3, #2 - 803a8c8: b29a uxth r2, r3 - 803a8ca: 687b ldr r3, [r7, #4] - 803a8cc: 835a strh r2, [r3, #26] + 803a8f0: 687b ldr r3, [r7, #4] + 803a8f2: 8b5b ldrh r3, [r3, #26] + 803a8f4: f043 0302 orr.w r3, r3, #2 + 803a8f8: b29a uxth r2, r3 + 803a8fa: 687b ldr r3, [r7, #4] + 803a8fc: 835a strh r2, [r3, #26] pcb->state = CLOSE_WAIT; - 803a8ce: 687b ldr r3, [r7, #4] - 803a8d0: 2207 movs r2, #7 - 803a8d2: 751a strb r2, [r3, #20] + 803a8fe: 687b ldr r3, [r7, #4] + 803a900: 2207 movs r2, #7 + 803a902: 751a strb r2, [r3, #20] } break; - 803a8d4: e140 b.n 803ab58 + 803a904: e140 b.n 803ab88 case FIN_WAIT_1: tcp_receive(pcb); - 803a8d6: 6878 ldr r0, [r7, #4] - 803a8d8: f000 fa5c bl 803ad94 + 803a906: 6878 ldr r0, [r7, #4] + 803a908: f000 fa5c bl 803adc4 if (recv_flags & TF_GOT_FIN) { - 803a8dc: 4b22 ldr r3, [pc, #136] ; (803a968 ) - 803a8de: 781b ldrb r3, [r3, #0] - 803a8e0: f003 0320 and.w r3, r3, #32 - 803a8e4: 2b00 cmp r3, #0 - 803a8e6: d071 beq.n 803a9cc + 803a90c: 4b22 ldr r3, [pc, #136] ; (803a998 ) + 803a90e: 781b ldrb r3, [r3, #0] + 803a910: f003 0320 and.w r3, r3, #32 + 803a914: 2b00 cmp r3, #0 + 803a916: d071 beq.n 803a9fc if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && - 803a8e8: 4b14 ldr r3, [pc, #80] ; (803a93c ) - 803a8ea: 781b ldrb r3, [r3, #0] - 803a8ec: f003 0310 and.w r3, r3, #16 - 803a8f0: 2b00 cmp r3, #0 - 803a8f2: d060 beq.n 803a9b6 - 803a8f4: 687b ldr r3, [r7, #4] - 803a8f6: 6d1a ldr r2, [r3, #80] ; 0x50 - 803a8f8: 4b11 ldr r3, [pc, #68] ; (803a940 ) - 803a8fa: 681b ldr r3, [r3, #0] - 803a8fc: 429a cmp r2, r3 - 803a8fe: d15a bne.n 803a9b6 + 803a918: 4b14 ldr r3, [pc, #80] ; (803a96c ) + 803a91a: 781b ldrb r3, [r3, #0] + 803a91c: f003 0310 and.w r3, r3, #16 + 803a920: 2b00 cmp r3, #0 + 803a922: d060 beq.n 803a9e6 + 803a924: 687b ldr r3, [r7, #4] + 803a926: 6d1a ldr r2, [r3, #80] ; 0x50 + 803a928: 4b11 ldr r3, [pc, #68] ; (803a970 ) + 803a92a: 681b ldr r3, [r3, #0] + 803a92c: 429a cmp r2, r3 + 803a92e: d15a bne.n 803a9e6 pcb->unsent == NULL) { - 803a900: 687b ldr r3, [r7, #4] - 803a902: 6edb ldr r3, [r3, #108] ; 0x6c + 803a930: 687b ldr r3, [r7, #4] + 803a932: 6edb ldr r3, [r3, #108] ; 0x6c if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && - 803a904: 2b00 cmp r3, #0 - 803a906: d156 bne.n 803a9b6 + 803a934: 2b00 cmp r3, #0 + 803a936: d156 bne.n 803a9e6 LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); tcp_ack_now(pcb); - 803a908: 687b ldr r3, [r7, #4] - 803a90a: 8b5b ldrh r3, [r3, #26] - 803a90c: f043 0302 orr.w r3, r3, #2 - 803a910: b29a uxth r2, r3 - 803a912: 687b ldr r3, [r7, #4] - 803a914: 835a strh r2, [r3, #26] + 803a938: 687b ldr r3, [r7, #4] + 803a93a: 8b5b ldrh r3, [r3, #26] + 803a93c: f043 0302 orr.w r3, r3, #2 + 803a940: b29a uxth r2, r3 + 803a942: 687b ldr r3, [r7, #4] + 803a944: 835a strh r2, [r3, #26] tcp_pcb_purge(pcb); - 803a916: 6878 ldr r0, [r7, #4] - 803a918: f7fe fdbc bl 8039494 + 803a946: 6878 ldr r0, [r7, #4] + 803a948: f7fe fdbc bl 80394c4 TCP_RMV_ACTIVE(pcb); - 803a91c: 4b13 ldr r3, [pc, #76] ; (803a96c ) - 803a91e: 681b ldr r3, [r3, #0] - 803a920: 687a ldr r2, [r7, #4] - 803a922: 429a cmp r2, r3 - 803a924: d105 bne.n 803a932 - 803a926: 4b11 ldr r3, [pc, #68] ; (803a96c ) - 803a928: 681b ldr r3, [r3, #0] - 803a92a: 68db ldr r3, [r3, #12] - 803a92c: 4a0f ldr r2, [pc, #60] ; (803a96c ) - 803a92e: 6013 str r3, [r2, #0] - 803a930: e02e b.n 803a990 - 803a932: 4b0e ldr r3, [pc, #56] ; (803a96c ) - 803a934: 681b ldr r3, [r3, #0] - 803a936: 617b str r3, [r7, #20] - 803a938: e027 b.n 803a98a - 803a93a: bf00 nop - 803a93c: 2400e99c .word 0x2400e99c - 803a940: 2400e994 .word 0x2400e994 - 803a944: 2400e99a .word 0x2400e99a - 803a948: 2400e990 .word 0x2400e990 - 803a94c: 2400e980 .word 0x2400e980 - 803a950: 2400b9cc .word 0x2400b9cc - 803a954: 2400b9d0 .word 0x2400b9d0 - 803a958: 080434d0 .word 0x080434d0 - 803a95c: 08043770 .word 0x08043770 - 803a960: 0804351c .word 0x0804351c - 803a964: 2400e998 .word 0x2400e998 - 803a968: 2400e99d .word 0x2400e99d - 803a96c: 2400e964 .word 0x2400e964 - 803a970: 697b ldr r3, [r7, #20] - 803a972: 68db ldr r3, [r3, #12] - 803a974: 687a ldr r2, [r7, #4] - 803a976: 429a cmp r2, r3 - 803a978: d104 bne.n 803a984 - 803a97a: 687b ldr r3, [r7, #4] - 803a97c: 68da ldr r2, [r3, #12] - 803a97e: 697b ldr r3, [r7, #20] - 803a980: 60da str r2, [r3, #12] - 803a982: e005 b.n 803a990 - 803a984: 697b ldr r3, [r7, #20] - 803a986: 68db ldr r3, [r3, #12] - 803a988: 617b str r3, [r7, #20] - 803a98a: 697b ldr r3, [r7, #20] - 803a98c: 2b00 cmp r3, #0 - 803a98e: d1ef bne.n 803a970 - 803a990: 687b ldr r3, [r7, #4] - 803a992: 2200 movs r2, #0 - 803a994: 60da str r2, [r3, #12] - 803a996: 4b77 ldr r3, [pc, #476] ; (803ab74 ) - 803a998: 2201 movs r2, #1 - 803a99a: 701a strb r2, [r3, #0] + 803a94c: 4b13 ldr r3, [pc, #76] ; (803a99c ) + 803a94e: 681b ldr r3, [r3, #0] + 803a950: 687a ldr r2, [r7, #4] + 803a952: 429a cmp r2, r3 + 803a954: d105 bne.n 803a962 + 803a956: 4b11 ldr r3, [pc, #68] ; (803a99c ) + 803a958: 681b ldr r3, [r3, #0] + 803a95a: 68db ldr r3, [r3, #12] + 803a95c: 4a0f ldr r2, [pc, #60] ; (803a99c ) + 803a95e: 6013 str r3, [r2, #0] + 803a960: e02e b.n 803a9c0 + 803a962: 4b0e ldr r3, [pc, #56] ; (803a99c ) + 803a964: 681b ldr r3, [r3, #0] + 803a966: 617b str r3, [r7, #20] + 803a968: e027 b.n 803a9ba + 803a96a: bf00 nop + 803a96c: 2400e99c .word 0x2400e99c + 803a970: 2400e994 .word 0x2400e994 + 803a974: 2400e99a .word 0x2400e99a + 803a978: 2400e990 .word 0x2400e990 + 803a97c: 2400e980 .word 0x2400e980 + 803a980: 2400b9cc .word 0x2400b9cc + 803a984: 2400b9d0 .word 0x2400b9d0 + 803a988: 08043500 .word 0x08043500 + 803a98c: 080437a0 .word 0x080437a0 + 803a990: 0804354c .word 0x0804354c + 803a994: 2400e998 .word 0x2400e998 + 803a998: 2400e99d .word 0x2400e99d + 803a99c: 2400e964 .word 0x2400e964 + 803a9a0: 697b ldr r3, [r7, #20] + 803a9a2: 68db ldr r3, [r3, #12] + 803a9a4: 687a ldr r2, [r7, #4] + 803a9a6: 429a cmp r2, r3 + 803a9a8: d104 bne.n 803a9b4 + 803a9aa: 687b ldr r3, [r7, #4] + 803a9ac: 68da ldr r2, [r3, #12] + 803a9ae: 697b ldr r3, [r7, #20] + 803a9b0: 60da str r2, [r3, #12] + 803a9b2: e005 b.n 803a9c0 + 803a9b4: 697b ldr r3, [r7, #20] + 803a9b6: 68db ldr r3, [r3, #12] + 803a9b8: 617b str r3, [r7, #20] + 803a9ba: 697b ldr r3, [r7, #20] + 803a9bc: 2b00 cmp r3, #0 + 803a9be: d1ef bne.n 803a9a0 + 803a9c0: 687b ldr r3, [r7, #4] + 803a9c2: 2200 movs r2, #0 + 803a9c4: 60da str r2, [r3, #12] + 803a9c6: 4b77 ldr r3, [pc, #476] ; (803aba4 ) + 803a9c8: 2201 movs r2, #1 + 803a9ca: 701a strb r2, [r3, #0] pcb->state = TIME_WAIT; - 803a99c: 687b ldr r3, [r7, #4] - 803a99e: 220a movs r2, #10 - 803a9a0: 751a strb r2, [r3, #20] + 803a9cc: 687b ldr r3, [r7, #4] + 803a9ce: 220a movs r2, #10 + 803a9d0: 751a strb r2, [r3, #20] TCP_REG(&tcp_tw_pcbs, pcb); - 803a9a2: 4b75 ldr r3, [pc, #468] ; (803ab78 ) - 803a9a4: 681a ldr r2, [r3, #0] - 803a9a6: 687b ldr r3, [r7, #4] - 803a9a8: 60da str r2, [r3, #12] - 803a9aa: 4a73 ldr r2, [pc, #460] ; (803ab78 ) - 803a9ac: 687b ldr r3, [r7, #4] - 803a9ae: 6013 str r3, [r2, #0] - 803a9b0: f003 f952 bl 803dc58 + 803a9d2: 4b75 ldr r3, [pc, #468] ; (803aba8 ) + 803a9d4: 681a ldr r2, [r3, #0] + 803a9d6: 687b ldr r3, [r7, #4] + 803a9d8: 60da str r2, [r3, #12] + 803a9da: 4a73 ldr r2, [pc, #460] ; (803aba8 ) + 803a9dc: 687b ldr r3, [r7, #4] + 803a9de: 6013 str r3, [r2, #0] + 803a9e0: f003 f952 bl 803dc88 } } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && pcb->unsent == NULL) { pcb->state = FIN_WAIT_2; } break; - 803a9b4: e0d2 b.n 803ab5c + 803a9e4: e0d2 b.n 803ab8c tcp_ack_now(pcb); - 803a9b6: 687b ldr r3, [r7, #4] - 803a9b8: 8b5b ldrh r3, [r3, #26] - 803a9ba: f043 0302 orr.w r3, r3, #2 - 803a9be: b29a uxth r2, r3 - 803a9c0: 687b ldr r3, [r7, #4] - 803a9c2: 835a strh r2, [r3, #26] + 803a9e6: 687b ldr r3, [r7, #4] + 803a9e8: 8b5b ldrh r3, [r3, #26] + 803a9ea: f043 0302 orr.w r3, r3, #2 + 803a9ee: b29a uxth r2, r3 + 803a9f0: 687b ldr r3, [r7, #4] + 803a9f2: 835a strh r2, [r3, #26] pcb->state = CLOSING; - 803a9c4: 687b ldr r3, [r7, #4] - 803a9c6: 2208 movs r2, #8 - 803a9c8: 751a strb r2, [r3, #20] + 803a9f4: 687b ldr r3, [r7, #4] + 803a9f6: 2208 movs r2, #8 + 803a9f8: 751a strb r2, [r3, #20] break; - 803a9ca: e0c7 b.n 803ab5c + 803a9fa: e0c7 b.n 803ab8c } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && - 803a9cc: 4b6b ldr r3, [pc, #428] ; (803ab7c ) - 803a9ce: 781b ldrb r3, [r3, #0] - 803a9d0: f003 0310 and.w r3, r3, #16 - 803a9d4: 2b00 cmp r3, #0 - 803a9d6: f000 80c1 beq.w 803ab5c - 803a9da: 687b ldr r3, [r7, #4] - 803a9dc: 6d1a ldr r2, [r3, #80] ; 0x50 - 803a9de: 4b68 ldr r3, [pc, #416] ; (803ab80 ) - 803a9e0: 681b ldr r3, [r3, #0] - 803a9e2: 429a cmp r2, r3 - 803a9e4: f040 80ba bne.w 803ab5c + 803a9fc: 4b6b ldr r3, [pc, #428] ; (803abac ) + 803a9fe: 781b ldrb r3, [r3, #0] + 803aa00: f003 0310 and.w r3, r3, #16 + 803aa04: 2b00 cmp r3, #0 + 803aa06: f000 80c1 beq.w 803ab8c + 803aa0a: 687b ldr r3, [r7, #4] + 803aa0c: 6d1a ldr r2, [r3, #80] ; 0x50 + 803aa0e: 4b68 ldr r3, [pc, #416] ; (803abb0 ) + 803aa10: 681b ldr r3, [r3, #0] + 803aa12: 429a cmp r2, r3 + 803aa14: f040 80ba bne.w 803ab8c pcb->unsent == NULL) { - 803a9e8: 687b ldr r3, [r7, #4] - 803a9ea: 6edb ldr r3, [r3, #108] ; 0x6c + 803aa18: 687b ldr r3, [r7, #4] + 803aa1a: 6edb ldr r3, [r3, #108] ; 0x6c } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && - 803a9ec: 2b00 cmp r3, #0 - 803a9ee: f040 80b5 bne.w 803ab5c + 803aa1c: 2b00 cmp r3, #0 + 803aa1e: f040 80b5 bne.w 803ab8c pcb->state = FIN_WAIT_2; - 803a9f2: 687b ldr r3, [r7, #4] - 803a9f4: 2206 movs r2, #6 - 803a9f6: 751a strb r2, [r3, #20] + 803aa22: 687b ldr r3, [r7, #4] + 803aa24: 2206 movs r2, #6 + 803aa26: 751a strb r2, [r3, #20] break; - 803a9f8: e0b0 b.n 803ab5c + 803aa28: e0b0 b.n 803ab8c case FIN_WAIT_2: tcp_receive(pcb); - 803a9fa: 6878 ldr r0, [r7, #4] - 803a9fc: f000 f9ca bl 803ad94 + 803aa2a: 6878 ldr r0, [r7, #4] + 803aa2c: f000 f9ca bl 803adc4 if (recv_flags & TF_GOT_FIN) { - 803aa00: 4b60 ldr r3, [pc, #384] ; (803ab84 ) - 803aa02: 781b ldrb r3, [r3, #0] - 803aa04: f003 0320 and.w r3, r3, #32 - 803aa08: 2b00 cmp r3, #0 - 803aa0a: f000 80a9 beq.w 803ab60 + 803aa30: 4b60 ldr r3, [pc, #384] ; (803abb4 ) + 803aa32: 781b ldrb r3, [r3, #0] + 803aa34: f003 0320 and.w r3, r3, #32 + 803aa38: 2b00 cmp r3, #0 + 803aa3a: f000 80a9 beq.w 803ab90 LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); tcp_ack_now(pcb); - 803aa0e: 687b ldr r3, [r7, #4] - 803aa10: 8b5b ldrh r3, [r3, #26] - 803aa12: f043 0302 orr.w r3, r3, #2 - 803aa16: b29a uxth r2, r3 - 803aa18: 687b ldr r3, [r7, #4] - 803aa1a: 835a strh r2, [r3, #26] + 803aa3e: 687b ldr r3, [r7, #4] + 803aa40: 8b5b ldrh r3, [r3, #26] + 803aa42: f043 0302 orr.w r3, r3, #2 + 803aa46: b29a uxth r2, r3 + 803aa48: 687b ldr r3, [r7, #4] + 803aa4a: 835a strh r2, [r3, #26] tcp_pcb_purge(pcb); - 803aa1c: 6878 ldr r0, [r7, #4] - 803aa1e: f7fe fd39 bl 8039494 + 803aa4c: 6878 ldr r0, [r7, #4] + 803aa4e: f7fe fd39 bl 80394c4 TCP_RMV_ACTIVE(pcb); - 803aa22: 4b59 ldr r3, [pc, #356] ; (803ab88 ) - 803aa24: 681b ldr r3, [r3, #0] - 803aa26: 687a ldr r2, [r7, #4] - 803aa28: 429a cmp r2, r3 - 803aa2a: d105 bne.n 803aa38 - 803aa2c: 4b56 ldr r3, [pc, #344] ; (803ab88 ) - 803aa2e: 681b ldr r3, [r3, #0] - 803aa30: 68db ldr r3, [r3, #12] - 803aa32: 4a55 ldr r2, [pc, #340] ; (803ab88 ) - 803aa34: 6013 str r3, [r2, #0] - 803aa36: e013 b.n 803aa60 - 803aa38: 4b53 ldr r3, [pc, #332] ; (803ab88 ) - 803aa3a: 681b ldr r3, [r3, #0] - 803aa3c: 613b str r3, [r7, #16] - 803aa3e: e00c b.n 803aa5a - 803aa40: 693b ldr r3, [r7, #16] - 803aa42: 68db ldr r3, [r3, #12] - 803aa44: 687a ldr r2, [r7, #4] - 803aa46: 429a cmp r2, r3 - 803aa48: d104 bne.n 803aa54 - 803aa4a: 687b ldr r3, [r7, #4] - 803aa4c: 68da ldr r2, [r3, #12] - 803aa4e: 693b ldr r3, [r7, #16] - 803aa50: 60da str r2, [r3, #12] - 803aa52: e005 b.n 803aa60 - 803aa54: 693b ldr r3, [r7, #16] - 803aa56: 68db ldr r3, [r3, #12] - 803aa58: 613b str r3, [r7, #16] - 803aa5a: 693b ldr r3, [r7, #16] - 803aa5c: 2b00 cmp r3, #0 - 803aa5e: d1ef bne.n 803aa40 - 803aa60: 687b ldr r3, [r7, #4] - 803aa62: 2200 movs r2, #0 - 803aa64: 60da str r2, [r3, #12] - 803aa66: 4b43 ldr r3, [pc, #268] ; (803ab74 ) - 803aa68: 2201 movs r2, #1 - 803aa6a: 701a strb r2, [r3, #0] + 803aa52: 4b59 ldr r3, [pc, #356] ; (803abb8 ) + 803aa54: 681b ldr r3, [r3, #0] + 803aa56: 687a ldr r2, [r7, #4] + 803aa58: 429a cmp r2, r3 + 803aa5a: d105 bne.n 803aa68 + 803aa5c: 4b56 ldr r3, [pc, #344] ; (803abb8 ) + 803aa5e: 681b ldr r3, [r3, #0] + 803aa60: 68db ldr r3, [r3, #12] + 803aa62: 4a55 ldr r2, [pc, #340] ; (803abb8 ) + 803aa64: 6013 str r3, [r2, #0] + 803aa66: e013 b.n 803aa90 + 803aa68: 4b53 ldr r3, [pc, #332] ; (803abb8 ) + 803aa6a: 681b ldr r3, [r3, #0] + 803aa6c: 613b str r3, [r7, #16] + 803aa6e: e00c b.n 803aa8a + 803aa70: 693b ldr r3, [r7, #16] + 803aa72: 68db ldr r3, [r3, #12] + 803aa74: 687a ldr r2, [r7, #4] + 803aa76: 429a cmp r2, r3 + 803aa78: d104 bne.n 803aa84 + 803aa7a: 687b ldr r3, [r7, #4] + 803aa7c: 68da ldr r2, [r3, #12] + 803aa7e: 693b ldr r3, [r7, #16] + 803aa80: 60da str r2, [r3, #12] + 803aa82: e005 b.n 803aa90 + 803aa84: 693b ldr r3, [r7, #16] + 803aa86: 68db ldr r3, [r3, #12] + 803aa88: 613b str r3, [r7, #16] + 803aa8a: 693b ldr r3, [r7, #16] + 803aa8c: 2b00 cmp r3, #0 + 803aa8e: d1ef bne.n 803aa70 + 803aa90: 687b ldr r3, [r7, #4] + 803aa92: 2200 movs r2, #0 + 803aa94: 60da str r2, [r3, #12] + 803aa96: 4b43 ldr r3, [pc, #268] ; (803aba4 ) + 803aa98: 2201 movs r2, #1 + 803aa9a: 701a strb r2, [r3, #0] pcb->state = TIME_WAIT; - 803aa6c: 687b ldr r3, [r7, #4] - 803aa6e: 220a movs r2, #10 - 803aa70: 751a strb r2, [r3, #20] + 803aa9c: 687b ldr r3, [r7, #4] + 803aa9e: 220a movs r2, #10 + 803aaa0: 751a strb r2, [r3, #20] TCP_REG(&tcp_tw_pcbs, pcb); - 803aa72: 4b41 ldr r3, [pc, #260] ; (803ab78 ) - 803aa74: 681a ldr r2, [r3, #0] - 803aa76: 687b ldr r3, [r7, #4] - 803aa78: 60da str r2, [r3, #12] - 803aa7a: 4a3f ldr r2, [pc, #252] ; (803ab78 ) - 803aa7c: 687b ldr r3, [r7, #4] - 803aa7e: 6013 str r3, [r2, #0] - 803aa80: f003 f8ea bl 803dc58 + 803aaa2: 4b41 ldr r3, [pc, #260] ; (803aba8 ) + 803aaa4: 681a ldr r2, [r3, #0] + 803aaa6: 687b ldr r3, [r7, #4] + 803aaa8: 60da str r2, [r3, #12] + 803aaaa: 4a3f ldr r2, [pc, #252] ; (803aba8 ) + 803aaac: 687b ldr r3, [r7, #4] + 803aaae: 6013 str r3, [r2, #0] + 803aab0: f003 f8ea bl 803dc88 } break; - 803aa84: e06c b.n 803ab60 + 803aab4: e06c b.n 803ab90 case CLOSING: tcp_receive(pcb); - 803aa86: 6878 ldr r0, [r7, #4] - 803aa88: f000 f984 bl 803ad94 + 803aab6: 6878 ldr r0, [r7, #4] + 803aab8: f000 f984 bl 803adc4 if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) { - 803aa8c: 4b3b ldr r3, [pc, #236] ; (803ab7c ) - 803aa8e: 781b ldrb r3, [r3, #0] - 803aa90: f003 0310 and.w r3, r3, #16 - 803aa94: 2b00 cmp r3, #0 - 803aa96: d065 beq.n 803ab64 - 803aa98: 687b ldr r3, [r7, #4] - 803aa9a: 6d1a ldr r2, [r3, #80] ; 0x50 - 803aa9c: 4b38 ldr r3, [pc, #224] ; (803ab80 ) - 803aa9e: 681b ldr r3, [r3, #0] - 803aaa0: 429a cmp r2, r3 - 803aaa2: d15f bne.n 803ab64 - 803aaa4: 687b ldr r3, [r7, #4] - 803aaa6: 6edb ldr r3, [r3, #108] ; 0x6c - 803aaa8: 2b00 cmp r3, #0 - 803aaaa: d15b bne.n 803ab64 + 803aabc: 4b3b ldr r3, [pc, #236] ; (803abac ) + 803aabe: 781b ldrb r3, [r3, #0] + 803aac0: f003 0310 and.w r3, r3, #16 + 803aac4: 2b00 cmp r3, #0 + 803aac6: d065 beq.n 803ab94 + 803aac8: 687b ldr r3, [r7, #4] + 803aaca: 6d1a ldr r2, [r3, #80] ; 0x50 + 803aacc: 4b38 ldr r3, [pc, #224] ; (803abb0 ) + 803aace: 681b ldr r3, [r3, #0] + 803aad0: 429a cmp r2, r3 + 803aad2: d15f bne.n 803ab94 + 803aad4: 687b ldr r3, [r7, #4] + 803aad6: 6edb ldr r3, [r3, #108] ; 0x6c + 803aad8: 2b00 cmp r3, #0 + 803aada: d15b bne.n 803ab94 LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); tcp_pcb_purge(pcb); - 803aaac: 6878 ldr r0, [r7, #4] - 803aaae: f7fe fcf1 bl 8039494 + 803aadc: 6878 ldr r0, [r7, #4] + 803aade: f7fe fcf1 bl 80394c4 TCP_RMV_ACTIVE(pcb); - 803aab2: 4b35 ldr r3, [pc, #212] ; (803ab88 ) - 803aab4: 681b ldr r3, [r3, #0] - 803aab6: 687a ldr r2, [r7, #4] - 803aab8: 429a cmp r2, r3 - 803aaba: d105 bne.n 803aac8 - 803aabc: 4b32 ldr r3, [pc, #200] ; (803ab88 ) - 803aabe: 681b ldr r3, [r3, #0] - 803aac0: 68db ldr r3, [r3, #12] - 803aac2: 4a31 ldr r2, [pc, #196] ; (803ab88 ) - 803aac4: 6013 str r3, [r2, #0] - 803aac6: e013 b.n 803aaf0 - 803aac8: 4b2f ldr r3, [pc, #188] ; (803ab88 ) - 803aaca: 681b ldr r3, [r3, #0] - 803aacc: 60fb str r3, [r7, #12] - 803aace: e00c b.n 803aaea - 803aad0: 68fb ldr r3, [r7, #12] - 803aad2: 68db ldr r3, [r3, #12] - 803aad4: 687a ldr r2, [r7, #4] - 803aad6: 429a cmp r2, r3 - 803aad8: d104 bne.n 803aae4 - 803aada: 687b ldr r3, [r7, #4] - 803aadc: 68da ldr r2, [r3, #12] - 803aade: 68fb ldr r3, [r7, #12] - 803aae0: 60da str r2, [r3, #12] - 803aae2: e005 b.n 803aaf0 - 803aae4: 68fb ldr r3, [r7, #12] - 803aae6: 68db ldr r3, [r3, #12] - 803aae8: 60fb str r3, [r7, #12] - 803aaea: 68fb ldr r3, [r7, #12] - 803aaec: 2b00 cmp r3, #0 - 803aaee: d1ef bne.n 803aad0 - 803aaf0: 687b ldr r3, [r7, #4] - 803aaf2: 2200 movs r2, #0 - 803aaf4: 60da str r2, [r3, #12] - 803aaf6: 4b1f ldr r3, [pc, #124] ; (803ab74 ) - 803aaf8: 2201 movs r2, #1 - 803aafa: 701a strb r2, [r3, #0] + 803aae2: 4b35 ldr r3, [pc, #212] ; (803abb8 ) + 803aae4: 681b ldr r3, [r3, #0] + 803aae6: 687a ldr r2, [r7, #4] + 803aae8: 429a cmp r2, r3 + 803aaea: d105 bne.n 803aaf8 + 803aaec: 4b32 ldr r3, [pc, #200] ; (803abb8 ) + 803aaee: 681b ldr r3, [r3, #0] + 803aaf0: 68db ldr r3, [r3, #12] + 803aaf2: 4a31 ldr r2, [pc, #196] ; (803abb8 ) + 803aaf4: 6013 str r3, [r2, #0] + 803aaf6: e013 b.n 803ab20 + 803aaf8: 4b2f ldr r3, [pc, #188] ; (803abb8 ) + 803aafa: 681b ldr r3, [r3, #0] + 803aafc: 60fb str r3, [r7, #12] + 803aafe: e00c b.n 803ab1a + 803ab00: 68fb ldr r3, [r7, #12] + 803ab02: 68db ldr r3, [r3, #12] + 803ab04: 687a ldr r2, [r7, #4] + 803ab06: 429a cmp r2, r3 + 803ab08: d104 bne.n 803ab14 + 803ab0a: 687b ldr r3, [r7, #4] + 803ab0c: 68da ldr r2, [r3, #12] + 803ab0e: 68fb ldr r3, [r7, #12] + 803ab10: 60da str r2, [r3, #12] + 803ab12: e005 b.n 803ab20 + 803ab14: 68fb ldr r3, [r7, #12] + 803ab16: 68db ldr r3, [r3, #12] + 803ab18: 60fb str r3, [r7, #12] + 803ab1a: 68fb ldr r3, [r7, #12] + 803ab1c: 2b00 cmp r3, #0 + 803ab1e: d1ef bne.n 803ab00 + 803ab20: 687b ldr r3, [r7, #4] + 803ab22: 2200 movs r2, #0 + 803ab24: 60da str r2, [r3, #12] + 803ab26: 4b1f ldr r3, [pc, #124] ; (803aba4 ) + 803ab28: 2201 movs r2, #1 + 803ab2a: 701a strb r2, [r3, #0] pcb->state = TIME_WAIT; - 803aafc: 687b ldr r3, [r7, #4] - 803aafe: 220a movs r2, #10 - 803ab00: 751a strb r2, [r3, #20] + 803ab2c: 687b ldr r3, [r7, #4] + 803ab2e: 220a movs r2, #10 + 803ab30: 751a strb r2, [r3, #20] TCP_REG(&tcp_tw_pcbs, pcb); - 803ab02: 4b1d ldr r3, [pc, #116] ; (803ab78 ) - 803ab04: 681a ldr r2, [r3, #0] - 803ab06: 687b ldr r3, [r7, #4] - 803ab08: 60da str r2, [r3, #12] - 803ab0a: 4a1b ldr r2, [pc, #108] ; (803ab78 ) - 803ab0c: 687b ldr r3, [r7, #4] - 803ab0e: 6013 str r3, [r2, #0] - 803ab10: f003 f8a2 bl 803dc58 + 803ab32: 4b1d ldr r3, [pc, #116] ; (803aba8 ) + 803ab34: 681a ldr r2, [r3, #0] + 803ab36: 687b ldr r3, [r7, #4] + 803ab38: 60da str r2, [r3, #12] + 803ab3a: 4a1b ldr r2, [pc, #108] ; (803aba8 ) + 803ab3c: 687b ldr r3, [r7, #4] + 803ab3e: 6013 str r3, [r2, #0] + 803ab40: f003 f8a2 bl 803dc88 } break; - 803ab14: e026 b.n 803ab64 + 803ab44: e026 b.n 803ab94 case LAST_ACK: tcp_receive(pcb); - 803ab16: 6878 ldr r0, [r7, #4] - 803ab18: f000 f93c bl 803ad94 + 803ab46: 6878 ldr r0, [r7, #4] + 803ab48: f000 f93c bl 803adc4 if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) { - 803ab1c: 4b17 ldr r3, [pc, #92] ; (803ab7c ) - 803ab1e: 781b ldrb r3, [r3, #0] - 803ab20: f003 0310 and.w r3, r3, #16 - 803ab24: 2b00 cmp r3, #0 - 803ab26: d01f beq.n 803ab68 - 803ab28: 687b ldr r3, [r7, #4] - 803ab2a: 6d1a ldr r2, [r3, #80] ; 0x50 - 803ab2c: 4b14 ldr r3, [pc, #80] ; (803ab80 ) - 803ab2e: 681b ldr r3, [r3, #0] - 803ab30: 429a cmp r2, r3 - 803ab32: d119 bne.n 803ab68 - 803ab34: 687b ldr r3, [r7, #4] - 803ab36: 6edb ldr r3, [r3, #108] ; 0x6c - 803ab38: 2b00 cmp r3, #0 - 803ab3a: d115 bne.n 803ab68 + 803ab4c: 4b17 ldr r3, [pc, #92] ; (803abac ) + 803ab4e: 781b ldrb r3, [r3, #0] + 803ab50: f003 0310 and.w r3, r3, #16 + 803ab54: 2b00 cmp r3, #0 + 803ab56: d01f beq.n 803ab98 + 803ab58: 687b ldr r3, [r7, #4] + 803ab5a: 6d1a ldr r2, [r3, #80] ; 0x50 + 803ab5c: 4b14 ldr r3, [pc, #80] ; (803abb0 ) + 803ab5e: 681b ldr r3, [r3, #0] + 803ab60: 429a cmp r2, r3 + 803ab62: d119 bne.n 803ab98 + 803ab64: 687b ldr r3, [r7, #4] + 803ab66: 6edb ldr r3, [r3, #108] ; 0x6c + 803ab68: 2b00 cmp r3, #0 + 803ab6a: d115 bne.n 803ab98 LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */ recv_flags |= TF_CLOSED; - 803ab3c: 4b11 ldr r3, [pc, #68] ; (803ab84 ) - 803ab3e: 781b ldrb r3, [r3, #0] - 803ab40: f043 0310 orr.w r3, r3, #16 - 803ab44: b2da uxtb r2, r3 - 803ab46: 4b0f ldr r3, [pc, #60] ; (803ab84 ) - 803ab48: 701a strb r2, [r3, #0] + 803ab6c: 4b11 ldr r3, [pc, #68] ; (803abb4 ) + 803ab6e: 781b ldrb r3, [r3, #0] + 803ab70: f043 0310 orr.w r3, r3, #16 + 803ab74: b2da uxtb r2, r3 + 803ab76: 4b0f ldr r3, [pc, #60] ; (803abb4 ) + 803ab78: 701a strb r2, [r3, #0] } break; - 803ab4a: e00d b.n 803ab68 + 803ab7a: e00d b.n 803ab98 default: break; - 803ab4c: bf00 nop - 803ab4e: e00c b.n 803ab6a + 803ab7c: bf00 nop + 803ab7e: e00c b.n 803ab9a break; - 803ab50: bf00 nop - 803ab52: e00a b.n 803ab6a + 803ab80: bf00 nop + 803ab82: e00a b.n 803ab9a break; - 803ab54: bf00 nop - 803ab56: e008 b.n 803ab6a + 803ab84: bf00 nop + 803ab86: e008 b.n 803ab9a break; - 803ab58: bf00 nop - 803ab5a: e006 b.n 803ab6a + 803ab88: bf00 nop + 803ab8a: e006 b.n 803ab9a break; - 803ab5c: bf00 nop - 803ab5e: e004 b.n 803ab6a + 803ab8c: bf00 nop + 803ab8e: e004 b.n 803ab9a break; - 803ab60: bf00 nop - 803ab62: e002 b.n 803ab6a + 803ab90: bf00 nop + 803ab92: e002 b.n 803ab9a break; - 803ab64: bf00 nop - 803ab66: e000 b.n 803ab6a + 803ab94: bf00 nop + 803ab96: e000 b.n 803ab9a break; - 803ab68: bf00 nop + 803ab98: bf00 nop } return ERR_OK; - 803ab6a: 2300 movs r3, #0 -} - 803ab6c: 4618 mov r0, r3 - 803ab6e: 3724 adds r7, #36 ; 0x24 - 803ab70: 46bd mov sp, r7 - 803ab72: bd90 pop {r4, r7, pc} - 803ab74: 2400e96c .word 0x2400e96c - 803ab78: 2400e968 .word 0x2400e968 - 803ab7c: 2400e99c .word 0x2400e99c - 803ab80: 2400e994 .word 0x2400e994 - 803ab84: 2400e99d .word 0x2400e99d - 803ab88: 2400e964 .word 0x2400e964 - -0803ab8c : + 803ab9a: 2300 movs r3, #0 +} + 803ab9c: 4618 mov r0, r3 + 803ab9e: 3724 adds r7, #36 ; 0x24 + 803aba0: 46bd mov sp, r7 + 803aba2: bd90 pop {r4, r7, pc} + 803aba4: 2400e96c .word 0x2400e96c + 803aba8: 2400e968 .word 0x2400e968 + 803abac: 2400e99c .word 0x2400e99c + 803abb0: 2400e994 .word 0x2400e994 + 803abb4: 2400e99d .word 0x2400e99d + 803abb8: 2400e964 .word 0x2400e964 + +0803abbc : * * Called from tcp_receive() */ static void tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next) { - 803ab8c: b590 push {r4, r7, lr} - 803ab8e: b085 sub sp, #20 - 803ab90: af00 add r7, sp, #0 - 803ab92: 6078 str r0, [r7, #4] - 803ab94: 6039 str r1, [r7, #0] + 803abbc: b590 push {r4, r7, lr} + 803abbe: b085 sub sp, #20 + 803abc0: af00 add r7, sp, #0 + 803abc2: 6078 str r0, [r7, #4] + 803abc4: 6039 str r1, [r7, #0] struct tcp_seg *old_seg; LWIP_ASSERT("tcp_oos_insert_segment: invalid cseg", cseg != NULL); - 803ab96: 687b ldr r3, [r7, #4] - 803ab98: 2b00 cmp r3, #0 - 803ab9a: d106 bne.n 803abaa - 803ab9c: 4b3b ldr r3, [pc, #236] ; (803ac8c ) - 803ab9e: f240 421f movw r2, #1055 ; 0x41f - 803aba2: 493b ldr r1, [pc, #236] ; (803ac90 ) - 803aba4: 483b ldr r0, [pc, #236] ; (803ac94 ) - 803aba6: f005 ff9b bl 8040ae0 + 803abc6: 687b ldr r3, [r7, #4] + 803abc8: 2b00 cmp r3, #0 + 803abca: d106 bne.n 803abda + 803abcc: 4b3b ldr r3, [pc, #236] ; (803acbc ) + 803abce: f240 421f movw r2, #1055 ; 0x41f + 803abd2: 493b ldr r1, [pc, #236] ; (803acc0 ) + 803abd4: 483b ldr r0, [pc, #236] ; (803acc4 ) + 803abd6: f005 ff9b bl 8040b10 if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { - 803abaa: 687b ldr r3, [r7, #4] - 803abac: 68db ldr r3, [r3, #12] - 803abae: 899b ldrh r3, [r3, #12] - 803abb0: b29b uxth r3, r3 - 803abb2: 4618 mov r0, r3 - 803abb4: f7fb f978 bl 8035ea8 - 803abb8: 4603 mov r3, r0 - 803abba: b2db uxtb r3, r3 - 803abbc: f003 0301 and.w r3, r3, #1 - 803abc0: 2b00 cmp r3, #0 - 803abc2: d028 beq.n 803ac16 + 803abda: 687b ldr r3, [r7, #4] + 803abdc: 68db ldr r3, [r3, #12] + 803abde: 899b ldrh r3, [r3, #12] + 803abe0: b29b uxth r3, r3 + 803abe2: 4618 mov r0, r3 + 803abe4: f7fb f978 bl 8035ed8 + 803abe8: 4603 mov r3, r0 + 803abea: b2db uxtb r3, r3 + 803abec: f003 0301 and.w r3, r3, #1 + 803abf0: 2b00 cmp r3, #0 + 803abf2: d028 beq.n 803ac46 /* received segment overlaps all following segments */ tcp_segs_free(next); - 803abc4: 6838 ldr r0, [r7, #0] - 803abc6: f7fe f9b9 bl 8038f3c + 803abf4: 6838 ldr r0, [r7, #0] + 803abf6: f7fe f9b9 bl 8038f6c next = NULL; - 803abca: 2300 movs r3, #0 - 803abcc: 603b str r3, [r7, #0] - 803abce: e056 b.n 803ac7e + 803abfa: 2300 movs r3, #0 + 803abfc: 603b str r3, [r7, #0] + 803abfe: e056 b.n 803acae oos queue may have segments with FIN flag */ while (next && TCP_SEQ_GEQ((seqno + cseg->len), (next->tcphdr->seqno + next->len))) { /* cseg with FIN already processed */ if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { - 803abd0: 683b ldr r3, [r7, #0] - 803abd2: 68db ldr r3, [r3, #12] - 803abd4: 899b ldrh r3, [r3, #12] - 803abd6: b29b uxth r3, r3 - 803abd8: 4618 mov r0, r3 - 803abda: f7fb f965 bl 8035ea8 - 803abde: 4603 mov r3, r0 - 803abe0: b2db uxtb r3, r3 - 803abe2: f003 0301 and.w r3, r3, #1 - 803abe6: 2b00 cmp r3, #0 - 803abe8: d00d beq.n 803ac06 + 803ac00: 683b ldr r3, [r7, #0] + 803ac02: 68db ldr r3, [r3, #12] + 803ac04: 899b ldrh r3, [r3, #12] + 803ac06: b29b uxth r3, r3 + 803ac08: 4618 mov r0, r3 + 803ac0a: f7fb f965 bl 8035ed8 + 803ac0e: 4603 mov r3, r0 + 803ac10: b2db uxtb r3, r3 + 803ac12: f003 0301 and.w r3, r3, #1 + 803ac16: 2b00 cmp r3, #0 + 803ac18: d00d beq.n 803ac36 TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN); - 803abea: 687b ldr r3, [r7, #4] - 803abec: 68db ldr r3, [r3, #12] - 803abee: 899b ldrh r3, [r3, #12] - 803abf0: b29c uxth r4, r3 - 803abf2: 2001 movs r0, #1 - 803abf4: f7fb f958 bl 8035ea8 - 803abf8: 4603 mov r3, r0 - 803abfa: 461a mov r2, r3 - 803abfc: 687b ldr r3, [r7, #4] - 803abfe: 68db ldr r3, [r3, #12] - 803ac00: 4322 orrs r2, r4 - 803ac02: b292 uxth r2, r2 - 803ac04: 819a strh r2, [r3, #12] + 803ac1a: 687b ldr r3, [r7, #4] + 803ac1c: 68db ldr r3, [r3, #12] + 803ac1e: 899b ldrh r3, [r3, #12] + 803ac20: b29c uxth r4, r3 + 803ac22: 2001 movs r0, #1 + 803ac24: f7fb f958 bl 8035ed8 + 803ac28: 4603 mov r3, r0 + 803ac2a: 461a mov r2, r3 + 803ac2c: 687b ldr r3, [r7, #4] + 803ac2e: 68db ldr r3, [r3, #12] + 803ac30: 4322 orrs r2, r4 + 803ac32: b292 uxth r2, r2 + 803ac34: 819a strh r2, [r3, #12] } old_seg = next; - 803ac06: 683b ldr r3, [r7, #0] - 803ac08: 60fb str r3, [r7, #12] + 803ac36: 683b ldr r3, [r7, #0] + 803ac38: 60fb str r3, [r7, #12] next = next->next; - 803ac0a: 683b ldr r3, [r7, #0] - 803ac0c: 681b ldr r3, [r3, #0] - 803ac0e: 603b str r3, [r7, #0] + 803ac3a: 683b ldr r3, [r7, #0] + 803ac3c: 681b ldr r3, [r3, #0] + 803ac3e: 603b str r3, [r7, #0] tcp_seg_free(old_seg); - 803ac10: 68f8 ldr r0, [r7, #12] - 803ac12: f7fe f9a8 bl 8038f66 + 803ac40: 68f8 ldr r0, [r7, #12] + 803ac42: f7fe f9a8 bl 8038f96 while (next && - 803ac16: 683b ldr r3, [r7, #0] - 803ac18: 2b00 cmp r3, #0 - 803ac1a: d00e beq.n 803ac3a + 803ac46: 683b ldr r3, [r7, #0] + 803ac48: 2b00 cmp r3, #0 + 803ac4a: d00e beq.n 803ac6a TCP_SEQ_GEQ((seqno + cseg->len), - 803ac1c: 687b ldr r3, [r7, #4] - 803ac1e: 891b ldrh r3, [r3, #8] - 803ac20: 461a mov r2, r3 - 803ac22: 4b1d ldr r3, [pc, #116] ; (803ac98 ) - 803ac24: 681b ldr r3, [r3, #0] - 803ac26: 441a add r2, r3 - 803ac28: 683b ldr r3, [r7, #0] - 803ac2a: 68db ldr r3, [r3, #12] - 803ac2c: 685b ldr r3, [r3, #4] - 803ac2e: 6839 ldr r1, [r7, #0] - 803ac30: 8909 ldrh r1, [r1, #8] - 803ac32: 440b add r3, r1 - 803ac34: 1ad3 subs r3, r2, r3 + 803ac4c: 687b ldr r3, [r7, #4] + 803ac4e: 891b ldrh r3, [r3, #8] + 803ac50: 461a mov r2, r3 + 803ac52: 4b1d ldr r3, [pc, #116] ; (803acc8 ) + 803ac54: 681b ldr r3, [r3, #0] + 803ac56: 441a add r2, r3 + 803ac58: 683b ldr r3, [r7, #0] + 803ac5a: 68db ldr r3, [r3, #12] + 803ac5c: 685b ldr r3, [r3, #4] + 803ac5e: 6839 ldr r1, [r7, #0] + 803ac60: 8909 ldrh r1, [r1, #8] + 803ac62: 440b add r3, r1 + 803ac64: 1ad3 subs r3, r2, r3 while (next && - 803ac36: 2b00 cmp r3, #0 - 803ac38: daca bge.n 803abd0 + 803ac66: 2b00 cmp r3, #0 + 803ac68: daca bge.n 803ac00 } if (next && - 803ac3a: 683b ldr r3, [r7, #0] - 803ac3c: 2b00 cmp r3, #0 - 803ac3e: d01e beq.n 803ac7e + 803ac6a: 683b ldr r3, [r7, #0] + 803ac6c: 2b00 cmp r3, #0 + 803ac6e: d01e beq.n 803acae TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) { - 803ac40: 687b ldr r3, [r7, #4] - 803ac42: 891b ldrh r3, [r3, #8] - 803ac44: 461a mov r2, r3 - 803ac46: 4b14 ldr r3, [pc, #80] ; (803ac98 ) - 803ac48: 681b ldr r3, [r3, #0] - 803ac4a: 441a add r2, r3 - 803ac4c: 683b ldr r3, [r7, #0] - 803ac4e: 68db ldr r3, [r3, #12] - 803ac50: 685b ldr r3, [r3, #4] - 803ac52: 1ad3 subs r3, r2, r3 + 803ac70: 687b ldr r3, [r7, #4] + 803ac72: 891b ldrh r3, [r3, #8] + 803ac74: 461a mov r2, r3 + 803ac76: 4b14 ldr r3, [pc, #80] ; (803acc8 ) + 803ac78: 681b ldr r3, [r3, #0] + 803ac7a: 441a add r2, r3 + 803ac7c: 683b ldr r3, [r7, #0] + 803ac7e: 68db ldr r3, [r3, #12] + 803ac80: 685b ldr r3, [r3, #4] + 803ac82: 1ad3 subs r3, r2, r3 if (next && - 803ac54: 2b00 cmp r3, #0 - 803ac56: dd12 ble.n 803ac7e + 803ac84: 2b00 cmp r3, #0 + 803ac86: dd12 ble.n 803acae /* We need to trim the incoming segment. */ cseg->len = (u16_t)(next->tcphdr->seqno - seqno); - 803ac58: 683b ldr r3, [r7, #0] - 803ac5a: 68db ldr r3, [r3, #12] - 803ac5c: 685b ldr r3, [r3, #4] - 803ac5e: b29a uxth r2, r3 - 803ac60: 4b0d ldr r3, [pc, #52] ; (803ac98 ) - 803ac62: 681b ldr r3, [r3, #0] - 803ac64: b29b uxth r3, r3 - 803ac66: 1ad3 subs r3, r2, r3 - 803ac68: b29a uxth r2, r3 - 803ac6a: 687b ldr r3, [r7, #4] - 803ac6c: 811a strh r2, [r3, #8] + 803ac88: 683b ldr r3, [r7, #0] + 803ac8a: 68db ldr r3, [r3, #12] + 803ac8c: 685b ldr r3, [r3, #4] + 803ac8e: b29a uxth r2, r3 + 803ac90: 4b0d ldr r3, [pc, #52] ; (803acc8 ) + 803ac92: 681b ldr r3, [r3, #0] + 803ac94: b29b uxth r3, r3 + 803ac96: 1ad3 subs r3, r2, r3 + 803ac98: b29a uxth r2, r3 + 803ac9a: 687b ldr r3, [r7, #4] + 803ac9c: 811a strh r2, [r3, #8] pbuf_realloc(cseg->p, cseg->len); - 803ac6e: 687b ldr r3, [r7, #4] - 803ac70: 685a ldr r2, [r3, #4] - 803ac72: 687b ldr r3, [r7, #4] - 803ac74: 891b ldrh r3, [r3, #8] - 803ac76: 4619 mov r1, r3 - 803ac78: 4610 mov r0, r2 - 803ac7a: f7fc fbc1 bl 8037400 + 803ac9e: 687b ldr r3, [r7, #4] + 803aca0: 685a ldr r2, [r3, #4] + 803aca2: 687b ldr r3, [r7, #4] + 803aca4: 891b ldrh r3, [r3, #8] + 803aca6: 4619 mov r1, r3 + 803aca8: 4610 mov r0, r2 + 803acaa: f7fc fbc1 bl 8037430 } } cseg->next = next; - 803ac7e: 687b ldr r3, [r7, #4] - 803ac80: 683a ldr r2, [r7, #0] - 803ac82: 601a str r2, [r3, #0] + 803acae: 687b ldr r3, [r7, #4] + 803acb0: 683a ldr r2, [r7, #0] + 803acb2: 601a str r2, [r3, #0] } - 803ac84: bf00 nop - 803ac86: 3714 adds r7, #20 - 803ac88: 46bd mov sp, r7 - 803ac8a: bd90 pop {r4, r7, pc} - 803ac8c: 080434d0 .word 0x080434d0 - 803ac90: 08043790 .word 0x08043790 - 803ac94: 0804351c .word 0x0804351c - 803ac98: 2400e990 .word 0x2400e990 + 803acb4: bf00 nop + 803acb6: 3714 adds r7, #20 + 803acb8: 46bd mov sp, r7 + 803acba: bd90 pop {r4, r7, pc} + 803acbc: 08043500 .word 0x08043500 + 803acc0: 080437c0 .word 0x080437c0 + 803acc4: 0804354c .word 0x0804354c + 803acc8: 2400e990 .word 0x2400e990 -0803ac9c : +0803accc : /** Remove segments from a list if the incoming ACK acknowledges them */ static struct tcp_seg * tcp_free_acked_segments(struct tcp_pcb *pcb, struct tcp_seg *seg_list, const char *dbg_list_name, struct tcp_seg *dbg_other_seg_list) { - 803ac9c: b5b0 push {r4, r5, r7, lr} - 803ac9e: b086 sub sp, #24 - 803aca0: af00 add r7, sp, #0 - 803aca2: 60f8 str r0, [r7, #12] - 803aca4: 60b9 str r1, [r7, #8] - 803aca6: 607a str r2, [r7, #4] - 803aca8: 603b str r3, [r7, #0] + 803accc: b5b0 push {r4, r5, r7, lr} + 803acce: b086 sub sp, #24 + 803acd0: af00 add r7, sp, #0 + 803acd2: 60f8 str r0, [r7, #12] + 803acd4: 60b9 str r1, [r7, #8] + 803acd6: 607a str r2, [r7, #4] + 803acd8: 603b str r3, [r7, #0] u16_t clen; LWIP_UNUSED_ARG(dbg_list_name); LWIP_UNUSED_ARG(dbg_other_seg_list); while (seg_list != NULL && - 803acaa: e03e b.n 803ad2a + 803acda: e03e b.n 803ad5a LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->%s\n", lwip_ntohl(seg_list->tcphdr->seqno), lwip_ntohl(seg_list->tcphdr->seqno) + TCP_TCPLEN(seg_list), dbg_list_name)); next = seg_list; - 803acac: 68bb ldr r3, [r7, #8] - 803acae: 617b str r3, [r7, #20] + 803acdc: 68bb ldr r3, [r7, #8] + 803acde: 617b str r3, [r7, #20] seg_list = seg_list->next; - 803acb0: 68bb ldr r3, [r7, #8] - 803acb2: 681b ldr r3, [r3, #0] - 803acb4: 60bb str r3, [r7, #8] + 803ace0: 68bb ldr r3, [r7, #8] + 803ace2: 681b ldr r3, [r3, #0] + 803ace4: 60bb str r3, [r7, #8] clen = pbuf_clen(next->p); - 803acb6: 697b ldr r3, [r7, #20] - 803acb8: 685b ldr r3, [r3, #4] - 803acba: 4618 mov r0, r3 - 803acbc: f7fc fdae bl 803781c - 803acc0: 4603 mov r3, r0 - 803acc2: 827b strh r3, [r7, #18] + 803ace6: 697b ldr r3, [r7, #20] + 803ace8: 685b ldr r3, [r3, #4] + 803acea: 4618 mov r0, r3 + 803acec: f7fc fdae bl 803784c + 803acf0: 4603 mov r3, r0 + 803acf2: 827b strh r3, [r7, #18] LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"TCPWNDSIZE_F" ... ", (tcpwnd_size_t)pcb->snd_queuelen)); LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= clen)); - 803acc4: 68fb ldr r3, [r7, #12] - 803acc6: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803acca: 8a7a ldrh r2, [r7, #18] - 803accc: 429a cmp r2, r3 - 803acce: d906 bls.n 803acde - 803acd0: 4b2a ldr r3, [pc, #168] ; (803ad7c ) - 803acd2: f240 4257 movw r2, #1111 ; 0x457 - 803acd6: 492a ldr r1, [pc, #168] ; (803ad80 ) - 803acd8: 482a ldr r0, [pc, #168] ; (803ad84 ) - 803acda: f005 ff01 bl 8040ae0 + 803acf4: 68fb ldr r3, [r7, #12] + 803acf6: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803acfa: 8a7a ldrh r2, [r7, #18] + 803acfc: 429a cmp r2, r3 + 803acfe: d906 bls.n 803ad0e + 803ad00: 4b2a ldr r3, [pc, #168] ; (803adac ) + 803ad02: f240 4257 movw r2, #1111 ; 0x457 + 803ad06: 492a ldr r1, [pc, #168] ; (803adb0 ) + 803ad08: 482a ldr r0, [pc, #168] ; (803adb4 ) + 803ad0a: f005 ff01 bl 8040b10 pcb->snd_queuelen = (u16_t)(pcb->snd_queuelen - clen); - 803acde: 68fb ldr r3, [r7, #12] - 803ace0: f8b3 2066 ldrh.w r2, [r3, #102] ; 0x66 - 803ace4: 8a7b ldrh r3, [r7, #18] - 803ace6: 1ad3 subs r3, r2, r3 - 803ace8: b29a uxth r2, r3 - 803acea: 68fb ldr r3, [r7, #12] - 803acec: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803ad0e: 68fb ldr r3, [r7, #12] + 803ad10: f8b3 2066 ldrh.w r2, [r3, #102] ; 0x66 + 803ad14: 8a7b ldrh r3, [r7, #18] + 803ad16: 1ad3 subs r3, r2, r3 + 803ad18: b29a uxth r2, r3 + 803ad1a: 68fb ldr r3, [r7, #12] + 803ad1c: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 recv_acked = (tcpwnd_size_t)(recv_acked + next->len); - 803acf0: 697b ldr r3, [r7, #20] - 803acf2: 891a ldrh r2, [r3, #8] - 803acf4: 4b24 ldr r3, [pc, #144] ; (803ad88 ) - 803acf6: 881b ldrh r3, [r3, #0] - 803acf8: 4413 add r3, r2 - 803acfa: b29a uxth r2, r3 - 803acfc: 4b22 ldr r3, [pc, #136] ; (803ad88 ) - 803acfe: 801a strh r2, [r3, #0] + 803ad20: 697b ldr r3, [r7, #20] + 803ad22: 891a ldrh r2, [r3, #8] + 803ad24: 4b24 ldr r3, [pc, #144] ; (803adb8 ) + 803ad26: 881b ldrh r3, [r3, #0] + 803ad28: 4413 add r3, r2 + 803ad2a: b29a uxth r2, r3 + 803ad2c: 4b22 ldr r3, [pc, #136] ; (803adb8 ) + 803ad2e: 801a strh r2, [r3, #0] tcp_seg_free(next); - 803ad00: 6978 ldr r0, [r7, #20] - 803ad02: f7fe f930 bl 8038f66 + 803ad30: 6978 ldr r0, [r7, #20] + 803ad32: f7fe f930 bl 8038f96 LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"TCPWNDSIZE_F" (after freeing %s)\n", (tcpwnd_size_t)pcb->snd_queuelen, dbg_list_name)); if (pcb->snd_queuelen != 0) { - 803ad06: 68fb ldr r3, [r7, #12] - 803ad08: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803ad0c: 2b00 cmp r3, #0 - 803ad0e: d00c beq.n 803ad2a + 803ad36: 68fb ldr r3, [r7, #12] + 803ad38: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803ad3c: 2b00 cmp r3, #0 + 803ad3e: d00c beq.n 803ad5a LWIP_ASSERT("tcp_receive: valid queue length", - 803ad10: 68bb ldr r3, [r7, #8] - 803ad12: 2b00 cmp r3, #0 - 803ad14: d109 bne.n 803ad2a - 803ad16: 683b ldr r3, [r7, #0] - 803ad18: 2b00 cmp r3, #0 - 803ad1a: d106 bne.n 803ad2a - 803ad1c: 4b17 ldr r3, [pc, #92] ; (803ad7c ) - 803ad1e: f240 4261 movw r2, #1121 ; 0x461 - 803ad22: 491a ldr r1, [pc, #104] ; (803ad8c ) - 803ad24: 4817 ldr r0, [pc, #92] ; (803ad84 ) - 803ad26: f005 fedb bl 8040ae0 + 803ad40: 68bb ldr r3, [r7, #8] + 803ad42: 2b00 cmp r3, #0 + 803ad44: d109 bne.n 803ad5a + 803ad46: 683b ldr r3, [r7, #0] + 803ad48: 2b00 cmp r3, #0 + 803ad4a: d106 bne.n 803ad5a + 803ad4c: 4b17 ldr r3, [pc, #92] ; (803adac ) + 803ad4e: f240 4261 movw r2, #1121 ; 0x461 + 803ad52: 491a ldr r1, [pc, #104] ; (803adbc ) + 803ad54: 4817 ldr r0, [pc, #92] ; (803adb4 ) + 803ad56: f005 fedb bl 8040b10 while (seg_list != NULL && - 803ad2a: 68bb ldr r3, [r7, #8] - 803ad2c: 2b00 cmp r3, #0 - 803ad2e: d020 beq.n 803ad72 + 803ad5a: 68bb ldr r3, [r7, #8] + 803ad5c: 2b00 cmp r3, #0 + 803ad5e: d020 beq.n 803ada2 TCP_SEQ_LEQ(lwip_ntohl(seg_list->tcphdr->seqno) + - 803ad30: 68bb ldr r3, [r7, #8] - 803ad32: 68db ldr r3, [r3, #12] - 803ad34: 685b ldr r3, [r3, #4] - 803ad36: 4618 mov r0, r3 - 803ad38: f7fb f8cb bl 8035ed2 - 803ad3c: 4604 mov r4, r0 - 803ad3e: 68bb ldr r3, [r7, #8] - 803ad40: 891b ldrh r3, [r3, #8] - 803ad42: 461d mov r5, r3 - 803ad44: 68bb ldr r3, [r7, #8] - 803ad46: 68db ldr r3, [r3, #12] - 803ad48: 899b ldrh r3, [r3, #12] - 803ad4a: b29b uxth r3, r3 - 803ad4c: 4618 mov r0, r3 - 803ad4e: f7fb f8ab bl 8035ea8 - 803ad52: 4603 mov r3, r0 - 803ad54: b2db uxtb r3, r3 - 803ad56: f003 0303 and.w r3, r3, #3 - 803ad5a: 2b00 cmp r3, #0 - 803ad5c: d001 beq.n 803ad62 - 803ad5e: 2301 movs r3, #1 - 803ad60: e000 b.n 803ad64 - 803ad62: 2300 movs r3, #0 - 803ad64: 442b add r3, r5 - 803ad66: 18e2 adds r2, r4, r3 - 803ad68: 4b09 ldr r3, [pc, #36] ; (803ad90 ) - 803ad6a: 681b ldr r3, [r3, #0] - 803ad6c: 1ad3 subs r3, r2, r3 + 803ad60: 68bb ldr r3, [r7, #8] + 803ad62: 68db ldr r3, [r3, #12] + 803ad64: 685b ldr r3, [r3, #4] + 803ad66: 4618 mov r0, r3 + 803ad68: f7fb f8cb bl 8035f02 + 803ad6c: 4604 mov r4, r0 + 803ad6e: 68bb ldr r3, [r7, #8] + 803ad70: 891b ldrh r3, [r3, #8] + 803ad72: 461d mov r5, r3 + 803ad74: 68bb ldr r3, [r7, #8] + 803ad76: 68db ldr r3, [r3, #12] + 803ad78: 899b ldrh r3, [r3, #12] + 803ad7a: b29b uxth r3, r3 + 803ad7c: 4618 mov r0, r3 + 803ad7e: f7fb f8ab bl 8035ed8 + 803ad82: 4603 mov r3, r0 + 803ad84: b2db uxtb r3, r3 + 803ad86: f003 0303 and.w r3, r3, #3 + 803ad8a: 2b00 cmp r3, #0 + 803ad8c: d001 beq.n 803ad92 + 803ad8e: 2301 movs r3, #1 + 803ad90: e000 b.n 803ad94 + 803ad92: 2300 movs r3, #0 + 803ad94: 442b add r3, r5 + 803ad96: 18e2 adds r2, r4, r3 + 803ad98: 4b09 ldr r3, [pc, #36] ; (803adc0 ) + 803ad9a: 681b ldr r3, [r3, #0] + 803ad9c: 1ad3 subs r3, r2, r3 while (seg_list != NULL && - 803ad6e: 2b00 cmp r3, #0 - 803ad70: dd9c ble.n 803acac + 803ad9e: 2b00 cmp r3, #0 + 803ada0: dd9c ble.n 803acdc seg_list != NULL || dbg_other_seg_list != NULL); } } return seg_list; - 803ad72: 68bb ldr r3, [r7, #8] -} - 803ad74: 4618 mov r0, r3 - 803ad76: 3718 adds r7, #24 - 803ad78: 46bd mov sp, r7 - 803ad7a: bdb0 pop {r4, r5, r7, pc} - 803ad7c: 080434d0 .word 0x080434d0 - 803ad80: 080437b8 .word 0x080437b8 - 803ad84: 0804351c .word 0x0804351c - 803ad88: 2400e998 .word 0x2400e998 - 803ad8c: 080437e0 .word 0x080437e0 - 803ad90: 2400e994 .word 0x2400e994 - -0803ad94 : + 803ada2: 68bb ldr r3, [r7, #8] +} + 803ada4: 4618 mov r0, r3 + 803ada6: 3718 adds r7, #24 + 803ada8: 46bd mov sp, r7 + 803adaa: bdb0 pop {r4, r5, r7, pc} + 803adac: 08043500 .word 0x08043500 + 803adb0: 080437e8 .word 0x080437e8 + 803adb4: 0804354c .word 0x0804354c + 803adb8: 2400e998 .word 0x2400e998 + 803adbc: 08043810 .word 0x08043810 + 803adc0: 2400e994 .word 0x2400e994 + +0803adc4 : * * Called from tcp_process(). */ static void tcp_receive(struct tcp_pcb *pcb) { - 803ad94: b5b0 push {r4, r5, r7, lr} - 803ad96: b094 sub sp, #80 ; 0x50 - 803ad98: af00 add r7, sp, #0 - 803ad9a: 6078 str r0, [r7, #4] + 803adc4: b5b0 push {r4, r5, r7, lr} + 803adc6: b094 sub sp, #80 ; 0x50 + 803adc8: af00 add r7, sp, #0 + 803adca: 6078 str r0, [r7, #4] s16_t m; u32_t right_wnd_edge; int found_dupack = 0; - 803ad9c: 2300 movs r3, #0 - 803ad9e: 64bb str r3, [r7, #72] ; 0x48 + 803adcc: 2300 movs r3, #0 + 803adce: 64bb str r3, [r7, #72] ; 0x48 LWIP_ASSERT("tcp_receive: invalid pcb", pcb != NULL); - 803ada0: 687b ldr r3, [r7, #4] - 803ada2: 2b00 cmp r3, #0 - 803ada4: d106 bne.n 803adb4 - 803ada6: 4b91 ldr r3, [pc, #580] ; (803afec ) - 803ada8: f240 427b movw r2, #1147 ; 0x47b - 803adac: 4990 ldr r1, [pc, #576] ; (803aff0 ) - 803adae: 4891 ldr r0, [pc, #580] ; (803aff4 ) - 803adb0: f005 fe96 bl 8040ae0 + 803add0: 687b ldr r3, [r7, #4] + 803add2: 2b00 cmp r3, #0 + 803add4: d106 bne.n 803ade4 + 803add6: 4b91 ldr r3, [pc, #580] ; (803b01c ) + 803add8: f240 427b movw r2, #1147 ; 0x47b + 803addc: 4990 ldr r1, [pc, #576] ; (803b020 ) + 803adde: 4891 ldr r0, [pc, #580] ; (803b024 ) + 803ade0: f005 fe96 bl 8040b10 LWIP_ASSERT("tcp_receive: wrong state", pcb->state >= ESTABLISHED); - 803adb4: 687b ldr r3, [r7, #4] - 803adb6: 7d1b ldrb r3, [r3, #20] - 803adb8: 2b03 cmp r3, #3 - 803adba: d806 bhi.n 803adca - 803adbc: 4b8b ldr r3, [pc, #556] ; (803afec ) - 803adbe: f240 427c movw r2, #1148 ; 0x47c - 803adc2: 498d ldr r1, [pc, #564] ; (803aff8 ) - 803adc4: 488b ldr r0, [pc, #556] ; (803aff4 ) - 803adc6: f005 fe8b bl 8040ae0 + 803ade4: 687b ldr r3, [r7, #4] + 803ade6: 7d1b ldrb r3, [r3, #20] + 803ade8: 2b03 cmp r3, #3 + 803adea: d806 bhi.n 803adfa + 803adec: 4b8b ldr r3, [pc, #556] ; (803b01c ) + 803adee: f240 427c movw r2, #1148 ; 0x47c + 803adf2: 498d ldr r1, [pc, #564] ; (803b028 ) + 803adf4: 488b ldr r0, [pc, #556] ; (803b024 ) + 803adf6: f005 fe8b bl 8040b10 if (flags & TCP_ACK) { - 803adca: 4b8c ldr r3, [pc, #560] ; (803affc ) - 803adcc: 781b ldrb r3, [r3, #0] - 803adce: f003 0310 and.w r3, r3, #16 - 803add2: 2b00 cmp r3, #0 - 803add4: f000 8264 beq.w 803b2a0 + 803adfa: 4b8c ldr r3, [pc, #560] ; (803b02c ) + 803adfc: 781b ldrb r3, [r3, #0] + 803adfe: f003 0310 and.w r3, r3, #16 + 803ae02: 2b00 cmp r3, #0 + 803ae04: f000 8264 beq.w 803b2d0 right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2; - 803add8: 687b ldr r3, [r7, #4] - 803adda: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803adde: 461a mov r2, r3 - 803ade0: 687b ldr r3, [r7, #4] - 803ade2: 6d9b ldr r3, [r3, #88] ; 0x58 - 803ade4: 4413 add r3, r2 - 803ade6: 633b str r3, [r7, #48] ; 0x30 + 803ae08: 687b ldr r3, [r7, #4] + 803ae0a: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803ae0e: 461a mov r2, r3 + 803ae10: 687b ldr r3, [r7, #4] + 803ae12: 6d9b ldr r3, [r3, #88] ; 0x58 + 803ae14: 4413 add r3, r2 + 803ae16: 633b str r3, [r7, #48] ; 0x30 /* Update window. */ if (TCP_SEQ_LT(pcb->snd_wl1, seqno) || - 803ade8: 687b ldr r3, [r7, #4] - 803adea: 6d5a ldr r2, [r3, #84] ; 0x54 - 803adec: 4b84 ldr r3, [pc, #528] ; (803b000 ) - 803adee: 681b ldr r3, [r3, #0] - 803adf0: 1ad3 subs r3, r2, r3 - 803adf2: 2b00 cmp r3, #0 - 803adf4: db1b blt.n 803ae2e + 803ae18: 687b ldr r3, [r7, #4] + 803ae1a: 6d5a ldr r2, [r3, #84] ; 0x54 + 803ae1c: 4b84 ldr r3, [pc, #528] ; (803b030 ) + 803ae1e: 681b ldr r3, [r3, #0] + 803ae20: 1ad3 subs r3, r2, r3 + 803ae22: 2b00 cmp r3, #0 + 803ae24: db1b blt.n 803ae5e (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || - 803adf6: 687b ldr r3, [r7, #4] - 803adf8: 6d5a ldr r2, [r3, #84] ; 0x54 - 803adfa: 4b81 ldr r3, [pc, #516] ; (803b000 ) - 803adfc: 681b ldr r3, [r3, #0] + 803ae26: 687b ldr r3, [r7, #4] + 803ae28: 6d5a ldr r2, [r3, #84] ; 0x54 + 803ae2a: 4b81 ldr r3, [pc, #516] ; (803b030 ) + 803ae2c: 681b ldr r3, [r3, #0] if (TCP_SEQ_LT(pcb->snd_wl1, seqno) || - 803adfe: 429a cmp r2, r3 - 803ae00: d106 bne.n 803ae10 + 803ae2e: 429a cmp r2, r3 + 803ae30: d106 bne.n 803ae40 (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || - 803ae02: 687b ldr r3, [r7, #4] - 803ae04: 6d9a ldr r2, [r3, #88] ; 0x58 - 803ae06: 4b7f ldr r3, [pc, #508] ; (803b004 ) - 803ae08: 681b ldr r3, [r3, #0] - 803ae0a: 1ad3 subs r3, r2, r3 - 803ae0c: 2b00 cmp r3, #0 - 803ae0e: db0e blt.n 803ae2e + 803ae32: 687b ldr r3, [r7, #4] + 803ae34: 6d9a ldr r2, [r3, #88] ; 0x58 + 803ae36: 4b7f ldr r3, [pc, #508] ; (803b034 ) + 803ae38: 681b ldr r3, [r3, #0] + 803ae3a: 1ad3 subs r3, r2, r3 + 803ae3c: 2b00 cmp r3, #0 + 803ae3e: db0e blt.n 803ae5e (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) { - 803ae10: 687b ldr r3, [r7, #4] - 803ae12: 6d9a ldr r2, [r3, #88] ; 0x58 - 803ae14: 4b7b ldr r3, [pc, #492] ; (803b004 ) - 803ae16: 681b ldr r3, [r3, #0] + 803ae40: 687b ldr r3, [r7, #4] + 803ae42: 6d9a ldr r2, [r3, #88] ; 0x58 + 803ae44: 4b7b ldr r3, [pc, #492] ; (803b034 ) + 803ae46: 681b ldr r3, [r3, #0] (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || - 803ae18: 429a cmp r2, r3 - 803ae1a: d125 bne.n 803ae68 + 803ae48: 429a cmp r2, r3 + 803ae4a: d125 bne.n 803ae98 (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) { - 803ae1c: 4b7a ldr r3, [pc, #488] ; (803b008 ) - 803ae1e: 681b ldr r3, [r3, #0] - 803ae20: 89db ldrh r3, [r3, #14] - 803ae22: b29a uxth r2, r3 - 803ae24: 687b ldr r3, [r7, #4] - 803ae26: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803ae2a: 429a cmp r2, r3 - 803ae2c: d91c bls.n 803ae68 + 803ae4c: 4b7a ldr r3, [pc, #488] ; (803b038 ) + 803ae4e: 681b ldr r3, [r3, #0] + 803ae50: 89db ldrh r3, [r3, #14] + 803ae52: b29a uxth r2, r3 + 803ae54: 687b ldr r3, [r7, #4] + 803ae56: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803ae5a: 429a cmp r2, r3 + 803ae5c: d91c bls.n 803ae98 pcb->snd_wnd = SND_WND_SCALE(pcb, tcphdr->wnd); - 803ae2e: 4b76 ldr r3, [pc, #472] ; (803b008 ) - 803ae30: 681b ldr r3, [r3, #0] - 803ae32: 89db ldrh r3, [r3, #14] - 803ae34: b29a uxth r2, r3 - 803ae36: 687b ldr r3, [r7, #4] - 803ae38: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 803ae5e: 4b76 ldr r3, [pc, #472] ; (803b038 ) + 803ae60: 681b ldr r3, [r3, #0] + 803ae62: 89db ldrh r3, [r3, #14] + 803ae64: b29a uxth r2, r3 + 803ae66: 687b ldr r3, [r7, #4] + 803ae68: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 /* keep track of the biggest window announced by the remote host to calculate the maximum segment size */ if (pcb->snd_wnd_max < pcb->snd_wnd) { - 803ae3c: 687b ldr r3, [r7, #4] - 803ae3e: f8b3 2062 ldrh.w r2, [r3, #98] ; 0x62 - 803ae42: 687b ldr r3, [r7, #4] - 803ae44: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803ae48: 429a cmp r2, r3 - 803ae4a: d205 bcs.n 803ae58 + 803ae6c: 687b ldr r3, [r7, #4] + 803ae6e: f8b3 2062 ldrh.w r2, [r3, #98] ; 0x62 + 803ae72: 687b ldr r3, [r7, #4] + 803ae74: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803ae78: 429a cmp r2, r3 + 803ae7a: d205 bcs.n 803ae88 pcb->snd_wnd_max = pcb->snd_wnd; - 803ae4c: 687b ldr r3, [r7, #4] - 803ae4e: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 803ae52: 687b ldr r3, [r7, #4] - 803ae54: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 + 803ae7c: 687b ldr r3, [r7, #4] + 803ae7e: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 803ae82: 687b ldr r3, [r7, #4] + 803ae84: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 } pcb->snd_wl1 = seqno; - 803ae58: 4b69 ldr r3, [pc, #420] ; (803b000 ) - 803ae5a: 681a ldr r2, [r3, #0] - 803ae5c: 687b ldr r3, [r7, #4] - 803ae5e: 655a str r2, [r3, #84] ; 0x54 + 803ae88: 4b69 ldr r3, [pc, #420] ; (803b030 ) + 803ae8a: 681a ldr r2, [r3, #0] + 803ae8c: 687b ldr r3, [r7, #4] + 803ae8e: 655a str r2, [r3, #84] ; 0x54 pcb->snd_wl2 = ackno; - 803ae60: 4b68 ldr r3, [pc, #416] ; (803b004 ) - 803ae62: 681a ldr r2, [r3, #0] - 803ae64: 687b ldr r3, [r7, #4] - 803ae66: 659a str r2, [r3, #88] ; 0x58 + 803ae90: 4b68 ldr r3, [pc, #416] ; (803b034 ) + 803ae92: 681a ldr r2, [r3, #0] + 803ae94: 687b ldr r3, [r7, #4] + 803ae96: 659a str r2, [r3, #88] ; 0x58 * If it only passes 1, should reset dupack counter * */ /* Clause 1 */ if (TCP_SEQ_LEQ(ackno, pcb->lastack)) { - 803ae68: 4b66 ldr r3, [pc, #408] ; (803b004 ) - 803ae6a: 681a ldr r2, [r3, #0] - 803ae6c: 687b ldr r3, [r7, #4] - 803ae6e: 6c5b ldr r3, [r3, #68] ; 0x44 - 803ae70: 1ad3 subs r3, r2, r3 - 803ae72: 2b00 cmp r3, #0 - 803ae74: dc58 bgt.n 803af28 + 803ae98: 4b66 ldr r3, [pc, #408] ; (803b034 ) + 803ae9a: 681a ldr r2, [r3, #0] + 803ae9c: 687b ldr r3, [r7, #4] + 803ae9e: 6c5b ldr r3, [r3, #68] ; 0x44 + 803aea0: 1ad3 subs r3, r2, r3 + 803aea2: 2b00 cmp r3, #0 + 803aea4: dc58 bgt.n 803af58 /* Clause 2 */ if (tcplen == 0) { - 803ae76: 4b65 ldr r3, [pc, #404] ; (803b00c ) - 803ae78: 881b ldrh r3, [r3, #0] - 803ae7a: 2b00 cmp r3, #0 - 803ae7c: d14b bne.n 803af16 + 803aea6: 4b65 ldr r3, [pc, #404] ; (803b03c ) + 803aea8: 881b ldrh r3, [r3, #0] + 803aeaa: 2b00 cmp r3, #0 + 803aeac: d14b bne.n 803af46 /* Clause 3 */ if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge) { - 803ae7e: 687b ldr r3, [r7, #4] - 803ae80: 6d9b ldr r3, [r3, #88] ; 0x58 - 803ae82: 687a ldr r2, [r7, #4] - 803ae84: f8b2 2060 ldrh.w r2, [r2, #96] ; 0x60 - 803ae88: 4413 add r3, r2 - 803ae8a: 6b3a ldr r2, [r7, #48] ; 0x30 - 803ae8c: 429a cmp r2, r3 - 803ae8e: d142 bne.n 803af16 + 803aeae: 687b ldr r3, [r7, #4] + 803aeb0: 6d9b ldr r3, [r3, #88] ; 0x58 + 803aeb2: 687a ldr r2, [r7, #4] + 803aeb4: f8b2 2060 ldrh.w r2, [r2, #96] ; 0x60 + 803aeb8: 4413 add r3, r2 + 803aeba: 6b3a ldr r2, [r7, #48] ; 0x30 + 803aebc: 429a cmp r2, r3 + 803aebe: d142 bne.n 803af46 /* Clause 4 */ if (pcb->rtime >= 0) { - 803ae90: 687b ldr r3, [r7, #4] - 803ae92: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 803ae96: 2b00 cmp r3, #0 - 803ae98: db3d blt.n 803af16 + 803aec0: 687b ldr r3, [r7, #4] + 803aec2: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 803aec6: 2b00 cmp r3, #0 + 803aec8: db3d blt.n 803af46 /* Clause 5 */ if (pcb->lastack == ackno) { - 803ae9a: 687b ldr r3, [r7, #4] - 803ae9c: 6c5a ldr r2, [r3, #68] ; 0x44 - 803ae9e: 4b59 ldr r3, [pc, #356] ; (803b004 ) - 803aea0: 681b ldr r3, [r3, #0] - 803aea2: 429a cmp r2, r3 - 803aea4: d137 bne.n 803af16 + 803aeca: 687b ldr r3, [r7, #4] + 803aecc: 6c5a ldr r2, [r3, #68] ; 0x44 + 803aece: 4b59 ldr r3, [pc, #356] ; (803b034 ) + 803aed0: 681b ldr r3, [r3, #0] + 803aed2: 429a cmp r2, r3 + 803aed4: d137 bne.n 803af46 found_dupack = 1; - 803aea6: 2301 movs r3, #1 - 803aea8: 64bb str r3, [r7, #72] ; 0x48 + 803aed6: 2301 movs r3, #1 + 803aed8: 64bb str r3, [r7, #72] ; 0x48 if ((u8_t)(pcb->dupacks + 1) > pcb->dupacks) { - 803aeaa: 687b ldr r3, [r7, #4] - 803aeac: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 - 803aeb0: 2bff cmp r3, #255 ; 0xff - 803aeb2: d007 beq.n 803aec4 + 803aeda: 687b ldr r3, [r7, #4] + 803aedc: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 + 803aee0: 2bff cmp r3, #255 ; 0xff + 803aee2: d007 beq.n 803aef4 ++pcb->dupacks; - 803aeb4: 687b ldr r3, [r7, #4] - 803aeb6: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 - 803aeba: 3301 adds r3, #1 - 803aebc: b2da uxtb r2, r3 - 803aebe: 687b ldr r3, [r7, #4] - 803aec0: f883 2043 strb.w r2, [r3, #67] ; 0x43 + 803aee4: 687b ldr r3, [r7, #4] + 803aee6: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 + 803aeea: 3301 adds r3, #1 + 803aeec: b2da uxtb r2, r3 + 803aeee: 687b ldr r3, [r7, #4] + 803aef0: f883 2043 strb.w r2, [r3, #67] ; 0x43 } if (pcb->dupacks > 3) { - 803aec4: 687b ldr r3, [r7, #4] - 803aec6: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 - 803aeca: 2b03 cmp r3, #3 - 803aecc: d91b bls.n 803af06 + 803aef4: 687b ldr r3, [r7, #4] + 803aef6: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 + 803aefa: 2b03 cmp r3, #3 + 803aefc: d91b bls.n 803af36 /* Inflate the congestion window */ TCP_WND_INC(pcb->cwnd, pcb->mss); - 803aece: 687b ldr r3, [r7, #4] - 803aed0: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803aed4: 687b ldr r3, [r7, #4] - 803aed6: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803aed8: 4413 add r3, r2 - 803aeda: b29a uxth r2, r3 - 803aedc: 687b ldr r3, [r7, #4] - 803aede: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803aee2: 429a cmp r2, r3 - 803aee4: d30a bcc.n 803aefc - 803aee6: 687b ldr r3, [r7, #4] - 803aee8: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803aeec: 687b ldr r3, [r7, #4] - 803aeee: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803aef0: 4413 add r3, r2 - 803aef2: b29a uxth r2, r3 - 803aef4: 687b ldr r3, [r7, #4] - 803aef6: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 - 803aefa: e004 b.n 803af06 - 803aefc: 687b ldr r3, [r7, #4] - 803aefe: f64f 72ff movw r2, #65535 ; 0xffff - 803af02: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803aefe: 687b ldr r3, [r7, #4] + 803af00: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803af04: 687b ldr r3, [r7, #4] + 803af06: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803af08: 4413 add r3, r2 + 803af0a: b29a uxth r2, r3 + 803af0c: 687b ldr r3, [r7, #4] + 803af0e: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803af12: 429a cmp r2, r3 + 803af14: d30a bcc.n 803af2c + 803af16: 687b ldr r3, [r7, #4] + 803af18: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803af1c: 687b ldr r3, [r7, #4] + 803af1e: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803af20: 4413 add r3, r2 + 803af22: b29a uxth r2, r3 + 803af24: 687b ldr r3, [r7, #4] + 803af26: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803af2a: e004 b.n 803af36 + 803af2c: 687b ldr r3, [r7, #4] + 803af2e: f64f 72ff movw r2, #65535 ; 0xffff + 803af32: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 } if (pcb->dupacks >= 3) { - 803af06: 687b ldr r3, [r7, #4] - 803af08: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 - 803af0c: 2b02 cmp r3, #2 - 803af0e: d902 bls.n 803af16 + 803af36: 687b ldr r3, [r7, #4] + 803af38: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 + 803af3c: 2b02 cmp r3, #2 + 803af3e: d902 bls.n 803af46 /* Do fast retransmit (checked via TF_INFR, not via dupacks count) */ tcp_rexmit_fast(pcb); - 803af10: 6878 ldr r0, [r7, #4] - 803af12: f002 fb43 bl 803d59c + 803af40: 6878 ldr r0, [r7, #4] + 803af42: f002 fb43 bl 803d5cc } } } /* If Clause (1) or more is true, but not a duplicate ack, reset * count of consecutive duplicate acks */ if (!found_dupack) { - 803af16: 6cbb ldr r3, [r7, #72] ; 0x48 - 803af18: 2b00 cmp r3, #0 - 803af1a: f040 8161 bne.w 803b1e0 + 803af46: 6cbb ldr r3, [r7, #72] ; 0x48 + 803af48: 2b00 cmp r3, #0 + 803af4a: f040 8161 bne.w 803b210 pcb->dupacks = 0; - 803af1e: 687b ldr r3, [r7, #4] - 803af20: 2200 movs r2, #0 - 803af22: f883 2043 strb.w r2, [r3, #67] ; 0x43 - 803af26: e15b b.n 803b1e0 + 803af4e: 687b ldr r3, [r7, #4] + 803af50: 2200 movs r2, #0 + 803af52: f883 2043 strb.w r2, [r3, #67] ; 0x43 + 803af56: e15b b.n 803b210 } } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803af28: 4b36 ldr r3, [pc, #216] ; (803b004 ) - 803af2a: 681a ldr r2, [r3, #0] - 803af2c: 687b ldr r3, [r7, #4] - 803af2e: 6c5b ldr r3, [r3, #68] ; 0x44 - 803af30: 1ad3 subs r3, r2, r3 - 803af32: 3b01 subs r3, #1 - 803af34: 2b00 cmp r3, #0 - 803af36: f2c0 814e blt.w 803b1d6 - 803af3a: 4b32 ldr r3, [pc, #200] ; (803b004 ) - 803af3c: 681a ldr r2, [r3, #0] - 803af3e: 687b ldr r3, [r7, #4] - 803af40: 6d1b ldr r3, [r3, #80] ; 0x50 - 803af42: 1ad3 subs r3, r2, r3 - 803af44: 2b00 cmp r3, #0 - 803af46: f300 8146 bgt.w 803b1d6 + 803af58: 4b36 ldr r3, [pc, #216] ; (803b034 ) + 803af5a: 681a ldr r2, [r3, #0] + 803af5c: 687b ldr r3, [r7, #4] + 803af5e: 6c5b ldr r3, [r3, #68] ; 0x44 + 803af60: 1ad3 subs r3, r2, r3 + 803af62: 3b01 subs r3, #1 + 803af64: 2b00 cmp r3, #0 + 803af66: f2c0 814e blt.w 803b206 + 803af6a: 4b32 ldr r3, [pc, #200] ; (803b034 ) + 803af6c: 681a ldr r2, [r3, #0] + 803af6e: 687b ldr r3, [r7, #4] + 803af70: 6d1b ldr r3, [r3, #80] ; 0x50 + 803af72: 1ad3 subs r3, r2, r3 + 803af74: 2b00 cmp r3, #0 + 803af76: f300 8146 bgt.w 803b206 tcpwnd_size_t acked; /* Reset the "IN Fast Retransmit" flag, since we are no longer in fast retransmit. Also reset the congestion window to the slow start threshold. */ if (pcb->flags & TF_INFR) { - 803af4a: 687b ldr r3, [r7, #4] - 803af4c: 8b5b ldrh r3, [r3, #26] - 803af4e: f003 0304 and.w r3, r3, #4 - 803af52: 2b00 cmp r3, #0 - 803af54: d010 beq.n 803af78 + 803af7a: 687b ldr r3, [r7, #4] + 803af7c: 8b5b ldrh r3, [r3, #26] + 803af7e: f003 0304 and.w r3, r3, #4 + 803af82: 2b00 cmp r3, #0 + 803af84: d010 beq.n 803afa8 tcp_clear_flags(pcb, TF_INFR); - 803af56: 687b ldr r3, [r7, #4] - 803af58: 8b5b ldrh r3, [r3, #26] - 803af5a: f023 0304 bic.w r3, r3, #4 - 803af5e: b29a uxth r2, r3 - 803af60: 687b ldr r3, [r7, #4] - 803af62: 835a strh r2, [r3, #26] + 803af86: 687b ldr r3, [r7, #4] + 803af88: 8b5b ldrh r3, [r3, #26] + 803af8a: f023 0304 bic.w r3, r3, #4 + 803af8e: b29a uxth r2, r3 + 803af90: 687b ldr r3, [r7, #4] + 803af92: 835a strh r2, [r3, #26] pcb->cwnd = pcb->ssthresh; - 803af64: 687b ldr r3, [r7, #4] - 803af66: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a - 803af6a: 687b ldr r3, [r7, #4] - 803af6c: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803af94: 687b ldr r3, [r7, #4] + 803af96: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a + 803af9a: 687b ldr r3, [r7, #4] + 803af9c: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 pcb->bytes_acked = 0; - 803af70: 687b ldr r3, [r7, #4] - 803af72: 2200 movs r2, #0 - 803af74: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803afa0: 687b ldr r3, [r7, #4] + 803afa2: 2200 movs r2, #0 + 803afa4: f8a3 206a strh.w r2, [r3, #106] ; 0x6a } /* Reset the number of retransmissions. */ pcb->nrtx = 0; - 803af78: 687b ldr r3, [r7, #4] - 803af7a: 2200 movs r2, #0 - 803af7c: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 803afa8: 687b ldr r3, [r7, #4] + 803afaa: 2200 movs r2, #0 + 803afac: f883 2042 strb.w r2, [r3, #66] ; 0x42 /* Reset the retransmission time-out. */ pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv); - 803af80: 687b ldr r3, [r7, #4] - 803af82: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 803af86: 10db asrs r3, r3, #3 - 803af88: b21b sxth r3, r3 - 803af8a: b29a uxth r2, r3 - 803af8c: 687b ldr r3, [r7, #4] - 803af8e: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 803af92: b29b uxth r3, r3 - 803af94: 4413 add r3, r2 - 803af96: b29b uxth r3, r3 - 803af98: b21a sxth r2, r3 - 803af9a: 687b ldr r3, [r7, #4] - 803af9c: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 + 803afb0: 687b ldr r3, [r7, #4] + 803afb2: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 803afb6: 10db asrs r3, r3, #3 + 803afb8: b21b sxth r3, r3 + 803afba: b29a uxth r2, r3 + 803afbc: 687b ldr r3, [r7, #4] + 803afbe: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 803afc2: b29b uxth r3, r3 + 803afc4: 4413 add r3, r2 + 803afc6: b29b uxth r3, r3 + 803afc8: b21a sxth r2, r3 + 803afca: 687b ldr r3, [r7, #4] + 803afcc: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 /* Record how much data this ACK acks */ acked = (tcpwnd_size_t)(ackno - pcb->lastack); - 803afa0: 4b18 ldr r3, [pc, #96] ; (803b004 ) - 803afa2: 681b ldr r3, [r3, #0] - 803afa4: b29a uxth r2, r3 - 803afa6: 687b ldr r3, [r7, #4] - 803afa8: 6c5b ldr r3, [r3, #68] ; 0x44 - 803afaa: b29b uxth r3, r3 - 803afac: 1ad3 subs r3, r2, r3 - 803afae: 85fb strh r3, [r7, #46] ; 0x2e + 803afd0: 4b18 ldr r3, [pc, #96] ; (803b034 ) + 803afd2: 681b ldr r3, [r3, #0] + 803afd4: b29a uxth r2, r3 + 803afd6: 687b ldr r3, [r7, #4] + 803afd8: 6c5b ldr r3, [r3, #68] ; 0x44 + 803afda: b29b uxth r3, r3 + 803afdc: 1ad3 subs r3, r2, r3 + 803afde: 85fb strh r3, [r7, #46] ; 0x2e /* Reset the fast retransmit variables. */ pcb->dupacks = 0; - 803afb0: 687b ldr r3, [r7, #4] - 803afb2: 2200 movs r2, #0 - 803afb4: f883 2043 strb.w r2, [r3, #67] ; 0x43 + 803afe0: 687b ldr r3, [r7, #4] + 803afe2: 2200 movs r2, #0 + 803afe4: f883 2043 strb.w r2, [r3, #67] ; 0x43 pcb->lastack = ackno; - 803afb8: 4b12 ldr r3, [pc, #72] ; (803b004 ) - 803afba: 681a ldr r2, [r3, #0] - 803afbc: 687b ldr r3, [r7, #4] - 803afbe: 645a str r2, [r3, #68] ; 0x44 + 803afe8: 4b12 ldr r3, [pc, #72] ; (803b034 ) + 803afea: 681a ldr r2, [r3, #0] + 803afec: 687b ldr r3, [r7, #4] + 803afee: 645a str r2, [r3, #68] ; 0x44 /* Update the congestion control variables (cwnd and ssthresh). */ if (pcb->state >= ESTABLISHED) { - 803afc0: 687b ldr r3, [r7, #4] - 803afc2: 7d1b ldrb r3, [r3, #20] - 803afc4: 2b03 cmp r3, #3 - 803afc6: f240 8097 bls.w 803b0f8 + 803aff0: 687b ldr r3, [r7, #4] + 803aff2: 7d1b ldrb r3, [r3, #20] + 803aff4: 2b03 cmp r3, #3 + 803aff6: f240 8097 bls.w 803b128 if (pcb->cwnd < pcb->ssthresh) { - 803afca: 687b ldr r3, [r7, #4] - 803afcc: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803afd0: 687b ldr r3, [r7, #4] - 803afd2: f8b3 304a ldrh.w r3, [r3, #74] ; 0x4a - 803afd6: 429a cmp r2, r3 - 803afd8: d245 bcs.n 803b066 + 803affa: 687b ldr r3, [r7, #4] + 803affc: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b000: 687b ldr r3, [r7, #4] + 803b002: f8b3 304a ldrh.w r3, [r3, #74] ; 0x4a + 803b006: 429a cmp r2, r3 + 803b008: d245 bcs.n 803b096 tcpwnd_size_t increase; /* limit to 1 SMSS segment during period following RTO */ u8_t num_seg = (pcb->flags & TF_RTO) ? 1 : 2; - 803afda: 687b ldr r3, [r7, #4] - 803afdc: 8b5b ldrh r3, [r3, #26] - 803afde: f403 6300 and.w r3, r3, #2048 ; 0x800 - 803afe2: 2b00 cmp r3, #0 - 803afe4: d014 beq.n 803b010 - 803afe6: 2301 movs r3, #1 - 803afe8: e013 b.n 803b012 - 803afea: bf00 nop - 803afec: 080434d0 .word 0x080434d0 - 803aff0: 08043800 .word 0x08043800 - 803aff4: 0804351c .word 0x0804351c - 803aff8: 0804381c .word 0x0804381c - 803affc: 2400e99c .word 0x2400e99c - 803b000: 2400e990 .word 0x2400e990 - 803b004: 2400e994 .word 0x2400e994 - 803b008: 2400e980 .word 0x2400e980 - 803b00c: 2400e99a .word 0x2400e99a - 803b010: 2302 movs r3, #2 - 803b012: f887 302d strb.w r3, [r7, #45] ; 0x2d + 803b00a: 687b ldr r3, [r7, #4] + 803b00c: 8b5b ldrh r3, [r3, #26] + 803b00e: f403 6300 and.w r3, r3, #2048 ; 0x800 + 803b012: 2b00 cmp r3, #0 + 803b014: d014 beq.n 803b040 + 803b016: 2301 movs r3, #1 + 803b018: e013 b.n 803b042 + 803b01a: bf00 nop + 803b01c: 08043500 .word 0x08043500 + 803b020: 08043830 .word 0x08043830 + 803b024: 0804354c .word 0x0804354c + 803b028: 0804384c .word 0x0804384c + 803b02c: 2400e99c .word 0x2400e99c + 803b030: 2400e990 .word 0x2400e990 + 803b034: 2400e994 .word 0x2400e994 + 803b038: 2400e980 .word 0x2400e980 + 803b03c: 2400e99a .word 0x2400e99a + 803b040: 2302 movs r3, #2 + 803b042: f887 302d strb.w r3, [r7, #45] ; 0x2d /* RFC 3465, section 2.2 Slow Start */ increase = LWIP_MIN(acked, (tcpwnd_size_t)(num_seg * pcb->mss)); - 803b016: f897 302d ldrb.w r3, [r7, #45] ; 0x2d - 803b01a: b29a uxth r2, r3 - 803b01c: 687b ldr r3, [r7, #4] - 803b01e: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803b020: fb12 f303 smulbb r3, r2, r3 - 803b024: b29b uxth r3, r3 - 803b026: 8dfa ldrh r2, [r7, #46] ; 0x2e - 803b028: 4293 cmp r3, r2 - 803b02a: bf28 it cs - 803b02c: 4613 movcs r3, r2 - 803b02e: 857b strh r3, [r7, #42] ; 0x2a + 803b046: f897 302d ldrb.w r3, [r7, #45] ; 0x2d + 803b04a: b29a uxth r2, r3 + 803b04c: 687b ldr r3, [r7, #4] + 803b04e: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803b050: fb12 f303 smulbb r3, r2, r3 + 803b054: b29b uxth r3, r3 + 803b056: 8dfa ldrh r2, [r7, #46] ; 0x2e + 803b058: 4293 cmp r3, r2 + 803b05a: bf28 it cs + 803b05c: 4613 movcs r3, r2 + 803b05e: 857b strh r3, [r7, #42] ; 0x2a TCP_WND_INC(pcb->cwnd, increase); - 803b030: 687b ldr r3, [r7, #4] - 803b032: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803b036: 8d7b ldrh r3, [r7, #42] ; 0x2a - 803b038: 4413 add r3, r2 - 803b03a: b29a uxth r2, r3 - 803b03c: 687b ldr r3, [r7, #4] - 803b03e: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803b042: 429a cmp r2, r3 - 803b044: d309 bcc.n 803b05a - 803b046: 687b ldr r3, [r7, #4] - 803b048: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803b04c: 8d7b ldrh r3, [r7, #42] ; 0x2a - 803b04e: 4413 add r3, r2 - 803b050: b29a uxth r2, r3 - 803b052: 687b ldr r3, [r7, #4] - 803b054: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 - 803b058: e04e b.n 803b0f8 - 803b05a: 687b ldr r3, [r7, #4] - 803b05c: f64f 72ff movw r2, #65535 ; 0xffff - 803b060: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 - 803b064: e048 b.n 803b0f8 + 803b060: 687b ldr r3, [r7, #4] + 803b062: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b066: 8d7b ldrh r3, [r7, #42] ; 0x2a + 803b068: 4413 add r3, r2 + 803b06a: b29a uxth r2, r3 + 803b06c: 687b ldr r3, [r7, #4] + 803b06e: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803b072: 429a cmp r2, r3 + 803b074: d309 bcc.n 803b08a + 803b076: 687b ldr r3, [r7, #4] + 803b078: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b07c: 8d7b ldrh r3, [r7, #42] ; 0x2a + 803b07e: 4413 add r3, r2 + 803b080: b29a uxth r2, r3 + 803b082: 687b ldr r3, [r7, #4] + 803b084: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803b088: e04e b.n 803b128 + 803b08a: 687b ldr r3, [r7, #4] + 803b08c: f64f 72ff movw r2, #65535 ; 0xffff + 803b090: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803b094: e048 b.n 803b128 LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"TCPWNDSIZE_F"\n", pcb->cwnd)); } else { /* RFC 3465, section 2.1 Congestion Avoidance */ TCP_WND_INC(pcb->bytes_acked, acked); - 803b066: 687b ldr r3, [r7, #4] - 803b068: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a - 803b06c: 8dfb ldrh r3, [r7, #46] ; 0x2e - 803b06e: 4413 add r3, r2 - 803b070: b29a uxth r2, r3 - 803b072: 687b ldr r3, [r7, #4] - 803b074: f8b3 306a ldrh.w r3, [r3, #106] ; 0x6a - 803b078: 429a cmp r2, r3 - 803b07a: d309 bcc.n 803b090 - 803b07c: 687b ldr r3, [r7, #4] - 803b07e: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a - 803b082: 8dfb ldrh r3, [r7, #46] ; 0x2e - 803b084: 4413 add r3, r2 - 803b086: b29a uxth r2, r3 - 803b088: 687b ldr r3, [r7, #4] - 803b08a: f8a3 206a strh.w r2, [r3, #106] ; 0x6a - 803b08e: e004 b.n 803b09a - 803b090: 687b ldr r3, [r7, #4] - 803b092: f64f 72ff movw r2, #65535 ; 0xffff - 803b096: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803b096: 687b ldr r3, [r7, #4] + 803b098: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a + 803b09c: 8dfb ldrh r3, [r7, #46] ; 0x2e + 803b09e: 4413 add r3, r2 + 803b0a0: b29a uxth r2, r3 + 803b0a2: 687b ldr r3, [r7, #4] + 803b0a4: f8b3 306a ldrh.w r3, [r3, #106] ; 0x6a + 803b0a8: 429a cmp r2, r3 + 803b0aa: d309 bcc.n 803b0c0 + 803b0ac: 687b ldr r3, [r7, #4] + 803b0ae: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a + 803b0b2: 8dfb ldrh r3, [r7, #46] ; 0x2e + 803b0b4: 4413 add r3, r2 + 803b0b6: b29a uxth r2, r3 + 803b0b8: 687b ldr r3, [r7, #4] + 803b0ba: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803b0be: e004 b.n 803b0ca + 803b0c0: 687b ldr r3, [r7, #4] + 803b0c2: f64f 72ff movw r2, #65535 ; 0xffff + 803b0c6: f8a3 206a strh.w r2, [r3, #106] ; 0x6a if (pcb->bytes_acked >= pcb->cwnd) { - 803b09a: 687b ldr r3, [r7, #4] - 803b09c: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a - 803b0a0: 687b ldr r3, [r7, #4] - 803b0a2: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803b0a6: 429a cmp r2, r3 - 803b0a8: d326 bcc.n 803b0f8 + 803b0ca: 687b ldr r3, [r7, #4] + 803b0cc: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a + 803b0d0: 687b ldr r3, [r7, #4] + 803b0d2: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803b0d6: 429a cmp r2, r3 + 803b0d8: d326 bcc.n 803b128 pcb->bytes_acked = (tcpwnd_size_t)(pcb->bytes_acked - pcb->cwnd); - 803b0aa: 687b ldr r3, [r7, #4] - 803b0ac: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a - 803b0b0: 687b ldr r3, [r7, #4] - 803b0b2: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803b0b6: 1ad3 subs r3, r2, r3 - 803b0b8: b29a uxth r2, r3 - 803b0ba: 687b ldr r3, [r7, #4] - 803b0bc: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803b0da: 687b ldr r3, [r7, #4] + 803b0dc: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a + 803b0e0: 687b ldr r3, [r7, #4] + 803b0e2: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803b0e6: 1ad3 subs r3, r2, r3 + 803b0e8: b29a uxth r2, r3 + 803b0ea: 687b ldr r3, [r7, #4] + 803b0ec: f8a3 206a strh.w r2, [r3, #106] ; 0x6a TCP_WND_INC(pcb->cwnd, pcb->mss); - 803b0c0: 687b ldr r3, [r7, #4] - 803b0c2: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803b0c6: 687b ldr r3, [r7, #4] - 803b0c8: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803b0ca: 4413 add r3, r2 - 803b0cc: b29a uxth r2, r3 - 803b0ce: 687b ldr r3, [r7, #4] - 803b0d0: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803b0d4: 429a cmp r2, r3 - 803b0d6: d30a bcc.n 803b0ee - 803b0d8: 687b ldr r3, [r7, #4] - 803b0da: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803b0de: 687b ldr r3, [r7, #4] - 803b0e0: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803b0e2: 4413 add r3, r2 - 803b0e4: b29a uxth r2, r3 - 803b0e6: 687b ldr r3, [r7, #4] - 803b0e8: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 - 803b0ec: e004 b.n 803b0f8 - 803b0ee: 687b ldr r3, [r7, #4] - 803b0f0: f64f 72ff movw r2, #65535 ; 0xffff - 803b0f4: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803b0f0: 687b ldr r3, [r7, #4] + 803b0f2: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b0f6: 687b ldr r3, [r7, #4] + 803b0f8: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803b0fa: 4413 add r3, r2 + 803b0fc: b29a uxth r2, r3 + 803b0fe: 687b ldr r3, [r7, #4] + 803b100: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803b104: 429a cmp r2, r3 + 803b106: d30a bcc.n 803b11e + 803b108: 687b ldr r3, [r7, #4] + 803b10a: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b10e: 687b ldr r3, [r7, #4] + 803b110: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803b112: 4413 add r3, r2 + 803b114: b29a uxth r2, r3 + 803b116: 687b ldr r3, [r7, #4] + 803b118: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803b11c: e004 b.n 803b128 + 803b11e: 687b ldr r3, [r7, #4] + 803b120: f64f 72ff movw r2, #65535 ; 0xffff + 803b124: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 pcb->unacked != NULL ? lwip_ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked) : 0)); /* Remove segment from the unacknowledged list if the incoming ACK acknowledges them. */ pcb->unacked = tcp_free_acked_segments(pcb, pcb->unacked, "unacked", pcb->unsent); - 803b0f8: 687b ldr r3, [r7, #4] - 803b0fa: 6f19 ldr r1, [r3, #112] ; 0x70 - 803b0fc: 687b ldr r3, [r7, #4] - 803b0fe: 6edb ldr r3, [r3, #108] ; 0x6c - 803b100: 4a98 ldr r2, [pc, #608] ; (803b364 ) - 803b102: 6878 ldr r0, [r7, #4] - 803b104: f7ff fdca bl 803ac9c - 803b108: 4602 mov r2, r0 - 803b10a: 687b ldr r3, [r7, #4] - 803b10c: 671a str r2, [r3, #112] ; 0x70 + 803b128: 687b ldr r3, [r7, #4] + 803b12a: 6f19 ldr r1, [r3, #112] ; 0x70 + 803b12c: 687b ldr r3, [r7, #4] + 803b12e: 6edb ldr r3, [r3, #108] ; 0x6c + 803b130: 4a98 ldr r2, [pc, #608] ; (803b394 ) + 803b132: 6878 ldr r0, [r7, #4] + 803b134: f7ff fdca bl 803accc + 803b138: 4602 mov r2, r0 + 803b13a: 687b ldr r3, [r7, #4] + 803b13c: 671a str r2, [r3, #112] ; 0x70 on the list are acknowledged by the ACK. This may seem strange since an "unsent" segment shouldn't be acked. The rationale is that lwIP puts all outstanding segments on the ->unsent list after a retransmission, so these segments may in fact have been sent once. */ pcb->unsent = tcp_free_acked_segments(pcb, pcb->unsent, "unsent", pcb->unacked); - 803b10e: 687b ldr r3, [r7, #4] - 803b110: 6ed9 ldr r1, [r3, #108] ; 0x6c - 803b112: 687b ldr r3, [r7, #4] - 803b114: 6f1b ldr r3, [r3, #112] ; 0x70 - 803b116: 4a94 ldr r2, [pc, #592] ; (803b368 ) - 803b118: 6878 ldr r0, [r7, #4] - 803b11a: f7ff fdbf bl 803ac9c - 803b11e: 4602 mov r2, r0 - 803b120: 687b ldr r3, [r7, #4] - 803b122: 66da str r2, [r3, #108] ; 0x6c + 803b13e: 687b ldr r3, [r7, #4] + 803b140: 6ed9 ldr r1, [r3, #108] ; 0x6c + 803b142: 687b ldr r3, [r7, #4] + 803b144: 6f1b ldr r3, [r3, #112] ; 0x70 + 803b146: 4a94 ldr r2, [pc, #592] ; (803b398 ) + 803b148: 6878 ldr r0, [r7, #4] + 803b14a: f7ff fdbf bl 803accc + 803b14e: 4602 mov r2, r0 + 803b150: 687b ldr r3, [r7, #4] + 803b152: 66da str r2, [r3, #108] ; 0x6c /* If there's nothing left to acknowledge, stop the retransmit timer, otherwise reset it to start again */ if (pcb->unacked == NULL) { - 803b124: 687b ldr r3, [r7, #4] - 803b126: 6f1b ldr r3, [r3, #112] ; 0x70 - 803b128: 2b00 cmp r3, #0 - 803b12a: d104 bne.n 803b136 + 803b154: 687b ldr r3, [r7, #4] + 803b156: 6f1b ldr r3, [r3, #112] ; 0x70 + 803b158: 2b00 cmp r3, #0 + 803b15a: d104 bne.n 803b166 pcb->rtime = -1; - 803b12c: 687b ldr r3, [r7, #4] - 803b12e: f64f 72ff movw r2, #65535 ; 0xffff - 803b132: 861a strh r2, [r3, #48] ; 0x30 - 803b134: e002 b.n 803b13c + 803b15c: 687b ldr r3, [r7, #4] + 803b15e: f64f 72ff movw r2, #65535 ; 0xffff + 803b162: 861a strh r2, [r3, #48] ; 0x30 + 803b164: e002 b.n 803b16c } else { pcb->rtime = 0; - 803b136: 687b ldr r3, [r7, #4] - 803b138: 2200 movs r2, #0 - 803b13a: 861a strh r2, [r3, #48] ; 0x30 + 803b166: 687b ldr r3, [r7, #4] + 803b168: 2200 movs r2, #0 + 803b16a: 861a strh r2, [r3, #48] ; 0x30 } pcb->polltmr = 0; - 803b13c: 687b ldr r3, [r7, #4] - 803b13e: 2200 movs r2, #0 - 803b140: 771a strb r2, [r3, #28] + 803b16c: 687b ldr r3, [r7, #4] + 803b16e: 2200 movs r2, #0 + 803b170: 771a strb r2, [r3, #28] #if TCP_OVERSIZE if (pcb->unsent == NULL) { - 803b142: 687b ldr r3, [r7, #4] - 803b144: 6edb ldr r3, [r3, #108] ; 0x6c - 803b146: 2b00 cmp r3, #0 - 803b148: d103 bne.n 803b152 + 803b172: 687b ldr r3, [r7, #4] + 803b174: 6edb ldr r3, [r3, #108] ; 0x6c + 803b176: 2b00 cmp r3, #0 + 803b178: d103 bne.n 803b182 pcb->unsent_oversize = 0; - 803b14a: 687b ldr r3, [r7, #4] - 803b14c: 2200 movs r2, #0 - 803b14e: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803b17a: 687b ldr r3, [r7, #4] + 803b17c: 2200 movs r2, #0 + 803b17e: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 /* Inform neighbor reachability of forward progress. */ nd6_reachability_hint(ip6_current_src_addr()); } #endif /* LWIP_IPV6 && LWIP_ND6_TCP_REACHABILITY_HINTS*/ pcb->snd_buf = (tcpwnd_size_t)(pcb->snd_buf + recv_acked); - 803b152: 687b ldr r3, [r7, #4] - 803b154: f8b3 2064 ldrh.w r2, [r3, #100] ; 0x64 - 803b158: 4b84 ldr r3, [pc, #528] ; (803b36c ) - 803b15a: 881b ldrh r3, [r3, #0] - 803b15c: 4413 add r3, r2 - 803b15e: b29a uxth r2, r3 - 803b160: 687b ldr r3, [r7, #4] - 803b162: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 + 803b182: 687b ldr r3, [r7, #4] + 803b184: f8b3 2064 ldrh.w r2, [r3, #100] ; 0x64 + 803b188: 4b84 ldr r3, [pc, #528] ; (803b39c ) + 803b18a: 881b ldrh r3, [r3, #0] + 803b18c: 4413 add r3, r2 + 803b18e: b29a uxth r2, r3 + 803b190: 687b ldr r3, [r7, #4] + 803b192: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 /* check if this ACK ends our retransmission of in-flight data */ if (pcb->flags & TF_RTO) { - 803b166: 687b ldr r3, [r7, #4] - 803b168: 8b5b ldrh r3, [r3, #26] - 803b16a: f403 6300 and.w r3, r3, #2048 ; 0x800 - 803b16e: 2b00 cmp r3, #0 - 803b170: d035 beq.n 803b1de + 803b196: 687b ldr r3, [r7, #4] + 803b198: 8b5b ldrh r3, [r3, #26] + 803b19a: f403 6300 and.w r3, r3, #2048 ; 0x800 + 803b19e: 2b00 cmp r3, #0 + 803b1a0: d035 beq.n 803b20e /* RTO is done if 1) both queues are empty or 2) unacked is empty and unsent head contains data not part of RTO or 3) unacked head contains data not part of RTO */ if (pcb->unacked == NULL) { - 803b172: 687b ldr r3, [r7, #4] - 803b174: 6f1b ldr r3, [r3, #112] ; 0x70 - 803b176: 2b00 cmp r3, #0 - 803b178: d118 bne.n 803b1ac + 803b1a2: 687b ldr r3, [r7, #4] + 803b1a4: 6f1b ldr r3, [r3, #112] ; 0x70 + 803b1a6: 2b00 cmp r3, #0 + 803b1a8: d118 bne.n 803b1dc if ((pcb->unsent == NULL) || - 803b17a: 687b ldr r3, [r7, #4] - 803b17c: 6edb ldr r3, [r3, #108] ; 0x6c - 803b17e: 2b00 cmp r3, #0 - 803b180: d00c beq.n 803b19c + 803b1aa: 687b ldr r3, [r7, #4] + 803b1ac: 6edb ldr r3, [r3, #108] ; 0x6c + 803b1ae: 2b00 cmp r3, #0 + 803b1b0: d00c beq.n 803b1cc (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unsent->tcphdr->seqno)))) { - 803b182: 687b ldr r3, [r7, #4] - 803b184: 6cdc ldr r4, [r3, #76] ; 0x4c - 803b186: 687b ldr r3, [r7, #4] - 803b188: 6edb ldr r3, [r3, #108] ; 0x6c - 803b18a: 68db ldr r3, [r3, #12] - 803b18c: 685b ldr r3, [r3, #4] - 803b18e: 4618 mov r0, r3 - 803b190: f7fa fe9f bl 8035ed2 - 803b194: 4603 mov r3, r0 - 803b196: 1ae3 subs r3, r4, r3 + 803b1b2: 687b ldr r3, [r7, #4] + 803b1b4: 6cdc ldr r4, [r3, #76] ; 0x4c + 803b1b6: 687b ldr r3, [r7, #4] + 803b1b8: 6edb ldr r3, [r3, #108] ; 0x6c + 803b1ba: 68db ldr r3, [r3, #12] + 803b1bc: 685b ldr r3, [r3, #4] + 803b1be: 4618 mov r0, r3 + 803b1c0: f7fa fe9f bl 8035f02 + 803b1c4: 4603 mov r3, r0 + 803b1c6: 1ae3 subs r3, r4, r3 if ((pcb->unsent == NULL) || - 803b198: 2b00 cmp r3, #0 - 803b19a: dc20 bgt.n 803b1de + 803b1c8: 2b00 cmp r3, #0 + 803b1ca: dc20 bgt.n 803b20e tcp_clear_flags(pcb, TF_RTO); - 803b19c: 687b ldr r3, [r7, #4] - 803b19e: 8b5b ldrh r3, [r3, #26] - 803b1a0: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 803b1a4: b29a uxth r2, r3 - 803b1a6: 687b ldr r3, [r7, #4] - 803b1a8: 835a strh r2, [r3, #26] + 803b1cc: 687b ldr r3, [r7, #4] + 803b1ce: 8b5b ldrh r3, [r3, #26] + 803b1d0: f423 6300 bic.w r3, r3, #2048 ; 0x800 + 803b1d4: b29a uxth r2, r3 + 803b1d6: 687b ldr r3, [r7, #4] + 803b1d8: 835a strh r2, [r3, #26] } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803b1aa: e018 b.n 803b1de + 803b1da: e018 b.n 803b20e } } else if (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unacked->tcphdr->seqno))) { - 803b1ac: 687b ldr r3, [r7, #4] - 803b1ae: 6cdc ldr r4, [r3, #76] ; 0x4c - 803b1b0: 687b ldr r3, [r7, #4] - 803b1b2: 6f1b ldr r3, [r3, #112] ; 0x70 - 803b1b4: 68db ldr r3, [r3, #12] - 803b1b6: 685b ldr r3, [r3, #4] - 803b1b8: 4618 mov r0, r3 - 803b1ba: f7fa fe8a bl 8035ed2 - 803b1be: 4603 mov r3, r0 - 803b1c0: 1ae3 subs r3, r4, r3 - 803b1c2: 2b00 cmp r3, #0 - 803b1c4: dc0b bgt.n 803b1de + 803b1dc: 687b ldr r3, [r7, #4] + 803b1de: 6cdc ldr r4, [r3, #76] ; 0x4c + 803b1e0: 687b ldr r3, [r7, #4] + 803b1e2: 6f1b ldr r3, [r3, #112] ; 0x70 + 803b1e4: 68db ldr r3, [r3, #12] + 803b1e6: 685b ldr r3, [r3, #4] + 803b1e8: 4618 mov r0, r3 + 803b1ea: f7fa fe8a bl 8035f02 + 803b1ee: 4603 mov r3, r0 + 803b1f0: 1ae3 subs r3, r4, r3 + 803b1f2: 2b00 cmp r3, #0 + 803b1f4: dc0b bgt.n 803b20e tcp_clear_flags(pcb, TF_RTO); - 803b1c6: 687b ldr r3, [r7, #4] - 803b1c8: 8b5b ldrh r3, [r3, #26] - 803b1ca: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 803b1ce: b29a uxth r2, r3 - 803b1d0: 687b ldr r3, [r7, #4] - 803b1d2: 835a strh r2, [r3, #26] + 803b1f6: 687b ldr r3, [r7, #4] + 803b1f8: 8b5b ldrh r3, [r3, #26] + 803b1fa: f423 6300 bic.w r3, r3, #2048 ; 0x800 + 803b1fe: b29a uxth r2, r3 + 803b200: 687b ldr r3, [r7, #4] + 803b202: 835a strh r2, [r3, #26] } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803b1d4: e003 b.n 803b1de + 803b204: e003 b.n 803b20e } } /* End of ACK for new data processing. */ } else { /* Out of sequence ACK, didn't really ack anything */ tcp_send_empty_ack(pcb); - 803b1d6: 6878 ldr r0, [r7, #4] - 803b1d8: f002 fbce bl 803d978 - 803b1dc: e000 b.n 803b1e0 + 803b206: 6878 ldr r0, [r7, #4] + 803b208: f002 fbce bl 803d9a8 + 803b20c: e000 b.n 803b210 } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803b1de: bf00 nop + 803b20e: bf00 nop pcb->rttest, pcb->rtseq, ackno)); /* RTT estimation calculations. This is done by checking if the incoming segment acknowledges the segment we use to take a round-trip time measurement. */ if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) { - 803b1e0: 687b ldr r3, [r7, #4] - 803b1e2: 6b5b ldr r3, [r3, #52] ; 0x34 - 803b1e4: 2b00 cmp r3, #0 - 803b1e6: d05b beq.n 803b2a0 - 803b1e8: 687b ldr r3, [r7, #4] - 803b1ea: 6b9a ldr r2, [r3, #56] ; 0x38 - 803b1ec: 4b60 ldr r3, [pc, #384] ; (803b370 ) - 803b1ee: 681b ldr r3, [r3, #0] - 803b1f0: 1ad3 subs r3, r2, r3 - 803b1f2: 2b00 cmp r3, #0 - 803b1f4: da54 bge.n 803b2a0 + 803b210: 687b ldr r3, [r7, #4] + 803b212: 6b5b ldr r3, [r3, #52] ; 0x34 + 803b214: 2b00 cmp r3, #0 + 803b216: d05b beq.n 803b2d0 + 803b218: 687b ldr r3, [r7, #4] + 803b21a: 6b9a ldr r2, [r3, #56] ; 0x38 + 803b21c: 4b60 ldr r3, [pc, #384] ; (803b3a0 ) + 803b21e: 681b ldr r3, [r3, #0] + 803b220: 1ad3 subs r3, r2, r3 + 803b222: 2b00 cmp r3, #0 + 803b224: da54 bge.n 803b2d0 /* diff between this shouldn't exceed 32K since this are tcp timer ticks and a round-trip shouldn't be that long... */ m = (s16_t)(tcp_ticks - pcb->rttest); - 803b1f6: 4b5f ldr r3, [pc, #380] ; (803b374 ) - 803b1f8: 681b ldr r3, [r3, #0] - 803b1fa: b29a uxth r2, r3 - 803b1fc: 687b ldr r3, [r7, #4] - 803b1fe: 6b5b ldr r3, [r3, #52] ; 0x34 - 803b200: b29b uxth r3, r3 - 803b202: 1ad3 subs r3, r2, r3 - 803b204: b29b uxth r3, r3 - 803b206: f8a7 304e strh.w r3, [r7, #78] ; 0x4e + 803b226: 4b5f ldr r3, [pc, #380] ; (803b3a4 ) + 803b228: 681b ldr r3, [r3, #0] + 803b22a: b29a uxth r2, r3 + 803b22c: 687b ldr r3, [r7, #4] + 803b22e: 6b5b ldr r3, [r3, #52] ; 0x34 + 803b230: b29b uxth r3, r3 + 803b232: 1ad3 subs r3, r2, r3 + 803b234: b29b uxth r3, r3 + 803b236: f8a7 304e strh.w r3, [r7, #78] ; 0x4e LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n", m, (u16_t)(m * TCP_SLOW_INTERVAL))); /* This is taken directly from VJs original code in his paper */ m = (s16_t)(m - (pcb->sa >> 3)); - 803b20a: f8b7 204e ldrh.w r2, [r7, #78] ; 0x4e - 803b20e: 687b ldr r3, [r7, #4] - 803b210: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 803b214: 10db asrs r3, r3, #3 - 803b216: b21b sxth r3, r3 - 803b218: b29b uxth r3, r3 - 803b21a: 1ad3 subs r3, r2, r3 - 803b21c: b29b uxth r3, r3 - 803b21e: f8a7 304e strh.w r3, [r7, #78] ; 0x4e + 803b23a: f8b7 204e ldrh.w r2, [r7, #78] ; 0x4e + 803b23e: 687b ldr r3, [r7, #4] + 803b240: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 803b244: 10db asrs r3, r3, #3 + 803b246: b21b sxth r3, r3 + 803b248: b29b uxth r3, r3 + 803b24a: 1ad3 subs r3, r2, r3 + 803b24c: b29b uxth r3, r3 + 803b24e: f8a7 304e strh.w r3, [r7, #78] ; 0x4e pcb->sa = (s16_t)(pcb->sa + m); - 803b222: 687b ldr r3, [r7, #4] - 803b224: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 803b228: b29a uxth r2, r3 - 803b22a: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e - 803b22e: 4413 add r3, r2 - 803b230: b29b uxth r3, r3 - 803b232: b21a sxth r2, r3 - 803b234: 687b ldr r3, [r7, #4] - 803b236: 879a strh r2, [r3, #60] ; 0x3c + 803b252: 687b ldr r3, [r7, #4] + 803b254: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 803b258: b29a uxth r2, r3 + 803b25a: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e + 803b25e: 4413 add r3, r2 + 803b260: b29b uxth r3, r3 + 803b262: b21a sxth r2, r3 + 803b264: 687b ldr r3, [r7, #4] + 803b266: 879a strh r2, [r3, #60] ; 0x3c if (m < 0) { - 803b238: f9b7 304e ldrsh.w r3, [r7, #78] ; 0x4e - 803b23c: 2b00 cmp r3, #0 - 803b23e: da05 bge.n 803b24c + 803b268: f9b7 304e ldrsh.w r3, [r7, #78] ; 0x4e + 803b26c: 2b00 cmp r3, #0 + 803b26e: da05 bge.n 803b27c m = (s16_t) - m; - 803b240: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e - 803b244: 425b negs r3, r3 - 803b246: b29b uxth r3, r3 - 803b248: f8a7 304e strh.w r3, [r7, #78] ; 0x4e + 803b270: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e + 803b274: 425b negs r3, r3 + 803b276: b29b uxth r3, r3 + 803b278: f8a7 304e strh.w r3, [r7, #78] ; 0x4e } m = (s16_t)(m - (pcb->sv >> 2)); - 803b24c: f8b7 204e ldrh.w r2, [r7, #78] ; 0x4e - 803b250: 687b ldr r3, [r7, #4] - 803b252: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 803b256: 109b asrs r3, r3, #2 - 803b258: b21b sxth r3, r3 - 803b25a: b29b uxth r3, r3 - 803b25c: 1ad3 subs r3, r2, r3 - 803b25e: b29b uxth r3, r3 - 803b260: f8a7 304e strh.w r3, [r7, #78] ; 0x4e + 803b27c: f8b7 204e ldrh.w r2, [r7, #78] ; 0x4e + 803b280: 687b ldr r3, [r7, #4] + 803b282: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 803b286: 109b asrs r3, r3, #2 + 803b288: b21b sxth r3, r3 + 803b28a: b29b uxth r3, r3 + 803b28c: 1ad3 subs r3, r2, r3 + 803b28e: b29b uxth r3, r3 + 803b290: f8a7 304e strh.w r3, [r7, #78] ; 0x4e pcb->sv = (s16_t)(pcb->sv + m); - 803b264: 687b ldr r3, [r7, #4] - 803b266: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 803b26a: b29a uxth r2, r3 - 803b26c: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e - 803b270: 4413 add r3, r2 - 803b272: b29b uxth r3, r3 - 803b274: b21a sxth r2, r3 - 803b276: 687b ldr r3, [r7, #4] - 803b278: 87da strh r2, [r3, #62] ; 0x3e - pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv); - 803b27a: 687b ldr r3, [r7, #4] - 803b27c: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 803b280: 10db asrs r3, r3, #3 - 803b282: b21b sxth r3, r3 - 803b284: b29a uxth r2, r3 - 803b286: 687b ldr r3, [r7, #4] - 803b288: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 803b28c: b29b uxth r3, r3 - 803b28e: 4413 add r3, r2 - 803b290: b29b uxth r3, r3 - 803b292: b21a sxth r2, r3 803b294: 687b ldr r3, [r7, #4] - 803b296: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 + 803b296: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 803b29a: b29a uxth r2, r3 + 803b29c: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e + 803b2a0: 4413 add r3, r2 + 803b2a2: b29b uxth r3, r3 + 803b2a4: b21a sxth r2, r3 + 803b2a6: 687b ldr r3, [r7, #4] + 803b2a8: 87da strh r2, [r3, #62] ; 0x3e + pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv); + 803b2aa: 687b ldr r3, [r7, #4] + 803b2ac: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 803b2b0: 10db asrs r3, r3, #3 + 803b2b2: b21b sxth r3, r3 + 803b2b4: b29a uxth r2, r3 + 803b2b6: 687b ldr r3, [r7, #4] + 803b2b8: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 803b2bc: b29b uxth r3, r3 + 803b2be: 4413 add r3, r2 + 803b2c0: b29b uxth r3, r3 + 803b2c2: b21a sxth r2, r3 + 803b2c4: 687b ldr r3, [r7, #4] + 803b2c6: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n", pcb->rto, (u16_t)(pcb->rto * TCP_SLOW_INTERVAL))); pcb->rttest = 0; - 803b29a: 687b ldr r3, [r7, #4] - 803b29c: 2200 movs r2, #0 - 803b29e: 635a str r2, [r3, #52] ; 0x34 + 803b2ca: 687b ldr r3, [r7, #4] + 803b2cc: 2200 movs r2, #0 + 803b2ce: 635a str r2, [r3, #52] ; 0x34 /* If the incoming segment contains data, we must process it further unless the pcb already received a FIN. (RFC 793, chapter 3.9, "SEGMENT ARRIVES" in states CLOSE-WAIT, CLOSING, LAST-ACK and TIME-WAIT: "Ignore the segment text.") */ if ((tcplen > 0) && (pcb->state < CLOSE_WAIT)) { - 803b2a0: 4b35 ldr r3, [pc, #212] ; (803b378 ) - 803b2a2: 881b ldrh r3, [r3, #0] - 803b2a4: 2b00 cmp r3, #0 - 803b2a6: f000 84e2 beq.w 803bc6e - 803b2aa: 687b ldr r3, [r7, #4] - 803b2ac: 7d1b ldrb r3, [r3, #20] - 803b2ae: 2b06 cmp r3, #6 - 803b2b0: f200 84dd bhi.w 803bc6e + 803b2d0: 4b35 ldr r3, [pc, #212] ; (803b3a8 ) + 803b2d2: 881b ldrh r3, [r3, #0] + 803b2d4: 2b00 cmp r3, #0 + 803b2d6: f000 84e2 beq.w 803bc9e + 803b2da: 687b ldr r3, [r7, #4] + 803b2dc: 7d1b ldrb r3, [r3, #20] + 803b2de: 2b06 cmp r3, #6 + 803b2e0: f200 84dd bhi.w 803bc9e this if the sequence number of the incoming segment is less than rcv_nxt, and the sequence number plus the length of the segment is larger than rcv_nxt. */ /* if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) { if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/ if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) { - 803b2b4: 687b ldr r3, [r7, #4] - 803b2b6: 6a5a ldr r2, [r3, #36] ; 0x24 - 803b2b8: 4b30 ldr r3, [pc, #192] ; (803b37c ) - 803b2ba: 681b ldr r3, [r3, #0] - 803b2bc: 1ad3 subs r3, r2, r3 - 803b2be: 3b01 subs r3, #1 - 803b2c0: 2b00 cmp r3, #0 - 803b2c2: f2c0 808f blt.w 803b3e4 - 803b2c6: 687b ldr r3, [r7, #4] - 803b2c8: 6a5a ldr r2, [r3, #36] ; 0x24 - 803b2ca: 4b2b ldr r3, [pc, #172] ; (803b378 ) - 803b2cc: 881b ldrh r3, [r3, #0] - 803b2ce: 4619 mov r1, r3 - 803b2d0: 4b2a ldr r3, [pc, #168] ; (803b37c ) - 803b2d2: 681b ldr r3, [r3, #0] - 803b2d4: 440b add r3, r1 - 803b2d6: 1ad3 subs r3, r2, r3 - 803b2d8: 3301 adds r3, #1 - 803b2da: 2b00 cmp r3, #0 - 803b2dc: f300 8082 bgt.w 803b3e4 + 803b2e4: 687b ldr r3, [r7, #4] + 803b2e6: 6a5a ldr r2, [r3, #36] ; 0x24 + 803b2e8: 4b30 ldr r3, [pc, #192] ; (803b3ac ) + 803b2ea: 681b ldr r3, [r3, #0] + 803b2ec: 1ad3 subs r3, r2, r3 + 803b2ee: 3b01 subs r3, #1 + 803b2f0: 2b00 cmp r3, #0 + 803b2f2: f2c0 808f blt.w 803b414 + 803b2f6: 687b ldr r3, [r7, #4] + 803b2f8: 6a5a ldr r2, [r3, #36] ; 0x24 + 803b2fa: 4b2b ldr r3, [pc, #172] ; (803b3a8 ) + 803b2fc: 881b ldrh r3, [r3, #0] + 803b2fe: 4619 mov r1, r3 + 803b300: 4b2a ldr r3, [pc, #168] ; (803b3ac ) + 803b302: 681b ldr r3, [r3, #0] + 803b304: 440b add r3, r1 + 803b306: 1ad3 subs r3, r2, r3 + 803b308: 3301 adds r3, #1 + 803b30a: 2b00 cmp r3, #0 + 803b30c: f300 8082 bgt.w 803b414 After we are done with adjusting the pbuf pointers we must adjust the ->data pointer in the seg and the segment length.*/ struct pbuf *p = inseg.p; - 803b2e0: 4b27 ldr r3, [pc, #156] ; (803b380 ) - 803b2e2: 685b ldr r3, [r3, #4] - 803b2e4: 647b str r3, [r7, #68] ; 0x44 + 803b310: 4b27 ldr r3, [pc, #156] ; (803b3b0 ) + 803b312: 685b ldr r3, [r3, #4] + 803b314: 647b str r3, [r7, #68] ; 0x44 u32_t off32 = pcb->rcv_nxt - seqno; - 803b2e6: 687b ldr r3, [r7, #4] - 803b2e8: 6a5a ldr r2, [r3, #36] ; 0x24 - 803b2ea: 4b24 ldr r3, [pc, #144] ; (803b37c ) - 803b2ec: 681b ldr r3, [r3, #0] - 803b2ee: 1ad3 subs r3, r2, r3 - 803b2f0: 627b str r3, [r7, #36] ; 0x24 + 803b316: 687b ldr r3, [r7, #4] + 803b318: 6a5a ldr r2, [r3, #36] ; 0x24 + 803b31a: 4b24 ldr r3, [pc, #144] ; (803b3ac ) + 803b31c: 681b ldr r3, [r3, #0] + 803b31e: 1ad3 subs r3, r2, r3 + 803b320: 627b str r3, [r7, #36] ; 0x24 u16_t new_tot_len, off; LWIP_ASSERT("inseg.p != NULL", inseg.p); - 803b2f2: 4b23 ldr r3, [pc, #140] ; (803b380 ) - 803b2f4: 685b ldr r3, [r3, #4] - 803b2f6: 2b00 cmp r3, #0 - 803b2f8: d106 bne.n 803b308 - 803b2fa: 4b22 ldr r3, [pc, #136] ; (803b384 ) - 803b2fc: f240 5294 movw r2, #1428 ; 0x594 - 803b300: 4921 ldr r1, [pc, #132] ; (803b388 ) - 803b302: 4822 ldr r0, [pc, #136] ; (803b38c ) - 803b304: f005 fbec bl 8040ae0 + 803b322: 4b23 ldr r3, [pc, #140] ; (803b3b0 ) + 803b324: 685b ldr r3, [r3, #4] + 803b326: 2b00 cmp r3, #0 + 803b328: d106 bne.n 803b338 + 803b32a: 4b22 ldr r3, [pc, #136] ; (803b3b4 ) + 803b32c: f240 5294 movw r2, #1428 ; 0x594 + 803b330: 4921 ldr r1, [pc, #132] ; (803b3b8 ) + 803b332: 4822 ldr r0, [pc, #136] ; (803b3bc ) + 803b334: f005 fbec bl 8040b10 LWIP_ASSERT("insane offset!", (off32 < 0xffff)); - 803b308: 6a7b ldr r3, [r7, #36] ; 0x24 - 803b30a: f64f 72fe movw r2, #65534 ; 0xfffe - 803b30e: 4293 cmp r3, r2 - 803b310: d906 bls.n 803b320 - 803b312: 4b1c ldr r3, [pc, #112] ; (803b384 ) - 803b314: f240 5295 movw r2, #1429 ; 0x595 - 803b318: 491d ldr r1, [pc, #116] ; (803b390 ) - 803b31a: 481c ldr r0, [pc, #112] ; (803b38c ) - 803b31c: f005 fbe0 bl 8040ae0 + 803b338: 6a7b ldr r3, [r7, #36] ; 0x24 + 803b33a: f64f 72fe movw r2, #65534 ; 0xfffe + 803b33e: 4293 cmp r3, r2 + 803b340: d906 bls.n 803b350 + 803b342: 4b1c ldr r3, [pc, #112] ; (803b3b4 ) + 803b344: f240 5295 movw r2, #1429 ; 0x595 + 803b348: 491d ldr r1, [pc, #116] ; (803b3c0 ) + 803b34a: 481c ldr r0, [pc, #112] ; (803b3bc ) + 803b34c: f005 fbe0 bl 8040b10 off = (u16_t)off32; - 803b320: 6a7b ldr r3, [r7, #36] ; 0x24 - 803b322: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803b350: 6a7b ldr r3, [r7, #36] ; 0x24 + 803b352: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off)); - 803b326: 4b16 ldr r3, [pc, #88] ; (803b380 ) - 803b328: 685b ldr r3, [r3, #4] - 803b32a: 891b ldrh r3, [r3, #8] - 803b32c: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803b330: 429a cmp r2, r3 - 803b332: d906 bls.n 803b342 - 803b334: 4b13 ldr r3, [pc, #76] ; (803b384 ) - 803b336: f240 5297 movw r2, #1431 ; 0x597 - 803b33a: 4916 ldr r1, [pc, #88] ; (803b394 ) - 803b33c: 4813 ldr r0, [pc, #76] ; (803b38c ) - 803b33e: f005 fbcf bl 8040ae0 + 803b356: 4b16 ldr r3, [pc, #88] ; (803b3b0 ) + 803b358: 685b ldr r3, [r3, #4] + 803b35a: 891b ldrh r3, [r3, #8] + 803b35c: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803b360: 429a cmp r2, r3 + 803b362: d906 bls.n 803b372 + 803b364: 4b13 ldr r3, [pc, #76] ; (803b3b4 ) + 803b366: f240 5297 movw r2, #1431 ; 0x597 + 803b36a: 4916 ldr r1, [pc, #88] ; (803b3c4 ) + 803b36c: 4813 ldr r0, [pc, #76] ; (803b3bc ) + 803b36e: f005 fbcf bl 8040b10 inseg.len -= off; - 803b342: 4b0f ldr r3, [pc, #60] ; (803b380 ) - 803b344: 891a ldrh r2, [r3, #8] - 803b346: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803b34a: 1ad3 subs r3, r2, r3 - 803b34c: b29a uxth r2, r3 - 803b34e: 4b0c ldr r3, [pc, #48] ; (803b380 ) - 803b350: 811a strh r2, [r3, #8] + 803b372: 4b0f ldr r3, [pc, #60] ; (803b3b0 ) + 803b374: 891a ldrh r2, [r3, #8] + 803b376: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803b37a: 1ad3 subs r3, r2, r3 + 803b37c: b29a uxth r2, r3 + 803b37e: 4b0c ldr r3, [pc, #48] ; (803b3b0 ) + 803b380: 811a strh r2, [r3, #8] new_tot_len = (u16_t)(inseg.p->tot_len - off); - 803b352: 4b0b ldr r3, [pc, #44] ; (803b380 ) - 803b354: 685b ldr r3, [r3, #4] - 803b356: 891a ldrh r2, [r3, #8] - 803b358: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803b35c: 1ad3 subs r3, r2, r3 - 803b35e: 847b strh r3, [r7, #34] ; 0x22 + 803b382: 4b0b ldr r3, [pc, #44] ; (803b3b0 ) + 803b384: 685b ldr r3, [r3, #4] + 803b386: 891a ldrh r2, [r3, #8] + 803b388: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803b38c: 1ad3 subs r3, r2, r3 + 803b38e: 847b strh r3, [r7, #34] ; 0x22 while (p->len < off) { - 803b360: e02a b.n 803b3b8 - 803b362: bf00 nop - 803b364: 08043838 .word 0x08043838 - 803b368: 08043840 .word 0x08043840 - 803b36c: 2400e998 .word 0x2400e998 - 803b370: 2400e994 .word 0x2400e994 - 803b374: 2400e958 .word 0x2400e958 - 803b378: 2400e99a .word 0x2400e99a - 803b37c: 2400e990 .word 0x2400e990 - 803b380: 2400e970 .word 0x2400e970 - 803b384: 080434d0 .word 0x080434d0 - 803b388: 08043848 .word 0x08043848 - 803b38c: 0804351c .word 0x0804351c - 803b390: 08043858 .word 0x08043858 + 803b390: e02a b.n 803b3e8 + 803b392: bf00 nop 803b394: 08043868 .word 0x08043868 + 803b398: 08043870 .word 0x08043870 + 803b39c: 2400e998 .word 0x2400e998 + 803b3a0: 2400e994 .word 0x2400e994 + 803b3a4: 2400e958 .word 0x2400e958 + 803b3a8: 2400e99a .word 0x2400e99a + 803b3ac: 2400e990 .word 0x2400e990 + 803b3b0: 2400e970 .word 0x2400e970 + 803b3b4: 08043500 .word 0x08043500 + 803b3b8: 08043878 .word 0x08043878 + 803b3bc: 0804354c .word 0x0804354c + 803b3c0: 08043888 .word 0x08043888 + 803b3c4: 08043898 .word 0x08043898 off -= p->len; - 803b398: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b39a: 895b ldrh r3, [r3, #10] - 803b39c: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803b3a0: 1ad3 subs r3, r2, r3 - 803b3a2: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803b3c8: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b3ca: 895b ldrh r3, [r3, #10] + 803b3cc: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803b3d0: 1ad3 subs r3, r2, r3 + 803b3d2: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 /* all pbufs up to and including this one have len==0, so tot_len is equal */ p->tot_len = new_tot_len; - 803b3a6: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b3a8: 8c7a ldrh r2, [r7, #34] ; 0x22 - 803b3aa: 811a strh r2, [r3, #8] + 803b3d6: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b3d8: 8c7a ldrh r2, [r7, #34] ; 0x22 + 803b3da: 811a strh r2, [r3, #8] p->len = 0; - 803b3ac: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b3ae: 2200 movs r2, #0 - 803b3b0: 815a strh r2, [r3, #10] + 803b3dc: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b3de: 2200 movs r2, #0 + 803b3e0: 815a strh r2, [r3, #10] p = p->next; - 803b3b2: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b3b4: 681b ldr r3, [r3, #0] - 803b3b6: 647b str r3, [r7, #68] ; 0x44 + 803b3e2: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b3e4: 681b ldr r3, [r3, #0] + 803b3e6: 647b str r3, [r7, #68] ; 0x44 while (p->len < off) { - 803b3b8: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b3ba: 895b ldrh r3, [r3, #10] - 803b3bc: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803b3c0: 429a cmp r2, r3 - 803b3c2: d8e9 bhi.n 803b398 + 803b3e8: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b3ea: 895b ldrh r3, [r3, #10] + 803b3ec: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803b3f0: 429a cmp r2, r3 + 803b3f2: d8e9 bhi.n 803b3c8 } /* cannot fail... */ pbuf_remove_header(p, off); - 803b3c4: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803b3c8: 4619 mov r1, r3 - 803b3ca: 6c78 ldr r0, [r7, #68] ; 0x44 - 803b3cc: f7fc f918 bl 8037600 + 803b3f4: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803b3f8: 4619 mov r1, r3 + 803b3fa: 6c78 ldr r0, [r7, #68] ; 0x44 + 803b3fc: f7fc f918 bl 8037630 inseg.tcphdr->seqno = seqno = pcb->rcv_nxt; - 803b3d0: 687b ldr r3, [r7, #4] - 803b3d2: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b3d4: 4a91 ldr r2, [pc, #580] ; (803b61c ) - 803b3d6: 6013 str r3, [r2, #0] - 803b3d8: 4b91 ldr r3, [pc, #580] ; (803b620 ) - 803b3da: 68db ldr r3, [r3, #12] - 803b3dc: 4a8f ldr r2, [pc, #572] ; (803b61c ) - 803b3de: 6812 ldr r2, [r2, #0] - 803b3e0: 605a str r2, [r3, #4] + 803b400: 687b ldr r3, [r7, #4] + 803b402: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b404: 4a91 ldr r2, [pc, #580] ; (803b64c ) + 803b406: 6013 str r3, [r2, #0] + 803b408: 4b91 ldr r3, [pc, #580] ; (803b650 ) + 803b40a: 68db ldr r3, [r3, #12] + 803b40c: 4a8f ldr r2, [pc, #572] ; (803b64c ) + 803b40e: 6812 ldr r2, [r2, #0] + 803b410: 605a str r2, [r3, #4] if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) { - 803b3e2: e00d b.n 803b400 + 803b412: e00d b.n 803b430 } else { if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) { - 803b3e4: 4b8d ldr r3, [pc, #564] ; (803b61c ) - 803b3e6: 681a ldr r2, [r3, #0] - 803b3e8: 687b ldr r3, [r7, #4] - 803b3ea: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b3ec: 1ad3 subs r3, r2, r3 - 803b3ee: 2b00 cmp r3, #0 - 803b3f0: da06 bge.n 803b400 + 803b414: 4b8d ldr r3, [pc, #564] ; (803b64c ) + 803b416: 681a ldr r2, [r3, #0] + 803b418: 687b ldr r3, [r7, #4] + 803b41a: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b41c: 1ad3 subs r3, r2, r3 + 803b41e: 2b00 cmp r3, #0 + 803b420: da06 bge.n 803b430 /* the whole segment is < rcv_nxt */ /* must be a duplicate of a packet that has already been correctly handled */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno)); tcp_ack_now(pcb); - 803b3f2: 687b ldr r3, [r7, #4] - 803b3f4: 8b5b ldrh r3, [r3, #26] - 803b3f6: f043 0302 orr.w r3, r3, #2 - 803b3fa: b29a uxth r2, r3 - 803b3fc: 687b ldr r3, [r7, #4] - 803b3fe: 835a strh r2, [r3, #26] + 803b422: 687b ldr r3, [r7, #4] + 803b424: 8b5b ldrh r3, [r3, #26] + 803b426: f043 0302 orr.w r3, r3, #2 + 803b42a: b29a uxth r2, r3 + 803b42c: 687b ldr r3, [r7, #4] + 803b42e: 835a strh r2, [r3, #26] } /* The sequence number must be within the window (above rcv_nxt and below rcv_nxt + rcv_wnd) in order to be further processed. */ if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, - 803b400: 4b86 ldr r3, [pc, #536] ; (803b61c ) - 803b402: 681a ldr r2, [r3, #0] - 803b404: 687b ldr r3, [r7, #4] - 803b406: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b408: 1ad3 subs r3, r2, r3 - 803b40a: 2b00 cmp r3, #0 - 803b40c: f2c0 842a blt.w 803bc64 - 803b410: 4b82 ldr r3, [pc, #520] ; (803b61c ) - 803b412: 681a ldr r2, [r3, #0] - 803b414: 687b ldr r3, [r7, #4] - 803b416: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b418: 6879 ldr r1, [r7, #4] - 803b41a: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803b41c: 440b add r3, r1 - 803b41e: 1ad3 subs r3, r2, r3 - 803b420: 3301 adds r3, #1 - 803b422: 2b00 cmp r3, #0 - 803b424: f300 841e bgt.w 803bc64 + 803b430: 4b86 ldr r3, [pc, #536] ; (803b64c ) + 803b432: 681a ldr r2, [r3, #0] + 803b434: 687b ldr r3, [r7, #4] + 803b436: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b438: 1ad3 subs r3, r2, r3 + 803b43a: 2b00 cmp r3, #0 + 803b43c: f2c0 842a blt.w 803bc94 + 803b440: 4b82 ldr r3, [pc, #520] ; (803b64c ) + 803b442: 681a ldr r2, [r3, #0] + 803b444: 687b ldr r3, [r7, #4] + 803b446: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b448: 6879 ldr r1, [r7, #4] + 803b44a: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803b44c: 440b add r3, r1 + 803b44e: 1ad3 subs r3, r2, r3 + 803b450: 3301 adds r3, #1 + 803b452: 2b00 cmp r3, #0 + 803b454: f300 841e bgt.w 803bc94 pcb->rcv_nxt + pcb->rcv_wnd - 1)) { if (pcb->rcv_nxt == seqno) { - 803b428: 687b ldr r3, [r7, #4] - 803b42a: 6a5a ldr r2, [r3, #36] ; 0x24 - 803b42c: 4b7b ldr r3, [pc, #492] ; (803b61c ) - 803b42e: 681b ldr r3, [r3, #0] - 803b430: 429a cmp r2, r3 - 803b432: f040 829a bne.w 803b96a + 803b458: 687b ldr r3, [r7, #4] + 803b45a: 6a5a ldr r2, [r3, #36] ; 0x24 + 803b45c: 4b7b ldr r3, [pc, #492] ; (803b64c ) + 803b45e: 681b ldr r3, [r3, #0] + 803b460: 429a cmp r2, r3 + 803b462: f040 829a bne.w 803b99a /* The incoming segment is the next in sequence. We check if we have to trim the end of the segment and update rcv_nxt and pass the data to the application. */ tcplen = TCP_TCPLEN(&inseg); - 803b436: 4b7a ldr r3, [pc, #488] ; (803b620 ) - 803b438: 891c ldrh r4, [r3, #8] - 803b43a: 4b79 ldr r3, [pc, #484] ; (803b620 ) - 803b43c: 68db ldr r3, [r3, #12] - 803b43e: 899b ldrh r3, [r3, #12] - 803b440: b29b uxth r3, r3 - 803b442: 4618 mov r0, r3 - 803b444: f7fa fd30 bl 8035ea8 - 803b448: 4603 mov r3, r0 - 803b44a: b2db uxtb r3, r3 - 803b44c: f003 0303 and.w r3, r3, #3 - 803b450: 2b00 cmp r3, #0 - 803b452: d001 beq.n 803b458 - 803b454: 2301 movs r3, #1 - 803b456: e000 b.n 803b45a - 803b458: 2300 movs r3, #0 - 803b45a: 4423 add r3, r4 - 803b45c: b29a uxth r2, r3 - 803b45e: 4b71 ldr r3, [pc, #452] ; (803b624 ) - 803b460: 801a strh r2, [r3, #0] + 803b466: 4b7a ldr r3, [pc, #488] ; (803b650 ) + 803b468: 891c ldrh r4, [r3, #8] + 803b46a: 4b79 ldr r3, [pc, #484] ; (803b650 ) + 803b46c: 68db ldr r3, [r3, #12] + 803b46e: 899b ldrh r3, [r3, #12] + 803b470: b29b uxth r3, r3 + 803b472: 4618 mov r0, r3 + 803b474: f7fa fd30 bl 8035ed8 + 803b478: 4603 mov r3, r0 + 803b47a: b2db uxtb r3, r3 + 803b47c: f003 0303 and.w r3, r3, #3 + 803b480: 2b00 cmp r3, #0 + 803b482: d001 beq.n 803b488 + 803b484: 2301 movs r3, #1 + 803b486: e000 b.n 803b48a + 803b488: 2300 movs r3, #0 + 803b48a: 4423 add r3, r4 + 803b48c: b29a uxth r2, r3 + 803b48e: 4b71 ldr r3, [pc, #452] ; (803b654 ) + 803b490: 801a strh r2, [r3, #0] if (tcplen > pcb->rcv_wnd) { - 803b462: 687b ldr r3, [r7, #4] - 803b464: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b466: 4b6f ldr r3, [pc, #444] ; (803b624 ) - 803b468: 881b ldrh r3, [r3, #0] - 803b46a: 429a cmp r2, r3 - 803b46c: d275 bcs.n 803b55a + 803b492: 687b ldr r3, [r7, #4] + 803b494: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b496: 4b6f ldr r3, [pc, #444] ; (803b654 ) + 803b498: 881b ldrh r3, [r3, #0] + 803b49a: 429a cmp r2, r3 + 803b49c: d275 bcs.n 803b58a LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: other end overran receive window" "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n", seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd)); if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { - 803b46e: 4b6c ldr r3, [pc, #432] ; (803b620 ) - 803b470: 68db ldr r3, [r3, #12] - 803b472: 899b ldrh r3, [r3, #12] - 803b474: b29b uxth r3, r3 - 803b476: 4618 mov r0, r3 - 803b478: f7fa fd16 bl 8035ea8 - 803b47c: 4603 mov r3, r0 - 803b47e: b2db uxtb r3, r3 - 803b480: f003 0301 and.w r3, r3, #1 - 803b484: 2b00 cmp r3, #0 - 803b486: d01f beq.n 803b4c8 + 803b49e: 4b6c ldr r3, [pc, #432] ; (803b650 ) + 803b4a0: 68db ldr r3, [r3, #12] + 803b4a2: 899b ldrh r3, [r3, #12] + 803b4a4: b29b uxth r3, r3 + 803b4a6: 4618 mov r0, r3 + 803b4a8: f7fa fd16 bl 8035ed8 + 803b4ac: 4603 mov r3, r0 + 803b4ae: b2db uxtb r3, r3 + 803b4b0: f003 0301 and.w r3, r3, #1 + 803b4b4: 2b00 cmp r3, #0 + 803b4b6: d01f beq.n 803b4f8 /* Must remove the FIN from the header as we're trimming * that byte of sequence-space from the packet */ TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) & ~(unsigned int)TCP_FIN); - 803b488: 4b65 ldr r3, [pc, #404] ; (803b620 ) - 803b48a: 68db ldr r3, [r3, #12] - 803b48c: 899b ldrh r3, [r3, #12] - 803b48e: b29b uxth r3, r3 - 803b490: b21b sxth r3, r3 - 803b492: f423 537c bic.w r3, r3, #16128 ; 0x3f00 - 803b496: b21c sxth r4, r3 - 803b498: 4b61 ldr r3, [pc, #388] ; (803b620 ) - 803b49a: 68db ldr r3, [r3, #12] - 803b49c: 899b ldrh r3, [r3, #12] - 803b49e: b29b uxth r3, r3 - 803b4a0: 4618 mov r0, r3 - 803b4a2: f7fa fd01 bl 8035ea8 - 803b4a6: 4603 mov r3, r0 - 803b4a8: b2db uxtb r3, r3 - 803b4aa: b29b uxth r3, r3 - 803b4ac: f003 033e and.w r3, r3, #62 ; 0x3e - 803b4b0: b29b uxth r3, r3 - 803b4b2: 4618 mov r0, r3 - 803b4b4: f7fa fcf8 bl 8035ea8 - 803b4b8: 4603 mov r3, r0 - 803b4ba: b21b sxth r3, r3 - 803b4bc: 4323 orrs r3, r4 - 803b4be: b21a sxth r2, r3 - 803b4c0: 4b57 ldr r3, [pc, #348] ; (803b620 ) - 803b4c2: 68db ldr r3, [r3, #12] - 803b4c4: b292 uxth r2, r2 - 803b4c6: 819a strh r2, [r3, #12] + 803b4b8: 4b65 ldr r3, [pc, #404] ; (803b650 ) + 803b4ba: 68db ldr r3, [r3, #12] + 803b4bc: 899b ldrh r3, [r3, #12] + 803b4be: b29b uxth r3, r3 + 803b4c0: b21b sxth r3, r3 + 803b4c2: f423 537c bic.w r3, r3, #16128 ; 0x3f00 + 803b4c6: b21c sxth r4, r3 + 803b4c8: 4b61 ldr r3, [pc, #388] ; (803b650 ) + 803b4ca: 68db ldr r3, [r3, #12] + 803b4cc: 899b ldrh r3, [r3, #12] + 803b4ce: b29b uxth r3, r3 + 803b4d0: 4618 mov r0, r3 + 803b4d2: f7fa fd01 bl 8035ed8 + 803b4d6: 4603 mov r3, r0 + 803b4d8: b2db uxtb r3, r3 + 803b4da: b29b uxth r3, r3 + 803b4dc: f003 033e and.w r3, r3, #62 ; 0x3e + 803b4e0: b29b uxth r3, r3 + 803b4e2: 4618 mov r0, r3 + 803b4e4: f7fa fcf8 bl 8035ed8 + 803b4e8: 4603 mov r3, r0 + 803b4ea: b21b sxth r3, r3 + 803b4ec: 4323 orrs r3, r4 + 803b4ee: b21a sxth r2, r3 + 803b4f0: 4b57 ldr r3, [pc, #348] ; (803b650 ) + 803b4f2: 68db ldr r3, [r3, #12] + 803b4f4: b292 uxth r2, r2 + 803b4f6: 819a strh r2, [r3, #12] } /* Adjust length of segment to fit in the window. */ TCPWND_CHECK16(pcb->rcv_wnd); inseg.len = (u16_t)pcb->rcv_wnd; - 803b4c8: 687b ldr r3, [r7, #4] - 803b4ca: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b4cc: 4b54 ldr r3, [pc, #336] ; (803b620 ) - 803b4ce: 811a strh r2, [r3, #8] + 803b4f8: 687b ldr r3, [r7, #4] + 803b4fa: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b4fc: 4b54 ldr r3, [pc, #336] ; (803b650 ) + 803b4fe: 811a strh r2, [r3, #8] if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { - 803b4d0: 4b53 ldr r3, [pc, #332] ; (803b620 ) - 803b4d2: 68db ldr r3, [r3, #12] - 803b4d4: 899b ldrh r3, [r3, #12] - 803b4d6: b29b uxth r3, r3 - 803b4d8: 4618 mov r0, r3 - 803b4da: f7fa fce5 bl 8035ea8 - 803b4de: 4603 mov r3, r0 - 803b4e0: b2db uxtb r3, r3 - 803b4e2: f003 0302 and.w r3, r3, #2 - 803b4e6: 2b00 cmp r3, #0 - 803b4e8: d005 beq.n 803b4f6 + 803b500: 4b53 ldr r3, [pc, #332] ; (803b650 ) + 803b502: 68db ldr r3, [r3, #12] + 803b504: 899b ldrh r3, [r3, #12] + 803b506: b29b uxth r3, r3 + 803b508: 4618 mov r0, r3 + 803b50a: f7fa fce5 bl 8035ed8 + 803b50e: 4603 mov r3, r0 + 803b510: b2db uxtb r3, r3 + 803b512: f003 0302 and.w r3, r3, #2 + 803b516: 2b00 cmp r3, #0 + 803b518: d005 beq.n 803b526 inseg.len -= 1; - 803b4ea: 4b4d ldr r3, [pc, #308] ; (803b620 ) - 803b4ec: 891b ldrh r3, [r3, #8] - 803b4ee: 3b01 subs r3, #1 - 803b4f0: b29a uxth r2, r3 - 803b4f2: 4b4b ldr r3, [pc, #300] ; (803b620 ) - 803b4f4: 811a strh r2, [r3, #8] + 803b51a: 4b4d ldr r3, [pc, #308] ; (803b650 ) + 803b51c: 891b ldrh r3, [r3, #8] + 803b51e: 3b01 subs r3, #1 + 803b520: b29a uxth r2, r3 + 803b522: 4b4b ldr r3, [pc, #300] ; (803b650 ) + 803b524: 811a strh r2, [r3, #8] } pbuf_realloc(inseg.p, inseg.len); - 803b4f6: 4b4a ldr r3, [pc, #296] ; (803b620 ) - 803b4f8: 685b ldr r3, [r3, #4] - 803b4fa: 4a49 ldr r2, [pc, #292] ; (803b620 ) - 803b4fc: 8912 ldrh r2, [r2, #8] - 803b4fe: 4611 mov r1, r2 - 803b500: 4618 mov r0, r3 - 803b502: f7fb ff7d bl 8037400 + 803b526: 4b4a ldr r3, [pc, #296] ; (803b650 ) + 803b528: 685b ldr r3, [r3, #4] + 803b52a: 4a49 ldr r2, [pc, #292] ; (803b650 ) + 803b52c: 8912 ldrh r2, [r2, #8] + 803b52e: 4611 mov r1, r2 + 803b530: 4618 mov r0, r3 + 803b532: f7fb ff7d bl 8037430 tcplen = TCP_TCPLEN(&inseg); - 803b506: 4b46 ldr r3, [pc, #280] ; (803b620 ) - 803b508: 891c ldrh r4, [r3, #8] - 803b50a: 4b45 ldr r3, [pc, #276] ; (803b620 ) - 803b50c: 68db ldr r3, [r3, #12] - 803b50e: 899b ldrh r3, [r3, #12] - 803b510: b29b uxth r3, r3 - 803b512: 4618 mov r0, r3 - 803b514: f7fa fcc8 bl 8035ea8 - 803b518: 4603 mov r3, r0 - 803b51a: b2db uxtb r3, r3 - 803b51c: f003 0303 and.w r3, r3, #3 - 803b520: 2b00 cmp r3, #0 - 803b522: d001 beq.n 803b528 - 803b524: 2301 movs r3, #1 - 803b526: e000 b.n 803b52a - 803b528: 2300 movs r3, #0 - 803b52a: 4423 add r3, r4 - 803b52c: b29a uxth r2, r3 - 803b52e: 4b3d ldr r3, [pc, #244] ; (803b624 ) - 803b530: 801a strh r2, [r3, #0] + 803b536: 4b46 ldr r3, [pc, #280] ; (803b650 ) + 803b538: 891c ldrh r4, [r3, #8] + 803b53a: 4b45 ldr r3, [pc, #276] ; (803b650 ) + 803b53c: 68db ldr r3, [r3, #12] + 803b53e: 899b ldrh r3, [r3, #12] + 803b540: b29b uxth r3, r3 + 803b542: 4618 mov r0, r3 + 803b544: f7fa fcc8 bl 8035ed8 + 803b548: 4603 mov r3, r0 + 803b54a: b2db uxtb r3, r3 + 803b54c: f003 0303 and.w r3, r3, #3 + 803b550: 2b00 cmp r3, #0 + 803b552: d001 beq.n 803b558 + 803b554: 2301 movs r3, #1 + 803b556: e000 b.n 803b55a + 803b558: 2300 movs r3, #0 + 803b55a: 4423 add r3, r4 + 803b55c: b29a uxth r2, r3 + 803b55e: 4b3d ldr r3, [pc, #244] ; (803b654 ) + 803b560: 801a strh r2, [r3, #0] LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n", - 803b532: 4b3c ldr r3, [pc, #240] ; (803b624 ) - 803b534: 881b ldrh r3, [r3, #0] - 803b536: 461a mov r2, r3 - 803b538: 4b38 ldr r3, [pc, #224] ; (803b61c ) - 803b53a: 681b ldr r3, [r3, #0] - 803b53c: 441a add r2, r3 - 803b53e: 687b ldr r3, [r7, #4] - 803b540: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b542: 6879 ldr r1, [r7, #4] - 803b544: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803b546: 440b add r3, r1 - 803b548: 429a cmp r2, r3 - 803b54a: d006 beq.n 803b55a - 803b54c: 4b36 ldr r3, [pc, #216] ; (803b628 ) - 803b54e: f240 52cb movw r2, #1483 ; 0x5cb - 803b552: 4936 ldr r1, [pc, #216] ; (803b62c ) - 803b554: 4836 ldr r0, [pc, #216] ; (803b630 ) - 803b556: f005 fac3 bl 8040ae0 + 803b562: 4b3c ldr r3, [pc, #240] ; (803b654 ) + 803b564: 881b ldrh r3, [r3, #0] + 803b566: 461a mov r2, r3 + 803b568: 4b38 ldr r3, [pc, #224] ; (803b64c ) + 803b56a: 681b ldr r3, [r3, #0] + 803b56c: 441a add r2, r3 + 803b56e: 687b ldr r3, [r7, #4] + 803b570: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b572: 6879 ldr r1, [r7, #4] + 803b574: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803b576: 440b add r3, r1 + 803b578: 429a cmp r2, r3 + 803b57a: d006 beq.n 803b58a + 803b57c: 4b36 ldr r3, [pc, #216] ; (803b658 ) + 803b57e: f240 52cb movw r2, #1483 ; 0x5cb + 803b582: 4936 ldr r1, [pc, #216] ; (803b65c ) + 803b584: 4836 ldr r0, [pc, #216] ; (803b660 ) + 803b586: f005 fac3 bl 8040b10 } #if TCP_QUEUE_OOSEQ /* Received in-sequence data, adjust ooseq data if: - FIN has been received or - inseq overlaps with ooseq */ if (pcb->ooseq != NULL) { - 803b55a: 687b ldr r3, [r7, #4] - 803b55c: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b55e: 2b00 cmp r3, #0 - 803b560: f000 80e7 beq.w 803b732 + 803b58a: 687b ldr r3, [r7, #4] + 803b58c: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b58e: 2b00 cmp r3, #0 + 803b590: f000 80e7 beq.w 803b762 if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { - 803b564: 4b2e ldr r3, [pc, #184] ; (803b620 ) - 803b566: 68db ldr r3, [r3, #12] - 803b568: 899b ldrh r3, [r3, #12] - 803b56a: b29b uxth r3, r3 - 803b56c: 4618 mov r0, r3 - 803b56e: f7fa fc9b bl 8035ea8 - 803b572: 4603 mov r3, r0 - 803b574: b2db uxtb r3, r3 - 803b576: f003 0301 and.w r3, r3, #1 - 803b57a: 2b00 cmp r3, #0 - 803b57c: d010 beq.n 803b5a0 + 803b594: 4b2e ldr r3, [pc, #184] ; (803b650 ) + 803b596: 68db ldr r3, [r3, #12] + 803b598: 899b ldrh r3, [r3, #12] + 803b59a: b29b uxth r3, r3 + 803b59c: 4618 mov r0, r3 + 803b59e: f7fa fc9b bl 8035ed8 + 803b5a2: 4603 mov r3, r0 + 803b5a4: b2db uxtb r3, r3 + 803b5a6: f003 0301 and.w r3, r3, #1 + 803b5aa: 2b00 cmp r3, #0 + 803b5ac: d010 beq.n 803b5d0 LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received in-order FIN, binning ooseq queue\n")); /* Received in-order FIN means anything that was received * out of order must now have been received in-order, so * bin the ooseq queue */ while (pcb->ooseq != NULL) { - 803b57e: e00a b.n 803b596 + 803b5ae: e00a b.n 803b5c6 struct tcp_seg *old_ooseq = pcb->ooseq; - 803b580: 687b ldr r3, [r7, #4] - 803b582: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b584: 60fb str r3, [r7, #12] + 803b5b0: 687b ldr r3, [r7, #4] + 803b5b2: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b5b4: 60fb str r3, [r7, #12] pcb->ooseq = pcb->ooseq->next; - 803b586: 687b ldr r3, [r7, #4] - 803b588: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b58a: 681a ldr r2, [r3, #0] - 803b58c: 687b ldr r3, [r7, #4] - 803b58e: 675a str r2, [r3, #116] ; 0x74 + 803b5b6: 687b ldr r3, [r7, #4] + 803b5b8: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b5ba: 681a ldr r2, [r3, #0] + 803b5bc: 687b ldr r3, [r7, #4] + 803b5be: 675a str r2, [r3, #116] ; 0x74 tcp_seg_free(old_ooseq); - 803b590: 68f8 ldr r0, [r7, #12] - 803b592: f7fd fce8 bl 8038f66 + 803b5c0: 68f8 ldr r0, [r7, #12] + 803b5c2: f7fd fce8 bl 8038f96 while (pcb->ooseq != NULL) { - 803b596: 687b ldr r3, [r7, #4] - 803b598: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b59a: 2b00 cmp r3, #0 - 803b59c: d1f0 bne.n 803b580 - 803b59e: e0c8 b.n 803b732 + 803b5c6: 687b ldr r3, [r7, #4] + 803b5c8: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b5ca: 2b00 cmp r3, #0 + 803b5cc: d1f0 bne.n 803b5b0 + 803b5ce: e0c8 b.n 803b762 } } else { struct tcp_seg *next = pcb->ooseq; - 803b5a0: 687b ldr r3, [r7, #4] - 803b5a2: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b5a4: 63fb str r3, [r7, #60] ; 0x3c + 803b5d0: 687b ldr r3, [r7, #4] + 803b5d2: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b5d4: 63fb str r3, [r7, #60] ; 0x3c /* Remove all segments on ooseq that are covered by inseg already. * FIN is copied from ooseq to inseg if present. */ while (next && - 803b5a6: e052 b.n 803b64e + 803b5d6: e052 b.n 803b67e TCP_SEQ_GEQ(seqno + tcplen, next->tcphdr->seqno + next->len)) { struct tcp_seg *tmp; /* inseg cannot have FIN here (already processed above) */ if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 && - 803b5a8: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b5aa: 68db ldr r3, [r3, #12] - 803b5ac: 899b ldrh r3, [r3, #12] - 803b5ae: b29b uxth r3, r3 - 803b5b0: 4618 mov r0, r3 - 803b5b2: f7fa fc79 bl 8035ea8 - 803b5b6: 4603 mov r3, r0 - 803b5b8: b2db uxtb r3, r3 - 803b5ba: f003 0301 and.w r3, r3, #1 - 803b5be: 2b00 cmp r3, #0 - 803b5c0: d03d beq.n 803b63e + 803b5d8: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b5da: 68db ldr r3, [r3, #12] + 803b5dc: 899b ldrh r3, [r3, #12] + 803b5de: b29b uxth r3, r3 + 803b5e0: 4618 mov r0, r3 + 803b5e2: f7fa fc79 bl 8035ed8 + 803b5e6: 4603 mov r3, r0 + 803b5e8: b2db uxtb r3, r3 + 803b5ea: f003 0301 and.w r3, r3, #1 + 803b5ee: 2b00 cmp r3, #0 + 803b5f0: d03d beq.n 803b66e (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) { - 803b5c2: 4b17 ldr r3, [pc, #92] ; (803b620 ) - 803b5c4: 68db ldr r3, [r3, #12] - 803b5c6: 899b ldrh r3, [r3, #12] - 803b5c8: b29b uxth r3, r3 - 803b5ca: 4618 mov r0, r3 - 803b5cc: f7fa fc6c bl 8035ea8 - 803b5d0: 4603 mov r3, r0 - 803b5d2: b2db uxtb r3, r3 - 803b5d4: f003 0302 and.w r3, r3, #2 + 803b5f2: 4b17 ldr r3, [pc, #92] ; (803b650 ) + 803b5f4: 68db ldr r3, [r3, #12] + 803b5f6: 899b ldrh r3, [r3, #12] + 803b5f8: b29b uxth r3, r3 + 803b5fa: 4618 mov r0, r3 + 803b5fc: f7fa fc6c bl 8035ed8 + 803b600: 4603 mov r3, r0 + 803b602: b2db uxtb r3, r3 + 803b604: f003 0302 and.w r3, r3, #2 if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 && - 803b5d8: 2b00 cmp r3, #0 - 803b5da: d130 bne.n 803b63e + 803b608: 2b00 cmp r3, #0 + 803b60a: d130 bne.n 803b66e TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN); - 803b5dc: 4b10 ldr r3, [pc, #64] ; (803b620 ) - 803b5de: 68db ldr r3, [r3, #12] - 803b5e0: 899b ldrh r3, [r3, #12] - 803b5e2: b29c uxth r4, r3 - 803b5e4: 2001 movs r0, #1 - 803b5e6: f7fa fc5f bl 8035ea8 - 803b5ea: 4603 mov r3, r0 - 803b5ec: 461a mov r2, r3 - 803b5ee: 4b0c ldr r3, [pc, #48] ; (803b620 ) - 803b5f0: 68db ldr r3, [r3, #12] - 803b5f2: 4322 orrs r2, r4 - 803b5f4: b292 uxth r2, r2 - 803b5f6: 819a strh r2, [r3, #12] + 803b60c: 4b10 ldr r3, [pc, #64] ; (803b650 ) + 803b60e: 68db ldr r3, [r3, #12] + 803b610: 899b ldrh r3, [r3, #12] + 803b612: b29c uxth r4, r3 + 803b614: 2001 movs r0, #1 + 803b616: f7fa fc5f bl 8035ed8 + 803b61a: 4603 mov r3, r0 + 803b61c: 461a mov r2, r3 + 803b61e: 4b0c ldr r3, [pc, #48] ; (803b650 ) + 803b620: 68db ldr r3, [r3, #12] + 803b622: 4322 orrs r2, r4 + 803b624: b292 uxth r2, r2 + 803b626: 819a strh r2, [r3, #12] tcplen = TCP_TCPLEN(&inseg); - 803b5f8: 4b09 ldr r3, [pc, #36] ; (803b620 ) - 803b5fa: 891c ldrh r4, [r3, #8] - 803b5fc: 4b08 ldr r3, [pc, #32] ; (803b620 ) - 803b5fe: 68db ldr r3, [r3, #12] - 803b600: 899b ldrh r3, [r3, #12] - 803b602: b29b uxth r3, r3 - 803b604: 4618 mov r0, r3 - 803b606: f7fa fc4f bl 8035ea8 - 803b60a: 4603 mov r3, r0 - 803b60c: b2db uxtb r3, r3 - 803b60e: f003 0303 and.w r3, r3, #3 - 803b612: 2b00 cmp r3, #0 - 803b614: d00e beq.n 803b634 - 803b616: 2301 movs r3, #1 - 803b618: e00d b.n 803b636 - 803b61a: bf00 nop - 803b61c: 2400e990 .word 0x2400e990 - 803b620: 2400e970 .word 0x2400e970 - 803b624: 2400e99a .word 0x2400e99a - 803b628: 080434d0 .word 0x080434d0 - 803b62c: 08043878 .word 0x08043878 - 803b630: 0804351c .word 0x0804351c - 803b634: 2300 movs r3, #0 - 803b636: 4423 add r3, r4 - 803b638: b29a uxth r2, r3 - 803b63a: 4b98 ldr r3, [pc, #608] ; (803b89c ) - 803b63c: 801a strh r2, [r3, #0] + 803b628: 4b09 ldr r3, [pc, #36] ; (803b650 ) + 803b62a: 891c ldrh r4, [r3, #8] + 803b62c: 4b08 ldr r3, [pc, #32] ; (803b650 ) + 803b62e: 68db ldr r3, [r3, #12] + 803b630: 899b ldrh r3, [r3, #12] + 803b632: b29b uxth r3, r3 + 803b634: 4618 mov r0, r3 + 803b636: f7fa fc4f bl 8035ed8 + 803b63a: 4603 mov r3, r0 + 803b63c: b2db uxtb r3, r3 + 803b63e: f003 0303 and.w r3, r3, #3 + 803b642: 2b00 cmp r3, #0 + 803b644: d00e beq.n 803b664 + 803b646: 2301 movs r3, #1 + 803b648: e00d b.n 803b666 + 803b64a: bf00 nop + 803b64c: 2400e990 .word 0x2400e990 + 803b650: 2400e970 .word 0x2400e970 + 803b654: 2400e99a .word 0x2400e99a + 803b658: 08043500 .word 0x08043500 + 803b65c: 080438a8 .word 0x080438a8 + 803b660: 0804354c .word 0x0804354c + 803b664: 2300 movs r3, #0 + 803b666: 4423 add r3, r4 + 803b668: b29a uxth r2, r3 + 803b66a: 4b98 ldr r3, [pc, #608] ; (803b8cc ) + 803b66c: 801a strh r2, [r3, #0] } tmp = next; - 803b63e: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b640: 613b str r3, [r7, #16] + 803b66e: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b670: 613b str r3, [r7, #16] next = next->next; - 803b642: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b644: 681b ldr r3, [r3, #0] - 803b646: 63fb str r3, [r7, #60] ; 0x3c + 803b672: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b674: 681b ldr r3, [r3, #0] + 803b676: 63fb str r3, [r7, #60] ; 0x3c tcp_seg_free(tmp); - 803b648: 6938 ldr r0, [r7, #16] - 803b64a: f7fd fc8c bl 8038f66 + 803b678: 6938 ldr r0, [r7, #16] + 803b67a: f7fd fc8c bl 8038f96 while (next && - 803b64e: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b650: 2b00 cmp r3, #0 - 803b652: d00e beq.n 803b672 + 803b67e: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b680: 2b00 cmp r3, #0 + 803b682: d00e beq.n 803b6a2 TCP_SEQ_GEQ(seqno + tcplen, - 803b654: 4b91 ldr r3, [pc, #580] ; (803b89c ) - 803b656: 881b ldrh r3, [r3, #0] - 803b658: 461a mov r2, r3 - 803b65a: 4b91 ldr r3, [pc, #580] ; (803b8a0 ) - 803b65c: 681b ldr r3, [r3, #0] - 803b65e: 441a add r2, r3 - 803b660: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b662: 68db ldr r3, [r3, #12] - 803b664: 685b ldr r3, [r3, #4] - 803b666: 6bf9 ldr r1, [r7, #60] ; 0x3c - 803b668: 8909 ldrh r1, [r1, #8] - 803b66a: 440b add r3, r1 - 803b66c: 1ad3 subs r3, r2, r3 + 803b684: 4b91 ldr r3, [pc, #580] ; (803b8cc ) + 803b686: 881b ldrh r3, [r3, #0] + 803b688: 461a mov r2, r3 + 803b68a: 4b91 ldr r3, [pc, #580] ; (803b8d0 ) + 803b68c: 681b ldr r3, [r3, #0] + 803b68e: 441a add r2, r3 + 803b690: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b692: 68db ldr r3, [r3, #12] + 803b694: 685b ldr r3, [r3, #4] + 803b696: 6bf9 ldr r1, [r7, #60] ; 0x3c + 803b698: 8909 ldrh r1, [r1, #8] + 803b69a: 440b add r3, r1 + 803b69c: 1ad3 subs r3, r2, r3 while (next && - 803b66e: 2b00 cmp r3, #0 - 803b670: da9a bge.n 803b5a8 + 803b69e: 2b00 cmp r3, #0 + 803b6a0: da9a bge.n 803b5d8 } /* Now trim right side of inseg if it overlaps with the first * segment on ooseq */ if (next && - 803b672: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b674: 2b00 cmp r3, #0 - 803b676: d059 beq.n 803b72c + 803b6a2: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b6a4: 2b00 cmp r3, #0 + 803b6a6: d059 beq.n 803b75c TCP_SEQ_GT(seqno + tcplen, - 803b678: 4b88 ldr r3, [pc, #544] ; (803b89c ) - 803b67a: 881b ldrh r3, [r3, #0] - 803b67c: 461a mov r2, r3 - 803b67e: 4b88 ldr r3, [pc, #544] ; (803b8a0 ) - 803b680: 681b ldr r3, [r3, #0] - 803b682: 441a add r2, r3 - 803b684: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b686: 68db ldr r3, [r3, #12] - 803b688: 685b ldr r3, [r3, #4] - 803b68a: 1ad3 subs r3, r2, r3 + 803b6a8: 4b88 ldr r3, [pc, #544] ; (803b8cc ) + 803b6aa: 881b ldrh r3, [r3, #0] + 803b6ac: 461a mov r2, r3 + 803b6ae: 4b88 ldr r3, [pc, #544] ; (803b8d0 ) + 803b6b0: 681b ldr r3, [r3, #0] + 803b6b2: 441a add r2, r3 + 803b6b4: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b6b6: 68db ldr r3, [r3, #12] + 803b6b8: 685b ldr r3, [r3, #4] + 803b6ba: 1ad3 subs r3, r2, r3 if (next && - 803b68c: 2b00 cmp r3, #0 - 803b68e: dd4d ble.n 803b72c + 803b6bc: 2b00 cmp r3, #0 + 803b6be: dd4d ble.n 803b75c next->tcphdr->seqno)) { /* inseg cannot have FIN here (already processed above) */ inseg.len = (u16_t)(next->tcphdr->seqno - seqno); - 803b690: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b692: 68db ldr r3, [r3, #12] - 803b694: 685b ldr r3, [r3, #4] - 803b696: b29a uxth r2, r3 - 803b698: 4b81 ldr r3, [pc, #516] ; (803b8a0 ) - 803b69a: 681b ldr r3, [r3, #0] - 803b69c: b29b uxth r3, r3 - 803b69e: 1ad3 subs r3, r2, r3 - 803b6a0: b29a uxth r2, r3 - 803b6a2: 4b80 ldr r3, [pc, #512] ; (803b8a4 ) - 803b6a4: 811a strh r2, [r3, #8] + 803b6c0: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b6c2: 68db ldr r3, [r3, #12] + 803b6c4: 685b ldr r3, [r3, #4] + 803b6c6: b29a uxth r2, r3 + 803b6c8: 4b81 ldr r3, [pc, #516] ; (803b8d0 ) + 803b6ca: 681b ldr r3, [r3, #0] + 803b6cc: b29b uxth r3, r3 + 803b6ce: 1ad3 subs r3, r2, r3 + 803b6d0: b29a uxth r2, r3 + 803b6d2: 4b80 ldr r3, [pc, #512] ; (803b8d4 ) + 803b6d4: 811a strh r2, [r3, #8] if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { - 803b6a6: 4b7f ldr r3, [pc, #508] ; (803b8a4 ) - 803b6a8: 68db ldr r3, [r3, #12] - 803b6aa: 899b ldrh r3, [r3, #12] - 803b6ac: b29b uxth r3, r3 - 803b6ae: 4618 mov r0, r3 - 803b6b0: f7fa fbfa bl 8035ea8 - 803b6b4: 4603 mov r3, r0 - 803b6b6: b2db uxtb r3, r3 - 803b6b8: f003 0302 and.w r3, r3, #2 - 803b6bc: 2b00 cmp r3, #0 - 803b6be: d005 beq.n 803b6cc + 803b6d6: 4b7f ldr r3, [pc, #508] ; (803b8d4 ) + 803b6d8: 68db ldr r3, [r3, #12] + 803b6da: 899b ldrh r3, [r3, #12] + 803b6dc: b29b uxth r3, r3 + 803b6de: 4618 mov r0, r3 + 803b6e0: f7fa fbfa bl 8035ed8 + 803b6e4: 4603 mov r3, r0 + 803b6e6: b2db uxtb r3, r3 + 803b6e8: f003 0302 and.w r3, r3, #2 + 803b6ec: 2b00 cmp r3, #0 + 803b6ee: d005 beq.n 803b6fc inseg.len -= 1; - 803b6c0: 4b78 ldr r3, [pc, #480] ; (803b8a4 ) - 803b6c2: 891b ldrh r3, [r3, #8] - 803b6c4: 3b01 subs r3, #1 - 803b6c6: b29a uxth r2, r3 - 803b6c8: 4b76 ldr r3, [pc, #472] ; (803b8a4 ) - 803b6ca: 811a strh r2, [r3, #8] + 803b6f0: 4b78 ldr r3, [pc, #480] ; (803b8d4 ) + 803b6f2: 891b ldrh r3, [r3, #8] + 803b6f4: 3b01 subs r3, #1 + 803b6f6: b29a uxth r2, r3 + 803b6f8: 4b76 ldr r3, [pc, #472] ; (803b8d4 ) + 803b6fa: 811a strh r2, [r3, #8] } pbuf_realloc(inseg.p, inseg.len); - 803b6cc: 4b75 ldr r3, [pc, #468] ; (803b8a4 ) - 803b6ce: 685b ldr r3, [r3, #4] - 803b6d0: 4a74 ldr r2, [pc, #464] ; (803b8a4 ) - 803b6d2: 8912 ldrh r2, [r2, #8] - 803b6d4: 4611 mov r1, r2 - 803b6d6: 4618 mov r0, r3 - 803b6d8: f7fb fe92 bl 8037400 + 803b6fc: 4b75 ldr r3, [pc, #468] ; (803b8d4 ) + 803b6fe: 685b ldr r3, [r3, #4] + 803b700: 4a74 ldr r2, [pc, #464] ; (803b8d4 ) + 803b702: 8912 ldrh r2, [r2, #8] + 803b704: 4611 mov r1, r2 + 803b706: 4618 mov r0, r3 + 803b708: f7fb fe92 bl 8037430 tcplen = TCP_TCPLEN(&inseg); - 803b6dc: 4b71 ldr r3, [pc, #452] ; (803b8a4 ) - 803b6de: 891c ldrh r4, [r3, #8] - 803b6e0: 4b70 ldr r3, [pc, #448] ; (803b8a4 ) - 803b6e2: 68db ldr r3, [r3, #12] - 803b6e4: 899b ldrh r3, [r3, #12] - 803b6e6: b29b uxth r3, r3 - 803b6e8: 4618 mov r0, r3 - 803b6ea: f7fa fbdd bl 8035ea8 - 803b6ee: 4603 mov r3, r0 - 803b6f0: b2db uxtb r3, r3 - 803b6f2: f003 0303 and.w r3, r3, #3 - 803b6f6: 2b00 cmp r3, #0 - 803b6f8: d001 beq.n 803b6fe - 803b6fa: 2301 movs r3, #1 - 803b6fc: e000 b.n 803b700 - 803b6fe: 2300 movs r3, #0 - 803b700: 4423 add r3, r4 - 803b702: b29a uxth r2, r3 - 803b704: 4b65 ldr r3, [pc, #404] ; (803b89c ) - 803b706: 801a strh r2, [r3, #0] + 803b70c: 4b71 ldr r3, [pc, #452] ; (803b8d4 ) + 803b70e: 891c ldrh r4, [r3, #8] + 803b710: 4b70 ldr r3, [pc, #448] ; (803b8d4 ) + 803b712: 68db ldr r3, [r3, #12] + 803b714: 899b ldrh r3, [r3, #12] + 803b716: b29b uxth r3, r3 + 803b718: 4618 mov r0, r3 + 803b71a: f7fa fbdd bl 8035ed8 + 803b71e: 4603 mov r3, r0 + 803b720: b2db uxtb r3, r3 + 803b722: f003 0303 and.w r3, r3, #3 + 803b726: 2b00 cmp r3, #0 + 803b728: d001 beq.n 803b72e + 803b72a: 2301 movs r3, #1 + 803b72c: e000 b.n 803b730 + 803b72e: 2300 movs r3, #0 + 803b730: 4423 add r3, r4 + 803b732: b29a uxth r2, r3 + 803b734: 4b65 ldr r3, [pc, #404] ; (803b8cc ) + 803b736: 801a strh r2, [r3, #0] LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n", - 803b708: 4b64 ldr r3, [pc, #400] ; (803b89c ) - 803b70a: 881b ldrh r3, [r3, #0] - 803b70c: 461a mov r2, r3 - 803b70e: 4b64 ldr r3, [pc, #400] ; (803b8a0 ) - 803b710: 681b ldr r3, [r3, #0] - 803b712: 441a add r2, r3 - 803b714: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b716: 68db ldr r3, [r3, #12] - 803b718: 685b ldr r3, [r3, #4] - 803b71a: 429a cmp r2, r3 - 803b71c: d006 beq.n 803b72c - 803b71e: 4b62 ldr r3, [pc, #392] ; (803b8a8 ) - 803b720: f240 52fc movw r2, #1532 ; 0x5fc - 803b724: 4961 ldr r1, [pc, #388] ; (803b8ac ) - 803b726: 4862 ldr r0, [pc, #392] ; (803b8b0 ) - 803b728: f005 f9da bl 8040ae0 + 803b738: 4b64 ldr r3, [pc, #400] ; (803b8cc ) + 803b73a: 881b ldrh r3, [r3, #0] + 803b73c: 461a mov r2, r3 + 803b73e: 4b64 ldr r3, [pc, #400] ; (803b8d0 ) + 803b740: 681b ldr r3, [r3, #0] + 803b742: 441a add r2, r3 + 803b744: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b746: 68db ldr r3, [r3, #12] + 803b748: 685b ldr r3, [r3, #4] + 803b74a: 429a cmp r2, r3 + 803b74c: d006 beq.n 803b75c + 803b74e: 4b62 ldr r3, [pc, #392] ; (803b8d8 ) + 803b750: f240 52fc movw r2, #1532 ; 0x5fc + 803b754: 4961 ldr r1, [pc, #388] ; (803b8dc ) + 803b756: 4862 ldr r0, [pc, #392] ; (803b8e0 ) + 803b758: f005 f9da bl 8040b10 (seqno + tcplen) == next->tcphdr->seqno); } pcb->ooseq = next; - 803b72c: 687b ldr r3, [r7, #4] - 803b72e: 6bfa ldr r2, [r7, #60] ; 0x3c - 803b730: 675a str r2, [r3, #116] ; 0x74 + 803b75c: 687b ldr r3, [r7, #4] + 803b75e: 6bfa ldr r2, [r7, #60] ; 0x3c + 803b760: 675a str r2, [r3, #116] ; 0x74 } } #endif /* TCP_QUEUE_OOSEQ */ pcb->rcv_nxt = seqno + tcplen; - 803b732: 4b5a ldr r3, [pc, #360] ; (803b89c ) - 803b734: 881b ldrh r3, [r3, #0] - 803b736: 461a mov r2, r3 - 803b738: 4b59 ldr r3, [pc, #356] ; (803b8a0 ) - 803b73a: 681b ldr r3, [r3, #0] - 803b73c: 441a add r2, r3 - 803b73e: 687b ldr r3, [r7, #4] - 803b740: 625a str r2, [r3, #36] ; 0x24 + 803b762: 4b5a ldr r3, [pc, #360] ; (803b8cc ) + 803b764: 881b ldrh r3, [r3, #0] + 803b766: 461a mov r2, r3 + 803b768: 4b59 ldr r3, [pc, #356] ; (803b8d0 ) + 803b76a: 681b ldr r3, [r3, #0] + 803b76c: 441a add r2, r3 + 803b76e: 687b ldr r3, [r7, #4] + 803b770: 625a str r2, [r3, #36] ; 0x24 /* Update the receiver's (our) window. */ LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen); - 803b742: 687b ldr r3, [r7, #4] - 803b744: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b746: 4b55 ldr r3, [pc, #340] ; (803b89c ) - 803b748: 881b ldrh r3, [r3, #0] - 803b74a: 429a cmp r2, r3 - 803b74c: d206 bcs.n 803b75c - 803b74e: 4b56 ldr r3, [pc, #344] ; (803b8a8 ) - 803b750: f240 6207 movw r2, #1543 ; 0x607 - 803b754: 4957 ldr r1, [pc, #348] ; (803b8b4 ) - 803b756: 4856 ldr r0, [pc, #344] ; (803b8b0 ) - 803b758: f005 f9c2 bl 8040ae0 + 803b772: 687b ldr r3, [r7, #4] + 803b774: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b776: 4b55 ldr r3, [pc, #340] ; (803b8cc ) + 803b778: 881b ldrh r3, [r3, #0] + 803b77a: 429a cmp r2, r3 + 803b77c: d206 bcs.n 803b78c + 803b77e: 4b56 ldr r3, [pc, #344] ; (803b8d8 ) + 803b780: f240 6207 movw r2, #1543 ; 0x607 + 803b784: 4957 ldr r1, [pc, #348] ; (803b8e4 ) + 803b786: 4856 ldr r0, [pc, #344] ; (803b8e0 ) + 803b788: f005 f9c2 bl 8040b10 pcb->rcv_wnd -= tcplen; - 803b75c: 687b ldr r3, [r7, #4] - 803b75e: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b760: 4b4e ldr r3, [pc, #312] ; (803b89c ) - 803b762: 881b ldrh r3, [r3, #0] - 803b764: 1ad3 subs r3, r2, r3 - 803b766: b29a uxth r2, r3 - 803b768: 687b ldr r3, [r7, #4] - 803b76a: 851a strh r2, [r3, #40] ; 0x28 + 803b78c: 687b ldr r3, [r7, #4] + 803b78e: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b790: 4b4e ldr r3, [pc, #312] ; (803b8cc ) + 803b792: 881b ldrh r3, [r3, #0] + 803b794: 1ad3 subs r3, r2, r3 + 803b796: b29a uxth r2, r3 + 803b798: 687b ldr r3, [r7, #4] + 803b79a: 851a strh r2, [r3, #40] ; 0x28 tcp_update_rcv_ann_wnd(pcb); - 803b76c: 6878 ldr r0, [r7, #4] - 803b76e: f7fc fed5 bl 803851c + 803b79c: 6878 ldr r0, [r7, #4] + 803b79e: f7fc fed5 bl 803854c chains its data on this pbuf as well. If the segment was a FIN, we set the TF_GOT_FIN flag that will be used to indicate to the application that the remote side has closed its end of the connection. */ if (inseg.p->tot_len > 0) { - 803b772: 4b4c ldr r3, [pc, #304] ; (803b8a4 ) - 803b774: 685b ldr r3, [r3, #4] - 803b776: 891b ldrh r3, [r3, #8] - 803b778: 2b00 cmp r3, #0 - 803b77a: d006 beq.n 803b78a + 803b7a2: 4b4c ldr r3, [pc, #304] ; (803b8d4 ) + 803b7a4: 685b ldr r3, [r3, #4] + 803b7a6: 891b ldrh r3, [r3, #8] + 803b7a8: 2b00 cmp r3, #0 + 803b7aa: d006 beq.n 803b7ba recv_data = inseg.p; - 803b77c: 4b49 ldr r3, [pc, #292] ; (803b8a4 ) - 803b77e: 685b ldr r3, [r3, #4] - 803b780: 4a4d ldr r2, [pc, #308] ; (803b8b8 ) - 803b782: 6013 str r3, [r2, #0] + 803b7ac: 4b49 ldr r3, [pc, #292] ; (803b8d4 ) + 803b7ae: 685b ldr r3, [r3, #4] + 803b7b0: 4a4d ldr r2, [pc, #308] ; (803b8e8 ) + 803b7b2: 6013 str r3, [r2, #0] /* Since this pbuf now is the responsibility of the application, we delete our reference to it so that we won't (mistakingly) deallocate it. */ inseg.p = NULL; - 803b784: 4b47 ldr r3, [pc, #284] ; (803b8a4 ) - 803b786: 2200 movs r2, #0 - 803b788: 605a str r2, [r3, #4] + 803b7b4: 4b47 ldr r3, [pc, #284] ; (803b8d4 ) + 803b7b6: 2200 movs r2, #0 + 803b7b8: 605a str r2, [r3, #4] } if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { - 803b78a: 4b46 ldr r3, [pc, #280] ; (803b8a4 ) - 803b78c: 68db ldr r3, [r3, #12] - 803b78e: 899b ldrh r3, [r3, #12] - 803b790: b29b uxth r3, r3 - 803b792: 4618 mov r0, r3 - 803b794: f7fa fb88 bl 8035ea8 - 803b798: 4603 mov r3, r0 - 803b79a: b2db uxtb r3, r3 - 803b79c: f003 0301 and.w r3, r3, #1 - 803b7a0: 2b00 cmp r3, #0 - 803b7a2: f000 80b8 beq.w 803b916 + 803b7ba: 4b46 ldr r3, [pc, #280] ; (803b8d4 ) + 803b7bc: 68db ldr r3, [r3, #12] + 803b7be: 899b ldrh r3, [r3, #12] + 803b7c0: b29b uxth r3, r3 + 803b7c2: 4618 mov r0, r3 + 803b7c4: f7fa fb88 bl 8035ed8 + 803b7c8: 4603 mov r3, r0 + 803b7ca: b2db uxtb r3, r3 + 803b7cc: f003 0301 and.w r3, r3, #1 + 803b7d0: 2b00 cmp r3, #0 + 803b7d2: f000 80b8 beq.w 803b946 LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n")); recv_flags |= TF_GOT_FIN; - 803b7a6: 4b45 ldr r3, [pc, #276] ; (803b8bc ) - 803b7a8: 781b ldrb r3, [r3, #0] - 803b7aa: f043 0320 orr.w r3, r3, #32 - 803b7ae: b2da uxtb r2, r3 - 803b7b0: 4b42 ldr r3, [pc, #264] ; (803b8bc ) - 803b7b2: 701a strb r2, [r3, #0] + 803b7d6: 4b45 ldr r3, [pc, #276] ; (803b8ec ) + 803b7d8: 781b ldrb r3, [r3, #0] + 803b7da: f043 0320 orr.w r3, r3, #32 + 803b7de: b2da uxtb r2, r3 + 803b7e0: 4b42 ldr r3, [pc, #264] ; (803b8ec ) + 803b7e2: 701a strb r2, [r3, #0] } #if TCP_QUEUE_OOSEQ /* We now check if we have segments on the ->ooseq queue that are now in sequence. */ while (pcb->ooseq != NULL && - 803b7b4: e0af b.n 803b916 + 803b7e4: e0af b.n 803b946 pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) { struct tcp_seg *cseg = pcb->ooseq; - 803b7b6: 687b ldr r3, [r7, #4] - 803b7b8: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b7ba: 60bb str r3, [r7, #8] + 803b7e6: 687b ldr r3, [r7, #4] + 803b7e8: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b7ea: 60bb str r3, [r7, #8] seqno = pcb->ooseq->tcphdr->seqno; - 803b7bc: 687b ldr r3, [r7, #4] - 803b7be: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b7c0: 68db ldr r3, [r3, #12] - 803b7c2: 685b ldr r3, [r3, #4] - 803b7c4: 4a36 ldr r2, [pc, #216] ; (803b8a0 ) - 803b7c6: 6013 str r3, [r2, #0] + 803b7ec: 687b ldr r3, [r7, #4] + 803b7ee: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b7f0: 68db ldr r3, [r3, #12] + 803b7f2: 685b ldr r3, [r3, #4] + 803b7f4: 4a36 ldr r2, [pc, #216] ; (803b8d0 ) + 803b7f6: 6013 str r3, [r2, #0] pcb->rcv_nxt += TCP_TCPLEN(cseg); - 803b7c8: 68bb ldr r3, [r7, #8] - 803b7ca: 891b ldrh r3, [r3, #8] - 803b7cc: 461c mov r4, r3 - 803b7ce: 68bb ldr r3, [r7, #8] - 803b7d0: 68db ldr r3, [r3, #12] - 803b7d2: 899b ldrh r3, [r3, #12] - 803b7d4: b29b uxth r3, r3 - 803b7d6: 4618 mov r0, r3 - 803b7d8: f7fa fb66 bl 8035ea8 - 803b7dc: 4603 mov r3, r0 - 803b7de: b2db uxtb r3, r3 - 803b7e0: f003 0303 and.w r3, r3, #3 - 803b7e4: 2b00 cmp r3, #0 - 803b7e6: d001 beq.n 803b7ec - 803b7e8: 2301 movs r3, #1 - 803b7ea: e000 b.n 803b7ee - 803b7ec: 2300 movs r3, #0 - 803b7ee: 191a adds r2, r3, r4 - 803b7f0: 687b ldr r3, [r7, #4] - 803b7f2: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b7f4: 441a add r2, r3 - 803b7f6: 687b ldr r3, [r7, #4] - 803b7f8: 625a str r2, [r3, #36] ; 0x24 + 803b7f8: 68bb ldr r3, [r7, #8] + 803b7fa: 891b ldrh r3, [r3, #8] + 803b7fc: 461c mov r4, r3 + 803b7fe: 68bb ldr r3, [r7, #8] + 803b800: 68db ldr r3, [r3, #12] + 803b802: 899b ldrh r3, [r3, #12] + 803b804: b29b uxth r3, r3 + 803b806: 4618 mov r0, r3 + 803b808: f7fa fb66 bl 8035ed8 + 803b80c: 4603 mov r3, r0 + 803b80e: b2db uxtb r3, r3 + 803b810: f003 0303 and.w r3, r3, #3 + 803b814: 2b00 cmp r3, #0 + 803b816: d001 beq.n 803b81c + 803b818: 2301 movs r3, #1 + 803b81a: e000 b.n 803b81e + 803b81c: 2300 movs r3, #0 + 803b81e: 191a adds r2, r3, r4 + 803b820: 687b ldr r3, [r7, #4] + 803b822: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b824: 441a add r2, r3 + 803b826: 687b ldr r3, [r7, #4] + 803b828: 625a str r2, [r3, #36] ; 0x24 LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n", - 803b7fa: 687b ldr r3, [r7, #4] - 803b7fc: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803b7fe: 461c mov r4, r3 - 803b800: 68bb ldr r3, [r7, #8] - 803b802: 891b ldrh r3, [r3, #8] - 803b804: 461d mov r5, r3 - 803b806: 68bb ldr r3, [r7, #8] - 803b808: 68db ldr r3, [r3, #12] - 803b80a: 899b ldrh r3, [r3, #12] - 803b80c: b29b uxth r3, r3 - 803b80e: 4618 mov r0, r3 - 803b810: f7fa fb4a bl 8035ea8 - 803b814: 4603 mov r3, r0 - 803b816: b2db uxtb r3, r3 - 803b818: f003 0303 and.w r3, r3, #3 - 803b81c: 2b00 cmp r3, #0 - 803b81e: d001 beq.n 803b824 - 803b820: 2301 movs r3, #1 - 803b822: e000 b.n 803b826 - 803b824: 2300 movs r3, #0 - 803b826: 442b add r3, r5 - 803b828: 429c cmp r4, r3 - 803b82a: d206 bcs.n 803b83a - 803b82c: 4b1e ldr r3, [pc, #120] ; (803b8a8 ) - 803b82e: f240 622b movw r2, #1579 ; 0x62b - 803b832: 4923 ldr r1, [pc, #140] ; (803b8c0 ) - 803b834: 481e ldr r0, [pc, #120] ; (803b8b0 ) - 803b836: f005 f953 bl 8040ae0 + 803b82a: 687b ldr r3, [r7, #4] + 803b82c: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803b82e: 461c mov r4, r3 + 803b830: 68bb ldr r3, [r7, #8] + 803b832: 891b ldrh r3, [r3, #8] + 803b834: 461d mov r5, r3 + 803b836: 68bb ldr r3, [r7, #8] + 803b838: 68db ldr r3, [r3, #12] + 803b83a: 899b ldrh r3, [r3, #12] + 803b83c: b29b uxth r3, r3 + 803b83e: 4618 mov r0, r3 + 803b840: f7fa fb4a bl 8035ed8 + 803b844: 4603 mov r3, r0 + 803b846: b2db uxtb r3, r3 + 803b848: f003 0303 and.w r3, r3, #3 + 803b84c: 2b00 cmp r3, #0 + 803b84e: d001 beq.n 803b854 + 803b850: 2301 movs r3, #1 + 803b852: e000 b.n 803b856 + 803b854: 2300 movs r3, #0 + 803b856: 442b add r3, r5 + 803b858: 429c cmp r4, r3 + 803b85a: d206 bcs.n 803b86a + 803b85c: 4b1e ldr r3, [pc, #120] ; (803b8d8 ) + 803b85e: f240 622b movw r2, #1579 ; 0x62b + 803b862: 4923 ldr r1, [pc, #140] ; (803b8f0 ) + 803b864: 481e ldr r0, [pc, #120] ; (803b8e0 ) + 803b866: f005 f953 bl 8040b10 pcb->rcv_wnd >= TCP_TCPLEN(cseg)); pcb->rcv_wnd -= TCP_TCPLEN(cseg); - 803b83a: 68bb ldr r3, [r7, #8] - 803b83c: 891b ldrh r3, [r3, #8] - 803b83e: 461c mov r4, r3 - 803b840: 68bb ldr r3, [r7, #8] - 803b842: 68db ldr r3, [r3, #12] - 803b844: 899b ldrh r3, [r3, #12] - 803b846: b29b uxth r3, r3 - 803b848: 4618 mov r0, r3 - 803b84a: f7fa fb2d bl 8035ea8 - 803b84e: 4603 mov r3, r0 - 803b850: b2db uxtb r3, r3 - 803b852: f003 0303 and.w r3, r3, #3 - 803b856: 2b00 cmp r3, #0 - 803b858: d001 beq.n 803b85e - 803b85a: 2301 movs r3, #1 - 803b85c: e000 b.n 803b860 - 803b85e: 2300 movs r3, #0 - 803b860: 1919 adds r1, r3, r4 - 803b862: 687b ldr r3, [r7, #4] - 803b864: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b866: b28b uxth r3, r1 - 803b868: 1ad3 subs r3, r2, r3 - 803b86a: b29a uxth r2, r3 - 803b86c: 687b ldr r3, [r7, #4] - 803b86e: 851a strh r2, [r3, #40] ; 0x28 + 803b86a: 68bb ldr r3, [r7, #8] + 803b86c: 891b ldrh r3, [r3, #8] + 803b86e: 461c mov r4, r3 + 803b870: 68bb ldr r3, [r7, #8] + 803b872: 68db ldr r3, [r3, #12] + 803b874: 899b ldrh r3, [r3, #12] + 803b876: b29b uxth r3, r3 + 803b878: 4618 mov r0, r3 + 803b87a: f7fa fb2d bl 8035ed8 + 803b87e: 4603 mov r3, r0 + 803b880: b2db uxtb r3, r3 + 803b882: f003 0303 and.w r3, r3, #3 + 803b886: 2b00 cmp r3, #0 + 803b888: d001 beq.n 803b88e + 803b88a: 2301 movs r3, #1 + 803b88c: e000 b.n 803b890 + 803b88e: 2300 movs r3, #0 + 803b890: 1919 adds r1, r3, r4 + 803b892: 687b ldr r3, [r7, #4] + 803b894: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b896: b28b uxth r3, r1 + 803b898: 1ad3 subs r3, r2, r3 + 803b89a: b29a uxth r2, r3 + 803b89c: 687b ldr r3, [r7, #4] + 803b89e: 851a strh r2, [r3, #40] ; 0x28 tcp_update_rcv_ann_wnd(pcb); - 803b870: 6878 ldr r0, [r7, #4] - 803b872: f7fc fe53 bl 803851c + 803b8a0: 6878 ldr r0, [r7, #4] + 803b8a2: f7fc fe53 bl 803854c if (cseg->p->tot_len > 0) { - 803b876: 68bb ldr r3, [r7, #8] - 803b878: 685b ldr r3, [r3, #4] - 803b87a: 891b ldrh r3, [r3, #8] - 803b87c: 2b00 cmp r3, #0 - 803b87e: d028 beq.n 803b8d2 + 803b8a6: 68bb ldr r3, [r7, #8] + 803b8a8: 685b ldr r3, [r3, #4] + 803b8aa: 891b ldrh r3, [r3, #8] + 803b8ac: 2b00 cmp r3, #0 + 803b8ae: d028 beq.n 803b902 /* Chain this pbuf onto the pbuf that we will pass to the application. */ /* With window scaling, this can overflow recv_data->tot_len, but that's not a problem since we explicitly fix that before passing recv_data to the application. */ if (recv_data) { - 803b880: 4b0d ldr r3, [pc, #52] ; (803b8b8 ) - 803b882: 681b ldr r3, [r3, #0] - 803b884: 2b00 cmp r3, #0 - 803b886: d01d beq.n 803b8c4 + 803b8b0: 4b0d ldr r3, [pc, #52] ; (803b8e8 ) + 803b8b2: 681b ldr r3, [r3, #0] + 803b8b4: 2b00 cmp r3, #0 + 803b8b6: d01d beq.n 803b8f4 pbuf_cat(recv_data, cseg->p); - 803b888: 4b0b ldr r3, [pc, #44] ; (803b8b8 ) - 803b88a: 681a ldr r2, [r3, #0] - 803b88c: 68bb ldr r3, [r7, #8] - 803b88e: 685b ldr r3, [r3, #4] - 803b890: 4619 mov r1, r3 - 803b892: 4610 mov r0, r2 - 803b894: f7fb fffc bl 8037890 - 803b898: e018 b.n 803b8cc - 803b89a: bf00 nop - 803b89c: 2400e99a .word 0x2400e99a - 803b8a0: 2400e990 .word 0x2400e990 - 803b8a4: 2400e970 .word 0x2400e970 - 803b8a8: 080434d0 .word 0x080434d0 - 803b8ac: 080438b0 .word 0x080438b0 - 803b8b0: 0804351c .word 0x0804351c - 803b8b4: 080438ec .word 0x080438ec - 803b8b8: 2400e9a0 .word 0x2400e9a0 - 803b8bc: 2400e99d .word 0x2400e99d - 803b8c0: 0804390c .word 0x0804390c + 803b8b8: 4b0b ldr r3, [pc, #44] ; (803b8e8 ) + 803b8ba: 681a ldr r2, [r3, #0] + 803b8bc: 68bb ldr r3, [r7, #8] + 803b8be: 685b ldr r3, [r3, #4] + 803b8c0: 4619 mov r1, r3 + 803b8c2: 4610 mov r0, r2 + 803b8c4: f7fb fffc bl 80378c0 + 803b8c8: e018 b.n 803b8fc + 803b8ca: bf00 nop + 803b8cc: 2400e99a .word 0x2400e99a + 803b8d0: 2400e990 .word 0x2400e990 + 803b8d4: 2400e970 .word 0x2400e970 + 803b8d8: 08043500 .word 0x08043500 + 803b8dc: 080438e0 .word 0x080438e0 + 803b8e0: 0804354c .word 0x0804354c + 803b8e4: 0804391c .word 0x0804391c + 803b8e8: 2400e9a0 .word 0x2400e9a0 + 803b8ec: 2400e99d .word 0x2400e99d + 803b8f0: 0804393c .word 0x0804393c } else { recv_data = cseg->p; - 803b8c4: 68bb ldr r3, [r7, #8] - 803b8c6: 685b ldr r3, [r3, #4] - 803b8c8: 4a70 ldr r2, [pc, #448] ; (803ba8c ) - 803b8ca: 6013 str r3, [r2, #0] + 803b8f4: 68bb ldr r3, [r7, #8] + 803b8f6: 685b ldr r3, [r3, #4] + 803b8f8: 4a70 ldr r2, [pc, #448] ; (803babc ) + 803b8fa: 6013 str r3, [r2, #0] } cseg->p = NULL; - 803b8cc: 68bb ldr r3, [r7, #8] - 803b8ce: 2200 movs r2, #0 - 803b8d0: 605a str r2, [r3, #4] + 803b8fc: 68bb ldr r3, [r7, #8] + 803b8fe: 2200 movs r2, #0 + 803b900: 605a str r2, [r3, #4] } if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { - 803b8d2: 68bb ldr r3, [r7, #8] - 803b8d4: 68db ldr r3, [r3, #12] - 803b8d6: 899b ldrh r3, [r3, #12] - 803b8d8: b29b uxth r3, r3 - 803b8da: 4618 mov r0, r3 - 803b8dc: f7fa fae4 bl 8035ea8 - 803b8e0: 4603 mov r3, r0 - 803b8e2: b2db uxtb r3, r3 - 803b8e4: f003 0301 and.w r3, r3, #1 - 803b8e8: 2b00 cmp r3, #0 - 803b8ea: d00d beq.n 803b908 + 803b902: 68bb ldr r3, [r7, #8] + 803b904: 68db ldr r3, [r3, #12] + 803b906: 899b ldrh r3, [r3, #12] + 803b908: b29b uxth r3, r3 + 803b90a: 4618 mov r0, r3 + 803b90c: f7fa fae4 bl 8035ed8 + 803b910: 4603 mov r3, r0 + 803b912: b2db uxtb r3, r3 + 803b914: f003 0301 and.w r3, r3, #1 + 803b918: 2b00 cmp r3, #0 + 803b91a: d00d beq.n 803b938 LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n")); recv_flags |= TF_GOT_FIN; - 803b8ec: 4b68 ldr r3, [pc, #416] ; (803ba90 ) - 803b8ee: 781b ldrb r3, [r3, #0] - 803b8f0: f043 0320 orr.w r3, r3, #32 - 803b8f4: b2da uxtb r2, r3 - 803b8f6: 4b66 ldr r3, [pc, #408] ; (803ba90 ) - 803b8f8: 701a strb r2, [r3, #0] + 803b91c: 4b68 ldr r3, [pc, #416] ; (803bac0 ) + 803b91e: 781b ldrb r3, [r3, #0] + 803b920: f043 0320 orr.w r3, r3, #32 + 803b924: b2da uxtb r2, r3 + 803b926: 4b66 ldr r3, [pc, #408] ; (803bac0 ) + 803b928: 701a strb r2, [r3, #0] if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */ - 803b8fa: 687b ldr r3, [r7, #4] - 803b8fc: 7d1b ldrb r3, [r3, #20] - 803b8fe: 2b04 cmp r3, #4 - 803b900: d102 bne.n 803b908 + 803b92a: 687b ldr r3, [r7, #4] + 803b92c: 7d1b ldrb r3, [r3, #20] + 803b92e: 2b04 cmp r3, #4 + 803b930: d102 bne.n 803b938 pcb->state = CLOSE_WAIT; - 803b902: 687b ldr r3, [r7, #4] - 803b904: 2207 movs r2, #7 - 803b906: 751a strb r2, [r3, #20] + 803b932: 687b ldr r3, [r7, #4] + 803b934: 2207 movs r2, #7 + 803b936: 751a strb r2, [r3, #20] } } pcb->ooseq = cseg->next; - 803b908: 68bb ldr r3, [r7, #8] - 803b90a: 681a ldr r2, [r3, #0] - 803b90c: 687b ldr r3, [r7, #4] - 803b90e: 675a str r2, [r3, #116] ; 0x74 + 803b938: 68bb ldr r3, [r7, #8] + 803b93a: 681a ldr r2, [r3, #0] + 803b93c: 687b ldr r3, [r7, #4] + 803b93e: 675a str r2, [r3, #116] ; 0x74 tcp_seg_free(cseg); - 803b910: 68b8 ldr r0, [r7, #8] - 803b912: f7fd fb28 bl 8038f66 + 803b940: 68b8 ldr r0, [r7, #8] + 803b942: f7fd fb28 bl 8038f96 while (pcb->ooseq != NULL && - 803b916: 687b ldr r3, [r7, #4] - 803b918: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b91a: 2b00 cmp r3, #0 - 803b91c: d008 beq.n 803b930 + 803b946: 687b ldr r3, [r7, #4] + 803b948: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b94a: 2b00 cmp r3, #0 + 803b94c: d008 beq.n 803b960 pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) { - 803b91e: 687b ldr r3, [r7, #4] - 803b920: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b922: 68db ldr r3, [r3, #12] - 803b924: 685a ldr r2, [r3, #4] - 803b926: 687b ldr r3, [r7, #4] - 803b928: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b94e: 687b ldr r3, [r7, #4] + 803b950: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b952: 68db ldr r3, [r3, #12] + 803b954: 685a ldr r2, [r3, #4] + 803b956: 687b ldr r3, [r7, #4] + 803b958: 6a5b ldr r3, [r3, #36] ; 0x24 while (pcb->ooseq != NULL && - 803b92a: 429a cmp r2, r3 - 803b92c: f43f af43 beq.w 803b7b6 + 803b95a: 429a cmp r2, r3 + 803b95c: f43f af43 beq.w 803b7e6 #endif /* LWIP_TCP_SACK_OUT */ #endif /* TCP_QUEUE_OOSEQ */ /* Acknowledge the segment(s). */ tcp_ack(pcb); - 803b930: 687b ldr r3, [r7, #4] - 803b932: 8b5b ldrh r3, [r3, #26] - 803b934: f003 0301 and.w r3, r3, #1 - 803b938: 2b00 cmp r3, #0 - 803b93a: d00e beq.n 803b95a - 803b93c: 687b ldr r3, [r7, #4] - 803b93e: 8b5b ldrh r3, [r3, #26] - 803b940: f023 0301 bic.w r3, r3, #1 - 803b944: b29a uxth r2, r3 - 803b946: 687b ldr r3, [r7, #4] - 803b948: 835a strh r2, [r3, #26] - 803b94a: 687b ldr r3, [r7, #4] - 803b94c: 8b5b ldrh r3, [r3, #26] - 803b94e: f043 0302 orr.w r3, r3, #2 - 803b952: b29a uxth r2, r3 - 803b954: 687b ldr r3, [r7, #4] - 803b956: 835a strh r2, [r3, #26] + 803b960: 687b ldr r3, [r7, #4] + 803b962: 8b5b ldrh r3, [r3, #26] + 803b964: f003 0301 and.w r3, r3, #1 + 803b968: 2b00 cmp r3, #0 + 803b96a: d00e beq.n 803b98a + 803b96c: 687b ldr r3, [r7, #4] + 803b96e: 8b5b ldrh r3, [r3, #26] + 803b970: f023 0301 bic.w r3, r3, #1 + 803b974: b29a uxth r2, r3 + 803b976: 687b ldr r3, [r7, #4] + 803b978: 835a strh r2, [r3, #26] + 803b97a: 687b ldr r3, [r7, #4] + 803b97c: 8b5b ldrh r3, [r3, #26] + 803b97e: f043 0302 orr.w r3, r3, #2 + 803b982: b29a uxth r2, r3 + 803b984: 687b ldr r3, [r7, #4] + 803b986: 835a strh r2, [r3, #26] if (pcb->rcv_nxt == seqno) { - 803b958: e188 b.n 803bc6c + 803b988: e188 b.n 803bc9c tcp_ack(pcb); - 803b95a: 687b ldr r3, [r7, #4] - 803b95c: 8b5b ldrh r3, [r3, #26] - 803b95e: f043 0301 orr.w r3, r3, #1 - 803b962: b29a uxth r2, r3 - 803b964: 687b ldr r3, [r7, #4] - 803b966: 835a strh r2, [r3, #26] + 803b98a: 687b ldr r3, [r7, #4] + 803b98c: 8b5b ldrh r3, [r3, #26] + 803b98e: f043 0301 orr.w r3, r3, #1 + 803b992: b29a uxth r2, r3 + 803b994: 687b ldr r3, [r7, #4] + 803b996: 835a strh r2, [r3, #26] if (pcb->rcv_nxt == seqno) { - 803b968: e180 b.n 803bc6c + 803b998: e180 b.n 803bc9c } else { /* We get here if the incoming segment is out-of-sequence. */ #if TCP_QUEUE_OOSEQ /* We queue the segment on the ->ooseq queue. */ if (pcb->ooseq == NULL) { - 803b96a: 687b ldr r3, [r7, #4] - 803b96c: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b96e: 2b00 cmp r3, #0 - 803b970: d106 bne.n 803b980 + 803b99a: 687b ldr r3, [r7, #4] + 803b99c: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b99e: 2b00 cmp r3, #0 + 803b9a0: d106 bne.n 803b9b0 pcb->ooseq = tcp_seg_copy(&inseg); - 803b972: 4848 ldr r0, [pc, #288] ; (803ba94 ) - 803b974: f7fd fb2e bl 8038fd4 - 803b978: 4602 mov r2, r0 - 803b97a: 687b ldr r3, [r7, #4] - 803b97c: 675a str r2, [r3, #116] ; 0x74 - 803b97e: e16d b.n 803bc5c + 803b9a2: 4848 ldr r0, [pc, #288] ; (803bac4 ) + 803b9a4: f7fd fb2e bl 8039004 + 803b9a8: 4602 mov r2, r0 + 803b9aa: 687b ldr r3, [r7, #4] + 803b9ac: 675a str r2, [r3, #116] ; 0x74 + 803b9ae: e16d b.n 803bc8c #if LWIP_TCP_SACK_OUT /* This is the left edge of the lowest possible SACK range. It may start before the newly received segment (possibly adjusted below). */ u32_t sackbeg = TCP_SEQ_LT(seqno, pcb->ooseq->tcphdr->seqno) ? seqno : pcb->ooseq->tcphdr->seqno; #endif /* LWIP_TCP_SACK_OUT */ struct tcp_seg *next, *prev = NULL; - 803b980: 2300 movs r3, #0 - 803b982: 637b str r3, [r7, #52] ; 0x34 + 803b9b0: 2300 movs r3, #0 + 803b9b2: 637b str r3, [r7, #52] ; 0x34 for (next = pcb->ooseq; next != NULL; next = next->next) { - 803b984: 687b ldr r3, [r7, #4] - 803b986: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b988: 63bb str r3, [r7, #56] ; 0x38 - 803b98a: e157 b.n 803bc3c + 803b9b4: 687b ldr r3, [r7, #4] + 803b9b6: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b9b8: 63bb str r3, [r7, #56] ; 0x38 + 803b9ba: e157 b.n 803bc6c if (seqno == next->tcphdr->seqno) { - 803b98c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803b98e: 68db ldr r3, [r3, #12] - 803b990: 685a ldr r2, [r3, #4] - 803b992: 4b41 ldr r3, [pc, #260] ; (803ba98 ) - 803b994: 681b ldr r3, [r3, #0] - 803b996: 429a cmp r2, r3 - 803b998: d11d bne.n 803b9d6 + 803b9bc: 6bbb ldr r3, [r7, #56] ; 0x38 + 803b9be: 68db ldr r3, [r3, #12] + 803b9c0: 685a ldr r2, [r3, #4] + 803b9c2: 4b41 ldr r3, [pc, #260] ; (803bac8 ) + 803b9c4: 681b ldr r3, [r3, #0] + 803b9c6: 429a cmp r2, r3 + 803b9c8: d11d bne.n 803ba06 /* The sequence number of the incoming segment is the same as the sequence number of the segment on ->ooseq. We check the lengths to see which one to discard. */ if (inseg.len > next->len) { - 803b99a: 4b3e ldr r3, [pc, #248] ; (803ba94 ) - 803b99c: 891a ldrh r2, [r3, #8] - 803b99e: 6bbb ldr r3, [r7, #56] ; 0x38 - 803b9a0: 891b ldrh r3, [r3, #8] - 803b9a2: 429a cmp r2, r3 - 803b9a4: f240 814f bls.w 803bc46 + 803b9ca: 4b3e ldr r3, [pc, #248] ; (803bac4 ) + 803b9cc: 891a ldrh r2, [r3, #8] + 803b9ce: 6bbb ldr r3, [r7, #56] ; 0x38 + 803b9d0: 891b ldrh r3, [r3, #8] + 803b9d2: 429a cmp r2, r3 + 803b9d4: f240 814f bls.w 803bc76 /* The incoming segment is larger than the old segment. We replace some segments with the new one. */ struct tcp_seg *cseg = tcp_seg_copy(&inseg); - 803b9a8: 483a ldr r0, [pc, #232] ; (803ba94 ) - 803b9aa: f7fd fb13 bl 8038fd4 - 803b9ae: 6178 str r0, [r7, #20] + 803b9d8: 483a ldr r0, [pc, #232] ; (803bac4 ) + 803b9da: f7fd fb13 bl 8039004 + 803b9de: 6178 str r0, [r7, #20] if (cseg != NULL) { - 803b9b0: 697b ldr r3, [r7, #20] - 803b9b2: 2b00 cmp r3, #0 - 803b9b4: f000 8149 beq.w 803bc4a + 803b9e0: 697b ldr r3, [r7, #20] + 803b9e2: 2b00 cmp r3, #0 + 803b9e4: f000 8149 beq.w 803bc7a if (prev != NULL) { - 803b9b8: 6b7b ldr r3, [r7, #52] ; 0x34 - 803b9ba: 2b00 cmp r3, #0 - 803b9bc: d003 beq.n 803b9c6 + 803b9e8: 6b7b ldr r3, [r7, #52] ; 0x34 + 803b9ea: 2b00 cmp r3, #0 + 803b9ec: d003 beq.n 803b9f6 prev->next = cseg; - 803b9be: 6b7b ldr r3, [r7, #52] ; 0x34 - 803b9c0: 697a ldr r2, [r7, #20] - 803b9c2: 601a str r2, [r3, #0] - 803b9c4: e002 b.n 803b9cc + 803b9ee: 6b7b ldr r3, [r7, #52] ; 0x34 + 803b9f0: 697a ldr r2, [r7, #20] + 803b9f2: 601a str r2, [r3, #0] + 803b9f4: e002 b.n 803b9fc } else { pcb->ooseq = cseg; - 803b9c6: 687b ldr r3, [r7, #4] - 803b9c8: 697a ldr r2, [r7, #20] - 803b9ca: 675a str r2, [r3, #116] ; 0x74 + 803b9f6: 687b ldr r3, [r7, #4] + 803b9f8: 697a ldr r2, [r7, #20] + 803b9fa: 675a str r2, [r3, #116] ; 0x74 } tcp_oos_insert_segment(cseg, next); - 803b9cc: 6bb9 ldr r1, [r7, #56] ; 0x38 - 803b9ce: 6978 ldr r0, [r7, #20] - 803b9d0: f7ff f8dc bl 803ab8c + 803b9fc: 6bb9 ldr r1, [r7, #56] ; 0x38 + 803b9fe: 6978 ldr r0, [r7, #20] + 803ba00: f7ff f8dc bl 803abbc } break; - 803b9d4: e139 b.n 803bc4a + 803ba04: e139 b.n 803bc7a segment was smaller than the old one; in either case, we ditch the incoming segment. */ break; } } else { if (prev == NULL) { - 803b9d6: 6b7b ldr r3, [r7, #52] ; 0x34 - 803b9d8: 2b00 cmp r3, #0 - 803b9da: d117 bne.n 803ba0c + 803ba06: 6b7b ldr r3, [r7, #52] ; 0x34 + 803ba08: 2b00 cmp r3, #0 + 803ba0a: d117 bne.n 803ba3c if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) { - 803b9dc: 4b2e ldr r3, [pc, #184] ; (803ba98 ) - 803b9de: 681a ldr r2, [r3, #0] - 803b9e0: 6bbb ldr r3, [r7, #56] ; 0x38 - 803b9e2: 68db ldr r3, [r3, #12] - 803b9e4: 685b ldr r3, [r3, #4] - 803b9e6: 1ad3 subs r3, r2, r3 - 803b9e8: 2b00 cmp r3, #0 - 803b9ea: da57 bge.n 803ba9c + 803ba0c: 4b2e ldr r3, [pc, #184] ; (803bac8 ) + 803ba0e: 681a ldr r2, [r3, #0] + 803ba10: 6bbb ldr r3, [r7, #56] ; 0x38 + 803ba12: 68db ldr r3, [r3, #12] + 803ba14: 685b ldr r3, [r3, #4] + 803ba16: 1ad3 subs r3, r2, r3 + 803ba18: 2b00 cmp r3, #0 + 803ba1a: da57 bge.n 803bacc /* The sequence number of the incoming segment is lower than the sequence number of the first segment on the queue. We put the incoming segment first on the queue. */ struct tcp_seg *cseg = tcp_seg_copy(&inseg); - 803b9ec: 4829 ldr r0, [pc, #164] ; (803ba94 ) - 803b9ee: f7fd faf1 bl 8038fd4 - 803b9f2: 61b8 str r0, [r7, #24] + 803ba1c: 4829 ldr r0, [pc, #164] ; (803bac4 ) + 803ba1e: f7fd faf1 bl 8039004 + 803ba22: 61b8 str r0, [r7, #24] if (cseg != NULL) { - 803b9f4: 69bb ldr r3, [r7, #24] - 803b9f6: 2b00 cmp r3, #0 - 803b9f8: f000 8129 beq.w 803bc4e + 803ba24: 69bb ldr r3, [r7, #24] + 803ba26: 2b00 cmp r3, #0 + 803ba28: f000 8129 beq.w 803bc7e pcb->ooseq = cseg; - 803b9fc: 687b ldr r3, [r7, #4] - 803b9fe: 69ba ldr r2, [r7, #24] - 803ba00: 675a str r2, [r3, #116] ; 0x74 + 803ba2c: 687b ldr r3, [r7, #4] + 803ba2e: 69ba ldr r2, [r7, #24] + 803ba30: 675a str r2, [r3, #116] ; 0x74 tcp_oos_insert_segment(cseg, next); - 803ba02: 6bb9 ldr r1, [r7, #56] ; 0x38 - 803ba04: 69b8 ldr r0, [r7, #24] - 803ba06: f7ff f8c1 bl 803ab8c + 803ba32: 6bb9 ldr r1, [r7, #56] ; 0x38 + 803ba34: 69b8 ldr r0, [r7, #24] + 803ba36: f7ff f8c1 bl 803abbc } break; - 803ba0a: e120 b.n 803bc4e + 803ba3a: e120 b.n 803bc7e } } else { /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) && TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/ if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno + 1, next->tcphdr->seqno - 1)) { - 803ba0c: 4b22 ldr r3, [pc, #136] ; (803ba98 ) - 803ba0e: 681a ldr r2, [r3, #0] - 803ba10: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba12: 68db ldr r3, [r3, #12] - 803ba14: 685b ldr r3, [r3, #4] - 803ba16: 1ad3 subs r3, r2, r3 - 803ba18: 3b01 subs r3, #1 - 803ba1a: 2b00 cmp r3, #0 - 803ba1c: db3e blt.n 803ba9c - 803ba1e: 4b1e ldr r3, [pc, #120] ; (803ba98 ) - 803ba20: 681a ldr r2, [r3, #0] - 803ba22: 6bbb ldr r3, [r7, #56] ; 0x38 - 803ba24: 68db ldr r3, [r3, #12] - 803ba26: 685b ldr r3, [r3, #4] - 803ba28: 1ad3 subs r3, r2, r3 - 803ba2a: 3301 adds r3, #1 - 803ba2c: 2b00 cmp r3, #0 - 803ba2e: dc35 bgt.n 803ba9c + 803ba3c: 4b22 ldr r3, [pc, #136] ; (803bac8 ) + 803ba3e: 681a ldr r2, [r3, #0] + 803ba40: 6b7b ldr r3, [r7, #52] ; 0x34 + 803ba42: 68db ldr r3, [r3, #12] + 803ba44: 685b ldr r3, [r3, #4] + 803ba46: 1ad3 subs r3, r2, r3 + 803ba48: 3b01 subs r3, #1 + 803ba4a: 2b00 cmp r3, #0 + 803ba4c: db3e blt.n 803bacc + 803ba4e: 4b1e ldr r3, [pc, #120] ; (803bac8 ) + 803ba50: 681a ldr r2, [r3, #0] + 803ba52: 6bbb ldr r3, [r7, #56] ; 0x38 + 803ba54: 68db ldr r3, [r3, #12] + 803ba56: 685b ldr r3, [r3, #4] + 803ba58: 1ad3 subs r3, r2, r3 + 803ba5a: 3301 adds r3, #1 + 803ba5c: 2b00 cmp r3, #0 + 803ba5e: dc35 bgt.n 803bacc /* The sequence number of the incoming segment is in between the sequence numbers of the previous and the next segment on ->ooseq. We trim trim the previous segment, delete next segments that included in received segment and trim received, if needed. */ struct tcp_seg *cseg = tcp_seg_copy(&inseg); - 803ba30: 4818 ldr r0, [pc, #96] ; (803ba94 ) - 803ba32: f7fd facf bl 8038fd4 - 803ba36: 61f8 str r0, [r7, #28] + 803ba60: 4818 ldr r0, [pc, #96] ; (803bac4 ) + 803ba62: f7fd facf bl 8039004 + 803ba66: 61f8 str r0, [r7, #28] if (cseg != NULL) { - 803ba38: 69fb ldr r3, [r7, #28] - 803ba3a: 2b00 cmp r3, #0 - 803ba3c: f000 8109 beq.w 803bc52 + 803ba68: 69fb ldr r3, [r7, #28] + 803ba6a: 2b00 cmp r3, #0 + 803ba6c: f000 8109 beq.w 803bc82 if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) { - 803ba40: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba42: 68db ldr r3, [r3, #12] - 803ba44: 685b ldr r3, [r3, #4] - 803ba46: 6b7a ldr r2, [r7, #52] ; 0x34 - 803ba48: 8912 ldrh r2, [r2, #8] - 803ba4a: 441a add r2, r3 - 803ba4c: 4b12 ldr r3, [pc, #72] ; (803ba98 ) - 803ba4e: 681b ldr r3, [r3, #0] - 803ba50: 1ad3 subs r3, r2, r3 - 803ba52: 2b00 cmp r3, #0 - 803ba54: dd12 ble.n 803ba7c + 803ba70: 6b7b ldr r3, [r7, #52] ; 0x34 + 803ba72: 68db ldr r3, [r3, #12] + 803ba74: 685b ldr r3, [r3, #4] + 803ba76: 6b7a ldr r2, [r7, #52] ; 0x34 + 803ba78: 8912 ldrh r2, [r2, #8] + 803ba7a: 441a add r2, r3 + 803ba7c: 4b12 ldr r3, [pc, #72] ; (803bac8 ) + 803ba7e: 681b ldr r3, [r3, #0] + 803ba80: 1ad3 subs r3, r2, r3 + 803ba82: 2b00 cmp r3, #0 + 803ba84: dd12 ble.n 803baac /* We need to trim the prev segment. */ prev->len = (u16_t)(seqno - prev->tcphdr->seqno); - 803ba56: 4b10 ldr r3, [pc, #64] ; (803ba98 ) - 803ba58: 681b ldr r3, [r3, #0] - 803ba5a: b29a uxth r2, r3 - 803ba5c: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba5e: 68db ldr r3, [r3, #12] - 803ba60: 685b ldr r3, [r3, #4] - 803ba62: b29b uxth r3, r3 - 803ba64: 1ad3 subs r3, r2, r3 - 803ba66: b29a uxth r2, r3 - 803ba68: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba6a: 811a strh r2, [r3, #8] + 803ba86: 4b10 ldr r3, [pc, #64] ; (803bac8 ) + 803ba88: 681b ldr r3, [r3, #0] + 803ba8a: b29a uxth r2, r3 + 803ba8c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803ba8e: 68db ldr r3, [r3, #12] + 803ba90: 685b ldr r3, [r3, #4] + 803ba92: b29b uxth r3, r3 + 803ba94: 1ad3 subs r3, r2, r3 + 803ba96: b29a uxth r2, r3 + 803ba98: 6b7b ldr r3, [r7, #52] ; 0x34 + 803ba9a: 811a strh r2, [r3, #8] pbuf_realloc(prev->p, prev->len); - 803ba6c: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba6e: 685a ldr r2, [r3, #4] - 803ba70: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba72: 891b ldrh r3, [r3, #8] - 803ba74: 4619 mov r1, r3 - 803ba76: 4610 mov r0, r2 - 803ba78: f7fb fcc2 bl 8037400 + 803ba9c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803ba9e: 685a ldr r2, [r3, #4] + 803baa0: 6b7b ldr r3, [r7, #52] ; 0x34 + 803baa2: 891b ldrh r3, [r3, #8] + 803baa4: 4619 mov r1, r3 + 803baa6: 4610 mov r0, r2 + 803baa8: f7fb fcc2 bl 8037430 } prev->next = cseg; - 803ba7c: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba7e: 69fa ldr r2, [r7, #28] - 803ba80: 601a str r2, [r3, #0] + 803baac: 6b7b ldr r3, [r7, #52] ; 0x34 + 803baae: 69fa ldr r2, [r7, #28] + 803bab0: 601a str r2, [r3, #0] tcp_oos_insert_segment(cseg, next); - 803ba82: 6bb9 ldr r1, [r7, #56] ; 0x38 - 803ba84: 69f8 ldr r0, [r7, #28] - 803ba86: f7ff f881 bl 803ab8c + 803bab2: 6bb9 ldr r1, [r7, #56] ; 0x38 + 803bab4: 69f8 ldr r0, [r7, #28] + 803bab6: f7ff f881 bl 803abbc } break; - 803ba8a: e0e2 b.n 803bc52 - 803ba8c: 2400e9a0 .word 0x2400e9a0 - 803ba90: 2400e99d .word 0x2400e99d - 803ba94: 2400e970 .word 0x2400e970 - 803ba98: 2400e990 .word 0x2400e990 + 803baba: e0e2 b.n 803bc82 + 803babc: 2400e9a0 .word 0x2400e9a0 + 803bac0: 2400e99d .word 0x2400e99d + 803bac4: 2400e970 .word 0x2400e970 + 803bac8: 2400e990 .word 0x2400e990 #endif /* LWIP_TCP_SACK_OUT */ /* We don't use 'prev' below, so let's set it to current 'next'. This way even if we break the loop below, 'prev' will be pointing at the segment right in front of the newly added one. */ prev = next; - 803ba9c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803ba9e: 637b str r3, [r7, #52] ; 0x34 + 803bacc: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bace: 637b str r3, [r7, #52] ; 0x34 /* If the "next" segment is the last segment on the ooseq queue, we add the incoming segment to the end of the list. */ if (next->next == NULL && - 803baa0: 6bbb ldr r3, [r7, #56] ; 0x38 - 803baa2: 681b ldr r3, [r3, #0] - 803baa4: 2b00 cmp r3, #0 - 803baa6: f040 80c6 bne.w 803bc36 + 803bad0: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bad2: 681b ldr r3, [r3, #0] + 803bad4: 2b00 cmp r3, #0 + 803bad6: f040 80c6 bne.w 803bc66 TCP_SEQ_GT(seqno, next->tcphdr->seqno)) { - 803baaa: 4b80 ldr r3, [pc, #512] ; (803bcac ) - 803baac: 681a ldr r2, [r3, #0] - 803baae: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bab0: 68db ldr r3, [r3, #12] - 803bab2: 685b ldr r3, [r3, #4] - 803bab4: 1ad3 subs r3, r2, r3 + 803bada: 4b80 ldr r3, [pc, #512] ; (803bcdc ) + 803badc: 681a ldr r2, [r3, #0] + 803bade: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bae0: 68db ldr r3, [r3, #12] + 803bae2: 685b ldr r3, [r3, #4] + 803bae4: 1ad3 subs r3, r2, r3 if (next->next == NULL && - 803bab6: 2b00 cmp r3, #0 - 803bab8: f340 80bd ble.w 803bc36 + 803bae6: 2b00 cmp r3, #0 + 803bae8: f340 80bd ble.w 803bc66 if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { - 803babc: 6bbb ldr r3, [r7, #56] ; 0x38 - 803babe: 68db ldr r3, [r3, #12] - 803bac0: 899b ldrh r3, [r3, #12] - 803bac2: b29b uxth r3, r3 - 803bac4: 4618 mov r0, r3 - 803bac6: f7fa f9ef bl 8035ea8 - 803baca: 4603 mov r3, r0 - 803bacc: b2db uxtb r3, r3 - 803bace: f003 0301 and.w r3, r3, #1 - 803bad2: 2b00 cmp r3, #0 - 803bad4: f040 80bf bne.w 803bc56 + 803baec: 6bbb ldr r3, [r7, #56] ; 0x38 + 803baee: 68db ldr r3, [r3, #12] + 803baf0: 899b ldrh r3, [r3, #12] + 803baf2: b29b uxth r3, r3 + 803baf4: 4618 mov r0, r3 + 803baf6: f7fa f9ef bl 8035ed8 + 803bafa: 4603 mov r3, r0 + 803bafc: b2db uxtb r3, r3 + 803bafe: f003 0301 and.w r3, r3, #1 + 803bb02: 2b00 cmp r3, #0 + 803bb04: f040 80bf bne.w 803bc86 /* segment "next" already contains all data */ break; } next->next = tcp_seg_copy(&inseg); - 803bad8: 4875 ldr r0, [pc, #468] ; (803bcb0 ) - 803bada: f7fd fa7b bl 8038fd4 - 803bade: 4602 mov r2, r0 - 803bae0: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bae2: 601a str r2, [r3, #0] + 803bb08: 4875 ldr r0, [pc, #468] ; (803bce0 ) + 803bb0a: f7fd fa7b bl 8039004 + 803bb0e: 4602 mov r2, r0 + 803bb10: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb12: 601a str r2, [r3, #0] if (next->next != NULL) { - 803bae4: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bae6: 681b ldr r3, [r3, #0] - 803bae8: 2b00 cmp r3, #0 - 803baea: f000 80b6 beq.w 803bc5a + 803bb14: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb16: 681b ldr r3, [r3, #0] + 803bb18: 2b00 cmp r3, #0 + 803bb1a: f000 80b6 beq.w 803bc8a if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) { - 803baee: 6bbb ldr r3, [r7, #56] ; 0x38 - 803baf0: 68db ldr r3, [r3, #12] - 803baf2: 685b ldr r3, [r3, #4] - 803baf4: 6bba ldr r2, [r7, #56] ; 0x38 - 803baf6: 8912 ldrh r2, [r2, #8] - 803baf8: 441a add r2, r3 - 803bafa: 4b6c ldr r3, [pc, #432] ; (803bcac ) - 803bafc: 681b ldr r3, [r3, #0] - 803bafe: 1ad3 subs r3, r2, r3 - 803bb00: 2b00 cmp r3, #0 - 803bb02: dd12 ble.n 803bb2a + 803bb1e: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb20: 68db ldr r3, [r3, #12] + 803bb22: 685b ldr r3, [r3, #4] + 803bb24: 6bba ldr r2, [r7, #56] ; 0x38 + 803bb26: 8912 ldrh r2, [r2, #8] + 803bb28: 441a add r2, r3 + 803bb2a: 4b6c ldr r3, [pc, #432] ; (803bcdc ) + 803bb2c: 681b ldr r3, [r3, #0] + 803bb2e: 1ad3 subs r3, r2, r3 + 803bb30: 2b00 cmp r3, #0 + 803bb32: dd12 ble.n 803bb5a /* We need to trim the last segment. */ next->len = (u16_t)(seqno - next->tcphdr->seqno); - 803bb04: 4b69 ldr r3, [pc, #420] ; (803bcac ) - 803bb06: 681b ldr r3, [r3, #0] - 803bb08: b29a uxth r2, r3 - 803bb0a: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb0c: 68db ldr r3, [r3, #12] - 803bb0e: 685b ldr r3, [r3, #4] - 803bb10: b29b uxth r3, r3 - 803bb12: 1ad3 subs r3, r2, r3 - 803bb14: b29a uxth r2, r3 - 803bb16: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb18: 811a strh r2, [r3, #8] + 803bb34: 4b69 ldr r3, [pc, #420] ; (803bcdc ) + 803bb36: 681b ldr r3, [r3, #0] + 803bb38: b29a uxth r2, r3 + 803bb3a: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb3c: 68db ldr r3, [r3, #12] + 803bb3e: 685b ldr r3, [r3, #4] + 803bb40: b29b uxth r3, r3 + 803bb42: 1ad3 subs r3, r2, r3 + 803bb44: b29a uxth r2, r3 + 803bb46: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb48: 811a strh r2, [r3, #8] pbuf_realloc(next->p, next->len); - 803bb1a: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb1c: 685a ldr r2, [r3, #4] - 803bb1e: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb20: 891b ldrh r3, [r3, #8] - 803bb22: 4619 mov r1, r3 - 803bb24: 4610 mov r0, r2 - 803bb26: f7fb fc6b bl 8037400 + 803bb4a: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb4c: 685a ldr r2, [r3, #4] + 803bb4e: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb50: 891b ldrh r3, [r3, #8] + 803bb52: 4619 mov r1, r3 + 803bb54: 4610 mov r0, r2 + 803bb56: f7fb fc6b bl 8037430 } /* check if the remote side overruns our receive window */ if (TCP_SEQ_GT((u32_t)tcplen + seqno, pcb->rcv_nxt + (u32_t)pcb->rcv_wnd)) { - 803bb2a: 4b62 ldr r3, [pc, #392] ; (803bcb4 ) - 803bb2c: 881b ldrh r3, [r3, #0] - 803bb2e: 461a mov r2, r3 - 803bb30: 4b5e ldr r3, [pc, #376] ; (803bcac ) - 803bb32: 681b ldr r3, [r3, #0] - 803bb34: 441a add r2, r3 - 803bb36: 687b ldr r3, [r7, #4] - 803bb38: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bb3a: 6879 ldr r1, [r7, #4] - 803bb3c: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803bb3e: 440b add r3, r1 - 803bb40: 1ad3 subs r3, r2, r3 - 803bb42: 2b00 cmp r3, #0 - 803bb44: f340 8089 ble.w 803bc5a + 803bb5a: 4b62 ldr r3, [pc, #392] ; (803bce4 ) + 803bb5c: 881b ldrh r3, [r3, #0] + 803bb5e: 461a mov r2, r3 + 803bb60: 4b5e ldr r3, [pc, #376] ; (803bcdc ) + 803bb62: 681b ldr r3, [r3, #0] + 803bb64: 441a add r2, r3 + 803bb66: 687b ldr r3, [r7, #4] + 803bb68: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bb6a: 6879 ldr r1, [r7, #4] + 803bb6c: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803bb6e: 440b add r3, r1 + 803bb70: 1ad3 subs r3, r2, r3 + 803bb72: 2b00 cmp r3, #0 + 803bb74: f340 8089 ble.w 803bc8a LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: other end overran receive window" "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n", seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd)); if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) { - 803bb48: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb4a: 681b ldr r3, [r3, #0] - 803bb4c: 68db ldr r3, [r3, #12] - 803bb4e: 899b ldrh r3, [r3, #12] - 803bb50: b29b uxth r3, r3 - 803bb52: 4618 mov r0, r3 - 803bb54: f7fa f9a8 bl 8035ea8 - 803bb58: 4603 mov r3, r0 - 803bb5a: b2db uxtb r3, r3 - 803bb5c: f003 0301 and.w r3, r3, #1 - 803bb60: 2b00 cmp r3, #0 - 803bb62: d022 beq.n 803bbaa + 803bb78: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb7a: 681b ldr r3, [r3, #0] + 803bb7c: 68db ldr r3, [r3, #12] + 803bb7e: 899b ldrh r3, [r3, #12] + 803bb80: b29b uxth r3, r3 + 803bb82: 4618 mov r0, r3 + 803bb84: f7fa f9a8 bl 8035ed8 + 803bb88: 4603 mov r3, r0 + 803bb8a: b2db uxtb r3, r3 + 803bb8c: f003 0301 and.w r3, r3, #1 + 803bb90: 2b00 cmp r3, #0 + 803bb92: d022 beq.n 803bbda /* Must remove the FIN from the header as we're trimming * that byte of sequence-space from the packet */ TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) & ~TCP_FIN); - 803bb64: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb66: 681b ldr r3, [r3, #0] - 803bb68: 68db ldr r3, [r3, #12] - 803bb6a: 899b ldrh r3, [r3, #12] - 803bb6c: b29b uxth r3, r3 - 803bb6e: b21b sxth r3, r3 - 803bb70: f423 537c bic.w r3, r3, #16128 ; 0x3f00 - 803bb74: b21c sxth r4, r3 - 803bb76: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb78: 681b ldr r3, [r3, #0] - 803bb7a: 68db ldr r3, [r3, #12] - 803bb7c: 899b ldrh r3, [r3, #12] - 803bb7e: b29b uxth r3, r3 - 803bb80: 4618 mov r0, r3 - 803bb82: f7fa f991 bl 8035ea8 - 803bb86: 4603 mov r3, r0 - 803bb88: b2db uxtb r3, r3 - 803bb8a: b29b uxth r3, r3 - 803bb8c: f003 033e and.w r3, r3, #62 ; 0x3e - 803bb90: b29b uxth r3, r3 - 803bb92: 4618 mov r0, r3 - 803bb94: f7fa f988 bl 8035ea8 - 803bb98: 4603 mov r3, r0 - 803bb9a: b21b sxth r3, r3 - 803bb9c: 4323 orrs r3, r4 - 803bb9e: b21a sxth r2, r3 - 803bba0: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bba2: 681b ldr r3, [r3, #0] - 803bba4: 68db ldr r3, [r3, #12] - 803bba6: b292 uxth r2, r2 - 803bba8: 819a strh r2, [r3, #12] + 803bb94: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb96: 681b ldr r3, [r3, #0] + 803bb98: 68db ldr r3, [r3, #12] + 803bb9a: 899b ldrh r3, [r3, #12] + 803bb9c: b29b uxth r3, r3 + 803bb9e: b21b sxth r3, r3 + 803bba0: f423 537c bic.w r3, r3, #16128 ; 0x3f00 + 803bba4: b21c sxth r4, r3 + 803bba6: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bba8: 681b ldr r3, [r3, #0] + 803bbaa: 68db ldr r3, [r3, #12] + 803bbac: 899b ldrh r3, [r3, #12] + 803bbae: b29b uxth r3, r3 + 803bbb0: 4618 mov r0, r3 + 803bbb2: f7fa f991 bl 8035ed8 + 803bbb6: 4603 mov r3, r0 + 803bbb8: b2db uxtb r3, r3 + 803bbba: b29b uxth r3, r3 + 803bbbc: f003 033e and.w r3, r3, #62 ; 0x3e + 803bbc0: b29b uxth r3, r3 + 803bbc2: 4618 mov r0, r3 + 803bbc4: f7fa f988 bl 8035ed8 + 803bbc8: 4603 mov r3, r0 + 803bbca: b21b sxth r3, r3 + 803bbcc: 4323 orrs r3, r4 + 803bbce: b21a sxth r2, r3 + 803bbd0: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bbd2: 681b ldr r3, [r3, #0] + 803bbd4: 68db ldr r3, [r3, #12] + 803bbd6: b292 uxth r2, r2 + 803bbd8: 819a strh r2, [r3, #12] } /* Adjust length of segment to fit in the window. */ next->next->len = (u16_t)(pcb->rcv_nxt + pcb->rcv_wnd - seqno); - 803bbaa: 687b ldr r3, [r7, #4] - 803bbac: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bbae: b29a uxth r2, r3 - 803bbb0: 687b ldr r3, [r7, #4] - 803bbb2: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803bbb4: 4413 add r3, r2 - 803bbb6: b299 uxth r1, r3 - 803bbb8: 4b3c ldr r3, [pc, #240] ; (803bcac ) - 803bbba: 681b ldr r3, [r3, #0] - 803bbbc: b29a uxth r2, r3 - 803bbbe: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bbc0: 681b ldr r3, [r3, #0] - 803bbc2: 1a8a subs r2, r1, r2 - 803bbc4: b292 uxth r2, r2 - 803bbc6: 811a strh r2, [r3, #8] + 803bbda: 687b ldr r3, [r7, #4] + 803bbdc: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bbde: b29a uxth r2, r3 + 803bbe0: 687b ldr r3, [r7, #4] + 803bbe2: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803bbe4: 4413 add r3, r2 + 803bbe6: b299 uxth r1, r3 + 803bbe8: 4b3c ldr r3, [pc, #240] ; (803bcdc ) + 803bbea: 681b ldr r3, [r3, #0] + 803bbec: b29a uxth r2, r3 + 803bbee: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bbf0: 681b ldr r3, [r3, #0] + 803bbf2: 1a8a subs r2, r1, r2 + 803bbf4: b292 uxth r2, r2 + 803bbf6: 811a strh r2, [r3, #8] pbuf_realloc(next->next->p, next->next->len); - 803bbc8: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bbca: 681b ldr r3, [r3, #0] - 803bbcc: 685a ldr r2, [r3, #4] - 803bbce: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bbd0: 681b ldr r3, [r3, #0] - 803bbd2: 891b ldrh r3, [r3, #8] - 803bbd4: 4619 mov r1, r3 - 803bbd6: 4610 mov r0, r2 - 803bbd8: f7fb fc12 bl 8037400 + 803bbf8: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bbfa: 681b ldr r3, [r3, #0] + 803bbfc: 685a ldr r2, [r3, #4] + 803bbfe: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc00: 681b ldr r3, [r3, #0] + 803bc02: 891b ldrh r3, [r3, #8] + 803bc04: 4619 mov r1, r3 + 803bc06: 4610 mov r0, r2 + 803bc08: f7fb fc12 bl 8037430 tcplen = TCP_TCPLEN(next->next); - 803bbdc: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bbde: 681b ldr r3, [r3, #0] - 803bbe0: 891c ldrh r4, [r3, #8] - 803bbe2: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bbe4: 681b ldr r3, [r3, #0] - 803bbe6: 68db ldr r3, [r3, #12] - 803bbe8: 899b ldrh r3, [r3, #12] - 803bbea: b29b uxth r3, r3 - 803bbec: 4618 mov r0, r3 - 803bbee: f7fa f95b bl 8035ea8 - 803bbf2: 4603 mov r3, r0 - 803bbf4: b2db uxtb r3, r3 - 803bbf6: f003 0303 and.w r3, r3, #3 - 803bbfa: 2b00 cmp r3, #0 - 803bbfc: d001 beq.n 803bc02 - 803bbfe: 2301 movs r3, #1 - 803bc00: e000 b.n 803bc04 - 803bc02: 2300 movs r3, #0 - 803bc04: 4423 add r3, r4 - 803bc06: b29a uxth r2, r3 - 803bc08: 4b2a ldr r3, [pc, #168] ; (803bcb4 ) - 803bc0a: 801a strh r2, [r3, #0] - LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n", - 803bc0c: 4b29 ldr r3, [pc, #164] ; (803bcb4 ) - 803bc0e: 881b ldrh r3, [r3, #0] - 803bc10: 461a mov r2, r3 - 803bc12: 4b26 ldr r3, [pc, #152] ; (803bcac ) + 803bc0c: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc0e: 681b ldr r3, [r3, #0] + 803bc10: 891c ldrh r4, [r3, #8] + 803bc12: 6bbb ldr r3, [r7, #56] ; 0x38 803bc14: 681b ldr r3, [r3, #0] - 803bc16: 441a add r2, r3 - 803bc18: 687b ldr r3, [r7, #4] - 803bc1a: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bc1c: 6879 ldr r1, [r7, #4] - 803bc1e: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803bc20: 440b add r3, r1 - 803bc22: 429a cmp r2, r3 - 803bc24: d019 beq.n 803bc5a - 803bc26: 4b24 ldr r3, [pc, #144] ; (803bcb8 ) - 803bc28: f44f 62df mov.w r2, #1784 ; 0x6f8 - 803bc2c: 4923 ldr r1, [pc, #140] ; (803bcbc ) - 803bc2e: 4824 ldr r0, [pc, #144] ; (803bcc0 ) - 803bc30: f004 ff56 bl 8040ae0 + 803bc16: 68db ldr r3, [r3, #12] + 803bc18: 899b ldrh r3, [r3, #12] + 803bc1a: b29b uxth r3, r3 + 803bc1c: 4618 mov r0, r3 + 803bc1e: f7fa f95b bl 8035ed8 + 803bc22: 4603 mov r3, r0 + 803bc24: b2db uxtb r3, r3 + 803bc26: f003 0303 and.w r3, r3, #3 + 803bc2a: 2b00 cmp r3, #0 + 803bc2c: d001 beq.n 803bc32 + 803bc2e: 2301 movs r3, #1 + 803bc30: e000 b.n 803bc34 + 803bc32: 2300 movs r3, #0 + 803bc34: 4423 add r3, r4 + 803bc36: b29a uxth r2, r3 + 803bc38: 4b2a ldr r3, [pc, #168] ; (803bce4 ) + 803bc3a: 801a strh r2, [r3, #0] + LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n", + 803bc3c: 4b29 ldr r3, [pc, #164] ; (803bce4 ) + 803bc3e: 881b ldrh r3, [r3, #0] + 803bc40: 461a mov r2, r3 + 803bc42: 4b26 ldr r3, [pc, #152] ; (803bcdc ) + 803bc44: 681b ldr r3, [r3, #0] + 803bc46: 441a add r2, r3 + 803bc48: 687b ldr r3, [r7, #4] + 803bc4a: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bc4c: 6879 ldr r1, [r7, #4] + 803bc4e: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803bc50: 440b add r3, r1 + 803bc52: 429a cmp r2, r3 + 803bc54: d019 beq.n 803bc8a + 803bc56: 4b24 ldr r3, [pc, #144] ; (803bce8 ) + 803bc58: f44f 62df mov.w r2, #1784 ; 0x6f8 + 803bc5c: 4923 ldr r1, [pc, #140] ; (803bcec ) + 803bc5e: 4824 ldr r0, [pc, #144] ; (803bcf0 ) + 803bc60: f004 ff56 bl 8040b10 (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd)); } } break; - 803bc34: e011 b.n 803bc5a + 803bc64: e011 b.n 803bc8a for (next = pcb->ooseq; next != NULL; next = next->next) { - 803bc36: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bc38: 681b ldr r3, [r3, #0] - 803bc3a: 63bb str r3, [r7, #56] ; 0x38 - 803bc3c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bc3e: 2b00 cmp r3, #0 - 803bc40: f47f aea4 bne.w 803b98c - 803bc44: e00a b.n 803bc5c + 803bc66: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc68: 681b ldr r3, [r3, #0] + 803bc6a: 63bb str r3, [r7, #56] ; 0x38 + 803bc6c: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc6e: 2b00 cmp r3, #0 + 803bc70: f47f aea4 bne.w 803b9bc + 803bc74: e00a b.n 803bc8c break; - 803bc46: bf00 nop - 803bc48: e008 b.n 803bc5c + 803bc76: bf00 nop + 803bc78: e008 b.n 803bc8c break; - 803bc4a: bf00 nop - 803bc4c: e006 b.n 803bc5c + 803bc7a: bf00 nop + 803bc7c: e006 b.n 803bc8c break; - 803bc4e: bf00 nop - 803bc50: e004 b.n 803bc5c + 803bc7e: bf00 nop + 803bc80: e004 b.n 803bc8c break; - 803bc52: bf00 nop - 803bc54: e002 b.n 803bc5c + 803bc82: bf00 nop + 803bc84: e002 b.n 803bc8c break; - 803bc56: bf00 nop - 803bc58: e000 b.n 803bc5c + 803bc86: bf00 nop + 803bc88: e000 b.n 803bc8c break; - 803bc5a: bf00 nop + 803bc8a: bf00 nop #endif /* TCP_OOSEQ_BYTES_LIMIT || TCP_OOSEQ_PBUFS_LIMIT */ #endif /* TCP_QUEUE_OOSEQ */ /* We send the ACK packet after we've (potentially) dealt with SACKs, so they can be included in the acknowledgment. */ tcp_send_empty_ack(pcb); - 803bc5c: 6878 ldr r0, [r7, #4] - 803bc5e: f001 fe8b bl 803d978 + 803bc8c: 6878 ldr r0, [r7, #4] + 803bc8e: f001 fe8b bl 803d9a8 if (pcb->rcv_nxt == seqno) { - 803bc62: e003 b.n 803bc6c + 803bc92: e003 b.n 803bc9c } } else { /* The incoming segment is not within the window. */ tcp_send_empty_ack(pcb); - 803bc64: 6878 ldr r0, [r7, #4] - 803bc66: f001 fe87 bl 803d978 + 803bc94: 6878 ldr r0, [r7, #4] + 803bc96: f001 fe87 bl 803d9a8 if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, - 803bc6a: e01a b.n 803bca2 - 803bc6c: e019 b.n 803bca2 + 803bc9a: e01a b.n 803bcd2 + 803bc9c: e019 b.n 803bcd2 } } else { /* Segments with length 0 is taken care of here. Segments that fall out of the window are ACKed. */ if (!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)) { - 803bc6e: 4b0f ldr r3, [pc, #60] ; (803bcac ) - 803bc70: 681a ldr r2, [r3, #0] - 803bc72: 687b ldr r3, [r7, #4] - 803bc74: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bc76: 1ad3 subs r3, r2, r3 - 803bc78: 2b00 cmp r3, #0 - 803bc7a: db0a blt.n 803bc92 - 803bc7c: 4b0b ldr r3, [pc, #44] ; (803bcac ) - 803bc7e: 681a ldr r2, [r3, #0] - 803bc80: 687b ldr r3, [r7, #4] - 803bc82: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bc84: 6879 ldr r1, [r7, #4] - 803bc86: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803bc88: 440b add r3, r1 - 803bc8a: 1ad3 subs r3, r2, r3 - 803bc8c: 3301 adds r3, #1 - 803bc8e: 2b00 cmp r3, #0 - 803bc90: dd07 ble.n 803bca2 + 803bc9e: 4b0f ldr r3, [pc, #60] ; (803bcdc ) + 803bca0: 681a ldr r2, [r3, #0] + 803bca2: 687b ldr r3, [r7, #4] + 803bca4: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bca6: 1ad3 subs r3, r2, r3 + 803bca8: 2b00 cmp r3, #0 + 803bcaa: db0a blt.n 803bcc2 + 803bcac: 4b0b ldr r3, [pc, #44] ; (803bcdc ) + 803bcae: 681a ldr r2, [r3, #0] + 803bcb0: 687b ldr r3, [r7, #4] + 803bcb2: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bcb4: 6879 ldr r1, [r7, #4] + 803bcb6: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803bcb8: 440b add r3, r1 + 803bcba: 1ad3 subs r3, r2, r3 + 803bcbc: 3301 adds r3, #1 + 803bcbe: 2b00 cmp r3, #0 + 803bcc0: dd07 ble.n 803bcd2 tcp_ack_now(pcb); - 803bc92: 687b ldr r3, [r7, #4] - 803bc94: 8b5b ldrh r3, [r3, #26] - 803bc96: f043 0302 orr.w r3, r3, #2 - 803bc9a: b29a uxth r2, r3 - 803bc9c: 687b ldr r3, [r7, #4] - 803bc9e: 835a strh r2, [r3, #26] + 803bcc2: 687b ldr r3, [r7, #4] + 803bcc4: 8b5b ldrh r3, [r3, #26] + 803bcc6: f043 0302 orr.w r3, r3, #2 + 803bcca: b29a uxth r2, r3 + 803bccc: 687b ldr r3, [r7, #4] + 803bcce: 835a strh r2, [r3, #26] } } } - 803bca0: e7ff b.n 803bca2 - 803bca2: bf00 nop - 803bca4: 3750 adds r7, #80 ; 0x50 - 803bca6: 46bd mov sp, r7 - 803bca8: bdb0 pop {r4, r5, r7, pc} - 803bcaa: bf00 nop - 803bcac: 2400e990 .word 0x2400e990 - 803bcb0: 2400e970 .word 0x2400e970 - 803bcb4: 2400e99a .word 0x2400e99a - 803bcb8: 080434d0 .word 0x080434d0 - 803bcbc: 08043878 .word 0x08043878 - 803bcc0: 0804351c .word 0x0804351c + 803bcd0: e7ff b.n 803bcd2 + 803bcd2: bf00 nop + 803bcd4: 3750 adds r7, #80 ; 0x50 + 803bcd6: 46bd mov sp, r7 + 803bcd8: bdb0 pop {r4, r5, r7, pc} + 803bcda: bf00 nop + 803bcdc: 2400e990 .word 0x2400e990 + 803bce0: 2400e970 .word 0x2400e970 + 803bce4: 2400e99a .word 0x2400e99a + 803bce8: 08043500 .word 0x08043500 + 803bcec: 080438a8 .word 0x080438a8 + 803bcf0: 0804354c .word 0x0804354c -0803bcc4 : +0803bcf4 : static u8_t tcp_get_next_optbyte(void) { - 803bcc4: b480 push {r7} - 803bcc6: b083 sub sp, #12 - 803bcc8: af00 add r7, sp, #0 + 803bcf4: b480 push {r7} + 803bcf6: b083 sub sp, #12 + 803bcf8: af00 add r7, sp, #0 u16_t optidx = tcp_optidx++; - 803bcca: 4b15 ldr r3, [pc, #84] ; (803bd20 ) - 803bccc: 881b ldrh r3, [r3, #0] - 803bcce: 1c5a adds r2, r3, #1 - 803bcd0: b291 uxth r1, r2 - 803bcd2: 4a13 ldr r2, [pc, #76] ; (803bd20 ) - 803bcd4: 8011 strh r1, [r2, #0] - 803bcd6: 80fb strh r3, [r7, #6] + 803bcfa: 4b15 ldr r3, [pc, #84] ; (803bd50 ) + 803bcfc: 881b ldrh r3, [r3, #0] + 803bcfe: 1c5a adds r2, r3, #1 + 803bd00: b291 uxth r1, r2 + 803bd02: 4a13 ldr r2, [pc, #76] ; (803bd50 ) + 803bd04: 8011 strh r1, [r2, #0] + 803bd06: 80fb strh r3, [r7, #6] if ((tcphdr_opt2 == NULL) || (optidx < tcphdr_opt1len)) { - 803bcd8: 4b12 ldr r3, [pc, #72] ; (803bd24 ) - 803bcda: 681b ldr r3, [r3, #0] - 803bcdc: 2b00 cmp r3, #0 - 803bcde: d004 beq.n 803bcea - 803bce0: 4b11 ldr r3, [pc, #68] ; (803bd28 ) - 803bce2: 881b ldrh r3, [r3, #0] - 803bce4: 88fa ldrh r2, [r7, #6] - 803bce6: 429a cmp r2, r3 - 803bce8: d208 bcs.n 803bcfc + 803bd08: 4b12 ldr r3, [pc, #72] ; (803bd54 ) + 803bd0a: 681b ldr r3, [r3, #0] + 803bd0c: 2b00 cmp r3, #0 + 803bd0e: d004 beq.n 803bd1a + 803bd10: 4b11 ldr r3, [pc, #68] ; (803bd58 ) + 803bd12: 881b ldrh r3, [r3, #0] + 803bd14: 88fa ldrh r2, [r7, #6] + 803bd16: 429a cmp r2, r3 + 803bd18: d208 bcs.n 803bd2c u8_t *opts = (u8_t *)tcphdr + TCP_HLEN; - 803bcea: 4b10 ldr r3, [pc, #64] ; (803bd2c ) - 803bcec: 681b ldr r3, [r3, #0] - 803bcee: 3314 adds r3, #20 - 803bcf0: 603b str r3, [r7, #0] + 803bd1a: 4b10 ldr r3, [pc, #64] ; (803bd5c ) + 803bd1c: 681b ldr r3, [r3, #0] + 803bd1e: 3314 adds r3, #20 + 803bd20: 603b str r3, [r7, #0] return opts[optidx]; - 803bcf2: 88fb ldrh r3, [r7, #6] - 803bcf4: 683a ldr r2, [r7, #0] - 803bcf6: 4413 add r3, r2 - 803bcf8: 781b ldrb r3, [r3, #0] - 803bcfa: e00b b.n 803bd14 + 803bd22: 88fb ldrh r3, [r7, #6] + 803bd24: 683a ldr r2, [r7, #0] + 803bd26: 4413 add r3, r2 + 803bd28: 781b ldrb r3, [r3, #0] + 803bd2a: e00b b.n 803bd44 } else { u8_t idx = (u8_t)(optidx - tcphdr_opt1len); - 803bcfc: 88fb ldrh r3, [r7, #6] - 803bcfe: b2da uxtb r2, r3 - 803bd00: 4b09 ldr r3, [pc, #36] ; (803bd28 ) - 803bd02: 881b ldrh r3, [r3, #0] - 803bd04: b2db uxtb r3, r3 - 803bd06: 1ad3 subs r3, r2, r3 - 803bd08: 717b strb r3, [r7, #5] + 803bd2c: 88fb ldrh r3, [r7, #6] + 803bd2e: b2da uxtb r2, r3 + 803bd30: 4b09 ldr r3, [pc, #36] ; (803bd58 ) + 803bd32: 881b ldrh r3, [r3, #0] + 803bd34: b2db uxtb r3, r3 + 803bd36: 1ad3 subs r3, r2, r3 + 803bd38: 717b strb r3, [r7, #5] return tcphdr_opt2[idx]; - 803bd0a: 4b06 ldr r3, [pc, #24] ; (803bd24 ) - 803bd0c: 681a ldr r2, [r3, #0] - 803bd0e: 797b ldrb r3, [r7, #5] - 803bd10: 4413 add r3, r2 - 803bd12: 781b ldrb r3, [r3, #0] - } -} - 803bd14: 4618 mov r0, r3 - 803bd16: 370c adds r7, #12 - 803bd18: 46bd mov sp, r7 - 803bd1a: f85d 7b04 ldr.w r7, [sp], #4 - 803bd1e: 4770 bx lr - 803bd20: 2400e98c .word 0x2400e98c - 803bd24: 2400e988 .word 0x2400e988 - 803bd28: 2400e986 .word 0x2400e986 - 803bd2c: 2400e980 .word 0x2400e980 - -0803bd30 : + 803bd3a: 4b06 ldr r3, [pc, #24] ; (803bd54 ) + 803bd3c: 681a ldr r2, [r3, #0] + 803bd3e: 797b ldrb r3, [r7, #5] + 803bd40: 4413 add r3, r2 + 803bd42: 781b ldrb r3, [r3, #0] + } +} + 803bd44: 4618 mov r0, r3 + 803bd46: 370c adds r7, #12 + 803bd48: 46bd mov sp, r7 + 803bd4a: f85d 7b04 ldr.w r7, [sp], #4 + 803bd4e: 4770 bx lr + 803bd50: 2400e98c .word 0x2400e98c + 803bd54: 2400e988 .word 0x2400e988 + 803bd58: 2400e986 .word 0x2400e986 + 803bd5c: 2400e980 .word 0x2400e980 + +0803bd60 : * * @param pcb the tcp_pcb for which a segment arrived */ static void tcp_parseopt(struct tcp_pcb *pcb) { - 803bd30: b580 push {r7, lr} - 803bd32: b084 sub sp, #16 - 803bd34: af00 add r7, sp, #0 - 803bd36: 6078 str r0, [r7, #4] + 803bd60: b580 push {r7, lr} + 803bd62: b084 sub sp, #16 + 803bd64: af00 add r7, sp, #0 + 803bd66: 6078 str r0, [r7, #4] u16_t mss; #if LWIP_TCP_TIMESTAMPS u32_t tsval; #endif LWIP_ASSERT("tcp_parseopt: invalid pcb", pcb != NULL); - 803bd38: 687b ldr r3, [r7, #4] - 803bd3a: 2b00 cmp r3, #0 - 803bd3c: d106 bne.n 803bd4c - 803bd3e: 4b32 ldr r3, [pc, #200] ; (803be08 ) - 803bd40: f240 727d movw r2, #1917 ; 0x77d - 803bd44: 4931 ldr r1, [pc, #196] ; (803be0c ) - 803bd46: 4832 ldr r0, [pc, #200] ; (803be10 ) - 803bd48: f004 feca bl 8040ae0 + 803bd68: 687b ldr r3, [r7, #4] + 803bd6a: 2b00 cmp r3, #0 + 803bd6c: d106 bne.n 803bd7c + 803bd6e: 4b32 ldr r3, [pc, #200] ; (803be38 ) + 803bd70: f240 727d movw r2, #1917 ; 0x77d + 803bd74: 4931 ldr r1, [pc, #196] ; (803be3c ) + 803bd76: 4832 ldr r0, [pc, #200] ; (803be40 ) + 803bd78: f004 feca bl 8040b10 /* Parse the TCP MSS option, if present. */ if (tcphdr_optlen != 0) { - 803bd4c: 4b31 ldr r3, [pc, #196] ; (803be14 ) - 803bd4e: 881b ldrh r3, [r3, #0] - 803bd50: 2b00 cmp r3, #0 - 803bd52: d055 beq.n 803be00 + 803bd7c: 4b31 ldr r3, [pc, #196] ; (803be44 ) + 803bd7e: 881b ldrh r3, [r3, #0] + 803bd80: 2b00 cmp r3, #0 + 803bd82: d055 beq.n 803be30 for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) { - 803bd54: 4b30 ldr r3, [pc, #192] ; (803be18 ) - 803bd56: 2200 movs r2, #0 - 803bd58: 801a strh r2, [r3, #0] - 803bd5a: e045 b.n 803bde8 + 803bd84: 4b30 ldr r3, [pc, #192] ; (803be48 ) + 803bd86: 2200 movs r2, #0 + 803bd88: 801a strh r2, [r3, #0] + 803bd8a: e045 b.n 803be18 u8_t opt = tcp_get_next_optbyte(); - 803bd5c: f7ff ffb2 bl 803bcc4 - 803bd60: 4603 mov r3, r0 - 803bd62: 73fb strb r3, [r7, #15] + 803bd8c: f7ff ffb2 bl 803bcf4 + 803bd90: 4603 mov r3, r0 + 803bd92: 73fb strb r3, [r7, #15] switch (opt) { - 803bd64: 7bfb ldrb r3, [r7, #15] - 803bd66: 2b02 cmp r3, #2 - 803bd68: d006 beq.n 803bd78 - 803bd6a: 2b02 cmp r3, #2 - 803bd6c: dc2b bgt.n 803bdc6 - 803bd6e: 2b00 cmp r3, #0 - 803bd70: d041 beq.n 803bdf6 - 803bd72: 2b01 cmp r3, #1 - 803bd74: d127 bne.n 803bdc6 + 803bd94: 7bfb ldrb r3, [r7, #15] + 803bd96: 2b02 cmp r3, #2 + 803bd98: d006 beq.n 803bda8 + 803bd9a: 2b02 cmp r3, #2 + 803bd9c: dc2b bgt.n 803bdf6 + 803bd9e: 2b00 cmp r3, #0 + 803bda0: d041 beq.n 803be26 + 803bda2: 2b01 cmp r3, #1 + 803bda4: d127 bne.n 803bdf6 LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: EOL\n")); return; case LWIP_TCP_OPT_NOP: /* NOP option. */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n")); break; - 803bd76: e037 b.n 803bde8 + 803bda6: e037 b.n 803be18 case LWIP_TCP_OPT_MSS: LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n")); if (tcp_get_next_optbyte() != LWIP_TCP_OPT_LEN_MSS || (tcp_optidx - 2 + LWIP_TCP_OPT_LEN_MSS) > tcphdr_optlen) { - 803bd78: f7ff ffa4 bl 803bcc4 - 803bd7c: 4603 mov r3, r0 - 803bd7e: 2b04 cmp r3, #4 - 803bd80: d13b bne.n 803bdfa - 803bd82: 4b25 ldr r3, [pc, #148] ; (803be18 ) - 803bd84: 881b ldrh r3, [r3, #0] - 803bd86: 3301 adds r3, #1 - 803bd88: 4a22 ldr r2, [pc, #136] ; (803be14 ) - 803bd8a: 8812 ldrh r2, [r2, #0] - 803bd8c: 4293 cmp r3, r2 - 803bd8e: da34 bge.n 803bdfa + 803bda8: f7ff ffa4 bl 803bcf4 + 803bdac: 4603 mov r3, r0 + 803bdae: 2b04 cmp r3, #4 + 803bdb0: d13b bne.n 803be2a + 803bdb2: 4b25 ldr r3, [pc, #148] ; (803be48 ) + 803bdb4: 881b ldrh r3, [r3, #0] + 803bdb6: 3301 adds r3, #1 + 803bdb8: 4a22 ldr r2, [pc, #136] ; (803be44 ) + 803bdba: 8812 ldrh r2, [r2, #0] + 803bdbc: 4293 cmp r3, r2 + 803bdbe: da34 bge.n 803be2a /* Bad length */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); return; } /* An MSS option with the right option length. */ mss = (u16_t)(tcp_get_next_optbyte() << 8); - 803bd90: f7ff ff98 bl 803bcc4 - 803bd94: 4603 mov r3, r0 - 803bd96: b29b uxth r3, r3 - 803bd98: 021b lsls r3, r3, #8 - 803bd9a: 81bb strh r3, [r7, #12] + 803bdc0: f7ff ff98 bl 803bcf4 + 803bdc4: 4603 mov r3, r0 + 803bdc6: b29b uxth r3, r3 + 803bdc8: 021b lsls r3, r3, #8 + 803bdca: 81bb strh r3, [r7, #12] mss |= tcp_get_next_optbyte(); - 803bd9c: f7ff ff92 bl 803bcc4 - 803bda0: 4603 mov r3, r0 - 803bda2: b29a uxth r2, r3 - 803bda4: 89bb ldrh r3, [r7, #12] - 803bda6: 4313 orrs r3, r2 - 803bda8: 81bb strh r3, [r7, #12] + 803bdcc: f7ff ff92 bl 803bcf4 + 803bdd0: 4603 mov r3, r0 + 803bdd2: b29a uxth r2, r3 + 803bdd4: 89bb ldrh r3, [r7, #12] + 803bdd6: 4313 orrs r3, r2 + 803bdd8: 81bb strh r3, [r7, #12] /* Limit the mss to the configured TCP_MSS and prevent division by zero */ pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss; - 803bdaa: 89bb ldrh r3, [r7, #12] - 803bdac: f5b3 7f06 cmp.w r3, #536 ; 0x218 - 803bdb0: d804 bhi.n 803bdbc - 803bdb2: 89bb ldrh r3, [r7, #12] - 803bdb4: 2b00 cmp r3, #0 - 803bdb6: d001 beq.n 803bdbc - 803bdb8: 89ba ldrh r2, [r7, #12] - 803bdba: e001 b.n 803bdc0 - 803bdbc: f44f 7206 mov.w r2, #536 ; 0x218 - 803bdc0: 687b ldr r3, [r7, #4] - 803bdc2: 865a strh r2, [r3, #50] ; 0x32 + 803bdda: 89bb ldrh r3, [r7, #12] + 803bddc: f5b3 7f06 cmp.w r3, #536 ; 0x218 + 803bde0: d804 bhi.n 803bdec + 803bde2: 89bb ldrh r3, [r7, #12] + 803bde4: 2b00 cmp r3, #0 + 803bde6: d001 beq.n 803bdec + 803bde8: 89ba ldrh r2, [r7, #12] + 803bdea: e001 b.n 803bdf0 + 803bdec: f44f 7206 mov.w r2, #536 ; 0x218 + 803bdf0: 687b ldr r3, [r7, #4] + 803bdf2: 865a strh r2, [r3, #50] ; 0x32 break; - 803bdc4: e010 b.n 803bde8 + 803bdf4: e010 b.n 803be18 } break; #endif /* LWIP_TCP_SACK_OUT */ default: LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n")); data = tcp_get_next_optbyte(); - 803bdc6: f7ff ff7d bl 803bcc4 - 803bdca: 4603 mov r3, r0 - 803bdcc: 72fb strb r3, [r7, #11] + 803bdf6: f7ff ff7d bl 803bcf4 + 803bdfa: 4603 mov r3, r0 + 803bdfc: 72fb strb r3, [r7, #11] if (data < 2) { - 803bdce: 7afb ldrb r3, [r7, #11] - 803bdd0: 2b01 cmp r3, #1 - 803bdd2: d914 bls.n 803bdfe + 803bdfe: 7afb ldrb r3, [r7, #11] + 803be00: 2b01 cmp r3, #1 + 803be02: d914 bls.n 803be2e and we don't process them further. */ return; } /* All other options have a length field, so that we easily can skip past them. */ tcp_optidx += data - 2; - 803bdd4: 7afb ldrb r3, [r7, #11] - 803bdd6: b29a uxth r2, r3 - 803bdd8: 4b0f ldr r3, [pc, #60] ; (803be18 ) - 803bdda: 881b ldrh r3, [r3, #0] - 803bddc: 4413 add r3, r2 - 803bdde: b29b uxth r3, r3 - 803bde0: 3b02 subs r3, #2 - 803bde2: b29a uxth r2, r3 - 803bde4: 4b0c ldr r3, [pc, #48] ; (803be18 ) - 803bde6: 801a strh r2, [r3, #0] + 803be04: 7afb ldrb r3, [r7, #11] + 803be06: b29a uxth r2, r3 + 803be08: 4b0f ldr r3, [pc, #60] ; (803be48 ) + 803be0a: 881b ldrh r3, [r3, #0] + 803be0c: 4413 add r3, r2 + 803be0e: b29b uxth r3, r3 + 803be10: 3b02 subs r3, #2 + 803be12: b29a uxth r2, r3 + 803be14: 4b0c ldr r3, [pc, #48] ; (803be48 ) + 803be16: 801a strh r2, [r3, #0] for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) { - 803bde8: 4b0b ldr r3, [pc, #44] ; (803be18 ) - 803bdea: 881a ldrh r2, [r3, #0] - 803bdec: 4b09 ldr r3, [pc, #36] ; (803be14 ) - 803bdee: 881b ldrh r3, [r3, #0] - 803bdf0: 429a cmp r2, r3 - 803bdf2: d3b3 bcc.n 803bd5c - 803bdf4: e004 b.n 803be00 + 803be18: 4b0b ldr r3, [pc, #44] ; (803be48 ) + 803be1a: 881a ldrh r2, [r3, #0] + 803be1c: 4b09 ldr r3, [pc, #36] ; (803be44 ) + 803be1e: 881b ldrh r3, [r3, #0] + 803be20: 429a cmp r2, r3 + 803be22: d3b3 bcc.n 803bd8c + 803be24: e004 b.n 803be30 return; - 803bdf6: bf00 nop - 803bdf8: e002 b.n 803be00 + 803be26: bf00 nop + 803be28: e002 b.n 803be30 return; - 803bdfa: bf00 nop - 803bdfc: e000 b.n 803be00 + 803be2a: bf00 nop + 803be2c: e000 b.n 803be30 return; - 803bdfe: bf00 nop + 803be2e: bf00 nop } } } } - 803be00: 3710 adds r7, #16 - 803be02: 46bd mov sp, r7 - 803be04: bd80 pop {r7, pc} - 803be06: bf00 nop - 803be08: 080434d0 .word 0x080434d0 - 803be0c: 08043934 .word 0x08043934 - 803be10: 0804351c .word 0x0804351c - 803be14: 2400e984 .word 0x2400e984 - 803be18: 2400e98c .word 0x2400e98c + 803be30: 3710 adds r7, #16 + 803be32: 46bd mov sp, r7 + 803be34: bd80 pop {r7, pc} + 803be36: bf00 nop + 803be38: 08043500 .word 0x08043500 + 803be3c: 08043964 .word 0x08043964 + 803be40: 0804354c .word 0x0804354c + 803be44: 2400e984 .word 0x2400e984 + 803be48: 2400e98c .word 0x2400e98c -0803be1c : +0803be4c : void tcp_trigger_input_pcb_close(void) { - 803be1c: b480 push {r7} - 803be1e: af00 add r7, sp, #0 + 803be4c: b480 push {r7} + 803be4e: af00 add r7, sp, #0 recv_flags |= TF_CLOSED; - 803be20: 4b05 ldr r3, [pc, #20] ; (803be38 ) - 803be22: 781b ldrb r3, [r3, #0] - 803be24: f043 0310 orr.w r3, r3, #16 - 803be28: b2da uxtb r2, r3 - 803be2a: 4b03 ldr r3, [pc, #12] ; (803be38 ) - 803be2c: 701a strb r2, [r3, #0] -} - 803be2e: bf00 nop - 803be30: 46bd mov sp, r7 - 803be32: f85d 7b04 ldr.w r7, [sp], #4 - 803be36: 4770 bx lr - 803be38: 2400e99d .word 0x2400e99d - -0803be3c : + 803be50: 4b05 ldr r3, [pc, #20] ; (803be68 ) + 803be52: 781b ldrb r3, [r3, #0] + 803be54: f043 0310 orr.w r3, r3, #16 + 803be58: b2da uxtb r2, r3 + 803be5a: 4b03 ldr r3, [pc, #12] ; (803be68 ) + 803be5c: 701a strb r2, [r3, #0] +} + 803be5e: bf00 nop + 803be60: 46bd mov sp, r7 + 803be62: f85d 7b04 ldr.w r7, [sp], #4 + 803be66: 4770 bx lr + 803be68: 2400e99d .word 0x2400e99d + +0803be6c : static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif); /* tcp_route: common code that returns a fixed bound netif or calls ip_route */ static struct netif * tcp_route(const struct tcp_pcb *pcb, const ip_addr_t *src, const ip_addr_t *dst) { - 803be3c: b580 push {r7, lr} - 803be3e: b084 sub sp, #16 - 803be40: af00 add r7, sp, #0 - 803be42: 60f8 str r0, [r7, #12] - 803be44: 60b9 str r1, [r7, #8] - 803be46: 607a str r2, [r7, #4] + 803be6c: b580 push {r7, lr} + 803be6e: b084 sub sp, #16 + 803be70: af00 add r7, sp, #0 + 803be72: 60f8 str r0, [r7, #12] + 803be74: 60b9 str r1, [r7, #8] + 803be76: 607a str r2, [r7, #4] LWIP_UNUSED_ARG(src); /* in case IPv4-only and source-based routing is disabled */ if ((pcb != NULL) && (pcb->netif_idx != NETIF_NO_INDEX)) { - 803be48: 68fb ldr r3, [r7, #12] - 803be4a: 2b00 cmp r3, #0 - 803be4c: d00a beq.n 803be64 - 803be4e: 68fb ldr r3, [r7, #12] - 803be50: 7a1b ldrb r3, [r3, #8] - 803be52: 2b00 cmp r3, #0 - 803be54: d006 beq.n 803be64 + 803be78: 68fb ldr r3, [r7, #12] + 803be7a: 2b00 cmp r3, #0 + 803be7c: d00a beq.n 803be94 + 803be7e: 68fb ldr r3, [r7, #12] + 803be80: 7a1b ldrb r3, [r3, #8] + 803be82: 2b00 cmp r3, #0 + 803be84: d006 beq.n 803be94 return netif_get_by_index(pcb->netif_idx); - 803be56: 68fb ldr r3, [r7, #12] - 803be58: 7a1b ldrb r3, [r3, #8] - 803be5a: 4618 mov r0, r3 - 803be5c: f7fb f8f6 bl 803704c - 803be60: 4603 mov r3, r0 - 803be62: e003 b.n 803be6c + 803be86: 68fb ldr r3, [r7, #12] + 803be88: 7a1b ldrb r3, [r3, #8] + 803be8a: 4618 mov r0, r3 + 803be8c: f7fb f8f6 bl 803707c + 803be90: 4603 mov r3, r0 + 803be92: e003 b.n 803be9c } else { return ip_route(src, dst); - 803be64: 6878 ldr r0, [r7, #4] - 803be66: f003 fafb bl 803f460 - 803be6a: 4603 mov r3, r0 + 803be94: 6878 ldr r0, [r7, #4] + 803be96: f003 fafb bl 803f490 + 803be9a: 4603 mov r3, r0 } } - 803be6c: 4618 mov r0, r3 - 803be6e: 3710 adds r7, #16 - 803be70: 46bd mov sp, r7 - 803be72: bd80 pop {r7, pc} + 803be9c: 4618 mov r0, r3 + 803be9e: 3710 adds r7, #16 + 803bea0: 46bd mov sp, r7 + 803bea2: bd80 pop {r7, pc} -0803be74 : +0803bea4 : * The TCP header is filled in except ackno and wnd. * p is freed on failure. */ static struct tcp_seg * tcp_create_segment(const struct tcp_pcb *pcb, struct pbuf *p, u8_t hdrflags, u32_t seqno, u8_t optflags) { - 803be74: b590 push {r4, r7, lr} - 803be76: b087 sub sp, #28 - 803be78: af00 add r7, sp, #0 - 803be7a: 60f8 str r0, [r7, #12] - 803be7c: 60b9 str r1, [r7, #8] - 803be7e: 603b str r3, [r7, #0] - 803be80: 4613 mov r3, r2 - 803be82: 71fb strb r3, [r7, #7] + 803bea4: b590 push {r4, r7, lr} + 803bea6: b087 sub sp, #28 + 803bea8: af00 add r7, sp, #0 + 803beaa: 60f8 str r0, [r7, #12] + 803beac: 60b9 str r1, [r7, #8] + 803beae: 603b str r3, [r7, #0] + 803beb0: 4613 mov r3, r2 + 803beb2: 71fb strb r3, [r7, #7] struct tcp_seg *seg; u8_t optlen; LWIP_ASSERT("tcp_create_segment: invalid pcb", pcb != NULL); - 803be84: 68fb ldr r3, [r7, #12] - 803be86: 2b00 cmp r3, #0 - 803be88: d105 bne.n 803be96 - 803be8a: 4b44 ldr r3, [pc, #272] ; (803bf9c ) - 803be8c: 22a3 movs r2, #163 ; 0xa3 - 803be8e: 4944 ldr r1, [pc, #272] ; (803bfa0 ) - 803be90: 4844 ldr r0, [pc, #272] ; (803bfa4 ) - 803be92: f004 fe25 bl 8040ae0 + 803beb4: 68fb ldr r3, [r7, #12] + 803beb6: 2b00 cmp r3, #0 + 803beb8: d105 bne.n 803bec6 + 803beba: 4b44 ldr r3, [pc, #272] ; (803bfcc ) + 803bebc: 22a3 movs r2, #163 ; 0xa3 + 803bebe: 4944 ldr r1, [pc, #272] ; (803bfd0 ) + 803bec0: 4844 ldr r0, [pc, #272] ; (803bfd4 ) + 803bec2: f004 fe25 bl 8040b10 LWIP_ASSERT("tcp_create_segment: invalid pbuf", p != NULL); - 803be96: 68bb ldr r3, [r7, #8] - 803be98: 2b00 cmp r3, #0 - 803be9a: d105 bne.n 803bea8 - 803be9c: 4b3f ldr r3, [pc, #252] ; (803bf9c ) - 803be9e: 22a4 movs r2, #164 ; 0xa4 - 803bea0: 4941 ldr r1, [pc, #260] ; (803bfa8 ) - 803bea2: 4840 ldr r0, [pc, #256] ; (803bfa4 ) - 803bea4: f004 fe1c bl 8040ae0 + 803bec6: 68bb ldr r3, [r7, #8] + 803bec8: 2b00 cmp r3, #0 + 803beca: d105 bne.n 803bed8 + 803becc: 4b3f ldr r3, [pc, #252] ; (803bfcc ) + 803bece: 22a4 movs r2, #164 ; 0xa4 + 803bed0: 4941 ldr r1, [pc, #260] ; (803bfd8 ) + 803bed2: 4840 ldr r0, [pc, #256] ; (803bfd4 ) + 803bed4: f004 fe1c bl 8040b10 optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb); - 803bea8: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 - 803beac: 009b lsls r3, r3, #2 - 803beae: b2db uxtb r3, r3 - 803beb0: f003 0304 and.w r3, r3, #4 - 803beb4: 75fb strb r3, [r7, #23] + 803bed8: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 + 803bedc: 009b lsls r3, r3, #2 + 803bede: b2db uxtb r3, r3 + 803bee0: f003 0304 and.w r3, r3, #4 + 803bee4: 75fb strb r3, [r7, #23] if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) { - 803beb6: 2003 movs r0, #3 - 803beb8: f7fa fd26 bl 8036908 - 803bebc: 6138 str r0, [r7, #16] - 803bebe: 693b ldr r3, [r7, #16] - 803bec0: 2b00 cmp r3, #0 - 803bec2: d104 bne.n 803bece + 803bee6: 2003 movs r0, #3 + 803bee8: f7fa fd26 bl 8036938 + 803beec: 6138 str r0, [r7, #16] + 803beee: 693b ldr r3, [r7, #16] + 803bef0: 2b00 cmp r3, #0 + 803bef2: d104 bne.n 803befe LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no memory.\n")); pbuf_free(p); - 803bec4: 68b8 ldr r0, [r7, #8] - 803bec6: f7fb fc21 bl 803770c + 803bef4: 68b8 ldr r0, [r7, #8] + 803bef6: f7fb fc21 bl 803773c return NULL; - 803beca: 2300 movs r3, #0 - 803becc: e061 b.n 803bf92 + 803befa: 2300 movs r3, #0 + 803befc: e061 b.n 803bfc2 } seg->flags = optflags; - 803bece: 693b ldr r3, [r7, #16] - 803bed0: f897 2028 ldrb.w r2, [r7, #40] ; 0x28 - 803bed4: 729a strb r2, [r3, #10] + 803befe: 693b ldr r3, [r7, #16] + 803bf00: f897 2028 ldrb.w r2, [r7, #40] ; 0x28 + 803bf04: 729a strb r2, [r3, #10] seg->next = NULL; - 803bed6: 693b ldr r3, [r7, #16] - 803bed8: 2200 movs r2, #0 - 803beda: 601a str r2, [r3, #0] + 803bf06: 693b ldr r3, [r7, #16] + 803bf08: 2200 movs r2, #0 + 803bf0a: 601a str r2, [r3, #0] seg->p = p; - 803bedc: 693b ldr r3, [r7, #16] - 803bede: 68ba ldr r2, [r7, #8] - 803bee0: 605a str r2, [r3, #4] + 803bf0c: 693b ldr r3, [r7, #16] + 803bf0e: 68ba ldr r2, [r7, #8] + 803bf10: 605a str r2, [r3, #4] LWIP_ASSERT("p->tot_len >= optlen", p->tot_len >= optlen); - 803bee2: 68bb ldr r3, [r7, #8] - 803bee4: 891a ldrh r2, [r3, #8] - 803bee6: 7dfb ldrb r3, [r7, #23] - 803bee8: b29b uxth r3, r3 - 803beea: 429a cmp r2, r3 - 803beec: d205 bcs.n 803befa - 803beee: 4b2b ldr r3, [pc, #172] ; (803bf9c ) - 803bef0: 22b0 movs r2, #176 ; 0xb0 - 803bef2: 492e ldr r1, [pc, #184] ; (803bfac ) - 803bef4: 482b ldr r0, [pc, #172] ; (803bfa4 ) - 803bef6: f004 fdf3 bl 8040ae0 + 803bf12: 68bb ldr r3, [r7, #8] + 803bf14: 891a ldrh r2, [r3, #8] + 803bf16: 7dfb ldrb r3, [r7, #23] + 803bf18: b29b uxth r3, r3 + 803bf1a: 429a cmp r2, r3 + 803bf1c: d205 bcs.n 803bf2a + 803bf1e: 4b2b ldr r3, [pc, #172] ; (803bfcc ) + 803bf20: 22b0 movs r2, #176 ; 0xb0 + 803bf22: 492e ldr r1, [pc, #184] ; (803bfdc ) + 803bf24: 482b ldr r0, [pc, #172] ; (803bfd4 ) + 803bf26: f004 fdf3 bl 8040b10 seg->len = p->tot_len - optlen; - 803befa: 68bb ldr r3, [r7, #8] - 803befc: 891a ldrh r2, [r3, #8] - 803befe: 7dfb ldrb r3, [r7, #23] - 803bf00: b29b uxth r3, r3 - 803bf02: 1ad3 subs r3, r2, r3 - 803bf04: b29a uxth r2, r3 - 803bf06: 693b ldr r3, [r7, #16] - 803bf08: 811a strh r2, [r3, #8] + 803bf2a: 68bb ldr r3, [r7, #8] + 803bf2c: 891a ldrh r2, [r3, #8] + 803bf2e: 7dfb ldrb r3, [r7, #23] + 803bf30: b29b uxth r3, r3 + 803bf32: 1ad3 subs r3, r2, r3 + 803bf34: b29a uxth r2, r3 + 803bf36: 693b ldr r3, [r7, #16] + 803bf38: 811a strh r2, [r3, #8] LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED", (optflags & TF_SEG_DATA_CHECKSUMMED) == 0); #endif /* TCP_CHECKSUM_ON_COPY */ /* build TCP header */ if (pbuf_add_header(p, TCP_HLEN)) { - 803bf0a: 2114 movs r1, #20 - 803bf0c: 68b8 ldr r0, [r7, #8] - 803bf0e: f7fb fb67 bl 80375e0 - 803bf12: 4603 mov r3, r0 - 803bf14: 2b00 cmp r3, #0 - 803bf16: d004 beq.n 803bf22 + 803bf3a: 2114 movs r1, #20 + 803bf3c: 68b8 ldr r0, [r7, #8] + 803bf3e: f7fb fb67 bl 8037610 + 803bf42: 4603 mov r3, r0 + 803bf44: 2b00 cmp r3, #0 + 803bf46: d004 beq.n 803bf52 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no room for TCP header in pbuf.\n")); TCP_STATS_INC(tcp.err); tcp_seg_free(seg); - 803bf18: 6938 ldr r0, [r7, #16] - 803bf1a: f7fd f824 bl 8038f66 + 803bf48: 6938 ldr r0, [r7, #16] + 803bf4a: f7fd f824 bl 8038f96 return NULL; - 803bf1e: 2300 movs r3, #0 - 803bf20: e037 b.n 803bf92 + 803bf4e: 2300 movs r3, #0 + 803bf50: e037 b.n 803bfc2 } seg->tcphdr = (struct tcp_hdr *)seg->p->payload; - 803bf22: 693b ldr r3, [r7, #16] - 803bf24: 685b ldr r3, [r3, #4] - 803bf26: 685a ldr r2, [r3, #4] - 803bf28: 693b ldr r3, [r7, #16] - 803bf2a: 60da str r2, [r3, #12] + 803bf52: 693b ldr r3, [r7, #16] + 803bf54: 685b ldr r3, [r3, #4] + 803bf56: 685a ldr r2, [r3, #4] + 803bf58: 693b ldr r3, [r7, #16] + 803bf5a: 60da str r2, [r3, #12] seg->tcphdr->src = lwip_htons(pcb->local_port); - 803bf2c: 68fb ldr r3, [r7, #12] - 803bf2e: 8ada ldrh r2, [r3, #22] - 803bf30: 693b ldr r3, [r7, #16] - 803bf32: 68dc ldr r4, [r3, #12] - 803bf34: 4610 mov r0, r2 - 803bf36: f7f9 ffb7 bl 8035ea8 - 803bf3a: 4603 mov r3, r0 - 803bf3c: 8023 strh r3, [r4, #0] + 803bf5c: 68fb ldr r3, [r7, #12] + 803bf5e: 8ada ldrh r2, [r3, #22] + 803bf60: 693b ldr r3, [r7, #16] + 803bf62: 68dc ldr r4, [r3, #12] + 803bf64: 4610 mov r0, r2 + 803bf66: f7f9 ffb7 bl 8035ed8 + 803bf6a: 4603 mov r3, r0 + 803bf6c: 8023 strh r3, [r4, #0] seg->tcphdr->dest = lwip_htons(pcb->remote_port); - 803bf3e: 68fb ldr r3, [r7, #12] - 803bf40: 8b1a ldrh r2, [r3, #24] - 803bf42: 693b ldr r3, [r7, #16] - 803bf44: 68dc ldr r4, [r3, #12] - 803bf46: 4610 mov r0, r2 - 803bf48: f7f9 ffae bl 8035ea8 - 803bf4c: 4603 mov r3, r0 - 803bf4e: 8063 strh r3, [r4, #2] + 803bf6e: 68fb ldr r3, [r7, #12] + 803bf70: 8b1a ldrh r2, [r3, #24] + 803bf72: 693b ldr r3, [r7, #16] + 803bf74: 68dc ldr r4, [r3, #12] + 803bf76: 4610 mov r0, r2 + 803bf78: f7f9 ffae bl 8035ed8 + 803bf7c: 4603 mov r3, r0 + 803bf7e: 8063 strh r3, [r4, #2] seg->tcphdr->seqno = lwip_htonl(seqno); - 803bf50: 693b ldr r3, [r7, #16] - 803bf52: 68dc ldr r4, [r3, #12] - 803bf54: 6838 ldr r0, [r7, #0] - 803bf56: f7f9 ffbc bl 8035ed2 - 803bf5a: 4603 mov r3, r0 - 803bf5c: 6063 str r3, [r4, #4] + 803bf80: 693b ldr r3, [r7, #16] + 803bf82: 68dc ldr r4, [r3, #12] + 803bf84: 6838 ldr r0, [r7, #0] + 803bf86: f7f9 ffbc bl 8035f02 + 803bf8a: 4603 mov r3, r0 + 803bf8c: 6063 str r3, [r4, #4] /* ackno is set in tcp_output */ TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), hdrflags); - 803bf5e: 7dfb ldrb r3, [r7, #23] - 803bf60: 089b lsrs r3, r3, #2 - 803bf62: b2db uxtb r3, r3 - 803bf64: b29b uxth r3, r3 - 803bf66: 3305 adds r3, #5 - 803bf68: b29b uxth r3, r3 - 803bf6a: 031b lsls r3, r3, #12 - 803bf6c: b29a uxth r2, r3 - 803bf6e: 79fb ldrb r3, [r7, #7] - 803bf70: b29b uxth r3, r3 - 803bf72: 4313 orrs r3, r2 - 803bf74: b29a uxth r2, r3 - 803bf76: 693b ldr r3, [r7, #16] - 803bf78: 68dc ldr r4, [r3, #12] - 803bf7a: 4610 mov r0, r2 - 803bf7c: f7f9 ff94 bl 8035ea8 - 803bf80: 4603 mov r3, r0 - 803bf82: 81a3 strh r3, [r4, #12] + 803bf8e: 7dfb ldrb r3, [r7, #23] + 803bf90: 089b lsrs r3, r3, #2 + 803bf92: b2db uxtb r3, r3 + 803bf94: b29b uxth r3, r3 + 803bf96: 3305 adds r3, #5 + 803bf98: b29b uxth r3, r3 + 803bf9a: 031b lsls r3, r3, #12 + 803bf9c: b29a uxth r2, r3 + 803bf9e: 79fb ldrb r3, [r7, #7] + 803bfa0: b29b uxth r3, r3 + 803bfa2: 4313 orrs r3, r2 + 803bfa4: b29a uxth r2, r3 + 803bfa6: 693b ldr r3, [r7, #16] + 803bfa8: 68dc ldr r4, [r3, #12] + 803bfaa: 4610 mov r0, r2 + 803bfac: f7f9 ff94 bl 8035ed8 + 803bfb0: 4603 mov r3, r0 + 803bfb2: 81a3 strh r3, [r4, #12] /* wnd and chksum are set in tcp_output */ seg->tcphdr->urgp = 0; - 803bf84: 693b ldr r3, [r7, #16] - 803bf86: 68db ldr r3, [r3, #12] - 803bf88: 2200 movs r2, #0 - 803bf8a: 749a strb r2, [r3, #18] - 803bf8c: 2200 movs r2, #0 - 803bf8e: 74da strb r2, [r3, #19] + 803bfb4: 693b ldr r3, [r7, #16] + 803bfb6: 68db ldr r3, [r3, #12] + 803bfb8: 2200 movs r2, #0 + 803bfba: 749a strb r2, [r3, #18] + 803bfbc: 2200 movs r2, #0 + 803bfbe: 74da strb r2, [r3, #19] return seg; - 803bf90: 693b ldr r3, [r7, #16] -} - 803bf92: 4618 mov r0, r3 - 803bf94: 371c adds r7, #28 - 803bf96: 46bd mov sp, r7 - 803bf98: bd90 pop {r4, r7, pc} - 803bf9a: bf00 nop - 803bf9c: 08043950 .word 0x08043950 - 803bfa0: 08043984 .word 0x08043984 - 803bfa4: 080439a4 .word 0x080439a4 - 803bfa8: 080439cc .word 0x080439cc - 803bfac: 080439f0 .word 0x080439f0 - -0803bfb0 : + 803bfc0: 693b ldr r3, [r7, #16] +} + 803bfc2: 4618 mov r0, r3 + 803bfc4: 371c adds r7, #28 + 803bfc6: 46bd mov sp, r7 + 803bfc8: bd90 pop {r4, r7, pc} + 803bfca: bf00 nop + 803bfcc: 08043980 .word 0x08043980 + 803bfd0: 080439b4 .word 0x080439b4 + 803bfd4: 080439d4 .word 0x080439d4 + 803bfd8: 080439fc .word 0x080439fc + 803bfdc: 08043a20 .word 0x08043a20 + +0803bfe0 : #if TCP_OVERSIZE static struct pbuf * tcp_pbuf_prealloc(pbuf_layer layer, u16_t length, u16_t max_length, u16_t *oversize, const struct tcp_pcb *pcb, u8_t apiflags, u8_t first_seg) { - 803bfb0: b580 push {r7, lr} - 803bfb2: b086 sub sp, #24 - 803bfb4: af00 add r7, sp, #0 - 803bfb6: 607b str r3, [r7, #4] - 803bfb8: 4603 mov r3, r0 - 803bfba: 73fb strb r3, [r7, #15] - 803bfbc: 460b mov r3, r1 - 803bfbe: 81bb strh r3, [r7, #12] - 803bfc0: 4613 mov r3, r2 - 803bfc2: 817b strh r3, [r7, #10] + 803bfe0: b580 push {r7, lr} + 803bfe2: b086 sub sp, #24 + 803bfe4: af00 add r7, sp, #0 + 803bfe6: 607b str r3, [r7, #4] + 803bfe8: 4603 mov r3, r0 + 803bfea: 73fb strb r3, [r7, #15] + 803bfec: 460b mov r3, r1 + 803bfee: 81bb strh r3, [r7, #12] + 803bff0: 4613 mov r3, r2 + 803bff2: 817b strh r3, [r7, #10] struct pbuf *p; u16_t alloc = length; - 803bfc4: 89bb ldrh r3, [r7, #12] - 803bfc6: 82fb strh r3, [r7, #22] + 803bff4: 89bb ldrh r3, [r7, #12] + 803bff6: 82fb strh r3, [r7, #22] LWIP_ASSERT("tcp_pbuf_prealloc: invalid oversize", oversize != NULL); - 803bfc8: 687b ldr r3, [r7, #4] - 803bfca: 2b00 cmp r3, #0 - 803bfcc: d105 bne.n 803bfda - 803bfce: 4b30 ldr r3, [pc, #192] ; (803c090 ) - 803bfd0: 22e8 movs r2, #232 ; 0xe8 - 803bfd2: 4930 ldr r1, [pc, #192] ; (803c094 ) - 803bfd4: 4830 ldr r0, [pc, #192] ; (803c098 ) - 803bfd6: f004 fd83 bl 8040ae0 + 803bff8: 687b ldr r3, [r7, #4] + 803bffa: 2b00 cmp r3, #0 + 803bffc: d105 bne.n 803c00a + 803bffe: 4b30 ldr r3, [pc, #192] ; (803c0c0 ) + 803c000: 22e8 movs r2, #232 ; 0xe8 + 803c002: 4930 ldr r1, [pc, #192] ; (803c0c4 ) + 803c004: 4830 ldr r0, [pc, #192] ; (803c0c8 ) + 803c006: f004 fd83 bl 8040b10 LWIP_ASSERT("tcp_pbuf_prealloc: invalid pcb", pcb != NULL); - 803bfda: 6a3b ldr r3, [r7, #32] - 803bfdc: 2b00 cmp r3, #0 - 803bfde: d105 bne.n 803bfec - 803bfe0: 4b2b ldr r3, [pc, #172] ; (803c090 ) - 803bfe2: 22e9 movs r2, #233 ; 0xe9 - 803bfe4: 492d ldr r1, [pc, #180] ; (803c09c ) - 803bfe6: 482c ldr r0, [pc, #176] ; (803c098 ) - 803bfe8: f004 fd7a bl 8040ae0 + 803c00a: 6a3b ldr r3, [r7, #32] + 803c00c: 2b00 cmp r3, #0 + 803c00e: d105 bne.n 803c01c + 803c010: 4b2b ldr r3, [pc, #172] ; (803c0c0 ) + 803c012: 22e9 movs r2, #233 ; 0xe9 + 803c014: 492d ldr r1, [pc, #180] ; (803c0cc ) + 803c016: 482c ldr r0, [pc, #176] ; (803c0c8 ) + 803c018: f004 fd7a bl 8040b10 LWIP_UNUSED_ARG(pcb); LWIP_UNUSED_ARG(apiflags); LWIP_UNUSED_ARG(first_seg); alloc = max_length; #else /* LWIP_NETIF_TX_SINGLE_PBUF */ if (length < max_length) { - 803bfec: 89ba ldrh r2, [r7, #12] - 803bfee: 897b ldrh r3, [r7, #10] - 803bff0: 429a cmp r2, r3 - 803bff2: d221 bcs.n 803c038 + 803c01c: 89ba ldrh r2, [r7, #12] + 803c01e: 897b ldrh r3, [r7, #10] + 803c020: 429a cmp r2, r3 + 803c022: d221 bcs.n 803c068 * * Did the user set TCP_WRITE_FLAG_MORE? * * Will the Nagle algorithm defer transmission of this segment? */ if ((apiflags & TCP_WRITE_FLAG_MORE) || - 803bff4: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 - 803bff8: f003 0302 and.w r3, r3, #2 - 803bffc: 2b00 cmp r3, #0 - 803bffe: d111 bne.n 803c024 + 803c024: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 + 803c028: f003 0302 and.w r3, r3, #2 + 803c02c: 2b00 cmp r3, #0 + 803c02e: d111 bne.n 803c054 (!(pcb->flags & TF_NODELAY) && - 803c000: 6a3b ldr r3, [r7, #32] - 803c002: 8b5b ldrh r3, [r3, #26] - 803c004: f003 0340 and.w r3, r3, #64 ; 0x40 + 803c030: 6a3b ldr r3, [r7, #32] + 803c032: 8b5b ldrh r3, [r3, #26] + 803c034: f003 0340 and.w r3, r3, #64 ; 0x40 if ((apiflags & TCP_WRITE_FLAG_MORE) || - 803c008: 2b00 cmp r3, #0 - 803c00a: d115 bne.n 803c038 + 803c038: 2b00 cmp r3, #0 + 803c03a: d115 bne.n 803c068 (!(pcb->flags & TF_NODELAY) && - 803c00c: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 - 803c010: 2b00 cmp r3, #0 - 803c012: d007 beq.n 803c024 + 803c03c: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 + 803c040: 2b00 cmp r3, #0 + 803c042: d007 beq.n 803c054 (!first_seg || pcb->unsent != NULL || - 803c014: 6a3b ldr r3, [r7, #32] - 803c016: 6edb ldr r3, [r3, #108] ; 0x6c + 803c044: 6a3b ldr r3, [r7, #32] + 803c046: 6edb ldr r3, [r3, #108] ; 0x6c (!first_seg || - 803c018: 2b00 cmp r3, #0 - 803c01a: d103 bne.n 803c024 + 803c048: 2b00 cmp r3, #0 + 803c04a: d103 bne.n 803c054 pcb->unacked != NULL))) { - 803c01c: 6a3b ldr r3, [r7, #32] - 803c01e: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c04c: 6a3b ldr r3, [r7, #32] + 803c04e: 6f1b ldr r3, [r3, #112] ; 0x70 pcb->unsent != NULL || - 803c020: 2b00 cmp r3, #0 - 803c022: d009 beq.n 803c038 + 803c050: 2b00 cmp r3, #0 + 803c052: d009 beq.n 803c068 alloc = LWIP_MIN(max_length, LWIP_MEM_ALIGN_SIZE(TCP_OVERSIZE_CALC_LENGTH(length))); - 803c024: 89bb ldrh r3, [r7, #12] - 803c026: f203 231b addw r3, r3, #539 ; 0x21b - 803c02a: f023 0203 bic.w r2, r3, #3 - 803c02e: 897b ldrh r3, [r7, #10] - 803c030: 4293 cmp r3, r2 - 803c032: bf28 it cs - 803c034: 4613 movcs r3, r2 - 803c036: 82fb strh r3, [r7, #22] + 803c054: 89bb ldrh r3, [r7, #12] + 803c056: f203 231b addw r3, r3, #539 ; 0x21b + 803c05a: f023 0203 bic.w r2, r3, #3 + 803c05e: 897b ldrh r3, [r7, #10] + 803c060: 4293 cmp r3, r2 + 803c062: bf28 it cs + 803c064: 4613 movcs r3, r2 + 803c066: 82fb strh r3, [r7, #22] } } #endif /* LWIP_NETIF_TX_SINGLE_PBUF */ p = pbuf_alloc(layer, alloc, PBUF_RAM); - 803c038: 8af9 ldrh r1, [r7, #22] - 803c03a: 7bfb ldrb r3, [r7, #15] - 803c03c: f44f 7220 mov.w r2, #640 ; 0x280 - 803c040: 4618 mov r0, r3 - 803c042: f7fb f87f bl 8037144 - 803c046: 6138 str r0, [r7, #16] + 803c068: 8af9 ldrh r1, [r7, #22] + 803c06a: 7bfb ldrb r3, [r7, #15] + 803c06c: f44f 7220 mov.w r2, #640 ; 0x280 + 803c070: 4618 mov r0, r3 + 803c072: f7fb f87f bl 8037174 + 803c076: 6138 str r0, [r7, #16] if (p == NULL) { - 803c048: 693b ldr r3, [r7, #16] - 803c04a: 2b00 cmp r3, #0 - 803c04c: d101 bne.n 803c052 + 803c078: 693b ldr r3, [r7, #16] + 803c07a: 2b00 cmp r3, #0 + 803c07c: d101 bne.n 803c082 return NULL; - 803c04e: 2300 movs r3, #0 - 803c050: e019 b.n 803c086 + 803c07e: 2300 movs r3, #0 + 803c080: e019 b.n 803c0b6 } LWIP_ASSERT("need unchained pbuf", p->next == NULL); - 803c052: 693b ldr r3, [r7, #16] - 803c054: 681b ldr r3, [r3, #0] - 803c056: 2b00 cmp r3, #0 - 803c058: d006 beq.n 803c068 - 803c05a: 4b0d ldr r3, [pc, #52] ; (803c090 ) - 803c05c: f240 120b movw r2, #267 ; 0x10b - 803c060: 490f ldr r1, [pc, #60] ; (803c0a0 ) - 803c062: 480d ldr r0, [pc, #52] ; (803c098 ) - 803c064: f004 fd3c bl 8040ae0 + 803c082: 693b ldr r3, [r7, #16] + 803c084: 681b ldr r3, [r3, #0] + 803c086: 2b00 cmp r3, #0 + 803c088: d006 beq.n 803c098 + 803c08a: 4b0d ldr r3, [pc, #52] ; (803c0c0 ) + 803c08c: f240 120b movw r2, #267 ; 0x10b + 803c090: 490f ldr r1, [pc, #60] ; (803c0d0 ) + 803c092: 480d ldr r0, [pc, #52] ; (803c0c8 ) + 803c094: f004 fd3c bl 8040b10 *oversize = p->len - length; - 803c068: 693b ldr r3, [r7, #16] - 803c06a: 895a ldrh r2, [r3, #10] - 803c06c: 89bb ldrh r3, [r7, #12] - 803c06e: 1ad3 subs r3, r2, r3 - 803c070: b29a uxth r2, r3 - 803c072: 687b ldr r3, [r7, #4] - 803c074: 801a strh r2, [r3, #0] + 803c098: 693b ldr r3, [r7, #16] + 803c09a: 895a ldrh r2, [r3, #10] + 803c09c: 89bb ldrh r3, [r7, #12] + 803c09e: 1ad3 subs r3, r2, r3 + 803c0a0: b29a uxth r2, r3 + 803c0a2: 687b ldr r3, [r7, #4] + 803c0a4: 801a strh r2, [r3, #0] /* trim p->len to the currently used size */ p->len = p->tot_len = length; - 803c076: 693b ldr r3, [r7, #16] - 803c078: 89ba ldrh r2, [r7, #12] - 803c07a: 811a strh r2, [r3, #8] - 803c07c: 693b ldr r3, [r7, #16] - 803c07e: 891a ldrh r2, [r3, #8] - 803c080: 693b ldr r3, [r7, #16] - 803c082: 815a strh r2, [r3, #10] + 803c0a6: 693b ldr r3, [r7, #16] + 803c0a8: 89ba ldrh r2, [r7, #12] + 803c0aa: 811a strh r2, [r3, #8] + 803c0ac: 693b ldr r3, [r7, #16] + 803c0ae: 891a ldrh r2, [r3, #8] + 803c0b0: 693b ldr r3, [r7, #16] + 803c0b2: 815a strh r2, [r3, #10] return p; - 803c084: 693b ldr r3, [r7, #16] -} - 803c086: 4618 mov r0, r3 - 803c088: 3718 adds r7, #24 - 803c08a: 46bd mov sp, r7 - 803c08c: bd80 pop {r7, pc} - 803c08e: bf00 nop - 803c090: 08043950 .word 0x08043950 - 803c094: 08043a08 .word 0x08043a08 - 803c098: 080439a4 .word 0x080439a4 - 803c09c: 08043a2c .word 0x08043a2c - 803c0a0: 08043a4c .word 0x08043a4c - -0803c0a4 : + 803c0b4: 693b ldr r3, [r7, #16] +} + 803c0b6: 4618 mov r0, r3 + 803c0b8: 3718 adds r7, #24 + 803c0ba: 46bd mov sp, r7 + 803c0bc: bd80 pop {r7, pc} + 803c0be: bf00 nop + 803c0c0: 08043980 .word 0x08043980 + 803c0c4: 08043a38 .word 0x08043a38 + 803c0c8: 080439d4 .word 0x080439d4 + 803c0cc: 08043a5c .word 0x08043a5c + 803c0d0: 08043a7c .word 0x08043a7c + +0803c0d4 : * @param len length of data to send (checked agains snd_buf) * @return ERR_OK if tcp_write is allowed to proceed, another err_t otherwise */ static err_t tcp_write_checks(struct tcp_pcb *pcb, u16_t len) { - 803c0a4: b580 push {r7, lr} - 803c0a6: b082 sub sp, #8 - 803c0a8: af00 add r7, sp, #0 - 803c0aa: 6078 str r0, [r7, #4] - 803c0ac: 460b mov r3, r1 - 803c0ae: 807b strh r3, [r7, #2] + 803c0d4: b580 push {r7, lr} + 803c0d6: b082 sub sp, #8 + 803c0d8: af00 add r7, sp, #0 + 803c0da: 6078 str r0, [r7, #4] + 803c0dc: 460b mov r3, r1 + 803c0de: 807b strh r3, [r7, #2] LWIP_ASSERT("tcp_write_checks: invalid pcb", pcb != NULL); - 803c0b0: 687b ldr r3, [r7, #4] - 803c0b2: 2b00 cmp r3, #0 - 803c0b4: d106 bne.n 803c0c4 - 803c0b6: 4b33 ldr r3, [pc, #204] ; (803c184 ) - 803c0b8: f240 1233 movw r2, #307 ; 0x133 - 803c0bc: 4932 ldr r1, [pc, #200] ; (803c188 ) - 803c0be: 4833 ldr r0, [pc, #204] ; (803c18c ) - 803c0c0: f004 fd0e bl 8040ae0 + 803c0e0: 687b ldr r3, [r7, #4] + 803c0e2: 2b00 cmp r3, #0 + 803c0e4: d106 bne.n 803c0f4 + 803c0e6: 4b33 ldr r3, [pc, #204] ; (803c1b4 ) + 803c0e8: f240 1233 movw r2, #307 ; 0x133 + 803c0ec: 4932 ldr r1, [pc, #200] ; (803c1b8 ) + 803c0ee: 4833 ldr r0, [pc, #204] ; (803c1bc ) + 803c0f0: f004 fd0e bl 8040b10 /* connection is in invalid state for data transmission? */ if ((pcb->state != ESTABLISHED) && - 803c0c4: 687b ldr r3, [r7, #4] - 803c0c6: 7d1b ldrb r3, [r3, #20] - 803c0c8: 2b04 cmp r3, #4 - 803c0ca: d00e beq.n 803c0ea + 803c0f4: 687b ldr r3, [r7, #4] + 803c0f6: 7d1b ldrb r3, [r3, #20] + 803c0f8: 2b04 cmp r3, #4 + 803c0fa: d00e beq.n 803c11a (pcb->state != CLOSE_WAIT) && - 803c0cc: 687b ldr r3, [r7, #4] - 803c0ce: 7d1b ldrb r3, [r3, #20] + 803c0fc: 687b ldr r3, [r7, #4] + 803c0fe: 7d1b ldrb r3, [r3, #20] if ((pcb->state != ESTABLISHED) && - 803c0d0: 2b07 cmp r3, #7 - 803c0d2: d00a beq.n 803c0ea + 803c100: 2b07 cmp r3, #7 + 803c102: d00a beq.n 803c11a (pcb->state != SYN_SENT) && - 803c0d4: 687b ldr r3, [r7, #4] - 803c0d6: 7d1b ldrb r3, [r3, #20] + 803c104: 687b ldr r3, [r7, #4] + 803c106: 7d1b ldrb r3, [r3, #20] (pcb->state != CLOSE_WAIT) && - 803c0d8: 2b02 cmp r3, #2 - 803c0da: d006 beq.n 803c0ea + 803c108: 2b02 cmp r3, #2 + 803c10a: d006 beq.n 803c11a (pcb->state != SYN_RCVD)) { - 803c0dc: 687b ldr r3, [r7, #4] - 803c0de: 7d1b ldrb r3, [r3, #20] + 803c10c: 687b ldr r3, [r7, #4] + 803c10e: 7d1b ldrb r3, [r3, #20] (pcb->state != SYN_SENT) && - 803c0e0: 2b03 cmp r3, #3 - 803c0e2: d002 beq.n 803c0ea + 803c110: 2b03 cmp r3, #3 + 803c112: d002 beq.n 803c11a LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n")); return ERR_CONN; - 803c0e4: f06f 030a mvn.w r3, #10 - 803c0e8: e048 b.n 803c17c + 803c114: f06f 030a mvn.w r3, #10 + 803c118: e048 b.n 803c1ac } else if (len == 0) { - 803c0ea: 887b ldrh r3, [r7, #2] - 803c0ec: 2b00 cmp r3, #0 - 803c0ee: d101 bne.n 803c0f4 + 803c11a: 887b ldrh r3, [r7, #2] + 803c11c: 2b00 cmp r3, #0 + 803c11e: d101 bne.n 803c124 return ERR_OK; - 803c0f0: 2300 movs r3, #0 - 803c0f2: e043 b.n 803c17c + 803c120: 2300 movs r3, #0 + 803c122: e043 b.n 803c1ac } /* fail on too much data */ if (len > pcb->snd_buf) { - 803c0f4: 687b ldr r3, [r7, #4] - 803c0f6: f8b3 3064 ldrh.w r3, [r3, #100] ; 0x64 - 803c0fa: 887a ldrh r2, [r7, #2] - 803c0fc: 429a cmp r2, r3 - 803c0fe: d909 bls.n 803c114 + 803c124: 687b ldr r3, [r7, #4] + 803c126: f8b3 3064 ldrh.w r3, [r3, #100] ; 0x64 + 803c12a: 887a ldrh r2, [r7, #2] + 803c12c: 429a cmp r2, r3 + 803c12e: d909 bls.n 803c144 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too much data (len=%"U16_F" > snd_buf=%"TCPWNDSIZE_F")\n", len, pcb->snd_buf)); tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803c100: 687b ldr r3, [r7, #4] - 803c102: 8b5b ldrh r3, [r3, #26] - 803c104: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803c108: b29a uxth r2, r3 - 803c10a: 687b ldr r3, [r7, #4] - 803c10c: 835a strh r2, [r3, #26] + 803c130: 687b ldr r3, [r7, #4] + 803c132: 8b5b ldrh r3, [r3, #26] + 803c134: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803c138: b29a uxth r2, r3 + 803c13a: 687b ldr r3, [r7, #4] + 803c13c: 835a strh r2, [r3, #26] return ERR_MEM; - 803c10e: f04f 33ff mov.w r3, #4294967295 - 803c112: e033 b.n 803c17c + 803c13e: f04f 33ff mov.w r3, #4294967295 + 803c142: e033 b.n 803c1ac LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: queuelen: %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen)); /* If total number of pbufs on the unsent/unacked queues exceeds the * configured maximum, return an error */ /* check for configured max queuelen and possible overflow */ if (pcb->snd_queuelen >= LWIP_MIN(TCP_SND_QUEUELEN, (TCP_SNDQUEUELEN_OVERFLOW + 1))) { - 803c114: 687b ldr r3, [r7, #4] - 803c116: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c11a: 2b08 cmp r3, #8 - 803c11c: d909 bls.n 803c132 + 803c144: 687b ldr r3, [r7, #4] + 803c146: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c14a: 2b08 cmp r3, #8 + 803c14c: d909 bls.n 803c162 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too long queue %"U16_F" (max %"U16_F")\n", pcb->snd_queuelen, (u16_t)TCP_SND_QUEUELEN)); TCP_STATS_INC(tcp.memerr); tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803c11e: 687b ldr r3, [r7, #4] - 803c120: 8b5b ldrh r3, [r3, #26] - 803c122: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803c126: b29a uxth r2, r3 - 803c128: 687b ldr r3, [r7, #4] - 803c12a: 835a strh r2, [r3, #26] + 803c14e: 687b ldr r3, [r7, #4] + 803c150: 8b5b ldrh r3, [r3, #26] + 803c152: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803c156: b29a uxth r2, r3 + 803c158: 687b ldr r3, [r7, #4] + 803c15a: 835a strh r2, [r3, #26] return ERR_MEM; - 803c12c: f04f 33ff mov.w r3, #4294967295 - 803c130: e024 b.n 803c17c + 803c15c: f04f 33ff mov.w r3, #4294967295 + 803c160: e024 b.n 803c1ac } if (pcb->snd_queuelen != 0) { - 803c132: 687b ldr r3, [r7, #4] - 803c134: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c138: 2b00 cmp r3, #0 - 803c13a: d00f beq.n 803c15c + 803c162: 687b ldr r3, [r7, #4] + 803c164: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c168: 2b00 cmp r3, #0 + 803c16a: d00f beq.n 803c18c LWIP_ASSERT("tcp_write: pbufs on queue => at least one queue non-empty", - 803c13c: 687b ldr r3, [r7, #4] - 803c13e: 6f1b ldr r3, [r3, #112] ; 0x70 - 803c140: 2b00 cmp r3, #0 - 803c142: d11a bne.n 803c17a - 803c144: 687b ldr r3, [r7, #4] - 803c146: 6edb ldr r3, [r3, #108] ; 0x6c - 803c148: 2b00 cmp r3, #0 - 803c14a: d116 bne.n 803c17a - 803c14c: 4b0d ldr r3, [pc, #52] ; (803c184 ) - 803c14e: f240 1255 movw r2, #341 ; 0x155 - 803c152: 490f ldr r1, [pc, #60] ; (803c190 ) - 803c154: 480d ldr r0, [pc, #52] ; (803c18c ) - 803c156: f004 fcc3 bl 8040ae0 - 803c15a: e00e b.n 803c17a + 803c16c: 687b ldr r3, [r7, #4] + 803c16e: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c170: 2b00 cmp r3, #0 + 803c172: d11a bne.n 803c1aa + 803c174: 687b ldr r3, [r7, #4] + 803c176: 6edb ldr r3, [r3, #108] ; 0x6c + 803c178: 2b00 cmp r3, #0 + 803c17a: d116 bne.n 803c1aa + 803c17c: 4b0d ldr r3, [pc, #52] ; (803c1b4 ) + 803c17e: f240 1255 movw r2, #341 ; 0x155 + 803c182: 490f ldr r1, [pc, #60] ; (803c1c0 ) + 803c184: 480d ldr r0, [pc, #52] ; (803c1bc ) + 803c186: f004 fcc3 bl 8040b10 + 803c18a: e00e b.n 803c1aa pcb->unacked != NULL || pcb->unsent != NULL); } else { LWIP_ASSERT("tcp_write: no pbufs on queue => both queues empty", - 803c15c: 687b ldr r3, [r7, #4] - 803c15e: 6f1b ldr r3, [r3, #112] ; 0x70 - 803c160: 2b00 cmp r3, #0 - 803c162: d103 bne.n 803c16c - 803c164: 687b ldr r3, [r7, #4] - 803c166: 6edb ldr r3, [r3, #108] ; 0x6c - 803c168: 2b00 cmp r3, #0 - 803c16a: d006 beq.n 803c17a - 803c16c: 4b05 ldr r3, [pc, #20] ; (803c184 ) - 803c16e: f44f 72ac mov.w r2, #344 ; 0x158 - 803c172: 4908 ldr r1, [pc, #32] ; (803c194 ) - 803c174: 4805 ldr r0, [pc, #20] ; (803c18c ) - 803c176: f004 fcb3 bl 8040ae0 + 803c18c: 687b ldr r3, [r7, #4] + 803c18e: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c190: 2b00 cmp r3, #0 + 803c192: d103 bne.n 803c19c + 803c194: 687b ldr r3, [r7, #4] + 803c196: 6edb ldr r3, [r3, #108] ; 0x6c + 803c198: 2b00 cmp r3, #0 + 803c19a: d006 beq.n 803c1aa + 803c19c: 4b05 ldr r3, [pc, #20] ; (803c1b4 ) + 803c19e: f44f 72ac mov.w r2, #344 ; 0x158 + 803c1a2: 4908 ldr r1, [pc, #32] ; (803c1c4 ) + 803c1a4: 4805 ldr r0, [pc, #20] ; (803c1bc ) + 803c1a6: f004 fcb3 bl 8040b10 pcb->unacked == NULL && pcb->unsent == NULL); } return ERR_OK; - 803c17a: 2300 movs r3, #0 -} - 803c17c: 4618 mov r0, r3 - 803c17e: 3708 adds r7, #8 - 803c180: 46bd mov sp, r7 - 803c182: bd80 pop {r7, pc} - 803c184: 08043950 .word 0x08043950 - 803c188: 08043a60 .word 0x08043a60 - 803c18c: 080439a4 .word 0x080439a4 - 803c190: 08043a80 .word 0x08043a80 - 803c194: 08043abc .word 0x08043abc - -0803c198 : + 803c1aa: 2300 movs r3, #0 +} + 803c1ac: 4618 mov r0, r3 + 803c1ae: 3708 adds r7, #8 + 803c1b0: 46bd mov sp, r7 + 803c1b2: bd80 pop {r7, pc} + 803c1b4: 08043980 .word 0x08043980 + 803c1b8: 08043a90 .word 0x08043a90 + 803c1bc: 080439d4 .word 0x080439d4 + 803c1c0: 08043ab0 .word 0x08043ab0 + 803c1c4: 08043aec .word 0x08043aec + +0803c1c8 : * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will not be set on last segment sent, * @return ERR_OK if enqueued, another err_t on error */ err_t tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags) { - 803c198: b590 push {r4, r7, lr} - 803c19a: b09b sub sp, #108 ; 0x6c - 803c19c: af04 add r7, sp, #16 - 803c19e: 60f8 str r0, [r7, #12] - 803c1a0: 60b9 str r1, [r7, #8] - 803c1a2: 4611 mov r1, r2 - 803c1a4: 461a mov r2, r3 - 803c1a6: 460b mov r3, r1 - 803c1a8: 80fb strh r3, [r7, #6] - 803c1aa: 4613 mov r3, r2 - 803c1ac: 717b strb r3, [r7, #5] + 803c1c8: b590 push {r4, r7, lr} + 803c1ca: b09b sub sp, #108 ; 0x6c + 803c1cc: af04 add r7, sp, #16 + 803c1ce: 60f8 str r0, [r7, #12] + 803c1d0: 60b9 str r1, [r7, #8] + 803c1d2: 4611 mov r1, r2 + 803c1d4: 461a mov r2, r3 + 803c1d6: 460b mov r3, r1 + 803c1d8: 80fb strh r3, [r7, #6] + 803c1da: 4613 mov r3, r2 + 803c1dc: 717b strb r3, [r7, #5] struct pbuf *concat_p = NULL; - 803c1ae: 2300 movs r3, #0 - 803c1b0: 657b str r3, [r7, #84] ; 0x54 + 803c1de: 2300 movs r3, #0 + 803c1e0: 657b str r3, [r7, #84] ; 0x54 struct tcp_seg *last_unsent = NULL, *seg = NULL, *prev_seg = NULL, *queue = NULL; - 803c1b2: 2300 movs r3, #0 - 803c1b4: 653b str r3, [r7, #80] ; 0x50 - 803c1b6: 2300 movs r3, #0 - 803c1b8: 64fb str r3, [r7, #76] ; 0x4c - 803c1ba: 2300 movs r3, #0 - 803c1bc: 64bb str r3, [r7, #72] ; 0x48 - 803c1be: 2300 movs r3, #0 - 803c1c0: 647b str r3, [r7, #68] ; 0x44 + 803c1e2: 2300 movs r3, #0 + 803c1e4: 653b str r3, [r7, #80] ; 0x50 + 803c1e6: 2300 movs r3, #0 + 803c1e8: 64fb str r3, [r7, #76] ; 0x4c + 803c1ea: 2300 movs r3, #0 + 803c1ec: 64bb str r3, [r7, #72] ; 0x48 + 803c1ee: 2300 movs r3, #0 + 803c1f0: 647b str r3, [r7, #68] ; 0x44 u16_t pos = 0; /* position in 'arg' data */ - 803c1c2: 2300 movs r3, #0 - 803c1c4: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803c1f2: 2300 movs r3, #0 + 803c1f4: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 u16_t queuelen; u8_t optlen; u8_t optflags = 0; - 803c1c8: 2300 movs r3, #0 - 803c1ca: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803c1f8: 2300 movs r3, #0 + 803c1fa: f887 3027 strb.w r3, [r7, #39] ; 0x27 #if TCP_OVERSIZE u16_t oversize = 0; - 803c1ce: 2300 movs r3, #0 - 803c1d0: 827b strh r3, [r7, #18] + 803c1fe: 2300 movs r3, #0 + 803c200: 827b strh r3, [r7, #18] u16_t oversize_used = 0; - 803c1d2: 2300 movs r3, #0 - 803c1d4: 87fb strh r3, [r7, #62] ; 0x3e + 803c202: 2300 movs r3, #0 + 803c204: 87fb strh r3, [r7, #62] ; 0x3e #if TCP_OVERSIZE_DBGCHECK u16_t oversize_add = 0; #endif /* TCP_OVERSIZE_DBGCHECK*/ #endif /* TCP_OVERSIZE */ u16_t extendlen = 0; - 803c1d6: 2300 movs r3, #0 - 803c1d8: 87bb strh r3, [r7, #60] ; 0x3c + 803c206: 2300 movs r3, #0 + 803c208: 87bb strh r3, [r7, #60] ; 0x3c u16_t concat_chksummed = 0; #endif /* TCP_CHECKSUM_ON_COPY */ err_t err; u16_t mss_local; LWIP_ERROR("tcp_write: invalid pcb", pcb != NULL, return ERR_ARG); - 803c1da: 68fb ldr r3, [r7, #12] - 803c1dc: 2b00 cmp r3, #0 - 803c1de: d109 bne.n 803c1f4 - 803c1e0: 4ba4 ldr r3, [pc, #656] ; (803c474 ) - 803c1e2: f44f 72cf mov.w r2, #414 ; 0x19e - 803c1e6: 49a4 ldr r1, [pc, #656] ; (803c478 ) - 803c1e8: 48a4 ldr r0, [pc, #656] ; (803c47c ) - 803c1ea: f004 fc79 bl 8040ae0 - 803c1ee: f06f 030f mvn.w r3, #15 - 803c1f2: e32a b.n 803c84a + 803c20a: 68fb ldr r3, [r7, #12] + 803c20c: 2b00 cmp r3, #0 + 803c20e: d109 bne.n 803c224 + 803c210: 4ba4 ldr r3, [pc, #656] ; (803c4a4 ) + 803c212: f44f 72cf mov.w r2, #414 ; 0x19e + 803c216: 49a4 ldr r1, [pc, #656] ; (803c4a8 ) + 803c218: 48a4 ldr r0, [pc, #656] ; (803c4ac ) + 803c21a: f004 fc79 bl 8040b10 + 803c21e: f06f 030f mvn.w r3, #15 + 803c222: e32a b.n 803c87a /* don't allocate segments bigger than half the maximum window we ever received */ mss_local = LWIP_MIN(pcb->mss, TCPWND_MIN16(pcb->snd_wnd_max / 2)); - 803c1f4: 68fb ldr r3, [r7, #12] - 803c1f6: f8b3 3062 ldrh.w r3, [r3, #98] ; 0x62 - 803c1fa: 085b lsrs r3, r3, #1 - 803c1fc: b29a uxth r2, r3 - 803c1fe: 68fb ldr r3, [r7, #12] - 803c200: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803c202: 4293 cmp r3, r2 - 803c204: bf28 it cs - 803c206: 4613 movcs r3, r2 - 803c208: 84bb strh r3, [r7, #36] ; 0x24 + 803c224: 68fb ldr r3, [r7, #12] + 803c226: f8b3 3062 ldrh.w r3, [r3, #98] ; 0x62 + 803c22a: 085b lsrs r3, r3, #1 + 803c22c: b29a uxth r2, r3 + 803c22e: 68fb ldr r3, [r7, #12] + 803c230: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803c232: 4293 cmp r3, r2 + 803c234: bf28 it cs + 803c236: 4613 movcs r3, r2 + 803c238: 84bb strh r3, [r7, #36] ; 0x24 mss_local = mss_local ? mss_local : pcb->mss; - 803c20a: 8cbb ldrh r3, [r7, #36] ; 0x24 - 803c20c: 2b00 cmp r3, #0 - 803c20e: d102 bne.n 803c216 - 803c210: 68fb ldr r3, [r7, #12] - 803c212: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803c214: e000 b.n 803c218 - 803c216: 8cbb ldrh r3, [r7, #36] ; 0x24 - 803c218: 84bb strh r3, [r7, #36] ; 0x24 + 803c23a: 8cbb ldrh r3, [r7, #36] ; 0x24 + 803c23c: 2b00 cmp r3, #0 + 803c23e: d102 bne.n 803c246 + 803c240: 68fb ldr r3, [r7, #12] + 803c242: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803c244: e000 b.n 803c248 + 803c246: 8cbb ldrh r3, [r7, #36] ; 0x24 + 803c248: 84bb strh r3, [r7, #36] ; 0x24 apiflags |= TCP_WRITE_FLAG_COPY; #endif /* LWIP_NETIF_TX_SINGLE_PBUF */ LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n", (void *)pcb, arg, len, (u16_t)apiflags)); LWIP_ERROR("tcp_write: arg == NULL (programmer violates API)", - 803c21a: 68bb ldr r3, [r7, #8] - 803c21c: 2b00 cmp r3, #0 - 803c21e: d109 bne.n 803c234 - 803c220: 4b94 ldr r3, [pc, #592] ; (803c474 ) - 803c222: f240 12ad movw r2, #429 ; 0x1ad - 803c226: 4996 ldr r1, [pc, #600] ; (803c480 ) - 803c228: 4894 ldr r0, [pc, #592] ; (803c47c ) - 803c22a: f004 fc59 bl 8040ae0 - 803c22e: f06f 030f mvn.w r3, #15 - 803c232: e30a b.n 803c84a + 803c24a: 68bb ldr r3, [r7, #8] + 803c24c: 2b00 cmp r3, #0 + 803c24e: d109 bne.n 803c264 + 803c250: 4b94 ldr r3, [pc, #592] ; (803c4a4 ) + 803c252: f240 12ad movw r2, #429 ; 0x1ad + 803c256: 4996 ldr r1, [pc, #600] ; (803c4b0 ) + 803c258: 4894 ldr r0, [pc, #592] ; (803c4ac ) + 803c25a: f004 fc59 bl 8040b10 + 803c25e: f06f 030f mvn.w r3, #15 + 803c262: e30a b.n 803c87a arg != NULL, return ERR_ARG;); err = tcp_write_checks(pcb, len); - 803c234: 88fb ldrh r3, [r7, #6] - 803c236: 4619 mov r1, r3 - 803c238: 68f8 ldr r0, [r7, #12] - 803c23a: f7ff ff33 bl 803c0a4 - 803c23e: 4603 mov r3, r0 - 803c240: f887 3023 strb.w r3, [r7, #35] ; 0x23 + 803c264: 88fb ldrh r3, [r7, #6] + 803c266: 4619 mov r1, r3 + 803c268: 68f8 ldr r0, [r7, #12] + 803c26a: f7ff ff33 bl 803c0d4 + 803c26e: 4603 mov r3, r0 + 803c270: f887 3023 strb.w r3, [r7, #35] ; 0x23 if (err != ERR_OK) { - 803c244: f997 3023 ldrsb.w r3, [r7, #35] ; 0x23 - 803c248: 2b00 cmp r3, #0 - 803c24a: d002 beq.n 803c252 + 803c274: f997 3023 ldrsb.w r3, [r7, #35] ; 0x23 + 803c278: 2b00 cmp r3, #0 + 803c27a: d002 beq.n 803c282 return err; - 803c24c: f997 3023 ldrsb.w r3, [r7, #35] ; 0x23 - 803c250: e2fb b.n 803c84a + 803c27c: f997 3023 ldrsb.w r3, [r7, #35] ; 0x23 + 803c280: e2fb b.n 803c87a } queuelen = pcb->snd_queuelen; - 803c252: 68fb ldr r3, [r7, #12] - 803c254: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c258: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 803c282: 68fb ldr r3, [r7, #12] + 803c284: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c288: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 /* ensure that segments can hold at least one data byte... */ mss_local = LWIP_MAX(mss_local, LWIP_TCP_OPT_LEN_TS + 1); } else #endif /* LWIP_TCP_TIMESTAMPS */ { optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb); - 803c25c: 2300 movs r3, #0 - 803c25e: f887 3022 strb.w r3, [r7, #34] ; 0x22 + 803c28c: 2300 movs r3, #0 + 803c28e: f887 3022 strb.w r3, [r7, #34] ; 0x22 * * pos records progress as data is segmented. */ /* Find the tail of the unsent queue. */ if (pcb->unsent != NULL) { - 803c262: 68fb ldr r3, [r7, #12] - 803c264: 6edb ldr r3, [r3, #108] ; 0x6c - 803c266: 2b00 cmp r3, #0 - 803c268: f000 80f6 beq.w 803c458 + 803c292: 68fb ldr r3, [r7, #12] + 803c294: 6edb ldr r3, [r3, #108] ; 0x6c + 803c296: 2b00 cmp r3, #0 + 803c298: f000 80f6 beq.w 803c488 u16_t space; u16_t unsent_optlen; /* @todo: this could be sped up by keeping last_unsent in the pcb */ for (last_unsent = pcb->unsent; last_unsent->next != NULL; - 803c26c: 68fb ldr r3, [r7, #12] - 803c26e: 6edb ldr r3, [r3, #108] ; 0x6c - 803c270: 653b str r3, [r7, #80] ; 0x50 - 803c272: e002 b.n 803c27a + 803c29c: 68fb ldr r3, [r7, #12] + 803c29e: 6edb ldr r3, [r3, #108] ; 0x6c + 803c2a0: 653b str r3, [r7, #80] ; 0x50 + 803c2a2: e002 b.n 803c2aa last_unsent = last_unsent->next); - 803c274: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c276: 681b ldr r3, [r3, #0] - 803c278: 653b str r3, [r7, #80] ; 0x50 + 803c2a4: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c2a6: 681b ldr r3, [r3, #0] + 803c2a8: 653b str r3, [r7, #80] ; 0x50 for (last_unsent = pcb->unsent; last_unsent->next != NULL; - 803c27a: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c27c: 681b ldr r3, [r3, #0] - 803c27e: 2b00 cmp r3, #0 - 803c280: d1f8 bne.n 803c274 + 803c2aa: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c2ac: 681b ldr r3, [r3, #0] + 803c2ae: 2b00 cmp r3, #0 + 803c2b0: d1f8 bne.n 803c2a4 /* Usable space at the end of the last unsent segment */ unsent_optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(last_unsent->flags, pcb); - 803c282: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c284: 7a9b ldrb r3, [r3, #10] - 803c286: 009b lsls r3, r3, #2 - 803c288: b29b uxth r3, r3 - 803c28a: f003 0304 and.w r3, r3, #4 - 803c28e: 843b strh r3, [r7, #32] + 803c2b2: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c2b4: 7a9b ldrb r3, [r3, #10] + 803c2b6: 009b lsls r3, r3, #2 + 803c2b8: b29b uxth r3, r3 + 803c2ba: f003 0304 and.w r3, r3, #4 + 803c2be: 843b strh r3, [r7, #32] LWIP_ASSERT("mss_local is too small", mss_local >= last_unsent->len + unsent_optlen); - 803c290: 8cba ldrh r2, [r7, #36] ; 0x24 - 803c292: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c294: 891b ldrh r3, [r3, #8] - 803c296: 4619 mov r1, r3 - 803c298: 8c3b ldrh r3, [r7, #32] - 803c29a: 440b add r3, r1 - 803c29c: 429a cmp r2, r3 - 803c29e: da06 bge.n 803c2ae - 803c2a0: 4b74 ldr r3, [pc, #464] ; (803c474 ) - 803c2a2: f44f 72f3 mov.w r2, #486 ; 0x1e6 - 803c2a6: 4977 ldr r1, [pc, #476] ; (803c484 ) - 803c2a8: 4874 ldr r0, [pc, #464] ; (803c47c ) - 803c2aa: f004 fc19 bl 8040ae0 + 803c2c0: 8cba ldrh r2, [r7, #36] ; 0x24 + 803c2c2: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c2c4: 891b ldrh r3, [r3, #8] + 803c2c6: 4619 mov r1, r3 + 803c2c8: 8c3b ldrh r3, [r7, #32] + 803c2ca: 440b add r3, r1 + 803c2cc: 429a cmp r2, r3 + 803c2ce: da06 bge.n 803c2de + 803c2d0: 4b74 ldr r3, [pc, #464] ; (803c4a4 ) + 803c2d2: f44f 72f3 mov.w r2, #486 ; 0x1e6 + 803c2d6: 4977 ldr r1, [pc, #476] ; (803c4b4 ) + 803c2d8: 4874 ldr r0, [pc, #464] ; (803c4ac ) + 803c2da: f004 fc19 bl 8040b10 space = mss_local - (last_unsent->len + unsent_optlen); - 803c2ae: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c2b0: 891a ldrh r2, [r3, #8] - 803c2b2: 8c3b ldrh r3, [r7, #32] - 803c2b4: 4413 add r3, r2 - 803c2b6: b29b uxth r3, r3 - 803c2b8: 8cba ldrh r2, [r7, #36] ; 0x24 - 803c2ba: 1ad3 subs r3, r2, r3 - 803c2bc: 877b strh r3, [r7, #58] ; 0x3a + 803c2de: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c2e0: 891a ldrh r2, [r3, #8] + 803c2e2: 8c3b ldrh r3, [r7, #32] + 803c2e4: 4413 add r3, r2 + 803c2e6: b29b uxth r3, r3 + 803c2e8: 8cba ldrh r2, [r7, #36] ; 0x24 + 803c2ea: 1ad3 subs r3, r2, r3 + 803c2ec: 877b strh r3, [r7, #58] ; 0x3a #if TCP_OVERSIZE_DBGCHECK /* check that pcb->unsent_oversize matches last_unsent->oversize_left */ LWIP_ASSERT("unsent_oversize mismatch (pcb vs. last_unsent)", pcb->unsent_oversize == last_unsent->oversize_left); #endif /* TCP_OVERSIZE_DBGCHECK */ oversize = pcb->unsent_oversize; - 803c2be: 68fb ldr r3, [r7, #12] - 803c2c0: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 803c2c4: 827b strh r3, [r7, #18] + 803c2ee: 68fb ldr r3, [r7, #12] + 803c2f0: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 803c2f4: 827b strh r3, [r7, #18] if (oversize > 0) { - 803c2c6: 8a7b ldrh r3, [r7, #18] - 803c2c8: 2b00 cmp r3, #0 - 803c2ca: d026 beq.n 803c31a + 803c2f6: 8a7b ldrh r3, [r7, #18] + 803c2f8: 2b00 cmp r3, #0 + 803c2fa: d026 beq.n 803c34a LWIP_ASSERT("inconsistent oversize vs. space", oversize <= space); - 803c2cc: 8a7b ldrh r3, [r7, #18] - 803c2ce: 8f7a ldrh r2, [r7, #58] ; 0x3a - 803c2d0: 429a cmp r2, r3 - 803c2d2: d206 bcs.n 803c2e2 - 803c2d4: 4b67 ldr r3, [pc, #412] ; (803c474 ) - 803c2d6: f44f 72fc mov.w r2, #504 ; 0x1f8 - 803c2da: 496b ldr r1, [pc, #428] ; (803c488 ) - 803c2dc: 4867 ldr r0, [pc, #412] ; (803c47c ) - 803c2de: f004 fbff bl 8040ae0 + 803c2fc: 8a7b ldrh r3, [r7, #18] + 803c2fe: 8f7a ldrh r2, [r7, #58] ; 0x3a + 803c300: 429a cmp r2, r3 + 803c302: d206 bcs.n 803c312 + 803c304: 4b67 ldr r3, [pc, #412] ; (803c4a4 ) + 803c306: f44f 72fc mov.w r2, #504 ; 0x1f8 + 803c30a: 496b ldr r1, [pc, #428] ; (803c4b8 ) + 803c30c: 4867 ldr r0, [pc, #412] ; (803c4ac ) + 803c30e: f004 fbff bl 8040b10 seg = last_unsent; - 803c2e2: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c2e4: 64fb str r3, [r7, #76] ; 0x4c + 803c312: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c314: 64fb str r3, [r7, #76] ; 0x4c oversize_used = LWIP_MIN(space, LWIP_MIN(oversize, len)); - 803c2e6: 8a7b ldrh r3, [r7, #18] - 803c2e8: 88fa ldrh r2, [r7, #6] - 803c2ea: 4293 cmp r3, r2 - 803c2ec: bf28 it cs - 803c2ee: 4613 movcs r3, r2 - 803c2f0: b29b uxth r3, r3 - 803c2f2: 8f7a ldrh r2, [r7, #58] ; 0x3a - 803c2f4: 4293 cmp r3, r2 - 803c2f6: bf28 it cs - 803c2f8: 4613 movcs r3, r2 - 803c2fa: 87fb strh r3, [r7, #62] ; 0x3e + 803c316: 8a7b ldrh r3, [r7, #18] + 803c318: 88fa ldrh r2, [r7, #6] + 803c31a: 4293 cmp r3, r2 + 803c31c: bf28 it cs + 803c31e: 4613 movcs r3, r2 + 803c320: b29b uxth r3, r3 + 803c322: 8f7a ldrh r2, [r7, #58] ; 0x3a + 803c324: 4293 cmp r3, r2 + 803c326: bf28 it cs + 803c328: 4613 movcs r3, r2 + 803c32a: 87fb strh r3, [r7, #62] ; 0x3e pos += oversize_used; - 803c2fc: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c300: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c302: 4413 add r3, r2 - 803c304: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803c32c: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c330: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c332: 4413 add r3, r2 + 803c334: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 oversize -= oversize_used; - 803c308: 8a7a ldrh r2, [r7, #18] - 803c30a: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c30c: 1ad3 subs r3, r2, r3 - 803c30e: b29b uxth r3, r3 - 803c310: 827b strh r3, [r7, #18] + 803c338: 8a7a ldrh r2, [r7, #18] + 803c33a: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c33c: 1ad3 subs r3, r2, r3 + 803c33e: b29b uxth r3, r3 + 803c340: 827b strh r3, [r7, #18] space -= oversize_used; - 803c312: 8f7a ldrh r2, [r7, #58] ; 0x3a - 803c314: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c316: 1ad3 subs r3, r2, r3 - 803c318: 877b strh r3, [r7, #58] ; 0x3a + 803c342: 8f7a ldrh r2, [r7, #58] ; 0x3a + 803c344: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c346: 1ad3 subs r3, r2, r3 + 803c348: 877b strh r3, [r7, #58] ; 0x3a } /* now we are either finished or oversize is zero */ LWIP_ASSERT("inconsistent oversize vs. len", (oversize == 0) || (pos == len)); - 803c31a: 8a7b ldrh r3, [r7, #18] - 803c31c: 2b00 cmp r3, #0 - 803c31e: d00b beq.n 803c338 - 803c320: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c324: 88fb ldrh r3, [r7, #6] - 803c326: 429a cmp r2, r3 - 803c328: d006 beq.n 803c338 - 803c32a: 4b52 ldr r3, [pc, #328] ; (803c474 ) - 803c32c: f44f 7200 mov.w r2, #512 ; 0x200 - 803c330: 4956 ldr r1, [pc, #344] ; (803c48c ) - 803c332: 4852 ldr r0, [pc, #328] ; (803c47c ) - 803c334: f004 fbd4 bl 8040ae0 + 803c34a: 8a7b ldrh r3, [r7, #18] + 803c34c: 2b00 cmp r3, #0 + 803c34e: d00b beq.n 803c368 + 803c350: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c354: 88fb ldrh r3, [r7, #6] + 803c356: 429a cmp r2, r3 + 803c358: d006 beq.n 803c368 + 803c35a: 4b52 ldr r3, [pc, #328] ; (803c4a4 ) + 803c35c: f44f 7200 mov.w r2, #512 ; 0x200 + 803c360: 4956 ldr r1, [pc, #344] ; (803c4bc ) + 803c362: 4852 ldr r0, [pc, #328] ; (803c4ac ) + 803c364: f004 fbd4 bl 8040b10 * * This phase is skipped for LWIP_NETIF_TX_SINGLE_PBUF as we could only execute * it after rexmit puts a segment from unacked to unsent and at this point, * oversize info is lost. */ if ((pos < len) && (space > 0) && (last_unsent->len > 0)) { - 803c338: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c33c: 88fb ldrh r3, [r7, #6] - 803c33e: 429a cmp r2, r3 - 803c340: f080 8167 bcs.w 803c612 - 803c344: 8f7b ldrh r3, [r7, #58] ; 0x3a - 803c346: 2b00 cmp r3, #0 - 803c348: f000 8163 beq.w 803c612 - 803c34c: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c34e: 891b ldrh r3, [r3, #8] - 803c350: 2b00 cmp r3, #0 - 803c352: f000 815e beq.w 803c612 + 803c368: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c36c: 88fb ldrh r3, [r7, #6] + 803c36e: 429a cmp r2, r3 + 803c370: f080 8167 bcs.w 803c642 + 803c374: 8f7b ldrh r3, [r7, #58] ; 0x3a + 803c376: 2b00 cmp r3, #0 + 803c378: f000 8163 beq.w 803c642 + 803c37c: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c37e: 891b ldrh r3, [r3, #8] + 803c380: 2b00 cmp r3, #0 + 803c382: f000 815e beq.w 803c642 u16_t seglen = LWIP_MIN(space, len - pos); - 803c356: 88fa ldrh r2, [r7, #6] - 803c358: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c35c: 1ad2 subs r2, r2, r3 - 803c35e: 8f7b ldrh r3, [r7, #58] ; 0x3a - 803c360: 4293 cmp r3, r2 - 803c362: bfa8 it ge - 803c364: 4613 movge r3, r2 - 803c366: 83fb strh r3, [r7, #30] + 803c386: 88fa ldrh r2, [r7, #6] + 803c388: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c38c: 1ad2 subs r2, r2, r3 + 803c38e: 8f7b ldrh r3, [r7, #58] ; 0x3a + 803c390: 4293 cmp r3, r2 + 803c392: bfa8 it ge + 803c394: 4613 movge r3, r2 + 803c396: 83fb strh r3, [r7, #30] seg = last_unsent; - 803c368: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c36a: 64fb str r3, [r7, #76] ; 0x4c + 803c398: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c39a: 64fb str r3, [r7, #76] ; 0x4c /* Create a pbuf with a copy or reference to seglen bytes. We * can use PBUF_RAW here since the data appears in the middle of * a segment. A header will never be prepended. */ if (apiflags & TCP_WRITE_FLAG_COPY) { - 803c36c: 797b ldrb r3, [r7, #5] - 803c36e: f003 0301 and.w r3, r3, #1 - 803c372: 2b00 cmp r3, #0 - 803c374: d027 beq.n 803c3c6 + 803c39c: 797b ldrb r3, [r7, #5] + 803c39e: f003 0301 and.w r3, r3, #1 + 803c3a2: 2b00 cmp r3, #0 + 803c3a4: d027 beq.n 803c3f6 /* Data is copied */ if ((concat_p = tcp_pbuf_prealloc(PBUF_RAW, seglen, space, &oversize, pcb, apiflags, 1)) == NULL) { - 803c376: f107 0012 add.w r0, r7, #18 - 803c37a: 8f7a ldrh r2, [r7, #58] ; 0x3a - 803c37c: 8bf9 ldrh r1, [r7, #30] - 803c37e: 2301 movs r3, #1 - 803c380: 9302 str r3, [sp, #8] - 803c382: 797b ldrb r3, [r7, #5] - 803c384: 9301 str r3, [sp, #4] - 803c386: 68fb ldr r3, [r7, #12] - 803c388: 9300 str r3, [sp, #0] - 803c38a: 4603 mov r3, r0 - 803c38c: 2000 movs r0, #0 - 803c38e: f7ff fe0f bl 803bfb0 - 803c392: 6578 str r0, [r7, #84] ; 0x54 - 803c394: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c396: 2b00 cmp r3, #0 - 803c398: f000 8225 beq.w 803c7e6 + 803c3a6: f107 0012 add.w r0, r7, #18 + 803c3aa: 8f7a ldrh r2, [r7, #58] ; 0x3a + 803c3ac: 8bf9 ldrh r1, [r7, #30] + 803c3ae: 2301 movs r3, #1 + 803c3b0: 9302 str r3, [sp, #8] + 803c3b2: 797b ldrb r3, [r7, #5] + 803c3b4: 9301 str r3, [sp, #4] + 803c3b6: 68fb ldr r3, [r7, #12] + 803c3b8: 9300 str r3, [sp, #0] + 803c3ba: 4603 mov r3, r0 + 803c3bc: 2000 movs r0, #0 + 803c3be: f7ff fe0f bl 803bfe0 + 803c3c2: 6578 str r0, [r7, #84] ; 0x54 + 803c3c4: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c3c6: 2b00 cmp r3, #0 + 803c3c8: f000 8225 beq.w 803c816 goto memerr; } #if TCP_OVERSIZE_DBGCHECK oversize_add = oversize; #endif /* TCP_OVERSIZE_DBGCHECK */ TCP_DATA_COPY2(concat_p->payload, (const u8_t *)arg + pos, seglen, &concat_chksum, &concat_chksum_swapped); - 803c39c: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c39e: 6858 ldr r0, [r3, #4] - 803c3a0: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c3a4: 68ba ldr r2, [r7, #8] - 803c3a6: 4413 add r3, r2 - 803c3a8: 8bfa ldrh r2, [r7, #30] - 803c3aa: 4619 mov r1, r3 - 803c3ac: f004 fa88 bl 80408c0 + 803c3cc: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c3ce: 6858 ldr r0, [r3, #4] + 803c3d0: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c3d4: 68ba ldr r2, [r7, #8] + 803c3d6: 4413 add r3, r2 + 803c3d8: 8bfa ldrh r2, [r7, #30] + 803c3da: 4619 mov r1, r3 + 803c3dc: f004 fa88 bl 80408f0 #if TCP_CHECKSUM_ON_COPY concat_chksummed += seglen; #endif /* TCP_CHECKSUM_ON_COPY */ queuelen += pbuf_clen(concat_p); - 803c3b0: 6d78 ldr r0, [r7, #84] ; 0x54 - 803c3b2: f7fb fa33 bl 803781c - 803c3b6: 4603 mov r3, r0 - 803c3b8: 461a mov r2, r3 - 803c3ba: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 803c3be: 4413 add r3, r2 - 803c3c0: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 - 803c3c4: e041 b.n 803c44a + 803c3e0: 6d78 ldr r0, [r7, #84] ; 0x54 + 803c3e2: f7fb fa33 bl 803784c + 803c3e6: 4603 mov r3, r0 + 803c3e8: 461a mov r2, r3 + 803c3ea: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 803c3ee: 4413 add r3, r2 + 803c3f0: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 803c3f4: e041 b.n 803c47a } else { /* Data is not copied */ /* If the last unsent pbuf is of type PBUF_ROM, try to extend it. */ struct pbuf *p; for (p = last_unsent->p; p->next != NULL; p = p->next); - 803c3c6: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c3c8: 685b ldr r3, [r3, #4] - 803c3ca: 637b str r3, [r7, #52] ; 0x34 - 803c3cc: e002 b.n 803c3d4 - 803c3ce: 6b7b ldr r3, [r7, #52] ; 0x34 - 803c3d0: 681b ldr r3, [r3, #0] - 803c3d2: 637b str r3, [r7, #52] ; 0x34 - 803c3d4: 6b7b ldr r3, [r7, #52] ; 0x34 - 803c3d6: 681b ldr r3, [r3, #0] - 803c3d8: 2b00 cmp r3, #0 - 803c3da: d1f8 bne.n 803c3ce + 803c3f6: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c3f8: 685b ldr r3, [r3, #4] + 803c3fa: 637b str r3, [r7, #52] ; 0x34 + 803c3fc: e002 b.n 803c404 + 803c3fe: 6b7b ldr r3, [r7, #52] ; 0x34 + 803c400: 681b ldr r3, [r3, #0] + 803c402: 637b str r3, [r7, #52] ; 0x34 + 803c404: 6b7b ldr r3, [r7, #52] ; 0x34 + 803c406: 681b ldr r3, [r3, #0] + 803c408: 2b00 cmp r3, #0 + 803c40a: d1f8 bne.n 803c3fe if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) && - 803c3dc: 6b7b ldr r3, [r7, #52] ; 0x34 - 803c3de: 7b1b ldrb r3, [r3, #12] - 803c3e0: f003 03c0 and.w r3, r3, #192 ; 0xc0 - 803c3e4: 2b00 cmp r3, #0 - 803c3e6: d115 bne.n 803c414 + 803c40c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803c40e: 7b1b ldrb r3, [r3, #12] + 803c410: f003 03c0 and.w r3, r3, #192 ; 0xc0 + 803c414: 2b00 cmp r3, #0 + 803c416: d115 bne.n 803c444 (const u8_t *)p->payload + p->len == (const u8_t *)arg) { - 803c3e8: 6b7b ldr r3, [r7, #52] ; 0x34 - 803c3ea: 685b ldr r3, [r3, #4] - 803c3ec: 6b7a ldr r2, [r7, #52] ; 0x34 - 803c3ee: 8952 ldrh r2, [r2, #10] - 803c3f0: 4413 add r3, r2 + 803c418: 6b7b ldr r3, [r7, #52] ; 0x34 + 803c41a: 685b ldr r3, [r3, #4] + 803c41c: 6b7a ldr r2, [r7, #52] ; 0x34 + 803c41e: 8952 ldrh r2, [r2, #10] + 803c420: 4413 add r3, r2 if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) && - 803c3f2: 68ba ldr r2, [r7, #8] - 803c3f4: 429a cmp r2, r3 - 803c3f6: d10d bne.n 803c414 + 803c422: 68ba ldr r2, [r7, #8] + 803c424: 429a cmp r2, r3 + 803c426: d10d bne.n 803c444 LWIP_ASSERT("tcp_write: ROM pbufs cannot be oversized", pos == 0); - 803c3f8: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c3fc: 2b00 cmp r3, #0 - 803c3fe: d006 beq.n 803c40e - 803c400: 4b1c ldr r3, [pc, #112] ; (803c474 ) - 803c402: f240 2231 movw r2, #561 ; 0x231 - 803c406: 4922 ldr r1, [pc, #136] ; (803c490 ) - 803c408: 481c ldr r0, [pc, #112] ; (803c47c ) - 803c40a: f004 fb69 bl 8040ae0 + 803c428: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c42c: 2b00 cmp r3, #0 + 803c42e: d006 beq.n 803c43e + 803c430: 4b1c ldr r3, [pc, #112] ; (803c4a4 ) + 803c432: f240 2231 movw r2, #561 ; 0x231 + 803c436: 4922 ldr r1, [pc, #136] ; (803c4c0 ) + 803c438: 481c ldr r0, [pc, #112] ; (803c4ac ) + 803c43a: f004 fb69 bl 8040b10 extendlen = seglen; - 803c40e: 8bfb ldrh r3, [r7, #30] - 803c410: 87bb strh r3, [r7, #60] ; 0x3c - 803c412: e01a b.n 803c44a + 803c43e: 8bfb ldrh r3, [r7, #30] + 803c440: 87bb strh r3, [r7, #60] ; 0x3c + 803c442: e01a b.n 803c47a } else { if ((concat_p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) { - 803c414: 8bfb ldrh r3, [r7, #30] - 803c416: 2201 movs r2, #1 - 803c418: 4619 mov r1, r3 - 803c41a: 2000 movs r0, #0 - 803c41c: f7fa fe92 bl 8037144 - 803c420: 6578 str r0, [r7, #84] ; 0x54 - 803c422: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c424: 2b00 cmp r3, #0 - 803c426: f000 81e0 beq.w 803c7ea + 803c444: 8bfb ldrh r3, [r7, #30] + 803c446: 2201 movs r2, #1 + 803c448: 4619 mov r1, r3 + 803c44a: 2000 movs r0, #0 + 803c44c: f7fa fe92 bl 8037174 + 803c450: 6578 str r0, [r7, #84] ; 0x54 + 803c452: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c454: 2b00 cmp r3, #0 + 803c456: f000 81e0 beq.w 803c81a LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for zero-copy pbuf\n")); goto memerr; } /* reference the non-volatile payload data */ ((struct pbuf_rom *)concat_p)->payload = (const u8_t *)arg + pos; - 803c42a: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c42e: 68ba ldr r2, [r7, #8] - 803c430: 441a add r2, r3 - 803c432: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c434: 605a str r2, [r3, #4] + 803c45a: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c45e: 68ba ldr r2, [r7, #8] + 803c460: 441a add r2, r3 + 803c462: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c464: 605a str r2, [r3, #4] queuelen += pbuf_clen(concat_p); - 803c436: 6d78 ldr r0, [r7, #84] ; 0x54 - 803c438: f7fb f9f0 bl 803781c - 803c43c: 4603 mov r3, r0 - 803c43e: 461a mov r2, r3 - 803c440: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 803c444: 4413 add r3, r2 - 803c446: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 803c466: 6d78 ldr r0, [r7, #84] ; 0x54 + 803c468: f7fb f9f0 bl 803784c + 803c46c: 4603 mov r3, r0 + 803c46e: 461a mov r2, r3 + 803c470: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 803c474: 4413 add r3, r2 + 803c476: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 &concat_chksum, &concat_chksum_swapped); concat_chksummed += seglen; #endif /* TCP_CHECKSUM_ON_COPY */ } pos += seglen; - 803c44a: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c44e: 8bfb ldrh r3, [r7, #30] - 803c450: 4413 add r3, r2 - 803c452: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 - 803c456: e0dc b.n 803c612 + 803c47a: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c47e: 8bfb ldrh r3, [r7, #30] + 803c480: 4413 add r3, r2 + 803c482: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803c486: e0dc b.n 803c642 } #endif /* !LWIP_NETIF_TX_SINGLE_PBUF */ } else { #if TCP_OVERSIZE LWIP_ASSERT("unsent_oversize mismatch (pcb->unsent is NULL)", - 803c458: 68fb ldr r3, [r7, #12] - 803c45a: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 803c45e: 2b00 cmp r3, #0 - 803c460: f000 80d7 beq.w 803c612 - 803c464: 4b03 ldr r3, [pc, #12] ; (803c474 ) - 803c466: f240 224a movw r2, #586 ; 0x24a - 803c46a: 490a ldr r1, [pc, #40] ; (803c494 ) - 803c46c: 4803 ldr r0, [pc, #12] ; (803c47c ) - 803c46e: f004 fb37 bl 8040ae0 + 803c488: 68fb ldr r3, [r7, #12] + 803c48a: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 803c48e: 2b00 cmp r3, #0 + 803c490: f000 80d7 beq.w 803c642 + 803c494: 4b03 ldr r3, [pc, #12] ; (803c4a4 ) + 803c496: f240 224a movw r2, #586 ; 0x24a + 803c49a: 490a ldr r1, [pc, #40] ; (803c4c4 ) + 803c49c: 4803 ldr r0, [pc, #12] ; (803c4ac ) + 803c49e: f004 fb37 bl 8040b10 * Phase 3: Create new segments. * * The new segments are chained together in the local 'queue' * variable, ready to be appended to pcb->unsent. */ while (pos < len) { - 803c472: e0ce b.n 803c612 - 803c474: 08043950 .word 0x08043950 - 803c478: 08043af0 .word 0x08043af0 - 803c47c: 080439a4 .word 0x080439a4 - 803c480: 08043b08 .word 0x08043b08 - 803c484: 08043b3c .word 0x08043b3c - 803c488: 08043b54 .word 0x08043b54 - 803c48c: 08043b74 .word 0x08043b74 - 803c490: 08043b94 .word 0x08043b94 - 803c494: 08043bc0 .word 0x08043bc0 + 803c4a2: e0ce b.n 803c642 + 803c4a4: 08043980 .word 0x08043980 + 803c4a8: 08043b20 .word 0x08043b20 + 803c4ac: 080439d4 .word 0x080439d4 + 803c4b0: 08043b38 .word 0x08043b38 + 803c4b4: 08043b6c .word 0x08043b6c + 803c4b8: 08043b84 .word 0x08043b84 + 803c4bc: 08043ba4 .word 0x08043ba4 + 803c4c0: 08043bc4 .word 0x08043bc4 + 803c4c4: 08043bf0 .word 0x08043bf0 struct pbuf *p; u16_t left = len - pos; - 803c498: 88fa ldrh r2, [r7, #6] - 803c49a: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c49e: 1ad3 subs r3, r2, r3 - 803c4a0: 83bb strh r3, [r7, #28] + 803c4c8: 88fa ldrh r2, [r7, #6] + 803c4ca: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c4ce: 1ad3 subs r3, r2, r3 + 803c4d0: 83bb strh r3, [r7, #28] u16_t max_len = mss_local - optlen; - 803c4a2: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 - 803c4a6: b29b uxth r3, r3 - 803c4a8: 8cba ldrh r2, [r7, #36] ; 0x24 - 803c4aa: 1ad3 subs r3, r2, r3 - 803c4ac: 837b strh r3, [r7, #26] + 803c4d2: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 + 803c4d6: b29b uxth r3, r3 + 803c4d8: 8cba ldrh r2, [r7, #36] ; 0x24 + 803c4da: 1ad3 subs r3, r2, r3 + 803c4dc: 837b strh r3, [r7, #26] u16_t seglen = LWIP_MIN(left, max_len); - 803c4ae: 8b7a ldrh r2, [r7, #26] - 803c4b0: 8bbb ldrh r3, [r7, #28] - 803c4b2: 4293 cmp r3, r2 - 803c4b4: bf28 it cs - 803c4b6: 4613 movcs r3, r2 - 803c4b8: 833b strh r3, [r7, #24] + 803c4de: 8b7a ldrh r2, [r7, #26] + 803c4e0: 8bbb ldrh r3, [r7, #28] + 803c4e2: 4293 cmp r3, r2 + 803c4e4: bf28 it cs + 803c4e6: 4613 movcs r3, r2 + 803c4e8: 833b strh r3, [r7, #24] #if TCP_CHECKSUM_ON_COPY u16_t chksum = 0; u8_t chksum_swapped = 0; #endif /* TCP_CHECKSUM_ON_COPY */ if (apiflags & TCP_WRITE_FLAG_COPY) { - 803c4ba: 797b ldrb r3, [r7, #5] - 803c4bc: f003 0301 and.w r3, r3, #1 - 803c4c0: 2b00 cmp r3, #0 - 803c4c2: d036 beq.n 803c532 + 803c4ea: 797b ldrb r3, [r7, #5] + 803c4ec: f003 0301 and.w r3, r3, #1 + 803c4f0: 2b00 cmp r3, #0 + 803c4f2: d036 beq.n 803c562 /* If copy is set, memory should be allocated and data copied * into pbuf */ if ((p = tcp_pbuf_prealloc(PBUF_TRANSPORT, seglen + optlen, mss_local, &oversize, pcb, apiflags, queue == NULL)) == NULL) { - 803c4c4: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 - 803c4c8: b29a uxth r2, r3 - 803c4ca: 8b3b ldrh r3, [r7, #24] - 803c4cc: 4413 add r3, r2 - 803c4ce: b299 uxth r1, r3 - 803c4d0: 6c7b ldr r3, [r7, #68] ; 0x44 - 803c4d2: 2b00 cmp r3, #0 - 803c4d4: bf0c ite eq - 803c4d6: 2301 moveq r3, #1 - 803c4d8: 2300 movne r3, #0 - 803c4da: b2db uxtb r3, r3 - 803c4dc: f107 0012 add.w r0, r7, #18 - 803c4e0: 8cba ldrh r2, [r7, #36] ; 0x24 - 803c4e2: 9302 str r3, [sp, #8] - 803c4e4: 797b ldrb r3, [r7, #5] - 803c4e6: 9301 str r3, [sp, #4] - 803c4e8: 68fb ldr r3, [r7, #12] - 803c4ea: 9300 str r3, [sp, #0] - 803c4ec: 4603 mov r3, r0 - 803c4ee: 2036 movs r0, #54 ; 0x36 - 803c4f0: f7ff fd5e bl 803bfb0 - 803c4f4: 6338 str r0, [r7, #48] ; 0x30 - 803c4f6: 6b3b ldr r3, [r7, #48] ; 0x30 - 803c4f8: 2b00 cmp r3, #0 - 803c4fa: f000 8178 beq.w 803c7ee + 803c4f4: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 + 803c4f8: b29a uxth r2, r3 + 803c4fa: 8b3b ldrh r3, [r7, #24] + 803c4fc: 4413 add r3, r2 + 803c4fe: b299 uxth r1, r3 + 803c500: 6c7b ldr r3, [r7, #68] ; 0x44 + 803c502: 2b00 cmp r3, #0 + 803c504: bf0c ite eq + 803c506: 2301 moveq r3, #1 + 803c508: 2300 movne r3, #0 + 803c50a: b2db uxtb r3, r3 + 803c50c: f107 0012 add.w r0, r7, #18 + 803c510: 8cba ldrh r2, [r7, #36] ; 0x24 + 803c512: 9302 str r3, [sp, #8] + 803c514: 797b ldrb r3, [r7, #5] + 803c516: 9301 str r3, [sp, #4] + 803c518: 68fb ldr r3, [r7, #12] + 803c51a: 9300 str r3, [sp, #0] + 803c51c: 4603 mov r3, r0 + 803c51e: 2036 movs r0, #54 ; 0x36 + 803c520: f7ff fd5e bl 803bfe0 + 803c524: 6338 str r0, [r7, #48] ; 0x30 + 803c526: 6b3b ldr r3, [r7, #48] ; 0x30 + 803c528: 2b00 cmp r3, #0 + 803c52a: f000 8178 beq.w 803c81e LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", seglen)); goto memerr; } LWIP_ASSERT("tcp_write: check that first pbuf can hold the complete seglen", - 803c4fe: 6b3b ldr r3, [r7, #48] ; 0x30 - 803c500: 895b ldrh r3, [r3, #10] - 803c502: 8b3a ldrh r2, [r7, #24] - 803c504: 429a cmp r2, r3 - 803c506: d906 bls.n 803c516 - 803c508: 4b8c ldr r3, [pc, #560] ; (803c73c ) - 803c50a: f240 2266 movw r2, #614 ; 0x266 - 803c50e: 498c ldr r1, [pc, #560] ; (803c740 ) - 803c510: 488c ldr r0, [pc, #560] ; (803c744 ) - 803c512: f004 fae5 bl 8040ae0 + 803c52e: 6b3b ldr r3, [r7, #48] ; 0x30 + 803c530: 895b ldrh r3, [r3, #10] + 803c532: 8b3a ldrh r2, [r7, #24] + 803c534: 429a cmp r2, r3 + 803c536: d906 bls.n 803c546 + 803c538: 4b8c ldr r3, [pc, #560] ; (803c76c ) + 803c53a: f240 2266 movw r2, #614 ; 0x266 + 803c53e: 498c ldr r1, [pc, #560] ; (803c770 ) + 803c540: 488c ldr r0, [pc, #560] ; (803c774 ) + 803c542: f004 fae5 bl 8040b10 (p->len >= seglen)); TCP_DATA_COPY2((char *)p->payload + optlen, (const u8_t *)arg + pos, seglen, &chksum, &chksum_swapped); - 803c516: 6b3b ldr r3, [r7, #48] ; 0x30 - 803c518: 685a ldr r2, [r3, #4] - 803c51a: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 - 803c51e: 18d0 adds r0, r2, r3 - 803c520: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c524: 68ba ldr r2, [r7, #8] - 803c526: 4413 add r3, r2 - 803c528: 8b3a ldrh r2, [r7, #24] - 803c52a: 4619 mov r1, r3 - 803c52c: f004 f9c8 bl 80408c0 - 803c530: e02f b.n 803c592 + 803c546: 6b3b ldr r3, [r7, #48] ; 0x30 + 803c548: 685a ldr r2, [r3, #4] + 803c54a: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 + 803c54e: 18d0 adds r0, r2, r3 + 803c550: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c554: 68ba ldr r2, [r7, #8] + 803c556: 4413 add r3, r2 + 803c558: 8b3a ldrh r2, [r7, #24] + 803c55a: 4619 mov r1, r3 + 803c55c: f004 f9c8 bl 80408f0 + 803c560: e02f b.n 803c5c2 * sent out on the link (as it has to be ACKed by the remote * party) we can safely use PBUF_ROM instead of PBUF_REF here. */ struct pbuf *p2; #if TCP_OVERSIZE LWIP_ASSERT("oversize == 0", oversize == 0); - 803c532: 8a7b ldrh r3, [r7, #18] - 803c534: 2b00 cmp r3, #0 - 803c536: d006 beq.n 803c546 - 803c538: 4b80 ldr r3, [pc, #512] ; (803c73c ) - 803c53a: f240 2271 movw r2, #625 ; 0x271 - 803c53e: 4982 ldr r1, [pc, #520] ; (803c748 ) - 803c540: 4880 ldr r0, [pc, #512] ; (803c744 ) - 803c542: f004 facd bl 8040ae0 + 803c562: 8a7b ldrh r3, [r7, #18] + 803c564: 2b00 cmp r3, #0 + 803c566: d006 beq.n 803c576 + 803c568: 4b80 ldr r3, [pc, #512] ; (803c76c ) + 803c56a: f240 2271 movw r2, #625 ; 0x271 + 803c56e: 4982 ldr r1, [pc, #520] ; (803c778 ) + 803c570: 4880 ldr r0, [pc, #512] ; (803c774 ) + 803c572: f004 facd bl 8040b10 #endif /* TCP_OVERSIZE */ if ((p2 = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) { - 803c546: 8b3b ldrh r3, [r7, #24] - 803c548: 2201 movs r2, #1 - 803c54a: 4619 mov r1, r3 - 803c54c: 2036 movs r0, #54 ; 0x36 - 803c54e: f7fa fdf9 bl 8037144 - 803c552: 6178 str r0, [r7, #20] - 803c554: 697b ldr r3, [r7, #20] - 803c556: 2b00 cmp r3, #0 - 803c558: f000 814b beq.w 803c7f2 + 803c576: 8b3b ldrh r3, [r7, #24] + 803c578: 2201 movs r2, #1 + 803c57a: 4619 mov r1, r3 + 803c57c: 2036 movs r0, #54 ; 0x36 + 803c57e: f7fa fdf9 bl 8037174 + 803c582: 6178 str r0, [r7, #20] + 803c584: 697b ldr r3, [r7, #20] + 803c586: 2b00 cmp r3, #0 + 803c588: f000 814b beq.w 803c822 chksum_swapped = 1; chksum = SWAP_BYTES_IN_WORD(chksum); } #endif /* TCP_CHECKSUM_ON_COPY */ /* reference the non-volatile payload data */ ((struct pbuf_rom *)p2)->payload = (const u8_t *)arg + pos; - 803c55c: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c560: 68ba ldr r2, [r7, #8] - 803c562: 441a add r2, r3 - 803c564: 697b ldr r3, [r7, #20] - 803c566: 605a str r2, [r3, #4] + 803c58c: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c590: 68ba ldr r2, [r7, #8] + 803c592: 441a add r2, r3 + 803c594: 697b ldr r3, [r7, #20] + 803c596: 605a str r2, [r3, #4] /* Second, allocate a pbuf for the headers. */ if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { - 803c568: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 - 803c56c: b29b uxth r3, r3 - 803c56e: f44f 7220 mov.w r2, #640 ; 0x280 - 803c572: 4619 mov r1, r3 - 803c574: 2036 movs r0, #54 ; 0x36 - 803c576: f7fa fde5 bl 8037144 - 803c57a: 6338 str r0, [r7, #48] ; 0x30 - 803c57c: 6b3b ldr r3, [r7, #48] ; 0x30 - 803c57e: 2b00 cmp r3, #0 - 803c580: d103 bne.n 803c58a + 803c598: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 + 803c59c: b29b uxth r3, r3 + 803c59e: f44f 7220 mov.w r2, #640 ; 0x280 + 803c5a2: 4619 mov r1, r3 + 803c5a4: 2036 movs r0, #54 ; 0x36 + 803c5a6: f7fa fde5 bl 8037174 + 803c5aa: 6338 str r0, [r7, #48] ; 0x30 + 803c5ac: 6b3b ldr r3, [r7, #48] ; 0x30 + 803c5ae: 2b00 cmp r3, #0 + 803c5b0: d103 bne.n 803c5ba /* If allocation fails, we have to deallocate the data pbuf as * well. */ pbuf_free(p2); - 803c582: 6978 ldr r0, [r7, #20] - 803c584: f7fb f8c2 bl 803770c + 803c5b2: 6978 ldr r0, [r7, #20] + 803c5b4: f7fb f8c2 bl 803773c LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for header pbuf\n")); goto memerr; - 803c588: e136 b.n 803c7f8 + 803c5b8: e136 b.n 803c828 } /* Concatenate the headers and data pbufs together. */ pbuf_cat(p/*header*/, p2/*data*/); - 803c58a: 6979 ldr r1, [r7, #20] - 803c58c: 6b38 ldr r0, [r7, #48] ; 0x30 - 803c58e: f7fb f97f bl 8037890 + 803c5ba: 6979 ldr r1, [r7, #20] + 803c5bc: 6b38 ldr r0, [r7, #48] ; 0x30 + 803c5be: f7fb f97f bl 80378c0 } queuelen += pbuf_clen(p); - 803c592: 6b38 ldr r0, [r7, #48] ; 0x30 - 803c594: f7fb f942 bl 803781c - 803c598: 4603 mov r3, r0 - 803c59a: 461a mov r2, r3 - 803c59c: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 803c5a0: 4413 add r3, r2 - 803c5a2: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 803c5c2: 6b38 ldr r0, [r7, #48] ; 0x30 + 803c5c4: f7fb f942 bl 803784c + 803c5c8: 4603 mov r3, r0 + 803c5ca: 461a mov r2, r3 + 803c5cc: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 803c5d0: 4413 add r3, r2 + 803c5d2: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 /* Now that there are more segments queued, we check again if the * length of the queue exceeds the configured maximum or * overflows. */ if (queuelen > LWIP_MIN(TCP_SND_QUEUELEN, TCP_SNDQUEUELEN_OVERFLOW)) { - 803c5a6: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 803c5aa: 2b09 cmp r3, #9 - 803c5ac: d903 bls.n 803c5b6 + 803c5d6: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 803c5da: 2b09 cmp r3, #9 + 803c5dc: d903 bls.n 803c5e6 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: queue too long %"U16_F" (%d)\n", queuelen, (int)TCP_SND_QUEUELEN)); pbuf_free(p); - 803c5ae: 6b38 ldr r0, [r7, #48] ; 0x30 - 803c5b0: f7fb f8ac bl 803770c + 803c5de: 6b38 ldr r0, [r7, #48] ; 0x30 + 803c5e0: f7fb f8ac bl 803773c goto memerr; - 803c5b4: e120 b.n 803c7f8 + 803c5e4: e120 b.n 803c828 } if ((seg = tcp_create_segment(pcb, p, 0, pcb->snd_lbb + pos, optflags)) == NULL) { - 803c5b6: 68fb ldr r3, [r7, #12] - 803c5b8: 6dda ldr r2, [r3, #92] ; 0x5c - 803c5ba: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c5be: 441a add r2, r3 - 803c5c0: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 803c5c4: 9300 str r3, [sp, #0] - 803c5c6: 4613 mov r3, r2 - 803c5c8: 2200 movs r2, #0 - 803c5ca: 6b39 ldr r1, [r7, #48] ; 0x30 - 803c5cc: 68f8 ldr r0, [r7, #12] - 803c5ce: f7ff fc51 bl 803be74 - 803c5d2: 64f8 str r0, [r7, #76] ; 0x4c - 803c5d4: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c5d6: 2b00 cmp r3, #0 - 803c5d8: f000 810d beq.w 803c7f6 + 803c5e6: 68fb ldr r3, [r7, #12] + 803c5e8: 6dda ldr r2, [r3, #92] ; 0x5c + 803c5ea: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c5ee: 441a add r2, r3 + 803c5f0: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 803c5f4: 9300 str r3, [sp, #0] + 803c5f6: 4613 mov r3, r2 + 803c5f8: 2200 movs r2, #0 + 803c5fa: 6b39 ldr r1, [r7, #48] ; 0x30 + 803c5fc: 68f8 ldr r0, [r7, #12] + 803c5fe: f7ff fc51 bl 803bea4 + 803c602: 64f8 str r0, [r7, #76] ; 0x4c + 803c604: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c606: 2b00 cmp r3, #0 + 803c608: f000 810d beq.w 803c826 seg->chksum_swapped = chksum_swapped; seg->flags |= TF_SEG_DATA_CHECKSUMMED; #endif /* TCP_CHECKSUM_ON_COPY */ /* first segment of to-be-queued data? */ if (queue == NULL) { - 803c5dc: 6c7b ldr r3, [r7, #68] ; 0x44 - 803c5de: 2b00 cmp r3, #0 - 803c5e0: d102 bne.n 803c5e8 + 803c60c: 6c7b ldr r3, [r7, #68] ; 0x44 + 803c60e: 2b00 cmp r3, #0 + 803c610: d102 bne.n 803c618 queue = seg; - 803c5e2: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c5e4: 647b str r3, [r7, #68] ; 0x44 - 803c5e6: e00c b.n 803c602 + 803c612: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c614: 647b str r3, [r7, #68] ; 0x44 + 803c616: e00c b.n 803c632 } else { /* Attach the segment to the end of the queued segments */ LWIP_ASSERT("prev_seg != NULL", prev_seg != NULL); - 803c5e8: 6cbb ldr r3, [r7, #72] ; 0x48 - 803c5ea: 2b00 cmp r3, #0 - 803c5ec: d106 bne.n 803c5fc - 803c5ee: 4b53 ldr r3, [pc, #332] ; (803c73c ) - 803c5f0: f240 22ab movw r2, #683 ; 0x2ab - 803c5f4: 4955 ldr r1, [pc, #340] ; (803c74c ) - 803c5f6: 4853 ldr r0, [pc, #332] ; (803c744 ) - 803c5f8: f004 fa72 bl 8040ae0 + 803c618: 6cbb ldr r3, [r7, #72] ; 0x48 + 803c61a: 2b00 cmp r3, #0 + 803c61c: d106 bne.n 803c62c + 803c61e: 4b53 ldr r3, [pc, #332] ; (803c76c ) + 803c620: f240 22ab movw r2, #683 ; 0x2ab + 803c624: 4955 ldr r1, [pc, #340] ; (803c77c ) + 803c626: 4853 ldr r0, [pc, #332] ; (803c774 ) + 803c628: f004 fa72 bl 8040b10 prev_seg->next = seg; - 803c5fc: 6cbb ldr r3, [r7, #72] ; 0x48 - 803c5fe: 6cfa ldr r2, [r7, #76] ; 0x4c - 803c600: 601a str r2, [r3, #0] + 803c62c: 6cbb ldr r3, [r7, #72] ; 0x48 + 803c62e: 6cfa ldr r2, [r7, #76] ; 0x4c + 803c630: 601a str r2, [r3, #0] } /* remember last segment of to-be-queued data for next iteration */ prev_seg = seg; - 803c602: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c604: 64bb str r3, [r7, #72] ; 0x48 + 803c632: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c634: 64bb str r3, [r7, #72] ; 0x48 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_write: queueing %"U32_F":%"U32_F"\n", lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg))); pos += seglen; - 803c606: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c60a: 8b3b ldrh r3, [r7, #24] - 803c60c: 4413 add r3, r2 - 803c60e: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803c636: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c63a: 8b3b ldrh r3, [r7, #24] + 803c63c: 4413 add r3, r2 + 803c63e: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 while (pos < len) { - 803c612: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c616: 88fb ldrh r3, [r7, #6] - 803c618: 429a cmp r2, r3 - 803c61a: f4ff af3d bcc.w 803c498 + 803c642: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c646: 88fb ldrh r3, [r7, #6] + 803c648: 429a cmp r2, r3 + 803c64a: f4ff af3d bcc.w 803c4c8 /* * Phase 1: If data has been added to the preallocated tail of * last_unsent, we update the length fields of the pbuf chain. */ #if TCP_OVERSIZE if (oversize_used > 0) { - 803c61e: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c620: 2b00 cmp r3, #0 - 803c622: d02c beq.n 803c67e + 803c64e: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c650: 2b00 cmp r3, #0 + 803c652: d02c beq.n 803c6ae struct pbuf *p; /* Bump tot_len of whole chain, len of tail */ for (p = last_unsent->p; p; p = p->next) { - 803c624: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c626: 685b ldr r3, [r3, #4] - 803c628: 62fb str r3, [r7, #44] ; 0x2c - 803c62a: e01e b.n 803c66a + 803c654: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c656: 685b ldr r3, [r3, #4] + 803c658: 62fb str r3, [r7, #44] ; 0x2c + 803c65a: e01e b.n 803c69a p->tot_len += oversize_used; - 803c62c: 6afb ldr r3, [r7, #44] ; 0x2c - 803c62e: 891a ldrh r2, [r3, #8] - 803c630: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c632: 4413 add r3, r2 - 803c634: b29a uxth r2, r3 - 803c636: 6afb ldr r3, [r7, #44] ; 0x2c - 803c638: 811a strh r2, [r3, #8] + 803c65c: 6afb ldr r3, [r7, #44] ; 0x2c + 803c65e: 891a ldrh r2, [r3, #8] + 803c660: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c662: 4413 add r3, r2 + 803c664: b29a uxth r2, r3 + 803c666: 6afb ldr r3, [r7, #44] ; 0x2c + 803c668: 811a strh r2, [r3, #8] if (p->next == NULL) { - 803c63a: 6afb ldr r3, [r7, #44] ; 0x2c - 803c63c: 681b ldr r3, [r3, #0] - 803c63e: 2b00 cmp r3, #0 - 803c640: d110 bne.n 803c664 + 803c66a: 6afb ldr r3, [r7, #44] ; 0x2c + 803c66c: 681b ldr r3, [r3, #0] + 803c66e: 2b00 cmp r3, #0 + 803c670: d110 bne.n 803c694 TCP_DATA_COPY((char *)p->payload + p->len, arg, oversize_used, last_unsent); - 803c642: 6afb ldr r3, [r7, #44] ; 0x2c - 803c644: 685b ldr r3, [r3, #4] - 803c646: 6afa ldr r2, [r7, #44] ; 0x2c - 803c648: 8952 ldrh r2, [r2, #10] - 803c64a: 4413 add r3, r2 - 803c64c: 8ffa ldrh r2, [r7, #62] ; 0x3e - 803c64e: 68b9 ldr r1, [r7, #8] - 803c650: 4618 mov r0, r3 - 803c652: f004 f935 bl 80408c0 + 803c672: 6afb ldr r3, [r7, #44] ; 0x2c + 803c674: 685b ldr r3, [r3, #4] + 803c676: 6afa ldr r2, [r7, #44] ; 0x2c + 803c678: 8952 ldrh r2, [r2, #10] + 803c67a: 4413 add r3, r2 + 803c67c: 8ffa ldrh r2, [r7, #62] ; 0x3e + 803c67e: 68b9 ldr r1, [r7, #8] + 803c680: 4618 mov r0, r3 + 803c682: f004 f935 bl 80408f0 p->len += oversize_used; - 803c656: 6afb ldr r3, [r7, #44] ; 0x2c - 803c658: 895a ldrh r2, [r3, #10] - 803c65a: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c65c: 4413 add r3, r2 - 803c65e: b29a uxth r2, r3 - 803c660: 6afb ldr r3, [r7, #44] ; 0x2c - 803c662: 815a strh r2, [r3, #10] + 803c686: 6afb ldr r3, [r7, #44] ; 0x2c + 803c688: 895a ldrh r2, [r3, #10] + 803c68a: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c68c: 4413 add r3, r2 + 803c68e: b29a uxth r2, r3 + 803c690: 6afb ldr r3, [r7, #44] ; 0x2c + 803c692: 815a strh r2, [r3, #10] for (p = last_unsent->p; p; p = p->next) { - 803c664: 6afb ldr r3, [r7, #44] ; 0x2c - 803c666: 681b ldr r3, [r3, #0] - 803c668: 62fb str r3, [r7, #44] ; 0x2c - 803c66a: 6afb ldr r3, [r7, #44] ; 0x2c - 803c66c: 2b00 cmp r3, #0 - 803c66e: d1dd bne.n 803c62c + 803c694: 6afb ldr r3, [r7, #44] ; 0x2c + 803c696: 681b ldr r3, [r3, #0] + 803c698: 62fb str r3, [r7, #44] ; 0x2c + 803c69a: 6afb ldr r3, [r7, #44] ; 0x2c + 803c69c: 2b00 cmp r3, #0 + 803c69e: d1dd bne.n 803c65c } } last_unsent->len += oversize_used; - 803c670: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c672: 891a ldrh r2, [r3, #8] - 803c674: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c676: 4413 add r3, r2 - 803c678: b29a uxth r2, r3 - 803c67a: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c67c: 811a strh r2, [r3, #8] + 803c6a0: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c6a2: 891a ldrh r2, [r3, #8] + 803c6a4: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c6a6: 4413 add r3, r2 + 803c6a8: b29a uxth r2, r3 + 803c6aa: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c6ac: 811a strh r2, [r3, #8] LWIP_ASSERT("last_unsent->oversize_left >= oversize_used", last_unsent->oversize_left >= oversize_used); last_unsent->oversize_left -= oversize_used; #endif /* TCP_OVERSIZE_DBGCHECK */ } pcb->unsent_oversize = oversize; - 803c67e: 8a7a ldrh r2, [r7, #18] - 803c680: 68fb ldr r3, [r7, #12] - 803c682: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803c6ae: 8a7a ldrh r2, [r7, #18] + 803c6b0: 68fb ldr r3, [r7, #12] + 803c6b2: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 /* * Phase 2: concat_p can be concatenated onto last_unsent->p, unless we * determined that the last ROM pbuf can be extended to include the new data. */ if (concat_p != NULL) { - 803c686: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c688: 2b00 cmp r3, #0 - 803c68a: d018 beq.n 803c6be + 803c6b6: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c6b8: 2b00 cmp r3, #0 + 803c6ba: d018 beq.n 803c6ee LWIP_ASSERT("tcp_write: cannot concatenate when pcb->unsent is empty", - 803c68c: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c68e: 2b00 cmp r3, #0 - 803c690: d106 bne.n 803c6a0 - 803c692: 4b2a ldr r3, [pc, #168] ; (803c73c ) - 803c694: f44f 7238 mov.w r2, #736 ; 0x2e0 - 803c698: 492d ldr r1, [pc, #180] ; (803c750 ) - 803c69a: 482a ldr r0, [pc, #168] ; (803c744 ) - 803c69c: f004 fa20 bl 8040ae0 + 803c6bc: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c6be: 2b00 cmp r3, #0 + 803c6c0: d106 bne.n 803c6d0 + 803c6c2: 4b2a ldr r3, [pc, #168] ; (803c76c ) + 803c6c4: f44f 7238 mov.w r2, #736 ; 0x2e0 + 803c6c8: 492d ldr r1, [pc, #180] ; (803c780 ) + 803c6ca: 482a ldr r0, [pc, #168] ; (803c774 ) + 803c6cc: f004 fa20 bl 8040b10 (last_unsent != NULL)); pbuf_cat(last_unsent->p, concat_p); - 803c6a0: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6a2: 685b ldr r3, [r3, #4] - 803c6a4: 6d79 ldr r1, [r7, #84] ; 0x54 - 803c6a6: 4618 mov r0, r3 - 803c6a8: f7fb f8f2 bl 8037890 + 803c6d0: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c6d2: 685b ldr r3, [r3, #4] + 803c6d4: 6d79 ldr r1, [r7, #84] ; 0x54 + 803c6d6: 4618 mov r0, r3 + 803c6d8: f7fb f8f2 bl 80378c0 last_unsent->len += concat_p->tot_len; - 803c6ac: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6ae: 891a ldrh r2, [r3, #8] - 803c6b0: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c6b2: 891b ldrh r3, [r3, #8] - 803c6b4: 4413 add r3, r2 - 803c6b6: b29a uxth r2, r3 - 803c6b8: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6ba: 811a strh r2, [r3, #8] - 803c6bc: e037 b.n 803c72e + 803c6dc: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c6de: 891a ldrh r2, [r3, #8] + 803c6e0: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c6e2: 891b ldrh r3, [r3, #8] + 803c6e4: 4413 add r3, r2 + 803c6e6: b29a uxth r2, r3 + 803c6e8: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c6ea: 811a strh r2, [r3, #8] + 803c6ec: e037 b.n 803c75e } else if (extendlen > 0) { - 803c6be: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c6c0: 2b00 cmp r3, #0 - 803c6c2: d034 beq.n 803c72e + 803c6ee: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c6f0: 2b00 cmp r3, #0 + 803c6f2: d034 beq.n 803c75e struct pbuf *p; LWIP_ASSERT("tcp_write: extension of reference requires reference", - 803c6c4: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6c6: 2b00 cmp r3, #0 - 803c6c8: d003 beq.n 803c6d2 - 803c6ca: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6cc: 685b ldr r3, [r3, #4] - 803c6ce: 2b00 cmp r3, #0 - 803c6d0: d106 bne.n 803c6e0 - 803c6d2: 4b1a ldr r3, [pc, #104] ; (803c73c ) - 803c6d4: f240 22e6 movw r2, #742 ; 0x2e6 - 803c6d8: 491e ldr r1, [pc, #120] ; (803c754 ) - 803c6da: 481a ldr r0, [pc, #104] ; (803c744 ) - 803c6dc: f004 fa00 bl 8040ae0 + 803c6f4: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c6f6: 2b00 cmp r3, #0 + 803c6f8: d003 beq.n 803c702 + 803c6fa: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c6fc: 685b ldr r3, [r3, #4] + 803c6fe: 2b00 cmp r3, #0 + 803c700: d106 bne.n 803c710 + 803c702: 4b1a ldr r3, [pc, #104] ; (803c76c ) + 803c704: f240 22e6 movw r2, #742 ; 0x2e6 + 803c708: 491e ldr r1, [pc, #120] ; (803c784 ) + 803c70a: 481a ldr r0, [pc, #104] ; (803c774 ) + 803c70c: f004 fa00 bl 8040b10 last_unsent != NULL && last_unsent->p != NULL); for (p = last_unsent->p; p->next != NULL; p = p->next) { - 803c6e0: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6e2: 685b ldr r3, [r3, #4] - 803c6e4: 62bb str r3, [r7, #40] ; 0x28 - 803c6e6: e009 b.n 803c6fc + 803c710: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c712: 685b ldr r3, [r3, #4] + 803c714: 62bb str r3, [r7, #40] ; 0x28 + 803c716: e009 b.n 803c72c p->tot_len += extendlen; - 803c6e8: 6abb ldr r3, [r7, #40] ; 0x28 - 803c6ea: 891a ldrh r2, [r3, #8] - 803c6ec: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c6ee: 4413 add r3, r2 - 803c6f0: b29a uxth r2, r3 - 803c6f2: 6abb ldr r3, [r7, #40] ; 0x28 - 803c6f4: 811a strh r2, [r3, #8] + 803c718: 6abb ldr r3, [r7, #40] ; 0x28 + 803c71a: 891a ldrh r2, [r3, #8] + 803c71c: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c71e: 4413 add r3, r2 + 803c720: b29a uxth r2, r3 + 803c722: 6abb ldr r3, [r7, #40] ; 0x28 + 803c724: 811a strh r2, [r3, #8] for (p = last_unsent->p; p->next != NULL; p = p->next) { - 803c6f6: 6abb ldr r3, [r7, #40] ; 0x28 - 803c6f8: 681b ldr r3, [r3, #0] - 803c6fa: 62bb str r3, [r7, #40] ; 0x28 - 803c6fc: 6abb ldr r3, [r7, #40] ; 0x28 - 803c6fe: 681b ldr r3, [r3, #0] - 803c700: 2b00 cmp r3, #0 - 803c702: d1f1 bne.n 803c6e8 + 803c726: 6abb ldr r3, [r7, #40] ; 0x28 + 803c728: 681b ldr r3, [r3, #0] + 803c72a: 62bb str r3, [r7, #40] ; 0x28 + 803c72c: 6abb ldr r3, [r7, #40] ; 0x28 + 803c72e: 681b ldr r3, [r3, #0] + 803c730: 2b00 cmp r3, #0 + 803c732: d1f1 bne.n 803c718 } p->tot_len += extendlen; - 803c704: 6abb ldr r3, [r7, #40] ; 0x28 - 803c706: 891a ldrh r2, [r3, #8] - 803c708: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c70a: 4413 add r3, r2 - 803c70c: b29a uxth r2, r3 - 803c70e: 6abb ldr r3, [r7, #40] ; 0x28 - 803c710: 811a strh r2, [r3, #8] + 803c734: 6abb ldr r3, [r7, #40] ; 0x28 + 803c736: 891a ldrh r2, [r3, #8] + 803c738: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c73a: 4413 add r3, r2 + 803c73c: b29a uxth r2, r3 + 803c73e: 6abb ldr r3, [r7, #40] ; 0x28 + 803c740: 811a strh r2, [r3, #8] p->len += extendlen; - 803c712: 6abb ldr r3, [r7, #40] ; 0x28 - 803c714: 895a ldrh r2, [r3, #10] - 803c716: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c718: 4413 add r3, r2 - 803c71a: b29a uxth r2, r3 - 803c71c: 6abb ldr r3, [r7, #40] ; 0x28 - 803c71e: 815a strh r2, [r3, #10] + 803c742: 6abb ldr r3, [r7, #40] ; 0x28 + 803c744: 895a ldrh r2, [r3, #10] + 803c746: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c748: 4413 add r3, r2 + 803c74a: b29a uxth r2, r3 + 803c74c: 6abb ldr r3, [r7, #40] ; 0x28 + 803c74e: 815a strh r2, [r3, #10] last_unsent->len += extendlen; - 803c720: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c722: 891a ldrh r2, [r3, #8] - 803c724: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c726: 4413 add r3, r2 - 803c728: b29a uxth r2, r3 - 803c72a: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c72c: 811a strh r2, [r3, #8] + 803c750: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c752: 891a ldrh r2, [r3, #8] + 803c754: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c756: 4413 add r3, r2 + 803c758: b29a uxth r2, r3 + 803c75a: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c75c: 811a strh r2, [r3, #8] /* * Phase 3: Append queue to pcb->unsent. Queue may be NULL, but that * is harmless */ if (last_unsent == NULL) { - 803c72e: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c730: 2b00 cmp r3, #0 - 803c732: d111 bne.n 803c758 + 803c75e: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c760: 2b00 cmp r3, #0 + 803c762: d111 bne.n 803c788 pcb->unsent = queue; - 803c734: 68fb ldr r3, [r7, #12] - 803c736: 6c7a ldr r2, [r7, #68] ; 0x44 - 803c738: 66da str r2, [r3, #108] ; 0x6c - 803c73a: e010 b.n 803c75e - 803c73c: 08043950 .word 0x08043950 - 803c740: 08043bf0 .word 0x08043bf0 - 803c744: 080439a4 .word 0x080439a4 - 803c748: 08043c30 .word 0x08043c30 - 803c74c: 08043c40 .word 0x08043c40 - 803c750: 08043c54 .word 0x08043c54 - 803c754: 08043c8c .word 0x08043c8c + 803c764: 68fb ldr r3, [r7, #12] + 803c766: 6c7a ldr r2, [r7, #68] ; 0x44 + 803c768: 66da str r2, [r3, #108] ; 0x6c + 803c76a: e010 b.n 803c78e + 803c76c: 08043980 .word 0x08043980 + 803c770: 08043c20 .word 0x08043c20 + 803c774: 080439d4 .word 0x080439d4 + 803c778: 08043c60 .word 0x08043c60 + 803c77c: 08043c70 .word 0x08043c70 + 803c780: 08043c84 .word 0x08043c84 + 803c784: 08043cbc .word 0x08043cbc } else { last_unsent->next = queue; - 803c758: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c75a: 6c7a ldr r2, [r7, #68] ; 0x44 - 803c75c: 601a str r2, [r3, #0] + 803c788: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c78a: 6c7a ldr r2, [r7, #68] ; 0x44 + 803c78c: 601a str r2, [r3, #0] } /* * Finally update the pcb state. */ pcb->snd_lbb += len; - 803c75e: 68fb ldr r3, [r7, #12] - 803c760: 6dda ldr r2, [r3, #92] ; 0x5c - 803c762: 88fb ldrh r3, [r7, #6] - 803c764: 441a add r2, r3 - 803c766: 68fb ldr r3, [r7, #12] - 803c768: 65da str r2, [r3, #92] ; 0x5c + 803c78e: 68fb ldr r3, [r7, #12] + 803c790: 6dda ldr r2, [r3, #92] ; 0x5c + 803c792: 88fb ldrh r3, [r7, #6] + 803c794: 441a add r2, r3 + 803c796: 68fb ldr r3, [r7, #12] + 803c798: 65da str r2, [r3, #92] ; 0x5c pcb->snd_buf -= len; - 803c76a: 68fb ldr r3, [r7, #12] - 803c76c: f8b3 2064 ldrh.w r2, [r3, #100] ; 0x64 - 803c770: 88fb ldrh r3, [r7, #6] - 803c772: 1ad3 subs r3, r2, r3 - 803c774: b29a uxth r2, r3 - 803c776: 68fb ldr r3, [r7, #12] - 803c778: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 + 803c79a: 68fb ldr r3, [r7, #12] + 803c79c: f8b3 2064 ldrh.w r2, [r3, #100] ; 0x64 + 803c7a0: 88fb ldrh r3, [r7, #6] + 803c7a2: 1ad3 subs r3, r2, r3 + 803c7a4: b29a uxth r2, r3 + 803c7a6: 68fb ldr r3, [r7, #12] + 803c7a8: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 pcb->snd_queuelen = queuelen; - 803c77c: 68fb ldr r3, [r7, #12] - 803c77e: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 - 803c782: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803c7ac: 68fb ldr r3, [r7, #12] + 803c7ae: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 + 803c7b2: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: %"S16_F" (after enqueued)\n", pcb->snd_queuelen)); if (pcb->snd_queuelen != 0) { - 803c786: 68fb ldr r3, [r7, #12] - 803c788: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c78c: 2b00 cmp r3, #0 - 803c78e: d00e beq.n 803c7ae + 803c7b6: 68fb ldr r3, [r7, #12] + 803c7b8: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c7bc: 2b00 cmp r3, #0 + 803c7be: d00e beq.n 803c7de LWIP_ASSERT("tcp_write: valid queue length", - 803c790: 68fb ldr r3, [r7, #12] - 803c792: 6f1b ldr r3, [r3, #112] ; 0x70 - 803c794: 2b00 cmp r3, #0 - 803c796: d10a bne.n 803c7ae - 803c798: 68fb ldr r3, [r7, #12] - 803c79a: 6edb ldr r3, [r3, #108] ; 0x6c - 803c79c: 2b00 cmp r3, #0 - 803c79e: d106 bne.n 803c7ae - 803c7a0: 4b2c ldr r3, [pc, #176] ; (803c854 ) - 803c7a2: f240 3212 movw r2, #786 ; 0x312 - 803c7a6: 492c ldr r1, [pc, #176] ; (803c858 ) - 803c7a8: 482c ldr r0, [pc, #176] ; (803c85c ) - 803c7aa: f004 f999 bl 8040ae0 + 803c7c0: 68fb ldr r3, [r7, #12] + 803c7c2: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c7c4: 2b00 cmp r3, #0 + 803c7c6: d10a bne.n 803c7de + 803c7c8: 68fb ldr r3, [r7, #12] + 803c7ca: 6edb ldr r3, [r3, #108] ; 0x6c + 803c7cc: 2b00 cmp r3, #0 + 803c7ce: d106 bne.n 803c7de + 803c7d0: 4b2c ldr r3, [pc, #176] ; (803c884 ) + 803c7d2: f240 3212 movw r2, #786 ; 0x312 + 803c7d6: 492c ldr r1, [pc, #176] ; (803c888 ) + 803c7d8: 482c ldr r0, [pc, #176] ; (803c88c ) + 803c7da: f004 f999 bl 8040b10 pcb->unacked != NULL || pcb->unsent != NULL); } /* Set the PSH flag in the last segment that we enqueued. */ if (seg != NULL && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE) == 0)) { - 803c7ae: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c7b0: 2b00 cmp r3, #0 - 803c7b2: d016 beq.n 803c7e2 - 803c7b4: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c7b6: 68db ldr r3, [r3, #12] - 803c7b8: 2b00 cmp r3, #0 - 803c7ba: d012 beq.n 803c7e2 - 803c7bc: 797b ldrb r3, [r7, #5] - 803c7be: f003 0302 and.w r3, r3, #2 - 803c7c2: 2b00 cmp r3, #0 - 803c7c4: d10d bne.n 803c7e2 + 803c7de: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c7e0: 2b00 cmp r3, #0 + 803c7e2: d016 beq.n 803c812 + 803c7e4: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c7e6: 68db ldr r3, [r3, #12] + 803c7e8: 2b00 cmp r3, #0 + 803c7ea: d012 beq.n 803c812 + 803c7ec: 797b ldrb r3, [r7, #5] + 803c7ee: f003 0302 and.w r3, r3, #2 + 803c7f2: 2b00 cmp r3, #0 + 803c7f4: d10d bne.n 803c812 TCPH_SET_FLAG(seg->tcphdr, TCP_PSH); - 803c7c6: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c7c8: 68db ldr r3, [r3, #12] - 803c7ca: 899b ldrh r3, [r3, #12] - 803c7cc: b29c uxth r4, r3 - 803c7ce: 2008 movs r0, #8 - 803c7d0: f7f9 fb6a bl 8035ea8 - 803c7d4: 4603 mov r3, r0 - 803c7d6: 461a mov r2, r3 - 803c7d8: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c7da: 68db ldr r3, [r3, #12] - 803c7dc: 4322 orrs r2, r4 - 803c7de: b292 uxth r2, r2 - 803c7e0: 819a strh r2, [r3, #12] + 803c7f6: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c7f8: 68db ldr r3, [r3, #12] + 803c7fa: 899b ldrh r3, [r3, #12] + 803c7fc: b29c uxth r4, r3 + 803c7fe: 2008 movs r0, #8 + 803c800: f7f9 fb6a bl 8035ed8 + 803c804: 4603 mov r3, r0 + 803c806: 461a mov r2, r3 + 803c808: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c80a: 68db ldr r3, [r3, #12] + 803c80c: 4322 orrs r2, r4 + 803c80e: b292 uxth r2, r2 + 803c810: 819a strh r2, [r3, #12] } return ERR_OK; - 803c7e2: 2300 movs r3, #0 - 803c7e4: e031 b.n 803c84a + 803c812: 2300 movs r3, #0 + 803c814: e031 b.n 803c87a goto memerr; - 803c7e6: bf00 nop - 803c7e8: e006 b.n 803c7f8 + 803c816: bf00 nop + 803c818: e006 b.n 803c828 goto memerr; - 803c7ea: bf00 nop - 803c7ec: e004 b.n 803c7f8 + 803c81a: bf00 nop + 803c81c: e004 b.n 803c828 goto memerr; - 803c7ee: bf00 nop - 803c7f0: e002 b.n 803c7f8 + 803c81e: bf00 nop + 803c820: e002 b.n 803c828 goto memerr; - 803c7f2: bf00 nop - 803c7f4: e000 b.n 803c7f8 + 803c822: bf00 nop + 803c824: e000 b.n 803c828 goto memerr; - 803c7f6: bf00 nop + 803c826: bf00 nop memerr: tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803c7f8: 68fb ldr r3, [r7, #12] - 803c7fa: 8b5b ldrh r3, [r3, #26] - 803c7fc: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803c800: b29a uxth r2, r3 - 803c802: 68fb ldr r3, [r7, #12] - 803c804: 835a strh r2, [r3, #26] + 803c828: 68fb ldr r3, [r7, #12] + 803c82a: 8b5b ldrh r3, [r3, #26] + 803c82c: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803c830: b29a uxth r2, r3 + 803c832: 68fb ldr r3, [r7, #12] + 803c834: 835a strh r2, [r3, #26] TCP_STATS_INC(tcp.memerr); if (concat_p != NULL) { - 803c806: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c808: 2b00 cmp r3, #0 - 803c80a: d002 beq.n 803c812 + 803c836: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c838: 2b00 cmp r3, #0 + 803c83a: d002 beq.n 803c842 pbuf_free(concat_p); - 803c80c: 6d78 ldr r0, [r7, #84] ; 0x54 - 803c80e: f7fa ff7d bl 803770c + 803c83c: 6d78 ldr r0, [r7, #84] ; 0x54 + 803c83e: f7fa ff7d bl 803773c } if (queue != NULL) { - 803c812: 6c7b ldr r3, [r7, #68] ; 0x44 - 803c814: 2b00 cmp r3, #0 - 803c816: d002 beq.n 803c81e + 803c842: 6c7b ldr r3, [r7, #68] ; 0x44 + 803c844: 2b00 cmp r3, #0 + 803c846: d002 beq.n 803c84e tcp_segs_free(queue); - 803c818: 6c78 ldr r0, [r7, #68] ; 0x44 - 803c81a: f7fc fb8f bl 8038f3c + 803c848: 6c78 ldr r0, [r7, #68] ; 0x44 + 803c84a: f7fc fb8f bl 8038f6c } if (pcb->snd_queuelen != 0) { - 803c81e: 68fb ldr r3, [r7, #12] - 803c820: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c824: 2b00 cmp r3, #0 - 803c826: d00e beq.n 803c846 + 803c84e: 68fb ldr r3, [r7, #12] + 803c850: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c854: 2b00 cmp r3, #0 + 803c856: d00e beq.n 803c876 LWIP_ASSERT("tcp_write: valid queue length", pcb->unacked != NULL || - 803c828: 68fb ldr r3, [r7, #12] - 803c82a: 6f1b ldr r3, [r3, #112] ; 0x70 - 803c82c: 2b00 cmp r3, #0 - 803c82e: d10a bne.n 803c846 - 803c830: 68fb ldr r3, [r7, #12] - 803c832: 6edb ldr r3, [r3, #108] ; 0x6c - 803c834: 2b00 cmp r3, #0 - 803c836: d106 bne.n 803c846 - 803c838: 4b06 ldr r3, [pc, #24] ; (803c854 ) - 803c83a: f240 3227 movw r2, #807 ; 0x327 - 803c83e: 4906 ldr r1, [pc, #24] ; (803c858 ) - 803c840: 4806 ldr r0, [pc, #24] ; (803c85c ) - 803c842: f004 f94d bl 8040ae0 + 803c858: 68fb ldr r3, [r7, #12] + 803c85a: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c85c: 2b00 cmp r3, #0 + 803c85e: d10a bne.n 803c876 + 803c860: 68fb ldr r3, [r7, #12] + 803c862: 6edb ldr r3, [r3, #108] ; 0x6c + 803c864: 2b00 cmp r3, #0 + 803c866: d106 bne.n 803c876 + 803c868: 4b06 ldr r3, [pc, #24] ; (803c884 ) + 803c86a: f240 3227 movw r2, #807 ; 0x327 + 803c86e: 4906 ldr r1, [pc, #24] ; (803c888 ) + 803c870: 4806 ldr r0, [pc, #24] ; (803c88c ) + 803c872: f004 f94d bl 8040b10 pcb->unsent != NULL); } LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_write: %"S16_F" (with mem err)\n", pcb->snd_queuelen)); return ERR_MEM; - 803c846: f04f 33ff mov.w r3, #4294967295 -} - 803c84a: 4618 mov r0, r3 - 803c84c: 375c adds r7, #92 ; 0x5c - 803c84e: 46bd mov sp, r7 - 803c850: bd90 pop {r4, r7, pc} - 803c852: bf00 nop - 803c854: 08043950 .word 0x08043950 - 803c858: 08043cc4 .word 0x08043cc4 - 803c85c: 080439a4 .word 0x080439a4 - -0803c860 : + 803c876: f04f 33ff mov.w r3, #4294967295 +} + 803c87a: 4618 mov r0, r3 + 803c87c: 375c adds r7, #92 ; 0x5c + 803c87e: 46bd mov sp, r7 + 803c880: bd90 pop {r4, r7, pc} + 803c882: bf00 nop + 803c884: 08043980 .word 0x08043980 + 803c888: 08043cf4 .word 0x08043cf4 + 803c88c: 080439d4 .word 0x080439d4 + +0803c890 : * @param pcb the tcp_pcb for which to split the unsent head * @param split the amount of payload to remain in the head */ err_t tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split) { - 803c860: b590 push {r4, r7, lr} - 803c862: b08b sub sp, #44 ; 0x2c - 803c864: af02 add r7, sp, #8 - 803c866: 6078 str r0, [r7, #4] - 803c868: 460b mov r3, r1 - 803c86a: 807b strh r3, [r7, #2] + 803c890: b590 push {r4, r7, lr} + 803c892: b08b sub sp, #44 ; 0x2c + 803c894: af02 add r7, sp, #8 + 803c896: 6078 str r0, [r7, #4] + 803c898: 460b mov r3, r1 + 803c89a: 807b strh r3, [r7, #2] struct tcp_seg *seg = NULL, *useg = NULL; - 803c86c: 2300 movs r3, #0 - 803c86e: 61fb str r3, [r7, #28] - 803c870: 2300 movs r3, #0 - 803c872: 617b str r3, [r7, #20] + 803c89c: 2300 movs r3, #0 + 803c89e: 61fb str r3, [r7, #28] + 803c8a0: 2300 movs r3, #0 + 803c8a2: 617b str r3, [r7, #20] struct pbuf *p = NULL; - 803c874: 2300 movs r3, #0 - 803c876: 613b str r3, [r7, #16] + 803c8a4: 2300 movs r3, #0 + 803c8a6: 613b str r3, [r7, #16] u16_t chksum = 0; u8_t chksum_swapped = 0; struct pbuf *q; #endif /* TCP_CHECKSUM_ON_COPY */ LWIP_ASSERT("tcp_split_unsent_seg: invalid pcb", pcb != NULL); - 803c878: 687b ldr r3, [r7, #4] - 803c87a: 2b00 cmp r3, #0 - 803c87c: d106 bne.n 803c88c - 803c87e: 4b95 ldr r3, [pc, #596] ; (803cad4 ) - 803c880: f240 324b movw r2, #843 ; 0x34b - 803c884: 4994 ldr r1, [pc, #592] ; (803cad8 ) - 803c886: 4895 ldr r0, [pc, #596] ; (803cadc ) - 803c888: f004 f92a bl 8040ae0 + 803c8a8: 687b ldr r3, [r7, #4] + 803c8aa: 2b00 cmp r3, #0 + 803c8ac: d106 bne.n 803c8bc + 803c8ae: 4b95 ldr r3, [pc, #596] ; (803cb04 ) + 803c8b0: f240 324b movw r2, #843 ; 0x34b + 803c8b4: 4994 ldr r1, [pc, #592] ; (803cb08 ) + 803c8b6: 4895 ldr r0, [pc, #596] ; (803cb0c ) + 803c8b8: f004 f92a bl 8040b10 useg = pcb->unsent; - 803c88c: 687b ldr r3, [r7, #4] - 803c88e: 6edb ldr r3, [r3, #108] ; 0x6c - 803c890: 617b str r3, [r7, #20] + 803c8bc: 687b ldr r3, [r7, #4] + 803c8be: 6edb ldr r3, [r3, #108] ; 0x6c + 803c8c0: 617b str r3, [r7, #20] if (useg == NULL) { - 803c892: 697b ldr r3, [r7, #20] - 803c894: 2b00 cmp r3, #0 - 803c896: d102 bne.n 803c89e + 803c8c2: 697b ldr r3, [r7, #20] + 803c8c4: 2b00 cmp r3, #0 + 803c8c6: d102 bne.n 803c8ce return ERR_MEM; - 803c898: f04f 33ff mov.w r3, #4294967295 - 803c89c: e116 b.n 803cacc + 803c8c8: f04f 33ff mov.w r3, #4294967295 + 803c8cc: e116 b.n 803cafc } if (split == 0) { - 803c89e: 887b ldrh r3, [r7, #2] - 803c8a0: 2b00 cmp r3, #0 - 803c8a2: d109 bne.n 803c8b8 + 803c8ce: 887b ldrh r3, [r7, #2] + 803c8d0: 2b00 cmp r3, #0 + 803c8d2: d109 bne.n 803c8e8 LWIP_ASSERT("Can't split segment into length 0", 0); - 803c8a4: 4b8b ldr r3, [pc, #556] ; (803cad4 ) - 803c8a6: f240 3253 movw r2, #851 ; 0x353 - 803c8aa: 498d ldr r1, [pc, #564] ; (803cae0 ) - 803c8ac: 488b ldr r0, [pc, #556] ; (803cadc ) - 803c8ae: f004 f917 bl 8040ae0 + 803c8d4: 4b8b ldr r3, [pc, #556] ; (803cb04 ) + 803c8d6: f240 3253 movw r2, #851 ; 0x353 + 803c8da: 498d ldr r1, [pc, #564] ; (803cb10 ) + 803c8dc: 488b ldr r0, [pc, #556] ; (803cb0c ) + 803c8de: f004 f917 bl 8040b10 return ERR_VAL; - 803c8b2: f06f 0305 mvn.w r3, #5 - 803c8b6: e109 b.n 803cacc + 803c8e2: f06f 0305 mvn.w r3, #5 + 803c8e6: e109 b.n 803cafc } if (useg->len <= split) { - 803c8b8: 697b ldr r3, [r7, #20] - 803c8ba: 891b ldrh r3, [r3, #8] - 803c8bc: 887a ldrh r2, [r7, #2] - 803c8be: 429a cmp r2, r3 - 803c8c0: d301 bcc.n 803c8c6 + 803c8e8: 697b ldr r3, [r7, #20] + 803c8ea: 891b ldrh r3, [r3, #8] + 803c8ec: 887a ldrh r2, [r7, #2] + 803c8ee: 429a cmp r2, r3 + 803c8f0: d301 bcc.n 803c8f6 return ERR_OK; - 803c8c2: 2300 movs r3, #0 - 803c8c4: e102 b.n 803cacc + 803c8f2: 2300 movs r3, #0 + 803c8f4: e102 b.n 803cafc } LWIP_ASSERT("split <= mss", split <= pcb->mss); - 803c8c6: 687b ldr r3, [r7, #4] - 803c8c8: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803c8ca: 887a ldrh r2, [r7, #2] - 803c8cc: 429a cmp r2, r3 - 803c8ce: d906 bls.n 803c8de - 803c8d0: 4b80 ldr r3, [pc, #512] ; (803cad4 ) - 803c8d2: f240 325b movw r2, #859 ; 0x35b - 803c8d6: 4983 ldr r1, [pc, #524] ; (803cae4 ) - 803c8d8: 4880 ldr r0, [pc, #512] ; (803cadc ) - 803c8da: f004 f901 bl 8040ae0 + 803c8f6: 687b ldr r3, [r7, #4] + 803c8f8: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803c8fa: 887a ldrh r2, [r7, #2] + 803c8fc: 429a cmp r2, r3 + 803c8fe: d906 bls.n 803c90e + 803c900: 4b80 ldr r3, [pc, #512] ; (803cb04 ) + 803c902: f240 325b movw r2, #859 ; 0x35b + 803c906: 4983 ldr r1, [pc, #524] ; (803cb14 ) + 803c908: 4880 ldr r0, [pc, #512] ; (803cb0c ) + 803c90a: f004 f901 bl 8040b10 LWIP_ASSERT("useg->len > 0", useg->len > 0); - 803c8de: 697b ldr r3, [r7, #20] - 803c8e0: 891b ldrh r3, [r3, #8] - 803c8e2: 2b00 cmp r3, #0 - 803c8e4: d106 bne.n 803c8f4 - 803c8e6: 4b7b ldr r3, [pc, #492] ; (803cad4 ) - 803c8e8: f44f 7257 mov.w r2, #860 ; 0x35c - 803c8ec: 497e ldr r1, [pc, #504] ; (803cae8 ) - 803c8ee: 487b ldr r0, [pc, #492] ; (803cadc ) - 803c8f0: f004 f8f6 bl 8040ae0 + 803c90e: 697b ldr r3, [r7, #20] + 803c910: 891b ldrh r3, [r3, #8] + 803c912: 2b00 cmp r3, #0 + 803c914: d106 bne.n 803c924 + 803c916: 4b7b ldr r3, [pc, #492] ; (803cb04 ) + 803c918: f44f 7257 mov.w r2, #860 ; 0x35c + 803c91c: 497e ldr r1, [pc, #504] ; (803cb18 ) + 803c91e: 487b ldr r0, [pc, #492] ; (803cb0c ) + 803c920: f004 f8f6 bl 8040b10 * to split this packet so we may actually exceed the max value by * one! */ LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: split_unsent_seg: %u\n", (unsigned int)pcb->snd_queuelen)); optflags = useg->flags; - 803c8f4: 697b ldr r3, [r7, #20] - 803c8f6: 7a9b ldrb r3, [r3, #10] - 803c8f8: 73fb strb r3, [r7, #15] + 803c924: 697b ldr r3, [r7, #20] + 803c926: 7a9b ldrb r3, [r3, #10] + 803c928: 73fb strb r3, [r7, #15] #if TCP_CHECKSUM_ON_COPY /* Remove since checksum is not stored until after tcp_create_segment() */ optflags &= ~TF_SEG_DATA_CHECKSUMMED; #endif /* TCP_CHECKSUM_ON_COPY */ optlen = LWIP_TCP_OPT_LENGTH(optflags); - 803c8fa: 7bfb ldrb r3, [r7, #15] - 803c8fc: 009b lsls r3, r3, #2 - 803c8fe: b2db uxtb r3, r3 - 803c900: f003 0304 and.w r3, r3, #4 - 803c904: 73bb strb r3, [r7, #14] + 803c92a: 7bfb ldrb r3, [r7, #15] + 803c92c: 009b lsls r3, r3, #2 + 803c92e: b2db uxtb r3, r3 + 803c930: f003 0304 and.w r3, r3, #4 + 803c934: 73bb strb r3, [r7, #14] remainder = useg->len - split; - 803c906: 697b ldr r3, [r7, #20] - 803c908: 891a ldrh r2, [r3, #8] - 803c90a: 887b ldrh r3, [r7, #2] - 803c90c: 1ad3 subs r3, r2, r3 - 803c90e: 81bb strh r3, [r7, #12] + 803c936: 697b ldr r3, [r7, #20] + 803c938: 891a ldrh r2, [r3, #8] + 803c93a: 887b ldrh r3, [r7, #2] + 803c93c: 1ad3 subs r3, r2, r3 + 803c93e: 81bb strh r3, [r7, #12] /* Create new pbuf for the remainder of the split */ p = pbuf_alloc(PBUF_TRANSPORT, remainder + optlen, PBUF_RAM); - 803c910: 7bbb ldrb r3, [r7, #14] - 803c912: b29a uxth r2, r3 - 803c914: 89bb ldrh r3, [r7, #12] - 803c916: 4413 add r3, r2 - 803c918: b29b uxth r3, r3 - 803c91a: f44f 7220 mov.w r2, #640 ; 0x280 - 803c91e: 4619 mov r1, r3 - 803c920: 2036 movs r0, #54 ; 0x36 - 803c922: f7fa fc0f bl 8037144 - 803c926: 6138 str r0, [r7, #16] + 803c940: 7bbb ldrb r3, [r7, #14] + 803c942: b29a uxth r2, r3 + 803c944: 89bb ldrh r3, [r7, #12] + 803c946: 4413 add r3, r2 + 803c948: b29b uxth r3, r3 + 803c94a: f44f 7220 mov.w r2, #640 ; 0x280 + 803c94e: 4619 mov r1, r3 + 803c950: 2036 movs r0, #54 ; 0x36 + 803c952: f7fa fc0f bl 8037174 + 803c956: 6138 str r0, [r7, #16] if (p == NULL) { - 803c928: 693b ldr r3, [r7, #16] - 803c92a: 2b00 cmp r3, #0 - 803c92c: f000 80b7 beq.w 803ca9e + 803c958: 693b ldr r3, [r7, #16] + 803c95a: 2b00 cmp r3, #0 + 803c95c: f000 80b7 beq.w 803cace ("tcp_split_unsent_seg: could not allocate memory for pbuf remainder %u\n", remainder)); goto memerr; } /* Offset into the original pbuf is past TCP/IP headers, options, and split amount */ offset = useg->p->tot_len - useg->len + split; - 803c930: 697b ldr r3, [r7, #20] - 803c932: 685b ldr r3, [r3, #4] - 803c934: 891a ldrh r2, [r3, #8] - 803c936: 697b ldr r3, [r7, #20] - 803c938: 891b ldrh r3, [r3, #8] - 803c93a: 1ad3 subs r3, r2, r3 - 803c93c: b29a uxth r2, r3 - 803c93e: 887b ldrh r3, [r7, #2] - 803c940: 4413 add r3, r2 - 803c942: 817b strh r3, [r7, #10] + 803c960: 697b ldr r3, [r7, #20] + 803c962: 685b ldr r3, [r3, #4] + 803c964: 891a ldrh r2, [r3, #8] + 803c966: 697b ldr r3, [r7, #20] + 803c968: 891b ldrh r3, [r3, #8] + 803c96a: 1ad3 subs r3, r2, r3 + 803c96c: b29a uxth r2, r3 + 803c96e: 887b ldrh r3, [r7, #2] + 803c970: 4413 add r3, r2 + 803c972: 817b strh r3, [r7, #10] /* Copy remainder into new pbuf, headers and options will not be filled out */ if (pbuf_copy_partial(useg->p, (u8_t *)p->payload + optlen, remainder, offset ) != remainder) { - 803c944: 697b ldr r3, [r7, #20] - 803c946: 6858 ldr r0, [r3, #4] - 803c948: 693b ldr r3, [r7, #16] - 803c94a: 685a ldr r2, [r3, #4] - 803c94c: 7bbb ldrb r3, [r7, #14] - 803c94e: 18d1 adds r1, r2, r3 - 803c950: 897b ldrh r3, [r7, #10] - 803c952: 89ba ldrh r2, [r7, #12] - 803c954: f7fb f8c4 bl 8037ae0 - 803c958: 4603 mov r3, r0 - 803c95a: 461a mov r2, r3 - 803c95c: 89bb ldrh r3, [r7, #12] - 803c95e: 4293 cmp r3, r2 - 803c960: f040 809f bne.w 803caa2 + 803c974: 697b ldr r3, [r7, #20] + 803c976: 6858 ldr r0, [r3, #4] + 803c978: 693b ldr r3, [r7, #16] + 803c97a: 685a ldr r2, [r3, #4] + 803c97c: 7bbb ldrb r3, [r7, #14] + 803c97e: 18d1 adds r1, r2, r3 + 803c980: 897b ldrh r3, [r7, #10] + 803c982: 89ba ldrh r2, [r7, #12] + 803c984: f7fb f8c4 bl 8037b10 + 803c988: 4603 mov r3, r0 + 803c98a: 461a mov r2, r3 + 803c98c: 89bb ldrh r3, [r7, #12] + 803c98e: 4293 cmp r3, r2 + 803c990: f040 809f bne.w 803cad2 #endif /* TCP_CHECKSUM_ON_COPY */ /* Options are created when calling tcp_output() */ /* Migrate flags from original segment */ split_flags = TCPH_FLAGS(useg->tcphdr); - 803c964: 697b ldr r3, [r7, #20] - 803c966: 68db ldr r3, [r3, #12] - 803c968: 899b ldrh r3, [r3, #12] - 803c96a: b29b uxth r3, r3 - 803c96c: 4618 mov r0, r3 - 803c96e: f7f9 fa9b bl 8035ea8 - 803c972: 4603 mov r3, r0 - 803c974: b2db uxtb r3, r3 - 803c976: f003 033f and.w r3, r3, #63 ; 0x3f - 803c97a: 76fb strb r3, [r7, #27] + 803c994: 697b ldr r3, [r7, #20] + 803c996: 68db ldr r3, [r3, #12] + 803c998: 899b ldrh r3, [r3, #12] + 803c99a: b29b uxth r3, r3 + 803c99c: 4618 mov r0, r3 + 803c99e: f7f9 fa9b bl 8035ed8 + 803c9a2: 4603 mov r3, r0 + 803c9a4: b2db uxtb r3, r3 + 803c9a6: f003 033f and.w r3, r3, #63 ; 0x3f + 803c9aa: 76fb strb r3, [r7, #27] remainder_flags = 0; /* ACK added in tcp_output() */ - 803c97c: 2300 movs r3, #0 - 803c97e: 76bb strb r3, [r7, #26] + 803c9ac: 2300 movs r3, #0 + 803c9ae: 76bb strb r3, [r7, #26] if (split_flags & TCP_PSH) { - 803c980: 7efb ldrb r3, [r7, #27] - 803c982: f003 0308 and.w r3, r3, #8 - 803c986: 2b00 cmp r3, #0 - 803c988: d007 beq.n 803c99a + 803c9b0: 7efb ldrb r3, [r7, #27] + 803c9b2: f003 0308 and.w r3, r3, #8 + 803c9b6: 2b00 cmp r3, #0 + 803c9b8: d007 beq.n 803c9ca split_flags &= ~TCP_PSH; - 803c98a: 7efb ldrb r3, [r7, #27] - 803c98c: f023 0308 bic.w r3, r3, #8 - 803c990: 76fb strb r3, [r7, #27] + 803c9ba: 7efb ldrb r3, [r7, #27] + 803c9bc: f023 0308 bic.w r3, r3, #8 + 803c9c0: 76fb strb r3, [r7, #27] remainder_flags |= TCP_PSH; - 803c992: 7ebb ldrb r3, [r7, #26] - 803c994: f043 0308 orr.w r3, r3, #8 - 803c998: 76bb strb r3, [r7, #26] + 803c9c2: 7ebb ldrb r3, [r7, #26] + 803c9c4: f043 0308 orr.w r3, r3, #8 + 803c9c8: 76bb strb r3, [r7, #26] } if (split_flags & TCP_FIN) { - 803c99a: 7efb ldrb r3, [r7, #27] - 803c99c: f003 0301 and.w r3, r3, #1 - 803c9a0: 2b00 cmp r3, #0 - 803c9a2: d007 beq.n 803c9b4 + 803c9ca: 7efb ldrb r3, [r7, #27] + 803c9cc: f003 0301 and.w r3, r3, #1 + 803c9d0: 2b00 cmp r3, #0 + 803c9d2: d007 beq.n 803c9e4 split_flags &= ~TCP_FIN; - 803c9a4: 7efb ldrb r3, [r7, #27] - 803c9a6: f023 0301 bic.w r3, r3, #1 - 803c9aa: 76fb strb r3, [r7, #27] + 803c9d4: 7efb ldrb r3, [r7, #27] + 803c9d6: f023 0301 bic.w r3, r3, #1 + 803c9da: 76fb strb r3, [r7, #27] remainder_flags |= TCP_FIN; - 803c9ac: 7ebb ldrb r3, [r7, #26] - 803c9ae: f043 0301 orr.w r3, r3, #1 - 803c9b2: 76bb strb r3, [r7, #26] + 803c9dc: 7ebb ldrb r3, [r7, #26] + 803c9de: f043 0301 orr.w r3, r3, #1 + 803c9e2: 76bb strb r3, [r7, #26] } /* SYN should be left on split, RST should not be present with data */ seg = tcp_create_segment(pcb, p, remainder_flags, lwip_ntohl(useg->tcphdr->seqno) + split, optflags); - 803c9b4: 697b ldr r3, [r7, #20] - 803c9b6: 68db ldr r3, [r3, #12] - 803c9b8: 685b ldr r3, [r3, #4] - 803c9ba: 4618 mov r0, r3 - 803c9bc: f7f9 fa89 bl 8035ed2 - 803c9c0: 4602 mov r2, r0 - 803c9c2: 887b ldrh r3, [r7, #2] - 803c9c4: 18d1 adds r1, r2, r3 - 803c9c6: 7eba ldrb r2, [r7, #26] - 803c9c8: 7bfb ldrb r3, [r7, #15] - 803c9ca: 9300 str r3, [sp, #0] - 803c9cc: 460b mov r3, r1 - 803c9ce: 6939 ldr r1, [r7, #16] - 803c9d0: 6878 ldr r0, [r7, #4] - 803c9d2: f7ff fa4f bl 803be74 - 803c9d6: 61f8 str r0, [r7, #28] + 803c9e4: 697b ldr r3, [r7, #20] + 803c9e6: 68db ldr r3, [r3, #12] + 803c9e8: 685b ldr r3, [r3, #4] + 803c9ea: 4618 mov r0, r3 + 803c9ec: f7f9 fa89 bl 8035f02 + 803c9f0: 4602 mov r2, r0 + 803c9f2: 887b ldrh r3, [r7, #2] + 803c9f4: 18d1 adds r1, r2, r3 + 803c9f6: 7eba ldrb r2, [r7, #26] + 803c9f8: 7bfb ldrb r3, [r7, #15] + 803c9fa: 9300 str r3, [sp, #0] + 803c9fc: 460b mov r3, r1 + 803c9fe: 6939 ldr r1, [r7, #16] + 803ca00: 6878 ldr r0, [r7, #4] + 803ca02: f7ff fa4f bl 803bea4 + 803ca06: 61f8 str r0, [r7, #28] if (seg == NULL) { - 803c9d8: 69fb ldr r3, [r7, #28] - 803c9da: 2b00 cmp r3, #0 - 803c9dc: d063 beq.n 803caa6 + 803ca08: 69fb ldr r3, [r7, #28] + 803ca0a: 2b00 cmp r3, #0 + 803ca0c: d063 beq.n 803cad6 seg->chksum_swapped = chksum_swapped; seg->flags |= TF_SEG_DATA_CHECKSUMMED; #endif /* TCP_CHECKSUM_ON_COPY */ /* Remove this segment from the queue since trimming it may free pbufs */ pcb->snd_queuelen -= pbuf_clen(useg->p); - 803c9de: 697b ldr r3, [r7, #20] - 803c9e0: 685b ldr r3, [r3, #4] - 803c9e2: 4618 mov r0, r3 - 803c9e4: f7fa ff1a bl 803781c - 803c9e8: 4603 mov r3, r0 - 803c9ea: 461a mov r2, r3 - 803c9ec: 687b ldr r3, [r7, #4] - 803c9ee: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c9f2: 1a9b subs r3, r3, r2 - 803c9f4: b29a uxth r2, r3 - 803c9f6: 687b ldr r3, [r7, #4] - 803c9f8: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803ca0e: 697b ldr r3, [r7, #20] + 803ca10: 685b ldr r3, [r3, #4] + 803ca12: 4618 mov r0, r3 + 803ca14: f7fa ff1a bl 803784c + 803ca18: 4603 mov r3, r0 + 803ca1a: 461a mov r2, r3 + 803ca1c: 687b ldr r3, [r7, #4] + 803ca1e: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803ca22: 1a9b subs r3, r3, r2 + 803ca24: b29a uxth r2, r3 + 803ca26: 687b ldr r3, [r7, #4] + 803ca28: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 /* Trim the original pbuf into our split size. At this point our remainder segment must be setup successfully because we are modifying the original segment */ pbuf_realloc(useg->p, useg->p->tot_len - remainder); - 803c9fc: 697b ldr r3, [r7, #20] - 803c9fe: 6858 ldr r0, [r3, #4] - 803ca00: 697b ldr r3, [r7, #20] - 803ca02: 685b ldr r3, [r3, #4] - 803ca04: 891a ldrh r2, [r3, #8] - 803ca06: 89bb ldrh r3, [r7, #12] - 803ca08: 1ad3 subs r3, r2, r3 - 803ca0a: b29b uxth r3, r3 - 803ca0c: 4619 mov r1, r3 - 803ca0e: f7fa fcf7 bl 8037400 + 803ca2c: 697b ldr r3, [r7, #20] + 803ca2e: 6858 ldr r0, [r3, #4] + 803ca30: 697b ldr r3, [r7, #20] + 803ca32: 685b ldr r3, [r3, #4] + 803ca34: 891a ldrh r2, [r3, #8] + 803ca36: 89bb ldrh r3, [r7, #12] + 803ca38: 1ad3 subs r3, r2, r3 + 803ca3a: b29b uxth r3, r3 + 803ca3c: 4619 mov r1, r3 + 803ca3e: f7fa fcf7 bl 8037430 useg->len -= remainder; - 803ca12: 697b ldr r3, [r7, #20] - 803ca14: 891a ldrh r2, [r3, #8] - 803ca16: 89bb ldrh r3, [r7, #12] - 803ca18: 1ad3 subs r3, r2, r3 - 803ca1a: b29a uxth r2, r3 - 803ca1c: 697b ldr r3, [r7, #20] - 803ca1e: 811a strh r2, [r3, #8] + 803ca42: 697b ldr r3, [r7, #20] + 803ca44: 891a ldrh r2, [r3, #8] + 803ca46: 89bb ldrh r3, [r7, #12] + 803ca48: 1ad3 subs r3, r2, r3 + 803ca4a: b29a uxth r2, r3 + 803ca4c: 697b ldr r3, [r7, #20] + 803ca4e: 811a strh r2, [r3, #8] TCPH_SET_FLAG(useg->tcphdr, split_flags); - 803ca20: 697b ldr r3, [r7, #20] - 803ca22: 68db ldr r3, [r3, #12] - 803ca24: 899b ldrh r3, [r3, #12] - 803ca26: b29c uxth r4, r3 - 803ca28: 7efb ldrb r3, [r7, #27] - 803ca2a: b29b uxth r3, r3 - 803ca2c: 4618 mov r0, r3 - 803ca2e: f7f9 fa3b bl 8035ea8 - 803ca32: 4603 mov r3, r0 - 803ca34: 461a mov r2, r3 - 803ca36: 697b ldr r3, [r7, #20] - 803ca38: 68db ldr r3, [r3, #12] - 803ca3a: 4322 orrs r2, r4 - 803ca3c: b292 uxth r2, r2 - 803ca3e: 819a strh r2, [r3, #12] + 803ca50: 697b ldr r3, [r7, #20] + 803ca52: 68db ldr r3, [r3, #12] + 803ca54: 899b ldrh r3, [r3, #12] + 803ca56: b29c uxth r4, r3 + 803ca58: 7efb ldrb r3, [r7, #27] + 803ca5a: b29b uxth r3, r3 + 803ca5c: 4618 mov r0, r3 + 803ca5e: f7f9 fa3b bl 8035ed8 + 803ca62: 4603 mov r3, r0 + 803ca64: 461a mov r2, r3 + 803ca66: 697b ldr r3, [r7, #20] + 803ca68: 68db ldr r3, [r3, #12] + 803ca6a: 4322 orrs r2, r4 + 803ca6c: b292 uxth r2, r2 + 803ca6e: 819a strh r2, [r3, #12] /* By trimming, realloc may have actually shrunk the pbuf, so clear oversize_left */ useg->oversize_left = 0; #endif /* TCP_OVERSIZE_DBGCHECK */ /* Add back to the queue with new trimmed pbuf */ pcb->snd_queuelen += pbuf_clen(useg->p); - 803ca40: 697b ldr r3, [r7, #20] - 803ca42: 685b ldr r3, [r3, #4] - 803ca44: 4618 mov r0, r3 - 803ca46: f7fa fee9 bl 803781c - 803ca4a: 4603 mov r3, r0 - 803ca4c: 461a mov r2, r3 - 803ca4e: 687b ldr r3, [r7, #4] - 803ca50: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803ca54: 4413 add r3, r2 - 803ca56: b29a uxth r2, r3 - 803ca58: 687b ldr r3, [r7, #4] - 803ca5a: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803ca70: 697b ldr r3, [r7, #20] + 803ca72: 685b ldr r3, [r3, #4] + 803ca74: 4618 mov r0, r3 + 803ca76: f7fa fee9 bl 803784c + 803ca7a: 4603 mov r3, r0 + 803ca7c: 461a mov r2, r3 + 803ca7e: 687b ldr r3, [r7, #4] + 803ca80: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803ca84: 4413 add r3, r2 + 803ca86: b29a uxth r2, r3 + 803ca88: 687b ldr r3, [r7, #4] + 803ca8a: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 #endif /* TCP_CHECKSUM_ON_COPY */ /* Update number of segments on the queues. Note that length now may * exceed TCP_SND_QUEUELEN! We don't have to touch pcb->snd_buf * because the total amount of data is constant when packet is split */ pcb->snd_queuelen += pbuf_clen(seg->p); - 803ca5e: 69fb ldr r3, [r7, #28] - 803ca60: 685b ldr r3, [r3, #4] - 803ca62: 4618 mov r0, r3 - 803ca64: f7fa feda bl 803781c - 803ca68: 4603 mov r3, r0 - 803ca6a: 461a mov r2, r3 - 803ca6c: 687b ldr r3, [r7, #4] - 803ca6e: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803ca72: 4413 add r3, r2 - 803ca74: b29a uxth r2, r3 - 803ca76: 687b ldr r3, [r7, #4] - 803ca78: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803ca8e: 69fb ldr r3, [r7, #28] + 803ca90: 685b ldr r3, [r3, #4] + 803ca92: 4618 mov r0, r3 + 803ca94: f7fa feda bl 803784c + 803ca98: 4603 mov r3, r0 + 803ca9a: 461a mov r2, r3 + 803ca9c: 687b ldr r3, [r7, #4] + 803ca9e: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803caa2: 4413 add r3, r2 + 803caa4: b29a uxth r2, r3 + 803caa6: 687b ldr r3, [r7, #4] + 803caa8: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 /* Finally insert remainder into queue after split (which stays head) */ seg->next = useg->next; - 803ca7c: 697b ldr r3, [r7, #20] - 803ca7e: 681a ldr r2, [r3, #0] - 803ca80: 69fb ldr r3, [r7, #28] - 803ca82: 601a str r2, [r3, #0] + 803caac: 697b ldr r3, [r7, #20] + 803caae: 681a ldr r2, [r3, #0] + 803cab0: 69fb ldr r3, [r7, #28] + 803cab2: 601a str r2, [r3, #0] useg->next = seg; - 803ca84: 697b ldr r3, [r7, #20] - 803ca86: 69fa ldr r2, [r7, #28] - 803ca88: 601a str r2, [r3, #0] + 803cab4: 697b ldr r3, [r7, #20] + 803cab6: 69fa ldr r2, [r7, #28] + 803cab8: 601a str r2, [r3, #0] #if TCP_OVERSIZE /* If remainder is last segment on the unsent, ensure we clear the oversize amount * because the remainder is always sized to the exact remaining amount */ if (seg->next == NULL) { - 803ca8a: 69fb ldr r3, [r7, #28] - 803ca8c: 681b ldr r3, [r3, #0] - 803ca8e: 2b00 cmp r3, #0 - 803ca90: d103 bne.n 803ca9a + 803caba: 69fb ldr r3, [r7, #28] + 803cabc: 681b ldr r3, [r3, #0] + 803cabe: 2b00 cmp r3, #0 + 803cac0: d103 bne.n 803caca pcb->unsent_oversize = 0; - 803ca92: 687b ldr r3, [r7, #4] - 803ca94: 2200 movs r2, #0 - 803ca96: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803cac2: 687b ldr r3, [r7, #4] + 803cac4: 2200 movs r2, #0 + 803cac6: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 } #endif /* TCP_OVERSIZE */ return ERR_OK; - 803ca9a: 2300 movs r3, #0 - 803ca9c: e016 b.n 803cacc + 803caca: 2300 movs r3, #0 + 803cacc: e016 b.n 803cafc goto memerr; - 803ca9e: bf00 nop - 803caa0: e002 b.n 803caa8 + 803cace: bf00 nop + 803cad0: e002 b.n 803cad8 goto memerr; - 803caa2: bf00 nop - 803caa4: e000 b.n 803caa8 + 803cad2: bf00 nop + 803cad4: e000 b.n 803cad8 goto memerr; - 803caa6: bf00 nop + 803cad6: bf00 nop memerr: TCP_STATS_INC(tcp.memerr); LWIP_ASSERT("seg == NULL", seg == NULL); - 803caa8: 69fb ldr r3, [r7, #28] - 803caaa: 2b00 cmp r3, #0 - 803caac: d006 beq.n 803cabc - 803caae: 4b09 ldr r3, [pc, #36] ; (803cad4 ) - 803cab0: f44f 7276 mov.w r2, #984 ; 0x3d8 - 803cab4: 490d ldr r1, [pc, #52] ; (803caec ) - 803cab6: 4809 ldr r0, [pc, #36] ; (803cadc ) - 803cab8: f004 f812 bl 8040ae0 + 803cad8: 69fb ldr r3, [r7, #28] + 803cada: 2b00 cmp r3, #0 + 803cadc: d006 beq.n 803caec + 803cade: 4b09 ldr r3, [pc, #36] ; (803cb04 ) + 803cae0: f44f 7276 mov.w r2, #984 ; 0x3d8 + 803cae4: 490d ldr r1, [pc, #52] ; (803cb1c ) + 803cae6: 4809 ldr r0, [pc, #36] ; (803cb0c ) + 803cae8: f004 f812 bl 8040b10 if (p != NULL) { - 803cabc: 693b ldr r3, [r7, #16] - 803cabe: 2b00 cmp r3, #0 - 803cac0: d002 beq.n 803cac8 + 803caec: 693b ldr r3, [r7, #16] + 803caee: 2b00 cmp r3, #0 + 803caf0: d002 beq.n 803caf8 pbuf_free(p); - 803cac2: 6938 ldr r0, [r7, #16] - 803cac4: f7fa fe22 bl 803770c + 803caf2: 6938 ldr r0, [r7, #16] + 803caf4: f7fa fe22 bl 803773c } return ERR_MEM; - 803cac8: f04f 33ff mov.w r3, #4294967295 -} - 803cacc: 4618 mov r0, r3 - 803cace: 3724 adds r7, #36 ; 0x24 - 803cad0: 46bd mov sp, r7 - 803cad2: bd90 pop {r4, r7, pc} - 803cad4: 08043950 .word 0x08043950 - 803cad8: 08043ce4 .word 0x08043ce4 - 803cadc: 080439a4 .word 0x080439a4 - 803cae0: 08043d08 .word 0x08043d08 - 803cae4: 08043d2c .word 0x08043d2c - 803cae8: 08043d3c .word 0x08043d3c - 803caec: 08043d4c .word 0x08043d4c - -0803caf0 : + 803caf8: f04f 33ff mov.w r3, #4294967295 +} + 803cafc: 4618 mov r0, r3 + 803cafe: 3724 adds r7, #36 ; 0x24 + 803cb00: 46bd mov sp, r7 + 803cb02: bd90 pop {r4, r7, pc} + 803cb04: 08043980 .word 0x08043980 + 803cb08: 08043d14 .word 0x08043d14 + 803cb0c: 080439d4 .word 0x080439d4 + 803cb10: 08043d38 .word 0x08043d38 + 803cb14: 08043d5c .word 0x08043d5c + 803cb18: 08043d6c .word 0x08043d6c + 803cb1c: 08043d7c .word 0x08043d7c + +0803cb20 : * @param pcb the tcp_pcb over which to send a segment * @return ERR_OK if sent, another err_t otherwise */ err_t tcp_send_fin(struct tcp_pcb *pcb) { - 803caf0: b590 push {r4, r7, lr} - 803caf2: b085 sub sp, #20 - 803caf4: af00 add r7, sp, #0 - 803caf6: 6078 str r0, [r7, #4] + 803cb20: b590 push {r4, r7, lr} + 803cb22: b085 sub sp, #20 + 803cb24: af00 add r7, sp, #0 + 803cb26: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_send_fin: invalid pcb", pcb != NULL); - 803caf8: 687b ldr r3, [r7, #4] - 803cafa: 2b00 cmp r3, #0 - 803cafc: d106 bne.n 803cb0c - 803cafe: 4b21 ldr r3, [pc, #132] ; (803cb84 ) - 803cb00: f240 32eb movw r2, #1003 ; 0x3eb - 803cb04: 4920 ldr r1, [pc, #128] ; (803cb88 ) - 803cb06: 4821 ldr r0, [pc, #132] ; (803cb8c ) - 803cb08: f003 ffea bl 8040ae0 + 803cb28: 687b ldr r3, [r7, #4] + 803cb2a: 2b00 cmp r3, #0 + 803cb2c: d106 bne.n 803cb3c + 803cb2e: 4b21 ldr r3, [pc, #132] ; (803cbb4 ) + 803cb30: f240 32eb movw r2, #1003 ; 0x3eb + 803cb34: 4920 ldr r1, [pc, #128] ; (803cbb8 ) + 803cb36: 4821 ldr r0, [pc, #132] ; (803cbbc ) + 803cb38: f003 ffea bl 8040b10 /* first, try to add the fin to the last unsent segment */ if (pcb->unsent != NULL) { - 803cb0c: 687b ldr r3, [r7, #4] - 803cb0e: 6edb ldr r3, [r3, #108] ; 0x6c - 803cb10: 2b00 cmp r3, #0 - 803cb12: d02e beq.n 803cb72 + 803cb3c: 687b ldr r3, [r7, #4] + 803cb3e: 6edb ldr r3, [r3, #108] ; 0x6c + 803cb40: 2b00 cmp r3, #0 + 803cb42: d02e beq.n 803cba2 struct tcp_seg *last_unsent; for (last_unsent = pcb->unsent; last_unsent->next != NULL; - 803cb14: 687b ldr r3, [r7, #4] - 803cb16: 6edb ldr r3, [r3, #108] ; 0x6c - 803cb18: 60fb str r3, [r7, #12] - 803cb1a: e002 b.n 803cb22 + 803cb44: 687b ldr r3, [r7, #4] + 803cb46: 6edb ldr r3, [r3, #108] ; 0x6c + 803cb48: 60fb str r3, [r7, #12] + 803cb4a: e002 b.n 803cb52 last_unsent = last_unsent->next); - 803cb1c: 68fb ldr r3, [r7, #12] - 803cb1e: 681b ldr r3, [r3, #0] - 803cb20: 60fb str r3, [r7, #12] + 803cb4c: 68fb ldr r3, [r7, #12] + 803cb4e: 681b ldr r3, [r3, #0] + 803cb50: 60fb str r3, [r7, #12] for (last_unsent = pcb->unsent; last_unsent->next != NULL; - 803cb22: 68fb ldr r3, [r7, #12] - 803cb24: 681b ldr r3, [r3, #0] - 803cb26: 2b00 cmp r3, #0 - 803cb28: d1f8 bne.n 803cb1c + 803cb52: 68fb ldr r3, [r7, #12] + 803cb54: 681b ldr r3, [r3, #0] + 803cb56: 2b00 cmp r3, #0 + 803cb58: d1f8 bne.n 803cb4c if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) { - 803cb2a: 68fb ldr r3, [r7, #12] - 803cb2c: 68db ldr r3, [r3, #12] - 803cb2e: 899b ldrh r3, [r3, #12] - 803cb30: b29b uxth r3, r3 - 803cb32: 4618 mov r0, r3 - 803cb34: f7f9 f9b8 bl 8035ea8 - 803cb38: 4603 mov r3, r0 - 803cb3a: b2db uxtb r3, r3 - 803cb3c: f003 0307 and.w r3, r3, #7 - 803cb40: 2b00 cmp r3, #0 - 803cb42: d116 bne.n 803cb72 + 803cb5a: 68fb ldr r3, [r7, #12] + 803cb5c: 68db ldr r3, [r3, #12] + 803cb5e: 899b ldrh r3, [r3, #12] + 803cb60: b29b uxth r3, r3 + 803cb62: 4618 mov r0, r3 + 803cb64: f7f9 f9b8 bl 8035ed8 + 803cb68: 4603 mov r3, r0 + 803cb6a: b2db uxtb r3, r3 + 803cb6c: f003 0307 and.w r3, r3, #7 + 803cb70: 2b00 cmp r3, #0 + 803cb72: d116 bne.n 803cba2 /* no SYN/FIN/RST flag in the header, we can add the FIN flag */ TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN); - 803cb44: 68fb ldr r3, [r7, #12] - 803cb46: 68db ldr r3, [r3, #12] - 803cb48: 899b ldrh r3, [r3, #12] - 803cb4a: b29c uxth r4, r3 - 803cb4c: 2001 movs r0, #1 - 803cb4e: f7f9 f9ab bl 8035ea8 - 803cb52: 4603 mov r3, r0 - 803cb54: 461a mov r2, r3 - 803cb56: 68fb ldr r3, [r7, #12] - 803cb58: 68db ldr r3, [r3, #12] - 803cb5a: 4322 orrs r2, r4 - 803cb5c: b292 uxth r2, r2 - 803cb5e: 819a strh r2, [r3, #12] + 803cb74: 68fb ldr r3, [r7, #12] + 803cb76: 68db ldr r3, [r3, #12] + 803cb78: 899b ldrh r3, [r3, #12] + 803cb7a: b29c uxth r4, r3 + 803cb7c: 2001 movs r0, #1 + 803cb7e: f7f9 f9ab bl 8035ed8 + 803cb82: 4603 mov r3, r0 + 803cb84: 461a mov r2, r3 + 803cb86: 68fb ldr r3, [r7, #12] + 803cb88: 68db ldr r3, [r3, #12] + 803cb8a: 4322 orrs r2, r4 + 803cb8c: b292 uxth r2, r2 + 803cb8e: 819a strh r2, [r3, #12] tcp_set_flags(pcb, TF_FIN); - 803cb60: 687b ldr r3, [r7, #4] - 803cb62: 8b5b ldrh r3, [r3, #26] - 803cb64: f043 0320 orr.w r3, r3, #32 - 803cb68: b29a uxth r2, r3 - 803cb6a: 687b ldr r3, [r7, #4] - 803cb6c: 835a strh r2, [r3, #26] + 803cb90: 687b ldr r3, [r7, #4] + 803cb92: 8b5b ldrh r3, [r3, #26] + 803cb94: f043 0320 orr.w r3, r3, #32 + 803cb98: b29a uxth r2, r3 + 803cb9a: 687b ldr r3, [r7, #4] + 803cb9c: 835a strh r2, [r3, #26] return ERR_OK; - 803cb6e: 2300 movs r3, #0 - 803cb70: e004 b.n 803cb7c + 803cb9e: 2300 movs r3, #0 + 803cba0: e004 b.n 803cbac } } /* no data, no length, flags, copy=1, no optdata */ return tcp_enqueue_flags(pcb, TCP_FIN); - 803cb72: 2101 movs r1, #1 - 803cb74: 6878 ldr r0, [r7, #4] - 803cb76: f000 f80b bl 803cb90 - 803cb7a: 4603 mov r3, r0 -} - 803cb7c: 4618 mov r0, r3 - 803cb7e: 3714 adds r7, #20 - 803cb80: 46bd mov sp, r7 - 803cb82: bd90 pop {r4, r7, pc} - 803cb84: 08043950 .word 0x08043950 - 803cb88: 08043d58 .word 0x08043d58 - 803cb8c: 080439a4 .word 0x080439a4 - -0803cb90 : + 803cba2: 2101 movs r1, #1 + 803cba4: 6878 ldr r0, [r7, #4] + 803cba6: f000 f80b bl 803cbc0 + 803cbaa: 4603 mov r3, r0 +} + 803cbac: 4618 mov r0, r3 + 803cbae: 3714 adds r7, #20 + 803cbb0: 46bd mov sp, r7 + 803cbb2: bd90 pop {r4, r7, pc} + 803cbb4: 08043980 .word 0x08043980 + 803cbb8: 08043d88 .word 0x08043d88 + 803cbbc: 080439d4 .word 0x080439d4 + +0803cbc0 : * @param pcb Protocol control block for the TCP connection. * @param flags TCP header flags to set in the outgoing segment. */ err_t tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags) { - 803cb90: b580 push {r7, lr} - 803cb92: b08a sub sp, #40 ; 0x28 - 803cb94: af02 add r7, sp, #8 - 803cb96: 6078 str r0, [r7, #4] - 803cb98: 460b mov r3, r1 - 803cb9a: 70fb strb r3, [r7, #3] + 803cbc0: b580 push {r7, lr} + 803cbc2: b08a sub sp, #40 ; 0x28 + 803cbc4: af02 add r7, sp, #8 + 803cbc6: 6078 str r0, [r7, #4] + 803cbc8: 460b mov r3, r1 + 803cbca: 70fb strb r3, [r7, #3] struct pbuf *p; struct tcp_seg *seg; u8_t optflags = 0; - 803cb9c: 2300 movs r3, #0 - 803cb9e: 77fb strb r3, [r7, #31] + 803cbcc: 2300 movs r3, #0 + 803cbce: 77fb strb r3, [r7, #31] u8_t optlen = 0; - 803cba0: 2300 movs r3, #0 - 803cba2: 75fb strb r3, [r7, #23] + 803cbd0: 2300 movs r3, #0 + 803cbd2: 75fb strb r3, [r7, #23] LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen)); LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)", - 803cba4: 78fb ldrb r3, [r7, #3] - 803cba6: f003 0303 and.w r3, r3, #3 - 803cbaa: 2b00 cmp r3, #0 - 803cbac: d106 bne.n 803cbbc - 803cbae: 4b67 ldr r3, [pc, #412] ; (803cd4c ) - 803cbb0: f240 4211 movw r2, #1041 ; 0x411 - 803cbb4: 4966 ldr r1, [pc, #408] ; (803cd50 ) - 803cbb6: 4867 ldr r0, [pc, #412] ; (803cd54 ) - 803cbb8: f003 ff92 bl 8040ae0 + 803cbd4: 78fb ldrb r3, [r7, #3] + 803cbd6: f003 0303 and.w r3, r3, #3 + 803cbda: 2b00 cmp r3, #0 + 803cbdc: d106 bne.n 803cbec + 803cbde: 4b67 ldr r3, [pc, #412] ; (803cd7c ) + 803cbe0: f240 4211 movw r2, #1041 ; 0x411 + 803cbe4: 4966 ldr r1, [pc, #408] ; (803cd80 ) + 803cbe6: 4867 ldr r0, [pc, #412] ; (803cd84 ) + 803cbe8: f003 ff92 bl 8040b10 (flags & (TCP_SYN | TCP_FIN)) != 0); LWIP_ASSERT("tcp_enqueue_flags: invalid pcb", pcb != NULL); - 803cbbc: 687b ldr r3, [r7, #4] - 803cbbe: 2b00 cmp r3, #0 - 803cbc0: d106 bne.n 803cbd0 - 803cbc2: 4b62 ldr r3, [pc, #392] ; (803cd4c ) - 803cbc4: f240 4213 movw r2, #1043 ; 0x413 - 803cbc8: 4963 ldr r1, [pc, #396] ; (803cd58 ) - 803cbca: 4862 ldr r0, [pc, #392] ; (803cd54 ) - 803cbcc: f003 ff88 bl 8040ae0 + 803cbec: 687b ldr r3, [r7, #4] + 803cbee: 2b00 cmp r3, #0 + 803cbf0: d106 bne.n 803cc00 + 803cbf2: 4b62 ldr r3, [pc, #392] ; (803cd7c ) + 803cbf4: f240 4213 movw r2, #1043 ; 0x413 + 803cbf8: 4963 ldr r1, [pc, #396] ; (803cd88 ) + 803cbfa: 4862 ldr r0, [pc, #392] ; (803cd84 ) + 803cbfc: f003 ff88 bl 8040b10 /* No need to check pcb->snd_queuelen if only SYN or FIN are allowed! */ /* Get options for this segment. This is a special case since this is the only place where a SYN can be sent. */ if (flags & TCP_SYN) { - 803cbd0: 78fb ldrb r3, [r7, #3] - 803cbd2: f003 0302 and.w r3, r3, #2 - 803cbd6: 2b00 cmp r3, #0 - 803cbd8: d001 beq.n 803cbde + 803cc00: 78fb ldrb r3, [r7, #3] + 803cc02: f003 0302 and.w r3, r3, #2 + 803cc06: 2b00 cmp r3, #0 + 803cc08: d001 beq.n 803cc0e optflags = TF_SEG_OPTS_MSS; - 803cbda: 2301 movs r3, #1 - 803cbdc: 77fb strb r3, [r7, #31] + 803cc0a: 2301 movs r3, #1 + 803cc0c: 77fb strb r3, [r7, #31] /* Make sure the timestamp option is only included in data segments if we agreed about it with the remote host (and in active open SYN segments). */ optflags |= TF_SEG_OPTS_TS; } #endif /* LWIP_TCP_TIMESTAMPS */ optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb); - 803cbde: 7ffb ldrb r3, [r7, #31] - 803cbe0: 009b lsls r3, r3, #2 - 803cbe2: b2db uxtb r3, r3 - 803cbe4: f003 0304 and.w r3, r3, #4 - 803cbe8: 75fb strb r3, [r7, #23] + 803cc0e: 7ffb ldrb r3, [r7, #31] + 803cc10: 009b lsls r3, r3, #2 + 803cc12: b2db uxtb r3, r3 + 803cc14: f003 0304 and.w r3, r3, #4 + 803cc18: 75fb strb r3, [r7, #23] /* Allocate pbuf with room for TCP header + options */ if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { - 803cbea: 7dfb ldrb r3, [r7, #23] - 803cbec: b29b uxth r3, r3 - 803cbee: f44f 7220 mov.w r2, #640 ; 0x280 - 803cbf2: 4619 mov r1, r3 - 803cbf4: 2036 movs r0, #54 ; 0x36 - 803cbf6: f7fa faa5 bl 8037144 - 803cbfa: 6138 str r0, [r7, #16] - 803cbfc: 693b ldr r3, [r7, #16] - 803cbfe: 2b00 cmp r3, #0 - 803cc00: d109 bne.n 803cc16 + 803cc1a: 7dfb ldrb r3, [r7, #23] + 803cc1c: b29b uxth r3, r3 + 803cc1e: f44f 7220 mov.w r2, #640 ; 0x280 + 803cc22: 4619 mov r1, r3 + 803cc24: 2036 movs r0, #54 ; 0x36 + 803cc26: f7fa faa5 bl 8037174 + 803cc2a: 6138 str r0, [r7, #16] + 803cc2c: 693b ldr r3, [r7, #16] + 803cc2e: 2b00 cmp r3, #0 + 803cc30: d109 bne.n 803cc46 tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803cc02: 687b ldr r3, [r7, #4] - 803cc04: 8b5b ldrh r3, [r3, #26] - 803cc06: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803cc0a: b29a uxth r2, r3 - 803cc0c: 687b ldr r3, [r7, #4] - 803cc0e: 835a strh r2, [r3, #26] + 803cc32: 687b ldr r3, [r7, #4] + 803cc34: 8b5b ldrh r3, [r3, #26] + 803cc36: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803cc3a: b29a uxth r2, r3 + 803cc3c: 687b ldr r3, [r7, #4] + 803cc3e: 835a strh r2, [r3, #26] TCP_STATS_INC(tcp.memerr); return ERR_MEM; - 803cc10: f04f 33ff mov.w r3, #4294967295 - 803cc14: e095 b.n 803cd42 + 803cc40: f04f 33ff mov.w r3, #4294967295 + 803cc44: e095 b.n 803cd72 } LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen", - 803cc16: 693b ldr r3, [r7, #16] - 803cc18: 895a ldrh r2, [r3, #10] - 803cc1a: 7dfb ldrb r3, [r7, #23] - 803cc1c: b29b uxth r3, r3 - 803cc1e: 429a cmp r2, r3 - 803cc20: d206 bcs.n 803cc30 - 803cc22: 4b4a ldr r3, [pc, #296] ; (803cd4c ) - 803cc24: f240 4239 movw r2, #1081 ; 0x439 - 803cc28: 494c ldr r1, [pc, #304] ; (803cd5c ) - 803cc2a: 484a ldr r0, [pc, #296] ; (803cd54 ) - 803cc2c: f003 ff58 bl 8040ae0 + 803cc46: 693b ldr r3, [r7, #16] + 803cc48: 895a ldrh r2, [r3, #10] + 803cc4a: 7dfb ldrb r3, [r7, #23] + 803cc4c: b29b uxth r3, r3 + 803cc4e: 429a cmp r2, r3 + 803cc50: d206 bcs.n 803cc60 + 803cc52: 4b4a ldr r3, [pc, #296] ; (803cd7c ) + 803cc54: f240 4239 movw r2, #1081 ; 0x439 + 803cc58: 494c ldr r1, [pc, #304] ; (803cd8c ) + 803cc5a: 484a ldr r0, [pc, #296] ; (803cd84 ) + 803cc5c: f003 ff58 bl 8040b10 (p->len >= optlen)); /* Allocate memory for tcp_seg, and fill in fields. */ if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) { - 803cc30: 687b ldr r3, [r7, #4] - 803cc32: 6dd9 ldr r1, [r3, #92] ; 0x5c - 803cc34: 78fa ldrb r2, [r7, #3] - 803cc36: 7ffb ldrb r3, [r7, #31] - 803cc38: 9300 str r3, [sp, #0] - 803cc3a: 460b mov r3, r1 - 803cc3c: 6939 ldr r1, [r7, #16] - 803cc3e: 6878 ldr r0, [r7, #4] - 803cc40: f7ff f918 bl 803be74 - 803cc44: 60f8 str r0, [r7, #12] - 803cc46: 68fb ldr r3, [r7, #12] - 803cc48: 2b00 cmp r3, #0 - 803cc4a: d109 bne.n 803cc60 + 803cc60: 687b ldr r3, [r7, #4] + 803cc62: 6dd9 ldr r1, [r3, #92] ; 0x5c + 803cc64: 78fa ldrb r2, [r7, #3] + 803cc66: 7ffb ldrb r3, [r7, #31] + 803cc68: 9300 str r3, [sp, #0] + 803cc6a: 460b mov r3, r1 + 803cc6c: 6939 ldr r1, [r7, #16] + 803cc6e: 6878 ldr r0, [r7, #4] + 803cc70: f7ff f918 bl 803bea4 + 803cc74: 60f8 str r0, [r7, #12] + 803cc76: 68fb ldr r3, [r7, #12] + 803cc78: 2b00 cmp r3, #0 + 803cc7a: d109 bne.n 803cc90 tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803cc4c: 687b ldr r3, [r7, #4] - 803cc4e: 8b5b ldrh r3, [r3, #26] - 803cc50: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803cc54: b29a uxth r2, r3 - 803cc56: 687b ldr r3, [r7, #4] - 803cc58: 835a strh r2, [r3, #26] + 803cc7c: 687b ldr r3, [r7, #4] + 803cc7e: 8b5b ldrh r3, [r3, #26] + 803cc80: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803cc84: b29a uxth r2, r3 + 803cc86: 687b ldr r3, [r7, #4] + 803cc88: 835a strh r2, [r3, #26] TCP_STATS_INC(tcp.memerr); return ERR_MEM; - 803cc5a: f04f 33ff mov.w r3, #4294967295 - 803cc5e: e070 b.n 803cd42 + 803cc8a: f04f 33ff mov.w r3, #4294967295 + 803cc8e: e070 b.n 803cd72 } LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % LWIP_MIN(MEM_ALIGNMENT, 4)) == 0); - 803cc60: 68fb ldr r3, [r7, #12] - 803cc62: 68db ldr r3, [r3, #12] - 803cc64: f003 0303 and.w r3, r3, #3 - 803cc68: 2b00 cmp r3, #0 - 803cc6a: d006 beq.n 803cc7a - 803cc6c: 4b37 ldr r3, [pc, #220] ; (803cd4c ) - 803cc6e: f240 4242 movw r2, #1090 ; 0x442 - 803cc72: 493b ldr r1, [pc, #236] ; (803cd60 ) - 803cc74: 4837 ldr r0, [pc, #220] ; (803cd54 ) - 803cc76: f003 ff33 bl 8040ae0 + 803cc90: 68fb ldr r3, [r7, #12] + 803cc92: 68db ldr r3, [r3, #12] + 803cc94: f003 0303 and.w r3, r3, #3 + 803cc98: 2b00 cmp r3, #0 + 803cc9a: d006 beq.n 803ccaa + 803cc9c: 4b37 ldr r3, [pc, #220] ; (803cd7c ) + 803cc9e: f240 4242 movw r2, #1090 ; 0x442 + 803cca2: 493b ldr r1, [pc, #236] ; (803cd90 ) + 803cca4: 4837 ldr r0, [pc, #220] ; (803cd84 ) + 803cca6: f003 ff33 bl 8040b10 LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0); - 803cc7a: 68fb ldr r3, [r7, #12] - 803cc7c: 891b ldrh r3, [r3, #8] - 803cc7e: 2b00 cmp r3, #0 - 803cc80: d006 beq.n 803cc90 - 803cc82: 4b32 ldr r3, [pc, #200] ; (803cd4c ) - 803cc84: f240 4243 movw r2, #1091 ; 0x443 - 803cc88: 4936 ldr r1, [pc, #216] ; (803cd64 ) - 803cc8a: 4832 ldr r0, [pc, #200] ; (803cd54 ) - 803cc8c: f003 ff28 bl 8040ae0 + 803ccaa: 68fb ldr r3, [r7, #12] + 803ccac: 891b ldrh r3, [r3, #8] + 803ccae: 2b00 cmp r3, #0 + 803ccb0: d006 beq.n 803ccc0 + 803ccb2: 4b32 ldr r3, [pc, #200] ; (803cd7c ) + 803ccb4: f240 4243 movw r2, #1091 ; 0x443 + 803ccb8: 4936 ldr r1, [pc, #216] ; (803cd94 ) + 803ccba: 4832 ldr r0, [pc, #200] ; (803cd84 ) + 803ccbc: f003 ff28 bl 8040b10 lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg), (u16_t)flags)); /* Now append seg to pcb->unsent queue */ if (pcb->unsent == NULL) { - 803cc90: 687b ldr r3, [r7, #4] - 803cc92: 6edb ldr r3, [r3, #108] ; 0x6c - 803cc94: 2b00 cmp r3, #0 - 803cc96: d103 bne.n 803cca0 + 803ccc0: 687b ldr r3, [r7, #4] + 803ccc2: 6edb ldr r3, [r3, #108] ; 0x6c + 803ccc4: 2b00 cmp r3, #0 + 803ccc6: d103 bne.n 803ccd0 pcb->unsent = seg; - 803cc98: 687b ldr r3, [r7, #4] - 803cc9a: 68fa ldr r2, [r7, #12] - 803cc9c: 66da str r2, [r3, #108] ; 0x6c - 803cc9e: e00d b.n 803ccbc + 803ccc8: 687b ldr r3, [r7, #4] + 803ccca: 68fa ldr r2, [r7, #12] + 803cccc: 66da str r2, [r3, #108] ; 0x6c + 803ccce: e00d b.n 803ccec } else { struct tcp_seg *useg; for (useg = pcb->unsent; useg->next != NULL; useg = useg->next); - 803cca0: 687b ldr r3, [r7, #4] - 803cca2: 6edb ldr r3, [r3, #108] ; 0x6c - 803cca4: 61bb str r3, [r7, #24] - 803cca6: e002 b.n 803ccae - 803cca8: 69bb ldr r3, [r7, #24] - 803ccaa: 681b ldr r3, [r3, #0] - 803ccac: 61bb str r3, [r7, #24] - 803ccae: 69bb ldr r3, [r7, #24] - 803ccb0: 681b ldr r3, [r3, #0] - 803ccb2: 2b00 cmp r3, #0 - 803ccb4: d1f8 bne.n 803cca8 + 803ccd0: 687b ldr r3, [r7, #4] + 803ccd2: 6edb ldr r3, [r3, #108] ; 0x6c + 803ccd4: 61bb str r3, [r7, #24] + 803ccd6: e002 b.n 803ccde + 803ccd8: 69bb ldr r3, [r7, #24] + 803ccda: 681b ldr r3, [r3, #0] + 803ccdc: 61bb str r3, [r7, #24] + 803ccde: 69bb ldr r3, [r7, #24] + 803cce0: 681b ldr r3, [r3, #0] + 803cce2: 2b00 cmp r3, #0 + 803cce4: d1f8 bne.n 803ccd8 useg->next = seg; - 803ccb6: 69bb ldr r3, [r7, #24] - 803ccb8: 68fa ldr r2, [r7, #12] - 803ccba: 601a str r2, [r3, #0] + 803cce6: 69bb ldr r3, [r7, #24] + 803cce8: 68fa ldr r2, [r7, #12] + 803ccea: 601a str r2, [r3, #0] } #if TCP_OVERSIZE /* The new unsent tail has no space */ pcb->unsent_oversize = 0; - 803ccbc: 687b ldr r3, [r7, #4] - 803ccbe: 2200 movs r2, #0 - 803ccc0: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803ccec: 687b ldr r3, [r7, #4] + 803ccee: 2200 movs r2, #0 + 803ccf0: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 #endif /* TCP_OVERSIZE */ /* SYN and FIN bump the sequence number */ if ((flags & TCP_SYN) || (flags & TCP_FIN)) { - 803ccc4: 78fb ldrb r3, [r7, #3] - 803ccc6: f003 0302 and.w r3, r3, #2 - 803ccca: 2b00 cmp r3, #0 - 803cccc: d104 bne.n 803ccd8 - 803ccce: 78fb ldrb r3, [r7, #3] - 803ccd0: f003 0301 and.w r3, r3, #1 - 803ccd4: 2b00 cmp r3, #0 - 803ccd6: d004 beq.n 803cce2 + 803ccf4: 78fb ldrb r3, [r7, #3] + 803ccf6: f003 0302 and.w r3, r3, #2 + 803ccfa: 2b00 cmp r3, #0 + 803ccfc: d104 bne.n 803cd08 + 803ccfe: 78fb ldrb r3, [r7, #3] + 803cd00: f003 0301 and.w r3, r3, #1 + 803cd04: 2b00 cmp r3, #0 + 803cd06: d004 beq.n 803cd12 pcb->snd_lbb++; - 803ccd8: 687b ldr r3, [r7, #4] - 803ccda: 6ddb ldr r3, [r3, #92] ; 0x5c - 803ccdc: 1c5a adds r2, r3, #1 - 803ccde: 687b ldr r3, [r7, #4] - 803cce0: 65da str r2, [r3, #92] ; 0x5c + 803cd08: 687b ldr r3, [r7, #4] + 803cd0a: 6ddb ldr r3, [r3, #92] ; 0x5c + 803cd0c: 1c5a adds r2, r3, #1 + 803cd0e: 687b ldr r3, [r7, #4] + 803cd10: 65da str r2, [r3, #92] ; 0x5c /* optlen does not influence snd_buf */ } if (flags & TCP_FIN) { - 803cce2: 78fb ldrb r3, [r7, #3] - 803cce4: f003 0301 and.w r3, r3, #1 - 803cce8: 2b00 cmp r3, #0 - 803ccea: d006 beq.n 803ccfa + 803cd12: 78fb ldrb r3, [r7, #3] + 803cd14: f003 0301 and.w r3, r3, #1 + 803cd18: 2b00 cmp r3, #0 + 803cd1a: d006 beq.n 803cd2a tcp_set_flags(pcb, TF_FIN); - 803ccec: 687b ldr r3, [r7, #4] - 803ccee: 8b5b ldrh r3, [r3, #26] - 803ccf0: f043 0320 orr.w r3, r3, #32 - 803ccf4: b29a uxth r2, r3 - 803ccf6: 687b ldr r3, [r7, #4] - 803ccf8: 835a strh r2, [r3, #26] + 803cd1c: 687b ldr r3, [r7, #4] + 803cd1e: 8b5b ldrh r3, [r3, #26] + 803cd20: f043 0320 orr.w r3, r3, #32 + 803cd24: b29a uxth r2, r3 + 803cd26: 687b ldr r3, [r7, #4] + 803cd28: 835a strh r2, [r3, #26] } /* update number of segments on the queues */ pcb->snd_queuelen += pbuf_clen(seg->p); - 803ccfa: 68fb ldr r3, [r7, #12] - 803ccfc: 685b ldr r3, [r3, #4] - 803ccfe: 4618 mov r0, r3 - 803cd00: f7fa fd8c bl 803781c - 803cd04: 4603 mov r3, r0 - 803cd06: 461a mov r2, r3 - 803cd08: 687b ldr r3, [r7, #4] - 803cd0a: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803cd0e: 4413 add r3, r2 - 803cd10: b29a uxth r2, r3 - 803cd12: 687b ldr r3, [r7, #4] - 803cd14: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803cd2a: 68fb ldr r3, [r7, #12] + 803cd2c: 685b ldr r3, [r3, #4] + 803cd2e: 4618 mov r0, r3 + 803cd30: f7fa fd8c bl 803784c + 803cd34: 4603 mov r3, r0 + 803cd36: 461a mov r2, r3 + 803cd38: 687b ldr r3, [r7, #4] + 803cd3a: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803cd3e: 4413 add r3, r2 + 803cd40: b29a uxth r2, r3 + 803cd42: 687b ldr r3, [r7, #4] + 803cd44: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen)); if (pcb->snd_queuelen != 0) { - 803cd18: 687b ldr r3, [r7, #4] - 803cd1a: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803cd1e: 2b00 cmp r3, #0 - 803cd20: d00e beq.n 803cd40 + 803cd48: 687b ldr r3, [r7, #4] + 803cd4a: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803cd4e: 2b00 cmp r3, #0 + 803cd50: d00e beq.n 803cd70 LWIP_ASSERT("tcp_enqueue_flags: invalid queue length", - 803cd22: 687b ldr r3, [r7, #4] - 803cd24: 6f1b ldr r3, [r3, #112] ; 0x70 - 803cd26: 2b00 cmp r3, #0 - 803cd28: d10a bne.n 803cd40 - 803cd2a: 687b ldr r3, [r7, #4] - 803cd2c: 6edb ldr r3, [r3, #108] ; 0x6c - 803cd2e: 2b00 cmp r3, #0 - 803cd30: d106 bne.n 803cd40 - 803cd32: 4b06 ldr r3, [pc, #24] ; (803cd4c ) - 803cd34: f240 4265 movw r2, #1125 ; 0x465 - 803cd38: 490b ldr r1, [pc, #44] ; (803cd68 ) - 803cd3a: 4806 ldr r0, [pc, #24] ; (803cd54 ) - 803cd3c: f003 fed0 bl 8040ae0 + 803cd52: 687b ldr r3, [r7, #4] + 803cd54: 6f1b ldr r3, [r3, #112] ; 0x70 + 803cd56: 2b00 cmp r3, #0 + 803cd58: d10a bne.n 803cd70 + 803cd5a: 687b ldr r3, [r7, #4] + 803cd5c: 6edb ldr r3, [r3, #108] ; 0x6c + 803cd5e: 2b00 cmp r3, #0 + 803cd60: d106 bne.n 803cd70 + 803cd62: 4b06 ldr r3, [pc, #24] ; (803cd7c ) + 803cd64: f240 4265 movw r2, #1125 ; 0x465 + 803cd68: 490b ldr r1, [pc, #44] ; (803cd98 ) + 803cd6a: 4806 ldr r0, [pc, #24] ; (803cd84 ) + 803cd6c: f003 fed0 bl 8040b10 pcb->unacked != NULL || pcb->unsent != NULL); } return ERR_OK; - 803cd40: 2300 movs r3, #0 -} - 803cd42: 4618 mov r0, r3 - 803cd44: 3720 adds r7, #32 - 803cd46: 46bd mov sp, r7 - 803cd48: bd80 pop {r7, pc} - 803cd4a: bf00 nop - 803cd4c: 08043950 .word 0x08043950 - 803cd50: 08043d74 .word 0x08043d74 - 803cd54: 080439a4 .word 0x080439a4 - 803cd58: 08043dcc .word 0x08043dcc - 803cd5c: 08043dec .word 0x08043dec - 803cd60: 08043e28 .word 0x08043e28 - 803cd64: 08043e40 .word 0x08043e40 - 803cd68: 08043e6c .word 0x08043e6c - -0803cd6c : + 803cd70: 2300 movs r3, #0 +} + 803cd72: 4618 mov r0, r3 + 803cd74: 3720 adds r7, #32 + 803cd76: 46bd mov sp, r7 + 803cd78: bd80 pop {r7, pc} + 803cd7a: bf00 nop + 803cd7c: 08043980 .word 0x08043980 + 803cd80: 08043da4 .word 0x08043da4 + 803cd84: 080439d4 .word 0x080439d4 + 803cd88: 08043dfc .word 0x08043dfc + 803cd8c: 08043e1c .word 0x08043e1c + 803cd90: 08043e58 .word 0x08043e58 + 803cd94: 08043e70 .word 0x08043e70 + 803cd98: 08043e9c .word 0x08043e9c + +0803cd9c : * @return ERR_OK if data has been sent or nothing to send * another err_t on error */ err_t tcp_output(struct tcp_pcb *pcb) { - 803cd6c: b5b0 push {r4, r5, r7, lr} - 803cd6e: b08a sub sp, #40 ; 0x28 - 803cd70: af00 add r7, sp, #0 - 803cd72: 6078 str r0, [r7, #4] + 803cd9c: b5b0 push {r4, r5, r7, lr} + 803cd9e: b08a sub sp, #40 ; 0x28 + 803cda0: af00 add r7, sp, #0 + 803cda2: 6078 str r0, [r7, #4] s16_t i = 0; #endif /* TCP_CWND_DEBUG */ LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("tcp_output: invalid pcb", pcb != NULL); - 803cd74: 687b ldr r3, [r7, #4] - 803cd76: 2b00 cmp r3, #0 - 803cd78: d106 bne.n 803cd88 - 803cd7a: 4b8a ldr r3, [pc, #552] ; (803cfa4 ) - 803cd7c: f240 42e1 movw r2, #1249 ; 0x4e1 - 803cd80: 4989 ldr r1, [pc, #548] ; (803cfa8 ) - 803cd82: 488a ldr r0, [pc, #552] ; (803cfac ) - 803cd84: f003 feac bl 8040ae0 + 803cda4: 687b ldr r3, [r7, #4] + 803cda6: 2b00 cmp r3, #0 + 803cda8: d106 bne.n 803cdb8 + 803cdaa: 4b8a ldr r3, [pc, #552] ; (803cfd4 ) + 803cdac: f240 42e1 movw r2, #1249 ; 0x4e1 + 803cdb0: 4989 ldr r1, [pc, #548] ; (803cfd8 ) + 803cdb2: 488a ldr r0, [pc, #552] ; (803cfdc ) + 803cdb4: f003 feac bl 8040b10 /* pcb->state LISTEN not allowed here */ LWIP_ASSERT("don't call tcp_output for listen-pcbs", - 803cd88: 687b ldr r3, [r7, #4] - 803cd8a: 7d1b ldrb r3, [r3, #20] - 803cd8c: 2b01 cmp r3, #1 - 803cd8e: d106 bne.n 803cd9e - 803cd90: 4b84 ldr r3, [pc, #528] ; (803cfa4 ) - 803cd92: f240 42e3 movw r2, #1251 ; 0x4e3 - 803cd96: 4986 ldr r1, [pc, #536] ; (803cfb0 ) - 803cd98: 4884 ldr r0, [pc, #528] ; (803cfac ) - 803cd9a: f003 fea1 bl 8040ae0 + 803cdb8: 687b ldr r3, [r7, #4] + 803cdba: 7d1b ldrb r3, [r3, #20] + 803cdbc: 2b01 cmp r3, #1 + 803cdbe: d106 bne.n 803cdce + 803cdc0: 4b84 ldr r3, [pc, #528] ; (803cfd4 ) + 803cdc2: f240 42e3 movw r2, #1251 ; 0x4e3 + 803cdc6: 4986 ldr r1, [pc, #536] ; (803cfe0 ) + 803cdc8: 4884 ldr r0, [pc, #528] ; (803cfdc ) + 803cdca: f003 fea1 bl 8040b10 /* First, check if we are invoked by the TCP input processing code. If so, we do not output anything. Instead, we rely on the input processing code to call us when input processing is done with. */ if (tcp_input_pcb == pcb) { - 803cd9e: 4b85 ldr r3, [pc, #532] ; (803cfb4 ) - 803cda0: 681b ldr r3, [r3, #0] - 803cda2: 687a ldr r2, [r7, #4] - 803cda4: 429a cmp r2, r3 - 803cda6: d101 bne.n 803cdac + 803cdce: 4b85 ldr r3, [pc, #532] ; (803cfe4 ) + 803cdd0: 681b ldr r3, [r3, #0] + 803cdd2: 687a ldr r2, [r7, #4] + 803cdd4: 429a cmp r2, r3 + 803cdd6: d101 bne.n 803cddc return ERR_OK; - 803cda8: 2300 movs r3, #0 - 803cdaa: e1ce b.n 803d14a + 803cdd8: 2300 movs r3, #0 + 803cdda: e1ce b.n 803d17a } wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd); - 803cdac: 687b ldr r3, [r7, #4] - 803cdae: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803cdb2: 687b ldr r3, [r7, #4] - 803cdb4: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803cdb8: 4293 cmp r3, r2 - 803cdba: bf28 it cs - 803cdbc: 4613 movcs r3, r2 - 803cdbe: b29b uxth r3, r3 - 803cdc0: 61bb str r3, [r7, #24] + 803cddc: 687b ldr r3, [r7, #4] + 803cdde: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803cde2: 687b ldr r3, [r7, #4] + 803cde4: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803cde8: 4293 cmp r3, r2 + 803cdea: bf28 it cs + 803cdec: 4613 movcs r3, r2 + 803cdee: b29b uxth r3, r3 + 803cdf0: 61bb str r3, [r7, #24] seg = pcb->unsent; - 803cdc2: 687b ldr r3, [r7, #4] - 803cdc4: 6edb ldr r3, [r3, #108] ; 0x6c - 803cdc6: 627b str r3, [r7, #36] ; 0x24 + 803cdf2: 687b ldr r3, [r7, #4] + 803cdf4: 6edb ldr r3, [r3, #108] ; 0x6c + 803cdf6: 627b str r3, [r7, #36] ; 0x24 if (seg == NULL) { - 803cdc8: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cdca: 2b00 cmp r3, #0 - 803cdcc: d10b bne.n 803cde6 + 803cdf8: 6a7b ldr r3, [r7, #36] ; 0x24 + 803cdfa: 2b00 cmp r3, #0 + 803cdfc: d10b bne.n 803ce16 ", seg == NULL, ack %"U32_F"\n", pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack)); /* If the TF_ACK_NOW flag is set and the ->unsent queue is empty, construct * an empty ACK segment and send it. */ if (pcb->flags & TF_ACK_NOW) { - 803cdce: 687b ldr r3, [r7, #4] - 803cdd0: 8b5b ldrh r3, [r3, #26] - 803cdd2: f003 0302 and.w r3, r3, #2 - 803cdd6: 2b00 cmp r3, #0 - 803cdd8: f000 81aa beq.w 803d130 + 803cdfe: 687b ldr r3, [r7, #4] + 803ce00: 8b5b ldrh r3, [r3, #26] + 803ce02: f003 0302 and.w r3, r3, #2 + 803ce06: 2b00 cmp r3, #0 + 803ce08: f000 81aa beq.w 803d160 return tcp_send_empty_ack(pcb); - 803cddc: 6878 ldr r0, [r7, #4] - 803cdde: f000 fdcb bl 803d978 - 803cde2: 4603 mov r3, r0 - 803cde4: e1b1 b.n 803d14a + 803ce0c: 6878 ldr r0, [r7, #4] + 803ce0e: f000 fdcb bl 803d9a8 + 803ce12: 4603 mov r3, r0 + 803ce14: e1b1 b.n 803d17a pcb->snd_wnd, pcb->cwnd, wnd, lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len, lwip_ntohl(seg->tcphdr->seqno), pcb->lastack)); } netif = tcp_route(pcb, &pcb->local_ip, &pcb->remote_ip); - 803cde6: 6879 ldr r1, [r7, #4] - 803cde8: 687b ldr r3, [r7, #4] - 803cdea: 3304 adds r3, #4 - 803cdec: 461a mov r2, r3 - 803cdee: 6878 ldr r0, [r7, #4] - 803cdf0: f7ff f824 bl 803be3c - 803cdf4: 6178 str r0, [r7, #20] + 803ce16: 6879 ldr r1, [r7, #4] + 803ce18: 687b ldr r3, [r7, #4] + 803ce1a: 3304 adds r3, #4 + 803ce1c: 461a mov r2, r3 + 803ce1e: 6878 ldr r0, [r7, #4] + 803ce20: f7ff f824 bl 803be6c + 803ce24: 6178 str r0, [r7, #20] if (netif == NULL) { - 803cdf6: 697b ldr r3, [r7, #20] - 803cdf8: 2b00 cmp r3, #0 - 803cdfa: d102 bne.n 803ce02 + 803ce26: 697b ldr r3, [r7, #20] + 803ce28: 2b00 cmp r3, #0 + 803ce2a: d102 bne.n 803ce32 return ERR_RTE; - 803cdfc: f06f 0303 mvn.w r3, #3 - 803ce00: e1a3 b.n 803d14a + 803ce2c: f06f 0303 mvn.w r3, #3 + 803ce30: e1a3 b.n 803d17a } /* If we don't have a local IP address, we get one from netif */ if (ip_addr_isany(&pcb->local_ip)) { - 803ce02: 687b ldr r3, [r7, #4] - 803ce04: 2b00 cmp r3, #0 - 803ce06: d003 beq.n 803ce10 - 803ce08: 687b ldr r3, [r7, #4] - 803ce0a: 681b ldr r3, [r3, #0] - 803ce0c: 2b00 cmp r3, #0 - 803ce0e: d111 bne.n 803ce34 + 803ce32: 687b ldr r3, [r7, #4] + 803ce34: 2b00 cmp r3, #0 + 803ce36: d003 beq.n 803ce40 + 803ce38: 687b ldr r3, [r7, #4] + 803ce3a: 681b ldr r3, [r3, #0] + 803ce3c: 2b00 cmp r3, #0 + 803ce3e: d111 bne.n 803ce64 const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, &pcb->remote_ip); - 803ce10: 697b ldr r3, [r7, #20] - 803ce12: 2b00 cmp r3, #0 - 803ce14: d002 beq.n 803ce1c - 803ce16: 697b ldr r3, [r7, #20] - 803ce18: 3304 adds r3, #4 - 803ce1a: e000 b.n 803ce1e - 803ce1c: 2300 movs r3, #0 - 803ce1e: 613b str r3, [r7, #16] + 803ce40: 697b ldr r3, [r7, #20] + 803ce42: 2b00 cmp r3, #0 + 803ce44: d002 beq.n 803ce4c + 803ce46: 697b ldr r3, [r7, #20] + 803ce48: 3304 adds r3, #4 + 803ce4a: e000 b.n 803ce4e + 803ce4c: 2300 movs r3, #0 + 803ce4e: 613b str r3, [r7, #16] if (local_ip == NULL) { - 803ce20: 693b ldr r3, [r7, #16] - 803ce22: 2b00 cmp r3, #0 - 803ce24: d102 bne.n 803ce2c + 803ce50: 693b ldr r3, [r7, #16] + 803ce52: 2b00 cmp r3, #0 + 803ce54: d102 bne.n 803ce5c return ERR_RTE; - 803ce26: f06f 0303 mvn.w r3, #3 - 803ce2a: e18e b.n 803d14a + 803ce56: f06f 0303 mvn.w r3, #3 + 803ce5a: e18e b.n 803d17a } ip_addr_copy(pcb->local_ip, *local_ip); - 803ce2c: 693b ldr r3, [r7, #16] - 803ce2e: 681a ldr r2, [r3, #0] - 803ce30: 687b ldr r3, [r7, #4] - 803ce32: 601a str r2, [r3, #0] + 803ce5c: 693b ldr r3, [r7, #16] + 803ce5e: 681a ldr r2, [r3, #0] + 803ce60: 687b ldr r3, [r7, #4] + 803ce62: 601a str r2, [r3, #0] } /* Handle the current segment not fitting within the window */ if (lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd) { - 803ce34: 6a7b ldr r3, [r7, #36] ; 0x24 - 803ce36: 68db ldr r3, [r3, #12] - 803ce38: 685b ldr r3, [r3, #4] - 803ce3a: 4618 mov r0, r3 - 803ce3c: f7f9 f849 bl 8035ed2 - 803ce40: 4602 mov r2, r0 - 803ce42: 687b ldr r3, [r7, #4] - 803ce44: 6c5b ldr r3, [r3, #68] ; 0x44 - 803ce46: 1ad3 subs r3, r2, r3 - 803ce48: 6a7a ldr r2, [r7, #36] ; 0x24 - 803ce4a: 8912 ldrh r2, [r2, #8] - 803ce4c: 4413 add r3, r2 - 803ce4e: 69ba ldr r2, [r7, #24] - 803ce50: 429a cmp r2, r3 - 803ce52: d227 bcs.n 803cea4 + 803ce64: 6a7b ldr r3, [r7, #36] ; 0x24 + 803ce66: 68db ldr r3, [r3, #12] + 803ce68: 685b ldr r3, [r3, #4] + 803ce6a: 4618 mov r0, r3 + 803ce6c: f7f9 f849 bl 8035f02 + 803ce70: 4602 mov r2, r0 + 803ce72: 687b ldr r3, [r7, #4] + 803ce74: 6c5b ldr r3, [r3, #68] ; 0x44 + 803ce76: 1ad3 subs r3, r2, r3 + 803ce78: 6a7a ldr r2, [r7, #36] ; 0x24 + 803ce7a: 8912 ldrh r2, [r2, #8] + 803ce7c: 4413 add r3, r2 + 803ce7e: 69ba ldr r2, [r7, #24] + 803ce80: 429a cmp r2, r3 + 803ce82: d227 bcs.n 803ced4 * within the remaining (could be 0) send window and RTO timer is not running (we * have no in-flight data). If window is still too small after persist timer fires, * then we split the segment. We don't consider the congestion window since a cwnd * smaller than 1 SMSS implies in-flight data */ if (wnd == pcb->snd_wnd && pcb->unacked == NULL && pcb->persist_backoff == 0) { - 803ce54: 687b ldr r3, [r7, #4] - 803ce56: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803ce5a: 461a mov r2, r3 - 803ce5c: 69bb ldr r3, [r7, #24] - 803ce5e: 4293 cmp r3, r2 - 803ce60: d114 bne.n 803ce8c - 803ce62: 687b ldr r3, [r7, #4] - 803ce64: 6f1b ldr r3, [r3, #112] ; 0x70 - 803ce66: 2b00 cmp r3, #0 - 803ce68: d110 bne.n 803ce8c - 803ce6a: 687b ldr r3, [r7, #4] - 803ce6c: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 803ce70: 2b00 cmp r3, #0 - 803ce72: d10b bne.n 803ce8c + 803ce84: 687b ldr r3, [r7, #4] + 803ce86: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803ce8a: 461a mov r2, r3 + 803ce8c: 69bb ldr r3, [r7, #24] + 803ce8e: 4293 cmp r3, r2 + 803ce90: d114 bne.n 803cebc + 803ce92: 687b ldr r3, [r7, #4] + 803ce94: 6f1b ldr r3, [r3, #112] ; 0x70 + 803ce96: 2b00 cmp r3, #0 + 803ce98: d110 bne.n 803cebc + 803ce9a: 687b ldr r3, [r7, #4] + 803ce9c: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 803cea0: 2b00 cmp r3, #0 + 803cea2: d10b bne.n 803cebc pcb->persist_cnt = 0; - 803ce74: 687b ldr r3, [r7, #4] - 803ce76: 2200 movs r2, #0 - 803ce78: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 803cea4: 687b ldr r3, [r7, #4] + 803cea6: 2200 movs r2, #0 + 803cea8: f883 2098 strb.w r2, [r3, #152] ; 0x98 pcb->persist_backoff = 1; - 803ce7c: 687b ldr r3, [r7, #4] - 803ce7e: 2201 movs r2, #1 - 803ce80: f883 2099 strb.w r2, [r3, #153] ; 0x99 + 803ceac: 687b ldr r3, [r7, #4] + 803ceae: 2201 movs r2, #1 + 803ceb0: f883 2099 strb.w r2, [r3, #153] ; 0x99 pcb->persist_probe = 0; - 803ce84: 687b ldr r3, [r7, #4] - 803ce86: 2200 movs r2, #0 - 803ce88: f883 209a strb.w r2, [r3, #154] ; 0x9a + 803ceb4: 687b ldr r3, [r7, #4] + 803ceb6: 2200 movs r2, #0 + 803ceb8: f883 209a strb.w r2, [r3, #154] ; 0x9a } /* We need an ACK, but can't send data now, so send an empty ACK */ if (pcb->flags & TF_ACK_NOW) { - 803ce8c: 687b ldr r3, [r7, #4] - 803ce8e: 8b5b ldrh r3, [r3, #26] - 803ce90: f003 0302 and.w r3, r3, #2 - 803ce94: 2b00 cmp r3, #0 - 803ce96: f000 814d beq.w 803d134 + 803cebc: 687b ldr r3, [r7, #4] + 803cebe: 8b5b ldrh r3, [r3, #26] + 803cec0: f003 0302 and.w r3, r3, #2 + 803cec4: 2b00 cmp r3, #0 + 803cec6: f000 814d beq.w 803d164 return tcp_send_empty_ack(pcb); - 803ce9a: 6878 ldr r0, [r7, #4] - 803ce9c: f000 fd6c bl 803d978 - 803cea0: 4603 mov r3, r0 - 803cea2: e152 b.n 803d14a + 803ceca: 6878 ldr r0, [r7, #4] + 803cecc: f000 fd6c bl 803d9a8 + 803ced0: 4603 mov r3, r0 + 803ced2: e152 b.n 803d17a } goto output_done; } /* Stop persist timer, above conditions are not active */ pcb->persist_backoff = 0; - 803cea4: 687b ldr r3, [r7, #4] - 803cea6: 2200 movs r2, #0 - 803cea8: f883 2099 strb.w r2, [r3, #153] ; 0x99 + 803ced4: 687b ldr r3, [r7, #4] + 803ced6: 2200 movs r2, #0 + 803ced8: f883 2099 strb.w r2, [r3, #153] ; 0x99 /* useg should point to last segment on unacked queue */ useg = pcb->unacked; - 803ceac: 687b ldr r3, [r7, #4] - 803ceae: 6f1b ldr r3, [r3, #112] ; 0x70 - 803ceb0: 623b str r3, [r7, #32] + 803cedc: 687b ldr r3, [r7, #4] + 803cede: 6f1b ldr r3, [r3, #112] ; 0x70 + 803cee0: 623b str r3, [r7, #32] if (useg != NULL) { - 803ceb2: 6a3b ldr r3, [r7, #32] - 803ceb4: 2b00 cmp r3, #0 - 803ceb6: f000 811c beq.w 803d0f2 + 803cee2: 6a3b ldr r3, [r7, #32] + 803cee4: 2b00 cmp r3, #0 + 803cee6: f000 811c beq.w 803d122 for (; useg->next != NULL; useg = useg->next); - 803ceba: e002 b.n 803cec2 - 803cebc: 6a3b ldr r3, [r7, #32] - 803cebe: 681b ldr r3, [r3, #0] - 803cec0: 623b str r3, [r7, #32] - 803cec2: 6a3b ldr r3, [r7, #32] - 803cec4: 681b ldr r3, [r3, #0] - 803cec6: 2b00 cmp r3, #0 - 803cec8: d1f8 bne.n 803cebc + 803ceea: e002 b.n 803cef2 + 803ceec: 6a3b ldr r3, [r7, #32] + 803ceee: 681b ldr r3, [r3, #0] + 803cef0: 623b str r3, [r7, #32] + 803cef2: 6a3b ldr r3, [r7, #32] + 803cef4: 681b ldr r3, [r3, #0] + 803cef6: 2b00 cmp r3, #0 + 803cef8: d1f8 bne.n 803ceec } /* data available and window allows it to be sent? */ while (seg != NULL && - 803ceca: e112 b.n 803d0f2 + 803cefa: e112 b.n 803d122 lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) { LWIP_ASSERT("RST not expected here!", - 803cecc: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cece: 68db ldr r3, [r3, #12] - 803ced0: 899b ldrh r3, [r3, #12] - 803ced2: b29b uxth r3, r3 - 803ced4: 4618 mov r0, r3 - 803ced6: f7f8 ffe7 bl 8035ea8 - 803ceda: 4603 mov r3, r0 - 803cedc: b2db uxtb r3, r3 - 803cede: f003 0304 and.w r3, r3, #4 - 803cee2: 2b00 cmp r3, #0 - 803cee4: d006 beq.n 803cef4 - 803cee6: 4b2f ldr r3, [pc, #188] ; (803cfa4 ) - 803cee8: f240 5236 movw r2, #1334 ; 0x536 - 803ceec: 4932 ldr r1, [pc, #200] ; (803cfb8 ) - 803ceee: 482f ldr r0, [pc, #188] ; (803cfac ) - 803cef0: f003 fdf6 bl 8040ae0 + 803cefc: 6a7b ldr r3, [r7, #36] ; 0x24 + 803cefe: 68db ldr r3, [r3, #12] + 803cf00: 899b ldrh r3, [r3, #12] + 803cf02: b29b uxth r3, r3 + 803cf04: 4618 mov r0, r3 + 803cf06: f7f8 ffe7 bl 8035ed8 + 803cf0a: 4603 mov r3, r0 + 803cf0c: b2db uxtb r3, r3 + 803cf0e: f003 0304 and.w r3, r3, #4 + 803cf12: 2b00 cmp r3, #0 + 803cf14: d006 beq.n 803cf24 + 803cf16: 4b2f ldr r3, [pc, #188] ; (803cfd4 ) + 803cf18: f240 5236 movw r2, #1334 ; 0x536 + 803cf1c: 4932 ldr r1, [pc, #200] ; (803cfe8 ) + 803cf1e: 482f ldr r0, [pc, #188] ; (803cfdc ) + 803cf20: f003 fdf6 bl 8040b10 * - if tcp_write had a memory error before (prevent delayed ACK timeout) or * - if FIN was already enqueued for this PCB (SYN is always alone in a segment - * either seg->next != NULL or pcb->unacked == NULL; * RST is no sent using tcp_write/tcp_output. */ if ((tcp_do_output_nagle(pcb) == 0) && - 803cef4: 687b ldr r3, [r7, #4] - 803cef6: 6f1b ldr r3, [r3, #112] ; 0x70 - 803cef8: 2b00 cmp r3, #0 - 803cefa: d01f beq.n 803cf3c - 803cefc: 687b ldr r3, [r7, #4] - 803cefe: 8b5b ldrh r3, [r3, #26] - 803cf00: f003 0344 and.w r3, r3, #68 ; 0x44 - 803cf04: 2b00 cmp r3, #0 - 803cf06: d119 bne.n 803cf3c - 803cf08: 687b ldr r3, [r7, #4] - 803cf0a: 6edb ldr r3, [r3, #108] ; 0x6c - 803cf0c: 2b00 cmp r3, #0 - 803cf0e: d00b beq.n 803cf28 - 803cf10: 687b ldr r3, [r7, #4] - 803cf12: 6edb ldr r3, [r3, #108] ; 0x6c - 803cf14: 681b ldr r3, [r3, #0] - 803cf16: 2b00 cmp r3, #0 - 803cf18: d110 bne.n 803cf3c - 803cf1a: 687b ldr r3, [r7, #4] - 803cf1c: 6edb ldr r3, [r3, #108] ; 0x6c - 803cf1e: 891a ldrh r2, [r3, #8] - 803cf20: 687b ldr r3, [r7, #4] - 803cf22: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803cf24: 429a cmp r2, r3 - 803cf26: d209 bcs.n 803cf3c - 803cf28: 687b ldr r3, [r7, #4] - 803cf2a: f8b3 3064 ldrh.w r3, [r3, #100] ; 0x64 - 803cf2e: 2b00 cmp r3, #0 - 803cf30: d004 beq.n 803cf3c - 803cf32: 687b ldr r3, [r7, #4] - 803cf34: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803cf38: 2b08 cmp r3, #8 - 803cf3a: d901 bls.n 803cf40 - 803cf3c: 2301 movs r3, #1 - 803cf3e: e000 b.n 803cf42 - 803cf40: 2300 movs r3, #0 - 803cf42: 2b00 cmp r3, #0 - 803cf44: d106 bne.n 803cf54 + 803cf24: 687b ldr r3, [r7, #4] + 803cf26: 6f1b ldr r3, [r3, #112] ; 0x70 + 803cf28: 2b00 cmp r3, #0 + 803cf2a: d01f beq.n 803cf6c + 803cf2c: 687b ldr r3, [r7, #4] + 803cf2e: 8b5b ldrh r3, [r3, #26] + 803cf30: f003 0344 and.w r3, r3, #68 ; 0x44 + 803cf34: 2b00 cmp r3, #0 + 803cf36: d119 bne.n 803cf6c + 803cf38: 687b ldr r3, [r7, #4] + 803cf3a: 6edb ldr r3, [r3, #108] ; 0x6c + 803cf3c: 2b00 cmp r3, #0 + 803cf3e: d00b beq.n 803cf58 + 803cf40: 687b ldr r3, [r7, #4] + 803cf42: 6edb ldr r3, [r3, #108] ; 0x6c + 803cf44: 681b ldr r3, [r3, #0] + 803cf46: 2b00 cmp r3, #0 + 803cf48: d110 bne.n 803cf6c + 803cf4a: 687b ldr r3, [r7, #4] + 803cf4c: 6edb ldr r3, [r3, #108] ; 0x6c + 803cf4e: 891a ldrh r2, [r3, #8] + 803cf50: 687b ldr r3, [r7, #4] + 803cf52: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803cf54: 429a cmp r2, r3 + 803cf56: d209 bcs.n 803cf6c + 803cf58: 687b ldr r3, [r7, #4] + 803cf5a: f8b3 3064 ldrh.w r3, [r3, #100] ; 0x64 + 803cf5e: 2b00 cmp r3, #0 + 803cf60: d004 beq.n 803cf6c + 803cf62: 687b ldr r3, [r7, #4] + 803cf64: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803cf68: 2b08 cmp r3, #8 + 803cf6a: d901 bls.n 803cf70 + 803cf6c: 2301 movs r3, #1 + 803cf6e: e000 b.n 803cf72 + 803cf70: 2300 movs r3, #0 + 803cf72: 2b00 cmp r3, #0 + 803cf74: d106 bne.n 803cf84 ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)) { - 803cf46: 687b ldr r3, [r7, #4] - 803cf48: 8b5b ldrh r3, [r3, #26] - 803cf4a: f003 03a0 and.w r3, r3, #160 ; 0xa0 + 803cf76: 687b ldr r3, [r7, #4] + 803cf78: 8b5b ldrh r3, [r3, #26] + 803cf7a: f003 03a0 and.w r3, r3, #160 ; 0xa0 if ((tcp_do_output_nagle(pcb) == 0) && - 803cf4e: 2b00 cmp r3, #0 - 803cf50: f000 80e4 beq.w 803d11c + 803cf7e: 2b00 cmp r3, #0 + 803cf80: f000 80e4 beq.w 803d14c pcb->lastack, lwip_ntohl(seg->tcphdr->seqno), pcb->lastack, i)); ++i; #endif /* TCP_CWND_DEBUG */ if (pcb->state != SYN_SENT) { - 803cf54: 687b ldr r3, [r7, #4] - 803cf56: 7d1b ldrb r3, [r3, #20] - 803cf58: 2b02 cmp r3, #2 - 803cf5a: d00d beq.n 803cf78 + 803cf84: 687b ldr r3, [r7, #4] + 803cf86: 7d1b ldrb r3, [r3, #20] + 803cf88: 2b02 cmp r3, #2 + 803cf8a: d00d beq.n 803cfa8 TCPH_SET_FLAG(seg->tcphdr, TCP_ACK); - 803cf5c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cf5e: 68db ldr r3, [r3, #12] - 803cf60: 899b ldrh r3, [r3, #12] - 803cf62: b29c uxth r4, r3 - 803cf64: 2010 movs r0, #16 - 803cf66: f7f8 ff9f bl 8035ea8 - 803cf6a: 4603 mov r3, r0 - 803cf6c: 461a mov r2, r3 - 803cf6e: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cf70: 68db ldr r3, [r3, #12] - 803cf72: 4322 orrs r2, r4 - 803cf74: b292 uxth r2, r2 - 803cf76: 819a strh r2, [r3, #12] + 803cf8c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803cf8e: 68db ldr r3, [r3, #12] + 803cf90: 899b ldrh r3, [r3, #12] + 803cf92: b29c uxth r4, r3 + 803cf94: 2010 movs r0, #16 + 803cf96: f7f8 ff9f bl 8035ed8 + 803cf9a: 4603 mov r3, r0 + 803cf9c: 461a mov r2, r3 + 803cf9e: 6a7b ldr r3, [r7, #36] ; 0x24 + 803cfa0: 68db ldr r3, [r3, #12] + 803cfa2: 4322 orrs r2, r4 + 803cfa4: b292 uxth r2, r2 + 803cfa6: 819a strh r2, [r3, #12] } err = tcp_output_segment(seg, pcb, netif); - 803cf78: 697a ldr r2, [r7, #20] - 803cf7a: 6879 ldr r1, [r7, #4] - 803cf7c: 6a78 ldr r0, [r7, #36] ; 0x24 - 803cf7e: f000 f909 bl 803d194 - 803cf82: 4603 mov r3, r0 - 803cf84: 73fb strb r3, [r7, #15] + 803cfa8: 697a ldr r2, [r7, #20] + 803cfaa: 6879 ldr r1, [r7, #4] + 803cfac: 6a78 ldr r0, [r7, #36] ; 0x24 + 803cfae: f000 f909 bl 803d1c4 + 803cfb2: 4603 mov r3, r0 + 803cfb4: 73fb strb r3, [r7, #15] if (err != ERR_OK) { - 803cf86: f997 300f ldrsb.w r3, [r7, #15] - 803cf8a: 2b00 cmp r3, #0 - 803cf8c: d016 beq.n 803cfbc + 803cfb6: f997 300f ldrsb.w r3, [r7, #15] + 803cfba: 2b00 cmp r3, #0 + 803cfbc: d016 beq.n 803cfec /* segment could not be sent, for whatever reason */ tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803cf8e: 687b ldr r3, [r7, #4] - 803cf90: 8b5b ldrh r3, [r3, #26] - 803cf92: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803cf96: b29a uxth r2, r3 - 803cf98: 687b ldr r3, [r7, #4] - 803cf9a: 835a strh r2, [r3, #26] + 803cfbe: 687b ldr r3, [r7, #4] + 803cfc0: 8b5b ldrh r3, [r3, #26] + 803cfc2: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803cfc6: b29a uxth r2, r3 + 803cfc8: 687b ldr r3, [r7, #4] + 803cfca: 835a strh r2, [r3, #26] return err; - 803cf9c: f997 300f ldrsb.w r3, [r7, #15] - 803cfa0: e0d3 b.n 803d14a - 803cfa2: bf00 nop - 803cfa4: 08043950 .word 0x08043950 - 803cfa8: 08043e94 .word 0x08043e94 - 803cfac: 080439a4 .word 0x080439a4 - 803cfb0: 08043eac .word 0x08043eac - 803cfb4: 2400e9a4 .word 0x2400e9a4 - 803cfb8: 08043ed4 .word 0x08043ed4 + 803cfcc: f997 300f ldrsb.w r3, [r7, #15] + 803cfd0: e0d3 b.n 803d17a + 803cfd2: bf00 nop + 803cfd4: 08043980 .word 0x08043980 + 803cfd8: 08043ec4 .word 0x08043ec4 + 803cfdc: 080439d4 .word 0x080439d4 + 803cfe0: 08043edc .word 0x08043edc + 803cfe4: 2400e9a4 .word 0x2400e9a4 + 803cfe8: 08043f04 .word 0x08043f04 } #if TCP_OVERSIZE_DBGCHECK seg->oversize_left = 0; #endif /* TCP_OVERSIZE_DBGCHECK */ pcb->unsent = seg->next; - 803cfbc: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cfbe: 681a ldr r2, [r3, #0] - 803cfc0: 687b ldr r3, [r7, #4] - 803cfc2: 66da str r2, [r3, #108] ; 0x6c + 803cfec: 6a7b ldr r3, [r7, #36] ; 0x24 + 803cfee: 681a ldr r2, [r3, #0] + 803cff0: 687b ldr r3, [r7, #4] + 803cff2: 66da str r2, [r3, #108] ; 0x6c if (pcb->state != SYN_SENT) { - 803cfc4: 687b ldr r3, [r7, #4] - 803cfc6: 7d1b ldrb r3, [r3, #20] - 803cfc8: 2b02 cmp r3, #2 - 803cfca: d006 beq.n 803cfda + 803cff4: 687b ldr r3, [r7, #4] + 803cff6: 7d1b ldrb r3, [r3, #20] + 803cff8: 2b02 cmp r3, #2 + 803cffa: d006 beq.n 803d00a tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 803cfcc: 687b ldr r3, [r7, #4] - 803cfce: 8b5b ldrh r3, [r3, #26] - 803cfd0: f023 0303 bic.w r3, r3, #3 - 803cfd4: b29a uxth r2, r3 - 803cfd6: 687b ldr r3, [r7, #4] - 803cfd8: 835a strh r2, [r3, #26] + 803cffc: 687b ldr r3, [r7, #4] + 803cffe: 8b5b ldrh r3, [r3, #26] + 803d000: f023 0303 bic.w r3, r3, #3 + 803d004: b29a uxth r2, r3 + 803d006: 687b ldr r3, [r7, #4] + 803d008: 835a strh r2, [r3, #26] } snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg); - 803cfda: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cfdc: 68db ldr r3, [r3, #12] - 803cfde: 685b ldr r3, [r3, #4] - 803cfe0: 4618 mov r0, r3 - 803cfe2: f7f8 ff76 bl 8035ed2 - 803cfe6: 4604 mov r4, r0 - 803cfe8: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cfea: 891b ldrh r3, [r3, #8] - 803cfec: 461d mov r5, r3 - 803cfee: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cff0: 68db ldr r3, [r3, #12] - 803cff2: 899b ldrh r3, [r3, #12] - 803cff4: b29b uxth r3, r3 - 803cff6: 4618 mov r0, r3 - 803cff8: f7f8 ff56 bl 8035ea8 - 803cffc: 4603 mov r3, r0 - 803cffe: b2db uxtb r3, r3 - 803d000: f003 0303 and.w r3, r3, #3 - 803d004: 2b00 cmp r3, #0 - 803d006: d001 beq.n 803d00c - 803d008: 2301 movs r3, #1 - 803d00a: e000 b.n 803d00e - 803d00c: 2300 movs r3, #0 - 803d00e: 442b add r3, r5 - 803d010: 4423 add r3, r4 - 803d012: 60bb str r3, [r7, #8] + 803d00a: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d00c: 68db ldr r3, [r3, #12] + 803d00e: 685b ldr r3, [r3, #4] + 803d010: 4618 mov r0, r3 + 803d012: f7f8 ff76 bl 8035f02 + 803d016: 4604 mov r4, r0 + 803d018: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d01a: 891b ldrh r3, [r3, #8] + 803d01c: 461d mov r5, r3 + 803d01e: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d020: 68db ldr r3, [r3, #12] + 803d022: 899b ldrh r3, [r3, #12] + 803d024: b29b uxth r3, r3 + 803d026: 4618 mov r0, r3 + 803d028: f7f8 ff56 bl 8035ed8 + 803d02c: 4603 mov r3, r0 + 803d02e: b2db uxtb r3, r3 + 803d030: f003 0303 and.w r3, r3, #3 + 803d034: 2b00 cmp r3, #0 + 803d036: d001 beq.n 803d03c + 803d038: 2301 movs r3, #1 + 803d03a: e000 b.n 803d03e + 803d03c: 2300 movs r3, #0 + 803d03e: 442b add r3, r5 + 803d040: 4423 add r3, r4 + 803d042: 60bb str r3, [r7, #8] if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) { - 803d014: 687b ldr r3, [r7, #4] - 803d016: 6d1a ldr r2, [r3, #80] ; 0x50 - 803d018: 68bb ldr r3, [r7, #8] - 803d01a: 1ad3 subs r3, r2, r3 - 803d01c: 2b00 cmp r3, #0 - 803d01e: da02 bge.n 803d026 + 803d044: 687b ldr r3, [r7, #4] + 803d046: 6d1a ldr r2, [r3, #80] ; 0x50 + 803d048: 68bb ldr r3, [r7, #8] + 803d04a: 1ad3 subs r3, r2, r3 + 803d04c: 2b00 cmp r3, #0 + 803d04e: da02 bge.n 803d056 pcb->snd_nxt = snd_nxt; - 803d020: 687b ldr r3, [r7, #4] - 803d022: 68ba ldr r2, [r7, #8] - 803d024: 651a str r2, [r3, #80] ; 0x50 + 803d050: 687b ldr r3, [r7, #4] + 803d052: 68ba ldr r2, [r7, #8] + 803d054: 651a str r2, [r3, #80] ; 0x50 } /* put segment on unacknowledged list if length > 0 */ if (TCP_TCPLEN(seg) > 0) { - 803d026: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d028: 891b ldrh r3, [r3, #8] - 803d02a: 461c mov r4, r3 - 803d02c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d02e: 68db ldr r3, [r3, #12] - 803d030: 899b ldrh r3, [r3, #12] - 803d032: b29b uxth r3, r3 - 803d034: 4618 mov r0, r3 - 803d036: f7f8 ff37 bl 8035ea8 - 803d03a: 4603 mov r3, r0 - 803d03c: b2db uxtb r3, r3 - 803d03e: f003 0303 and.w r3, r3, #3 - 803d042: 2b00 cmp r3, #0 - 803d044: d001 beq.n 803d04a - 803d046: 2301 movs r3, #1 - 803d048: e000 b.n 803d04c - 803d04a: 2300 movs r3, #0 - 803d04c: 4423 add r3, r4 - 803d04e: 2b00 cmp r3, #0 - 803d050: d049 beq.n 803d0e6 + 803d056: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d058: 891b ldrh r3, [r3, #8] + 803d05a: 461c mov r4, r3 + 803d05c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d05e: 68db ldr r3, [r3, #12] + 803d060: 899b ldrh r3, [r3, #12] + 803d062: b29b uxth r3, r3 + 803d064: 4618 mov r0, r3 + 803d066: f7f8 ff37 bl 8035ed8 + 803d06a: 4603 mov r3, r0 + 803d06c: b2db uxtb r3, r3 + 803d06e: f003 0303 and.w r3, r3, #3 + 803d072: 2b00 cmp r3, #0 + 803d074: d001 beq.n 803d07a + 803d076: 2301 movs r3, #1 + 803d078: e000 b.n 803d07c + 803d07a: 2300 movs r3, #0 + 803d07c: 4423 add r3, r4 + 803d07e: 2b00 cmp r3, #0 + 803d080: d049 beq.n 803d116 seg->next = NULL; - 803d052: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d054: 2200 movs r2, #0 - 803d056: 601a str r2, [r3, #0] + 803d082: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d084: 2200 movs r2, #0 + 803d086: 601a str r2, [r3, #0] /* unacked list is empty? */ if (pcb->unacked == NULL) { - 803d058: 687b ldr r3, [r7, #4] - 803d05a: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d05c: 2b00 cmp r3, #0 - 803d05e: d105 bne.n 803d06c + 803d088: 687b ldr r3, [r7, #4] + 803d08a: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d08c: 2b00 cmp r3, #0 + 803d08e: d105 bne.n 803d09c pcb->unacked = seg; - 803d060: 687b ldr r3, [r7, #4] - 803d062: 6a7a ldr r2, [r7, #36] ; 0x24 - 803d064: 671a str r2, [r3, #112] ; 0x70 + 803d090: 687b ldr r3, [r7, #4] + 803d092: 6a7a ldr r2, [r7, #36] ; 0x24 + 803d094: 671a str r2, [r3, #112] ; 0x70 useg = seg; - 803d066: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d068: 623b str r3, [r7, #32] - 803d06a: e03f b.n 803d0ec + 803d096: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d098: 623b str r3, [r7, #32] + 803d09a: e03f b.n 803d11c /* unacked list is not empty? */ } else { /* In the case of fast retransmit, the packet should not go to the tail * of the unacked queue, but rather somewhere before it. We need to check for * this case. -STJ Jul 27, 2004 */ if (TCP_SEQ_LT(lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(useg->tcphdr->seqno))) { - 803d06c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d06e: 68db ldr r3, [r3, #12] - 803d070: 685b ldr r3, [r3, #4] - 803d072: 4618 mov r0, r3 - 803d074: f7f8 ff2d bl 8035ed2 - 803d078: 4604 mov r4, r0 - 803d07a: 6a3b ldr r3, [r7, #32] - 803d07c: 68db ldr r3, [r3, #12] - 803d07e: 685b ldr r3, [r3, #4] - 803d080: 4618 mov r0, r3 - 803d082: f7f8 ff26 bl 8035ed2 - 803d086: 4603 mov r3, r0 - 803d088: 1ae3 subs r3, r4, r3 - 803d08a: 2b00 cmp r3, #0 - 803d08c: da24 bge.n 803d0d8 + 803d09c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d09e: 68db ldr r3, [r3, #12] + 803d0a0: 685b ldr r3, [r3, #4] + 803d0a2: 4618 mov r0, r3 + 803d0a4: f7f8 ff2d bl 8035f02 + 803d0a8: 4604 mov r4, r0 + 803d0aa: 6a3b ldr r3, [r7, #32] + 803d0ac: 68db ldr r3, [r3, #12] + 803d0ae: 685b ldr r3, [r3, #4] + 803d0b0: 4618 mov r0, r3 + 803d0b2: f7f8 ff26 bl 8035f02 + 803d0b6: 4603 mov r3, r0 + 803d0b8: 1ae3 subs r3, r4, r3 + 803d0ba: 2b00 cmp r3, #0 + 803d0bc: da24 bge.n 803d108 /* add segment to before tail of unacked list, keeping the list sorted */ struct tcp_seg **cur_seg = &(pcb->unacked); - 803d08e: 687b ldr r3, [r7, #4] - 803d090: 3370 adds r3, #112 ; 0x70 - 803d092: 61fb str r3, [r7, #28] + 803d0be: 687b ldr r3, [r7, #4] + 803d0c0: 3370 adds r3, #112 ; 0x70 + 803d0c2: 61fb str r3, [r7, #28] while (*cur_seg && - 803d094: e002 b.n 803d09c + 803d0c4: e002 b.n 803d0cc TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) { cur_seg = &((*cur_seg)->next ); - 803d096: 69fb ldr r3, [r7, #28] - 803d098: 681b ldr r3, [r3, #0] - 803d09a: 61fb str r3, [r7, #28] + 803d0c6: 69fb ldr r3, [r7, #28] + 803d0c8: 681b ldr r3, [r3, #0] + 803d0ca: 61fb str r3, [r7, #28] while (*cur_seg && - 803d09c: 69fb ldr r3, [r7, #28] - 803d09e: 681b ldr r3, [r3, #0] - 803d0a0: 2b00 cmp r3, #0 - 803d0a2: d011 beq.n 803d0c8 + 803d0cc: 69fb ldr r3, [r7, #28] + 803d0ce: 681b ldr r3, [r3, #0] + 803d0d0: 2b00 cmp r3, #0 + 803d0d2: d011 beq.n 803d0f8 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) { - 803d0a4: 69fb ldr r3, [r7, #28] - 803d0a6: 681b ldr r3, [r3, #0] - 803d0a8: 68db ldr r3, [r3, #12] - 803d0aa: 685b ldr r3, [r3, #4] - 803d0ac: 4618 mov r0, r3 - 803d0ae: f7f8 ff10 bl 8035ed2 - 803d0b2: 4604 mov r4, r0 - 803d0b4: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d0b6: 68db ldr r3, [r3, #12] - 803d0b8: 685b ldr r3, [r3, #4] - 803d0ba: 4618 mov r0, r3 - 803d0bc: f7f8 ff09 bl 8035ed2 - 803d0c0: 4603 mov r3, r0 - 803d0c2: 1ae3 subs r3, r4, r3 + 803d0d4: 69fb ldr r3, [r7, #28] + 803d0d6: 681b ldr r3, [r3, #0] + 803d0d8: 68db ldr r3, [r3, #12] + 803d0da: 685b ldr r3, [r3, #4] + 803d0dc: 4618 mov r0, r3 + 803d0de: f7f8 ff10 bl 8035f02 + 803d0e2: 4604 mov r4, r0 + 803d0e4: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d0e6: 68db ldr r3, [r3, #12] + 803d0e8: 685b ldr r3, [r3, #4] + 803d0ea: 4618 mov r0, r3 + 803d0ec: f7f8 ff09 bl 8035f02 + 803d0f0: 4603 mov r3, r0 + 803d0f2: 1ae3 subs r3, r4, r3 while (*cur_seg && - 803d0c4: 2b00 cmp r3, #0 - 803d0c6: dbe6 blt.n 803d096 + 803d0f4: 2b00 cmp r3, #0 + 803d0f6: dbe6 blt.n 803d0c6 } seg->next = (*cur_seg); - 803d0c8: 69fb ldr r3, [r7, #28] - 803d0ca: 681a ldr r2, [r3, #0] - 803d0cc: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d0ce: 601a str r2, [r3, #0] + 803d0f8: 69fb ldr r3, [r7, #28] + 803d0fa: 681a ldr r2, [r3, #0] + 803d0fc: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d0fe: 601a str r2, [r3, #0] (*cur_seg) = seg; - 803d0d0: 69fb ldr r3, [r7, #28] - 803d0d2: 6a7a ldr r2, [r7, #36] ; 0x24 - 803d0d4: 601a str r2, [r3, #0] - 803d0d6: e009 b.n 803d0ec + 803d100: 69fb ldr r3, [r7, #28] + 803d102: 6a7a ldr r2, [r7, #36] ; 0x24 + 803d104: 601a str r2, [r3, #0] + 803d106: e009 b.n 803d11c } else { /* add segment to tail of unacked list */ useg->next = seg; - 803d0d8: 6a3b ldr r3, [r7, #32] - 803d0da: 6a7a ldr r2, [r7, #36] ; 0x24 - 803d0dc: 601a str r2, [r3, #0] + 803d108: 6a3b ldr r3, [r7, #32] + 803d10a: 6a7a ldr r2, [r7, #36] ; 0x24 + 803d10c: 601a str r2, [r3, #0] useg = useg->next; - 803d0de: 6a3b ldr r3, [r7, #32] - 803d0e0: 681b ldr r3, [r3, #0] - 803d0e2: 623b str r3, [r7, #32] - 803d0e4: e002 b.n 803d0ec + 803d10e: 6a3b ldr r3, [r7, #32] + 803d110: 681b ldr r3, [r3, #0] + 803d112: 623b str r3, [r7, #32] + 803d114: e002 b.n 803d11c } } /* do not queue empty segments on the unacked list */ } else { tcp_seg_free(seg); - 803d0e6: 6a78 ldr r0, [r7, #36] ; 0x24 - 803d0e8: f7fb ff3d bl 8038f66 + 803d116: 6a78 ldr r0, [r7, #36] ; 0x24 + 803d118: f7fb ff3d bl 8038f96 } seg = pcb->unsent; - 803d0ec: 687b ldr r3, [r7, #4] - 803d0ee: 6edb ldr r3, [r3, #108] ; 0x6c - 803d0f0: 627b str r3, [r7, #36] ; 0x24 + 803d11c: 687b ldr r3, [r7, #4] + 803d11e: 6edb ldr r3, [r3, #108] ; 0x6c + 803d120: 627b str r3, [r7, #36] ; 0x24 while (seg != NULL && - 803d0f2: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d0f4: 2b00 cmp r3, #0 - 803d0f6: d012 beq.n 803d11e + 803d122: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d124: 2b00 cmp r3, #0 + 803d126: d012 beq.n 803d14e lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) { - 803d0f8: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d0fa: 68db ldr r3, [r3, #12] - 803d0fc: 685b ldr r3, [r3, #4] - 803d0fe: 4618 mov r0, r3 - 803d100: f7f8 fee7 bl 8035ed2 - 803d104: 4602 mov r2, r0 - 803d106: 687b ldr r3, [r7, #4] - 803d108: 6c5b ldr r3, [r3, #68] ; 0x44 - 803d10a: 1ad3 subs r3, r2, r3 - 803d10c: 6a7a ldr r2, [r7, #36] ; 0x24 - 803d10e: 8912 ldrh r2, [r2, #8] - 803d110: 4413 add r3, r2 + 803d128: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d12a: 68db ldr r3, [r3, #12] + 803d12c: 685b ldr r3, [r3, #4] + 803d12e: 4618 mov r0, r3 + 803d130: f7f8 fee7 bl 8035f02 + 803d134: 4602 mov r2, r0 + 803d136: 687b ldr r3, [r7, #4] + 803d138: 6c5b ldr r3, [r3, #68] ; 0x44 + 803d13a: 1ad3 subs r3, r2, r3 + 803d13c: 6a7a ldr r2, [r7, #36] ; 0x24 + 803d13e: 8912 ldrh r2, [r2, #8] + 803d140: 4413 add r3, r2 while (seg != NULL && - 803d112: 69ba ldr r2, [r7, #24] - 803d114: 429a cmp r2, r3 - 803d116: f4bf aed9 bcs.w 803cecc - 803d11a: e000 b.n 803d11e + 803d142: 69ba ldr r2, [r7, #24] + 803d144: 429a cmp r2, r3 + 803d146: f4bf aed9 bcs.w 803cefc + 803d14a: e000 b.n 803d14e break; - 803d11c: bf00 nop + 803d14c: bf00 nop } #if TCP_OVERSIZE if (pcb->unsent == NULL) { - 803d11e: 687b ldr r3, [r7, #4] - 803d120: 6edb ldr r3, [r3, #108] ; 0x6c - 803d122: 2b00 cmp r3, #0 - 803d124: d108 bne.n 803d138 + 803d14e: 687b ldr r3, [r7, #4] + 803d150: 6edb ldr r3, [r3, #108] ; 0x6c + 803d152: 2b00 cmp r3, #0 + 803d154: d108 bne.n 803d168 /* last unsent has been removed, reset unsent_oversize */ pcb->unsent_oversize = 0; - 803d126: 687b ldr r3, [r7, #4] - 803d128: 2200 movs r2, #0 - 803d12a: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 - 803d12e: e004 b.n 803d13a + 803d156: 687b ldr r3, [r7, #4] + 803d158: 2200 movs r2, #0 + 803d15a: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803d15e: e004 b.n 803d16a goto output_done; - 803d130: bf00 nop - 803d132: e002 b.n 803d13a + 803d160: bf00 nop + 803d162: e002 b.n 803d16a goto output_done; - 803d134: bf00 nop - 803d136: e000 b.n 803d13a + 803d164: bf00 nop + 803d166: e000 b.n 803d16a } #endif /* TCP_OVERSIZE */ output_done: - 803d138: bf00 nop + 803d168: bf00 nop tcp_clear_flags(pcb, TF_NAGLEMEMERR); - 803d13a: 687b ldr r3, [r7, #4] - 803d13c: 8b5b ldrh r3, [r3, #26] - 803d13e: f023 0380 bic.w r3, r3, #128 ; 0x80 - 803d142: b29a uxth r2, r3 - 803d144: 687b ldr r3, [r7, #4] - 803d146: 835a strh r2, [r3, #26] + 803d16a: 687b ldr r3, [r7, #4] + 803d16c: 8b5b ldrh r3, [r3, #26] + 803d16e: f023 0380 bic.w r3, r3, #128 ; 0x80 + 803d172: b29a uxth r2, r3 + 803d174: 687b ldr r3, [r7, #4] + 803d176: 835a strh r2, [r3, #26] return ERR_OK; - 803d148: 2300 movs r3, #0 + 803d178: 2300 movs r3, #0 } - 803d14a: 4618 mov r0, r3 - 803d14c: 3728 adds r7, #40 ; 0x28 - 803d14e: 46bd mov sp, r7 - 803d150: bdb0 pop {r4, r5, r7, pc} - 803d152: bf00 nop + 803d17a: 4618 mov r0, r3 + 803d17c: 3728 adds r7, #40 ; 0x28 + 803d17e: 46bd mov sp, r7 + 803d180: bdb0 pop {r4, r5, r7, pc} + 803d182: bf00 nop -0803d154 : +0803d184 : * @arg seg the tcp segment to check * @return 1 if ref != 1, 0 if ref == 1 */ static int tcp_output_segment_busy(const struct tcp_seg *seg) { - 803d154: b580 push {r7, lr} - 803d156: b082 sub sp, #8 - 803d158: af00 add r7, sp, #0 - 803d15a: 6078 str r0, [r7, #4] + 803d184: b580 push {r7, lr} + 803d186: b082 sub sp, #8 + 803d188: af00 add r7, sp, #0 + 803d18a: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_output_segment_busy: invalid seg", seg != NULL); - 803d15c: 687b ldr r3, [r7, #4] - 803d15e: 2b00 cmp r3, #0 - 803d160: d106 bne.n 803d170 - 803d162: 4b09 ldr r3, [pc, #36] ; (803d188 ) - 803d164: f240 529a movw r2, #1434 ; 0x59a - 803d168: 4908 ldr r1, [pc, #32] ; (803d18c ) - 803d16a: 4809 ldr r0, [pc, #36] ; (803d190 ) - 803d16c: f003 fcb8 bl 8040ae0 + 803d18c: 687b ldr r3, [r7, #4] + 803d18e: 2b00 cmp r3, #0 + 803d190: d106 bne.n 803d1a0 + 803d192: 4b09 ldr r3, [pc, #36] ; (803d1b8 ) + 803d194: f240 529a movw r2, #1434 ; 0x59a + 803d198: 4908 ldr r1, [pc, #32] ; (803d1bc ) + 803d19a: 4809 ldr r0, [pc, #36] ; (803d1c0 ) + 803d19c: f003 fcb8 bl 8040b10 /* We only need to check the first pbuf here: If a pbuf is queued for transmission, a driver calls pbuf_ref(), which only changes the ref count of the first pbuf */ if (seg->p->ref != 1) { - 803d170: 687b ldr r3, [r7, #4] - 803d172: 685b ldr r3, [r3, #4] - 803d174: 7b9b ldrb r3, [r3, #14] - 803d176: 2b01 cmp r3, #1 - 803d178: d001 beq.n 803d17e + 803d1a0: 687b ldr r3, [r7, #4] + 803d1a2: 685b ldr r3, [r3, #4] + 803d1a4: 7b9b ldrb r3, [r3, #14] + 803d1a6: 2b01 cmp r3, #1 + 803d1a8: d001 beq.n 803d1ae /* other reference found */ return 1; - 803d17a: 2301 movs r3, #1 - 803d17c: e000 b.n 803d180 + 803d1aa: 2301 movs r3, #1 + 803d1ac: e000 b.n 803d1b0 } /* no other references found */ return 0; - 803d17e: 2300 movs r3, #0 + 803d1ae: 2300 movs r3, #0 } - 803d180: 4618 mov r0, r3 - 803d182: 3708 adds r7, #8 - 803d184: 46bd mov sp, r7 - 803d186: bd80 pop {r7, pc} - 803d188: 08043950 .word 0x08043950 - 803d18c: 08043eec .word 0x08043eec - 803d190: 080439a4 .word 0x080439a4 + 803d1b0: 4618 mov r0, r3 + 803d1b2: 3708 adds r7, #8 + 803d1b4: 46bd mov sp, r7 + 803d1b6: bd80 pop {r7, pc} + 803d1b8: 08043980 .word 0x08043980 + 803d1bc: 08043f1c .word 0x08043f1c + 803d1c0: 080439d4 .word 0x080439d4 -0803d194 : +0803d1c4 : * @param pcb the tcp_pcb for the TCP connection used to send the segment * @param netif the netif used to send the segment */ static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif) { - 803d194: b5b0 push {r4, r5, r7, lr} - 803d196: b08c sub sp, #48 ; 0x30 - 803d198: af04 add r7, sp, #16 - 803d19a: 60f8 str r0, [r7, #12] - 803d19c: 60b9 str r1, [r7, #8] - 803d19e: 607a str r2, [r7, #4] + 803d1c4: b5b0 push {r4, r5, r7, lr} + 803d1c6: b08c sub sp, #48 ; 0x30 + 803d1c8: af04 add r7, sp, #16 + 803d1ca: 60f8 str r0, [r7, #12] + 803d1cc: 60b9 str r1, [r7, #8] + 803d1ce: 607a str r2, [r7, #4] u32_t *opts; #if TCP_CHECKSUM_ON_COPY int seg_chksum_was_swapped = 0; #endif LWIP_ASSERT("tcp_output_segment: invalid seg", seg != NULL); - 803d1a0: 68fb ldr r3, [r7, #12] - 803d1a2: 2b00 cmp r3, #0 - 803d1a4: d106 bne.n 803d1b4 - 803d1a6: 4b63 ldr r3, [pc, #396] ; (803d334 ) - 803d1a8: f44f 62b7 mov.w r2, #1464 ; 0x5b8 - 803d1ac: 4962 ldr r1, [pc, #392] ; (803d338 ) - 803d1ae: 4863 ldr r0, [pc, #396] ; (803d33c ) - 803d1b0: f003 fc96 bl 8040ae0 + 803d1d0: 68fb ldr r3, [r7, #12] + 803d1d2: 2b00 cmp r3, #0 + 803d1d4: d106 bne.n 803d1e4 + 803d1d6: 4b63 ldr r3, [pc, #396] ; (803d364 ) + 803d1d8: f44f 62b7 mov.w r2, #1464 ; 0x5b8 + 803d1dc: 4962 ldr r1, [pc, #392] ; (803d368 ) + 803d1de: 4863 ldr r0, [pc, #396] ; (803d36c ) + 803d1e0: f003 fc96 bl 8040b10 LWIP_ASSERT("tcp_output_segment: invalid pcb", pcb != NULL); - 803d1b4: 68bb ldr r3, [r7, #8] - 803d1b6: 2b00 cmp r3, #0 - 803d1b8: d106 bne.n 803d1c8 - 803d1ba: 4b5e ldr r3, [pc, #376] ; (803d334 ) - 803d1bc: f240 52b9 movw r2, #1465 ; 0x5b9 - 803d1c0: 495f ldr r1, [pc, #380] ; (803d340 ) - 803d1c2: 485e ldr r0, [pc, #376] ; (803d33c ) - 803d1c4: f003 fc8c bl 8040ae0 + 803d1e4: 68bb ldr r3, [r7, #8] + 803d1e6: 2b00 cmp r3, #0 + 803d1e8: d106 bne.n 803d1f8 + 803d1ea: 4b5e ldr r3, [pc, #376] ; (803d364 ) + 803d1ec: f240 52b9 movw r2, #1465 ; 0x5b9 + 803d1f0: 495f ldr r1, [pc, #380] ; (803d370 ) + 803d1f2: 485e ldr r0, [pc, #376] ; (803d36c ) + 803d1f4: f003 fc8c bl 8040b10 LWIP_ASSERT("tcp_output_segment: invalid netif", netif != NULL); - 803d1c8: 687b ldr r3, [r7, #4] - 803d1ca: 2b00 cmp r3, #0 - 803d1cc: d106 bne.n 803d1dc - 803d1ce: 4b59 ldr r3, [pc, #356] ; (803d334 ) - 803d1d0: f240 52ba movw r2, #1466 ; 0x5ba - 803d1d4: 495b ldr r1, [pc, #364] ; (803d344 ) - 803d1d6: 4859 ldr r0, [pc, #356] ; (803d33c ) - 803d1d8: f003 fc82 bl 8040ae0 + 803d1f8: 687b ldr r3, [r7, #4] + 803d1fa: 2b00 cmp r3, #0 + 803d1fc: d106 bne.n 803d20c + 803d1fe: 4b59 ldr r3, [pc, #356] ; (803d364 ) + 803d200: f240 52ba movw r2, #1466 ; 0x5ba + 803d204: 495b ldr r1, [pc, #364] ; (803d374 ) + 803d206: 4859 ldr r0, [pc, #356] ; (803d36c ) + 803d208: f003 fc82 bl 8040b10 if (tcp_output_segment_busy(seg)) { - 803d1dc: 68f8 ldr r0, [r7, #12] - 803d1de: f7ff ffb9 bl 803d154 - 803d1e2: 4603 mov r3, r0 - 803d1e4: 2b00 cmp r3, #0 - 803d1e6: d001 beq.n 803d1ec + 803d20c: 68f8 ldr r0, [r7, #12] + 803d20e: f7ff ffb9 bl 803d184 + 803d212: 4603 mov r3, r0 + 803d214: 2b00 cmp r3, #0 + 803d216: d001 beq.n 803d21c /* This should not happen: rexmit functions should have checked this. However, since this function modifies p->len, we must not continue in this case. */ LWIP_DEBUGF(TCP_RTO_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_output_segment: segment busy\n")); return ERR_OK; - 803d1e8: 2300 movs r3, #0 - 803d1ea: e09f b.n 803d32c + 803d218: 2300 movs r3, #0 + 803d21a: e09f b.n 803d35c } /* The TCP header has already been constructed, but the ackno and wnd fields remain. */ seg->tcphdr->ackno = lwip_htonl(pcb->rcv_nxt); - 803d1ec: 68bb ldr r3, [r7, #8] - 803d1ee: 6a5a ldr r2, [r3, #36] ; 0x24 - 803d1f0: 68fb ldr r3, [r7, #12] - 803d1f2: 68dc ldr r4, [r3, #12] - 803d1f4: 4610 mov r0, r2 - 803d1f6: f7f8 fe6c bl 8035ed2 - 803d1fa: 4603 mov r3, r0 - 803d1fc: 60a3 str r3, [r4, #8] + 803d21c: 68bb ldr r3, [r7, #8] + 803d21e: 6a5a ldr r2, [r3, #36] ; 0x24 + 803d220: 68fb ldr r3, [r7, #12] + 803d222: 68dc ldr r4, [r3, #12] + 803d224: 4610 mov r0, r2 + 803d226: f7f8 fe6c bl 8035f02 + 803d22a: 4603 mov r3, r0 + 803d22c: 60a3 str r3, [r4, #8] the window scale option) is never scaled. */ seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(pcb->rcv_ann_wnd)); } else #endif /* LWIP_WND_SCALE */ { seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd))); - 803d1fe: 68bb ldr r3, [r7, #8] - 803d200: 8d5a ldrh r2, [r3, #42] ; 0x2a - 803d202: 68fb ldr r3, [r7, #12] - 803d204: 68dc ldr r4, [r3, #12] - 803d206: 4610 mov r0, r2 - 803d208: f7f8 fe4e bl 8035ea8 - 803d20c: 4603 mov r3, r0 - 803d20e: 81e3 strh r3, [r4, #14] + 803d22e: 68bb ldr r3, [r7, #8] + 803d230: 8d5a ldrh r2, [r3, #42] ; 0x2a + 803d232: 68fb ldr r3, [r7, #12] + 803d234: 68dc ldr r4, [r3, #12] + 803d236: 4610 mov r0, r2 + 803d238: f7f8 fe4e bl 8035ed8 + 803d23c: 4603 mov r3, r0 + 803d23e: 81e3 strh r3, [r4, #14] } pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; - 803d210: 68bb ldr r3, [r7, #8] - 803d212: 6a5b ldr r3, [r3, #36] ; 0x24 - 803d214: 68ba ldr r2, [r7, #8] - 803d216: 8d52 ldrh r2, [r2, #42] ; 0x2a - 803d218: 441a add r2, r3 - 803d21a: 68bb ldr r3, [r7, #8] - 803d21c: 62da str r2, [r3, #44] ; 0x2c + 803d240: 68bb ldr r3, [r7, #8] + 803d242: 6a5b ldr r3, [r3, #36] ; 0x24 + 803d244: 68ba ldr r2, [r7, #8] + 803d246: 8d52 ldrh r2, [r2, #42] ; 0x2a + 803d248: 441a add r2, r3 + 803d24a: 68bb ldr r3, [r7, #8] + 803d24c: 62da str r2, [r3, #44] ; 0x2c /* Add any requested options. NB MSS option is only set on SYN packets, so ignore it here */ /* cast through void* to get rid of alignment warnings */ opts = (u32_t *)(void *)(seg->tcphdr + 1); - 803d21e: 68fb ldr r3, [r7, #12] - 803d220: 68db ldr r3, [r3, #12] - 803d222: 3314 adds r3, #20 - 803d224: 61fb str r3, [r7, #28] + 803d24e: 68fb ldr r3, [r7, #12] + 803d250: 68db ldr r3, [r3, #12] + 803d252: 3314 adds r3, #20 + 803d254: 61fb str r3, [r7, #28] if (seg->flags & TF_SEG_OPTS_MSS) { - 803d226: 68fb ldr r3, [r7, #12] - 803d228: 7a9b ldrb r3, [r3, #10] - 803d22a: f003 0301 and.w r3, r3, #1 - 803d22e: 2b00 cmp r3, #0 - 803d230: d015 beq.n 803d25e + 803d256: 68fb ldr r3, [r7, #12] + 803d258: 7a9b ldrb r3, [r3, #10] + 803d25a: f003 0301 and.w r3, r3, #1 + 803d25e: 2b00 cmp r3, #0 + 803d260: d015 beq.n 803d28e u16_t mss; #if TCP_CALCULATE_EFF_SEND_MSS mss = tcp_eff_send_mss_netif(TCP_MSS, netif, &pcb->remote_ip); - 803d232: 68bb ldr r3, [r7, #8] - 803d234: 3304 adds r3, #4 - 803d236: 461a mov r2, r3 - 803d238: 6879 ldr r1, [r7, #4] - 803d23a: f44f 7006 mov.w r0, #536 ; 0x218 - 803d23e: f7fc fa33 bl 80396a8 - 803d242: 4603 mov r3, r0 - 803d244: 837b strh r3, [r7, #26] + 803d262: 68bb ldr r3, [r7, #8] + 803d264: 3304 adds r3, #4 + 803d266: 461a mov r2, r3 + 803d268: 6879 ldr r1, [r7, #4] + 803d26a: f44f 7006 mov.w r0, #536 ; 0x218 + 803d26e: f7fc fa33 bl 80396d8 + 803d272: 4603 mov r3, r0 + 803d274: 837b strh r3, [r7, #26] #else /* TCP_CALCULATE_EFF_SEND_MSS */ mss = TCP_MSS; #endif /* TCP_CALCULATE_EFF_SEND_MSS */ *opts = TCP_BUILD_MSS_OPTION(mss); - 803d246: 8b7b ldrh r3, [r7, #26] - 803d248: f043 7301 orr.w r3, r3, #33816576 ; 0x2040000 - 803d24c: 4618 mov r0, r3 - 803d24e: f7f8 fe40 bl 8035ed2 - 803d252: 4602 mov r2, r0 - 803d254: 69fb ldr r3, [r7, #28] - 803d256: 601a str r2, [r3, #0] + 803d276: 8b7b ldrh r3, [r7, #26] + 803d278: f043 7301 orr.w r3, r3, #33816576 ; 0x2040000 + 803d27c: 4618 mov r0, r3 + 803d27e: f7f8 fe40 bl 8035f02 + 803d282: 4602 mov r2, r0 + 803d284: 69fb ldr r3, [r7, #28] + 803d286: 601a str r2, [r3, #0] opts += 1; - 803d258: 69fb ldr r3, [r7, #28] - 803d25a: 3304 adds r3, #4 - 803d25c: 61fb str r3, [r7, #28] + 803d288: 69fb ldr r3, [r7, #28] + 803d28a: 3304 adds r3, #4 + 803d28c: 61fb str r3, [r7, #28] } #endif /* Set retransmission timer running if it is not currently enabled This must be set before checking the route. */ if (pcb->rtime < 0) { - 803d25e: 68bb ldr r3, [r7, #8] - 803d260: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 803d264: 2b00 cmp r3, #0 - 803d266: da02 bge.n 803d26e + 803d28e: 68bb ldr r3, [r7, #8] + 803d290: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 803d294: 2b00 cmp r3, #0 + 803d296: da02 bge.n 803d29e pcb->rtime = 0; - 803d268: 68bb ldr r3, [r7, #8] - 803d26a: 2200 movs r2, #0 - 803d26c: 861a strh r2, [r3, #48] ; 0x30 + 803d298: 68bb ldr r3, [r7, #8] + 803d29a: 2200 movs r2, #0 + 803d29c: 861a strh r2, [r3, #48] ; 0x30 } if (pcb->rttest == 0) { - 803d26e: 68bb ldr r3, [r7, #8] - 803d270: 6b5b ldr r3, [r3, #52] ; 0x34 - 803d272: 2b00 cmp r3, #0 - 803d274: d10c bne.n 803d290 + 803d29e: 68bb ldr r3, [r7, #8] + 803d2a0: 6b5b ldr r3, [r3, #52] ; 0x34 + 803d2a2: 2b00 cmp r3, #0 + 803d2a4: d10c bne.n 803d2c0 pcb->rttest = tcp_ticks; - 803d276: 4b34 ldr r3, [pc, #208] ; (803d348 ) - 803d278: 681a ldr r2, [r3, #0] - 803d27a: 68bb ldr r3, [r7, #8] - 803d27c: 635a str r2, [r3, #52] ; 0x34 + 803d2a6: 4b34 ldr r3, [pc, #208] ; (803d378 ) + 803d2a8: 681a ldr r2, [r3, #0] + 803d2aa: 68bb ldr r3, [r7, #8] + 803d2ac: 635a str r2, [r3, #52] ; 0x34 pcb->rtseq = lwip_ntohl(seg->tcphdr->seqno); - 803d27e: 68fb ldr r3, [r7, #12] - 803d280: 68db ldr r3, [r3, #12] - 803d282: 685b ldr r3, [r3, #4] - 803d284: 4618 mov r0, r3 - 803d286: f7f8 fe24 bl 8035ed2 - 803d28a: 4602 mov r2, r0 - 803d28c: 68bb ldr r3, [r7, #8] - 803d28e: 639a str r2, [r3, #56] ; 0x38 + 803d2ae: 68fb ldr r3, [r7, #12] + 803d2b0: 68db ldr r3, [r3, #12] + 803d2b2: 685b ldr r3, [r3, #4] + 803d2b4: 4618 mov r0, r3 + 803d2b6: f7f8 fe24 bl 8035f02 + 803d2ba: 4602 mov r2, r0 + 803d2bc: 68bb ldr r3, [r7, #8] + 803d2be: 639a str r2, [r3, #56] ; 0x38 } LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n", lwip_htonl(seg->tcphdr->seqno), lwip_htonl(seg->tcphdr->seqno) + seg->len)); len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload); - 803d290: 68fb ldr r3, [r7, #12] - 803d292: 68da ldr r2, [r3, #12] - 803d294: 68fb ldr r3, [r7, #12] - 803d296: 685b ldr r3, [r3, #4] - 803d298: 685b ldr r3, [r3, #4] - 803d29a: 1ad3 subs r3, r2, r3 - 803d29c: 833b strh r3, [r7, #24] + 803d2c0: 68fb ldr r3, [r7, #12] + 803d2c2: 68da ldr r2, [r3, #12] + 803d2c4: 68fb ldr r3, [r7, #12] + 803d2c6: 685b ldr r3, [r3, #4] + 803d2c8: 685b ldr r3, [r3, #4] + 803d2ca: 1ad3 subs r3, r2, r3 + 803d2cc: 833b strh r3, [r7, #24] if (len == 0) { /** Exclude retransmitted segments from this count. */ MIB2_STATS_INC(mib2.tcpoutsegs); } seg->p->len -= len; - 803d29e: 68fb ldr r3, [r7, #12] - 803d2a0: 685b ldr r3, [r3, #4] - 803d2a2: 8959 ldrh r1, [r3, #10] - 803d2a4: 68fb ldr r3, [r7, #12] - 803d2a6: 685b ldr r3, [r3, #4] - 803d2a8: 8b3a ldrh r2, [r7, #24] - 803d2aa: 1a8a subs r2, r1, r2 - 803d2ac: b292 uxth r2, r2 - 803d2ae: 815a strh r2, [r3, #10] + 803d2ce: 68fb ldr r3, [r7, #12] + 803d2d0: 685b ldr r3, [r3, #4] + 803d2d2: 8959 ldrh r1, [r3, #10] + 803d2d4: 68fb ldr r3, [r7, #12] + 803d2d6: 685b ldr r3, [r3, #4] + 803d2d8: 8b3a ldrh r2, [r7, #24] + 803d2da: 1a8a subs r2, r1, r2 + 803d2dc: b292 uxth r2, r2 + 803d2de: 815a strh r2, [r3, #10] seg->p->tot_len -= len; - 803d2b0: 68fb ldr r3, [r7, #12] - 803d2b2: 685b ldr r3, [r3, #4] - 803d2b4: 8919 ldrh r1, [r3, #8] - 803d2b6: 68fb ldr r3, [r7, #12] - 803d2b8: 685b ldr r3, [r3, #4] - 803d2ba: 8b3a ldrh r2, [r7, #24] - 803d2bc: 1a8a subs r2, r1, r2 - 803d2be: b292 uxth r2, r2 - 803d2c0: 811a strh r2, [r3, #8] + 803d2e0: 68fb ldr r3, [r7, #12] + 803d2e2: 685b ldr r3, [r3, #4] + 803d2e4: 8919 ldrh r1, [r3, #8] + 803d2e6: 68fb ldr r3, [r7, #12] + 803d2e8: 685b ldr r3, [r3, #4] + 803d2ea: 8b3a ldrh r2, [r7, #24] + 803d2ec: 1a8a subs r2, r1, r2 + 803d2ee: b292 uxth r2, r2 + 803d2f0: 811a strh r2, [r3, #8] seg->p->payload = seg->tcphdr; - 803d2c2: 68fb ldr r3, [r7, #12] - 803d2c4: 685b ldr r3, [r3, #4] - 803d2c6: 68fa ldr r2, [r7, #12] - 803d2c8: 68d2 ldr r2, [r2, #12] - 803d2ca: 605a str r2, [r3, #4] + 803d2f2: 68fb ldr r3, [r7, #12] + 803d2f4: 685b ldr r3, [r3, #4] + 803d2f6: 68fa ldr r2, [r7, #12] + 803d2f8: 68d2 ldr r2, [r2, #12] + 803d2fa: 605a str r2, [r3, #4] seg->tcphdr->chksum = 0; - 803d2cc: 68fb ldr r3, [r7, #12] - 803d2ce: 68db ldr r3, [r3, #12] - 803d2d0: 2200 movs r2, #0 - 803d2d2: 741a strb r2, [r3, #16] - 803d2d4: 2200 movs r2, #0 - 803d2d6: 745a strb r2, [r3, #17] + 803d2fc: 68fb ldr r3, [r7, #12] + 803d2fe: 68db ldr r3, [r3, #12] + 803d300: 2200 movs r2, #0 + 803d302: 741a strb r2, [r3, #16] + 803d304: 2200 movs r2, #0 + 803d306: 745a strb r2, [r3, #17] #ifdef LWIP_HOOK_TCP_OUT_ADD_TCPOPTS opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(seg->p, seg->tcphdr, pcb, opts); #endif LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(seg->tcphdr + 1)) + LWIP_TCP_OPT_LENGTH_SEGMENT(seg->flags, pcb)); - 803d2d8: 68fb ldr r3, [r7, #12] - 803d2da: 68db ldr r3, [r3, #12] - 803d2dc: f103 0214 add.w r2, r3, #20 - 803d2e0: 68fb ldr r3, [r7, #12] - 803d2e2: 7a9b ldrb r3, [r3, #10] - 803d2e4: 009b lsls r3, r3, #2 - 803d2e6: f003 0304 and.w r3, r3, #4 - 803d2ea: 4413 add r3, r2 - 803d2ec: 69fa ldr r2, [r7, #28] - 803d2ee: 429a cmp r2, r3 - 803d2f0: d006 beq.n 803d300 - 803d2f2: 4b10 ldr r3, [pc, #64] ; (803d334 ) - 803d2f4: f240 621c movw r2, #1564 ; 0x61c - 803d2f8: 4914 ldr r1, [pc, #80] ; (803d34c ) - 803d2fa: 4810 ldr r0, [pc, #64] ; (803d33c ) - 803d2fc: f003 fbf0 bl 8040ae0 + 803d308: 68fb ldr r3, [r7, #12] + 803d30a: 68db ldr r3, [r3, #12] + 803d30c: f103 0214 add.w r2, r3, #20 + 803d310: 68fb ldr r3, [r7, #12] + 803d312: 7a9b ldrb r3, [r3, #10] + 803d314: 009b lsls r3, r3, #2 + 803d316: f003 0304 and.w r3, r3, #4 + 803d31a: 4413 add r3, r2 + 803d31c: 69fa ldr r2, [r7, #28] + 803d31e: 429a cmp r2, r3 + 803d320: d006 beq.n 803d330 + 803d322: 4b10 ldr r3, [pc, #64] ; (803d364 ) + 803d324: f240 621c movw r2, #1564 ; 0x61c + 803d328: 4914 ldr r1, [pc, #80] ; (803d37c ) + 803d32a: 4810 ldr r0, [pc, #64] ; (803d36c ) + 803d32c: f003 fbf0 bl 8040b10 } #endif /* CHECKSUM_GEN_TCP */ TCP_STATS_INC(tcp.xmit); NETIF_SET_HINTS(netif, &(pcb->netif_hints)); err = ip_output_if(seg->p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, - 803d300: 68fb ldr r3, [r7, #12] - 803d302: 6858 ldr r0, [r3, #4] - 803d304: 68b9 ldr r1, [r7, #8] - 803d306: 68bb ldr r3, [r7, #8] - 803d308: 1d1c adds r4, r3, #4 - 803d30a: 68bb ldr r3, [r7, #8] - 803d30c: 7add ldrb r5, [r3, #11] - 803d30e: 68bb ldr r3, [r7, #8] - 803d310: 7a9b ldrb r3, [r3, #10] - 803d312: 687a ldr r2, [r7, #4] - 803d314: 9202 str r2, [sp, #8] - 803d316: 2206 movs r2, #6 - 803d318: 9201 str r2, [sp, #4] - 803d31a: 9300 str r3, [sp, #0] - 803d31c: 462b mov r3, r5 - 803d31e: 4622 mov r2, r4 - 803d320: f002 fa5c bl 803f7dc - 803d324: 4603 mov r3, r0 - 803d326: 75fb strb r3, [r7, #23] + 803d330: 68fb ldr r3, [r7, #12] + 803d332: 6858 ldr r0, [r3, #4] + 803d334: 68b9 ldr r1, [r7, #8] + 803d336: 68bb ldr r3, [r7, #8] + 803d338: 1d1c adds r4, r3, #4 + 803d33a: 68bb ldr r3, [r7, #8] + 803d33c: 7add ldrb r5, [r3, #11] + 803d33e: 68bb ldr r3, [r7, #8] + 803d340: 7a9b ldrb r3, [r3, #10] + 803d342: 687a ldr r2, [r7, #4] + 803d344: 9202 str r2, [sp, #8] + 803d346: 2206 movs r2, #6 + 803d348: 9201 str r2, [sp, #4] + 803d34a: 9300 str r3, [sp, #0] + 803d34c: 462b mov r3, r5 + 803d34e: 4622 mov r2, r4 + 803d350: f002 fa5c bl 803f80c + 803d354: 4603 mov r3, r0 + 803d356: 75fb strb r3, [r7, #23] seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum); seg->chksum_swapped = 1; } #endif return err; - 803d328: f997 3017 ldrsb.w r3, [r7, #23] -} - 803d32c: 4618 mov r0, r3 - 803d32e: 3720 adds r7, #32 - 803d330: 46bd mov sp, r7 - 803d332: bdb0 pop {r4, r5, r7, pc} - 803d334: 08043950 .word 0x08043950 - 803d338: 08043f14 .word 0x08043f14 - 803d33c: 080439a4 .word 0x080439a4 - 803d340: 08043f34 .word 0x08043f34 - 803d344: 08043f54 .word 0x08043f54 - 803d348: 2400e958 .word 0x2400e958 - 803d34c: 08043f78 .word 0x08043f78 - -0803d350 : + 803d358: f997 3017 ldrsb.w r3, [r7, #23] +} + 803d35c: 4618 mov r0, r3 + 803d35e: 3720 adds r7, #32 + 803d360: 46bd mov sp, r7 + 803d362: bdb0 pop {r4, r5, r7, pc} + 803d364: 08043980 .word 0x08043980 + 803d368: 08043f44 .word 0x08043f44 + 803d36c: 080439d4 .word 0x080439d4 + 803d370: 08043f64 .word 0x08043f64 + 803d374: 08043f84 .word 0x08043f84 + 803d378: 2400e958 .word 0x2400e958 + 803d37c: 08043fa8 .word 0x08043fa8 + +0803d380 : * * @param pcb the tcp_pcb for which to re-enqueue all unacked segments */ err_t tcp_rexmit_rto_prepare(struct tcp_pcb *pcb) { - 803d350: b5b0 push {r4, r5, r7, lr} - 803d352: b084 sub sp, #16 - 803d354: af00 add r7, sp, #0 - 803d356: 6078 str r0, [r7, #4] + 803d380: b5b0 push {r4, r5, r7, lr} + 803d382: b084 sub sp, #16 + 803d384: af00 add r7, sp, #0 + 803d386: 6078 str r0, [r7, #4] struct tcp_seg *seg; LWIP_ASSERT("tcp_rexmit_rto_prepare: invalid pcb", pcb != NULL); - 803d358: 687b ldr r3, [r7, #4] - 803d35a: 2b00 cmp r3, #0 - 803d35c: d106 bne.n 803d36c - 803d35e: 4b31 ldr r3, [pc, #196] ; (803d424 ) - 803d360: f240 6263 movw r2, #1635 ; 0x663 - 803d364: 4930 ldr r1, [pc, #192] ; (803d428 ) - 803d366: 4831 ldr r0, [pc, #196] ; (803d42c ) - 803d368: f003 fbba bl 8040ae0 + 803d388: 687b ldr r3, [r7, #4] + 803d38a: 2b00 cmp r3, #0 + 803d38c: d106 bne.n 803d39c + 803d38e: 4b31 ldr r3, [pc, #196] ; (803d454 ) + 803d390: f240 6263 movw r2, #1635 ; 0x663 + 803d394: 4930 ldr r1, [pc, #192] ; (803d458 ) + 803d396: 4831 ldr r0, [pc, #196] ; (803d45c ) + 803d398: f003 fbba bl 8040b10 if (pcb->unacked == NULL) { - 803d36c: 687b ldr r3, [r7, #4] - 803d36e: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d370: 2b00 cmp r3, #0 - 803d372: d102 bne.n 803d37a + 803d39c: 687b ldr r3, [r7, #4] + 803d39e: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d3a0: 2b00 cmp r3, #0 + 803d3a2: d102 bne.n 803d3aa return ERR_VAL; - 803d374: f06f 0305 mvn.w r3, #5 - 803d378: e050 b.n 803d41c + 803d3a4: f06f 0305 mvn.w r3, #5 + 803d3a8: e050 b.n 803d44c /* Move all unacked segments to the head of the unsent queue. However, give up if any of the unsent pbufs are still referenced by the netif driver due to deferred transmission. No point loading the link further if it is struggling to flush its buffered writes. */ for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) { - 803d37a: 687b ldr r3, [r7, #4] - 803d37c: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d37e: 60fb str r3, [r7, #12] - 803d380: e00b b.n 803d39a + 803d3aa: 687b ldr r3, [r7, #4] + 803d3ac: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d3ae: 60fb str r3, [r7, #12] + 803d3b0: e00b b.n 803d3ca if (tcp_output_segment_busy(seg)) { - 803d382: 68f8 ldr r0, [r7, #12] - 803d384: f7ff fee6 bl 803d154 - 803d388: 4603 mov r3, r0 - 803d38a: 2b00 cmp r3, #0 - 803d38c: d002 beq.n 803d394 + 803d3b2: 68f8 ldr r0, [r7, #12] + 803d3b4: f7ff fee6 bl 803d184 + 803d3b8: 4603 mov r3, r0 + 803d3ba: 2b00 cmp r3, #0 + 803d3bc: d002 beq.n 803d3c4 LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n")); return ERR_VAL; - 803d38e: f06f 0305 mvn.w r3, #5 - 803d392: e043 b.n 803d41c + 803d3be: f06f 0305 mvn.w r3, #5 + 803d3c2: e043 b.n 803d44c for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) { - 803d394: 68fb ldr r3, [r7, #12] - 803d396: 681b ldr r3, [r3, #0] - 803d398: 60fb str r3, [r7, #12] - 803d39a: 68fb ldr r3, [r7, #12] - 803d39c: 681b ldr r3, [r3, #0] - 803d39e: 2b00 cmp r3, #0 - 803d3a0: d1ef bne.n 803d382 + 803d3c4: 68fb ldr r3, [r7, #12] + 803d3c6: 681b ldr r3, [r3, #0] + 803d3c8: 60fb str r3, [r7, #12] + 803d3ca: 68fb ldr r3, [r7, #12] + 803d3cc: 681b ldr r3, [r3, #0] + 803d3ce: 2b00 cmp r3, #0 + 803d3d0: d1ef bne.n 803d3b2 } } if (tcp_output_segment_busy(seg)) { - 803d3a2: 68f8 ldr r0, [r7, #12] - 803d3a4: f7ff fed6 bl 803d154 - 803d3a8: 4603 mov r3, r0 - 803d3aa: 2b00 cmp r3, #0 - 803d3ac: d002 beq.n 803d3b4 + 803d3d2: 68f8 ldr r0, [r7, #12] + 803d3d4: f7ff fed6 bl 803d184 + 803d3d8: 4603 mov r3, r0 + 803d3da: 2b00 cmp r3, #0 + 803d3dc: d002 beq.n 803d3e4 LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n")); return ERR_VAL; - 803d3ae: f06f 0305 mvn.w r3, #5 - 803d3b2: e033 b.n 803d41c + 803d3de: f06f 0305 mvn.w r3, #5 + 803d3e2: e033 b.n 803d44c } /* concatenate unsent queue after unacked queue */ seg->next = pcb->unsent; - 803d3b4: 687b ldr r3, [r7, #4] - 803d3b6: 6eda ldr r2, [r3, #108] ; 0x6c - 803d3b8: 68fb ldr r3, [r7, #12] - 803d3ba: 601a str r2, [r3, #0] + 803d3e4: 687b ldr r3, [r7, #4] + 803d3e6: 6eda ldr r2, [r3, #108] ; 0x6c + 803d3e8: 68fb ldr r3, [r7, #12] + 803d3ea: 601a str r2, [r3, #0] if (pcb->unsent == NULL) { pcb->unsent_oversize = seg->oversize_left; } #endif /* TCP_OVERSIZE_DBGCHECK */ /* unsent queue is the concatenated queue (of unacked, unsent) */ pcb->unsent = pcb->unacked; - 803d3bc: 687b ldr r3, [r7, #4] - 803d3be: 6f1a ldr r2, [r3, #112] ; 0x70 - 803d3c0: 687b ldr r3, [r7, #4] - 803d3c2: 66da str r2, [r3, #108] ; 0x6c + 803d3ec: 687b ldr r3, [r7, #4] + 803d3ee: 6f1a ldr r2, [r3, #112] ; 0x70 + 803d3f0: 687b ldr r3, [r7, #4] + 803d3f2: 66da str r2, [r3, #108] ; 0x6c /* unacked queue is now empty */ pcb->unacked = NULL; - 803d3c4: 687b ldr r3, [r7, #4] - 803d3c6: 2200 movs r2, #0 - 803d3c8: 671a str r2, [r3, #112] ; 0x70 + 803d3f4: 687b ldr r3, [r7, #4] + 803d3f6: 2200 movs r2, #0 + 803d3f8: 671a str r2, [r3, #112] ; 0x70 /* Mark RTO in-progress */ tcp_set_flags(pcb, TF_RTO); - 803d3ca: 687b ldr r3, [r7, #4] - 803d3cc: 8b5b ldrh r3, [r3, #26] - 803d3ce: f443 6300 orr.w r3, r3, #2048 ; 0x800 - 803d3d2: b29a uxth r2, r3 - 803d3d4: 687b ldr r3, [r7, #4] - 803d3d6: 835a strh r2, [r3, #26] + 803d3fa: 687b ldr r3, [r7, #4] + 803d3fc: 8b5b ldrh r3, [r3, #26] + 803d3fe: f443 6300 orr.w r3, r3, #2048 ; 0x800 + 803d402: b29a uxth r2, r3 + 803d404: 687b ldr r3, [r7, #4] + 803d406: 835a strh r2, [r3, #26] /* Record the next byte following retransmit */ pcb->rto_end = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg); - 803d3d8: 68fb ldr r3, [r7, #12] - 803d3da: 68db ldr r3, [r3, #12] - 803d3dc: 685b ldr r3, [r3, #4] - 803d3de: 4618 mov r0, r3 - 803d3e0: f7f8 fd77 bl 8035ed2 - 803d3e4: 4604 mov r4, r0 - 803d3e6: 68fb ldr r3, [r7, #12] - 803d3e8: 891b ldrh r3, [r3, #8] - 803d3ea: 461d mov r5, r3 - 803d3ec: 68fb ldr r3, [r7, #12] - 803d3ee: 68db ldr r3, [r3, #12] - 803d3f0: 899b ldrh r3, [r3, #12] - 803d3f2: b29b uxth r3, r3 - 803d3f4: 4618 mov r0, r3 - 803d3f6: f7f8 fd57 bl 8035ea8 - 803d3fa: 4603 mov r3, r0 - 803d3fc: b2db uxtb r3, r3 - 803d3fe: f003 0303 and.w r3, r3, #3 - 803d402: 2b00 cmp r3, #0 - 803d404: d001 beq.n 803d40a - 803d406: 2301 movs r3, #1 - 803d408: e000 b.n 803d40c - 803d40a: 2300 movs r3, #0 - 803d40c: 442b add r3, r5 - 803d40e: 18e2 adds r2, r4, r3 - 803d410: 687b ldr r3, [r7, #4] - 803d412: 64da str r2, [r3, #76] ; 0x4c + 803d408: 68fb ldr r3, [r7, #12] + 803d40a: 68db ldr r3, [r3, #12] + 803d40c: 685b ldr r3, [r3, #4] + 803d40e: 4618 mov r0, r3 + 803d410: f7f8 fd77 bl 8035f02 + 803d414: 4604 mov r4, r0 + 803d416: 68fb ldr r3, [r7, #12] + 803d418: 891b ldrh r3, [r3, #8] + 803d41a: 461d mov r5, r3 + 803d41c: 68fb ldr r3, [r7, #12] + 803d41e: 68db ldr r3, [r3, #12] + 803d420: 899b ldrh r3, [r3, #12] + 803d422: b29b uxth r3, r3 + 803d424: 4618 mov r0, r3 + 803d426: f7f8 fd57 bl 8035ed8 + 803d42a: 4603 mov r3, r0 + 803d42c: b2db uxtb r3, r3 + 803d42e: f003 0303 and.w r3, r3, #3 + 803d432: 2b00 cmp r3, #0 + 803d434: d001 beq.n 803d43a + 803d436: 2301 movs r3, #1 + 803d438: e000 b.n 803d43c + 803d43a: 2300 movs r3, #0 + 803d43c: 442b add r3, r5 + 803d43e: 18e2 adds r2, r4, r3 + 803d440: 687b ldr r3, [r7, #4] + 803d442: 64da str r2, [r3, #76] ; 0x4c /* Don't take any RTT measurements after retransmitting. */ pcb->rttest = 0; - 803d414: 687b ldr r3, [r7, #4] - 803d416: 2200 movs r2, #0 - 803d418: 635a str r2, [r3, #52] ; 0x34 + 803d444: 687b ldr r3, [r7, #4] + 803d446: 2200 movs r2, #0 + 803d448: 635a str r2, [r3, #52] ; 0x34 return ERR_OK; - 803d41a: 2300 movs r3, #0 + 803d44a: 2300 movs r3, #0 } - 803d41c: 4618 mov r0, r3 - 803d41e: 3710 adds r7, #16 - 803d420: 46bd mov sp, r7 - 803d422: bdb0 pop {r4, r5, r7, pc} - 803d424: 08043950 .word 0x08043950 - 803d428: 08043f8c .word 0x08043f8c - 803d42c: 080439a4 .word 0x080439a4 + 803d44c: 4618 mov r0, r3 + 803d44e: 3710 adds r7, #16 + 803d450: 46bd mov sp, r7 + 803d452: bdb0 pop {r4, r5, r7, pc} + 803d454: 08043980 .word 0x08043980 + 803d458: 08043fbc .word 0x08043fbc + 803d45c: 080439d4 .word 0x080439d4 -0803d430 : +0803d460 : * * @param pcb the tcp_pcb for which to re-enqueue all unacked segments */ void tcp_rexmit_rto_commit(struct tcp_pcb *pcb) { - 803d430: b580 push {r7, lr} - 803d432: b082 sub sp, #8 - 803d434: af00 add r7, sp, #0 - 803d436: 6078 str r0, [r7, #4] + 803d460: b580 push {r7, lr} + 803d462: b082 sub sp, #8 + 803d464: af00 add r7, sp, #0 + 803d466: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_rexmit_rto_commit: invalid pcb", pcb != NULL); - 803d438: 687b ldr r3, [r7, #4] - 803d43a: 2b00 cmp r3, #0 - 803d43c: d106 bne.n 803d44c - 803d43e: 4b0d ldr r3, [pc, #52] ; (803d474 ) - 803d440: f44f 62d3 mov.w r2, #1688 ; 0x698 - 803d444: 490c ldr r1, [pc, #48] ; (803d478 ) - 803d446: 480d ldr r0, [pc, #52] ; (803d47c ) - 803d448: f003 fb4a bl 8040ae0 + 803d468: 687b ldr r3, [r7, #4] + 803d46a: 2b00 cmp r3, #0 + 803d46c: d106 bne.n 803d47c + 803d46e: 4b0d ldr r3, [pc, #52] ; (803d4a4 ) + 803d470: f44f 62d3 mov.w r2, #1688 ; 0x698 + 803d474: 490c ldr r1, [pc, #48] ; (803d4a8 ) + 803d476: 480d ldr r0, [pc, #52] ; (803d4ac ) + 803d478: f003 fb4a bl 8040b10 /* increment number of retransmissions */ if (pcb->nrtx < 0xFF) { - 803d44c: 687b ldr r3, [r7, #4] - 803d44e: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803d452: 2bff cmp r3, #255 ; 0xff - 803d454: d007 beq.n 803d466 + 803d47c: 687b ldr r3, [r7, #4] + 803d47e: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803d482: 2bff cmp r3, #255 ; 0xff + 803d484: d007 beq.n 803d496 ++pcb->nrtx; - 803d456: 687b ldr r3, [r7, #4] - 803d458: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803d45c: 3301 adds r3, #1 - 803d45e: b2da uxtb r2, r3 - 803d460: 687b ldr r3, [r7, #4] - 803d462: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 803d486: 687b ldr r3, [r7, #4] + 803d488: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803d48c: 3301 adds r3, #1 + 803d48e: b2da uxtb r2, r3 + 803d490: 687b ldr r3, [r7, #4] + 803d492: f883 2042 strb.w r2, [r3, #66] ; 0x42 } /* Do the actual retransmission */ tcp_output(pcb); - 803d466: 6878 ldr r0, [r7, #4] - 803d468: f7ff fc80 bl 803cd6c -} - 803d46c: bf00 nop - 803d46e: 3708 adds r7, #8 - 803d470: 46bd mov sp, r7 - 803d472: bd80 pop {r7, pc} - 803d474: 08043950 .word 0x08043950 - 803d478: 08043fb0 .word 0x08043fb0 - 803d47c: 080439a4 .word 0x080439a4 - -0803d480 : + 803d496: 6878 ldr r0, [r7, #4] + 803d498: f7ff fc80 bl 803cd9c +} + 803d49c: bf00 nop + 803d49e: 3708 adds r7, #8 + 803d4a0: 46bd mov sp, r7 + 803d4a2: bd80 pop {r7, pc} + 803d4a4: 08043980 .word 0x08043980 + 803d4a8: 08043fe0 .word 0x08043fe0 + 803d4ac: 080439d4 .word 0x080439d4 + +0803d4b0 : * * @param pcb the tcp_pcb for which to re-enqueue all unacked segments */ void tcp_rexmit_rto(struct tcp_pcb *pcb) { - 803d480: b580 push {r7, lr} - 803d482: b082 sub sp, #8 - 803d484: af00 add r7, sp, #0 - 803d486: 6078 str r0, [r7, #4] + 803d4b0: b580 push {r7, lr} + 803d4b2: b082 sub sp, #8 + 803d4b4: af00 add r7, sp, #0 + 803d4b6: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_rexmit_rto: invalid pcb", pcb != NULL); - 803d488: 687b ldr r3, [r7, #4] - 803d48a: 2b00 cmp r3, #0 - 803d48c: d106 bne.n 803d49c - 803d48e: 4b0a ldr r3, [pc, #40] ; (803d4b8 ) - 803d490: f240 62ad movw r2, #1709 ; 0x6ad - 803d494: 4909 ldr r1, [pc, #36] ; (803d4bc ) - 803d496: 480a ldr r0, [pc, #40] ; (803d4c0 ) - 803d498: f003 fb22 bl 8040ae0 + 803d4b8: 687b ldr r3, [r7, #4] + 803d4ba: 2b00 cmp r3, #0 + 803d4bc: d106 bne.n 803d4cc + 803d4be: 4b0a ldr r3, [pc, #40] ; (803d4e8 ) + 803d4c0: f240 62ad movw r2, #1709 ; 0x6ad + 803d4c4: 4909 ldr r1, [pc, #36] ; (803d4ec ) + 803d4c6: 480a ldr r0, [pc, #40] ; (803d4f0 ) + 803d4c8: f003 fb22 bl 8040b10 if (tcp_rexmit_rto_prepare(pcb) == ERR_OK) { - 803d49c: 6878 ldr r0, [r7, #4] - 803d49e: f7ff ff57 bl 803d350 - 803d4a2: 4603 mov r3, r0 - 803d4a4: 2b00 cmp r3, #0 - 803d4a6: d102 bne.n 803d4ae + 803d4cc: 6878 ldr r0, [r7, #4] + 803d4ce: f7ff ff57 bl 803d380 + 803d4d2: 4603 mov r3, r0 + 803d4d4: 2b00 cmp r3, #0 + 803d4d6: d102 bne.n 803d4de tcp_rexmit_rto_commit(pcb); - 803d4a8: 6878 ldr r0, [r7, #4] - 803d4aa: f7ff ffc1 bl 803d430 + 803d4d8: 6878 ldr r0, [r7, #4] + 803d4da: f7ff ffc1 bl 803d460 } } - 803d4ae: bf00 nop - 803d4b0: 3708 adds r7, #8 - 803d4b2: 46bd mov sp, r7 - 803d4b4: bd80 pop {r7, pc} - 803d4b6: bf00 nop - 803d4b8: 08043950 .word 0x08043950 - 803d4bc: 08043fd4 .word 0x08043fd4 - 803d4c0: 080439a4 .word 0x080439a4 + 803d4de: bf00 nop + 803d4e0: 3708 adds r7, #8 + 803d4e2: 46bd mov sp, r7 + 803d4e4: bd80 pop {r7, pc} + 803d4e6: bf00 nop + 803d4e8: 08043980 .word 0x08043980 + 803d4ec: 08044004 .word 0x08044004 + 803d4f0: 080439d4 .word 0x080439d4 -0803d4c4 : +0803d4f4 : * * @param pcb the tcp_pcb for which to retransmit the first unacked segment */ err_t tcp_rexmit(struct tcp_pcb *pcb) { - 803d4c4: b590 push {r4, r7, lr} - 803d4c6: b085 sub sp, #20 - 803d4c8: af00 add r7, sp, #0 - 803d4ca: 6078 str r0, [r7, #4] + 803d4f4: b590 push {r4, r7, lr} + 803d4f6: b085 sub sp, #20 + 803d4f8: af00 add r7, sp, #0 + 803d4fa: 6078 str r0, [r7, #4] struct tcp_seg *seg; struct tcp_seg **cur_seg; LWIP_ASSERT("tcp_rexmit: invalid pcb", pcb != NULL); - 803d4cc: 687b ldr r3, [r7, #4] - 803d4ce: 2b00 cmp r3, #0 - 803d4d0: d106 bne.n 803d4e0 - 803d4d2: 4b2f ldr r3, [pc, #188] ; (803d590 ) - 803d4d4: f240 62c1 movw r2, #1729 ; 0x6c1 - 803d4d8: 492e ldr r1, [pc, #184] ; (803d594 ) - 803d4da: 482f ldr r0, [pc, #188] ; (803d598 ) - 803d4dc: f003 fb00 bl 8040ae0 + 803d4fc: 687b ldr r3, [r7, #4] + 803d4fe: 2b00 cmp r3, #0 + 803d500: d106 bne.n 803d510 + 803d502: 4b2f ldr r3, [pc, #188] ; (803d5c0 ) + 803d504: f240 62c1 movw r2, #1729 ; 0x6c1 + 803d508: 492e ldr r1, [pc, #184] ; (803d5c4 ) + 803d50a: 482f ldr r0, [pc, #188] ; (803d5c8 ) + 803d50c: f003 fb00 bl 8040b10 if (pcb->unacked == NULL) { - 803d4e0: 687b ldr r3, [r7, #4] - 803d4e2: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d4e4: 2b00 cmp r3, #0 - 803d4e6: d102 bne.n 803d4ee + 803d510: 687b ldr r3, [r7, #4] + 803d512: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d514: 2b00 cmp r3, #0 + 803d516: d102 bne.n 803d51e return ERR_VAL; - 803d4e8: f06f 0305 mvn.w r3, #5 - 803d4ec: e04c b.n 803d588 + 803d518: f06f 0305 mvn.w r3, #5 + 803d51c: e04c b.n 803d5b8 } seg = pcb->unacked; - 803d4ee: 687b ldr r3, [r7, #4] - 803d4f0: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d4f2: 60bb str r3, [r7, #8] + 803d51e: 687b ldr r3, [r7, #4] + 803d520: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d522: 60bb str r3, [r7, #8] /* Give up if the segment is still referenced by the netif driver due to deferred transmission. */ if (tcp_output_segment_busy(seg)) { - 803d4f4: 68b8 ldr r0, [r7, #8] - 803d4f6: f7ff fe2d bl 803d154 - 803d4fa: 4603 mov r3, r0 - 803d4fc: 2b00 cmp r3, #0 - 803d4fe: d002 beq.n 803d506 + 803d524: 68b8 ldr r0, [r7, #8] + 803d526: f7ff fe2d bl 803d184 + 803d52a: 4603 mov r3, r0 + 803d52c: 2b00 cmp r3, #0 + 803d52e: d002 beq.n 803d536 LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit busy\n")); return ERR_VAL; - 803d500: f06f 0305 mvn.w r3, #5 - 803d504: e040 b.n 803d588 + 803d530: f06f 0305 mvn.w r3, #5 + 803d534: e040 b.n 803d5b8 } /* Move the first unacked segment to the unsent queue */ /* Keep the unsent queue sorted. */ pcb->unacked = seg->next; - 803d506: 68bb ldr r3, [r7, #8] - 803d508: 681a ldr r2, [r3, #0] - 803d50a: 687b ldr r3, [r7, #4] - 803d50c: 671a str r2, [r3, #112] ; 0x70 + 803d536: 68bb ldr r3, [r7, #8] + 803d538: 681a ldr r2, [r3, #0] + 803d53a: 687b ldr r3, [r7, #4] + 803d53c: 671a str r2, [r3, #112] ; 0x70 cur_seg = &(pcb->unsent); - 803d50e: 687b ldr r3, [r7, #4] - 803d510: 336c adds r3, #108 ; 0x6c - 803d512: 60fb str r3, [r7, #12] + 803d53e: 687b ldr r3, [r7, #4] + 803d540: 336c adds r3, #108 ; 0x6c + 803d542: 60fb str r3, [r7, #12] while (*cur_seg && - 803d514: e002 b.n 803d51c + 803d544: e002 b.n 803d54c TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) { cur_seg = &((*cur_seg)->next ); - 803d516: 68fb ldr r3, [r7, #12] - 803d518: 681b ldr r3, [r3, #0] - 803d51a: 60fb str r3, [r7, #12] + 803d546: 68fb ldr r3, [r7, #12] + 803d548: 681b ldr r3, [r3, #0] + 803d54a: 60fb str r3, [r7, #12] while (*cur_seg && - 803d51c: 68fb ldr r3, [r7, #12] - 803d51e: 681b ldr r3, [r3, #0] - 803d520: 2b00 cmp r3, #0 - 803d522: d011 beq.n 803d548 + 803d54c: 68fb ldr r3, [r7, #12] + 803d54e: 681b ldr r3, [r3, #0] + 803d550: 2b00 cmp r3, #0 + 803d552: d011 beq.n 803d578 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) { - 803d524: 68fb ldr r3, [r7, #12] - 803d526: 681b ldr r3, [r3, #0] - 803d528: 68db ldr r3, [r3, #12] - 803d52a: 685b ldr r3, [r3, #4] - 803d52c: 4618 mov r0, r3 - 803d52e: f7f8 fcd0 bl 8035ed2 - 803d532: 4604 mov r4, r0 - 803d534: 68bb ldr r3, [r7, #8] - 803d536: 68db ldr r3, [r3, #12] - 803d538: 685b ldr r3, [r3, #4] - 803d53a: 4618 mov r0, r3 - 803d53c: f7f8 fcc9 bl 8035ed2 - 803d540: 4603 mov r3, r0 - 803d542: 1ae3 subs r3, r4, r3 + 803d554: 68fb ldr r3, [r7, #12] + 803d556: 681b ldr r3, [r3, #0] + 803d558: 68db ldr r3, [r3, #12] + 803d55a: 685b ldr r3, [r3, #4] + 803d55c: 4618 mov r0, r3 + 803d55e: f7f8 fcd0 bl 8035f02 + 803d562: 4604 mov r4, r0 + 803d564: 68bb ldr r3, [r7, #8] + 803d566: 68db ldr r3, [r3, #12] + 803d568: 685b ldr r3, [r3, #4] + 803d56a: 4618 mov r0, r3 + 803d56c: f7f8 fcc9 bl 8035f02 + 803d570: 4603 mov r3, r0 + 803d572: 1ae3 subs r3, r4, r3 while (*cur_seg && - 803d544: 2b00 cmp r3, #0 - 803d546: dbe6 blt.n 803d516 + 803d574: 2b00 cmp r3, #0 + 803d576: dbe6 blt.n 803d546 } seg->next = *cur_seg; - 803d548: 68fb ldr r3, [r7, #12] - 803d54a: 681a ldr r2, [r3, #0] - 803d54c: 68bb ldr r3, [r7, #8] - 803d54e: 601a str r2, [r3, #0] + 803d578: 68fb ldr r3, [r7, #12] + 803d57a: 681a ldr r2, [r3, #0] + 803d57c: 68bb ldr r3, [r7, #8] + 803d57e: 601a str r2, [r3, #0] *cur_seg = seg; - 803d550: 68fb ldr r3, [r7, #12] - 803d552: 68ba ldr r2, [r7, #8] - 803d554: 601a str r2, [r3, #0] + 803d580: 68fb ldr r3, [r7, #12] + 803d582: 68ba ldr r2, [r7, #8] + 803d584: 601a str r2, [r3, #0] #if TCP_OVERSIZE if (seg->next == NULL) { - 803d556: 68bb ldr r3, [r7, #8] - 803d558: 681b ldr r3, [r3, #0] - 803d55a: 2b00 cmp r3, #0 - 803d55c: d103 bne.n 803d566 + 803d586: 68bb ldr r3, [r7, #8] + 803d588: 681b ldr r3, [r3, #0] + 803d58a: 2b00 cmp r3, #0 + 803d58c: d103 bne.n 803d596 /* the retransmitted segment is last in unsent, so reset unsent_oversize */ pcb->unsent_oversize = 0; - 803d55e: 687b ldr r3, [r7, #4] - 803d560: 2200 movs r2, #0 - 803d562: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803d58e: 687b ldr r3, [r7, #4] + 803d590: 2200 movs r2, #0 + 803d592: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 } #endif /* TCP_OVERSIZE */ if (pcb->nrtx < 0xFF) { - 803d566: 687b ldr r3, [r7, #4] - 803d568: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803d56c: 2bff cmp r3, #255 ; 0xff - 803d56e: d007 beq.n 803d580 + 803d596: 687b ldr r3, [r7, #4] + 803d598: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803d59c: 2bff cmp r3, #255 ; 0xff + 803d59e: d007 beq.n 803d5b0 ++pcb->nrtx; - 803d570: 687b ldr r3, [r7, #4] - 803d572: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803d576: 3301 adds r3, #1 - 803d578: b2da uxtb r2, r3 - 803d57a: 687b ldr r3, [r7, #4] - 803d57c: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 803d5a0: 687b ldr r3, [r7, #4] + 803d5a2: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803d5a6: 3301 adds r3, #1 + 803d5a8: b2da uxtb r2, r3 + 803d5aa: 687b ldr r3, [r7, #4] + 803d5ac: f883 2042 strb.w r2, [r3, #66] ; 0x42 } /* Don't take any rtt measurements after retransmitting. */ pcb->rttest = 0; - 803d580: 687b ldr r3, [r7, #4] - 803d582: 2200 movs r2, #0 - 803d584: 635a str r2, [r3, #52] ; 0x34 + 803d5b0: 687b ldr r3, [r7, #4] + 803d5b2: 2200 movs r2, #0 + 803d5b4: 635a str r2, [r3, #52] ; 0x34 /* Do the actual retransmission. */ MIB2_STATS_INC(mib2.tcpretranssegs); /* No need to call tcp_output: we are always called from tcp_input() and thus tcp_output directly returns. */ return ERR_OK; - 803d586: 2300 movs r3, #0 + 803d5b6: 2300 movs r3, #0 } - 803d588: 4618 mov r0, r3 - 803d58a: 3714 adds r7, #20 - 803d58c: 46bd mov sp, r7 - 803d58e: bd90 pop {r4, r7, pc} - 803d590: 08043950 .word 0x08043950 - 803d594: 08043ff0 .word 0x08043ff0 - 803d598: 080439a4 .word 0x080439a4 + 803d5b8: 4618 mov r0, r3 + 803d5ba: 3714 adds r7, #20 + 803d5bc: 46bd mov sp, r7 + 803d5be: bd90 pop {r4, r7, pc} + 803d5c0: 08043980 .word 0x08043980 + 803d5c4: 08044020 .word 0x08044020 + 803d5c8: 080439d4 .word 0x080439d4 -0803d59c : +0803d5cc : * * @param pcb the tcp_pcb for which to retransmit the first unacked segment */ void tcp_rexmit_fast(struct tcp_pcb *pcb) { - 803d59c: b580 push {r7, lr} - 803d59e: b082 sub sp, #8 - 803d5a0: af00 add r7, sp, #0 - 803d5a2: 6078 str r0, [r7, #4] + 803d5cc: b580 push {r7, lr} + 803d5ce: b082 sub sp, #8 + 803d5d0: af00 add r7, sp, #0 + 803d5d2: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_rexmit_fast: invalid pcb", pcb != NULL); - 803d5a4: 687b ldr r3, [r7, #4] - 803d5a6: 2b00 cmp r3, #0 - 803d5a8: d106 bne.n 803d5b8 - 803d5aa: 4b2a ldr r3, [pc, #168] ; (803d654 ) - 803d5ac: f240 62f9 movw r2, #1785 ; 0x6f9 - 803d5b0: 4929 ldr r1, [pc, #164] ; (803d658 ) - 803d5b2: 482a ldr r0, [pc, #168] ; (803d65c ) - 803d5b4: f003 fa94 bl 8040ae0 + 803d5d4: 687b ldr r3, [r7, #4] + 803d5d6: 2b00 cmp r3, #0 + 803d5d8: d106 bne.n 803d5e8 + 803d5da: 4b2a ldr r3, [pc, #168] ; (803d684 ) + 803d5dc: f240 62f9 movw r2, #1785 ; 0x6f9 + 803d5e0: 4929 ldr r1, [pc, #164] ; (803d688 ) + 803d5e2: 482a ldr r0, [pc, #168] ; (803d68c ) + 803d5e4: f003 fa94 bl 8040b10 if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) { - 803d5b8: 687b ldr r3, [r7, #4] - 803d5ba: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d5bc: 2b00 cmp r3, #0 - 803d5be: d045 beq.n 803d64c - 803d5c0: 687b ldr r3, [r7, #4] - 803d5c2: 8b5b ldrh r3, [r3, #26] - 803d5c4: f003 0304 and.w r3, r3, #4 - 803d5c8: 2b00 cmp r3, #0 - 803d5ca: d13f bne.n 803d64c + 803d5e8: 687b ldr r3, [r7, #4] + 803d5ea: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d5ec: 2b00 cmp r3, #0 + 803d5ee: d045 beq.n 803d67c + 803d5f0: 687b ldr r3, [r7, #4] + 803d5f2: 8b5b ldrh r3, [r3, #26] + 803d5f4: f003 0304 and.w r3, r3, #4 + 803d5f8: 2b00 cmp r3, #0 + 803d5fa: d13f bne.n 803d67c LWIP_DEBUGF(TCP_FR_DEBUG, ("tcp_receive: dupacks %"U16_F" (%"U32_F "), fast retransmit %"U32_F"\n", (u16_t)pcb->dupacks, pcb->lastack, lwip_ntohl(pcb->unacked->tcphdr->seqno))); if (tcp_rexmit(pcb) == ERR_OK) { - 803d5cc: 6878 ldr r0, [r7, #4] - 803d5ce: f7ff ff79 bl 803d4c4 - 803d5d2: 4603 mov r3, r0 - 803d5d4: 2b00 cmp r3, #0 - 803d5d6: d139 bne.n 803d64c + 803d5fc: 6878 ldr r0, [r7, #4] + 803d5fe: f7ff ff79 bl 803d4f4 + 803d602: 4603 mov r3, r0 + 803d604: 2b00 cmp r3, #0 + 803d606: d139 bne.n 803d67c /* Set ssthresh to half of the minimum of the current * cwnd and the advertised window */ pcb->ssthresh = LWIP_MIN(pcb->cwnd, pcb->snd_wnd) / 2; - 803d5d8: 687b ldr r3, [r7, #4] - 803d5da: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 803d5de: 687b ldr r3, [r7, #4] - 803d5e0: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803d5e4: 4293 cmp r3, r2 - 803d5e6: bf28 it cs - 803d5e8: 4613 movcs r3, r2 - 803d5ea: b29b uxth r3, r3 - 803d5ec: 2b00 cmp r3, #0 - 803d5ee: da00 bge.n 803d5f2 - 803d5f0: 3301 adds r3, #1 - 803d5f2: 105b asrs r3, r3, #1 - 803d5f4: b29a uxth r2, r3 - 803d5f6: 687b ldr r3, [r7, #4] - 803d5f8: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 803d608: 687b ldr r3, [r7, #4] + 803d60a: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 803d60e: 687b ldr r3, [r7, #4] + 803d610: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803d614: 4293 cmp r3, r2 + 803d616: bf28 it cs + 803d618: 4613 movcs r3, r2 + 803d61a: b29b uxth r3, r3 + 803d61c: 2b00 cmp r3, #0 + 803d61e: da00 bge.n 803d622 + 803d620: 3301 adds r3, #1 + 803d622: 105b asrs r3, r3, #1 + 803d624: b29a uxth r2, r3 + 803d626: 687b ldr r3, [r7, #4] + 803d628: f8a3 204a strh.w r2, [r3, #74] ; 0x4a /* The minimum value for ssthresh should be 2 MSS */ if (pcb->ssthresh < (2U * pcb->mss)) { - 803d5fc: 687b ldr r3, [r7, #4] - 803d5fe: f8b3 304a ldrh.w r3, [r3, #74] ; 0x4a - 803d602: 461a mov r2, r3 - 803d604: 687b ldr r3, [r7, #4] - 803d606: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803d608: 005b lsls r3, r3, #1 - 803d60a: 429a cmp r2, r3 - 803d60c: d206 bcs.n 803d61c + 803d62c: 687b ldr r3, [r7, #4] + 803d62e: f8b3 304a ldrh.w r3, [r3, #74] ; 0x4a + 803d632: 461a mov r2, r3 + 803d634: 687b ldr r3, [r7, #4] + 803d636: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803d638: 005b lsls r3, r3, #1 + 803d63a: 429a cmp r2, r3 + 803d63c: d206 bcs.n 803d64c LWIP_DEBUGF(TCP_FR_DEBUG, ("tcp_receive: The minimum value for ssthresh %"TCPWNDSIZE_F " should be min 2 mss %"U16_F"...\n", pcb->ssthresh, (u16_t)(2 * pcb->mss))); pcb->ssthresh = 2 * pcb->mss; - 803d60e: 687b ldr r3, [r7, #4] - 803d610: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803d612: 005b lsls r3, r3, #1 - 803d614: b29a uxth r2, r3 - 803d616: 687b ldr r3, [r7, #4] - 803d618: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 803d63e: 687b ldr r3, [r7, #4] + 803d640: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803d642: 005b lsls r3, r3, #1 + 803d644: b29a uxth r2, r3 + 803d646: 687b ldr r3, [r7, #4] + 803d648: f8a3 204a strh.w r2, [r3, #74] ; 0x4a } pcb->cwnd = pcb->ssthresh + 3 * pcb->mss; - 803d61c: 687b ldr r3, [r7, #4] - 803d61e: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a - 803d622: 687b ldr r3, [r7, #4] - 803d624: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803d626: 4619 mov r1, r3 - 803d628: 0049 lsls r1, r1, #1 - 803d62a: 440b add r3, r1 - 803d62c: b29b uxth r3, r3 - 803d62e: 4413 add r3, r2 - 803d630: b29a uxth r2, r3 - 803d632: 687b ldr r3, [r7, #4] - 803d634: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803d64c: 687b ldr r3, [r7, #4] + 803d64e: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a + 803d652: 687b ldr r3, [r7, #4] + 803d654: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803d656: 4619 mov r1, r3 + 803d658: 0049 lsls r1, r1, #1 + 803d65a: 440b add r3, r1 + 803d65c: b29b uxth r3, r3 + 803d65e: 4413 add r3, r2 + 803d660: b29a uxth r2, r3 + 803d662: 687b ldr r3, [r7, #4] + 803d664: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 tcp_set_flags(pcb, TF_INFR); - 803d638: 687b ldr r3, [r7, #4] - 803d63a: 8b5b ldrh r3, [r3, #26] - 803d63c: f043 0304 orr.w r3, r3, #4 - 803d640: b29a uxth r2, r3 - 803d642: 687b ldr r3, [r7, #4] - 803d644: 835a strh r2, [r3, #26] + 803d668: 687b ldr r3, [r7, #4] + 803d66a: 8b5b ldrh r3, [r3, #26] + 803d66c: f043 0304 orr.w r3, r3, #4 + 803d670: b29a uxth r2, r3 + 803d672: 687b ldr r3, [r7, #4] + 803d674: 835a strh r2, [r3, #26] /* Reset the retransmission timer to prevent immediate rto retransmissions */ pcb->rtime = 0; - 803d646: 687b ldr r3, [r7, #4] - 803d648: 2200 movs r2, #0 - 803d64a: 861a strh r2, [r3, #48] ; 0x30 + 803d676: 687b ldr r3, [r7, #4] + 803d678: 2200 movs r2, #0 + 803d67a: 861a strh r2, [r3, #48] ; 0x30 } } } - 803d64c: bf00 nop - 803d64e: 3708 adds r7, #8 - 803d650: 46bd mov sp, r7 - 803d652: bd80 pop {r7, pc} - 803d654: 08043950 .word 0x08043950 - 803d658: 08044008 .word 0x08044008 - 803d65c: 080439a4 .word 0x080439a4 + 803d67c: bf00 nop + 803d67e: 3708 adds r7, #8 + 803d680: 46bd mov sp, r7 + 803d682: bd80 pop {r7, pc} + 803d684: 08043980 .word 0x08043980 + 803d688: 08044038 .word 0x08044038 + 803d68c: 080439d4 .word 0x080439d4 -0803d660 : +0803d690 : static struct pbuf * tcp_output_alloc_header_common(u32_t ackno, u16_t optlen, u16_t datalen, u32_t seqno_be /* already in network byte order */, u16_t src_port, u16_t dst_port, u8_t flags, u16_t wnd) { - 803d660: b580 push {r7, lr} - 803d662: b086 sub sp, #24 - 803d664: af00 add r7, sp, #0 - 803d666: 60f8 str r0, [r7, #12] - 803d668: 607b str r3, [r7, #4] - 803d66a: 460b mov r3, r1 - 803d66c: 817b strh r3, [r7, #10] - 803d66e: 4613 mov r3, r2 - 803d670: 813b strh r3, [r7, #8] + 803d690: b580 push {r7, lr} + 803d692: b086 sub sp, #24 + 803d694: af00 add r7, sp, #0 + 803d696: 60f8 str r0, [r7, #12] + 803d698: 607b str r3, [r7, #4] + 803d69a: 460b mov r3, r1 + 803d69c: 817b strh r3, [r7, #10] + 803d69e: 4613 mov r3, r2 + 803d6a0: 813b strh r3, [r7, #8] struct tcp_hdr *tcphdr; struct pbuf *p; p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM); - 803d672: 897a ldrh r2, [r7, #10] - 803d674: 893b ldrh r3, [r7, #8] - 803d676: 4413 add r3, r2 - 803d678: b29b uxth r3, r3 - 803d67a: 3314 adds r3, #20 - 803d67c: b29b uxth r3, r3 - 803d67e: f44f 7220 mov.w r2, #640 ; 0x280 - 803d682: 4619 mov r1, r3 - 803d684: 2022 movs r0, #34 ; 0x22 - 803d686: f7f9 fd5d bl 8037144 - 803d68a: 6178 str r0, [r7, #20] + 803d6a2: 897a ldrh r2, [r7, #10] + 803d6a4: 893b ldrh r3, [r7, #8] + 803d6a6: 4413 add r3, r2 + 803d6a8: b29b uxth r3, r3 + 803d6aa: 3314 adds r3, #20 + 803d6ac: b29b uxth r3, r3 + 803d6ae: f44f 7220 mov.w r2, #640 ; 0x280 + 803d6b2: 4619 mov r1, r3 + 803d6b4: 2022 movs r0, #34 ; 0x22 + 803d6b6: f7f9 fd5d bl 8037174 + 803d6ba: 6178 str r0, [r7, #20] if (p != NULL) { - 803d68c: 697b ldr r3, [r7, #20] - 803d68e: 2b00 cmp r3, #0 - 803d690: d04d beq.n 803d72e + 803d6bc: 697b ldr r3, [r7, #20] + 803d6be: 2b00 cmp r3, #0 + 803d6c0: d04d beq.n 803d75e LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", - 803d692: 897b ldrh r3, [r7, #10] - 803d694: 3313 adds r3, #19 - 803d696: 697a ldr r2, [r7, #20] - 803d698: 8952 ldrh r2, [r2, #10] - 803d69a: 4293 cmp r3, r2 - 803d69c: db06 blt.n 803d6ac - 803d69e: 4b26 ldr r3, [pc, #152] ; (803d738 ) - 803d6a0: f240 7223 movw r2, #1827 ; 0x723 - 803d6a4: 4925 ldr r1, [pc, #148] ; (803d73c ) - 803d6a6: 4826 ldr r0, [pc, #152] ; (803d740 ) - 803d6a8: f003 fa1a bl 8040ae0 + 803d6c2: 897b ldrh r3, [r7, #10] + 803d6c4: 3313 adds r3, #19 + 803d6c6: 697a ldr r2, [r7, #20] + 803d6c8: 8952 ldrh r2, [r2, #10] + 803d6ca: 4293 cmp r3, r2 + 803d6cc: db06 blt.n 803d6dc + 803d6ce: 4b26 ldr r3, [pc, #152] ; (803d768 ) + 803d6d0: f240 7223 movw r2, #1827 ; 0x723 + 803d6d4: 4925 ldr r1, [pc, #148] ; (803d76c ) + 803d6d6: 4826 ldr r0, [pc, #152] ; (803d770 ) + 803d6d8: f003 fa1a bl 8040b10 (p->len >= TCP_HLEN + optlen)); tcphdr = (struct tcp_hdr *)p->payload; - 803d6ac: 697b ldr r3, [r7, #20] - 803d6ae: 685b ldr r3, [r3, #4] - 803d6b0: 613b str r3, [r7, #16] + 803d6dc: 697b ldr r3, [r7, #20] + 803d6de: 685b ldr r3, [r3, #4] + 803d6e0: 613b str r3, [r7, #16] tcphdr->src = lwip_htons(src_port); - 803d6b2: 8c3b ldrh r3, [r7, #32] - 803d6b4: 4618 mov r0, r3 - 803d6b6: f7f8 fbf7 bl 8035ea8 - 803d6ba: 4603 mov r3, r0 - 803d6bc: 461a mov r2, r3 - 803d6be: 693b ldr r3, [r7, #16] - 803d6c0: 801a strh r2, [r3, #0] + 803d6e2: 8c3b ldrh r3, [r7, #32] + 803d6e4: 4618 mov r0, r3 + 803d6e6: f7f8 fbf7 bl 8035ed8 + 803d6ea: 4603 mov r3, r0 + 803d6ec: 461a mov r2, r3 + 803d6ee: 693b ldr r3, [r7, #16] + 803d6f0: 801a strh r2, [r3, #0] tcphdr->dest = lwip_htons(dst_port); - 803d6c2: 8cbb ldrh r3, [r7, #36] ; 0x24 - 803d6c4: 4618 mov r0, r3 - 803d6c6: f7f8 fbef bl 8035ea8 - 803d6ca: 4603 mov r3, r0 - 803d6cc: 461a mov r2, r3 - 803d6ce: 693b ldr r3, [r7, #16] - 803d6d0: 805a strh r2, [r3, #2] + 803d6f2: 8cbb ldrh r3, [r7, #36] ; 0x24 + 803d6f4: 4618 mov r0, r3 + 803d6f6: f7f8 fbef bl 8035ed8 + 803d6fa: 4603 mov r3, r0 + 803d6fc: 461a mov r2, r3 + 803d6fe: 693b ldr r3, [r7, #16] + 803d700: 805a strh r2, [r3, #2] tcphdr->seqno = seqno_be; - 803d6d2: 693b ldr r3, [r7, #16] - 803d6d4: 687a ldr r2, [r7, #4] - 803d6d6: 605a str r2, [r3, #4] + 803d702: 693b ldr r3, [r7, #16] + 803d704: 687a ldr r2, [r7, #4] + 803d706: 605a str r2, [r3, #4] tcphdr->ackno = lwip_htonl(ackno); - 803d6d8: 68f8 ldr r0, [r7, #12] - 803d6da: f7f8 fbfa bl 8035ed2 - 803d6de: 4602 mov r2, r0 - 803d6e0: 693b ldr r3, [r7, #16] - 803d6e2: 609a str r2, [r3, #8] + 803d708: 68f8 ldr r0, [r7, #12] + 803d70a: f7f8 fbfa bl 8035f02 + 803d70e: 4602 mov r2, r0 + 803d710: 693b ldr r3, [r7, #16] + 803d712: 609a str r2, [r3, #8] TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), flags); - 803d6e4: 897b ldrh r3, [r7, #10] - 803d6e6: 089b lsrs r3, r3, #2 - 803d6e8: b29b uxth r3, r3 - 803d6ea: 3305 adds r3, #5 - 803d6ec: b29b uxth r3, r3 - 803d6ee: 031b lsls r3, r3, #12 - 803d6f0: b29a uxth r2, r3 - 803d6f2: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 - 803d6f6: b29b uxth r3, r3 - 803d6f8: 4313 orrs r3, r2 - 803d6fa: b29b uxth r3, r3 - 803d6fc: 4618 mov r0, r3 - 803d6fe: f7f8 fbd3 bl 8035ea8 - 803d702: 4603 mov r3, r0 - 803d704: 461a mov r2, r3 - 803d706: 693b ldr r3, [r7, #16] - 803d708: 819a strh r2, [r3, #12] + 803d714: 897b ldrh r3, [r7, #10] + 803d716: 089b lsrs r3, r3, #2 + 803d718: b29b uxth r3, r3 + 803d71a: 3305 adds r3, #5 + 803d71c: b29b uxth r3, r3 + 803d71e: 031b lsls r3, r3, #12 + 803d720: b29a uxth r2, r3 + 803d722: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 + 803d726: b29b uxth r3, r3 + 803d728: 4313 orrs r3, r2 + 803d72a: b29b uxth r3, r3 + 803d72c: 4618 mov r0, r3 + 803d72e: f7f8 fbd3 bl 8035ed8 + 803d732: 4603 mov r3, r0 + 803d734: 461a mov r2, r3 + 803d736: 693b ldr r3, [r7, #16] + 803d738: 819a strh r2, [r3, #12] tcphdr->wnd = lwip_htons(wnd); - 803d70a: 8dbb ldrh r3, [r7, #44] ; 0x2c - 803d70c: 4618 mov r0, r3 - 803d70e: f7f8 fbcb bl 8035ea8 - 803d712: 4603 mov r3, r0 - 803d714: 461a mov r2, r3 - 803d716: 693b ldr r3, [r7, #16] - 803d718: 81da strh r2, [r3, #14] + 803d73a: 8dbb ldrh r3, [r7, #44] ; 0x2c + 803d73c: 4618 mov r0, r3 + 803d73e: f7f8 fbcb bl 8035ed8 + 803d742: 4603 mov r3, r0 + 803d744: 461a mov r2, r3 + 803d746: 693b ldr r3, [r7, #16] + 803d748: 81da strh r2, [r3, #14] tcphdr->chksum = 0; - 803d71a: 693b ldr r3, [r7, #16] - 803d71c: 2200 movs r2, #0 - 803d71e: 741a strb r2, [r3, #16] - 803d720: 2200 movs r2, #0 - 803d722: 745a strb r2, [r3, #17] + 803d74a: 693b ldr r3, [r7, #16] + 803d74c: 2200 movs r2, #0 + 803d74e: 741a strb r2, [r3, #16] + 803d750: 2200 movs r2, #0 + 803d752: 745a strb r2, [r3, #17] tcphdr->urgp = 0; - 803d724: 693b ldr r3, [r7, #16] - 803d726: 2200 movs r2, #0 - 803d728: 749a strb r2, [r3, #18] - 803d72a: 2200 movs r2, #0 - 803d72c: 74da strb r2, [r3, #19] + 803d754: 693b ldr r3, [r7, #16] + 803d756: 2200 movs r2, #0 + 803d758: 749a strb r2, [r3, #18] + 803d75a: 2200 movs r2, #0 + 803d75c: 74da strb r2, [r3, #19] } return p; - 803d72e: 697b ldr r3, [r7, #20] + 803d75e: 697b ldr r3, [r7, #20] } - 803d730: 4618 mov r0, r3 - 803d732: 3718 adds r7, #24 - 803d734: 46bd mov sp, r7 - 803d736: bd80 pop {r7, pc} - 803d738: 08043950 .word 0x08043950 - 803d73c: 08044028 .word 0x08044028 - 803d740: 080439a4 .word 0x080439a4 + 803d760: 4618 mov r0, r3 + 803d762: 3718 adds r7, #24 + 803d764: 46bd mov sp, r7 + 803d766: bd80 pop {r7, pc} + 803d768: 08043980 .word 0x08043980 + 803d76c: 08044058 .word 0x08044058 + 803d770: 080439d4 .word 0x080439d4 -0803d744 : +0803d774 : * @return pbuf with p->payload being the tcp_hdr */ static struct pbuf * tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen, u32_t seqno_be /* already in network byte order */) { - 803d744: b5b0 push {r4, r5, r7, lr} - 803d746: b08a sub sp, #40 ; 0x28 - 803d748: af04 add r7, sp, #16 - 803d74a: 60f8 str r0, [r7, #12] - 803d74c: 607b str r3, [r7, #4] - 803d74e: 460b mov r3, r1 - 803d750: 817b strh r3, [r7, #10] - 803d752: 4613 mov r3, r2 - 803d754: 813b strh r3, [r7, #8] + 803d774: b5b0 push {r4, r5, r7, lr} + 803d776: b08a sub sp, #40 ; 0x28 + 803d778: af04 add r7, sp, #16 + 803d77a: 60f8 str r0, [r7, #12] + 803d77c: 607b str r3, [r7, #4] + 803d77e: 460b mov r3, r1 + 803d780: 817b strh r3, [r7, #10] + 803d782: 4613 mov r3, r2 + 803d784: 813b strh r3, [r7, #8] struct pbuf *p; LWIP_ASSERT("tcp_output_alloc_header: invalid pcb", pcb != NULL); - 803d756: 68fb ldr r3, [r7, #12] - 803d758: 2b00 cmp r3, #0 - 803d75a: d106 bne.n 803d76a - 803d75c: 4b15 ldr r3, [pc, #84] ; (803d7b4 ) - 803d75e: f240 7242 movw r2, #1858 ; 0x742 - 803d762: 4915 ldr r1, [pc, #84] ; (803d7b8 ) - 803d764: 4815 ldr r0, [pc, #84] ; (803d7bc ) - 803d766: f003 f9bb bl 8040ae0 + 803d786: 68fb ldr r3, [r7, #12] + 803d788: 2b00 cmp r3, #0 + 803d78a: d106 bne.n 803d79a + 803d78c: 4b15 ldr r3, [pc, #84] ; (803d7e4 ) + 803d78e: f240 7242 movw r2, #1858 ; 0x742 + 803d792: 4915 ldr r1, [pc, #84] ; (803d7e8 ) + 803d794: 4815 ldr r0, [pc, #84] ; (803d7ec ) + 803d796: f003 f9bb bl 8040b10 p = tcp_output_alloc_header_common(pcb->rcv_nxt, optlen, datalen, - 803d76a: 68fb ldr r3, [r7, #12] - 803d76c: 6a58 ldr r0, [r3, #36] ; 0x24 - 803d76e: 68fb ldr r3, [r7, #12] - 803d770: 8adb ldrh r3, [r3, #22] - 803d772: 68fa ldr r2, [r7, #12] - 803d774: 8b12 ldrh r2, [r2, #24] - 803d776: 68f9 ldr r1, [r7, #12] - 803d778: 8d49 ldrh r1, [r1, #42] ; 0x2a - 803d77a: 893d ldrh r5, [r7, #8] - 803d77c: 897c ldrh r4, [r7, #10] - 803d77e: 9103 str r1, [sp, #12] - 803d780: 2110 movs r1, #16 - 803d782: 9102 str r1, [sp, #8] - 803d784: 9201 str r2, [sp, #4] - 803d786: 9300 str r3, [sp, #0] - 803d788: 687b ldr r3, [r7, #4] - 803d78a: 462a mov r2, r5 - 803d78c: 4621 mov r1, r4 - 803d78e: f7ff ff67 bl 803d660 - 803d792: 6178 str r0, [r7, #20] + 803d79a: 68fb ldr r3, [r7, #12] + 803d79c: 6a58 ldr r0, [r3, #36] ; 0x24 + 803d79e: 68fb ldr r3, [r7, #12] + 803d7a0: 8adb ldrh r3, [r3, #22] + 803d7a2: 68fa ldr r2, [r7, #12] + 803d7a4: 8b12 ldrh r2, [r2, #24] + 803d7a6: 68f9 ldr r1, [r7, #12] + 803d7a8: 8d49 ldrh r1, [r1, #42] ; 0x2a + 803d7aa: 893d ldrh r5, [r7, #8] + 803d7ac: 897c ldrh r4, [r7, #10] + 803d7ae: 9103 str r1, [sp, #12] + 803d7b0: 2110 movs r1, #16 + 803d7b2: 9102 str r1, [sp, #8] + 803d7b4: 9201 str r2, [sp, #4] + 803d7b6: 9300 str r3, [sp, #0] + 803d7b8: 687b ldr r3, [r7, #4] + 803d7ba: 462a mov r2, r5 + 803d7bc: 4621 mov r1, r4 + 803d7be: f7ff ff67 bl 803d690 + 803d7c2: 6178 str r0, [r7, #20] seqno_be, pcb->local_port, pcb->remote_port, TCP_ACK, TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd))); if (p != NULL) { - 803d794: 697b ldr r3, [r7, #20] - 803d796: 2b00 cmp r3, #0 - 803d798: d006 beq.n 803d7a8 + 803d7c4: 697b ldr r3, [r7, #20] + 803d7c6: 2b00 cmp r3, #0 + 803d7c8: d006 beq.n 803d7d8 /* If we're sending a packet, update the announced right window edge */ pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; - 803d79a: 68fb ldr r3, [r7, #12] - 803d79c: 6a5b ldr r3, [r3, #36] ; 0x24 - 803d79e: 68fa ldr r2, [r7, #12] - 803d7a0: 8d52 ldrh r2, [r2, #42] ; 0x2a - 803d7a2: 441a add r2, r3 - 803d7a4: 68fb ldr r3, [r7, #12] - 803d7a6: 62da str r2, [r3, #44] ; 0x2c + 803d7ca: 68fb ldr r3, [r7, #12] + 803d7cc: 6a5b ldr r3, [r3, #36] ; 0x24 + 803d7ce: 68fa ldr r2, [r7, #12] + 803d7d0: 8d52 ldrh r2, [r2, #42] ; 0x2a + 803d7d2: 441a add r2, r3 + 803d7d4: 68fb ldr r3, [r7, #12] + 803d7d6: 62da str r2, [r3, #44] ; 0x2c } return p; - 803d7a8: 697b ldr r3, [r7, #20] + 803d7d8: 697b ldr r3, [r7, #20] } - 803d7aa: 4618 mov r0, r3 - 803d7ac: 3718 adds r7, #24 - 803d7ae: 46bd mov sp, r7 - 803d7b0: bdb0 pop {r4, r5, r7, pc} - 803d7b2: bf00 nop - 803d7b4: 08043950 .word 0x08043950 - 803d7b8: 08044058 .word 0x08044058 - 803d7bc: 080439a4 .word 0x080439a4 + 803d7da: 4618 mov r0, r3 + 803d7dc: 3718 adds r7, #24 + 803d7de: 46bd mov sp, r7 + 803d7e0: bdb0 pop {r4, r5, r7, pc} + 803d7e2: bf00 nop + 803d7e4: 08043980 .word 0x08043980 + 803d7e8: 08044088 .word 0x08044088 + 803d7ec: 080439d4 .word 0x080439d4 -0803d7c0 : +0803d7f0 : /* Fill in options for control segments */ static void tcp_output_fill_options(const struct tcp_pcb *pcb, struct pbuf *p, u8_t optflags, u8_t num_sacks) { - 803d7c0: b580 push {r7, lr} - 803d7c2: b088 sub sp, #32 - 803d7c4: af00 add r7, sp, #0 - 803d7c6: 60f8 str r0, [r7, #12] - 803d7c8: 60b9 str r1, [r7, #8] - 803d7ca: 4611 mov r1, r2 - 803d7cc: 461a mov r2, r3 - 803d7ce: 460b mov r3, r1 - 803d7d0: 71fb strb r3, [r7, #7] - 803d7d2: 4613 mov r3, r2 - 803d7d4: 71bb strb r3, [r7, #6] + 803d7f0: b580 push {r7, lr} + 803d7f2: b088 sub sp, #32 + 803d7f4: af00 add r7, sp, #0 + 803d7f6: 60f8 str r0, [r7, #12] + 803d7f8: 60b9 str r1, [r7, #8] + 803d7fa: 4611 mov r1, r2 + 803d7fc: 461a mov r2, r3 + 803d7fe: 460b mov r3, r1 + 803d800: 71fb strb r3, [r7, #7] + 803d802: 4613 mov r3, r2 + 803d804: 71bb strb r3, [r7, #6] struct tcp_hdr *tcphdr; u32_t *opts; u16_t sacks_len = 0; - 803d7d6: 2300 movs r3, #0 - 803d7d8: 83fb strh r3, [r7, #30] + 803d806: 2300 movs r3, #0 + 803d808: 83fb strh r3, [r7, #30] LWIP_ASSERT("tcp_output_fill_options: invalid pbuf", p != NULL); - 803d7da: 68bb ldr r3, [r7, #8] - 803d7dc: 2b00 cmp r3, #0 - 803d7de: d106 bne.n 803d7ee - 803d7e0: 4b13 ldr r3, [pc, #76] ; (803d830 ) - 803d7e2: f240 7256 movw r2, #1878 ; 0x756 - 803d7e6: 4913 ldr r1, [pc, #76] ; (803d834 ) - 803d7e8: 4813 ldr r0, [pc, #76] ; (803d838 ) - 803d7ea: f003 f979 bl 8040ae0 + 803d80a: 68bb ldr r3, [r7, #8] + 803d80c: 2b00 cmp r3, #0 + 803d80e: d106 bne.n 803d81e + 803d810: 4b13 ldr r3, [pc, #76] ; (803d860 ) + 803d812: f240 7256 movw r2, #1878 ; 0x756 + 803d816: 4913 ldr r1, [pc, #76] ; (803d864 ) + 803d818: 4813 ldr r0, [pc, #76] ; (803d868 ) + 803d81a: f003 f979 bl 8040b10 tcphdr = (struct tcp_hdr *)p->payload; - 803d7ee: 68bb ldr r3, [r7, #8] - 803d7f0: 685b ldr r3, [r3, #4] - 803d7f2: 61bb str r3, [r7, #24] + 803d81e: 68bb ldr r3, [r7, #8] + 803d820: 685b ldr r3, [r3, #4] + 803d822: 61bb str r3, [r7, #24] opts = (u32_t *)(void *)(tcphdr + 1); - 803d7f4: 69bb ldr r3, [r7, #24] - 803d7f6: 3314 adds r3, #20 - 803d7f8: 617b str r3, [r7, #20] + 803d824: 69bb ldr r3, [r7, #24] + 803d826: 3314 adds r3, #20 + 803d828: 617b str r3, [r7, #20] opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, tcphdr, pcb, opts); #endif LWIP_UNUSED_ARG(pcb); LWIP_UNUSED_ARG(sacks_len); LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(tcphdr + 1)) + sacks_len * 4 + LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb)); - 803d7fa: 69bb ldr r3, [r7, #24] - 803d7fc: f103 0214 add.w r2, r3, #20 - 803d800: 8bfb ldrh r3, [r7, #30] - 803d802: 009b lsls r3, r3, #2 - 803d804: 4619 mov r1, r3 - 803d806: 79fb ldrb r3, [r7, #7] - 803d808: 009b lsls r3, r3, #2 - 803d80a: f003 0304 and.w r3, r3, #4 - 803d80e: 440b add r3, r1 - 803d810: 4413 add r3, r2 - 803d812: 697a ldr r2, [r7, #20] - 803d814: 429a cmp r2, r3 - 803d816: d006 beq.n 803d826 - 803d818: 4b05 ldr r3, [pc, #20] ; (803d830 ) - 803d81a: f240 7275 movw r2, #1909 ; 0x775 - 803d81e: 4907 ldr r1, [pc, #28] ; (803d83c ) - 803d820: 4805 ldr r0, [pc, #20] ; (803d838 ) - 803d822: f003 f95d bl 8040ae0 + 803d82a: 69bb ldr r3, [r7, #24] + 803d82c: f103 0214 add.w r2, r3, #20 + 803d830: 8bfb ldrh r3, [r7, #30] + 803d832: 009b lsls r3, r3, #2 + 803d834: 4619 mov r1, r3 + 803d836: 79fb ldrb r3, [r7, #7] + 803d838: 009b lsls r3, r3, #2 + 803d83a: f003 0304 and.w r3, r3, #4 + 803d83e: 440b add r3, r1 + 803d840: 4413 add r3, r2 + 803d842: 697a ldr r2, [r7, #20] + 803d844: 429a cmp r2, r3 + 803d846: d006 beq.n 803d856 + 803d848: 4b05 ldr r3, [pc, #20] ; (803d860 ) + 803d84a: f240 7275 movw r2, #1909 ; 0x775 + 803d84e: 4907 ldr r1, [pc, #28] ; (803d86c ) + 803d850: 4805 ldr r0, [pc, #20] ; (803d868 ) + 803d852: f003 f95d bl 8040b10 LWIP_UNUSED_ARG(optflags); /* for LWIP_NOASSERT */ LWIP_UNUSED_ARG(opts); /* for LWIP_NOASSERT */ } - 803d826: bf00 nop - 803d828: 3720 adds r7, #32 - 803d82a: 46bd mov sp, r7 - 803d82c: bd80 pop {r7, pc} - 803d82e: bf00 nop - 803d830: 08043950 .word 0x08043950 - 803d834: 08044080 .word 0x08044080 - 803d838: 080439a4 .word 0x080439a4 - 803d83c: 08043f78 .word 0x08043f78 - -0803d840 : + 803d856: bf00 nop + 803d858: 3720 adds r7, #32 + 803d85a: 46bd mov sp, r7 + 803d85c: bd80 pop {r7, pc} + 803d85e: bf00 nop + 803d860: 08043980 .word 0x08043980 + 803d864: 080440b0 .word 0x080440b0 + 803d868: 080439d4 .word 0x080439d4 + 803d86c: 08043fa8 .word 0x08043fa8 + +0803d870 : * header checksum and calling ip_output_if while handling netif hints and stats. */ static err_t tcp_output_control_segment(const struct tcp_pcb *pcb, struct pbuf *p, const ip_addr_t *src, const ip_addr_t *dst) { - 803d840: b580 push {r7, lr} - 803d842: b08a sub sp, #40 ; 0x28 - 803d844: af04 add r7, sp, #16 - 803d846: 60f8 str r0, [r7, #12] - 803d848: 60b9 str r1, [r7, #8] - 803d84a: 607a str r2, [r7, #4] - 803d84c: 603b str r3, [r7, #0] + 803d870: b580 push {r7, lr} + 803d872: b08a sub sp, #40 ; 0x28 + 803d874: af04 add r7, sp, #16 + 803d876: 60f8 str r0, [r7, #12] + 803d878: 60b9 str r1, [r7, #8] + 803d87a: 607a str r2, [r7, #4] + 803d87c: 603b str r3, [r7, #0] err_t err; struct netif *netif; LWIP_ASSERT("tcp_output_control_segment: invalid pbuf", p != NULL); - 803d84e: 68bb ldr r3, [r7, #8] - 803d850: 2b00 cmp r3, #0 - 803d852: d106 bne.n 803d862 - 803d854: 4b1c ldr r3, [pc, #112] ; (803d8c8 ) - 803d856: f240 7287 movw r2, #1927 ; 0x787 - 803d85a: 491c ldr r1, [pc, #112] ; (803d8cc ) - 803d85c: 481c ldr r0, [pc, #112] ; (803d8d0 ) - 803d85e: f003 f93f bl 8040ae0 + 803d87e: 68bb ldr r3, [r7, #8] + 803d880: 2b00 cmp r3, #0 + 803d882: d106 bne.n 803d892 + 803d884: 4b1c ldr r3, [pc, #112] ; (803d8f8 ) + 803d886: f240 7287 movw r2, #1927 ; 0x787 + 803d88a: 491c ldr r1, [pc, #112] ; (803d8fc ) + 803d88c: 481c ldr r0, [pc, #112] ; (803d900 ) + 803d88e: f003 f93f bl 8040b10 netif = tcp_route(pcb, src, dst); - 803d862: 683a ldr r2, [r7, #0] - 803d864: 6879 ldr r1, [r7, #4] - 803d866: 68f8 ldr r0, [r7, #12] - 803d868: f7fe fae8 bl 803be3c - 803d86c: 6138 str r0, [r7, #16] + 803d892: 683a ldr r2, [r7, #0] + 803d894: 6879 ldr r1, [r7, #4] + 803d896: 68f8 ldr r0, [r7, #12] + 803d898: f7fe fae8 bl 803be6c + 803d89c: 6138 str r0, [r7, #16] if (netif == NULL) { - 803d86e: 693b ldr r3, [r7, #16] - 803d870: 2b00 cmp r3, #0 - 803d872: d102 bne.n 803d87a + 803d89e: 693b ldr r3, [r7, #16] + 803d8a0: 2b00 cmp r3, #0 + 803d8a2: d102 bne.n 803d8aa err = ERR_RTE; - 803d874: 23fc movs r3, #252 ; 0xfc - 803d876: 75fb strb r3, [r7, #23] - 803d878: e01c b.n 803d8b4 + 803d8a4: 23fc movs r3, #252 ; 0xfc + 803d8a6: 75fb strb r3, [r7, #23] + 803d8a8: e01c b.n 803d8e4 struct tcp_hdr *tcphdr = (struct tcp_hdr *)p->payload; tcphdr->chksum = ip_chksum_pseudo(p, IP_PROTO_TCP, p->tot_len, src, dst); } #endif if (pcb != NULL) { - 803d87a: 68fb ldr r3, [r7, #12] - 803d87c: 2b00 cmp r3, #0 - 803d87e: d006 beq.n 803d88e + 803d8aa: 68fb ldr r3, [r7, #12] + 803d8ac: 2b00 cmp r3, #0 + 803d8ae: d006 beq.n 803d8be NETIF_SET_HINTS(netif, LWIP_CONST_CAST(struct netif_hint*, &(pcb->netif_hints))); ttl = pcb->ttl; - 803d880: 68fb ldr r3, [r7, #12] - 803d882: 7adb ldrb r3, [r3, #11] - 803d884: 75bb strb r3, [r7, #22] + 803d8b0: 68fb ldr r3, [r7, #12] + 803d8b2: 7adb ldrb r3, [r3, #11] + 803d8b4: 75bb strb r3, [r7, #22] tos = pcb->tos; - 803d886: 68fb ldr r3, [r7, #12] - 803d888: 7a9b ldrb r3, [r3, #10] - 803d88a: 757b strb r3, [r7, #21] - 803d88c: e003 b.n 803d896 + 803d8b6: 68fb ldr r3, [r7, #12] + 803d8b8: 7a9b ldrb r3, [r3, #10] + 803d8ba: 757b strb r3, [r7, #21] + 803d8bc: e003 b.n 803d8c6 } else { /* Send output with hardcoded TTL/HL since we have no access to the pcb */ ttl = TCP_TTL; - 803d88e: 23ff movs r3, #255 ; 0xff - 803d890: 75bb strb r3, [r7, #22] + 803d8be: 23ff movs r3, #255 ; 0xff + 803d8c0: 75bb strb r3, [r7, #22] tos = 0; - 803d892: 2300 movs r3, #0 - 803d894: 757b strb r3, [r7, #21] + 803d8c2: 2300 movs r3, #0 + 803d8c4: 757b strb r3, [r7, #21] } TCP_STATS_INC(tcp.xmit); err = ip_output_if(p, src, dst, ttl, tos, IP_PROTO_TCP, netif); - 803d896: 7dba ldrb r2, [r7, #22] - 803d898: 693b ldr r3, [r7, #16] - 803d89a: 9302 str r3, [sp, #8] - 803d89c: 2306 movs r3, #6 - 803d89e: 9301 str r3, [sp, #4] - 803d8a0: 7d7b ldrb r3, [r7, #21] - 803d8a2: 9300 str r3, [sp, #0] - 803d8a4: 4613 mov r3, r2 - 803d8a6: 683a ldr r2, [r7, #0] - 803d8a8: 6879 ldr r1, [r7, #4] - 803d8aa: 68b8 ldr r0, [r7, #8] - 803d8ac: f001 ff96 bl 803f7dc - 803d8b0: 4603 mov r3, r0 - 803d8b2: 75fb strb r3, [r7, #23] + 803d8c6: 7dba ldrb r2, [r7, #22] + 803d8c8: 693b ldr r3, [r7, #16] + 803d8ca: 9302 str r3, [sp, #8] + 803d8cc: 2306 movs r3, #6 + 803d8ce: 9301 str r3, [sp, #4] + 803d8d0: 7d7b ldrb r3, [r7, #21] + 803d8d2: 9300 str r3, [sp, #0] + 803d8d4: 4613 mov r3, r2 + 803d8d6: 683a ldr r2, [r7, #0] + 803d8d8: 6879 ldr r1, [r7, #4] + 803d8da: 68b8 ldr r0, [r7, #8] + 803d8dc: f001 ff96 bl 803f80c + 803d8e0: 4603 mov r3, r0 + 803d8e2: 75fb strb r3, [r7, #23] NETIF_RESET_HINTS(netif); } pbuf_free(p); - 803d8b4: 68b8 ldr r0, [r7, #8] - 803d8b6: f7f9 ff29 bl 803770c + 803d8e4: 68b8 ldr r0, [r7, #8] + 803d8e6: f7f9 ff29 bl 803773c return err; - 803d8ba: f997 3017 ldrsb.w r3, [r7, #23] -} - 803d8be: 4618 mov r0, r3 - 803d8c0: 3718 adds r7, #24 - 803d8c2: 46bd mov sp, r7 - 803d8c4: bd80 pop {r7, pc} - 803d8c6: bf00 nop - 803d8c8: 08043950 .word 0x08043950 - 803d8cc: 080440a8 .word 0x080440a8 - 803d8d0: 080439a4 .word 0x080439a4 - -0803d8d4 : + 803d8ea: f997 3017 ldrsb.w r3, [r7, #23] +} + 803d8ee: 4618 mov r0, r3 + 803d8f0: 3718 adds r7, #24 + 803d8f2: 46bd mov sp, r7 + 803d8f4: bd80 pop {r7, pc} + 803d8f6: bf00 nop + 803d8f8: 08043980 .word 0x08043980 + 803d8fc: 080440d8 .word 0x080440d8 + 803d900: 080439d4 .word 0x080439d4 + +0803d904 : */ void tcp_rst(const struct tcp_pcb *pcb, u32_t seqno, u32_t ackno, const ip_addr_t *local_ip, const ip_addr_t *remote_ip, u16_t local_port, u16_t remote_port) { - 803d8d4: b590 push {r4, r7, lr} - 803d8d6: b08b sub sp, #44 ; 0x2c - 803d8d8: af04 add r7, sp, #16 - 803d8da: 60f8 str r0, [r7, #12] - 803d8dc: 60b9 str r1, [r7, #8] - 803d8de: 607a str r2, [r7, #4] - 803d8e0: 603b str r3, [r7, #0] + 803d904: b590 push {r4, r7, lr} + 803d906: b08b sub sp, #44 ; 0x2c + 803d908: af04 add r7, sp, #16 + 803d90a: 60f8 str r0, [r7, #12] + 803d90c: 60b9 str r1, [r7, #8] + 803d90e: 607a str r2, [r7, #4] + 803d910: 603b str r3, [r7, #0] struct pbuf *p; u16_t wnd; u8_t optlen; LWIP_ASSERT("tcp_rst: invalid local_ip", local_ip != NULL); - 803d8e2: 683b ldr r3, [r7, #0] - 803d8e4: 2b00 cmp r3, #0 - 803d8e6: d106 bne.n 803d8f6 - 803d8e8: 4b1f ldr r3, [pc, #124] ; (803d968 ) - 803d8ea: f240 72c4 movw r2, #1988 ; 0x7c4 - 803d8ee: 491f ldr r1, [pc, #124] ; (803d96c ) - 803d8f0: 481f ldr r0, [pc, #124] ; (803d970 ) - 803d8f2: f003 f8f5 bl 8040ae0 + 803d912: 683b ldr r3, [r7, #0] + 803d914: 2b00 cmp r3, #0 + 803d916: d106 bne.n 803d926 + 803d918: 4b1f ldr r3, [pc, #124] ; (803d998 ) + 803d91a: f240 72c4 movw r2, #1988 ; 0x7c4 + 803d91e: 491f ldr r1, [pc, #124] ; (803d99c ) + 803d920: 481f ldr r0, [pc, #124] ; (803d9a0 ) + 803d922: f003 f8f5 bl 8040b10 LWIP_ASSERT("tcp_rst: invalid remote_ip", remote_ip != NULL); - 803d8f6: 6abb ldr r3, [r7, #40] ; 0x28 - 803d8f8: 2b00 cmp r3, #0 - 803d8fa: d106 bne.n 803d90a - 803d8fc: 4b1a ldr r3, [pc, #104] ; (803d968 ) - 803d8fe: f240 72c5 movw r2, #1989 ; 0x7c5 - 803d902: 491c ldr r1, [pc, #112] ; (803d974 ) - 803d904: 481a ldr r0, [pc, #104] ; (803d970 ) - 803d906: f003 f8eb bl 8040ae0 + 803d926: 6abb ldr r3, [r7, #40] ; 0x28 + 803d928: 2b00 cmp r3, #0 + 803d92a: d106 bne.n 803d93a + 803d92c: 4b1a ldr r3, [pc, #104] ; (803d998 ) + 803d92e: f240 72c5 movw r2, #1989 ; 0x7c5 + 803d932: 491c ldr r1, [pc, #112] ; (803d9a4 ) + 803d934: 481a ldr r0, [pc, #104] ; (803d9a0 ) + 803d936: f003 f8eb bl 8040b10 optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb); - 803d90a: 2300 movs r3, #0 - 803d90c: 75fb strb r3, [r7, #23] + 803d93a: 2300 movs r3, #0 + 803d93c: 75fb strb r3, [r7, #23] #if LWIP_WND_SCALE wnd = PP_HTONS(((TCP_WND >> TCP_RCV_SCALE) & 0xFFFF)); #else wnd = PP_HTONS(TCP_WND); - 803d90e: f246 0308 movw r3, #24584 ; 0x6008 - 803d912: 82bb strh r3, [r7, #20] + 803d93e: f246 0308 movw r3, #24584 ; 0x6008 + 803d942: 82bb strh r3, [r7, #20] #endif p = tcp_output_alloc_header_common(ackno, optlen, 0, lwip_htonl(seqno), local_port, - 803d914: 7dfb ldrb r3, [r7, #23] - 803d916: b29c uxth r4, r3 - 803d918: 68b8 ldr r0, [r7, #8] - 803d91a: f7f8 fada bl 8035ed2 - 803d91e: 4602 mov r2, r0 - 803d920: 8abb ldrh r3, [r7, #20] - 803d922: 9303 str r3, [sp, #12] - 803d924: 2314 movs r3, #20 - 803d926: 9302 str r3, [sp, #8] - 803d928: 8e3b ldrh r3, [r7, #48] ; 0x30 - 803d92a: 9301 str r3, [sp, #4] - 803d92c: 8dbb ldrh r3, [r7, #44] ; 0x2c - 803d92e: 9300 str r3, [sp, #0] - 803d930: 4613 mov r3, r2 - 803d932: 2200 movs r2, #0 - 803d934: 4621 mov r1, r4 - 803d936: 6878 ldr r0, [r7, #4] - 803d938: f7ff fe92 bl 803d660 - 803d93c: 6138 str r0, [r7, #16] + 803d944: 7dfb ldrb r3, [r7, #23] + 803d946: b29c uxth r4, r3 + 803d948: 68b8 ldr r0, [r7, #8] + 803d94a: f7f8 fada bl 8035f02 + 803d94e: 4602 mov r2, r0 + 803d950: 8abb ldrh r3, [r7, #20] + 803d952: 9303 str r3, [sp, #12] + 803d954: 2314 movs r3, #20 + 803d956: 9302 str r3, [sp, #8] + 803d958: 8e3b ldrh r3, [r7, #48] ; 0x30 + 803d95a: 9301 str r3, [sp, #4] + 803d95c: 8dbb ldrh r3, [r7, #44] ; 0x2c + 803d95e: 9300 str r3, [sp, #0] + 803d960: 4613 mov r3, r2 + 803d962: 2200 movs r2, #0 + 803d964: 4621 mov r1, r4 + 803d966: 6878 ldr r0, [r7, #4] + 803d968: f7ff fe92 bl 803d690 + 803d96c: 6138 str r0, [r7, #16] remote_port, TCP_RST | TCP_ACK, wnd); if (p == NULL) { - 803d93e: 693b ldr r3, [r7, #16] - 803d940: 2b00 cmp r3, #0 - 803d942: d00c beq.n 803d95e + 803d96e: 693b ldr r3, [r7, #16] + 803d970: 2b00 cmp r3, #0 + 803d972: d00c beq.n 803d98e LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n")); return; } tcp_output_fill_options(pcb, p, 0, optlen); - 803d944: 7dfb ldrb r3, [r7, #23] - 803d946: 2200 movs r2, #0 - 803d948: 6939 ldr r1, [r7, #16] - 803d94a: 68f8 ldr r0, [r7, #12] - 803d94c: f7ff ff38 bl 803d7c0 + 803d974: 7dfb ldrb r3, [r7, #23] + 803d976: 2200 movs r2, #0 + 803d978: 6939 ldr r1, [r7, #16] + 803d97a: 68f8 ldr r0, [r7, #12] + 803d97c: f7ff ff38 bl 803d7f0 MIB2_STATS_INC(mib2.tcpoutrsts); tcp_output_control_segment(pcb, p, local_ip, remote_ip); - 803d950: 6abb ldr r3, [r7, #40] ; 0x28 - 803d952: 683a ldr r2, [r7, #0] - 803d954: 6939 ldr r1, [r7, #16] - 803d956: 68f8 ldr r0, [r7, #12] - 803d958: f7ff ff72 bl 803d840 - 803d95c: e000 b.n 803d960 + 803d980: 6abb ldr r3, [r7, #40] ; 0x28 + 803d982: 683a ldr r2, [r7, #0] + 803d984: 6939 ldr r1, [r7, #16] + 803d986: 68f8 ldr r0, [r7, #12] + 803d988: f7ff ff72 bl 803d870 + 803d98c: e000 b.n 803d990 return; - 803d95e: bf00 nop + 803d98e: bf00 nop LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno)); } - 803d960: 371c adds r7, #28 - 803d962: 46bd mov sp, r7 - 803d964: bd90 pop {r4, r7, pc} - 803d966: bf00 nop - 803d968: 08043950 .word 0x08043950 - 803d96c: 080440d4 .word 0x080440d4 - 803d970: 080439a4 .word 0x080439a4 - 803d974: 080440f0 .word 0x080440f0 + 803d990: 371c adds r7, #28 + 803d992: 46bd mov sp, r7 + 803d994: bd90 pop {r4, r7, pc} + 803d996: bf00 nop + 803d998: 08043980 .word 0x08043980 + 803d99c: 08044104 .word 0x08044104 + 803d9a0: 080439d4 .word 0x080439d4 + 803d9a4: 08044120 .word 0x08044120 -0803d978 : +0803d9a8 : * * @param pcb Protocol control block for the TCP connection to send the ACK */ err_t tcp_send_empty_ack(struct tcp_pcb *pcb) { - 803d978: b590 push {r4, r7, lr} - 803d97a: b087 sub sp, #28 - 803d97c: af00 add r7, sp, #0 - 803d97e: 6078 str r0, [r7, #4] + 803d9a8: b590 push {r4, r7, lr} + 803d9aa: b087 sub sp, #28 + 803d9ac: af00 add r7, sp, #0 + 803d9ae: 6078 str r0, [r7, #4] err_t err; struct pbuf *p; u8_t optlen, optflags = 0; - 803d980: 2300 movs r3, #0 - 803d982: 75fb strb r3, [r7, #23] + 803d9b0: 2300 movs r3, #0 + 803d9b2: 75fb strb r3, [r7, #23] u8_t num_sacks = 0; - 803d984: 2300 movs r3, #0 - 803d986: 75bb strb r3, [r7, #22] + 803d9b4: 2300 movs r3, #0 + 803d9b6: 75bb strb r3, [r7, #22] LWIP_ASSERT("tcp_send_empty_ack: invalid pcb", pcb != NULL); - 803d988: 687b ldr r3, [r7, #4] - 803d98a: 2b00 cmp r3, #0 - 803d98c: d106 bne.n 803d99c - 803d98e: 4b28 ldr r3, [pc, #160] ; (803da30 ) - 803d990: f240 72ea movw r2, #2026 ; 0x7ea - 803d994: 4927 ldr r1, [pc, #156] ; (803da34 ) - 803d996: 4828 ldr r0, [pc, #160] ; (803da38 ) - 803d998: f003 f8a2 bl 8040ae0 + 803d9b8: 687b ldr r3, [r7, #4] + 803d9ba: 2b00 cmp r3, #0 + 803d9bc: d106 bne.n 803d9cc + 803d9be: 4b28 ldr r3, [pc, #160] ; (803da60 ) + 803d9c0: f240 72ea movw r2, #2026 ; 0x7ea + 803d9c4: 4927 ldr r1, [pc, #156] ; (803da64 ) + 803d9c6: 4828 ldr r0, [pc, #160] ; (803da68 ) + 803d9c8: f003 f8a2 bl 8040b10 #if LWIP_TCP_TIMESTAMPS if (pcb->flags & TF_TIMESTAMP) { optflags = TF_SEG_OPTS_TS; } #endif optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb); - 803d99c: 7dfb ldrb r3, [r7, #23] - 803d99e: 009b lsls r3, r3, #2 - 803d9a0: b2db uxtb r3, r3 - 803d9a2: f003 0304 and.w r3, r3, #4 - 803d9a6: 757b strb r3, [r7, #21] + 803d9cc: 7dfb ldrb r3, [r7, #23] + 803d9ce: 009b lsls r3, r3, #2 + 803d9d0: b2db uxtb r3, r3 + 803d9d2: f003 0304 and.w r3, r3, #4 + 803d9d6: 757b strb r3, [r7, #21] if ((num_sacks = tcp_get_num_sacks(pcb, optlen)) > 0) { optlen += 4 + num_sacks * 8; /* 4 bytes for header (including 2*NOP), plus 8B for each SACK */ } #endif p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt)); - 803d9a8: 7d7b ldrb r3, [r7, #21] - 803d9aa: b29c uxth r4, r3 - 803d9ac: 687b ldr r3, [r7, #4] - 803d9ae: 6d1b ldr r3, [r3, #80] ; 0x50 - 803d9b0: 4618 mov r0, r3 - 803d9b2: f7f8 fa8e bl 8035ed2 - 803d9b6: 4603 mov r3, r0 - 803d9b8: 2200 movs r2, #0 - 803d9ba: 4621 mov r1, r4 - 803d9bc: 6878 ldr r0, [r7, #4] - 803d9be: f7ff fec1 bl 803d744 - 803d9c2: 6138 str r0, [r7, #16] + 803d9d8: 7d7b ldrb r3, [r7, #21] + 803d9da: b29c uxth r4, r3 + 803d9dc: 687b ldr r3, [r7, #4] + 803d9de: 6d1b ldr r3, [r3, #80] ; 0x50 + 803d9e0: 4618 mov r0, r3 + 803d9e2: f7f8 fa8e bl 8035f02 + 803d9e6: 4603 mov r3, r0 + 803d9e8: 2200 movs r2, #0 + 803d9ea: 4621 mov r1, r4 + 803d9ec: 6878 ldr r0, [r7, #4] + 803d9ee: f7ff fec1 bl 803d774 + 803d9f2: 6138 str r0, [r7, #16] if (p == NULL) { - 803d9c4: 693b ldr r3, [r7, #16] - 803d9c6: 2b00 cmp r3, #0 - 803d9c8: d109 bne.n 803d9de + 803d9f4: 693b ldr r3, [r7, #16] + 803d9f6: 2b00 cmp r3, #0 + 803d9f8: d109 bne.n 803da0e /* let tcp_fasttmr retry sending this ACK */ tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 803d9ca: 687b ldr r3, [r7, #4] - 803d9cc: 8b5b ldrh r3, [r3, #26] - 803d9ce: f043 0303 orr.w r3, r3, #3 - 803d9d2: b29a uxth r2, r3 - 803d9d4: 687b ldr r3, [r7, #4] - 803d9d6: 835a strh r2, [r3, #26] + 803d9fa: 687b ldr r3, [r7, #4] + 803d9fc: 8b5b ldrh r3, [r3, #26] + 803d9fe: f043 0303 orr.w r3, r3, #3 + 803da02: b29a uxth r2, r3 + 803da04: 687b ldr r3, [r7, #4] + 803da06: 835a strh r2, [r3, #26] LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n")); return ERR_BUF; - 803d9d8: f06f 0301 mvn.w r3, #1 - 803d9dc: e023 b.n 803da26 + 803da08: f06f 0301 mvn.w r3, #1 + 803da0c: e023 b.n 803da56 } tcp_output_fill_options(pcb, p, optflags, num_sacks); - 803d9de: 7dbb ldrb r3, [r7, #22] - 803d9e0: 7dfa ldrb r2, [r7, #23] - 803d9e2: 6939 ldr r1, [r7, #16] - 803d9e4: 6878 ldr r0, [r7, #4] - 803d9e6: f7ff feeb bl 803d7c0 + 803da0e: 7dbb ldrb r3, [r7, #22] + 803da10: 7dfa ldrb r2, [r7, #23] + 803da12: 6939 ldr r1, [r7, #16] + 803da14: 6878 ldr r0, [r7, #4] + 803da16: f7ff feeb bl 803d7f0 pcb->ts_lastacksent = pcb->rcv_nxt; #endif LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt)); err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip); - 803d9ea: 687a ldr r2, [r7, #4] - 803d9ec: 687b ldr r3, [r7, #4] - 803d9ee: 3304 adds r3, #4 - 803d9f0: 6939 ldr r1, [r7, #16] - 803d9f2: 6878 ldr r0, [r7, #4] - 803d9f4: f7ff ff24 bl 803d840 - 803d9f8: 4603 mov r3, r0 - 803d9fa: 73fb strb r3, [r7, #15] + 803da1a: 687a ldr r2, [r7, #4] + 803da1c: 687b ldr r3, [r7, #4] + 803da1e: 3304 adds r3, #4 + 803da20: 6939 ldr r1, [r7, #16] + 803da22: 6878 ldr r0, [r7, #4] + 803da24: f7ff ff24 bl 803d870 + 803da28: 4603 mov r3, r0 + 803da2a: 73fb strb r3, [r7, #15] if (err != ERR_OK) { - 803d9fc: f997 300f ldrsb.w r3, [r7, #15] - 803da00: 2b00 cmp r3, #0 - 803da02: d007 beq.n 803da14 + 803da2c: f997 300f ldrsb.w r3, [r7, #15] + 803da30: 2b00 cmp r3, #0 + 803da32: d007 beq.n 803da44 /* let tcp_fasttmr retry sending this ACK */ tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 803da04: 687b ldr r3, [r7, #4] - 803da06: 8b5b ldrh r3, [r3, #26] - 803da08: f043 0303 orr.w r3, r3, #3 - 803da0c: b29a uxth r2, r3 - 803da0e: 687b ldr r3, [r7, #4] - 803da10: 835a strh r2, [r3, #26] - 803da12: e006 b.n 803da22 + 803da34: 687b ldr r3, [r7, #4] + 803da36: 8b5b ldrh r3, [r3, #26] + 803da38: f043 0303 orr.w r3, r3, #3 + 803da3c: b29a uxth r2, r3 + 803da3e: 687b ldr r3, [r7, #4] + 803da40: 835a strh r2, [r3, #26] + 803da42: e006 b.n 803da52 } else { /* remove ACK flags from the PCB, as we sent an empty ACK now */ tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 803da14: 687b ldr r3, [r7, #4] - 803da16: 8b5b ldrh r3, [r3, #26] - 803da18: f023 0303 bic.w r3, r3, #3 - 803da1c: b29a uxth r2, r3 - 803da1e: 687b ldr r3, [r7, #4] - 803da20: 835a strh r2, [r3, #26] + 803da44: 687b ldr r3, [r7, #4] + 803da46: 8b5b ldrh r3, [r3, #26] + 803da48: f023 0303 bic.w r3, r3, #3 + 803da4c: b29a uxth r2, r3 + 803da4e: 687b ldr r3, [r7, #4] + 803da50: 835a strh r2, [r3, #26] } return err; - 803da22: f997 300f ldrsb.w r3, [r7, #15] -} - 803da26: 4618 mov r0, r3 - 803da28: 371c adds r7, #28 - 803da2a: 46bd mov sp, r7 - 803da2c: bd90 pop {r4, r7, pc} - 803da2e: bf00 nop - 803da30: 08043950 .word 0x08043950 - 803da34: 0804410c .word 0x0804410c - 803da38: 080439a4 .word 0x080439a4 - -0803da3c : + 803da52: f997 300f ldrsb.w r3, [r7, #15] +} + 803da56: 4618 mov r0, r3 + 803da58: 371c adds r7, #28 + 803da5a: 46bd mov sp, r7 + 803da5c: bd90 pop {r4, r7, pc} + 803da5e: bf00 nop + 803da60: 08043980 .word 0x08043980 + 803da64: 0804413c .word 0x0804413c + 803da68: 080439d4 .word 0x080439d4 + +0803da6c : * * @param pcb the tcp_pcb for which to send a keepalive packet */ err_t tcp_keepalive(struct tcp_pcb *pcb) { - 803da3c: b590 push {r4, r7, lr} - 803da3e: b087 sub sp, #28 - 803da40: af00 add r7, sp, #0 - 803da42: 6078 str r0, [r7, #4] + 803da6c: b590 push {r4, r7, lr} + 803da6e: b087 sub sp, #28 + 803da70: af00 add r7, sp, #0 + 803da72: 6078 str r0, [r7, #4] err_t err; struct pbuf *p; u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb); - 803da44: 2300 movs r3, #0 - 803da46: 75fb strb r3, [r7, #23] + 803da74: 2300 movs r3, #0 + 803da76: 75fb strb r3, [r7, #23] LWIP_ASSERT("tcp_keepalive: invalid pcb", pcb != NULL); - 803da48: 687b ldr r3, [r7, #4] - 803da4a: 2b00 cmp r3, #0 - 803da4c: d106 bne.n 803da5c - 803da4e: 4b18 ldr r3, [pc, #96] ; (803dab0 ) - 803da50: f640 0224 movw r2, #2084 ; 0x824 - 803da54: 4917 ldr r1, [pc, #92] ; (803dab4 ) - 803da56: 4818 ldr r0, [pc, #96] ; (803dab8 ) - 803da58: f003 f842 bl 8040ae0 + 803da78: 687b ldr r3, [r7, #4] + 803da7a: 2b00 cmp r3, #0 + 803da7c: d106 bne.n 803da8c + 803da7e: 4b18 ldr r3, [pc, #96] ; (803dae0 ) + 803da80: f640 0224 movw r2, #2084 ; 0x824 + 803da84: 4917 ldr r1, [pc, #92] ; (803dae4 ) + 803da86: 4818 ldr r0, [pc, #96] ; (803dae8 ) + 803da88: f003 f842 bl 8040b10 LWIP_DEBUGF(TCP_DEBUG, ("\n")); LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F" pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent)); p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt - 1)); - 803da5c: 7dfb ldrb r3, [r7, #23] - 803da5e: b29c uxth r4, r3 - 803da60: 687b ldr r3, [r7, #4] - 803da62: 6d1b ldr r3, [r3, #80] ; 0x50 - 803da64: 3b01 subs r3, #1 - 803da66: 4618 mov r0, r3 - 803da68: f7f8 fa33 bl 8035ed2 - 803da6c: 4603 mov r3, r0 - 803da6e: 2200 movs r2, #0 - 803da70: 4621 mov r1, r4 - 803da72: 6878 ldr r0, [r7, #4] - 803da74: f7ff fe66 bl 803d744 - 803da78: 6138 str r0, [r7, #16] + 803da8c: 7dfb ldrb r3, [r7, #23] + 803da8e: b29c uxth r4, r3 + 803da90: 687b ldr r3, [r7, #4] + 803da92: 6d1b ldr r3, [r3, #80] ; 0x50 + 803da94: 3b01 subs r3, #1 + 803da96: 4618 mov r0, r3 + 803da98: f7f8 fa33 bl 8035f02 + 803da9c: 4603 mov r3, r0 + 803da9e: 2200 movs r2, #0 + 803daa0: 4621 mov r1, r4 + 803daa2: 6878 ldr r0, [r7, #4] + 803daa4: f7ff fe66 bl 803d774 + 803daa8: 6138 str r0, [r7, #16] if (p == NULL) { - 803da7a: 693b ldr r3, [r7, #16] - 803da7c: 2b00 cmp r3, #0 - 803da7e: d102 bne.n 803da86 + 803daaa: 693b ldr r3, [r7, #16] + 803daac: 2b00 cmp r3, #0 + 803daae: d102 bne.n 803dab6 LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: could not allocate memory for pbuf\n")); return ERR_MEM; - 803da80: f04f 33ff mov.w r3, #4294967295 - 803da84: e010 b.n 803daa8 + 803dab0: f04f 33ff mov.w r3, #4294967295 + 803dab4: e010 b.n 803dad8 } tcp_output_fill_options(pcb, p, 0, optlen); - 803da86: 7dfb ldrb r3, [r7, #23] - 803da88: 2200 movs r2, #0 - 803da8a: 6939 ldr r1, [r7, #16] - 803da8c: 6878 ldr r0, [r7, #4] - 803da8e: f7ff fe97 bl 803d7c0 + 803dab6: 7dfb ldrb r3, [r7, #23] + 803dab8: 2200 movs r2, #0 + 803daba: 6939 ldr r1, [r7, #16] + 803dabc: 6878 ldr r0, [r7, #4] + 803dabe: f7ff fe97 bl 803d7f0 err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip); - 803da92: 687a ldr r2, [r7, #4] - 803da94: 687b ldr r3, [r7, #4] - 803da96: 3304 adds r3, #4 - 803da98: 6939 ldr r1, [r7, #16] - 803da9a: 6878 ldr r0, [r7, #4] - 803da9c: f7ff fed0 bl 803d840 - 803daa0: 4603 mov r3, r0 - 803daa2: 73fb strb r3, [r7, #15] + 803dac2: 687a ldr r2, [r7, #4] + 803dac4: 687b ldr r3, [r7, #4] + 803dac6: 3304 adds r3, #4 + 803dac8: 6939 ldr r1, [r7, #16] + 803daca: 6878 ldr r0, [r7, #4] + 803dacc: f7ff fed0 bl 803d870 + 803dad0: 4603 mov r3, r0 + 803dad2: 73fb strb r3, [r7, #15] LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F" err %d.\n", pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err)); return err; - 803daa4: f997 300f ldrsb.w r3, [r7, #15] + 803dad4: f997 300f ldrsb.w r3, [r7, #15] } - 803daa8: 4618 mov r0, r3 - 803daaa: 371c adds r7, #28 - 803daac: 46bd mov sp, r7 - 803daae: bd90 pop {r4, r7, pc} - 803dab0: 08043950 .word 0x08043950 - 803dab4: 0804412c .word 0x0804412c - 803dab8: 080439a4 .word 0x080439a4 + 803dad8: 4618 mov r0, r3 + 803dada: 371c adds r7, #28 + 803dadc: 46bd mov sp, r7 + 803dade: bd90 pop {r4, r7, pc} + 803dae0: 08043980 .word 0x08043980 + 803dae4: 0804415c .word 0x0804415c + 803dae8: 080439d4 .word 0x080439d4 -0803dabc : +0803daec : * * @param pcb the tcp_pcb for which to send a zero-window probe packet */ err_t tcp_zero_window_probe(struct tcp_pcb *pcb) { - 803dabc: b590 push {r4, r7, lr} - 803dabe: b08b sub sp, #44 ; 0x2c - 803dac0: af00 add r7, sp, #0 - 803dac2: 6078 str r0, [r7, #4] + 803daec: b590 push {r4, r7, lr} + 803daee: b08b sub sp, #44 ; 0x2c + 803daf0: af00 add r7, sp, #0 + 803daf2: 6078 str r0, [r7, #4] struct tcp_hdr *tcphdr; struct tcp_seg *seg; u16_t len; u8_t is_fin; u32_t snd_nxt; u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb); - 803dac4: 2300 movs r3, #0 - 803dac6: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803daf4: 2300 movs r3, #0 + 803daf6: f887 3027 strb.w r3, [r7, #39] ; 0x27 LWIP_ASSERT("tcp_zero_window_probe: invalid pcb", pcb != NULL); - 803daca: 687b ldr r3, [r7, #4] - 803dacc: 2b00 cmp r3, #0 - 803dace: d106 bne.n 803dade - 803dad0: 4b4c ldr r3, [pc, #304] ; (803dc04 ) - 803dad2: f640 024f movw r2, #2127 ; 0x84f - 803dad6: 494c ldr r1, [pc, #304] ; (803dc08 ) - 803dad8: 484c ldr r0, [pc, #304] ; (803dc0c ) - 803dada: f003 f801 bl 8040ae0 + 803dafa: 687b ldr r3, [r7, #4] + 803dafc: 2b00 cmp r3, #0 + 803dafe: d106 bne.n 803db0e + 803db00: 4b4c ldr r3, [pc, #304] ; (803dc34 ) + 803db02: f640 024f movw r2, #2127 ; 0x84f + 803db06: 494c ldr r1, [pc, #304] ; (803dc38 ) + 803db08: 484c ldr r0, [pc, #304] ; (803dc3c ) + 803db0a: f003 f801 bl 8040b10 ("tcp_zero_window_probe: tcp_ticks %"U32_F " pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent)); /* Only consider unsent, persist timer should be off when there is data in-flight */ seg = pcb->unsent; - 803dade: 687b ldr r3, [r7, #4] - 803dae0: 6edb ldr r3, [r3, #108] ; 0x6c - 803dae2: 623b str r3, [r7, #32] + 803db0e: 687b ldr r3, [r7, #4] + 803db10: 6edb ldr r3, [r3, #108] ; 0x6c + 803db12: 623b str r3, [r7, #32] if (seg == NULL) { - 803dae4: 6a3b ldr r3, [r7, #32] - 803dae6: 2b00 cmp r3, #0 - 803dae8: d101 bne.n 803daee + 803db14: 6a3b ldr r3, [r7, #32] + 803db16: 2b00 cmp r3, #0 + 803db18: d101 bne.n 803db1e /* Not expected, persist timer should be off when the send buffer is empty */ return ERR_OK; - 803daea: 2300 movs r3, #0 - 803daec: e086 b.n 803dbfc + 803db1a: 2300 movs r3, #0 + 803db1c: e086 b.n 803dc2c /* increment probe count. NOTE: we record probe even if it fails to actually transmit due to an error. This ensures memory exhaustion/ routing problem doesn't leave a zero-window pcb as an indefinite zombie. RTO mechanism has similar behavior, see pcb->nrtx */ if (pcb->persist_probe < 0xFF) { - 803daee: 687b ldr r3, [r7, #4] - 803daf0: f893 309a ldrb.w r3, [r3, #154] ; 0x9a - 803daf4: 2bff cmp r3, #255 ; 0xff - 803daf6: d007 beq.n 803db08 + 803db1e: 687b ldr r3, [r7, #4] + 803db20: f893 309a ldrb.w r3, [r3, #154] ; 0x9a + 803db24: 2bff cmp r3, #255 ; 0xff + 803db26: d007 beq.n 803db38 ++pcb->persist_probe; - 803daf8: 687b ldr r3, [r7, #4] - 803dafa: f893 309a ldrb.w r3, [r3, #154] ; 0x9a - 803dafe: 3301 adds r3, #1 - 803db00: b2da uxtb r2, r3 - 803db02: 687b ldr r3, [r7, #4] - 803db04: f883 209a strb.w r2, [r3, #154] ; 0x9a + 803db28: 687b ldr r3, [r7, #4] + 803db2a: f893 309a ldrb.w r3, [r3, #154] ; 0x9a + 803db2e: 3301 adds r3, #1 + 803db30: b2da uxtb r2, r3 + 803db32: 687b ldr r3, [r7, #4] + 803db34: f883 209a strb.w r2, [r3, #154] ; 0x9a } is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0); - 803db08: 6a3b ldr r3, [r7, #32] - 803db0a: 68db ldr r3, [r3, #12] - 803db0c: 899b ldrh r3, [r3, #12] - 803db0e: b29b uxth r3, r3 - 803db10: 4618 mov r0, r3 - 803db12: f7f8 f9c9 bl 8035ea8 - 803db16: 4603 mov r3, r0 - 803db18: b2db uxtb r3, r3 - 803db1a: f003 0301 and.w r3, r3, #1 - 803db1e: 2b00 cmp r3, #0 - 803db20: d005 beq.n 803db2e - 803db22: 6a3b ldr r3, [r7, #32] - 803db24: 891b ldrh r3, [r3, #8] - 803db26: 2b00 cmp r3, #0 - 803db28: d101 bne.n 803db2e - 803db2a: 2301 movs r3, #1 - 803db2c: e000 b.n 803db30 - 803db2e: 2300 movs r3, #0 - 803db30: 77fb strb r3, [r7, #31] + 803db38: 6a3b ldr r3, [r7, #32] + 803db3a: 68db ldr r3, [r3, #12] + 803db3c: 899b ldrh r3, [r3, #12] + 803db3e: b29b uxth r3, r3 + 803db40: 4618 mov r0, r3 + 803db42: f7f8 f9c9 bl 8035ed8 + 803db46: 4603 mov r3, r0 + 803db48: b2db uxtb r3, r3 + 803db4a: f003 0301 and.w r3, r3, #1 + 803db4e: 2b00 cmp r3, #0 + 803db50: d005 beq.n 803db5e + 803db52: 6a3b ldr r3, [r7, #32] + 803db54: 891b ldrh r3, [r3, #8] + 803db56: 2b00 cmp r3, #0 + 803db58: d101 bne.n 803db5e + 803db5a: 2301 movs r3, #1 + 803db5c: e000 b.n 803db60 + 803db5e: 2300 movs r3, #0 + 803db60: 77fb strb r3, [r7, #31] /* we want to send one seqno: either FIN or data (no options) */ len = is_fin ? 0 : 1; - 803db32: 7ffb ldrb r3, [r7, #31] - 803db34: 2b00 cmp r3, #0 - 803db36: bf0c ite eq - 803db38: 2301 moveq r3, #1 - 803db3a: 2300 movne r3, #0 - 803db3c: b2db uxtb r3, r3 - 803db3e: 83bb strh r3, [r7, #28] + 803db62: 7ffb ldrb r3, [r7, #31] + 803db64: 2b00 cmp r3, #0 + 803db66: bf0c ite eq + 803db68: 2301 moveq r3, #1 + 803db6a: 2300 movne r3, #0 + 803db6c: b2db uxtb r3, r3 + 803db6e: 83bb strh r3, [r7, #28] p = tcp_output_alloc_header(pcb, optlen, len, seg->tcphdr->seqno); - 803db40: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 803db44: b299 uxth r1, r3 - 803db46: 6a3b ldr r3, [r7, #32] - 803db48: 68db ldr r3, [r3, #12] - 803db4a: 685b ldr r3, [r3, #4] - 803db4c: 8bba ldrh r2, [r7, #28] - 803db4e: 6878 ldr r0, [r7, #4] - 803db50: f7ff fdf8 bl 803d744 - 803db54: 61b8 str r0, [r7, #24] + 803db70: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 803db74: b299 uxth r1, r3 + 803db76: 6a3b ldr r3, [r7, #32] + 803db78: 68db ldr r3, [r3, #12] + 803db7a: 685b ldr r3, [r3, #4] + 803db7c: 8bba ldrh r2, [r7, #28] + 803db7e: 6878 ldr r0, [r7, #4] + 803db80: f7ff fdf8 bl 803d774 + 803db84: 61b8 str r0, [r7, #24] if (p == NULL) { - 803db56: 69bb ldr r3, [r7, #24] - 803db58: 2b00 cmp r3, #0 - 803db5a: d102 bne.n 803db62 + 803db86: 69bb ldr r3, [r7, #24] + 803db88: 2b00 cmp r3, #0 + 803db8a: d102 bne.n 803db92 LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n")); return ERR_MEM; - 803db5c: f04f 33ff mov.w r3, #4294967295 - 803db60: e04c b.n 803dbfc + 803db8c: f04f 33ff mov.w r3, #4294967295 + 803db90: e04c b.n 803dc2c } tcphdr = (struct tcp_hdr *)p->payload; - 803db62: 69bb ldr r3, [r7, #24] - 803db64: 685b ldr r3, [r3, #4] - 803db66: 617b str r3, [r7, #20] + 803db92: 69bb ldr r3, [r7, #24] + 803db94: 685b ldr r3, [r3, #4] + 803db96: 617b str r3, [r7, #20] if (is_fin) { - 803db68: 7ffb ldrb r3, [r7, #31] - 803db6a: 2b00 cmp r3, #0 - 803db6c: d011 beq.n 803db92 + 803db98: 7ffb ldrb r3, [r7, #31] + 803db9a: 2b00 cmp r3, #0 + 803db9c: d011 beq.n 803dbc2 /* FIN segment, no data */ TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN); - 803db6e: 697b ldr r3, [r7, #20] - 803db70: 899b ldrh r3, [r3, #12] - 803db72: b29b uxth r3, r3 - 803db74: b21b sxth r3, r3 - 803db76: f423 537c bic.w r3, r3, #16128 ; 0x3f00 - 803db7a: b21c sxth r4, r3 - 803db7c: 2011 movs r0, #17 - 803db7e: f7f8 f993 bl 8035ea8 - 803db82: 4603 mov r3, r0 - 803db84: b21b sxth r3, r3 - 803db86: 4323 orrs r3, r4 - 803db88: b21b sxth r3, r3 - 803db8a: b29a uxth r2, r3 - 803db8c: 697b ldr r3, [r7, #20] - 803db8e: 819a strh r2, [r3, #12] - 803db90: e010 b.n 803dbb4 + 803db9e: 697b ldr r3, [r7, #20] + 803dba0: 899b ldrh r3, [r3, #12] + 803dba2: b29b uxth r3, r3 + 803dba4: b21b sxth r3, r3 + 803dba6: f423 537c bic.w r3, r3, #16128 ; 0x3f00 + 803dbaa: b21c sxth r4, r3 + 803dbac: 2011 movs r0, #17 + 803dbae: f7f8 f993 bl 8035ed8 + 803dbb2: 4603 mov r3, r0 + 803dbb4: b21b sxth r3, r3 + 803dbb6: 4323 orrs r3, r4 + 803dbb8: b21b sxth r3, r3 + 803dbba: b29a uxth r2, r3 + 803dbbc: 697b ldr r3, [r7, #20] + 803dbbe: 819a strh r2, [r3, #12] + 803dbc0: e010 b.n 803dbe4 } else { /* Data segment, copy in one byte from the head of the unacked queue */ char *d = ((char *)p->payload + TCP_HLEN); - 803db92: 69bb ldr r3, [r7, #24] - 803db94: 685b ldr r3, [r3, #4] - 803db96: 3314 adds r3, #20 - 803db98: 613b str r3, [r7, #16] + 803dbc2: 69bb ldr r3, [r7, #24] + 803dbc4: 685b ldr r3, [r3, #4] + 803dbc6: 3314 adds r3, #20 + 803dbc8: 613b str r3, [r7, #16] /* Depending on whether the segment has already been sent (unacked) or not (unsent), seg->p->payload points to the IP header or TCP header. Ensure we copy the first TCP data byte: */ pbuf_copy_partial(seg->p, d, 1, seg->p->tot_len - seg->len); - 803db9a: 6a3b ldr r3, [r7, #32] - 803db9c: 6858 ldr r0, [r3, #4] - 803db9e: 6a3b ldr r3, [r7, #32] - 803dba0: 685b ldr r3, [r3, #4] - 803dba2: 891a ldrh r2, [r3, #8] - 803dba4: 6a3b ldr r3, [r7, #32] - 803dba6: 891b ldrh r3, [r3, #8] - 803dba8: 1ad3 subs r3, r2, r3 - 803dbaa: b29b uxth r3, r3 - 803dbac: 2201 movs r2, #1 - 803dbae: 6939 ldr r1, [r7, #16] - 803dbb0: f7f9 ff96 bl 8037ae0 + 803dbca: 6a3b ldr r3, [r7, #32] + 803dbcc: 6858 ldr r0, [r3, #4] + 803dbce: 6a3b ldr r3, [r7, #32] + 803dbd0: 685b ldr r3, [r3, #4] + 803dbd2: 891a ldrh r2, [r3, #8] + 803dbd4: 6a3b ldr r3, [r7, #32] + 803dbd6: 891b ldrh r3, [r3, #8] + 803dbd8: 1ad3 subs r3, r2, r3 + 803dbda: b29b uxth r3, r3 + 803dbdc: 2201 movs r2, #1 + 803dbde: 6939 ldr r1, [r7, #16] + 803dbe0: f7f9 ff96 bl 8037b10 } /* The byte may be acknowledged without the window being opened. */ snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + 1; - 803dbb4: 6a3b ldr r3, [r7, #32] - 803dbb6: 68db ldr r3, [r3, #12] - 803dbb8: 685b ldr r3, [r3, #4] - 803dbba: 4618 mov r0, r3 - 803dbbc: f7f8 f989 bl 8035ed2 - 803dbc0: 4603 mov r3, r0 - 803dbc2: 3301 adds r3, #1 - 803dbc4: 60fb str r3, [r7, #12] + 803dbe4: 6a3b ldr r3, [r7, #32] + 803dbe6: 68db ldr r3, [r3, #12] + 803dbe8: 685b ldr r3, [r3, #4] + 803dbea: 4618 mov r0, r3 + 803dbec: f7f8 f989 bl 8035f02 + 803dbf0: 4603 mov r3, r0 + 803dbf2: 3301 adds r3, #1 + 803dbf4: 60fb str r3, [r7, #12] if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) { - 803dbc6: 687b ldr r3, [r7, #4] - 803dbc8: 6d1a ldr r2, [r3, #80] ; 0x50 - 803dbca: 68fb ldr r3, [r7, #12] - 803dbcc: 1ad3 subs r3, r2, r3 - 803dbce: 2b00 cmp r3, #0 - 803dbd0: da02 bge.n 803dbd8 + 803dbf6: 687b ldr r3, [r7, #4] + 803dbf8: 6d1a ldr r2, [r3, #80] ; 0x50 + 803dbfa: 68fb ldr r3, [r7, #12] + 803dbfc: 1ad3 subs r3, r2, r3 + 803dbfe: 2b00 cmp r3, #0 + 803dc00: da02 bge.n 803dc08 pcb->snd_nxt = snd_nxt; - 803dbd2: 687b ldr r3, [r7, #4] - 803dbd4: 68fa ldr r2, [r7, #12] - 803dbd6: 651a str r2, [r3, #80] ; 0x50 + 803dc02: 687b ldr r3, [r7, #4] + 803dc04: 68fa ldr r2, [r7, #12] + 803dc06: 651a str r2, [r3, #80] ; 0x50 } tcp_output_fill_options(pcb, p, 0, optlen); - 803dbd8: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 803dbdc: 2200 movs r2, #0 - 803dbde: 69b9 ldr r1, [r7, #24] - 803dbe0: 6878 ldr r0, [r7, #4] - 803dbe2: f7ff fded bl 803d7c0 + 803dc08: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 803dc0c: 2200 movs r2, #0 + 803dc0e: 69b9 ldr r1, [r7, #24] + 803dc10: 6878 ldr r0, [r7, #4] + 803dc12: f7ff fded bl 803d7f0 err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip); - 803dbe6: 687a ldr r2, [r7, #4] - 803dbe8: 687b ldr r3, [r7, #4] - 803dbea: 3304 adds r3, #4 - 803dbec: 69b9 ldr r1, [r7, #24] - 803dbee: 6878 ldr r0, [r7, #4] - 803dbf0: f7ff fe26 bl 803d840 - 803dbf4: 4603 mov r3, r0 - 803dbf6: 72fb strb r3, [r7, #11] + 803dc16: 687a ldr r2, [r7, #4] + 803dc18: 687b ldr r3, [r7, #4] + 803dc1a: 3304 adds r3, #4 + 803dc1c: 69b9 ldr r1, [r7, #24] + 803dc1e: 6878 ldr r0, [r7, #4] + 803dc20: f7ff fe26 bl 803d870 + 803dc24: 4603 mov r3, r0 + 803dc26: 72fb strb r3, [r7, #11] LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F " ackno %"U32_F" err %d.\n", pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err)); return err; - 803dbf8: f997 300b ldrsb.w r3, [r7, #11] + 803dc28: f997 300b ldrsb.w r3, [r7, #11] } - 803dbfc: 4618 mov r0, r3 - 803dbfe: 372c adds r7, #44 ; 0x2c - 803dc00: 46bd mov sp, r7 - 803dc02: bd90 pop {r4, r7, pc} - 803dc04: 08043950 .word 0x08043950 - 803dc08: 08044148 .word 0x08044148 - 803dc0c: 080439a4 .word 0x080439a4 + 803dc2c: 4618 mov r0, r3 + 803dc2e: 372c adds r7, #44 ; 0x2c + 803dc30: 46bd mov sp, r7 + 803dc32: bd90 pop {r4, r7, pc} + 803dc34: 08043980 .word 0x08043980 + 803dc38: 08044178 .word 0x08044178 + 803dc3c: 080439d4 .word 0x080439d4 -0803dc10 : +0803dc40 : * * @param arg unused argument */ static void tcpip_tcp_timer(void *arg) { - 803dc10: b580 push {r7, lr} - 803dc12: b082 sub sp, #8 - 803dc14: af00 add r7, sp, #0 - 803dc16: 6078 str r0, [r7, #4] + 803dc40: b580 push {r7, lr} + 803dc42: b082 sub sp, #8 + 803dc44: af00 add r7, sp, #0 + 803dc46: 6078 str r0, [r7, #4] LWIP_UNUSED_ARG(arg); /* call TCP timer handler */ tcp_tmr(); - 803dc18: f7fa f850 bl 8037cbc + 803dc48: f7fa f850 bl 8037cec /* timer still needed? */ if (tcp_active_pcbs || tcp_tw_pcbs) { - 803dc1c: 4b0a ldr r3, [pc, #40] ; (803dc48 ) - 803dc1e: 681b ldr r3, [r3, #0] - 803dc20: 2b00 cmp r3, #0 - 803dc22: d103 bne.n 803dc2c - 803dc24: 4b09 ldr r3, [pc, #36] ; (803dc4c ) - 803dc26: 681b ldr r3, [r3, #0] - 803dc28: 2b00 cmp r3, #0 - 803dc2a: d005 beq.n 803dc38 + 803dc4c: 4b0a ldr r3, [pc, #40] ; (803dc78 ) + 803dc4e: 681b ldr r3, [r3, #0] + 803dc50: 2b00 cmp r3, #0 + 803dc52: d103 bne.n 803dc5c + 803dc54: 4b09 ldr r3, [pc, #36] ; (803dc7c ) + 803dc56: 681b ldr r3, [r3, #0] + 803dc58: 2b00 cmp r3, #0 + 803dc5a: d005 beq.n 803dc68 /* restart timer */ sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); - 803dc2c: 2200 movs r2, #0 - 803dc2e: 4908 ldr r1, [pc, #32] ; (803dc50 ) - 803dc30: 20fa movs r0, #250 ; 0xfa - 803dc32: f000 f8f3 bl 803de1c - 803dc36: e003 b.n 803dc40 + 803dc5c: 2200 movs r2, #0 + 803dc5e: 4908 ldr r1, [pc, #32] ; (803dc80 ) + 803dc60: 20fa movs r0, #250 ; 0xfa + 803dc62: f000 f8f3 bl 803de4c + 803dc66: e003 b.n 803dc70 } else { /* disable timer */ tcpip_tcp_timer_active = 0; - 803dc38: 4b06 ldr r3, [pc, #24] ; (803dc54 ) - 803dc3a: 2200 movs r2, #0 - 803dc3c: 601a str r2, [r3, #0] - } -} - 803dc3e: bf00 nop - 803dc40: bf00 nop - 803dc42: 3708 adds r7, #8 - 803dc44: 46bd mov sp, r7 - 803dc46: bd80 pop {r7, pc} - 803dc48: 2400e964 .word 0x2400e964 - 803dc4c: 2400e968 .word 0x2400e968 - 803dc50: 0803dc11 .word 0x0803dc11 - 803dc54: 2400e9b0 .word 0x2400e9b0 - -0803dc58 : + 803dc68: 4b06 ldr r3, [pc, #24] ; (803dc84 ) + 803dc6a: 2200 movs r2, #0 + 803dc6c: 601a str r2, [r3, #0] + } +} + 803dc6e: bf00 nop + 803dc70: bf00 nop + 803dc72: 3708 adds r7, #8 + 803dc74: 46bd mov sp, r7 + 803dc76: bd80 pop {r7, pc} + 803dc78: 2400e964 .word 0x2400e964 + 803dc7c: 2400e968 .word 0x2400e968 + 803dc80: 0803dc41 .word 0x0803dc41 + 803dc84: 2400e9b0 .word 0x2400e9b0 + +0803dc88 : * the reason is to have the TCP timer only running when * there are active (or time-wait) PCBs. */ void tcp_timer_needed(void) { - 803dc58: b580 push {r7, lr} - 803dc5a: af00 add r7, sp, #0 + 803dc88: b580 push {r7, lr} + 803dc8a: af00 add r7, sp, #0 LWIP_ASSERT_CORE_LOCKED(); /* timer is off but needed again? */ if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) { - 803dc5c: 4b0a ldr r3, [pc, #40] ; (803dc88 ) - 803dc5e: 681b ldr r3, [r3, #0] - 803dc60: 2b00 cmp r3, #0 - 803dc62: d10f bne.n 803dc84 - 803dc64: 4b09 ldr r3, [pc, #36] ; (803dc8c ) - 803dc66: 681b ldr r3, [r3, #0] - 803dc68: 2b00 cmp r3, #0 - 803dc6a: d103 bne.n 803dc74 - 803dc6c: 4b08 ldr r3, [pc, #32] ; (803dc90 ) - 803dc6e: 681b ldr r3, [r3, #0] - 803dc70: 2b00 cmp r3, #0 - 803dc72: d007 beq.n 803dc84 + 803dc8c: 4b0a ldr r3, [pc, #40] ; (803dcb8 ) + 803dc8e: 681b ldr r3, [r3, #0] + 803dc90: 2b00 cmp r3, #0 + 803dc92: d10f bne.n 803dcb4 + 803dc94: 4b09 ldr r3, [pc, #36] ; (803dcbc ) + 803dc96: 681b ldr r3, [r3, #0] + 803dc98: 2b00 cmp r3, #0 + 803dc9a: d103 bne.n 803dca4 + 803dc9c: 4b08 ldr r3, [pc, #32] ; (803dcc0 ) + 803dc9e: 681b ldr r3, [r3, #0] + 803dca0: 2b00 cmp r3, #0 + 803dca2: d007 beq.n 803dcb4 /* enable and start timer */ tcpip_tcp_timer_active = 1; - 803dc74: 4b04 ldr r3, [pc, #16] ; (803dc88 ) - 803dc76: 2201 movs r2, #1 - 803dc78: 601a str r2, [r3, #0] + 803dca4: 4b04 ldr r3, [pc, #16] ; (803dcb8 ) + 803dca6: 2201 movs r2, #1 + 803dca8: 601a str r2, [r3, #0] sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); - 803dc7a: 2200 movs r2, #0 - 803dc7c: 4905 ldr r1, [pc, #20] ; (803dc94 ) - 803dc7e: 20fa movs r0, #250 ; 0xfa - 803dc80: f000 f8cc bl 803de1c + 803dcaa: 2200 movs r2, #0 + 803dcac: 4905 ldr r1, [pc, #20] ; (803dcc4 ) + 803dcae: 20fa movs r0, #250 ; 0xfa + 803dcb0: f000 f8cc bl 803de4c } } - 803dc84: bf00 nop - 803dc86: bd80 pop {r7, pc} - 803dc88: 2400e9b0 .word 0x2400e9b0 - 803dc8c: 2400e964 .word 0x2400e964 - 803dc90: 2400e968 .word 0x2400e968 - 803dc94: 0803dc11 .word 0x0803dc11 + 803dcb4: bf00 nop + 803dcb6: bd80 pop {r7, pc} + 803dcb8: 2400e9b0 .word 0x2400e9b0 + 803dcbc: 2400e964 .word 0x2400e964 + 803dcc0: 2400e968 .word 0x2400e968 + 803dcc4: 0803dc41 .word 0x0803dc41 -0803dc98 : +0803dcc8 : #if LWIP_DEBUG_TIMERNAMES sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg, const char *handler_name) #else /* LWIP_DEBUG_TIMERNAMES */ sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg) #endif { - 803dc98: b580 push {r7, lr} - 803dc9a: b086 sub sp, #24 - 803dc9c: af00 add r7, sp, #0 - 803dc9e: 60f8 str r0, [r7, #12] - 803dca0: 60b9 str r1, [r7, #8] - 803dca2: 607a str r2, [r7, #4] + 803dcc8: b580 push {r7, lr} + 803dcca: b086 sub sp, #24 + 803dccc: af00 add r7, sp, #0 + 803dcce: 60f8 str r0, [r7, #12] + 803dcd0: 60b9 str r1, [r7, #8] + 803dcd2: 607a str r2, [r7, #4] struct sys_timeo *timeout, *t; timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT); - 803dca4: 2006 movs r0, #6 - 803dca6: f7f8 fe2f bl 8036908 - 803dcaa: 6138 str r0, [r7, #16] + 803dcd4: 2006 movs r0, #6 + 803dcd6: f7f8 fe2f bl 8036938 + 803dcda: 6138 str r0, [r7, #16] if (timeout == NULL) { - 803dcac: 693b ldr r3, [r7, #16] - 803dcae: 2b00 cmp r3, #0 - 803dcb0: d109 bne.n 803dcc6 + 803dcdc: 693b ldr r3, [r7, #16] + 803dcde: 2b00 cmp r3, #0 + 803dce0: d109 bne.n 803dcf6 LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL); - 803dcb2: 693b ldr r3, [r7, #16] - 803dcb4: 2b00 cmp r3, #0 - 803dcb6: d151 bne.n 803dd5c - 803dcb8: 4b2a ldr r3, [pc, #168] ; (803dd64 ) - 803dcba: 22be movs r2, #190 ; 0xbe - 803dcbc: 492a ldr r1, [pc, #168] ; (803dd68 ) - 803dcbe: 482b ldr r0, [pc, #172] ; (803dd6c ) - 803dcc0: f002 ff0e bl 8040ae0 + 803dce2: 693b ldr r3, [r7, #16] + 803dce4: 2b00 cmp r3, #0 + 803dce6: d151 bne.n 803dd8c + 803dce8: 4b2a ldr r3, [pc, #168] ; (803dd94 ) + 803dcea: 22be movs r2, #190 ; 0xbe + 803dcec: 492a ldr r1, [pc, #168] ; (803dd98 ) + 803dcee: 482b ldr r0, [pc, #172] ; (803dd9c ) + 803dcf0: f002 ff0e bl 8040b10 return; - 803dcc4: e04a b.n 803dd5c + 803dcf4: e04a b.n 803dd8c } timeout->next = NULL; - 803dcc6: 693b ldr r3, [r7, #16] - 803dcc8: 2200 movs r2, #0 - 803dcca: 601a str r2, [r3, #0] + 803dcf6: 693b ldr r3, [r7, #16] + 803dcf8: 2200 movs r2, #0 + 803dcfa: 601a str r2, [r3, #0] timeout->h = handler; - 803dccc: 693b ldr r3, [r7, #16] - 803dcce: 68ba ldr r2, [r7, #8] - 803dcd0: 609a str r2, [r3, #8] + 803dcfc: 693b ldr r3, [r7, #16] + 803dcfe: 68ba ldr r2, [r7, #8] + 803dd00: 609a str r2, [r3, #8] timeout->arg = arg; - 803dcd2: 693b ldr r3, [r7, #16] - 803dcd4: 687a ldr r2, [r7, #4] - 803dcd6: 60da str r2, [r3, #12] + 803dd02: 693b ldr r3, [r7, #16] + 803dd04: 687a ldr r2, [r7, #4] + 803dd06: 60da str r2, [r3, #12] timeout->time = abs_time; - 803dcd8: 693b ldr r3, [r7, #16] - 803dcda: 68fa ldr r2, [r7, #12] - 803dcdc: 605a str r2, [r3, #4] + 803dd08: 693b ldr r3, [r7, #16] + 803dd0a: 68fa ldr r2, [r7, #12] + 803dd0c: 605a str r2, [r3, #4] timeout->handler_name = handler_name; LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p abs_time=%"U32_F" handler=%s arg=%p\n", (void *)timeout, abs_time, handler_name, (void *)arg)); #endif /* LWIP_DEBUG_TIMERNAMES */ if (next_timeout == NULL) { - 803dcde: 4b24 ldr r3, [pc, #144] ; (803dd70 ) - 803dce0: 681b ldr r3, [r3, #0] - 803dce2: 2b00 cmp r3, #0 - 803dce4: d103 bne.n 803dcee + 803dd0e: 4b24 ldr r3, [pc, #144] ; (803dda0 ) + 803dd10: 681b ldr r3, [r3, #0] + 803dd12: 2b00 cmp r3, #0 + 803dd14: d103 bne.n 803dd1e next_timeout = timeout; - 803dce6: 4a22 ldr r2, [pc, #136] ; (803dd70 ) - 803dce8: 693b ldr r3, [r7, #16] - 803dcea: 6013 str r3, [r2, #0] + 803dd16: 4a22 ldr r2, [pc, #136] ; (803dda0 ) + 803dd18: 693b ldr r3, [r7, #16] + 803dd1a: 6013 str r3, [r2, #0] return; - 803dcec: e037 b.n 803dd5e + 803dd1c: e037 b.n 803dd8e } if (TIME_LESS_THAN(timeout->time, next_timeout->time)) { - 803dcee: 693b ldr r3, [r7, #16] - 803dcf0: 685a ldr r2, [r3, #4] - 803dcf2: 4b1f ldr r3, [pc, #124] ; (803dd70 ) - 803dcf4: 681b ldr r3, [r3, #0] - 803dcf6: 685b ldr r3, [r3, #4] - 803dcf8: 1ad3 subs r3, r2, r3 - 803dcfa: 0fdb lsrs r3, r3, #31 - 803dcfc: f003 0301 and.w r3, r3, #1 - 803dd00: b2db uxtb r3, r3 - 803dd02: 2b00 cmp r3, #0 - 803dd04: d007 beq.n 803dd16 + 803dd1e: 693b ldr r3, [r7, #16] + 803dd20: 685a ldr r2, [r3, #4] + 803dd22: 4b1f ldr r3, [pc, #124] ; (803dda0 ) + 803dd24: 681b ldr r3, [r3, #0] + 803dd26: 685b ldr r3, [r3, #4] + 803dd28: 1ad3 subs r3, r2, r3 + 803dd2a: 0fdb lsrs r3, r3, #31 + 803dd2c: f003 0301 and.w r3, r3, #1 + 803dd30: b2db uxtb r3, r3 + 803dd32: 2b00 cmp r3, #0 + 803dd34: d007 beq.n 803dd46 timeout->next = next_timeout; - 803dd06: 4b1a ldr r3, [pc, #104] ; (803dd70 ) - 803dd08: 681a ldr r2, [r3, #0] - 803dd0a: 693b ldr r3, [r7, #16] - 803dd0c: 601a str r2, [r3, #0] + 803dd36: 4b1a ldr r3, [pc, #104] ; (803dda0 ) + 803dd38: 681a ldr r2, [r3, #0] + 803dd3a: 693b ldr r3, [r7, #16] + 803dd3c: 601a str r2, [r3, #0] next_timeout = timeout; - 803dd0e: 4a18 ldr r2, [pc, #96] ; (803dd70 ) - 803dd10: 693b ldr r3, [r7, #16] - 803dd12: 6013 str r3, [r2, #0] - 803dd14: e023 b.n 803dd5e + 803dd3e: 4a18 ldr r2, [pc, #96] ; (803dda0 ) + 803dd40: 693b ldr r3, [r7, #16] + 803dd42: 6013 str r3, [r2, #0] + 803dd44: e023 b.n 803dd8e } else { for (t = next_timeout; t != NULL; t = t->next) { - 803dd16: 4b16 ldr r3, [pc, #88] ; (803dd70 ) - 803dd18: 681b ldr r3, [r3, #0] - 803dd1a: 617b str r3, [r7, #20] - 803dd1c: e01a b.n 803dd54 + 803dd46: 4b16 ldr r3, [pc, #88] ; (803dda0 ) + 803dd48: 681b ldr r3, [r3, #0] + 803dd4a: 617b str r3, [r7, #20] + 803dd4c: e01a b.n 803dd84 if ((t->next == NULL) || TIME_LESS_THAN(timeout->time, t->next->time)) { - 803dd1e: 697b ldr r3, [r7, #20] - 803dd20: 681b ldr r3, [r3, #0] - 803dd22: 2b00 cmp r3, #0 - 803dd24: d00b beq.n 803dd3e - 803dd26: 693b ldr r3, [r7, #16] - 803dd28: 685a ldr r2, [r3, #4] - 803dd2a: 697b ldr r3, [r7, #20] - 803dd2c: 681b ldr r3, [r3, #0] - 803dd2e: 685b ldr r3, [r3, #4] - 803dd30: 1ad3 subs r3, r2, r3 - 803dd32: 0fdb lsrs r3, r3, #31 - 803dd34: f003 0301 and.w r3, r3, #1 - 803dd38: b2db uxtb r3, r3 - 803dd3a: 2b00 cmp r3, #0 - 803dd3c: d007 beq.n 803dd4e + 803dd4e: 697b ldr r3, [r7, #20] + 803dd50: 681b ldr r3, [r3, #0] + 803dd52: 2b00 cmp r3, #0 + 803dd54: d00b beq.n 803dd6e + 803dd56: 693b ldr r3, [r7, #16] + 803dd58: 685a ldr r2, [r3, #4] + 803dd5a: 697b ldr r3, [r7, #20] + 803dd5c: 681b ldr r3, [r3, #0] + 803dd5e: 685b ldr r3, [r3, #4] + 803dd60: 1ad3 subs r3, r2, r3 + 803dd62: 0fdb lsrs r3, r3, #31 + 803dd64: f003 0301 and.w r3, r3, #1 + 803dd68: b2db uxtb r3, r3 + 803dd6a: 2b00 cmp r3, #0 + 803dd6c: d007 beq.n 803dd7e timeout->next = t->next; - 803dd3e: 697b ldr r3, [r7, #20] - 803dd40: 681a ldr r2, [r3, #0] - 803dd42: 693b ldr r3, [r7, #16] - 803dd44: 601a str r2, [r3, #0] + 803dd6e: 697b ldr r3, [r7, #20] + 803dd70: 681a ldr r2, [r3, #0] + 803dd72: 693b ldr r3, [r7, #16] + 803dd74: 601a str r2, [r3, #0] t->next = timeout; - 803dd46: 697b ldr r3, [r7, #20] - 803dd48: 693a ldr r2, [r7, #16] - 803dd4a: 601a str r2, [r3, #0] + 803dd76: 697b ldr r3, [r7, #20] + 803dd78: 693a ldr r2, [r7, #16] + 803dd7a: 601a str r2, [r3, #0] break; - 803dd4c: e007 b.n 803dd5e + 803dd7c: e007 b.n 803dd8e for (t = next_timeout; t != NULL; t = t->next) { - 803dd4e: 697b ldr r3, [r7, #20] - 803dd50: 681b ldr r3, [r3, #0] - 803dd52: 617b str r3, [r7, #20] - 803dd54: 697b ldr r3, [r7, #20] - 803dd56: 2b00 cmp r3, #0 - 803dd58: d1e1 bne.n 803dd1e - 803dd5a: e000 b.n 803dd5e + 803dd7e: 697b ldr r3, [r7, #20] + 803dd80: 681b ldr r3, [r3, #0] + 803dd82: 617b str r3, [r7, #20] + 803dd84: 697b ldr r3, [r7, #20] + 803dd86: 2b00 cmp r3, #0 + 803dd88: d1e1 bne.n 803dd4e + 803dd8a: e000 b.n 803dd8e return; - 803dd5c: bf00 nop + 803dd8c: bf00 nop } } } } - 803dd5e: 3718 adds r7, #24 - 803dd60: 46bd mov sp, r7 - 803dd62: bd80 pop {r7, pc} - 803dd64: 0804416c .word 0x0804416c - 803dd68: 080441a0 .word 0x080441a0 - 803dd6c: 080441e0 .word 0x080441e0 - 803dd70: 2400e9a8 .word 0x2400e9a8 + 803dd8e: 3718 adds r7, #24 + 803dd90: 46bd mov sp, r7 + 803dd92: bd80 pop {r7, pc} + 803dd94: 0804419c .word 0x0804419c + 803dd98: 080441d0 .word 0x080441d0 + 803dd9c: 08044210 .word 0x08044210 + 803dda0: 2400e9a8 .word 0x2400e9a8 -0803dd74 : +0803dda4 : #if !LWIP_TESTMODE static #endif void lwip_cyclic_timer(void *arg) { - 803dd74: b580 push {r7, lr} - 803dd76: b086 sub sp, #24 - 803dd78: af00 add r7, sp, #0 - 803dd7a: 6078 str r0, [r7, #4] + 803dda4: b580 push {r7, lr} + 803dda6: b086 sub sp, #24 + 803dda8: af00 add r7, sp, #0 + 803ddaa: 6078 str r0, [r7, #4] u32_t now; u32_t next_timeout_time; const struct lwip_cyclic_timer *cyclic = (const struct lwip_cyclic_timer *)arg; - 803dd7c: 687b ldr r3, [r7, #4] - 803dd7e: 617b str r3, [r7, #20] + 803ddac: 687b ldr r3, [r7, #4] + 803ddae: 617b str r3, [r7, #20] #if LWIP_DEBUG_TIMERNAMES LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: %s()\n", cyclic->handler_name)); #endif cyclic->handler(); - 803dd80: 697b ldr r3, [r7, #20] - 803dd82: 685b ldr r3, [r3, #4] - 803dd84: 4798 blx r3 + 803ddb0: 697b ldr r3, [r7, #20] + 803ddb2: 685b ldr r3, [r3, #4] + 803ddb4: 4798 blx r3 now = sys_now(); - 803dd86: f7f7 fe61 bl 8035a4c - 803dd8a: 6138 str r0, [r7, #16] + 803ddb6: f7f7 fe61 bl 8035a7c + 803ddba: 6138 str r0, [r7, #16] next_timeout_time = (u32_t)(current_timeout_due_time + cyclic->interval_ms); /* overflow handled by TIME_LESS_THAN macro */ - 803dd8c: 697b ldr r3, [r7, #20] - 803dd8e: 681a ldr r2, [r3, #0] - 803dd90: 4b0f ldr r3, [pc, #60] ; (803ddd0 ) - 803dd92: 681b ldr r3, [r3, #0] - 803dd94: 4413 add r3, r2 - 803dd96: 60fb str r3, [r7, #12] + 803ddbc: 697b ldr r3, [r7, #20] + 803ddbe: 681a ldr r2, [r3, #0] + 803ddc0: 4b0f ldr r3, [pc, #60] ; (803de00 ) + 803ddc2: 681b ldr r3, [r3, #0] + 803ddc4: 4413 add r3, r2 + 803ddc6: 60fb str r3, [r7, #12] if (TIME_LESS_THAN(next_timeout_time, now)) { - 803dd98: 68fa ldr r2, [r7, #12] - 803dd9a: 693b ldr r3, [r7, #16] - 803dd9c: 1ad3 subs r3, r2, r3 - 803dd9e: 0fdb lsrs r3, r3, #31 - 803dda0: f003 0301 and.w r3, r3, #1 - 803dda4: b2db uxtb r3, r3 - 803dda6: 2b00 cmp r3, #0 - 803dda8: d009 beq.n 803ddbe + 803ddc8: 68fa ldr r2, [r7, #12] + 803ddca: 693b ldr r3, [r7, #16] + 803ddcc: 1ad3 subs r3, r2, r3 + 803ddce: 0fdb lsrs r3, r3, #31 + 803ddd0: f003 0301 and.w r3, r3, #1 + 803ddd4: b2db uxtb r3, r3 + 803ddd6: 2b00 cmp r3, #0 + 803ddd8: d009 beq.n 803ddee /* timer would immediately expire again -> "overload" -> restart without any correction */ #if LWIP_DEBUG_TIMERNAMES sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg, cyclic->handler_name); #else sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg); - 803ddaa: 697b ldr r3, [r7, #20] - 803ddac: 681a ldr r2, [r3, #0] - 803ddae: 693b ldr r3, [r7, #16] - 803ddb0: 4413 add r3, r2 - 803ddb2: 687a ldr r2, [r7, #4] - 803ddb4: 4907 ldr r1, [pc, #28] ; (803ddd4 ) - 803ddb6: 4618 mov r0, r3 - 803ddb8: f7ff ff6e bl 803dc98 + 803ddda: 697b ldr r3, [r7, #20] + 803dddc: 681a ldr r2, [r3, #0] + 803ddde: 693b ldr r3, [r7, #16] + 803dde0: 4413 add r3, r2 + 803dde2: 687a ldr r2, [r7, #4] + 803dde4: 4907 ldr r1, [pc, #28] ; (803de04 ) + 803dde6: 4618 mov r0, r3 + 803dde8: f7ff ff6e bl 803dcc8 sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg, cyclic->handler_name); #else sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg); #endif } } - 803ddbc: e004 b.n 803ddc8 + 803ddec: e004 b.n 803ddf8 sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg); - 803ddbe: 687a ldr r2, [r7, #4] - 803ddc0: 4904 ldr r1, [pc, #16] ; (803ddd4 ) - 803ddc2: 68f8 ldr r0, [r7, #12] - 803ddc4: f7ff ff68 bl 803dc98 + 803ddee: 687a ldr r2, [r7, #4] + 803ddf0: 4904 ldr r1, [pc, #16] ; (803de04 ) + 803ddf2: 68f8 ldr r0, [r7, #12] + 803ddf4: f7ff ff68 bl 803dcc8 } - 803ddc8: bf00 nop - 803ddca: 3718 adds r7, #24 - 803ddcc: 46bd mov sp, r7 - 803ddce: bd80 pop {r7, pc} - 803ddd0: 2400e9ac .word 0x2400e9ac - 803ddd4: 0803dd75 .word 0x0803dd75 + 803ddf8: bf00 nop + 803ddfa: 3718 adds r7, #24 + 803ddfc: 46bd mov sp, r7 + 803ddfe: bd80 pop {r7, pc} + 803de00: 2400e9ac .word 0x2400e9ac + 803de04: 0803dda5 .word 0x0803dda5 -0803ddd8 : +0803de08 : /** Initialize this module */ void sys_timeouts_init(void) { - 803ddd8: b580 push {r7, lr} - 803ddda: b082 sub sp, #8 - 803dddc: af00 add r7, sp, #0 + 803de08: b580 push {r7, lr} + 803de0a: b082 sub sp, #8 + 803de0c: af00 add r7, sp, #0 size_t i; /* tcp_tmr() at index 0 is started on demand */ for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) { - 803ddde: 2301 movs r3, #1 - 803dde0: 607b str r3, [r7, #4] - 803dde2: e00e b.n 803de02 + 803de0e: 2301 movs r3, #1 + 803de10: 607b str r3, [r7, #4] + 803de12: e00e b.n 803de32 /* we have to cast via size_t to get rid of const warning (this is OK as cyclic_timer() casts back to const* */ sys_timeout(lwip_cyclic_timers[i].interval_ms, lwip_cyclic_timer, LWIP_CONST_CAST(void *, &lwip_cyclic_timers[i])); - 803dde4: 4a0b ldr r2, [pc, #44] ; (803de14 ) - 803dde6: 687b ldr r3, [r7, #4] - 803dde8: f852 0033 ldr.w r0, [r2, r3, lsl #3] - 803ddec: 687b ldr r3, [r7, #4] - 803ddee: 00db lsls r3, r3, #3 - 803ddf0: 4a08 ldr r2, [pc, #32] ; (803de14 ) - 803ddf2: 4413 add r3, r2 - 803ddf4: 461a mov r2, r3 - 803ddf6: 4908 ldr r1, [pc, #32] ; (803de18 ) - 803ddf8: f000 f810 bl 803de1c + 803de14: 4a0b ldr r2, [pc, #44] ; (803de44 ) + 803de16: 687b ldr r3, [r7, #4] + 803de18: f852 0033 ldr.w r0, [r2, r3, lsl #3] + 803de1c: 687b ldr r3, [r7, #4] + 803de1e: 00db lsls r3, r3, #3 + 803de20: 4a08 ldr r2, [pc, #32] ; (803de44 ) + 803de22: 4413 add r3, r2 + 803de24: 461a mov r2, r3 + 803de26: 4908 ldr r1, [pc, #32] ; (803de48 ) + 803de28: f000 f810 bl 803de4c for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) { - 803ddfc: 687b ldr r3, [r7, #4] - 803ddfe: 3301 adds r3, #1 - 803de00: 607b str r3, [r7, #4] - 803de02: 687b ldr r3, [r7, #4] - 803de04: 2b02 cmp r3, #2 - 803de06: d9ed bls.n 803dde4 - } -} - 803de08: bf00 nop - 803de0a: bf00 nop - 803de0c: 3708 adds r7, #8 - 803de0e: 46bd mov sp, r7 - 803de10: bd80 pop {r7, pc} - 803de12: bf00 nop - 803de14: 08044db8 .word 0x08044db8 - 803de18: 0803dd75 .word 0x0803dd75 - -0803de1c : + 803de2c: 687b ldr r3, [r7, #4] + 803de2e: 3301 adds r3, #1 + 803de30: 607b str r3, [r7, #4] + 803de32: 687b ldr r3, [r7, #4] + 803de34: 2b02 cmp r3, #2 + 803de36: d9ed bls.n 803de14 + } +} + 803de38: bf00 nop + 803de3a: bf00 nop + 803de3c: 3708 adds r7, #8 + 803de3e: 46bd mov sp, r7 + 803de40: bd80 pop {r7, pc} + 803de42: bf00 nop + 803de44: 08044de8 .word 0x08044de8 + 803de48: 0803dda5 .word 0x0803dda5 + +0803de4c : sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char *handler_name) #else /* LWIP_DEBUG_TIMERNAMES */ void sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg) #endif /* LWIP_DEBUG_TIMERNAMES */ { - 803de1c: b580 push {r7, lr} - 803de1e: b086 sub sp, #24 - 803de20: af00 add r7, sp, #0 - 803de22: 60f8 str r0, [r7, #12] - 803de24: 60b9 str r1, [r7, #8] - 803de26: 607a str r2, [r7, #4] + 803de4c: b580 push {r7, lr} + 803de4e: b086 sub sp, #24 + 803de50: af00 add r7, sp, #0 + 803de52: 60f8 str r0, [r7, #12] + 803de54: 60b9 str r1, [r7, #8] + 803de56: 607a str r2, [r7, #4] u32_t next_timeout_time; LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("Timeout time too long, max is LWIP_UINT32_MAX/4 msecs", msecs <= (LWIP_UINT32_MAX / 4)); - 803de28: 68fb ldr r3, [r7, #12] - 803de2a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 803de2e: d306 bcc.n 803de3e - 803de30: 4b0a ldr r3, [pc, #40] ; (803de5c ) - 803de32: f240 1229 movw r2, #297 ; 0x129 - 803de36: 490a ldr r1, [pc, #40] ; (803de60 ) - 803de38: 480a ldr r0, [pc, #40] ; (803de64 ) - 803de3a: f002 fe51 bl 8040ae0 + 803de58: 68fb ldr r3, [r7, #12] + 803de5a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 803de5e: d306 bcc.n 803de6e + 803de60: 4b0a ldr r3, [pc, #40] ; (803de8c ) + 803de62: f240 1229 movw r2, #297 ; 0x129 + 803de66: 490a ldr r1, [pc, #40] ; (803de90 ) + 803de68: 480a ldr r0, [pc, #40] ; (803de94 ) + 803de6a: f002 fe51 bl 8040b10 next_timeout_time = (u32_t)(sys_now() + msecs); /* overflow handled by TIME_LESS_THAN macro */ - 803de3e: f7f7 fe05 bl 8035a4c - 803de42: 4602 mov r2, r0 - 803de44: 68fb ldr r3, [r7, #12] - 803de46: 4413 add r3, r2 - 803de48: 617b str r3, [r7, #20] + 803de6e: f7f7 fe05 bl 8035a7c + 803de72: 4602 mov r2, r0 + 803de74: 68fb ldr r3, [r7, #12] + 803de76: 4413 add r3, r2 + 803de78: 617b str r3, [r7, #20] #if LWIP_DEBUG_TIMERNAMES sys_timeout_abs(next_timeout_time, handler, arg, handler_name); #else sys_timeout_abs(next_timeout_time, handler, arg); - 803de4a: 687a ldr r2, [r7, #4] - 803de4c: 68b9 ldr r1, [r7, #8] - 803de4e: 6978 ldr r0, [r7, #20] - 803de50: f7ff ff22 bl 803dc98 + 803de7a: 687a ldr r2, [r7, #4] + 803de7c: 68b9 ldr r1, [r7, #8] + 803de7e: 6978 ldr r0, [r7, #20] + 803de80: f7ff ff22 bl 803dcc8 #endif } - 803de54: bf00 nop - 803de56: 3718 adds r7, #24 - 803de58: 46bd mov sp, r7 - 803de5a: bd80 pop {r7, pc} - 803de5c: 0804416c .word 0x0804416c - 803de60: 08044208 .word 0x08044208 - 803de64: 080441e0 .word 0x080441e0 + 803de84: bf00 nop + 803de86: 3718 adds r7, #24 + 803de88: 46bd mov sp, r7 + 803de8a: bd80 pop {r7, pc} + 803de8c: 0804419c .word 0x0804419c + 803de90: 08044238 .word 0x08044238 + 803de94: 08044210 .word 0x08044210 -0803de68 : +0803de98 : * * Must be called periodically from your main loop. */ void sys_check_timeouts(void) { - 803de68: b580 push {r7, lr} - 803de6a: b084 sub sp, #16 - 803de6c: af00 add r7, sp, #0 + 803de98: b580 push {r7, lr} + 803de9a: b084 sub sp, #16 + 803de9c: af00 add r7, sp, #0 u32_t now; LWIP_ASSERT_CORE_LOCKED(); /* Process only timers expired at the start of the function. */ now = sys_now(); - 803de6e: f7f7 fded bl 8035a4c - 803de72: 60f8 str r0, [r7, #12] + 803de9e: f7f7 fded bl 8035a7c + 803dea2: 60f8 str r0, [r7, #12] do { struct sys_timeo *tmptimeout; sys_timeout_handler handler; void *arg; PBUF_CHECK_FREE_OOSEQ(); - 803de74: 4b1a ldr r3, [pc, #104] ; (803dee0 ) - 803de76: 781b ldrb r3, [r3, #0] - 803de78: b2db uxtb r3, r3 - 803de7a: 2b00 cmp r3, #0 - 803de7c: d001 beq.n 803de82 - 803de7e: f7f9 f90b bl 8037098 + 803dea4: 4b1a ldr r3, [pc, #104] ; (803df10 ) + 803dea6: 781b ldrb r3, [r3, #0] + 803dea8: b2db uxtb r3, r3 + 803deaa: 2b00 cmp r3, #0 + 803deac: d001 beq.n 803deb2 + 803deae: f7f9 f90b bl 80370c8 tmptimeout = next_timeout; - 803de82: 4b18 ldr r3, [pc, #96] ; (803dee4 ) - 803de84: 681b ldr r3, [r3, #0] - 803de86: 60bb str r3, [r7, #8] + 803deb2: 4b18 ldr r3, [pc, #96] ; (803df14 ) + 803deb4: 681b ldr r3, [r3, #0] + 803deb6: 60bb str r3, [r7, #8] if (tmptimeout == NULL) { - 803de88: 68bb ldr r3, [r7, #8] - 803de8a: 2b00 cmp r3, #0 - 803de8c: d022 beq.n 803ded4 + 803deb8: 68bb ldr r3, [r7, #8] + 803deba: 2b00 cmp r3, #0 + 803debc: d022 beq.n 803df04 return; } if (TIME_LESS_THAN(now, tmptimeout->time)) { - 803de8e: 68bb ldr r3, [r7, #8] - 803de90: 685b ldr r3, [r3, #4] - 803de92: 68fa ldr r2, [r7, #12] - 803de94: 1ad3 subs r3, r2, r3 - 803de96: 0fdb lsrs r3, r3, #31 - 803de98: f003 0301 and.w r3, r3, #1 - 803de9c: b2db uxtb r3, r3 - 803de9e: 2b00 cmp r3, #0 - 803dea0: d11a bne.n 803ded8 + 803debe: 68bb ldr r3, [r7, #8] + 803dec0: 685b ldr r3, [r3, #4] + 803dec2: 68fa ldr r2, [r7, #12] + 803dec4: 1ad3 subs r3, r2, r3 + 803dec6: 0fdb lsrs r3, r3, #31 + 803dec8: f003 0301 and.w r3, r3, #1 + 803decc: b2db uxtb r3, r3 + 803dece: 2b00 cmp r3, #0 + 803ded0: d11a bne.n 803df08 return; } /* Timeout has expired */ next_timeout = tmptimeout->next; - 803dea2: 68bb ldr r3, [r7, #8] - 803dea4: 681b ldr r3, [r3, #0] - 803dea6: 4a0f ldr r2, [pc, #60] ; (803dee4 ) - 803dea8: 6013 str r3, [r2, #0] + 803ded2: 68bb ldr r3, [r7, #8] + 803ded4: 681b ldr r3, [r3, #0] + 803ded6: 4a0f ldr r2, [pc, #60] ; (803df14 ) + 803ded8: 6013 str r3, [r2, #0] handler = tmptimeout->h; - 803deaa: 68bb ldr r3, [r7, #8] - 803deac: 689b ldr r3, [r3, #8] - 803deae: 607b str r3, [r7, #4] + 803deda: 68bb ldr r3, [r7, #8] + 803dedc: 689b ldr r3, [r3, #8] + 803dede: 607b str r3, [r7, #4] arg = tmptimeout->arg; - 803deb0: 68bb ldr r3, [r7, #8] - 803deb2: 68db ldr r3, [r3, #12] - 803deb4: 603b str r3, [r7, #0] + 803dee0: 68bb ldr r3, [r7, #8] + 803dee2: 68db ldr r3, [r3, #12] + 803dee4: 603b str r3, [r7, #0] current_timeout_due_time = tmptimeout->time; - 803deb6: 68bb ldr r3, [r7, #8] - 803deb8: 685b ldr r3, [r3, #4] - 803deba: 4a0b ldr r2, [pc, #44] ; (803dee8 ) - 803debc: 6013 str r3, [r2, #0] + 803dee6: 68bb ldr r3, [r7, #8] + 803dee8: 685b ldr r3, [r3, #4] + 803deea: 4a0b ldr r2, [pc, #44] ; (803df18 ) + 803deec: 6013 str r3, [r2, #0] if (handler != NULL) { LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s t=%"U32_F" arg=%p\n", tmptimeout->handler_name, sys_now() - tmptimeout->time, arg)); } #endif /* LWIP_DEBUG_TIMERNAMES */ memp_free(MEMP_SYS_TIMEOUT, tmptimeout); - 803debe: 68b9 ldr r1, [r7, #8] - 803dec0: 2006 movs r0, #6 - 803dec2: f7f8 fd91 bl 80369e8 + 803deee: 68b9 ldr r1, [r7, #8] + 803def0: 2006 movs r0, #6 + 803def2: f7f8 fd91 bl 8036a18 if (handler != NULL) { - 803dec6: 687b ldr r3, [r7, #4] - 803dec8: 2b00 cmp r3, #0 - 803deca: d0d3 beq.n 803de74 + 803def6: 687b ldr r3, [r7, #4] + 803def8: 2b00 cmp r3, #0 + 803defa: d0d3 beq.n 803dea4 handler(arg); - 803decc: 687b ldr r3, [r7, #4] - 803dece: 6838 ldr r0, [r7, #0] - 803ded0: 4798 blx r3 + 803defc: 687b ldr r3, [r7, #4] + 803defe: 6838 ldr r0, [r7, #0] + 803df00: 4798 blx r3 do { - 803ded2: e7cf b.n 803de74 + 803df02: e7cf b.n 803dea4 return; - 803ded4: bf00 nop - 803ded6: e000 b.n 803deda + 803df04: bf00 nop + 803df06: e000 b.n 803df0a return; - 803ded8: bf00 nop + 803df08: bf00 nop } LWIP_TCPIP_THREAD_ALIVE(); /* Repeat until all expired timers have been called */ } while (1); } - 803deda: 3710 adds r7, #16 - 803dedc: 46bd mov sp, r7 - 803dede: bd80 pop {r7, pc} - 803dee0: 2400e955 .word 0x2400e955 - 803dee4: 2400e9a8 .word 0x2400e9a8 - 803dee8: 2400e9ac .word 0x2400e9ac + 803df0a: 3710 adds r7, #16 + 803df0c: 46bd mov sp, r7 + 803df0e: bd80 pop {r7, pc} + 803df10: 2400e955 .word 0x2400e955 + 803df14: 2400e9a8 .word 0x2400e9a8 + 803df18: 2400e9ac .word 0x2400e9ac -0803deec : +0803df1c : /** * Initialize this module. */ void udp_init(void) { - 803deec: b580 push {r7, lr} - 803deee: af00 add r7, sp, #0 + 803df1c: b580 push {r7, lr} + 803df1e: af00 add r7, sp, #0 #ifdef LWIP_RAND udp_port = UDP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND()); - 803def0: f002 fe0e bl 8040b10 - 803def4: 4603 mov r3, r0 - 803def6: b29b uxth r3, r3 - 803def8: f3c3 030d ubfx r3, r3, #0, #14 - 803defc: b29b uxth r3, r3 - 803defe: f5a3 4380 sub.w r3, r3, #16384 ; 0x4000 - 803df02: b29a uxth r2, r3 - 803df04: 4b01 ldr r3, [pc, #4] ; (803df0c ) - 803df06: 801a strh r2, [r3, #0] + 803df20: f002 fe0e bl 8040b40 + 803df24: 4603 mov r3, r0 + 803df26: b29b uxth r3, r3 + 803df28: f3c3 030d ubfx r3, r3, #0, #14 + 803df2c: b29b uxth r3, r3 + 803df2e: f5a3 4380 sub.w r3, r3, #16384 ; 0x4000 + 803df32: b29a uxth r2, r3 + 803df34: 4b01 ldr r3, [pc, #4] ; (803df3c ) + 803df36: 801a strh r2, [r3, #0] #endif /* LWIP_RAND */ } - 803df08: bf00 nop - 803df0a: bd80 pop {r7, pc} - 803df0c: 24000074 .word 0x24000074 + 803df38: bf00 nop + 803df3a: bd80 pop {r7, pc} + 803df3c: 24000074 .word 0x24000074 -0803df10 : +0803df40 : * @param broadcast 1 if his is an IPv4 broadcast (global or subnet-only), 0 otherwise (only used for IPv4) * @return 1 on match, 0 otherwise */ static u8_t udp_input_local_match(struct udp_pcb *pcb, struct netif *inp, u8_t broadcast) { - 803df10: b580 push {r7, lr} - 803df12: b084 sub sp, #16 - 803df14: af00 add r7, sp, #0 - 803df16: 60f8 str r0, [r7, #12] - 803df18: 60b9 str r1, [r7, #8] - 803df1a: 4613 mov r3, r2 - 803df1c: 71fb strb r3, [r7, #7] + 803df40: b580 push {r7, lr} + 803df42: b084 sub sp, #16 + 803df44: af00 add r7, sp, #0 + 803df46: 60f8 str r0, [r7, #12] + 803df48: 60b9 str r1, [r7, #8] + 803df4a: 4613 mov r3, r2 + 803df4c: 71fb strb r3, [r7, #7] LWIP_UNUSED_ARG(inp); /* in IPv6 only case */ LWIP_UNUSED_ARG(broadcast); /* in IPv6 only case */ LWIP_ASSERT("udp_input_local_match: invalid pcb", pcb != NULL); - 803df1e: 68fb ldr r3, [r7, #12] - 803df20: 2b00 cmp r3, #0 - 803df22: d105 bne.n 803df30 - 803df24: 4b27 ldr r3, [pc, #156] ; (803dfc4 ) - 803df26: 2287 movs r2, #135 ; 0x87 - 803df28: 4927 ldr r1, [pc, #156] ; (803dfc8 ) - 803df2a: 4828 ldr r0, [pc, #160] ; (803dfcc ) - 803df2c: f002 fdd8 bl 8040ae0 + 803df4e: 68fb ldr r3, [r7, #12] + 803df50: 2b00 cmp r3, #0 + 803df52: d105 bne.n 803df60 + 803df54: 4b27 ldr r3, [pc, #156] ; (803dff4 ) + 803df56: 2287 movs r2, #135 ; 0x87 + 803df58: 4927 ldr r1, [pc, #156] ; (803dff8 ) + 803df5a: 4828 ldr r0, [pc, #160] ; (803dffc ) + 803df5c: f002 fdd8 bl 8040b10 LWIP_ASSERT("udp_input_local_match: invalid netif", inp != NULL); - 803df30: 68bb ldr r3, [r7, #8] - 803df32: 2b00 cmp r3, #0 - 803df34: d105 bne.n 803df42 - 803df36: 4b23 ldr r3, [pc, #140] ; (803dfc4 ) - 803df38: 2288 movs r2, #136 ; 0x88 - 803df3a: 4925 ldr r1, [pc, #148] ; (803dfd0 ) - 803df3c: 4823 ldr r0, [pc, #140] ; (803dfcc ) - 803df3e: f002 fdcf bl 8040ae0 + 803df60: 68bb ldr r3, [r7, #8] + 803df62: 2b00 cmp r3, #0 + 803df64: d105 bne.n 803df72 + 803df66: 4b23 ldr r3, [pc, #140] ; (803dff4 ) + 803df68: 2288 movs r2, #136 ; 0x88 + 803df6a: 4925 ldr r1, [pc, #148] ; (803e000 ) + 803df6c: 4823 ldr r0, [pc, #140] ; (803dffc ) + 803df6e: f002 fdcf bl 8040b10 /* check if PCB is bound to specific netif */ if ((pcb->netif_idx != NETIF_NO_INDEX) && - 803df42: 68fb ldr r3, [r7, #12] - 803df44: 7a1b ldrb r3, [r3, #8] - 803df46: 2b00 cmp r3, #0 - 803df48: d00b beq.n 803df62 + 803df72: 68fb ldr r3, [r7, #12] + 803df74: 7a1b ldrb r3, [r3, #8] + 803df76: 2b00 cmp r3, #0 + 803df78: d00b beq.n 803df92 (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) { - 803df4a: 68fb ldr r3, [r7, #12] - 803df4c: 7a1a ldrb r2, [r3, #8] - 803df4e: 4b21 ldr r3, [pc, #132] ; (803dfd4 ) - 803df50: 685b ldr r3, [r3, #4] - 803df52: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 803df56: 3301 adds r3, #1 - 803df58: b2db uxtb r3, r3 + 803df7a: 68fb ldr r3, [r7, #12] + 803df7c: 7a1a ldrb r2, [r3, #8] + 803df7e: 4b21 ldr r3, [pc, #132] ; (803e004 ) + 803df80: 685b ldr r3, [r3, #4] + 803df82: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 803df86: 3301 adds r3, #1 + 803df88: b2db uxtb r3, r3 if ((pcb->netif_idx != NETIF_NO_INDEX) && - 803df5a: 429a cmp r2, r3 - 803df5c: d001 beq.n 803df62 + 803df8a: 429a cmp r2, r3 + 803df8c: d001 beq.n 803df92 return 0; - 803df5e: 2300 movs r3, #0 - 803df60: e02b b.n 803dfba + 803df8e: 2300 movs r3, #0 + 803df90: e02b b.n 803dfea /* Only need to check PCB if incoming IP version matches PCB IP version */ if (IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ip_current_dest_addr())) { #if LWIP_IPV4 /* Special case: IPv4 broadcast: all or broadcasts in my subnet * Note: broadcast variable can only be 1 if it is an IPv4 broadcast */ if (broadcast != 0) { - 803df62: 79fb ldrb r3, [r7, #7] - 803df64: 2b00 cmp r3, #0 - 803df66: d018 beq.n 803df9a + 803df92: 79fb ldrb r3, [r7, #7] + 803df94: 2b00 cmp r3, #0 + 803df96: d018 beq.n 803dfca #if IP_SOF_BROADCAST_RECV if (ip_get_option(pcb, SOF_BROADCAST)) #endif /* IP_SOF_BROADCAST_RECV */ { if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) || - 803df68: 68fb ldr r3, [r7, #12] - 803df6a: 2b00 cmp r3, #0 - 803df6c: d013 beq.n 803df96 - 803df6e: 68fb ldr r3, [r7, #12] - 803df70: 681b ldr r3, [r3, #0] - 803df72: 2b00 cmp r3, #0 - 803df74: d00f beq.n 803df96 + 803df98: 68fb ldr r3, [r7, #12] + 803df9a: 2b00 cmp r3, #0 + 803df9c: d013 beq.n 803dfc6 + 803df9e: 68fb ldr r3, [r7, #12] + 803dfa0: 681b ldr r3, [r3, #0] + 803dfa2: 2b00 cmp r3, #0 + 803dfa4: d00f beq.n 803dfc6 ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) || - 803df76: 4b17 ldr r3, [pc, #92] ; (803dfd4 ) - 803df78: 695b ldr r3, [r3, #20] + 803dfa6: 4b17 ldr r3, [pc, #92] ; (803e004 ) + 803dfa8: 695b ldr r3, [r3, #20] if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) || - 803df7a: f1b3 3fff cmp.w r3, #4294967295 - 803df7e: d00a beq.n 803df96 + 803dfaa: f1b3 3fff cmp.w r3, #4294967295 + 803dfae: d00a beq.n 803dfc6 ip4_addr_netcmp(ip_2_ip4(&pcb->local_ip), ip4_current_dest_addr(), netif_ip4_netmask(inp))) { - 803df80: 68fb ldr r3, [r7, #12] - 803df82: 681a ldr r2, [r3, #0] - 803df84: 4b13 ldr r3, [pc, #76] ; (803dfd4 ) - 803df86: 695b ldr r3, [r3, #20] - 803df88: 405a eors r2, r3 - 803df8a: 68bb ldr r3, [r7, #8] - 803df8c: 3308 adds r3, #8 - 803df8e: 681b ldr r3, [r3, #0] - 803df90: 4013 ands r3, r2 + 803dfb0: 68fb ldr r3, [r7, #12] + 803dfb2: 681a ldr r2, [r3, #0] + 803dfb4: 4b13 ldr r3, [pc, #76] ; (803e004 ) + 803dfb6: 695b ldr r3, [r3, #20] + 803dfb8: 405a eors r2, r3 + 803dfba: 68bb ldr r3, [r7, #8] + 803dfbc: 3308 adds r3, #8 + 803dfbe: 681b ldr r3, [r3, #0] + 803dfc0: 4013 ands r3, r2 ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) || - 803df92: 2b00 cmp r3, #0 - 803df94: d110 bne.n 803dfb8 + 803dfc2: 2b00 cmp r3, #0 + 803dfc4: d110 bne.n 803dfe8 return 1; - 803df96: 2301 movs r3, #1 - 803df98: e00f b.n 803dfba + 803dfc6: 2301 movs r3, #1 + 803dfc8: e00f b.n 803dfea } } } else #endif /* LWIP_IPV4 */ /* Handle IPv4 and IPv6: all or exact match */ if (ip_addr_isany(&pcb->local_ip) || ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) { - 803df9a: 68fb ldr r3, [r7, #12] - 803df9c: 2b00 cmp r3, #0 - 803df9e: d009 beq.n 803dfb4 - 803dfa0: 68fb ldr r3, [r7, #12] - 803dfa2: 681b ldr r3, [r3, #0] - 803dfa4: 2b00 cmp r3, #0 - 803dfa6: d005 beq.n 803dfb4 - 803dfa8: 68fb ldr r3, [r7, #12] - 803dfaa: 681a ldr r2, [r3, #0] - 803dfac: 4b09 ldr r3, [pc, #36] ; (803dfd4 ) - 803dfae: 695b ldr r3, [r3, #20] - 803dfb0: 429a cmp r2, r3 - 803dfb2: d101 bne.n 803dfb8 + 803dfca: 68fb ldr r3, [r7, #12] + 803dfcc: 2b00 cmp r3, #0 + 803dfce: d009 beq.n 803dfe4 + 803dfd0: 68fb ldr r3, [r7, #12] + 803dfd2: 681b ldr r3, [r3, #0] + 803dfd4: 2b00 cmp r3, #0 + 803dfd6: d005 beq.n 803dfe4 + 803dfd8: 68fb ldr r3, [r7, #12] + 803dfda: 681a ldr r2, [r3, #0] + 803dfdc: 4b09 ldr r3, [pc, #36] ; (803e004 ) + 803dfde: 695b ldr r3, [r3, #20] + 803dfe0: 429a cmp r2, r3 + 803dfe2: d101 bne.n 803dfe8 return 1; - 803dfb4: 2301 movs r3, #1 - 803dfb6: e000 b.n 803dfba + 803dfe4: 2301 movs r3, #1 + 803dfe6: e000 b.n 803dfea } } return 0; - 803dfb8: 2300 movs r3, #0 -} - 803dfba: 4618 mov r0, r3 - 803dfbc: 3710 adds r7, #16 - 803dfbe: 46bd mov sp, r7 - 803dfc0: bd80 pop {r7, pc} - 803dfc2: bf00 nop - 803dfc4: 08044254 .word 0x08044254 - 803dfc8: 08044284 .word 0x08044284 - 803dfcc: 080442a8 .word 0x080442a8 - 803dfd0: 080442d0 .word 0x080442d0 - 803dfd4: 2400b9bc .word 0x2400b9bc - -0803dfd8 : + 803dfe8: 2300 movs r3, #0 +} + 803dfea: 4618 mov r0, r3 + 803dfec: 3710 adds r7, #16 + 803dfee: 46bd mov sp, r7 + 803dff0: bd80 pop {r7, pc} + 803dff2: bf00 nop + 803dff4: 08044284 .word 0x08044284 + 803dff8: 080442b4 .word 0x080442b4 + 803dffc: 080442d8 .word 0x080442d8 + 803e000: 08044300 .word 0x08044300 + 803e004: 2400b9bc .word 0x2400b9bc + +0803e008 : * @param inp network interface on which the datagram was received. * */ void udp_input(struct pbuf *p, struct netif *inp) { - 803dfd8: b590 push {r4, r7, lr} - 803dfda: b08d sub sp, #52 ; 0x34 - 803dfdc: af02 add r7, sp, #8 - 803dfde: 6078 str r0, [r7, #4] - 803dfe0: 6039 str r1, [r7, #0] + 803e008: b590 push {r4, r7, lr} + 803e00a: b08d sub sp, #52 ; 0x34 + 803e00c: af02 add r7, sp, #8 + 803e00e: 6078 str r0, [r7, #4] + 803e010: 6039 str r1, [r7, #0] struct udp_hdr *udphdr; struct udp_pcb *pcb, *prev; struct udp_pcb *uncon_pcb; u16_t src, dest; u8_t broadcast; u8_t for_us = 0; - 803dfe2: 2300 movs r3, #0 - 803dfe4: 76fb strb r3, [r7, #27] + 803e012: 2300 movs r3, #0 + 803e014: 76fb strb r3, [r7, #27] LWIP_UNUSED_ARG(inp); LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("udp_input: invalid pbuf", p != NULL); - 803dfe6: 687b ldr r3, [r7, #4] - 803dfe8: 2b00 cmp r3, #0 - 803dfea: d105 bne.n 803dff8 - 803dfec: 4b7c ldr r3, [pc, #496] ; (803e1e0 ) - 803dfee: 22cf movs r2, #207 ; 0xcf - 803dff0: 497c ldr r1, [pc, #496] ; (803e1e4 ) - 803dff2: 487d ldr r0, [pc, #500] ; (803e1e8 ) - 803dff4: f002 fd74 bl 8040ae0 + 803e016: 687b ldr r3, [r7, #4] + 803e018: 2b00 cmp r3, #0 + 803e01a: d105 bne.n 803e028 + 803e01c: 4b7c ldr r3, [pc, #496] ; (803e210 ) + 803e01e: 22cf movs r2, #207 ; 0xcf + 803e020: 497c ldr r1, [pc, #496] ; (803e214 ) + 803e022: 487d ldr r0, [pc, #500] ; (803e218 ) + 803e024: f002 fd74 bl 8040b10 LWIP_ASSERT("udp_input: invalid netif", inp != NULL); - 803dff8: 683b ldr r3, [r7, #0] - 803dffa: 2b00 cmp r3, #0 - 803dffc: d105 bne.n 803e00a - 803dffe: 4b78 ldr r3, [pc, #480] ; (803e1e0 ) - 803e000: 22d0 movs r2, #208 ; 0xd0 - 803e002: 497a ldr r1, [pc, #488] ; (803e1ec ) - 803e004: 4878 ldr r0, [pc, #480] ; (803e1e8 ) - 803e006: f002 fd6b bl 8040ae0 + 803e028: 683b ldr r3, [r7, #0] + 803e02a: 2b00 cmp r3, #0 + 803e02c: d105 bne.n 803e03a + 803e02e: 4b78 ldr r3, [pc, #480] ; (803e210 ) + 803e030: 22d0 movs r2, #208 ; 0xd0 + 803e032: 497a ldr r1, [pc, #488] ; (803e21c ) + 803e034: 4878 ldr r0, [pc, #480] ; (803e218 ) + 803e036: f002 fd6b bl 8040b10 PERF_START; UDP_STATS_INC(udp.recv); /* Check minimum length (UDP header) */ if (p->len < UDP_HLEN) { - 803e00a: 687b ldr r3, [r7, #4] - 803e00c: 895b ldrh r3, [r3, #10] - 803e00e: 2b07 cmp r3, #7 - 803e010: d803 bhi.n 803e01a + 803e03a: 687b ldr r3, [r7, #4] + 803e03c: 895b ldrh r3, [r3, #10] + 803e03e: 2b07 cmp r3, #7 + 803e040: d803 bhi.n 803e04a LWIP_DEBUGF(UDP_DEBUG, ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len)); UDP_STATS_INC(udp.lenerr); UDP_STATS_INC(udp.drop); MIB2_STATS_INC(mib2.udpinerrors); pbuf_free(p); - 803e012: 6878 ldr r0, [r7, #4] - 803e014: f7f9 fb7a bl 803770c + 803e042: 6878 ldr r0, [r7, #4] + 803e044: f7f9 fb7a bl 803773c goto end; - 803e018: e0de b.n 803e1d8 + 803e048: e0de b.n 803e208 } udphdr = (struct udp_hdr *)p->payload; - 803e01a: 687b ldr r3, [r7, #4] - 803e01c: 685b ldr r3, [r3, #4] - 803e01e: 617b str r3, [r7, #20] + 803e04a: 687b ldr r3, [r7, #4] + 803e04c: 685b ldr r3, [r3, #4] + 803e04e: 617b str r3, [r7, #20] /* is broadcast packet ? */ broadcast = ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()); - 803e020: 4b73 ldr r3, [pc, #460] ; (803e1f0 ) - 803e022: 695b ldr r3, [r3, #20] - 803e024: 4a72 ldr r2, [pc, #456] ; (803e1f0 ) - 803e026: 6812 ldr r2, [r2, #0] - 803e028: 4611 mov r1, r2 - 803e02a: 4618 mov r0, r3 - 803e02c: f001 fcae bl 803f98c - 803e030: 4603 mov r3, r0 - 803e032: 74fb strb r3, [r7, #19] + 803e050: 4b73 ldr r3, [pc, #460] ; (803e220 ) + 803e052: 695b ldr r3, [r3, #20] + 803e054: 4a72 ldr r2, [pc, #456] ; (803e220 ) + 803e056: 6812 ldr r2, [r2, #0] + 803e058: 4611 mov r1, r2 + 803e05a: 4618 mov r0, r3 + 803e05c: f001 fcae bl 803f9bc + 803e060: 4603 mov r3, r0 + 803e062: 74fb strb r3, [r7, #19] LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len)); /* convert src and dest ports to host byte order */ src = lwip_ntohs(udphdr->src); - 803e034: 697b ldr r3, [r7, #20] - 803e036: 881b ldrh r3, [r3, #0] - 803e038: b29b uxth r3, r3 - 803e03a: 4618 mov r0, r3 - 803e03c: f7f7 ff34 bl 8035ea8 - 803e040: 4603 mov r3, r0 - 803e042: 823b strh r3, [r7, #16] + 803e064: 697b ldr r3, [r7, #20] + 803e066: 881b ldrh r3, [r3, #0] + 803e068: b29b uxth r3, r3 + 803e06a: 4618 mov r0, r3 + 803e06c: f7f7 ff34 bl 8035ed8 + 803e070: 4603 mov r3, r0 + 803e072: 823b strh r3, [r7, #16] dest = lwip_ntohs(udphdr->dest); - 803e044: 697b ldr r3, [r7, #20] - 803e046: 885b ldrh r3, [r3, #2] - 803e048: b29b uxth r3, r3 - 803e04a: 4618 mov r0, r3 - 803e04c: f7f7 ff2c bl 8035ea8 - 803e050: 4603 mov r3, r0 - 803e052: 81fb strh r3, [r7, #14] + 803e074: 697b ldr r3, [r7, #20] + 803e076: 885b ldrh r3, [r3, #2] + 803e078: b29b uxth r3, r3 + 803e07a: 4618 mov r0, r3 + 803e07c: f7f7 ff2c bl 8035ed8 + 803e080: 4603 mov r3, r0 + 803e082: 81fb strh r3, [r7, #14] ip_addr_debug_print_val(UDP_DEBUG, *ip_current_dest_addr()); LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", lwip_ntohs(udphdr->dest))); ip_addr_debug_print_val(UDP_DEBUG, *ip_current_src_addr()); LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", lwip_ntohs(udphdr->src))); pcb = NULL; - 803e054: 2300 movs r3, #0 - 803e056: 627b str r3, [r7, #36] ; 0x24 + 803e084: 2300 movs r3, #0 + 803e086: 627b str r3, [r7, #36] ; 0x24 prev = NULL; - 803e058: 2300 movs r3, #0 - 803e05a: 623b str r3, [r7, #32] + 803e088: 2300 movs r3, #0 + 803e08a: 623b str r3, [r7, #32] uncon_pcb = NULL; - 803e05c: 2300 movs r3, #0 - 803e05e: 61fb str r3, [r7, #28] + 803e08c: 2300 movs r3, #0 + 803e08e: 61fb str r3, [r7, #28] /* Iterate through the UDP pcb list for a matching pcb. * 'Perfect match' pcbs (connected to the remote port & ip address) are * preferred. If no perfect match is found, the first unconnected pcb that * matches the local port and ip address gets the datagram. */ for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { - 803e060: 4b64 ldr r3, [pc, #400] ; (803e1f4 ) - 803e062: 681b ldr r3, [r3, #0] - 803e064: 627b str r3, [r7, #36] ; 0x24 - 803e066: e054 b.n 803e112 + 803e090: 4b64 ldr r3, [pc, #400] ; (803e224 ) + 803e092: 681b ldr r3, [r3, #0] + 803e094: 627b str r3, [r7, #36] ; 0x24 + 803e096: e054 b.n 803e142 LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", pcb->local_port)); ip_addr_debug_print_val(UDP_DEBUG, pcb->remote_ip); LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", pcb->remote_port)); /* compare PCB local addr+port to UDP destination addr+port */ if ((pcb->local_port == dest) && - 803e068: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e06a: 8a5b ldrh r3, [r3, #18] - 803e06c: 89fa ldrh r2, [r7, #14] - 803e06e: 429a cmp r2, r3 - 803e070: d14a bne.n 803e108 + 803e098: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e09a: 8a5b ldrh r3, [r3, #18] + 803e09c: 89fa ldrh r2, [r7, #14] + 803e09e: 429a cmp r2, r3 + 803e0a0: d14a bne.n 803e138 (udp_input_local_match(pcb, inp, broadcast) != 0)) { - 803e072: 7cfb ldrb r3, [r7, #19] - 803e074: 461a mov r2, r3 - 803e076: 6839 ldr r1, [r7, #0] - 803e078: 6a78 ldr r0, [r7, #36] ; 0x24 - 803e07a: f7ff ff49 bl 803df10 - 803e07e: 4603 mov r3, r0 + 803e0a2: 7cfb ldrb r3, [r7, #19] + 803e0a4: 461a mov r2, r3 + 803e0a6: 6839 ldr r1, [r7, #0] + 803e0a8: 6a78 ldr r0, [r7, #36] ; 0x24 + 803e0aa: f7ff ff49 bl 803df40 + 803e0ae: 4603 mov r3, r0 if ((pcb->local_port == dest) && - 803e080: 2b00 cmp r3, #0 - 803e082: d041 beq.n 803e108 + 803e0b0: 2b00 cmp r3, #0 + 803e0b2: d041 beq.n 803e138 if ((pcb->flags & UDP_FLAGS_CONNECTED) == 0) { - 803e084: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e086: 7c1b ldrb r3, [r3, #16] - 803e088: f003 0304 and.w r3, r3, #4 - 803e08c: 2b00 cmp r3, #0 - 803e08e: d11d bne.n 803e0cc + 803e0b4: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e0b6: 7c1b ldrb r3, [r3, #16] + 803e0b8: f003 0304 and.w r3, r3, #4 + 803e0bc: 2b00 cmp r3, #0 + 803e0be: d11d bne.n 803e0fc if (uncon_pcb == NULL) { - 803e090: 69fb ldr r3, [r7, #28] - 803e092: 2b00 cmp r3, #0 - 803e094: d102 bne.n 803e09c + 803e0c0: 69fb ldr r3, [r7, #28] + 803e0c2: 2b00 cmp r3, #0 + 803e0c4: d102 bne.n 803e0cc /* the first unconnected matching PCB */ uncon_pcb = pcb; - 803e096: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e098: 61fb str r3, [r7, #28] - 803e09a: e017 b.n 803e0cc + 803e0c6: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e0c8: 61fb str r3, [r7, #28] + 803e0ca: e017 b.n 803e0fc #if LWIP_IPV4 } else if (broadcast && ip4_current_dest_addr()->addr == IPADDR_BROADCAST) { - 803e09c: 7cfb ldrb r3, [r7, #19] - 803e09e: 2b00 cmp r3, #0 - 803e0a0: d014 beq.n 803e0cc - 803e0a2: 4b53 ldr r3, [pc, #332] ; (803e1f0 ) - 803e0a4: 695b ldr r3, [r3, #20] - 803e0a6: f1b3 3fff cmp.w r3, #4294967295 - 803e0aa: d10f bne.n 803e0cc + 803e0cc: 7cfb ldrb r3, [r7, #19] + 803e0ce: 2b00 cmp r3, #0 + 803e0d0: d014 beq.n 803e0fc + 803e0d2: 4b53 ldr r3, [pc, #332] ; (803e220 ) + 803e0d4: 695b ldr r3, [r3, #20] + 803e0d6: f1b3 3fff cmp.w r3, #4294967295 + 803e0da: d10f bne.n 803e0fc /* global broadcast address (only valid for IPv4; match was checked before) */ if (!IP_IS_V4_VAL(uncon_pcb->local_ip) || !ip4_addr_cmp(ip_2_ip4(&uncon_pcb->local_ip), netif_ip4_addr(inp))) { - 803e0ac: 69fb ldr r3, [r7, #28] - 803e0ae: 681a ldr r2, [r3, #0] - 803e0b0: 683b ldr r3, [r7, #0] - 803e0b2: 3304 adds r3, #4 - 803e0b4: 681b ldr r3, [r3, #0] - 803e0b6: 429a cmp r2, r3 - 803e0b8: d008 beq.n 803e0cc + 803e0dc: 69fb ldr r3, [r7, #28] + 803e0de: 681a ldr r2, [r3, #0] + 803e0e0: 683b ldr r3, [r7, #0] + 803e0e2: 3304 adds r3, #4 + 803e0e4: 681b ldr r3, [r3, #0] + 803e0e6: 429a cmp r2, r3 + 803e0e8: d008 beq.n 803e0fc /* uncon_pcb does not match the input netif, check this pcb */ if (IP_IS_V4_VAL(pcb->local_ip) && ip4_addr_cmp(ip_2_ip4(&pcb->local_ip), netif_ip4_addr(inp))) { - 803e0ba: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0bc: 681a ldr r2, [r3, #0] - 803e0be: 683b ldr r3, [r7, #0] - 803e0c0: 3304 adds r3, #4 - 803e0c2: 681b ldr r3, [r3, #0] - 803e0c4: 429a cmp r2, r3 - 803e0c6: d101 bne.n 803e0cc + 803e0ea: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e0ec: 681a ldr r2, [r3, #0] + 803e0ee: 683b ldr r3, [r7, #0] + 803e0f0: 3304 adds r3, #4 + 803e0f2: 681b ldr r3, [r3, #0] + 803e0f4: 429a cmp r2, r3 + 803e0f6: d101 bne.n 803e0fc /* better match */ uncon_pcb = pcb; - 803e0c8: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0ca: 61fb str r3, [r7, #28] + 803e0f8: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e0fa: 61fb str r3, [r7, #28] } #endif /* SO_REUSE */ } /* compare PCB remote addr+port to UDP source addr+port */ if ((pcb->remote_port == src) && - 803e0cc: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0ce: 8a9b ldrh r3, [r3, #20] - 803e0d0: 8a3a ldrh r2, [r7, #16] - 803e0d2: 429a cmp r2, r3 - 803e0d4: d118 bne.n 803e108 + 803e0fc: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e0fe: 8a9b ldrh r3, [r3, #20] + 803e100: 8a3a ldrh r2, [r7, #16] + 803e102: 429a cmp r2, r3 + 803e104: d118 bne.n 803e138 (ip_addr_isany_val(pcb->remote_ip) || - 803e0d6: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0d8: 685b ldr r3, [r3, #4] + 803e106: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e108: 685b ldr r3, [r3, #4] if ((pcb->remote_port == src) && - 803e0da: 2b00 cmp r3, #0 - 803e0dc: d005 beq.n 803e0ea + 803e10a: 2b00 cmp r3, #0 + 803e10c: d005 beq.n 803e11a ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()))) { - 803e0de: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0e0: 685a ldr r2, [r3, #4] - 803e0e2: 4b43 ldr r3, [pc, #268] ; (803e1f0 ) - 803e0e4: 691b ldr r3, [r3, #16] + 803e10e: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e110: 685a ldr r2, [r3, #4] + 803e112: 4b43 ldr r3, [pc, #268] ; (803e220 ) + 803e114: 691b ldr r3, [r3, #16] (ip_addr_isany_val(pcb->remote_ip) || - 803e0e6: 429a cmp r2, r3 - 803e0e8: d10e bne.n 803e108 + 803e116: 429a cmp r2, r3 + 803e118: d10e bne.n 803e138 /* the first fully matching PCB */ if (prev != NULL) { - 803e0ea: 6a3b ldr r3, [r7, #32] - 803e0ec: 2b00 cmp r3, #0 - 803e0ee: d014 beq.n 803e11a + 803e11a: 6a3b ldr r3, [r7, #32] + 803e11c: 2b00 cmp r3, #0 + 803e11e: d014 beq.n 803e14a /* move the pcb to the front of udp_pcbs so that is found faster next time */ prev->next = pcb->next; - 803e0f0: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0f2: 68da ldr r2, [r3, #12] - 803e0f4: 6a3b ldr r3, [r7, #32] - 803e0f6: 60da str r2, [r3, #12] + 803e120: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e122: 68da ldr r2, [r3, #12] + 803e124: 6a3b ldr r3, [r7, #32] + 803e126: 60da str r2, [r3, #12] pcb->next = udp_pcbs; - 803e0f8: 4b3e ldr r3, [pc, #248] ; (803e1f4 ) - 803e0fa: 681a ldr r2, [r3, #0] - 803e0fc: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0fe: 60da str r2, [r3, #12] + 803e128: 4b3e ldr r3, [pc, #248] ; (803e224 ) + 803e12a: 681a ldr r2, [r3, #0] + 803e12c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e12e: 60da str r2, [r3, #12] udp_pcbs = pcb; - 803e100: 4a3c ldr r2, [pc, #240] ; (803e1f4 ) - 803e102: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e104: 6013 str r3, [r2, #0] + 803e130: 4a3c ldr r2, [pc, #240] ; (803e224 ) + 803e132: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e134: 6013 str r3, [r2, #0] } else { UDP_STATS_INC(udp.cachehit); } break; - 803e106: e008 b.n 803e11a + 803e136: e008 b.n 803e14a } } prev = pcb; - 803e108: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e10a: 623b str r3, [r7, #32] + 803e138: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e13a: 623b str r3, [r7, #32] for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { - 803e10c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e10e: 68db ldr r3, [r3, #12] - 803e110: 627b str r3, [r7, #36] ; 0x24 - 803e112: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e114: 2b00 cmp r3, #0 - 803e116: d1a7 bne.n 803e068 - 803e118: e000 b.n 803e11c + 803e13c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e13e: 68db ldr r3, [r3, #12] + 803e140: 627b str r3, [r7, #36] ; 0x24 + 803e142: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e144: 2b00 cmp r3, #0 + 803e146: d1a7 bne.n 803e098 + 803e148: e000 b.n 803e14c break; - 803e11a: bf00 nop + 803e14a: bf00 nop } /* no fully matching pcb found? then look for an unconnected pcb */ if (pcb == NULL) { - 803e11c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e11e: 2b00 cmp r3, #0 - 803e120: d101 bne.n 803e126 + 803e14c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e14e: 2b00 cmp r3, #0 + 803e150: d101 bne.n 803e156 pcb = uncon_pcb; - 803e122: 69fb ldr r3, [r7, #28] - 803e124: 627b str r3, [r7, #36] ; 0x24 + 803e152: 69fb ldr r3, [r7, #28] + 803e154: 627b str r3, [r7, #36] ; 0x24 } /* Check checksum if this is a match or if it was directed at us. */ if (pcb != NULL) { - 803e126: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e128: 2b00 cmp r3, #0 - 803e12a: d002 beq.n 803e132 + 803e156: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e158: 2b00 cmp r3, #0 + 803e15a: d002 beq.n 803e162 for_us = 1; - 803e12c: 2301 movs r3, #1 - 803e12e: 76fb strb r3, [r7, #27] - 803e130: e00a b.n 803e148 + 803e15c: 2301 movs r3, #1 + 803e15e: 76fb strb r3, [r7, #27] + 803e160: e00a b.n 803e178 for_us = netif_get_ip6_addr_match(inp, ip6_current_dest_addr()) >= 0; } #endif /* LWIP_IPV6 */ #if LWIP_IPV4 if (!ip_current_is_v6()) { for_us = ip4_addr_cmp(netif_ip4_addr(inp), ip4_current_dest_addr()); - 803e132: 683b ldr r3, [r7, #0] - 803e134: 3304 adds r3, #4 - 803e136: 681a ldr r2, [r3, #0] - 803e138: 4b2d ldr r3, [pc, #180] ; (803e1f0 ) - 803e13a: 695b ldr r3, [r3, #20] - 803e13c: 429a cmp r2, r3 - 803e13e: bf0c ite eq - 803e140: 2301 moveq r3, #1 - 803e142: 2300 movne r3, #0 - 803e144: b2db uxtb r3, r3 - 803e146: 76fb strb r3, [r7, #27] + 803e162: 683b ldr r3, [r7, #0] + 803e164: 3304 adds r3, #4 + 803e166: 681a ldr r2, [r3, #0] + 803e168: 4b2d ldr r3, [pc, #180] ; (803e220 ) + 803e16a: 695b ldr r3, [r3, #20] + 803e16c: 429a cmp r2, r3 + 803e16e: bf0c ite eq + 803e170: 2301 moveq r3, #1 + 803e172: 2300 movne r3, #0 + 803e174: b2db uxtb r3, r3 + 803e176: 76fb strb r3, [r7, #27] } #endif /* LWIP_IPV4 */ } if (for_us) { - 803e148: 7efb ldrb r3, [r7, #27] - 803e14a: 2b00 cmp r3, #0 - 803e14c: d041 beq.n 803e1d2 + 803e178: 7efb ldrb r3, [r7, #27] + 803e17a: 2b00 cmp r3, #0 + 803e17c: d041 beq.n 803e202 } } } } #endif /* CHECKSUM_CHECK_UDP */ if (pbuf_remove_header(p, UDP_HLEN)) { - 803e14e: 2108 movs r1, #8 - 803e150: 6878 ldr r0, [r7, #4] - 803e152: f7f9 fa55 bl 8037600 - 803e156: 4603 mov r3, r0 - 803e158: 2b00 cmp r3, #0 - 803e15a: d00a beq.n 803e172 + 803e17e: 2108 movs r1, #8 + 803e180: 6878 ldr r0, [r7, #4] + 803e182: f7f9 fa55 bl 8037630 + 803e186: 4603 mov r3, r0 + 803e188: 2b00 cmp r3, #0 + 803e18a: d00a beq.n 803e1a2 /* Can we cope with this failing? Just assert for now */ LWIP_ASSERT("pbuf_remove_header failed\n", 0); - 803e15c: 4b20 ldr r3, [pc, #128] ; (803e1e0 ) - 803e15e: f44f 72b8 mov.w r2, #368 ; 0x170 - 803e162: 4925 ldr r1, [pc, #148] ; (803e1f8 ) - 803e164: 4820 ldr r0, [pc, #128] ; (803e1e8 ) - 803e166: f002 fcbb bl 8040ae0 + 803e18c: 4b20 ldr r3, [pc, #128] ; (803e210 ) + 803e18e: f44f 72b8 mov.w r2, #368 ; 0x170 + 803e192: 4925 ldr r1, [pc, #148] ; (803e228 ) + 803e194: 4820 ldr r0, [pc, #128] ; (803e218 ) + 803e196: f002 fcbb bl 8040b10 UDP_STATS_INC(udp.drop); MIB2_STATS_INC(mib2.udpinerrors); pbuf_free(p); - 803e16a: 6878 ldr r0, [r7, #4] - 803e16c: f7f9 face bl 803770c + 803e19a: 6878 ldr r0, [r7, #4] + 803e19c: f7f9 face bl 803773c goto end; - 803e170: e032 b.n 803e1d8 + 803e1a0: e032 b.n 803e208 } if (pcb != NULL) { - 803e172: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e174: 2b00 cmp r3, #0 - 803e176: d012 beq.n 803e19e + 803e1a2: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1a4: 2b00 cmp r3, #0 + 803e1a6: d012 beq.n 803e1ce } } } #endif /* SO_REUSE && SO_REUSE_RXTOALL */ /* callback */ if (pcb->recv != NULL) { - 803e178: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e17a: 699b ldr r3, [r3, #24] - 803e17c: 2b00 cmp r3, #0 - 803e17e: d00a beq.n 803e196 + 803e1a8: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1aa: 699b ldr r3, [r3, #24] + 803e1ac: 2b00 cmp r3, #0 + 803e1ae: d00a beq.n 803e1c6 /* now the recv function is responsible for freeing p */ pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src); - 803e180: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e182: 699c ldr r4, [r3, #24] - 803e184: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e186: 69d8 ldr r0, [r3, #28] - 803e188: 8a3b ldrh r3, [r7, #16] - 803e18a: 9300 str r3, [sp, #0] - 803e18c: 4b1b ldr r3, [pc, #108] ; (803e1fc ) - 803e18e: 687a ldr r2, [r7, #4] - 803e190: 6a79 ldr r1, [r7, #36] ; 0x24 - 803e192: 47a0 blx r4 + 803e1b0: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1b2: 699c ldr r4, [r3, #24] + 803e1b4: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1b6: 69d8 ldr r0, [r3, #28] + 803e1b8: 8a3b ldrh r3, [r7, #16] + 803e1ba: 9300 str r3, [sp, #0] + 803e1bc: 4b1b ldr r3, [pc, #108] ; (803e22c ) + 803e1be: 687a ldr r2, [r7, #4] + 803e1c0: 6a79 ldr r1, [r7, #36] ; 0x24 + 803e1c2: 47a0 blx r4 } else { pbuf_free(p); } end: PERF_STOP("udp_input"); return; - 803e194: e021 b.n 803e1da + 803e1c4: e021 b.n 803e20a pbuf_free(p); - 803e196: 6878 ldr r0, [r7, #4] - 803e198: f7f9 fab8 bl 803770c + 803e1c6: 6878 ldr r0, [r7, #4] + 803e1c8: f7f9 fab8 bl 803773c goto end; - 803e19c: e01c b.n 803e1d8 + 803e1cc: e01c b.n 803e208 if (!broadcast && !ip_addr_ismulticast(ip_current_dest_addr())) { - 803e19e: 7cfb ldrb r3, [r7, #19] - 803e1a0: 2b00 cmp r3, #0 - 803e1a2: d112 bne.n 803e1ca - 803e1a4: 4b12 ldr r3, [pc, #72] ; (803e1f0 ) - 803e1a6: 695b ldr r3, [r3, #20] - 803e1a8: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 803e1ac: 2be0 cmp r3, #224 ; 0xe0 - 803e1ae: d00c beq.n 803e1ca + 803e1ce: 7cfb ldrb r3, [r7, #19] + 803e1d0: 2b00 cmp r3, #0 + 803e1d2: d112 bne.n 803e1fa + 803e1d4: 4b12 ldr r3, [pc, #72] ; (803e220 ) + 803e1d6: 695b ldr r3, [r3, #20] + 803e1d8: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803e1dc: 2be0 cmp r3, #224 ; 0xe0 + 803e1de: d00c beq.n 803e1fa pbuf_header_force(p, (s16_t)(ip_current_header_tot_len() + UDP_HLEN)); - 803e1b0: 4b0f ldr r3, [pc, #60] ; (803e1f0 ) - 803e1b2: 899b ldrh r3, [r3, #12] - 803e1b4: 3308 adds r3, #8 - 803e1b6: b29b uxth r3, r3 - 803e1b8: b21b sxth r3, r3 - 803e1ba: 4619 mov r1, r3 - 803e1bc: 6878 ldr r0, [r7, #4] - 803e1be: f7f9 fa92 bl 80376e6 + 803e1e0: 4b0f ldr r3, [pc, #60] ; (803e220 ) + 803e1e2: 899b ldrh r3, [r3, #12] + 803e1e4: 3308 adds r3, #8 + 803e1e6: b29b uxth r3, r3 + 803e1e8: b21b sxth r3, r3 + 803e1ea: 4619 mov r1, r3 + 803e1ec: 6878 ldr r0, [r7, #4] + 803e1ee: f7f9 fa92 bl 8037716 icmp_port_unreach(ip_current_is_v6(), p); - 803e1c2: 2103 movs r1, #3 - 803e1c4: 6878 ldr r0, [r7, #4] - 803e1c6: f001 f8b7 bl 803f338 + 803e1f2: 2103 movs r1, #3 + 803e1f4: 6878 ldr r0, [r7, #4] + 803e1f6: f001 f8b7 bl 803f368 pbuf_free(p); - 803e1ca: 6878 ldr r0, [r7, #4] - 803e1cc: f7f9 fa9e bl 803770c + 803e1fa: 6878 ldr r0, [r7, #4] + 803e1fc: f7f9 fa9e bl 803773c return; - 803e1d0: e003 b.n 803e1da + 803e200: e003 b.n 803e20a pbuf_free(p); - 803e1d2: 6878 ldr r0, [r7, #4] - 803e1d4: f7f9 fa9a bl 803770c + 803e202: 6878 ldr r0, [r7, #4] + 803e204: f7f9 fa9a bl 803773c return; - 803e1d8: bf00 nop + 803e208: bf00 nop UDP_STATS_INC(udp.drop); MIB2_STATS_INC(mib2.udpinerrors); pbuf_free(p); PERF_STOP("udp_input"); #endif /* CHECKSUM_CHECK_UDP */ } - 803e1da: 372c adds r7, #44 ; 0x2c - 803e1dc: 46bd mov sp, r7 - 803e1de: bd90 pop {r4, r7, pc} - 803e1e0: 08044254 .word 0x08044254 - 803e1e4: 080442f8 .word 0x080442f8 - 803e1e8: 080442a8 .word 0x080442a8 - 803e1ec: 08044310 .word 0x08044310 - 803e1f0: 2400b9bc .word 0x2400b9bc - 803e1f4: 2400e9b4 .word 0x2400e9b4 - 803e1f8: 0804432c .word 0x0804432c - 803e1fc: 2400b9cc .word 0x2400b9cc - -0803e200 : + 803e20a: 372c adds r7, #44 ; 0x2c + 803e20c: 46bd mov sp, r7 + 803e20e: bd90 pop {r4, r7, pc} + 803e210: 08044284 .word 0x08044284 + 803e214: 08044328 .word 0x08044328 + 803e218: 080442d8 .word 0x080442d8 + 803e21c: 08044340 .word 0x08044340 + 803e220: 2400b9bc .word 0x2400b9bc + 803e224: 2400e9b4 .word 0x2400e9b4 + 803e228: 0804435c .word 0x0804435c + 803e22c: 2400b9cc .word 0x2400b9cc + +0803e230 : * * @param old_addr IP address of the netif before change * @param new_addr IP address of the netif after change */ void udp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr) { - 803e200: b480 push {r7} - 803e202: b085 sub sp, #20 - 803e204: af00 add r7, sp, #0 - 803e206: 6078 str r0, [r7, #4] - 803e208: 6039 str r1, [r7, #0] + 803e230: b480 push {r7} + 803e232: b085 sub sp, #20 + 803e234: af00 add r7, sp, #0 + 803e236: 6078 str r0, [r7, #4] + 803e238: 6039 str r1, [r7, #0] struct udp_pcb *upcb; if (!ip_addr_isany(old_addr) && !ip_addr_isany(new_addr)) { - 803e20a: 687b ldr r3, [r7, #4] - 803e20c: 2b00 cmp r3, #0 - 803e20e: d01e beq.n 803e24e - 803e210: 687b ldr r3, [r7, #4] - 803e212: 681b ldr r3, [r3, #0] - 803e214: 2b00 cmp r3, #0 - 803e216: d01a beq.n 803e24e - 803e218: 683b ldr r3, [r7, #0] - 803e21a: 2b00 cmp r3, #0 - 803e21c: d017 beq.n 803e24e - 803e21e: 683b ldr r3, [r7, #0] - 803e220: 681b ldr r3, [r3, #0] - 803e222: 2b00 cmp r3, #0 - 803e224: d013 beq.n 803e24e + 803e23a: 687b ldr r3, [r7, #4] + 803e23c: 2b00 cmp r3, #0 + 803e23e: d01e beq.n 803e27e + 803e240: 687b ldr r3, [r7, #4] + 803e242: 681b ldr r3, [r3, #0] + 803e244: 2b00 cmp r3, #0 + 803e246: d01a beq.n 803e27e + 803e248: 683b ldr r3, [r7, #0] + 803e24a: 2b00 cmp r3, #0 + 803e24c: d017 beq.n 803e27e + 803e24e: 683b ldr r3, [r7, #0] + 803e250: 681b ldr r3, [r3, #0] + 803e252: 2b00 cmp r3, #0 + 803e254: d013 beq.n 803e27e for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) { - 803e226: 4b0d ldr r3, [pc, #52] ; (803e25c ) - 803e228: 681b ldr r3, [r3, #0] - 803e22a: 60fb str r3, [r7, #12] - 803e22c: e00c b.n 803e248 + 803e256: 4b0d ldr r3, [pc, #52] ; (803e28c ) + 803e258: 681b ldr r3, [r3, #0] + 803e25a: 60fb str r3, [r7, #12] + 803e25c: e00c b.n 803e278 /* PCB bound to current local interface address? */ if (ip_addr_cmp(&upcb->local_ip, old_addr)) { - 803e22e: 68fb ldr r3, [r7, #12] - 803e230: 681a ldr r2, [r3, #0] - 803e232: 687b ldr r3, [r7, #4] - 803e234: 681b ldr r3, [r3, #0] - 803e236: 429a cmp r2, r3 - 803e238: d103 bne.n 803e242 + 803e25e: 68fb ldr r3, [r7, #12] + 803e260: 681a ldr r2, [r3, #0] + 803e262: 687b ldr r3, [r7, #4] + 803e264: 681b ldr r3, [r3, #0] + 803e266: 429a cmp r2, r3 + 803e268: d103 bne.n 803e272 /* The PCB is bound to the old ipaddr and * is set to bound to the new one instead */ ip_addr_copy(upcb->local_ip, *new_addr); - 803e23a: 683b ldr r3, [r7, #0] - 803e23c: 681a ldr r2, [r3, #0] - 803e23e: 68fb ldr r3, [r7, #12] - 803e240: 601a str r2, [r3, #0] + 803e26a: 683b ldr r3, [r7, #0] + 803e26c: 681a ldr r2, [r3, #0] + 803e26e: 68fb ldr r3, [r7, #12] + 803e270: 601a str r2, [r3, #0] for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) { - 803e242: 68fb ldr r3, [r7, #12] - 803e244: 68db ldr r3, [r3, #12] - 803e246: 60fb str r3, [r7, #12] - 803e248: 68fb ldr r3, [r7, #12] - 803e24a: 2b00 cmp r3, #0 - 803e24c: d1ef bne.n 803e22e + 803e272: 68fb ldr r3, [r7, #12] + 803e274: 68db ldr r3, [r3, #12] + 803e276: 60fb str r3, [r7, #12] + 803e278: 68fb ldr r3, [r7, #12] + 803e27a: 2b00 cmp r3, #0 + 803e27c: d1ef bne.n 803e25e } } } } - 803e24e: bf00 nop - 803e250: 3714 adds r7, #20 - 803e252: 46bd mov sp, r7 - 803e254: f85d 7b04 ldr.w r7, [sp], #4 - 803e258: 4770 bx lr - 803e25a: bf00 nop - 803e25c: 2400e9b4 .word 0x2400e9b4 + 803e27e: bf00 nop + 803e280: 3714 adds r7, #20 + 803e282: 46bd mov sp, r7 + 803e284: f85d 7b04 ldr.w r7, [sp], #4 + 803e288: 4770 bx lr + 803e28a: bf00 nop + 803e28c: 2400e9b4 .word 0x2400e9b4 -0803e260 : +0803e290 : #endif /* ARP_QUEUEING */ /** Clean up ARP table entries */ static void etharp_free_entry(int i) { - 803e260: b580 push {r7, lr} - 803e262: b082 sub sp, #8 - 803e264: af00 add r7, sp, #0 - 803e266: 6078 str r0, [r7, #4] + 803e290: b580 push {r7, lr} + 803e292: b082 sub sp, #8 + 803e294: af00 add r7, sp, #0 + 803e296: 6078 str r0, [r7, #4] /* remove from SNMP ARP index tree */ mib2_remove_arp_entry(arp_table[i].netif, &arp_table[i].ipaddr); /* and empty packet queue */ if (arp_table[i].q != NULL) { - 803e268: 4915 ldr r1, [pc, #84] ; (803e2c0 ) - 803e26a: 687a ldr r2, [r7, #4] - 803e26c: 4613 mov r3, r2 - 803e26e: 005b lsls r3, r3, #1 - 803e270: 4413 add r3, r2 - 803e272: 00db lsls r3, r3, #3 - 803e274: 440b add r3, r1 - 803e276: 681b ldr r3, [r3, #0] - 803e278: 2b00 cmp r3, #0 - 803e27a: d013 beq.n 803e2a4 + 803e298: 4915 ldr r1, [pc, #84] ; (803e2f0 ) + 803e29a: 687a ldr r2, [r7, #4] + 803e29c: 4613 mov r3, r2 + 803e29e: 005b lsls r3, r3, #1 + 803e2a0: 4413 add r3, r2 + 803e2a2: 00db lsls r3, r3, #3 + 803e2a4: 440b add r3, r1 + 803e2a6: 681b ldr r3, [r3, #0] + 803e2a8: 2b00 cmp r3, #0 + 803e2aa: d013 beq.n 803e2d4 /* remove all queued packets */ LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_free_entry: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q))); free_etharp_q(arp_table[i].q); - 803e27c: 4910 ldr r1, [pc, #64] ; (803e2c0 ) - 803e27e: 687a ldr r2, [r7, #4] - 803e280: 4613 mov r3, r2 - 803e282: 005b lsls r3, r3, #1 - 803e284: 4413 add r3, r2 - 803e286: 00db lsls r3, r3, #3 - 803e288: 440b add r3, r1 - 803e28a: 681b ldr r3, [r3, #0] - 803e28c: 4618 mov r0, r3 - 803e28e: f7f9 fa3d bl 803770c + 803e2ac: 4910 ldr r1, [pc, #64] ; (803e2f0 ) + 803e2ae: 687a ldr r2, [r7, #4] + 803e2b0: 4613 mov r3, r2 + 803e2b2: 005b lsls r3, r3, #1 + 803e2b4: 4413 add r3, r2 + 803e2b6: 00db lsls r3, r3, #3 + 803e2b8: 440b add r3, r1 + 803e2ba: 681b ldr r3, [r3, #0] + 803e2bc: 4618 mov r0, r3 + 803e2be: f7f9 fa3d bl 803773c arp_table[i].q = NULL; - 803e292: 490b ldr r1, [pc, #44] ; (803e2c0 ) - 803e294: 687a ldr r2, [r7, #4] - 803e296: 4613 mov r3, r2 - 803e298: 005b lsls r3, r3, #1 - 803e29a: 4413 add r3, r2 - 803e29c: 00db lsls r3, r3, #3 - 803e29e: 440b add r3, r1 - 803e2a0: 2200 movs r2, #0 - 803e2a2: 601a str r2, [r3, #0] + 803e2c2: 490b ldr r1, [pc, #44] ; (803e2f0 ) + 803e2c4: 687a ldr r2, [r7, #4] + 803e2c6: 4613 mov r3, r2 + 803e2c8: 005b lsls r3, r3, #1 + 803e2ca: 4413 add r3, r2 + 803e2cc: 00db lsls r3, r3, #3 + 803e2ce: 440b add r3, r1 + 803e2d0: 2200 movs r2, #0 + 803e2d2: 601a str r2, [r3, #0] } /* recycle entry for re-use */ arp_table[i].state = ETHARP_STATE_EMPTY; - 803e2a4: 4906 ldr r1, [pc, #24] ; (803e2c0 ) - 803e2a6: 687a ldr r2, [r7, #4] - 803e2a8: 4613 mov r3, r2 - 803e2aa: 005b lsls r3, r3, #1 - 803e2ac: 4413 add r3, r2 - 803e2ae: 00db lsls r3, r3, #3 - 803e2b0: 440b add r3, r1 - 803e2b2: 3314 adds r3, #20 - 803e2b4: 2200 movs r2, #0 - 803e2b6: 701a strb r2, [r3, #0] + 803e2d4: 4906 ldr r1, [pc, #24] ; (803e2f0 ) + 803e2d6: 687a ldr r2, [r7, #4] + 803e2d8: 4613 mov r3, r2 + 803e2da: 005b lsls r3, r3, #1 + 803e2dc: 4413 add r3, r2 + 803e2de: 00db lsls r3, r3, #3 + 803e2e0: 440b add r3, r1 + 803e2e2: 3314 adds r3, #20 + 803e2e4: 2200 movs r2, #0 + 803e2e6: 701a strb r2, [r3, #0] arp_table[i].ctime = 0; arp_table[i].netif = NULL; ip4_addr_set_zero(&arp_table[i].ipaddr); arp_table[i].ethaddr = ethzero; #endif /* LWIP_DEBUG */ } - 803e2b8: bf00 nop - 803e2ba: 3708 adds r7, #8 - 803e2bc: 46bd mov sp, r7 - 803e2be: bd80 pop {r7, pc} - 803e2c0: 2400e9b8 .word 0x2400e9b8 + 803e2e8: bf00 nop + 803e2ea: 3708 adds r7, #8 + 803e2ec: 46bd mov sp, r7 + 803e2ee: bd80 pop {r7, pc} + 803e2f0: 2400e9b8 .word 0x2400e9b8 -0803e2c4 : +0803e2f4 : * This function should be called every ARP_TMR_INTERVAL milliseconds (1 second), * in order to expire entries in the ARP table. */ void etharp_tmr(void) { - 803e2c4: b580 push {r7, lr} - 803e2c6: b082 sub sp, #8 - 803e2c8: af00 add r7, sp, #0 + 803e2f4: b580 push {r7, lr} + 803e2f6: b082 sub sp, #8 + 803e2f8: af00 add r7, sp, #0 int i; LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n")); /* remove expired entries from the ARP table */ for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e2ca: 2300 movs r3, #0 - 803e2cc: 607b str r3, [r7, #4] - 803e2ce: e096 b.n 803e3fe + 803e2fa: 2300 movs r3, #0 + 803e2fc: 607b str r3, [r7, #4] + 803e2fe: e096 b.n 803e42e u8_t state = arp_table[i].state; - 803e2d0: 494f ldr r1, [pc, #316] ; (803e410 ) - 803e2d2: 687a ldr r2, [r7, #4] - 803e2d4: 4613 mov r3, r2 - 803e2d6: 005b lsls r3, r3, #1 - 803e2d8: 4413 add r3, r2 - 803e2da: 00db lsls r3, r3, #3 - 803e2dc: 440b add r3, r1 - 803e2de: 3314 adds r3, #20 - 803e2e0: 781b ldrb r3, [r3, #0] - 803e2e2: 70fb strb r3, [r7, #3] + 803e300: 494f ldr r1, [pc, #316] ; (803e440 ) + 803e302: 687a ldr r2, [r7, #4] + 803e304: 4613 mov r3, r2 + 803e306: 005b lsls r3, r3, #1 + 803e308: 4413 add r3, r2 + 803e30a: 00db lsls r3, r3, #3 + 803e30c: 440b add r3, r1 + 803e30e: 3314 adds r3, #20 + 803e310: 781b ldrb r3, [r3, #0] + 803e312: 70fb strb r3, [r7, #3] if (state != ETHARP_STATE_EMPTY - 803e2e4: 78fb ldrb r3, [r7, #3] - 803e2e6: 2b00 cmp r3, #0 - 803e2e8: f000 8086 beq.w 803e3f8 + 803e314: 78fb ldrb r3, [r7, #3] + 803e316: 2b00 cmp r3, #0 + 803e318: f000 8086 beq.w 803e428 #if ETHARP_SUPPORT_STATIC_ENTRIES && (state != ETHARP_STATE_STATIC) #endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ ) { arp_table[i].ctime++; - 803e2ec: 4948 ldr r1, [pc, #288] ; (803e410 ) - 803e2ee: 687a ldr r2, [r7, #4] - 803e2f0: 4613 mov r3, r2 - 803e2f2: 005b lsls r3, r3, #1 - 803e2f4: 4413 add r3, r2 - 803e2f6: 00db lsls r3, r3, #3 - 803e2f8: 440b add r3, r1 - 803e2fa: 3312 adds r3, #18 - 803e2fc: 881b ldrh r3, [r3, #0] - 803e2fe: 3301 adds r3, #1 - 803e300: b298 uxth r0, r3 - 803e302: 4943 ldr r1, [pc, #268] ; (803e410 ) - 803e304: 687a ldr r2, [r7, #4] - 803e306: 4613 mov r3, r2 - 803e308: 005b lsls r3, r3, #1 - 803e30a: 4413 add r3, r2 - 803e30c: 00db lsls r3, r3, #3 - 803e30e: 440b add r3, r1 - 803e310: 3312 adds r3, #18 - 803e312: 4602 mov r2, r0 - 803e314: 801a strh r2, [r3, #0] + 803e31c: 4948 ldr r1, [pc, #288] ; (803e440 ) + 803e31e: 687a ldr r2, [r7, #4] + 803e320: 4613 mov r3, r2 + 803e322: 005b lsls r3, r3, #1 + 803e324: 4413 add r3, r2 + 803e326: 00db lsls r3, r3, #3 + 803e328: 440b add r3, r1 + 803e32a: 3312 adds r3, #18 + 803e32c: 881b ldrh r3, [r3, #0] + 803e32e: 3301 adds r3, #1 + 803e330: b298 uxth r0, r3 + 803e332: 4943 ldr r1, [pc, #268] ; (803e440 ) + 803e334: 687a ldr r2, [r7, #4] + 803e336: 4613 mov r3, r2 + 803e338: 005b lsls r3, r3, #1 + 803e33a: 4413 add r3, r2 + 803e33c: 00db lsls r3, r3, #3 + 803e33e: 440b add r3, r1 + 803e340: 3312 adds r3, #18 + 803e342: 4602 mov r2, r0 + 803e344: 801a strh r2, [r3, #0] if ((arp_table[i].ctime >= ARP_MAXAGE) || - 803e316: 493e ldr r1, [pc, #248] ; (803e410 ) - 803e318: 687a ldr r2, [r7, #4] - 803e31a: 4613 mov r3, r2 - 803e31c: 005b lsls r3, r3, #1 - 803e31e: 4413 add r3, r2 - 803e320: 00db lsls r3, r3, #3 - 803e322: 440b add r3, r1 - 803e324: 3312 adds r3, #18 - 803e326: 881b ldrh r3, [r3, #0] - 803e328: f5b3 7f96 cmp.w r3, #300 ; 0x12c - 803e32c: d215 bcs.n 803e35a + 803e346: 493e ldr r1, [pc, #248] ; (803e440 ) + 803e348: 687a ldr r2, [r7, #4] + 803e34a: 4613 mov r3, r2 + 803e34c: 005b lsls r3, r3, #1 + 803e34e: 4413 add r3, r2 + 803e350: 00db lsls r3, r3, #3 + 803e352: 440b add r3, r1 + 803e354: 3312 adds r3, #18 + 803e356: 881b ldrh r3, [r3, #0] + 803e358: f5b3 7f96 cmp.w r3, #300 ; 0x12c + 803e35c: d215 bcs.n 803e38a ((arp_table[i].state == ETHARP_STATE_PENDING) && - 803e32e: 4938 ldr r1, [pc, #224] ; (803e410 ) - 803e330: 687a ldr r2, [r7, #4] - 803e332: 4613 mov r3, r2 - 803e334: 005b lsls r3, r3, #1 - 803e336: 4413 add r3, r2 - 803e338: 00db lsls r3, r3, #3 - 803e33a: 440b add r3, r1 - 803e33c: 3314 adds r3, #20 - 803e33e: 781b ldrb r3, [r3, #0] + 803e35e: 4938 ldr r1, [pc, #224] ; (803e440 ) + 803e360: 687a ldr r2, [r7, #4] + 803e362: 4613 mov r3, r2 + 803e364: 005b lsls r3, r3, #1 + 803e366: 4413 add r3, r2 + 803e368: 00db lsls r3, r3, #3 + 803e36a: 440b add r3, r1 + 803e36c: 3314 adds r3, #20 + 803e36e: 781b ldrb r3, [r3, #0] if ((arp_table[i].ctime >= ARP_MAXAGE) || - 803e340: 2b01 cmp r3, #1 - 803e342: d10e bne.n 803e362 + 803e370: 2b01 cmp r3, #1 + 803e372: d10e bne.n 803e392 (arp_table[i].ctime >= ARP_MAXPENDING))) { - 803e344: 4932 ldr r1, [pc, #200] ; (803e410 ) - 803e346: 687a ldr r2, [r7, #4] - 803e348: 4613 mov r3, r2 - 803e34a: 005b lsls r3, r3, #1 - 803e34c: 4413 add r3, r2 - 803e34e: 00db lsls r3, r3, #3 - 803e350: 440b add r3, r1 - 803e352: 3312 adds r3, #18 - 803e354: 881b ldrh r3, [r3, #0] + 803e374: 4932 ldr r1, [pc, #200] ; (803e440 ) + 803e376: 687a ldr r2, [r7, #4] + 803e378: 4613 mov r3, r2 + 803e37a: 005b lsls r3, r3, #1 + 803e37c: 4413 add r3, r2 + 803e37e: 00db lsls r3, r3, #3 + 803e380: 440b add r3, r1 + 803e382: 3312 adds r3, #18 + 803e384: 881b ldrh r3, [r3, #0] ((arp_table[i].state == ETHARP_STATE_PENDING) && - 803e356: 2b04 cmp r3, #4 - 803e358: d903 bls.n 803e362 + 803e386: 2b04 cmp r3, #4 + 803e388: d903 bls.n 803e392 /* pending or stable entry has become old! */ LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %d.\n", arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", i)); /* clean up entries that have just been expired */ etharp_free_entry(i); - 803e35a: 6878 ldr r0, [r7, #4] - 803e35c: f7ff ff80 bl 803e260 - 803e360: e04a b.n 803e3f8 + 803e38a: 6878 ldr r0, [r7, #4] + 803e38c: f7ff ff80 bl 803e290 + 803e390: e04a b.n 803e428 } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_1) { - 803e362: 492b ldr r1, [pc, #172] ; (803e410 ) - 803e364: 687a ldr r2, [r7, #4] - 803e366: 4613 mov r3, r2 - 803e368: 005b lsls r3, r3, #1 - 803e36a: 4413 add r3, r2 - 803e36c: 00db lsls r3, r3, #3 - 803e36e: 440b add r3, r1 - 803e370: 3314 adds r3, #20 - 803e372: 781b ldrb r3, [r3, #0] - 803e374: 2b03 cmp r3, #3 - 803e376: d10a bne.n 803e38e + 803e392: 492b ldr r1, [pc, #172] ; (803e440 ) + 803e394: 687a ldr r2, [r7, #4] + 803e396: 4613 mov r3, r2 + 803e398: 005b lsls r3, r3, #1 + 803e39a: 4413 add r3, r2 + 803e39c: 00db lsls r3, r3, #3 + 803e39e: 440b add r3, r1 + 803e3a0: 3314 adds r3, #20 + 803e3a2: 781b ldrb r3, [r3, #0] + 803e3a4: 2b03 cmp r3, #3 + 803e3a6: d10a bne.n 803e3be /* Don't send more than one request every 2 seconds. */ arp_table[i].state = ETHARP_STATE_STABLE_REREQUESTING_2; - 803e378: 4925 ldr r1, [pc, #148] ; (803e410 ) - 803e37a: 687a ldr r2, [r7, #4] - 803e37c: 4613 mov r3, r2 - 803e37e: 005b lsls r3, r3, #1 - 803e380: 4413 add r3, r2 - 803e382: 00db lsls r3, r3, #3 - 803e384: 440b add r3, r1 - 803e386: 3314 adds r3, #20 - 803e388: 2204 movs r2, #4 - 803e38a: 701a strb r2, [r3, #0] - 803e38c: e034 b.n 803e3f8 + 803e3a8: 4925 ldr r1, [pc, #148] ; (803e440 ) + 803e3aa: 687a ldr r2, [r7, #4] + 803e3ac: 4613 mov r3, r2 + 803e3ae: 005b lsls r3, r3, #1 + 803e3b0: 4413 add r3, r2 + 803e3b2: 00db lsls r3, r3, #3 + 803e3b4: 440b add r3, r1 + 803e3b6: 3314 adds r3, #20 + 803e3b8: 2204 movs r2, #4 + 803e3ba: 701a strb r2, [r3, #0] + 803e3bc: e034 b.n 803e428 } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_2) { - 803e38e: 4920 ldr r1, [pc, #128] ; (803e410 ) - 803e390: 687a ldr r2, [r7, #4] - 803e392: 4613 mov r3, r2 - 803e394: 005b lsls r3, r3, #1 - 803e396: 4413 add r3, r2 - 803e398: 00db lsls r3, r3, #3 - 803e39a: 440b add r3, r1 - 803e39c: 3314 adds r3, #20 - 803e39e: 781b ldrb r3, [r3, #0] - 803e3a0: 2b04 cmp r3, #4 - 803e3a2: d10a bne.n 803e3ba + 803e3be: 4920 ldr r1, [pc, #128] ; (803e440 ) + 803e3c0: 687a ldr r2, [r7, #4] + 803e3c2: 4613 mov r3, r2 + 803e3c4: 005b lsls r3, r3, #1 + 803e3c6: 4413 add r3, r2 + 803e3c8: 00db lsls r3, r3, #3 + 803e3ca: 440b add r3, r1 + 803e3cc: 3314 adds r3, #20 + 803e3ce: 781b ldrb r3, [r3, #0] + 803e3d0: 2b04 cmp r3, #4 + 803e3d2: d10a bne.n 803e3ea /* Reset state to stable, so that the next transmitted packet will re-send an ARP request. */ arp_table[i].state = ETHARP_STATE_STABLE; - 803e3a4: 491a ldr r1, [pc, #104] ; (803e410 ) - 803e3a6: 687a ldr r2, [r7, #4] - 803e3a8: 4613 mov r3, r2 - 803e3aa: 005b lsls r3, r3, #1 - 803e3ac: 4413 add r3, r2 - 803e3ae: 00db lsls r3, r3, #3 - 803e3b0: 440b add r3, r1 - 803e3b2: 3314 adds r3, #20 - 803e3b4: 2202 movs r2, #2 - 803e3b6: 701a strb r2, [r3, #0] - 803e3b8: e01e b.n 803e3f8 + 803e3d4: 491a ldr r1, [pc, #104] ; (803e440 ) + 803e3d6: 687a ldr r2, [r7, #4] + 803e3d8: 4613 mov r3, r2 + 803e3da: 005b lsls r3, r3, #1 + 803e3dc: 4413 add r3, r2 + 803e3de: 00db lsls r3, r3, #3 + 803e3e0: 440b add r3, r1 + 803e3e2: 3314 adds r3, #20 + 803e3e4: 2202 movs r2, #2 + 803e3e6: 701a strb r2, [r3, #0] + 803e3e8: e01e b.n 803e428 } else if (arp_table[i].state == ETHARP_STATE_PENDING) { - 803e3ba: 4915 ldr r1, [pc, #84] ; (803e410 ) - 803e3bc: 687a ldr r2, [r7, #4] - 803e3be: 4613 mov r3, r2 - 803e3c0: 005b lsls r3, r3, #1 - 803e3c2: 4413 add r3, r2 - 803e3c4: 00db lsls r3, r3, #3 - 803e3c6: 440b add r3, r1 - 803e3c8: 3314 adds r3, #20 - 803e3ca: 781b ldrb r3, [r3, #0] - 803e3cc: 2b01 cmp r3, #1 - 803e3ce: d113 bne.n 803e3f8 + 803e3ea: 4915 ldr r1, [pc, #84] ; (803e440 ) + 803e3ec: 687a ldr r2, [r7, #4] + 803e3ee: 4613 mov r3, r2 + 803e3f0: 005b lsls r3, r3, #1 + 803e3f2: 4413 add r3, r2 + 803e3f4: 00db lsls r3, r3, #3 + 803e3f6: 440b add r3, r1 + 803e3f8: 3314 adds r3, #20 + 803e3fa: 781b ldrb r3, [r3, #0] + 803e3fc: 2b01 cmp r3, #1 + 803e3fe: d113 bne.n 803e428 /* still pending, resend an ARP query */ etharp_request(arp_table[i].netif, &arp_table[i].ipaddr); - 803e3d0: 490f ldr r1, [pc, #60] ; (803e410 ) - 803e3d2: 687a ldr r2, [r7, #4] - 803e3d4: 4613 mov r3, r2 - 803e3d6: 005b lsls r3, r3, #1 - 803e3d8: 4413 add r3, r2 - 803e3da: 00db lsls r3, r3, #3 - 803e3dc: 440b add r3, r1 - 803e3de: 3308 adds r3, #8 - 803e3e0: 6818 ldr r0, [r3, #0] - 803e3e2: 687a ldr r2, [r7, #4] - 803e3e4: 4613 mov r3, r2 - 803e3e6: 005b lsls r3, r3, #1 - 803e3e8: 4413 add r3, r2 - 803e3ea: 00db lsls r3, r3, #3 - 803e3ec: 4a08 ldr r2, [pc, #32] ; (803e410 ) - 803e3ee: 4413 add r3, r2 - 803e3f0: 3304 adds r3, #4 - 803e3f2: 4619 mov r1, r3 - 803e3f4: f000 fe6e bl 803f0d4 + 803e400: 490f ldr r1, [pc, #60] ; (803e440 ) + 803e402: 687a ldr r2, [r7, #4] + 803e404: 4613 mov r3, r2 + 803e406: 005b lsls r3, r3, #1 + 803e408: 4413 add r3, r2 + 803e40a: 00db lsls r3, r3, #3 + 803e40c: 440b add r3, r1 + 803e40e: 3308 adds r3, #8 + 803e410: 6818 ldr r0, [r3, #0] + 803e412: 687a ldr r2, [r7, #4] + 803e414: 4613 mov r3, r2 + 803e416: 005b lsls r3, r3, #1 + 803e418: 4413 add r3, r2 + 803e41a: 00db lsls r3, r3, #3 + 803e41c: 4a08 ldr r2, [pc, #32] ; (803e440 ) + 803e41e: 4413 add r3, r2 + 803e420: 3304 adds r3, #4 + 803e422: 4619 mov r1, r3 + 803e424: f000 fe6e bl 803f104 for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e3f8: 687b ldr r3, [r7, #4] - 803e3fa: 3301 adds r3, #1 - 803e3fc: 607b str r3, [r7, #4] - 803e3fe: 687b ldr r3, [r7, #4] - 803e400: 2b09 cmp r3, #9 - 803e402: f77f af65 ble.w 803e2d0 + 803e428: 687b ldr r3, [r7, #4] + 803e42a: 3301 adds r3, #1 + 803e42c: 607b str r3, [r7, #4] + 803e42e: 687b ldr r3, [r7, #4] + 803e430: 2b09 cmp r3, #9 + 803e432: f77f af65 ble.w 803e300 } } } } - 803e406: bf00 nop - 803e408: bf00 nop - 803e40a: 3708 adds r7, #8 - 803e40c: 46bd mov sp, r7 - 803e40e: bd80 pop {r7, pc} - 803e410: 2400e9b8 .word 0x2400e9b8 + 803e436: bf00 nop + 803e438: bf00 nop + 803e43a: 3708 adds r7, #8 + 803e43c: 46bd mov sp, r7 + 803e43e: bd80 pop {r7, pc} + 803e440: 2400e9b8 .word 0x2400e9b8 -0803e414 : +0803e444 : * @return The ARP entry index that matched or is created, ERR_MEM if no * entry is found or could be recycled. */ static s16_t etharp_find_entry(const ip4_addr_t *ipaddr, u8_t flags, struct netif *netif) { - 803e414: b580 push {r7, lr} - 803e416: b08a sub sp, #40 ; 0x28 - 803e418: af00 add r7, sp, #0 - 803e41a: 60f8 str r0, [r7, #12] - 803e41c: 460b mov r3, r1 - 803e41e: 607a str r2, [r7, #4] - 803e420: 72fb strb r3, [r7, #11] + 803e444: b580 push {r7, lr} + 803e446: b08a sub sp, #40 ; 0x28 + 803e448: af00 add r7, sp, #0 + 803e44a: 60f8 str r0, [r7, #12] + 803e44c: 460b mov r3, r1 + 803e44e: 607a str r2, [r7, #4] + 803e450: 72fb strb r3, [r7, #11] s16_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE; - 803e422: 230a movs r3, #10 - 803e424: 84fb strh r3, [r7, #38] ; 0x26 - 803e426: 230a movs r3, #10 - 803e428: 84bb strh r3, [r7, #36] ; 0x24 + 803e452: 230a movs r3, #10 + 803e454: 84fb strh r3, [r7, #38] ; 0x26 + 803e456: 230a movs r3, #10 + 803e458: 84bb strh r3, [r7, #36] ; 0x24 s16_t empty = ARP_TABLE_SIZE; - 803e42a: 230a movs r3, #10 - 803e42c: 847b strh r3, [r7, #34] ; 0x22 + 803e45a: 230a movs r3, #10 + 803e45c: 847b strh r3, [r7, #34] ; 0x22 s16_t i = 0; - 803e42e: 2300 movs r3, #0 - 803e430: 843b strh r3, [r7, #32] + 803e45e: 2300 movs r3, #0 + 803e460: 843b strh r3, [r7, #32] /* oldest entry with packets on queue */ s16_t old_queue = ARP_TABLE_SIZE; - 803e432: 230a movs r3, #10 - 803e434: 83fb strh r3, [r7, #30] + 803e462: 230a movs r3, #10 + 803e464: 83fb strh r3, [r7, #30] /* its age */ u16_t age_queue = 0, age_pending = 0, age_stable = 0; - 803e436: 2300 movs r3, #0 - 803e438: 83bb strh r3, [r7, #28] - 803e43a: 2300 movs r3, #0 - 803e43c: 837b strh r3, [r7, #26] - 803e43e: 2300 movs r3, #0 - 803e440: 833b strh r3, [r7, #24] + 803e466: 2300 movs r3, #0 + 803e468: 83bb strh r3, [r7, #28] + 803e46a: 2300 movs r3, #0 + 803e46c: 837b strh r3, [r7, #26] + 803e46e: 2300 movs r3, #0 + 803e470: 833b strh r3, [r7, #24] * 4) remember the oldest pending entry with queued packets (if any) * 5) search for a matching IP entry, either pending or stable * until 5 matches, or all entries are searched for. */ for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e442: 2300 movs r3, #0 - 803e444: 843b strh r3, [r7, #32] - 803e446: e0ae b.n 803e5a6 + 803e472: 2300 movs r3, #0 + 803e474: 843b strh r3, [r7, #32] + 803e476: e0ae b.n 803e5d6 u8_t state = arp_table[i].state; - 803e448: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e44c: 49a6 ldr r1, [pc, #664] ; (803e6e8 ) - 803e44e: 4613 mov r3, r2 - 803e450: 005b lsls r3, r3, #1 - 803e452: 4413 add r3, r2 - 803e454: 00db lsls r3, r3, #3 - 803e456: 440b add r3, r1 - 803e458: 3314 adds r3, #20 - 803e45a: 781b ldrb r3, [r3, #0] - 803e45c: 75fb strb r3, [r7, #23] + 803e478: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e47c: 49a6 ldr r1, [pc, #664] ; (803e718 ) + 803e47e: 4613 mov r3, r2 + 803e480: 005b lsls r3, r3, #1 + 803e482: 4413 add r3, r2 + 803e484: 00db lsls r3, r3, #3 + 803e486: 440b add r3, r1 + 803e488: 3314 adds r3, #20 + 803e48a: 781b ldrb r3, [r3, #0] + 803e48c: 75fb strb r3, [r7, #23] /* no empty entry found yet and now we do find one? */ if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) { - 803e45e: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 - 803e462: 2b0a cmp r3, #10 - 803e464: d105 bne.n 803e472 - 803e466: 7dfb ldrb r3, [r7, #23] - 803e468: 2b00 cmp r3, #0 - 803e46a: d102 bne.n 803e472 + 803e48e: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 + 803e492: 2b0a cmp r3, #10 + 803e494: d105 bne.n 803e4a2 + 803e496: 7dfb ldrb r3, [r7, #23] + 803e498: 2b00 cmp r3, #0 + 803e49a: d102 bne.n 803e4a2 LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_find_entry: found empty entry %d\n", (int)i)); /* remember first empty entry */ empty = i; - 803e46c: 8c3b ldrh r3, [r7, #32] - 803e46e: 847b strh r3, [r7, #34] ; 0x22 - 803e470: e095 b.n 803e59e + 803e49c: 8c3b ldrh r3, [r7, #32] + 803e49e: 847b strh r3, [r7, #34] ; 0x22 + 803e4a0: e095 b.n 803e5ce } else if (state != ETHARP_STATE_EMPTY) { - 803e472: 7dfb ldrb r3, [r7, #23] - 803e474: 2b00 cmp r3, #0 - 803e476: f000 8092 beq.w 803e59e + 803e4a2: 7dfb ldrb r3, [r7, #23] + 803e4a4: 2b00 cmp r3, #0 + 803e4a6: f000 8092 beq.w 803e5ce LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE", - 803e47a: 7dfb ldrb r3, [r7, #23] - 803e47c: 2b01 cmp r3, #1 - 803e47e: d009 beq.n 803e494 - 803e480: 7dfb ldrb r3, [r7, #23] - 803e482: 2b01 cmp r3, #1 - 803e484: d806 bhi.n 803e494 - 803e486: 4b99 ldr r3, [pc, #612] ; (803e6ec ) - 803e488: f240 1223 movw r2, #291 ; 0x123 - 803e48c: 4998 ldr r1, [pc, #608] ; (803e6f0 ) - 803e48e: 4899 ldr r0, [pc, #612] ; (803e6f4 ) - 803e490: f002 fb26 bl 8040ae0 + 803e4aa: 7dfb ldrb r3, [r7, #23] + 803e4ac: 2b01 cmp r3, #1 + 803e4ae: d009 beq.n 803e4c4 + 803e4b0: 7dfb ldrb r3, [r7, #23] + 803e4b2: 2b01 cmp r3, #1 + 803e4b4: d806 bhi.n 803e4c4 + 803e4b6: 4b99 ldr r3, [pc, #612] ; (803e71c ) + 803e4b8: f240 1223 movw r2, #291 ; 0x123 + 803e4bc: 4998 ldr r1, [pc, #608] ; (803e720 ) + 803e4be: 4899 ldr r0, [pc, #612] ; (803e724 ) + 803e4c0: f002 fb26 bl 8040b10 state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE); /* if given, does IP address match IP address in ARP entry? */ if (ipaddr && ip4_addr_cmp(ipaddr, &arp_table[i].ipaddr) - 803e494: 68fb ldr r3, [r7, #12] - 803e496: 2b00 cmp r3, #0 - 803e498: d020 beq.n 803e4dc - 803e49a: 68fb ldr r3, [r7, #12] - 803e49c: 6819 ldr r1, [r3, #0] - 803e49e: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e4a2: 4891 ldr r0, [pc, #580] ; (803e6e8 ) - 803e4a4: 4613 mov r3, r2 - 803e4a6: 005b lsls r3, r3, #1 - 803e4a8: 4413 add r3, r2 - 803e4aa: 00db lsls r3, r3, #3 - 803e4ac: 4403 add r3, r0 - 803e4ae: 3304 adds r3, #4 - 803e4b0: 681b ldr r3, [r3, #0] - 803e4b2: 4299 cmp r1, r3 - 803e4b4: d112 bne.n 803e4dc + 803e4c4: 68fb ldr r3, [r7, #12] + 803e4c6: 2b00 cmp r3, #0 + 803e4c8: d020 beq.n 803e50c + 803e4ca: 68fb ldr r3, [r7, #12] + 803e4cc: 6819 ldr r1, [r3, #0] + 803e4ce: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e4d2: 4891 ldr r0, [pc, #580] ; (803e718 ) + 803e4d4: 4613 mov r3, r2 + 803e4d6: 005b lsls r3, r3, #1 + 803e4d8: 4413 add r3, r2 + 803e4da: 00db lsls r3, r3, #3 + 803e4dc: 4403 add r3, r0 + 803e4de: 3304 adds r3, #4 + 803e4e0: 681b ldr r3, [r3, #0] + 803e4e2: 4299 cmp r1, r3 + 803e4e4: d112 bne.n 803e50c #if ETHARP_TABLE_MATCH_NETIF && ((netif == NULL) || (netif == arp_table[i].netif)) - 803e4b6: 687b ldr r3, [r7, #4] - 803e4b8: 2b00 cmp r3, #0 - 803e4ba: d00c beq.n 803e4d6 - 803e4bc: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e4c0: 4989 ldr r1, [pc, #548] ; (803e6e8 ) - 803e4c2: 4613 mov r3, r2 - 803e4c4: 005b lsls r3, r3, #1 - 803e4c6: 4413 add r3, r2 - 803e4c8: 00db lsls r3, r3, #3 - 803e4ca: 440b add r3, r1 - 803e4cc: 3308 adds r3, #8 - 803e4ce: 681b ldr r3, [r3, #0] - 803e4d0: 687a ldr r2, [r7, #4] - 803e4d2: 429a cmp r2, r3 - 803e4d4: d102 bne.n 803e4dc + 803e4e6: 687b ldr r3, [r7, #4] + 803e4e8: 2b00 cmp r3, #0 + 803e4ea: d00c beq.n 803e506 + 803e4ec: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e4f0: 4989 ldr r1, [pc, #548] ; (803e718 ) + 803e4f2: 4613 mov r3, r2 + 803e4f4: 005b lsls r3, r3, #1 + 803e4f6: 4413 add r3, r2 + 803e4f8: 00db lsls r3, r3, #3 + 803e4fa: 440b add r3, r1 + 803e4fc: 3308 adds r3, #8 + 803e4fe: 681b ldr r3, [r3, #0] + 803e500: 687a ldr r2, [r7, #4] + 803e502: 429a cmp r2, r3 + 803e504: d102 bne.n 803e50c #endif /* ETHARP_TABLE_MATCH_NETIF */ ) { LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: found matching entry %d\n", (int)i)); /* found exact IP address match, simply bail out */ return i; - 803e4d6: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e4da: e100 b.n 803e6de + 803e506: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e50a: e100 b.n 803e70e } /* pending entry? */ if (state == ETHARP_STATE_PENDING) { - 803e4dc: 7dfb ldrb r3, [r7, #23] - 803e4de: 2b01 cmp r3, #1 - 803e4e0: d140 bne.n 803e564 + 803e50c: 7dfb ldrb r3, [r7, #23] + 803e50e: 2b01 cmp r3, #1 + 803e510: d140 bne.n 803e594 /* pending with queued packets? */ if (arp_table[i].q != NULL) { - 803e4e2: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e4e6: 4980 ldr r1, [pc, #512] ; (803e6e8 ) - 803e4e8: 4613 mov r3, r2 - 803e4ea: 005b lsls r3, r3, #1 - 803e4ec: 4413 add r3, r2 - 803e4ee: 00db lsls r3, r3, #3 - 803e4f0: 440b add r3, r1 - 803e4f2: 681b ldr r3, [r3, #0] - 803e4f4: 2b00 cmp r3, #0 - 803e4f6: d01a beq.n 803e52e + 803e512: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e516: 4980 ldr r1, [pc, #512] ; (803e718 ) + 803e518: 4613 mov r3, r2 + 803e51a: 005b lsls r3, r3, #1 + 803e51c: 4413 add r3, r2 + 803e51e: 00db lsls r3, r3, #3 + 803e520: 440b add r3, r1 + 803e522: 681b ldr r3, [r3, #0] + 803e524: 2b00 cmp r3, #0 + 803e526: d01a beq.n 803e55e if (arp_table[i].ctime >= age_queue) { - 803e4f8: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e4fc: 497a ldr r1, [pc, #488] ; (803e6e8 ) - 803e4fe: 4613 mov r3, r2 - 803e500: 005b lsls r3, r3, #1 - 803e502: 4413 add r3, r2 - 803e504: 00db lsls r3, r3, #3 - 803e506: 440b add r3, r1 - 803e508: 3312 adds r3, #18 - 803e50a: 881b ldrh r3, [r3, #0] - 803e50c: 8bba ldrh r2, [r7, #28] - 803e50e: 429a cmp r2, r3 - 803e510: d845 bhi.n 803e59e + 803e528: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e52c: 497a ldr r1, [pc, #488] ; (803e718 ) + 803e52e: 4613 mov r3, r2 + 803e530: 005b lsls r3, r3, #1 + 803e532: 4413 add r3, r2 + 803e534: 00db lsls r3, r3, #3 + 803e536: 440b add r3, r1 + 803e538: 3312 adds r3, #18 + 803e53a: 881b ldrh r3, [r3, #0] + 803e53c: 8bba ldrh r2, [r7, #28] + 803e53e: 429a cmp r2, r3 + 803e540: d845 bhi.n 803e5ce old_queue = i; - 803e512: 8c3b ldrh r3, [r7, #32] - 803e514: 83fb strh r3, [r7, #30] + 803e542: 8c3b ldrh r3, [r7, #32] + 803e544: 83fb strh r3, [r7, #30] age_queue = arp_table[i].ctime; - 803e516: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e51a: 4973 ldr r1, [pc, #460] ; (803e6e8 ) - 803e51c: 4613 mov r3, r2 - 803e51e: 005b lsls r3, r3, #1 - 803e520: 4413 add r3, r2 - 803e522: 00db lsls r3, r3, #3 - 803e524: 440b add r3, r1 - 803e526: 3312 adds r3, #18 - 803e528: 881b ldrh r3, [r3, #0] - 803e52a: 83bb strh r3, [r7, #28] - 803e52c: e037 b.n 803e59e + 803e546: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e54a: 4973 ldr r1, [pc, #460] ; (803e718 ) + 803e54c: 4613 mov r3, r2 + 803e54e: 005b lsls r3, r3, #1 + 803e550: 4413 add r3, r2 + 803e552: 00db lsls r3, r3, #3 + 803e554: 440b add r3, r1 + 803e556: 3312 adds r3, #18 + 803e558: 881b ldrh r3, [r3, #0] + 803e55a: 83bb strh r3, [r7, #28] + 803e55c: e037 b.n 803e5ce } } else /* pending without queued packets? */ { if (arp_table[i].ctime >= age_pending) { - 803e52e: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e532: 496d ldr r1, [pc, #436] ; (803e6e8 ) - 803e534: 4613 mov r3, r2 - 803e536: 005b lsls r3, r3, #1 - 803e538: 4413 add r3, r2 - 803e53a: 00db lsls r3, r3, #3 - 803e53c: 440b add r3, r1 - 803e53e: 3312 adds r3, #18 - 803e540: 881b ldrh r3, [r3, #0] - 803e542: 8b7a ldrh r2, [r7, #26] - 803e544: 429a cmp r2, r3 - 803e546: d82a bhi.n 803e59e + 803e55e: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e562: 496d ldr r1, [pc, #436] ; (803e718 ) + 803e564: 4613 mov r3, r2 + 803e566: 005b lsls r3, r3, #1 + 803e568: 4413 add r3, r2 + 803e56a: 00db lsls r3, r3, #3 + 803e56c: 440b add r3, r1 + 803e56e: 3312 adds r3, #18 + 803e570: 881b ldrh r3, [r3, #0] + 803e572: 8b7a ldrh r2, [r7, #26] + 803e574: 429a cmp r2, r3 + 803e576: d82a bhi.n 803e5ce old_pending = i; - 803e548: 8c3b ldrh r3, [r7, #32] - 803e54a: 84fb strh r3, [r7, #38] ; 0x26 + 803e578: 8c3b ldrh r3, [r7, #32] + 803e57a: 84fb strh r3, [r7, #38] ; 0x26 age_pending = arp_table[i].ctime; - 803e54c: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e550: 4965 ldr r1, [pc, #404] ; (803e6e8 ) - 803e552: 4613 mov r3, r2 - 803e554: 005b lsls r3, r3, #1 - 803e556: 4413 add r3, r2 - 803e558: 00db lsls r3, r3, #3 - 803e55a: 440b add r3, r1 - 803e55c: 3312 adds r3, #18 - 803e55e: 881b ldrh r3, [r3, #0] - 803e560: 837b strh r3, [r7, #26] - 803e562: e01c b.n 803e59e + 803e57c: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e580: 4965 ldr r1, [pc, #404] ; (803e718 ) + 803e582: 4613 mov r3, r2 + 803e584: 005b lsls r3, r3, #1 + 803e586: 4413 add r3, r2 + 803e588: 00db lsls r3, r3, #3 + 803e58a: 440b add r3, r1 + 803e58c: 3312 adds r3, #18 + 803e58e: 881b ldrh r3, [r3, #0] + 803e590: 837b strh r3, [r7, #26] + 803e592: e01c b.n 803e5ce } } /* stable entry? */ } else if (state >= ETHARP_STATE_STABLE) { - 803e564: 7dfb ldrb r3, [r7, #23] - 803e566: 2b01 cmp r3, #1 - 803e568: d919 bls.n 803e59e + 803e594: 7dfb ldrb r3, [r7, #23] + 803e596: 2b01 cmp r3, #1 + 803e598: d919 bls.n 803e5ce /* don't record old_stable for static entries since they never expire */ if (state < ETHARP_STATE_STATIC) #endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ { /* remember entry with oldest stable entry in oldest, its age in maxtime */ if (arp_table[i].ctime >= age_stable) { - 803e56a: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e56e: 495e ldr r1, [pc, #376] ; (803e6e8 ) - 803e570: 4613 mov r3, r2 - 803e572: 005b lsls r3, r3, #1 - 803e574: 4413 add r3, r2 - 803e576: 00db lsls r3, r3, #3 - 803e578: 440b add r3, r1 - 803e57a: 3312 adds r3, #18 - 803e57c: 881b ldrh r3, [r3, #0] - 803e57e: 8b3a ldrh r2, [r7, #24] - 803e580: 429a cmp r2, r3 - 803e582: d80c bhi.n 803e59e + 803e59a: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e59e: 495e ldr r1, [pc, #376] ; (803e718 ) + 803e5a0: 4613 mov r3, r2 + 803e5a2: 005b lsls r3, r3, #1 + 803e5a4: 4413 add r3, r2 + 803e5a6: 00db lsls r3, r3, #3 + 803e5a8: 440b add r3, r1 + 803e5aa: 3312 adds r3, #18 + 803e5ac: 881b ldrh r3, [r3, #0] + 803e5ae: 8b3a ldrh r2, [r7, #24] + 803e5b0: 429a cmp r2, r3 + 803e5b2: d80c bhi.n 803e5ce old_stable = i; - 803e584: 8c3b ldrh r3, [r7, #32] - 803e586: 84bb strh r3, [r7, #36] ; 0x24 + 803e5b4: 8c3b ldrh r3, [r7, #32] + 803e5b6: 84bb strh r3, [r7, #36] ; 0x24 age_stable = arp_table[i].ctime; - 803e588: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e58c: 4956 ldr r1, [pc, #344] ; (803e6e8 ) - 803e58e: 4613 mov r3, r2 - 803e590: 005b lsls r3, r3, #1 - 803e592: 4413 add r3, r2 - 803e594: 00db lsls r3, r3, #3 - 803e596: 440b add r3, r1 - 803e598: 3312 adds r3, #18 - 803e59a: 881b ldrh r3, [r3, #0] - 803e59c: 833b strh r3, [r7, #24] + 803e5b8: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e5bc: 4956 ldr r1, [pc, #344] ; (803e718 ) + 803e5be: 4613 mov r3, r2 + 803e5c0: 005b lsls r3, r3, #1 + 803e5c2: 4413 add r3, r2 + 803e5c4: 00db lsls r3, r3, #3 + 803e5c6: 440b add r3, r1 + 803e5c8: 3312 adds r3, #18 + 803e5ca: 881b ldrh r3, [r3, #0] + 803e5cc: 833b strh r3, [r7, #24] for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e59e: 8c3b ldrh r3, [r7, #32] - 803e5a0: 3301 adds r3, #1 - 803e5a2: b29b uxth r3, r3 - 803e5a4: 843b strh r3, [r7, #32] - 803e5a6: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e5aa: 2b09 cmp r3, #9 - 803e5ac: f77f af4c ble.w 803e448 + 803e5ce: 8c3b ldrh r3, [r7, #32] + 803e5d0: 3301 adds r3, #1 + 803e5d2: b29b uxth r3, r3 + 803e5d4: 843b strh r3, [r7, #32] + 803e5d6: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e5da: 2b09 cmp r3, #9 + 803e5dc: f77f af4c ble.w 803e478 } } /* { we have no match } => try to create a new entry */ /* don't create new entry, only search? */ if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) || - 803e5b0: 7afb ldrb r3, [r7, #11] - 803e5b2: f003 0302 and.w r3, r3, #2 - 803e5b6: 2b00 cmp r3, #0 - 803e5b8: d108 bne.n 803e5cc - 803e5ba: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 - 803e5be: 2b0a cmp r3, #10 - 803e5c0: d107 bne.n 803e5d2 + 803e5e0: 7afb ldrb r3, [r7, #11] + 803e5e2: f003 0302 and.w r3, r3, #2 + 803e5e6: 2b00 cmp r3, #0 + 803e5e8: d108 bne.n 803e5fc + 803e5ea: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 + 803e5ee: 2b0a cmp r3, #10 + 803e5f0: d107 bne.n 803e602 /* or no empty entry found and not allowed to recycle? */ ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) { - 803e5c2: 7afb ldrb r3, [r7, #11] - 803e5c4: f003 0301 and.w r3, r3, #1 - 803e5c8: 2b00 cmp r3, #0 - 803e5ca: d102 bne.n 803e5d2 + 803e5f2: 7afb ldrb r3, [r7, #11] + 803e5f4: f003 0301 and.w r3, r3, #1 + 803e5f8: 2b00 cmp r3, #0 + 803e5fa: d102 bne.n 803e602 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty entry found and not allowed to recycle\n")); return (s16_t)ERR_MEM; - 803e5cc: f04f 33ff mov.w r3, #4294967295 - 803e5d0: e085 b.n 803e6de + 803e5fc: f04f 33ff mov.w r3, #4294967295 + 803e600: e085 b.n 803e70e * * { ETHARP_FLAG_TRY_HARD is set at this point } */ /* 1) empty entry available? */ if (empty < ARP_TABLE_SIZE) { - 803e5d2: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 - 803e5d6: 2b09 cmp r3, #9 - 803e5d8: dc02 bgt.n 803e5e0 + 803e602: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 + 803e606: 2b09 cmp r3, #9 + 803e608: dc02 bgt.n 803e610 i = empty; - 803e5da: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803e5dc: 843b strh r3, [r7, #32] - 803e5de: e039 b.n 803e654 + 803e60a: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803e60c: 843b strh r3, [r7, #32] + 803e60e: e039 b.n 803e684 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting empty entry %d\n", (int)i)); } else { /* 2) found recyclable stable entry? */ if (old_stable < ARP_TABLE_SIZE) { - 803e5e0: f9b7 3024 ldrsh.w r3, [r7, #36] ; 0x24 - 803e5e4: 2b09 cmp r3, #9 - 803e5e6: dc14 bgt.n 803e612 + 803e610: f9b7 3024 ldrsh.w r3, [r7, #36] ; 0x24 + 803e614: 2b09 cmp r3, #9 + 803e616: dc14 bgt.n 803e642 /* recycle oldest stable*/ i = old_stable; - 803e5e8: 8cbb ldrh r3, [r7, #36] ; 0x24 - 803e5ea: 843b strh r3, [r7, #32] + 803e618: 8cbb ldrh r3, [r7, #36] ; 0x24 + 803e61a: 843b strh r3, [r7, #32] LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest stable entry %d\n", (int)i)); /* no queued packets should exist on stable entries */ LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL); - 803e5ec: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e5f0: 493d ldr r1, [pc, #244] ; (803e6e8 ) - 803e5f2: 4613 mov r3, r2 - 803e5f4: 005b lsls r3, r3, #1 - 803e5f6: 4413 add r3, r2 - 803e5f8: 00db lsls r3, r3, #3 - 803e5fa: 440b add r3, r1 - 803e5fc: 681b ldr r3, [r3, #0] - 803e5fe: 2b00 cmp r3, #0 - 803e600: d018 beq.n 803e634 - 803e602: 4b3a ldr r3, [pc, #232] ; (803e6ec ) - 803e604: f240 126d movw r2, #365 ; 0x16d - 803e608: 493b ldr r1, [pc, #236] ; (803e6f8 ) - 803e60a: 483a ldr r0, [pc, #232] ; (803e6f4 ) - 803e60c: f002 fa68 bl 8040ae0 - 803e610: e010 b.n 803e634 + 803e61c: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e620: 493d ldr r1, [pc, #244] ; (803e718 ) + 803e622: 4613 mov r3, r2 + 803e624: 005b lsls r3, r3, #1 + 803e626: 4413 add r3, r2 + 803e628: 00db lsls r3, r3, #3 + 803e62a: 440b add r3, r1 + 803e62c: 681b ldr r3, [r3, #0] + 803e62e: 2b00 cmp r3, #0 + 803e630: d018 beq.n 803e664 + 803e632: 4b3a ldr r3, [pc, #232] ; (803e71c ) + 803e634: f240 126d movw r2, #365 ; 0x16d + 803e638: 493b ldr r1, [pc, #236] ; (803e728 ) + 803e63a: 483a ldr r0, [pc, #232] ; (803e724 ) + 803e63c: f002 fa68 bl 8040b10 + 803e640: e010 b.n 803e664 /* 3) found recyclable pending entry without queued packets? */ } else if (old_pending < ARP_TABLE_SIZE) { - 803e612: f9b7 3026 ldrsh.w r3, [r7, #38] ; 0x26 - 803e616: 2b09 cmp r3, #9 - 803e618: dc02 bgt.n 803e620 + 803e642: f9b7 3026 ldrsh.w r3, [r7, #38] ; 0x26 + 803e646: 2b09 cmp r3, #9 + 803e648: dc02 bgt.n 803e650 /* recycle oldest pending */ i = old_pending; - 803e61a: 8cfb ldrh r3, [r7, #38] ; 0x26 - 803e61c: 843b strh r3, [r7, #32] - 803e61e: e009 b.n 803e634 + 803e64a: 8cfb ldrh r3, [r7, #38] ; 0x26 + 803e64c: 843b strh r3, [r7, #32] + 803e64e: e009 b.n 803e664 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d (without queue)\n", (int)i)); /* 4) found recyclable pending entry with queued packets? */ } else if (old_queue < ARP_TABLE_SIZE) { - 803e620: f9b7 301e ldrsh.w r3, [r7, #30] - 803e624: 2b09 cmp r3, #9 - 803e626: dc02 bgt.n 803e62e + 803e650: f9b7 301e ldrsh.w r3, [r7, #30] + 803e654: 2b09 cmp r3, #9 + 803e656: dc02 bgt.n 803e65e /* recycle oldest pending (queued packets are free in etharp_free_entry) */ i = old_queue; - 803e628: 8bfb ldrh r3, [r7, #30] - 803e62a: 843b strh r3, [r7, #32] - 803e62c: e002 b.n 803e634 + 803e658: 8bfb ldrh r3, [r7, #30] + 803e65a: 843b strh r3, [r7, #32] + 803e65c: e002 b.n 803e664 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d, freeing packet queue %p\n", (int)i, (void *)(arp_table[i].q))); /* no empty or recyclable entries found */ } else { LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty or recyclable entries found\n")); return (s16_t)ERR_MEM; - 803e62e: f04f 33ff mov.w r3, #4294967295 - 803e632: e054 b.n 803e6de + 803e65e: f04f 33ff mov.w r3, #4294967295 + 803e662: e054 b.n 803e70e } /* { empty or recyclable entry found } */ LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); - 803e634: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e638: 2b09 cmp r3, #9 - 803e63a: dd06 ble.n 803e64a - 803e63c: 4b2b ldr r3, [pc, #172] ; (803e6ec ) - 803e63e: f240 127f movw r2, #383 ; 0x17f - 803e642: 492e ldr r1, [pc, #184] ; (803e6fc ) - 803e644: 482b ldr r0, [pc, #172] ; (803e6f4 ) - 803e646: f002 fa4b bl 8040ae0 + 803e664: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e668: 2b09 cmp r3, #9 + 803e66a: dd06 ble.n 803e67a + 803e66c: 4b2b ldr r3, [pc, #172] ; (803e71c ) + 803e66e: f240 127f movw r2, #383 ; 0x17f + 803e672: 492e ldr r1, [pc, #184] ; (803e72c ) + 803e674: 482b ldr r0, [pc, #172] ; (803e724 ) + 803e676: f002 fa4b bl 8040b10 etharp_free_entry(i); - 803e64a: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e64e: 4618 mov r0, r3 - 803e650: f7ff fe06 bl 803e260 + 803e67a: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e67e: 4618 mov r0, r3 + 803e680: f7ff fe06 bl 803e290 } LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); - 803e654: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e658: 2b09 cmp r3, #9 - 803e65a: dd06 ble.n 803e66a - 803e65c: 4b23 ldr r3, [pc, #140] ; (803e6ec ) - 803e65e: f240 1283 movw r2, #387 ; 0x183 - 803e662: 4926 ldr r1, [pc, #152] ; (803e6fc ) - 803e664: 4823 ldr r0, [pc, #140] ; (803e6f4 ) - 803e666: f002 fa3b bl 8040ae0 + 803e684: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e688: 2b09 cmp r3, #9 + 803e68a: dd06 ble.n 803e69a + 803e68c: 4b23 ldr r3, [pc, #140] ; (803e71c ) + 803e68e: f240 1283 movw r2, #387 ; 0x183 + 803e692: 4926 ldr r1, [pc, #152] ; (803e72c ) + 803e694: 4823 ldr r0, [pc, #140] ; (803e724 ) + 803e696: f002 fa3b bl 8040b10 LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY", - 803e66a: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e66e: 491e ldr r1, [pc, #120] ; (803e6e8 ) - 803e670: 4613 mov r3, r2 - 803e672: 005b lsls r3, r3, #1 - 803e674: 4413 add r3, r2 - 803e676: 00db lsls r3, r3, #3 - 803e678: 440b add r3, r1 - 803e67a: 3314 adds r3, #20 - 803e67c: 781b ldrb r3, [r3, #0] - 803e67e: 2b00 cmp r3, #0 - 803e680: d006 beq.n 803e690 - 803e682: 4b1a ldr r3, [pc, #104] ; (803e6ec ) - 803e684: f44f 72c2 mov.w r2, #388 ; 0x184 - 803e688: 491d ldr r1, [pc, #116] ; (803e700 ) - 803e68a: 481a ldr r0, [pc, #104] ; (803e6f4 ) - 803e68c: f002 fa28 bl 8040ae0 + 803e69a: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e69e: 491e ldr r1, [pc, #120] ; (803e718 ) + 803e6a0: 4613 mov r3, r2 + 803e6a2: 005b lsls r3, r3, #1 + 803e6a4: 4413 add r3, r2 + 803e6a6: 00db lsls r3, r3, #3 + 803e6a8: 440b add r3, r1 + 803e6aa: 3314 adds r3, #20 + 803e6ac: 781b ldrb r3, [r3, #0] + 803e6ae: 2b00 cmp r3, #0 + 803e6b0: d006 beq.n 803e6c0 + 803e6b2: 4b1a ldr r3, [pc, #104] ; (803e71c ) + 803e6b4: f44f 72c2 mov.w r2, #388 ; 0x184 + 803e6b8: 491d ldr r1, [pc, #116] ; (803e730 ) + 803e6ba: 481a ldr r0, [pc, #104] ; (803e724 ) + 803e6bc: f002 fa28 bl 8040b10 arp_table[i].state == ETHARP_STATE_EMPTY); /* IP address given? */ if (ipaddr != NULL) { - 803e690: 68fb ldr r3, [r7, #12] - 803e692: 2b00 cmp r3, #0 - 803e694: d00b beq.n 803e6ae + 803e6c0: 68fb ldr r3, [r7, #12] + 803e6c2: 2b00 cmp r3, #0 + 803e6c4: d00b beq.n 803e6de /* set IP address */ ip4_addr_copy(arp_table[i].ipaddr, *ipaddr); - 803e696: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e69a: 68fb ldr r3, [r7, #12] - 803e69c: 6819 ldr r1, [r3, #0] - 803e69e: 4812 ldr r0, [pc, #72] ; (803e6e8 ) - 803e6a0: 4613 mov r3, r2 - 803e6a2: 005b lsls r3, r3, #1 - 803e6a4: 4413 add r3, r2 - 803e6a6: 00db lsls r3, r3, #3 - 803e6a8: 4403 add r3, r0 - 803e6aa: 3304 adds r3, #4 - 803e6ac: 6019 str r1, [r3, #0] + 803e6c6: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e6ca: 68fb ldr r3, [r7, #12] + 803e6cc: 6819 ldr r1, [r3, #0] + 803e6ce: 4812 ldr r0, [pc, #72] ; (803e718 ) + 803e6d0: 4613 mov r3, r2 + 803e6d2: 005b lsls r3, r3, #1 + 803e6d4: 4413 add r3, r2 + 803e6d6: 00db lsls r3, r3, #3 + 803e6d8: 4403 add r3, r0 + 803e6da: 3304 adds r3, #4 + 803e6dc: 6019 str r1, [r3, #0] } arp_table[i].ctime = 0; - 803e6ae: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e6b2: 490d ldr r1, [pc, #52] ; (803e6e8 ) - 803e6b4: 4613 mov r3, r2 - 803e6b6: 005b lsls r3, r3, #1 - 803e6b8: 4413 add r3, r2 - 803e6ba: 00db lsls r3, r3, #3 - 803e6bc: 440b add r3, r1 - 803e6be: 3312 adds r3, #18 - 803e6c0: 2200 movs r2, #0 - 803e6c2: 801a strh r2, [r3, #0] + 803e6de: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e6e2: 490d ldr r1, [pc, #52] ; (803e718 ) + 803e6e4: 4613 mov r3, r2 + 803e6e6: 005b lsls r3, r3, #1 + 803e6e8: 4413 add r3, r2 + 803e6ea: 00db lsls r3, r3, #3 + 803e6ec: 440b add r3, r1 + 803e6ee: 3312 adds r3, #18 + 803e6f0: 2200 movs r2, #0 + 803e6f2: 801a strh r2, [r3, #0] #if ETHARP_TABLE_MATCH_NETIF arp_table[i].netif = netif; - 803e6c4: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e6c8: 4907 ldr r1, [pc, #28] ; (803e6e8 ) - 803e6ca: 4613 mov r3, r2 - 803e6cc: 005b lsls r3, r3, #1 - 803e6ce: 4413 add r3, r2 - 803e6d0: 00db lsls r3, r3, #3 - 803e6d2: 440b add r3, r1 - 803e6d4: 3308 adds r3, #8 - 803e6d6: 687a ldr r2, [r7, #4] - 803e6d8: 601a str r2, [r3, #0] + 803e6f4: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e6f8: 4907 ldr r1, [pc, #28] ; (803e718 ) + 803e6fa: 4613 mov r3, r2 + 803e6fc: 005b lsls r3, r3, #1 + 803e6fe: 4413 add r3, r2 + 803e700: 00db lsls r3, r3, #3 + 803e702: 440b add r3, r1 + 803e704: 3308 adds r3, #8 + 803e706: 687a ldr r2, [r7, #4] + 803e708: 601a str r2, [r3, #0] #endif /* ETHARP_TABLE_MATCH_NETIF */ return (s16_t)i; - 803e6da: f9b7 3020 ldrsh.w r3, [r7, #32] -} - 803e6de: 4618 mov r0, r3 - 803e6e0: 3728 adds r7, #40 ; 0x28 - 803e6e2: 46bd mov sp, r7 - 803e6e4: bd80 pop {r7, pc} - 803e6e6: bf00 nop - 803e6e8: 2400e9b8 .word 0x2400e9b8 - 803e6ec: 080445b8 .word 0x080445b8 - 803e6f0: 080445f0 .word 0x080445f0 - 803e6f4: 08044630 .word 0x08044630 - 803e6f8: 08044658 .word 0x08044658 - 803e6fc: 08044670 .word 0x08044670 - 803e700: 08044684 .word 0x08044684 - -0803e704 : + 803e70a: f9b7 3020 ldrsh.w r3, [r7, #32] +} + 803e70e: 4618 mov r0, r3 + 803e710: 3728 adds r7, #40 ; 0x28 + 803e712: 46bd mov sp, r7 + 803e714: bd80 pop {r7, pc} + 803e716: bf00 nop + 803e718: 2400e9b8 .word 0x2400e9b8 + 803e71c: 080445e8 .word 0x080445e8 + 803e720: 08044620 .word 0x08044620 + 803e724: 08044660 .word 0x08044660 + 803e728: 08044688 .word 0x08044688 + 803e72c: 080446a0 .word 0x080446a0 + 803e730: 080446b4 .word 0x080446b4 + +0803e734 : * * @see pbuf_free() */ static err_t etharp_update_arp_entry(struct netif *netif, const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags) { - 803e704: b580 push {r7, lr} - 803e706: b088 sub sp, #32 - 803e708: af02 add r7, sp, #8 - 803e70a: 60f8 str r0, [r7, #12] - 803e70c: 60b9 str r1, [r7, #8] - 803e70e: 607a str r2, [r7, #4] - 803e710: 70fb strb r3, [r7, #3] + 803e734: b580 push {r7, lr} + 803e736: b088 sub sp, #32 + 803e738: af02 add r7, sp, #8 + 803e73a: 60f8 str r0, [r7, #12] + 803e73c: 60b9 str r1, [r7, #8] + 803e73e: 607a str r2, [r7, #4] + 803e740: 70fb strb r3, [r7, #3] s16_t i; LWIP_ASSERT("netif->hwaddr_len == ETH_HWADDR_LEN", netif->hwaddr_len == ETH_HWADDR_LEN); - 803e712: 68fb ldr r3, [r7, #12] - 803e714: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 803e718: 2b06 cmp r3, #6 - 803e71a: d006 beq.n 803e72a - 803e71c: 4b48 ldr r3, [pc, #288] ; (803e840 ) - 803e71e: f240 12a9 movw r2, #425 ; 0x1a9 - 803e722: 4948 ldr r1, [pc, #288] ; (803e844 ) - 803e724: 4848 ldr r0, [pc, #288] ; (803e848 ) - 803e726: f002 f9db bl 8040ae0 + 803e742: 68fb ldr r3, [r7, #12] + 803e744: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 + 803e748: 2b06 cmp r3, #6 + 803e74a: d006 beq.n 803e75a + 803e74c: 4b48 ldr r3, [pc, #288] ; (803e870 ) + 803e74e: f240 12a9 movw r2, #425 ; 0x1a9 + 803e752: 4948 ldr r1, [pc, #288] ; (803e874 ) + 803e754: 4848 ldr r0, [pc, #288] ; (803e878 ) + 803e756: f002 f9db bl 8040b10 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n", ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr), (u16_t)ethaddr->addr[0], (u16_t)ethaddr->addr[1], (u16_t)ethaddr->addr[2], (u16_t)ethaddr->addr[3], (u16_t)ethaddr->addr[4], (u16_t)ethaddr->addr[5])); /* non-unicast address? */ if (ip4_addr_isany(ipaddr) || - 803e72a: 68bb ldr r3, [r7, #8] - 803e72c: 2b00 cmp r3, #0 - 803e72e: d012 beq.n 803e756 - 803e730: 68bb ldr r3, [r7, #8] - 803e732: 681b ldr r3, [r3, #0] - 803e734: 2b00 cmp r3, #0 - 803e736: d00e beq.n 803e756 + 803e75a: 68bb ldr r3, [r7, #8] + 803e75c: 2b00 cmp r3, #0 + 803e75e: d012 beq.n 803e786 + 803e760: 68bb ldr r3, [r7, #8] + 803e762: 681b ldr r3, [r3, #0] + 803e764: 2b00 cmp r3, #0 + 803e766: d00e beq.n 803e786 ip4_addr_isbroadcast(ipaddr, netif) || - 803e738: 68bb ldr r3, [r7, #8] - 803e73a: 681b ldr r3, [r3, #0] - 803e73c: 68f9 ldr r1, [r7, #12] - 803e73e: 4618 mov r0, r3 - 803e740: f001 f924 bl 803f98c - 803e744: 4603 mov r3, r0 + 803e768: 68bb ldr r3, [r7, #8] + 803e76a: 681b ldr r3, [r3, #0] + 803e76c: 68f9 ldr r1, [r7, #12] + 803e76e: 4618 mov r0, r3 + 803e770: f001 f924 bl 803f9bc + 803e774: 4603 mov r3, r0 if (ip4_addr_isany(ipaddr) || - 803e746: 2b00 cmp r3, #0 - 803e748: d105 bne.n 803e756 + 803e776: 2b00 cmp r3, #0 + 803e778: d105 bne.n 803e786 ip4_addr_ismulticast(ipaddr)) { - 803e74a: 68bb ldr r3, [r7, #8] - 803e74c: 681b ldr r3, [r3, #0] - 803e74e: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803e77a: 68bb ldr r3, [r7, #8] + 803e77c: 681b ldr r3, [r3, #0] + 803e77e: f003 03f0 and.w r3, r3, #240 ; 0xf0 ip4_addr_isbroadcast(ipaddr, netif) || - 803e752: 2be0 cmp r3, #224 ; 0xe0 - 803e754: d102 bne.n 803e75c + 803e782: 2be0 cmp r3, #224 ; 0xe0 + 803e784: d102 bne.n 803e78c LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: will not add non-unicast IP address to ARP cache\n")); return ERR_ARG; - 803e756: f06f 030f mvn.w r3, #15 - 803e75a: e06c b.n 803e836 + 803e786: f06f 030f mvn.w r3, #15 + 803e78a: e06c b.n 803e866 } /* find or create ARP entry */ i = etharp_find_entry(ipaddr, flags, netif); - 803e75c: 78fb ldrb r3, [r7, #3] - 803e75e: 68fa ldr r2, [r7, #12] - 803e760: 4619 mov r1, r3 - 803e762: 68b8 ldr r0, [r7, #8] - 803e764: f7ff fe56 bl 803e414 - 803e768: 4603 mov r3, r0 - 803e76a: 82fb strh r3, [r7, #22] + 803e78c: 78fb ldrb r3, [r7, #3] + 803e78e: 68fa ldr r2, [r7, #12] + 803e790: 4619 mov r1, r3 + 803e792: 68b8 ldr r0, [r7, #8] + 803e794: f7ff fe56 bl 803e444 + 803e798: 4603 mov r3, r0 + 803e79a: 82fb strh r3, [r7, #22] /* bail out if no entry could be found */ if (i < 0) { - 803e76c: f9b7 3016 ldrsh.w r3, [r7, #22] - 803e770: 2b00 cmp r3, #0 - 803e772: da02 bge.n 803e77a + 803e79c: f9b7 3016 ldrsh.w r3, [r7, #22] + 803e7a0: 2b00 cmp r3, #0 + 803e7a2: da02 bge.n 803e7aa return (err_t)i; - 803e774: 8afb ldrh r3, [r7, #22] - 803e776: b25b sxtb r3, r3 - 803e778: e05d b.n 803e836 + 803e7a4: 8afb ldrh r3, [r7, #22] + 803e7a6: b25b sxtb r3, r3 + 803e7a8: e05d b.n 803e866 return ERR_VAL; } else #endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ { /* mark it stable */ arp_table[i].state = ETHARP_STATE_STABLE; - 803e77a: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e77e: 4933 ldr r1, [pc, #204] ; (803e84c ) - 803e780: 4613 mov r3, r2 - 803e782: 005b lsls r3, r3, #1 - 803e784: 4413 add r3, r2 - 803e786: 00db lsls r3, r3, #3 - 803e788: 440b add r3, r1 - 803e78a: 3314 adds r3, #20 - 803e78c: 2202 movs r2, #2 - 803e78e: 701a strb r2, [r3, #0] + 803e7aa: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e7ae: 4933 ldr r1, [pc, #204] ; (803e87c ) + 803e7b0: 4613 mov r3, r2 + 803e7b2: 005b lsls r3, r3, #1 + 803e7b4: 4413 add r3, r2 + 803e7b6: 00db lsls r3, r3, #3 + 803e7b8: 440b add r3, r1 + 803e7ba: 3314 adds r3, #20 + 803e7bc: 2202 movs r2, #2 + 803e7be: 701a strb r2, [r3, #0] } /* record network interface */ arp_table[i].netif = netif; - 803e790: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e794: 492d ldr r1, [pc, #180] ; (803e84c ) - 803e796: 4613 mov r3, r2 - 803e798: 005b lsls r3, r3, #1 - 803e79a: 4413 add r3, r2 - 803e79c: 00db lsls r3, r3, #3 - 803e79e: 440b add r3, r1 - 803e7a0: 3308 adds r3, #8 - 803e7a2: 68fa ldr r2, [r7, #12] - 803e7a4: 601a str r2, [r3, #0] + 803e7c0: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e7c4: 492d ldr r1, [pc, #180] ; (803e87c ) + 803e7c6: 4613 mov r3, r2 + 803e7c8: 005b lsls r3, r3, #1 + 803e7ca: 4413 add r3, r2 + 803e7cc: 00db lsls r3, r3, #3 + 803e7ce: 440b add r3, r1 + 803e7d0: 3308 adds r3, #8 + 803e7d2: 68fa ldr r2, [r7, #12] + 803e7d4: 601a str r2, [r3, #0] /* insert in SNMP ARP index tree */ mib2_add_arp_entry(netif, &arp_table[i].ipaddr); LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: updating stable entry %"S16_F"\n", i)); /* update address */ SMEMCPY(&arp_table[i].ethaddr, ethaddr, ETH_HWADDR_LEN); - 803e7a6: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e7aa: 4613 mov r3, r2 - 803e7ac: 005b lsls r3, r3, #1 - 803e7ae: 4413 add r3, r2 - 803e7b0: 00db lsls r3, r3, #3 - 803e7b2: 3308 adds r3, #8 - 803e7b4: 4a25 ldr r2, [pc, #148] ; (803e84c ) - 803e7b6: 4413 add r3, r2 - 803e7b8: 3304 adds r3, #4 - 803e7ba: 2206 movs r2, #6 - 803e7bc: 6879 ldr r1, [r7, #4] - 803e7be: 4618 mov r0, r3 - 803e7c0: f002 f87e bl 80408c0 + 803e7d6: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e7da: 4613 mov r3, r2 + 803e7dc: 005b lsls r3, r3, #1 + 803e7de: 4413 add r3, r2 + 803e7e0: 00db lsls r3, r3, #3 + 803e7e2: 3308 adds r3, #8 + 803e7e4: 4a25 ldr r2, [pc, #148] ; (803e87c ) + 803e7e6: 4413 add r3, r2 + 803e7e8: 3304 adds r3, #4 + 803e7ea: 2206 movs r2, #6 + 803e7ec: 6879 ldr r1, [r7, #4] + 803e7ee: 4618 mov r0, r3 + 803e7f0: f002 f87e bl 80408f0 /* reset time stamp */ arp_table[i].ctime = 0; - 803e7c4: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e7c8: 4920 ldr r1, [pc, #128] ; (803e84c ) - 803e7ca: 4613 mov r3, r2 - 803e7cc: 005b lsls r3, r3, #1 - 803e7ce: 4413 add r3, r2 - 803e7d0: 00db lsls r3, r3, #3 - 803e7d2: 440b add r3, r1 - 803e7d4: 3312 adds r3, #18 - 803e7d6: 2200 movs r2, #0 - 803e7d8: 801a strh r2, [r3, #0] + 803e7f4: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e7f8: 4920 ldr r1, [pc, #128] ; (803e87c ) + 803e7fa: 4613 mov r3, r2 + 803e7fc: 005b lsls r3, r3, #1 + 803e7fe: 4413 add r3, r2 + 803e800: 00db lsls r3, r3, #3 + 803e802: 440b add r3, r1 + 803e804: 3312 adds r3, #18 + 803e806: 2200 movs r2, #0 + 803e808: 801a strh r2, [r3, #0] /* get the packet pointer */ p = q->p; /* now queue entry can be freed */ memp_free(MEMP_ARP_QUEUE, q); #else /* ARP_QUEUEING */ if (arp_table[i].q != NULL) { - 803e7da: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e7de: 491b ldr r1, [pc, #108] ; (803e84c ) - 803e7e0: 4613 mov r3, r2 - 803e7e2: 005b lsls r3, r3, #1 - 803e7e4: 4413 add r3, r2 - 803e7e6: 00db lsls r3, r3, #3 - 803e7e8: 440b add r3, r1 - 803e7ea: 681b ldr r3, [r3, #0] - 803e7ec: 2b00 cmp r3, #0 - 803e7ee: d021 beq.n 803e834 + 803e80a: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e80e: 491b ldr r1, [pc, #108] ; (803e87c ) + 803e810: 4613 mov r3, r2 + 803e812: 005b lsls r3, r3, #1 + 803e814: 4413 add r3, r2 + 803e816: 00db lsls r3, r3, #3 + 803e818: 440b add r3, r1 + 803e81a: 681b ldr r3, [r3, #0] + 803e81c: 2b00 cmp r3, #0 + 803e81e: d021 beq.n 803e864 struct pbuf *p = arp_table[i].q; - 803e7f0: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e7f4: 4915 ldr r1, [pc, #84] ; (803e84c ) - 803e7f6: 4613 mov r3, r2 - 803e7f8: 005b lsls r3, r3, #1 - 803e7fa: 4413 add r3, r2 - 803e7fc: 00db lsls r3, r3, #3 - 803e7fe: 440b add r3, r1 - 803e800: 681b ldr r3, [r3, #0] - 803e802: 613b str r3, [r7, #16] + 803e820: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e824: 4915 ldr r1, [pc, #84] ; (803e87c ) + 803e826: 4613 mov r3, r2 + 803e828: 005b lsls r3, r3, #1 + 803e82a: 4413 add r3, r2 + 803e82c: 00db lsls r3, r3, #3 + 803e82e: 440b add r3, r1 + 803e830: 681b ldr r3, [r3, #0] + 803e832: 613b str r3, [r7, #16] arp_table[i].q = NULL; - 803e804: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e808: 4910 ldr r1, [pc, #64] ; (803e84c ) - 803e80a: 4613 mov r3, r2 - 803e80c: 005b lsls r3, r3, #1 - 803e80e: 4413 add r3, r2 - 803e810: 00db lsls r3, r3, #3 - 803e812: 440b add r3, r1 - 803e814: 2200 movs r2, #0 - 803e816: 601a str r2, [r3, #0] + 803e834: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e838: 4910 ldr r1, [pc, #64] ; (803e87c ) + 803e83a: 4613 mov r3, r2 + 803e83c: 005b lsls r3, r3, #1 + 803e83e: 4413 add r3, r2 + 803e840: 00db lsls r3, r3, #3 + 803e842: 440b add r3, r1 + 803e844: 2200 movs r2, #0 + 803e846: 601a str r2, [r3, #0] #endif /* ARP_QUEUEING */ /* send the queued IP packet */ ethernet_output(netif, p, (struct eth_addr *)(netif->hwaddr), ethaddr, ETHTYPE_IP); - 803e818: 68fb ldr r3, [r7, #12] - 803e81a: f103 022a add.w r2, r3, #42 ; 0x2a - 803e81e: f44f 6300 mov.w r3, #2048 ; 0x800 - 803e822: 9300 str r3, [sp, #0] - 803e824: 687b ldr r3, [r7, #4] - 803e826: 6939 ldr r1, [r7, #16] - 803e828: 68f8 ldr r0, [r7, #12] - 803e82a: f001 ffbd bl 80407a8 + 803e848: 68fb ldr r3, [r7, #12] + 803e84a: f103 022a add.w r2, r3, #42 ; 0x2a + 803e84e: f44f 6300 mov.w r3, #2048 ; 0x800 + 803e852: 9300 str r3, [sp, #0] + 803e854: 687b ldr r3, [r7, #4] + 803e856: 6939 ldr r1, [r7, #16] + 803e858: 68f8 ldr r0, [r7, #12] + 803e85a: f001 ffbd bl 80407d8 /* free the queued IP packet */ pbuf_free(p); - 803e82e: 6938 ldr r0, [r7, #16] - 803e830: f7f8 ff6c bl 803770c + 803e85e: 6938 ldr r0, [r7, #16] + 803e860: f7f8 ff6c bl 803773c } return ERR_OK; - 803e834: 2300 movs r3, #0 -} - 803e836: 4618 mov r0, r3 - 803e838: 3718 adds r7, #24 - 803e83a: 46bd mov sp, r7 - 803e83c: bd80 pop {r7, pc} - 803e83e: bf00 nop - 803e840: 080445b8 .word 0x080445b8 - 803e844: 080446b0 .word 0x080446b0 - 803e848: 08044630 .word 0x08044630 - 803e84c: 2400e9b8 .word 0x2400e9b8 - -0803e850 : + 803e864: 2300 movs r3, #0 +} + 803e866: 4618 mov r0, r3 + 803e868: 3718 adds r7, #24 + 803e86a: 46bd mov sp, r7 + 803e86c: bd80 pop {r7, pc} + 803e86e: bf00 nop + 803e870: 080445e8 .word 0x080445e8 + 803e874: 080446e0 .word 0x080446e0 + 803e878: 08044660 .word 0x08044660 + 803e87c: 2400e9b8 .word 0x2400e9b8 + +0803e880 : * * @param netif points to a network interface */ void etharp_cleanup_netif(struct netif *netif) { - 803e850: b580 push {r7, lr} - 803e852: b084 sub sp, #16 - 803e854: af00 add r7, sp, #0 - 803e856: 6078 str r0, [r7, #4] + 803e880: b580 push {r7, lr} + 803e882: b084 sub sp, #16 + 803e884: af00 add r7, sp, #0 + 803e886: 6078 str r0, [r7, #4] int i; for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e858: 2300 movs r3, #0 - 803e85a: 60fb str r3, [r7, #12] - 803e85c: e01e b.n 803e89c + 803e888: 2300 movs r3, #0 + 803e88a: 60fb str r3, [r7, #12] + 803e88c: e01e b.n 803e8cc u8_t state = arp_table[i].state; - 803e85e: 4913 ldr r1, [pc, #76] ; (803e8ac ) - 803e860: 68fa ldr r2, [r7, #12] - 803e862: 4613 mov r3, r2 - 803e864: 005b lsls r3, r3, #1 - 803e866: 4413 add r3, r2 - 803e868: 00db lsls r3, r3, #3 - 803e86a: 440b add r3, r1 - 803e86c: 3314 adds r3, #20 - 803e86e: 781b ldrb r3, [r3, #0] - 803e870: 72fb strb r3, [r7, #11] + 803e88e: 4913 ldr r1, [pc, #76] ; (803e8dc ) + 803e890: 68fa ldr r2, [r7, #12] + 803e892: 4613 mov r3, r2 + 803e894: 005b lsls r3, r3, #1 + 803e896: 4413 add r3, r2 + 803e898: 00db lsls r3, r3, #3 + 803e89a: 440b add r3, r1 + 803e89c: 3314 adds r3, #20 + 803e89e: 781b ldrb r3, [r3, #0] + 803e8a0: 72fb strb r3, [r7, #11] if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) { - 803e872: 7afb ldrb r3, [r7, #11] - 803e874: 2b00 cmp r3, #0 - 803e876: d00e beq.n 803e896 - 803e878: 490c ldr r1, [pc, #48] ; (803e8ac ) - 803e87a: 68fa ldr r2, [r7, #12] - 803e87c: 4613 mov r3, r2 - 803e87e: 005b lsls r3, r3, #1 - 803e880: 4413 add r3, r2 - 803e882: 00db lsls r3, r3, #3 - 803e884: 440b add r3, r1 - 803e886: 3308 adds r3, #8 - 803e888: 681b ldr r3, [r3, #0] - 803e88a: 687a ldr r2, [r7, #4] - 803e88c: 429a cmp r2, r3 - 803e88e: d102 bne.n 803e896 + 803e8a2: 7afb ldrb r3, [r7, #11] + 803e8a4: 2b00 cmp r3, #0 + 803e8a6: d00e beq.n 803e8c6 + 803e8a8: 490c ldr r1, [pc, #48] ; (803e8dc ) + 803e8aa: 68fa ldr r2, [r7, #12] + 803e8ac: 4613 mov r3, r2 + 803e8ae: 005b lsls r3, r3, #1 + 803e8b0: 4413 add r3, r2 + 803e8b2: 00db lsls r3, r3, #3 + 803e8b4: 440b add r3, r1 + 803e8b6: 3308 adds r3, #8 + 803e8b8: 681b ldr r3, [r3, #0] + 803e8ba: 687a ldr r2, [r7, #4] + 803e8bc: 429a cmp r2, r3 + 803e8be: d102 bne.n 803e8c6 etharp_free_entry(i); - 803e890: 68f8 ldr r0, [r7, #12] - 803e892: f7ff fce5 bl 803e260 + 803e8c0: 68f8 ldr r0, [r7, #12] + 803e8c2: f7ff fce5 bl 803e290 for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e896: 68fb ldr r3, [r7, #12] - 803e898: 3301 adds r3, #1 - 803e89a: 60fb str r3, [r7, #12] - 803e89c: 68fb ldr r3, [r7, #12] - 803e89e: 2b09 cmp r3, #9 - 803e8a0: dddd ble.n 803e85e + 803e8c6: 68fb ldr r3, [r7, #12] + 803e8c8: 3301 adds r3, #1 + 803e8ca: 60fb str r3, [r7, #12] + 803e8cc: 68fb ldr r3, [r7, #12] + 803e8ce: 2b09 cmp r3, #9 + 803e8d0: dddd ble.n 803e88e } } } - 803e8a2: bf00 nop - 803e8a4: bf00 nop - 803e8a6: 3710 adds r7, #16 - 803e8a8: 46bd mov sp, r7 - 803e8aa: bd80 pop {r7, pc} - 803e8ac: 2400e9b8 .word 0x2400e9b8 + 803e8d2: bf00 nop + 803e8d4: bf00 nop + 803e8d6: 3710 adds r7, #16 + 803e8d8: 46bd mov sp, r7 + 803e8da: bd80 pop {r7, pc} + 803e8dc: 2400e9b8 .word 0x2400e9b8 -0803e8b0 : +0803e8e0 : * * @see pbuf_free() */ void etharp_input(struct pbuf *p, struct netif *netif) { - 803e8b0: b5b0 push {r4, r5, r7, lr} - 803e8b2: b08a sub sp, #40 ; 0x28 - 803e8b4: af04 add r7, sp, #16 - 803e8b6: 6078 str r0, [r7, #4] - 803e8b8: 6039 str r1, [r7, #0] + 803e8e0: b5b0 push {r4, r5, r7, lr} + 803e8e2: b08a sub sp, #40 ; 0x28 + 803e8e4: af04 add r7, sp, #16 + 803e8e6: 6078 str r0, [r7, #4] + 803e8e8: 6039 str r1, [r7, #0] ip4_addr_t sipaddr, dipaddr; u8_t for_us; LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif != NULL", (netif != NULL), return;); - 803e8ba: 683b ldr r3, [r7, #0] - 803e8bc: 2b00 cmp r3, #0 - 803e8be: d107 bne.n 803e8d0 - 803e8c0: 4b3d ldr r3, [pc, #244] ; (803e9b8 ) - 803e8c2: f240 228a movw r2, #650 ; 0x28a - 803e8c6: 493d ldr r1, [pc, #244] ; (803e9bc ) - 803e8c8: 483d ldr r0, [pc, #244] ; (803e9c0 ) - 803e8ca: f002 f909 bl 8040ae0 - 803e8ce: e06f b.n 803e9b0 + 803e8ea: 683b ldr r3, [r7, #0] + 803e8ec: 2b00 cmp r3, #0 + 803e8ee: d107 bne.n 803e900 + 803e8f0: 4b3d ldr r3, [pc, #244] ; (803e9e8 ) + 803e8f2: f240 228a movw r2, #650 ; 0x28a + 803e8f6: 493d ldr r1, [pc, #244] ; (803e9ec ) + 803e8f8: 483d ldr r0, [pc, #244] ; (803e9f0 ) + 803e8fa: f002 f909 bl 8040b10 + 803e8fe: e06f b.n 803e9e0 hdr = (struct etharp_hdr *)p->payload; - 803e8d0: 687b ldr r3, [r7, #4] - 803e8d2: 685b ldr r3, [r3, #4] - 803e8d4: 613b str r3, [r7, #16] + 803e900: 687b ldr r3, [r7, #4] + 803e902: 685b ldr r3, [r3, #4] + 803e904: 613b str r3, [r7, #16] /* RFC 826 "Packet Reception": */ if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) || - 803e8d6: 693b ldr r3, [r7, #16] - 803e8d8: 881b ldrh r3, [r3, #0] - 803e8da: b29b uxth r3, r3 - 803e8dc: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803e8e0: d10c bne.n 803e8fc + 803e906: 693b ldr r3, [r7, #16] + 803e908: 881b ldrh r3, [r3, #0] + 803e90a: b29b uxth r3, r3 + 803e90c: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 803e910: d10c bne.n 803e92c (hdr->hwlen != ETH_HWADDR_LEN) || - 803e8e2: 693b ldr r3, [r7, #16] - 803e8e4: 791b ldrb r3, [r3, #4] + 803e912: 693b ldr r3, [r7, #16] + 803e914: 791b ldrb r3, [r3, #4] if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) || - 803e8e6: 2b06 cmp r3, #6 - 803e8e8: d108 bne.n 803e8fc + 803e916: 2b06 cmp r3, #6 + 803e918: d108 bne.n 803e92c (hdr->protolen != sizeof(ip4_addr_t)) || - 803e8ea: 693b ldr r3, [r7, #16] - 803e8ec: 795b ldrb r3, [r3, #5] + 803e91a: 693b ldr r3, [r7, #16] + 803e91c: 795b ldrb r3, [r3, #5] (hdr->hwlen != ETH_HWADDR_LEN) || - 803e8ee: 2b04 cmp r3, #4 - 803e8f0: d104 bne.n 803e8fc + 803e91e: 2b04 cmp r3, #4 + 803e920: d104 bne.n 803e92c (hdr->proto != PP_HTONS(ETHTYPE_IP))) { - 803e8f2: 693b ldr r3, [r7, #16] - 803e8f4: 885b ldrh r3, [r3, #2] - 803e8f6: b29b uxth r3, r3 + 803e922: 693b ldr r3, [r7, #16] + 803e924: 885b ldrh r3, [r3, #2] + 803e926: b29b uxth r3, r3 (hdr->protolen != sizeof(ip4_addr_t)) || - 803e8f8: 2b08 cmp r3, #8 - 803e8fa: d003 beq.n 803e904 + 803e928: 2b08 cmp r3, #8 + 803e92a: d003 beq.n 803e934 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("etharp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n", hdr->hwtype, (u16_t)hdr->hwlen, hdr->proto, (u16_t)hdr->protolen)); ETHARP_STATS_INC(etharp.proterr); ETHARP_STATS_INC(etharp.drop); pbuf_free(p); - 803e8fc: 6878 ldr r0, [r7, #4] - 803e8fe: f7f8 ff05 bl 803770c + 803e92c: 6878 ldr r0, [r7, #4] + 803e92e: f7f8 ff05 bl 803773c return; - 803e902: e055 b.n 803e9b0 + 803e932: e055 b.n 803e9e0 autoip_arp_reply(netif, hdr); #endif /* LWIP_AUTOIP */ /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without * structure packing (not using structure copy which breaks strict-aliasing rules). */ IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&sipaddr, &hdr->sipaddr); - 803e904: 693b ldr r3, [r7, #16] - 803e906: 330e adds r3, #14 - 803e908: 681b ldr r3, [r3, #0] - 803e90a: 60fb str r3, [r7, #12] + 803e934: 693b ldr r3, [r7, #16] + 803e936: 330e adds r3, #14 + 803e938: 681b ldr r3, [r3, #0] + 803e93a: 60fb str r3, [r7, #12] IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&dipaddr, &hdr->dipaddr); - 803e90c: 693b ldr r3, [r7, #16] - 803e90e: 3318 adds r3, #24 - 803e910: 681b ldr r3, [r3, #0] - 803e912: 60bb str r3, [r7, #8] + 803e93c: 693b ldr r3, [r7, #16] + 803e93e: 3318 adds r3, #24 + 803e940: 681b ldr r3, [r3, #0] + 803e942: 60bb str r3, [r7, #8] /* this interface is not configured? */ if (ip4_addr_isany_val(*netif_ip4_addr(netif))) { - 803e914: 683b ldr r3, [r7, #0] - 803e916: 3304 adds r3, #4 - 803e918: 681b ldr r3, [r3, #0] - 803e91a: 2b00 cmp r3, #0 - 803e91c: d102 bne.n 803e924 + 803e944: 683b ldr r3, [r7, #0] + 803e946: 3304 adds r3, #4 + 803e948: 681b ldr r3, [r3, #0] + 803e94a: 2b00 cmp r3, #0 + 803e94c: d102 bne.n 803e954 for_us = 0; - 803e91e: 2300 movs r3, #0 - 803e920: 75fb strb r3, [r7, #23] - 803e922: e009 b.n 803e938 + 803e94e: 2300 movs r3, #0 + 803e950: 75fb strb r3, [r7, #23] + 803e952: e009 b.n 803e968 } else { /* ARP packet directed to us? */ for_us = (u8_t)ip4_addr_cmp(&dipaddr, netif_ip4_addr(netif)); - 803e924: 68ba ldr r2, [r7, #8] - 803e926: 683b ldr r3, [r7, #0] - 803e928: 3304 adds r3, #4 - 803e92a: 681b ldr r3, [r3, #0] - 803e92c: 429a cmp r2, r3 - 803e92e: bf0c ite eq - 803e930: 2301 moveq r3, #1 - 803e932: 2300 movne r3, #0 - 803e934: b2db uxtb r3, r3 - 803e936: 75fb strb r3, [r7, #23] + 803e954: 68ba ldr r2, [r7, #8] + 803e956: 683b ldr r3, [r7, #0] + 803e958: 3304 adds r3, #4 + 803e95a: 681b ldr r3, [r3, #0] + 803e95c: 429a cmp r2, r3 + 803e95e: bf0c ite eq + 803e960: 2301 moveq r3, #1 + 803e962: 2300 movne r3, #0 + 803e964: b2db uxtb r3, r3 + 803e966: 75fb strb r3, [r7, #23] /* ARP message directed to us? -> add IP address in ARP cache; assume requester wants to talk to us, can result in directly sending the queued packets for this host. ARP message not directed to us? -> update the source IP address in the cache, if present */ etharp_update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), - 803e938: 693b ldr r3, [r7, #16] - 803e93a: f103 0208 add.w r2, r3, #8 - 803e93e: 7dfb ldrb r3, [r7, #23] - 803e940: 2b00 cmp r3, #0 - 803e942: d001 beq.n 803e948 - 803e944: 2301 movs r3, #1 - 803e946: e000 b.n 803e94a - 803e948: 2302 movs r3, #2 - 803e94a: f107 010c add.w r1, r7, #12 - 803e94e: 6838 ldr r0, [r7, #0] - 803e950: f7ff fed8 bl 803e704 + 803e968: 693b ldr r3, [r7, #16] + 803e96a: f103 0208 add.w r2, r3, #8 + 803e96e: 7dfb ldrb r3, [r7, #23] + 803e970: 2b00 cmp r3, #0 + 803e972: d001 beq.n 803e978 + 803e974: 2301 movs r3, #1 + 803e976: e000 b.n 803e97a + 803e978: 2302 movs r3, #2 + 803e97a: f107 010c add.w r1, r7, #12 + 803e97e: 6838 ldr r0, [r7, #0] + 803e980: f7ff fed8 bl 803e734 for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY); /* now act on the message itself */ switch (hdr->opcode) { - 803e954: 693b ldr r3, [r7, #16] - 803e956: 88db ldrh r3, [r3, #6] - 803e958: b29b uxth r3, r3 - 803e95a: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803e95e: d003 beq.n 803e968 - 803e960: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 803e964: d01e beq.n 803e9a4 + 803e984: 693b ldr r3, [r7, #16] + 803e986: 88db ldrh r3, [r3, #6] + 803e988: b29b uxth r3, r3 + 803e98a: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 803e98e: d003 beq.n 803e998 + 803e990: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 803e994: d01e beq.n 803e9d4 #endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */ break; default: LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_input: ARP unknown opcode type %"S16_F"\n", lwip_htons(hdr->opcode))); ETHARP_STATS_INC(etharp.err); break; - 803e966: e020 b.n 803e9aa + 803e996: e020 b.n 803e9da if (for_us) { - 803e968: 7dfb ldrb r3, [r7, #23] - 803e96a: 2b00 cmp r3, #0 - 803e96c: d01c beq.n 803e9a8 + 803e998: 7dfb ldrb r3, [r7, #23] + 803e99a: 2b00 cmp r3, #0 + 803e99c: d01c beq.n 803e9d8 (struct eth_addr *)netif->hwaddr, &hdr->shwaddr, - 803e96e: 683b ldr r3, [r7, #0] - 803e970: f103 002a add.w r0, r3, #42 ; 0x2a - 803e974: 693b ldr r3, [r7, #16] - 803e976: f103 0408 add.w r4, r3, #8 + 803e99e: 683b ldr r3, [r7, #0] + 803e9a0: f103 002a add.w r0, r3, #42 ; 0x2a + 803e9a4: 693b ldr r3, [r7, #16] + 803e9a6: f103 0408 add.w r4, r3, #8 (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), - 803e97a: 683b ldr r3, [r7, #0] - 803e97c: f103 052a add.w r5, r3, #42 ; 0x2a - 803e980: 683b ldr r3, [r7, #0] - 803e982: 3304 adds r3, #4 + 803e9aa: 683b ldr r3, [r7, #0] + 803e9ac: f103 052a add.w r5, r3, #42 ; 0x2a + 803e9b0: 683b ldr r3, [r7, #0] + 803e9b2: 3304 adds r3, #4 &hdr->shwaddr, &sipaddr, - 803e984: 693a ldr r2, [r7, #16] - 803e986: 3208 adds r2, #8 + 803e9b4: 693a ldr r2, [r7, #16] + 803e9b6: 3208 adds r2, #8 etharp_raw(netif, - 803e988: 2102 movs r1, #2 - 803e98a: 9103 str r1, [sp, #12] - 803e98c: f107 010c add.w r1, r7, #12 - 803e990: 9102 str r1, [sp, #8] - 803e992: 9201 str r2, [sp, #4] - 803e994: 9300 str r3, [sp, #0] - 803e996: 462b mov r3, r5 - 803e998: 4622 mov r2, r4 - 803e99a: 4601 mov r1, r0 - 803e99c: 6838 ldr r0, [r7, #0] - 803e99e: f000 faeb bl 803ef78 + 803e9b8: 2102 movs r1, #2 + 803e9ba: 9103 str r1, [sp, #12] + 803e9bc: f107 010c add.w r1, r7, #12 + 803e9c0: 9102 str r1, [sp, #8] + 803e9c2: 9201 str r2, [sp, #4] + 803e9c4: 9300 str r3, [sp, #0] + 803e9c6: 462b mov r3, r5 + 803e9c8: 4622 mov r2, r4 + 803e9ca: 4601 mov r1, r0 + 803e9cc: 6838 ldr r0, [r7, #0] + 803e9ce: f000 faeb bl 803efa8 break; - 803e9a2: e001 b.n 803e9a8 + 803e9d2: e001 b.n 803e9d8 break; - 803e9a4: bf00 nop - 803e9a6: e000 b.n 803e9aa + 803e9d4: bf00 nop + 803e9d6: e000 b.n 803e9da break; - 803e9a8: bf00 nop + 803e9d8: bf00 nop } /* free ARP packet */ pbuf_free(p); - 803e9aa: 6878 ldr r0, [r7, #4] - 803e9ac: f7f8 feae bl 803770c -} - 803e9b0: 3718 adds r7, #24 - 803e9b2: 46bd mov sp, r7 - 803e9b4: bdb0 pop {r4, r5, r7, pc} - 803e9b6: bf00 nop - 803e9b8: 080445b8 .word 0x080445b8 - 803e9bc: 08044708 .word 0x08044708 - 803e9c0: 08044630 .word 0x08044630 - -0803e9c4 : + 803e9da: 6878 ldr r0, [r7, #4] + 803e9dc: f7f8 feae bl 803773c +} + 803e9e0: 3718 adds r7, #24 + 803e9e2: 46bd mov sp, r7 + 803e9e4: bdb0 pop {r4, r5, r7, pc} + 803e9e6: bf00 nop + 803e9e8: 080445e8 .word 0x080445e8 + 803e9ec: 08044738 .word 0x08044738 + 803e9f0: 08044660 .word 0x08044660 + +0803e9f4 : /** Just a small helper function that sends a pbuf to an ethernet address * in the arp_table specified by the index 'arp_idx'. */ static err_t etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, netif_addr_idx_t arp_idx) { - 803e9c4: b580 push {r7, lr} - 803e9c6: b086 sub sp, #24 - 803e9c8: af02 add r7, sp, #8 - 803e9ca: 60f8 str r0, [r7, #12] - 803e9cc: 60b9 str r1, [r7, #8] - 803e9ce: 4613 mov r3, r2 - 803e9d0: 71fb strb r3, [r7, #7] + 803e9f4: b580 push {r7, lr} + 803e9f6: b086 sub sp, #24 + 803e9f8: af02 add r7, sp, #8 + 803e9fa: 60f8 str r0, [r7, #12] + 803e9fc: 60b9 str r1, [r7, #8] + 803e9fe: 4613 mov r3, r2 + 803ea00: 71fb strb r3, [r7, #7] LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE", - 803e9d2: 79fa ldrb r2, [r7, #7] - 803e9d4: 4944 ldr r1, [pc, #272] ; (803eae8 ) - 803e9d6: 4613 mov r3, r2 - 803e9d8: 005b lsls r3, r3, #1 - 803e9da: 4413 add r3, r2 - 803e9dc: 00db lsls r3, r3, #3 - 803e9de: 440b add r3, r1 - 803e9e0: 3314 adds r3, #20 - 803e9e2: 781b ldrb r3, [r3, #0] - 803e9e4: 2b01 cmp r3, #1 - 803e9e6: d806 bhi.n 803e9f6 - 803e9e8: 4b40 ldr r3, [pc, #256] ; (803eaec ) - 803e9ea: f240 22ee movw r2, #750 ; 0x2ee - 803e9ee: 4940 ldr r1, [pc, #256] ; (803eaf0 ) - 803e9f0: 4840 ldr r0, [pc, #256] ; (803eaf4 ) - 803e9f2: f002 f875 bl 8040ae0 + 803ea02: 79fa ldrb r2, [r7, #7] + 803ea04: 4944 ldr r1, [pc, #272] ; (803eb18 ) + 803ea06: 4613 mov r3, r2 + 803ea08: 005b lsls r3, r3, #1 + 803ea0a: 4413 add r3, r2 + 803ea0c: 00db lsls r3, r3, #3 + 803ea0e: 440b add r3, r1 + 803ea10: 3314 adds r3, #20 + 803ea12: 781b ldrb r3, [r3, #0] + 803ea14: 2b01 cmp r3, #1 + 803ea16: d806 bhi.n 803ea26 + 803ea18: 4b40 ldr r3, [pc, #256] ; (803eb1c ) + 803ea1a: f240 22ee movw r2, #750 ; 0x2ee + 803ea1e: 4940 ldr r1, [pc, #256] ; (803eb20 ) + 803ea20: 4840 ldr r0, [pc, #256] ; (803eb24 ) + 803ea22: f002 f875 bl 8040b10 arp_table[arp_idx].state >= ETHARP_STATE_STABLE); /* if arp table entry is about to expire: re-request it, but only if its state is ETHARP_STATE_STABLE to prevent flooding the network with ARP requests if this address is used frequently. */ if (arp_table[arp_idx].state == ETHARP_STATE_STABLE) { - 803e9f6: 79fa ldrb r2, [r7, #7] - 803e9f8: 493b ldr r1, [pc, #236] ; (803eae8 ) - 803e9fa: 4613 mov r3, r2 - 803e9fc: 005b lsls r3, r3, #1 - 803e9fe: 4413 add r3, r2 - 803ea00: 00db lsls r3, r3, #3 - 803ea02: 440b add r3, r1 - 803ea04: 3314 adds r3, #20 - 803ea06: 781b ldrb r3, [r3, #0] - 803ea08: 2b02 cmp r3, #2 - 803ea0a: d153 bne.n 803eab4 + 803ea26: 79fa ldrb r2, [r7, #7] + 803ea28: 493b ldr r1, [pc, #236] ; (803eb18 ) + 803ea2a: 4613 mov r3, r2 + 803ea2c: 005b lsls r3, r3, #1 + 803ea2e: 4413 add r3, r2 + 803ea30: 00db lsls r3, r3, #3 + 803ea32: 440b add r3, r1 + 803ea34: 3314 adds r3, #20 + 803ea36: 781b ldrb r3, [r3, #0] + 803ea38: 2b02 cmp r3, #2 + 803ea3a: d153 bne.n 803eae4 if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_BROADCAST) { - 803ea0c: 79fa ldrb r2, [r7, #7] - 803ea0e: 4936 ldr r1, [pc, #216] ; (803eae8 ) - 803ea10: 4613 mov r3, r2 - 803ea12: 005b lsls r3, r3, #1 - 803ea14: 4413 add r3, r2 - 803ea16: 00db lsls r3, r3, #3 - 803ea18: 440b add r3, r1 - 803ea1a: 3312 adds r3, #18 - 803ea1c: 881b ldrh r3, [r3, #0] - 803ea1e: f5b3 7f8e cmp.w r3, #284 ; 0x11c - 803ea22: d919 bls.n 803ea58 + 803ea3c: 79fa ldrb r2, [r7, #7] + 803ea3e: 4936 ldr r1, [pc, #216] ; (803eb18 ) + 803ea40: 4613 mov r3, r2 + 803ea42: 005b lsls r3, r3, #1 + 803ea44: 4413 add r3, r2 + 803ea46: 00db lsls r3, r3, #3 + 803ea48: 440b add r3, r1 + 803ea4a: 3312 adds r3, #18 + 803ea4c: 881b ldrh r3, [r3, #0] + 803ea4e: f5b3 7f8e cmp.w r3, #284 ; 0x11c + 803ea52: d919 bls.n 803ea88 /* issue a standard request using broadcast */ if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) { - 803ea24: 79fa ldrb r2, [r7, #7] - 803ea26: 4613 mov r3, r2 - 803ea28: 005b lsls r3, r3, #1 - 803ea2a: 4413 add r3, r2 - 803ea2c: 00db lsls r3, r3, #3 - 803ea2e: 4a2e ldr r2, [pc, #184] ; (803eae8 ) - 803ea30: 4413 add r3, r2 - 803ea32: 3304 adds r3, #4 - 803ea34: 4619 mov r1, r3 - 803ea36: 68f8 ldr r0, [r7, #12] - 803ea38: f000 fb4c bl 803f0d4 - 803ea3c: 4603 mov r3, r0 - 803ea3e: 2b00 cmp r3, #0 - 803ea40: d138 bne.n 803eab4 + 803ea54: 79fa ldrb r2, [r7, #7] + 803ea56: 4613 mov r3, r2 + 803ea58: 005b lsls r3, r3, #1 + 803ea5a: 4413 add r3, r2 + 803ea5c: 00db lsls r3, r3, #3 + 803ea5e: 4a2e ldr r2, [pc, #184] ; (803eb18 ) + 803ea60: 4413 add r3, r2 + 803ea62: 3304 adds r3, #4 + 803ea64: 4619 mov r1, r3 + 803ea66: 68f8 ldr r0, [r7, #12] + 803ea68: f000 fb4c bl 803f104 + 803ea6c: 4603 mov r3, r0 + 803ea6e: 2b00 cmp r3, #0 + 803ea70: d138 bne.n 803eae4 arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1; - 803ea42: 79fa ldrb r2, [r7, #7] - 803ea44: 4928 ldr r1, [pc, #160] ; (803eae8 ) - 803ea46: 4613 mov r3, r2 - 803ea48: 005b lsls r3, r3, #1 - 803ea4a: 4413 add r3, r2 - 803ea4c: 00db lsls r3, r3, #3 - 803ea4e: 440b add r3, r1 - 803ea50: 3314 adds r3, #20 - 803ea52: 2203 movs r2, #3 - 803ea54: 701a strb r2, [r3, #0] - 803ea56: e02d b.n 803eab4 + 803ea72: 79fa ldrb r2, [r7, #7] + 803ea74: 4928 ldr r1, [pc, #160] ; (803eb18 ) + 803ea76: 4613 mov r3, r2 + 803ea78: 005b lsls r3, r3, #1 + 803ea7a: 4413 add r3, r2 + 803ea7c: 00db lsls r3, r3, #3 + 803ea7e: 440b add r3, r1 + 803ea80: 3314 adds r3, #20 + 803ea82: 2203 movs r2, #3 + 803ea84: 701a strb r2, [r3, #0] + 803ea86: e02d b.n 803eae4 } } else if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_UNICAST) { - 803ea58: 79fa ldrb r2, [r7, #7] - 803ea5a: 4923 ldr r1, [pc, #140] ; (803eae8 ) - 803ea5c: 4613 mov r3, r2 - 803ea5e: 005b lsls r3, r3, #1 - 803ea60: 4413 add r3, r2 - 803ea62: 00db lsls r3, r3, #3 - 803ea64: 440b add r3, r1 - 803ea66: 3312 adds r3, #18 - 803ea68: 881b ldrh r3, [r3, #0] - 803ea6a: f5b3 7f87 cmp.w r3, #270 ; 0x10e - 803ea6e: d321 bcc.n 803eab4 + 803ea88: 79fa ldrb r2, [r7, #7] + 803ea8a: 4923 ldr r1, [pc, #140] ; (803eb18 ) + 803ea8c: 4613 mov r3, r2 + 803ea8e: 005b lsls r3, r3, #1 + 803ea90: 4413 add r3, r2 + 803ea92: 00db lsls r3, r3, #3 + 803ea94: 440b add r3, r1 + 803ea96: 3312 adds r3, #18 + 803ea98: 881b ldrh r3, [r3, #0] + 803ea9a: f5b3 7f87 cmp.w r3, #270 ; 0x10e + 803ea9e: d321 bcc.n 803eae4 /* issue a unicast request (for 15 seconds) to prevent unnecessary broadcast */ if (etharp_request_dst(netif, &arp_table[arp_idx].ipaddr, &arp_table[arp_idx].ethaddr) == ERR_OK) { - 803ea70: 79fa ldrb r2, [r7, #7] - 803ea72: 4613 mov r3, r2 - 803ea74: 005b lsls r3, r3, #1 - 803ea76: 4413 add r3, r2 - 803ea78: 00db lsls r3, r3, #3 - 803ea7a: 4a1b ldr r2, [pc, #108] ; (803eae8 ) - 803ea7c: 4413 add r3, r2 - 803ea7e: 1d19 adds r1, r3, #4 - 803ea80: 79fa ldrb r2, [r7, #7] - 803ea82: 4613 mov r3, r2 - 803ea84: 005b lsls r3, r3, #1 - 803ea86: 4413 add r3, r2 - 803ea88: 00db lsls r3, r3, #3 - 803ea8a: 3308 adds r3, #8 - 803ea8c: 4a16 ldr r2, [pc, #88] ; (803eae8 ) - 803ea8e: 4413 add r3, r2 - 803ea90: 3304 adds r3, #4 - 803ea92: 461a mov r2, r3 - 803ea94: 68f8 ldr r0, [r7, #12] - 803ea96: f000 fafb bl 803f090 - 803ea9a: 4603 mov r3, r0 - 803ea9c: 2b00 cmp r3, #0 - 803ea9e: d109 bne.n 803eab4 - arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1; 803eaa0: 79fa ldrb r2, [r7, #7] - 803eaa2: 4911 ldr r1, [pc, #68] ; (803eae8 ) - 803eaa4: 4613 mov r3, r2 - 803eaa6: 005b lsls r3, r3, #1 - 803eaa8: 4413 add r3, r2 - 803eaaa: 00db lsls r3, r3, #3 - 803eaac: 440b add r3, r1 - 803eaae: 3314 adds r3, #20 - 803eab0: 2203 movs r2, #3 - 803eab2: 701a strb r2, [r3, #0] + 803eaa2: 4613 mov r3, r2 + 803eaa4: 005b lsls r3, r3, #1 + 803eaa6: 4413 add r3, r2 + 803eaa8: 00db lsls r3, r3, #3 + 803eaaa: 4a1b ldr r2, [pc, #108] ; (803eb18 ) + 803eaac: 4413 add r3, r2 + 803eaae: 1d19 adds r1, r3, #4 + 803eab0: 79fa ldrb r2, [r7, #7] + 803eab2: 4613 mov r3, r2 + 803eab4: 005b lsls r3, r3, #1 + 803eab6: 4413 add r3, r2 + 803eab8: 00db lsls r3, r3, #3 + 803eaba: 3308 adds r3, #8 + 803eabc: 4a16 ldr r2, [pc, #88] ; (803eb18 ) + 803eabe: 4413 add r3, r2 + 803eac0: 3304 adds r3, #4 + 803eac2: 461a mov r2, r3 + 803eac4: 68f8 ldr r0, [r7, #12] + 803eac6: f000 fafb bl 803f0c0 + 803eaca: 4603 mov r3, r0 + 803eacc: 2b00 cmp r3, #0 + 803eace: d109 bne.n 803eae4 + arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1; + 803ead0: 79fa ldrb r2, [r7, #7] + 803ead2: 4911 ldr r1, [pc, #68] ; (803eb18 ) + 803ead4: 4613 mov r3, r2 + 803ead6: 005b lsls r3, r3, #1 + 803ead8: 4413 add r3, r2 + 803eada: 00db lsls r3, r3, #3 + 803eadc: 440b add r3, r1 + 803eade: 3314 adds r3, #20 + 803eae0: 2203 movs r2, #3 + 803eae2: 701a strb r2, [r3, #0] } } } return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), &arp_table[arp_idx].ethaddr, ETHTYPE_IP); - 803eab4: 68fb ldr r3, [r7, #12] - 803eab6: f103 012a add.w r1, r3, #42 ; 0x2a - 803eaba: 79fa ldrb r2, [r7, #7] - 803eabc: 4613 mov r3, r2 - 803eabe: 005b lsls r3, r3, #1 - 803eac0: 4413 add r3, r2 - 803eac2: 00db lsls r3, r3, #3 - 803eac4: 3308 adds r3, #8 - 803eac6: 4a08 ldr r2, [pc, #32] ; (803eae8 ) - 803eac8: 4413 add r3, r2 - 803eaca: 3304 adds r3, #4 - 803eacc: f44f 6200 mov.w r2, #2048 ; 0x800 - 803ead0: 9200 str r2, [sp, #0] - 803ead2: 460a mov r2, r1 - 803ead4: 68b9 ldr r1, [r7, #8] - 803ead6: 68f8 ldr r0, [r7, #12] - 803ead8: f001 fe66 bl 80407a8 - 803eadc: 4603 mov r3, r0 -} - 803eade: 4618 mov r0, r3 - 803eae0: 3710 adds r7, #16 - 803eae2: 46bd mov sp, r7 - 803eae4: bd80 pop {r7, pc} - 803eae6: bf00 nop - 803eae8: 2400e9b8 .word 0x2400e9b8 - 803eaec: 080445b8 .word 0x080445b8 - 803eaf0: 08044728 .word 0x08044728 - 803eaf4: 08044630 .word 0x08044630 - -0803eaf8 : + 803eae4: 68fb ldr r3, [r7, #12] + 803eae6: f103 012a add.w r1, r3, #42 ; 0x2a + 803eaea: 79fa ldrb r2, [r7, #7] + 803eaec: 4613 mov r3, r2 + 803eaee: 005b lsls r3, r3, #1 + 803eaf0: 4413 add r3, r2 + 803eaf2: 00db lsls r3, r3, #3 + 803eaf4: 3308 adds r3, #8 + 803eaf6: 4a08 ldr r2, [pc, #32] ; (803eb18 ) + 803eaf8: 4413 add r3, r2 + 803eafa: 3304 adds r3, #4 + 803eafc: f44f 6200 mov.w r2, #2048 ; 0x800 + 803eb00: 9200 str r2, [sp, #0] + 803eb02: 460a mov r2, r1 + 803eb04: 68b9 ldr r1, [r7, #8] + 803eb06: 68f8 ldr r0, [r7, #12] + 803eb08: f001 fe66 bl 80407d8 + 803eb0c: 4603 mov r3, r0 +} + 803eb0e: 4618 mov r0, r3 + 803eb10: 3710 adds r7, #16 + 803eb12: 46bd mov sp, r7 + 803eb14: bd80 pop {r7, pc} + 803eb16: bf00 nop + 803eb18: 2400e9b8 .word 0x2400e9b8 + 803eb1c: 080445e8 .word 0x080445e8 + 803eb20: 08044758 .word 0x08044758 + 803eb24: 08044660 .word 0x08044660 + +0803eb28 : * - ERR_RTE No route to destination (no gateway to external networks), * or the return type of either etharp_query() or ethernet_output(). */ err_t etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr) { - 803eaf8: b580 push {r7, lr} - 803eafa: b08a sub sp, #40 ; 0x28 - 803eafc: af02 add r7, sp, #8 - 803eafe: 60f8 str r0, [r7, #12] - 803eb00: 60b9 str r1, [r7, #8] - 803eb02: 607a str r2, [r7, #4] + 803eb28: b580 push {r7, lr} + 803eb2a: b08a sub sp, #40 ; 0x28 + 803eb2c: af02 add r7, sp, #8 + 803eb2e: 60f8 str r0, [r7, #12] + 803eb30: 60b9 str r1, [r7, #8] + 803eb32: 607a str r2, [r7, #4] const struct eth_addr *dest; struct eth_addr mcastaddr; const ip4_addr_t *dst_addr = ipaddr; - 803eb04: 687b ldr r3, [r7, #4] - 803eb06: 61bb str r3, [r7, #24] + 803eb34: 687b ldr r3, [r7, #4] + 803eb36: 61bb str r3, [r7, #24] LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("netif != NULL", netif != NULL); - 803eb08: 68fb ldr r3, [r7, #12] - 803eb0a: 2b00 cmp r3, #0 - 803eb0c: d106 bne.n 803eb1c - 803eb0e: 4b73 ldr r3, [pc, #460] ; (803ecdc ) - 803eb10: f240 321e movw r2, #798 ; 0x31e - 803eb14: 4972 ldr r1, [pc, #456] ; (803ece0 ) - 803eb16: 4873 ldr r0, [pc, #460] ; (803ece4 ) - 803eb18: f001 ffe2 bl 8040ae0 + 803eb38: 68fb ldr r3, [r7, #12] + 803eb3a: 2b00 cmp r3, #0 + 803eb3c: d106 bne.n 803eb4c + 803eb3e: 4b73 ldr r3, [pc, #460] ; (803ed0c ) + 803eb40: f240 321e movw r2, #798 ; 0x31e + 803eb44: 4972 ldr r1, [pc, #456] ; (803ed10 ) + 803eb46: 4873 ldr r0, [pc, #460] ; (803ed14 ) + 803eb48: f001 ffe2 bl 8040b10 LWIP_ASSERT("q != NULL", q != NULL); - 803eb1c: 68bb ldr r3, [r7, #8] - 803eb1e: 2b00 cmp r3, #0 - 803eb20: d106 bne.n 803eb30 - 803eb22: 4b6e ldr r3, [pc, #440] ; (803ecdc ) - 803eb24: f240 321f movw r2, #799 ; 0x31f - 803eb28: 496f ldr r1, [pc, #444] ; (803ece8 ) - 803eb2a: 486e ldr r0, [pc, #440] ; (803ece4 ) - 803eb2c: f001 ffd8 bl 8040ae0 + 803eb4c: 68bb ldr r3, [r7, #8] + 803eb4e: 2b00 cmp r3, #0 + 803eb50: d106 bne.n 803eb60 + 803eb52: 4b6e ldr r3, [pc, #440] ; (803ed0c ) + 803eb54: f240 321f movw r2, #799 ; 0x31f + 803eb58: 496f ldr r1, [pc, #444] ; (803ed18 ) + 803eb5a: 486e ldr r0, [pc, #440] ; (803ed14 ) + 803eb5c: f001 ffd8 bl 8040b10 LWIP_ASSERT("ipaddr != NULL", ipaddr != NULL); - 803eb30: 687b ldr r3, [r7, #4] - 803eb32: 2b00 cmp r3, #0 - 803eb34: d106 bne.n 803eb44 - 803eb36: 4b69 ldr r3, [pc, #420] ; (803ecdc ) - 803eb38: f44f 7248 mov.w r2, #800 ; 0x320 - 803eb3c: 496b ldr r1, [pc, #428] ; (803ecec ) - 803eb3e: 4869 ldr r0, [pc, #420] ; (803ece4 ) - 803eb40: f001 ffce bl 8040ae0 + 803eb60: 687b ldr r3, [r7, #4] + 803eb62: 2b00 cmp r3, #0 + 803eb64: d106 bne.n 803eb74 + 803eb66: 4b69 ldr r3, [pc, #420] ; (803ed0c ) + 803eb68: f44f 7248 mov.w r2, #800 ; 0x320 + 803eb6c: 496b ldr r1, [pc, #428] ; (803ed1c ) + 803eb6e: 4869 ldr r0, [pc, #420] ; (803ed14 ) + 803eb70: f001 ffce bl 8040b10 /* Determine on destination hardware address. Broadcasts and multicasts * are special, other IP addresses are looked up in the ARP table. */ /* broadcast destination IP address? */ if (ip4_addr_isbroadcast(ipaddr, netif)) { - 803eb44: 687b ldr r3, [r7, #4] - 803eb46: 681b ldr r3, [r3, #0] - 803eb48: 68f9 ldr r1, [r7, #12] - 803eb4a: 4618 mov r0, r3 - 803eb4c: f000 ff1e bl 803f98c - 803eb50: 4603 mov r3, r0 - 803eb52: 2b00 cmp r3, #0 - 803eb54: d002 beq.n 803eb5c + 803eb74: 687b ldr r3, [r7, #4] + 803eb76: 681b ldr r3, [r3, #0] + 803eb78: 68f9 ldr r1, [r7, #12] + 803eb7a: 4618 mov r0, r3 + 803eb7c: f000 ff1e bl 803f9bc + 803eb80: 4603 mov r3, r0 + 803eb82: 2b00 cmp r3, #0 + 803eb84: d002 beq.n 803eb8c /* broadcast on Ethernet also */ dest = (const struct eth_addr *)ðbroadcast; - 803eb56: 4b66 ldr r3, [pc, #408] ; (803ecf0 ) - 803eb58: 61fb str r3, [r7, #28] - 803eb5a: e0af b.n 803ecbc + 803eb86: 4b66 ldr r3, [pc, #408] ; (803ed20 ) + 803eb88: 61fb str r3, [r7, #28] + 803eb8a: e0af b.n 803ecec /* multicast destination IP address? */ } else if (ip4_addr_ismulticast(ipaddr)) { - 803eb5c: 687b ldr r3, [r7, #4] - 803eb5e: 681b ldr r3, [r3, #0] - 803eb60: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 803eb64: 2be0 cmp r3, #224 ; 0xe0 - 803eb66: d118 bne.n 803eb9a + 803eb8c: 687b ldr r3, [r7, #4] + 803eb8e: 681b ldr r3, [r3, #0] + 803eb90: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803eb94: 2be0 cmp r3, #224 ; 0xe0 + 803eb96: d118 bne.n 803ebca /* Hash IP multicast address to MAC address.*/ mcastaddr.addr[0] = LL_IP4_MULTICAST_ADDR_0; - 803eb68: 2301 movs r3, #1 - 803eb6a: 743b strb r3, [r7, #16] + 803eb98: 2301 movs r3, #1 + 803eb9a: 743b strb r3, [r7, #16] mcastaddr.addr[1] = LL_IP4_MULTICAST_ADDR_1; - 803eb6c: 2300 movs r3, #0 - 803eb6e: 747b strb r3, [r7, #17] + 803eb9c: 2300 movs r3, #0 + 803eb9e: 747b strb r3, [r7, #17] mcastaddr.addr[2] = LL_IP4_MULTICAST_ADDR_2; - 803eb70: 235e movs r3, #94 ; 0x5e - 803eb72: 74bb strb r3, [r7, #18] + 803eba0: 235e movs r3, #94 ; 0x5e + 803eba2: 74bb strb r3, [r7, #18] mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f; - 803eb74: 687b ldr r3, [r7, #4] - 803eb76: 3301 adds r3, #1 - 803eb78: 781b ldrb r3, [r3, #0] - 803eb7a: f003 037f and.w r3, r3, #127 ; 0x7f - 803eb7e: b2db uxtb r3, r3 - 803eb80: 74fb strb r3, [r7, #19] + 803eba4: 687b ldr r3, [r7, #4] + 803eba6: 3301 adds r3, #1 + 803eba8: 781b ldrb r3, [r3, #0] + 803ebaa: f003 037f and.w r3, r3, #127 ; 0x7f + 803ebae: b2db uxtb r3, r3 + 803ebb0: 74fb strb r3, [r7, #19] mcastaddr.addr[4] = ip4_addr3(ipaddr); - 803eb82: 687b ldr r3, [r7, #4] - 803eb84: 3302 adds r3, #2 - 803eb86: 781b ldrb r3, [r3, #0] - 803eb88: 753b strb r3, [r7, #20] + 803ebb2: 687b ldr r3, [r7, #4] + 803ebb4: 3302 adds r3, #2 + 803ebb6: 781b ldrb r3, [r3, #0] + 803ebb8: 753b strb r3, [r7, #20] mcastaddr.addr[5] = ip4_addr4(ipaddr); - 803eb8a: 687b ldr r3, [r7, #4] - 803eb8c: 3303 adds r3, #3 - 803eb8e: 781b ldrb r3, [r3, #0] - 803eb90: 757b strb r3, [r7, #21] + 803ebba: 687b ldr r3, [r7, #4] + 803ebbc: 3303 adds r3, #3 + 803ebbe: 781b ldrb r3, [r3, #0] + 803ebc0: 757b strb r3, [r7, #21] /* destination Ethernet address is multicast */ dest = &mcastaddr; - 803eb92: f107 0310 add.w r3, r7, #16 - 803eb96: 61fb str r3, [r7, #28] - 803eb98: e090 b.n 803ecbc + 803ebc2: f107 0310 add.w r3, r7, #16 + 803ebc6: 61fb str r3, [r7, #28] + 803ebc8: e090 b.n 803ecec /* unicast destination IP address? */ } else { netif_addr_idx_t i; /* outside local network? if so, this can neither be a global broadcast nor a subnet broadcast. */ if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) && - 803eb9a: 687b ldr r3, [r7, #4] - 803eb9c: 681a ldr r2, [r3, #0] - 803eb9e: 68fb ldr r3, [r7, #12] - 803eba0: 3304 adds r3, #4 - 803eba2: 681b ldr r3, [r3, #0] - 803eba4: 405a eors r2, r3 - 803eba6: 68fb ldr r3, [r7, #12] - 803eba8: 3308 adds r3, #8 - 803ebaa: 681b ldr r3, [r3, #0] - 803ebac: 4013 ands r3, r2 - 803ebae: 2b00 cmp r3, #0 - 803ebb0: d012 beq.n 803ebd8 + 803ebca: 687b ldr r3, [r7, #4] + 803ebcc: 681a ldr r2, [r3, #0] + 803ebce: 68fb ldr r3, [r7, #12] + 803ebd0: 3304 adds r3, #4 + 803ebd2: 681b ldr r3, [r3, #0] + 803ebd4: 405a eors r2, r3 + 803ebd6: 68fb ldr r3, [r7, #12] + 803ebd8: 3308 adds r3, #8 + 803ebda: 681b ldr r3, [r3, #0] + 803ebdc: 4013 ands r3, r2 + 803ebde: 2b00 cmp r3, #0 + 803ebe0: d012 beq.n 803ec08 !ip4_addr_islinklocal(ipaddr)) { - 803ebb2: 687b ldr r3, [r7, #4] - 803ebb4: 681b ldr r3, [r3, #0] - 803ebb6: b29b uxth r3, r3 + 803ebe2: 687b ldr r3, [r7, #4] + 803ebe4: 681b ldr r3, [r3, #0] + 803ebe6: b29b uxth r3, r3 if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) && - 803ebb8: f64f 62a9 movw r2, #65193 ; 0xfea9 - 803ebbc: 4293 cmp r3, r2 - 803ebbe: d00b beq.n 803ebd8 + 803ebe8: f64f 62a9 movw r2, #65193 ; 0xfea9 + 803ebec: 4293 cmp r3, r2 + 803ebee: d00b beq.n 803ec08 dst_addr = LWIP_HOOK_ETHARP_GET_GW(netif, ipaddr); if (dst_addr == NULL) #endif /* LWIP_HOOK_ETHARP_GET_GW */ { /* interface has default gateway? */ if (!ip4_addr_isany_val(*netif_ip4_gw(netif))) { - 803ebc0: 68fb ldr r3, [r7, #12] - 803ebc2: 330c adds r3, #12 - 803ebc4: 681b ldr r3, [r3, #0] - 803ebc6: 2b00 cmp r3, #0 - 803ebc8: d003 beq.n 803ebd2 + 803ebf0: 68fb ldr r3, [r7, #12] + 803ebf2: 330c adds r3, #12 + 803ebf4: 681b ldr r3, [r3, #0] + 803ebf6: 2b00 cmp r3, #0 + 803ebf8: d003 beq.n 803ec02 /* send to hardware address of default gateway IP address */ dst_addr = netif_ip4_gw(netif); - 803ebca: 68fb ldr r3, [r7, #12] - 803ebcc: 330c adds r3, #12 - 803ebce: 61bb str r3, [r7, #24] - 803ebd0: e002 b.n 803ebd8 + 803ebfa: 68fb ldr r3, [r7, #12] + 803ebfc: 330c adds r3, #12 + 803ebfe: 61bb str r3, [r7, #24] + 803ec00: e002 b.n 803ec08 /* no default gateway available */ } else { /* no route to destination error (default gateway missing) */ return ERR_RTE; - 803ebd2: f06f 0303 mvn.w r3, #3 - 803ebd6: e07d b.n 803ecd4 + 803ec02: f06f 0303 mvn.w r3, #3 + 803ec06: e07d b.n 803ed04 if (netif->hints != NULL) { /* per-pcb cached entry was given */ netif_addr_idx_t etharp_cached_entry = netif->hints->addr_hint; if (etharp_cached_entry < ARP_TABLE_SIZE) { #endif /* LWIP_NETIF_HWADDRHINT */ if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) && - 803ebd8: 4b46 ldr r3, [pc, #280] ; (803ecf4 ) - 803ebda: 781b ldrb r3, [r3, #0] - 803ebdc: 4619 mov r1, r3 - 803ebde: 4a46 ldr r2, [pc, #280] ; (803ecf8 ) - 803ebe0: 460b mov r3, r1 - 803ebe2: 005b lsls r3, r3, #1 - 803ebe4: 440b add r3, r1 - 803ebe6: 00db lsls r3, r3, #3 - 803ebe8: 4413 add r3, r2 - 803ebea: 3314 adds r3, #20 - 803ebec: 781b ldrb r3, [r3, #0] - 803ebee: 2b01 cmp r3, #1 - 803ebf0: d925 bls.n 803ec3e + 803ec08: 4b46 ldr r3, [pc, #280] ; (803ed24 ) + 803ec0a: 781b ldrb r3, [r3, #0] + 803ec0c: 4619 mov r1, r3 + 803ec0e: 4a46 ldr r2, [pc, #280] ; (803ed28 ) + 803ec10: 460b mov r3, r1 + 803ec12: 005b lsls r3, r3, #1 + 803ec14: 440b add r3, r1 + 803ec16: 00db lsls r3, r3, #3 + 803ec18: 4413 add r3, r2 + 803ec1a: 3314 adds r3, #20 + 803ec1c: 781b ldrb r3, [r3, #0] + 803ec1e: 2b01 cmp r3, #1 + 803ec20: d925 bls.n 803ec6e #if ETHARP_TABLE_MATCH_NETIF (arp_table[etharp_cached_entry].netif == netif) && - 803ebf2: 4b40 ldr r3, [pc, #256] ; (803ecf4 ) - 803ebf4: 781b ldrb r3, [r3, #0] - 803ebf6: 4619 mov r1, r3 - 803ebf8: 4a3f ldr r2, [pc, #252] ; (803ecf8 ) - 803ebfa: 460b mov r3, r1 - 803ebfc: 005b lsls r3, r3, #1 - 803ebfe: 440b add r3, r1 - 803ec00: 00db lsls r3, r3, #3 - 803ec02: 4413 add r3, r2 - 803ec04: 3308 adds r3, #8 - 803ec06: 681b ldr r3, [r3, #0] + 803ec22: 4b40 ldr r3, [pc, #256] ; (803ed24 ) + 803ec24: 781b ldrb r3, [r3, #0] + 803ec26: 4619 mov r1, r3 + 803ec28: 4a3f ldr r2, [pc, #252] ; (803ed28 ) + 803ec2a: 460b mov r3, r1 + 803ec2c: 005b lsls r3, r3, #1 + 803ec2e: 440b add r3, r1 + 803ec30: 00db lsls r3, r3, #3 + 803ec32: 4413 add r3, r2 + 803ec34: 3308 adds r3, #8 + 803ec36: 681b ldr r3, [r3, #0] if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) && - 803ec08: 68fa ldr r2, [r7, #12] - 803ec0a: 429a cmp r2, r3 - 803ec0c: d117 bne.n 803ec3e + 803ec38: 68fa ldr r2, [r7, #12] + 803ec3a: 429a cmp r2, r3 + 803ec3c: d117 bne.n 803ec6e #endif (ip4_addr_cmp(dst_addr, &arp_table[etharp_cached_entry].ipaddr))) { - 803ec0e: 69bb ldr r3, [r7, #24] - 803ec10: 681a ldr r2, [r3, #0] - 803ec12: 4b38 ldr r3, [pc, #224] ; (803ecf4 ) - 803ec14: 781b ldrb r3, [r3, #0] - 803ec16: 4618 mov r0, r3 - 803ec18: 4937 ldr r1, [pc, #220] ; (803ecf8 ) - 803ec1a: 4603 mov r3, r0 - 803ec1c: 005b lsls r3, r3, #1 - 803ec1e: 4403 add r3, r0 - 803ec20: 00db lsls r3, r3, #3 - 803ec22: 440b add r3, r1 - 803ec24: 3304 adds r3, #4 - 803ec26: 681b ldr r3, [r3, #0] + 803ec3e: 69bb ldr r3, [r7, #24] + 803ec40: 681a ldr r2, [r3, #0] + 803ec42: 4b38 ldr r3, [pc, #224] ; (803ed24 ) + 803ec44: 781b ldrb r3, [r3, #0] + 803ec46: 4618 mov r0, r3 + 803ec48: 4937 ldr r1, [pc, #220] ; (803ed28 ) + 803ec4a: 4603 mov r3, r0 + 803ec4c: 005b lsls r3, r3, #1 + 803ec4e: 4403 add r3, r0 + 803ec50: 00db lsls r3, r3, #3 + 803ec52: 440b add r3, r1 + 803ec54: 3304 adds r3, #4 + 803ec56: 681b ldr r3, [r3, #0] (arp_table[etharp_cached_entry].netif == netif) && - 803ec28: 429a cmp r2, r3 - 803ec2a: d108 bne.n 803ec3e + 803ec58: 429a cmp r2, r3 + 803ec5a: d108 bne.n 803ec6e /* the per-pcb-cached entry is stable and the right one! */ ETHARP_STATS_INC(etharp.cachehit); return etharp_output_to_arp_index(netif, q, etharp_cached_entry); - 803ec2c: 4b31 ldr r3, [pc, #196] ; (803ecf4 ) - 803ec2e: 781b ldrb r3, [r3, #0] - 803ec30: 461a mov r2, r3 - 803ec32: 68b9 ldr r1, [r7, #8] - 803ec34: 68f8 ldr r0, [r7, #12] - 803ec36: f7ff fec5 bl 803e9c4 - 803ec3a: 4603 mov r3, r0 - 803ec3c: e04a b.n 803ecd4 + 803ec5c: 4b31 ldr r3, [pc, #196] ; (803ed24 ) + 803ec5e: 781b ldrb r3, [r3, #0] + 803ec60: 461a mov r2, r3 + 803ec62: 68b9 ldr r1, [r7, #8] + 803ec64: 68f8 ldr r0, [r7, #12] + 803ec66: f7ff fec5 bl 803e9f4 + 803ec6a: 4603 mov r3, r0 + 803ec6c: e04a b.n 803ed04 } #endif /* LWIP_NETIF_HWADDRHINT */ /* find stable entry: do this here since this is a critical path for throughput and etharp_find_entry() is kind of slow */ for (i = 0; i < ARP_TABLE_SIZE; i++) { - 803ec3e: 2300 movs r3, #0 - 803ec40: 75fb strb r3, [r7, #23] - 803ec42: e031 b.n 803eca8 + 803ec6e: 2300 movs r3, #0 + 803ec70: 75fb strb r3, [r7, #23] + 803ec72: e031 b.n 803ecd8 if ((arp_table[i].state >= ETHARP_STATE_STABLE) && - 803ec44: 7dfa ldrb r2, [r7, #23] - 803ec46: 492c ldr r1, [pc, #176] ; (803ecf8 ) - 803ec48: 4613 mov r3, r2 - 803ec4a: 005b lsls r3, r3, #1 - 803ec4c: 4413 add r3, r2 - 803ec4e: 00db lsls r3, r3, #3 - 803ec50: 440b add r3, r1 - 803ec52: 3314 adds r3, #20 - 803ec54: 781b ldrb r3, [r3, #0] - 803ec56: 2b01 cmp r3, #1 - 803ec58: d923 bls.n 803eca2 + 803ec74: 7dfa ldrb r2, [r7, #23] + 803ec76: 492c ldr r1, [pc, #176] ; (803ed28 ) + 803ec78: 4613 mov r3, r2 + 803ec7a: 005b lsls r3, r3, #1 + 803ec7c: 4413 add r3, r2 + 803ec7e: 00db lsls r3, r3, #3 + 803ec80: 440b add r3, r1 + 803ec82: 3314 adds r3, #20 + 803ec84: 781b ldrb r3, [r3, #0] + 803ec86: 2b01 cmp r3, #1 + 803ec88: d923 bls.n 803ecd2 #if ETHARP_TABLE_MATCH_NETIF (arp_table[i].netif == netif) && - 803ec5a: 7dfa ldrb r2, [r7, #23] - 803ec5c: 4926 ldr r1, [pc, #152] ; (803ecf8 ) - 803ec5e: 4613 mov r3, r2 - 803ec60: 005b lsls r3, r3, #1 - 803ec62: 4413 add r3, r2 - 803ec64: 00db lsls r3, r3, #3 - 803ec66: 440b add r3, r1 - 803ec68: 3308 adds r3, #8 - 803ec6a: 681b ldr r3, [r3, #0] + 803ec8a: 7dfa ldrb r2, [r7, #23] + 803ec8c: 4926 ldr r1, [pc, #152] ; (803ed28 ) + 803ec8e: 4613 mov r3, r2 + 803ec90: 005b lsls r3, r3, #1 + 803ec92: 4413 add r3, r2 + 803ec94: 00db lsls r3, r3, #3 + 803ec96: 440b add r3, r1 + 803ec98: 3308 adds r3, #8 + 803ec9a: 681b ldr r3, [r3, #0] if ((arp_table[i].state >= ETHARP_STATE_STABLE) && - 803ec6c: 68fa ldr r2, [r7, #12] - 803ec6e: 429a cmp r2, r3 - 803ec70: d117 bne.n 803eca2 + 803ec9c: 68fa ldr r2, [r7, #12] + 803ec9e: 429a cmp r2, r3 + 803eca0: d117 bne.n 803ecd2 #endif (ip4_addr_cmp(dst_addr, &arp_table[i].ipaddr))) { - 803ec72: 69bb ldr r3, [r7, #24] - 803ec74: 6819 ldr r1, [r3, #0] - 803ec76: 7dfa ldrb r2, [r7, #23] - 803ec78: 481f ldr r0, [pc, #124] ; (803ecf8 ) - 803ec7a: 4613 mov r3, r2 - 803ec7c: 005b lsls r3, r3, #1 - 803ec7e: 4413 add r3, r2 - 803ec80: 00db lsls r3, r3, #3 - 803ec82: 4403 add r3, r0 - 803ec84: 3304 adds r3, #4 - 803ec86: 681b ldr r3, [r3, #0] + 803eca2: 69bb ldr r3, [r7, #24] + 803eca4: 6819 ldr r1, [r3, #0] + 803eca6: 7dfa ldrb r2, [r7, #23] + 803eca8: 481f ldr r0, [pc, #124] ; (803ed28 ) + 803ecaa: 4613 mov r3, r2 + 803ecac: 005b lsls r3, r3, #1 + 803ecae: 4413 add r3, r2 + 803ecb0: 00db lsls r3, r3, #3 + 803ecb2: 4403 add r3, r0 + 803ecb4: 3304 adds r3, #4 + 803ecb6: 681b ldr r3, [r3, #0] (arp_table[i].netif == netif) && - 803ec88: 4299 cmp r1, r3 - 803ec8a: d10a bne.n 803eca2 + 803ecb8: 4299 cmp r1, r3 + 803ecba: d10a bne.n 803ecd2 /* found an existing, stable entry */ ETHARP_SET_ADDRHINT(netif, i); - 803ec8c: 4a19 ldr r2, [pc, #100] ; (803ecf4 ) - 803ec8e: 7dfb ldrb r3, [r7, #23] - 803ec90: 7013 strb r3, [r2, #0] + 803ecbc: 4a19 ldr r2, [pc, #100] ; (803ed24 ) + 803ecbe: 7dfb ldrb r3, [r7, #23] + 803ecc0: 7013 strb r3, [r2, #0] return etharp_output_to_arp_index(netif, q, i); - 803ec92: 7dfb ldrb r3, [r7, #23] - 803ec94: 461a mov r2, r3 - 803ec96: 68b9 ldr r1, [r7, #8] - 803ec98: 68f8 ldr r0, [r7, #12] - 803ec9a: f7ff fe93 bl 803e9c4 - 803ec9e: 4603 mov r3, r0 - 803eca0: e018 b.n 803ecd4 + 803ecc2: 7dfb ldrb r3, [r7, #23] + 803ecc4: 461a mov r2, r3 + 803ecc6: 68b9 ldr r1, [r7, #8] + 803ecc8: 68f8 ldr r0, [r7, #12] + 803ecca: f7ff fe93 bl 803e9f4 + 803ecce: 4603 mov r3, r0 + 803ecd0: e018 b.n 803ed04 for (i = 0; i < ARP_TABLE_SIZE; i++) { - 803eca2: 7dfb ldrb r3, [r7, #23] - 803eca4: 3301 adds r3, #1 - 803eca6: 75fb strb r3, [r7, #23] - 803eca8: 7dfb ldrb r3, [r7, #23] - 803ecaa: 2b09 cmp r3, #9 - 803ecac: d9ca bls.n 803ec44 + 803ecd2: 7dfb ldrb r3, [r7, #23] + 803ecd4: 3301 adds r3, #1 + 803ecd6: 75fb strb r3, [r7, #23] + 803ecd8: 7dfb ldrb r3, [r7, #23] + 803ecda: 2b09 cmp r3, #9 + 803ecdc: d9ca bls.n 803ec74 } } /* no stable entry found, use the (slower) query function: queue on destination Ethernet address belonging to ipaddr */ return etharp_query(netif, dst_addr, q); - 803ecae: 68ba ldr r2, [r7, #8] - 803ecb0: 69b9 ldr r1, [r7, #24] - 803ecb2: 68f8 ldr r0, [r7, #12] - 803ecb4: f000 f822 bl 803ecfc - 803ecb8: 4603 mov r3, r0 - 803ecba: e00b b.n 803ecd4 + 803ecde: 68ba ldr r2, [r7, #8] + 803ece0: 69b9 ldr r1, [r7, #24] + 803ece2: 68f8 ldr r0, [r7, #12] + 803ece4: f000 f822 bl 803ed2c + 803ece8: 4603 mov r3, r0 + 803ecea: e00b b.n 803ed04 } /* continuation for multicast/broadcast destinations */ /* obtain source Ethernet address of the given interface */ /* send packet directly on the link */ return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), dest, ETHTYPE_IP); - 803ecbc: 68fb ldr r3, [r7, #12] - 803ecbe: f103 022a add.w r2, r3, #42 ; 0x2a - 803ecc2: f44f 6300 mov.w r3, #2048 ; 0x800 - 803ecc6: 9300 str r3, [sp, #0] - 803ecc8: 69fb ldr r3, [r7, #28] - 803ecca: 68b9 ldr r1, [r7, #8] - 803eccc: 68f8 ldr r0, [r7, #12] - 803ecce: f001 fd6b bl 80407a8 - 803ecd2: 4603 mov r3, r0 -} - 803ecd4: 4618 mov r0, r3 - 803ecd6: 3720 adds r7, #32 - 803ecd8: 46bd mov sp, r7 - 803ecda: bd80 pop {r7, pc} - 803ecdc: 080445b8 .word 0x080445b8 - 803ece0: 08044708 .word 0x08044708 - 803ece4: 08044630 .word 0x08044630 - 803ece8: 08044758 .word 0x08044758 - 803ecec: 080446f8 .word 0x080446f8 - 803ecf0: 08044dd4 .word 0x08044dd4 - 803ecf4: 2400eaa8 .word 0x2400eaa8 - 803ecf8: 2400e9b8 .word 0x2400e9b8 - -0803ecfc : + 803ecec: 68fb ldr r3, [r7, #12] + 803ecee: f103 022a add.w r2, r3, #42 ; 0x2a + 803ecf2: f44f 6300 mov.w r3, #2048 ; 0x800 + 803ecf6: 9300 str r3, [sp, #0] + 803ecf8: 69fb ldr r3, [r7, #28] + 803ecfa: 68b9 ldr r1, [r7, #8] + 803ecfc: 68f8 ldr r0, [r7, #12] + 803ecfe: f001 fd6b bl 80407d8 + 803ed02: 4603 mov r3, r0 +} + 803ed04: 4618 mov r0, r3 + 803ed06: 3720 adds r7, #32 + 803ed08: 46bd mov sp, r7 + 803ed0a: bd80 pop {r7, pc} + 803ed0c: 080445e8 .word 0x080445e8 + 803ed10: 08044738 .word 0x08044738 + 803ed14: 08044660 .word 0x08044660 + 803ed18: 08044788 .word 0x08044788 + 803ed1c: 08044728 .word 0x08044728 + 803ed20: 08044e04 .word 0x08044e04 + 803ed24: 2400eaa8 .word 0x2400eaa8 + 803ed28: 2400e9b8 .word 0x2400e9b8 + +0803ed2c : * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. * */ err_t etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q) { - 803ecfc: b580 push {r7, lr} - 803ecfe: b08c sub sp, #48 ; 0x30 - 803ed00: af02 add r7, sp, #8 - 803ed02: 60f8 str r0, [r7, #12] - 803ed04: 60b9 str r1, [r7, #8] - 803ed06: 607a str r2, [r7, #4] + 803ed2c: b580 push {r7, lr} + 803ed2e: b08c sub sp, #48 ; 0x30 + 803ed30: af02 add r7, sp, #8 + 803ed32: 60f8 str r0, [r7, #12] + 803ed34: 60b9 str r1, [r7, #8] + 803ed36: 607a str r2, [r7, #4] struct eth_addr *srcaddr = (struct eth_addr *)netif->hwaddr; - 803ed08: 68fb ldr r3, [r7, #12] - 803ed0a: 332a adds r3, #42 ; 0x2a - 803ed0c: 617b str r3, [r7, #20] + 803ed38: 68fb ldr r3, [r7, #12] + 803ed3a: 332a adds r3, #42 ; 0x2a + 803ed3c: 617b str r3, [r7, #20] err_t result = ERR_MEM; - 803ed0e: 23ff movs r3, #255 ; 0xff - 803ed10: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803ed3e: 23ff movs r3, #255 ; 0xff + 803ed40: f887 3027 strb.w r3, [r7, #39] ; 0x27 int is_new_entry = 0; - 803ed14: 2300 movs r3, #0 - 803ed16: 623b str r3, [r7, #32] + 803ed44: 2300 movs r3, #0 + 803ed46: 623b str r3, [r7, #32] s16_t i_err; netif_addr_idx_t i; /* non-unicast address? */ if (ip4_addr_isbroadcast(ipaddr, netif) || - 803ed18: 68bb ldr r3, [r7, #8] - 803ed1a: 681b ldr r3, [r3, #0] - 803ed1c: 68f9 ldr r1, [r7, #12] - 803ed1e: 4618 mov r0, r3 - 803ed20: f000 fe34 bl 803f98c - 803ed24: 4603 mov r3, r0 - 803ed26: 2b00 cmp r3, #0 - 803ed28: d10c bne.n 803ed44 + 803ed48: 68bb ldr r3, [r7, #8] + 803ed4a: 681b ldr r3, [r3, #0] + 803ed4c: 68f9 ldr r1, [r7, #12] + 803ed4e: 4618 mov r0, r3 + 803ed50: f000 fe34 bl 803f9bc + 803ed54: 4603 mov r3, r0 + 803ed56: 2b00 cmp r3, #0 + 803ed58: d10c bne.n 803ed74 ip4_addr_ismulticast(ipaddr) || - 803ed2a: 68bb ldr r3, [r7, #8] - 803ed2c: 681b ldr r3, [r3, #0] - 803ed2e: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803ed5a: 68bb ldr r3, [r7, #8] + 803ed5c: 681b ldr r3, [r3, #0] + 803ed5e: f003 03f0 and.w r3, r3, #240 ; 0xf0 if (ip4_addr_isbroadcast(ipaddr, netif) || - 803ed32: 2be0 cmp r3, #224 ; 0xe0 - 803ed34: d006 beq.n 803ed44 + 803ed62: 2be0 cmp r3, #224 ; 0xe0 + 803ed64: d006 beq.n 803ed74 ip4_addr_ismulticast(ipaddr) || - 803ed36: 68bb ldr r3, [r7, #8] - 803ed38: 2b00 cmp r3, #0 - 803ed3a: d003 beq.n 803ed44 + 803ed66: 68bb ldr r3, [r7, #8] + 803ed68: 2b00 cmp r3, #0 + 803ed6a: d003 beq.n 803ed74 ip4_addr_isany(ipaddr)) { - 803ed3c: 68bb ldr r3, [r7, #8] - 803ed3e: 681b ldr r3, [r3, #0] - 803ed40: 2b00 cmp r3, #0 - 803ed42: d102 bne.n 803ed4a + 803ed6c: 68bb ldr r3, [r7, #8] + 803ed6e: 681b ldr r3, [r3, #0] + 803ed70: 2b00 cmp r3, #0 + 803ed72: d102 bne.n 803ed7a LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n")); return ERR_ARG; - 803ed44: f06f 030f mvn.w r3, #15 - 803ed48: e101 b.n 803ef4e + 803ed74: f06f 030f mvn.w r3, #15 + 803ed78: e101 b.n 803ef7e } /* find entry in ARP cache, ask to create entry if queueing packet */ i_err = etharp_find_entry(ipaddr, ETHARP_FLAG_TRY_HARD, netif); - 803ed4a: 68fa ldr r2, [r7, #12] - 803ed4c: 2101 movs r1, #1 - 803ed4e: 68b8 ldr r0, [r7, #8] - 803ed50: f7ff fb60 bl 803e414 - 803ed54: 4603 mov r3, r0 - 803ed56: 827b strh r3, [r7, #18] + 803ed7a: 68fa ldr r2, [r7, #12] + 803ed7c: 2101 movs r1, #1 + 803ed7e: 68b8 ldr r0, [r7, #8] + 803ed80: f7ff fb60 bl 803e444 + 803ed84: 4603 mov r3, r0 + 803ed86: 827b strh r3, [r7, #18] /* could not find or create entry? */ if (i_err < 0) { - 803ed58: f9b7 3012 ldrsh.w r3, [r7, #18] - 803ed5c: 2b00 cmp r3, #0 - 803ed5e: da02 bge.n 803ed66 + 803ed88: f9b7 3012 ldrsh.w r3, [r7, #18] + 803ed8c: 2b00 cmp r3, #0 + 803ed8e: da02 bge.n 803ed96 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n")); if (q) { LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n")); ETHARP_STATS_INC(etharp.memerr); } return (err_t)i_err; - 803ed60: 8a7b ldrh r3, [r7, #18] - 803ed62: b25b sxtb r3, r3 - 803ed64: e0f3 b.n 803ef4e + 803ed90: 8a7b ldrh r3, [r7, #18] + 803ed92: b25b sxtb r3, r3 + 803ed94: e0f3 b.n 803ef7e } LWIP_ASSERT("type overflow", (size_t)i_err < NETIF_ADDR_IDX_MAX); - 803ed66: 8a7b ldrh r3, [r7, #18] - 803ed68: 2b7e cmp r3, #126 ; 0x7e - 803ed6a: d906 bls.n 803ed7a - 803ed6c: 4b7a ldr r3, [pc, #488] ; (803ef58 ) - 803ed6e: f240 32c1 movw r2, #961 ; 0x3c1 - 803ed72: 497a ldr r1, [pc, #488] ; (803ef5c ) - 803ed74: 487a ldr r0, [pc, #488] ; (803ef60 ) - 803ed76: f001 feb3 bl 8040ae0 + 803ed96: 8a7b ldrh r3, [r7, #18] + 803ed98: 2b7e cmp r3, #126 ; 0x7e + 803ed9a: d906 bls.n 803edaa + 803ed9c: 4b7a ldr r3, [pc, #488] ; (803ef88 ) + 803ed9e: f240 32c1 movw r2, #961 ; 0x3c1 + 803eda2: 497a ldr r1, [pc, #488] ; (803ef8c ) + 803eda4: 487a ldr r0, [pc, #488] ; (803ef90 ) + 803eda6: f001 feb3 bl 8040b10 i = (netif_addr_idx_t)i_err; - 803ed7a: 8a7b ldrh r3, [r7, #18] - 803ed7c: 747b strb r3, [r7, #17] + 803edaa: 8a7b ldrh r3, [r7, #18] + 803edac: 747b strb r3, [r7, #17] /* mark a fresh entry as pending (we just sent a request) */ if (arp_table[i].state == ETHARP_STATE_EMPTY) { - 803ed7e: 7c7a ldrb r2, [r7, #17] - 803ed80: 4978 ldr r1, [pc, #480] ; (803ef64 ) - 803ed82: 4613 mov r3, r2 - 803ed84: 005b lsls r3, r3, #1 - 803ed86: 4413 add r3, r2 - 803ed88: 00db lsls r3, r3, #3 - 803ed8a: 440b add r3, r1 - 803ed8c: 3314 adds r3, #20 - 803ed8e: 781b ldrb r3, [r3, #0] - 803ed90: 2b00 cmp r3, #0 - 803ed92: d115 bne.n 803edc0 + 803edae: 7c7a ldrb r2, [r7, #17] + 803edb0: 4978 ldr r1, [pc, #480] ; (803ef94 ) + 803edb2: 4613 mov r3, r2 + 803edb4: 005b lsls r3, r3, #1 + 803edb6: 4413 add r3, r2 + 803edb8: 00db lsls r3, r3, #3 + 803edba: 440b add r3, r1 + 803edbc: 3314 adds r3, #20 + 803edbe: 781b ldrb r3, [r3, #0] + 803edc0: 2b00 cmp r3, #0 + 803edc2: d115 bne.n 803edf0 is_new_entry = 1; - 803ed94: 2301 movs r3, #1 - 803ed96: 623b str r3, [r7, #32] + 803edc4: 2301 movs r3, #1 + 803edc6: 623b str r3, [r7, #32] arp_table[i].state = ETHARP_STATE_PENDING; - 803ed98: 7c7a ldrb r2, [r7, #17] - 803ed9a: 4972 ldr r1, [pc, #456] ; (803ef64 ) - 803ed9c: 4613 mov r3, r2 - 803ed9e: 005b lsls r3, r3, #1 - 803eda0: 4413 add r3, r2 - 803eda2: 00db lsls r3, r3, #3 - 803eda4: 440b add r3, r1 - 803eda6: 3314 adds r3, #20 - 803eda8: 2201 movs r2, #1 - 803edaa: 701a strb r2, [r3, #0] + 803edc8: 7c7a ldrb r2, [r7, #17] + 803edca: 4972 ldr r1, [pc, #456] ; (803ef94 ) + 803edcc: 4613 mov r3, r2 + 803edce: 005b lsls r3, r3, #1 + 803edd0: 4413 add r3, r2 + 803edd2: 00db lsls r3, r3, #3 + 803edd4: 440b add r3, r1 + 803edd6: 3314 adds r3, #20 + 803edd8: 2201 movs r2, #1 + 803edda: 701a strb r2, [r3, #0] /* record network interface for re-sending arp request in etharp_tmr */ arp_table[i].netif = netif; - 803edac: 7c7a ldrb r2, [r7, #17] - 803edae: 496d ldr r1, [pc, #436] ; (803ef64 ) - 803edb0: 4613 mov r3, r2 - 803edb2: 005b lsls r3, r3, #1 - 803edb4: 4413 add r3, r2 - 803edb6: 00db lsls r3, r3, #3 - 803edb8: 440b add r3, r1 - 803edba: 3308 adds r3, #8 - 803edbc: 68fa ldr r2, [r7, #12] - 803edbe: 601a str r2, [r3, #0] + 803eddc: 7c7a ldrb r2, [r7, #17] + 803edde: 496d ldr r1, [pc, #436] ; (803ef94 ) + 803ede0: 4613 mov r3, r2 + 803ede2: 005b lsls r3, r3, #1 + 803ede4: 4413 add r3, r2 + 803ede6: 00db lsls r3, r3, #3 + 803ede8: 440b add r3, r1 + 803edea: 3308 adds r3, #8 + 803edec: 68fa ldr r2, [r7, #12] + 803edee: 601a str r2, [r3, #0] } /* { i is either a STABLE or (new or existing) PENDING entry } */ LWIP_ASSERT("arp_table[i].state == PENDING or STABLE", - 803edc0: 7c7a ldrb r2, [r7, #17] - 803edc2: 4968 ldr r1, [pc, #416] ; (803ef64 ) - 803edc4: 4613 mov r3, r2 - 803edc6: 005b lsls r3, r3, #1 - 803edc8: 4413 add r3, r2 - 803edca: 00db lsls r3, r3, #3 - 803edcc: 440b add r3, r1 - 803edce: 3314 adds r3, #20 - 803edd0: 781b ldrb r3, [r3, #0] - 803edd2: 2b01 cmp r3, #1 - 803edd4: d011 beq.n 803edfa - 803edd6: 7c7a ldrb r2, [r7, #17] - 803edd8: 4962 ldr r1, [pc, #392] ; (803ef64 ) - 803edda: 4613 mov r3, r2 - 803eddc: 005b lsls r3, r3, #1 - 803edde: 4413 add r3, r2 - 803ede0: 00db lsls r3, r3, #3 - 803ede2: 440b add r3, r1 - 803ede4: 3314 adds r3, #20 - 803ede6: 781b ldrb r3, [r3, #0] - 803ede8: 2b01 cmp r3, #1 - 803edea: d806 bhi.n 803edfa - 803edec: 4b5a ldr r3, [pc, #360] ; (803ef58 ) - 803edee: f240 32cd movw r2, #973 ; 0x3cd - 803edf2: 495d ldr r1, [pc, #372] ; (803ef68 ) - 803edf4: 485a ldr r0, [pc, #360] ; (803ef60 ) - 803edf6: f001 fe73 bl 8040ae0 + 803edf0: 7c7a ldrb r2, [r7, #17] + 803edf2: 4968 ldr r1, [pc, #416] ; (803ef94 ) + 803edf4: 4613 mov r3, r2 + 803edf6: 005b lsls r3, r3, #1 + 803edf8: 4413 add r3, r2 + 803edfa: 00db lsls r3, r3, #3 + 803edfc: 440b add r3, r1 + 803edfe: 3314 adds r3, #20 + 803ee00: 781b ldrb r3, [r3, #0] + 803ee02: 2b01 cmp r3, #1 + 803ee04: d011 beq.n 803ee2a + 803ee06: 7c7a ldrb r2, [r7, #17] + 803ee08: 4962 ldr r1, [pc, #392] ; (803ef94 ) + 803ee0a: 4613 mov r3, r2 + 803ee0c: 005b lsls r3, r3, #1 + 803ee0e: 4413 add r3, r2 + 803ee10: 00db lsls r3, r3, #3 + 803ee12: 440b add r3, r1 + 803ee14: 3314 adds r3, #20 + 803ee16: 781b ldrb r3, [r3, #0] + 803ee18: 2b01 cmp r3, #1 + 803ee1a: d806 bhi.n 803ee2a + 803ee1c: 4b5a ldr r3, [pc, #360] ; (803ef88 ) + 803ee1e: f240 32cd movw r2, #973 ; 0x3cd + 803ee22: 495d ldr r1, [pc, #372] ; (803ef98 ) + 803ee24: 485a ldr r0, [pc, #360] ; (803ef90 ) + 803ee26: f001 fe73 bl 8040b10 ((arp_table[i].state == ETHARP_STATE_PENDING) || (arp_table[i].state >= ETHARP_STATE_STABLE))); /* do we have a new entry? or an implicit query request? */ if (is_new_entry || (q == NULL)) { - 803edfa: 6a3b ldr r3, [r7, #32] - 803edfc: 2b00 cmp r3, #0 - 803edfe: d102 bne.n 803ee06 - 803ee00: 687b ldr r3, [r7, #4] - 803ee02: 2b00 cmp r3, #0 - 803ee04: d10c bne.n 803ee20 + 803ee2a: 6a3b ldr r3, [r7, #32] + 803ee2c: 2b00 cmp r3, #0 + 803ee2e: d102 bne.n 803ee36 + 803ee30: 687b ldr r3, [r7, #4] + 803ee32: 2b00 cmp r3, #0 + 803ee34: d10c bne.n 803ee50 /* try to resolve it; send out ARP request */ result = etharp_request(netif, ipaddr); - 803ee06: 68b9 ldr r1, [r7, #8] - 803ee08: 68f8 ldr r0, [r7, #12] - 803ee0a: f000 f963 bl 803f0d4 - 803ee0e: 4603 mov r3, r0 - 803ee10: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803ee36: 68b9 ldr r1, [r7, #8] + 803ee38: 68f8 ldr r0, [r7, #12] + 803ee3a: f000 f963 bl 803f104 + 803ee3e: 4603 mov r3, r0 + 803ee40: f887 3027 strb.w r3, [r7, #39] ; 0x27 /* ARP request couldn't be sent */ /* We don't re-send arp request in etharp_tmr, but we still queue packets, since this failure could be temporary, and the next packet calling etharp_query again could lead to sending the queued packets. */ } if (q == NULL) { - 803ee14: 687b ldr r3, [r7, #4] - 803ee16: 2b00 cmp r3, #0 - 803ee18: d102 bne.n 803ee20 + 803ee44: 687b ldr r3, [r7, #4] + 803ee46: 2b00 cmp r3, #0 + 803ee48: d102 bne.n 803ee50 return result; - 803ee1a: f997 3027 ldrsb.w r3, [r7, #39] ; 0x27 - 803ee1e: e096 b.n 803ef4e + 803ee4a: f997 3027 ldrsb.w r3, [r7, #39] ; 0x27 + 803ee4e: e096 b.n 803ef7e } } /* packet given? */ LWIP_ASSERT("q != NULL", q != NULL); - 803ee20: 687b ldr r3, [r7, #4] - 803ee22: 2b00 cmp r3, #0 - 803ee24: d106 bne.n 803ee34 - 803ee26: 4b4c ldr r3, [pc, #304] ; (803ef58 ) - 803ee28: f240 32e1 movw r2, #993 ; 0x3e1 - 803ee2c: 494f ldr r1, [pc, #316] ; (803ef6c ) - 803ee2e: 484c ldr r0, [pc, #304] ; (803ef60 ) - 803ee30: f001 fe56 bl 8040ae0 + 803ee50: 687b ldr r3, [r7, #4] + 803ee52: 2b00 cmp r3, #0 + 803ee54: d106 bne.n 803ee64 + 803ee56: 4b4c ldr r3, [pc, #304] ; (803ef88 ) + 803ee58: f240 32e1 movw r2, #993 ; 0x3e1 + 803ee5c: 494f ldr r1, [pc, #316] ; (803ef9c ) + 803ee5e: 484c ldr r0, [pc, #304] ; (803ef90 ) + 803ee60: f001 fe56 bl 8040b10 /* stable entry? */ if (arp_table[i].state >= ETHARP_STATE_STABLE) { - 803ee34: 7c7a ldrb r2, [r7, #17] - 803ee36: 494b ldr r1, [pc, #300] ; (803ef64 ) - 803ee38: 4613 mov r3, r2 - 803ee3a: 005b lsls r3, r3, #1 - 803ee3c: 4413 add r3, r2 - 803ee3e: 00db lsls r3, r3, #3 - 803ee40: 440b add r3, r1 - 803ee42: 3314 adds r3, #20 - 803ee44: 781b ldrb r3, [r3, #0] - 803ee46: 2b01 cmp r3, #1 - 803ee48: d917 bls.n 803ee7a + 803ee64: 7c7a ldrb r2, [r7, #17] + 803ee66: 494b ldr r1, [pc, #300] ; (803ef94 ) + 803ee68: 4613 mov r3, r2 + 803ee6a: 005b lsls r3, r3, #1 + 803ee6c: 4413 add r3, r2 + 803ee6e: 00db lsls r3, r3, #3 + 803ee70: 440b add r3, r1 + 803ee72: 3314 adds r3, #20 + 803ee74: 781b ldrb r3, [r3, #0] + 803ee76: 2b01 cmp r3, #1 + 803ee78: d917 bls.n 803eeaa /* we have a valid IP->Ethernet address mapping */ ETHARP_SET_ADDRHINT(netif, i); - 803ee4a: 4a49 ldr r2, [pc, #292] ; (803ef70 ) - 803ee4c: 7c7b ldrb r3, [r7, #17] - 803ee4e: 7013 strb r3, [r2, #0] + 803ee7a: 4a49 ldr r2, [pc, #292] ; (803efa0 ) + 803ee7c: 7c7b ldrb r3, [r7, #17] + 803ee7e: 7013 strb r3, [r2, #0] /* send the packet */ result = ethernet_output(netif, q, srcaddr, &(arp_table[i].ethaddr), ETHTYPE_IP); - 803ee50: 7c7a ldrb r2, [r7, #17] - 803ee52: 4613 mov r3, r2 - 803ee54: 005b lsls r3, r3, #1 - 803ee56: 4413 add r3, r2 - 803ee58: 00db lsls r3, r3, #3 - 803ee5a: 3308 adds r3, #8 - 803ee5c: 4a41 ldr r2, [pc, #260] ; (803ef64 ) - 803ee5e: 4413 add r3, r2 - 803ee60: 3304 adds r3, #4 - 803ee62: f44f 6200 mov.w r2, #2048 ; 0x800 - 803ee66: 9200 str r2, [sp, #0] - 803ee68: 697a ldr r2, [r7, #20] - 803ee6a: 6879 ldr r1, [r7, #4] - 803ee6c: 68f8 ldr r0, [r7, #12] - 803ee6e: f001 fc9b bl 80407a8 - 803ee72: 4603 mov r3, r0 - 803ee74: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 803ee78: e067 b.n 803ef4a + 803ee80: 7c7a ldrb r2, [r7, #17] + 803ee82: 4613 mov r3, r2 + 803ee84: 005b lsls r3, r3, #1 + 803ee86: 4413 add r3, r2 + 803ee88: 00db lsls r3, r3, #3 + 803ee8a: 3308 adds r3, #8 + 803ee8c: 4a41 ldr r2, [pc, #260] ; (803ef94 ) + 803ee8e: 4413 add r3, r2 + 803ee90: 3304 adds r3, #4 + 803ee92: f44f 6200 mov.w r2, #2048 ; 0x800 + 803ee96: 9200 str r2, [sp, #0] + 803ee98: 697a ldr r2, [r7, #20] + 803ee9a: 6879 ldr r1, [r7, #4] + 803ee9c: 68f8 ldr r0, [r7, #12] + 803ee9e: f001 fc9b bl 80407d8 + 803eea2: 4603 mov r3, r0 + 803eea4: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803eea8: e067 b.n 803ef7a /* pending entry? (either just created or already pending */ } else if (arp_table[i].state == ETHARP_STATE_PENDING) { - 803ee7a: 7c7a ldrb r2, [r7, #17] - 803ee7c: 4939 ldr r1, [pc, #228] ; (803ef64 ) - 803ee7e: 4613 mov r3, r2 - 803ee80: 005b lsls r3, r3, #1 - 803ee82: 4413 add r3, r2 - 803ee84: 00db lsls r3, r3, #3 - 803ee86: 440b add r3, r1 - 803ee88: 3314 adds r3, #20 - 803ee8a: 781b ldrb r3, [r3, #0] - 803ee8c: 2b01 cmp r3, #1 - 803ee8e: d15c bne.n 803ef4a + 803eeaa: 7c7a ldrb r2, [r7, #17] + 803eeac: 4939 ldr r1, [pc, #228] ; (803ef94 ) + 803eeae: 4613 mov r3, r2 + 803eeb0: 005b lsls r3, r3, #1 + 803eeb2: 4413 add r3, r2 + 803eeb4: 00db lsls r3, r3, #3 + 803eeb6: 440b add r3, r1 + 803eeb8: 3314 adds r3, #20 + 803eeba: 781b ldrb r3, [r3, #0] + 803eebc: 2b01 cmp r3, #1 + 803eebe: d15c bne.n 803ef7a /* entry is still pending, queue the given packet 'q' */ struct pbuf *p; int copy_needed = 0; - 803ee90: 2300 movs r3, #0 - 803ee92: 61bb str r3, [r7, #24] + 803eec0: 2300 movs r3, #0 + 803eec2: 61bb str r3, [r7, #24] /* IF q includes a pbuf that must be copied, copy the whole chain into a * new PBUF_RAM. See the definition of PBUF_NEEDS_COPY for details. */ p = q; - 803ee94: 687b ldr r3, [r7, #4] - 803ee96: 61fb str r3, [r7, #28] + 803eec4: 687b ldr r3, [r7, #4] + 803eec6: 61fb str r3, [r7, #28] while (p) { - 803ee98: e01c b.n 803eed4 + 803eec8: e01c b.n 803ef04 LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0)); - 803ee9a: 69fb ldr r3, [r7, #28] - 803ee9c: 895a ldrh r2, [r3, #10] - 803ee9e: 69fb ldr r3, [r7, #28] - 803eea0: 891b ldrh r3, [r3, #8] - 803eea2: 429a cmp r2, r3 - 803eea4: d10a bne.n 803eebc - 803eea6: 69fb ldr r3, [r7, #28] - 803eea8: 681b ldr r3, [r3, #0] - 803eeaa: 2b00 cmp r3, #0 - 803eeac: d006 beq.n 803eebc - 803eeae: 4b2a ldr r3, [pc, #168] ; (803ef58 ) - 803eeb0: f240 32f1 movw r2, #1009 ; 0x3f1 - 803eeb4: 492f ldr r1, [pc, #188] ; (803ef74 ) - 803eeb6: 482a ldr r0, [pc, #168] ; (803ef60 ) - 803eeb8: f001 fe12 bl 8040ae0 + 803eeca: 69fb ldr r3, [r7, #28] + 803eecc: 895a ldrh r2, [r3, #10] + 803eece: 69fb ldr r3, [r7, #28] + 803eed0: 891b ldrh r3, [r3, #8] + 803eed2: 429a cmp r2, r3 + 803eed4: d10a bne.n 803eeec + 803eed6: 69fb ldr r3, [r7, #28] + 803eed8: 681b ldr r3, [r3, #0] + 803eeda: 2b00 cmp r3, #0 + 803eedc: d006 beq.n 803eeec + 803eede: 4b2a ldr r3, [pc, #168] ; (803ef88 ) + 803eee0: f240 32f1 movw r2, #1009 ; 0x3f1 + 803eee4: 492f ldr r1, [pc, #188] ; (803efa4 ) + 803eee6: 482a ldr r0, [pc, #168] ; (803ef90 ) + 803eee8: f001 fe12 bl 8040b10 if (PBUF_NEEDS_COPY(p)) { - 803eebc: 69fb ldr r3, [r7, #28] - 803eebe: 7b1b ldrb r3, [r3, #12] - 803eec0: f003 0340 and.w r3, r3, #64 ; 0x40 - 803eec4: 2b00 cmp r3, #0 - 803eec6: d002 beq.n 803eece + 803eeec: 69fb ldr r3, [r7, #28] + 803eeee: 7b1b ldrb r3, [r3, #12] + 803eef0: f003 0340 and.w r3, r3, #64 ; 0x40 + 803eef4: 2b00 cmp r3, #0 + 803eef6: d002 beq.n 803eefe copy_needed = 1; - 803eec8: 2301 movs r3, #1 - 803eeca: 61bb str r3, [r7, #24] + 803eef8: 2301 movs r3, #1 + 803eefa: 61bb str r3, [r7, #24] break; - 803eecc: e005 b.n 803eeda + 803eefc: e005 b.n 803ef0a } p = p->next; - 803eece: 69fb ldr r3, [r7, #28] - 803eed0: 681b ldr r3, [r3, #0] - 803eed2: 61fb str r3, [r7, #28] + 803eefe: 69fb ldr r3, [r7, #28] + 803ef00: 681b ldr r3, [r3, #0] + 803ef02: 61fb str r3, [r7, #28] while (p) { - 803eed4: 69fb ldr r3, [r7, #28] - 803eed6: 2b00 cmp r3, #0 - 803eed8: d1df bne.n 803ee9a + 803ef04: 69fb ldr r3, [r7, #28] + 803ef06: 2b00 cmp r3, #0 + 803ef08: d1df bne.n 803eeca } if (copy_needed) { - 803eeda: 69bb ldr r3, [r7, #24] - 803eedc: 2b00 cmp r3, #0 - 803eede: d007 beq.n 803eef0 + 803ef0a: 69bb ldr r3, [r7, #24] + 803ef0c: 2b00 cmp r3, #0 + 803ef0e: d007 beq.n 803ef20 /* copy the whole packet into new pbufs */ p = pbuf_clone(PBUF_LINK, PBUF_RAM, q); - 803eee0: 687a ldr r2, [r7, #4] - 803eee2: f44f 7120 mov.w r1, #640 ; 0x280 - 803eee6: 200e movs r0, #14 - 803eee8: f7f8 fe6c bl 8037bc4 - 803eeec: 61f8 str r0, [r7, #28] - 803eeee: e004 b.n 803eefa + 803ef10: 687a ldr r2, [r7, #4] + 803ef12: f44f 7120 mov.w r1, #640 ; 0x280 + 803ef16: 200e movs r0, #14 + 803ef18: f7f8 fe6c bl 8037bf4 + 803ef1c: 61f8 str r0, [r7, #28] + 803ef1e: e004 b.n 803ef2a } else { /* referencing the old pbuf is enough */ p = q; - 803eef0: 687b ldr r3, [r7, #4] - 803eef2: 61fb str r3, [r7, #28] + 803ef20: 687b ldr r3, [r7, #4] + 803ef22: 61fb str r3, [r7, #28] pbuf_ref(p); - 803eef4: 69f8 ldr r0, [r7, #28] - 803eef6: f7f8 fca9 bl 803784c + 803ef24: 69f8 ldr r0, [r7, #28] + 803ef26: f7f8 fca9 bl 803787c } /* packet could be taken over? */ if (p != NULL) { - 803eefa: 69fb ldr r3, [r7, #28] - 803eefc: 2b00 cmp r3, #0 - 803eefe: d021 beq.n 803ef44 + 803ef2a: 69fb ldr r3, [r7, #28] + 803ef2c: 2b00 cmp r3, #0 + 803ef2e: d021 beq.n 803ef74 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); result = ERR_MEM; } #else /* ARP_QUEUEING */ /* always queue one packet per ARP request only, freeing a previously queued packet */ if (arp_table[i].q != NULL) { - 803ef00: 7c7a ldrb r2, [r7, #17] - 803ef02: 4918 ldr r1, [pc, #96] ; (803ef64 ) - 803ef04: 4613 mov r3, r2 - 803ef06: 005b lsls r3, r3, #1 - 803ef08: 4413 add r3, r2 - 803ef0a: 00db lsls r3, r3, #3 - 803ef0c: 440b add r3, r1 - 803ef0e: 681b ldr r3, [r3, #0] - 803ef10: 2b00 cmp r3, #0 - 803ef12: d00a beq.n 803ef2a + 803ef30: 7c7a ldrb r2, [r7, #17] + 803ef32: 4918 ldr r1, [pc, #96] ; (803ef94 ) + 803ef34: 4613 mov r3, r2 + 803ef36: 005b lsls r3, r3, #1 + 803ef38: 4413 add r3, r2 + 803ef3a: 00db lsls r3, r3, #3 + 803ef3c: 440b add r3, r1 + 803ef3e: 681b ldr r3, [r3, #0] + 803ef40: 2b00 cmp r3, #0 + 803ef42: d00a beq.n 803ef5a LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"U16_F"\n", (void *)q, (u16_t)i)); pbuf_free(arp_table[i].q); - 803ef14: 7c7a ldrb r2, [r7, #17] - 803ef16: 4913 ldr r1, [pc, #76] ; (803ef64 ) - 803ef18: 4613 mov r3, r2 - 803ef1a: 005b lsls r3, r3, #1 - 803ef1c: 4413 add r3, r2 - 803ef1e: 00db lsls r3, r3, #3 - 803ef20: 440b add r3, r1 - 803ef22: 681b ldr r3, [r3, #0] - 803ef24: 4618 mov r0, r3 - 803ef26: f7f8 fbf1 bl 803770c + 803ef44: 7c7a ldrb r2, [r7, #17] + 803ef46: 4913 ldr r1, [pc, #76] ; (803ef94 ) + 803ef48: 4613 mov r3, r2 + 803ef4a: 005b lsls r3, r3, #1 + 803ef4c: 4413 add r3, r2 + 803ef4e: 00db lsls r3, r3, #3 + 803ef50: 440b add r3, r1 + 803ef52: 681b ldr r3, [r3, #0] + 803ef54: 4618 mov r0, r3 + 803ef56: f7f8 fbf1 bl 803773c } arp_table[i].q = p; - 803ef2a: 7c7a ldrb r2, [r7, #17] - 803ef2c: 490d ldr r1, [pc, #52] ; (803ef64 ) - 803ef2e: 4613 mov r3, r2 - 803ef30: 005b lsls r3, r3, #1 - 803ef32: 4413 add r3, r2 - 803ef34: 00db lsls r3, r3, #3 - 803ef36: 440b add r3, r1 - 803ef38: 69fa ldr r2, [r7, #28] - 803ef3a: 601a str r2, [r3, #0] + 803ef5a: 7c7a ldrb r2, [r7, #17] + 803ef5c: 490d ldr r1, [pc, #52] ; (803ef94 ) + 803ef5e: 4613 mov r3, r2 + 803ef60: 005b lsls r3, r3, #1 + 803ef62: 4413 add r3, r2 + 803ef64: 00db lsls r3, r3, #3 + 803ef66: 440b add r3, r1 + 803ef68: 69fa ldr r2, [r7, #28] + 803ef6a: 601a str r2, [r3, #0] result = ERR_OK; - 803ef3c: 2300 movs r3, #0 - 803ef3e: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 803ef42: e002 b.n 803ef4a + 803ef6c: 2300 movs r3, #0 + 803ef6e: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803ef72: e002 b.n 803ef7a LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"U16_F"\n", (void *)q, (u16_t)i)); #endif /* ARP_QUEUEING */ } else { ETHARP_STATS_INC(etharp.memerr); LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); result = ERR_MEM; - 803ef44: 23ff movs r3, #255 ; 0xff - 803ef46: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803ef74: 23ff movs r3, #255 ; 0xff + 803ef76: f887 3027 strb.w r3, [r7, #39] ; 0x27 } } return result; - 803ef4a: f997 3027 ldrsb.w r3, [r7, #39] ; 0x27 -} - 803ef4e: 4618 mov r0, r3 - 803ef50: 3728 adds r7, #40 ; 0x28 - 803ef52: 46bd mov sp, r7 - 803ef54: bd80 pop {r7, pc} - 803ef56: bf00 nop - 803ef58: 080445b8 .word 0x080445b8 - 803ef5c: 08044764 .word 0x08044764 - 803ef60: 08044630 .word 0x08044630 - 803ef64: 2400e9b8 .word 0x2400e9b8 - 803ef68: 08044774 .word 0x08044774 - 803ef6c: 08044758 .word 0x08044758 - 803ef70: 2400eaa8 .word 0x2400eaa8 - 803ef74: 0804479c .word 0x0804479c - -0803ef78 : + 803ef7a: f997 3027 ldrsb.w r3, [r7, #39] ; 0x27 +} + 803ef7e: 4618 mov r0, r3 + 803ef80: 3728 adds r7, #40 ; 0x28 + 803ef82: 46bd mov sp, r7 + 803ef84: bd80 pop {r7, pc} + 803ef86: bf00 nop + 803ef88: 080445e8 .word 0x080445e8 + 803ef8c: 08044794 .word 0x08044794 + 803ef90: 08044660 .word 0x08044660 + 803ef94: 2400e9b8 .word 0x2400e9b8 + 803ef98: 080447a4 .word 0x080447a4 + 803ef9c: 08044788 .word 0x08044788 + 803efa0: 2400eaa8 .word 0x2400eaa8 + 803efa4: 080447cc .word 0x080447cc + +0803efa8 : etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr, const struct eth_addr *ethdst_addr, const struct eth_addr *hwsrc_addr, const ip4_addr_t *ipsrc_addr, const struct eth_addr *hwdst_addr, const ip4_addr_t *ipdst_addr, const u16_t opcode) { - 803ef78: b580 push {r7, lr} - 803ef7a: b08a sub sp, #40 ; 0x28 - 803ef7c: af02 add r7, sp, #8 - 803ef7e: 60f8 str r0, [r7, #12] - 803ef80: 60b9 str r1, [r7, #8] - 803ef82: 607a str r2, [r7, #4] - 803ef84: 603b str r3, [r7, #0] + 803efa8: b580 push {r7, lr} + 803efaa: b08a sub sp, #40 ; 0x28 + 803efac: af02 add r7, sp, #8 + 803efae: 60f8 str r0, [r7, #12] + 803efb0: 60b9 str r1, [r7, #8] + 803efb2: 607a str r2, [r7, #4] + 803efb4: 603b str r3, [r7, #0] struct pbuf *p; err_t result = ERR_OK; - 803ef86: 2300 movs r3, #0 - 803ef88: 77fb strb r3, [r7, #31] + 803efb6: 2300 movs r3, #0 + 803efb8: 77fb strb r3, [r7, #31] struct etharp_hdr *hdr; LWIP_ASSERT("netif != NULL", netif != NULL); - 803ef8a: 68fb ldr r3, [r7, #12] - 803ef8c: 2b00 cmp r3, #0 - 803ef8e: d106 bne.n 803ef9e - 803ef90: 4b3a ldr r3, [pc, #232] ; (803f07c ) - 803ef92: f240 4257 movw r2, #1111 ; 0x457 - 803ef96: 493a ldr r1, [pc, #232] ; (803f080 ) - 803ef98: 483a ldr r0, [pc, #232] ; (803f084 ) - 803ef9a: f001 fda1 bl 8040ae0 + 803efba: 68fb ldr r3, [r7, #12] + 803efbc: 2b00 cmp r3, #0 + 803efbe: d106 bne.n 803efce + 803efc0: 4b3a ldr r3, [pc, #232] ; (803f0ac ) + 803efc2: f240 4257 movw r2, #1111 ; 0x457 + 803efc6: 493a ldr r1, [pc, #232] ; (803f0b0 ) + 803efc8: 483a ldr r0, [pc, #232] ; (803f0b4 ) + 803efca: f001 fda1 bl 8040b10 /* allocate a pbuf for the outgoing ARP request packet */ p = pbuf_alloc(PBUF_LINK, SIZEOF_ETHARP_HDR, PBUF_RAM); - 803ef9e: f44f 7220 mov.w r2, #640 ; 0x280 - 803efa2: 211c movs r1, #28 - 803efa4: 200e movs r0, #14 - 803efa6: f7f8 f8cd bl 8037144 - 803efaa: 61b8 str r0, [r7, #24] + 803efce: f44f 7220 mov.w r2, #640 ; 0x280 + 803efd2: 211c movs r1, #28 + 803efd4: 200e movs r0, #14 + 803efd6: f7f8 f8cd bl 8037174 + 803efda: 61b8 str r0, [r7, #24] /* could allocate a pbuf for an ARP request? */ if (p == NULL) { - 803efac: 69bb ldr r3, [r7, #24] - 803efae: 2b00 cmp r3, #0 - 803efb0: d102 bne.n 803efb8 + 803efdc: 69bb ldr r3, [r7, #24] + 803efde: 2b00 cmp r3, #0 + 803efe0: d102 bne.n 803efe8 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("etharp_raw: could not allocate pbuf for ARP request.\n")); ETHARP_STATS_INC(etharp.memerr); return ERR_MEM; - 803efb2: f04f 33ff mov.w r3, #4294967295 - 803efb6: e05d b.n 803f074 + 803efe2: f04f 33ff mov.w r3, #4294967295 + 803efe6: e05d b.n 803f0a4 } LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr", - 803efb8: 69bb ldr r3, [r7, #24] - 803efba: 895b ldrh r3, [r3, #10] - 803efbc: 2b1b cmp r3, #27 - 803efbe: d806 bhi.n 803efce - 803efc0: 4b2e ldr r3, [pc, #184] ; (803f07c ) - 803efc2: f240 4262 movw r2, #1122 ; 0x462 - 803efc6: 4930 ldr r1, [pc, #192] ; (803f088 ) - 803efc8: 482e ldr r0, [pc, #184] ; (803f084 ) - 803efca: f001 fd89 bl 8040ae0 + 803efe8: 69bb ldr r3, [r7, #24] + 803efea: 895b ldrh r3, [r3, #10] + 803efec: 2b1b cmp r3, #27 + 803efee: d806 bhi.n 803effe + 803eff0: 4b2e ldr r3, [pc, #184] ; (803f0ac ) + 803eff2: f240 4262 movw r2, #1122 ; 0x462 + 803eff6: 4930 ldr r1, [pc, #192] ; (803f0b8 ) + 803eff8: 482e ldr r0, [pc, #184] ; (803f0b4 ) + 803effa: f001 fd89 bl 8040b10 (p->len >= SIZEOF_ETHARP_HDR)); hdr = (struct etharp_hdr *)p->payload; - 803efce: 69bb ldr r3, [r7, #24] - 803efd0: 685b ldr r3, [r3, #4] - 803efd2: 617b str r3, [r7, #20] + 803effe: 69bb ldr r3, [r7, #24] + 803f000: 685b ldr r3, [r3, #4] + 803f002: 617b str r3, [r7, #20] LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n")); hdr->opcode = lwip_htons(opcode); - 803efd4: 8ebb ldrh r3, [r7, #52] ; 0x34 - 803efd6: 4618 mov r0, r3 - 803efd8: f7f6 ff66 bl 8035ea8 - 803efdc: 4603 mov r3, r0 - 803efde: 461a mov r2, r3 - 803efe0: 697b ldr r3, [r7, #20] - 803efe2: 80da strh r2, [r3, #6] + 803f004: 8ebb ldrh r3, [r7, #52] ; 0x34 + 803f006: 4618 mov r0, r3 + 803f008: f7f6 ff66 bl 8035ed8 + 803f00c: 4603 mov r3, r0 + 803f00e: 461a mov r2, r3 + 803f010: 697b ldr r3, [r7, #20] + 803f012: 80da strh r2, [r3, #6] LWIP_ASSERT("netif->hwaddr_len must be the same as ETH_HWADDR_LEN for etharp!", - 803efe4: 68fb ldr r3, [r7, #12] - 803efe6: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 803efea: 2b06 cmp r3, #6 - 803efec: d006 beq.n 803effc - 803efee: 4b23 ldr r3, [pc, #140] ; (803f07c ) - 803eff0: f240 4269 movw r2, #1129 ; 0x469 - 803eff4: 4925 ldr r1, [pc, #148] ; (803f08c ) - 803eff6: 4823 ldr r0, [pc, #140] ; (803f084 ) - 803eff8: f001 fd72 bl 8040ae0 + 803f014: 68fb ldr r3, [r7, #12] + 803f016: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 + 803f01a: 2b06 cmp r3, #6 + 803f01c: d006 beq.n 803f02c + 803f01e: 4b23 ldr r3, [pc, #140] ; (803f0ac ) + 803f020: f240 4269 movw r2, #1129 ; 0x469 + 803f024: 4925 ldr r1, [pc, #148] ; (803f0bc ) + 803f026: 4823 ldr r0, [pc, #140] ; (803f0b4 ) + 803f028: f001 fd72 bl 8040b10 (netif->hwaddr_len == ETH_HWADDR_LEN)); /* Write the ARP MAC-Addresses */ SMEMCPY(&hdr->shwaddr, hwsrc_addr, ETH_HWADDR_LEN); - 803effc: 697b ldr r3, [r7, #20] - 803effe: 3308 adds r3, #8 - 803f000: 2206 movs r2, #6 - 803f002: 6839 ldr r1, [r7, #0] - 803f004: 4618 mov r0, r3 - 803f006: f001 fc5b bl 80408c0 + 803f02c: 697b ldr r3, [r7, #20] + 803f02e: 3308 adds r3, #8 + 803f030: 2206 movs r2, #6 + 803f032: 6839 ldr r1, [r7, #0] + 803f034: 4618 mov r0, r3 + 803f036: f001 fc5b bl 80408f0 SMEMCPY(&hdr->dhwaddr, hwdst_addr, ETH_HWADDR_LEN); - 803f00a: 697b ldr r3, [r7, #20] - 803f00c: 3312 adds r3, #18 - 803f00e: 2206 movs r2, #6 - 803f010: 6af9 ldr r1, [r7, #44] ; 0x2c - 803f012: 4618 mov r0, r3 - 803f014: f001 fc54 bl 80408c0 + 803f03a: 697b ldr r3, [r7, #20] + 803f03c: 3312 adds r3, #18 + 803f03e: 2206 movs r2, #6 + 803f040: 6af9 ldr r1, [r7, #44] ; 0x2c + 803f042: 4618 mov r0, r3 + 803f044: f001 fc54 bl 80408f0 /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without * structure packing. */ IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->sipaddr, ipsrc_addr); - 803f018: 697b ldr r3, [r7, #20] - 803f01a: 330e adds r3, #14 - 803f01c: 6aba ldr r2, [r7, #40] ; 0x28 - 803f01e: 6812 ldr r2, [r2, #0] - 803f020: 601a str r2, [r3, #0] + 803f048: 697b ldr r3, [r7, #20] + 803f04a: 330e adds r3, #14 + 803f04c: 6aba ldr r2, [r7, #40] ; 0x28 + 803f04e: 6812 ldr r2, [r2, #0] + 803f050: 601a str r2, [r3, #0] IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->dipaddr, ipdst_addr); - 803f022: 697b ldr r3, [r7, #20] - 803f024: 3318 adds r3, #24 - 803f026: 6b3a ldr r2, [r7, #48] ; 0x30 - 803f028: 6812 ldr r2, [r2, #0] - 803f02a: 601a str r2, [r3, #0] + 803f052: 697b ldr r3, [r7, #20] + 803f054: 3318 adds r3, #24 + 803f056: 6b3a ldr r2, [r7, #48] ; 0x30 + 803f058: 6812 ldr r2, [r2, #0] + 803f05a: 601a str r2, [r3, #0] hdr->hwtype = PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET); - 803f02c: 697b ldr r3, [r7, #20] - 803f02e: 2200 movs r2, #0 - 803f030: 701a strb r2, [r3, #0] - 803f032: 2200 movs r2, #0 - 803f034: f042 0201 orr.w r2, r2, #1 - 803f038: 705a strb r2, [r3, #1] + 803f05c: 697b ldr r3, [r7, #20] + 803f05e: 2200 movs r2, #0 + 803f060: 701a strb r2, [r3, #0] + 803f062: 2200 movs r2, #0 + 803f064: f042 0201 orr.w r2, r2, #1 + 803f068: 705a strb r2, [r3, #1] hdr->proto = PP_HTONS(ETHTYPE_IP); - 803f03a: 697b ldr r3, [r7, #20] - 803f03c: 2200 movs r2, #0 - 803f03e: f042 0208 orr.w r2, r2, #8 - 803f042: 709a strb r2, [r3, #2] - 803f044: 2200 movs r2, #0 - 803f046: 70da strb r2, [r3, #3] + 803f06a: 697b ldr r3, [r7, #20] + 803f06c: 2200 movs r2, #0 + 803f06e: f042 0208 orr.w r2, r2, #8 + 803f072: 709a strb r2, [r3, #2] + 803f074: 2200 movs r2, #0 + 803f076: 70da strb r2, [r3, #3] /* set hwlen and protolen */ hdr->hwlen = ETH_HWADDR_LEN; - 803f048: 697b ldr r3, [r7, #20] - 803f04a: 2206 movs r2, #6 - 803f04c: 711a strb r2, [r3, #4] + 803f078: 697b ldr r3, [r7, #20] + 803f07a: 2206 movs r2, #6 + 803f07c: 711a strb r2, [r3, #4] hdr->protolen = sizeof(ip4_addr_t); - 803f04e: 697b ldr r3, [r7, #20] - 803f050: 2204 movs r2, #4 - 803f052: 715a strb r2, [r3, #5] + 803f07e: 697b ldr r3, [r7, #20] + 803f080: 2204 movs r2, #4 + 803f082: 715a strb r2, [r3, #5] if (ip4_addr_islinklocal(ipsrc_addr)) { ethernet_output(netif, p, ethsrc_addr, ðbroadcast, ETHTYPE_ARP); } else #endif /* LWIP_AUTOIP */ { ethernet_output(netif, p, ethsrc_addr, ethdst_addr, ETHTYPE_ARP); - 803f054: f640 0306 movw r3, #2054 ; 0x806 - 803f058: 9300 str r3, [sp, #0] - 803f05a: 687b ldr r3, [r7, #4] - 803f05c: 68ba ldr r2, [r7, #8] - 803f05e: 69b9 ldr r1, [r7, #24] - 803f060: 68f8 ldr r0, [r7, #12] - 803f062: f001 fba1 bl 80407a8 + 803f084: f640 0306 movw r3, #2054 ; 0x806 + 803f088: 9300 str r3, [sp, #0] + 803f08a: 687b ldr r3, [r7, #4] + 803f08c: 68ba ldr r2, [r7, #8] + 803f08e: 69b9 ldr r1, [r7, #24] + 803f090: 68f8 ldr r0, [r7, #12] + 803f092: f001 fba1 bl 80407d8 } ETHARP_STATS_INC(etharp.xmit); /* free ARP query packet */ pbuf_free(p); - 803f066: 69b8 ldr r0, [r7, #24] - 803f068: f7f8 fb50 bl 803770c + 803f096: 69b8 ldr r0, [r7, #24] + 803f098: f7f8 fb50 bl 803773c p = NULL; - 803f06c: 2300 movs r3, #0 - 803f06e: 61bb str r3, [r7, #24] + 803f09c: 2300 movs r3, #0 + 803f09e: 61bb str r3, [r7, #24] /* could not allocate pbuf for ARP request */ return result; - 803f070: f997 301f ldrsb.w r3, [r7, #31] -} - 803f074: 4618 mov r0, r3 - 803f076: 3720 adds r7, #32 - 803f078: 46bd mov sp, r7 - 803f07a: bd80 pop {r7, pc} - 803f07c: 080445b8 .word 0x080445b8 - 803f080: 08044708 .word 0x08044708 - 803f084: 08044630 .word 0x08044630 - 803f088: 080447b8 .word 0x080447b8 - 803f08c: 080447ec .word 0x080447ec - -0803f090 : + 803f0a0: f997 301f ldrsb.w r3, [r7, #31] +} + 803f0a4: 4618 mov r0, r3 + 803f0a6: 3720 adds r7, #32 + 803f0a8: 46bd mov sp, r7 + 803f0aa: bd80 pop {r7, pc} + 803f0ac: 080445e8 .word 0x080445e8 + 803f0b0: 08044738 .word 0x08044738 + 803f0b4: 08044660 .word 0x08044660 + 803f0b8: 080447e8 .word 0x080447e8 + 803f0bc: 0804481c .word 0x0804481c + +0803f0c0 : * ERR_MEM if the ARP packet couldn't be allocated * any other err_t on failure */ static err_t etharp_request_dst(struct netif *netif, const ip4_addr_t *ipaddr, const struct eth_addr *hw_dst_addr) { - 803f090: b580 push {r7, lr} - 803f092: b088 sub sp, #32 - 803f094: af04 add r7, sp, #16 - 803f096: 60f8 str r0, [r7, #12] - 803f098: 60b9 str r1, [r7, #8] - 803f09a: 607a str r2, [r7, #4] + 803f0c0: b580 push {r7, lr} + 803f0c2: b088 sub sp, #32 + 803f0c4: af04 add r7, sp, #16 + 803f0c6: 60f8 str r0, [r7, #12] + 803f0c8: 60b9 str r1, [r7, #8] + 803f0ca: 607a str r2, [r7, #4] return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr, - 803f09c: 68fb ldr r3, [r7, #12] - 803f09e: f103 012a add.w r1, r3, #42 ; 0x2a + 803f0cc: 68fb ldr r3, [r7, #12] + 803f0ce: f103 012a add.w r1, r3, #42 ; 0x2a (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), ðzero, - 803f0a2: 68fb ldr r3, [r7, #12] - 803f0a4: f103 002a add.w r0, r3, #42 ; 0x2a - 803f0a8: 68fb ldr r3, [r7, #12] - 803f0aa: 3304 adds r3, #4 + 803f0d2: 68fb ldr r3, [r7, #12] + 803f0d4: f103 002a add.w r0, r3, #42 ; 0x2a + 803f0d8: 68fb ldr r3, [r7, #12] + 803f0da: 3304 adds r3, #4 return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr, - 803f0ac: 2201 movs r2, #1 - 803f0ae: 9203 str r2, [sp, #12] - 803f0b0: 68ba ldr r2, [r7, #8] - 803f0b2: 9202 str r2, [sp, #8] - 803f0b4: 4a06 ldr r2, [pc, #24] ; (803f0d0 ) - 803f0b6: 9201 str r2, [sp, #4] - 803f0b8: 9300 str r3, [sp, #0] - 803f0ba: 4603 mov r3, r0 - 803f0bc: 687a ldr r2, [r7, #4] - 803f0be: 68f8 ldr r0, [r7, #12] - 803f0c0: f7ff ff5a bl 803ef78 - 803f0c4: 4603 mov r3, r0 + 803f0dc: 2201 movs r2, #1 + 803f0de: 9203 str r2, [sp, #12] + 803f0e0: 68ba ldr r2, [r7, #8] + 803f0e2: 9202 str r2, [sp, #8] + 803f0e4: 4a06 ldr r2, [pc, #24] ; (803f100 ) + 803f0e6: 9201 str r2, [sp, #4] + 803f0e8: 9300 str r3, [sp, #0] + 803f0ea: 4603 mov r3, r0 + 803f0ec: 687a ldr r2, [r7, #4] + 803f0ee: 68f8 ldr r0, [r7, #12] + 803f0f0: f7ff ff5a bl 803efa8 + 803f0f4: 4603 mov r3, r0 ipaddr, ARP_REQUEST); } - 803f0c6: 4618 mov r0, r3 - 803f0c8: 3710 adds r7, #16 - 803f0ca: 46bd mov sp, r7 - 803f0cc: bd80 pop {r7, pc} - 803f0ce: bf00 nop - 803f0d0: 08044ddc .word 0x08044ddc + 803f0f6: 4618 mov r0, r3 + 803f0f8: 3710 adds r7, #16 + 803f0fa: 46bd mov sp, r7 + 803f0fc: bd80 pop {r7, pc} + 803f0fe: bf00 nop + 803f100: 08044e0c .word 0x08044e0c -0803f0d4 : +0803f104 : * ERR_MEM if the ARP packet couldn't be allocated * any other err_t on failure */ err_t etharp_request(struct netif *netif, const ip4_addr_t *ipaddr) { - 803f0d4: b580 push {r7, lr} - 803f0d6: b082 sub sp, #8 - 803f0d8: af00 add r7, sp, #0 - 803f0da: 6078 str r0, [r7, #4] - 803f0dc: 6039 str r1, [r7, #0] + 803f104: b580 push {r7, lr} + 803f106: b082 sub sp, #8 + 803f108: af00 add r7, sp, #0 + 803f10a: 6078 str r0, [r7, #4] + 803f10c: 6039 str r1, [r7, #0] LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n")); return etharp_request_dst(netif, ipaddr, ðbroadcast); - 803f0de: 4a05 ldr r2, [pc, #20] ; (803f0f4 ) - 803f0e0: 6839 ldr r1, [r7, #0] - 803f0e2: 6878 ldr r0, [r7, #4] - 803f0e4: f7ff ffd4 bl 803f090 - 803f0e8: 4603 mov r3, r0 -} - 803f0ea: 4618 mov r0, r3 - 803f0ec: 3708 adds r7, #8 - 803f0ee: 46bd mov sp, r7 - 803f0f0: bd80 pop {r7, pc} - 803f0f2: bf00 nop - 803f0f4: 08044dd4 .word 0x08044dd4 - -0803f0f8 : + 803f10e: 4a05 ldr r2, [pc, #20] ; (803f124 ) + 803f110: 6839 ldr r1, [r7, #0] + 803f112: 6878 ldr r0, [r7, #4] + 803f114: f7ff ffd4 bl 803f0c0 + 803f118: 4603 mov r3, r0 +} + 803f11a: 4618 mov r0, r3 + 803f11c: 3708 adds r7, #8 + 803f11e: 46bd mov sp, r7 + 803f120: bd80 pop {r7, pc} + 803f122: bf00 nop + 803f124: 08044e04 .word 0x08044e04 + +0803f128 : * @param p the icmp echo request packet, p->payload pointing to the icmp header * @param inp the netif on which this packet was received */ void icmp_input(struct pbuf *p, struct netif *inp) { - 803f0f8: b580 push {r7, lr} - 803f0fa: b08e sub sp, #56 ; 0x38 - 803f0fc: af04 add r7, sp, #16 - 803f0fe: 6078 str r0, [r7, #4] - 803f100: 6039 str r1, [r7, #0] + 803f128: b580 push {r7, lr} + 803f12a: b08e sub sp, #56 ; 0x38 + 803f12c: af04 add r7, sp, #16 + 803f12e: 6078 str r0, [r7, #4] + 803f130: 6039 str r1, [r7, #0] const ip4_addr_t *src; ICMP_STATS_INC(icmp.recv); MIB2_STATS_INC(mib2.icmpinmsgs); iphdr_in = ip4_current_header(); - 803f102: 4b87 ldr r3, [pc, #540] ; (803f320 ) - 803f104: 689b ldr r3, [r3, #8] - 803f106: 627b str r3, [r7, #36] ; 0x24 + 803f132: 4b87 ldr r3, [pc, #540] ; (803f350 ) + 803f134: 689b ldr r3, [r3, #8] + 803f136: 627b str r3, [r7, #36] ; 0x24 hlen = IPH_HL_BYTES(iphdr_in); - 803f108: 6a7b ldr r3, [r7, #36] ; 0x24 - 803f10a: 781b ldrb r3, [r3, #0] - 803f10c: f003 030f and.w r3, r3, #15 - 803f110: b2db uxtb r3, r3 - 803f112: 009b lsls r3, r3, #2 - 803f114: b2db uxtb r3, r3 - 803f116: 847b strh r3, [r7, #34] ; 0x22 + 803f138: 6a7b ldr r3, [r7, #36] ; 0x24 + 803f13a: 781b ldrb r3, [r3, #0] + 803f13c: f003 030f and.w r3, r3, #15 + 803f140: b2db uxtb r3, r3 + 803f142: 009b lsls r3, r3, #2 + 803f144: b2db uxtb r3, r3 + 803f146: 847b strh r3, [r7, #34] ; 0x22 if (hlen < IP_HLEN) { - 803f118: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f11a: 2b13 cmp r3, #19 - 803f11c: f240 80e8 bls.w 803f2f0 + 803f148: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f14a: 2b13 cmp r3, #19 + 803f14c: f240 80e8 bls.w 803f320 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short IP header (%"S16_F" bytes) received\n", hlen)); goto lenerr; } if (p->len < sizeof(u16_t) * 2) { - 803f120: 687b ldr r3, [r7, #4] - 803f122: 895b ldrh r3, [r3, #10] - 803f124: 2b03 cmp r3, #3 - 803f126: f240 80e5 bls.w 803f2f4 + 803f150: 687b ldr r3, [r7, #4] + 803f152: 895b ldrh r3, [r3, #10] + 803f154: 2b03 cmp r3, #3 + 803f156: f240 80e5 bls.w 803f324 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len)); goto lenerr; } type = *((u8_t *)p->payload); - 803f12a: 687b ldr r3, [r7, #4] - 803f12c: 685b ldr r3, [r3, #4] - 803f12e: 781b ldrb r3, [r3, #0] - 803f130: f887 3021 strb.w r3, [r7, #33] ; 0x21 + 803f15a: 687b ldr r3, [r7, #4] + 803f15c: 685b ldr r3, [r3, #4] + 803f15e: 781b ldrb r3, [r3, #0] + 803f160: f887 3021 strb.w r3, [r7, #33] ; 0x21 #ifdef LWIP_DEBUG code = *(((u8_t *)p->payload) + 1); /* if debug is enabled but debug statement below is somehow disabled: */ LWIP_UNUSED_ARG(code); #endif /* LWIP_DEBUG */ switch (type) { - 803f134: f897 3021 ldrb.w r3, [r7, #33] ; 0x21 - 803f138: 2b00 cmp r3, #0 - 803f13a: f000 80d2 beq.w 803f2e2 - 803f13e: 2b08 cmp r3, #8 - 803f140: f040 80d2 bne.w 803f2e8 + 803f164: f897 3021 ldrb.w r3, [r7, #33] ; 0x21 + 803f168: 2b00 cmp r3, #0 + 803f16a: f000 80d2 beq.w 803f312 + 803f16e: 2b08 cmp r3, #8 + 803f170: f040 80d2 bne.w 803f318 (as obviously, an echo request has been sent, too). */ MIB2_STATS_INC(mib2.icmpinechoreps); break; case ICMP_ECHO: MIB2_STATS_INC(mib2.icmpinechos); src = ip4_current_dest_addr(); - 803f144: 4b77 ldr r3, [pc, #476] ; (803f324 ) - 803f146: 61fb str r3, [r7, #28] + 803f174: 4b77 ldr r3, [pc, #476] ; (803f354 ) + 803f176: 61fb str r3, [r7, #28] /* multicast destination address? */ if (ip4_addr_ismulticast(ip4_current_dest_addr())) { - 803f148: 4b75 ldr r3, [pc, #468] ; (803f320 ) - 803f14a: 695b ldr r3, [r3, #20] - 803f14c: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 803f150: 2be0 cmp r3, #224 ; 0xe0 - 803f152: f000 80d6 beq.w 803f302 + 803f178: 4b75 ldr r3, [pc, #468] ; (803f350 ) + 803f17a: 695b ldr r3, [r3, #20] + 803f17c: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803f180: 2be0 cmp r3, #224 ; 0xe0 + 803f182: f000 80d6 beq.w 803f332 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast pings\n")); goto icmperr; #endif /* LWIP_MULTICAST_PING */ } /* broadcast destination address? */ if (ip4_addr_isbroadcast(ip4_current_dest_addr(), ip_current_netif())) { - 803f156: 4b72 ldr r3, [pc, #456] ; (803f320 ) - 803f158: 695b ldr r3, [r3, #20] - 803f15a: 4a71 ldr r2, [pc, #452] ; (803f320 ) - 803f15c: 6812 ldr r2, [r2, #0] - 803f15e: 4611 mov r1, r2 - 803f160: 4618 mov r0, r3 - 803f162: f000 fc13 bl 803f98c - 803f166: 4603 mov r3, r0 - 803f168: 2b00 cmp r3, #0 - 803f16a: f040 80cc bne.w 803f306 + 803f186: 4b72 ldr r3, [pc, #456] ; (803f350 ) + 803f188: 695b ldr r3, [r3, #20] + 803f18a: 4a71 ldr r2, [pc, #452] ; (803f350 ) + 803f18c: 6812 ldr r2, [r2, #0] + 803f18e: 4611 mov r1, r2 + 803f190: 4618 mov r0, r3 + 803f192: f000 fc13 bl 803f9bc + 803f196: 4603 mov r3, r0 + 803f198: 2b00 cmp r3, #0 + 803f19a: f040 80cc bne.w 803f336 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to broadcast pings\n")); goto icmperr; #endif /* LWIP_BROADCAST_PING */ } LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); if (p->tot_len < sizeof(struct icmp_echo_hdr)) { - 803f16e: 687b ldr r3, [r7, #4] - 803f170: 891b ldrh r3, [r3, #8] - 803f172: 2b07 cmp r3, #7 - 803f174: f240 80c0 bls.w 803f2f8 + 803f19e: 687b ldr r3, [r7, #4] + 803f1a0: 891b ldrh r3, [r3, #8] + 803f1a2: 2b07 cmp r3, #7 + 803f1a4: f240 80c0 bls.w 803f328 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); goto lenerr; } #if CHECKSUM_CHECK_ICMP IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_CHECK_ICMP) { if (inet_chksum_pbuf(p) != 0) { - 803f178: 6878 ldr r0, [r7, #4] - 803f17a: f7f6 ff32 bl 8035fe2 - 803f17e: 4603 mov r3, r0 - 803f180: 2b00 cmp r3, #0 - 803f182: d003 beq.n 803f18c + 803f1a8: 6878 ldr r0, [r7, #4] + 803f1aa: f7f6 ff32 bl 8036012 + 803f1ae: 4603 mov r3, r0 + 803f1b0: 2b00 cmp r3, #0 + 803f1b2: d003 beq.n 803f1bc LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n")); pbuf_free(p); - 803f184: 6878 ldr r0, [r7, #4] - 803f186: f7f8 fac1 bl 803770c + 803f1b4: 6878 ldr r0, [r7, #4] + 803f1b6: f7f8 fac1 bl 803773c ICMP_STATS_INC(icmp.chkerr); MIB2_STATS_INC(mib2.icmpinerrors); return; - 803f18a: e0c5 b.n 803f318 + 803f1ba: e0c5 b.n 803f348 } } #endif #if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN if (pbuf_add_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) { - 803f18c: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f18e: 330e adds r3, #14 - 803f190: 4619 mov r1, r3 - 803f192: 6878 ldr r0, [r7, #4] - 803f194: f7f8 fa24 bl 80375e0 - 803f198: 4603 mov r3, r0 - 803f19a: 2b00 cmp r3, #0 - 803f19c: d04b beq.n 803f236 + 803f1bc: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f1be: 330e adds r3, #14 + 803f1c0: 4619 mov r1, r3 + 803f1c2: 6878 ldr r0, [r7, #4] + 803f1c4: f7f8 fa24 bl 8037610 + 803f1c8: 4603 mov r3, r0 + 803f1ca: 2b00 cmp r3, #0 + 803f1cc: d04b beq.n 803f266 /* p is not big enough to contain link headers * allocate a new one and copy p into it */ struct pbuf *r; u16_t alloc_len = (u16_t)(p->tot_len + hlen); - 803f19e: 687b ldr r3, [r7, #4] - 803f1a0: 891a ldrh r2, [r3, #8] - 803f1a2: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f1a4: 4413 add r3, r2 - 803f1a6: 837b strh r3, [r7, #26] + 803f1ce: 687b ldr r3, [r7, #4] + 803f1d0: 891a ldrh r2, [r3, #8] + 803f1d2: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f1d4: 4413 add r3, r2 + 803f1d6: 837b strh r3, [r7, #26] if (alloc_len < p->tot_len) { - 803f1a8: 687b ldr r3, [r7, #4] - 803f1aa: 891b ldrh r3, [r3, #8] - 803f1ac: 8b7a ldrh r2, [r7, #26] - 803f1ae: 429a cmp r2, r3 - 803f1b0: f0c0 80ab bcc.w 803f30a + 803f1d8: 687b ldr r3, [r7, #4] + 803f1da: 891b ldrh r3, [r3, #8] + 803f1dc: 8b7a ldrh r2, [r7, #26] + 803f1de: 429a cmp r2, r3 + 803f1e0: f0c0 80ab bcc.w 803f33a LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed (tot_len overflow)\n")); goto icmperr; } /* allocate new packet buffer with space for link headers */ r = pbuf_alloc(PBUF_LINK, alloc_len, PBUF_RAM); - 803f1b4: 8b7b ldrh r3, [r7, #26] - 803f1b6: f44f 7220 mov.w r2, #640 ; 0x280 - 803f1ba: 4619 mov r1, r3 - 803f1bc: 200e movs r0, #14 - 803f1be: f7f7 ffc1 bl 8037144 - 803f1c2: 6178 str r0, [r7, #20] + 803f1e4: 8b7b ldrh r3, [r7, #26] + 803f1e6: f44f 7220 mov.w r2, #640 ; 0x280 + 803f1ea: 4619 mov r1, r3 + 803f1ec: 200e movs r0, #14 + 803f1ee: f7f7 ffc1 bl 8037174 + 803f1f2: 6178 str r0, [r7, #20] if (r == NULL) { - 803f1c4: 697b ldr r3, [r7, #20] - 803f1c6: 2b00 cmp r3, #0 - 803f1c8: f000 80a1 beq.w 803f30e + 803f1f4: 697b ldr r3, [r7, #20] + 803f1f6: 2b00 cmp r3, #0 + 803f1f8: f000 80a1 beq.w 803f33e LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n")); goto icmperr; } if (r->len < hlen + sizeof(struct icmp_echo_hdr)) { - 803f1cc: 697b ldr r3, [r7, #20] - 803f1ce: 895b ldrh r3, [r3, #10] - 803f1d0: 461a mov r2, r3 - 803f1d2: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f1d4: 3308 adds r3, #8 - 803f1d6: 429a cmp r2, r3 - 803f1d8: d203 bcs.n 803f1e2 + 803f1fc: 697b ldr r3, [r7, #20] + 803f1fe: 895b ldrh r3, [r3, #10] + 803f200: 461a mov r2, r3 + 803f202: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f204: 3308 adds r3, #8 + 803f206: 429a cmp r2, r3 + 803f208: d203 bcs.n 803f212 LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("first pbuf cannot hold the ICMP header")); pbuf_free(r); - 803f1da: 6978 ldr r0, [r7, #20] - 803f1dc: f7f8 fa96 bl 803770c + 803f20a: 6978 ldr r0, [r7, #20] + 803f20c: f7f8 fa96 bl 803773c goto icmperr; - 803f1e0: e096 b.n 803f310 + 803f210: e096 b.n 803f340 } /* copy the ip header */ MEMCPY(r->payload, iphdr_in, hlen); - 803f1e2: 697b ldr r3, [r7, #20] - 803f1e4: 685b ldr r3, [r3, #4] - 803f1e6: 8c7a ldrh r2, [r7, #34] ; 0x22 - 803f1e8: 6a79 ldr r1, [r7, #36] ; 0x24 - 803f1ea: 4618 mov r0, r3 - 803f1ec: f001 fb68 bl 80408c0 + 803f212: 697b ldr r3, [r7, #20] + 803f214: 685b ldr r3, [r3, #4] + 803f216: 8c7a ldrh r2, [r7, #34] ; 0x22 + 803f218: 6a79 ldr r1, [r7, #36] ; 0x24 + 803f21a: 4618 mov r0, r3 + 803f21c: f001 fb68 bl 80408f0 /* switch r->payload back to icmp header (cannot fail) */ if (pbuf_remove_header(r, hlen)) { - 803f1f0: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f1f2: 4619 mov r1, r3 - 803f1f4: 6978 ldr r0, [r7, #20] - 803f1f6: f7f8 fa03 bl 8037600 - 803f1fa: 4603 mov r3, r0 - 803f1fc: 2b00 cmp r3, #0 - 803f1fe: d009 beq.n 803f214 + 803f220: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f222: 4619 mov r1, r3 + 803f224: 6978 ldr r0, [r7, #20] + 803f226: f7f8 fa03 bl 8037630 + 803f22a: 4603 mov r3, r0 + 803f22c: 2b00 cmp r3, #0 + 803f22e: d009 beq.n 803f244 LWIP_ASSERT("icmp_input: moving r->payload to icmp header failed\n", 0); - 803f200: 4b49 ldr r3, [pc, #292] ; (803f328 ) - 803f202: 22b6 movs r2, #182 ; 0xb6 - 803f204: 4949 ldr r1, [pc, #292] ; (803f32c ) - 803f206: 484a ldr r0, [pc, #296] ; (803f330 ) - 803f208: f001 fc6a bl 8040ae0 + 803f230: 4b49 ldr r3, [pc, #292] ; (803f358 ) + 803f232: 22b6 movs r2, #182 ; 0xb6 + 803f234: 4949 ldr r1, [pc, #292] ; (803f35c ) + 803f236: 484a ldr r0, [pc, #296] ; (803f360 ) + 803f238: f001 fc6a bl 8040b10 pbuf_free(r); - 803f20c: 6978 ldr r0, [r7, #20] - 803f20e: f7f8 fa7d bl 803770c + 803f23c: 6978 ldr r0, [r7, #20] + 803f23e: f7f8 fa7d bl 803773c goto icmperr; - 803f212: e07d b.n 803f310 + 803f242: e07d b.n 803f340 } /* copy the rest of the packet without ip header */ if (pbuf_copy(r, p) != ERR_OK) { - 803f214: 6879 ldr r1, [r7, #4] - 803f216: 6978 ldr r0, [r7, #20] - 803f218: f7f8 fb90 bl 803793c - 803f21c: 4603 mov r3, r0 - 803f21e: 2b00 cmp r3, #0 - 803f220: d003 beq.n 803f22a + 803f244: 6879 ldr r1, [r7, #4] + 803f246: 6978 ldr r0, [r7, #20] + 803f248: f7f8 fb90 bl 803796c + 803f24c: 4603 mov r3, r0 + 803f24e: 2b00 cmp r3, #0 + 803f250: d003 beq.n 803f25a LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("icmp_input: copying to new pbuf failed")); pbuf_free(r); - 803f222: 6978 ldr r0, [r7, #20] - 803f224: f7f8 fa72 bl 803770c + 803f252: 6978 ldr r0, [r7, #20] + 803f254: f7f8 fa72 bl 803773c goto icmperr; - 803f228: e072 b.n 803f310 + 803f258: e072 b.n 803f340 } /* free the original p */ pbuf_free(p); - 803f22a: 6878 ldr r0, [r7, #4] - 803f22c: f7f8 fa6e bl 803770c + 803f25a: 6878 ldr r0, [r7, #4] + 803f25c: f7f8 fa6e bl 803773c /* we now have an identical copy of p that has room for link headers */ p = r; - 803f230: 697b ldr r3, [r7, #20] - 803f232: 607b str r3, [r7, #4] - 803f234: e00f b.n 803f256 + 803f260: 697b ldr r3, [r7, #20] + 803f262: 607b str r3, [r7, #4] + 803f264: e00f b.n 803f286 } else { /* restore p->payload to point to icmp header (cannot fail) */ if (pbuf_remove_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) { - 803f236: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f238: 330e adds r3, #14 - 803f23a: 4619 mov r1, r3 - 803f23c: 6878 ldr r0, [r7, #4] - 803f23e: f7f8 f9df bl 8037600 - 803f242: 4603 mov r3, r0 - 803f244: 2b00 cmp r3, #0 - 803f246: d006 beq.n 803f256 + 803f266: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f268: 330e adds r3, #14 + 803f26a: 4619 mov r1, r3 + 803f26c: 6878 ldr r0, [r7, #4] + 803f26e: f7f8 f9df bl 8037630 + 803f272: 4603 mov r3, r0 + 803f274: 2b00 cmp r3, #0 + 803f276: d006 beq.n 803f286 LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0); - 803f248: 4b37 ldr r3, [pc, #220] ; (803f328 ) - 803f24a: 22c7 movs r2, #199 ; 0xc7 - 803f24c: 4939 ldr r1, [pc, #228] ; (803f334 ) - 803f24e: 4838 ldr r0, [pc, #224] ; (803f330 ) - 803f250: f001 fc46 bl 8040ae0 + 803f278: 4b37 ldr r3, [pc, #220] ; (803f358 ) + 803f27a: 22c7 movs r2, #199 ; 0xc7 + 803f27c: 4939 ldr r1, [pc, #228] ; (803f364 ) + 803f27e: 4838 ldr r0, [pc, #224] ; (803f360 ) + 803f280: f001 fc46 bl 8040b10 goto icmperr; - 803f254: e05c b.n 803f310 + 803f284: e05c b.n 803f340 } #endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ /* At this point, all checks are OK. */ /* We generate an answer by switching the dest and src ip addresses, * setting the icmp type to ECHO_RESPONSE and updating the checksum. */ iecho = (struct icmp_echo_hdr *)p->payload; - 803f256: 687b ldr r3, [r7, #4] - 803f258: 685b ldr r3, [r3, #4] - 803f25a: 613b str r3, [r7, #16] + 803f286: 687b ldr r3, [r7, #4] + 803f288: 685b ldr r3, [r3, #4] + 803f28a: 613b str r3, [r7, #16] if (pbuf_add_header(p, hlen)) { - 803f25c: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f25e: 4619 mov r1, r3 - 803f260: 6878 ldr r0, [r7, #4] - 803f262: f7f8 f9bd bl 80375e0 - 803f266: 4603 mov r3, r0 - 803f268: 2b00 cmp r3, #0 - 803f26a: d13c bne.n 803f2e6 + 803f28c: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f28e: 4619 mov r1, r3 + 803f290: 6878 ldr r0, [r7, #4] + 803f292: f7f8 f9bd bl 8037610 + 803f296: 4603 mov r3, r0 + 803f298: 2b00 cmp r3, #0 + 803f29a: d13c bne.n 803f316 LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Can't move over header in packet")); } else { err_t ret; struct ip_hdr *iphdr = (struct ip_hdr *)p->payload; - 803f26c: 687b ldr r3, [r7, #4] - 803f26e: 685b ldr r3, [r3, #4] - 803f270: 60fb str r3, [r7, #12] + 803f29c: 687b ldr r3, [r7, #4] + 803f29e: 685b ldr r3, [r3, #4] + 803f2a0: 60fb str r3, [r7, #12] ip4_addr_copy(iphdr->src, *src); - 803f272: 69fb ldr r3, [r7, #28] - 803f274: 681a ldr r2, [r3, #0] - 803f276: 68fb ldr r3, [r7, #12] - 803f278: 60da str r2, [r3, #12] + 803f2a2: 69fb ldr r3, [r7, #28] + 803f2a4: 681a ldr r2, [r3, #0] + 803f2a6: 68fb ldr r3, [r7, #12] + 803f2a8: 60da str r2, [r3, #12] ip4_addr_copy(iphdr->dest, *ip4_current_src_addr()); - 803f27a: 4b29 ldr r3, [pc, #164] ; (803f320 ) - 803f27c: 691a ldr r2, [r3, #16] - 803f27e: 68fb ldr r3, [r7, #12] - 803f280: 611a str r2, [r3, #16] + 803f2aa: 4b29 ldr r3, [pc, #164] ; (803f350 ) + 803f2ac: 691a ldr r2, [r3, #16] + 803f2ae: 68fb ldr r3, [r7, #12] + 803f2b0: 611a str r2, [r3, #16] ICMPH_TYPE_SET(iecho, ICMP_ER); - 803f282: 693b ldr r3, [r7, #16] - 803f284: 2200 movs r2, #0 - 803f286: 701a strb r2, [r3, #0] + 803f2b2: 693b ldr r3, [r7, #16] + 803f2b4: 2200 movs r2, #0 + 803f2b6: 701a strb r2, [r3, #0] #if CHECKSUM_GEN_ICMP IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_GEN_ICMP) { /* adjust the checksum */ if (iecho->chksum > PP_HTONS(0xffffU - (ICMP_ECHO << 8))) { - 803f288: 693b ldr r3, [r7, #16] - 803f28a: 885b ldrh r3, [r3, #2] - 803f28c: b29b uxth r3, r3 - 803f28e: f64f 72f7 movw r2, #65527 ; 0xfff7 - 803f292: 4293 cmp r3, r2 - 803f294: d907 bls.n 803f2a6 + 803f2b8: 693b ldr r3, [r7, #16] + 803f2ba: 885b ldrh r3, [r3, #2] + 803f2bc: b29b uxth r3, r3 + 803f2be: f64f 72f7 movw r2, #65527 ; 0xfff7 + 803f2c2: 4293 cmp r3, r2 + 803f2c4: d907 bls.n 803f2d6 iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS((u16_t)(ICMP_ECHO << 8)) + 1); - 803f296: 693b ldr r3, [r7, #16] - 803f298: 885b ldrh r3, [r3, #2] - 803f29a: b29b uxth r3, r3 - 803f29c: 3309 adds r3, #9 - 803f29e: b29a uxth r2, r3 - 803f2a0: 693b ldr r3, [r7, #16] - 803f2a2: 805a strh r2, [r3, #2] - 803f2a4: e006 b.n 803f2b4 + 803f2c6: 693b ldr r3, [r7, #16] + 803f2c8: 885b ldrh r3, [r3, #2] + 803f2ca: b29b uxth r3, r3 + 803f2cc: 3309 adds r3, #9 + 803f2ce: b29a uxth r2, r3 + 803f2d0: 693b ldr r3, [r7, #16] + 803f2d2: 805a strh r2, [r3, #2] + 803f2d4: e006 b.n 803f2e4 } else { iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS(ICMP_ECHO << 8)); - 803f2a6: 693b ldr r3, [r7, #16] - 803f2a8: 885b ldrh r3, [r3, #2] - 803f2aa: b29b uxth r3, r3 - 803f2ac: 3308 adds r3, #8 - 803f2ae: b29a uxth r2, r3 - 803f2b0: 693b ldr r3, [r7, #16] - 803f2b2: 805a strh r2, [r3, #2] + 803f2d6: 693b ldr r3, [r7, #16] + 803f2d8: 885b ldrh r3, [r3, #2] + 803f2da: b29b uxth r3, r3 + 803f2dc: 3308 adds r3, #8 + 803f2de: b29a uxth r2, r3 + 803f2e0: 693b ldr r3, [r7, #16] + 803f2e2: 805a strh r2, [r3, #2] #else /* CHECKSUM_GEN_ICMP */ iecho->chksum = 0; #endif /* CHECKSUM_GEN_ICMP */ /* Set the correct TTL and recalculate the header checksum. */ IPH_TTL_SET(iphdr, ICMP_TTL); - 803f2b4: 68fb ldr r3, [r7, #12] - 803f2b6: 22ff movs r2, #255 ; 0xff - 803f2b8: 721a strb r2, [r3, #8] + 803f2e4: 68fb ldr r3, [r7, #12] + 803f2e6: 22ff movs r2, #255 ; 0xff + 803f2e8: 721a strb r2, [r3, #8] IPH_CHKSUM_SET(iphdr, 0); - 803f2ba: 68fb ldr r3, [r7, #12] - 803f2bc: 2200 movs r2, #0 - 803f2be: 729a strb r2, [r3, #10] - 803f2c0: 2200 movs r2, #0 - 803f2c2: 72da strb r2, [r3, #11] + 803f2ea: 68fb ldr r3, [r7, #12] + 803f2ec: 2200 movs r2, #0 + 803f2ee: 729a strb r2, [r3, #10] + 803f2f0: 2200 movs r2, #0 + 803f2f2: 72da strb r2, [r3, #11] MIB2_STATS_INC(mib2.icmpoutmsgs); /* increase number of echo replies attempted to send */ MIB2_STATS_INC(mib2.icmpoutechoreps); /* send an ICMP packet */ ret = ip4_output_if(p, src, LWIP_IP_HDRINCL, - 803f2c4: 683b ldr r3, [r7, #0] - 803f2c6: 9302 str r3, [sp, #8] - 803f2c8: 2301 movs r3, #1 - 803f2ca: 9301 str r3, [sp, #4] - 803f2cc: 2300 movs r3, #0 - 803f2ce: 9300 str r3, [sp, #0] - 803f2d0: 23ff movs r3, #255 ; 0xff - 803f2d2: 2200 movs r2, #0 - 803f2d4: 69f9 ldr r1, [r7, #28] - 803f2d6: 6878 ldr r0, [r7, #4] - 803f2d8: f000 fa80 bl 803f7dc - 803f2dc: 4603 mov r3, r0 - 803f2de: 72fb strb r3, [r7, #11] + 803f2f4: 683b ldr r3, [r7, #0] + 803f2f6: 9302 str r3, [sp, #8] + 803f2f8: 2301 movs r3, #1 + 803f2fa: 9301 str r3, [sp, #4] + 803f2fc: 2300 movs r3, #0 + 803f2fe: 9300 str r3, [sp, #0] + 803f300: 23ff movs r3, #255 ; 0xff + 803f302: 2200 movs r2, #0 + 803f304: 69f9 ldr r1, [r7, #28] + 803f306: 6878 ldr r0, [r7, #4] + 803f308: f000 fa80 bl 803f80c + 803f30c: 4603 mov r3, r0 + 803f30e: 72fb strb r3, [r7, #11] ICMP_TTL, 0, IP_PROTO_ICMP, inp); if (ret != ERR_OK) { LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %s\n", lwip_strerr(ret))); } } break; - 803f2e0: e001 b.n 803f2e6 + 803f310: e001 b.n 803f316 break; - 803f2e2: bf00 nop - 803f2e4: e000 b.n 803f2e8 + 803f312: bf00 nop + 803f314: e000 b.n 803f318 break; - 803f2e6: bf00 nop + 803f316: bf00 nop LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n", (s16_t)type, (s16_t)code)); ICMP_STATS_INC(icmp.proterr); ICMP_STATS_INC(icmp.drop); } pbuf_free(p); - 803f2e8: 6878 ldr r0, [r7, #4] - 803f2ea: f7f8 fa0f bl 803770c + 803f318: 6878 ldr r0, [r7, #4] + 803f31a: f7f8 fa0f bl 803773c return; - 803f2ee: e013 b.n 803f318 + 803f31e: e013 b.n 803f348 goto lenerr; - 803f2f0: bf00 nop - 803f2f2: e002 b.n 803f2fa + 803f320: bf00 nop + 803f322: e002 b.n 803f32a goto lenerr; - 803f2f4: bf00 nop - 803f2f6: e000 b.n 803f2fa + 803f324: bf00 nop + 803f326: e000 b.n 803f32a goto lenerr; - 803f2f8: bf00 nop + 803f328: bf00 nop lenerr: pbuf_free(p); - 803f2fa: 6878 ldr r0, [r7, #4] - 803f2fc: f7f8 fa06 bl 803770c + 803f32a: 6878 ldr r0, [r7, #4] + 803f32c: f7f8 fa06 bl 803773c ICMP_STATS_INC(icmp.lenerr); MIB2_STATS_INC(mib2.icmpinerrors); return; - 803f300: e00a b.n 803f318 + 803f330: e00a b.n 803f348 goto icmperr; - 803f302: bf00 nop - 803f304: e004 b.n 803f310 + 803f332: bf00 nop + 803f334: e004 b.n 803f340 goto icmperr; - 803f306: bf00 nop - 803f308: e002 b.n 803f310 + 803f336: bf00 nop + 803f338: e002 b.n 803f340 goto icmperr; - 803f30a: bf00 nop - 803f30c: e000 b.n 803f310 + 803f33a: bf00 nop + 803f33c: e000 b.n 803f340 goto icmperr; - 803f30e: bf00 nop + 803f33e: bf00 nop #if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING icmperr: pbuf_free(p); - 803f310: 6878 ldr r0, [r7, #4] - 803f312: f7f8 f9fb bl 803770c + 803f340: 6878 ldr r0, [r7, #4] + 803f342: f7f8 f9fb bl 803773c ICMP_STATS_INC(icmp.err); MIB2_STATS_INC(mib2.icmpinerrors); return; - 803f316: bf00 nop + 803f346: bf00 nop #endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */ } - 803f318: 3728 adds r7, #40 ; 0x28 - 803f31a: 46bd mov sp, r7 - 803f31c: bd80 pop {r7, pc} - 803f31e: bf00 nop - 803f320: 2400b9bc .word 0x2400b9bc - 803f324: 2400b9d0 .word 0x2400b9d0 - 803f328: 08044830 .word 0x08044830 - 803f32c: 08044868 .word 0x08044868 - 803f330: 080448a0 .word 0x080448a0 - 803f334: 080448c8 .word 0x080448c8 - -0803f338 : + 803f348: 3728 adds r7, #40 ; 0x28 + 803f34a: 46bd mov sp, r7 + 803f34c: bd80 pop {r7, pc} + 803f34e: bf00 nop + 803f350: 2400b9bc .word 0x2400b9bc + 803f354: 2400b9d0 .word 0x2400b9d0 + 803f358: 08044860 .word 0x08044860 + 803f35c: 08044898 .word 0x08044898 + 803f360: 080448d0 .word 0x080448d0 + 803f364: 080448f8 .word 0x080448f8 + +0803f368 : * p->payload pointing to the IP header * @param t type of the 'unreachable' packet */ void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) { - 803f338: b580 push {r7, lr} - 803f33a: b082 sub sp, #8 - 803f33c: af00 add r7, sp, #0 - 803f33e: 6078 str r0, [r7, #4] - 803f340: 460b mov r3, r1 - 803f342: 70fb strb r3, [r7, #3] + 803f368: b580 push {r7, lr} + 803f36a: b082 sub sp, #8 + 803f36c: af00 add r7, sp, #0 + 803f36e: 6078 str r0, [r7, #4] + 803f370: 460b mov r3, r1 + 803f372: 70fb strb r3, [r7, #3] MIB2_STATS_INC(mib2.icmpoutdestunreachs); icmp_send_response(p, ICMP_DUR, t); - 803f344: 78fb ldrb r3, [r7, #3] - 803f346: 461a mov r2, r3 - 803f348: 2103 movs r1, #3 - 803f34a: 6878 ldr r0, [r7, #4] - 803f34c: f000 f814 bl 803f378 -} - 803f350: bf00 nop - 803f352: 3708 adds r7, #8 - 803f354: 46bd mov sp, r7 - 803f356: bd80 pop {r7, pc} - -0803f358 : + 803f374: 78fb ldrb r3, [r7, #3] + 803f376: 461a mov r2, r3 + 803f378: 2103 movs r1, #3 + 803f37a: 6878 ldr r0, [r7, #4] + 803f37c: f000 f814 bl 803f3a8 +} + 803f380: bf00 nop + 803f382: 3708 adds r7, #8 + 803f384: 46bd mov sp, r7 + 803f386: bd80 pop {r7, pc} + +0803f388 : * p->payload pointing to the IP header * @param t type of the 'time exceeded' packet */ void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) { - 803f358: b580 push {r7, lr} - 803f35a: b082 sub sp, #8 - 803f35c: af00 add r7, sp, #0 - 803f35e: 6078 str r0, [r7, #4] - 803f360: 460b mov r3, r1 - 803f362: 70fb strb r3, [r7, #3] + 803f388: b580 push {r7, lr} + 803f38a: b082 sub sp, #8 + 803f38c: af00 add r7, sp, #0 + 803f38e: 6078 str r0, [r7, #4] + 803f390: 460b mov r3, r1 + 803f392: 70fb strb r3, [r7, #3] MIB2_STATS_INC(mib2.icmpouttimeexcds); icmp_send_response(p, ICMP_TE, t); - 803f364: 78fb ldrb r3, [r7, #3] - 803f366: 461a mov r2, r3 - 803f368: 210b movs r1, #11 - 803f36a: 6878 ldr r0, [r7, #4] - 803f36c: f000 f804 bl 803f378 -} - 803f370: bf00 nop - 803f372: 3708 adds r7, #8 - 803f374: 46bd mov sp, r7 - 803f376: bd80 pop {r7, pc} - -0803f378 : + 803f394: 78fb ldrb r3, [r7, #3] + 803f396: 461a mov r2, r3 + 803f398: 210b movs r1, #11 + 803f39a: 6878 ldr r0, [r7, #4] + 803f39c: f000 f804 bl 803f3a8 +} + 803f3a0: bf00 nop + 803f3a2: 3708 adds r7, #8 + 803f3a4: 46bd mov sp, r7 + 803f3a6: bd80 pop {r7, pc} + +0803f3a8 : * @param type Type of the ICMP header * @param code Code of the ICMP header */ static void icmp_send_response(struct pbuf *p, u8_t type, u8_t code) { - 803f378: b580 push {r7, lr} - 803f37a: b08c sub sp, #48 ; 0x30 - 803f37c: af04 add r7, sp, #16 - 803f37e: 6078 str r0, [r7, #4] - 803f380: 460b mov r3, r1 - 803f382: 70fb strb r3, [r7, #3] - 803f384: 4613 mov r3, r2 - 803f386: 70bb strb r3, [r7, #2] + 803f3a8: b580 push {r7, lr} + 803f3aa: b08c sub sp, #48 ; 0x30 + 803f3ac: af04 add r7, sp, #16 + 803f3ae: 6078 str r0, [r7, #4] + 803f3b0: 460b mov r3, r1 + 803f3b2: 70fb strb r3, [r7, #3] + 803f3b4: 4613 mov r3, r2 + 803f3b6: 70bb strb r3, [r7, #2] /* increase number of messages attempted to send */ MIB2_STATS_INC(mib2.icmpoutmsgs); /* ICMP header + IP header + 8 bytes of data */ q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE, - 803f388: f44f 7220 mov.w r2, #640 ; 0x280 - 803f38c: 2124 movs r1, #36 ; 0x24 - 803f38e: 2022 movs r0, #34 ; 0x22 - 803f390: f7f7 fed8 bl 8037144 - 803f394: 61f8 str r0, [r7, #28] + 803f3b8: f44f 7220 mov.w r2, #640 ; 0x280 + 803f3bc: 2124 movs r1, #36 ; 0x24 + 803f3be: 2022 movs r0, #34 ; 0x22 + 803f3c0: f7f7 fed8 bl 8037174 + 803f3c4: 61f8 str r0, [r7, #28] PBUF_RAM); if (q == NULL) { - 803f396: 69fb ldr r3, [r7, #28] - 803f398: 2b00 cmp r3, #0 - 803f39a: d056 beq.n 803f44a + 803f3c6: 69fb ldr r3, [r7, #28] + 803f3c8: 2b00 cmp r3, #0 + 803f3ca: d056 beq.n 803f47a LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n")); MIB2_STATS_INC(mib2.icmpouterrors); return; } LWIP_ASSERT("check that first pbuf can hold icmp message", - 803f39c: 69fb ldr r3, [r7, #28] - 803f39e: 895b ldrh r3, [r3, #10] - 803f3a0: 2b23 cmp r3, #35 ; 0x23 - 803f3a2: d806 bhi.n 803f3b2 - 803f3a4: 4b2b ldr r3, [pc, #172] ; (803f454 ) - 803f3a6: f44f 72b4 mov.w r2, #360 ; 0x168 - 803f3aa: 492b ldr r1, [pc, #172] ; (803f458 ) - 803f3ac: 482b ldr r0, [pc, #172] ; (803f45c ) - 803f3ae: f001 fb97 bl 8040ae0 + 803f3cc: 69fb ldr r3, [r7, #28] + 803f3ce: 895b ldrh r3, [r3, #10] + 803f3d0: 2b23 cmp r3, #35 ; 0x23 + 803f3d2: d806 bhi.n 803f3e2 + 803f3d4: 4b2b ldr r3, [pc, #172] ; (803f484 ) + 803f3d6: f44f 72b4 mov.w r2, #360 ; 0x168 + 803f3da: 492b ldr r1, [pc, #172] ; (803f488 ) + 803f3dc: 482b ldr r0, [pc, #172] ; (803f48c ) + 803f3de: f001 fb97 bl 8040b10 (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE))); iphdr = (struct ip_hdr *)p->payload; - 803f3b2: 687b ldr r3, [r7, #4] - 803f3b4: 685b ldr r3, [r3, #4] - 803f3b6: 61bb str r3, [r7, #24] + 803f3e2: 687b ldr r3, [r7, #4] + 803f3e4: 685b ldr r3, [r3, #4] + 803f3e6: 61bb str r3, [r7, #24] ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->src); LWIP_DEBUGF(ICMP_DEBUG, (" to ")); ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->dest); LWIP_DEBUGF(ICMP_DEBUG, ("\n")); icmphdr = (struct icmp_echo_hdr *)q->payload; - 803f3b8: 69fb ldr r3, [r7, #28] - 803f3ba: 685b ldr r3, [r3, #4] - 803f3bc: 617b str r3, [r7, #20] + 803f3e8: 69fb ldr r3, [r7, #28] + 803f3ea: 685b ldr r3, [r3, #4] + 803f3ec: 617b str r3, [r7, #20] icmphdr->type = type; - 803f3be: 697b ldr r3, [r7, #20] - 803f3c0: 78fa ldrb r2, [r7, #3] - 803f3c2: 701a strb r2, [r3, #0] + 803f3ee: 697b ldr r3, [r7, #20] + 803f3f0: 78fa ldrb r2, [r7, #3] + 803f3f2: 701a strb r2, [r3, #0] icmphdr->code = code; - 803f3c4: 697b ldr r3, [r7, #20] - 803f3c6: 78ba ldrb r2, [r7, #2] - 803f3c8: 705a strb r2, [r3, #1] + 803f3f4: 697b ldr r3, [r7, #20] + 803f3f6: 78ba ldrb r2, [r7, #2] + 803f3f8: 705a strb r2, [r3, #1] icmphdr->id = 0; - 803f3ca: 697b ldr r3, [r7, #20] - 803f3cc: 2200 movs r2, #0 - 803f3ce: 711a strb r2, [r3, #4] - 803f3d0: 2200 movs r2, #0 - 803f3d2: 715a strb r2, [r3, #5] + 803f3fa: 697b ldr r3, [r7, #20] + 803f3fc: 2200 movs r2, #0 + 803f3fe: 711a strb r2, [r3, #4] + 803f400: 2200 movs r2, #0 + 803f402: 715a strb r2, [r3, #5] icmphdr->seqno = 0; - 803f3d4: 697b ldr r3, [r7, #20] - 803f3d6: 2200 movs r2, #0 - 803f3d8: 719a strb r2, [r3, #6] - 803f3da: 2200 movs r2, #0 - 803f3dc: 71da strb r2, [r3, #7] + 803f404: 697b ldr r3, [r7, #20] + 803f406: 2200 movs r2, #0 + 803f408: 719a strb r2, [r3, #6] + 803f40a: 2200 movs r2, #0 + 803f40c: 71da strb r2, [r3, #7] /* copy fields from original packet */ SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload, - 803f3de: 69fb ldr r3, [r7, #28] - 803f3e0: 685b ldr r3, [r3, #4] - 803f3e2: f103 0008 add.w r0, r3, #8 - 803f3e6: 687b ldr r3, [r7, #4] - 803f3e8: 685b ldr r3, [r3, #4] - 803f3ea: 221c movs r2, #28 - 803f3ec: 4619 mov r1, r3 - 803f3ee: f001 fa67 bl 80408c0 + 803f40e: 69fb ldr r3, [r7, #28] + 803f410: 685b ldr r3, [r3, #4] + 803f412: f103 0008 add.w r0, r3, #8 + 803f416: 687b ldr r3, [r7, #4] + 803f418: 685b ldr r3, [r3, #4] + 803f41a: 221c movs r2, #28 + 803f41c: 4619 mov r1, r3 + 803f41e: f001 fa67 bl 80408f0 IP_HLEN + ICMP_DEST_UNREACH_DATASIZE); ip4_addr_copy(iphdr_src, iphdr->src); - 803f3f2: 69bb ldr r3, [r7, #24] - 803f3f4: 68db ldr r3, [r3, #12] - 803f3f6: 60fb str r3, [r7, #12] + 803f422: 69bb ldr r3, [r7, #24] + 803f424: 68db ldr r3, [r3, #12] + 803f426: 60fb str r3, [r7, #12] ip4_addr_t iphdr_dst; ip4_addr_copy(iphdr_dst, iphdr->dest); netif = ip4_route_src(&iphdr_dst, &iphdr_src); } #else netif = ip4_route(&iphdr_src); - 803f3f8: f107 030c add.w r3, r7, #12 - 803f3fc: 4618 mov r0, r3 - 803f3fe: f000 f82f bl 803f460 - 803f402: 6138 str r0, [r7, #16] + 803f428: f107 030c add.w r3, r7, #12 + 803f42c: 4618 mov r0, r3 + 803f42e: f000 f82f bl 803f490 + 803f432: 6138 str r0, [r7, #16] #endif if (netif != NULL) { - 803f404: 693b ldr r3, [r7, #16] - 803f406: 2b00 cmp r3, #0 - 803f408: d01b beq.n 803f442 + 803f434: 693b ldr r3, [r7, #16] + 803f436: 2b00 cmp r3, #0 + 803f438: d01b beq.n 803f472 /* calculate checksum */ icmphdr->chksum = 0; - 803f40a: 697b ldr r3, [r7, #20] - 803f40c: 2200 movs r2, #0 - 803f40e: 709a strb r2, [r3, #2] - 803f410: 2200 movs r2, #0 - 803f412: 70da strb r2, [r3, #3] + 803f43a: 697b ldr r3, [r7, #20] + 803f43c: 2200 movs r2, #0 + 803f43e: 709a strb r2, [r3, #2] + 803f440: 2200 movs r2, #0 + 803f442: 70da strb r2, [r3, #3] #if CHECKSUM_GEN_ICMP IF__NETIF_CHECKSUM_ENABLED(netif, NETIF_CHECKSUM_GEN_ICMP) { icmphdr->chksum = inet_chksum(icmphdr, q->len); - 803f414: 69fb ldr r3, [r7, #28] - 803f416: 895b ldrh r3, [r3, #10] - 803f418: 4619 mov r1, r3 - 803f41a: 6978 ldr r0, [r7, #20] - 803f41c: f7f6 fdcf bl 8035fbe - 803f420: 4603 mov r3, r0 - 803f422: 461a mov r2, r3 - 803f424: 697b ldr r3, [r7, #20] - 803f426: 805a strh r2, [r3, #2] + 803f444: 69fb ldr r3, [r7, #28] + 803f446: 895b ldrh r3, [r3, #10] + 803f448: 4619 mov r1, r3 + 803f44a: 6978 ldr r0, [r7, #20] + 803f44c: f7f6 fdcf bl 8035fee + 803f450: 4603 mov r3, r0 + 803f452: 461a mov r2, r3 + 803f454: 697b ldr r3, [r7, #20] + 803f456: 805a strh r2, [r3, #2] } #endif ICMP_STATS_INC(icmp.xmit); ip4_output_if(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP, netif); - 803f428: f107 020c add.w r2, r7, #12 - 803f42c: 693b ldr r3, [r7, #16] - 803f42e: 9302 str r3, [sp, #8] - 803f430: 2301 movs r3, #1 - 803f432: 9301 str r3, [sp, #4] - 803f434: 2300 movs r3, #0 - 803f436: 9300 str r3, [sp, #0] - 803f438: 23ff movs r3, #255 ; 0xff - 803f43a: 2100 movs r1, #0 - 803f43c: 69f8 ldr r0, [r7, #28] - 803f43e: f000 f9cd bl 803f7dc + 803f458: f107 020c add.w r2, r7, #12 + 803f45c: 693b ldr r3, [r7, #16] + 803f45e: 9302 str r3, [sp, #8] + 803f460: 2301 movs r3, #1 + 803f462: 9301 str r3, [sp, #4] + 803f464: 2300 movs r3, #0 + 803f466: 9300 str r3, [sp, #0] + 803f468: 23ff movs r3, #255 ; 0xff + 803f46a: 2100 movs r1, #0 + 803f46c: 69f8 ldr r0, [r7, #28] + 803f46e: f000 f9cd bl 803f80c } pbuf_free(q); - 803f442: 69f8 ldr r0, [r7, #28] - 803f444: f7f8 f962 bl 803770c - 803f448: e000 b.n 803f44c + 803f472: 69f8 ldr r0, [r7, #28] + 803f474: f7f8 f962 bl 803773c + 803f478: e000 b.n 803f47c return; - 803f44a: bf00 nop + 803f47a: bf00 nop } - 803f44c: 3720 adds r7, #32 - 803f44e: 46bd mov sp, r7 - 803f450: bd80 pop {r7, pc} - 803f452: bf00 nop - 803f454: 08044830 .word 0x08044830 - 803f458: 080448fc .word 0x080448fc - 803f45c: 080448a0 .word 0x080448a0 + 803f47c: 3720 adds r7, #32 + 803f47e: 46bd mov sp, r7 + 803f480: bd80 pop {r7, pc} + 803f482: bf00 nop + 803f484: 08044860 .word 0x08044860 + 803f488: 0804492c .word 0x0804492c + 803f48c: 080448d0 .word 0x080448d0 -0803f460 : +0803f490 : * @param dest the destination IP address for which to find the route * @return the netif on which to send to reach dest */ struct netif * ip4_route(const ip4_addr_t *dest) { - 803f460: b480 push {r7} - 803f462: b085 sub sp, #20 - 803f464: af00 add r7, sp, #0 - 803f466: 6078 str r0, [r7, #4] + 803f490: b480 push {r7} + 803f492: b085 sub sp, #20 + 803f494: af00 add r7, sp, #0 + 803f496: 6078 str r0, [r7, #4] /* bug #54569: in case LWIP_SINGLE_NETIF=1 and LWIP_DEBUGF() disabled, the following loop is optimized away */ LWIP_UNUSED_ARG(dest); /* iterate through netifs */ NETIF_FOREACH(netif) { - 803f468: 4b33 ldr r3, [pc, #204] ; (803f538 ) - 803f46a: 681b ldr r3, [r3, #0] - 803f46c: 60fb str r3, [r7, #12] - 803f46e: e036 b.n 803f4de + 803f498: 4b33 ldr r3, [pc, #204] ; (803f568 ) + 803f49a: 681b ldr r3, [r3, #0] + 803f49c: 60fb str r3, [r7, #12] + 803f49e: e036 b.n 803f50e /* is the netif up, does it have a link and a valid address? */ if (netif_is_up(netif) && netif_is_link_up(netif) && !ip4_addr_isany_val(*netif_ip4_addr(netif))) { - 803f470: 68fb ldr r3, [r7, #12] - 803f472: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f476: f003 0301 and.w r3, r3, #1 - 803f47a: b2db uxtb r3, r3 - 803f47c: 2b00 cmp r3, #0 - 803f47e: d02b beq.n 803f4d8 - 803f480: 68fb ldr r3, [r7, #12] - 803f482: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f486: 089b lsrs r3, r3, #2 - 803f488: f003 0301 and.w r3, r3, #1 - 803f48c: b2db uxtb r3, r3 - 803f48e: 2b00 cmp r3, #0 - 803f490: d022 beq.n 803f4d8 - 803f492: 68fb ldr r3, [r7, #12] - 803f494: 3304 adds r3, #4 - 803f496: 681b ldr r3, [r3, #0] - 803f498: 2b00 cmp r3, #0 - 803f49a: d01d beq.n 803f4d8 + 803f4a0: 68fb ldr r3, [r7, #12] + 803f4a2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f4a6: f003 0301 and.w r3, r3, #1 + 803f4aa: b2db uxtb r3, r3 + 803f4ac: 2b00 cmp r3, #0 + 803f4ae: d02b beq.n 803f508 + 803f4b0: 68fb ldr r3, [r7, #12] + 803f4b2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f4b6: 089b lsrs r3, r3, #2 + 803f4b8: f003 0301 and.w r3, r3, #1 + 803f4bc: b2db uxtb r3, r3 + 803f4be: 2b00 cmp r3, #0 + 803f4c0: d022 beq.n 803f508 + 803f4c2: 68fb ldr r3, [r7, #12] + 803f4c4: 3304 adds r3, #4 + 803f4c6: 681b ldr r3, [r3, #0] + 803f4c8: 2b00 cmp r3, #0 + 803f4ca: d01d beq.n 803f508 /* network mask matches? */ if (ip4_addr_netcmp(dest, netif_ip4_addr(netif), netif_ip4_netmask(netif))) { - 803f49c: 687b ldr r3, [r7, #4] - 803f49e: 681a ldr r2, [r3, #0] - 803f4a0: 68fb ldr r3, [r7, #12] - 803f4a2: 3304 adds r3, #4 - 803f4a4: 681b ldr r3, [r3, #0] - 803f4a6: 405a eors r2, r3 - 803f4a8: 68fb ldr r3, [r7, #12] - 803f4aa: 3308 adds r3, #8 - 803f4ac: 681b ldr r3, [r3, #0] - 803f4ae: 4013 ands r3, r2 - 803f4b0: 2b00 cmp r3, #0 - 803f4b2: d101 bne.n 803f4b8 + 803f4cc: 687b ldr r3, [r7, #4] + 803f4ce: 681a ldr r2, [r3, #0] + 803f4d0: 68fb ldr r3, [r7, #12] + 803f4d2: 3304 adds r3, #4 + 803f4d4: 681b ldr r3, [r3, #0] + 803f4d6: 405a eors r2, r3 + 803f4d8: 68fb ldr r3, [r7, #12] + 803f4da: 3308 adds r3, #8 + 803f4dc: 681b ldr r3, [r3, #0] + 803f4de: 4013 ands r3, r2 + 803f4e0: 2b00 cmp r3, #0 + 803f4e2: d101 bne.n 803f4e8 /* return netif on which to forward IP packet */ return netif; - 803f4b4: 68fb ldr r3, [r7, #12] - 803f4b6: e038 b.n 803f52a + 803f4e4: 68fb ldr r3, [r7, #12] + 803f4e6: e038 b.n 803f55a } /* gateway matches on a non broadcast interface? (i.e. peer in a point to point interface) */ if (((netif->flags & NETIF_FLAG_BROADCAST) == 0) && ip4_addr_cmp(dest, netif_ip4_gw(netif))) { - 803f4b8: 68fb ldr r3, [r7, #12] - 803f4ba: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f4be: f003 0302 and.w r3, r3, #2 - 803f4c2: 2b00 cmp r3, #0 - 803f4c4: d108 bne.n 803f4d8 - 803f4c6: 687b ldr r3, [r7, #4] - 803f4c8: 681a ldr r2, [r3, #0] - 803f4ca: 68fb ldr r3, [r7, #12] - 803f4cc: 330c adds r3, #12 - 803f4ce: 681b ldr r3, [r3, #0] - 803f4d0: 429a cmp r2, r3 - 803f4d2: d101 bne.n 803f4d8 + 803f4e8: 68fb ldr r3, [r7, #12] + 803f4ea: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f4ee: f003 0302 and.w r3, r3, #2 + 803f4f2: 2b00 cmp r3, #0 + 803f4f4: d108 bne.n 803f508 + 803f4f6: 687b ldr r3, [r7, #4] + 803f4f8: 681a ldr r2, [r3, #0] + 803f4fa: 68fb ldr r3, [r7, #12] + 803f4fc: 330c adds r3, #12 + 803f4fe: 681b ldr r3, [r3, #0] + 803f500: 429a cmp r2, r3 + 803f502: d101 bne.n 803f508 /* return netif on which to forward IP packet */ return netif; - 803f4d4: 68fb ldr r3, [r7, #12] - 803f4d6: e028 b.n 803f52a + 803f504: 68fb ldr r3, [r7, #12] + 803f506: e028 b.n 803f55a NETIF_FOREACH(netif) { - 803f4d8: 68fb ldr r3, [r7, #12] - 803f4da: 681b ldr r3, [r3, #0] - 803f4dc: 60fb str r3, [r7, #12] - 803f4de: 68fb ldr r3, [r7, #12] - 803f4e0: 2b00 cmp r3, #0 - 803f4e2: d1c5 bne.n 803f470 + 803f508: 68fb ldr r3, [r7, #12] + 803f50a: 681b ldr r3, [r3, #0] + 803f50c: 60fb str r3, [r7, #12] + 803f50e: 68fb ldr r3, [r7, #12] + 803f510: 2b00 cmp r3, #0 + 803f512: d1c5 bne.n 803f4a0 return netif; } #endif #endif /* !LWIP_SINGLE_NETIF */ if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) || - 803f4e4: 4b15 ldr r3, [pc, #84] ; (803f53c ) - 803f4e6: 681b ldr r3, [r3, #0] - 803f4e8: 2b00 cmp r3, #0 - 803f4ea: d01a beq.n 803f522 - 803f4ec: 4b13 ldr r3, [pc, #76] ; (803f53c ) - 803f4ee: 681b ldr r3, [r3, #0] - 803f4f0: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f4f4: f003 0301 and.w r3, r3, #1 - 803f4f8: 2b00 cmp r3, #0 - 803f4fa: d012 beq.n 803f522 - 803f4fc: 4b0f ldr r3, [pc, #60] ; (803f53c ) - 803f4fe: 681b ldr r3, [r3, #0] - 803f500: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f504: f003 0304 and.w r3, r3, #4 - 803f508: 2b00 cmp r3, #0 - 803f50a: d00a beq.n 803f522 + 803f514: 4b15 ldr r3, [pc, #84] ; (803f56c ) + 803f516: 681b ldr r3, [r3, #0] + 803f518: 2b00 cmp r3, #0 + 803f51a: d01a beq.n 803f552 + 803f51c: 4b13 ldr r3, [pc, #76] ; (803f56c ) + 803f51e: 681b ldr r3, [r3, #0] + 803f520: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f524: f003 0301 and.w r3, r3, #1 + 803f528: 2b00 cmp r3, #0 + 803f52a: d012 beq.n 803f552 + 803f52c: 4b0f ldr r3, [pc, #60] ; (803f56c ) + 803f52e: 681b ldr r3, [r3, #0] + 803f530: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f534: f003 0304 and.w r3, r3, #4 + 803f538: 2b00 cmp r3, #0 + 803f53a: d00a beq.n 803f552 ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) { - 803f50c: 4b0b ldr r3, [pc, #44] ; (803f53c ) - 803f50e: 681b ldr r3, [r3, #0] - 803f510: 3304 adds r3, #4 - 803f512: 681b ldr r3, [r3, #0] + 803f53c: 4b0b ldr r3, [pc, #44] ; (803f56c ) + 803f53e: 681b ldr r3, [r3, #0] + 803f540: 3304 adds r3, #4 + 803f542: 681b ldr r3, [r3, #0] if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) || - 803f514: 2b00 cmp r3, #0 - 803f516: d004 beq.n 803f522 + 803f544: 2b00 cmp r3, #0 + 803f546: d004 beq.n 803f552 ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) { - 803f518: 687b ldr r3, [r7, #4] - 803f51a: 681b ldr r3, [r3, #0] - 803f51c: b2db uxtb r3, r3 - 803f51e: 2b7f cmp r3, #127 ; 0x7f - 803f520: d101 bne.n 803f526 + 803f548: 687b ldr r3, [r7, #4] + 803f54a: 681b ldr r3, [r3, #0] + 803f54c: b2db uxtb r3, r3 + 803f54e: 2b7f cmp r3, #127 ; 0x7f + 803f550: d101 bne.n 803f556 If this is not good enough for you, use LWIP_HOOK_IP4_ROUTE() */ LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest))); IP_STATS_INC(ip.rterr); MIB2_STATS_INC(mib2.ipoutnoroutes); return NULL; - 803f522: 2300 movs r3, #0 - 803f524: e001 b.n 803f52a + 803f552: 2300 movs r3, #0 + 803f554: e001 b.n 803f55a } return netif_default; - 803f526: 4b05 ldr r3, [pc, #20] ; (803f53c ) - 803f528: 681b ldr r3, [r3, #0] -} - 803f52a: 4618 mov r0, r3 - 803f52c: 3714 adds r7, #20 - 803f52e: 46bd mov sp, r7 - 803f530: f85d 7b04 ldr.w r7, [sp], #4 - 803f534: 4770 bx lr - 803f536: bf00 nop - 803f538: 2400e94c .word 0x2400e94c - 803f53c: 2400e950 .word 0x2400e950 - -0803f540 : + 803f556: 4b05 ldr r3, [pc, #20] ; (803f56c ) + 803f558: 681b ldr r3, [r3, #0] +} + 803f55a: 4618 mov r0, r3 + 803f55c: 3714 adds r7, #20 + 803f55e: 46bd mov sp, r7 + 803f560: f85d 7b04 ldr.w r7, [sp], #4 + 803f564: 4770 bx lr + 803f566: bf00 nop + 803f568: 2400e94c .word 0x2400e94c + 803f56c: 2400e950 .word 0x2400e950 + +0803f570 : #endif /* IP_FORWARD */ /** Return true if the current input packet should be accepted on this netif */ static int ip4_input_accept(struct netif *netif) { - 803f540: b580 push {r7, lr} - 803f542: b082 sub sp, #8 - 803f544: af00 add r7, sp, #0 - 803f546: 6078 str r0, [r7, #4] + 803f570: b580 push {r7, lr} + 803f572: b082 sub sp, #8 + 803f574: af00 add r7, sp, #0 + 803f576: 6078 str r0, [r7, #4] ip4_addr_get_u32(ip4_current_dest_addr()) & ip4_addr_get_u32(netif_ip4_netmask(netif)), ip4_addr_get_u32(netif_ip4_addr(netif)) & ip4_addr_get_u32(netif_ip4_netmask(netif)), ip4_addr_get_u32(ip4_current_dest_addr()) & ~ip4_addr_get_u32(netif_ip4_netmask(netif)))); /* interface is up and configured? */ if ((netif_is_up(netif)) && (!ip4_addr_isany_val(*netif_ip4_addr(netif)))) { - 803f548: 687b ldr r3, [r7, #4] - 803f54a: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f54e: f003 0301 and.w r3, r3, #1 - 803f552: b2db uxtb r3, r3 - 803f554: 2b00 cmp r3, #0 - 803f556: d016 beq.n 803f586 - 803f558: 687b ldr r3, [r7, #4] - 803f55a: 3304 adds r3, #4 - 803f55c: 681b ldr r3, [r3, #0] - 803f55e: 2b00 cmp r3, #0 - 803f560: d011 beq.n 803f586 + 803f578: 687b ldr r3, [r7, #4] + 803f57a: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f57e: f003 0301 and.w r3, r3, #1 + 803f582: b2db uxtb r3, r3 + 803f584: 2b00 cmp r3, #0 + 803f586: d016 beq.n 803f5b6 + 803f588: 687b ldr r3, [r7, #4] + 803f58a: 3304 adds r3, #4 + 803f58c: 681b ldr r3, [r3, #0] + 803f58e: 2b00 cmp r3, #0 + 803f590: d011 beq.n 803f5b6 /* unicast to this interface address? */ if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) || - 803f562: 4b0b ldr r3, [pc, #44] ; (803f590 ) - 803f564: 695a ldr r2, [r3, #20] - 803f566: 687b ldr r3, [r7, #4] - 803f568: 3304 adds r3, #4 - 803f56a: 681b ldr r3, [r3, #0] - 803f56c: 429a cmp r2, r3 - 803f56e: d008 beq.n 803f582 + 803f592: 4b0b ldr r3, [pc, #44] ; (803f5c0 ) + 803f594: 695a ldr r2, [r3, #20] + 803f596: 687b ldr r3, [r7, #4] + 803f598: 3304 adds r3, #4 + 803f59a: 681b ldr r3, [r3, #0] + 803f59c: 429a cmp r2, r3 + 803f59e: d008 beq.n 803f5b2 /* or broadcast on this interface network address? */ ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) - 803f570: 4b07 ldr r3, [pc, #28] ; (803f590 ) - 803f572: 695b ldr r3, [r3, #20] - 803f574: 6879 ldr r1, [r7, #4] - 803f576: 4618 mov r0, r3 - 803f578: f000 fa08 bl 803f98c - 803f57c: 4603 mov r3, r0 + 803f5a0: 4b07 ldr r3, [pc, #28] ; (803f5c0 ) + 803f5a2: 695b ldr r3, [r3, #20] + 803f5a4: 6879 ldr r1, [r7, #4] + 803f5a6: 4618 mov r0, r3 + 803f5a8: f000 fa08 bl 803f9bc + 803f5ac: 4603 mov r3, r0 if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) || - 803f57e: 2b00 cmp r3, #0 - 803f580: d001 beq.n 803f586 + 803f5ae: 2b00 cmp r3, #0 + 803f5b0: d001 beq.n 803f5b6 #endif /* LWIP_NETIF_LOOPBACK && !LWIP_HAVE_LOOPIF */ ) { LWIP_DEBUGF(IP_DEBUG, ("ip4_input: packet accepted on interface %c%c\n", netif->name[0], netif->name[1])); /* accept on this netif */ return 1; - 803f582: 2301 movs r3, #1 - 803f584: e000 b.n 803f588 + 803f5b2: 2301 movs r3, #1 + 803f5b4: e000 b.n 803f5b8 /* accept on this netif */ return 1; } #endif /* LWIP_AUTOIP */ } return 0; - 803f586: 2300 movs r3, #0 + 803f5b6: 2300 movs r3, #0 } - 803f588: 4618 mov r0, r3 - 803f58a: 3708 adds r7, #8 - 803f58c: 46bd mov sp, r7 - 803f58e: bd80 pop {r7, pc} - 803f590: 2400b9bc .word 0x2400b9bc + 803f5b8: 4618 mov r0, r3 + 803f5ba: 3708 adds r7, #8 + 803f5bc: 46bd mov sp, r7 + 803f5be: bd80 pop {r7, pc} + 803f5c0: 2400b9bc .word 0x2400b9bc -0803f594 : +0803f5c4 : * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't * processed, but currently always returns ERR_OK) */ err_t ip4_input(struct pbuf *p, struct netif *inp) { - 803f594: b580 push {r7, lr} - 803f596: b086 sub sp, #24 - 803f598: af00 add r7, sp, #0 - 803f59a: 6078 str r0, [r7, #4] - 803f59c: 6039 str r1, [r7, #0] + 803f5c4: b580 push {r7, lr} + 803f5c6: b086 sub sp, #24 + 803f5c8: af00 add r7, sp, #0 + 803f5ca: 6078 str r0, [r7, #4] + 803f5cc: 6039 str r1, [r7, #0] IP_STATS_INC(ip.recv); MIB2_STATS_INC(mib2.ipinreceives); /* identify the IP header */ iphdr = (struct ip_hdr *)p->payload; - 803f59e: 687b ldr r3, [r7, #4] - 803f5a0: 685b ldr r3, [r3, #4] - 803f5a2: 617b str r3, [r7, #20] + 803f5ce: 687b ldr r3, [r7, #4] + 803f5d0: 685b ldr r3, [r3, #4] + 803f5d2: 617b str r3, [r7, #20] if (IPH_V(iphdr) != 4) { - 803f5a4: 697b ldr r3, [r7, #20] - 803f5a6: 781b ldrb r3, [r3, #0] - 803f5a8: 091b lsrs r3, r3, #4 - 803f5aa: b2db uxtb r3, r3 - 803f5ac: 2b04 cmp r3, #4 - 803f5ae: d004 beq.n 803f5ba + 803f5d4: 697b ldr r3, [r7, #20] + 803f5d6: 781b ldrb r3, [r3, #0] + 803f5d8: 091b lsrs r3, r3, #4 + 803f5da: b2db uxtb r3, r3 + 803f5dc: 2b04 cmp r3, #4 + 803f5de: d004 beq.n 803f5ea LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", (u16_t)IPH_V(iphdr))); ip4_debug_print(p); pbuf_free(p); - 803f5b0: 6878 ldr r0, [r7, #4] - 803f5b2: f7f8 f8ab bl 803770c + 803f5e0: 6878 ldr r0, [r7, #4] + 803f5e2: f7f8 f8ab bl 803773c IP_STATS_INC(ip.err); IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipinhdrerrors); return ERR_OK; - 803f5b6: 2300 movs r3, #0 - 803f5b8: e107 b.n 803f7ca + 803f5e6: 2300 movs r3, #0 + 803f5e8: e107 b.n 803f7fa return ERR_OK; } #endif /* obtain IP header length in bytes */ iphdr_hlen = IPH_HL_BYTES(iphdr); - 803f5ba: 697b ldr r3, [r7, #20] - 803f5bc: 781b ldrb r3, [r3, #0] - 803f5be: f003 030f and.w r3, r3, #15 - 803f5c2: b2db uxtb r3, r3 - 803f5c4: 009b lsls r3, r3, #2 - 803f5c6: b2db uxtb r3, r3 - 803f5c8: 81fb strh r3, [r7, #14] + 803f5ea: 697b ldr r3, [r7, #20] + 803f5ec: 781b ldrb r3, [r3, #0] + 803f5ee: f003 030f and.w r3, r3, #15 + 803f5f2: b2db uxtb r3, r3 + 803f5f4: 009b lsls r3, r3, #2 + 803f5f6: b2db uxtb r3, r3 + 803f5f8: 81fb strh r3, [r7, #14] /* obtain ip length in bytes */ iphdr_len = lwip_ntohs(IPH_LEN(iphdr)); - 803f5ca: 697b ldr r3, [r7, #20] - 803f5cc: 885b ldrh r3, [r3, #2] - 803f5ce: b29b uxth r3, r3 - 803f5d0: 4618 mov r0, r3 - 803f5d2: f7f6 fc69 bl 8035ea8 - 803f5d6: 4603 mov r3, r0 - 803f5d8: 81bb strh r3, [r7, #12] + 803f5fa: 697b ldr r3, [r7, #20] + 803f5fc: 885b ldrh r3, [r3, #2] + 803f5fe: b29b uxth r3, r3 + 803f600: 4618 mov r0, r3 + 803f602: f7f6 fc69 bl 8035ed8 + 803f606: 4603 mov r3, r0 + 803f608: 81bb strh r3, [r7, #12] /* Trim pbuf. This is especially required for packets < 60 bytes. */ if (iphdr_len < p->tot_len) { - 803f5da: 687b ldr r3, [r7, #4] - 803f5dc: 891b ldrh r3, [r3, #8] - 803f5de: 89ba ldrh r2, [r7, #12] - 803f5e0: 429a cmp r2, r3 - 803f5e2: d204 bcs.n 803f5ee + 803f60a: 687b ldr r3, [r7, #4] + 803f60c: 891b ldrh r3, [r3, #8] + 803f60e: 89ba ldrh r2, [r7, #12] + 803f610: 429a cmp r2, r3 + 803f612: d204 bcs.n 803f61e pbuf_realloc(p, iphdr_len); - 803f5e4: 89bb ldrh r3, [r7, #12] - 803f5e6: 4619 mov r1, r3 - 803f5e8: 6878 ldr r0, [r7, #4] - 803f5ea: f7f7 ff09 bl 8037400 + 803f614: 89bb ldrh r3, [r7, #12] + 803f616: 4619 mov r1, r3 + 803f618: 6878 ldr r0, [r7, #4] + 803f61a: f7f7 ff09 bl 8037430 } /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */ if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len) || (iphdr_hlen < IP_HLEN)) { - 803f5ee: 687b ldr r3, [r7, #4] - 803f5f0: 895b ldrh r3, [r3, #10] - 803f5f2: 89fa ldrh r2, [r7, #14] - 803f5f4: 429a cmp r2, r3 - 803f5f6: d807 bhi.n 803f608 - 803f5f8: 687b ldr r3, [r7, #4] - 803f5fa: 891b ldrh r3, [r3, #8] - 803f5fc: 89ba ldrh r2, [r7, #12] - 803f5fe: 429a cmp r2, r3 - 803f600: d802 bhi.n 803f608 - 803f602: 89fb ldrh r3, [r7, #14] - 803f604: 2b13 cmp r3, #19 - 803f606: d804 bhi.n 803f612 + 803f61e: 687b ldr r3, [r7, #4] + 803f620: 895b ldrh r3, [r3, #10] + 803f622: 89fa ldrh r2, [r7, #14] + 803f624: 429a cmp r2, r3 + 803f626: d807 bhi.n 803f638 + 803f628: 687b ldr r3, [r7, #4] + 803f62a: 891b ldrh r3, [r3, #8] + 803f62c: 89ba ldrh r2, [r7, #12] + 803f62e: 429a cmp r2, r3 + 803f630: d802 bhi.n 803f638 + 803f632: 89fb ldrh r3, [r7, #14] + 803f634: 2b13 cmp r3, #19 + 803f636: d804 bhi.n 803f642 LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n", iphdr_len, p->tot_len)); } /* free (drop) packet pbufs */ pbuf_free(p); - 803f608: 6878 ldr r0, [r7, #4] - 803f60a: f7f8 f87f bl 803770c + 803f638: 6878 ldr r0, [r7, #4] + 803f63a: f7f8 f87f bl 803773c IP_STATS_INC(ip.lenerr); IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipindiscards); return ERR_OK; - 803f60e: 2300 movs r3, #0 - 803f610: e0db b.n 803f7ca + 803f63e: 2300 movs r3, #0 + 803f640: e0db b.n 803f7fa } } #endif /* copy IP addresses to aligned ip_addr_t */ ip_addr_copy_from_ip4(ip_data.current_iphdr_dest, iphdr->dest); - 803f612: 697b ldr r3, [r7, #20] - 803f614: 691b ldr r3, [r3, #16] - 803f616: 4a6f ldr r2, [pc, #444] ; (803f7d4 ) - 803f618: 6153 str r3, [r2, #20] + 803f642: 697b ldr r3, [r7, #20] + 803f644: 691b ldr r3, [r3, #16] + 803f646: 4a6f ldr r2, [pc, #444] ; (803f804 ) + 803f648: 6153 str r3, [r2, #20] ip_addr_copy_from_ip4(ip_data.current_iphdr_src, iphdr->src); - 803f61a: 697b ldr r3, [r7, #20] - 803f61c: 68db ldr r3, [r3, #12] - 803f61e: 4a6d ldr r2, [pc, #436] ; (803f7d4 ) - 803f620: 6113 str r3, [r2, #16] + 803f64a: 697b ldr r3, [r7, #20] + 803f64c: 68db ldr r3, [r3, #12] + 803f64e: 4a6d ldr r2, [pc, #436] ; (803f804 ) + 803f650: 6113 str r3, [r2, #16] /* match packet against an interface, i.e. is this packet for us? */ if (ip4_addr_ismulticast(ip4_current_dest_addr())) { - 803f622: 4b6c ldr r3, [pc, #432] ; (803f7d4 ) - 803f624: 695b ldr r3, [r3, #20] - 803f626: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 803f62a: 2be0 cmp r3, #224 ; 0xe0 - 803f62c: d112 bne.n 803f654 + 803f652: 4b6c ldr r3, [pc, #432] ; (803f804 ) + 803f654: 695b ldr r3, [r3, #20] + 803f656: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803f65a: 2be0 cmp r3, #224 ; 0xe0 + 803f65c: d112 bne.n 803f684 netif = inp; } else { netif = NULL; } #else /* LWIP_IGMP */ if ((netif_is_up(inp)) && (!ip4_addr_isany_val(*netif_ip4_addr(inp)))) { - 803f62e: 683b ldr r3, [r7, #0] - 803f630: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f634: f003 0301 and.w r3, r3, #1 - 803f638: b2db uxtb r3, r3 - 803f63a: 2b00 cmp r3, #0 - 803f63c: d007 beq.n 803f64e - 803f63e: 683b ldr r3, [r7, #0] - 803f640: 3304 adds r3, #4 - 803f642: 681b ldr r3, [r3, #0] - 803f644: 2b00 cmp r3, #0 - 803f646: d002 beq.n 803f64e + 803f65e: 683b ldr r3, [r7, #0] + 803f660: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f664: f003 0301 and.w r3, r3, #1 + 803f668: b2db uxtb r3, r3 + 803f66a: 2b00 cmp r3, #0 + 803f66c: d007 beq.n 803f67e + 803f66e: 683b ldr r3, [r7, #0] + 803f670: 3304 adds r3, #4 + 803f672: 681b ldr r3, [r3, #0] + 803f674: 2b00 cmp r3, #0 + 803f676: d002 beq.n 803f67e netif = inp; - 803f648: 683b ldr r3, [r7, #0] - 803f64a: 613b str r3, [r7, #16] - 803f64c: e02a b.n 803f6a4 + 803f678: 683b ldr r3, [r7, #0] + 803f67a: 613b str r3, [r7, #16] + 803f67c: e02a b.n 803f6d4 } else { netif = NULL; - 803f64e: 2300 movs r3, #0 - 803f650: 613b str r3, [r7, #16] - 803f652: e027 b.n 803f6a4 + 803f67e: 2300 movs r3, #0 + 803f680: 613b str r3, [r7, #16] + 803f682: e027 b.n 803f6d4 } #endif /* LWIP_IGMP */ } else { /* start trying with inp. if that's not acceptable, start walking the list of configured netifs. */ if (ip4_input_accept(inp)) { - 803f654: 6838 ldr r0, [r7, #0] - 803f656: f7ff ff73 bl 803f540 - 803f65a: 4603 mov r3, r0 - 803f65c: 2b00 cmp r3, #0 - 803f65e: d002 beq.n 803f666 + 803f684: 6838 ldr r0, [r7, #0] + 803f686: f7ff ff73 bl 803f570 + 803f68a: 4603 mov r3, r0 + 803f68c: 2b00 cmp r3, #0 + 803f68e: d002 beq.n 803f696 netif = inp; - 803f660: 683b ldr r3, [r7, #0] - 803f662: 613b str r3, [r7, #16] - 803f664: e01e b.n 803f6a4 + 803f690: 683b ldr r3, [r7, #0] + 803f692: 613b str r3, [r7, #16] + 803f694: e01e b.n 803f6d4 } else { netif = NULL; - 803f666: 2300 movs r3, #0 - 803f668: 613b str r3, [r7, #16] + 803f696: 2300 movs r3, #0 + 803f698: 613b str r3, [r7, #16] #if !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF /* Packets sent to the loopback address must not be accepted on an * interface that does not have the loopback address assigned to it, * unless a non-loopback interface is used for loopback traffic. */ if (!ip4_addr_isloopback(ip4_current_dest_addr())) - 803f66a: 4b5a ldr r3, [pc, #360] ; (803f7d4 ) - 803f66c: 695b ldr r3, [r3, #20] - 803f66e: b2db uxtb r3, r3 - 803f670: 2b7f cmp r3, #127 ; 0x7f - 803f672: d017 beq.n 803f6a4 + 803f69a: 4b5a ldr r3, [pc, #360] ; (803f804 ) + 803f69c: 695b ldr r3, [r3, #20] + 803f69e: b2db uxtb r3, r3 + 803f6a0: 2b7f cmp r3, #127 ; 0x7f + 803f6a2: d017 beq.n 803f6d4 #endif /* !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF */ { #if !LWIP_SINGLE_NETIF NETIF_FOREACH(netif) { - 803f674: 4b58 ldr r3, [pc, #352] ; (803f7d8 ) - 803f676: 681b ldr r3, [r3, #0] - 803f678: 613b str r3, [r7, #16] - 803f67a: e00e b.n 803f69a + 803f6a4: 4b58 ldr r3, [pc, #352] ; (803f808 ) + 803f6a6: 681b ldr r3, [r3, #0] + 803f6a8: 613b str r3, [r7, #16] + 803f6aa: e00e b.n 803f6ca if (netif == inp) { - 803f67c: 693a ldr r2, [r7, #16] - 803f67e: 683b ldr r3, [r7, #0] - 803f680: 429a cmp r2, r3 - 803f682: d006 beq.n 803f692 + 803f6ac: 693a ldr r2, [r7, #16] + 803f6ae: 683b ldr r3, [r7, #0] + 803f6b0: 429a cmp r2, r3 + 803f6b2: d006 beq.n 803f6c2 /* we checked that before already */ continue; } if (ip4_input_accept(netif)) { - 803f684: 6938 ldr r0, [r7, #16] - 803f686: f7ff ff5b bl 803f540 - 803f68a: 4603 mov r3, r0 - 803f68c: 2b00 cmp r3, #0 - 803f68e: d108 bne.n 803f6a2 - 803f690: e000 b.n 803f694 + 803f6b4: 6938 ldr r0, [r7, #16] + 803f6b6: f7ff ff5b bl 803f570 + 803f6ba: 4603 mov r3, r0 + 803f6bc: 2b00 cmp r3, #0 + 803f6be: d108 bne.n 803f6d2 + 803f6c0: e000 b.n 803f6c4 continue; - 803f692: bf00 nop + 803f6c2: bf00 nop NETIF_FOREACH(netif) { - 803f694: 693b ldr r3, [r7, #16] - 803f696: 681b ldr r3, [r3, #0] - 803f698: 613b str r3, [r7, #16] - 803f69a: 693b ldr r3, [r7, #16] - 803f69c: 2b00 cmp r3, #0 - 803f69e: d1ed bne.n 803f67c - 803f6a0: e000 b.n 803f6a4 + 803f6c4: 693b ldr r3, [r7, #16] + 803f6c6: 681b ldr r3, [r3, #0] + 803f6c8: 613b str r3, [r7, #16] + 803f6ca: 693b ldr r3, [r7, #16] + 803f6cc: 2b00 cmp r3, #0 + 803f6ce: d1ed bne.n 803f6ac + 803f6d0: e000 b.n 803f6d4 break; - 803f6a2: bf00 nop + 803f6d2: bf00 nop && !ip4_addr_isany_val(*ip4_current_src_addr()) #endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */ ) #endif /* LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING */ { if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) || - 803f6a4: 4b4b ldr r3, [pc, #300] ; (803f7d4 ) - 803f6a6: 691b ldr r3, [r3, #16] - 803f6a8: 6839 ldr r1, [r7, #0] - 803f6aa: 4618 mov r0, r3 - 803f6ac: f000 f96e bl 803f98c - 803f6b0: 4603 mov r3, r0 - 803f6b2: 2b00 cmp r3, #0 - 803f6b4: d105 bne.n 803f6c2 + 803f6d4: 4b4b ldr r3, [pc, #300] ; (803f804 ) + 803f6d6: 691b ldr r3, [r3, #16] + 803f6d8: 6839 ldr r1, [r7, #0] + 803f6da: 4618 mov r0, r3 + 803f6dc: f000 f96e bl 803f9bc + 803f6e0: 4603 mov r3, r0 + 803f6e2: 2b00 cmp r3, #0 + 803f6e4: d105 bne.n 803f6f2 (ip4_addr_ismulticast(ip4_current_src_addr()))) { - 803f6b6: 4b47 ldr r3, [pc, #284] ; (803f7d4 ) - 803f6b8: 691b ldr r3, [r3, #16] - 803f6ba: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803f6e6: 4b47 ldr r3, [pc, #284] ; (803f804 ) + 803f6e8: 691b ldr r3, [r3, #16] + 803f6ea: f003 03f0 and.w r3, r3, #240 ; 0xf0 if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) || - 803f6be: 2be0 cmp r3, #224 ; 0xe0 - 803f6c0: d104 bne.n 803f6cc + 803f6ee: 2be0 cmp r3, #224 ; 0xe0 + 803f6f0: d104 bne.n 803f6fc /* packet source is not valid */ LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip4_input: packet source is not valid.\n")); /* free (drop) packet pbufs */ pbuf_free(p); - 803f6c2: 6878 ldr r0, [r7, #4] - 803f6c4: f7f8 f822 bl 803770c + 803f6f2: 6878 ldr r0, [r7, #4] + 803f6f4: f7f8 f822 bl 803773c IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipinaddrerrors); MIB2_STATS_INC(mib2.ipindiscards); return ERR_OK; - 803f6c8: 2300 movs r3, #0 - 803f6ca: e07e b.n 803f7ca + 803f6f8: 2300 movs r3, #0 + 803f6fa: e07e b.n 803f7fa } } /* packet not for us? */ if (netif == NULL) { - 803f6cc: 693b ldr r3, [r7, #16] - 803f6ce: 2b00 cmp r3, #0 - 803f6d0: d104 bne.n 803f6dc + 803f6fc: 693b ldr r3, [r7, #16] + 803f6fe: 2b00 cmp r3, #0 + 803f700: d104 bne.n 803f70c { IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipinaddrerrors); MIB2_STATS_INC(mib2.ipindiscards); } pbuf_free(p); - 803f6d2: 6878 ldr r0, [r7, #4] - 803f6d4: f7f8 f81a bl 803770c + 803f702: 6878 ldr r0, [r7, #4] + 803f704: f7f8 f81a bl 803773c return ERR_OK; - 803f6d8: 2300 movs r3, #0 - 803f6da: e076 b.n 803f7ca + 803f708: 2300 movs r3, #0 + 803f70a: e076 b.n 803f7fa } /* packet consists of multiple fragments? */ if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) { - 803f6dc: 697b ldr r3, [r7, #20] - 803f6de: 88db ldrh r3, [r3, #6] - 803f6e0: b29b uxth r3, r3 - 803f6e2: 461a mov r2, r3 - 803f6e4: f64f 733f movw r3, #65343 ; 0xff3f - 803f6e8: 4013 ands r3, r2 - 803f6ea: 2b00 cmp r3, #0 - 803f6ec: d00b beq.n 803f706 + 803f70c: 697b ldr r3, [r7, #20] + 803f70e: 88db ldrh r3, [r3, #6] + 803f710: b29b uxth r3, r3 + 803f712: 461a mov r2, r3 + 803f714: f64f 733f movw r3, #65343 ; 0xff3f + 803f718: 4013 ands r3, r2 + 803f71a: 2b00 cmp r3, #0 + 803f71c: d00b beq.n 803f736 #if IP_REASSEMBLY /* packet fragment reassembly code present? */ LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip4_reass()\n", lwip_ntohs(IPH_ID(iphdr)), p->tot_len, lwip_ntohs(IPH_LEN(iphdr)), (u16_t)!!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (u16_t)((lwip_ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK) * 8))); /* reassemble the packet*/ p = ip4_reass(p); - 803f6ee: 6878 ldr r0, [r7, #4] - 803f6f0: f000 fc92 bl 8040018 - 803f6f4: 6078 str r0, [r7, #4] + 803f71e: 6878 ldr r0, [r7, #4] + 803f720: f000 fc92 bl 8040048 + 803f724: 6078 str r0, [r7, #4] /* packet not fully reassembled yet? */ if (p == NULL) { - 803f6f6: 687b ldr r3, [r7, #4] - 803f6f8: 2b00 cmp r3, #0 - 803f6fa: d101 bne.n 803f700 + 803f726: 687b ldr r3, [r7, #4] + 803f728: 2b00 cmp r3, #0 + 803f72a: d101 bne.n 803f730 return ERR_OK; - 803f6fc: 2300 movs r3, #0 - 803f6fe: e064 b.n 803f7ca + 803f72c: 2300 movs r3, #0 + 803f72e: e064 b.n 803f7fa } iphdr = (const struct ip_hdr *)p->payload; - 803f700: 687b ldr r3, [r7, #4] - 803f702: 685b ldr r3, [r3, #4] - 803f704: 617b str r3, [r7, #20] + 803f730: 687b ldr r3, [r7, #4] + 803f732: 685b ldr r3, [r3, #4] + 803f734: 617b str r3, [r7, #20] /* send to upper layers */ LWIP_DEBUGF(IP_DEBUG, ("ip4_input: \n")); ip4_debug_print(p); LWIP_DEBUGF(IP_DEBUG, ("ip4_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len)); ip_data.current_netif = netif; - 803f706: 4a33 ldr r2, [pc, #204] ; (803f7d4 ) - 803f708: 693b ldr r3, [r7, #16] - 803f70a: 6013 str r3, [r2, #0] + 803f736: 4a33 ldr r2, [pc, #204] ; (803f804 ) + 803f738: 693b ldr r3, [r7, #16] + 803f73a: 6013 str r3, [r2, #0] ip_data.current_input_netif = inp; - 803f70c: 4a31 ldr r2, [pc, #196] ; (803f7d4 ) - 803f70e: 683b ldr r3, [r7, #0] - 803f710: 6053 str r3, [r2, #4] + 803f73c: 4a31 ldr r2, [pc, #196] ; (803f804 ) + 803f73e: 683b ldr r3, [r7, #0] + 803f740: 6053 str r3, [r2, #4] ip_data.current_ip4_header = iphdr; - 803f712: 4a30 ldr r2, [pc, #192] ; (803f7d4 ) - 803f714: 697b ldr r3, [r7, #20] - 803f716: 6093 str r3, [r2, #8] + 803f742: 4a30 ldr r2, [pc, #192] ; (803f804 ) + 803f744: 697b ldr r3, [r7, #20] + 803f746: 6093 str r3, [r2, #8] ip_data.current_ip_header_tot_len = IPH_HL_BYTES(iphdr); - 803f718: 697b ldr r3, [r7, #20] - 803f71a: 781b ldrb r3, [r3, #0] - 803f71c: f003 030f and.w r3, r3, #15 - 803f720: b2db uxtb r3, r3 - 803f722: 009b lsls r3, r3, #2 - 803f724: b2db uxtb r3, r3 - 803f726: b29a uxth r2, r3 - 803f728: 4b2a ldr r3, [pc, #168] ; (803f7d4 ) - 803f72a: 819a strh r2, [r3, #12] + 803f748: 697b ldr r3, [r7, #20] + 803f74a: 781b ldrb r3, [r3, #0] + 803f74c: f003 030f and.w r3, r3, #15 + 803f750: b2db uxtb r3, r3 + 803f752: 009b lsls r3, r3, #2 + 803f754: b2db uxtb r3, r3 + 803f756: b29a uxth r2, r3 + 803f758: 4b2a ldr r3, [pc, #168] ; (803f804 ) + 803f75a: 819a strh r2, [r3, #12] /* raw input did not eat the packet? */ raw_status = raw_input(p, inp); if (raw_status != RAW_INPUT_EATEN) #endif /* LWIP_RAW */ { pbuf_remove_header(p, iphdr_hlen); /* Move to payload, no check necessary. */ - 803f72c: 89fb ldrh r3, [r7, #14] - 803f72e: 4619 mov r1, r3 - 803f730: 6878 ldr r0, [r7, #4] - 803f732: f7f7 ff65 bl 8037600 + 803f75c: 89fb ldrh r3, [r7, #14] + 803f75e: 4619 mov r1, r3 + 803f760: 6878 ldr r0, [r7, #4] + 803f762: f7f7 ff65 bl 8037630 switch (IPH_PROTO(iphdr)) { - 803f736: 697b ldr r3, [r7, #20] - 803f738: 7a5b ldrb r3, [r3, #9] - 803f73a: 2b11 cmp r3, #17 - 803f73c: d006 beq.n 803f74c - 803f73e: 2b11 cmp r3, #17 - 803f740: dc13 bgt.n 803f76a - 803f742: 2b01 cmp r3, #1 - 803f744: d00c beq.n 803f760 - 803f746: 2b06 cmp r3, #6 - 803f748: d005 beq.n 803f756 - 803f74a: e00e b.n 803f76a + 803f766: 697b ldr r3, [r7, #20] + 803f768: 7a5b ldrb r3, [r3, #9] + 803f76a: 2b11 cmp r3, #17 + 803f76c: d006 beq.n 803f77c + 803f76e: 2b11 cmp r3, #17 + 803f770: dc13 bgt.n 803f79a + 803f772: 2b01 cmp r3, #1 + 803f774: d00c beq.n 803f790 + 803f776: 2b06 cmp r3, #6 + 803f778: d005 beq.n 803f786 + 803f77a: e00e b.n 803f79a case IP_PROTO_UDP: #if LWIP_UDPLITE case IP_PROTO_UDPLITE: #endif /* LWIP_UDPLITE */ MIB2_STATS_INC(mib2.ipindelivers); udp_input(p, inp); - 803f74c: 6839 ldr r1, [r7, #0] - 803f74e: 6878 ldr r0, [r7, #4] - 803f750: f7fe fc42 bl 803dfd8 + 803f77c: 6839 ldr r1, [r7, #0] + 803f77e: 6878 ldr r0, [r7, #4] + 803f780: f7fe fc42 bl 803e008 break; - 803f754: e026 b.n 803f7a4 + 803f784: e026 b.n 803f7d4 #endif /* LWIP_UDP */ #if LWIP_TCP case IP_PROTO_TCP: MIB2_STATS_INC(mib2.ipindelivers); tcp_input(p, inp); - 803f756: 6839 ldr r1, [r7, #0] - 803f758: 6878 ldr r0, [r7, #4] - 803f75a: f7fa f863 bl 8039824 + 803f786: 6839 ldr r1, [r7, #0] + 803f788: 6878 ldr r0, [r7, #4] + 803f78a: f7fa f863 bl 8039854 break; - 803f75e: e021 b.n 803f7a4 + 803f78e: e021 b.n 803f7d4 #endif /* LWIP_TCP */ #if LWIP_ICMP case IP_PROTO_ICMP: MIB2_STATS_INC(mib2.ipindelivers); icmp_input(p, inp); - 803f760: 6839 ldr r1, [r7, #0] - 803f762: 6878 ldr r0, [r7, #4] - 803f764: f7ff fcc8 bl 803f0f8 + 803f790: 6839 ldr r1, [r7, #0] + 803f792: 6878 ldr r0, [r7, #4] + 803f794: f7ff fcc8 bl 803f128 break; - 803f768: e01c b.n 803f7a4 + 803f798: e01c b.n 803f7d4 } else #endif /* LWIP_RAW */ { #if LWIP_ICMP /* send ICMP destination protocol unreachable unless is was a broadcast */ if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) && - 803f76a: 4b1a ldr r3, [pc, #104] ; (803f7d4 ) - 803f76c: 695b ldr r3, [r3, #20] - 803f76e: 6939 ldr r1, [r7, #16] - 803f770: 4618 mov r0, r3 - 803f772: f000 f90b bl 803f98c - 803f776: 4603 mov r3, r0 - 803f778: 2b00 cmp r3, #0 - 803f77a: d10f bne.n 803f79c + 803f79a: 4b1a ldr r3, [pc, #104] ; (803f804 ) + 803f79c: 695b ldr r3, [r3, #20] + 803f79e: 6939 ldr r1, [r7, #16] + 803f7a0: 4618 mov r0, r3 + 803f7a2: f000 f90b bl 803f9bc + 803f7a6: 4603 mov r3, r0 + 803f7a8: 2b00 cmp r3, #0 + 803f7aa: d10f bne.n 803f7cc !ip4_addr_ismulticast(ip4_current_dest_addr())) { - 803f77c: 4b15 ldr r3, [pc, #84] ; (803f7d4 ) - 803f77e: 695b ldr r3, [r3, #20] - 803f780: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803f7ac: 4b15 ldr r3, [pc, #84] ; (803f804 ) + 803f7ae: 695b ldr r3, [r3, #20] + 803f7b0: f003 03f0 and.w r3, r3, #240 ; 0xf0 if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) && - 803f784: 2be0 cmp r3, #224 ; 0xe0 - 803f786: d009 beq.n 803f79c + 803f7b4: 2be0 cmp r3, #224 ; 0xe0 + 803f7b6: d009 beq.n 803f7cc pbuf_header_force(p, (s16_t)iphdr_hlen); /* Move to ip header, no check necessary. */ - 803f788: f9b7 300e ldrsh.w r3, [r7, #14] - 803f78c: 4619 mov r1, r3 - 803f78e: 6878 ldr r0, [r7, #4] - 803f790: f7f7 ffa9 bl 80376e6 + 803f7b8: f9b7 300e ldrsh.w r3, [r7, #14] + 803f7bc: 4619 mov r1, r3 + 803f7be: 6878 ldr r0, [r7, #4] + 803f7c0: f7f7 ffa9 bl 8037716 icmp_dest_unreach(p, ICMP_DUR_PROTO); - 803f794: 2102 movs r1, #2 - 803f796: 6878 ldr r0, [r7, #4] - 803f798: f7ff fdce bl 803f338 + 803f7c4: 2102 movs r1, #2 + 803f7c6: 6878 ldr r0, [r7, #4] + 803f7c8: f7ff fdce bl 803f368 IP_STATS_INC(ip.proterr); IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipinunknownprotos); } pbuf_free(p); - 803f79c: 6878 ldr r0, [r7, #4] - 803f79e: f7f7 ffb5 bl 803770c + 803f7cc: 6878 ldr r0, [r7, #4] + 803f7ce: f7f7 ffb5 bl 803773c break; - 803f7a2: bf00 nop + 803f7d2: bf00 nop } } /* @todo: this is not really necessary... */ ip_data.current_netif = NULL; - 803f7a4: 4b0b ldr r3, [pc, #44] ; (803f7d4 ) - 803f7a6: 2200 movs r2, #0 - 803f7a8: 601a str r2, [r3, #0] + 803f7d4: 4b0b ldr r3, [pc, #44] ; (803f804 ) + 803f7d6: 2200 movs r2, #0 + 803f7d8: 601a str r2, [r3, #0] ip_data.current_input_netif = NULL; - 803f7aa: 4b0a ldr r3, [pc, #40] ; (803f7d4 ) - 803f7ac: 2200 movs r2, #0 - 803f7ae: 605a str r2, [r3, #4] + 803f7da: 4b0a ldr r3, [pc, #40] ; (803f804 ) + 803f7dc: 2200 movs r2, #0 + 803f7de: 605a str r2, [r3, #4] ip_data.current_ip4_header = NULL; - 803f7b0: 4b08 ldr r3, [pc, #32] ; (803f7d4 ) - 803f7b2: 2200 movs r2, #0 - 803f7b4: 609a str r2, [r3, #8] + 803f7e0: 4b08 ldr r3, [pc, #32] ; (803f804 ) + 803f7e2: 2200 movs r2, #0 + 803f7e4: 609a str r2, [r3, #8] ip_data.current_ip_header_tot_len = 0; - 803f7b6: 4b07 ldr r3, [pc, #28] ; (803f7d4 ) - 803f7b8: 2200 movs r2, #0 - 803f7ba: 819a strh r2, [r3, #12] + 803f7e6: 4b07 ldr r3, [pc, #28] ; (803f804 ) + 803f7e8: 2200 movs r2, #0 + 803f7ea: 819a strh r2, [r3, #12] ip4_addr_set_any(ip4_current_src_addr()); - 803f7bc: 4b05 ldr r3, [pc, #20] ; (803f7d4 ) - 803f7be: 2200 movs r2, #0 - 803f7c0: 611a str r2, [r3, #16] + 803f7ec: 4b05 ldr r3, [pc, #20] ; (803f804 ) + 803f7ee: 2200 movs r2, #0 + 803f7f0: 611a str r2, [r3, #16] ip4_addr_set_any(ip4_current_dest_addr()); - 803f7c2: 4b04 ldr r3, [pc, #16] ; (803f7d4 ) - 803f7c4: 2200 movs r2, #0 - 803f7c6: 615a str r2, [r3, #20] + 803f7f2: 4b04 ldr r3, [pc, #16] ; (803f804 ) + 803f7f4: 2200 movs r2, #0 + 803f7f6: 615a str r2, [r3, #20] return ERR_OK; - 803f7c8: 2300 movs r3, #0 + 803f7f8: 2300 movs r3, #0 } - 803f7ca: 4618 mov r0, r3 - 803f7cc: 3718 adds r7, #24 - 803f7ce: 46bd mov sp, r7 - 803f7d0: bd80 pop {r7, pc} - 803f7d2: bf00 nop - 803f7d4: 2400b9bc .word 0x2400b9bc - 803f7d8: 2400e94c .word 0x2400e94c + 803f7fa: 4618 mov r0, r3 + 803f7fc: 3718 adds r7, #24 + 803f7fe: 46bd mov sp, r7 + 803f800: bd80 pop {r7, pc} + 803f802: bf00 nop + 803f804: 2400b9bc .word 0x2400b9bc + 803f808: 2400e94c .word 0x2400e94c -0803f7dc : +0803f80c : */ err_t ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest, u8_t ttl, u8_t tos, u8_t proto, struct netif *netif) { - 803f7dc: b580 push {r7, lr} - 803f7de: b08a sub sp, #40 ; 0x28 - 803f7e0: af04 add r7, sp, #16 - 803f7e2: 60f8 str r0, [r7, #12] - 803f7e4: 60b9 str r1, [r7, #8] - 803f7e6: 607a str r2, [r7, #4] - 803f7e8: 70fb strb r3, [r7, #3] + 803f80c: b580 push {r7, lr} + 803f80e: b08a sub sp, #40 ; 0x28 + 803f810: af04 add r7, sp, #16 + 803f812: 60f8 str r0, [r7, #12] + 803f814: 60b9 str r1, [r7, #8] + 803f816: 607a str r2, [r7, #4] + 803f818: 70fb strb r3, [r7, #3] ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest, u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options, u16_t optlen) { #endif /* IP_OPTIONS_SEND */ const ip4_addr_t *src_used = src; - 803f7ea: 68bb ldr r3, [r7, #8] - 803f7ec: 617b str r3, [r7, #20] + 803f81a: 68bb ldr r3, [r7, #8] + 803f81c: 617b str r3, [r7, #20] if (dest != LWIP_IP_HDRINCL) { - 803f7ee: 687b ldr r3, [r7, #4] - 803f7f0: 2b00 cmp r3, #0 - 803f7f2: d009 beq.n 803f808 + 803f81e: 687b ldr r3, [r7, #4] + 803f820: 2b00 cmp r3, #0 + 803f822: d009 beq.n 803f838 if (ip4_addr_isany(src)) { - 803f7f4: 68bb ldr r3, [r7, #8] - 803f7f6: 2b00 cmp r3, #0 - 803f7f8: d003 beq.n 803f802 - 803f7fa: 68bb ldr r3, [r7, #8] - 803f7fc: 681b ldr r3, [r3, #0] - 803f7fe: 2b00 cmp r3, #0 - 803f800: d102 bne.n 803f808 + 803f824: 68bb ldr r3, [r7, #8] + 803f826: 2b00 cmp r3, #0 + 803f828: d003 beq.n 803f832 + 803f82a: 68bb ldr r3, [r7, #8] + 803f82c: 681b ldr r3, [r3, #0] + 803f82e: 2b00 cmp r3, #0 + 803f830: d102 bne.n 803f838 src_used = netif_ip4_addr(netif); - 803f802: 6abb ldr r3, [r7, #40] ; 0x28 - 803f804: 3304 adds r3, #4 - 803f806: 617b str r3, [r7, #20] + 803f832: 6abb ldr r3, [r7, #40] ; 0x28 + 803f834: 3304 adds r3, #4 + 803f836: 617b str r3, [r7, #20] #if IP_OPTIONS_SEND return ip4_output_if_opt_src(p, src_used, dest, ttl, tos, proto, netif, ip_options, optlen); #else /* IP_OPTIONS_SEND */ return ip4_output_if_src(p, src_used, dest, ttl, tos, proto, netif); - 803f808: 78fa ldrb r2, [r7, #3] - 803f80a: 6abb ldr r3, [r7, #40] ; 0x28 - 803f80c: 9302 str r3, [sp, #8] - 803f80e: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 - 803f812: 9301 str r3, [sp, #4] - 803f814: f897 3020 ldrb.w r3, [r7, #32] - 803f818: 9300 str r3, [sp, #0] - 803f81a: 4613 mov r3, r2 - 803f81c: 687a ldr r2, [r7, #4] - 803f81e: 6979 ldr r1, [r7, #20] - 803f820: 68f8 ldr r0, [r7, #12] - 803f822: f000 f805 bl 803f830 - 803f826: 4603 mov r3, r0 + 803f838: 78fa ldrb r2, [r7, #3] + 803f83a: 6abb ldr r3, [r7, #40] ; 0x28 + 803f83c: 9302 str r3, [sp, #8] + 803f83e: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 + 803f842: 9301 str r3, [sp, #4] + 803f844: f897 3020 ldrb.w r3, [r7, #32] + 803f848: 9300 str r3, [sp, #0] + 803f84a: 4613 mov r3, r2 + 803f84c: 687a ldr r2, [r7, #4] + 803f84e: 6979 ldr r1, [r7, #20] + 803f850: 68f8 ldr r0, [r7, #12] + 803f852: f000 f805 bl 803f860 + 803f856: 4603 mov r3, r0 #endif /* IP_OPTIONS_SEND */ } - 803f828: 4618 mov r0, r3 - 803f82a: 3718 adds r7, #24 - 803f82c: 46bd mov sp, r7 - 803f82e: bd80 pop {r7, pc} + 803f858: 4618 mov r0, r3 + 803f85a: 3718 adds r7, #24 + 803f85c: 46bd mov sp, r7 + 803f85e: bd80 pop {r7, pc} -0803f830 : +0803f860 : */ err_t ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest, u8_t ttl, u8_t tos, u8_t proto, struct netif *netif) { - 803f830: b580 push {r7, lr} - 803f832: b088 sub sp, #32 - 803f834: af00 add r7, sp, #0 - 803f836: 60f8 str r0, [r7, #12] - 803f838: 60b9 str r1, [r7, #8] - 803f83a: 607a str r2, [r7, #4] - 803f83c: 70fb strb r3, [r7, #3] + 803f860: b580 push {r7, lr} + 803f862: b088 sub sp, #32 + 803f864: af00 add r7, sp, #0 + 803f866: 60f8 str r0, [r7, #12] + 803f868: 60b9 str r1, [r7, #8] + 803f86a: 607a str r2, [r7, #4] + 803f86c: 70fb strb r3, [r7, #3] #if CHECKSUM_GEN_IP_INLINE u32_t chk_sum = 0; #endif /* CHECKSUM_GEN_IP_INLINE */ LWIP_ASSERT_CORE_LOCKED(); LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p); - 803f83e: 68fb ldr r3, [r7, #12] - 803f840: 7b9b ldrb r3, [r3, #14] - 803f842: 2b01 cmp r3, #1 - 803f844: d006 beq.n 803f854 - 803f846: 4b4b ldr r3, [pc, #300] ; (803f974 ) - 803f848: f44f 7255 mov.w r2, #852 ; 0x354 - 803f84c: 494a ldr r1, [pc, #296] ; (803f978 ) - 803f84e: 484b ldr r0, [pc, #300] ; (803f97c ) - 803f850: f001 f946 bl 8040ae0 + 803f86e: 68fb ldr r3, [r7, #12] + 803f870: 7b9b ldrb r3, [r3, #14] + 803f872: 2b01 cmp r3, #1 + 803f874: d006 beq.n 803f884 + 803f876: 4b4b ldr r3, [pc, #300] ; (803f9a4 ) + 803f878: f44f 7255 mov.w r2, #852 ; 0x354 + 803f87c: 494a ldr r1, [pc, #296] ; (803f9a8 ) + 803f87e: 484b ldr r0, [pc, #300] ; (803f9ac ) + 803f880: f001 f946 bl 8040b10 MIB2_STATS_INC(mib2.ipoutrequests); /* Should the IP header be generated or is it already included in p? */ if (dest != LWIP_IP_HDRINCL) { - 803f854: 687b ldr r3, [r7, #4] - 803f856: 2b00 cmp r3, #0 - 803f858: d060 beq.n 803f91c + 803f884: 687b ldr r3, [r7, #4] + 803f886: 2b00 cmp r3, #0 + 803f888: d060 beq.n 803f94c u16_t ip_hlen = IP_HLEN; - 803f85a: 2314 movs r3, #20 - 803f85c: 837b strh r3, [r7, #26] + 803f88a: 2314 movs r3, #20 + 803f88c: 837b strh r3, [r7, #26] } #endif /* CHECKSUM_GEN_IP_INLINE */ } #endif /* IP_OPTIONS_SEND */ /* generate IP header */ if (pbuf_add_header(p, IP_HLEN)) { - 803f85e: 2114 movs r1, #20 - 803f860: 68f8 ldr r0, [r7, #12] - 803f862: f7f7 febd bl 80375e0 - 803f866: 4603 mov r3, r0 - 803f868: 2b00 cmp r3, #0 - 803f86a: d002 beq.n 803f872 + 803f88e: 2114 movs r1, #20 + 803f890: 68f8 ldr r0, [r7, #12] + 803f892: f7f7 febd bl 8037610 + 803f896: 4603 mov r3, r0 + 803f898: 2b00 cmp r3, #0 + 803f89a: d002 beq.n 803f8a2 LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: not enough room for IP header in pbuf\n")); IP_STATS_INC(ip.err); MIB2_STATS_INC(mib2.ipoutdiscards); return ERR_BUF; - 803f86c: f06f 0301 mvn.w r3, #1 - 803f870: e07c b.n 803f96c + 803f89c: f06f 0301 mvn.w r3, #1 + 803f8a0: e07c b.n 803f99c } iphdr = (struct ip_hdr *)p->payload; - 803f872: 68fb ldr r3, [r7, #12] - 803f874: 685b ldr r3, [r3, #4] - 803f876: 61fb str r3, [r7, #28] + 803f8a2: 68fb ldr r3, [r7, #12] + 803f8a4: 685b ldr r3, [r3, #4] + 803f8a6: 61fb str r3, [r7, #28] LWIP_ASSERT("check that first pbuf can hold struct ip_hdr", - 803f878: 68fb ldr r3, [r7, #12] - 803f87a: 895b ldrh r3, [r3, #10] - 803f87c: 2b13 cmp r3, #19 - 803f87e: d806 bhi.n 803f88e - 803f880: 4b3c ldr r3, [pc, #240] ; (803f974 ) - 803f882: f44f 7262 mov.w r2, #904 ; 0x388 - 803f886: 493e ldr r1, [pc, #248] ; (803f980 ) - 803f888: 483c ldr r0, [pc, #240] ; (803f97c ) - 803f88a: f001 f929 bl 8040ae0 + 803f8a8: 68fb ldr r3, [r7, #12] + 803f8aa: 895b ldrh r3, [r3, #10] + 803f8ac: 2b13 cmp r3, #19 + 803f8ae: d806 bhi.n 803f8be + 803f8b0: 4b3c ldr r3, [pc, #240] ; (803f9a4 ) + 803f8b2: f44f 7262 mov.w r2, #904 ; 0x388 + 803f8b6: 493e ldr r1, [pc, #248] ; (803f9b0 ) + 803f8b8: 483c ldr r0, [pc, #240] ; (803f9ac ) + 803f8ba: f001 f929 bl 8040b10 (p->len >= sizeof(struct ip_hdr))); IPH_TTL_SET(iphdr, ttl); - 803f88e: 69fb ldr r3, [r7, #28] - 803f890: 78fa ldrb r2, [r7, #3] - 803f892: 721a strb r2, [r3, #8] + 803f8be: 69fb ldr r3, [r7, #28] + 803f8c0: 78fa ldrb r2, [r7, #3] + 803f8c2: 721a strb r2, [r3, #8] IPH_PROTO_SET(iphdr, proto); - 803f894: 69fb ldr r3, [r7, #28] - 803f896: f897 202c ldrb.w r2, [r7, #44] ; 0x2c - 803f89a: 725a strb r2, [r3, #9] + 803f8c4: 69fb ldr r3, [r7, #28] + 803f8c6: f897 202c ldrb.w r2, [r7, #44] ; 0x2c + 803f8ca: 725a strb r2, [r3, #9] #if CHECKSUM_GEN_IP_INLINE chk_sum += PP_NTOHS(proto | (ttl << 8)); #endif /* CHECKSUM_GEN_IP_INLINE */ /* dest cannot be NULL here */ ip4_addr_copy(iphdr->dest, *dest); - 803f89c: 687b ldr r3, [r7, #4] - 803f89e: 681a ldr r2, [r3, #0] - 803f8a0: 69fb ldr r3, [r7, #28] - 803f8a2: 611a str r2, [r3, #16] + 803f8cc: 687b ldr r3, [r7, #4] + 803f8ce: 681a ldr r2, [r3, #0] + 803f8d0: 69fb ldr r3, [r7, #28] + 803f8d2: 611a str r2, [r3, #16] #if CHECKSUM_GEN_IP_INLINE chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF; chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16; #endif /* CHECKSUM_GEN_IP_INLINE */ IPH_VHL_SET(iphdr, 4, ip_hlen / 4); - 803f8a4: 8b7b ldrh r3, [r7, #26] - 803f8a6: 089b lsrs r3, r3, #2 - 803f8a8: b29b uxth r3, r3 - 803f8aa: b2db uxtb r3, r3 - 803f8ac: f043 0340 orr.w r3, r3, #64 ; 0x40 - 803f8b0: b2da uxtb r2, r3 - 803f8b2: 69fb ldr r3, [r7, #28] - 803f8b4: 701a strb r2, [r3, #0] + 803f8d4: 8b7b ldrh r3, [r7, #26] + 803f8d6: 089b lsrs r3, r3, #2 + 803f8d8: b29b uxth r3, r3 + 803f8da: b2db uxtb r3, r3 + 803f8dc: f043 0340 orr.w r3, r3, #64 ; 0x40 + 803f8e0: b2da uxtb r2, r3 + 803f8e2: 69fb ldr r3, [r7, #28] + 803f8e4: 701a strb r2, [r3, #0] IPH_TOS_SET(iphdr, tos); - 803f8b6: 69fb ldr r3, [r7, #28] - 803f8b8: f897 2028 ldrb.w r2, [r7, #40] ; 0x28 - 803f8bc: 705a strb r2, [r3, #1] + 803f8e6: 69fb ldr r3, [r7, #28] + 803f8e8: f897 2028 ldrb.w r2, [r7, #40] ; 0x28 + 803f8ec: 705a strb r2, [r3, #1] #if CHECKSUM_GEN_IP_INLINE chk_sum += PP_NTOHS(tos | (iphdr->_v_hl << 8)); #endif /* CHECKSUM_GEN_IP_INLINE */ IPH_LEN_SET(iphdr, lwip_htons(p->tot_len)); - 803f8be: 68fb ldr r3, [r7, #12] - 803f8c0: 891b ldrh r3, [r3, #8] - 803f8c2: 4618 mov r0, r3 - 803f8c4: f7f6 faf0 bl 8035ea8 - 803f8c8: 4603 mov r3, r0 - 803f8ca: 461a mov r2, r3 - 803f8cc: 69fb ldr r3, [r7, #28] - 803f8ce: 805a strh r2, [r3, #2] + 803f8ee: 68fb ldr r3, [r7, #12] + 803f8f0: 891b ldrh r3, [r3, #8] + 803f8f2: 4618 mov r0, r3 + 803f8f4: f7f6 faf0 bl 8035ed8 + 803f8f8: 4603 mov r3, r0 + 803f8fa: 461a mov r2, r3 + 803f8fc: 69fb ldr r3, [r7, #28] + 803f8fe: 805a strh r2, [r3, #2] #if CHECKSUM_GEN_IP_INLINE chk_sum += iphdr->_len; #endif /* CHECKSUM_GEN_IP_INLINE */ IPH_OFFSET_SET(iphdr, 0); - 803f8d0: 69fb ldr r3, [r7, #28] - 803f8d2: 2200 movs r2, #0 - 803f8d4: 719a strb r2, [r3, #6] - 803f8d6: 2200 movs r2, #0 - 803f8d8: 71da strb r2, [r3, #7] + 803f900: 69fb ldr r3, [r7, #28] + 803f902: 2200 movs r2, #0 + 803f904: 719a strb r2, [r3, #6] + 803f906: 2200 movs r2, #0 + 803f908: 71da strb r2, [r3, #7] IPH_ID_SET(iphdr, lwip_htons(ip_id)); - 803f8da: 4b2a ldr r3, [pc, #168] ; (803f984 ) - 803f8dc: 881b ldrh r3, [r3, #0] - 803f8de: 4618 mov r0, r3 - 803f8e0: f7f6 fae2 bl 8035ea8 - 803f8e4: 4603 mov r3, r0 - 803f8e6: 461a mov r2, r3 - 803f8e8: 69fb ldr r3, [r7, #28] - 803f8ea: 809a strh r2, [r3, #4] + 803f90a: 4b2a ldr r3, [pc, #168] ; (803f9b4 ) + 803f90c: 881b ldrh r3, [r3, #0] + 803f90e: 4618 mov r0, r3 + 803f910: f7f6 fae2 bl 8035ed8 + 803f914: 4603 mov r3, r0 + 803f916: 461a mov r2, r3 + 803f918: 69fb ldr r3, [r7, #28] + 803f91a: 809a strh r2, [r3, #4] #if CHECKSUM_GEN_IP_INLINE chk_sum += iphdr->_id; #endif /* CHECKSUM_GEN_IP_INLINE */ ++ip_id; - 803f8ec: 4b25 ldr r3, [pc, #148] ; (803f984 ) - 803f8ee: 881b ldrh r3, [r3, #0] - 803f8f0: 3301 adds r3, #1 - 803f8f2: b29a uxth r2, r3 - 803f8f4: 4b23 ldr r3, [pc, #140] ; (803f984 ) - 803f8f6: 801a strh r2, [r3, #0] + 803f91c: 4b25 ldr r3, [pc, #148] ; (803f9b4 ) + 803f91e: 881b ldrh r3, [r3, #0] + 803f920: 3301 adds r3, #1 + 803f922: b29a uxth r2, r3 + 803f924: 4b23 ldr r3, [pc, #140] ; (803f9b4 ) + 803f926: 801a strh r2, [r3, #0] if (src == NULL) { - 803f8f8: 68bb ldr r3, [r7, #8] - 803f8fa: 2b00 cmp r3, #0 - 803f8fc: d104 bne.n 803f908 + 803f928: 68bb ldr r3, [r7, #8] + 803f92a: 2b00 cmp r3, #0 + 803f92c: d104 bne.n 803f938 ip4_addr_copy(iphdr->src, *IP4_ADDR_ANY4); - 803f8fe: 4b22 ldr r3, [pc, #136] ; (803f988 ) - 803f900: 681a ldr r2, [r3, #0] - 803f902: 69fb ldr r3, [r7, #28] - 803f904: 60da str r2, [r3, #12] - 803f906: e003 b.n 803f910 + 803f92e: 4b22 ldr r3, [pc, #136] ; (803f9b8 ) + 803f930: 681a ldr r2, [r3, #0] + 803f932: 69fb ldr r3, [r7, #28] + 803f934: 60da str r2, [r3, #12] + 803f936: e003 b.n 803f940 } else { /* src cannot be NULL here */ ip4_addr_copy(iphdr->src, *src); - 803f908: 68bb ldr r3, [r7, #8] - 803f90a: 681a ldr r2, [r3, #0] - 803f90c: 69fb ldr r3, [r7, #28] - 803f90e: 60da str r2, [r3, #12] + 803f938: 68bb ldr r3, [r7, #8] + 803f93a: 681a ldr r2, [r3, #0] + 803f93c: 69fb ldr r3, [r7, #28] + 803f93e: 60da str r2, [r3, #12] else { IPH_CHKSUM_SET(iphdr, 0); } #endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/ #else /* CHECKSUM_GEN_IP_INLINE */ IPH_CHKSUM_SET(iphdr, 0); - 803f910: 69fb ldr r3, [r7, #28] - 803f912: 2200 movs r2, #0 - 803f914: 729a strb r2, [r3, #10] - 803f916: 2200 movs r2, #0 - 803f918: 72da strb r2, [r3, #11] - 803f91a: e00f b.n 803f93c + 803f940: 69fb ldr r3, [r7, #28] + 803f942: 2200 movs r2, #0 + 803f944: 729a strb r2, [r3, #10] + 803f946: 2200 movs r2, #0 + 803f948: 72da strb r2, [r3, #11] + 803f94a: e00f b.n 803f96c } #endif /* CHECKSUM_GEN_IP */ #endif /* CHECKSUM_GEN_IP_INLINE */ } else { /* IP header already included in p */ if (p->len < IP_HLEN) { - 803f91c: 68fb ldr r3, [r7, #12] - 803f91e: 895b ldrh r3, [r3, #10] - 803f920: 2b13 cmp r3, #19 - 803f922: d802 bhi.n 803f92a + 803f94c: 68fb ldr r3, [r7, #12] + 803f94e: 895b ldrh r3, [r3, #10] + 803f950: 2b13 cmp r3, #19 + 803f952: d802 bhi.n 803f95a LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: LWIP_IP_HDRINCL but pbuf is too short\n")); IP_STATS_INC(ip.err); MIB2_STATS_INC(mib2.ipoutdiscards); return ERR_BUF; - 803f924: f06f 0301 mvn.w r3, #1 - 803f928: e020 b.n 803f96c + 803f954: f06f 0301 mvn.w r3, #1 + 803f958: e020 b.n 803f99c } iphdr = (struct ip_hdr *)p->payload; - 803f92a: 68fb ldr r3, [r7, #12] - 803f92c: 685b ldr r3, [r3, #4] - 803f92e: 61fb str r3, [r7, #28] + 803f95a: 68fb ldr r3, [r7, #12] + 803f95c: 685b ldr r3, [r3, #4] + 803f95e: 61fb str r3, [r7, #28] ip4_addr_copy(dest_addr, iphdr->dest); - 803f930: 69fb ldr r3, [r7, #28] - 803f932: 691b ldr r3, [r3, #16] - 803f934: 617b str r3, [r7, #20] + 803f960: 69fb ldr r3, [r7, #28] + 803f962: 691b ldr r3, [r3, #16] + 803f964: 617b str r3, [r7, #20] dest = &dest_addr; - 803f936: f107 0314 add.w r3, r7, #20 - 803f93a: 607b str r3, [r7, #4] + 803f966: f107 0314 add.w r3, r7, #20 + 803f96a: 607b str r3, [r7, #4] } #endif /* LWIP_MULTICAST_TX_OPTIONS */ #endif /* ENABLE_LOOPBACK */ #if IP_FRAG /* don't fragment if interface has mtu set to 0 [loopif] */ if (netif->mtu && (p->tot_len > netif->mtu)) { - 803f93c: 6b3b ldr r3, [r7, #48] ; 0x30 - 803f93e: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803f940: 2b00 cmp r3, #0 - 803f942: d00c beq.n 803f95e - 803f944: 68fb ldr r3, [r7, #12] - 803f946: 891a ldrh r2, [r3, #8] - 803f948: 6b3b ldr r3, [r7, #48] ; 0x30 - 803f94a: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803f94c: 429a cmp r2, r3 - 803f94e: d906 bls.n 803f95e + 803f96c: 6b3b ldr r3, [r7, #48] ; 0x30 + 803f96e: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803f970: 2b00 cmp r3, #0 + 803f972: d00c beq.n 803f98e + 803f974: 68fb ldr r3, [r7, #12] + 803f976: 891a ldrh r2, [r3, #8] + 803f978: 6b3b ldr r3, [r7, #48] ; 0x30 + 803f97a: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803f97c: 429a cmp r2, r3 + 803f97e: d906 bls.n 803f98e return ip4_frag(p, netif, dest); - 803f950: 687a ldr r2, [r7, #4] - 803f952: 6b39 ldr r1, [r7, #48] ; 0x30 - 803f954: 68f8 ldr r0, [r7, #12] - 803f956: f000 fd53 bl 8040400 - 803f95a: 4603 mov r3, r0 - 803f95c: e006 b.n 803f96c + 803f980: 687a ldr r2, [r7, #4] + 803f982: 6b39 ldr r1, [r7, #48] ; 0x30 + 803f984: 68f8 ldr r0, [r7, #12] + 803f986: f000 fd53 bl 8040430 + 803f98a: 4603 mov r3, r0 + 803f98c: e006 b.n 803f99c } #endif /* IP_FRAG */ LWIP_DEBUGF(IP_DEBUG, ("ip4_output_if: call netif->output()\n")); return netif->output(netif, p, dest); - 803f95e: 6b3b ldr r3, [r7, #48] ; 0x30 - 803f960: 695b ldr r3, [r3, #20] - 803f962: 687a ldr r2, [r7, #4] - 803f964: 68f9 ldr r1, [r7, #12] - 803f966: 6b38 ldr r0, [r7, #48] ; 0x30 - 803f968: 4798 blx r3 - 803f96a: 4603 mov r3, r0 -} - 803f96c: 4618 mov r0, r3 - 803f96e: 3720 adds r7, #32 - 803f970: 46bd mov sp, r7 - 803f972: bd80 pop {r7, pc} - 803f974: 08044928 .word 0x08044928 - 803f978: 0804495c .word 0x0804495c - 803f97c: 08044968 .word 0x08044968 - 803f980: 08044990 .word 0x08044990 - 803f984: 2400eaaa .word 0x2400eaaa - 803f988: 08044dd0 .word 0x08044dd0 - -0803f98c : + 803f98e: 6b3b ldr r3, [r7, #48] ; 0x30 + 803f990: 695b ldr r3, [r3, #20] + 803f992: 687a ldr r2, [r7, #4] + 803f994: 68f9 ldr r1, [r7, #12] + 803f996: 6b38 ldr r0, [r7, #48] ; 0x30 + 803f998: 4798 blx r3 + 803f99a: 4603 mov r3, r0 +} + 803f99c: 4618 mov r0, r3 + 803f99e: 3720 adds r7, #32 + 803f9a0: 46bd mov sp, r7 + 803f9a2: bd80 pop {r7, pc} + 803f9a4: 08044958 .word 0x08044958 + 803f9a8: 0804498c .word 0x0804498c + 803f9ac: 08044998 .word 0x08044998 + 803f9b0: 080449c0 .word 0x080449c0 + 803f9b4: 2400eaaa .word 0x2400eaaa + 803f9b8: 08044e00 .word 0x08044e00 + +0803f9bc : * @param netif the network interface against which the address is checked * @return returns non-zero if the address is a broadcast address */ u8_t ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif) { - 803f98c: b480 push {r7} - 803f98e: b085 sub sp, #20 - 803f990: af00 add r7, sp, #0 - 803f992: 6078 str r0, [r7, #4] - 803f994: 6039 str r1, [r7, #0] + 803f9bc: b480 push {r7} + 803f9be: b085 sub sp, #20 + 803f9c0: af00 add r7, sp, #0 + 803f9c2: 6078 str r0, [r7, #4] + 803f9c4: 6039 str r1, [r7, #0] ip4_addr_t ipaddr; ip4_addr_set_u32(&ipaddr, addr); - 803f996: 687b ldr r3, [r7, #4] - 803f998: 60fb str r3, [r7, #12] + 803f9c6: 687b ldr r3, [r7, #4] + 803f9c8: 60fb str r3, [r7, #12] /* all ones (broadcast) or all zeroes (old skool broadcast) */ if ((~addr == IPADDR_ANY) || - 803f99a: 687b ldr r3, [r7, #4] - 803f99c: f1b3 3fff cmp.w r3, #4294967295 - 803f9a0: d002 beq.n 803f9a8 - 803f9a2: 687b ldr r3, [r7, #4] - 803f9a4: 2b00 cmp r3, #0 - 803f9a6: d101 bne.n 803f9ac + 803f9ca: 687b ldr r3, [r7, #4] + 803f9cc: f1b3 3fff cmp.w r3, #4294967295 + 803f9d0: d002 beq.n 803f9d8 + 803f9d2: 687b ldr r3, [r7, #4] + 803f9d4: 2b00 cmp r3, #0 + 803f9d6: d101 bne.n 803f9dc (addr == IPADDR_ANY)) { return 1; - 803f9a8: 2301 movs r3, #1 - 803f9aa: e02a b.n 803fa02 + 803f9d8: 2301 movs r3, #1 + 803f9da: e02a b.n 803fa32 /* no broadcast support on this network interface? */ } else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) { - 803f9ac: 683b ldr r3, [r7, #0] - 803f9ae: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f9b2: f003 0302 and.w r3, r3, #2 - 803f9b6: 2b00 cmp r3, #0 - 803f9b8: d101 bne.n 803f9be + 803f9dc: 683b ldr r3, [r7, #0] + 803f9de: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f9e2: f003 0302 and.w r3, r3, #2 + 803f9e6: 2b00 cmp r3, #0 + 803f9e8: d101 bne.n 803f9ee /* the given address cannot be a broadcast address * nor can we check against any broadcast addresses */ return 0; - 803f9ba: 2300 movs r3, #0 - 803f9bc: e021 b.n 803fa02 + 803f9ea: 2300 movs r3, #0 + 803f9ec: e021 b.n 803fa32 /* address matches network interface address exactly? => no broadcast */ } else if (addr == ip4_addr_get_u32(netif_ip4_addr(netif))) { - 803f9be: 683b ldr r3, [r7, #0] - 803f9c0: 3304 adds r3, #4 - 803f9c2: 681b ldr r3, [r3, #0] - 803f9c4: 687a ldr r2, [r7, #4] - 803f9c6: 429a cmp r2, r3 - 803f9c8: d101 bne.n 803f9ce + 803f9ee: 683b ldr r3, [r7, #0] + 803f9f0: 3304 adds r3, #4 + 803f9f2: 681b ldr r3, [r3, #0] + 803f9f4: 687a ldr r2, [r7, #4] + 803f9f6: 429a cmp r2, r3 + 803f9f8: d101 bne.n 803f9fe return 0; - 803f9ca: 2300 movs r3, #0 - 803f9cc: e019 b.n 803fa02 + 803f9fa: 2300 movs r3, #0 + 803f9fc: e019 b.n 803fa32 /* on the same (sub) network... */ } else if (ip4_addr_netcmp(&ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) - 803f9ce: 68fa ldr r2, [r7, #12] - 803f9d0: 683b ldr r3, [r7, #0] - 803f9d2: 3304 adds r3, #4 - 803f9d4: 681b ldr r3, [r3, #0] - 803f9d6: 405a eors r2, r3 - 803f9d8: 683b ldr r3, [r7, #0] - 803f9da: 3308 adds r3, #8 - 803f9dc: 681b ldr r3, [r3, #0] - 803f9de: 4013 ands r3, r2 - 803f9e0: 2b00 cmp r3, #0 - 803f9e2: d10d bne.n 803fa00 + 803f9fe: 68fa ldr r2, [r7, #12] + 803fa00: 683b ldr r3, [r7, #0] + 803fa02: 3304 adds r3, #4 + 803fa04: 681b ldr r3, [r3, #0] + 803fa06: 405a eors r2, r3 + 803fa08: 683b ldr r3, [r7, #0] + 803fa0a: 3308 adds r3, #8 + 803fa0c: 681b ldr r3, [r3, #0] + 803fa0e: 4013 ands r3, r2 + 803fa10: 2b00 cmp r3, #0 + 803fa12: d10d bne.n 803fa30 /* ...and host identifier bits are all ones? =>... */ && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) == - 803f9e4: 683b ldr r3, [r7, #0] - 803f9e6: 3308 adds r3, #8 - 803f9e8: 681b ldr r3, [r3, #0] - 803f9ea: 43da mvns r2, r3 - 803f9ec: 687b ldr r3, [r7, #4] - 803f9ee: 401a ands r2, r3 + 803fa14: 683b ldr r3, [r7, #0] + 803fa16: 3308 adds r3, #8 + 803fa18: 681b ldr r3, [r3, #0] + 803fa1a: 43da mvns r2, r3 + 803fa1c: 687b ldr r3, [r7, #4] + 803fa1e: 401a ands r2, r3 (IPADDR_BROADCAST & ~ip4_addr_get_u32(netif_ip4_netmask(netif))))) { - 803f9f0: 683b ldr r3, [r7, #0] - 803f9f2: 3308 adds r3, #8 - 803f9f4: 681b ldr r3, [r3, #0] - 803f9f6: 43db mvns r3, r3 + 803fa20: 683b ldr r3, [r7, #0] + 803fa22: 3308 adds r3, #8 + 803fa24: 681b ldr r3, [r3, #0] + 803fa26: 43db mvns r3, r3 && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) == - 803f9f8: 429a cmp r2, r3 - 803f9fa: d101 bne.n 803fa00 + 803fa28: 429a cmp r2, r3 + 803fa2a: d101 bne.n 803fa30 /* => network broadcast address */ return 1; - 803f9fc: 2301 movs r3, #1 - 803f9fe: e000 b.n 803fa02 + 803fa2c: 2301 movs r3, #1 + 803fa2e: e000 b.n 803fa32 } else { return 0; - 803fa00: 2300 movs r3, #0 + 803fa30: 2300 movs r3, #0 } } - 803fa02: 4618 mov r0, r3 - 803fa04: 3714 adds r7, #20 - 803fa06: 46bd mov sp, r7 - 803fa08: f85d 7b04 ldr.w r7, [sp], #4 - 803fa0c: 4770 bx lr + 803fa32: 4618 mov r0, r3 + 803fa34: 3714 adds r7, #20 + 803fa36: 46bd mov sp, r7 + 803fa38: f85d 7b04 ldr.w r7, [sp], #4 + 803fa3c: 4770 bx lr ... -0803fa10 : +0803fa40 : * * Should be called every 1000 msec (defined by IP_TMR_INTERVAL). */ void ip_reass_tmr(void) { - 803fa10: b580 push {r7, lr} - 803fa12: b084 sub sp, #16 - 803fa14: af00 add r7, sp, #0 + 803fa40: b580 push {r7, lr} + 803fa42: b084 sub sp, #16 + 803fa44: af00 add r7, sp, #0 struct ip_reassdata *r, *prev = NULL; - 803fa16: 2300 movs r3, #0 - 803fa18: 60bb str r3, [r7, #8] + 803fa46: 2300 movs r3, #0 + 803fa48: 60bb str r3, [r7, #8] r = reassdatagrams; - 803fa1a: 4b12 ldr r3, [pc, #72] ; (803fa64 ) - 803fa1c: 681b ldr r3, [r3, #0] - 803fa1e: 60fb str r3, [r7, #12] + 803fa4a: 4b12 ldr r3, [pc, #72] ; (803fa94 ) + 803fa4c: 681b ldr r3, [r3, #0] + 803fa4e: 60fb str r3, [r7, #12] while (r != NULL) { - 803fa20: e018 b.n 803fa54 + 803fa50: e018 b.n 803fa84 /* Decrement the timer. Once it reaches 0, * clean up the incomplete fragment assembly */ if (r->timer > 0) { - 803fa22: 68fb ldr r3, [r7, #12] - 803fa24: 7fdb ldrb r3, [r3, #31] - 803fa26: 2b00 cmp r3, #0 - 803fa28: d00b beq.n 803fa42 + 803fa52: 68fb ldr r3, [r7, #12] + 803fa54: 7fdb ldrb r3, [r3, #31] + 803fa56: 2b00 cmp r3, #0 + 803fa58: d00b beq.n 803fa72 r->timer--; - 803fa2a: 68fb ldr r3, [r7, #12] - 803fa2c: 7fdb ldrb r3, [r3, #31] - 803fa2e: 3b01 subs r3, #1 - 803fa30: b2da uxtb r2, r3 - 803fa32: 68fb ldr r3, [r7, #12] - 803fa34: 77da strb r2, [r3, #31] + 803fa5a: 68fb ldr r3, [r7, #12] + 803fa5c: 7fdb ldrb r3, [r3, #31] + 803fa5e: 3b01 subs r3, #1 + 803fa60: b2da uxtb r2, r3 + 803fa62: 68fb ldr r3, [r7, #12] + 803fa64: 77da strb r2, [r3, #31] LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n", (u16_t)r->timer)); prev = r; - 803fa36: 68fb ldr r3, [r7, #12] - 803fa38: 60bb str r3, [r7, #8] + 803fa66: 68fb ldr r3, [r7, #12] + 803fa68: 60bb str r3, [r7, #8] r = r->next; - 803fa3a: 68fb ldr r3, [r7, #12] - 803fa3c: 681b ldr r3, [r3, #0] - 803fa3e: 60fb str r3, [r7, #12] - 803fa40: e008 b.n 803fa54 + 803fa6a: 68fb ldr r3, [r7, #12] + 803fa6c: 681b ldr r3, [r3, #0] + 803fa6e: 60fb str r3, [r7, #12] + 803fa70: e008 b.n 803fa84 } else { /* reassembly timed out */ struct ip_reassdata *tmp; LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n")); tmp = r; - 803fa42: 68fb ldr r3, [r7, #12] - 803fa44: 607b str r3, [r7, #4] + 803fa72: 68fb ldr r3, [r7, #12] + 803fa74: 607b str r3, [r7, #4] /* get the next pointer before freeing */ r = r->next; - 803fa46: 68fb ldr r3, [r7, #12] - 803fa48: 681b ldr r3, [r3, #0] - 803fa4a: 60fb str r3, [r7, #12] + 803fa76: 68fb ldr r3, [r7, #12] + 803fa78: 681b ldr r3, [r3, #0] + 803fa7a: 60fb str r3, [r7, #12] /* free the helper struct and all enqueued pbufs */ ip_reass_free_complete_datagram(tmp, prev); - 803fa4c: 68b9 ldr r1, [r7, #8] - 803fa4e: 6878 ldr r0, [r7, #4] - 803fa50: f000 f80a bl 803fa68 + 803fa7c: 68b9 ldr r1, [r7, #8] + 803fa7e: 6878 ldr r0, [r7, #4] + 803fa80: f000 f80a bl 803fa98 while (r != NULL) { - 803fa54: 68fb ldr r3, [r7, #12] - 803fa56: 2b00 cmp r3, #0 - 803fa58: d1e3 bne.n 803fa22 + 803fa84: 68fb ldr r3, [r7, #12] + 803fa86: 2b00 cmp r3, #0 + 803fa88: d1e3 bne.n 803fa52 } } } - 803fa5a: bf00 nop - 803fa5c: bf00 nop - 803fa5e: 3710 adds r7, #16 - 803fa60: 46bd mov sp, r7 - 803fa62: bd80 pop {r7, pc} - 803fa64: 2400eaac .word 0x2400eaac + 803fa8a: bf00 nop + 803fa8c: bf00 nop + 803fa8e: 3710 adds r7, #16 + 803fa90: 46bd mov sp, r7 + 803fa92: bd80 pop {r7, pc} + 803fa94: 2400eaac .word 0x2400eaac -0803fa68 : +0803fa98 : * @param prev the previous datagram in the linked list * @return the number of pbufs freed */ static int ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) { - 803fa68: b580 push {r7, lr} - 803fa6a: b088 sub sp, #32 - 803fa6c: af00 add r7, sp, #0 - 803fa6e: 6078 str r0, [r7, #4] - 803fa70: 6039 str r1, [r7, #0] + 803fa98: b580 push {r7, lr} + 803fa9a: b088 sub sp, #32 + 803fa9c: af00 add r7, sp, #0 + 803fa9e: 6078 str r0, [r7, #4] + 803faa0: 6039 str r1, [r7, #0] u16_t pbufs_freed = 0; - 803fa72: 2300 movs r3, #0 - 803fa74: 83fb strh r3, [r7, #30] + 803faa2: 2300 movs r3, #0 + 803faa4: 83fb strh r3, [r7, #30] u16_t clen; struct pbuf *p; struct ip_reass_helper *iprh; LWIP_ASSERT("prev != ipr", prev != ipr); - 803fa76: 683a ldr r2, [r7, #0] - 803fa78: 687b ldr r3, [r7, #4] - 803fa7a: 429a cmp r2, r3 - 803fa7c: d105 bne.n 803fa8a - 803fa7e: 4b45 ldr r3, [pc, #276] ; (803fb94 ) - 803fa80: 22ab movs r2, #171 ; 0xab - 803fa82: 4945 ldr r1, [pc, #276] ; (803fb98 ) - 803fa84: 4845 ldr r0, [pc, #276] ; (803fb9c ) - 803fa86: f001 f82b bl 8040ae0 + 803faa6: 683a ldr r2, [r7, #0] + 803faa8: 687b ldr r3, [r7, #4] + 803faaa: 429a cmp r2, r3 + 803faac: d105 bne.n 803faba + 803faae: 4b45 ldr r3, [pc, #276] ; (803fbc4 ) + 803fab0: 22ab movs r2, #171 ; 0xab + 803fab2: 4945 ldr r1, [pc, #276] ; (803fbc8 ) + 803fab4: 4845 ldr r0, [pc, #276] ; (803fbcc ) + 803fab6: f001 f82b bl 8040b10 if (prev != NULL) { - 803fa8a: 683b ldr r3, [r7, #0] - 803fa8c: 2b00 cmp r3, #0 - 803fa8e: d00a beq.n 803faa6 + 803faba: 683b ldr r3, [r7, #0] + 803fabc: 2b00 cmp r3, #0 + 803fabe: d00a beq.n 803fad6 LWIP_ASSERT("prev->next == ipr", prev->next == ipr); - 803fa90: 683b ldr r3, [r7, #0] - 803fa92: 681b ldr r3, [r3, #0] - 803fa94: 687a ldr r2, [r7, #4] - 803fa96: 429a cmp r2, r3 - 803fa98: d005 beq.n 803faa6 - 803fa9a: 4b3e ldr r3, [pc, #248] ; (803fb94 ) - 803fa9c: 22ad movs r2, #173 ; 0xad - 803fa9e: 4940 ldr r1, [pc, #256] ; (803fba0 ) - 803faa0: 483e ldr r0, [pc, #248] ; (803fb9c ) - 803faa2: f001 f81d bl 8040ae0 + 803fac0: 683b ldr r3, [r7, #0] + 803fac2: 681b ldr r3, [r3, #0] + 803fac4: 687a ldr r2, [r7, #4] + 803fac6: 429a cmp r2, r3 + 803fac8: d005 beq.n 803fad6 + 803faca: 4b3e ldr r3, [pc, #248] ; (803fbc4 ) + 803facc: 22ad movs r2, #173 ; 0xad + 803face: 4940 ldr r1, [pc, #256] ; (803fbd0 ) + 803fad0: 483e ldr r0, [pc, #248] ; (803fbcc ) + 803fad2: f001 f81d bl 8040b10 } MIB2_STATS_INC(mib2.ipreasmfails); #if LWIP_ICMP iprh = (struct ip_reass_helper *)ipr->p->payload; - 803faa6: 687b ldr r3, [r7, #4] - 803faa8: 685b ldr r3, [r3, #4] - 803faaa: 685b ldr r3, [r3, #4] - 803faac: 617b str r3, [r7, #20] + 803fad6: 687b ldr r3, [r7, #4] + 803fad8: 685b ldr r3, [r3, #4] + 803fada: 685b ldr r3, [r3, #4] + 803fadc: 617b str r3, [r7, #20] if (iprh->start == 0) { - 803faae: 697b ldr r3, [r7, #20] - 803fab0: 889b ldrh r3, [r3, #4] - 803fab2: b29b uxth r3, r3 - 803fab4: 2b00 cmp r3, #0 - 803fab6: d12a bne.n 803fb0e + 803fade: 697b ldr r3, [r7, #20] + 803fae0: 889b ldrh r3, [r3, #4] + 803fae2: b29b uxth r3, r3 + 803fae4: 2b00 cmp r3, #0 + 803fae6: d12a bne.n 803fb3e /* The first fragment was received, send ICMP time exceeded. */ /* First, de-queue the first pbuf from r->p. */ p = ipr->p; - 803fab8: 687b ldr r3, [r7, #4] - 803faba: 685b ldr r3, [r3, #4] - 803fabc: 61bb str r3, [r7, #24] + 803fae8: 687b ldr r3, [r7, #4] + 803faea: 685b ldr r3, [r3, #4] + 803faec: 61bb str r3, [r7, #24] ipr->p = iprh->next_pbuf; - 803fabe: 697b ldr r3, [r7, #20] - 803fac0: 681a ldr r2, [r3, #0] - 803fac2: 687b ldr r3, [r7, #4] - 803fac4: 605a str r2, [r3, #4] + 803faee: 697b ldr r3, [r7, #20] + 803faf0: 681a ldr r2, [r3, #0] + 803faf2: 687b ldr r3, [r7, #4] + 803faf4: 605a str r2, [r3, #4] /* Then, copy the original header into it. */ SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN); - 803fac6: 69bb ldr r3, [r7, #24] - 803fac8: 6858 ldr r0, [r3, #4] - 803faca: 687b ldr r3, [r7, #4] - 803facc: 3308 adds r3, #8 - 803face: 2214 movs r2, #20 - 803fad0: 4619 mov r1, r3 - 803fad2: f000 fef5 bl 80408c0 + 803faf6: 69bb ldr r3, [r7, #24] + 803faf8: 6858 ldr r0, [r3, #4] + 803fafa: 687b ldr r3, [r7, #4] + 803fafc: 3308 adds r3, #8 + 803fafe: 2214 movs r2, #20 + 803fb00: 4619 mov r1, r3 + 803fb02: f000 fef5 bl 80408f0 icmp_time_exceeded(p, ICMP_TE_FRAG); - 803fad6: 2101 movs r1, #1 - 803fad8: 69b8 ldr r0, [r7, #24] - 803fada: f7ff fc3d bl 803f358 + 803fb06: 2101 movs r1, #1 + 803fb08: 69b8 ldr r0, [r7, #24] + 803fb0a: f7ff fc3d bl 803f388 clen = pbuf_clen(p); - 803fade: 69b8 ldr r0, [r7, #24] - 803fae0: f7f7 fe9c bl 803781c - 803fae4: 4603 mov r3, r0 - 803fae6: 827b strh r3, [r7, #18] + 803fb0e: 69b8 ldr r0, [r7, #24] + 803fb10: f7f7 fe9c bl 803784c + 803fb14: 4603 mov r3, r0 + 803fb16: 827b strh r3, [r7, #18] LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff); - 803fae8: 8bfa ldrh r2, [r7, #30] - 803faea: 8a7b ldrh r3, [r7, #18] - 803faec: 4413 add r3, r2 - 803faee: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803faf2: db05 blt.n 803fb00 - 803faf4: 4b27 ldr r3, [pc, #156] ; (803fb94 ) - 803faf6: 22bc movs r2, #188 ; 0xbc - 803faf8: 492a ldr r1, [pc, #168] ; (803fba4 ) - 803fafa: 4828 ldr r0, [pc, #160] ; (803fb9c ) - 803fafc: f000 fff0 bl 8040ae0 + 803fb18: 8bfa ldrh r2, [r7, #30] + 803fb1a: 8a7b ldrh r3, [r7, #18] + 803fb1c: 4413 add r3, r2 + 803fb1e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 803fb22: db05 blt.n 803fb30 + 803fb24: 4b27 ldr r3, [pc, #156] ; (803fbc4 ) + 803fb26: 22bc movs r2, #188 ; 0xbc + 803fb28: 492a ldr r1, [pc, #168] ; (803fbd4 ) + 803fb2a: 4828 ldr r0, [pc, #160] ; (803fbcc ) + 803fb2c: f000 fff0 bl 8040b10 pbufs_freed = (u16_t)(pbufs_freed + clen); - 803fb00: 8bfa ldrh r2, [r7, #30] - 803fb02: 8a7b ldrh r3, [r7, #18] - 803fb04: 4413 add r3, r2 - 803fb06: 83fb strh r3, [r7, #30] + 803fb30: 8bfa ldrh r2, [r7, #30] + 803fb32: 8a7b ldrh r3, [r7, #18] + 803fb34: 4413 add r3, r2 + 803fb36: 83fb strh r3, [r7, #30] pbuf_free(p); - 803fb08: 69b8 ldr r0, [r7, #24] - 803fb0a: f7f7 fdff bl 803770c + 803fb38: 69b8 ldr r0, [r7, #24] + 803fb3a: f7f7 fdff bl 803773c } #endif /* LWIP_ICMP */ /* First, free all received pbufs. The individual pbufs need to be released separately as they have not yet been chained */ p = ipr->p; - 803fb0e: 687b ldr r3, [r7, #4] - 803fb10: 685b ldr r3, [r3, #4] - 803fb12: 61bb str r3, [r7, #24] + 803fb3e: 687b ldr r3, [r7, #4] + 803fb40: 685b ldr r3, [r3, #4] + 803fb42: 61bb str r3, [r7, #24] while (p != NULL) { - 803fb14: e01f b.n 803fb56 + 803fb44: e01f b.n 803fb86 struct pbuf *pcur; iprh = (struct ip_reass_helper *)p->payload; - 803fb16: 69bb ldr r3, [r7, #24] - 803fb18: 685b ldr r3, [r3, #4] - 803fb1a: 617b str r3, [r7, #20] + 803fb46: 69bb ldr r3, [r7, #24] + 803fb48: 685b ldr r3, [r3, #4] + 803fb4a: 617b str r3, [r7, #20] pcur = p; - 803fb1c: 69bb ldr r3, [r7, #24] - 803fb1e: 60fb str r3, [r7, #12] + 803fb4c: 69bb ldr r3, [r7, #24] + 803fb4e: 60fb str r3, [r7, #12] /* get the next pointer before freeing */ p = iprh->next_pbuf; - 803fb20: 697b ldr r3, [r7, #20] - 803fb22: 681b ldr r3, [r3, #0] - 803fb24: 61bb str r3, [r7, #24] + 803fb50: 697b ldr r3, [r7, #20] + 803fb52: 681b ldr r3, [r3, #0] + 803fb54: 61bb str r3, [r7, #24] clen = pbuf_clen(pcur); - 803fb26: 68f8 ldr r0, [r7, #12] - 803fb28: f7f7 fe78 bl 803781c - 803fb2c: 4603 mov r3, r0 - 803fb2e: 827b strh r3, [r7, #18] + 803fb56: 68f8 ldr r0, [r7, #12] + 803fb58: f7f7 fe78 bl 803784c + 803fb5c: 4603 mov r3, r0 + 803fb5e: 827b strh r3, [r7, #18] LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff); - 803fb30: 8bfa ldrh r2, [r7, #30] - 803fb32: 8a7b ldrh r3, [r7, #18] - 803fb34: 4413 add r3, r2 - 803fb36: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803fb3a: db05 blt.n 803fb48 - 803fb3c: 4b15 ldr r3, [pc, #84] ; (803fb94 ) - 803fb3e: 22cc movs r2, #204 ; 0xcc - 803fb40: 4918 ldr r1, [pc, #96] ; (803fba4 ) - 803fb42: 4816 ldr r0, [pc, #88] ; (803fb9c ) - 803fb44: f000 ffcc bl 8040ae0 + 803fb60: 8bfa ldrh r2, [r7, #30] + 803fb62: 8a7b ldrh r3, [r7, #18] + 803fb64: 4413 add r3, r2 + 803fb66: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 803fb6a: db05 blt.n 803fb78 + 803fb6c: 4b15 ldr r3, [pc, #84] ; (803fbc4 ) + 803fb6e: 22cc movs r2, #204 ; 0xcc + 803fb70: 4918 ldr r1, [pc, #96] ; (803fbd4 ) + 803fb72: 4816 ldr r0, [pc, #88] ; (803fbcc ) + 803fb74: f000 ffcc bl 8040b10 pbufs_freed = (u16_t)(pbufs_freed + clen); - 803fb48: 8bfa ldrh r2, [r7, #30] - 803fb4a: 8a7b ldrh r3, [r7, #18] - 803fb4c: 4413 add r3, r2 - 803fb4e: 83fb strh r3, [r7, #30] + 803fb78: 8bfa ldrh r2, [r7, #30] + 803fb7a: 8a7b ldrh r3, [r7, #18] + 803fb7c: 4413 add r3, r2 + 803fb7e: 83fb strh r3, [r7, #30] pbuf_free(pcur); - 803fb50: 68f8 ldr r0, [r7, #12] - 803fb52: f7f7 fddb bl 803770c + 803fb80: 68f8 ldr r0, [r7, #12] + 803fb82: f7f7 fddb bl 803773c while (p != NULL) { - 803fb56: 69bb ldr r3, [r7, #24] - 803fb58: 2b00 cmp r3, #0 - 803fb5a: d1dc bne.n 803fb16 + 803fb86: 69bb ldr r3, [r7, #24] + 803fb88: 2b00 cmp r3, #0 + 803fb8a: d1dc bne.n 803fb46 } /* Then, unchain the struct ip_reassdata from the list and free it. */ ip_reass_dequeue_datagram(ipr, prev); - 803fb5c: 6839 ldr r1, [r7, #0] - 803fb5e: 6878 ldr r0, [r7, #4] - 803fb60: f000 f8c2 bl 803fce8 + 803fb8c: 6839 ldr r1, [r7, #0] + 803fb8e: 6878 ldr r0, [r7, #4] + 803fb90: f000 f8c2 bl 803fd18 LWIP_ASSERT("ip_reass_pbufcount >= pbufs_freed", ip_reass_pbufcount >= pbufs_freed); - 803fb64: 4b10 ldr r3, [pc, #64] ; (803fba8 ) - 803fb66: 881b ldrh r3, [r3, #0] - 803fb68: 8bfa ldrh r2, [r7, #30] - 803fb6a: 429a cmp r2, r3 - 803fb6c: d905 bls.n 803fb7a - 803fb6e: 4b09 ldr r3, [pc, #36] ; (803fb94 ) - 803fb70: 22d2 movs r2, #210 ; 0xd2 - 803fb72: 490e ldr r1, [pc, #56] ; (803fbac ) - 803fb74: 4809 ldr r0, [pc, #36] ; (803fb9c ) - 803fb76: f000 ffb3 bl 8040ae0 + 803fb94: 4b10 ldr r3, [pc, #64] ; (803fbd8 ) + 803fb96: 881b ldrh r3, [r3, #0] + 803fb98: 8bfa ldrh r2, [r7, #30] + 803fb9a: 429a cmp r2, r3 + 803fb9c: d905 bls.n 803fbaa + 803fb9e: 4b09 ldr r3, [pc, #36] ; (803fbc4 ) + 803fba0: 22d2 movs r2, #210 ; 0xd2 + 803fba2: 490e ldr r1, [pc, #56] ; (803fbdc ) + 803fba4: 4809 ldr r0, [pc, #36] ; (803fbcc ) + 803fba6: f000 ffb3 bl 8040b10 ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - pbufs_freed); - 803fb7a: 4b0b ldr r3, [pc, #44] ; (803fba8 ) - 803fb7c: 881a ldrh r2, [r3, #0] - 803fb7e: 8bfb ldrh r3, [r7, #30] - 803fb80: 1ad3 subs r3, r2, r3 - 803fb82: b29a uxth r2, r3 - 803fb84: 4b08 ldr r3, [pc, #32] ; (803fba8 ) - 803fb86: 801a strh r2, [r3, #0] + 803fbaa: 4b0b ldr r3, [pc, #44] ; (803fbd8 ) + 803fbac: 881a ldrh r2, [r3, #0] + 803fbae: 8bfb ldrh r3, [r7, #30] + 803fbb0: 1ad3 subs r3, r2, r3 + 803fbb2: b29a uxth r2, r3 + 803fbb4: 4b08 ldr r3, [pc, #32] ; (803fbd8 ) + 803fbb6: 801a strh r2, [r3, #0] return pbufs_freed; - 803fb88: 8bfb ldrh r3, [r7, #30] -} - 803fb8a: 4618 mov r0, r3 - 803fb8c: 3720 adds r7, #32 - 803fb8e: 46bd mov sp, r7 - 803fb90: bd80 pop {r7, pc} - 803fb92: bf00 nop - 803fb94: 080449c0 .word 0x080449c0 - 803fb98: 080449fc .word 0x080449fc - 803fb9c: 08044a08 .word 0x08044a08 - 803fba0: 08044a30 .word 0x08044a30 - 803fba4: 08044a44 .word 0x08044a44 - 803fba8: 2400eab0 .word 0x2400eab0 - 803fbac: 08044a64 .word 0x08044a64 - -0803fbb0 : + 803fbb8: 8bfb ldrh r3, [r7, #30] +} + 803fbba: 4618 mov r0, r3 + 803fbbc: 3720 adds r7, #32 + 803fbbe: 46bd mov sp, r7 + 803fbc0: bd80 pop {r7, pc} + 803fbc2: bf00 nop + 803fbc4: 080449f0 .word 0x080449f0 + 803fbc8: 08044a2c .word 0x08044a2c + 803fbcc: 08044a38 .word 0x08044a38 + 803fbd0: 08044a60 .word 0x08044a60 + 803fbd4: 08044a74 .word 0x08044a74 + 803fbd8: 2400eab0 .word 0x2400eab0 + 803fbdc: 08044a94 .word 0x08044a94 + +0803fbe0 : * (used for freeing other datagrams if not enough space) * @return the number of pbufs freed */ static int ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed) { - 803fbb0: b580 push {r7, lr} - 803fbb2: b08a sub sp, #40 ; 0x28 - 803fbb4: af00 add r7, sp, #0 - 803fbb6: 6078 str r0, [r7, #4] - 803fbb8: 6039 str r1, [r7, #0] + 803fbe0: b580 push {r7, lr} + 803fbe2: b08a sub sp, #40 ; 0x28 + 803fbe4: af00 add r7, sp, #0 + 803fbe6: 6078 str r0, [r7, #4] + 803fbe8: 6039 str r1, [r7, #0] /* @todo Can't we simply remove the last datagram in the * linked list behind reassdatagrams? */ struct ip_reassdata *r, *oldest, *prev, *oldest_prev; int pbufs_freed = 0, pbufs_freed_current; - 803fbba: 2300 movs r3, #0 - 803fbbc: 617b str r3, [r7, #20] + 803fbea: 2300 movs r3, #0 + 803fbec: 617b str r3, [r7, #20] int other_datagrams; /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs, * but don't free the datagram that 'fraghdr' belongs to! */ do { oldest = NULL; - 803fbbe: 2300 movs r3, #0 - 803fbc0: 623b str r3, [r7, #32] + 803fbee: 2300 movs r3, #0 + 803fbf0: 623b str r3, [r7, #32] prev = NULL; - 803fbc2: 2300 movs r3, #0 - 803fbc4: 61fb str r3, [r7, #28] + 803fbf2: 2300 movs r3, #0 + 803fbf4: 61fb str r3, [r7, #28] oldest_prev = NULL; - 803fbc6: 2300 movs r3, #0 - 803fbc8: 61bb str r3, [r7, #24] + 803fbf6: 2300 movs r3, #0 + 803fbf8: 61bb str r3, [r7, #24] other_datagrams = 0; - 803fbca: 2300 movs r3, #0 - 803fbcc: 613b str r3, [r7, #16] + 803fbfa: 2300 movs r3, #0 + 803fbfc: 613b str r3, [r7, #16] r = reassdatagrams; - 803fbce: 4b28 ldr r3, [pc, #160] ; (803fc70 ) - 803fbd0: 681b ldr r3, [r3, #0] - 803fbd2: 627b str r3, [r7, #36] ; 0x24 + 803fbfe: 4b28 ldr r3, [pc, #160] ; (803fca0 ) + 803fc00: 681b ldr r3, [r3, #0] + 803fc02: 627b str r3, [r7, #36] ; 0x24 while (r != NULL) { - 803fbd4: e030 b.n 803fc38 + 803fc04: e030 b.n 803fc68 if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) { - 803fbd6: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fbd8: 695a ldr r2, [r3, #20] - 803fbda: 687b ldr r3, [r7, #4] - 803fbdc: 68db ldr r3, [r3, #12] - 803fbde: 429a cmp r2, r3 - 803fbe0: d10c bne.n 803fbfc - 803fbe2: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fbe4: 699a ldr r2, [r3, #24] - 803fbe6: 687b ldr r3, [r7, #4] - 803fbe8: 691b ldr r3, [r3, #16] - 803fbea: 429a cmp r2, r3 - 803fbec: d106 bne.n 803fbfc - 803fbee: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fbf0: 899a ldrh r2, [r3, #12] - 803fbf2: 687b ldr r3, [r7, #4] - 803fbf4: 889b ldrh r3, [r3, #4] - 803fbf6: b29b uxth r3, r3 - 803fbf8: 429a cmp r2, r3 - 803fbfa: d014 beq.n 803fc26 + 803fc06: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc08: 695a ldr r2, [r3, #20] + 803fc0a: 687b ldr r3, [r7, #4] + 803fc0c: 68db ldr r3, [r3, #12] + 803fc0e: 429a cmp r2, r3 + 803fc10: d10c bne.n 803fc2c + 803fc12: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc14: 699a ldr r2, [r3, #24] + 803fc16: 687b ldr r3, [r7, #4] + 803fc18: 691b ldr r3, [r3, #16] + 803fc1a: 429a cmp r2, r3 + 803fc1c: d106 bne.n 803fc2c + 803fc1e: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc20: 899a ldrh r2, [r3, #12] + 803fc22: 687b ldr r3, [r7, #4] + 803fc24: 889b ldrh r3, [r3, #4] + 803fc26: b29b uxth r3, r3 + 803fc28: 429a cmp r2, r3 + 803fc2a: d014 beq.n 803fc56 /* Not the same datagram as fraghdr */ other_datagrams++; - 803fbfc: 693b ldr r3, [r7, #16] - 803fbfe: 3301 adds r3, #1 - 803fc00: 613b str r3, [r7, #16] + 803fc2c: 693b ldr r3, [r7, #16] + 803fc2e: 3301 adds r3, #1 + 803fc30: 613b str r3, [r7, #16] if (oldest == NULL) { - 803fc02: 6a3b ldr r3, [r7, #32] - 803fc04: 2b00 cmp r3, #0 - 803fc06: d104 bne.n 803fc12 + 803fc32: 6a3b ldr r3, [r7, #32] + 803fc34: 2b00 cmp r3, #0 + 803fc36: d104 bne.n 803fc42 oldest = r; - 803fc08: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc0a: 623b str r3, [r7, #32] + 803fc38: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc3a: 623b str r3, [r7, #32] oldest_prev = prev; - 803fc0c: 69fb ldr r3, [r7, #28] - 803fc0e: 61bb str r3, [r7, #24] - 803fc10: e009 b.n 803fc26 + 803fc3c: 69fb ldr r3, [r7, #28] + 803fc3e: 61bb str r3, [r7, #24] + 803fc40: e009 b.n 803fc56 } else if (r->timer <= oldest->timer) { - 803fc12: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc14: 7fda ldrb r2, [r3, #31] - 803fc16: 6a3b ldr r3, [r7, #32] - 803fc18: 7fdb ldrb r3, [r3, #31] - 803fc1a: 429a cmp r2, r3 - 803fc1c: d803 bhi.n 803fc26 + 803fc42: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc44: 7fda ldrb r2, [r3, #31] + 803fc46: 6a3b ldr r3, [r7, #32] + 803fc48: 7fdb ldrb r3, [r3, #31] + 803fc4a: 429a cmp r2, r3 + 803fc4c: d803 bhi.n 803fc56 /* older than the previous oldest */ oldest = r; - 803fc1e: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc20: 623b str r3, [r7, #32] + 803fc4e: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc50: 623b str r3, [r7, #32] oldest_prev = prev; - 803fc22: 69fb ldr r3, [r7, #28] - 803fc24: 61bb str r3, [r7, #24] + 803fc52: 69fb ldr r3, [r7, #28] + 803fc54: 61bb str r3, [r7, #24] } } if (r->next != NULL) { - 803fc26: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc28: 681b ldr r3, [r3, #0] - 803fc2a: 2b00 cmp r3, #0 - 803fc2c: d001 beq.n 803fc32 + 803fc56: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc58: 681b ldr r3, [r3, #0] + 803fc5a: 2b00 cmp r3, #0 + 803fc5c: d001 beq.n 803fc62 prev = r; - 803fc2e: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc30: 61fb str r3, [r7, #28] + 803fc5e: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc60: 61fb str r3, [r7, #28] } r = r->next; - 803fc32: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc34: 681b ldr r3, [r3, #0] - 803fc36: 627b str r3, [r7, #36] ; 0x24 + 803fc62: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc64: 681b ldr r3, [r3, #0] + 803fc66: 627b str r3, [r7, #36] ; 0x24 while (r != NULL) { - 803fc38: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc3a: 2b00 cmp r3, #0 - 803fc3c: d1cb bne.n 803fbd6 + 803fc68: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc6a: 2b00 cmp r3, #0 + 803fc6c: d1cb bne.n 803fc06 } if (oldest != NULL) { - 803fc3e: 6a3b ldr r3, [r7, #32] - 803fc40: 2b00 cmp r3, #0 - 803fc42: d008 beq.n 803fc56 + 803fc6e: 6a3b ldr r3, [r7, #32] + 803fc70: 2b00 cmp r3, #0 + 803fc72: d008 beq.n 803fc86 pbufs_freed_current = ip_reass_free_complete_datagram(oldest, oldest_prev); - 803fc44: 69b9 ldr r1, [r7, #24] - 803fc46: 6a38 ldr r0, [r7, #32] - 803fc48: f7ff ff0e bl 803fa68 - 803fc4c: 60f8 str r0, [r7, #12] + 803fc74: 69b9 ldr r1, [r7, #24] + 803fc76: 6a38 ldr r0, [r7, #32] + 803fc78: f7ff ff0e bl 803fa98 + 803fc7c: 60f8 str r0, [r7, #12] pbufs_freed += pbufs_freed_current; - 803fc4e: 697a ldr r2, [r7, #20] - 803fc50: 68fb ldr r3, [r7, #12] - 803fc52: 4413 add r3, r2 - 803fc54: 617b str r3, [r7, #20] + 803fc7e: 697a ldr r2, [r7, #20] + 803fc80: 68fb ldr r3, [r7, #12] + 803fc82: 4413 add r3, r2 + 803fc84: 617b str r3, [r7, #20] } } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1)); - 803fc56: 697a ldr r2, [r7, #20] - 803fc58: 683b ldr r3, [r7, #0] - 803fc5a: 429a cmp r2, r3 - 803fc5c: da02 bge.n 803fc64 - 803fc5e: 693b ldr r3, [r7, #16] - 803fc60: 2b01 cmp r3, #1 - 803fc62: dcac bgt.n 803fbbe + 803fc86: 697a ldr r2, [r7, #20] + 803fc88: 683b ldr r3, [r7, #0] + 803fc8a: 429a cmp r2, r3 + 803fc8c: da02 bge.n 803fc94 + 803fc8e: 693b ldr r3, [r7, #16] + 803fc90: 2b01 cmp r3, #1 + 803fc92: dcac bgt.n 803fbee return pbufs_freed; - 803fc64: 697b ldr r3, [r7, #20] + 803fc94: 697b ldr r3, [r7, #20] } - 803fc66: 4618 mov r0, r3 - 803fc68: 3728 adds r7, #40 ; 0x28 - 803fc6a: 46bd mov sp, r7 - 803fc6c: bd80 pop {r7, pc} - 803fc6e: bf00 nop - 803fc70: 2400eaac .word 0x2400eaac + 803fc96: 4618 mov r0, r3 + 803fc98: 3728 adds r7, #40 ; 0x28 + 803fc9a: 46bd mov sp, r7 + 803fc9c: bd80 pop {r7, pc} + 803fc9e: bf00 nop + 803fca0: 2400eaac .word 0x2400eaac -0803fc74 : +0803fca4 : * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space) * @return A pointer to the queue location into which the fragment was enqueued */ static struct ip_reassdata * ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen) { - 803fc74: b580 push {r7, lr} - 803fc76: b084 sub sp, #16 - 803fc78: af00 add r7, sp, #0 - 803fc7a: 6078 str r0, [r7, #4] - 803fc7c: 6039 str r1, [r7, #0] + 803fca4: b580 push {r7, lr} + 803fca6: b084 sub sp, #16 + 803fca8: af00 add r7, sp, #0 + 803fcaa: 6078 str r0, [r7, #4] + 803fcac: 6039 str r1, [r7, #0] #if ! IP_REASS_FREE_OLDEST LWIP_UNUSED_ARG(clen); #endif /* No matching previous fragment found, allocate a new reassdata struct */ ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA); - 803fc7e: 2004 movs r0, #4 - 803fc80: f7f6 fe42 bl 8036908 - 803fc84: 60f8 str r0, [r7, #12] + 803fcae: 2004 movs r0, #4 + 803fcb0: f7f6 fe42 bl 8036938 + 803fcb4: 60f8 str r0, [r7, #12] if (ipr == NULL) { - 803fc86: 68fb ldr r3, [r7, #12] - 803fc88: 2b00 cmp r3, #0 - 803fc8a: d110 bne.n 803fcae + 803fcb6: 68fb ldr r3, [r7, #12] + 803fcb8: 2b00 cmp r3, #0 + 803fcba: d110 bne.n 803fcde #if IP_REASS_FREE_OLDEST if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) { - 803fc8c: 6839 ldr r1, [r7, #0] - 803fc8e: 6878 ldr r0, [r7, #4] - 803fc90: f7ff ff8e bl 803fbb0 - 803fc94: 4602 mov r2, r0 - 803fc96: 683b ldr r3, [r7, #0] - 803fc98: 4293 cmp r3, r2 - 803fc9a: dc03 bgt.n 803fca4 + 803fcbc: 6839 ldr r1, [r7, #0] + 803fcbe: 6878 ldr r0, [r7, #4] + 803fcc0: f7ff ff8e bl 803fbe0 + 803fcc4: 4602 mov r2, r0 + 803fcc6: 683b ldr r3, [r7, #0] + 803fcc8: 4293 cmp r3, r2 + 803fcca: dc03 bgt.n 803fcd4 ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA); - 803fc9c: 2004 movs r0, #4 - 803fc9e: f7f6 fe33 bl 8036908 - 803fca2: 60f8 str r0, [r7, #12] + 803fccc: 2004 movs r0, #4 + 803fcce: f7f6 fe33 bl 8036938 + 803fcd2: 60f8 str r0, [r7, #12] } if (ipr == NULL) - 803fca4: 68fb ldr r3, [r7, #12] - 803fca6: 2b00 cmp r3, #0 - 803fca8: d101 bne.n 803fcae + 803fcd4: 68fb ldr r3, [r7, #12] + 803fcd6: 2b00 cmp r3, #0 + 803fcd8: d101 bne.n 803fcde #endif /* IP_REASS_FREE_OLDEST */ { IPFRAG_STATS_INC(ip_frag.memerr); LWIP_DEBUGF(IP_REASS_DEBUG, ("Failed to alloc reassdata struct\n")); return NULL; - 803fcaa: 2300 movs r3, #0 - 803fcac: e016 b.n 803fcdc + 803fcda: 2300 movs r3, #0 + 803fcdc: e016 b.n 803fd0c } } memset(ipr, 0, sizeof(struct ip_reassdata)); - 803fcae: 2220 movs r2, #32 - 803fcb0: 2100 movs r1, #0 - 803fcb2: 68f8 ldr r0, [r7, #12] - 803fcb4: f000 fe2c bl 8040910 + 803fcde: 2220 movs r2, #32 + 803fce0: 2100 movs r1, #0 + 803fce2: 68f8 ldr r0, [r7, #12] + 803fce4: f000 fe2c bl 8040940 ipr->timer = IP_REASS_MAXAGE; - 803fcb8: 68fb ldr r3, [r7, #12] - 803fcba: 220f movs r2, #15 - 803fcbc: 77da strb r2, [r3, #31] + 803fce8: 68fb ldr r3, [r7, #12] + 803fcea: 220f movs r2, #15 + 803fcec: 77da strb r2, [r3, #31] /* enqueue the new structure to the front of the list */ ipr->next = reassdatagrams; - 803fcbe: 4b09 ldr r3, [pc, #36] ; (803fce4 ) - 803fcc0: 681a ldr r2, [r3, #0] - 803fcc2: 68fb ldr r3, [r7, #12] - 803fcc4: 601a str r2, [r3, #0] + 803fcee: 4b09 ldr r3, [pc, #36] ; (803fd14 ) + 803fcf0: 681a ldr r2, [r3, #0] + 803fcf2: 68fb ldr r3, [r7, #12] + 803fcf4: 601a str r2, [r3, #0] reassdatagrams = ipr; - 803fcc6: 4a07 ldr r2, [pc, #28] ; (803fce4 ) - 803fcc8: 68fb ldr r3, [r7, #12] - 803fcca: 6013 str r3, [r2, #0] + 803fcf6: 4a07 ldr r2, [pc, #28] ; (803fd14 ) + 803fcf8: 68fb ldr r3, [r7, #12] + 803fcfa: 6013 str r3, [r2, #0] /* copy the ip header for later tests and input */ /* @todo: no ip options supported? */ SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN); - 803fccc: 68fb ldr r3, [r7, #12] - 803fcce: 3308 adds r3, #8 - 803fcd0: 2214 movs r2, #20 - 803fcd2: 6879 ldr r1, [r7, #4] - 803fcd4: 4618 mov r0, r3 - 803fcd6: f000 fdf3 bl 80408c0 + 803fcfc: 68fb ldr r3, [r7, #12] + 803fcfe: 3308 adds r3, #8 + 803fd00: 2214 movs r2, #20 + 803fd02: 6879 ldr r1, [r7, #4] + 803fd04: 4618 mov r0, r3 + 803fd06: f000 fdf3 bl 80408f0 return ipr; - 803fcda: 68fb ldr r3, [r7, #12] + 803fd0a: 68fb ldr r3, [r7, #12] } - 803fcdc: 4618 mov r0, r3 - 803fcde: 3710 adds r7, #16 - 803fce0: 46bd mov sp, r7 - 803fce2: bd80 pop {r7, pc} - 803fce4: 2400eaac .word 0x2400eaac + 803fd0c: 4618 mov r0, r3 + 803fd0e: 3710 adds r7, #16 + 803fd10: 46bd mov sp, r7 + 803fd12: bd80 pop {r7, pc} + 803fd14: 2400eaac .word 0x2400eaac -0803fce8 : +0803fd18 : * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs. * @param ipr points to the queue entry to dequeue */ static void ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) { - 803fce8: b580 push {r7, lr} - 803fcea: b082 sub sp, #8 - 803fcec: af00 add r7, sp, #0 - 803fcee: 6078 str r0, [r7, #4] - 803fcf0: 6039 str r1, [r7, #0] + 803fd18: b580 push {r7, lr} + 803fd1a: b082 sub sp, #8 + 803fd1c: af00 add r7, sp, #0 + 803fd1e: 6078 str r0, [r7, #4] + 803fd20: 6039 str r1, [r7, #0] /* dequeue the reass struct */ if (reassdatagrams == ipr) { - 803fcf2: 4b10 ldr r3, [pc, #64] ; (803fd34 ) - 803fcf4: 681b ldr r3, [r3, #0] - 803fcf6: 687a ldr r2, [r7, #4] - 803fcf8: 429a cmp r2, r3 - 803fcfa: d104 bne.n 803fd06 + 803fd22: 4b10 ldr r3, [pc, #64] ; (803fd64 ) + 803fd24: 681b ldr r3, [r3, #0] + 803fd26: 687a ldr r2, [r7, #4] + 803fd28: 429a cmp r2, r3 + 803fd2a: d104 bne.n 803fd36 /* it was the first in the list */ reassdatagrams = ipr->next; - 803fcfc: 687b ldr r3, [r7, #4] - 803fcfe: 681b ldr r3, [r3, #0] - 803fd00: 4a0c ldr r2, [pc, #48] ; (803fd34 ) - 803fd02: 6013 str r3, [r2, #0] - 803fd04: e00d b.n 803fd22 + 803fd2c: 687b ldr r3, [r7, #4] + 803fd2e: 681b ldr r3, [r3, #0] + 803fd30: 4a0c ldr r2, [pc, #48] ; (803fd64 ) + 803fd32: 6013 str r3, [r2, #0] + 803fd34: e00d b.n 803fd52 } else { /* it wasn't the first, so it must have a valid 'prev' */ LWIP_ASSERT("sanity check linked list", prev != NULL); - 803fd06: 683b ldr r3, [r7, #0] - 803fd08: 2b00 cmp r3, #0 - 803fd0a: d106 bne.n 803fd1a - 803fd0c: 4b0a ldr r3, [pc, #40] ; (803fd38 ) - 803fd0e: f240 1245 movw r2, #325 ; 0x145 - 803fd12: 490a ldr r1, [pc, #40] ; (803fd3c ) - 803fd14: 480a ldr r0, [pc, #40] ; (803fd40 ) - 803fd16: f000 fee3 bl 8040ae0 + 803fd36: 683b ldr r3, [r7, #0] + 803fd38: 2b00 cmp r3, #0 + 803fd3a: d106 bne.n 803fd4a + 803fd3c: 4b0a ldr r3, [pc, #40] ; (803fd68 ) + 803fd3e: f240 1245 movw r2, #325 ; 0x145 + 803fd42: 490a ldr r1, [pc, #40] ; (803fd6c ) + 803fd44: 480a ldr r0, [pc, #40] ; (803fd70 ) + 803fd46: f000 fee3 bl 8040b10 prev->next = ipr->next; - 803fd1a: 687b ldr r3, [r7, #4] - 803fd1c: 681a ldr r2, [r3, #0] - 803fd1e: 683b ldr r3, [r7, #0] - 803fd20: 601a str r2, [r3, #0] + 803fd4a: 687b ldr r3, [r7, #4] + 803fd4c: 681a ldr r2, [r3, #0] + 803fd4e: 683b ldr r3, [r7, #0] + 803fd50: 601a str r2, [r3, #0] } /* now we can free the ip_reassdata struct */ memp_free(MEMP_REASSDATA, ipr); - 803fd22: 6879 ldr r1, [r7, #4] - 803fd24: 2004 movs r0, #4 - 803fd26: f7f6 fe5f bl 80369e8 -} - 803fd2a: bf00 nop - 803fd2c: 3708 adds r7, #8 - 803fd2e: 46bd mov sp, r7 - 803fd30: bd80 pop {r7, pc} - 803fd32: bf00 nop - 803fd34: 2400eaac .word 0x2400eaac - 803fd38: 080449c0 .word 0x080449c0 - 803fd3c: 08044a88 .word 0x08044a88 - 803fd40: 08044a08 .word 0x08044a08 - -0803fd44 : + 803fd52: 6879 ldr r1, [r7, #4] + 803fd54: 2004 movs r0, #4 + 803fd56: f7f6 fe5f bl 8036a18 +} + 803fd5a: bf00 nop + 803fd5c: 3708 adds r7, #8 + 803fd5e: 46bd mov sp, r7 + 803fd60: bd80 pop {r7, pc} + 803fd62: bf00 nop + 803fd64: 2400eaac .word 0x2400eaac + 803fd68: 080449f0 .word 0x080449f0 + 803fd6c: 08044ab8 .word 0x08044ab8 + 803fd70: 08044a38 .word 0x08044a38 + +0803fd74 : * @param is_last is 1 if this pbuf has MF==0 (ipr->flags not updated yet) * @return see IP_REASS_VALIDATE_* defines */ static int ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p, int is_last) { - 803fd44: b580 push {r7, lr} - 803fd46: b08c sub sp, #48 ; 0x30 - 803fd48: af00 add r7, sp, #0 - 803fd4a: 60f8 str r0, [r7, #12] - 803fd4c: 60b9 str r1, [r7, #8] - 803fd4e: 607a str r2, [r7, #4] + 803fd74: b580 push {r7, lr} + 803fd76: b08c sub sp, #48 ; 0x30 + 803fd78: af00 add r7, sp, #0 + 803fd7a: 60f8 str r0, [r7, #12] + 803fd7c: 60b9 str r1, [r7, #8] + 803fd7e: 607a str r2, [r7, #4] struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev = NULL; - 803fd50: 2300 movs r3, #0 - 803fd52: 62bb str r3, [r7, #40] ; 0x28 + 803fd80: 2300 movs r3, #0 + 803fd82: 62bb str r3, [r7, #40] ; 0x28 struct pbuf *q; u16_t offset, len; u8_t hlen; struct ip_hdr *fraghdr; int valid = 1; - 803fd54: 2301 movs r3, #1 - 803fd56: 623b str r3, [r7, #32] + 803fd84: 2301 movs r3, #1 + 803fd86: 623b str r3, [r7, #32] /* Extract length and fragment offset from current fragment */ fraghdr = (struct ip_hdr *)new_p->payload; - 803fd58: 68bb ldr r3, [r7, #8] - 803fd5a: 685b ldr r3, [r3, #4] - 803fd5c: 61fb str r3, [r7, #28] + 803fd88: 68bb ldr r3, [r7, #8] + 803fd8a: 685b ldr r3, [r3, #4] + 803fd8c: 61fb str r3, [r7, #28] len = lwip_ntohs(IPH_LEN(fraghdr)); - 803fd5e: 69fb ldr r3, [r7, #28] - 803fd60: 885b ldrh r3, [r3, #2] - 803fd62: b29b uxth r3, r3 - 803fd64: 4618 mov r0, r3 - 803fd66: f7f6 f89f bl 8035ea8 - 803fd6a: 4603 mov r3, r0 - 803fd6c: 837b strh r3, [r7, #26] + 803fd8e: 69fb ldr r3, [r7, #28] + 803fd90: 885b ldrh r3, [r3, #2] + 803fd92: b29b uxth r3, r3 + 803fd94: 4618 mov r0, r3 + 803fd96: f7f6 f89f bl 8035ed8 + 803fd9a: 4603 mov r3, r0 + 803fd9c: 837b strh r3, [r7, #26] hlen = IPH_HL_BYTES(fraghdr); - 803fd6e: 69fb ldr r3, [r7, #28] - 803fd70: 781b ldrb r3, [r3, #0] - 803fd72: f003 030f and.w r3, r3, #15 - 803fd76: b2db uxtb r3, r3 - 803fd78: 009b lsls r3, r3, #2 - 803fd7a: 767b strb r3, [r7, #25] + 803fd9e: 69fb ldr r3, [r7, #28] + 803fda0: 781b ldrb r3, [r3, #0] + 803fda2: f003 030f and.w r3, r3, #15 + 803fda6: b2db uxtb r3, r3 + 803fda8: 009b lsls r3, r3, #2 + 803fdaa: 767b strb r3, [r7, #25] if (hlen > len) { - 803fd7c: 7e7b ldrb r3, [r7, #25] - 803fd7e: b29b uxth r3, r3 - 803fd80: 8b7a ldrh r2, [r7, #26] - 803fd82: 429a cmp r2, r3 - 803fd84: d202 bcs.n 803fd8c + 803fdac: 7e7b ldrb r3, [r7, #25] + 803fdae: b29b uxth r3, r3 + 803fdb0: 8b7a ldrh r2, [r7, #26] + 803fdb2: 429a cmp r2, r3 + 803fdb4: d202 bcs.n 803fdbc /* invalid datagram */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fd86: f04f 33ff mov.w r3, #4294967295 - 803fd8a: e135 b.n 803fff8 + 803fdb6: f04f 33ff mov.w r3, #4294967295 + 803fdba: e135 b.n 8040028 } len = (u16_t)(len - hlen); - 803fd8c: 7e7b ldrb r3, [r7, #25] - 803fd8e: b29b uxth r3, r3 - 803fd90: 8b7a ldrh r2, [r7, #26] - 803fd92: 1ad3 subs r3, r2, r3 - 803fd94: 837b strh r3, [r7, #26] + 803fdbc: 7e7b ldrb r3, [r7, #25] + 803fdbe: b29b uxth r3, r3 + 803fdc0: 8b7a ldrh r2, [r7, #26] + 803fdc2: 1ad3 subs r3, r2, r3 + 803fdc4: 837b strh r3, [r7, #26] offset = IPH_OFFSET_BYTES(fraghdr); - 803fd96: 69fb ldr r3, [r7, #28] - 803fd98: 88db ldrh r3, [r3, #6] - 803fd9a: b29b uxth r3, r3 - 803fd9c: 4618 mov r0, r3 - 803fd9e: f7f6 f883 bl 8035ea8 - 803fda2: 4603 mov r3, r0 - 803fda4: f3c3 030c ubfx r3, r3, #0, #13 - 803fda8: b29b uxth r3, r3 - 803fdaa: 00db lsls r3, r3, #3 - 803fdac: 82fb strh r3, [r7, #22] + 803fdc6: 69fb ldr r3, [r7, #28] + 803fdc8: 88db ldrh r3, [r3, #6] + 803fdca: b29b uxth r3, r3 + 803fdcc: 4618 mov r0, r3 + 803fdce: f7f6 f883 bl 8035ed8 + 803fdd2: 4603 mov r3, r0 + 803fdd4: f3c3 030c ubfx r3, r3, #0, #13 + 803fdd8: b29b uxth r3, r3 + 803fdda: 00db lsls r3, r3, #3 + 803fddc: 82fb strh r3, [r7, #22] /* overwrite the fragment's ip header from the pbuf with our helper struct, * and setup the embedded helper structure. */ /* make sure the struct ip_reass_helper fits into the IP header */ LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN", sizeof(struct ip_reass_helper) <= IP_HLEN); iprh = (struct ip_reass_helper *)new_p->payload; - 803fdae: 68bb ldr r3, [r7, #8] - 803fdb0: 685b ldr r3, [r3, #4] - 803fdb2: 62fb str r3, [r7, #44] ; 0x2c + 803fdde: 68bb ldr r3, [r7, #8] + 803fde0: 685b ldr r3, [r3, #4] + 803fde2: 62fb str r3, [r7, #44] ; 0x2c iprh->next_pbuf = NULL; - 803fdb4: 6afb ldr r3, [r7, #44] ; 0x2c - 803fdb6: 2200 movs r2, #0 - 803fdb8: 701a strb r2, [r3, #0] - 803fdba: 2200 movs r2, #0 - 803fdbc: 705a strb r2, [r3, #1] - 803fdbe: 2200 movs r2, #0 - 803fdc0: 709a strb r2, [r3, #2] - 803fdc2: 2200 movs r2, #0 - 803fdc4: 70da strb r2, [r3, #3] + 803fde4: 6afb ldr r3, [r7, #44] ; 0x2c + 803fde6: 2200 movs r2, #0 + 803fde8: 701a strb r2, [r3, #0] + 803fdea: 2200 movs r2, #0 + 803fdec: 705a strb r2, [r3, #1] + 803fdee: 2200 movs r2, #0 + 803fdf0: 709a strb r2, [r3, #2] + 803fdf2: 2200 movs r2, #0 + 803fdf4: 70da strb r2, [r3, #3] iprh->start = offset; - 803fdc6: 6afb ldr r3, [r7, #44] ; 0x2c - 803fdc8: 8afa ldrh r2, [r7, #22] - 803fdca: 809a strh r2, [r3, #4] + 803fdf6: 6afb ldr r3, [r7, #44] ; 0x2c + 803fdf8: 8afa ldrh r2, [r7, #22] + 803fdfa: 809a strh r2, [r3, #4] iprh->end = (u16_t)(offset + len); - 803fdcc: 8afa ldrh r2, [r7, #22] - 803fdce: 8b7b ldrh r3, [r7, #26] - 803fdd0: 4413 add r3, r2 - 803fdd2: b29a uxth r2, r3 - 803fdd4: 6afb ldr r3, [r7, #44] ; 0x2c - 803fdd6: 80da strh r2, [r3, #6] + 803fdfc: 8afa ldrh r2, [r7, #22] + 803fdfe: 8b7b ldrh r3, [r7, #26] + 803fe00: 4413 add r3, r2 + 803fe02: b29a uxth r2, r3 + 803fe04: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe06: 80da strh r2, [r3, #6] if (iprh->end < offset) { - 803fdd8: 6afb ldr r3, [r7, #44] ; 0x2c - 803fdda: 88db ldrh r3, [r3, #6] - 803fddc: b29b uxth r3, r3 - 803fdde: 8afa ldrh r2, [r7, #22] - 803fde0: 429a cmp r2, r3 - 803fde2: d902 bls.n 803fdea + 803fe08: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe0a: 88db ldrh r3, [r3, #6] + 803fe0c: b29b uxth r3, r3 + 803fe0e: 8afa ldrh r2, [r7, #22] + 803fe10: 429a cmp r2, r3 + 803fe12: d902 bls.n 803fe1a /* u16_t overflow, cannot handle this */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fde4: f04f 33ff mov.w r3, #4294967295 - 803fde8: e106 b.n 803fff8 + 803fe14: f04f 33ff mov.w r3, #4294967295 + 803fe18: e106 b.n 8040028 } /* Iterate through until we either get to the end of the list (append), * or we find one with a larger offset (insert). */ for (q = ipr->p; q != NULL;) { - 803fdea: 68fb ldr r3, [r7, #12] - 803fdec: 685b ldr r3, [r3, #4] - 803fdee: 627b str r3, [r7, #36] ; 0x24 - 803fdf0: e068 b.n 803fec4 + 803fe1a: 68fb ldr r3, [r7, #12] + 803fe1c: 685b ldr r3, [r3, #4] + 803fe1e: 627b str r3, [r7, #36] ; 0x24 + 803fe20: e068 b.n 803fef4 iprh_tmp = (struct ip_reass_helper *)q->payload; - 803fdf2: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fdf4: 685b ldr r3, [r3, #4] - 803fdf6: 613b str r3, [r7, #16] + 803fe22: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fe24: 685b ldr r3, [r3, #4] + 803fe26: 613b str r3, [r7, #16] if (iprh->start < iprh_tmp->start) { - 803fdf8: 6afb ldr r3, [r7, #44] ; 0x2c - 803fdfa: 889b ldrh r3, [r3, #4] - 803fdfc: b29a uxth r2, r3 - 803fdfe: 693b ldr r3, [r7, #16] - 803fe00: 889b ldrh r3, [r3, #4] - 803fe02: b29b uxth r3, r3 - 803fe04: 429a cmp r2, r3 - 803fe06: d235 bcs.n 803fe74 + 803fe28: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe2a: 889b ldrh r3, [r3, #4] + 803fe2c: b29a uxth r2, r3 + 803fe2e: 693b ldr r3, [r7, #16] + 803fe30: 889b ldrh r3, [r3, #4] + 803fe32: b29b uxth r3, r3 + 803fe34: 429a cmp r2, r3 + 803fe36: d235 bcs.n 803fea4 /* the new pbuf should be inserted before this */ iprh->next_pbuf = q; - 803fe08: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe0a: 6a7a ldr r2, [r7, #36] ; 0x24 - 803fe0c: 601a str r2, [r3, #0] + 803fe38: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe3a: 6a7a ldr r2, [r7, #36] ; 0x24 + 803fe3c: 601a str r2, [r3, #0] if (iprh_prev != NULL) { - 803fe0e: 6abb ldr r3, [r7, #40] ; 0x28 - 803fe10: 2b00 cmp r3, #0 - 803fe12: d020 beq.n 803fe56 + 803fe3e: 6abb ldr r3, [r7, #40] ; 0x28 + 803fe40: 2b00 cmp r3, #0 + 803fe42: d020 beq.n 803fe86 /* not the fragment with the lowest offset */ #if IP_REASS_CHECK_OVERLAP if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) { - 803fe14: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe16: 889b ldrh r3, [r3, #4] - 803fe18: b29a uxth r2, r3 - 803fe1a: 6abb ldr r3, [r7, #40] ; 0x28 - 803fe1c: 88db ldrh r3, [r3, #6] - 803fe1e: b29b uxth r3, r3 - 803fe20: 429a cmp r2, r3 - 803fe22: d307 bcc.n 803fe34 - 803fe24: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe26: 88db ldrh r3, [r3, #6] - 803fe28: b29a uxth r2, r3 - 803fe2a: 693b ldr r3, [r7, #16] - 803fe2c: 889b ldrh r3, [r3, #4] - 803fe2e: b29b uxth r3, r3 - 803fe30: 429a cmp r2, r3 - 803fe32: d902 bls.n 803fe3a + 803fe44: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe46: 889b ldrh r3, [r3, #4] + 803fe48: b29a uxth r2, r3 + 803fe4a: 6abb ldr r3, [r7, #40] ; 0x28 + 803fe4c: 88db ldrh r3, [r3, #6] + 803fe4e: b29b uxth r3, r3 + 803fe50: 429a cmp r2, r3 + 803fe52: d307 bcc.n 803fe64 + 803fe54: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe56: 88db ldrh r3, [r3, #6] + 803fe58: b29a uxth r2, r3 + 803fe5a: 693b ldr r3, [r7, #16] + 803fe5c: 889b ldrh r3, [r3, #4] + 803fe5e: b29b uxth r3, r3 + 803fe60: 429a cmp r2, r3 + 803fe62: d902 bls.n 803fe6a /* fragment overlaps with previous or following, throw away */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fe34: f04f 33ff mov.w r3, #4294967295 - 803fe38: e0de b.n 803fff8 + 803fe64: f04f 33ff mov.w r3, #4294967295 + 803fe68: e0de b.n 8040028 } #endif /* IP_REASS_CHECK_OVERLAP */ iprh_prev->next_pbuf = new_p; - 803fe3a: 6abb ldr r3, [r7, #40] ; 0x28 - 803fe3c: 68ba ldr r2, [r7, #8] - 803fe3e: 601a str r2, [r3, #0] + 803fe6a: 6abb ldr r3, [r7, #40] ; 0x28 + 803fe6c: 68ba ldr r2, [r7, #8] + 803fe6e: 601a str r2, [r3, #0] if (iprh_prev->end != iprh->start) { - 803fe40: 6abb ldr r3, [r7, #40] ; 0x28 - 803fe42: 88db ldrh r3, [r3, #6] - 803fe44: b29a uxth r2, r3 - 803fe46: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe48: 889b ldrh r3, [r3, #4] - 803fe4a: b29b uxth r3, r3 - 803fe4c: 429a cmp r2, r3 - 803fe4e: d03d beq.n 803fecc + 803fe70: 6abb ldr r3, [r7, #40] ; 0x28 + 803fe72: 88db ldrh r3, [r3, #6] + 803fe74: b29a uxth r2, r3 + 803fe76: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe78: 889b ldrh r3, [r3, #4] + 803fe7a: b29b uxth r3, r3 + 803fe7c: 429a cmp r2, r3 + 803fe7e: d03d beq.n 803fefc /* There is a fragment missing between the current * and the previous fragment */ valid = 0; - 803fe50: 2300 movs r3, #0 - 803fe52: 623b str r3, [r7, #32] + 803fe80: 2300 movs r3, #0 + 803fe82: 623b str r3, [r7, #32] } #endif /* IP_REASS_CHECK_OVERLAP */ /* fragment with the lowest offset */ ipr->p = new_p; } break; - 803fe54: e03a b.n 803fecc + 803fe84: e03a b.n 803fefc if (iprh->end > iprh_tmp->start) { - 803fe56: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe58: 88db ldrh r3, [r3, #6] - 803fe5a: b29a uxth r2, r3 - 803fe5c: 693b ldr r3, [r7, #16] - 803fe5e: 889b ldrh r3, [r3, #4] - 803fe60: b29b uxth r3, r3 - 803fe62: 429a cmp r2, r3 - 803fe64: d902 bls.n 803fe6c + 803fe86: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe88: 88db ldrh r3, [r3, #6] + 803fe8a: b29a uxth r2, r3 + 803fe8c: 693b ldr r3, [r7, #16] + 803fe8e: 889b ldrh r3, [r3, #4] + 803fe90: b29b uxth r3, r3 + 803fe92: 429a cmp r2, r3 + 803fe94: d902 bls.n 803fe9c return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fe66: f04f 33ff mov.w r3, #4294967295 - 803fe6a: e0c5 b.n 803fff8 + 803fe96: f04f 33ff mov.w r3, #4294967295 + 803fe9a: e0c5 b.n 8040028 ipr->p = new_p; - 803fe6c: 68fb ldr r3, [r7, #12] - 803fe6e: 68ba ldr r2, [r7, #8] - 803fe70: 605a str r2, [r3, #4] + 803fe9c: 68fb ldr r3, [r7, #12] + 803fe9e: 68ba ldr r2, [r7, #8] + 803fea0: 605a str r2, [r3, #4] break; - 803fe72: e02b b.n 803fecc + 803fea2: e02b b.n 803fefc } else if (iprh->start == iprh_tmp->start) { - 803fe74: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe76: 889b ldrh r3, [r3, #4] - 803fe78: b29a uxth r2, r3 - 803fe7a: 693b ldr r3, [r7, #16] - 803fe7c: 889b ldrh r3, [r3, #4] - 803fe7e: b29b uxth r3, r3 - 803fe80: 429a cmp r2, r3 - 803fe82: d102 bne.n 803fe8a + 803fea4: 6afb ldr r3, [r7, #44] ; 0x2c + 803fea6: 889b ldrh r3, [r3, #4] + 803fea8: b29a uxth r2, r3 + 803feaa: 693b ldr r3, [r7, #16] + 803feac: 889b ldrh r3, [r3, #4] + 803feae: b29b uxth r3, r3 + 803feb0: 429a cmp r2, r3 + 803feb2: d102 bne.n 803feba /* received the same datagram twice: no need to keep the datagram */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fe84: f04f 33ff mov.w r3, #4294967295 - 803fe88: e0b6 b.n 803fff8 + 803feb4: f04f 33ff mov.w r3, #4294967295 + 803feb8: e0b6 b.n 8040028 #if IP_REASS_CHECK_OVERLAP } else if (iprh->start < iprh_tmp->end) { - 803fe8a: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe8c: 889b ldrh r3, [r3, #4] - 803fe8e: b29a uxth r2, r3 - 803fe90: 693b ldr r3, [r7, #16] - 803fe92: 88db ldrh r3, [r3, #6] - 803fe94: b29b uxth r3, r3 - 803fe96: 429a cmp r2, r3 - 803fe98: d202 bcs.n 803fea0 + 803feba: 6afb ldr r3, [r7, #44] ; 0x2c + 803febc: 889b ldrh r3, [r3, #4] + 803febe: b29a uxth r2, r3 + 803fec0: 693b ldr r3, [r7, #16] + 803fec2: 88db ldrh r3, [r3, #6] + 803fec4: b29b uxth r3, r3 + 803fec6: 429a cmp r2, r3 + 803fec8: d202 bcs.n 803fed0 /* overlap: no need to keep the new datagram */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fe9a: f04f 33ff mov.w r3, #4294967295 - 803fe9e: e0ab b.n 803fff8 + 803feca: f04f 33ff mov.w r3, #4294967295 + 803fece: e0ab b.n 8040028 #endif /* IP_REASS_CHECK_OVERLAP */ } else { /* Check if the fragments received so far have no holes. */ if (iprh_prev != NULL) { - 803fea0: 6abb ldr r3, [r7, #40] ; 0x28 - 803fea2: 2b00 cmp r3, #0 - 803fea4: d009 beq.n 803feba + 803fed0: 6abb ldr r3, [r7, #40] ; 0x28 + 803fed2: 2b00 cmp r3, #0 + 803fed4: d009 beq.n 803feea if (iprh_prev->end != iprh_tmp->start) { - 803fea6: 6abb ldr r3, [r7, #40] ; 0x28 - 803fea8: 88db ldrh r3, [r3, #6] - 803feaa: b29a uxth r2, r3 - 803feac: 693b ldr r3, [r7, #16] - 803feae: 889b ldrh r3, [r3, #4] - 803feb0: b29b uxth r3, r3 - 803feb2: 429a cmp r2, r3 - 803feb4: d001 beq.n 803feba + 803fed6: 6abb ldr r3, [r7, #40] ; 0x28 + 803fed8: 88db ldrh r3, [r3, #6] + 803feda: b29a uxth r2, r3 + 803fedc: 693b ldr r3, [r7, #16] + 803fede: 889b ldrh r3, [r3, #4] + 803fee0: b29b uxth r3, r3 + 803fee2: 429a cmp r2, r3 + 803fee4: d001 beq.n 803feea /* There is a fragment missing between the current * and the previous fragment */ valid = 0; - 803feb6: 2300 movs r3, #0 - 803feb8: 623b str r3, [r7, #32] + 803fee6: 2300 movs r3, #0 + 803fee8: 623b str r3, [r7, #32] } } } q = iprh_tmp->next_pbuf; - 803feba: 693b ldr r3, [r7, #16] - 803febc: 681b ldr r3, [r3, #0] - 803febe: 627b str r3, [r7, #36] ; 0x24 + 803feea: 693b ldr r3, [r7, #16] + 803feec: 681b ldr r3, [r3, #0] + 803feee: 627b str r3, [r7, #36] ; 0x24 iprh_prev = iprh_tmp; - 803fec0: 693b ldr r3, [r7, #16] - 803fec2: 62bb str r3, [r7, #40] ; 0x28 + 803fef0: 693b ldr r3, [r7, #16] + 803fef2: 62bb str r3, [r7, #40] ; 0x28 for (q = ipr->p; q != NULL;) { - 803fec4: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fec6: 2b00 cmp r3, #0 - 803fec8: d193 bne.n 803fdf2 - 803feca: e000 b.n 803fece + 803fef4: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fef6: 2b00 cmp r3, #0 + 803fef8: d193 bne.n 803fe22 + 803fefa: e000 b.n 803fefe break; - 803fecc: bf00 nop + 803fefc: bf00 nop } /* If q is NULL, then we made it to the end of the list. Determine what to do now */ if (q == NULL) { - 803fece: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fed0: 2b00 cmp r3, #0 - 803fed2: d12d bne.n 803ff30 + 803fefe: 6a7b ldr r3, [r7, #36] ; 0x24 + 803ff00: 2b00 cmp r3, #0 + 803ff02: d12d bne.n 803ff60 if (iprh_prev != NULL) { - 803fed4: 6abb ldr r3, [r7, #40] ; 0x28 - 803fed6: 2b00 cmp r3, #0 - 803fed8: d01c beq.n 803ff14 + 803ff04: 6abb ldr r3, [r7, #40] ; 0x28 + 803ff06: 2b00 cmp r3, #0 + 803ff08: d01c beq.n 803ff44 /* this is (for now), the fragment with the highest offset: * chain it to the last fragment */ #if IP_REASS_CHECK_OVERLAP LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start); - 803feda: 6abb ldr r3, [r7, #40] ; 0x28 - 803fedc: 88db ldrh r3, [r3, #6] - 803fede: b29a uxth r2, r3 - 803fee0: 6afb ldr r3, [r7, #44] ; 0x2c - 803fee2: 889b ldrh r3, [r3, #4] - 803fee4: b29b uxth r3, r3 - 803fee6: 429a cmp r2, r3 - 803fee8: d906 bls.n 803fef8 - 803feea: 4b45 ldr r3, [pc, #276] ; (8040000 ) - 803feec: f44f 72db mov.w r2, #438 ; 0x1b6 - 803fef0: 4944 ldr r1, [pc, #272] ; (8040004 ) - 803fef2: 4845 ldr r0, [pc, #276] ; (8040008 ) - 803fef4: f000 fdf4 bl 8040ae0 + 803ff0a: 6abb ldr r3, [r7, #40] ; 0x28 + 803ff0c: 88db ldrh r3, [r3, #6] + 803ff0e: b29a uxth r2, r3 + 803ff10: 6afb ldr r3, [r7, #44] ; 0x2c + 803ff12: 889b ldrh r3, [r3, #4] + 803ff14: b29b uxth r3, r3 + 803ff16: 429a cmp r2, r3 + 803ff18: d906 bls.n 803ff28 + 803ff1a: 4b45 ldr r3, [pc, #276] ; (8040030 ) + 803ff1c: f44f 72db mov.w r2, #438 ; 0x1b6 + 803ff20: 4944 ldr r1, [pc, #272] ; (8040034 ) + 803ff22: 4845 ldr r0, [pc, #276] ; (8040038 ) + 803ff24: f000 fdf4 bl 8040b10 #endif /* IP_REASS_CHECK_OVERLAP */ iprh_prev->next_pbuf = new_p; - 803fef8: 6abb ldr r3, [r7, #40] ; 0x28 - 803fefa: 68ba ldr r2, [r7, #8] - 803fefc: 601a str r2, [r3, #0] + 803ff28: 6abb ldr r3, [r7, #40] ; 0x28 + 803ff2a: 68ba ldr r2, [r7, #8] + 803ff2c: 601a str r2, [r3, #0] if (iprh_prev->end != iprh->start) { - 803fefe: 6abb ldr r3, [r7, #40] ; 0x28 - 803ff00: 88db ldrh r3, [r3, #6] - 803ff02: b29a uxth r2, r3 - 803ff04: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff06: 889b ldrh r3, [r3, #4] - 803ff08: b29b uxth r3, r3 - 803ff0a: 429a cmp r2, r3 - 803ff0c: d010 beq.n 803ff30 + 803ff2e: 6abb ldr r3, [r7, #40] ; 0x28 + 803ff30: 88db ldrh r3, [r3, #6] + 803ff32: b29a uxth r2, r3 + 803ff34: 6afb ldr r3, [r7, #44] ; 0x2c + 803ff36: 889b ldrh r3, [r3, #4] + 803ff38: b29b uxth r3, r3 + 803ff3a: 429a cmp r2, r3 + 803ff3c: d010 beq.n 803ff60 valid = 0; - 803ff0e: 2300 movs r3, #0 - 803ff10: 623b str r3, [r7, #32] - 803ff12: e00d b.n 803ff30 + 803ff3e: 2300 movs r3, #0 + 803ff40: 623b str r3, [r7, #32] + 803ff42: e00d b.n 803ff60 } } else { #if IP_REASS_CHECK_OVERLAP LWIP_ASSERT("no previous fragment, this must be the first fragment!", - 803ff14: 68fb ldr r3, [r7, #12] - 803ff16: 685b ldr r3, [r3, #4] - 803ff18: 2b00 cmp r3, #0 - 803ff1a: d006 beq.n 803ff2a - 803ff1c: 4b38 ldr r3, [pc, #224] ; (8040000 ) - 803ff1e: f44f 72df mov.w r2, #446 ; 0x1be - 803ff22: 493a ldr r1, [pc, #232] ; (804000c ) - 803ff24: 4838 ldr r0, [pc, #224] ; (8040008 ) - 803ff26: f000 fddb bl 8040ae0 + 803ff44: 68fb ldr r3, [r7, #12] + 803ff46: 685b ldr r3, [r3, #4] + 803ff48: 2b00 cmp r3, #0 + 803ff4a: d006 beq.n 803ff5a + 803ff4c: 4b38 ldr r3, [pc, #224] ; (8040030 ) + 803ff4e: f44f 72df mov.w r2, #446 ; 0x1be + 803ff52: 493a ldr r1, [pc, #232] ; (804003c ) + 803ff54: 4838 ldr r0, [pc, #224] ; (8040038 ) + 803ff56: f000 fddb bl 8040b10 ipr->p == NULL); #endif /* IP_REASS_CHECK_OVERLAP */ /* this is the first fragment we ever received for this ip datagram */ ipr->p = new_p; - 803ff2a: 68fb ldr r3, [r7, #12] - 803ff2c: 68ba ldr r2, [r7, #8] - 803ff2e: 605a str r2, [r3, #4] + 803ff5a: 68fb ldr r3, [r7, #12] + 803ff5c: 68ba ldr r2, [r7, #8] + 803ff5e: 605a str r2, [r3, #4] } } /* At this point, the validation part begins: */ /* If we already received the last fragment */ if (is_last || ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0)) { - 803ff30: 687b ldr r3, [r7, #4] - 803ff32: 2b00 cmp r3, #0 - 803ff34: d105 bne.n 803ff42 - 803ff36: 68fb ldr r3, [r7, #12] - 803ff38: 7f9b ldrb r3, [r3, #30] - 803ff3a: f003 0301 and.w r3, r3, #1 - 803ff3e: 2b00 cmp r3, #0 - 803ff40: d059 beq.n 803fff6 + 803ff60: 687b ldr r3, [r7, #4] + 803ff62: 2b00 cmp r3, #0 + 803ff64: d105 bne.n 803ff72 + 803ff66: 68fb ldr r3, [r7, #12] + 803ff68: 7f9b ldrb r3, [r3, #30] + 803ff6a: f003 0301 and.w r3, r3, #1 + 803ff6e: 2b00 cmp r3, #0 + 803ff70: d059 beq.n 8040026 /* and had no holes so far */ if (valid) { - 803ff42: 6a3b ldr r3, [r7, #32] - 803ff44: 2b00 cmp r3, #0 - 803ff46: d04f beq.n 803ffe8 + 803ff72: 6a3b ldr r3, [r7, #32] + 803ff74: 2b00 cmp r3, #0 + 803ff76: d04f beq.n 8040018 /* then check if the rest of the fragments is here */ /* Check if the queue starts with the first datagram */ if ((ipr->p == NULL) || (((struct ip_reass_helper *)ipr->p->payload)->start != 0)) { - 803ff48: 68fb ldr r3, [r7, #12] - 803ff4a: 685b ldr r3, [r3, #4] - 803ff4c: 2b00 cmp r3, #0 - 803ff4e: d006 beq.n 803ff5e - 803ff50: 68fb ldr r3, [r7, #12] - 803ff52: 685b ldr r3, [r3, #4] - 803ff54: 685b ldr r3, [r3, #4] - 803ff56: 889b ldrh r3, [r3, #4] - 803ff58: b29b uxth r3, r3 - 803ff5a: 2b00 cmp r3, #0 - 803ff5c: d002 beq.n 803ff64 + 803ff78: 68fb ldr r3, [r7, #12] + 803ff7a: 685b ldr r3, [r3, #4] + 803ff7c: 2b00 cmp r3, #0 + 803ff7e: d006 beq.n 803ff8e + 803ff80: 68fb ldr r3, [r7, #12] + 803ff82: 685b ldr r3, [r3, #4] + 803ff84: 685b ldr r3, [r3, #4] + 803ff86: 889b ldrh r3, [r3, #4] + 803ff88: b29b uxth r3, r3 + 803ff8a: 2b00 cmp r3, #0 + 803ff8c: d002 beq.n 803ff94 valid = 0; - 803ff5e: 2300 movs r3, #0 - 803ff60: 623b str r3, [r7, #32] - 803ff62: e041 b.n 803ffe8 + 803ff8e: 2300 movs r3, #0 + 803ff90: 623b str r3, [r7, #32] + 803ff92: e041 b.n 8040018 } else { /* and check that there are no holes after this datagram */ iprh_prev = iprh; - 803ff64: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff66: 62bb str r3, [r7, #40] ; 0x28 + 803ff94: 6afb ldr r3, [r7, #44] ; 0x2c + 803ff96: 62bb str r3, [r7, #40] ; 0x28 q = iprh->next_pbuf; - 803ff68: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff6a: 681b ldr r3, [r3, #0] - 803ff6c: 627b str r3, [r7, #36] ; 0x24 + 803ff98: 6afb ldr r3, [r7, #44] ; 0x2c + 803ff9a: 681b ldr r3, [r3, #0] + 803ff9c: 627b str r3, [r7, #36] ; 0x24 while (q != NULL) { - 803ff6e: e012 b.n 803ff96 + 803ff9e: e012 b.n 803ffc6 iprh = (struct ip_reass_helper *)q->payload; - 803ff70: 6a7b ldr r3, [r7, #36] ; 0x24 - 803ff72: 685b ldr r3, [r3, #4] - 803ff74: 62fb str r3, [r7, #44] ; 0x2c + 803ffa0: 6a7b ldr r3, [r7, #36] ; 0x24 + 803ffa2: 685b ldr r3, [r3, #4] + 803ffa4: 62fb str r3, [r7, #44] ; 0x2c if (iprh_prev->end != iprh->start) { - 803ff76: 6abb ldr r3, [r7, #40] ; 0x28 - 803ff78: 88db ldrh r3, [r3, #6] - 803ff7a: b29a uxth r2, r3 - 803ff7c: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff7e: 889b ldrh r3, [r3, #4] - 803ff80: b29b uxth r3, r3 - 803ff82: 429a cmp r2, r3 - 803ff84: d002 beq.n 803ff8c + 803ffa6: 6abb ldr r3, [r7, #40] ; 0x28 + 803ffa8: 88db ldrh r3, [r3, #6] + 803ffaa: b29a uxth r2, r3 + 803ffac: 6afb ldr r3, [r7, #44] ; 0x2c + 803ffae: 889b ldrh r3, [r3, #4] + 803ffb0: b29b uxth r3, r3 + 803ffb2: 429a cmp r2, r3 + 803ffb4: d002 beq.n 803ffbc valid = 0; - 803ff86: 2300 movs r3, #0 - 803ff88: 623b str r3, [r7, #32] + 803ffb6: 2300 movs r3, #0 + 803ffb8: 623b str r3, [r7, #32] break; - 803ff8a: e007 b.n 803ff9c + 803ffba: e007 b.n 803ffcc } iprh_prev = iprh; - 803ff8c: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff8e: 62bb str r3, [r7, #40] ; 0x28 + 803ffbc: 6afb ldr r3, [r7, #44] ; 0x2c + 803ffbe: 62bb str r3, [r7, #40] ; 0x28 q = iprh->next_pbuf; - 803ff90: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff92: 681b ldr r3, [r3, #0] - 803ff94: 627b str r3, [r7, #36] ; 0x24 + 803ffc0: 6afb ldr r3, [r7, #44] ; 0x2c + 803ffc2: 681b ldr r3, [r3, #0] + 803ffc4: 627b str r3, [r7, #36] ; 0x24 while (q != NULL) { - 803ff96: 6a7b ldr r3, [r7, #36] ; 0x24 - 803ff98: 2b00 cmp r3, #0 - 803ff9a: d1e9 bne.n 803ff70 + 803ffc6: 6a7b ldr r3, [r7, #36] ; 0x24 + 803ffc8: 2b00 cmp r3, #0 + 803ffca: d1e9 bne.n 803ffa0 } /* if still valid, all fragments are received * (because to the MF==0 already arrived */ if (valid) { - 803ff9c: 6a3b ldr r3, [r7, #32] - 803ff9e: 2b00 cmp r3, #0 - 803ffa0: d022 beq.n 803ffe8 + 803ffcc: 6a3b ldr r3, [r7, #32] + 803ffce: 2b00 cmp r3, #0 + 803ffd0: d022 beq.n 8040018 LWIP_ASSERT("sanity check", ipr->p != NULL); - 803ffa2: 68fb ldr r3, [r7, #12] - 803ffa4: 685b ldr r3, [r3, #4] - 803ffa6: 2b00 cmp r3, #0 - 803ffa8: d106 bne.n 803ffb8 - 803ffaa: 4b15 ldr r3, [pc, #84] ; (8040000 ) - 803ffac: f240 12df movw r2, #479 ; 0x1df - 803ffb0: 4917 ldr r1, [pc, #92] ; (8040010 ) - 803ffb2: 4815 ldr r0, [pc, #84] ; (8040008 ) - 803ffb4: f000 fd94 bl 8040ae0 + 803ffd2: 68fb ldr r3, [r7, #12] + 803ffd4: 685b ldr r3, [r3, #4] + 803ffd6: 2b00 cmp r3, #0 + 803ffd8: d106 bne.n 803ffe8 + 803ffda: 4b15 ldr r3, [pc, #84] ; (8040030 ) + 803ffdc: f240 12df movw r2, #479 ; 0x1df + 803ffe0: 4917 ldr r1, [pc, #92] ; (8040040 ) + 803ffe2: 4815 ldr r0, [pc, #84] ; (8040038 ) + 803ffe4: f000 fd94 bl 8040b10 LWIP_ASSERT("sanity check", - 803ffb8: 68fb ldr r3, [r7, #12] - 803ffba: 685b ldr r3, [r3, #4] - 803ffbc: 685b ldr r3, [r3, #4] - 803ffbe: 6afa ldr r2, [r7, #44] ; 0x2c - 803ffc0: 429a cmp r2, r3 - 803ffc2: d106 bne.n 803ffd2 - 803ffc4: 4b0e ldr r3, [pc, #56] ; (8040000 ) - 803ffc6: f44f 72f0 mov.w r2, #480 ; 0x1e0 - 803ffca: 4911 ldr r1, [pc, #68] ; (8040010 ) - 803ffcc: 480e ldr r0, [pc, #56] ; (8040008 ) - 803ffce: f000 fd87 bl 8040ae0 + 803ffe8: 68fb ldr r3, [r7, #12] + 803ffea: 685b ldr r3, [r3, #4] + 803ffec: 685b ldr r3, [r3, #4] + 803ffee: 6afa ldr r2, [r7, #44] ; 0x2c + 803fff0: 429a cmp r2, r3 + 803fff2: d106 bne.n 8040002 + 803fff4: 4b0e ldr r3, [pc, #56] ; (8040030 ) + 803fff6: f44f 72f0 mov.w r2, #480 ; 0x1e0 + 803fffa: 4911 ldr r1, [pc, #68] ; (8040040 ) + 803fffc: 480e ldr r0, [pc, #56] ; (8040038 ) + 803fffe: f000 fd87 bl 8040b10 ((struct ip_reass_helper *)ipr->p->payload) != iprh); LWIP_ASSERT("validate_datagram:next_pbuf!=NULL", - 803ffd2: 6afb ldr r3, [r7, #44] ; 0x2c - 803ffd4: 681b ldr r3, [r3, #0] - 803ffd6: 2b00 cmp r3, #0 - 803ffd8: d006 beq.n 803ffe8 - 803ffda: 4b09 ldr r3, [pc, #36] ; (8040000 ) - 803ffdc: f44f 72f1 mov.w r2, #482 ; 0x1e2 - 803ffe0: 490c ldr r1, [pc, #48] ; (8040014 ) - 803ffe2: 4809 ldr r0, [pc, #36] ; (8040008 ) - 803ffe4: f000 fd7c bl 8040ae0 + 8040002: 6afb ldr r3, [r7, #44] ; 0x2c + 8040004: 681b ldr r3, [r3, #0] + 8040006: 2b00 cmp r3, #0 + 8040008: d006 beq.n 8040018 + 804000a: 4b09 ldr r3, [pc, #36] ; (8040030 ) + 804000c: f44f 72f1 mov.w r2, #482 ; 0x1e2 + 8040010: 490c ldr r1, [pc, #48] ; (8040044 ) + 8040012: 4809 ldr r0, [pc, #36] ; (8040038 ) + 8040014: f000 fd7c bl 8040b10 } } /* If valid is 0 here, there are some fragments missing in the middle * (since MF == 0 has already arrived). Such datagrams simply time out if * no more fragments are received... */ return valid ? IP_REASS_VALIDATE_TELEGRAM_FINISHED : IP_REASS_VALIDATE_PBUF_QUEUED; - 803ffe8: 6a3b ldr r3, [r7, #32] - 803ffea: 2b00 cmp r3, #0 - 803ffec: bf14 ite ne - 803ffee: 2301 movne r3, #1 - 803fff0: 2300 moveq r3, #0 - 803fff2: b2db uxtb r3, r3 - 803fff4: e000 b.n 803fff8 + 8040018: 6a3b ldr r3, [r7, #32] + 804001a: 2b00 cmp r3, #0 + 804001c: bf14 ite ne + 804001e: 2301 movne r3, #1 + 8040020: 2300 moveq r3, #0 + 8040022: b2db uxtb r3, r3 + 8040024: e000 b.n 8040028 } /* If we come here, not all fragments were received, yet! */ return IP_REASS_VALIDATE_PBUF_QUEUED; /* not yet valid! */ - 803fff6: 2300 movs r3, #0 -} - 803fff8: 4618 mov r0, r3 - 803fffa: 3730 adds r7, #48 ; 0x30 - 803fffc: 46bd mov sp, r7 - 803fffe: bd80 pop {r7, pc} - 8040000: 080449c0 .word 0x080449c0 - 8040004: 08044aa4 .word 0x08044aa4 - 8040008: 08044a08 .word 0x08044a08 - 804000c: 08044ac4 .word 0x08044ac4 - 8040010: 08044afc .word 0x08044afc - 8040014: 08044b0c .word 0x08044b0c - -08040018 : + 8040026: 2300 movs r3, #0 +} + 8040028: 4618 mov r0, r3 + 804002a: 3730 adds r7, #48 ; 0x30 + 804002c: 46bd mov sp, r7 + 804002e: bd80 pop {r7, pc} + 8040030: 080449f0 .word 0x080449f0 + 8040034: 08044ad4 .word 0x08044ad4 + 8040038: 08044a38 .word 0x08044a38 + 804003c: 08044af4 .word 0x08044af4 + 8040040: 08044b2c .word 0x08044b2c + 8040044: 08044b3c .word 0x08044b3c + +08040048 : * @param p points to a pbuf chain of the fragment * @return NULL if reassembly is incomplete, ? otherwise */ struct pbuf * ip4_reass(struct pbuf *p) { - 8040018: b580 push {r7, lr} - 804001a: b08e sub sp, #56 ; 0x38 - 804001c: af00 add r7, sp, #0 - 804001e: 6078 str r0, [r7, #4] + 8040048: b580 push {r7, lr} + 804004a: b08e sub sp, #56 ; 0x38 + 804004c: af00 add r7, sp, #0 + 804004e: 6078 str r0, [r7, #4] int is_last; IPFRAG_STATS_INC(ip_frag.recv); MIB2_STATS_INC(mib2.ipreasmreqds); fraghdr = (struct ip_hdr *)p->payload; - 8040020: 687b ldr r3, [r7, #4] - 8040022: 685b ldr r3, [r3, #4] - 8040024: 62bb str r3, [r7, #40] ; 0x28 + 8040050: 687b ldr r3, [r7, #4] + 8040052: 685b ldr r3, [r3, #4] + 8040054: 62bb str r3, [r7, #40] ; 0x28 if (IPH_HL_BYTES(fraghdr) != IP_HLEN) { - 8040026: 6abb ldr r3, [r7, #40] ; 0x28 - 8040028: 781b ldrb r3, [r3, #0] - 804002a: f003 030f and.w r3, r3, #15 - 804002e: b2db uxtb r3, r3 - 8040030: 009b lsls r3, r3, #2 - 8040032: b2db uxtb r3, r3 - 8040034: 2b14 cmp r3, #20 - 8040036: f040 8171 bne.w 804031c + 8040056: 6abb ldr r3, [r7, #40] ; 0x28 + 8040058: 781b ldrb r3, [r3, #0] + 804005a: f003 030f and.w r3, r3, #15 + 804005e: b2db uxtb r3, r3 + 8040060: 009b lsls r3, r3, #2 + 8040062: b2db uxtb r3, r3 + 8040064: 2b14 cmp r3, #20 + 8040066: f040 8171 bne.w 804034c LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: IP options currently not supported!\n")); IPFRAG_STATS_INC(ip_frag.err); goto nullreturn; } offset = IPH_OFFSET_BYTES(fraghdr); - 804003a: 6abb ldr r3, [r7, #40] ; 0x28 - 804003c: 88db ldrh r3, [r3, #6] - 804003e: b29b uxth r3, r3 - 8040040: 4618 mov r0, r3 - 8040042: f7f5 ff31 bl 8035ea8 - 8040046: 4603 mov r3, r0 - 8040048: f3c3 030c ubfx r3, r3, #0, #13 - 804004c: b29b uxth r3, r3 - 804004e: 00db lsls r3, r3, #3 - 8040050: 84fb strh r3, [r7, #38] ; 0x26 + 804006a: 6abb ldr r3, [r7, #40] ; 0x28 + 804006c: 88db ldrh r3, [r3, #6] + 804006e: b29b uxth r3, r3 + 8040070: 4618 mov r0, r3 + 8040072: f7f5 ff31 bl 8035ed8 + 8040076: 4603 mov r3, r0 + 8040078: f3c3 030c ubfx r3, r3, #0, #13 + 804007c: b29b uxth r3, r3 + 804007e: 00db lsls r3, r3, #3 + 8040080: 84fb strh r3, [r7, #38] ; 0x26 len = lwip_ntohs(IPH_LEN(fraghdr)); - 8040052: 6abb ldr r3, [r7, #40] ; 0x28 - 8040054: 885b ldrh r3, [r3, #2] - 8040056: b29b uxth r3, r3 - 8040058: 4618 mov r0, r3 - 804005a: f7f5 ff25 bl 8035ea8 - 804005e: 4603 mov r3, r0 - 8040060: 84bb strh r3, [r7, #36] ; 0x24 + 8040082: 6abb ldr r3, [r7, #40] ; 0x28 + 8040084: 885b ldrh r3, [r3, #2] + 8040086: b29b uxth r3, r3 + 8040088: 4618 mov r0, r3 + 804008a: f7f5 ff25 bl 8035ed8 + 804008e: 4603 mov r3, r0 + 8040090: 84bb strh r3, [r7, #36] ; 0x24 hlen = IPH_HL_BYTES(fraghdr); - 8040062: 6abb ldr r3, [r7, #40] ; 0x28 - 8040064: 781b ldrb r3, [r3, #0] - 8040066: f003 030f and.w r3, r3, #15 - 804006a: b2db uxtb r3, r3 - 804006c: 009b lsls r3, r3, #2 - 804006e: f887 3023 strb.w r3, [r7, #35] ; 0x23 + 8040092: 6abb ldr r3, [r7, #40] ; 0x28 + 8040094: 781b ldrb r3, [r3, #0] + 8040096: f003 030f and.w r3, r3, #15 + 804009a: b2db uxtb r3, r3 + 804009c: 009b lsls r3, r3, #2 + 804009e: f887 3023 strb.w r3, [r7, #35] ; 0x23 if (hlen > len) { - 8040072: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 - 8040076: b29b uxth r3, r3 - 8040078: 8cba ldrh r2, [r7, #36] ; 0x24 - 804007a: 429a cmp r2, r3 - 804007c: f0c0 8150 bcc.w 8040320 + 80400a2: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 + 80400a6: b29b uxth r3, r3 + 80400a8: 8cba ldrh r2, [r7, #36] ; 0x24 + 80400aa: 429a cmp r2, r3 + 80400ac: f0c0 8150 bcc.w 8040350 /* invalid datagram */ goto nullreturn; } len = (u16_t)(len - hlen); - 8040080: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 - 8040084: b29b uxth r3, r3 - 8040086: 8cba ldrh r2, [r7, #36] ; 0x24 - 8040088: 1ad3 subs r3, r2, r3 - 804008a: 84bb strh r3, [r7, #36] ; 0x24 + 80400b0: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 + 80400b4: b29b uxth r3, r3 + 80400b6: 8cba ldrh r2, [r7, #36] ; 0x24 + 80400b8: 1ad3 subs r3, r2, r3 + 80400ba: 84bb strh r3, [r7, #36] ; 0x24 /* Check if we are allowed to enqueue more datagrams. */ clen = pbuf_clen(p); - 804008c: 6878 ldr r0, [r7, #4] - 804008e: f7f7 fbc5 bl 803781c - 8040092: 4603 mov r3, r0 - 8040094: 843b strh r3, [r7, #32] + 80400bc: 6878 ldr r0, [r7, #4] + 80400be: f7f7 fbc5 bl 803784c + 80400c2: 4603 mov r3, r0 + 80400c4: 843b strh r3, [r7, #32] if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) { - 8040096: 4b8c ldr r3, [pc, #560] ; (80402c8 ) - 8040098: 881b ldrh r3, [r3, #0] - 804009a: 461a mov r2, r3 - 804009c: 8c3b ldrh r3, [r7, #32] - 804009e: 4413 add r3, r2 - 80400a0: 2b0a cmp r3, #10 - 80400a2: dd10 ble.n 80400c6 + 80400c6: 4b8c ldr r3, [pc, #560] ; (80402f8 ) + 80400c8: 881b ldrh r3, [r3, #0] + 80400ca: 461a mov r2, r3 + 80400cc: 8c3b ldrh r3, [r7, #32] + 80400ce: 4413 add r3, r2 + 80400d0: 2b0a cmp r3, #10 + 80400d2: dd10 ble.n 80400f6 #if IP_REASS_FREE_OLDEST if (!ip_reass_remove_oldest_datagram(fraghdr, clen) || - 80400a4: 8c3b ldrh r3, [r7, #32] - 80400a6: 4619 mov r1, r3 - 80400a8: 6ab8 ldr r0, [r7, #40] ; 0x28 - 80400aa: f7ff fd81 bl 803fbb0 - 80400ae: 4603 mov r3, r0 - 80400b0: 2b00 cmp r3, #0 - 80400b2: f000 8137 beq.w 8040324 + 80400d4: 8c3b ldrh r3, [r7, #32] + 80400d6: 4619 mov r1, r3 + 80400d8: 6ab8 ldr r0, [r7, #40] ; 0x28 + 80400da: f7ff fd81 bl 803fbe0 + 80400de: 4603 mov r3, r0 + 80400e0: 2b00 cmp r3, #0 + 80400e2: f000 8137 beq.w 8040354 ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS)) - 80400b6: 4b84 ldr r3, [pc, #528] ; (80402c8 ) - 80400b8: 881b ldrh r3, [r3, #0] - 80400ba: 461a mov r2, r3 - 80400bc: 8c3b ldrh r3, [r7, #32] - 80400be: 4413 add r3, r2 + 80400e6: 4b84 ldr r3, [pc, #528] ; (80402f8 ) + 80400e8: 881b ldrh r3, [r3, #0] + 80400ea: 461a mov r2, r3 + 80400ec: 8c3b ldrh r3, [r7, #32] + 80400ee: 4413 add r3, r2 if (!ip_reass_remove_oldest_datagram(fraghdr, clen) || - 80400c0: 2b0a cmp r3, #10 - 80400c2: f300 812f bgt.w 8040324 + 80400f0: 2b0a cmp r3, #10 + 80400f2: f300 812f bgt.w 8040354 } } /* Look for the datagram the fragment belongs to in the current datagram queue, * remembering the previous in the queue for later dequeueing. */ for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) { - 80400c6: 4b81 ldr r3, [pc, #516] ; (80402cc ) - 80400c8: 681b ldr r3, [r3, #0] - 80400ca: 633b str r3, [r7, #48] ; 0x30 - 80400cc: e015 b.n 80400fa + 80400f6: 4b81 ldr r3, [pc, #516] ; (80402fc ) + 80400f8: 681b ldr r3, [r3, #0] + 80400fa: 633b str r3, [r7, #48] ; 0x30 + 80400fc: e015 b.n 804012a /* Check if the incoming fragment matches the one currently present in the reassembly buffer. If so, we proceed with copying the fragment into the buffer. */ if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) { - 80400ce: 6b3b ldr r3, [r7, #48] ; 0x30 - 80400d0: 695a ldr r2, [r3, #20] - 80400d2: 6abb ldr r3, [r7, #40] ; 0x28 - 80400d4: 68db ldr r3, [r3, #12] - 80400d6: 429a cmp r2, r3 - 80400d8: d10c bne.n 80400f4 - 80400da: 6b3b ldr r3, [r7, #48] ; 0x30 - 80400dc: 699a ldr r2, [r3, #24] - 80400de: 6abb ldr r3, [r7, #40] ; 0x28 - 80400e0: 691b ldr r3, [r3, #16] - 80400e2: 429a cmp r2, r3 - 80400e4: d106 bne.n 80400f4 - 80400e6: 6b3b ldr r3, [r7, #48] ; 0x30 - 80400e8: 899a ldrh r2, [r3, #12] - 80400ea: 6abb ldr r3, [r7, #40] ; 0x28 - 80400ec: 889b ldrh r3, [r3, #4] - 80400ee: b29b uxth r3, r3 - 80400f0: 429a cmp r2, r3 - 80400f2: d006 beq.n 8040102 + 80400fe: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040100: 695a ldr r2, [r3, #20] + 8040102: 6abb ldr r3, [r7, #40] ; 0x28 + 8040104: 68db ldr r3, [r3, #12] + 8040106: 429a cmp r2, r3 + 8040108: d10c bne.n 8040124 + 804010a: 6b3b ldr r3, [r7, #48] ; 0x30 + 804010c: 699a ldr r2, [r3, #24] + 804010e: 6abb ldr r3, [r7, #40] ; 0x28 + 8040110: 691b ldr r3, [r3, #16] + 8040112: 429a cmp r2, r3 + 8040114: d106 bne.n 8040124 + 8040116: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040118: 899a ldrh r2, [r3, #12] + 804011a: 6abb ldr r3, [r7, #40] ; 0x28 + 804011c: 889b ldrh r3, [r3, #4] + 804011e: b29b uxth r3, r3 + 8040120: 429a cmp r2, r3 + 8040122: d006 beq.n 8040132 for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) { - 80400f4: 6b3b ldr r3, [r7, #48] ; 0x30 - 80400f6: 681b ldr r3, [r3, #0] - 80400f8: 633b str r3, [r7, #48] ; 0x30 - 80400fa: 6b3b ldr r3, [r7, #48] ; 0x30 - 80400fc: 2b00 cmp r3, #0 - 80400fe: d1e6 bne.n 80400ce - 8040100: e000 b.n 8040104 + 8040124: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040126: 681b ldr r3, [r3, #0] + 8040128: 633b str r3, [r7, #48] ; 0x30 + 804012a: 6b3b ldr r3, [r7, #48] ; 0x30 + 804012c: 2b00 cmp r3, #0 + 804012e: d1e6 bne.n 80400fe + 8040130: e000 b.n 8040134 LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: matching previous fragment ID=%"X16_F"\n", lwip_ntohs(IPH_ID(fraghdr)))); IPFRAG_STATS_INC(ip_frag.cachehit); break; - 8040102: bf00 nop + 8040132: bf00 nop } } if (ipr == NULL) { - 8040104: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040106: 2b00 cmp r3, #0 - 8040108: d109 bne.n 804011e + 8040134: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040136: 2b00 cmp r3, #0 + 8040138: d109 bne.n 804014e /* Enqueue a new datagram into the datagram queue */ ipr = ip_reass_enqueue_new_datagram(fraghdr, clen); - 804010a: 8c3b ldrh r3, [r7, #32] - 804010c: 4619 mov r1, r3 - 804010e: 6ab8 ldr r0, [r7, #40] ; 0x28 - 8040110: f7ff fdb0 bl 803fc74 - 8040114: 6338 str r0, [r7, #48] ; 0x30 + 804013a: 8c3b ldrh r3, [r7, #32] + 804013c: 4619 mov r1, r3 + 804013e: 6ab8 ldr r0, [r7, #40] ; 0x28 + 8040140: f7ff fdb0 bl 803fca4 + 8040144: 6338 str r0, [r7, #48] ; 0x30 /* Bail if unable to enqueue */ if (ipr == NULL) { - 8040116: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040118: 2b00 cmp r3, #0 - 804011a: d11c bne.n 8040156 + 8040146: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040148: 2b00 cmp r3, #0 + 804014a: d11c bne.n 8040186 goto nullreturn; - 804011c: e105 b.n 804032a + 804014c: e105 b.n 804035a } } else { if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) && - 804011e: 6abb ldr r3, [r7, #40] ; 0x28 - 8040120: 88db ldrh r3, [r3, #6] - 8040122: b29b uxth r3, r3 - 8040124: 4618 mov r0, r3 - 8040126: f7f5 febf bl 8035ea8 - 804012a: 4603 mov r3, r0 - 804012c: f3c3 030c ubfx r3, r3, #0, #13 - 8040130: 2b00 cmp r3, #0 - 8040132: d110 bne.n 8040156 + 804014e: 6abb ldr r3, [r7, #40] ; 0x28 + 8040150: 88db ldrh r3, [r3, #6] + 8040152: b29b uxth r3, r3 + 8040154: 4618 mov r0, r3 + 8040156: f7f5 febf bl 8035ed8 + 804015a: 4603 mov r3, r0 + 804015c: f3c3 030c ubfx r3, r3, #0, #13 + 8040160: 2b00 cmp r3, #0 + 8040162: d110 bne.n 8040186 ((lwip_ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) { - 8040134: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040136: 89db ldrh r3, [r3, #14] - 8040138: 4618 mov r0, r3 - 804013a: f7f5 feb5 bl 8035ea8 - 804013e: 4603 mov r3, r0 - 8040140: f3c3 030c ubfx r3, r3, #0, #13 + 8040164: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040166: 89db ldrh r3, [r3, #14] + 8040168: 4618 mov r0, r3 + 804016a: f7f5 feb5 bl 8035ed8 + 804016e: 4603 mov r3, r0 + 8040170: f3c3 030c ubfx r3, r3, #0, #13 if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) && - 8040144: 2b00 cmp r3, #0 - 8040146: d006 beq.n 8040156 + 8040174: 2b00 cmp r3, #0 + 8040176: d006 beq.n 8040186 /* ipr->iphdr is not the header from the first fragment, but fraghdr is * -> copy fraghdr into ipr->iphdr since we want to have the header * of the first fragment (for ICMP time exceeded and later, for copying * all options, if supported)*/ SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN); - 8040148: 6b3b ldr r3, [r7, #48] ; 0x30 - 804014a: 3308 adds r3, #8 - 804014c: 2214 movs r2, #20 - 804014e: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8040150: 4618 mov r0, r3 - 8040152: f000 fbb5 bl 80408c0 + 8040178: 6b3b ldr r3, [r7, #48] ; 0x30 + 804017a: 3308 adds r3, #8 + 804017c: 2214 movs r2, #20 + 804017e: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8040180: 4618 mov r0, r3 + 8040182: f000 fbb5 bl 80408f0 /* At this point, we have either created a new entry or pointing * to an existing one */ /* check for 'no more fragments', and update queue entry*/ is_last = (IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0; - 8040156: 6abb ldr r3, [r7, #40] ; 0x28 - 8040158: 88db ldrh r3, [r3, #6] - 804015a: b29b uxth r3, r3 - 804015c: f003 0320 and.w r3, r3, #32 - 8040160: 2b00 cmp r3, #0 - 8040162: bf0c ite eq - 8040164: 2301 moveq r3, #1 - 8040166: 2300 movne r3, #0 - 8040168: b2db uxtb r3, r3 - 804016a: 61fb str r3, [r7, #28] + 8040186: 6abb ldr r3, [r7, #40] ; 0x28 + 8040188: 88db ldrh r3, [r3, #6] + 804018a: b29b uxth r3, r3 + 804018c: f003 0320 and.w r3, r3, #32 + 8040190: 2b00 cmp r3, #0 + 8040192: bf0c ite eq + 8040194: 2301 moveq r3, #1 + 8040196: 2300 movne r3, #0 + 8040198: b2db uxtb r3, r3 + 804019a: 61fb str r3, [r7, #28] if (is_last) { - 804016c: 69fb ldr r3, [r7, #28] - 804016e: 2b00 cmp r3, #0 - 8040170: d00e beq.n 8040190 + 804019c: 69fb ldr r3, [r7, #28] + 804019e: 2b00 cmp r3, #0 + 80401a0: d00e beq.n 80401c0 u16_t datagram_len = (u16_t)(offset + len); - 8040172: 8cfa ldrh r2, [r7, #38] ; 0x26 - 8040174: 8cbb ldrh r3, [r7, #36] ; 0x24 - 8040176: 4413 add r3, r2 - 8040178: 837b strh r3, [r7, #26] + 80401a2: 8cfa ldrh r2, [r7, #38] ; 0x26 + 80401a4: 8cbb ldrh r3, [r7, #36] ; 0x24 + 80401a6: 4413 add r3, r2 + 80401a8: 837b strh r3, [r7, #26] if ((datagram_len < offset) || (datagram_len > (0xFFFF - IP_HLEN))) { - 804017a: 8b7a ldrh r2, [r7, #26] - 804017c: 8cfb ldrh r3, [r7, #38] ; 0x26 - 804017e: 429a cmp r2, r3 - 8040180: f0c0 80a0 bcc.w 80402c4 - 8040184: 8b7b ldrh r3, [r7, #26] - 8040186: f64f 72eb movw r2, #65515 ; 0xffeb - 804018a: 4293 cmp r3, r2 - 804018c: f200 809a bhi.w 80402c4 + 80401aa: 8b7a ldrh r2, [r7, #26] + 80401ac: 8cfb ldrh r3, [r7, #38] ; 0x26 + 80401ae: 429a cmp r2, r3 + 80401b0: f0c0 80a0 bcc.w 80402f4 + 80401b4: 8b7b ldrh r3, [r7, #26] + 80401b6: f64f 72eb movw r2, #65515 ; 0xffeb + 80401ba: 4293 cmp r3, r2 + 80401bc: f200 809a bhi.w 80402f4 goto nullreturn_ipr; } } /* find the right place to insert this pbuf */ /* @todo: trim pbufs if fragments are overlapping */ valid = ip_reass_chain_frag_into_datagram_and_validate(ipr, p, is_last); - 8040190: 69fa ldr r2, [r7, #28] - 8040192: 6879 ldr r1, [r7, #4] - 8040194: 6b38 ldr r0, [r7, #48] ; 0x30 - 8040196: f7ff fdd5 bl 803fd44 - 804019a: 6178 str r0, [r7, #20] + 80401c0: 69fa ldr r2, [r7, #28] + 80401c2: 6879 ldr r1, [r7, #4] + 80401c4: 6b38 ldr r0, [r7, #48] ; 0x30 + 80401c6: f7ff fdd5 bl 803fd74 + 80401ca: 6178 str r0, [r7, #20] if (valid == IP_REASS_VALIDATE_PBUF_DROPPED) { - 804019c: 697b ldr r3, [r7, #20] - 804019e: f1b3 3fff cmp.w r3, #4294967295 - 80401a2: f000 809b beq.w 80402dc + 80401cc: 697b ldr r3, [r7, #20] + 80401ce: f1b3 3fff cmp.w r3, #4294967295 + 80401d2: f000 809b beq.w 804030c /* if we come here, the pbuf has been enqueued */ /* Track the current number of pbufs current 'in-flight', in order to limit the number of fragments that may be enqueued at any one time (overflow checked by testing against IP_REASS_MAX_PBUFS) */ ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount + clen); - 80401a6: 4b48 ldr r3, [pc, #288] ; (80402c8 ) - 80401a8: 881a ldrh r2, [r3, #0] - 80401aa: 8c3b ldrh r3, [r7, #32] - 80401ac: 4413 add r3, r2 - 80401ae: b29a uxth r2, r3 - 80401b0: 4b45 ldr r3, [pc, #276] ; (80402c8 ) - 80401b2: 801a strh r2, [r3, #0] + 80401d6: 4b48 ldr r3, [pc, #288] ; (80402f8 ) + 80401d8: 881a ldrh r2, [r3, #0] + 80401da: 8c3b ldrh r3, [r7, #32] + 80401dc: 4413 add r3, r2 + 80401de: b29a uxth r2, r3 + 80401e0: 4b45 ldr r3, [pc, #276] ; (80402f8 ) + 80401e2: 801a strh r2, [r3, #0] if (is_last) { - 80401b4: 69fb ldr r3, [r7, #28] - 80401b6: 2b00 cmp r3, #0 - 80401b8: d00d beq.n 80401d6 + 80401e4: 69fb ldr r3, [r7, #28] + 80401e6: 2b00 cmp r3, #0 + 80401e8: d00d beq.n 8040206 u16_t datagram_len = (u16_t)(offset + len); - 80401ba: 8cfa ldrh r2, [r7, #38] ; 0x26 - 80401bc: 8cbb ldrh r3, [r7, #36] ; 0x24 - 80401be: 4413 add r3, r2 - 80401c0: 827b strh r3, [r7, #18] + 80401ea: 8cfa ldrh r2, [r7, #38] ; 0x26 + 80401ec: 8cbb ldrh r3, [r7, #36] ; 0x24 + 80401ee: 4413 add r3, r2 + 80401f0: 827b strh r3, [r7, #18] ipr->datagram_len = datagram_len; - 80401c2: 6b3b ldr r3, [r7, #48] ; 0x30 - 80401c4: 8a7a ldrh r2, [r7, #18] - 80401c6: 839a strh r2, [r3, #28] + 80401f2: 6b3b ldr r3, [r7, #48] ; 0x30 + 80401f4: 8a7a ldrh r2, [r7, #18] + 80401f6: 839a strh r2, [r3, #28] ipr->flags |= IP_REASS_FLAG_LASTFRAG; - 80401c8: 6b3b ldr r3, [r7, #48] ; 0x30 - 80401ca: 7f9b ldrb r3, [r3, #30] - 80401cc: f043 0301 orr.w r3, r3, #1 - 80401d0: b2da uxtb r2, r3 - 80401d2: 6b3b ldr r3, [r7, #48] ; 0x30 - 80401d4: 779a strb r2, [r3, #30] + 80401f8: 6b3b ldr r3, [r7, #48] ; 0x30 + 80401fa: 7f9b ldrb r3, [r3, #30] + 80401fc: f043 0301 orr.w r3, r3, #1 + 8040200: b2da uxtb r2, r3 + 8040202: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040204: 779a strb r2, [r3, #30] LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: last fragment seen, total len %"S16_F"\n", ipr->datagram_len)); } if (valid == IP_REASS_VALIDATE_TELEGRAM_FINISHED) { - 80401d6: 697b ldr r3, [r7, #20] - 80401d8: 2b01 cmp r3, #1 - 80401da: d171 bne.n 80402c0 + 8040206: 697b ldr r3, [r7, #20] + 8040208: 2b01 cmp r3, #1 + 804020a: d171 bne.n 80402f0 struct ip_reassdata *ipr_prev; /* the totally last fragment (flag more fragments = 0) was received at least * once AND all fragments are received */ u16_t datagram_len = (u16_t)(ipr->datagram_len + IP_HLEN); - 80401dc: 6b3b ldr r3, [r7, #48] ; 0x30 - 80401de: 8b9b ldrh r3, [r3, #28] - 80401e0: 3314 adds r3, #20 - 80401e2: 823b strh r3, [r7, #16] + 804020c: 6b3b ldr r3, [r7, #48] ; 0x30 + 804020e: 8b9b ldrh r3, [r3, #28] + 8040210: 3314 adds r3, #20 + 8040212: 823b strh r3, [r7, #16] /* save the second pbuf before copying the header over the pointer */ r = ((struct ip_reass_helper *)ipr->p->payload)->next_pbuf; - 80401e4: 6b3b ldr r3, [r7, #48] ; 0x30 - 80401e6: 685b ldr r3, [r3, #4] - 80401e8: 685b ldr r3, [r3, #4] - 80401ea: 681b ldr r3, [r3, #0] - 80401ec: 637b str r3, [r7, #52] ; 0x34 + 8040214: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040216: 685b ldr r3, [r3, #4] + 8040218: 685b ldr r3, [r3, #4] + 804021a: 681b ldr r3, [r3, #0] + 804021c: 637b str r3, [r7, #52] ; 0x34 /* copy the original ip header back to the first pbuf */ fraghdr = (struct ip_hdr *)(ipr->p->payload); - 80401ee: 6b3b ldr r3, [r7, #48] ; 0x30 - 80401f0: 685b ldr r3, [r3, #4] - 80401f2: 685b ldr r3, [r3, #4] - 80401f4: 62bb str r3, [r7, #40] ; 0x28 + 804021e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040220: 685b ldr r3, [r3, #4] + 8040222: 685b ldr r3, [r3, #4] + 8040224: 62bb str r3, [r7, #40] ; 0x28 SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN); - 80401f6: 6b3b ldr r3, [r7, #48] ; 0x30 - 80401f8: 3308 adds r3, #8 - 80401fa: 2214 movs r2, #20 - 80401fc: 4619 mov r1, r3 - 80401fe: 6ab8 ldr r0, [r7, #40] ; 0x28 - 8040200: f000 fb5e bl 80408c0 + 8040226: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040228: 3308 adds r3, #8 + 804022a: 2214 movs r2, #20 + 804022c: 4619 mov r1, r3 + 804022e: 6ab8 ldr r0, [r7, #40] ; 0x28 + 8040230: f000 fb5e bl 80408f0 IPH_LEN_SET(fraghdr, lwip_htons(datagram_len)); - 8040204: 8a3b ldrh r3, [r7, #16] - 8040206: 4618 mov r0, r3 - 8040208: f7f5 fe4e bl 8035ea8 - 804020c: 4603 mov r3, r0 - 804020e: 461a mov r2, r3 - 8040210: 6abb ldr r3, [r7, #40] ; 0x28 - 8040212: 805a strh r2, [r3, #2] + 8040234: 8a3b ldrh r3, [r7, #16] + 8040236: 4618 mov r0, r3 + 8040238: f7f5 fe4e bl 8035ed8 + 804023c: 4603 mov r3, r0 + 804023e: 461a mov r2, r3 + 8040240: 6abb ldr r3, [r7, #40] ; 0x28 + 8040242: 805a strh r2, [r3, #2] IPH_OFFSET_SET(fraghdr, 0); - 8040214: 6abb ldr r3, [r7, #40] ; 0x28 - 8040216: 2200 movs r2, #0 - 8040218: 719a strb r2, [r3, #6] - 804021a: 2200 movs r2, #0 - 804021c: 71da strb r2, [r3, #7] + 8040244: 6abb ldr r3, [r7, #40] ; 0x28 + 8040246: 2200 movs r2, #0 + 8040248: 719a strb r2, [r3, #6] + 804024a: 2200 movs r2, #0 + 804024c: 71da strb r2, [r3, #7] IPH_CHKSUM_SET(fraghdr, 0); - 804021e: 6abb ldr r3, [r7, #40] ; 0x28 - 8040220: 2200 movs r2, #0 - 8040222: 729a strb r2, [r3, #10] - 8040224: 2200 movs r2, #0 - 8040226: 72da strb r2, [r3, #11] + 804024e: 6abb ldr r3, [r7, #40] ; 0x28 + 8040250: 2200 movs r2, #0 + 8040252: 729a strb r2, [r3, #10] + 8040254: 2200 movs r2, #0 + 8040256: 72da strb r2, [r3, #11] IF__NETIF_CHECKSUM_ENABLED(ip_current_input_netif(), NETIF_CHECKSUM_GEN_IP) { IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN)); } #endif /* CHECKSUM_GEN_IP */ p = ipr->p; - 8040228: 6b3b ldr r3, [r7, #48] ; 0x30 - 804022a: 685b ldr r3, [r3, #4] - 804022c: 607b str r3, [r7, #4] + 8040258: 6b3b ldr r3, [r7, #48] ; 0x30 + 804025a: 685b ldr r3, [r3, #4] + 804025c: 607b str r3, [r7, #4] /* chain together the pbufs contained within the reass_data list. */ while (r != NULL) { - 804022e: e00d b.n 804024c + 804025e: e00d b.n 804027c iprh = (struct ip_reass_helper *)r->payload; - 8040230: 6b7b ldr r3, [r7, #52] ; 0x34 - 8040232: 685b ldr r3, [r3, #4] - 8040234: 60fb str r3, [r7, #12] + 8040260: 6b7b ldr r3, [r7, #52] ; 0x34 + 8040262: 685b ldr r3, [r3, #4] + 8040264: 60fb str r3, [r7, #12] /* hide the ip header for every succeeding fragment */ pbuf_remove_header(r, IP_HLEN); - 8040236: 2114 movs r1, #20 - 8040238: 6b78 ldr r0, [r7, #52] ; 0x34 - 804023a: f7f7 f9e1 bl 8037600 + 8040266: 2114 movs r1, #20 + 8040268: 6b78 ldr r0, [r7, #52] ; 0x34 + 804026a: f7f7 f9e1 bl 8037630 pbuf_cat(p, r); - 804023e: 6b79 ldr r1, [r7, #52] ; 0x34 - 8040240: 6878 ldr r0, [r7, #4] - 8040242: f7f7 fb25 bl 8037890 + 804026e: 6b79 ldr r1, [r7, #52] ; 0x34 + 8040270: 6878 ldr r0, [r7, #4] + 8040272: f7f7 fb25 bl 80378c0 r = iprh->next_pbuf; - 8040246: 68fb ldr r3, [r7, #12] - 8040248: 681b ldr r3, [r3, #0] - 804024a: 637b str r3, [r7, #52] ; 0x34 + 8040276: 68fb ldr r3, [r7, #12] + 8040278: 681b ldr r3, [r3, #0] + 804027a: 637b str r3, [r7, #52] ; 0x34 while (r != NULL) { - 804024c: 6b7b ldr r3, [r7, #52] ; 0x34 - 804024e: 2b00 cmp r3, #0 - 8040250: d1ee bne.n 8040230 + 804027c: 6b7b ldr r3, [r7, #52] ; 0x34 + 804027e: 2b00 cmp r3, #0 + 8040280: d1ee bne.n 8040260 } /* find the previous entry in the linked list */ if (ipr == reassdatagrams) { - 8040252: 4b1e ldr r3, [pc, #120] ; (80402cc ) - 8040254: 681b ldr r3, [r3, #0] - 8040256: 6b3a ldr r2, [r7, #48] ; 0x30 - 8040258: 429a cmp r2, r3 - 804025a: d102 bne.n 8040262 + 8040282: 4b1e ldr r3, [pc, #120] ; (80402fc ) + 8040284: 681b ldr r3, [r3, #0] + 8040286: 6b3a ldr r2, [r7, #48] ; 0x30 + 8040288: 429a cmp r2, r3 + 804028a: d102 bne.n 8040292 ipr_prev = NULL; - 804025c: 2300 movs r3, #0 - 804025e: 62fb str r3, [r7, #44] ; 0x2c - 8040260: e010 b.n 8040284 + 804028c: 2300 movs r3, #0 + 804028e: 62fb str r3, [r7, #44] ; 0x2c + 8040290: e010 b.n 80402b4 } else { for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) { - 8040262: 4b1a ldr r3, [pc, #104] ; (80402cc ) - 8040264: 681b ldr r3, [r3, #0] - 8040266: 62fb str r3, [r7, #44] ; 0x2c - 8040268: e007 b.n 804027a + 8040292: 4b1a ldr r3, [pc, #104] ; (80402fc ) + 8040294: 681b ldr r3, [r3, #0] + 8040296: 62fb str r3, [r7, #44] ; 0x2c + 8040298: e007 b.n 80402aa if (ipr_prev->next == ipr) { - 804026a: 6afb ldr r3, [r7, #44] ; 0x2c - 804026c: 681b ldr r3, [r3, #0] - 804026e: 6b3a ldr r2, [r7, #48] ; 0x30 - 8040270: 429a cmp r2, r3 - 8040272: d006 beq.n 8040282 + 804029a: 6afb ldr r3, [r7, #44] ; 0x2c + 804029c: 681b ldr r3, [r3, #0] + 804029e: 6b3a ldr r2, [r7, #48] ; 0x30 + 80402a0: 429a cmp r2, r3 + 80402a2: d006 beq.n 80402b2 for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) { - 8040274: 6afb ldr r3, [r7, #44] ; 0x2c - 8040276: 681b ldr r3, [r3, #0] - 8040278: 62fb str r3, [r7, #44] ; 0x2c - 804027a: 6afb ldr r3, [r7, #44] ; 0x2c - 804027c: 2b00 cmp r3, #0 - 804027e: d1f4 bne.n 804026a - 8040280: e000 b.n 8040284 + 80402a4: 6afb ldr r3, [r7, #44] ; 0x2c + 80402a6: 681b ldr r3, [r3, #0] + 80402a8: 62fb str r3, [r7, #44] ; 0x2c + 80402aa: 6afb ldr r3, [r7, #44] ; 0x2c + 80402ac: 2b00 cmp r3, #0 + 80402ae: d1f4 bne.n 804029a + 80402b0: e000 b.n 80402b4 break; - 8040282: bf00 nop + 80402b2: bf00 nop } } } /* release the sources allocate for the fragment queue entry */ ip_reass_dequeue_datagram(ipr, ipr_prev); - 8040284: 6af9 ldr r1, [r7, #44] ; 0x2c - 8040286: 6b38 ldr r0, [r7, #48] ; 0x30 - 8040288: f7ff fd2e bl 803fce8 + 80402b4: 6af9 ldr r1, [r7, #44] ; 0x2c + 80402b6: 6b38 ldr r0, [r7, #48] ; 0x30 + 80402b8: f7ff fd2e bl 803fd18 /* and adjust the number of pbufs currently queued for reassembly. */ clen = pbuf_clen(p); - 804028c: 6878 ldr r0, [r7, #4] - 804028e: f7f7 fac5 bl 803781c - 8040292: 4603 mov r3, r0 - 8040294: 843b strh r3, [r7, #32] + 80402bc: 6878 ldr r0, [r7, #4] + 80402be: f7f7 fac5 bl 803784c + 80402c2: 4603 mov r3, r0 + 80402c4: 843b strh r3, [r7, #32] LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= clen); - 8040296: 4b0c ldr r3, [pc, #48] ; (80402c8 ) - 8040298: 881b ldrh r3, [r3, #0] - 804029a: 8c3a ldrh r2, [r7, #32] - 804029c: 429a cmp r2, r3 - 804029e: d906 bls.n 80402ae - 80402a0: 4b0b ldr r3, [pc, #44] ; (80402d0 ) - 80402a2: f240 229b movw r2, #667 ; 0x29b - 80402a6: 490b ldr r1, [pc, #44] ; (80402d4 ) - 80402a8: 480b ldr r0, [pc, #44] ; (80402d8 ) - 80402aa: f000 fc19 bl 8040ae0 + 80402c6: 4b0c ldr r3, [pc, #48] ; (80402f8 ) + 80402c8: 881b ldrh r3, [r3, #0] + 80402ca: 8c3a ldrh r2, [r7, #32] + 80402cc: 429a cmp r2, r3 + 80402ce: d906 bls.n 80402de + 80402d0: 4b0b ldr r3, [pc, #44] ; (8040300 ) + 80402d2: f240 229b movw r2, #667 ; 0x29b + 80402d6: 490b ldr r1, [pc, #44] ; (8040304 ) + 80402d8: 480b ldr r0, [pc, #44] ; (8040308 ) + 80402da: f000 fc19 bl 8040b10 ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - clen); - 80402ae: 4b06 ldr r3, [pc, #24] ; (80402c8 ) - 80402b0: 881a ldrh r2, [r3, #0] - 80402b2: 8c3b ldrh r3, [r7, #32] - 80402b4: 1ad3 subs r3, r2, r3 - 80402b6: b29a uxth r2, r3 - 80402b8: 4b03 ldr r3, [pc, #12] ; (80402c8 ) - 80402ba: 801a strh r2, [r3, #0] + 80402de: 4b06 ldr r3, [pc, #24] ; (80402f8 ) + 80402e0: 881a ldrh r2, [r3, #0] + 80402e2: 8c3b ldrh r3, [r7, #32] + 80402e4: 1ad3 subs r3, r2, r3 + 80402e6: b29a uxth r2, r3 + 80402e8: 4b03 ldr r3, [pc, #12] ; (80402f8 ) + 80402ea: 801a strh r2, [r3, #0] MIB2_STATS_INC(mib2.ipreasmoks); /* Return the pbuf chain */ return p; - 80402bc: 687b ldr r3, [r7, #4] - 80402be: e038 b.n 8040332 + 80402ec: 687b ldr r3, [r7, #4] + 80402ee: e038 b.n 8040362 } /* the datagram is not (yet?) reassembled completely */ LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount)); return NULL; - 80402c0: 2300 movs r3, #0 - 80402c2: e036 b.n 8040332 + 80402f0: 2300 movs r3, #0 + 80402f2: e036 b.n 8040362 goto nullreturn_ipr; - 80402c4: bf00 nop - 80402c6: e00a b.n 80402de - 80402c8: 2400eab0 .word 0x2400eab0 - 80402cc: 2400eaac .word 0x2400eaac - 80402d0: 080449c0 .word 0x080449c0 - 80402d4: 08044b30 .word 0x08044b30 - 80402d8: 08044a08 .word 0x08044a08 + 80402f4: bf00 nop + 80402f6: e00a b.n 804030e + 80402f8: 2400eab0 .word 0x2400eab0 + 80402fc: 2400eaac .word 0x2400eaac + 8040300: 080449f0 .word 0x080449f0 + 8040304: 08044b60 .word 0x08044b60 + 8040308: 08044a38 .word 0x08044a38 goto nullreturn_ipr; - 80402dc: bf00 nop + 804030c: bf00 nop nullreturn_ipr: LWIP_ASSERT("ipr != NULL", ipr != NULL); - 80402de: 6b3b ldr r3, [r7, #48] ; 0x30 - 80402e0: 2b00 cmp r3, #0 - 80402e2: d106 bne.n 80402f2 - 80402e4: 4b15 ldr r3, [pc, #84] ; (804033c ) - 80402e6: f44f 722a mov.w r2, #680 ; 0x2a8 - 80402ea: 4915 ldr r1, [pc, #84] ; (8040340 ) - 80402ec: 4815 ldr r0, [pc, #84] ; (8040344 ) - 80402ee: f000 fbf7 bl 8040ae0 + 804030e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040310: 2b00 cmp r3, #0 + 8040312: d106 bne.n 8040322 + 8040314: 4b15 ldr r3, [pc, #84] ; (804036c ) + 8040316: f44f 722a mov.w r2, #680 ; 0x2a8 + 804031a: 4915 ldr r1, [pc, #84] ; (8040370 ) + 804031c: 4815 ldr r0, [pc, #84] ; (8040374 ) + 804031e: f000 fbf7 bl 8040b10 if (ipr->p == NULL) { - 80402f2: 6b3b ldr r3, [r7, #48] ; 0x30 - 80402f4: 685b ldr r3, [r3, #4] - 80402f6: 2b00 cmp r3, #0 - 80402f8: d116 bne.n 8040328 + 8040322: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040324: 685b ldr r3, [r3, #4] + 8040326: 2b00 cmp r3, #0 + 8040328: d116 bne.n 8040358 /* dropped pbuf after creating a new datagram entry: remove the entry, too */ LWIP_ASSERT("not firstalthough just enqueued", ipr == reassdatagrams); - 80402fa: 4b13 ldr r3, [pc, #76] ; (8040348 ) - 80402fc: 681b ldr r3, [r3, #0] - 80402fe: 6b3a ldr r2, [r7, #48] ; 0x30 - 8040300: 429a cmp r2, r3 - 8040302: d006 beq.n 8040312 - 8040304: 4b0d ldr r3, [pc, #52] ; (804033c ) - 8040306: f240 22ab movw r2, #683 ; 0x2ab - 804030a: 4910 ldr r1, [pc, #64] ; (804034c ) - 804030c: 480d ldr r0, [pc, #52] ; (8040344 ) - 804030e: f000 fbe7 bl 8040ae0 + 804032a: 4b13 ldr r3, [pc, #76] ; (8040378 ) + 804032c: 681b ldr r3, [r3, #0] + 804032e: 6b3a ldr r2, [r7, #48] ; 0x30 + 8040330: 429a cmp r2, r3 + 8040332: d006 beq.n 8040342 + 8040334: 4b0d ldr r3, [pc, #52] ; (804036c ) + 8040336: f240 22ab movw r2, #683 ; 0x2ab + 804033a: 4910 ldr r1, [pc, #64] ; (804037c ) + 804033c: 480d ldr r0, [pc, #52] ; (8040374 ) + 804033e: f000 fbe7 bl 8040b10 ip_reass_dequeue_datagram(ipr, NULL); - 8040312: 2100 movs r1, #0 - 8040314: 6b38 ldr r0, [r7, #48] ; 0x30 - 8040316: f7ff fce7 bl 803fce8 - 804031a: e006 b.n 804032a + 8040342: 2100 movs r1, #0 + 8040344: 6b38 ldr r0, [r7, #48] ; 0x30 + 8040346: f7ff fce7 bl 803fd18 + 804034a: e006 b.n 804035a goto nullreturn; - 804031c: bf00 nop - 804031e: e004 b.n 804032a + 804034c: bf00 nop + 804034e: e004 b.n 804035a goto nullreturn; - 8040320: bf00 nop - 8040322: e002 b.n 804032a + 8040350: bf00 nop + 8040352: e002 b.n 804035a goto nullreturn; - 8040324: bf00 nop - 8040326: e000 b.n 804032a + 8040354: bf00 nop + 8040356: e000 b.n 804035a } nullreturn: - 8040328: bf00 nop + 8040358: bf00 nop LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: nullreturn\n")); IPFRAG_STATS_INC(ip_frag.drop); pbuf_free(p); - 804032a: 6878 ldr r0, [r7, #4] - 804032c: f7f7 f9ee bl 803770c + 804035a: 6878 ldr r0, [r7, #4] + 804035c: f7f7 f9ee bl 803773c return NULL; - 8040330: 2300 movs r3, #0 -} - 8040332: 4618 mov r0, r3 - 8040334: 3738 adds r7, #56 ; 0x38 - 8040336: 46bd mov sp, r7 - 8040338: bd80 pop {r7, pc} - 804033a: bf00 nop - 804033c: 080449c0 .word 0x080449c0 - 8040340: 08044b4c .word 0x08044b4c - 8040344: 08044a08 .word 0x08044a08 - 8040348: 2400eaac .word 0x2400eaac - 804034c: 08044b58 .word 0x08044b58 - -08040350 : + 8040360: 2300 movs r3, #0 +} + 8040362: 4618 mov r0, r3 + 8040364: 3738 adds r7, #56 ; 0x38 + 8040366: 46bd mov sp, r7 + 8040368: bd80 pop {r7, pc} + 804036a: bf00 nop + 804036c: 080449f0 .word 0x080449f0 + 8040370: 08044b7c .word 0x08044b7c + 8040374: 08044a38 .word 0x08044a38 + 8040378: 2400eaac .word 0x2400eaac + 804037c: 08044b88 .word 0x08044b88 + +08040380 : #if IP_FRAG #if !LWIP_NETIF_TX_SINGLE_PBUF /** Allocate a new struct pbuf_custom_ref */ static struct pbuf_custom_ref * ip_frag_alloc_pbuf_custom_ref(void) { - 8040350: b580 push {r7, lr} - 8040352: af00 add r7, sp, #0 + 8040380: b580 push {r7, lr} + 8040382: af00 add r7, sp, #0 return (struct pbuf_custom_ref *)memp_malloc(MEMP_FRAG_PBUF); - 8040354: 2005 movs r0, #5 - 8040356: f7f6 fad7 bl 8036908 - 804035a: 4603 mov r3, r0 + 8040384: 2005 movs r0, #5 + 8040386: f7f6 fad7 bl 8036938 + 804038a: 4603 mov r3, r0 } - 804035c: 4618 mov r0, r3 - 804035e: bd80 pop {r7, pc} + 804038c: 4618 mov r0, r3 + 804038e: bd80 pop {r7, pc} -08040360 : +08040390 : /** Free a struct pbuf_custom_ref */ static void ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref *p) { - 8040360: b580 push {r7, lr} - 8040362: b082 sub sp, #8 - 8040364: af00 add r7, sp, #0 - 8040366: 6078 str r0, [r7, #4] + 8040390: b580 push {r7, lr} + 8040392: b082 sub sp, #8 + 8040394: af00 add r7, sp, #0 + 8040396: 6078 str r0, [r7, #4] LWIP_ASSERT("p != NULL", p != NULL); - 8040368: 687b ldr r3, [r7, #4] - 804036a: 2b00 cmp r3, #0 - 804036c: d106 bne.n 804037c - 804036e: 4b07 ldr r3, [pc, #28] ; (804038c ) - 8040370: f44f 7231 mov.w r2, #708 ; 0x2c4 - 8040374: 4906 ldr r1, [pc, #24] ; (8040390 ) - 8040376: 4807 ldr r0, [pc, #28] ; (8040394 ) - 8040378: f000 fbb2 bl 8040ae0 + 8040398: 687b ldr r3, [r7, #4] + 804039a: 2b00 cmp r3, #0 + 804039c: d106 bne.n 80403ac + 804039e: 4b07 ldr r3, [pc, #28] ; (80403bc ) + 80403a0: f44f 7231 mov.w r2, #708 ; 0x2c4 + 80403a4: 4906 ldr r1, [pc, #24] ; (80403c0 ) + 80403a6: 4807 ldr r0, [pc, #28] ; (80403c4 ) + 80403a8: f000 fbb2 bl 8040b10 memp_free(MEMP_FRAG_PBUF, p); - 804037c: 6879 ldr r1, [r7, #4] - 804037e: 2005 movs r0, #5 - 8040380: f7f6 fb32 bl 80369e8 + 80403ac: 6879 ldr r1, [r7, #4] + 80403ae: 2005 movs r0, #5 + 80403b0: f7f6 fb32 bl 8036a18 } - 8040384: bf00 nop - 8040386: 3708 adds r7, #8 - 8040388: 46bd mov sp, r7 - 804038a: bd80 pop {r7, pc} - 804038c: 080449c0 .word 0x080449c0 - 8040390: 08044b78 .word 0x08044b78 - 8040394: 08044a08 .word 0x08044a08 + 80403b4: bf00 nop + 80403b6: 3708 adds r7, #8 + 80403b8: 46bd mov sp, r7 + 80403ba: bd80 pop {r7, pc} + 80403bc: 080449f0 .word 0x080449f0 + 80403c0: 08044ba8 .word 0x08044ba8 + 80403c4: 08044a38 .word 0x08044a38 -08040398 : +080403c8 : /** Free-callback function to free a 'struct pbuf_custom_ref', called by * pbuf_free. */ static void ipfrag_free_pbuf_custom(struct pbuf *p) { - 8040398: b580 push {r7, lr} - 804039a: b084 sub sp, #16 - 804039c: af00 add r7, sp, #0 - 804039e: 6078 str r0, [r7, #4] + 80403c8: b580 push {r7, lr} + 80403ca: b084 sub sp, #16 + 80403cc: af00 add r7, sp, #0 + 80403ce: 6078 str r0, [r7, #4] struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref *)p; - 80403a0: 687b ldr r3, [r7, #4] - 80403a2: 60fb str r3, [r7, #12] + 80403d0: 687b ldr r3, [r7, #4] + 80403d2: 60fb str r3, [r7, #12] LWIP_ASSERT("pcr != NULL", pcr != NULL); - 80403a4: 68fb ldr r3, [r7, #12] - 80403a6: 2b00 cmp r3, #0 - 80403a8: d106 bne.n 80403b8 - 80403aa: 4b11 ldr r3, [pc, #68] ; (80403f0 ) - 80403ac: f240 22ce movw r2, #718 ; 0x2ce - 80403b0: 4910 ldr r1, [pc, #64] ; (80403f4 ) - 80403b2: 4811 ldr r0, [pc, #68] ; (80403f8 ) - 80403b4: f000 fb94 bl 8040ae0 + 80403d4: 68fb ldr r3, [r7, #12] + 80403d6: 2b00 cmp r3, #0 + 80403d8: d106 bne.n 80403e8 + 80403da: 4b11 ldr r3, [pc, #68] ; (8040420 ) + 80403dc: f240 22ce movw r2, #718 ; 0x2ce + 80403e0: 4910 ldr r1, [pc, #64] ; (8040424 ) + 80403e2: 4811 ldr r0, [pc, #68] ; (8040428 ) + 80403e4: f000 fb94 bl 8040b10 LWIP_ASSERT("pcr == p", (void *)pcr == (void *)p); - 80403b8: 68fa ldr r2, [r7, #12] - 80403ba: 687b ldr r3, [r7, #4] - 80403bc: 429a cmp r2, r3 - 80403be: d006 beq.n 80403ce - 80403c0: 4b0b ldr r3, [pc, #44] ; (80403f0 ) - 80403c2: f240 22cf movw r2, #719 ; 0x2cf - 80403c6: 490d ldr r1, [pc, #52] ; (80403fc ) - 80403c8: 480b ldr r0, [pc, #44] ; (80403f8 ) - 80403ca: f000 fb89 bl 8040ae0 + 80403e8: 68fa ldr r2, [r7, #12] + 80403ea: 687b ldr r3, [r7, #4] + 80403ec: 429a cmp r2, r3 + 80403ee: d006 beq.n 80403fe + 80403f0: 4b0b ldr r3, [pc, #44] ; (8040420 ) + 80403f2: f240 22cf movw r2, #719 ; 0x2cf + 80403f6: 490d ldr r1, [pc, #52] ; (804042c ) + 80403f8: 480b ldr r0, [pc, #44] ; (8040428 ) + 80403fa: f000 fb89 bl 8040b10 if (pcr->original != NULL) { - 80403ce: 68fb ldr r3, [r7, #12] - 80403d0: 695b ldr r3, [r3, #20] - 80403d2: 2b00 cmp r3, #0 - 80403d4: d004 beq.n 80403e0 + 80403fe: 68fb ldr r3, [r7, #12] + 8040400: 695b ldr r3, [r3, #20] + 8040402: 2b00 cmp r3, #0 + 8040404: d004 beq.n 8040410 pbuf_free(pcr->original); - 80403d6: 68fb ldr r3, [r7, #12] - 80403d8: 695b ldr r3, [r3, #20] - 80403da: 4618 mov r0, r3 - 80403dc: f7f7 f996 bl 803770c + 8040406: 68fb ldr r3, [r7, #12] + 8040408: 695b ldr r3, [r3, #20] + 804040a: 4618 mov r0, r3 + 804040c: f7f7 f996 bl 803773c } ip_frag_free_pbuf_custom_ref(pcr); - 80403e0: 68f8 ldr r0, [r7, #12] - 80403e2: f7ff ffbd bl 8040360 -} - 80403e6: bf00 nop - 80403e8: 3710 adds r7, #16 - 80403ea: 46bd mov sp, r7 - 80403ec: bd80 pop {r7, pc} - 80403ee: bf00 nop - 80403f0: 080449c0 .word 0x080449c0 - 80403f4: 08044b84 .word 0x08044b84 - 80403f8: 08044a08 .word 0x08044a08 - 80403fc: 08044b90 .word 0x08044b90 - -08040400 : + 8040410: 68f8 ldr r0, [r7, #12] + 8040412: f7ff ffbd bl 8040390 +} + 8040416: bf00 nop + 8040418: 3710 adds r7, #16 + 804041a: 46bd mov sp, r7 + 804041c: bd80 pop {r7, pc} + 804041e: bf00 nop + 8040420: 080449f0 .word 0x080449f0 + 8040424: 08044bb4 .word 0x08044bb4 + 8040428: 08044a38 .word 0x08044a38 + 804042c: 08044bc0 .word 0x08044bc0 + +08040430 : * * @return ERR_OK if sent successfully, err_t otherwise */ err_t ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest) { - 8040400: b580 push {r7, lr} - 8040402: b094 sub sp, #80 ; 0x50 - 8040404: af02 add r7, sp, #8 - 8040406: 60f8 str r0, [r7, #12] - 8040408: 60b9 str r1, [r7, #8] - 804040a: 607a str r2, [r7, #4] + 8040430: b580 push {r7, lr} + 8040432: b094 sub sp, #80 ; 0x50 + 8040434: af02 add r7, sp, #8 + 8040436: 60f8 str r0, [r7, #12] + 8040438: 60b9 str r1, [r7, #8] + 804043a: 607a str r2, [r7, #4] struct pbuf *rambuf; #if !LWIP_NETIF_TX_SINGLE_PBUF struct pbuf *newpbuf; u16_t newpbuflen = 0; - 804040c: 2300 movs r3, #0 - 804040e: f8a7 3046 strh.w r3, [r7, #70] ; 0x46 + 804043c: 2300 movs r3, #0 + 804043e: f8a7 3046 strh.w r3, [r7, #70] ; 0x46 u16_t left_to_copy; #endif struct ip_hdr *original_iphdr; struct ip_hdr *iphdr; const u16_t nfb = (u16_t)((netif->mtu - IP_HLEN) / 8); - 8040412: 68bb ldr r3, [r7, #8] - 8040414: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8040416: 3b14 subs r3, #20 - 8040418: 2b00 cmp r3, #0 - 804041a: da00 bge.n 804041e - 804041c: 3307 adds r3, #7 - 804041e: 10db asrs r3, r3, #3 - 8040420: 877b strh r3, [r7, #58] ; 0x3a + 8040442: 68bb ldr r3, [r7, #8] + 8040444: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8040446: 3b14 subs r3, #20 + 8040448: 2b00 cmp r3, #0 + 804044a: da00 bge.n 804044e + 804044c: 3307 adds r3, #7 + 804044e: 10db asrs r3, r3, #3 + 8040450: 877b strh r3, [r7, #58] ; 0x3a u16_t left, fragsize; u16_t ofo; int last; u16_t poff = IP_HLEN; - 8040422: 2314 movs r3, #20 - 8040424: 87fb strh r3, [r7, #62] ; 0x3e + 8040452: 2314 movs r3, #20 + 8040454: 87fb strh r3, [r7, #62] ; 0x3e u16_t tmp; int mf_set; original_iphdr = (struct ip_hdr *)p->payload; - 8040426: 68fb ldr r3, [r7, #12] - 8040428: 685b ldr r3, [r3, #4] - 804042a: 637b str r3, [r7, #52] ; 0x34 + 8040456: 68fb ldr r3, [r7, #12] + 8040458: 685b ldr r3, [r3, #4] + 804045a: 637b str r3, [r7, #52] ; 0x34 iphdr = original_iphdr; - 804042c: 6b7b ldr r3, [r7, #52] ; 0x34 - 804042e: 633b str r3, [r7, #48] ; 0x30 + 804045c: 6b7b ldr r3, [r7, #52] ; 0x34 + 804045e: 633b str r3, [r7, #48] ; 0x30 if (IPH_HL_BYTES(iphdr) != IP_HLEN) { - 8040430: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040432: 781b ldrb r3, [r3, #0] - 8040434: f003 030f and.w r3, r3, #15 - 8040438: b2db uxtb r3, r3 - 804043a: 009b lsls r3, r3, #2 - 804043c: b2db uxtb r3, r3 - 804043e: 2b14 cmp r3, #20 - 8040440: d002 beq.n 8040448 + 8040460: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040462: 781b ldrb r3, [r3, #0] + 8040464: f003 030f and.w r3, r3, #15 + 8040468: b2db uxtb r3, r3 + 804046a: 009b lsls r3, r3, #2 + 804046c: b2db uxtb r3, r3 + 804046e: 2b14 cmp r3, #20 + 8040470: d002 beq.n 8040478 /* ip4_frag() does not support IP options */ return ERR_VAL; - 8040442: f06f 0305 mvn.w r3, #5 - 8040446: e110 b.n 804066a + 8040472: f06f 0305 mvn.w r3, #5 + 8040476: e110 b.n 804069a } LWIP_ERROR("ip4_frag(): pbuf too short", p->len >= IP_HLEN, return ERR_VAL); - 8040448: 68fb ldr r3, [r7, #12] - 804044a: 895b ldrh r3, [r3, #10] - 804044c: 2b13 cmp r3, #19 - 804044e: d809 bhi.n 8040464 - 8040450: 4b88 ldr r3, [pc, #544] ; (8040674 ) - 8040452: f44f 723f mov.w r2, #764 ; 0x2fc - 8040456: 4988 ldr r1, [pc, #544] ; (8040678 ) - 8040458: 4888 ldr r0, [pc, #544] ; (804067c ) - 804045a: f000 fb41 bl 8040ae0 - 804045e: f06f 0305 mvn.w r3, #5 - 8040462: e102 b.n 804066a + 8040478: 68fb ldr r3, [r7, #12] + 804047a: 895b ldrh r3, [r3, #10] + 804047c: 2b13 cmp r3, #19 + 804047e: d809 bhi.n 8040494 + 8040480: 4b88 ldr r3, [pc, #544] ; (80406a4 ) + 8040482: f44f 723f mov.w r2, #764 ; 0x2fc + 8040486: 4988 ldr r1, [pc, #544] ; (80406a8 ) + 8040488: 4888 ldr r0, [pc, #544] ; (80406ac ) + 804048a: f000 fb41 bl 8040b10 + 804048e: f06f 0305 mvn.w r3, #5 + 8040492: e102 b.n 804069a /* Save original offset */ tmp = lwip_ntohs(IPH_OFFSET(iphdr)); - 8040464: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040466: 88db ldrh r3, [r3, #6] - 8040468: b29b uxth r3, r3 - 804046a: 4618 mov r0, r3 - 804046c: f7f5 fd1c bl 8035ea8 - 8040470: 4603 mov r3, r0 - 8040472: 87bb strh r3, [r7, #60] ; 0x3c + 8040494: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040496: 88db ldrh r3, [r3, #6] + 8040498: b29b uxth r3, r3 + 804049a: 4618 mov r0, r3 + 804049c: f7f5 fd1c bl 8035ed8 + 80404a0: 4603 mov r3, r0 + 80404a2: 87bb strh r3, [r7, #60] ; 0x3c ofo = tmp & IP_OFFMASK; - 8040474: 8fbb ldrh r3, [r7, #60] ; 0x3c - 8040476: f3c3 030c ubfx r3, r3, #0, #13 - 804047a: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 80404a4: 8fbb ldrh r3, [r7, #60] ; 0x3c + 80404a6: f3c3 030c ubfx r3, r3, #0, #13 + 80404aa: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 /* already fragmented? if so, the last fragment we create must have MF, too */ mf_set = tmp & IP_MF; - 804047e: 8fbb ldrh r3, [r7, #60] ; 0x3c - 8040480: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 8040484: 62fb str r3, [r7, #44] ; 0x2c + 80404ae: 8fbb ldrh r3, [r7, #60] ; 0x3c + 80404b0: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 80404b4: 62fb str r3, [r7, #44] ; 0x2c left = (u16_t)(p->tot_len - IP_HLEN); - 8040486: 68fb ldr r3, [r7, #12] - 8040488: 891b ldrh r3, [r3, #8] - 804048a: 3b14 subs r3, #20 - 804048c: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 80404b6: 68fb ldr r3, [r7, #12] + 80404b8: 891b ldrh r3, [r3, #8] + 80404ba: 3b14 subs r3, #20 + 80404bc: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 while (left) { - 8040490: e0e1 b.n 8040656 + 80404c0: e0e1 b.n 8040686 /* Fill this fragment */ fragsize = LWIP_MIN(left, (u16_t)(nfb * 8)); - 8040492: 8f7b ldrh r3, [r7, #58] ; 0x3a - 8040494: 00db lsls r3, r3, #3 - 8040496: b29b uxth r3, r3 - 8040498: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 804049c: 4293 cmp r3, r2 - 804049e: bf28 it cs - 80404a0: 4613 movcs r3, r2 - 80404a2: 857b strh r3, [r7, #42] ; 0x2a + 80404c2: 8f7b ldrh r3, [r7, #58] ; 0x3a + 80404c4: 00db lsls r3, r3, #3 + 80404c6: b29b uxth r3, r3 + 80404c8: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 80404cc: 4293 cmp r3, r2 + 80404ce: bf28 it cs + 80404d0: 4613 movcs r3, r2 + 80404d2: 857b strh r3, [r7, #42] ; 0x2a /* When not using a static buffer, create a chain of pbufs. * The first will be a PBUF_RAM holding the link and IP header. * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged, * but limited to the size of an mtu. */ rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM); - 80404a4: f44f 7220 mov.w r2, #640 ; 0x280 - 80404a8: 2114 movs r1, #20 - 80404aa: 200e movs r0, #14 - 80404ac: f7f6 fe4a bl 8037144 - 80404b0: 6278 str r0, [r7, #36] ; 0x24 + 80404d4: f44f 7220 mov.w r2, #640 ; 0x280 + 80404d8: 2114 movs r1, #20 + 80404da: 200e movs r0, #14 + 80404dc: f7f6 fe4a bl 8037174 + 80404e0: 6278 str r0, [r7, #36] ; 0x24 if (rambuf == NULL) { - 80404b2: 6a7b ldr r3, [r7, #36] ; 0x24 - 80404b4: 2b00 cmp r3, #0 - 80404b6: f000 80d5 beq.w 8040664 + 80404e2: 6a7b ldr r3, [r7, #36] ; 0x24 + 80404e4: 2b00 cmp r3, #0 + 80404e6: f000 80d5 beq.w 8040694 goto memerr; } LWIP_ASSERT("this needs a pbuf in one piece!", - 80404ba: 6a7b ldr r3, [r7, #36] ; 0x24 - 80404bc: 895b ldrh r3, [r3, #10] - 80404be: 2b13 cmp r3, #19 - 80404c0: d806 bhi.n 80404d0 - 80404c2: 4b6c ldr r3, [pc, #432] ; (8040674 ) - 80404c4: f44f 7249 mov.w r2, #804 ; 0x324 - 80404c8: 496d ldr r1, [pc, #436] ; (8040680 ) - 80404ca: 486c ldr r0, [pc, #432] ; (804067c ) - 80404cc: f000 fb08 bl 8040ae0 + 80404ea: 6a7b ldr r3, [r7, #36] ; 0x24 + 80404ec: 895b ldrh r3, [r3, #10] + 80404ee: 2b13 cmp r3, #19 + 80404f0: d806 bhi.n 8040500 + 80404f2: 4b6c ldr r3, [pc, #432] ; (80406a4 ) + 80404f4: f44f 7249 mov.w r2, #804 ; 0x324 + 80404f8: 496d ldr r1, [pc, #436] ; (80406b0 ) + 80404fa: 486c ldr r0, [pc, #432] ; (80406ac ) + 80404fc: f000 fb08 bl 8040b10 (rambuf->len >= (IP_HLEN))); SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN); - 80404d0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80404d2: 685b ldr r3, [r3, #4] - 80404d4: 2214 movs r2, #20 - 80404d6: 6b79 ldr r1, [r7, #52] ; 0x34 - 80404d8: 4618 mov r0, r3 - 80404da: f000 f9f1 bl 80408c0 + 8040500: 6a7b ldr r3, [r7, #36] ; 0x24 + 8040502: 685b ldr r3, [r3, #4] + 8040504: 2214 movs r2, #20 + 8040506: 6b79 ldr r1, [r7, #52] ; 0x34 + 8040508: 4618 mov r0, r3 + 804050a: f000 f9f1 bl 80408f0 iphdr = (struct ip_hdr *)rambuf->payload; - 80404de: 6a7b ldr r3, [r7, #36] ; 0x24 - 80404e0: 685b ldr r3, [r3, #4] - 80404e2: 633b str r3, [r7, #48] ; 0x30 + 804050e: 6a7b ldr r3, [r7, #36] ; 0x24 + 8040510: 685b ldr r3, [r3, #4] + 8040512: 633b str r3, [r7, #48] ; 0x30 left_to_copy = fragsize; - 80404e4: 8d7b ldrh r3, [r7, #42] ; 0x2a - 80404e6: f8a7 3044 strh.w r3, [r7, #68] ; 0x44 + 8040514: 8d7b ldrh r3, [r7, #42] ; 0x2a + 8040516: f8a7 3044 strh.w r3, [r7, #68] ; 0x44 while (left_to_copy) { - 80404ea: e064 b.n 80405b6 + 804051a: e064 b.n 80405e6 struct pbuf_custom_ref *pcr; u16_t plen = (u16_t)(p->len - poff); - 80404ec: 68fb ldr r3, [r7, #12] - 80404ee: 895a ldrh r2, [r3, #10] - 80404f0: 8ffb ldrh r3, [r7, #62] ; 0x3e - 80404f2: 1ad3 subs r3, r2, r3 - 80404f4: 83fb strh r3, [r7, #30] + 804051c: 68fb ldr r3, [r7, #12] + 804051e: 895a ldrh r2, [r3, #10] + 8040520: 8ffb ldrh r3, [r7, #62] ; 0x3e + 8040522: 1ad3 subs r3, r2, r3 + 8040524: 83fb strh r3, [r7, #30] LWIP_ASSERT("p->len >= poff", p->len >= poff); - 80404f6: 68fb ldr r3, [r7, #12] - 80404f8: 895b ldrh r3, [r3, #10] - 80404fa: 8ffa ldrh r2, [r7, #62] ; 0x3e - 80404fc: 429a cmp r2, r3 - 80404fe: d906 bls.n 804050e - 8040500: 4b5c ldr r3, [pc, #368] ; (8040674 ) - 8040502: f240 322d movw r2, #813 ; 0x32d - 8040506: 495f ldr r1, [pc, #380] ; (8040684 ) - 8040508: 485c ldr r0, [pc, #368] ; (804067c ) - 804050a: f000 fae9 bl 8040ae0 + 8040526: 68fb ldr r3, [r7, #12] + 8040528: 895b ldrh r3, [r3, #10] + 804052a: 8ffa ldrh r2, [r7, #62] ; 0x3e + 804052c: 429a cmp r2, r3 + 804052e: d906 bls.n 804053e + 8040530: 4b5c ldr r3, [pc, #368] ; (80406a4 ) + 8040532: f240 322d movw r2, #813 ; 0x32d + 8040536: 495f ldr r1, [pc, #380] ; (80406b4 ) + 8040538: 485c ldr r0, [pc, #368] ; (80406ac ) + 804053a: f000 fae9 bl 8040b10 newpbuflen = LWIP_MIN(left_to_copy, plen); - 804050e: 8bfa ldrh r2, [r7, #30] - 8040510: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 - 8040514: 4293 cmp r3, r2 - 8040516: bf28 it cs - 8040518: 4613 movcs r3, r2 - 804051a: f8a7 3046 strh.w r3, [r7, #70] ; 0x46 + 804053e: 8bfa ldrh r2, [r7, #30] + 8040540: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 + 8040544: 4293 cmp r3, r2 + 8040546: bf28 it cs + 8040548: 4613 movcs r3, r2 + 804054a: f8a7 3046 strh.w r3, [r7, #70] ; 0x46 /* Is this pbuf already empty? */ if (!newpbuflen) { - 804051e: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 - 8040522: 2b00 cmp r3, #0 - 8040524: d105 bne.n 8040532 + 804054e: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 + 8040552: 2b00 cmp r3, #0 + 8040554: d105 bne.n 8040562 poff = 0; - 8040526: 2300 movs r3, #0 - 8040528: 87fb strh r3, [r7, #62] ; 0x3e + 8040556: 2300 movs r3, #0 + 8040558: 87fb strh r3, [r7, #62] ; 0x3e p = p->next; - 804052a: 68fb ldr r3, [r7, #12] - 804052c: 681b ldr r3, [r3, #0] - 804052e: 60fb str r3, [r7, #12] + 804055a: 68fb ldr r3, [r7, #12] + 804055c: 681b ldr r3, [r3, #0] + 804055e: 60fb str r3, [r7, #12] continue; - 8040530: e041 b.n 80405b6 + 8040560: e041 b.n 80405e6 } pcr = ip_frag_alloc_pbuf_custom_ref(); - 8040532: f7ff ff0d bl 8040350 - 8040536: 61b8 str r0, [r7, #24] + 8040562: f7ff ff0d bl 8040380 + 8040566: 61b8 str r0, [r7, #24] if (pcr == NULL) { - 8040538: 69bb ldr r3, [r7, #24] - 804053a: 2b00 cmp r3, #0 - 804053c: d103 bne.n 8040546 + 8040568: 69bb ldr r3, [r7, #24] + 804056a: 2b00 cmp r3, #0 + 804056c: d103 bne.n 8040576 pbuf_free(rambuf); - 804053e: 6a78 ldr r0, [r7, #36] ; 0x24 - 8040540: f7f7 f8e4 bl 803770c + 804056e: 6a78 ldr r0, [r7, #36] ; 0x24 + 8040570: f7f7 f8e4 bl 803773c goto memerr; - 8040544: e08f b.n 8040666 + 8040574: e08f b.n 8040696 } /* Mirror this pbuf, although we might not need all of it. */ newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc, - 8040546: 69b8 ldr r0, [r7, #24] + 8040576: 69b8 ldr r0, [r7, #24] (u8_t *)p->payload + poff, newpbuflen); - 8040548: 68fb ldr r3, [r7, #12] - 804054a: 685a ldr r2, [r3, #4] + 8040578: 68fb ldr r3, [r7, #12] + 804057a: 685a ldr r2, [r3, #4] newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc, - 804054c: 8ffb ldrh r3, [r7, #62] ; 0x3e - 804054e: 4413 add r3, r2 - 8040550: f8b7 1046 ldrh.w r1, [r7, #70] ; 0x46 - 8040554: f8b7 2046 ldrh.w r2, [r7, #70] ; 0x46 - 8040558: 9201 str r2, [sp, #4] - 804055a: 9300 str r3, [sp, #0] - 804055c: 4603 mov r3, r0 - 804055e: 2241 movs r2, #65 ; 0x41 - 8040560: 2000 movs r0, #0 - 8040562: f7f6 ff19 bl 8037398 - 8040566: 6178 str r0, [r7, #20] + 804057c: 8ffb ldrh r3, [r7, #62] ; 0x3e + 804057e: 4413 add r3, r2 + 8040580: f8b7 1046 ldrh.w r1, [r7, #70] ; 0x46 + 8040584: f8b7 2046 ldrh.w r2, [r7, #70] ; 0x46 + 8040588: 9201 str r2, [sp, #4] + 804058a: 9300 str r3, [sp, #0] + 804058c: 4603 mov r3, r0 + 804058e: 2241 movs r2, #65 ; 0x41 + 8040590: 2000 movs r0, #0 + 8040592: f7f6 ff19 bl 80373c8 + 8040596: 6178 str r0, [r7, #20] if (newpbuf == NULL) { - 8040568: 697b ldr r3, [r7, #20] - 804056a: 2b00 cmp r3, #0 - 804056c: d106 bne.n 804057c + 8040598: 697b ldr r3, [r7, #20] + 804059a: 2b00 cmp r3, #0 + 804059c: d106 bne.n 80405ac ip_frag_free_pbuf_custom_ref(pcr); - 804056e: 69b8 ldr r0, [r7, #24] - 8040570: f7ff fef6 bl 8040360 + 804059e: 69b8 ldr r0, [r7, #24] + 80405a0: f7ff fef6 bl 8040390 pbuf_free(rambuf); - 8040574: 6a78 ldr r0, [r7, #36] ; 0x24 - 8040576: f7f7 f8c9 bl 803770c + 80405a4: 6a78 ldr r0, [r7, #36] ; 0x24 + 80405a6: f7f7 f8c9 bl 803773c goto memerr; - 804057a: e074 b.n 8040666 + 80405aa: e074 b.n 8040696 } pbuf_ref(p); - 804057c: 68f8 ldr r0, [r7, #12] - 804057e: f7f7 f965 bl 803784c + 80405ac: 68f8 ldr r0, [r7, #12] + 80405ae: f7f7 f965 bl 803787c pcr->original = p; - 8040582: 69bb ldr r3, [r7, #24] - 8040584: 68fa ldr r2, [r7, #12] - 8040586: 615a str r2, [r3, #20] + 80405b2: 69bb ldr r3, [r7, #24] + 80405b4: 68fa ldr r2, [r7, #12] + 80405b6: 615a str r2, [r3, #20] pcr->pc.custom_free_function = ipfrag_free_pbuf_custom; - 8040588: 69bb ldr r3, [r7, #24] - 804058a: 4a3f ldr r2, [pc, #252] ; (8040688 ) - 804058c: 611a str r2, [r3, #16] + 80405b8: 69bb ldr r3, [r7, #24] + 80405ba: 4a3f ldr r2, [pc, #252] ; (80406b8 ) + 80405bc: 611a str r2, [r3, #16] /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain * so that it is removed when pbuf_dechain is later called on rambuf. */ pbuf_cat(rambuf, newpbuf); - 804058e: 6979 ldr r1, [r7, #20] - 8040590: 6a78 ldr r0, [r7, #36] ; 0x24 - 8040592: f7f7 f97d bl 8037890 + 80405be: 6979 ldr r1, [r7, #20] + 80405c0: 6a78 ldr r0, [r7, #36] ; 0x24 + 80405c2: f7f7 f97d bl 80378c0 left_to_copy = (u16_t)(left_to_copy - newpbuflen); - 8040596: f8b7 2044 ldrh.w r2, [r7, #68] ; 0x44 - 804059a: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 - 804059e: 1ad3 subs r3, r2, r3 - 80405a0: f8a7 3044 strh.w r3, [r7, #68] ; 0x44 + 80405c6: f8b7 2044 ldrh.w r2, [r7, #68] ; 0x44 + 80405ca: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 + 80405ce: 1ad3 subs r3, r2, r3 + 80405d0: f8a7 3044 strh.w r3, [r7, #68] ; 0x44 if (left_to_copy) { - 80405a4: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 - 80405a8: 2b00 cmp r3, #0 - 80405aa: d004 beq.n 80405b6 + 80405d4: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 + 80405d8: 2b00 cmp r3, #0 + 80405da: d004 beq.n 80405e6 poff = 0; - 80405ac: 2300 movs r3, #0 - 80405ae: 87fb strh r3, [r7, #62] ; 0x3e + 80405dc: 2300 movs r3, #0 + 80405de: 87fb strh r3, [r7, #62] ; 0x3e p = p->next; - 80405b0: 68fb ldr r3, [r7, #12] - 80405b2: 681b ldr r3, [r3, #0] - 80405b4: 60fb str r3, [r7, #12] + 80405e0: 68fb ldr r3, [r7, #12] + 80405e2: 681b ldr r3, [r3, #0] + 80405e4: 60fb str r3, [r7, #12] while (left_to_copy) { - 80405b6: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 - 80405ba: 2b00 cmp r3, #0 - 80405bc: d196 bne.n 80404ec + 80405e6: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 + 80405ea: 2b00 cmp r3, #0 + 80405ec: d196 bne.n 804051c } } poff = (u16_t)(poff + newpbuflen); - 80405be: 8ffa ldrh r2, [r7, #62] ; 0x3e - 80405c0: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 - 80405c4: 4413 add r3, r2 - 80405c6: 87fb strh r3, [r7, #62] ; 0x3e + 80405ee: 8ffa ldrh r2, [r7, #62] ; 0x3e + 80405f0: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 + 80405f4: 4413 add r3, r2 + 80405f6: 87fb strh r3, [r7, #62] ; 0x3e #endif /* LWIP_NETIF_TX_SINGLE_PBUF */ /* Correct header */ last = (left <= netif->mtu - IP_HLEN); - 80405c8: 68bb ldr r3, [r7, #8] - 80405ca: 8d1b ldrh r3, [r3, #40] ; 0x28 - 80405cc: f1a3 0213 sub.w r2, r3, #19 - 80405d0: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 80405d4: 429a cmp r2, r3 - 80405d6: bfcc ite gt - 80405d8: 2301 movgt r3, #1 - 80405da: 2300 movle r3, #0 - 80405dc: b2db uxtb r3, r3 - 80405de: 623b str r3, [r7, #32] + 80405f8: 68bb ldr r3, [r7, #8] + 80405fa: 8d1b ldrh r3, [r3, #40] ; 0x28 + 80405fc: f1a3 0213 sub.w r2, r3, #19 + 8040600: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 8040604: 429a cmp r2, r3 + 8040606: bfcc ite gt + 8040608: 2301 movgt r3, #1 + 804060a: 2300 movle r3, #0 + 804060c: b2db uxtb r3, r3 + 804060e: 623b str r3, [r7, #32] /* Set new offset and MF flag */ tmp = (IP_OFFMASK & (ofo)); - 80405e0: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 80405e4: f3c3 030c ubfx r3, r3, #0, #13 - 80405e8: 87bb strh r3, [r7, #60] ; 0x3c + 8040610: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 8040614: f3c3 030c ubfx r3, r3, #0, #13 + 8040618: 87bb strh r3, [r7, #60] ; 0x3c if (!last || mf_set) { - 80405ea: 6a3b ldr r3, [r7, #32] - 80405ec: 2b00 cmp r3, #0 - 80405ee: d002 beq.n 80405f6 - 80405f0: 6afb ldr r3, [r7, #44] ; 0x2c - 80405f2: 2b00 cmp r3, #0 - 80405f4: d003 beq.n 80405fe + 804061a: 6a3b ldr r3, [r7, #32] + 804061c: 2b00 cmp r3, #0 + 804061e: d002 beq.n 8040626 + 8040620: 6afb ldr r3, [r7, #44] ; 0x2c + 8040622: 2b00 cmp r3, #0 + 8040624: d003 beq.n 804062e /* the last fragment has MF set if the input frame had it */ tmp = tmp | IP_MF; - 80405f6: 8fbb ldrh r3, [r7, #60] ; 0x3c - 80405f8: f443 5300 orr.w r3, r3, #8192 ; 0x2000 - 80405fc: 87bb strh r3, [r7, #60] ; 0x3c + 8040626: 8fbb ldrh r3, [r7, #60] ; 0x3c + 8040628: f443 5300 orr.w r3, r3, #8192 ; 0x2000 + 804062c: 87bb strh r3, [r7, #60] ; 0x3c } IPH_OFFSET_SET(iphdr, lwip_htons(tmp)); - 80405fe: 8fbb ldrh r3, [r7, #60] ; 0x3c - 8040600: 4618 mov r0, r3 - 8040602: f7f5 fc51 bl 8035ea8 - 8040606: 4603 mov r3, r0 - 8040608: 461a mov r2, r3 - 804060a: 6b3b ldr r3, [r7, #48] ; 0x30 - 804060c: 80da strh r2, [r3, #6] + 804062e: 8fbb ldrh r3, [r7, #60] ; 0x3c + 8040630: 4618 mov r0, r3 + 8040632: f7f5 fc51 bl 8035ed8 + 8040636: 4603 mov r3, r0 + 8040638: 461a mov r2, r3 + 804063a: 6b3b ldr r3, [r7, #48] ; 0x30 + 804063c: 80da strh r2, [r3, #6] IPH_LEN_SET(iphdr, lwip_htons((u16_t)(fragsize + IP_HLEN))); - 804060e: 8d7b ldrh r3, [r7, #42] ; 0x2a - 8040610: 3314 adds r3, #20 - 8040612: b29b uxth r3, r3 - 8040614: 4618 mov r0, r3 - 8040616: f7f5 fc47 bl 8035ea8 - 804061a: 4603 mov r3, r0 - 804061c: 461a mov r2, r3 - 804061e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040620: 805a strh r2, [r3, #2] + 804063e: 8d7b ldrh r3, [r7, #42] ; 0x2a + 8040640: 3314 adds r3, #20 + 8040642: b29b uxth r3, r3 + 8040644: 4618 mov r0, r3 + 8040646: f7f5 fc47 bl 8035ed8 + 804064a: 4603 mov r3, r0 + 804064c: 461a mov r2, r3 + 804064e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040650: 805a strh r2, [r3, #2] IPH_CHKSUM_SET(iphdr, 0); - 8040622: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040624: 2200 movs r2, #0 - 8040626: 729a strb r2, [r3, #10] - 8040628: 2200 movs r2, #0 - 804062a: 72da strb r2, [r3, #11] + 8040652: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040654: 2200 movs r2, #0 + 8040656: 729a strb r2, [r3, #10] + 8040658: 2200 movs r2, #0 + 804065a: 72da strb r2, [r3, #11] #endif /* CHECKSUM_GEN_IP */ /* No need for separate header pbuf - we allowed room for it in rambuf * when allocated. */ netif->output(netif, rambuf, dest); - 804062c: 68bb ldr r3, [r7, #8] - 804062e: 695b ldr r3, [r3, #20] - 8040630: 687a ldr r2, [r7, #4] - 8040632: 6a79 ldr r1, [r7, #36] ; 0x24 - 8040634: 68b8 ldr r0, [r7, #8] - 8040636: 4798 blx r3 + 804065c: 68bb ldr r3, [r7, #8] + 804065e: 695b ldr r3, [r3, #20] + 8040660: 687a ldr r2, [r7, #4] + 8040662: 6a79 ldr r1, [r7, #36] ; 0x24 + 8040664: 68b8 ldr r0, [r7, #8] + 8040666: 4798 blx r3 * recreate it next time round the loop. If we're lucky the hardware * will have already sent the packet, the free will really free, and * there will be zero memory penalty. */ pbuf_free(rambuf); - 8040638: 6a78 ldr r0, [r7, #36] ; 0x24 - 804063a: f7f7 f867 bl 803770c + 8040668: 6a78 ldr r0, [r7, #36] ; 0x24 + 804066a: f7f7 f867 bl 803773c left = (u16_t)(left - fragsize); - 804063e: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 8040642: 8d7b ldrh r3, [r7, #42] ; 0x2a - 8040644: 1ad3 subs r3, r2, r3 - 8040646: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 804066e: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 8040672: 8d7b ldrh r3, [r7, #42] ; 0x2a + 8040674: 1ad3 subs r3, r2, r3 + 8040676: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 ofo = (u16_t)(ofo + nfb); - 804064a: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 - 804064e: 8f7b ldrh r3, [r7, #58] ; 0x3a - 8040650: 4413 add r3, r2 - 8040652: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 804067a: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 + 804067e: 8f7b ldrh r3, [r7, #58] ; 0x3a + 8040680: 4413 add r3, r2 + 8040682: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 while (left) { - 8040656: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 804065a: 2b00 cmp r3, #0 - 804065c: f47f af19 bne.w 8040492 + 8040686: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 804068a: 2b00 cmp r3, #0 + 804068c: f47f af19 bne.w 80404c2 } MIB2_STATS_INC(mib2.ipfragoks); return ERR_OK; - 8040660: 2300 movs r3, #0 - 8040662: e002 b.n 804066a + 8040690: 2300 movs r3, #0 + 8040692: e002 b.n 804069a goto memerr; - 8040664: bf00 nop + 8040694: bf00 nop memerr: MIB2_STATS_INC(mib2.ipfragfails); return ERR_MEM; - 8040666: f04f 33ff mov.w r3, #4294967295 -} - 804066a: 4618 mov r0, r3 - 804066c: 3748 adds r7, #72 ; 0x48 - 804066e: 46bd mov sp, r7 - 8040670: bd80 pop {r7, pc} - 8040672: bf00 nop - 8040674: 080449c0 .word 0x080449c0 - 8040678: 08044b9c .word 0x08044b9c - 804067c: 08044a08 .word 0x08044a08 - 8040680: 08044bb8 .word 0x08044bb8 - 8040684: 08044bd8 .word 0x08044bd8 - 8040688: 08040399 .word 0x08040399 - -0804068c : + 8040696: f04f 33ff mov.w r3, #4294967295 +} + 804069a: 4618 mov r0, r3 + 804069c: 3748 adds r7, #72 ; 0x48 + 804069e: 46bd mov sp, r7 + 80406a0: bd80 pop {r7, pc} + 80406a2: bf00 nop + 80406a4: 080449f0 .word 0x080449f0 + 80406a8: 08044bcc .word 0x08044bcc + 80406ac: 08044a38 .word 0x08044a38 + 80406b0: 08044be8 .word 0x08044be8 + 80406b4: 08044c08 .word 0x08044c08 + 80406b8: 080403c9 .word 0x080403c9 + +080406bc : * @see ETHARP_SUPPORT_VLAN * @see LWIP_HOOK_VLAN_CHECK */ err_t ethernet_input(struct pbuf *p, struct netif *netif) { - 804068c: b580 push {r7, lr} - 804068e: b086 sub sp, #24 - 8040690: af00 add r7, sp, #0 - 8040692: 6078 str r0, [r7, #4] - 8040694: 6039 str r1, [r7, #0] + 80406bc: b580 push {r7, lr} + 80406be: b086 sub sp, #24 + 80406c0: af00 add r7, sp, #0 + 80406c2: 6078 str r0, [r7, #4] + 80406c4: 6039 str r1, [r7, #0] struct eth_hdr *ethhdr; u16_t type; #if LWIP_ARP || ETHARP_SUPPORT_VLAN || LWIP_IPV6 u16_t next_hdr_offset = SIZEOF_ETH_HDR; - 8040696: 230e movs r3, #14 - 8040698: 82fb strh r3, [r7, #22] + 80406c6: 230e movs r3, #14 + 80406c8: 82fb strh r3, [r7, #22] #endif /* LWIP_ARP || ETHARP_SUPPORT_VLAN */ LWIP_ASSERT_CORE_LOCKED(); if (p->len <= SIZEOF_ETH_HDR) { - 804069a: 687b ldr r3, [r7, #4] - 804069c: 895b ldrh r3, [r3, #10] - 804069e: 2b0e cmp r3, #14 - 80406a0: d96e bls.n 8040780 + 80406ca: 687b ldr r3, [r7, #4] + 80406cc: 895b ldrh r3, [r3, #10] + 80406ce: 2b0e cmp r3, #14 + 80406d0: d96e bls.n 80407b0 ETHARP_STATS_INC(etharp.drop); MIB2_STATS_NETIF_INC(netif, ifinerrors); goto free_and_return; } if (p->if_idx == NETIF_NO_INDEX) { - 80406a2: 687b ldr r3, [r7, #4] - 80406a4: 7bdb ldrb r3, [r3, #15] - 80406a6: 2b00 cmp r3, #0 - 80406a8: d106 bne.n 80406b8 + 80406d2: 687b ldr r3, [r7, #4] + 80406d4: 7bdb ldrb r3, [r3, #15] + 80406d6: 2b00 cmp r3, #0 + 80406d8: d106 bne.n 80406e8 p->if_idx = netif_get_index(netif); - 80406aa: 683b ldr r3, [r7, #0] - 80406ac: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 80406b0: 3301 adds r3, #1 - 80406b2: b2da uxtb r2, r3 - 80406b4: 687b ldr r3, [r7, #4] - 80406b6: 73da strb r2, [r3, #15] + 80406da: 683b ldr r3, [r7, #0] + 80406dc: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 80406e0: 3301 adds r3, #1 + 80406e2: b2da uxtb r2, r3 + 80406e4: 687b ldr r3, [r7, #4] + 80406e6: 73da strb r2, [r3, #15] } /* points to packet payload, which starts with an Ethernet header */ ethhdr = (struct eth_hdr *)p->payload; - 80406b8: 687b ldr r3, [r7, #4] - 80406ba: 685b ldr r3, [r3, #4] - 80406bc: 613b str r3, [r7, #16] + 80406e8: 687b ldr r3, [r7, #4] + 80406ea: 685b ldr r3, [r3, #4] + 80406ec: 613b str r3, [r7, #16] (unsigned char)ethhdr->dest.addr[3], (unsigned char)ethhdr->dest.addr[4], (unsigned char)ethhdr->dest.addr[5], (unsigned char)ethhdr->src.addr[0], (unsigned char)ethhdr->src.addr[1], (unsigned char)ethhdr->src.addr[2], (unsigned char)ethhdr->src.addr[3], (unsigned char)ethhdr->src.addr[4], (unsigned char)ethhdr->src.addr[5], lwip_htons(ethhdr->type))); type = ethhdr->type; - 80406be: 693b ldr r3, [r7, #16] - 80406c0: 7b1a ldrb r2, [r3, #12] - 80406c2: 7b5b ldrb r3, [r3, #13] - 80406c4: 021b lsls r3, r3, #8 - 80406c6: 4313 orrs r3, r2 - 80406c8: 81fb strh r3, [r7, #14] + 80406ee: 693b ldr r3, [r7, #16] + 80406f0: 7b1a ldrb r2, [r3, #12] + 80406f2: 7b5b ldrb r3, [r3, #13] + 80406f4: 021b lsls r3, r3, #8 + 80406f6: 4313 orrs r3, r2 + 80406f8: 81fb strh r3, [r7, #14] #if LWIP_ARP_FILTER_NETIF netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, lwip_htons(type)); #endif /* LWIP_ARP_FILTER_NETIF*/ if (ethhdr->dest.addr[0] & 1) { - 80406ca: 693b ldr r3, [r7, #16] - 80406cc: 781b ldrb r3, [r3, #0] - 80406ce: f003 0301 and.w r3, r3, #1 - 80406d2: 2b00 cmp r3, #0 - 80406d4: d023 beq.n 804071e + 80406fa: 693b ldr r3, [r7, #16] + 80406fc: 781b ldrb r3, [r3, #0] + 80406fe: f003 0301 and.w r3, r3, #1 + 8040702: 2b00 cmp r3, #0 + 8040704: d023 beq.n 804074e /* this might be a multicast or broadcast packet */ if (ethhdr->dest.addr[0] == LL_IP4_MULTICAST_ADDR_0) { - 80406d6: 693b ldr r3, [r7, #16] - 80406d8: 781b ldrb r3, [r3, #0] - 80406da: 2b01 cmp r3, #1 - 80406dc: d10f bne.n 80406fe + 8040706: 693b ldr r3, [r7, #16] + 8040708: 781b ldrb r3, [r3, #0] + 804070a: 2b01 cmp r3, #1 + 804070c: d10f bne.n 804072e #if LWIP_IPV4 if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) && - 80406de: 693b ldr r3, [r7, #16] - 80406e0: 785b ldrb r3, [r3, #1] - 80406e2: 2b00 cmp r3, #0 - 80406e4: d11b bne.n 804071e + 804070e: 693b ldr r3, [r7, #16] + 8040710: 785b ldrb r3, [r3, #1] + 8040712: 2b00 cmp r3, #0 + 8040714: d11b bne.n 804074e (ethhdr->dest.addr[2] == LL_IP4_MULTICAST_ADDR_2)) { - 80406e6: 693b ldr r3, [r7, #16] - 80406e8: 789b ldrb r3, [r3, #2] + 8040716: 693b ldr r3, [r7, #16] + 8040718: 789b ldrb r3, [r3, #2] if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) && - 80406ea: 2b5e cmp r3, #94 ; 0x5e - 80406ec: d117 bne.n 804071e + 804071a: 2b5e cmp r3, #94 ; 0x5e + 804071c: d117 bne.n 804074e /* mark the pbuf as link-layer multicast */ p->flags |= PBUF_FLAG_LLMCAST; - 80406ee: 687b ldr r3, [r7, #4] - 80406f0: 7b5b ldrb r3, [r3, #13] - 80406f2: f043 0310 orr.w r3, r3, #16 - 80406f6: b2da uxtb r2, r3 - 80406f8: 687b ldr r3, [r7, #4] - 80406fa: 735a strb r2, [r3, #13] - 80406fc: e00f b.n 804071e + 804071e: 687b ldr r3, [r7, #4] + 8040720: 7b5b ldrb r3, [r3, #13] + 8040722: f043 0310 orr.w r3, r3, #16 + 8040726: b2da uxtb r2, r3 + 8040728: 687b ldr r3, [r7, #4] + 804072a: 735a strb r2, [r3, #13] + 804072c: e00f b.n 804074e (ethhdr->dest.addr[1] == LL_IP6_MULTICAST_ADDR_1)) { /* mark the pbuf as link-layer multicast */ p->flags |= PBUF_FLAG_LLMCAST; } #endif /* LWIP_IPV6 */ else if (eth_addr_cmp(ðhdr->dest, ðbroadcast)) { - 80406fe: 693b ldr r3, [r7, #16] - 8040700: 2206 movs r2, #6 - 8040702: 4928 ldr r1, [pc, #160] ; (80407a4 ) - 8040704: 4618 mov r0, r3 - 8040706: f000 f8cb bl 80408a0 - 804070a: 4603 mov r3, r0 - 804070c: 2b00 cmp r3, #0 - 804070e: d106 bne.n 804071e + 804072e: 693b ldr r3, [r7, #16] + 8040730: 2206 movs r2, #6 + 8040732: 4928 ldr r1, [pc, #160] ; (80407d4 ) + 8040734: 4618 mov r0, r3 + 8040736: f000 f8cb bl 80408d0 + 804073a: 4603 mov r3, r0 + 804073c: 2b00 cmp r3, #0 + 804073e: d106 bne.n 804074e /* mark the pbuf as link-layer broadcast */ p->flags |= PBUF_FLAG_LLBCAST; - 8040710: 687b ldr r3, [r7, #4] - 8040712: 7b5b ldrb r3, [r3, #13] - 8040714: f043 0308 orr.w r3, r3, #8 - 8040718: b2da uxtb r2, r3 - 804071a: 687b ldr r3, [r7, #4] - 804071c: 735a strb r2, [r3, #13] + 8040740: 687b ldr r3, [r7, #4] + 8040742: 7b5b ldrb r3, [r3, #13] + 8040744: f043 0308 orr.w r3, r3, #8 + 8040748: b2da uxtb r2, r3 + 804074a: 687b ldr r3, [r7, #4] + 804074c: 735a strb r2, [r3, #13] } } switch (type) { - 804071e: 89fb ldrh r3, [r7, #14] - 8040720: 2b08 cmp r3, #8 - 8040722: d003 beq.n 804072c - 8040724: f5b3 6fc1 cmp.w r3, #1544 ; 0x608 - 8040728: d014 beq.n 8040754 + 804074e: 89fb ldrh r3, [r7, #14] + 8040750: 2b08 cmp r3, #8 + 8040752: d003 beq.n 804075c + 8040754: f5b3 6fc1 cmp.w r3, #1544 ; 0x608 + 8040758: d014 beq.n 8040784 } #endif ETHARP_STATS_INC(etharp.proterr); ETHARP_STATS_INC(etharp.drop); MIB2_STATS_NETIF_INC(netif, ifinunknownprotos); goto free_and_return; - 804072a: e032 b.n 8040792 + 804075a: e032 b.n 80407c2 if (!(netif->flags & NETIF_FLAG_ETHARP)) { - 804072c: 683b ldr r3, [r7, #0] - 804072e: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8040732: f003 0308 and.w r3, r3, #8 - 8040736: 2b00 cmp r3, #0 - 8040738: d024 beq.n 8040784 + 804075c: 683b ldr r3, [r7, #0] + 804075e: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8040762: f003 0308 and.w r3, r3, #8 + 8040766: 2b00 cmp r3, #0 + 8040768: d024 beq.n 80407b4 if (pbuf_remove_header(p, next_hdr_offset)) { - 804073a: 8afb ldrh r3, [r7, #22] - 804073c: 4619 mov r1, r3 - 804073e: 6878 ldr r0, [r7, #4] - 8040740: f7f6 ff5e bl 8037600 - 8040744: 4603 mov r3, r0 - 8040746: 2b00 cmp r3, #0 - 8040748: d11e bne.n 8040788 + 804076a: 8afb ldrh r3, [r7, #22] + 804076c: 4619 mov r1, r3 + 804076e: 6878 ldr r0, [r7, #4] + 8040770: f7f6 ff5e bl 8037630 + 8040774: 4603 mov r3, r0 + 8040776: 2b00 cmp r3, #0 + 8040778: d11e bne.n 80407b8 ip4_input(p, netif); - 804074a: 6839 ldr r1, [r7, #0] - 804074c: 6878 ldr r0, [r7, #4] - 804074e: f7fe ff21 bl 803f594 + 804077a: 6839 ldr r1, [r7, #0] + 804077c: 6878 ldr r0, [r7, #4] + 804077e: f7fe ff21 bl 803f5c4 break; - 8040752: e013 b.n 804077c + 8040782: e013 b.n 80407ac if (!(netif->flags & NETIF_FLAG_ETHARP)) { - 8040754: 683b ldr r3, [r7, #0] - 8040756: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 804075a: f003 0308 and.w r3, r3, #8 - 804075e: 2b00 cmp r3, #0 - 8040760: d014 beq.n 804078c + 8040784: 683b ldr r3, [r7, #0] + 8040786: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 804078a: f003 0308 and.w r3, r3, #8 + 804078e: 2b00 cmp r3, #0 + 8040790: d014 beq.n 80407bc if (pbuf_remove_header(p, next_hdr_offset)) { - 8040762: 8afb ldrh r3, [r7, #22] - 8040764: 4619 mov r1, r3 - 8040766: 6878 ldr r0, [r7, #4] - 8040768: f7f6 ff4a bl 8037600 - 804076c: 4603 mov r3, r0 - 804076e: 2b00 cmp r3, #0 - 8040770: d10e bne.n 8040790 + 8040792: 8afb ldrh r3, [r7, #22] + 8040794: 4619 mov r1, r3 + 8040796: 6878 ldr r0, [r7, #4] + 8040798: f7f6 ff4a bl 8037630 + 804079c: 4603 mov r3, r0 + 804079e: 2b00 cmp r3, #0 + 80407a0: d10e bne.n 80407c0 etharp_input(p, netif); - 8040772: 6839 ldr r1, [r7, #0] - 8040774: 6878 ldr r0, [r7, #4] - 8040776: f7fe f89b bl 803e8b0 + 80407a2: 6839 ldr r1, [r7, #0] + 80407a4: 6878 ldr r0, [r7, #4] + 80407a6: f7fe f89b bl 803e8e0 break; - 804077a: bf00 nop + 80407aa: bf00 nop } /* This means the pbuf is freed or consumed, so the caller doesn't have to free it again */ return ERR_OK; - 804077c: 2300 movs r3, #0 - 804077e: e00c b.n 804079a + 80407ac: 2300 movs r3, #0 + 80407ae: e00c b.n 80407ca goto free_and_return; - 8040780: bf00 nop - 8040782: e006 b.n 8040792 + 80407b0: bf00 nop + 80407b2: e006 b.n 80407c2 goto free_and_return; - 8040784: bf00 nop - 8040786: e004 b.n 8040792 + 80407b4: bf00 nop + 80407b6: e004 b.n 80407c2 goto free_and_return; - 8040788: bf00 nop - 804078a: e002 b.n 8040792 + 80407b8: bf00 nop + 80407ba: e002 b.n 80407c2 goto free_and_return; - 804078c: bf00 nop - 804078e: e000 b.n 8040792 + 80407bc: bf00 nop + 80407be: e000 b.n 80407c2 goto free_and_return; - 8040790: bf00 nop + 80407c0: bf00 nop free_and_return: pbuf_free(p); - 8040792: 6878 ldr r0, [r7, #4] - 8040794: f7f6 ffba bl 803770c + 80407c2: 6878 ldr r0, [r7, #4] + 80407c4: f7f6 ffba bl 803773c return ERR_OK; - 8040798: 2300 movs r3, #0 + 80407c8: 2300 movs r3, #0 } - 804079a: 4618 mov r0, r3 - 804079c: 3718 adds r7, #24 - 804079e: 46bd mov sp, r7 - 80407a0: bd80 pop {r7, pc} - 80407a2: bf00 nop - 80407a4: 08044dd4 .word 0x08044dd4 + 80407ca: 4618 mov r0, r3 + 80407cc: 3718 adds r7, #24 + 80407ce: 46bd mov sp, r7 + 80407d0: bd80 pop {r7, pc} + 80407d2: bf00 nop + 80407d4: 08044e04 .word 0x08044e04 -080407a8 : +080407d8 : * @return ERR_OK if the packet was sent, any other err_t on failure */ err_t ethernet_output(struct netif * netif, struct pbuf * p, const struct eth_addr * src, const struct eth_addr * dst, u16_t eth_type) { - 80407a8: b580 push {r7, lr} - 80407aa: b086 sub sp, #24 - 80407ac: af00 add r7, sp, #0 - 80407ae: 60f8 str r0, [r7, #12] - 80407b0: 60b9 str r1, [r7, #8] - 80407b2: 607a str r2, [r7, #4] - 80407b4: 603b str r3, [r7, #0] + 80407d8: b580 push {r7, lr} + 80407da: b086 sub sp, #24 + 80407dc: af00 add r7, sp, #0 + 80407de: 60f8 str r0, [r7, #12] + 80407e0: 60b9 str r1, [r7, #8] + 80407e2: 607a str r2, [r7, #4] + 80407e4: 603b str r3, [r7, #0] struct eth_hdr *ethhdr; u16_t eth_type_be = lwip_htons(eth_type); - 80407b6: 8c3b ldrh r3, [r7, #32] - 80407b8: 4618 mov r0, r3 - 80407ba: f7f5 fb75 bl 8035ea8 - 80407be: 4603 mov r3, r0 - 80407c0: 82fb strh r3, [r7, #22] + 80407e6: 8c3b ldrh r3, [r7, #32] + 80407e8: 4618 mov r0, r3 + 80407ea: f7f5 fb75 bl 8035ed8 + 80407ee: 4603 mov r3, r0 + 80407f0: 82fb strh r3, [r7, #22] eth_type_be = PP_HTONS(ETHTYPE_VLAN); } else #endif /* ETHARP_SUPPORT_VLAN && defined(LWIP_HOOK_VLAN_SET) */ { if (pbuf_add_header(p, SIZEOF_ETH_HDR) != 0) { - 80407c2: 210e movs r1, #14 - 80407c4: 68b8 ldr r0, [r7, #8] - 80407c6: f7f6 ff0b bl 80375e0 - 80407ca: 4603 mov r3, r0 - 80407cc: 2b00 cmp r3, #0 - 80407ce: d125 bne.n 804081c + 80407f2: 210e movs r1, #14 + 80407f4: 68b8 ldr r0, [r7, #8] + 80407f6: f7f6 ff0b bl 8037610 + 80407fa: 4603 mov r3, r0 + 80407fc: 2b00 cmp r3, #0 + 80407fe: d125 bne.n 804084c } } LWIP_ASSERT_CORE_LOCKED(); ethhdr = (struct eth_hdr *)p->payload; - 80407d0: 68bb ldr r3, [r7, #8] - 80407d2: 685b ldr r3, [r3, #4] - 80407d4: 613b str r3, [r7, #16] + 8040800: 68bb ldr r3, [r7, #8] + 8040802: 685b ldr r3, [r3, #4] + 8040804: 613b str r3, [r7, #16] ethhdr->type = eth_type_be; - 80407d6: 693b ldr r3, [r7, #16] - 80407d8: 8afa ldrh r2, [r7, #22] - 80407da: 819a strh r2, [r3, #12] + 8040806: 693b ldr r3, [r7, #16] + 8040808: 8afa ldrh r2, [r7, #22] + 804080a: 819a strh r2, [r3, #12] SMEMCPY(ðhdr->dest, dst, ETH_HWADDR_LEN); - 80407dc: 693b ldr r3, [r7, #16] - 80407de: 2206 movs r2, #6 - 80407e0: 6839 ldr r1, [r7, #0] - 80407e2: 4618 mov r0, r3 - 80407e4: f000 f86c bl 80408c0 + 804080c: 693b ldr r3, [r7, #16] + 804080e: 2206 movs r2, #6 + 8040810: 6839 ldr r1, [r7, #0] + 8040812: 4618 mov r0, r3 + 8040814: f000 f86c bl 80408f0 SMEMCPY(ðhdr->src, src, ETH_HWADDR_LEN); - 80407e8: 693b ldr r3, [r7, #16] - 80407ea: 3306 adds r3, #6 - 80407ec: 2206 movs r2, #6 - 80407ee: 6879 ldr r1, [r7, #4] - 80407f0: 4618 mov r0, r3 - 80407f2: f000 f865 bl 80408c0 + 8040818: 693b ldr r3, [r7, #16] + 804081a: 3306 adds r3, #6 + 804081c: 2206 movs r2, #6 + 804081e: 6879 ldr r1, [r7, #4] + 8040820: 4618 mov r0, r3 + 8040822: f000 f865 bl 80408f0 LWIP_ASSERT("netif->hwaddr_len must be 6 for ethernet_output!", - 80407f6: 68fb ldr r3, [r7, #12] - 80407f8: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 80407fc: 2b06 cmp r3, #6 - 80407fe: d006 beq.n 804080e - 8040800: 4b0a ldr r3, [pc, #40] ; (804082c ) - 8040802: f44f 7299 mov.w r2, #306 ; 0x132 - 8040806: 490a ldr r1, [pc, #40] ; (8040830 ) - 8040808: 480a ldr r0, [pc, #40] ; (8040834 ) - 804080a: f000 f969 bl 8040ae0 + 8040826: 68fb ldr r3, [r7, #12] + 8040828: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 + 804082c: 2b06 cmp r3, #6 + 804082e: d006 beq.n 804083e + 8040830: 4b0a ldr r3, [pc, #40] ; (804085c ) + 8040832: f44f 7299 mov.w r2, #306 ; 0x132 + 8040836: 490a ldr r1, [pc, #40] ; (8040860 ) + 8040838: 480a ldr r0, [pc, #40] ; (8040864 ) + 804083a: f000 f969 bl 8040b10 (netif->hwaddr_len == ETH_HWADDR_LEN)); LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("ethernet_output: sending packet %p\n", (void *)p)); /* send the packet */ return netif->linkoutput(netif, p); - 804080e: 68fb ldr r3, [r7, #12] - 8040810: 699b ldr r3, [r3, #24] - 8040812: 68b9 ldr r1, [r7, #8] - 8040814: 68f8 ldr r0, [r7, #12] - 8040816: 4798 blx r3 - 8040818: 4603 mov r3, r0 - 804081a: e002 b.n 8040822 + 804083e: 68fb ldr r3, [r7, #12] + 8040840: 699b ldr r3, [r3, #24] + 8040842: 68b9 ldr r1, [r7, #8] + 8040844: 68f8 ldr r0, [r7, #12] + 8040846: 4798 blx r3 + 8040848: 4603 mov r3, r0 + 804084a: e002 b.n 8040852 goto pbuf_header_failed; - 804081c: bf00 nop + 804084c: bf00 nop pbuf_header_failed: LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("ethernet_output: could not allocate room for header.\n")); LINK_STATS_INC(link.lenerr); return ERR_BUF; - 804081e: f06f 0301 mvn.w r3, #1 -} - 8040822: 4618 mov r0, r3 - 8040824: 3718 adds r7, #24 - 8040826: 46bd mov sp, r7 - 8040828: bd80 pop {r7, pc} - 804082a: bf00 nop - 804082c: 08044be8 .word 0x08044be8 - 8040830: 08044c20 .word 0x08044c20 - 8040834: 08044c54 .word 0x08044c54 - -08040838 <__libc_init_array>: - 8040838: b570 push {r4, r5, r6, lr} - 804083a: 4d0d ldr r5, [pc, #52] ; (8040870 <__libc_init_array+0x38>) - 804083c: 4c0d ldr r4, [pc, #52] ; (8040874 <__libc_init_array+0x3c>) - 804083e: 1b64 subs r4, r4, r5 - 8040840: 10a4 asrs r4, r4, #2 - 8040842: 2600 movs r6, #0 - 8040844: 42a6 cmp r6, r4 - 8040846: d109 bne.n 804085c <__libc_init_array+0x24> - 8040848: 4d0b ldr r5, [pc, #44] ; (8040878 <__libc_init_array+0x40>) - 804084a: 4c0c ldr r4, [pc, #48] ; (804087c <__libc_init_array+0x44>) - 804084c: f001 fbb8 bl 8041fc0 <_init> - 8040850: 1b64 subs r4, r4, r5 - 8040852: 10a4 asrs r4, r4, #2 - 8040854: 2600 movs r6, #0 - 8040856: 42a6 cmp r6, r4 - 8040858: d105 bne.n 8040866 <__libc_init_array+0x2e> - 804085a: bd70 pop {r4, r5, r6, pc} - 804085c: f855 3b04 ldr.w r3, [r5], #4 - 8040860: 4798 blx r3 - 8040862: 3601 adds r6, #1 - 8040864: e7ee b.n 8040844 <__libc_init_array+0xc> - 8040866: f855 3b04 ldr.w r3, [r5], #4 - 804086a: 4798 blx r3 - 804086c: 3601 adds r6, #1 - 804086e: e7f2 b.n 8040856 <__libc_init_array+0x1e> - 8040870: 080457c8 .word 0x080457c8 - 8040874: 080457c8 .word 0x080457c8 - 8040878: 080457c8 .word 0x080457c8 - 804087c: 080457cc .word 0x080457cc - -08040880 : - 8040880: 4b02 ldr r3, [pc, #8] ; (804088c ) - 8040882: 4601 mov r1, r0 - 8040884: 6818 ldr r0, [r3, #0] - 8040886: f000 b8b7 b.w 80409f8 <_malloc_r> - 804088a: bf00 nop - 804088c: 24000078 .word 0x24000078 - -08040890 : - 8040890: 4b02 ldr r3, [pc, #8] ; (804089c ) - 8040892: 4601 mov r1, r0 - 8040894: 6818 ldr r0, [r3, #0] - 8040896: f000 b843 b.w 8040920 <_free_r> - 804089a: bf00 nop - 804089c: 24000078 .word 0x24000078 - -080408a0 : - 80408a0: b510 push {r4, lr} - 80408a2: 3901 subs r1, #1 - 80408a4: 4402 add r2, r0 - 80408a6: 4290 cmp r0, r2 - 80408a8: d101 bne.n 80408ae - 80408aa: 2000 movs r0, #0 - 80408ac: e005 b.n 80408ba - 80408ae: 7803 ldrb r3, [r0, #0] - 80408b0: f811 4f01 ldrb.w r4, [r1, #1]! - 80408b4: 42a3 cmp r3, r4 - 80408b6: d001 beq.n 80408bc - 80408b8: 1b18 subs r0, r3, r4 - 80408ba: bd10 pop {r4, pc} - 80408bc: 3001 adds r0, #1 - 80408be: e7f2 b.n 80408a6 - -080408c0 : - 80408c0: 440a add r2, r1 - 80408c2: 4291 cmp r1, r2 - 80408c4: f100 33ff add.w r3, r0, #4294967295 - 80408c8: d100 bne.n 80408cc - 80408ca: 4770 bx lr - 80408cc: b510 push {r4, lr} - 80408ce: f811 4b01 ldrb.w r4, [r1], #1 - 80408d2: f803 4f01 strb.w r4, [r3, #1]! - 80408d6: 4291 cmp r1, r2 - 80408d8: d1f9 bne.n 80408ce - 80408da: bd10 pop {r4, pc} - -080408dc : - 80408dc: 4288 cmp r0, r1 - 80408de: b510 push {r4, lr} - 80408e0: eb01 0402 add.w r4, r1, r2 - 80408e4: d902 bls.n 80408ec - 80408e6: 4284 cmp r4, r0 - 80408e8: 4623 mov r3, r4 - 80408ea: d807 bhi.n 80408fc - 80408ec: 1e43 subs r3, r0, #1 - 80408ee: 42a1 cmp r1, r4 - 80408f0: d008 beq.n 8040904 - 80408f2: f811 2b01 ldrb.w r2, [r1], #1 - 80408f6: f803 2f01 strb.w r2, [r3, #1]! - 80408fa: e7f8 b.n 80408ee - 80408fc: 4402 add r2, r0 - 80408fe: 4601 mov r1, r0 - 8040900: 428a cmp r2, r1 - 8040902: d100 bne.n 8040906 - 8040904: bd10 pop {r4, pc} - 8040906: f813 4d01 ldrb.w r4, [r3, #-1]! - 804090a: f802 4d01 strb.w r4, [r2, #-1]! - 804090e: e7f7 b.n 8040900 - -08040910 : - 8040910: 4402 add r2, r0 - 8040912: 4603 mov r3, r0 - 8040914: 4293 cmp r3, r2 - 8040916: d100 bne.n 804091a - 8040918: 4770 bx lr - 804091a: f803 1b01 strb.w r1, [r3], #1 - 804091e: e7f9 b.n 8040914 - -08040920 <_free_r>: - 8040920: b537 push {r0, r1, r2, r4, r5, lr} - 8040922: 2900 cmp r1, #0 - 8040924: d044 beq.n 80409b0 <_free_r+0x90> - 8040926: f851 3c04 ldr.w r3, [r1, #-4] - 804092a: 9001 str r0, [sp, #4] - 804092c: 2b00 cmp r3, #0 - 804092e: f1a1 0404 sub.w r4, r1, #4 - 8040932: bfb8 it lt - 8040934: 18e4 addlt r4, r4, r3 - 8040936: f000 faa7 bl 8040e88 <__malloc_lock> - 804093a: 4a1e ldr r2, [pc, #120] ; (80409b4 <_free_r+0x94>) - 804093c: 9801 ldr r0, [sp, #4] - 804093e: 6813 ldr r3, [r2, #0] - 8040940: b933 cbnz r3, 8040950 <_free_r+0x30> - 8040942: 6063 str r3, [r4, #4] - 8040944: 6014 str r4, [r2, #0] - 8040946: b003 add sp, #12 - 8040948: e8bd 4030 ldmia.w sp!, {r4, r5, lr} - 804094c: f000 baa2 b.w 8040e94 <__malloc_unlock> - 8040950: 42a3 cmp r3, r4 - 8040952: d908 bls.n 8040966 <_free_r+0x46> - 8040954: 6825 ldr r5, [r4, #0] - 8040956: 1961 adds r1, r4, r5 - 8040958: 428b cmp r3, r1 - 804095a: bf01 itttt eq - 804095c: 6819 ldreq r1, [r3, #0] - 804095e: 685b ldreq r3, [r3, #4] - 8040960: 1949 addeq r1, r1, r5 - 8040962: 6021 streq r1, [r4, #0] - 8040964: e7ed b.n 8040942 <_free_r+0x22> - 8040966: 461a mov r2, r3 - 8040968: 685b ldr r3, [r3, #4] - 804096a: b10b cbz r3, 8040970 <_free_r+0x50> - 804096c: 42a3 cmp r3, r4 - 804096e: d9fa bls.n 8040966 <_free_r+0x46> - 8040970: 6811 ldr r1, [r2, #0] - 8040972: 1855 adds r5, r2, r1 - 8040974: 42a5 cmp r5, r4 - 8040976: d10b bne.n 8040990 <_free_r+0x70> - 8040978: 6824 ldr r4, [r4, #0] - 804097a: 4421 add r1, r4 - 804097c: 1854 adds r4, r2, r1 - 804097e: 42a3 cmp r3, r4 - 8040980: 6011 str r1, [r2, #0] - 8040982: d1e0 bne.n 8040946 <_free_r+0x26> - 8040984: 681c ldr r4, [r3, #0] - 8040986: 685b ldr r3, [r3, #4] - 8040988: 6053 str r3, [r2, #4] - 804098a: 4421 add r1, r4 - 804098c: 6011 str r1, [r2, #0] - 804098e: e7da b.n 8040946 <_free_r+0x26> - 8040990: d902 bls.n 8040998 <_free_r+0x78> - 8040992: 230c movs r3, #12 - 8040994: 6003 str r3, [r0, #0] - 8040996: e7d6 b.n 8040946 <_free_r+0x26> - 8040998: 6825 ldr r5, [r4, #0] - 804099a: 1961 adds r1, r4, r5 - 804099c: 428b cmp r3, r1 - 804099e: bf04 itt eq - 80409a0: 6819 ldreq r1, [r3, #0] - 80409a2: 685b ldreq r3, [r3, #4] - 80409a4: 6063 str r3, [r4, #4] - 80409a6: bf04 itt eq - 80409a8: 1949 addeq r1, r1, r5 - 80409aa: 6021 streq r1, [r4, #0] - 80409ac: 6054 str r4, [r2, #4] - 80409ae: e7ca b.n 8040946 <_free_r+0x26> - 80409b0: b003 add sp, #12 - 80409b2: bd30 pop {r4, r5, pc} - 80409b4: 2400eab4 .word 0x2400eab4 - -080409b8 : - 80409b8: b570 push {r4, r5, r6, lr} - 80409ba: 4e0e ldr r6, [pc, #56] ; (80409f4 ) - 80409bc: 460c mov r4, r1 - 80409be: 6831 ldr r1, [r6, #0] - 80409c0: 4605 mov r5, r0 - 80409c2: b911 cbnz r1, 80409ca - 80409c4: f000 f8e2 bl 8040b8c <_sbrk_r> - 80409c8: 6030 str r0, [r6, #0] - 80409ca: 4621 mov r1, r4 - 80409cc: 4628 mov r0, r5 - 80409ce: f000 f8dd bl 8040b8c <_sbrk_r> - 80409d2: 1c43 adds r3, r0, #1 - 80409d4: d00a beq.n 80409ec - 80409d6: 1cc4 adds r4, r0, #3 - 80409d8: f024 0403 bic.w r4, r4, #3 - 80409dc: 42a0 cmp r0, r4 - 80409de: d007 beq.n 80409f0 - 80409e0: 1a21 subs r1, r4, r0 - 80409e2: 4628 mov r0, r5 - 80409e4: f000 f8d2 bl 8040b8c <_sbrk_r> - 80409e8: 3001 adds r0, #1 - 80409ea: d101 bne.n 80409f0 - 80409ec: f04f 34ff mov.w r4, #4294967295 - 80409f0: 4620 mov r0, r4 - 80409f2: bd70 pop {r4, r5, r6, pc} - 80409f4: 2400eab8 .word 0x2400eab8 - -080409f8 <_malloc_r>: - 80409f8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 80409fc: 1ccd adds r5, r1, #3 - 80409fe: f025 0503 bic.w r5, r5, #3 - 8040a02: 3508 adds r5, #8 - 8040a04: 2d0c cmp r5, #12 - 8040a06: bf38 it cc - 8040a08: 250c movcc r5, #12 - 8040a0a: 2d00 cmp r5, #0 - 8040a0c: 4607 mov r7, r0 - 8040a0e: db01 blt.n 8040a14 <_malloc_r+0x1c> - 8040a10: 42a9 cmp r1, r5 - 8040a12: d905 bls.n 8040a20 <_malloc_r+0x28> - 8040a14: 230c movs r3, #12 - 8040a16: 603b str r3, [r7, #0] - 8040a18: 2600 movs r6, #0 - 8040a1a: 4630 mov r0, r6 - 8040a1c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8040a20: 4e2e ldr r6, [pc, #184] ; (8040adc <_malloc_r+0xe4>) - 8040a22: f000 fa31 bl 8040e88 <__malloc_lock> - 8040a26: 6833 ldr r3, [r6, #0] - 8040a28: 461c mov r4, r3 - 8040a2a: bb34 cbnz r4, 8040a7a <_malloc_r+0x82> - 8040a2c: 4629 mov r1, r5 - 8040a2e: 4638 mov r0, r7 - 8040a30: f7ff ffc2 bl 80409b8 - 8040a34: 1c43 adds r3, r0, #1 - 8040a36: 4604 mov r4, r0 - 8040a38: d14d bne.n 8040ad6 <_malloc_r+0xde> - 8040a3a: 6834 ldr r4, [r6, #0] - 8040a3c: 4626 mov r6, r4 - 8040a3e: 2e00 cmp r6, #0 - 8040a40: d140 bne.n 8040ac4 <_malloc_r+0xcc> - 8040a42: 6823 ldr r3, [r4, #0] - 8040a44: 4631 mov r1, r6 - 8040a46: 4638 mov r0, r7 - 8040a48: eb04 0803 add.w r8, r4, r3 - 8040a4c: f000 f89e bl 8040b8c <_sbrk_r> - 8040a50: 4580 cmp r8, r0 - 8040a52: d13a bne.n 8040aca <_malloc_r+0xd2> - 8040a54: 6821 ldr r1, [r4, #0] - 8040a56: 3503 adds r5, #3 - 8040a58: 1a6d subs r5, r5, r1 - 8040a5a: f025 0503 bic.w r5, r5, #3 - 8040a5e: 3508 adds r5, #8 - 8040a60: 2d0c cmp r5, #12 - 8040a62: bf38 it cc - 8040a64: 250c movcc r5, #12 - 8040a66: 4629 mov r1, r5 - 8040a68: 4638 mov r0, r7 - 8040a6a: f7ff ffa5 bl 80409b8 - 8040a6e: 3001 adds r0, #1 - 8040a70: d02b beq.n 8040aca <_malloc_r+0xd2> + 804084e: f06f 0301 mvn.w r3, #1 +} + 8040852: 4618 mov r0, r3 + 8040854: 3718 adds r7, #24 + 8040856: 46bd mov sp, r7 + 8040858: bd80 pop {r7, pc} + 804085a: bf00 nop + 804085c: 08044c18 .word 0x08044c18 + 8040860: 08044c50 .word 0x08044c50 + 8040864: 08044c84 .word 0x08044c84 + +08040868 <__libc_init_array>: + 8040868: b570 push {r4, r5, r6, lr} + 804086a: 4d0d ldr r5, [pc, #52] ; (80408a0 <__libc_init_array+0x38>) + 804086c: 4c0d ldr r4, [pc, #52] ; (80408a4 <__libc_init_array+0x3c>) + 804086e: 1b64 subs r4, r4, r5 + 8040870: 10a4 asrs r4, r4, #2 + 8040872: 2600 movs r6, #0 + 8040874: 42a6 cmp r6, r4 + 8040876: d109 bne.n 804088c <__libc_init_array+0x24> + 8040878: 4d0b ldr r5, [pc, #44] ; (80408a8 <__libc_init_array+0x40>) + 804087a: 4c0c ldr r4, [pc, #48] ; (80408ac <__libc_init_array+0x44>) + 804087c: f001 fbb8 bl 8041ff0 <_init> + 8040880: 1b64 subs r4, r4, r5 + 8040882: 10a4 asrs r4, r4, #2 + 8040884: 2600 movs r6, #0 + 8040886: 42a6 cmp r6, r4 + 8040888: d105 bne.n 8040896 <__libc_init_array+0x2e> + 804088a: bd70 pop {r4, r5, r6, pc} + 804088c: f855 3b04 ldr.w r3, [r5], #4 + 8040890: 4798 blx r3 + 8040892: 3601 adds r6, #1 + 8040894: e7ee b.n 8040874 <__libc_init_array+0xc> + 8040896: f855 3b04 ldr.w r3, [r5], #4 + 804089a: 4798 blx r3 + 804089c: 3601 adds r6, #1 + 804089e: e7f2 b.n 8040886 <__libc_init_array+0x1e> + 80408a0: 080457f8 .word 0x080457f8 + 80408a4: 080457f8 .word 0x080457f8 + 80408a8: 080457f8 .word 0x080457f8 + 80408ac: 080457fc .word 0x080457fc + +080408b0 : + 80408b0: 4b02 ldr r3, [pc, #8] ; (80408bc ) + 80408b2: 4601 mov r1, r0 + 80408b4: 6818 ldr r0, [r3, #0] + 80408b6: f000 b8b7 b.w 8040a28 <_malloc_r> + 80408ba: bf00 nop + 80408bc: 24000078 .word 0x24000078 + +080408c0 : + 80408c0: 4b02 ldr r3, [pc, #8] ; (80408cc ) + 80408c2: 4601 mov r1, r0 + 80408c4: 6818 ldr r0, [r3, #0] + 80408c6: f000 b843 b.w 8040950 <_free_r> + 80408ca: bf00 nop + 80408cc: 24000078 .word 0x24000078 + +080408d0 : + 80408d0: b510 push {r4, lr} + 80408d2: 3901 subs r1, #1 + 80408d4: 4402 add r2, r0 + 80408d6: 4290 cmp r0, r2 + 80408d8: d101 bne.n 80408de + 80408da: 2000 movs r0, #0 + 80408dc: e005 b.n 80408ea + 80408de: 7803 ldrb r3, [r0, #0] + 80408e0: f811 4f01 ldrb.w r4, [r1, #1]! + 80408e4: 42a3 cmp r3, r4 + 80408e6: d001 beq.n 80408ec + 80408e8: 1b18 subs r0, r3, r4 + 80408ea: bd10 pop {r4, pc} + 80408ec: 3001 adds r0, #1 + 80408ee: e7f2 b.n 80408d6 + +080408f0 : + 80408f0: 440a add r2, r1 + 80408f2: 4291 cmp r1, r2 + 80408f4: f100 33ff add.w r3, r0, #4294967295 + 80408f8: d100 bne.n 80408fc + 80408fa: 4770 bx lr + 80408fc: b510 push {r4, lr} + 80408fe: f811 4b01 ldrb.w r4, [r1], #1 + 8040902: f803 4f01 strb.w r4, [r3, #1]! + 8040906: 4291 cmp r1, r2 + 8040908: d1f9 bne.n 80408fe + 804090a: bd10 pop {r4, pc} + +0804090c : + 804090c: 4288 cmp r0, r1 + 804090e: b510 push {r4, lr} + 8040910: eb01 0402 add.w r4, r1, r2 + 8040914: d902 bls.n 804091c + 8040916: 4284 cmp r4, r0 + 8040918: 4623 mov r3, r4 + 804091a: d807 bhi.n 804092c + 804091c: 1e43 subs r3, r0, #1 + 804091e: 42a1 cmp r1, r4 + 8040920: d008 beq.n 8040934 + 8040922: f811 2b01 ldrb.w r2, [r1], #1 + 8040926: f803 2f01 strb.w r2, [r3, #1]! + 804092a: e7f8 b.n 804091e + 804092c: 4402 add r2, r0 + 804092e: 4601 mov r1, r0 + 8040930: 428a cmp r2, r1 + 8040932: d100 bne.n 8040936 + 8040934: bd10 pop {r4, pc} + 8040936: f813 4d01 ldrb.w r4, [r3, #-1]! + 804093a: f802 4d01 strb.w r4, [r2, #-1]! + 804093e: e7f7 b.n 8040930 + +08040940 : + 8040940: 4402 add r2, r0 + 8040942: 4603 mov r3, r0 + 8040944: 4293 cmp r3, r2 + 8040946: d100 bne.n 804094a + 8040948: 4770 bx lr + 804094a: f803 1b01 strb.w r1, [r3], #1 + 804094e: e7f9 b.n 8040944 + +08040950 <_free_r>: + 8040950: b537 push {r0, r1, r2, r4, r5, lr} + 8040952: 2900 cmp r1, #0 + 8040954: d044 beq.n 80409e0 <_free_r+0x90> + 8040956: f851 3c04 ldr.w r3, [r1, #-4] + 804095a: 9001 str r0, [sp, #4] + 804095c: 2b00 cmp r3, #0 + 804095e: f1a1 0404 sub.w r4, r1, #4 + 8040962: bfb8 it lt + 8040964: 18e4 addlt r4, r4, r3 + 8040966: f000 faa7 bl 8040eb8 <__malloc_lock> + 804096a: 4a1e ldr r2, [pc, #120] ; (80409e4 <_free_r+0x94>) + 804096c: 9801 ldr r0, [sp, #4] + 804096e: 6813 ldr r3, [r2, #0] + 8040970: b933 cbnz r3, 8040980 <_free_r+0x30> + 8040972: 6063 str r3, [r4, #4] + 8040974: 6014 str r4, [r2, #0] + 8040976: b003 add sp, #12 + 8040978: e8bd 4030 ldmia.w sp!, {r4, r5, lr} + 804097c: f000 baa2 b.w 8040ec4 <__malloc_unlock> + 8040980: 42a3 cmp r3, r4 + 8040982: d908 bls.n 8040996 <_free_r+0x46> + 8040984: 6825 ldr r5, [r4, #0] + 8040986: 1961 adds r1, r4, r5 + 8040988: 428b cmp r3, r1 + 804098a: bf01 itttt eq + 804098c: 6819 ldreq r1, [r3, #0] + 804098e: 685b ldreq r3, [r3, #4] + 8040990: 1949 addeq r1, r1, r5 + 8040992: 6021 streq r1, [r4, #0] + 8040994: e7ed b.n 8040972 <_free_r+0x22> + 8040996: 461a mov r2, r3 + 8040998: 685b ldr r3, [r3, #4] + 804099a: b10b cbz r3, 80409a0 <_free_r+0x50> + 804099c: 42a3 cmp r3, r4 + 804099e: d9fa bls.n 8040996 <_free_r+0x46> + 80409a0: 6811 ldr r1, [r2, #0] + 80409a2: 1855 adds r5, r2, r1 + 80409a4: 42a5 cmp r5, r4 + 80409a6: d10b bne.n 80409c0 <_free_r+0x70> + 80409a8: 6824 ldr r4, [r4, #0] + 80409aa: 4421 add r1, r4 + 80409ac: 1854 adds r4, r2, r1 + 80409ae: 42a3 cmp r3, r4 + 80409b0: 6011 str r1, [r2, #0] + 80409b2: d1e0 bne.n 8040976 <_free_r+0x26> + 80409b4: 681c ldr r4, [r3, #0] + 80409b6: 685b ldr r3, [r3, #4] + 80409b8: 6053 str r3, [r2, #4] + 80409ba: 4421 add r1, r4 + 80409bc: 6011 str r1, [r2, #0] + 80409be: e7da b.n 8040976 <_free_r+0x26> + 80409c0: d902 bls.n 80409c8 <_free_r+0x78> + 80409c2: 230c movs r3, #12 + 80409c4: 6003 str r3, [r0, #0] + 80409c6: e7d6 b.n 8040976 <_free_r+0x26> + 80409c8: 6825 ldr r5, [r4, #0] + 80409ca: 1961 adds r1, r4, r5 + 80409cc: 428b cmp r3, r1 + 80409ce: bf04 itt eq + 80409d0: 6819 ldreq r1, [r3, #0] + 80409d2: 685b ldreq r3, [r3, #4] + 80409d4: 6063 str r3, [r4, #4] + 80409d6: bf04 itt eq + 80409d8: 1949 addeq r1, r1, r5 + 80409da: 6021 streq r1, [r4, #0] + 80409dc: 6054 str r4, [r2, #4] + 80409de: e7ca b.n 8040976 <_free_r+0x26> + 80409e0: b003 add sp, #12 + 80409e2: bd30 pop {r4, r5, pc} + 80409e4: 2400eab4 .word 0x2400eab4 + +080409e8 : + 80409e8: b570 push {r4, r5, r6, lr} + 80409ea: 4e0e ldr r6, [pc, #56] ; (8040a24 ) + 80409ec: 460c mov r4, r1 + 80409ee: 6831 ldr r1, [r6, #0] + 80409f0: 4605 mov r5, r0 + 80409f2: b911 cbnz r1, 80409fa + 80409f4: f000 f8e2 bl 8040bbc <_sbrk_r> + 80409f8: 6030 str r0, [r6, #0] + 80409fa: 4621 mov r1, r4 + 80409fc: 4628 mov r0, r5 + 80409fe: f000 f8dd bl 8040bbc <_sbrk_r> + 8040a02: 1c43 adds r3, r0, #1 + 8040a04: d00a beq.n 8040a1c + 8040a06: 1cc4 adds r4, r0, #3 + 8040a08: f024 0403 bic.w r4, r4, #3 + 8040a0c: 42a0 cmp r0, r4 + 8040a0e: d007 beq.n 8040a20 + 8040a10: 1a21 subs r1, r4, r0 + 8040a12: 4628 mov r0, r5 + 8040a14: f000 f8d2 bl 8040bbc <_sbrk_r> + 8040a18: 3001 adds r0, #1 + 8040a1a: d101 bne.n 8040a20 + 8040a1c: f04f 34ff mov.w r4, #4294967295 + 8040a20: 4620 mov r0, r4 + 8040a22: bd70 pop {r4, r5, r6, pc} + 8040a24: 2400eab8 .word 0x2400eab8 + +08040a28 <_malloc_r>: + 8040a28: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8040a2c: 1ccd adds r5, r1, #3 + 8040a2e: f025 0503 bic.w r5, r5, #3 + 8040a32: 3508 adds r5, #8 + 8040a34: 2d0c cmp r5, #12 + 8040a36: bf38 it cc + 8040a38: 250c movcc r5, #12 + 8040a3a: 2d00 cmp r5, #0 + 8040a3c: 4607 mov r7, r0 + 8040a3e: db01 blt.n 8040a44 <_malloc_r+0x1c> + 8040a40: 42a9 cmp r1, r5 + 8040a42: d905 bls.n 8040a50 <_malloc_r+0x28> + 8040a44: 230c movs r3, #12 + 8040a46: 603b str r3, [r7, #0] + 8040a48: 2600 movs r6, #0 + 8040a4a: 4630 mov r0, r6 + 8040a4c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8040a50: 4e2e ldr r6, [pc, #184] ; (8040b0c <_malloc_r+0xe4>) + 8040a52: f000 fa31 bl 8040eb8 <__malloc_lock> + 8040a56: 6833 ldr r3, [r6, #0] + 8040a58: 461c mov r4, r3 + 8040a5a: bb34 cbnz r4, 8040aaa <_malloc_r+0x82> + 8040a5c: 4629 mov r1, r5 + 8040a5e: 4638 mov r0, r7 + 8040a60: f7ff ffc2 bl 80409e8 + 8040a64: 1c43 adds r3, r0, #1 + 8040a66: 4604 mov r4, r0 + 8040a68: d14d bne.n 8040b06 <_malloc_r+0xde> + 8040a6a: 6834 ldr r4, [r6, #0] + 8040a6c: 4626 mov r6, r4 + 8040a6e: 2e00 cmp r6, #0 + 8040a70: d140 bne.n 8040af4 <_malloc_r+0xcc> 8040a72: 6823 ldr r3, [r4, #0] - 8040a74: 442b add r3, r5 - 8040a76: 6023 str r3, [r4, #0] - 8040a78: e00e b.n 8040a98 <_malloc_r+0xa0> - 8040a7a: 6822 ldr r2, [r4, #0] - 8040a7c: 1b52 subs r2, r2, r5 - 8040a7e: d41e bmi.n 8040abe <_malloc_r+0xc6> - 8040a80: 2a0b cmp r2, #11 - 8040a82: d916 bls.n 8040ab2 <_malloc_r+0xba> - 8040a84: 1961 adds r1, r4, r5 - 8040a86: 42a3 cmp r3, r4 - 8040a88: 6025 str r5, [r4, #0] - 8040a8a: bf18 it ne - 8040a8c: 6059 strne r1, [r3, #4] - 8040a8e: 6863 ldr r3, [r4, #4] - 8040a90: bf08 it eq - 8040a92: 6031 streq r1, [r6, #0] - 8040a94: 5162 str r2, [r4, r5] - 8040a96: 604b str r3, [r1, #4] + 8040a74: 4631 mov r1, r6 + 8040a76: 4638 mov r0, r7 + 8040a78: eb04 0803 add.w r8, r4, r3 + 8040a7c: f000 f89e bl 8040bbc <_sbrk_r> + 8040a80: 4580 cmp r8, r0 + 8040a82: d13a bne.n 8040afa <_malloc_r+0xd2> + 8040a84: 6821 ldr r1, [r4, #0] + 8040a86: 3503 adds r5, #3 + 8040a88: 1a6d subs r5, r5, r1 + 8040a8a: f025 0503 bic.w r5, r5, #3 + 8040a8e: 3508 adds r5, #8 + 8040a90: 2d0c cmp r5, #12 + 8040a92: bf38 it cc + 8040a94: 250c movcc r5, #12 + 8040a96: 4629 mov r1, r5 8040a98: 4638 mov r0, r7 - 8040a9a: f104 060b add.w r6, r4, #11 - 8040a9e: f000 f9f9 bl 8040e94 <__malloc_unlock> - 8040aa2: f026 0607 bic.w r6, r6, #7 - 8040aa6: 1d23 adds r3, r4, #4 - 8040aa8: 1af2 subs r2, r6, r3 - 8040aaa: d0b6 beq.n 8040a1a <_malloc_r+0x22> - 8040aac: 1b9b subs r3, r3, r6 - 8040aae: 50a3 str r3, [r4, r2] - 8040ab0: e7b3 b.n 8040a1a <_malloc_r+0x22> - 8040ab2: 6862 ldr r2, [r4, #4] - 8040ab4: 42a3 cmp r3, r4 - 8040ab6: bf0c ite eq - 8040ab8: 6032 streq r2, [r6, #0] - 8040aba: 605a strne r2, [r3, #4] - 8040abc: e7ec b.n 8040a98 <_malloc_r+0xa0> - 8040abe: 4623 mov r3, r4 - 8040ac0: 6864 ldr r4, [r4, #4] - 8040ac2: e7b2 b.n 8040a2a <_malloc_r+0x32> - 8040ac4: 4634 mov r4, r6 - 8040ac6: 6876 ldr r6, [r6, #4] - 8040ac8: e7b9 b.n 8040a3e <_malloc_r+0x46> - 8040aca: 230c movs r3, #12 - 8040acc: 603b str r3, [r7, #0] - 8040ace: 4638 mov r0, r7 - 8040ad0: f000 f9e0 bl 8040e94 <__malloc_unlock> - 8040ad4: e7a1 b.n 8040a1a <_malloc_r+0x22> - 8040ad6: 6025 str r5, [r4, #0] - 8040ad8: e7de b.n 8040a98 <_malloc_r+0xa0> - 8040ada: bf00 nop - 8040adc: 2400eab4 .word 0x2400eab4 - -08040ae0 : - 8040ae0: b40f push {r0, r1, r2, r3} - 8040ae2: 4b0a ldr r3, [pc, #40] ; (8040b0c ) - 8040ae4: b513 push {r0, r1, r4, lr} - 8040ae6: 681c ldr r4, [r3, #0] - 8040ae8: b124 cbz r4, 8040af4 - 8040aea: 69a3 ldr r3, [r4, #24] - 8040aec: b913 cbnz r3, 8040af4 - 8040aee: 4620 mov r0, r4 - 8040af0: f000 f918 bl 8040d24 <__sinit> - 8040af4: ab05 add r3, sp, #20 - 8040af6: 9a04 ldr r2, [sp, #16] - 8040af8: 68a1 ldr r1, [r4, #8] - 8040afa: 9301 str r3, [sp, #4] - 8040afc: 4620 mov r0, r4 - 8040afe: f000 fb55 bl 80411ac <_vfiprintf_r> - 8040b02: b002 add sp, #8 - 8040b04: e8bd 4010 ldmia.w sp!, {r4, lr} - 8040b08: b004 add sp, #16 - 8040b0a: 4770 bx lr - 8040b0c: 24000078 .word 0x24000078 - -08040b10 : - 8040b10: 4b16 ldr r3, [pc, #88] ; (8040b6c ) - 8040b12: b510 push {r4, lr} - 8040b14: 681c ldr r4, [r3, #0] - 8040b16: 6ba3 ldr r3, [r4, #56] ; 0x38 - 8040b18: b9b3 cbnz r3, 8040b48 - 8040b1a: 2018 movs r0, #24 - 8040b1c: f7ff feb0 bl 8040880 - 8040b20: 63a0 str r0, [r4, #56] ; 0x38 - 8040b22: b928 cbnz r0, 8040b30 - 8040b24: 4602 mov r2, r0 - 8040b26: 4b12 ldr r3, [pc, #72] ; (8040b70 ) - 8040b28: 4812 ldr r0, [pc, #72] ; (8040b74 ) - 8040b2a: 214e movs r1, #78 ; 0x4e - 8040b2c: f000 f87e bl 8040c2c <__assert_func> - 8040b30: 4a11 ldr r2, [pc, #68] ; (8040b78 ) - 8040b32: 4b12 ldr r3, [pc, #72] ; (8040b7c ) - 8040b34: e9c0 2300 strd r2, r3, [r0] - 8040b38: 4b11 ldr r3, [pc, #68] ; (8040b80 ) - 8040b3a: 6083 str r3, [r0, #8] - 8040b3c: 230b movs r3, #11 - 8040b3e: 8183 strh r3, [r0, #12] - 8040b40: 2201 movs r2, #1 - 8040b42: 2300 movs r3, #0 - 8040b44: e9c0 2304 strd r2, r3, [r0, #16] - 8040b48: 6ba4 ldr r4, [r4, #56] ; 0x38 - 8040b4a: 4a0e ldr r2, [pc, #56] ; (8040b84 ) - 8040b4c: 6920 ldr r0, [r4, #16] - 8040b4e: 6963 ldr r3, [r4, #20] - 8040b50: 490d ldr r1, [pc, #52] ; (8040b88 ) - 8040b52: 4342 muls r2, r0 - 8040b54: fb01 2203 mla r2, r1, r3, r2 - 8040b58: fba0 0101 umull r0, r1, r0, r1 - 8040b5c: 1c43 adds r3, r0, #1 - 8040b5e: eb42 0001 adc.w r0, r2, r1 - 8040b62: e9c4 3004 strd r3, r0, [r4, #16] - 8040b66: f020 4000 bic.w r0, r0, #2147483648 ; 0x80000000 - 8040b6a: bd10 pop {r4, pc} - 8040b6c: 24000078 .word 0x24000078 - 8040b70: 08044de8 .word 0x08044de8 - 8040b74: 08044dff .word 0x08044dff - 8040b78: abcd330e .word 0xabcd330e - 8040b7c: e66d1234 .word 0xe66d1234 - 8040b80: 0005deec .word 0x0005deec - 8040b84: 5851f42d .word 0x5851f42d - 8040b88: 4c957f2d .word 0x4c957f2d - -08040b8c <_sbrk_r>: - 8040b8c: b538 push {r3, r4, r5, lr} - 8040b8e: 4d06 ldr r5, [pc, #24] ; (8040ba8 <_sbrk_r+0x1c>) - 8040b90: 2300 movs r3, #0 - 8040b92: 4604 mov r4, r0 - 8040b94: 4608 mov r0, r1 - 8040b96: 602b str r3, [r5, #0] - 8040b98: f7e3 fe64 bl 8024864 <_sbrk> - 8040b9c: 1c43 adds r3, r0, #1 - 8040b9e: d102 bne.n 8040ba6 <_sbrk_r+0x1a> - 8040ba0: 682b ldr r3, [r5, #0] - 8040ba2: b103 cbz r3, 8040ba6 <_sbrk_r+0x1a> - 8040ba4: 6023 str r3, [r4, #0] - 8040ba6: bd38 pop {r3, r4, r5, pc} - 8040ba8: 2400eabc .word 0x2400eabc - -08040bac : - 8040bac: b40e push {r1, r2, r3} - 8040bae: b500 push {lr} - 8040bb0: b09c sub sp, #112 ; 0x70 - 8040bb2: ab1d add r3, sp, #116 ; 0x74 - 8040bb4: 9002 str r0, [sp, #8] - 8040bb6: 9006 str r0, [sp, #24] - 8040bb8: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 - 8040bbc: 4809 ldr r0, [pc, #36] ; (8040be4 ) - 8040bbe: 9107 str r1, [sp, #28] - 8040bc0: 9104 str r1, [sp, #16] - 8040bc2: 4909 ldr r1, [pc, #36] ; (8040be8 ) - 8040bc4: f853 2b04 ldr.w r2, [r3], #4 - 8040bc8: 9105 str r1, [sp, #20] - 8040bca: 6800 ldr r0, [r0, #0] - 8040bcc: 9301 str r3, [sp, #4] - 8040bce: a902 add r1, sp, #8 - 8040bd0: f000 f9c2 bl 8040f58 <_svfiprintf_r> - 8040bd4: 9b02 ldr r3, [sp, #8] - 8040bd6: 2200 movs r2, #0 - 8040bd8: 701a strb r2, [r3, #0] - 8040bda: b01c add sp, #112 ; 0x70 - 8040bdc: f85d eb04 ldr.w lr, [sp], #4 - 8040be0: b003 add sp, #12 - 8040be2: 4770 bx lr - 8040be4: 24000078 .word 0x24000078 - 8040be8: ffff0208 .word 0xffff0208 - -08040bec <_vsiprintf_r>: - 8040bec: b500 push {lr} - 8040bee: b09b sub sp, #108 ; 0x6c - 8040bf0: 9100 str r1, [sp, #0] - 8040bf2: 9104 str r1, [sp, #16] - 8040bf4: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 + 8040a9a: f7ff ffa5 bl 80409e8 + 8040a9e: 3001 adds r0, #1 + 8040aa0: d02b beq.n 8040afa <_malloc_r+0xd2> + 8040aa2: 6823 ldr r3, [r4, #0] + 8040aa4: 442b add r3, r5 + 8040aa6: 6023 str r3, [r4, #0] + 8040aa8: e00e b.n 8040ac8 <_malloc_r+0xa0> + 8040aaa: 6822 ldr r2, [r4, #0] + 8040aac: 1b52 subs r2, r2, r5 + 8040aae: d41e bmi.n 8040aee <_malloc_r+0xc6> + 8040ab0: 2a0b cmp r2, #11 + 8040ab2: d916 bls.n 8040ae2 <_malloc_r+0xba> + 8040ab4: 1961 adds r1, r4, r5 + 8040ab6: 42a3 cmp r3, r4 + 8040ab8: 6025 str r5, [r4, #0] + 8040aba: bf18 it ne + 8040abc: 6059 strne r1, [r3, #4] + 8040abe: 6863 ldr r3, [r4, #4] + 8040ac0: bf08 it eq + 8040ac2: 6031 streq r1, [r6, #0] + 8040ac4: 5162 str r2, [r4, r5] + 8040ac6: 604b str r3, [r1, #4] + 8040ac8: 4638 mov r0, r7 + 8040aca: f104 060b add.w r6, r4, #11 + 8040ace: f000 f9f9 bl 8040ec4 <__malloc_unlock> + 8040ad2: f026 0607 bic.w r6, r6, #7 + 8040ad6: 1d23 adds r3, r4, #4 + 8040ad8: 1af2 subs r2, r6, r3 + 8040ada: d0b6 beq.n 8040a4a <_malloc_r+0x22> + 8040adc: 1b9b subs r3, r3, r6 + 8040ade: 50a3 str r3, [r4, r2] + 8040ae0: e7b3 b.n 8040a4a <_malloc_r+0x22> + 8040ae2: 6862 ldr r2, [r4, #4] + 8040ae4: 42a3 cmp r3, r4 + 8040ae6: bf0c ite eq + 8040ae8: 6032 streq r2, [r6, #0] + 8040aea: 605a strne r2, [r3, #4] + 8040aec: e7ec b.n 8040ac8 <_malloc_r+0xa0> + 8040aee: 4623 mov r3, r4 + 8040af0: 6864 ldr r4, [r4, #4] + 8040af2: e7b2 b.n 8040a5a <_malloc_r+0x32> + 8040af4: 4634 mov r4, r6 + 8040af6: 6876 ldr r6, [r6, #4] + 8040af8: e7b9 b.n 8040a6e <_malloc_r+0x46> + 8040afa: 230c movs r3, #12 + 8040afc: 603b str r3, [r7, #0] + 8040afe: 4638 mov r0, r7 + 8040b00: f000 f9e0 bl 8040ec4 <__malloc_unlock> + 8040b04: e7a1 b.n 8040a4a <_malloc_r+0x22> + 8040b06: 6025 str r5, [r4, #0] + 8040b08: e7de b.n 8040ac8 <_malloc_r+0xa0> + 8040b0a: bf00 nop + 8040b0c: 2400eab4 .word 0x2400eab4 + +08040b10 : + 8040b10: b40f push {r0, r1, r2, r3} + 8040b12: 4b0a ldr r3, [pc, #40] ; (8040b3c ) + 8040b14: b513 push {r0, r1, r4, lr} + 8040b16: 681c ldr r4, [r3, #0] + 8040b18: b124 cbz r4, 8040b24 + 8040b1a: 69a3 ldr r3, [r4, #24] + 8040b1c: b913 cbnz r3, 8040b24 + 8040b1e: 4620 mov r0, r4 + 8040b20: f000 f918 bl 8040d54 <__sinit> + 8040b24: ab05 add r3, sp, #20 + 8040b26: 9a04 ldr r2, [sp, #16] + 8040b28: 68a1 ldr r1, [r4, #8] + 8040b2a: 9301 str r3, [sp, #4] + 8040b2c: 4620 mov r0, r4 + 8040b2e: f000 fb55 bl 80411dc <_vfiprintf_r> + 8040b32: b002 add sp, #8 + 8040b34: e8bd 4010 ldmia.w sp!, {r4, lr} + 8040b38: b004 add sp, #16 + 8040b3a: 4770 bx lr + 8040b3c: 24000078 .word 0x24000078 + +08040b40 : + 8040b40: 4b16 ldr r3, [pc, #88] ; (8040b9c ) + 8040b42: b510 push {r4, lr} + 8040b44: 681c ldr r4, [r3, #0] + 8040b46: 6ba3 ldr r3, [r4, #56] ; 0x38 + 8040b48: b9b3 cbnz r3, 8040b78 + 8040b4a: 2018 movs r0, #24 + 8040b4c: f7ff feb0 bl 80408b0 + 8040b50: 63a0 str r0, [r4, #56] ; 0x38 + 8040b52: b928 cbnz r0, 8040b60 + 8040b54: 4602 mov r2, r0 + 8040b56: 4b12 ldr r3, [pc, #72] ; (8040ba0 ) + 8040b58: 4812 ldr r0, [pc, #72] ; (8040ba4 ) + 8040b5a: 214e movs r1, #78 ; 0x4e + 8040b5c: f000 f87e bl 8040c5c <__assert_func> + 8040b60: 4a11 ldr r2, [pc, #68] ; (8040ba8 ) + 8040b62: 4b12 ldr r3, [pc, #72] ; (8040bac ) + 8040b64: e9c0 2300 strd r2, r3, [r0] + 8040b68: 4b11 ldr r3, [pc, #68] ; (8040bb0 ) + 8040b6a: 6083 str r3, [r0, #8] + 8040b6c: 230b movs r3, #11 + 8040b6e: 8183 strh r3, [r0, #12] + 8040b70: 2201 movs r2, #1 + 8040b72: 2300 movs r3, #0 + 8040b74: e9c0 2304 strd r2, r3, [r0, #16] + 8040b78: 6ba4 ldr r4, [r4, #56] ; 0x38 + 8040b7a: 4a0e ldr r2, [pc, #56] ; (8040bb4 ) + 8040b7c: 6920 ldr r0, [r4, #16] + 8040b7e: 6963 ldr r3, [r4, #20] + 8040b80: 490d ldr r1, [pc, #52] ; (8040bb8 ) + 8040b82: 4342 muls r2, r0 + 8040b84: fb01 2203 mla r2, r1, r3, r2 + 8040b88: fba0 0101 umull r0, r1, r0, r1 + 8040b8c: 1c43 adds r3, r0, #1 + 8040b8e: eb42 0001 adc.w r0, r2, r1 + 8040b92: e9c4 3004 strd r3, r0, [r4, #16] + 8040b96: f020 4000 bic.w r0, r0, #2147483648 ; 0x80000000 + 8040b9a: bd10 pop {r4, pc} + 8040b9c: 24000078 .word 0x24000078 + 8040ba0: 08044e18 .word 0x08044e18 + 8040ba4: 08044e2f .word 0x08044e2f + 8040ba8: abcd330e .word 0xabcd330e + 8040bac: e66d1234 .word 0xe66d1234 + 8040bb0: 0005deec .word 0x0005deec + 8040bb4: 5851f42d .word 0x5851f42d + 8040bb8: 4c957f2d .word 0x4c957f2d + +08040bbc <_sbrk_r>: + 8040bbc: b538 push {r3, r4, r5, lr} + 8040bbe: 4d06 ldr r5, [pc, #24] ; (8040bd8 <_sbrk_r+0x1c>) + 8040bc0: 2300 movs r3, #0 + 8040bc2: 4604 mov r4, r0 + 8040bc4: 4608 mov r0, r1 + 8040bc6: 602b str r3, [r5, #0] + 8040bc8: f7e3 fe64 bl 8024894 <_sbrk> + 8040bcc: 1c43 adds r3, r0, #1 + 8040bce: d102 bne.n 8040bd6 <_sbrk_r+0x1a> + 8040bd0: 682b ldr r3, [r5, #0] + 8040bd2: b103 cbz r3, 8040bd6 <_sbrk_r+0x1a> + 8040bd4: 6023 str r3, [r4, #0] + 8040bd6: bd38 pop {r3, r4, r5, pc} + 8040bd8: 2400eabc .word 0x2400eabc + +08040bdc : + 8040bdc: b40e push {r1, r2, r3} + 8040bde: b500 push {lr} + 8040be0: b09c sub sp, #112 ; 0x70 + 8040be2: ab1d add r3, sp, #116 ; 0x74 + 8040be4: 9002 str r0, [sp, #8] + 8040be6: 9006 str r0, [sp, #24] + 8040be8: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 + 8040bec: 4809 ldr r0, [pc, #36] ; (8040c14 ) + 8040bee: 9107 str r1, [sp, #28] + 8040bf0: 9104 str r1, [sp, #16] + 8040bf2: 4909 ldr r1, [pc, #36] ; (8040c18 ) + 8040bf4: f853 2b04 ldr.w r2, [r3], #4 8040bf8: 9105 str r1, [sp, #20] - 8040bfa: 9102 str r1, [sp, #8] - 8040bfc: 4905 ldr r1, [pc, #20] ; (8040c14 <_vsiprintf_r+0x28>) - 8040bfe: 9103 str r1, [sp, #12] - 8040c00: 4669 mov r1, sp - 8040c02: f000 f9a9 bl 8040f58 <_svfiprintf_r> - 8040c06: 9b00 ldr r3, [sp, #0] - 8040c08: 2200 movs r2, #0 - 8040c0a: 701a strb r2, [r3, #0] - 8040c0c: b01b add sp, #108 ; 0x6c - 8040c0e: f85d fb04 ldr.w pc, [sp], #4 - 8040c12: bf00 nop - 8040c14: ffff0208 .word 0xffff0208 - -08040c18 : - 8040c18: 4613 mov r3, r2 - 8040c1a: 460a mov r2, r1 - 8040c1c: 4601 mov r1, r0 - 8040c1e: 4802 ldr r0, [pc, #8] ; (8040c28 ) - 8040c20: 6800 ldr r0, [r0, #0] - 8040c22: f7ff bfe3 b.w 8040bec <_vsiprintf_r> - 8040c26: bf00 nop - 8040c28: 24000078 .word 0x24000078 - -08040c2c <__assert_func>: - 8040c2c: b51f push {r0, r1, r2, r3, r4, lr} - 8040c2e: 4614 mov r4, r2 - 8040c30: 461a mov r2, r3 - 8040c32: 4b09 ldr r3, [pc, #36] ; (8040c58 <__assert_func+0x2c>) - 8040c34: 681b ldr r3, [r3, #0] - 8040c36: 4605 mov r5, r0 - 8040c38: 68d8 ldr r0, [r3, #12] - 8040c3a: b14c cbz r4, 8040c50 <__assert_func+0x24> - 8040c3c: 4b07 ldr r3, [pc, #28] ; (8040c5c <__assert_func+0x30>) - 8040c3e: 9100 str r1, [sp, #0] - 8040c40: e9cd 3401 strd r3, r4, [sp, #4] - 8040c44: 4906 ldr r1, [pc, #24] ; (8040c60 <__assert_func+0x34>) - 8040c46: 462b mov r3, r5 - 8040c48: f000 f8ea bl 8040e20 - 8040c4c: f000 fe88 bl 8041960 - 8040c50: 4b04 ldr r3, [pc, #16] ; (8040c64 <__assert_func+0x38>) - 8040c52: 461c mov r4, r3 - 8040c54: e7f3 b.n 8040c3e <__assert_func+0x12> + 8040bfa: 6800 ldr r0, [r0, #0] + 8040bfc: 9301 str r3, [sp, #4] + 8040bfe: a902 add r1, sp, #8 + 8040c00: f000 f9c2 bl 8040f88 <_svfiprintf_r> + 8040c04: 9b02 ldr r3, [sp, #8] + 8040c06: 2200 movs r2, #0 + 8040c08: 701a strb r2, [r3, #0] + 8040c0a: b01c add sp, #112 ; 0x70 + 8040c0c: f85d eb04 ldr.w lr, [sp], #4 + 8040c10: b003 add sp, #12 + 8040c12: 4770 bx lr + 8040c14: 24000078 .word 0x24000078 + 8040c18: ffff0208 .word 0xffff0208 + +08040c1c <_vsiprintf_r>: + 8040c1c: b500 push {lr} + 8040c1e: b09b sub sp, #108 ; 0x6c + 8040c20: 9100 str r1, [sp, #0] + 8040c22: 9104 str r1, [sp, #16] + 8040c24: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 + 8040c28: 9105 str r1, [sp, #20] + 8040c2a: 9102 str r1, [sp, #8] + 8040c2c: 4905 ldr r1, [pc, #20] ; (8040c44 <_vsiprintf_r+0x28>) + 8040c2e: 9103 str r1, [sp, #12] + 8040c30: 4669 mov r1, sp + 8040c32: f000 f9a9 bl 8040f88 <_svfiprintf_r> + 8040c36: 9b00 ldr r3, [sp, #0] + 8040c38: 2200 movs r2, #0 + 8040c3a: 701a strb r2, [r3, #0] + 8040c3c: b01b add sp, #108 ; 0x6c + 8040c3e: f85d fb04 ldr.w pc, [sp], #4 + 8040c42: bf00 nop + 8040c44: ffff0208 .word 0xffff0208 + +08040c48 : + 8040c48: 4613 mov r3, r2 + 8040c4a: 460a mov r2, r1 + 8040c4c: 4601 mov r1, r0 + 8040c4e: 4802 ldr r0, [pc, #8] ; (8040c58 ) + 8040c50: 6800 ldr r0, [r0, #0] + 8040c52: f7ff bfe3 b.w 8040c1c <_vsiprintf_r> 8040c56: bf00 nop 8040c58: 24000078 .word 0x24000078 - 8040c5c: 08044e5a .word 0x08044e5a - 8040c60: 08044e67 .word 0x08044e67 - 8040c64: 08044e95 .word 0x08044e95 - -08040c68 <__errno>: - 8040c68: 4b01 ldr r3, [pc, #4] ; (8040c70 <__errno+0x8>) - 8040c6a: 6818 ldr r0, [r3, #0] - 8040c6c: 4770 bx lr - 8040c6e: bf00 nop - 8040c70: 24000078 .word 0x24000078 - -08040c74 : - 8040c74: 2300 movs r3, #0 - 8040c76: b510 push {r4, lr} - 8040c78: 4604 mov r4, r0 - 8040c7a: e9c0 3300 strd r3, r3, [r0] - 8040c7e: e9c0 3304 strd r3, r3, [r0, #16] - 8040c82: 6083 str r3, [r0, #8] - 8040c84: 8181 strh r1, [r0, #12] - 8040c86: 6643 str r3, [r0, #100] ; 0x64 - 8040c88: 81c2 strh r2, [r0, #14] - 8040c8a: 6183 str r3, [r0, #24] - 8040c8c: 4619 mov r1, r3 - 8040c8e: 2208 movs r2, #8 - 8040c90: 305c adds r0, #92 ; 0x5c - 8040c92: f7ff fe3d bl 8040910 - 8040c96: 4b05 ldr r3, [pc, #20] ; (8040cac ) - 8040c98: 6263 str r3, [r4, #36] ; 0x24 - 8040c9a: 4b05 ldr r3, [pc, #20] ; (8040cb0 ) - 8040c9c: 62a3 str r3, [r4, #40] ; 0x28 - 8040c9e: 4b05 ldr r3, [pc, #20] ; (8040cb4 ) - 8040ca0: 62e3 str r3, [r4, #44] ; 0x2c - 8040ca2: 4b05 ldr r3, [pc, #20] ; (8040cb8 ) - 8040ca4: 6224 str r4, [r4, #32] - 8040ca6: 6323 str r3, [r4, #48] ; 0x30 - 8040ca8: bd10 pop {r4, pc} - 8040caa: bf00 nop - 8040cac: 08041735 .word 0x08041735 - 8040cb0: 08041757 .word 0x08041757 - 8040cb4: 0804178f .word 0x0804178f - 8040cb8: 080417b3 .word 0x080417b3 - -08040cbc <_cleanup_r>: - 8040cbc: 4901 ldr r1, [pc, #4] ; (8040cc4 <_cleanup_r+0x8>) - 8040cbe: f000 b8c1 b.w 8040e44 <_fwalk_reent> - 8040cc2: bf00 nop - 8040cc4: 08041a9d .word 0x08041a9d - -08040cc8 <__sfmoreglue>: - 8040cc8: b570 push {r4, r5, r6, lr} - 8040cca: 2268 movs r2, #104 ; 0x68 - 8040ccc: 1e4d subs r5, r1, #1 - 8040cce: 4355 muls r5, r2 - 8040cd0: 460e mov r6, r1 - 8040cd2: f105 0174 add.w r1, r5, #116 ; 0x74 - 8040cd6: f7ff fe8f bl 80409f8 <_malloc_r> - 8040cda: 4604 mov r4, r0 - 8040cdc: b140 cbz r0, 8040cf0 <__sfmoreglue+0x28> - 8040cde: 2100 movs r1, #0 - 8040ce0: e9c0 1600 strd r1, r6, [r0] - 8040ce4: 300c adds r0, #12 - 8040ce6: 60a0 str r0, [r4, #8] - 8040ce8: f105 0268 add.w r2, r5, #104 ; 0x68 - 8040cec: f7ff fe10 bl 8040910 - 8040cf0: 4620 mov r0, r4 - 8040cf2: bd70 pop {r4, r5, r6, pc} - -08040cf4 <__sfp_lock_acquire>: - 8040cf4: 4801 ldr r0, [pc, #4] ; (8040cfc <__sfp_lock_acquire+0x8>) - 8040cf6: f000 b8c5 b.w 8040e84 <__retarget_lock_acquire_recursive> - 8040cfa: bf00 nop - 8040cfc: 2400eac1 .word 0x2400eac1 - -08040d00 <__sfp_lock_release>: - 8040d00: 4801 ldr r0, [pc, #4] ; (8040d08 <__sfp_lock_release+0x8>) - 8040d02: f000 b8c0 b.w 8040e86 <__retarget_lock_release_recursive> - 8040d06: bf00 nop - 8040d08: 2400eac1 .word 0x2400eac1 - -08040d0c <__sinit_lock_acquire>: - 8040d0c: 4801 ldr r0, [pc, #4] ; (8040d14 <__sinit_lock_acquire+0x8>) - 8040d0e: f000 b8b9 b.w 8040e84 <__retarget_lock_acquire_recursive> - 8040d12: bf00 nop - 8040d14: 2400eac2 .word 0x2400eac2 - -08040d18 <__sinit_lock_release>: - 8040d18: 4801 ldr r0, [pc, #4] ; (8040d20 <__sinit_lock_release+0x8>) - 8040d1a: f000 b8b4 b.w 8040e86 <__retarget_lock_release_recursive> - 8040d1e: bf00 nop - 8040d20: 2400eac2 .word 0x2400eac2 - -08040d24 <__sinit>: - 8040d24: b510 push {r4, lr} - 8040d26: 4604 mov r4, r0 - 8040d28: f7ff fff0 bl 8040d0c <__sinit_lock_acquire> - 8040d2c: 69a3 ldr r3, [r4, #24] - 8040d2e: b11b cbz r3, 8040d38 <__sinit+0x14> - 8040d30: e8bd 4010 ldmia.w sp!, {r4, lr} - 8040d34: f7ff bff0 b.w 8040d18 <__sinit_lock_release> - 8040d38: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 - 8040d3c: 6523 str r3, [r4, #80] ; 0x50 - 8040d3e: 4b13 ldr r3, [pc, #76] ; (8040d8c <__sinit+0x68>) - 8040d40: 4a13 ldr r2, [pc, #76] ; (8040d90 <__sinit+0x6c>) - 8040d42: 681b ldr r3, [r3, #0] - 8040d44: 62a2 str r2, [r4, #40] ; 0x28 - 8040d46: 42a3 cmp r3, r4 - 8040d48: bf04 itt eq - 8040d4a: 2301 moveq r3, #1 - 8040d4c: 61a3 streq r3, [r4, #24] - 8040d4e: 4620 mov r0, r4 - 8040d50: f000 f820 bl 8040d94 <__sfp> - 8040d54: 6060 str r0, [r4, #4] - 8040d56: 4620 mov r0, r4 - 8040d58: f000 f81c bl 8040d94 <__sfp> - 8040d5c: 60a0 str r0, [r4, #8] - 8040d5e: 4620 mov r0, r4 - 8040d60: f000 f818 bl 8040d94 <__sfp> - 8040d64: 2200 movs r2, #0 - 8040d66: 60e0 str r0, [r4, #12] - 8040d68: 2104 movs r1, #4 - 8040d6a: 6860 ldr r0, [r4, #4] - 8040d6c: f7ff ff82 bl 8040c74 - 8040d70: 68a0 ldr r0, [r4, #8] - 8040d72: 2201 movs r2, #1 - 8040d74: 2109 movs r1, #9 - 8040d76: f7ff ff7d bl 8040c74 - 8040d7a: 68e0 ldr r0, [r4, #12] - 8040d7c: 2202 movs r2, #2 - 8040d7e: 2112 movs r1, #18 - 8040d80: f7ff ff78 bl 8040c74 - 8040d84: 2301 movs r3, #1 - 8040d86: 61a3 str r3, [r4, #24] - 8040d88: e7d2 b.n 8040d30 <__sinit+0xc> - 8040d8a: bf00 nop - 8040d8c: 08044de4 .word 0x08044de4 - 8040d90: 08040cbd .word 0x08040cbd - -08040d94 <__sfp>: - 8040d94: b5f8 push {r3, r4, r5, r6, r7, lr} - 8040d96: 4607 mov r7, r0 - 8040d98: f7ff ffac bl 8040cf4 <__sfp_lock_acquire> - 8040d9c: 4b1e ldr r3, [pc, #120] ; (8040e18 <__sfp+0x84>) - 8040d9e: 681e ldr r6, [r3, #0] - 8040da0: 69b3 ldr r3, [r6, #24] - 8040da2: b913 cbnz r3, 8040daa <__sfp+0x16> - 8040da4: 4630 mov r0, r6 - 8040da6: f7ff ffbd bl 8040d24 <__sinit> - 8040daa: 3648 adds r6, #72 ; 0x48 - 8040dac: e9d6 3401 ldrd r3, r4, [r6, #4] - 8040db0: 3b01 subs r3, #1 - 8040db2: d503 bpl.n 8040dbc <__sfp+0x28> - 8040db4: 6833 ldr r3, [r6, #0] - 8040db6: b30b cbz r3, 8040dfc <__sfp+0x68> - 8040db8: 6836 ldr r6, [r6, #0] - 8040dba: e7f7 b.n 8040dac <__sfp+0x18> - 8040dbc: f9b4 500c ldrsh.w r5, [r4, #12] - 8040dc0: b9d5 cbnz r5, 8040df8 <__sfp+0x64> - 8040dc2: 4b16 ldr r3, [pc, #88] ; (8040e1c <__sfp+0x88>) - 8040dc4: 60e3 str r3, [r4, #12] - 8040dc6: f104 0058 add.w r0, r4, #88 ; 0x58 - 8040dca: 6665 str r5, [r4, #100] ; 0x64 - 8040dcc: f000 f859 bl 8040e82 <__retarget_lock_init_recursive> - 8040dd0: f7ff ff96 bl 8040d00 <__sfp_lock_release> - 8040dd4: e9c4 5501 strd r5, r5, [r4, #4] - 8040dd8: e9c4 5504 strd r5, r5, [r4, #16] - 8040ddc: 6025 str r5, [r4, #0] - 8040dde: 61a5 str r5, [r4, #24] - 8040de0: 2208 movs r2, #8 - 8040de2: 4629 mov r1, r5 - 8040de4: f104 005c add.w r0, r4, #92 ; 0x5c - 8040de8: f7ff fd92 bl 8040910 - 8040dec: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 - 8040df0: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 - 8040df4: 4620 mov r0, r4 - 8040df6: bdf8 pop {r3, r4, r5, r6, r7, pc} - 8040df8: 3468 adds r4, #104 ; 0x68 - 8040dfa: e7d9 b.n 8040db0 <__sfp+0x1c> - 8040dfc: 2104 movs r1, #4 - 8040dfe: 4638 mov r0, r7 - 8040e00: f7ff ff62 bl 8040cc8 <__sfmoreglue> - 8040e04: 4604 mov r4, r0 - 8040e06: 6030 str r0, [r6, #0] - 8040e08: 2800 cmp r0, #0 - 8040e0a: d1d5 bne.n 8040db8 <__sfp+0x24> - 8040e0c: f7ff ff78 bl 8040d00 <__sfp_lock_release> - 8040e10: 230c movs r3, #12 - 8040e12: 603b str r3, [r7, #0] - 8040e14: e7ee b.n 8040df4 <__sfp+0x60> - 8040e16: bf00 nop - 8040e18: 08044de4 .word 0x08044de4 - 8040e1c: ffff0001 .word 0xffff0001 - -08040e20 : - 8040e20: b40e push {r1, r2, r3} - 8040e22: b503 push {r0, r1, lr} - 8040e24: 4601 mov r1, r0 - 8040e26: ab03 add r3, sp, #12 - 8040e28: 4805 ldr r0, [pc, #20] ; (8040e40 ) - 8040e2a: f853 2b04 ldr.w r2, [r3], #4 - 8040e2e: 6800 ldr r0, [r0, #0] - 8040e30: 9301 str r3, [sp, #4] - 8040e32: f000 f9bb bl 80411ac <_vfiprintf_r> - 8040e36: b002 add sp, #8 - 8040e38: f85d eb04 ldr.w lr, [sp], #4 - 8040e3c: b003 add sp, #12 - 8040e3e: 4770 bx lr - 8040e40: 24000078 .word 0x24000078 - -08040e44 <_fwalk_reent>: - 8040e44: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} - 8040e48: 4606 mov r6, r0 - 8040e4a: 4688 mov r8, r1 - 8040e4c: f100 0448 add.w r4, r0, #72 ; 0x48 - 8040e50: 2700 movs r7, #0 - 8040e52: e9d4 9501 ldrd r9, r5, [r4, #4] - 8040e56: f1b9 0901 subs.w r9, r9, #1 - 8040e5a: d505 bpl.n 8040e68 <_fwalk_reent+0x24> - 8040e5c: 6824 ldr r4, [r4, #0] - 8040e5e: 2c00 cmp r4, #0 - 8040e60: d1f7 bne.n 8040e52 <_fwalk_reent+0xe> - 8040e62: 4638 mov r0, r7 - 8040e64: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} - 8040e68: 89ab ldrh r3, [r5, #12] - 8040e6a: 2b01 cmp r3, #1 - 8040e6c: d907 bls.n 8040e7e <_fwalk_reent+0x3a> - 8040e6e: f9b5 300e ldrsh.w r3, [r5, #14] - 8040e72: 3301 adds r3, #1 - 8040e74: d003 beq.n 8040e7e <_fwalk_reent+0x3a> - 8040e76: 4629 mov r1, r5 - 8040e78: 4630 mov r0, r6 - 8040e7a: 47c0 blx r8 - 8040e7c: 4307 orrs r7, r0 - 8040e7e: 3568 adds r5, #104 ; 0x68 - 8040e80: e7e9 b.n 8040e56 <_fwalk_reent+0x12> - -08040e82 <__retarget_lock_init_recursive>: - 8040e82: 4770 bx lr - -08040e84 <__retarget_lock_acquire_recursive>: - 8040e84: 4770 bx lr - -08040e86 <__retarget_lock_release_recursive>: - 8040e86: 4770 bx lr - -08040e88 <__malloc_lock>: - 8040e88: 4801 ldr r0, [pc, #4] ; (8040e90 <__malloc_lock+0x8>) - 8040e8a: f7ff bffb b.w 8040e84 <__retarget_lock_acquire_recursive> - 8040e8e: bf00 nop - 8040e90: 2400eac0 .word 0x2400eac0 - -08040e94 <__malloc_unlock>: - 8040e94: 4801 ldr r0, [pc, #4] ; (8040e9c <__malloc_unlock+0x8>) - 8040e96: f7ff bff6 b.w 8040e86 <__retarget_lock_release_recursive> - 8040e9a: bf00 nop - 8040e9c: 2400eac0 .word 0x2400eac0 - -08040ea0 <__ssputs_r>: - 8040ea0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} - 8040ea4: 688e ldr r6, [r1, #8] - 8040ea6: 429e cmp r6, r3 - 8040ea8: 4682 mov sl, r0 - 8040eaa: 460c mov r4, r1 - 8040eac: 4690 mov r8, r2 - 8040eae: 461f mov r7, r3 - 8040eb0: d838 bhi.n 8040f24 <__ssputs_r+0x84> - 8040eb2: 898a ldrh r2, [r1, #12] - 8040eb4: f412 6f90 tst.w r2, #1152 ; 0x480 - 8040eb8: d032 beq.n 8040f20 <__ssputs_r+0x80> - 8040eba: 6825 ldr r5, [r4, #0] - 8040ebc: 6909 ldr r1, [r1, #16] - 8040ebe: eba5 0901 sub.w r9, r5, r1 - 8040ec2: 6965 ldr r5, [r4, #20] - 8040ec4: eb05 0545 add.w r5, r5, r5, lsl #1 - 8040ec8: eb05 75d5 add.w r5, r5, r5, lsr #31 - 8040ecc: 3301 adds r3, #1 - 8040ece: 444b add r3, r9 - 8040ed0: 106d asrs r5, r5, #1 - 8040ed2: 429d cmp r5, r3 - 8040ed4: bf38 it cc - 8040ed6: 461d movcc r5, r3 - 8040ed8: 0553 lsls r3, r2, #21 - 8040eda: d531 bpl.n 8040f40 <__ssputs_r+0xa0> - 8040edc: 4629 mov r1, r5 - 8040ede: f7ff fd8b bl 80409f8 <_malloc_r> - 8040ee2: 4606 mov r6, r0 - 8040ee4: b950 cbnz r0, 8040efc <__ssputs_r+0x5c> - 8040ee6: 230c movs r3, #12 - 8040ee8: f8ca 3000 str.w r3, [sl] - 8040eec: 89a3 ldrh r3, [r4, #12] - 8040eee: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8040ef2: 81a3 strh r3, [r4, #12] - 8040ef4: f04f 30ff mov.w r0, #4294967295 - 8040ef8: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 8040efc: 6921 ldr r1, [r4, #16] - 8040efe: 464a mov r2, r9 - 8040f00: f7ff fcde bl 80408c0 - 8040f04: 89a3 ldrh r3, [r4, #12] - 8040f06: f423 6390 bic.w r3, r3, #1152 ; 0x480 - 8040f0a: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8040f0e: 81a3 strh r3, [r4, #12] - 8040f10: 6126 str r6, [r4, #16] - 8040f12: 6165 str r5, [r4, #20] - 8040f14: 444e add r6, r9 - 8040f16: eba5 0509 sub.w r5, r5, r9 - 8040f1a: 6026 str r6, [r4, #0] - 8040f1c: 60a5 str r5, [r4, #8] - 8040f1e: 463e mov r6, r7 - 8040f20: 42be cmp r6, r7 - 8040f22: d900 bls.n 8040f26 <__ssputs_r+0x86> - 8040f24: 463e mov r6, r7 - 8040f26: 6820 ldr r0, [r4, #0] - 8040f28: 4632 mov r2, r6 - 8040f2a: 4641 mov r1, r8 - 8040f2c: f7ff fcd6 bl 80408dc - 8040f30: 68a3 ldr r3, [r4, #8] - 8040f32: 1b9b subs r3, r3, r6 - 8040f34: 60a3 str r3, [r4, #8] - 8040f36: 6823 ldr r3, [r4, #0] - 8040f38: 4433 add r3, r6 - 8040f3a: 6023 str r3, [r4, #0] - 8040f3c: 2000 movs r0, #0 - 8040f3e: e7db b.n 8040ef8 <__ssputs_r+0x58> - 8040f40: 462a mov r2, r5 - 8040f42: f000 fe5f bl 8041c04 <_realloc_r> - 8040f46: 4606 mov r6, r0 - 8040f48: 2800 cmp r0, #0 - 8040f4a: d1e1 bne.n 8040f10 <__ssputs_r+0x70> - 8040f4c: 6921 ldr r1, [r4, #16] - 8040f4e: 4650 mov r0, sl - 8040f50: f7ff fce6 bl 8040920 <_free_r> - 8040f54: e7c7 b.n 8040ee6 <__ssputs_r+0x46> + +08040c5c <__assert_func>: + 8040c5c: b51f push {r0, r1, r2, r3, r4, lr} + 8040c5e: 4614 mov r4, r2 + 8040c60: 461a mov r2, r3 + 8040c62: 4b09 ldr r3, [pc, #36] ; (8040c88 <__assert_func+0x2c>) + 8040c64: 681b ldr r3, [r3, #0] + 8040c66: 4605 mov r5, r0 + 8040c68: 68d8 ldr r0, [r3, #12] + 8040c6a: b14c cbz r4, 8040c80 <__assert_func+0x24> + 8040c6c: 4b07 ldr r3, [pc, #28] ; (8040c8c <__assert_func+0x30>) + 8040c6e: 9100 str r1, [sp, #0] + 8040c70: e9cd 3401 strd r3, r4, [sp, #4] + 8040c74: 4906 ldr r1, [pc, #24] ; (8040c90 <__assert_func+0x34>) + 8040c76: 462b mov r3, r5 + 8040c78: f000 f8ea bl 8040e50 + 8040c7c: f000 fe88 bl 8041990 + 8040c80: 4b04 ldr r3, [pc, #16] ; (8040c94 <__assert_func+0x38>) + 8040c82: 461c mov r4, r3 + 8040c84: e7f3 b.n 8040c6e <__assert_func+0x12> + 8040c86: bf00 nop + 8040c88: 24000078 .word 0x24000078 + 8040c8c: 08044e8a .word 0x08044e8a + 8040c90: 08044e97 .word 0x08044e97 + 8040c94: 08044ec5 .word 0x08044ec5 + +08040c98 <__errno>: + 8040c98: 4b01 ldr r3, [pc, #4] ; (8040ca0 <__errno+0x8>) + 8040c9a: 6818 ldr r0, [r3, #0] + 8040c9c: 4770 bx lr + 8040c9e: bf00 nop + 8040ca0: 24000078 .word 0x24000078 + +08040ca4 : + 8040ca4: 2300 movs r3, #0 + 8040ca6: b510 push {r4, lr} + 8040ca8: 4604 mov r4, r0 + 8040caa: e9c0 3300 strd r3, r3, [r0] + 8040cae: e9c0 3304 strd r3, r3, [r0, #16] + 8040cb2: 6083 str r3, [r0, #8] + 8040cb4: 8181 strh r1, [r0, #12] + 8040cb6: 6643 str r3, [r0, #100] ; 0x64 + 8040cb8: 81c2 strh r2, [r0, #14] + 8040cba: 6183 str r3, [r0, #24] + 8040cbc: 4619 mov r1, r3 + 8040cbe: 2208 movs r2, #8 + 8040cc0: 305c adds r0, #92 ; 0x5c + 8040cc2: f7ff fe3d bl 8040940 + 8040cc6: 4b05 ldr r3, [pc, #20] ; (8040cdc ) + 8040cc8: 6263 str r3, [r4, #36] ; 0x24 + 8040cca: 4b05 ldr r3, [pc, #20] ; (8040ce0 ) + 8040ccc: 62a3 str r3, [r4, #40] ; 0x28 + 8040cce: 4b05 ldr r3, [pc, #20] ; (8040ce4 ) + 8040cd0: 62e3 str r3, [r4, #44] ; 0x2c + 8040cd2: 4b05 ldr r3, [pc, #20] ; (8040ce8 ) + 8040cd4: 6224 str r4, [r4, #32] + 8040cd6: 6323 str r3, [r4, #48] ; 0x30 + 8040cd8: bd10 pop {r4, pc} + 8040cda: bf00 nop + 8040cdc: 08041765 .word 0x08041765 + 8040ce0: 08041787 .word 0x08041787 + 8040ce4: 080417bf .word 0x080417bf + 8040ce8: 080417e3 .word 0x080417e3 + +08040cec <_cleanup_r>: + 8040cec: 4901 ldr r1, [pc, #4] ; (8040cf4 <_cleanup_r+0x8>) + 8040cee: f000 b8c1 b.w 8040e74 <_fwalk_reent> + 8040cf2: bf00 nop + 8040cf4: 08041acd .word 0x08041acd + +08040cf8 <__sfmoreglue>: + 8040cf8: b570 push {r4, r5, r6, lr} + 8040cfa: 2268 movs r2, #104 ; 0x68 + 8040cfc: 1e4d subs r5, r1, #1 + 8040cfe: 4355 muls r5, r2 + 8040d00: 460e mov r6, r1 + 8040d02: f105 0174 add.w r1, r5, #116 ; 0x74 + 8040d06: f7ff fe8f bl 8040a28 <_malloc_r> + 8040d0a: 4604 mov r4, r0 + 8040d0c: b140 cbz r0, 8040d20 <__sfmoreglue+0x28> + 8040d0e: 2100 movs r1, #0 + 8040d10: e9c0 1600 strd r1, r6, [r0] + 8040d14: 300c adds r0, #12 + 8040d16: 60a0 str r0, [r4, #8] + 8040d18: f105 0268 add.w r2, r5, #104 ; 0x68 + 8040d1c: f7ff fe10 bl 8040940 + 8040d20: 4620 mov r0, r4 + 8040d22: bd70 pop {r4, r5, r6, pc} + +08040d24 <__sfp_lock_acquire>: + 8040d24: 4801 ldr r0, [pc, #4] ; (8040d2c <__sfp_lock_acquire+0x8>) + 8040d26: f000 b8c5 b.w 8040eb4 <__retarget_lock_acquire_recursive> + 8040d2a: bf00 nop + 8040d2c: 2400eac1 .word 0x2400eac1 + +08040d30 <__sfp_lock_release>: + 8040d30: 4801 ldr r0, [pc, #4] ; (8040d38 <__sfp_lock_release+0x8>) + 8040d32: f000 b8c0 b.w 8040eb6 <__retarget_lock_release_recursive> + 8040d36: bf00 nop + 8040d38: 2400eac1 .word 0x2400eac1 + +08040d3c <__sinit_lock_acquire>: + 8040d3c: 4801 ldr r0, [pc, #4] ; (8040d44 <__sinit_lock_acquire+0x8>) + 8040d3e: f000 b8b9 b.w 8040eb4 <__retarget_lock_acquire_recursive> + 8040d42: bf00 nop + 8040d44: 2400eac2 .word 0x2400eac2 + +08040d48 <__sinit_lock_release>: + 8040d48: 4801 ldr r0, [pc, #4] ; (8040d50 <__sinit_lock_release+0x8>) + 8040d4a: f000 b8b4 b.w 8040eb6 <__retarget_lock_release_recursive> + 8040d4e: bf00 nop + 8040d50: 2400eac2 .word 0x2400eac2 + +08040d54 <__sinit>: + 8040d54: b510 push {r4, lr} + 8040d56: 4604 mov r4, r0 + 8040d58: f7ff fff0 bl 8040d3c <__sinit_lock_acquire> + 8040d5c: 69a3 ldr r3, [r4, #24] + 8040d5e: b11b cbz r3, 8040d68 <__sinit+0x14> + 8040d60: e8bd 4010 ldmia.w sp!, {r4, lr} + 8040d64: f7ff bff0 b.w 8040d48 <__sinit_lock_release> + 8040d68: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 + 8040d6c: 6523 str r3, [r4, #80] ; 0x50 + 8040d6e: 4b13 ldr r3, [pc, #76] ; (8040dbc <__sinit+0x68>) + 8040d70: 4a13 ldr r2, [pc, #76] ; (8040dc0 <__sinit+0x6c>) + 8040d72: 681b ldr r3, [r3, #0] + 8040d74: 62a2 str r2, [r4, #40] ; 0x28 + 8040d76: 42a3 cmp r3, r4 + 8040d78: bf04 itt eq + 8040d7a: 2301 moveq r3, #1 + 8040d7c: 61a3 streq r3, [r4, #24] + 8040d7e: 4620 mov r0, r4 + 8040d80: f000 f820 bl 8040dc4 <__sfp> + 8040d84: 6060 str r0, [r4, #4] + 8040d86: 4620 mov r0, r4 + 8040d88: f000 f81c bl 8040dc4 <__sfp> + 8040d8c: 60a0 str r0, [r4, #8] + 8040d8e: 4620 mov r0, r4 + 8040d90: f000 f818 bl 8040dc4 <__sfp> + 8040d94: 2200 movs r2, #0 + 8040d96: 60e0 str r0, [r4, #12] + 8040d98: 2104 movs r1, #4 + 8040d9a: 6860 ldr r0, [r4, #4] + 8040d9c: f7ff ff82 bl 8040ca4 + 8040da0: 68a0 ldr r0, [r4, #8] + 8040da2: 2201 movs r2, #1 + 8040da4: 2109 movs r1, #9 + 8040da6: f7ff ff7d bl 8040ca4 + 8040daa: 68e0 ldr r0, [r4, #12] + 8040dac: 2202 movs r2, #2 + 8040dae: 2112 movs r1, #18 + 8040db0: f7ff ff78 bl 8040ca4 + 8040db4: 2301 movs r3, #1 + 8040db6: 61a3 str r3, [r4, #24] + 8040db8: e7d2 b.n 8040d60 <__sinit+0xc> + 8040dba: bf00 nop + 8040dbc: 08044e14 .word 0x08044e14 + 8040dc0: 08040ced .word 0x08040ced + +08040dc4 <__sfp>: + 8040dc4: b5f8 push {r3, r4, r5, r6, r7, lr} + 8040dc6: 4607 mov r7, r0 + 8040dc8: f7ff ffac bl 8040d24 <__sfp_lock_acquire> + 8040dcc: 4b1e ldr r3, [pc, #120] ; (8040e48 <__sfp+0x84>) + 8040dce: 681e ldr r6, [r3, #0] + 8040dd0: 69b3 ldr r3, [r6, #24] + 8040dd2: b913 cbnz r3, 8040dda <__sfp+0x16> + 8040dd4: 4630 mov r0, r6 + 8040dd6: f7ff ffbd bl 8040d54 <__sinit> + 8040dda: 3648 adds r6, #72 ; 0x48 + 8040ddc: e9d6 3401 ldrd r3, r4, [r6, #4] + 8040de0: 3b01 subs r3, #1 + 8040de2: d503 bpl.n 8040dec <__sfp+0x28> + 8040de4: 6833 ldr r3, [r6, #0] + 8040de6: b30b cbz r3, 8040e2c <__sfp+0x68> + 8040de8: 6836 ldr r6, [r6, #0] + 8040dea: e7f7 b.n 8040ddc <__sfp+0x18> + 8040dec: f9b4 500c ldrsh.w r5, [r4, #12] + 8040df0: b9d5 cbnz r5, 8040e28 <__sfp+0x64> + 8040df2: 4b16 ldr r3, [pc, #88] ; (8040e4c <__sfp+0x88>) + 8040df4: 60e3 str r3, [r4, #12] + 8040df6: f104 0058 add.w r0, r4, #88 ; 0x58 + 8040dfa: 6665 str r5, [r4, #100] ; 0x64 + 8040dfc: f000 f859 bl 8040eb2 <__retarget_lock_init_recursive> + 8040e00: f7ff ff96 bl 8040d30 <__sfp_lock_release> + 8040e04: e9c4 5501 strd r5, r5, [r4, #4] + 8040e08: e9c4 5504 strd r5, r5, [r4, #16] + 8040e0c: 6025 str r5, [r4, #0] + 8040e0e: 61a5 str r5, [r4, #24] + 8040e10: 2208 movs r2, #8 + 8040e12: 4629 mov r1, r5 + 8040e14: f104 005c add.w r0, r4, #92 ; 0x5c + 8040e18: f7ff fd92 bl 8040940 + 8040e1c: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 + 8040e20: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 + 8040e24: 4620 mov r0, r4 + 8040e26: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8040e28: 3468 adds r4, #104 ; 0x68 + 8040e2a: e7d9 b.n 8040de0 <__sfp+0x1c> + 8040e2c: 2104 movs r1, #4 + 8040e2e: 4638 mov r0, r7 + 8040e30: f7ff ff62 bl 8040cf8 <__sfmoreglue> + 8040e34: 4604 mov r4, r0 + 8040e36: 6030 str r0, [r6, #0] + 8040e38: 2800 cmp r0, #0 + 8040e3a: d1d5 bne.n 8040de8 <__sfp+0x24> + 8040e3c: f7ff ff78 bl 8040d30 <__sfp_lock_release> + 8040e40: 230c movs r3, #12 + 8040e42: 603b str r3, [r7, #0] + 8040e44: e7ee b.n 8040e24 <__sfp+0x60> + 8040e46: bf00 nop + 8040e48: 08044e14 .word 0x08044e14 + 8040e4c: ffff0001 .word 0xffff0001 + +08040e50 : + 8040e50: b40e push {r1, r2, r3} + 8040e52: b503 push {r0, r1, lr} + 8040e54: 4601 mov r1, r0 + 8040e56: ab03 add r3, sp, #12 + 8040e58: 4805 ldr r0, [pc, #20] ; (8040e70 ) + 8040e5a: f853 2b04 ldr.w r2, [r3], #4 + 8040e5e: 6800 ldr r0, [r0, #0] + 8040e60: 9301 str r3, [sp, #4] + 8040e62: f000 f9bb bl 80411dc <_vfiprintf_r> + 8040e66: b002 add sp, #8 + 8040e68: f85d eb04 ldr.w lr, [sp], #4 + 8040e6c: b003 add sp, #12 + 8040e6e: 4770 bx lr + 8040e70: 24000078 .word 0x24000078 + +08040e74 <_fwalk_reent>: + 8040e74: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 8040e78: 4606 mov r6, r0 + 8040e7a: 4688 mov r8, r1 + 8040e7c: f100 0448 add.w r4, r0, #72 ; 0x48 + 8040e80: 2700 movs r7, #0 + 8040e82: e9d4 9501 ldrd r9, r5, [r4, #4] + 8040e86: f1b9 0901 subs.w r9, r9, #1 + 8040e8a: d505 bpl.n 8040e98 <_fwalk_reent+0x24> + 8040e8c: 6824 ldr r4, [r4, #0] + 8040e8e: 2c00 cmp r4, #0 + 8040e90: d1f7 bne.n 8040e82 <_fwalk_reent+0xe> + 8040e92: 4638 mov r0, r7 + 8040e94: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 8040e98: 89ab ldrh r3, [r5, #12] + 8040e9a: 2b01 cmp r3, #1 + 8040e9c: d907 bls.n 8040eae <_fwalk_reent+0x3a> + 8040e9e: f9b5 300e ldrsh.w r3, [r5, #14] + 8040ea2: 3301 adds r3, #1 + 8040ea4: d003 beq.n 8040eae <_fwalk_reent+0x3a> + 8040ea6: 4629 mov r1, r5 + 8040ea8: 4630 mov r0, r6 + 8040eaa: 47c0 blx r8 + 8040eac: 4307 orrs r7, r0 + 8040eae: 3568 adds r5, #104 ; 0x68 + 8040eb0: e7e9 b.n 8040e86 <_fwalk_reent+0x12> + +08040eb2 <__retarget_lock_init_recursive>: + 8040eb2: 4770 bx lr + +08040eb4 <__retarget_lock_acquire_recursive>: + 8040eb4: 4770 bx lr + +08040eb6 <__retarget_lock_release_recursive>: + 8040eb6: 4770 bx lr + +08040eb8 <__malloc_lock>: + 8040eb8: 4801 ldr r0, [pc, #4] ; (8040ec0 <__malloc_lock+0x8>) + 8040eba: f7ff bffb b.w 8040eb4 <__retarget_lock_acquire_recursive> + 8040ebe: bf00 nop + 8040ec0: 2400eac0 .word 0x2400eac0 + +08040ec4 <__malloc_unlock>: + 8040ec4: 4801 ldr r0, [pc, #4] ; (8040ecc <__malloc_unlock+0x8>) + 8040ec6: f7ff bff6 b.w 8040eb6 <__retarget_lock_release_recursive> + 8040eca: bf00 nop + 8040ecc: 2400eac0 .word 0x2400eac0 + +08040ed0 <__ssputs_r>: + 8040ed0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8040ed4: 688e ldr r6, [r1, #8] + 8040ed6: 429e cmp r6, r3 + 8040ed8: 4682 mov sl, r0 + 8040eda: 460c mov r4, r1 + 8040edc: 4690 mov r8, r2 + 8040ede: 461f mov r7, r3 + 8040ee0: d838 bhi.n 8040f54 <__ssputs_r+0x84> + 8040ee2: 898a ldrh r2, [r1, #12] + 8040ee4: f412 6f90 tst.w r2, #1152 ; 0x480 + 8040ee8: d032 beq.n 8040f50 <__ssputs_r+0x80> + 8040eea: 6825 ldr r5, [r4, #0] + 8040eec: 6909 ldr r1, [r1, #16] + 8040eee: eba5 0901 sub.w r9, r5, r1 + 8040ef2: 6965 ldr r5, [r4, #20] + 8040ef4: eb05 0545 add.w r5, r5, r5, lsl #1 + 8040ef8: eb05 75d5 add.w r5, r5, r5, lsr #31 + 8040efc: 3301 adds r3, #1 + 8040efe: 444b add r3, r9 + 8040f00: 106d asrs r5, r5, #1 + 8040f02: 429d cmp r5, r3 + 8040f04: bf38 it cc + 8040f06: 461d movcc r5, r3 + 8040f08: 0553 lsls r3, r2, #21 + 8040f0a: d531 bpl.n 8040f70 <__ssputs_r+0xa0> + 8040f0c: 4629 mov r1, r5 + 8040f0e: f7ff fd8b bl 8040a28 <_malloc_r> + 8040f12: 4606 mov r6, r0 + 8040f14: b950 cbnz r0, 8040f2c <__ssputs_r+0x5c> + 8040f16: 230c movs r3, #12 + 8040f18: f8ca 3000 str.w r3, [sl] + 8040f1c: 89a3 ldrh r3, [r4, #12] + 8040f1e: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8040f22: 81a3 strh r3, [r4, #12] + 8040f24: f04f 30ff mov.w r0, #4294967295 + 8040f28: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8040f2c: 6921 ldr r1, [r4, #16] + 8040f2e: 464a mov r2, r9 + 8040f30: f7ff fcde bl 80408f0 + 8040f34: 89a3 ldrh r3, [r4, #12] + 8040f36: f423 6390 bic.w r3, r3, #1152 ; 0x480 + 8040f3a: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8040f3e: 81a3 strh r3, [r4, #12] + 8040f40: 6126 str r6, [r4, #16] + 8040f42: 6165 str r5, [r4, #20] + 8040f44: 444e add r6, r9 + 8040f46: eba5 0509 sub.w r5, r5, r9 + 8040f4a: 6026 str r6, [r4, #0] + 8040f4c: 60a5 str r5, [r4, #8] + 8040f4e: 463e mov r6, r7 + 8040f50: 42be cmp r6, r7 + 8040f52: d900 bls.n 8040f56 <__ssputs_r+0x86> + 8040f54: 463e mov r6, r7 + 8040f56: 6820 ldr r0, [r4, #0] + 8040f58: 4632 mov r2, r6 + 8040f5a: 4641 mov r1, r8 + 8040f5c: f7ff fcd6 bl 804090c + 8040f60: 68a3 ldr r3, [r4, #8] + 8040f62: 1b9b subs r3, r3, r6 + 8040f64: 60a3 str r3, [r4, #8] + 8040f66: 6823 ldr r3, [r4, #0] + 8040f68: 4433 add r3, r6 + 8040f6a: 6023 str r3, [r4, #0] + 8040f6c: 2000 movs r0, #0 + 8040f6e: e7db b.n 8040f28 <__ssputs_r+0x58> + 8040f70: 462a mov r2, r5 + 8040f72: f000 fe5f bl 8041c34 <_realloc_r> + 8040f76: 4606 mov r6, r0 + 8040f78: 2800 cmp r0, #0 + 8040f7a: d1e1 bne.n 8040f40 <__ssputs_r+0x70> + 8040f7c: 6921 ldr r1, [r4, #16] + 8040f7e: 4650 mov r0, sl + 8040f80: f7ff fce6 bl 8040950 <_free_r> + 8040f84: e7c7 b.n 8040f16 <__ssputs_r+0x46> ... -08040f58 <_svfiprintf_r>: - 8040f58: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8040f5c: 4698 mov r8, r3 - 8040f5e: 898b ldrh r3, [r1, #12] - 8040f60: 061b lsls r3, r3, #24 - 8040f62: b09d sub sp, #116 ; 0x74 - 8040f64: 4607 mov r7, r0 - 8040f66: 460d mov r5, r1 - 8040f68: 4614 mov r4, r2 - 8040f6a: d50e bpl.n 8040f8a <_svfiprintf_r+0x32> - 8040f6c: 690b ldr r3, [r1, #16] - 8040f6e: b963 cbnz r3, 8040f8a <_svfiprintf_r+0x32> - 8040f70: 2140 movs r1, #64 ; 0x40 - 8040f72: f7ff fd41 bl 80409f8 <_malloc_r> - 8040f76: 6028 str r0, [r5, #0] - 8040f78: 6128 str r0, [r5, #16] - 8040f7a: b920 cbnz r0, 8040f86 <_svfiprintf_r+0x2e> - 8040f7c: 230c movs r3, #12 - 8040f7e: 603b str r3, [r7, #0] - 8040f80: f04f 30ff mov.w r0, #4294967295 - 8040f84: e0d1 b.n 804112a <_svfiprintf_r+0x1d2> - 8040f86: 2340 movs r3, #64 ; 0x40 - 8040f88: 616b str r3, [r5, #20] - 8040f8a: 2300 movs r3, #0 - 8040f8c: 9309 str r3, [sp, #36] ; 0x24 - 8040f8e: 2320 movs r3, #32 - 8040f90: f88d 3029 strb.w r3, [sp, #41] ; 0x29 - 8040f94: f8cd 800c str.w r8, [sp, #12] - 8040f98: 2330 movs r3, #48 ; 0x30 - 8040f9a: f8df 81a8 ldr.w r8, [pc, #424] ; 8041144 <_svfiprintf_r+0x1ec> - 8040f9e: f88d 302a strb.w r3, [sp, #42] ; 0x2a - 8040fa2: f04f 0901 mov.w r9, #1 - 8040fa6: 4623 mov r3, r4 - 8040fa8: 469a mov sl, r3 - 8040faa: f813 2b01 ldrb.w r2, [r3], #1 - 8040fae: b10a cbz r2, 8040fb4 <_svfiprintf_r+0x5c> - 8040fb0: 2a25 cmp r2, #37 ; 0x25 - 8040fb2: d1f9 bne.n 8040fa8 <_svfiprintf_r+0x50> - 8040fb4: ebba 0b04 subs.w fp, sl, r4 - 8040fb8: d00b beq.n 8040fd2 <_svfiprintf_r+0x7a> - 8040fba: 465b mov r3, fp - 8040fbc: 4622 mov r2, r4 - 8040fbe: 4629 mov r1, r5 - 8040fc0: 4638 mov r0, r7 - 8040fc2: f7ff ff6d bl 8040ea0 <__ssputs_r> - 8040fc6: 3001 adds r0, #1 - 8040fc8: f000 80aa beq.w 8041120 <_svfiprintf_r+0x1c8> - 8040fcc: 9a09 ldr r2, [sp, #36] ; 0x24 - 8040fce: 445a add r2, fp - 8040fd0: 9209 str r2, [sp, #36] ; 0x24 - 8040fd2: f89a 3000 ldrb.w r3, [sl] - 8040fd6: 2b00 cmp r3, #0 - 8040fd8: f000 80a2 beq.w 8041120 <_svfiprintf_r+0x1c8> - 8040fdc: 2300 movs r3, #0 - 8040fde: f04f 32ff mov.w r2, #4294967295 - 8040fe2: e9cd 2305 strd r2, r3, [sp, #20] - 8040fe6: f10a 0a01 add.w sl, sl, #1 - 8040fea: 9304 str r3, [sp, #16] - 8040fec: 9307 str r3, [sp, #28] - 8040fee: f88d 3053 strb.w r3, [sp, #83] ; 0x53 - 8040ff2: 931a str r3, [sp, #104] ; 0x68 - 8040ff4: 4654 mov r4, sl - 8040ff6: 2205 movs r2, #5 - 8040ff8: f814 1b01 ldrb.w r1, [r4], #1 - 8040ffc: 4851 ldr r0, [pc, #324] ; (8041144 <_svfiprintf_r+0x1ec>) - 8040ffe: f7df f987 bl 8020310 - 8041002: 9a04 ldr r2, [sp, #16] - 8041004: b9d8 cbnz r0, 804103e <_svfiprintf_r+0xe6> - 8041006: 06d0 lsls r0, r2, #27 - 8041008: bf44 itt mi - 804100a: 2320 movmi r3, #32 - 804100c: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 - 8041010: 0711 lsls r1, r2, #28 - 8041012: bf44 itt mi - 8041014: 232b movmi r3, #43 ; 0x2b - 8041016: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 - 804101a: f89a 3000 ldrb.w r3, [sl] - 804101e: 2b2a cmp r3, #42 ; 0x2a - 8041020: d015 beq.n 804104e <_svfiprintf_r+0xf6> - 8041022: 9a07 ldr r2, [sp, #28] +08040f88 <_svfiprintf_r>: + 8040f88: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8040f8c: 4698 mov r8, r3 + 8040f8e: 898b ldrh r3, [r1, #12] + 8040f90: 061b lsls r3, r3, #24 + 8040f92: b09d sub sp, #116 ; 0x74 + 8040f94: 4607 mov r7, r0 + 8040f96: 460d mov r5, r1 + 8040f98: 4614 mov r4, r2 + 8040f9a: d50e bpl.n 8040fba <_svfiprintf_r+0x32> + 8040f9c: 690b ldr r3, [r1, #16] + 8040f9e: b963 cbnz r3, 8040fba <_svfiprintf_r+0x32> + 8040fa0: 2140 movs r1, #64 ; 0x40 + 8040fa2: f7ff fd41 bl 8040a28 <_malloc_r> + 8040fa6: 6028 str r0, [r5, #0] + 8040fa8: 6128 str r0, [r5, #16] + 8040faa: b920 cbnz r0, 8040fb6 <_svfiprintf_r+0x2e> + 8040fac: 230c movs r3, #12 + 8040fae: 603b str r3, [r7, #0] + 8040fb0: f04f 30ff mov.w r0, #4294967295 + 8040fb4: e0d1 b.n 804115a <_svfiprintf_r+0x1d2> + 8040fb6: 2340 movs r3, #64 ; 0x40 + 8040fb8: 616b str r3, [r5, #20] + 8040fba: 2300 movs r3, #0 + 8040fbc: 9309 str r3, [sp, #36] ; 0x24 + 8040fbe: 2320 movs r3, #32 + 8040fc0: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 8040fc4: f8cd 800c str.w r8, [sp, #12] + 8040fc8: 2330 movs r3, #48 ; 0x30 + 8040fca: f8df 81a8 ldr.w r8, [pc, #424] ; 8041174 <_svfiprintf_r+0x1ec> + 8040fce: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 8040fd2: f04f 0901 mov.w r9, #1 + 8040fd6: 4623 mov r3, r4 + 8040fd8: 469a mov sl, r3 + 8040fda: f813 2b01 ldrb.w r2, [r3], #1 + 8040fde: b10a cbz r2, 8040fe4 <_svfiprintf_r+0x5c> + 8040fe0: 2a25 cmp r2, #37 ; 0x25 + 8040fe2: d1f9 bne.n 8040fd8 <_svfiprintf_r+0x50> + 8040fe4: ebba 0b04 subs.w fp, sl, r4 + 8040fe8: d00b beq.n 8041002 <_svfiprintf_r+0x7a> + 8040fea: 465b mov r3, fp + 8040fec: 4622 mov r2, r4 + 8040fee: 4629 mov r1, r5 + 8040ff0: 4638 mov r0, r7 + 8040ff2: f7ff ff6d bl 8040ed0 <__ssputs_r> + 8040ff6: 3001 adds r0, #1 + 8040ff8: f000 80aa beq.w 8041150 <_svfiprintf_r+0x1c8> + 8040ffc: 9a09 ldr r2, [sp, #36] ; 0x24 + 8040ffe: 445a add r2, fp + 8041000: 9209 str r2, [sp, #36] ; 0x24 + 8041002: f89a 3000 ldrb.w r3, [sl] + 8041006: 2b00 cmp r3, #0 + 8041008: f000 80a2 beq.w 8041150 <_svfiprintf_r+0x1c8> + 804100c: 2300 movs r3, #0 + 804100e: f04f 32ff mov.w r2, #4294967295 + 8041012: e9cd 2305 strd r2, r3, [sp, #20] + 8041016: f10a 0a01 add.w sl, sl, #1 + 804101a: 9304 str r3, [sp, #16] + 804101c: 9307 str r3, [sp, #28] + 804101e: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 8041022: 931a str r3, [sp, #104] ; 0x68 8041024: 4654 mov r4, sl - 8041026: 2000 movs r0, #0 - 8041028: f04f 0c0a mov.w ip, #10 - 804102c: 4621 mov r1, r4 - 804102e: f811 3b01 ldrb.w r3, [r1], #1 - 8041032: 3b30 subs r3, #48 ; 0x30 - 8041034: 2b09 cmp r3, #9 - 8041036: d94e bls.n 80410d6 <_svfiprintf_r+0x17e> - 8041038: b1b0 cbz r0, 8041068 <_svfiprintf_r+0x110> - 804103a: 9207 str r2, [sp, #28] - 804103c: e014 b.n 8041068 <_svfiprintf_r+0x110> - 804103e: eba0 0308 sub.w r3, r0, r8 - 8041042: fa09 f303 lsl.w r3, r9, r3 - 8041046: 4313 orrs r3, r2 - 8041048: 9304 str r3, [sp, #16] - 804104a: 46a2 mov sl, r4 - 804104c: e7d2 b.n 8040ff4 <_svfiprintf_r+0x9c> - 804104e: 9b03 ldr r3, [sp, #12] - 8041050: 1d19 adds r1, r3, #4 - 8041052: 681b ldr r3, [r3, #0] - 8041054: 9103 str r1, [sp, #12] - 8041056: 2b00 cmp r3, #0 - 8041058: bfbb ittet lt - 804105a: 425b neglt r3, r3 - 804105c: f042 0202 orrlt.w r2, r2, #2 - 8041060: 9307 strge r3, [sp, #28] - 8041062: 9307 strlt r3, [sp, #28] - 8041064: bfb8 it lt - 8041066: 9204 strlt r2, [sp, #16] - 8041068: 7823 ldrb r3, [r4, #0] - 804106a: 2b2e cmp r3, #46 ; 0x2e - 804106c: d10c bne.n 8041088 <_svfiprintf_r+0x130> - 804106e: 7863 ldrb r3, [r4, #1] - 8041070: 2b2a cmp r3, #42 ; 0x2a - 8041072: d135 bne.n 80410e0 <_svfiprintf_r+0x188> - 8041074: 9b03 ldr r3, [sp, #12] - 8041076: 1d1a adds r2, r3, #4 - 8041078: 681b ldr r3, [r3, #0] - 804107a: 9203 str r2, [sp, #12] - 804107c: 2b00 cmp r3, #0 - 804107e: bfb8 it lt - 8041080: f04f 33ff movlt.w r3, #4294967295 - 8041084: 3402 adds r4, #2 - 8041086: 9305 str r3, [sp, #20] - 8041088: f8df a0c8 ldr.w sl, [pc, #200] ; 8041154 <_svfiprintf_r+0x1fc> - 804108c: 7821 ldrb r1, [r4, #0] - 804108e: 2203 movs r2, #3 - 8041090: 4650 mov r0, sl - 8041092: f7df f93d bl 8020310 - 8041096: b140 cbz r0, 80410aa <_svfiprintf_r+0x152> - 8041098: 2340 movs r3, #64 ; 0x40 - 804109a: eba0 000a sub.w r0, r0, sl - 804109e: fa03 f000 lsl.w r0, r3, r0 - 80410a2: 9b04 ldr r3, [sp, #16] - 80410a4: 4303 orrs r3, r0 - 80410a6: 3401 adds r4, #1 - 80410a8: 9304 str r3, [sp, #16] - 80410aa: f814 1b01 ldrb.w r1, [r4], #1 - 80410ae: 4826 ldr r0, [pc, #152] ; (8041148 <_svfiprintf_r+0x1f0>) - 80410b0: f88d 1028 strb.w r1, [sp, #40] ; 0x28 - 80410b4: 2206 movs r2, #6 - 80410b6: f7df f92b bl 8020310 - 80410ba: 2800 cmp r0, #0 - 80410bc: d038 beq.n 8041130 <_svfiprintf_r+0x1d8> - 80410be: 4b23 ldr r3, [pc, #140] ; (804114c <_svfiprintf_r+0x1f4>) - 80410c0: bb1b cbnz r3, 804110a <_svfiprintf_r+0x1b2> - 80410c2: 9b03 ldr r3, [sp, #12] - 80410c4: 3307 adds r3, #7 - 80410c6: f023 0307 bic.w r3, r3, #7 - 80410ca: 3308 adds r3, #8 - 80410cc: 9303 str r3, [sp, #12] - 80410ce: 9b09 ldr r3, [sp, #36] ; 0x24 - 80410d0: 4433 add r3, r6 - 80410d2: 9309 str r3, [sp, #36] ; 0x24 - 80410d4: e767 b.n 8040fa6 <_svfiprintf_r+0x4e> - 80410d6: fb0c 3202 mla r2, ip, r2, r3 - 80410da: 460c mov r4, r1 - 80410dc: 2001 movs r0, #1 - 80410de: e7a5 b.n 804102c <_svfiprintf_r+0xd4> - 80410e0: 2300 movs r3, #0 - 80410e2: 3401 adds r4, #1 - 80410e4: 9305 str r3, [sp, #20] - 80410e6: 4619 mov r1, r3 - 80410e8: f04f 0c0a mov.w ip, #10 - 80410ec: 4620 mov r0, r4 - 80410ee: f810 2b01 ldrb.w r2, [r0], #1 - 80410f2: 3a30 subs r2, #48 ; 0x30 - 80410f4: 2a09 cmp r2, #9 - 80410f6: d903 bls.n 8041100 <_svfiprintf_r+0x1a8> - 80410f8: 2b00 cmp r3, #0 - 80410fa: d0c5 beq.n 8041088 <_svfiprintf_r+0x130> - 80410fc: 9105 str r1, [sp, #20] - 80410fe: e7c3 b.n 8041088 <_svfiprintf_r+0x130> - 8041100: fb0c 2101 mla r1, ip, r1, r2 - 8041104: 4604 mov r4, r0 - 8041106: 2301 movs r3, #1 - 8041108: e7f0 b.n 80410ec <_svfiprintf_r+0x194> - 804110a: ab03 add r3, sp, #12 - 804110c: 9300 str r3, [sp, #0] - 804110e: 462a mov r2, r5 - 8041110: 4b0f ldr r3, [pc, #60] ; (8041150 <_svfiprintf_r+0x1f8>) - 8041112: a904 add r1, sp, #16 - 8041114: 4638 mov r0, r7 - 8041116: f3af 8000 nop.w - 804111a: 1c42 adds r2, r0, #1 - 804111c: 4606 mov r6, r0 - 804111e: d1d6 bne.n 80410ce <_svfiprintf_r+0x176> - 8041120: 89ab ldrh r3, [r5, #12] - 8041122: 065b lsls r3, r3, #25 - 8041124: f53f af2c bmi.w 8040f80 <_svfiprintf_r+0x28> - 8041128: 9809 ldr r0, [sp, #36] ; 0x24 - 804112a: b01d add sp, #116 ; 0x74 - 804112c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8041130: ab03 add r3, sp, #12 - 8041132: 9300 str r3, [sp, #0] - 8041134: 462a mov r2, r5 - 8041136: 4b06 ldr r3, [pc, #24] ; (8041150 <_svfiprintf_r+0x1f8>) - 8041138: a904 add r1, sp, #16 - 804113a: 4638 mov r0, r7 - 804113c: f000 f9d4 bl 80414e8 <_printf_i> - 8041140: e7eb b.n 804111a <_svfiprintf_r+0x1c2> - 8041142: bf00 nop - 8041144: 08044ef8 .word 0x08044ef8 - 8041148: 08044f02 .word 0x08044f02 - 804114c: 00000000 .word 0x00000000 - 8041150: 08040ea1 .word 0x08040ea1 - 8041154: 08044efe .word 0x08044efe - -08041158 <__sfputc_r>: - 8041158: 6893 ldr r3, [r2, #8] - 804115a: 3b01 subs r3, #1 - 804115c: 2b00 cmp r3, #0 - 804115e: b410 push {r4} - 8041160: 6093 str r3, [r2, #8] - 8041162: da08 bge.n 8041176 <__sfputc_r+0x1e> - 8041164: 6994 ldr r4, [r2, #24] - 8041166: 42a3 cmp r3, r4 - 8041168: db01 blt.n 804116e <__sfputc_r+0x16> - 804116a: 290a cmp r1, #10 - 804116c: d103 bne.n 8041176 <__sfputc_r+0x1e> - 804116e: f85d 4b04 ldr.w r4, [sp], #4 - 8041172: f000 bb23 b.w 80417bc <__swbuf_r> - 8041176: 6813 ldr r3, [r2, #0] - 8041178: 1c58 adds r0, r3, #1 - 804117a: 6010 str r0, [r2, #0] - 804117c: 7019 strb r1, [r3, #0] - 804117e: 4608 mov r0, r1 - 8041180: f85d 4b04 ldr.w r4, [sp], #4 - 8041184: 4770 bx lr - -08041186 <__sfputs_r>: - 8041186: b5f8 push {r3, r4, r5, r6, r7, lr} - 8041188: 4606 mov r6, r0 - 804118a: 460f mov r7, r1 - 804118c: 4614 mov r4, r2 - 804118e: 18d5 adds r5, r2, r3 - 8041190: 42ac cmp r4, r5 - 8041192: d101 bne.n 8041198 <__sfputs_r+0x12> - 8041194: 2000 movs r0, #0 - 8041196: e007 b.n 80411a8 <__sfputs_r+0x22> - 8041198: f814 1b01 ldrb.w r1, [r4], #1 - 804119c: 463a mov r2, r7 - 804119e: 4630 mov r0, r6 - 80411a0: f7ff ffda bl 8041158 <__sfputc_r> - 80411a4: 1c43 adds r3, r0, #1 - 80411a6: d1f3 bne.n 8041190 <__sfputs_r+0xa> - 80411a8: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8041026: 2205 movs r2, #5 + 8041028: f814 1b01 ldrb.w r1, [r4], #1 + 804102c: 4851 ldr r0, [pc, #324] ; (8041174 <_svfiprintf_r+0x1ec>) + 804102e: f7df f96f bl 8020310 + 8041032: 9a04 ldr r2, [sp, #16] + 8041034: b9d8 cbnz r0, 804106e <_svfiprintf_r+0xe6> + 8041036: 06d0 lsls r0, r2, #27 + 8041038: bf44 itt mi + 804103a: 2320 movmi r3, #32 + 804103c: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 8041040: 0711 lsls r1, r2, #28 + 8041042: bf44 itt mi + 8041044: 232b movmi r3, #43 ; 0x2b + 8041046: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 804104a: f89a 3000 ldrb.w r3, [sl] + 804104e: 2b2a cmp r3, #42 ; 0x2a + 8041050: d015 beq.n 804107e <_svfiprintf_r+0xf6> + 8041052: 9a07 ldr r2, [sp, #28] + 8041054: 4654 mov r4, sl + 8041056: 2000 movs r0, #0 + 8041058: f04f 0c0a mov.w ip, #10 + 804105c: 4621 mov r1, r4 + 804105e: f811 3b01 ldrb.w r3, [r1], #1 + 8041062: 3b30 subs r3, #48 ; 0x30 + 8041064: 2b09 cmp r3, #9 + 8041066: d94e bls.n 8041106 <_svfiprintf_r+0x17e> + 8041068: b1b0 cbz r0, 8041098 <_svfiprintf_r+0x110> + 804106a: 9207 str r2, [sp, #28] + 804106c: e014 b.n 8041098 <_svfiprintf_r+0x110> + 804106e: eba0 0308 sub.w r3, r0, r8 + 8041072: fa09 f303 lsl.w r3, r9, r3 + 8041076: 4313 orrs r3, r2 + 8041078: 9304 str r3, [sp, #16] + 804107a: 46a2 mov sl, r4 + 804107c: e7d2 b.n 8041024 <_svfiprintf_r+0x9c> + 804107e: 9b03 ldr r3, [sp, #12] + 8041080: 1d19 adds r1, r3, #4 + 8041082: 681b ldr r3, [r3, #0] + 8041084: 9103 str r1, [sp, #12] + 8041086: 2b00 cmp r3, #0 + 8041088: bfbb ittet lt + 804108a: 425b neglt r3, r3 + 804108c: f042 0202 orrlt.w r2, r2, #2 + 8041090: 9307 strge r3, [sp, #28] + 8041092: 9307 strlt r3, [sp, #28] + 8041094: bfb8 it lt + 8041096: 9204 strlt r2, [sp, #16] + 8041098: 7823 ldrb r3, [r4, #0] + 804109a: 2b2e cmp r3, #46 ; 0x2e + 804109c: d10c bne.n 80410b8 <_svfiprintf_r+0x130> + 804109e: 7863 ldrb r3, [r4, #1] + 80410a0: 2b2a cmp r3, #42 ; 0x2a + 80410a2: d135 bne.n 8041110 <_svfiprintf_r+0x188> + 80410a4: 9b03 ldr r3, [sp, #12] + 80410a6: 1d1a adds r2, r3, #4 + 80410a8: 681b ldr r3, [r3, #0] + 80410aa: 9203 str r2, [sp, #12] + 80410ac: 2b00 cmp r3, #0 + 80410ae: bfb8 it lt + 80410b0: f04f 33ff movlt.w r3, #4294967295 + 80410b4: 3402 adds r4, #2 + 80410b6: 9305 str r3, [sp, #20] + 80410b8: f8df a0c8 ldr.w sl, [pc, #200] ; 8041184 <_svfiprintf_r+0x1fc> + 80410bc: 7821 ldrb r1, [r4, #0] + 80410be: 2203 movs r2, #3 + 80410c0: 4650 mov r0, sl + 80410c2: f7df f925 bl 8020310 + 80410c6: b140 cbz r0, 80410da <_svfiprintf_r+0x152> + 80410c8: 2340 movs r3, #64 ; 0x40 + 80410ca: eba0 000a sub.w r0, r0, sl + 80410ce: fa03 f000 lsl.w r0, r3, r0 + 80410d2: 9b04 ldr r3, [sp, #16] + 80410d4: 4303 orrs r3, r0 + 80410d6: 3401 adds r4, #1 + 80410d8: 9304 str r3, [sp, #16] + 80410da: f814 1b01 ldrb.w r1, [r4], #1 + 80410de: 4826 ldr r0, [pc, #152] ; (8041178 <_svfiprintf_r+0x1f0>) + 80410e0: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 80410e4: 2206 movs r2, #6 + 80410e6: f7df f913 bl 8020310 + 80410ea: 2800 cmp r0, #0 + 80410ec: d038 beq.n 8041160 <_svfiprintf_r+0x1d8> + 80410ee: 4b23 ldr r3, [pc, #140] ; (804117c <_svfiprintf_r+0x1f4>) + 80410f0: bb1b cbnz r3, 804113a <_svfiprintf_r+0x1b2> + 80410f2: 9b03 ldr r3, [sp, #12] + 80410f4: 3307 adds r3, #7 + 80410f6: f023 0307 bic.w r3, r3, #7 + 80410fa: 3308 adds r3, #8 + 80410fc: 9303 str r3, [sp, #12] + 80410fe: 9b09 ldr r3, [sp, #36] ; 0x24 + 8041100: 4433 add r3, r6 + 8041102: 9309 str r3, [sp, #36] ; 0x24 + 8041104: e767 b.n 8040fd6 <_svfiprintf_r+0x4e> + 8041106: fb0c 3202 mla r2, ip, r2, r3 + 804110a: 460c mov r4, r1 + 804110c: 2001 movs r0, #1 + 804110e: e7a5 b.n 804105c <_svfiprintf_r+0xd4> + 8041110: 2300 movs r3, #0 + 8041112: 3401 adds r4, #1 + 8041114: 9305 str r3, [sp, #20] + 8041116: 4619 mov r1, r3 + 8041118: f04f 0c0a mov.w ip, #10 + 804111c: 4620 mov r0, r4 + 804111e: f810 2b01 ldrb.w r2, [r0], #1 + 8041122: 3a30 subs r2, #48 ; 0x30 + 8041124: 2a09 cmp r2, #9 + 8041126: d903 bls.n 8041130 <_svfiprintf_r+0x1a8> + 8041128: 2b00 cmp r3, #0 + 804112a: d0c5 beq.n 80410b8 <_svfiprintf_r+0x130> + 804112c: 9105 str r1, [sp, #20] + 804112e: e7c3 b.n 80410b8 <_svfiprintf_r+0x130> + 8041130: fb0c 2101 mla r1, ip, r1, r2 + 8041134: 4604 mov r4, r0 + 8041136: 2301 movs r3, #1 + 8041138: e7f0 b.n 804111c <_svfiprintf_r+0x194> + 804113a: ab03 add r3, sp, #12 + 804113c: 9300 str r3, [sp, #0] + 804113e: 462a mov r2, r5 + 8041140: 4b0f ldr r3, [pc, #60] ; (8041180 <_svfiprintf_r+0x1f8>) + 8041142: a904 add r1, sp, #16 + 8041144: 4638 mov r0, r7 + 8041146: f3af 8000 nop.w + 804114a: 1c42 adds r2, r0, #1 + 804114c: 4606 mov r6, r0 + 804114e: d1d6 bne.n 80410fe <_svfiprintf_r+0x176> + 8041150: 89ab ldrh r3, [r5, #12] + 8041152: 065b lsls r3, r3, #25 + 8041154: f53f af2c bmi.w 8040fb0 <_svfiprintf_r+0x28> + 8041158: 9809 ldr r0, [sp, #36] ; 0x24 + 804115a: b01d add sp, #116 ; 0x74 + 804115c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8041160: ab03 add r3, sp, #12 + 8041162: 9300 str r3, [sp, #0] + 8041164: 462a mov r2, r5 + 8041166: 4b06 ldr r3, [pc, #24] ; (8041180 <_svfiprintf_r+0x1f8>) + 8041168: a904 add r1, sp, #16 + 804116a: 4638 mov r0, r7 + 804116c: f000 f9d4 bl 8041518 <_printf_i> + 8041170: e7eb b.n 804114a <_svfiprintf_r+0x1c2> + 8041172: bf00 nop + 8041174: 08044f28 .word 0x08044f28 + 8041178: 08044f32 .word 0x08044f32 + 804117c: 00000000 .word 0x00000000 + 8041180: 08040ed1 .word 0x08040ed1 + 8041184: 08044f2e .word 0x08044f2e + +08041188 <__sfputc_r>: + 8041188: 6893 ldr r3, [r2, #8] + 804118a: 3b01 subs r3, #1 + 804118c: 2b00 cmp r3, #0 + 804118e: b410 push {r4} + 8041190: 6093 str r3, [r2, #8] + 8041192: da08 bge.n 80411a6 <__sfputc_r+0x1e> + 8041194: 6994 ldr r4, [r2, #24] + 8041196: 42a3 cmp r3, r4 + 8041198: db01 blt.n 804119e <__sfputc_r+0x16> + 804119a: 290a cmp r1, #10 + 804119c: d103 bne.n 80411a6 <__sfputc_r+0x1e> + 804119e: f85d 4b04 ldr.w r4, [sp], #4 + 80411a2: f000 bb23 b.w 80417ec <__swbuf_r> + 80411a6: 6813 ldr r3, [r2, #0] + 80411a8: 1c58 adds r0, r3, #1 + 80411aa: 6010 str r0, [r2, #0] + 80411ac: 7019 strb r1, [r3, #0] + 80411ae: 4608 mov r0, r1 + 80411b0: f85d 4b04 ldr.w r4, [sp], #4 + 80411b4: 4770 bx lr + +080411b6 <__sfputs_r>: + 80411b6: b5f8 push {r3, r4, r5, r6, r7, lr} + 80411b8: 4606 mov r6, r0 + 80411ba: 460f mov r7, r1 + 80411bc: 4614 mov r4, r2 + 80411be: 18d5 adds r5, r2, r3 + 80411c0: 42ac cmp r4, r5 + 80411c2: d101 bne.n 80411c8 <__sfputs_r+0x12> + 80411c4: 2000 movs r0, #0 + 80411c6: e007 b.n 80411d8 <__sfputs_r+0x22> + 80411c8: f814 1b01 ldrb.w r1, [r4], #1 + 80411cc: 463a mov r2, r7 + 80411ce: 4630 mov r0, r6 + 80411d0: f7ff ffda bl 8041188 <__sfputc_r> + 80411d4: 1c43 adds r3, r0, #1 + 80411d6: d1f3 bne.n 80411c0 <__sfputs_r+0xa> + 80411d8: bdf8 pop {r3, r4, r5, r6, r7, pc} ... -080411ac <_vfiprintf_r>: - 80411ac: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 80411b0: 460d mov r5, r1 - 80411b2: b09d sub sp, #116 ; 0x74 - 80411b4: 4614 mov r4, r2 - 80411b6: 4698 mov r8, r3 - 80411b8: 4606 mov r6, r0 - 80411ba: b118 cbz r0, 80411c4 <_vfiprintf_r+0x18> - 80411bc: 6983 ldr r3, [r0, #24] - 80411be: b90b cbnz r3, 80411c4 <_vfiprintf_r+0x18> - 80411c0: f7ff fdb0 bl 8040d24 <__sinit> - 80411c4: 4b89 ldr r3, [pc, #548] ; (80413ec <_vfiprintf_r+0x240>) - 80411c6: 429d cmp r5, r3 - 80411c8: d11b bne.n 8041202 <_vfiprintf_r+0x56> - 80411ca: 6875 ldr r5, [r6, #4] - 80411cc: 6e6b ldr r3, [r5, #100] ; 0x64 - 80411ce: 07d9 lsls r1, r3, #31 - 80411d0: d405 bmi.n 80411de <_vfiprintf_r+0x32> - 80411d2: 89ab ldrh r3, [r5, #12] - 80411d4: 059a lsls r2, r3, #22 - 80411d6: d402 bmi.n 80411de <_vfiprintf_r+0x32> - 80411d8: 6da8 ldr r0, [r5, #88] ; 0x58 - 80411da: f7ff fe53 bl 8040e84 <__retarget_lock_acquire_recursive> - 80411de: 89ab ldrh r3, [r5, #12] - 80411e0: 071b lsls r3, r3, #28 - 80411e2: d501 bpl.n 80411e8 <_vfiprintf_r+0x3c> - 80411e4: 692b ldr r3, [r5, #16] - 80411e6: b9eb cbnz r3, 8041224 <_vfiprintf_r+0x78> - 80411e8: 4629 mov r1, r5 - 80411ea: 4630 mov r0, r6 - 80411ec: f000 fb4a bl 8041884 <__swsetup_r> - 80411f0: b1c0 cbz r0, 8041224 <_vfiprintf_r+0x78> - 80411f2: 6e6b ldr r3, [r5, #100] ; 0x64 - 80411f4: 07dc lsls r4, r3, #31 - 80411f6: d50e bpl.n 8041216 <_vfiprintf_r+0x6a> - 80411f8: f04f 30ff mov.w r0, #4294967295 - 80411fc: b01d add sp, #116 ; 0x74 - 80411fe: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8041202: 4b7b ldr r3, [pc, #492] ; (80413f0 <_vfiprintf_r+0x244>) - 8041204: 429d cmp r5, r3 - 8041206: d101 bne.n 804120c <_vfiprintf_r+0x60> - 8041208: 68b5 ldr r5, [r6, #8] - 804120a: e7df b.n 80411cc <_vfiprintf_r+0x20> - 804120c: 4b79 ldr r3, [pc, #484] ; (80413f4 <_vfiprintf_r+0x248>) - 804120e: 429d cmp r5, r3 - 8041210: bf08 it eq - 8041212: 68f5 ldreq r5, [r6, #12] - 8041214: e7da b.n 80411cc <_vfiprintf_r+0x20> - 8041216: 89ab ldrh r3, [r5, #12] - 8041218: 0598 lsls r0, r3, #22 - 804121a: d4ed bmi.n 80411f8 <_vfiprintf_r+0x4c> - 804121c: 6da8 ldr r0, [r5, #88] ; 0x58 - 804121e: f7ff fe32 bl 8040e86 <__retarget_lock_release_recursive> - 8041222: e7e9 b.n 80411f8 <_vfiprintf_r+0x4c> - 8041224: 2300 movs r3, #0 - 8041226: 9309 str r3, [sp, #36] ; 0x24 - 8041228: 2320 movs r3, #32 - 804122a: f88d 3029 strb.w r3, [sp, #41] ; 0x29 - 804122e: f8cd 800c str.w r8, [sp, #12] - 8041232: 2330 movs r3, #48 ; 0x30 - 8041234: f8df 81c0 ldr.w r8, [pc, #448] ; 80413f8 <_vfiprintf_r+0x24c> - 8041238: f88d 302a strb.w r3, [sp, #42] ; 0x2a - 804123c: f04f 0901 mov.w r9, #1 - 8041240: 4623 mov r3, r4 - 8041242: 469a mov sl, r3 - 8041244: f813 2b01 ldrb.w r2, [r3], #1 - 8041248: b10a cbz r2, 804124e <_vfiprintf_r+0xa2> - 804124a: 2a25 cmp r2, #37 ; 0x25 - 804124c: d1f9 bne.n 8041242 <_vfiprintf_r+0x96> - 804124e: ebba 0b04 subs.w fp, sl, r4 - 8041252: d00b beq.n 804126c <_vfiprintf_r+0xc0> - 8041254: 465b mov r3, fp - 8041256: 4622 mov r2, r4 - 8041258: 4629 mov r1, r5 - 804125a: 4630 mov r0, r6 - 804125c: f7ff ff93 bl 8041186 <__sfputs_r> - 8041260: 3001 adds r0, #1 - 8041262: f000 80aa beq.w 80413ba <_vfiprintf_r+0x20e> - 8041266: 9a09 ldr r2, [sp, #36] ; 0x24 - 8041268: 445a add r2, fp - 804126a: 9209 str r2, [sp, #36] ; 0x24 - 804126c: f89a 3000 ldrb.w r3, [sl] - 8041270: 2b00 cmp r3, #0 - 8041272: f000 80a2 beq.w 80413ba <_vfiprintf_r+0x20e> - 8041276: 2300 movs r3, #0 - 8041278: f04f 32ff mov.w r2, #4294967295 - 804127c: e9cd 2305 strd r2, r3, [sp, #20] - 8041280: f10a 0a01 add.w sl, sl, #1 - 8041284: 9304 str r3, [sp, #16] - 8041286: 9307 str r3, [sp, #28] - 8041288: f88d 3053 strb.w r3, [sp, #83] ; 0x53 - 804128c: 931a str r3, [sp, #104] ; 0x68 - 804128e: 4654 mov r4, sl - 8041290: 2205 movs r2, #5 - 8041292: f814 1b01 ldrb.w r1, [r4], #1 - 8041296: 4858 ldr r0, [pc, #352] ; (80413f8 <_vfiprintf_r+0x24c>) - 8041298: f7df f83a bl 8020310 - 804129c: 9a04 ldr r2, [sp, #16] - 804129e: b9d8 cbnz r0, 80412d8 <_vfiprintf_r+0x12c> - 80412a0: 06d1 lsls r1, r2, #27 - 80412a2: bf44 itt mi - 80412a4: 2320 movmi r3, #32 - 80412a6: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 - 80412aa: 0713 lsls r3, r2, #28 - 80412ac: bf44 itt mi - 80412ae: 232b movmi r3, #43 ; 0x2b - 80412b0: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 - 80412b4: f89a 3000 ldrb.w r3, [sl] - 80412b8: 2b2a cmp r3, #42 ; 0x2a - 80412ba: d015 beq.n 80412e8 <_vfiprintf_r+0x13c> - 80412bc: 9a07 ldr r2, [sp, #28] +080411dc <_vfiprintf_r>: + 80411dc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 80411e0: 460d mov r5, r1 + 80411e2: b09d sub sp, #116 ; 0x74 + 80411e4: 4614 mov r4, r2 + 80411e6: 4698 mov r8, r3 + 80411e8: 4606 mov r6, r0 + 80411ea: b118 cbz r0, 80411f4 <_vfiprintf_r+0x18> + 80411ec: 6983 ldr r3, [r0, #24] + 80411ee: b90b cbnz r3, 80411f4 <_vfiprintf_r+0x18> + 80411f0: f7ff fdb0 bl 8040d54 <__sinit> + 80411f4: 4b89 ldr r3, [pc, #548] ; (804141c <_vfiprintf_r+0x240>) + 80411f6: 429d cmp r5, r3 + 80411f8: d11b bne.n 8041232 <_vfiprintf_r+0x56> + 80411fa: 6875 ldr r5, [r6, #4] + 80411fc: 6e6b ldr r3, [r5, #100] ; 0x64 + 80411fe: 07d9 lsls r1, r3, #31 + 8041200: d405 bmi.n 804120e <_vfiprintf_r+0x32> + 8041202: 89ab ldrh r3, [r5, #12] + 8041204: 059a lsls r2, r3, #22 + 8041206: d402 bmi.n 804120e <_vfiprintf_r+0x32> + 8041208: 6da8 ldr r0, [r5, #88] ; 0x58 + 804120a: f7ff fe53 bl 8040eb4 <__retarget_lock_acquire_recursive> + 804120e: 89ab ldrh r3, [r5, #12] + 8041210: 071b lsls r3, r3, #28 + 8041212: d501 bpl.n 8041218 <_vfiprintf_r+0x3c> + 8041214: 692b ldr r3, [r5, #16] + 8041216: b9eb cbnz r3, 8041254 <_vfiprintf_r+0x78> + 8041218: 4629 mov r1, r5 + 804121a: 4630 mov r0, r6 + 804121c: f000 fb4a bl 80418b4 <__swsetup_r> + 8041220: b1c0 cbz r0, 8041254 <_vfiprintf_r+0x78> + 8041222: 6e6b ldr r3, [r5, #100] ; 0x64 + 8041224: 07dc lsls r4, r3, #31 + 8041226: d50e bpl.n 8041246 <_vfiprintf_r+0x6a> + 8041228: f04f 30ff mov.w r0, #4294967295 + 804122c: b01d add sp, #116 ; 0x74 + 804122e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 8041232: 4b7b ldr r3, [pc, #492] ; (8041420 <_vfiprintf_r+0x244>) + 8041234: 429d cmp r5, r3 + 8041236: d101 bne.n 804123c <_vfiprintf_r+0x60> + 8041238: 68b5 ldr r5, [r6, #8] + 804123a: e7df b.n 80411fc <_vfiprintf_r+0x20> + 804123c: 4b79 ldr r3, [pc, #484] ; (8041424 <_vfiprintf_r+0x248>) + 804123e: 429d cmp r5, r3 + 8041240: bf08 it eq + 8041242: 68f5 ldreq r5, [r6, #12] + 8041244: e7da b.n 80411fc <_vfiprintf_r+0x20> + 8041246: 89ab ldrh r3, [r5, #12] + 8041248: 0598 lsls r0, r3, #22 + 804124a: d4ed bmi.n 8041228 <_vfiprintf_r+0x4c> + 804124c: 6da8 ldr r0, [r5, #88] ; 0x58 + 804124e: f7ff fe32 bl 8040eb6 <__retarget_lock_release_recursive> + 8041252: e7e9 b.n 8041228 <_vfiprintf_r+0x4c> + 8041254: 2300 movs r3, #0 + 8041256: 9309 str r3, [sp, #36] ; 0x24 + 8041258: 2320 movs r3, #32 + 804125a: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 804125e: f8cd 800c str.w r8, [sp, #12] + 8041262: 2330 movs r3, #48 ; 0x30 + 8041264: f8df 81c0 ldr.w r8, [pc, #448] ; 8041428 <_vfiprintf_r+0x24c> + 8041268: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 804126c: f04f 0901 mov.w r9, #1 + 8041270: 4623 mov r3, r4 + 8041272: 469a mov sl, r3 + 8041274: f813 2b01 ldrb.w r2, [r3], #1 + 8041278: b10a cbz r2, 804127e <_vfiprintf_r+0xa2> + 804127a: 2a25 cmp r2, #37 ; 0x25 + 804127c: d1f9 bne.n 8041272 <_vfiprintf_r+0x96> + 804127e: ebba 0b04 subs.w fp, sl, r4 + 8041282: d00b beq.n 804129c <_vfiprintf_r+0xc0> + 8041284: 465b mov r3, fp + 8041286: 4622 mov r2, r4 + 8041288: 4629 mov r1, r5 + 804128a: 4630 mov r0, r6 + 804128c: f7ff ff93 bl 80411b6 <__sfputs_r> + 8041290: 3001 adds r0, #1 + 8041292: f000 80aa beq.w 80413ea <_vfiprintf_r+0x20e> + 8041296: 9a09 ldr r2, [sp, #36] ; 0x24 + 8041298: 445a add r2, fp + 804129a: 9209 str r2, [sp, #36] ; 0x24 + 804129c: f89a 3000 ldrb.w r3, [sl] + 80412a0: 2b00 cmp r3, #0 + 80412a2: f000 80a2 beq.w 80413ea <_vfiprintf_r+0x20e> + 80412a6: 2300 movs r3, #0 + 80412a8: f04f 32ff mov.w r2, #4294967295 + 80412ac: e9cd 2305 strd r2, r3, [sp, #20] + 80412b0: f10a 0a01 add.w sl, sl, #1 + 80412b4: 9304 str r3, [sp, #16] + 80412b6: 9307 str r3, [sp, #28] + 80412b8: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 80412bc: 931a str r3, [sp, #104] ; 0x68 80412be: 4654 mov r4, sl - 80412c0: 2000 movs r0, #0 - 80412c2: f04f 0c0a mov.w ip, #10 - 80412c6: 4621 mov r1, r4 - 80412c8: f811 3b01 ldrb.w r3, [r1], #1 - 80412cc: 3b30 subs r3, #48 ; 0x30 - 80412ce: 2b09 cmp r3, #9 - 80412d0: d94e bls.n 8041370 <_vfiprintf_r+0x1c4> - 80412d2: b1b0 cbz r0, 8041302 <_vfiprintf_r+0x156> - 80412d4: 9207 str r2, [sp, #28] - 80412d6: e014 b.n 8041302 <_vfiprintf_r+0x156> - 80412d8: eba0 0308 sub.w r3, r0, r8 - 80412dc: fa09 f303 lsl.w r3, r9, r3 - 80412e0: 4313 orrs r3, r2 - 80412e2: 9304 str r3, [sp, #16] - 80412e4: 46a2 mov sl, r4 - 80412e6: e7d2 b.n 804128e <_vfiprintf_r+0xe2> - 80412e8: 9b03 ldr r3, [sp, #12] - 80412ea: 1d19 adds r1, r3, #4 - 80412ec: 681b ldr r3, [r3, #0] - 80412ee: 9103 str r1, [sp, #12] - 80412f0: 2b00 cmp r3, #0 - 80412f2: bfbb ittet lt - 80412f4: 425b neglt r3, r3 - 80412f6: f042 0202 orrlt.w r2, r2, #2 - 80412fa: 9307 strge r3, [sp, #28] - 80412fc: 9307 strlt r3, [sp, #28] - 80412fe: bfb8 it lt - 8041300: 9204 strlt r2, [sp, #16] - 8041302: 7823 ldrb r3, [r4, #0] - 8041304: 2b2e cmp r3, #46 ; 0x2e - 8041306: d10c bne.n 8041322 <_vfiprintf_r+0x176> - 8041308: 7863 ldrb r3, [r4, #1] - 804130a: 2b2a cmp r3, #42 ; 0x2a - 804130c: d135 bne.n 804137a <_vfiprintf_r+0x1ce> - 804130e: 9b03 ldr r3, [sp, #12] - 8041310: 1d1a adds r2, r3, #4 - 8041312: 681b ldr r3, [r3, #0] - 8041314: 9203 str r2, [sp, #12] - 8041316: 2b00 cmp r3, #0 - 8041318: bfb8 it lt - 804131a: f04f 33ff movlt.w r3, #4294967295 - 804131e: 3402 adds r4, #2 - 8041320: 9305 str r3, [sp, #20] - 8041322: f8df a0e4 ldr.w sl, [pc, #228] ; 8041408 <_vfiprintf_r+0x25c> - 8041326: 7821 ldrb r1, [r4, #0] - 8041328: 2203 movs r2, #3 - 804132a: 4650 mov r0, sl - 804132c: f7de fff0 bl 8020310 - 8041330: b140 cbz r0, 8041344 <_vfiprintf_r+0x198> - 8041332: 2340 movs r3, #64 ; 0x40 - 8041334: eba0 000a sub.w r0, r0, sl - 8041338: fa03 f000 lsl.w r0, r3, r0 - 804133c: 9b04 ldr r3, [sp, #16] - 804133e: 4303 orrs r3, r0 - 8041340: 3401 adds r4, #1 - 8041342: 9304 str r3, [sp, #16] - 8041344: f814 1b01 ldrb.w r1, [r4], #1 - 8041348: 482c ldr r0, [pc, #176] ; (80413fc <_vfiprintf_r+0x250>) - 804134a: f88d 1028 strb.w r1, [sp, #40] ; 0x28 - 804134e: 2206 movs r2, #6 - 8041350: f7de ffde bl 8020310 - 8041354: 2800 cmp r0, #0 - 8041356: d03f beq.n 80413d8 <_vfiprintf_r+0x22c> - 8041358: 4b29 ldr r3, [pc, #164] ; (8041400 <_vfiprintf_r+0x254>) - 804135a: bb1b cbnz r3, 80413a4 <_vfiprintf_r+0x1f8> - 804135c: 9b03 ldr r3, [sp, #12] - 804135e: 3307 adds r3, #7 - 8041360: f023 0307 bic.w r3, r3, #7 - 8041364: 3308 adds r3, #8 - 8041366: 9303 str r3, [sp, #12] - 8041368: 9b09 ldr r3, [sp, #36] ; 0x24 - 804136a: 443b add r3, r7 - 804136c: 9309 str r3, [sp, #36] ; 0x24 - 804136e: e767 b.n 8041240 <_vfiprintf_r+0x94> - 8041370: fb0c 3202 mla r2, ip, r2, r3 - 8041374: 460c mov r4, r1 - 8041376: 2001 movs r0, #1 - 8041378: e7a5 b.n 80412c6 <_vfiprintf_r+0x11a> - 804137a: 2300 movs r3, #0 - 804137c: 3401 adds r4, #1 - 804137e: 9305 str r3, [sp, #20] - 8041380: 4619 mov r1, r3 - 8041382: f04f 0c0a mov.w ip, #10 - 8041386: 4620 mov r0, r4 - 8041388: f810 2b01 ldrb.w r2, [r0], #1 - 804138c: 3a30 subs r2, #48 ; 0x30 - 804138e: 2a09 cmp r2, #9 - 8041390: d903 bls.n 804139a <_vfiprintf_r+0x1ee> - 8041392: 2b00 cmp r3, #0 - 8041394: d0c5 beq.n 8041322 <_vfiprintf_r+0x176> - 8041396: 9105 str r1, [sp, #20] - 8041398: e7c3 b.n 8041322 <_vfiprintf_r+0x176> - 804139a: fb0c 2101 mla r1, ip, r1, r2 - 804139e: 4604 mov r4, r0 - 80413a0: 2301 movs r3, #1 - 80413a2: e7f0 b.n 8041386 <_vfiprintf_r+0x1da> - 80413a4: ab03 add r3, sp, #12 - 80413a6: 9300 str r3, [sp, #0] - 80413a8: 462a mov r2, r5 - 80413aa: 4b16 ldr r3, [pc, #88] ; (8041404 <_vfiprintf_r+0x258>) - 80413ac: a904 add r1, sp, #16 - 80413ae: 4630 mov r0, r6 - 80413b0: f3af 8000 nop.w - 80413b4: 4607 mov r7, r0 - 80413b6: 1c78 adds r0, r7, #1 - 80413b8: d1d6 bne.n 8041368 <_vfiprintf_r+0x1bc> - 80413ba: 6e6b ldr r3, [r5, #100] ; 0x64 - 80413bc: 07d9 lsls r1, r3, #31 - 80413be: d405 bmi.n 80413cc <_vfiprintf_r+0x220> - 80413c0: 89ab ldrh r3, [r5, #12] - 80413c2: 059a lsls r2, r3, #22 - 80413c4: d402 bmi.n 80413cc <_vfiprintf_r+0x220> - 80413c6: 6da8 ldr r0, [r5, #88] ; 0x58 - 80413c8: f7ff fd5d bl 8040e86 <__retarget_lock_release_recursive> - 80413cc: 89ab ldrh r3, [r5, #12] - 80413ce: 065b lsls r3, r3, #25 - 80413d0: f53f af12 bmi.w 80411f8 <_vfiprintf_r+0x4c> - 80413d4: 9809 ldr r0, [sp, #36] ; 0x24 - 80413d6: e711 b.n 80411fc <_vfiprintf_r+0x50> - 80413d8: ab03 add r3, sp, #12 - 80413da: 9300 str r3, [sp, #0] - 80413dc: 462a mov r2, r5 - 80413de: 4b09 ldr r3, [pc, #36] ; (8041404 <_vfiprintf_r+0x258>) - 80413e0: a904 add r1, sp, #16 - 80413e2: 4630 mov r0, r6 - 80413e4: f000 f880 bl 80414e8 <_printf_i> - 80413e8: e7e4 b.n 80413b4 <_vfiprintf_r+0x208> - 80413ea: bf00 nop - 80413ec: 08044eb8 .word 0x08044eb8 - 80413f0: 08044ed8 .word 0x08044ed8 - 80413f4: 08044e98 .word 0x08044e98 - 80413f8: 08044ef8 .word 0x08044ef8 - 80413fc: 08044f02 .word 0x08044f02 - 8041400: 00000000 .word 0x00000000 - 8041404: 08041187 .word 0x08041187 - 8041408: 08044efe .word 0x08044efe - -0804140c <_printf_common>: - 804140c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} - 8041410: 4616 mov r6, r2 - 8041412: 4699 mov r9, r3 - 8041414: 688a ldr r2, [r1, #8] - 8041416: 690b ldr r3, [r1, #16] - 8041418: f8dd 8020 ldr.w r8, [sp, #32] - 804141c: 4293 cmp r3, r2 - 804141e: bfb8 it lt - 8041420: 4613 movlt r3, r2 - 8041422: 6033 str r3, [r6, #0] - 8041424: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 - 8041428: 4607 mov r7, r0 - 804142a: 460c mov r4, r1 - 804142c: b10a cbz r2, 8041432 <_printf_common+0x26> - 804142e: 3301 adds r3, #1 - 8041430: 6033 str r3, [r6, #0] - 8041432: 6823 ldr r3, [r4, #0] - 8041434: 0699 lsls r1, r3, #26 - 8041436: bf42 ittt mi - 8041438: 6833 ldrmi r3, [r6, #0] - 804143a: 3302 addmi r3, #2 - 804143c: 6033 strmi r3, [r6, #0] - 804143e: 6825 ldr r5, [r4, #0] - 8041440: f015 0506 ands.w r5, r5, #6 - 8041444: d106 bne.n 8041454 <_printf_common+0x48> - 8041446: f104 0a19 add.w sl, r4, #25 - 804144a: 68e3 ldr r3, [r4, #12] - 804144c: 6832 ldr r2, [r6, #0] - 804144e: 1a9b subs r3, r3, r2 - 8041450: 42ab cmp r3, r5 - 8041452: dc26 bgt.n 80414a2 <_printf_common+0x96> - 8041454: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 - 8041458: 1e13 subs r3, r2, #0 - 804145a: 6822 ldr r2, [r4, #0] - 804145c: bf18 it ne - 804145e: 2301 movne r3, #1 - 8041460: 0692 lsls r2, r2, #26 - 8041462: d42b bmi.n 80414bc <_printf_common+0xb0> - 8041464: f104 0243 add.w r2, r4, #67 ; 0x43 - 8041468: 4649 mov r1, r9 - 804146a: 4638 mov r0, r7 - 804146c: 47c0 blx r8 - 804146e: 3001 adds r0, #1 - 8041470: d01e beq.n 80414b0 <_printf_common+0xa4> - 8041472: 6823 ldr r3, [r4, #0] - 8041474: 68e5 ldr r5, [r4, #12] - 8041476: 6832 ldr r2, [r6, #0] - 8041478: f003 0306 and.w r3, r3, #6 - 804147c: 2b04 cmp r3, #4 - 804147e: bf08 it eq - 8041480: 1aad subeq r5, r5, r2 - 8041482: 68a3 ldr r3, [r4, #8] - 8041484: 6922 ldr r2, [r4, #16] - 8041486: bf0c ite eq - 8041488: ea25 75e5 biceq.w r5, r5, r5, asr #31 - 804148c: 2500 movne r5, #0 - 804148e: 4293 cmp r3, r2 - 8041490: bfc4 itt gt - 8041492: 1a9b subgt r3, r3, r2 - 8041494: 18ed addgt r5, r5, r3 - 8041496: 2600 movs r6, #0 - 8041498: 341a adds r4, #26 - 804149a: 42b5 cmp r5, r6 - 804149c: d11a bne.n 80414d4 <_printf_common+0xc8> - 804149e: 2000 movs r0, #0 - 80414a0: e008 b.n 80414b4 <_printf_common+0xa8> - 80414a2: 2301 movs r3, #1 - 80414a4: 4652 mov r2, sl - 80414a6: 4649 mov r1, r9 - 80414a8: 4638 mov r0, r7 - 80414aa: 47c0 blx r8 - 80414ac: 3001 adds r0, #1 - 80414ae: d103 bne.n 80414b8 <_printf_common+0xac> - 80414b0: f04f 30ff mov.w r0, #4294967295 - 80414b4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 80414b8: 3501 adds r5, #1 - 80414ba: e7c6 b.n 804144a <_printf_common+0x3e> - 80414bc: 18e1 adds r1, r4, r3 - 80414be: 1c5a adds r2, r3, #1 - 80414c0: 2030 movs r0, #48 ; 0x30 - 80414c2: f881 0043 strb.w r0, [r1, #67] ; 0x43 - 80414c6: 4422 add r2, r4 - 80414c8: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 - 80414cc: f882 1043 strb.w r1, [r2, #67] ; 0x43 - 80414d0: 3302 adds r3, #2 - 80414d2: e7c7 b.n 8041464 <_printf_common+0x58> - 80414d4: 2301 movs r3, #1 - 80414d6: 4622 mov r2, r4 - 80414d8: 4649 mov r1, r9 - 80414da: 4638 mov r0, r7 - 80414dc: 47c0 blx r8 - 80414de: 3001 adds r0, #1 - 80414e0: d0e6 beq.n 80414b0 <_printf_common+0xa4> - 80414e2: 3601 adds r6, #1 - 80414e4: e7d9 b.n 804149a <_printf_common+0x8e> + 80412c0: 2205 movs r2, #5 + 80412c2: f814 1b01 ldrb.w r1, [r4], #1 + 80412c6: 4858 ldr r0, [pc, #352] ; (8041428 <_vfiprintf_r+0x24c>) + 80412c8: f7df f822 bl 8020310 + 80412cc: 9a04 ldr r2, [sp, #16] + 80412ce: b9d8 cbnz r0, 8041308 <_vfiprintf_r+0x12c> + 80412d0: 06d1 lsls r1, r2, #27 + 80412d2: bf44 itt mi + 80412d4: 2320 movmi r3, #32 + 80412d6: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 80412da: 0713 lsls r3, r2, #28 + 80412dc: bf44 itt mi + 80412de: 232b movmi r3, #43 ; 0x2b + 80412e0: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 80412e4: f89a 3000 ldrb.w r3, [sl] + 80412e8: 2b2a cmp r3, #42 ; 0x2a + 80412ea: d015 beq.n 8041318 <_vfiprintf_r+0x13c> + 80412ec: 9a07 ldr r2, [sp, #28] + 80412ee: 4654 mov r4, sl + 80412f0: 2000 movs r0, #0 + 80412f2: f04f 0c0a mov.w ip, #10 + 80412f6: 4621 mov r1, r4 + 80412f8: f811 3b01 ldrb.w r3, [r1], #1 + 80412fc: 3b30 subs r3, #48 ; 0x30 + 80412fe: 2b09 cmp r3, #9 + 8041300: d94e bls.n 80413a0 <_vfiprintf_r+0x1c4> + 8041302: b1b0 cbz r0, 8041332 <_vfiprintf_r+0x156> + 8041304: 9207 str r2, [sp, #28] + 8041306: e014 b.n 8041332 <_vfiprintf_r+0x156> + 8041308: eba0 0308 sub.w r3, r0, r8 + 804130c: fa09 f303 lsl.w r3, r9, r3 + 8041310: 4313 orrs r3, r2 + 8041312: 9304 str r3, [sp, #16] + 8041314: 46a2 mov sl, r4 + 8041316: e7d2 b.n 80412be <_vfiprintf_r+0xe2> + 8041318: 9b03 ldr r3, [sp, #12] + 804131a: 1d19 adds r1, r3, #4 + 804131c: 681b ldr r3, [r3, #0] + 804131e: 9103 str r1, [sp, #12] + 8041320: 2b00 cmp r3, #0 + 8041322: bfbb ittet lt + 8041324: 425b neglt r3, r3 + 8041326: f042 0202 orrlt.w r2, r2, #2 + 804132a: 9307 strge r3, [sp, #28] + 804132c: 9307 strlt r3, [sp, #28] + 804132e: bfb8 it lt + 8041330: 9204 strlt r2, [sp, #16] + 8041332: 7823 ldrb r3, [r4, #0] + 8041334: 2b2e cmp r3, #46 ; 0x2e + 8041336: d10c bne.n 8041352 <_vfiprintf_r+0x176> + 8041338: 7863 ldrb r3, [r4, #1] + 804133a: 2b2a cmp r3, #42 ; 0x2a + 804133c: d135 bne.n 80413aa <_vfiprintf_r+0x1ce> + 804133e: 9b03 ldr r3, [sp, #12] + 8041340: 1d1a adds r2, r3, #4 + 8041342: 681b ldr r3, [r3, #0] + 8041344: 9203 str r2, [sp, #12] + 8041346: 2b00 cmp r3, #0 + 8041348: bfb8 it lt + 804134a: f04f 33ff movlt.w r3, #4294967295 + 804134e: 3402 adds r4, #2 + 8041350: 9305 str r3, [sp, #20] + 8041352: f8df a0e4 ldr.w sl, [pc, #228] ; 8041438 <_vfiprintf_r+0x25c> + 8041356: 7821 ldrb r1, [r4, #0] + 8041358: 2203 movs r2, #3 + 804135a: 4650 mov r0, sl + 804135c: f7de ffd8 bl 8020310 + 8041360: b140 cbz r0, 8041374 <_vfiprintf_r+0x198> + 8041362: 2340 movs r3, #64 ; 0x40 + 8041364: eba0 000a sub.w r0, r0, sl + 8041368: fa03 f000 lsl.w r0, r3, r0 + 804136c: 9b04 ldr r3, [sp, #16] + 804136e: 4303 orrs r3, r0 + 8041370: 3401 adds r4, #1 + 8041372: 9304 str r3, [sp, #16] + 8041374: f814 1b01 ldrb.w r1, [r4], #1 + 8041378: 482c ldr r0, [pc, #176] ; (804142c <_vfiprintf_r+0x250>) + 804137a: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 804137e: 2206 movs r2, #6 + 8041380: f7de ffc6 bl 8020310 + 8041384: 2800 cmp r0, #0 + 8041386: d03f beq.n 8041408 <_vfiprintf_r+0x22c> + 8041388: 4b29 ldr r3, [pc, #164] ; (8041430 <_vfiprintf_r+0x254>) + 804138a: bb1b cbnz r3, 80413d4 <_vfiprintf_r+0x1f8> + 804138c: 9b03 ldr r3, [sp, #12] + 804138e: 3307 adds r3, #7 + 8041390: f023 0307 bic.w r3, r3, #7 + 8041394: 3308 adds r3, #8 + 8041396: 9303 str r3, [sp, #12] + 8041398: 9b09 ldr r3, [sp, #36] ; 0x24 + 804139a: 443b add r3, r7 + 804139c: 9309 str r3, [sp, #36] ; 0x24 + 804139e: e767 b.n 8041270 <_vfiprintf_r+0x94> + 80413a0: fb0c 3202 mla r2, ip, r2, r3 + 80413a4: 460c mov r4, r1 + 80413a6: 2001 movs r0, #1 + 80413a8: e7a5 b.n 80412f6 <_vfiprintf_r+0x11a> + 80413aa: 2300 movs r3, #0 + 80413ac: 3401 adds r4, #1 + 80413ae: 9305 str r3, [sp, #20] + 80413b0: 4619 mov r1, r3 + 80413b2: f04f 0c0a mov.w ip, #10 + 80413b6: 4620 mov r0, r4 + 80413b8: f810 2b01 ldrb.w r2, [r0], #1 + 80413bc: 3a30 subs r2, #48 ; 0x30 + 80413be: 2a09 cmp r2, #9 + 80413c0: d903 bls.n 80413ca <_vfiprintf_r+0x1ee> + 80413c2: 2b00 cmp r3, #0 + 80413c4: d0c5 beq.n 8041352 <_vfiprintf_r+0x176> + 80413c6: 9105 str r1, [sp, #20] + 80413c8: e7c3 b.n 8041352 <_vfiprintf_r+0x176> + 80413ca: fb0c 2101 mla r1, ip, r1, r2 + 80413ce: 4604 mov r4, r0 + 80413d0: 2301 movs r3, #1 + 80413d2: e7f0 b.n 80413b6 <_vfiprintf_r+0x1da> + 80413d4: ab03 add r3, sp, #12 + 80413d6: 9300 str r3, [sp, #0] + 80413d8: 462a mov r2, r5 + 80413da: 4b16 ldr r3, [pc, #88] ; (8041434 <_vfiprintf_r+0x258>) + 80413dc: a904 add r1, sp, #16 + 80413de: 4630 mov r0, r6 + 80413e0: f3af 8000 nop.w + 80413e4: 4607 mov r7, r0 + 80413e6: 1c78 adds r0, r7, #1 + 80413e8: d1d6 bne.n 8041398 <_vfiprintf_r+0x1bc> + 80413ea: 6e6b ldr r3, [r5, #100] ; 0x64 + 80413ec: 07d9 lsls r1, r3, #31 + 80413ee: d405 bmi.n 80413fc <_vfiprintf_r+0x220> + 80413f0: 89ab ldrh r3, [r5, #12] + 80413f2: 059a lsls r2, r3, #22 + 80413f4: d402 bmi.n 80413fc <_vfiprintf_r+0x220> + 80413f6: 6da8 ldr r0, [r5, #88] ; 0x58 + 80413f8: f7ff fd5d bl 8040eb6 <__retarget_lock_release_recursive> + 80413fc: 89ab ldrh r3, [r5, #12] + 80413fe: 065b lsls r3, r3, #25 + 8041400: f53f af12 bmi.w 8041228 <_vfiprintf_r+0x4c> + 8041404: 9809 ldr r0, [sp, #36] ; 0x24 + 8041406: e711 b.n 804122c <_vfiprintf_r+0x50> + 8041408: ab03 add r3, sp, #12 + 804140a: 9300 str r3, [sp, #0] + 804140c: 462a mov r2, r5 + 804140e: 4b09 ldr r3, [pc, #36] ; (8041434 <_vfiprintf_r+0x258>) + 8041410: a904 add r1, sp, #16 + 8041412: 4630 mov r0, r6 + 8041414: f000 f880 bl 8041518 <_printf_i> + 8041418: e7e4 b.n 80413e4 <_vfiprintf_r+0x208> + 804141a: bf00 nop + 804141c: 08044ee8 .word 0x08044ee8 + 8041420: 08044f08 .word 0x08044f08 + 8041424: 08044ec8 .word 0x08044ec8 + 8041428: 08044f28 .word 0x08044f28 + 804142c: 08044f32 .word 0x08044f32 + 8041430: 00000000 .word 0x00000000 + 8041434: 080411b7 .word 0x080411b7 + 8041438: 08044f2e .word 0x08044f2e + +0804143c <_printf_common>: + 804143c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8041440: 4616 mov r6, r2 + 8041442: 4699 mov r9, r3 + 8041444: 688a ldr r2, [r1, #8] + 8041446: 690b ldr r3, [r1, #16] + 8041448: f8dd 8020 ldr.w r8, [sp, #32] + 804144c: 4293 cmp r3, r2 + 804144e: bfb8 it lt + 8041450: 4613 movlt r3, r2 + 8041452: 6033 str r3, [r6, #0] + 8041454: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 + 8041458: 4607 mov r7, r0 + 804145a: 460c mov r4, r1 + 804145c: b10a cbz r2, 8041462 <_printf_common+0x26> + 804145e: 3301 adds r3, #1 + 8041460: 6033 str r3, [r6, #0] + 8041462: 6823 ldr r3, [r4, #0] + 8041464: 0699 lsls r1, r3, #26 + 8041466: bf42 ittt mi + 8041468: 6833 ldrmi r3, [r6, #0] + 804146a: 3302 addmi r3, #2 + 804146c: 6033 strmi r3, [r6, #0] + 804146e: 6825 ldr r5, [r4, #0] + 8041470: f015 0506 ands.w r5, r5, #6 + 8041474: d106 bne.n 8041484 <_printf_common+0x48> + 8041476: f104 0a19 add.w sl, r4, #25 + 804147a: 68e3 ldr r3, [r4, #12] + 804147c: 6832 ldr r2, [r6, #0] + 804147e: 1a9b subs r3, r3, r2 + 8041480: 42ab cmp r3, r5 + 8041482: dc26 bgt.n 80414d2 <_printf_common+0x96> + 8041484: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 + 8041488: 1e13 subs r3, r2, #0 + 804148a: 6822 ldr r2, [r4, #0] + 804148c: bf18 it ne + 804148e: 2301 movne r3, #1 + 8041490: 0692 lsls r2, r2, #26 + 8041492: d42b bmi.n 80414ec <_printf_common+0xb0> + 8041494: f104 0243 add.w r2, r4, #67 ; 0x43 + 8041498: 4649 mov r1, r9 + 804149a: 4638 mov r0, r7 + 804149c: 47c0 blx r8 + 804149e: 3001 adds r0, #1 + 80414a0: d01e beq.n 80414e0 <_printf_common+0xa4> + 80414a2: 6823 ldr r3, [r4, #0] + 80414a4: 68e5 ldr r5, [r4, #12] + 80414a6: 6832 ldr r2, [r6, #0] + 80414a8: f003 0306 and.w r3, r3, #6 + 80414ac: 2b04 cmp r3, #4 + 80414ae: bf08 it eq + 80414b0: 1aad subeq r5, r5, r2 + 80414b2: 68a3 ldr r3, [r4, #8] + 80414b4: 6922 ldr r2, [r4, #16] + 80414b6: bf0c ite eq + 80414b8: ea25 75e5 biceq.w r5, r5, r5, asr #31 + 80414bc: 2500 movne r5, #0 + 80414be: 4293 cmp r3, r2 + 80414c0: bfc4 itt gt + 80414c2: 1a9b subgt r3, r3, r2 + 80414c4: 18ed addgt r5, r5, r3 + 80414c6: 2600 movs r6, #0 + 80414c8: 341a adds r4, #26 + 80414ca: 42b5 cmp r5, r6 + 80414cc: d11a bne.n 8041504 <_printf_common+0xc8> + 80414ce: 2000 movs r0, #0 + 80414d0: e008 b.n 80414e4 <_printf_common+0xa8> + 80414d2: 2301 movs r3, #1 + 80414d4: 4652 mov r2, sl + 80414d6: 4649 mov r1, r9 + 80414d8: 4638 mov r0, r7 + 80414da: 47c0 blx r8 + 80414dc: 3001 adds r0, #1 + 80414de: d103 bne.n 80414e8 <_printf_common+0xac> + 80414e0: f04f 30ff mov.w r0, #4294967295 + 80414e4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80414e8: 3501 adds r5, #1 + 80414ea: e7c6 b.n 804147a <_printf_common+0x3e> + 80414ec: 18e1 adds r1, r4, r3 + 80414ee: 1c5a adds r2, r3, #1 + 80414f0: 2030 movs r0, #48 ; 0x30 + 80414f2: f881 0043 strb.w r0, [r1, #67] ; 0x43 + 80414f6: 4422 add r2, r4 + 80414f8: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 + 80414fc: f882 1043 strb.w r1, [r2, #67] ; 0x43 + 8041500: 3302 adds r3, #2 + 8041502: e7c7 b.n 8041494 <_printf_common+0x58> + 8041504: 2301 movs r3, #1 + 8041506: 4622 mov r2, r4 + 8041508: 4649 mov r1, r9 + 804150a: 4638 mov r0, r7 + 804150c: 47c0 blx r8 + 804150e: 3001 adds r0, #1 + 8041510: d0e6 beq.n 80414e0 <_printf_common+0xa4> + 8041512: 3601 adds r6, #1 + 8041514: e7d9 b.n 80414ca <_printf_common+0x8e> ... -080414e8 <_printf_i>: - 80414e8: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} - 80414ec: 7e0f ldrb r7, [r1, #24] - 80414ee: 9d0c ldr r5, [sp, #48] ; 0x30 - 80414f0: 2f78 cmp r7, #120 ; 0x78 - 80414f2: 4691 mov r9, r2 - 80414f4: 4680 mov r8, r0 - 80414f6: 460c mov r4, r1 - 80414f8: 469a mov sl, r3 - 80414fa: f101 0243 add.w r2, r1, #67 ; 0x43 - 80414fe: d807 bhi.n 8041510 <_printf_i+0x28> - 8041500: 2f62 cmp r7, #98 ; 0x62 - 8041502: d80a bhi.n 804151a <_printf_i+0x32> - 8041504: 2f00 cmp r7, #0 - 8041506: f000 80d8 beq.w 80416ba <_printf_i+0x1d2> - 804150a: 2f58 cmp r7, #88 ; 0x58 - 804150c: f000 80a3 beq.w 8041656 <_printf_i+0x16e> - 8041510: f104 0542 add.w r5, r4, #66 ; 0x42 - 8041514: f884 7042 strb.w r7, [r4, #66] ; 0x42 - 8041518: e03a b.n 8041590 <_printf_i+0xa8> - 804151a: f1a7 0363 sub.w r3, r7, #99 ; 0x63 - 804151e: 2b15 cmp r3, #21 - 8041520: d8f6 bhi.n 8041510 <_printf_i+0x28> - 8041522: a101 add r1, pc, #4 ; (adr r1, 8041528 <_printf_i+0x40>) - 8041524: f851 f023 ldr.w pc, [r1, r3, lsl #2] - 8041528: 08041581 .word 0x08041581 - 804152c: 08041595 .word 0x08041595 - 8041530: 08041511 .word 0x08041511 - 8041534: 08041511 .word 0x08041511 - 8041538: 08041511 .word 0x08041511 - 804153c: 08041511 .word 0x08041511 - 8041540: 08041595 .word 0x08041595 - 8041544: 08041511 .word 0x08041511 - 8041548: 08041511 .word 0x08041511 - 804154c: 08041511 .word 0x08041511 - 8041550: 08041511 .word 0x08041511 - 8041554: 080416a1 .word 0x080416a1 - 8041558: 080415c5 .word 0x080415c5 - 804155c: 08041683 .word 0x08041683 - 8041560: 08041511 .word 0x08041511 - 8041564: 08041511 .word 0x08041511 - 8041568: 080416c3 .word 0x080416c3 - 804156c: 08041511 .word 0x08041511 +08041518 <_printf_i>: + 8041518: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} + 804151c: 7e0f ldrb r7, [r1, #24] + 804151e: 9d0c ldr r5, [sp, #48] ; 0x30 + 8041520: 2f78 cmp r7, #120 ; 0x78 + 8041522: 4691 mov r9, r2 + 8041524: 4680 mov r8, r0 + 8041526: 460c mov r4, r1 + 8041528: 469a mov sl, r3 + 804152a: f101 0243 add.w r2, r1, #67 ; 0x43 + 804152e: d807 bhi.n 8041540 <_printf_i+0x28> + 8041530: 2f62 cmp r7, #98 ; 0x62 + 8041532: d80a bhi.n 804154a <_printf_i+0x32> + 8041534: 2f00 cmp r7, #0 + 8041536: f000 80d8 beq.w 80416ea <_printf_i+0x1d2> + 804153a: 2f58 cmp r7, #88 ; 0x58 + 804153c: f000 80a3 beq.w 8041686 <_printf_i+0x16e> + 8041540: f104 0542 add.w r5, r4, #66 ; 0x42 + 8041544: f884 7042 strb.w r7, [r4, #66] ; 0x42 + 8041548: e03a b.n 80415c0 <_printf_i+0xa8> + 804154a: f1a7 0363 sub.w r3, r7, #99 ; 0x63 + 804154e: 2b15 cmp r3, #21 + 8041550: d8f6 bhi.n 8041540 <_printf_i+0x28> + 8041552: a101 add r1, pc, #4 ; (adr r1, 8041558 <_printf_i+0x40>) + 8041554: f851 f023 ldr.w pc, [r1, r3, lsl #2] + 8041558: 080415b1 .word 0x080415b1 + 804155c: 080415c5 .word 0x080415c5 + 8041560: 08041541 .word 0x08041541 + 8041564: 08041541 .word 0x08041541 + 8041568: 08041541 .word 0x08041541 + 804156c: 08041541 .word 0x08041541 8041570: 080415c5 .word 0x080415c5 - 8041574: 08041511 .word 0x08041511 - 8041578: 08041511 .word 0x08041511 - 804157c: 0804168b .word 0x0804168b - 8041580: 682b ldr r3, [r5, #0] - 8041582: 1d1a adds r2, r3, #4 - 8041584: 681b ldr r3, [r3, #0] - 8041586: 602a str r2, [r5, #0] - 8041588: f104 0542 add.w r5, r4, #66 ; 0x42 - 804158c: f884 3042 strb.w r3, [r4, #66] ; 0x42 - 8041590: 2301 movs r3, #1 - 8041592: e0a3 b.n 80416dc <_printf_i+0x1f4> - 8041594: 6820 ldr r0, [r4, #0] - 8041596: 6829 ldr r1, [r5, #0] - 8041598: 0606 lsls r6, r0, #24 - 804159a: f101 0304 add.w r3, r1, #4 - 804159e: d50a bpl.n 80415b6 <_printf_i+0xce> - 80415a0: 680e ldr r6, [r1, #0] - 80415a2: 602b str r3, [r5, #0] - 80415a4: 2e00 cmp r6, #0 - 80415a6: da03 bge.n 80415b0 <_printf_i+0xc8> - 80415a8: 232d movs r3, #45 ; 0x2d - 80415aa: 4276 negs r6, r6 - 80415ac: f884 3043 strb.w r3, [r4, #67] ; 0x43 - 80415b0: 485e ldr r0, [pc, #376] ; (804172c <_printf_i+0x244>) - 80415b2: 230a movs r3, #10 - 80415b4: e019 b.n 80415ea <_printf_i+0x102> - 80415b6: 680e ldr r6, [r1, #0] - 80415b8: 602b str r3, [r5, #0] - 80415ba: f010 0f40 tst.w r0, #64 ; 0x40 - 80415be: bf18 it ne - 80415c0: b236 sxthne r6, r6 - 80415c2: e7ef b.n 80415a4 <_printf_i+0xbc> - 80415c4: 682b ldr r3, [r5, #0] - 80415c6: 6820 ldr r0, [r4, #0] - 80415c8: 1d19 adds r1, r3, #4 - 80415ca: 6029 str r1, [r5, #0] - 80415cc: 0601 lsls r1, r0, #24 - 80415ce: d501 bpl.n 80415d4 <_printf_i+0xec> - 80415d0: 681e ldr r6, [r3, #0] - 80415d2: e002 b.n 80415da <_printf_i+0xf2> - 80415d4: 0646 lsls r6, r0, #25 - 80415d6: d5fb bpl.n 80415d0 <_printf_i+0xe8> - 80415d8: 881e ldrh r6, [r3, #0] - 80415da: 4854 ldr r0, [pc, #336] ; (804172c <_printf_i+0x244>) - 80415dc: 2f6f cmp r7, #111 ; 0x6f - 80415de: bf0c ite eq - 80415e0: 2308 moveq r3, #8 - 80415e2: 230a movne r3, #10 - 80415e4: 2100 movs r1, #0 - 80415e6: f884 1043 strb.w r1, [r4, #67] ; 0x43 - 80415ea: 6865 ldr r5, [r4, #4] - 80415ec: 60a5 str r5, [r4, #8] - 80415ee: 2d00 cmp r5, #0 - 80415f0: bfa2 ittt ge - 80415f2: 6821 ldrge r1, [r4, #0] - 80415f4: f021 0104 bicge.w r1, r1, #4 - 80415f8: 6021 strge r1, [r4, #0] - 80415fa: b90e cbnz r6, 8041600 <_printf_i+0x118> - 80415fc: 2d00 cmp r5, #0 - 80415fe: d04d beq.n 804169c <_printf_i+0x1b4> - 8041600: 4615 mov r5, r2 - 8041602: fbb6 f1f3 udiv r1, r6, r3 - 8041606: fb03 6711 mls r7, r3, r1, r6 - 804160a: 5dc7 ldrb r7, [r0, r7] - 804160c: f805 7d01 strb.w r7, [r5, #-1]! - 8041610: 4637 mov r7, r6 - 8041612: 42bb cmp r3, r7 - 8041614: 460e mov r6, r1 - 8041616: d9f4 bls.n 8041602 <_printf_i+0x11a> - 8041618: 2b08 cmp r3, #8 - 804161a: d10b bne.n 8041634 <_printf_i+0x14c> - 804161c: 6823 ldr r3, [r4, #0] - 804161e: 07de lsls r6, r3, #31 - 8041620: d508 bpl.n 8041634 <_printf_i+0x14c> - 8041622: 6923 ldr r3, [r4, #16] - 8041624: 6861 ldr r1, [r4, #4] - 8041626: 4299 cmp r1, r3 - 8041628: bfde ittt le - 804162a: 2330 movle r3, #48 ; 0x30 - 804162c: f805 3c01 strble.w r3, [r5, #-1] - 8041630: f105 35ff addle.w r5, r5, #4294967295 - 8041634: 1b52 subs r2, r2, r5 - 8041636: 6122 str r2, [r4, #16] - 8041638: f8cd a000 str.w sl, [sp] - 804163c: 464b mov r3, r9 - 804163e: aa03 add r2, sp, #12 - 8041640: 4621 mov r1, r4 - 8041642: 4640 mov r0, r8 - 8041644: f7ff fee2 bl 804140c <_printf_common> - 8041648: 3001 adds r0, #1 - 804164a: d14c bne.n 80416e6 <_printf_i+0x1fe> - 804164c: f04f 30ff mov.w r0, #4294967295 - 8041650: b004 add sp, #16 - 8041652: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 8041656: 4835 ldr r0, [pc, #212] ; (804172c <_printf_i+0x244>) - 8041658: f881 7045 strb.w r7, [r1, #69] ; 0x45 - 804165c: 6829 ldr r1, [r5, #0] - 804165e: 6823 ldr r3, [r4, #0] - 8041660: f851 6b04 ldr.w r6, [r1], #4 - 8041664: 6029 str r1, [r5, #0] - 8041666: 061d lsls r5, r3, #24 - 8041668: d514 bpl.n 8041694 <_printf_i+0x1ac> - 804166a: 07df lsls r7, r3, #31 - 804166c: bf44 itt mi - 804166e: f043 0320 orrmi.w r3, r3, #32 - 8041672: 6023 strmi r3, [r4, #0] - 8041674: b91e cbnz r6, 804167e <_printf_i+0x196> - 8041676: 6823 ldr r3, [r4, #0] - 8041678: f023 0320 bic.w r3, r3, #32 - 804167c: 6023 str r3, [r4, #0] - 804167e: 2310 movs r3, #16 - 8041680: e7b0 b.n 80415e4 <_printf_i+0xfc> - 8041682: 6823 ldr r3, [r4, #0] - 8041684: f043 0320 orr.w r3, r3, #32 - 8041688: 6023 str r3, [r4, #0] - 804168a: 2378 movs r3, #120 ; 0x78 - 804168c: 4828 ldr r0, [pc, #160] ; (8041730 <_printf_i+0x248>) - 804168e: f884 3045 strb.w r3, [r4, #69] ; 0x45 - 8041692: e7e3 b.n 804165c <_printf_i+0x174> - 8041694: 0659 lsls r1, r3, #25 - 8041696: bf48 it mi - 8041698: b2b6 uxthmi r6, r6 - 804169a: e7e6 b.n 804166a <_printf_i+0x182> - 804169c: 4615 mov r5, r2 - 804169e: e7bb b.n 8041618 <_printf_i+0x130> - 80416a0: 682b ldr r3, [r5, #0] - 80416a2: 6826 ldr r6, [r4, #0] - 80416a4: 6961 ldr r1, [r4, #20] - 80416a6: 1d18 adds r0, r3, #4 - 80416a8: 6028 str r0, [r5, #0] - 80416aa: 0635 lsls r5, r6, #24 - 80416ac: 681b ldr r3, [r3, #0] - 80416ae: d501 bpl.n 80416b4 <_printf_i+0x1cc> - 80416b0: 6019 str r1, [r3, #0] - 80416b2: e002 b.n 80416ba <_printf_i+0x1d2> - 80416b4: 0670 lsls r0, r6, #25 - 80416b6: d5fb bpl.n 80416b0 <_printf_i+0x1c8> - 80416b8: 8019 strh r1, [r3, #0] - 80416ba: 2300 movs r3, #0 - 80416bc: 6123 str r3, [r4, #16] - 80416be: 4615 mov r5, r2 - 80416c0: e7ba b.n 8041638 <_printf_i+0x150> - 80416c2: 682b ldr r3, [r5, #0] - 80416c4: 1d1a adds r2, r3, #4 - 80416c6: 602a str r2, [r5, #0] - 80416c8: 681d ldr r5, [r3, #0] - 80416ca: 6862 ldr r2, [r4, #4] - 80416cc: 2100 movs r1, #0 - 80416ce: 4628 mov r0, r5 - 80416d0: f7de fe1e bl 8020310 - 80416d4: b108 cbz r0, 80416da <_printf_i+0x1f2> - 80416d6: 1b40 subs r0, r0, r5 - 80416d8: 6060 str r0, [r4, #4] - 80416da: 6863 ldr r3, [r4, #4] - 80416dc: 6123 str r3, [r4, #16] - 80416de: 2300 movs r3, #0 - 80416e0: f884 3043 strb.w r3, [r4, #67] ; 0x43 - 80416e4: e7a8 b.n 8041638 <_printf_i+0x150> - 80416e6: 6923 ldr r3, [r4, #16] - 80416e8: 462a mov r2, r5 - 80416ea: 4649 mov r1, r9 - 80416ec: 4640 mov r0, r8 - 80416ee: 47d0 blx sl - 80416f0: 3001 adds r0, #1 - 80416f2: d0ab beq.n 804164c <_printf_i+0x164> - 80416f4: 6823 ldr r3, [r4, #0] - 80416f6: 079b lsls r3, r3, #30 - 80416f8: d413 bmi.n 8041722 <_printf_i+0x23a> - 80416fa: 68e0 ldr r0, [r4, #12] - 80416fc: 9b03 ldr r3, [sp, #12] - 80416fe: 4298 cmp r0, r3 - 8041700: bfb8 it lt - 8041702: 4618 movlt r0, r3 - 8041704: e7a4 b.n 8041650 <_printf_i+0x168> - 8041706: 2301 movs r3, #1 - 8041708: 4632 mov r2, r6 - 804170a: 4649 mov r1, r9 - 804170c: 4640 mov r0, r8 - 804170e: 47d0 blx sl - 8041710: 3001 adds r0, #1 - 8041712: d09b beq.n 804164c <_printf_i+0x164> - 8041714: 3501 adds r5, #1 - 8041716: 68e3 ldr r3, [r4, #12] - 8041718: 9903 ldr r1, [sp, #12] - 804171a: 1a5b subs r3, r3, r1 - 804171c: 42ab cmp r3, r5 - 804171e: dcf2 bgt.n 8041706 <_printf_i+0x21e> - 8041720: e7eb b.n 80416fa <_printf_i+0x212> - 8041722: 2500 movs r5, #0 - 8041724: f104 0619 add.w r6, r4, #25 - 8041728: e7f5 b.n 8041716 <_printf_i+0x22e> - 804172a: bf00 nop - 804172c: 08044f09 .word 0x08044f09 - 8041730: 08044f1a .word 0x08044f1a - -08041734 <__sread>: - 8041734: b510 push {r4, lr} - 8041736: 460c mov r4, r1 - 8041738: f9b1 100e ldrsh.w r1, [r1, #14] - 804173c: f000 fa92 bl 8041c64 <_read_r> - 8041740: 2800 cmp r0, #0 - 8041742: bfab itete ge - 8041744: 6d63 ldrge r3, [r4, #84] ; 0x54 - 8041746: 89a3 ldrhlt r3, [r4, #12] - 8041748: 181b addge r3, r3, r0 - 804174a: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 - 804174e: bfac ite ge - 8041750: 6563 strge r3, [r4, #84] ; 0x54 - 8041752: 81a3 strhlt r3, [r4, #12] - 8041754: bd10 pop {r4, pc} - -08041756 <__swrite>: - 8041756: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 804175a: 461f mov r7, r3 - 804175c: 898b ldrh r3, [r1, #12] - 804175e: 05db lsls r3, r3, #23 - 8041760: 4605 mov r5, r0 - 8041762: 460c mov r4, r1 - 8041764: 4616 mov r6, r2 - 8041766: d505 bpl.n 8041774 <__swrite+0x1e> + 8041574: 08041541 .word 0x08041541 + 8041578: 08041541 .word 0x08041541 + 804157c: 08041541 .word 0x08041541 + 8041580: 08041541 .word 0x08041541 + 8041584: 080416d1 .word 0x080416d1 + 8041588: 080415f5 .word 0x080415f5 + 804158c: 080416b3 .word 0x080416b3 + 8041590: 08041541 .word 0x08041541 + 8041594: 08041541 .word 0x08041541 + 8041598: 080416f3 .word 0x080416f3 + 804159c: 08041541 .word 0x08041541 + 80415a0: 080415f5 .word 0x080415f5 + 80415a4: 08041541 .word 0x08041541 + 80415a8: 08041541 .word 0x08041541 + 80415ac: 080416bb .word 0x080416bb + 80415b0: 682b ldr r3, [r5, #0] + 80415b2: 1d1a adds r2, r3, #4 + 80415b4: 681b ldr r3, [r3, #0] + 80415b6: 602a str r2, [r5, #0] + 80415b8: f104 0542 add.w r5, r4, #66 ; 0x42 + 80415bc: f884 3042 strb.w r3, [r4, #66] ; 0x42 + 80415c0: 2301 movs r3, #1 + 80415c2: e0a3 b.n 804170c <_printf_i+0x1f4> + 80415c4: 6820 ldr r0, [r4, #0] + 80415c6: 6829 ldr r1, [r5, #0] + 80415c8: 0606 lsls r6, r0, #24 + 80415ca: f101 0304 add.w r3, r1, #4 + 80415ce: d50a bpl.n 80415e6 <_printf_i+0xce> + 80415d0: 680e ldr r6, [r1, #0] + 80415d2: 602b str r3, [r5, #0] + 80415d4: 2e00 cmp r6, #0 + 80415d6: da03 bge.n 80415e0 <_printf_i+0xc8> + 80415d8: 232d movs r3, #45 ; 0x2d + 80415da: 4276 negs r6, r6 + 80415dc: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 80415e0: 485e ldr r0, [pc, #376] ; (804175c <_printf_i+0x244>) + 80415e2: 230a movs r3, #10 + 80415e4: e019 b.n 804161a <_printf_i+0x102> + 80415e6: 680e ldr r6, [r1, #0] + 80415e8: 602b str r3, [r5, #0] + 80415ea: f010 0f40 tst.w r0, #64 ; 0x40 + 80415ee: bf18 it ne + 80415f0: b236 sxthne r6, r6 + 80415f2: e7ef b.n 80415d4 <_printf_i+0xbc> + 80415f4: 682b ldr r3, [r5, #0] + 80415f6: 6820 ldr r0, [r4, #0] + 80415f8: 1d19 adds r1, r3, #4 + 80415fa: 6029 str r1, [r5, #0] + 80415fc: 0601 lsls r1, r0, #24 + 80415fe: d501 bpl.n 8041604 <_printf_i+0xec> + 8041600: 681e ldr r6, [r3, #0] + 8041602: e002 b.n 804160a <_printf_i+0xf2> + 8041604: 0646 lsls r6, r0, #25 + 8041606: d5fb bpl.n 8041600 <_printf_i+0xe8> + 8041608: 881e ldrh r6, [r3, #0] + 804160a: 4854 ldr r0, [pc, #336] ; (804175c <_printf_i+0x244>) + 804160c: 2f6f cmp r7, #111 ; 0x6f + 804160e: bf0c ite eq + 8041610: 2308 moveq r3, #8 + 8041612: 230a movne r3, #10 + 8041614: 2100 movs r1, #0 + 8041616: f884 1043 strb.w r1, [r4, #67] ; 0x43 + 804161a: 6865 ldr r5, [r4, #4] + 804161c: 60a5 str r5, [r4, #8] + 804161e: 2d00 cmp r5, #0 + 8041620: bfa2 ittt ge + 8041622: 6821 ldrge r1, [r4, #0] + 8041624: f021 0104 bicge.w r1, r1, #4 + 8041628: 6021 strge r1, [r4, #0] + 804162a: b90e cbnz r6, 8041630 <_printf_i+0x118> + 804162c: 2d00 cmp r5, #0 + 804162e: d04d beq.n 80416cc <_printf_i+0x1b4> + 8041630: 4615 mov r5, r2 + 8041632: fbb6 f1f3 udiv r1, r6, r3 + 8041636: fb03 6711 mls r7, r3, r1, r6 + 804163a: 5dc7 ldrb r7, [r0, r7] + 804163c: f805 7d01 strb.w r7, [r5, #-1]! + 8041640: 4637 mov r7, r6 + 8041642: 42bb cmp r3, r7 + 8041644: 460e mov r6, r1 + 8041646: d9f4 bls.n 8041632 <_printf_i+0x11a> + 8041648: 2b08 cmp r3, #8 + 804164a: d10b bne.n 8041664 <_printf_i+0x14c> + 804164c: 6823 ldr r3, [r4, #0] + 804164e: 07de lsls r6, r3, #31 + 8041650: d508 bpl.n 8041664 <_printf_i+0x14c> + 8041652: 6923 ldr r3, [r4, #16] + 8041654: 6861 ldr r1, [r4, #4] + 8041656: 4299 cmp r1, r3 + 8041658: bfde ittt le + 804165a: 2330 movle r3, #48 ; 0x30 + 804165c: f805 3c01 strble.w r3, [r5, #-1] + 8041660: f105 35ff addle.w r5, r5, #4294967295 + 8041664: 1b52 subs r2, r2, r5 + 8041666: 6122 str r2, [r4, #16] + 8041668: f8cd a000 str.w sl, [sp] + 804166c: 464b mov r3, r9 + 804166e: aa03 add r2, sp, #12 + 8041670: 4621 mov r1, r4 + 8041672: 4640 mov r0, r8 + 8041674: f7ff fee2 bl 804143c <_printf_common> + 8041678: 3001 adds r0, #1 + 804167a: d14c bne.n 8041716 <_printf_i+0x1fe> + 804167c: f04f 30ff mov.w r0, #4294967295 + 8041680: b004 add sp, #16 + 8041682: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8041686: 4835 ldr r0, [pc, #212] ; (804175c <_printf_i+0x244>) + 8041688: f881 7045 strb.w r7, [r1, #69] ; 0x45 + 804168c: 6829 ldr r1, [r5, #0] + 804168e: 6823 ldr r3, [r4, #0] + 8041690: f851 6b04 ldr.w r6, [r1], #4 + 8041694: 6029 str r1, [r5, #0] + 8041696: 061d lsls r5, r3, #24 + 8041698: d514 bpl.n 80416c4 <_printf_i+0x1ac> + 804169a: 07df lsls r7, r3, #31 + 804169c: bf44 itt mi + 804169e: f043 0320 orrmi.w r3, r3, #32 + 80416a2: 6023 strmi r3, [r4, #0] + 80416a4: b91e cbnz r6, 80416ae <_printf_i+0x196> + 80416a6: 6823 ldr r3, [r4, #0] + 80416a8: f023 0320 bic.w r3, r3, #32 + 80416ac: 6023 str r3, [r4, #0] + 80416ae: 2310 movs r3, #16 + 80416b0: e7b0 b.n 8041614 <_printf_i+0xfc> + 80416b2: 6823 ldr r3, [r4, #0] + 80416b4: f043 0320 orr.w r3, r3, #32 + 80416b8: 6023 str r3, [r4, #0] + 80416ba: 2378 movs r3, #120 ; 0x78 + 80416bc: 4828 ldr r0, [pc, #160] ; (8041760 <_printf_i+0x248>) + 80416be: f884 3045 strb.w r3, [r4, #69] ; 0x45 + 80416c2: e7e3 b.n 804168c <_printf_i+0x174> + 80416c4: 0659 lsls r1, r3, #25 + 80416c6: bf48 it mi + 80416c8: b2b6 uxthmi r6, r6 + 80416ca: e7e6 b.n 804169a <_printf_i+0x182> + 80416cc: 4615 mov r5, r2 + 80416ce: e7bb b.n 8041648 <_printf_i+0x130> + 80416d0: 682b ldr r3, [r5, #0] + 80416d2: 6826 ldr r6, [r4, #0] + 80416d4: 6961 ldr r1, [r4, #20] + 80416d6: 1d18 adds r0, r3, #4 + 80416d8: 6028 str r0, [r5, #0] + 80416da: 0635 lsls r5, r6, #24 + 80416dc: 681b ldr r3, [r3, #0] + 80416de: d501 bpl.n 80416e4 <_printf_i+0x1cc> + 80416e0: 6019 str r1, [r3, #0] + 80416e2: e002 b.n 80416ea <_printf_i+0x1d2> + 80416e4: 0670 lsls r0, r6, #25 + 80416e6: d5fb bpl.n 80416e0 <_printf_i+0x1c8> + 80416e8: 8019 strh r1, [r3, #0] + 80416ea: 2300 movs r3, #0 + 80416ec: 6123 str r3, [r4, #16] + 80416ee: 4615 mov r5, r2 + 80416f0: e7ba b.n 8041668 <_printf_i+0x150> + 80416f2: 682b ldr r3, [r5, #0] + 80416f4: 1d1a adds r2, r3, #4 + 80416f6: 602a str r2, [r5, #0] + 80416f8: 681d ldr r5, [r3, #0] + 80416fa: 6862 ldr r2, [r4, #4] + 80416fc: 2100 movs r1, #0 + 80416fe: 4628 mov r0, r5 + 8041700: f7de fe06 bl 8020310 + 8041704: b108 cbz r0, 804170a <_printf_i+0x1f2> + 8041706: 1b40 subs r0, r0, r5 + 8041708: 6060 str r0, [r4, #4] + 804170a: 6863 ldr r3, [r4, #4] + 804170c: 6123 str r3, [r4, #16] + 804170e: 2300 movs r3, #0 + 8041710: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8041714: e7a8 b.n 8041668 <_printf_i+0x150> + 8041716: 6923 ldr r3, [r4, #16] + 8041718: 462a mov r2, r5 + 804171a: 4649 mov r1, r9 + 804171c: 4640 mov r0, r8 + 804171e: 47d0 blx sl + 8041720: 3001 adds r0, #1 + 8041722: d0ab beq.n 804167c <_printf_i+0x164> + 8041724: 6823 ldr r3, [r4, #0] + 8041726: 079b lsls r3, r3, #30 + 8041728: d413 bmi.n 8041752 <_printf_i+0x23a> + 804172a: 68e0 ldr r0, [r4, #12] + 804172c: 9b03 ldr r3, [sp, #12] + 804172e: 4298 cmp r0, r3 + 8041730: bfb8 it lt + 8041732: 4618 movlt r0, r3 + 8041734: e7a4 b.n 8041680 <_printf_i+0x168> + 8041736: 2301 movs r3, #1 + 8041738: 4632 mov r2, r6 + 804173a: 4649 mov r1, r9 + 804173c: 4640 mov r0, r8 + 804173e: 47d0 blx sl + 8041740: 3001 adds r0, #1 + 8041742: d09b beq.n 804167c <_printf_i+0x164> + 8041744: 3501 adds r5, #1 + 8041746: 68e3 ldr r3, [r4, #12] + 8041748: 9903 ldr r1, [sp, #12] + 804174a: 1a5b subs r3, r3, r1 + 804174c: 42ab cmp r3, r5 + 804174e: dcf2 bgt.n 8041736 <_printf_i+0x21e> + 8041750: e7eb b.n 804172a <_printf_i+0x212> + 8041752: 2500 movs r5, #0 + 8041754: f104 0619 add.w r6, r4, #25 + 8041758: e7f5 b.n 8041746 <_printf_i+0x22e> + 804175a: bf00 nop + 804175c: 08044f39 .word 0x08044f39 + 8041760: 08044f4a .word 0x08044f4a + +08041764 <__sread>: + 8041764: b510 push {r4, lr} + 8041766: 460c mov r4, r1 8041768: f9b1 100e ldrsh.w r1, [r1, #14] - 804176c: 2302 movs r3, #2 - 804176e: 2200 movs r2, #0 - 8041770: f000 f9d0 bl 8041b14 <_lseek_r> - 8041774: 89a3 ldrh r3, [r4, #12] - 8041776: f9b4 100e ldrsh.w r1, [r4, #14] - 804177a: f423 5380 bic.w r3, r3, #4096 ; 0x1000 - 804177e: 81a3 strh r3, [r4, #12] - 8041780: 4632 mov r2, r6 - 8041782: 463b mov r3, r7 - 8041784: 4628 mov r0, r5 - 8041786: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} - 804178a: f000 b869 b.w 8041860 <_write_r> - -0804178e <__sseek>: - 804178e: b510 push {r4, lr} - 8041790: 460c mov r4, r1 - 8041792: f9b1 100e ldrsh.w r1, [r1, #14] - 8041796: f000 f9bd bl 8041b14 <_lseek_r> - 804179a: 1c43 adds r3, r0, #1 - 804179c: 89a3 ldrh r3, [r4, #12] - 804179e: bf15 itete ne - 80417a0: 6560 strne r0, [r4, #84] ; 0x54 - 80417a2: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 - 80417a6: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 - 80417aa: 81a3 strheq r3, [r4, #12] - 80417ac: bf18 it ne - 80417ae: 81a3 strhne r3, [r4, #12] - 80417b0: bd10 pop {r4, pc} - -080417b2 <__sclose>: - 80417b2: f9b1 100e ldrsh.w r1, [r1, #14] - 80417b6: f000 b8db b.w 8041970 <_close_r> + 804176c: f000 fa92 bl 8041c94 <_read_r> + 8041770: 2800 cmp r0, #0 + 8041772: bfab itete ge + 8041774: 6d63 ldrge r3, [r4, #84] ; 0x54 + 8041776: 89a3 ldrhlt r3, [r4, #12] + 8041778: 181b addge r3, r3, r0 + 804177a: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 + 804177e: bfac ite ge + 8041780: 6563 strge r3, [r4, #84] ; 0x54 + 8041782: 81a3 strhlt r3, [r4, #12] + 8041784: bd10 pop {r4, pc} + +08041786 <__swrite>: + 8041786: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 804178a: 461f mov r7, r3 + 804178c: 898b ldrh r3, [r1, #12] + 804178e: 05db lsls r3, r3, #23 + 8041790: 4605 mov r5, r0 + 8041792: 460c mov r4, r1 + 8041794: 4616 mov r6, r2 + 8041796: d505 bpl.n 80417a4 <__swrite+0x1e> + 8041798: f9b1 100e ldrsh.w r1, [r1, #14] + 804179c: 2302 movs r3, #2 + 804179e: 2200 movs r2, #0 + 80417a0: f000 f9d0 bl 8041b44 <_lseek_r> + 80417a4: 89a3 ldrh r3, [r4, #12] + 80417a6: f9b4 100e ldrsh.w r1, [r4, #14] + 80417aa: f423 5380 bic.w r3, r3, #4096 ; 0x1000 + 80417ae: 81a3 strh r3, [r4, #12] + 80417b0: 4632 mov r2, r6 + 80417b2: 463b mov r3, r7 + 80417b4: 4628 mov r0, r5 + 80417b6: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} + 80417ba: f000 b869 b.w 8041890 <_write_r> + +080417be <__sseek>: + 80417be: b510 push {r4, lr} + 80417c0: 460c mov r4, r1 + 80417c2: f9b1 100e ldrsh.w r1, [r1, #14] + 80417c6: f000 f9bd bl 8041b44 <_lseek_r> + 80417ca: 1c43 adds r3, r0, #1 + 80417cc: 89a3 ldrh r3, [r4, #12] + 80417ce: bf15 itete ne + 80417d0: 6560 strne r0, [r4, #84] ; 0x54 + 80417d2: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 + 80417d6: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 + 80417da: 81a3 strheq r3, [r4, #12] + 80417dc: bf18 it ne + 80417de: 81a3 strhne r3, [r4, #12] + 80417e0: bd10 pop {r4, pc} + +080417e2 <__sclose>: + 80417e2: f9b1 100e ldrsh.w r1, [r1, #14] + 80417e6: f000 b8db b.w 80419a0 <_close_r> ... -080417bc <__swbuf_r>: - 80417bc: b5f8 push {r3, r4, r5, r6, r7, lr} - 80417be: 460e mov r6, r1 - 80417c0: 4614 mov r4, r2 - 80417c2: 4605 mov r5, r0 - 80417c4: b118 cbz r0, 80417ce <__swbuf_r+0x12> - 80417c6: 6983 ldr r3, [r0, #24] - 80417c8: b90b cbnz r3, 80417ce <__swbuf_r+0x12> - 80417ca: f7ff faab bl 8040d24 <__sinit> - 80417ce: 4b21 ldr r3, [pc, #132] ; (8041854 <__swbuf_r+0x98>) - 80417d0: 429c cmp r4, r3 - 80417d2: d12b bne.n 804182c <__swbuf_r+0x70> - 80417d4: 686c ldr r4, [r5, #4] - 80417d6: 69a3 ldr r3, [r4, #24] - 80417d8: 60a3 str r3, [r4, #8] - 80417da: 89a3 ldrh r3, [r4, #12] - 80417dc: 071a lsls r2, r3, #28 - 80417de: d52f bpl.n 8041840 <__swbuf_r+0x84> - 80417e0: 6923 ldr r3, [r4, #16] - 80417e2: b36b cbz r3, 8041840 <__swbuf_r+0x84> - 80417e4: 6923 ldr r3, [r4, #16] - 80417e6: 6820 ldr r0, [r4, #0] - 80417e8: 1ac0 subs r0, r0, r3 - 80417ea: 6963 ldr r3, [r4, #20] - 80417ec: b2f6 uxtb r6, r6 - 80417ee: 4283 cmp r3, r0 - 80417f0: 4637 mov r7, r6 - 80417f2: dc04 bgt.n 80417fe <__swbuf_r+0x42> - 80417f4: 4621 mov r1, r4 - 80417f6: 4628 mov r0, r5 - 80417f8: f000 f950 bl 8041a9c <_fflush_r> - 80417fc: bb30 cbnz r0, 804184c <__swbuf_r+0x90> - 80417fe: 68a3 ldr r3, [r4, #8] - 8041800: 3b01 subs r3, #1 - 8041802: 60a3 str r3, [r4, #8] - 8041804: 6823 ldr r3, [r4, #0] - 8041806: 1c5a adds r2, r3, #1 - 8041808: 6022 str r2, [r4, #0] - 804180a: 701e strb r6, [r3, #0] - 804180c: 6963 ldr r3, [r4, #20] - 804180e: 3001 adds r0, #1 - 8041810: 4283 cmp r3, r0 - 8041812: d004 beq.n 804181e <__swbuf_r+0x62> - 8041814: 89a3 ldrh r3, [r4, #12] - 8041816: 07db lsls r3, r3, #31 - 8041818: d506 bpl.n 8041828 <__swbuf_r+0x6c> - 804181a: 2e0a cmp r6, #10 - 804181c: d104 bne.n 8041828 <__swbuf_r+0x6c> - 804181e: 4621 mov r1, r4 - 8041820: 4628 mov r0, r5 - 8041822: f000 f93b bl 8041a9c <_fflush_r> - 8041826: b988 cbnz r0, 804184c <__swbuf_r+0x90> - 8041828: 4638 mov r0, r7 - 804182a: bdf8 pop {r3, r4, r5, r6, r7, pc} - 804182c: 4b0a ldr r3, [pc, #40] ; (8041858 <__swbuf_r+0x9c>) - 804182e: 429c cmp r4, r3 - 8041830: d101 bne.n 8041836 <__swbuf_r+0x7a> - 8041832: 68ac ldr r4, [r5, #8] - 8041834: e7cf b.n 80417d6 <__swbuf_r+0x1a> - 8041836: 4b09 ldr r3, [pc, #36] ; (804185c <__swbuf_r+0xa0>) - 8041838: 429c cmp r4, r3 - 804183a: bf08 it eq - 804183c: 68ec ldreq r4, [r5, #12] - 804183e: e7ca b.n 80417d6 <__swbuf_r+0x1a> - 8041840: 4621 mov r1, r4 - 8041842: 4628 mov r0, r5 - 8041844: f000 f81e bl 8041884 <__swsetup_r> - 8041848: 2800 cmp r0, #0 - 804184a: d0cb beq.n 80417e4 <__swbuf_r+0x28> - 804184c: f04f 37ff mov.w r7, #4294967295 - 8041850: e7ea b.n 8041828 <__swbuf_r+0x6c> - 8041852: bf00 nop - 8041854: 08044eb8 .word 0x08044eb8 - 8041858: 08044ed8 .word 0x08044ed8 - 804185c: 08044e98 .word 0x08044e98 - -08041860 <_write_r>: - 8041860: b538 push {r3, r4, r5, lr} - 8041862: 4d07 ldr r5, [pc, #28] ; (8041880 <_write_r+0x20>) - 8041864: 4604 mov r4, r0 - 8041866: 4608 mov r0, r1 - 8041868: 4611 mov r1, r2 - 804186a: 2200 movs r2, #0 - 804186c: 602a str r2, [r5, #0] - 804186e: 461a mov r2, r3 - 8041870: f7e2 ffa7 bl 80247c2 <_write> - 8041874: 1c43 adds r3, r0, #1 - 8041876: d102 bne.n 804187e <_write_r+0x1e> - 8041878: 682b ldr r3, [r5, #0] - 804187a: b103 cbz r3, 804187e <_write_r+0x1e> - 804187c: 6023 str r3, [r4, #0] - 804187e: bd38 pop {r3, r4, r5, pc} - 8041880: 2400eabc .word 0x2400eabc - -08041884 <__swsetup_r>: - 8041884: 4b32 ldr r3, [pc, #200] ; (8041950 <__swsetup_r+0xcc>) - 8041886: b570 push {r4, r5, r6, lr} - 8041888: 681d ldr r5, [r3, #0] - 804188a: 4606 mov r6, r0 - 804188c: 460c mov r4, r1 - 804188e: b125 cbz r5, 804189a <__swsetup_r+0x16> - 8041890: 69ab ldr r3, [r5, #24] - 8041892: b913 cbnz r3, 804189a <__swsetup_r+0x16> - 8041894: 4628 mov r0, r5 - 8041896: f7ff fa45 bl 8040d24 <__sinit> - 804189a: 4b2e ldr r3, [pc, #184] ; (8041954 <__swsetup_r+0xd0>) - 804189c: 429c cmp r4, r3 - 804189e: d10f bne.n 80418c0 <__swsetup_r+0x3c> - 80418a0: 686c ldr r4, [r5, #4] - 80418a2: 89a3 ldrh r3, [r4, #12] - 80418a4: f9b4 200c ldrsh.w r2, [r4, #12] - 80418a8: 0719 lsls r1, r3, #28 - 80418aa: d42c bmi.n 8041906 <__swsetup_r+0x82> - 80418ac: 06dd lsls r5, r3, #27 - 80418ae: d411 bmi.n 80418d4 <__swsetup_r+0x50> - 80418b0: 2309 movs r3, #9 - 80418b2: 6033 str r3, [r6, #0] - 80418b4: f042 0340 orr.w r3, r2, #64 ; 0x40 - 80418b8: 81a3 strh r3, [r4, #12] - 80418ba: f04f 30ff mov.w r0, #4294967295 - 80418be: e03e b.n 804193e <__swsetup_r+0xba> - 80418c0: 4b25 ldr r3, [pc, #148] ; (8041958 <__swsetup_r+0xd4>) - 80418c2: 429c cmp r4, r3 - 80418c4: d101 bne.n 80418ca <__swsetup_r+0x46> - 80418c6: 68ac ldr r4, [r5, #8] - 80418c8: e7eb b.n 80418a2 <__swsetup_r+0x1e> - 80418ca: 4b24 ldr r3, [pc, #144] ; (804195c <__swsetup_r+0xd8>) +080417ec <__swbuf_r>: + 80417ec: b5f8 push {r3, r4, r5, r6, r7, lr} + 80417ee: 460e mov r6, r1 + 80417f0: 4614 mov r4, r2 + 80417f2: 4605 mov r5, r0 + 80417f4: b118 cbz r0, 80417fe <__swbuf_r+0x12> + 80417f6: 6983 ldr r3, [r0, #24] + 80417f8: b90b cbnz r3, 80417fe <__swbuf_r+0x12> + 80417fa: f7ff faab bl 8040d54 <__sinit> + 80417fe: 4b21 ldr r3, [pc, #132] ; (8041884 <__swbuf_r+0x98>) + 8041800: 429c cmp r4, r3 + 8041802: d12b bne.n 804185c <__swbuf_r+0x70> + 8041804: 686c ldr r4, [r5, #4] + 8041806: 69a3 ldr r3, [r4, #24] + 8041808: 60a3 str r3, [r4, #8] + 804180a: 89a3 ldrh r3, [r4, #12] + 804180c: 071a lsls r2, r3, #28 + 804180e: d52f bpl.n 8041870 <__swbuf_r+0x84> + 8041810: 6923 ldr r3, [r4, #16] + 8041812: b36b cbz r3, 8041870 <__swbuf_r+0x84> + 8041814: 6923 ldr r3, [r4, #16] + 8041816: 6820 ldr r0, [r4, #0] + 8041818: 1ac0 subs r0, r0, r3 + 804181a: 6963 ldr r3, [r4, #20] + 804181c: b2f6 uxtb r6, r6 + 804181e: 4283 cmp r3, r0 + 8041820: 4637 mov r7, r6 + 8041822: dc04 bgt.n 804182e <__swbuf_r+0x42> + 8041824: 4621 mov r1, r4 + 8041826: 4628 mov r0, r5 + 8041828: f000 f950 bl 8041acc <_fflush_r> + 804182c: bb30 cbnz r0, 804187c <__swbuf_r+0x90> + 804182e: 68a3 ldr r3, [r4, #8] + 8041830: 3b01 subs r3, #1 + 8041832: 60a3 str r3, [r4, #8] + 8041834: 6823 ldr r3, [r4, #0] + 8041836: 1c5a adds r2, r3, #1 + 8041838: 6022 str r2, [r4, #0] + 804183a: 701e strb r6, [r3, #0] + 804183c: 6963 ldr r3, [r4, #20] + 804183e: 3001 adds r0, #1 + 8041840: 4283 cmp r3, r0 + 8041842: d004 beq.n 804184e <__swbuf_r+0x62> + 8041844: 89a3 ldrh r3, [r4, #12] + 8041846: 07db lsls r3, r3, #31 + 8041848: d506 bpl.n 8041858 <__swbuf_r+0x6c> + 804184a: 2e0a cmp r6, #10 + 804184c: d104 bne.n 8041858 <__swbuf_r+0x6c> + 804184e: 4621 mov r1, r4 + 8041850: 4628 mov r0, r5 + 8041852: f000 f93b bl 8041acc <_fflush_r> + 8041856: b988 cbnz r0, 804187c <__swbuf_r+0x90> + 8041858: 4638 mov r0, r7 + 804185a: bdf8 pop {r3, r4, r5, r6, r7, pc} + 804185c: 4b0a ldr r3, [pc, #40] ; (8041888 <__swbuf_r+0x9c>) + 804185e: 429c cmp r4, r3 + 8041860: d101 bne.n 8041866 <__swbuf_r+0x7a> + 8041862: 68ac ldr r4, [r5, #8] + 8041864: e7cf b.n 8041806 <__swbuf_r+0x1a> + 8041866: 4b09 ldr r3, [pc, #36] ; (804188c <__swbuf_r+0xa0>) + 8041868: 429c cmp r4, r3 + 804186a: bf08 it eq + 804186c: 68ec ldreq r4, [r5, #12] + 804186e: e7ca b.n 8041806 <__swbuf_r+0x1a> + 8041870: 4621 mov r1, r4 + 8041872: 4628 mov r0, r5 + 8041874: f000 f81e bl 80418b4 <__swsetup_r> + 8041878: 2800 cmp r0, #0 + 804187a: d0cb beq.n 8041814 <__swbuf_r+0x28> + 804187c: f04f 37ff mov.w r7, #4294967295 + 8041880: e7ea b.n 8041858 <__swbuf_r+0x6c> + 8041882: bf00 nop + 8041884: 08044ee8 .word 0x08044ee8 + 8041888: 08044f08 .word 0x08044f08 + 804188c: 08044ec8 .word 0x08044ec8 + +08041890 <_write_r>: + 8041890: b538 push {r3, r4, r5, lr} + 8041892: 4d07 ldr r5, [pc, #28] ; (80418b0 <_write_r+0x20>) + 8041894: 4604 mov r4, r0 + 8041896: 4608 mov r0, r1 + 8041898: 4611 mov r1, r2 + 804189a: 2200 movs r2, #0 + 804189c: 602a str r2, [r5, #0] + 804189e: 461a mov r2, r3 + 80418a0: f7e2 ffa7 bl 80247f2 <_write> + 80418a4: 1c43 adds r3, r0, #1 + 80418a6: d102 bne.n 80418ae <_write_r+0x1e> + 80418a8: 682b ldr r3, [r5, #0] + 80418aa: b103 cbz r3, 80418ae <_write_r+0x1e> + 80418ac: 6023 str r3, [r4, #0] + 80418ae: bd38 pop {r3, r4, r5, pc} + 80418b0: 2400eabc .word 0x2400eabc + +080418b4 <__swsetup_r>: + 80418b4: 4b32 ldr r3, [pc, #200] ; (8041980 <__swsetup_r+0xcc>) + 80418b6: b570 push {r4, r5, r6, lr} + 80418b8: 681d ldr r5, [r3, #0] + 80418ba: 4606 mov r6, r0 + 80418bc: 460c mov r4, r1 + 80418be: b125 cbz r5, 80418ca <__swsetup_r+0x16> + 80418c0: 69ab ldr r3, [r5, #24] + 80418c2: b913 cbnz r3, 80418ca <__swsetup_r+0x16> + 80418c4: 4628 mov r0, r5 + 80418c6: f7ff fa45 bl 8040d54 <__sinit> + 80418ca: 4b2e ldr r3, [pc, #184] ; (8041984 <__swsetup_r+0xd0>) 80418cc: 429c cmp r4, r3 - 80418ce: bf08 it eq - 80418d0: 68ec ldreq r4, [r5, #12] - 80418d2: e7e6 b.n 80418a2 <__swsetup_r+0x1e> - 80418d4: 0758 lsls r0, r3, #29 - 80418d6: d512 bpl.n 80418fe <__swsetup_r+0x7a> - 80418d8: 6b61 ldr r1, [r4, #52] ; 0x34 - 80418da: b141 cbz r1, 80418ee <__swsetup_r+0x6a> - 80418dc: f104 0344 add.w r3, r4, #68 ; 0x44 - 80418e0: 4299 cmp r1, r3 - 80418e2: d002 beq.n 80418ea <__swsetup_r+0x66> - 80418e4: 4630 mov r0, r6 - 80418e6: f7ff f81b bl 8040920 <_free_r> - 80418ea: 2300 movs r3, #0 - 80418ec: 6363 str r3, [r4, #52] ; 0x34 - 80418ee: 89a3 ldrh r3, [r4, #12] - 80418f0: f023 0324 bic.w r3, r3, #36 ; 0x24 - 80418f4: 81a3 strh r3, [r4, #12] - 80418f6: 2300 movs r3, #0 - 80418f8: 6063 str r3, [r4, #4] - 80418fa: 6923 ldr r3, [r4, #16] - 80418fc: 6023 str r3, [r4, #0] - 80418fe: 89a3 ldrh r3, [r4, #12] - 8041900: f043 0308 orr.w r3, r3, #8 - 8041904: 81a3 strh r3, [r4, #12] - 8041906: 6923 ldr r3, [r4, #16] - 8041908: b94b cbnz r3, 804191e <__swsetup_r+0x9a> - 804190a: 89a3 ldrh r3, [r4, #12] - 804190c: f403 7320 and.w r3, r3, #640 ; 0x280 - 8041910: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8041914: d003 beq.n 804191e <__swsetup_r+0x9a> - 8041916: 4621 mov r1, r4 - 8041918: 4630 mov r0, r6 - 804191a: f000 f933 bl 8041b84 <__smakebuf_r> - 804191e: 89a0 ldrh r0, [r4, #12] - 8041920: f9b4 200c ldrsh.w r2, [r4, #12] - 8041924: f010 0301 ands.w r3, r0, #1 - 8041928: d00a beq.n 8041940 <__swsetup_r+0xbc> - 804192a: 2300 movs r3, #0 - 804192c: 60a3 str r3, [r4, #8] - 804192e: 6963 ldr r3, [r4, #20] - 8041930: 425b negs r3, r3 - 8041932: 61a3 str r3, [r4, #24] - 8041934: 6923 ldr r3, [r4, #16] - 8041936: b943 cbnz r3, 804194a <__swsetup_r+0xc6> - 8041938: f010 0080 ands.w r0, r0, #128 ; 0x80 - 804193c: d1ba bne.n 80418b4 <__swsetup_r+0x30> - 804193e: bd70 pop {r4, r5, r6, pc} - 8041940: 0781 lsls r1, r0, #30 - 8041942: bf58 it pl - 8041944: 6963 ldrpl r3, [r4, #20] - 8041946: 60a3 str r3, [r4, #8] - 8041948: e7f4 b.n 8041934 <__swsetup_r+0xb0> - 804194a: 2000 movs r0, #0 - 804194c: e7f7 b.n 804193e <__swsetup_r+0xba> - 804194e: bf00 nop - 8041950: 24000078 .word 0x24000078 - 8041954: 08044eb8 .word 0x08044eb8 - 8041958: 08044ed8 .word 0x08044ed8 - 804195c: 08044e98 .word 0x08044e98 - -08041960 : - 8041960: b508 push {r3, lr} - 8041962: 2006 movs r0, #6 - 8041964: f000 f9b8 bl 8041cd8 - 8041968: 2001 movs r0, #1 - 804196a: f7e2 ff03 bl 8024774 <_exit> + 80418ce: d10f bne.n 80418f0 <__swsetup_r+0x3c> + 80418d0: 686c ldr r4, [r5, #4] + 80418d2: 89a3 ldrh r3, [r4, #12] + 80418d4: f9b4 200c ldrsh.w r2, [r4, #12] + 80418d8: 0719 lsls r1, r3, #28 + 80418da: d42c bmi.n 8041936 <__swsetup_r+0x82> + 80418dc: 06dd lsls r5, r3, #27 + 80418de: d411 bmi.n 8041904 <__swsetup_r+0x50> + 80418e0: 2309 movs r3, #9 + 80418e2: 6033 str r3, [r6, #0] + 80418e4: f042 0340 orr.w r3, r2, #64 ; 0x40 + 80418e8: 81a3 strh r3, [r4, #12] + 80418ea: f04f 30ff mov.w r0, #4294967295 + 80418ee: e03e b.n 804196e <__swsetup_r+0xba> + 80418f0: 4b25 ldr r3, [pc, #148] ; (8041988 <__swsetup_r+0xd4>) + 80418f2: 429c cmp r4, r3 + 80418f4: d101 bne.n 80418fa <__swsetup_r+0x46> + 80418f6: 68ac ldr r4, [r5, #8] + 80418f8: e7eb b.n 80418d2 <__swsetup_r+0x1e> + 80418fa: 4b24 ldr r3, [pc, #144] ; (804198c <__swsetup_r+0xd8>) + 80418fc: 429c cmp r4, r3 + 80418fe: bf08 it eq + 8041900: 68ec ldreq r4, [r5, #12] + 8041902: e7e6 b.n 80418d2 <__swsetup_r+0x1e> + 8041904: 0758 lsls r0, r3, #29 + 8041906: d512 bpl.n 804192e <__swsetup_r+0x7a> + 8041908: 6b61 ldr r1, [r4, #52] ; 0x34 + 804190a: b141 cbz r1, 804191e <__swsetup_r+0x6a> + 804190c: f104 0344 add.w r3, r4, #68 ; 0x44 + 8041910: 4299 cmp r1, r3 + 8041912: d002 beq.n 804191a <__swsetup_r+0x66> + 8041914: 4630 mov r0, r6 + 8041916: f7ff f81b bl 8040950 <_free_r> + 804191a: 2300 movs r3, #0 + 804191c: 6363 str r3, [r4, #52] ; 0x34 + 804191e: 89a3 ldrh r3, [r4, #12] + 8041920: f023 0324 bic.w r3, r3, #36 ; 0x24 + 8041924: 81a3 strh r3, [r4, #12] + 8041926: 2300 movs r3, #0 + 8041928: 6063 str r3, [r4, #4] + 804192a: 6923 ldr r3, [r4, #16] + 804192c: 6023 str r3, [r4, #0] + 804192e: 89a3 ldrh r3, [r4, #12] + 8041930: f043 0308 orr.w r3, r3, #8 + 8041934: 81a3 strh r3, [r4, #12] + 8041936: 6923 ldr r3, [r4, #16] + 8041938: b94b cbnz r3, 804194e <__swsetup_r+0x9a> + 804193a: 89a3 ldrh r3, [r4, #12] + 804193c: f403 7320 and.w r3, r3, #640 ; 0x280 + 8041940: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8041944: d003 beq.n 804194e <__swsetup_r+0x9a> + 8041946: 4621 mov r1, r4 + 8041948: 4630 mov r0, r6 + 804194a: f000 f933 bl 8041bb4 <__smakebuf_r> + 804194e: 89a0 ldrh r0, [r4, #12] + 8041950: f9b4 200c ldrsh.w r2, [r4, #12] + 8041954: f010 0301 ands.w r3, r0, #1 + 8041958: d00a beq.n 8041970 <__swsetup_r+0xbc> + 804195a: 2300 movs r3, #0 + 804195c: 60a3 str r3, [r4, #8] + 804195e: 6963 ldr r3, [r4, #20] + 8041960: 425b negs r3, r3 + 8041962: 61a3 str r3, [r4, #24] + 8041964: 6923 ldr r3, [r4, #16] + 8041966: b943 cbnz r3, 804197a <__swsetup_r+0xc6> + 8041968: f010 0080 ands.w r0, r0, #128 ; 0x80 + 804196c: d1ba bne.n 80418e4 <__swsetup_r+0x30> + 804196e: bd70 pop {r4, r5, r6, pc} + 8041970: 0781 lsls r1, r0, #30 + 8041972: bf58 it pl + 8041974: 6963 ldrpl r3, [r4, #20] + 8041976: 60a3 str r3, [r4, #8] + 8041978: e7f4 b.n 8041964 <__swsetup_r+0xb0> + 804197a: 2000 movs r0, #0 + 804197c: e7f7 b.n 804196e <__swsetup_r+0xba> + 804197e: bf00 nop + 8041980: 24000078 .word 0x24000078 + 8041984: 08044ee8 .word 0x08044ee8 + 8041988: 08044f08 .word 0x08044f08 + 804198c: 08044ec8 .word 0x08044ec8 + +08041990 : + 8041990: b508 push {r3, lr} + 8041992: 2006 movs r0, #6 + 8041994: f000 f9b8 bl 8041d08 + 8041998: 2001 movs r0, #1 + 804199a: f7e2 ff03 bl 80247a4 <_exit> ... -08041970 <_close_r>: - 8041970: b538 push {r3, r4, r5, lr} - 8041972: 4d06 ldr r5, [pc, #24] ; (804198c <_close_r+0x1c>) - 8041974: 2300 movs r3, #0 - 8041976: 4604 mov r4, r0 - 8041978: 4608 mov r0, r1 - 804197a: 602b str r3, [r5, #0] - 804197c: f7e2 ff3d bl 80247fa <_close> - 8041980: 1c43 adds r3, r0, #1 - 8041982: d102 bne.n 804198a <_close_r+0x1a> - 8041984: 682b ldr r3, [r5, #0] - 8041986: b103 cbz r3, 804198a <_close_r+0x1a> - 8041988: 6023 str r3, [r4, #0] - 804198a: bd38 pop {r3, r4, r5, pc} - 804198c: 2400eabc .word 0x2400eabc - -08041990 <__sflush_r>: - 8041990: 898a ldrh r2, [r1, #12] - 8041992: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 8041996: 4605 mov r5, r0 - 8041998: 0710 lsls r0, r2, #28 - 804199a: 460c mov r4, r1 - 804199c: d458 bmi.n 8041a50 <__sflush_r+0xc0> - 804199e: 684b ldr r3, [r1, #4] - 80419a0: 2b00 cmp r3, #0 - 80419a2: dc05 bgt.n 80419b0 <__sflush_r+0x20> - 80419a4: 6c0b ldr r3, [r1, #64] ; 0x40 - 80419a6: 2b00 cmp r3, #0 - 80419a8: dc02 bgt.n 80419b0 <__sflush_r+0x20> - 80419aa: 2000 movs r0, #0 - 80419ac: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 80419b0: 6ae6 ldr r6, [r4, #44] ; 0x2c - 80419b2: 2e00 cmp r6, #0 - 80419b4: d0f9 beq.n 80419aa <__sflush_r+0x1a> - 80419b6: 2300 movs r3, #0 - 80419b8: f412 5280 ands.w r2, r2, #4096 ; 0x1000 - 80419bc: 682f ldr r7, [r5, #0] - 80419be: 602b str r3, [r5, #0] - 80419c0: d032 beq.n 8041a28 <__sflush_r+0x98> - 80419c2: 6d60 ldr r0, [r4, #84] ; 0x54 - 80419c4: 89a3 ldrh r3, [r4, #12] - 80419c6: 075a lsls r2, r3, #29 - 80419c8: d505 bpl.n 80419d6 <__sflush_r+0x46> - 80419ca: 6863 ldr r3, [r4, #4] - 80419cc: 1ac0 subs r0, r0, r3 - 80419ce: 6b63 ldr r3, [r4, #52] ; 0x34 - 80419d0: b10b cbz r3, 80419d6 <__sflush_r+0x46> - 80419d2: 6c23 ldr r3, [r4, #64] ; 0x40 - 80419d4: 1ac0 subs r0, r0, r3 - 80419d6: 2300 movs r3, #0 - 80419d8: 4602 mov r2, r0 - 80419da: 6ae6 ldr r6, [r4, #44] ; 0x2c - 80419dc: 6a21 ldr r1, [r4, #32] - 80419de: 4628 mov r0, r5 - 80419e0: 47b0 blx r6 - 80419e2: 1c43 adds r3, r0, #1 - 80419e4: 89a3 ldrh r3, [r4, #12] - 80419e6: d106 bne.n 80419f6 <__sflush_r+0x66> - 80419e8: 6829 ldr r1, [r5, #0] - 80419ea: 291d cmp r1, #29 - 80419ec: d82c bhi.n 8041a48 <__sflush_r+0xb8> - 80419ee: 4a2a ldr r2, [pc, #168] ; (8041a98 <__sflush_r+0x108>) - 80419f0: 40ca lsrs r2, r1 - 80419f2: 07d6 lsls r6, r2, #31 - 80419f4: d528 bpl.n 8041a48 <__sflush_r+0xb8> - 80419f6: 2200 movs r2, #0 - 80419f8: 6062 str r2, [r4, #4] - 80419fa: 04d9 lsls r1, r3, #19 - 80419fc: 6922 ldr r2, [r4, #16] - 80419fe: 6022 str r2, [r4, #0] - 8041a00: d504 bpl.n 8041a0c <__sflush_r+0x7c> - 8041a02: 1c42 adds r2, r0, #1 - 8041a04: d101 bne.n 8041a0a <__sflush_r+0x7a> - 8041a06: 682b ldr r3, [r5, #0] - 8041a08: b903 cbnz r3, 8041a0c <__sflush_r+0x7c> - 8041a0a: 6560 str r0, [r4, #84] ; 0x54 - 8041a0c: 6b61 ldr r1, [r4, #52] ; 0x34 - 8041a0e: 602f str r7, [r5, #0] - 8041a10: 2900 cmp r1, #0 - 8041a12: d0ca beq.n 80419aa <__sflush_r+0x1a> - 8041a14: f104 0344 add.w r3, r4, #68 ; 0x44 - 8041a18: 4299 cmp r1, r3 - 8041a1a: d002 beq.n 8041a22 <__sflush_r+0x92> - 8041a1c: 4628 mov r0, r5 - 8041a1e: f7fe ff7f bl 8040920 <_free_r> - 8041a22: 2000 movs r0, #0 - 8041a24: 6360 str r0, [r4, #52] ; 0x34 - 8041a26: e7c1 b.n 80419ac <__sflush_r+0x1c> - 8041a28: 6a21 ldr r1, [r4, #32] - 8041a2a: 2301 movs r3, #1 - 8041a2c: 4628 mov r0, r5 - 8041a2e: 47b0 blx r6 - 8041a30: 1c41 adds r1, r0, #1 - 8041a32: d1c7 bne.n 80419c4 <__sflush_r+0x34> - 8041a34: 682b ldr r3, [r5, #0] - 8041a36: 2b00 cmp r3, #0 - 8041a38: d0c4 beq.n 80419c4 <__sflush_r+0x34> - 8041a3a: 2b1d cmp r3, #29 - 8041a3c: d001 beq.n 8041a42 <__sflush_r+0xb2> - 8041a3e: 2b16 cmp r3, #22 - 8041a40: d101 bne.n 8041a46 <__sflush_r+0xb6> - 8041a42: 602f str r7, [r5, #0] - 8041a44: e7b1 b.n 80419aa <__sflush_r+0x1a> - 8041a46: 89a3 ldrh r3, [r4, #12] - 8041a48: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8041a4c: 81a3 strh r3, [r4, #12] - 8041a4e: e7ad b.n 80419ac <__sflush_r+0x1c> - 8041a50: 690f ldr r7, [r1, #16] - 8041a52: 2f00 cmp r7, #0 - 8041a54: d0a9 beq.n 80419aa <__sflush_r+0x1a> - 8041a56: 0793 lsls r3, r2, #30 - 8041a58: 680e ldr r6, [r1, #0] - 8041a5a: bf08 it eq - 8041a5c: 694b ldreq r3, [r1, #20] - 8041a5e: 600f str r7, [r1, #0] - 8041a60: bf18 it ne - 8041a62: 2300 movne r3, #0 - 8041a64: eba6 0807 sub.w r8, r6, r7 - 8041a68: 608b str r3, [r1, #8] - 8041a6a: f1b8 0f00 cmp.w r8, #0 - 8041a6e: dd9c ble.n 80419aa <__sflush_r+0x1a> - 8041a70: 6a21 ldr r1, [r4, #32] - 8041a72: 6aa6 ldr r6, [r4, #40] ; 0x28 - 8041a74: 4643 mov r3, r8 - 8041a76: 463a mov r2, r7 - 8041a78: 4628 mov r0, r5 - 8041a7a: 47b0 blx r6 - 8041a7c: 2800 cmp r0, #0 - 8041a7e: dc06 bgt.n 8041a8e <__sflush_r+0xfe> - 8041a80: 89a3 ldrh r3, [r4, #12] - 8041a82: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8041a86: 81a3 strh r3, [r4, #12] - 8041a88: f04f 30ff mov.w r0, #4294967295 - 8041a8c: e78e b.n 80419ac <__sflush_r+0x1c> - 8041a8e: 4407 add r7, r0 - 8041a90: eba8 0800 sub.w r8, r8, r0 - 8041a94: e7e9 b.n 8041a6a <__sflush_r+0xda> - 8041a96: bf00 nop - 8041a98: 20400001 .word 0x20400001 - -08041a9c <_fflush_r>: - 8041a9c: b538 push {r3, r4, r5, lr} - 8041a9e: 690b ldr r3, [r1, #16] - 8041aa0: 4605 mov r5, r0 - 8041aa2: 460c mov r4, r1 - 8041aa4: b913 cbnz r3, 8041aac <_fflush_r+0x10> - 8041aa6: 2500 movs r5, #0 +080419a0 <_close_r>: + 80419a0: b538 push {r3, r4, r5, lr} + 80419a2: 4d06 ldr r5, [pc, #24] ; (80419bc <_close_r+0x1c>) + 80419a4: 2300 movs r3, #0 + 80419a6: 4604 mov r4, r0 + 80419a8: 4608 mov r0, r1 + 80419aa: 602b str r3, [r5, #0] + 80419ac: f7e2 ff3d bl 802482a <_close> + 80419b0: 1c43 adds r3, r0, #1 + 80419b2: d102 bne.n 80419ba <_close_r+0x1a> + 80419b4: 682b ldr r3, [r5, #0] + 80419b6: b103 cbz r3, 80419ba <_close_r+0x1a> + 80419b8: 6023 str r3, [r4, #0] + 80419ba: bd38 pop {r3, r4, r5, pc} + 80419bc: 2400eabc .word 0x2400eabc + +080419c0 <__sflush_r>: + 80419c0: 898a ldrh r2, [r1, #12] + 80419c2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 80419c6: 4605 mov r5, r0 + 80419c8: 0710 lsls r0, r2, #28 + 80419ca: 460c mov r4, r1 + 80419cc: d458 bmi.n 8041a80 <__sflush_r+0xc0> + 80419ce: 684b ldr r3, [r1, #4] + 80419d0: 2b00 cmp r3, #0 + 80419d2: dc05 bgt.n 80419e0 <__sflush_r+0x20> + 80419d4: 6c0b ldr r3, [r1, #64] ; 0x40 + 80419d6: 2b00 cmp r3, #0 + 80419d8: dc02 bgt.n 80419e0 <__sflush_r+0x20> + 80419da: 2000 movs r0, #0 + 80419dc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 80419e0: 6ae6 ldr r6, [r4, #44] ; 0x2c + 80419e2: 2e00 cmp r6, #0 + 80419e4: d0f9 beq.n 80419da <__sflush_r+0x1a> + 80419e6: 2300 movs r3, #0 + 80419e8: f412 5280 ands.w r2, r2, #4096 ; 0x1000 + 80419ec: 682f ldr r7, [r5, #0] + 80419ee: 602b str r3, [r5, #0] + 80419f0: d032 beq.n 8041a58 <__sflush_r+0x98> + 80419f2: 6d60 ldr r0, [r4, #84] ; 0x54 + 80419f4: 89a3 ldrh r3, [r4, #12] + 80419f6: 075a lsls r2, r3, #29 + 80419f8: d505 bpl.n 8041a06 <__sflush_r+0x46> + 80419fa: 6863 ldr r3, [r4, #4] + 80419fc: 1ac0 subs r0, r0, r3 + 80419fe: 6b63 ldr r3, [r4, #52] ; 0x34 + 8041a00: b10b cbz r3, 8041a06 <__sflush_r+0x46> + 8041a02: 6c23 ldr r3, [r4, #64] ; 0x40 + 8041a04: 1ac0 subs r0, r0, r3 + 8041a06: 2300 movs r3, #0 + 8041a08: 4602 mov r2, r0 + 8041a0a: 6ae6 ldr r6, [r4, #44] ; 0x2c + 8041a0c: 6a21 ldr r1, [r4, #32] + 8041a0e: 4628 mov r0, r5 + 8041a10: 47b0 blx r6 + 8041a12: 1c43 adds r3, r0, #1 + 8041a14: 89a3 ldrh r3, [r4, #12] + 8041a16: d106 bne.n 8041a26 <__sflush_r+0x66> + 8041a18: 6829 ldr r1, [r5, #0] + 8041a1a: 291d cmp r1, #29 + 8041a1c: d82c bhi.n 8041a78 <__sflush_r+0xb8> + 8041a1e: 4a2a ldr r2, [pc, #168] ; (8041ac8 <__sflush_r+0x108>) + 8041a20: 40ca lsrs r2, r1 + 8041a22: 07d6 lsls r6, r2, #31 + 8041a24: d528 bpl.n 8041a78 <__sflush_r+0xb8> + 8041a26: 2200 movs r2, #0 + 8041a28: 6062 str r2, [r4, #4] + 8041a2a: 04d9 lsls r1, r3, #19 + 8041a2c: 6922 ldr r2, [r4, #16] + 8041a2e: 6022 str r2, [r4, #0] + 8041a30: d504 bpl.n 8041a3c <__sflush_r+0x7c> + 8041a32: 1c42 adds r2, r0, #1 + 8041a34: d101 bne.n 8041a3a <__sflush_r+0x7a> + 8041a36: 682b ldr r3, [r5, #0] + 8041a38: b903 cbnz r3, 8041a3c <__sflush_r+0x7c> + 8041a3a: 6560 str r0, [r4, #84] ; 0x54 + 8041a3c: 6b61 ldr r1, [r4, #52] ; 0x34 + 8041a3e: 602f str r7, [r5, #0] + 8041a40: 2900 cmp r1, #0 + 8041a42: d0ca beq.n 80419da <__sflush_r+0x1a> + 8041a44: f104 0344 add.w r3, r4, #68 ; 0x44 + 8041a48: 4299 cmp r1, r3 + 8041a4a: d002 beq.n 8041a52 <__sflush_r+0x92> + 8041a4c: 4628 mov r0, r5 + 8041a4e: f7fe ff7f bl 8040950 <_free_r> + 8041a52: 2000 movs r0, #0 + 8041a54: 6360 str r0, [r4, #52] ; 0x34 + 8041a56: e7c1 b.n 80419dc <__sflush_r+0x1c> + 8041a58: 6a21 ldr r1, [r4, #32] + 8041a5a: 2301 movs r3, #1 + 8041a5c: 4628 mov r0, r5 + 8041a5e: 47b0 blx r6 + 8041a60: 1c41 adds r1, r0, #1 + 8041a62: d1c7 bne.n 80419f4 <__sflush_r+0x34> + 8041a64: 682b ldr r3, [r5, #0] + 8041a66: 2b00 cmp r3, #0 + 8041a68: d0c4 beq.n 80419f4 <__sflush_r+0x34> + 8041a6a: 2b1d cmp r3, #29 + 8041a6c: d001 beq.n 8041a72 <__sflush_r+0xb2> + 8041a6e: 2b16 cmp r3, #22 + 8041a70: d101 bne.n 8041a76 <__sflush_r+0xb6> + 8041a72: 602f str r7, [r5, #0] + 8041a74: e7b1 b.n 80419da <__sflush_r+0x1a> + 8041a76: 89a3 ldrh r3, [r4, #12] + 8041a78: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8041a7c: 81a3 strh r3, [r4, #12] + 8041a7e: e7ad b.n 80419dc <__sflush_r+0x1c> + 8041a80: 690f ldr r7, [r1, #16] + 8041a82: 2f00 cmp r7, #0 + 8041a84: d0a9 beq.n 80419da <__sflush_r+0x1a> + 8041a86: 0793 lsls r3, r2, #30 + 8041a88: 680e ldr r6, [r1, #0] + 8041a8a: bf08 it eq + 8041a8c: 694b ldreq r3, [r1, #20] + 8041a8e: 600f str r7, [r1, #0] + 8041a90: bf18 it ne + 8041a92: 2300 movne r3, #0 + 8041a94: eba6 0807 sub.w r8, r6, r7 + 8041a98: 608b str r3, [r1, #8] + 8041a9a: f1b8 0f00 cmp.w r8, #0 + 8041a9e: dd9c ble.n 80419da <__sflush_r+0x1a> + 8041aa0: 6a21 ldr r1, [r4, #32] + 8041aa2: 6aa6 ldr r6, [r4, #40] ; 0x28 + 8041aa4: 4643 mov r3, r8 + 8041aa6: 463a mov r2, r7 8041aa8: 4628 mov r0, r5 - 8041aaa: bd38 pop {r3, r4, r5, pc} - 8041aac: b118 cbz r0, 8041ab6 <_fflush_r+0x1a> - 8041aae: 6983 ldr r3, [r0, #24] - 8041ab0: b90b cbnz r3, 8041ab6 <_fflush_r+0x1a> - 8041ab2: f7ff f937 bl 8040d24 <__sinit> - 8041ab6: 4b14 ldr r3, [pc, #80] ; (8041b08 <_fflush_r+0x6c>) - 8041ab8: 429c cmp r4, r3 - 8041aba: d11b bne.n 8041af4 <_fflush_r+0x58> - 8041abc: 686c ldr r4, [r5, #4] - 8041abe: f9b4 300c ldrsh.w r3, [r4, #12] - 8041ac2: 2b00 cmp r3, #0 - 8041ac4: d0ef beq.n 8041aa6 <_fflush_r+0xa> - 8041ac6: 6e62 ldr r2, [r4, #100] ; 0x64 - 8041ac8: 07d0 lsls r0, r2, #31 - 8041aca: d404 bmi.n 8041ad6 <_fflush_r+0x3a> - 8041acc: 0599 lsls r1, r3, #22 - 8041ace: d402 bmi.n 8041ad6 <_fflush_r+0x3a> - 8041ad0: 6da0 ldr r0, [r4, #88] ; 0x58 - 8041ad2: f7ff f9d7 bl 8040e84 <__retarget_lock_acquire_recursive> - 8041ad6: 4628 mov r0, r5 - 8041ad8: 4621 mov r1, r4 - 8041ada: f7ff ff59 bl 8041990 <__sflush_r> - 8041ade: 6e63 ldr r3, [r4, #100] ; 0x64 - 8041ae0: 07da lsls r2, r3, #31 - 8041ae2: 4605 mov r5, r0 - 8041ae4: d4e0 bmi.n 8041aa8 <_fflush_r+0xc> - 8041ae6: 89a3 ldrh r3, [r4, #12] - 8041ae8: 059b lsls r3, r3, #22 - 8041aea: d4dd bmi.n 8041aa8 <_fflush_r+0xc> - 8041aec: 6da0 ldr r0, [r4, #88] ; 0x58 - 8041aee: f7ff f9ca bl 8040e86 <__retarget_lock_release_recursive> - 8041af2: e7d9 b.n 8041aa8 <_fflush_r+0xc> - 8041af4: 4b05 ldr r3, [pc, #20] ; (8041b0c <_fflush_r+0x70>) - 8041af6: 429c cmp r4, r3 - 8041af8: d101 bne.n 8041afe <_fflush_r+0x62> - 8041afa: 68ac ldr r4, [r5, #8] - 8041afc: e7df b.n 8041abe <_fflush_r+0x22> - 8041afe: 4b04 ldr r3, [pc, #16] ; (8041b10 <_fflush_r+0x74>) - 8041b00: 429c cmp r4, r3 - 8041b02: bf08 it eq - 8041b04: 68ec ldreq r4, [r5, #12] - 8041b06: e7da b.n 8041abe <_fflush_r+0x22> - 8041b08: 08044eb8 .word 0x08044eb8 - 8041b0c: 08044ed8 .word 0x08044ed8 - 8041b10: 08044e98 .word 0x08044e98 - -08041b14 <_lseek_r>: - 8041b14: b538 push {r3, r4, r5, lr} - 8041b16: 4d07 ldr r5, [pc, #28] ; (8041b34 <_lseek_r+0x20>) - 8041b18: 4604 mov r4, r0 - 8041b1a: 4608 mov r0, r1 - 8041b1c: 4611 mov r1, r2 - 8041b1e: 2200 movs r2, #0 - 8041b20: 602a str r2, [r5, #0] - 8041b22: 461a mov r2, r3 - 8041b24: f7e2 fe90 bl 8024848 <_lseek> - 8041b28: 1c43 adds r3, r0, #1 - 8041b2a: d102 bne.n 8041b32 <_lseek_r+0x1e> - 8041b2c: 682b ldr r3, [r5, #0] - 8041b2e: b103 cbz r3, 8041b32 <_lseek_r+0x1e> - 8041b30: 6023 str r3, [r4, #0] - 8041b32: bd38 pop {r3, r4, r5, pc} - 8041b34: 2400eabc .word 0x2400eabc - -08041b38 <__swhatbuf_r>: - 8041b38: b570 push {r4, r5, r6, lr} - 8041b3a: 460e mov r6, r1 - 8041b3c: f9b1 100e ldrsh.w r1, [r1, #14] - 8041b40: 2900 cmp r1, #0 - 8041b42: b096 sub sp, #88 ; 0x58 - 8041b44: 4614 mov r4, r2 - 8041b46: 461d mov r5, r3 - 8041b48: da08 bge.n 8041b5c <__swhatbuf_r+0x24> - 8041b4a: f9b6 300c ldrsh.w r3, [r6, #12] + 8041aaa: 47b0 blx r6 + 8041aac: 2800 cmp r0, #0 + 8041aae: dc06 bgt.n 8041abe <__sflush_r+0xfe> + 8041ab0: 89a3 ldrh r3, [r4, #12] + 8041ab2: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8041ab6: 81a3 strh r3, [r4, #12] + 8041ab8: f04f 30ff mov.w r0, #4294967295 + 8041abc: e78e b.n 80419dc <__sflush_r+0x1c> + 8041abe: 4407 add r7, r0 + 8041ac0: eba8 0800 sub.w r8, r8, r0 + 8041ac4: e7e9 b.n 8041a9a <__sflush_r+0xda> + 8041ac6: bf00 nop + 8041ac8: 20400001 .word 0x20400001 + +08041acc <_fflush_r>: + 8041acc: b538 push {r3, r4, r5, lr} + 8041ace: 690b ldr r3, [r1, #16] + 8041ad0: 4605 mov r5, r0 + 8041ad2: 460c mov r4, r1 + 8041ad4: b913 cbnz r3, 8041adc <_fflush_r+0x10> + 8041ad6: 2500 movs r5, #0 + 8041ad8: 4628 mov r0, r5 + 8041ada: bd38 pop {r3, r4, r5, pc} + 8041adc: b118 cbz r0, 8041ae6 <_fflush_r+0x1a> + 8041ade: 6983 ldr r3, [r0, #24] + 8041ae0: b90b cbnz r3, 8041ae6 <_fflush_r+0x1a> + 8041ae2: f7ff f937 bl 8040d54 <__sinit> + 8041ae6: 4b14 ldr r3, [pc, #80] ; (8041b38 <_fflush_r+0x6c>) + 8041ae8: 429c cmp r4, r3 + 8041aea: d11b bne.n 8041b24 <_fflush_r+0x58> + 8041aec: 686c ldr r4, [r5, #4] + 8041aee: f9b4 300c ldrsh.w r3, [r4, #12] + 8041af2: 2b00 cmp r3, #0 + 8041af4: d0ef beq.n 8041ad6 <_fflush_r+0xa> + 8041af6: 6e62 ldr r2, [r4, #100] ; 0x64 + 8041af8: 07d0 lsls r0, r2, #31 + 8041afa: d404 bmi.n 8041b06 <_fflush_r+0x3a> + 8041afc: 0599 lsls r1, r3, #22 + 8041afe: d402 bmi.n 8041b06 <_fflush_r+0x3a> + 8041b00: 6da0 ldr r0, [r4, #88] ; 0x58 + 8041b02: f7ff f9d7 bl 8040eb4 <__retarget_lock_acquire_recursive> + 8041b06: 4628 mov r0, r5 + 8041b08: 4621 mov r1, r4 + 8041b0a: f7ff ff59 bl 80419c0 <__sflush_r> + 8041b0e: 6e63 ldr r3, [r4, #100] ; 0x64 + 8041b10: 07da lsls r2, r3, #31 + 8041b12: 4605 mov r5, r0 + 8041b14: d4e0 bmi.n 8041ad8 <_fflush_r+0xc> + 8041b16: 89a3 ldrh r3, [r4, #12] + 8041b18: 059b lsls r3, r3, #22 + 8041b1a: d4dd bmi.n 8041ad8 <_fflush_r+0xc> + 8041b1c: 6da0 ldr r0, [r4, #88] ; 0x58 + 8041b1e: f7ff f9ca bl 8040eb6 <__retarget_lock_release_recursive> + 8041b22: e7d9 b.n 8041ad8 <_fflush_r+0xc> + 8041b24: 4b05 ldr r3, [pc, #20] ; (8041b3c <_fflush_r+0x70>) + 8041b26: 429c cmp r4, r3 + 8041b28: d101 bne.n 8041b2e <_fflush_r+0x62> + 8041b2a: 68ac ldr r4, [r5, #8] + 8041b2c: e7df b.n 8041aee <_fflush_r+0x22> + 8041b2e: 4b04 ldr r3, [pc, #16] ; (8041b40 <_fflush_r+0x74>) + 8041b30: 429c cmp r4, r3 + 8041b32: bf08 it eq + 8041b34: 68ec ldreq r4, [r5, #12] + 8041b36: e7da b.n 8041aee <_fflush_r+0x22> + 8041b38: 08044ee8 .word 0x08044ee8 + 8041b3c: 08044f08 .word 0x08044f08 + 8041b40: 08044ec8 .word 0x08044ec8 + +08041b44 <_lseek_r>: + 8041b44: b538 push {r3, r4, r5, lr} + 8041b46: 4d07 ldr r5, [pc, #28] ; (8041b64 <_lseek_r+0x20>) + 8041b48: 4604 mov r4, r0 + 8041b4a: 4608 mov r0, r1 + 8041b4c: 4611 mov r1, r2 8041b4e: 2200 movs r2, #0 8041b50: 602a str r2, [r5, #0] - 8041b52: 061a lsls r2, r3, #24 - 8041b54: d410 bmi.n 8041b78 <__swhatbuf_r+0x40> - 8041b56: f44f 6380 mov.w r3, #1024 ; 0x400 - 8041b5a: e00e b.n 8041b7a <__swhatbuf_r+0x42> - 8041b5c: 466a mov r2, sp - 8041b5e: f000 f8d7 bl 8041d10 <_fstat_r> - 8041b62: 2800 cmp r0, #0 - 8041b64: dbf1 blt.n 8041b4a <__swhatbuf_r+0x12> - 8041b66: 9a01 ldr r2, [sp, #4] - 8041b68: f402 4270 and.w r2, r2, #61440 ; 0xf000 - 8041b6c: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 - 8041b70: 425a negs r2, r3 - 8041b72: 415a adcs r2, r3 - 8041b74: 602a str r2, [r5, #0] - 8041b76: e7ee b.n 8041b56 <__swhatbuf_r+0x1e> - 8041b78: 2340 movs r3, #64 ; 0x40 - 8041b7a: 2000 movs r0, #0 - 8041b7c: 6023 str r3, [r4, #0] - 8041b7e: b016 add sp, #88 ; 0x58 - 8041b80: bd70 pop {r4, r5, r6, pc} + 8041b52: 461a mov r2, r3 + 8041b54: f7e2 fe90 bl 8024878 <_lseek> + 8041b58: 1c43 adds r3, r0, #1 + 8041b5a: d102 bne.n 8041b62 <_lseek_r+0x1e> + 8041b5c: 682b ldr r3, [r5, #0] + 8041b5e: b103 cbz r3, 8041b62 <_lseek_r+0x1e> + 8041b60: 6023 str r3, [r4, #0] + 8041b62: bd38 pop {r3, r4, r5, pc} + 8041b64: 2400eabc .word 0x2400eabc + +08041b68 <__swhatbuf_r>: + 8041b68: b570 push {r4, r5, r6, lr} + 8041b6a: 460e mov r6, r1 + 8041b6c: f9b1 100e ldrsh.w r1, [r1, #14] + 8041b70: 2900 cmp r1, #0 + 8041b72: b096 sub sp, #88 ; 0x58 + 8041b74: 4614 mov r4, r2 + 8041b76: 461d mov r5, r3 + 8041b78: da08 bge.n 8041b8c <__swhatbuf_r+0x24> + 8041b7a: f9b6 300c ldrsh.w r3, [r6, #12] + 8041b7e: 2200 movs r2, #0 + 8041b80: 602a str r2, [r5, #0] + 8041b82: 061a lsls r2, r3, #24 + 8041b84: d410 bmi.n 8041ba8 <__swhatbuf_r+0x40> + 8041b86: f44f 6380 mov.w r3, #1024 ; 0x400 + 8041b8a: e00e b.n 8041baa <__swhatbuf_r+0x42> + 8041b8c: 466a mov r2, sp + 8041b8e: f000 f8d7 bl 8041d40 <_fstat_r> + 8041b92: 2800 cmp r0, #0 + 8041b94: dbf1 blt.n 8041b7a <__swhatbuf_r+0x12> + 8041b96: 9a01 ldr r2, [sp, #4] + 8041b98: f402 4270 and.w r2, r2, #61440 ; 0xf000 + 8041b9c: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 + 8041ba0: 425a negs r2, r3 + 8041ba2: 415a adcs r2, r3 + 8041ba4: 602a str r2, [r5, #0] + 8041ba6: e7ee b.n 8041b86 <__swhatbuf_r+0x1e> + 8041ba8: 2340 movs r3, #64 ; 0x40 + 8041baa: 2000 movs r0, #0 + 8041bac: 6023 str r3, [r4, #0] + 8041bae: b016 add sp, #88 ; 0x58 + 8041bb0: bd70 pop {r4, r5, r6, pc} ... -08041b84 <__smakebuf_r>: - 8041b84: 898b ldrh r3, [r1, #12] - 8041b86: b573 push {r0, r1, r4, r5, r6, lr} - 8041b88: 079d lsls r5, r3, #30 - 8041b8a: 4606 mov r6, r0 - 8041b8c: 460c mov r4, r1 - 8041b8e: d507 bpl.n 8041ba0 <__smakebuf_r+0x1c> - 8041b90: f104 0347 add.w r3, r4, #71 ; 0x47 - 8041b94: 6023 str r3, [r4, #0] - 8041b96: 6123 str r3, [r4, #16] - 8041b98: 2301 movs r3, #1 - 8041b9a: 6163 str r3, [r4, #20] - 8041b9c: b002 add sp, #8 - 8041b9e: bd70 pop {r4, r5, r6, pc} - 8041ba0: ab01 add r3, sp, #4 - 8041ba2: 466a mov r2, sp - 8041ba4: f7ff ffc8 bl 8041b38 <__swhatbuf_r> - 8041ba8: 9900 ldr r1, [sp, #0] - 8041baa: 4605 mov r5, r0 - 8041bac: 4630 mov r0, r6 - 8041bae: f7fe ff23 bl 80409f8 <_malloc_r> - 8041bb2: b948 cbnz r0, 8041bc8 <__smakebuf_r+0x44> - 8041bb4: f9b4 300c ldrsh.w r3, [r4, #12] - 8041bb8: 059a lsls r2, r3, #22 - 8041bba: d4ef bmi.n 8041b9c <__smakebuf_r+0x18> - 8041bbc: f023 0303 bic.w r3, r3, #3 - 8041bc0: f043 0302 orr.w r3, r3, #2 - 8041bc4: 81a3 strh r3, [r4, #12] - 8041bc6: e7e3 b.n 8041b90 <__smakebuf_r+0xc> - 8041bc8: 4b0d ldr r3, [pc, #52] ; (8041c00 <__smakebuf_r+0x7c>) - 8041bca: 62b3 str r3, [r6, #40] ; 0x28 - 8041bcc: 89a3 ldrh r3, [r4, #12] - 8041bce: 6020 str r0, [r4, #0] - 8041bd0: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8041bd4: 81a3 strh r3, [r4, #12] - 8041bd6: 9b00 ldr r3, [sp, #0] - 8041bd8: 6163 str r3, [r4, #20] - 8041bda: 9b01 ldr r3, [sp, #4] - 8041bdc: 6120 str r0, [r4, #16] - 8041bde: b15b cbz r3, 8041bf8 <__smakebuf_r+0x74> - 8041be0: f9b4 100e ldrsh.w r1, [r4, #14] - 8041be4: 4630 mov r0, r6 - 8041be6: f000 f8a5 bl 8041d34 <_isatty_r> - 8041bea: b128 cbz r0, 8041bf8 <__smakebuf_r+0x74> - 8041bec: 89a3 ldrh r3, [r4, #12] - 8041bee: f023 0303 bic.w r3, r3, #3 - 8041bf2: f043 0301 orr.w r3, r3, #1 - 8041bf6: 81a3 strh r3, [r4, #12] - 8041bf8: 89a0 ldrh r0, [r4, #12] - 8041bfa: 4305 orrs r5, r0 - 8041bfc: 81a5 strh r5, [r4, #12] - 8041bfe: e7cd b.n 8041b9c <__smakebuf_r+0x18> - 8041c00: 08040cbd .word 0x08040cbd - -08041c04 <_realloc_r>: - 8041c04: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 8041c08: 4680 mov r8, r0 - 8041c0a: 4614 mov r4, r2 - 8041c0c: 460e mov r6, r1 - 8041c0e: b921 cbnz r1, 8041c1a <_realloc_r+0x16> - 8041c10: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} - 8041c14: 4611 mov r1, r2 - 8041c16: f7fe beef b.w 80409f8 <_malloc_r> - 8041c1a: b92a cbnz r2, 8041c28 <_realloc_r+0x24> - 8041c1c: f7fe fe80 bl 8040920 <_free_r> - 8041c20: 4625 mov r5, r4 - 8041c22: 4628 mov r0, r5 - 8041c24: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8041c28: f000 f894 bl 8041d54 <_malloc_usable_size_r> - 8041c2c: 4284 cmp r4, r0 - 8041c2e: 4607 mov r7, r0 - 8041c30: d802 bhi.n 8041c38 <_realloc_r+0x34> - 8041c32: ebb4 0f50 cmp.w r4, r0, lsr #1 - 8041c36: d812 bhi.n 8041c5e <_realloc_r+0x5a> - 8041c38: 4621 mov r1, r4 - 8041c3a: 4640 mov r0, r8 - 8041c3c: f7fe fedc bl 80409f8 <_malloc_r> - 8041c40: 4605 mov r5, r0 - 8041c42: 2800 cmp r0, #0 - 8041c44: d0ed beq.n 8041c22 <_realloc_r+0x1e> - 8041c46: 42bc cmp r4, r7 - 8041c48: 4622 mov r2, r4 - 8041c4a: 4631 mov r1, r6 - 8041c4c: bf28 it cs - 8041c4e: 463a movcs r2, r7 - 8041c50: f7fe fe36 bl 80408c0 - 8041c54: 4631 mov r1, r6 - 8041c56: 4640 mov r0, r8 - 8041c58: f7fe fe62 bl 8040920 <_free_r> - 8041c5c: e7e1 b.n 8041c22 <_realloc_r+0x1e> - 8041c5e: 4635 mov r5, r6 - 8041c60: e7df b.n 8041c22 <_realloc_r+0x1e> +08041bb4 <__smakebuf_r>: + 8041bb4: 898b ldrh r3, [r1, #12] + 8041bb6: b573 push {r0, r1, r4, r5, r6, lr} + 8041bb8: 079d lsls r5, r3, #30 + 8041bba: 4606 mov r6, r0 + 8041bbc: 460c mov r4, r1 + 8041bbe: d507 bpl.n 8041bd0 <__smakebuf_r+0x1c> + 8041bc0: f104 0347 add.w r3, r4, #71 ; 0x47 + 8041bc4: 6023 str r3, [r4, #0] + 8041bc6: 6123 str r3, [r4, #16] + 8041bc8: 2301 movs r3, #1 + 8041bca: 6163 str r3, [r4, #20] + 8041bcc: b002 add sp, #8 + 8041bce: bd70 pop {r4, r5, r6, pc} + 8041bd0: ab01 add r3, sp, #4 + 8041bd2: 466a mov r2, sp + 8041bd4: f7ff ffc8 bl 8041b68 <__swhatbuf_r> + 8041bd8: 9900 ldr r1, [sp, #0] + 8041bda: 4605 mov r5, r0 + 8041bdc: 4630 mov r0, r6 + 8041bde: f7fe ff23 bl 8040a28 <_malloc_r> + 8041be2: b948 cbnz r0, 8041bf8 <__smakebuf_r+0x44> + 8041be4: f9b4 300c ldrsh.w r3, [r4, #12] + 8041be8: 059a lsls r2, r3, #22 + 8041bea: d4ef bmi.n 8041bcc <__smakebuf_r+0x18> + 8041bec: f023 0303 bic.w r3, r3, #3 + 8041bf0: f043 0302 orr.w r3, r3, #2 + 8041bf4: 81a3 strh r3, [r4, #12] + 8041bf6: e7e3 b.n 8041bc0 <__smakebuf_r+0xc> + 8041bf8: 4b0d ldr r3, [pc, #52] ; (8041c30 <__smakebuf_r+0x7c>) + 8041bfa: 62b3 str r3, [r6, #40] ; 0x28 + 8041bfc: 89a3 ldrh r3, [r4, #12] + 8041bfe: 6020 str r0, [r4, #0] + 8041c00: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8041c04: 81a3 strh r3, [r4, #12] + 8041c06: 9b00 ldr r3, [sp, #0] + 8041c08: 6163 str r3, [r4, #20] + 8041c0a: 9b01 ldr r3, [sp, #4] + 8041c0c: 6120 str r0, [r4, #16] + 8041c0e: b15b cbz r3, 8041c28 <__smakebuf_r+0x74> + 8041c10: f9b4 100e ldrsh.w r1, [r4, #14] + 8041c14: 4630 mov r0, r6 + 8041c16: f000 f8a5 bl 8041d64 <_isatty_r> + 8041c1a: b128 cbz r0, 8041c28 <__smakebuf_r+0x74> + 8041c1c: 89a3 ldrh r3, [r4, #12] + 8041c1e: f023 0303 bic.w r3, r3, #3 + 8041c22: f043 0301 orr.w r3, r3, #1 + 8041c26: 81a3 strh r3, [r4, #12] + 8041c28: 89a0 ldrh r0, [r4, #12] + 8041c2a: 4305 orrs r5, r0 + 8041c2c: 81a5 strh r5, [r4, #12] + 8041c2e: e7cd b.n 8041bcc <__smakebuf_r+0x18> + 8041c30: 08040ced .word 0x08040ced + +08041c34 <_realloc_r>: + 8041c34: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8041c38: 4680 mov r8, r0 + 8041c3a: 4614 mov r4, r2 + 8041c3c: 460e mov r6, r1 + 8041c3e: b921 cbnz r1, 8041c4a <_realloc_r+0x16> + 8041c40: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} + 8041c44: 4611 mov r1, r2 + 8041c46: f7fe beef b.w 8040a28 <_malloc_r> + 8041c4a: b92a cbnz r2, 8041c58 <_realloc_r+0x24> + 8041c4c: f7fe fe80 bl 8040950 <_free_r> + 8041c50: 4625 mov r5, r4 + 8041c52: 4628 mov r0, r5 + 8041c54: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8041c58: f000 f894 bl 8041d84 <_malloc_usable_size_r> + 8041c5c: 4284 cmp r4, r0 + 8041c5e: 4607 mov r7, r0 + 8041c60: d802 bhi.n 8041c68 <_realloc_r+0x34> + 8041c62: ebb4 0f50 cmp.w r4, r0, lsr #1 + 8041c66: d812 bhi.n 8041c8e <_realloc_r+0x5a> + 8041c68: 4621 mov r1, r4 + 8041c6a: 4640 mov r0, r8 + 8041c6c: f7fe fedc bl 8040a28 <_malloc_r> + 8041c70: 4605 mov r5, r0 + 8041c72: 2800 cmp r0, #0 + 8041c74: d0ed beq.n 8041c52 <_realloc_r+0x1e> + 8041c76: 42bc cmp r4, r7 + 8041c78: 4622 mov r2, r4 + 8041c7a: 4631 mov r1, r6 + 8041c7c: bf28 it cs + 8041c7e: 463a movcs r2, r7 + 8041c80: f7fe fe36 bl 80408f0 + 8041c84: 4631 mov r1, r6 + 8041c86: 4640 mov r0, r8 + 8041c88: f7fe fe62 bl 8040950 <_free_r> + 8041c8c: e7e1 b.n 8041c52 <_realloc_r+0x1e> + 8041c8e: 4635 mov r5, r6 + 8041c90: e7df b.n 8041c52 <_realloc_r+0x1e> ... -08041c64 <_read_r>: - 8041c64: b538 push {r3, r4, r5, lr} - 8041c66: 4d07 ldr r5, [pc, #28] ; (8041c84 <_read_r+0x20>) - 8041c68: 4604 mov r4, r0 - 8041c6a: 4608 mov r0, r1 - 8041c6c: 4611 mov r1, r2 - 8041c6e: 2200 movs r2, #0 - 8041c70: 602a str r2, [r5, #0] - 8041c72: 461a mov r2, r3 - 8041c74: f7e2 fd88 bl 8024788 <_read> - 8041c78: 1c43 adds r3, r0, #1 - 8041c7a: d102 bne.n 8041c82 <_read_r+0x1e> - 8041c7c: 682b ldr r3, [r5, #0] - 8041c7e: b103 cbz r3, 8041c82 <_read_r+0x1e> - 8041c80: 6023 str r3, [r4, #0] - 8041c82: bd38 pop {r3, r4, r5, pc} - 8041c84: 2400eabc .word 0x2400eabc - -08041c88 <_raise_r>: - 8041c88: 291f cmp r1, #31 - 8041c8a: b538 push {r3, r4, r5, lr} - 8041c8c: 4604 mov r4, r0 - 8041c8e: 460d mov r5, r1 - 8041c90: d904 bls.n 8041c9c <_raise_r+0x14> - 8041c92: 2316 movs r3, #22 - 8041c94: 6003 str r3, [r0, #0] - 8041c96: f04f 30ff mov.w r0, #4294967295 - 8041c9a: bd38 pop {r3, r4, r5, pc} - 8041c9c: 6c42 ldr r2, [r0, #68] ; 0x44 - 8041c9e: b112 cbz r2, 8041ca6 <_raise_r+0x1e> - 8041ca0: f852 3021 ldr.w r3, [r2, r1, lsl #2] - 8041ca4: b94b cbnz r3, 8041cba <_raise_r+0x32> - 8041ca6: 4620 mov r0, r4 - 8041ca8: f000 f830 bl 8041d0c <_getpid_r> - 8041cac: 462a mov r2, r5 - 8041cae: 4601 mov r1, r0 - 8041cb0: 4620 mov r0, r4 - 8041cb2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} - 8041cb6: f000 b817 b.w 8041ce8 <_kill_r> - 8041cba: 2b01 cmp r3, #1 - 8041cbc: d00a beq.n 8041cd4 <_raise_r+0x4c> - 8041cbe: 1c59 adds r1, r3, #1 - 8041cc0: d103 bne.n 8041cca <_raise_r+0x42> +08041c94 <_read_r>: + 8041c94: b538 push {r3, r4, r5, lr} + 8041c96: 4d07 ldr r5, [pc, #28] ; (8041cb4 <_read_r+0x20>) + 8041c98: 4604 mov r4, r0 + 8041c9a: 4608 mov r0, r1 + 8041c9c: 4611 mov r1, r2 + 8041c9e: 2200 movs r2, #0 + 8041ca0: 602a str r2, [r5, #0] + 8041ca2: 461a mov r2, r3 + 8041ca4: f7e2 fd88 bl 80247b8 <_read> + 8041ca8: 1c43 adds r3, r0, #1 + 8041caa: d102 bne.n 8041cb2 <_read_r+0x1e> + 8041cac: 682b ldr r3, [r5, #0] + 8041cae: b103 cbz r3, 8041cb2 <_read_r+0x1e> + 8041cb0: 6023 str r3, [r4, #0] + 8041cb2: bd38 pop {r3, r4, r5, pc} + 8041cb4: 2400eabc .word 0x2400eabc + +08041cb8 <_raise_r>: + 8041cb8: 291f cmp r1, #31 + 8041cba: b538 push {r3, r4, r5, lr} + 8041cbc: 4604 mov r4, r0 + 8041cbe: 460d mov r5, r1 + 8041cc0: d904 bls.n 8041ccc <_raise_r+0x14> 8041cc2: 2316 movs r3, #22 8041cc4: 6003 str r3, [r0, #0] - 8041cc6: 2001 movs r0, #1 - 8041cc8: e7e7 b.n 8041c9a <_raise_r+0x12> - 8041cca: 2400 movs r4, #0 - 8041ccc: f842 4025 str.w r4, [r2, r5, lsl #2] - 8041cd0: 4628 mov r0, r5 - 8041cd2: 4798 blx r3 - 8041cd4: 2000 movs r0, #0 - 8041cd6: e7e0 b.n 8041c9a <_raise_r+0x12> - -08041cd8 : - 8041cd8: 4b02 ldr r3, [pc, #8] ; (8041ce4 ) - 8041cda: 4601 mov r1, r0 - 8041cdc: 6818 ldr r0, [r3, #0] - 8041cde: f7ff bfd3 b.w 8041c88 <_raise_r> - 8041ce2: bf00 nop - 8041ce4: 24000078 .word 0x24000078 - -08041ce8 <_kill_r>: - 8041ce8: b538 push {r3, r4, r5, lr} - 8041cea: 4d07 ldr r5, [pc, #28] ; (8041d08 <_kill_r+0x20>) - 8041cec: 2300 movs r3, #0 - 8041cee: 4604 mov r4, r0 - 8041cf0: 4608 mov r0, r1 - 8041cf2: 4611 mov r1, r2 - 8041cf4: 602b str r3, [r5, #0] - 8041cf6: f7e2 fd2b bl 8024750 <_kill> - 8041cfa: 1c43 adds r3, r0, #1 - 8041cfc: d102 bne.n 8041d04 <_kill_r+0x1c> - 8041cfe: 682b ldr r3, [r5, #0] - 8041d00: b103 cbz r3, 8041d04 <_kill_r+0x1c> - 8041d02: 6023 str r3, [r4, #0] - 8041d04: bd38 pop {r3, r4, r5, pc} - 8041d06: bf00 nop - 8041d08: 2400eabc .word 0x2400eabc - -08041d0c <_getpid_r>: - 8041d0c: f7e2 bd18 b.w 8024740 <_getpid> - -08041d10 <_fstat_r>: - 8041d10: b538 push {r3, r4, r5, lr} - 8041d12: 4d07 ldr r5, [pc, #28] ; (8041d30 <_fstat_r+0x20>) - 8041d14: 2300 movs r3, #0 - 8041d16: 4604 mov r4, r0 - 8041d18: 4608 mov r0, r1 - 8041d1a: 4611 mov r1, r2 - 8041d1c: 602b str r3, [r5, #0] - 8041d1e: f7e2 fd78 bl 8024812 <_fstat> - 8041d22: 1c43 adds r3, r0, #1 - 8041d24: d102 bne.n 8041d2c <_fstat_r+0x1c> - 8041d26: 682b ldr r3, [r5, #0] - 8041d28: b103 cbz r3, 8041d2c <_fstat_r+0x1c> - 8041d2a: 6023 str r3, [r4, #0] - 8041d2c: bd38 pop {r3, r4, r5, pc} - 8041d2e: bf00 nop - 8041d30: 2400eabc .word 0x2400eabc - -08041d34 <_isatty_r>: - 8041d34: b538 push {r3, r4, r5, lr} - 8041d36: 4d06 ldr r5, [pc, #24] ; (8041d50 <_isatty_r+0x1c>) - 8041d38: 2300 movs r3, #0 - 8041d3a: 4604 mov r4, r0 - 8041d3c: 4608 mov r0, r1 - 8041d3e: 602b str r3, [r5, #0] - 8041d40: f7e2 fd77 bl 8024832 <_isatty> - 8041d44: 1c43 adds r3, r0, #1 - 8041d46: d102 bne.n 8041d4e <_isatty_r+0x1a> - 8041d48: 682b ldr r3, [r5, #0] - 8041d4a: b103 cbz r3, 8041d4e <_isatty_r+0x1a> - 8041d4c: 6023 str r3, [r4, #0] - 8041d4e: bd38 pop {r3, r4, r5, pc} - 8041d50: 2400eabc .word 0x2400eabc - -08041d54 <_malloc_usable_size_r>: - 8041d54: f851 3c04 ldr.w r3, [r1, #-4] - 8041d58: 1f18 subs r0, r3, #4 - 8041d5a: 2b00 cmp r3, #0 - 8041d5c: bfbc itt lt - 8041d5e: 580b ldrlt r3, [r1, r0] - 8041d60: 18c0 addlt r0, r0, r3 - 8041d62: 4770 bx lr - 8041d64: 0000 movs r0, r0 + 8041cc6: f04f 30ff mov.w r0, #4294967295 + 8041cca: bd38 pop {r3, r4, r5, pc} + 8041ccc: 6c42 ldr r2, [r0, #68] ; 0x44 + 8041cce: b112 cbz r2, 8041cd6 <_raise_r+0x1e> + 8041cd0: f852 3021 ldr.w r3, [r2, r1, lsl #2] + 8041cd4: b94b cbnz r3, 8041cea <_raise_r+0x32> + 8041cd6: 4620 mov r0, r4 + 8041cd8: f000 f830 bl 8041d3c <_getpid_r> + 8041cdc: 462a mov r2, r5 + 8041cde: 4601 mov r1, r0 + 8041ce0: 4620 mov r0, r4 + 8041ce2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} + 8041ce6: f000 b817 b.w 8041d18 <_kill_r> + 8041cea: 2b01 cmp r3, #1 + 8041cec: d00a beq.n 8041d04 <_raise_r+0x4c> + 8041cee: 1c59 adds r1, r3, #1 + 8041cf0: d103 bne.n 8041cfa <_raise_r+0x42> + 8041cf2: 2316 movs r3, #22 + 8041cf4: 6003 str r3, [r0, #0] + 8041cf6: 2001 movs r0, #1 + 8041cf8: e7e7 b.n 8041cca <_raise_r+0x12> + 8041cfa: 2400 movs r4, #0 + 8041cfc: f842 4025 str.w r4, [r2, r5, lsl #2] + 8041d00: 4628 mov r0, r5 + 8041d02: 4798 blx r3 + 8041d04: 2000 movs r0, #0 + 8041d06: e7e0 b.n 8041cca <_raise_r+0x12> + +08041d08 : + 8041d08: 4b02 ldr r3, [pc, #8] ; (8041d14 ) + 8041d0a: 4601 mov r1, r0 + 8041d0c: 6818 ldr r0, [r3, #0] + 8041d0e: f7ff bfd3 b.w 8041cb8 <_raise_r> + 8041d12: bf00 nop + 8041d14: 24000078 .word 0x24000078 + +08041d18 <_kill_r>: + 8041d18: b538 push {r3, r4, r5, lr} + 8041d1a: 4d07 ldr r5, [pc, #28] ; (8041d38 <_kill_r+0x20>) + 8041d1c: 2300 movs r3, #0 + 8041d1e: 4604 mov r4, r0 + 8041d20: 4608 mov r0, r1 + 8041d22: 4611 mov r1, r2 + 8041d24: 602b str r3, [r5, #0] + 8041d26: f7e2 fd2b bl 8024780 <_kill> + 8041d2a: 1c43 adds r3, r0, #1 + 8041d2c: d102 bne.n 8041d34 <_kill_r+0x1c> + 8041d2e: 682b ldr r3, [r5, #0] + 8041d30: b103 cbz r3, 8041d34 <_kill_r+0x1c> + 8041d32: 6023 str r3, [r4, #0] + 8041d34: bd38 pop {r3, r4, r5, pc} + 8041d36: bf00 nop + 8041d38: 2400eabc .word 0x2400eabc + +08041d3c <_getpid_r>: + 8041d3c: f7e2 bd18 b.w 8024770 <_getpid> + +08041d40 <_fstat_r>: + 8041d40: b538 push {r3, r4, r5, lr} + 8041d42: 4d07 ldr r5, [pc, #28] ; (8041d60 <_fstat_r+0x20>) + 8041d44: 2300 movs r3, #0 + 8041d46: 4604 mov r4, r0 + 8041d48: 4608 mov r0, r1 + 8041d4a: 4611 mov r1, r2 + 8041d4c: 602b str r3, [r5, #0] + 8041d4e: f7e2 fd78 bl 8024842 <_fstat> + 8041d52: 1c43 adds r3, r0, #1 + 8041d54: d102 bne.n 8041d5c <_fstat_r+0x1c> + 8041d56: 682b ldr r3, [r5, #0] + 8041d58: b103 cbz r3, 8041d5c <_fstat_r+0x1c> + 8041d5a: 6023 str r3, [r4, #0] + 8041d5c: bd38 pop {r3, r4, r5, pc} + 8041d5e: bf00 nop + 8041d60: 2400eabc .word 0x2400eabc + +08041d64 <_isatty_r>: + 8041d64: b538 push {r3, r4, r5, lr} + 8041d66: 4d06 ldr r5, [pc, #24] ; (8041d80 <_isatty_r+0x1c>) + 8041d68: 2300 movs r3, #0 + 8041d6a: 4604 mov r4, r0 + 8041d6c: 4608 mov r0, r1 + 8041d6e: 602b str r3, [r5, #0] + 8041d70: f7e2 fd77 bl 8024862 <_isatty> + 8041d74: 1c43 adds r3, r0, #1 + 8041d76: d102 bne.n 8041d7e <_isatty_r+0x1a> + 8041d78: 682b ldr r3, [r5, #0] + 8041d7a: b103 cbz r3, 8041d7e <_isatty_r+0x1a> + 8041d7c: 6023 str r3, [r4, #0] + 8041d7e: bd38 pop {r3, r4, r5, pc} + 8041d80: 2400eabc .word 0x2400eabc + +08041d84 <_malloc_usable_size_r>: + 8041d84: f851 3c04 ldr.w r3, [r1, #-4] + 8041d88: 1f18 subs r0, r3, #4 + 8041d8a: 2b00 cmp r3, #0 + 8041d8c: bfbc itt lt + 8041d8e: 580b ldrlt r3, [r1, r0] + 8041d90: 18c0 addlt r0, r0, r3 + 8041d92: 4770 bx lr + 8041d94: 0000 movs r0, r0 ... -08041d68 : - 8041d68: b470 push {r4, r5, r6} - 8041d6a: ee10 1a90 vmov r1, s1 - 8041d6e: ee10 2a10 vmov r2, s0 - 8041d72: f04f 34ff mov.w r4, #4294967295 - 8041d76: 4294 cmp r4, r2 - 8041d78: f101 4040 add.w r0, r1, #3221225472 ; 0xc0000000 - 8041d7c: 4c72 ldr r4, [pc, #456] ; (8041f48 ) - 8041d7e: f500 1090 add.w r0, r0, #1179648 ; 0x120000 - 8041d82: eb74 0000 sbcs.w r0, r4, r0 - 8041d86: ed2d 8b02 vpush {d8} - 8041d8a: ea4f 4311 mov.w r3, r1, lsr #16 - 8041d8e: d35c bcc.n 8041e4a - 8041d90: 4b6e ldr r3, [pc, #440] ; (8041f4c ) - 8041d92: 4299 cmp r1, r3 - 8041d94: bf08 it eq - 8041d96: 2a00 cmpeq r2, #0 - 8041d98: f000 80c6 beq.w 8041f28 - 8041d9c: eeb7 7b00 vmov.f64 d7, #112 ; 0x3f800000 1.0 - 8041da0: ee30 0b47 vsub.f64 d0, d0, d7 - 8041da4: 4b6a ldr r3, [pc, #424] ; (8041f50 ) - 8041da6: ee20 2b00 vmul.f64 d2, d0, d0 - 8041daa: ed93 6b12 vldr d6, [r3, #72] ; 0x48 - 8041dae: ee20 4b02 vmul.f64 d4, d0, d2 - 8041db2: ed93 7b10 vldr d7, [r3, #64] ; 0x40 - 8041db6: eea6 7b00 vfma.f64 d7, d6, d0 - 8041dba: ed93 6b14 vldr d6, [r3, #80] ; 0x50 - 8041dbe: ed93 5b18 vldr d5, [r3, #96] ; 0x60 - 8041dc2: eea6 7b02 vfma.f64 d7, d6, d2 - 8041dc6: ed93 6b16 vldr d6, [r3, #88] ; 0x58 - 8041dca: eea5 6b00 vfma.f64 d6, d5, d0 - 8041dce: ed93 5b1a vldr d5, [r3, #104] ; 0x68 - 8041dd2: ed93 3b1e vldr d3, [r3, #120] ; 0x78 - 8041dd6: eea5 6b02 vfma.f64 d6, d5, d2 - 8041dda: ed93 5b1c vldr d5, [r3, #112] ; 0x70 - 8041dde: eea3 5b00 vfma.f64 d5, d3, d0 - 8041de2: ed93 3b20 vldr d3, [r3, #128] ; 0x80 - 8041de6: eea3 5b02 vfma.f64 d5, d3, d2 - 8041dea: ed93 3b22 vldr d3, [r3, #136] ; 0x88 - 8041dee: eeb0 2b40 vmov.f64 d2, d0 - 8041df2: eea3 5b04 vfma.f64 d5, d3, d4 - 8041df6: ed93 3b0e vldr d3, [r3, #56] ; 0x38 - 8041dfa: eea5 6b04 vfma.f64 d6, d5, d4 - 8041dfe: eea6 7b04 vfma.f64 d7, d6, d4 - 8041e02: ed9f 6b4b vldr d6, [pc, #300] ; 8041f30 - 8041e06: eeb0 1b47 vmov.f64 d1, d7 - 8041e0a: eeb0 5b40 vmov.f64 d5, d0 - 8041e0e: eea0 5b06 vfma.f64 d5, d0, d6 - 8041e12: eea0 5b46 vfms.f64 d5, d0, d6 - 8041e16: ee30 8b45 vsub.f64 d8, d0, d5 - 8041e1a: ee25 7b05 vmul.f64 d7, d5, d5 - 8041e1e: ee30 5b05 vadd.f64 d5, d0, d5 - 8041e22: eea7 2b03 vfma.f64 d2, d7, d3 - 8041e26: ee30 6b42 vsub.f64 d6, d0, d2 - 8041e2a: eea7 6b03 vfma.f64 d6, d7, d3 - 8041e2e: ee23 3b08 vmul.f64 d3, d3, d8 - 8041e32: eea3 6b05 vfma.f64 d6, d3, d5 - 8041e36: eeb0 0b46 vmov.f64 d0, d6 - 8041e3a: eea1 0b04 vfma.f64 d0, d1, d4 - 8041e3e: ee32 0b00 vadd.f64 d0, d2, d0 - 8041e42: ecbd 8b02 vpop {d8} - 8041e46: bc70 pop {r4, r5, r6} - 8041e48: 4770 bx lr - 8041e4a: f1a3 0410 sub.w r4, r3, #16 - 8041e4e: f647 70df movw r0, #32735 ; 0x7fdf - 8041e52: 4284 cmp r4, r0 - 8041e54: d923 bls.n 8041e9e - 8041e56: 1894 adds r4, r2, r2 - 8041e58: eb41 0001 adc.w r0, r1, r1 - 8041e5c: 4320 orrs r0, r4 - 8041e5e: d105 bne.n 8041e6c - 8041e60: ecbd 8b02 vpop {d8} - 8041e64: 2001 movs r0, #1 - 8041e66: bc70 pop {r4, r5, r6} - 8041e68: f000 b882 b.w 8041f70 <__math_divzero> - 8041e6c: 4839 ldr r0, [pc, #228] ; (8041f54 ) - 8041e6e: 4281 cmp r1, r0 - 8041e70: bf08 it eq - 8041e72: 2a00 cmpeq r2, #0 - 8041e74: d0e5 beq.n 8041e42 - 8041e76: 041a lsls r2, r3, #16 - 8041e78: d404 bmi.n 8041e84 - 8041e7a: f647 72f0 movw r2, #32752 ; 0x7ff0 - 8041e7e: ea32 0303 bics.w r3, r2, r3 - 8041e82: d104 bne.n 8041e8e - 8041e84: ecbd 8b02 vpop {d8} - 8041e88: bc70 pop {r4, r5, r6} - 8041e8a: f000 b889 b.w 8041fa0 <__math_invalid> - 8041e8e: ed9f 7b2a vldr d7, [pc, #168] ; 8041f38 - 8041e92: ee20 7b07 vmul.f64 d7, d0, d7 - 8041e96: ec53 2b17 vmov r2, r3, d7 - 8041e9a: f1a3 7150 sub.w r1, r3, #54525952 ; 0x3400000 - 8041e9e: f101 4340 add.w r3, r1, #3221225472 ; 0xc0000000 - 8041ea2: f503 13d0 add.w r3, r3, #1703936 ; 0x1a0000 - 8041ea6: 0d1e lsrs r6, r3, #20 - 8041ea8: 1e14 subs r4, r2, #0 - 8041eaa: 4a29 ldr r2, [pc, #164] ; (8041f50 ) - 8041eac: eebf 5b00 vmov.f64 d5, #240 ; 0xbf800000 -1.0 - 8041eb0: f3c3 3046 ubfx r0, r3, #13, #7 - 8041eb4: 0536 lsls r6, r6, #20 - 8041eb6: 1b8d subs r5, r1, r6 - 8041eb8: eb02 1100 add.w r1, r2, r0, lsl #4 - 8041ebc: ed91 7b24 vldr d7, [r1, #144] ; 0x90 - 8041ec0: ec45 4b16 vmov d6, r4, r5 - 8041ec4: 151b asrs r3, r3, #20 - 8041ec6: eea6 5b07 vfma.f64 d5, d6, d7 - 8041eca: ee07 3a90 vmov s15, r3 - 8041ece: ee25 2b05 vmul.f64 d2, d5, d5 - 8041ed2: eeb8 6be7 vcvt.f64.s32 d6, s15 - 8041ed6: ed92 4b00 vldr d4, [r2] - 8041eda: ee25 1b02 vmul.f64 d1, d5, d2 - 8041ede: ed91 7b26 vldr d7, [r1, #152] ; 0x98 - 8041ee2: eea4 7b06 vfma.f64 d7, d4, d6 - 8041ee6: ee35 4b07 vadd.f64 d4, d5, d7 - 8041eea: ee37 0b44 vsub.f64 d0, d7, d4 - 8041eee: ed92 7b02 vldr d7, [r2, #8] - 8041ef2: ee30 0b05 vadd.f64 d0, d0, d5 - 8041ef6: eea7 0b06 vfma.f64 d0, d7, d6 - 8041efa: ed92 7b04 vldr d7, [r2, #16] - 8041efe: ed92 6b08 vldr d6, [r2, #32] - 8041f02: eea7 0b02 vfma.f64 d0, d7, d2 - 8041f06: ed92 7b06 vldr d7, [r2, #24] - 8041f0a: ed92 3b0c vldr d3, [r2, #48] ; 0x30 - 8041f0e: eea6 7b05 vfma.f64 d7, d6, d5 - 8041f12: ed92 6b0a vldr d6, [r2, #40] ; 0x28 - 8041f16: eea3 6b05 vfma.f64 d6, d3, d5 - 8041f1a: eea6 7b02 vfma.f64 d7, d6, d2 - 8041f1e: eea1 0b07 vfma.f64 d0, d1, d7 - 8041f22: ee30 0b04 vadd.f64 d0, d0, d4 - 8041f26: e78c b.n 8041e42 - 8041f28: ed9f 0b05 vldr d0, [pc, #20] ; 8041f40 - 8041f2c: e789 b.n 8041e42 - 8041f2e: bf00 nop - 8041f30: 00000000 .word 0x00000000 - 8041f34: 41a00000 .word 0x41a00000 - 8041f38: 00000000 .word 0x00000000 - 8041f3c: 43300000 .word 0x43300000 +08041d98 : + 8041d98: b470 push {r4, r5, r6} + 8041d9a: ee10 1a90 vmov r1, s1 + 8041d9e: ee10 2a10 vmov r2, s0 + 8041da2: f04f 34ff mov.w r4, #4294967295 + 8041da6: 4294 cmp r4, r2 + 8041da8: f101 4040 add.w r0, r1, #3221225472 ; 0xc0000000 + 8041dac: 4c72 ldr r4, [pc, #456] ; (8041f78 ) + 8041dae: f500 1090 add.w r0, r0, #1179648 ; 0x120000 + 8041db2: eb74 0000 sbcs.w r0, r4, r0 + 8041db6: ed2d 8b02 vpush {d8} + 8041dba: ea4f 4311 mov.w r3, r1, lsr #16 + 8041dbe: d35c bcc.n 8041e7a + 8041dc0: 4b6e ldr r3, [pc, #440] ; (8041f7c ) + 8041dc2: 4299 cmp r1, r3 + 8041dc4: bf08 it eq + 8041dc6: 2a00 cmpeq r2, #0 + 8041dc8: f000 80c6 beq.w 8041f58 + 8041dcc: eeb7 7b00 vmov.f64 d7, #112 ; 0x3f800000 1.0 + 8041dd0: ee30 0b47 vsub.f64 d0, d0, d7 + 8041dd4: 4b6a ldr r3, [pc, #424] ; (8041f80 ) + 8041dd6: ee20 2b00 vmul.f64 d2, d0, d0 + 8041dda: ed93 6b12 vldr d6, [r3, #72] ; 0x48 + 8041dde: ee20 4b02 vmul.f64 d4, d0, d2 + 8041de2: ed93 7b10 vldr d7, [r3, #64] ; 0x40 + 8041de6: eea6 7b00 vfma.f64 d7, d6, d0 + 8041dea: ed93 6b14 vldr d6, [r3, #80] ; 0x50 + 8041dee: ed93 5b18 vldr d5, [r3, #96] ; 0x60 + 8041df2: eea6 7b02 vfma.f64 d7, d6, d2 + 8041df6: ed93 6b16 vldr d6, [r3, #88] ; 0x58 + 8041dfa: eea5 6b00 vfma.f64 d6, d5, d0 + 8041dfe: ed93 5b1a vldr d5, [r3, #104] ; 0x68 + 8041e02: ed93 3b1e vldr d3, [r3, #120] ; 0x78 + 8041e06: eea5 6b02 vfma.f64 d6, d5, d2 + 8041e0a: ed93 5b1c vldr d5, [r3, #112] ; 0x70 + 8041e0e: eea3 5b00 vfma.f64 d5, d3, d0 + 8041e12: ed93 3b20 vldr d3, [r3, #128] ; 0x80 + 8041e16: eea3 5b02 vfma.f64 d5, d3, d2 + 8041e1a: ed93 3b22 vldr d3, [r3, #136] ; 0x88 + 8041e1e: eeb0 2b40 vmov.f64 d2, d0 + 8041e22: eea3 5b04 vfma.f64 d5, d3, d4 + 8041e26: ed93 3b0e vldr d3, [r3, #56] ; 0x38 + 8041e2a: eea5 6b04 vfma.f64 d6, d5, d4 + 8041e2e: eea6 7b04 vfma.f64 d7, d6, d4 + 8041e32: ed9f 6b4b vldr d6, [pc, #300] ; 8041f60 + 8041e36: eeb0 1b47 vmov.f64 d1, d7 + 8041e3a: eeb0 5b40 vmov.f64 d5, d0 + 8041e3e: eea0 5b06 vfma.f64 d5, d0, d6 + 8041e42: eea0 5b46 vfms.f64 d5, d0, d6 + 8041e46: ee30 8b45 vsub.f64 d8, d0, d5 + 8041e4a: ee25 7b05 vmul.f64 d7, d5, d5 + 8041e4e: ee30 5b05 vadd.f64 d5, d0, d5 + 8041e52: eea7 2b03 vfma.f64 d2, d7, d3 + 8041e56: ee30 6b42 vsub.f64 d6, d0, d2 + 8041e5a: eea7 6b03 vfma.f64 d6, d7, d3 + 8041e5e: ee23 3b08 vmul.f64 d3, d3, d8 + 8041e62: eea3 6b05 vfma.f64 d6, d3, d5 + 8041e66: eeb0 0b46 vmov.f64 d0, d6 + 8041e6a: eea1 0b04 vfma.f64 d0, d1, d4 + 8041e6e: ee32 0b00 vadd.f64 d0, d2, d0 + 8041e72: ecbd 8b02 vpop {d8} + 8041e76: bc70 pop {r4, r5, r6} + 8041e78: 4770 bx lr + 8041e7a: f1a3 0410 sub.w r4, r3, #16 + 8041e7e: f647 70df movw r0, #32735 ; 0x7fdf + 8041e82: 4284 cmp r4, r0 + 8041e84: d923 bls.n 8041ece + 8041e86: 1894 adds r4, r2, r2 + 8041e88: eb41 0001 adc.w r0, r1, r1 + 8041e8c: 4320 orrs r0, r4 + 8041e8e: d105 bne.n 8041e9c + 8041e90: ecbd 8b02 vpop {d8} + 8041e94: 2001 movs r0, #1 + 8041e96: bc70 pop {r4, r5, r6} + 8041e98: f000 b882 b.w 8041fa0 <__math_divzero> + 8041e9c: 4839 ldr r0, [pc, #228] ; (8041f84 ) + 8041e9e: 4281 cmp r1, r0 + 8041ea0: bf08 it eq + 8041ea2: 2a00 cmpeq r2, #0 + 8041ea4: d0e5 beq.n 8041e72 + 8041ea6: 041a lsls r2, r3, #16 + 8041ea8: d404 bmi.n 8041eb4 + 8041eaa: f647 72f0 movw r2, #32752 ; 0x7ff0 + 8041eae: ea32 0303 bics.w r3, r2, r3 + 8041eb2: d104 bne.n 8041ebe + 8041eb4: ecbd 8b02 vpop {d8} + 8041eb8: bc70 pop {r4, r5, r6} + 8041eba: f000 b889 b.w 8041fd0 <__math_invalid> + 8041ebe: ed9f 7b2a vldr d7, [pc, #168] ; 8041f68 + 8041ec2: ee20 7b07 vmul.f64 d7, d0, d7 + 8041ec6: ec53 2b17 vmov r2, r3, d7 + 8041eca: f1a3 7150 sub.w r1, r3, #54525952 ; 0x3400000 + 8041ece: f101 4340 add.w r3, r1, #3221225472 ; 0xc0000000 + 8041ed2: f503 13d0 add.w r3, r3, #1703936 ; 0x1a0000 + 8041ed6: 0d1e lsrs r6, r3, #20 + 8041ed8: 1e14 subs r4, r2, #0 + 8041eda: 4a29 ldr r2, [pc, #164] ; (8041f80 ) + 8041edc: eebf 5b00 vmov.f64 d5, #240 ; 0xbf800000 -1.0 + 8041ee0: f3c3 3046 ubfx r0, r3, #13, #7 + 8041ee4: 0536 lsls r6, r6, #20 + 8041ee6: 1b8d subs r5, r1, r6 + 8041ee8: eb02 1100 add.w r1, r2, r0, lsl #4 + 8041eec: ed91 7b24 vldr d7, [r1, #144] ; 0x90 + 8041ef0: ec45 4b16 vmov d6, r4, r5 + 8041ef4: 151b asrs r3, r3, #20 + 8041ef6: eea6 5b07 vfma.f64 d5, d6, d7 + 8041efa: ee07 3a90 vmov s15, r3 + 8041efe: ee25 2b05 vmul.f64 d2, d5, d5 + 8041f02: eeb8 6be7 vcvt.f64.s32 d6, s15 + 8041f06: ed92 4b00 vldr d4, [r2] + 8041f0a: ee25 1b02 vmul.f64 d1, d5, d2 + 8041f0e: ed91 7b26 vldr d7, [r1, #152] ; 0x98 + 8041f12: eea4 7b06 vfma.f64 d7, d4, d6 + 8041f16: ee35 4b07 vadd.f64 d4, d5, d7 + 8041f1a: ee37 0b44 vsub.f64 d0, d7, d4 + 8041f1e: ed92 7b02 vldr d7, [r2, #8] + 8041f22: ee30 0b05 vadd.f64 d0, d0, d5 + 8041f26: eea7 0b06 vfma.f64 d0, d7, d6 + 8041f2a: ed92 7b04 vldr d7, [r2, #16] + 8041f2e: ed92 6b08 vldr d6, [r2, #32] + 8041f32: eea7 0b02 vfma.f64 d0, d7, d2 + 8041f36: ed92 7b06 vldr d7, [r2, #24] + 8041f3a: ed92 3b0c vldr d3, [r2, #48] ; 0x30 + 8041f3e: eea6 7b05 vfma.f64 d7, d6, d5 + 8041f42: ed92 6b0a vldr d6, [r2, #40] ; 0x28 + 8041f46: eea3 6b05 vfma.f64 d6, d3, d5 + 8041f4a: eea6 7b02 vfma.f64 d7, d6, d2 + 8041f4e: eea1 0b07 vfma.f64 d0, d1, d7 + 8041f52: ee30 0b04 vadd.f64 d0, d0, d4 + 8041f56: e78c b.n 8041e72 + 8041f58: ed9f 0b05 vldr d0, [pc, #20] ; 8041f70 + 8041f5c: e789 b.n 8041e72 + 8041f5e: bf00 nop + 8041f60: 00000000 .word 0x00000000 + 8041f64: 41a00000 .word 0x41a00000 + 8041f68: 00000000 .word 0x00000000 + 8041f6c: 43300000 .word 0x43300000 ... - 8041f48: 000308ff .word 0x000308ff - 8041f4c: 3ff00000 .word 0x3ff00000 - 8041f50: 08044f30 .word 0x08044f30 - 8041f54: 7ff00000 .word 0x7ff00000 - -08041f58 : - 8041f58: b513 push {r0, r1, r4, lr} - 8041f5a: 4604 mov r4, r0 - 8041f5c: ed8d 0b00 vstr d0, [sp] - 8041f60: f7fe fe82 bl 8040c68 <__errno> - 8041f64: ed9d 0b00 vldr d0, [sp] - 8041f68: 6004 str r4, [r0, #0] - 8041f6a: b002 add sp, #8 - 8041f6c: bd10 pop {r4, pc} + 8041f78: 000308ff .word 0x000308ff + 8041f7c: 3ff00000 .word 0x3ff00000 + 8041f80: 08044f60 .word 0x08044f60 + 8041f84: 7ff00000 .word 0x7ff00000 + +08041f88 : + 8041f88: b513 push {r0, r1, r4, lr} + 8041f8a: 4604 mov r4, r0 + 8041f8c: ed8d 0b00 vstr d0, [sp] + 8041f90: f7fe fe82 bl 8040c98 <__errno> + 8041f94: ed9d 0b00 vldr d0, [sp] + 8041f98: 6004 str r4, [r0, #0] + 8041f9a: b002 add sp, #8 + 8041f9c: bd10 pop {r4, pc} ... -08041f70 <__math_divzero>: - 8041f70: b082 sub sp, #8 - 8041f72: 2800 cmp r0, #0 - 8041f74: eeb7 6b00 vmov.f64 d6, #112 ; 0x3f800000 1.0 - 8041f78: eebf 7b00 vmov.f64 d7, #240 ; 0xbf800000 -1.0 - 8041f7c: fe06 7b07 vseleq.f64 d7, d6, d7 - 8041f80: ed8d 7b00 vstr d7, [sp] - 8041f84: ed9d 0b00 vldr d0, [sp] - 8041f88: ed9f 7b03 vldr d7, [pc, #12] ; 8041f98 <__math_divzero+0x28> - 8041f8c: 2022 movs r0, #34 ; 0x22 - 8041f8e: ee80 0b07 vdiv.f64 d0, d0, d7 - 8041f92: b002 add sp, #8 - 8041f94: f7ff bfe0 b.w 8041f58 +08041fa0 <__math_divzero>: + 8041fa0: b082 sub sp, #8 + 8041fa2: 2800 cmp r0, #0 + 8041fa4: eeb7 6b00 vmov.f64 d6, #112 ; 0x3f800000 1.0 + 8041fa8: eebf 7b00 vmov.f64 d7, #240 ; 0xbf800000 -1.0 + 8041fac: fe06 7b07 vseleq.f64 d7, d6, d7 + 8041fb0: ed8d 7b00 vstr d7, [sp] + 8041fb4: ed9d 0b00 vldr d0, [sp] + 8041fb8: ed9f 7b03 vldr d7, [pc, #12] ; 8041fc8 <__math_divzero+0x28> + 8041fbc: 2022 movs r0, #34 ; 0x22 + 8041fbe: ee80 0b07 vdiv.f64 d0, d0, d7 + 8041fc2: b002 add sp, #8 + 8041fc4: f7ff bfe0 b.w 8041f88 ... -08041fa0 <__math_invalid>: - 8041fa0: eeb0 7b40 vmov.f64 d7, d0 - 8041fa4: eeb4 7b47 vcmp.f64 d7, d7 - 8041fa8: eef1 fa10 vmrs APSR_nzcv, fpscr - 8041fac: ee30 6b40 vsub.f64 d6, d0, d0 - 8041fb0: ee86 0b06 vdiv.f64 d0, d6, d6 - 8041fb4: d602 bvs.n 8041fbc <__math_invalid+0x1c> - 8041fb6: 2021 movs r0, #33 ; 0x21 - 8041fb8: f7ff bfce b.w 8041f58 - 8041fbc: 4770 bx lr +08041fd0 <__math_invalid>: + 8041fd0: eeb0 7b40 vmov.f64 d7, d0 + 8041fd4: eeb4 7b47 vcmp.f64 d7, d7 + 8041fd8: eef1 fa10 vmrs APSR_nzcv, fpscr + 8041fdc: ee30 6b40 vsub.f64 d6, d0, d0 + 8041fe0: ee86 0b06 vdiv.f64 d0, d6, d6 + 8041fe4: d602 bvs.n 8041fec <__math_invalid+0x1c> + 8041fe6: 2021 movs r0, #33 ; 0x21 + 8041fe8: f7ff bfce b.w 8041f88 + 8041fec: 4770 bx lr ... -08041fc0 <_init>: - 8041fc0: b5f8 push {r3, r4, r5, r6, r7, lr} - 8041fc2: bf00 nop - 8041fc4: bcf8 pop {r3, r4, r5, r6, r7} - 8041fc6: bc08 pop {r3} - 8041fc8: 469e mov lr, r3 - 8041fca: 4770 bx lr - -08041fcc <_fini>: - 8041fcc: b5f8 push {r3, r4, r5, r6, r7, lr} - 8041fce: bf00 nop - 8041fd0: bcf8 pop {r3, r4, r5, r6, r7} - 8041fd2: bc08 pop {r3} - 8041fd4: 469e mov lr, r3 - 8041fd6: 4770 bx lr +08041ff0 <_init>: + 8041ff0: b5f8 push {r3, r4, r5, r6, r7, lr} + 8041ff2: bf00 nop + 8041ff4: bcf8 pop {r3, r4, r5, r6, r7} + 8041ff6: bc08 pop {r3} + 8041ff8: 469e mov lr, r3 + 8041ffa: 4770 bx lr + +08041ffc <_fini>: + 8041ffc: b5f8 push {r3, r4, r5, r6, r7, lr} + 8041ffe: bf00 nop + 8042000: bcf8 pop {r3, r4, r5, r6, r7} + 8042002: bc08 pop {r3} + 8042004: 469e mov lr, r3 + 8042006: 4770 bx lr diff --git a/Debug/EchoNewBB0825.map b/Debug/EchoNewBB0825.map index b89638a..44e1630 100644 --- a/Debug/EchoNewBB0825.map +++ b/Debug/EchoNewBB0825.map @@ -37198,7 +37198,7 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext 0x0000000008020000 g_pfnVectors 0x0000000008020298 . = ALIGN (0x4) -.text 0x00000000080202a0 0x21d38 +.text 0x00000000080202a0 0x21d68 0x00000000080202a0 . = ALIGN (0x4) *(.text) .text 0x00000000080202a0 0x40 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o @@ -37511,1839 +37511,1839 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .text.HAL_I2C_MspInit 0x0000000008023bb0 0xec ./Core/Src/i2c.o 0x0000000008023bb0 HAL_I2C_MspInit - .text.main 0x0000000008023c9c 0x470 ./Core/Src/main.o + .text.main 0x0000000008023c9c 0x4a0 ./Core/Src/main.o 0x0000000008023c9c main .text.SystemClock_Config - 0x000000000802410c 0x108 ./Core/Src/main.o - 0x000000000802410c SystemClock_Config + 0x000000000802413c 0x108 ./Core/Src/main.o + 0x000000000802413c SystemClock_Config .text.CV_GV_Init - 0x0000000008024214 0x4c ./Core/Src/main.o - 0x0000000008024214 CV_GV_Init + 0x0000000008024244 0x4c ./Core/Src/main.o + 0x0000000008024244 CV_GV_Init .text.MPU_Config - 0x0000000008024260 0x9c ./Core/Src/main.o + 0x0000000008024290 0x9c ./Core/Src/main.o .text.Error_Handler - 0x00000000080242fc 0xa ./Core/Src/main.o - 0x00000000080242fc Error_Handler - *fill* 0x0000000008024306 0x2 + 0x000000000802432c 0xa ./Core/Src/main.o + 0x000000000802432c Error_Handler + *fill* 0x0000000008024336 0x2 .text.MX_QUADSPI_Init - 0x0000000008024308 0x58 ./Core/Src/quadspi.o - 0x0000000008024308 MX_QUADSPI_Init + 0x0000000008024338 0x58 ./Core/Src/quadspi.o + 0x0000000008024338 MX_QUADSPI_Init .text.HAL_QSPI_MspInit - 0x0000000008024360 0x178 ./Core/Src/quadspi.o - 0x0000000008024360 HAL_QSPI_MspInit + 0x0000000008024390 0x178 ./Core/Src/quadspi.o + 0x0000000008024390 HAL_QSPI_MspInit .text.HAL_MspInit - 0x00000000080244d8 0x34 ./Core/Src/stm32h7xx_hal_msp.o - 0x00000000080244d8 HAL_MspInit + 0x0000000008024508 0x34 ./Core/Src/stm32h7xx_hal_msp.o + 0x0000000008024508 HAL_MspInit .text.NMI_Handler - 0x000000000802450c 0x6 ./Core/Src/stm32h7xx_it.o - 0x000000000802450c NMI_Handler + 0x000000000802453c 0x6 ./Core/Src/stm32h7xx_it.o + 0x000000000802453c NMI_Handler .text.HardFault_Handler - 0x0000000008024512 0x6 ./Core/Src/stm32h7xx_it.o - 0x0000000008024512 HardFault_Handler + 0x0000000008024542 0x6 ./Core/Src/stm32h7xx_it.o + 0x0000000008024542 HardFault_Handler .text.MemManage_Handler - 0x0000000008024518 0x6 ./Core/Src/stm32h7xx_it.o - 0x0000000008024518 MemManage_Handler + 0x0000000008024548 0x6 ./Core/Src/stm32h7xx_it.o + 0x0000000008024548 MemManage_Handler .text.BusFault_Handler - 0x000000000802451e 0x6 ./Core/Src/stm32h7xx_it.o - 0x000000000802451e BusFault_Handler + 0x000000000802454e 0x6 ./Core/Src/stm32h7xx_it.o + 0x000000000802454e BusFault_Handler .text.UsageFault_Handler - 0x0000000008024524 0x6 ./Core/Src/stm32h7xx_it.o - 0x0000000008024524 UsageFault_Handler + 0x0000000008024554 0x6 ./Core/Src/stm32h7xx_it.o + 0x0000000008024554 UsageFault_Handler .text.SVC_Handler - 0x000000000802452a 0xe ./Core/Src/stm32h7xx_it.o - 0x000000000802452a SVC_Handler + 0x000000000802455a 0xe ./Core/Src/stm32h7xx_it.o + 0x000000000802455a SVC_Handler .text.DebugMon_Handler - 0x0000000008024538 0xe ./Core/Src/stm32h7xx_it.o - 0x0000000008024538 DebugMon_Handler + 0x0000000008024568 0xe ./Core/Src/stm32h7xx_it.o + 0x0000000008024568 DebugMon_Handler .text.PendSV_Handler - 0x0000000008024546 0xe ./Core/Src/stm32h7xx_it.o - 0x0000000008024546 PendSV_Handler + 0x0000000008024576 0xe ./Core/Src/stm32h7xx_it.o + 0x0000000008024576 PendSV_Handler .text.SysTick_Handler - 0x0000000008024554 0xc ./Core/Src/stm32h7xx_it.o - 0x0000000008024554 SysTick_Handler + 0x0000000008024584 0xc ./Core/Src/stm32h7xx_it.o + 0x0000000008024584 SysTick_Handler .text.DMA1_Stream0_IRQHandler - 0x0000000008024560 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024560 DMA1_Stream0_IRQHandler + 0x0000000008024590 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024590 DMA1_Stream0_IRQHandler .text.DMA1_Stream1_IRQHandler - 0x0000000008024574 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024574 DMA1_Stream1_IRQHandler + 0x00000000080245a4 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080245a4 DMA1_Stream1_IRQHandler .text.DMA1_Stream2_IRQHandler - 0x0000000008024588 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024588 DMA1_Stream2_IRQHandler + 0x00000000080245b8 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080245b8 DMA1_Stream2_IRQHandler .text.DMA1_Stream3_IRQHandler - 0x000000000802459c 0x14 ./Core/Src/stm32h7xx_it.o - 0x000000000802459c DMA1_Stream3_IRQHandler + 0x00000000080245cc 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080245cc DMA1_Stream3_IRQHandler .text.DMA1_Stream4_IRQHandler - 0x00000000080245b0 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080245b0 DMA1_Stream4_IRQHandler + 0x00000000080245e0 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080245e0 DMA1_Stream4_IRQHandler .text.DMA1_Stream5_IRQHandler - 0x00000000080245c4 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080245c4 DMA1_Stream5_IRQHandler + 0x00000000080245f4 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080245f4 DMA1_Stream5_IRQHandler .text.DMA1_Stream6_IRQHandler - 0x00000000080245d8 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080245d8 DMA1_Stream6_IRQHandler + 0x0000000008024608 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024608 DMA1_Stream6_IRQHandler .text.FDCAN1_IT0_IRQHandler - 0x00000000080245ec 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080245ec FDCAN1_IT0_IRQHandler + 0x000000000802461c 0x14 ./Core/Src/stm32h7xx_it.o + 0x000000000802461c FDCAN1_IT0_IRQHandler .text.FDCAN2_IT0_IRQHandler - 0x0000000008024600 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024600 FDCAN2_IT0_IRQHandler + 0x0000000008024630 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024630 FDCAN2_IT0_IRQHandler .text.TIM1_UP_IRQHandler - 0x0000000008024614 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024614 TIM1_UP_IRQHandler + 0x0000000008024644 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024644 TIM1_UP_IRQHandler .text.USART1_IRQHandler - 0x0000000008024628 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024628 USART1_IRQHandler + 0x0000000008024658 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024658 USART1_IRQHandler .text.USART2_IRQHandler - 0x000000000802463c 0x14 ./Core/Src/stm32h7xx_it.o - 0x000000000802463c USART2_IRQHandler + 0x000000000802466c 0x14 ./Core/Src/stm32h7xx_it.o + 0x000000000802466c USART2_IRQHandler .text.USART3_IRQHandler - 0x0000000008024650 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024650 USART3_IRQHandler + 0x0000000008024680 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024680 USART3_IRQHandler .text.TIM8_UP_TIM13_IRQHandler - 0x0000000008024664 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024664 TIM8_UP_TIM13_IRQHandler + 0x0000000008024694 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024694 TIM8_UP_TIM13_IRQHandler .text.UART4_IRQHandler - 0x0000000008024678 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024678 UART4_IRQHandler + 0x00000000080246a8 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246a8 UART4_IRQHandler .text.UART5_IRQHandler - 0x000000000802468c 0x14 ./Core/Src/stm32h7xx_it.o - 0x000000000802468c UART5_IRQHandler + 0x00000000080246bc 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246bc UART5_IRQHandler .text.ETH_IRQHandler - 0x00000000080246a0 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246a0 ETH_IRQHandler + 0x00000000080246d0 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246d0 ETH_IRQHandler .text.USART6_IRQHandler - 0x00000000080246b4 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246b4 USART6_IRQHandler + 0x00000000080246e4 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246e4 USART6_IRQHandler .text.UART7_IRQHandler - 0x00000000080246c8 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246c8 UART7_IRQHandler + 0x00000000080246f8 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246f8 UART7_IRQHandler .text.QUADSPI_IRQHandler - 0x00000000080246dc 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246dc QUADSPI_IRQHandler + 0x000000000802470c 0x14 ./Core/Src/stm32h7xx_it.o + 0x000000000802470c QUADSPI_IRQHandler .text.I2C4_EV_IRQHandler - 0x00000000080246f0 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246f0 I2C4_EV_IRQHandler + 0x0000000008024720 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024720 I2C4_EV_IRQHandler .text.I2C4_ER_IRQHandler - 0x0000000008024704 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024704 I2C4_ER_IRQHandler + 0x0000000008024734 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024734 I2C4_ER_IRQHandler .text.BDMA_Channel0_IRQHandler - 0x0000000008024718 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024718 BDMA_Channel0_IRQHandler + 0x0000000008024748 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024748 BDMA_Channel0_IRQHandler .text.LPUART1_IRQHandler - 0x000000000802472c 0x14 ./Core/Src/stm32h7xx_it.o - 0x000000000802472c LPUART1_IRQHandler - .text._getpid 0x0000000008024740 0x10 ./Core/Src/syscalls.o - 0x0000000008024740 _getpid - .text._kill 0x0000000008024750 0x24 ./Core/Src/syscalls.o - 0x0000000008024750 _kill - .text._exit 0x0000000008024774 0x14 ./Core/Src/syscalls.o - 0x0000000008024774 _exit - .text._read 0x0000000008024788 0x3a ./Core/Src/syscalls.o - 0x0000000008024788 _read - .text._write 0x00000000080247c2 0x38 ./Core/Src/syscalls.o - 0x00000000080247c2 _write - .text._close 0x00000000080247fa 0x18 ./Core/Src/syscalls.o - 0x00000000080247fa _close - .text._fstat 0x0000000008024812 0x20 ./Core/Src/syscalls.o - 0x0000000008024812 _fstat - .text._isatty 0x0000000008024832 0x16 ./Core/Src/syscalls.o - 0x0000000008024832 _isatty - .text._lseek 0x0000000008024848 0x1a ./Core/Src/syscalls.o - 0x0000000008024848 _lseek - *fill* 0x0000000008024862 0x2 - .text._sbrk 0x0000000008024864 0x70 ./Core/Src/sysmem.o - 0x0000000008024864 _sbrk + 0x000000000802475c 0x14 ./Core/Src/stm32h7xx_it.o + 0x000000000802475c LPUART1_IRQHandler + .text._getpid 0x0000000008024770 0x10 ./Core/Src/syscalls.o + 0x0000000008024770 _getpid + .text._kill 0x0000000008024780 0x24 ./Core/Src/syscalls.o + 0x0000000008024780 _kill + .text._exit 0x00000000080247a4 0x14 ./Core/Src/syscalls.o + 0x00000000080247a4 _exit + .text._read 0x00000000080247b8 0x3a ./Core/Src/syscalls.o + 0x00000000080247b8 _read + .text._write 0x00000000080247f2 0x38 ./Core/Src/syscalls.o + 0x00000000080247f2 _write + .text._close 0x000000000802482a 0x18 ./Core/Src/syscalls.o + 0x000000000802482a _close + .text._fstat 0x0000000008024842 0x20 ./Core/Src/syscalls.o + 0x0000000008024842 _fstat + .text._isatty 0x0000000008024862 0x16 ./Core/Src/syscalls.o + 0x0000000008024862 _isatty + .text._lseek 0x0000000008024878 0x1a ./Core/Src/syscalls.o + 0x0000000008024878 _lseek + *fill* 0x0000000008024892 0x2 + .text._sbrk 0x0000000008024894 0x70 ./Core/Src/sysmem.o + 0x0000000008024894 _sbrk .text.SystemInit - 0x00000000080248d4 0x11c ./Core/Src/system_stm32h7xx.o - 0x00000000080248d4 SystemInit + 0x0000000008024904 0x11c ./Core/Src/system_stm32h7xx.o + 0x0000000008024904 SystemInit .text.MX_TIM1_Init - 0x00000000080249f0 0xa8 ./Core/Src/tim.o - 0x00000000080249f0 MX_TIM1_Init + 0x0000000008024a20 0xa8 ./Core/Src/tim.o + 0x0000000008024a20 MX_TIM1_Init .text.MX_TIM8_Init - 0x0000000008024a98 0xa8 ./Core/Src/tim.o - 0x0000000008024a98 MX_TIM8_Init + 0x0000000008024ac8 0xa8 ./Core/Src/tim.o + 0x0000000008024ac8 MX_TIM8_Init .text.HAL_TIM_Base_MspInit - 0x0000000008024b40 0x90 ./Core/Src/tim.o - 0x0000000008024b40 HAL_TIM_Base_MspInit + 0x0000000008024b70 0x90 ./Core/Src/tim.o + 0x0000000008024b70 HAL_TIM_Base_MspInit .text.MX_LPUART1_UART_Init - 0x0000000008024bd0 0xa8 ./Core/Src/usart.o - 0x0000000008024bd0 MX_LPUART1_UART_Init + 0x0000000008024c00 0xa8 ./Core/Src/usart.o + 0x0000000008024c00 MX_LPUART1_UART_Init .text.MX_UART4_Init - 0x0000000008024c78 0xa8 ./Core/Src/usart.o - 0x0000000008024c78 MX_UART4_Init + 0x0000000008024ca8 0xa8 ./Core/Src/usart.o + 0x0000000008024ca8 MX_UART4_Init .text.MX_UART5_Init - 0x0000000008024d20 0xa8 ./Core/Src/usart.o - 0x0000000008024d20 MX_UART5_Init + 0x0000000008024d50 0xa8 ./Core/Src/usart.o + 0x0000000008024d50 MX_UART5_Init .text.MX_UART7_Init - 0x0000000008024dc8 0xb0 ./Core/Src/usart.o - 0x0000000008024dc8 MX_UART7_Init + 0x0000000008024df8 0xb0 ./Core/Src/usart.o + 0x0000000008024df8 MX_UART7_Init .text.MX_USART1_UART_Init - 0x0000000008024e78 0xb0 ./Core/Src/usart.o - 0x0000000008024e78 MX_USART1_UART_Init + 0x0000000008024ea8 0xb0 ./Core/Src/usart.o + 0x0000000008024ea8 MX_USART1_UART_Init .text.MX_USART2_UART_Init - 0x0000000008024f28 0xb0 ./Core/Src/usart.o - 0x0000000008024f28 MX_USART2_UART_Init + 0x0000000008024f58 0xb0 ./Core/Src/usart.o + 0x0000000008024f58 MX_USART2_UART_Init .text.MX_USART3_UART_Init - 0x0000000008024fd8 0xb0 ./Core/Src/usart.o - 0x0000000008024fd8 MX_USART3_UART_Init + 0x0000000008025008 0xb0 ./Core/Src/usart.o + 0x0000000008025008 MX_USART3_UART_Init .text.MX_USART6_UART_Init - 0x0000000008025088 0xb0 ./Core/Src/usart.o - 0x0000000008025088 MX_USART6_UART_Init + 0x00000000080250b8 0xb0 ./Core/Src/usart.o + 0x00000000080250b8 MX_USART6_UART_Init .text.HAL_UART_MspInit - 0x0000000008025138 0xa3c ./Core/Src/usart.o - 0x0000000008025138 HAL_UART_MspInit + 0x0000000008025168 0xa3c ./Core/Src/usart.o + 0x0000000008025168 HAL_UART_MspInit .text.Reset_Handler - 0x0000000008025b74 0x50 ./Core/Startup/startup_stm32h743vgtx.o - 0x0000000008025b74 Reset_Handler + 0x0000000008025ba4 0x50 ./Core/Startup/startup_stm32h743vgtx.o + 0x0000000008025ba4 Reset_Handler .text.Default_Handler - 0x0000000008025bc4 0x2 ./Core/Startup/startup_stm32h743vgtx.o - 0x0000000008025bc4 RTC_Alarm_IRQHandler - 0x0000000008025bc4 EXTI2_IRQHandler - 0x0000000008025bc4 TIM8_CC_IRQHandler - 0x0000000008025bc4 HRTIM1_Master_IRQHandler - 0x0000000008025bc4 UART8_IRQHandler - 0x0000000008025bc4 SPI4_IRQHandler - 0x0000000008025bc4 TIM1_CC_IRQHandler - 0x0000000008025bc4 BDMA_Channel6_IRQHandler - 0x0000000008025bc4 DMA2_Stream5_IRQHandler - 0x0000000008025bc4 HRTIM1_FLT_IRQHandler - 0x0000000008025bc4 JPEG_IRQHandler - 0x0000000008025bc4 BDMA_Channel1_IRQHandler - 0x0000000008025bc4 HRTIM1_TIMD_IRQHandler - 0x0000000008025bc4 TAMP_STAMP_IRQHandler - 0x0000000008025bc4 EXTI3_IRQHandler - 0x0000000008025bc4 LPTIM4_IRQHandler - 0x0000000008025bc4 TIM8_TRG_COM_TIM14_IRQHandler - 0x0000000008025bc4 LPTIM2_IRQHandler - 0x0000000008025bc4 DFSDM1_FLT1_IRQHandler - 0x0000000008025bc4 DMAMUX2_OVR_IRQHandler - 0x0000000008025bc4 I2C3_ER_IRQHandler - 0x0000000008025bc4 DFSDM1_FLT2_IRQHandler - 0x0000000008025bc4 MDMA_IRQHandler - 0x0000000008025bc4 LPTIM3_IRQHandler - 0x0000000008025bc4 HSEM1_IRQHandler - 0x0000000008025bc4 EXTI0_IRQHandler - 0x0000000008025bc4 I2C2_EV_IRQHandler - 0x0000000008025bc4 FPU_IRQHandler - 0x0000000008025bc4 OTG_HS_WKUP_IRQHandler - 0x0000000008025bc4 FDCAN1_IT1_IRQHandler - 0x0000000008025bc4 LTDC_ER_IRQHandler - 0x0000000008025bc4 DMA2_Stream2_IRQHandler - 0x0000000008025bc4 HRTIM1_TIME_IRQHandler - 0x0000000008025bc4 SPI1_IRQHandler - 0x0000000008025bc4 TIM6_DAC_IRQHandler - 0x0000000008025bc4 DCMI_IRQHandler - 0x0000000008025bc4 HRTIM1_TIMC_IRQHandler - 0x0000000008025bc4 DMA2_Stream3_IRQHandler - 0x0000000008025bc4 SAI2_IRQHandler - 0x0000000008025bc4 DFSDM1_FLT3_IRQHandler - 0x0000000008025bc4 TIM17_IRQHandler - 0x0000000008025bc4 BDMA_Channel7_IRQHandler - 0x0000000008025bc4 LPTIM5_IRQHandler - 0x0000000008025bc4 ADC3_IRQHandler - 0x0000000008025bc4 DMA2_Stream0_IRQHandler - 0x0000000008025bc4 TIM4_IRQHandler - 0x0000000008025bc4 BDMA_Channel2_IRQHandler - 0x0000000008025bc4 I2C1_EV_IRQHandler - 0x0000000008025bc4 DMAMUX1_OVR_IRQHandler - 0x0000000008025bc4 TIM16_IRQHandler - 0x0000000008025bc4 BDMA_Channel5_IRQHandler - 0x0000000008025bc4 TIM3_IRQHandler - 0x0000000008025bc4 RCC_IRQHandler - 0x0000000008025bc4 TIM8_BRK_TIM12_IRQHandler - 0x0000000008025bc4 TIM1_TRG_COM_IRQHandler - 0x0000000008025bc4 Default_Handler - 0x0000000008025bc4 ECC_IRQHandler - 0x0000000008025bc4 CEC_IRQHandler - 0x0000000008025bc4 EXTI15_10_IRQHandler - 0x0000000008025bc4 ADC_IRQHandler - 0x0000000008025bc4 DMA1_Stream7_IRQHandler - 0x0000000008025bc4 HRTIM1_TIMA_IRQHandler - 0x0000000008025bc4 SPI5_IRQHandler - 0x0000000008025bc4 TIM7_IRQHandler - 0x0000000008025bc4 SDMMC1_IRQHandler - 0x0000000008025bc4 TIM5_IRQHandler - 0x0000000008025bc4 DMA2_Stream7_IRQHandler - 0x0000000008025bc4 TIM15_IRQHandler - 0x0000000008025bc4 PVD_AVD_IRQHandler - 0x0000000008025bc4 I2C3_EV_IRQHandler - 0x0000000008025bc4 EXTI9_5_IRQHandler - 0x0000000008025bc4 RTC_WKUP_IRQHandler - 0x0000000008025bc4 LTDC_IRQHandler - 0x0000000008025bc4 SAI3_IRQHandler - 0x0000000008025bc4 ETH_WKUP_IRQHandler - 0x0000000008025bc4 SPDIF_RX_IRQHandler - 0x0000000008025bc4 SPI2_IRQHandler - 0x0000000008025bc4 OTG_HS_EP1_IN_IRQHandler - 0x0000000008025bc4 CRS_IRQHandler - 0x0000000008025bc4 EXTI4_IRQHandler - 0x0000000008025bc4 RNG_IRQHandler - 0x0000000008025bc4 HRTIM1_TIMB_IRQHandler - 0x0000000008025bc4 FDCAN2_IT1_IRQHandler - 0x0000000008025bc4 BDMA_Channel4_IRQHandler - 0x0000000008025bc4 OTG_HS_EP1_OUT_IRQHandler - 0x0000000008025bc4 WWDG_IRQHandler - 0x0000000008025bc4 SPI6_IRQHandler - 0x0000000008025bc4 MDIOS_IRQHandler - 0x0000000008025bc4 TIM2_IRQHandler - 0x0000000008025bc4 OTG_FS_WKUP_IRQHandler - 0x0000000008025bc4 OTG_HS_IRQHandler - 0x0000000008025bc4 DMA2D_IRQHandler - 0x0000000008025bc4 TIM1_BRK_IRQHandler - 0x0000000008025bc4 EXTI1_IRQHandler - 0x0000000008025bc4 SDMMC2_IRQHandler - 0x0000000008025bc4 OTG_FS_EP1_OUT_IRQHandler - 0x0000000008025bc4 BDMA_Channel3_IRQHandler - 0x0000000008025bc4 MDIOS_WKUP_IRQHandler - 0x0000000008025bc4 DFSDM1_FLT0_IRQHandler - 0x0000000008025bc4 SAI4_IRQHandler - 0x0000000008025bc4 I2C2_ER_IRQHandler - 0x0000000008025bc4 DMA2_Stream1_IRQHandler - 0x0000000008025bc4 FLASH_IRQHandler - 0x0000000008025bc4 DMA2_Stream4_IRQHandler - 0x0000000008025bc4 OTG_FS_IRQHandler - 0x0000000008025bc4 SPI3_IRQHandler - 0x0000000008025bc4 WAKEUP_PIN_IRQHandler - 0x0000000008025bc4 OTG_FS_EP1_IN_IRQHandler - 0x0000000008025bc4 I2C1_ER_IRQHandler - 0x0000000008025bc4 FMC_IRQHandler - 0x0000000008025bc4 FDCAN_CAL_IRQHandler - 0x0000000008025bc4 SWPMI1_IRQHandler - 0x0000000008025bc4 COMP1_IRQHandler - 0x0000000008025bc4 LPTIM1_IRQHandler - 0x0000000008025bc4 DMA2_Stream6_IRQHandler - 0x0000000008025bc4 SAI1_IRQHandler + 0x0000000008025bf4 0x2 ./Core/Startup/startup_stm32h743vgtx.o + 0x0000000008025bf4 RTC_Alarm_IRQHandler + 0x0000000008025bf4 EXTI2_IRQHandler + 0x0000000008025bf4 TIM8_CC_IRQHandler + 0x0000000008025bf4 HRTIM1_Master_IRQHandler + 0x0000000008025bf4 UART8_IRQHandler + 0x0000000008025bf4 SPI4_IRQHandler + 0x0000000008025bf4 TIM1_CC_IRQHandler + 0x0000000008025bf4 BDMA_Channel6_IRQHandler + 0x0000000008025bf4 DMA2_Stream5_IRQHandler + 0x0000000008025bf4 HRTIM1_FLT_IRQHandler + 0x0000000008025bf4 JPEG_IRQHandler + 0x0000000008025bf4 BDMA_Channel1_IRQHandler + 0x0000000008025bf4 HRTIM1_TIMD_IRQHandler + 0x0000000008025bf4 TAMP_STAMP_IRQHandler + 0x0000000008025bf4 EXTI3_IRQHandler + 0x0000000008025bf4 LPTIM4_IRQHandler + 0x0000000008025bf4 TIM8_TRG_COM_TIM14_IRQHandler + 0x0000000008025bf4 LPTIM2_IRQHandler + 0x0000000008025bf4 DFSDM1_FLT1_IRQHandler + 0x0000000008025bf4 DMAMUX2_OVR_IRQHandler + 0x0000000008025bf4 I2C3_ER_IRQHandler + 0x0000000008025bf4 DFSDM1_FLT2_IRQHandler + 0x0000000008025bf4 MDMA_IRQHandler + 0x0000000008025bf4 LPTIM3_IRQHandler + 0x0000000008025bf4 HSEM1_IRQHandler + 0x0000000008025bf4 EXTI0_IRQHandler + 0x0000000008025bf4 I2C2_EV_IRQHandler + 0x0000000008025bf4 FPU_IRQHandler + 0x0000000008025bf4 OTG_HS_WKUP_IRQHandler + 0x0000000008025bf4 FDCAN1_IT1_IRQHandler + 0x0000000008025bf4 LTDC_ER_IRQHandler + 0x0000000008025bf4 DMA2_Stream2_IRQHandler + 0x0000000008025bf4 HRTIM1_TIME_IRQHandler + 0x0000000008025bf4 SPI1_IRQHandler + 0x0000000008025bf4 TIM6_DAC_IRQHandler + 0x0000000008025bf4 DCMI_IRQHandler + 0x0000000008025bf4 HRTIM1_TIMC_IRQHandler + 0x0000000008025bf4 DMA2_Stream3_IRQHandler + 0x0000000008025bf4 SAI2_IRQHandler + 0x0000000008025bf4 DFSDM1_FLT3_IRQHandler + 0x0000000008025bf4 TIM17_IRQHandler + 0x0000000008025bf4 BDMA_Channel7_IRQHandler + 0x0000000008025bf4 LPTIM5_IRQHandler + 0x0000000008025bf4 ADC3_IRQHandler + 0x0000000008025bf4 DMA2_Stream0_IRQHandler + 0x0000000008025bf4 TIM4_IRQHandler + 0x0000000008025bf4 BDMA_Channel2_IRQHandler + 0x0000000008025bf4 I2C1_EV_IRQHandler + 0x0000000008025bf4 DMAMUX1_OVR_IRQHandler + 0x0000000008025bf4 TIM16_IRQHandler + 0x0000000008025bf4 BDMA_Channel5_IRQHandler + 0x0000000008025bf4 TIM3_IRQHandler + 0x0000000008025bf4 RCC_IRQHandler + 0x0000000008025bf4 TIM8_BRK_TIM12_IRQHandler + 0x0000000008025bf4 TIM1_TRG_COM_IRQHandler + 0x0000000008025bf4 Default_Handler + 0x0000000008025bf4 ECC_IRQHandler + 0x0000000008025bf4 CEC_IRQHandler + 0x0000000008025bf4 EXTI15_10_IRQHandler + 0x0000000008025bf4 ADC_IRQHandler + 0x0000000008025bf4 DMA1_Stream7_IRQHandler + 0x0000000008025bf4 HRTIM1_TIMA_IRQHandler + 0x0000000008025bf4 SPI5_IRQHandler + 0x0000000008025bf4 TIM7_IRQHandler + 0x0000000008025bf4 SDMMC1_IRQHandler + 0x0000000008025bf4 TIM5_IRQHandler + 0x0000000008025bf4 DMA2_Stream7_IRQHandler + 0x0000000008025bf4 TIM15_IRQHandler + 0x0000000008025bf4 PVD_AVD_IRQHandler + 0x0000000008025bf4 I2C3_EV_IRQHandler + 0x0000000008025bf4 EXTI9_5_IRQHandler + 0x0000000008025bf4 RTC_WKUP_IRQHandler + 0x0000000008025bf4 LTDC_IRQHandler + 0x0000000008025bf4 SAI3_IRQHandler + 0x0000000008025bf4 ETH_WKUP_IRQHandler + 0x0000000008025bf4 SPDIF_RX_IRQHandler + 0x0000000008025bf4 SPI2_IRQHandler + 0x0000000008025bf4 OTG_HS_EP1_IN_IRQHandler + 0x0000000008025bf4 CRS_IRQHandler + 0x0000000008025bf4 EXTI4_IRQHandler + 0x0000000008025bf4 RNG_IRQHandler + 0x0000000008025bf4 HRTIM1_TIMB_IRQHandler + 0x0000000008025bf4 FDCAN2_IT1_IRQHandler + 0x0000000008025bf4 BDMA_Channel4_IRQHandler + 0x0000000008025bf4 OTG_HS_EP1_OUT_IRQHandler + 0x0000000008025bf4 WWDG_IRQHandler + 0x0000000008025bf4 SPI6_IRQHandler + 0x0000000008025bf4 MDIOS_IRQHandler + 0x0000000008025bf4 TIM2_IRQHandler + 0x0000000008025bf4 OTG_FS_WKUP_IRQHandler + 0x0000000008025bf4 OTG_HS_IRQHandler + 0x0000000008025bf4 DMA2D_IRQHandler + 0x0000000008025bf4 TIM1_BRK_IRQHandler + 0x0000000008025bf4 EXTI1_IRQHandler + 0x0000000008025bf4 SDMMC2_IRQHandler + 0x0000000008025bf4 OTG_FS_EP1_OUT_IRQHandler + 0x0000000008025bf4 BDMA_Channel3_IRQHandler + 0x0000000008025bf4 MDIOS_WKUP_IRQHandler + 0x0000000008025bf4 DFSDM1_FLT0_IRQHandler + 0x0000000008025bf4 SAI4_IRQHandler + 0x0000000008025bf4 I2C2_ER_IRQHandler + 0x0000000008025bf4 DMA2_Stream1_IRQHandler + 0x0000000008025bf4 FLASH_IRQHandler + 0x0000000008025bf4 DMA2_Stream4_IRQHandler + 0x0000000008025bf4 OTG_FS_IRQHandler + 0x0000000008025bf4 SPI3_IRQHandler + 0x0000000008025bf4 WAKEUP_PIN_IRQHandler + 0x0000000008025bf4 OTG_FS_EP1_IN_IRQHandler + 0x0000000008025bf4 I2C1_ER_IRQHandler + 0x0000000008025bf4 FMC_IRQHandler + 0x0000000008025bf4 FDCAN_CAL_IRQHandler + 0x0000000008025bf4 SWPMI1_IRQHandler + 0x0000000008025bf4 COMP1_IRQHandler + 0x0000000008025bf4 LPTIM1_IRQHandler + 0x0000000008025bf4 DMA2_Stream6_IRQHandler + 0x0000000008025bf4 SAI1_IRQHandler .text.LAN8742_RegisterBusIO - 0x0000000008025bc6 0x64 ./Drivers/BSP/Components/lan8742/lan8742.o - 0x0000000008025bc6 LAN8742_RegisterBusIO + 0x0000000008025bf6 0x64 ./Drivers/BSP/Components/lan8742/lan8742.o + 0x0000000008025bf6 LAN8742_RegisterBusIO .text.LAN8742_Init - 0x0000000008025c2a 0x150 ./Drivers/BSP/Components/lan8742/lan8742.o - 0x0000000008025c2a LAN8742_Init + 0x0000000008025c5a 0x150 ./Drivers/BSP/Components/lan8742/lan8742.o + 0x0000000008025c5a LAN8742_Init .text.LAN8742_GetLinkState - 0x0000000008025d7a 0x10e ./Drivers/BSP/Components/lan8742/lan8742.o - 0x0000000008025d7a LAN8742_GetLinkState + 0x0000000008025daa 0x10e ./Drivers/BSP/Components/lan8742/lan8742.o + 0x0000000008025daa LAN8742_GetLinkState .text.HAL_Init - 0x0000000008025e88 0x78 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025e88 HAL_Init + 0x0000000008025eb8 0x78 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008025eb8 HAL_Init .text.HAL_InitTick - 0x0000000008025f00 0x6c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025f00 HAL_InitTick + 0x0000000008025f30 0x6c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008025f30 HAL_InitTick .text.HAL_IncTick - 0x0000000008025f6c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025f6c HAL_IncTick + 0x0000000008025f9c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008025f9c HAL_IncTick .text.HAL_GetTick - 0x0000000008025f94 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025f94 HAL_GetTick + 0x0000000008025fc4 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008025fc4 HAL_GetTick .text.HAL_Delay - 0x0000000008025fac 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025fac HAL_Delay + 0x0000000008025fdc 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008025fdc HAL_Delay .text.HAL_GetREVID - 0x0000000008025ff4 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025ff4 HAL_GetREVID + 0x0000000008026024 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008026024 HAL_GetREVID .text.HAL_SYSCFG_ETHInterfaceSelect - 0x000000000802600c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x000000000802600c HAL_SYSCFG_ETHInterfaceSelect + 0x000000000802603c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x000000000802603c HAL_SYSCFG_ETHInterfaceSelect .text.LL_ADC_SetCommonClock - 0x0000000008026034 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026064 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetCommonPathInternalCh - 0x000000000802605a 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802608a 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_GetCommonPathInternalCh - 0x0000000008026080 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080260b0 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetOffset - 0x000000000802609c 0x40 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080260cc 0x40 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetDataRightShift - 0x00000000080260dc 0x32 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802610c 0x32 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetOffsetSignedSaturation - 0x000000000802610e 0x36 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802613e 0x36 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_REG_IsTriggerSourceSWStart - 0x0000000008026144 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026174 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_REG_SetSequencerRanks - 0x000000000802616a 0x58 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802619a 0x58 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetChannelSamplingTime - 0x00000000080261c2 0x56 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080261f2 0x56 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetChannelSingleDiff - 0x0000000008026218 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026248 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_GetMultimode - 0x0000000008026260 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026290 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_GetMultiDMATransfer - 0x000000000802627c 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080262ac 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_DisableDeepPowerDown - 0x0000000008026298 0x24 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080262c8 0x24 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_IsDeepPowerDownEnabled - 0x00000000080262bc 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080262ec 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_EnableInternalRegulator - 0x00000000080262e4 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026314 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_IsInternalRegulatorEnabled - 0x000000000802630c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802633c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_Enable - 0x0000000008026334 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026364 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_Disable - 0x000000000802635c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802638c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_IsEnabled - 0x0000000008026384 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080263b4 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_IsDisableOngoing - 0x00000000080263aa 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080263da 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_REG_StartConversion - 0x00000000080263d0 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026400 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_REG_StopConversion - 0x00000000080263f8 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026428 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_REG_IsConversionOngoing - 0x0000000008026420 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - *fill* 0x0000000008026446 0x2 + 0x0000000008026450 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + *fill* 0x0000000008026476 0x2 .text.LL_ADC_INJ_StopConversion - 0x0000000008026448 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026478 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_INJ_IsConversionOngoing - 0x0000000008026470 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - *fill* 0x0000000008026496 0x2 + 0x00000000080264a0 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + *fill* 0x00000000080264c6 0x2 .text.HAL_ADC_Init - 0x0000000008026498 0x344 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - 0x0000000008026498 HAL_ADC_Init + 0x00000000080264c8 0x344 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080264c8 HAL_ADC_Init .text.HAL_ADC_Start - 0x00000000080267dc 0x194 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - 0x00000000080267dc HAL_ADC_Start + 0x000000000802680c 0x194 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802680c HAL_ADC_Start .text.HAL_ADC_Stop - 0x0000000008026970 0x68 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - 0x0000000008026970 HAL_ADC_Stop + 0x00000000080269a0 0x68 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080269a0 HAL_ADC_Stop .text.HAL_ADC_PollForConversion - 0x00000000080269d8 0x1e8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - 0x00000000080269d8 HAL_ADC_PollForConversion + 0x0000000008026a08 0x1e8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026a08 HAL_ADC_PollForConversion .text.HAL_ADC_GetValue - 0x0000000008026bc0 0x1a ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - 0x0000000008026bc0 HAL_ADC_GetValue - *fill* 0x0000000008026bda 0x2 + 0x0000000008026bf0 0x1a ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o 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.text.HAL_NVIC_SetPriority - 0x0000000008027992 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - 0x0000000008027992 HAL_NVIC_SetPriority + 0x00000000080279c2 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x00000000080279c2 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x00000000080279c6 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - 0x00000000080279c6 HAL_NVIC_EnableIRQ + 0x00000000080279f6 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x00000000080279f6 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x00000000080279e2 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - 0x00000000080279e2 HAL_SYSTICK_Config - *fill* 0x00000000080279fa 0x2 + 0x0000000008027a12 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x0000000008027a12 HAL_SYSTICK_Config + *fill* 0x0000000008027a2a 0x2 .text.HAL_MPU_Disable - 0x00000000080279fc 0x30 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - 0x00000000080279fc HAL_MPU_Disable + 0x0000000008027a2c 0x30 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x0000000008027a2c HAL_MPU_Disable .text.HAL_MPU_Enable - 0x0000000008027a2c 0x40 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - 0x0000000008027a2c HAL_MPU_Enable + 0x0000000008027a5c 0x40 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x0000000008027a5c HAL_MPU_Enable .text.HAL_MPU_ConfigRegion - 0x0000000008027a6c 0x88 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - 0x0000000008027a6c HAL_MPU_ConfigRegion + 0x0000000008027a9c 0x88 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x0000000008027a9c HAL_MPU_ConfigRegion .text.HAL_DMA_Init - 0x0000000008027af4 0x6b8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o - 0x0000000008027af4 HAL_DMA_Init + 0x0000000008027b24 0x6b8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x0000000008027b24 HAL_DMA_Init .text.HAL_DMA_Start_IT - 0x00000000080281ac 0x4d4 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.text.HAL_DMA_GetState - 0x0000000008029f9c 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o - 0x0000000008029f9c HAL_DMA_GetState + 0x0000000008029fcc 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x0000000008029fcc HAL_DMA_GetState .text.DMA_SetConfig - 0x0000000008029fb8 0x358 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x0000000008029fe8 0x358 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.DMA_CalcBaseAndBitshift - 0x000000000802a310 0x164 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x000000000802a340 0x164 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.DMA_CheckFifoParam - 0x000000000802a474 0xf8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x000000000802a4a4 0xf8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.DMA_CalcDMAMUXChannelBaseAndMask - 0x000000000802a56c 0x134 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x000000000802a59c 0x134 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.DMA_CalcDMAMUXRequestGenBaseAndMask - 0x000000000802a6a0 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x000000000802a6d0 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.HAL_ETH_Init - 0x000000000802a788 0x1cc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802a788 HAL_ETH_Init + 0x000000000802a7b8 0x1cc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802a7b8 HAL_ETH_Init .text.HAL_ETH_Start - 0x000000000802a954 0xc4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802a954 HAL_ETH_Start + 0x000000000802a984 0xc4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802a984 HAL_ETH_Start .text.HAL_ETH_Stop - 0x000000000802aa18 0xa0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802aa18 HAL_ETH_Stop + 0x000000000802aa48 0xa0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802aa48 HAL_ETH_Stop .text.HAL_ETH_Transmit - 0x000000000802aab8 0x12e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802aab8 HAL_ETH_Transmit + 0x000000000802aae8 0x12e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802aae8 HAL_ETH_Transmit .text.HAL_ETH_ReadData - 0x000000000802abe6 0x180 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802abe6 HAL_ETH_ReadData + 0x000000000802ac16 0x180 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802ac16 HAL_ETH_ReadData .text.ETH_UpdateDescriptor - 0x000000000802ad66 0xdc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - *fill* 0x000000000802ae42 0x2 + 0x000000000802ad96 0xdc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + *fill* 0x000000000802ae72 0x2 .text.HAL_ETH_IRQHandler - 0x000000000802ae44 0x220 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802ae44 HAL_ETH_IRQHandler + 0x000000000802ae74 0x220 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802ae74 HAL_ETH_IRQHandler .text.HAL_ETH_TxCpltCallback - 0x000000000802b064 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b064 HAL_ETH_TxCpltCallback + 0x000000000802b094 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b094 HAL_ETH_TxCpltCallback .text.HAL_ETH_RxCpltCallback - 0x000000000802b078 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b078 HAL_ETH_RxCpltCallback + 0x000000000802b0a8 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b0a8 HAL_ETH_RxCpltCallback .text.HAL_ETH_ErrorCallback - 0x000000000802b08c 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b08c HAL_ETH_ErrorCallback + 0x000000000802b0bc 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b0bc HAL_ETH_ErrorCallback .text.HAL_ETH_PMTCallback - 0x000000000802b0a0 0x14 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./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b10c HAL_ETH_ReadPHYRegister .text.HAL_ETH_WritePHYRegister - 0x000000000802b184 0xa8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b184 HAL_ETH_WritePHYRegister + 0x000000000802b1b4 0xa8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b1b4 HAL_ETH_WritePHYRegister .text.HAL_ETH_GetMACConfig - 0x000000000802b22c 0x3a8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b22c HAL_ETH_GetMACConfig + 0x000000000802b25c 0x3a8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b25c HAL_ETH_GetMACConfig .text.HAL_ETH_SetMACConfig - 0x000000000802b5d4 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b5d4 HAL_ETH_SetMACConfig + 0x000000000802b604 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b604 HAL_ETH_SetMACConfig .text.HAL_ETH_SetMDIOClockRange - 0x000000000802b608 0xb0 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.text.ETH_DMARxDescListInit - 0x000000000802bbc8 0xba ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - *fill* 0x000000000802bc82 0x2 + 0x000000000802bbf8 0xba ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + *fill* 0x000000000802bcb2 0x2 .text.ETH_Prepare_Tx_Descriptors - 0x000000000802bc84 0x51c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802bcb4 0x51c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o .text.HAL_FDCAN_Init - 0x000000000802c1a0 0x3bc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c1a0 HAL_FDCAN_Init + 0x000000000802c1d0 0x3bc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c1d0 HAL_FDCAN_Init .text.HAL_FDCAN_Start - 0x000000000802c55c 0x56 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c55c HAL_FDCAN_Start + 0x000000000802c58c 0x56 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c58c HAL_FDCAN_Start .text.HAL_FDCAN_AddMessageToTxFifoQ - 0x000000000802c5b2 0xb6 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c5b2 HAL_FDCAN_AddMessageToTxFifoQ + 0x000000000802c5e2 0xb6 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c5e2 HAL_FDCAN_AddMessageToTxFifoQ .text.HAL_FDCAN_GetRxMessage - 0x000000000802c668 0x2dc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c668 HAL_FDCAN_GetRxMessage + 0x000000000802c698 0x2dc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c698 HAL_FDCAN_GetRxMessage .text.HAL_FDCAN_ActivateNotification - 0x000000000802c944 0xf4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c944 HAL_FDCAN_ActivateNotification + 0x000000000802c974 0xf4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c974 HAL_FDCAN_ActivateNotification .text.HAL_FDCAN_IRQHandler - 0x000000000802ca38 0x4bc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802ca38 HAL_FDCAN_IRQHandler + 0x000000000802ca68 0x4bc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802ca68 HAL_FDCAN_IRQHandler .text.HAL_FDCAN_ClockCalibrationCallback - 0x000000000802cef4 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cef4 HAL_FDCAN_ClockCalibrationCallback + 0x000000000802cf24 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cf24 HAL_FDCAN_ClockCalibrationCallback .text.HAL_FDCAN_TxEventFifoCallback - 0x000000000802cf0a 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf0a HAL_FDCAN_TxEventFifoCallback + 0x000000000802cf3a 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cf3a HAL_FDCAN_TxEventFifoCallback .text.HAL_FDCAN_RxFifo1Callback - 0x000000000802cf20 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf20 HAL_FDCAN_RxFifo1Callback + 0x000000000802cf50 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cf50 HAL_FDCAN_RxFifo1Callback .text.HAL_FDCAN_TxFifoEmptyCallback - 0x000000000802cf36 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf36 HAL_FDCAN_TxFifoEmptyCallback + 0x000000000802cf66 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cf66 HAL_FDCAN_TxFifoEmptyCallback .text.HAL_FDCAN_TxBufferCompleteCallback - 0x000000000802cf4a 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf4a HAL_FDCAN_TxBufferCompleteCallback + 0x000000000802cf7a 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cf7a HAL_FDCAN_TxBufferCompleteCallback .text.HAL_FDCAN_TxBufferAbortCallback - 0x000000000802cf60 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf60 HAL_FDCAN_TxBufferAbortCallback + 0x000000000802cf90 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cf90 HAL_FDCAN_TxBufferAbortCallback .text.HAL_FDCAN_RxBufferNewMessageCallback - 0x000000000802cf76 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf76 HAL_FDCAN_RxBufferNewMessageCallback + 0x000000000802cfa6 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cfa6 HAL_FDCAN_RxBufferNewMessageCallback .text.HAL_FDCAN_TimestampWraparoundCallback - 0x000000000802cf8a 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf8a HAL_FDCAN_TimestampWraparoundCallback + 0x000000000802cfba 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cfba HAL_FDCAN_TimestampWraparoundCallback .text.HAL_FDCAN_TimeoutOccurredCallback - 0x000000000802cf9e 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf9e HAL_FDCAN_TimeoutOccurredCallback + 0x000000000802cfce 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cfce HAL_FDCAN_TimeoutOccurredCallback .text.HAL_FDCAN_HighPriorityMessageCallback - 0x000000000802cfb2 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cfb2 HAL_FDCAN_HighPriorityMessageCallback + 0x000000000802cfe2 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cfe2 HAL_FDCAN_HighPriorityMessageCallback .text.HAL_FDCAN_ErrorCallback - 0x000000000802cfc6 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cfc6 HAL_FDCAN_ErrorCallback + 0x000000000802cff6 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cff6 HAL_FDCAN_ErrorCallback .text.HAL_FDCAN_TT_ScheduleSyncCallback - 0x000000000802cfda 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cfda HAL_FDCAN_TT_ScheduleSyncCallback + 0x000000000802d00a 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d00a HAL_FDCAN_TT_ScheduleSyncCallback .text.HAL_FDCAN_TT_TimeMarkCallback - 0x000000000802cff0 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cff0 HAL_FDCAN_TT_TimeMarkCallback + 0x000000000802d020 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d020 HAL_FDCAN_TT_TimeMarkCallback .text.HAL_FDCAN_TT_StopWatchCallback - 0x000000000802d006 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802d006 HAL_FDCAN_TT_StopWatchCallback + 0x000000000802d036 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d036 HAL_FDCAN_TT_StopWatchCallback .text.HAL_FDCAN_TT_GlobalTimeCallback - 0x000000000802d01e 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802d01e HAL_FDCAN_TT_GlobalTimeCallback + 0x000000000802d04e 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d04e HAL_FDCAN_TT_GlobalTimeCallback .text.FDCAN_CalcultateRamBlockAddresses - 0x000000000802d034 0x30c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d064 0x30c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o .text.FDCAN_CopyMessageToRAM - 0x000000000802d340 0xfc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d370 0xfc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o .text.HAL_GPIO_Init - 0x000000000802d43c 0x360 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - 0x000000000802d43c HAL_GPIO_Init + 0x000000000802d46c 0x360 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + 0x000000000802d46c HAL_GPIO_Init .text.HAL_GPIO_WritePin - 0x000000000802d79c 0x32 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - 0x000000000802d79c HAL_GPIO_WritePin + 0x000000000802d7cc 0x32 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + 0x000000000802d7cc HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x000000000802d7ce 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - 0x000000000802d7ce HAL_GPIO_TogglePin - *fill* 0x000000000802d802 0x2 + 0x000000000802d7fe 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + 0x000000000802d7fe HAL_GPIO_TogglePin + *fill* 0x000000000802d832 0x2 .text.HAL_I2C_Init - 0x000000000802d804 0x120 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802d804 HAL_I2C_Init + 0x000000000802d834 0x120 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802d834 HAL_I2C_Init .text.HAL_I2C_EV_IRQHandler - 0x000000000802d924 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802d924 HAL_I2C_EV_IRQHandler + 0x000000000802d954 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802d954 HAL_I2C_EV_IRQHandler .text.HAL_I2C_ER_IRQHandler - 0x000000000802d958 0xc2 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802d958 HAL_I2C_ER_IRQHandler + 0x000000000802d988 0xc2 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802d988 HAL_I2C_ER_IRQHandler .text.HAL_I2C_SlaveTxCpltCallback - 0x000000000802da1a 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da1a HAL_I2C_SlaveTxCpltCallback + 0x000000000802da4a 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802da4a HAL_I2C_SlaveTxCpltCallback .text.HAL_I2C_SlaveRxCpltCallback - 0x000000000802da2e 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da2e HAL_I2C_SlaveRxCpltCallback + 0x000000000802da5e 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802da5e HAL_I2C_SlaveRxCpltCallback .text.HAL_I2C_AddrCallback - 0x000000000802da42 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da42 HAL_I2C_AddrCallback + 0x000000000802da72 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802da72 HAL_I2C_AddrCallback .text.HAL_I2C_ListenCpltCallback - 0x000000000802da5e 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da5e HAL_I2C_ListenCpltCallback + 0x000000000802da8e 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802da8e HAL_I2C_ListenCpltCallback .text.HAL_I2C_ErrorCallback - 0x000000000802da72 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da72 HAL_I2C_ErrorCallback + 0x000000000802daa2 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802daa2 HAL_I2C_ErrorCallback .text.HAL_I2C_AbortCpltCallback - 0x000000000802da86 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da86 HAL_I2C_AbortCpltCallback + 0x000000000802dab6 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802dab6 HAL_I2C_AbortCpltCallback .text.I2C_Slave_ISR_IT - 0x000000000802da9a 0x206 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802daca 0x206 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITAddrCplt - 0x000000000802dca0 0x108 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802dcd0 0x108 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITSlaveSeqCplt - 0x000000000802dda8 0xbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802ddd8 0xbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITSlaveCplt - 0x000000000802de64 0x3f0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802de94 0x3f0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITListenCplt - 0x000000000802e254 0xac ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e284 0xac ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITError - 0x000000000802e300 0x1a0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e330 0x1a0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_TreatErrorCallback - 0x000000000802e4a0 0x4e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e4d0 0x4e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_Flush_TXDR - 0x000000000802e4ee 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e51e 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_DMAAbort - 0x000000000802e536 0x3c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e566 0x3c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_Disable_IRQ - 0x000000000802e572 0xbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e5a2 0xbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.HAL_I2CEx_ConfigAnalogFilter - 0x000000000802e62e 0x96 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - 0x000000000802e62e HAL_I2CEx_ConfigAnalogFilter + 0x000000000802e65e 0x96 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + 0x000000000802e65e HAL_I2CEx_ConfigAnalogFilter .text.HAL_I2CEx_ConfigDigitalFilter - 0x000000000802e6c4 0x98 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - 0x000000000802e6c4 HAL_I2CEx_ConfigDigitalFilter + 0x000000000802e6f4 0x98 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + 0x000000000802e6f4 HAL_I2CEx_ConfigDigitalFilter .text.HAL_MDMA_Abort_IT - 0x000000000802e75c 0x4e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o - 0x000000000802e75c HAL_MDMA_Abort_IT - *fill* 0x000000000802e7aa 0x2 + 0x000000000802e78c 0x4e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o + 0x000000000802e78c HAL_MDMA_Abort_IT + *fill* 0x000000000802e7da 0x2 .text.HAL_PWREx_ConfigSupply - 0x000000000802e7ac 0x74 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o - 0x000000000802e7ac HAL_PWREx_ConfigSupply + 0x000000000802e7dc 0x74 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o + 0x000000000802e7dc HAL_PWREx_ConfigSupply .text.HAL_QSPI_Init - 0x000000000802e820 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802e820 HAL_QSPI_Init + 0x000000000802e850 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802e850 HAL_QSPI_Init .text.HAL_QSPI_IRQHandler - 0x000000000802e908 0x374 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802e908 HAL_QSPI_IRQHandler + 0x000000000802e938 0x374 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802e938 HAL_QSPI_IRQHandler .text.HAL_QSPI_ErrorCallback - 0x000000000802ec7c 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802ec7c HAL_QSPI_ErrorCallback + 0x000000000802ecac 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802ecac HAL_QSPI_ErrorCallback .text.HAL_QSPI_AbortCpltCallback - 0x000000000802ec90 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802ec90 HAL_QSPI_AbortCpltCallback + 0x000000000802ecc0 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802ecc0 HAL_QSPI_AbortCpltCallback .text.HAL_QSPI_CmdCpltCallback - 0x000000000802eca4 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802eca4 HAL_QSPI_CmdCpltCallback + 0x000000000802ecd4 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802ecd4 HAL_QSPI_CmdCpltCallback .text.HAL_QSPI_RxCpltCallback - 0x000000000802ecb8 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802ecb8 HAL_QSPI_RxCpltCallback + 0x000000000802ece8 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802ece8 HAL_QSPI_RxCpltCallback .text.HAL_QSPI_TxCpltCallback - 0x000000000802eccc 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802eccc HAL_QSPI_TxCpltCallback + 0x000000000802ecfc 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802ecfc HAL_QSPI_TxCpltCallback .text.HAL_QSPI_FifoThresholdCallback - 0x000000000802ece0 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802ece0 HAL_QSPI_FifoThresholdCallback + 0x000000000802ed10 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802ed10 HAL_QSPI_FifoThresholdCallback .text.HAL_QSPI_StatusMatchCallback - 0x000000000802ecf4 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802ecf4 HAL_QSPI_StatusMatchCallback + 0x000000000802ed24 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802ed24 HAL_QSPI_StatusMatchCallback .text.HAL_QSPI_TimeOutCallback - 0x000000000802ed08 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802ed08 HAL_QSPI_TimeOutCallback + 0x000000000802ed38 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802ed38 HAL_QSPI_TimeOutCallback .text.HAL_QSPI_SetTimeout - 0x000000000802ed1c 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802ed1c HAL_QSPI_SetTimeout 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0x000000000803781c pbuf_clen - *fill* 0x000000000803784a 0x2 + 0x000000000803784c 0x2e ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x000000000803784c pbuf_clen + *fill* 0x000000000803787a 0x2 .text.pbuf_ref - 0x000000000803784c 0x44 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x000000000803784c pbuf_ref + 0x000000000803787c 0x44 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x000000000803787c pbuf_ref .text.pbuf_cat - 0x0000000008037890 0xac ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x0000000008037890 pbuf_cat + 0x00000000080378c0 0xac ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x00000000080378c0 pbuf_cat .text.pbuf_copy - 0x000000000803793c 0x1a4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x000000000803793c pbuf_copy + 0x000000000803796c 0x1a4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x000000000803796c pbuf_copy .text.pbuf_copy_partial - 0x0000000008037ae0 0xe4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x0000000008037ae0 pbuf_copy_partial + 0x0000000008037b10 0xe4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x0000000008037b10 pbuf_copy_partial .text.pbuf_clone - 0x0000000008037bc4 0x64 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x0000000008037bc4 pbuf_clone + 0x0000000008037bf4 0x64 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x0000000008037bf4 pbuf_clone .text.tcp_init - 0x0000000008037c28 0x24 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008037c28 tcp_init + 0x0000000008037c58 0x24 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037c58 tcp_init .text.tcp_free - 0x0000000008037c4c 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008037c4c tcp_free + 0x0000000008037c7c 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037c7c tcp_free .text.tcp_free_listen - 0x0000000008037c84 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - .text.tcp_tmr 0x0000000008037cbc 0x2c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008037cbc tcp_tmr + 0x0000000008037cb4 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + .text.tcp_tmr 0x0000000008037cec 0x2c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037cec tcp_tmr .text.tcp_remove_listener - 0x0000000008037ce8 0x54 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037d18 0x54 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_listen_closed - 0x0000000008037d3c 0x74 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037d6c 0x74 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_close_shutdown - 0x0000000008037db0 0x1c4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037de0 0x1c4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_close_shutdown_fin - 0x0000000008037f74 0xd4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037fa4 0xd4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_close - 0x0000000008038048 0x58 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038048 tcp_close + 0x0000000008038078 0x58 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038078 tcp_close .text.tcp_abandon - 0x00000000080380a0 0x17c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080380a0 tcp_abandon + 0x00000000080380d0 0x17c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080380d0 tcp_abandon .text.tcp_abort - 0x000000000803821c 0x18 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803821c tcp_abort + 0x000000000803824c 0x18 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803824c tcp_abort .text.tcp_bind - 0x0000000008038234 0x130 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038234 tcp_bind + 0x0000000008038264 0x130 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038264 tcp_bind .text.tcp_accept_null - 0x0000000008038364 0x40 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038394 0x40 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_listen_with_backlog - 0x00000000080383a4 0x22 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080383a4 tcp_listen_with_backlog - *fill* 0x00000000080383c6 0x2 + 0x00000000080383d4 0x22 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080383d4 tcp_listen_with_backlog + *fill* 0x00000000080383f6 0x2 .text.tcp_listen_with_backlog_and_err - 0x00000000080383c8 0x154 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080383c8 tcp_listen_with_backlog_and_err + 0x00000000080383f8 0x154 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080383f8 tcp_listen_with_backlog_and_err .text.tcp_update_rcv_ann_wnd - 0x000000000803851c 0xb4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803851c tcp_update_rcv_ann_wnd + 0x000000000803854c 0xb4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803854c tcp_update_rcv_ann_wnd .text.tcp_recved - 0x00000000080385d0 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080385d0 tcp_recved + 0x0000000008038600 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038600 tcp_recved .text.tcp_new_port - 0x0000000008038670 0x8c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080386a0 0x8c ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_slowtmr - 0x00000000080386fc 0x680 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080386fc tcp_slowtmr + 0x000000000803872c 0x680 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803872c tcp_slowtmr .text.tcp_fasttmr - 0x0000000008038d7c 0xc8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038d7c tcp_fasttmr + 0x0000000008038dac 0xc8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038dac tcp_fasttmr .text.tcp_process_refused_data - 0x0000000008038e44 0xf8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038e44 tcp_process_refused_data + 0x0000000008038e74 0xf8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038e74 tcp_process_refused_data .text.tcp_segs_free - 0x0000000008038f3c 0x2a ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038f3c tcp_segs_free + 0x0000000008038f6c 0x2a ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038f6c tcp_segs_free .text.tcp_seg_free - 0x0000000008038f66 0x30 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038f66 tcp_seg_free - *fill* 0x0000000008038f96 0x2 + 0x0000000008038f96 0x30 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038f96 tcp_seg_free + *fill* 0x0000000008038fc6 0x2 .text.tcp_setprio - 0x0000000008038f98 0x3c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038f98 tcp_setprio + 0x0000000008038fc8 0x3c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038fc8 tcp_setprio .text.tcp_seg_copy - 0x0000000008038fd4 0x58 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038fd4 tcp_seg_copy + 0x0000000008039004 0x58 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039004 tcp_seg_copy .text.tcp_recv_null - 0x000000000803902c 0x6c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803902c tcp_recv_null + 0x000000000803905c 0x6c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803905c tcp_recv_null .text.tcp_kill_prio - 0x0000000008039098 0x9c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080390c8 0x9c ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_kill_state - 0x0000000008039134 0x94 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039164 0x94 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_kill_timewait - 0x00000000080391c8 0x60 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080391f8 0x60 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_handle_closepend - 0x0000000008039228 0x4c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039258 0x4c ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_alloc - 0x0000000008039274 0x108 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039274 tcp_alloc + 0x00000000080392a4 0x108 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080392a4 tcp_alloc .text.tcp_new_ip_type - 0x000000000803937c 0x1c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803937c tcp_new_ip_type + 0x00000000080393ac 0x1c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080393ac tcp_new_ip_type .text.tcp_recv - 0x0000000008039398 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039398 tcp_recv + 0x00000000080393c8 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080393c8 tcp_recv .text.tcp_sent - 0x00000000080393dc 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080393dc tcp_sent - .text.tcp_err 0x0000000008039420 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039420 tcp_err + 0x000000000803940c 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803940c tcp_sent + .text.tcp_err 0x0000000008039450 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039450 tcp_err .text.tcp_accept - 0x0000000008039464 0x2e ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039464 tcp_accept - *fill* 0x0000000008039492 0x2 + 0x0000000008039494 0x2e ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039494 tcp_accept + *fill* 0x00000000080394c2 0x2 .text.tcp_pcb_purge - 0x0000000008039494 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039494 tcp_pcb_purge + 0x00000000080394c4 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080394c4 tcp_pcb_purge .text.tcp_pcb_remove - 0x0000000008039534 0x128 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039534 tcp_pcb_remove + 0x0000000008039564 0x128 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039564 tcp_pcb_remove .text.tcp_next_iss - 0x000000000803965c 0x4c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803965c tcp_next_iss + 0x000000000803968c 0x4c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803968c tcp_next_iss .text.tcp_eff_send_mss_netif - 0x00000000080396a8 0x74 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080396a8 tcp_eff_send_mss_netif + 0x00000000080396d8 0x74 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080396d8 tcp_eff_send_mss_netif .text.tcp_netif_ip_addr_changed_pcblist - 0x000000000803971c 0x64 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803974c 0x64 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_netif_ip_addr_changed - 0x0000000008039780 0x7c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039780 tcp_netif_ip_addr_changed + 0x00000000080397b0 0x7c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080397b0 tcp_netif_ip_addr_changed .text.tcp_free_ooseq - 0x00000000080397fc 0x28 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080397fc tcp_free_ooseq + 0x000000000803982c 0x28 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803982c tcp_free_ooseq .text.tcp_input - 0x0000000008039824 0x818 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - 0x0000000008039824 tcp_input + 0x0000000008039854 0x818 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x0000000008039854 tcp_input .text.tcp_input_delayed_close - 0x000000000803a03c 0x80 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803a06c 0x80 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_listen_input - 0x000000000803a0bc 0x1fc ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803a0ec 0x1fc ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_timewait_input - 0x000000000803a2b8 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803a2e8 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_process - 0x000000000803a3ac 0x7e0 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803a3dc 0x7e0 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_oos_insert_segment - 0x000000000803ab8c 0x110 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803abbc 0x110 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_free_acked_segments - 0x000000000803ac9c 0xf8 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803accc 0xf8 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_receive - 0x000000000803ad94 0xf30 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803adc4 0xf30 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_get_next_optbyte - 0x000000000803bcc4 0x6c ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803bcf4 0x6c ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_parseopt - 0x000000000803bd30 0xec ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803bd60 0xec ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_trigger_input_pcb_close - 0x000000000803be1c 0x20 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - 0x000000000803be1c tcp_trigger_input_pcb_close + 0x000000000803be4c 0x20 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803be4c tcp_trigger_input_pcb_close .text.tcp_route - 0x000000000803be3c 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803be6c 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_create_segment - 0x000000000803be74 0x13c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803bea4 0x13c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_pbuf_prealloc - 0x000000000803bfb0 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803bfe0 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_write_checks - 0x000000000803c0a4 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803c0d4 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_write - 0x000000000803c198 0x6c8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803c198 tcp_write + 0x000000000803c1c8 0x6c8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803c1c8 tcp_write .text.tcp_split_unsent_seg - 0x000000000803c860 0x290 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803c860 tcp_split_unsent_seg + 0x000000000803c890 0x290 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803c890 tcp_split_unsent_seg .text.tcp_send_fin - 0x000000000803caf0 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803caf0 tcp_send_fin + 0x000000000803cb20 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803cb20 tcp_send_fin .text.tcp_enqueue_flags - 0x000000000803cb90 0x1dc ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803cb90 tcp_enqueue_flags + 0x000000000803cbc0 0x1dc ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803cbc0 tcp_enqueue_flags .text.tcp_output - 0x000000000803cd6c 0x3e8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803cd6c tcp_output + 0x000000000803cd9c 0x3e8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803cd9c tcp_output .text.tcp_output_segment_busy - 0x000000000803d154 0x40 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d184 0x40 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_output_segment - 0x000000000803d194 0x1bc ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d1c4 0x1bc ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_rexmit_rto_prepare - 0x000000000803d350 0xe0 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d350 tcp_rexmit_rto_prepare + 0x000000000803d380 0xe0 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d380 tcp_rexmit_rto_prepare .text.tcp_rexmit_rto_commit - 0x000000000803d430 0x50 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d430 tcp_rexmit_rto_commit + 0x000000000803d460 0x50 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d460 tcp_rexmit_rto_commit .text.tcp_rexmit_rto - 0x000000000803d480 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d480 tcp_rexmit_rto + 0x000000000803d4b0 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d4b0 tcp_rexmit_rto .text.tcp_rexmit - 0x000000000803d4c4 0xd8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d4c4 tcp_rexmit + 0x000000000803d4f4 0xd8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d4f4 tcp_rexmit .text.tcp_rexmit_fast - 0x000000000803d59c 0xc4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d59c tcp_rexmit_fast + 0x000000000803d5cc 0xc4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d5cc tcp_rexmit_fast .text.tcp_output_alloc_header_common - 0x000000000803d660 0xe4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d690 0xe4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_output_alloc_header - 0x000000000803d744 0x7c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d774 0x7c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_output_fill_options - 0x000000000803d7c0 0x80 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d7f0 0x80 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_output_control_segment - 0x000000000803d840 0x94 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - .text.tcp_rst 0x000000000803d8d4 0xa4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d8d4 tcp_rst + 0x000000000803d870 0x94 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + .text.tcp_rst 0x000000000803d904 0xa4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d904 tcp_rst .text.tcp_send_empty_ack - 0x000000000803d978 0xc4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d978 tcp_send_empty_ack + 0x000000000803d9a8 0xc4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d9a8 tcp_send_empty_ack .text.tcp_keepalive - 0x000000000803da3c 0x80 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d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-assert.o) 0x3d (size before relaxing) - *fill* 0x0000000008044e96 0x2 + *fill* 0x0000000008044ec6 0x2 .rodata.__sf_fake_stderr - 0x0000000008044e98 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) - 0x0000000008044e98 __sf_fake_stderr + 0x0000000008044ec8 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) + 0x0000000008044ec8 __sf_fake_stderr .rodata.__sf_fake_stdin - 0x0000000008044eb8 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) - 0x0000000008044eb8 __sf_fake_stdin + 0x0000000008044ee8 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) + 0x0000000008044ee8 __sf_fake_stdin .rodata.__sf_fake_stdout - 0x0000000008044ed8 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) - 0x0000000008044ed8 __sf_fake_stdout + 0x0000000008044f08 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) + 0x0000000008044f08 __sf_fake_stdout .rodata._svfprintf_r.str1.1 - 0x0000000008044ef8 0x11 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-svfprintf.o) + 0x0000000008044f28 0x11 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-svfprintf.o) .rodata._vfprintf_r.str1.1 - 0x0000000008044f09 0x11 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-vfprintf.o) + 0x0000000008044f39 0x11 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-vfprintf.o) .rodata._printf_i.str1.1 - 0x0000000008044f09 0x22 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o) - *fill* 0x0000000008044f2b 0x5 + 0x0000000008044f39 0x22 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o) + *fill* 0x0000000008044f5b 0x5 .rodata.__log_data - 0x0000000008044f30 0x890 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libm.a(lib_a-log_data.o) - 0x0000000008044f30 __log_data - 0x00000000080457c0 . = ALIGN (0x4) + 0x0000000008044f60 0x890 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libm.a(lib_a-log_data.o) + 0x0000000008044f60 __log_data + 0x00000000080457f0 . = ALIGN (0x4) .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) -.ARM 0x00000000080457c0 0x8 - 0x00000000080457c0 __exidx_start = . +.ARM 0x00000000080457f0 0x8 + 0x00000000080457f0 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x00000000080457c0 0x8 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard\libgcc.a(_udivmoddi4.o) - 0x00000000080457c8 __exidx_end = . + .ARM.exidx 0x00000000080457f0 0x8 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard\libgcc.a(_udivmoddi4.o) + 0x00000000080457f8 __exidx_end = . -.rel.dyn 0x00000000080457c8 0x0 - .rel.iplt 0x00000000080457c8 0x0 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o +.rel.dyn 0x00000000080457f8 0x0 + .rel.iplt 0x00000000080457f8 0x0 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o -.preinit_array 0x00000000080457c8 0x0 - 0x00000000080457c8 PROVIDE (__preinit_array_start = .) +.preinit_array 0x00000000080457f8 0x0 + 0x00000000080457f8 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x00000000080457c8 PROVIDE (__preinit_array_end = .) + 0x00000000080457f8 PROVIDE (__preinit_array_end = .) -.init_array 0x00000000080457c8 0x4 - 0x00000000080457c8 PROVIDE (__init_array_start = .) +.init_array 0x00000000080457f8 0x4 + 0x00000000080457f8 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x00000000080457c8 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x00000000080457cc PROVIDE (__init_array_end = .) + .init_array 0x00000000080457f8 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x00000000080457fc PROVIDE (__init_array_end = .) -.fini_array 0x00000000080457cc 0x4 +.fini_array 0x00000000080457fc 0x4 [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x00000000080457cc 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o + .fini_array 0x00000000080457fc 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x00000000080457d0 _sidata = LOADADDR (.data) + 0x0000000008045800 _sidata = LOADADDR (.data) -.data 0x0000000024000000 0xdc load address 0x00000000080457d0 +.data 0x0000000024000000 0xdc load address 0x0000000008045800 0x0000000024000000 . = ALIGN (0x4) 0x0000000024000000 _sdata = . *(.data) @@ -39405,11 +39405,11 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext 0x00000000240000dc . = ALIGN (0x4) 0x00000000240000dc _edata = . -.igot.plt 0x00000000240000dc 0x0 load address 0x00000000080458ac +.igot.plt 0x00000000240000dc 0x0 load address 0x00000000080458dc .igot.plt 0x00000000240000dc 0x0 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o 0x00000000240000dc . = ALIGN (0x4) -.bss 0x00000000240000dc 0xe9e8 load address 0x00000000080458ac +.bss 0x00000000240000dc 0xe9e8 load address 0x00000000080458dc 0x00000000240000dc _sbss = . 0x00000000240000dc __bss_start__ = _sbss *(.bss) @@ -39820,7 +39820,7 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext 0x000000002400eac4 __bss_end__ = _ebss ._user_heap_stack - 0x000000002400eac4 0x1404 load address 0x00000000080458ac + 0x000000002400eac4 0x1404 load address 0x00000000080458dc 0x000000002400eac8 . = ALIGN (0x8) *fill* 0x000000002400eac4 0x4 [!provide] PROVIDE (end = .) @@ -39831,7 +39831,7 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext *fill* 0x000000002400eec8 0x1000 0x000000002400fec8 . = ALIGN (0x8) -.lwip_sec 0x0000000030000000 0x40260 load address 0x00000000080458ac +.lwip_sec 0x0000000030000000 0x40260 load address 0x00000000080458dc 0x0000000030030000 . = ABSOLUTE (0x30030000) *fill* 0x0000000030000000 0x30000 *(.Rx_PoolSection) @@ -40691,7 +40691,7 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .debug_macro 0x000000000004e20b 0x10 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .debug_macro 0x000000000004e21b 0x66a ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o -.debug_line 0x0000000000000000 0x532f3 +.debug_line 0x0000000000000000 0x532f9 .debug_line 0x0000000000000000 0xf39 ./Core/BASE/Src/BSP/BHBF_ROBOT.o .debug_line 0x0000000000000f39 0x1135 ./Core/BASE/Src/BSP/bsp_DLT_Log.o .debug_line 0x000000000000206e 0xfe9 ./Core/BASE/Src/BSP/bsp_EEPROM.o @@ -40713,56 +40713,56 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .debug_line 0x000000000000faeb 0xa74 ./Core/Src/fdcan.o .debug_line 0x000000000001055f 0x95e ./Core/Src/gpio.o .debug_line 0x0000000000010ebd 0x98b ./Core/Src/i2c.o - .debug_line 0x0000000000011848 0x1480 ./Core/Src/main.o - .debug_line 0x0000000000012cc8 0x9a4 ./Core/Src/quadspi.o - .debug_line 0x000000000001366c 0x8f3 ./Core/Src/stm32h7xx_hal_msp.o - .debug_line 0x0000000000013f5f 0xbf7 ./Core/Src/stm32h7xx_it.o - .debug_line 0x0000000000014b56 0xde6 ./Core/Src/syscalls.o - .debug_line 0x000000000001593c 0xbde ./Core/Src/sysmem.o - .debug_line 0x000000000001651a 0xaaa ./Core/Src/system_stm32h7xx.o - .debug_line 0x0000000000016fc4 0x9de ./Core/Src/tim.o - .debug_line 0x00000000000179a2 0xf9a ./Core/Src/usart.o - .debug_line 0x000000000001893c 0x88 ./Core/Startup/startup_stm32h743vgtx.o - .debug_line 0x00000000000189c4 0x805 ./Drivers/BSP/Components/lan8742/lan8742.o - .debug_line 0x00000000000191c9 0xea2 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - .debug_line 0x000000000001a06b 0x23fa ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - .debug_line 0x000000000001c465 0xea8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - .debug_line 0x000000000001d30d 0x27f1 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o - .debug_line 0x000000000001fafe 0x1be8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - .debug_line 0x00000000000216e6 0x2803 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - .debug_line 0x0000000000023ee9 0xd65 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - .debug_line 0x0000000000024c4e 0x38ba ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - .debug_line 0x0000000000028508 0xb12 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - .debug_line 0x000000000002901a 0x1519 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o - .debug_line 0x000000000002a533 0xfbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o - .debug_line 0x000000000002b4ef 0x1515 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - .debug_line 0x000000000002ca04 0x1410 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o - .debug_line 0x000000000002de14 0x1bca ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o - .debug_line 0x000000000002f9de 0x3f6f ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o - .debug_line 0x000000000003394d 0x1e48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o - .debug_line 0x0000000000035795 0x3efb ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o - .debug_line 0x0000000000039690 0xf80 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o - .debug_line 0x000000000003a610 0xdf9 ./LWIP/App/lwip.o - .debug_line 0x000000000003b409 0x11f1 ./LWIP/Target/ethernetif.o - .debug_line 0x000000000003c5fa 0xd9a ./Middlewares/Third_Party/LwIP/src/core/def.o - .debug_line 0x000000000003d394 0xef2 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o - .debug_line 0x000000000003e286 0xe43 ./Middlewares/Third_Party/LwIP/src/core/init.o - .debug_line 0x000000000003f0c9 0xce0 ./Middlewares/Third_Party/LwIP/src/core/ip.o - .debug_line 0x000000000003fda9 0x10c7 ./Middlewares/Third_Party/LwIP/src/core/mem.o - .debug_line 0x0000000000040e70 0x104e ./Middlewares/Third_Party/LwIP/src/core/memp.o - .debug_line 0x0000000000041ebe 0x1402 ./Middlewares/Third_Party/LwIP/src/core/netif.o - .debug_line 0x00000000000432c0 0x182f ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - .debug_line 0x0000000000044aef 0x1fbf ./Middlewares/Third_Party/LwIP/src/core/tcp.o - .debug_line 0x0000000000046aae 0x20ba ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .debug_line 0x0000000000048b68 0x1c67 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - .debug_line 0x000000000004a7cf 0x10c7 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - .debug_line 0x000000000004b896 0x1401 ./Middlewares/Third_Party/LwIP/src/core/udp.o - .debug_line 0x000000000004cc97 0x145a ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o - .debug_line 0x000000000004e0f1 0xee0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o - .debug_line 0x000000000004efd1 0x10d9 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o - .debug_line 0x00000000000500aa 0xfb0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o - .debug_line 0x000000000005105a 0x13d0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o - .debug_line 0x000000000005242a 0xec9 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o + .debug_line 0x0000000000011848 0x1486 ./Core/Src/main.o + .debug_line 0x0000000000012cce 0x9a4 ./Core/Src/quadspi.o + .debug_line 0x0000000000013672 0x8f3 ./Core/Src/stm32h7xx_hal_msp.o + .debug_line 0x0000000000013f65 0xbf7 ./Core/Src/stm32h7xx_it.o + .debug_line 0x0000000000014b5c 0xde6 ./Core/Src/syscalls.o + .debug_line 0x0000000000015942 0xbde ./Core/Src/sysmem.o + .debug_line 0x0000000000016520 0xaaa ./Core/Src/system_stm32h7xx.o + .debug_line 0x0000000000016fca 0x9de ./Core/Src/tim.o + .debug_line 0x00000000000179a8 0xf9a ./Core/Src/usart.o + .debug_line 0x0000000000018942 0x88 ./Core/Startup/startup_stm32h743vgtx.o + .debug_line 0x00000000000189ca 0x805 ./Drivers/BSP/Components/lan8742/lan8742.o + .debug_line 0x00000000000191cf 0xea2 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + .debug_line 0x000000000001a071 0x23fa ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + .debug_line 0x000000000001c46b 0xea8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + .debug_line 0x000000000001d313 0x27f1 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + .debug_line 0x000000000001fb04 0x1be8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + .debug_line 0x00000000000216ec 0x2803 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + .debug_line 0x0000000000023eef 0xd65 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + .debug_line 0x0000000000024c54 0x38ba ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + .debug_line 0x000000000002850e 0xb12 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + .debug_line 0x0000000000029020 0x1519 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o + .debug_line 0x000000000002a539 0xfbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o + .debug_line 0x000000000002b4f5 0x1515 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + .debug_line 0x000000000002ca0a 0x1410 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o + .debug_line 0x000000000002de1a 0x1bca ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o + .debug_line 0x000000000002f9e4 0x3f6f ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o + .debug_line 0x0000000000033953 0x1e48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o + .debug_line 0x000000000003579b 0x3efb ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o + .debug_line 0x0000000000039696 0xf80 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o + .debug_line 0x000000000003a616 0xdf9 ./LWIP/App/lwip.o + .debug_line 0x000000000003b40f 0x11f1 ./LWIP/Target/ethernetif.o + .debug_line 0x000000000003c600 0xd9a ./Middlewares/Third_Party/LwIP/src/core/def.o + .debug_line 0x000000000003d39a 0xef2 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o + .debug_line 0x000000000003e28c 0xe43 ./Middlewares/Third_Party/LwIP/src/core/init.o + .debug_line 0x000000000003f0cf 0xce0 ./Middlewares/Third_Party/LwIP/src/core/ip.o + .debug_line 0x000000000003fdaf 0x10c7 ./Middlewares/Third_Party/LwIP/src/core/mem.o + .debug_line 0x0000000000040e76 0x104e ./Middlewares/Third_Party/LwIP/src/core/memp.o + .debug_line 0x0000000000041ec4 0x1402 ./Middlewares/Third_Party/LwIP/src/core/netif.o + .debug_line 0x00000000000432c6 0x182f ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + .debug_line 0x0000000000044af5 0x1fbf ./Middlewares/Third_Party/LwIP/src/core/tcp.o + .debug_line 0x0000000000046ab4 0x20ba ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .debug_line 0x0000000000048b6e 0x1c67 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + .debug_line 0x000000000004a7d5 0x10c7 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + .debug_line 0x000000000004b89c 0x1401 ./Middlewares/Third_Party/LwIP/src/core/udp.o + .debug_line 0x000000000004cc9d 0x145a ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + .debug_line 0x000000000004e0f7 0xee0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o + .debug_line 0x000000000004efd7 0x10d9 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + .debug_line 0x00000000000500b0 0xfb0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o + .debug_line 0x0000000000051060 0x13d0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + .debug_line 0x0000000000052430 0xec9 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o .debug_str 0x0000000000000000 0x1aa4f8 .debug_str 0x0000000000000000 0x189172 ./Core/BASE/Src/BSP/BHBF_ROBOT.o