From 9127a4d5feee8b052f667ffa81dc7877968a7560 Mon Sep 17 00:00:00 2001 From: "DESKTOP-1PDT1EL\\10564" <1056470187@qq.com> Date: Wed, 26 Aug 2026 15:11:36 +0800 Subject: [PATCH] =?UTF-8?q?=E6=9B=B4=E6=96=B0=E9=9D=9E=E9=98=BB=E5=A1=9E?= =?UTF-8?q?=E5=BB=B6=E6=97=B6?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Core/Src/main.c | 94 +- Debug/Core/Src/main.o | Bin 2232128 -> 2233516 bytes Debug/Core/Src/main.su | 12 +- Debug/EchoNewBB0825.bin | Bin 153820 -> 153948 bytes Debug/EchoNewBB0825.elf | Bin 3158040 -> 3158672 bytes Debug/EchoNewBB0825.hex | 17710 +++--- Debug/EchoNewBB0825.list | 106778 ++++++++++++++++++------------------ Debug/EchoNewBB0825.map | 3698 +- 8 files changed, 64242 insertions(+), 64050 deletions(-) diff --git a/Core/Src/main.c b/Core/Src/main.c index dded54d..09ab51e 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -84,7 +84,68 @@ int can2_DispacherPeriod = 4; /* Private variables ---------------------------------------------------------*/ /* USER CODE BEGIN PV */ +typedef enum +{ + ACT_UP = 0, + ACT_STOP1, + ACT_DOWN, + ACT_STOP2, +}ACT_STATE; + +ACT_STATE g_state = ACT_UP; +uint32_t g_tick = 0; +void Actuator_Start(void) /*初始化*/ +{ + g_state = ACT_UP; + g_tick = HAL_GetTick(); + + GF_BSP_GPIO_SetIO(7,1); + GF_BSP_GPIO_SetIO(8,0); +} +void Actuator_Task(void) /*实现不阻塞延时*/ +{ + if(HAL_GetTick() - g_tick < 2000) + return; + + g_tick = HAL_GetTick(); + + switch(g_state) + { + case ACT_UP: + // 上升 + GF_BSP_GPIO_SetIO(7,1); + GF_BSP_GPIO_SetIO(8,0); + g_state = ACT_STOP1; + break; + + case ACT_STOP1: + // 停止 + GF_BSP_GPIO_SetIO(7,1); + GF_BSP_GPIO_SetIO(8,1); + g_state = ACT_DOWN; + break; + + case ACT_DOWN: + // 下降 + GF_BSP_GPIO_SetIO(7,0); + GF_BSP_GPIO_SetIO(8,1); + g_state = ACT_STOP2; + break; + + case ACT_STOP2: + // 停止 + GF_BSP_GPIO_SetIO(7,1); + GF_BSP_GPIO_SetIO(8,1); + + // 如果只执行一轮 + // return; + + // 如果一直循环 + g_state = ACT_UP; + break; + } +} /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ @@ -206,7 +267,7 @@ int main(void) /* TCP echo server Init */ tcp_server_init(5000); - + Actuator_Start(); char InputInfo[500]; /* USER CODE END 2 */ @@ -215,7 +276,7 @@ int main(void) /* USER CODE BEGIN WHILE */ while (1) { - if (HAL_GetTick() - ledTick >= 3000) /*led翻转，表示程序运行状�?????*/ + if (HAL_GetTick() - ledTick >= 1000) /*led翻转，表示程序运行状�?????*/ { ledTick = HAL_GetTick(); HAL_GPIO_TogglePin(IO_LED_GPIO_Port, IO_LED_Pin); //反转 @@ -226,21 +287,26 @@ int main(void) HAL_GPIO_TogglePin(M_OUT5_GPIO_Port, M_OUT5_Pin); HAL_GPIO_TogglePin(M_OUT6_GPIO_Port, M_OUT6_Pin); } - GF_BSP_GPIO_SetIO(7,1); /* 上升 0亮 1灭 不能同时为0，不能同时亮，会烧保险丝，为了给继电器吸合的反应时间*/ - GF_BSP_GPIO_SetIO(8,0);/*推杆上升下降切换时时必须经过停止，延时1s*/ - HAL_Delay(2000); - GF_BSP_GPIO_SetIO(7,1);/*停*/ - GF_BSP_GPIO_SetIO(8,1); - HAL_Delay(2000); + Actuator_Task(); + + - GF_BSP_GPIO_SetIO(7,0);/*下降*/ - GF_BSP_GPIO_SetIO(8,1); - HAL_Delay(2000); +// GF_BSP_GPIO_SetIO(7,1); /* 上升 0亮 1灭 不能同时为0，不能同时亮，会烧保险丝，为了给继电器吸合的反应时间*/ +// GF_BSP_GPIO_SetIO(8,0);/*推杆上升下降切换时时必须经过停止，延时1s*/ +// HAL_Delay(2000); +// +// GF_BSP_GPIO_SetIO(7,1);/*停*/ +// GF_BSP_GPIO_SetIO(8,1); +// HAL_Delay(2000); +// +// GF_BSP_GPIO_SetIO(7,0);/*下降*/ +// GF_BSP_GPIO_SetIO(8,1); +// HAL_Delay(2000); - GF_BSP_GPIO_SetIO(7,1);/*停*/ - GF_BSP_GPIO_SetIO(8,1); - HAL_Delay(2000); +// GF_BSP_GPIO_SetIO(7,1);/*停*/ +// GF_BSP_GPIO_SetIO(8,1); +// HAL_Delay(2000); memset(InputInfo, '\0', sizeof(InputInfo)); diff --git a/Debug/Core/Src/main.o b/Debug/Core/Src/main.o index 9434a740c2361a674e36db6a375e13e3255d3cb2..cc621ec8566b5b5fd68305f618e7f756c759d2ee 100644 GIT binary patch delta 552209 zcmaHT2YA#**X~HW(rTNLv|6o=4cOQi(+!y3dneRD2)!hx1_%L?5Z3e#hNbsvdM~yy z9ZavLm}W4|^xjRo@6nR~`~G{M=knm4Ju|1g=bRa7G&9Gyw~X7)HcAax-kg2Ez5n{n zR9md?>d1vzLWyEwlE2&=w;LkHKjNo0zIJ4T;Mnsyx4zB(t>$?{)>}Ia!eI@92b&62 zyv!|a_96TQ+glA{KjE(*{>I_&|5om9z`=M#=D+paccVEP@Td>WWZ%L3TW@V(LcQbv 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zpq6+uT%*_=JK%an%DdomjD)Q+!gt_h(^znoLiri&tM=w9-@#){AL-?G4gVxqS!E9m zbO}dSARp-yfAF=!Ml1d<$PxCP%-+{t4dNh4xgm|EW=o{?Edp ziM5GLnZN>AoQ+O|#fg-~Q33dmQMlwI&#+ztSD`E1Zn_B;r-S3|@T~U4gztiPyAv3p z|38fJ@F~1a83zVq-v0>?B7ee?4-0_?9ZGOT3!2|FXnZUFv>{6v0&xW@u zTm-8!vjna?g3KB8e-U9F4wuHrvFrtF;ciU*96QHx+RN}c#RO=FyI9R}+qeTB-m4pX za1imm4U6;it_+=k)eQ8);?n49q5nmdT)?4?ZgE_e=m+?+(v9xGZ?a+kntZP_6%r?f zX>vRKEO_P{UawgI``KBJ^m~k~{7UcS$h8@SXGJgQdRRz+pfZ-%z)R8B$7F)*;8CuK zBb;5r7Pugs{!3uE$kGQ3GQx$^&9EN6lWsQOAKs8}PS?YG3e1x}-+HS!V9rVqr)3PQ zK44}iie1r>=dB$9Gb>S?Vd7fxlj2z%)Qe*TJj@$-uWMt=GS16sRPN078t P`KI: 80202c4: b508 push {r3, lr} @@ -72,7 +72,7 @@ Disassembly of section .text: 80202d2: bd08 pop {r3, pc} 80202d4: 00000000 .word 0x00000000 80202d8: 240000e0 .word 0x240000e0 - 80202dc: 08041ff0 .word 0x08041ff0 + 80202dc: 08042070 .word 0x08042070 080202e0 : 80202e0: f810 2b01 ldrb.w r2, [r0], #1 @@ -612,7 +612,7 @@ void DLT_LowLevelReceiveDmaToIdle(uint8_t *rxBuf, uint16_t Size) 80207aa: 887a ldrh r2, [r7, #2] 80207ac: 4619 mov r1, r3 80207ae: 6878 ldr r0, [r7, #4] - 80207b0: f020 f89e bl 80408f0 + 80207b0: f020 f8e0 bl 8040974 } 80207b4: bf00 nop @@ -674,7 +674,7 @@ void DltInjectDataRcvd(uint32_t AppId, uint32_t ConId, uint32_t ServId, 8020818: 46bd mov sp, r7 802081a: bd80 pop {r7, pc} 802081c: 24009bb4 .word 0x24009bb4 - 8020820: 08042008 .word 0x08042008 + 8020820: 08042088 .word 0x08042088 08020824 : @@ -684,7 +684,7 @@ uint32_t GetSysTime(void) 8020824: b580 push {r7, lr} 8020826: af00 add r7, sp, #0 return HAL_GetTick(); - 8020828: f005 fbcc bl 8025fc4 + 8020828: f005 fc0e bl 8026048 802082c: 4603 mov r3, r0 } 802082e: 4618 mov r0, r3 @@ -738,7 +738,7 @@ void bsp_InitI2C(void) 802085c: 1d3b adds r3, r7, #4 802085e: 4619 mov r1, r3 8020860: 4808 ldr r0, [pc, #32] ; (8020884 ) - 8020862: f00c fe03 bl 802d46c + 8020862: f00c fe45 bl 802d4f0 gpio_init.Pin = I2C_SDA_PIN; 8020866: f44f 5300 mov.w r3, #8192 ; 0x2000 @@ -747,7 +747,7 @@ void bsp_InitI2C(void) 802086c: 1d3b adds r3, r7, #4 802086e: 4619 mov r1, r3 8020870: 4804 ldr r0, [pc, #16] ; (8020884 ) - 8020872: f00c fdfb bl 802d46c + 8020872: f00c fe3d bl 802d4f0 /* 给一个停止信号, 复位I2C总线上的所有设备到待机模式 */ i2c_Stop(); @@ -1390,7 +1390,7 @@ CV_struct_define GF_BSP_EEPROM_Get_CV(void) 8020bc4: 2230 movs r2, #48 ; 0x30 8020bc6: 2100 movs r1, #0 8020bc8: 4618 mov r0, r3 - 8020bca: f01f feb9 bl 8040940 + 8020bca: f01f fefb bl 80409c4 //char buffer[sizeof(CV_struct_define)]; GF_BSP_EEPROM_ReadBytes(&cv, GF_BSP_EEPROM_CV_struct_define_Start_Address, sizeof(CV_struct_define)); 8020bce: f107 0308 add.w r3, r7, #8 @@ -1429,7 +1429,7 @@ void Error_Detect_Intialzie(uint16_t DispacherPeriod) 8020c04: 80fb strh r3, [r7, #6] HardWareErrorController = (HardWareController*) malloc( 8020c06: 2018 movs r0, #24 - 8020c08: f01f fe52 bl 80408b0 + 8020c08: f01f fe94 bl 8040934 8020c0c: 4603 mov r3, r0 8020c0e: 461a mov r2, r3 8020c10: 4b10 ldr r3, [pc, #64] ; (8020c54 ) @@ -1522,63 +1522,63 @@ uint8_t GF_BSP_FDCAN_Init(void) 8020c94: 2200 movs r2, #0 8020c96: 2101 movs r1, #1 8020c98: 4818 ldr r0, [pc, #96] ; (8020cfc ) - 8020c9a: f00b fe6b bl 802c974 + 8020c9a: f00b fead bl 802c9f8 8020c9e: 4603 mov r3, r0 8020ca0: 2b00 cmp r3, #0 8020ca2: d001 beq.n 8020ca8 0) != HAL_OK) { Error_Handler(); - 8020ca4: f003 fb42 bl 802432c + 8020ca4: f003 fb84 bl 80243b0 } if (HAL_FDCAN_ActivateNotification(&hfdcan1, FDCAN_IT_BUS_OFF, 0) != HAL_OK) 8020ca8: 2200 movs r2, #0 8020caa: f04f 7100 mov.w r1, #33554432 ; 0x2000000 8020cae: 4813 ldr r0, [pc, #76] ; (8020cfc ) - 8020cb0: f00b fe60 bl 802c974 + 8020cb0: f00b fea2 bl 802c9f8 8020cb4: 4603 mov r3, r0 8020cb6: 2b00 cmp r3, #0 8020cb8: d001 beq.n 8020cbe { Error_Handler(); - 8020cba: f003 fb37 bl 802432c + 8020cba: f003 fb79 bl 80243b0 } HAL_FDCAN_Start(&hfdcan1); 8020cbe: 480f ldr r0, [pc, #60] ; (8020cfc ) - 8020cc0: f00b fc64 bl 802c58c + 8020cc0: f00b fca6 bl 802c610 if (HAL_FDCAN_ActivateNotification(&hfdcan2, FDCAN_IT_RX_FIFO0_NEW_MESSAGE, 8020cc4: 2200 movs r2, #0 8020cc6: 2101 movs r1, #1 8020cc8: 480d ldr r0, [pc, #52] ; (8020d00 ) - 8020cca: f00b fe53 bl 802c974 + 8020cca: f00b fe95 bl 802c9f8 8020cce: 4603 mov r3, r0 8020cd0: 2b00 cmp r3, #0 8020cd2: d001 beq.n 8020cd8 0) != HAL_OK) { Error_Handler(); - 8020cd4: f003 fb2a bl 802432c + 8020cd4: f003 fb6c bl 80243b0 } if (HAL_FDCAN_ActivateNotification(&hfdcan2, FDCAN_IT_BUS_OFF, 0) != HAL_OK) 8020cd8: 2200 movs r2, #0 8020cda: f04f 7100 mov.w r1, #33554432 ; 0x2000000 8020cde: 4808 ldr r0, [pc, #32] ; (8020d00 ) - 8020ce0: f00b fe48 bl 802c974 + 8020ce0: f00b fe8a bl 802c9f8 8020ce4: 4603 mov r3, r0 8020ce6: 2b00 cmp r3, #0 8020ce8: d001 beq.n 8020cee { Error_Handler(); - 8020cea: f003 fb1f bl 802432c + 8020cea: f003 fb61 bl 80243b0 } HAL_FDCAN_Start(&hfdcan2); 8020cee: 4804 ldr r0, [pc, #16] ; (8020d00 ) - 8020cf0: f00b fc4c bl 802c58c + 8020cf0: f00b fc8e bl 802c610 return 1; 8020cf4: 2301 movs r3, #1 @@ -1649,7 +1649,7 @@ void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs) 8020d52: 4a31 ldr r2, [pc, #196] ; (8020e18 ) 8020d54: 2140 movs r1, #64 ; 0x40 8020d56: 6878 ldr r0, [r7, #4] - 8020d58: f00b fc9e bl 802c698 + 8020d58: f00b fce0 bl 802c71c 8020d5c: 4603 mov r3, r0 8020d5e: 2b00 cmp r3, #0 8020d60: d152 bne.n 8020e08 @@ -1717,7 +1717,7 @@ void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs) 8020db4: 4a18 ldr r2, [pc, #96] ; (8020e18 ) 8020db6: 2140 movs r1, #64 ; 0x40 8020db8: 6878 ldr r0, [r7, #4] - 8020dba: f00b fc6d bl 802c698 + 8020dba: f00b fcaf bl 802c71c 8020dbe: 4603 mov r3, r0 8020dc0: 2b00 cmp r3, #0 8020dc2: d121 bne.n 8020e08 @@ -1836,7 +1836,7 @@ void GF_BSP_CANHandler_Init_CAN(FDCANHandler *handler, 8020e92: 601a str r2, [r3, #0] handler->dispacherController = (DispacherController*) malloc( 8020e94: 2018 movs r0, #24 - 8020e96: f01f fd0b bl 80408b0 + 8020e96: f01f fd4d bl 8040934 8020e9a: 4603 mov r3, r0 8020e9c: 461a mov r2, r3 8020e9e: 68fb ldr r3, [r7, #12] @@ -2064,7 +2064,7 @@ void GF_CAN_Send_List_Send(FDCANHandler *handler) 8020fe6: 7a1b ldrb r3, [r3, #8] memcpy(handler->Tx_Buf, handler->pCurrentCANSendHadler->Tx_Buf, 8020fe8: 461a mov r2, r3 - 8020fea: f01f fc81 bl 80408f0 + 8020fea: f01f fcc3 bl 8040974 handler->SendList_Period=handler->pCurrentCANSendHadler->SendListTimePeriod; 8020fee: 687b ldr r3, [r7, #4] 8020ff0: 695b ldr r3, [r3, #20] @@ -2100,7 +2100,7 @@ void GF_CAN_Send_List_Send(FDCANHandler *handler) 8021020: 687b ldr r3, [r7, #4] 8021022: 695b ldr r3, [r3, #20] 8021024: 4618 mov r0, r3 - 8021026: f01f fc4b bl 80408c0 + 8021026: f01f fc8d bl 8040944 handler->pCurrentCANSendHadler = temp; 802102a: 687b ldr r3, [r7, #4] 802102c: 68fa ldr r2, [r7, #12] @@ -2116,7 +2116,7 @@ void GF_CAN_Send_List_Send(FDCANHandler *handler) 8021032: 687b ldr r3, [r7, #4] 8021034: 695b ldr r3, [r3, #20] 8021036: 4618 mov r0, r3 - 8021038: f01f fc42 bl 80408c0 + 8021038: f01f fc84 bl 8040944 handler->pCurrentCANSendHadler = NULL; 802103c: 687b ldr r3, [r7, #4] 802103e: 2200 movs r2, #0 @@ -2200,7 +2200,7 @@ void CAN_Send_t(struct _FDCANHandler *fd, uint32_t FrameID, uint8_t DataLength, 802109a: 683a ldr r2, [r7, #0] 802109c: 4914 ldr r1, [pc, #80] ; (80210f0 ) 802109e: 4813 ldr r0, [pc, #76] ; (80210ec ) - 80210a0: f00b fa9f bl 802c5e2 + 80210a0: f00b fae1 bl 802c666 80210a4: e01e b.n 80210e4 } else if (fd->canfd == &hfdcan2) 80210a6: 68fb ldr r3, [r7, #12] @@ -2244,7 +2244,7 @@ void CAN_Send_t(struct _FDCANHandler *fd, uint32_t FrameID, uint8_t DataLength, 80210d6: 683a ldr r2, [r7, #0] 80210d8: 4907 ldr r1, [pc, #28] ; (80210f8 ) 80210da: 4806 ldr r0, [pc, #24] ; (80210f4 ) - 80210dc: f00b fa81 bl 802c5e2 + 80210dc: f00b fac3 bl 802c666 80210e0: e000 b.n 80210e4 return; 80210e2: bf00 nop @@ -2305,7 +2305,7 @@ void CANHandlerAddTxList(FDCANHandler *handler, uint32_t CAN_ID, //临时指针2用于逐个申请内存 pTmp = (CANSendHandler*) malloc(sizeof(CANSendHandler)); 8021138: 201c movs r0, #28 - 802113a: f01f fbb9 bl 80408b0 + 802113a: f01f fbfb bl 8040934 802113e: 4603 mov r3, r0 8021140: 617b str r3, [r7, #20] memcpy(pTmp->Tx_Buf, Tx_Buf, SendLength); @@ -2314,7 +2314,7 @@ void CANHandlerAddTxList(FDCANHandler *handler, uint32_t CAN_ID, 8021146: 79fa ldrb r2, [r7, #7] 8021148: 6839 ldr r1, [r7, #0] 802114a: 4618 mov r0, r3 - 802114c: f01f fbd0 bl 80408f0 + 802114c: f01f fc12 bl 8040974 pTmp->pNext = NULL; 8021150: 697b ldr r3, [r7, #20] 8021152: 2200 movs r2, #0 @@ -2441,7 +2441,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 80211fe: 461a mov r2, r3 8021200: 2110 movs r1, #16 8021202: 481d ldr r0, [pc, #116] ; (8021278 ) - 8021204: f00c fae2 bl 802d7cc + 8021204: f00c fb24 bl 802d850 break; 8021208: e031 b.n 802126e case 2: @@ -2450,7 +2450,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 802120c: 461a mov r2, r3 802120e: 2101 movs r1, #1 8021210: 481a ldr r0, [pc, #104] ; (802127c ) - 8021212: f00c fadb bl 802d7cc + 8021212: f00c fb1d bl 802d850 break; 8021216: e02a b.n 802126e case 3: @@ -2459,7 +2459,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 802121a: 461a mov r2, r3 802121c: 2108 movs r1, #8 802121e: 4817 ldr r0, [pc, #92] ; (802127c ) - 8021220: f00c fad4 bl 802d7cc + 8021220: f00c fb16 bl 802d850 break; 8021224: e023 b.n 802126e case 4: @@ -2468,7 +2468,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021228: 461a mov r2, r3 802122a: 2104 movs r1, #4 802122c: 4813 ldr r0, [pc, #76] ; (802127c ) - 802122e: f00c facd bl 802d7cc + 802122e: f00c fb0f bl 802d850 break; 8021232: e01c b.n 802126e case 5: @@ -2477,7 +2477,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021236: 461a mov r2, r3 8021238: 2120 movs r1, #32 802123a: 4810 ldr r0, [pc, #64] ; (802127c ) - 802123c: f00c fac6 bl 802d7cc + 802123c: f00c fb08 bl 802d850 break; 8021240: e015 b.n 802126e case 6: @@ -2486,7 +2486,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021244: 461a mov r2, r3 8021246: 2110 movs r1, #16 8021248: 480c ldr r0, [pc, #48] ; (802127c ) - 802124a: f00c fabf bl 802d7cc + 802124a: f00c fb01 bl 802d850 break; 802124e: e00e b.n 802126e case 7: @@ -2495,7 +2495,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021252: 461a mov r2, r3 8021254: f44f 5100 mov.w r1, #8192 ; 0x2000 8021258: 4809 ldr r0, [pc, #36] ; (8021280 ) - 802125a: f00c fab7 bl 802d7cc + 802125a: f00c faf9 bl 802d850 break; 802125e: e006 b.n 802126e case 8: @@ -2504,7 +2504,7 @@ void GF_BSP_GPIO_SetIO(uint8_t IO_Index,uint8_t Level) 8021262: 461a mov r2, r3 8021264: 2140 movs r1, #64 ; 0x40 8021266: 4805 ldr r0, [pc, #20] ; (802127c ) - 8021268: f00c fab0 bl 802d7cc + 8021268: f00c faf2 bl 802d850 break; 802126c: bf00 nop @@ -2667,18 +2667,18 @@ uint8_t GF_BSP_TIMER_Init() 802136a: af00 add r7, sp, #0 HAL_TIM_Base_Start_IT(&htim1); 802136c: 4804 ldr r0, [pc, #16] ; (8021380 ) - 802136e: f010 ff03 bl 8032178 + 802136e: f010 ff45 bl 80321fc HAL_TIM_Base_Start_IT(&htim8); 8021372: 4804 ldr r0, [pc, #16] ; (8021384 ) - 8021374: f010 ff00 bl 8032178 + 8021374: f010 ff42 bl 80321fc return 1; 8021378: 2301 movs r3, #1 } 802137a: 4618 mov r0, r3 802137c: bd80 pop {r7, pc} 802137e: bf00 nop - 8021380: 2400af7c .word 0x2400af7c - 8021384: 2400afc8 .word 0x2400afc8 + 8021380: 2400af84 .word 0x2400af84 + 8021384: 2400afd0 .word 0x2400afd0 08021388 : @@ -2710,7 +2710,7 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) 80213a8: d104 bne.n 80213b4 { MX_LWIP_Process(); - 80213aa: f014 f9a1 bl 80356f0 + 80213aa: f014 f9e3 bl 8035774 GF_BSP_Interrupt_Run_CallBack(DF_BSP_InterCall_TIM8_2ms_PeriodElapsedCallback); 80213ae: 200a movs r0, #10 80213b0: f7ff ffa6 bl 8021300 @@ -2914,7 +2914,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 80214e2: 2201 movs r2, #1 80214e4: 4934 ldr r1, [pc, #208] ; (80215b8 ) 80214e6: 4618 mov r0, r3 - 80214e8: f011 fbc8 bl 8032c7c + 80214e8: f011 fc0a bl 8032d00 (uint8_t*) &E28_SBUS_UART_Handler.tmp_Rx_Buf, 1); @@ -2924,7 +2924,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 80214f0: 2201 movs r2, #1 80214f2: 4932 ldr r1, [pc, #200] ; (80215bc ) 80214f4: 4618 mov r0, r3 - 80214f6: f011 fbc1 bl 8032c7c + 80214f6: f011 fc03 bl 8032d00 (uint8_t*) &InterCall_DEBUG_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((RS_485_1_UART_Handler.uart), 80214fa: 4b21 ldr r3, [pc, #132] ; (8021580 ) @@ -2932,7 +2932,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 80214fe: 2201 movs r2, #1 8021500: 492f ldr r1, [pc, #188] ; (80215c0 ) 8021502: 4618 mov r0, r3 - 8021504: f011 fbba bl 8032c7c + 8021504: f011 fbfc bl 8032d00 (uint8_t*) &RS_485_1_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((RS_485_2_UART_Handler.uart), @@ -2941,7 +2941,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 802150c: 2201 movs r2, #1 802150e: 492d ldr r1, [pc, #180] ; (80215c4 ) 8021510: 4618 mov r0, r3 - 8021512: f011 fbb3 bl 8032c7c + 8021512: f011 fbf5 bl 8032d00 (uint8_t*) &RS_485_2_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((RS_485_3_UART_Handler.uart), @@ -2950,7 +2950,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 802151a: 2201 movs r2, #1 802151c: 492a ldr r1, [pc, #168] ; (80215c8 ) 802151e: 4618 mov r0, r3 - 8021520: f011 fbac bl 8032c7c + 8021520: f011 fbee bl 8032d00 (uint8_t*) &RS_485_3_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((RS_485_4_UART_Handler.uart), @@ -2959,7 +2959,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 8021528: 2201 movs r2, #1 802152a: 4928 ldr r1, [pc, #160] ; (80215cc ) 802152c: 4618 mov r0, r3 - 802152e: f011 fba5 bl 8032c7c + 802152e: f011 fbe7 bl 8032d00 (uint8_t*) &RS_485_4_UART_Handler.tmp_Rx_Buf, 1); HAL_UART_Receive_IT((LTE_7S0_Serial_UART_Handler.uart), @@ -2968,7 +2968,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 8021536: 2201 movs r2, #1 8021538: 4925 ldr r1, [pc, #148] ; (80215d0 ) 802153a: 4618 mov r0, r3 - 802153c: f011 fb9e bl 8032c7c + 802153c: f011 fbe0 bl 8032d00 (uint8_t*) <E_7S0_Serial_UART_Handler.tmp_Rx_Buf, 1); @@ -2978,7 +2978,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 8021544: 2201 movs r2, #1 8021546: 4923 ldr r1, [pc, #140] ; (80215d4 ) 8021548: 4618 mov r0, r3 - 802154a: f011 fb97 bl 8032c7c + 802154a: f011 fbd9 bl 8032d00 (uint8_t*) &Airborne_UART_Handler.tmp_Rx_Buf, 1); @@ -2997,7 +2997,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 8021562: 2201 movs r2, #1 8021564: 491e ldr r1, [pc, #120] ; (80215e0 ) 8021566: 4618 mov r0, r3 - 8021568: f011 fb88 bl 8032c7c + 8021568: f011 fbca bl 8032d00 #endif @@ -3015,20 +3015,20 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 8021576: 3710 adds r7, #16 8021578: 46bd mov sp, r7 802157a: bd80 pop {r7, pc} - 802157c: 2400b254 .word 0x2400b254 + 802157c: 2400b25c .word 0x2400b25c 8021580: 2400091c .word 0x2400091c - 8021584: 2400b374 .word 0x2400b374 + 8021584: 2400b37c .word 0x2400b37c 8021588: 2400195c .word 0x2400195c - 802158c: 2400b404 .word 0x2400b404 + 802158c: 2400b40c .word 0x2400b40c 8021590: 2400299c .word 0x2400299c - 8021594: 2400b1c4 .word 0x2400b1c4 + 8021594: 2400b1cc .word 0x2400b1cc 8021598: 240039dc .word 0x240039dc - 802159c: 2400b0a4 .word 0x2400b0a4 + 802159c: 2400b0ac .word 0x2400b0ac 80215a0: 24006a9c .word 0x24006a9c 80215a4: 24004a1c .word 0x24004a1c - 80215a8: 2400b2e4 .word 0x2400b2e4 + 80215a8: 2400b2ec .word 0x2400b2ec 80215ac: 24005a5c .word 0x24005a5c - 80215b0: 2400b134 .word 0x2400b134 + 80215b0: 2400b13c .word 0x2400b13c 80215b4: 24007adc .word 0x24007adc 80215b8: 24005a5f .word 0x24005a5f 80215bc: 24004a1f .word 0x24004a1f @@ -3038,7 +3038,7 @@ void GF_BSP_TIMER_DelayUS(uint32_t n) 80215cc: 240039df .word 0x240039df 80215d0: 24006a9f .word 0x24006a9f 80215d4: 24007adf .word 0x24007adf - 80215d8: 2400b014 .word 0x2400b014 + 80215d8: 2400b01c .word 0x2400b01c 80215dc: 24008b1c .word 0x24008b1c 80215e0: 24008b1f .word 0x24008b1f 80215e4: 080215e9 .word 0x080215e9 @@ -3114,7 +3114,7 @@ void UARTHandlerAddTxList(struct UARTHandler *uartHandler, uint8_t *data, //临时指针2用于逐个申请内存 pTmp = (UARTSendHandler*) malloc(sizeof(UARTSendHandler)); 8021660: f44f 7001 mov.w r0, #516 ; 0x204 - 8021664: f01f f924 bl 80408b0 + 8021664: f01f f966 bl 8040934 8021668: 4603 mov r3, r0 802166a: 617b str r3, [r7, #20] memcpy(pTmp->Tx_Buf, data, length); @@ -3123,7 +3123,7 @@ void UARTHandlerAddTxList(struct UARTHandler *uartHandler, uint8_t *data, 8021670: 88fa ldrh r2, [r7, #6] 8021672: 68b9 ldr r1, [r7, #8] 8021674: 4618 mov r0, r3 - 8021676: f01f f93b bl 80408f0 + 8021676: f01f f97d bl 8040974 pTmp->pNext = NULL; 802167a: 697b ldr r3, [r7, #20] 802167c: 2200 movs r2, #0 @@ -3294,7 +3294,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 802177a: 2201 movs r2, #1 802177c: f44f 6180 mov.w r1, #1024 ; 0x400 8021780: 484c ldr r0, [pc, #304] ; (80218b4 ) - 8021782: f00c f823 bl 802d7cc + 8021782: f00c f865 bl 802d850 8021786: e04b b.n 8021820 } else if (uartHandler->uart->Instance == USART3) //**RS485_2 @@ -3310,7 +3310,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 8021794: 2201 movs r2, #1 8021796: f44f 6100 mov.w r1, #2048 ; 0x800 802179a: 4846 ldr r0, [pc, #280] ; (80218b4 ) - 802179c: f00c f816 bl 802d7cc + 802179c: f00c f858 bl 802d850 80217a0: e03e b.n 8021820 } else if (uartHandler->uart->Instance == USART6) //**RS485_3 @@ -3326,7 +3326,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 80217ae: 2201 movs r2, #1 80217b0: f44f 7180 mov.w r1, #256 ; 0x100 80217b4: 4842 ldr r0, [pc, #264] ; (80218c0 ) - 80217b6: f00c f809 bl 802d7cc + 80217b6: f00c f84b bl 802d850 80217ba: e031 b.n 8021820 } else if (uartHandler->uart->Instance == UART7) //**RS485_4 @@ -3341,7 +3341,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 80217c8: 2201 movs r2, #1 80217ca: f44f 7100 mov.w r1, #512 ; 0x200 80217ce: 483c ldr r0, [pc, #240] ; (80218c0 ) - 80217d0: f00b fffc bl 802d7cc + 80217d0: f00c f83e bl 802d850 80217d4: e024 b.n 8021820 } else if (uartHandler->uart->Instance == USART2)//****SBUS @@ -3361,7 +3361,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 80217ee: f503 5380 add.w r3, r3, #4096 ; 0x1000 80217f2: 8c5a ldrh r2, [r3, #34] ; 0x22 80217f4: 2364 movs r3, #100 ; 0x64 - 80217f6: f011 f9ab bl 8032b50 + 80217f6: f011 f9ed bl 8032bd4 80217fa: e011 b.n 8021820 uartHandler->TxCount,100); @@ -3382,7 +3382,7 @@ void UARTHandlerTx(struct UARTHandler *uartHandler) 8021814: f503 5380 add.w r3, r3, #4096 ; 0x1000 8021818: 8c5a ldrh r2, [r3, #34] ; 0x22 802181a: 2364 movs r3, #100 ; 0x64 - 802181c: f011 f998 bl 8032b50 + 802181c: f011 f9da bl 8032bd4 uartHandler->TxCount,100); } @@ -3467,7 +3467,7 @@ __STATIC_FORCEINLINE void __DSB(void) 8021882: f503 5380 add.w r3, r3, #4096 ; 0x1000 8021886: 8c5b ldrh r3, [r3, #34] ; 0x22 8021888: 461a mov r2, r3 - 802188a: f011 fa4d bl 8032d28 + 802188a: f011 fa8f bl 8032dac 802188e: e000 b.n 8021892 return; 8021890: bf00 nop @@ -3481,9 +3481,9 @@ __STATIC_FORCEINLINE void __DSB(void) 8021894: 46bd mov sp, r7 8021896: bd80 pop {r7, pc} 8021898: 24009bb4 .word 0x24009bb4 - 802189c: 08044cac .word 0x08044cac - 80218a0: 08042088 .word 0x08042088 - 80218a4: 08042034 .word 0x08042034 + 802189c: 08044d2c .word 0x08044d2c + 80218a0: 08042108 .word 0x08042108 + 80218a4: 080420b4 .word 0x080420b4 80218a8: 58000c00 .word 0x58000c00 80218ac: 40004c00 .word 0x40004c00 80218b0: 40011000 .word 0x40011000 @@ -3548,7 +3548,7 @@ void UARTHandlerRX(struct UARTHandler *uartHandler) 8021924: 3303 adds r3, #3 8021926: 2201 movs r2, #1 8021928: 4619 mov r1, r3 - 802192a: f011 f9a7 bl 8032c7c + 802192a: f011 f9e9 bl 8032d00 uartHandler->Wait_Time_Count = 0; 802192e: 687b ldr r3, [r7, #4] @@ -3620,7 +3620,7 @@ void IntializeUARTHandler(struct UARTHandler *uartHandler, uartHandler->dispacherController = (DispacherController*) malloc( 8021998: 2018 movs r0, #24 - 802199a: f01e ff89 bl 80408b0 + 802199a: f01e ffcb bl 8040934 802199e: 4603 mov r3, r0 80219a0: 461a mov r2, r3 80219a2: 68fb ldr r3, [r7, #12] @@ -3985,7 +3985,7 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) 8021c00: 2200 movs r2, #0 8021c02: f44f 6180 mov.w r1, #1024 ; 0x400 8021c06: 481a ldr r0, [pc, #104] ; (8021c70 ) - 8021c08: f00b fde0 bl 802d7cc + 8021c08: f00b fe22 bl 802d850 } else if (huart->Instance == UART5) //**E28 // SBUS { @@ -4003,7 +4003,7 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) 8021c18: 2200 movs r2, #0 8021c1a: f44f 6100 mov.w r1, #2048 ; 0x800 8021c1e: 4814 ldr r0, [pc, #80] ; (8021c70 ) - 8021c20: f00b fdd4 bl 802d7cc + 8021c20: f00b fe16 bl 802d850 } 8021c24: e01b b.n 8021c5e } else if (huart->Instance == USART6) //**RS485_3 @@ -4016,7 +4016,7 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) 8021c30: 2200 movs r2, #0 8021c32: f44f 7180 mov.w r1, #256 ; 0x100 8021c36: 4811 ldr r0, [pc, #68] ; (8021c7c ) - 8021c38: f00b fdc8 bl 802d7cc + 8021c38: f00b fe0a bl 802d850 } 8021c3c: e00f b.n 8021c5e } else if (huart->Instance == UART7) //**RS485_4 @@ -4029,7 +4029,7 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) 8021c48: 2200 movs r2, #0 8021c4a: f44f 7100 mov.w r1, #512 ; 0x200 8021c4e: 480b ldr r0, [pc, #44] ; (8021c7c ) - 8021c50: f00b fdbc bl 802d7cc + 8021c50: f00b fdfe bl 802d850 } 8021c54: e003 b.n 8021c5e } else if (huart->Instance == USART2) //**E22 // External serial port @@ -4116,7 +4116,7 @@ void GF_UART_Send_List_Send(struct UARTHandler *handler) 8021ce2: 881b ldrh r3, [r3, #0] memcpy(handler->Tx_Buf, handler->pCurrentUARTSendHadler->Tx_Buf, 8021ce4: 461a mov r2, r3 - 8021ce6: f01e fe03 bl 80408f0 + 8021ce6: f01e fe45 bl 8040974 handler->SendList_Period = handler->pCurrentUARTSendHadler->SendListTimePeriod; 8021cea: 687b ldr r3, [r7, #4] @@ -4172,7 +4172,7 @@ void GF_UART_Send_List_Send(struct UARTHandler *handler) 8021d4c: f503 5380 add.w r3, r3, #4096 ; 0x1000 8021d50: 6b5b ldr r3, [r3, #52] ; 0x34 8021d52: 4618 mov r0, r3 - 8021d54: f01e fdb4 bl 80408c0 + 8021d54: f01e fdf6 bl 8040944 handler->pCurrentUARTSendHadler = temp; 8021d58: 687b ldr r3, [r7, #4] 8021d5a: f503 5380 add.w r3, r3, #4096 ; 0x1000 @@ -4191,7 +4191,7 @@ void GF_UART_Send_List_Send(struct UARTHandler *handler) 8021d68: f503 5380 add.w r3, r3, #4096 ; 0x1000 8021d6c: 6b5b ldr r3, [r3, #52] ; 0x34 8021d6e: 4618 mov r0, r3 - 8021d70: f01e fda6 bl 80408c0 + 8021d70: f01e fde8 bl 8040944 handler->pCurrentUARTSendHadler = NULL; 8021d74: 687b ldr r3, [r7, #4] 8021d76: f503 5380 add.w r3, r3, #4096 ; 0x1000 @@ -4327,7 +4327,7 @@ void Dispatcher_List_Add_t(DispacherController *uartHandler, { uartHandler->pHead = uartHandler->pTail = (Dispatcher*) malloc( 8021e20: 2008 movs r0, #8 - 8021e22: f01e fd45 bl 80408b0 + 8021e22: f01e fd87 bl 8040934 8021e26: 4603 mov r3, r0 8021e28: 461a mov r2, r3 8021e2a: 687b ldr r3, [r7, #4] @@ -4376,7 +4376,7 @@ void Dispatcher_List_Add_t(DispacherController *uartHandler, //临时指针2用于逐个申请内存 pTmp = (Dispatcher*) malloc(sizeof(Dispatcher)); 8021e68: 2008 movs r0, #8 - 8021e6a: f01e fd21 bl 80408b0 + 8021e6a: f01e fd63 bl 8040934 8021e6e: 4603 mov r3, r0 8021e70: 60fb str r3, [r7, #12] pTmp->dispache = dispache; @@ -4447,7 +4447,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, uartHandler->pComHWHead = uartHandler->pComHWTail = (ComHardWare*) malloc(sizeof(ComHardWare)); 8021ec8: 203c movs r0, #60 ; 0x3c - 8021eca: f01e fcf1 bl 80408b0 + 8021eca: f01e fd33 bl 8040934 8021ece: 4603 mov r3, r0 8021ed0: 461a mov r2, r3 uartHandler->pComHWHead = uartHandler->pComHWTail = @@ -4464,7 +4464,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, 8021ee2: 2232 movs r2, #50 ; 0x32 8021ee4: 2100 movs r1, #0 8021ee6: 4618 mov r0, r3 - 8021ee8: f01e fd2a bl 8040940 + 8021ee8: f01e fd6c bl 80409c4 sizeof(uartHandler->pComHWHead->Name)); memcpy(uartHandler->pComHWHead->Name, name, strlen(name)); 8021eec: 68fb ldr r3, [r7, #12] @@ -4476,7 +4476,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, 8021efa: 461a mov r2, r3 8021efc: 68b9 ldr r1, [r7, #8] 8021efe: 4620 mov r0, r4 - 8021f00: f01e fcf6 bl 80408f0 + 8021f00: f01e fd38 bl 8040974 uartHandler->pComHWHead->IsOnline = value; 8021f04: 68fb ldr r3, [r7, #12] 8021f06: 681b ldr r3, [r3, #0] @@ -4498,7 +4498,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, pTmp = (ComHardWare*) malloc(sizeof(ComHardWare)); 8021f20: 203c movs r0, #60 ; 0x3c - 8021f22: f01e fcc5 bl 80408b0 + 8021f22: f01e fd07 bl 8040934 8021f26: 4603 mov r3, r0 8021f28: 617b str r3, [r7, #20] memset(pTmp->Name, '\0', sizeof(pTmp->Name)); @@ -4506,7 +4506,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, 8021f2c: 2232 movs r2, #50 ; 0x32 8021f2e: 2100 movs r1, #0 8021f30: 4618 mov r0, r3 - 8021f32: f01e fd05 bl 8040940 + 8021f32: f01e fd47 bl 80409c4 memcpy(pTmp->Name, name, strlen(name)); 8021f36: 697c ldr r4, [r7, #20] 8021f38: 68b8 ldr r0, [r7, #8] @@ -4515,7 +4515,7 @@ void ComHardWare_List_Add_t(HardWareController *uartHandler, char *name, 8021f40: 461a mov r2, r3 8021f42: 68b9 ldr r1, [r7, #8] 8021f44: 4620 mov r0, r4 - 8021f46: f01e fcd3 bl 80408f0 + 8021f46: f01e fd15 bl 8040974 pTmp->BitFlag = bitFlag; 8021f4a: 697b ldr r3, [r7, #20] @@ -4611,7 +4611,7 @@ void PCOMHardWare_Check_t(HardWareController *uartHandler) 8021fbe: 2232 movs r2, #50 ; 0x32 8021fc0: 2100 movs r1, #0 8021fc2: 4830 ldr r0, [pc, #192] ; (8022084 ) - 8021fc4: f01e fcbc bl 8040940 + 8021fc4: f01e fcfe bl 80409c4 memcpy(str1, ptr->Name, strlen(ptr->Name)); 8021fc8: 68fc ldr r4, [r7, #12] 8021fca: 68fb ldr r3, [r7, #12] @@ -4621,7 +4621,7 @@ void PCOMHardWare_Check_t(HardWareController *uartHandler) 8021fd4: 461a mov r2, r3 8021fd6: 4621 mov r1, r4 8021fd8: 482a ldr r0, [pc, #168] ; (8022084 ) - 8021fda: f01e fc89 bl 80408f0 + 8021fda: f01e fccb bl 8040974 LOGFF(DL_ERROR, "connecting Error %s", ptr->Name); 8021fde: 4b2a ldr r3, [pc, #168] ; (8022088 ) 8021fe0: 781b ldrb r3, [r3, #0] @@ -4726,9 +4726,9 @@ void PCOMHardWare_Check_t(HardWareController *uartHandler) 8022082: bf00 nop 8022084: 24009b5c .word 0x24009b5c 8022088: 24009bb4 .word 0x24009bb4 - 802208c: 08044cbc .word 0x08044cbc - 8022090: 080420dc .word 0x080420dc - 8022094: 080420a8 .word 0x080420a8 + 802208c: 08044d3c .word 0x08044d3c + 8022090: 0804215c .word 0x0804215c + 8022094: 08042128 .word 0x08042128 8022098: 240000fc .word 0x240000fc 0802209c : @@ -4853,12 +4853,12 @@ int32_t read_temperature() HAL_ADC_Start(&hadc2); //开启ADC1 802212e: 4848 ldr r0, [pc, #288] ; (8022250 ) - 8022130: f004 fb6c bl 802680c + 8022130: f004 fbae bl 8026890 if (HAL_ADC_PollForConversion(&hadc2, 100) == HAL_OK) 8022134: 2164 movs r1, #100 ; 0x64 8022136: 4846 ldr r0, [pc, #280] ; (8022250 ) - 8022138: f004 fc66 bl 8026a08 + 8022138: f004 fca8 bl 8026a8c 802213c: 4603 mov r3, r0 802213e: 2b00 cmp r3, #0 8022140: d16c bne.n 802221c @@ -4866,7 +4866,7 @@ int32_t read_temperature() //16 bit resolution adc_value = HAL_ADC_GetValue(&hadc2); 8022142: 4843 ldr r0, [pc, #268] ; (8022250 ) - 8022144: f004 fd54 bl 8026bf0 + 8022144: f004 fd96 bl 8026c74 8022148: 4603 mov r3, r0 802214a: 461a mov r2, r3 802214c: 4b41 ldr r3, [pc, #260] ; (8022254 ) @@ -4874,7 +4874,7 @@ int32_t read_temperature() HAL_ADC_Stop(&hadc2); 8022150: 483f ldr r0, [pc, #252] ; (8022250 ) - 8022152: f004 fc25 bl 80269a0 + 8022152: f004 fc67 bl 8026a24 // 1. 计算热敏电阻两端电压 float voltage = (adc_value / (float) ADC_MAX_VALUE) * VREF; 8022156: 4b3f ldr r3, [pc, #252] ; (8022254 ) @@ -4909,7 +4909,7 @@ int32_t read_temperature() 80221a6: edd7 7a01 vldr s15, [r7, #4] 80221aa: eeb7 7ae7 vcvt.f64.f32 d7, s15 80221ae: eeb0 0b47 vmov.f64 d0, d7 - 80221b2: f01f fdf1 bl 8041d98 + 80221b2: f01f fe31 bl 8041e18 80221b6: eeb0 7b40 vmov.f64 d7, d0 80221ba: eef7 7bc7 vcvt.f32.f64 s15, d7 80221be: edc7 7a01 vstr s15, [r7, #4] @@ -4952,7 +4952,7 @@ int32_t read_temperature() 8022220: 601a str r2, [r3, #0] HAL_ADC_Stop(&hadc2); 8022222: 480b ldr r0, [pc, #44] ; (8022250 ) - 8022224: f004 fbbc bl 80269a0 + 8022224: f004 fbfe bl 8026a24 return 0; 8022228: 2300 movs r3, #0 } @@ -4994,7 +4994,7 @@ void tcp_server_init(uint16_t port) { // 创建TCP控制块 server_pcb = tcp_new_ip_type(IPADDR_TYPE_ANY); 8022272: 202e movs r0, #46 ; 0x2e - 8022274: f017 f89a bl 80393ac + 8022274: f017 f8dc bl 8039430 8022278: 4603 mov r3, r0 802227a: 4a1e ldr r2, [pc, #120] ; (80222f4 ) 802227c: 6013 str r3, [r2, #0] @@ -5012,7 +5012,7 @@ void tcp_server_init(uint16_t port) { 802228a: 88fa ldrh r2, [r7, #6] 802228c: 491a ldr r1, [pc, #104] ; (80222f8 ) 802228e: 4618 mov r0, r3 - 8022290: f015 ffe8 bl 8038264 + 8022290: f016 f82a bl 80382e8 8022294: 4603 mov r3, r0 8022296: 73fb strb r3, [r7, #15] if (err != ERR_OK) { @@ -5024,7 +5024,7 @@ void tcp_server_init(uint16_t port) { 80222a2: 681b ldr r3, [r3, #0] 80222a4: 4619 mov r1, r3 80222a6: 2001 movs r0, #1 - 80222a8: f014 fbb6 bl 8036a18 + 80222a8: f014 fbf8 bl 8036a9c server_pcb = NULL; 80222ac: 4b11 ldr r3, [pc, #68] ; (80222f4 ) 80222ae: 2200 movs r2, #0 @@ -5039,7 +5039,7 @@ void tcp_server_init(uint16_t port) { 80222b6: 681b ldr r3, [r3, #0] 80222b8: 21ff movs r1, #255 ; 0xff 80222ba: 4618 mov r0, r3 - 80222bc: f016 f88a bl 80383d4 + 80222bc: f016 f8cc bl 8038458 80222c0: 4603 mov r3, r0 80222c2: 4a0c ldr r2, [pc, #48] ; (80222f4 ) 80222c4: 6013 str r3, [r2, #0] @@ -5056,14 +5056,14 @@ void tcp_server_init(uint16_t port) { 80222d0: 681b ldr r3, [r3, #0] 80222d2: 490a ldr r1, [pc, #40] ; (80222fc ) 80222d4: 4618 mov r0, r3 - 80222d6: f017 f8dd bl 8039494 + 80222d6: f017 f91f bl 8039518 // 初始化客户端数组 memset(clients, 0, sizeof(clients)); 80222da: 2218 movs r2, #24 80222dc: 2100 movs r1, #0 80222de: 4808 ldr r0, [pc, #32] ; (8022300 ) - 80222e0: f01e fb2e bl 8040940 + 80222e0: f01e fb70 bl 80409c4 80222e4: e002 b.n 80222ec return; 80222e6: bf00 nop @@ -5076,7 +5076,7 @@ void tcp_server_init(uint16_t port) { 80222f0: bd80 pop {r7, pc} 80222f2: bf00 nop 80222f4: 24009bb0 .word 0x24009bb0 - 80222f8: 08044e00 .word 0x08044e00 + 80222f8: 08044e80 .word 0x08044e80 80222fc: 08022305 .word 0x08022305 8022300: 24009b98 .word 0x24009b98 @@ -5132,7 +5132,7 @@ static err_t tcp_accept_cb(void *arg, struct tcp_pcb *newpcb, err_t err) { // 没有可用槽位，拒绝连接 tcp_abort(newpcb); 8022346: 68b8 ldr r0, [r7, #8] - 8022348: f015 ff80 bl 803824c + 8022348: f015 ffc2 bl 80382d0 return ERR_ABRT; 802234c: f06f 030c mvn.w r3, #12 8022350: e01b b.n 802238a @@ -5142,19 +5142,19 @@ static err_t tcp_accept_cb(void *arg, struct tcp_pcb *newpcb, err_t err) { tcp_setprio(newpcb, TCP_PRIO_MIN); 8022352: 2101 movs r1, #1 8022354: 68b8 ldr r0, [r7, #8] - 8022356: f016 fe37 bl 8038fc8 + 8022356: f016 fe79 bl 803904c tcp_recv(newpcb, tcp_recv_cb); 802235a: 490f ldr r1, [pc, #60] ; (8022398 ) 802235c: 68b8 ldr r0, [r7, #8] - 802235e: f017 f833 bl 80393c8 + 802235e: f017 f875 bl 803944c tcp_err(newpcb, tcp_err_cb); 8022362: 490e ldr r1, [pc, #56] ; (802239c ) 8022364: 68b8 ldr r0, [r7, #8] - 8022366: f017 f873 bl 8039450 + 8022366: f017 f8b5 bl 80394d4 tcp_sent(newpcb, tcp_sent_cb); 802236a: 490d ldr r1, [pc, #52] ; (80223a0 ) 802236c: 68b8 ldr r0, [r7, #8] - 802236e: f017 f84d bl 803940c + 802236e: f017 f88f bl 8039490 // 保存客户端信息 clients[free_index].pcb = newpcb; @@ -5233,7 +5233,7 @@ static err_t tcp_recv_cb(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, } tcp_close(tpcb); 80223e6: 68b8 ldr r0, [r7, #8] - 80223e8: f015 fe46 bl 8038078 + 80223e8: f015 fe88 bl 80380fc return ERR_OK; 80223ec: 2300 movs r3, #0 80223ee: e009 b.n 8022404 @@ -5245,10 +5245,10 @@ static err_t tcp_recv_cb(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, 80223f2: 891b ldrh r3, [r3, #8] 80223f4: 4619 mov r1, r3 80223f6: 68b8 ldr r0, [r7, #8] - 80223f8: f016 f902 bl 8038600 + 80223f8: f016 f944 bl 8038684 pbuf_free(p); 80223fc: 6878 ldr r0, [r7, #4] - 80223fe: f015 f99d bl 803773c + 80223fe: f015 f9df bl 80377c0 return ERR_OK; 8022402: 2300 movs r3, #0 @@ -5365,7 +5365,7 @@ void tcp_send_to_all_clients(const char *data, uint16_t len) { 80224a0: 887a ldrh r2, [r7, #2] 80224a2: 2301 movs r3, #1 80224a4: 6879 ldr r1, [r7, #4] - 80224a6: f019 fe8f bl 803c1c8 + 80224a6: f019 fed1 bl 803c24c 80224aa: 4603 mov r3, r0 80224ac: 72fb strb r3, [r7, #11] TCP_WRITE_FLAG_COPY); @@ -5379,7 +5379,7 @@ void tcp_send_to_all_clients(const char *data, uint16_t len) { 80224b8: 68fb ldr r3, [r7, #12] 80224ba: f852 3033 ldr.w r3, [r2, r3, lsl #3] 80224be: 4618 mov r0, r3 - 80224c0: f01a fc6c bl 803cd9c + 80224c0: f01a fcae bl 803ce20 for (int i = 0; i < MAX_CLIENTS; i++) { 80224c4: 68fb ldr r3, [r7, #12] 80224c6: 3301 adds r3, #1 @@ -6158,7 +6158,7 @@ void DLTuc_LogOutVarArgs(DltLogLevel_t Level, uint32_t AppId, uint32_t ContextId 802291c: 693a ldr r2, [r7, #16] 802291e: 6af9 ldr r1, [r7, #44] ; 0x2c 8022920: 4618 mov r0, r3 - 8022922: f01e f991 bl 8040c48 + 8022922: f01e f9d3 bl 8040ccc 8022926: 4603 mov r3, r0 8022928: 83fb strh r3, [r7, #30] va_end(ap); @@ -6386,7 +6386,7 @@ void decode_MK32Data(uint8_t *buffer, uint16_t length) 8022a76: bf00 nop 8022a78: 2400ad04 .word 0x2400ad04 8022a7c: 24000280 .word 0x24000280 - 8022a80: 08042104 .word 0x08042104 + 8022a80: 08042184 .word 0x08042184 8022a84: 00000000 .word 0x00000000 08022a88 : @@ -6931,9 +6931,9 @@ void MK32_Sbus_UART_Handler_intialize(struct UARTHandler* Handler) 8022e80: 2400ad08 .word 0x2400ad08 8022e84: 08022a29 .word 0x08022a29 8022e88: 24000280 .word 0x24000280 - 8022e8c: 08042104 .word 0x08042104 + 8022e8c: 08042184 .word 0x08042184 8022e90: 24009bb4 .word 0x24009bb4 - 8022e94: 08042110 .word 0x08042110 + 8022e94: 08042190 .word 0x08042190 08022e98 : @@ -7027,13 +7027,13 @@ void MX_ADC2_Init(void) 8022f0a: f883 2038 strb.w r2, [r3, #56] ; 0x38 if (HAL_ADC_Init(&hadc2) != HAL_OK) 8022f0e: 4812 ldr r0, [pc, #72] ; (8022f58 ) - 8022f10: f003 fada bl 80264c8 + 8022f10: f003 fb1c bl 802654c 8022f14: 4603 mov r3, r0 8022f16: 2b00 cmp r3, #0 8022f18: d001 beq.n 8022f1e { Error_Handler(); - 8022f1a: f001 fa07 bl 802432c + 8022f1a: f001 fa49 bl 80243b0 } /** Configure Regular Channel @@ -7063,13 +7063,13 @@ void MX_ADC2_Init(void) 8022f3c: 1d3b adds r3, r7, #4 8022f3e: 4619 mov r1, r3 8022f40: 4805 ldr r0, [pc, #20] ; (8022f58 ) - 8022f42: f003 fe63 bl 8026c0c + 8022f42: f003 fea5 bl 8026c90 8022f46: 4603 mov r3, r0 8022f48: 2b00 cmp r3, #0 8022f4a: d001 beq.n 8022f50 { Error_Handler(); - 8022f4c: f001 f9ee bl 802432c + 8022f4c: f001 fa30 bl 80243b0 } /* USER CODE BEGIN ADC2_Init 2 */ @@ -7106,7 +7106,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) 8022f80: 22bc movs r2, #188 ; 0xbc 8022f82: 2100 movs r1, #0 8022f84: 4618 mov r0, r3 - 8022f86: f01d fcdb bl 8040940 + 8022f86: f01d fd1d bl 80409c4 if(adcHandle->Instance==ADC2) 8022f8a: 687b ldr r3, [r7, #4] 8022f8c: 681b ldr r3, [r3, #0] @@ -7151,13 +7151,13 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8022fc2: f107 0310 add.w r3, r7, #16 8022fc6: 4618 mov r0, r3 - 8022fc8: f00c fef2 bl 802fdb0 + 8022fc8: f00c ff34 bl 802fe34 8022fcc: 4603 mov r3, r0 8022fce: 2b00 cmp r3, #0 8022fd0: d001 beq.n 8022fd6 { Error_Handler(); - 8022fd2: f001 f9ab bl 802432c + 8022fd2: f001 f9ed bl 80243b0 } /* ADC2 clock enable */ @@ -7200,7 +7200,7 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) 8023024: f107 03cc add.w r3, r7, #204 ; 0xcc 8023028: 4619 mov r1, r3 802302a: 4805 ldr r0, [pc, #20] ; (8023040 ) - 802302c: f00a fa1e bl 802d46c + 802302c: f00a fa60 bl 802d4f0 /* USER CODE BEGIN ADC2_MspInit 1 */ @@ -7245,10 +7245,10 @@ void MX_BDMA_Init(void) 8023068: 2200 movs r2, #0 802306a: 2100 movs r1, #0 802306c: 2081 movs r0, #129 ; 0x81 - 802306e: f004 fca8 bl 80279c2 + 802306e: f004 fcea bl 8027a46 HAL_NVIC_EnableIRQ(BDMA_Channel0_IRQn); 8023072: 2081 movs r0, #129 ; 0x81 - 8023074: f004 fcbf bl 80279f6 + 8023074: f004 fd01 bl 8027a7a } 8023078: bf00 nop @@ -7287,64 +7287,64 @@ void MX_DMA_Init(void) 80230a8: 2200 movs r2, #0 80230aa: 2100 movs r1, #0 80230ac: 200b movs r0, #11 - 80230ae: f004 fc88 bl 80279c2 + 80230ae: f004 fcca bl 8027a46 HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn); 80230b2: 200b movs r0, #11 - 80230b4: f004 fc9f bl 80279f6 + 80230b4: f004 fce1 bl 8027a7a /* DMA1_Stream1_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 0, 0); 80230b8: 2200 movs r2, #0 80230ba: 2100 movs r1, #0 80230bc: 200c movs r0, #12 - 80230be: f004 fc80 bl 80279c2 + 80230be: f004 fcc2 bl 8027a46 HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); 80230c2: 200c movs r0, #12 - 80230c4: f004 fc97 bl 80279f6 + 80230c4: f004 fcd9 bl 8027a7a /* DMA1_Stream2_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0); 80230c8: 2200 movs r2, #0 80230ca: 2100 movs r1, #0 80230cc: 200d movs r0, #13 - 80230ce: f004 fc78 bl 80279c2 + 80230ce: f004 fcba bl 8027a46 HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn); 80230d2: 200d movs r0, #13 - 80230d4: f004 fc8f bl 80279f6 + 80230d4: f004 fcd1 bl 8027a7a /* DMA1_Stream3_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 0, 0); 80230d8: 2200 movs r2, #0 80230da: 2100 movs r1, #0 80230dc: 200e movs r0, #14 - 80230de: f004 fc70 bl 80279c2 + 80230de: f004 fcb2 bl 8027a46 HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); 80230e2: 200e movs r0, #14 - 80230e4: f004 fc87 bl 80279f6 + 80230e4: f004 fcc9 bl 8027a7a /* DMA1_Stream4_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 0, 0); 80230e8: 2200 movs r2, #0 80230ea: 2100 movs r1, #0 80230ec: 200f movs r0, #15 - 80230ee: f004 fc68 bl 80279c2 + 80230ee: f004 fcaa bl 8027a46 HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn); 80230f2: 200f movs r0, #15 - 80230f4: f004 fc7f bl 80279f6 + 80230f4: f004 fcc1 bl 8027a7a /* DMA1_Stream5_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0); 80230f8: 2200 movs r2, #0 80230fa: 2100 movs r1, #0 80230fc: 2010 movs r0, #16 - 80230fe: f004 fc60 bl 80279c2 + 80230fe: f004 fca2 bl 8027a46 HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); 8023102: 2010 movs r0, #16 - 8023104: f004 fc77 bl 80279f6 + 8023104: f004 fcb9 bl 8027a7a /* DMA1_Stream6_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 0, 0); 8023108: 2200 movs r2, #0 802310a: 2100 movs r1, #0 802310c: 2011 movs r0, #17 - 802310e: f004 fc58 bl 80279c2 + 802310e: f004 fc9a bl 8027a46 HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn); 8023112: 2011 movs r0, #17 - 8023114: f004 fc6f bl 80279f6 + 8023114: f004 fcb1 bl 8027a7a } 8023118: bf00 nop @@ -7579,7 +7579,7 @@ void echo_back_485_1(uint8_t *buffer, uint16_t length) { 80232c4: 887a ldrh r2, [r7, #2] 80232c6: 6879 ldr r1, [r7, #4] 80232c8: 4618 mov r0, r3 - 80232ca: f01d fb11 bl 80408f0 + 80232ca: f01d fb53 bl 8040974 echoHandler_485_1->TxCount = length; 80232ce: 4b0a ldr r3, [pc, #40] ; (80232f8 ) 80232d0: 681b ldr r3, [r3, #0] @@ -7627,7 +7627,7 @@ void echo_back_485_2(uint8_t *buffer, uint16_t length) { 8023318: 887a ldrh r2, [r7, #2] 802331a: 6879 ldr r1, [r7, #4] 802331c: 4618 mov r0, r3 - 802331e: f01d fae7 bl 80408f0 + 802331e: f01d fb29 bl 8040974 echoHandler_485_2->TxCount = length; 8023322: 4b0a ldr r3, [pc, #40] ; (802334c ) 8023324: 681b ldr r3, [r3, #0] @@ -7677,7 +7677,7 @@ void echo_back_485_3(uint8_t *buffer, uint16_t length) { 802336c: 887a ldrh r2, [r7, #2] 802336e: 6879 ldr r1, [r7, #4] 8023370: 4618 mov r0, r3 - 8023372: f01d fabd bl 80408f0 + 8023372: f01d faff bl 8040974 echoHandler_485_3->TxCount = length; 8023376: 4b0a ldr r3, [pc, #40] ; (80233a0 ) 8023378: 681b ldr r3, [r3, #0] @@ -7725,7 +7725,7 @@ void echo_back_485_4(uint8_t *buffer, uint16_t length) { 80233c0: 887a ldrh r2, [r7, #2] 80233c2: 6879 ldr r1, [r7, #4] 80233c4: 4618 mov r0, r3 - 80233c6: f01d fa93 bl 80408f0 + 80233c6: f01d fad5 bl 8040974 echoHandler_485_4->TxCount = length; 80233ca: 4b0a ldr r3, [pc, #40] ; (80233f4 ) 80233cc: 681b ldr r3, [r3, #0] @@ -7775,7 +7775,7 @@ void echo_back_InterCall_DEBUG(uint8_t *buffer, uint16_t length) { 8023414: 887a ldrh r2, [r7, #2] 8023416: 6879 ldr r1, [r7, #4] 8023418: 4618 mov r0, r3 - 802341a: f01d fa69 bl 80408f0 + 802341a: f01d faab bl 8040974 echoHandler_InterCall_DEBUG->TxCount = length; 802341e: 4b0a ldr r3, [pc, #40] ; (8023448 ) 8023420: 681b ldr r3, [r3, #0] @@ -7823,7 +7823,7 @@ void echo_back_Airborne_UART(uint8_t *buffer, uint16_t length) { 8023460: 887a ldrh r2, [r7, #2] 8023462: 6879 ldr r1, [r7, #4] 8023464: 4618 mov r0, r3 - 8023466: f01d fa43 bl 80408f0 + 8023466: f01d fa85 bl 8040974 echoHandler_Airborne_UART->TxCount = length; 802346a: 4b0a ldr r3, [pc, #40] ; (8023494 ) 802346c: 681b ldr r3, [r3, #0] @@ -7870,7 +7870,7 @@ void echo_back_LTE_7S0_Serial(uint8_t *buffer, uint16_t length) { 80234b4: 887a ldrh r2, [r7, #2] 80234b6: 6879 ldr r1, [r7, #4] 80234b8: 4618 mov r0, r3 - 80234ba: f01d fa19 bl 80408f0 + 80234ba: f01d fa5b bl 8040974 echoHandler_LTE_7S0_Serial_UART->TxCount = length; 80234be: 4b0a ldr r3, [pc, #40] ; (80234e8 ) 80234c0: 681b ldr r3, [r3, #0] @@ -7914,7 +7914,7 @@ void echo_back_LPUART1(uint8_t *buffer, uint16_t length) { 8023500: 887a ldrh r2, [r7, #2] 8023502: 6879 ldr r1, [r7, #4] 8023504: 4618 mov r0, r3 - 8023506: f01d f9f3 bl 80408f0 + 8023506: f01d fa35 bl 8040974 echoHandler_LPUART1->TxCount = length; 802350a: 4b0a ldr r3, [pc, #40] ; (8023534 ) 802350c: 681b ldr r3, [r3, #0] @@ -7960,7 +7960,7 @@ void echo_back_CANFD_1(uint32_t canID, uint8_t *buffer, uint32_t length) { 8023550: 687a ldr r2, [r7, #4] 8023552: 68b9 ldr r1, [r7, #8] 8023554: 4618 mov r0, r3 - 8023556: f01d f9cb bl 80408f0 + 8023556: f01d fa0d bl 8040974 echo_CANFD_1->AddCANSendList(echo_CANFD_1, 0x01, length, 802355a: 4b0a ldr r3, [pc, #40] ; (8023584 ) 802355c: 681b ldr r3, [r3, #0] @@ -8009,7 +8009,7 @@ void echo_back_CANFD_2(uint32_t canID, uint8_t *buffer, uint32_t length) { 80235a0: 687a ldr r2, [r7, #4] 80235a2: 68b9 ldr r1, [r7, #8] 80235a4: 4618 mov r0, r3 - 80235a6: f01d f9a3 bl 80408f0 + 80235a6: f01d f9e5 bl 8040974 echo_CANFD_2->AddCANSendList(echo_CANFD_2, 0x02, length, 80235aa: 4b0a ldr r3, [pc, #40] ; (80235d4 ) 80235ac: 681b ldr r3, [r3, #0] @@ -8167,13 +8167,13 @@ void MX_FDCAN1_Init(void) 8023682: 669a str r2, [r3, #104] ; 0x68 if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK) 8023684: 4804 ldr r0, [pc, #16] ; (8023698 ) - 8023686: f008 fda3 bl 802c1d0 + 8023686: f008 fde5 bl 802c254 802368a: 4603 mov r3, r0 802368c: 2b00 cmp r3, #0 802368e: d001 beq.n 8023694 { Error_Handler(); - 8023690: f000 fe4c bl 802432c + 8023690: f000 fe8e bl 80243b0 } /* USER CODE BEGIN FDCAN1_Init 2 */ @@ -8310,13 +8310,13 @@ void MX_FDCAN2_Init(void) 802374a: 669a str r2, [r3, #104] ; 0x68 if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK) 802374c: 4804 ldr r0, [pc, #16] ; (8023760 ) - 802374e: f008 fd3f bl 802c1d0 + 802374e: f008 fd81 bl 802c254 8023752: 4603 mov r3, r0 8023754: 2b00 cmp r3, #0 8023756: d001 beq.n 802375c { Error_Handler(); - 8023758: f000 fde8 bl 802432c + 8023758: f000 fe2a bl 80243b0 } /* USER CODE BEGIN FDCAN2_Init 2 */ @@ -8352,7 +8352,7 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) 8023784: 22bc movs r2, #188 ; 0xbc 8023786: 2100 movs r1, #0 8023788: 4618 mov r0, r3 - 802378a: f01d f8d9 bl 8040940 + 802378a: f01d f91b bl 80409c4 if(fdcanHandle->Instance==FDCAN1) 802378e: 687b ldr r3, [r7, #4] 8023790: 681b ldr r3, [r3, #0] @@ -8373,13 +8373,13 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 80237a6: f107 0318 add.w r3, r7, #24 80237aa: 4618 mov r0, r3 - 80237ac: f00c fb00 bl 802fdb0 + 80237ac: f00c fb42 bl 802fe34 80237b0: 4603 mov r3, r0 80237b2: 2b00 cmp r3, #0 80237b4: d001 beq.n 80237ba { Error_Handler(); - 80237b6: f000 fdb9 bl 802432c + 80237b6: f000 fdfb bl 80243b0 } /* FDCAN1 clock enable */ @@ -8441,17 +8441,17 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) 8023828: f107 03d4 add.w r3, r7, #212 ; 0xd4 802382c: 4619 mov r1, r3 802382e: 4838 ldr r0, [pc, #224] ; (8023910 ) - 8023830: f009 fe1c bl 802d46c + 8023830: f009 fe5e bl 802d4f0 /* FDCAN1 interrupt Init */ HAL_NVIC_SetPriority(FDCAN1_IT0_IRQn, 0, 0); 8023834: 2200 movs r2, #0 8023836: 2100 movs r1, #0 8023838: 2013 movs r0, #19 - 802383a: f004 f8c2 bl 80279c2 + 802383a: f004 f904 bl 8027a46 HAL_NVIC_EnableIRQ(FDCAN1_IT0_IRQn); 802383e: 2013 movs r0, #19 - 8023840: f004 f8d9 bl 80279f6 + 8023840: f004 f91b bl 8027a7a HAL_NVIC_EnableIRQ(FDCAN2_IT0_IRQn); /* USER CODE BEGIN FDCAN2_MspInit 1 */ @@ -8474,12 +8474,12 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 802385e: f107 0318 add.w r3, r7, #24 8023862: 4618 mov r0, r3 - 8023864: f00c faa4 bl 802fdb0 + 8023864: f00c fae6 bl 802fe34 8023868: 4603 mov r3, r0 802386a: 2b00 cmp r3, #0 802386c: d001 beq.n 8023872 Error_Handler(); - 802386e: f000 fd5d bl 802432c + 802386e: f000 fd9f bl 80243b0 HAL_RCC_FDCAN_CLK_ENABLED++; 8023872: 4b25 ldr r3, [pc, #148] ; (8023908 ) 8023874: 681b ldr r3, [r3, #0] @@ -8532,15 +8532,15 @@ void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef* fdcanHandle) 80238de: f107 03d4 add.w r3, r7, #212 ; 0xd4 80238e2: 4619 mov r1, r3 80238e4: 480a ldr r0, [pc, #40] ; (8023910 ) - 80238e6: f009 fdc1 bl 802d46c + 80238e6: f009 fe03 bl 802d4f0 HAL_NVIC_SetPriority(FDCAN2_IT0_IRQn, 0, 0); 80238ea: 2200 movs r2, #0 80238ec: 2100 movs r1, #0 80238ee: 2014 movs r0, #20 - 80238f0: f004 f867 bl 80279c2 + 80238f0: f004 f8a9 bl 8027a46 HAL_NVIC_EnableIRQ(FDCAN2_IT0_IRQn); 80238f4: 2014 movs r0, #20 - 80238f6: f004 f87e bl 80279f6 + 80238f6: f004 f8c0 bl 8027a7a } 80238fa: bf00 nop 80238fc: 37e8 adds r7, #232 ; 0xe8 @@ -8646,7 +8646,7 @@ void MX_GPIO_Init(void) 80239e2: 2201 movs r2, #1 80239e4: 217d movs r1, #125 ; 0x7d 80239e6: 484d ldr r0, [pc, #308] ; (8023b1c ) - 80239e8: f009 fef0 bl 802d7cc + 80239e8: f009 ff32 bl 802d850 |M_OUT8_Pin|M_OUT2_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ @@ -8654,35 +8654,35 @@ void MX_GPIO_Init(void) 80239ec: 2201 movs r2, #1 80239ee: f242 0104 movw r1, #8196 ; 0x2004 80239f2: 484b ldr r0, [pc, #300] ; (8023b20 ) - 80239f4: f009 feea bl 802d7cc + 80239f4: f009 ff2c bl 802d850 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, S0_RESET_Pin|RS485_3_DIR_Pin|RS485_4_DIR_Pin|E22_RST_Pin, GPIO_PIN_RESET); 80239f8: 2200 movs r2, #0 80239fa: f240 7101 movw r1, #1793 ; 0x701 80239fe: 4848 ldr r0, [pc, #288] ; (8023b20 ) - 8023a00: f009 fee4 bl 802d7cc + 8023a00: f009 ff26 bl 802d850 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(ETH_RST_GPIO_Port, ETH_RST_Pin, GPIO_PIN_RESET); 8023a04: 2200 movs r2, #0 8023a06: 2140 movs r1, #64 ; 0x40 8023a08: 4846 ldr r0, [pc, #280] ; (8023b24 ) - 8023a0a: f009 fedf bl 802d7cc + 8023a0a: f009 ff21 bl 802d850 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, EEPROM_WP_Pin|EEPROM_SCL_Pin, GPIO_PIN_RESET); 8023a0e: 2200 movs r2, #0 8023a10: f44f 51c0 mov.w r1, #6144 ; 0x1800 8023a14: 4841 ldr r0, [pc, #260] ; (8023b1c ) - 8023a16: f009 fed9 bl 802d7cc + 8023a16: f009 ff1b bl 802d850 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, RS485_1_DIR_Pin|RS485_2_DIR_Pin|E28_M0_Pin|E28_M1_Pin 8023a1a: 2200 movs r2, #0 8023a1c: f640 410b movw r1, #3083 ; 0xc0b 8023a20: 4841 ldr r0, [pc, #260] ; (8023b28 ) - 8023a22: f009 fed3 bl 802d7cc + 8023a22: f009 ff15 bl 802d850 |E28_M2_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ @@ -8690,7 +8690,7 @@ void MX_GPIO_Init(void) 8023a26: 2201 movs r2, #1 8023a28: 2110 movs r1, #16 8023a2a: 4840 ldr r0, [pc, #256] ; (8023b2c ) - 8023a2c: f009 fece bl 802d7cc + 8023a2c: f009 ff10 bl 802d850 /*Configure GPIO pins : PEPin PEPin PEPin PEPin PEPin PEPin PEPin PEPin */ @@ -8711,7 +8711,7 @@ void MX_GPIO_Init(void) 8023a42: f107 031c add.w r3, r7, #28 8023a46: 4619 mov r1, r3 8023a48: 4834 ldr r0, [pc, #208] ; (8023b1c ) - 8023a4a: f009 fd0f bl 802d46c + 8023a4a: f009 fd51 bl 802d4f0 /*Configure GPIO pins : PCPin PCPin PCPin PCPin PCPin PCPin */ @@ -8732,7 +8732,7 @@ void MX_GPIO_Init(void) 8023a60: f107 031c add.w r3, r7, #28 8023a64: 4619 mov r1, r3 8023a66: 482e ldr r0, [pc, #184] ; (8023b20 ) - 8023a68: f009 fd00 bl 802d46c + 8023a68: f009 fd42 bl 802d4f0 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = ETH_RST_Pin; @@ -8751,7 +8751,7 @@ void MX_GPIO_Init(void) 8023a7c: f107 031c add.w r3, r7, #28 8023a80: 4619 mov r1, r3 8023a82: 4828 ldr r0, [pc, #160] ; (8023b24 ) - 8023a84: f009 fcf2 bl 802d46c + 8023a84: f009 fd34 bl 802d4f0 /*Configure GPIO pins : PEPin PEPin */ GPIO_InitStruct.Pin = EEPROM_SDA_Pin|M_IN2_Pin; @@ -8767,7 +8767,7 @@ void MX_GPIO_Init(void) 8023a96: f107 031c add.w r3, r7, #28 8023a9a: 4619 mov r1, r3 8023a9c: 481f ldr r0, [pc, #124] ; (8023b1c ) - 8023a9e: f009 fce5 bl 802d46c + 8023a9e: f009 fd27 bl 802d4f0 /*Configure GPIO pins : PDPin PDPin PDPin PDPin PDPin */ @@ -8788,7 +8788,7 @@ void MX_GPIO_Init(void) 8023ab4: f107 031c add.w r3, r7, #28 8023ab8: 4619 mov r1, r3 8023aba: 481b ldr r0, [pc, #108] ; (8023b28 ) - 8023abc: f009 fcd6 bl 802d46c + 8023abc: f009 fd18 bl 802d4f0 /*Configure GPIO pins : PD14 PDPin */ GPIO_InitStruct.Pin = GPIO_PIN_14|E28_AUX_Pin; @@ -8804,7 +8804,7 @@ void MX_GPIO_Init(void) 8023ad0: f107 031c add.w r3, r7, #28 8023ad4: 4619 mov r1, r3 8023ad6: 4814 ldr r0, [pc, #80] ; (8023b28 ) - 8023ad8: f009 fcc8 bl 802d46c + 8023ad8: f009 fd0a bl 802d4f0 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = M_OUT1_Pin; @@ -8823,7 +8823,7 @@ void MX_GPIO_Init(void) 8023aec: f107 031c add.w r3, r7, #28 8023af0: 4619 mov r1, r3 8023af2: 480e ldr r0, [pc, #56] ; (8023b2c ) - 8023af4: f009 fcba bl 802d46c + 8023af4: f009 fcfc bl 802d4f0 /*Configure GPIO pin : PtPin */ GPIO_InitStruct.Pin = M_IN1_Pin; @@ -8839,7 +8839,7 @@ void MX_GPIO_Init(void) 8023b04: f107 031c add.w r3, r7, #28 8023b08: 4619 mov r1, r3 8023b0a: 4808 ldr r0, [pc, #32] ; (8023b2c ) - 8023b0c: f009 fcae bl 802d46c + 8023b0c: f009 fcf0 bl 802d4f0 } 8023b10: bf00 nop @@ -8905,13 +8905,13 @@ void MX_I2C4_Init(void) 8023b68: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c4) != HAL_OK) 8023b6a: 480e ldr r0, [pc, #56] ; (8023ba4 ) - 8023b6c: f009 fe62 bl 802d834 + 8023b6c: f009 fea4 bl 802d8b8 8023b70: 4603 mov r3, r0 8023b72: 2b00 cmp r3, #0 8023b74: d001 beq.n 8023b7a { Error_Handler(); - 8023b76: f000 fbd9 bl 802432c + 8023b76: f000 fc1b bl 80243b0 } /** Configure Analogue filter @@ -8919,13 +8919,13 @@ void MX_I2C4_Init(void) if (HAL_I2CEx_ConfigAnalogFilter(&hi2c4, I2C_ANALOGFILTER_ENABLE) != HAL_OK) 8023b7a: 2100 movs r1, #0 8023b7c: 4809 ldr r0, [pc, #36] ; (8023ba4 ) - 8023b7e: f00a fd6e bl 802e65e + 8023b7e: f00a fdb0 bl 802e6e2 8023b82: 4603 mov r3, r0 8023b84: 2b00 cmp r3, #0 8023b86: d001 beq.n 8023b8c { Error_Handler(); - 8023b88: f000 fbd0 bl 802432c + 8023b88: f000 fc12 bl 80243b0 } /** Configure Digital filter @@ -8933,13 +8933,13 @@ void MX_I2C4_Init(void) if (HAL_I2CEx_ConfigDigitalFilter(&hi2c4, 0) != HAL_OK) 8023b8c: 2100 movs r1, #0 8023b8e: 4805 ldr r0, [pc, #20] ; (8023ba4 ) - 8023b90: f00a fdb0 bl 802e6f4 + 8023b90: f00a fdf2 bl 802e778 8023b94: 4603 mov r3, r0 8023b96: 2b00 cmp r3, #0 8023b98: d001 beq.n 8023b9e { Error_Handler(); - 8023b9a: f000 fbc7 bl 802432c + 8023b9a: f000 fc09 bl 80243b0 } /* USER CODE BEGIN I2C4_Init 2 */ @@ -8975,7 +8975,7 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) 8023bcc: 22bc movs r2, #188 ; 0xbc 8023bce: 2100 movs r1, #0 8023bd0: 4618 mov r0, r3 - 8023bd2: f01c feb5 bl 8040940 + 8023bd2: f01c fef7 bl 80409c4 if(i2cHandle->Instance==I2C4) 8023bd6: 687b ldr r3, [r7, #4] 8023bd8: 681b ldr r3, [r3, #0] @@ -8996,13 +8996,13 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8023bea: f107 0310 add.w r3, r7, #16 8023bee: 4618 mov r0, r3 - 8023bf0: f00c f8de bl 802fdb0 + 8023bf0: f00c f920 bl 802fe34 8023bf4: 4603 mov r3, r0 8023bf6: 2b00 cmp r3, #0 8023bf8: d001 beq.n 8023bfe { Error_Handler(); - 8023bfa: f000 fb97 bl 802432c + 8023bfa: f000 fbd9 bl 80243b0 } __HAL_RCC_GPIOD_CLK_ENABLE(); @@ -9039,7 +9039,7 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) 8023c3c: f107 03cc add.w r3, r7, #204 ; 0xcc 8023c40: 4619 mov r1, r3 8023c42: 4815 ldr r0, [pc, #84] ; (8023c98 ) - 8023c44: f009 fc12 bl 802d46c + 8023c44: f009 fc54 bl 802d4f0 /* I2C4 clock enable */ __HAL_RCC_I2C4_CLK_ENABLE(); @@ -9059,18 +9059,18 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) 8023c66: 2200 movs r2, #0 8023c68: 2100 movs r1, #0 8023c6a: 205f movs r0, #95 ; 0x5f - 8023c6c: f003 fea9 bl 80279c2 + 8023c6c: f003 feeb bl 8027a46 HAL_NVIC_EnableIRQ(I2C4_EV_IRQn); 8023c70: 205f movs r0, #95 ; 0x5f - 8023c72: f003 fec0 bl 80279f6 + 8023c72: f003 ff02 bl 8027a7a HAL_NVIC_SetPriority(I2C4_ER_IRQn, 0, 0); 8023c76: 2200 movs r2, #0 8023c78: 2100 movs r1, #0 8023c7a: 2060 movs r0, #96 ; 0x60 - 8023c7c: f003 fea1 bl 80279c2 + 8023c7c: f003 fee3 bl 8027a46 HAL_NVIC_EnableIRQ(I2C4_ER_IRQn); 8023c80: 2060 movs r0, #96 ; 0x60 - 8023c82: f003 feb8 bl 80279f6 + 8023c82: f003 fefa bl 8027a7a /* USER CODE BEGIN I2C4_MspInit 1 */ /* USER CODE END I2C4_MspInit 1 */ @@ -9085,18905 +9085,18945 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) 8023c94: 58024400 .word 0x58024400 8023c98: 58020c00 .word 0x58020c00 -08023c9c

: +08023c9c : + +ACT_STATE g_state = ACT_UP; +uint32_t g_tick = 0; + +void Actuator_Start(void) /*初始化*/ +{ + 8023c9c: b580 push {r7, lr} + 8023c9e: af00 add r7, sp, #0 + g_state = ACT_UP; + 8023ca0: 4b08 ldr r3, [pc, #32] ; (8023cc4 ) + 8023ca2: 2200 movs r2, #0 + 8023ca4: 701a strb r2, [r3, #0] + g_tick = HAL_GetTick(); + 8023ca6: f002 f9cf bl 8026048 + 8023caa: 4603 mov r3, r0 + 8023cac: 4a06 ldr r2, [pc, #24] ; (8023cc8 ) + 8023cae: 6013 str r3, [r2, #0] + + GF_BSP_GPIO_SetIO(7,1); + 8023cb0: 2101 movs r1, #1 + 8023cb2: 2007 movs r0, #7 + 8023cb4: f7fd fa7a bl 80211ac + GF_BSP_GPIO_SetIO(8,0); + 8023cb8: 2100 movs r1, #0 + 8023cba: 2008 movs r0, #8 + 8023cbc: f7fd fa76 bl 80211ac +} + 8023cc0: bf00 nop + 8023cc2: bd80 pop {r7, pc} + 8023cc4: 2400af28 .word 0x2400af28 + 8023cc8: 2400af2c .word 0x2400af2c + +08023ccc : +void Actuator_Task(void) /*实现不阻塞延时*/ +{ + 8023ccc: b580 push {r7, lr} + 8023cce: af00 add r7, sp, #0 + if(HAL_GetTick() - g_tick < 2000) + 8023cd0: f002 f9ba bl 8026048 + 8023cd4: 4602 mov r2, r0 + 8023cd6: 4b26 ldr r3, [pc, #152] ; (8023d70 ) + 8023cd8: 681b ldr r3, [r3, #0] + 8023cda: 1ad3 subs r3, r2, r3 + 8023cdc: f5b3 6ffa cmp.w r3, #2000 ; 0x7d0 + 8023ce0: d344 bcc.n 8023d6c + return; + + g_tick = HAL_GetTick(); + 8023ce2: f002 f9b1 bl 8026048 + 8023ce6: 4603 mov r3, r0 + 8023ce8: 4a21 ldr r2, [pc, #132] ; (8023d70 ) + 8023cea: 6013 str r3, [r2, #0] + + switch(g_state) + 8023cec: 4b21 ldr r3, [pc, #132] ; (8023d74 ) + 8023cee: 781b ldrb r3, [r3, #0] + 8023cf0: 2b03 cmp r3, #3 + 8023cf2: d83c bhi.n 8023d6e + 8023cf4: a201 add r2, pc, #4 ; (adr r2, 8023cfc ) + 8023cf6: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8023cfa: bf00 nop + 8023cfc: 08023d0d .word 0x08023d0d + 8023d00: 08023d25 .word 0x08023d25 + 8023d04: 08023d3d .word 0x08023d3d + 8023d08: 08023d55 .word 0x08023d55 + { + case ACT_UP: + // 上升 + GF_BSP_GPIO_SetIO(7,1); + 8023d0c: 2101 movs r1, #1 + 8023d0e: 2007 movs r0, #7 + 8023d10: f7fd fa4c bl 80211ac + GF_BSP_GPIO_SetIO(8,0); + 8023d14: 2100 movs r1, #0 + 8023d16: 2008 movs r0, #8 + 8023d18: f7fd fa48 bl 80211ac + g_state = ACT_STOP1; + 8023d1c: 4b15 ldr r3, [pc, #84] ; (8023d74 ) + 8023d1e: 2201 movs r2, #1 + 8023d20: 701a strb r2, [r3, #0] + break; + 8023d22: e024 b.n 8023d6e + + case ACT_STOP1: + // 停止 + GF_BSP_GPIO_SetIO(7,1); + 8023d24: 2101 movs r1, #1 + 8023d26: 2007 movs r0, #7 + 8023d28: f7fd fa40 bl 80211ac + GF_BSP_GPIO_SetIO(8,1); + 8023d2c: 2101 movs r1, #1 + 8023d2e: 2008 movs r0, #8 + 8023d30: f7fd fa3c bl 80211ac + g_state = ACT_DOWN; + 8023d34: 4b0f ldr r3, [pc, #60] ; (8023d74 ) + 8023d36: 2202 movs r2, #2 + 8023d38: 701a strb r2, [r3, #0] + break; + 8023d3a: e018 b.n 8023d6e + + case ACT_DOWN: + // 下降 + GF_BSP_GPIO_SetIO(7,0); + 8023d3c: 2100 movs r1, #0 + 8023d3e: 2007 movs r0, #7 + 8023d40: f7fd fa34 bl 80211ac + GF_BSP_GPIO_SetIO(8,1); + 8023d44: 2101 movs r1, #1 + 8023d46: 2008 movs r0, #8 + 8023d48: f7fd fa30 bl 80211ac + g_state = ACT_STOP2; + 8023d4c: 4b09 ldr r3, [pc, #36] ; (8023d74 ) + 8023d4e: 2203 movs r2, #3 + 8023d50: 701a strb r2, [r3, #0] + break; + 8023d52: e00c b.n 8023d6e + + case ACT_STOP2: + // 停止 + GF_BSP_GPIO_SetIO(7,1); + 8023d54: 2101 movs r1, #1 + 8023d56: 2007 movs r0, #7 + 8023d58: f7fd fa28 bl 80211ac + GF_BSP_GPIO_SetIO(8,1); + 8023d5c: 2101 movs r1, #1 + 8023d5e: 2008 movs r0, #8 + 8023d60: f7fd fa24 bl 80211ac + + // 如果只执行一轮 + // return; + + // 如果一直循环 + g_state = ACT_UP; + 8023d64: 4b03 ldr r3, [pc, #12] ; (8023d74 ) + 8023d66: 2200 movs r2, #0 + 8023d68: 701a strb r2, [r3, #0] + break; + 8023d6a: e000 b.n 8023d6e + return; + 8023d6c: bf00 nop + } +} + 8023d6e: bd80 pop {r7, pc} + 8023d70: 2400af2c .word 0x2400af2c + 8023d74: 2400af28 .word 0x2400af28 + +08023d78
: /** * @brief The application entry point. * @retval int */ int main(void) { - 8023c9c: b5b0 push {r4, r5, r7, lr} - 8023c9e: f5ad 7d0e sub.w sp, sp, #568 ; 0x238 - 8023ca2: af0e add r7, sp, #56 ; 0x38 + 8023d78: b5b0 push {r4, r5, r7, lr} + 8023d7a: f5ad 7d0e sub.w sp, sp, #568 ; 0x238 + 8023d7e: af0e add r7, sp, #56 ; 0x38 /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MPU Configuration--------------------------------------------------------*/ MPU_Config(); - 8023ca4: f000 faf4 bl 8024290 + 8023d80: f000 fac8 bl 8024314 if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */ - 8023ca8: 4b36 ldr r3, [pc, #216] ; (8023d84 ) - 8023caa: 695b ldr r3, [r3, #20] - 8023cac: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8023cb0: 2b00 cmp r3, #0 - 8023cb2: d11b bne.n 8023cec + 8023d84: 4b36 ldr r3, [pc, #216] ; (8023e60 ) + 8023d86: 695b ldr r3, [r3, #20] + 8023d88: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8023d8c: 2b00 cmp r3, #0 + 8023d8e: d11b bne.n 8023dc8 __ASM volatile ("dsb 0xF":::"memory"); - 8023cb4: f3bf 8f4f dsb sy + 8023d90: f3bf 8f4f dsb sy } - 8023cb8: bf00 nop + 8023d94: bf00 nop __ASM volatile ("isb 0xF":::"memory"); - 8023cba: f3bf 8f6f isb sy + 8023d96: f3bf 8f6f isb sy } - 8023cbe: bf00 nop + 8023d9a: bf00 nop SCB->ICIALLU = 0UL; /* invalidate I-Cache */ - 8023cc0: 4b30 ldr r3, [pc, #192] ; (8023d84 ) - 8023cc2: 2200 movs r2, #0 - 8023cc4: f8c3 2250 str.w r2, [r3, #592] ; 0x250 + 8023d9c: 4b30 ldr r3, [pc, #192] ; (8023e60 ) + 8023d9e: 2200 movs r2, #0 + 8023da0: f8c3 2250 str.w r2, [r3, #592] ; 0x250 __ASM volatile ("dsb 0xF":::"memory"); - 8023cc8: f3bf 8f4f dsb sy + 8023da4: f3bf 8f4f dsb sy } - 8023ccc: bf00 nop + 8023da8: bf00 nop __ASM volatile ("isb 0xF":::"memory"); - 8023cce: f3bf 8f6f isb sy + 8023daa: f3bf 8f6f isb sy } - 8023cd2: bf00 nop + 8023dae: bf00 nop SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */ - 8023cd4: 4b2b ldr r3, [pc, #172] ; (8023d84 ) - 8023cd6: 695b ldr r3, [r3, #20] - 8023cd8: 4a2a ldr r2, [pc, #168] ; (8023d84 ) - 8023cda: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8023cde: 6153 str r3, [r2, #20] + 8023db0: 4b2b ldr r3, [pc, #172] ; (8023e60 ) + 8023db2: 695b ldr r3, [r3, #20] + 8023db4: 4a2a ldr r2, [pc, #168] ; (8023e60 ) + 8023db6: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8023dba: 6153 str r3, [r2, #20] __ASM volatile ("dsb 0xF":::"memory"); - 8023ce0: f3bf 8f4f dsb sy + 8023dbc: f3bf 8f4f dsb sy } - 8023ce4: bf00 nop + 8023dc0: bf00 nop __ASM volatile ("isb 0xF":::"memory"); - 8023ce6: f3bf 8f6f isb sy + 8023dc2: f3bf 8f6f isb sy } - 8023cea: e000 b.n 8023cee + 8023dc6: e000 b.n 8023dca if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */ - 8023cec: bf00 nop + 8023dc8: bf00 nop if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */ - 8023cee: 4b25 ldr r3, [pc, #148] ; (8023d84 ) - 8023cf0: 695b ldr r3, [r3, #20] - 8023cf2: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8023cf6: 2b00 cmp r3, #0 - 8023cf8: d146 bne.n 8023d88 + 8023dca: 4b25 ldr r3, [pc, #148] ; (8023e60 ) + 8023dcc: 695b ldr r3, [r3, #20] + 8023dce: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8023dd2: 2b00 cmp r3, #0 + 8023dd4: d146 bne.n 8023e64 SCB->CSSELR = 0U; /* select Level 1 data cache */ - 8023cfa: 4b22 ldr r3, [pc, #136] ; (8023d84 ) - 8023cfc: 2200 movs r2, #0 - 8023cfe: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8023dd6: 4b22 ldr r3, [pc, #136] ; (8023e60 ) + 8023dd8: 2200 movs r2, #0 + 8023dda: f8c3 2084 str.w r2, [r3, #132] ; 0x84 __ASM volatile ("dsb 0xF":::"memory"); - 8023d02: f3bf 8f4f dsb sy + 8023dde: f3bf 8f4f dsb sy } - 8023d06: bf00 nop + 8023de2: bf00 nop ccsidr = SCB->CCSIDR; - 8023d08: 4b1e ldr r3, [pc, #120] ; (8023d84 ) - 8023d0a: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 8023d0e: f8c7 31fc str.w r3, [r7, #508] ; 0x1fc + 8023de4: 4b1e ldr r3, [pc, #120] ; (8023e60 ) + 8023de6: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 8023dea: f8c7 31fc str.w r3, [r7, #508] ; 0x1fc sets = (uint32_t)(CCSIDR_SETS(ccsidr)); - 8023d12: f8d7 31fc ldr.w r3, [r7, #508] ; 0x1fc - 8023d16: 0b5b lsrs r3, r3, #13 - 8023d18: f3c3 030e ubfx r3, r3, #0, #15 - 8023d1c: f8c7 31f8 str.w r3, [r7, #504] ; 0x1f8 + 8023dee: f8d7 31fc ldr.w r3, [r7, #508] ; 0x1fc + 8023df2: 0b5b lsrs r3, r3, #13 + 8023df4: f3c3 030e ubfx r3, r3, #0, #15 + 8023df8: f8c7 31f8 str.w r3, [r7, #504] ; 0x1f8 ways = (uint32_t)(CCSIDR_WAYS(ccsidr)); - 8023d20: f8d7 31fc ldr.w r3, [r7, #508] ; 0x1fc - 8023d24: 08db lsrs r3, r3, #3 - 8023d26: f3c3 0309 ubfx r3, r3, #0, #10 - 8023d2a: f8c7 31f4 str.w r3, [r7, #500] ; 0x1f4 + 8023dfc: f8d7 31fc ldr.w r3, [r7, #508] ; 0x1fc + 8023e00: 08db lsrs r3, r3, #3 + 8023e02: f3c3 0309 ubfx r3, r3, #0, #10 + 8023e06: f8c7 31f4 str.w r3, [r7, #500] ; 0x1f4 SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - 8023d2e: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 8023d32: 015a lsls r2, r3, #5 - 8023d34: f643 73e0 movw r3, #16352 ; 0x3fe0 - 8023d38: 4013 ands r3, r2 + 8023e0a: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 + 8023e0e: 015a lsls r2, r3, #5 + 8023e10: f643 73e0 movw r3, #16352 ; 0x3fe0 + 8023e14: 4013 ands r3, r2 ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) ); - 8023d3a: f8d7 21f4 ldr.w r2, [r7, #500] ; 0x1f4 - 8023d3e: 0792 lsls r2, r2, #30 + 8023e16: f8d7 21f4 ldr.w r2, [r7, #500] ; 0x1f4 + 8023e1a: 0792 lsls r2, r2, #30 SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) | - 8023d40: 4910 ldr r1, [pc, #64] ; (8023d84 ) - 8023d42: 4313 orrs r3, r2 - 8023d44: f8c1 3260 str.w r3, [r1, #608] ; 0x260 + 8023e1c: 4910 ldr r1, [pc, #64] ; (8023e60 ) + 8023e1e: 4313 orrs r3, r2 + 8023e20: f8c1 3260 str.w r3, [r1, #608] ; 0x260 } while (ways-- != 0U); - 8023d48: f8d7 31f4 ldr.w r3, [r7, #500] ; 0x1f4 - 8023d4c: 1e5a subs r2, r3, #1 - 8023d4e: f8c7 21f4 str.w r2, [r7, #500] ; 0x1f4 - 8023d52: 2b00 cmp r3, #0 - 8023d54: d1eb bne.n 8023d2e + 8023e24: f8d7 31f4 ldr.w r3, [r7, #500] ; 0x1f4 + 8023e28: 1e5a subs r2, r3, #1 + 8023e2a: f8c7 21f4 str.w r2, [r7, #500] ; 0x1f4 + 8023e2e: 2b00 cmp r3, #0 + 8023e30: d1eb bne.n 8023e0a } while(sets-- != 0U); - 8023d56: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 - 8023d5a: 1e5a subs r2, r3, #1 - 8023d5c: f8c7 21f8 str.w r2, [r7, #504] ; 0x1f8 - 8023d60: 2b00 cmp r3, #0 - 8023d62: d1dd bne.n 8023d20 + 8023e32: f8d7 31f8 ldr.w r3, [r7, #504] ; 0x1f8 + 8023e36: 1e5a subs r2, r3, #1 + 8023e38: f8c7 21f8 str.w r2, [r7, #504] ; 0x1f8 + 8023e3c: 2b00 cmp r3, #0 + 8023e3e: d1dd bne.n 8023dfc __ASM volatile ("dsb 0xF":::"memory"); - 8023d64: f3bf 8f4f dsb sy + 8023e40: f3bf 8f4f dsb sy } - 8023d68: bf00 nop + 8023e44: bf00 nop SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */ - 8023d6a: 4b06 ldr r3, [pc, #24] ; (8023d84 ) - 8023d6c: 695b ldr r3, [r3, #20] - 8023d6e: 4a05 ldr r2, [pc, #20] ; (8023d84 ) - 8023d70: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8023d74: 6153 str r3, [r2, #20] + 8023e46: 4b06 ldr r3, [pc, #24] ; (8023e60 ) + 8023e48: 695b ldr r3, [r3, #20] + 8023e4a: 4a05 ldr r2, [pc, #20] ; (8023e60 ) + 8023e4c: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8023e50: 6153 str r3, [r2, #20] __ASM volatile ("dsb 0xF":::"memory"); - 8023d76: f3bf 8f4f dsb sy + 8023e52: f3bf 8f4f dsb sy } - 8023d7a: bf00 nop + 8023e56: bf00 nop __ASM volatile ("isb 0xF":::"memory"); - 8023d7c: f3bf 8f6f isb sy + 8023e58: f3bf 8f6f isb sy } - 8023d80: e003 b.n 8023d8a - 8023d82: bf00 nop - 8023d84: e000ed00 .word 0xe000ed00 + 8023e5c: e003 b.n 8023e66 + 8023e5e: bf00 nop + 8023e60: e000ed00 .word 0xe000ed00 if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */ - 8023d88: bf00 nop + 8023e64: bf00 nop SCB_EnableDCache(); /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8023d8a: f002 f895 bl 8025eb8 + 8023e66: f002 f869 bl 8025f3c /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 8023d8e: f000 f9d5 bl 802413c + 8023e6a: f000 f9a9 bl 80241c0 /* USER CODE BEGIN SysInit */ //__HAL_RCC_D2SRAM3_CLK_ENABLE(); /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8023d92: f7ff fdc1 bl 8023918 + 8023e6e: f7ff fd53 bl 8023918 MX_DMA_Init(); - 8023d96: f7ff f975 bl 8023084 + 8023e72: f7ff f907 bl 8023084 MX_FDCAN1_Init(); - 8023d9a: f7ff fc1d bl 80235d8 + 8023e76: f7ff fbaf bl 80235d8 MX_FDCAN2_Init(); - 8023d9e: f7ff fc7f bl 80236a0 + 8023e7a: f7ff fc11 bl 80236a0 MX_I2C4_Init(); - 8023da2: f7ff fec5 bl 8023b30 + 8023e7e: f7ff fe57 bl 8023b30 MX_TIM1_Init(); - 8023da6: f000 fe3b bl 8024a20 + 8023e82: f000 fe0f bl 8024aa4 MX_UART4_Init(); - 8023daa: f000 ff7d bl 8024ca8 + 8023e86: f000 ff51 bl 8024d2c MX_UART5_Init(); - 8023dae: f000 ffcf bl 8024d50 + 8023e8a: f000 ffa3 bl 8024dd4 MX_UART7_Init(); - 8023db2: f001 f821 bl 8024df8 + 8023e8e: f000 fff5 bl 8024e7c MX_USART1_UART_Init(); - 8023db6: f001 f877 bl 8024ea8 + 8023e92: f001 f84b bl 8024f2c MX_USART3_UART_Init(); - 8023dba: f001 f925 bl 8025008 + 8023e96: f001 f8f9 bl 802508c MX_USART2_UART_Init(); - 8023dbe: f001 f8cb bl 8024f58 + 8023e9a: f001 f89f bl 8024fdc MX_USART6_UART_Init(); - 8023dc2: f001 f979 bl 80250b8 + 8023e9e: f001 f94d bl 802513c MX_TIM8_Init(); - 8023dc6: f000 fe7f bl 8024ac8 + 8023ea2: f000 fe53 bl 8024b4c MX_LWIP_Init(); - 8023dca: f011 fb45 bl 8035458 + 8023ea6: f011 fb19 bl 80354dc MX_ADC2_Init(); - 8023dce: f7ff f863 bl 8022e98 + 8023eaa: f7fe fff5 bl 8022e98 MX_BDMA_Init(); - 8023dd2: f7ff f937 bl 8023044 + 8023eae: f7ff f8c9 bl 8023044 MX_QUADSPI_Init(); - 8023dd6: f000 faaf bl 8024338 + 8023eb2: f000 fa83 bl 80243bc MX_LPUART1_UART_Init(); - 8023dda: f000 ff11 bl 8024c00 + 8023eb6: f000 fee5 bl 8024c84 /* USER CODE BEGIN 2 */ SystemTimer_Intialize(); - 8023dde: f7fc fc93 bl 8020708 + 8023eba: f7fc fc25 bl 8020708 Error_Detect_Intialzie(1000); //every 1 seconds - 8023de2: f44f 707a mov.w r0, #1000 ; 0x3e8 - 8023de6: f7fc ff09 bl 8020bfc + 8023ebe: f44f 707a mov.w r0, #1000 ; 0x3e8 + 8023ec2: f7fc fe9b bl 8020bfc //2ms调度 GF_BSP_EEPROM_Init(); - 8023dea: f7fc fd22 bl 8020832 + 8023ec6: f7fc fcb4 bl 8020832 CV_GV_Init(); - 8023dee: f000 fa29 bl 8024244 + 8023eca: f000 f9fd bl 80242c8 //初始化encoder GF_BSP_UARTHandlers_Intialize( - 8023df2: 2364 movs r3, #100 ; 0x64 - 8023df4: 930d str r3, [sp, #52] ; 0x34 - 8023df6: 2364 movs r3, #100 ; 0x64 - 8023df8: 930c str r3, [sp, #48] ; 0x30 - 8023dfa: 2364 movs r3, #100 ; 0x64 - 8023dfc: 930b str r3, [sp, #44] ; 0x2c - 8023dfe: 2364 movs r3, #100 ; 0x64 - 8023e00: 930a str r3, [sp, #40] ; 0x28 - 8023e02: 2364 movs r3, #100 ; 0x64 - 8023e04: 9309 str r3, [sp, #36] ; 0x24 - 8023e06: 2364 movs r3, #100 ; 0x64 - 8023e08: 9308 str r3, [sp, #32] - 8023e0a: 2364 movs r3, #100 ; 0x64 - 8023e0c: 9307 str r3, [sp, #28] - 8023e0e: 2364 movs r3, #100 ; 0x64 - 8023e10: 9306 str r3, [sp, #24] - 8023e12: 2364 movs r3, #100 ; 0x64 - 8023e14: 9305 str r3, [sp, #20] - 8023e16: 2314 movs r3, #20 - 8023e18: 9304 str r3, [sp, #16] - 8023e1a: 2314 movs r3, #20 - 8023e1c: 9303 str r3, [sp, #12] - 8023e1e: 2306 movs r3, #6 - 8023e20: 9302 str r3, [sp, #8] - 8023e22: 2314 movs r3, #20 - 8023e24: 9301 str r3, [sp, #4] - 8023e26: 2314 movs r3, #20 - 8023e28: 9300 str r3, [sp, #0] - 8023e2a: 2314 movs r3, #20 - 8023e2c: 2214 movs r2, #20 - 8023e2e: 2114 movs r1, #20 - 8023e30: 2014 movs r0, #20 - 8023e32: f7fd fb0d bl 8021450 + 8023ece: 2364 movs r3, #100 ; 0x64 + 8023ed0: 930d str r3, [sp, #52] ; 0x34 + 8023ed2: 2364 movs r3, #100 ; 0x64 + 8023ed4: 930c str r3, [sp, #48] ; 0x30 + 8023ed6: 2364 movs r3, #100 ; 0x64 + 8023ed8: 930b str r3, [sp, #44] ; 0x2c + 8023eda: 2364 movs r3, #100 ; 0x64 + 8023edc: 930a str r3, [sp, #40] ; 0x28 + 8023ede: 2364 movs r3, #100 ; 0x64 + 8023ee0: 9309 str r3, [sp, #36] ; 0x24 + 8023ee2: 2364 movs r3, #100 ; 0x64 + 8023ee4: 9308 str r3, [sp, #32] + 8023ee6: 2364 movs r3, #100 ; 0x64 + 8023ee8: 9307 str r3, [sp, #28] + 8023eea: 2364 movs r3, #100 ; 0x64 + 8023eec: 9306 str r3, [sp, #24] + 8023eee: 2364 movs r3, #100 ; 0x64 + 8023ef0: 9305 str r3, [sp, #20] + 8023ef2: 2314 movs r3, #20 + 8023ef4: 9304 str r3, [sp, #16] + 8023ef6: 2314 movs r3, #20 + 8023ef8: 9303 str r3, [sp, #12] + 8023efa: 2306 movs r3, #6 + 8023efc: 9302 str r3, [sp, #8] + 8023efe: 2314 movs r3, #20 + 8023f00: 9301 str r3, [sp, #4] + 8023f02: 2314 movs r3, #20 + 8023f04: 9300 str r3, [sp, #0] + 8023f06: 2314 movs r3, #20 + 8023f08: 2214 movs r2, #20 + 8023f0a: 2114 movs r1, #20 + 8023f0c: 2014 movs r0, #20 + 8023f0e: f7fd fa9f bl 8021450 InterCall_DEBUG_Dispacher_Time, E28_SBUS_Dispacher_Time, LPUART1_UART_Dispacher_Time, Airborne_UART_Dispacher_Time); DLT_LOG_ENABLE_LEVEL = 7; //7 send all information //0 send nothing - 8023e36: 4bb1 ldr r3, [pc, #708] ; (80240fc ) - 8023e38: 2207 movs r2, #7 - 8023e3a: 701a strb r2, [r3, #0] + 8023f12: 4b9b ldr r3, [pc, #620] ; (8024180 ) + 8023f14: 2207 movs r2, #7 + 8023f16: 701a strb r2, [r3, #0] dLT_Log_intialize(); - 8023e3c: f7fc fc82 bl 8020744 + 8023f18: f7fc fc14 bl 8020744 //dLT_Log_intialize(&RS_485_4_UART_Handler); MK32_Sbus_UART_Handler_intialize(&E28_SBUS_UART_Handler); - 8023e40: 48af ldr r0, [pc, #700] ; (8024100 ) - 8023e42: f7fe ffd9 bl 8022df8 + 8023f1c: 4899 ldr r0, [pc, #612] ; (8024184 ) + 8023f1e: f7fe ff6b bl 8022df8 echo_intialize(); - 8023e46: f7ff f96d bl 8023124 + 8023f22: f7ff f8ff bl 8023124 GF_BSP_FDCAN_Init(); - 8023e4a: f7fc ff21 bl 8020c90 + 8023f26: f7fc feb3 bl 8020c90 GF_BSP_CANHandler_Init(can1_sendListPeriod, can1_DispacherPeriod, - 8023e4e: 4bad ldr r3, [pc, #692] ; (8024104 ) - 8023e50: 6818 ldr r0, [r3, #0] - 8023e52: 4bad ldr r3, [pc, #692] ; (8024108 ) - 8023e54: 6819 ldr r1, [r3, #0] - 8023e56: 4bad ldr r3, [pc, #692] ; (802410c ) - 8023e58: 681a ldr r2, [r3, #0] - 8023e5a: 4bad ldr r3, [pc, #692] ; (8024110 ) - 8023e5c: 681b ldr r3, [r3, #0] - 8023e5e: f7fc ffe9 bl 8020e34 + 8023f2a: 4b97 ldr r3, [pc, #604] ; (8024188 ) + 8023f2c: 6818 ldr r0, [r3, #0] + 8023f2e: 4b97 ldr r3, [pc, #604] ; (802418c ) + 8023f30: 6819 ldr r1, [r3, #0] + 8023f32: 4b97 ldr r3, [pc, #604] ; (8024190 ) + 8023f34: 681a ldr r2, [r3, #0] + 8023f36: 4b97 ldr r3, [pc, #604] ; (8024194 ) + 8023f38: 681b ldr r3, [r3, #0] + 8023f3a: f7fc ff7b bl 8020e34 can2_sendListPeriod, can2_DispacherPeriod); ADC_Intialize(); - 8023e62: f7fe f947 bl 80220f4 + 8023f3e: f7fe f8d9 bl 80220f4 // bsp_mqtt_init(); GF_BSP_TIMER_Init(); - 8023e66: f7fd fa7f bl 8021368 + 8023f42: f7fd fa11 bl 8021368 P_MK32 = &GV.P_MK32; - 8023e6a: 4baa ldr r3, [pc, #680] ; (8024114 ) - 8023e6c: 4aaa ldr r2, [pc, #680] ; (8024118 ) - 8023e6e: 601a str r2, [r3, #0] + 8023f46: 4b94 ldr r3, [pc, #592] ; (8024198 ) + 8023f48: 4a94 ldr r2, [pc, #592] ; (802419c ) + 8023f4a: 601a str r2, [r3, #0] //TCP_Client_Init(); //udp_client_init(); /* TCP echo server Init */ tcp_server_init(5000); - 8023e70: f241 3088 movw r0, #5000 ; 0x1388 - 8023e74: f7fe f9f8 bl 8022268 + 8023f4c: f241 3088 movw r0, #5000 ; 0x1388 + 8023f50: f7fe f98a bl 8022268 + Actuator_Start(); + 8023f54: f7ff fea2 bl 8023c9c /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { - if (HAL_GetTick() - ledTick >= 3000) /*led翻转，表示程序运行状�?????*/ - 8023e78: f002 f8a4 bl 8025fc4 - 8023e7c: 4603 mov r3, r0 - 8023e7e: 4aa7 ldr r2, [pc, #668] ; (802411c ) - 8023e80: 6812 ldr r2, [r2, #0] - 8023e82: 1a9b subs r3, r3, r2 - 8023e84: f640 32b7 movw r2, #2999 ; 0xbb7 - 8023e88: 4293 cmp r3, r2 - 8023e8a: d921 bls.n 8023ed0 + if (HAL_GetTick() - ledTick >= 1000) /*led翻转，表示程序运行状�?????*/ + 8023f58: f002 f876 bl 8026048 + 8023f5c: 4603 mov r3, r0 + 8023f5e: 4a90 ldr r2, [pc, #576] ; (80241a0 ) + 8023f60: 6812 ldr r2, [r2, #0] + 8023f62: 1a9b subs r3, r3, r2 + 8023f64: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 8023f68: d321 bcc.n 8023fae { ledTick = HAL_GetTick(); - 8023e8c: f002 f89a bl 8025fc4 - 8023e90: 4603 mov r3, r0 - 8023e92: 461a mov r2, r3 - 8023e94: 4ba1 ldr r3, [pc, #644] ; (802411c ) - 8023e96: 601a str r2, [r3, #0] + 8023f6a: f002 f86d bl 8026048 + 8023f6e: 4603 mov r3, r0 + 8023f70: 461a mov r2, r3 + 8023f72: 4b8b ldr r3, [pc, #556] ; (80241a0 ) + 8023f74: 601a str r2, [r3, #0] HAL_GPIO_TogglePin(IO_LED_GPIO_Port, IO_LED_Pin); //反转 - 8023e98: 2104 movs r1, #4 - 8023e9a: 48a1 ldr r0, [pc, #644] ; (8024120 ) - 8023e9c: f009 fcaf bl 802d7fe + 8023f76: 2104 movs r1, #4 + 8023f78: 488a ldr r0, [pc, #552] ; (80241a4 ) + 8023f7a: f009 fc82 bl 802d882 HAL_GPIO_TogglePin(M_OUT1_GPIO_Port, M_OUT1_Pin); - 8023ea0: 2110 movs r1, #16 - 8023ea2: 48a0 ldr r0, [pc, #640] ; (8024124 ) - 8023ea4: f009 fcab bl 802d7fe + 8023f7e: 2110 movs r1, #16 + 8023f80: 4889 ldr r0, [pc, #548] ; (80241a8 ) + 8023f82: f009 fc7e bl 802d882 HAL_GPIO_TogglePin(M_OUT2_GPIO_Port, M_OUT2_Pin); - 8023ea8: 2101 movs r1, #1 - 8023eaa: 489f ldr r0, [pc, #636] ; (8024128 ) - 8023eac: f009 fca7 bl 802d7fe + 8023f86: 2101 movs r1, #1 + 8023f88: 4888 ldr r0, [pc, #544] ; (80241ac ) + 8023f8a: f009 fc7a bl 802d882 HAL_GPIO_TogglePin(M_OUT3_GPIO_Port, M_OUT3_Pin); - 8023eb0: 2108 movs r1, #8 - 8023eb2: 489d ldr r0, [pc, #628] ; (8024128 ) - 8023eb4: f009 fca3 bl 802d7fe + 8023f8e: 2108 movs r1, #8 + 8023f90: 4886 ldr r0, [pc, #536] ; (80241ac ) + 8023f92: f009 fc76 bl 802d882 HAL_GPIO_TogglePin(M_OUT4_GPIO_Port, M_OUT4_Pin); - 8023eb8: 2104 movs r1, #4 - 8023eba: 489b ldr r0, [pc, #620] ; (8024128 ) - 8023ebc: f009 fc9f bl 802d7fe + 8023f96: 2104 movs r1, #4 + 8023f98: 4884 ldr r0, [pc, #528] ; (80241ac ) + 8023f9a: f009 fc72 bl 802d882 HAL_GPIO_TogglePin(M_OUT5_GPIO_Port, M_OUT5_Pin); - 8023ec0: 2120 movs r1, #32 - 8023ec2: 4899 ldr r0, [pc, #612] ; (8024128 ) - 8023ec4: f009 fc9b bl 802d7fe + 8023f9e: 2120 movs r1, #32 + 8023fa0: 4882 ldr r0, [pc, #520] ; (80241ac ) + 8023fa2: f009 fc6e bl 802d882 HAL_GPIO_TogglePin(M_OUT6_GPIO_Port, M_OUT6_Pin); - 8023ec8: 2110 movs r1, #16 - 8023eca: 4897 ldr r0, [pc, #604] ; (8024128 ) - 8023ecc: f009 fc97 bl 802d7fe + 8023fa6: 2110 movs r1, #16 + 8023fa8: 4880 ldr r0, [pc, #512] ; (80241ac ) + 8023faa: f009 fc6a bl 802d882 } - GF_BSP_GPIO_SetIO(7,1); /* 上升 0亮 1灭 不能同时为0，不能同时亮，会烧保险丝，为了给继电器吸合的反应时间*/ - 8023ed0: 2101 movs r1, #1 - 8023ed2: 2007 movs r0, #7 - 8023ed4: f7fd f96a bl 80211ac - GF_BSP_GPIO_SetIO(8,0);/*推杆上升下降切换时时必须经过停止，延时1s*/ - 8023ed8: 2100 movs r1, #0 - 8023eda: 2008 movs r0, #8 - 8023edc: f7fd f966 bl 80211ac - HAL_Delay(2000); - 8023ee0: f44f 60fa mov.w r0, #2000 ; 0x7d0 - 8023ee4: f002 f87a bl 8025fdc - - GF_BSP_GPIO_SetIO(7,1);/*停*/ - 8023ee8: 2101 movs r1, #1 - 8023eea: 2007 movs r0, #7 - 8023eec: f7fd f95e bl 80211ac - GF_BSP_GPIO_SetIO(8,1); - 8023ef0: 2101 movs r1, #1 - 8023ef2: 2008 movs r0, #8 - 8023ef4: f7fd f95a bl 80211ac - HAL_Delay(2000); - 8023ef8: f44f 60fa mov.w r0, #2000 ; 0x7d0 - 8023efc: f002 f86e bl 8025fdc - - GF_BSP_GPIO_SetIO(7,0);/*下降*/ - 8023f00: 2100 movs r1, #0 - 8023f02: 2007 movs r0, #7 - 8023f04: f7fd f952 bl 80211ac - GF_BSP_GPIO_SetIO(8,1); - 8023f08: 2101 movs r1, #1 - 8023f0a: 2008 movs r0, #8 - 8023f0c: f7fd f94e bl 80211ac - HAL_Delay(2000); - 8023f10: f44f 60fa mov.w r0, #2000 ; 0x7d0 - 8023f14: f002 f862 bl 8025fdc - - GF_BSP_GPIO_SetIO(7,1);/*停*/ - 8023f18: 2101 movs r1, #1 - 8023f1a: 2007 movs r0, #7 - 8023f1c: f7fd f946 bl 80211ac - GF_BSP_GPIO_SetIO(8,1); - 8023f20: 2101 movs r1, #1 - 8023f22: 2008 movs r0, #8 - 8023f24: f7fd f942 bl 80211ac - HAL_Delay(2000); - 8023f28: f44f 60fa mov.w r0, #2000 ; 0x7d0 - 8023f2c: f002 f856 bl 8025fdc + + Actuator_Task(); + 8023fae: f7ff fe8d bl 8023ccc +// GF_BSP_GPIO_SetIO(7,1);/*停*/ +// GF_BSP_GPIO_SetIO(8,1); +// HAL_Delay(2000); memset(InputInfo, '\0', sizeof(InputInfo)); - 8023f30: 463b mov r3, r7 - 8023f32: f44f 72fa mov.w r2, #500 ; 0x1f4 - 8023f36: 2100 movs r1, #0 - 8023f38: 4618 mov r0, r3 - 8023f3a: f01c fd01 bl 8040940 + 8023fb2: 463b mov r3, r7 + 8023fb4: f44f 72fa mov.w r2, #500 ; 0x1f4 + 8023fb8: 2100 movs r1, #0 + 8023fba: 4618 mov r0, r3 + 8023fbc: f01c fd02 bl 80409c4 sprintf(InputInfo, "the Values of sbus are: \tCH0_RY_H :%d, \tCH1_RY_V :%d \tCH2_LY_V :%d \tCH3_LY_H :%d", P_MK32->CH0_RY_H, P_MK32->CH1_RY_V, P_MK32->CH2_LY_V, - 8023f3e: 4b75 ldr r3, [pc, #468] ; (8024114 ) - 8023f40: 681b ldr r3, [r3, #0] + 8023fc0: 4b75 ldr r3, [pc, #468] ; (8024198 ) + 8023fc2: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023f42: 6859 ldr r1, [r3, #4] + 8023fc4: 6859 ldr r1, [r3, #4] P_MK32->CH0_RY_H, P_MK32->CH1_RY_V, P_MK32->CH2_LY_V, - 8023f44: 4b73 ldr r3, [pc, #460] ; (8024114 ) - 8023f46: 681b ldr r3, [r3, #0] + 8023fc6: 4b74 ldr r3, [pc, #464] ; (8024198 ) + 8023fc8: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023f48: 689c ldr r4, [r3, #8] + 8023fca: 689c ldr r4, [r3, #8] P_MK32->CH0_RY_H, P_MK32->CH1_RY_V, P_MK32->CH2_LY_V, - 8023f4a: 4b72 ldr r3, [pc, #456] ; (8024114 ) - 8023f4c: 681b ldr r3, [r3, #0] + 8023fcc: 4b72 ldr r3, [pc, #456] ; (8024198 ) + 8023fce: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023f4e: 68db ldr r3, [r3, #12] + 8023fd0: 68db ldr r3, [r3, #12] P_MK32->CH3_LY_H); - 8023f50: 4a70 ldr r2, [pc, #448] ; (8024114 ) - 8023f52: 6812 ldr r2, [r2, #0] + 8023fd2: 4a71 ldr r2, [pc, #452] ; (8024198 ) + 8023fd4: 6812 ldr r2, [r2, #0] sprintf(InputInfo, - 8023f54: 6912 ldr r2, [r2, #16] - 8023f56: 4638 mov r0, r7 - 8023f58: 9201 str r2, [sp, #4] - 8023f5a: 9300 str r3, [sp, #0] - 8023f5c: 4623 mov r3, r4 - 8023f5e: 460a mov r2, r1 - 8023f60: 4972 ldr r1, [pc, #456] ; (802412c ) - 8023f62: f01c fe3b bl 8040bdc + 8023fd6: 6912 ldr r2, [r2, #16] + 8023fd8: 4638 mov r0, r7 + 8023fda: 9201 str r2, [sp, #4] + 8023fdc: 9300 str r3, [sp, #0] + 8023fde: 4623 mov r3, r4 + 8023fe0: 460a mov r2, r1 + 8023fe2: 4973 ldr r1, [pc, #460] ; (80241b0 ) + 8023fe4: f01c fe3c bl 8040c60 LOGL(DL_INFO, InputInfo); - 8023f66: 4b65 ldr r3, [pc, #404] ; (80240fc ) - 8023f68: 781b ldrb r3, [r3, #0] - 8023f6a: 2b03 cmp r3, #3 - 8023f6c: d918 bls.n 8023fa0 - 8023f6e: 2330 movs r3, #48 ; 0x30 - 8023f70: 061a lsls r2, r3, #24 - 8023f72: 2330 movs r3, #48 ; 0x30 - 8023f74: 041b lsls r3, r3, #16 - 8023f76: 431a orrs r2, r3 - 8023f78: 2330 movs r3, #48 ; 0x30 - 8023f7a: 021b lsls r3, r3, #8 - 8023f7c: 4313 orrs r3, r2 - 8023f7e: 2230 movs r2, #48 ; 0x30 - 8023f80: ea43 0102 orr.w r1, r3, r2 - 8023f84: 2344 movs r3, #68 ; 0x44 - 8023f86: 061a lsls r2, r3, #24 - 8023f88: 2346 movs r3, #70 ; 0x46 - 8023f8a: 041b lsls r3, r3, #16 - 8023f8c: 431a orrs r2, r3 - 8023f8e: 234c movs r3, #76 ; 0x4c - 8023f90: 021b lsls r3, r3, #8 - 8023f92: 4313 orrs r3, r2 - 8023f94: 2254 movs r2, #84 ; 0x54 - 8023f96: 431a orrs r2, r3 - 8023f98: 463b mov r3, r7 - 8023f9a: 2004 movs r0, #4 - 8023f9c: f7fe fc98 bl 80228d0 + 8023fe8: 4b65 ldr r3, [pc, #404] ; (8024180 ) + 8023fea: 781b ldrb r3, [r3, #0] + 8023fec: 2b03 cmp r3, #3 + 8023fee: d918 bls.n 8024022 + 8023ff0: 2330 movs r3, #48 ; 0x30 + 8023ff2: 061a lsls r2, r3, #24 + 8023ff4: 2330 movs r3, #48 ; 0x30 + 8023ff6: 041b lsls r3, r3, #16 + 8023ff8: 431a orrs r2, r3 + 8023ffa: 2330 movs r3, #48 ; 0x30 + 8023ffc: 021b lsls r3, r3, #8 + 8023ffe: 4313 orrs r3, r2 + 8024000: 2230 movs r2, #48 ; 0x30 + 8024002: ea43 0102 orr.w r1, r3, r2 + 8024006: 2344 movs r3, #68 ; 0x44 + 8024008: 061a lsls r2, r3, #24 + 802400a: 2346 movs r3, #70 ; 0x46 + 802400c: 041b lsls r3, r3, #16 + 802400e: 431a orrs r2, r3 + 8024010: 234c movs r3, #76 ; 0x4c + 8024012: 021b lsls r3, r3, #8 + 8024014: 4313 orrs r3, r2 + 8024016: 2254 movs r2, #84 ; 0x54 + 8024018: 431a orrs r2, r3 + 802401a: 463b mov r3, r7 + 802401c: 2004 movs r0, #4 + 802401e: f7fe fc57 bl 80228d0 memset(InputInfo, '\0', sizeof(InputInfo)); - 8023fa0: 463b mov r3, r7 - 8023fa2: f44f 72fa mov.w r2, #500 ; 0x1f4 - 8023fa6: 2100 movs r1, #0 - 8023fa8: 4618 mov r0, r3 - 8023faa: f01c fcc9 bl 8040940 + 8024022: 463b mov r3, r7 + 8024024: f44f 72fa mov.w r2, #500 ; 0x1f4 + 8024028: 2100 movs r1, #0 + 802402a: 4618 mov r0, r3 + 802402c: f01c fcca bl 80409c4 sprintf(InputInfo, "the Values of sbus are: \t CH4_SA :%d, \t CH5_SB :%d \t CH6_SC :%d \t CH7_SD :%d", P_MK32->CH4_SA, P_MK32->CH5_SB, P_MK32->CH6_SC, P_MK32->CH7_SD); - 8023fae: 4b59 ldr r3, [pc, #356] ; (8024114 ) - 8023fb0: 681b ldr r3, [r3, #0] + 8024030: 4b59 ldr r3, [pc, #356] ; (8024198 ) + 8024032: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023fb2: 6959 ldr r1, [r3, #20] + 8024034: 6959 ldr r1, [r3, #20] P_MK32->CH4_SA, P_MK32->CH5_SB, P_MK32->CH6_SC, P_MK32->CH7_SD); - 8023fb4: 4b57 ldr r3, [pc, #348] ; (8024114 ) - 8023fb6: 681b ldr r3, [r3, #0] + 8024036: 4b58 ldr r3, [pc, #352] ; (8024198 ) + 8024038: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023fb8: 699c ldr r4, [r3, #24] + 802403a: 699c ldr r4, [r3, #24] P_MK32->CH4_SA, P_MK32->CH5_SB, P_MK32->CH6_SC, P_MK32->CH7_SD); - 8023fba: 4b56 ldr r3, [pc, #344] ; (8024114 ) - 8023fbc: 681b ldr r3, [r3, #0] + 802403c: 4b56 ldr r3, [pc, #344] ; (8024198 ) + 802403e: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8023fbe: 69db ldr r3, [r3, #28] + 8024040: 69db ldr r3, [r3, #28] P_MK32->CH4_SA, P_MK32->CH5_SB, P_MK32->CH6_SC, P_MK32->CH7_SD); - 8023fc0: 4a54 ldr r2, [pc, #336] ; (8024114 ) - 8023fc2: 6812 ldr r2, [r2, #0] + 8024042: 4a55 ldr r2, [pc, #340] ; (8024198 ) + 8024044: 6812 ldr r2, [r2, #0] sprintf(InputInfo, - 8023fc4: 6a12 ldr r2, [r2, #32] - 8023fc6: 4638 mov r0, r7 - 8023fc8: 9201 str r2, [sp, #4] - 8023fca: 9300 str r3, [sp, #0] - 8023fcc: 4623 mov r3, r4 - 8023fce: 460a mov r2, r1 - 8023fd0: 4957 ldr r1, [pc, #348] ; (8024130 ) - 8023fd2: f01c fe03 bl 8040bdc + 8024046: 6a12 ldr r2, [r2, #32] + 8024048: 4638 mov r0, r7 + 802404a: 9201 str r2, [sp, #4] + 802404c: 9300 str r3, [sp, #0] + 802404e: 4623 mov r3, r4 + 8024050: 460a mov r2, r1 + 8024052: 4958 ldr r1, [pc, #352] ; (80241b4 ) + 8024054: f01c fe04 bl 8040c60 LOGL(DL_INFO, InputInfo); - 8023fd6: 4b49 ldr r3, [pc, #292] ; (80240fc ) - 8023fd8: 781b ldrb r3, [r3, #0] - 8023fda: 2b03 cmp r3, #3 - 8023fdc: d918 bls.n 8024010 - 8023fde: 2330 movs r3, #48 ; 0x30 - 8023fe0: 061a lsls r2, r3, #24 - 8023fe2: 2330 movs r3, #48 ; 0x30 - 8023fe4: 041b lsls r3, r3, #16 - 8023fe6: 431a orrs r2, r3 - 8023fe8: 2330 movs r3, #48 ; 0x30 - 8023fea: 021b lsls r3, r3, #8 - 8023fec: 4313 orrs r3, r2 - 8023fee: 2230 movs r2, #48 ; 0x30 - 8023ff0: ea43 0102 orr.w r1, r3, r2 - 8023ff4: 2344 movs r3, #68 ; 0x44 - 8023ff6: 061a lsls r2, r3, #24 - 8023ff8: 2346 movs r3, #70 ; 0x46 - 8023ffa: 041b lsls r3, r3, #16 - 8023ffc: 431a orrs r2, r3 - 8023ffe: 234c movs r3, #76 ; 0x4c - 8024000: 021b lsls r3, r3, #8 - 8024002: 4313 orrs r3, r2 - 8024004: 2254 movs r2, #84 ; 0x54 - 8024006: 431a orrs r2, r3 - 8024008: 463b mov r3, r7 - 802400a: 2004 movs r0, #4 - 802400c: f7fe fc60 bl 80228d0 + 8024058: 4b49 ldr r3, [pc, #292] ; (8024180 ) + 802405a: 781b ldrb r3, [r3, #0] + 802405c: 2b03 cmp r3, #3 + 802405e: d918 bls.n 8024092 + 8024060: 2330 movs r3, #48 ; 0x30 + 8024062: 061a lsls r2, r3, #24 + 8024064: 2330 movs r3, #48 ; 0x30 + 8024066: 041b lsls r3, r3, #16 + 8024068: 431a orrs r2, r3 + 802406a: 2330 movs r3, #48 ; 0x30 + 802406c: 021b lsls r3, r3, #8 + 802406e: 4313 orrs r3, r2 + 8024070: 2230 movs r2, #48 ; 0x30 + 8024072: ea43 0102 orr.w r1, r3, r2 + 8024076: 2344 movs r3, #68 ; 0x44 + 8024078: 061a lsls r2, r3, #24 + 802407a: 2346 movs r3, #70 ; 0x46 + 802407c: 041b lsls r3, r3, #16 + 802407e: 431a orrs r2, r3 + 8024080: 234c movs r3, #76 ; 0x4c + 8024082: 021b lsls r3, r3, #8 + 8024084: 4313 orrs r3, r2 + 8024086: 2254 movs r2, #84 ; 0x54 + 8024088: 431a orrs r2, r3 + 802408a: 463b mov r3, r7 + 802408c: 2004 movs r0, #4 + 802408e: f7fe fc1f bl 80228d0 memset(InputInfo, '\0', sizeof(InputInfo)); - 8024010: 463b mov r3, r7 - 8024012: f44f 72fa mov.w r2, #500 ; 0x1f4 - 8024016: 2100 movs r1, #0 - 8024018: 4618 mov r0, r3 - 802401a: f01c fc91 bl 8040940 + 8024092: 463b mov r3, r7 + 8024094: f44f 72fa mov.w r2, #500 ; 0x1f4 + 8024098: 2100 movs r1, #0 + 802409a: 4618 mov r0, r3 + 802409c: f01c fc92 bl 80409c4 sprintf(InputInfo, "the Values of sbus are: \t CH8_SE :%d, \t CH9_SF :%d \t CH10_LD1 :%d \t CH11_RD1 :%d", P_MK32->CH8_SE, P_MK32->CH9_SF, P_MK32->CH10_LD1, - 802401e: 4b3d ldr r3, [pc, #244] ; (8024114 ) - 8024020: 681b ldr r3, [r3, #0] + 80240a0: 4b3d ldr r3, [pc, #244] ; (8024198 ) + 80240a2: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8024022: 6a59 ldr r1, [r3, #36] ; 0x24 + 80240a4: 6a59 ldr r1, [r3, #36] ; 0x24 P_MK32->CH8_SE, P_MK32->CH9_SF, P_MK32->CH10_LD1, - 8024024: 4b3b ldr r3, [pc, #236] ; (8024114 ) - 8024026: 681b ldr r3, [r3, #0] + 80240a6: 4b3c ldr r3, [pc, #240] ; (8024198 ) + 80240a8: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8024028: 6a9c ldr r4, [r3, #40] ; 0x28 + 80240aa: 6a9c ldr r4, [r3, #40] ; 0x28 P_MK32->CH8_SE, P_MK32->CH9_SF, P_MK32->CH10_LD1, - 802402a: 4b3a ldr r3, [pc, #232] ; (8024114 ) - 802402c: 681b ldr r3, [r3, #0] + 80240ac: 4b3a ldr r3, [pc, #232] ; (8024198 ) + 80240ae: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 802402e: 6adb ldr r3, [r3, #44] ; 0x2c + 80240b0: 6adb ldr r3, [r3, #44] ; 0x2c P_MK32->CH11_RD1); - 8024030: 4a38 ldr r2, [pc, #224] ; (8024114 ) - 8024032: 6812 ldr r2, [r2, #0] + 80240b2: 4a39 ldr r2, [pc, #228] ; (8024198 ) + 80240b4: 6812 ldr r2, [r2, #0] sprintf(InputInfo, - 8024034: 6b12 ldr r2, [r2, #48] ; 0x30 - 8024036: 4638 mov r0, r7 - 8024038: 9201 str r2, [sp, #4] - 802403a: 9300 str r3, [sp, #0] - 802403c: 4623 mov r3, r4 - 802403e: 460a mov r2, r1 - 8024040: 493c ldr r1, [pc, #240] ; (8024134 ) - 8024042: f01c fdcb bl 8040bdc + 80240b6: 6b12 ldr r2, [r2, #48] ; 0x30 + 80240b8: 4638 mov r0, r7 + 80240ba: 9201 str r2, [sp, #4] + 80240bc: 9300 str r3, [sp, #0] + 80240be: 4623 mov r3, r4 + 80240c0: 460a mov r2, r1 + 80240c2: 493d ldr r1, [pc, #244] ; (80241b8 ) + 80240c4: f01c fdcc bl 8040c60 LOGL(DL_INFO, InputInfo); - 8024046: 4b2d ldr r3, [pc, #180] ; (80240fc ) - 8024048: 781b ldrb r3, [r3, #0] - 802404a: 2b03 cmp r3, #3 - 802404c: d918 bls.n 8024080 - 802404e: 2330 movs r3, #48 ; 0x30 - 8024050: 061a lsls r2, r3, #24 - 8024052: 2330 movs r3, #48 ; 0x30 - 8024054: 041b lsls r3, r3, #16 - 8024056: 431a orrs r2, r3 - 8024058: 2330 movs r3, #48 ; 0x30 - 802405a: 021b lsls r3, r3, #8 - 802405c: 4313 orrs r3, r2 - 802405e: 2230 movs r2, #48 ; 0x30 - 8024060: ea43 0102 orr.w r1, r3, r2 - 8024064: 2344 movs r3, #68 ; 0x44 - 8024066: 061a lsls r2, r3, #24 - 8024068: 2346 movs r3, #70 ; 0x46 - 802406a: 041b lsls r3, r3, #16 - 802406c: 431a orrs r2, r3 - 802406e: 234c movs r3, #76 ; 0x4c - 8024070: 021b lsls r3, r3, #8 - 8024072: 4313 orrs r3, r2 - 8024074: 2254 movs r2, #84 ; 0x54 - 8024076: 431a orrs r2, r3 - 8024078: 463b mov r3, r7 - 802407a: 2004 movs r0, #4 - 802407c: f7fe fc28 bl 80228d0 + 80240c8: 4b2d ldr r3, [pc, #180] ; (8024180 ) + 80240ca: 781b ldrb r3, [r3, #0] + 80240cc: 2b03 cmp r3, #3 + 80240ce: d918 bls.n 8024102 + 80240d0: 2330 movs r3, #48 ; 0x30 + 80240d2: 061a lsls r2, r3, #24 + 80240d4: 2330 movs r3, #48 ; 0x30 + 80240d6: 041b lsls r3, r3, #16 + 80240d8: 431a orrs r2, r3 + 80240da: 2330 movs r3, #48 ; 0x30 + 80240dc: 021b lsls r3, r3, #8 + 80240de: 4313 orrs r3, r2 + 80240e0: 2230 movs r2, #48 ; 0x30 + 80240e2: ea43 0102 orr.w r1, r3, r2 + 80240e6: 2344 movs r3, #68 ; 0x44 + 80240e8: 061a lsls r2, r3, #24 + 80240ea: 2346 movs r3, #70 ; 0x46 + 80240ec: 041b lsls r3, r3, #16 + 80240ee: 431a orrs r2, r3 + 80240f0: 234c movs r3, #76 ; 0x4c + 80240f2: 021b lsls r3, r3, #8 + 80240f4: 4313 orrs r3, r2 + 80240f6: 2254 movs r2, #84 ; 0x54 + 80240f8: 431a orrs r2, r3 + 80240fa: 463b mov r3, r7 + 80240fc: 2004 movs r0, #4 + 80240fe: f7fe fbe7 bl 80228d0 memset(InputInfo, '\0', sizeof(InputInfo)); - 8024080: 463b mov r3, r7 - 8024082: f44f 72fa mov.w r2, #500 ; 0x1f4 - 8024086: 2100 movs r1, #0 - 8024088: 4618 mov r0, r3 - 802408a: f01c fc59 bl 8040940 + 8024102: 463b mov r3, r7 + 8024104: f44f 72fa mov.w r2, #500 ; 0x1f4 + 8024108: 2100 movs r1, #0 + 802410a: 4618 mov r0, r3 + 802410c: f01c fc5a bl 80409c4 sprintf(InputInfo, "the Values of sbus are: \t CH12_S1 :%d, \t CH13_S2 :%d \t CH14_LT :%d \t CH15_RT :%d \t IsOnline :%d", P_MK32->CH12_S1, P_MK32->CH13_S2, P_MK32->CH14_LT, - 802408e: 4b21 ldr r3, [pc, #132] ; (8024114 ) - 8024090: 681b ldr r3, [r3, #0] + 8024110: 4b21 ldr r3, [pc, #132] ; (8024198 ) + 8024112: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8024092: 6b5c ldr r4, [r3, #52] ; 0x34 + 8024114: 6b5c ldr r4, [r3, #52] ; 0x34 P_MK32->CH12_S1, P_MK32->CH13_S2, P_MK32->CH14_LT, - 8024094: 4b1f ldr r3, [pc, #124] ; (8024114 ) - 8024096: 681b ldr r3, [r3, #0] + 8024116: 4b20 ldr r3, [pc, #128] ; (8024198 ) + 8024118: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 8024098: 6b9d ldr r5, [r3, #56] ; 0x38 + 802411a: 6b9d ldr r5, [r3, #56] ; 0x38 P_MK32->CH12_S1, P_MK32->CH13_S2, P_MK32->CH14_LT, - 802409a: 4b1e ldr r3, [pc, #120] ; (8024114 ) - 802409c: 681b ldr r3, [r3, #0] + 802411c: 4b1e ldr r3, [pc, #120] ; (8024198 ) + 802411e: 681b ldr r3, [r3, #0] sprintf(InputInfo, - 802409e: 6bdb ldr r3, [r3, #60] ; 0x3c + 8024120: 6bdb ldr r3, [r3, #60] ; 0x3c P_MK32->CH15_RT, P_MK32->IsOnline); - 80240a0: 4a1c ldr r2, [pc, #112] ; (8024114 ) - 80240a2: 6812 ldr r2, [r2, #0] + 8024122: 4a1d ldr r2, [pc, #116] ; (8024198 ) + 8024124: 6812 ldr r2, [r2, #0] sprintf(InputInfo, - 80240a4: 6c12 ldr r2, [r2, #64] ; 0x40 + 8024126: 6c12 ldr r2, [r2, #64] ; 0x40 P_MK32->CH15_RT, P_MK32->IsOnline); - 80240a6: 491b ldr r1, [pc, #108] ; (8024114 ) - 80240a8: 6809 ldr r1, [r1, #0] + 8024128: 491b ldr r1, [pc, #108] ; (8024198 ) + 802412a: 6809 ldr r1, [r1, #0] sprintf(InputInfo, - 80240aa: 6c49 ldr r1, [r1, #68] ; 0x44 - 80240ac: 4638 mov r0, r7 - 80240ae: 9102 str r1, [sp, #8] - 80240b0: 9201 str r2, [sp, #4] - 80240b2: 9300 str r3, [sp, #0] - 80240b4: 462b mov r3, r5 - 80240b6: 4622 mov r2, r4 - 80240b8: 491f ldr r1, [pc, #124] ; (8024138 ) - 80240ba: f01c fd8f bl 8040bdc + 802412c: 6c49 ldr r1, [r1, #68] ; 0x44 + 802412e: 4638 mov r0, r7 + 8024130: 9102 str r1, [sp, #8] + 8024132: 9201 str r2, [sp, #4] + 8024134: 9300 str r3, [sp, #0] + 8024136: 462b mov r3, r5 + 8024138: 4622 mov r2, r4 + 802413a: 4920 ldr r1, [pc, #128] ; (80241bc ) + 802413c: f01c fd90 bl 8040c60 LOGL(DL_INFO, InputInfo); - 80240be: 4b0f ldr r3, [pc, #60] ; (80240fc ) - 80240c0: 781b ldrb r3, [r3, #0] - 80240c2: 2b03 cmp r3, #3 - 80240c4: f67f aed8 bls.w 8023e78 - 80240c8: 2330 movs r3, #48 ; 0x30 - 80240ca: 061a lsls r2, r3, #24 - 80240cc: 2330 movs r3, #48 ; 0x30 - 80240ce: 041b lsls r3, r3, #16 - 80240d0: 431a orrs r2, r3 - 80240d2: 2330 movs r3, #48 ; 0x30 - 80240d4: 021b lsls r3, r3, #8 - 80240d6: 4313 orrs r3, r2 - 80240d8: 2230 movs r2, #48 ; 0x30 - 80240da: ea43 0102 orr.w r1, r3, r2 - 80240de: 2344 movs r3, #68 ; 0x44 - 80240e0: 061a lsls r2, r3, #24 - 80240e2: 2346 movs r3, #70 ; 0x46 - 80240e4: 041b lsls r3, r3, #16 - 80240e6: 431a orrs r2, r3 - 80240e8: 234c movs r3, #76 ; 0x4c - 80240ea: 021b lsls r3, r3, #8 - 80240ec: 4313 orrs r3, r2 - 80240ee: 2254 movs r2, #84 ; 0x54 - 80240f0: 431a orrs r2, r3 - 80240f2: 463b mov r3, r7 - 80240f4: 2004 movs r0, #4 - 80240f6: f7fe fbeb bl 80228d0 - if (HAL_GetTick() - ledTick >= 3000) /*led翻转，表示程序运行状�?????*/ - 80240fa: e6bd b.n 8023e78 - 80240fc: 24009bb4 .word 0x24009bb4 - 8024100: 24005a5c .word 0x24005a5c - 8024104: 24000038 .word 0x24000038 - 8024108: 2400003c .word 0x2400003c - 802410c: 24000040 .word 0x24000040 - 8024110: 24000044 .word 0x24000044 - 8024114: 2400ad04 .word 0x2400ad04 - 8024118: 24000140 .word 0x24000140 - 802411c: 2400af28 .word 0x2400af28 - 8024120: 58020800 .word 0x58020800 - 8024124: 58020400 .word 0x58020400 - 8024128: 58021000 .word 0x58021000 - 802412c: 08042124 .word 0x08042124 - 8024130: 08042178 .word 0x08042178 - 8024134: 080421c8 .word 0x080421c8 - 8024138: 0804221c .word 0x0804221c - -0802413c : + 8024140: 4b0f ldr r3, [pc, #60] ; (8024180 ) + 8024142: 781b ldrb r3, [r3, #0] + 8024144: 2b03 cmp r3, #3 + 8024146: f67f af07 bls.w 8023f58 + 802414a: 2330 movs r3, #48 ; 0x30 + 802414c: 061a lsls r2, r3, #24 + 802414e: 2330 movs r3, #48 ; 0x30 + 8024150: 041b lsls r3, r3, #16 + 8024152: 431a orrs r2, r3 + 8024154: 2330 movs r3, #48 ; 0x30 + 8024156: 021b lsls r3, r3, #8 + 8024158: 4313 orrs r3, r2 + 802415a: 2230 movs r2, #48 ; 0x30 + 802415c: ea43 0102 orr.w r1, r3, r2 + 8024160: 2344 movs r3, #68 ; 0x44 + 8024162: 061a lsls r2, r3, #24 + 8024164: 2346 movs r3, #70 ; 0x46 + 8024166: 041b lsls r3, r3, #16 + 8024168: 431a orrs r2, r3 + 802416a: 234c movs r3, #76 ; 0x4c + 802416c: 021b lsls r3, r3, #8 + 802416e: 4313 orrs r3, r2 + 8024170: 2254 movs r2, #84 ; 0x54 + 8024172: 431a orrs r2, r3 + 8024174: 463b mov r3, r7 + 8024176: 2004 movs r0, #4 + 8024178: f7fe fbaa bl 80228d0 + if (HAL_GetTick() - ledTick >= 1000) /*led翻转，表示程序运行状�?????*/ + 802417c: e6ec b.n 8023f58 + 802417e: bf00 nop + 8024180: 24009bb4 .word 0x24009bb4 + 8024184: 24005a5c .word 0x24005a5c + 8024188: 24000038 .word 0x24000038 + 802418c: 2400003c .word 0x2400003c + 8024190: 24000040 .word 0x24000040 + 8024194: 24000044 .word 0x24000044 + 8024198: 2400ad04 .word 0x2400ad04 + 802419c: 24000140 .word 0x24000140 + 80241a0: 2400af30 .word 0x2400af30 + 80241a4: 58020800 .word 0x58020800 + 80241a8: 58020400 .word 0x58020400 + 80241ac: 58021000 .word 0x58021000 + 80241b0: 080421a4 .word 0x080421a4 + 80241b4: 080421f8 .word 0x080421f8 + 80241b8: 08042248 .word 0x08042248 + 80241bc: 0804229c .word 0x0804229c + +080241c0 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 802413c: b580 push {r7, lr} - 802413e: b09c sub sp, #112 ; 0x70 - 8024140: af00 add r7, sp, #0 + 80241c0: b580 push {r7, lr} + 80241c2: b09c sub sp, #112 ; 0x70 + 80241c4: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8024142: f107 0324 add.w r3, r7, #36 ; 0x24 - 8024146: 224c movs r2, #76 ; 0x4c - 8024148: 2100 movs r1, #0 - 802414a: 4618 mov r0, r3 - 802414c: f01c fbf8 bl 8040940 + 80241c6: f107 0324 add.w r3, r7, #36 ; 0x24 + 80241ca: 224c movs r2, #76 ; 0x4c + 80241cc: 2100 movs r1, #0 + 80241ce: 4618 mov r0, r3 + 80241d0: f01c fbf8 bl 80409c4 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8024150: 1d3b adds r3, r7, #4 - 8024152: 2220 movs r2, #32 - 8024154: 2100 movs r1, #0 - 8024156: 4618 mov r0, r3 - 8024158: f01c fbf2 bl 8040940 + 80241d4: 1d3b adds r3, r7, #4 + 80241d6: 2220 movs r2, #32 + 80241d8: 2100 movs r1, #0 + 80241da: 4618 mov r0, r3 + 80241dc: f01c fbf2 bl 80409c4 /** Supply configuration update enable */ HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); - 802415c: 2002 movs r0, #2 - 802415e: f00a fb3d bl 802e7dc + 80241e0: 2002 movs r0, #2 + 80241e2: f00a fb3d bl 802e860 /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8024162: 2300 movs r3, #0 - 8024164: 603b str r3, [r7, #0] - 8024166: 4b34 ldr r3, [pc, #208] ; (8024238 ) - 8024168: 6adb ldr r3, [r3, #44] ; 0x2c - 802416a: 4a33 ldr r2, [pc, #204] ; (8024238 ) - 802416c: f023 0301 bic.w r3, r3, #1 - 8024170: 62d3 str r3, [r2, #44] ; 0x2c - 8024172: 4b31 ldr r3, [pc, #196] ; (8024238 ) - 8024174: 6adb ldr r3, [r3, #44] ; 0x2c - 8024176: f003 0301 and.w r3, r3, #1 - 802417a: 603b str r3, [r7, #0] - 802417c: 4b2f ldr r3, [pc, #188] ; (802423c ) - 802417e: 699b ldr r3, [r3, #24] - 8024180: 4a2e ldr r2, [pc, #184] ; (802423c ) - 8024182: f443 4340 orr.w r3, r3, #49152 ; 0xc000 - 8024186: 6193 str r3, [r2, #24] - 8024188: 4b2c ldr r3, [pc, #176] ; (802423c ) - 802418a: 699b ldr r3, [r3, #24] - 802418c: f403 4340 and.w r3, r3, #49152 ; 0xc000 - 8024190: 603b str r3, [r7, #0] - 8024192: 683b ldr r3, [r7, #0] + 80241e6: 2300 movs r3, #0 + 80241e8: 603b str r3, [r7, #0] + 80241ea: 4b34 ldr r3, [pc, #208] ; (80242bc ) + 80241ec: 6adb ldr r3, [r3, #44] ; 0x2c + 80241ee: 4a33 ldr r2, [pc, #204] ; (80242bc ) + 80241f0: f023 0301 bic.w r3, r3, #1 + 80241f4: 62d3 str r3, [r2, #44] ; 0x2c + 80241f6: 4b31 ldr r3, [pc, #196] ; (80242bc ) + 80241f8: 6adb ldr r3, [r3, #44] ; 0x2c + 80241fa: f003 0301 and.w r3, r3, #1 + 80241fe: 603b str r3, [r7, #0] + 8024200: 4b2f ldr r3, [pc, #188] ; (80242c0 ) + 8024202: 699b ldr r3, [r3, #24] + 8024204: 4a2e ldr r2, [pc, #184] ; (80242c0 ) + 8024206: f443 4340 orr.w r3, r3, #49152 ; 0xc000 + 802420a: 6193 str r3, [r2, #24] + 802420c: 4b2c ldr r3, [pc, #176] ; (80242c0 ) + 802420e: 699b ldr r3, [r3, #24] + 8024210: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8024214: 603b str r3, [r7, #0] + 8024216: 683b ldr r3, [r7, #0] while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} - 8024194: bf00 nop - 8024196: 4b29 ldr r3, [pc, #164] ; (802423c ) - 8024198: 699b ldr r3, [r3, #24] - 802419a: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 802419e: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 80241a2: d1f8 bne.n 8024196 + 8024218: bf00 nop + 802421a: 4b29 ldr r3, [pc, #164] ; (80242c0 ) + 802421c: 699b ldr r3, [r3, #24] + 802421e: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 8024222: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 8024226: d1f8 bne.n 802421a /** Macro to configure the PLL clock source */ __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE); - 80241a4: 4b26 ldr r3, [pc, #152] ; (8024240 ) - 80241a6: 6a9b ldr r3, [r3, #40] ; 0x28 - 80241a8: f023 0303 bic.w r3, r3, #3 - 80241ac: 4a24 ldr r2, [pc, #144] ; (8024240 ) - 80241ae: f043 0302 orr.w r3, r3, #2 - 80241b2: 6293 str r3, [r2, #40] ; 0x28 + 8024228: 4b26 ldr r3, [pc, #152] ; (80242c4 ) + 802422a: 6a9b ldr r3, [r3, #40] ; 0x28 + 802422c: f023 0303 bic.w r3, r3, #3 + 8024230: 4a24 ldr r2, [pc, #144] ; (80242c4 ) + 8024232: f043 0302 orr.w r3, r3, #2 + 8024236: 6293 str r3, [r2, #40] ; 0x28 /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 80241b4: 2301 movs r3, #1 - 80241b6: 627b str r3, [r7, #36] ; 0x24 + 8024238: 2301 movs r3, #1 + 802423a: 627b str r3, [r7, #36] ; 0x24 RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 80241b8: f44f 3380 mov.w r3, #65536 ; 0x10000 - 80241bc: 62bb str r3, [r7, #40] ; 0x28 + 802423c: f44f 3380 mov.w r3, #65536 ; 0x10000 + 8024240: 62bb str r3, [r7, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 80241be: 2302 movs r3, #2 - 80241c0: 64bb str r3, [r7, #72] ; 0x48 + 8024242: 2302 movs r3, #2 + 8024244: 64bb str r3, [r7, #72] ; 0x48 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 80241c2: 2302 movs r3, #2 - 80241c4: 64fb str r3, [r7, #76] ; 0x4c + 8024246: 2302 movs r3, #2 + 8024248: 64fb str r3, [r7, #76] ; 0x4c RCC_OscInitStruct.PLL.PLLM = 2; - 80241c6: 2302 movs r3, #2 - 80241c8: 653b str r3, [r7, #80] ; 0x50 + 802424a: 2302 movs r3, #2 + 802424c: 653b str r3, [r7, #80] ; 0x50 RCC_OscInitStruct.PLL.PLLN = 64; - 80241ca: 2340 movs r3, #64 ; 0x40 - 80241cc: 657b str r3, [r7, #84] ; 0x54 + 802424e: 2340 movs r3, #64 ; 0x40 + 8024250: 657b str r3, [r7, #84] ; 0x54 RCC_OscInitStruct.PLL.PLLP = 2; - 80241ce: 2302 movs r3, #2 - 80241d0: 65bb str r3, [r7, #88] ; 0x58 + 8024252: 2302 movs r3, #2 + 8024254: 65bb str r3, [r7, #88] ; 0x58 RCC_OscInitStruct.PLL.PLLQ = 20; - 80241d2: 2314 movs r3, #20 - 80241d4: 65fb str r3, [r7, #92] ; 0x5c + 8024256: 2314 movs r3, #20 + 8024258: 65fb str r3, [r7, #92] ; 0x5c RCC_OscInitStruct.PLL.PLLR = 4; - 80241d6: 2304 movs r3, #4 - 80241d8: 663b str r3, [r7, #96] ; 0x60 + 802425a: 2304 movs r3, #4 + 802425c: 663b str r3, [r7, #96] ; 0x60 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; - 80241da: 230c movs r3, #12 - 80241dc: 667b str r3, [r7, #100] ; 0x64 + 802425e: 230c movs r3, #12 + 8024260: 667b str r3, [r7, #100] ; 0x64 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; - 80241de: 2300 movs r3, #0 - 80241e0: 66bb str r3, [r7, #104] ; 0x68 + 8024262: 2300 movs r3, #0 + 8024264: 66bb str r3, [r7, #104] ; 0x68 RCC_OscInitStruct.PLL.PLLFRACN = 0; - 80241e2: 2300 movs r3, #0 - 80241e4: 66fb str r3, [r7, #108] ; 0x6c + 8024266: 2300 movs r3, #0 + 8024268: 66fb str r3, [r7, #108] ; 0x6c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 80241e6: f107 0324 add.w r3, r7, #36 ; 0x24 - 80241ea: 4618 mov r0, r3 - 80241ec: f00a fe26 bl 802ee3c - 80241f0: 4603 mov r3, r0 - 80241f2: 2b00 cmp r3, #0 - 80241f4: d001 beq.n 80241fa + 802426a: f107 0324 add.w r3, r7, #36 ; 0x24 + 802426e: 4618 mov r0, r3 + 8024270: f00a fe26 bl 802eec0 + 8024274: 4603 mov r3, r0 + 8024276: 2b00 cmp r3, #0 + 8024278: d001 beq.n 802427e { Error_Handler(); - 80241f6: f000 f899 bl 802432c + 802427a: f000 f899 bl 80243b0 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 80241fa: 233f movs r3, #63 ; 0x3f - 80241fc: 607b str r3, [r7, #4] + 802427e: 233f movs r3, #63 ; 0x3f + 8024280: 607b str r3, [r7, #4] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 80241fe: 2303 movs r3, #3 - 8024200: 60bb str r3, [r7, #8] + 8024282: 2303 movs r3, #3 + 8024284: 60bb str r3, [r7, #8] RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; - 8024202: 2300 movs r3, #0 - 8024204: 60fb str r3, [r7, #12] + 8024286: 2300 movs r3, #0 + 8024288: 60fb str r3, [r7, #12] RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; - 8024206: 2308 movs r3, #8 - 8024208: 613b str r3, [r7, #16] + 802428a: 2308 movs r3, #8 + 802428c: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; - 802420a: 2340 movs r3, #64 ; 0x40 - 802420c: 617b str r3, [r7, #20] + 802428e: 2340 movs r3, #64 ; 0x40 + 8024290: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; - 802420e: 2340 movs r3, #64 ; 0x40 - 8024210: 61bb str r3, [r7, #24] + 8024292: 2340 movs r3, #64 ; 0x40 + 8024294: 61bb str r3, [r7, #24] RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; - 8024212: f44f 6380 mov.w r3, #1024 ; 0x400 - 8024216: 61fb str r3, [r7, #28] + 8024296: f44f 6380 mov.w r3, #1024 ; 0x400 + 802429a: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - 8024218: 2340 movs r3, #64 ; 0x40 - 802421a: 623b str r3, [r7, #32] + 802429c: 2340 movs r3, #64 ; 0x40 + 802429e: 623b str r3, [r7, #32] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) - 802421c: 1d3b adds r3, r7, #4 - 802421e: 2102 movs r1, #2 - 8024220: 4618 mov r0, r3 - 8024222: f00b fa39 bl 802f698 - 8024226: 4603 mov r3, r0 - 8024228: 2b00 cmp r3, #0 - 802422a: d001 beq.n 8024230 + 80242a0: 1d3b adds r3, r7, #4 + 80242a2: 2102 movs r1, #2 + 80242a4: 4618 mov r0, r3 + 80242a6: f00b fa39 bl 802f71c + 80242aa: 4603 mov r3, r0 + 80242ac: 2b00 cmp r3, #0 + 80242ae: d001 beq.n 80242b4 { Error_Handler(); - 802422c: f000 f87e bl 802432c + 80242b0: f000 f87e bl 80243b0 } } - 8024230: bf00 nop - 8024232: 3770 adds r7, #112 ; 0x70 - 8024234: 46bd mov sp, r7 - 8024236: bd80 pop {r7, pc} - 8024238: 58000400 .word 0x58000400 - 802423c: 58024800 .word 0x58024800 - 8024240: 58024400 .word 0x58024400 + 80242b4: bf00 nop + 80242b6: 3770 adds r7, #112 ; 0x70 + 80242b8: 46bd mov sp, r7 + 80242ba: bd80 pop {r7, pc} + 80242bc: 58000400 .word 0x58000400 + 80242c0: 58024800 .word 0x58024800 + 80242c4: 58024400 .word 0x58024400 -08024244 : +080242c8 : /* USER CODE BEGIN 4 */ void CV_GV_Init() { - 8024244: b5b0 push {r4, r5, r7, lr} - 8024246: b08c sub sp, #48 ; 0x30 - 8024248: af00 add r7, sp, #0 + 80242c8: b5b0 push {r4, r5, r7, lr} + 80242ca: b08c sub sp, #48 ; 0x30 + 80242cc: af00 add r7, sp, #0 CV = GF_BSP_EEPROM_Get_CV(); //Read CV - 802424a: 4c0c ldr r4, [pc, #48] ; (802427c ) - 802424c: 463b mov r3, r7 - 802424e: 4618 mov r0, r3 - 8024250: f7fc fcb2 bl 8020bb8 - 8024254: 4625 mov r5, r4 - 8024256: 463c mov r4, r7 - 8024258: cc0f ldmia r4!, {r0, r1, r2, r3} - 802425a: c50f stmia r5!, {r0, r1, r2, r3} - 802425c: cc0f ldmia r4!, {r0, r1, r2, r3} - 802425e: c50f stmia r5!, {r0, r1, r2, r3} - 8024260: e894 000f ldmia.w r4, {r0, r1, r2, r3} - 8024264: e885 000f stmia.w r5, {r0, r1, r2, r3} + 80242ce: 4c0c ldr r4, [pc, #48] ; (8024300 ) + 80242d0: 463b mov r3, r7 + 80242d2: 4618 mov r0, r3 + 80242d4: f7fc fc70 bl 8020bb8 + 80242d8: 4625 mov r5, r4 + 80242da: 463c mov r4, r7 + 80242dc: cc0f ldmia r4!, {r0, r1, r2, r3} + 80242de: c50f stmia r5!, {r0, r1, r2, r3} + 80242e0: cc0f ldmia r4!, {r0, r1, r2, r3} + 80242e2: c50f stmia r5!, {r0, r1, r2, r3} + 80242e4: e894 000f ldmia.w r4, {r0, r1, r2, r3} + 80242e8: e885 000f stmia.w r5, {r0, r1, r2, r3} tempature = &GV.Tempature; - 8024268: 4b05 ldr r3, [pc, #20] ; (8024280 ) - 802426a: 4a06 ldr r2, [pc, #24] ; (8024284 ) - 802426c: 601a str r2, [r3, #0] + 80242ec: 4b05 ldr r3, [pc, #20] ; (8024304 ) + 80242ee: 4a06 ldr r2, [pc, #24] ; (8024308 ) + 80242f0: 601a str r2, [r3, #0] P_MK32 = &GV.P_MK32; - 802426e: 4b06 ldr r3, [pc, #24] ; (8024288 ) - 8024270: 4a06 ldr r2, [pc, #24] ; (802428c ) - 8024272: 601a str r2, [r3, #0] + 80242f2: 4b06 ldr r3, [pc, #24] ; (802430c ) + 80242f4: 4a06 ldr r2, [pc, #24] ; (8024310 ) + 80242f6: 601a str r2, [r3, #0] //Air_Pressure = &GV.Air_Pressure; } - 8024274: bf00 nop - 8024276: 3730 adds r7, #48 ; 0x30 - 8024278: 46bd mov sp, r7 - 802427a: bdb0 pop {r4, r5, r7, pc} - 802427c: 24000100 .word 0x24000100 - 8024280: 24009b94 .word 0x24009b94 - 8024284: 24000138 .word 0x24000138 - 8024288: 2400ad04 .word 0x2400ad04 - 802428c: 24000140 .word 0x24000140 - -08024290 : + 80242f8: bf00 nop + 80242fa: 3730 adds r7, #48 ; 0x30 + 80242fc: 46bd mov sp, r7 + 80242fe: bdb0 pop {r4, r5, r7, pc} + 8024300: 24000100 .word 0x24000100 + 8024304: 24009b94 .word 0x24009b94 + 8024308: 24000138 .word 0x24000138 + 802430c: 2400ad04 .word 0x2400ad04 + 8024310: 24000140 .word 0x24000140 + +08024314 : /* USER CODE END 4 */ /* MPU Configuration */ void MPU_Config(void) { - 8024290: b580 push {r7, lr} - 8024292: b084 sub sp, #16 - 8024294: af00 add r7, sp, #0 + 8024314: b580 push {r7, lr} + 8024316: b084 sub sp, #16 + 8024318: af00 add r7, sp, #0 MPU_Region_InitTypeDef MPU_InitStruct = {0}; - 8024296: 463b mov r3, r7 - 8024298: 2200 movs r2, #0 - 802429a: 601a str r2, [r3, #0] - 802429c: 605a str r2, [r3, #4] - 802429e: 609a str r2, [r3, #8] - 80242a0: 60da str r2, [r3, #12] + 802431a: 463b mov r3, r7 + 802431c: 2200 movs r2, #0 + 802431e: 601a str r2, [r3, #0] + 8024320: 605a str r2, [r3, #4] + 8024322: 609a str r2, [r3, #8] + 8024324: 60da str r2, [r3, #12] /* Disables the MPU */ HAL_MPU_Disable(); - 80242a2: f003 fbc3 bl 8027a2c + 8024326: f003 fbc3 bl 8027ab0 /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Enable = MPU_REGION_ENABLE; - 80242a6: 2301 movs r3, #1 - 80242a8: 703b strb r3, [r7, #0] + 802432a: 2301 movs r3, #1 + 802432c: 703b strb r3, [r7, #0] MPU_InitStruct.Number = MPU_REGION_NUMBER0; - 80242aa: 2300 movs r3, #0 - 80242ac: 707b strb r3, [r7, #1] + 802432e: 2300 movs r3, #0 + 8024330: 707b strb r3, [r7, #1] MPU_InitStruct.BaseAddress = 0x30040000; - 80242ae: 4b1d ldr r3, [pc, #116] ; (8024324 ) - 80242b0: 607b str r3, [r7, #4] + 8024332: 4b1d ldr r3, [pc, #116] ; (80243a8 ) + 8024334: 607b str r3, [r7, #4] MPU_InitStruct.Size = MPU_REGION_SIZE_32KB; - 80242b2: 230e movs r3, #14 - 80242b4: 723b strb r3, [r7, #8] + 8024336: 230e movs r3, #14 + 8024338: 723b strb r3, [r7, #8] MPU_InitStruct.SubRegionDisable = 0x0; - 80242b6: 2300 movs r3, #0 - 80242b8: 727b strb r3, [r7, #9] + 802433a: 2300 movs r3, #0 + 802433c: 727b strb r3, [r7, #9] MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; - 80242ba: 2301 movs r3, #1 - 80242bc: 72bb strb r3, [r7, #10] + 802433e: 2301 movs r3, #1 + 8024340: 72bb strb r3, [r7, #10] MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; - 80242be: 2303 movs r3, #3 - 80242c0: 72fb strb r3, [r7, #11] + 8024342: 2303 movs r3, #3 + 8024344: 72fb strb r3, [r7, #11] MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE; - 80242c2: 2301 movs r3, #1 - 80242c4: 733b strb r3, [r7, #12] + 8024346: 2301 movs r3, #1 + 8024348: 733b strb r3, [r7, #12] MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - 80242c6: 2300 movs r3, #0 - 80242c8: 737b strb r3, [r7, #13] + 802434a: 2300 movs r3, #0 + 802434c: 737b strb r3, [r7, #13] MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; - 80242ca: 2300 movs r3, #0 - 80242cc: 73bb strb r3, [r7, #14] + 802434e: 2300 movs r3, #0 + 8024350: 73bb strb r3, [r7, #14] MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; - 80242ce: 2300 movs r3, #0 - 80242d0: 73fb strb r3, [r7, #15] + 8024352: 2300 movs r3, #0 + 8024354: 73fb strb r3, [r7, #15] HAL_MPU_ConfigRegion(&MPU_InitStruct); - 80242d2: 463b mov r3, r7 - 80242d4: 4618 mov r0, r3 - 80242d6: f003 fbe1 bl 8027a9c + 8024356: 463b mov r3, r7 + 8024358: 4618 mov r0, r3 + 802435a: f003 fbe1 bl 8027b20 /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Number = MPU_REGION_NUMBER1; - 80242da: 2301 movs r3, #1 - 80242dc: 707b strb r3, [r7, #1] + 802435e: 2301 movs r3, #1 + 8024360: 707b strb r3, [r7, #1] MPU_InitStruct.Size = MPU_REGION_SIZE_1KB; - 80242de: 2309 movs r3, #9 - 80242e0: 723b strb r3, [r7, #8] + 8024362: 2309 movs r3, #9 + 8024364: 723b strb r3, [r7, #8] MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; - 80242e2: 2300 movs r3, #0 - 80242e4: 72bb strb r3, [r7, #10] + 8024366: 2300 movs r3, #0 + 8024368: 72bb strb r3, [r7, #10] MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE; - 80242e6: 2301 movs r3, #1 - 80242e8: 737b strb r3, [r7, #13] + 802436a: 2301 movs r3, #1 + 802436c: 737b strb r3, [r7, #13] MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; - 80242ea: 2301 movs r3, #1 - 80242ec: 73fb strb r3, [r7, #15] + 802436e: 2301 movs r3, #1 + 8024370: 73fb strb r3, [r7, #15] HAL_MPU_ConfigRegion(&MPU_InitStruct); - 80242ee: 463b mov r3, r7 - 80242f0: 4618 mov r0, r3 - 80242f2: f003 fbd3 bl 8027a9c + 8024372: 463b mov r3, r7 + 8024374: 4618 mov r0, r3 + 8024376: f003 fbd3 bl 8027b20 /** Initializes and configures the Region and the memory to be protected */ MPU_InitStruct.Number = MPU_REGION_NUMBER2; - 80242f6: 2302 movs r3, #2 - 80242f8: 707b strb r3, [r7, #1] + 802437a: 2302 movs r3, #2 + 802437c: 707b strb r3, [r7, #1] MPU_InitStruct.BaseAddress = 0x30030000; - 80242fa: 4b0b ldr r3, [pc, #44] ; (8024328 ) - 80242fc: 607b str r3, [r7, #4] + 802437e: 4b0b ldr r3, [pc, #44] ; (80243ac ) + 8024380: 607b str r3, [r7, #4] MPU_InitStruct.Size = MPU_REGION_SIZE_32KB; - 80242fe: 230e movs r3, #14 - 8024300: 723b strb r3, [r7, #8] + 8024382: 230e movs r3, #14 + 8024384: 723b strb r3, [r7, #8] MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; - 8024302: 2301 movs r3, #1 - 8024304: 72bb strb r3, [r7, #10] + 8024386: 2301 movs r3, #1 + 8024388: 72bb strb r3, [r7, #10] MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; - 8024306: 2300 movs r3, #0 - 8024308: 737b strb r3, [r7, #13] + 802438a: 2300 movs r3, #0 + 802438c: 737b strb r3, [r7, #13] MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; - 802430a: 2300 movs r3, #0 - 802430c: 73fb strb r3, [r7, #15] + 802438e: 2300 movs r3, #0 + 8024390: 73fb strb r3, [r7, #15] HAL_MPU_ConfigRegion(&MPU_InitStruct); - 802430e: 463b mov r3, r7 - 8024310: 4618 mov r0, r3 - 8024312: f003 fbc3 bl 8027a9c + 8024392: 463b mov r3, r7 + 8024394: 4618 mov r0, r3 + 8024396: f003 fbc3 bl 8027b20 /* Enables the MPU */ HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); - 8024316: 2004 movs r0, #4 - 8024318: f003 fba0 bl 8027a5c + 802439a: 2004 movs r0, #4 + 802439c: f003 fba0 bl 8027ae0 } - 802431c: bf00 nop - 802431e: 3710 adds r7, #16 - 8024320: 46bd mov sp, r7 - 8024322: bd80 pop {r7, pc} - 8024324: 30040000 .word 0x30040000 - 8024328: 30030000 .word 0x30030000 + 80243a0: bf00 nop + 80243a2: 3710 adds r7, #16 + 80243a4: 46bd mov sp, r7 + 80243a6: bd80 pop {r7, pc} + 80243a8: 30040000 .word 0x30040000 + 80243ac: 30030000 .word 0x30030000 -0802432c : +080243b0 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 802432c: b480 push {r7} - 802432e: af00 add r7, sp, #0 + 80243b0: b480 push {r7} + 80243b2: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); - 8024330: b672 cpsid i + 80243b4: b672 cpsid i } - 8024332: bf00 nop + 80243b6: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) { - 8024334: e7fe b.n 8024334 + 80243b8: e7fe b.n 80243b8 ... -08024338 : +080243bc : QSPI_HandleTypeDef hqspi; /* QUADSPI init function */ void MX_QUADSPI_Init(void) { - 8024338: b580 push {r7, lr} - 802433a: af00 add r7, sp, #0 + 80243bc: b580 push {r7, lr} + 80243be: af00 add r7, sp, #0 /* USER CODE END QUADSPI_Init 0 */ /* USER CODE BEGIN QUADSPI_Init 1 */ /* USER CODE END QUADSPI_Init 1 */ hqspi.Instance = QUADSPI; - 802433c: 4b12 ldr r3, [pc, #72] ; (8024388 ) - 802433e: 4a13 ldr r2, [pc, #76] ; (802438c ) - 8024340: 601a str r2, [r3, #0] + 80243c0: 4b12 ldr r3, [pc, #72] ; (802440c ) + 80243c2: 4a13 ldr r2, [pc, #76] ; (8024410 ) + 80243c4: 601a str r2, [r3, #0] hqspi.Init.ClockPrescaler = 2-1; - 8024342: 4b11 ldr r3, [pc, #68] ; (8024388 ) - 8024344: 2201 movs r2, #1 - 8024346: 605a str r2, [r3, #4] + 80243c6: 4b11 ldr r3, [pc, #68] ; (802440c ) + 80243c8: 2201 movs r2, #1 + 80243ca: 605a str r2, [r3, #4] hqspi.Init.FifoThreshold = 32; - 8024348: 4b0f ldr r3, [pc, #60] ; (8024388 ) - 802434a: 2220 movs r2, #32 - 802434c: 609a str r2, [r3, #8] + 80243cc: 4b0f ldr r3, [pc, #60] ; (802440c ) + 80243ce: 2220 movs r2, #32 + 80243d0: 609a str r2, [r3, #8] hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE; - 802434e: 4b0e ldr r3, [pc, #56] ; (8024388 ) - 8024350: 2210 movs r2, #16 - 8024352: 60da str r2, [r3, #12] + 80243d2: 4b0e ldr r3, [pc, #56] ; (802440c ) + 80243d4: 2210 movs r2, #16 + 80243d6: 60da str r2, [r3, #12] hqspi.Init.FlashSize = 23+1; - 8024354: 4b0c ldr r3, [pc, #48] ; (8024388 ) - 8024356: 2218 movs r2, #24 - 8024358: 611a str r2, [r3, #16] + 80243d8: 4b0c ldr r3, [pc, #48] ; (802440c ) + 80243da: 2218 movs r2, #24 + 80243dc: 611a str r2, [r3, #16] hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_5_CYCLE; - 802435a: 4b0b ldr r3, [pc, #44] ; (8024388 ) - 802435c: f44f 6280 mov.w r2, #1024 ; 0x400 - 8024360: 615a str r2, [r3, #20] + 80243de: 4b0b ldr r3, [pc, #44] ; (802440c ) + 80243e0: f44f 6280 mov.w r2, #1024 ; 0x400 + 80243e4: 615a str r2, [r3, #20] hqspi.Init.ClockMode = QSPI_CLOCK_MODE_3; - 8024362: 4b09 ldr r3, [pc, #36] ; (8024388 ) - 8024364: 2201 movs r2, #1 - 8024366: 619a str r2, [r3, #24] + 80243e6: 4b09 ldr r3, [pc, #36] ; (802440c ) + 80243e8: 2201 movs r2, #1 + 80243ea: 619a str r2, [r3, #24] hqspi.Init.FlashID = QSPI_FLASH_ID_2; - 8024368: 4b07 ldr r3, [pc, #28] ; (8024388 ) - 802436a: 2280 movs r2, #128 ; 0x80 - 802436c: 61da str r2, [r3, #28] + 80243ec: 4b07 ldr r3, [pc, #28] ; (802440c ) + 80243ee: 2280 movs r2, #128 ; 0x80 + 80243f0: 61da str r2, [r3, #28] hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE; - 802436e: 4b06 ldr r3, [pc, #24] ; (8024388 ) - 8024370: 2200 movs r2, #0 - 8024372: 621a str r2, [r3, #32] + 80243f2: 4b06 ldr r3, [pc, #24] ; (802440c ) + 80243f4: 2200 movs r2, #0 + 80243f6: 621a str r2, [r3, #32] if (HAL_QSPI_Init(&hqspi) != HAL_OK) - 8024374: 4804 ldr r0, [pc, #16] ; (8024388 ) - 8024376: f00a fa6b bl 802e850 - 802437a: 4603 mov r3, r0 - 802437c: 2b00 cmp r3, #0 - 802437e: d001 beq.n 8024384 + 80243f8: 4804 ldr r0, [pc, #16] ; (802440c ) + 80243fa: f00a fa6b bl 802e8d4 + 80243fe: 4603 mov r3, r0 + 8024400: 2b00 cmp r3, #0 + 8024402: d001 beq.n 8024408 { Error_Handler(); - 8024380: f7ff ffd4 bl 802432c + 8024404: f7ff ffd4 bl 80243b0 } /* USER CODE BEGIN QUADSPI_Init 2 */ /* USER CODE END QUADSPI_Init 2 */ } - 8024384: bf00 nop - 8024386: bd80 pop {r7, pc} - 8024388: 2400af2c .word 0x2400af2c - 802438c: 52005000 .word 0x52005000 + 8024408: bf00 nop + 802440a: bd80 pop {r7, pc} + 802440c: 2400af34 .word 0x2400af34 + 8024410: 52005000 .word 0x52005000 -08024390 : +08024414 : void HAL_QSPI_MspInit(QSPI_HandleTypeDef* qspiHandle) { - 8024390: b580 push {r7, lr} - 8024392: b0ba sub sp, #232 ; 0xe8 - 8024394: af00 add r7, sp, #0 - 8024396: 6078 str r0, [r7, #4] + 8024414: b580 push {r7, lr} + 8024416: b0ba sub sp, #232 ; 0xe8 + 8024418: af00 add r7, sp, #0 + 802441a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8024398: f107 03d4 add.w r3, r7, #212 ; 0xd4 - 802439c: 2200 movs r2, #0 - 802439e: 601a str r2, [r3, #0] - 80243a0: 605a str r2, [r3, #4] - 80243a2: 609a str r2, [r3, #8] - 80243a4: 60da str r2, [r3, #12] - 80243a6: 611a str r2, [r3, #16] + 802441c: f107 03d4 add.w r3, r7, #212 ; 0xd4 + 8024420: 2200 movs r2, #0 + 8024422: 601a str r2, [r3, #0] + 8024424: 605a str r2, [r3, #4] + 8024426: 609a str r2, [r3, #8] + 8024428: 60da str r2, [r3, #12] + 802442a: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 80243a8: f107 0318 add.w r3, r7, #24 - 80243ac: 22bc movs r2, #188 ; 0xbc - 80243ae: 2100 movs r1, #0 - 80243b0: 4618 mov r0, r3 - 80243b2: f01c fac5 bl 8040940 + 802442c: f107 0318 add.w r3, r7, #24 + 8024430: 22bc movs r2, #188 ; 0xbc + 8024432: 2100 movs r1, #0 + 8024434: 4618 mov r0, r3 + 8024436: f01c fac5 bl 80409c4 if(qspiHandle->Instance==QUADSPI) - 80243b6: 687b ldr r3, [r7, #4] - 80243b8: 681b ldr r3, [r3, #0] - 80243ba: 4a4e ldr r2, [pc, #312] ; (80244f4 ) - 80243bc: 4293 cmp r3, r2 - 80243be: f040 8094 bne.w 80244ea + 802443a: 687b ldr r3, [r7, #4] + 802443c: 681b ldr r3, [r3, #0] + 802443e: 4a4e ldr r2, [pc, #312] ; (8024578 ) + 8024440: 4293 cmp r3, r2 + 8024442: f040 8094 bne.w 802456e /* USER CODE END QUADSPI_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_QSPI; - 80243c2: f04f 7300 mov.w r3, #33554432 ; 0x2000000 - 80243c6: 61bb str r3, [r7, #24] + 8024446: f04f 7300 mov.w r3, #33554432 ; 0x2000000 + 802444a: 61bb str r3, [r7, #24] PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK; - 80243c8: 2300 movs r3, #0 - 80243ca: 663b str r3, [r7, #96] ; 0x60 + 802444c: 2300 movs r3, #0 + 802444e: 663b str r3, [r7, #96] ; 0x60 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 80243cc: f107 0318 add.w r3, r7, #24 - 80243d0: 4618 mov r0, r3 - 80243d2: f00b fced bl 802fdb0 - 80243d6: 4603 mov r3, r0 - 80243d8: 2b00 cmp r3, #0 - 80243da: d001 beq.n 80243e0 + 8024450: f107 0318 add.w r3, r7, #24 + 8024454: 4618 mov r0, r3 + 8024456: f00b fced bl 802fe34 + 802445a: 4603 mov r3, r0 + 802445c: 2b00 cmp r3, #0 + 802445e: d001 beq.n 8024464 { Error_Handler(); - 80243dc: f7ff ffa6 bl 802432c + 8024460: f7ff ffa6 bl 80243b0 } /* QUADSPI clock enable */ __HAL_RCC_QSPI_CLK_ENABLE(); - 80243e0: 4b45 ldr r3, [pc, #276] ; (80244f8 ) - 80243e2: f8d3 30d4 ldr.w r3, [r3, #212] ; 0xd4 - 80243e6: 4a44 ldr r2, [pc, #272] ; (80244f8 ) - 80243e8: f443 4380 orr.w r3, r3, #16384 ; 0x4000 - 80243ec: f8c2 30d4 str.w r3, [r2, #212] ; 0xd4 - 80243f0: 4b41 ldr r3, [pc, #260] ; (80244f8 ) - 80243f2: f8d3 30d4 ldr.w r3, [r3, #212] ; 0xd4 - 80243f6: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 80243fa: 617b str r3, [r7, #20] - 80243fc: 697b ldr r3, [r7, #20] + 8024464: 4b45 ldr r3, [pc, #276] ; (802457c ) + 8024466: f8d3 30d4 ldr.w r3, [r3, #212] ; 0xd4 + 802446a: 4a44 ldr r2, [pc, #272] ; (802457c ) + 802446c: f443 4380 orr.w r3, r3, #16384 ; 0x4000 + 8024470: f8c2 30d4 str.w r3, [r2, #212] ; 0xd4 + 8024474: 4b41 ldr r3, [pc, #260] ; (802457c ) + 8024476: f8d3 30d4 ldr.w r3, [r3, #212] ; 0xd4 + 802447a: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 802447e: 617b str r3, [r7, #20] + 8024480: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOB_CLK_ENABLE(); - 80243fe: 4b3e ldr r3, [pc, #248] ; (80244f8 ) - 8024400: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8024404: 4a3c ldr r2, [pc, #240] ; (80244f8 ) - 8024406: f043 0302 orr.w r3, r3, #2 - 802440a: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 802440e: 4b3a ldr r3, [pc, #232] ; (80244f8 ) - 8024410: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8024414: f003 0302 and.w r3, r3, #2 - 8024418: 613b str r3, [r7, #16] - 802441a: 693b ldr r3, [r7, #16] + 8024482: 4b3e ldr r3, [pc, #248] ; (802457c ) + 8024484: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8024488: 4a3c ldr r2, [pc, #240] ; (802457c ) + 802448a: f043 0302 orr.w r3, r3, #2 + 802448e: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8024492: 4b3a ldr r3, [pc, #232] ; (802457c ) + 8024494: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8024498: f003 0302 and.w r3, r3, #2 + 802449c: 613b str r3, [r7, #16] + 802449e: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOE_CLK_ENABLE(); - 802441c: 4b36 ldr r3, [pc, #216] ; (80244f8 ) - 802441e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8024422: 4a35 ldr r2, [pc, #212] ; (80244f8 ) - 8024424: f043 0310 orr.w r3, r3, #16 - 8024428: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 802442c: 4b32 ldr r3, [pc, #200] ; (80244f8 ) - 802442e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8024432: f003 0310 and.w r3, r3, #16 - 8024436: 60fb str r3, [r7, #12] - 8024438: 68fb ldr r3, [r7, #12] + 80244a0: 4b36 ldr r3, [pc, #216] ; (802457c ) + 80244a2: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80244a6: 4a35 ldr r2, [pc, #212] ; (802457c ) + 80244a8: f043 0310 orr.w r3, r3, #16 + 80244ac: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 80244b0: 4b32 ldr r3, [pc, #200] ; (802457c ) + 80244b2: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80244b6: f003 0310 and.w r3, r3, #16 + 80244ba: 60fb str r3, [r7, #12] + 80244bc: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOC_CLK_ENABLE(); - 802443a: 4b2f ldr r3, [pc, #188] ; (80244f8 ) - 802443c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8024440: 4a2d ldr r2, [pc, #180] ; (80244f8 ) - 8024442: f043 0304 orr.w r3, r3, #4 - 8024446: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 802444a: 4b2b ldr r3, [pc, #172] ; (80244f8 ) - 802444c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8024450: f003 0304 and.w r3, r3, #4 - 8024454: 60bb str r3, [r7, #8] - 8024456: 68bb ldr r3, [r7, #8] + 80244be: 4b2f ldr r3, [pc, #188] ; (802457c ) + 80244c0: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80244c4: 4a2d ldr r2, [pc, #180] ; (802457c ) + 80244c6: f043 0304 orr.w r3, r3, #4 + 80244ca: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 80244ce: 4b2b ldr r3, [pc, #172] ; (802457c ) + 80244d0: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80244d4: f003 0304 and.w r3, r3, #4 + 80244d8: 60bb str r3, [r7, #8] + 80244da: 68bb ldr r3, [r7, #8] PE8 ------> QUADSPI_BK2_IO1 PE9 ------> QUADSPI_BK2_IO2 PE10 ------> QUADSPI_BK2_IO3 PC11 ------> QUADSPI_BK2_NCS */ GPIO_InitStruct.Pin = GPIO_PIN_2; - 8024458: 2304 movs r3, #4 - 802445a: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 + 80244dc: 2304 movs r3, #4 + 80244de: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 802445e: 2302 movs r3, #2 - 8024460: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 80244e2: 2302 movs r3, #2 + 80244e4: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8024464: 2300 movs r3, #0 - 8024466: f8c7 30dc str.w r3, [r7, #220] ; 0xdc + 80244e8: 2300 movs r3, #0 + 80244ea: f8c7 30dc str.w r3, [r7, #220] ; 0xdc GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 802446a: 2303 movs r3, #3 - 802446c: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 80244ee: 2303 movs r3, #3 + 80244f0: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; - 8024470: 2309 movs r3, #9 - 8024472: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 80244f4: 2309 movs r3, #9 + 80244f6: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8024476: f107 03d4 add.w r3, r7, #212 ; 0xd4 - 802447a: 4619 mov r1, r3 - 802447c: 481f ldr r0, [pc, #124] ; (80244fc ) - 802447e: f008 fff5 bl 802d46c + 80244fa: f107 03d4 add.w r3, r7, #212 ; 0xd4 + 80244fe: 4619 mov r1, r3 + 8024500: 481f ldr r0, [pc, #124] ; (8024580 ) + 8024502: f008 fff5 bl 802d4f0 GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10; - 8024482: f44f 63f0 mov.w r3, #1920 ; 0x780 - 8024486: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 + 8024506: f44f 63f0 mov.w r3, #1920 ; 0x780 + 802450a: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 802448a: 2302 movs r3, #2 - 802448c: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 802450e: 2302 movs r3, #2 + 8024510: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8024490: 2300 movs r3, #0 - 8024492: f8c7 30dc str.w r3, [r7, #220] ; 0xdc + 8024514: 2300 movs r3, #0 + 8024516: f8c7 30dc str.w r3, [r7, #220] ; 0xdc GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8024496: 2303 movs r3, #3 - 8024498: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 802451a: 2303 movs r3, #3 + 802451c: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; - 802449c: 230a movs r3, #10 - 802449e: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 8024520: 230a movs r3, #10 + 8024522: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 80244a2: f107 03d4 add.w r3, r7, #212 ; 0xd4 - 80244a6: 4619 mov r1, r3 - 80244a8: 4815 ldr r0, [pc, #84] ; (8024500 ) - 80244aa: f008 ffdf bl 802d46c + 8024526: f107 03d4 add.w r3, r7, #212 ; 0xd4 + 802452a: 4619 mov r1, r3 + 802452c: 4815 ldr r0, [pc, #84] ; (8024584 ) + 802452e: f008 ffdf bl 802d4f0 GPIO_InitStruct.Pin = GPIO_PIN_11; - 80244ae: f44f 6300 mov.w r3, #2048 ; 0x800 - 80244b2: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 + 8024532: f44f 6300 mov.w r3, #2048 ; 0x800 + 8024536: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80244b6: 2302 movs r3, #2 - 80244b8: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 802453a: 2302 movs r3, #2 + 802453c: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 GPIO_InitStruct.Pull = GPIO_NOPULL; - 80244bc: 2300 movs r3, #0 - 80244be: f8c7 30dc str.w r3, [r7, #220] ; 0xdc + 8024540: 2300 movs r3, #0 + 8024542: f8c7 30dc str.w r3, [r7, #220] ; 0xdc GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 80244c2: 2303 movs r3, #3 - 80244c4: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 8024546: 2303 movs r3, #3 + 8024548: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; - 80244c8: 2309 movs r3, #9 - 80244ca: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 802454c: 2309 movs r3, #9 + 802454e: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 80244ce: f107 03d4 add.w r3, r7, #212 ; 0xd4 - 80244d2: 4619 mov r1, r3 - 80244d4: 480b ldr r0, [pc, #44] ; (8024504 ) - 80244d6: f008 ffc9 bl 802d46c + 8024552: f107 03d4 add.w r3, r7, #212 ; 0xd4 + 8024556: 4619 mov r1, r3 + 8024558: 480b ldr r0, [pc, #44] ; (8024588 ) + 802455a: f008 ffc9 bl 802d4f0 /* QUADSPI interrupt Init */ HAL_NVIC_SetPriority(QUADSPI_IRQn, 0, 0); - 80244da: 2200 movs r2, #0 - 80244dc: 2100 movs r1, #0 - 80244de: 205c movs r0, #92 ; 0x5c - 80244e0: f003 fa6f bl 80279c2 + 802455e: 2200 movs r2, #0 + 8024560: 2100 movs r1, #0 + 8024562: 205c movs r0, #92 ; 0x5c + 8024564: f003 fa6f bl 8027a46 HAL_NVIC_EnableIRQ(QUADSPI_IRQn); - 80244e4: 205c movs r0, #92 ; 0x5c - 80244e6: f003 fa86 bl 80279f6 + 8024568: 205c movs r0, #92 ; 0x5c + 802456a: f003 fa86 bl 8027a7a /* USER CODE BEGIN QUADSPI_MspInit 1 */ /* USER CODE END QUADSPI_MspInit 1 */ } } - 80244ea: bf00 nop - 80244ec: 37e8 adds r7, #232 ; 0xe8 - 80244ee: 46bd mov sp, r7 - 80244f0: bd80 pop {r7, pc} - 80244f2: bf00 nop - 80244f4: 52005000 .word 0x52005000 - 80244f8: 58024400 .word 0x58024400 - 80244fc: 58020400 .word 0x58020400 - 8024500: 58021000 .word 0x58021000 - 8024504: 58020800 .word 0x58020800 + 802456e: bf00 nop + 8024570: 37e8 adds r7, #232 ; 0xe8 + 8024572: 46bd mov sp, r7 + 8024574: bd80 pop {r7, pc} + 8024576: bf00 nop + 8024578: 52005000 .word 0x52005000 + 802457c: 58024400 .word 0x58024400 + 8024580: 58020400 .word 0x58020400 + 8024584: 58021000 .word 0x58021000 + 8024588: 58020800 .word 0x58020800 -08024508 : +0802458c : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8024508: b480 push {r7} - 802450a: b083 sub sp, #12 - 802450c: af00 add r7, sp, #0 + 802458c: b480 push {r7} + 802458e: b083 sub sp, #12 + 8024590: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 802450e: 4b0a ldr r3, [pc, #40] ; (8024538 ) - 8024510: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 8024514: 4a08 ldr r2, [pc, #32] ; (8024538 ) - 8024516: f043 0302 orr.w r3, r3, #2 - 802451a: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 - 802451e: 4b06 ldr r3, [pc, #24] ; (8024538 ) - 8024520: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 8024524: f003 0302 and.w r3, r3, #2 - 8024528: 607b str r3, [r7, #4] - 802452a: 687b ldr r3, [r7, #4] + 8024592: 4b0a ldr r3, [pc, #40] ; (80245bc ) + 8024594: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 8024598: 4a08 ldr r2, [pc, #32] ; (80245bc ) + 802459a: f043 0302 orr.w r3, r3, #2 + 802459e: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 + 80245a2: 4b06 ldr r3, [pc, #24] ; (80245bc ) + 80245a4: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 80245a8: f003 0302 and.w r3, r3, #2 + 80245ac: 607b str r3, [r7, #4] + 80245ae: 687b ldr r3, [r7, #4] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 802452c: bf00 nop - 802452e: 370c adds r7, #12 - 8024530: 46bd mov sp, r7 - 8024532: f85d 7b04 ldr.w r7, [sp], #4 - 8024536: 4770 bx lr - 8024538: 58024400 .word 0x58024400 + 80245b0: bf00 nop + 80245b2: 370c adds r7, #12 + 80245b4: 46bd mov sp, r7 + 80245b6: f85d 7b04 ldr.w r7, [sp], #4 + 80245ba: 4770 bx lr + 80245bc: 58024400 .word 0x58024400 -0802453c : +080245c0 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 802453c: b480 push {r7} - 802453e: af00 add r7, sp, #0 + 80245c0: b480 push {r7} + 80245c2: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8024540: e7fe b.n 8024540 + 80245c4: e7fe b.n 80245c4 -08024542 : +080245c6 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8024542: b480 push {r7} - 8024544: af00 add r7, sp, #0 + 80245c6: b480 push {r7} + 80245c8: af00 add r7, sp, #0 /* USER CODE END HardFault_IRQn 0 */ while (1) - 8024546: e7fe b.n 8024546 + 80245ca: e7fe b.n 80245ca -08024548 : +080245cc : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8024548: b480 push {r7} - 802454a: af00 add r7, sp, #0 + 80245cc: b480 push {r7} + 80245ce: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 802454c: e7fe b.n 802454c + 80245d0: e7fe b.n 80245d0 -0802454e : +080245d2 : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { - 802454e: b480 push {r7} - 8024550: af00 add r7, sp, #0 + 80245d2: b480 push {r7} + 80245d4: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 8024552: e7fe b.n 8024552 + 80245d6: e7fe b.n 80245d6 -08024554 : +080245d8 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 8024554: b480 push {r7} - 8024556: af00 add r7, sp, #0 + 80245d8: b480 push {r7} + 80245da: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8024558: e7fe b.n 8024558 + 80245dc: e7fe b.n 80245dc -0802455a : +080245de : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 802455a: b480 push {r7} - 802455c: af00 add r7, sp, #0 + 80245de: b480 push {r7} + 80245e0: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 802455e: bf00 nop - 8024560: 46bd mov sp, r7 - 8024562: f85d 7b04 ldr.w r7, [sp], #4 - 8024566: 4770 bx lr + 80245e2: bf00 nop + 80245e4: 46bd mov sp, r7 + 80245e6: f85d 7b04 ldr.w r7, [sp], #4 + 80245ea: 4770 bx lr -08024568 : +080245ec : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8024568: b480 push {r7} - 802456a: af00 add r7, sp, #0 + 80245ec: b480 push {r7} + 80245ee: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 802456c: bf00 nop - 802456e: 46bd mov sp, r7 - 8024570: f85d 7b04 ldr.w r7, [sp], #4 - 8024574: 4770 bx lr + 80245f0: bf00 nop + 80245f2: 46bd mov sp, r7 + 80245f4: f85d 7b04 ldr.w r7, [sp], #4 + 80245f8: 4770 bx lr -08024576 : +080245fa : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8024576: b480 push {r7} - 8024578: af00 add r7, sp, #0 + 80245fa: b480 push {r7} + 80245fc: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 802457a: bf00 nop - 802457c: 46bd mov sp, r7 - 802457e: f85d 7b04 ldr.w r7, [sp], #4 - 8024582: 4770 bx lr + 80245fe: bf00 nop + 8024600: 46bd mov sp, r7 + 8024602: f85d 7b04 ldr.w r7, [sp], #4 + 8024606: 4770 bx lr -08024584 : +08024608 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8024584: b580 push {r7, lr} - 8024586: af00 add r7, sp, #0 + 8024608: b580 push {r7, lr} + 802460a: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8024588: f001 fd08 bl 8025f9c + 802460c: f001 fd08 bl 8026020 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 802458c: bf00 nop - 802458e: bd80 pop {r7, pc} + 8024610: bf00 nop + 8024612: bd80 pop {r7, pc} -08024590 : +08024614 : /** * @brief This function handles DMA1 stream0 global interrupt. */ void DMA1_Stream0_IRQHandler(void) { - 8024590: b580 push {r7, lr} - 8024592: af00 add r7, sp, #0 + 8024614: b580 push {r7, lr} + 8024616: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream0_IRQn 0 */ /* USER CODE END DMA1_Stream0_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_uart4_tx); - 8024594: 4802 ldr r0, [pc, #8] ; (80245a0 ) - 8024596: f004 fdef bl 8029178 + 8024618: 4802 ldr r0, [pc, #8] ; (8024624 ) + 802461a: f004 fdef bl 80291fc /* USER CODE BEGIN DMA1_Stream0_IRQn 1 */ /* USER CODE END DMA1_Stream0_IRQn 1 */ } - 802459a: bf00 nop - 802459c: bd80 pop {r7, pc} - 802459e: bf00 nop - 80245a0: 2400b50c .word 0x2400b50c + 802461e: bf00 nop + 8024620: bd80 pop {r7, pc} + 8024622: bf00 nop + 8024624: 2400b514 .word 0x2400b514 -080245a4 : +08024628 : /** * @brief This function handles DMA1 stream1 global interrupt. */ void DMA1_Stream1_IRQHandler(void) { - 80245a4: b580 push {r7, lr} - 80245a6: af00 add r7, sp, #0 + 8024628: b580 push {r7, lr} + 802462a: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream1_IRQn 0 */ /* USER CODE END DMA1_Stream1_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_uart5_tx); - 80245a8: 4802 ldr r0, [pc, #8] ; (80245b4 ) - 80245aa: f004 fde5 bl 8029178 + 802462c: 4802 ldr r0, [pc, #8] ; (8024638 ) + 802462e: f004 fde5 bl 80291fc /* USER CODE BEGIN DMA1_Stream1_IRQn 1 */ /* USER CODE END DMA1_Stream1_IRQn 1 */ } - 80245ae: bf00 nop - 80245b0: bd80 pop {r7, pc} - 80245b2: bf00 nop - 80245b4: 2400b584 .word 0x2400b584 + 8024632: bf00 nop + 8024634: bd80 pop {r7, pc} + 8024636: bf00 nop + 8024638: 2400b58c .word 0x2400b58c -080245b8 : +0802463c : /** * @brief This function handles DMA1 stream2 global interrupt. */ void DMA1_Stream2_IRQHandler(void) { - 80245b8: b580 push {r7, lr} - 80245ba: af00 add r7, sp, #0 + 802463c: b580 push {r7, lr} + 802463e: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream2_IRQn 0 */ /* USER CODE END DMA1_Stream2_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_tx); - 80245bc: 4802 ldr r0, [pc, #8] ; (80245c8 ) - 80245be: f004 fddb bl 8029178 + 8024640: 4802 ldr r0, [pc, #8] ; (802464c ) + 8024642: f004 fddb bl 80291fc /* USER CODE BEGIN DMA1_Stream2_IRQn 1 */ /* USER CODE END DMA1_Stream2_IRQn 1 */ } - 80245c2: bf00 nop - 80245c4: bd80 pop {r7, pc} - 80245c6: bf00 nop - 80245c8: 2400b674 .word 0x2400b674 + 8024646: bf00 nop + 8024648: bd80 pop {r7, pc} + 802464a: bf00 nop + 802464c: 2400b67c .word 0x2400b67c -080245cc : +08024650 : /** * @brief This function handles DMA1 stream3 global interrupt. */ void DMA1_Stream3_IRQHandler(void) { - 80245cc: b580 push {r7, lr} - 80245ce: af00 add r7, sp, #0 + 8024650: b580 push {r7, lr} + 8024652: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream3_IRQn 0 */ /* USER CODE END DMA1_Stream3_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_uart7_tx); - 80245d0: 4802 ldr r0, [pc, #8] ; (80245dc ) - 80245d2: f004 fdd1 bl 8029178 + 8024654: 4802 ldr r0, [pc, #8] ; (8024660 ) + 8024656: f004 fdd1 bl 80291fc /* USER CODE BEGIN DMA1_Stream3_IRQn 1 */ /* USER CODE END DMA1_Stream3_IRQn 1 */ } - 80245d6: bf00 nop - 80245d8: bd80 pop {r7, pc} - 80245da: bf00 nop - 80245dc: 2400b5fc .word 0x2400b5fc + 802465a: bf00 nop + 802465c: bd80 pop {r7, pc} + 802465e: bf00 nop + 8024660: 2400b604 .word 0x2400b604 -080245e0 : +08024664 : /** * @brief This function handles DMA1 stream4 global interrupt. */ void DMA1_Stream4_IRQHandler(void) { - 80245e0: b580 push {r7, lr} - 80245e2: af00 add r7, sp, #0 + 8024664: b580 push {r7, lr} + 8024666: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream4_IRQn 0 */ /* USER CODE END DMA1_Stream4_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart2_tx); - 80245e4: 4802 ldr r0, [pc, #8] ; (80245f0 ) - 80245e6: f004 fdc7 bl 8029178 + 8024668: 4802 ldr r0, [pc, #8] ; (8024674 ) + 802466a: f004 fdc7 bl 80291fc /* USER CODE BEGIN DMA1_Stream4_IRQn 1 */ /* USER CODE END DMA1_Stream4_IRQn 1 */ } - 80245ea: bf00 nop - 80245ec: bd80 pop {r7, pc} - 80245ee: bf00 nop - 80245f0: 2400b6ec .word 0x2400b6ec + 802466e: bf00 nop + 8024670: bd80 pop {r7, pc} + 8024672: bf00 nop + 8024674: 2400b6f4 .word 0x2400b6f4 -080245f4 : +08024678 : /** * @brief This function handles DMA1 stream5 global interrupt. */ void DMA1_Stream5_IRQHandler(void) { - 80245f4: b580 push {r7, lr} - 80245f6: af00 add r7, sp, #0 + 8024678: b580 push {r7, lr} + 802467a: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */ /* USER CODE END DMA1_Stream5_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart3_tx); - 80245f8: 4802 ldr r0, [pc, #8] ; (8024604 ) - 80245fa: f004 fdbd bl 8029178 + 802467c: 4802 ldr r0, [pc, #8] ; (8024688 ) + 802467e: f004 fdbd bl 80291fc /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */ /* USER CODE END DMA1_Stream5_IRQn 1 */ } - 80245fe: bf00 nop - 8024600: bd80 pop {r7, pc} - 8024602: bf00 nop - 8024604: 2400b764 .word 0x2400b764 + 8024682: bf00 nop + 8024684: bd80 pop {r7, pc} + 8024686: bf00 nop + 8024688: 2400b76c .word 0x2400b76c -08024608 : +0802468c : /** * @brief This function handles DMA1 stream6 global interrupt. */ void DMA1_Stream6_IRQHandler(void) { - 8024608: b580 push {r7, lr} - 802460a: af00 add r7, sp, #0 + 802468c: b580 push {r7, lr} + 802468e: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Stream6_IRQn 0 */ /* USER CODE END DMA1_Stream6_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart6_tx); - 802460c: 4802 ldr r0, [pc, #8] ; (8024618 ) - 802460e: f004 fdb3 bl 8029178 + 8024690: 4802 ldr r0, [pc, #8] ; (802469c ) + 8024692: f004 fdb3 bl 80291fc /* USER CODE BEGIN DMA1_Stream6_IRQn 1 */ /* USER CODE END DMA1_Stream6_IRQn 1 */ } - 8024612: bf00 nop - 8024614: bd80 pop {r7, pc} - 8024616: bf00 nop - 8024618: 2400b7dc .word 0x2400b7dc + 8024696: bf00 nop + 8024698: bd80 pop {r7, pc} + 802469a: bf00 nop + 802469c: 2400b7e4 .word 0x2400b7e4 -0802461c : +080246a0 : /** * @brief This function handles FDCAN1 interrupt 0. */ void FDCAN1_IT0_IRQHandler(void) { - 802461c: b580 push {r7, lr} - 802461e: af00 add r7, sp, #0 + 80246a0: b580 push {r7, lr} + 80246a2: af00 add r7, sp, #0 /* USER CODE BEGIN FDCAN1_IT0_IRQn 0 */ /* USER CODE END FDCAN1_IT0_IRQn 0 */ HAL_FDCAN_IRQHandler(&hfdcan1); - 8024620: 4802 ldr r0, [pc, #8] ; (802462c ) - 8024622: f008 fa21 bl 802ca68 + 80246a4: 4802 ldr r0, [pc, #8] ; (80246b0 ) + 80246a6: f008 fa21 bl 802caec /* USER CODE BEGIN FDCAN1_IT0_IRQn 1 */ /* USER CODE END FDCAN1_IT0_IRQn 1 */ } - 8024626: bf00 nop - 8024628: bd80 pop {r7, pc} - 802462a: bf00 nop - 802462c: 2400ad98 .word 0x2400ad98 + 80246aa: bf00 nop + 80246ac: bd80 pop {r7, pc} + 80246ae: bf00 nop + 80246b0: 2400ad98 .word 0x2400ad98 -08024630 : +080246b4 : /** * @brief This function handles FDCAN2 interrupt 0. */ void FDCAN2_IT0_IRQHandler(void) { - 8024630: b580 push {r7, lr} - 8024632: af00 add r7, sp, #0 + 80246b4: b580 push {r7, lr} + 80246b6: af00 add r7, sp, #0 /* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */ /* USER CODE END FDCAN2_IT0_IRQn 0 */ HAL_FDCAN_IRQHandler(&hfdcan2); - 8024634: 4802 ldr r0, [pc, #8] ; (8024640 ) - 8024636: f008 fa17 bl 802ca68 + 80246b8: 4802 ldr r0, [pc, #8] ; (80246c4 ) + 80246ba: f008 fa17 bl 802caec /* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */ /* USER CODE END FDCAN2_IT0_IRQn 1 */ } - 802463a: bf00 nop - 802463c: bd80 pop {r7, pc} - 802463e: bf00 nop - 8024640: 2400ae38 .word 0x2400ae38 + 80246be: bf00 nop + 80246c0: bd80 pop {r7, pc} + 80246c2: bf00 nop + 80246c4: 2400ae38 .word 0x2400ae38 -08024644 : +080246c8 : /** * @brief This function handles TIM1 update interrupt. */ void TIM1_UP_IRQHandler(void) { - 8024644: b580 push {r7, lr} - 8024646: af00 add r7, sp, #0 + 80246c8: b580 push {r7, lr} + 80246ca: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_UP_IRQn 0 */ /* USER CODE END TIM1_UP_IRQn 0 */ HAL_TIM_IRQHandler(&htim1); - 8024648: 4802 ldr r0, [pc, #8] ; (8024654 ) - 802464a: f00d fe0d bl 8032268 + 80246cc: 4802 ldr r0, [pc, #8] ; (80246d8 ) + 80246ce: f00d fe0d bl 80322ec /* USER CODE BEGIN TIM1_UP_IRQn 1 */ /* USER CODE END TIM1_UP_IRQn 1 */ } - 802464e: bf00 nop - 8024650: bd80 pop {r7, pc} - 8024652: bf00 nop - 8024654: 2400af7c .word 0x2400af7c + 80246d2: bf00 nop + 80246d4: bd80 pop {r7, pc} + 80246d6: bf00 nop + 80246d8: 2400af84 .word 0x2400af84 -08024658 : +080246dc : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { - 8024658: b580 push {r7, lr} - 802465a: af00 add r7, sp, #0 + 80246dc: b580 push {r7, lr} + 80246de: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); - 802465c: 4802 ldr r0, [pc, #8] ; (8024668 ) - 802465e: f00e fbf5 bl 8032e4c + 80246e0: 4802 ldr r0, [pc, #8] ; (80246ec ) + 80246e2: f00e fbf5 bl 8032ed0 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } - 8024662: bf00 nop - 8024664: bd80 pop {r7, pc} - 8024666: bf00 nop - 8024668: 2400b254 .word 0x2400b254 + 80246e6: bf00 nop + 80246e8: bd80 pop {r7, pc} + 80246ea: bf00 nop + 80246ec: 2400b25c .word 0x2400b25c -0802466c : +080246f0 : /** * @brief This function handles USART2 global interrupt. */ void USART2_IRQHandler(void) { - 802466c: b580 push {r7, lr} - 802466e: af00 add r7, sp, #0 + 80246f0: b580 push {r7, lr} + 80246f2: af00 add r7, sp, #0 /* USER CODE BEGIN USART2_IRQn 0 */ /* USER CODE END USART2_IRQn 0 */ HAL_UART_IRQHandler(&huart2); - 8024670: 4802 ldr r0, [pc, #8] ; (802467c ) - 8024672: f00e fbeb bl 8032e4c + 80246f4: 4802 ldr r0, [pc, #8] ; (8024700 ) + 80246f6: f00e fbeb bl 8032ed0 /* USER CODE BEGIN USART2_IRQn 1 */ /* USER CODE END USART2_IRQn 1 */ } - 8024676: bf00 nop - 8024678: bd80 pop {r7, pc} - 802467a: bf00 nop - 802467c: 2400b2e4 .word 0x2400b2e4 + 80246fa: bf00 nop + 80246fc: bd80 pop {r7, pc} + 80246fe: bf00 nop + 8024700: 2400b2ec .word 0x2400b2ec -08024680 : +08024704 : /** * @brief This function handles USART3 global interrupt. */ void USART3_IRQHandler(void) { - 8024680: b580 push {r7, lr} - 8024682: af00 add r7, sp, #0 + 8024704: b580 push {r7, lr} + 8024706: af00 add r7, sp, #0 /* USER CODE BEGIN USART3_IRQn 0 */ /* USER CODE END USART3_IRQn 0 */ HAL_UART_IRQHandler(&huart3); - 8024684: 4802 ldr r0, [pc, #8] ; (8024690 ) - 8024686: f00e fbe1 bl 8032e4c + 8024708: 4802 ldr r0, [pc, #8] ; (8024714 ) + 802470a: f00e fbe1 bl 8032ed0 /* USER CODE BEGIN USART3_IRQn 1 */ /* USER CODE END USART3_IRQn 1 */ } - 802468a: bf00 nop - 802468c: bd80 pop {r7, pc} - 802468e: bf00 nop - 8024690: 2400b374 .word 0x2400b374 + 802470e: bf00 nop + 8024710: bd80 pop {r7, pc} + 8024712: bf00 nop + 8024714: 2400b37c .word 0x2400b37c -08024694 : +08024718 : /** * @brief This function handles TIM8 update interrupt and TIM13 global interrupt. */ void TIM8_UP_TIM13_IRQHandler(void) { - 8024694: b580 push {r7, lr} - 8024696: af00 add r7, sp, #0 + 8024718: b580 push {r7, lr} + 802471a: af00 add r7, sp, #0 /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */ /* USER CODE END TIM8_UP_TIM13_IRQn 0 */ HAL_TIM_IRQHandler(&htim8); - 8024698: 4802 ldr r0, [pc, #8] ; (80246a4 ) - 802469a: f00d fde5 bl 8032268 + 802471c: 4802 ldr r0, [pc, #8] ; (8024728 ) + 802471e: f00d fde5 bl 80322ec /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */ /* USER CODE END TIM8_UP_TIM13_IRQn 1 */ } - 802469e: bf00 nop - 80246a0: bd80 pop {r7, pc} - 80246a2: bf00 nop - 80246a4: 2400afc8 .word 0x2400afc8 + 8024722: bf00 nop + 8024724: bd80 pop {r7, pc} + 8024726: bf00 nop + 8024728: 2400afd0 .word 0x2400afd0 -080246a8 : +0802472c : /** * @brief This function handles UART4 global interrupt. */ void UART4_IRQHandler(void) { - 80246a8: b580 push {r7, lr} - 80246aa: af00 add r7, sp, #0 + 802472c: b580 push {r7, lr} + 802472e: af00 add r7, sp, #0 /* USER CODE BEGIN UART4_IRQn 0 */ /* USER CODE END UART4_IRQn 0 */ HAL_UART_IRQHandler(&huart4); - 80246ac: 4802 ldr r0, [pc, #8] ; (80246b8 ) - 80246ae: f00e fbcd bl 8032e4c + 8024730: 4802 ldr r0, [pc, #8] ; (802473c ) + 8024732: f00e fbcd bl 8032ed0 /* USER CODE BEGIN UART4_IRQn 1 */ /* USER CODE END UART4_IRQn 1 */ } - 80246b2: bf00 nop - 80246b4: bd80 pop {r7, pc} - 80246b6: bf00 nop - 80246b8: 2400b0a4 .word 0x2400b0a4 + 8024736: bf00 nop + 8024738: bd80 pop {r7, pc} + 802473a: bf00 nop + 802473c: 2400b0ac .word 0x2400b0ac -080246bc : +08024740 : /** * @brief This function handles UART5 global interrupt. */ void UART5_IRQHandler(void) { - 80246bc: b580 push {r7, lr} - 80246be: af00 add r7, sp, #0 + 8024740: b580 push {r7, lr} + 8024742: af00 add r7, sp, #0 /* USER CODE BEGIN UART5_IRQn 0 */ /* USER CODE END UART5_IRQn 0 */ HAL_UART_IRQHandler(&huart5); - 80246c0: 4802 ldr r0, [pc, #8] ; (80246cc ) - 80246c2: f00e fbc3 bl 8032e4c + 8024744: 4802 ldr r0, [pc, #8] ; (8024750 ) + 8024746: f00e fbc3 bl 8032ed0 /* USER CODE BEGIN UART5_IRQn 1 */ /* USER CODE END UART5_IRQn 1 */ } - 80246c6: bf00 nop - 80246c8: bd80 pop {r7, pc} - 80246ca: bf00 nop - 80246cc: 2400b134 .word 0x2400b134 + 802474a: bf00 nop + 802474c: bd80 pop {r7, pc} + 802474e: bf00 nop + 8024750: 2400b13c .word 0x2400b13c -080246d0 : +08024754 : /** * @brief This function handles Ethernet global interrupt. */ void ETH_IRQHandler(void) { - 80246d0: b580 push {r7, lr} - 80246d2: af00 add r7, sp, #0 + 8024754: b580 push {r7, lr} + 8024756: af00 add r7, sp, #0 /* USER CODE BEGIN ETH_IRQn 0 */ /* USER CODE END ETH_IRQn 0 */ HAL_ETH_IRQHandler(&heth); - 80246d4: 4802 ldr r0, [pc, #8] ; (80246e0 ) - 80246d6: f006 fbcd bl 802ae74 + 8024758: 4802 ldr r0, [pc, #8] ; (8024764 ) + 802475a: f006 fbcd bl 802aef8 /* USER CODE BEGIN ETH_IRQn 1 */ /* USER CODE END ETH_IRQn 1 */ } - 80246da: bf00 nop - 80246dc: bd80 pop {r7, pc} - 80246de: bf00 nop - 80246e0: 2400b8b4 .word 0x2400b8b4 + 802475e: bf00 nop + 8024760: bd80 pop {r7, pc} + 8024762: bf00 nop + 8024764: 2400b8bc .word 0x2400b8bc -080246e4 : +08024768 : /** * @brief This function handles USART6 global interrupt. */ void USART6_IRQHandler(void) { - 80246e4: b580 push {r7, lr} - 80246e6: af00 add r7, sp, #0 + 8024768: b580 push {r7, lr} + 802476a: af00 add r7, sp, #0 /* USER CODE BEGIN USART6_IRQn 0 */ /* USER CODE END USART6_IRQn 0 */ HAL_UART_IRQHandler(&huart6); - 80246e8: 4802 ldr r0, [pc, #8] ; (80246f4 ) - 80246ea: f00e fbaf bl 8032e4c + 802476c: 4802 ldr r0, [pc, #8] ; (8024778 ) + 802476e: f00e fbaf bl 8032ed0 /* USER CODE BEGIN USART6_IRQn 1 */ /* USER CODE END USART6_IRQn 1 */ } - 80246ee: bf00 nop - 80246f0: bd80 pop {r7, pc} - 80246f2: bf00 nop - 80246f4: 2400b404 .word 0x2400b404 + 8024772: bf00 nop + 8024774: bd80 pop {r7, pc} + 8024776: bf00 nop + 8024778: 2400b40c .word 0x2400b40c -080246f8 : +0802477c : /** * @brief This function handles UART7 global interrupt. */ void UART7_IRQHandler(void) { - 80246f8: b580 push {r7, lr} - 80246fa: af00 add r7, sp, #0 + 802477c: b580 push {r7, lr} + 802477e: af00 add r7, sp, #0 /* USER CODE BEGIN UART7_IRQn 0 */ /* USER CODE END UART7_IRQn 0 */ HAL_UART_IRQHandler(&huart7); - 80246fc: 4802 ldr r0, [pc, #8] ; (8024708 ) - 80246fe: f00e fba5 bl 8032e4c + 8024780: 4802 ldr r0, [pc, #8] ; (802478c ) + 8024782: f00e fba5 bl 8032ed0 /* USER CODE BEGIN UART7_IRQn 1 */ /* USER CODE END UART7_IRQn 1 */ } - 8024702: bf00 nop - 8024704: bd80 pop {r7, pc} - 8024706: bf00 nop - 8024708: 2400b1c4 .word 0x2400b1c4 + 8024786: bf00 nop + 8024788: bd80 pop {r7, pc} + 802478a: bf00 nop + 802478c: 2400b1cc .word 0x2400b1cc -0802470c : +08024790 : /** * @brief This function handles QUADSPI global interrupt. */ void QUADSPI_IRQHandler(void) { - 802470c: b580 push {r7, lr} - 802470e: af00 add r7, sp, #0 + 8024790: b580 push {r7, lr} + 8024792: af00 add r7, sp, #0 /* USER CODE BEGIN QUADSPI_IRQn 0 */ /* USER CODE END QUADSPI_IRQn 0 */ HAL_QSPI_IRQHandler(&hqspi); - 8024710: 4802 ldr r0, [pc, #8] ; (802471c ) - 8024712: f00a f911 bl 802e938 + 8024794: 4802 ldr r0, [pc, #8] ; (80247a0 ) + 8024796: f00a f911 bl 802e9bc /* USER CODE BEGIN QUADSPI_IRQn 1 */ /* USER CODE END QUADSPI_IRQn 1 */ } - 8024716: bf00 nop - 8024718: bd80 pop {r7, pc} - 802471a: bf00 nop - 802471c: 2400af2c .word 0x2400af2c + 802479a: bf00 nop + 802479c: bd80 pop {r7, pc} + 802479e: bf00 nop + 80247a0: 2400af34 .word 0x2400af34 -08024720 : +080247a4 : /** * @brief This function handles I2C4 event interrupt. */ void I2C4_EV_IRQHandler(void) { - 8024720: b580 push {r7, lr} - 8024722: af00 add r7, sp, #0 + 80247a4: b580 push {r7, lr} + 80247a6: af00 add r7, sp, #0 /* USER CODE BEGIN I2C4_EV_IRQn 0 */ /* USER CODE END I2C4_EV_IRQn 0 */ HAL_I2C_EV_IRQHandler(&hi2c4); - 8024724: 4802 ldr r0, [pc, #8] ; (8024730 ) - 8024726: f009 f915 bl 802d954 + 80247a8: 4802 ldr r0, [pc, #8] ; (80247b4 ) + 80247aa: f009 f915 bl 802d9d8 /* USER CODE BEGIN I2C4_EV_IRQn 1 */ /* USER CODE END I2C4_EV_IRQn 1 */ } - 802472a: bf00 nop - 802472c: bd80 pop {r7, pc} - 802472e: bf00 nop - 8024730: 2400aedc .word 0x2400aedc + 80247ae: bf00 nop + 80247b0: bd80 pop {r7, pc} + 80247b2: bf00 nop + 80247b4: 2400aedc .word 0x2400aedc -08024734 : +080247b8 : /** * @brief This function handles I2C4 error interrupt. */ void I2C4_ER_IRQHandler(void) { - 8024734: b580 push {r7, lr} - 8024736: af00 add r7, sp, #0 + 80247b8: b580 push {r7, lr} + 80247ba: af00 add r7, sp, #0 /* USER CODE BEGIN I2C4_ER_IRQn 0 */ /* USER CODE END I2C4_ER_IRQn 0 */ HAL_I2C_ER_IRQHandler(&hi2c4); - 8024738: 4802 ldr r0, [pc, #8] ; (8024744 ) - 802473a: f009 f925 bl 802d988 + 80247bc: 4802 ldr r0, [pc, #8] ; (80247c8 ) + 80247be: f009 f925 bl 802da0c /* USER CODE BEGIN I2C4_ER_IRQn 1 */ /* USER CODE END I2C4_ER_IRQn 1 */ } - 802473e: bf00 nop - 8024740: bd80 pop {r7, pc} - 8024742: bf00 nop - 8024744: 2400aedc .word 0x2400aedc + 80247c2: bf00 nop + 80247c4: bd80 pop {r7, pc} + 80247c6: bf00 nop + 80247c8: 2400aedc .word 0x2400aedc -08024748 : +080247cc : /** * @brief This function handles BDMA channel0 global interrupt. */ void BDMA_Channel0_IRQHandler(void) { - 8024748: b580 push {r7, lr} - 802474a: af00 add r7, sp, #0 + 80247cc: b580 push {r7, lr} + 80247ce: af00 add r7, sp, #0 /* USER CODE BEGIN BDMA_Channel0_IRQn 0 */ /* USER CODE END BDMA_Channel0_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_lpuart1_tx); - 802474c: 4802 ldr r0, [pc, #8] ; (8024758 ) - 802474e: f004 fd13 bl 8029178 + 80247d0: 4802 ldr r0, [pc, #8] ; (80247dc ) + 80247d2: f004 fd13 bl 80291fc /* USER CODE BEGIN BDMA_Channel0_IRQn 1 */ /* USER CODE END BDMA_Channel0_IRQn 1 */ } - 8024752: bf00 nop - 8024754: bd80 pop {r7, pc} - 8024756: bf00 nop - 8024758: 2400b494 .word 0x2400b494 + 80247d6: bf00 nop + 80247d8: bd80 pop {r7, pc} + 80247da: bf00 nop + 80247dc: 2400b49c .word 0x2400b49c -0802475c : +080247e0 : /** * @brief This function handles LPUART1 global interrupt. */ void LPUART1_IRQHandler(void) { - 802475c: b580 push {r7, lr} - 802475e: af00 add r7, sp, #0 + 80247e0: b580 push {r7, lr} + 80247e2: af00 add r7, sp, #0 /* USER CODE BEGIN LPUART1_IRQn 0 */ /* USER CODE END LPUART1_IRQn 0 */ HAL_UART_IRQHandler(&hlpuart1); - 8024760: 4802 ldr r0, [pc, #8] ; (802476c ) - 8024762: f00e fb73 bl 8032e4c + 80247e4: 4802 ldr r0, [pc, #8] ; (80247f0 ) + 80247e6: f00e fb73 bl 8032ed0 /* USER CODE BEGIN LPUART1_IRQn 1 */ /* USER CODE END LPUART1_IRQn 1 */ } - 8024766: bf00 nop - 8024768: bd80 pop {r7, pc} - 802476a: bf00 nop - 802476c: 2400b014 .word 0x2400b014 + 80247ea: bf00 nop + 80247ec: bd80 pop {r7, pc} + 80247ee: bf00 nop + 80247f0: 2400b01c .word 0x2400b01c -08024770 <_getpid>: +080247f4 <_getpid>: void initialise_monitor_handles() { } int _getpid(void) { - 8024770: b480 push {r7} - 8024772: af00 add r7, sp, #0 + 80247f4: b480 push {r7} + 80247f6: af00 add r7, sp, #0 return 1; - 8024774: 2301 movs r3, #1 + 80247f8: 2301 movs r3, #1 } - 8024776: 4618 mov r0, r3 - 8024778: 46bd mov sp, r7 - 802477a: f85d 7b04 ldr.w r7, [sp], #4 - 802477e: 4770 bx lr + 80247fa: 4618 mov r0, r3 + 80247fc: 46bd mov sp, r7 + 80247fe: f85d 7b04 ldr.w r7, [sp], #4 + 8024802: 4770 bx lr -08024780 <_kill>: +08024804 <_kill>: int _kill(int pid, int sig) { - 8024780: b480 push {r7} - 8024782: b083 sub sp, #12 - 8024784: af00 add r7, sp, #0 - 8024786: 6078 str r0, [r7, #4] - 8024788: 6039 str r1, [r7, #0] + 8024804: b480 push {r7} + 8024806: b083 sub sp, #12 + 8024808: af00 add r7, sp, #0 + 802480a: 6078 str r0, [r7, #4] + 802480c: 6039 str r1, [r7, #0] errno = EINVAL; - 802478a: 4b05 ldr r3, [pc, #20] ; (80247a0 <_kill+0x20>) - 802478c: 2216 movs r2, #22 - 802478e: 601a str r2, [r3, #0] + 802480e: 4b05 ldr r3, [pc, #20] ; (8024824 <_kill+0x20>) + 8024810: 2216 movs r2, #22 + 8024812: 601a str r2, [r3, #0] return -1; - 8024790: f04f 33ff mov.w r3, #4294967295 + 8024814: f04f 33ff mov.w r3, #4294967295 } - 8024794: 4618 mov r0, r3 - 8024796: 370c adds r7, #12 - 8024798: 46bd mov sp, r7 - 802479a: f85d 7b04 ldr.w r7, [sp], #4 - 802479e: 4770 bx lr - 80247a0: 2400eabc .word 0x2400eabc + 8024818: 4618 mov r0, r3 + 802481a: 370c adds r7, #12 + 802481c: 46bd mov sp, r7 + 802481e: f85d 7b04 ldr.w r7, [sp], #4 + 8024822: 4770 bx lr + 8024824: 2400eac4 .word 0x2400eac4 -080247a4 <_exit>: +08024828 <_exit>: void _exit (int status) { - 80247a4: b580 push {r7, lr} - 80247a6: b082 sub sp, #8 - 80247a8: af00 add r7, sp, #0 - 80247aa: 6078 str r0, [r7, #4] + 8024828: b580 push {r7, lr} + 802482a: b082 sub sp, #8 + 802482c: af00 add r7, sp, #0 + 802482e: 6078 str r0, [r7, #4] _kill(status, -1); - 80247ac: f04f 31ff mov.w r1, #4294967295 - 80247b0: 6878 ldr r0, [r7, #4] - 80247b2: f7ff ffe5 bl 8024780 <_kill> + 8024830: f04f 31ff mov.w r1, #4294967295 + 8024834: 6878 ldr r0, [r7, #4] + 8024836: f7ff ffe5 bl 8024804 <_kill> while (1) {} /* Make sure we hang here */ - 80247b6: e7fe b.n 80247b6 <_exit+0x12> + 802483a: e7fe b.n 802483a <_exit+0x12> -080247b8 <_read>: +0802483c <_read>: } __attribute__((weak)) int _read(int file, char *ptr, int len) { - 80247b8: b580 push {r7, lr} - 80247ba: b086 sub sp, #24 - 80247bc: af00 add r7, sp, #0 - 80247be: 60f8 str r0, [r7, #12] - 80247c0: 60b9 str r1, [r7, #8] - 80247c2: 607a str r2, [r7, #4] + 802483c: b580 push {r7, lr} + 802483e: b086 sub sp, #24 + 8024840: af00 add r7, sp, #0 + 8024842: 60f8 str r0, [r7, #12] + 8024844: 60b9 str r1, [r7, #8] + 8024846: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) - 80247c4: 2300 movs r3, #0 - 80247c6: 617b str r3, [r7, #20] - 80247c8: e00a b.n 80247e0 <_read+0x28> + 8024848: 2300 movs r3, #0 + 802484a: 617b str r3, [r7, #20] + 802484c: e00a b.n 8024864 <_read+0x28> { *ptr++ = __io_getchar(); - 80247ca: f3af 8000 nop.w - 80247ce: 4601 mov r1, r0 - 80247d0: 68bb ldr r3, [r7, #8] - 80247d2: 1c5a adds r2, r3, #1 - 80247d4: 60ba str r2, [r7, #8] - 80247d6: b2ca uxtb r2, r1 - 80247d8: 701a strb r2, [r3, #0] + 802484e: f3af 8000 nop.w + 8024852: 4601 mov r1, r0 + 8024854: 68bb ldr r3, [r7, #8] + 8024856: 1c5a adds r2, r3, #1 + 8024858: 60ba str r2, [r7, #8] + 802485a: b2ca uxtb r2, r1 + 802485c: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) - 80247da: 697b ldr r3, [r7, #20] - 80247dc: 3301 adds r3, #1 - 80247de: 617b str r3, [r7, #20] - 80247e0: 697a ldr r2, [r7, #20] - 80247e2: 687b ldr r3, [r7, #4] - 80247e4: 429a cmp r2, r3 - 80247e6: dbf0 blt.n 80247ca <_read+0x12> + 802485e: 697b ldr r3, [r7, #20] + 8024860: 3301 adds r3, #1 + 8024862: 617b str r3, [r7, #20] + 8024864: 697a ldr r2, [r7, #20] + 8024866: 687b ldr r3, [r7, #4] + 8024868: 429a cmp r2, r3 + 802486a: dbf0 blt.n 802484e <_read+0x12> } return len; - 80247e8: 687b ldr r3, [r7, #4] + 802486c: 687b ldr r3, [r7, #4] } - 80247ea: 4618 mov r0, r3 - 80247ec: 3718 adds r7, #24 - 80247ee: 46bd mov sp, r7 - 80247f0: bd80 pop {r7, pc} + 802486e: 4618 mov r0, r3 + 8024870: 3718 adds r7, #24 + 8024872: 46bd mov sp, r7 + 8024874: bd80 pop {r7, pc} -080247f2 <_write>: +08024876 <_write>: __attribute__((weak)) int _write(int file, char *ptr, int len) { - 80247f2: b580 push {r7, lr} - 80247f4: b086 sub sp, #24 - 80247f6: af00 add r7, sp, #0 - 80247f8: 60f8 str r0, [r7, #12] - 80247fa: 60b9 str r1, [r7, #8] - 80247fc: 607a str r2, [r7, #4] + 8024876: b580 push {r7, lr} + 8024878: b086 sub sp, #24 + 802487a: af00 add r7, sp, #0 + 802487c: 60f8 str r0, [r7, #12] + 802487e: 60b9 str r1, [r7, #8] + 8024880: 607a str r2, [r7, #4] int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) - 80247fe: 2300 movs r3, #0 - 8024800: 617b str r3, [r7, #20] - 8024802: e009 b.n 8024818 <_write+0x26> + 8024882: 2300 movs r3, #0 + 8024884: 617b str r3, [r7, #20] + 8024886: e009 b.n 802489c <_write+0x26> { __io_putchar(*ptr++); - 8024804: 68bb ldr r3, [r7, #8] - 8024806: 1c5a adds r2, r3, #1 - 8024808: 60ba str r2, [r7, #8] - 802480a: 781b ldrb r3, [r3, #0] - 802480c: 4618 mov r0, r3 - 802480e: f3af 8000 nop.w + 8024888: 68bb ldr r3, [r7, #8] + 802488a: 1c5a adds r2, r3, #1 + 802488c: 60ba str r2, [r7, #8] + 802488e: 781b ldrb r3, [r3, #0] + 8024890: 4618 mov r0, r3 + 8024892: f3af 8000 nop.w for (DataIdx = 0; DataIdx < len; DataIdx++) - 8024812: 697b ldr r3, [r7, #20] - 8024814: 3301 adds r3, #1 - 8024816: 617b str r3, [r7, #20] - 8024818: 697a ldr r2, [r7, #20] - 802481a: 687b ldr r3, [r7, #4] - 802481c: 429a cmp r2, r3 - 802481e: dbf1 blt.n 8024804 <_write+0x12> + 8024896: 697b ldr r3, [r7, #20] + 8024898: 3301 adds r3, #1 + 802489a: 617b str r3, [r7, #20] + 802489c: 697a ldr r2, [r7, #20] + 802489e: 687b ldr r3, [r7, #4] + 80248a0: 429a cmp r2, r3 + 80248a2: dbf1 blt.n 8024888 <_write+0x12> } return len; - 8024820: 687b ldr r3, [r7, #4] + 80248a4: 687b ldr r3, [r7, #4] } - 8024822: 4618 mov r0, r3 - 8024824: 3718 adds r7, #24 - 8024826: 46bd mov sp, r7 - 8024828: bd80 pop {r7, pc} + 80248a6: 4618 mov r0, r3 + 80248a8: 3718 adds r7, #24 + 80248aa: 46bd mov sp, r7 + 80248ac: bd80 pop {r7, pc} -0802482a <_close>: +080248ae <_close>: int _close(int file) { - 802482a: b480 push {r7} - 802482c: b083 sub sp, #12 - 802482e: af00 add r7, sp, #0 - 8024830: 6078 str r0, [r7, #4] + 80248ae: b480 push {r7} + 80248b0: b083 sub sp, #12 + 80248b2: af00 add r7, sp, #0 + 80248b4: 6078 str r0, [r7, #4] return -1; - 8024832: f04f 33ff mov.w r3, #4294967295 + 80248b6: f04f 33ff mov.w r3, #4294967295 } - 8024836: 4618 mov r0, r3 - 8024838: 370c adds r7, #12 - 802483a: 46bd mov sp, r7 - 802483c: f85d 7b04 ldr.w r7, [sp], #4 - 8024840: 4770 bx lr + 80248ba: 4618 mov r0, r3 + 80248bc: 370c adds r7, #12 + 80248be: 46bd mov sp, r7 + 80248c0: f85d 7b04 ldr.w r7, [sp], #4 + 80248c4: 4770 bx lr -08024842 <_fstat>: +080248c6 <_fstat>: int _fstat(int file, struct stat *st) { - 8024842: b480 push {r7} - 8024844: b083 sub sp, #12 - 8024846: af00 add r7, sp, #0 - 8024848: 6078 str r0, [r7, #4] - 802484a: 6039 str r1, [r7, #0] + 80248c6: b480 push {r7} + 80248c8: b083 sub sp, #12 + 80248ca: af00 add r7, sp, #0 + 80248cc: 6078 str r0, [r7, #4] + 80248ce: 6039 str r1, [r7, #0] st->st_mode = S_IFCHR; - 802484c: 683b ldr r3, [r7, #0] - 802484e: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024852: 605a str r2, [r3, #4] + 80248d0: 683b ldr r3, [r7, #0] + 80248d2: f44f 5200 mov.w r2, #8192 ; 0x2000 + 80248d6: 605a str r2, [r3, #4] return 0; - 8024854: 2300 movs r3, #0 + 80248d8: 2300 movs r3, #0 } - 8024856: 4618 mov r0, r3 - 8024858: 370c adds r7, #12 - 802485a: 46bd mov sp, r7 - 802485c: f85d 7b04 ldr.w r7, [sp], #4 - 8024860: 4770 bx lr + 80248da: 4618 mov r0, r3 + 80248dc: 370c adds r7, #12 + 80248de: 46bd mov sp, r7 + 80248e0: f85d 7b04 ldr.w r7, [sp], #4 + 80248e4: 4770 bx lr -08024862 <_isatty>: +080248e6 <_isatty>: int _isatty(int file) { - 8024862: b480 push {r7} - 8024864: b083 sub sp, #12 - 8024866: af00 add r7, sp, #0 - 8024868: 6078 str r0, [r7, #4] + 80248e6: b480 push {r7} + 80248e8: b083 sub sp, #12 + 80248ea: af00 add r7, sp, #0 + 80248ec: 6078 str r0, [r7, #4] return 1; - 802486a: 2301 movs r3, #1 + 80248ee: 2301 movs r3, #1 } - 802486c: 4618 mov r0, r3 - 802486e: 370c adds r7, #12 - 8024870: 46bd mov sp, r7 - 8024872: f85d 7b04 ldr.w r7, [sp], #4 - 8024876: 4770 bx lr + 80248f0: 4618 mov r0, r3 + 80248f2: 370c adds r7, #12 + 80248f4: 46bd mov sp, r7 + 80248f6: f85d 7b04 ldr.w r7, [sp], #4 + 80248fa: 4770 bx lr -08024878 <_lseek>: +080248fc <_lseek>: int _lseek(int file, int ptr, int dir) { - 8024878: b480 push {r7} - 802487a: b085 sub sp, #20 - 802487c: af00 add r7, sp, #0 - 802487e: 60f8 str r0, [r7, #12] - 8024880: 60b9 str r1, [r7, #8] - 8024882: 607a str r2, [r7, #4] + 80248fc: b480 push {r7} + 80248fe: b085 sub sp, #20 + 8024900: af00 add r7, sp, #0 + 8024902: 60f8 str r0, [r7, #12] + 8024904: 60b9 str r1, [r7, #8] + 8024906: 607a str r2, [r7, #4] return 0; - 8024884: 2300 movs r3, #0 + 8024908: 2300 movs r3, #0 } - 8024886: 4618 mov r0, r3 - 8024888: 3714 adds r7, #20 - 802488a: 46bd mov sp, r7 - 802488c: f85d 7b04 ldr.w r7, [sp], #4 - 8024890: 4770 bx lr + 802490a: 4618 mov r0, r3 + 802490c: 3714 adds r7, #20 + 802490e: 46bd mov sp, r7 + 8024910: f85d 7b04 ldr.w r7, [sp], #4 + 8024914: 4770 bx lr ... -08024894 <_sbrk>: +08024918 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { - 8024894: b480 push {r7} - 8024896: b087 sub sp, #28 - 8024898: af00 add r7, sp, #0 - 802489a: 6078 str r0, [r7, #4] + 8024918: b480 push {r7} + 802491a: b087 sub sp, #28 + 802491c: af00 add r7, sp, #0 + 802491e: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; - 802489c: 4a14 ldr r2, [pc, #80] ; (80248f0 <_sbrk+0x5c>) - 802489e: 4b15 ldr r3, [pc, #84] ; (80248f4 <_sbrk+0x60>) - 80248a0: 1ad3 subs r3, r2, r3 - 80248a2: 617b str r3, [r7, #20] + 8024920: 4a14 ldr r2, [pc, #80] ; (8024974 <_sbrk+0x5c>) + 8024922: 4b15 ldr r3, [pc, #84] ; (8024978 <_sbrk+0x60>) + 8024924: 1ad3 subs r3, r2, r3 + 8024926: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; - 80248a4: 697b ldr r3, [r7, #20] - 80248a6: 613b str r3, [r7, #16] + 8024928: 697b ldr r3, [r7, #20] + 802492a: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) - 80248a8: 4b13 ldr r3, [pc, #76] ; (80248f8 <_sbrk+0x64>) - 80248aa: 681b ldr r3, [r3, #0] - 80248ac: 2b00 cmp r3, #0 - 80248ae: d102 bne.n 80248b6 <_sbrk+0x22> + 802492c: 4b13 ldr r3, [pc, #76] ; (802497c <_sbrk+0x64>) + 802492e: 681b ldr r3, [r3, #0] + 8024930: 2b00 cmp r3, #0 + 8024932: d102 bne.n 802493a <_sbrk+0x22> { __sbrk_heap_end = &_end; - 80248b0: 4b11 ldr r3, [pc, #68] ; (80248f8 <_sbrk+0x64>) - 80248b2: 4a12 ldr r2, [pc, #72] ; (80248fc <_sbrk+0x68>) - 80248b4: 601a str r2, [r3, #0] + 8024934: 4b11 ldr r3, [pc, #68] ; (802497c <_sbrk+0x64>) + 8024936: 4a12 ldr r2, [pc, #72] ; (8024980 <_sbrk+0x68>) + 8024938: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) - 80248b6: 4b10 ldr r3, [pc, #64] ; (80248f8 <_sbrk+0x64>) - 80248b8: 681a ldr r2, [r3, #0] - 80248ba: 687b ldr r3, [r7, #4] - 80248bc: 4413 add r3, r2 - 80248be: 693a ldr r2, [r7, #16] - 80248c0: 429a cmp r2, r3 - 80248c2: d205 bcs.n 80248d0 <_sbrk+0x3c> + 802493a: 4b10 ldr r3, [pc, #64] ; (802497c <_sbrk+0x64>) + 802493c: 681a ldr r2, [r3, #0] + 802493e: 687b ldr r3, [r7, #4] + 8024940: 4413 add r3, r2 + 8024942: 693a ldr r2, [r7, #16] + 8024944: 429a cmp r2, r3 + 8024946: d205 bcs.n 8024954 <_sbrk+0x3c> { errno = ENOMEM; - 80248c4: 4b0e ldr r3, [pc, #56] ; (8024900 <_sbrk+0x6c>) - 80248c6: 220c movs r2, #12 - 80248c8: 601a str r2, [r3, #0] + 8024948: 4b0e ldr r3, [pc, #56] ; (8024984 <_sbrk+0x6c>) + 802494a: 220c movs r2, #12 + 802494c: 601a str r2, [r3, #0] return (void *)-1; - 80248ca: f04f 33ff mov.w r3, #4294967295 - 80248ce: e009 b.n 80248e4 <_sbrk+0x50> + 802494e: f04f 33ff mov.w r3, #4294967295 + 8024952: e009 b.n 8024968 <_sbrk+0x50> } prev_heap_end = __sbrk_heap_end; - 80248d0: 4b09 ldr r3, [pc, #36] ; (80248f8 <_sbrk+0x64>) - 80248d2: 681b ldr r3, [r3, #0] - 80248d4: 60fb str r3, [r7, #12] + 8024954: 4b09 ldr r3, [pc, #36] ; (802497c <_sbrk+0x64>) + 8024956: 681b ldr r3, [r3, #0] + 8024958: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; - 80248d6: 4b08 ldr r3, [pc, #32] ; (80248f8 <_sbrk+0x64>) - 80248d8: 681a ldr r2, [r3, #0] - 80248da: 687b ldr r3, [r7, #4] - 80248dc: 4413 add r3, r2 - 80248de: 4a06 ldr r2, [pc, #24] ; (80248f8 <_sbrk+0x64>) - 80248e0: 6013 str r3, [r2, #0] + 802495a: 4b08 ldr r3, [pc, #32] ; (802497c <_sbrk+0x64>) + 802495c: 681a ldr r2, [r3, #0] + 802495e: 687b ldr r3, [r7, #4] + 8024960: 4413 add r3, r2 + 8024962: 4a06 ldr r2, [pc, #24] ; (802497c <_sbrk+0x64>) + 8024964: 6013 str r3, [r2, #0] return (void *)prev_heap_end; - 80248e2: 68fb ldr r3, [r7, #12] -} - 80248e4: 4618 mov r0, r3 - 80248e6: 371c adds r7, #28 - 80248e8: 46bd mov sp, r7 - 80248ea: f85d 7b04 ldr.w r7, [sp], #4 - 80248ee: 4770 bx lr - 80248f0: 24080000 .word 0x24080000 - 80248f4: 00001000 .word 0x00001000 - 80248f8: 2400af78 .word 0x2400af78 - 80248fc: 2400eac8 .word 0x2400eac8 - 8024900: 2400eabc .word 0x2400eabc - -08024904 : + 8024966: 68fb ldr r3, [r7, #12] +} + 8024968: 4618 mov r0, r3 + 802496a: 371c adds r7, #28 + 802496c: 46bd mov sp, r7 + 802496e: f85d 7b04 ldr.w r7, [sp], #4 + 8024972: 4770 bx lr + 8024974: 24080000 .word 0x24080000 + 8024978: 00001000 .word 0x00001000 + 802497c: 2400af80 .word 0x2400af80 + 8024980: 2400ead0 .word 0x2400ead0 + 8024984: 2400eac4 .word 0x2400eac4 + +08024988 : * configuration. * @param None * @retval None */ void SystemInit (void) { - 8024904: b480 push {r7} - 8024906: af00 add r7, sp, #0 + 8024988: b480 push {r7} + 802498a: af00 add r7, sp, #0 __IO uint32_t tmpreg; #endif /* DATA_IN_D2_SRAM */ /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */ - 8024908: 4b39 ldr r3, [pc, #228] ; (80249f0 ) - 802490a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802490e: 4a38 ldr r2, [pc, #224] ; (80249f0 ) - 8024910: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 - 8024914: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 802498c: 4b39 ldr r3, [pc, #228] ; (8024a74 ) + 802498e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8024992: 4a38 ldr r2, [pc, #224] ; (8024a74 ) + 8024994: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 + 8024998: f8c2 3088 str.w r3, [r2, #136] ; 0x88 #endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Increasing the CPU frequency */ if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) - 8024918: 4b36 ldr r3, [pc, #216] ; (80249f4 ) - 802491a: 681b ldr r3, [r3, #0] - 802491c: f003 030f and.w r3, r3, #15 - 8024920: 2b06 cmp r3, #6 - 8024922: d807 bhi.n 8024934 + 802499c: 4b36 ldr r3, [pc, #216] ; (8024a78 ) + 802499e: 681b ldr r3, [r3, #0] + 80249a0: f003 030f and.w r3, r3, #15 + 80249a4: 2b06 cmp r3, #6 + 80249a6: d807 bhi.n 80249b8 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); - 8024924: 4b33 ldr r3, [pc, #204] ; (80249f4 ) - 8024926: 681b ldr r3, [r3, #0] - 8024928: f023 030f bic.w r3, r3, #15 - 802492c: 4a31 ldr r2, [pc, #196] ; (80249f4 ) - 802492e: f043 0307 orr.w r3, r3, #7 - 8024932: 6013 str r3, [r2, #0] + 80249a8: 4b33 ldr r3, [pc, #204] ; (8024a78 ) + 80249aa: 681b ldr r3, [r3, #0] + 80249ac: f023 030f bic.w r3, r3, #15 + 80249b0: 4a31 ldr r2, [pc, #196] ; (8024a78 ) + 80249b2: f043 0307 orr.w r3, r3, #7 + 80249b6: 6013 str r3, [r2, #0] } /* Set HSION bit */ RCC->CR |= RCC_CR_HSION; - 8024934: 4b30 ldr r3, [pc, #192] ; (80249f8 ) - 8024936: 681b ldr r3, [r3, #0] - 8024938: 4a2f ldr r2, [pc, #188] ; (80249f8 ) - 802493a: f043 0301 orr.w r3, r3, #1 - 802493e: 6013 str r3, [r2, #0] + 80249b8: 4b30 ldr r3, [pc, #192] ; (8024a7c ) + 80249ba: 681b ldr r3, [r3, #0] + 80249bc: 4a2f ldr r2, [pc, #188] ; (8024a7c ) + 80249be: f043 0301 orr.w r3, r3, #1 + 80249c2: 6013 str r3, [r2, #0] /* Reset CFGR register */ RCC->CFGR = 0x00000000; - 8024940: 4b2d ldr r3, [pc, #180] ; (80249f8 ) - 8024942: 2200 movs r2, #0 - 8024944: 611a str r2, [r3, #16] + 80249c4: 4b2d ldr r3, [pc, #180] ; (8024a7c ) + 80249c6: 2200 movs r2, #0 + 80249c8: 611a str r2, [r3, #16] /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */ RCC->CR &= 0xEAF6ED7FU; - 8024946: 4b2c ldr r3, [pc, #176] ; (80249f8 ) - 8024948: 681a ldr r2, [r3, #0] - 802494a: 492b ldr r1, [pc, #172] ; (80249f8 ) - 802494c: 4b2b ldr r3, [pc, #172] ; (80249fc ) - 802494e: 4013 ands r3, r2 - 8024950: 600b str r3, [r1, #0] + 80249ca: 4b2c ldr r3, [pc, #176] ; (8024a7c ) + 80249cc: 681a ldr r2, [r3, #0] + 80249ce: 492b ldr r1, [pc, #172] ; (8024a7c ) + 80249d0: 4b2b ldr r3, [pc, #172] ; (8024a80 ) + 80249d2: 4013 ands r3, r2 + 80249d4: 600b str r3, [r1, #0] /* Decreasing the number of wait states because of lower CPU frequency */ if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) - 8024952: 4b28 ldr r3, [pc, #160] ; (80249f4 ) - 8024954: 681b ldr r3, [r3, #0] - 8024956: f003 0308 and.w r3, r3, #8 - 802495a: 2b00 cmp r3, #0 - 802495c: d007 beq.n 802496e + 80249d6: 4b28 ldr r3, [pc, #160] ; (8024a78 ) + 80249d8: 681b ldr r3, [r3, #0] + 80249da: f003 0308 and.w r3, r3, #8 + 80249de: 2b00 cmp r3, #0 + 80249e0: d007 beq.n 80249f2 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); - 802495e: 4b25 ldr r3, [pc, #148] ; (80249f4 ) - 8024960: 681b ldr r3, [r3, #0] - 8024962: f023 030f bic.w r3, r3, #15 - 8024966: 4a23 ldr r2, [pc, #140] ; (80249f4 ) - 8024968: f043 0307 orr.w r3, r3, #7 - 802496c: 6013 str r3, [r2, #0] + 80249e2: 4b25 ldr r3, [pc, #148] ; (8024a78 ) + 80249e4: 681b ldr r3, [r3, #0] + 80249e6: f023 030f bic.w r3, r3, #15 + 80249ea: 4a23 ldr r2, [pc, #140] ; (8024a78 ) + 80249ec: f043 0307 orr.w r3, r3, #7 + 80249f0: 6013 str r3, [r2, #0] } #if defined(D3_SRAM_BASE) /* Reset D1CFGR register */ RCC->D1CFGR = 0x00000000; - 802496e: 4b22 ldr r3, [pc, #136] ; (80249f8 ) - 8024970: 2200 movs r2, #0 - 8024972: 619a str r2, [r3, #24] + 80249f2: 4b22 ldr r3, [pc, #136] ; (8024a7c ) + 80249f4: 2200 movs r2, #0 + 80249f6: 619a str r2, [r3, #24] /* Reset D2CFGR register */ RCC->D2CFGR = 0x00000000; - 8024974: 4b20 ldr r3, [pc, #128] ; (80249f8 ) - 8024976: 2200 movs r2, #0 - 8024978: 61da str r2, [r3, #28] + 80249f8: 4b20 ldr r3, [pc, #128] ; (8024a7c ) + 80249fa: 2200 movs r2, #0 + 80249fc: 61da str r2, [r3, #28] /* Reset D3CFGR register */ RCC->D3CFGR = 0x00000000; - 802497a: 4b1f ldr r3, [pc, #124] ; (80249f8 ) - 802497c: 2200 movs r2, #0 - 802497e: 621a str r2, [r3, #32] + 80249fe: 4b1f ldr r3, [pc, #124] ; (8024a7c ) + 8024a00: 2200 movs r2, #0 + 8024a02: 621a str r2, [r3, #32] /* Reset SRDCFGR register */ RCC->SRDCFGR = 0x00000000; #endif /* Reset PLLCKSELR register */ RCC->PLLCKSELR = 0x02020200; - 8024980: 4b1d ldr r3, [pc, #116] ; (80249f8 ) - 8024982: 4a1f ldr r2, [pc, #124] ; (8024a00 ) - 8024984: 629a str r2, [r3, #40] ; 0x28 + 8024a04: 4b1d ldr r3, [pc, #116] ; (8024a7c ) + 8024a06: 4a1f ldr r2, [pc, #124] ; (8024a84 ) + 8024a08: 629a str r2, [r3, #40] ; 0x28 /* Reset PLLCFGR register */ RCC->PLLCFGR = 0x01FF0000; - 8024986: 4b1c ldr r3, [pc, #112] ; (80249f8 ) - 8024988: 4a1e ldr r2, [pc, #120] ; (8024a04 ) - 802498a: 62da str r2, [r3, #44] ; 0x2c + 8024a0a: 4b1c ldr r3, [pc, #112] ; (8024a7c ) + 8024a0c: 4a1e ldr r2, [pc, #120] ; (8024a88 ) + 8024a0e: 62da str r2, [r3, #44] ; 0x2c /* Reset PLL1DIVR register */ RCC->PLL1DIVR = 0x01010280; - 802498c: 4b1a ldr r3, [pc, #104] ; (80249f8 ) - 802498e: 4a1e ldr r2, [pc, #120] ; (8024a08 ) - 8024990: 631a str r2, [r3, #48] ; 0x30 + 8024a10: 4b1a ldr r3, [pc, #104] ; (8024a7c ) + 8024a12: 4a1e ldr r2, [pc, #120] ; (8024a8c ) + 8024a14: 631a str r2, [r3, #48] ; 0x30 /* Reset PLL1FRACR register */ RCC->PLL1FRACR = 0x00000000; - 8024992: 4b19 ldr r3, [pc, #100] ; (80249f8 ) - 8024994: 2200 movs r2, #0 - 8024996: 635a str r2, [r3, #52] ; 0x34 + 8024a16: 4b19 ldr r3, [pc, #100] ; (8024a7c ) + 8024a18: 2200 movs r2, #0 + 8024a1a: 635a str r2, [r3, #52] ; 0x34 /* Reset PLL2DIVR register */ RCC->PLL2DIVR = 0x01010280; - 8024998: 4b17 ldr r3, [pc, #92] ; (80249f8 ) - 802499a: 4a1b ldr r2, [pc, #108] ; (8024a08 ) - 802499c: 639a str r2, [r3, #56] ; 0x38 + 8024a1c: 4b17 ldr r3, [pc, #92] ; (8024a7c ) + 8024a1e: 4a1b ldr r2, [pc, #108] ; (8024a8c ) + 8024a20: 639a str r2, [r3, #56] ; 0x38 /* Reset PLL2FRACR register */ RCC->PLL2FRACR = 0x00000000; - 802499e: 4b16 ldr r3, [pc, #88] ; (80249f8 ) - 80249a0: 2200 movs r2, #0 - 80249a2: 63da str r2, [r3, #60] ; 0x3c + 8024a22: 4b16 ldr r3, [pc, #88] ; (8024a7c ) + 8024a24: 2200 movs r2, #0 + 8024a26: 63da str r2, [r3, #60] ; 0x3c /* Reset PLL3DIVR register */ RCC->PLL3DIVR = 0x01010280; - 80249a4: 4b14 ldr r3, [pc, #80] ; (80249f8 ) - 80249a6: 4a18 ldr r2, [pc, #96] ; (8024a08 ) - 80249a8: 641a str r2, [r3, #64] ; 0x40 + 8024a28: 4b14 ldr r3, [pc, #80] ; (8024a7c ) + 8024a2a: 4a18 ldr r2, [pc, #96] ; (8024a8c ) + 8024a2c: 641a str r2, [r3, #64] ; 0x40 /* Reset PLL3FRACR register */ RCC->PLL3FRACR = 0x00000000; - 80249aa: 4b13 ldr r3, [pc, #76] ; (80249f8 ) - 80249ac: 2200 movs r2, #0 - 80249ae: 645a str r2, [r3, #68] ; 0x44 + 8024a2e: 4b13 ldr r3, [pc, #76] ; (8024a7c ) + 8024a30: 2200 movs r2, #0 + 8024a32: 645a str r2, [r3, #68] ; 0x44 /* Reset HSEBYP bit */ RCC->CR &= 0xFFFBFFFFU; - 80249b0: 4b11 ldr r3, [pc, #68] ; (80249f8 ) - 80249b2: 681b ldr r3, [r3, #0] - 80249b4: 4a10 ldr r2, [pc, #64] ; (80249f8 ) - 80249b6: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 80249ba: 6013 str r3, [r2, #0] + 8024a34: 4b11 ldr r3, [pc, #68] ; (8024a7c ) + 8024a36: 681b ldr r3, [r3, #0] + 8024a38: 4a10 ldr r2, [pc, #64] ; (8024a7c ) + 8024a3a: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 8024a3e: 6013 str r3, [r2, #0] /* Disable all interrupts */ RCC->CIER = 0x00000000; - 80249bc: 4b0e ldr r3, [pc, #56] ; (80249f8 ) - 80249be: 2200 movs r2, #0 - 80249c0: 661a str r2, [r3, #96] ; 0x60 + 8024a40: 4b0e ldr r3, [pc, #56] ; (8024a7c ) + 8024a42: 2200 movs r2, #0 + 8024a44: 661a str r2, [r3, #96] ; 0x60 #if (STM32H7_DEV_ID == 0x450UL) /* dual core CM7 or single core line */ if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U) - 80249c2: 4b12 ldr r3, [pc, #72] ; (8024a0c ) - 80249c4: 681a ldr r2, [r3, #0] - 80249c6: 4b12 ldr r3, [pc, #72] ; (8024a10 ) - 80249c8: 4013 ands r3, r2 - 80249ca: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80249ce: d202 bcs.n 80249d6 + 8024a46: 4b12 ldr r3, [pc, #72] ; (8024a90 ) + 8024a48: 681a ldr r2, [r3, #0] + 8024a4a: 4b12 ldr r3, [pc, #72] ; (8024a94 ) + 8024a4c: 4013 ands r3, r2 + 8024a4e: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8024a52: d202 bcs.n 8024a5a { /* if stm32h7 revY*/ /* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */ *((__IO uint32_t*)0x51008108) = 0x000000001U; - 80249d0: 4b10 ldr r3, [pc, #64] ; (8024a14 ) - 80249d2: 2201 movs r2, #1 - 80249d4: 601a str r2, [r3, #0] + 8024a54: 4b10 ldr r3, [pc, #64] ; (8024a98 ) + 8024a56: 2201 movs r2, #1 + 8024a58: 601a str r2, [r3, #0] /* * Disable the FMC bank1 (enabled after reset). * This, prevents CPU speculation access on this bank which blocks the use of FMC during * 24us. During this time the others FMC master (such as LTDC) cannot use it! */ FMC_Bank1_R->BTCR[0] = 0x000030D2; - 80249d6: 4b10 ldr r3, [pc, #64] ; (8024a18 ) - 80249d8: f243 02d2 movw r2, #12498 ; 0x30d2 - 80249dc: 601a str r2, [r3, #0] + 8024a5a: 4b10 ldr r3, [pc, #64] ; (8024a9c ) + 8024a5c: f243 02d2 movw r2, #12498 ; 0x30d2 + 8024a60: 601a str r2, [r3, #0] /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */ - 80249de: 4b04 ldr r3, [pc, #16] ; (80249f0 ) - 80249e0: 4a0e ldr r2, [pc, #56] ; (8024a1c ) - 80249e2: 609a str r2, [r3, #8] + 8024a62: 4b04 ldr r3, [pc, #16] ; (8024a74 ) + 8024a64: 4a0e ldr r2, [pc, #56] ; (8024aa0 ) + 8024a66: 609a str r2, [r3, #8] #endif /* USER_VECT_TAB_ADDRESS */ #endif /*DUAL_CORE && CORE_CM4*/ } - 80249e4: bf00 nop - 80249e6: 46bd mov sp, r7 - 80249e8: f85d 7b04 ldr.w r7, [sp], #4 - 80249ec: 4770 bx lr - 80249ee: bf00 nop - 80249f0: e000ed00 .word 0xe000ed00 - 80249f4: 52002000 .word 0x52002000 - 80249f8: 58024400 .word 0x58024400 - 80249fc: eaf6ed7f .word 0xeaf6ed7f - 8024a00: 02020200 .word 0x02020200 - 8024a04: 01ff0000 .word 0x01ff0000 - 8024a08: 01010280 .word 0x01010280 - 8024a0c: 5c001000 .word 0x5c001000 - 8024a10: ffff0000 .word 0xffff0000 - 8024a14: 51008108 .word 0x51008108 - 8024a18: 52004000 .word 0x52004000 - 8024a1c: 08020000 .word 0x08020000 - -08024a20 : + 8024a68: bf00 nop + 8024a6a: 46bd mov sp, r7 + 8024a6c: f85d 7b04 ldr.w r7, [sp], #4 + 8024a70: 4770 bx lr + 8024a72: bf00 nop + 8024a74: e000ed00 .word 0xe000ed00 + 8024a78: 52002000 .word 0x52002000 + 8024a7c: 58024400 .word 0x58024400 + 8024a80: eaf6ed7f .word 0xeaf6ed7f + 8024a84: 02020200 .word 0x02020200 + 8024a88: 01ff0000 .word 0x01ff0000 + 8024a8c: 01010280 .word 0x01010280 + 8024a90: 5c001000 .word 0x5c001000 + 8024a94: ffff0000 .word 0xffff0000 + 8024a98: 51008108 .word 0x51008108 + 8024a9c: 52004000 .word 0x52004000 + 8024aa0: 08020000 .word 0x08020000 + +08024aa4 : TIM_HandleTypeDef htim1; TIM_HandleTypeDef htim8; /* TIM1 init function */ void MX_TIM1_Init(void) { - 8024a20: b580 push {r7, lr} - 8024a22: b088 sub sp, #32 - 8024a24: af00 add r7, sp, #0 + 8024aa4: b580 push {r7, lr} + 8024aa6: b088 sub sp, #32 + 8024aa8: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_Init 0 */ /* USER CODE END TIM1_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 8024a26: f107 0310 add.w r3, r7, #16 - 8024a2a: 2200 movs r2, #0 - 8024a2c: 601a str r2, [r3, #0] - 8024a2e: 605a str r2, [r3, #4] - 8024a30: 609a str r2, [r3, #8] - 8024a32: 60da str r2, [r3, #12] + 8024aaa: f107 0310 add.w r3, r7, #16 + 8024aae: 2200 movs r2, #0 + 8024ab0: 601a str r2, [r3, #0] + 8024ab2: 605a str r2, [r3, #4] + 8024ab4: 609a str r2, [r3, #8] + 8024ab6: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8024a34: 1d3b adds r3, r7, #4 - 8024a36: 2200 movs r2, #0 - 8024a38: 601a str r2, [r3, #0] - 8024a3a: 605a str r2, [r3, #4] - 8024a3c: 609a str r2, [r3, #8] + 8024ab8: 1d3b adds r3, r7, #4 + 8024aba: 2200 movs r2, #0 + 8024abc: 601a str r2, [r3, #0] + 8024abe: 605a str r2, [r3, #4] + 8024ac0: 609a str r2, [r3, #8] /* USER CODE BEGIN TIM1_Init 1 */ /* USER CODE END TIM1_Init 1 */ htim1.Instance = TIM1; - 8024a3e: 4b20 ldr r3, [pc, #128] ; (8024ac0 ) - 8024a40: 4a20 ldr r2, [pc, #128] ; (8024ac4 ) - 8024a42: 601a str r2, [r3, #0] + 8024ac2: 4b20 ldr r3, [pc, #128] ; (8024b44 ) + 8024ac4: 4a20 ldr r2, [pc, #128] ; (8024b48 ) + 8024ac6: 601a str r2, [r3, #0] htim1.Init.Prescaler = 2000-1; - 8024a44: 4b1e ldr r3, [pc, #120] ; (8024ac0 ) - 8024a46: f240 72cf movw r2, #1999 ; 0x7cf - 8024a4a: 605a str r2, [r3, #4] + 8024ac8: 4b1e ldr r3, [pc, #120] ; (8024b44 ) + 8024aca: f240 72cf movw r2, #1999 ; 0x7cf + 8024ace: 605a str r2, [r3, #4] htim1.Init.CounterMode = TIM_COUNTERMODE_UP; - 8024a4c: 4b1c ldr r3, [pc, #112] ; (8024ac0 ) - 8024a4e: 2200 movs r2, #0 - 8024a50: 609a str r2, [r3, #8] + 8024ad0: 4b1c ldr r3, [pc, #112] ; (8024b44 ) + 8024ad2: 2200 movs r2, #0 + 8024ad4: 609a str r2, [r3, #8] htim1.Init.Period = 10000-1; - 8024a52: 4b1b ldr r3, [pc, #108] ; (8024ac0 ) - 8024a54: f242 720f movw r2, #9999 ; 0x270f - 8024a58: 60da str r2, [r3, #12] + 8024ad6: 4b1b ldr r3, [pc, #108] ; (8024b44 ) + 8024ad8: f242 720f movw r2, #9999 ; 0x270f + 8024adc: 60da str r2, [r3, #12] htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8024a5a: 4b19 ldr r3, [pc, #100] ; (8024ac0 ) - 8024a5c: 2200 movs r2, #0 - 8024a5e: 611a str r2, [r3, #16] + 8024ade: 4b19 ldr r3, [pc, #100] ; (8024b44 ) + 8024ae0: 2200 movs r2, #0 + 8024ae2: 611a str r2, [r3, #16] htim1.Init.RepetitionCounter = 0; - 8024a60: 4b17 ldr r3, [pc, #92] ; (8024ac0 ) - 8024a62: 2200 movs r2, #0 - 8024a64: 615a str r2, [r3, #20] + 8024ae4: 4b17 ldr r3, [pc, #92] ; (8024b44 ) + 8024ae6: 2200 movs r2, #0 + 8024ae8: 615a str r2, [r3, #20] htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 8024a66: 4b16 ldr r3, [pc, #88] ; (8024ac0 ) - 8024a68: 2280 movs r2, #128 ; 0x80 - 8024a6a: 619a str r2, [r3, #24] + 8024aea: 4b16 ldr r3, [pc, #88] ; (8024b44 ) + 8024aec: 2280 movs r2, #128 ; 0x80 + 8024aee: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim1) != HAL_OK) - 8024a6c: 4814 ldr r0, [pc, #80] ; (8024ac0 ) - 8024a6e: f00d fb2b bl 80320c8 - 8024a72: 4603 mov r3, r0 - 8024a74: 2b00 cmp r3, #0 - 8024a76: d001 beq.n 8024a7c + 8024af0: 4814 ldr r0, [pc, #80] ; (8024b44 ) + 8024af2: f00d fb2b bl 803214c + 8024af6: 4603 mov r3, r0 + 8024af8: 2b00 cmp r3, #0 + 8024afa: d001 beq.n 8024b00 { Error_Handler(); - 8024a78: f7ff fc58 bl 802432c + 8024afc: f7ff fc58 bl 80243b0 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8024a7c: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8024a80: 613b str r3, [r7, #16] + 8024b00: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8024b04: 613b str r3, [r7, #16] if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 8024a82: f107 0310 add.w r3, r7, #16 - 8024a86: 4619 mov r1, r3 - 8024a88: 480d ldr r0, [pc, #52] ; (8024ac0 ) - 8024a8a: f00d fd0d bl 80324a8 - 8024a8e: 4603 mov r3, r0 - 8024a90: 2b00 cmp r3, #0 - 8024a92: d001 beq.n 8024a98 + 8024b06: f107 0310 add.w r3, r7, #16 + 8024b0a: 4619 mov r1, r3 + 8024b0c: 480d ldr r0, [pc, #52] ; (8024b44 ) + 8024b0e: f00d fd0d bl 803252c + 8024b12: 4603 mov r3, r0 + 8024b14: 2b00 cmp r3, #0 + 8024b16: d001 beq.n 8024b1c { Error_Handler(); - 8024a94: f7ff fc4a bl 802432c + 8024b18: f7ff fc4a bl 80243b0 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8024a98: 2300 movs r3, #0 - 8024a9a: 607b str r3, [r7, #4] + 8024b1c: 2300 movs r3, #0 + 8024b1e: 607b str r3, [r7, #4] sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 8024a9c: 2300 movs r3, #0 - 8024a9e: 60bb str r3, [r7, #8] + 8024b20: 2300 movs r3, #0 + 8024b22: 60bb str r3, [r7, #8] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8024aa0: 2300 movs r3, #0 - 8024aa2: 60fb str r3, [r7, #12] + 8024b24: 2300 movs r3, #0 + 8024b26: 60fb str r3, [r7, #12] if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) - 8024aa4: 1d3b adds r3, r7, #4 - 8024aa6: 4619 mov r1, r3 - 8024aa8: 4805 ldr r0, [pc, #20] ; (8024ac0 ) - 8024aaa: f00d ff55 bl 8032958 - 8024aae: 4603 mov r3, r0 - 8024ab0: 2b00 cmp r3, #0 - 8024ab2: d001 beq.n 8024ab8 + 8024b28: 1d3b adds r3, r7, #4 + 8024b2a: 4619 mov r1, r3 + 8024b2c: 4805 ldr r0, [pc, #20] ; (8024b44 ) + 8024b2e: f00d ff55 bl 80329dc + 8024b32: 4603 mov r3, r0 + 8024b34: 2b00 cmp r3, #0 + 8024b36: d001 beq.n 8024b3c { Error_Handler(); - 8024ab4: f7ff fc3a bl 802432c + 8024b38: f7ff fc3a bl 80243b0 } /* USER CODE BEGIN TIM1_Init 2 */ /* USER CODE END TIM1_Init 2 */ } - 8024ab8: bf00 nop - 8024aba: 3720 adds r7, #32 - 8024abc: 46bd mov sp, r7 - 8024abe: bd80 pop {r7, pc} - 8024ac0: 2400af7c .word 0x2400af7c - 8024ac4: 40010000 .word 0x40010000 + 8024b3c: bf00 nop + 8024b3e: 3720 adds r7, #32 + 8024b40: 46bd mov sp, r7 + 8024b42: bd80 pop {r7, pc} + 8024b44: 2400af84 .word 0x2400af84 + 8024b48: 40010000 .word 0x40010000 -08024ac8 : +08024b4c : /* TIM8 init function */ void MX_TIM8_Init(void) { - 8024ac8: b580 push {r7, lr} - 8024aca: b088 sub sp, #32 - 8024acc: af00 add r7, sp, #0 + 8024b4c: b580 push {r7, lr} + 8024b4e: b088 sub sp, #32 + 8024b50: af00 add r7, sp, #0 /* USER CODE BEGIN TIM8_Init 0 */ /* USER CODE END TIM8_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 8024ace: f107 0310 add.w r3, r7, #16 - 8024ad2: 2200 movs r2, #0 - 8024ad4: 601a str r2, [r3, #0] - 8024ad6: 605a str r2, [r3, #4] - 8024ad8: 609a str r2, [r3, #8] - 8024ada: 60da str r2, [r3, #12] + 8024b52: f107 0310 add.w r3, r7, #16 + 8024b56: 2200 movs r2, #0 + 8024b58: 601a str r2, [r3, #0] + 8024b5a: 605a str r2, [r3, #4] + 8024b5c: 609a str r2, [r3, #8] + 8024b5e: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8024adc: 1d3b adds r3, r7, #4 - 8024ade: 2200 movs r2, #0 - 8024ae0: 601a str r2, [r3, #0] - 8024ae2: 605a str r2, [r3, #4] - 8024ae4: 609a str r2, [r3, #8] + 8024b60: 1d3b adds r3, r7, #4 + 8024b62: 2200 movs r2, #0 + 8024b64: 601a str r2, [r3, #0] + 8024b66: 605a str r2, [r3, #4] + 8024b68: 609a str r2, [r3, #8] /* USER CODE BEGIN TIM8_Init 1 */ /* USER CODE END TIM8_Init 1 */ htim8.Instance = TIM8; - 8024ae6: 4b20 ldr r3, [pc, #128] ; (8024b68 ) - 8024ae8: 4a20 ldr r2, [pc, #128] ; (8024b6c ) - 8024aea: 601a str r2, [r3, #0] + 8024b6a: 4b20 ldr r3, [pc, #128] ; (8024bec ) + 8024b6c: 4a20 ldr r2, [pc, #128] ; (8024bf0 ) + 8024b6e: 601a str r2, [r3, #0] htim8.Init.Prescaler = 2000-1; - 8024aec: 4b1e ldr r3, [pc, #120] ; (8024b68 ) - 8024aee: f240 72cf movw r2, #1999 ; 0x7cf - 8024af2: 605a str r2, [r3, #4] + 8024b70: 4b1e ldr r3, [pc, #120] ; (8024bec ) + 8024b72: f240 72cf movw r2, #1999 ; 0x7cf + 8024b76: 605a str r2, [r3, #4] htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 8024af4: 4b1c ldr r3, [pc, #112] ; (8024b68 ) - 8024af6: 2200 movs r2, #0 - 8024af8: 609a str r2, [r3, #8] + 8024b78: 4b1c ldr r3, [pc, #112] ; (8024bec ) + 8024b7a: 2200 movs r2, #0 + 8024b7c: 609a str r2, [r3, #8] htim8.Init.Period = 200-1; - 8024afa: 4b1b ldr r3, [pc, #108] ; (8024b68 ) - 8024afc: 22c7 movs r2, #199 ; 0xc7 - 8024afe: 60da str r2, [r3, #12] + 8024b7e: 4b1b ldr r3, [pc, #108] ; (8024bec ) + 8024b80: 22c7 movs r2, #199 ; 0xc7 + 8024b82: 60da str r2, [r3, #12] htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8024b00: 4b19 ldr r3, [pc, #100] ; (8024b68 ) - 8024b02: 2200 movs r2, #0 - 8024b04: 611a str r2, [r3, #16] + 8024b84: 4b19 ldr r3, [pc, #100] ; (8024bec ) + 8024b86: 2200 movs r2, #0 + 8024b88: 611a str r2, [r3, #16] htim8.Init.RepetitionCounter = 0; - 8024b06: 4b18 ldr r3, [pc, #96] ; (8024b68 ) - 8024b08: 2200 movs r2, #0 - 8024b0a: 615a str r2, [r3, #20] + 8024b8a: 4b18 ldr r3, [pc, #96] ; (8024bec ) + 8024b8c: 2200 movs r2, #0 + 8024b8e: 615a str r2, [r3, #20] htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8024b0c: 4b16 ldr r3, [pc, #88] ; (8024b68 ) - 8024b0e: 2200 movs r2, #0 - 8024b10: 619a str r2, [r3, #24] + 8024b90: 4b16 ldr r3, [pc, #88] ; (8024bec ) + 8024b92: 2200 movs r2, #0 + 8024b94: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 8024b12: 4815 ldr r0, [pc, #84] ; (8024b68 ) - 8024b14: f00d fad8 bl 80320c8 - 8024b18: 4603 mov r3, r0 - 8024b1a: 2b00 cmp r3, #0 - 8024b1c: d001 beq.n 8024b22 + 8024b96: 4815 ldr r0, [pc, #84] ; (8024bec ) + 8024b98: f00d fad8 bl 803214c + 8024b9c: 4603 mov r3, r0 + 8024b9e: 2b00 cmp r3, #0 + 8024ba0: d001 beq.n 8024ba6 { Error_Handler(); - 8024b1e: f7ff fc05 bl 802432c + 8024ba2: f7ff fc05 bl 80243b0 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8024b22: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8024b26: 613b str r3, [r7, #16] + 8024ba6: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8024baa: 613b str r3, [r7, #16] if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 8024b28: f107 0310 add.w r3, r7, #16 - 8024b2c: 4619 mov r1, r3 - 8024b2e: 480e ldr r0, [pc, #56] ; (8024b68 ) - 8024b30: f00d fcba bl 80324a8 - 8024b34: 4603 mov r3, r0 - 8024b36: 2b00 cmp r3, #0 - 8024b38: d001 beq.n 8024b3e + 8024bac: f107 0310 add.w r3, r7, #16 + 8024bb0: 4619 mov r1, r3 + 8024bb2: 480e ldr r0, [pc, #56] ; (8024bec ) + 8024bb4: f00d fcba bl 803252c + 8024bb8: 4603 mov r3, r0 + 8024bba: 2b00 cmp r3, #0 + 8024bbc: d001 beq.n 8024bc2 { Error_Handler(); - 8024b3a: f7ff fbf7 bl 802432c + 8024bbe: f7ff fbf7 bl 80243b0 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8024b3e: 2300 movs r3, #0 - 8024b40: 607b str r3, [r7, #4] + 8024bc2: 2300 movs r3, #0 + 8024bc4: 607b str r3, [r7, #4] sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 8024b42: 2300 movs r3, #0 - 8024b44: 60bb str r3, [r7, #8] + 8024bc6: 2300 movs r3, #0 + 8024bc8: 60bb str r3, [r7, #8] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8024b46: 2300 movs r3, #0 - 8024b48: 60fb str r3, [r7, #12] + 8024bca: 2300 movs r3, #0 + 8024bcc: 60fb str r3, [r7, #12] if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 8024b4a: 1d3b adds r3, r7, #4 - 8024b4c: 4619 mov r1, r3 - 8024b4e: 4806 ldr r0, [pc, #24] ; (8024b68 ) - 8024b50: f00d ff02 bl 8032958 - 8024b54: 4603 mov r3, r0 - 8024b56: 2b00 cmp r3, #0 - 8024b58: d001 beq.n 8024b5e + 8024bce: 1d3b adds r3, r7, #4 + 8024bd0: 4619 mov r1, r3 + 8024bd2: 4806 ldr r0, [pc, #24] ; (8024bec ) + 8024bd4: f00d ff02 bl 80329dc + 8024bd8: 4603 mov r3, r0 + 8024bda: 2b00 cmp r3, #0 + 8024bdc: d001 beq.n 8024be2 { Error_Handler(); - 8024b5a: f7ff fbe7 bl 802432c + 8024bde: f7ff fbe7 bl 80243b0 } /* USER CODE BEGIN TIM8_Init 2 */ /* USER CODE END TIM8_Init 2 */ } - 8024b5e: bf00 nop - 8024b60: 3720 adds r7, #32 - 8024b62: 46bd mov sp, r7 - 8024b64: bd80 pop {r7, pc} - 8024b66: bf00 nop - 8024b68: 2400afc8 .word 0x2400afc8 - 8024b6c: 40010400 .word 0x40010400 + 8024be2: bf00 nop + 8024be4: 3720 adds r7, #32 + 8024be6: 46bd mov sp, r7 + 8024be8: bd80 pop {r7, pc} + 8024bea: bf00 nop + 8024bec: 2400afd0 .word 0x2400afd0 + 8024bf0: 40010400 .word 0x40010400 -08024b70 : +08024bf4 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { - 8024b70: b580 push {r7, lr} - 8024b72: b084 sub sp, #16 - 8024b74: af00 add r7, sp, #0 - 8024b76: 6078 str r0, [r7, #4] + 8024bf4: b580 push {r7, lr} + 8024bf6: b084 sub sp, #16 + 8024bf8: af00 add r7, sp, #0 + 8024bfa: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM1) - 8024b78: 687b ldr r3, [r7, #4] - 8024b7a: 681b ldr r3, [r3, #0] - 8024b7c: 4a1d ldr r2, [pc, #116] ; (8024bf4 ) - 8024b7e: 4293 cmp r3, r2 - 8024b80: d117 bne.n 8024bb2 + 8024bfc: 687b ldr r3, [r7, #4] + 8024bfe: 681b ldr r3, [r3, #0] + 8024c00: 4a1d ldr r2, [pc, #116] ; (8024c78 ) + 8024c02: 4293 cmp r3, r2 + 8024c04: d117 bne.n 8024c36 { /* USER CODE BEGIN TIM1_MspInit 0 */ /* USER CODE END TIM1_MspInit 0 */ /* TIM1 clock enable */ __HAL_RCC_TIM1_CLK_ENABLE(); - 8024b82: 4b1d ldr r3, [pc, #116] ; (8024bf8 ) - 8024b84: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8024b88: 4a1b ldr r2, [pc, #108] ; (8024bf8 ) - 8024b8a: f043 0301 orr.w r3, r3, #1 - 8024b8e: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 - 8024b92: 4b19 ldr r3, [pc, #100] ; (8024bf8 ) - 8024b94: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8024b98: f003 0301 and.w r3, r3, #1 - 8024b9c: 60fb str r3, [r7, #12] - 8024b9e: 68fb ldr r3, [r7, #12] + 8024c06: 4b1d ldr r3, [pc, #116] ; (8024c7c ) + 8024c08: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8024c0c: 4a1b ldr r2, [pc, #108] ; (8024c7c ) + 8024c0e: f043 0301 orr.w r3, r3, #1 + 8024c12: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 8024c16: 4b19 ldr r3, [pc, #100] ; (8024c7c ) + 8024c18: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8024c1c: f003 0301 and.w r3, r3, #1 + 8024c20: 60fb str r3, [r7, #12] + 8024c22: 68fb ldr r3, [r7, #12] /* TIM1 interrupt Init */ HAL_NVIC_SetPriority(TIM1_UP_IRQn, 0, 0); - 8024ba0: 2200 movs r2, #0 - 8024ba2: 2100 movs r1, #0 - 8024ba4: 2019 movs r0, #25 - 8024ba6: f002 ff0c bl 80279c2 + 8024c24: 2200 movs r2, #0 + 8024c26: 2100 movs r1, #0 + 8024c28: 2019 movs r0, #25 + 8024c2a: f002 ff0c bl 8027a46 HAL_NVIC_EnableIRQ(TIM1_UP_IRQn); - 8024baa: 2019 movs r0, #25 - 8024bac: f002 ff23 bl 80279f6 + 8024c2e: 2019 movs r0, #25 + 8024c30: f002 ff23 bl 8027a7a HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn); /* USER CODE BEGIN TIM8_MspInit 1 */ /* USER CODE END TIM8_MspInit 1 */ } } - 8024bb0: e01b b.n 8024bea + 8024c34: e01b b.n 8024c6e else if(tim_baseHandle->Instance==TIM8) - 8024bb2: 687b ldr r3, [r7, #4] - 8024bb4: 681b ldr r3, [r3, #0] - 8024bb6: 4a11 ldr r2, [pc, #68] ; (8024bfc ) - 8024bb8: 4293 cmp r3, r2 - 8024bba: d116 bne.n 8024bea + 8024c36: 687b ldr r3, [r7, #4] + 8024c38: 681b ldr r3, [r3, #0] + 8024c3a: 4a11 ldr r2, [pc, #68] ; (8024c80 ) + 8024c3c: 4293 cmp r3, r2 + 8024c3e: d116 bne.n 8024c6e __HAL_RCC_TIM8_CLK_ENABLE(); - 8024bbc: 4b0e ldr r3, [pc, #56] ; (8024bf8 ) - 8024bbe: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8024bc2: 4a0d ldr r2, [pc, #52] ; (8024bf8 ) - 8024bc4: f043 0302 orr.w r3, r3, #2 - 8024bc8: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 - 8024bcc: 4b0a ldr r3, [pc, #40] ; (8024bf8 ) - 8024bce: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8024bd2: f003 0302 and.w r3, r3, #2 - 8024bd6: 60bb str r3, [r7, #8] - 8024bd8: 68bb ldr r3, [r7, #8] + 8024c40: 4b0e ldr r3, [pc, #56] ; (8024c7c ) + 8024c42: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8024c46: 4a0d ldr r2, [pc, #52] ; (8024c7c ) + 8024c48: f043 0302 orr.w r3, r3, #2 + 8024c4c: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 8024c50: 4b0a ldr r3, [pc, #40] ; (8024c7c ) + 8024c52: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8024c56: f003 0302 and.w r3, r3, #2 + 8024c5a: 60bb str r3, [r7, #8] + 8024c5c: 68bb ldr r3, [r7, #8] HAL_NVIC_SetPriority(TIM8_UP_TIM13_IRQn, 0, 0); - 8024bda: 2200 movs r2, #0 - 8024bdc: 2100 movs r1, #0 - 8024bde: 202c movs r0, #44 ; 0x2c - 8024be0: f002 feef bl 80279c2 + 8024c5e: 2200 movs r2, #0 + 8024c60: 2100 movs r1, #0 + 8024c62: 202c movs r0, #44 ; 0x2c + 8024c64: f002 feef bl 8027a46 HAL_NVIC_EnableIRQ(TIM8_UP_TIM13_IRQn); - 8024be4: 202c movs r0, #44 ; 0x2c - 8024be6: f002 ff06 bl 80279f6 -} - 8024bea: bf00 nop - 8024bec: 3710 adds r7, #16 - 8024bee: 46bd mov sp, r7 - 8024bf0: bd80 pop {r7, pc} - 8024bf2: bf00 nop - 8024bf4: 40010000 .word 0x40010000 - 8024bf8: 58024400 .word 0x58024400 - 8024bfc: 40010400 .word 0x40010400 - -08024c00 : + 8024c68: 202c movs r0, #44 ; 0x2c + 8024c6a: f002 ff06 bl 8027a7a +} + 8024c6e: bf00 nop + 8024c70: 3710 adds r7, #16 + 8024c72: 46bd mov sp, r7 + 8024c74: bd80 pop {r7, pc} + 8024c76: bf00 nop + 8024c78: 40010000 .word 0x40010000 + 8024c7c: 58024400 .word 0x58024400 + 8024c80: 40010400 .word 0x40010400 + +08024c84 : DMA_HandleTypeDef hdma_usart6_tx; /* LPUART1 init function */ void MX_LPUART1_UART_Init(void) { - 8024c00: b580 push {r7, lr} - 8024c02: af00 add r7, sp, #0 + 8024c84: b580 push {r7, lr} + 8024c86: af00 add r7, sp, #0 /* USER CODE END LPUART1_Init 0 */ /* USER CODE BEGIN LPUART1_Init 1 */ /* USER CODE END LPUART1_Init 1 */ hlpuart1.Instance = LPUART1; - 8024c04: 4b26 ldr r3, [pc, #152] ; (8024ca0 ) - 8024c06: 4a27 ldr r2, [pc, #156] ; (8024ca4 ) - 8024c08: 601a str r2, [r3, #0] + 8024c88: 4b26 ldr r3, [pc, #152] ; (8024d24 ) + 8024c8a: 4a27 ldr r2, [pc, #156] ; (8024d28 ) + 8024c8c: 601a str r2, [r3, #0] hlpuart1.Init.BaudRate = 57600; - 8024c0a: 4b25 ldr r3, [pc, #148] ; (8024ca0 ) - 8024c0c: f44f 4261 mov.w r2, #57600 ; 0xe100 - 8024c10: 605a str r2, [r3, #4] + 8024c8e: 4b25 ldr r3, [pc, #148] ; (8024d24 ) + 8024c90: f44f 4261 mov.w r2, #57600 ; 0xe100 + 8024c94: 605a str r2, [r3, #4] hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; - 8024c12: 4b23 ldr r3, [pc, #140] ; (8024ca0 ) - 8024c14: 2200 movs r2, #0 - 8024c16: 609a str r2, [r3, #8] + 8024c96: 4b23 ldr r3, [pc, #140] ; (8024d24 ) + 8024c98: 2200 movs r2, #0 + 8024c9a: 609a str r2, [r3, #8] hlpuart1.Init.StopBits = UART_STOPBITS_1; - 8024c18: 4b21 ldr r3, [pc, #132] ; (8024ca0 ) - 8024c1a: 2200 movs r2, #0 - 8024c1c: 60da str r2, [r3, #12] + 8024c9c: 4b21 ldr r3, [pc, #132] ; (8024d24 ) + 8024c9e: 2200 movs r2, #0 + 8024ca0: 60da str r2, [r3, #12] hlpuart1.Init.Parity = UART_PARITY_NONE; - 8024c1e: 4b20 ldr r3, [pc, #128] ; (8024ca0 ) - 8024c20: 2200 movs r2, #0 - 8024c22: 611a str r2, [r3, #16] + 8024ca2: 4b20 ldr r3, [pc, #128] ; (8024d24 ) + 8024ca4: 2200 movs r2, #0 + 8024ca6: 611a str r2, [r3, #16] hlpuart1.Init.Mode = UART_MODE_TX_RX; - 8024c24: 4b1e ldr r3, [pc, #120] ; (8024ca0 ) - 8024c26: 220c movs r2, #12 - 8024c28: 615a str r2, [r3, #20] + 8024ca8: 4b1e ldr r3, [pc, #120] ; (8024d24 ) + 8024caa: 220c movs r2, #12 + 8024cac: 615a str r2, [r3, #20] hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024c2a: 4b1d ldr r3, [pc, #116] ; (8024ca0 ) - 8024c2c: 2200 movs r2, #0 - 8024c2e: 619a str r2, [r3, #24] + 8024cae: 4b1d ldr r3, [pc, #116] ; (8024d24 ) + 8024cb0: 2200 movs r2, #0 + 8024cb2: 619a str r2, [r3, #24] hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024c30: 4b1b ldr r3, [pc, #108] ; (8024ca0 ) - 8024c32: 2200 movs r2, #0 - 8024c34: 621a str r2, [r3, #32] + 8024cb4: 4b1b ldr r3, [pc, #108] ; (8024d24 ) + 8024cb6: 2200 movs r2, #0 + 8024cb8: 621a str r2, [r3, #32] hlpuart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024c36: 4b1a ldr r3, [pc, #104] ; (8024ca0 ) - 8024c38: 2200 movs r2, #0 - 8024c3a: 625a str r2, [r3, #36] ; 0x24 + 8024cba: 4b1a ldr r3, [pc, #104] ; (8024d24 ) + 8024cbc: 2200 movs r2, #0 + 8024cbe: 625a str r2, [r3, #36] ; 0x24 hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT|UART_ADVFEATURE_DMADISABLEONERROR_INIT; - 8024c3c: 4b18 ldr r3, [pc, #96] ; (8024ca0 ) - 8024c3e: 2230 movs r2, #48 ; 0x30 - 8024c40: 629a str r2, [r3, #40] ; 0x28 + 8024cc0: 4b18 ldr r3, [pc, #96] ; (8024d24 ) + 8024cc2: 2230 movs r2, #48 ; 0x30 + 8024cc4: 629a str r2, [r3, #40] ; 0x28 hlpuart1.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024c42: 4b17 ldr r3, [pc, #92] ; (8024ca0 ) - 8024c44: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024c48: 63da str r2, [r3, #60] ; 0x3c + 8024cc6: 4b17 ldr r3, [pc, #92] ; (8024d24 ) + 8024cc8: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024ccc: 63da str r2, [r3, #60] ; 0x3c hlpuart1.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024c4a: 4b15 ldr r3, [pc, #84] ; (8024ca0 ) - 8024c4c: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024c50: 641a str r2, [r3, #64] ; 0x40 + 8024cce: 4b15 ldr r3, [pc, #84] ; (8024d24 ) + 8024cd0: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024cd4: 641a str r2, [r3, #64] ; 0x40 hlpuart1.FifoMode = UART_FIFOMODE_DISABLE; - 8024c52: 4b13 ldr r3, [pc, #76] ; (8024ca0 ) - 8024c54: 2200 movs r2, #0 - 8024c56: 665a str r2, [r3, #100] ; 0x64 + 8024cd6: 4b13 ldr r3, [pc, #76] ; (8024d24 ) + 8024cd8: 2200 movs r2, #0 + 8024cda: 665a str r2, [r3, #100] ; 0x64 if (HAL_UART_Init(&hlpuart1) != HAL_OK) - 8024c58: 4811 ldr r0, [pc, #68] ; (8024ca0 ) - 8024c5a: f00d ff29 bl 8032ab0 - 8024c5e: 4603 mov r3, r0 - 8024c60: 2b00 cmp r3, #0 - 8024c62: d001 beq.n 8024c68 + 8024cdc: 4811 ldr r0, [pc, #68] ; (8024d24 ) + 8024cde: f00d ff29 bl 8032b34 + 8024ce2: 4603 mov r3, r0 + 8024ce4: 2b00 cmp r3, #0 + 8024ce6: d001 beq.n 8024cec { Error_Handler(); - 8024c64: f7ff fb62 bl 802432c + 8024ce8: f7ff fb62 bl 80243b0 } if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024c68: 2100 movs r1, #0 - 8024c6a: 480d ldr r0, [pc, #52] ; (8024ca0 ) - 8024c6c: f010 fb29 bl 80352c2 - 8024c70: 4603 mov r3, r0 - 8024c72: 2b00 cmp r3, #0 - 8024c74: d001 beq.n 8024c7a + 8024cec: 2100 movs r1, #0 + 8024cee: 480d ldr r0, [pc, #52] ; (8024d24 ) + 8024cf0: f010 fb29 bl 8035346 + 8024cf4: 4603 mov r3, r0 + 8024cf6: 2b00 cmp r3, #0 + 8024cf8: d001 beq.n 8024cfe { Error_Handler(); - 8024c76: f7ff fb59 bl 802432c + 8024cfa: f7ff fb59 bl 80243b0 } if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024c7a: 2100 movs r1, #0 - 8024c7c: 4808 ldr r0, [pc, #32] ; (8024ca0 ) - 8024c7e: f010 fb5e bl 803533e - 8024c82: 4603 mov r3, r0 - 8024c84: 2b00 cmp r3, #0 - 8024c86: d001 beq.n 8024c8c + 8024cfe: 2100 movs r1, #0 + 8024d00: 4808 ldr r0, [pc, #32] ; (8024d24 ) + 8024d02: f010 fb5e bl 80353c2 + 8024d06: 4603 mov r3, r0 + 8024d08: 2b00 cmp r3, #0 + 8024d0a: d001 beq.n 8024d10 { Error_Handler(); - 8024c88: f7ff fb50 bl 802432c + 8024d0c: f7ff fb50 bl 80243b0 } if (HAL_UARTEx_DisableFifoMode(&hlpuart1) != HAL_OK) - 8024c8c: 4804 ldr r0, [pc, #16] ; (8024ca0 ) - 8024c8e: f010 fadf bl 8035250 - 8024c92: 4603 mov r3, r0 - 8024c94: 2b00 cmp r3, #0 - 8024c96: d001 beq.n 8024c9c + 8024d10: 4804 ldr r0, [pc, #16] ; (8024d24 ) + 8024d12: f010 fadf bl 80352d4 + 8024d16: 4603 mov r3, r0 + 8024d18: 2b00 cmp r3, #0 + 8024d1a: d001 beq.n 8024d20 { Error_Handler(); - 8024c98: f7ff fb48 bl 802432c + 8024d1c: f7ff fb48 bl 80243b0 } /* USER CODE BEGIN LPUART1_Init 2 */ /* USER CODE END LPUART1_Init 2 */ } - 8024c9c: bf00 nop - 8024c9e: bd80 pop {r7, pc} - 8024ca0: 2400b014 .word 0x2400b014 - 8024ca4: 58000c00 .word 0x58000c00 + 8024d20: bf00 nop + 8024d22: bd80 pop {r7, pc} + 8024d24: 2400b01c .word 0x2400b01c + 8024d28: 58000c00 .word 0x58000c00 -08024ca8 : +08024d2c : /* UART4 init function */ void MX_UART4_Init(void) { - 8024ca8: b580 push {r7, lr} - 8024caa: af00 add r7, sp, #0 + 8024d2c: b580 push {r7, lr} + 8024d2e: af00 add r7, sp, #0 /* USER CODE END UART4_Init 0 */ /* USER CODE BEGIN UART4_Init 1 */ /* USER CODE END UART4_Init 1 */ huart4.Instance = UART4; - 8024cac: 4b26 ldr r3, [pc, #152] ; (8024d48 ) - 8024cae: 4a27 ldr r2, [pc, #156] ; (8024d4c ) - 8024cb0: 601a str r2, [r3, #0] + 8024d30: 4b26 ldr r3, [pc, #152] ; (8024dcc ) + 8024d32: 4a27 ldr r2, [pc, #156] ; (8024dd0 ) + 8024d34: 601a str r2, [r3, #0] huart4.Init.BaudRate = 115200; - 8024cb2: 4b25 ldr r3, [pc, #148] ; (8024d48 ) - 8024cb4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8024cb8: 605a str r2, [r3, #4] + 8024d36: 4b25 ldr r3, [pc, #148] ; (8024dcc ) + 8024d38: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8024d3c: 605a str r2, [r3, #4] huart4.Init.WordLength = UART_WORDLENGTH_8B; - 8024cba: 4b23 ldr r3, [pc, #140] ; (8024d48 ) - 8024cbc: 2200 movs r2, #0 - 8024cbe: 609a str r2, [r3, #8] + 8024d3e: 4b23 ldr r3, [pc, #140] ; (8024dcc ) + 8024d40: 2200 movs r2, #0 + 8024d42: 609a str r2, [r3, #8] huart4.Init.StopBits = UART_STOPBITS_1; - 8024cc0: 4b21 ldr r3, [pc, #132] ; (8024d48 ) - 8024cc2: 2200 movs r2, #0 - 8024cc4: 60da str r2, [r3, #12] + 8024d44: 4b21 ldr r3, [pc, #132] ; (8024dcc ) + 8024d46: 2200 movs r2, #0 + 8024d48: 60da str r2, [r3, #12] huart4.Init.Parity = UART_PARITY_NONE; - 8024cc6: 4b20 ldr r3, [pc, #128] ; (8024d48 ) - 8024cc8: 2200 movs r2, #0 - 8024cca: 611a str r2, [r3, #16] + 8024d4a: 4b20 ldr r3, [pc, #128] ; (8024dcc ) + 8024d4c: 2200 movs r2, #0 + 8024d4e: 611a str r2, [r3, #16] huart4.Init.Mode = UART_MODE_TX_RX; - 8024ccc: 4b1e ldr r3, [pc, #120] ; (8024d48 ) - 8024cce: 220c movs r2, #12 - 8024cd0: 615a str r2, [r3, #20] + 8024d50: 4b1e ldr r3, [pc, #120] ; (8024dcc ) + 8024d52: 220c movs r2, #12 + 8024d54: 615a str r2, [r3, #20] huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024cd2: 4b1d ldr r3, [pc, #116] ; (8024d48 ) - 8024cd4: 2200 movs r2, #0 - 8024cd6: 619a str r2, [r3, #24] + 8024d56: 4b1d ldr r3, [pc, #116] ; (8024dcc ) + 8024d58: 2200 movs r2, #0 + 8024d5a: 619a str r2, [r3, #24] huart4.Init.OverSampling = UART_OVERSAMPLING_16; - 8024cd8: 4b1b ldr r3, [pc, #108] ; (8024d48 ) - 8024cda: 2200 movs r2, #0 - 8024cdc: 61da str r2, [r3, #28] + 8024d5c: 4b1b ldr r3, [pc, #108] ; (8024dcc ) + 8024d5e: 2200 movs r2, #0 + 8024d60: 61da str r2, [r3, #28] huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024cde: 4b1a ldr r3, [pc, #104] ; (8024d48 ) - 8024ce0: 2200 movs r2, #0 - 8024ce2: 621a str r2, [r3, #32] + 8024d62: 4b1a ldr r3, [pc, #104] ; (8024dcc ) + 8024d64: 2200 movs r2, #0 + 8024d66: 621a str r2, [r3, #32] huart4.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024ce4: 4b18 ldr r3, [pc, #96] ; (8024d48 ) - 8024ce6: 2200 movs r2, #0 - 8024ce8: 625a str r2, [r3, #36] ; 0x24 + 8024d68: 4b18 ldr r3, [pc, #96] ; (8024dcc ) + 8024d6a: 2200 movs r2, #0 + 8024d6c: 625a str r2, [r3, #36] ; 0x24 huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT|UART_ADVFEATURE_DMADISABLEONERROR_INIT; - 8024cea: 4b17 ldr r3, [pc, #92] ; (8024d48 ) - 8024cec: 2230 movs r2, #48 ; 0x30 - 8024cee: 629a str r2, [r3, #40] ; 0x28 + 8024d6e: 4b17 ldr r3, [pc, #92] ; (8024dcc ) + 8024d70: 2230 movs r2, #48 ; 0x30 + 8024d72: 629a str r2, [r3, #40] ; 0x28 huart4.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024cf0: 4b15 ldr r3, [pc, #84] ; (8024d48 ) - 8024cf2: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024cf6: 63da str r2, [r3, #60] ; 0x3c + 8024d74: 4b15 ldr r3, [pc, #84] ; (8024dcc ) + 8024d76: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024d7a: 63da str r2, [r3, #60] ; 0x3c huart4.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024cf8: 4b13 ldr r3, [pc, #76] ; (8024d48 ) - 8024cfa: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024cfe: 641a str r2, [r3, #64] ; 0x40 + 8024d7c: 4b13 ldr r3, [pc, #76] ; (8024dcc ) + 8024d7e: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024d82: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart4) != HAL_OK) - 8024d00: 4811 ldr r0, [pc, #68] ; (8024d48 ) - 8024d02: f00d fed5 bl 8032ab0 - 8024d06: 4603 mov r3, r0 - 8024d08: 2b00 cmp r3, #0 - 8024d0a: d001 beq.n 8024d10 + 8024d84: 4811 ldr r0, [pc, #68] ; (8024dcc ) + 8024d86: f00d fed5 bl 8032b34 + 8024d8a: 4603 mov r3, r0 + 8024d8c: 2b00 cmp r3, #0 + 8024d8e: d001 beq.n 8024d94 { Error_Handler(); - 8024d0c: f7ff fb0e bl 802432c + 8024d90: f7ff fb0e bl 80243b0 } if (HAL_UARTEx_SetTxFifoThreshold(&huart4, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024d10: 2100 movs r1, #0 - 8024d12: 480d ldr r0, [pc, #52] ; (8024d48 ) - 8024d14: f010 fad5 bl 80352c2 - 8024d18: 4603 mov r3, r0 - 8024d1a: 2b00 cmp r3, #0 - 8024d1c: d001 beq.n 8024d22 + 8024d94: 2100 movs r1, #0 + 8024d96: 480d ldr r0, [pc, #52] ; (8024dcc ) + 8024d98: f010 fad5 bl 8035346 + 8024d9c: 4603 mov r3, r0 + 8024d9e: 2b00 cmp r3, #0 + 8024da0: d001 beq.n 8024da6 { Error_Handler(); - 8024d1e: f7ff fb05 bl 802432c + 8024da2: f7ff fb05 bl 80243b0 } if (HAL_UARTEx_SetRxFifoThreshold(&huart4, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024d22: 2100 movs r1, #0 - 8024d24: 4808 ldr r0, [pc, #32] ; (8024d48 ) - 8024d26: f010 fb0a bl 803533e - 8024d2a: 4603 mov r3, r0 - 8024d2c: 2b00 cmp r3, #0 - 8024d2e: d001 beq.n 8024d34 + 8024da6: 2100 movs r1, #0 + 8024da8: 4808 ldr r0, [pc, #32] ; (8024dcc ) + 8024daa: f010 fb0a bl 80353c2 + 8024dae: 4603 mov r3, r0 + 8024db0: 2b00 cmp r3, #0 + 8024db2: d001 beq.n 8024db8 { Error_Handler(); - 8024d30: f7ff fafc bl 802432c + 8024db4: f7ff fafc bl 80243b0 } if (HAL_UARTEx_DisableFifoMode(&huart4) != HAL_OK) - 8024d34: 4804 ldr r0, [pc, #16] ; (8024d48 ) - 8024d36: f010 fa8b bl 8035250 - 8024d3a: 4603 mov r3, r0 - 8024d3c: 2b00 cmp r3, #0 - 8024d3e: d001 beq.n 8024d44 + 8024db8: 4804 ldr r0, [pc, #16] ; (8024dcc ) + 8024dba: f010 fa8b bl 80352d4 + 8024dbe: 4603 mov r3, r0 + 8024dc0: 2b00 cmp r3, #0 + 8024dc2: d001 beq.n 8024dc8 { Error_Handler(); - 8024d40: f7ff faf4 bl 802432c + 8024dc4: f7ff faf4 bl 80243b0 } /* USER CODE BEGIN UART4_Init 2 */ /* USER CODE END UART4_Init 2 */ } - 8024d44: bf00 nop - 8024d46: bd80 pop {r7, pc} - 8024d48: 2400b0a4 .word 0x2400b0a4 - 8024d4c: 40004c00 .word 0x40004c00 + 8024dc8: bf00 nop + 8024dca: bd80 pop {r7, pc} + 8024dcc: 2400b0ac .word 0x2400b0ac + 8024dd0: 40004c00 .word 0x40004c00 -08024d50 : +08024dd4 : /* UART5 init function */ void MX_UART5_Init(void) { - 8024d50: b580 push {r7, lr} - 8024d52: af00 add r7, sp, #0 + 8024dd4: b580 push {r7, lr} + 8024dd6: af00 add r7, sp, #0 /* USER CODE END UART5_Init 0 */ /* USER CODE BEGIN UART5_Init 1 */ /* USER CODE END UART5_Init 1 */ huart5.Instance = UART5; - 8024d54: 4b26 ldr r3, [pc, #152] ; (8024df0 ) - 8024d56: 4a27 ldr r2, [pc, #156] ; (8024df4 ) - 8024d58: 601a str r2, [r3, #0] + 8024dd8: 4b26 ldr r3, [pc, #152] ; (8024e74 ) + 8024dda: 4a27 ldr r2, [pc, #156] ; (8024e78 ) + 8024ddc: 601a str r2, [r3, #0] huart5.Init.BaudRate = 57600; - 8024d5a: 4b25 ldr r3, [pc, #148] ; (8024df0 ) - 8024d5c: f44f 4261 mov.w r2, #57600 ; 0xe100 - 8024d60: 605a str r2, [r3, #4] + 8024dde: 4b25 ldr r3, [pc, #148] ; (8024e74 ) + 8024de0: f44f 4261 mov.w r2, #57600 ; 0xe100 + 8024de4: 605a str r2, [r3, #4] huart5.Init.WordLength = UART_WORDLENGTH_8B; - 8024d62: 4b23 ldr r3, [pc, #140] ; (8024df0 ) - 8024d64: 2200 movs r2, #0 - 8024d66: 609a str r2, [r3, #8] + 8024de6: 4b23 ldr r3, [pc, #140] ; (8024e74 ) + 8024de8: 2200 movs r2, #0 + 8024dea: 609a str r2, [r3, #8] huart5.Init.StopBits = UART_STOPBITS_1; - 8024d68: 4b21 ldr r3, [pc, #132] ; (8024df0 ) - 8024d6a: 2200 movs r2, #0 - 8024d6c: 60da str r2, [r3, #12] + 8024dec: 4b21 ldr r3, [pc, #132] ; (8024e74 ) + 8024dee: 2200 movs r2, #0 + 8024df0: 60da str r2, [r3, #12] huart5.Init.Parity = UART_PARITY_NONE; - 8024d6e: 4b20 ldr r3, [pc, #128] ; (8024df0 ) - 8024d70: 2200 movs r2, #0 - 8024d72: 611a str r2, [r3, #16] + 8024df2: 4b20 ldr r3, [pc, #128] ; (8024e74 ) + 8024df4: 2200 movs r2, #0 + 8024df6: 611a str r2, [r3, #16] huart5.Init.Mode = UART_MODE_TX_RX; - 8024d74: 4b1e ldr r3, [pc, #120] ; (8024df0 ) - 8024d76: 220c movs r2, #12 - 8024d78: 615a str r2, [r3, #20] + 8024df8: 4b1e ldr r3, [pc, #120] ; (8024e74 ) + 8024dfa: 220c movs r2, #12 + 8024dfc: 615a str r2, [r3, #20] huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024d7a: 4b1d ldr r3, [pc, #116] ; (8024df0 ) - 8024d7c: 2200 movs r2, #0 - 8024d7e: 619a str r2, [r3, #24] + 8024dfe: 4b1d ldr r3, [pc, #116] ; (8024e74 ) + 8024e00: 2200 movs r2, #0 + 8024e02: 619a str r2, [r3, #24] huart5.Init.OverSampling = UART_OVERSAMPLING_16; - 8024d80: 4b1b ldr r3, [pc, #108] ; (8024df0 ) - 8024d82: 2200 movs r2, #0 - 8024d84: 61da str r2, [r3, #28] + 8024e04: 4b1b ldr r3, [pc, #108] ; (8024e74 ) + 8024e06: 2200 movs r2, #0 + 8024e08: 61da str r2, [r3, #28] huart5.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024d86: 4b1a ldr r3, [pc, #104] ; (8024df0 ) - 8024d88: 2200 movs r2, #0 - 8024d8a: 621a str r2, [r3, #32] + 8024e0a: 4b1a ldr r3, [pc, #104] ; (8024e74 ) + 8024e0c: 2200 movs r2, #0 + 8024e0e: 621a str r2, [r3, #32] huart5.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024d8c: 4b18 ldr r3, [pc, #96] ; (8024df0 ) - 8024d8e: 2200 movs r2, #0 - 8024d90: 625a str r2, [r3, #36] ; 0x24 + 8024e10: 4b18 ldr r3, [pc, #96] ; (8024e74 ) + 8024e12: 2200 movs r2, #0 + 8024e14: 625a str r2, [r3, #36] ; 0x24 huart5.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT|UART_ADVFEATURE_DMADISABLEONERROR_INIT; - 8024d92: 4b17 ldr r3, [pc, #92] ; (8024df0 ) - 8024d94: 2230 movs r2, #48 ; 0x30 - 8024d96: 629a str r2, [r3, #40] ; 0x28 + 8024e16: 4b17 ldr r3, [pc, #92] ; (8024e74 ) + 8024e18: 2230 movs r2, #48 ; 0x30 + 8024e1a: 629a str r2, [r3, #40] ; 0x28 huart5.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024d98: 4b15 ldr r3, [pc, #84] ; (8024df0 ) - 8024d9a: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024d9e: 63da str r2, [r3, #60] ; 0x3c + 8024e1c: 4b15 ldr r3, [pc, #84] ; (8024e74 ) + 8024e1e: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024e22: 63da str r2, [r3, #60] ; 0x3c huart5.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024da0: 4b13 ldr r3, [pc, #76] ; (8024df0 ) - 8024da2: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024da6: 641a str r2, [r3, #64] ; 0x40 + 8024e24: 4b13 ldr r3, [pc, #76] ; (8024e74 ) + 8024e26: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024e2a: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart5) != HAL_OK) - 8024da8: 4811 ldr r0, [pc, #68] ; (8024df0 ) - 8024daa: f00d fe81 bl 8032ab0 - 8024dae: 4603 mov r3, r0 - 8024db0: 2b00 cmp r3, #0 - 8024db2: d001 beq.n 8024db8 + 8024e2c: 4811 ldr r0, [pc, #68] ; (8024e74 ) + 8024e2e: f00d fe81 bl 8032b34 + 8024e32: 4603 mov r3, r0 + 8024e34: 2b00 cmp r3, #0 + 8024e36: d001 beq.n 8024e3c { Error_Handler(); - 8024db4: f7ff faba bl 802432c + 8024e38: f7ff faba bl 80243b0 } if (HAL_UARTEx_SetTxFifoThreshold(&huart5, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024db8: 2100 movs r1, #0 - 8024dba: 480d ldr r0, [pc, #52] ; (8024df0 ) - 8024dbc: f010 fa81 bl 80352c2 - 8024dc0: 4603 mov r3, r0 - 8024dc2: 2b00 cmp r3, #0 - 8024dc4: d001 beq.n 8024dca + 8024e3c: 2100 movs r1, #0 + 8024e3e: 480d ldr r0, [pc, #52] ; (8024e74 ) + 8024e40: f010 fa81 bl 8035346 + 8024e44: 4603 mov r3, r0 + 8024e46: 2b00 cmp r3, #0 + 8024e48: d001 beq.n 8024e4e { Error_Handler(); - 8024dc6: f7ff fab1 bl 802432c + 8024e4a: f7ff fab1 bl 80243b0 } if (HAL_UARTEx_SetRxFifoThreshold(&huart5, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024dca: 2100 movs r1, #0 - 8024dcc: 4808 ldr r0, [pc, #32] ; (8024df0 ) - 8024dce: f010 fab6 bl 803533e - 8024dd2: 4603 mov r3, r0 - 8024dd4: 2b00 cmp r3, #0 - 8024dd6: d001 beq.n 8024ddc + 8024e4e: 2100 movs r1, #0 + 8024e50: 4808 ldr r0, [pc, #32] ; (8024e74 ) + 8024e52: f010 fab6 bl 80353c2 + 8024e56: 4603 mov r3, r0 + 8024e58: 2b00 cmp r3, #0 + 8024e5a: d001 beq.n 8024e60 { Error_Handler(); - 8024dd8: f7ff faa8 bl 802432c + 8024e5c: f7ff faa8 bl 80243b0 } if (HAL_UARTEx_DisableFifoMode(&huart5) != HAL_OK) - 8024ddc: 4804 ldr r0, [pc, #16] ; (8024df0 ) - 8024dde: f010 fa37 bl 8035250 - 8024de2: 4603 mov r3, r0 - 8024de4: 2b00 cmp r3, #0 - 8024de6: d001 beq.n 8024dec + 8024e60: 4804 ldr r0, [pc, #16] ; (8024e74 ) + 8024e62: f010 fa37 bl 80352d4 + 8024e66: 4603 mov r3, r0 + 8024e68: 2b00 cmp r3, #0 + 8024e6a: d001 beq.n 8024e70 { Error_Handler(); - 8024de8: f7ff faa0 bl 802432c + 8024e6c: f7ff faa0 bl 80243b0 } /* USER CODE BEGIN UART5_Init 2 */ /* USER CODE END UART5_Init 2 */ } - 8024dec: bf00 nop - 8024dee: bd80 pop {r7, pc} - 8024df0: 2400b134 .word 0x2400b134 - 8024df4: 40005000 .word 0x40005000 + 8024e70: bf00 nop + 8024e72: bd80 pop {r7, pc} + 8024e74: 2400b13c .word 0x2400b13c + 8024e78: 40005000 .word 0x40005000 -08024df8 : +08024e7c : /* UART7 init function */ void MX_UART7_Init(void) { - 8024df8: b580 push {r7, lr} - 8024dfa: af00 add r7, sp, #0 + 8024e7c: b580 push {r7, lr} + 8024e7e: af00 add r7, sp, #0 /* USER CODE END UART7_Init 0 */ /* USER CODE BEGIN UART7_Init 1 */ /* USER CODE END UART7_Init 1 */ huart7.Instance = UART7; - 8024dfc: 4b28 ldr r3, [pc, #160] ; (8024ea0 ) - 8024dfe: 4a29 ldr r2, [pc, #164] ; (8024ea4 ) - 8024e00: 601a str r2, [r3, #0] + 8024e80: 4b28 ldr r3, [pc, #160] ; (8024f24 ) + 8024e82: 4a29 ldr r2, [pc, #164] ; (8024f28 ) + 8024e84: 601a str r2, [r3, #0] huart7.Init.BaudRate = 115200; - 8024e02: 4b27 ldr r3, [pc, #156] ; (8024ea0 ) - 8024e04: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8024e08: 605a str r2, [r3, #4] + 8024e86: 4b27 ldr r3, [pc, #156] ; (8024f24 ) + 8024e88: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8024e8c: 605a str r2, [r3, #4] huart7.Init.WordLength = UART_WORDLENGTH_8B; - 8024e0a: 4b25 ldr r3, [pc, #148] ; (8024ea0 ) - 8024e0c: 2200 movs r2, #0 - 8024e0e: 609a str r2, [r3, #8] + 8024e8e: 4b25 ldr r3, [pc, #148] ; (8024f24 ) + 8024e90: 2200 movs r2, #0 + 8024e92: 609a str r2, [r3, #8] huart7.Init.StopBits = UART_STOPBITS_1; - 8024e10: 4b23 ldr r3, [pc, #140] ; (8024ea0 ) - 8024e12: 2200 movs r2, #0 - 8024e14: 60da str r2, [r3, #12] + 8024e94: 4b23 ldr r3, [pc, #140] ; (8024f24 ) + 8024e96: 2200 movs r2, #0 + 8024e98: 60da str r2, [r3, #12] huart7.Init.Parity = UART_PARITY_NONE; - 8024e16: 4b22 ldr r3, [pc, #136] ; (8024ea0 ) - 8024e18: 2200 movs r2, #0 - 8024e1a: 611a str r2, [r3, #16] + 8024e9a: 4b22 ldr r3, [pc, #136] ; (8024f24 ) + 8024e9c: 2200 movs r2, #0 + 8024e9e: 611a str r2, [r3, #16] huart7.Init.Mode = UART_MODE_TX_RX; - 8024e1c: 4b20 ldr r3, [pc, #128] ; (8024ea0 ) - 8024e1e: 220c movs r2, #12 - 8024e20: 615a str r2, [r3, #20] + 8024ea0: 4b20 ldr r3, [pc, #128] ; (8024f24 ) + 8024ea2: 220c movs r2, #12 + 8024ea4: 615a str r2, [r3, #20] huart7.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024e22: 4b1f ldr r3, [pc, #124] ; (8024ea0 ) - 8024e24: 2200 movs r2, #0 - 8024e26: 619a str r2, [r3, #24] + 8024ea6: 4b1f ldr r3, [pc, #124] ; (8024f24 ) + 8024ea8: 2200 movs r2, #0 + 8024eaa: 619a str r2, [r3, #24] huart7.Init.OverSampling = UART_OVERSAMPLING_16; - 8024e28: 4b1d ldr r3, [pc, #116] ; (8024ea0 ) - 8024e2a: 2200 movs r2, #0 - 8024e2c: 61da str r2, [r3, #28] + 8024eac: 4b1d ldr r3, [pc, #116] ; (8024f24 ) + 8024eae: 2200 movs r2, #0 + 8024eb0: 61da str r2, [r3, #28] huart7.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024e2e: 4b1c ldr r3, [pc, #112] ; (8024ea0 ) - 8024e30: 2200 movs r2, #0 - 8024e32: 621a str r2, [r3, #32] + 8024eb2: 4b1c ldr r3, [pc, #112] ; (8024f24 ) + 8024eb4: 2200 movs r2, #0 + 8024eb6: 621a str r2, [r3, #32] huart7.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024e34: 4b1a ldr r3, [pc, #104] ; (8024ea0 ) - 8024e36: 2200 movs r2, #0 - 8024e38: 625a str r2, [r3, #36] ; 0x24 + 8024eb8: 4b1a ldr r3, [pc, #104] ; (8024f24 ) + 8024eba: 2200 movs r2, #0 + 8024ebc: 625a str r2, [r3, #36] ; 0x24 huart7.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_SWAP_INIT|UART_ADVFEATURE_RXOVERRUNDISABLE_INIT - 8024e3a: 4b19 ldr r3, [pc, #100] ; (8024ea0 ) - 8024e3c: 2238 movs r2, #56 ; 0x38 - 8024e3e: 629a str r2, [r3, #40] ; 0x28 + 8024ebe: 4b19 ldr r3, [pc, #100] ; (8024f24 ) + 8024ec0: 2238 movs r2, #56 ; 0x38 + 8024ec2: 629a str r2, [r3, #40] ; 0x28 |UART_ADVFEATURE_DMADISABLEONERROR_INIT; huart7.AdvancedInit.Swap = UART_ADVFEATURE_SWAP_ENABLE; - 8024e40: 4b17 ldr r3, [pc, #92] ; (8024ea0 ) - 8024e42: f44f 4200 mov.w r2, #32768 ; 0x8000 - 8024e46: 639a str r2, [r3, #56] ; 0x38 + 8024ec4: 4b17 ldr r3, [pc, #92] ; (8024f24 ) + 8024ec6: f44f 4200 mov.w r2, #32768 ; 0x8000 + 8024eca: 639a str r2, [r3, #56] ; 0x38 huart7.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024e48: 4b15 ldr r3, [pc, #84] ; (8024ea0 ) - 8024e4a: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024e4e: 63da str r2, [r3, #60] ; 0x3c + 8024ecc: 4b15 ldr r3, [pc, #84] ; (8024f24 ) + 8024ece: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024ed2: 63da str r2, [r3, #60] ; 0x3c huart7.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024e50: 4b13 ldr r3, [pc, #76] ; (8024ea0 ) - 8024e52: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024e56: 641a str r2, [r3, #64] ; 0x40 + 8024ed4: 4b13 ldr r3, [pc, #76] ; (8024f24 ) + 8024ed6: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024eda: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart7) != HAL_OK) - 8024e58: 4811 ldr r0, [pc, #68] ; (8024ea0 ) - 8024e5a: f00d fe29 bl 8032ab0 - 8024e5e: 4603 mov r3, r0 - 8024e60: 2b00 cmp r3, #0 - 8024e62: d001 beq.n 8024e68 + 8024edc: 4811 ldr r0, [pc, #68] ; (8024f24 ) + 8024ede: f00d fe29 bl 8032b34 + 8024ee2: 4603 mov r3, r0 + 8024ee4: 2b00 cmp r3, #0 + 8024ee6: d001 beq.n 8024eec { Error_Handler(); - 8024e64: f7ff fa62 bl 802432c + 8024ee8: f7ff fa62 bl 80243b0 } if (HAL_UARTEx_SetTxFifoThreshold(&huart7, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024e68: 2100 movs r1, #0 - 8024e6a: 480d ldr r0, [pc, #52] ; (8024ea0 ) - 8024e6c: f010 fa29 bl 80352c2 - 8024e70: 4603 mov r3, r0 - 8024e72: 2b00 cmp r3, #0 - 8024e74: d001 beq.n 8024e7a + 8024eec: 2100 movs r1, #0 + 8024eee: 480d ldr r0, [pc, #52] ; (8024f24 ) + 8024ef0: f010 fa29 bl 8035346 + 8024ef4: 4603 mov r3, r0 + 8024ef6: 2b00 cmp r3, #0 + 8024ef8: d001 beq.n 8024efe { Error_Handler(); - 8024e76: f7ff fa59 bl 802432c + 8024efa: f7ff fa59 bl 80243b0 } if (HAL_UARTEx_SetRxFifoThreshold(&huart7, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024e7a: 2100 movs r1, #0 - 8024e7c: 4808 ldr r0, [pc, #32] ; (8024ea0 ) - 8024e7e: f010 fa5e bl 803533e - 8024e82: 4603 mov r3, r0 - 8024e84: 2b00 cmp r3, #0 - 8024e86: d001 beq.n 8024e8c + 8024efe: 2100 movs r1, #0 + 8024f00: 4808 ldr r0, [pc, #32] ; (8024f24 ) + 8024f02: f010 fa5e bl 80353c2 + 8024f06: 4603 mov r3, r0 + 8024f08: 2b00 cmp r3, #0 + 8024f0a: d001 beq.n 8024f10 { Error_Handler(); - 8024e88: f7ff fa50 bl 802432c + 8024f0c: f7ff fa50 bl 80243b0 } if (HAL_UARTEx_DisableFifoMode(&huart7) != HAL_OK) - 8024e8c: 4804 ldr r0, [pc, #16] ; (8024ea0 ) - 8024e8e: f010 f9df bl 8035250 - 8024e92: 4603 mov r3, r0 - 8024e94: 2b00 cmp r3, #0 - 8024e96: d001 beq.n 8024e9c + 8024f10: 4804 ldr r0, [pc, #16] ; (8024f24 ) + 8024f12: f010 f9df bl 80352d4 + 8024f16: 4603 mov r3, r0 + 8024f18: 2b00 cmp r3, #0 + 8024f1a: d001 beq.n 8024f20 { Error_Handler(); - 8024e98: f7ff fa48 bl 802432c + 8024f1c: f7ff fa48 bl 80243b0 } /* USER CODE BEGIN UART7_Init 2 */ /* USER CODE END UART7_Init 2 */ } - 8024e9c: bf00 nop - 8024e9e: bd80 pop {r7, pc} - 8024ea0: 2400b1c4 .word 0x2400b1c4 - 8024ea4: 40007800 .word 0x40007800 + 8024f20: bf00 nop + 8024f22: bd80 pop {r7, pc} + 8024f24: 2400b1cc .word 0x2400b1cc + 8024f28: 40007800 .word 0x40007800 -08024ea8 : +08024f2c : /* USART1 init function */ void MX_USART1_UART_Init(void) { - 8024ea8: b580 push {r7, lr} - 8024eaa: af00 add r7, sp, #0 + 8024f2c: b580 push {r7, lr} + 8024f2e: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; - 8024eac: 4b28 ldr r3, [pc, #160] ; (8024f50 ) - 8024eae: 4a29 ldr r2, [pc, #164] ; (8024f54 ) - 8024eb0: 601a str r2, [r3, #0] + 8024f30: 4b28 ldr r3, [pc, #160] ; (8024fd4 ) + 8024f32: 4a29 ldr r2, [pc, #164] ; (8024fd8 ) + 8024f34: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; - 8024eb2: 4b27 ldr r3, [pc, #156] ; (8024f50 ) - 8024eb4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8024eb8: 605a str r2, [r3, #4] + 8024f36: 4b27 ldr r3, [pc, #156] ; (8024fd4 ) + 8024f38: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 8024f3c: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8024eba: 4b25 ldr r3, [pc, #148] ; (8024f50 ) - 8024ebc: 2200 movs r2, #0 - 8024ebe: 609a str r2, [r3, #8] + 8024f3e: 4b25 ldr r3, [pc, #148] ; (8024fd4 ) + 8024f40: 2200 movs r2, #0 + 8024f42: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8024ec0: 4b23 ldr r3, [pc, #140] ; (8024f50 ) - 8024ec2: 2200 movs r2, #0 - 8024ec4: 60da str r2, [r3, #12] + 8024f44: 4b23 ldr r3, [pc, #140] ; (8024fd4 ) + 8024f46: 2200 movs r2, #0 + 8024f48: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 8024ec6: 4b22 ldr r3, [pc, #136] ; (8024f50 ) - 8024ec8: 2200 movs r2, #0 - 8024eca: 611a str r2, [r3, #16] + 8024f4a: 4b22 ldr r3, [pc, #136] ; (8024fd4 ) + 8024f4c: 2200 movs r2, #0 + 8024f4e: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 8024ecc: 4b20 ldr r3, [pc, #128] ; (8024f50 ) - 8024ece: 220c movs r2, #12 - 8024ed0: 615a str r2, [r3, #20] + 8024f50: 4b20 ldr r3, [pc, #128] ; (8024fd4 ) + 8024f52: 220c movs r2, #12 + 8024f54: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024ed2: 4b1f ldr r3, [pc, #124] ; (8024f50 ) - 8024ed4: 2200 movs r2, #0 - 8024ed6: 619a str r2, [r3, #24] + 8024f56: 4b1f ldr r3, [pc, #124] ; (8024fd4 ) + 8024f58: 2200 movs r2, #0 + 8024f5a: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8024ed8: 4b1d ldr r3, [pc, #116] ; (8024f50 ) - 8024eda: 2200 movs r2, #0 - 8024edc: 61da str r2, [r3, #28] + 8024f5c: 4b1d ldr r3, [pc, #116] ; (8024fd4 ) + 8024f5e: 2200 movs r2, #0 + 8024f60: 61da str r2, [r3, #28] huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024ede: 4b1c ldr r3, [pc, #112] ; (8024f50 ) - 8024ee0: 2200 movs r2, #0 - 8024ee2: 621a str r2, [r3, #32] + 8024f62: 4b1c ldr r3, [pc, #112] ; (8024fd4 ) + 8024f64: 2200 movs r2, #0 + 8024f66: 621a str r2, [r3, #32] huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024ee4: 4b1a ldr r3, [pc, #104] ; (8024f50 ) - 8024ee6: 2200 movs r2, #0 - 8024ee8: 625a str r2, [r3, #36] ; 0x24 + 8024f68: 4b1a ldr r3, [pc, #104] ; (8024fd4 ) + 8024f6a: 2200 movs r2, #0 + 8024f6c: 625a str r2, [r3, #36] ; 0x24 huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_SWAP_INIT|UART_ADVFEATURE_RXOVERRUNDISABLE_INIT - 8024eea: 4b19 ldr r3, [pc, #100] ; (8024f50 ) - 8024eec: 2238 movs r2, #56 ; 0x38 - 8024eee: 629a str r2, [r3, #40] ; 0x28 + 8024f6e: 4b19 ldr r3, [pc, #100] ; (8024fd4 ) + 8024f70: 2238 movs r2, #56 ; 0x38 + 8024f72: 629a str r2, [r3, #40] ; 0x28 |UART_ADVFEATURE_DMADISABLEONERROR_INIT; huart1.AdvancedInit.Swap = UART_ADVFEATURE_SWAP_ENABLE; - 8024ef0: 4b17 ldr r3, [pc, #92] ; (8024f50 ) - 8024ef2: f44f 4200 mov.w r2, #32768 ; 0x8000 - 8024ef6: 639a str r2, [r3, #56] ; 0x38 + 8024f74: 4b17 ldr r3, [pc, #92] ; (8024fd4 ) + 8024f76: f44f 4200 mov.w r2, #32768 ; 0x8000 + 8024f7a: 639a str r2, [r3, #56] ; 0x38 huart1.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024ef8: 4b15 ldr r3, [pc, #84] ; (8024f50 ) - 8024efa: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024efe: 63da str r2, [r3, #60] ; 0x3c + 8024f7c: 4b15 ldr r3, [pc, #84] ; (8024fd4 ) + 8024f7e: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024f82: 63da str r2, [r3, #60] ; 0x3c huart1.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024f00: 4b13 ldr r3, [pc, #76] ; (8024f50 ) - 8024f02: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024f06: 641a str r2, [r3, #64] ; 0x40 + 8024f84: 4b13 ldr r3, [pc, #76] ; (8024fd4 ) + 8024f86: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8024f8a: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart1) != HAL_OK) - 8024f08: 4811 ldr r0, [pc, #68] ; (8024f50 ) - 8024f0a: f00d fdd1 bl 8032ab0 - 8024f0e: 4603 mov r3, r0 - 8024f10: 2b00 cmp r3, #0 - 8024f12: d001 beq.n 8024f18 + 8024f8c: 4811 ldr r0, [pc, #68] ; (8024fd4 ) + 8024f8e: f00d fdd1 bl 8032b34 + 8024f92: 4603 mov r3, r0 + 8024f94: 2b00 cmp r3, #0 + 8024f96: d001 beq.n 8024f9c { Error_Handler(); - 8024f14: f7ff fa0a bl 802432c + 8024f98: f7ff fa0a bl 80243b0 } if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024f18: 2100 movs r1, #0 - 8024f1a: 480d ldr r0, [pc, #52] ; (8024f50 ) - 8024f1c: f010 f9d1 bl 80352c2 - 8024f20: 4603 mov r3, r0 - 8024f22: 2b00 cmp r3, #0 - 8024f24: d001 beq.n 8024f2a + 8024f9c: 2100 movs r1, #0 + 8024f9e: 480d ldr r0, [pc, #52] ; (8024fd4 ) + 8024fa0: f010 f9d1 bl 8035346 + 8024fa4: 4603 mov r3, r0 + 8024fa6: 2b00 cmp r3, #0 + 8024fa8: d001 beq.n 8024fae { Error_Handler(); - 8024f26: f7ff fa01 bl 802432c + 8024faa: f7ff fa01 bl 80243b0 } if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024f2a: 2100 movs r1, #0 - 8024f2c: 4808 ldr r0, [pc, #32] ; (8024f50 ) - 8024f2e: f010 fa06 bl 803533e - 8024f32: 4603 mov r3, r0 - 8024f34: 2b00 cmp r3, #0 - 8024f36: d001 beq.n 8024f3c + 8024fae: 2100 movs r1, #0 + 8024fb0: 4808 ldr r0, [pc, #32] ; (8024fd4 ) + 8024fb2: f010 fa06 bl 80353c2 + 8024fb6: 4603 mov r3, r0 + 8024fb8: 2b00 cmp r3, #0 + 8024fba: d001 beq.n 8024fc0 { Error_Handler(); - 8024f38: f7ff f9f8 bl 802432c + 8024fbc: f7ff f9f8 bl 80243b0 } if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) - 8024f3c: 4804 ldr r0, [pc, #16] ; (8024f50 ) - 8024f3e: f010 f987 bl 8035250 - 8024f42: 4603 mov r3, r0 - 8024f44: 2b00 cmp r3, #0 - 8024f46: d001 beq.n 8024f4c + 8024fc0: 4804 ldr r0, [pc, #16] ; (8024fd4 ) + 8024fc2: f010 f987 bl 80352d4 + 8024fc6: 4603 mov r3, r0 + 8024fc8: 2b00 cmp r3, #0 + 8024fca: d001 beq.n 8024fd0 { Error_Handler(); - 8024f48: f7ff f9f0 bl 802432c + 8024fcc: f7ff f9f0 bl 80243b0 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } - 8024f4c: bf00 nop - 8024f4e: bd80 pop {r7, pc} - 8024f50: 2400b254 .word 0x2400b254 - 8024f54: 40011000 .word 0x40011000 + 8024fd0: bf00 nop + 8024fd2: bd80 pop {r7, pc} + 8024fd4: 2400b25c .word 0x2400b25c + 8024fd8: 40011000 .word 0x40011000 -08024f58 : +08024fdc : /* USART2 init function */ void MX_USART2_UART_Init(void) { - 8024f58: b580 push {r7, lr} - 8024f5a: af00 add r7, sp, #0 + 8024fdc: b580 push {r7, lr} + 8024fde: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; - 8024f5c: 4b27 ldr r3, [pc, #156] ; (8024ffc ) - 8024f5e: 4a28 ldr r2, [pc, #160] ; (8025000 ) - 8024f60: 601a str r2, [r3, #0] + 8024fe0: 4b27 ldr r3, [pc, #156] ; (8025080 ) + 8024fe2: 4a28 ldr r2, [pc, #160] ; (8025084 ) + 8024fe4: 601a str r2, [r3, #0] huart2.Init.BaudRate = 100000; - 8024f62: 4b26 ldr r3, [pc, #152] ; (8024ffc ) - 8024f64: 4a27 ldr r2, [pc, #156] ; (8025004 ) - 8024f66: 605a str r2, [r3, #4] + 8024fe6: 4b26 ldr r3, [pc, #152] ; (8025080 ) + 8024fe8: 4a27 ldr r2, [pc, #156] ; (8025088 ) + 8024fea: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_9B; - 8024f68: 4b24 ldr r3, [pc, #144] ; (8024ffc ) - 8024f6a: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024f6e: 609a str r2, [r3, #8] + 8024fec: 4b24 ldr r3, [pc, #144] ; (8025080 ) + 8024fee: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8024ff2: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; - 8024f70: 4b22 ldr r3, [pc, #136] ; (8024ffc ) - 8024f72: 2200 movs r2, #0 - 8024f74: 60da str r2, [r3, #12] + 8024ff4: 4b22 ldr r3, [pc, #136] ; (8025080 ) + 8024ff6: 2200 movs r2, #0 + 8024ff8: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_EVEN; - 8024f76: 4b21 ldr r3, [pc, #132] ; (8024ffc ) - 8024f78: f44f 6280 mov.w r2, #1024 ; 0x400 - 8024f7c: 611a str r2, [r3, #16] + 8024ffa: 4b21 ldr r3, [pc, #132] ; (8025080 ) + 8024ffc: f44f 6280 mov.w r2, #1024 ; 0x400 + 8025000: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; - 8024f7e: 4b1f ldr r3, [pc, #124] ; (8024ffc ) - 8024f80: 220c movs r2, #12 - 8024f82: 615a str r2, [r3, #20] + 8025002: 4b1f ldr r3, [pc, #124] ; (8025080 ) + 8025004: 220c movs r2, #12 + 8025006: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8024f84: 4b1d ldr r3, [pc, #116] ; (8024ffc ) - 8024f86: 2200 movs r2, #0 - 8024f88: 619a str r2, [r3, #24] + 8025008: 4b1d ldr r3, [pc, #116] ; (8025080 ) + 802500a: 2200 movs r2, #0 + 802500c: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 8024f8a: 4b1c ldr r3, [pc, #112] ; (8024ffc ) - 8024f8c: 2200 movs r2, #0 - 8024f8e: 61da str r2, [r3, #28] + 802500e: 4b1c ldr r3, [pc, #112] ; (8025080 ) + 8025010: 2200 movs r2, #0 + 8025012: 61da str r2, [r3, #28] huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8024f90: 4b1a ldr r3, [pc, #104] ; (8024ffc ) - 8024f92: 2200 movs r2, #0 - 8024f94: 621a str r2, [r3, #32] + 8025014: 4b1a ldr r3, [pc, #104] ; (8025080 ) + 8025016: 2200 movs r2, #0 + 8025018: 621a str r2, [r3, #32] huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8024f96: 4b19 ldr r3, [pc, #100] ; (8024ffc ) - 8024f98: 2200 movs r2, #0 - 8024f9a: 625a str r2, [r3, #36] ; 0x24 + 802501a: 4b19 ldr r3, [pc, #100] ; (8025080 ) + 802501c: 2200 movs r2, #0 + 802501e: 625a str r2, [r3, #36] ; 0x24 huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_RXOVERRUNDISABLE_INIT|UART_ADVFEATURE_DMADISABLEONERROR_INIT; - 8024f9c: 4b17 ldr r3, [pc, #92] ; (8024ffc ) - 8024f9e: 2230 movs r2, #48 ; 0x30 - 8024fa0: 629a str r2, [r3, #40] ; 0x28 + 8025020: 4b17 ldr r3, [pc, #92] ; (8025080 ) + 8025022: 2230 movs r2, #48 ; 0x30 + 8025024: 629a str r2, [r3, #40] ; 0x28 huart2.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8024fa2: 4b16 ldr r3, [pc, #88] ; (8024ffc ) - 8024fa4: f44f 5280 mov.w r2, #4096 ; 0x1000 - 8024fa8: 63da str r2, [r3, #60] ; 0x3c + 8025026: 4b16 ldr r3, [pc, #88] ; (8025080 ) + 8025028: f44f 5280 mov.w r2, #4096 ; 0x1000 + 802502c: 63da str r2, [r3, #60] ; 0x3c huart2.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8024faa: 4b14 ldr r3, [pc, #80] ; (8024ffc ) - 8024fac: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8024fb0: 641a str r2, [r3, #64] ; 0x40 + 802502e: 4b14 ldr r3, [pc, #80] ; (8025080 ) + 8025030: f44f 5200 mov.w r2, #8192 ; 0x2000 + 8025034: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart2) != HAL_OK) - 8024fb2: 4812 ldr r0, [pc, #72] ; (8024ffc ) - 8024fb4: f00d fd7c bl 8032ab0 - 8024fb8: 4603 mov r3, r0 - 8024fba: 2b00 cmp r3, #0 - 8024fbc: d001 beq.n 8024fc2 + 8025036: 4812 ldr r0, [pc, #72] ; (8025080 ) + 8025038: f00d fd7c bl 8032b34 + 802503c: 4603 mov r3, r0 + 802503e: 2b00 cmp r3, #0 + 8025040: d001 beq.n 8025046 { Error_Handler(); - 8024fbe: f7ff f9b5 bl 802432c + 8025042: f7ff f9b5 bl 80243b0 } if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024fc2: 2100 movs r1, #0 - 8024fc4: 480d ldr r0, [pc, #52] ; (8024ffc ) - 8024fc6: f010 f97c bl 80352c2 - 8024fca: 4603 mov r3, r0 - 8024fcc: 2b00 cmp r3, #0 - 8024fce: d001 beq.n 8024fd4 + 8025046: 2100 movs r1, #0 + 8025048: 480d ldr r0, [pc, #52] ; (8025080 ) + 802504a: f010 f97c bl 8035346 + 802504e: 4603 mov r3, r0 + 8025050: 2b00 cmp r3, #0 + 8025052: d001 beq.n 8025058 { Error_Handler(); - 8024fd0: f7ff f9ac bl 802432c + 8025054: f7ff f9ac bl 80243b0 } if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 8024fd4: 2100 movs r1, #0 - 8024fd6: 4809 ldr r0, [pc, #36] ; (8024ffc ) - 8024fd8: f010 f9b1 bl 803533e - 8024fdc: 4603 mov r3, r0 - 8024fde: 2b00 cmp r3, #0 - 8024fe0: d001 beq.n 8024fe6 + 8025058: 2100 movs r1, #0 + 802505a: 4809 ldr r0, [pc, #36] ; (8025080 ) + 802505c: f010 f9b1 bl 80353c2 + 8025060: 4603 mov r3, r0 + 8025062: 2b00 cmp r3, #0 + 8025064: d001 beq.n 802506a { Error_Handler(); - 8024fe2: f7ff f9a3 bl 802432c + 8025066: f7ff f9a3 bl 80243b0 } if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK) - 8024fe6: 4805 ldr r0, [pc, #20] ; (8024ffc ) - 8024fe8: f010 f932 bl 8035250 - 8024fec: 4603 mov r3, r0 - 8024fee: 2b00 cmp r3, #0 - 8024ff0: d001 beq.n 8024ff6 + 802506a: 4805 ldr r0, [pc, #20] ; (8025080 ) + 802506c: f010 f932 bl 80352d4 + 8025070: 4603 mov r3, r0 + 8025072: 2b00 cmp r3, #0 + 8025074: d001 beq.n 802507a { Error_Handler(); - 8024ff2: f7ff f99b bl 802432c + 8025076: f7ff f99b bl 80243b0 /* USER CODE END USART2_Init 2 */ } - 8024ff6: bf00 nop - 8024ff8: bd80 pop {r7, pc} - 8024ffa: bf00 nop - 8024ffc: 2400b2e4 .word 0x2400b2e4 - 8025000: 40004400 .word 0x40004400 - 8025004: 000186a0 .word 0x000186a0 + 802507a: bf00 nop + 802507c: bd80 pop {r7, pc} + 802507e: bf00 nop + 8025080: 2400b2ec .word 0x2400b2ec + 8025084: 40004400 .word 0x40004400 + 8025088: 000186a0 .word 0x000186a0 -08025008 : +0802508c : /* USART3 init function */ void MX_USART3_UART_Init(void) { - 8025008: b580 push {r7, lr} - 802500a: af00 add r7, sp, #0 + 802508c: b580 push {r7, lr} + 802508e: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; - 802500c: 4b28 ldr r3, [pc, #160] ; (80250b0 ) - 802500e: 4a29 ldr r2, [pc, #164] ; (80250b4 ) - 8025010: 601a str r2, [r3, #0] + 8025090: 4b28 ldr r3, [pc, #160] ; (8025134 ) + 8025092: 4a29 ldr r2, [pc, #164] ; (8025138 ) + 8025094: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; - 8025012: 4b27 ldr r3, [pc, #156] ; (80250b0 ) - 8025014: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 8025018: 605a str r2, [r3, #4] + 8025096: 4b27 ldr r3, [pc, #156] ; (8025134 ) + 8025098: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 802509c: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; - 802501a: 4b25 ldr r3, [pc, #148] ; (80250b0 ) - 802501c: 2200 movs r2, #0 - 802501e: 609a str r2, [r3, #8] + 802509e: 4b25 ldr r3, [pc, #148] ; (8025134 ) + 80250a0: 2200 movs r2, #0 + 80250a2: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; - 8025020: 4b23 ldr r3, [pc, #140] ; (80250b0 ) - 8025022: 2200 movs r2, #0 - 8025024: 60da str r2, [r3, #12] + 80250a4: 4b23 ldr r3, [pc, #140] ; (8025134 ) + 80250a6: 2200 movs r2, #0 + 80250a8: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; - 8025026: 4b22 ldr r3, [pc, #136] ; (80250b0 ) - 8025028: 2200 movs r2, #0 - 802502a: 611a str r2, [r3, #16] + 80250aa: 4b22 ldr r3, [pc, #136] ; (8025134 ) + 80250ac: 2200 movs r2, #0 + 80250ae: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; - 802502c: 4b20 ldr r3, [pc, #128] ; (80250b0 ) - 802502e: 220c movs r2, #12 - 8025030: 615a str r2, [r3, #20] + 80250b0: 4b20 ldr r3, [pc, #128] ; (8025134 ) + 80250b2: 220c movs r2, #12 + 80250b4: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8025032: 4b1f ldr r3, [pc, #124] ; (80250b0 ) - 8025034: 2200 movs r2, #0 - 8025036: 619a str r2, [r3, #24] + 80250b6: 4b1f ldr r3, [pc, #124] ; (8025134 ) + 80250b8: 2200 movs r2, #0 + 80250ba: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; - 8025038: 4b1d ldr r3, [pc, #116] ; (80250b0 ) - 802503a: 2200 movs r2, #0 - 802503c: 61da str r2, [r3, #28] + 80250bc: 4b1d ldr r3, [pc, #116] ; (8025134 ) + 80250be: 2200 movs r2, #0 + 80250c0: 61da str r2, [r3, #28] huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 802503e: 4b1c ldr r3, [pc, #112] ; (80250b0 ) - 8025040: 2200 movs r2, #0 - 8025042: 621a str r2, [r3, #32] + 80250c2: 4b1c ldr r3, [pc, #112] ; (8025134 ) + 80250c4: 2200 movs r2, #0 + 80250c6: 621a str r2, [r3, #32] huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 8025044: 4b1a ldr r3, [pc, #104] ; (80250b0 ) - 8025046: 2200 movs r2, #0 - 8025048: 625a str r2, [r3, #36] ; 0x24 + 80250c8: 4b1a ldr r3, [pc, #104] ; (8025134 ) + 80250ca: 2200 movs r2, #0 + 80250cc: 625a str r2, [r3, #36] ; 0x24 huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_SWAP_INIT|UART_ADVFEATURE_RXOVERRUNDISABLE_INIT - 802504a: 4b19 ldr r3, [pc, #100] ; (80250b0 ) - 802504c: 2238 movs r2, #56 ; 0x38 - 802504e: 629a str r2, [r3, #40] ; 0x28 + 80250ce: 4b19 ldr r3, [pc, #100] ; (8025134 ) + 80250d0: 2238 movs r2, #56 ; 0x38 + 80250d2: 629a str r2, [r3, #40] ; 0x28 |UART_ADVFEATURE_DMADISABLEONERROR_INIT; huart3.AdvancedInit.Swap = UART_ADVFEATURE_SWAP_ENABLE; - 8025050: 4b17 ldr r3, [pc, #92] ; (80250b0 ) - 8025052: f44f 4200 mov.w r2, #32768 ; 0x8000 - 8025056: 639a str r2, [r3, #56] ; 0x38 + 80250d4: 4b17 ldr r3, [pc, #92] ; (8025134 ) + 80250d6: f44f 4200 mov.w r2, #32768 ; 0x8000 + 80250da: 639a str r2, [r3, #56] ; 0x38 huart3.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8025058: 4b15 ldr r3, [pc, #84] ; (80250b0 ) - 802505a: f44f 5280 mov.w r2, #4096 ; 0x1000 - 802505e: 63da str r2, [r3, #60] ; 0x3c + 80250dc: 4b15 ldr r3, [pc, #84] ; (8025134 ) + 80250de: f44f 5280 mov.w r2, #4096 ; 0x1000 + 80250e2: 63da str r2, [r3, #60] ; 0x3c huart3.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8025060: 4b13 ldr r3, [pc, #76] ; (80250b0 ) - 8025062: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8025066: 641a str r2, [r3, #64] ; 0x40 + 80250e4: 4b13 ldr r3, [pc, #76] ; (8025134 ) + 80250e6: f44f 5200 mov.w r2, #8192 ; 0x2000 + 80250ea: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart3) != HAL_OK) - 8025068: 4811 ldr r0, [pc, #68] ; (80250b0 ) - 802506a: f00d fd21 bl 8032ab0 - 802506e: 4603 mov r3, r0 - 8025070: 2b00 cmp r3, #0 - 8025072: d001 beq.n 8025078 + 80250ec: 4811 ldr r0, [pc, #68] ; (8025134 ) + 80250ee: f00d fd21 bl 8032b34 + 80250f2: 4603 mov r3, r0 + 80250f4: 2b00 cmp r3, #0 + 80250f6: d001 beq.n 80250fc { Error_Handler(); - 8025074: f7ff f95a bl 802432c + 80250f8: f7ff f95a bl 80243b0 } if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8025078: 2100 movs r1, #0 - 802507a: 480d ldr r0, [pc, #52] ; (80250b0 ) - 802507c: f010 f921 bl 80352c2 - 8025080: 4603 mov r3, r0 - 8025082: 2b00 cmp r3, #0 - 8025084: d001 beq.n 802508a + 80250fc: 2100 movs r1, #0 + 80250fe: 480d ldr r0, [pc, #52] ; (8025134 ) + 8025100: f010 f921 bl 8035346 + 8025104: 4603 mov r3, r0 + 8025106: 2b00 cmp r3, #0 + 8025108: d001 beq.n 802510e { Error_Handler(); - 8025086: f7ff f951 bl 802432c + 802510a: f7ff f951 bl 80243b0 } if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 802508a: 2100 movs r1, #0 - 802508c: 4808 ldr r0, [pc, #32] ; (80250b0 ) - 802508e: f010 f956 bl 803533e - 8025092: 4603 mov r3, r0 - 8025094: 2b00 cmp r3, #0 - 8025096: d001 beq.n 802509c + 802510e: 2100 movs r1, #0 + 8025110: 4808 ldr r0, [pc, #32] ; (8025134 ) + 8025112: f010 f956 bl 80353c2 + 8025116: 4603 mov r3, r0 + 8025118: 2b00 cmp r3, #0 + 802511a: d001 beq.n 8025120 { Error_Handler(); - 8025098: f7ff f948 bl 802432c + 802511c: f7ff f948 bl 80243b0 } if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK) - 802509c: 4804 ldr r0, [pc, #16] ; (80250b0 ) - 802509e: f010 f8d7 bl 8035250 - 80250a2: 4603 mov r3, r0 - 80250a4: 2b00 cmp r3, #0 - 80250a6: d001 beq.n 80250ac + 8025120: 4804 ldr r0, [pc, #16] ; (8025134 ) + 8025122: f010 f8d7 bl 80352d4 + 8025126: 4603 mov r3, r0 + 8025128: 2b00 cmp r3, #0 + 802512a: d001 beq.n 8025130 { Error_Handler(); - 80250a8: f7ff f940 bl 802432c + 802512c: f7ff f940 bl 80243b0 } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } - 80250ac: bf00 nop - 80250ae: bd80 pop {r7, pc} - 80250b0: 2400b374 .word 0x2400b374 - 80250b4: 40004800 .word 0x40004800 + 8025130: bf00 nop + 8025132: bd80 pop {r7, pc} + 8025134: 2400b37c .word 0x2400b37c + 8025138: 40004800 .word 0x40004800 -080250b8 : +0802513c : /* USART6 init function */ void MX_USART6_UART_Init(void) { - 80250b8: b580 push {r7, lr} - 80250ba: af00 add r7, sp, #0 + 802513c: b580 push {r7, lr} + 802513e: af00 add r7, sp, #0 /* USER CODE END USART6_Init 0 */ /* USER CODE BEGIN USART6_Init 1 */ /* USER CODE END USART6_Init 1 */ huart6.Instance = USART6; - 80250bc: 4b28 ldr r3, [pc, #160] ; (8025160 ) - 80250be: 4a29 ldr r2, [pc, #164] ; (8025164 ) - 80250c0: 601a str r2, [r3, #0] + 8025140: 4b28 ldr r3, [pc, #160] ; (80251e4 ) + 8025142: 4a29 ldr r2, [pc, #164] ; (80251e8 ) + 8025144: 601a str r2, [r3, #0] huart6.Init.BaudRate = 115200; - 80250c2: 4b27 ldr r3, [pc, #156] ; (8025160 ) - 80250c4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 - 80250c8: 605a str r2, [r3, #4] + 8025146: 4b27 ldr r3, [pc, #156] ; (80251e4 ) + 8025148: f44f 32e1 mov.w r2, #115200 ; 0x1c200 + 802514c: 605a str r2, [r3, #4] huart6.Init.WordLength = UART_WORDLENGTH_8B; - 80250ca: 4b25 ldr r3, [pc, #148] ; (8025160 ) - 80250cc: 2200 movs r2, #0 - 80250ce: 609a str r2, [r3, #8] + 802514e: 4b25 ldr r3, [pc, #148] ; (80251e4 ) + 8025150: 2200 movs r2, #0 + 8025152: 609a str r2, [r3, #8] huart6.Init.StopBits = UART_STOPBITS_1; - 80250d0: 4b23 ldr r3, [pc, #140] ; (8025160 ) - 80250d2: 2200 movs r2, #0 - 80250d4: 60da str r2, [r3, #12] + 8025154: 4b23 ldr r3, [pc, #140] ; (80251e4 ) + 8025156: 2200 movs r2, #0 + 8025158: 60da str r2, [r3, #12] huart6.Init.Parity = UART_PARITY_NONE; - 80250d6: 4b22 ldr r3, [pc, #136] ; (8025160 ) - 80250d8: 2200 movs r2, #0 - 80250da: 611a str r2, [r3, #16] + 802515a: 4b22 ldr r3, [pc, #136] ; (80251e4 ) + 802515c: 2200 movs r2, #0 + 802515e: 611a str r2, [r3, #16] huart6.Init.Mode = UART_MODE_TX_RX; - 80250dc: 4b20 ldr r3, [pc, #128] ; (8025160 ) - 80250de: 220c movs r2, #12 - 80250e0: 615a str r2, [r3, #20] + 8025160: 4b20 ldr r3, [pc, #128] ; (80251e4 ) + 8025162: 220c movs r2, #12 + 8025164: 615a str r2, [r3, #20] huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 80250e2: 4b1f ldr r3, [pc, #124] ; (8025160 ) - 80250e4: 2200 movs r2, #0 - 80250e6: 619a str r2, [r3, #24] + 8025166: 4b1f ldr r3, [pc, #124] ; (80251e4 ) + 8025168: 2200 movs r2, #0 + 802516a: 619a str r2, [r3, #24] huart6.Init.OverSampling = UART_OVERSAMPLING_16; - 80250e8: 4b1d ldr r3, [pc, #116] ; (8025160 ) - 80250ea: 2200 movs r2, #0 - 80250ec: 61da str r2, [r3, #28] + 802516c: 4b1d ldr r3, [pc, #116] ; (80251e4 ) + 802516e: 2200 movs r2, #0 + 8025170: 61da str r2, [r3, #28] huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 80250ee: 4b1c ldr r3, [pc, #112] ; (8025160 ) - 80250f0: 2200 movs r2, #0 - 80250f2: 621a str r2, [r3, #32] + 8025172: 4b1c ldr r3, [pc, #112] ; (80251e4 ) + 8025174: 2200 movs r2, #0 + 8025176: 621a str r2, [r3, #32] huart6.Init.ClockPrescaler = UART_PRESCALER_DIV1; - 80250f4: 4b1a ldr r3, [pc, #104] ; (8025160 ) - 80250f6: 2200 movs r2, #0 - 80250f8: 625a str r2, [r3, #36] ; 0x24 + 8025178: 4b1a ldr r3, [pc, #104] ; (80251e4 ) + 802517a: 2200 movs r2, #0 + 802517c: 625a str r2, [r3, #36] ; 0x24 huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_SWAP_INIT|UART_ADVFEATURE_RXOVERRUNDISABLE_INIT - 80250fa: 4b19 ldr r3, [pc, #100] ; (8025160 ) - 80250fc: 2238 movs r2, #56 ; 0x38 - 80250fe: 629a str r2, [r3, #40] ; 0x28 + 802517e: 4b19 ldr r3, [pc, #100] ; (80251e4 ) + 8025180: 2238 movs r2, #56 ; 0x38 + 8025182: 629a str r2, [r3, #40] ; 0x28 |UART_ADVFEATURE_DMADISABLEONERROR_INIT; huart6.AdvancedInit.Swap = UART_ADVFEATURE_SWAP_ENABLE; - 8025100: 4b17 ldr r3, [pc, #92] ; (8025160 ) - 8025102: f44f 4200 mov.w r2, #32768 ; 0x8000 - 8025106: 639a str r2, [r3, #56] ; 0x38 + 8025184: 4b17 ldr r3, [pc, #92] ; (80251e4 ) + 8025186: f44f 4200 mov.w r2, #32768 ; 0x8000 + 802518a: 639a str r2, [r3, #56] ; 0x38 huart6.AdvancedInit.OverrunDisable = UART_ADVFEATURE_OVERRUN_DISABLE; - 8025108: 4b15 ldr r3, [pc, #84] ; (8025160 ) - 802510a: f44f 5280 mov.w r2, #4096 ; 0x1000 - 802510e: 63da str r2, [r3, #60] ; 0x3c + 802518c: 4b15 ldr r3, [pc, #84] ; (80251e4 ) + 802518e: f44f 5280 mov.w r2, #4096 ; 0x1000 + 8025192: 63da str r2, [r3, #60] ; 0x3c huart6.AdvancedInit.DMADisableonRxError = UART_ADVFEATURE_DMA_DISABLEONRXERROR; - 8025110: 4b13 ldr r3, [pc, #76] ; (8025160 ) - 8025112: f44f 5200 mov.w r2, #8192 ; 0x2000 - 8025116: 641a str r2, [r3, #64] ; 0x40 + 8025194: 4b13 ldr r3, [pc, #76] ; (80251e4 ) + 8025196: f44f 5200 mov.w r2, #8192 ; 0x2000 + 802519a: 641a str r2, [r3, #64] ; 0x40 if (HAL_UART_Init(&huart6) != HAL_OK) - 8025118: 4811 ldr r0, [pc, #68] ; (8025160 ) - 802511a: f00d fcc9 bl 8032ab0 - 802511e: 4603 mov r3, r0 - 8025120: 2b00 cmp r3, #0 - 8025122: d001 beq.n 8025128 + 802519c: 4811 ldr r0, [pc, #68] ; (80251e4 ) + 802519e: f00d fcc9 bl 8032b34 + 80251a2: 4603 mov r3, r0 + 80251a4: 2b00 cmp r3, #0 + 80251a6: d001 beq.n 80251ac { Error_Handler(); - 8025124: f7ff f902 bl 802432c + 80251a8: f7ff f902 bl 80243b0 } if (HAL_UARTEx_SetTxFifoThreshold(&huart6, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) - 8025128: 2100 movs r1, #0 - 802512a: 480d ldr r0, [pc, #52] ; (8025160 ) - 802512c: f010 f8c9 bl 80352c2 - 8025130: 4603 mov r3, r0 - 8025132: 2b00 cmp r3, #0 - 8025134: d001 beq.n 802513a + 80251ac: 2100 movs r1, #0 + 80251ae: 480d ldr r0, [pc, #52] ; (80251e4 ) + 80251b0: f010 f8c9 bl 8035346 + 80251b4: 4603 mov r3, r0 + 80251b6: 2b00 cmp r3, #0 + 80251b8: d001 beq.n 80251be { Error_Handler(); - 8025136: f7ff f8f9 bl 802432c + 80251ba: f7ff f8f9 bl 80243b0 } if (HAL_UARTEx_SetRxFifoThreshold(&huart6, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) - 802513a: 2100 movs r1, #0 - 802513c: 4808 ldr r0, [pc, #32] ; (8025160 ) - 802513e: f010 f8fe bl 803533e - 8025142: 4603 mov r3, r0 - 8025144: 2b00 cmp r3, #0 - 8025146: d001 beq.n 802514c + 80251be: 2100 movs r1, #0 + 80251c0: 4808 ldr r0, [pc, #32] ; (80251e4 ) + 80251c2: f010 f8fe bl 80353c2 + 80251c6: 4603 mov r3, r0 + 80251c8: 2b00 cmp r3, #0 + 80251ca: d001 beq.n 80251d0 { Error_Handler(); - 8025148: f7ff f8f0 bl 802432c + 80251cc: f7ff f8f0 bl 80243b0 } if (HAL_UARTEx_DisableFifoMode(&huart6) != HAL_OK) - 802514c: 4804 ldr r0, [pc, #16] ; (8025160 ) - 802514e: f010 f87f bl 8035250 - 8025152: 4603 mov r3, r0 - 8025154: 2b00 cmp r3, #0 - 8025156: d001 beq.n 802515c + 80251d0: 4804 ldr r0, [pc, #16] ; (80251e4 ) + 80251d2: f010 f87f bl 80352d4 + 80251d6: 4603 mov r3, r0 + 80251d8: 2b00 cmp r3, #0 + 80251da: d001 beq.n 80251e0 { Error_Handler(); - 8025158: f7ff f8e8 bl 802432c + 80251dc: f7ff f8e8 bl 80243b0 } /* USER CODE BEGIN USART6_Init 2 */ /* USER CODE END USART6_Init 2 */ } - 802515c: bf00 nop - 802515e: bd80 pop {r7, pc} - 8025160: 2400b404 .word 0x2400b404 - 8025164: 40011400 .word 0x40011400 + 80251e0: bf00 nop + 80251e2: bd80 pop {r7, pc} + 80251e4: 2400b40c .word 0x2400b40c + 80251e8: 40011400 .word 0x40011400 -08025168 : +080251ec : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { - 8025168: b580 push {r7, lr} - 802516a: b0c8 sub sp, #288 ; 0x120 - 802516c: af00 add r7, sp, #0 - 802516e: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025172: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025176: 6018 str r0, [r3, #0] + 80251ec: b580 push {r7, lr} + 80251ee: b0c8 sub sp, #288 ; 0x120 + 80251f0: af00 add r7, sp, #0 + 80251f2: f507 7390 add.w r3, r7, #288 ; 0x120 + 80251f6: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80251fa: 6018 str r0, [r3, #0] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8025178: f507 7386 add.w r3, r7, #268 ; 0x10c - 802517c: 2200 movs r2, #0 - 802517e: 601a str r2, [r3, #0] - 8025180: 605a str r2, [r3, #4] - 8025182: 609a str r2, [r3, #8] - 8025184: 60da str r2, [r3, #12] - 8025186: 611a str r2, [r3, #16] + 80251fc: f507 7386 add.w r3, r7, #268 ; 0x10c + 8025200: 2200 movs r2, #0 + 8025202: 601a str r2, [r3, #0] + 8025204: 605a str r2, [r3, #4] + 8025206: 609a str r2, [r3, #8] + 8025208: 60da str r2, [r3, #12] + 802520a: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 8025188: f107 0350 add.w r3, r7, #80 ; 0x50 - 802518c: 22bc movs r2, #188 ; 0xbc - 802518e: 2100 movs r1, #0 - 8025190: 4618 mov r0, r3 - 8025192: f01b fbd5 bl 8040940 + 802520c: f107 0350 add.w r3, r7, #80 ; 0x50 + 8025210: 22bc movs r2, #188 ; 0xbc + 8025212: 2100 movs r1, #0 + 8025214: 4618 mov r0, r3 + 8025216: f01b fbd5 bl 80409c4 if(uartHandle->Instance==LPUART1) - 8025196: f507 7390 add.w r3, r7, #288 ; 0x120 - 802519a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802519e: 681b ldr r3, [r3, #0] - 80251a0: 681b ldr r3, [r3, #0] - 80251a2: 4a8b ldr r2, [pc, #556] ; (80253d0 ) - 80251a4: 4293 cmp r3, r2 - 80251a6: d17e bne.n 80252a6 + 802521a: f507 7390 add.w r3, r7, #288 ; 0x120 + 802521e: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025222: 681b ldr r3, [r3, #0] + 8025224: 681b ldr r3, [r3, #0] + 8025226: 4a8b ldr r2, [pc, #556] ; (8025454 ) + 8025228: 4293 cmp r3, r2 + 802522a: d17e bne.n 802532a /* USER CODE END LPUART1_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; - 80251a8: 2304 movs r3, #4 - 80251aa: 653b str r3, [r7, #80] ; 0x50 + 802522c: 2304 movs r3, #4 + 802522e: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_D3PCLK1; - 80251ac: 2300 movs r3, #0 - 80251ae: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 8025230: 2300 movs r3, #0 + 8025232: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 80251b2: f107 0350 add.w r3, r7, #80 ; 0x50 - 80251b6: 4618 mov r0, r3 - 80251b8: f00a fdfa bl 802fdb0 - 80251bc: 4603 mov r3, r0 - 80251be: 2b00 cmp r3, #0 - 80251c0: d001 beq.n 80251c6 + 8025236: f107 0350 add.w r3, r7, #80 ; 0x50 + 802523a: 4618 mov r0, r3 + 802523c: f00a fdfa bl 802fe34 + 8025240: 4603 mov r3, r0 + 8025242: 2b00 cmp r3, #0 + 8025244: d001 beq.n 802524a { Error_Handler(); - 80251c2: f7ff f8b3 bl 802432c + 8025246: f7ff f8b3 bl 80243b0 } /* LPUART1 clock enable */ __HAL_RCC_LPUART1_CLK_ENABLE(); - 80251c6: 4b83 ldr r3, [pc, #524] ; (80253d4 ) - 80251c8: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 80251cc: 4a81 ldr r2, [pc, #516] ; (80253d4 ) - 80251ce: f043 0308 orr.w r3, r3, #8 - 80251d2: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 - 80251d6: 4b7f ldr r3, [pc, #508] ; (80253d4 ) - 80251d8: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 80251dc: f003 0308 and.w r3, r3, #8 - 80251e0: 64fb str r3, [r7, #76] ; 0x4c - 80251e2: 6cfb ldr r3, [r7, #76] ; 0x4c + 802524a: 4b83 ldr r3, [pc, #524] ; (8025458 ) + 802524c: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 8025250: 4a81 ldr r2, [pc, #516] ; (8025458 ) + 8025252: f043 0308 orr.w r3, r3, #8 + 8025256: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 + 802525a: 4b7f ldr r3, [pc, #508] ; (8025458 ) + 802525c: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 8025260: f003 0308 and.w r3, r3, #8 + 8025264: 64fb str r3, [r7, #76] ; 0x4c + 8025266: 6cfb ldr r3, [r7, #76] ; 0x4c __HAL_RCC_GPIOA_CLK_ENABLE(); - 80251e4: 4b7b ldr r3, [pc, #492] ; (80253d4 ) - 80251e6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80251ea: 4a7a ldr r2, [pc, #488] ; (80253d4 ) - 80251ec: f043 0301 orr.w r3, r3, #1 - 80251f0: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 80251f4: 4b77 ldr r3, [pc, #476] ; (80253d4 ) - 80251f6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80251fa: f003 0301 and.w r3, r3, #1 - 80251fe: 64bb str r3, [r7, #72] ; 0x48 - 8025200: 6cbb ldr r3, [r7, #72] ; 0x48 + 8025268: 4b7b ldr r3, [pc, #492] ; (8025458 ) + 802526a: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 802526e: 4a7a ldr r2, [pc, #488] ; (8025458 ) + 8025270: f043 0301 orr.w r3, r3, #1 + 8025274: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8025278: 4b77 ldr r3, [pc, #476] ; (8025458 ) + 802527a: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 802527e: f003 0301 and.w r3, r3, #1 + 8025282: 64bb str r3, [r7, #72] ; 0x48 + 8025284: 6cbb ldr r3, [r7, #72] ; 0x48 /**LPUART1 GPIO Configuration PA9 ------> LPUART1_TX PA10 ------> LPUART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; - 8025202: f44f 63c0 mov.w r3, #1536 ; 0x600 - 8025206: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025286: f44f 63c0 mov.w r3, #1536 ; 0x600 + 802528a: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 802520a: 2302 movs r3, #2 - 802520c: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 802528e: 2302 movs r3, #2 + 8025290: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8025210: 2300 movs r3, #0 - 8025212: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 8025294: 2300 movs r3, #0 + 8025296: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8025216: 2300 movs r3, #0 - 8025218: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 802529a: 2300 movs r3, #0 + 802529c: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF3_LPUART; - 802521c: 2303 movs r3, #3 - 802521e: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 80252a0: 2303 movs r3, #3 + 80252a2: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8025222: f507 7386 add.w r3, r7, #268 ; 0x10c - 8025226: 4619 mov r1, r3 - 8025228: 486b ldr r0, [pc, #428] ; (80253d8 ) - 802522a: f008 f91f bl 802d46c + 80252a6: f507 7386 add.w r3, r7, #268 ; 0x10c + 80252aa: 4619 mov r1, r3 + 80252ac: 486b ldr r0, [pc, #428] ; (802545c ) + 80252ae: f008 f91f bl 802d4f0 /* LPUART1 DMA Init */ /* LPUART1_TX Init */ hdma_lpuart1_tx.Instance = BDMA_Channel0; - 802522e: 4b6b ldr r3, [pc, #428] ; (80253dc ) - 8025230: 4a6b ldr r2, [pc, #428] ; (80253e0 ) - 8025232: 601a str r2, [r3, #0] + 80252b2: 4b6b ldr r3, [pc, #428] ; (8025460 ) + 80252b4: 4a6b ldr r2, [pc, #428] ; (8025464 ) + 80252b6: 601a str r2, [r3, #0] hdma_lpuart1_tx.Init.Request = BDMA_REQUEST_LPUART1_TX; - 8025234: 4b69 ldr r3, [pc, #420] ; (80253dc ) - 8025236: 220a movs r2, #10 - 8025238: 605a str r2, [r3, #4] + 80252b8: 4b69 ldr r3, [pc, #420] ; (8025460 ) + 80252ba: 220a movs r2, #10 + 80252bc: 605a str r2, [r3, #4] hdma_lpuart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 802523a: 4b68 ldr r3, [pc, #416] ; (80253dc ) - 802523c: 2240 movs r2, #64 ; 0x40 - 802523e: 609a str r2, [r3, #8] + 80252be: 4b68 ldr r3, [pc, #416] ; (8025460 ) + 80252c0: 2240 movs r2, #64 ; 0x40 + 80252c2: 609a str r2, [r3, #8] hdma_lpuart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8025240: 4b66 ldr r3, [pc, #408] ; (80253dc ) - 8025242: 2200 movs r2, #0 - 8025244: 60da str r2, [r3, #12] + 80252c4: 4b66 ldr r3, [pc, #408] ; (8025460 ) + 80252c6: 2200 movs r2, #0 + 80252c8: 60da str r2, [r3, #12] hdma_lpuart1_tx.Init.MemInc = DMA_MINC_ENABLE; - 8025246: 4b65 ldr r3, [pc, #404] ; (80253dc ) - 8025248: f44f 6280 mov.w r2, #1024 ; 0x400 - 802524c: 611a str r2, [r3, #16] + 80252ca: 4b65 ldr r3, [pc, #404] ; (8025460 ) + 80252cc: f44f 6280 mov.w r2, #1024 ; 0x400 + 80252d0: 611a str r2, [r3, #16] hdma_lpuart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 802524e: 4b63 ldr r3, [pc, #396] ; (80253dc ) - 8025250: 2200 movs r2, #0 - 8025252: 615a str r2, [r3, #20] + 80252d2: 4b63 ldr r3, [pc, #396] ; (8025460 ) + 80252d4: 2200 movs r2, #0 + 80252d6: 615a str r2, [r3, #20] hdma_lpuart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8025254: 4b61 ldr r3, [pc, #388] ; (80253dc ) - 8025256: 2200 movs r2, #0 - 8025258: 619a str r2, [r3, #24] + 80252d8: 4b61 ldr r3, [pc, #388] ; (8025460 ) + 80252da: 2200 movs r2, #0 + 80252dc: 619a str r2, [r3, #24] hdma_lpuart1_tx.Init.Mode = DMA_NORMAL; - 802525a: 4b60 ldr r3, [pc, #384] ; (80253dc ) - 802525c: 2200 movs r2, #0 - 802525e: 61da str r2, [r3, #28] + 80252de: 4b60 ldr r3, [pc, #384] ; (8025460 ) + 80252e0: 2200 movs r2, #0 + 80252e2: 61da str r2, [r3, #28] hdma_lpuart1_tx.Init.Priority = DMA_PRIORITY_LOW; - 8025260: 4b5e ldr r3, [pc, #376] ; (80253dc ) - 8025262: 2200 movs r2, #0 - 8025264: 621a str r2, [r3, #32] + 80252e4: 4b5e ldr r3, [pc, #376] ; (8025460 ) + 80252e6: 2200 movs r2, #0 + 80252e8: 621a str r2, [r3, #32] if (HAL_DMA_Init(&hdma_lpuart1_tx) != HAL_OK) - 8025266: 485d ldr r0, [pc, #372] ; (80253dc ) - 8025268: f002 fc5c bl 8027b24 - 802526c: 4603 mov r3, r0 - 802526e: 2b00 cmp r3, #0 - 8025270: d001 beq.n 8025276 + 80252ea: 485d ldr r0, [pc, #372] ; (8025460 ) + 80252ec: f002 fc5c bl 8027ba8 + 80252f0: 4603 mov r3, r0 + 80252f2: 2b00 cmp r3, #0 + 80252f4: d001 beq.n 80252fa { Error_Handler(); - 8025272: f7ff f85b bl 802432c + 80252f6: f7ff f85b bl 80243b0 } __HAL_LINKDMA(uartHandle,hdmatx,hdma_lpuart1_tx); - 8025276: f507 7390 add.w r3, r7, #288 ; 0x120 - 802527a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802527e: 681b ldr r3, [r3, #0] - 8025280: 4a56 ldr r2, [pc, #344] ; (80253dc ) - 8025282: 679a str r2, [r3, #120] ; 0x78 - 8025284: 4a55 ldr r2, [pc, #340] ; (80253dc ) - 8025286: f507 7390 add.w r3, r7, #288 ; 0x120 - 802528a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802528e: 681b ldr r3, [r3, #0] - 8025290: 6393 str r3, [r2, #56] ; 0x38 + 80252fa: f507 7390 add.w r3, r7, #288 ; 0x120 + 80252fe: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025302: 681b ldr r3, [r3, #0] + 8025304: 4a56 ldr r2, [pc, #344] ; (8025460 ) + 8025306: 679a str r2, [r3, #120] ; 0x78 + 8025308: 4a55 ldr r2, [pc, #340] ; (8025460 ) + 802530a: f507 7390 add.w r3, r7, #288 ; 0x120 + 802530e: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025312: 681b ldr r3, [r3, #0] + 8025314: 6393 str r3, [r2, #56] ; 0x38 /* LPUART1 interrupt Init */ HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0); - 8025292: 2200 movs r2, #0 - 8025294: 2100 movs r1, #0 - 8025296: 208e movs r0, #142 ; 0x8e - 8025298: f002 fb93 bl 80279c2 + 8025316: 2200 movs r2, #0 + 8025318: 2100 movs r1, #0 + 802531a: 208e movs r0, #142 ; 0x8e + 802531c: f002 fb93 bl 8027a46 HAL_NVIC_EnableIRQ(LPUART1_IRQn); - 802529c: 208e movs r0, #142 ; 0x8e - 802529e: f002 fbaa bl 80279f6 + 8025320: 208e movs r0, #142 ; 0x8e + 8025322: f002 fbaa bl 8027a7a HAL_NVIC_EnableIRQ(USART6_IRQn); /* USER CODE BEGIN USART6_MspInit 1 */ /* USER CODE END USART6_MspInit 1 */ } } - 80252a2: f000 bc67 b.w 8025b74 + 8025326: f000 bc67 b.w 8025bf8 else if(uartHandle->Instance==UART4) - 80252a6: f507 7390 add.w r3, r7, #288 ; 0x120 - 80252aa: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80252ae: 681b ldr r3, [r3, #0] - 80252b0: 681b ldr r3, [r3, #0] - 80252b2: 4a4c ldr r2, [pc, #304] ; (80253e4 ) - 80252b4: 4293 cmp r3, r2 - 80252b6: f040 809b bne.w 80253f0 + 802532a: f507 7390 add.w r3, r7, #288 ; 0x120 + 802532e: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025332: 681b ldr r3, [r3, #0] + 8025334: 681b ldr r3, [r3, #0] + 8025336: 4a4c ldr r2, [pc, #304] ; (8025468 ) + 8025338: 4293 cmp r3, r2 + 802533a: f040 809b bne.w 8025474 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART4; - 80252ba: 2302 movs r3, #2 - 80252bc: 653b str r3, [r7, #80] ; 0x50 + 802533e: 2302 movs r3, #2 + 8025340: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 80252be: 2300 movs r3, #0 - 80252c0: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 8025342: 2300 movs r3, #0 + 8025344: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 80252c4: f107 0350 add.w r3, r7, #80 ; 0x50 - 80252c8: 4618 mov r0, r3 - 80252ca: f00a fd71 bl 802fdb0 - 80252ce: 4603 mov r3, r0 - 80252d0: 2b00 cmp r3, #0 - 80252d2: d001 beq.n 80252d8 + 8025348: f107 0350 add.w r3, r7, #80 ; 0x50 + 802534c: 4618 mov r0, r3 + 802534e: f00a fd71 bl 802fe34 + 8025352: 4603 mov r3, r0 + 8025354: 2b00 cmp r3, #0 + 8025356: d001 beq.n 802535c Error_Handler(); - 80252d4: f7ff f82a bl 802432c + 8025358: f7ff f82a bl 80243b0 __HAL_RCC_UART4_CLK_ENABLE(); - 80252d8: 4b3e ldr r3, [pc, #248] ; (80253d4 ) - 80252da: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 80252de: 4a3d ldr r2, [pc, #244] ; (80253d4 ) - 80252e0: f443 2300 orr.w r3, r3, #524288 ; 0x80000 - 80252e4: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 80252e8: 4b3a ldr r3, [pc, #232] ; (80253d4 ) - 80252ea: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 80252ee: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 80252f2: 647b str r3, [r7, #68] ; 0x44 - 80252f4: 6c7b ldr r3, [r7, #68] ; 0x44 + 802535c: 4b3e ldr r3, [pc, #248] ; (8025458 ) + 802535e: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025362: 4a3d ldr r2, [pc, #244] ; (8025458 ) + 8025364: f443 2300 orr.w r3, r3, #524288 ; 0x80000 + 8025368: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 802536c: 4b3a ldr r3, [pc, #232] ; (8025458 ) + 802536e: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025372: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 8025376: 647b str r3, [r7, #68] ; 0x44 + 8025378: 6c7b ldr r3, [r7, #68] ; 0x44 __HAL_RCC_GPIOA_CLK_ENABLE(); - 80252f6: 4b37 ldr r3, [pc, #220] ; (80253d4 ) - 80252f8: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80252fc: 4a35 ldr r2, [pc, #212] ; (80253d4 ) - 80252fe: f043 0301 orr.w r3, r3, #1 - 8025302: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8025306: 4b33 ldr r3, [pc, #204] ; (80253d4 ) - 8025308: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 802530c: f003 0301 and.w r3, r3, #1 - 8025310: 643b str r3, [r7, #64] ; 0x40 - 8025312: 6c3b ldr r3, [r7, #64] ; 0x40 + 802537a: 4b37 ldr r3, [pc, #220] ; (8025458 ) + 802537c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025380: 4a35 ldr r2, [pc, #212] ; (8025458 ) + 8025382: f043 0301 orr.w r3, r3, #1 + 8025386: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 802538a: 4b33 ldr r3, [pc, #204] ; (8025458 ) + 802538c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025390: f003 0301 and.w r3, r3, #1 + 8025394: 643b str r3, [r7, #64] ; 0x40 + 8025396: 6c3b ldr r3, [r7, #64] ; 0x40 GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; - 8025314: f44f 53c0 mov.w r3, #6144 ; 0x1800 - 8025318: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025398: f44f 53c0 mov.w r3, #6144 ; 0x1800 + 802539c: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 802531c: 2302 movs r3, #2 - 802531e: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 80253a0: 2302 movs r3, #2 + 80253a2: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8025322: 2300 movs r3, #0 - 8025324: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 80253a6: 2300 movs r3, #0 + 80253a8: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8025328: 2300 movs r3, #0 - 802532a: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 80253ac: 2300 movs r3, #0 + 80253ae: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF6_UART4; - 802532e: 2306 movs r3, #6 - 8025330: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 80253b2: 2306 movs r3, #6 + 80253b4: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8025334: f507 7386 add.w r3, r7, #268 ; 0x10c - 8025338: 4619 mov r1, r3 - 802533a: 4827 ldr r0, [pc, #156] ; (80253d8 ) - 802533c: f008 f896 bl 802d46c + 80253b8: f507 7386 add.w r3, r7, #268 ; 0x10c + 80253bc: 4619 mov r1, r3 + 80253be: 4827 ldr r0, [pc, #156] ; (802545c ) + 80253c0: f008 f896 bl 802d4f0 hdma_uart4_tx.Instance = DMA1_Stream0; - 8025340: 4b29 ldr r3, [pc, #164] ; (80253e8 ) - 8025342: 4a2a ldr r2, [pc, #168] ; (80253ec ) - 8025344: 601a str r2, [r3, #0] + 80253c4: 4b29 ldr r3, [pc, #164] ; (802546c ) + 80253c6: 4a2a ldr r2, [pc, #168] ; (8025470 ) + 80253c8: 601a str r2, [r3, #0] hdma_uart4_tx.Init.Request = DMA_REQUEST_UART4_TX; - 8025346: 4b28 ldr r3, [pc, #160] ; (80253e8 ) - 8025348: 2240 movs r2, #64 ; 0x40 - 802534a: 605a str r2, [r3, #4] + 80253ca: 4b28 ldr r3, [pc, #160] ; (802546c ) + 80253cc: 2240 movs r2, #64 ; 0x40 + 80253ce: 605a str r2, [r3, #4] hdma_uart4_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 802534c: 4b26 ldr r3, [pc, #152] ; (80253e8 ) - 802534e: 2240 movs r2, #64 ; 0x40 - 8025350: 609a str r2, [r3, #8] + 80253d0: 4b26 ldr r3, [pc, #152] ; (802546c ) + 80253d2: 2240 movs r2, #64 ; 0x40 + 80253d4: 609a str r2, [r3, #8] hdma_uart4_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8025352: 4b25 ldr r3, [pc, #148] ; (80253e8 ) - 8025354: 2200 movs r2, #0 - 8025356: 60da str r2, [r3, #12] + 80253d6: 4b25 ldr r3, [pc, #148] ; (802546c ) + 80253d8: 2200 movs r2, #0 + 80253da: 60da str r2, [r3, #12] hdma_uart4_tx.Init.MemInc = DMA_MINC_ENABLE; - 8025358: 4b23 ldr r3, [pc, #140] ; (80253e8 ) - 802535a: f44f 6280 mov.w r2, #1024 ; 0x400 - 802535e: 611a str r2, [r3, #16] + 80253dc: 4b23 ldr r3, [pc, #140] ; (802546c ) + 80253de: f44f 6280 mov.w r2, #1024 ; 0x400 + 80253e2: 611a str r2, [r3, #16] hdma_uart4_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8025360: 4b21 ldr r3, [pc, #132] ; (80253e8 ) - 8025362: 2200 movs r2, #0 - 8025364: 615a str r2, [r3, #20] + 80253e4: 4b21 ldr r3, [pc, #132] ; (802546c ) + 80253e6: 2200 movs r2, #0 + 80253e8: 615a str r2, [r3, #20] hdma_uart4_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8025366: 4b20 ldr r3, [pc, #128] ; (80253e8 ) - 8025368: 2200 movs r2, #0 - 802536a: 619a str r2, [r3, #24] + 80253ea: 4b20 ldr r3, [pc, #128] ; (802546c ) + 80253ec: 2200 movs r2, #0 + 80253ee: 619a str r2, [r3, #24] hdma_uart4_tx.Init.Mode = DMA_NORMAL; - 802536c: 4b1e ldr r3, [pc, #120] ; (80253e8 ) - 802536e: 2200 movs r2, #0 - 8025370: 61da str r2, [r3, #28] + 80253f0: 4b1e ldr r3, [pc, #120] ; (802546c ) + 80253f2: 2200 movs r2, #0 + 80253f4: 61da str r2, [r3, #28] hdma_uart4_tx.Init.Priority = DMA_PRIORITY_LOW; - 8025372: 4b1d ldr r3, [pc, #116] ; (80253e8 ) - 8025374: 2200 movs r2, #0 - 8025376: 621a str r2, [r3, #32] + 80253f6: 4b1d ldr r3, [pc, #116] ; (802546c ) + 80253f8: 2200 movs r2, #0 + 80253fa: 621a str r2, [r3, #32] hdma_uart4_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE; - 8025378: 4b1b ldr r3, [pc, #108] ; (80253e8 ) - 802537a: 2204 movs r2, #4 - 802537c: 625a str r2, [r3, #36] ; 0x24 + 80253fc: 4b1b ldr r3, [pc, #108] ; (802546c ) + 80253fe: 2204 movs r2, #4 + 8025400: 625a str r2, [r3, #36] ; 0x24 hdma_uart4_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; - 802537e: 4b1a ldr r3, [pc, #104] ; (80253e8 ) - 8025380: 2203 movs r2, #3 - 8025382: 629a str r2, [r3, #40] ; 0x28 + 8025402: 4b1a ldr r3, [pc, #104] ; (802546c ) + 8025404: 2203 movs r2, #3 + 8025406: 629a str r2, [r3, #40] ; 0x28 hdma_uart4_tx.Init.MemBurst = DMA_MBURST_SINGLE; - 8025384: 4b18 ldr r3, [pc, #96] ; (80253e8 ) - 8025386: 2200 movs r2, #0 - 8025388: 62da str r2, [r3, #44] ; 0x2c + 8025408: 4b18 ldr r3, [pc, #96] ; (802546c ) + 802540a: 2200 movs r2, #0 + 802540c: 62da str r2, [r3, #44] ; 0x2c hdma_uart4_tx.Init.PeriphBurst = DMA_PBURST_SINGLE; - 802538a: 4b17 ldr r3, [pc, #92] ; (80253e8 ) - 802538c: 2200 movs r2, #0 - 802538e: 631a str r2, [r3, #48] ; 0x30 + 802540e: 4b17 ldr r3, [pc, #92] ; (802546c ) + 8025410: 2200 movs r2, #0 + 8025412: 631a str r2, [r3, #48] ; 0x30 if (HAL_DMA_Init(&hdma_uart4_tx) != HAL_OK) - 8025390: 4815 ldr r0, [pc, #84] ; (80253e8 ) - 8025392: f002 fbc7 bl 8027b24 - 8025396: 4603 mov r3, r0 - 8025398: 2b00 cmp r3, #0 - 802539a: d001 beq.n 80253a0 + 8025414: 4815 ldr r0, [pc, #84] ; (802546c ) + 8025416: f002 fbc7 bl 8027ba8 + 802541a: 4603 mov r3, r0 + 802541c: 2b00 cmp r3, #0 + 802541e: d001 beq.n 8025424 Error_Handler(); - 802539c: f7fe ffc6 bl 802432c + 8025420: f7fe ffc6 bl 80243b0 __HAL_LINKDMA(uartHandle,hdmatx,hdma_uart4_tx); - 80253a0: f507 7390 add.w r3, r7, #288 ; 0x120 - 80253a4: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80253a8: 681b ldr r3, [r3, #0] - 80253aa: 4a0f ldr r2, [pc, #60] ; (80253e8 ) - 80253ac: 679a str r2, [r3, #120] ; 0x78 - 80253ae: 4a0e ldr r2, [pc, #56] ; (80253e8 ) - 80253b0: f507 7390 add.w r3, r7, #288 ; 0x120 - 80253b4: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80253b8: 681b ldr r3, [r3, #0] - 80253ba: 6393 str r3, [r2, #56] ; 0x38 + 8025424: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025428: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802542c: 681b ldr r3, [r3, #0] + 802542e: 4a0f ldr r2, [pc, #60] ; (802546c ) + 8025430: 679a str r2, [r3, #120] ; 0x78 + 8025432: 4a0e ldr r2, [pc, #56] ; (802546c ) + 8025434: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025438: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802543c: 681b ldr r3, [r3, #0] + 802543e: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(UART4_IRQn, 0, 0); - 80253bc: 2200 movs r2, #0 - 80253be: 2100 movs r1, #0 - 80253c0: 2034 movs r0, #52 ; 0x34 - 80253c2: f002 fafe bl 80279c2 + 8025440: 2200 movs r2, #0 + 8025442: 2100 movs r1, #0 + 8025444: 2034 movs r0, #52 ; 0x34 + 8025446: f002 fafe bl 8027a46 HAL_NVIC_EnableIRQ(UART4_IRQn); - 80253c6: 2034 movs r0, #52 ; 0x34 - 80253c8: f002 fb15 bl 80279f6 -} - 80253cc: e3d2 b.n 8025b74 - 80253ce: bf00 nop - 80253d0: 58000c00 .word 0x58000c00 - 80253d4: 58024400 .word 0x58024400 - 80253d8: 58020000 .word 0x58020000 - 80253dc: 2400b494 .word 0x2400b494 - 80253e0: 58025408 .word 0x58025408 - 80253e4: 40004c00 .word 0x40004c00 - 80253e8: 2400b50c .word 0x2400b50c - 80253ec: 40020010 .word 0x40020010 + 802544a: 2034 movs r0, #52 ; 0x34 + 802544c: f002 fb15 bl 8027a7a +} + 8025450: e3d2 b.n 8025bf8 + 8025452: bf00 nop + 8025454: 58000c00 .word 0x58000c00 + 8025458: 58024400 .word 0x58024400 + 802545c: 58020000 .word 0x58020000 + 8025460: 2400b49c .word 0x2400b49c + 8025464: 58025408 .word 0x58025408 + 8025468: 40004c00 .word 0x40004c00 + 802546c: 2400b514 .word 0x2400b514 + 8025470: 40020010 .word 0x40020010 else if(uartHandle->Instance==UART5) - 80253f0: f507 7390 add.w r3, r7, #288 ; 0x120 - 80253f4: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80253f8: 681b ldr r3, [r3, #0] - 80253fa: 681b ldr r3, [r3, #0] - 80253fc: 4a99 ldr r2, [pc, #612] ; (8025664 ) - 80253fe: 4293 cmp r3, r2 - 8025400: f040 80a5 bne.w 802554e + 8025474: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025478: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 802547c: 681b ldr r3, [r3, #0] + 802547e: 681b ldr r3, [r3, #0] + 8025480: 4a99 ldr r2, [pc, #612] ; (80256e8 ) + 8025482: 4293 cmp r3, r2 + 8025484: f040 80a5 bne.w 80255d2 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART5; - 8025404: 2302 movs r3, #2 - 8025406: 653b str r3, [r7, #80] ; 0x50 + 8025488: 2302 movs r3, #2 + 802548a: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 8025408: 2300 movs r3, #0 - 802540a: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 802548c: 2300 movs r3, #0 + 802548e: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 802540e: f107 0350 add.w r3, r7, #80 ; 0x50 - 8025412: 4618 mov r0, r3 - 8025414: f00a fccc bl 802fdb0 - 8025418: 4603 mov r3, r0 - 802541a: 2b00 cmp r3, #0 - 802541c: d001 beq.n 8025422 + 8025492: f107 0350 add.w r3, r7, #80 ; 0x50 + 8025496: 4618 mov r0, r3 + 8025498: f00a fccc bl 802fe34 + 802549c: 4603 mov r3, r0 + 802549e: 2b00 cmp r3, #0 + 80254a0: d001 beq.n 80254a6 Error_Handler(); - 802541e: f7fe ff85 bl 802432c + 80254a2: f7fe ff85 bl 80243b0 __HAL_RCC_UART5_CLK_ENABLE(); - 8025422: 4b91 ldr r3, [pc, #580] ; (8025668 ) - 8025424: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025428: 4a8f ldr r2, [pc, #572] ; (8025668 ) - 802542a: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 - 802542e: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 8025432: 4b8d ldr r3, [pc, #564] ; (8025668 ) - 8025434: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025438: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 802543c: 63fb str r3, [r7, #60] ; 0x3c - 802543e: 6bfb ldr r3, [r7, #60] ; 0x3c + 80254a6: 4b91 ldr r3, [pc, #580] ; (80256ec ) + 80254a8: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 80254ac: 4a8f ldr r2, [pc, #572] ; (80256ec ) + 80254ae: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 + 80254b2: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 80254b6: 4b8d ldr r3, [pc, #564] ; (80256ec ) + 80254b8: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 80254bc: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 80254c0: 63fb str r3, [r7, #60] ; 0x3c + 80254c2: 6bfb ldr r3, [r7, #60] ; 0x3c __HAL_RCC_GPIOC_CLK_ENABLE(); - 8025440: 4b89 ldr r3, [pc, #548] ; (8025668 ) - 8025442: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025446: 4a88 ldr r2, [pc, #544] ; (8025668 ) - 8025448: f043 0304 orr.w r3, r3, #4 - 802544c: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8025450: 4b85 ldr r3, [pc, #532] ; (8025668 ) - 8025452: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025456: f003 0304 and.w r3, r3, #4 - 802545a: 63bb str r3, [r7, #56] ; 0x38 - 802545c: 6bbb ldr r3, [r7, #56] ; 0x38 + 80254c4: 4b89 ldr r3, [pc, #548] ; (80256ec ) + 80254c6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80254ca: 4a88 ldr r2, [pc, #544] ; (80256ec ) + 80254cc: f043 0304 orr.w r3, r3, #4 + 80254d0: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 80254d4: 4b85 ldr r3, [pc, #532] ; (80256ec ) + 80254d6: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80254da: f003 0304 and.w r3, r3, #4 + 80254de: 63bb str r3, [r7, #56] ; 0x38 + 80254e0: 6bbb ldr r3, [r7, #56] ; 0x38 __HAL_RCC_GPIOD_CLK_ENABLE(); - 802545e: 4b82 ldr r3, [pc, #520] ; (8025668 ) - 8025460: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025464: 4a80 ldr r2, [pc, #512] ; (8025668 ) - 8025466: f043 0308 orr.w r3, r3, #8 - 802546a: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 802546e: 4b7e ldr r3, [pc, #504] ; (8025668 ) - 8025470: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025474: f003 0308 and.w r3, r3, #8 - 8025478: 637b str r3, [r7, #52] ; 0x34 - 802547a: 6b7b ldr r3, [r7, #52] ; 0x34 + 80254e2: 4b82 ldr r3, [pc, #520] ; (80256ec ) + 80254e4: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80254e8: 4a80 ldr r2, [pc, #512] ; (80256ec ) + 80254ea: f043 0308 orr.w r3, r3, #8 + 80254ee: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 80254f2: 4b7e ldr r3, [pc, #504] ; (80256ec ) + 80254f4: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80254f8: f003 0308 and.w r3, r3, #8 + 80254fc: 637b str r3, [r7, #52] ; 0x34 + 80254fe: 6b7b ldr r3, [r7, #52] ; 0x34 GPIO_InitStruct.Pin = GPIO_PIN_12; - 802547c: f44f 5380 mov.w r3, #4096 ; 0x1000 - 8025480: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025500: f44f 5380 mov.w r3, #4096 ; 0x1000 + 8025504: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8025484: 2302 movs r3, #2 - 8025486: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025508: 2302 movs r3, #2 + 802550a: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 802548a: 2300 movs r3, #0 - 802548c: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 802550e: 2300 movs r3, #0 + 8025510: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8025490: 2300 movs r3, #0 - 8025492: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025514: 2300 movs r3, #0 + 8025516: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; - 8025496: 2308 movs r3, #8 - 8025498: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 802551a: 2308 movs r3, #8 + 802551c: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 802549c: f507 7386 add.w r3, r7, #268 ; 0x10c - 80254a0: 4619 mov r1, r3 - 80254a2: 4872 ldr r0, [pc, #456] ; (802566c ) - 80254a4: f007 ffe2 bl 802d46c + 8025520: f507 7386 add.w r3, r7, #268 ; 0x10c + 8025524: 4619 mov r1, r3 + 8025526: 4872 ldr r0, [pc, #456] ; (80256f0 ) + 8025528: f007 ffe2 bl 802d4f0 GPIO_InitStruct.Pin = GPIO_PIN_2; - 80254a8: 2304 movs r3, #4 - 80254aa: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 802552c: 2304 movs r3, #4 + 802552e: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80254ae: 2302 movs r3, #2 - 80254b0: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025532: 2302 movs r3, #2 + 8025534: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 80254b4: 2300 movs r3, #0 - 80254b6: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 8025538: 2300 movs r3, #0 + 802553a: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80254ba: 2300 movs r3, #0 - 80254bc: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 802553e: 2300 movs r3, #0 + 8025540: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; - 80254c0: 2308 movs r3, #8 - 80254c2: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 8025544: 2308 movs r3, #8 + 8025546: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 80254c6: f507 7386 add.w r3, r7, #268 ; 0x10c - 80254ca: 4619 mov r1, r3 - 80254cc: 4868 ldr r0, [pc, #416] ; (8025670 ) - 80254ce: f007 ffcd bl 802d46c + 802554a: f507 7386 add.w r3, r7, #268 ; 0x10c + 802554e: 4619 mov r1, r3 + 8025550: 4868 ldr r0, [pc, #416] ; (80256f4 ) + 8025552: f007 ffcd bl 802d4f0 hdma_uart5_tx.Instance = DMA1_Stream1; - 80254d2: 4b68 ldr r3, [pc, #416] ; (8025674 ) - 80254d4: 4a68 ldr r2, [pc, #416] ; (8025678 ) - 80254d6: 601a str r2, [r3, #0] + 8025556: 4b68 ldr r3, [pc, #416] ; (80256f8 ) + 8025558: 4a68 ldr r2, [pc, #416] ; (80256fc ) + 802555a: 601a str r2, [r3, #0] hdma_uart5_tx.Init.Request = DMA_REQUEST_UART5_TX; - 80254d8: 4b66 ldr r3, [pc, #408] ; (8025674 ) - 80254da: 2242 movs r2, #66 ; 0x42 - 80254dc: 605a str r2, [r3, #4] + 802555c: 4b66 ldr r3, [pc, #408] ; (80256f8 ) + 802555e: 2242 movs r2, #66 ; 0x42 + 8025560: 605a str r2, [r3, #4] hdma_uart5_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 80254de: 4b65 ldr r3, [pc, #404] ; (8025674 ) - 80254e0: 2240 movs r2, #64 ; 0x40 - 80254e2: 609a str r2, [r3, #8] + 8025562: 4b65 ldr r3, [pc, #404] ; (80256f8 ) + 8025564: 2240 movs r2, #64 ; 0x40 + 8025566: 609a str r2, [r3, #8] hdma_uart5_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 80254e4: 4b63 ldr r3, [pc, #396] ; (8025674 ) - 80254e6: 2200 movs r2, #0 - 80254e8: 60da str r2, [r3, #12] + 8025568: 4b63 ldr r3, [pc, #396] ; (80256f8 ) + 802556a: 2200 movs r2, #0 + 802556c: 60da str r2, [r3, #12] hdma_uart5_tx.Init.MemInc = DMA_MINC_ENABLE; - 80254ea: 4b62 ldr r3, [pc, #392] ; (8025674 ) - 80254ec: f44f 6280 mov.w r2, #1024 ; 0x400 - 80254f0: 611a str r2, [r3, #16] + 802556e: 4b62 ldr r3, [pc, #392] ; (80256f8 ) + 8025570: f44f 6280 mov.w r2, #1024 ; 0x400 + 8025574: 611a str r2, [r3, #16] hdma_uart5_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 80254f2: 4b60 ldr r3, [pc, #384] ; (8025674 ) - 80254f4: 2200 movs r2, #0 - 80254f6: 615a str r2, [r3, #20] + 8025576: 4b60 ldr r3, [pc, #384] ; (80256f8 ) + 8025578: 2200 movs r2, #0 + 802557a: 615a str r2, [r3, #20] hdma_uart5_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 80254f8: 4b5e ldr r3, [pc, #376] ; (8025674 ) - 80254fa: 2200 movs r2, #0 - 80254fc: 619a str r2, [r3, #24] + 802557c: 4b5e ldr r3, [pc, #376] ; (80256f8 ) + 802557e: 2200 movs r2, #0 + 8025580: 619a str r2, [r3, #24] hdma_uart5_tx.Init.Mode = DMA_NORMAL; - 80254fe: 4b5d ldr r3, [pc, #372] ; (8025674 ) - 8025500: 2200 movs r2, #0 - 8025502: 61da str r2, [r3, #28] + 8025582: 4b5d ldr r3, [pc, #372] ; (80256f8 ) + 8025584: 2200 movs r2, #0 + 8025586: 61da str r2, [r3, #28] hdma_uart5_tx.Init.Priority = DMA_PRIORITY_LOW; - 8025504: 4b5b ldr r3, [pc, #364] ; (8025674 ) - 8025506: 2200 movs r2, #0 - 8025508: 621a str r2, [r3, #32] + 8025588: 4b5b ldr r3, [pc, #364] ; (80256f8 ) + 802558a: 2200 movs r2, #0 + 802558c: 621a str r2, [r3, #32] hdma_uart5_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 802550a: 4b5a ldr r3, [pc, #360] ; (8025674 ) - 802550c: 2200 movs r2, #0 - 802550e: 625a str r2, [r3, #36] ; 0x24 + 802558e: 4b5a ldr r3, [pc, #360] ; (80256f8 ) + 8025590: 2200 movs r2, #0 + 8025592: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_uart5_tx) != HAL_OK) - 8025510: 4858 ldr r0, [pc, #352] ; (8025674 ) - 8025512: f002 fb07 bl 8027b24 - 8025516: 4603 mov r3, r0 - 8025518: 2b00 cmp r3, #0 - 802551a: d001 beq.n 8025520 + 8025594: 4858 ldr r0, [pc, #352] ; (80256f8 ) + 8025596: f002 fb07 bl 8027ba8 + 802559a: 4603 mov r3, r0 + 802559c: 2b00 cmp r3, #0 + 802559e: d001 beq.n 80255a4 Error_Handler(); - 802551c: f7fe ff06 bl 802432c + 80255a0: f7fe ff06 bl 80243b0 __HAL_LINKDMA(uartHandle,hdmatx,hdma_uart5_tx); - 8025520: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025524: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025528: 681b ldr r3, [r3, #0] - 802552a: 4a52 ldr r2, [pc, #328] ; (8025674 ) - 802552c: 679a str r2, [r3, #120] ; 0x78 - 802552e: 4a51 ldr r2, [pc, #324] ; (8025674 ) - 8025530: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025534: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025538: 681b ldr r3, [r3, #0] - 802553a: 6393 str r3, [r2, #56] ; 0x38 + 80255a4: f507 7390 add.w r3, r7, #288 ; 0x120 + 80255a8: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80255ac: 681b ldr r3, [r3, #0] + 80255ae: 4a52 ldr r2, [pc, #328] ; (80256f8 ) + 80255b0: 679a str r2, [r3, #120] ; 0x78 + 80255b2: 4a51 ldr r2, [pc, #324] ; (80256f8 ) + 80255b4: f507 7390 add.w r3, r7, #288 ; 0x120 + 80255b8: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80255bc: 681b ldr r3, [r3, #0] + 80255be: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(UART5_IRQn, 0, 0); - 802553c: 2200 movs r2, #0 - 802553e: 2100 movs r1, #0 - 8025540: 2035 movs r0, #53 ; 0x35 - 8025542: f002 fa3e bl 80279c2 + 80255c0: 2200 movs r2, #0 + 80255c2: 2100 movs r1, #0 + 80255c4: 2035 movs r0, #53 ; 0x35 + 80255c6: f002 fa3e bl 8027a46 HAL_NVIC_EnableIRQ(UART5_IRQn); - 8025546: 2035 movs r0, #53 ; 0x35 - 8025548: f002 fa55 bl 80279f6 + 80255ca: 2035 movs r0, #53 ; 0x35 + 80255cc: f002 fa55 bl 8027a7a } - 802554c: e312 b.n 8025b74 + 80255d0: e312 b.n 8025bf8 else if(uartHandle->Instance==UART7) - 802554e: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025552: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025556: 681b ldr r3, [r3, #0] - 8025558: 681b ldr r3, [r3, #0] - 802555a: 4a48 ldr r2, [pc, #288] ; (802567c ) - 802555c: 4293 cmp r3, r2 - 802555e: f040 8095 bne.w 802568c + 80255d2: f507 7390 add.w r3, r7, #288 ; 0x120 + 80255d6: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80255da: 681b ldr r3, [r3, #0] + 80255dc: 681b ldr r3, [r3, #0] + 80255de: 4a48 ldr r2, [pc, #288] ; (8025700 ) + 80255e0: 4293 cmp r3, r2 + 80255e2: f040 8095 bne.w 8025710 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART7; - 8025562: 2302 movs r3, #2 - 8025564: 653b str r3, [r7, #80] ; 0x50 + 80255e6: 2302 movs r3, #2 + 80255e8: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 8025566: 2300 movs r3, #0 - 8025568: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 80255ea: 2300 movs r3, #0 + 80255ec: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 802556c: f107 0350 add.w r3, r7, #80 ; 0x50 - 8025570: 4618 mov r0, r3 - 8025572: f00a fc1d bl 802fdb0 - 8025576: 4603 mov r3, r0 - 8025578: 2b00 cmp r3, #0 - 802557a: d001 beq.n 8025580 + 80255f0: f107 0350 add.w r3, r7, #80 ; 0x50 + 80255f4: 4618 mov r0, r3 + 80255f6: f00a fc1d bl 802fe34 + 80255fa: 4603 mov r3, r0 + 80255fc: 2b00 cmp r3, #0 + 80255fe: d001 beq.n 8025604 Error_Handler(); - 802557c: f7fe fed6 bl 802432c + 8025600: f7fe fed6 bl 80243b0 __HAL_RCC_UART7_CLK_ENABLE(); - 8025580: 4b39 ldr r3, [pc, #228] ; (8025668 ) - 8025582: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025586: 4a38 ldr r2, [pc, #224] ; (8025668 ) - 8025588: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 - 802558c: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 8025590: 4b35 ldr r3, [pc, #212] ; (8025668 ) - 8025592: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025596: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 - 802559a: 633b str r3, [r7, #48] ; 0x30 - 802559c: 6b3b ldr r3, [r7, #48] ; 0x30 + 8025604: 4b39 ldr r3, [pc, #228] ; (80256ec ) + 8025606: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 802560a: 4a38 ldr r2, [pc, #224] ; (80256ec ) + 802560c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 + 8025610: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 8025614: 4b35 ldr r3, [pc, #212] ; (80256ec ) + 8025616: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 802561a: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 + 802561e: 633b str r3, [r7, #48] ; 0x30 + 8025620: 6b3b ldr r3, [r7, #48] ; 0x30 __HAL_RCC_GPIOA_CLK_ENABLE(); - 802559e: 4b32 ldr r3, [pc, #200] ; (8025668 ) - 80255a0: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80255a4: 4a30 ldr r2, [pc, #192] ; (8025668 ) - 80255a6: f043 0301 orr.w r3, r3, #1 - 80255aa: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 80255ae: 4b2e ldr r3, [pc, #184] ; (8025668 ) - 80255b0: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80255b4: f003 0301 and.w r3, r3, #1 - 80255b8: 62fb str r3, [r7, #44] ; 0x2c - 80255ba: 6afb ldr r3, [r7, #44] ; 0x2c + 8025622: 4b32 ldr r3, [pc, #200] ; (80256ec ) + 8025624: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025628: 4a30 ldr r2, [pc, #192] ; (80256ec ) + 802562a: f043 0301 orr.w r3, r3, #1 + 802562e: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8025632: 4b2e ldr r3, [pc, #184] ; (80256ec ) + 8025634: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025638: f003 0301 and.w r3, r3, #1 + 802563c: 62fb str r3, [r7, #44] ; 0x2c + 802563e: 6afb ldr r3, [r7, #44] ; 0x2c GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_15; - 80255bc: f44f 4301 mov.w r3, #33024 ; 0x8100 - 80255c0: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025640: f44f 4301 mov.w r3, #33024 ; 0x8100 + 8025644: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80255c4: 2302 movs r3, #2 - 80255c6: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025648: 2302 movs r3, #2 + 802564a: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 80255ca: 2300 movs r3, #0 - 80255cc: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 802564e: 2300 movs r3, #0 + 8025650: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80255d0: 2300 movs r3, #0 - 80255d2: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025654: 2300 movs r3, #0 + 8025656: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF11_UART7; - 80255d6: 230b movs r3, #11 - 80255d8: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 802565a: 230b movs r3, #11 + 802565c: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80255dc: f507 7386 add.w r3, r7, #268 ; 0x10c - 80255e0: 4619 mov r1, r3 - 80255e2: 4827 ldr r0, [pc, #156] ; (8025680 ) - 80255e4: f007 ff42 bl 802d46c + 8025660: f507 7386 add.w r3, r7, #268 ; 0x10c + 8025664: 4619 mov r1, r3 + 8025666: 4827 ldr r0, [pc, #156] ; (8025704 ) + 8025668: f007 ff42 bl 802d4f0 hdma_uart7_tx.Instance = DMA1_Stream3; - 80255e8: 4b26 ldr r3, [pc, #152] ; (8025684 ) - 80255ea: 4a27 ldr r2, [pc, #156] ; (8025688 ) - 80255ec: 601a str r2, [r3, #0] + 802566c: 4b26 ldr r3, [pc, #152] ; (8025708 ) + 802566e: 4a27 ldr r2, [pc, #156] ; (802570c ) + 8025670: 601a str r2, [r3, #0] hdma_uart7_tx.Init.Request = DMA_REQUEST_UART7_TX; - 80255ee: 4b25 ldr r3, [pc, #148] ; (8025684 ) - 80255f0: 2250 movs r2, #80 ; 0x50 - 80255f2: 605a str r2, [r3, #4] + 8025672: 4b25 ldr r3, [pc, #148] ; (8025708 ) + 8025674: 2250 movs r2, #80 ; 0x50 + 8025676: 605a str r2, [r3, #4] hdma_uart7_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 80255f4: 4b23 ldr r3, [pc, #140] ; (8025684 ) - 80255f6: 2240 movs r2, #64 ; 0x40 - 80255f8: 609a str r2, [r3, #8] + 8025678: 4b23 ldr r3, [pc, #140] ; (8025708 ) + 802567a: 2240 movs r2, #64 ; 0x40 + 802567c: 609a str r2, [r3, #8] hdma_uart7_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 80255fa: 4b22 ldr r3, [pc, #136] ; (8025684 ) - 80255fc: 2200 movs r2, #0 - 80255fe: 60da str r2, [r3, #12] + 802567e: 4b22 ldr r3, [pc, #136] ; (8025708 ) + 8025680: 2200 movs r2, #0 + 8025682: 60da str r2, [r3, #12] hdma_uart7_tx.Init.MemInc = DMA_MINC_ENABLE; - 8025600: 4b20 ldr r3, [pc, #128] ; (8025684 ) - 8025602: f44f 6280 mov.w r2, #1024 ; 0x400 - 8025606: 611a str r2, [r3, #16] + 8025684: 4b20 ldr r3, [pc, #128] ; (8025708 ) + 8025686: f44f 6280 mov.w r2, #1024 ; 0x400 + 802568a: 611a str r2, [r3, #16] hdma_uart7_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8025608: 4b1e ldr r3, [pc, #120] ; (8025684 ) - 802560a: 2200 movs r2, #0 - 802560c: 615a str r2, [r3, #20] + 802568c: 4b1e ldr r3, [pc, #120] ; (8025708 ) + 802568e: 2200 movs r2, #0 + 8025690: 615a str r2, [r3, #20] hdma_uart7_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 802560e: 4b1d ldr r3, [pc, #116] ; (8025684 ) - 8025610: 2200 movs r2, #0 - 8025612: 619a str r2, [r3, #24] + 8025692: 4b1d ldr r3, [pc, #116] ; (8025708 ) + 8025694: 2200 movs r2, #0 + 8025696: 619a str r2, [r3, #24] hdma_uart7_tx.Init.Mode = DMA_NORMAL; - 8025614: 4b1b ldr r3, [pc, #108] ; (8025684 ) - 8025616: 2200 movs r2, #0 - 8025618: 61da str r2, [r3, #28] + 8025698: 4b1b ldr r3, [pc, #108] ; (8025708 ) + 802569a: 2200 movs r2, #0 + 802569c: 61da str r2, [r3, #28] hdma_uart7_tx.Init.Priority = DMA_PRIORITY_LOW; - 802561a: 4b1a ldr r3, [pc, #104] ; (8025684 ) - 802561c: 2200 movs r2, #0 - 802561e: 621a str r2, [r3, #32] + 802569e: 4b1a ldr r3, [pc, #104] ; (8025708 ) + 80256a0: 2200 movs r2, #0 + 80256a2: 621a str r2, [r3, #32] hdma_uart7_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 8025620: 4b18 ldr r3, [pc, #96] ; (8025684 ) - 8025622: 2200 movs r2, #0 - 8025624: 625a str r2, [r3, #36] ; 0x24 + 80256a4: 4b18 ldr r3, [pc, #96] ; (8025708 ) + 80256a6: 2200 movs r2, #0 + 80256a8: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_uart7_tx) != HAL_OK) - 8025626: 4817 ldr r0, [pc, #92] ; (8025684 ) - 8025628: f002 fa7c bl 8027b24 - 802562c: 4603 mov r3, r0 - 802562e: 2b00 cmp r3, #0 - 8025630: d001 beq.n 8025636 + 80256aa: 4817 ldr r0, [pc, #92] ; (8025708 ) + 80256ac: f002 fa7c bl 8027ba8 + 80256b0: 4603 mov r3, r0 + 80256b2: 2b00 cmp r3, #0 + 80256b4: d001 beq.n 80256ba Error_Handler(); - 8025632: f7fe fe7b bl 802432c + 80256b6: f7fe fe7b bl 80243b0 __HAL_LINKDMA(uartHandle,hdmatx,hdma_uart7_tx); - 8025636: f507 7390 add.w r3, r7, #288 ; 0x120 - 802563a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802563e: 681b ldr r3, [r3, #0] - 8025640: 4a10 ldr r2, [pc, #64] ; (8025684 ) - 8025642: 679a str r2, [r3, #120] ; 0x78 - 8025644: 4a0f ldr r2, [pc, #60] ; (8025684 ) - 8025646: f507 7390 add.w r3, r7, #288 ; 0x120 - 802564a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802564e: 681b ldr r3, [r3, #0] - 8025650: 6393 str r3, [r2, #56] ; 0x38 + 80256ba: f507 7390 add.w r3, r7, #288 ; 0x120 + 80256be: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80256c2: 681b ldr r3, [r3, #0] + 80256c4: 4a10 ldr r2, [pc, #64] ; (8025708 ) + 80256c6: 679a str r2, [r3, #120] ; 0x78 + 80256c8: 4a0f ldr r2, [pc, #60] ; (8025708 ) + 80256ca: f507 7390 add.w r3, r7, #288 ; 0x120 + 80256ce: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 80256d2: 681b ldr r3, [r3, #0] + 80256d4: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(UART7_IRQn, 0, 0); - 8025652: 2200 movs r2, #0 - 8025654: 2100 movs r1, #0 - 8025656: 2052 movs r0, #82 ; 0x52 - 8025658: f002 f9b3 bl 80279c2 + 80256d6: 2200 movs r2, #0 + 80256d8: 2100 movs r1, #0 + 80256da: 2052 movs r0, #82 ; 0x52 + 80256dc: f002 f9b3 bl 8027a46 HAL_NVIC_EnableIRQ(UART7_IRQn); - 802565c: 2052 movs r0, #82 ; 0x52 - 802565e: f002 f9ca bl 80279f6 -} - 8025662: e287 b.n 8025b74 - 8025664: 40005000 .word 0x40005000 - 8025668: 58024400 .word 0x58024400 - 802566c: 58020800 .word 0x58020800 - 8025670: 58020c00 .word 0x58020c00 - 8025674: 2400b584 .word 0x2400b584 - 8025678: 40020028 .word 0x40020028 - 802567c: 40007800 .word 0x40007800 - 8025680: 58020000 .word 0x58020000 - 8025684: 2400b5fc .word 0x2400b5fc - 8025688: 40020058 .word 0x40020058 + 80256e0: 2052 movs r0, #82 ; 0x52 + 80256e2: f002 f9ca bl 8027a7a +} + 80256e6: e287 b.n 8025bf8 + 80256e8: 40005000 .word 0x40005000 + 80256ec: 58024400 .word 0x58024400 + 80256f0: 58020800 .word 0x58020800 + 80256f4: 58020c00 .word 0x58020c00 + 80256f8: 2400b58c .word 0x2400b58c + 80256fc: 40020028 .word 0x40020028 + 8025700: 40007800 .word 0x40007800 + 8025704: 58020000 .word 0x58020000 + 8025708: 2400b604 .word 0x2400b604 + 802570c: 40020058 .word 0x40020058 else if(uartHandle->Instance==USART1) - 802568c: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025690: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025694: 681b ldr r3, [r3, #0] - 8025696: 681b ldr r3, [r3, #0] - 8025698: 4a93 ldr r2, [pc, #588] ; (80258e8 ) - 802569a: 4293 cmp r3, r2 - 802569c: f040 808a bne.w 80257b4 + 8025710: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025714: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025718: 681b ldr r3, [r3, #0] + 802571a: 681b ldr r3, [r3, #0] + 802571c: 4a93 ldr r2, [pc, #588] ; (802596c ) + 802571e: 4293 cmp r3, r2 + 8025720: f040 808a bne.w 8025838 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; - 80256a0: 2301 movs r3, #1 - 80256a2: 653b str r3, [r7, #80] ; 0x50 + 8025724: 2301 movs r3, #1 + 8025726: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; - 80256a4: 2300 movs r3, #0 - 80256a6: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 + 8025728: 2300 movs r3, #0 + 802572a: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 80256aa: f107 0350 add.w r3, r7, #80 ; 0x50 - 80256ae: 4618 mov r0, r3 - 80256b0: f00a fb7e bl 802fdb0 - 80256b4: 4603 mov r3, r0 - 80256b6: 2b00 cmp r3, #0 - 80256b8: d001 beq.n 80256be + 802572e: f107 0350 add.w r3, r7, #80 ; 0x50 + 8025732: 4618 mov r0, r3 + 8025734: f00a fb7e bl 802fe34 + 8025738: 4603 mov r3, r0 + 802573a: 2b00 cmp r3, #0 + 802573c: d001 beq.n 8025742 Error_Handler(); - 80256ba: f7fe fe37 bl 802432c + 802573e: f7fe fe37 bl 80243b0 __HAL_RCC_USART1_CLK_ENABLE(); - 80256be: 4b8b ldr r3, [pc, #556] ; (80258ec ) - 80256c0: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 80256c4: 4a89 ldr r2, [pc, #548] ; (80258ec ) - 80256c6: f043 0310 orr.w r3, r3, #16 - 80256ca: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 - 80256ce: 4b87 ldr r3, [pc, #540] ; (80258ec ) - 80256d0: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 80256d4: f003 0310 and.w r3, r3, #16 - 80256d8: 62bb str r3, [r7, #40] ; 0x28 - 80256da: 6abb ldr r3, [r7, #40] ; 0x28 + 8025742: 4b8b ldr r3, [pc, #556] ; (8025970 ) + 8025744: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8025748: 4a89 ldr r2, [pc, #548] ; (8025970 ) + 802574a: f043 0310 orr.w r3, r3, #16 + 802574e: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 8025752: 4b87 ldr r3, [pc, #540] ; (8025970 ) + 8025754: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8025758: f003 0310 and.w r3, r3, #16 + 802575c: 62bb str r3, [r7, #40] ; 0x28 + 802575e: 6abb ldr r3, [r7, #40] ; 0x28 __HAL_RCC_GPIOB_CLK_ENABLE(); - 80256dc: 4b83 ldr r3, [pc, #524] ; (80258ec ) - 80256de: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80256e2: 4a82 ldr r2, [pc, #520] ; (80258ec ) - 80256e4: f043 0302 orr.w r3, r3, #2 - 80256e8: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 80256ec: 4b7f ldr r3, [pc, #508] ; (80258ec ) - 80256ee: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 80256f2: f003 0302 and.w r3, r3, #2 - 80256f6: 627b str r3, [r7, #36] ; 0x24 - 80256f8: 6a7b ldr r3, [r7, #36] ; 0x24 + 8025760: 4b83 ldr r3, [pc, #524] ; (8025970 ) + 8025762: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025766: 4a82 ldr r2, [pc, #520] ; (8025970 ) + 8025768: f043 0302 orr.w r3, r3, #2 + 802576c: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8025770: 4b7f ldr r3, [pc, #508] ; (8025970 ) + 8025772: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025776: f003 0302 and.w r3, r3, #2 + 802577a: 627b str r3, [r7, #36] ; 0x24 + 802577c: 6a7b ldr r3, [r7, #36] ; 0x24 GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15; - 80256fa: f44f 4340 mov.w r3, #49152 ; 0xc000 - 80256fe: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 802577e: f44f 4340 mov.w r3, #49152 ; 0xc000 + 8025782: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8025702: 2302 movs r3, #2 - 8025704: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025786: 2302 movs r3, #2 + 8025788: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8025708: 2300 movs r3, #0 - 802570a: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 802578c: 2300 movs r3, #0 + 802578e: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 802570e: 2300 movs r3, #0 - 8025710: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025792: 2300 movs r3, #0 + 8025794: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF4_USART1; - 8025714: 2304 movs r3, #4 - 8025716: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 8025798: 2304 movs r3, #4 + 802579a: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 802571a: f507 7386 add.w r3, r7, #268 ; 0x10c - 802571e: 4619 mov r1, r3 - 8025720: 4873 ldr r0, [pc, #460] ; (80258f0 ) - 8025722: f007 fea3 bl 802d46c + 802579e: f507 7386 add.w r3, r7, #268 ; 0x10c + 80257a2: 4619 mov r1, r3 + 80257a4: 4873 ldr r0, [pc, #460] ; (8025974 ) + 80257a6: f007 fea3 bl 802d4f0 hdma_usart1_tx.Instance = DMA1_Stream2; - 8025726: 4b73 ldr r3, [pc, #460] ; (80258f4 ) - 8025728: 4a73 ldr r2, [pc, #460] ; (80258f8 ) - 802572a: 601a str r2, [r3, #0] + 80257aa: 4b73 ldr r3, [pc, #460] ; (8025978 ) + 80257ac: 4a73 ldr r2, [pc, #460] ; (802597c ) + 80257ae: 601a str r2, [r3, #0] hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX; - 802572c: 4b71 ldr r3, [pc, #452] ; (80258f4 ) - 802572e: 222a movs r2, #42 ; 0x2a - 8025730: 605a str r2, [r3, #4] + 80257b0: 4b71 ldr r3, [pc, #452] ; (8025978 ) + 80257b2: 222a movs r2, #42 ; 0x2a + 80257b4: 605a str r2, [r3, #4] hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 8025732: 4b70 ldr r3, [pc, #448] ; (80258f4 ) - 8025734: 2240 movs r2, #64 ; 0x40 - 8025736: 609a str r2, [r3, #8] + 80257b6: 4b70 ldr r3, [pc, #448] ; (8025978 ) + 80257b8: 2240 movs r2, #64 ; 0x40 + 80257ba: 609a str r2, [r3, #8] hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8025738: 4b6e ldr r3, [pc, #440] ; (80258f4 ) - 802573a: 2200 movs r2, #0 - 802573c: 60da str r2, [r3, #12] + 80257bc: 4b6e ldr r3, [pc, #440] ; (8025978 ) + 80257be: 2200 movs r2, #0 + 80257c0: 60da str r2, [r3, #12] hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; - 802573e: 4b6d ldr r3, [pc, #436] ; (80258f4 ) - 8025740: f44f 6280 mov.w r2, #1024 ; 0x400 - 8025744: 611a str r2, [r3, #16] + 80257c2: 4b6d ldr r3, [pc, #436] ; (8025978 ) + 80257c4: f44f 6280 mov.w r2, #1024 ; 0x400 + 80257c8: 611a str r2, [r3, #16] hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8025746: 4b6b ldr r3, [pc, #428] ; (80258f4 ) - 8025748: 2200 movs r2, #0 - 802574a: 615a str r2, [r3, #20] + 80257ca: 4b6b ldr r3, [pc, #428] ; (8025978 ) + 80257cc: 2200 movs r2, #0 + 80257ce: 615a str r2, [r3, #20] hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 802574c: 4b69 ldr r3, [pc, #420] ; (80258f4 ) - 802574e: 2200 movs r2, #0 - 8025750: 619a str r2, [r3, #24] + 80257d0: 4b69 ldr r3, [pc, #420] ; (8025978 ) + 80257d2: 2200 movs r2, #0 + 80257d4: 619a str r2, [r3, #24] hdma_usart1_tx.Init.Mode = DMA_NORMAL; - 8025752: 4b68 ldr r3, [pc, #416] ; (80258f4 ) - 8025754: 2200 movs r2, #0 - 8025756: 61da str r2, [r3, #28] + 80257d6: 4b68 ldr r3, [pc, #416] ; (8025978 ) + 80257d8: 2200 movs r2, #0 + 80257da: 61da str r2, [r3, #28] hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; - 8025758: 4b66 ldr r3, [pc, #408] ; (80258f4 ) - 802575a: 2200 movs r2, #0 - 802575c: 621a str r2, [r3, #32] + 80257dc: 4b66 ldr r3, [pc, #408] ; (8025978 ) + 80257de: 2200 movs r2, #0 + 80257e0: 621a str r2, [r3, #32] hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE; - 802575e: 4b65 ldr r3, [pc, #404] ; (80258f4 ) - 8025760: 2204 movs r2, #4 - 8025762: 625a str r2, [r3, #36] ; 0x24 + 80257e2: 4b65 ldr r3, [pc, #404] ; (8025978 ) + 80257e4: 2204 movs r2, #4 + 80257e6: 625a str r2, [r3, #36] ; 0x24 hdma_usart1_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; - 8025764: 4b63 ldr r3, [pc, #396] ; (80258f4 ) - 8025766: 2203 movs r2, #3 - 8025768: 629a str r2, [r3, #40] ; 0x28 + 80257e8: 4b63 ldr r3, [pc, #396] ; (8025978 ) + 80257ea: 2203 movs r2, #3 + 80257ec: 629a str r2, [r3, #40] ; 0x28 hdma_usart1_tx.Init.MemBurst = DMA_MBURST_SINGLE; - 802576a: 4b62 ldr r3, [pc, #392] ; (80258f4 ) - 802576c: 2200 movs r2, #0 - 802576e: 62da str r2, [r3, #44] ; 0x2c + 80257ee: 4b62 ldr r3, [pc, #392] ; (8025978 ) + 80257f0: 2200 movs r2, #0 + 80257f2: 62da str r2, [r3, #44] ; 0x2c hdma_usart1_tx.Init.PeriphBurst = DMA_PBURST_SINGLE; - 8025770: 4b60 ldr r3, [pc, #384] ; (80258f4 ) - 8025772: 2200 movs r2, #0 - 8025774: 631a str r2, [r3, #48] ; 0x30 + 80257f4: 4b60 ldr r3, [pc, #384] ; (8025978 ) + 80257f6: 2200 movs r2, #0 + 80257f8: 631a str r2, [r3, #48] ; 0x30 if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) - 8025776: 485f ldr r0, [pc, #380] ; (80258f4 ) - 8025778: f002 f9d4 bl 8027b24 - 802577c: 4603 mov r3, r0 - 802577e: 2b00 cmp r3, #0 - 8025780: d001 beq.n 8025786 + 80257fa: 485f ldr r0, [pc, #380] ; (8025978 ) + 80257fc: f002 f9d4 bl 8027ba8 + 8025800: 4603 mov r3, r0 + 8025802: 2b00 cmp r3, #0 + 8025804: d001 beq.n 802580a Error_Handler(); - 8025782: f7fe fdd3 bl 802432c + 8025806: f7fe fdd3 bl 80243b0 __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart1_tx); - 8025786: f507 7390 add.w r3, r7, #288 ; 0x120 - 802578a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802578e: 681b ldr r3, [r3, #0] - 8025790: 4a58 ldr r2, [pc, #352] ; (80258f4 ) - 8025792: 679a str r2, [r3, #120] ; 0x78 - 8025794: 4a57 ldr r2, [pc, #348] ; (80258f4 ) - 8025796: f507 7390 add.w r3, r7, #288 ; 0x120 - 802579a: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 802579e: 681b ldr r3, [r3, #0] - 80257a0: 6393 str r3, [r2, #56] ; 0x38 + 802580a: f507 7390 add.w r3, r7, #288 ; 0x120 + 802580e: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025812: 681b ldr r3, [r3, #0] + 8025814: 4a58 ldr r2, [pc, #352] ; (8025978 ) + 8025816: 679a str r2, [r3, #120] ; 0x78 + 8025818: 4a57 ldr r2, [pc, #348] ; (8025978 ) + 802581a: f507 7390 add.w r3, r7, #288 ; 0x120 + 802581e: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025822: 681b ldr r3, [r3, #0] + 8025824: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); - 80257a2: 2200 movs r2, #0 - 80257a4: 2100 movs r1, #0 - 80257a6: 2025 movs r0, #37 ; 0x25 - 80257a8: f002 f90b bl 80279c2 + 8025826: 2200 movs r2, #0 + 8025828: 2100 movs r1, #0 + 802582a: 2025 movs r0, #37 ; 0x25 + 802582c: f002 f90b bl 8027a46 HAL_NVIC_EnableIRQ(USART1_IRQn); - 80257ac: 2025 movs r0, #37 ; 0x25 - 80257ae: f002 f922 bl 80279f6 + 8025830: 2025 movs r0, #37 ; 0x25 + 8025832: f002 f922 bl 8027a7a } - 80257b2: e1df b.n 8025b74 + 8025836: e1df b.n 8025bf8 else if(uartHandle->Instance==USART2) - 80257b4: f507 7390 add.w r3, r7, #288 ; 0x120 - 80257b8: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80257bc: 681b ldr r3, [r3, #0] - 80257be: 681b ldr r3, [r3, #0] - 80257c0: 4a4e ldr r2, [pc, #312] ; (80258fc ) - 80257c2: 4293 cmp r3, r2 - 80257c4: f040 80a2 bne.w 802590c + 8025838: f507 7390 add.w r3, r7, #288 ; 0x120 + 802583c: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025840: 681b ldr r3, [r3, #0] + 8025842: 681b ldr r3, [r3, #0] + 8025844: 4a4e ldr r2, [pc, #312] ; (8025980 ) + 8025846: 4293 cmp r3, r2 + 8025848: f040 80a2 bne.w 8025990 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2; - 80257c8: 2302 movs r3, #2 - 80257ca: 653b str r3, [r7, #80] ; 0x50 + 802584c: 2302 movs r3, #2 + 802584e: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 80257cc: 2300 movs r3, #0 - 80257ce: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 8025850: 2300 movs r3, #0 + 8025852: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 80257d2: f107 0350 add.w r3, r7, #80 ; 0x50 - 80257d6: 4618 mov r0, r3 - 80257d8: f00a faea bl 802fdb0 - 80257dc: 4603 mov r3, r0 - 80257de: 2b00 cmp r3, #0 - 80257e0: d001 beq.n 80257e6 + 8025856: f107 0350 add.w r3, r7, #80 ; 0x50 + 802585a: 4618 mov r0, r3 + 802585c: f00a faea bl 802fe34 + 8025860: 4603 mov r3, r0 + 8025862: 2b00 cmp r3, #0 + 8025864: d001 beq.n 802586a Error_Handler(); - 80257e2: f7fe fda3 bl 802432c + 8025866: f7fe fda3 bl 80243b0 __HAL_RCC_USART2_CLK_ENABLE(); - 80257e6: 4b41 ldr r3, [pc, #260] ; (80258ec ) - 80257e8: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 80257ec: 4a3f ldr r2, [pc, #252] ; (80258ec ) - 80257ee: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80257f2: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 80257f6: 4b3d ldr r3, [pc, #244] ; (80258ec ) - 80257f8: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 80257fc: f403 3200 and.w r2, r3, #131072 ; 0x20000 - 8025800: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025804: f5a3 7380 sub.w r3, r3, #256 ; 0x100 - 8025808: 601a str r2, [r3, #0] - 802580a: f507 7390 add.w r3, r7, #288 ; 0x120 - 802580e: f5a3 7380 sub.w r3, r3, #256 ; 0x100 - 8025812: 681b ldr r3, [r3, #0] + 802586a: 4b41 ldr r3, [pc, #260] ; (8025970 ) + 802586c: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025870: 4a3f ldr r2, [pc, #252] ; (8025970 ) + 8025872: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8025876: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 802587a: 4b3d ldr r3, [pc, #244] ; (8025970 ) + 802587c: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 8025880: f403 3200 and.w r2, r3, #131072 ; 0x20000 + 8025884: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025888: f5a3 7380 sub.w r3, r3, #256 ; 0x100 + 802588c: 601a str r2, [r3, #0] + 802588e: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025892: f5a3 7380 sub.w r3, r3, #256 ; 0x100 + 8025896: 681b ldr r3, [r3, #0] __HAL_RCC_GPIOD_CLK_ENABLE(); - 8025814: 4b35 ldr r3, [pc, #212] ; (80258ec ) - 8025816: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 802581a: 4a34 ldr r2, [pc, #208] ; (80258ec ) - 802581c: f043 0308 orr.w r3, r3, #8 - 8025820: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8025824: 4b31 ldr r3, [pc, #196] ; (80258ec ) - 8025826: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 802582a: f003 0208 and.w r2, r3, #8 - 802582e: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025832: f5a3 7382 sub.w r3, r3, #260 ; 0x104 - 8025836: 601a str r2, [r3, #0] - 8025838: f507 7390 add.w r3, r7, #288 ; 0x120 - 802583c: f5a3 7382 sub.w r3, r3, #260 ; 0x104 - 8025840: 681b ldr r3, [r3, #0] + 8025898: 4b35 ldr r3, [pc, #212] ; (8025970 ) + 802589a: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 802589e: 4a34 ldr r2, [pc, #208] ; (8025970 ) + 80258a0: f043 0308 orr.w r3, r3, #8 + 80258a4: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 80258a8: 4b31 ldr r3, [pc, #196] ; (8025970 ) + 80258aa: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80258ae: f003 0208 and.w r2, r3, #8 + 80258b2: f507 7390 add.w r3, r7, #288 ; 0x120 + 80258b6: f5a3 7382 sub.w r3, r3, #260 ; 0x104 + 80258ba: 601a str r2, [r3, #0] + 80258bc: f507 7390 add.w r3, r7, #288 ; 0x120 + 80258c0: f5a3 7382 sub.w r3, r3, #260 ; 0x104 + 80258c4: 681b ldr r3, [r3, #0] GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6; - 8025842: 2360 movs r3, #96 ; 0x60 - 8025844: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 80258c6: 2360 movs r3, #96 ; 0x60 + 80258c8: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8025848: 2302 movs r3, #2 - 802584a: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 80258cc: 2302 movs r3, #2 + 80258ce: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 802584e: 2300 movs r3, #0 - 8025850: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 80258d2: 2300 movs r3, #0 + 80258d4: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8025854: 2300 movs r3, #0 - 8025856: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 80258d8: 2300 movs r3, #0 + 80258da: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF7_USART2; - 802585a: 2307 movs r3, #7 - 802585c: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 80258de: 2307 movs r3, #7 + 80258e0: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 8025860: f507 7386 add.w r3, r7, #268 ; 0x10c - 8025864: 4619 mov r1, r3 - 8025866: 4826 ldr r0, [pc, #152] ; (8025900 ) - 8025868: f007 fe00 bl 802d46c + 80258e4: f507 7386 add.w r3, r7, #268 ; 0x10c + 80258e8: 4619 mov r1, r3 + 80258ea: 4826 ldr r0, [pc, #152] ; (8025984 ) + 80258ec: f007 fe00 bl 802d4f0 hdma_usart2_tx.Instance = DMA1_Stream4; - 802586c: 4b25 ldr r3, [pc, #148] ; (8025904 ) - 802586e: 4a26 ldr r2, [pc, #152] ; (8025908 ) - 8025870: 601a str r2, [r3, #0] + 80258f0: 4b25 ldr r3, [pc, #148] ; (8025988 ) + 80258f2: 4a26 ldr r2, [pc, #152] ; (802598c ) + 80258f4: 601a str r2, [r3, #0] hdma_usart2_tx.Init.Request = DMA_REQUEST_USART2_TX; - 8025872: 4b24 ldr r3, [pc, #144] ; (8025904 ) - 8025874: 222c movs r2, #44 ; 0x2c - 8025876: 605a str r2, [r3, #4] + 80258f6: 4b24 ldr r3, [pc, #144] ; (8025988 ) + 80258f8: 222c movs r2, #44 ; 0x2c + 80258fa: 605a str r2, [r3, #4] hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 8025878: 4b22 ldr r3, [pc, #136] ; (8025904 ) - 802587a: 2240 movs r2, #64 ; 0x40 - 802587c: 609a str r2, [r3, #8] + 80258fc: 4b22 ldr r3, [pc, #136] ; (8025988 ) + 80258fe: 2240 movs r2, #64 ; 0x40 + 8025900: 609a str r2, [r3, #8] hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 802587e: 4b21 ldr r3, [pc, #132] ; (8025904 ) - 8025880: 2200 movs r2, #0 - 8025882: 60da str r2, [r3, #12] + 8025902: 4b21 ldr r3, [pc, #132] ; (8025988 ) + 8025904: 2200 movs r2, #0 + 8025906: 60da str r2, [r3, #12] hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; - 8025884: 4b1f ldr r3, [pc, #124] ; (8025904 ) - 8025886: f44f 6280 mov.w r2, #1024 ; 0x400 - 802588a: 611a str r2, [r3, #16] + 8025908: 4b1f ldr r3, [pc, #124] ; (8025988 ) + 802590a: f44f 6280 mov.w r2, #1024 ; 0x400 + 802590e: 611a str r2, [r3, #16] hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 802588c: 4b1d ldr r3, [pc, #116] ; (8025904 ) - 802588e: 2200 movs r2, #0 - 8025890: 615a str r2, [r3, #20] + 8025910: 4b1d ldr r3, [pc, #116] ; (8025988 ) + 8025912: 2200 movs r2, #0 + 8025914: 615a str r2, [r3, #20] hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8025892: 4b1c ldr r3, [pc, #112] ; (8025904 ) - 8025894: 2200 movs r2, #0 - 8025896: 619a str r2, [r3, #24] + 8025916: 4b1c ldr r3, [pc, #112] ; (8025988 ) + 8025918: 2200 movs r2, #0 + 802591a: 619a str r2, [r3, #24] hdma_usart2_tx.Init.Mode = DMA_NORMAL; - 8025898: 4b1a ldr r3, [pc, #104] ; (8025904 ) - 802589a: 2200 movs r2, #0 - 802589c: 61da str r2, [r3, #28] + 802591c: 4b1a ldr r3, [pc, #104] ; (8025988 ) + 802591e: 2200 movs r2, #0 + 8025920: 61da str r2, [r3, #28] hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW; - 802589e: 4b19 ldr r3, [pc, #100] ; (8025904 ) - 80258a0: 2200 movs r2, #0 - 80258a2: 621a str r2, [r3, #32] + 8025922: 4b19 ldr r3, [pc, #100] ; (8025988 ) + 8025924: 2200 movs r2, #0 + 8025926: 621a str r2, [r3, #32] hdma_usart2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 80258a4: 4b17 ldr r3, [pc, #92] ; (8025904 ) - 80258a6: 2200 movs r2, #0 - 80258a8: 625a str r2, [r3, #36] ; 0x24 + 8025928: 4b17 ldr r3, [pc, #92] ; (8025988 ) + 802592a: 2200 movs r2, #0 + 802592c: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK) - 80258aa: 4816 ldr r0, [pc, #88] ; (8025904 ) - 80258ac: f002 f93a bl 8027b24 - 80258b0: 4603 mov r3, r0 - 80258b2: 2b00 cmp r3, #0 - 80258b4: d001 beq.n 80258ba + 802592e: 4816 ldr r0, [pc, #88] ; (8025988 ) + 8025930: f002 f93a bl 8027ba8 + 8025934: 4603 mov r3, r0 + 8025936: 2b00 cmp r3, #0 + 8025938: d001 beq.n 802593e Error_Handler(); - 80258b6: f7fe fd39 bl 802432c + 802593a: f7fe fd39 bl 80243b0 __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx); - 80258ba: f507 7390 add.w r3, r7, #288 ; 0x120 - 80258be: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80258c2: 681b ldr r3, [r3, #0] - 80258c4: 4a0f ldr r2, [pc, #60] ; (8025904 ) - 80258c6: 679a str r2, [r3, #120] ; 0x78 - 80258c8: 4a0e ldr r2, [pc, #56] ; (8025904 ) - 80258ca: f507 7390 add.w r3, r7, #288 ; 0x120 - 80258ce: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 80258d2: 681b ldr r3, [r3, #0] - 80258d4: 6393 str r3, [r2, #56] ; 0x38 + 802593e: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025942: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025946: 681b ldr r3, [r3, #0] + 8025948: 4a0f ldr r2, [pc, #60] ; (8025988 ) + 802594a: 679a str r2, [r3, #120] ; 0x78 + 802594c: 4a0e ldr r2, [pc, #56] ; (8025988 ) + 802594e: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025952: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025956: 681b ldr r3, [r3, #0] + 8025958: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(USART2_IRQn, 0, 0); - 80258d6: 2200 movs r2, #0 - 80258d8: 2100 movs r1, #0 - 80258da: 2026 movs r0, #38 ; 0x26 - 80258dc: f002 f871 bl 80279c2 + 802595a: 2200 movs r2, #0 + 802595c: 2100 movs r1, #0 + 802595e: 2026 movs r0, #38 ; 0x26 + 8025960: f002 f871 bl 8027a46 HAL_NVIC_EnableIRQ(USART2_IRQn); - 80258e0: 2026 movs r0, #38 ; 0x26 - 80258e2: f002 f888 bl 80279f6 -} - 80258e6: e145 b.n 8025b74 - 80258e8: 40011000 .word 0x40011000 - 80258ec: 58024400 .word 0x58024400 - 80258f0: 58020400 .word 0x58020400 - 80258f4: 2400b674 .word 0x2400b674 - 80258f8: 40020040 .word 0x40020040 - 80258fc: 40004400 .word 0x40004400 - 8025900: 58020c00 .word 0x58020c00 - 8025904: 2400b6ec .word 0x2400b6ec - 8025908: 40020070 .word 0x40020070 + 8025964: 2026 movs r0, #38 ; 0x26 + 8025966: f002 f888 bl 8027a7a +} + 802596a: e145 b.n 8025bf8 + 802596c: 40011000 .word 0x40011000 + 8025970: 58024400 .word 0x58024400 + 8025974: 58020400 .word 0x58020400 + 8025978: 2400b67c .word 0x2400b67c + 802597c: 40020040 .word 0x40020040 + 8025980: 40004400 .word 0x40004400 + 8025984: 58020c00 .word 0x58020c00 + 8025988: 2400b6f4 .word 0x2400b6f4 + 802598c: 40020070 .word 0x40020070 else if(uartHandle->Instance==USART3) - 802590c: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025910: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025914: 681b ldr r3, [r3, #0] - 8025916: 681b ldr r3, [r3, #0] - 8025918: 4a99 ldr r2, [pc, #612] ; (8025b80 ) - 802591a: 4293 cmp r3, r2 - 802591c: f040 8091 bne.w 8025a42 + 8025990: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025994: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025998: 681b ldr r3, [r3, #0] + 802599a: 681b ldr r3, [r3, #0] + 802599c: 4a99 ldr r2, [pc, #612] ; (8025c04 ) + 802599e: 4293 cmp r3, r2 + 80259a0: f040 8091 bne.w 8025ac6 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3; - 8025920: 2302 movs r3, #2 - 8025922: 653b str r3, [r7, #80] ; 0x50 + 80259a4: 2302 movs r3, #2 + 80259a6: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; - 8025924: 2300 movs r3, #0 - 8025926: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 80259a8: 2300 movs r3, #0 + 80259aa: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 802592a: f107 0350 add.w r3, r7, #80 ; 0x50 - 802592e: 4618 mov r0, r3 - 8025930: f00a fa3e bl 802fdb0 - 8025934: 4603 mov r3, r0 - 8025936: 2b00 cmp r3, #0 - 8025938: d001 beq.n 802593e + 80259ae: f107 0350 add.w r3, r7, #80 ; 0x50 + 80259b2: 4618 mov r0, r3 + 80259b4: f00a fa3e bl 802fe34 + 80259b8: 4603 mov r3, r0 + 80259ba: 2b00 cmp r3, #0 + 80259bc: d001 beq.n 80259c2 Error_Handler(); - 802593a: f7fe fcf7 bl 802432c + 80259be: f7fe fcf7 bl 80243b0 __HAL_RCC_USART3_CLK_ENABLE(); - 802593e: 4b91 ldr r3, [pc, #580] ; (8025b84 ) - 8025940: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025944: 4a8f ldr r2, [pc, #572] ; (8025b84 ) - 8025946: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 802594a: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 - 802594e: 4b8d ldr r3, [pc, #564] ; (8025b84 ) - 8025950: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 - 8025954: f403 2280 and.w r2, r3, #262144 ; 0x40000 - 8025958: f507 7390 add.w r3, r7, #288 ; 0x120 - 802595c: f5a3 7384 sub.w r3, r3, #264 ; 0x108 - 8025960: 601a str r2, [r3, #0] - 8025962: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025966: f5a3 7384 sub.w r3, r3, #264 ; 0x108 - 802596a: 681b ldr r3, [r3, #0] + 80259c2: 4b91 ldr r3, [pc, #580] ; (8025c08 ) + 80259c4: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 80259c8: 4a8f ldr r2, [pc, #572] ; (8025c08 ) + 80259ca: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 80259ce: f8c2 30e8 str.w r3, [r2, #232] ; 0xe8 + 80259d2: 4b8d ldr r3, [pc, #564] ; (8025c08 ) + 80259d4: f8d3 30e8 ldr.w r3, [r3, #232] ; 0xe8 + 80259d8: f403 2280 and.w r2, r3, #262144 ; 0x40000 + 80259dc: f507 7390 add.w r3, r7, #288 ; 0x120 + 80259e0: f5a3 7384 sub.w r3, r3, #264 ; 0x108 + 80259e4: 601a str r2, [r3, #0] + 80259e6: f507 7390 add.w r3, r7, #288 ; 0x120 + 80259ea: f5a3 7384 sub.w r3, r3, #264 ; 0x108 + 80259ee: 681b ldr r3, [r3, #0] __HAL_RCC_GPIOD_CLK_ENABLE(); - 802596c: 4b85 ldr r3, [pc, #532] ; (8025b84 ) - 802596e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025972: 4a84 ldr r2, [pc, #528] ; (8025b84 ) - 8025974: f043 0308 orr.w r3, r3, #8 - 8025978: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 802597c: 4b81 ldr r3, [pc, #516] ; (8025b84 ) - 802597e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025982: f003 0208 and.w r2, r3, #8 - 8025986: f507 7390 add.w r3, r7, #288 ; 0x120 - 802598a: f5a3 7386 sub.w r3, r3, #268 ; 0x10c - 802598e: 601a str r2, [r3, #0] - 8025990: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025994: f5a3 7386 sub.w r3, r3, #268 ; 0x10c - 8025998: 681b ldr r3, [r3, #0] + 80259f0: 4b85 ldr r3, [pc, #532] ; (8025c08 ) + 80259f2: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 80259f6: 4a84 ldr r2, [pc, #528] ; (8025c08 ) + 80259f8: f043 0308 orr.w r3, r3, #8 + 80259fc: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8025a00: 4b81 ldr r3, [pc, #516] ; (8025c08 ) + 8025a02: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025a06: f003 0208 and.w r2, r3, #8 + 8025a0a: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025a0e: f5a3 7386 sub.w r3, r3, #268 ; 0x10c + 8025a12: 601a str r2, [r3, #0] + 8025a14: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025a18: f5a3 7386 sub.w r3, r3, #268 ; 0x10c + 8025a1c: 681b ldr r3, [r3, #0] GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; - 802599a: f44f 7340 mov.w r3, #768 ; 0x300 - 802599e: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025a1e: f44f 7340 mov.w r3, #768 ; 0x300 + 8025a22: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80259a2: 2302 movs r3, #2 - 80259a4: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025a26: 2302 movs r3, #2 + 8025a28: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 80259a8: 2300 movs r3, #0 - 80259aa: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 8025a2c: 2300 movs r3, #0 + 8025a2e: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80259ae: 2300 movs r3, #0 - 80259b0: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025a32: 2300 movs r3, #0 + 8025a34: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF7_USART3; - 80259b4: 2307 movs r3, #7 - 80259b6: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 8025a38: 2307 movs r3, #7 + 8025a3a: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); - 80259ba: f507 7386 add.w r3, r7, #268 ; 0x10c - 80259be: 4619 mov r1, r3 - 80259c0: 4871 ldr r0, [pc, #452] ; (8025b88 ) - 80259c2: f007 fd53 bl 802d46c + 8025a3e: f507 7386 add.w r3, r7, #268 ; 0x10c + 8025a42: 4619 mov r1, r3 + 8025a44: 4871 ldr r0, [pc, #452] ; (8025c0c ) + 8025a46: f007 fd53 bl 802d4f0 hdma_usart3_tx.Instance = DMA1_Stream5; - 80259c6: 4b71 ldr r3, [pc, #452] ; (8025b8c ) - 80259c8: 4a71 ldr r2, [pc, #452] ; (8025b90 ) - 80259ca: 601a str r2, [r3, #0] + 8025a4a: 4b71 ldr r3, [pc, #452] ; (8025c10 ) + 8025a4c: 4a71 ldr r2, [pc, #452] ; (8025c14 ) + 8025a4e: 601a str r2, [r3, #0] hdma_usart3_tx.Init.Request = DMA_REQUEST_USART3_TX; - 80259cc: 4b6f ldr r3, [pc, #444] ; (8025b8c ) - 80259ce: 222e movs r2, #46 ; 0x2e - 80259d0: 605a str r2, [r3, #4] + 8025a50: 4b6f ldr r3, [pc, #444] ; (8025c10 ) + 8025a52: 222e movs r2, #46 ; 0x2e + 8025a54: 605a str r2, [r3, #4] hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 80259d2: 4b6e ldr r3, [pc, #440] ; (8025b8c ) - 80259d4: 2240 movs r2, #64 ; 0x40 - 80259d6: 609a str r2, [r3, #8] + 8025a56: 4b6e ldr r3, [pc, #440] ; (8025c10 ) + 8025a58: 2240 movs r2, #64 ; 0x40 + 8025a5a: 609a str r2, [r3, #8] hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 80259d8: 4b6c ldr r3, [pc, #432] ; (8025b8c ) - 80259da: 2200 movs r2, #0 - 80259dc: 60da str r2, [r3, #12] + 8025a5c: 4b6c ldr r3, [pc, #432] ; (8025c10 ) + 8025a5e: 2200 movs r2, #0 + 8025a60: 60da str r2, [r3, #12] hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE; - 80259de: 4b6b ldr r3, [pc, #428] ; (8025b8c ) - 80259e0: f44f 6280 mov.w r2, #1024 ; 0x400 - 80259e4: 611a str r2, [r3, #16] + 8025a62: 4b6b ldr r3, [pc, #428] ; (8025c10 ) + 8025a64: f44f 6280 mov.w r2, #1024 ; 0x400 + 8025a68: 611a str r2, [r3, #16] hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 80259e6: 4b69 ldr r3, [pc, #420] ; (8025b8c ) - 80259e8: 2200 movs r2, #0 - 80259ea: 615a str r2, [r3, #20] + 8025a6a: 4b69 ldr r3, [pc, #420] ; (8025c10 ) + 8025a6c: 2200 movs r2, #0 + 8025a6e: 615a str r2, [r3, #20] hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 80259ec: 4b67 ldr r3, [pc, #412] ; (8025b8c ) - 80259ee: 2200 movs r2, #0 - 80259f0: 619a str r2, [r3, #24] + 8025a70: 4b67 ldr r3, [pc, #412] ; (8025c10 ) + 8025a72: 2200 movs r2, #0 + 8025a74: 619a str r2, [r3, #24] hdma_usart3_tx.Init.Mode = DMA_NORMAL; - 80259f2: 4b66 ldr r3, [pc, #408] ; (8025b8c ) - 80259f4: 2200 movs r2, #0 - 80259f6: 61da str r2, [r3, #28] + 8025a76: 4b66 ldr r3, [pc, #408] ; (8025c10 ) + 8025a78: 2200 movs r2, #0 + 8025a7a: 61da str r2, [r3, #28] hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW; - 80259f8: 4b64 ldr r3, [pc, #400] ; (8025b8c ) - 80259fa: 2200 movs r2, #0 - 80259fc: 621a str r2, [r3, #32] + 8025a7c: 4b64 ldr r3, [pc, #400] ; (8025c10 ) + 8025a7e: 2200 movs r2, #0 + 8025a80: 621a str r2, [r3, #32] hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 80259fe: 4b63 ldr r3, [pc, #396] ; (8025b8c ) - 8025a00: 2200 movs r2, #0 - 8025a02: 625a str r2, [r3, #36] ; 0x24 + 8025a82: 4b63 ldr r3, [pc, #396] ; (8025c10 ) + 8025a84: 2200 movs r2, #0 + 8025a86: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK) - 8025a04: 4861 ldr r0, [pc, #388] ; (8025b8c ) - 8025a06: f002 f88d bl 8027b24 - 8025a0a: 4603 mov r3, r0 - 8025a0c: 2b00 cmp r3, #0 - 8025a0e: d001 beq.n 8025a14 + 8025a88: 4861 ldr r0, [pc, #388] ; (8025c10 ) + 8025a8a: f002 f88d bl 8027ba8 + 8025a8e: 4603 mov r3, r0 + 8025a90: 2b00 cmp r3, #0 + 8025a92: d001 beq.n 8025a98 Error_Handler(); - 8025a10: f7fe fc8c bl 802432c + 8025a94: f7fe fc8c bl 80243b0 __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart3_tx); - 8025a14: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a18: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025a1c: 681b ldr r3, [r3, #0] - 8025a1e: 4a5b ldr r2, [pc, #364] ; (8025b8c ) - 8025a20: 679a str r2, [r3, #120] ; 0x78 - 8025a22: 4a5a ldr r2, [pc, #360] ; (8025b8c ) - 8025a24: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a28: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025a2c: 681b ldr r3, [r3, #0] - 8025a2e: 6393 str r3, [r2, #56] ; 0x38 + 8025a98: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025a9c: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025aa0: 681b ldr r3, [r3, #0] + 8025aa2: 4a5b ldr r2, [pc, #364] ; (8025c10 ) + 8025aa4: 679a str r2, [r3, #120] ; 0x78 + 8025aa6: 4a5a ldr r2, [pc, #360] ; (8025c10 ) + 8025aa8: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025aac: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025ab0: 681b ldr r3, [r3, #0] + 8025ab2: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(USART3_IRQn, 0, 0); - 8025a30: 2200 movs r2, #0 - 8025a32: 2100 movs r1, #0 - 8025a34: 2027 movs r0, #39 ; 0x27 - 8025a36: f001 ffc4 bl 80279c2 + 8025ab4: 2200 movs r2, #0 + 8025ab6: 2100 movs r1, #0 + 8025ab8: 2027 movs r0, #39 ; 0x27 + 8025aba: f001 ffc4 bl 8027a46 HAL_NVIC_EnableIRQ(USART3_IRQn); - 8025a3a: 2027 movs r0, #39 ; 0x27 - 8025a3c: f001 ffdb bl 80279f6 + 8025abe: 2027 movs r0, #39 ; 0x27 + 8025ac0: f001 ffdb bl 8027a7a } - 8025a40: e098 b.n 8025b74 + 8025ac4: e098 b.n 8025bf8 else if(uartHandle->Instance==USART6) - 8025a42: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a46: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025a4a: 681b ldr r3, [r3, #0] - 8025a4c: 681b ldr r3, [r3, #0] - 8025a4e: 4a51 ldr r2, [pc, #324] ; (8025b94 ) - 8025a50: 4293 cmp r3, r2 - 8025a52: f040 808f bne.w 8025b74 + 8025ac6: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025aca: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025ace: 681b ldr r3, [r3, #0] + 8025ad0: 681b ldr r3, [r3, #0] + 8025ad2: 4a51 ldr r2, [pc, #324] ; (8025c18 ) + 8025ad4: 4293 cmp r3, r2 + 8025ad6: f040 808f bne.w 8025bf8 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6; - 8025a56: 2301 movs r3, #1 - 8025a58: 653b str r3, [r7, #80] ; 0x50 + 8025ada: 2301 movs r3, #1 + 8025adc: 653b str r3, [r7, #80] ; 0x50 PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; - 8025a5a: 2300 movs r3, #0 - 8025a5c: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 + 8025ade: 2300 movs r3, #0 + 8025ae0: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 8025a60: f107 0350 add.w r3, r7, #80 ; 0x50 - 8025a64: 4618 mov r0, r3 - 8025a66: f00a f9a3 bl 802fdb0 - 8025a6a: 4603 mov r3, r0 - 8025a6c: 2b00 cmp r3, #0 - 8025a6e: d001 beq.n 8025a74 + 8025ae4: f107 0350 add.w r3, r7, #80 ; 0x50 + 8025ae8: 4618 mov r0, r3 + 8025aea: f00a f9a3 bl 802fe34 + 8025aee: 4603 mov r3, r0 + 8025af0: 2b00 cmp r3, #0 + 8025af2: d001 beq.n 8025af8 Error_Handler(); - 8025a70: f7fe fc5c bl 802432c + 8025af4: f7fe fc5c bl 80243b0 __HAL_RCC_USART6_CLK_ENABLE(); - 8025a74: 4b43 ldr r3, [pc, #268] ; (8025b84 ) - 8025a76: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8025a7a: 4a42 ldr r2, [pc, #264] ; (8025b84 ) - 8025a7c: f043 0320 orr.w r3, r3, #32 - 8025a80: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 - 8025a84: 4b3f ldr r3, [pc, #252] ; (8025b84 ) - 8025a86: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 8025a8a: f003 0220 and.w r2, r3, #32 - 8025a8e: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a92: f5a3 7388 sub.w r3, r3, #272 ; 0x110 - 8025a96: 601a str r2, [r3, #0] - 8025a98: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025a9c: f5a3 7388 sub.w r3, r3, #272 ; 0x110 - 8025aa0: 681b ldr r3, [r3, #0] + 8025af8: 4b43 ldr r3, [pc, #268] ; (8025c08 ) + 8025afa: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8025afe: 4a42 ldr r2, [pc, #264] ; (8025c08 ) + 8025b00: f043 0320 orr.w r3, r3, #32 + 8025b04: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 8025b08: 4b3f ldr r3, [pc, #252] ; (8025c08 ) + 8025b0a: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 8025b0e: f003 0220 and.w r2, r3, #32 + 8025b12: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025b16: f5a3 7388 sub.w r3, r3, #272 ; 0x110 + 8025b1a: 601a str r2, [r3, #0] + 8025b1c: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025b20: f5a3 7388 sub.w r3, r3, #272 ; 0x110 + 8025b24: 681b ldr r3, [r3, #0] __HAL_RCC_GPIOC_CLK_ENABLE(); - 8025aa2: 4b38 ldr r3, [pc, #224] ; (8025b84 ) - 8025aa4: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025aa8: 4a36 ldr r2, [pc, #216] ; (8025b84 ) - 8025aaa: f043 0304 orr.w r3, r3, #4 - 8025aae: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8025ab2: 4b34 ldr r3, [pc, #208] ; (8025b84 ) - 8025ab4: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8025ab8: f003 0204 and.w r2, r3, #4 - 8025abc: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025ac0: f5a3 738a sub.w r3, r3, #276 ; 0x114 - 8025ac4: 601a str r2, [r3, #0] - 8025ac6: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025aca: f5a3 738a sub.w r3, r3, #276 ; 0x114 - 8025ace: 681b ldr r3, [r3, #0] + 8025b26: 4b38 ldr r3, [pc, #224] ; (8025c08 ) + 8025b28: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025b2c: 4a36 ldr r2, [pc, #216] ; (8025c08 ) + 8025b2e: f043 0304 orr.w r3, r3, #4 + 8025b32: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8025b36: 4b34 ldr r3, [pc, #208] ; (8025c08 ) + 8025b38: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8025b3c: f003 0204 and.w r2, r3, #4 + 8025b40: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025b44: f5a3 738a sub.w r3, r3, #276 ; 0x114 + 8025b48: 601a str r2, [r3, #0] + 8025b4a: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025b4e: f5a3 738a sub.w r3, r3, #276 ; 0x114 + 8025b52: 681b ldr r3, [r3, #0] GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; - 8025ad0: 23c0 movs r3, #192 ; 0xc0 - 8025ad2: f8c7 310c str.w r3, [r7, #268] ; 0x10c + 8025b54: 23c0 movs r3, #192 ; 0xc0 + 8025b56: f8c7 310c str.w r3, [r7, #268] ; 0x10c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8025ad6: 2302 movs r3, #2 - 8025ad8: f8c7 3110 str.w r3, [r7, #272] ; 0x110 + 8025b5a: 2302 movs r3, #2 + 8025b5c: f8c7 3110 str.w r3, [r7, #272] ; 0x110 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8025adc: 2300 movs r3, #0 - 8025ade: f8c7 3114 str.w r3, [r7, #276] ; 0x114 + 8025b60: 2300 movs r3, #0 + 8025b62: f8c7 3114 str.w r3, [r7, #276] ; 0x114 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8025ae2: 2300 movs r3, #0 - 8025ae4: f8c7 3118 str.w r3, [r7, #280] ; 0x118 + 8025b66: 2300 movs r3, #0 + 8025b68: f8c7 3118 str.w r3, [r7, #280] ; 0x118 GPIO_InitStruct.Alternate = GPIO_AF7_USART6; - 8025ae8: 2307 movs r3, #7 - 8025aea: f8c7 311c str.w r3, [r7, #284] ; 0x11c + 8025b6c: 2307 movs r3, #7 + 8025b6e: f8c7 311c str.w r3, [r7, #284] ; 0x11c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8025aee: f507 7386 add.w r3, r7, #268 ; 0x10c - 8025af2: 4619 mov r1, r3 - 8025af4: 4828 ldr r0, [pc, #160] ; (8025b98 ) - 8025af6: f007 fcb9 bl 802d46c + 8025b72: f507 7386 add.w r3, r7, #268 ; 0x10c + 8025b76: 4619 mov r1, r3 + 8025b78: 4828 ldr r0, [pc, #160] ; (8025c1c ) + 8025b7a: f007 fcb9 bl 802d4f0 hdma_usart6_tx.Instance = DMA1_Stream6; - 8025afa: 4b28 ldr r3, [pc, #160] ; (8025b9c ) - 8025afc: 4a28 ldr r2, [pc, #160] ; (8025ba0 ) - 8025afe: 601a str r2, [r3, #0] + 8025b7e: 4b28 ldr r3, [pc, #160] ; (8025c20 ) + 8025b80: 4a28 ldr r2, [pc, #160] ; (8025c24 ) + 8025b82: 601a str r2, [r3, #0] hdma_usart6_tx.Init.Request = DMA_REQUEST_USART6_TX; - 8025b00: 4b26 ldr r3, [pc, #152] ; (8025b9c ) - 8025b02: 2248 movs r2, #72 ; 0x48 - 8025b04: 605a str r2, [r3, #4] + 8025b84: 4b26 ldr r3, [pc, #152] ; (8025c20 ) + 8025b86: 2248 movs r2, #72 ; 0x48 + 8025b88: 605a str r2, [r3, #4] hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - 8025b06: 4b25 ldr r3, [pc, #148] ; (8025b9c ) - 8025b08: 2240 movs r2, #64 ; 0x40 - 8025b0a: 609a str r2, [r3, #8] + 8025b8a: 4b25 ldr r3, [pc, #148] ; (8025c20 ) + 8025b8c: 2240 movs r2, #64 ; 0x40 + 8025b8e: 609a str r2, [r3, #8] hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE; - 8025b0c: 4b23 ldr r3, [pc, #140] ; (8025b9c ) - 8025b0e: 2200 movs r2, #0 - 8025b10: 60da str r2, [r3, #12] + 8025b90: 4b23 ldr r3, [pc, #140] ; (8025c20 ) + 8025b92: 2200 movs r2, #0 + 8025b94: 60da str r2, [r3, #12] hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE; - 8025b12: 4b22 ldr r3, [pc, #136] ; (8025b9c ) - 8025b14: f44f 6280 mov.w r2, #1024 ; 0x400 - 8025b18: 611a str r2, [r3, #16] + 8025b96: 4b22 ldr r3, [pc, #136] ; (8025c20 ) + 8025b98: f44f 6280 mov.w r2, #1024 ; 0x400 + 8025b9c: 611a str r2, [r3, #16] hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8025b1a: 4b20 ldr r3, [pc, #128] ; (8025b9c ) - 8025b1c: 2200 movs r2, #0 - 8025b1e: 615a str r2, [r3, #20] + 8025b9e: 4b20 ldr r3, [pc, #128] ; (8025c20 ) + 8025ba0: 2200 movs r2, #0 + 8025ba2: 615a str r2, [r3, #20] hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8025b20: 4b1e ldr r3, [pc, #120] ; (8025b9c ) - 8025b22: 2200 movs r2, #0 - 8025b24: 619a str r2, [r3, #24] + 8025ba4: 4b1e ldr r3, [pc, #120] ; (8025c20 ) + 8025ba6: 2200 movs r2, #0 + 8025ba8: 619a str r2, [r3, #24] hdma_usart6_tx.Init.Mode = DMA_NORMAL; - 8025b26: 4b1d ldr r3, [pc, #116] ; (8025b9c ) - 8025b28: 2200 movs r2, #0 - 8025b2a: 61da str r2, [r3, #28] + 8025baa: 4b1d ldr r3, [pc, #116] ; (8025c20 ) + 8025bac: 2200 movs r2, #0 + 8025bae: 61da str r2, [r3, #28] hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW; - 8025b2c: 4b1b ldr r3, [pc, #108] ; (8025b9c ) - 8025b2e: 2200 movs r2, #0 - 8025b30: 621a str r2, [r3, #32] + 8025bb0: 4b1b ldr r3, [pc, #108] ; (8025c20 ) + 8025bb2: 2200 movs r2, #0 + 8025bb4: 621a str r2, [r3, #32] hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - 8025b32: 4b1a ldr r3, [pc, #104] ; (8025b9c ) - 8025b34: 2200 movs r2, #0 - 8025b36: 625a str r2, [r3, #36] ; 0x24 + 8025bb6: 4b1a ldr r3, [pc, #104] ; (8025c20 ) + 8025bb8: 2200 movs r2, #0 + 8025bba: 625a str r2, [r3, #36] ; 0x24 if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK) - 8025b38: 4818 ldr r0, [pc, #96] ; (8025b9c ) - 8025b3a: f001 fff3 bl 8027b24 - 8025b3e: 4603 mov r3, r0 - 8025b40: 2b00 cmp r3, #0 - 8025b42: d001 beq.n 8025b48 + 8025bbc: 4818 ldr r0, [pc, #96] ; (8025c20 ) + 8025bbe: f001 fff3 bl 8027ba8 + 8025bc2: 4603 mov r3, r0 + 8025bc4: 2b00 cmp r3, #0 + 8025bc6: d001 beq.n 8025bcc Error_Handler(); - 8025b44: f7fe fbf2 bl 802432c + 8025bc8: f7fe fbf2 bl 80243b0 __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart6_tx); - 8025b48: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025b4c: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025b50: 681b ldr r3, [r3, #0] - 8025b52: 4a12 ldr r2, [pc, #72] ; (8025b9c ) - 8025b54: 679a str r2, [r3, #120] ; 0x78 - 8025b56: 4a11 ldr r2, [pc, #68] ; (8025b9c ) - 8025b58: f507 7390 add.w r3, r7, #288 ; 0x120 - 8025b5c: f5a3 738e sub.w r3, r3, #284 ; 0x11c - 8025b60: 681b ldr r3, [r3, #0] - 8025b62: 6393 str r3, [r2, #56] ; 0x38 + 8025bcc: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025bd0: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025bd4: 681b ldr r3, [r3, #0] + 8025bd6: 4a12 ldr r2, [pc, #72] ; (8025c20 ) + 8025bd8: 679a str r2, [r3, #120] ; 0x78 + 8025bda: 4a11 ldr r2, [pc, #68] ; (8025c20 ) + 8025bdc: f507 7390 add.w r3, r7, #288 ; 0x120 + 8025be0: f5a3 738e sub.w r3, r3, #284 ; 0x11c + 8025be4: 681b ldr r3, [r3, #0] + 8025be6: 6393 str r3, [r2, #56] ; 0x38 HAL_NVIC_SetPriority(USART6_IRQn, 0, 0); - 8025b64: 2200 movs r2, #0 - 8025b66: 2100 movs r1, #0 - 8025b68: 2047 movs r0, #71 ; 0x47 - 8025b6a: f001 ff2a bl 80279c2 + 8025be8: 2200 movs r2, #0 + 8025bea: 2100 movs r1, #0 + 8025bec: 2047 movs r0, #71 ; 0x47 + 8025bee: f001 ff2a bl 8027a46 HAL_NVIC_EnableIRQ(USART6_IRQn); - 8025b6e: 2047 movs r0, #71 ; 0x47 - 8025b70: f001 ff41 bl 80279f6 -} - 8025b74: bf00 nop - 8025b76: f507 7790 add.w r7, r7, #288 ; 0x120 - 8025b7a: 46bd mov sp, r7 - 8025b7c: bd80 pop {r7, pc} - 8025b7e: bf00 nop - 8025b80: 40004800 .word 0x40004800 - 8025b84: 58024400 .word 0x58024400 - 8025b88: 58020c00 .word 0x58020c00 - 8025b8c: 2400b764 .word 0x2400b764 - 8025b90: 40020088 .word 0x40020088 - 8025b94: 40011400 .word 0x40011400 - 8025b98: 58020800 .word 0x58020800 - 8025b9c: 2400b7dc .word 0x2400b7dc - 8025ba0: 400200a0 .word 0x400200a0 - -08025ba4 : - 8025ba4: f8df d034 ldr.w sp, [pc, #52] ; 8025bdc - 8025ba8: f7fe feac bl 8024904 - 8025bac: 480c ldr r0, [pc, #48] ; (8025be0 ) - 8025bae: 490d ldr r1, [pc, #52] ; (8025be4 ) - 8025bb0: 4a0d ldr r2, [pc, #52] ; (8025be8 ) - 8025bb2: 2300 movs r3, #0 - 8025bb4: e002 b.n 8025bbc - -08025bb6 : - 8025bb6: 58d4 ldr r4, [r2, r3] - 8025bb8: 50c4 str r4, [r0, r3] - 8025bba: 3304 adds r3, #4 - -08025bbc : - 8025bbc: 18c4 adds r4, r0, r3 - 8025bbe: 428c cmp r4, r1 - 8025bc0: d3f9 bcc.n 8025bb6 - 8025bc2: 4a0a ldr r2, [pc, #40] ; (8025bec ) - 8025bc4: 4c0a ldr r4, [pc, #40] ; (8025bf0 ) - 8025bc6: 2300 movs r3, #0 - 8025bc8: e001 b.n 8025bce - -08025bca : - 8025bca: 6013 str r3, [r2, #0] - 8025bcc: 3204 adds r2, #4 - -08025bce : - 8025bce: 42a2 cmp r2, r4 - 8025bd0: d3fb bcc.n 8025bca - 8025bd2: f01a fe49 bl 8040868 <__libc_init_array> - 8025bd6: f7fe f861 bl 8023c9c
- 8025bda: 4770 bx lr - 8025bdc: 24080000 .word 0x24080000 - 8025be0: 24000000 .word 0x24000000 - 8025be4: 240000dc .word 0x240000dc - 8025be8: 08045800 .word 0x08045800 - 8025bec: 240000dc .word 0x240000dc - 8025bf0: 2400eac4 .word 0x2400eac4 - -08025bf4 : - 8025bf4: e7fe b.n 8025bf4 - -08025bf6 : + 8025bf2: 2047 movs r0, #71 ; 0x47 + 8025bf4: f001 ff41 bl 8027a7a +} + 8025bf8: bf00 nop + 8025bfa: f507 7790 add.w r7, r7, #288 ; 0x120 + 8025bfe: 46bd mov sp, r7 + 8025c00: bd80 pop {r7, pc} + 8025c02: bf00 nop + 8025c04: 40004800 .word 0x40004800 + 8025c08: 58024400 .word 0x58024400 + 8025c0c: 58020c00 .word 0x58020c00 + 8025c10: 2400b76c .word 0x2400b76c + 8025c14: 40020088 .word 0x40020088 + 8025c18: 40011400 .word 0x40011400 + 8025c1c: 58020800 .word 0x58020800 + 8025c20: 2400b7e4 .word 0x2400b7e4 + 8025c24: 400200a0 .word 0x400200a0 + +08025c28 : + 8025c28: f8df d034 ldr.w sp, [pc, #52] ; 8025c60 + 8025c2c: f7fe feac bl 8024988 + 8025c30: 480c ldr r0, [pc, #48] ; (8025c64 ) + 8025c32: 490d ldr r1, [pc, #52] ; (8025c68 ) + 8025c34: 4a0d ldr r2, [pc, #52] ; (8025c6c ) + 8025c36: 2300 movs r3, #0 + 8025c38: e002 b.n 8025c40 + +08025c3a : + 8025c3a: 58d4 ldr r4, [r2, r3] + 8025c3c: 50c4 str r4, [r0, r3] + 8025c3e: 3304 adds r3, #4 + +08025c40 : + 8025c40: 18c4 adds r4, r0, r3 + 8025c42: 428c cmp r4, r1 + 8025c44: d3f9 bcc.n 8025c3a + 8025c46: 4a0a ldr r2, [pc, #40] ; (8025c70 ) + 8025c48: 4c0a ldr r4, [pc, #40] ; (8025c74 ) + 8025c4a: 2300 movs r3, #0 + 8025c4c: e001 b.n 8025c52 + +08025c4e : + 8025c4e: 6013 str r3, [r2, #0] + 8025c50: 3204 adds r2, #4 + +08025c52 : + 8025c52: 42a2 cmp r2, r4 + 8025c54: d3fb bcc.n 8025c4e + 8025c56: f01a fe49 bl 80408ec <__libc_init_array> + 8025c5a: f7fe f88d bl 8023d78
+ 8025c5e: 4770 bx lr + 8025c60: 24080000 .word 0x24080000 + 8025c64: 24000000 .word 0x24000000 + 8025c68: 240000dc .word 0x240000dc + 8025c6c: 08045880 .word 0x08045880 + 8025c70: 240000dc .word 0x240000dc + 8025c74: 2400eacc .word 0x2400eacc + +08025c78 : + 8025c78: e7fe b.n 8025c78 + +08025c7a : * @param ioctx: holds device IO functions. * @retval LAN8742_STATUS_OK if OK * LAN8742_STATUS_ERROR if missing mandatory function */ int32_t LAN8742_RegisterBusIO(lan8742_Object_t *pObj, lan8742_IOCtx_t *ioctx) { - 8025bf6: b480 push {r7} - 8025bf8: b083 sub sp, #12 - 8025bfa: af00 add r7, sp, #0 - 8025bfc: 6078 str r0, [r7, #4] - 8025bfe: 6039 str r1, [r7, #0] + 8025c7a: b480 push {r7} + 8025c7c: b083 sub sp, #12 + 8025c7e: af00 add r7, sp, #0 + 8025c80: 6078 str r0, [r7, #4] + 8025c82: 6039 str r1, [r7, #0] if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick) - 8025c00: 687b ldr r3, [r7, #4] - 8025c02: 2b00 cmp r3, #0 - 8025c04: d00b beq.n 8025c1e - 8025c06: 683b ldr r3, [r7, #0] - 8025c08: 68db ldr r3, [r3, #12] - 8025c0a: 2b00 cmp r3, #0 - 8025c0c: d007 beq.n 8025c1e - 8025c0e: 683b ldr r3, [r7, #0] - 8025c10: 689b ldr r3, [r3, #8] - 8025c12: 2b00 cmp r3, #0 - 8025c14: d003 beq.n 8025c1e - 8025c16: 683b ldr r3, [r7, #0] - 8025c18: 691b ldr r3, [r3, #16] - 8025c1a: 2b00 cmp r3, #0 - 8025c1c: d102 bne.n 8025c24 + 8025c84: 687b ldr r3, [r7, #4] + 8025c86: 2b00 cmp r3, #0 + 8025c88: d00b beq.n 8025ca2 + 8025c8a: 683b ldr r3, [r7, #0] + 8025c8c: 68db ldr r3, [r3, #12] + 8025c8e: 2b00 cmp r3, #0 + 8025c90: d007 beq.n 8025ca2 + 8025c92: 683b ldr r3, [r7, #0] + 8025c94: 689b ldr r3, [r3, #8] + 8025c96: 2b00 cmp r3, #0 + 8025c98: d003 beq.n 8025ca2 + 8025c9a: 683b ldr r3, [r7, #0] + 8025c9c: 691b ldr r3, [r3, #16] + 8025c9e: 2b00 cmp r3, #0 + 8025ca0: d102 bne.n 8025ca8 { return LAN8742_STATUS_ERROR; - 8025c1e: f04f 33ff mov.w r3, #4294967295 - 8025c22: e014 b.n 8025c4e + 8025ca2: f04f 33ff mov.w r3, #4294967295 + 8025ca6: e014 b.n 8025cd2 } pObj->IO.Init = ioctx->Init; - 8025c24: 683b ldr r3, [r7, #0] - 8025c26: 681a ldr r2, [r3, #0] - 8025c28: 687b ldr r3, [r7, #4] - 8025c2a: 609a str r2, [r3, #8] + 8025ca8: 683b ldr r3, [r7, #0] + 8025caa: 681a ldr r2, [r3, #0] + 8025cac: 687b ldr r3, [r7, #4] + 8025cae: 609a str r2, [r3, #8] pObj->IO.DeInit = ioctx->DeInit; - 8025c2c: 683b ldr r3, [r7, #0] - 8025c2e: 685a ldr r2, [r3, #4] - 8025c30: 687b ldr r3, [r7, #4] - 8025c32: 60da str r2, [r3, #12] + 8025cb0: 683b ldr r3, [r7, #0] + 8025cb2: 685a ldr r2, [r3, #4] + 8025cb4: 687b ldr r3, [r7, #4] + 8025cb6: 60da str r2, [r3, #12] pObj->IO.ReadReg = ioctx->ReadReg; - 8025c34: 683b ldr r3, [r7, #0] - 8025c36: 68da ldr r2, [r3, #12] - 8025c38: 687b ldr r3, [r7, #4] - 8025c3a: 615a str r2, [r3, #20] + 8025cb8: 683b ldr r3, [r7, #0] + 8025cba: 68da ldr r2, [r3, #12] + 8025cbc: 687b ldr r3, [r7, #4] + 8025cbe: 615a str r2, [r3, #20] pObj->IO.WriteReg = ioctx->WriteReg; - 8025c3c: 683b ldr r3, [r7, #0] - 8025c3e: 689a ldr r2, [r3, #8] - 8025c40: 687b ldr r3, [r7, #4] - 8025c42: 611a str r2, [r3, #16] + 8025cc0: 683b ldr r3, [r7, #0] + 8025cc2: 689a ldr r2, [r3, #8] + 8025cc4: 687b ldr r3, [r7, #4] + 8025cc6: 611a str r2, [r3, #16] pObj->IO.GetTick = ioctx->GetTick; - 8025c44: 683b ldr r3, [r7, #0] - 8025c46: 691a ldr r2, [r3, #16] - 8025c48: 687b ldr r3, [r7, #4] - 8025c4a: 619a str r2, [r3, #24] + 8025cc8: 683b ldr r3, [r7, #0] + 8025cca: 691a ldr r2, [r3, #16] + 8025ccc: 687b ldr r3, [r7, #4] + 8025cce: 619a str r2, [r3, #24] return LAN8742_STATUS_OK; - 8025c4c: 2300 movs r3, #0 + 8025cd0: 2300 movs r3, #0 } - 8025c4e: 4618 mov r0, r3 - 8025c50: 370c adds r7, #12 - 8025c52: 46bd mov sp, r7 - 8025c54: f85d 7b04 ldr.w r7, [sp], #4 - 8025c58: 4770 bx lr + 8025cd2: 4618 mov r0, r3 + 8025cd4: 370c adds r7, #12 + 8025cd6: 46bd mov sp, r7 + 8025cd8: f85d 7b04 ldr.w r7, [sp], #4 + 8025cdc: 4770 bx lr -08025c5a : +08025cde : * LAN8742_STATUS_READ_ERROR if connot read register * LAN8742_STATUS_WRITE_ERROR if connot write to register * LAN8742_STATUS_RESET_TIMEOUT if cannot perform a software reset */ int32_t LAN8742_Init(lan8742_Object_t *pObj) { - 8025c5a: b580 push {r7, lr} - 8025c5c: b086 sub sp, #24 - 8025c5e: af00 add r7, sp, #0 - 8025c60: 6078 str r0, [r7, #4] + 8025cde: b580 push {r7, lr} + 8025ce0: b086 sub sp, #24 + 8025ce2: af00 add r7, sp, #0 + 8025ce4: 6078 str r0, [r7, #4] uint32_t tickstart = 0, regvalue = 0, addr = 0; - 8025c62: 2300 movs r3, #0 - 8025c64: 60fb str r3, [r7, #12] - 8025c66: 2300 movs r3, #0 - 8025c68: 60bb str r3, [r7, #8] - 8025c6a: 2300 movs r3, #0 - 8025c6c: 617b str r3, [r7, #20] + 8025ce6: 2300 movs r3, #0 + 8025ce8: 60fb str r3, [r7, #12] + 8025cea: 2300 movs r3, #0 + 8025cec: 60bb str r3, [r7, #8] + 8025cee: 2300 movs r3, #0 + 8025cf0: 617b str r3, [r7, #20] int32_t status = LAN8742_STATUS_OK; - 8025c6e: 2300 movs r3, #0 - 8025c70: 613b str r3, [r7, #16] + 8025cf2: 2300 movs r3, #0 + 8025cf4: 613b str r3, [r7, #16] if(pObj->Is_Initialized == 0) - 8025c72: 687b ldr r3, [r7, #4] - 8025c74: 685b ldr r3, [r3, #4] - 8025c76: 2b00 cmp r3, #0 - 8025c78: d17c bne.n 8025d74 + 8025cf6: 687b ldr r3, [r7, #4] + 8025cf8: 685b ldr r3, [r3, #4] + 8025cfa: 2b00 cmp r3, #0 + 8025cfc: d17c bne.n 8025df8 { if(pObj->IO.Init != 0) - 8025c7a: 687b ldr r3, [r7, #4] - 8025c7c: 689b ldr r3, [r3, #8] - 8025c7e: 2b00 cmp r3, #0 - 8025c80: d002 beq.n 8025c88 + 8025cfe: 687b ldr r3, [r7, #4] + 8025d00: 689b ldr r3, [r3, #8] + 8025d02: 2b00 cmp r3, #0 + 8025d04: d002 beq.n 8025d0c { /* GPIO and Clocks initialization */ pObj->IO.Init(); - 8025c82: 687b ldr r3, [r7, #4] - 8025c84: 689b ldr r3, [r3, #8] - 8025c86: 4798 blx r3 + 8025d06: 687b ldr r3, [r7, #4] + 8025d08: 689b ldr r3, [r3, #8] + 8025d0a: 4798 blx r3 } /* for later check */ pObj->DevAddr = LAN8742_MAX_DEV_ADDR + 1; - 8025c88: 687b ldr r3, [r7, #4] - 8025c8a: 2220 movs r2, #32 - 8025c8c: 601a str r2, [r3, #0] + 8025d0c: 687b ldr r3, [r7, #4] + 8025d0e: 2220 movs r2, #32 + 8025d10: 601a str r2, [r3, #0] /* Get the device address from special mode register */ for(addr = 0; addr <= LAN8742_MAX_DEV_ADDR; addr ++) - 8025c8e: 2300 movs r3, #0 - 8025c90: 617b str r3, [r7, #20] - 8025c92: e01c b.n 8025cce + 8025d12: 2300 movs r3, #0 + 8025d14: 617b str r3, [r7, #20] + 8025d16: e01c b.n 8025d52 { if(pObj->IO.ReadReg(addr, LAN8742_SMR, ®value) < 0) - 8025c94: 687b ldr r3, [r7, #4] - 8025c96: 695b ldr r3, [r3, #20] - 8025c98: f107 0208 add.w r2, r7, #8 - 8025c9c: 2112 movs r1, #18 - 8025c9e: 6978 ldr r0, [r7, #20] - 8025ca0: 4798 blx r3 - 8025ca2: 4603 mov r3, r0 - 8025ca4: 2b00 cmp r3, #0 - 8025ca6: da03 bge.n 8025cb0 + 8025d18: 687b ldr r3, [r7, #4] + 8025d1a: 695b ldr r3, [r3, #20] + 8025d1c: f107 0208 add.w r2, r7, #8 + 8025d20: 2112 movs r1, #18 + 8025d22: 6978 ldr r0, [r7, #20] + 8025d24: 4798 blx r3 + 8025d26: 4603 mov r3, r0 + 8025d28: 2b00 cmp r3, #0 + 8025d2a: da03 bge.n 8025d34 { status = LAN8742_STATUS_READ_ERROR; - 8025ca8: f06f 0304 mvn.w r3, #4 - 8025cac: 613b str r3, [r7, #16] + 8025d2c: f06f 0304 mvn.w r3, #4 + 8025d30: 613b str r3, [r7, #16] /* Can't read from this device address continue with next address */ continue; - 8025cae: e00b b.n 8025cc8 + 8025d32: e00b b.n 8025d4c } if((regvalue & LAN8742_SMR_PHY_ADDR) == addr) - 8025cb0: 68bb ldr r3, [r7, #8] - 8025cb2: f003 031f and.w r3, r3, #31 - 8025cb6: 697a ldr r2, [r7, #20] - 8025cb8: 429a cmp r2, r3 - 8025cba: d105 bne.n 8025cc8 + 8025d34: 68bb ldr r3, [r7, #8] + 8025d36: f003 031f and.w r3, r3, #31 + 8025d3a: 697a ldr r2, [r7, #20] + 8025d3c: 429a cmp r2, r3 + 8025d3e: d105 bne.n 8025d4c { pObj->DevAddr = addr; - 8025cbc: 687b ldr r3, [r7, #4] - 8025cbe: 697a ldr r2, [r7, #20] - 8025cc0: 601a str r2, [r3, #0] + 8025d40: 687b ldr r3, [r7, #4] + 8025d42: 697a ldr r2, [r7, #20] + 8025d44: 601a str r2, [r3, #0] status = LAN8742_STATUS_OK; - 8025cc2: 2300 movs r3, #0 - 8025cc4: 613b str r3, [r7, #16] + 8025d46: 2300 movs r3, #0 + 8025d48: 613b str r3, [r7, #16] break; - 8025cc6: e005 b.n 8025cd4 + 8025d4a: e005 b.n 8025d58 for(addr = 0; addr <= LAN8742_MAX_DEV_ADDR; addr ++) - 8025cc8: 697b ldr r3, [r7, #20] - 8025cca: 3301 adds r3, #1 - 8025ccc: 617b str r3, [r7, #20] - 8025cce: 697b ldr r3, [r7, #20] - 8025cd0: 2b1f cmp r3, #31 - 8025cd2: d9df bls.n 8025c94 + 8025d4c: 697b ldr r3, [r7, #20] + 8025d4e: 3301 adds r3, #1 + 8025d50: 617b str r3, [r7, #20] + 8025d52: 697b ldr r3, [r7, #20] + 8025d54: 2b1f cmp r3, #31 + 8025d56: d9df bls.n 8025d18 } } if(pObj->DevAddr > LAN8742_MAX_DEV_ADDR) - 8025cd4: 687b ldr r3, [r7, #4] - 8025cd6: 681b ldr r3, [r3, #0] - 8025cd8: 2b1f cmp r3, #31 - 8025cda: d902 bls.n 8025ce2 + 8025d58: 687b ldr r3, [r7, #4] + 8025d5a: 681b ldr r3, [r3, #0] + 8025d5c: 2b1f cmp r3, #31 + 8025d5e: d902 bls.n 8025d66 { status = LAN8742_STATUS_ADDRESS_ERROR; - 8025cdc: f06f 0302 mvn.w r3, #2 - 8025ce0: 613b str r3, [r7, #16] + 8025d60: f06f 0302 mvn.w r3, #2 + 8025d64: 613b str r3, [r7, #16] } /* if device address is matched */ if(status == LAN8742_STATUS_OK) - 8025ce2: 693b ldr r3, [r7, #16] - 8025ce4: 2b00 cmp r3, #0 - 8025ce6: d145 bne.n 8025d74 + 8025d66: 693b ldr r3, [r7, #16] + 8025d68: 2b00 cmp r3, #0 + 8025d6a: d145 bne.n 8025df8 { /* set a software reset */ if(pObj->IO.WriteReg(pObj->DevAddr, LAN8742_BCR, LAN8742_BCR_SOFT_RESET) >= 0) - 8025ce8: 687b ldr r3, [r7, #4] - 8025cea: 691b ldr r3, [r3, #16] - 8025cec: 687a ldr r2, [r7, #4] - 8025cee: 6810 ldr r0, [r2, #0] - 8025cf0: f44f 4200 mov.w r2, #32768 ; 0x8000 - 8025cf4: 2100 movs r1, #0 - 8025cf6: 4798 blx r3 - 8025cf8: 4603 mov r3, r0 - 8025cfa: 2b00 cmp r3, #0 - 8025cfc: db37 blt.n 8025d6e + 8025d6c: 687b ldr r3, [r7, #4] + 8025d6e: 691b ldr r3, [r3, #16] + 8025d70: 687a ldr r2, [r7, #4] + 8025d72: 6810 ldr r0, [r2, #0] + 8025d74: f44f 4200 mov.w r2, #32768 ; 0x8000 + 8025d78: 2100 movs r1, #0 + 8025d7a: 4798 blx r3 + 8025d7c: 4603 mov r3, r0 + 8025d7e: 2b00 cmp r3, #0 + 8025d80: db37 blt.n 8025df2 { /* get software reset status */ if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BCR, ®value) >= 0) - 8025cfe: 687b ldr r3, [r7, #4] - 8025d00: 695b ldr r3, [r3, #20] - 8025d02: 687a ldr r2, [r7, #4] - 8025d04: 6810 ldr r0, [r2, #0] - 8025d06: f107 0208 add.w r2, r7, #8 - 8025d0a: 2100 movs r1, #0 - 8025d0c: 4798 blx r3 - 8025d0e: 4603 mov r3, r0 - 8025d10: 2b00 cmp r3, #0 - 8025d12: db28 blt.n 8025d66 + 8025d82: 687b ldr r3, [r7, #4] + 8025d84: 695b ldr r3, [r3, #20] + 8025d86: 687a ldr r2, [r7, #4] + 8025d88: 6810 ldr r0, [r2, #0] + 8025d8a: f107 0208 add.w r2, r7, #8 + 8025d8e: 2100 movs r1, #0 + 8025d90: 4798 blx r3 + 8025d92: 4603 mov r3, r0 + 8025d94: 2b00 cmp r3, #0 + 8025d96: db28 blt.n 8025dea { tickstart = pObj->IO.GetTick(); - 8025d14: 687b ldr r3, [r7, #4] - 8025d16: 699b ldr r3, [r3, #24] - 8025d18: 4798 blx r3 - 8025d1a: 4603 mov r3, r0 - 8025d1c: 60fb str r3, [r7, #12] + 8025d98: 687b ldr r3, [r7, #4] + 8025d9a: 699b ldr r3, [r3, #24] + 8025d9c: 4798 blx r3 + 8025d9e: 4603 mov r3, r0 + 8025da0: 60fb str r3, [r7, #12] /* wait until software reset is done or timeout occured */ while(regvalue & LAN8742_BCR_SOFT_RESET) - 8025d1e: e01c b.n 8025d5a + 8025da2: e01c b.n 8025dde { if((pObj->IO.GetTick() - tickstart) <= LAN8742_SW_RESET_TO) - 8025d20: 687b ldr r3, [r7, #4] - 8025d22: 699b ldr r3, [r3, #24] - 8025d24: 4798 blx r3 - 8025d26: 4603 mov r3, r0 - 8025d28: 461a mov r2, r3 - 8025d2a: 68fb ldr r3, [r7, #12] - 8025d2c: 1ad3 subs r3, r2, r3 - 8025d2e: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 - 8025d32: d80e bhi.n 8025d52 + 8025da4: 687b ldr r3, [r7, #4] + 8025da6: 699b ldr r3, [r3, #24] + 8025da8: 4798 blx r3 + 8025daa: 4603 mov r3, r0 + 8025dac: 461a mov r2, r3 + 8025dae: 68fb ldr r3, [r7, #12] + 8025db0: 1ad3 subs r3, r2, r3 + 8025db2: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 + 8025db6: d80e bhi.n 8025dd6 { if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BCR, ®value) < 0) - 8025d34: 687b ldr r3, [r7, #4] - 8025d36: 695b ldr r3, [r3, #20] - 8025d38: 687a ldr r2, [r7, #4] - 8025d3a: 6810 ldr r0, [r2, #0] - 8025d3c: f107 0208 add.w r2, r7, #8 - 8025d40: 2100 movs r1, #0 - 8025d42: 4798 blx r3 - 8025d44: 4603 mov r3, r0 - 8025d46: 2b00 cmp r3, #0 - 8025d48: da07 bge.n 8025d5a + 8025db8: 687b ldr r3, [r7, #4] + 8025dba: 695b ldr r3, [r3, #20] + 8025dbc: 687a ldr r2, [r7, #4] + 8025dbe: 6810 ldr r0, [r2, #0] + 8025dc0: f107 0208 add.w r2, r7, #8 + 8025dc4: 2100 movs r1, #0 + 8025dc6: 4798 blx r3 + 8025dc8: 4603 mov r3, r0 + 8025dca: 2b00 cmp r3, #0 + 8025dcc: da07 bge.n 8025dde { status = LAN8742_STATUS_READ_ERROR; - 8025d4a: f06f 0304 mvn.w r3, #4 - 8025d4e: 613b str r3, [r7, #16] + 8025dce: f06f 0304 mvn.w r3, #4 + 8025dd2: 613b str r3, [r7, #16] break; - 8025d50: e010 b.n 8025d74 + 8025dd4: e010 b.n 8025df8 } } else { status = LAN8742_STATUS_RESET_TIMEOUT; - 8025d52: f06f 0301 mvn.w r3, #1 - 8025d56: 613b str r3, [r7, #16] + 8025dd6: f06f 0301 mvn.w r3, #1 + 8025dda: 613b str r3, [r7, #16] break; - 8025d58: e00c b.n 8025d74 + 8025ddc: e00c b.n 8025df8 while(regvalue & LAN8742_BCR_SOFT_RESET) - 8025d5a: 68bb ldr r3, [r7, #8] - 8025d5c: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8025d60: 2b00 cmp r3, #0 - 8025d62: d1dd bne.n 8025d20 - 8025d64: e006 b.n 8025d74 + 8025dde: 68bb ldr r3, [r7, #8] + 8025de0: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 8025de4: 2b00 cmp r3, #0 + 8025de6: d1dd bne.n 8025da4 + 8025de8: e006 b.n 8025df8 } } } else { status = LAN8742_STATUS_READ_ERROR; - 8025d66: f06f 0304 mvn.w r3, #4 - 8025d6a: 613b str r3, [r7, #16] - 8025d6c: e002 b.n 8025d74 + 8025dea: f06f 0304 mvn.w r3, #4 + 8025dee: 613b str r3, [r7, #16] + 8025df0: e002 b.n 8025df8 } } else { status = LAN8742_STATUS_WRITE_ERROR; - 8025d6e: f06f 0303 mvn.w r3, #3 - 8025d72: 613b str r3, [r7, #16] + 8025df2: f06f 0303 mvn.w r3, #3 + 8025df6: 613b str r3, [r7, #16] } } } if(status == LAN8742_STATUS_OK) - 8025d74: 693b ldr r3, [r7, #16] - 8025d76: 2b00 cmp r3, #0 - 8025d78: d112 bne.n 8025da0 + 8025df8: 693b ldr r3, [r7, #16] + 8025dfa: 2b00 cmp r3, #0 + 8025dfc: d112 bne.n 8025e24 { tickstart = pObj->IO.GetTick(); - 8025d7a: 687b ldr r3, [r7, #4] - 8025d7c: 699b ldr r3, [r3, #24] - 8025d7e: 4798 blx r3 - 8025d80: 4603 mov r3, r0 - 8025d82: 60fb str r3, [r7, #12] + 8025dfe: 687b ldr r3, [r7, #4] + 8025e00: 699b ldr r3, [r3, #24] + 8025e02: 4798 blx r3 + 8025e04: 4603 mov r3, r0 + 8025e06: 60fb str r3, [r7, #12] /* Wait for 2s to perform initialization */ while((pObj->IO.GetTick() - tickstart) <= LAN8742_INIT_TO) - 8025d84: bf00 nop - 8025d86: 687b ldr r3, [r7, #4] - 8025d88: 699b ldr r3, [r3, #24] - 8025d8a: 4798 blx r3 - 8025d8c: 4603 mov r3, r0 - 8025d8e: 461a mov r2, r3 - 8025d90: 68fb ldr r3, [r7, #12] - 8025d92: 1ad3 subs r3, r2, r3 - 8025d94: f5b3 6ffa cmp.w r3, #2000 ; 0x7d0 - 8025d98: d9f5 bls.n 8025d86 + 8025e08: bf00 nop + 8025e0a: 687b ldr r3, [r7, #4] + 8025e0c: 699b ldr r3, [r3, #24] + 8025e0e: 4798 blx r3 + 8025e10: 4603 mov r3, r0 + 8025e12: 461a mov r2, r3 + 8025e14: 68fb ldr r3, [r7, #12] + 8025e16: 1ad3 subs r3, r2, r3 + 8025e18: f5b3 6ffa cmp.w r3, #2000 ; 0x7d0 + 8025e1c: d9f5 bls.n 8025e0a { } pObj->Is_Initialized = 1; - 8025d9a: 687b ldr r3, [r7, #4] - 8025d9c: 2201 movs r2, #1 - 8025d9e: 605a str r2, [r3, #4] + 8025e1e: 687b ldr r3, [r7, #4] + 8025e20: 2201 movs r2, #1 + 8025e22: 605a str r2, [r3, #4] } return status; - 8025da0: 693b ldr r3, [r7, #16] + 8025e24: 693b ldr r3, [r7, #16] } - 8025da2: 4618 mov r0, r3 - 8025da4: 3718 adds r7, #24 - 8025da6: 46bd mov sp, r7 - 8025da8: bd80 pop {r7, pc} + 8025e26: 4618 mov r0, r3 + 8025e28: 3718 adds r7, #24 + 8025e2a: 46bd mov sp, r7 + 8025e2c: bd80 pop {r7, pc} -08025daa : +08025e2e : * LAN8742_STATUS_10MBITS_HALFDUPLEX if 10Mb/s HD * LAN8742_STATUS_READ_ERROR if connot read register * LAN8742_STATUS_WRITE_ERROR if connot write to register */ int32_t LAN8742_GetLinkState(lan8742_Object_t *pObj) { - 8025daa: b580 push {r7, lr} - 8025dac: b084 sub sp, #16 - 8025dae: af00 add r7, sp, #0 - 8025db0: 6078 str r0, [r7, #4] + 8025e2e: b580 push {r7, lr} + 8025e30: b084 sub sp, #16 + 8025e32: af00 add r7, sp, #0 + 8025e34: 6078 str r0, [r7, #4] uint32_t readval = 0; - 8025db2: 2300 movs r3, #0 - 8025db4: 60fb str r3, [r7, #12] + 8025e36: 2300 movs r3, #0 + 8025e38: 60fb str r3, [r7, #12] /* Read Status register */ if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BSR, &readval) < 0) - 8025db6: 687b ldr r3, [r7, #4] - 8025db8: 695b ldr r3, [r3, #20] - 8025dba: 687a ldr r2, [r7, #4] - 8025dbc: 6810 ldr r0, [r2, #0] - 8025dbe: f107 020c add.w r2, r7, #12 - 8025dc2: 2101 movs r1, #1 - 8025dc4: 4798 blx r3 - 8025dc6: 4603 mov r3, r0 - 8025dc8: 2b00 cmp r3, #0 - 8025dca: da02 bge.n 8025dd2 + 8025e3a: 687b ldr r3, [r7, #4] + 8025e3c: 695b ldr r3, [r3, #20] + 8025e3e: 687a ldr r2, [r7, #4] + 8025e40: 6810 ldr r0, [r2, #0] + 8025e42: f107 020c add.w r2, r7, #12 + 8025e46: 2101 movs r1, #1 + 8025e48: 4798 blx r3 + 8025e4a: 4603 mov r3, r0 + 8025e4c: 2b00 cmp r3, #0 + 8025e4e: da02 bge.n 8025e56 { return LAN8742_STATUS_READ_ERROR; - 8025dcc: f06f 0304 mvn.w r3, #4 - 8025dd0: e06e b.n 8025eb0 + 8025e50: f06f 0304 mvn.w r3, #4 + 8025e54: e06e b.n 8025f34 } /* Read Status register again */ if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BSR, &readval) < 0) - 8025dd2: 687b ldr r3, [r7, #4] - 8025dd4: 695b ldr r3, [r3, #20] - 8025dd6: 687a ldr r2, [r7, #4] - 8025dd8: 6810 ldr r0, [r2, #0] - 8025dda: f107 020c add.w r2, r7, #12 - 8025dde: 2101 movs r1, #1 - 8025de0: 4798 blx r3 - 8025de2: 4603 mov r3, r0 - 8025de4: 2b00 cmp r3, #0 - 8025de6: da02 bge.n 8025dee + 8025e56: 687b ldr r3, [r7, #4] + 8025e58: 695b ldr r3, [r3, #20] + 8025e5a: 687a ldr r2, [r7, #4] + 8025e5c: 6810 ldr r0, [r2, #0] + 8025e5e: f107 020c add.w r2, r7, #12 + 8025e62: 2101 movs r1, #1 + 8025e64: 4798 blx r3 + 8025e66: 4603 mov r3, r0 + 8025e68: 2b00 cmp r3, #0 + 8025e6a: da02 bge.n 8025e72 { return LAN8742_STATUS_READ_ERROR; - 8025de8: f06f 0304 mvn.w r3, #4 - 8025dec: e060 b.n 8025eb0 + 8025e6c: f06f 0304 mvn.w r3, #4 + 8025e70: e060 b.n 8025f34 } if((readval & LAN8742_BSR_LINK_STATUS) == 0) - 8025dee: 68fb ldr r3, [r7, #12] - 8025df0: f003 0304 and.w r3, r3, #4 - 8025df4: 2b00 cmp r3, #0 - 8025df6: d101 bne.n 8025dfc + 8025e72: 68fb ldr r3, [r7, #12] + 8025e74: f003 0304 and.w r3, r3, #4 + 8025e78: 2b00 cmp r3, #0 + 8025e7a: d101 bne.n 8025e80 { /* Return Link Down status */ return LAN8742_STATUS_LINK_DOWN; - 8025df8: 2301 movs r3, #1 - 8025dfa: e059 b.n 8025eb0 + 8025e7c: 2301 movs r3, #1 + 8025e7e: e059 b.n 8025f34 } /* Check Auto negotiaition */ if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_BCR, &readval) < 0) - 8025dfc: 687b ldr r3, [r7, #4] - 8025dfe: 695b ldr r3, [r3, #20] - 8025e00: 687a ldr r2, [r7, #4] - 8025e02: 6810 ldr r0, [r2, #0] - 8025e04: f107 020c add.w r2, r7, #12 - 8025e08: 2100 movs r1, #0 - 8025e0a: 4798 blx r3 - 8025e0c: 4603 mov r3, r0 - 8025e0e: 2b00 cmp r3, #0 - 8025e10: da02 bge.n 8025e18 + 8025e80: 687b ldr r3, [r7, #4] + 8025e82: 695b ldr r3, [r3, #20] + 8025e84: 687a ldr r2, [r7, #4] + 8025e86: 6810 ldr r0, [r2, #0] + 8025e88: f107 020c add.w r2, r7, #12 + 8025e8c: 2100 movs r1, #0 + 8025e8e: 4798 blx r3 + 8025e90: 4603 mov r3, r0 + 8025e92: 2b00 cmp r3, #0 + 8025e94: da02 bge.n 8025e9c { return LAN8742_STATUS_READ_ERROR; - 8025e12: f06f 0304 mvn.w r3, #4 - 8025e16: e04b b.n 8025eb0 + 8025e96: f06f 0304 mvn.w r3, #4 + 8025e9a: e04b b.n 8025f34 } if((readval & LAN8742_BCR_AUTONEGO_EN) != LAN8742_BCR_AUTONEGO_EN) - 8025e18: 68fb ldr r3, [r7, #12] - 8025e1a: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8025e1e: 2b00 cmp r3, #0 - 8025e20: d11b bne.n 8025e5a + 8025e9c: 68fb ldr r3, [r7, #12] + 8025e9e: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8025ea2: 2b00 cmp r3, #0 + 8025ea4: d11b bne.n 8025ede { if(((readval & LAN8742_BCR_SPEED_SELECT) == LAN8742_BCR_SPEED_SELECT) && ((readval & LAN8742_BCR_DUPLEX_MODE) == LAN8742_BCR_DUPLEX_MODE)) - 8025e22: 68fb ldr r3, [r7, #12] - 8025e24: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 8025e28: 2b00 cmp r3, #0 - 8025e2a: d006 beq.n 8025e3a - 8025e2c: 68fb ldr r3, [r7, #12] - 8025e2e: f403 7380 and.w r3, r3, #256 ; 0x100 - 8025e32: 2b00 cmp r3, #0 - 8025e34: d001 beq.n 8025e3a + 8025ea6: 68fb ldr r3, [r7, #12] + 8025ea8: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 8025eac: 2b00 cmp r3, #0 + 8025eae: d006 beq.n 8025ebe + 8025eb0: 68fb ldr r3, [r7, #12] + 8025eb2: f403 7380 and.w r3, r3, #256 ; 0x100 + 8025eb6: 2b00 cmp r3, #0 + 8025eb8: d001 beq.n 8025ebe { return LAN8742_STATUS_100MBITS_FULLDUPLEX; - 8025e36: 2302 movs r3, #2 - 8025e38: e03a b.n 8025eb0 + 8025eba: 2302 movs r3, #2 + 8025ebc: e03a b.n 8025f34 } else if ((readval & LAN8742_BCR_SPEED_SELECT) == LAN8742_BCR_SPEED_SELECT) - 8025e3a: 68fb ldr r3, [r7, #12] - 8025e3c: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 8025e40: 2b00 cmp r3, #0 - 8025e42: d001 beq.n 8025e48 + 8025ebe: 68fb ldr r3, [r7, #12] + 8025ec0: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 8025ec4: 2b00 cmp r3, #0 + 8025ec6: d001 beq.n 8025ecc { return LAN8742_STATUS_100MBITS_HALFDUPLEX; - 8025e44: 2303 movs r3, #3 - 8025e46: e033 b.n 8025eb0 + 8025ec8: 2303 movs r3, #3 + 8025eca: e033 b.n 8025f34 } else if ((readval & LAN8742_BCR_DUPLEX_MODE) == LAN8742_BCR_DUPLEX_MODE) - 8025e48: 68fb ldr r3, [r7, #12] - 8025e4a: f403 7380 and.w r3, r3, #256 ; 0x100 - 8025e4e: 2b00 cmp r3, #0 - 8025e50: d001 beq.n 8025e56 + 8025ecc: 68fb ldr r3, [r7, #12] + 8025ece: f403 7380 and.w r3, r3, #256 ; 0x100 + 8025ed2: 2b00 cmp r3, #0 + 8025ed4: d001 beq.n 8025eda { return LAN8742_STATUS_10MBITS_FULLDUPLEX; - 8025e52: 2304 movs r3, #4 - 8025e54: e02c b.n 8025eb0 + 8025ed6: 2304 movs r3, #4 + 8025ed8: e02c b.n 8025f34 } else { return LAN8742_STATUS_10MBITS_HALFDUPLEX; - 8025e56: 2305 movs r3, #5 - 8025e58: e02a b.n 8025eb0 + 8025eda: 2305 movs r3, #5 + 8025edc: e02a b.n 8025f34 } } else /* Auto Nego enabled */ { if(pObj->IO.ReadReg(pObj->DevAddr, LAN8742_PHYSCSR, &readval) < 0) - 8025e5a: 687b ldr r3, [r7, #4] - 8025e5c: 695b ldr r3, [r3, #20] - 8025e5e: 687a ldr r2, [r7, #4] - 8025e60: 6810 ldr r0, [r2, #0] - 8025e62: f107 020c add.w r2, r7, #12 - 8025e66: 211f movs r1, #31 - 8025e68: 4798 blx r3 - 8025e6a: 4603 mov r3, r0 - 8025e6c: 2b00 cmp r3, #0 - 8025e6e: da02 bge.n 8025e76 + 8025ede: 687b ldr r3, [r7, #4] + 8025ee0: 695b ldr r3, [r3, #20] + 8025ee2: 687a ldr r2, [r7, #4] + 8025ee4: 6810 ldr r0, [r2, #0] + 8025ee6: f107 020c add.w r2, r7, #12 + 8025eea: 211f movs r1, #31 + 8025eec: 4798 blx r3 + 8025eee: 4603 mov r3, r0 + 8025ef0: 2b00 cmp r3, #0 + 8025ef2: da02 bge.n 8025efa { return LAN8742_STATUS_READ_ERROR; - 8025e70: f06f 0304 mvn.w r3, #4 - 8025e74: e01c b.n 8025eb0 + 8025ef4: f06f 0304 mvn.w r3, #4 + 8025ef8: e01c b.n 8025f34 } /* Check if auto nego not done */ if((readval & LAN8742_PHYSCSR_AUTONEGO_DONE) == 0) - 8025e76: 68fb ldr r3, [r7, #12] - 8025e78: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8025e7c: 2b00 cmp r3, #0 - 8025e7e: d101 bne.n 8025e84 + 8025efa: 68fb ldr r3, [r7, #12] + 8025efc: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8025f00: 2b00 cmp r3, #0 + 8025f02: d101 bne.n 8025f08 { return LAN8742_STATUS_AUTONEGO_NOTDONE; - 8025e80: 2306 movs r3, #6 - 8025e82: e015 b.n 8025eb0 + 8025f04: 2306 movs r3, #6 + 8025f06: e015 b.n 8025f34 } if((readval & LAN8742_PHYSCSR_HCDSPEEDMASK) == LAN8742_PHYSCSR_100BTX_FD) - 8025e84: 68fb ldr r3, [r7, #12] - 8025e86: f003 031c and.w r3, r3, #28 - 8025e8a: 2b18 cmp r3, #24 - 8025e8c: d101 bne.n 8025e92 + 8025f08: 68fb ldr r3, [r7, #12] + 8025f0a: f003 031c and.w r3, r3, #28 + 8025f0e: 2b18 cmp r3, #24 + 8025f10: d101 bne.n 8025f16 { return LAN8742_STATUS_100MBITS_FULLDUPLEX; - 8025e8e: 2302 movs r3, #2 - 8025e90: e00e b.n 8025eb0 + 8025f12: 2302 movs r3, #2 + 8025f14: e00e b.n 8025f34 } else if ((readval & LAN8742_PHYSCSR_HCDSPEEDMASK) == LAN8742_PHYSCSR_100BTX_HD) - 8025e92: 68fb ldr r3, [r7, #12] - 8025e94: f003 031c and.w r3, r3, #28 - 8025e98: 2b08 cmp r3, #8 - 8025e9a: d101 bne.n 8025ea0 + 8025f16: 68fb ldr r3, [r7, #12] + 8025f18: f003 031c and.w r3, r3, #28 + 8025f1c: 2b08 cmp r3, #8 + 8025f1e: d101 bne.n 8025f24 { return LAN8742_STATUS_100MBITS_HALFDUPLEX; - 8025e9c: 2303 movs r3, #3 - 8025e9e: e007 b.n 8025eb0 + 8025f20: 2303 movs r3, #3 + 8025f22: e007 b.n 8025f34 } else if ((readval & LAN8742_PHYSCSR_HCDSPEEDMASK) == LAN8742_PHYSCSR_10BT_FD) - 8025ea0: 68fb ldr r3, [r7, #12] - 8025ea2: f003 031c and.w r3, r3, #28 - 8025ea6: 2b14 cmp r3, #20 - 8025ea8: d101 bne.n 8025eae + 8025f24: 68fb ldr r3, [r7, #12] + 8025f26: f003 031c and.w r3, r3, #28 + 8025f2a: 2b14 cmp r3, #20 + 8025f2c: d101 bne.n 8025f32 { return LAN8742_STATUS_10MBITS_FULLDUPLEX; - 8025eaa: 2304 movs r3, #4 - 8025eac: e000 b.n 8025eb0 + 8025f2e: 2304 movs r3, #4 + 8025f30: e000 b.n 8025f34 } else { return LAN8742_STATUS_10MBITS_HALFDUPLEX; - 8025eae: 2305 movs r3, #5 + 8025f32: 2305 movs r3, #5 } } } - 8025eb0: 4618 mov r0, r3 - 8025eb2: 3710 adds r7, #16 - 8025eb4: 46bd mov sp, r7 - 8025eb6: bd80 pop {r7, pc} + 8025f34: 4618 mov r0, r3 + 8025f36: 3710 adds r7, #16 + 8025f38: 46bd mov sp, r7 + 8025f3a: bd80 pop {r7, pc} -08025eb8 : +08025f3c : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8025eb8: b580 push {r7, lr} - 8025eba: b082 sub sp, #8 - 8025ebc: af00 add r7, sp, #0 + 8025f3c: b580 push {r7, lr} + 8025f3e: b082 sub sp, #8 + 8025f40: af00 add r7, sp, #0 __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL); /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */ __HAL_ART_ENABLE(); /* Enable the Cortex-M4 ART */ #endif /* DUAL_CORE && CORE_CM4 */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8025ebe: 2003 movs r0, #3 - 8025ec0: f001 fd74 bl 80279ac + 8025f42: 2003 movs r0, #3 + 8025f44: f001 fd74 bl 8027a30 /* Update the SystemCoreClock global variable */ #if defined(RCC_D1CFGR_D1CPRE) common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU); - 8025ec4: f009 fd9e bl 802fa04 - 8025ec8: 4602 mov r2, r0 - 8025eca: 4b15 ldr r3, [pc, #84] ; (8025f20 ) - 8025ecc: 699b ldr r3, [r3, #24] - 8025ece: 0a1b lsrs r3, r3, #8 - 8025ed0: f003 030f and.w r3, r3, #15 - 8025ed4: 4913 ldr r1, [pc, #76] ; (8025f24 ) - 8025ed6: 5ccb ldrb r3, [r1, r3] - 8025ed8: f003 031f and.w r3, r3, #31 - 8025edc: fa22 f303 lsr.w r3, r2, r3 - 8025ee0: 607b str r3, [r7, #4] + 8025f48: f009 fd9e bl 802fa88 + 8025f4c: 4602 mov r2, r0 + 8025f4e: 4b15 ldr r3, [pc, #84] ; (8025fa4 ) + 8025f50: 699b ldr r3, [r3, #24] + 8025f52: 0a1b lsrs r3, r3, #8 + 8025f54: f003 030f and.w r3, r3, #15 + 8025f58: 4913 ldr r1, [pc, #76] ; (8025fa8 ) + 8025f5a: 5ccb ldrb r3, [r1, r3] + 8025f5c: f003 031f and.w r3, r3, #31 + 8025f60: fa22 f303 lsr.w r3, r2, r3 + 8025f64: 607b str r3, [r7, #4] common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU); #endif /* Update the SystemD2Clock global variable */ #if defined(RCC_D1CFGR_HPRE) SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); - 8025ee2: 4b0f ldr r3, [pc, #60] ; (8025f20 ) - 8025ee4: 699b ldr r3, [r3, #24] - 8025ee6: f003 030f and.w r3, r3, #15 - 8025eea: 4a0e ldr r2, [pc, #56] ; (8025f24 ) - 8025eec: 5cd3 ldrb r3, [r2, r3] - 8025eee: f003 031f and.w r3, r3, #31 - 8025ef2: 687a ldr r2, [r7, #4] - 8025ef4: fa22 f303 lsr.w r3, r2, r3 - 8025ef8: 4a0b ldr r2, [pc, #44] ; (8025f28 ) - 8025efa: 6013 str r3, [r2, #0] + 8025f66: 4b0f ldr r3, [pc, #60] ; (8025fa4 ) + 8025f68: 699b ldr r3, [r3, #24] + 8025f6a: f003 030f and.w r3, r3, #15 + 8025f6e: 4a0e ldr r2, [pc, #56] ; (8025fa8 ) + 8025f70: 5cd3 ldrb r3, [r2, r3] + 8025f72: f003 031f and.w r3, r3, #31 + 8025f76: 687a ldr r2, [r7, #4] + 8025f78: fa22 f303 lsr.w r3, r2, r3 + 8025f7c: 4a0b ldr r2, [pc, #44] ; (8025fac ) + 8025f7e: 6013 str r3, [r2, #0] #endif #if defined(DUAL_CORE) && defined(CORE_CM4) SystemCoreClock = SystemD2Clock; #else SystemCoreClock = common_system_clock; - 8025efc: 4a0b ldr r2, [pc, #44] ; (8025f2c ) - 8025efe: 687b ldr r3, [r7, #4] - 8025f00: 6013 str r3, [r2, #0] + 8025f80: 4a0b ldr r2, [pc, #44] ; (8025fb0 ) + 8025f82: 687b ldr r3, [r7, #4] + 8025f84: 6013 str r3, [r2, #0] #endif /* DUAL_CORE && CORE_CM4 */ /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - 8025f02: 200f movs r0, #15 - 8025f04: f000 f814 bl 8025f30 - 8025f08: 4603 mov r3, r0 - 8025f0a: 2b00 cmp r3, #0 - 8025f0c: d001 beq.n 8025f12 + 8025f86: 200f movs r0, #15 + 8025f88: f000 f814 bl 8025fb4 + 8025f8c: 4603 mov r3, r0 + 8025f8e: 2b00 cmp r3, #0 + 8025f90: d001 beq.n 8025f96 { return HAL_ERROR; - 8025f0e: 2301 movs r3, #1 - 8025f10: e002 b.n 8025f18 + 8025f92: 2301 movs r3, #1 + 8025f94: e002 b.n 8025f9c } /* Init the low level hardware */ HAL_MspInit(); - 8025f12: f7fe faf9 bl 8024508 + 8025f96: f7fe faf9 bl 802458c /* Return function status */ return HAL_OK; - 8025f16: 2300 movs r3, #0 -} - 8025f18: 4618 mov r0, r3 - 8025f1a: 3708 adds r7, #8 - 8025f1c: 46bd mov sp, r7 - 8025f1e: bd80 pop {r7, pc} - 8025f20: 58024400 .word 0x58024400 - 8025f24: 08044cd4 .word 0x08044cd4 - 8025f28: 2400004c .word 0x2400004c - 8025f2c: 24000048 .word 0x24000048 - -08025f30 : + 8025f9a: 2300 movs r3, #0 +} + 8025f9c: 4618 mov r0, r3 + 8025f9e: 3708 adds r7, #8 + 8025fa0: 46bd mov sp, r7 + 8025fa2: bd80 pop {r7, pc} + 8025fa4: 58024400 .word 0x58024400 + 8025fa8: 08044d54 .word 0x08044d54 + 8025fac: 2400004c .word 0x2400004c + 8025fb0: 24000048 .word 0x24000048 + +08025fb4 : * implementation in user file. * @param TickPriority: Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8025f30: b580 push {r7, lr} - 8025f32: b082 sub sp, #8 - 8025f34: af00 add r7, sp, #0 - 8025f36: 6078 str r0, [r7, #4] + 8025fb4: b580 push {r7, lr} + 8025fb6: b082 sub sp, #8 + 8025fb8: af00 add r7, sp, #0 + 8025fba: 6078 str r0, [r7, #4] /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that don't take the value zero)*/ if((uint32_t)uwTickFreq == 0UL) - 8025f38: 4b15 ldr r3, [pc, #84] ; (8025f90 ) - 8025f3a: 781b ldrb r3, [r3, #0] - 8025f3c: 2b00 cmp r3, #0 - 8025f3e: d101 bne.n 8025f44 + 8025fbc: 4b15 ldr r3, [pc, #84] ; (8026014 ) + 8025fbe: 781b ldrb r3, [r3, #0] + 8025fc0: 2b00 cmp r3, #0 + 8025fc2: d101 bne.n 8025fc8 { return HAL_ERROR; - 8025f40: 2301 movs r3, #1 - 8025f42: e021 b.n 8025f88 + 8025fc4: 2301 movs r3, #1 + 8025fc6: e021 b.n 802600c } /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000UL / (uint32_t)uwTickFreq)) > 0U) - 8025f44: 4b13 ldr r3, [pc, #76] ; (8025f94 ) - 8025f46: 681a ldr r2, [r3, #0] - 8025f48: 4b11 ldr r3, [pc, #68] ; (8025f90 ) - 8025f4a: 781b ldrb r3, [r3, #0] - 8025f4c: 4619 mov r1, r3 - 8025f4e: f44f 737a mov.w r3, #1000 ; 0x3e8 - 8025f52: fbb3 f3f1 udiv r3, r3, r1 - 8025f56: fbb2 f3f3 udiv r3, r2, r3 - 8025f5a: 4618 mov r0, r3 - 8025f5c: f001 fd59 bl 8027a12 - 8025f60: 4603 mov r3, r0 - 8025f62: 2b00 cmp r3, #0 - 8025f64: d001 beq.n 8025f6a + 8025fc8: 4b13 ldr r3, [pc, #76] ; (8026018 ) + 8025fca: 681a ldr r2, [r3, #0] + 8025fcc: 4b11 ldr r3, [pc, #68] ; (8026014 ) + 8025fce: 781b ldrb r3, [r3, #0] + 8025fd0: 4619 mov r1, r3 + 8025fd2: f44f 737a mov.w r3, #1000 ; 0x3e8 + 8025fd6: fbb3 f3f1 udiv r3, r3, r1 + 8025fda: fbb2 f3f3 udiv r3, r2, r3 + 8025fde: 4618 mov r0, r3 + 8025fe0: f001 fd59 bl 8027a96 + 8025fe4: 4603 mov r3, r0 + 8025fe6: 2b00 cmp r3, #0 + 8025fe8: d001 beq.n 8025fee { return HAL_ERROR; - 8025f66: 2301 movs r3, #1 - 8025f68: e00e b.n 8025f88 + 8025fea: 2301 movs r3, #1 + 8025fec: e00e b.n 802600c } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8025f6a: 687b ldr r3, [r7, #4] - 8025f6c: 2b0f cmp r3, #15 - 8025f6e: d80a bhi.n 8025f86 + 8025fee: 687b ldr r3, [r7, #4] + 8025ff0: 2b0f cmp r3, #15 + 8025ff2: d80a bhi.n 802600a { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8025f70: 2200 movs r2, #0 - 8025f72: 6879 ldr r1, [r7, #4] - 8025f74: f04f 30ff mov.w r0, #4294967295 - 8025f78: f001 fd23 bl 80279c2 + 8025ff4: 2200 movs r2, #0 + 8025ff6: 6879 ldr r1, [r7, #4] + 8025ff8: f04f 30ff mov.w r0, #4294967295 + 8025ffc: f001 fd23 bl 8027a46 uwTickPrio = TickPriority; - 8025f7c: 4a06 ldr r2, [pc, #24] ; (8025f98 ) - 8025f7e: 687b ldr r3, [r7, #4] - 8025f80: 6013 str r3, [r2, #0] + 8026000: 4a06 ldr r2, [pc, #24] ; (802601c ) + 8026002: 687b ldr r3, [r7, #4] + 8026004: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 8025f82: 2300 movs r3, #0 - 8025f84: e000 b.n 8025f88 + 8026006: 2300 movs r3, #0 + 8026008: e000 b.n 802600c return HAL_ERROR; - 8025f86: 2301 movs r3, #1 + 802600a: 2301 movs r3, #1 } - 8025f88: 4618 mov r0, r3 - 8025f8a: 3708 adds r7, #8 - 8025f8c: 46bd mov sp, r7 - 8025f8e: bd80 pop {r7, pc} - 8025f90: 24000054 .word 0x24000054 - 8025f94: 24000048 .word 0x24000048 - 8025f98: 24000050 .word 0x24000050 + 802600c: 4618 mov r0, r3 + 802600e: 3708 adds r7, #8 + 8026010: 46bd mov sp, r7 + 8026012: bd80 pop {r7, pc} + 8026014: 24000054 .word 0x24000054 + 8026018: 24000048 .word 0x24000048 + 802601c: 24000050 .word 0x24000050 -08025f9c : +08026020 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8025f9c: b480 push {r7} - 8025f9e: af00 add r7, sp, #0 + 8026020: b480 push {r7} + 8026022: af00 add r7, sp, #0 uwTick += (uint32_t)uwTickFreq; - 8025fa0: 4b06 ldr r3, [pc, #24] ; (8025fbc ) - 8025fa2: 781b ldrb r3, [r3, #0] - 8025fa4: 461a mov r2, r3 - 8025fa6: 4b06 ldr r3, [pc, #24] ; (8025fc0 ) - 8025fa8: 681b ldr r3, [r3, #0] - 8025faa: 4413 add r3, r2 - 8025fac: 4a04 ldr r2, [pc, #16] ; (8025fc0 ) - 8025fae: 6013 str r3, [r2, #0] -} - 8025fb0: bf00 nop - 8025fb2: 46bd mov sp, r7 - 8025fb4: f85d 7b04 ldr.w r7, [sp], #4 - 8025fb8: 4770 bx lr - 8025fba: bf00 nop - 8025fbc: 24000054 .word 0x24000054 - 8025fc0: 2400b854 .word 0x2400b854 - -08025fc4 : + 8026024: 4b06 ldr r3, [pc, #24] ; (8026040 ) + 8026026: 781b ldrb r3, [r3, #0] + 8026028: 461a mov r2, r3 + 802602a: 4b06 ldr r3, [pc, #24] ; (8026044 ) + 802602c: 681b ldr r3, [r3, #0] + 802602e: 4413 add r3, r2 + 8026030: 4a04 ldr r2, [pc, #16] ; (8026044 ) + 8026032: 6013 str r3, [r2, #0] +} + 8026034: bf00 nop + 8026036: 46bd mov sp, r7 + 8026038: f85d 7b04 ldr.w r7, [sp], #4 + 802603c: 4770 bx lr + 802603e: bf00 nop + 8026040: 24000054 .word 0x24000054 + 8026044: 2400b85c .word 0x2400b85c + +08026048 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8025fc4: b480 push {r7} - 8025fc6: af00 add r7, sp, #0 + 8026048: b480 push {r7} + 802604a: af00 add r7, sp, #0 return uwTick; - 8025fc8: 4b03 ldr r3, [pc, #12] ; (8025fd8 ) - 8025fca: 681b ldr r3, [r3, #0] + 802604c: 4b03 ldr r3, [pc, #12] ; (802605c ) + 802604e: 681b ldr r3, [r3, #0] } - 8025fcc: 4618 mov r0, r3 - 8025fce: 46bd mov sp, r7 - 8025fd0: f85d 7b04 ldr.w r7, [sp], #4 - 8025fd4: 4770 bx lr - 8025fd6: bf00 nop - 8025fd8: 2400b854 .word 0x2400b854 + 8026050: 4618 mov r0, r3 + 8026052: 46bd mov sp, r7 + 8026054: f85d 7b04 ldr.w r7, [sp], #4 + 8026058: 4770 bx lr + 802605a: bf00 nop + 802605c: 2400b85c .word 0x2400b85c -08025fdc : +08026060 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 8025fdc: b580 push {r7, lr} - 8025fde: b084 sub sp, #16 - 8025fe0: af00 add r7, sp, #0 - 8025fe2: 6078 str r0, [r7, #4] + 8026060: b580 push {r7, lr} + 8026062: b084 sub sp, #16 + 8026064: af00 add r7, sp, #0 + 8026066: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 8025fe4: f7ff ffee bl 8025fc4 - 8025fe8: 60b8 str r0, [r7, #8] + 8026068: f7ff ffee bl 8026048 + 802606c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; - 8025fea: 687b ldr r3, [r7, #4] - 8025fec: 60fb str r3, [r7, #12] + 802606e: 687b ldr r3, [r7, #4] + 8026070: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 8025fee: 68fb ldr r3, [r7, #12] - 8025ff0: f1b3 3fff cmp.w r3, #4294967295 - 8025ff4: d005 beq.n 8026002 + 8026072: 68fb ldr r3, [r7, #12] + 8026074: f1b3 3fff cmp.w r3, #4294967295 + 8026078: d005 beq.n 8026086 { wait += (uint32_t)(uwTickFreq); - 8025ff6: 4b0a ldr r3, [pc, #40] ; (8026020 ) - 8025ff8: 781b ldrb r3, [r3, #0] - 8025ffa: 461a mov r2, r3 - 8025ffc: 68fb ldr r3, [r7, #12] - 8025ffe: 4413 add r3, r2 - 8026000: 60fb str r3, [r7, #12] + 802607a: 4b0a ldr r3, [pc, #40] ; (80260a4 ) + 802607c: 781b ldrb r3, [r3, #0] + 802607e: 461a mov r2, r3 + 8026080: 68fb ldr r3, [r7, #12] + 8026082: 4413 add r3, r2 + 8026084: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) - 8026002: bf00 nop - 8026004: f7ff ffde bl 8025fc4 - 8026008: 4602 mov r2, r0 - 802600a: 68bb ldr r3, [r7, #8] - 802600c: 1ad3 subs r3, r2, r3 - 802600e: 68fa ldr r2, [r7, #12] - 8026010: 429a cmp r2, r3 - 8026012: d8f7 bhi.n 8026004 + 8026086: bf00 nop + 8026088: f7ff ffde bl 8026048 + 802608c: 4602 mov r2, r0 + 802608e: 68bb ldr r3, [r7, #8] + 8026090: 1ad3 subs r3, r2, r3 + 8026092: 68fa ldr r2, [r7, #12] + 8026094: 429a cmp r2, r3 + 8026096: d8f7 bhi.n 8026088 { } } - 8026014: bf00 nop - 8026016: bf00 nop - 8026018: 3710 adds r7, #16 - 802601a: 46bd mov sp, r7 - 802601c: bd80 pop {r7, pc} - 802601e: bf00 nop - 8026020: 24000054 .word 0x24000054 + 8026098: bf00 nop + 802609a: bf00 nop + 802609c: 3710 adds r7, #16 + 802609e: 46bd mov sp, r7 + 80260a0: bd80 pop {r7, pc} + 80260a2: bf00 nop + 80260a4: 24000054 .word 0x24000054 -08026024 : +080260a8 : /** * @brief Returns the device revision identifier. * @retval Device revision identifier */ uint32_t HAL_GetREVID(void) { - 8026024: b480 push {r7} - 8026026: af00 add r7, sp, #0 + 80260a8: b480 push {r7} + 80260aa: af00 add r7, sp, #0 return((DBGMCU->IDCODE) >> 16); - 8026028: 4b03 ldr r3, [pc, #12] ; (8026038 ) - 802602a: 681b ldr r3, [r3, #0] - 802602c: 0c1b lsrs r3, r3, #16 + 80260ac: 4b03 ldr r3, [pc, #12] ; (80260bc ) + 80260ae: 681b ldr r3, [r3, #0] + 80260b0: 0c1b lsrs r3, r3, #16 } - 802602e: 4618 mov r0, r3 - 8026030: 46bd mov sp, r7 - 8026032: f85d 7b04 ldr.w r7, [sp], #4 - 8026036: 4770 bx lr - 8026038: 5c001000 .word 0x5c001000 + 80260b2: 4618 mov r0, r3 + 80260b4: 46bd mov sp, r7 + 80260b6: f85d 7b04 ldr.w r7, [sp], #4 + 80260ba: 4770 bx lr + 80260bc: 5c001000 .word 0x5c001000 -0802603c : +080260c0 : * @arg SYSCFG_ETH_MII : Select the Media Independent Interface * @arg SYSCFG_ETH_RMII: Select the Reduced Media Independent Interface * @retval None */ void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface) { - 802603c: b480 push {r7} - 802603e: b083 sub sp, #12 - 8026040: af00 add r7, sp, #0 - 8026042: 6078 str r0, [r7, #4] + 80260c0: b480 push {r7} + 80260c2: b083 sub sp, #12 + 80260c4: af00 add r7, sp, #0 + 80260c6: 6078 str r0, [r7, #4] /* Check the parameter */ assert_param(IS_SYSCFG_ETHERNET_CONFIG(SYSCFG_ETHInterface)); MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface)); - 8026044: 4b06 ldr r3, [pc, #24] ; (8026060 ) - 8026046: 685b ldr r3, [r3, #4] - 8026048: f423 0260 bic.w r2, r3, #14680064 ; 0xe00000 - 802604c: 4904 ldr r1, [pc, #16] ; (8026060 ) - 802604e: 687b ldr r3, [r7, #4] - 8026050: 4313 orrs r3, r2 - 8026052: 604b str r3, [r1, #4] -} - 8026054: bf00 nop - 8026056: 370c adds r7, #12 - 8026058: 46bd mov sp, r7 - 802605a: f85d 7b04 ldr.w r7, [sp], #4 - 802605e: 4770 bx lr - 8026060: 58000400 .word 0x58000400 - -08026064 : + 80260c8: 4b06 ldr r3, [pc, #24] ; (80260e4 ) + 80260ca: 685b ldr r3, [r3, #4] + 80260cc: f423 0260 bic.w r2, r3, #14680064 ; 0xe00000 + 80260d0: 4904 ldr r1, [pc, #16] ; (80260e4 ) + 80260d2: 687b ldr r3, [r7, #4] + 80260d4: 4313 orrs r3, r2 + 80260d6: 604b str r3, [r1, #4] +} + 80260d8: bf00 nop + 80260da: 370c adds r7, #12 + 80260dc: 46bd mov sp, r7 + 80260de: f85d 7b04 ldr.w r7, [sp], #4 + 80260e2: 4770 bx lr + 80260e4: 58000400 .word 0x58000400 + +080260e8 : * @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 * @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 * @retval None */ __STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock) { - 8026064: b480 push {r7} - 8026066: b083 sub sp, #12 - 8026068: af00 add r7, sp, #0 - 802606a: 6078 str r0, [r7, #4] - 802606c: 6039 str r1, [r7, #0] + 80260e8: b480 push {r7} + 80260ea: b083 sub sp, #12 + 80260ec: af00 add r7, sp, #0 + 80260ee: 6078 str r0, [r7, #4] + 80260f0: 6039 str r1, [r7, #0] MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_CKMODE | ADC_CCR_PRESC, CommonClock); - 802606e: 687b ldr r3, [r7, #4] - 8026070: 689b ldr r3, [r3, #8] - 8026072: f423 127c bic.w r2, r3, #4128768 ; 0x3f0000 - 8026076: 683b ldr r3, [r7, #0] - 8026078: 431a orrs r2, r3 - 802607a: 687b ldr r3, [r7, #4] - 802607c: 609a str r2, [r3, #8] -} - 802607e: bf00 nop - 8026080: 370c adds r7, #12 - 8026082: 46bd mov sp, r7 - 8026084: f85d 7b04 ldr.w r7, [sp], #4 - 8026088: 4770 bx lr - -0802608a : + 80260f2: 687b ldr r3, [r7, #4] + 80260f4: 689b ldr r3, [r3, #8] + 80260f6: f423 127c bic.w r2, r3, #4128768 ; 0x3f0000 + 80260fa: 683b ldr r3, [r7, #0] + 80260fc: 431a orrs r2, r3 + 80260fe: 687b ldr r3, [r7, #4] + 8026100: 609a str r2, [r3, #8] +} + 8026102: bf00 nop + 8026104: 370c adds r7, #12 + 8026106: 46bd mov sp, r7 + 8026108: f85d 7b04 ldr.w r7, [sp], #4 + 802610c: 4770 bx lr + +0802610e : * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR * @arg @ref LL_ADC_PATH_INTERNAL_VBAT * @retval None */ __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal) { - 802608a: b480 push {r7} - 802608c: b083 sub sp, #12 - 802608e: af00 add r7, sp, #0 - 8026090: 6078 str r0, [r7, #4] - 8026092: 6039 str r1, [r7, #0] + 802610e: b480 push {r7} + 8026110: b083 sub sp, #12 + 8026112: af00 add r7, sp, #0 + 8026114: 6078 str r0, [r7, #4] + 8026116: 6039 str r1, [r7, #0] MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN, PathInternal); - 8026094: 687b ldr r3, [r7, #4] - 8026096: 689b ldr r3, [r3, #8] - 8026098: f023 72e0 bic.w r2, r3, #29360128 ; 0x1c00000 - 802609c: 683b ldr r3, [r7, #0] - 802609e: 431a orrs r2, r3 - 80260a0: 687b ldr r3, [r7, #4] - 80260a2: 609a str r2, [r3, #8] -} - 80260a4: bf00 nop - 80260a6: 370c adds r7, #12 - 80260a8: 46bd mov sp, r7 - 80260aa: f85d 7b04 ldr.w r7, [sp], #4 - 80260ae: 4770 bx lr - -080260b0 : + 8026118: 687b ldr r3, [r7, #4] + 802611a: 689b ldr r3, [r3, #8] + 802611c: f023 72e0 bic.w r2, r3, #29360128 ; 0x1c00000 + 8026120: 683b ldr r3, [r7, #0] + 8026122: 431a orrs r2, r3 + 8026124: 687b ldr r3, [r7, #4] + 8026126: 609a str r2, [r3, #8] +} + 8026128: bf00 nop + 802612a: 370c adds r7, #12 + 802612c: 46bd mov sp, r7 + 802612e: f85d 7b04 ldr.w r7, [sp], #4 + 8026132: 4770 bx lr + +08026134 : * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR * @arg @ref LL_ADC_PATH_INTERNAL_VBAT */ __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON) { - 80260b0: b480 push {r7} - 80260b2: b083 sub sp, #12 - 80260b4: af00 add r7, sp, #0 - 80260b6: 6078 str r0, [r7, #4] + 8026134: b480 push {r7} + 8026136: b083 sub sp, #12 + 8026138: af00 add r7, sp, #0 + 802613a: 6078 str r0, [r7, #4] return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN)); - 80260b8: 687b ldr r3, [r7, #4] - 80260ba: 689b ldr r3, [r3, #8] - 80260bc: f003 73e0 and.w r3, r3, #29360128 ; 0x1c00000 + 802613c: 687b ldr r3, [r7, #4] + 802613e: 689b ldr r3, [r3, #8] + 8026140: f003 73e0 and.w r3, r3, #29360128 ; 0x1c00000 } - 80260c0: 4618 mov r0, r3 - 80260c2: 370c adds r7, #12 - 80260c4: 46bd mov sp, r7 - 80260c6: f85d 7b04 ldr.w r7, [sp], #4 - 80260ca: 4770 bx lr + 8026144: 4618 mov r0, r3 + 8026146: 370c adds r7, #12 + 8026148: 46bd mov sp, r7 + 802614a: f85d 7b04 ldr.w r7, [sp], #4 + 802614e: 4770 bx lr -080260cc : +08026150 : * Other channels are slow channels (conversion rate: refer to reference manual). * @param OffsetLevel Value between Min_Data=0x000 and Max_Data=0x1FFFFFF * @retval None */ __STATIC_INLINE void LL_ADC_SetOffset(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t Channel, uint32_t OffsetLevel) { - 80260cc: b480 push {r7} - 80260ce: b087 sub sp, #28 - 80260d0: af00 add r7, sp, #0 - 80260d2: 60f8 str r0, [r7, #12] - 80260d4: 60b9 str r1, [r7, #8] - 80260d6: 607a str r2, [r7, #4] - 80260d8: 603b str r3, [r7, #0] + 8026150: b480 push {r7} + 8026152: b087 sub sp, #28 + 8026154: af00 add r7, sp, #0 + 8026156: 60f8 str r0, [r7, #12] + 8026158: 60b9 str r1, [r7, #8] + 802615a: 607a str r2, [r7, #4] + 802615c: 603b str r3, [r7, #0] __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); - 80260da: 68fb ldr r3, [r7, #12] - 80260dc: 3360 adds r3, #96 ; 0x60 - 80260de: 461a mov r2, r3 - 80260e0: 68bb ldr r3, [r7, #8] - 80260e2: 009b lsls r3, r3, #2 - 80260e4: 4413 add r3, r2 - 80260e6: 617b str r3, [r7, #20] + 802615e: 68fb ldr r3, [r7, #12] + 8026160: 3360 adds r3, #96 ; 0x60 + 8026162: 461a mov r2, r3 + 8026164: 68bb ldr r3, [r7, #8] + 8026166: 009b lsls r3, r3, #2 + 8026168: 4413 add r3, r2 + 802616a: 617b str r3, [r7, #20] ADC3_OFR1_OFFSET1_EN | (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel); } else #endif /* ADC_VER_V5_V90 */ { MODIFY_REG(*preg, - 80260e8: 697b ldr r3, [r7, #20] - 80260ea: 681b ldr r3, [r3, #0] - 80260ec: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 - 80260f0: 687b ldr r3, [r7, #4] - 80260f2: f003 41f8 and.w r1, r3, #2080374784 ; 0x7c000000 - 80260f6: 683b ldr r3, [r7, #0] - 80260f8: 430b orrs r3, r1 - 80260fa: 431a orrs r2, r3 - 80260fc: 697b ldr r3, [r7, #20] - 80260fe: 601a str r2, [r3, #0] + 802616c: 697b ldr r3, [r7, #20] + 802616e: 681b ldr r3, [r3, #0] + 8026170: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 + 8026174: 687b ldr r3, [r7, #4] + 8026176: f003 41f8 and.w r1, r3, #2080374784 ; 0x7c000000 + 802617a: 683b ldr r3, [r7, #0] + 802617c: 430b orrs r3, r1 + 802617e: 431a orrs r2, r3 + 8026180: 697b ldr r3, [r7, #20] + 8026182: 601a str r2, [r3, #0] ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1, (Channel & ADC_CHANNEL_ID_NUMBER_MASK) | OffsetLevel); } } - 8026100: bf00 nop - 8026102: 371c adds r7, #28 - 8026104: 46bd mov sp, r7 - 8026106: f85d 7b04 ldr.w r7, [sp], #4 - 802610a: 4770 bx lr + 8026184: bf00 nop + 8026186: 371c adds r7, #28 + 8026188: 46bd mov sp, r7 + 802618a: f85d 7b04 ldr.w r7, [sp], #4 + 802618e: 4770 bx lr -0802610c : +08026190 : * @arg @ref LL_ADC_OFFSET_RSHIFT_ENABLE * @arg @ref LL_ADC_OFFSET_RSHIFT_DISABLE * @retval Returned None */ __STATIC_INLINE void LL_ADC_SetDataRightShift(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t RigthShift) { - 802610c: b480 push {r7} - 802610e: b085 sub sp, #20 - 8026110: af00 add r7, sp, #0 - 8026112: 60f8 str r0, [r7, #12] - 8026114: 60b9 str r1, [r7, #8] - 8026116: 607a str r2, [r7, #4] + 8026190: b480 push {r7} + 8026192: b085 sub sp, #20 + 8026194: af00 add r7, sp, #0 + 8026196: 60f8 str r0, [r7, #12] + 8026198: 60b9 str r1, [r7, #8] + 802619a: 607a str r2, [r7, #4] MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_RSHIFT1 | ADC_CFGR2_RSHIFT2 | ADC_CFGR2_RSHIFT3 | ADC_CFGR2_RSHIFT4), RigthShift << (Offsety & 0x1FUL)); - 8026118: 68fb ldr r3, [r7, #12] - 802611a: 691b ldr r3, [r3, #16] - 802611c: f423 42f0 bic.w r2, r3, #30720 ; 0x7800 - 8026120: 68bb ldr r3, [r7, #8] - 8026122: f003 031f and.w r3, r3, #31 - 8026126: 6879 ldr r1, [r7, #4] - 8026128: fa01 f303 lsl.w r3, r1, r3 - 802612c: 431a orrs r2, r3 - 802612e: 68fb ldr r3, [r7, #12] - 8026130: 611a str r2, [r3, #16] -} - 8026132: bf00 nop - 8026134: 3714 adds r7, #20 - 8026136: 46bd mov sp, r7 - 8026138: f85d 7b04 ldr.w r7, [sp], #4 - 802613c: 4770 bx lr - -0802613e : + 802619c: 68fb ldr r3, [r7, #12] + 802619e: 691b ldr r3, [r3, #16] + 80261a0: f423 42f0 bic.w r2, r3, #30720 ; 0x7800 + 80261a4: 68bb ldr r3, [r7, #8] + 80261a6: f003 031f and.w r3, r3, #31 + 80261aa: 6879 ldr r1, [r7, #4] + 80261ac: fa01 f303 lsl.w r3, r1, r3 + 80261b0: 431a orrs r2, r3 + 80261b2: 68fb ldr r3, [r7, #12] + 80261b4: 611a str r2, [r3, #16] +} + 80261b6: bf00 nop + 80261b8: 3714 adds r7, #20 + 80261ba: 46bd mov sp, r7 + 80261bc: f85d 7b04 ldr.w r7, [sp], #4 + 80261c0: 4770 bx lr + +080261c2 : * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE * @arg @ref LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE * @retval Returned None */ __STATIC_INLINE void LL_ADC_SetOffsetSignedSaturation(ADC_TypeDef *ADCx, uint32_t Offsety, uint32_t OffsetSignedSaturation) { - 802613e: b480 push {r7} - 8026140: b087 sub sp, #28 - 8026142: af00 add r7, sp, #0 - 8026144: 60f8 str r0, [r7, #12] - 8026146: 60b9 str r1, [r7, #8] - 8026148: 607a str r2, [r7, #4] + 80261c2: b480 push {r7} + 80261c4: b087 sub sp, #28 + 80261c6: af00 add r7, sp, #0 + 80261c8: 60f8 str r0, [r7, #12] + 80261ca: 60b9 str r1, [r7, #8] + 80261cc: 607a str r2, [r7, #4] /* Function not available on this instance */ } else #endif /* ADC_VER_V5_V90 */ { __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); - 802614a: 68fb ldr r3, [r7, #12] - 802614c: 3360 adds r3, #96 ; 0x60 - 802614e: 461a mov r2, r3 - 8026150: 68bb ldr r3, [r7, #8] - 8026152: 009b lsls r3, r3, #2 - 8026154: 4413 add r3, r2 - 8026156: 617b str r3, [r7, #20] + 80261ce: 68fb ldr r3, [r7, #12] + 80261d0: 3360 adds r3, #96 ; 0x60 + 80261d2: 461a mov r2, r3 + 80261d4: 68bb ldr r3, [r7, #8] + 80261d6: 009b lsls r3, r3, #2 + 80261d8: 4413 add r3, r2 + 80261da: 617b str r3, [r7, #20] MODIFY_REG(*preg, ADC_OFR1_SSATE, OffsetSignedSaturation); - 8026158: 697b ldr r3, [r7, #20] - 802615a: 681b ldr r3, [r3, #0] - 802615c: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 8026160: 687b ldr r3, [r7, #4] - 8026162: 431a orrs r2, r3 - 8026164: 697b ldr r3, [r7, #20] - 8026166: 601a str r2, [r3, #0] - } -} - 8026168: bf00 nop - 802616a: 371c adds r7, #28 - 802616c: 46bd mov sp, r7 - 802616e: f85d 7b04 ldr.w r7, [sp], #4 - 8026172: 4770 bx lr - -08026174 : + 80261dc: 697b ldr r3, [r7, #20] + 80261de: 681b ldr r3, [r3, #0] + 80261e0: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 80261e4: 687b ldr r3, [r7, #4] + 80261e6: 431a orrs r2, r3 + 80261e8: 697b ldr r3, [r7, #20] + 80261ea: 601a str r2, [r3, #0] + } +} + 80261ec: bf00 nop + 80261ee: 371c adds r7, #28 + 80261f0: 46bd mov sp, r7 + 80261f2: f85d 7b04 ldr.w r7, [sp], #4 + 80261f6: 4770 bx lr + +080261f8 : * @param ADCx ADC instance * @retval Value "0" if trigger source external trigger * Value "1" if trigger source SW start. */ __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx) { - 8026174: b480 push {r7} - 8026176: b083 sub sp, #12 - 8026178: af00 add r7, sp, #0 - 802617a: 6078 str r0, [r7, #4] + 80261f8: b480 push {r7} + 80261fa: b083 sub sp, #12 + 80261fc: af00 add r7, sp, #0 + 80261fe: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CFGR, ADC_CFGR_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR_EXTEN)) ? 1UL : 0UL); - 802617c: 687b ldr r3, [r7, #4] - 802617e: 68db ldr r3, [r3, #12] - 8026180: f403 6340 and.w r3, r3, #3072 ; 0xc00 - 8026184: 2b00 cmp r3, #0 - 8026186: d101 bne.n 802618c - 8026188: 2301 movs r3, #1 - 802618a: e000 b.n 802618e - 802618c: 2300 movs r3, #0 -} - 802618e: 4618 mov r0, r3 - 8026190: 370c adds r7, #12 - 8026192: 46bd mov sp, r7 - 8026194: f85d 7b04 ldr.w r7, [sp], #4 - 8026198: 4770 bx lr - -0802619a : + 8026200: 687b ldr r3, [r7, #4] + 8026202: 68db ldr r3, [r3, #12] + 8026204: f403 6340 and.w r3, r3, #3072 ; 0xc00 + 8026208: 2b00 cmp r3, #0 + 802620a: d101 bne.n 8026210 + 802620c: 2301 movs r3, #1 + 802620e: e000 b.n 8026212 + 8026210: 2300 movs r3, #0 +} + 8026212: 4618 mov r0, r3 + 8026214: 370c adds r7, #12 + 8026216: 46bd mov sp, r7 + 8026218: f85d 7b04 ldr.w r7, [sp], #4 + 802621c: 4770 bx lr + +0802621e : * (3) On STM32H7, fast channel (0.125 us for 14-bit resolution (ADC conversion rate up to 8 Ms/s)). * Other channels are slow channels (conversion rate: refer to reference manual). * @retval None */ __STATIC_INLINE void LL_ADC_REG_SetSequencerRanks(ADC_TypeDef *ADCx, uint32_t Rank, uint32_t Channel) { - 802619a: b480 push {r7} - 802619c: b087 sub sp, #28 - 802619e: af00 add r7, sp, #0 - 80261a0: 60f8 str r0, [r7, #12] - 80261a2: 60b9 str r1, [r7, #8] - 80261a4: 607a str r2, [r7, #4] + 802621e: b480 push {r7} + 8026220: b087 sub sp, #28 + 8026222: af00 add r7, sp, #0 + 8026224: 60f8 str r0, [r7, #12] + 8026226: 60b9 str r1, [r7, #8] + 8026228: 607a str r2, [r7, #4] /* Set bits with content of parameter "Channel" with bits position */ /* in register and register position depending on parameter "Rank". */ /* Parameters "Rank" and "Channel" are used with masks because containing */ /* other bits reserved for other purpose. */ __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> ADC_SQRX_REGOFFSET_POS)); - 80261a6: 68fb ldr r3, [r7, #12] - 80261a8: 3330 adds r3, #48 ; 0x30 - 80261aa: 461a mov r2, r3 - 80261ac: 68bb ldr r3, [r7, #8] - 80261ae: 0a1b lsrs r3, r3, #8 - 80261b0: 009b lsls r3, r3, #2 - 80261b2: f003 030c and.w r3, r3, #12 - 80261b6: 4413 add r3, r2 - 80261b8: 617b str r3, [r7, #20] + 802622a: 68fb ldr r3, [r7, #12] + 802622c: 3330 adds r3, #48 ; 0x30 + 802622e: 461a mov r2, r3 + 8026230: 68bb ldr r3, [r7, #8] + 8026232: 0a1b lsrs r3, r3, #8 + 8026234: 009b lsls r3, r3, #2 + 8026236: f003 030c and.w r3, r3, #12 + 802623a: 4413 add r3, r2 + 802623c: 617b str r3, [r7, #20] MODIFY_REG(*preg, - 80261ba: 697b ldr r3, [r7, #20] - 80261bc: 681a ldr r2, [r3, #0] - 80261be: 68bb ldr r3, [r7, #8] - 80261c0: f003 031f and.w r3, r3, #31 - 80261c4: 211f movs r1, #31 - 80261c6: fa01 f303 lsl.w r3, r1, r3 - 80261ca: 43db mvns r3, r3 - 80261cc: 401a ands r2, r3 - 80261ce: 687b ldr r3, [r7, #4] - 80261d0: 0e9b lsrs r3, r3, #26 - 80261d2: f003 011f and.w r1, r3, #31 - 80261d6: 68bb ldr r3, [r7, #8] - 80261d8: f003 031f and.w r3, r3, #31 - 80261dc: fa01 f303 lsl.w r3, r1, r3 - 80261e0: 431a orrs r2, r3 - 80261e2: 697b ldr r3, [r7, #20] - 80261e4: 601a str r2, [r3, #0] + 802623e: 697b ldr r3, [r7, #20] + 8026240: 681a ldr r2, [r3, #0] + 8026242: 68bb ldr r3, [r7, #8] + 8026244: f003 031f and.w r3, r3, #31 + 8026248: 211f movs r1, #31 + 802624a: fa01 f303 lsl.w r3, r1, r3 + 802624e: 43db mvns r3, r3 + 8026250: 401a ands r2, r3 + 8026252: 687b ldr r3, [r7, #4] + 8026254: 0e9b lsrs r3, r3, #26 + 8026256: f003 011f and.w r1, r3, #31 + 802625a: 68bb ldr r3, [r7, #8] + 802625c: f003 031f and.w r3, r3, #31 + 8026260: fa01 f303 lsl.w r3, r1, r3 + 8026264: 431a orrs r2, r3 + 8026266: 697b ldr r3, [r7, #20] + 8026268: 601a str r2, [r3, #0] ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 << (Rank & ADC_REG_RANK_ID_SQRX_MASK), ((Channel & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_REG_RANK_ID_SQRX_MASK)); } - 80261e6: bf00 nop - 80261e8: 371c adds r7, #28 - 80261ea: 46bd mov sp, r7 - 80261ec: f85d 7b04 ldr.w r7, [sp], #4 - 80261f0: 4770 bx lr + 802626a: bf00 nop + 802626c: 371c adds r7, #28 + 802626e: 46bd mov sp, r7 + 8026270: f85d 7b04 ldr.w r7, [sp], #4 + 8026274: 4770 bx lr -080261f2 : +08026276 : * @arg @ref LL_ADC_SAMPLINGTIME_387CYCLES_5 * @arg @ref LL_ADC_SAMPLINGTIME_810CYCLES_5 * @retval None */ __STATIC_INLINE void LL_ADC_SetChannelSamplingTime(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SamplingTime) { - 80261f2: b480 push {r7} - 80261f4: b087 sub sp, #28 - 80261f6: af00 add r7, sp, #0 - 80261f8: 60f8 str r0, [r7, #12] - 80261fa: 60b9 str r1, [r7, #8] - 80261fc: 607a str r2, [r7, #4] + 8026276: b480 push {r7} + 8026278: b087 sub sp, #28 + 802627a: af00 add r7, sp, #0 + 802627c: 60f8 str r0, [r7, #12] + 802627e: 60b9 str r1, [r7, #8] + 8026280: 607a str r2, [r7, #4] /* Set bits with content of parameter "SamplingTime" with bits position */ /* in register and register position depending on parameter "Channel". */ /* Parameter "Channel" is used with masks because containing */ /* other bits reserved for other purpose. */ __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_MASK) >> ADC_SMPRX_REGOFFSET_POS)); - 80261fe: 68fb ldr r3, [r7, #12] - 8026200: 3314 adds r3, #20 - 8026202: 461a mov r2, r3 - 8026204: 68bb ldr r3, [r7, #8] - 8026206: 0e5b lsrs r3, r3, #25 - 8026208: 009b lsls r3, r3, #2 - 802620a: f003 0304 and.w r3, r3, #4 - 802620e: 4413 add r3, r2 - 8026210: 617b str r3, [r7, #20] + 8026282: 68fb ldr r3, [r7, #12] + 8026284: 3314 adds r3, #20 + 8026286: 461a mov r2, r3 + 8026288: 68bb ldr r3, [r7, #8] + 802628a: 0e5b lsrs r3, r3, #25 + 802628c: 009b lsls r3, r3, #2 + 802628e: f003 0304 and.w r3, r3, #4 + 8026292: 4413 add r3, r2 + 8026294: 617b str r3, [r7, #20] MODIFY_REG(*preg, - 8026212: 697b ldr r3, [r7, #20] - 8026214: 681a ldr r2, [r3, #0] - 8026216: 68bb ldr r3, [r7, #8] - 8026218: 0d1b lsrs r3, r3, #20 - 802621a: f003 031f and.w r3, r3, #31 - 802621e: 2107 movs r1, #7 - 8026220: fa01 f303 lsl.w r3, r1, r3 - 8026224: 43db mvns r3, r3 - 8026226: 401a ands r2, r3 - 8026228: 68bb ldr r3, [r7, #8] - 802622a: 0d1b lsrs r3, r3, #20 - 802622c: f003 031f and.w r3, r3, #31 - 8026230: 6879 ldr r1, [r7, #4] - 8026232: fa01 f303 lsl.w r3, r1, r3 - 8026236: 431a orrs r2, r3 - 8026238: 697b ldr r3, [r7, #20] - 802623a: 601a str r2, [r3, #0] + 8026296: 697b ldr r3, [r7, #20] + 8026298: 681a ldr r2, [r3, #0] + 802629a: 68bb ldr r3, [r7, #8] + 802629c: 0d1b lsrs r3, r3, #20 + 802629e: f003 031f and.w r3, r3, #31 + 80262a2: 2107 movs r1, #7 + 80262a4: fa01 f303 lsl.w r3, r1, r3 + 80262a8: 43db mvns r3, r3 + 80262aa: 401a ands r2, r3 + 80262ac: 68bb ldr r3, [r7, #8] + 80262ae: 0d1b lsrs r3, r3, #20 + 80262b0: f003 031f and.w r3, r3, #31 + 80262b4: 6879 ldr r1, [r7, #4] + 80262b6: fa01 f303 lsl.w r3, r1, r3 + 80262ba: 431a orrs r2, r3 + 80262bc: 697b ldr r3, [r7, #20] + 80262be: 601a str r2, [r3, #0] ADC_SMPR1_SMP0 << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS), SamplingTime << ((Channel & ADC_CHANNEL_SMPx_BITOFFSET_MASK) >> ADC_CHANNEL_SMPx_BITOFFSET_POS)); } - 802623c: bf00 nop - 802623e: 371c adds r7, #28 - 8026240: 46bd mov sp, r7 - 8026242: f85d 7b04 ldr.w r7, [sp], #4 - 8026246: 4770 bx lr + 80262c0: bf00 nop + 80262c2: 371c adds r7, #28 + 80262c4: 46bd mov sp, r7 + 80262c6: f85d 7b04 ldr.w r7, [sp], #4 + 80262ca: 4770 bx lr -08026248 : +080262cc : * @arg @ref LL_ADC_SINGLE_ENDED * @arg @ref LL_ADC_DIFFERENTIAL_ENDED * @retval None */ __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SingleDiff) { - 8026248: b480 push {r7} - 802624a: b085 sub sp, #20 - 802624c: af00 add r7, sp, #0 - 802624e: 60f8 str r0, [r7, #12] - 8026250: 60b9 str r1, [r7, #8] - 8026252: 607a str r2, [r7, #4] + 80262cc: b480 push {r7} + 80262ce: b085 sub sp, #20 + 80262d0: af00 add r7, sp, #0 + 80262d2: 60f8 str r0, [r7, #12] + 80262d4: 60b9 str r1, [r7, #8] + 80262d6: 607a str r2, [r7, #4] } #else /* ADC_VER_V5_V90 */ /* Bits of channels in single or differential mode are set only for */ /* differential mode (for single mode, mask of bits allowed to be set is */ /* shifted out of range of bits of channels in single or differential mode. */ MODIFY_REG(ADCx->DIFSEL, - 8026254: 68fb ldr r3, [r7, #12] - 8026256: f8d3 20c0 ldr.w r2, [r3, #192] ; 0xc0 - 802625a: 68bb ldr r3, [r7, #8] - 802625c: f3c3 0313 ubfx r3, r3, #0, #20 - 8026260: 43db mvns r3, r3 - 8026262: 401a ands r2, r3 - 8026264: 687b ldr r3, [r7, #4] - 8026266: f003 0318 and.w r3, r3, #24 - 802626a: 4908 ldr r1, [pc, #32] ; (802628c ) - 802626c: 40d9 lsrs r1, r3 - 802626e: 68bb ldr r3, [r7, #8] - 8026270: 400b ands r3, r1 - 8026272: f3c3 0313 ubfx r3, r3, #0, #20 - 8026276: 431a orrs r2, r3 - 8026278: 68fb ldr r3, [r7, #12] - 802627a: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 + 80262d8: 68fb ldr r3, [r7, #12] + 80262da: f8d3 20c0 ldr.w r2, [r3, #192] ; 0xc0 + 80262de: 68bb ldr r3, [r7, #8] + 80262e0: f3c3 0313 ubfx r3, r3, #0, #20 + 80262e4: 43db mvns r3, r3 + 80262e6: 401a ands r2, r3 + 80262e8: 687b ldr r3, [r7, #4] + 80262ea: f003 0318 and.w r3, r3, #24 + 80262ee: 4908 ldr r1, [pc, #32] ; (8026310 ) + 80262f0: 40d9 lsrs r1, r3 + 80262f2: 68bb ldr r3, [r7, #8] + 80262f4: 400b ands r3, r1 + 80262f6: f3c3 0313 ubfx r3, r3, #0, #20 + 80262fa: 431a orrs r2, r3 + 80262fc: 68fb ldr r3, [r7, #12] + 80262fe: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 Channel & ADC_SINGLEDIFF_CHANNEL_MASK, (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK))); #endif } - 802627e: bf00 nop - 8026280: 3714 adds r7, #20 - 8026282: 46bd mov sp, r7 - 8026284: f85d 7b04 ldr.w r7, [sp], #4 - 8026288: 4770 bx lr - 802628a: bf00 nop - 802628c: 000fffff .word 0x000fffff + 8026302: bf00 nop + 8026304: 3714 adds r7, #20 + 8026306: 46bd mov sp, r7 + 8026308: f85d 7b04 ldr.w r7, [sp], #4 + 802630c: 4770 bx lr + 802630e: bf00 nop + 8026310: 000fffff .word 0x000fffff -08026290 : +08026314 : * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM * @arg @ref LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT * @arg @ref LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM */ __STATIC_INLINE uint32_t LL_ADC_GetMultimode(ADC_Common_TypeDef *ADCxy_COMMON) { - 8026290: b480 push {r7} - 8026292: b083 sub sp, #12 - 8026294: af00 add r7, sp, #0 - 8026296: 6078 str r0, [r7, #4] + 8026314: b480 push {r7} + 8026316: b083 sub sp, #12 + 8026318: af00 add r7, sp, #0 + 802631a: 6078 str r0, [r7, #4] return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DUAL)); - 8026298: 687b ldr r3, [r7, #4] - 802629a: 689b ldr r3, [r3, #8] - 802629c: f003 031f and.w r3, r3, #31 + 802631c: 687b ldr r3, [r7, #4] + 802631e: 689b ldr r3, [r3, #8] + 8026320: f003 031f and.w r3, r3, #31 } - 80262a0: 4618 mov r0, r3 - 80262a2: 370c adds r7, #12 - 80262a4: 46bd mov sp, r7 - 80262a6: f85d 7b04 ldr.w r7, [sp], #4 - 80262aa: 4770 bx lr + 8026324: 4618 mov r0, r3 + 8026326: 370c adds r7, #12 + 8026328: 46bd mov sp, r7 + 802632a: f85d 7b04 ldr.w r7, [sp], #4 + 802632e: 4770 bx lr -080262ac : +08026330 : * @arg @ref LL_ADC_MULTI_REG_DMA_EACH_ADC * @arg @ref LL_ADC_MULTI_REG_DMA_RES_32_10B * @arg @ref LL_ADC_MULTI_REG_DMA_RES_8B */ __STATIC_INLINE uint32_t LL_ADC_GetMultiDMATransfer(ADC_Common_TypeDef *ADCxy_COMMON) { - 80262ac: b480 push {r7} - 80262ae: b083 sub sp, #12 - 80262b0: af00 add r7, sp, #0 - 80262b2: 6078 str r0, [r7, #4] + 8026330: b480 push {r7} + 8026332: b083 sub sp, #12 + 8026334: af00 add r7, sp, #0 + 8026336: 6078 str r0, [r7, #4] return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_DAMDF)); - 80262b4: 687b ldr r3, [r7, #4] - 80262b6: 689b ldr r3, [r3, #8] - 80262b8: f403 4340 and.w r3, r3, #49152 ; 0xc000 + 8026338: 687b ldr r3, [r7, #4] + 802633a: 689b ldr r3, [r3, #8] + 802633c: f403 4340 and.w r3, r3, #49152 ; 0xc000 } - 80262bc: 4618 mov r0, r3 - 80262be: 370c adds r7, #12 - 80262c0: 46bd mov sp, r7 - 80262c2: f85d 7b04 ldr.w r7, [sp], #4 - 80262c6: 4770 bx lr + 8026340: 4618 mov r0, r3 + 8026342: 370c adds r7, #12 + 8026344: 46bd mov sp, r7 + 8026346: f85d 7b04 ldr.w r7, [sp], #4 + 802634a: 4770 bx lr -080262c8 : +0802634c : * @rmtoll CR DEEPPWD LL_ADC_DisableDeepPowerDown * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_DisableDeepPowerDown(ADC_TypeDef *ADCx) { - 80262c8: b480 push {r7} - 80262ca: b083 sub sp, #12 - 80262cc: af00 add r7, sp, #0 - 80262ce: 6078 str r0, [r7, #4] + 802634c: b480 push {r7} + 802634e: b083 sub sp, #12 + 8026350: af00 add r7, sp, #0 + 8026352: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ CLEAR_BIT(ADCx->CR, (ADC_CR_DEEPPWD | ADC_CR_BITS_PROPERTY_RS)); - 80262d0: 687b ldr r3, [r7, #4] - 80262d2: 689a ldr r2, [r3, #8] - 80262d4: 4b04 ldr r3, [pc, #16] ; (80262e8 ) - 80262d6: 4013 ands r3, r2 - 80262d8: 687a ldr r2, [r7, #4] - 80262da: 6093 str r3, [r2, #8] -} - 80262dc: bf00 nop - 80262de: 370c adds r7, #12 - 80262e0: 46bd mov sp, r7 - 80262e2: f85d 7b04 ldr.w r7, [sp], #4 - 80262e6: 4770 bx lr - 80262e8: 5fffffc0 .word 0x5fffffc0 - -080262ec : + 8026354: 687b ldr r3, [r7, #4] + 8026356: 689a ldr r2, [r3, #8] + 8026358: 4b04 ldr r3, [pc, #16] ; (802636c ) + 802635a: 4013 ands r3, r2 + 802635c: 687a ldr r2, [r7, #4] + 802635e: 6093 str r3, [r2, #8] +} + 8026360: bf00 nop + 8026362: 370c adds r7, #12 + 8026364: 46bd mov sp, r7 + 8026366: f85d 7b04 ldr.w r7, [sp], #4 + 802636a: 4770 bx lr + 802636c: 5fffffc0 .word 0x5fffffc0 + +08026370 : * @rmtoll CR DEEPPWD LL_ADC_IsDeepPowerDownEnabled * @param ADCx ADC instance * @retval 0: deep power down is disabled, 1: deep power down is enabled. */ __STATIC_INLINE uint32_t LL_ADC_IsDeepPowerDownEnabled(ADC_TypeDef *ADCx) { - 80262ec: b480 push {r7} - 80262ee: b083 sub sp, #12 - 80262f0: af00 add r7, sp, #0 - 80262f2: 6078 str r0, [r7, #4] + 8026370: b480 push {r7} + 8026372: b083 sub sp, #12 + 8026374: af00 add r7, sp, #0 + 8026376: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_DEEPPWD) == (ADC_CR_DEEPPWD)) ? 1UL : 0UL); - 80262f4: 687b ldr r3, [r7, #4] - 80262f6: 689b ldr r3, [r3, #8] - 80262f8: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 80262fc: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8026300: d101 bne.n 8026306 - 8026302: 2301 movs r3, #1 - 8026304: e000 b.n 8026308 - 8026306: 2300 movs r3, #0 -} - 8026308: 4618 mov r0, r3 - 802630a: 370c adds r7, #12 - 802630c: 46bd mov sp, r7 - 802630e: f85d 7b04 ldr.w r7, [sp], #4 - 8026312: 4770 bx lr - -08026314 : + 8026378: 687b ldr r3, [r7, #4] + 802637a: 689b ldr r3, [r3, #8] + 802637c: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8026380: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8026384: d101 bne.n 802638a + 8026386: 2301 movs r3, #1 + 8026388: e000 b.n 802638c + 802638a: 2300 movs r3, #0 +} + 802638c: 4618 mov r0, r3 + 802638e: 370c adds r7, #12 + 8026390: 46bd mov sp, r7 + 8026392: f85d 7b04 ldr.w r7, [sp], #4 + 8026396: 4770 bx lr + +08026398 : * @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx) { - 8026314: b480 push {r7} - 8026316: b083 sub sp, #12 - 8026318: af00 add r7, sp, #0 - 802631a: 6078 str r0, [r7, #4] + 8026398: b480 push {r7} + 802639a: b083 sub sp, #12 + 802639c: af00 add r7, sp, #0 + 802639e: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 802631c: 687b ldr r3, [r7, #4] - 802631e: 689a ldr r2, [r3, #8] - 8026320: 4b05 ldr r3, [pc, #20] ; (8026338 ) - 8026322: 4013 ands r3, r2 - 8026324: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000 - 8026328: 687b ldr r3, [r7, #4] - 802632a: 609a str r2, [r3, #8] + 80263a0: 687b ldr r3, [r7, #4] + 80263a2: 689a ldr r2, [r3, #8] + 80263a4: 4b05 ldr r3, [pc, #20] ; (80263bc ) + 80263a6: 4013 ands r3, r2 + 80263a8: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000 + 80263ac: 687b ldr r3, [r7, #4] + 80263ae: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADVREGEN); } - 802632c: bf00 nop - 802632e: 370c adds r7, #12 - 8026330: 46bd mov sp, r7 - 8026332: f85d 7b04 ldr.w r7, [sp], #4 - 8026336: 4770 bx lr - 8026338: 6fffffc0 .word 0x6fffffc0 + 80263b0: bf00 nop + 80263b2: 370c adds r7, #12 + 80263b4: 46bd mov sp, r7 + 80263b6: f85d 7b04 ldr.w r7, [sp], #4 + 80263ba: 4770 bx lr + 80263bc: 6fffffc0 .word 0x6fffffc0 -0802633c : +080263c0 : * @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled * @param ADCx ADC instance * @retval 0: internal regulator is disabled, 1: internal regulator is enabled. */ __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx) { - 802633c: b480 push {r7} - 802633e: b083 sub sp, #12 - 8026340: af00 add r7, sp, #0 - 8026342: 6078 str r0, [r7, #4] + 80263c0: b480 push {r7} + 80263c2: b083 sub sp, #12 + 80263c4: af00 add r7, sp, #0 + 80263c6: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN)) ? 1UL : 0UL); - 8026344: 687b ldr r3, [r7, #4] - 8026346: 689b ldr r3, [r3, #8] - 8026348: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 802634c: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8026350: d101 bne.n 8026356 - 8026352: 2301 movs r3, #1 - 8026354: e000 b.n 8026358 - 8026356: 2300 movs r3, #0 -} - 8026358: 4618 mov r0, r3 - 802635a: 370c adds r7, #12 - 802635c: 46bd mov sp, r7 - 802635e: f85d 7b04 ldr.w r7, [sp], #4 - 8026362: 4770 bx lr - -08026364 : + 80263c8: 687b ldr r3, [r7, #4] + 80263ca: 689b ldr r3, [r3, #8] + 80263cc: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 80263d0: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 80263d4: d101 bne.n 80263da + 80263d6: 2301 movs r3, #1 + 80263d8: e000 b.n 80263dc + 80263da: 2300 movs r3, #0 +} + 80263dc: 4618 mov r0, r3 + 80263de: 370c adds r7, #12 + 80263e0: 46bd mov sp, r7 + 80263e2: f85d 7b04 ldr.w r7, [sp], #4 + 80263e6: 4770 bx lr + +080263e8 : * @rmtoll CR ADEN LL_ADC_Enable * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx) { - 8026364: b480 push {r7} - 8026366: b083 sub sp, #12 - 8026368: af00 add r7, sp, #0 - 802636a: 6078 str r0, [r7, #4] + 80263e8: b480 push {r7} + 80263ea: b083 sub sp, #12 + 80263ec: af00 add r7, sp, #0 + 80263ee: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 802636c: 687b ldr r3, [r7, #4] - 802636e: 689a ldr r2, [r3, #8] - 8026370: 4b05 ldr r3, [pc, #20] ; (8026388 ) - 8026372: 4013 ands r3, r2 - 8026374: f043 0201 orr.w r2, r3, #1 - 8026378: 687b ldr r3, [r7, #4] - 802637a: 609a str r2, [r3, #8] + 80263f0: 687b ldr r3, [r7, #4] + 80263f2: 689a ldr r2, [r3, #8] + 80263f4: 4b05 ldr r3, [pc, #20] ; (802640c ) + 80263f6: 4013 ands r3, r2 + 80263f8: f043 0201 orr.w r2, r3, #1 + 80263fc: 687b ldr r3, [r7, #4] + 80263fe: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADEN); } - 802637c: bf00 nop - 802637e: 370c adds r7, #12 - 8026380: 46bd mov sp, r7 - 8026382: f85d 7b04 ldr.w r7, [sp], #4 - 8026386: 4770 bx lr - 8026388: 7fffffc0 .word 0x7fffffc0 + 8026400: bf00 nop + 8026402: 370c adds r7, #12 + 8026404: 46bd mov sp, r7 + 8026406: f85d 7b04 ldr.w r7, [sp], #4 + 802640a: 4770 bx lr + 802640c: 7fffffc0 .word 0x7fffffc0 -0802638c : +08026410 : * @rmtoll CR ADDIS LL_ADC_Disable * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx) { - 802638c: b480 push {r7} - 802638e: b083 sub sp, #12 - 8026390: af00 add r7, sp, #0 - 8026392: 6078 str r0, [r7, #4] + 8026410: b480 push {r7} + 8026412: b083 sub sp, #12 + 8026414: af00 add r7, sp, #0 + 8026416: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 8026394: 687b ldr r3, [r7, #4] - 8026396: 689a ldr r2, [r3, #8] - 8026398: 4b05 ldr r3, [pc, #20] ; (80263b0 ) - 802639a: 4013 ands r3, r2 - 802639c: f043 0202 orr.w r2, r3, #2 - 80263a0: 687b ldr r3, [r7, #4] - 80263a2: 609a str r2, [r3, #8] + 8026418: 687b ldr r3, [r7, #4] + 802641a: 689a ldr r2, [r3, #8] + 802641c: 4b05 ldr r3, [pc, #20] ; (8026434 ) + 802641e: 4013 ands r3, r2 + 8026420: f043 0202 orr.w r2, r3, #2 + 8026424: 687b ldr r3, [r7, #4] + 8026426: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADDIS); } - 80263a4: bf00 nop - 80263a6: 370c adds r7, #12 - 80263a8: 46bd mov sp, r7 - 80263aa: f85d 7b04 ldr.w r7, [sp], #4 - 80263ae: 4770 bx lr - 80263b0: 7fffffc0 .word 0x7fffffc0 + 8026428: bf00 nop + 802642a: 370c adds r7, #12 + 802642c: 46bd mov sp, r7 + 802642e: f85d 7b04 ldr.w r7, [sp], #4 + 8026432: 4770 bx lr + 8026434: 7fffffc0 .word 0x7fffffc0 -080263b4 : +08026438 : * @rmtoll CR ADEN LL_ADC_IsEnabled * @param ADCx ADC instance * @retval 0: ADC is disabled, 1: ADC is enabled. */ __STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx) { - 80263b4: b480 push {r7} - 80263b6: b083 sub sp, #12 - 80263b8: af00 add r7, sp, #0 - 80263ba: 6078 str r0, [r7, #4] + 8026438: b480 push {r7} + 802643a: b083 sub sp, #12 + 802643c: af00 add r7, sp, #0 + 802643e: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN)) ? 1UL : 0UL); - 80263bc: 687b ldr r3, [r7, #4] - 80263be: 689b ldr r3, [r3, #8] - 80263c0: f003 0301 and.w r3, r3, #1 - 80263c4: 2b01 cmp r3, #1 - 80263c6: d101 bne.n 80263cc - 80263c8: 2301 movs r3, #1 - 80263ca: e000 b.n 80263ce - 80263cc: 2300 movs r3, #0 -} - 80263ce: 4618 mov r0, r3 - 80263d0: 370c adds r7, #12 - 80263d2: 46bd mov sp, r7 - 80263d4: f85d 7b04 ldr.w r7, [sp], #4 - 80263d8: 4770 bx lr - -080263da : + 8026440: 687b ldr r3, [r7, #4] + 8026442: 689b ldr r3, [r3, #8] + 8026444: f003 0301 and.w r3, r3, #1 + 8026448: 2b01 cmp r3, #1 + 802644a: d101 bne.n 8026450 + 802644c: 2301 movs r3, #1 + 802644e: e000 b.n 8026452 + 8026450: 2300 movs r3, #0 +} + 8026452: 4618 mov r0, r3 + 8026454: 370c adds r7, #12 + 8026456: 46bd mov sp, r7 + 8026458: f85d 7b04 ldr.w r7, [sp], #4 + 802645c: 4770 bx lr + +0802645e : * @rmtoll CR ADDIS LL_ADC_IsDisableOngoing * @param ADCx ADC instance * @retval 0: no ADC disable command on going. */ __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx) { - 80263da: b480 push {r7} - 80263dc: b083 sub sp, #12 - 80263de: af00 add r7, sp, #0 - 80263e0: 6078 str r0, [r7, #4] + 802645e: b480 push {r7} + 8026460: b083 sub sp, #12 + 8026462: af00 add r7, sp, #0 + 8026464: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS)) ? 1UL : 0UL); - 80263e2: 687b ldr r3, [r7, #4] - 80263e4: 689b ldr r3, [r3, #8] - 80263e6: f003 0302 and.w r3, r3, #2 - 80263ea: 2b02 cmp r3, #2 - 80263ec: d101 bne.n 80263f2 - 80263ee: 2301 movs r3, #1 - 80263f0: e000 b.n 80263f4 - 80263f2: 2300 movs r3, #0 -} - 80263f4: 4618 mov r0, r3 - 80263f6: 370c adds r7, #12 - 80263f8: 46bd mov sp, r7 - 80263fa: f85d 7b04 ldr.w r7, [sp], #4 - 80263fe: 4770 bx lr - -08026400 : + 8026466: 687b ldr r3, [r7, #4] + 8026468: 689b ldr r3, [r3, #8] + 802646a: f003 0302 and.w r3, r3, #2 + 802646e: 2b02 cmp r3, #2 + 8026470: d101 bne.n 8026476 + 8026472: 2301 movs r3, #1 + 8026474: e000 b.n 8026478 + 8026476: 2300 movs r3, #0 +} + 8026478: 4618 mov r0, r3 + 802647a: 370c adds r7, #12 + 802647c: 46bd mov sp, r7 + 802647e: f85d 7b04 ldr.w r7, [sp], #4 + 8026482: 4770 bx lr + +08026484 : * @rmtoll CR ADSTART LL_ADC_REG_StartConversion * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx) { - 8026400: b480 push {r7} - 8026402: b083 sub sp, #12 - 8026404: af00 add r7, sp, #0 - 8026406: 6078 str r0, [r7, #4] + 8026484: b480 push {r7} + 8026486: b083 sub sp, #12 + 8026488: af00 add r7, sp, #0 + 802648a: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 8026408: 687b ldr r3, [r7, #4] - 802640a: 689a ldr r2, [r3, #8] - 802640c: 4b05 ldr r3, [pc, #20] ; (8026424 ) - 802640e: 4013 ands r3, r2 - 8026410: f043 0204 orr.w r2, r3, #4 - 8026414: 687b ldr r3, [r7, #4] - 8026416: 609a str r2, [r3, #8] + 802648c: 687b ldr r3, [r7, #4] + 802648e: 689a ldr r2, [r3, #8] + 8026490: 4b05 ldr r3, [pc, #20] ; (80264a8 ) + 8026492: 4013 ands r3, r2 + 8026494: f043 0204 orr.w r2, r3, #4 + 8026498: 687b ldr r3, [r7, #4] + 802649a: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADSTART); } - 8026418: bf00 nop - 802641a: 370c adds r7, #12 - 802641c: 46bd mov sp, r7 - 802641e: f85d 7b04 ldr.w r7, [sp], #4 - 8026422: 4770 bx lr - 8026424: 7fffffc0 .word 0x7fffffc0 + 802649c: bf00 nop + 802649e: 370c adds r7, #12 + 80264a0: 46bd mov sp, r7 + 80264a2: f85d 7b04 ldr.w r7, [sp], #4 + 80264a6: 4770 bx lr + 80264a8: 7fffffc0 .word 0x7fffffc0 -08026428 : +080264ac : * @rmtoll CR ADSTP LL_ADC_REG_StopConversion * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx) { - 8026428: b480 push {r7} - 802642a: b083 sub sp, #12 - 802642c: af00 add r7, sp, #0 - 802642e: 6078 str r0, [r7, #4] + 80264ac: b480 push {r7} + 80264ae: b083 sub sp, #12 + 80264b0: af00 add r7, sp, #0 + 80264b2: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 8026430: 687b ldr r3, [r7, #4] - 8026432: 689a ldr r2, [r3, #8] - 8026434: 4b05 ldr r3, [pc, #20] ; (802644c ) - 8026436: 4013 ands r3, r2 - 8026438: f043 0210 orr.w r2, r3, #16 - 802643c: 687b ldr r3, [r7, #4] - 802643e: 609a str r2, [r3, #8] + 80264b4: 687b ldr r3, [r7, #4] + 80264b6: 689a ldr r2, [r3, #8] + 80264b8: 4b05 ldr r3, [pc, #20] ; (80264d0 ) + 80264ba: 4013 ands r3, r2 + 80264bc: f043 0210 orr.w r2, r3, #16 + 80264c0: 687b ldr r3, [r7, #4] + 80264c2: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_ADSTP); } - 8026440: bf00 nop - 8026442: 370c adds r7, #12 - 8026444: 46bd mov sp, r7 - 8026446: f85d 7b04 ldr.w r7, [sp], #4 - 802644a: 4770 bx lr - 802644c: 7fffffc0 .word 0x7fffffc0 + 80264c4: bf00 nop + 80264c6: 370c adds r7, #12 + 80264c8: 46bd mov sp, r7 + 80264ca: f85d 7b04 ldr.w r7, [sp], #4 + 80264ce: 4770 bx lr + 80264d0: 7fffffc0 .word 0x7fffffc0 -08026450 : +080264d4 : * @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing * @param ADCx ADC instance * @retval 0: no conversion is on going on ADC group regular. */ __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx) { - 8026450: b480 push {r7} - 8026452: b083 sub sp, #12 - 8026454: af00 add r7, sp, #0 - 8026456: 6078 str r0, [r7, #4] + 80264d4: b480 push {r7} + 80264d6: b083 sub sp, #12 + 80264d8: af00 add r7, sp, #0 + 80264da: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART)) ? 1UL : 0UL); - 8026458: 687b ldr r3, [r7, #4] - 802645a: 689b ldr r3, [r3, #8] - 802645c: f003 0304 and.w r3, r3, #4 - 8026460: 2b04 cmp r3, #4 - 8026462: d101 bne.n 8026468 - 8026464: 2301 movs r3, #1 - 8026466: e000 b.n 802646a - 8026468: 2300 movs r3, #0 -} - 802646a: 4618 mov r0, r3 - 802646c: 370c adds r7, #12 - 802646e: 46bd mov sp, r7 - 8026470: f85d 7b04 ldr.w r7, [sp], #4 - 8026474: 4770 bx lr + 80264dc: 687b ldr r3, [r7, #4] + 80264de: 689b ldr r3, [r3, #8] + 80264e0: f003 0304 and.w r3, r3, #4 + 80264e4: 2b04 cmp r3, #4 + 80264e6: d101 bne.n 80264ec + 80264e8: 2301 movs r3, #1 + 80264ea: e000 b.n 80264ee + 80264ec: 2300 movs r3, #0 +} + 80264ee: 4618 mov r0, r3 + 80264f0: 370c adds r7, #12 + 80264f2: 46bd mov sp, r7 + 80264f4: f85d 7b04 ldr.w r7, [sp], #4 + 80264f8: 4770 bx lr ... -08026478 : +080264fc : * @rmtoll CR JADSTP LL_ADC_INJ_StopConversion * @param ADCx ADC instance * @retval None */ __STATIC_INLINE void LL_ADC_INJ_StopConversion(ADC_TypeDef *ADCx) { - 8026478: b480 push {r7} - 802647a: b083 sub sp, #12 - 802647c: af00 add r7, sp, #0 - 802647e: 6078 str r0, [r7, #4] + 80264fc: b480 push {r7} + 80264fe: b083 sub sp, #12 + 8026500: af00 add r7, sp, #0 + 8026502: 6078 str r0, [r7, #4] /* Note: Write register with some additional bits forced to state reset */ /* instead of modifying only the selected bit for this function, */ /* to not interfere with bits with HW property "rs". */ MODIFY_REG(ADCx->CR, - 8026480: 687b ldr r3, [r7, #4] - 8026482: 689a ldr r2, [r3, #8] - 8026484: 4b05 ldr r3, [pc, #20] ; (802649c ) - 8026486: 4013 ands r3, r2 - 8026488: f043 0220 orr.w r2, r3, #32 - 802648c: 687b ldr r3, [r7, #4] - 802648e: 609a str r2, [r3, #8] + 8026504: 687b ldr r3, [r7, #4] + 8026506: 689a ldr r2, [r3, #8] + 8026508: 4b05 ldr r3, [pc, #20] ; (8026520 ) + 802650a: 4013 ands r3, r2 + 802650c: f043 0220 orr.w r2, r3, #32 + 8026510: 687b ldr r3, [r7, #4] + 8026512: 609a str r2, [r3, #8] ADC_CR_BITS_PROPERTY_RS, ADC_CR_JADSTP); } - 8026490: bf00 nop - 8026492: 370c adds r7, #12 - 8026494: 46bd mov sp, r7 - 8026496: f85d 7b04 ldr.w r7, [sp], #4 - 802649a: 4770 bx lr - 802649c: 7fffffc0 .word 0x7fffffc0 + 8026514: bf00 nop + 8026516: 370c adds r7, #12 + 8026518: 46bd mov sp, r7 + 802651a: f85d 7b04 ldr.w r7, [sp], #4 + 802651e: 4770 bx lr + 8026520: 7fffffc0 .word 0x7fffffc0 -080264a0 : +08026524 : * @rmtoll CR JADSTART LL_ADC_INJ_IsConversionOngoing * @param ADCx ADC instance * @retval 0: no conversion is on going on ADC group injected. */ __STATIC_INLINE uint32_t LL_ADC_INJ_IsConversionOngoing(ADC_TypeDef *ADCx) { - 80264a0: b480 push {r7} - 80264a2: b083 sub sp, #12 - 80264a4: af00 add r7, sp, #0 - 80264a6: 6078 str r0, [r7, #4] + 8026524: b480 push {r7} + 8026526: b083 sub sp, #12 + 8026528: af00 add r7, sp, #0 + 802652a: 6078 str r0, [r7, #4] return ((READ_BIT(ADCx->CR, ADC_CR_JADSTART) == (ADC_CR_JADSTART)) ? 1UL : 0UL); - 80264a8: 687b ldr r3, [r7, #4] - 80264aa: 689b ldr r3, [r3, #8] - 80264ac: f003 0308 and.w r3, r3, #8 - 80264b0: 2b08 cmp r3, #8 - 80264b2: d101 bne.n 80264b8 - 80264b4: 2301 movs r3, #1 - 80264b6: e000 b.n 80264ba - 80264b8: 2300 movs r3, #0 -} - 80264ba: 4618 mov r0, r3 - 80264bc: 370c adds r7, #12 - 80264be: 46bd mov sp, r7 - 80264c0: f85d 7b04 ldr.w r7, [sp], #4 - 80264c4: 4770 bx lr + 802652c: 687b ldr r3, [r7, #4] + 802652e: 689b ldr r3, [r3, #8] + 8026530: f003 0308 and.w r3, r3, #8 + 8026534: 2b08 cmp r3, #8 + 8026536: d101 bne.n 802653c + 8026538: 2301 movs r3, #1 + 802653a: e000 b.n 802653e + 802653c: 2300 movs r3, #0 +} + 802653e: 4618 mov r0, r3 + 8026540: 370c adds r7, #12 + 8026542: 46bd mov sp, r7 + 8026544: f85d 7b04 ldr.w r7, [sp], #4 + 8026548: 4770 bx lr ... -080264c8 : +0802654c : * without disabling the other ADCs. * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc) { - 80264c8: b590 push {r4, r7, lr} - 80264ca: b089 sub sp, #36 ; 0x24 - 80264cc: af00 add r7, sp, #0 - 80264ce: 6078 str r0, [r7, #4] + 802654c: b590 push {r4, r7, lr} + 802654e: b089 sub sp, #36 ; 0x24 + 8026550: af00 add r7, sp, #0 + 8026552: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80264d0: 2300 movs r3, #0 - 80264d2: 77fb strb r3, [r7, #31] + 8026554: 2300 movs r3, #0 + 8026556: 77fb strb r3, [r7, #31] uint32_t tmpCFGR; uint32_t tmp_adc_reg_is_conversion_on_going; __IO uint32_t wait_loop_index = 0UL; - 80264d4: 2300 movs r3, #0 - 80264d6: 60bb str r3, [r7, #8] + 8026558: 2300 movs r3, #0 + 802655a: 60bb str r3, [r7, #8] uint32_t tmp_adc_is_conversion_on_going_regular; uint32_t tmp_adc_is_conversion_on_going_injected; /* Check ADC handle */ if (hadc == NULL) - 80264d8: 687b ldr r3, [r7, #4] - 80264da: 2b00 cmp r3, #0 - 80264dc: d101 bne.n 80264e2 + 802655c: 687b ldr r3, [r7, #4] + 802655e: 2b00 cmp r3, #0 + 8026560: d101 bne.n 8026566 { return HAL_ERROR; - 80264de: 2301 movs r3, #1 - 80264e0: e18f b.n 8026802 + 8026562: 2301 movs r3, #1 + 8026564: e18f b.n 8026886 assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode)); if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - 80264e2: 687b ldr r3, [r7, #4] - 80264e4: 68db ldr r3, [r3, #12] - 80264e6: 2b00 cmp r3, #0 + 8026566: 687b ldr r3, [r7, #4] + 8026568: 68db ldr r3, [r3, #12] + 802656a: 2b00 cmp r3, #0 /* DISCEN and CONT bits cannot be set at the same time */ assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == ENABLE))); /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 80264e8: 687b ldr r3, [r7, #4] - 80264ea: 6d5b ldr r3, [r3, #84] ; 0x54 - 80264ec: 2b00 cmp r3, #0 - 80264ee: d109 bne.n 8026504 + 802656c: 687b ldr r3, [r7, #4] + 802656e: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026570: 2b00 cmp r3, #0 + 8026572: d109 bne.n 8026588 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 80264f0: 6878 ldr r0, [r7, #4] - 80264f2: f7fc fd37 bl 8022f64 + 8026574: 6878 ldr r0, [r7, #4] + 8026576: f7fc fcf5 bl 8022f64 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 80264f6: 687b ldr r3, [r7, #4] - 80264f8: 2200 movs r2, #0 - 80264fa: 659a str r2, [r3, #88] ; 0x58 + 802657a: 687b ldr r3, [r7, #4] + 802657c: 2200 movs r2, #0 + 802657e: 659a str r2, [r3, #88] ; 0x58 /* Initialize Lock */ hadc->Lock = HAL_UNLOCKED; - 80264fc: 687b ldr r3, [r7, #4] - 80264fe: 2200 movs r2, #0 - 8026500: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8026580: 687b ldr r3, [r7, #4] + 8026582: 2200 movs r2, #0 + 8026584: f883 2050 strb.w r2, [r3, #80] ; 0x50 } /* - Exit from deep-power-down mode and ADC voltage regulator enable */ if (LL_ADC_IsDeepPowerDownEnabled(hadc->Instance) != 0UL) - 8026504: 687b ldr r3, [r7, #4] - 8026506: 681b ldr r3, [r3, #0] - 8026508: 4618 mov r0, r3 - 802650a: f7ff feef bl 80262ec - 802650e: 4603 mov r3, r0 - 8026510: 2b00 cmp r3, #0 - 8026512: d004 beq.n 802651e + 8026588: 687b ldr r3, [r7, #4] + 802658a: 681b ldr r3, [r3, #0] + 802658c: 4618 mov r0, r3 + 802658e: f7ff feef bl 8026370 + 8026592: 4603 mov r3, r0 + 8026594: 2b00 cmp r3, #0 + 8026596: d004 beq.n 80265a2 { /* Disable ADC deep power down mode */ LL_ADC_DisableDeepPowerDown(hadc->Instance); - 8026514: 687b ldr r3, [r7, #4] - 8026516: 681b ldr r3, [r3, #0] - 8026518: 4618 mov r0, r3 - 802651a: f7ff fed5 bl 80262c8 + 8026598: 687b ldr r3, [r7, #4] + 802659a: 681b ldr r3, [r3, #0] + 802659c: 4618 mov r0, r3 + 802659e: f7ff fed5 bl 802634c /* System was in deep power down mode, calibration must be relaunched or a previously saved calibration factor re-applied once the ADC voltage regulator is enabled */ } if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) - 802651e: 687b ldr r3, [r7, #4] - 8026520: 681b ldr r3, [r3, #0] - 8026522: 4618 mov r0, r3 - 8026524: f7ff ff0a bl 802633c - 8026528: 4603 mov r3, r0 - 802652a: 2b00 cmp r3, #0 - 802652c: d114 bne.n 8026558 + 80265a2: 687b ldr r3, [r7, #4] + 80265a4: 681b ldr r3, [r3, #0] + 80265a6: 4618 mov r0, r3 + 80265a8: f7ff ff0a bl 80263c0 + 80265ac: 4603 mov r3, r0 + 80265ae: 2b00 cmp r3, #0 + 80265b0: d114 bne.n 80265dc { /* Enable ADC internal voltage regulator */ LL_ADC_EnableInternalRegulator(hadc->Instance); - 802652e: 687b ldr r3, [r7, #4] - 8026530: 681b ldr r3, [r3, #0] - 8026532: 4618 mov r0, r3 - 8026534: f7ff feee bl 8026314 + 80265b2: 687b ldr r3, [r7, #4] + 80265b4: 681b ldr r3, [r3, #0] + 80265b6: 4618 mov r0, r3 + 80265b8: f7ff feee bl 8026398 /* Note: Variable divided by 2 to compensate partially */ /* CPU processing cycles, scaling in us split to not */ /* exceed 32 bits register capacity and handle low frequency. */ wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL)); - 8026538: 4b87 ldr r3, [pc, #540] ; (8026758 ) - 802653a: 681b ldr r3, [r3, #0] - 802653c: 099b lsrs r3, r3, #6 - 802653e: 4a87 ldr r2, [pc, #540] ; (802675c ) - 8026540: fba2 2303 umull r2, r3, r2, r3 - 8026544: 099b lsrs r3, r3, #6 - 8026546: 3301 adds r3, #1 - 8026548: 60bb str r3, [r7, #8] + 80265bc: 4b87 ldr r3, [pc, #540] ; (80267dc ) + 80265be: 681b ldr r3, [r3, #0] + 80265c0: 099b lsrs r3, r3, #6 + 80265c2: 4a87 ldr r2, [pc, #540] ; (80267e0 ) + 80265c4: fba2 2303 umull r2, r3, r2, r3 + 80265c8: 099b lsrs r3, r3, #6 + 80265ca: 3301 adds r3, #1 + 80265cc: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 802654a: e002 b.n 8026552 + 80265ce: e002 b.n 80265d6 { wait_loop_index--; - 802654c: 68bb ldr r3, [r7, #8] - 802654e: 3b01 subs r3, #1 - 8026550: 60bb str r3, [r7, #8] + 80265d0: 68bb ldr r3, [r7, #8] + 80265d2: 3b01 subs r3, #1 + 80265d4: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 8026552: 68bb ldr r3, [r7, #8] - 8026554: 2b00 cmp r3, #0 - 8026556: d1f9 bne.n 802654c + 80265d6: 68bb ldr r3, [r7, #8] + 80265d8: 2b00 cmp r3, #0 + 80265da: d1f9 bne.n 80265d0 } /* Verification that ADC voltage regulator is correctly enabled, whether */ /* or not ADC is coming from state reset (if any potential problem of */ /* clocking, voltage regulator would not be enabled). */ if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL) - 8026558: 687b ldr r3, [r7, #4] - 802655a: 681b ldr r3, [r3, #0] - 802655c: 4618 mov r0, r3 - 802655e: f7ff feed bl 802633c - 8026562: 4603 mov r3, r0 - 8026564: 2b00 cmp r3, #0 - 8026566: d10d bne.n 8026584 + 80265dc: 687b ldr r3, [r7, #4] + 80265de: 681b ldr r3, [r3, #0] + 80265e0: 4618 mov r0, r3 + 80265e2: f7ff feed bl 80263c0 + 80265e6: 4603 mov r3, r0 + 80265e8: 2b00 cmp r3, #0 + 80265ea: d10d bne.n 8026608 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8026568: 687b ldr r3, [r7, #4] - 802656a: 6d5b ldr r3, [r3, #84] ; 0x54 - 802656c: f043 0210 orr.w r2, r3, #16 - 8026570: 687b ldr r3, [r7, #4] - 8026572: 655a str r2, [r3, #84] ; 0x54 + 80265ec: 687b ldr r3, [r7, #4] + 80265ee: 6d5b ldr r3, [r3, #84] ; 0x54 + 80265f0: f043 0210 orr.w r2, r3, #16 + 80265f4: 687b ldr r3, [r7, #4] + 80265f6: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8026574: 687b ldr r3, [r7, #4] - 8026576: 6d9b ldr r3, [r3, #88] ; 0x58 - 8026578: f043 0201 orr.w r2, r3, #1 - 802657c: 687b ldr r3, [r7, #4] - 802657e: 659a str r2, [r3, #88] ; 0x58 + 80265f8: 687b ldr r3, [r7, #4] + 80265fa: 6d9b ldr r3, [r3, #88] ; 0x58 + 80265fc: f043 0201 orr.w r2, r3, #1 + 8026600: 687b ldr r3, [r7, #4] + 8026602: 659a str r2, [r3, #88] ; 0x58 tmp_hal_status = HAL_ERROR; - 8026580: 2301 movs r3, #1 - 8026582: 77fb strb r3, [r7, #31] + 8026604: 2301 movs r3, #1 + 8026606: 77fb strb r3, [r7, #31] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed and if there is no conversion on going on regular */ /* group (ADC may already be enabled at this point if HAL_ADC_Init() is */ /* called to update a parameter on the fly). */ tmp_adc_reg_is_conversion_on_going = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 8026584: 687b ldr r3, [r7, #4] - 8026586: 681b ldr r3, [r3, #0] - 8026588: 4618 mov r0, r3 - 802658a: f7ff ff61 bl 8026450 - 802658e: 6178 str r0, [r7, #20] + 8026608: 687b ldr r3, [r7, #4] + 802660a: 681b ldr r3, [r3, #0] + 802660c: 4618 mov r0, r3 + 802660e: f7ff ff61 bl 80264d4 + 8026612: 6178 str r0, [r7, #20] if (((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL) - 8026590: 687b ldr r3, [r7, #4] - 8026592: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026594: f003 0310 and.w r3, r3, #16 - 8026598: 2b00 cmp r3, #0 - 802659a: f040 8129 bne.w 80267f0 + 8026614: 687b ldr r3, [r7, #4] + 8026616: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026618: f003 0310 and.w r3, r3, #16 + 802661c: 2b00 cmp r3, #0 + 802661e: f040 8129 bne.w 8026874 && (tmp_adc_reg_is_conversion_on_going == 0UL) - 802659e: 697b ldr r3, [r7, #20] - 80265a0: 2b00 cmp r3, #0 - 80265a2: f040 8125 bne.w 80267f0 + 8026622: 697b ldr r3, [r7, #20] + 8026624: 2b00 cmp r3, #0 + 8026626: f040 8125 bne.w 8026874 ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 80265a6: 687b ldr r3, [r7, #4] - 80265a8: 6d5b ldr r3, [r3, #84] ; 0x54 - 80265aa: f423 7381 bic.w r3, r3, #258 ; 0x102 - 80265ae: f043 0202 orr.w r2, r3, #2 - 80265b2: 687b ldr r3, [r7, #4] - 80265b4: 655a str r2, [r3, #84] ; 0x54 + 802662a: 687b ldr r3, [r7, #4] + 802662c: 6d5b ldr r3, [r3, #84] ; 0x54 + 802662e: f423 7381 bic.w r3, r3, #258 ; 0x102 + 8026632: f043 0202 orr.w r2, r3, #2 + 8026636: 687b ldr r3, [r7, #4] + 8026638: 655a str r2, [r3, #84] ; 0x54 /* Configuration of common ADC parameters */ /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated only when ADC is disabled: */ /* - clock configuration */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 80265b6: 687b ldr r3, [r7, #4] - 80265b8: 681b ldr r3, [r3, #0] - 80265ba: 4618 mov r0, r3 - 80265bc: f7ff fefa bl 80263b4 - 80265c0: 4603 mov r3, r0 - 80265c2: 2b00 cmp r3, #0 - 80265c4: d136 bne.n 8026634 + 802663a: 687b ldr r3, [r7, #4] + 802663c: 681b ldr r3, [r3, #0] + 802663e: 4618 mov r0, r3 + 8026640: f7ff fefa bl 8026438 + 8026644: 4603 mov r3, r0 + 8026646: 2b00 cmp r3, #0 + 8026648: d136 bne.n 80266b8 { if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) - 80265c6: 687b ldr r3, [r7, #4] - 80265c8: 681b ldr r3, [r3, #0] - 80265ca: 4a65 ldr r2, [pc, #404] ; (8026760 ) - 80265cc: 4293 cmp r3, r2 - 80265ce: d004 beq.n 80265da - 80265d0: 687b ldr r3, [r7, #4] - 80265d2: 681b ldr r3, [r3, #0] - 80265d4: 4a63 ldr r2, [pc, #396] ; (8026764 ) - 80265d6: 4293 cmp r3, r2 - 80265d8: d10e bne.n 80265f8 - 80265da: 4861 ldr r0, [pc, #388] ; (8026760 ) - 80265dc: f7ff feea bl 80263b4 - 80265e0: 4604 mov r4, r0 - 80265e2: 4860 ldr r0, [pc, #384] ; (8026764 ) - 80265e4: f7ff fee6 bl 80263b4 - 80265e8: 4603 mov r3, r0 - 80265ea: 4323 orrs r3, r4 - 80265ec: 2b00 cmp r3, #0 - 80265ee: bf0c ite eq - 80265f0: 2301 moveq r3, #1 - 80265f2: 2300 movne r3, #0 - 80265f4: b2db uxtb r3, r3 - 80265f6: e008 b.n 802660a - 80265f8: 485b ldr r0, [pc, #364] ; (8026768 ) - 80265fa: f7ff fedb bl 80263b4 - 80265fe: 4603 mov r3, r0 - 8026600: 2b00 cmp r3, #0 - 8026602: bf0c ite eq - 8026604: 2301 moveq r3, #1 - 8026606: 2300 movne r3, #0 - 8026608: b2db uxtb r3, r3 - 802660a: 2b00 cmp r3, #0 - 802660c: d012 beq.n 8026634 + 802664a: 687b ldr r3, [r7, #4] + 802664c: 681b ldr r3, [r3, #0] + 802664e: 4a65 ldr r2, [pc, #404] ; (80267e4 ) + 8026650: 4293 cmp r3, r2 + 8026652: d004 beq.n 802665e + 8026654: 687b ldr r3, [r7, #4] + 8026656: 681b ldr r3, [r3, #0] + 8026658: 4a63 ldr r2, [pc, #396] ; (80267e8 ) + 802665a: 4293 cmp r3, r2 + 802665c: d10e bne.n 802667c + 802665e: 4861 ldr r0, [pc, #388] ; (80267e4 ) + 8026660: f7ff feea bl 8026438 + 8026664: 4604 mov r4, r0 + 8026666: 4860 ldr r0, [pc, #384] ; (80267e8 ) + 8026668: f7ff fee6 bl 8026438 + 802666c: 4603 mov r3, r0 + 802666e: 4323 orrs r3, r4 + 8026670: 2b00 cmp r3, #0 + 8026672: bf0c ite eq + 8026674: 2301 moveq r3, #1 + 8026676: 2300 movne r3, #0 + 8026678: b2db uxtb r3, r3 + 802667a: e008 b.n 802668e + 802667c: 485b ldr r0, [pc, #364] ; (80267ec ) + 802667e: f7ff fedb bl 8026438 + 8026682: 4603 mov r3, r0 + 8026684: 2b00 cmp r3, #0 + 8026686: bf0c ite eq + 8026688: 2301 moveq r3, #1 + 802668a: 2300 movne r3, #0 + 802668c: b2db uxtb r3, r3 + 802668e: 2b00 cmp r3, #0 + 8026690: d012 beq.n 80266b8 /* parameters: MDMA, DMACFG, DELAY, DUAL (set by API */ /* HAL_ADCEx_MultiModeConfigChannel() ) */ /* - internal measurement paths: Vbat, temperature sensor, Vref */ /* (set into HAL_ADC_ConfigChannel() or */ /* HAL_ADCEx_InjectedConfigChannel() ) */ LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(hadc->Instance), hadc->Init.ClockPrescaler); - 802660e: 687b ldr r3, [r7, #4] - 8026610: 681b ldr r3, [r3, #0] - 8026612: 4a53 ldr r2, [pc, #332] ; (8026760 ) - 8026614: 4293 cmp r3, r2 - 8026616: d004 beq.n 8026622 - 8026618: 687b ldr r3, [r7, #4] - 802661a: 681b ldr r3, [r3, #0] - 802661c: 4a51 ldr r2, [pc, #324] ; (8026764 ) - 802661e: 4293 cmp r3, r2 - 8026620: d101 bne.n 8026626 - 8026622: 4a52 ldr r2, [pc, #328] ; (802676c ) - 8026624: e000 b.n 8026628 - 8026626: 4a52 ldr r2, [pc, #328] ; (8026770 ) - 8026628: 687b ldr r3, [r7, #4] - 802662a: 685b ldr r3, [r3, #4] - 802662c: 4619 mov r1, r3 - 802662e: 4610 mov r0, r2 - 8026630: f7ff fd18 bl 8026064 + 8026692: 687b ldr r3, [r7, #4] + 8026694: 681b ldr r3, [r3, #0] + 8026696: 4a53 ldr r2, [pc, #332] ; (80267e4 ) + 8026698: 4293 cmp r3, r2 + 802669a: d004 beq.n 80266a6 + 802669c: 687b ldr r3, [r7, #4] + 802669e: 681b ldr r3, [r3, #0] + 80266a0: 4a51 ldr r2, [pc, #324] ; (80267e8 ) + 80266a2: 4293 cmp r3, r2 + 80266a4: d101 bne.n 80266aa + 80266a6: 4a52 ldr r2, [pc, #328] ; (80267f0 ) + 80266a8: e000 b.n 80266ac + 80266aa: 4a52 ldr r2, [pc, #328] ; (80267f4 ) + 80266ac: 687b ldr r3, [r7, #4] + 80266ae: 685b ldr r3, [r3, #4] + 80266b0: 4619 mov r1, r3 + 80266b2: 4610 mov r0, r2 + 80266b4: f7ff fd18 bl 80260e8 ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode)); } #else if ((HAL_GetREVID() > REV_ID_Y) && (ADC_RESOLUTION_8B == hadc->Init.Resolution)) - 8026634: f7ff fcf6 bl 8026024 - 8026638: 4603 mov r3, r0 - 802663a: f241 0203 movw r2, #4099 ; 0x1003 - 802663e: 4293 cmp r3, r2 - 8026640: d914 bls.n 802666c - 8026642: 687b ldr r3, [r7, #4] - 8026644: 689b ldr r3, [r3, #8] - 8026646: 2b10 cmp r3, #16 - 8026648: d110 bne.n 802666c + 80266b8: f7ff fcf6 bl 80260a8 + 80266bc: 4603 mov r3, r0 + 80266be: f241 0203 movw r2, #4099 ; 0x1003 + 80266c2: 4293 cmp r3, r2 + 80266c4: d914 bls.n 80266f0 + 80266c6: 687b ldr r3, [r7, #4] + 80266c8: 689b ldr r3, [r3, #8] + 80266ca: 2b10 cmp r3, #16 + 80266cc: d110 bne.n 80266f0 { /* for STM32H7 silicon rev.B and above , ADC_CFGR_RES value for 8bits resolution is : b111 */ tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 802664a: 687b ldr r3, [r7, #4] - 802664c: 7d5b ldrb r3, [r3, #21] - 802664e: 035a lsls r2, r3, #13 + 80266ce: 687b ldr r3, [r7, #4] + 80266d0: 7d5b ldrb r3, [r3, #21] + 80266d2: 035a lsls r2, r3, #13 hadc->Init.Overrun | - 8026650: 687b ldr r3, [r7, #4] - 8026652: 6b1b ldr r3, [r3, #48] ; 0x30 + 80266d4: 687b ldr r3, [r7, #4] + 80266d6: 6b1b ldr r3, [r3, #48] ; 0x30 tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8026654: 431a orrs r2, r3 + 80266d8: 431a orrs r2, r3 hadc->Init.Resolution | (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) | - 8026656: 687b ldr r3, [r7, #4] - 8026658: 689b ldr r3, [r3, #8] + 80266da: 687b ldr r3, [r7, #4] + 80266dc: 689b ldr r3, [r3, #8] hadc->Init.Overrun | - 802665a: 431a orrs r2, r3 + 80266de: 431a orrs r2, r3 ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode)); - 802665c: 687b ldr r3, [r7, #4] - 802665e: 7f1b ldrb r3, [r3, #28] - 8026660: 041b lsls r3, r3, #16 + 80266e0: 687b ldr r3, [r7, #4] + 80266e2: 7f1b ldrb r3, [r3, #28] + 80266e4: 041b lsls r3, r3, #16 hadc->Init.Resolution | (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) | - 8026662: 4313 orrs r3, r2 + 80266e6: 4313 orrs r3, r2 tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8026664: f043 030c orr.w r3, r3, #12 - 8026668: 61bb str r3, [r7, #24] - 802666a: e00d b.n 8026688 + 80266e8: f043 030c orr.w r3, r3, #12 + 80266ec: 61bb str r3, [r7, #24] + 80266ee: e00d b.n 802670c } else { tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 802666c: 687b ldr r3, [r7, #4] - 802666e: 7d5b ldrb r3, [r3, #21] - 8026670: 035a lsls r2, r3, #13 + 80266f0: 687b ldr r3, [r7, #4] + 80266f2: 7d5b ldrb r3, [r3, #21] + 80266f4: 035a lsls r2, r3, #13 hadc->Init.Overrun | - 8026672: 687b ldr r3, [r7, #4] - 8026674: 6b1b ldr r3, [r3, #48] ; 0x30 + 80266f6: 687b ldr r3, [r7, #4] + 80266f8: 6b1b ldr r3, [r3, #48] ; 0x30 tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8026676: 431a orrs r2, r3 + 80266fa: 431a orrs r2, r3 hadc->Init.Resolution | - 8026678: 687b ldr r3, [r7, #4] - 802667a: 689b ldr r3, [r3, #8] + 80266fc: 687b ldr r3, [r7, #4] + 80266fe: 689b ldr r3, [r3, #8] hadc->Init.Overrun | - 802667c: 431a orrs r2, r3 + 8026700: 431a orrs r2, r3 ADC_CFGR_REG_DISCONTINUOUS((uint32_t)hadc->Init.DiscontinuousConvMode)); - 802667e: 687b ldr r3, [r7, #4] - 8026680: 7f1b ldrb r3, [r3, #28] - 8026682: 041b lsls r3, r3, #16 + 8026702: 687b ldr r3, [r7, #4] + 8026704: 7f1b ldrb r3, [r3, #28] + 8026706: 041b lsls r3, r3, #16 tmpCFGR = (ADC_CFGR_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8026684: 4313 orrs r3, r2 - 8026686: 61bb str r3, [r7, #24] + 8026708: 4313 orrs r3, r2 + 802670a: 61bb str r3, [r7, #24] } #endif /* ADC_VER_V5_3 */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 8026688: 687b ldr r3, [r7, #4] - 802668a: 7f1b ldrb r3, [r3, #28] - 802668c: 2b01 cmp r3, #1 - 802668e: d106 bne.n 802669e + 802670c: 687b ldr r3, [r7, #4] + 802670e: 7f1b ldrb r3, [r3, #28] + 8026710: 2b01 cmp r3, #1 + 8026712: d106 bne.n 8026722 { tmpCFGR |= ADC_CFGR_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion); - 8026690: 687b ldr r3, [r7, #4] - 8026692: 6a1b ldr r3, [r3, #32] - 8026694: 3b01 subs r3, #1 - 8026696: 045b lsls r3, r3, #17 - 8026698: 69ba ldr r2, [r7, #24] - 802669a: 4313 orrs r3, r2 - 802669c: 61bb str r3, [r7, #24] + 8026714: 687b ldr r3, [r7, #4] + 8026716: 6a1b ldr r3, [r3, #32] + 8026718: 3b01 subs r3, #1 + 802671a: 045b lsls r3, r3, #17 + 802671c: 69ba ldr r2, [r7, #24] + 802671e: 4313 orrs r3, r2 + 8026720: 61bb str r3, [r7, #24] /* Enable external trigger if trigger selection is different of software */ /* start. */ /* Note: This configuration keeps the hardware feature of parameter */ /* ExternalTrigConvEdge "trigger edge none" equivalent to */ /* software start. */ if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) - 802669e: 687b ldr r3, [r7, #4] - 80266a0: 6a5b ldr r3, [r3, #36] ; 0x24 - 80266a2: 2b00 cmp r3, #0 - 80266a4: d009 beq.n 80266ba + 8026722: 687b ldr r3, [r7, #4] + 8026724: 6a5b ldr r3, [r3, #36] ; 0x24 + 8026726: 2b00 cmp r3, #0 + 8026728: d009 beq.n 802673e { tmpCFGR |= ((hadc->Init.ExternalTrigConv & ADC_CFGR_EXTSEL) - 80266a6: 687b ldr r3, [r7, #4] - 80266a8: 6a5b ldr r3, [r3, #36] ; 0x24 - 80266aa: f403 7278 and.w r2, r3, #992 ; 0x3e0 + 802672a: 687b ldr r3, [r7, #4] + 802672c: 6a5b ldr r3, [r3, #36] ; 0x24 + 802672e: f403 7278 and.w r2, r3, #992 ; 0x3e0 | hadc->Init.ExternalTrigConvEdge - 80266ae: 687b ldr r3, [r7, #4] - 80266b0: 6a9b ldr r3, [r3, #40] ; 0x28 - 80266b2: 4313 orrs r3, r2 + 8026732: 687b ldr r3, [r7, #4] + 8026734: 6a9b ldr r3, [r3, #40] ; 0x28 + 8026736: 4313 orrs r3, r2 tmpCFGR |= ((hadc->Init.ExternalTrigConv & ADC_CFGR_EXTSEL) - 80266b4: 69ba ldr r2, [r7, #24] - 80266b6: 4313 orrs r3, r2 - 80266b8: 61bb str r3, [r7, #24] + 8026738: 69ba ldr r2, [r7, #24] + 802673a: 4313 orrs r3, r2 + 802673c: 61bb str r3, [r7, #24] /* Update Configuration Register CFGR */ MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_1, tmpCFGR); } #else /* Update Configuration Register CFGR */ MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_1, tmpCFGR); - 80266ba: 687b ldr r3, [r7, #4] - 80266bc: 681b ldr r3, [r3, #0] - 80266be: 68da ldr r2, [r3, #12] - 80266c0: 4b2c ldr r3, [pc, #176] ; (8026774 ) - 80266c2: 4013 ands r3, r2 - 80266c4: 687a ldr r2, [r7, #4] - 80266c6: 6812 ldr r2, [r2, #0] - 80266c8: 69b9 ldr r1, [r7, #24] - 80266ca: 430b orrs r3, r1 - 80266cc: 60d3 str r3, [r2, #12] + 802673e: 687b ldr r3, [r7, #4] + 8026740: 681b ldr r3, [r3, #0] + 8026742: 68da ldr r2, [r3, #12] + 8026744: 4b2c ldr r3, [pc, #176] ; (80267f8 ) + 8026746: 4013 ands r3, r2 + 8026748: 687a ldr r2, [r7, #4] + 802674a: 6812 ldr r2, [r2, #0] + 802674c: 69b9 ldr r1, [r7, #24] + 802674e: 430b orrs r3, r1 + 8026750: 60d3 str r3, [r2, #12] /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular and injected groups: */ /* - Conversion data management Init.ConversionDataManagement */ /* - LowPowerAutoWait feature Init.LowPowerAutoWait */ /* - Oversampling parameters Init.Oversampling */ tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 80266ce: 687b ldr r3, [r7, #4] - 80266d0: 681b ldr r3, [r3, #0] - 80266d2: 4618 mov r0, r3 - 80266d4: f7ff febc bl 8026450 - 80266d8: 6138 str r0, [r7, #16] + 8026752: 687b ldr r3, [r7, #4] + 8026754: 681b ldr r3, [r3, #0] + 8026756: 4618 mov r0, r3 + 8026758: f7ff febc bl 80264d4 + 802675c: 6138 str r0, [r7, #16] tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); - 80266da: 687b ldr r3, [r7, #4] - 80266dc: 681b ldr r3, [r3, #0] - 80266de: 4618 mov r0, r3 - 80266e0: f7ff fede bl 80264a0 - 80266e4: 60f8 str r0, [r7, #12] + 802675e: 687b ldr r3, [r7, #4] + 8026760: 681b ldr r3, [r3, #0] + 8026762: 4618 mov r0, r3 + 8026764: f7ff fede bl 8026524 + 8026768: 60f8 str r0, [r7, #12] if ((tmp_adc_is_conversion_on_going_regular == 0UL) - 80266e6: 693b ldr r3, [r7, #16] - 80266e8: 2b00 cmp r3, #0 - 80266ea: d15f bne.n 80267ac + 802676a: 693b ldr r3, [r7, #16] + 802676c: 2b00 cmp r3, #0 + 802676e: d15f bne.n 8026830 && (tmp_adc_is_conversion_on_going_injected == 0UL) - 80266ec: 68fb ldr r3, [r7, #12] - 80266ee: 2b00 cmp r3, #0 - 80266f0: d15c bne.n 80267ac + 8026770: 68fb ldr r3, [r7, #12] + 8026772: 2b00 cmp r3, #0 + 8026774: d15c bne.n 8026830 ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.ConversionDataManagement)); } #else tmpCFGR = ( ADC_CFGR_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | - 80266f2: 687b ldr r3, [r7, #4] - 80266f4: 7d1b ldrb r3, [r3, #20] - 80266f6: 039a lsls r2, r3, #14 + 8026776: 687b ldr r3, [r7, #4] + 8026778: 7d1b ldrb r3, [r3, #20] + 802677a: 039a lsls r2, r3, #14 ADC_CFGR_DMACONTREQ((uint32_t)hadc->Init.ConversionDataManagement)); - 80266f8: 687b ldr r3, [r7, #4] - 80266fa: 6adb ldr r3, [r3, #44] ; 0x2c + 802677c: 687b ldr r3, [r7, #4] + 802677e: 6adb ldr r3, [r3, #44] ; 0x2c tmpCFGR = ( - 80266fc: 4313 orrs r3, r2 - 80266fe: 61bb str r3, [r7, #24] + 8026780: 4313 orrs r3, r2 + 8026782: 61bb str r3, [r7, #24] #endif MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_2, tmpCFGR); - 8026700: 687b ldr r3, [r7, #4] - 8026702: 681b ldr r3, [r3, #0] - 8026704: 68da ldr r2, [r3, #12] - 8026706: 4b1c ldr r3, [pc, #112] ; (8026778 ) - 8026708: 4013 ands r3, r2 - 802670a: 687a ldr r2, [r7, #4] - 802670c: 6812 ldr r2, [r2, #0] - 802670e: 69b9 ldr r1, [r7, #24] - 8026710: 430b orrs r3, r1 - 8026712: 60d3 str r3, [r2, #12] + 8026784: 687b ldr r3, [r7, #4] + 8026786: 681b ldr r3, [r3, #0] + 8026788: 68da ldr r2, [r3, #12] + 802678a: 4b1c ldr r3, [pc, #112] ; (80267fc ) + 802678c: 4013 ands r3, r2 + 802678e: 687a ldr r2, [r7, #4] + 8026790: 6812 ldr r2, [r2, #0] + 8026792: 69b9 ldr r1, [r7, #24] + 8026794: 430b orrs r3, r1 + 8026796: 60d3 str r3, [r2, #12] if (hadc->Init.OversamplingMode == ENABLE) - 8026714: 687b ldr r3, [r7, #4] - 8026716: f893 3038 ldrb.w r3, [r3, #56] ; 0x38 - 802671a: 2b01 cmp r3, #1 - 802671c: d130 bne.n 8026780 + 8026798: 687b ldr r3, [r7, #4] + 802679a: f893 3038 ldrb.w r3, [r3, #56] ; 0x38 + 802679e: 2b01 cmp r3, #1 + 80267a0: d130 bne.n 8026804 #endif assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversampling.RightBitShift)); assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversampling.TriggeredMode)); assert_param(IS_ADC_REGOVERSAMPLING_MODE(hadc->Init.Oversampling.OversamplingStopReset)); if ((hadc->Init.ExternalTrigConv == ADC_SOFTWARE_START) - 802671e: 687b ldr r3, [r7, #4] - 8026720: 6a5b ldr r3, [r3, #36] ; 0x24 - 8026722: 2b00 cmp r3, #0 + 80267a2: 687b ldr r3, [r7, #4] + 80267a4: 6a5b ldr r3, [r3, #36] ; 0x24 + 80267a6: 2b00 cmp r3, #0 /* - Oversampling Ratio */ /* - Right bit shift */ /* - Left bit shift */ /* - Triggered mode */ /* - Oversampling mode (continued/resumed) */ MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_FIELDS, - 8026724: 687b ldr r3, [r7, #4] - 8026726: 681b ldr r3, [r3, #0] - 8026728: 691a ldr r2, [r3, #16] - 802672a: 4b14 ldr r3, [pc, #80] ; (802677c ) - 802672c: 4013 ands r3, r2 - 802672e: 687a ldr r2, [r7, #4] - 8026730: 6bd2 ldr r2, [r2, #60] ; 0x3c - 8026732: 3a01 subs r2, #1 - 8026734: 0411 lsls r1, r2, #16 - 8026736: 687a ldr r2, [r7, #4] - 8026738: 6c12 ldr r2, [r2, #64] ; 0x40 - 802673a: 4311 orrs r1, r2 - 802673c: 687a ldr r2, [r7, #4] - 802673e: 6c52 ldr r2, [r2, #68] ; 0x44 - 8026740: 4311 orrs r1, r2 - 8026742: 687a ldr r2, [r7, #4] - 8026744: 6c92 ldr r2, [r2, #72] ; 0x48 - 8026746: 430a orrs r2, r1 - 8026748: 431a orrs r2, r3 - 802674a: 687b ldr r3, [r7, #4] - 802674c: 681b ldr r3, [r3, #0] - 802674e: f042 0201 orr.w r2, r2, #1 - 8026752: 611a str r2, [r3, #16] - 8026754: e01c b.n 8026790 - 8026756: bf00 nop - 8026758: 24000048 .word 0x24000048 - 802675c: 053e2d63 .word 0x053e2d63 - 8026760: 40022000 .word 0x40022000 - 8026764: 40022100 .word 0x40022100 - 8026768: 58026000 .word 0x58026000 - 802676c: 40022300 .word 0x40022300 - 8026770: 58026300 .word 0x58026300 - 8026774: fff0c003 .word 0xfff0c003 - 8026778: ffffbffc .word 0xffffbffc - 802677c: fc00f81e .word 0xfc00f81e + 80267a8: 687b ldr r3, [r7, #4] + 80267aa: 681b ldr r3, [r3, #0] + 80267ac: 691a ldr r2, [r3, #16] + 80267ae: 4b14 ldr r3, [pc, #80] ; (8026800 ) + 80267b0: 4013 ands r3, r2 + 80267b2: 687a ldr r2, [r7, #4] + 80267b4: 6bd2 ldr r2, [r2, #60] ; 0x3c + 80267b6: 3a01 subs r2, #1 + 80267b8: 0411 lsls r1, r2, #16 + 80267ba: 687a ldr r2, [r7, #4] + 80267bc: 6c12 ldr r2, [r2, #64] ; 0x40 + 80267be: 4311 orrs r1, r2 + 80267c0: 687a ldr r2, [r7, #4] + 80267c2: 6c52 ldr r2, [r2, #68] ; 0x44 + 80267c4: 4311 orrs r1, r2 + 80267c6: 687a ldr r2, [r7, #4] + 80267c8: 6c92 ldr r2, [r2, #72] ; 0x48 + 80267ca: 430a orrs r2, r1 + 80267cc: 431a orrs r2, r3 + 80267ce: 687b ldr r3, [r7, #4] + 80267d0: 681b ldr r3, [r3, #0] + 80267d2: f042 0201 orr.w r2, r2, #1 + 80267d6: 611a str r2, [r3, #16] + 80267d8: e01c b.n 8026814 + 80267da: bf00 nop + 80267dc: 24000048 .word 0x24000048 + 80267e0: 053e2d63 .word 0x053e2d63 + 80267e4: 40022000 .word 0x40022000 + 80267e8: 40022100 .word 0x40022100 + 80267ec: 58026000 .word 0x58026000 + 80267f0: 40022300 .word 0x40022300 + 80267f4: 58026300 .word 0x58026300 + 80267f8: fff0c003 .word 0xfff0c003 + 80267fc: ffffbffc .word 0xffffbffc + 8026800: fc00f81e .word 0xfc00f81e } else { /* Disable ADC oversampling scope on ADC group regular */ CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE); - 8026780: 687b ldr r3, [r7, #4] - 8026782: 681b ldr r3, [r3, #0] - 8026784: 691a ldr r2, [r3, #16] - 8026786: 687b ldr r3, [r7, #4] - 8026788: 681b ldr r3, [r3, #0] - 802678a: f022 0201 bic.w r2, r2, #1 - 802678e: 611a str r2, [r3, #16] + 8026804: 687b ldr r3, [r7, #4] + 8026806: 681b ldr r3, [r3, #0] + 8026808: 691a ldr r2, [r3, #16] + 802680a: 687b ldr r3, [r7, #4] + 802680c: 681b ldr r3, [r3, #0] + 802680e: f022 0201 bic.w r2, r2, #1 + 8026812: 611a str r2, [r3, #16] } /* Set the LeftShift parameter: it is applied to the final result with or without oversampling */ MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_LSHIFT, hadc->Init.LeftBitShift); - 8026790: 687b ldr r3, [r7, #4] - 8026792: 681b ldr r3, [r3, #0] - 8026794: 691b ldr r3, [r3, #16] - 8026796: f023 4170 bic.w r1, r3, #4026531840 ; 0xf0000000 - 802679a: 687b ldr r3, [r7, #4] - 802679c: 6b5a ldr r2, [r3, #52] ; 0x34 - 802679e: 687b ldr r3, [r7, #4] - 80267a0: 681b ldr r3, [r3, #0] - 80267a2: 430a orrs r2, r1 - 80267a4: 611a str r2, [r3, #16] + 8026814: 687b ldr r3, [r7, #4] + 8026816: 681b ldr r3, [r3, #0] + 8026818: 691b ldr r3, [r3, #16] + 802681a: f023 4170 bic.w r1, r3, #4026531840 ; 0xf0000000 + 802681e: 687b ldr r3, [r7, #4] + 8026820: 6b5a ldr r2, [r3, #52] ; 0x34 + 8026822: 687b ldr r3, [r7, #4] + 8026824: 681b ldr r3, [r3, #0] + 8026826: 430a orrs r2, r1 + 8026828: 611a str r2, [r3, #16] /* Configure the BOOST Mode */ ADC_ConfigureBoostMode(hadc); } #else /* Configure the BOOST Mode */ ADC_ConfigureBoostMode(hadc); - 80267a6: 6878 ldr r0, [r7, #4] - 80267a8: f000 ff26 bl 80275f8 + 802682a: 6878 ldr r0, [r7, #4] + 802682c: f000 ff26 bl 802767c /* Note: Scan mode is not present by hardware on this device, but */ /* emulated by software for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion". */ if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE) - 80267ac: 687b ldr r3, [r7, #4] - 80267ae: 68db ldr r3, [r3, #12] - 80267b0: 2b01 cmp r3, #1 - 80267b2: d10c bne.n 80267ce + 8026830: 687b ldr r3, [r7, #4] + 8026832: 68db ldr r3, [r3, #12] + 8026834: 2b01 cmp r3, #1 + 8026836: d10c bne.n 8026852 { /* Set number of ranks in regular group sequencer */ MODIFY_REG(hadc->Instance->SQR1, ADC_SQR1_L, (hadc->Init.NbrOfConversion - (uint8_t)1)); - 80267b4: 687b ldr r3, [r7, #4] - 80267b6: 681b ldr r3, [r3, #0] - 80267b8: 6b1b ldr r3, [r3, #48] ; 0x30 - 80267ba: f023 010f bic.w r1, r3, #15 - 80267be: 687b ldr r3, [r7, #4] - 80267c0: 699b ldr r3, [r3, #24] - 80267c2: 1e5a subs r2, r3, #1 - 80267c4: 687b ldr r3, [r7, #4] - 80267c6: 681b ldr r3, [r3, #0] - 80267c8: 430a orrs r2, r1 - 80267ca: 631a str r2, [r3, #48] ; 0x30 - 80267cc: e007 b.n 80267de + 8026838: 687b ldr r3, [r7, #4] + 802683a: 681b ldr r3, [r3, #0] + 802683c: 6b1b ldr r3, [r3, #48] ; 0x30 + 802683e: f023 010f bic.w r1, r3, #15 + 8026842: 687b ldr r3, [r7, #4] + 8026844: 699b ldr r3, [r3, #24] + 8026846: 1e5a subs r2, r3, #1 + 8026848: 687b ldr r3, [r7, #4] + 802684a: 681b ldr r3, [r3, #0] + 802684c: 430a orrs r2, r1 + 802684e: 631a str r2, [r3, #48] ; 0x30 + 8026850: e007 b.n 8026862 } else { CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L); - 80267ce: 687b ldr r3, [r7, #4] - 80267d0: 681b ldr r3, [r3, #0] - 80267d2: 6b1a ldr r2, [r3, #48] ; 0x30 - 80267d4: 687b ldr r3, [r7, #4] - 80267d6: 681b ldr r3, [r3, #0] - 80267d8: f022 020f bic.w r2, r2, #15 - 80267dc: 631a str r2, [r3, #48] ; 0x30 + 8026852: 687b ldr r3, [r7, #4] + 8026854: 681b ldr r3, [r3, #0] + 8026856: 6b1a ldr r2, [r3, #48] ; 0x30 + 8026858: 687b ldr r3, [r7, #4] + 802685a: 681b ldr r3, [r3, #0] + 802685c: f022 020f bic.w r2, r2, #15 + 8026860: 631a str r2, [r3, #48] ; 0x30 } /* Initialize the ADC state */ /* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_READY bit */ ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); - 80267de: 687b ldr r3, [r7, #4] - 80267e0: 6d5b ldr r3, [r3, #84] ; 0x54 - 80267e2: f023 0303 bic.w r3, r3, #3 - 80267e6: f043 0201 orr.w r2, r3, #1 - 80267ea: 687b ldr r3, [r7, #4] - 80267ec: 655a str r2, [r3, #84] ; 0x54 - 80267ee: e007 b.n 8026800 + 8026862: 687b ldr r3, [r7, #4] + 8026864: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026866: f023 0303 bic.w r3, r3, #3 + 802686a: f043 0201 orr.w r2, r3, #1 + 802686e: 687b ldr r3, [r7, #4] + 8026870: 655a str r2, [r3, #84] ; 0x54 + 8026872: e007 b.n 8026884 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80267f0: 687b ldr r3, [r7, #4] - 80267f2: 6d5b ldr r3, [r3, #84] ; 0x54 - 80267f4: f043 0210 orr.w r2, r3, #16 - 80267f8: 687b ldr r3, [r7, #4] - 80267fa: 655a str r2, [r3, #84] ; 0x54 + 8026874: 687b ldr r3, [r7, #4] + 8026876: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026878: f043 0210 orr.w r2, r3, #16 + 802687c: 687b ldr r3, [r7, #4] + 802687e: 655a str r2, [r3, #84] ; 0x54 tmp_hal_status = HAL_ERROR; - 80267fc: 2301 movs r3, #1 - 80267fe: 77fb strb r3, [r7, #31] + 8026880: 2301 movs r3, #1 + 8026882: 77fb strb r3, [r7, #31] } /* Return function status */ return tmp_hal_status; - 8026800: 7ffb ldrb r3, [r7, #31] + 8026884: 7ffb ldrb r3, [r7, #31] } - 8026802: 4618 mov r0, r3 - 8026804: 3724 adds r7, #36 ; 0x24 - 8026806: 46bd mov sp, r7 - 8026808: bd90 pop {r4, r7, pc} - 802680a: bf00 nop + 8026886: 4618 mov r0, r3 + 8026888: 3724 adds r7, #36 ; 0x24 + 802688a: 46bd mov sp, r7 + 802688c: bd90 pop {r4, r7, pc} + 802688e: bf00 nop -0802680c : +08026890 : * if ADC is master, ADC is enabled and multimode conversion is started. * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef *hadc) { - 802680c: b580 push {r7, lr} - 802680e: b086 sub sp, #24 - 8026810: af00 add r7, sp, #0 - 8026812: 6078 str r0, [r7, #4] + 8026890: b580 push {r7, lr} + 8026892: b086 sub sp, #24 + 8026894: af00 add r7, sp, #0 + 8026896: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status; const ADC_TypeDef *tmpADC_Master; uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 8026814: 687b ldr r3, [r7, #4] - 8026816: 681b ldr r3, [r3, #0] - 8026818: 4a5c ldr r2, [pc, #368] ; (802698c ) - 802681a: 4293 cmp r3, r2 - 802681c: d004 beq.n 8026828 - 802681e: 687b ldr r3, [r7, #4] - 8026820: 681b ldr r3, [r3, #0] - 8026822: 4a5b ldr r2, [pc, #364] ; (8026990 ) - 8026824: 4293 cmp r3, r2 - 8026826: d101 bne.n 802682c - 8026828: 4b5a ldr r3, [pc, #360] ; (8026994 ) - 802682a: e000 b.n 802682e - 802682c: 4b5a ldr r3, [pc, #360] ; (8026998 ) - 802682e: 4618 mov r0, r3 - 8026830: f7ff fd2e bl 8026290 - 8026834: 6138 str r0, [r7, #16] + 8026898: 687b ldr r3, [r7, #4] + 802689a: 681b ldr r3, [r3, #0] + 802689c: 4a5c ldr r2, [pc, #368] ; (8026a10 ) + 802689e: 4293 cmp r3, r2 + 80268a0: d004 beq.n 80268ac + 80268a2: 687b ldr r3, [r7, #4] + 80268a4: 681b ldr r3, [r3, #0] + 80268a6: 4a5b ldr r2, [pc, #364] ; (8026a14 ) + 80268a8: 4293 cmp r3, r2 + 80268aa: d101 bne.n 80268b0 + 80268ac: 4b5a ldr r3, [pc, #360] ; (8026a18 ) + 80268ae: e000 b.n 80268b2 + 80268b0: 4b5a ldr r3, [pc, #360] ; (8026a1c ) + 80268b2: 4618 mov r0, r3 + 80268b4: f7ff fd2e bl 8026314 + 80268b8: 6138 str r0, [r7, #16] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Perform ADC enable and conversion start if no conversion is on going */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) - 8026836: 687b ldr r3, [r7, #4] - 8026838: 681b ldr r3, [r3, #0] - 802683a: 4618 mov r0, r3 - 802683c: f7ff fe08 bl 8026450 - 8026840: 4603 mov r3, r0 - 8026842: 2b00 cmp r3, #0 - 8026844: f040 809a bne.w 802697c + 80268ba: 687b ldr r3, [r7, #4] + 80268bc: 681b ldr r3, [r3, #0] + 80268be: 4618 mov r0, r3 + 80268c0: f7ff fe08 bl 80264d4 + 80268c4: 4603 mov r3, r0 + 80268c6: 2b00 cmp r3, #0 + 80268c8: f040 809a bne.w 8026a00 { /* Process locked */ __HAL_LOCK(hadc); - 8026848: 687b ldr r3, [r7, #4] - 802684a: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 - 802684e: 2b01 cmp r3, #1 - 8026850: d101 bne.n 8026856 - 8026852: 2302 movs r3, #2 - 8026854: e095 b.n 8026982 - 8026856: 687b ldr r3, [r7, #4] - 8026858: 2201 movs r2, #1 - 802685a: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 80268cc: 687b ldr r3, [r7, #4] + 80268ce: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 + 80268d2: 2b01 cmp r3, #1 + 80268d4: d101 bne.n 80268da + 80268d6: 2302 movs r3, #2 + 80268d8: e095 b.n 8026a06 + 80268da: 687b ldr r3, [r7, #4] + 80268dc: 2201 movs r2, #1 + 80268de: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); - 802685e: 6878 ldr r0, [r7, #4] - 8026860: f000 fde0 bl 8027424 - 8026864: 4603 mov r3, r0 - 8026866: 75fb strb r3, [r7, #23] + 80268e2: 6878 ldr r0, [r7, #4] + 80268e4: f000 fde0 bl 80274a8 + 80268e8: 4603 mov r3, r0 + 80268ea: 75fb strb r3, [r7, #23] /* Start conversion if ADC is effectively enabled */ if (tmp_hal_status == HAL_OK) - 8026868: 7dfb ldrb r3, [r7, #23] - 802686a: 2b00 cmp r3, #0 - 802686c: f040 8081 bne.w 8026972 + 80268ec: 7dfb ldrb r3, [r7, #23] + 80268ee: 2b00 cmp r3, #0 + 80268f0: f040 8081 bne.w 80269f6 { /* Set ADC state */ /* - Clear state bitfield related to regular group conversion results */ /* - Set state bitfield related to regular operation */ ADC_STATE_CLR_SET(hadc->State, - 8026870: 687b ldr r3, [r7, #4] - 8026872: 6d5a ldr r2, [r3, #84] ; 0x54 - 8026874: 4b49 ldr r3, [pc, #292] ; (802699c ) - 8026876: 4013 ands r3, r2 - 8026878: f443 7280 orr.w r2, r3, #256 ; 0x100 - 802687c: 687b ldr r3, [r7, #4] - 802687e: 655a str r2, [r3, #84] ; 0x54 + 80268f4: 687b ldr r3, [r7, #4] + 80268f6: 6d5a ldr r2, [r3, #84] ; 0x54 + 80268f8: 4b49 ldr r3, [pc, #292] ; (8026a20 ) + 80268fa: 4013 ands r3, r2 + 80268fc: f443 7280 orr.w r2, r3, #256 ; 0x100 + 8026900: 687b ldr r3, [r7, #4] + 8026902: 655a str r2, [r3, #84] ; 0x54 HAL_ADC_STATE_REG_BUSY); /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit - if ADC instance is master or if multimode feature is not available - if multimode setting is disabled (ADC instance slave in independent mode) */ if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) - 8026880: 687b ldr r3, [r7, #4] - 8026882: 681b ldr r3, [r3, #0] - 8026884: 4a42 ldr r2, [pc, #264] ; (8026990 ) - 8026886: 4293 cmp r3, r2 - 8026888: d002 beq.n 8026890 - 802688a: 687b ldr r3, [r7, #4] - 802688c: 681b ldr r3, [r3, #0] - 802688e: e000 b.n 8026892 - 8026890: 4b3e ldr r3, [pc, #248] ; (802698c ) - 8026892: 687a ldr r2, [r7, #4] - 8026894: 6812 ldr r2, [r2, #0] - 8026896: 4293 cmp r3, r2 - 8026898: d002 beq.n 80268a0 + 8026904: 687b ldr r3, [r7, #4] + 8026906: 681b ldr r3, [r3, #0] + 8026908: 4a42 ldr r2, [pc, #264] ; (8026a14 ) + 802690a: 4293 cmp r3, r2 + 802690c: d002 beq.n 8026914 + 802690e: 687b ldr r3, [r7, #4] + 8026910: 681b ldr r3, [r3, #0] + 8026912: e000 b.n 8026916 + 8026914: 4b3e ldr r3, [pc, #248] ; (8026a10 ) + 8026916: 687a ldr r2, [r7, #4] + 8026918: 6812 ldr r2, [r2, #0] + 802691a: 4293 cmp r3, r2 + 802691c: d002 beq.n 8026924 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 802689a: 693b ldr r3, [r7, #16] - 802689c: 2b00 cmp r3, #0 - 802689e: d105 bne.n 80268ac + 802691e: 693b ldr r3, [r7, #16] + 8026920: 2b00 cmp r3, #0 + 8026922: d105 bne.n 8026930 ) { CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - 80268a0: 687b ldr r3, [r7, #4] - 80268a2: 6d5b ldr r3, [r3, #84] ; 0x54 - 80268a4: f423 1280 bic.w r2, r3, #1048576 ; 0x100000 - 80268a8: 687b ldr r3, [r7, #4] - 80268aa: 655a str r2, [r3, #84] ; 0x54 + 8026924: 687b ldr r3, [r7, #4] + 8026926: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026928: f423 1280 bic.w r2, r3, #1048576 ; 0x100000 + 802692c: 687b ldr r3, [r7, #4] + 802692e: 655a str r2, [r3, #84] ; 0x54 } /* Set ADC error code */ /* Check if a conversion is on going on ADC group injected */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 80268ac: 687b ldr r3, [r7, #4] - 80268ae: 6d5b ldr r3, [r3, #84] ; 0x54 - 80268b0: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 80268b4: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80268b8: d106 bne.n 80268c8 + 8026930: 687b ldr r3, [r7, #4] + 8026932: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026934: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8026938: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 802693c: d106 bne.n 802694c { /* Reset ADC error code fields related to regular conversions only */ CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); - 80268ba: 687b ldr r3, [r7, #4] - 80268bc: 6d9b ldr r3, [r3, #88] ; 0x58 - 80268be: f023 0206 bic.w r2, r3, #6 - 80268c2: 687b ldr r3, [r7, #4] - 80268c4: 659a str r2, [r3, #88] ; 0x58 - 80268c6: e002 b.n 80268ce + 802693e: 687b ldr r3, [r7, #4] + 8026940: 6d9b ldr r3, [r3, #88] ; 0x58 + 8026942: f023 0206 bic.w r2, r3, #6 + 8026946: 687b ldr r3, [r7, #4] + 8026948: 659a str r2, [r3, #88] ; 0x58 + 802694a: e002 b.n 8026952 } else { /* Reset all ADC error code fields */ ADC_CLEAR_ERRORCODE(hadc); - 80268c8: 687b ldr r3, [r7, #4] - 80268ca: 2200 movs r2, #0 - 80268cc: 659a str r2, [r3, #88] ; 0x58 + 802694c: 687b ldr r3, [r7, #4] + 802694e: 2200 movs r2, #0 + 8026950: 659a str r2, [r3, #88] ; 0x58 } /* Clear ADC group regular conversion flag and overrun flag */ /* (To ensure of no unknown state from potential previous ADC operations) */ __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); - 80268ce: 687b ldr r3, [r7, #4] - 80268d0: 681b ldr r3, [r3, #0] - 80268d2: 221c movs r2, #28 - 80268d4: 601a str r2, [r3, #0] + 8026952: 687b ldr r3, [r7, #4] + 8026954: 681b ldr r3, [r3, #0] + 8026956: 221c movs r2, #28 + 8026958: 601a str r2, [r3, #0] /* Process unlocked */ /* Unlock before starting ADC conversions: in case of potential */ /* interruption, to let the process to ADC IRQ Handler. */ __HAL_UNLOCK(hadc); - 80268d6: 687b ldr r3, [r7, #4] - 80268d8: 2200 movs r2, #0 - 80268da: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 802695a: 687b ldr r3, [r7, #4] + 802695c: 2200 movs r2, #0 + 802695e: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* trigger event. */ /* Case of multimode enabled (when multimode feature is available): */ /* - if ADC is slave and dual regular conversions are enabled, ADC is */ /* enabled only (conversion is not started), */ /* - if ADC is master, ADC is enabled and conversion is started. */ if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) - 80268de: 687b ldr r3, [r7, #4] - 80268e0: 681b ldr r3, [r3, #0] - 80268e2: 4a2b ldr r2, [pc, #172] ; (8026990 ) - 80268e4: 4293 cmp r3, r2 - 80268e6: d002 beq.n 80268ee - 80268e8: 687b ldr r3, [r7, #4] - 80268ea: 681b ldr r3, [r3, #0] - 80268ec: e000 b.n 80268f0 - 80268ee: 4b27 ldr r3, [pc, #156] ; (802698c ) - 80268f0: 687a ldr r2, [r7, #4] - 80268f2: 6812 ldr r2, [r2, #0] - 80268f4: 4293 cmp r3, r2 - 80268f6: d008 beq.n 802690a + 8026962: 687b ldr r3, [r7, #4] + 8026964: 681b ldr r3, [r3, #0] + 8026966: 4a2b ldr r2, [pc, #172] ; (8026a14 ) + 8026968: 4293 cmp r3, r2 + 802696a: d002 beq.n 8026972 + 802696c: 687b ldr r3, [r7, #4] + 802696e: 681b ldr r3, [r3, #0] + 8026970: e000 b.n 8026974 + 8026972: 4b27 ldr r3, [pc, #156] ; (8026a10 ) + 8026974: 687a ldr r2, [r7, #4] + 8026976: 6812 ldr r2, [r2, #0] + 8026978: 4293 cmp r3, r2 + 802697a: d008 beq.n 802698e || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 80268f8: 693b ldr r3, [r7, #16] - 80268fa: 2b00 cmp r3, #0 - 80268fc: d005 beq.n 802690a + 802697c: 693b ldr r3, [r7, #16] + 802697e: 2b00 cmp r3, #0 + 8026980: d005 beq.n 802698e || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) - 80268fe: 693b ldr r3, [r7, #16] - 8026900: 2b05 cmp r3, #5 - 8026902: d002 beq.n 802690a + 8026982: 693b ldr r3, [r7, #16] + 8026984: 2b05 cmp r3, #5 + 8026986: d002 beq.n 802698e || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) - 8026904: 693b ldr r3, [r7, #16] - 8026906: 2b09 cmp r3, #9 - 8026908: d114 bne.n 8026934 + 8026988: 693b ldr r3, [r7, #16] + 802698a: 2b09 cmp r3, #9 + 802698c: d114 bne.n 80269b8 ) { /* ADC instance is not a multimode slave instance with multimode regular conversions enabled */ if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != 0UL) - 802690a: 687b ldr r3, [r7, #4] - 802690c: 681b ldr r3, [r3, #0] - 802690e: 68db ldr r3, [r3, #12] - 8026910: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8026914: 2b00 cmp r3, #0 - 8026916: d007 beq.n 8026928 + 802698e: 687b ldr r3, [r7, #4] + 8026990: 681b ldr r3, [r3, #0] + 8026992: 68db ldr r3, [r3, #12] + 8026994: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8026998: 2b00 cmp r3, #0 + 802699a: d007 beq.n 80269ac { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - 8026918: 687b ldr r3, [r7, #4] - 802691a: 6d5b ldr r3, [r3, #84] ; 0x54 - 802691c: f423 5340 bic.w r3, r3, #12288 ; 0x3000 - 8026920: f443 5280 orr.w r2, r3, #4096 ; 0x1000 - 8026924: 687b ldr r3, [r7, #4] - 8026926: 655a str r2, [r3, #84] ; 0x54 + 802699c: 687b ldr r3, [r7, #4] + 802699e: 6d5b ldr r3, [r3, #84] ; 0x54 + 80269a0: f423 5340 bic.w r3, r3, #12288 ; 0x3000 + 80269a4: f443 5280 orr.w r2, r3, #4096 ; 0x1000 + 80269a8: 687b ldr r3, [r7, #4] + 80269aa: 655a str r2, [r3, #84] ; 0x54 } /* Start ADC group regular conversion */ LL_ADC_REG_StartConversion(hadc->Instance); - 8026928: 687b ldr r3, [r7, #4] - 802692a: 681b ldr r3, [r3, #0] - 802692c: 4618 mov r0, r3 - 802692e: f7ff fd67 bl 8026400 - 8026932: e025 b.n 8026980 + 80269ac: 687b ldr r3, [r7, #4] + 80269ae: 681b ldr r3, [r3, #0] + 80269b0: 4618 mov r0, r3 + 80269b2: f7ff fd67 bl 8026484 + 80269b6: e025 b.n 8026a04 } else { /* ADC instance is a multimode slave instance with multimode regular conversions enabled */ SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - 8026934: 687b ldr r3, [r7, #4] - 8026936: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026938: f443 1280 orr.w r2, r3, #1048576 ; 0x100000 - 802693c: 687b ldr r3, [r7, #4] - 802693e: 655a str r2, [r3, #84] ; 0x54 + 80269b8: 687b ldr r3, [r7, #4] + 80269ba: 6d5b ldr r3, [r3, #84] ; 0x54 + 80269bc: f443 1280 orr.w r2, r3, #1048576 ; 0x100000 + 80269c0: 687b ldr r3, [r7, #4] + 80269c2: 655a str r2, [r3, #84] ; 0x54 /* if Master ADC JAUTO bit is set, update Slave State in setting HAL_ADC_STATE_INJ_BUSY bit and in resetting HAL_ADC_STATE_INJ_EOC bit */ tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); - 8026940: 687b ldr r3, [r7, #4] - 8026942: 681b ldr r3, [r3, #0] - 8026944: 4a12 ldr r2, [pc, #72] ; (8026990 ) - 8026946: 4293 cmp r3, r2 - 8026948: d002 beq.n 8026950 - 802694a: 687b ldr r3, [r7, #4] - 802694c: 681b ldr r3, [r3, #0] - 802694e: e000 b.n 8026952 - 8026950: 4b0e ldr r3, [pc, #56] ; (802698c ) - 8026952: 60fb str r3, [r7, #12] + 80269c4: 687b ldr r3, [r7, #4] + 80269c6: 681b ldr r3, [r3, #0] + 80269c8: 4a12 ldr r2, [pc, #72] ; (8026a14 ) + 80269ca: 4293 cmp r3, r2 + 80269cc: d002 beq.n 80269d4 + 80269ce: 687b ldr r3, [r7, #4] + 80269d0: 681b ldr r3, [r3, #0] + 80269d2: e000 b.n 80269d6 + 80269d4: 4b0e ldr r3, [pc, #56] ; (8026a10 ) + 80269d6: 60fb str r3, [r7, #12] if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != 0UL) - 8026954: 68fb ldr r3, [r7, #12] - 8026956: 68db ldr r3, [r3, #12] - 8026958: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802695c: 2b00 cmp r3, #0 - 802695e: d00f beq.n 8026980 + 80269d8: 68fb ldr r3, [r7, #12] + 80269da: 68db ldr r3, [r3, #12] + 80269dc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80269e0: 2b00 cmp r3, #0 + 80269e2: d00f beq.n 8026a04 { ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - 8026960: 687b ldr r3, [r7, #4] - 8026962: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026964: f423 5340 bic.w r3, r3, #12288 ; 0x3000 - 8026968: f443 5280 orr.w r2, r3, #4096 ; 0x1000 - 802696c: 687b ldr r3, [r7, #4] - 802696e: 655a str r2, [r3, #84] ; 0x54 - 8026970: e006 b.n 8026980 + 80269e4: 687b ldr r3, [r7, #4] + 80269e6: 6d5b ldr r3, [r3, #84] ; 0x54 + 80269e8: f423 5340 bic.w r3, r3, #12288 ; 0x3000 + 80269ec: f443 5280 orr.w r2, r3, #4096 ; 0x1000 + 80269f0: 687b ldr r3, [r7, #4] + 80269f2: 655a str r2, [r3, #84] ; 0x54 + 80269f4: e006 b.n 8026a04 } } else { /* Process unlocked */ __HAL_UNLOCK(hadc); - 8026972: 687b ldr r3, [r7, #4] - 8026974: 2200 movs r2, #0 - 8026976: f883 2050 strb.w r2, [r3, #80] ; 0x50 - 802697a: e001 b.n 8026980 + 80269f6: 687b ldr r3, [r7, #4] + 80269f8: 2200 movs r2, #0 + 80269fa: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 80269fe: e001 b.n 8026a04 } } else { tmp_hal_status = HAL_BUSY; - 802697c: 2302 movs r3, #2 - 802697e: 75fb strb r3, [r7, #23] + 8026a00: 2302 movs r3, #2 + 8026a02: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; - 8026980: 7dfb ldrb r3, [r7, #23] -} - 8026982: 4618 mov r0, r3 - 8026984: 3718 adds r7, #24 - 8026986: 46bd mov sp, r7 - 8026988: bd80 pop {r7, pc} - 802698a: bf00 nop - 802698c: 40022000 .word 0x40022000 - 8026990: 40022100 .word 0x40022100 - 8026994: 40022300 .word 0x40022300 - 8026998: 58026300 .word 0x58026300 - 802699c: fffff0fe .word 0xfffff0fe - -080269a0 : + 8026a04: 7dfb ldrb r3, [r7, #23] +} + 8026a06: 4618 mov r0, r3 + 8026a08: 3718 adds r7, #24 + 8026a0a: 46bd mov sp, r7 + 8026a0c: bd80 pop {r7, pc} + 8026a0e: bf00 nop + 8026a10: 40022000 .word 0x40022000 + 8026a14: 40022100 .word 0x40022100 + 8026a18: 40022300 .word 0x40022300 + 8026a1c: 58026300 .word 0x58026300 + 8026a20: fffff0fe .word 0xfffff0fe + +08026a24 : * should be preliminarily stopped using HAL_ADCEx_InjectedStop function. * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef *hadc) { - 80269a0: b580 push {r7, lr} - 80269a2: b084 sub sp, #16 - 80269a4: af00 add r7, sp, #0 - 80269a6: 6078 str r0, [r7, #4] + 8026a24: b580 push {r7, lr} + 8026a26: b084 sub sp, #16 + 8026a28: af00 add r7, sp, #0 + 8026a2a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* Process locked */ __HAL_LOCK(hadc); - 80269a8: 687b ldr r3, [r7, #4] - 80269aa: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 - 80269ae: 2b01 cmp r3, #1 - 80269b0: d101 bne.n 80269b6 - 80269b2: 2302 movs r3, #2 - 80269b4: e021 b.n 80269fa - 80269b6: 687b ldr r3, [r7, #4] - 80269b8: 2201 movs r2, #1 - 80269ba: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8026a2c: 687b ldr r3, [r7, #4] + 8026a2e: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 + 8026a32: 2b01 cmp r3, #1 + 8026a34: d101 bne.n 8026a3a + 8026a36: 2302 movs r3, #2 + 8026a38: e021 b.n 8026a7e + 8026a3a: 687b ldr r3, [r7, #4] + 8026a3c: 2201 movs r2, #1 + 8026a3e: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* 1. Stop potential conversion on going, on ADC groups regular and injected */ tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); - 80269be: 2103 movs r1, #3 - 80269c0: 6878 ldr r0, [r7, #4] - 80269c2: f000 fc73 bl 80272ac - 80269c6: 4603 mov r3, r0 - 80269c8: 73fb strb r3, [r7, #15] + 8026a42: 2103 movs r1, #3 + 8026a44: 6878 ldr r0, [r7, #4] + 8026a46: f000 fc73 bl 8027330 + 8026a4a: 4603 mov r3, r0 + 8026a4c: 73fb strb r3, [r7, #15] /* Disable ADC peripheral if conversions are effectively stopped */ if (tmp_hal_status == HAL_OK) - 80269ca: 7bfb ldrb r3, [r7, #15] - 80269cc: 2b00 cmp r3, #0 - 80269ce: d10f bne.n 80269f0 + 8026a4e: 7bfb ldrb r3, [r7, #15] + 8026a50: 2b00 cmp r3, #0 + 8026a52: d10f bne.n 8026a74 { /* 2. Disable the ADC peripheral */ tmp_hal_status = ADC_Disable(hadc); - 80269d0: 6878 ldr r0, [r7, #4] - 80269d2: f000 fdb1 bl 8027538 - 80269d6: 4603 mov r3, r0 - 80269d8: 73fb strb r3, [r7, #15] + 8026a54: 6878 ldr r0, [r7, #4] + 8026a56: f000 fdb1 bl 80275bc + 8026a5a: 4603 mov r3, r0 + 8026a5c: 73fb strb r3, [r7, #15] /* Check if ADC is effectively disabled */ if (tmp_hal_status == HAL_OK) - 80269da: 7bfb ldrb r3, [r7, #15] - 80269dc: 2b00 cmp r3, #0 - 80269de: d107 bne.n 80269f0 + 8026a5e: 7bfb ldrb r3, [r7, #15] + 8026a60: 2b00 cmp r3, #0 + 8026a62: d107 bne.n 8026a74 { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 80269e0: 687b ldr r3, [r7, #4] - 80269e2: 6d5a ldr r2, [r3, #84] ; 0x54 - 80269e4: 4b07 ldr r3, [pc, #28] ; (8026a04 ) - 80269e6: 4013 ands r3, r2 - 80269e8: f043 0201 orr.w r2, r3, #1 - 80269ec: 687b ldr r3, [r7, #4] - 80269ee: 655a str r2, [r3, #84] ; 0x54 + 8026a64: 687b ldr r3, [r7, #4] + 8026a66: 6d5a ldr r2, [r3, #84] ; 0x54 + 8026a68: 4b07 ldr r3, [pc, #28] ; (8026a88 ) + 8026a6a: 4013 ands r3, r2 + 8026a6c: f043 0201 orr.w r2, r3, #1 + 8026a70: 687b ldr r3, [r7, #4] + 8026a72: 655a str r2, [r3, #84] ; 0x54 HAL_ADC_STATE_READY); } } /* Process unlocked */ __HAL_UNLOCK(hadc); - 80269f0: 687b ldr r3, [r7, #4] - 80269f2: 2200 movs r2, #0 - 80269f4: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8026a74: 687b ldr r3, [r7, #4] + 8026a76: 2200 movs r2, #0 + 8026a78: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Return function status */ return tmp_hal_status; - 80269f8: 7bfb ldrb r3, [r7, #15] + 8026a7c: 7bfb ldrb r3, [r7, #15] } - 80269fa: 4618 mov r0, r3 - 80269fc: 3710 adds r7, #16 - 80269fe: 46bd mov sp, r7 - 8026a00: bd80 pop {r7, pc} - 8026a02: bf00 nop - 8026a04: ffffeefe .word 0xffffeefe + 8026a7e: 4618 mov r0, r3 + 8026a80: 3710 adds r7, #16 + 8026a82: 46bd mov sp, r7 + 8026a84: bd80 pop {r7, pc} + 8026a86: bf00 nop + 8026a88: ffffeefe .word 0xffffeefe -08026a08 : +08026a8c : * @param hadc ADC handle * @param Timeout Timeout value in millisecond. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout) { - 8026a08: b580 push {r7, lr} - 8026a0a: b088 sub sp, #32 - 8026a0c: af00 add r7, sp, #0 - 8026a0e: 6078 str r0, [r7, #4] - 8026a10: 6039 str r1, [r7, #0] + 8026a8c: b580 push {r7, lr} + 8026a8e: b088 sub sp, #32 + 8026a90: af00 add r7, sp, #0 + 8026a92: 6078 str r0, [r7, #4] + 8026a94: 6039 str r1, [r7, #0] uint32_t tickstart; uint32_t tmp_Flag_End; uint32_t tmp_cfgr; const ADC_TypeDef *tmpADC_Master; uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 8026a12: 687b ldr r3, [r7, #4] - 8026a14: 681b ldr r3, [r3, #0] - 8026a16: 4a72 ldr r2, [pc, #456] ; (8026be0 ) - 8026a18: 4293 cmp r3, r2 - 8026a1a: d004 beq.n 8026a26 - 8026a1c: 687b ldr r3, [r7, #4] - 8026a1e: 681b ldr r3, [r3, #0] - 8026a20: 4a70 ldr r2, [pc, #448] ; (8026be4 ) - 8026a22: 4293 cmp r3, r2 - 8026a24: d101 bne.n 8026a2a - 8026a26: 4b70 ldr r3, [pc, #448] ; (8026be8 ) - 8026a28: e000 b.n 8026a2c - 8026a2a: 4b70 ldr r3, [pc, #448] ; (8026bec ) - 8026a2c: 4618 mov r0, r3 - 8026a2e: f7ff fc2f bl 8026290 - 8026a32: 6178 str r0, [r7, #20] + 8026a96: 687b ldr r3, [r7, #4] + 8026a98: 681b ldr r3, [r3, #0] + 8026a9a: 4a72 ldr r2, [pc, #456] ; (8026c64 ) + 8026a9c: 4293 cmp r3, r2 + 8026a9e: d004 beq.n 8026aaa + 8026aa0: 687b ldr r3, [r7, #4] + 8026aa2: 681b ldr r3, [r3, #0] + 8026aa4: 4a70 ldr r2, [pc, #448] ; (8026c68 ) + 8026aa6: 4293 cmp r3, r2 + 8026aa8: d101 bne.n 8026aae + 8026aaa: 4b70 ldr r3, [pc, #448] ; (8026c6c ) + 8026aac: e000 b.n 8026ab0 + 8026aae: 4b70 ldr r3, [pc, #448] ; (8026c70 ) + 8026ab0: 4618 mov r0, r3 + 8026ab2: f7ff fc2f bl 8026314 + 8026ab6: 6178 str r0, [r7, #20] /* Check the parameters */ assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); /* If end of conversion selected to end of sequence conversions */ if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) - 8026a34: 687b ldr r3, [r7, #4] - 8026a36: 691b ldr r3, [r3, #16] - 8026a38: 2b08 cmp r3, #8 - 8026a3a: d102 bne.n 8026a42 + 8026ab8: 687b ldr r3, [r7, #4] + 8026aba: 691b ldr r3, [r3, #16] + 8026abc: 2b08 cmp r3, #8 + 8026abe: d102 bne.n 8026ac6 { tmp_Flag_End = ADC_FLAG_EOS; - 8026a3c: 2308 movs r3, #8 - 8026a3e: 61fb str r3, [r7, #28] - 8026a40: e037 b.n 8026ab2 + 8026ac0: 2308 movs r3, #8 + 8026ac2: 61fb str r3, [r7, #28] + 8026ac4: e037 b.n 8026b36 /* each conversion: */ /* Particular case is ADC configured in DMA mode and ADC sequencer with */ /* several ranks and polling for end of each conversion. */ /* For code simplicity sake, this particular case is generalized to */ /* ADC configured in DMA mode and and polling for end of each conversion. */ if ((tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 8026a42: 697b ldr r3, [r7, #20] - 8026a44: 2b00 cmp r3, #0 - 8026a46: d005 beq.n 8026a54 + 8026ac6: 697b ldr r3, [r7, #20] + 8026ac8: 2b00 cmp r3, #0 + 8026aca: d005 beq.n 8026ad8 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) - 8026a48: 697b ldr r3, [r7, #20] - 8026a4a: 2b05 cmp r3, #5 - 8026a4c: d002 beq.n 8026a54 + 8026acc: 697b ldr r3, [r7, #20] + 8026ace: 2b05 cmp r3, #5 + 8026ad0: d002 beq.n 8026ad8 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) - 8026a4e: 697b ldr r3, [r7, #20] - 8026a50: 2b09 cmp r3, #9 - 8026a52: d111 bne.n 8026a78 + 8026ad2: 697b ldr r3, [r7, #20] + 8026ad4: 2b09 cmp r3, #9 + 8026ad6: d111 bne.n 8026afc ) { /* Check DMNGT bit in handle ADC CFGR register */ if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMNGT_0) != 0UL) - 8026a54: 687b ldr r3, [r7, #4] - 8026a56: 681b ldr r3, [r3, #0] - 8026a58: 68db ldr r3, [r3, #12] - 8026a5a: f003 0301 and.w r3, r3, #1 - 8026a5e: 2b00 cmp r3, #0 - 8026a60: d007 beq.n 8026a72 + 8026ad8: 687b ldr r3, [r7, #4] + 8026ada: 681b ldr r3, [r3, #0] + 8026adc: 68db ldr r3, [r3, #12] + 8026ade: f003 0301 and.w r3, r3, #1 + 8026ae2: 2b00 cmp r3, #0 + 8026ae4: d007 beq.n 8026af6 { SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8026a62: 687b ldr r3, [r7, #4] - 8026a64: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026a66: f043 0220 orr.w r2, r3, #32 - 8026a6a: 687b ldr r3, [r7, #4] - 8026a6c: 655a str r2, [r3, #84] ; 0x54 + 8026ae6: 687b ldr r3, [r7, #4] + 8026ae8: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026aea: f043 0220 orr.w r2, r3, #32 + 8026aee: 687b ldr r3, [r7, #4] + 8026af0: 655a str r2, [r3, #84] ; 0x54 return HAL_ERROR; - 8026a6e: 2301 movs r3, #1 - 8026a70: e0b1 b.n 8026bd6 + 8026af2: 2301 movs r3, #1 + 8026af4: e0b1 b.n 8026c5a } else { tmp_Flag_End = (ADC_FLAG_EOC); - 8026a72: 2304 movs r3, #4 - 8026a74: 61fb str r3, [r7, #28] + 8026af6: 2304 movs r3, #4 + 8026af8: 61fb str r3, [r7, #28] if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMNGT_0) != 0UL) - 8026a76: e01c b.n 8026ab2 + 8026afa: e01c b.n 8026b36 } } else { /* Check ADC DMA mode in multimode on ADC group regular */ if (LL_ADC_GetMultiDMATransfer(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) != LL_ADC_MULTI_REG_DMA_EACH_ADC) - 8026a78: 687b ldr r3, [r7, #4] - 8026a7a: 681b ldr r3, [r3, #0] - 8026a7c: 4a58 ldr r2, [pc, #352] ; (8026be0 ) - 8026a7e: 4293 cmp r3, r2 - 8026a80: d004 beq.n 8026a8c - 8026a82: 687b ldr r3, [r7, #4] - 8026a84: 681b ldr r3, [r3, #0] - 8026a86: 4a57 ldr r2, [pc, #348] ; (8026be4 ) - 8026a88: 4293 cmp r3, r2 - 8026a8a: d101 bne.n 8026a90 - 8026a8c: 4b56 ldr r3, [pc, #344] ; (8026be8 ) - 8026a8e: e000 b.n 8026a92 - 8026a90: 4b56 ldr r3, [pc, #344] ; (8026bec ) - 8026a92: 4618 mov r0, r3 - 8026a94: f7ff fc0a bl 80262ac - 8026a98: 4603 mov r3, r0 - 8026a9a: 2b00 cmp r3, #0 - 8026a9c: d007 beq.n 8026aae + 8026afc: 687b ldr r3, [r7, #4] + 8026afe: 681b ldr r3, [r3, #0] + 8026b00: 4a58 ldr r2, [pc, #352] ; (8026c64 ) + 8026b02: 4293 cmp r3, r2 + 8026b04: d004 beq.n 8026b10 + 8026b06: 687b ldr r3, [r7, #4] + 8026b08: 681b ldr r3, [r3, #0] + 8026b0a: 4a57 ldr r2, [pc, #348] ; (8026c68 ) + 8026b0c: 4293 cmp r3, r2 + 8026b0e: d101 bne.n 8026b14 + 8026b10: 4b56 ldr r3, [pc, #344] ; (8026c6c ) + 8026b12: e000 b.n 8026b16 + 8026b14: 4b56 ldr r3, [pc, #344] ; (8026c70 ) + 8026b16: 4618 mov r0, r3 + 8026b18: f7ff fc0a bl 8026330 + 8026b1c: 4603 mov r3, r0 + 8026b1e: 2b00 cmp r3, #0 + 8026b20: d007 beq.n 8026b32 { SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8026a9e: 687b ldr r3, [r7, #4] - 8026aa0: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026aa2: f043 0220 orr.w r2, r3, #32 - 8026aa6: 687b ldr r3, [r7, #4] - 8026aa8: 655a str r2, [r3, #84] ; 0x54 + 8026b22: 687b ldr r3, [r7, #4] + 8026b24: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026b26: f043 0220 orr.w r2, r3, #32 + 8026b2a: 687b ldr r3, [r7, #4] + 8026b2c: 655a str r2, [r3, #84] ; 0x54 return HAL_ERROR; - 8026aaa: 2301 movs r3, #1 - 8026aac: e093 b.n 8026bd6 + 8026b2e: 2301 movs r3, #1 + 8026b30: e093 b.n 8026c5a } else { tmp_Flag_End = (ADC_FLAG_EOC); - 8026aae: 2304 movs r3, #4 - 8026ab0: 61fb str r3, [r7, #28] + 8026b32: 2304 movs r3, #4 + 8026b34: 61fb str r3, [r7, #28] } } } /* Get tick count */ tickstart = HAL_GetTick(); - 8026ab2: f7ff fa87 bl 8025fc4 - 8026ab6: 6138 str r0, [r7, #16] + 8026b36: f7ff fa87 bl 8026048 + 8026b3a: 6138 str r0, [r7, #16] /* Wait until End of unitary conversion or sequence conversions flag is raised */ while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) - 8026ab8: e021 b.n 8026afe + 8026b3c: e021 b.n 8026b82 { /* Check if timeout is disabled (set to infinite wait) */ if (Timeout != HAL_MAX_DELAY) - 8026aba: 683b ldr r3, [r7, #0] - 8026abc: f1b3 3fff cmp.w r3, #4294967295 - 8026ac0: d01d beq.n 8026afe + 8026b3e: 683b ldr r3, [r7, #0] + 8026b40: f1b3 3fff cmp.w r3, #4294967295 + 8026b44: d01d beq.n 8026b82 { if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL)) - 8026ac2: f7ff fa7f bl 8025fc4 - 8026ac6: 4602 mov r2, r0 - 8026ac8: 693b ldr r3, [r7, #16] - 8026aca: 1ad3 subs r3, r2, r3 - 8026acc: 683a ldr r2, [r7, #0] - 8026ace: 429a cmp r2, r3 - 8026ad0: d302 bcc.n 8026ad8 - 8026ad2: 683b ldr r3, [r7, #0] - 8026ad4: 2b00 cmp r3, #0 - 8026ad6: d112 bne.n 8026afe + 8026b46: f7ff fa7f bl 8026048 + 8026b4a: 4602 mov r2, r0 + 8026b4c: 693b ldr r3, [r7, #16] + 8026b4e: 1ad3 subs r3, r2, r3 + 8026b50: 683a ldr r2, [r7, #0] + 8026b52: 429a cmp r2, r3 + 8026b54: d302 bcc.n 8026b5c + 8026b56: 683b ldr r3, [r7, #0] + 8026b58: 2b00 cmp r3, #0 + 8026b5a: d112 bne.n 8026b82 { /* New check to avoid false timeout detection in case of preemption */ if((hadc->Instance->ISR & tmp_Flag_End) == 0UL) - 8026ad8: 687b ldr r3, [r7, #4] - 8026ada: 681b ldr r3, [r3, #0] - 8026adc: 681a ldr r2, [r3, #0] - 8026ade: 69fb ldr r3, [r7, #28] - 8026ae0: 4013 ands r3, r2 - 8026ae2: 2b00 cmp r3, #0 - 8026ae4: d10b bne.n 8026afe + 8026b5c: 687b ldr r3, [r7, #4] + 8026b5e: 681b ldr r3, [r3, #0] + 8026b60: 681a ldr r2, [r3, #0] + 8026b62: 69fb ldr r3, [r7, #28] + 8026b64: 4013 ands r3, r2 + 8026b66: 2b00 cmp r3, #0 + 8026b68: d10b bne.n 8026b82 { /* Update ADC state machine to timeout */ SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); - 8026ae6: 687b ldr r3, [r7, #4] - 8026ae8: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026aea: f043 0204 orr.w r2, r3, #4 - 8026aee: 687b ldr r3, [r7, #4] - 8026af0: 655a str r2, [r3, #84] ; 0x54 + 8026b6a: 687b ldr r3, [r7, #4] + 8026b6c: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026b6e: f043 0204 orr.w r2, r3, #4 + 8026b72: 687b ldr r3, [r7, #4] + 8026b74: 655a str r2, [r3, #84] ; 0x54 /* Process unlocked */ __HAL_UNLOCK(hadc); - 8026af2: 687b ldr r3, [r7, #4] - 8026af4: 2200 movs r2, #0 - 8026af6: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8026b76: 687b ldr r3, [r7, #4] + 8026b78: 2200 movs r2, #0 + 8026b7a: f883 2050 strb.w r2, [r3, #80] ; 0x50 return HAL_TIMEOUT; - 8026afa: 2303 movs r3, #3 - 8026afc: e06b b.n 8026bd6 + 8026b7e: 2303 movs r3, #3 + 8026b80: e06b b.n 8026c5a while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL) - 8026afe: 687b ldr r3, [r7, #4] - 8026b00: 681b ldr r3, [r3, #0] - 8026b02: 681a ldr r2, [r3, #0] - 8026b04: 69fb ldr r3, [r7, #28] - 8026b06: 4013 ands r3, r2 - 8026b08: 2b00 cmp r3, #0 - 8026b0a: d0d6 beq.n 8026aba + 8026b82: 687b ldr r3, [r7, #4] + 8026b84: 681b ldr r3, [r3, #0] + 8026b86: 681a ldr r2, [r3, #0] + 8026b88: 69fb ldr r3, [r7, #28] + 8026b8a: 4013 ands r3, r2 + 8026b8c: 2b00 cmp r3, #0 + 8026b8e: d0d6 beq.n 8026b3e } } } /* Update ADC state machine */ SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - 8026b0c: 687b ldr r3, [r7, #4] - 8026b0e: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026b10: f443 7200 orr.w r2, r3, #512 ; 0x200 - 8026b14: 687b ldr r3, [r7, #4] - 8026b16: 655a str r2, [r3, #84] ; 0x54 + 8026b90: 687b ldr r3, [r7, #4] + 8026b92: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026b94: f443 7200 orr.w r2, r3, #512 ; 0x200 + 8026b98: 687b ldr r3, [r7, #4] + 8026b9a: 655a str r2, [r3, #84] ; 0x54 /* Determine whether any further conversion upcoming on group regular */ /* by external trigger, continuous mode or scan sequence on going. */ if ((LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance) != 0UL) - 8026b18: 687b ldr r3, [r7, #4] - 8026b1a: 681b ldr r3, [r3, #0] - 8026b1c: 4618 mov r0, r3 - 8026b1e: f7ff fb29 bl 8026174 - 8026b22: 4603 mov r3, r0 - 8026b24: 2b00 cmp r3, #0 - 8026b26: d01c beq.n 8026b62 + 8026b9c: 687b ldr r3, [r7, #4] + 8026b9e: 681b ldr r3, [r3, #0] + 8026ba0: 4618 mov r0, r3 + 8026ba2: f7ff fb29 bl 80261f8 + 8026ba6: 4603 mov r3, r0 + 8026ba8: 2b00 cmp r3, #0 + 8026baa: d01c beq.n 8026be6 && (hadc->Init.ContinuousConvMode == DISABLE) - 8026b28: 687b ldr r3, [r7, #4] - 8026b2a: 7d5b ldrb r3, [r3, #21] - 8026b2c: 2b00 cmp r3, #0 - 8026b2e: d118 bne.n 8026b62 + 8026bac: 687b ldr r3, [r7, #4] + 8026bae: 7d5b ldrb r3, [r3, #21] + 8026bb0: 2b00 cmp r3, #0 + 8026bb2: d118 bne.n 8026be6 ) { /* Check whether end of sequence is reached */ if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS)) - 8026b30: 687b ldr r3, [r7, #4] - 8026b32: 681b ldr r3, [r3, #0] - 8026b34: 681b ldr r3, [r3, #0] - 8026b36: f003 0308 and.w r3, r3, #8 - 8026b3a: 2b08 cmp r3, #8 - 8026b3c: d111 bne.n 8026b62 + 8026bb4: 687b ldr r3, [r7, #4] + 8026bb6: 681b ldr r3, [r3, #0] + 8026bb8: 681b ldr r3, [r3, #0] + 8026bba: f003 0308 and.w r3, r3, #8 + 8026bbe: 2b08 cmp r3, #8 + 8026bc0: d111 bne.n 8026be6 { /* Set ADC state */ CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - 8026b3e: 687b ldr r3, [r7, #4] - 8026b40: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026b42: f423 7280 bic.w r2, r3, #256 ; 0x100 - 8026b46: 687b ldr r3, [r7, #4] - 8026b48: 655a str r2, [r3, #84] ; 0x54 + 8026bc2: 687b ldr r3, [r7, #4] + 8026bc4: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026bc6: f423 7280 bic.w r2, r3, #256 ; 0x100 + 8026bca: 687b ldr r3, [r7, #4] + 8026bcc: 655a str r2, [r3, #84] ; 0x54 if ((hadc->State & HAL_ADC_STATE_INJ_BUSY) == 0UL) - 8026b4a: 687b ldr r3, [r7, #4] - 8026b4c: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026b4e: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8026b52: 2b00 cmp r3, #0 - 8026b54: d105 bne.n 8026b62 + 8026bce: 687b ldr r3, [r7, #4] + 8026bd0: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026bd2: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 8026bd6: 2b00 cmp r3, #0 + 8026bd8: d105 bne.n 8026be6 { SET_BIT(hadc->State, HAL_ADC_STATE_READY); - 8026b56: 687b ldr r3, [r7, #4] - 8026b58: 6d5b ldr r3, [r3, #84] ; 0x54 - 8026b5a: f043 0201 orr.w r2, r3, #1 - 8026b5e: 687b ldr r3, [r7, #4] - 8026b60: 655a str r2, [r3, #84] ; 0x54 + 8026bda: 687b ldr r3, [r7, #4] + 8026bdc: 6d5b ldr r3, [r3, #84] ; 0x54 + 8026bde: f043 0201 orr.w r2, r3, #1 + 8026be2: 687b ldr r3, [r7, #4] + 8026be4: 655a str r2, [r3, #84] ; 0x54 } /* Get relevant register CFGR in ADC instance of ADC master or slave */ /* in function of multimode state (for devices with multimode */ /* available). */ if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) - 8026b62: 687b ldr r3, [r7, #4] - 8026b64: 681b ldr r3, [r3, #0] - 8026b66: 4a1f ldr r2, [pc, #124] ; (8026be4 ) - 8026b68: 4293 cmp r3, r2 - 8026b6a: d002 beq.n 8026b72 - 8026b6c: 687b ldr r3, [r7, #4] - 8026b6e: 681b ldr r3, [r3, #0] - 8026b70: e000 b.n 8026b74 - 8026b72: 4b1b ldr r3, [pc, #108] ; (8026be0 ) - 8026b74: 687a ldr r2, [r7, #4] - 8026b76: 6812 ldr r2, [r2, #0] - 8026b78: 4293 cmp r3, r2 - 8026b7a: d008 beq.n 8026b8e + 8026be6: 687b ldr r3, [r7, #4] + 8026be8: 681b ldr r3, [r3, #0] + 8026bea: 4a1f ldr r2, [pc, #124] ; (8026c68 ) + 8026bec: 4293 cmp r3, r2 + 8026bee: d002 beq.n 8026bf6 + 8026bf0: 687b ldr r3, [r7, #4] + 8026bf2: 681b ldr r3, [r3, #0] + 8026bf4: e000 b.n 8026bf8 + 8026bf6: 4b1b ldr r3, [pc, #108] ; (8026c64 ) + 8026bf8: 687a ldr r2, [r7, #4] + 8026bfa: 6812 ldr r2, [r2, #0] + 8026bfc: 4293 cmp r3, r2 + 8026bfe: d008 beq.n 8026c12 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 8026b7c: 697b ldr r3, [r7, #20] - 8026b7e: 2b00 cmp r3, #0 - 8026b80: d005 beq.n 8026b8e + 8026c00: 697b ldr r3, [r7, #20] + 8026c02: 2b00 cmp r3, #0 + 8026c04: d005 beq.n 8026c12 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) - 8026b82: 697b ldr r3, [r7, #20] - 8026b84: 2b05 cmp r3, #5 - 8026b86: d002 beq.n 8026b8e + 8026c06: 697b ldr r3, [r7, #20] + 8026c08: 2b05 cmp r3, #5 + 8026c0a: d002 beq.n 8026c12 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) - 8026b88: 697b ldr r3, [r7, #20] - 8026b8a: 2b09 cmp r3, #9 - 8026b8c: d104 bne.n 8026b98 + 8026c0c: 697b ldr r3, [r7, #20] + 8026c0e: 2b09 cmp r3, #9 + 8026c10: d104 bne.n 8026c1c ) { /* Retrieve handle ADC CFGR register */ tmp_cfgr = READ_REG(hadc->Instance->CFGR); - 8026b8e: 687b ldr r3, [r7, #4] - 8026b90: 681b ldr r3, [r3, #0] - 8026b92: 68db ldr r3, [r3, #12] - 8026b94: 61bb str r3, [r7, #24] - 8026b96: e00c b.n 8026bb2 + 8026c12: 687b ldr r3, [r7, #4] + 8026c14: 681b ldr r3, [r3, #0] + 8026c16: 68db ldr r3, [r3, #12] + 8026c18: 61bb str r3, [r7, #24] + 8026c1a: e00c b.n 8026c36 } else { /* Retrieve Master ADC CFGR register */ tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance); - 8026b98: 687b ldr r3, [r7, #4] - 8026b9a: 681b ldr r3, [r3, #0] - 8026b9c: 4a11 ldr r2, [pc, #68] ; (8026be4 ) - 8026b9e: 4293 cmp r3, r2 - 8026ba0: d002 beq.n 8026ba8 - 8026ba2: 687b ldr r3, [r7, #4] - 8026ba4: 681b ldr r3, [r3, #0] - 8026ba6: e000 b.n 8026baa - 8026ba8: 4b0d ldr r3, [pc, #52] ; (8026be0 ) - 8026baa: 60fb str r3, [r7, #12] + 8026c1c: 687b ldr r3, [r7, #4] + 8026c1e: 681b ldr r3, [r3, #0] + 8026c20: 4a11 ldr r2, [pc, #68] ; (8026c68 ) + 8026c22: 4293 cmp r3, r2 + 8026c24: d002 beq.n 8026c2c + 8026c26: 687b ldr r3, [r7, #4] + 8026c28: 681b ldr r3, [r3, #0] + 8026c2a: e000 b.n 8026c2e + 8026c2c: 4b0d ldr r3, [pc, #52] ; (8026c64 ) + 8026c2e: 60fb str r3, [r7, #12] tmp_cfgr = READ_REG(tmpADC_Master->CFGR); - 8026bac: 68fb ldr r3, [r7, #12] - 8026bae: 68db ldr r3, [r3, #12] - 8026bb0: 61bb str r3, [r7, #24] + 8026c30: 68fb ldr r3, [r7, #12] + 8026c32: 68db ldr r3, [r3, #12] + 8026c34: 61bb str r3, [r7, #24] } /* Clear polled flag */ if (tmp_Flag_End == ADC_FLAG_EOS) - 8026bb2: 69fb ldr r3, [r7, #28] - 8026bb4: 2b08 cmp r3, #8 - 8026bb6: d104 bne.n 8026bc2 + 8026c36: 69fb ldr r3, [r7, #28] + 8026c38: 2b08 cmp r3, #8 + 8026c3a: d104 bne.n 8026c46 { __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOS); - 8026bb8: 687b ldr r3, [r7, #4] - 8026bba: 681b ldr r3, [r3, #0] - 8026bbc: 2208 movs r2, #8 - 8026bbe: 601a str r2, [r3, #0] - 8026bc0: e008 b.n 8026bd4 + 8026c3c: 687b ldr r3, [r7, #4] + 8026c3e: 681b ldr r3, [r3, #0] + 8026c40: 2208 movs r2, #8 + 8026c42: 601a str r2, [r3, #0] + 8026c44: e008 b.n 8026c58 else { /* Clear end of conversion EOC flag of regular group if low power feature */ /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ /* until data register is read using function HAL_ADC_GetValue(). */ if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL) - 8026bc2: 69bb ldr r3, [r7, #24] - 8026bc4: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8026bc8: 2b00 cmp r3, #0 - 8026bca: d103 bne.n 8026bd4 + 8026c46: 69bb ldr r3, [r7, #24] + 8026c48: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 8026c4c: 2b00 cmp r3, #0 + 8026c4e: d103 bne.n 8026c58 { __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); - 8026bcc: 687b ldr r3, [r7, #4] - 8026bce: 681b ldr r3, [r3, #0] - 8026bd0: 220c movs r2, #12 - 8026bd2: 601a str r2, [r3, #0] + 8026c50: 687b ldr r3, [r7, #4] + 8026c52: 681b ldr r3, [r3, #0] + 8026c54: 220c movs r2, #12 + 8026c56: 601a str r2, [r3, #0] } } /* Return function status */ return HAL_OK; - 8026bd4: 2300 movs r3, #0 -} - 8026bd6: 4618 mov r0, r3 - 8026bd8: 3720 adds r7, #32 - 8026bda: 46bd mov sp, r7 - 8026bdc: bd80 pop {r7, pc} - 8026bde: bf00 nop - 8026be0: 40022000 .word 0x40022000 - 8026be4: 40022100 .word 0x40022100 - 8026be8: 40022300 .word 0x40022300 - 8026bec: 58026300 .word 0x58026300 - -08026bf0 : + 8026c58: 2300 movs r3, #0 +} + 8026c5a: 4618 mov r0, r3 + 8026c5c: 3720 adds r7, #32 + 8026c5e: 46bd mov sp, r7 + 8026c60: bd80 pop {r7, pc} + 8026c62: bf00 nop + 8026c64: 40022000 .word 0x40022000 + 8026c68: 40022100 .word 0x40022100 + 8026c6c: 40022300 .word 0x40022300 + 8026c70: 58026300 .word 0x58026300 + +08026c74 : * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). * @param hadc ADC handle * @retval ADC group regular conversion data */ uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef *hadc) { - 8026bf0: b480 push {r7} - 8026bf2: b083 sub sp, #12 - 8026bf4: af00 add r7, sp, #0 - 8026bf6: 6078 str r0, [r7, #4] + 8026c74: b480 push {r7} + 8026c76: b083 sub sp, #12 + 8026c78: af00 add r7, sp, #0 + 8026c7a: 6078 str r0, [r7, #4] /* Note: EOC flag is not cleared here by software because automatically */ /* cleared by hardware when reading register DR. */ /* Return ADC converted value */ return hadc->Instance->DR; - 8026bf8: 687b ldr r3, [r7, #4] - 8026bfa: 681b ldr r3, [r3, #0] - 8026bfc: 6c1b ldr r3, [r3, #64] ; 0x40 -} - 8026bfe: 4618 mov r0, r3 - 8026c00: 370c adds r7, #12 - 8026c02: 46bd mov sp, r7 - 8026c04: f85d 7b04 ldr.w r7, [sp], #4 - 8026c08: 4770 bx lr + 8026c7c: 687b ldr r3, [r7, #4] + 8026c7e: 681b ldr r3, [r3, #0] + 8026c80: 6c1b ldr r3, [r3, #64] ; 0x40 +} + 8026c82: 4618 mov r0, r3 + 8026c84: 370c adds r7, #12 + 8026c86: 46bd mov sp, r7 + 8026c88: f85d 7b04 ldr.w r7, [sp], #4 + 8026c8c: 4770 bx lr ... -08026c0c : +08026c90 : * @param hadc ADC handle * @param sConfig Structure of ADC channel assigned to ADC group regular. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig) { - 8026c0c: b590 push {r4, r7, lr} - 8026c0e: b0a1 sub sp, #132 ; 0x84 - 8026c10: af00 add r7, sp, #0 - 8026c12: 6078 str r0, [r7, #4] - 8026c14: 6039 str r1, [r7, #0] + 8026c90: b590 push {r4, r7, lr} + 8026c92: b0a1 sub sp, #132 ; 0x84 + 8026c94: af00 add r7, sp, #0 + 8026c96: 6078 str r0, [r7, #4] + 8026c98: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8026c16: 2300 movs r3, #0 - 8026c18: f887 307f strb.w r3, [r7, #127] ; 0x7f + 8026c9a: 2300 movs r3, #0 + 8026c9c: f887 307f strb.w r3, [r7, #127] ; 0x7f uint32_t tmpOffsetShifted; uint32_t tmp_config_internal_channel; __IO uint32_t wait_loop_index = 0; - 8026c1c: 2300 movs r3, #0 - 8026c1e: 60bb str r3, [r7, #8] + 8026ca0: 2300 movs r3, #0 + 8026ca2: 60bb str r3, [r7, #8] /* if ROVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is ignored (considered as reset) */ assert_param(!((sConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENABLE))); /* Verification of channel number */ if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED) - 8026c20: 683b ldr r3, [r7, #0] - 8026c22: 68db ldr r3, [r3, #12] - 8026c24: 4a9d ldr r2, [pc, #628] ; (8026e9c ) - 8026c26: 4293 cmp r3, r2 + 8026ca4: 683b ldr r3, [r7, #0] + 8026ca6: 68db ldr r3, [r3, #12] + 8026ca8: 4a9d ldr r2, [pc, #628] ; (8026f20 ) + 8026caa: 4293 cmp r3, r2 } #endif } /* Process locked */ __HAL_LOCK(hadc); - 8026c28: 687b ldr r3, [r7, #4] - 8026c2a: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 - 8026c2e: 2b01 cmp r3, #1 - 8026c30: d101 bne.n 8026c36 - 8026c32: 2302 movs r3, #2 - 8026c34: e321 b.n 802727a - 8026c36: 687b ldr r3, [r7, #4] - 8026c38: 2201 movs r2, #1 - 8026c3a: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 8026cac: 687b ldr r3, [r7, #4] + 8026cae: f893 3050 ldrb.w r3, [r3, #80] ; 0x50 + 8026cb2: 2b01 cmp r3, #1 + 8026cb4: d101 bne.n 8026cba + 8026cb6: 2302 movs r3, #2 + 8026cb8: e321 b.n 80272fe + 8026cba: 687b ldr r3, [r7, #4] + 8026cbc: 2201 movs r2, #1 + 8026cbe: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular group: */ /* - Channel number */ /* - Channel rank */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL) - 8026c3e: 687b ldr r3, [r7, #4] - 8026c40: 681b ldr r3, [r3, #0] - 8026c42: 4618 mov r0, r3 - 8026c44: f7ff fc04 bl 8026450 - 8026c48: 4603 mov r3, r0 - 8026c4a: 2b00 cmp r3, #0 - 8026c4c: f040 8306 bne.w 802725c + 8026cc2: 687b ldr r3, [r7, #4] + 8026cc4: 681b ldr r3, [r3, #0] + 8026cc6: 4618 mov r0, r3 + 8026cc8: f7ff fc04 bl 80264d4 + 8026ccc: 4603 mov r3, r0 + 8026cce: 2b00 cmp r3, #0 + 8026cd0: f040 8306 bne.w 80272e0 /* ADC channels preselection */ hadc->Instance->PCSEL_RES0 |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) & 0x1FUL)); } #else /* ADC channels preselection */ hadc->Instance->PCSEL |= (1UL << (__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) & 0x1FUL)); - 8026c50: 683b ldr r3, [r7, #0] - 8026c52: 681b ldr r3, [r3, #0] - 8026c54: f3c3 0313 ubfx r3, r3, #0, #20 - 8026c58: 2b00 cmp r3, #0 - 8026c5a: d108 bne.n 8026c6e - 8026c5c: 683b ldr r3, [r7, #0] - 8026c5e: 681b ldr r3, [r3, #0] - 8026c60: 0e9b lsrs r3, r3, #26 - 8026c62: f003 031f and.w r3, r3, #31 - 8026c66: 2201 movs r2, #1 - 8026c68: fa02 f303 lsl.w r3, r2, r3 - 8026c6c: e016 b.n 8026c9c - 8026c6e: 683b ldr r3, [r7, #0] - 8026c70: 681b ldr r3, [r3, #0] - 8026c72: 667b str r3, [r7, #100] ; 0x64 + 8026cd4: 683b ldr r3, [r7, #0] + 8026cd6: 681b ldr r3, [r3, #0] + 8026cd8: f3c3 0313 ubfx r3, r3, #0, #20 + 8026cdc: 2b00 cmp r3, #0 + 8026cde: d108 bne.n 8026cf2 + 8026ce0: 683b ldr r3, [r7, #0] + 8026ce2: 681b ldr r3, [r3, #0] + 8026ce4: 0e9b lsrs r3, r3, #26 + 8026ce6: f003 031f and.w r3, r3, #31 + 8026cea: 2201 movs r2, #1 + 8026cec: fa02 f303 lsl.w r3, r2, r3 + 8026cf0: e016 b.n 8026d20 + 8026cf2: 683b ldr r3, [r7, #0] + 8026cf4: 681b ldr r3, [r3, #0] + 8026cf6: 667b str r3, [r7, #100] ; 0x64 uint32_t result; #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026c74: 6e7b ldr r3, [r7, #100] ; 0x64 - 8026c76: fa93 f3a3 rbit r3, r3 - 8026c7a: 663b str r3, [r7, #96] ; 0x60 + 8026cf8: 6e7b ldr r3, [r7, #100] ; 0x64 + 8026cfa: fa93 f3a3 rbit r3, r3 + 8026cfe: 663b str r3, [r7, #96] ; 0x60 result |= value & 1U; s--; } result <<= s; /* shift when v's highest bits are zero */ #endif return result; - 8026c7c: 6e3b ldr r3, [r7, #96] ; 0x60 - 8026c7e: 66bb str r3, [r7, #104] ; 0x68 + 8026d00: 6e3b ldr r3, [r7, #96] ; 0x60 + 8026d02: 66bb str r3, [r7, #104] ; 0x68 optimisations using the logic "value was passed to __builtin_clz, so it is non-zero". ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a single CLZ instruction. */ if (value == 0U) - 8026c80: 6ebb ldr r3, [r7, #104] ; 0x68 - 8026c82: 2b00 cmp r3, #0 - 8026c84: d101 bne.n 8026c8a + 8026d04: 6ebb ldr r3, [r7, #104] ; 0x68 + 8026d06: 2b00 cmp r3, #0 + 8026d08: d101 bne.n 8026d0e { return 32U; - 8026c86: 2320 movs r3, #32 - 8026c88: e003 b.n 8026c92 + 8026d0a: 2320 movs r3, #32 + 8026d0c: e003 b.n 8026d16 } return __builtin_clz(value); - 8026c8a: 6ebb ldr r3, [r7, #104] ; 0x68 - 8026c8c: fab3 f383 clz r3, r3 - 8026c90: b2db uxtb r3, r3 - 8026c92: f003 031f and.w r3, r3, #31 - 8026c96: 2201 movs r2, #1 - 8026c98: fa02 f303 lsl.w r3, r2, r3 - 8026c9c: 687a ldr r2, [r7, #4] - 8026c9e: 6812 ldr r2, [r2, #0] - 8026ca0: 69d1 ldr r1, [r2, #28] - 8026ca2: 687a ldr r2, [r7, #4] - 8026ca4: 6812 ldr r2, [r2, #0] - 8026ca6: 430b orrs r3, r1 - 8026ca8: 61d3 str r3, [r2, #28] + 8026d0e: 6ebb ldr r3, [r7, #104] ; 0x68 + 8026d10: fab3 f383 clz r3, r3 + 8026d14: b2db uxtb r3, r3 + 8026d16: f003 031f and.w r3, r3, #31 + 8026d1a: 2201 movs r2, #1 + 8026d1c: fa02 f303 lsl.w r3, r2, r3 + 8026d20: 687a ldr r2, [r7, #4] + 8026d22: 6812 ldr r2, [r2, #0] + 8026d24: 69d1 ldr r1, [r2, #28] + 8026d26: 687a ldr r2, [r7, #4] + 8026d28: 6812 ldr r2, [r2, #0] + 8026d2a: 430b orrs r3, r1 + 8026d2c: 61d3 str r3, [r2, #28] #endif /* ADC_VER_V5_V90 */ /* Set ADC group regular sequence: channel on the selected scan sequence rank */ LL_ADC_REG_SetSequencerRanks(hadc->Instance, sConfig->Rank, sConfig->Channel); - 8026caa: 687b ldr r3, [r7, #4] - 8026cac: 6818 ldr r0, [r3, #0] - 8026cae: 683b ldr r3, [r7, #0] - 8026cb0: 6859 ldr r1, [r3, #4] - 8026cb2: 683b ldr r3, [r7, #0] - 8026cb4: 681b ldr r3, [r3, #0] - 8026cb6: 461a mov r2, r3 - 8026cb8: f7ff fa6f bl 802619a + 8026d2e: 687b ldr r3, [r7, #4] + 8026d30: 6818 ldr r0, [r3, #0] + 8026d32: 683b ldr r3, [r7, #0] + 8026d34: 6859 ldr r1, [r3, #4] + 8026d36: 683b ldr r3, [r7, #0] + 8026d38: 681b ldr r3, [r3, #0] + 8026d3a: 461a mov r2, r3 + 8026d3c: f7ff fa6f bl 802621e /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular group: */ /* - Channel sampling time */ /* - Channel offset */ tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 8026cbc: 687b ldr r3, [r7, #4] - 8026cbe: 681b ldr r3, [r3, #0] - 8026cc0: 4618 mov r0, r3 - 8026cc2: f7ff fbc5 bl 8026450 - 8026cc6: 67b8 str r0, [r7, #120] ; 0x78 + 8026d40: 687b ldr r3, [r7, #4] + 8026d42: 681b ldr r3, [r3, #0] + 8026d44: 4618 mov r0, r3 + 8026d46: f7ff fbc5 bl 80264d4 + 8026d4a: 67b8 str r0, [r7, #120] ; 0x78 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); - 8026cc8: 687b ldr r3, [r7, #4] - 8026cca: 681b ldr r3, [r3, #0] - 8026ccc: 4618 mov r0, r3 - 8026cce: f7ff fbe7 bl 80264a0 - 8026cd2: 6778 str r0, [r7, #116] ; 0x74 + 8026d4c: 687b ldr r3, [r7, #4] + 8026d4e: 681b ldr r3, [r3, #0] + 8026d50: 4618 mov r0, r3 + 8026d52: f7ff fbe7 bl 8026524 + 8026d56: 6778 str r0, [r7, #116] ; 0x74 if ((tmp_adc_is_conversion_on_going_regular == 0UL) - 8026cd4: 6fbb ldr r3, [r7, #120] ; 0x78 - 8026cd6: 2b00 cmp r3, #0 - 8026cd8: f040 80b3 bne.w 8026e42 + 8026d58: 6fbb ldr r3, [r7, #120] ; 0x78 + 8026d5a: 2b00 cmp r3, #0 + 8026d5c: f040 80b3 bne.w 8026ec6 && (tmp_adc_is_conversion_on_going_injected == 0UL) - 8026cdc: 6f7b ldr r3, [r7, #116] ; 0x74 - 8026cde: 2b00 cmp r3, #0 - 8026ce0: f040 80af bne.w 8026e42 + 8026d60: 6f7b ldr r3, [r7, #116] ; 0x74 + 8026d62: 2b00 cmp r3, #0 + 8026d64: f040 80af bne.w 8026ec6 ) { /* Set sampling time of the selected ADC channel */ LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfig->Channel, sConfig->SamplingTime); - 8026ce4: 687b ldr r3, [r7, #4] - 8026ce6: 6818 ldr r0, [r3, #0] - 8026ce8: 683b ldr r3, [r7, #0] - 8026cea: 6819 ldr r1, [r3, #0] - 8026cec: 683b ldr r3, [r7, #0] - 8026cee: 689b ldr r3, [r3, #8] - 8026cf0: 461a mov r2, r3 - 8026cf2: f7ff fa7e bl 80261f2 + 8026d68: 687b ldr r3, [r7, #4] + 8026d6a: 6818 ldr r0, [r3, #0] + 8026d6c: 683b ldr r3, [r7, #0] + 8026d6e: 6819 ldr r1, [r3, #0] + 8026d70: 683b ldr r3, [r7, #0] + 8026d72: 689b ldr r3, [r3, #8] + 8026d74: 461a mov r2, r3 + 8026d76: f7ff fa7e bl 8026276 tmpOffsetShifted = ADC3_OFFSET_SHIFT_RESOLUTION(hadc, (uint32_t)sConfig->Offset); } else #endif /* ADC_VER_V5_V90 */ { tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, (uint32_t)sConfig->Offset); - 8026cf6: 4b6a ldr r3, [pc, #424] ; (8026ea0 ) - 8026cf8: 681b ldr r3, [r3, #0] - 8026cfa: f003 4370 and.w r3, r3, #4026531840 ; 0xf0000000 - 8026cfe: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8026d02: d10b bne.n 8026d1c - 8026d04: 683b ldr r3, [r7, #0] - 8026d06: 695a ldr r2, [r3, #20] - 8026d08: 687b ldr r3, [r7, #4] - 8026d0a: 681b ldr r3, [r3, #0] - 8026d0c: 68db ldr r3, [r3, #12] - 8026d0e: 089b lsrs r3, r3, #2 - 8026d10: f003 0307 and.w r3, r3, #7 - 8026d14: 005b lsls r3, r3, #1 - 8026d16: fa02 f303 lsl.w r3, r2, r3 - 8026d1a: e01d b.n 8026d58 - 8026d1c: 687b ldr r3, [r7, #4] - 8026d1e: 681b ldr r3, [r3, #0] - 8026d20: 68db ldr r3, [r3, #12] - 8026d22: f003 0310 and.w r3, r3, #16 - 8026d26: 2b00 cmp r3, #0 - 8026d28: d10b bne.n 8026d42 - 8026d2a: 683b ldr r3, [r7, #0] - 8026d2c: 695a ldr r2, [r3, #20] - 8026d2e: 687b ldr r3, [r7, #4] - 8026d30: 681b ldr r3, [r3, #0] - 8026d32: 68db ldr r3, [r3, #12] - 8026d34: 089b lsrs r3, r3, #2 - 8026d36: f003 0307 and.w r3, r3, #7 - 8026d3a: 005b lsls r3, r3, #1 - 8026d3c: fa02 f303 lsl.w r3, r2, r3 - 8026d40: e00a b.n 8026d58 - 8026d42: 683b ldr r3, [r7, #0] - 8026d44: 695a ldr r2, [r3, #20] - 8026d46: 687b ldr r3, [r7, #4] - 8026d48: 681b ldr r3, [r3, #0] - 8026d4a: 68db ldr r3, [r3, #12] - 8026d4c: 089b lsrs r3, r3, #2 - 8026d4e: f003 0304 and.w r3, r3, #4 - 8026d52: 005b lsls r3, r3, #1 - 8026d54: fa02 f303 lsl.w r3, r2, r3 - 8026d58: 673b str r3, [r7, #112] ; 0x70 + 8026d7a: 4b6a ldr r3, [pc, #424] ; (8026f24 ) + 8026d7c: 681b ldr r3, [r3, #0] + 8026d7e: f003 4370 and.w r3, r3, #4026531840 ; 0xf0000000 + 8026d82: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8026d86: d10b bne.n 8026da0 + 8026d88: 683b ldr r3, [r7, #0] + 8026d8a: 695a ldr r2, [r3, #20] + 8026d8c: 687b ldr r3, [r7, #4] + 8026d8e: 681b ldr r3, [r3, #0] + 8026d90: 68db ldr r3, [r3, #12] + 8026d92: 089b lsrs r3, r3, #2 + 8026d94: f003 0307 and.w r3, r3, #7 + 8026d98: 005b lsls r3, r3, #1 + 8026d9a: fa02 f303 lsl.w r3, r2, r3 + 8026d9e: e01d b.n 8026ddc + 8026da0: 687b ldr r3, [r7, #4] + 8026da2: 681b ldr r3, [r3, #0] + 8026da4: 68db ldr r3, [r3, #12] + 8026da6: f003 0310 and.w r3, r3, #16 + 8026daa: 2b00 cmp r3, #0 + 8026dac: d10b bne.n 8026dc6 + 8026dae: 683b ldr r3, [r7, #0] + 8026db0: 695a ldr r2, [r3, #20] + 8026db2: 687b ldr r3, [r7, #4] + 8026db4: 681b ldr r3, [r3, #0] + 8026db6: 68db ldr r3, [r3, #12] + 8026db8: 089b lsrs r3, r3, #2 + 8026dba: f003 0307 and.w r3, r3, #7 + 8026dbe: 005b lsls r3, r3, #1 + 8026dc0: fa02 f303 lsl.w r3, r2, r3 + 8026dc4: e00a b.n 8026ddc + 8026dc6: 683b ldr r3, [r7, #0] + 8026dc8: 695a ldr r2, [r3, #20] + 8026dca: 687b ldr r3, [r7, #4] + 8026dcc: 681b ldr r3, [r3, #0] + 8026dce: 68db ldr r3, [r3, #12] + 8026dd0: 089b lsrs r3, r3, #2 + 8026dd2: f003 0304 and.w r3, r3, #4 + 8026dd6: 005b lsls r3, r3, #1 + 8026dd8: fa02 f303 lsl.w r3, r2, r3 + 8026ddc: 673b str r3, [r7, #112] ; 0x70 } if (sConfig->OffsetNumber != ADC_OFFSET_NONE) - 8026d5a: 683b ldr r3, [r7, #0] - 8026d5c: 691b ldr r3, [r3, #16] - 8026d5e: 2b04 cmp r3, #4 - 8026d60: d027 beq.n 8026db2 + 8026dde: 683b ldr r3, [r7, #0] + 8026de0: 691b ldr r3, [r3, #16] + 8026de2: 2b04 cmp r3, #4 + 8026de4: d027 beq.n 8026e36 { /* Set ADC selected offset number */ LL_ADC_SetOffset(hadc->Instance, sConfig->OffsetNumber, sConfig->Channel, tmpOffsetShifted); - 8026d62: 687b ldr r3, [r7, #4] - 8026d64: 6818 ldr r0, [r3, #0] - 8026d66: 683b ldr r3, [r7, #0] - 8026d68: 6919 ldr r1, [r3, #16] - 8026d6a: 683b ldr r3, [r7, #0] - 8026d6c: 681a ldr r2, [r3, #0] - 8026d6e: 6f3b ldr r3, [r7, #112] ; 0x70 - 8026d70: f7ff f9ac bl 80260cc + 8026de6: 687b ldr r3, [r7, #4] + 8026de8: 6818 ldr r0, [r3, #0] + 8026dea: 683b ldr r3, [r7, #0] + 8026dec: 6919 ldr r1, [r3, #16] + 8026dee: 683b ldr r3, [r7, #0] + 8026df0: 681a ldr r2, [r3, #0] + 8026df2: 6f3b ldr r3, [r7, #112] ; 0x70 + 8026df4: f7ff f9ac bl 8026150 else #endif /* ADC_VER_V5_V90 */ { assert_param(IS_FUNCTIONAL_STATE(sConfig->OffsetSignedSaturation)); /* Set ADC selected offset signed saturation */ LL_ADC_SetOffsetSignedSaturation(hadc->Instance, sConfig->OffsetNumber, (sConfig->OffsetSignedSaturation == ENABLE) ? LL_ADC_OFFSET_SIGNED_SATURATION_ENABLE : LL_ADC_OFFSET_SIGNED_SATURATION_DISABLE); - 8026d74: 687b ldr r3, [r7, #4] - 8026d76: 6818 ldr r0, [r3, #0] - 8026d78: 683b ldr r3, [r7, #0] - 8026d7a: 6919 ldr r1, [r3, #16] - 8026d7c: 683b ldr r3, [r7, #0] - 8026d7e: 7e5b ldrb r3, [r3, #25] - 8026d80: 2b01 cmp r3, #1 - 8026d82: d102 bne.n 8026d8a - 8026d84: f04f 4300 mov.w r3, #2147483648 ; 0x80000000 - 8026d88: e000 b.n 8026d8c - 8026d8a: 2300 movs r3, #0 - 8026d8c: 461a mov r2, r3 - 8026d8e: f7ff f9d6 bl 802613e + 8026df8: 687b ldr r3, [r7, #4] + 8026dfa: 6818 ldr r0, [r3, #0] + 8026dfc: 683b ldr r3, [r7, #0] + 8026dfe: 6919 ldr r1, [r3, #16] + 8026e00: 683b ldr r3, [r7, #0] + 8026e02: 7e5b ldrb r3, [r3, #25] + 8026e04: 2b01 cmp r3, #1 + 8026e06: d102 bne.n 8026e0e + 8026e08: f04f 4300 mov.w r3, #2147483648 ; 0x80000000 + 8026e0c: e000 b.n 8026e10 + 8026e0e: 2300 movs r3, #0 + 8026e10: 461a mov r2, r3 + 8026e12: f7ff f9d6 bl 80261c2 assert_param(IS_FUNCTIONAL_STATE(sConfig->OffsetRightShift)); /* Set ADC selected offset right shift */ LL_ADC_SetDataRightShift(hadc->Instance, sConfig->OffsetNumber, (sConfig->OffsetRightShift == ENABLE) ? LL_ADC_OFFSET_RSHIFT_ENABLE : LL_ADC_OFFSET_RSHIFT_DISABLE); - 8026d92: 687b ldr r3, [r7, #4] - 8026d94: 6818 ldr r0, [r3, #0] - 8026d96: 683b ldr r3, [r7, #0] - 8026d98: 6919 ldr r1, [r3, #16] - 8026d9a: 683b ldr r3, [r7, #0] - 8026d9c: 7e1b ldrb r3, [r3, #24] - 8026d9e: 2b01 cmp r3, #1 - 8026da0: d102 bne.n 8026da8 - 8026da2: f44f 6300 mov.w r3, #2048 ; 0x800 - 8026da6: e000 b.n 8026daa - 8026da8: 2300 movs r3, #0 - 8026daa: 461a mov r2, r3 - 8026dac: f7ff f9ae bl 802610c - 8026db0: e047 b.n 8026e42 + 8026e16: 687b ldr r3, [r7, #4] + 8026e18: 6818 ldr r0, [r3, #0] + 8026e1a: 683b ldr r3, [r7, #0] + 8026e1c: 6919 ldr r1, [r3, #16] + 8026e1e: 683b ldr r3, [r7, #0] + 8026e20: 7e1b ldrb r3, [r3, #24] + 8026e22: 2b01 cmp r3, #1 + 8026e24: d102 bne.n 8026e2c + 8026e26: f44f 6300 mov.w r3, #2048 ; 0x800 + 8026e2a: e000 b.n 8026e2e + 8026e2c: 2300 movs r3, #0 + 8026e2e: 461a mov r2, r3 + 8026e30: f7ff f9ae bl 8026190 + 8026e34: e047 b.n 8026ec6 } } else #endif /* ADC_VER_V5_V90 */ { if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8026db2: 687b ldr r3, [r7, #4] - 8026db4: 681b ldr r3, [r3, #0] - 8026db6: 6e1b ldr r3, [r3, #96] ; 0x60 - 8026db8: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026dbc: 683b ldr r3, [r7, #0] - 8026dbe: 681b ldr r3, [r3, #0] - 8026dc0: 069b lsls r3, r3, #26 - 8026dc2: 429a cmp r2, r3 - 8026dc4: d107 bne.n 8026dd6 + 8026e36: 687b ldr r3, [r7, #4] + 8026e38: 681b ldr r3, [r3, #0] + 8026e3a: 6e1b ldr r3, [r3, #96] ; 0x60 + 8026e3c: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026e40: 683b ldr r3, [r7, #0] + 8026e42: 681b ldr r3, [r3, #0] + 8026e44: 069b lsls r3, r3, #26 + 8026e46: 429a cmp r2, r3 + 8026e48: d107 bne.n 8026e5a { CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_SSATE); - 8026dc6: 687b ldr r3, [r7, #4] - 8026dc8: 681b ldr r3, [r3, #0] - 8026dca: 6e1a ldr r2, [r3, #96] ; 0x60 - 8026dcc: 687b ldr r3, [r7, #4] - 8026dce: 681b ldr r3, [r3, #0] - 8026dd0: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8026dd4: 661a str r2, [r3, #96] ; 0x60 + 8026e4a: 687b ldr r3, [r7, #4] + 8026e4c: 681b ldr r3, [r3, #0] + 8026e4e: 6e1a ldr r2, [r3, #96] ; 0x60 + 8026e50: 687b ldr r3, [r7, #4] + 8026e52: 681b ldr r3, [r3, #0] + 8026e54: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 + 8026e58: 661a str r2, [r3, #96] ; 0x60 } if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8026dd6: 687b ldr r3, [r7, #4] - 8026dd8: 681b ldr r3, [r3, #0] - 8026dda: 6e5b ldr r3, [r3, #100] ; 0x64 - 8026ddc: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026de0: 683b ldr r3, [r7, #0] - 8026de2: 681b ldr r3, [r3, #0] - 8026de4: 069b lsls r3, r3, #26 - 8026de6: 429a cmp r2, r3 - 8026de8: d107 bne.n 8026dfa + 8026e5a: 687b ldr r3, [r7, #4] + 8026e5c: 681b ldr r3, [r3, #0] + 8026e5e: 6e5b ldr r3, [r3, #100] ; 0x64 + 8026e60: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026e64: 683b ldr r3, [r7, #0] + 8026e66: 681b ldr r3, [r3, #0] + 8026e68: 069b lsls r3, r3, #26 + 8026e6a: 429a cmp r2, r3 + 8026e6c: d107 bne.n 8026e7e { CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_SSATE); - 8026dea: 687b ldr r3, [r7, #4] - 8026dec: 681b ldr r3, [r3, #0] - 8026dee: 6e5a ldr r2, [r3, #100] ; 0x64 - 8026df0: 687b ldr r3, [r7, #4] - 8026df2: 681b ldr r3, [r3, #0] - 8026df4: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8026df8: 665a str r2, [r3, #100] ; 0x64 + 8026e6e: 687b ldr r3, [r7, #4] + 8026e70: 681b ldr r3, [r3, #0] + 8026e72: 6e5a ldr r2, [r3, #100] ; 0x64 + 8026e74: 687b ldr r3, [r7, #4] + 8026e76: 681b ldr r3, [r3, #0] + 8026e78: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 + 8026e7c: 665a str r2, [r3, #100] ; 0x64 } if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8026dfa: 687b ldr r3, [r7, #4] - 8026dfc: 681b ldr r3, [r3, #0] - 8026dfe: 6e9b ldr r3, [r3, #104] ; 0x68 - 8026e00: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026e04: 683b ldr r3, [r7, #0] - 8026e06: 681b ldr r3, [r3, #0] - 8026e08: 069b lsls r3, r3, #26 - 8026e0a: 429a cmp r2, r3 - 8026e0c: d107 bne.n 8026e1e + 8026e7e: 687b ldr r3, [r7, #4] + 8026e80: 681b ldr r3, [r3, #0] + 8026e82: 6e9b ldr r3, [r3, #104] ; 0x68 + 8026e84: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026e88: 683b ldr r3, [r7, #0] + 8026e8a: 681b ldr r3, [r3, #0] + 8026e8c: 069b lsls r3, r3, #26 + 8026e8e: 429a cmp r2, r3 + 8026e90: d107 bne.n 8026ea2 { CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_SSATE); - 8026e0e: 687b ldr r3, [r7, #4] - 8026e10: 681b ldr r3, [r3, #0] - 8026e12: 6e9a ldr r2, [r3, #104] ; 0x68 - 8026e14: 687b ldr r3, [r7, #4] - 8026e16: 681b ldr r3, [r3, #0] - 8026e18: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8026e1c: 669a str r2, [r3, #104] ; 0x68 + 8026e92: 687b ldr r3, [r7, #4] + 8026e94: 681b ldr r3, [r3, #0] + 8026e96: 6e9a ldr r2, [r3, #104] ; 0x68 + 8026e98: 687b ldr r3, [r7, #4] + 8026e9a: 681b ldr r3, [r3, #0] + 8026e9c: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 + 8026ea0: 669a str r2, [r3, #104] ; 0x68 } if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - 8026e1e: 687b ldr r3, [r7, #4] - 8026e20: 681b ldr r3, [r3, #0] - 8026e22: 6edb ldr r3, [r3, #108] ; 0x6c - 8026e24: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026e28: 683b ldr r3, [r7, #0] - 8026e2a: 681b ldr r3, [r3, #0] - 8026e2c: 069b lsls r3, r3, #26 - 8026e2e: 429a cmp r2, r3 - 8026e30: d107 bne.n 8026e42 + 8026ea2: 687b ldr r3, [r7, #4] + 8026ea4: 681b ldr r3, [r3, #0] + 8026ea6: 6edb ldr r3, [r3, #108] ; 0x6c + 8026ea8: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026eac: 683b ldr r3, [r7, #0] + 8026eae: 681b ldr r3, [r3, #0] + 8026eb0: 069b lsls r3, r3, #26 + 8026eb2: 429a cmp r2, r3 + 8026eb4: d107 bne.n 8026ec6 { CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_SSATE); - 8026e32: 687b ldr r3, [r7, #4] - 8026e34: 681b ldr r3, [r3, #0] - 8026e36: 6eda ldr r2, [r3, #108] ; 0x6c - 8026e38: 687b ldr r3, [r7, #4] - 8026e3a: 681b ldr r3, [r3, #0] - 8026e3c: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 - 8026e40: 66da str r2, [r3, #108] ; 0x6c + 8026eb6: 687b ldr r3, [r7, #4] + 8026eb8: 681b ldr r3, [r3, #0] + 8026eba: 6eda ldr r2, [r3, #108] ; 0x6c + 8026ebc: 687b ldr r3, [r7, #4] + 8026ebe: 681b ldr r3, [r3, #0] + 8026ec0: f022 4200 bic.w r2, r2, #2147483648 ; 0x80000000 + 8026ec4: 66da str r2, [r3, #108] ; 0x6c /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated only when ADC is disabled: */ /* - Single or differential mode */ /* - Internal measurement channels: Vbat/VrefInt/TempSensor */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 8026e42: 687b ldr r3, [r7, #4] - 8026e44: 681b ldr r3, [r3, #0] - 8026e46: 4618 mov r0, r3 - 8026e48: f7ff fab4 bl 80263b4 - 8026e4c: 4603 mov r3, r0 - 8026e4e: 2b00 cmp r3, #0 - 8026e50: f040 820d bne.w 802726e + 8026ec6: 687b ldr r3, [r7, #4] + 8026ec8: 681b ldr r3, [r3, #0] + 8026eca: 4618 mov r0, r3 + 8026ecc: f7ff fab4 bl 8026438 + 8026ed0: 4603 mov r3, r0 + 8026ed2: 2b00 cmp r3, #0 + 8026ed4: f040 820d bne.w 80272f2 { /* Set mode single-ended or differential input of the selected ADC channel */ LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfig->Channel, sConfig->SingleDiff); - 8026e54: 687b ldr r3, [r7, #4] - 8026e56: 6818 ldr r0, [r3, #0] - 8026e58: 683b ldr r3, [r7, #0] - 8026e5a: 6819 ldr r1, [r3, #0] - 8026e5c: 683b ldr r3, [r7, #0] - 8026e5e: 68db ldr r3, [r3, #12] - 8026e60: 461a mov r2, r3 - 8026e62: f7ff f9f1 bl 8026248 + 8026ed8: 687b ldr r3, [r7, #4] + 8026eda: 6818 ldr r0, [r3, #0] + 8026edc: 683b ldr r3, [r7, #0] + 8026ede: 6819 ldr r1, [r3, #0] + 8026ee0: 683b ldr r3, [r7, #0] + 8026ee2: 68db ldr r3, [r3, #12] + 8026ee4: 461a mov r2, r3 + 8026ee6: f7ff f9f1 bl 80262cc /* Configuration of differential mode */ if (sConfig->SingleDiff == ADC_DIFFERENTIAL_ENDED) - 8026e66: 683b ldr r3, [r7, #0] - 8026e68: 68db ldr r3, [r3, #12] - 8026e6a: 4a0c ldr r2, [pc, #48] ; (8026e9c ) - 8026e6c: 4293 cmp r3, r2 - 8026e6e: f040 8133 bne.w 80270d8 + 8026eea: 683b ldr r3, [r7, #0] + 8026eec: 68db ldr r3, [r3, #12] + 8026eee: 4a0c ldr r2, [pc, #48] ; (8026f20 ) + 8026ef0: 4293 cmp r3, r2 + 8026ef2: f040 8133 bne.w 802715c { /* Set sampling time of the selected ADC channel */ /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range */ LL_ADC_SetChannelSamplingTime(hadc->Instance, - 8026e72: 687b ldr r3, [r7, #4] - 8026e74: 6818 ldr r0, [r3, #0] + 8026ef6: 687b ldr r3, [r7, #4] + 8026ef8: 6818 ldr r0, [r3, #0] (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) + 1UL) & 0x1FUL)), - 8026e76: 683b ldr r3, [r7, #0] - 8026e78: 681b ldr r3, [r3, #0] - 8026e7a: f3c3 0313 ubfx r3, r3, #0, #20 - 8026e7e: 2b00 cmp r3, #0 - 8026e80: d110 bne.n 8026ea4 - 8026e82: 683b ldr r3, [r7, #0] - 8026e84: 681b ldr r3, [r3, #0] - 8026e86: 0e9b lsrs r3, r3, #26 - 8026e88: 3301 adds r3, #1 - 8026e8a: f003 031f and.w r3, r3, #31 - 8026e8e: 2b09 cmp r3, #9 - 8026e90: bf94 ite ls - 8026e92: 2301 movls r3, #1 - 8026e94: 2300 movhi r3, #0 - 8026e96: b2db uxtb r3, r3 - 8026e98: e01e b.n 8026ed8 - 8026e9a: bf00 nop - 8026e9c: 47ff0000 .word 0x47ff0000 - 8026ea0: 5c001000 .word 0x5c001000 - 8026ea4: 683b ldr r3, [r7, #0] - 8026ea6: 681b ldr r3, [r3, #0] - 8026ea8: 65bb str r3, [r7, #88] ; 0x58 + 8026efa: 683b ldr r3, [r7, #0] + 8026efc: 681b ldr r3, [r3, #0] + 8026efe: f3c3 0313 ubfx r3, r3, #0, #20 + 8026f02: 2b00 cmp r3, #0 + 8026f04: d110 bne.n 8026f28 + 8026f06: 683b ldr r3, [r7, #0] + 8026f08: 681b ldr r3, [r3, #0] + 8026f0a: 0e9b lsrs r3, r3, #26 + 8026f0c: 3301 adds r3, #1 + 8026f0e: f003 031f and.w r3, r3, #31 + 8026f12: 2b09 cmp r3, #9 + 8026f14: bf94 ite ls + 8026f16: 2301 movls r3, #1 + 8026f18: 2300 movhi r3, #0 + 8026f1a: b2db uxtb r3, r3 + 8026f1c: e01e b.n 8026f5c + 8026f1e: bf00 nop + 8026f20: 47ff0000 .word 0x47ff0000 + 8026f24: 5c001000 .word 0x5c001000 + 8026f28: 683b ldr r3, [r7, #0] + 8026f2a: 681b ldr r3, [r3, #0] + 8026f2c: 65bb str r3, [r7, #88] ; 0x58 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026eaa: 6dbb ldr r3, [r7, #88] ; 0x58 - 8026eac: fa93 f3a3 rbit r3, r3 - 8026eb0: 657b str r3, [r7, #84] ; 0x54 + 8026f2e: 6dbb ldr r3, [r7, #88] ; 0x58 + 8026f30: fa93 f3a3 rbit r3, r3 + 8026f34: 657b str r3, [r7, #84] ; 0x54 return result; - 8026eb2: 6d7b ldr r3, [r7, #84] ; 0x54 - 8026eb4: 65fb str r3, [r7, #92] ; 0x5c + 8026f36: 6d7b ldr r3, [r7, #84] ; 0x54 + 8026f38: 65fb str r3, [r7, #92] ; 0x5c if (value == 0U) - 8026eb6: 6dfb ldr r3, [r7, #92] ; 0x5c - 8026eb8: 2b00 cmp r3, #0 - 8026eba: d101 bne.n 8026ec0 + 8026f3a: 6dfb ldr r3, [r7, #92] ; 0x5c + 8026f3c: 2b00 cmp r3, #0 + 8026f3e: d101 bne.n 8026f44 return 32U; - 8026ebc: 2320 movs r3, #32 - 8026ebe: e003 b.n 8026ec8 + 8026f40: 2320 movs r3, #32 + 8026f42: e003 b.n 8026f4c return __builtin_clz(value); - 8026ec0: 6dfb ldr r3, [r7, #92] ; 0x5c - 8026ec2: fab3 f383 clz r3, r3 - 8026ec6: b2db uxtb r3, r3 - 8026ec8: 3301 adds r3, #1 - 8026eca: f003 031f and.w r3, r3, #31 - 8026ece: 2b09 cmp r3, #9 - 8026ed0: bf94 ite ls - 8026ed2: 2301 movls r3, #1 - 8026ed4: 2300 movhi r3, #0 - 8026ed6: b2db uxtb r3, r3 + 8026f44: 6dfb ldr r3, [r7, #92] ; 0x5c + 8026f46: fab3 f383 clz r3, r3 + 8026f4a: b2db uxtb r3, r3 + 8026f4c: 3301 adds r3, #1 + 8026f4e: f003 031f and.w r3, r3, #31 + 8026f52: 2b09 cmp r3, #9 + 8026f54: bf94 ite ls + 8026f56: 2301 movls r3, #1 + 8026f58: 2300 movhi r3, #0 + 8026f5a: b2db uxtb r3, r3 LL_ADC_SetChannelSamplingTime(hadc->Instance, - 8026ed8: 2b00 cmp r3, #0 - 8026eda: d079 beq.n 8026fd0 + 8026f5c: 2b00 cmp r3, #0 + 8026f5e: d079 beq.n 8027054 (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) + 1UL) & 0x1FUL)), - 8026edc: 683b ldr r3, [r7, #0] - 8026ede: 681b ldr r3, [r3, #0] - 8026ee0: f3c3 0313 ubfx r3, r3, #0, #20 - 8026ee4: 2b00 cmp r3, #0 - 8026ee6: d107 bne.n 8026ef8 - 8026ee8: 683b ldr r3, [r7, #0] - 8026eea: 681b ldr r3, [r3, #0] - 8026eec: 0e9b lsrs r3, r3, #26 - 8026eee: 3301 adds r3, #1 - 8026ef0: 069b lsls r3, r3, #26 - 8026ef2: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026ef6: e015 b.n 8026f24 - 8026ef8: 683b ldr r3, [r7, #0] - 8026efa: 681b ldr r3, [r3, #0] - 8026efc: 64fb str r3, [r7, #76] ; 0x4c + 8026f60: 683b ldr r3, [r7, #0] + 8026f62: 681b ldr r3, [r3, #0] + 8026f64: f3c3 0313 ubfx r3, r3, #0, #20 + 8026f68: 2b00 cmp r3, #0 + 8026f6a: d107 bne.n 8026f7c + 8026f6c: 683b ldr r3, [r7, #0] + 8026f6e: 681b ldr r3, [r3, #0] + 8026f70: 0e9b lsrs r3, r3, #26 + 8026f72: 3301 adds r3, #1 + 8026f74: 069b lsls r3, r3, #26 + 8026f76: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026f7a: e015 b.n 8026fa8 + 8026f7c: 683b ldr r3, [r7, #0] + 8026f7e: 681b ldr r3, [r3, #0] + 8026f80: 64fb str r3, [r7, #76] ; 0x4c __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026efe: 6cfb ldr r3, [r7, #76] ; 0x4c - 8026f00: fa93 f3a3 rbit r3, r3 - 8026f04: 64bb str r3, [r7, #72] ; 0x48 + 8026f82: 6cfb ldr r3, [r7, #76] ; 0x4c + 8026f84: fa93 f3a3 rbit r3, r3 + 8026f88: 64bb str r3, [r7, #72] ; 0x48 return result; - 8026f06: 6cbb ldr r3, [r7, #72] ; 0x48 - 8026f08: 653b str r3, [r7, #80] ; 0x50 + 8026f8a: 6cbb ldr r3, [r7, #72] ; 0x48 + 8026f8c: 653b str r3, [r7, #80] ; 0x50 if (value == 0U) - 8026f0a: 6d3b ldr r3, [r7, #80] ; 0x50 - 8026f0c: 2b00 cmp r3, #0 - 8026f0e: d101 bne.n 8026f14 + 8026f8e: 6d3b ldr r3, [r7, #80] ; 0x50 + 8026f90: 2b00 cmp r3, #0 + 8026f92: d101 bne.n 8026f98 return 32U; - 8026f10: 2320 movs r3, #32 - 8026f12: e003 b.n 8026f1c + 8026f94: 2320 movs r3, #32 + 8026f96: e003 b.n 8026fa0 return __builtin_clz(value); - 8026f14: 6d3b ldr r3, [r7, #80] ; 0x50 - 8026f16: fab3 f383 clz r3, r3 - 8026f1a: b2db uxtb r3, r3 - 8026f1c: 3301 adds r3, #1 - 8026f1e: 069b lsls r3, r3, #26 - 8026f20: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026f24: 683b ldr r3, [r7, #0] - 8026f26: 681b ldr r3, [r3, #0] - 8026f28: f3c3 0313 ubfx r3, r3, #0, #20 - 8026f2c: 2b00 cmp r3, #0 - 8026f2e: d109 bne.n 8026f44 - 8026f30: 683b ldr r3, [r7, #0] - 8026f32: 681b ldr r3, [r3, #0] - 8026f34: 0e9b lsrs r3, r3, #26 - 8026f36: 3301 adds r3, #1 - 8026f38: f003 031f and.w r3, r3, #31 - 8026f3c: 2101 movs r1, #1 - 8026f3e: fa01 f303 lsl.w r3, r1, r3 - 8026f42: e017 b.n 8026f74 - 8026f44: 683b ldr r3, [r7, #0] - 8026f46: 681b ldr r3, [r3, #0] - 8026f48: 643b str r3, [r7, #64] ; 0x40 + 8026f98: 6d3b ldr r3, [r7, #80] ; 0x50 + 8026f9a: fab3 f383 clz r3, r3 + 8026f9e: b2db uxtb r3, r3 + 8026fa0: 3301 adds r3, #1 + 8026fa2: 069b lsls r3, r3, #26 + 8026fa4: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 8026fa8: 683b ldr r3, [r7, #0] + 8026faa: 681b ldr r3, [r3, #0] + 8026fac: f3c3 0313 ubfx r3, r3, #0, #20 + 8026fb0: 2b00 cmp r3, #0 + 8026fb2: d109 bne.n 8026fc8 + 8026fb4: 683b ldr r3, [r7, #0] + 8026fb6: 681b ldr r3, [r3, #0] + 8026fb8: 0e9b lsrs r3, r3, #26 + 8026fba: 3301 adds r3, #1 + 8026fbc: f003 031f and.w r3, r3, #31 + 8026fc0: 2101 movs r1, #1 + 8026fc2: fa01 f303 lsl.w r3, r1, r3 + 8026fc6: e017 b.n 8026ff8 + 8026fc8: 683b ldr r3, [r7, #0] + 8026fca: 681b ldr r3, [r3, #0] + 8026fcc: 643b str r3, [r7, #64] ; 0x40 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026f4a: 6c3b ldr r3, [r7, #64] ; 0x40 - 8026f4c: fa93 f3a3 rbit r3, r3 - 8026f50: 63fb str r3, [r7, #60] ; 0x3c + 8026fce: 6c3b ldr r3, [r7, #64] ; 0x40 + 8026fd0: fa93 f3a3 rbit r3, r3 + 8026fd4: 63fb str r3, [r7, #60] ; 0x3c return result; - 8026f52: 6bfb ldr r3, [r7, #60] ; 0x3c - 8026f54: 647b str r3, [r7, #68] ; 0x44 + 8026fd6: 6bfb ldr r3, [r7, #60] ; 0x3c + 8026fd8: 647b str r3, [r7, #68] ; 0x44 if (value == 0U) - 8026f56: 6c7b ldr r3, [r7, #68] ; 0x44 - 8026f58: 2b00 cmp r3, #0 - 8026f5a: d101 bne.n 8026f60 + 8026fda: 6c7b ldr r3, [r7, #68] ; 0x44 + 8026fdc: 2b00 cmp r3, #0 + 8026fde: d101 bne.n 8026fe4 return 32U; - 8026f5c: 2320 movs r3, #32 - 8026f5e: e003 b.n 8026f68 + 8026fe0: 2320 movs r3, #32 + 8026fe2: e003 b.n 8026fec return __builtin_clz(value); - 8026f60: 6c7b ldr r3, [r7, #68] ; 0x44 - 8026f62: fab3 f383 clz r3, r3 - 8026f66: b2db uxtb r3, r3 - 8026f68: 3301 adds r3, #1 - 8026f6a: f003 031f and.w r3, r3, #31 - 8026f6e: 2101 movs r1, #1 - 8026f70: fa01 f303 lsl.w r3, r1, r3 - 8026f74: ea42 0103 orr.w r1, r2, r3 - 8026f78: 683b ldr r3, [r7, #0] - 8026f7a: 681b ldr r3, [r3, #0] - 8026f7c: f3c3 0313 ubfx r3, r3, #0, #20 - 8026f80: 2b00 cmp r3, #0 - 8026f82: d10a bne.n 8026f9a - 8026f84: 683b ldr r3, [r7, #0] - 8026f86: 681b ldr r3, [r3, #0] - 8026f88: 0e9b lsrs r3, r3, #26 - 8026f8a: 3301 adds r3, #1 - 8026f8c: f003 021f and.w r2, r3, #31 - 8026f90: 4613 mov r3, r2 - 8026f92: 005b lsls r3, r3, #1 - 8026f94: 4413 add r3, r2 - 8026f96: 051b lsls r3, r3, #20 - 8026f98: e018 b.n 8026fcc - 8026f9a: 683b ldr r3, [r7, #0] - 8026f9c: 681b ldr r3, [r3, #0] - 8026f9e: 637b str r3, [r7, #52] ; 0x34 + 8026fe4: 6c7b ldr r3, [r7, #68] ; 0x44 + 8026fe6: fab3 f383 clz r3, r3 + 8026fea: b2db uxtb r3, r3 + 8026fec: 3301 adds r3, #1 + 8026fee: f003 031f and.w r3, r3, #31 + 8026ff2: 2101 movs r1, #1 + 8026ff4: fa01 f303 lsl.w r3, r1, r3 + 8026ff8: ea42 0103 orr.w r1, r2, r3 + 8026ffc: 683b ldr r3, [r7, #0] + 8026ffe: 681b ldr r3, [r3, #0] + 8027000: f3c3 0313 ubfx r3, r3, #0, #20 + 8027004: 2b00 cmp r3, #0 + 8027006: d10a bne.n 802701e + 8027008: 683b ldr r3, [r7, #0] + 802700a: 681b ldr r3, [r3, #0] + 802700c: 0e9b lsrs r3, r3, #26 + 802700e: 3301 adds r3, #1 + 8027010: f003 021f and.w r2, r3, #31 + 8027014: 4613 mov r3, r2 + 8027016: 005b lsls r3, r3, #1 + 8027018: 4413 add r3, r2 + 802701a: 051b lsls r3, r3, #20 + 802701c: e018 b.n 8027050 + 802701e: 683b ldr r3, [r7, #0] + 8027020: 681b ldr r3, [r3, #0] + 8027022: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026fa0: 6b7b ldr r3, [r7, #52] ; 0x34 - 8026fa2: fa93 f3a3 rbit r3, r3 - 8026fa6: 633b str r3, [r7, #48] ; 0x30 + 8027024: 6b7b ldr r3, [r7, #52] ; 0x34 + 8027026: fa93 f3a3 rbit r3, r3 + 802702a: 633b str r3, [r7, #48] ; 0x30 return result; - 8026fa8: 6b3b ldr r3, [r7, #48] ; 0x30 - 8026faa: 63bb str r3, [r7, #56] ; 0x38 + 802702c: 6b3b ldr r3, [r7, #48] ; 0x30 + 802702e: 63bb str r3, [r7, #56] ; 0x38 if (value == 0U) - 8026fac: 6bbb ldr r3, [r7, #56] ; 0x38 - 8026fae: 2b00 cmp r3, #0 - 8026fb0: d101 bne.n 8026fb6 + 8027030: 6bbb ldr r3, [r7, #56] ; 0x38 + 8027032: 2b00 cmp r3, #0 + 8027034: d101 bne.n 802703a return 32U; - 8026fb2: 2320 movs r3, #32 - 8026fb4: e003 b.n 8026fbe + 8027036: 2320 movs r3, #32 + 8027038: e003 b.n 8027042 return __builtin_clz(value); - 8026fb6: 6bbb ldr r3, [r7, #56] ; 0x38 - 8026fb8: fab3 f383 clz r3, r3 - 8026fbc: b2db uxtb r3, r3 - 8026fbe: 3301 adds r3, #1 - 8026fc0: f003 021f and.w r2, r3, #31 - 8026fc4: 4613 mov r3, r2 - 8026fc6: 005b lsls r3, r3, #1 - 8026fc8: 4413 add r3, r2 - 8026fca: 051b lsls r3, r3, #20 + 802703a: 6bbb ldr r3, [r7, #56] ; 0x38 + 802703c: fab3 f383 clz r3, r3 + 8027040: b2db uxtb r3, r3 + 8027042: 3301 adds r3, #1 + 8027044: f003 021f and.w r2, r3, #31 + 8027048: 4613 mov r3, r2 + 802704a: 005b lsls r3, r3, #1 + 802704c: 4413 add r3, r2 + 802704e: 051b lsls r3, r3, #20 LL_ADC_SetChannelSamplingTime(hadc->Instance, - 8026fcc: 430b orrs r3, r1 - 8026fce: e07e b.n 80270ce + 8027050: 430b orrs r3, r1 + 8027052: e07e b.n 8027152 (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfig->Channel) + 1UL) & 0x1FUL)), - 8026fd0: 683b ldr r3, [r7, #0] - 8026fd2: 681b ldr r3, [r3, #0] - 8026fd4: f3c3 0313 ubfx r3, r3, #0, #20 - 8026fd8: 2b00 cmp r3, #0 - 8026fda: d107 bne.n 8026fec - 8026fdc: 683b ldr r3, [r7, #0] - 8026fde: 681b ldr r3, [r3, #0] - 8026fe0: 0e9b lsrs r3, r3, #26 - 8026fe2: 3301 adds r3, #1 - 8026fe4: 069b lsls r3, r3, #26 - 8026fe6: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8026fea: e015 b.n 8027018 - 8026fec: 683b ldr r3, [r7, #0] - 8026fee: 681b ldr r3, [r3, #0] - 8026ff0: 62bb str r3, [r7, #40] ; 0x28 + 8027054: 683b ldr r3, [r7, #0] + 8027056: 681b ldr r3, [r3, #0] + 8027058: f3c3 0313 ubfx r3, r3, #0, #20 + 802705c: 2b00 cmp r3, #0 + 802705e: d107 bne.n 8027070 + 8027060: 683b ldr r3, [r7, #0] + 8027062: 681b ldr r3, [r3, #0] + 8027064: 0e9b lsrs r3, r3, #26 + 8027066: 3301 adds r3, #1 + 8027068: 069b lsls r3, r3, #26 + 802706a: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 802706e: e015 b.n 802709c + 8027070: 683b ldr r3, [r7, #0] + 8027072: 681b ldr r3, [r3, #0] + 8027074: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 8026ff2: 6abb ldr r3, [r7, #40] ; 0x28 - 8026ff4: fa93 f3a3 rbit r3, r3 - 8026ff8: 627b str r3, [r7, #36] ; 0x24 + 8027076: 6abb ldr r3, [r7, #40] ; 0x28 + 8027078: fa93 f3a3 rbit r3, r3 + 802707c: 627b str r3, [r7, #36] ; 0x24 return result; - 8026ffa: 6a7b ldr r3, [r7, #36] ; 0x24 - 8026ffc: 62fb str r3, [r7, #44] ; 0x2c + 802707e: 6a7b ldr r3, [r7, #36] ; 0x24 + 8027080: 62fb str r3, [r7, #44] ; 0x2c if (value == 0U) - 8026ffe: 6afb ldr r3, [r7, #44] ; 0x2c - 8027000: 2b00 cmp r3, #0 - 8027002: d101 bne.n 8027008 + 8027082: 6afb ldr r3, [r7, #44] ; 0x2c + 8027084: 2b00 cmp r3, #0 + 8027086: d101 bne.n 802708c return 32U; - 8027004: 2320 movs r3, #32 - 8027006: e003 b.n 8027010 + 8027088: 2320 movs r3, #32 + 802708a: e003 b.n 8027094 return __builtin_clz(value); - 8027008: 6afb ldr r3, [r7, #44] ; 0x2c - 802700a: fab3 f383 clz r3, r3 - 802700e: b2db uxtb r3, r3 - 8027010: 3301 adds r3, #1 - 8027012: 069b lsls r3, r3, #26 - 8027014: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 - 8027018: 683b ldr r3, [r7, #0] - 802701a: 681b ldr r3, [r3, #0] - 802701c: f3c3 0313 ubfx r3, r3, #0, #20 - 8027020: 2b00 cmp r3, #0 - 8027022: d109 bne.n 8027038 - 8027024: 683b ldr r3, [r7, #0] - 8027026: 681b ldr r3, [r3, #0] - 8027028: 0e9b lsrs r3, r3, #26 - 802702a: 3301 adds r3, #1 - 802702c: f003 031f and.w r3, r3, #31 - 8027030: 2101 movs r1, #1 - 8027032: fa01 f303 lsl.w r3, r1, r3 - 8027036: e017 b.n 8027068 - 8027038: 683b ldr r3, [r7, #0] - 802703a: 681b ldr r3, [r3, #0] - 802703c: 61fb str r3, [r7, #28] + 802708c: 6afb ldr r3, [r7, #44] ; 0x2c + 802708e: fab3 f383 clz r3, r3 + 8027092: b2db uxtb r3, r3 + 8027094: 3301 adds r3, #1 + 8027096: 069b lsls r3, r3, #26 + 8027098: f003 42f8 and.w r2, r3, #2080374784 ; 0x7c000000 + 802709c: 683b ldr r3, [r7, #0] + 802709e: 681b ldr r3, [r3, #0] + 80270a0: f3c3 0313 ubfx r3, r3, #0, #20 + 80270a4: 2b00 cmp r3, #0 + 80270a6: d109 bne.n 80270bc + 80270a8: 683b ldr r3, [r7, #0] + 80270aa: 681b ldr r3, [r3, #0] + 80270ac: 0e9b lsrs r3, r3, #26 + 80270ae: 3301 adds r3, #1 + 80270b0: f003 031f and.w r3, r3, #31 + 80270b4: 2101 movs r1, #1 + 80270b6: fa01 f303 lsl.w r3, r1, r3 + 80270ba: e017 b.n 80270ec + 80270bc: 683b ldr r3, [r7, #0] + 80270be: 681b ldr r3, [r3, #0] + 80270c0: 61fb str r3, [r7, #28] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 802703e: 69fb ldr r3, [r7, #28] - 8027040: fa93 f3a3 rbit r3, r3 - 8027044: 61bb str r3, [r7, #24] + 80270c2: 69fb ldr r3, [r7, #28] + 80270c4: fa93 f3a3 rbit r3, r3 + 80270c8: 61bb str r3, [r7, #24] return result; - 8027046: 69bb ldr r3, [r7, #24] - 8027048: 623b str r3, [r7, #32] + 80270ca: 69bb ldr r3, [r7, #24] + 80270cc: 623b str r3, [r7, #32] if (value == 0U) - 802704a: 6a3b ldr r3, [r7, #32] - 802704c: 2b00 cmp r3, #0 - 802704e: d101 bne.n 8027054 + 80270ce: 6a3b ldr r3, [r7, #32] + 80270d0: 2b00 cmp r3, #0 + 80270d2: d101 bne.n 80270d8 return 32U; - 8027050: 2320 movs r3, #32 - 8027052: e003 b.n 802705c + 80270d4: 2320 movs r3, #32 + 80270d6: e003 b.n 80270e0 return __builtin_clz(value); - 8027054: 6a3b ldr r3, [r7, #32] - 8027056: fab3 f383 clz r3, r3 - 802705a: b2db uxtb r3, r3 - 802705c: 3301 adds r3, #1 - 802705e: f003 031f and.w r3, r3, #31 - 8027062: 2101 movs r1, #1 - 8027064: fa01 f303 lsl.w r3, r1, r3 - 8027068: ea42 0103 orr.w r1, r2, r3 - 802706c: 683b ldr r3, [r7, #0] - 802706e: 681b ldr r3, [r3, #0] - 8027070: f3c3 0313 ubfx r3, r3, #0, #20 - 8027074: 2b00 cmp r3, #0 - 8027076: d10d bne.n 8027094 - 8027078: 683b ldr r3, [r7, #0] - 802707a: 681b ldr r3, [r3, #0] - 802707c: 0e9b lsrs r3, r3, #26 - 802707e: 3301 adds r3, #1 - 8027080: f003 021f and.w r2, r3, #31 - 8027084: 4613 mov r3, r2 - 8027086: 005b lsls r3, r3, #1 - 8027088: 4413 add r3, r2 - 802708a: 3b1e subs r3, #30 - 802708c: 051b lsls r3, r3, #20 - 802708e: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 - 8027092: e01b b.n 80270cc - 8027094: 683b ldr r3, [r7, #0] - 8027096: 681b ldr r3, [r3, #0] - 8027098: 613b str r3, [r7, #16] + 80270d8: 6a3b ldr r3, [r7, #32] + 80270da: fab3 f383 clz r3, r3 + 80270de: b2db uxtb r3, r3 + 80270e0: 3301 adds r3, #1 + 80270e2: f003 031f and.w r3, r3, #31 + 80270e6: 2101 movs r1, #1 + 80270e8: fa01 f303 lsl.w r3, r1, r3 + 80270ec: ea42 0103 orr.w r1, r2, r3 + 80270f0: 683b ldr r3, [r7, #0] + 80270f2: 681b ldr r3, [r3, #0] + 80270f4: f3c3 0313 ubfx r3, r3, #0, #20 + 80270f8: 2b00 cmp r3, #0 + 80270fa: d10d bne.n 8027118 + 80270fc: 683b ldr r3, [r7, #0] + 80270fe: 681b ldr r3, [r3, #0] + 8027100: 0e9b lsrs r3, r3, #26 + 8027102: 3301 adds r3, #1 + 8027104: f003 021f and.w r2, r3, #31 + 8027108: 4613 mov r3, r2 + 802710a: 005b lsls r3, r3, #1 + 802710c: 4413 add r3, r2 + 802710e: 3b1e subs r3, #30 + 8027110: 051b lsls r3, r3, #20 + 8027112: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 + 8027116: e01b b.n 8027150 + 8027118: 683b ldr r3, [r7, #0] + 802711a: 681b ldr r3, [r3, #0] + 802711c: 613b str r3, [r7, #16] __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - 802709a: 693b ldr r3, [r7, #16] - 802709c: fa93 f3a3 rbit r3, r3 - 80270a0: 60fb str r3, [r7, #12] + 802711e: 693b ldr r3, [r7, #16] + 8027120: fa93 f3a3 rbit r3, r3 + 8027124: 60fb str r3, [r7, #12] return result; - 80270a2: 68fb ldr r3, [r7, #12] - 80270a4: 617b str r3, [r7, #20] + 8027126: 68fb ldr r3, [r7, #12] + 8027128: 617b str r3, [r7, #20] if (value == 0U) - 80270a6: 697b ldr r3, [r7, #20] - 80270a8: 2b00 cmp r3, #0 - 80270aa: d101 bne.n 80270b0 + 802712a: 697b ldr r3, [r7, #20] + 802712c: 2b00 cmp r3, #0 + 802712e: d101 bne.n 8027134 return 32U; - 80270ac: 2320 movs r3, #32 - 80270ae: e003 b.n 80270b8 + 8027130: 2320 movs r3, #32 + 8027132: e003 b.n 802713c return __builtin_clz(value); - 80270b0: 697b ldr r3, [r7, #20] - 80270b2: fab3 f383 clz r3, r3 - 80270b6: b2db uxtb r3, r3 - 80270b8: 3301 adds r3, #1 - 80270ba: f003 021f and.w r2, r3, #31 - 80270be: 4613 mov r3, r2 - 80270c0: 005b lsls r3, r3, #1 - 80270c2: 4413 add r3, r2 - 80270c4: 3b1e subs r3, #30 - 80270c6: 051b lsls r3, r3, #20 - 80270c8: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 + 8027134: 697b ldr r3, [r7, #20] + 8027136: fab3 f383 clz r3, r3 + 802713a: b2db uxtb r3, r3 + 802713c: 3301 adds r3, #1 + 802713e: f003 021f and.w r2, r3, #31 + 8027142: 4613 mov r3, r2 + 8027144: 005b lsls r3, r3, #1 + 8027146: 4413 add r3, r2 + 8027148: 3b1e subs r3, #30 + 802714a: 051b lsls r3, r3, #20 + 802714c: f043 7300 orr.w r3, r3, #33554432 ; 0x2000000 LL_ADC_SetChannelSamplingTime(hadc->Instance, - 80270cc: 430b orrs r3, r1 - 80270ce: 683a ldr r2, [r7, #0] - 80270d0: 6892 ldr r2, [r2, #8] - 80270d2: 4619 mov r1, r3 - 80270d4: f7ff f88d bl 80261f2 + 8027150: 430b orrs r3, r1 + 8027152: 683a ldr r2, [r7, #0] + 8027154: 6892 ldr r2, [r2, #8] + 8027156: 4619 mov r1, r3 + 8027158: f7ff f88d bl 8026276 /* If internal channel selected, enable dedicated internal buffers and */ /* paths. */ /* Note: these internal measurement paths can be disabled using */ /* HAL_ADC_DeInit(). */ if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) - 80270d8: 683b ldr r3, [r7, #0] - 80270da: 681b ldr r3, [r3, #0] - 80270dc: 2b00 cmp r3, #0 - 80270de: f280 80c6 bge.w 802726e + 802715c: 683b ldr r3, [r7, #0] + 802715e: 681b ldr r3, [r3, #0] + 8027160: 2b00 cmp r3, #0 + 8027162: f280 80c6 bge.w 80272f2 { /* Configuration of common ADC parameters */ tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 80270e2: 687b ldr r3, [r7, #4] - 80270e4: 681b ldr r3, [r3, #0] - 80270e6: 4a67 ldr r2, [pc, #412] ; (8027284 ) - 80270e8: 4293 cmp r3, r2 - 80270ea: d004 beq.n 80270f6 - 80270ec: 687b ldr r3, [r7, #4] - 80270ee: 681b ldr r3, [r3, #0] - 80270f0: 4a65 ldr r2, [pc, #404] ; (8027288 ) - 80270f2: 4293 cmp r3, r2 - 80270f4: d101 bne.n 80270fa - 80270f6: 4b65 ldr r3, [pc, #404] ; (802728c ) - 80270f8: e000 b.n 80270fc - 80270fa: 4b65 ldr r3, [pc, #404] ; (8027290 ) - 80270fc: 4618 mov r0, r3 - 80270fe: f7fe ffd7 bl 80260b0 - 8027102: 66f8 str r0, [r7, #108] ; 0x6c + 8027166: 687b ldr r3, [r7, #4] + 8027168: 681b ldr r3, [r3, #0] + 802716a: 4a67 ldr r2, [pc, #412] ; (8027308 ) + 802716c: 4293 cmp r3, r2 + 802716e: d004 beq.n 802717a + 8027170: 687b ldr r3, [r7, #4] + 8027172: 681b ldr r3, [r3, #0] + 8027174: 4a65 ldr r2, [pc, #404] ; (802730c ) + 8027176: 4293 cmp r3, r2 + 8027178: d101 bne.n 802717e + 802717a: 4b65 ldr r3, [pc, #404] ; (8027310 ) + 802717c: e000 b.n 8027180 + 802717e: 4b65 ldr r3, [pc, #404] ; (8027314 ) + 8027180: 4618 mov r0, r3 + 8027182: f7fe ffd7 bl 8026134 + 8027186: 66f8 str r0, [r7, #108] ; 0x6c /* Software is allowed to change common parameters only when all ADCs */ /* of the common group are disabled. */ if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL) - 8027104: 687b ldr r3, [r7, #4] - 8027106: 681b ldr r3, [r3, #0] - 8027108: 4a5e ldr r2, [pc, #376] ; (8027284 ) - 802710a: 4293 cmp r3, r2 - 802710c: d004 beq.n 8027118 - 802710e: 687b ldr r3, [r7, #4] - 8027110: 681b ldr r3, [r3, #0] - 8027112: 4a5d ldr r2, [pc, #372] ; (8027288 ) - 8027114: 4293 cmp r3, r2 - 8027116: d10e bne.n 8027136 - 8027118: 485a ldr r0, [pc, #360] ; (8027284 ) - 802711a: f7ff f94b bl 80263b4 - 802711e: 4604 mov r4, r0 - 8027120: 4859 ldr r0, [pc, #356] ; (8027288 ) - 8027122: f7ff f947 bl 80263b4 - 8027126: 4603 mov r3, r0 - 8027128: 4323 orrs r3, r4 - 802712a: 2b00 cmp r3, #0 - 802712c: bf0c ite eq - 802712e: 2301 moveq r3, #1 - 8027130: 2300 movne r3, #0 - 8027132: b2db uxtb r3, r3 - 8027134: e008 b.n 8027148 - 8027136: 4857 ldr r0, [pc, #348] ; (8027294 ) - 8027138: f7ff f93c bl 80263b4 - 802713c: 4603 mov r3, r0 - 802713e: 2b00 cmp r3, #0 - 8027140: bf0c ite eq - 8027142: 2301 moveq r3, #1 - 8027144: 2300 movne r3, #0 - 8027146: b2db uxtb r3, r3 - 8027148: 2b00 cmp r3, #0 - 802714a: d07d beq.n 8027248 + 8027188: 687b ldr r3, [r7, #4] + 802718a: 681b ldr r3, [r3, #0] + 802718c: 4a5e ldr r2, [pc, #376] ; (8027308 ) + 802718e: 4293 cmp r3, r2 + 8027190: d004 beq.n 802719c + 8027192: 687b ldr r3, [r7, #4] + 8027194: 681b ldr r3, [r3, #0] + 8027196: 4a5d ldr r2, [pc, #372] ; (802730c ) + 8027198: 4293 cmp r3, r2 + 802719a: d10e bne.n 80271ba + 802719c: 485a ldr r0, [pc, #360] ; (8027308 ) + 802719e: f7ff f94b bl 8026438 + 80271a2: 4604 mov r4, r0 + 80271a4: 4859 ldr r0, [pc, #356] ; (802730c ) + 80271a6: f7ff f947 bl 8026438 + 80271aa: 4603 mov r3, r0 + 80271ac: 4323 orrs r3, r4 + 80271ae: 2b00 cmp r3, #0 + 80271b0: bf0c ite eq + 80271b2: 2301 moveq r3, #1 + 80271b4: 2300 movne r3, #0 + 80271b6: b2db uxtb r3, r3 + 80271b8: e008 b.n 80271cc + 80271ba: 4857 ldr r0, [pc, #348] ; (8027318 ) + 80271bc: f7ff f93c bl 8026438 + 80271c0: 4603 mov r3, r0 + 80271c2: 2b00 cmp r3, #0 + 80271c4: bf0c ite eq + 80271c6: 2301 moveq r3, #1 + 80271c8: 2300 movne r3, #0 + 80271ca: b2db uxtb r3, r3 + 80271cc: 2b00 cmp r3, #0 + 80271ce: d07d beq.n 80272cc { /* If the requested internal measurement path has already been enabled, */ /* bypass the configuration processing. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL)) - 802714c: 683b ldr r3, [r7, #0] - 802714e: 681b ldr r3, [r3, #0] - 8027150: 4a51 ldr r2, [pc, #324] ; (8027298 ) - 8027152: 4293 cmp r3, r2 - 8027154: d130 bne.n 80271b8 - 8027156: 6efb ldr r3, [r7, #108] ; 0x6c - 8027158: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 802715c: 2b00 cmp r3, #0 - 802715e: d12b bne.n 80271b8 + 80271d0: 683b ldr r3, [r7, #0] + 80271d2: 681b ldr r3, [r3, #0] + 80271d4: 4a51 ldr r2, [pc, #324] ; (802731c ) + 80271d6: 4293 cmp r3, r2 + 80271d8: d130 bne.n 802723c + 80271da: 6efb ldr r3, [r7, #108] ; 0x6c + 80271dc: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 80271e0: 2b00 cmp r3, #0 + 80271e2: d12b bne.n 802723c { if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) - 8027160: 687b ldr r3, [r7, #4] - 8027162: 681b ldr r3, [r3, #0] - 8027164: 4a4b ldr r2, [pc, #300] ; (8027294 ) - 8027166: 4293 cmp r3, r2 - 8027168: f040 8081 bne.w 802726e + 80271e4: 687b ldr r3, [r7, #4] + 80271e6: 681b ldr r3, [r3, #0] + 80271e8: 4a4b ldr r2, [pc, #300] ; (8027318 ) + 80271ea: 4293 cmp r3, r2 + 80271ec: f040 8081 bne.w 80272f2 { LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channel); - 802716c: 687b ldr r3, [r7, #4] - 802716e: 681b ldr r3, [r3, #0] - 8027170: 4a44 ldr r2, [pc, #272] ; (8027284 ) - 8027172: 4293 cmp r3, r2 - 8027174: d004 beq.n 8027180 - 8027176: 687b ldr r3, [r7, #4] - 8027178: 681b ldr r3, [r3, #0] - 802717a: 4a43 ldr r2, [pc, #268] ; (8027288 ) - 802717c: 4293 cmp r3, r2 - 802717e: d101 bne.n 8027184 - 8027180: 4a42 ldr r2, [pc, #264] ; (802728c ) - 8027182: e000 b.n 8027186 - 8027184: 4a42 ldr r2, [pc, #264] ; (8027290 ) - 8027186: 6efb ldr r3, [r7, #108] ; 0x6c - 8027188: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 - 802718c: 4619 mov r1, r3 - 802718e: 4610 mov r0, r2 - 8027190: f7fe ff7b bl 802608a + 80271f0: 687b ldr r3, [r7, #4] + 80271f2: 681b ldr r3, [r3, #0] + 80271f4: 4a44 ldr r2, [pc, #272] ; (8027308 ) + 80271f6: 4293 cmp r3, r2 + 80271f8: d004 beq.n 8027204 + 80271fa: 687b ldr r3, [r7, #4] + 80271fc: 681b ldr r3, [r3, #0] + 80271fe: 4a43 ldr r2, [pc, #268] ; (802730c ) + 8027200: 4293 cmp r3, r2 + 8027202: d101 bne.n 8027208 + 8027204: 4a42 ldr r2, [pc, #264] ; (8027310 ) + 8027206: e000 b.n 802720a + 8027208: 4a42 ldr r2, [pc, #264] ; (8027314 ) + 802720a: 6efb ldr r3, [r7, #108] ; 0x6c + 802720c: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 + 8027210: 4619 mov r1, r3 + 8027212: 4610 mov r0, r2 + 8027214: f7fe ff7b bl 802610e /* Delay for temperature sensor stabilization time */ /* Wait loop initialization and execution */ /* Note: Variable divided by 2 to compensate partially */ /* CPU processing cycles, scaling in us split to not */ /* exceed 32 bits register capacity and handle low frequency. */ wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL)); - 8027194: 4b41 ldr r3, [pc, #260] ; (802729c ) - 8027196: 681b ldr r3, [r3, #0] - 8027198: 099b lsrs r3, r3, #6 - 802719a: 4a41 ldr r2, [pc, #260] ; (80272a0 ) - 802719c: fba2 2303 umull r2, r3, r2, r3 - 80271a0: 099b lsrs r3, r3, #6 - 80271a2: 3301 adds r3, #1 - 80271a4: 005b lsls r3, r3, #1 - 80271a6: 60bb str r3, [r7, #8] + 8027218: 4b41 ldr r3, [pc, #260] ; (8027320 ) + 802721a: 681b ldr r3, [r3, #0] + 802721c: 099b lsrs r3, r3, #6 + 802721e: 4a41 ldr r2, [pc, #260] ; (8027324 ) + 8027220: fba2 2303 umull r2, r3, r2, r3 + 8027224: 099b lsrs r3, r3, #6 + 8027226: 3301 adds r3, #1 + 8027228: 005b lsls r3, r3, #1 + 802722a: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 80271a8: e002 b.n 80271b0 + 802722c: e002 b.n 8027234 { wait_loop_index--; - 80271aa: 68bb ldr r3, [r7, #8] - 80271ac: 3b01 subs r3, #1 - 80271ae: 60bb str r3, [r7, #8] + 802722e: 68bb ldr r3, [r7, #8] + 8027230: 3b01 subs r3, #1 + 8027232: 60bb str r3, [r7, #8] while (wait_loop_index != 0UL) - 80271b0: 68bb ldr r3, [r7, #8] - 80271b2: 2b00 cmp r3, #0 - 80271b4: d1f9 bne.n 80271aa + 8027234: 68bb ldr r3, [r7, #8] + 8027236: 2b00 cmp r3, #0 + 8027238: d1f9 bne.n 802722e if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) - 80271b6: e05a b.n 802726e + 802723a: e05a b.n 80272f2 } } } else if ((sConfig->Channel == ADC_CHANNEL_VBAT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL)) - 80271b8: 683b ldr r3, [r7, #0] - 80271ba: 681b ldr r3, [r3, #0] - 80271bc: 4a39 ldr r2, [pc, #228] ; (80272a4 ) - 80271be: 4293 cmp r3, r2 - 80271c0: d11e bne.n 8027200 - 80271c2: 6efb ldr r3, [r7, #108] ; 0x6c - 80271c4: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 80271c8: 2b00 cmp r3, #0 - 80271ca: d119 bne.n 8027200 + 802723c: 683b ldr r3, [r7, #0] + 802723e: 681b ldr r3, [r3, #0] + 8027240: 4a39 ldr r2, [pc, #228] ; (8027328 ) + 8027242: 4293 cmp r3, r2 + 8027244: d11e bne.n 8027284 + 8027246: 6efb ldr r3, [r7, #108] ; 0x6c + 8027248: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 802724c: 2b00 cmp r3, #0 + 802724e: d119 bne.n 8027284 { if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) - 80271cc: 687b ldr r3, [r7, #4] - 80271ce: 681b ldr r3, [r3, #0] - 80271d0: 4a30 ldr r2, [pc, #192] ; (8027294 ) - 80271d2: 4293 cmp r3, r2 - 80271d4: d14b bne.n 802726e + 8027250: 687b ldr r3, [r7, #4] + 8027252: 681b ldr r3, [r3, #0] + 8027254: 4a30 ldr r2, [pc, #192] ; (8027318 ) + 8027256: 4293 cmp r3, r2 + 8027258: d14b bne.n 80272f2 { LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel); - 80271d6: 687b ldr r3, [r7, #4] - 80271d8: 681b ldr r3, [r3, #0] - 80271da: 4a2a ldr r2, [pc, #168] ; (8027284 ) - 80271dc: 4293 cmp r3, r2 - 80271de: d004 beq.n 80271ea - 80271e0: 687b ldr r3, [r7, #4] - 80271e2: 681b ldr r3, [r3, #0] - 80271e4: 4a28 ldr r2, [pc, #160] ; (8027288 ) - 80271e6: 4293 cmp r3, r2 - 80271e8: d101 bne.n 80271ee - 80271ea: 4a28 ldr r2, [pc, #160] ; (802728c ) - 80271ec: e000 b.n 80271f0 - 80271ee: 4a28 ldr r2, [pc, #160] ; (8027290 ) - 80271f0: 6efb ldr r3, [r7, #108] ; 0x6c - 80271f2: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 80271f6: 4619 mov r1, r3 - 80271f8: 4610 mov r0, r2 - 80271fa: f7fe ff46 bl 802608a + 802725a: 687b ldr r3, [r7, #4] + 802725c: 681b ldr r3, [r3, #0] + 802725e: 4a2a ldr r2, [pc, #168] ; (8027308 ) + 8027260: 4293 cmp r3, r2 + 8027262: d004 beq.n 802726e + 8027264: 687b ldr r3, [r7, #4] + 8027266: 681b ldr r3, [r3, #0] + 8027268: 4a28 ldr r2, [pc, #160] ; (802730c ) + 802726a: 4293 cmp r3, r2 + 802726c: d101 bne.n 8027272 + 802726e: 4a28 ldr r2, [pc, #160] ; (8027310 ) + 8027270: e000 b.n 8027274 + 8027272: 4a28 ldr r2, [pc, #160] ; (8027314 ) + 8027274: 6efb ldr r3, [r7, #108] ; 0x6c + 8027276: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 802727a: 4619 mov r1, r3 + 802727c: 4610 mov r0, r2 + 802727e: f7fe ff46 bl 802610e if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) - 80271fe: e036 b.n 802726e + 8027282: e036 b.n 80272f2 } } else if ((sConfig->Channel == ADC_CHANNEL_VREFINT) && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL)) - 8027200: 683b ldr r3, [r7, #0] - 8027202: 681b ldr r3, [r3, #0] - 8027204: 4a28 ldr r2, [pc, #160] ; (80272a8 ) - 8027206: 4293 cmp r3, r2 - 8027208: d131 bne.n 802726e - 802720a: 6efb ldr r3, [r7, #108] ; 0x6c - 802720c: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 8027210: 2b00 cmp r3, #0 - 8027212: d12c bne.n 802726e + 8027284: 683b ldr r3, [r7, #0] + 8027286: 681b ldr r3, [r3, #0] + 8027288: 4a28 ldr r2, [pc, #160] ; (802732c ) + 802728a: 4293 cmp r3, r2 + 802728c: d131 bne.n 80272f2 + 802728e: 6efb ldr r3, [r7, #108] ; 0x6c + 8027290: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8027294: 2b00 cmp r3, #0 + 8027296: d12c bne.n 80272f2 { if (ADC_VREFINT_INSTANCE(hadc)) - 8027214: 687b ldr r3, [r7, #4] - 8027216: 681b ldr r3, [r3, #0] - 8027218: 4a1e ldr r2, [pc, #120] ; (8027294 ) - 802721a: 4293 cmp r3, r2 - 802721c: d127 bne.n 802726e + 8027298: 687b ldr r3, [r7, #4] + 802729a: 681b ldr r3, [r3, #0] + 802729c: 4a1e ldr r2, [pc, #120] ; (8027318 ) + 802729e: 4293 cmp r3, r2 + 80272a0: d127 bne.n 80272f2 { LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance), LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel); - 802721e: 687b ldr r3, [r7, #4] - 8027220: 681b ldr r3, [r3, #0] - 8027222: 4a18 ldr r2, [pc, #96] ; (8027284 ) - 8027224: 4293 cmp r3, r2 - 8027226: d004 beq.n 8027232 - 8027228: 687b ldr r3, [r7, #4] - 802722a: 681b ldr r3, [r3, #0] - 802722c: 4a16 ldr r2, [pc, #88] ; (8027288 ) - 802722e: 4293 cmp r3, r2 - 8027230: d101 bne.n 8027236 - 8027232: 4a16 ldr r2, [pc, #88] ; (802728c ) - 8027234: e000 b.n 8027238 - 8027236: 4a16 ldr r2, [pc, #88] ; (8027290 ) - 8027238: 6efb ldr r3, [r7, #108] ; 0x6c - 802723a: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 - 802723e: 4619 mov r1, r3 - 8027240: 4610 mov r0, r2 - 8027242: f7fe ff22 bl 802608a - 8027246: e012 b.n 802726e + 80272a2: 687b ldr r3, [r7, #4] + 80272a4: 681b ldr r3, [r3, #0] + 80272a6: 4a18 ldr r2, [pc, #96] ; (8027308 ) + 80272a8: 4293 cmp r3, r2 + 80272aa: d004 beq.n 80272b6 + 80272ac: 687b ldr r3, [r7, #4] + 80272ae: 681b ldr r3, [r3, #0] + 80272b0: 4a16 ldr r2, [pc, #88] ; (802730c ) + 80272b2: 4293 cmp r3, r2 + 80272b4: d101 bne.n 80272ba + 80272b6: 4a16 ldr r2, [pc, #88] ; (8027310 ) + 80272b8: e000 b.n 80272bc + 80272ba: 4a16 ldr r2, [pc, #88] ; (8027314 ) + 80272bc: 6efb ldr r3, [r7, #108] ; 0x6c + 80272be: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 + 80272c2: 4619 mov r1, r3 + 80272c4: 4610 mov r0, r2 + 80272c6: f7fe ff22 bl 802610e + 80272ca: e012 b.n 80272f2 /* enabled and other ADC of the common group are enabled, internal */ /* measurement paths cannot be enabled. */ else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8027248: 687b ldr r3, [r7, #4] - 802724a: 6d5b ldr r3, [r3, #84] ; 0x54 - 802724c: f043 0220 orr.w r2, r3, #32 - 8027250: 687b ldr r3, [r7, #4] - 8027252: 655a str r2, [r3, #84] ; 0x54 + 80272cc: 687b ldr r3, [r7, #4] + 80272ce: 6d5b ldr r3, [r3, #84] ; 0x54 + 80272d0: f043 0220 orr.w r2, r3, #32 + 80272d4: 687b ldr r3, [r7, #4] + 80272d6: 655a str r2, [r3, #84] ; 0x54 tmp_hal_status = HAL_ERROR; - 8027254: 2301 movs r3, #1 - 8027256: f887 307f strb.w r3, [r7, #127] ; 0x7f - 802725a: e008 b.n 802726e + 80272d8: 2301 movs r3, #1 + 80272da: f887 307f strb.w r3, [r7, #127] ; 0x7f + 80272de: e008 b.n 80272f2 /* channel could be done on neither of the channel configuration structure */ /* parameters. */ else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 802725c: 687b ldr r3, [r7, #4] - 802725e: 6d5b ldr r3, [r3, #84] ; 0x54 - 8027260: f043 0220 orr.w r2, r3, #32 - 8027264: 687b ldr r3, [r7, #4] - 8027266: 655a str r2, [r3, #84] ; 0x54 + 80272e0: 687b ldr r3, [r7, #4] + 80272e2: 6d5b ldr r3, [r3, #84] ; 0x54 + 80272e4: f043 0220 orr.w r2, r3, #32 + 80272e8: 687b ldr r3, [r7, #4] + 80272ea: 655a str r2, [r3, #84] ; 0x54 tmp_hal_status = HAL_ERROR; - 8027268: 2301 movs r3, #1 - 802726a: f887 307f strb.w r3, [r7, #127] ; 0x7f + 80272ec: 2301 movs r3, #1 + 80272ee: f887 307f strb.w r3, [r7, #127] ; 0x7f } /* Process unlocked */ __HAL_UNLOCK(hadc); - 802726e: 687b ldr r3, [r7, #4] - 8027270: 2200 movs r2, #0 - 8027272: f883 2050 strb.w r2, [r3, #80] ; 0x50 + 80272f2: 687b ldr r3, [r7, #4] + 80272f4: 2200 movs r2, #0 + 80272f6: f883 2050 strb.w r2, [r3, #80] ; 0x50 /* Return function status */ return tmp_hal_status; - 8027276: f897 307f ldrb.w r3, [r7, #127] ; 0x7f -} - 802727a: 4618 mov r0, r3 - 802727c: 3784 adds r7, #132 ; 0x84 - 802727e: 46bd mov sp, r7 - 8027280: bd90 pop {r4, r7, pc} - 8027282: bf00 nop - 8027284: 40022000 .word 0x40022000 - 8027288: 40022100 .word 0x40022100 - 802728c: 40022300 .word 0x40022300 - 8027290: 58026300 .word 0x58026300 - 8027294: 58026000 .word 0x58026000 - 8027298: cb840000 .word 0xcb840000 - 802729c: 24000048 .word 0x24000048 - 80272a0: 053e2d63 .word 0x053e2d63 - 80272a4: c7520000 .word 0xc7520000 - 80272a8: cfb80000 .word 0xcfb80000 - -080272ac : + 80272fa: f897 307f ldrb.w r3, [r7, #127] ; 0x7f +} + 80272fe: 4618 mov r0, r3 + 8027300: 3784 adds r7, #132 ; 0x84 + 8027302: 46bd mov sp, r7 + 8027304: bd90 pop {r4, r7, pc} + 8027306: bf00 nop + 8027308: 40022000 .word 0x40022000 + 802730c: 40022100 .word 0x40022100 + 8027310: 40022300 .word 0x40022300 + 8027314: 58026300 .word 0x58026300 + 8027318: 58026000 .word 0x58026000 + 802731c: cb840000 .word 0xcb840000 + 8027320: 24000048 .word 0x24000048 + 8027324: 053e2d63 .word 0x053e2d63 + 8027328: c7520000 .word 0xc7520000 + 802732c: cfb80000 .word 0xcfb80000 + +08027330 : * @arg @ref ADC_INJECTED_GROUP ADC injected conversion type. * @arg @ref ADC_REGULAR_INJECTED_GROUP ADC regular and injected conversion type. * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc, uint32_t ConversionGroup) { - 80272ac: b580 push {r7, lr} - 80272ae: b088 sub sp, #32 - 80272b0: af00 add r7, sp, #0 - 80272b2: 6078 str r0, [r7, #4] - 80272b4: 6039 str r1, [r7, #0] + 8027330: b580 push {r7, lr} + 8027332: b088 sub sp, #32 + 8027334: af00 add r7, sp, #0 + 8027336: 6078 str r0, [r7, #4] + 8027338: 6039 str r1, [r7, #0] uint32_t tickstart; uint32_t Conversion_Timeout_CPU_cycles = 0UL; - 80272b6: 2300 movs r3, #0 - 80272b8: 61fb str r3, [r7, #28] + 802733a: 2300 movs r3, #0 + 802733c: 61fb str r3, [r7, #28] uint32_t conversion_group_reassigned = ConversionGroup; - 80272ba: 683b ldr r3, [r7, #0] - 80272bc: 61bb str r3, [r7, #24] + 802733e: 683b ldr r3, [r7, #0] + 8027340: 61bb str r3, [r7, #24] assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); assert_param(IS_ADC_CONVERSION_GROUP(ConversionGroup)); /* Verification if ADC is not already stopped (on regular and injected */ /* groups) to bypass this function if not needed. */ tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance); - 80272be: 687b ldr r3, [r7, #4] - 80272c0: 681b ldr r3, [r3, #0] - 80272c2: 4618 mov r0, r3 - 80272c4: f7ff f8c4 bl 8026450 - 80272c8: 6138 str r0, [r7, #16] + 8027342: 687b ldr r3, [r7, #4] + 8027344: 681b ldr r3, [r3, #0] + 8027346: 4618 mov r0, r3 + 8027348: f7ff f8c4 bl 80264d4 + 802734c: 6138 str r0, [r7, #16] tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance); - 80272ca: 687b ldr r3, [r7, #4] - 80272cc: 681b ldr r3, [r3, #0] - 80272ce: 4618 mov r0, r3 - 80272d0: f7ff f8e6 bl 80264a0 - 80272d4: 60f8 str r0, [r7, #12] + 802734e: 687b ldr r3, [r7, #4] + 8027350: 681b ldr r3, [r3, #0] + 8027352: 4618 mov r0, r3 + 8027354: f7ff f8e6 bl 8026524 + 8027358: 60f8 str r0, [r7, #12] if ((tmp_adc_is_conversion_on_going_regular != 0UL) - 80272d6: 693b ldr r3, [r7, #16] - 80272d8: 2b00 cmp r3, #0 - 80272da: d103 bne.n 80272e4 + 802735a: 693b ldr r3, [r7, #16] + 802735c: 2b00 cmp r3, #0 + 802735e: d103 bne.n 8027368 || (tmp_adc_is_conversion_on_going_injected != 0UL) - 80272dc: 68fb ldr r3, [r7, #12] - 80272de: 2b00 cmp r3, #0 - 80272e0: f000 8098 beq.w 8027414 + 8027360: 68fb ldr r3, [r7, #12] + 8027362: 2b00 cmp r3, #0 + 8027364: f000 8098 beq.w 8027498 /* auto-delay mode. */ /* In auto-injection mode, regular group stop ADC_CR_ADSTP is used (not */ /* injected group stop ADC_CR_JADSTP). */ /* Procedure to be followed: Wait until JEOS=1, clear JEOS, set ADSTP=1 */ /* (see reference manual). */ if (((hadc->Instance->CFGR & ADC_CFGR_JAUTO) != 0UL) - 80272e4: 687b ldr r3, [r7, #4] - 80272e6: 681b ldr r3, [r3, #0] - 80272e8: 68db ldr r3, [r3, #12] - 80272ea: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80272ee: 2b00 cmp r3, #0 - 80272f0: d02a beq.n 8027348 + 8027368: 687b ldr r3, [r7, #4] + 802736a: 681b ldr r3, [r3, #0] + 802736c: 68db ldr r3, [r3, #12] + 802736e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8027372: 2b00 cmp r3, #0 + 8027374: d02a beq.n 80273cc && (hadc->Init.ContinuousConvMode == ENABLE) - 80272f2: 687b ldr r3, [r7, #4] - 80272f4: 7d5b ldrb r3, [r3, #21] - 80272f6: 2b01 cmp r3, #1 - 80272f8: d126 bne.n 8027348 + 8027376: 687b ldr r3, [r7, #4] + 8027378: 7d5b ldrb r3, [r3, #21] + 802737a: 2b01 cmp r3, #1 + 802737c: d126 bne.n 80273cc && (hadc->Init.LowPowerAutoWait == ENABLE) - 80272fa: 687b ldr r3, [r7, #4] - 80272fc: 7d1b ldrb r3, [r3, #20] - 80272fe: 2b01 cmp r3, #1 - 8027300: d122 bne.n 8027348 + 802737e: 687b ldr r3, [r7, #4] + 8027380: 7d1b ldrb r3, [r3, #20] + 8027382: 2b01 cmp r3, #1 + 8027384: d122 bne.n 80273cc ) { /* Use stop of regular group */ conversion_group_reassigned = ADC_REGULAR_GROUP; - 8027302: 2301 movs r3, #1 - 8027304: 61bb str r3, [r7, #24] + 8027386: 2301 movs r3, #1 + 8027388: 61bb str r3, [r7, #24] /* Wait until JEOS=1 (maximum Timeout: 4 injected conversions) */ while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) == 0UL) - 8027306: e014 b.n 8027332 + 802738a: e014 b.n 80273b6 { if (Conversion_Timeout_CPU_cycles >= (ADC_CONVERSION_TIME_MAX_CPU_CYCLES * 4UL)) - 8027308: 69fb ldr r3, [r7, #28] - 802730a: 4a45 ldr r2, [pc, #276] ; (8027420 ) - 802730c: 4293 cmp r3, r2 - 802730e: d90d bls.n 802732c + 802738c: 69fb ldr r3, [r7, #28] + 802738e: 4a45 ldr r2, [pc, #276] ; (80274a4 ) + 8027390: 4293 cmp r3, r2 + 8027392: d90d bls.n 80273b0 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8027310: 687b ldr r3, [r7, #4] - 8027312: 6d5b ldr r3, [r3, #84] ; 0x54 - 8027314: f043 0210 orr.w r2, r3, #16 - 8027318: 687b ldr r3, [r7, #4] - 802731a: 655a str r2, [r3, #84] ; 0x54 + 8027394: 687b ldr r3, [r7, #4] + 8027396: 6d5b ldr r3, [r3, #84] ; 0x54 + 8027398: f043 0210 orr.w r2, r3, #16 + 802739c: 687b ldr r3, [r7, #4] + 802739e: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 802731c: 687b ldr r3, [r7, #4] - 802731e: 6d9b ldr r3, [r3, #88] ; 0x58 - 8027320: f043 0201 orr.w r2, r3, #1 - 8027324: 687b ldr r3, [r7, #4] - 8027326: 659a str r2, [r3, #88] ; 0x58 + 80273a0: 687b ldr r3, [r7, #4] + 80273a2: 6d9b ldr r3, [r3, #88] ; 0x58 + 80273a4: f043 0201 orr.w r2, r3, #1 + 80273a8: 687b ldr r3, [r7, #4] + 80273aa: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 8027328: 2301 movs r3, #1 - 802732a: e074 b.n 8027416 + 80273ac: 2301 movs r3, #1 + 80273ae: e074 b.n 802749a } Conversion_Timeout_CPU_cycles ++; - 802732c: 69fb ldr r3, [r7, #28] - 802732e: 3301 adds r3, #1 - 8027330: 61fb str r3, [r7, #28] + 80273b0: 69fb ldr r3, [r7, #28] + 80273b2: 3301 adds r3, #1 + 80273b4: 61fb str r3, [r7, #28] while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) == 0UL) - 8027332: 687b ldr r3, [r7, #4] - 8027334: 681b ldr r3, [r3, #0] - 8027336: 681b ldr r3, [r3, #0] - 8027338: f003 0340 and.w r3, r3, #64 ; 0x40 - 802733c: 2b40 cmp r3, #64 ; 0x40 - 802733e: d1e3 bne.n 8027308 + 80273b6: 687b ldr r3, [r7, #4] + 80273b8: 681b ldr r3, [r3, #0] + 80273ba: 681b ldr r3, [r3, #0] + 80273bc: f003 0340 and.w r3, r3, #64 ; 0x40 + 80273c0: 2b40 cmp r3, #64 ; 0x40 + 80273c2: d1e3 bne.n 802738c } /* Clear JEOS */ __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOS); - 8027340: 687b ldr r3, [r7, #4] - 8027342: 681b ldr r3, [r3, #0] - 8027344: 2240 movs r2, #64 ; 0x40 - 8027346: 601a str r2, [r3, #0] + 80273c4: 687b ldr r3, [r7, #4] + 80273c6: 681b ldr r3, [r3, #0] + 80273c8: 2240 movs r2, #64 ; 0x40 + 80273ca: 601a str r2, [r3, #0] } /* Stop potential conversion on going on ADC group regular */ if (conversion_group_reassigned != ADC_INJECTED_GROUP) - 8027348: 69bb ldr r3, [r7, #24] - 802734a: 2b02 cmp r3, #2 - 802734c: d014 beq.n 8027378 + 80273cc: 69bb ldr r3, [r7, #24] + 80273ce: 2b02 cmp r3, #2 + 80273d0: d014 beq.n 80273fc { /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL) - 802734e: 687b ldr r3, [r7, #4] - 8027350: 681b ldr r3, [r3, #0] - 8027352: 4618 mov r0, r3 - 8027354: f7ff f87c bl 8026450 - 8027358: 4603 mov r3, r0 - 802735a: 2b00 cmp r3, #0 - 802735c: d00c beq.n 8027378 + 80273d2: 687b ldr r3, [r7, #4] + 80273d4: 681b ldr r3, [r3, #0] + 80273d6: 4618 mov r0, r3 + 80273d8: f7ff f87c bl 80264d4 + 80273dc: 4603 mov r3, r0 + 80273de: 2b00 cmp r3, #0 + 80273e0: d00c beq.n 80273fc { if (LL_ADC_IsDisableOngoing(hadc->Instance) == 0UL) - 802735e: 687b ldr r3, [r7, #4] - 8027360: 681b ldr r3, [r3, #0] - 8027362: 4618 mov r0, r3 - 8027364: f7ff f839 bl 80263da - 8027368: 4603 mov r3, r0 - 802736a: 2b00 cmp r3, #0 - 802736c: d104 bne.n 8027378 + 80273e2: 687b ldr r3, [r7, #4] + 80273e4: 681b ldr r3, [r3, #0] + 80273e6: 4618 mov r0, r3 + 80273e8: f7ff f839 bl 802645e + 80273ec: 4603 mov r3, r0 + 80273ee: 2b00 cmp r3, #0 + 80273f0: d104 bne.n 80273fc { /* Stop ADC group regular conversion */ LL_ADC_REG_StopConversion(hadc->Instance); - 802736e: 687b ldr r3, [r7, #4] - 8027370: 681b ldr r3, [r3, #0] - 8027372: 4618 mov r0, r3 - 8027374: f7ff f858 bl 8026428 + 80273f2: 687b ldr r3, [r7, #4] + 80273f4: 681b ldr r3, [r3, #0] + 80273f6: 4618 mov r0, r3 + 80273f8: f7ff f858 bl 80264ac } } } /* Stop potential conversion on going on ADC group injected */ if (conversion_group_reassigned != ADC_REGULAR_GROUP) - 8027378: 69bb ldr r3, [r7, #24] - 802737a: 2b01 cmp r3, #1 - 802737c: d014 beq.n 80273a8 + 80273fc: 69bb ldr r3, [r7, #24] + 80273fe: 2b01 cmp r3, #1 + 8027400: d014 beq.n 802742c { /* Software is allowed to set JADSTP only when JADSTART=1 and ADDIS=0 */ if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL) - 802737e: 687b ldr r3, [r7, #4] - 8027380: 681b ldr r3, [r3, #0] - 8027382: 4618 mov r0, r3 - 8027384: f7ff f88c bl 80264a0 - 8027388: 4603 mov r3, r0 - 802738a: 2b00 cmp r3, #0 - 802738c: d00c beq.n 80273a8 + 8027402: 687b ldr r3, [r7, #4] + 8027404: 681b ldr r3, [r3, #0] + 8027406: 4618 mov r0, r3 + 8027408: f7ff f88c bl 8026524 + 802740c: 4603 mov r3, r0 + 802740e: 2b00 cmp r3, #0 + 8027410: d00c beq.n 802742c { if (LL_ADC_IsDisableOngoing(hadc->Instance) == 0UL) - 802738e: 687b ldr r3, [r7, #4] - 8027390: 681b ldr r3, [r3, #0] - 8027392: 4618 mov r0, r3 - 8027394: f7ff f821 bl 80263da - 8027398: 4603 mov r3, r0 - 802739a: 2b00 cmp r3, #0 - 802739c: d104 bne.n 80273a8 + 8027412: 687b ldr r3, [r7, #4] + 8027414: 681b ldr r3, [r3, #0] + 8027416: 4618 mov r0, r3 + 8027418: f7ff f821 bl 802645e + 802741c: 4603 mov r3, r0 + 802741e: 2b00 cmp r3, #0 + 8027420: d104 bne.n 802742c { /* Stop ADC group injected conversion */ LL_ADC_INJ_StopConversion(hadc->Instance); - 802739e: 687b ldr r3, [r7, #4] - 80273a0: 681b ldr r3, [r3, #0] - 80273a2: 4618 mov r0, r3 - 80273a4: f7ff f868 bl 8026478 + 8027422: 687b ldr r3, [r7, #4] + 8027424: 681b ldr r3, [r3, #0] + 8027426: 4618 mov r0, r3 + 8027428: f7ff f868 bl 80264fc } } } /* Selection of start and stop bits with respect to the regular or injected group */ switch (conversion_group_reassigned) - 80273a8: 69bb ldr r3, [r7, #24] - 80273aa: 2b02 cmp r3, #2 - 80273ac: d005 beq.n 80273ba - 80273ae: 69bb ldr r3, [r7, #24] - 80273b0: 2b03 cmp r3, #3 - 80273b2: d105 bne.n 80273c0 + 802742c: 69bb ldr r3, [r7, #24] + 802742e: 2b02 cmp r3, #2 + 8027430: d005 beq.n 802743e + 8027432: 69bb ldr r3, [r7, #24] + 8027434: 2b03 cmp r3, #3 + 8027436: d105 bne.n 8027444 { case ADC_REGULAR_INJECTED_GROUP: tmp_ADC_CR_ADSTART_JADSTART = (ADC_CR_ADSTART | ADC_CR_JADSTART); - 80273b4: 230c movs r3, #12 - 80273b6: 617b str r3, [r7, #20] + 8027438: 230c movs r3, #12 + 802743a: 617b str r3, [r7, #20] break; - 80273b8: e005 b.n 80273c6 + 802743c: e005 b.n 802744a case ADC_INJECTED_GROUP: tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_JADSTART; - 80273ba: 2308 movs r3, #8 - 80273bc: 617b str r3, [r7, #20] + 802743e: 2308 movs r3, #8 + 8027440: 617b str r3, [r7, #20] break; - 80273be: e002 b.n 80273c6 + 8027442: e002 b.n 802744a /* Case ADC_REGULAR_GROUP only*/ default: tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_ADSTART; - 80273c0: 2304 movs r3, #4 - 80273c2: 617b str r3, [r7, #20] + 8027444: 2304 movs r3, #4 + 8027446: 617b str r3, [r7, #20] break; - 80273c4: bf00 nop + 8027448: bf00 nop } /* Wait for conversion effectively stopped */ tickstart = HAL_GetTick(); - 80273c6: f7fe fdfd bl 8025fc4 - 80273ca: 60b8 str r0, [r7, #8] + 802744a: f7fe fdfd bl 8026048 + 802744e: 60b8 str r0, [r7, #8] while ((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != 0UL) - 80273cc: e01b b.n 8027406 + 8027450: e01b b.n 802748a { if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) - 80273ce: f7fe fdf9 bl 8025fc4 - 80273d2: 4602 mov r2, r0 - 80273d4: 68bb ldr r3, [r7, #8] - 80273d6: 1ad3 subs r3, r2, r3 - 80273d8: 2b05 cmp r3, #5 - 80273da: d914 bls.n 8027406 + 8027452: f7fe fdf9 bl 8026048 + 8027456: 4602 mov r2, r0 + 8027458: 68bb ldr r3, [r7, #8] + 802745a: 1ad3 subs r3, r2, r3 + 802745c: 2b05 cmp r3, #5 + 802745e: d914 bls.n 802748a { /* New check to avoid false timeout detection in case of preemption */ if((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != 0UL) - 80273dc: 687b ldr r3, [r7, #4] - 80273de: 681b ldr r3, [r3, #0] - 80273e0: 689a ldr r2, [r3, #8] - 80273e2: 697b ldr r3, [r7, #20] - 80273e4: 4013 ands r3, r2 - 80273e6: 2b00 cmp r3, #0 - 80273e8: d00d beq.n 8027406 + 8027460: 687b ldr r3, [r7, #4] + 8027462: 681b ldr r3, [r3, #0] + 8027464: 689a ldr r2, [r3, #8] + 8027466: 697b ldr r3, [r7, #20] + 8027468: 4013 ands r3, r2 + 802746a: 2b00 cmp r3, #0 + 802746c: d00d beq.n 802748a { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80273ea: 687b ldr r3, [r7, #4] - 80273ec: 6d5b ldr r3, [r3, #84] ; 0x54 - 80273ee: f043 0210 orr.w r2, r3, #16 - 80273f2: 687b ldr r3, [r7, #4] - 80273f4: 655a str r2, [r3, #84] ; 0x54 + 802746e: 687b ldr r3, [r7, #4] + 8027470: 6d5b ldr r3, [r3, #84] ; 0x54 + 8027472: f043 0210 orr.w r2, r3, #16 + 8027476: 687b ldr r3, [r7, #4] + 8027478: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80273f6: 687b ldr r3, [r7, #4] - 80273f8: 6d9b ldr r3, [r3, #88] ; 0x58 - 80273fa: f043 0201 orr.w r2, r3, #1 - 80273fe: 687b ldr r3, [r7, #4] - 8027400: 659a str r2, [r3, #88] ; 0x58 + 802747a: 687b ldr r3, [r7, #4] + 802747c: 6d9b ldr r3, [r3, #88] ; 0x58 + 802747e: f043 0201 orr.w r2, r3, #1 + 8027482: 687b ldr r3, [r7, #4] + 8027484: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 8027402: 2301 movs r3, #1 - 8027404: e007 b.n 8027416 + 8027486: 2301 movs r3, #1 + 8027488: e007 b.n 802749a while ((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != 0UL) - 8027406: 687b ldr r3, [r7, #4] - 8027408: 681b ldr r3, [r3, #0] - 802740a: 689a ldr r2, [r3, #8] - 802740c: 697b ldr r3, [r7, #20] - 802740e: 4013 ands r3, r2 - 8027410: 2b00 cmp r3, #0 - 8027412: d1dc bne.n 80273ce + 802748a: 687b ldr r3, [r7, #4] + 802748c: 681b ldr r3, [r3, #0] + 802748e: 689a ldr r2, [r3, #8] + 8027490: 697b ldr r3, [r7, #20] + 8027492: 4013 ands r3, r2 + 8027494: 2b00 cmp r3, #0 + 8027496: d1dc bne.n 8027452 } } /* Return HAL status */ return HAL_OK; - 8027414: 2300 movs r3, #0 + 8027498: 2300 movs r3, #0 } - 8027416: 4618 mov r0, r3 - 8027418: 3720 adds r7, #32 - 802741a: 46bd mov sp, r7 - 802741c: bd80 pop {r7, pc} - 802741e: bf00 nop - 8027420: 000cdbff .word 0x000cdbff + 802749a: 4618 mov r0, r3 + 802749c: 3720 adds r7, #32 + 802749e: 46bd mov sp, r7 + 80274a0: bd80 pop {r7, pc} + 80274a2: bf00 nop + 80274a4: 000cdbff .word 0x000cdbff -08027424 : +080274a8 : * and voltage regulator must be enabled (done into HAL_ADC_Init()). * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc) { - 8027424: b580 push {r7, lr} - 8027426: b084 sub sp, #16 - 8027428: af00 add r7, sp, #0 - 802742a: 6078 str r0, [r7, #4] + 80274a8: b580 push {r7, lr} + 80274aa: b084 sub sp, #16 + 80274ac: af00 add r7, sp, #0 + 80274ae: 6078 str r0, [r7, #4] /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ /* enabling phase not yet completed: flag ADC ready not yet set). */ /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ /* causes: ADC clock not running, ...). */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 802742c: 687b ldr r3, [r7, #4] - 802742e: 681b ldr r3, [r3, #0] - 8027430: 4618 mov r0, r3 - 8027432: f7fe ffbf bl 80263b4 - 8027436: 4603 mov r3, r0 - 8027438: 2b00 cmp r3, #0 - 802743a: d16e bne.n 802751a + 80274b0: 687b ldr r3, [r7, #4] + 80274b2: 681b ldr r3, [r3, #0] + 80274b4: 4618 mov r0, r3 + 80274b6: f7fe ffbf bl 8026438 + 80274ba: 4603 mov r3, r0 + 80274bc: 2b00 cmp r3, #0 + 80274be: d16e bne.n 802759e { /* Check if conditions to enable the ADC are fulfilled */ if ((hadc->Instance->CR & (ADC_CR_ADCAL | ADC_CR_JADSTP | ADC_CR_ADSTP | ADC_CR_JADSTART | ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN)) != 0UL) - 802743c: 687b ldr r3, [r7, #4] - 802743e: 681b ldr r3, [r3, #0] - 8027440: 689a ldr r2, [r3, #8] - 8027442: 4b38 ldr r3, [pc, #224] ; (8027524 ) - 8027444: 4013 ands r3, r2 - 8027446: 2b00 cmp r3, #0 - 8027448: d00d beq.n 8027466 + 80274c0: 687b ldr r3, [r7, #4] + 80274c2: 681b ldr r3, [r3, #0] + 80274c4: 689a ldr r2, [r3, #8] + 80274c6: 4b38 ldr r3, [pc, #224] ; (80275a8 ) + 80274c8: 4013 ands r3, r2 + 80274ca: 2b00 cmp r3, #0 + 80274cc: d00d beq.n 80274ea { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 802744a: 687b ldr r3, [r7, #4] - 802744c: 6d5b ldr r3, [r3, #84] ; 0x54 - 802744e: f043 0210 orr.w r2, r3, #16 - 8027452: 687b ldr r3, [r7, #4] - 8027454: 655a str r2, [r3, #84] ; 0x54 + 80274ce: 687b ldr r3, [r7, #4] + 80274d0: 6d5b ldr r3, [r3, #84] ; 0x54 + 80274d2: f043 0210 orr.w r2, r3, #16 + 80274d6: 687b ldr r3, [r7, #4] + 80274d8: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8027456: 687b ldr r3, [r7, #4] - 8027458: 6d9b ldr r3, [r3, #88] ; 0x58 - 802745a: f043 0201 orr.w r2, r3, #1 - 802745e: 687b ldr r3, [r7, #4] - 8027460: 659a str r2, [r3, #88] ; 0x58 + 80274da: 687b ldr r3, [r7, #4] + 80274dc: 6d9b ldr r3, [r3, #88] ; 0x58 + 80274de: f043 0201 orr.w r2, r3, #1 + 80274e2: 687b ldr r3, [r7, #4] + 80274e4: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 8027462: 2301 movs r3, #1 - 8027464: e05a b.n 802751c + 80274e6: 2301 movs r3, #1 + 80274e8: e05a b.n 80275a0 } /* Enable the ADC peripheral */ LL_ADC_Enable(hadc->Instance); - 8027466: 687b ldr r3, [r7, #4] - 8027468: 681b ldr r3, [r3, #0] - 802746a: 4618 mov r0, r3 - 802746c: f7fe ff7a bl 8026364 + 80274ea: 687b ldr r3, [r7, #4] + 80274ec: 681b ldr r3, [r3, #0] + 80274ee: 4618 mov r0, r3 + 80274f0: f7fe ff7a bl 80263e8 /* Wait for ADC effectively enabled */ tickstart = HAL_GetTick(); - 8027470: f7fe fda8 bl 8025fc4 - 8027474: 60f8 str r0, [r7, #12] + 80274f4: f7fe fda8 bl 8026048 + 80274f8: 60f8 str r0, [r7, #12] /* Poll for ADC ready flag raised except case of multimode enabled and ADC slave selected. */ uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance)); - 8027476: 687b ldr r3, [r7, #4] - 8027478: 681b ldr r3, [r3, #0] - 802747a: 4a2b ldr r2, [pc, #172] ; (8027528 ) - 802747c: 4293 cmp r3, r2 - 802747e: d004 beq.n 802748a - 8027480: 687b ldr r3, [r7, #4] - 8027482: 681b ldr r3, [r3, #0] - 8027484: 4a29 ldr r2, [pc, #164] ; (802752c ) - 8027486: 4293 cmp r3, r2 - 8027488: d101 bne.n 802748e - 802748a: 4b29 ldr r3, [pc, #164] ; (8027530 ) - 802748c: e000 b.n 8027490 - 802748e: 4b29 ldr r3, [pc, #164] ; (8027534 ) - 8027490: 4618 mov r0, r3 - 8027492: f7fe fefd bl 8026290 - 8027496: 60b8 str r0, [r7, #8] + 80274fa: 687b ldr r3, [r7, #4] + 80274fc: 681b ldr r3, [r3, #0] + 80274fe: 4a2b ldr r2, [pc, #172] ; (80275ac ) + 8027500: 4293 cmp r3, r2 + 8027502: d004 beq.n 802750e + 8027504: 687b ldr r3, [r7, #4] + 8027506: 681b ldr r3, [r3, #0] + 8027508: 4a29 ldr r2, [pc, #164] ; (80275b0 ) + 802750a: 4293 cmp r3, r2 + 802750c: d101 bne.n 8027512 + 802750e: 4b29 ldr r3, [pc, #164] ; (80275b4 ) + 8027510: e000 b.n 8027514 + 8027512: 4b29 ldr r3, [pc, #164] ; (80275b8 ) + 8027514: 4618 mov r0, r3 + 8027516: f7fe fefd bl 8026314 + 802751a: 60b8 str r0, [r7, #8] if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance) - 8027498: 687b ldr r3, [r7, #4] - 802749a: 681b ldr r3, [r3, #0] - 802749c: 4a23 ldr r2, [pc, #140] ; (802752c ) - 802749e: 4293 cmp r3, r2 - 80274a0: d002 beq.n 80274a8 - 80274a2: 687b ldr r3, [r7, #4] - 80274a4: 681b ldr r3, [r3, #0] - 80274a6: e000 b.n 80274aa - 80274a8: 4b1f ldr r3, [pc, #124] ; (8027528 ) - 80274aa: 687a ldr r2, [r7, #4] - 80274ac: 6812 ldr r2, [r2, #0] - 80274ae: 4293 cmp r3, r2 - 80274b0: d02c beq.n 802750c + 802751c: 687b ldr r3, [r7, #4] + 802751e: 681b ldr r3, [r3, #0] + 8027520: 4a23 ldr r2, [pc, #140] ; (80275b0 ) + 8027522: 4293 cmp r3, r2 + 8027524: d002 beq.n 802752c + 8027526: 687b ldr r3, [r7, #4] + 8027528: 681b ldr r3, [r3, #0] + 802752a: e000 b.n 802752e + 802752c: 4b1f ldr r3, [pc, #124] ; (80275ac ) + 802752e: 687a ldr r2, [r7, #4] + 8027530: 6812 ldr r2, [r2, #0] + 8027532: 4293 cmp r3, r2 + 8027534: d02c beq.n 8027590 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) - 80274b2: 68bb ldr r3, [r7, #8] - 80274b4: 2b00 cmp r3, #0 - 80274b6: d130 bne.n 802751a + 8027536: 68bb ldr r3, [r7, #8] + 8027538: 2b00 cmp r3, #0 + 802753a: d130 bne.n 802759e ) { while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) - 80274b8: e028 b.n 802750c + 802753c: e028 b.n 8027590 The workaround is to continue setting ADEN until ADRDY is becomes 1. Additionally, ADC_ENABLE_TIMEOUT is defined to encompass this 4 ADC clock cycle duration */ /* Note: Test of ADC enabled required due to hardware constraint to */ /* not enable ADC if already enabled. */ if (LL_ADC_IsEnabled(hadc->Instance) == 0UL) - 80274ba: 687b ldr r3, [r7, #4] - 80274bc: 681b ldr r3, [r3, #0] - 80274be: 4618 mov r0, r3 - 80274c0: f7fe ff78 bl 80263b4 - 80274c4: 4603 mov r3, r0 - 80274c6: 2b00 cmp r3, #0 - 80274c8: d104 bne.n 80274d4 + 802753e: 687b ldr r3, [r7, #4] + 8027540: 681b ldr r3, [r3, #0] + 8027542: 4618 mov r0, r3 + 8027544: f7fe ff78 bl 8026438 + 8027548: 4603 mov r3, r0 + 802754a: 2b00 cmp r3, #0 + 802754c: d104 bne.n 8027558 { LL_ADC_Enable(hadc->Instance); - 80274ca: 687b ldr r3, [r7, #4] - 80274cc: 681b ldr r3, [r3, #0] - 80274ce: 4618 mov r0, r3 - 80274d0: f7fe ff48 bl 8026364 + 802754e: 687b ldr r3, [r7, #4] + 8027550: 681b ldr r3, [r3, #0] + 8027552: 4618 mov r0, r3 + 8027554: f7fe ff48 bl 80263e8 } if ((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) - 80274d4: f7fe fd76 bl 8025fc4 - 80274d8: 4602 mov r2, r0 - 80274da: 68fb ldr r3, [r7, #12] - 80274dc: 1ad3 subs r3, r2, r3 - 80274de: 2b02 cmp r3, #2 - 80274e0: d914 bls.n 802750c + 8027558: f7fe fd76 bl 8026048 + 802755c: 4602 mov r2, r0 + 802755e: 68fb ldr r3, [r7, #12] + 8027560: 1ad3 subs r3, r2, r3 + 8027562: 2b02 cmp r3, #2 + 8027564: d914 bls.n 8027590 { /* New check to avoid false timeout detection in case of preemption */ if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) - 80274e2: 687b ldr r3, [r7, #4] - 80274e4: 681b ldr r3, [r3, #0] - 80274e6: 681b ldr r3, [r3, #0] - 80274e8: f003 0301 and.w r3, r3, #1 - 80274ec: 2b01 cmp r3, #1 - 80274ee: d00d beq.n 802750c + 8027566: 687b ldr r3, [r7, #4] + 8027568: 681b ldr r3, [r3, #0] + 802756a: 681b ldr r3, [r3, #0] + 802756c: f003 0301 and.w r3, r3, #1 + 8027570: 2b01 cmp r3, #1 + 8027572: d00d beq.n 8027590 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80274f0: 687b ldr r3, [r7, #4] - 80274f2: 6d5b ldr r3, [r3, #84] ; 0x54 - 80274f4: f043 0210 orr.w r2, r3, #16 - 80274f8: 687b ldr r3, [r7, #4] - 80274fa: 655a str r2, [r3, #84] ; 0x54 + 8027574: 687b ldr r3, [r7, #4] + 8027576: 6d5b ldr r3, [r3, #84] ; 0x54 + 8027578: f043 0210 orr.w r2, r3, #16 + 802757c: 687b ldr r3, [r7, #4] + 802757e: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80274fc: 687b ldr r3, [r7, #4] - 80274fe: 6d9b ldr r3, [r3, #88] ; 0x58 - 8027500: f043 0201 orr.w r2, r3, #1 - 8027504: 687b ldr r3, [r7, #4] - 8027506: 659a str r2, [r3, #88] ; 0x58 + 8027580: 687b ldr r3, [r7, #4] + 8027582: 6d9b ldr r3, [r3, #88] ; 0x58 + 8027584: f043 0201 orr.w r2, r3, #1 + 8027588: 687b ldr r3, [r7, #4] + 802758a: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 8027508: 2301 movs r3, #1 - 802750a: e007 b.n 802751c + 802758c: 2301 movs r3, #1 + 802758e: e007 b.n 80275a0 while (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == 0UL) - 802750c: 687b ldr r3, [r7, #4] - 802750e: 681b ldr r3, [r3, #0] - 8027510: 681b ldr r3, [r3, #0] - 8027512: f003 0301 and.w r3, r3, #1 - 8027516: 2b01 cmp r3, #1 - 8027518: d1cf bne.n 80274ba + 8027590: 687b ldr r3, [r7, #4] + 8027592: 681b ldr r3, [r3, #0] + 8027594: 681b ldr r3, [r3, #0] + 8027596: f003 0301 and.w r3, r3, #1 + 802759a: 2b01 cmp r3, #1 + 802759c: d1cf bne.n 802753e } } } /* Return HAL status */ return HAL_OK; - 802751a: 2300 movs r3, #0 -} - 802751c: 4618 mov r0, r3 - 802751e: 3710 adds r7, #16 - 8027520: 46bd mov sp, r7 - 8027522: bd80 pop {r7, pc} - 8027524: 8000003f .word 0x8000003f - 8027528: 40022000 .word 0x40022000 - 802752c: 40022100 .word 0x40022100 - 8027530: 40022300 .word 0x40022300 - 8027534: 58026300 .word 0x58026300 - -08027538 : + 802759e: 2300 movs r3, #0 +} + 80275a0: 4618 mov r0, r3 + 80275a2: 3710 adds r7, #16 + 80275a4: 46bd mov sp, r7 + 80275a6: bd80 pop {r7, pc} + 80275a8: 8000003f .word 0x8000003f + 80275ac: 40022000 .word 0x40022000 + 80275b0: 40022100 .word 0x40022100 + 80275b4: 40022300 .word 0x40022300 + 80275b8: 58026300 .word 0x58026300 + +080275bc : * stopped. * @param hadc ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc) { - 8027538: b580 push {r7, lr} - 802753a: b084 sub sp, #16 - 802753c: af00 add r7, sp, #0 - 802753e: 6078 str r0, [r7, #4] + 80275bc: b580 push {r7, lr} + 80275be: b084 sub sp, #16 + 80275c0: af00 add r7, sp, #0 + 80275c2: 6078 str r0, [r7, #4] uint32_t tickstart; const uint32_t tmp_adc_is_disable_on_going = LL_ADC_IsDisableOngoing(hadc->Instance); - 8027540: 687b ldr r3, [r7, #4] - 8027542: 681b ldr r3, [r3, #0] - 8027544: 4618 mov r0, r3 - 8027546: f7fe ff48 bl 80263da - 802754a: 60f8 str r0, [r7, #12] + 80275c4: 687b ldr r3, [r7, #4] + 80275c6: 681b ldr r3, [r3, #0] + 80275c8: 4618 mov r0, r3 + 80275ca: f7fe ff48 bl 802645e + 80275ce: 60f8 str r0, [r7, #12] /* Verification if ADC is not already disabled: */ /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ /* disabled. */ if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL) - 802754c: 687b ldr r3, [r7, #4] - 802754e: 681b ldr r3, [r3, #0] - 8027550: 4618 mov r0, r3 - 8027552: f7fe ff2f bl 80263b4 - 8027556: 4603 mov r3, r0 - 8027558: 2b00 cmp r3, #0 - 802755a: d047 beq.n 80275ec + 80275d0: 687b ldr r3, [r7, #4] + 80275d2: 681b ldr r3, [r3, #0] + 80275d4: 4618 mov r0, r3 + 80275d6: f7fe ff2f bl 8026438 + 80275da: 4603 mov r3, r0 + 80275dc: 2b00 cmp r3, #0 + 80275de: d047 beq.n 8027670 && (tmp_adc_is_disable_on_going == 0UL) - 802755c: 68fb ldr r3, [r7, #12] - 802755e: 2b00 cmp r3, #0 - 8027560: d144 bne.n 80275ec + 80275e0: 68fb ldr r3, [r7, #12] + 80275e2: 2b00 cmp r3, #0 + 80275e4: d144 bne.n 8027670 ) { /* Check if conditions to disable the ADC are fulfilled */ if ((hadc->Instance->CR & (ADC_CR_JADSTART | ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN) - 8027562: 687b ldr r3, [r7, #4] - 8027564: 681b ldr r3, [r3, #0] - 8027566: 689b ldr r3, [r3, #8] - 8027568: f003 030d and.w r3, r3, #13 - 802756c: 2b01 cmp r3, #1 - 802756e: d10c bne.n 802758a + 80275e6: 687b ldr r3, [r7, #4] + 80275e8: 681b ldr r3, [r3, #0] + 80275ea: 689b ldr r3, [r3, #8] + 80275ec: f003 030d and.w r3, r3, #13 + 80275f0: 2b01 cmp r3, #1 + 80275f2: d10c bne.n 802760e { /* Disable the ADC peripheral */ LL_ADC_Disable(hadc->Instance); - 8027570: 687b ldr r3, [r7, #4] - 8027572: 681b ldr r3, [r3, #0] - 8027574: 4618 mov r0, r3 - 8027576: f7fe ff09 bl 802638c + 80275f4: 687b ldr r3, [r7, #4] + 80275f6: 681b ldr r3, [r3, #0] + 80275f8: 4618 mov r0, r3 + 80275fa: f7fe ff09 bl 8026410 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); - 802757a: 687b ldr r3, [r7, #4] - 802757c: 681b ldr r3, [r3, #0] - 802757e: 2203 movs r2, #3 - 8027580: 601a str r2, [r3, #0] + 80275fe: 687b ldr r3, [r7, #4] + 8027600: 681b ldr r3, [r3, #0] + 8027602: 2203 movs r2, #3 + 8027604: 601a str r2, [r3, #0] return HAL_ERROR; } /* Wait for ADC effectively disabled */ /* Get tick count */ tickstart = HAL_GetTick(); - 8027582: f7fe fd1f bl 8025fc4 - 8027586: 60b8 str r0, [r7, #8] + 8027606: f7fe fd1f bl 8026048 + 802760a: 60b8 str r0, [r7, #8] while ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) - 8027588: e029 b.n 80275de + 802760c: e029 b.n 8027662 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 802758a: 687b ldr r3, [r7, #4] - 802758c: 6d5b ldr r3, [r3, #84] ; 0x54 - 802758e: f043 0210 orr.w r2, r3, #16 - 8027592: 687b ldr r3, [r7, #4] - 8027594: 655a str r2, [r3, #84] ; 0x54 + 802760e: 687b ldr r3, [r7, #4] + 8027610: 6d5b ldr r3, [r3, #84] ; 0x54 + 8027612: f043 0210 orr.w r2, r3, #16 + 8027616: 687b ldr r3, [r7, #4] + 8027618: 655a str r2, [r3, #84] ; 0x54 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8027596: 687b ldr r3, [r7, #4] - 8027598: 6d9b ldr r3, [r3, #88] ; 0x58 - 802759a: f043 0201 orr.w r2, r3, #1 - 802759e: 687b ldr r3, [r7, #4] - 80275a0: 659a str r2, [r3, #88] ; 0x58 + 802761a: 687b ldr r3, [r7, #4] + 802761c: 6d9b ldr r3, [r3, #88] ; 0x58 + 802761e: f043 0201 orr.w r2, r3, #1 + 8027622: 687b ldr r3, [r7, #4] + 8027624: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 80275a2: 2301 movs r3, #1 - 80275a4: e023 b.n 80275ee + 8027626: 2301 movs r3, #1 + 8027628: e023 b.n 8027672 { if ((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 80275a6: f7fe fd0d bl 8025fc4 - 80275aa: 4602 mov r2, r0 - 80275ac: 68bb ldr r3, [r7, #8] - 80275ae: 1ad3 subs r3, r2, r3 - 80275b0: 2b02 cmp r3, #2 - 80275b2: d914 bls.n 80275de + 802762a: f7fe fd0d bl 8026048 + 802762e: 4602 mov r2, r0 + 8027630: 68bb ldr r3, [r7, #8] + 8027632: 1ad3 subs r3, r2, r3 + 8027634: 2b02 cmp r3, #2 + 8027636: d914 bls.n 8027662 { /* New check to avoid false timeout detection in case of preemption */ if ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) - 80275b4: 687b ldr r3, [r7, #4] - 80275b6: 681b ldr r3, [r3, #0] - 80275b8: 689b ldr r3, [r3, #8] - 80275ba: f003 0301 and.w r3, r3, #1 - 80275be: 2b00 cmp r3, #0 - 80275c0: d00d beq.n 80275de + 8027638: 687b ldr r3, [r7, #4] + 802763a: 681b ldr r3, [r3, #0] + 802763c: 689b ldr r3, [r3, #8] + 802763e: f003 0301 and.w r3, r3, #1 + 8027642: 2b00 cmp r3, #0 + 8027644: d00d beq.n 8027662 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80275c2: 687b ldr r3, [r7, #4] - 80275c4: 6d5b ldr r3, [r3, #84] ; 0x54 - 80275c6: f043 0210 orr.w r2, r3, #16 - 80275ca: 687b ldr r3, [r7, #4] - 80275cc: 655a str r2, [r3, #84] ; 0x54 + 8027646: 687b ldr r3, [r7, #4] + 8027648: 6d5b ldr r3, [r3, #84] ; 0x54 + 802764a: f043 0210 orr.w r2, r3, #16 + 802764e: 687b ldr r3, [r7, #4] + 8027650: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80275ce: 687b ldr r3, [r7, #4] - 80275d0: 6d9b ldr r3, [r3, #88] ; 0x58 - 80275d2: f043 0201 orr.w r2, r3, #1 - 80275d6: 687b ldr r3, [r7, #4] - 80275d8: 659a str r2, [r3, #88] ; 0x58 + 8027652: 687b ldr r3, [r7, #4] + 8027654: 6d9b ldr r3, [r3, #88] ; 0x58 + 8027656: f043 0201 orr.w r2, r3, #1 + 802765a: 687b ldr r3, [r7, #4] + 802765c: 659a str r2, [r3, #88] ; 0x58 return HAL_ERROR; - 80275da: 2301 movs r3, #1 - 80275dc: e007 b.n 80275ee + 802765e: 2301 movs r3, #1 + 8027660: e007 b.n 8027672 while ((hadc->Instance->CR & ADC_CR_ADEN) != 0UL) - 80275de: 687b ldr r3, [r7, #4] - 80275e0: 681b ldr r3, [r3, #0] - 80275e2: 689b ldr r3, [r3, #8] - 80275e4: f003 0301 and.w r3, r3, #1 - 80275e8: 2b00 cmp r3, #0 - 80275ea: d1dc bne.n 80275a6 + 8027662: 687b ldr r3, [r7, #4] + 8027664: 681b ldr r3, [r3, #0] + 8027666: 689b ldr r3, [r3, #8] + 8027668: f003 0301 and.w r3, r3, #1 + 802766c: 2b00 cmp r3, #0 + 802766e: d1dc bne.n 802762a } } } /* Return HAL status */ return HAL_OK; - 80275ec: 2300 movs r3, #0 + 8027670: 2300 movs r3, #0 } - 80275ee: 4618 mov r0, r3 - 80275f0: 3710 adds r7, #16 - 80275f2: 46bd mov sp, r7 - 80275f4: bd80 pop {r7, pc} + 8027672: 4618 mov r0, r3 + 8027674: 3710 adds r7, #16 + 8027676: 46bd mov sp, r7 + 8027678: bd80 pop {r7, pc} ... -080275f8 : +0802767c : * stopped. * @param hadc ADC handle * @retval None. */ void ADC_ConfigureBoostMode(ADC_HandleTypeDef *hadc) { - 80275f8: b580 push {r7, lr} - 80275fa: b084 sub sp, #16 - 80275fc: af00 add r7, sp, #0 - 80275fe: 6078 str r0, [r7, #4] + 802767c: b580 push {r7, lr} + 802767e: b084 sub sp, #16 + 8027680: af00 add r7, sp, #0 + 8027682: 6078 str r0, [r7, #4] uint32_t freq; if (ADC_IS_SYNCHRONOUS_CLOCK_MODE(hadc)) - 8027600: 687b ldr r3, [r7, #4] - 8027602: 681b ldr r3, [r3, #0] - 8027604: 4a79 ldr r2, [pc, #484] ; (80277ec ) - 8027606: 4293 cmp r3, r2 - 8027608: d004 beq.n 8027614 - 802760a: 687b ldr r3, [r7, #4] - 802760c: 681b ldr r3, [r3, #0] - 802760e: 4a78 ldr r2, [pc, #480] ; (80277f0 ) - 8027610: 4293 cmp r3, r2 - 8027612: d109 bne.n 8027628 - 8027614: 4b77 ldr r3, [pc, #476] ; (80277f4 ) - 8027616: 689b ldr r3, [r3, #8] - 8027618: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 802761c: 2b00 cmp r3, #0 - 802761e: bf14 ite ne - 8027620: 2301 movne r3, #1 - 8027622: 2300 moveq r3, #0 - 8027624: b2db uxtb r3, r3 - 8027626: e008 b.n 802763a - 8027628: 4b73 ldr r3, [pc, #460] ; (80277f8 ) - 802762a: 689b ldr r3, [r3, #8] - 802762c: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 8027630: 2b00 cmp r3, #0 - 8027632: bf14 ite ne - 8027634: 2301 movne r3, #1 - 8027636: 2300 moveq r3, #0 - 8027638: b2db uxtb r3, r3 - 802763a: 2b00 cmp r3, #0 - 802763c: d01c beq.n 8027678 + 8027684: 687b ldr r3, [r7, #4] + 8027686: 681b ldr r3, [r3, #0] + 8027688: 4a79 ldr r2, [pc, #484] ; (8027870 ) + 802768a: 4293 cmp r3, r2 + 802768c: d004 beq.n 8027698 + 802768e: 687b ldr r3, [r7, #4] + 8027690: 681b ldr r3, [r3, #0] + 8027692: 4a78 ldr r2, [pc, #480] ; (8027874 ) + 8027694: 4293 cmp r3, r2 + 8027696: d109 bne.n 80276ac + 8027698: 4b77 ldr r3, [pc, #476] ; (8027878 ) + 802769a: 689b ldr r3, [r3, #8] + 802769c: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 80276a0: 2b00 cmp r3, #0 + 80276a2: bf14 ite ne + 80276a4: 2301 movne r3, #1 + 80276a6: 2300 moveq r3, #0 + 80276a8: b2db uxtb r3, r3 + 80276aa: e008 b.n 80276be + 80276ac: 4b73 ldr r3, [pc, #460] ; (802787c ) + 80276ae: 689b ldr r3, [r3, #8] + 80276b0: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 80276b4: 2b00 cmp r3, #0 + 80276b6: bf14 ite ne + 80276b8: 2301 movne r3, #1 + 80276ba: 2300 moveq r3, #0 + 80276bc: b2db uxtb r3, r3 + 80276be: 2b00 cmp r3, #0 + 80276c0: d01c beq.n 80276fc { freq = HAL_RCC_GetHCLKFreq(); - 802763e: f008 fb5b bl 802fcf8 - 8027642: 60f8 str r0, [r7, #12] + 80276c2: f008 fb5b bl 802fd7c + 80276c6: 60f8 str r0, [r7, #12] switch (hadc->Init.ClockPrescaler) - 8027644: 687b ldr r3, [r7, #4] - 8027646: 685b ldr r3, [r3, #4] - 8027648: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 - 802764c: d010 beq.n 8027670 - 802764e: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 - 8027652: d871 bhi.n 8027738 - 8027654: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8027658: d002 beq.n 8027660 - 802765a: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 802765e: d16b bne.n 8027738 + 80276c8: 687b ldr r3, [r7, #4] + 80276ca: 685b ldr r3, [r3, #4] + 80276cc: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 + 80276d0: d010 beq.n 80276f4 + 80276d2: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 + 80276d6: d871 bhi.n 80277bc + 80276d8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80276dc: d002 beq.n 80276e4 + 80276de: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80276e2: d16b bne.n 80277bc { case ADC_CLOCK_SYNC_PCLK_DIV1: case ADC_CLOCK_SYNC_PCLK_DIV2: freq /= (hadc->Init.ClockPrescaler >> ADC_CCR_CKMODE_Pos); - 8027660: 687b ldr r3, [r7, #4] - 8027662: 685b ldr r3, [r3, #4] - 8027664: 0c1b lsrs r3, r3, #16 - 8027666: 68fa ldr r2, [r7, #12] - 8027668: fbb2 f3f3 udiv r3, r2, r3 - 802766c: 60fb str r3, [r7, #12] + 80276e4: 687b ldr r3, [r7, #4] + 80276e6: 685b ldr r3, [r3, #4] + 80276e8: 0c1b lsrs r3, r3, #16 + 80276ea: 68fa ldr r2, [r7, #12] + 80276ec: fbb2 f3f3 udiv r3, r2, r3 + 80276f0: 60fb str r3, [r7, #12] break; - 802766e: e066 b.n 802773e + 80276f2: e066 b.n 80277c2 case ADC_CLOCK_SYNC_PCLK_DIV4: freq /= 4UL; - 8027670: 68fb ldr r3, [r7, #12] - 8027672: 089b lsrs r3, r3, #2 - 8027674: 60fb str r3, [r7, #12] + 80276f4: 68fb ldr r3, [r7, #12] + 80276f6: 089b lsrs r3, r3, #2 + 80276f8: 60fb str r3, [r7, #12] break; - 8027676: e062 b.n 802773e + 80276fa: e062 b.n 80277c2 break; } } else { freq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC); - 8027678: f44f 2000 mov.w r0, #524288 ; 0x80000 - 802767c: f009 fade bl 8030c3c - 8027680: 60f8 str r0, [r7, #12] + 80276fc: f44f 2000 mov.w r0, #524288 ; 0x80000 + 8027700: f009 fade bl 8030cc0 + 8027704: 60f8 str r0, [r7, #12] switch (hadc->Init.ClockPrescaler) - 8027682: 687b ldr r3, [r7, #4] - 8027684: 685b ldr r3, [r3, #4] - 8027686: f5b3 1f30 cmp.w r3, #2883584 ; 0x2c0000 - 802768a: d051 beq.n 8027730 - 802768c: f5b3 1f30 cmp.w r3, #2883584 ; 0x2c0000 - 8027690: d854 bhi.n 802773c - 8027692: f5b3 1f20 cmp.w r3, #2621440 ; 0x280000 - 8027696: d047 beq.n 8027728 - 8027698: f5b3 1f20 cmp.w r3, #2621440 ; 0x280000 - 802769c: d84e bhi.n 802773c - 802769e: f5b3 1f10 cmp.w r3, #2359296 ; 0x240000 - 80276a2: d03d beq.n 8027720 - 80276a4: f5b3 1f10 cmp.w r3, #2359296 ; 0x240000 - 80276a8: d848 bhi.n 802773c - 80276aa: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 80276ae: d033 beq.n 8027718 - 80276b0: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 80276b4: d842 bhi.n 802773c - 80276b6: f5b3 1fe0 cmp.w r3, #1835008 ; 0x1c0000 - 80276ba: d029 beq.n 8027710 - 80276bc: f5b3 1fe0 cmp.w r3, #1835008 ; 0x1c0000 - 80276c0: d83c bhi.n 802773c - 80276c2: f5b3 1fc0 cmp.w r3, #1572864 ; 0x180000 - 80276c6: d01a beq.n 80276fe - 80276c8: f5b3 1fc0 cmp.w r3, #1572864 ; 0x180000 - 80276cc: d836 bhi.n 802773c - 80276ce: f5b3 1fa0 cmp.w r3, #1310720 ; 0x140000 - 80276d2: d014 beq.n 80276fe - 80276d4: f5b3 1fa0 cmp.w r3, #1310720 ; 0x140000 - 80276d8: d830 bhi.n 802773c - 80276da: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 80276de: d00e beq.n 80276fe - 80276e0: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 80276e4: d82a bhi.n 802773c - 80276e6: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000 - 80276ea: d008 beq.n 80276fe - 80276ec: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000 - 80276f0: d824 bhi.n 802773c - 80276f2: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 - 80276f6: d002 beq.n 80276fe - 80276f8: f5b3 2f00 cmp.w r3, #524288 ; 0x80000 - 80276fc: d11e bne.n 802773c + 8027706: 687b ldr r3, [r7, #4] + 8027708: 685b ldr r3, [r3, #4] + 802770a: f5b3 1f30 cmp.w r3, #2883584 ; 0x2c0000 + 802770e: d051 beq.n 80277b4 + 8027710: f5b3 1f30 cmp.w r3, #2883584 ; 0x2c0000 + 8027714: d854 bhi.n 80277c0 + 8027716: f5b3 1f20 cmp.w r3, #2621440 ; 0x280000 + 802771a: d047 beq.n 80277ac + 802771c: f5b3 1f20 cmp.w r3, #2621440 ; 0x280000 + 8027720: d84e bhi.n 80277c0 + 8027722: f5b3 1f10 cmp.w r3, #2359296 ; 0x240000 + 8027726: d03d beq.n 80277a4 + 8027728: f5b3 1f10 cmp.w r3, #2359296 ; 0x240000 + 802772c: d848 bhi.n 80277c0 + 802772e: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 8027732: d033 beq.n 802779c + 8027734: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 8027738: d842 bhi.n 80277c0 + 802773a: f5b3 1fe0 cmp.w r3, #1835008 ; 0x1c0000 + 802773e: d029 beq.n 8027794 + 8027740: f5b3 1fe0 cmp.w r3, #1835008 ; 0x1c0000 + 8027744: d83c bhi.n 80277c0 + 8027746: f5b3 1fc0 cmp.w r3, #1572864 ; 0x180000 + 802774a: d01a beq.n 8027782 + 802774c: f5b3 1fc0 cmp.w r3, #1572864 ; 0x180000 + 8027750: d836 bhi.n 80277c0 + 8027752: f5b3 1fa0 cmp.w r3, #1310720 ; 0x140000 + 8027756: d014 beq.n 8027782 + 8027758: f5b3 1fa0 cmp.w r3, #1310720 ; 0x140000 + 802775c: d830 bhi.n 80277c0 + 802775e: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8027762: d00e beq.n 8027782 + 8027764: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8027768: d82a bhi.n 80277c0 + 802776a: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000 + 802776e: d008 beq.n 8027782 + 8027770: f5b3 2f40 cmp.w r3, #786432 ; 0xc0000 + 8027774: d824 bhi.n 80277c0 + 8027776: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 + 802777a: d002 beq.n 8027782 + 802777c: f5b3 2f00 cmp.w r3, #524288 ; 0x80000 + 8027780: d11e bne.n 80277c0 case ADC_CLOCK_ASYNC_DIV4: case ADC_CLOCK_ASYNC_DIV6: case ADC_CLOCK_ASYNC_DIV8: case ADC_CLOCK_ASYNC_DIV10: case ADC_CLOCK_ASYNC_DIV12: freq /= ((hadc->Init.ClockPrescaler >> ADC_CCR_PRESC_Pos) << 1UL); - 80276fe: 687b ldr r3, [r7, #4] - 8027700: 685b ldr r3, [r3, #4] - 8027702: 0c9b lsrs r3, r3, #18 - 8027704: 005b lsls r3, r3, #1 - 8027706: 68fa ldr r2, [r7, #12] - 8027708: fbb2 f3f3 udiv r3, r2, r3 - 802770c: 60fb str r3, [r7, #12] + 8027782: 687b ldr r3, [r7, #4] + 8027784: 685b ldr r3, [r3, #4] + 8027786: 0c9b lsrs r3, r3, #18 + 8027788: 005b lsls r3, r3, #1 + 802778a: 68fa ldr r2, [r7, #12] + 802778c: fbb2 f3f3 udiv r3, r2, r3 + 8027790: 60fb str r3, [r7, #12] break; - 802770e: e016 b.n 802773e + 8027792: e016 b.n 80277c2 case ADC_CLOCK_ASYNC_DIV16: freq /= 16UL; - 8027710: 68fb ldr r3, [r7, #12] - 8027712: 091b lsrs r3, r3, #4 - 8027714: 60fb str r3, [r7, #12] + 8027794: 68fb ldr r3, [r7, #12] + 8027796: 091b lsrs r3, r3, #4 + 8027798: 60fb str r3, [r7, #12] break; - 8027716: e012 b.n 802773e + 802779a: e012 b.n 80277c2 case ADC_CLOCK_ASYNC_DIV32: freq /= 32UL; - 8027718: 68fb ldr r3, [r7, #12] - 802771a: 095b lsrs r3, r3, #5 - 802771c: 60fb str r3, [r7, #12] + 802779c: 68fb ldr r3, [r7, #12] + 802779e: 095b lsrs r3, r3, #5 + 80277a0: 60fb str r3, [r7, #12] break; - 802771e: e00e b.n 802773e + 80277a2: e00e b.n 80277c2 case ADC_CLOCK_ASYNC_DIV64: freq /= 64UL; - 8027720: 68fb ldr r3, [r7, #12] - 8027722: 099b lsrs r3, r3, #6 - 8027724: 60fb str r3, [r7, #12] + 80277a4: 68fb ldr r3, [r7, #12] + 80277a6: 099b lsrs r3, r3, #6 + 80277a8: 60fb str r3, [r7, #12] break; - 8027726: e00a b.n 802773e + 80277aa: e00a b.n 80277c2 case ADC_CLOCK_ASYNC_DIV128: freq /= 128UL; - 8027728: 68fb ldr r3, [r7, #12] - 802772a: 09db lsrs r3, r3, #7 - 802772c: 60fb str r3, [r7, #12] + 80277ac: 68fb ldr r3, [r7, #12] + 80277ae: 09db lsrs r3, r3, #7 + 80277b0: 60fb str r3, [r7, #12] break; - 802772e: e006 b.n 802773e + 80277b2: e006 b.n 80277c2 case ADC_CLOCK_ASYNC_DIV256: freq /= 256UL; - 8027730: 68fb ldr r3, [r7, #12] - 8027732: 0a1b lsrs r3, r3, #8 - 8027734: 60fb str r3, [r7, #12] + 80277b4: 68fb ldr r3, [r7, #12] + 80277b6: 0a1b lsrs r3, r3, #8 + 80277b8: 60fb str r3, [r7, #12] break; - 8027736: e002 b.n 802773e + 80277ba: e002 b.n 80277c2 break; - 8027738: bf00 nop - 802773a: e000 b.n 802773e + 80277bc: bf00 nop + 80277be: e000 b.n 80277c2 default: break; - 802773c: bf00 nop + 80277c0: bf00 nop else /* if(freq > 25000000UL) */ { MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0); } #else if (HAL_GetREVID() <= REV_ID_Y) /* STM32H7 silicon Rev.Y */ - 802773e: f7fe fc71 bl 8026024 - 8027742: 4603 mov r3, r0 - 8027744: f241 0203 movw r2, #4099 ; 0x1003 - 8027748: 4293 cmp r3, r2 - 802774a: d815 bhi.n 8027778 + 80277c2: f7fe fc71 bl 80260a8 + 80277c6: 4603 mov r3, r0 + 80277c8: f241 0203 movw r2, #4099 ; 0x1003 + 80277cc: 4293 cmp r3, r2 + 80277ce: d815 bhi.n 80277fc { if (freq > 20000000UL) - 802774c: 68fb ldr r3, [r7, #12] - 802774e: 4a2b ldr r2, [pc, #172] ; (80277fc ) - 8027750: 4293 cmp r3, r2 - 8027752: d908 bls.n 8027766 + 80277d0: 68fb ldr r3, [r7, #12] + 80277d2: 4a2b ldr r2, [pc, #172] ; (8027880 ) + 80277d4: 4293 cmp r3, r2 + 80277d6: d908 bls.n 80277ea { SET_BIT(hadc->Instance->CR, ADC_CR_BOOST_0); - 8027754: 687b ldr r3, [r7, #4] - 8027756: 681b ldr r3, [r3, #0] - 8027758: 689a ldr r2, [r3, #8] - 802775a: 687b ldr r3, [r7, #4] - 802775c: 681b ldr r3, [r3, #0] - 802775e: f442 7280 orr.w r2, r2, #256 ; 0x100 - 8027762: 609a str r2, [r3, #8] + 80277d8: 687b ldr r3, [r7, #4] + 80277da: 681b ldr r3, [r3, #0] + 80277dc: 689a ldr r2, [r3, #8] + 80277de: 687b ldr r3, [r7, #4] + 80277e0: 681b ldr r3, [r3, #0] + 80277e2: f442 7280 orr.w r2, r2, #256 ; 0x100 + 80277e6: 609a str r2, [r3, #8] { MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0); } } #endif /* ADC_VER_V5_3 */ } - 8027764: e03e b.n 80277e4 + 80277e8: e03e b.n 8027868 CLEAR_BIT(hadc->Instance->CR, ADC_CR_BOOST_0); - 8027766: 687b ldr r3, [r7, #4] - 8027768: 681b ldr r3, [r3, #0] - 802776a: 689a ldr r2, [r3, #8] - 802776c: 687b ldr r3, [r7, #4] - 802776e: 681b ldr r3, [r3, #0] - 8027770: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8027774: 609a str r2, [r3, #8] -} - 8027776: e035 b.n 80277e4 + 80277ea: 687b ldr r3, [r7, #4] + 80277ec: 681b ldr r3, [r3, #0] + 80277ee: 689a ldr r2, [r3, #8] + 80277f0: 687b ldr r3, [r7, #4] + 80277f2: 681b ldr r3, [r3, #0] + 80277f4: f422 7280 bic.w r2, r2, #256 ; 0x100 + 80277f8: 609a str r2, [r3, #8] +} + 80277fa: e035 b.n 8027868 freq /= 2U; /* divider by 2 for Rev.V */ - 8027778: 68fb ldr r3, [r7, #12] - 802777a: 085b lsrs r3, r3, #1 - 802777c: 60fb str r3, [r7, #12] + 80277fc: 68fb ldr r3, [r7, #12] + 80277fe: 085b lsrs r3, r3, #1 + 8027800: 60fb str r3, [r7, #12] if (freq <= 6250000UL) - 802777e: 68fb ldr r3, [r7, #12] - 8027780: 4a1f ldr r2, [pc, #124] ; (8027800 ) - 8027782: 4293 cmp r3, r2 - 8027784: d808 bhi.n 8027798 + 8027802: 68fb ldr r3, [r7, #12] + 8027804: 4a1f ldr r2, [pc, #124] ; (8027884 ) + 8027806: 4293 cmp r3, r2 + 8027808: d808 bhi.n 802781c MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, 0UL); - 8027786: 687b ldr r3, [r7, #4] - 8027788: 681b ldr r3, [r3, #0] - 802778a: 689a ldr r2, [r3, #8] - 802778c: 687b ldr r3, [r7, #4] - 802778e: 681b ldr r3, [r3, #0] - 8027790: f422 7240 bic.w r2, r2, #768 ; 0x300 - 8027794: 609a str r2, [r3, #8] -} - 8027796: e025 b.n 80277e4 + 802780a: 687b ldr r3, [r7, #4] + 802780c: 681b ldr r3, [r3, #0] + 802780e: 689a ldr r2, [r3, #8] + 8027810: 687b ldr r3, [r7, #4] + 8027812: 681b ldr r3, [r3, #0] + 8027814: f422 7240 bic.w r2, r2, #768 ; 0x300 + 8027818: 609a str r2, [r3, #8] +} + 802781a: e025 b.n 8027868 else if (freq <= 12500000UL) - 8027798: 68fb ldr r3, [r7, #12] - 802779a: 4a1a ldr r2, [pc, #104] ; (8027804 ) - 802779c: 4293 cmp r3, r2 - 802779e: d80a bhi.n 80277b6 + 802781c: 68fb ldr r3, [r7, #12] + 802781e: 4a1a ldr r2, [pc, #104] ; (8027888 ) + 8027820: 4293 cmp r3, r2 + 8027822: d80a bhi.n 802783a MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_0); - 80277a0: 687b ldr r3, [r7, #4] - 80277a2: 681b ldr r3, [r3, #0] - 80277a4: 689b ldr r3, [r3, #8] - 80277a6: f423 7240 bic.w r2, r3, #768 ; 0x300 - 80277aa: 687b ldr r3, [r7, #4] - 80277ac: 681b ldr r3, [r3, #0] - 80277ae: f442 7280 orr.w r2, r2, #256 ; 0x100 - 80277b2: 609a str r2, [r3, #8] -} - 80277b4: e016 b.n 80277e4 + 8027824: 687b ldr r3, [r7, #4] + 8027826: 681b ldr r3, [r3, #0] + 8027828: 689b ldr r3, [r3, #8] + 802782a: f423 7240 bic.w r2, r3, #768 ; 0x300 + 802782e: 687b ldr r3, [r7, #4] + 8027830: 681b ldr r3, [r3, #0] + 8027832: f442 7280 orr.w r2, r2, #256 ; 0x100 + 8027836: 609a str r2, [r3, #8] +} + 8027838: e016 b.n 8027868 else if (freq <= 25000000UL) - 80277b6: 68fb ldr r3, [r7, #12] - 80277b8: 4a13 ldr r2, [pc, #76] ; (8027808 ) - 80277ba: 4293 cmp r3, r2 - 80277bc: d80a bhi.n 80277d4 + 802783a: 68fb ldr r3, [r7, #12] + 802783c: 4a13 ldr r2, [pc, #76] ; (802788c ) + 802783e: 4293 cmp r3, r2 + 8027840: d80a bhi.n 8027858 MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1); - 80277be: 687b ldr r3, [r7, #4] - 80277c0: 681b ldr r3, [r3, #0] - 80277c2: 689b ldr r3, [r3, #8] - 80277c4: f423 7240 bic.w r2, r3, #768 ; 0x300 - 80277c8: 687b ldr r3, [r7, #4] - 80277ca: 681b ldr r3, [r3, #0] - 80277cc: f442 7200 orr.w r2, r2, #512 ; 0x200 - 80277d0: 609a str r2, [r3, #8] -} - 80277d2: e007 b.n 80277e4 + 8027842: 687b ldr r3, [r7, #4] + 8027844: 681b ldr r3, [r3, #0] + 8027846: 689b ldr r3, [r3, #8] + 8027848: f423 7240 bic.w r2, r3, #768 ; 0x300 + 802784c: 687b ldr r3, [r7, #4] + 802784e: 681b ldr r3, [r3, #0] + 8027850: f442 7200 orr.w r2, r2, #512 ; 0x200 + 8027854: 609a str r2, [r3, #8] +} + 8027856: e007 b.n 8027868 MODIFY_REG(hadc->Instance->CR, ADC_CR_BOOST, ADC_CR_BOOST_1 | ADC_CR_BOOST_0); - 80277d4: 687b ldr r3, [r7, #4] - 80277d6: 681b ldr r3, [r3, #0] - 80277d8: 689a ldr r2, [r3, #8] - 80277da: 687b ldr r3, [r7, #4] - 80277dc: 681b ldr r3, [r3, #0] - 80277de: f442 7240 orr.w r2, r2, #768 ; 0x300 - 80277e2: 609a str r2, [r3, #8] -} - 80277e4: bf00 nop - 80277e6: 3710 adds r7, #16 - 80277e8: 46bd mov sp, r7 - 80277ea: bd80 pop {r7, pc} - 80277ec: 40022000 .word 0x40022000 - 80277f0: 40022100 .word 0x40022100 - 80277f4: 40022300 .word 0x40022300 - 80277f8: 58026300 .word 0x58026300 - 80277fc: 01312d00 .word 0x01312d00 - 8027800: 005f5e10 .word 0x005f5e10 - 8027804: 00bebc20 .word 0x00bebc20 - 8027808: 017d7840 .word 0x017d7840 - -0802780c <__NVIC_SetPriorityGrouping>: -{ - 802780c: b480 push {r7} - 802780e: b085 sub sp, #20 - 8027810: af00 add r7, sp, #0 - 8027812: 6078 str r0, [r7, #4] + 8027858: 687b ldr r3, [r7, #4] + 802785a: 681b ldr r3, [r3, #0] + 802785c: 689a ldr r2, [r3, #8] + 802785e: 687b ldr r3, [r7, #4] + 8027860: 681b ldr r3, [r3, #0] + 8027862: f442 7240 orr.w r2, r2, #768 ; 0x300 + 8027866: 609a str r2, [r3, #8] +} + 8027868: bf00 nop + 802786a: 3710 adds r7, #16 + 802786c: 46bd mov sp, r7 + 802786e: bd80 pop {r7, pc} + 8027870: 40022000 .word 0x40022000 + 8027874: 40022100 .word 0x40022100 + 8027878: 40022300 .word 0x40022300 + 802787c: 58026300 .word 0x58026300 + 8027880: 01312d00 .word 0x01312d00 + 8027884: 005f5e10 .word 0x005f5e10 + 8027888: 00bebc20 .word 0x00bebc20 + 802788c: 017d7840 .word 0x017d7840 + +08027890 <__NVIC_SetPriorityGrouping>: +{ + 8027890: b480 push {r7} + 8027892: b085 sub sp, #20 + 8027894: af00 add r7, sp, #0 + 8027896: 6078 str r0, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8027814: 687b ldr r3, [r7, #4] - 8027816: f003 0307 and.w r3, r3, #7 - 802781a: 60fb str r3, [r7, #12] + 8027898: 687b ldr r3, [r7, #4] + 802789a: f003 0307 and.w r3, r3, #7 + 802789e: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 802781c: 4b0b ldr r3, [pc, #44] ; (802784c <__NVIC_SetPriorityGrouping+0x40>) - 802781e: 68db ldr r3, [r3, #12] - 8027820: 60bb str r3, [r7, #8] + 80278a0: 4b0b ldr r3, [pc, #44] ; (80278d0 <__NVIC_SetPriorityGrouping+0x40>) + 80278a2: 68db ldr r3, [r3, #12] + 80278a4: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 8027822: 68ba ldr r2, [r7, #8] - 8027824: f64f 03ff movw r3, #63743 ; 0xf8ff - 8027828: 4013 ands r3, r2 - 802782a: 60bb str r3, [r7, #8] + 80278a6: 68ba ldr r2, [r7, #8] + 80278a8: f64f 03ff movw r3, #63743 ; 0xf8ff + 80278ac: 4013 ands r3, r2 + 80278ae: 60bb str r3, [r7, #8] (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 802782c: 68fb ldr r3, [r7, #12] - 802782e: 021a lsls r2, r3, #8 + 80278b0: 68fb ldr r3, [r7, #12] + 80278b2: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8027830: 68bb ldr r3, [r7, #8] - 8027832: 431a orrs r2, r3 + 80278b4: 68bb ldr r3, [r7, #8] + 80278b6: 431a orrs r2, r3 reg_value = (reg_value | - 8027834: 4b06 ldr r3, [pc, #24] ; (8027850 <__NVIC_SetPriorityGrouping+0x44>) - 8027836: 4313 orrs r3, r2 - 8027838: 60bb str r3, [r7, #8] + 80278b8: 4b06 ldr r3, [pc, #24] ; (80278d4 <__NVIC_SetPriorityGrouping+0x44>) + 80278ba: 4313 orrs r3, r2 + 80278bc: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 802783a: 4a04 ldr r2, [pc, #16] ; (802784c <__NVIC_SetPriorityGrouping+0x40>) - 802783c: 68bb ldr r3, [r7, #8] - 802783e: 60d3 str r3, [r2, #12] -} - 8027840: bf00 nop - 8027842: 3714 adds r7, #20 - 8027844: 46bd mov sp, r7 - 8027846: f85d 7b04 ldr.w r7, [sp], #4 - 802784a: 4770 bx lr - 802784c: e000ed00 .word 0xe000ed00 - 8027850: 05fa0000 .word 0x05fa0000 - -08027854 <__NVIC_GetPriorityGrouping>: -{ - 8027854: b480 push {r7} - 8027856: af00 add r7, sp, #0 + 80278be: 4a04 ldr r2, [pc, #16] ; (80278d0 <__NVIC_SetPriorityGrouping+0x40>) + 80278c0: 68bb ldr r3, [r7, #8] + 80278c2: 60d3 str r3, [r2, #12] +} + 80278c4: bf00 nop + 80278c6: 3714 adds r7, #20 + 80278c8: 46bd mov sp, r7 + 80278ca: f85d 7b04 ldr.w r7, [sp], #4 + 80278ce: 4770 bx lr + 80278d0: e000ed00 .word 0xe000ed00 + 80278d4: 05fa0000 .word 0x05fa0000 + +080278d8 <__NVIC_GetPriorityGrouping>: +{ + 80278d8: b480 push {r7} + 80278da: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8027858: 4b04 ldr r3, [pc, #16] ; (802786c <__NVIC_GetPriorityGrouping+0x18>) - 802785a: 68db ldr r3, [r3, #12] - 802785c: 0a1b lsrs r3, r3, #8 - 802785e: f003 0307 and.w r3, r3, #7 -} - 8027862: 4618 mov r0, r3 - 8027864: 46bd mov sp, r7 - 8027866: f85d 7b04 ldr.w r7, [sp], #4 - 802786a: 4770 bx lr - 802786c: e000ed00 .word 0xe000ed00 - -08027870 <__NVIC_EnableIRQ>: -{ - 8027870: b480 push {r7} - 8027872: b083 sub sp, #12 - 8027874: af00 add r7, sp, #0 - 8027876: 4603 mov r3, r0 - 8027878: 80fb strh r3, [r7, #6] + 80278dc: 4b04 ldr r3, [pc, #16] ; (80278f0 <__NVIC_GetPriorityGrouping+0x18>) + 80278de: 68db ldr r3, [r3, #12] + 80278e0: 0a1b lsrs r3, r3, #8 + 80278e2: f003 0307 and.w r3, r3, #7 +} + 80278e6: 4618 mov r0, r3 + 80278e8: 46bd mov sp, r7 + 80278ea: f85d 7b04 ldr.w r7, [sp], #4 + 80278ee: 4770 bx lr + 80278f0: e000ed00 .word 0xe000ed00 + +080278f4 <__NVIC_EnableIRQ>: +{ + 80278f4: b480 push {r7} + 80278f6: b083 sub sp, #12 + 80278f8: af00 add r7, sp, #0 + 80278fa: 4603 mov r3, r0 + 80278fc: 80fb strh r3, [r7, #6] if ((int32_t)(IRQn) >= 0) - 802787a: f9b7 3006 ldrsh.w r3, [r7, #6] - 802787e: 2b00 cmp r3, #0 - 8027880: db0b blt.n 802789a <__NVIC_EnableIRQ+0x2a> + 80278fe: f9b7 3006 ldrsh.w r3, [r7, #6] + 8027902: 2b00 cmp r3, #0 + 8027904: db0b blt.n 802791e <__NVIC_EnableIRQ+0x2a> NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8027882: 88fb ldrh r3, [r7, #6] - 8027884: f003 021f and.w r2, r3, #31 - 8027888: 4907 ldr r1, [pc, #28] ; (80278a8 <__NVIC_EnableIRQ+0x38>) - 802788a: f9b7 3006 ldrsh.w r3, [r7, #6] - 802788e: 095b lsrs r3, r3, #5 - 8027890: 2001 movs r0, #1 - 8027892: fa00 f202 lsl.w r2, r0, r2 - 8027896: f841 2023 str.w r2, [r1, r3, lsl #2] -} - 802789a: bf00 nop - 802789c: 370c adds r7, #12 - 802789e: 46bd mov sp, r7 - 80278a0: f85d 7b04 ldr.w r7, [sp], #4 - 80278a4: 4770 bx lr - 80278a6: bf00 nop - 80278a8: e000e100 .word 0xe000e100 - -080278ac <__NVIC_SetPriority>: -{ - 80278ac: b480 push {r7} - 80278ae: b083 sub sp, #12 - 80278b0: af00 add r7, sp, #0 - 80278b2: 4603 mov r3, r0 - 80278b4: 6039 str r1, [r7, #0] - 80278b6: 80fb strh r3, [r7, #6] + 8027906: 88fb ldrh r3, [r7, #6] + 8027908: f003 021f and.w r2, r3, #31 + 802790c: 4907 ldr r1, [pc, #28] ; (802792c <__NVIC_EnableIRQ+0x38>) + 802790e: f9b7 3006 ldrsh.w r3, [r7, #6] + 8027912: 095b lsrs r3, r3, #5 + 8027914: 2001 movs r0, #1 + 8027916: fa00 f202 lsl.w r2, r0, r2 + 802791a: f841 2023 str.w r2, [r1, r3, lsl #2] +} + 802791e: bf00 nop + 8027920: 370c adds r7, #12 + 8027922: 46bd mov sp, r7 + 8027924: f85d 7b04 ldr.w r7, [sp], #4 + 8027928: 4770 bx lr + 802792a: bf00 nop + 802792c: e000e100 .word 0xe000e100 + +08027930 <__NVIC_SetPriority>: +{ + 8027930: b480 push {r7} + 8027932: b083 sub sp, #12 + 8027934: af00 add r7, sp, #0 + 8027936: 4603 mov r3, r0 + 8027938: 6039 str r1, [r7, #0] + 802793a: 80fb strh r3, [r7, #6] if ((int32_t)(IRQn) >= 0) - 80278b8: f9b7 3006 ldrsh.w r3, [r7, #6] - 80278bc: 2b00 cmp r3, #0 - 80278be: db0a blt.n 80278d6 <__NVIC_SetPriority+0x2a> + 802793c: f9b7 3006 ldrsh.w r3, [r7, #6] + 8027940: 2b00 cmp r3, #0 + 8027942: db0a blt.n 802795a <__NVIC_SetPriority+0x2a> NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 80278c0: 683b ldr r3, [r7, #0] - 80278c2: b2da uxtb r2, r3 - 80278c4: 490c ldr r1, [pc, #48] ; (80278f8 <__NVIC_SetPriority+0x4c>) - 80278c6: f9b7 3006 ldrsh.w r3, [r7, #6] - 80278ca: 0112 lsls r2, r2, #4 - 80278cc: b2d2 uxtb r2, r2 - 80278ce: 440b add r3, r1 - 80278d0: f883 2300 strb.w r2, [r3, #768] ; 0x300 -} - 80278d4: e00a b.n 80278ec <__NVIC_SetPriority+0x40> + 8027944: 683b ldr r3, [r7, #0] + 8027946: b2da uxtb r2, r3 + 8027948: 490c ldr r1, [pc, #48] ; (802797c <__NVIC_SetPriority+0x4c>) + 802794a: f9b7 3006 ldrsh.w r3, [r7, #6] + 802794e: 0112 lsls r2, r2, #4 + 8027950: b2d2 uxtb r2, r2 + 8027952: 440b add r3, r1 + 8027954: f883 2300 strb.w r2, [r3, #768] ; 0x300 +} + 8027958: e00a b.n 8027970 <__NVIC_SetPriority+0x40> SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 80278d6: 683b ldr r3, [r7, #0] - 80278d8: b2da uxtb r2, r3 - 80278da: 4908 ldr r1, [pc, #32] ; (80278fc <__NVIC_SetPriority+0x50>) - 80278dc: 88fb ldrh r3, [r7, #6] - 80278de: f003 030f and.w r3, r3, #15 - 80278e2: 3b04 subs r3, #4 - 80278e4: 0112 lsls r2, r2, #4 - 80278e6: b2d2 uxtb r2, r2 - 80278e8: 440b add r3, r1 - 80278ea: 761a strb r2, [r3, #24] -} - 80278ec: bf00 nop - 80278ee: 370c adds r7, #12 - 80278f0: 46bd mov sp, r7 - 80278f2: f85d 7b04 ldr.w r7, [sp], #4 - 80278f6: 4770 bx lr - 80278f8: e000e100 .word 0xe000e100 - 80278fc: e000ed00 .word 0xe000ed00 - -08027900 : -{ - 8027900: b480 push {r7} - 8027902: b089 sub sp, #36 ; 0x24 - 8027904: af00 add r7, sp, #0 - 8027906: 60f8 str r0, [r7, #12] - 8027908: 60b9 str r1, [r7, #8] - 802790a: 607a str r2, [r7, #4] + 802795a: 683b ldr r3, [r7, #0] + 802795c: b2da uxtb r2, r3 + 802795e: 4908 ldr r1, [pc, #32] ; (8027980 <__NVIC_SetPriority+0x50>) + 8027960: 88fb ldrh r3, [r7, #6] + 8027962: f003 030f and.w r3, r3, #15 + 8027966: 3b04 subs r3, #4 + 8027968: 0112 lsls r2, r2, #4 + 802796a: b2d2 uxtb r2, r2 + 802796c: 440b add r3, r1 + 802796e: 761a strb r2, [r3, #24] +} + 8027970: bf00 nop + 8027972: 370c adds r7, #12 + 8027974: 46bd mov sp, r7 + 8027976: f85d 7b04 ldr.w r7, [sp], #4 + 802797a: 4770 bx lr + 802797c: e000e100 .word 0xe000e100 + 8027980: e000ed00 .word 0xe000ed00 + +08027984 : +{ + 8027984: b480 push {r7} + 8027986: b089 sub sp, #36 ; 0x24 + 8027988: af00 add r7, sp, #0 + 802798a: 60f8 str r0, [r7, #12] + 802798c: 60b9 str r1, [r7, #8] + 802798e: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 802790c: 68fb ldr r3, [r7, #12] - 802790e: f003 0307 and.w r3, r3, #7 - 8027912: 61fb str r3, [r7, #28] + 8027990: 68fb ldr r3, [r7, #12] + 8027992: f003 0307 and.w r3, r3, #7 + 8027996: 61fb str r3, [r7, #28] PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8027914: 69fb ldr r3, [r7, #28] - 8027916: f1c3 0307 rsb r3, r3, #7 - 802791a: 2b04 cmp r3, #4 - 802791c: bf28 it cs - 802791e: 2304 movcs r3, #4 - 8027920: 61bb str r3, [r7, #24] + 8027998: 69fb ldr r3, [r7, #28] + 802799a: f1c3 0307 rsb r3, r3, #7 + 802799e: 2b04 cmp r3, #4 + 80279a0: bf28 it cs + 80279a2: 2304 movcs r3, #4 + 80279a4: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8027922: 69fb ldr r3, [r7, #28] - 8027924: 3304 adds r3, #4 - 8027926: 2b06 cmp r3, #6 - 8027928: d902 bls.n 8027930 - 802792a: 69fb ldr r3, [r7, #28] - 802792c: 3b03 subs r3, #3 - 802792e: e000 b.n 8027932 - 8027930: 2300 movs r3, #0 - 8027932: 617b str r3, [r7, #20] + 80279a6: 69fb ldr r3, [r7, #28] + 80279a8: 3304 adds r3, #4 + 80279aa: 2b06 cmp r3, #6 + 80279ac: d902 bls.n 80279b4 + 80279ae: 69fb ldr r3, [r7, #28] + 80279b0: 3b03 subs r3, #3 + 80279b2: e000 b.n 80279b6 + 80279b4: 2300 movs r3, #0 + 80279b6: 617b str r3, [r7, #20] ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8027934: f04f 32ff mov.w r2, #4294967295 - 8027938: 69bb ldr r3, [r7, #24] - 802793a: fa02 f303 lsl.w r3, r2, r3 - 802793e: 43da mvns r2, r3 - 8027940: 68bb ldr r3, [r7, #8] - 8027942: 401a ands r2, r3 - 8027944: 697b ldr r3, [r7, #20] - 8027946: 409a lsls r2, r3 + 80279b8: f04f 32ff mov.w r2, #4294967295 + 80279bc: 69bb ldr r3, [r7, #24] + 80279be: fa02 f303 lsl.w r3, r2, r3 + 80279c2: 43da mvns r2, r3 + 80279c4: 68bb ldr r3, [r7, #8] + 80279c6: 401a ands r2, r3 + 80279c8: 697b ldr r3, [r7, #20] + 80279ca: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8027948: f04f 31ff mov.w r1, #4294967295 - 802794c: 697b ldr r3, [r7, #20] - 802794e: fa01 f303 lsl.w r3, r1, r3 - 8027952: 43d9 mvns r1, r3 - 8027954: 687b ldr r3, [r7, #4] - 8027956: 400b ands r3, r1 + 80279cc: f04f 31ff mov.w r1, #4294967295 + 80279d0: 697b ldr r3, [r7, #20] + 80279d2: fa01 f303 lsl.w r3, r1, r3 + 80279d6: 43d9 mvns r1, r3 + 80279d8: 687b ldr r3, [r7, #4] + 80279da: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8027958: 4313 orrs r3, r2 + 80279dc: 4313 orrs r3, r2 } - 802795a: 4618 mov r0, r3 - 802795c: 3724 adds r7, #36 ; 0x24 - 802795e: 46bd mov sp, r7 - 8027960: f85d 7b04 ldr.w r7, [sp], #4 - 8027964: 4770 bx lr + 80279de: 4618 mov r0, r3 + 80279e0: 3724 adds r7, #36 ; 0x24 + 80279e2: 46bd mov sp, r7 + 80279e4: f85d 7b04 ldr.w r7, [sp], #4 + 80279e8: 4770 bx lr ... -08027968 : +080279ec : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8027968: b580 push {r7, lr} - 802796a: b082 sub sp, #8 - 802796c: af00 add r7, sp, #0 - 802796e: 6078 str r0, [r7, #4] + 80279ec: b580 push {r7, lr} + 80279ee: b082 sub sp, #8 + 80279f0: af00 add r7, sp, #0 + 80279f2: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8027970: 687b ldr r3, [r7, #4] - 8027972: 3b01 subs r3, #1 - 8027974: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 8027978: d301 bcc.n 802797e + 80279f4: 687b ldr r3, [r7, #4] + 80279f6: 3b01 subs r3, #1 + 80279f8: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 80279fc: d301 bcc.n 8027a02 { return (1UL); /* Reload value impossible */ - 802797a: 2301 movs r3, #1 - 802797c: e00f b.n 802799e + 80279fe: 2301 movs r3, #1 + 8027a00: e00f b.n 8027a22 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 802797e: 4a0a ldr r2, [pc, #40] ; (80279a8 ) - 8027980: 687b ldr r3, [r7, #4] - 8027982: 3b01 subs r3, #1 - 8027984: 6053 str r3, [r2, #4] + 8027a02: 4a0a ldr r2, [pc, #40] ; (8027a2c ) + 8027a04: 687b ldr r3, [r7, #4] + 8027a06: 3b01 subs r3, #1 + 8027a08: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8027986: 210f movs r1, #15 - 8027988: f04f 30ff mov.w r0, #4294967295 - 802798c: f7ff ff8e bl 80278ac <__NVIC_SetPriority> + 8027a0a: 210f movs r1, #15 + 8027a0c: f04f 30ff mov.w r0, #4294967295 + 8027a10: f7ff ff8e bl 8027930 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8027990: 4b05 ldr r3, [pc, #20] ; (80279a8 ) - 8027992: 2200 movs r2, #0 - 8027994: 609a str r2, [r3, #8] + 8027a14: 4b05 ldr r3, [pc, #20] ; (8027a2c ) + 8027a16: 2200 movs r2, #0 + 8027a18: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8027996: 4b04 ldr r3, [pc, #16] ; (80279a8 ) - 8027998: 2207 movs r2, #7 - 802799a: 601a str r2, [r3, #0] + 8027a1a: 4b04 ldr r3, [pc, #16] ; (8027a2c ) + 8027a1c: 2207 movs r2, #7 + 8027a1e: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 802799c: 2300 movs r3, #0 + 8027a20: 2300 movs r3, #0 } - 802799e: 4618 mov r0, r3 - 80279a0: 3708 adds r7, #8 - 80279a2: 46bd mov sp, r7 - 80279a4: bd80 pop {r7, pc} - 80279a6: bf00 nop - 80279a8: e000e010 .word 0xe000e010 + 8027a22: 4618 mov r0, r3 + 8027a24: 3708 adds r7, #8 + 8027a26: 46bd mov sp, r7 + 8027a28: bd80 pop {r7, pc} + 8027a2a: bf00 nop + 8027a2c: e000e010 .word 0xe000e010 -080279ac : +08027a30 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 80279ac: b580 push {r7, lr} - 80279ae: b082 sub sp, #8 - 80279b0: af00 add r7, sp, #0 - 80279b2: 6078 str r0, [r7, #4] + 8027a30: b580 push {r7, lr} + 8027a32: b082 sub sp, #8 + 8027a34: af00 add r7, sp, #0 + 8027a36: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 80279b4: 6878 ldr r0, [r7, #4] - 80279b6: f7ff ff29 bl 802780c <__NVIC_SetPriorityGrouping> + 8027a38: 6878 ldr r0, [r7, #4] + 8027a3a: f7ff ff29 bl 8027890 <__NVIC_SetPriorityGrouping> } - 80279ba: bf00 nop - 80279bc: 3708 adds r7, #8 - 80279be: 46bd mov sp, r7 - 80279c0: bd80 pop {r7, pc} + 8027a3e: bf00 nop + 8027a40: 3708 adds r7, #8 + 8027a42: 46bd mov sp, r7 + 8027a44: bd80 pop {r7, pc} -080279c2 : +08027a46 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 80279c2: b580 push {r7, lr} - 80279c4: b086 sub sp, #24 - 80279c6: af00 add r7, sp, #0 - 80279c8: 4603 mov r3, r0 - 80279ca: 60b9 str r1, [r7, #8] - 80279cc: 607a str r2, [r7, #4] - 80279ce: 81fb strh r3, [r7, #14] + 8027a46: b580 push {r7, lr} + 8027a48: b086 sub sp, #24 + 8027a4a: af00 add r7, sp, #0 + 8027a4c: 4603 mov r3, r0 + 8027a4e: 60b9 str r1, [r7, #8] + 8027a50: 607a str r2, [r7, #4] + 8027a52: 81fb strh r3, [r7, #14] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 80279d0: f7ff ff40 bl 8027854 <__NVIC_GetPriorityGrouping> - 80279d4: 6178 str r0, [r7, #20] + 8027a54: f7ff ff40 bl 80278d8 <__NVIC_GetPriorityGrouping> + 8027a58: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 80279d6: 687a ldr r2, [r7, #4] - 80279d8: 68b9 ldr r1, [r7, #8] - 80279da: 6978 ldr r0, [r7, #20] - 80279dc: f7ff ff90 bl 8027900 - 80279e0: 4602 mov r2, r0 - 80279e2: f9b7 300e ldrsh.w r3, [r7, #14] - 80279e6: 4611 mov r1, r2 - 80279e8: 4618 mov r0, r3 - 80279ea: f7ff ff5f bl 80278ac <__NVIC_SetPriority> -} - 80279ee: bf00 nop - 80279f0: 3718 adds r7, #24 - 80279f2: 46bd mov sp, r7 - 80279f4: bd80 pop {r7, pc} - -080279f6 : + 8027a5a: 687a ldr r2, [r7, #4] + 8027a5c: 68b9 ldr r1, [r7, #8] + 8027a5e: 6978 ldr r0, [r7, #20] + 8027a60: f7ff ff90 bl 8027984 + 8027a64: 4602 mov r2, r0 + 8027a66: f9b7 300e ldrsh.w r3, [r7, #14] + 8027a6a: 4611 mov r1, r2 + 8027a6c: 4618 mov r0, r3 + 8027a6e: f7ff ff5f bl 8027930 <__NVIC_SetPriority> +} + 8027a72: bf00 nop + 8027a74: 3718 adds r7, #24 + 8027a76: 46bd mov sp, r7 + 8027a78: bd80 pop {r7, pc} + +08027a7a : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32h7xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 80279f6: b580 push {r7, lr} - 80279f8: b082 sub sp, #8 - 80279fa: af00 add r7, sp, #0 - 80279fc: 4603 mov r3, r0 - 80279fe: 80fb strh r3, [r7, #6] + 8027a7a: b580 push {r7, lr} + 8027a7c: b082 sub sp, #8 + 8027a7e: af00 add r7, sp, #0 + 8027a80: 4603 mov r3, r0 + 8027a82: 80fb strh r3, [r7, #6] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 8027a00: f9b7 3006 ldrsh.w r3, [r7, #6] - 8027a04: 4618 mov r0, r3 - 8027a06: f7ff ff33 bl 8027870 <__NVIC_EnableIRQ> + 8027a84: f9b7 3006 ldrsh.w r3, [r7, #6] + 8027a88: 4618 mov r0, r3 + 8027a8a: f7ff ff33 bl 80278f4 <__NVIC_EnableIRQ> } - 8027a0a: bf00 nop - 8027a0c: 3708 adds r7, #8 - 8027a0e: 46bd mov sp, r7 - 8027a10: bd80 pop {r7, pc} + 8027a8e: bf00 nop + 8027a90: 3708 adds r7, #8 + 8027a92: 46bd mov sp, r7 + 8027a94: bd80 pop {r7, pc} -08027a12 : +08027a96 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8027a12: b580 push {r7, lr} - 8027a14: b082 sub sp, #8 - 8027a16: af00 add r7, sp, #0 - 8027a18: 6078 str r0, [r7, #4] + 8027a96: b580 push {r7, lr} + 8027a98: b082 sub sp, #8 + 8027a9a: af00 add r7, sp, #0 + 8027a9c: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8027a1a: 6878 ldr r0, [r7, #4] - 8027a1c: f7ff ffa4 bl 8027968 - 8027a20: 4603 mov r3, r0 -} - 8027a22: 4618 mov r0, r3 - 8027a24: 3708 adds r7, #8 - 8027a26: 46bd mov sp, r7 - 8027a28: bd80 pop {r7, pc} + 8027a9e: 6878 ldr r0, [r7, #4] + 8027aa0: f7ff ffa4 bl 80279ec + 8027aa4: 4603 mov r3, r0 +} + 8027aa6: 4618 mov r0, r3 + 8027aa8: 3708 adds r7, #8 + 8027aaa: 46bd mov sp, r7 + 8027aac: bd80 pop {r7, pc} ... -08027a2c : +08027ab0 : /** * @brief Disables the MPU * @retval None */ void HAL_MPU_Disable(void) { - 8027a2c: b480 push {r7} - 8027a2e: af00 add r7, sp, #0 + 8027ab0: b480 push {r7} + 8027ab2: af00 add r7, sp, #0 __ASM volatile ("dmb 0xF":::"memory"); - 8027a30: f3bf 8f5f dmb sy + 8027ab4: f3bf 8f5f dmb sy } - 8027a34: bf00 nop + 8027ab8: bf00 nop /* Make sure outstanding transfers are done */ __DMB(); /* Disable fault exceptions */ SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; - 8027a36: 4b07 ldr r3, [pc, #28] ; (8027a54 ) - 8027a38: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027a3a: 4a06 ldr r2, [pc, #24] ; (8027a54 ) - 8027a3c: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 8027a40: 6253 str r3, [r2, #36] ; 0x24 + 8027aba: 4b07 ldr r3, [pc, #28] ; (8027ad8 ) + 8027abc: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027abe: 4a06 ldr r2, [pc, #24] ; (8027ad8 ) + 8027ac0: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 8027ac4: 6253 str r3, [r2, #36] ; 0x24 /* Disable the MPU and clear the control register*/ MPU->CTRL = 0; - 8027a42: 4b05 ldr r3, [pc, #20] ; (8027a58 ) - 8027a44: 2200 movs r2, #0 - 8027a46: 605a str r2, [r3, #4] -} - 8027a48: bf00 nop - 8027a4a: 46bd mov sp, r7 - 8027a4c: f85d 7b04 ldr.w r7, [sp], #4 - 8027a50: 4770 bx lr - 8027a52: bf00 nop - 8027a54: e000ed00 .word 0xe000ed00 - 8027a58: e000ed90 .word 0xe000ed90 - -08027a5c : + 8027ac6: 4b05 ldr r3, [pc, #20] ; (8027adc ) + 8027ac8: 2200 movs r2, #0 + 8027aca: 605a str r2, [r3, #4] +} + 8027acc: bf00 nop + 8027ace: 46bd mov sp, r7 + 8027ad0: f85d 7b04 ldr.w r7, [sp], #4 + 8027ad4: 4770 bx lr + 8027ad6: bf00 nop + 8027ad8: e000ed00 .word 0xe000ed00 + 8027adc: e000ed90 .word 0xe000ed90 + +08027ae0 : * @arg MPU_PRIVILEGED_DEFAULT * @arg MPU_HFNMI_PRIVDEF * @retval None */ void HAL_MPU_Enable(uint32_t MPU_Control) { - 8027a5c: b480 push {r7} - 8027a5e: b083 sub sp, #12 - 8027a60: af00 add r7, sp, #0 - 8027a62: 6078 str r0, [r7, #4] + 8027ae0: b480 push {r7} + 8027ae2: b083 sub sp, #12 + 8027ae4: af00 add r7, sp, #0 + 8027ae6: 6078 str r0, [r7, #4] /* Enable the MPU */ MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; - 8027a64: 4a0b ldr r2, [pc, #44] ; (8027a94 ) - 8027a66: 687b ldr r3, [r7, #4] - 8027a68: f043 0301 orr.w r3, r3, #1 - 8027a6c: 6053 str r3, [r2, #4] + 8027ae8: 4a0b ldr r2, [pc, #44] ; (8027b18 ) + 8027aea: 687b ldr r3, [r7, #4] + 8027aec: f043 0301 orr.w r3, r3, #1 + 8027af0: 6053 str r3, [r2, #4] /* Enable fault exceptions */ SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; - 8027a6e: 4b0a ldr r3, [pc, #40] ; (8027a98 ) - 8027a70: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027a72: 4a09 ldr r2, [pc, #36] ; (8027a98 ) - 8027a74: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8027a78: 6253 str r3, [r2, #36] ; 0x24 + 8027af2: 4b0a ldr r3, [pc, #40] ; (8027b1c ) + 8027af4: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027af6: 4a09 ldr r2, [pc, #36] ; (8027b1c ) + 8027af8: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8027afc: 6253 str r3, [r2, #36] ; 0x24 __ASM volatile ("dsb 0xF":::"memory"); - 8027a7a: f3bf 8f4f dsb sy + 8027afe: f3bf 8f4f dsb sy } - 8027a7e: bf00 nop + 8027b02: bf00 nop __ASM volatile ("isb 0xF":::"memory"); - 8027a80: f3bf 8f6f isb sy + 8027b04: f3bf 8f6f isb sy } - 8027a84: bf00 nop + 8027b08: bf00 nop /* Ensure MPU setting take effects */ __DSB(); __ISB(); } - 8027a86: bf00 nop - 8027a88: 370c adds r7, #12 - 8027a8a: 46bd mov sp, r7 - 8027a8c: f85d 7b04 ldr.w r7, [sp], #4 - 8027a90: 4770 bx lr - 8027a92: bf00 nop - 8027a94: e000ed90 .word 0xe000ed90 - 8027a98: e000ed00 .word 0xe000ed00 + 8027b0a: bf00 nop + 8027b0c: 370c adds r7, #12 + 8027b0e: 46bd mov sp, r7 + 8027b10: f85d 7b04 ldr.w r7, [sp], #4 + 8027b14: 4770 bx lr + 8027b16: bf00 nop + 8027b18: e000ed90 .word 0xe000ed90 + 8027b1c: e000ed00 .word 0xe000ed00 -08027a9c : +08027b20 : * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains * the initialization and configuration information. * @retval None */ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) { - 8027a9c: b480 push {r7} - 8027a9e: b083 sub sp, #12 - 8027aa0: af00 add r7, sp, #0 - 8027aa2: 6078 str r0, [r7, #4] + 8027b20: b480 push {r7} + 8027b22: b083 sub sp, #12 + 8027b24: af00 add r7, sp, #0 + 8027b26: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number)); assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable)); /* Set the Region number */ MPU->RNR = MPU_Init->Number; - 8027aa4: 687b ldr r3, [r7, #4] - 8027aa6: 785a ldrb r2, [r3, #1] - 8027aa8: 4b1d ldr r3, [pc, #116] ; (8027b20 ) - 8027aaa: 609a str r2, [r3, #8] + 8027b28: 687b ldr r3, [r7, #4] + 8027b2a: 785a ldrb r2, [r3, #1] + 8027b2c: 4b1d ldr r3, [pc, #116] ; (8027ba4 ) + 8027b2e: 609a str r2, [r3, #8] if ((MPU_Init->Enable) != 0UL) - 8027aac: 687b ldr r3, [r7, #4] - 8027aae: 781b ldrb r3, [r3, #0] - 8027ab0: 2b00 cmp r3, #0 - 8027ab2: d029 beq.n 8027b08 + 8027b30: 687b ldr r3, [r7, #4] + 8027b32: 781b ldrb r3, [r3, #0] + 8027b34: 2b00 cmp r3, #0 + 8027b36: d029 beq.n 8027b8c assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); MPU->RBAR = MPU_Init->BaseAddress; - 8027ab4: 4a1a ldr r2, [pc, #104] ; (8027b20 ) - 8027ab6: 687b ldr r3, [r7, #4] - 8027ab8: 685b ldr r3, [r3, #4] - 8027aba: 60d3 str r3, [r2, #12] + 8027b38: 4a1a ldr r2, [pc, #104] ; (8027ba4 ) + 8027b3a: 687b ldr r3, [r7, #4] + 8027b3c: 685b ldr r3, [r3, #4] + 8027b3e: 60d3 str r3, [r2, #12] MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - 8027abc: 687b ldr r3, [r7, #4] - 8027abe: 7b1b ldrb r3, [r3, #12] - 8027ac0: 071a lsls r2, r3, #28 + 8027b40: 687b ldr r3, [r7, #4] + 8027b42: 7b1b ldrb r3, [r3, #12] + 8027b44: 071a lsls r2, r3, #28 ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - 8027ac2: 687b ldr r3, [r7, #4] - 8027ac4: 7adb ldrb r3, [r3, #11] - 8027ac6: 061b lsls r3, r3, #24 + 8027b46: 687b ldr r3, [r7, #4] + 8027b48: 7adb ldrb r3, [r3, #11] + 8027b4a: 061b lsls r3, r3, #24 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - 8027ac8: 431a orrs r2, r3 + 8027b4c: 431a orrs r2, r3 ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | - 8027aca: 687b ldr r3, [r7, #4] - 8027acc: 7a9b ldrb r3, [r3, #10] - 8027ace: 04db lsls r3, r3, #19 + 8027b4e: 687b ldr r3, [r7, #4] + 8027b50: 7a9b ldrb r3, [r3, #10] + 8027b52: 04db lsls r3, r3, #19 ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - 8027ad0: 431a orrs r2, r3 + 8027b54: 431a orrs r2, r3 ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - 8027ad2: 687b ldr r3, [r7, #4] - 8027ad4: 7b5b ldrb r3, [r3, #13] - 8027ad6: 049b lsls r3, r3, #18 + 8027b56: 687b ldr r3, [r7, #4] + 8027b58: 7b5b ldrb r3, [r3, #13] + 8027b5a: 049b lsls r3, r3, #18 ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | - 8027ad8: 431a orrs r2, r3 + 8027b5c: 431a orrs r2, r3 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - 8027ada: 687b ldr r3, [r7, #4] - 8027adc: 7b9b ldrb r3, [r3, #14] - 8027ade: 045b lsls r3, r3, #17 + 8027b5e: 687b ldr r3, [r7, #4] + 8027b60: 7b9b ldrb r3, [r3, #14] + 8027b62: 045b lsls r3, r3, #17 ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - 8027ae0: 431a orrs r2, r3 + 8027b64: 431a orrs r2, r3 ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - 8027ae2: 687b ldr r3, [r7, #4] - 8027ae4: 7bdb ldrb r3, [r3, #15] - 8027ae6: 041b lsls r3, r3, #16 + 8027b66: 687b ldr r3, [r7, #4] + 8027b68: 7bdb ldrb r3, [r3, #15] + 8027b6a: 041b lsls r3, r3, #16 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - 8027ae8: 431a orrs r2, r3 + 8027b6c: 431a orrs r2, r3 ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - 8027aea: 687b ldr r3, [r7, #4] - 8027aec: 7a5b ldrb r3, [r3, #9] - 8027aee: 021b lsls r3, r3, #8 + 8027b6e: 687b ldr r3, [r7, #4] + 8027b70: 7a5b ldrb r3, [r3, #9] + 8027b72: 021b lsls r3, r3, #8 ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - 8027af0: 431a orrs r2, r3 + 8027b74: 431a orrs r2, r3 ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - 8027af2: 687b ldr r3, [r7, #4] - 8027af4: 7a1b ldrb r3, [r3, #8] - 8027af6: 005b lsls r3, r3, #1 + 8027b76: 687b ldr r3, [r7, #4] + 8027b78: 7a1b ldrb r3, [r3, #8] + 8027b7a: 005b lsls r3, r3, #1 ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - 8027af8: 4313 orrs r3, r2 + 8027b7c: 4313 orrs r3, r2 ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); - 8027afa: 687a ldr r2, [r7, #4] - 8027afc: 7812 ldrb r2, [r2, #0] - 8027afe: 4611 mov r1, r2 + 8027b7e: 687a ldr r2, [r7, #4] + 8027b80: 7812 ldrb r2, [r2, #0] + 8027b82: 4611 mov r1, r2 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - 8027b00: 4a07 ldr r2, [pc, #28] ; (8027b20 ) + 8027b84: 4a07 ldr r2, [pc, #28] ; (8027ba4 ) ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - 8027b02: 430b orrs r3, r1 + 8027b86: 430b orrs r3, r1 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - 8027b04: 6113 str r3, [r2, #16] + 8027b88: 6113 str r3, [r2, #16] else { MPU->RBAR = 0x00; MPU->RASR = 0x00; } } - 8027b06: e005 b.n 8027b14 + 8027b8a: e005 b.n 8027b98 MPU->RBAR = 0x00; - 8027b08: 4b05 ldr r3, [pc, #20] ; (8027b20 ) - 8027b0a: 2200 movs r2, #0 - 8027b0c: 60da str r2, [r3, #12] + 8027b8c: 4b05 ldr r3, [pc, #20] ; (8027ba4 ) + 8027b8e: 2200 movs r2, #0 + 8027b90: 60da str r2, [r3, #12] MPU->RASR = 0x00; - 8027b0e: 4b04 ldr r3, [pc, #16] ; (8027b20 ) - 8027b10: 2200 movs r2, #0 - 8027b12: 611a str r2, [r3, #16] -} - 8027b14: bf00 nop - 8027b16: 370c adds r7, #12 - 8027b18: 46bd mov sp, r7 - 8027b1a: f85d 7b04 ldr.w r7, [sp], #4 - 8027b1e: 4770 bx lr - 8027b20: e000ed90 .word 0xe000ed90 - -08027b24 : + 8027b92: 4b04 ldr r3, [pc, #16] ; (8027ba4 ) + 8027b94: 2200 movs r2, #0 + 8027b96: 611a str r2, [r3, #16] +} + 8027b98: bf00 nop + 8027b9a: 370c adds r7, #12 + 8027b9c: 46bd mov sp, r7 + 8027b9e: f85d 7b04 ldr.w r7, [sp], #4 + 8027ba2: 4770 bx lr + 8027ba4: e000ed90 .word 0xe000ed90 + +08027ba8 : * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { - 8027b24: b580 push {r7, lr} - 8027b26: b086 sub sp, #24 - 8027b28: af00 add r7, sp, #0 - 8027b2a: 6078 str r0, [r7, #4] + 8027ba8: b580 push {r7, lr} + 8027baa: b086 sub sp, #24 + 8027bac: af00 add r7, sp, #0 + 8027bae: 6078 str r0, [r7, #4] uint32_t registerValue; uint32_t tickstart = HAL_GetTick(); - 8027b2c: f7fe fa4a bl 8025fc4 - 8027b30: 6138 str r0, [r7, #16] + 8027bb0: f7fe fa4a bl 8026048 + 8027bb4: 6138 str r0, [r7, #16] DMA_Base_Registers *regs_dma; BDMA_Base_Registers *regs_bdma; /* Check the DMA peripheral handle */ if(hdma == NULL) - 8027b32: 687b ldr r3, [r7, #4] - 8027b34: 2b00 cmp r3, #0 - 8027b36: d101 bne.n 8027b3c + 8027bb6: 687b ldr r3, [r7, #4] + 8027bb8: 2b00 cmp r3, #0 + 8027bba: d101 bne.n 8027bc0 { return HAL_ERROR; - 8027b38: 2301 movs r3, #1 - 8027b3a: e316 b.n 802816a + 8027bbc: 2301 movs r3, #1 + 8027bbe: e316 b.n 80281ee assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 8027b3c: 687b ldr r3, [r7, #4] - 8027b3e: 681b ldr r3, [r3, #0] - 8027b40: 4a66 ldr r2, [pc, #408] ; (8027cdc ) - 8027b42: 4293 cmp r3, r2 - 8027b44: d04a beq.n 8027bdc - 8027b46: 687b ldr r3, [r7, #4] - 8027b48: 681b ldr r3, [r3, #0] - 8027b4a: 4a65 ldr r2, [pc, #404] ; (8027ce0 ) - 8027b4c: 4293 cmp r3, r2 - 8027b4e: d045 beq.n 8027bdc - 8027b50: 687b ldr r3, [r7, #4] - 8027b52: 681b ldr r3, [r3, #0] - 8027b54: 4a63 ldr r2, [pc, #396] ; (8027ce4 ) - 8027b56: 4293 cmp r3, r2 - 8027b58: d040 beq.n 8027bdc - 8027b5a: 687b ldr r3, [r7, #4] - 8027b5c: 681b ldr r3, [r3, #0] - 8027b5e: 4a62 ldr r2, [pc, #392] ; (8027ce8 ) - 8027b60: 4293 cmp r3, r2 - 8027b62: d03b beq.n 8027bdc - 8027b64: 687b ldr r3, [r7, #4] - 8027b66: 681b ldr r3, [r3, #0] - 8027b68: 4a60 ldr r2, [pc, #384] ; (8027cec ) - 8027b6a: 4293 cmp r3, r2 - 8027b6c: d036 beq.n 8027bdc - 8027b6e: 687b ldr r3, [r7, #4] - 8027b70: 681b ldr r3, [r3, #0] - 8027b72: 4a5f ldr r2, [pc, #380] ; (8027cf0 ) - 8027b74: 4293 cmp r3, r2 - 8027b76: d031 beq.n 8027bdc - 8027b78: 687b ldr r3, [r7, #4] - 8027b7a: 681b ldr r3, [r3, #0] - 8027b7c: 4a5d ldr r2, [pc, #372] ; (8027cf4 ) - 8027b7e: 4293 cmp r3, r2 - 8027b80: d02c beq.n 8027bdc - 8027b82: 687b ldr r3, [r7, #4] - 8027b84: 681b ldr r3, [r3, #0] - 8027b86: 4a5c ldr r2, [pc, #368] ; (8027cf8 ) - 8027b88: 4293 cmp r3, r2 - 8027b8a: d027 beq.n 8027bdc - 8027b8c: 687b ldr r3, [r7, #4] - 8027b8e: 681b ldr r3, [r3, #0] - 8027b90: 4a5a ldr r2, [pc, #360] ; (8027cfc ) - 8027b92: 4293 cmp r3, r2 - 8027b94: d022 beq.n 8027bdc - 8027b96: 687b ldr r3, [r7, #4] - 8027b98: 681b ldr r3, [r3, #0] - 8027b9a: 4a59 ldr r2, [pc, #356] ; (8027d00 ) - 8027b9c: 4293 cmp r3, r2 - 8027b9e: d01d beq.n 8027bdc - 8027ba0: 687b ldr r3, [r7, #4] - 8027ba2: 681b ldr r3, [r3, #0] - 8027ba4: 4a57 ldr r2, [pc, #348] ; (8027d04 ) - 8027ba6: 4293 cmp r3, r2 - 8027ba8: d018 beq.n 8027bdc - 8027baa: 687b ldr r3, [r7, #4] - 8027bac: 681b ldr r3, [r3, #0] - 8027bae: 4a56 ldr r2, [pc, #344] ; (8027d08 ) - 8027bb0: 4293 cmp r3, r2 - 8027bb2: d013 beq.n 8027bdc - 8027bb4: 687b ldr r3, [r7, #4] - 8027bb6: 681b ldr r3, [r3, #0] - 8027bb8: 4a54 ldr r2, [pc, #336] ; (8027d0c ) - 8027bba: 4293 cmp r3, r2 - 8027bbc: d00e beq.n 8027bdc - 8027bbe: 687b ldr r3, [r7, #4] - 8027bc0: 681b ldr r3, [r3, #0] - 8027bc2: 4a53 ldr r2, [pc, #332] ; (8027d10 ) - 8027bc4: 4293 cmp r3, r2 - 8027bc6: d009 beq.n 8027bdc - 8027bc8: 687b ldr r3, [r7, #4] - 8027bca: 681b ldr r3, [r3, #0] - 8027bcc: 4a51 ldr r2, [pc, #324] ; (8027d14 ) - 8027bce: 4293 cmp r3, r2 - 8027bd0: d004 beq.n 8027bdc - 8027bd2: 687b ldr r3, [r7, #4] - 8027bd4: 681b ldr r3, [r3, #0] - 8027bd6: 4a50 ldr r2, [pc, #320] ; (8027d18 ) - 8027bd8: 4293 cmp r3, r2 - 8027bda: d101 bne.n 8027be0 - 8027bdc: 2301 movs r3, #1 - 8027bde: e000 b.n 8027be2 - 8027be0: 2300 movs r3, #0 - 8027be2: 2b00 cmp r3, #0 - 8027be4: f000 813b beq.w 8027e5e + 8027bc0: 687b ldr r3, [r7, #4] + 8027bc2: 681b ldr r3, [r3, #0] + 8027bc4: 4a66 ldr r2, [pc, #408] ; (8027d60 ) + 8027bc6: 4293 cmp r3, r2 + 8027bc8: d04a beq.n 8027c60 + 8027bca: 687b ldr r3, [r7, #4] + 8027bcc: 681b ldr r3, [r3, #0] + 8027bce: 4a65 ldr r2, [pc, #404] ; (8027d64 ) + 8027bd0: 4293 cmp r3, r2 + 8027bd2: d045 beq.n 8027c60 + 8027bd4: 687b ldr r3, [r7, #4] + 8027bd6: 681b ldr r3, [r3, #0] + 8027bd8: 4a63 ldr r2, [pc, #396] ; (8027d68 ) + 8027bda: 4293 cmp r3, r2 + 8027bdc: d040 beq.n 8027c60 + 8027bde: 687b ldr r3, [r7, #4] + 8027be0: 681b ldr r3, [r3, #0] + 8027be2: 4a62 ldr r2, [pc, #392] ; (8027d6c ) + 8027be4: 4293 cmp r3, r2 + 8027be6: d03b beq.n 8027c60 + 8027be8: 687b ldr r3, [r7, #4] + 8027bea: 681b ldr r3, [r3, #0] + 8027bec: 4a60 ldr r2, [pc, #384] ; (8027d70 ) + 8027bee: 4293 cmp r3, r2 + 8027bf0: d036 beq.n 8027c60 + 8027bf2: 687b ldr r3, [r7, #4] + 8027bf4: 681b ldr r3, [r3, #0] + 8027bf6: 4a5f ldr r2, [pc, #380] ; (8027d74 ) + 8027bf8: 4293 cmp r3, r2 + 8027bfa: d031 beq.n 8027c60 + 8027bfc: 687b ldr r3, [r7, #4] + 8027bfe: 681b ldr r3, [r3, #0] + 8027c00: 4a5d ldr r2, [pc, #372] ; (8027d78 ) + 8027c02: 4293 cmp r3, r2 + 8027c04: d02c beq.n 8027c60 + 8027c06: 687b ldr r3, [r7, #4] + 8027c08: 681b ldr r3, [r3, #0] + 8027c0a: 4a5c ldr r2, [pc, #368] ; (8027d7c ) + 8027c0c: 4293 cmp r3, r2 + 8027c0e: d027 beq.n 8027c60 + 8027c10: 687b ldr r3, [r7, #4] + 8027c12: 681b ldr r3, [r3, #0] + 8027c14: 4a5a ldr r2, [pc, #360] ; (8027d80 ) + 8027c16: 4293 cmp r3, r2 + 8027c18: d022 beq.n 8027c60 + 8027c1a: 687b ldr r3, [r7, #4] + 8027c1c: 681b ldr r3, [r3, #0] + 8027c1e: 4a59 ldr r2, [pc, #356] ; (8027d84 ) + 8027c20: 4293 cmp r3, r2 + 8027c22: d01d beq.n 8027c60 + 8027c24: 687b ldr r3, [r7, #4] + 8027c26: 681b ldr r3, [r3, #0] + 8027c28: 4a57 ldr r2, [pc, #348] ; (8027d88 ) + 8027c2a: 4293 cmp r3, r2 + 8027c2c: d018 beq.n 8027c60 + 8027c2e: 687b ldr r3, [r7, #4] + 8027c30: 681b ldr r3, [r3, #0] + 8027c32: 4a56 ldr r2, [pc, #344] ; (8027d8c ) + 8027c34: 4293 cmp r3, r2 + 8027c36: d013 beq.n 8027c60 + 8027c38: 687b ldr r3, [r7, #4] + 8027c3a: 681b ldr r3, [r3, #0] + 8027c3c: 4a54 ldr r2, [pc, #336] ; (8027d90 ) + 8027c3e: 4293 cmp r3, r2 + 8027c40: d00e beq.n 8027c60 + 8027c42: 687b ldr r3, [r7, #4] + 8027c44: 681b ldr r3, [r3, #0] + 8027c46: 4a53 ldr r2, [pc, #332] ; (8027d94 ) + 8027c48: 4293 cmp r3, r2 + 8027c4a: d009 beq.n 8027c60 + 8027c4c: 687b ldr r3, [r7, #4] + 8027c4e: 681b ldr r3, [r3, #0] + 8027c50: 4a51 ldr r2, [pc, #324] ; (8027d98 ) + 8027c52: 4293 cmp r3, r2 + 8027c54: d004 beq.n 8027c60 + 8027c56: 687b ldr r3, [r7, #4] + 8027c58: 681b ldr r3, [r3, #0] + 8027c5a: 4a50 ldr r2, [pc, #320] ; (8027d9c ) + 8027c5c: 4293 cmp r3, r2 + 8027c5e: d101 bne.n 8027c64 + 8027c60: 2301 movs r3, #1 + 8027c62: e000 b.n 8027c66 + 8027c64: 2300 movs r3, #0 + 8027c66: 2b00 cmp r3, #0 + 8027c68: f000 813b beq.w 8027ee2 assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst)); assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst)); } /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; - 8027be8: 687b ldr r3, [r7, #4] - 8027bea: 2202 movs r2, #2 - 8027bec: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8027c6c: 687b ldr r3, [r7, #4] + 8027c6e: 2202 movs r2, #2 + 8027c70: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Allocate lock resource */ __HAL_UNLOCK(hdma); - 8027bf0: 687b ldr r3, [r7, #4] - 8027bf2: 2200 movs r2, #0 - 8027bf4: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8027c74: 687b ldr r3, [r7, #4] + 8027c76: 2200 movs r2, #0 + 8027c78: f883 2034 strb.w r2, [r3, #52] ; 0x34 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); - 8027bf8: 687b ldr r3, [r7, #4] - 8027bfa: 681b ldr r3, [r3, #0] - 8027bfc: 4a37 ldr r2, [pc, #220] ; (8027cdc ) - 8027bfe: 4293 cmp r3, r2 - 8027c00: d04a beq.n 8027c98 - 8027c02: 687b ldr r3, [r7, #4] - 8027c04: 681b ldr r3, [r3, #0] - 8027c06: 4a36 ldr r2, [pc, #216] ; (8027ce0 ) - 8027c08: 4293 cmp r3, r2 - 8027c0a: d045 beq.n 8027c98 - 8027c0c: 687b ldr r3, [r7, #4] - 8027c0e: 681b ldr r3, [r3, #0] - 8027c10: 4a34 ldr r2, [pc, #208] ; (8027ce4 ) - 8027c12: 4293 cmp r3, r2 - 8027c14: d040 beq.n 8027c98 - 8027c16: 687b ldr r3, [r7, #4] - 8027c18: 681b ldr r3, [r3, #0] - 8027c1a: 4a33 ldr r2, [pc, #204] ; (8027ce8 ) - 8027c1c: 4293 cmp r3, r2 - 8027c1e: d03b beq.n 8027c98 - 8027c20: 687b ldr r3, [r7, #4] - 8027c22: 681b ldr r3, [r3, #0] - 8027c24: 4a31 ldr r2, [pc, #196] ; (8027cec ) - 8027c26: 4293 cmp r3, r2 - 8027c28: d036 beq.n 8027c98 - 8027c2a: 687b ldr r3, [r7, #4] - 8027c2c: 681b ldr r3, [r3, #0] - 8027c2e: 4a30 ldr r2, [pc, #192] ; (8027cf0 ) - 8027c30: 4293 cmp r3, r2 - 8027c32: d031 beq.n 8027c98 - 8027c34: 687b ldr r3, [r7, #4] - 8027c36: 681b ldr r3, [r3, #0] - 8027c38: 4a2e ldr r2, [pc, #184] ; (8027cf4 ) - 8027c3a: 4293 cmp r3, r2 - 8027c3c: d02c beq.n 8027c98 - 8027c3e: 687b ldr r3, [r7, #4] - 8027c40: 681b ldr r3, [r3, #0] - 8027c42: 4a2d ldr r2, [pc, #180] ; (8027cf8 ) - 8027c44: 4293 cmp r3, r2 - 8027c46: d027 beq.n 8027c98 - 8027c48: 687b ldr r3, [r7, #4] - 8027c4a: 681b ldr r3, [r3, #0] - 8027c4c: 4a2b ldr r2, [pc, #172] ; (8027cfc ) - 8027c4e: 4293 cmp r3, r2 - 8027c50: d022 beq.n 8027c98 - 8027c52: 687b ldr r3, [r7, #4] - 8027c54: 681b ldr r3, [r3, #0] - 8027c56: 4a2a ldr r2, [pc, #168] ; (8027d00 ) - 8027c58: 4293 cmp r3, r2 - 8027c5a: d01d beq.n 8027c98 - 8027c5c: 687b ldr r3, [r7, #4] - 8027c5e: 681b ldr r3, [r3, #0] - 8027c60: 4a28 ldr r2, [pc, #160] ; (8027d04 ) - 8027c62: 4293 cmp r3, r2 - 8027c64: d018 beq.n 8027c98 - 8027c66: 687b ldr r3, [r7, #4] - 8027c68: 681b ldr r3, [r3, #0] - 8027c6a: 4a27 ldr r2, [pc, #156] ; (8027d08 ) - 8027c6c: 4293 cmp r3, r2 - 8027c6e: d013 beq.n 8027c98 - 8027c70: 687b ldr r3, [r7, #4] - 8027c72: 681b ldr r3, [r3, #0] - 8027c74: 4a25 ldr r2, [pc, #148] ; (8027d0c ) - 8027c76: 4293 cmp r3, r2 - 8027c78: d00e beq.n 8027c98 - 8027c7a: 687b ldr r3, [r7, #4] - 8027c7c: 681b ldr r3, [r3, #0] - 8027c7e: 4a24 ldr r2, [pc, #144] ; (8027d10 ) - 8027c80: 4293 cmp r3, r2 - 8027c82: d009 beq.n 8027c98 - 8027c84: 687b ldr r3, [r7, #4] - 8027c86: 681b ldr r3, [r3, #0] - 8027c88: 4a22 ldr r2, [pc, #136] ; (8027d14 ) - 8027c8a: 4293 cmp r3, r2 - 8027c8c: d004 beq.n 8027c98 - 8027c8e: 687b ldr r3, [r7, #4] - 8027c90: 681b ldr r3, [r3, #0] - 8027c92: 4a21 ldr r2, [pc, #132] ; (8027d18 ) - 8027c94: 4293 cmp r3, r2 - 8027c96: d108 bne.n 8027caa - 8027c98: 687b ldr r3, [r7, #4] - 8027c9a: 681b ldr r3, [r3, #0] - 8027c9c: 681a ldr r2, [r3, #0] - 8027c9e: 687b ldr r3, [r7, #4] - 8027ca0: 681b ldr r3, [r3, #0] - 8027ca2: f022 0201 bic.w r2, r2, #1 - 8027ca6: 601a str r2, [r3, #0] - 8027ca8: e007 b.n 8027cba - 8027caa: 687b ldr r3, [r7, #4] - 8027cac: 681b ldr r3, [r3, #0] - 8027cae: 681a ldr r2, [r3, #0] - 8027cb0: 687b ldr r3, [r7, #4] - 8027cb2: 681b ldr r3, [r3, #0] - 8027cb4: f022 0201 bic.w r2, r2, #1 - 8027cb8: 601a str r2, [r3, #0] + 8027c7c: 687b ldr r3, [r7, #4] + 8027c7e: 681b ldr r3, [r3, #0] + 8027c80: 4a37 ldr r2, [pc, #220] ; (8027d60 ) + 8027c82: 4293 cmp r3, r2 + 8027c84: d04a beq.n 8027d1c + 8027c86: 687b ldr r3, [r7, #4] + 8027c88: 681b ldr r3, [r3, #0] + 8027c8a: 4a36 ldr r2, [pc, #216] ; (8027d64 ) + 8027c8c: 4293 cmp r3, r2 + 8027c8e: d045 beq.n 8027d1c + 8027c90: 687b ldr r3, [r7, #4] + 8027c92: 681b ldr r3, [r3, #0] + 8027c94: 4a34 ldr r2, [pc, #208] ; (8027d68 ) + 8027c96: 4293 cmp r3, r2 + 8027c98: d040 beq.n 8027d1c + 8027c9a: 687b ldr r3, [r7, #4] + 8027c9c: 681b ldr r3, [r3, #0] + 8027c9e: 4a33 ldr r2, [pc, #204] ; (8027d6c ) + 8027ca0: 4293 cmp r3, r2 + 8027ca2: d03b beq.n 8027d1c + 8027ca4: 687b ldr r3, [r7, #4] + 8027ca6: 681b ldr r3, [r3, #0] + 8027ca8: 4a31 ldr r2, [pc, #196] ; (8027d70 ) + 8027caa: 4293 cmp r3, r2 + 8027cac: d036 beq.n 8027d1c + 8027cae: 687b ldr r3, [r7, #4] + 8027cb0: 681b ldr r3, [r3, #0] + 8027cb2: 4a30 ldr r2, [pc, #192] ; (8027d74 ) + 8027cb4: 4293 cmp r3, r2 + 8027cb6: d031 beq.n 8027d1c + 8027cb8: 687b ldr r3, [r7, #4] + 8027cba: 681b ldr r3, [r3, #0] + 8027cbc: 4a2e ldr r2, [pc, #184] ; (8027d78 ) + 8027cbe: 4293 cmp r3, r2 + 8027cc0: d02c beq.n 8027d1c + 8027cc2: 687b ldr r3, [r7, #4] + 8027cc4: 681b ldr r3, [r3, #0] + 8027cc6: 4a2d ldr r2, [pc, #180] ; (8027d7c ) + 8027cc8: 4293 cmp r3, r2 + 8027cca: d027 beq.n 8027d1c + 8027ccc: 687b ldr r3, [r7, #4] + 8027cce: 681b ldr r3, [r3, #0] + 8027cd0: 4a2b ldr r2, [pc, #172] ; (8027d80 ) + 8027cd2: 4293 cmp r3, r2 + 8027cd4: d022 beq.n 8027d1c + 8027cd6: 687b ldr r3, [r7, #4] + 8027cd8: 681b ldr r3, [r3, #0] + 8027cda: 4a2a ldr r2, [pc, #168] ; (8027d84 ) + 8027cdc: 4293 cmp r3, r2 + 8027cde: d01d beq.n 8027d1c + 8027ce0: 687b ldr r3, [r7, #4] + 8027ce2: 681b ldr r3, [r3, #0] + 8027ce4: 4a28 ldr r2, [pc, #160] ; (8027d88 ) + 8027ce6: 4293 cmp r3, r2 + 8027ce8: d018 beq.n 8027d1c + 8027cea: 687b ldr r3, [r7, #4] + 8027cec: 681b ldr r3, [r3, #0] + 8027cee: 4a27 ldr r2, [pc, #156] ; (8027d8c ) + 8027cf0: 4293 cmp r3, r2 + 8027cf2: d013 beq.n 8027d1c + 8027cf4: 687b ldr r3, [r7, #4] + 8027cf6: 681b ldr r3, [r3, #0] + 8027cf8: 4a25 ldr r2, [pc, #148] ; (8027d90 ) + 8027cfa: 4293 cmp r3, r2 + 8027cfc: d00e beq.n 8027d1c + 8027cfe: 687b ldr r3, [r7, #4] + 8027d00: 681b ldr r3, [r3, #0] + 8027d02: 4a24 ldr r2, [pc, #144] ; (8027d94 ) + 8027d04: 4293 cmp r3, r2 + 8027d06: d009 beq.n 8027d1c + 8027d08: 687b ldr r3, [r7, #4] + 8027d0a: 681b ldr r3, [r3, #0] + 8027d0c: 4a22 ldr r2, [pc, #136] ; (8027d98 ) + 8027d0e: 4293 cmp r3, r2 + 8027d10: d004 beq.n 8027d1c + 8027d12: 687b ldr r3, [r7, #4] + 8027d14: 681b ldr r3, [r3, #0] + 8027d16: 4a21 ldr r2, [pc, #132] ; (8027d9c ) + 8027d18: 4293 cmp r3, r2 + 8027d1a: d108 bne.n 8027d2e + 8027d1c: 687b ldr r3, [r7, #4] + 8027d1e: 681b ldr r3, [r3, #0] + 8027d20: 681a ldr r2, [r3, #0] + 8027d22: 687b ldr r3, [r7, #4] + 8027d24: 681b ldr r3, [r3, #0] + 8027d26: f022 0201 bic.w r2, r2, #1 + 8027d2a: 601a str r2, [r3, #0] + 8027d2c: e007 b.n 8027d3e + 8027d2e: 687b ldr r3, [r7, #4] + 8027d30: 681b ldr r3, [r3, #0] + 8027d32: 681a ldr r2, [r3, #0] + 8027d34: 687b ldr r3, [r7, #4] + 8027d36: 681b ldr r3, [r3, #0] + 8027d38: f022 0201 bic.w r2, r2, #1 + 8027d3c: 601a str r2, [r3, #0] /* Check if the DMA Stream is effectively disabled */ while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U) - 8027cba: e02f b.n 8027d1c + 8027d3e: e02f b.n 8027da0 { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) - 8027cbc: f7fe f982 bl 8025fc4 - 8027cc0: 4602 mov r2, r0 - 8027cc2: 693b ldr r3, [r7, #16] - 8027cc4: 1ad3 subs r3, r2, r3 - 8027cc6: 2b05 cmp r3, #5 - 8027cc8: d928 bls.n 8027d1c + 8027d40: f7fe f982 bl 8026048 + 8027d44: 4602 mov r2, r0 + 8027d46: 693b ldr r3, [r7, #16] + 8027d48: 1ad3 subs r3, r2, r3 + 8027d4a: 2b05 cmp r3, #5 + 8027d4c: d928 bls.n 8027da0 { /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; - 8027cca: 687b ldr r3, [r7, #4] - 8027ccc: 2220 movs r2, #32 - 8027cce: 655a str r2, [r3, #84] ; 0x54 + 8027d4e: 687b ldr r3, [r7, #4] + 8027d50: 2220 movs r2, #32 + 8027d52: 655a str r2, [r3, #84] ; 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_ERROR; - 8027cd0: 687b ldr r3, [r7, #4] - 8027cd2: 2203 movs r2, #3 - 8027cd4: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8027d54: 687b ldr r3, [r7, #4] + 8027d56: 2203 movs r2, #3 + 8027d58: f883 2035 strb.w r2, [r3, #53] ; 0x35 return HAL_ERROR; - 8027cd8: 2301 movs r3, #1 - 8027cda: e246 b.n 802816a - 8027cdc: 40020010 .word 0x40020010 - 8027ce0: 40020028 .word 0x40020028 - 8027ce4: 40020040 .word 0x40020040 - 8027ce8: 40020058 .word 0x40020058 - 8027cec: 40020070 .word 0x40020070 - 8027cf0: 40020088 .word 0x40020088 - 8027cf4: 400200a0 .word 0x400200a0 - 8027cf8: 400200b8 .word 0x400200b8 - 8027cfc: 40020410 .word 0x40020410 - 8027d00: 40020428 .word 0x40020428 - 8027d04: 40020440 .word 0x40020440 - 8027d08: 40020458 .word 0x40020458 - 8027d0c: 40020470 .word 0x40020470 - 8027d10: 40020488 .word 0x40020488 - 8027d14: 400204a0 .word 0x400204a0 - 8027d18: 400204b8 .word 0x400204b8 + 8027d5c: 2301 movs r3, #1 + 8027d5e: e246 b.n 80281ee + 8027d60: 40020010 .word 0x40020010 + 8027d64: 40020028 .word 0x40020028 + 8027d68: 40020040 .word 0x40020040 + 8027d6c: 40020058 .word 0x40020058 + 8027d70: 40020070 .word 0x40020070 + 8027d74: 40020088 .word 0x40020088 + 8027d78: 400200a0 .word 0x400200a0 + 8027d7c: 400200b8 .word 0x400200b8 + 8027d80: 40020410 .word 0x40020410 + 8027d84: 40020428 .word 0x40020428 + 8027d88: 40020440 .word 0x40020440 + 8027d8c: 40020458 .word 0x40020458 + 8027d90: 40020470 .word 0x40020470 + 8027d94: 40020488 .word 0x40020488 + 8027d98: 400204a0 .word 0x400204a0 + 8027d9c: 400204b8 .word 0x400204b8 while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U) - 8027d1c: 687b ldr r3, [r7, #4] - 8027d1e: 681b ldr r3, [r3, #0] - 8027d20: 681b ldr r3, [r3, #0] - 8027d22: f003 0301 and.w r3, r3, #1 - 8027d26: 2b00 cmp r3, #0 - 8027d28: d1c8 bne.n 8027cbc + 8027da0: 687b ldr r3, [r7, #4] + 8027da2: 681b ldr r3, [r3, #0] + 8027da4: 681b ldr r3, [r3, #0] + 8027da6: f003 0301 and.w r3, r3, #1 + 8027daa: 2b00 cmp r3, #0 + 8027dac: d1c8 bne.n 8027d40 } } /* Get the CR register value */ registerValue = ((DMA_Stream_TypeDef *)hdma->Instance)->CR; - 8027d2a: 687b ldr r3, [r7, #4] - 8027d2c: 681b ldr r3, [r3, #0] - 8027d2e: 681b ldr r3, [r3, #0] - 8027d30: 617b str r3, [r7, #20] + 8027dae: 687b ldr r3, [r7, #4] + 8027db0: 681b ldr r3, [r3, #0] + 8027db2: 681b ldr r3, [r3, #0] + 8027db4: 617b str r3, [r7, #20] /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */ registerValue &= ((uint32_t)~(DMA_SxCR_MBURST | DMA_SxCR_PBURST | \ - 8027d32: 697a ldr r2, [r7, #20] - 8027d34: 4b83 ldr r3, [pc, #524] ; (8027f44 ) - 8027d36: 4013 ands r3, r2 - 8027d38: 617b str r3, [r7, #20] + 8027db6: 697a ldr r2, [r7, #20] + 8027db8: 4b83 ldr r3, [pc, #524] ; (8027fc8 ) + 8027dba: 4013 ands r3, r2 + 8027dbc: 617b str r3, [r7, #20] DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \ DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \ DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM)); /* Prepare the DMA Stream configuration */ registerValue |= hdma->Init.Direction | - 8027d3a: 687b ldr r3, [r7, #4] - 8027d3c: 689a ldr r2, [r3, #8] + 8027dbe: 687b ldr r3, [r7, #4] + 8027dc0: 689a ldr r2, [r3, #8] hdma->Init.PeriphInc | hdma->Init.MemInc | - 8027d3e: 687b ldr r3, [r7, #4] - 8027d40: 68db ldr r3, [r3, #12] + 8027dc2: 687b ldr r3, [r7, #4] + 8027dc4: 68db ldr r3, [r3, #12] registerValue |= hdma->Init.Direction | - 8027d42: 431a orrs r2, r3 + 8027dc6: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | - 8027d44: 687b ldr r3, [r7, #4] - 8027d46: 691b ldr r3, [r3, #16] - 8027d48: 431a orrs r2, r3 + 8027dc8: 687b ldr r3, [r7, #4] + 8027dca: 691b ldr r3, [r3, #16] + 8027dcc: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8027d4a: 687b ldr r3, [r7, #4] - 8027d4c: 695b ldr r3, [r3, #20] + 8027dce: 687b ldr r3, [r7, #4] + 8027dd0: 695b ldr r3, [r3, #20] hdma->Init.PeriphInc | hdma->Init.MemInc | - 8027d4e: 431a orrs r2, r3 + 8027dd2: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8027d50: 687b ldr r3, [r7, #4] - 8027d52: 699b ldr r3, [r3, #24] - 8027d54: 431a orrs r2, r3 + 8027dd4: 687b ldr r3, [r7, #4] + 8027dd6: 699b ldr r3, [r3, #24] + 8027dd8: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; - 8027d56: 687b ldr r3, [r7, #4] - 8027d58: 69db ldr r3, [r3, #28] + 8027dda: 687b ldr r3, [r7, #4] + 8027ddc: 69db ldr r3, [r3, #28] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8027d5a: 431a orrs r2, r3 + 8027dde: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; - 8027d5c: 687b ldr r3, [r7, #4] - 8027d5e: 6a1b ldr r3, [r3, #32] - 8027d60: 4313 orrs r3, r2 + 8027de0: 687b ldr r3, [r7, #4] + 8027de2: 6a1b ldr r3, [r3, #32] + 8027de4: 4313 orrs r3, r2 registerValue |= hdma->Init.Direction | - 8027d62: 697a ldr r2, [r7, #20] - 8027d64: 4313 orrs r3, r2 - 8027d66: 617b str r3, [r7, #20] + 8027de6: 697a ldr r2, [r7, #20] + 8027de8: 4313 orrs r3, r2 + 8027dea: 617b str r3, [r7, #20] /* the Memory burst and peripheral burst are not used when the FIFO is disabled */ if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) - 8027d68: 687b ldr r3, [r7, #4] - 8027d6a: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027d6c: 2b04 cmp r3, #4 - 8027d6e: d107 bne.n 8027d80 + 8027dec: 687b ldr r3, [r7, #4] + 8027dee: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027df0: 2b04 cmp r3, #4 + 8027df2: d107 bne.n 8027e04 { /* Get memory burst and peripheral burst */ registerValue |= hdma->Init.MemBurst | hdma->Init.PeriphBurst; - 8027d70: 687b ldr r3, [r7, #4] - 8027d72: 6ada ldr r2, [r3, #44] ; 0x2c - 8027d74: 687b ldr r3, [r7, #4] - 8027d76: 6b1b ldr r3, [r3, #48] ; 0x30 - 8027d78: 4313 orrs r3, r2 - 8027d7a: 697a ldr r2, [r7, #20] - 8027d7c: 4313 orrs r3, r2 - 8027d7e: 617b str r3, [r7, #20] + 8027df4: 687b ldr r3, [r7, #4] + 8027df6: 6ada ldr r2, [r3, #44] ; 0x2c + 8027df8: 687b ldr r3, [r7, #4] + 8027dfa: 6b1b ldr r3, [r3, #48] ; 0x30 + 8027dfc: 4313 orrs r3, r2 + 8027dfe: 697a ldr r2, [r7, #20] + 8027e00: 4313 orrs r3, r2 + 8027e02: 617b str r3, [r7, #20] } /* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be lock when transferring data to/from USART/UART */ #if (STM32H7_DEV_ID == 0x450UL) if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U) - 8027d80: 4b71 ldr r3, [pc, #452] ; (8027f48 ) - 8027d82: 681a ldr r2, [r3, #0] - 8027d84: 4b71 ldr r3, [pc, #452] ; (8027f4c ) - 8027d86: 4013 ands r3, r2 - 8027d88: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8027d8c: d328 bcc.n 8027de0 + 8027e04: 4b71 ldr r3, [pc, #452] ; (8027fcc ) + 8027e06: 681a ldr r2, [r3, #0] + 8027e08: 4b71 ldr r3, [pc, #452] ; (8027fd0 ) + 8027e0a: 4013 ands r3, r2 + 8027e0c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8027e10: d328 bcc.n 8027e64 { #endif /* STM32H7_DEV_ID == 0x450UL */ if(IS_DMA_UART_USART_REQUEST(hdma->Init.Request) != 0U) - 8027d8e: 687b ldr r3, [r7, #4] - 8027d90: 685b ldr r3, [r3, #4] - 8027d92: 2b28 cmp r3, #40 ; 0x28 - 8027d94: d903 bls.n 8027d9e - 8027d96: 687b ldr r3, [r7, #4] - 8027d98: 685b ldr r3, [r3, #4] - 8027d9a: 2b2e cmp r3, #46 ; 0x2e - 8027d9c: d917 bls.n 8027dce - 8027d9e: 687b ldr r3, [r7, #4] - 8027da0: 685b ldr r3, [r3, #4] - 8027da2: 2b3e cmp r3, #62 ; 0x3e - 8027da4: d903 bls.n 8027dae - 8027da6: 687b ldr r3, [r7, #4] - 8027da8: 685b ldr r3, [r3, #4] - 8027daa: 2b42 cmp r3, #66 ; 0x42 - 8027dac: d90f bls.n 8027dce - 8027dae: 687b ldr r3, [r7, #4] - 8027db0: 685b ldr r3, [r3, #4] - 8027db2: 2b46 cmp r3, #70 ; 0x46 - 8027db4: d903 bls.n 8027dbe - 8027db6: 687b ldr r3, [r7, #4] - 8027db8: 685b ldr r3, [r3, #4] - 8027dba: 2b48 cmp r3, #72 ; 0x48 - 8027dbc: d907 bls.n 8027dce - 8027dbe: 687b ldr r3, [r7, #4] - 8027dc0: 685b ldr r3, [r3, #4] - 8027dc2: 2b4e cmp r3, #78 ; 0x4e - 8027dc4: d905 bls.n 8027dd2 - 8027dc6: 687b ldr r3, [r7, #4] - 8027dc8: 685b ldr r3, [r3, #4] - 8027dca: 2b52 cmp r3, #82 ; 0x52 - 8027dcc: d801 bhi.n 8027dd2 - 8027dce: 2301 movs r3, #1 - 8027dd0: e000 b.n 8027dd4 - 8027dd2: 2300 movs r3, #0 - 8027dd4: 2b00 cmp r3, #0 - 8027dd6: d003 beq.n 8027de0 + 8027e12: 687b ldr r3, [r7, #4] + 8027e14: 685b ldr r3, [r3, #4] + 8027e16: 2b28 cmp r3, #40 ; 0x28 + 8027e18: d903 bls.n 8027e22 + 8027e1a: 687b ldr r3, [r7, #4] + 8027e1c: 685b ldr r3, [r3, #4] + 8027e1e: 2b2e cmp r3, #46 ; 0x2e + 8027e20: d917 bls.n 8027e52 + 8027e22: 687b ldr r3, [r7, #4] + 8027e24: 685b ldr r3, [r3, #4] + 8027e26: 2b3e cmp r3, #62 ; 0x3e + 8027e28: d903 bls.n 8027e32 + 8027e2a: 687b ldr r3, [r7, #4] + 8027e2c: 685b ldr r3, [r3, #4] + 8027e2e: 2b42 cmp r3, #66 ; 0x42 + 8027e30: d90f bls.n 8027e52 + 8027e32: 687b ldr r3, [r7, #4] + 8027e34: 685b ldr r3, [r3, #4] + 8027e36: 2b46 cmp r3, #70 ; 0x46 + 8027e38: d903 bls.n 8027e42 + 8027e3a: 687b ldr r3, [r7, #4] + 8027e3c: 685b ldr r3, [r3, #4] + 8027e3e: 2b48 cmp r3, #72 ; 0x48 + 8027e40: d907 bls.n 8027e52 + 8027e42: 687b ldr r3, [r7, #4] + 8027e44: 685b ldr r3, [r3, #4] + 8027e46: 2b4e cmp r3, #78 ; 0x4e + 8027e48: d905 bls.n 8027e56 + 8027e4a: 687b ldr r3, [r7, #4] + 8027e4c: 685b ldr r3, [r3, #4] + 8027e4e: 2b52 cmp r3, #82 ; 0x52 + 8027e50: d801 bhi.n 8027e56 + 8027e52: 2301 movs r3, #1 + 8027e54: e000 b.n 8027e58 + 8027e56: 2300 movs r3, #0 + 8027e58: 2b00 cmp r3, #0 + 8027e5a: d003 beq.n 8027e64 { registerValue |= DMA_SxCR_TRBUFF; - 8027dd8: 697b ldr r3, [r7, #20] - 8027dda: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 - 8027dde: 617b str r3, [r7, #20] + 8027e5c: 697b ldr r3, [r7, #20] + 8027e5e: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 + 8027e62: 617b str r3, [r7, #20] #if (STM32H7_DEV_ID == 0x450UL) } #endif /* STM32H7_DEV_ID == 0x450UL */ /* Write to DMA Stream CR register */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR = registerValue; - 8027de0: 687b ldr r3, [r7, #4] - 8027de2: 681b ldr r3, [r3, #0] - 8027de4: 697a ldr r2, [r7, #20] - 8027de6: 601a str r2, [r3, #0] + 8027e64: 687b ldr r3, [r7, #4] + 8027e66: 681b ldr r3, [r3, #0] + 8027e68: 697a ldr r2, [r7, #20] + 8027e6a: 601a str r2, [r3, #0] /* Get the FCR register value */ registerValue = ((DMA_Stream_TypeDef *)hdma->Instance)->FCR; - 8027de8: 687b ldr r3, [r7, #4] - 8027dea: 681b ldr r3, [r3, #0] - 8027dec: 695b ldr r3, [r3, #20] - 8027dee: 617b str r3, [r7, #20] + 8027e6c: 687b ldr r3, [r7, #4] + 8027e6e: 681b ldr r3, [r3, #0] + 8027e70: 695b ldr r3, [r3, #20] + 8027e72: 617b str r3, [r7, #20] /* Clear Direct mode and FIFO threshold bits */ registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); - 8027df0: 697b ldr r3, [r7, #20] - 8027df2: f023 0307 bic.w r3, r3, #7 - 8027df6: 617b str r3, [r7, #20] + 8027e74: 697b ldr r3, [r7, #20] + 8027e76: f023 0307 bic.w r3, r3, #7 + 8027e7a: 617b str r3, [r7, #20] /* Prepare the DMA Stream FIFO configuration */ registerValue |= hdma->Init.FIFOMode; - 8027df8: 687b ldr r3, [r7, #4] - 8027dfa: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027dfc: 697a ldr r2, [r7, #20] - 8027dfe: 4313 orrs r3, r2 - 8027e00: 617b str r3, [r7, #20] + 8027e7c: 687b ldr r3, [r7, #4] + 8027e7e: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027e80: 697a ldr r2, [r7, #20] + 8027e82: 4313 orrs r3, r2 + 8027e84: 617b str r3, [r7, #20] /* the FIFO threshold is not used when the FIFO mode is disabled */ if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE) - 8027e02: 687b ldr r3, [r7, #4] - 8027e04: 6a5b ldr r3, [r3, #36] ; 0x24 - 8027e06: 2b04 cmp r3, #4 - 8027e08: d117 bne.n 8027e3a + 8027e86: 687b ldr r3, [r7, #4] + 8027e88: 6a5b ldr r3, [r3, #36] ; 0x24 + 8027e8a: 2b04 cmp r3, #4 + 8027e8c: d117 bne.n 8027ebe { /* Get the FIFO threshold */ registerValue |= hdma->Init.FIFOThreshold; - 8027e0a: 687b ldr r3, [r7, #4] - 8027e0c: 6a9b ldr r3, [r3, #40] ; 0x28 - 8027e0e: 697a ldr r2, [r7, #20] - 8027e10: 4313 orrs r3, r2 - 8027e12: 617b str r3, [r7, #20] + 8027e8e: 687b ldr r3, [r7, #4] + 8027e90: 6a9b ldr r3, [r3, #40] ; 0x28 + 8027e92: 697a ldr r2, [r7, #20] + 8027e94: 4313 orrs r3, r2 + 8027e96: 617b str r3, [r7, #20] /* Check compatibility between FIFO threshold level and size of the memory burst */ /* for INCR4, INCR8, INCR16 */ if(hdma->Init.MemBurst != DMA_MBURST_SINGLE) - 8027e14: 687b ldr r3, [r7, #4] - 8027e16: 6adb ldr r3, [r3, #44] ; 0x2c - 8027e18: 2b00 cmp r3, #0 - 8027e1a: d00e beq.n 8027e3a + 8027e98: 687b ldr r3, [r7, #4] + 8027e9a: 6adb ldr r3, [r3, #44] ; 0x2c + 8027e9c: 2b00 cmp r3, #0 + 8027e9e: d00e beq.n 8027ebe { if (DMA_CheckFifoParam(hdma) != HAL_OK) - 8027e1c: 6878 ldr r0, [r7, #4] - 8027e1e: f002 fb41 bl 802a4a4 - 8027e22: 4603 mov r3, r0 - 8027e24: 2b00 cmp r3, #0 - 8027e26: d008 beq.n 8027e3a + 8027ea0: 6878 ldr r0, [r7, #4] + 8027ea2: f002 fb41 bl 802a528 + 8027ea6: 4603 mov r3, r0 + 8027ea8: 2b00 cmp r3, #0 + 8027eaa: d008 beq.n 8027ebe { /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_PARAM; - 8027e28: 687b ldr r3, [r7, #4] - 8027e2a: 2240 movs r2, #64 ; 0x40 - 8027e2c: 655a str r2, [r3, #84] ; 0x54 + 8027eac: 687b ldr r3, [r7, #4] + 8027eae: 2240 movs r2, #64 ; 0x40 + 8027eb0: 655a str r2, [r3, #84] ; 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8027e2e: 687b ldr r3, [r7, #4] - 8027e30: 2201 movs r2, #1 - 8027e32: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8027eb2: 687b ldr r3, [r7, #4] + 8027eb4: 2201 movs r2, #1 + 8027eb6: f883 2035 strb.w r2, [r3, #53] ; 0x35 return HAL_ERROR; - 8027e36: 2301 movs r3, #1 - 8027e38: e197 b.n 802816a + 8027eba: 2301 movs r3, #1 + 8027ebc: e197 b.n 80281ee } } } /* Write to DMA Stream FCR */ ((DMA_Stream_TypeDef *)hdma->Instance)->FCR = registerValue; - 8027e3a: 687b ldr r3, [r7, #4] - 8027e3c: 681b ldr r3, [r3, #0] - 8027e3e: 697a ldr r2, [r7, #20] - 8027e40: 615a str r2, [r3, #20] + 8027ebe: 687b ldr r3, [r7, #4] + 8027ec0: 681b ldr r3, [r3, #0] + 8027ec2: 697a ldr r2, [r7, #20] + 8027ec4: 615a str r2, [r3, #20] /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ regs_dma = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma); - 8027e42: 6878 ldr r0, [r7, #4] - 8027e44: f002 fa7c bl 802a340 - 8027e48: 4603 mov r3, r0 - 8027e4a: 60bb str r3, [r7, #8] + 8027ec6: 6878 ldr r0, [r7, #4] + 8027ec8: f002 fa7c bl 802a3c4 + 8027ecc: 4603 mov r3, r0 + 8027ece: 60bb str r3, [r7, #8] /* Clear all interrupt flags */ regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); - 8027e4c: 687b ldr r3, [r7, #4] - 8027e4e: 6ddb ldr r3, [r3, #92] ; 0x5c - 8027e50: f003 031f and.w r3, r3, #31 - 8027e54: 223f movs r2, #63 ; 0x3f - 8027e56: 409a lsls r2, r3 - 8027e58: 68bb ldr r3, [r7, #8] - 8027e5a: 609a str r2, [r3, #8] - 8027e5c: e0cd b.n 8027ffa + 8027ed0: 687b ldr r3, [r7, #4] + 8027ed2: 6ddb ldr r3, [r3, #92] ; 0x5c + 8027ed4: f003 031f and.w r3, r3, #31 + 8027ed8: 223f movs r2, #63 ; 0x3f + 8027eda: 409a lsls r2, r3 + 8027edc: 68bb ldr r3, [r7, #8] + 8027ede: 609a str r2, [r3, #8] + 8027ee0: e0cd b.n 802807e } else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */ - 8027e5e: 687b ldr r3, [r7, #4] - 8027e60: 681b ldr r3, [r3, #0] - 8027e62: 4a3b ldr r2, [pc, #236] ; (8027f50 ) - 8027e64: 4293 cmp r3, r2 - 8027e66: d022 beq.n 8027eae - 8027e68: 687b ldr r3, [r7, #4] - 8027e6a: 681b ldr r3, [r3, #0] - 8027e6c: 4a39 ldr r2, [pc, #228] ; (8027f54 ) - 8027e6e: 4293 cmp r3, r2 - 8027e70: d01d beq.n 8027eae - 8027e72: 687b ldr r3, [r7, #4] - 8027e74: 681b ldr r3, [r3, #0] - 8027e76: 4a38 ldr r2, [pc, #224] ; (8027f58 ) - 8027e78: 4293 cmp r3, r2 - 8027e7a: d018 beq.n 8027eae - 8027e7c: 687b ldr r3, [r7, #4] - 8027e7e: 681b ldr r3, [r3, #0] - 8027e80: 4a36 ldr r2, [pc, #216] ; (8027f5c ) - 8027e82: 4293 cmp r3, r2 - 8027e84: d013 beq.n 8027eae - 8027e86: 687b ldr r3, [r7, #4] - 8027e88: 681b ldr r3, [r3, #0] - 8027e8a: 4a35 ldr r2, [pc, #212] ; (8027f60 ) - 8027e8c: 4293 cmp r3, r2 - 8027e8e: d00e beq.n 8027eae - 8027e90: 687b ldr r3, [r7, #4] - 8027e92: 681b ldr r3, [r3, #0] - 8027e94: 4a33 ldr r2, [pc, #204] ; (8027f64 ) - 8027e96: 4293 cmp r3, r2 - 8027e98: d009 beq.n 8027eae - 8027e9a: 687b ldr r3, [r7, #4] - 8027e9c: 681b ldr r3, [r3, #0] - 8027e9e: 4a32 ldr r2, [pc, #200] ; (8027f68 ) - 8027ea0: 4293 cmp r3, r2 - 8027ea2: d004 beq.n 8027eae - 8027ea4: 687b ldr r3, [r7, #4] - 8027ea6: 681b ldr r3, [r3, #0] - 8027ea8: 4a30 ldr r2, [pc, #192] ; (8027f6c ) - 8027eaa: 4293 cmp r3, r2 - 8027eac: d101 bne.n 8027eb2 - 8027eae: 2301 movs r3, #1 - 8027eb0: e000 b.n 8027eb4 - 8027eb2: 2300 movs r3, #0 - 8027eb4: 2b00 cmp r3, #0 - 8027eb6: f000 8097 beq.w 8027fe8 - { - if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U) - 8027eba: 687b ldr r3, [r7, #4] - 8027ebc: 681b ldr r3, [r3, #0] - 8027ebe: 4a24 ldr r2, [pc, #144] ; (8027f50 ) - 8027ec0: 4293 cmp r3, r2 - 8027ec2: d021 beq.n 8027f08 - 8027ec4: 687b ldr r3, [r7, #4] - 8027ec6: 681b ldr r3, [r3, #0] - 8027ec8: 4a22 ldr r2, [pc, #136] ; (8027f54 ) - 8027eca: 4293 cmp r3, r2 - 8027ecc: d01c beq.n 8027f08 - 8027ece: 687b ldr r3, [r7, #4] - 8027ed0: 681b ldr r3, [r3, #0] - 8027ed2: 4a21 ldr r2, [pc, #132] ; (8027f58 ) - 8027ed4: 4293 cmp r3, r2 - 8027ed6: d017 beq.n 8027f08 - 8027ed8: 687b ldr r3, [r7, #4] - 8027eda: 681b ldr r3, [r3, #0] - 8027edc: 4a1f ldr r2, [pc, #124] ; (8027f5c ) - 8027ede: 4293 cmp r3, r2 - 8027ee0: d012 beq.n 8027f08 8027ee2: 687b ldr r3, [r7, #4] 8027ee4: 681b ldr r3, [r3, #0] - 8027ee6: 4a1e ldr r2, [pc, #120] ; (8027f60 ) + 8027ee6: 4a3b ldr r2, [pc, #236] ; (8027fd4 ) 8027ee8: 4293 cmp r3, r2 - 8027eea: d00d beq.n 8027f08 + 8027eea: d022 beq.n 8027f32 8027eec: 687b ldr r3, [r7, #4] 8027eee: 681b ldr r3, [r3, #0] - 8027ef0: 4a1c ldr r2, [pc, #112] ; (8027f64 ) + 8027ef0: 4a39 ldr r2, [pc, #228] ; (8027fd8 ) 8027ef2: 4293 cmp r3, r2 - 8027ef4: d008 beq.n 8027f08 + 8027ef4: d01d beq.n 8027f32 8027ef6: 687b ldr r3, [r7, #4] 8027ef8: 681b ldr r3, [r3, #0] - 8027efa: 4a1b ldr r2, [pc, #108] ; (8027f68 ) + 8027efa: 4a38 ldr r2, [pc, #224] ; (8027fdc ) 8027efc: 4293 cmp r3, r2 - 8027efe: d003 beq.n 8027f08 + 8027efe: d018 beq.n 8027f32 8027f00: 687b ldr r3, [r7, #4] 8027f02: 681b ldr r3, [r3, #0] - 8027f04: 4a19 ldr r2, [pc, #100] ; (8027f6c ) + 8027f04: 4a36 ldr r2, [pc, #216] ; (8027fe0 ) 8027f06: 4293 cmp r3, r2 - 8027f08: bf00 nop + 8027f08: d013 beq.n 8027f32 + 8027f0a: 687b ldr r3, [r7, #4] + 8027f0c: 681b ldr r3, [r3, #0] + 8027f0e: 4a35 ldr r2, [pc, #212] ; (8027fe4 ) + 8027f10: 4293 cmp r3, r2 + 8027f12: d00e beq.n 8027f32 + 8027f14: 687b ldr r3, [r7, #4] + 8027f16: 681b ldr r3, [r3, #0] + 8027f18: 4a33 ldr r2, [pc, #204] ; (8027fe8 ) + 8027f1a: 4293 cmp r3, r2 + 8027f1c: d009 beq.n 8027f32 + 8027f1e: 687b ldr r3, [r7, #4] + 8027f20: 681b ldr r3, [r3, #0] + 8027f22: 4a32 ldr r2, [pc, #200] ; (8027fec ) + 8027f24: 4293 cmp r3, r2 + 8027f26: d004 beq.n 8027f32 + 8027f28: 687b ldr r3, [r7, #4] + 8027f2a: 681b ldr r3, [r3, #0] + 8027f2c: 4a30 ldr r2, [pc, #192] ; (8027ff0 ) + 8027f2e: 4293 cmp r3, r2 + 8027f30: d101 bne.n 8027f36 + 8027f32: 2301 movs r3, #1 + 8027f34: e000 b.n 8027f38 + 8027f36: 2300 movs r3, #0 + 8027f38: 2b00 cmp r3, #0 + 8027f3a: f000 8097 beq.w 802806c + { + if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U) + 8027f3e: 687b ldr r3, [r7, #4] + 8027f40: 681b ldr r3, [r3, #0] + 8027f42: 4a24 ldr r2, [pc, #144] ; (8027fd4 ) + 8027f44: 4293 cmp r3, r2 + 8027f46: d021 beq.n 8027f8c + 8027f48: 687b ldr r3, [r7, #4] + 8027f4a: 681b ldr r3, [r3, #0] + 8027f4c: 4a22 ldr r2, [pc, #136] ; (8027fd8 ) + 8027f4e: 4293 cmp r3, r2 + 8027f50: d01c beq.n 8027f8c + 8027f52: 687b ldr r3, [r7, #4] + 8027f54: 681b ldr r3, [r3, #0] + 8027f56: 4a21 ldr r2, [pc, #132] ; (8027fdc ) + 8027f58: 4293 cmp r3, r2 + 8027f5a: d017 beq.n 8027f8c + 8027f5c: 687b ldr r3, [r7, #4] + 8027f5e: 681b ldr r3, [r3, #0] + 8027f60: 4a1f ldr r2, [pc, #124] ; (8027fe0 ) + 8027f62: 4293 cmp r3, r2 + 8027f64: d012 beq.n 8027f8c + 8027f66: 687b ldr r3, [r7, #4] + 8027f68: 681b ldr r3, [r3, #0] + 8027f6a: 4a1e ldr r2, [pc, #120] ; (8027fe4 ) + 8027f6c: 4293 cmp r3, r2 + 8027f6e: d00d beq.n 8027f8c + 8027f70: 687b ldr r3, [r7, #4] + 8027f72: 681b ldr r3, [r3, #0] + 8027f74: 4a1c ldr r2, [pc, #112] ; (8027fe8 ) + 8027f76: 4293 cmp r3, r2 + 8027f78: d008 beq.n 8027f8c + 8027f7a: 687b ldr r3, [r7, #4] + 8027f7c: 681b ldr r3, [r3, #0] + 8027f7e: 4a1b ldr r2, [pc, #108] ; (8027fec ) + 8027f80: 4293 cmp r3, r2 + 8027f82: d003 beq.n 8027f8c + 8027f84: 687b ldr r3, [r7, #4] + 8027f86: 681b ldr r3, [r3, #0] + 8027f88: 4a19 ldr r2, [pc, #100] ; (8027ff0 ) + 8027f8a: 4293 cmp r3, r2 + 8027f8c: bf00 nop /* Check the request parameter */ assert_param(IS_BDMA_REQUEST(hdma->Init.Request)); } /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; - 8027f0a: 687b ldr r3, [r7, #4] - 8027f0c: 2202 movs r2, #2 - 8027f0e: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8027f8e: 687b ldr r3, [r7, #4] + 8027f90: 2202 movs r2, #2 + 8027f92: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Allocate lock resource */ __HAL_UNLOCK(hdma); - 8027f12: 687b ldr r3, [r7, #4] - 8027f14: 2200 movs r2, #0 - 8027f16: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8027f96: 687b ldr r3, [r7, #4] + 8027f98: 2200 movs r2, #0 + 8027f9a: f883 2034 strb.w r2, [r3, #52] ; 0x34 /* Get the CR register value */ registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR; - 8027f1a: 687b ldr r3, [r7, #4] - 8027f1c: 681b ldr r3, [r3, #0] - 8027f1e: 681b ldr r3, [r3, #0] - 8027f20: 617b str r3, [r7, #20] + 8027f9e: 687b ldr r3, [r7, #4] + 8027fa0: 681b ldr r3, [r3, #0] + 8027fa2: 681b ldr r3, [r3, #0] + 8027fa4: 617b str r3, [r7, #20] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, MEM2MEM, DBM and CT bits */ registerValue &= ((uint32_t)~(BDMA_CCR_PL | BDMA_CCR_MSIZE | BDMA_CCR_PSIZE | \ - 8027f22: 697a ldr r2, [r7, #20] - 8027f24: 4b12 ldr r3, [pc, #72] ; (8027f70 ) - 8027f26: 4013 ands r3, r2 - 8027f28: 617b str r3, [r7, #20] + 8027fa6: 697a ldr r2, [r7, #20] + 8027fa8: 4b12 ldr r3, [pc, #72] ; (8027ff4 ) + 8027faa: 4013 ands r3, r2 + 8027fac: 617b str r3, [r7, #20] BDMA_CCR_MINC | BDMA_CCR_PINC | BDMA_CCR_CIRC | \ BDMA_CCR_DIR | BDMA_CCR_MEM2MEM | BDMA_CCR_DBM | \ BDMA_CCR_CT)); /* Prepare the DMA Channel configuration */ registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) | - 8027f2a: 687b ldr r3, [r7, #4] - 8027f2c: 689b ldr r3, [r3, #8] - 8027f2e: 2b40 cmp r3, #64 ; 0x40 - 8027f30: d020 beq.n 8027f74 - 8027f32: 687b ldr r3, [r7, #4] - 8027f34: 689b ldr r3, [r3, #8] - 8027f36: 2b80 cmp r3, #128 ; 0x80 - 8027f38: d102 bne.n 8027f40 - 8027f3a: f44f 4380 mov.w r3, #16384 ; 0x4000 - 8027f3e: e01a b.n 8027f76 - 8027f40: 2300 movs r3, #0 - 8027f42: e018 b.n 8027f76 - 8027f44: fe10803f .word 0xfe10803f - 8027f48: 5c001000 .word 0x5c001000 - 8027f4c: ffff0000 .word 0xffff0000 - 8027f50: 58025408 .word 0x58025408 - 8027f54: 5802541c .word 0x5802541c - 8027f58: 58025430 .word 0x58025430 - 8027f5c: 58025444 .word 0x58025444 - 8027f60: 58025458 .word 0x58025458 - 8027f64: 5802546c .word 0x5802546c - 8027f68: 58025480 .word 0x58025480 - 8027f6c: 58025494 .word 0x58025494 - 8027f70: fffe000f .word 0xfffe000f - 8027f74: 2310 movs r3, #16 + 8027fae: 687b ldr r3, [r7, #4] + 8027fb0: 689b ldr r3, [r3, #8] + 8027fb2: 2b40 cmp r3, #64 ; 0x40 + 8027fb4: d020 beq.n 8027ff8 + 8027fb6: 687b ldr r3, [r7, #4] + 8027fb8: 689b ldr r3, [r3, #8] + 8027fba: 2b80 cmp r3, #128 ; 0x80 + 8027fbc: d102 bne.n 8027fc4 + 8027fbe: f44f 4380 mov.w r3, #16384 ; 0x4000 + 8027fc2: e01a b.n 8027ffa + 8027fc4: 2300 movs r3, #0 + 8027fc6: e018 b.n 8027ffa + 8027fc8: fe10803f .word 0xfe10803f + 8027fcc: 5c001000 .word 0x5c001000 + 8027fd0: ffff0000 .word 0xffff0000 + 8027fd4: 58025408 .word 0x58025408 + 8027fd8: 5802541c .word 0x5802541c + 8027fdc: 58025430 .word 0x58025430 + 8027fe0: 58025444 .word 0x58025444 + 8027fe4: 58025458 .word 0x58025458 + 8027fe8: 5802546c .word 0x5802546c + 8027fec: 58025480 .word 0x58025480 + 8027ff0: 58025494 .word 0x58025494 + 8027ff4: fffe000f .word 0xfffe000f + 8027ff8: 2310 movs r3, #16 DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc) | - 8027f76: 687a ldr r2, [r7, #4] - 8027f78: 68d2 ldr r2, [r2, #12] - 8027f7a: 08d2 lsrs r2, r2, #3 + 8027ffa: 687a ldr r2, [r7, #4] + 8027ffc: 68d2 ldr r2, [r2, #12] + 8027ffe: 08d2 lsrs r2, r2, #3 registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) | - 8027f7c: 431a orrs r2, r3 + 8028000: 431a orrs r2, r3 DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc) | - 8027f7e: 687b ldr r3, [r7, #4] - 8027f80: 691b ldr r3, [r3, #16] - 8027f82: 08db lsrs r3, r3, #3 + 8028002: 687b ldr r3, [r7, #4] + 8028004: 691b ldr r3, [r3, #16] + 8028006: 08db lsrs r3, r3, #3 DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc) | - 8027f84: 431a orrs r2, r3 + 8028008: 431a orrs r2, r3 DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) | - 8027f86: 687b ldr r3, [r7, #4] - 8027f88: 695b ldr r3, [r3, #20] - 8027f8a: 08db lsrs r3, r3, #3 + 802800a: 687b ldr r3, [r7, #4] + 802800c: 695b ldr r3, [r3, #20] + 802800e: 08db lsrs r3, r3, #3 DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc) | - 8027f8c: 431a orrs r2, r3 + 8028010: 431a orrs r2, r3 DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment) | - 8027f8e: 687b ldr r3, [r7, #4] - 8027f90: 699b ldr r3, [r3, #24] - 8027f92: 08db lsrs r3, r3, #3 + 8028012: 687b ldr r3, [r7, #4] + 8028014: 699b ldr r3, [r3, #24] + 8028016: 08db lsrs r3, r3, #3 DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) | - 8027f94: 431a orrs r2, r3 + 8028018: 431a orrs r2, r3 DMA_TO_BDMA_MODE(hdma->Init.Mode) | - 8027f96: 687b ldr r3, [r7, #4] - 8027f98: 69db ldr r3, [r3, #28] - 8027f9a: 08db lsrs r3, r3, #3 + 802801a: 687b ldr r3, [r7, #4] + 802801c: 69db ldr r3, [r3, #28] + 802801e: 08db lsrs r3, r3, #3 DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment) | - 8027f9c: 431a orrs r2, r3 + 8028020: 431a orrs r2, r3 DMA_TO_BDMA_PRIORITY(hdma->Init.Priority); - 8027f9e: 687b ldr r3, [r7, #4] - 8027fa0: 6a1b ldr r3, [r3, #32] - 8027fa2: 091b lsrs r3, r3, #4 + 8028022: 687b ldr r3, [r7, #4] + 8028024: 6a1b ldr r3, [r3, #32] + 8028026: 091b lsrs r3, r3, #4 DMA_TO_BDMA_MODE(hdma->Init.Mode) | - 8027fa4: 4313 orrs r3, r2 + 8028028: 4313 orrs r3, r2 registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) | - 8027fa6: 697a ldr r2, [r7, #20] - 8027fa8: 4313 orrs r3, r2 - 8027faa: 617b str r3, [r7, #20] + 802802a: 697a ldr r2, [r7, #20] + 802802c: 4313 orrs r3, r2 + 802802e: 617b str r3, [r7, #20] /* Write to DMA Channel CR register */ ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR = registerValue; - 8027fac: 687b ldr r3, [r7, #4] - 8027fae: 681b ldr r3, [r3, #0] - 8027fb0: 697a ldr r2, [r7, #20] - 8027fb2: 601a str r2, [r3, #0] + 8028030: 687b ldr r3, [r7, #4] + 8028032: 681b ldr r3, [r3, #0] + 8028034: 697a ldr r2, [r7, #20] + 8028036: 601a str r2, [r3, #0] /* calculation of the channel index */ hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_t)BDMA_Channel1 - (uint32_t)BDMA_Channel0)) << 2U; - 8027fb4: 687b ldr r3, [r7, #4] - 8027fb6: 681b ldr r3, [r3, #0] - 8027fb8: 461a mov r2, r3 - 8027fba: 4b6e ldr r3, [pc, #440] ; (8028174 ) - 8027fbc: 4413 add r3, r2 - 8027fbe: 4a6e ldr r2, [pc, #440] ; (8028178 ) - 8027fc0: fba2 2303 umull r2, r3, r2, r3 - 8027fc4: 091b lsrs r3, r3, #4 - 8027fc6: 009a lsls r2, r3, #2 - 8027fc8: 687b ldr r3, [r7, #4] - 8027fca: 65da str r2, [r3, #92] ; 0x5c + 8028038: 687b ldr r3, [r7, #4] + 802803a: 681b ldr r3, [r3, #0] + 802803c: 461a mov r2, r3 + 802803e: 4b6e ldr r3, [pc, #440] ; (80281f8 ) + 8028040: 4413 add r3, r2 + 8028042: 4a6e ldr r2, [pc, #440] ; (80281fc ) + 8028044: fba2 2303 umull r2, r3, r2, r3 + 8028048: 091b lsrs r3, r3, #4 + 802804a: 009a lsls r2, r3, #2 + 802804c: 687b ldr r3, [r7, #4] + 802804e: 65da str r2, [r3, #92] ; 0x5c /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ regs_bdma = (BDMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma); - 8027fcc: 6878 ldr r0, [r7, #4] - 8027fce: f002 f9b7 bl 802a340 - 8027fd2: 4603 mov r3, r0 - 8027fd4: 60fb str r3, [r7, #12] + 8028050: 6878 ldr r0, [r7, #4] + 8028052: f002 f9b7 bl 802a3c4 + 8028056: 4603 mov r3, r0 + 8028058: 60fb str r3, [r7, #12] /* Clear all interrupt flags */ regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); - 8027fd6: 687b ldr r3, [r7, #4] - 8027fd8: 6ddb ldr r3, [r3, #92] ; 0x5c - 8027fda: f003 031f and.w r3, r3, #31 - 8027fde: 2201 movs r2, #1 - 8027fe0: 409a lsls r2, r3 - 8027fe2: 68fb ldr r3, [r7, #12] - 8027fe4: 605a str r2, [r3, #4] - 8027fe6: e008 b.n 8027ffa + 802805a: 687b ldr r3, [r7, #4] + 802805c: 6ddb ldr r3, [r3, #92] ; 0x5c + 802805e: f003 031f and.w r3, r3, #31 + 8028062: 2201 movs r2, #1 + 8028064: 409a lsls r2, r3 + 8028066: 68fb ldr r3, [r7, #12] + 8028068: 605a str r2, [r3, #4] + 802806a: e008 b.n 802807e } else { hdma->ErrorCode = HAL_DMA_ERROR_PARAM; - 8027fe8: 687b ldr r3, [r7, #4] - 8027fea: 2240 movs r2, #64 ; 0x40 - 8027fec: 655a str r2, [r3, #84] ; 0x54 + 802806c: 687b ldr r3, [r7, #4] + 802806e: 2240 movs r2, #64 ; 0x40 + 8028070: 655a str r2, [r3, #84] ; 0x54 hdma->State = HAL_DMA_STATE_ERROR; - 8027fee: 687b ldr r3, [r7, #4] - 8027ff0: 2203 movs r2, #3 - 8027ff2: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8028072: 687b ldr r3, [r7, #4] + 8028074: 2203 movs r2, #3 + 8028076: f883 2035 strb.w r2, [r3, #53] ; 0x35 return HAL_ERROR; - 8027ff6: 2301 movs r3, #1 - 8027ff8: e0b7 b.n 802816a + 802807a: 2301 movs r3, #1 + 802807c: e0b7 b.n 80281ee } if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 8027ffa: 687b ldr r3, [r7, #4] - 8027ffc: 681b ldr r3, [r3, #0] - 8027ffe: 4a5f ldr r2, [pc, #380] ; (802817c ) - 8028000: 4293 cmp r3, r2 - 8028002: d072 beq.n 80280ea - 8028004: 687b ldr r3, [r7, #4] - 8028006: 681b ldr r3, [r3, #0] - 8028008: 4a5d ldr r2, [pc, #372] ; (8028180 ) - 802800a: 4293 cmp r3, r2 - 802800c: d06d beq.n 80280ea - 802800e: 687b ldr r3, [r7, #4] - 8028010: 681b ldr r3, [r3, #0] - 8028012: 4a5c ldr r2, [pc, #368] ; (8028184 ) - 8028014: 4293 cmp r3, r2 - 8028016: d068 beq.n 80280ea - 8028018: 687b ldr r3, [r7, #4] - 802801a: 681b ldr r3, [r3, #0] - 802801c: 4a5a ldr r2, [pc, #360] ; (8028188 ) - 802801e: 4293 cmp r3, r2 - 8028020: d063 beq.n 80280ea - 8028022: 687b ldr r3, [r7, #4] - 8028024: 681b ldr r3, [r3, #0] - 8028026: 4a59 ldr r2, [pc, #356] ; (802818c ) - 8028028: 4293 cmp r3, r2 - 802802a: d05e beq.n 80280ea - 802802c: 687b ldr r3, [r7, #4] - 802802e: 681b ldr r3, [r3, #0] - 8028030: 4a57 ldr r2, [pc, #348] ; (8028190 ) - 8028032: 4293 cmp r3, r2 - 8028034: d059 beq.n 80280ea - 8028036: 687b ldr r3, [r7, #4] - 8028038: 681b ldr r3, [r3, #0] - 802803a: 4a56 ldr r2, [pc, #344] ; (8028194 ) - 802803c: 4293 cmp r3, r2 - 802803e: d054 beq.n 80280ea - 8028040: 687b ldr r3, [r7, #4] - 8028042: 681b ldr r3, [r3, #0] - 8028044: 4a54 ldr r2, [pc, #336] ; (8028198 ) - 8028046: 4293 cmp r3, r2 - 8028048: d04f beq.n 80280ea - 802804a: 687b ldr r3, [r7, #4] - 802804c: 681b ldr r3, [r3, #0] - 802804e: 4a53 ldr r2, [pc, #332] ; (802819c ) - 8028050: 4293 cmp r3, r2 - 8028052: d04a beq.n 80280ea - 8028054: 687b ldr r3, [r7, #4] - 8028056: 681b ldr r3, [r3, #0] - 8028058: 4a51 ldr r2, [pc, #324] ; (80281a0 ) - 802805a: 4293 cmp r3, r2 - 802805c: d045 beq.n 80280ea - 802805e: 687b ldr r3, [r7, #4] - 8028060: 681b ldr r3, [r3, #0] - 8028062: 4a50 ldr r2, [pc, #320] ; (80281a4 ) - 8028064: 4293 cmp r3, r2 - 8028066: d040 beq.n 80280ea - 8028068: 687b ldr r3, [r7, #4] - 802806a: 681b ldr r3, [r3, #0] - 802806c: 4a4e ldr r2, [pc, #312] ; (80281a8 ) - 802806e: 4293 cmp r3, r2 - 8028070: d03b beq.n 80280ea - 8028072: 687b ldr r3, [r7, #4] - 8028074: 681b ldr r3, [r3, #0] - 8028076: 4a4d ldr r2, [pc, #308] ; (80281ac ) - 8028078: 4293 cmp r3, r2 - 802807a: d036 beq.n 80280ea - 802807c: 687b ldr r3, [r7, #4] - 802807e: 681b ldr r3, [r3, #0] - 8028080: 4a4b ldr r2, [pc, #300] ; (80281b0 ) - 8028082: 4293 cmp r3, r2 - 8028084: d031 beq.n 80280ea - 8028086: 687b ldr r3, [r7, #4] - 8028088: 681b ldr r3, [r3, #0] - 802808a: 4a4a ldr r2, [pc, #296] ; (80281b4 ) - 802808c: 4293 cmp r3, r2 - 802808e: d02c beq.n 80280ea - 8028090: 687b ldr r3, [r7, #4] - 8028092: 681b ldr r3, [r3, #0] - 8028094: 4a48 ldr r2, [pc, #288] ; (80281b8 ) - 8028096: 4293 cmp r3, r2 - 8028098: d027 beq.n 80280ea - 802809a: 687b ldr r3, [r7, #4] - 802809c: 681b ldr r3, [r3, #0] - 802809e: 4a47 ldr r2, [pc, #284] ; (80281bc ) - 80280a0: 4293 cmp r3, r2 - 80280a2: d022 beq.n 80280ea - 80280a4: 687b ldr r3, [r7, #4] - 80280a6: 681b ldr r3, [r3, #0] - 80280a8: 4a45 ldr r2, [pc, #276] ; (80281c0 ) - 80280aa: 4293 cmp r3, r2 - 80280ac: d01d beq.n 80280ea - 80280ae: 687b ldr r3, [r7, #4] - 80280b0: 681b ldr r3, [r3, #0] - 80280b2: 4a44 ldr r2, [pc, #272] ; (80281c4 ) - 80280b4: 4293 cmp r3, r2 - 80280b6: d018 beq.n 80280ea - 80280b8: 687b ldr r3, [r7, #4] - 80280ba: 681b ldr r3, [r3, #0] - 80280bc: 4a42 ldr r2, [pc, #264] ; (80281c8 ) - 80280be: 4293 cmp r3, r2 - 80280c0: d013 beq.n 80280ea - 80280c2: 687b ldr r3, [r7, #4] - 80280c4: 681b ldr r3, [r3, #0] - 80280c6: 4a41 ldr r2, [pc, #260] ; (80281cc ) - 80280c8: 4293 cmp r3, r2 - 80280ca: d00e beq.n 80280ea - 80280cc: 687b ldr r3, [r7, #4] - 80280ce: 681b ldr r3, [r3, #0] - 80280d0: 4a3f ldr r2, [pc, #252] ; (80281d0 ) - 80280d2: 4293 cmp r3, r2 - 80280d4: d009 beq.n 80280ea - 80280d6: 687b ldr r3, [r7, #4] - 80280d8: 681b ldr r3, [r3, #0] - 80280da: 4a3e ldr r2, [pc, #248] ; (80281d4 ) - 80280dc: 4293 cmp r3, r2 - 80280de: d004 beq.n 80280ea - 80280e0: 687b ldr r3, [r7, #4] - 80280e2: 681b ldr r3, [r3, #0] - 80280e4: 4a3c ldr r2, [pc, #240] ; (80281d8 ) - 80280e6: 4293 cmp r3, r2 - 80280e8: d101 bne.n 80280ee - 80280ea: 2301 movs r3, #1 - 80280ec: e000 b.n 80280f0 - 80280ee: 2300 movs r3, #0 - 80280f0: 2b00 cmp r3, #0 - 80280f2: d032 beq.n 802815a + 802807e: 687b ldr r3, [r7, #4] + 8028080: 681b ldr r3, [r3, #0] + 8028082: 4a5f ldr r2, [pc, #380] ; (8028200 ) + 8028084: 4293 cmp r3, r2 + 8028086: d072 beq.n 802816e + 8028088: 687b ldr r3, [r7, #4] + 802808a: 681b ldr r3, [r3, #0] + 802808c: 4a5d ldr r2, [pc, #372] ; (8028204 ) + 802808e: 4293 cmp r3, r2 + 8028090: d06d beq.n 802816e + 8028092: 687b ldr r3, [r7, #4] + 8028094: 681b ldr r3, [r3, #0] + 8028096: 4a5c ldr r2, [pc, #368] ; (8028208 ) + 8028098: 4293 cmp r3, r2 + 802809a: d068 beq.n 802816e + 802809c: 687b ldr r3, [r7, #4] + 802809e: 681b ldr r3, [r3, #0] + 80280a0: 4a5a ldr r2, [pc, #360] ; (802820c ) + 80280a2: 4293 cmp r3, r2 + 80280a4: d063 beq.n 802816e + 80280a6: 687b ldr r3, [r7, #4] + 80280a8: 681b ldr r3, [r3, #0] + 80280aa: 4a59 ldr r2, [pc, #356] ; (8028210 ) + 80280ac: 4293 cmp r3, r2 + 80280ae: d05e beq.n 802816e + 80280b0: 687b ldr r3, [r7, #4] + 80280b2: 681b ldr r3, [r3, #0] + 80280b4: 4a57 ldr r2, [pc, #348] ; (8028214 ) + 80280b6: 4293 cmp r3, r2 + 80280b8: d059 beq.n 802816e + 80280ba: 687b ldr r3, [r7, #4] + 80280bc: 681b ldr r3, [r3, #0] + 80280be: 4a56 ldr r2, [pc, #344] ; (8028218 ) + 80280c0: 4293 cmp r3, r2 + 80280c2: d054 beq.n 802816e + 80280c4: 687b ldr r3, [r7, #4] + 80280c6: 681b ldr r3, [r3, #0] + 80280c8: 4a54 ldr r2, [pc, #336] ; (802821c ) + 80280ca: 4293 cmp r3, r2 + 80280cc: d04f beq.n 802816e + 80280ce: 687b ldr r3, [r7, #4] + 80280d0: 681b ldr r3, [r3, #0] + 80280d2: 4a53 ldr r2, [pc, #332] ; (8028220 ) + 80280d4: 4293 cmp r3, r2 + 80280d6: d04a beq.n 802816e + 80280d8: 687b ldr r3, [r7, #4] + 80280da: 681b ldr r3, [r3, #0] + 80280dc: 4a51 ldr r2, [pc, #324] ; (8028224 ) + 80280de: 4293 cmp r3, r2 + 80280e0: d045 beq.n 802816e + 80280e2: 687b ldr r3, [r7, #4] + 80280e4: 681b ldr r3, [r3, #0] + 80280e6: 4a50 ldr r2, [pc, #320] ; (8028228 ) + 80280e8: 4293 cmp r3, r2 + 80280ea: d040 beq.n 802816e + 80280ec: 687b ldr r3, [r7, #4] + 80280ee: 681b ldr r3, [r3, #0] + 80280f0: 4a4e ldr r2, [pc, #312] ; (802822c ) + 80280f2: 4293 cmp r3, r2 + 80280f4: d03b beq.n 802816e + 80280f6: 687b ldr r3, [r7, #4] + 80280f8: 681b ldr r3, [r3, #0] + 80280fa: 4a4d ldr r2, [pc, #308] ; (8028230 ) + 80280fc: 4293 cmp r3, r2 + 80280fe: d036 beq.n 802816e + 8028100: 687b ldr r3, [r7, #4] + 8028102: 681b ldr r3, [r3, #0] + 8028104: 4a4b ldr r2, [pc, #300] ; (8028234 ) + 8028106: 4293 cmp r3, r2 + 8028108: d031 beq.n 802816e + 802810a: 687b ldr r3, [r7, #4] + 802810c: 681b ldr r3, [r3, #0] + 802810e: 4a4a ldr r2, [pc, #296] ; (8028238 ) + 8028110: 4293 cmp r3, r2 + 8028112: d02c beq.n 802816e + 8028114: 687b ldr r3, [r7, #4] + 8028116: 681b ldr r3, [r3, #0] + 8028118: 4a48 ldr r2, [pc, #288] ; (802823c ) + 802811a: 4293 cmp r3, r2 + 802811c: d027 beq.n 802816e + 802811e: 687b ldr r3, [r7, #4] + 8028120: 681b ldr r3, [r3, #0] + 8028122: 4a47 ldr r2, [pc, #284] ; (8028240 ) + 8028124: 4293 cmp r3, r2 + 8028126: d022 beq.n 802816e + 8028128: 687b ldr r3, [r7, #4] + 802812a: 681b ldr r3, [r3, #0] + 802812c: 4a45 ldr r2, [pc, #276] ; (8028244 ) + 802812e: 4293 cmp r3, r2 + 8028130: d01d beq.n 802816e + 8028132: 687b ldr r3, [r7, #4] + 8028134: 681b ldr r3, [r3, #0] + 8028136: 4a44 ldr r2, [pc, #272] ; (8028248 ) + 8028138: 4293 cmp r3, r2 + 802813a: d018 beq.n 802816e + 802813c: 687b ldr r3, [r7, #4] + 802813e: 681b ldr r3, [r3, #0] + 8028140: 4a42 ldr r2, [pc, #264] ; (802824c ) + 8028142: 4293 cmp r3, r2 + 8028144: d013 beq.n 802816e + 8028146: 687b ldr r3, [r7, #4] + 8028148: 681b ldr r3, [r3, #0] + 802814a: 4a41 ldr r2, [pc, #260] ; (8028250 ) + 802814c: 4293 cmp r3, r2 + 802814e: d00e beq.n 802816e + 8028150: 687b ldr r3, [r7, #4] + 8028152: 681b ldr r3, [r3, #0] + 8028154: 4a3f ldr r2, [pc, #252] ; (8028254 ) + 8028156: 4293 cmp r3, r2 + 8028158: d009 beq.n 802816e + 802815a: 687b ldr r3, [r7, #4] + 802815c: 681b ldr r3, [r3, #0] + 802815e: 4a3e ldr r2, [pc, #248] ; (8028258 ) + 8028160: 4293 cmp r3, r2 + 8028162: d004 beq.n 802816e + 8028164: 687b ldr r3, [r7, #4] + 8028166: 681b ldr r3, [r3, #0] + 8028168: 4a3c ldr r2, [pc, #240] ; (802825c ) + 802816a: 4293 cmp r3, r2 + 802816c: d101 bne.n 8028172 + 802816e: 2301 movs r3, #1 + 8028170: e000 b.n 8028174 + 8028172: 2300 movs r3, #0 + 8028174: 2b00 cmp r3, #0 + 8028176: d032 beq.n 80281de { /* Initialize parameters for DMAMUX channel : DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask */ DMA_CalcDMAMUXChannelBaseAndMask(hdma); - 80280f4: 6878 ldr r0, [r7, #4] - 80280f6: f002 fa51 bl 802a59c + 8028178: 6878 ldr r0, [r7, #4] + 802817a: f002 fa51 bl 802a620 if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY) - 80280fa: 687b ldr r3, [r7, #4] - 80280fc: 689b ldr r3, [r3, #8] - 80280fe: 2b80 cmp r3, #128 ; 0x80 - 8028100: d102 bne.n 8028108 + 802817e: 687b ldr r3, [r7, #4] + 8028180: 689b ldr r3, [r3, #8] + 8028182: 2b80 cmp r3, #128 ; 0x80 + 8028184: d102 bne.n 802818c { /* if memory to memory force the request to 0*/ hdma->Init.Request = DMA_REQUEST_MEM2MEM; - 8028102: 687b ldr r3, [r7, #4] - 8028104: 2200 movs r2, #0 - 8028106: 605a str r2, [r3, #4] + 8028186: 687b ldr r3, [r7, #4] + 8028188: 2200 movs r2, #0 + 802818a: 605a str r2, [r3, #4] } /* Set peripheral request to DMAMUX channel */ hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID); - 8028108: 687b ldr r3, [r7, #4] - 802810a: 685a ldr r2, [r3, #4] - 802810c: 687b ldr r3, [r7, #4] - 802810e: 6e1b ldr r3, [r3, #96] ; 0x60 - 8028110: b2d2 uxtb r2, r2 - 8028112: 601a str r2, [r3, #0] + 802818c: 687b ldr r3, [r7, #4] + 802818e: 685a ldr r2, [r3, #4] + 8028190: 687b ldr r3, [r7, #4] + 8028192: 6e1b ldr r3, [r3, #96] ; 0x60 + 8028194: b2d2 uxtb r2, r2 + 8028196: 601a str r2, [r3, #0] /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 8028114: 687b ldr r3, [r7, #4] - 8028116: 6e5b ldr r3, [r3, #100] ; 0x64 - 8028118: 687a ldr r2, [r7, #4] - 802811a: 6e92 ldr r2, [r2, #104] ; 0x68 - 802811c: 605a str r2, [r3, #4] + 8028198: 687b ldr r3, [r7, #4] + 802819a: 6e5b ldr r3, [r3, #100] ; 0x64 + 802819c: 687a ldr r2, [r7, #4] + 802819e: 6e92 ldr r2, [r2, #104] ; 0x68 + 80281a0: 605a str r2, [r3, #4] /* Initialize parameters for DMAMUX request generator : if the DMA request is DMA_REQUEST_GENERATOR0 to DMA_REQUEST_GENERATOR7 */ if((hdma->Init.Request >= DMA_REQUEST_GENERATOR0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR7)) - 802811e: 687b ldr r3, [r7, #4] - 8028120: 685b ldr r3, [r3, #4] - 8028122: 2b00 cmp r3, #0 - 8028124: d010 beq.n 8028148 - 8028126: 687b ldr r3, [r7, #4] - 8028128: 685b ldr r3, [r3, #4] - 802812a: 2b08 cmp r3, #8 - 802812c: d80c bhi.n 8028148 + 80281a2: 687b ldr r3, [r7, #4] + 80281a4: 685b ldr r3, [r3, #4] + 80281a6: 2b00 cmp r3, #0 + 80281a8: d010 beq.n 80281cc + 80281aa: 687b ldr r3, [r7, #4] + 80281ac: 685b ldr r3, [r3, #4] + 80281ae: 2b08 cmp r3, #8 + 80281b0: d80c bhi.n 80281cc { /* Initialize parameters for DMAMUX request generator : DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask */ DMA_CalcDMAMUXRequestGenBaseAndMask(hdma); - 802812e: 6878 ldr r0, [r7, #4] - 8028130: f002 face bl 802a6d0 + 80281b2: 6878 ldr r0, [r7, #4] + 80281b4: f002 face bl 802a754 /* Reset the DMAMUX request generator register */ hdma->DMAmuxRequestGen->RGCR = 0U; - 8028134: 687b ldr r3, [r7, #4] - 8028136: 6edb ldr r3, [r3, #108] ; 0x6c - 8028138: 2200 movs r2, #0 - 802813a: 601a str r2, [r3, #0] + 80281b8: 687b ldr r3, [r7, #4] + 80281ba: 6edb ldr r3, [r3, #108] ; 0x6c + 80281bc: 2200 movs r2, #0 + 80281be: 601a str r2, [r3, #0] /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 802813c: 687b ldr r3, [r7, #4] - 802813e: 6f1b ldr r3, [r3, #112] ; 0x70 - 8028140: 687a ldr r2, [r7, #4] - 8028142: 6f52 ldr r2, [r2, #116] ; 0x74 - 8028144: 605a str r2, [r3, #4] - 8028146: e008 b.n 802815a + 80281c0: 687b ldr r3, [r7, #4] + 80281c2: 6f1b ldr r3, [r3, #112] ; 0x70 + 80281c4: 687a ldr r2, [r7, #4] + 80281c6: 6f52 ldr r2, [r2, #116] ; 0x74 + 80281c8: 605a str r2, [r3, #4] + 80281ca: e008 b.n 80281de } else { hdma->DMAmuxRequestGen = 0U; - 8028148: 687b ldr r3, [r7, #4] - 802814a: 2200 movs r2, #0 - 802814c: 66da str r2, [r3, #108] ; 0x6c + 80281cc: 687b ldr r3, [r7, #4] + 80281ce: 2200 movs r2, #0 + 80281d0: 66da str r2, [r3, #108] ; 0x6c hdma->DMAmuxRequestGenStatus = 0U; - 802814e: 687b ldr r3, [r7, #4] - 8028150: 2200 movs r2, #0 - 8028152: 671a str r2, [r3, #112] ; 0x70 + 80281d2: 687b ldr r3, [r7, #4] + 80281d4: 2200 movs r2, #0 + 80281d6: 671a str r2, [r3, #112] ; 0x70 hdma->DMAmuxRequestGenStatusMask = 0U; - 8028154: 687b ldr r3, [r7, #4] - 8028156: 2200 movs r2, #0 - 8028158: 675a str r2, [r3, #116] ; 0x74 + 80281d8: 687b ldr r3, [r7, #4] + 80281da: 2200 movs r2, #0 + 80281dc: 675a str r2, [r3, #116] ; 0x74 } } /* Initialize the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 802815a: 687b ldr r3, [r7, #4] - 802815c: 2200 movs r2, #0 - 802815e: 655a str r2, [r3, #84] ; 0x54 + 80281de: 687b ldr r3, [r7, #4] + 80281e0: 2200 movs r2, #0 + 80281e2: 655a str r2, [r3, #84] ; 0x54 /* Initialize the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8028160: 687b ldr r3, [r7, #4] - 8028162: 2201 movs r2, #1 - 8028164: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 80281e4: 687b ldr r3, [r7, #4] + 80281e6: 2201 movs r2, #1 + 80281e8: f883 2035 strb.w r2, [r3, #53] ; 0x35 return HAL_OK; - 8028168: 2300 movs r3, #0 -} - 802816a: 4618 mov r0, r3 - 802816c: 3718 adds r7, #24 - 802816e: 46bd mov sp, r7 - 8028170: bd80 pop {r7, pc} - 8028172: bf00 nop - 8028174: a7fdabf8 .word 0xa7fdabf8 - 8028178: cccccccd .word 0xcccccccd - 802817c: 40020010 .word 0x40020010 - 8028180: 40020028 .word 0x40020028 - 8028184: 40020040 .word 0x40020040 - 8028188: 40020058 .word 0x40020058 - 802818c: 40020070 .word 0x40020070 - 8028190: 40020088 .word 0x40020088 - 8028194: 400200a0 .word 0x400200a0 - 8028198: 400200b8 .word 0x400200b8 - 802819c: 40020410 .word 0x40020410 - 80281a0: 40020428 .word 0x40020428 - 80281a4: 40020440 .word 0x40020440 - 80281a8: 40020458 .word 0x40020458 - 80281ac: 40020470 .word 0x40020470 - 80281b0: 40020488 .word 0x40020488 - 80281b4: 400204a0 .word 0x400204a0 - 80281b8: 400204b8 .word 0x400204b8 - 80281bc: 58025408 .word 0x58025408 - 80281c0: 5802541c .word 0x5802541c - 80281c4: 58025430 .word 0x58025430 - 80281c8: 58025444 .word 0x58025444 - 80281cc: 58025458 .word 0x58025458 - 80281d0: 5802546c .word 0x5802546c - 80281d4: 58025480 .word 0x58025480 - 80281d8: 58025494 .word 0x58025494 - -080281dc : + 80281ec: 2300 movs r3, #0 +} + 80281ee: 4618 mov r0, r3 + 80281f0: 3718 adds r7, #24 + 80281f2: 46bd mov sp, r7 + 80281f4: bd80 pop {r7, pc} + 80281f6: bf00 nop + 80281f8: a7fdabf8 .word 0xa7fdabf8 + 80281fc: cccccccd .word 0xcccccccd + 8028200: 40020010 .word 0x40020010 + 8028204: 40020028 .word 0x40020028 + 8028208: 40020040 .word 0x40020040 + 802820c: 40020058 .word 0x40020058 + 8028210: 40020070 .word 0x40020070 + 8028214: 40020088 .word 0x40020088 + 8028218: 400200a0 .word 0x400200a0 + 802821c: 400200b8 .word 0x400200b8 + 8028220: 40020410 .word 0x40020410 + 8028224: 40020428 .word 0x40020428 + 8028228: 40020440 .word 0x40020440 + 802822c: 40020458 .word 0x40020458 + 8028230: 40020470 .word 0x40020470 + 8028234: 40020488 .word 0x40020488 + 8028238: 400204a0 .word 0x400204a0 + 802823c: 400204b8 .word 0x400204b8 + 8028240: 58025408 .word 0x58025408 + 8028244: 5802541c .word 0x5802541c + 8028248: 58025430 .word 0x58025430 + 802824c: 58025444 .word 0x58025444 + 8028250: 58025458 .word 0x58025458 + 8028254: 5802546c .word 0x5802546c + 8028258: 58025480 .word 0x58025480 + 802825c: 58025494 .word 0x58025494 + +08028260 : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { - 80281dc: b580 push {r7, lr} - 80281de: b086 sub sp, #24 - 80281e0: af00 add r7, sp, #0 - 80281e2: 60f8 str r0, [r7, #12] - 80281e4: 60b9 str r1, [r7, #8] - 80281e6: 607a str r2, [r7, #4] - 80281e8: 603b str r3, [r7, #0] + 8028260: b580 push {r7, lr} + 8028262: b086 sub sp, #24 + 8028264: af00 add r7, sp, #0 + 8028266: 60f8 str r0, [r7, #12] + 8028268: 60b9 str r1, [r7, #8] + 802826a: 607a str r2, [r7, #4] + 802826c: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 80281ea: 2300 movs r3, #0 - 80281ec: 75fb strb r3, [r7, #23] + 802826e: 2300 movs r3, #0 + 8028270: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Check the DMA peripheral handle */ if(hdma == NULL) - 80281ee: 68fb ldr r3, [r7, #12] - 80281f0: 2b00 cmp r3, #0 - 80281f2: d101 bne.n 80281f8 + 8028272: 68fb ldr r3, [r7, #12] + 8028274: 2b00 cmp r3, #0 + 8028276: d101 bne.n 802827c { return HAL_ERROR; - 80281f4: 2301 movs r3, #1 - 80281f6: e226 b.n 8028646 + 8028278: 2301 movs r3, #1 + 802827a: e226 b.n 80286ca } /* Process locked */ __HAL_LOCK(hdma); - 80281f8: 68fb ldr r3, [r7, #12] - 80281fa: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 80281fe: 2b01 cmp r3, #1 - 8028200: d101 bne.n 8028206 - 8028202: 2302 movs r3, #2 - 8028204: e21f b.n 8028646 - 8028206: 68fb ldr r3, [r7, #12] - 8028208: 2201 movs r2, #1 - 802820a: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 802827c: 68fb ldr r3, [r7, #12] + 802827e: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8028282: 2b01 cmp r3, #1 + 8028284: d101 bne.n 802828a + 8028286: 2302 movs r3, #2 + 8028288: e21f b.n 80286ca + 802828a: 68fb ldr r3, [r7, #12] + 802828c: 2201 movs r2, #1 + 802828e: f883 2034 strb.w r2, [r3, #52] ; 0x34 if(HAL_DMA_STATE_READY == hdma->State) - 802820e: 68fb ldr r3, [r7, #12] - 8028210: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 8028214: b2db uxtb r3, r3 - 8028216: 2b01 cmp r3, #1 - 8028218: f040 820a bne.w 8028630 + 8028292: 68fb ldr r3, [r7, #12] + 8028294: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8028298: b2db uxtb r3, r3 + 802829a: 2b01 cmp r3, #1 + 802829c: f040 820a bne.w 80286b4 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; - 802821c: 68fb ldr r3, [r7, #12] - 802821e: 2202 movs r2, #2 - 8028220: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 80282a0: 68fb ldr r3, [r7, #12] + 80282a2: 2202 movs r2, #2 + 80282a4: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Initialize the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8028224: 68fb ldr r3, [r7, #12] - 8028226: 2200 movs r2, #0 - 8028228: 655a str r2, [r3, #84] ; 0x54 + 80282a8: 68fb ldr r3, [r7, #12] + 80282aa: 2200 movs r2, #0 + 80282ac: 655a str r2, [r3, #84] ; 0x54 /* Disable the peripheral */ __HAL_DMA_DISABLE(hdma); - 802822a: 68fb ldr r3, [r7, #12] - 802822c: 681b ldr r3, [r3, #0] - 802822e: 4a68 ldr r2, [pc, #416] ; (80283d0 ) - 8028230: 4293 cmp r3, r2 - 8028232: d04a beq.n 80282ca - 8028234: 68fb ldr r3, [r7, #12] - 8028236: 681b ldr r3, [r3, #0] - 8028238: 4a66 ldr r2, [pc, #408] ; (80283d4 ) - 802823a: 4293 cmp r3, r2 - 802823c: d045 beq.n 80282ca - 802823e: 68fb ldr r3, [r7, #12] - 8028240: 681b ldr r3, [r3, #0] - 8028242: 4a65 ldr r2, [pc, #404] ; (80283d8 ) - 8028244: 4293 cmp r3, r2 - 8028246: d040 beq.n 80282ca - 8028248: 68fb ldr r3, [r7, #12] - 802824a: 681b ldr r3, [r3, #0] - 802824c: 4a63 ldr r2, [pc, #396] ; (80283dc ) - 802824e: 4293 cmp r3, r2 - 8028250: d03b beq.n 80282ca - 8028252: 68fb ldr r3, [r7, #12] - 8028254: 681b ldr r3, [r3, #0] - 8028256: 4a62 ldr r2, [pc, #392] ; (80283e0 ) - 8028258: 4293 cmp r3, r2 - 802825a: d036 beq.n 80282ca - 802825c: 68fb ldr r3, [r7, #12] - 802825e: 681b ldr r3, [r3, #0] - 8028260: 4a60 ldr r2, [pc, #384] ; (80283e4 ) - 8028262: 4293 cmp r3, r2 - 8028264: d031 beq.n 80282ca - 8028266: 68fb ldr r3, [r7, #12] - 8028268: 681b ldr r3, [r3, #0] - 802826a: 4a5f ldr r2, [pc, #380] ; (80283e8 ) - 802826c: 4293 cmp r3, r2 - 802826e: d02c beq.n 80282ca - 8028270: 68fb ldr r3, [r7, #12] - 8028272: 681b ldr r3, [r3, #0] - 8028274: 4a5d ldr r2, [pc, #372] ; (80283ec ) - 8028276: 4293 cmp r3, r2 - 8028278: d027 beq.n 80282ca - 802827a: 68fb ldr r3, [r7, #12] - 802827c: 681b ldr r3, [r3, #0] - 802827e: 4a5c ldr r2, [pc, #368] ; (80283f0 ) - 8028280: 4293 cmp r3, r2 - 8028282: d022 beq.n 80282ca - 8028284: 68fb ldr r3, [r7, #12] - 8028286: 681b ldr r3, [r3, #0] - 8028288: 4a5a ldr r2, [pc, #360] ; (80283f4 ) - 802828a: 4293 cmp r3, r2 - 802828c: d01d beq.n 80282ca - 802828e: 68fb ldr r3, [r7, #12] - 8028290: 681b ldr r3, [r3, #0] - 8028292: 4a59 ldr r2, [pc, #356] ; (80283f8 ) - 8028294: 4293 cmp r3, r2 - 8028296: d018 beq.n 80282ca - 8028298: 68fb ldr r3, [r7, #12] - 802829a: 681b ldr r3, [r3, #0] - 802829c: 4a57 ldr r2, [pc, #348] ; (80283fc ) - 802829e: 4293 cmp r3, r2 - 80282a0: d013 beq.n 80282ca - 80282a2: 68fb ldr r3, [r7, #12] - 80282a4: 681b ldr r3, [r3, #0] - 80282a6: 4a56 ldr r2, [pc, #344] ; (8028400 ) - 80282a8: 4293 cmp r3, r2 - 80282aa: d00e beq.n 80282ca - 80282ac: 68fb ldr r3, [r7, #12] - 80282ae: 681b ldr r3, [r3, #0] - 80282b0: 4a54 ldr r2, [pc, #336] ; (8028404 ) - 80282b2: 4293 cmp r3, r2 - 80282b4: d009 beq.n 80282ca - 80282b6: 68fb ldr r3, [r7, #12] - 80282b8: 681b ldr r3, [r3, #0] - 80282ba: 4a53 ldr r2, [pc, #332] ; (8028408 ) - 80282bc: 4293 cmp r3, r2 - 80282be: d004 beq.n 80282ca - 80282c0: 68fb ldr r3, [r7, #12] - 80282c2: 681b ldr r3, [r3, #0] - 80282c4: 4a51 ldr r2, [pc, #324] ; (802840c ) - 80282c6: 4293 cmp r3, r2 - 80282c8: d108 bne.n 80282dc - 80282ca: 68fb ldr r3, [r7, #12] - 80282cc: 681b ldr r3, [r3, #0] - 80282ce: 681a ldr r2, [r3, #0] - 80282d0: 68fb ldr r3, [r7, #12] - 80282d2: 681b ldr r3, [r3, #0] - 80282d4: f022 0201 bic.w r2, r2, #1 - 80282d8: 601a str r2, [r3, #0] - 80282da: e007 b.n 80282ec - 80282dc: 68fb ldr r3, [r7, #12] - 80282de: 681b ldr r3, [r3, #0] - 80282e0: 681a ldr r2, [r3, #0] - 80282e2: 68fb ldr r3, [r7, #12] - 80282e4: 681b ldr r3, [r3, #0] - 80282e6: f022 0201 bic.w r2, r2, #1 - 80282ea: 601a str r2, [r3, #0] + 80282ae: 68fb ldr r3, [r7, #12] + 80282b0: 681b ldr r3, [r3, #0] + 80282b2: 4a68 ldr r2, [pc, #416] ; (8028454 ) + 80282b4: 4293 cmp r3, r2 + 80282b6: d04a beq.n 802834e + 80282b8: 68fb ldr r3, [r7, #12] + 80282ba: 681b ldr r3, [r3, #0] + 80282bc: 4a66 ldr r2, [pc, #408] ; (8028458 ) + 80282be: 4293 cmp r3, r2 + 80282c0: d045 beq.n 802834e + 80282c2: 68fb ldr r3, [r7, #12] + 80282c4: 681b ldr r3, [r3, #0] + 80282c6: 4a65 ldr r2, [pc, #404] ; (802845c ) + 80282c8: 4293 cmp r3, r2 + 80282ca: d040 beq.n 802834e + 80282cc: 68fb ldr r3, [r7, #12] + 80282ce: 681b ldr r3, [r3, #0] + 80282d0: 4a63 ldr r2, [pc, #396] ; (8028460 ) + 80282d2: 4293 cmp r3, r2 + 80282d4: d03b beq.n 802834e + 80282d6: 68fb ldr r3, [r7, #12] + 80282d8: 681b ldr r3, [r3, #0] + 80282da: 4a62 ldr r2, [pc, #392] ; (8028464 ) + 80282dc: 4293 cmp r3, r2 + 80282de: d036 beq.n 802834e + 80282e0: 68fb ldr r3, [r7, #12] + 80282e2: 681b ldr r3, [r3, #0] + 80282e4: 4a60 ldr r2, [pc, #384] ; (8028468 ) + 80282e6: 4293 cmp r3, r2 + 80282e8: d031 beq.n 802834e + 80282ea: 68fb ldr r3, [r7, #12] + 80282ec: 681b ldr r3, [r3, #0] + 80282ee: 4a5f ldr r2, [pc, #380] ; (802846c ) + 80282f0: 4293 cmp r3, r2 + 80282f2: d02c beq.n 802834e + 80282f4: 68fb ldr r3, [r7, #12] + 80282f6: 681b ldr r3, [r3, #0] + 80282f8: 4a5d ldr r2, [pc, #372] ; (8028470 ) + 80282fa: 4293 cmp r3, r2 + 80282fc: d027 beq.n 802834e + 80282fe: 68fb ldr r3, [r7, #12] + 8028300: 681b ldr r3, [r3, #0] + 8028302: 4a5c ldr r2, [pc, #368] ; (8028474 ) + 8028304: 4293 cmp r3, r2 + 8028306: d022 beq.n 802834e + 8028308: 68fb ldr r3, [r7, #12] + 802830a: 681b ldr r3, [r3, #0] + 802830c: 4a5a ldr r2, [pc, #360] ; (8028478 ) + 802830e: 4293 cmp r3, r2 + 8028310: d01d beq.n 802834e + 8028312: 68fb ldr r3, [r7, #12] + 8028314: 681b ldr r3, [r3, #0] + 8028316: 4a59 ldr r2, [pc, #356] ; (802847c ) + 8028318: 4293 cmp r3, r2 + 802831a: d018 beq.n 802834e + 802831c: 68fb ldr r3, [r7, #12] + 802831e: 681b ldr r3, [r3, #0] + 8028320: 4a57 ldr r2, [pc, #348] ; (8028480 ) + 8028322: 4293 cmp r3, r2 + 8028324: d013 beq.n 802834e + 8028326: 68fb ldr r3, [r7, #12] + 8028328: 681b ldr r3, [r3, #0] + 802832a: 4a56 ldr r2, [pc, #344] ; (8028484 ) + 802832c: 4293 cmp r3, r2 + 802832e: d00e beq.n 802834e + 8028330: 68fb ldr r3, [r7, #12] + 8028332: 681b ldr r3, [r3, #0] + 8028334: 4a54 ldr r2, [pc, #336] ; (8028488 ) + 8028336: 4293 cmp r3, r2 + 8028338: d009 beq.n 802834e + 802833a: 68fb ldr r3, [r7, #12] + 802833c: 681b ldr r3, [r3, #0] + 802833e: 4a53 ldr r2, [pc, #332] ; (802848c ) + 8028340: 4293 cmp r3, r2 + 8028342: d004 beq.n 802834e + 8028344: 68fb ldr r3, [r7, #12] + 8028346: 681b ldr r3, [r3, #0] + 8028348: 4a51 ldr r2, [pc, #324] ; (8028490 ) + 802834a: 4293 cmp r3, r2 + 802834c: d108 bne.n 8028360 + 802834e: 68fb ldr r3, [r7, #12] + 8028350: 681b ldr r3, [r3, #0] + 8028352: 681a ldr r2, [r3, #0] + 8028354: 68fb ldr r3, [r7, #12] + 8028356: 681b ldr r3, [r3, #0] + 8028358: f022 0201 bic.w r2, r2, #1 + 802835c: 601a str r2, [r3, #0] + 802835e: e007 b.n 8028370 + 8028360: 68fb ldr r3, [r7, #12] + 8028362: 681b ldr r3, [r3, #0] + 8028364: 681a ldr r2, [r3, #0] + 8028366: 68fb ldr r3, [r7, #12] + 8028368: 681b ldr r3, [r3, #0] + 802836a: f022 0201 bic.w r2, r2, #1 + 802836e: 601a str r2, [r3, #0] /* Configure the source, destination address and the data length */ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - 80282ec: 683b ldr r3, [r7, #0] - 80282ee: 687a ldr r2, [r7, #4] - 80282f0: 68b9 ldr r1, [r7, #8] - 80282f2: 68f8 ldr r0, [r7, #12] - 80282f4: f001 fe78 bl 8029fe8 + 8028370: 683b ldr r3, [r7, #0] + 8028372: 687a ldr r2, [r7, #4] + 8028374: 68b9 ldr r1, [r7, #8] + 8028376: 68f8 ldr r0, [r7, #12] + 8028378: f001 fe78 bl 802a06c if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 80282f8: 68fb ldr r3, [r7, #12] - 80282fa: 681b ldr r3, [r3, #0] - 80282fc: 4a34 ldr r2, [pc, #208] ; (80283d0 ) - 80282fe: 4293 cmp r3, r2 - 8028300: d04a beq.n 8028398 - 8028302: 68fb ldr r3, [r7, #12] - 8028304: 681b ldr r3, [r3, #0] - 8028306: 4a33 ldr r2, [pc, #204] ; (80283d4 ) - 8028308: 4293 cmp r3, r2 - 802830a: d045 beq.n 8028398 - 802830c: 68fb ldr r3, [r7, #12] - 802830e: 681b ldr r3, [r3, #0] - 8028310: 4a31 ldr r2, [pc, #196] ; (80283d8 ) - 8028312: 4293 cmp r3, r2 - 8028314: d040 beq.n 8028398 - 8028316: 68fb ldr r3, [r7, #12] - 8028318: 681b ldr r3, [r3, #0] - 802831a: 4a30 ldr r2, [pc, #192] ; (80283dc ) - 802831c: 4293 cmp r3, r2 - 802831e: d03b beq.n 8028398 - 8028320: 68fb ldr r3, [r7, #12] - 8028322: 681b ldr r3, [r3, #0] - 8028324: 4a2e ldr r2, [pc, #184] ; (80283e0 ) - 8028326: 4293 cmp r3, r2 - 8028328: d036 beq.n 8028398 - 802832a: 68fb ldr r3, [r7, #12] - 802832c: 681b ldr r3, [r3, #0] - 802832e: 4a2d ldr r2, [pc, #180] ; (80283e4 ) - 8028330: 4293 cmp r3, r2 - 8028332: d031 beq.n 8028398 - 8028334: 68fb ldr r3, [r7, #12] - 8028336: 681b ldr r3, [r3, #0] - 8028338: 4a2b ldr r2, [pc, #172] ; (80283e8 ) - 802833a: 4293 cmp r3, r2 - 802833c: d02c beq.n 8028398 - 802833e: 68fb ldr r3, [r7, #12] - 8028340: 681b ldr r3, [r3, #0] - 8028342: 4a2a ldr r2, [pc, #168] ; (80283ec ) - 8028344: 4293 cmp r3, r2 - 8028346: d027 beq.n 8028398 - 8028348: 68fb ldr r3, [r7, #12] - 802834a: 681b ldr r3, [r3, #0] - 802834c: 4a28 ldr r2, [pc, #160] ; (80283f0 ) - 802834e: 4293 cmp r3, r2 - 8028350: d022 beq.n 8028398 - 8028352: 68fb ldr r3, [r7, #12] - 8028354: 681b ldr r3, [r3, #0] - 8028356: 4a27 ldr r2, [pc, #156] ; (80283f4 ) - 8028358: 4293 cmp r3, r2 - 802835a: d01d beq.n 8028398 - 802835c: 68fb ldr r3, [r7, #12] - 802835e: 681b ldr r3, [r3, #0] - 8028360: 4a25 ldr r2, [pc, #148] ; (80283f8 ) - 8028362: 4293 cmp r3, r2 - 8028364: d018 beq.n 8028398 - 8028366: 68fb ldr r3, [r7, #12] - 8028368: 681b ldr r3, [r3, #0] - 802836a: 4a24 ldr r2, [pc, #144] ; (80283fc ) - 802836c: 4293 cmp r3, r2 - 802836e: d013 beq.n 8028398 - 8028370: 68fb ldr r3, [r7, #12] - 8028372: 681b ldr r3, [r3, #0] - 8028374: 4a22 ldr r2, [pc, #136] ; (8028400 ) - 8028376: 4293 cmp r3, r2 - 8028378: d00e beq.n 8028398 - 802837a: 68fb ldr r3, [r7, #12] - 802837c: 681b ldr r3, [r3, #0] - 802837e: 4a21 ldr r2, [pc, #132] ; (8028404 ) - 8028380: 4293 cmp r3, r2 - 8028382: d009 beq.n 8028398 - 8028384: 68fb ldr r3, [r7, #12] - 8028386: 681b ldr r3, [r3, #0] - 8028388: 4a1f ldr r2, [pc, #124] ; (8028408 ) - 802838a: 4293 cmp r3, r2 - 802838c: d004 beq.n 8028398 - 802838e: 68fb ldr r3, [r7, #12] - 8028390: 681b ldr r3, [r3, #0] - 8028392: 4a1e ldr r2, [pc, #120] ; (802840c ) - 8028394: 4293 cmp r3, r2 - 8028396: d101 bne.n 802839c - 8028398: 2301 movs r3, #1 - 802839a: e000 b.n 802839e - 802839c: 2300 movs r3, #0 - 802839e: 2b00 cmp r3, #0 - 80283a0: d036 beq.n 8028410 + 802837c: 68fb ldr r3, [r7, #12] + 802837e: 681b ldr r3, [r3, #0] + 8028380: 4a34 ldr r2, [pc, #208] ; (8028454 ) + 8028382: 4293 cmp r3, r2 + 8028384: d04a beq.n 802841c + 8028386: 68fb ldr r3, [r7, #12] + 8028388: 681b ldr r3, [r3, #0] + 802838a: 4a33 ldr r2, [pc, #204] ; (8028458 ) + 802838c: 4293 cmp r3, r2 + 802838e: d045 beq.n 802841c + 8028390: 68fb ldr r3, [r7, #12] + 8028392: 681b ldr r3, [r3, #0] + 8028394: 4a31 ldr r2, [pc, #196] ; (802845c ) + 8028396: 4293 cmp r3, r2 + 8028398: d040 beq.n 802841c + 802839a: 68fb ldr r3, [r7, #12] + 802839c: 681b ldr r3, [r3, #0] + 802839e: 4a30 ldr r2, [pc, #192] ; (8028460 ) + 80283a0: 4293 cmp r3, r2 + 80283a2: d03b beq.n 802841c + 80283a4: 68fb ldr r3, [r7, #12] + 80283a6: 681b ldr r3, [r3, #0] + 80283a8: 4a2e ldr r2, [pc, #184] ; (8028464 ) + 80283aa: 4293 cmp r3, r2 + 80283ac: d036 beq.n 802841c + 80283ae: 68fb ldr r3, [r7, #12] + 80283b0: 681b ldr r3, [r3, #0] + 80283b2: 4a2d ldr r2, [pc, #180] ; (8028468 ) + 80283b4: 4293 cmp r3, r2 + 80283b6: d031 beq.n 802841c + 80283b8: 68fb ldr r3, [r7, #12] + 80283ba: 681b ldr r3, [r3, #0] + 80283bc: 4a2b ldr r2, [pc, #172] ; (802846c ) + 80283be: 4293 cmp r3, r2 + 80283c0: d02c beq.n 802841c + 80283c2: 68fb ldr r3, [r7, #12] + 80283c4: 681b ldr r3, [r3, #0] + 80283c6: 4a2a ldr r2, [pc, #168] ; (8028470 ) + 80283c8: 4293 cmp r3, r2 + 80283ca: d027 beq.n 802841c + 80283cc: 68fb ldr r3, [r7, #12] + 80283ce: 681b ldr r3, [r3, #0] + 80283d0: 4a28 ldr r2, [pc, #160] ; (8028474 ) + 80283d2: 4293 cmp r3, r2 + 80283d4: d022 beq.n 802841c + 80283d6: 68fb ldr r3, [r7, #12] + 80283d8: 681b ldr r3, [r3, #0] + 80283da: 4a27 ldr r2, [pc, #156] ; (8028478 ) + 80283dc: 4293 cmp r3, r2 + 80283de: d01d beq.n 802841c + 80283e0: 68fb ldr r3, [r7, #12] + 80283e2: 681b ldr r3, [r3, #0] + 80283e4: 4a25 ldr r2, [pc, #148] ; (802847c ) + 80283e6: 4293 cmp r3, r2 + 80283e8: d018 beq.n 802841c + 80283ea: 68fb ldr r3, [r7, #12] + 80283ec: 681b ldr r3, [r3, #0] + 80283ee: 4a24 ldr r2, [pc, #144] ; (8028480 ) + 80283f0: 4293 cmp r3, r2 + 80283f2: d013 beq.n 802841c + 80283f4: 68fb ldr r3, [r7, #12] + 80283f6: 681b ldr r3, [r3, #0] + 80283f8: 4a22 ldr r2, [pc, #136] ; (8028484 ) + 80283fa: 4293 cmp r3, r2 + 80283fc: d00e beq.n 802841c + 80283fe: 68fb ldr r3, [r7, #12] + 8028400: 681b ldr r3, [r3, #0] + 8028402: 4a21 ldr r2, [pc, #132] ; (8028488 ) + 8028404: 4293 cmp r3, r2 + 8028406: d009 beq.n 802841c + 8028408: 68fb ldr r3, [r7, #12] + 802840a: 681b ldr r3, [r3, #0] + 802840c: 4a1f ldr r2, [pc, #124] ; (802848c ) + 802840e: 4293 cmp r3, r2 + 8028410: d004 beq.n 802841c + 8028412: 68fb ldr r3, [r7, #12] + 8028414: 681b ldr r3, [r3, #0] + 8028416: 4a1e ldr r2, [pc, #120] ; (8028490 ) + 8028418: 4293 cmp r3, r2 + 802841a: d101 bne.n 8028420 + 802841c: 2301 movs r3, #1 + 802841e: e000 b.n 8028422 + 8028420: 2300 movs r3, #0 + 8028422: 2b00 cmp r3, #0 + 8028424: d036 beq.n 8028494 { /* Enable Common interrupts*/ MODIFY_REG(((DMA_Stream_TypeDef *)hdma->Instance)->CR, (DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT), (DMA_IT_TC | DMA_IT_TE | DMA_IT_DME)); - 80283a2: 68fb ldr r3, [r7, #12] - 80283a4: 681b ldr r3, [r3, #0] - 80283a6: 681b ldr r3, [r3, #0] - 80283a8: f023 021e bic.w r2, r3, #30 - 80283ac: 68fb ldr r3, [r7, #12] - 80283ae: 681b ldr r3, [r3, #0] - 80283b0: f042 0216 orr.w r2, r2, #22 - 80283b4: 601a str r2, [r3, #0] + 8028426: 68fb ldr r3, [r7, #12] + 8028428: 681b ldr r3, [r3, #0] + 802842a: 681b ldr r3, [r3, #0] + 802842c: f023 021e bic.w r2, r3, #30 + 8028430: 68fb ldr r3, [r7, #12] + 8028432: 681b ldr r3, [r3, #0] + 8028434: f042 0216 orr.w r2, r2, #22 + 8028438: 601a str r2, [r3, #0] if(hdma->XferHalfCpltCallback != NULL) - 80283b6: 68fb ldr r3, [r7, #12] - 80283b8: 6c1b ldr r3, [r3, #64] ; 0x40 - 80283ba: 2b00 cmp r3, #0 - 80283bc: d03e beq.n 802843c + 802843a: 68fb ldr r3, [r7, #12] + 802843c: 6c1b ldr r3, [r3, #64] ; 0x40 + 802843e: 2b00 cmp r3, #0 + 8028440: d03e beq.n 80284c0 { /* Enable Half Transfer IT if corresponding Callback is set */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR |= DMA_IT_HT; - 80283be: 68fb ldr r3, [r7, #12] - 80283c0: 681b ldr r3, [r3, #0] - 80283c2: 681a ldr r2, [r3, #0] - 80283c4: 68fb ldr r3, [r7, #12] - 80283c6: 681b ldr r3, [r3, #0] - 80283c8: f042 0208 orr.w r2, r2, #8 - 80283cc: 601a str r2, [r3, #0] - 80283ce: e035 b.n 802843c - 80283d0: 40020010 .word 0x40020010 - 80283d4: 40020028 .word 0x40020028 - 80283d8: 40020040 .word 0x40020040 - 80283dc: 40020058 .word 0x40020058 - 80283e0: 40020070 .word 0x40020070 - 80283e4: 40020088 .word 0x40020088 - 80283e8: 400200a0 .word 0x400200a0 - 80283ec: 400200b8 .word 0x400200b8 - 80283f0: 40020410 .word 0x40020410 - 80283f4: 40020428 .word 0x40020428 - 80283f8: 40020440 .word 0x40020440 - 80283fc: 40020458 .word 0x40020458 - 8028400: 40020470 .word 0x40020470 - 8028404: 40020488 .word 0x40020488 - 8028408: 400204a0 .word 0x400204a0 - 802840c: 400204b8 .word 0x400204b8 + 8028442: 68fb ldr r3, [r7, #12] + 8028444: 681b ldr r3, [r3, #0] + 8028446: 681a ldr r2, [r3, #0] + 8028448: 68fb ldr r3, [r7, #12] + 802844a: 681b ldr r3, [r3, #0] + 802844c: f042 0208 orr.w r2, r2, #8 + 8028450: 601a str r2, [r3, #0] + 8028452: e035 b.n 80284c0 + 8028454: 40020010 .word 0x40020010 + 8028458: 40020028 .word 0x40020028 + 802845c: 40020040 .word 0x40020040 + 8028460: 40020058 .word 0x40020058 + 8028464: 40020070 .word 0x40020070 + 8028468: 40020088 .word 0x40020088 + 802846c: 400200a0 .word 0x400200a0 + 8028470: 400200b8 .word 0x400200b8 + 8028474: 40020410 .word 0x40020410 + 8028478: 40020428 .word 0x40020428 + 802847c: 40020440 .word 0x40020440 + 8028480: 40020458 .word 0x40020458 + 8028484: 40020470 .word 0x40020470 + 8028488: 40020488 .word 0x40020488 + 802848c: 400204a0 .word 0x400204a0 + 8028490: 400204b8 .word 0x400204b8 } } else /* BDMA channel */ { /* Enable Common interrupts */ MODIFY_REG(((BDMA_Channel_TypeDef *)hdma->Instance)->CCR, (BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE), (BDMA_CCR_TCIE | BDMA_CCR_TEIE)); - 8028410: 68fb ldr r3, [r7, #12] - 8028412: 681b ldr r3, [r3, #0] - 8028414: 681b ldr r3, [r3, #0] - 8028416: f023 020e bic.w r2, r3, #14 - 802841a: 68fb ldr r3, [r7, #12] - 802841c: 681b ldr r3, [r3, #0] - 802841e: f042 020a orr.w r2, r2, #10 - 8028422: 601a str r2, [r3, #0] + 8028494: 68fb ldr r3, [r7, #12] + 8028496: 681b ldr r3, [r3, #0] + 8028498: 681b ldr r3, [r3, #0] + 802849a: f023 020e bic.w r2, r3, #14 + 802849e: 68fb ldr r3, [r7, #12] + 80284a0: 681b ldr r3, [r3, #0] + 80284a2: f042 020a orr.w r2, r2, #10 + 80284a6: 601a str r2, [r3, #0] if(hdma->XferHalfCpltCallback != NULL) - 8028424: 68fb ldr r3, [r7, #12] - 8028426: 6c1b ldr r3, [r3, #64] ; 0x40 - 8028428: 2b00 cmp r3, #0 - 802842a: d007 beq.n 802843c + 80284a8: 68fb ldr r3, [r7, #12] + 80284aa: 6c1b ldr r3, [r3, #64] ; 0x40 + 80284ac: 2b00 cmp r3, #0 + 80284ae: d007 beq.n 80284c0 { /*Enable Half Transfer IT if corresponding Callback is set */ ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR |= BDMA_CCR_HTIE; - 802842c: 68fb ldr r3, [r7, #12] - 802842e: 681b ldr r3, [r3, #0] - 8028430: 681a ldr r2, [r3, #0] - 8028432: 68fb ldr r3, [r7, #12] - 8028434: 681b ldr r3, [r3, #0] - 8028436: f042 0204 orr.w r2, r2, #4 - 802843a: 601a str r2, [r3, #0] + 80284b0: 68fb ldr r3, [r7, #12] + 80284b2: 681b ldr r3, [r3, #0] + 80284b4: 681a ldr r2, [r3, #0] + 80284b6: 68fb ldr r3, [r7, #12] + 80284b8: 681b ldr r3, [r3, #0] + 80284ba: f042 0204 orr.w r2, r2, #4 + 80284be: 601a str r2, [r3, #0] } } if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 802843c: 68fb ldr r3, [r7, #12] - 802843e: 681b ldr r3, [r3, #0] - 8028440: 4a83 ldr r2, [pc, #524] ; (8028650 ) - 8028442: 4293 cmp r3, r2 - 8028444: d072 beq.n 802852c - 8028446: 68fb ldr r3, [r7, #12] - 8028448: 681b ldr r3, [r3, #0] - 802844a: 4a82 ldr r2, [pc, #520] ; (8028654 ) - 802844c: 4293 cmp r3, r2 - 802844e: d06d beq.n 802852c - 8028450: 68fb ldr r3, [r7, #12] - 8028452: 681b ldr r3, [r3, #0] - 8028454: 4a80 ldr r2, [pc, #512] ; (8028658 ) - 8028456: 4293 cmp r3, r2 - 8028458: d068 beq.n 802852c - 802845a: 68fb ldr r3, [r7, #12] - 802845c: 681b ldr r3, [r3, #0] - 802845e: 4a7f ldr r2, [pc, #508] ; (802865c ) - 8028460: 4293 cmp r3, r2 - 8028462: d063 beq.n 802852c - 8028464: 68fb ldr r3, [r7, #12] - 8028466: 681b ldr r3, [r3, #0] - 8028468: 4a7d ldr r2, [pc, #500] ; (8028660 ) - 802846a: 4293 cmp r3, r2 - 802846c: d05e beq.n 802852c - 802846e: 68fb ldr r3, [r7, #12] - 8028470: 681b ldr r3, [r3, #0] - 8028472: 4a7c ldr r2, [pc, #496] ; (8028664 ) - 8028474: 4293 cmp r3, r2 - 8028476: d059 beq.n 802852c - 8028478: 68fb ldr r3, [r7, #12] - 802847a: 681b ldr r3, [r3, #0] - 802847c: 4a7a ldr r2, [pc, #488] ; (8028668 ) - 802847e: 4293 cmp r3, r2 - 8028480: d054 beq.n 802852c - 8028482: 68fb ldr r3, [r7, #12] - 8028484: 681b ldr r3, [r3, #0] - 8028486: 4a79 ldr r2, [pc, #484] ; (802866c ) - 8028488: 4293 cmp r3, r2 - 802848a: d04f beq.n 802852c - 802848c: 68fb ldr r3, [r7, #12] - 802848e: 681b ldr r3, [r3, #0] - 8028490: 4a77 ldr r2, [pc, #476] ; (8028670 ) - 8028492: 4293 cmp r3, r2 - 8028494: d04a beq.n 802852c - 8028496: 68fb ldr r3, [r7, #12] - 8028498: 681b ldr r3, [r3, #0] - 802849a: 4a76 ldr r2, [pc, #472] ; (8028674 ) - 802849c: 4293 cmp r3, r2 - 802849e: d045 beq.n 802852c - 80284a0: 68fb ldr r3, [r7, #12] - 80284a2: 681b ldr r3, [r3, #0] - 80284a4: 4a74 ldr r2, [pc, #464] ; (8028678 ) - 80284a6: 4293 cmp r3, r2 - 80284a8: d040 beq.n 802852c - 80284aa: 68fb ldr r3, [r7, #12] - 80284ac: 681b ldr r3, [r3, #0] - 80284ae: 4a73 ldr r2, [pc, #460] ; (802867c ) - 80284b0: 4293 cmp r3, r2 - 80284b2: d03b beq.n 802852c - 80284b4: 68fb ldr r3, [r7, #12] - 80284b6: 681b ldr r3, [r3, #0] - 80284b8: 4a71 ldr r2, [pc, #452] ; (8028680 ) - 80284ba: 4293 cmp r3, r2 - 80284bc: d036 beq.n 802852c - 80284be: 68fb ldr r3, [r7, #12] - 80284c0: 681b ldr r3, [r3, #0] - 80284c2: 4a70 ldr r2, [pc, #448] ; (8028684 ) - 80284c4: 4293 cmp r3, r2 - 80284c6: d031 beq.n 802852c - 80284c8: 68fb ldr r3, [r7, #12] - 80284ca: 681b ldr r3, [r3, #0] - 80284cc: 4a6e ldr r2, [pc, #440] ; (8028688 ) - 80284ce: 4293 cmp r3, r2 - 80284d0: d02c beq.n 802852c - 80284d2: 68fb ldr r3, [r7, #12] - 80284d4: 681b ldr r3, [r3, #0] - 80284d6: 4a6d ldr r2, [pc, #436] ; (802868c ) - 80284d8: 4293 cmp r3, r2 - 80284da: d027 beq.n 802852c - 80284dc: 68fb ldr r3, [r7, #12] - 80284de: 681b ldr r3, [r3, #0] - 80284e0: 4a6b ldr r2, [pc, #428] ; (8028690 ) - 80284e2: 4293 cmp r3, r2 - 80284e4: d022 beq.n 802852c - 80284e6: 68fb ldr r3, [r7, #12] - 80284e8: 681b ldr r3, [r3, #0] - 80284ea: 4a6a ldr r2, [pc, #424] ; (8028694 ) - 80284ec: 4293 cmp r3, r2 - 80284ee: d01d beq.n 802852c - 80284f0: 68fb ldr r3, [r7, #12] - 80284f2: 681b ldr r3, [r3, #0] - 80284f4: 4a68 ldr r2, [pc, #416] ; (8028698 ) - 80284f6: 4293 cmp r3, r2 - 80284f8: d018 beq.n 802852c - 80284fa: 68fb ldr r3, [r7, #12] - 80284fc: 681b ldr r3, [r3, #0] - 80284fe: 4a67 ldr r2, [pc, #412] ; (802869c ) - 8028500: 4293 cmp r3, r2 - 8028502: d013 beq.n 802852c - 8028504: 68fb ldr r3, [r7, #12] - 8028506: 681b ldr r3, [r3, #0] - 8028508: 4a65 ldr r2, [pc, #404] ; (80286a0 ) - 802850a: 4293 cmp r3, r2 - 802850c: d00e beq.n 802852c - 802850e: 68fb ldr r3, [r7, #12] - 8028510: 681b ldr r3, [r3, #0] - 8028512: 4a64 ldr r2, [pc, #400] ; (80286a4 ) - 8028514: 4293 cmp r3, r2 - 8028516: d009 beq.n 802852c - 8028518: 68fb ldr r3, [r7, #12] - 802851a: 681b ldr r3, [r3, #0] - 802851c: 4a62 ldr r2, [pc, #392] ; (80286a8 ) - 802851e: 4293 cmp r3, r2 - 8028520: d004 beq.n 802852c - 8028522: 68fb ldr r3, [r7, #12] - 8028524: 681b ldr r3, [r3, #0] - 8028526: 4a61 ldr r2, [pc, #388] ; (80286ac ) - 8028528: 4293 cmp r3, r2 - 802852a: d101 bne.n 8028530 - 802852c: 2301 movs r3, #1 - 802852e: e000 b.n 8028532 - 8028530: 2300 movs r3, #0 - 8028532: 2b00 cmp r3, #0 - 8028534: d01a beq.n 802856c + 80284c0: 68fb ldr r3, [r7, #12] + 80284c2: 681b ldr r3, [r3, #0] + 80284c4: 4a83 ldr r2, [pc, #524] ; (80286d4 ) + 80284c6: 4293 cmp r3, r2 + 80284c8: d072 beq.n 80285b0 + 80284ca: 68fb ldr r3, [r7, #12] + 80284cc: 681b ldr r3, [r3, #0] + 80284ce: 4a82 ldr r2, [pc, #520] ; (80286d8 ) + 80284d0: 4293 cmp r3, r2 + 80284d2: d06d beq.n 80285b0 + 80284d4: 68fb ldr r3, [r7, #12] + 80284d6: 681b ldr r3, [r3, #0] + 80284d8: 4a80 ldr r2, [pc, #512] ; (80286dc ) + 80284da: 4293 cmp r3, r2 + 80284dc: d068 beq.n 80285b0 + 80284de: 68fb ldr r3, [r7, #12] + 80284e0: 681b ldr r3, [r3, #0] + 80284e2: 4a7f ldr r2, [pc, #508] ; (80286e0 ) + 80284e4: 4293 cmp r3, r2 + 80284e6: d063 beq.n 80285b0 + 80284e8: 68fb ldr r3, [r7, #12] + 80284ea: 681b ldr r3, [r3, #0] + 80284ec: 4a7d ldr r2, [pc, #500] ; (80286e4 ) + 80284ee: 4293 cmp r3, r2 + 80284f0: d05e beq.n 80285b0 + 80284f2: 68fb ldr r3, [r7, #12] + 80284f4: 681b ldr r3, [r3, #0] + 80284f6: 4a7c ldr r2, [pc, #496] ; (80286e8 ) + 80284f8: 4293 cmp r3, r2 + 80284fa: d059 beq.n 80285b0 + 80284fc: 68fb ldr r3, [r7, #12] + 80284fe: 681b ldr r3, [r3, #0] + 8028500: 4a7a ldr r2, [pc, #488] ; (80286ec ) + 8028502: 4293 cmp r3, r2 + 8028504: d054 beq.n 80285b0 + 8028506: 68fb ldr r3, [r7, #12] + 8028508: 681b ldr r3, [r3, #0] + 802850a: 4a79 ldr r2, [pc, #484] ; (80286f0 ) + 802850c: 4293 cmp r3, r2 + 802850e: d04f beq.n 80285b0 + 8028510: 68fb ldr r3, [r7, #12] + 8028512: 681b ldr r3, [r3, #0] + 8028514: 4a77 ldr r2, [pc, #476] ; (80286f4 ) + 8028516: 4293 cmp r3, r2 + 8028518: d04a beq.n 80285b0 + 802851a: 68fb ldr r3, [r7, #12] + 802851c: 681b ldr r3, [r3, #0] + 802851e: 4a76 ldr r2, [pc, #472] ; (80286f8 ) + 8028520: 4293 cmp r3, r2 + 8028522: d045 beq.n 80285b0 + 8028524: 68fb ldr r3, [r7, #12] + 8028526: 681b ldr r3, [r3, #0] + 8028528: 4a74 ldr r2, [pc, #464] ; (80286fc ) + 802852a: 4293 cmp r3, r2 + 802852c: d040 beq.n 80285b0 + 802852e: 68fb ldr r3, [r7, #12] + 8028530: 681b ldr r3, [r3, #0] + 8028532: 4a73 ldr r2, [pc, #460] ; (8028700 ) + 8028534: 4293 cmp r3, r2 + 8028536: d03b beq.n 80285b0 + 8028538: 68fb ldr r3, [r7, #12] + 802853a: 681b ldr r3, [r3, #0] + 802853c: 4a71 ldr r2, [pc, #452] ; (8028704 ) + 802853e: 4293 cmp r3, r2 + 8028540: d036 beq.n 80285b0 + 8028542: 68fb ldr r3, [r7, #12] + 8028544: 681b ldr r3, [r3, #0] + 8028546: 4a70 ldr r2, [pc, #448] ; (8028708 ) + 8028548: 4293 cmp r3, r2 + 802854a: d031 beq.n 80285b0 + 802854c: 68fb ldr r3, [r7, #12] + 802854e: 681b ldr r3, [r3, #0] + 8028550: 4a6e ldr r2, [pc, #440] ; (802870c ) + 8028552: 4293 cmp r3, r2 + 8028554: d02c beq.n 80285b0 + 8028556: 68fb ldr r3, [r7, #12] + 8028558: 681b ldr r3, [r3, #0] + 802855a: 4a6d ldr r2, [pc, #436] ; (8028710 ) + 802855c: 4293 cmp r3, r2 + 802855e: d027 beq.n 80285b0 + 8028560: 68fb ldr r3, [r7, #12] + 8028562: 681b ldr r3, [r3, #0] + 8028564: 4a6b ldr r2, [pc, #428] ; (8028714 ) + 8028566: 4293 cmp r3, r2 + 8028568: d022 beq.n 80285b0 + 802856a: 68fb ldr r3, [r7, #12] + 802856c: 681b ldr r3, [r3, #0] + 802856e: 4a6a ldr r2, [pc, #424] ; (8028718 ) + 8028570: 4293 cmp r3, r2 + 8028572: d01d beq.n 80285b0 + 8028574: 68fb ldr r3, [r7, #12] + 8028576: 681b ldr r3, [r3, #0] + 8028578: 4a68 ldr r2, [pc, #416] ; (802871c ) + 802857a: 4293 cmp r3, r2 + 802857c: d018 beq.n 80285b0 + 802857e: 68fb ldr r3, [r7, #12] + 8028580: 681b ldr r3, [r3, #0] + 8028582: 4a67 ldr r2, [pc, #412] ; (8028720 ) + 8028584: 4293 cmp r3, r2 + 8028586: d013 beq.n 80285b0 + 8028588: 68fb ldr r3, [r7, #12] + 802858a: 681b ldr r3, [r3, #0] + 802858c: 4a65 ldr r2, [pc, #404] ; (8028724 ) + 802858e: 4293 cmp r3, r2 + 8028590: d00e beq.n 80285b0 + 8028592: 68fb ldr r3, [r7, #12] + 8028594: 681b ldr r3, [r3, #0] + 8028596: 4a64 ldr r2, [pc, #400] ; (8028728 ) + 8028598: 4293 cmp r3, r2 + 802859a: d009 beq.n 80285b0 + 802859c: 68fb ldr r3, [r7, #12] + 802859e: 681b ldr r3, [r3, #0] + 80285a0: 4a62 ldr r2, [pc, #392] ; (802872c ) + 80285a2: 4293 cmp r3, r2 + 80285a4: d004 beq.n 80285b0 + 80285a6: 68fb ldr r3, [r7, #12] + 80285a8: 681b ldr r3, [r3, #0] + 80285aa: 4a61 ldr r2, [pc, #388] ; (8028730 ) + 80285ac: 4293 cmp r3, r2 + 80285ae: d101 bne.n 80285b4 + 80285b0: 2301 movs r3, #1 + 80285b2: e000 b.n 80285b6 + 80285b4: 2300 movs r3, #0 + 80285b6: 2b00 cmp r3, #0 + 80285b8: d01a beq.n 80285f0 { /* Check if DMAMUX Synchronization is enabled */ if((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U) - 8028536: 68fb ldr r3, [r7, #12] - 8028538: 6e1b ldr r3, [r3, #96] ; 0x60 - 802853a: 681b ldr r3, [r3, #0] - 802853c: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8028540: 2b00 cmp r3, #0 - 8028542: d007 beq.n 8028554 + 80285ba: 68fb ldr r3, [r7, #12] + 80285bc: 6e1b ldr r3, [r3, #96] ; 0x60 + 80285be: 681b ldr r3, [r3, #0] + 80285c0: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 80285c4: 2b00 cmp r3, #0 + 80285c6: d007 beq.n 80285d8 { /* Enable DMAMUX sync overrun IT*/ hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE; - 8028544: 68fb ldr r3, [r7, #12] - 8028546: 6e1b ldr r3, [r3, #96] ; 0x60 - 8028548: 681a ldr r2, [r3, #0] - 802854a: 68fb ldr r3, [r7, #12] - 802854c: 6e1b ldr r3, [r3, #96] ; 0x60 - 802854e: f442 7280 orr.w r2, r2, #256 ; 0x100 - 8028552: 601a str r2, [r3, #0] + 80285c8: 68fb ldr r3, [r7, #12] + 80285ca: 6e1b ldr r3, [r3, #96] ; 0x60 + 80285cc: 681a ldr r2, [r3, #0] + 80285ce: 68fb ldr r3, [r7, #12] + 80285d0: 6e1b ldr r3, [r3, #96] ; 0x60 + 80285d2: f442 7280 orr.w r2, r2, #256 ; 0x100 + 80285d6: 601a str r2, [r3, #0] } if(hdma->DMAmuxRequestGen != 0U) - 8028554: 68fb ldr r3, [r7, #12] - 8028556: 6edb ldr r3, [r3, #108] ; 0x6c - 8028558: 2b00 cmp r3, #0 - 802855a: d007 beq.n 802856c + 80285d8: 68fb ldr r3, [r7, #12] + 80285da: 6edb ldr r3, [r3, #108] ; 0x6c + 80285dc: 2b00 cmp r3, #0 + 80285de: d007 beq.n 80285f0 { /* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/ /* enable the request gen overrun IT */ hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE; - 802855c: 68fb ldr r3, [r7, #12] - 802855e: 6edb ldr r3, [r3, #108] ; 0x6c - 8028560: 681a ldr r2, [r3, #0] - 8028562: 68fb ldr r3, [r7, #12] - 8028564: 6edb ldr r3, [r3, #108] ; 0x6c - 8028566: f442 7280 orr.w r2, r2, #256 ; 0x100 - 802856a: 601a str r2, [r3, #0] + 80285e0: 68fb ldr r3, [r7, #12] + 80285e2: 6edb ldr r3, [r3, #108] ; 0x6c + 80285e4: 681a ldr r2, [r3, #0] + 80285e6: 68fb ldr r3, [r7, #12] + 80285e8: 6edb ldr r3, [r3, #108] ; 0x6c + 80285ea: f442 7280 orr.w r2, r2, #256 ; 0x100 + 80285ee: 601a str r2, [r3, #0] } } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); - 802856c: 68fb ldr r3, [r7, #12] - 802856e: 681b ldr r3, [r3, #0] - 8028570: 4a37 ldr r2, [pc, #220] ; (8028650 ) - 8028572: 4293 cmp r3, r2 - 8028574: d04a beq.n 802860c - 8028576: 68fb ldr r3, [r7, #12] - 8028578: 681b ldr r3, [r3, #0] - 802857a: 4a36 ldr r2, [pc, #216] ; (8028654 ) - 802857c: 4293 cmp r3, r2 - 802857e: d045 beq.n 802860c - 8028580: 68fb ldr r3, [r7, #12] - 8028582: 681b ldr r3, [r3, #0] - 8028584: 4a34 ldr r2, [pc, #208] ; (8028658 ) - 8028586: 4293 cmp r3, r2 - 8028588: d040 beq.n 802860c - 802858a: 68fb ldr r3, [r7, #12] - 802858c: 681b ldr r3, [r3, #0] - 802858e: 4a33 ldr r2, [pc, #204] ; (802865c ) - 8028590: 4293 cmp r3, r2 - 8028592: d03b beq.n 802860c - 8028594: 68fb ldr r3, [r7, #12] - 8028596: 681b ldr r3, [r3, #0] - 8028598: 4a31 ldr r2, [pc, #196] ; (8028660 ) - 802859a: 4293 cmp r3, r2 - 802859c: d036 beq.n 802860c - 802859e: 68fb ldr r3, [r7, #12] - 80285a0: 681b ldr r3, [r3, #0] - 80285a2: 4a30 ldr r2, [pc, #192] ; (8028664 ) - 80285a4: 4293 cmp r3, r2 - 80285a6: d031 beq.n 802860c - 80285a8: 68fb ldr r3, [r7, #12] - 80285aa: 681b ldr r3, [r3, #0] - 80285ac: 4a2e ldr r2, [pc, #184] ; (8028668 ) - 80285ae: 4293 cmp r3, r2 - 80285b0: d02c beq.n 802860c - 80285b2: 68fb ldr r3, [r7, #12] - 80285b4: 681b ldr r3, [r3, #0] - 80285b6: 4a2d ldr r2, [pc, #180] ; (802866c ) - 80285b8: 4293 cmp r3, r2 - 80285ba: d027 beq.n 802860c - 80285bc: 68fb ldr r3, [r7, #12] - 80285be: 681b ldr r3, [r3, #0] - 80285c0: 4a2b ldr r2, [pc, #172] ; (8028670 ) - 80285c2: 4293 cmp r3, r2 - 80285c4: d022 beq.n 802860c - 80285c6: 68fb ldr r3, [r7, #12] - 80285c8: 681b ldr r3, [r3, #0] - 80285ca: 4a2a ldr r2, [pc, #168] ; (8028674 ) - 80285cc: 4293 cmp r3, r2 - 80285ce: d01d beq.n 802860c - 80285d0: 68fb ldr r3, [r7, #12] - 80285d2: 681b ldr r3, [r3, #0] - 80285d4: 4a28 ldr r2, [pc, #160] ; (8028678 ) - 80285d6: 4293 cmp r3, r2 - 80285d8: d018 beq.n 802860c - 80285da: 68fb ldr r3, [r7, #12] - 80285dc: 681b ldr r3, [r3, #0] - 80285de: 4a27 ldr r2, [pc, #156] ; (802867c ) - 80285e0: 4293 cmp r3, r2 - 80285e2: d013 beq.n 802860c - 80285e4: 68fb ldr r3, [r7, #12] - 80285e6: 681b ldr r3, [r3, #0] - 80285e8: 4a25 ldr r2, [pc, #148] ; (8028680 ) - 80285ea: 4293 cmp r3, r2 - 80285ec: d00e beq.n 802860c - 80285ee: 68fb ldr r3, [r7, #12] - 80285f0: 681b ldr r3, [r3, #0] - 80285f2: 4a24 ldr r2, [pc, #144] ; (8028684 ) - 80285f4: 4293 cmp r3, r2 - 80285f6: d009 beq.n 802860c - 80285f8: 68fb ldr r3, [r7, #12] - 80285fa: 681b ldr r3, [r3, #0] - 80285fc: 4a22 ldr r2, [pc, #136] ; (8028688 ) - 80285fe: 4293 cmp r3, r2 - 8028600: d004 beq.n 802860c - 8028602: 68fb ldr r3, [r7, #12] - 8028604: 681b ldr r3, [r3, #0] - 8028606: 4a21 ldr r2, [pc, #132] ; (802868c ) - 8028608: 4293 cmp r3, r2 - 802860a: d108 bne.n 802861e - 802860c: 68fb ldr r3, [r7, #12] - 802860e: 681b ldr r3, [r3, #0] - 8028610: 681a ldr r2, [r3, #0] - 8028612: 68fb ldr r3, [r7, #12] - 8028614: 681b ldr r3, [r3, #0] - 8028616: f042 0201 orr.w r2, r2, #1 - 802861a: 601a str r2, [r3, #0] - 802861c: e012 b.n 8028644 - 802861e: 68fb ldr r3, [r7, #12] - 8028620: 681b ldr r3, [r3, #0] - 8028622: 681a ldr r2, [r3, #0] - 8028624: 68fb ldr r3, [r7, #12] - 8028626: 681b ldr r3, [r3, #0] - 8028628: f042 0201 orr.w r2, r2, #1 - 802862c: 601a str r2, [r3, #0] - 802862e: e009 b.n 8028644 + 80285f0: 68fb ldr r3, [r7, #12] + 80285f2: 681b ldr r3, [r3, #0] + 80285f4: 4a37 ldr r2, [pc, #220] ; (80286d4 ) + 80285f6: 4293 cmp r3, r2 + 80285f8: d04a beq.n 8028690 + 80285fa: 68fb ldr r3, [r7, #12] + 80285fc: 681b ldr r3, [r3, #0] + 80285fe: 4a36 ldr r2, [pc, #216] ; (80286d8 ) + 8028600: 4293 cmp r3, r2 + 8028602: d045 beq.n 8028690 + 8028604: 68fb ldr r3, [r7, #12] + 8028606: 681b ldr r3, [r3, #0] + 8028608: 4a34 ldr r2, [pc, #208] ; (80286dc ) + 802860a: 4293 cmp r3, r2 + 802860c: d040 beq.n 8028690 + 802860e: 68fb ldr r3, [r7, #12] + 8028610: 681b ldr r3, [r3, #0] + 8028612: 4a33 ldr r2, [pc, #204] ; (80286e0 ) + 8028614: 4293 cmp r3, r2 + 8028616: d03b beq.n 8028690 + 8028618: 68fb ldr r3, [r7, #12] + 802861a: 681b ldr r3, [r3, #0] + 802861c: 4a31 ldr r2, [pc, #196] ; (80286e4 ) + 802861e: 4293 cmp r3, r2 + 8028620: d036 beq.n 8028690 + 8028622: 68fb ldr r3, [r7, #12] + 8028624: 681b ldr r3, [r3, #0] + 8028626: 4a30 ldr r2, [pc, #192] ; (80286e8 ) + 8028628: 4293 cmp r3, r2 + 802862a: d031 beq.n 8028690 + 802862c: 68fb ldr r3, [r7, #12] + 802862e: 681b ldr r3, [r3, #0] + 8028630: 4a2e ldr r2, [pc, #184] ; (80286ec ) + 8028632: 4293 cmp r3, r2 + 8028634: d02c beq.n 8028690 + 8028636: 68fb ldr r3, [r7, #12] + 8028638: 681b ldr r3, [r3, #0] + 802863a: 4a2d ldr r2, [pc, #180] ; (80286f0 ) + 802863c: 4293 cmp r3, r2 + 802863e: d027 beq.n 8028690 + 8028640: 68fb ldr r3, [r7, #12] + 8028642: 681b ldr r3, [r3, #0] + 8028644: 4a2b ldr r2, [pc, #172] ; (80286f4 ) + 8028646: 4293 cmp r3, r2 + 8028648: d022 beq.n 8028690 + 802864a: 68fb ldr r3, [r7, #12] + 802864c: 681b ldr r3, [r3, #0] + 802864e: 4a2a ldr r2, [pc, #168] ; (80286f8 ) + 8028650: 4293 cmp r3, r2 + 8028652: d01d beq.n 8028690 + 8028654: 68fb ldr r3, [r7, #12] + 8028656: 681b ldr r3, [r3, #0] + 8028658: 4a28 ldr r2, [pc, #160] ; (80286fc ) + 802865a: 4293 cmp r3, r2 + 802865c: d018 beq.n 8028690 + 802865e: 68fb ldr r3, [r7, #12] + 8028660: 681b ldr r3, [r3, #0] + 8028662: 4a27 ldr r2, [pc, #156] ; (8028700 ) + 8028664: 4293 cmp r3, r2 + 8028666: d013 beq.n 8028690 + 8028668: 68fb ldr r3, [r7, #12] + 802866a: 681b ldr r3, [r3, #0] + 802866c: 4a25 ldr r2, [pc, #148] ; (8028704 ) + 802866e: 4293 cmp r3, r2 + 8028670: d00e beq.n 8028690 + 8028672: 68fb ldr r3, [r7, #12] + 8028674: 681b ldr r3, [r3, #0] + 8028676: 4a24 ldr r2, [pc, #144] ; (8028708 ) + 8028678: 4293 cmp r3, r2 + 802867a: d009 beq.n 8028690 + 802867c: 68fb ldr r3, [r7, #12] + 802867e: 681b ldr r3, [r3, #0] + 8028680: 4a22 ldr r2, [pc, #136] ; (802870c ) + 8028682: 4293 cmp r3, r2 + 8028684: d004 beq.n 8028690 + 8028686: 68fb ldr r3, [r7, #12] + 8028688: 681b ldr r3, [r3, #0] + 802868a: 4a21 ldr r2, [pc, #132] ; (8028710 ) + 802868c: 4293 cmp r3, r2 + 802868e: d108 bne.n 80286a2 + 8028690: 68fb ldr r3, [r7, #12] + 8028692: 681b ldr r3, [r3, #0] + 8028694: 681a ldr r2, [r3, #0] + 8028696: 68fb ldr r3, [r7, #12] + 8028698: 681b ldr r3, [r3, #0] + 802869a: f042 0201 orr.w r2, r2, #1 + 802869e: 601a str r2, [r3, #0] + 80286a0: e012 b.n 80286c8 + 80286a2: 68fb ldr r3, [r7, #12] + 80286a4: 681b ldr r3, [r3, #0] + 80286a6: 681a ldr r2, [r3, #0] + 80286a8: 68fb ldr r3, [r7, #12] + 80286aa: 681b ldr r3, [r3, #0] + 80286ac: f042 0201 orr.w r2, r2, #1 + 80286b0: 601a str r2, [r3, #0] + 80286b2: e009 b.n 80286c8 } else { /* Set the error code to busy */ hdma->ErrorCode = HAL_DMA_ERROR_BUSY; - 8028630: 68fb ldr r3, [r7, #12] - 8028632: f44f 6200 mov.w r2, #2048 ; 0x800 - 8028636: 655a str r2, [r3, #84] ; 0x54 + 80286b4: 68fb ldr r3, [r7, #12] + 80286b6: f44f 6200 mov.w r2, #2048 ; 0x800 + 80286ba: 655a str r2, [r3, #84] ; 0x54 /* Process unlocked */ __HAL_UNLOCK(hdma); - 8028638: 68fb ldr r3, [r7, #12] - 802863a: 2200 movs r2, #0 - 802863c: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 80286bc: 68fb ldr r3, [r7, #12] + 80286be: 2200 movs r2, #0 + 80286c0: f883 2034 strb.w r2, [r3, #52] ; 0x34 /* Return error status */ status = HAL_ERROR; - 8028640: 2301 movs r3, #1 - 8028642: 75fb strb r3, [r7, #23] + 80286c4: 2301 movs r3, #1 + 80286c6: 75fb strb r3, [r7, #23] } return status; - 8028644: 7dfb ldrb r3, [r7, #23] -} - 8028646: 4618 mov r0, r3 - 8028648: 3718 adds r7, #24 - 802864a: 46bd mov sp, r7 - 802864c: bd80 pop {r7, pc} - 802864e: bf00 nop - 8028650: 40020010 .word 0x40020010 - 8028654: 40020028 .word 0x40020028 - 8028658: 40020040 .word 0x40020040 - 802865c: 40020058 .word 0x40020058 - 8028660: 40020070 .word 0x40020070 - 8028664: 40020088 .word 0x40020088 - 8028668: 400200a0 .word 0x400200a0 - 802866c: 400200b8 .word 0x400200b8 - 8028670: 40020410 .word 0x40020410 - 8028674: 40020428 .word 0x40020428 - 8028678: 40020440 .word 0x40020440 - 802867c: 40020458 .word 0x40020458 - 8028680: 40020470 .word 0x40020470 - 8028684: 40020488 .word 0x40020488 - 8028688: 400204a0 .word 0x400204a0 - 802868c: 400204b8 .word 0x400204b8 - 8028690: 58025408 .word 0x58025408 - 8028694: 5802541c .word 0x5802541c - 8028698: 58025430 .word 0x58025430 - 802869c: 58025444 .word 0x58025444 - 80286a0: 58025458 .word 0x58025458 - 80286a4: 5802546c .word 0x5802546c - 80286a8: 58025480 .word 0x58025480 - 80286ac: 58025494 .word 0x58025494 - -080286b0 : + 80286c8: 7dfb ldrb r3, [r7, #23] +} + 80286ca: 4618 mov r0, r3 + 80286cc: 3718 adds r7, #24 + 80286ce: 46bd mov sp, r7 + 80286d0: bd80 pop {r7, pc} + 80286d2: bf00 nop + 80286d4: 40020010 .word 0x40020010 + 80286d8: 40020028 .word 0x40020028 + 80286dc: 40020040 .word 0x40020040 + 80286e0: 40020058 .word 0x40020058 + 80286e4: 40020070 .word 0x40020070 + 80286e8: 40020088 .word 0x40020088 + 80286ec: 400200a0 .word 0x400200a0 + 80286f0: 400200b8 .word 0x400200b8 + 80286f4: 40020410 .word 0x40020410 + 80286f8: 40020428 .word 0x40020428 + 80286fc: 40020440 .word 0x40020440 + 8028700: 40020458 .word 0x40020458 + 8028704: 40020470 .word 0x40020470 + 8028708: 40020488 .word 0x40020488 + 802870c: 400204a0 .word 0x400204a0 + 8028710: 400204b8 .word 0x400204b8 + 8028714: 58025408 .word 0x58025408 + 8028718: 5802541c .word 0x5802541c + 802871c: 58025430 .word 0x58025430 + 8028720: 58025444 .word 0x58025444 + 8028724: 58025458 .word 0x58025458 + 8028728: 5802546c .word 0x5802546c + 802872c: 58025480 .word 0x58025480 + 8028730: 58025494 .word 0x58025494 + +08028734 : * and the Stream will be effectively disabled only after the transfer of * this single data is finished. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { - 80286b0: b580 push {r7, lr} - 80286b2: b086 sub sp, #24 - 80286b4: af00 add r7, sp, #0 - 80286b6: 6078 str r0, [r7, #4] + 8028734: b580 push {r7, lr} + 8028736: b086 sub sp, #24 + 8028738: af00 add r7, sp, #0 + 802873a: 6078 str r0, [r7, #4] /* calculate DMA base and stream number */ DMA_Base_Registers *regs_dma; BDMA_Base_Registers *regs_bdma; const __IO uint32_t *enableRegister; uint32_t tickstart = HAL_GetTick(); - 80286b8: f7fd fc84 bl 8025fc4 - 80286bc: 6138 str r0, [r7, #16] + 802873c: f7fd fc84 bl 8026048 + 8028740: 6138 str r0, [r7, #16] /* Check the DMA peripheral handle */ if(hdma == NULL) - 80286be: 687b ldr r3, [r7, #4] - 80286c0: 2b00 cmp r3, #0 - 80286c2: d101 bne.n 80286c8 + 8028742: 687b ldr r3, [r7, #4] + 8028744: 2b00 cmp r3, #0 + 8028746: d101 bne.n 802874c { return HAL_ERROR; - 80286c4: 2301 movs r3, #1 - 80286c6: e2dc b.n 8028c82 + 8028748: 2301 movs r3, #1 + 802874a: e2dc b.n 8028d06 } /* Check the DMA peripheral state */ if(hdma->State != HAL_DMA_STATE_BUSY) - 80286c8: 687b ldr r3, [r7, #4] - 80286ca: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 80286ce: b2db uxtb r3, r3 - 80286d0: 2b02 cmp r3, #2 - 80286d2: d008 beq.n 80286e6 + 802874c: 687b ldr r3, [r7, #4] + 802874e: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8028752: b2db uxtb r3, r3 + 8028754: 2b02 cmp r3, #2 + 8028756: d008 beq.n 802876a { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 80286d4: 687b ldr r3, [r7, #4] - 80286d6: 2280 movs r2, #128 ; 0x80 - 80286d8: 655a str r2, [r3, #84] ; 0x54 + 8028758: 687b ldr r3, [r7, #4] + 802875a: 2280 movs r2, #128 ; 0x80 + 802875c: 655a str r2, [r3, #84] ; 0x54 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80286da: 687b ldr r3, [r7, #4] - 80286dc: 2200 movs r2, #0 - 80286de: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 802875e: 687b ldr r3, [r7, #4] + 8028760: 2200 movs r2, #0 + 8028762: f883 2034 strb.w r2, [r3, #52] ; 0x34 return HAL_ERROR; - 80286e2: 2301 movs r3, #1 - 80286e4: e2cd b.n 8028c82 + 8028766: 2301 movs r3, #1 + 8028768: e2cd b.n 8028d06 } else { /* Disable all the transfer interrupts */ if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 80286e6: 687b ldr r3, [r7, #4] - 80286e8: 681b ldr r3, [r3, #0] - 80286ea: 4a76 ldr r2, [pc, #472] ; (80288c4 ) - 80286ec: 4293 cmp r3, r2 - 80286ee: d04a beq.n 8028786 - 80286f0: 687b ldr r3, [r7, #4] - 80286f2: 681b ldr r3, [r3, #0] - 80286f4: 4a74 ldr r2, [pc, #464] ; (80288c8 ) - 80286f6: 4293 cmp r3, r2 - 80286f8: d045 beq.n 8028786 - 80286fa: 687b ldr r3, [r7, #4] - 80286fc: 681b ldr r3, [r3, #0] - 80286fe: 4a73 ldr r2, [pc, #460] ; (80288cc ) - 8028700: 4293 cmp r3, r2 - 8028702: d040 beq.n 8028786 - 8028704: 687b ldr r3, [r7, #4] - 8028706: 681b ldr r3, [r3, #0] - 8028708: 4a71 ldr r2, [pc, #452] ; (80288d0 ) - 802870a: 4293 cmp r3, r2 - 802870c: d03b beq.n 8028786 - 802870e: 687b ldr r3, [r7, #4] - 8028710: 681b ldr r3, [r3, #0] - 8028712: 4a70 ldr r2, [pc, #448] ; (80288d4 ) - 8028714: 4293 cmp r3, r2 - 8028716: d036 beq.n 8028786 - 8028718: 687b ldr r3, [r7, #4] - 802871a: 681b ldr r3, [r3, #0] - 802871c: 4a6e ldr r2, [pc, #440] ; (80288d8 ) - 802871e: 4293 cmp r3, r2 - 8028720: d031 beq.n 8028786 - 8028722: 687b ldr r3, [r7, #4] - 8028724: 681b ldr r3, [r3, #0] - 8028726: 4a6d ldr r2, [pc, #436] ; (80288dc ) - 8028728: 4293 cmp r3, r2 - 802872a: d02c beq.n 8028786 - 802872c: 687b ldr r3, [r7, #4] - 802872e: 681b ldr r3, [r3, #0] - 8028730: 4a6b ldr r2, [pc, #428] ; (80288e0 ) - 8028732: 4293 cmp r3, r2 - 8028734: d027 beq.n 8028786 - 8028736: 687b ldr r3, [r7, #4] - 8028738: 681b ldr r3, [r3, #0] - 802873a: 4a6a ldr r2, [pc, #424] ; (80288e4 ) - 802873c: 4293 cmp r3, r2 - 802873e: d022 beq.n 8028786 - 8028740: 687b ldr r3, [r7, #4] - 8028742: 681b ldr r3, [r3, #0] - 8028744: 4a68 ldr r2, [pc, #416] ; (80288e8 ) - 8028746: 4293 cmp r3, r2 - 8028748: d01d beq.n 8028786 - 802874a: 687b ldr r3, [r7, #4] - 802874c: 681b ldr r3, [r3, #0] - 802874e: 4a67 ldr r2, [pc, #412] ; (80288ec ) - 8028750: 4293 cmp r3, r2 - 8028752: d018 beq.n 8028786 - 8028754: 687b ldr r3, [r7, #4] - 8028756: 681b ldr r3, [r3, #0] - 8028758: 4a65 ldr r2, [pc, #404] ; (80288f0 ) - 802875a: 4293 cmp r3, r2 - 802875c: d013 beq.n 8028786 - 802875e: 687b ldr r3, [r7, #4] - 8028760: 681b ldr r3, [r3, #0] - 8028762: 4a64 ldr r2, [pc, #400] ; (80288f4 ) - 8028764: 4293 cmp r3, r2 - 8028766: d00e beq.n 8028786 - 8028768: 687b ldr r3, [r7, #4] - 802876a: 681b ldr r3, [r3, #0] - 802876c: 4a62 ldr r2, [pc, #392] ; (80288f8 ) - 802876e: 4293 cmp r3, r2 - 8028770: d009 beq.n 8028786 - 8028772: 687b ldr r3, [r7, #4] - 8028774: 681b ldr r3, [r3, #0] - 8028776: 4a61 ldr r2, [pc, #388] ; (80288fc ) - 8028778: 4293 cmp r3, r2 - 802877a: d004 beq.n 8028786 - 802877c: 687b ldr r3, [r7, #4] - 802877e: 681b ldr r3, [r3, #0] - 8028780: 4a5f ldr r2, [pc, #380] ; (8028900 ) - 8028782: 4293 cmp r3, r2 - 8028784: d101 bne.n 802878a - 8028786: 2301 movs r3, #1 - 8028788: e000 b.n 802878c - 802878a: 2300 movs r3, #0 - 802878c: 2b00 cmp r3, #0 - 802878e: d013 beq.n 80287b8 - { - /* Disable DMA All Interrupts */ - ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT); - 8028790: 687b ldr r3, [r7, #4] - 8028792: 681b ldr r3, [r3, #0] - 8028794: 681a ldr r2, [r3, #0] - 8028796: 687b ldr r3, [r7, #4] - 8028798: 681b ldr r3, [r3, #0] - 802879a: f022 021e bic.w r2, r2, #30 - 802879e: 601a str r2, [r3, #0] - ((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE); - 80287a0: 687b ldr r3, [r7, #4] - 80287a2: 681b ldr r3, [r3, #0] - 80287a4: 695a ldr r2, [r3, #20] + 802876a: 687b ldr r3, [r7, #4] + 802876c: 681b ldr r3, [r3, #0] + 802876e: 4a76 ldr r2, [pc, #472] ; (8028948 ) + 8028770: 4293 cmp r3, r2 + 8028772: d04a beq.n 802880a + 8028774: 687b ldr r3, [r7, #4] + 8028776: 681b ldr r3, [r3, #0] + 8028778: 4a74 ldr r2, [pc, #464] ; (802894c ) + 802877a: 4293 cmp r3, r2 + 802877c: d045 beq.n 802880a + 802877e: 687b ldr r3, [r7, #4] + 8028780: 681b ldr r3, [r3, #0] + 8028782: 4a73 ldr r2, [pc, #460] ; (8028950 ) + 8028784: 4293 cmp r3, r2 + 8028786: d040 beq.n 802880a + 8028788: 687b ldr r3, [r7, #4] + 802878a: 681b ldr r3, [r3, #0] + 802878c: 4a71 ldr r2, [pc, #452] ; (8028954 ) + 802878e: 4293 cmp r3, r2 + 8028790: d03b beq.n 802880a + 8028792: 687b ldr r3, [r7, #4] + 8028794: 681b ldr r3, [r3, #0] + 8028796: 4a70 ldr r2, [pc, #448] ; (8028958 ) + 8028798: 4293 cmp r3, r2 + 802879a: d036 beq.n 802880a + 802879c: 687b ldr r3, [r7, #4] + 802879e: 681b ldr r3, [r3, #0] + 80287a0: 4a6e ldr r2, [pc, #440] ; (802895c ) + 80287a2: 4293 cmp r3, r2 + 80287a4: d031 beq.n 802880a 80287a6: 687b ldr r3, [r7, #4] 80287a8: 681b ldr r3, [r3, #0] - 80287aa: f022 0280 bic.w r2, r2, #128 ; 0x80 - 80287ae: 615a str r2, [r3, #20] - - enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef *)hdma->Instance)->CR)); + 80287aa: 4a6d ldr r2, [pc, #436] ; (8028960 ) + 80287ac: 4293 cmp r3, r2 + 80287ae: d02c beq.n 802880a 80287b0: 687b ldr r3, [r7, #4] 80287b2: 681b ldr r3, [r3, #0] - 80287b4: 617b str r3, [r7, #20] - 80287b6: e00a b.n 80287ce - } - else /* BDMA channel */ - { - /* Disable DMA All Interrupts */ - ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE); - 80287b8: 687b ldr r3, [r7, #4] - 80287ba: 681b ldr r3, [r3, #0] - 80287bc: 681a ldr r2, [r3, #0] - 80287be: 687b ldr r3, [r7, #4] - 80287c0: 681b ldr r3, [r3, #0] - 80287c2: f022 020e bic.w r2, r2, #14 - 80287c6: 601a str r2, [r3, #0] - - enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef *)hdma->Instance)->CCR)); - 80287c8: 687b ldr r3, [r7, #4] - 80287ca: 681b ldr r3, [r3, #0] - 80287cc: 617b str r3, [r7, #20] - } - - if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ + 80287b4: 4a6b ldr r2, [pc, #428] ; (8028964 ) + 80287b6: 4293 cmp r3, r2 + 80287b8: d027 beq.n 802880a + 80287ba: 687b ldr r3, [r7, #4] + 80287bc: 681b ldr r3, [r3, #0] + 80287be: 4a6a ldr r2, [pc, #424] ; (8028968 ) + 80287c0: 4293 cmp r3, r2 + 80287c2: d022 beq.n 802880a + 80287c4: 687b ldr r3, [r7, #4] + 80287c6: 681b ldr r3, [r3, #0] + 80287c8: 4a68 ldr r2, [pc, #416] ; (802896c ) + 80287ca: 4293 cmp r3, r2 + 80287cc: d01d beq.n 802880a 80287ce: 687b ldr r3, [r7, #4] 80287d0: 681b ldr r3, [r3, #0] - 80287d2: 4a3c ldr r2, [pc, #240] ; (80288c4 ) + 80287d2: 4a67 ldr r2, [pc, #412] ; (8028970 ) 80287d4: 4293 cmp r3, r2 - 80287d6: d072 beq.n 80288be + 80287d6: d018 beq.n 802880a 80287d8: 687b ldr r3, [r7, #4] 80287da: 681b ldr r3, [r3, #0] - 80287dc: 4a3a ldr r2, [pc, #232] ; (80288c8 ) + 80287dc: 4a65 ldr r2, [pc, #404] ; (8028974 ) 80287de: 4293 cmp r3, r2 - 80287e0: d06d beq.n 80288be + 80287e0: d013 beq.n 802880a 80287e2: 687b ldr r3, [r7, #4] 80287e4: 681b ldr r3, [r3, #0] - 80287e6: 4a39 ldr r2, [pc, #228] ; (80288cc ) + 80287e6: 4a64 ldr r2, [pc, #400] ; (8028978 ) 80287e8: 4293 cmp r3, r2 - 80287ea: d068 beq.n 80288be + 80287ea: d00e beq.n 802880a 80287ec: 687b ldr r3, [r7, #4] 80287ee: 681b ldr r3, [r3, #0] - 80287f0: 4a37 ldr r2, [pc, #220] ; (80288d0 ) + 80287f0: 4a62 ldr r2, [pc, #392] ; (802897c ) 80287f2: 4293 cmp r3, r2 - 80287f4: d063 beq.n 80288be + 80287f4: d009 beq.n 802880a 80287f6: 687b ldr r3, [r7, #4] 80287f8: 681b ldr r3, [r3, #0] - 80287fa: 4a36 ldr r2, [pc, #216] ; (80288d4 ) + 80287fa: 4a61 ldr r2, [pc, #388] ; (8028980 ) 80287fc: 4293 cmp r3, r2 - 80287fe: d05e beq.n 80288be + 80287fe: d004 beq.n 802880a 8028800: 687b ldr r3, [r7, #4] 8028802: 681b ldr r3, [r3, #0] - 8028804: 4a34 ldr r2, [pc, #208] ; (80288d8 ) + 8028804: 4a5f ldr r2, [pc, #380] ; (8028984 ) 8028806: 4293 cmp r3, r2 - 8028808: d059 beq.n 80288be - 802880a: 687b ldr r3, [r7, #4] - 802880c: 681b ldr r3, [r3, #0] - 802880e: 4a33 ldr r2, [pc, #204] ; (80288dc ) - 8028810: 4293 cmp r3, r2 - 8028812: d054 beq.n 80288be + 8028808: d101 bne.n 802880e + 802880a: 2301 movs r3, #1 + 802880c: e000 b.n 8028810 + 802880e: 2300 movs r3, #0 + 8028810: 2b00 cmp r3, #0 + 8028812: d013 beq.n 802883c + { + /* Disable DMA All Interrupts */ + ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT); 8028814: 687b ldr r3, [r7, #4] 8028816: 681b ldr r3, [r3, #0] - 8028818: 4a31 ldr r2, [pc, #196] ; (80288e0 ) - 802881a: 4293 cmp r3, r2 - 802881c: d04f beq.n 80288be - 802881e: 687b ldr r3, [r7, #4] - 8028820: 681b ldr r3, [r3, #0] - 8028822: 4a30 ldr r2, [pc, #192] ; (80288e4 ) - 8028824: 4293 cmp r3, r2 - 8028826: d04a beq.n 80288be - 8028828: 687b ldr r3, [r7, #4] - 802882a: 681b ldr r3, [r3, #0] - 802882c: 4a2e ldr r2, [pc, #184] ; (80288e8 ) - 802882e: 4293 cmp r3, r2 - 8028830: d045 beq.n 80288be - 8028832: 687b ldr r3, [r7, #4] - 8028834: 681b ldr r3, [r3, #0] - 8028836: 4a2d ldr r2, [pc, #180] ; (80288ec ) - 8028838: 4293 cmp r3, r2 - 802883a: d040 beq.n 80288be + 8028818: 681a ldr r2, [r3, #0] + 802881a: 687b ldr r3, [r7, #4] + 802881c: 681b ldr r3, [r3, #0] + 802881e: f022 021e bic.w r2, r2, #30 + 8028822: 601a str r2, [r3, #0] + ((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE); + 8028824: 687b ldr r3, [r7, #4] + 8028826: 681b ldr r3, [r3, #0] + 8028828: 695a ldr r2, [r3, #20] + 802882a: 687b ldr r3, [r7, #4] + 802882c: 681b ldr r3, [r3, #0] + 802882e: f022 0280 bic.w r2, r2, #128 ; 0x80 + 8028832: 615a str r2, [r3, #20] + + enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef *)hdma->Instance)->CR)); + 8028834: 687b ldr r3, [r7, #4] + 8028836: 681b ldr r3, [r3, #0] + 8028838: 617b str r3, [r7, #20] + 802883a: e00a b.n 8028852 + } + else /* BDMA channel */ + { + /* Disable DMA All Interrupts */ + ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE); 802883c: 687b ldr r3, [r7, #4] 802883e: 681b ldr r3, [r3, #0] - 8028840: 4a2b ldr r2, [pc, #172] ; (80288f0 ) - 8028842: 4293 cmp r3, r2 - 8028844: d03b beq.n 80288be - 8028846: 687b ldr r3, [r7, #4] - 8028848: 681b ldr r3, [r3, #0] - 802884a: 4a2a ldr r2, [pc, #168] ; (80288f4 ) - 802884c: 4293 cmp r3, r2 - 802884e: d036 beq.n 80288be - 8028850: 687b ldr r3, [r7, #4] - 8028852: 681b ldr r3, [r3, #0] - 8028854: 4a28 ldr r2, [pc, #160] ; (80288f8 ) - 8028856: 4293 cmp r3, r2 - 8028858: d031 beq.n 80288be - 802885a: 687b ldr r3, [r7, #4] - 802885c: 681b ldr r3, [r3, #0] - 802885e: 4a27 ldr r2, [pc, #156] ; (80288fc ) - 8028860: 4293 cmp r3, r2 - 8028862: d02c beq.n 80288be - 8028864: 687b ldr r3, [r7, #4] - 8028866: 681b ldr r3, [r3, #0] - 8028868: 4a25 ldr r2, [pc, #148] ; (8028900 ) - 802886a: 4293 cmp r3, r2 - 802886c: d027 beq.n 80288be - 802886e: 687b ldr r3, [r7, #4] - 8028870: 681b ldr r3, [r3, #0] - 8028872: 4a24 ldr r2, [pc, #144] ; (8028904 ) - 8028874: 4293 cmp r3, r2 - 8028876: d022 beq.n 80288be - 8028878: 687b ldr r3, [r7, #4] - 802887a: 681b ldr r3, [r3, #0] - 802887c: 4a22 ldr r2, [pc, #136] ; (8028908 ) - 802887e: 4293 cmp r3, r2 - 8028880: d01d beq.n 80288be - 8028882: 687b ldr r3, [r7, #4] - 8028884: 681b ldr r3, [r3, #0] - 8028886: 4a21 ldr r2, [pc, #132] ; (802890c ) - 8028888: 4293 cmp r3, r2 - 802888a: d018 beq.n 80288be - 802888c: 687b ldr r3, [r7, #4] - 802888e: 681b ldr r3, [r3, #0] - 8028890: 4a1f ldr r2, [pc, #124] ; (8028910 ) - 8028892: 4293 cmp r3, r2 - 8028894: d013 beq.n 80288be - 8028896: 687b ldr r3, [r7, #4] - 8028898: 681b ldr r3, [r3, #0] - 802889a: 4a1e ldr r2, [pc, #120] ; (8028914 ) - 802889c: 4293 cmp r3, r2 - 802889e: d00e beq.n 80288be - 80288a0: 687b ldr r3, [r7, #4] - 80288a2: 681b ldr r3, [r3, #0] - 80288a4: 4a1c ldr r2, [pc, #112] ; (8028918 ) - 80288a6: 4293 cmp r3, r2 - 80288a8: d009 beq.n 80288be - 80288aa: 687b ldr r3, [r7, #4] - 80288ac: 681b ldr r3, [r3, #0] - 80288ae: 4a1b ldr r2, [pc, #108] ; (802891c ) - 80288b0: 4293 cmp r3, r2 - 80288b2: d004 beq.n 80288be - 80288b4: 687b ldr r3, [r7, #4] - 80288b6: 681b ldr r3, [r3, #0] - 80288b8: 4a19 ldr r2, [pc, #100] ; (8028920 ) - 80288ba: 4293 cmp r3, r2 - 80288bc: d132 bne.n 8028924 - 80288be: 2301 movs r3, #1 - 80288c0: e031 b.n 8028926 - 80288c2: bf00 nop - 80288c4: 40020010 .word 0x40020010 - 80288c8: 40020028 .word 0x40020028 - 80288cc: 40020040 .word 0x40020040 - 80288d0: 40020058 .word 0x40020058 - 80288d4: 40020070 .word 0x40020070 - 80288d8: 40020088 .word 0x40020088 - 80288dc: 400200a0 .word 0x400200a0 - 80288e0: 400200b8 .word 0x400200b8 - 80288e4: 40020410 .word 0x40020410 - 80288e8: 40020428 .word 0x40020428 - 80288ec: 40020440 .word 0x40020440 - 80288f0: 40020458 .word 0x40020458 - 80288f4: 40020470 .word 0x40020470 - 80288f8: 40020488 .word 0x40020488 - 80288fc: 400204a0 .word 0x400204a0 - 8028900: 400204b8 .word 0x400204b8 - 8028904: 58025408 .word 0x58025408 - 8028908: 5802541c .word 0x5802541c - 802890c: 58025430 .word 0x58025430 - 8028910: 58025444 .word 0x58025444 - 8028914: 58025458 .word 0x58025458 - 8028918: 5802546c .word 0x5802546c - 802891c: 58025480 .word 0x58025480 - 8028920: 58025494 .word 0x58025494 - 8028924: 2300 movs r3, #0 - 8028926: 2b00 cmp r3, #0 - 8028928: d007 beq.n 802893a + 8028840: 681a ldr r2, [r3, #0] + 8028842: 687b ldr r3, [r7, #4] + 8028844: 681b ldr r3, [r3, #0] + 8028846: f022 020e bic.w r2, r2, #14 + 802884a: 601a str r2, [r3, #0] + + enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef *)hdma->Instance)->CCR)); + 802884c: 687b ldr r3, [r7, #4] + 802884e: 681b ldr r3, [r3, #0] + 8028850: 617b str r3, [r7, #20] + } + + if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ + 8028852: 687b ldr r3, [r7, #4] + 8028854: 681b ldr r3, [r3, #0] + 8028856: 4a3c ldr r2, [pc, #240] ; (8028948 ) + 8028858: 4293 cmp r3, r2 + 802885a: d072 beq.n 8028942 + 802885c: 687b ldr r3, [r7, #4] + 802885e: 681b ldr r3, [r3, #0] + 8028860: 4a3a ldr r2, [pc, #232] ; (802894c ) + 8028862: 4293 cmp r3, r2 + 8028864: d06d beq.n 8028942 + 8028866: 687b ldr r3, [r7, #4] + 8028868: 681b ldr r3, [r3, #0] + 802886a: 4a39 ldr r2, [pc, #228] ; (8028950 ) + 802886c: 4293 cmp r3, r2 + 802886e: d068 beq.n 8028942 + 8028870: 687b ldr r3, [r7, #4] + 8028872: 681b ldr r3, [r3, #0] + 8028874: 4a37 ldr r2, [pc, #220] ; (8028954 ) + 8028876: 4293 cmp r3, r2 + 8028878: d063 beq.n 8028942 + 802887a: 687b ldr r3, [r7, #4] + 802887c: 681b ldr r3, [r3, #0] + 802887e: 4a36 ldr r2, [pc, #216] ; (8028958 ) + 8028880: 4293 cmp r3, r2 + 8028882: d05e beq.n 8028942 + 8028884: 687b ldr r3, [r7, #4] + 8028886: 681b ldr r3, [r3, #0] + 8028888: 4a34 ldr r2, [pc, #208] ; (802895c ) + 802888a: 4293 cmp r3, r2 + 802888c: d059 beq.n 8028942 + 802888e: 687b ldr r3, [r7, #4] + 8028890: 681b ldr r3, [r3, #0] + 8028892: 4a33 ldr r2, [pc, #204] ; (8028960 ) + 8028894: 4293 cmp r3, r2 + 8028896: d054 beq.n 8028942 + 8028898: 687b ldr r3, [r7, #4] + 802889a: 681b ldr r3, [r3, #0] + 802889c: 4a31 ldr r2, [pc, #196] ; (8028964 ) + 802889e: 4293 cmp r3, r2 + 80288a0: d04f beq.n 8028942 + 80288a2: 687b ldr r3, [r7, #4] + 80288a4: 681b ldr r3, [r3, #0] + 80288a6: 4a30 ldr r2, [pc, #192] ; (8028968 ) + 80288a8: 4293 cmp r3, r2 + 80288aa: d04a beq.n 8028942 + 80288ac: 687b ldr r3, [r7, #4] + 80288ae: 681b ldr r3, [r3, #0] + 80288b0: 4a2e ldr r2, [pc, #184] ; (802896c ) + 80288b2: 4293 cmp r3, r2 + 80288b4: d045 beq.n 8028942 + 80288b6: 687b ldr r3, [r7, #4] + 80288b8: 681b ldr r3, [r3, #0] + 80288ba: 4a2d ldr r2, [pc, #180] ; (8028970 ) + 80288bc: 4293 cmp r3, r2 + 80288be: d040 beq.n 8028942 + 80288c0: 687b ldr r3, [r7, #4] + 80288c2: 681b ldr r3, [r3, #0] + 80288c4: 4a2b ldr r2, [pc, #172] ; (8028974 ) + 80288c6: 4293 cmp r3, r2 + 80288c8: d03b beq.n 8028942 + 80288ca: 687b ldr r3, [r7, #4] + 80288cc: 681b ldr r3, [r3, #0] + 80288ce: 4a2a ldr r2, [pc, #168] ; (8028978 ) + 80288d0: 4293 cmp r3, r2 + 80288d2: d036 beq.n 8028942 + 80288d4: 687b ldr r3, [r7, #4] + 80288d6: 681b ldr r3, [r3, #0] + 80288d8: 4a28 ldr r2, [pc, #160] ; (802897c ) + 80288da: 4293 cmp r3, r2 + 80288dc: d031 beq.n 8028942 + 80288de: 687b ldr r3, [r7, #4] + 80288e0: 681b ldr r3, [r3, #0] + 80288e2: 4a27 ldr r2, [pc, #156] ; (8028980 ) + 80288e4: 4293 cmp r3, r2 + 80288e6: d02c beq.n 8028942 + 80288e8: 687b ldr r3, [r7, #4] + 80288ea: 681b ldr r3, [r3, #0] + 80288ec: 4a25 ldr r2, [pc, #148] ; (8028984 ) + 80288ee: 4293 cmp r3, r2 + 80288f0: d027 beq.n 8028942 + 80288f2: 687b ldr r3, [r7, #4] + 80288f4: 681b ldr r3, [r3, #0] + 80288f6: 4a24 ldr r2, [pc, #144] ; (8028988 ) + 80288f8: 4293 cmp r3, r2 + 80288fa: d022 beq.n 8028942 + 80288fc: 687b ldr r3, [r7, #4] + 80288fe: 681b ldr r3, [r3, #0] + 8028900: 4a22 ldr r2, [pc, #136] ; (802898c ) + 8028902: 4293 cmp r3, r2 + 8028904: d01d beq.n 8028942 + 8028906: 687b ldr r3, [r7, #4] + 8028908: 681b ldr r3, [r3, #0] + 802890a: 4a21 ldr r2, [pc, #132] ; (8028990 ) + 802890c: 4293 cmp r3, r2 + 802890e: d018 beq.n 8028942 + 8028910: 687b ldr r3, [r7, #4] + 8028912: 681b ldr r3, [r3, #0] + 8028914: 4a1f ldr r2, [pc, #124] ; (8028994 ) + 8028916: 4293 cmp r3, r2 + 8028918: d013 beq.n 8028942 + 802891a: 687b ldr r3, [r7, #4] + 802891c: 681b ldr r3, [r3, #0] + 802891e: 4a1e ldr r2, [pc, #120] ; (8028998 ) + 8028920: 4293 cmp r3, r2 + 8028922: d00e beq.n 8028942 + 8028924: 687b ldr r3, [r7, #4] + 8028926: 681b ldr r3, [r3, #0] + 8028928: 4a1c ldr r2, [pc, #112] ; (802899c ) + 802892a: 4293 cmp r3, r2 + 802892c: d009 beq.n 8028942 + 802892e: 687b ldr r3, [r7, #4] + 8028930: 681b ldr r3, [r3, #0] + 8028932: 4a1b ldr r2, [pc, #108] ; (80289a0 ) + 8028934: 4293 cmp r3, r2 + 8028936: d004 beq.n 8028942 + 8028938: 687b ldr r3, [r7, #4] + 802893a: 681b ldr r3, [r3, #0] + 802893c: 4a19 ldr r2, [pc, #100] ; (80289a4 ) + 802893e: 4293 cmp r3, r2 + 8028940: d132 bne.n 80289a8 + 8028942: 2301 movs r3, #1 + 8028944: e031 b.n 80289aa + 8028946: bf00 nop + 8028948: 40020010 .word 0x40020010 + 802894c: 40020028 .word 0x40020028 + 8028950: 40020040 .word 0x40020040 + 8028954: 40020058 .word 0x40020058 + 8028958: 40020070 .word 0x40020070 + 802895c: 40020088 .word 0x40020088 + 8028960: 400200a0 .word 0x400200a0 + 8028964: 400200b8 .word 0x400200b8 + 8028968: 40020410 .word 0x40020410 + 802896c: 40020428 .word 0x40020428 + 8028970: 40020440 .word 0x40020440 + 8028974: 40020458 .word 0x40020458 + 8028978: 40020470 .word 0x40020470 + 802897c: 40020488 .word 0x40020488 + 8028980: 400204a0 .word 0x400204a0 + 8028984: 400204b8 .word 0x400204b8 + 8028988: 58025408 .word 0x58025408 + 802898c: 5802541c .word 0x5802541c + 8028990: 58025430 .word 0x58025430 + 8028994: 58025444 .word 0x58025444 + 8028998: 58025458 .word 0x58025458 + 802899c: 5802546c .word 0x5802546c + 80289a0: 58025480 .word 0x58025480 + 80289a4: 58025494 .word 0x58025494 + 80289a8: 2300 movs r3, #0 + 80289aa: 2b00 cmp r3, #0 + 80289ac: d007 beq.n 80289be { /* disable the DMAMUX sync overrun IT */ hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - 802892a: 687b ldr r3, [r7, #4] - 802892c: 6e1b ldr r3, [r3, #96] ; 0x60 - 802892e: 681a ldr r2, [r3, #0] - 8028930: 687b ldr r3, [r7, #4] - 8028932: 6e1b ldr r3, [r3, #96] ; 0x60 - 8028934: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8028938: 601a str r2, [r3, #0] + 80289ae: 687b ldr r3, [r7, #4] + 80289b0: 6e1b ldr r3, [r3, #96] ; 0x60 + 80289b2: 681a ldr r2, [r3, #0] + 80289b4: 687b ldr r3, [r7, #4] + 80289b6: 6e1b ldr r3, [r3, #96] ; 0x60 + 80289b8: f422 7280 bic.w r2, r2, #256 ; 0x100 + 80289bc: 601a str r2, [r3, #0] } /* Disable the stream */ __HAL_DMA_DISABLE(hdma); - 802893a: 687b ldr r3, [r7, #4] - 802893c: 681b ldr r3, [r3, #0] - 802893e: 4a6d ldr r2, [pc, #436] ; (8028af4 ) - 8028940: 4293 cmp r3, r2 - 8028942: d04a beq.n 80289da - 8028944: 687b ldr r3, [r7, #4] - 8028946: 681b ldr r3, [r3, #0] - 8028948: 4a6b ldr r2, [pc, #428] ; (8028af8 ) - 802894a: 4293 cmp r3, r2 - 802894c: d045 beq.n 80289da - 802894e: 687b ldr r3, [r7, #4] - 8028950: 681b ldr r3, [r3, #0] - 8028952: 4a6a ldr r2, [pc, #424] ; (8028afc ) - 8028954: 4293 cmp r3, r2 - 8028956: d040 beq.n 80289da - 8028958: 687b ldr r3, [r7, #4] - 802895a: 681b ldr r3, [r3, #0] - 802895c: 4a68 ldr r2, [pc, #416] ; (8028b00 ) - 802895e: 4293 cmp r3, r2 - 8028960: d03b beq.n 80289da - 8028962: 687b ldr r3, [r7, #4] - 8028964: 681b ldr r3, [r3, #0] - 8028966: 4a67 ldr r2, [pc, #412] ; (8028b04 ) - 8028968: 4293 cmp r3, r2 - 802896a: d036 beq.n 80289da - 802896c: 687b ldr r3, [r7, #4] - 802896e: 681b ldr r3, [r3, #0] - 8028970: 4a65 ldr r2, [pc, #404] ; (8028b08 ) - 8028972: 4293 cmp r3, r2 - 8028974: d031 beq.n 80289da - 8028976: 687b ldr r3, [r7, #4] - 8028978: 681b ldr r3, [r3, #0] - 802897a: 4a64 ldr r2, [pc, #400] ; (8028b0c ) - 802897c: 4293 cmp r3, r2 - 802897e: d02c beq.n 80289da - 8028980: 687b ldr r3, [r7, #4] - 8028982: 681b ldr r3, [r3, #0] - 8028984: 4a62 ldr r2, [pc, #392] ; (8028b10 ) - 8028986: 4293 cmp r3, r2 - 8028988: d027 beq.n 80289da - 802898a: 687b ldr r3, [r7, #4] - 802898c: 681b ldr r3, [r3, #0] - 802898e: 4a61 ldr r2, [pc, #388] ; (8028b14 ) - 8028990: 4293 cmp r3, r2 - 8028992: d022 beq.n 80289da - 8028994: 687b ldr r3, [r7, #4] - 8028996: 681b ldr r3, [r3, #0] - 8028998: 4a5f ldr r2, [pc, #380] ; (8028b18 ) - 802899a: 4293 cmp r3, r2 - 802899c: d01d beq.n 80289da - 802899e: 687b ldr r3, [r7, #4] - 80289a0: 681b ldr r3, [r3, #0] - 80289a2: 4a5e ldr r2, [pc, #376] ; (8028b1c ) - 80289a4: 4293 cmp r3, r2 - 80289a6: d018 beq.n 80289da - 80289a8: 687b ldr r3, [r7, #4] - 80289aa: 681b ldr r3, [r3, #0] - 80289ac: 4a5c ldr r2, [pc, #368] ; (8028b20 ) - 80289ae: 4293 cmp r3, r2 - 80289b0: d013 beq.n 80289da - 80289b2: 687b ldr r3, [r7, #4] - 80289b4: 681b ldr r3, [r3, #0] - 80289b6: 4a5b ldr r2, [pc, #364] ; (8028b24 ) - 80289b8: 4293 cmp r3, r2 - 80289ba: d00e beq.n 80289da - 80289bc: 687b ldr r3, [r7, #4] - 80289be: 681b ldr r3, [r3, #0] - 80289c0: 4a59 ldr r2, [pc, #356] ; (8028b28 ) - 80289c2: 4293 cmp r3, r2 - 80289c4: d009 beq.n 80289da - 80289c6: 687b ldr r3, [r7, #4] - 80289c8: 681b ldr r3, [r3, #0] - 80289ca: 4a58 ldr r2, [pc, #352] ; (8028b2c ) - 80289cc: 4293 cmp r3, r2 - 80289ce: d004 beq.n 80289da - 80289d0: 687b ldr r3, [r7, #4] - 80289d2: 681b ldr r3, [r3, #0] - 80289d4: 4a56 ldr r2, [pc, #344] ; (8028b30 ) - 80289d6: 4293 cmp r3, r2 - 80289d8: d108 bne.n 80289ec - 80289da: 687b ldr r3, [r7, #4] - 80289dc: 681b ldr r3, [r3, #0] - 80289de: 681a ldr r2, [r3, #0] - 80289e0: 687b ldr r3, [r7, #4] - 80289e2: 681b ldr r3, [r3, #0] - 80289e4: f022 0201 bic.w r2, r2, #1 - 80289e8: 601a str r2, [r3, #0] - 80289ea: e007 b.n 80289fc - 80289ec: 687b ldr r3, [r7, #4] - 80289ee: 681b ldr r3, [r3, #0] - 80289f0: 681a ldr r2, [r3, #0] - 80289f2: 687b ldr r3, [r7, #4] - 80289f4: 681b ldr r3, [r3, #0] - 80289f6: f022 0201 bic.w r2, r2, #1 - 80289fa: 601a str r2, [r3, #0] + 80289be: 687b ldr r3, [r7, #4] + 80289c0: 681b ldr r3, [r3, #0] + 80289c2: 4a6d ldr r2, [pc, #436] ; (8028b78 ) + 80289c4: 4293 cmp r3, r2 + 80289c6: d04a beq.n 8028a5e + 80289c8: 687b ldr r3, [r7, #4] + 80289ca: 681b ldr r3, [r3, #0] + 80289cc: 4a6b ldr r2, [pc, #428] ; (8028b7c ) + 80289ce: 4293 cmp r3, r2 + 80289d0: d045 beq.n 8028a5e + 80289d2: 687b ldr r3, [r7, #4] + 80289d4: 681b ldr r3, [r3, #0] + 80289d6: 4a6a ldr r2, [pc, #424] ; (8028b80 ) + 80289d8: 4293 cmp r3, r2 + 80289da: d040 beq.n 8028a5e + 80289dc: 687b ldr r3, [r7, #4] + 80289de: 681b ldr r3, [r3, #0] + 80289e0: 4a68 ldr r2, [pc, #416] ; (8028b84 ) + 80289e2: 4293 cmp r3, r2 + 80289e4: d03b beq.n 8028a5e + 80289e6: 687b ldr r3, [r7, #4] + 80289e8: 681b ldr r3, [r3, #0] + 80289ea: 4a67 ldr r2, [pc, #412] ; (8028b88 ) + 80289ec: 4293 cmp r3, r2 + 80289ee: d036 beq.n 8028a5e + 80289f0: 687b ldr r3, [r7, #4] + 80289f2: 681b ldr r3, [r3, #0] + 80289f4: 4a65 ldr r2, [pc, #404] ; (8028b8c ) + 80289f6: 4293 cmp r3, r2 + 80289f8: d031 beq.n 8028a5e + 80289fa: 687b ldr r3, [r7, #4] + 80289fc: 681b ldr r3, [r3, #0] + 80289fe: 4a64 ldr r2, [pc, #400] ; (8028b90 ) + 8028a00: 4293 cmp r3, r2 + 8028a02: d02c beq.n 8028a5e + 8028a04: 687b ldr r3, [r7, #4] + 8028a06: 681b ldr r3, [r3, #0] + 8028a08: 4a62 ldr r2, [pc, #392] ; (8028b94 ) + 8028a0a: 4293 cmp r3, r2 + 8028a0c: d027 beq.n 8028a5e + 8028a0e: 687b ldr r3, [r7, #4] + 8028a10: 681b ldr r3, [r3, #0] + 8028a12: 4a61 ldr r2, [pc, #388] ; (8028b98 ) + 8028a14: 4293 cmp r3, r2 + 8028a16: d022 beq.n 8028a5e + 8028a18: 687b ldr r3, [r7, #4] + 8028a1a: 681b ldr r3, [r3, #0] + 8028a1c: 4a5f ldr r2, [pc, #380] ; (8028b9c ) + 8028a1e: 4293 cmp r3, r2 + 8028a20: d01d beq.n 8028a5e + 8028a22: 687b ldr r3, [r7, #4] + 8028a24: 681b ldr r3, [r3, #0] + 8028a26: 4a5e ldr r2, [pc, #376] ; (8028ba0 ) + 8028a28: 4293 cmp r3, r2 + 8028a2a: d018 beq.n 8028a5e + 8028a2c: 687b ldr r3, [r7, #4] + 8028a2e: 681b ldr r3, [r3, #0] + 8028a30: 4a5c ldr r2, [pc, #368] ; (8028ba4 ) + 8028a32: 4293 cmp r3, r2 + 8028a34: d013 beq.n 8028a5e + 8028a36: 687b ldr r3, [r7, #4] + 8028a38: 681b ldr r3, [r3, #0] + 8028a3a: 4a5b ldr r2, [pc, #364] ; (8028ba8 ) + 8028a3c: 4293 cmp r3, r2 + 8028a3e: d00e beq.n 8028a5e + 8028a40: 687b ldr r3, [r7, #4] + 8028a42: 681b ldr r3, [r3, #0] + 8028a44: 4a59 ldr r2, [pc, #356] ; (8028bac ) + 8028a46: 4293 cmp r3, r2 + 8028a48: d009 beq.n 8028a5e + 8028a4a: 687b ldr r3, [r7, #4] + 8028a4c: 681b ldr r3, [r3, #0] + 8028a4e: 4a58 ldr r2, [pc, #352] ; (8028bb0 ) + 8028a50: 4293 cmp r3, r2 + 8028a52: d004 beq.n 8028a5e + 8028a54: 687b ldr r3, [r7, #4] + 8028a56: 681b ldr r3, [r3, #0] + 8028a58: 4a56 ldr r2, [pc, #344] ; (8028bb4 ) + 8028a5a: 4293 cmp r3, r2 + 8028a5c: d108 bne.n 8028a70 + 8028a5e: 687b ldr r3, [r7, #4] + 8028a60: 681b ldr r3, [r3, #0] + 8028a62: 681a ldr r2, [r3, #0] + 8028a64: 687b ldr r3, [r7, #4] + 8028a66: 681b ldr r3, [r3, #0] + 8028a68: f022 0201 bic.w r2, r2, #1 + 8028a6c: 601a str r2, [r3, #0] + 8028a6e: e007 b.n 8028a80 + 8028a70: 687b ldr r3, [r7, #4] + 8028a72: 681b ldr r3, [r3, #0] + 8028a74: 681a ldr r2, [r3, #0] + 8028a76: 687b ldr r3, [r7, #4] + 8028a78: 681b ldr r3, [r3, #0] + 8028a7a: f022 0201 bic.w r2, r2, #1 + 8028a7e: 601a str r2, [r3, #0] /* Check if the DMA Stream is effectively disabled */ while(((*enableRegister) & DMA_SxCR_EN) != 0U) - 80289fc: e013 b.n 8028a26 + 8028a80: e013 b.n 8028aaa { /* Check for the Timeout */ if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) - 80289fe: f7fd fae1 bl 8025fc4 - 8028a02: 4602 mov r2, r0 - 8028a04: 693b ldr r3, [r7, #16] - 8028a06: 1ad3 subs r3, r2, r3 - 8028a08: 2b05 cmp r3, #5 - 8028a0a: d90c bls.n 8028a26 + 8028a82: f7fd fae1 bl 8026048 + 8028a86: 4602 mov r2, r0 + 8028a88: 693b ldr r3, [r7, #16] + 8028a8a: 1ad3 subs r3, r2, r3 + 8028a8c: 2b05 cmp r3, #5 + 8028a8e: d90c bls.n 8028aaa { /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; - 8028a0c: 687b ldr r3, [r7, #4] - 8028a0e: 2220 movs r2, #32 - 8028a10: 655a str r2, [r3, #84] ; 0x54 + 8028a90: 687b ldr r3, [r7, #4] + 8028a92: 2220 movs r2, #32 + 8028a94: 655a str r2, [r3, #84] ; 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_ERROR; - 8028a12: 687b ldr r3, [r7, #4] - 8028a14: 2203 movs r2, #3 - 8028a16: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8028a96: 687b ldr r3, [r7, #4] + 8028a98: 2203 movs r2, #3 + 8028a9a: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8028a1a: 687b ldr r3, [r7, #4] - 8028a1c: 2200 movs r2, #0 - 8028a1e: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8028a9e: 687b ldr r3, [r7, #4] + 8028aa0: 2200 movs r2, #0 + 8028aa2: f883 2034 strb.w r2, [r3, #52] ; 0x34 return HAL_ERROR; - 8028a22: 2301 movs r3, #1 - 8028a24: e12d b.n 8028c82 + 8028aa6: 2301 movs r3, #1 + 8028aa8: e12d b.n 8028d06 while(((*enableRegister) & DMA_SxCR_EN) != 0U) - 8028a26: 697b ldr r3, [r7, #20] - 8028a28: 681b ldr r3, [r3, #0] - 8028a2a: f003 0301 and.w r3, r3, #1 - 8028a2e: 2b00 cmp r3, #0 - 8028a30: d1e5 bne.n 80289fe + 8028aaa: 697b ldr r3, [r7, #20] + 8028aac: 681b ldr r3, [r3, #0] + 8028aae: f003 0301 and.w r3, r3, #1 + 8028ab2: 2b00 cmp r3, #0 + 8028ab4: d1e5 bne.n 8028a82 } } /* Clear all interrupt flags at correct offset within the register */ if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 8028a32: 687b ldr r3, [r7, #4] - 8028a34: 681b ldr r3, [r3, #0] - 8028a36: 4a2f ldr r2, [pc, #188] ; (8028af4 ) - 8028a38: 4293 cmp r3, r2 - 8028a3a: d04a beq.n 8028ad2 - 8028a3c: 687b ldr r3, [r7, #4] - 8028a3e: 681b ldr r3, [r3, #0] - 8028a40: 4a2d ldr r2, [pc, #180] ; (8028af8 ) - 8028a42: 4293 cmp r3, r2 - 8028a44: d045 beq.n 8028ad2 - 8028a46: 687b ldr r3, [r7, #4] - 8028a48: 681b ldr r3, [r3, #0] - 8028a4a: 4a2c ldr r2, [pc, #176] ; (8028afc ) - 8028a4c: 4293 cmp r3, r2 - 8028a4e: d040 beq.n 8028ad2 - 8028a50: 687b ldr r3, [r7, #4] - 8028a52: 681b ldr r3, [r3, #0] - 8028a54: 4a2a ldr r2, [pc, #168] ; (8028b00 ) - 8028a56: 4293 cmp r3, r2 - 8028a58: d03b beq.n 8028ad2 - 8028a5a: 687b ldr r3, [r7, #4] - 8028a5c: 681b ldr r3, [r3, #0] - 8028a5e: 4a29 ldr r2, [pc, #164] ; (8028b04 ) - 8028a60: 4293 cmp r3, r2 - 8028a62: d036 beq.n 8028ad2 - 8028a64: 687b ldr r3, [r7, #4] - 8028a66: 681b ldr r3, [r3, #0] - 8028a68: 4a27 ldr r2, [pc, #156] ; (8028b08 ) - 8028a6a: 4293 cmp r3, r2 - 8028a6c: d031 beq.n 8028ad2 - 8028a6e: 687b ldr r3, [r7, #4] - 8028a70: 681b ldr r3, [r3, #0] - 8028a72: 4a26 ldr r2, [pc, #152] ; (8028b0c ) - 8028a74: 4293 cmp r3, r2 - 8028a76: d02c beq.n 8028ad2 - 8028a78: 687b ldr r3, [r7, #4] - 8028a7a: 681b ldr r3, [r3, #0] - 8028a7c: 4a24 ldr r2, [pc, #144] ; (8028b10 ) - 8028a7e: 4293 cmp r3, r2 - 8028a80: d027 beq.n 8028ad2 - 8028a82: 687b ldr r3, [r7, #4] - 8028a84: 681b ldr r3, [r3, #0] - 8028a86: 4a23 ldr r2, [pc, #140] ; (8028b14 ) - 8028a88: 4293 cmp r3, r2 - 8028a8a: d022 beq.n 8028ad2 - 8028a8c: 687b ldr r3, [r7, #4] - 8028a8e: 681b ldr r3, [r3, #0] - 8028a90: 4a21 ldr r2, [pc, #132] ; (8028b18 ) - 8028a92: 4293 cmp r3, r2 - 8028a94: d01d beq.n 8028ad2 - 8028a96: 687b ldr r3, [r7, #4] - 8028a98: 681b ldr r3, [r3, #0] - 8028a9a: 4a20 ldr r2, [pc, #128] ; (8028b1c ) - 8028a9c: 4293 cmp r3, r2 - 8028a9e: d018 beq.n 8028ad2 - 8028aa0: 687b ldr r3, [r7, #4] - 8028aa2: 681b ldr r3, [r3, #0] - 8028aa4: 4a1e ldr r2, [pc, #120] ; (8028b20 ) - 8028aa6: 4293 cmp r3, r2 - 8028aa8: d013 beq.n 8028ad2 - 8028aaa: 687b ldr r3, [r7, #4] - 8028aac: 681b ldr r3, [r3, #0] - 8028aae: 4a1d ldr r2, [pc, #116] ; (8028b24 ) - 8028ab0: 4293 cmp r3, r2 - 8028ab2: d00e beq.n 8028ad2 - 8028ab4: 687b ldr r3, [r7, #4] - 8028ab6: 681b ldr r3, [r3, #0] - 8028ab8: 4a1b ldr r2, [pc, #108] ; (8028b28 ) - 8028aba: 4293 cmp r3, r2 - 8028abc: d009 beq.n 8028ad2 - 8028abe: 687b ldr r3, [r7, #4] - 8028ac0: 681b ldr r3, [r3, #0] - 8028ac2: 4a1a ldr r2, [pc, #104] ; (8028b2c ) - 8028ac4: 4293 cmp r3, r2 - 8028ac6: d004 beq.n 8028ad2 - 8028ac8: 687b ldr r3, [r7, #4] - 8028aca: 681b ldr r3, [r3, #0] - 8028acc: 4a18 ldr r2, [pc, #96] ; (8028b30 ) - 8028ace: 4293 cmp r3, r2 - 8028ad0: d101 bne.n 8028ad6 - 8028ad2: 2301 movs r3, #1 - 8028ad4: e000 b.n 8028ad8 - 8028ad6: 2300 movs r3, #0 - 8028ad8: 2b00 cmp r3, #0 - 8028ada: d02b beq.n 8028b34 + 8028ab6: 687b ldr r3, [r7, #4] + 8028ab8: 681b ldr r3, [r3, #0] + 8028aba: 4a2f ldr r2, [pc, #188] ; (8028b78 ) + 8028abc: 4293 cmp r3, r2 + 8028abe: d04a beq.n 8028b56 + 8028ac0: 687b ldr r3, [r7, #4] + 8028ac2: 681b ldr r3, [r3, #0] + 8028ac4: 4a2d ldr r2, [pc, #180] ; (8028b7c ) + 8028ac6: 4293 cmp r3, r2 + 8028ac8: d045 beq.n 8028b56 + 8028aca: 687b ldr r3, [r7, #4] + 8028acc: 681b ldr r3, [r3, #0] + 8028ace: 4a2c ldr r2, [pc, #176] ; (8028b80 ) + 8028ad0: 4293 cmp r3, r2 + 8028ad2: d040 beq.n 8028b56 + 8028ad4: 687b ldr r3, [r7, #4] + 8028ad6: 681b ldr r3, [r3, #0] + 8028ad8: 4a2a ldr r2, [pc, #168] ; (8028b84 ) + 8028ada: 4293 cmp r3, r2 + 8028adc: d03b beq.n 8028b56 + 8028ade: 687b ldr r3, [r7, #4] + 8028ae0: 681b ldr r3, [r3, #0] + 8028ae2: 4a29 ldr r2, [pc, #164] ; (8028b88 ) + 8028ae4: 4293 cmp r3, r2 + 8028ae6: d036 beq.n 8028b56 + 8028ae8: 687b ldr r3, [r7, #4] + 8028aea: 681b ldr r3, [r3, #0] + 8028aec: 4a27 ldr r2, [pc, #156] ; (8028b8c ) + 8028aee: 4293 cmp r3, r2 + 8028af0: d031 beq.n 8028b56 + 8028af2: 687b ldr r3, [r7, #4] + 8028af4: 681b ldr r3, [r3, #0] + 8028af6: 4a26 ldr r2, [pc, #152] ; (8028b90 ) + 8028af8: 4293 cmp r3, r2 + 8028afa: d02c beq.n 8028b56 + 8028afc: 687b ldr r3, [r7, #4] + 8028afe: 681b ldr r3, [r3, #0] + 8028b00: 4a24 ldr r2, [pc, #144] ; (8028b94 ) + 8028b02: 4293 cmp r3, r2 + 8028b04: d027 beq.n 8028b56 + 8028b06: 687b ldr r3, [r7, #4] + 8028b08: 681b ldr r3, [r3, #0] + 8028b0a: 4a23 ldr r2, [pc, #140] ; (8028b98 ) + 8028b0c: 4293 cmp r3, r2 + 8028b0e: d022 beq.n 8028b56 + 8028b10: 687b ldr r3, [r7, #4] + 8028b12: 681b ldr r3, [r3, #0] + 8028b14: 4a21 ldr r2, [pc, #132] ; (8028b9c ) + 8028b16: 4293 cmp r3, r2 + 8028b18: d01d beq.n 8028b56 + 8028b1a: 687b ldr r3, [r7, #4] + 8028b1c: 681b ldr r3, [r3, #0] + 8028b1e: 4a20 ldr r2, [pc, #128] ; (8028ba0 ) + 8028b20: 4293 cmp r3, r2 + 8028b22: d018 beq.n 8028b56 + 8028b24: 687b ldr r3, [r7, #4] + 8028b26: 681b ldr r3, [r3, #0] + 8028b28: 4a1e ldr r2, [pc, #120] ; (8028ba4 ) + 8028b2a: 4293 cmp r3, r2 + 8028b2c: d013 beq.n 8028b56 + 8028b2e: 687b ldr r3, [r7, #4] + 8028b30: 681b ldr r3, [r3, #0] + 8028b32: 4a1d ldr r2, [pc, #116] ; (8028ba8 ) + 8028b34: 4293 cmp r3, r2 + 8028b36: d00e beq.n 8028b56 + 8028b38: 687b ldr r3, [r7, #4] + 8028b3a: 681b ldr r3, [r3, #0] + 8028b3c: 4a1b ldr r2, [pc, #108] ; (8028bac ) + 8028b3e: 4293 cmp r3, r2 + 8028b40: d009 beq.n 8028b56 + 8028b42: 687b ldr r3, [r7, #4] + 8028b44: 681b ldr r3, [r3, #0] + 8028b46: 4a1a ldr r2, [pc, #104] ; (8028bb0 ) + 8028b48: 4293 cmp r3, r2 + 8028b4a: d004 beq.n 8028b56 + 8028b4c: 687b ldr r3, [r7, #4] + 8028b4e: 681b ldr r3, [r3, #0] + 8028b50: 4a18 ldr r2, [pc, #96] ; (8028bb4 ) + 8028b52: 4293 cmp r3, r2 + 8028b54: d101 bne.n 8028b5a + 8028b56: 2301 movs r3, #1 + 8028b58: e000 b.n 8028b5c + 8028b5a: 2300 movs r3, #0 + 8028b5c: 2b00 cmp r3, #0 + 8028b5e: d02b beq.n 8028bb8 { regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress; - 8028adc: 687b ldr r3, [r7, #4] - 8028ade: 6d9b ldr r3, [r3, #88] ; 0x58 - 8028ae0: 60bb str r3, [r7, #8] + 8028b60: 687b ldr r3, [r7, #4] + 8028b62: 6d9b ldr r3, [r3, #88] ; 0x58 + 8028b64: 60bb str r3, [r7, #8] regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); - 8028ae2: 687b ldr r3, [r7, #4] - 8028ae4: 6ddb ldr r3, [r3, #92] ; 0x5c - 8028ae6: f003 031f and.w r3, r3, #31 - 8028aea: 223f movs r2, #63 ; 0x3f - 8028aec: 409a lsls r2, r3 - 8028aee: 68bb ldr r3, [r7, #8] - 8028af0: 609a str r2, [r3, #8] - 8028af2: e02a b.n 8028b4a - 8028af4: 40020010 .word 0x40020010 - 8028af8: 40020028 .word 0x40020028 - 8028afc: 40020040 .word 0x40020040 - 8028b00: 40020058 .word 0x40020058 - 8028b04: 40020070 .word 0x40020070 - 8028b08: 40020088 .word 0x40020088 - 8028b0c: 400200a0 .word 0x400200a0 - 8028b10: 400200b8 .word 0x400200b8 - 8028b14: 40020410 .word 0x40020410 - 8028b18: 40020428 .word 0x40020428 - 8028b1c: 40020440 .word 0x40020440 - 8028b20: 40020458 .word 0x40020458 - 8028b24: 40020470 .word 0x40020470 - 8028b28: 40020488 .word 0x40020488 - 8028b2c: 400204a0 .word 0x400204a0 - 8028b30: 400204b8 .word 0x400204b8 + 8028b66: 687b ldr r3, [r7, #4] + 8028b68: 6ddb ldr r3, [r3, #92] ; 0x5c + 8028b6a: f003 031f and.w r3, r3, #31 + 8028b6e: 223f movs r2, #63 ; 0x3f + 8028b70: 409a lsls r2, r3 + 8028b72: 68bb ldr r3, [r7, #8] + 8028b74: 609a str r2, [r3, #8] + 8028b76: e02a b.n 8028bce + 8028b78: 40020010 .word 0x40020010 + 8028b7c: 40020028 .word 0x40020028 + 8028b80: 40020040 .word 0x40020040 + 8028b84: 40020058 .word 0x40020058 + 8028b88: 40020070 .word 0x40020070 + 8028b8c: 40020088 .word 0x40020088 + 8028b90: 400200a0 .word 0x400200a0 + 8028b94: 400200b8 .word 0x400200b8 + 8028b98: 40020410 .word 0x40020410 + 8028b9c: 40020428 .word 0x40020428 + 8028ba0: 40020440 .word 0x40020440 + 8028ba4: 40020458 .word 0x40020458 + 8028ba8: 40020470 .word 0x40020470 + 8028bac: 40020488 .word 0x40020488 + 8028bb0: 400204a0 .word 0x400204a0 + 8028bb4: 400204b8 .word 0x400204b8 } else /* BDMA channel */ { regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress; - 8028b34: 687b ldr r3, [r7, #4] - 8028b36: 6d9b ldr r3, [r3, #88] ; 0x58 - 8028b38: 60fb str r3, [r7, #12] + 8028bb8: 687b ldr r3, [r7, #4] + 8028bba: 6d9b ldr r3, [r3, #88] ; 0x58 + 8028bbc: 60fb str r3, [r7, #12] regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); - 8028b3a: 687b ldr r3, [r7, #4] - 8028b3c: 6ddb ldr r3, [r3, #92] ; 0x5c - 8028b3e: f003 031f and.w r3, r3, #31 - 8028b42: 2201 movs r2, #1 - 8028b44: 409a lsls r2, r3 - 8028b46: 68fb ldr r3, [r7, #12] - 8028b48: 605a str r2, [r3, #4] + 8028bbe: 687b ldr r3, [r7, #4] + 8028bc0: 6ddb ldr r3, [r3, #92] ; 0x5c + 8028bc2: f003 031f and.w r3, r3, #31 + 8028bc6: 2201 movs r2, #1 + 8028bc8: 409a lsls r2, r3 + 8028bca: 68fb ldr r3, [r7, #12] + 8028bcc: 605a str r2, [r3, #4] } if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 8028b4a: 687b ldr r3, [r7, #4] - 8028b4c: 681b ldr r3, [r3, #0] - 8028b4e: 4a4f ldr r2, [pc, #316] ; (8028c8c ) - 8028b50: 4293 cmp r3, r2 - 8028b52: d072 beq.n 8028c3a - 8028b54: 687b ldr r3, [r7, #4] - 8028b56: 681b ldr r3, [r3, #0] - 8028b58: 4a4d ldr r2, [pc, #308] ; (8028c90 ) - 8028b5a: 4293 cmp r3, r2 - 8028b5c: d06d beq.n 8028c3a - 8028b5e: 687b ldr r3, [r7, #4] - 8028b60: 681b ldr r3, [r3, #0] - 8028b62: 4a4c ldr r2, [pc, #304] ; (8028c94 ) - 8028b64: 4293 cmp r3, r2 - 8028b66: d068 beq.n 8028c3a - 8028b68: 687b ldr r3, [r7, #4] - 8028b6a: 681b ldr r3, [r3, #0] - 8028b6c: 4a4a ldr r2, [pc, #296] ; (8028c98 ) - 8028b6e: 4293 cmp r3, r2 - 8028b70: d063 beq.n 8028c3a - 8028b72: 687b ldr r3, [r7, #4] - 8028b74: 681b ldr r3, [r3, #0] - 8028b76: 4a49 ldr r2, [pc, #292] ; (8028c9c ) - 8028b78: 4293 cmp r3, r2 - 8028b7a: d05e beq.n 8028c3a - 8028b7c: 687b ldr r3, [r7, #4] - 8028b7e: 681b ldr r3, [r3, #0] - 8028b80: 4a47 ldr r2, [pc, #284] ; (8028ca0 ) - 8028b82: 4293 cmp r3, r2 - 8028b84: d059 beq.n 8028c3a - 8028b86: 687b ldr r3, [r7, #4] - 8028b88: 681b ldr r3, [r3, #0] - 8028b8a: 4a46 ldr r2, [pc, #280] ; (8028ca4 ) - 8028b8c: 4293 cmp r3, r2 - 8028b8e: d054 beq.n 8028c3a - 8028b90: 687b ldr r3, [r7, #4] - 8028b92: 681b ldr r3, [r3, #0] - 8028b94: 4a44 ldr r2, [pc, #272] ; (8028ca8 ) - 8028b96: 4293 cmp r3, r2 - 8028b98: d04f beq.n 8028c3a - 8028b9a: 687b ldr r3, [r7, #4] - 8028b9c: 681b ldr r3, [r3, #0] - 8028b9e: 4a43 ldr r2, [pc, #268] ; (8028cac ) - 8028ba0: 4293 cmp r3, r2 - 8028ba2: d04a beq.n 8028c3a - 8028ba4: 687b ldr r3, [r7, #4] - 8028ba6: 681b ldr r3, [r3, #0] - 8028ba8: 4a41 ldr r2, [pc, #260] ; (8028cb0 ) - 8028baa: 4293 cmp r3, r2 - 8028bac: d045 beq.n 8028c3a - 8028bae: 687b ldr r3, [r7, #4] - 8028bb0: 681b ldr r3, [r3, #0] - 8028bb2: 4a40 ldr r2, [pc, #256] ; (8028cb4 ) - 8028bb4: 4293 cmp r3, r2 - 8028bb6: d040 beq.n 8028c3a - 8028bb8: 687b ldr r3, [r7, #4] - 8028bba: 681b ldr r3, [r3, #0] - 8028bbc: 4a3e ldr r2, [pc, #248] ; (8028cb8 ) - 8028bbe: 4293 cmp r3, r2 - 8028bc0: d03b beq.n 8028c3a - 8028bc2: 687b ldr r3, [r7, #4] - 8028bc4: 681b ldr r3, [r3, #0] - 8028bc6: 4a3d ldr r2, [pc, #244] ; (8028cbc ) - 8028bc8: 4293 cmp r3, r2 - 8028bca: d036 beq.n 8028c3a - 8028bcc: 687b ldr r3, [r7, #4] - 8028bce: 681b ldr r3, [r3, #0] - 8028bd0: 4a3b ldr r2, [pc, #236] ; (8028cc0 ) - 8028bd2: 4293 cmp r3, r2 - 8028bd4: d031 beq.n 8028c3a - 8028bd6: 687b ldr r3, [r7, #4] - 8028bd8: 681b ldr r3, [r3, #0] - 8028bda: 4a3a ldr r2, [pc, #232] ; (8028cc4 ) - 8028bdc: 4293 cmp r3, r2 - 8028bde: d02c beq.n 8028c3a - 8028be0: 687b ldr r3, [r7, #4] - 8028be2: 681b ldr r3, [r3, #0] - 8028be4: 4a38 ldr r2, [pc, #224] ; (8028cc8 ) - 8028be6: 4293 cmp r3, r2 - 8028be8: d027 beq.n 8028c3a - 8028bea: 687b ldr r3, [r7, #4] - 8028bec: 681b ldr r3, [r3, #0] - 8028bee: 4a37 ldr r2, [pc, #220] ; (8028ccc ) - 8028bf0: 4293 cmp r3, r2 - 8028bf2: d022 beq.n 8028c3a - 8028bf4: 687b ldr r3, [r7, #4] - 8028bf6: 681b ldr r3, [r3, #0] - 8028bf8: 4a35 ldr r2, [pc, #212] ; (8028cd0 ) - 8028bfa: 4293 cmp r3, r2 - 8028bfc: d01d beq.n 8028c3a - 8028bfe: 687b ldr r3, [r7, #4] - 8028c00: 681b ldr r3, [r3, #0] - 8028c02: 4a34 ldr r2, [pc, #208] ; (8028cd4 ) - 8028c04: 4293 cmp r3, r2 - 8028c06: d018 beq.n 8028c3a - 8028c08: 687b ldr r3, [r7, #4] - 8028c0a: 681b ldr r3, [r3, #0] - 8028c0c: 4a32 ldr r2, [pc, #200] ; (8028cd8 ) - 8028c0e: 4293 cmp r3, r2 - 8028c10: d013 beq.n 8028c3a - 8028c12: 687b ldr r3, [r7, #4] - 8028c14: 681b ldr r3, [r3, #0] - 8028c16: 4a31 ldr r2, [pc, #196] ; (8028cdc ) - 8028c18: 4293 cmp r3, r2 - 8028c1a: d00e beq.n 8028c3a - 8028c1c: 687b ldr r3, [r7, #4] - 8028c1e: 681b ldr r3, [r3, #0] - 8028c20: 4a2f ldr r2, [pc, #188] ; (8028ce0 ) - 8028c22: 4293 cmp r3, r2 - 8028c24: d009 beq.n 8028c3a - 8028c26: 687b ldr r3, [r7, #4] - 8028c28: 681b ldr r3, [r3, #0] - 8028c2a: 4a2e ldr r2, [pc, #184] ; (8028ce4 ) - 8028c2c: 4293 cmp r3, r2 - 8028c2e: d004 beq.n 8028c3a - 8028c30: 687b ldr r3, [r7, #4] - 8028c32: 681b ldr r3, [r3, #0] - 8028c34: 4a2c ldr r2, [pc, #176] ; (8028ce8 ) - 8028c36: 4293 cmp r3, r2 - 8028c38: d101 bne.n 8028c3e - 8028c3a: 2301 movs r3, #1 - 8028c3c: e000 b.n 8028c40 - 8028c3e: 2300 movs r3, #0 - 8028c40: 2b00 cmp r3, #0 - 8028c42: d015 beq.n 8028c70 + 8028bce: 687b ldr r3, [r7, #4] + 8028bd0: 681b ldr r3, [r3, #0] + 8028bd2: 4a4f ldr r2, [pc, #316] ; (8028d10 ) + 8028bd4: 4293 cmp r3, r2 + 8028bd6: d072 beq.n 8028cbe + 8028bd8: 687b ldr r3, [r7, #4] + 8028bda: 681b ldr r3, [r3, #0] + 8028bdc: 4a4d ldr r2, [pc, #308] ; (8028d14 ) + 8028bde: 4293 cmp r3, r2 + 8028be0: d06d beq.n 8028cbe + 8028be2: 687b ldr r3, [r7, #4] + 8028be4: 681b ldr r3, [r3, #0] + 8028be6: 4a4c ldr r2, [pc, #304] ; (8028d18 ) + 8028be8: 4293 cmp r3, r2 + 8028bea: d068 beq.n 8028cbe + 8028bec: 687b ldr r3, [r7, #4] + 8028bee: 681b ldr r3, [r3, #0] + 8028bf0: 4a4a ldr r2, [pc, #296] ; (8028d1c ) + 8028bf2: 4293 cmp r3, r2 + 8028bf4: d063 beq.n 8028cbe + 8028bf6: 687b ldr r3, [r7, #4] + 8028bf8: 681b ldr r3, [r3, #0] + 8028bfa: 4a49 ldr r2, [pc, #292] ; (8028d20 ) + 8028bfc: 4293 cmp r3, r2 + 8028bfe: d05e beq.n 8028cbe + 8028c00: 687b ldr r3, [r7, #4] + 8028c02: 681b ldr r3, [r3, #0] + 8028c04: 4a47 ldr r2, [pc, #284] ; (8028d24 ) + 8028c06: 4293 cmp r3, r2 + 8028c08: d059 beq.n 8028cbe + 8028c0a: 687b ldr r3, [r7, #4] + 8028c0c: 681b ldr r3, [r3, #0] + 8028c0e: 4a46 ldr r2, [pc, #280] ; (8028d28 ) + 8028c10: 4293 cmp r3, r2 + 8028c12: d054 beq.n 8028cbe + 8028c14: 687b ldr r3, [r7, #4] + 8028c16: 681b ldr r3, [r3, #0] + 8028c18: 4a44 ldr r2, [pc, #272] ; (8028d2c ) + 8028c1a: 4293 cmp r3, r2 + 8028c1c: d04f beq.n 8028cbe + 8028c1e: 687b ldr r3, [r7, #4] + 8028c20: 681b ldr r3, [r3, #0] + 8028c22: 4a43 ldr r2, [pc, #268] ; (8028d30 ) + 8028c24: 4293 cmp r3, r2 + 8028c26: d04a beq.n 8028cbe + 8028c28: 687b ldr r3, [r7, #4] + 8028c2a: 681b ldr r3, [r3, #0] + 8028c2c: 4a41 ldr r2, [pc, #260] ; (8028d34 ) + 8028c2e: 4293 cmp r3, r2 + 8028c30: d045 beq.n 8028cbe + 8028c32: 687b ldr r3, [r7, #4] + 8028c34: 681b ldr r3, [r3, #0] + 8028c36: 4a40 ldr r2, [pc, #256] ; (8028d38 ) + 8028c38: 4293 cmp r3, r2 + 8028c3a: d040 beq.n 8028cbe + 8028c3c: 687b ldr r3, [r7, #4] + 8028c3e: 681b ldr r3, [r3, #0] + 8028c40: 4a3e ldr r2, [pc, #248] ; (8028d3c ) + 8028c42: 4293 cmp r3, r2 + 8028c44: d03b beq.n 8028cbe + 8028c46: 687b ldr r3, [r7, #4] + 8028c48: 681b ldr r3, [r3, #0] + 8028c4a: 4a3d ldr r2, [pc, #244] ; (8028d40 ) + 8028c4c: 4293 cmp r3, r2 + 8028c4e: d036 beq.n 8028cbe + 8028c50: 687b ldr r3, [r7, #4] + 8028c52: 681b ldr r3, [r3, #0] + 8028c54: 4a3b ldr r2, [pc, #236] ; (8028d44 ) + 8028c56: 4293 cmp r3, r2 + 8028c58: d031 beq.n 8028cbe + 8028c5a: 687b ldr r3, [r7, #4] + 8028c5c: 681b ldr r3, [r3, #0] + 8028c5e: 4a3a ldr r2, [pc, #232] ; (8028d48 ) + 8028c60: 4293 cmp r3, r2 + 8028c62: d02c beq.n 8028cbe + 8028c64: 687b ldr r3, [r7, #4] + 8028c66: 681b ldr r3, [r3, #0] + 8028c68: 4a38 ldr r2, [pc, #224] ; (8028d4c ) + 8028c6a: 4293 cmp r3, r2 + 8028c6c: d027 beq.n 8028cbe + 8028c6e: 687b ldr r3, [r7, #4] + 8028c70: 681b ldr r3, [r3, #0] + 8028c72: 4a37 ldr r2, [pc, #220] ; (8028d50 ) + 8028c74: 4293 cmp r3, r2 + 8028c76: d022 beq.n 8028cbe + 8028c78: 687b ldr r3, [r7, #4] + 8028c7a: 681b ldr r3, [r3, #0] + 8028c7c: 4a35 ldr r2, [pc, #212] ; (8028d54 ) + 8028c7e: 4293 cmp r3, r2 + 8028c80: d01d beq.n 8028cbe + 8028c82: 687b ldr r3, [r7, #4] + 8028c84: 681b ldr r3, [r3, #0] + 8028c86: 4a34 ldr r2, [pc, #208] ; (8028d58 ) + 8028c88: 4293 cmp r3, r2 + 8028c8a: d018 beq.n 8028cbe + 8028c8c: 687b ldr r3, [r7, #4] + 8028c8e: 681b ldr r3, [r3, #0] + 8028c90: 4a32 ldr r2, [pc, #200] ; (8028d5c ) + 8028c92: 4293 cmp r3, r2 + 8028c94: d013 beq.n 8028cbe + 8028c96: 687b ldr r3, [r7, #4] + 8028c98: 681b ldr r3, [r3, #0] + 8028c9a: 4a31 ldr r2, [pc, #196] ; (8028d60 ) + 8028c9c: 4293 cmp r3, r2 + 8028c9e: d00e beq.n 8028cbe + 8028ca0: 687b ldr r3, [r7, #4] + 8028ca2: 681b ldr r3, [r3, #0] + 8028ca4: 4a2f ldr r2, [pc, #188] ; (8028d64 ) + 8028ca6: 4293 cmp r3, r2 + 8028ca8: d009 beq.n 8028cbe + 8028caa: 687b ldr r3, [r7, #4] + 8028cac: 681b ldr r3, [r3, #0] + 8028cae: 4a2e ldr r2, [pc, #184] ; (8028d68 ) + 8028cb0: 4293 cmp r3, r2 + 8028cb2: d004 beq.n 8028cbe + 8028cb4: 687b ldr r3, [r7, #4] + 8028cb6: 681b ldr r3, [r3, #0] + 8028cb8: 4a2c ldr r2, [pc, #176] ; (8028d6c ) + 8028cba: 4293 cmp r3, r2 + 8028cbc: d101 bne.n 8028cc2 + 8028cbe: 2301 movs r3, #1 + 8028cc0: e000 b.n 8028cc4 + 8028cc2: 2300 movs r3, #0 + 8028cc4: 2b00 cmp r3, #0 + 8028cc6: d015 beq.n 8028cf4 { /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 8028c44: 687b ldr r3, [r7, #4] - 8028c46: 6e5b ldr r3, [r3, #100] ; 0x64 - 8028c48: 687a ldr r2, [r7, #4] - 8028c4a: 6e92 ldr r2, [r2, #104] ; 0x68 - 8028c4c: 605a str r2, [r3, #4] + 8028cc8: 687b ldr r3, [r7, #4] + 8028cca: 6e5b ldr r3, [r3, #100] ; 0x64 + 8028ccc: 687a ldr r2, [r7, #4] + 8028cce: 6e92 ldr r2, [r2, #104] ; 0x68 + 8028cd0: 605a str r2, [r3, #4] if(hdma->DMAmuxRequestGen != 0U) - 8028c4e: 687b ldr r3, [r7, #4] - 8028c50: 6edb ldr r3, [r3, #108] ; 0x6c - 8028c52: 2b00 cmp r3, #0 - 8028c54: d00c beq.n 8028c70 + 8028cd2: 687b ldr r3, [r7, #4] + 8028cd4: 6edb ldr r3, [r3, #108] ; 0x6c + 8028cd6: 2b00 cmp r3, #0 + 8028cd8: d00c beq.n 8028cf4 { /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */ /* disable the request gen overrun IT */ hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - 8028c56: 687b ldr r3, [r7, #4] - 8028c58: 6edb ldr r3, [r3, #108] ; 0x6c - 8028c5a: 681a ldr r2, [r3, #0] - 8028c5c: 687b ldr r3, [r7, #4] - 8028c5e: 6edb ldr r3, [r3, #108] ; 0x6c - 8028c60: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8028c64: 601a str r2, [r3, #0] + 8028cda: 687b ldr r3, [r7, #4] + 8028cdc: 6edb ldr r3, [r3, #108] ; 0x6c + 8028cde: 681a ldr r2, [r3, #0] + 8028ce0: 687b ldr r3, [r7, #4] + 8028ce2: 6edb ldr r3, [r3, #108] ; 0x6c + 8028ce4: f422 7280 bic.w r2, r2, #256 ; 0x100 + 8028ce8: 601a str r2, [r3, #0] /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 8028c66: 687b ldr r3, [r7, #4] - 8028c68: 6f1b ldr r3, [r3, #112] ; 0x70 - 8028c6a: 687a ldr r2, [r7, #4] - 8028c6c: 6f52 ldr r2, [r2, #116] ; 0x74 - 8028c6e: 605a str r2, [r3, #4] + 8028cea: 687b ldr r3, [r7, #4] + 8028cec: 6f1b ldr r3, [r3, #112] ; 0x70 + 8028cee: 687a ldr r2, [r7, #4] + 8028cf0: 6f52 ldr r2, [r2, #116] ; 0x74 + 8028cf2: 605a str r2, [r3, #4] } } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8028c70: 687b ldr r3, [r7, #4] - 8028c72: 2201 movs r2, #1 - 8028c74: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8028cf4: 687b ldr r3, [r7, #4] + 8028cf6: 2201 movs r2, #1 + 8028cf8: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8028c78: 687b ldr r3, [r7, #4] - 8028c7a: 2200 movs r2, #0 - 8028c7c: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8028cfc: 687b ldr r3, [r7, #4] + 8028cfe: 2200 movs r2, #0 + 8028d00: f883 2034 strb.w r2, [r3, #52] ; 0x34 } return HAL_OK; - 8028c80: 2300 movs r3, #0 -} - 8028c82: 4618 mov r0, r3 - 8028c84: 3718 adds r7, #24 - 8028c86: 46bd mov sp, r7 - 8028c88: bd80 pop {r7, pc} - 8028c8a: bf00 nop - 8028c8c: 40020010 .word 0x40020010 - 8028c90: 40020028 .word 0x40020028 - 8028c94: 40020040 .word 0x40020040 - 8028c98: 40020058 .word 0x40020058 - 8028c9c: 40020070 .word 0x40020070 - 8028ca0: 40020088 .word 0x40020088 - 8028ca4: 400200a0 .word 0x400200a0 - 8028ca8: 400200b8 .word 0x400200b8 - 8028cac: 40020410 .word 0x40020410 - 8028cb0: 40020428 .word 0x40020428 - 8028cb4: 40020440 .word 0x40020440 - 8028cb8: 40020458 .word 0x40020458 - 8028cbc: 40020470 .word 0x40020470 - 8028cc0: 40020488 .word 0x40020488 - 8028cc4: 400204a0 .word 0x400204a0 - 8028cc8: 400204b8 .word 0x400204b8 - 8028ccc: 58025408 .word 0x58025408 - 8028cd0: 5802541c .word 0x5802541c - 8028cd4: 58025430 .word 0x58025430 - 8028cd8: 58025444 .word 0x58025444 - 8028cdc: 58025458 .word 0x58025458 - 8028ce0: 5802546c .word 0x5802546c - 8028ce4: 58025480 .word 0x58025480 - 8028ce8: 58025494 .word 0x58025494 - -08028cec : + 8028d04: 2300 movs r3, #0 +} + 8028d06: 4618 mov r0, r3 + 8028d08: 3718 adds r7, #24 + 8028d0a: 46bd mov sp, r7 + 8028d0c: bd80 pop {r7, pc} + 8028d0e: bf00 nop + 8028d10: 40020010 .word 0x40020010 + 8028d14: 40020028 .word 0x40020028 + 8028d18: 40020040 .word 0x40020040 + 8028d1c: 40020058 .word 0x40020058 + 8028d20: 40020070 .word 0x40020070 + 8028d24: 40020088 .word 0x40020088 + 8028d28: 400200a0 .word 0x400200a0 + 8028d2c: 400200b8 .word 0x400200b8 + 8028d30: 40020410 .word 0x40020410 + 8028d34: 40020428 .word 0x40020428 + 8028d38: 40020440 .word 0x40020440 + 8028d3c: 40020458 .word 0x40020458 + 8028d40: 40020470 .word 0x40020470 + 8028d44: 40020488 .word 0x40020488 + 8028d48: 400204a0 .word 0x400204a0 + 8028d4c: 400204b8 .word 0x400204b8 + 8028d50: 58025408 .word 0x58025408 + 8028d54: 5802541c .word 0x5802541c + 8028d58: 58025430 .word 0x58025430 + 8028d5c: 58025444 .word 0x58025444 + 8028d60: 58025458 .word 0x58025458 + 8028d64: 5802546c .word 0x5802546c + 8028d68: 58025480 .word 0x58025480 + 8028d6c: 58025494 .word 0x58025494 + +08028d70 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 8028cec: b580 push {r7, lr} - 8028cee: b084 sub sp, #16 - 8028cf0: af00 add r7, sp, #0 - 8028cf2: 6078 str r0, [r7, #4] + 8028d70: b580 push {r7, lr} + 8028d72: b084 sub sp, #16 + 8028d74: af00 add r7, sp, #0 + 8028d76: 6078 str r0, [r7, #4] BDMA_Base_Registers *regs_bdma; /* Check the DMA peripheral handle */ if(hdma == NULL) - 8028cf4: 687b ldr r3, [r7, #4] - 8028cf6: 2b00 cmp r3, #0 - 8028cf8: d101 bne.n 8028cfe + 8028d78: 687b ldr r3, [r7, #4] + 8028d7a: 2b00 cmp r3, #0 + 8028d7c: d101 bne.n 8028d82 { return HAL_ERROR; - 8028cfa: 2301 movs r3, #1 - 8028cfc: e237 b.n 802916e + 8028d7e: 2301 movs r3, #1 + 8028d80: e237 b.n 80291f2 } if(hdma->State != HAL_DMA_STATE_BUSY) - 8028cfe: 687b ldr r3, [r7, #4] - 8028d00: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 8028d04: b2db uxtb r3, r3 - 8028d06: 2b02 cmp r3, #2 - 8028d08: d004 beq.n 8028d14 + 8028d82: 687b ldr r3, [r7, #4] + 8028d84: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 8028d88: b2db uxtb r3, r3 + 8028d8a: 2b02 cmp r3, #2 + 8028d8c: d004 beq.n 8028d98 { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8028d0a: 687b ldr r3, [r7, #4] - 8028d0c: 2280 movs r2, #128 ; 0x80 - 8028d0e: 655a str r2, [r3, #84] ; 0x54 + 8028d8e: 687b ldr r3, [r7, #4] + 8028d90: 2280 movs r2, #128 ; 0x80 + 8028d92: 655a str r2, [r3, #84] ; 0x54 return HAL_ERROR; - 8028d10: 2301 movs r3, #1 - 8028d12: e22c b.n 802916e + 8028d94: 2301 movs r3, #1 + 8028d96: e22c b.n 80291f2 } else { if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 8028d14: 687b ldr r3, [r7, #4] - 8028d16: 681b ldr r3, [r3, #0] - 8028d18: 4a5c ldr r2, [pc, #368] ; (8028e8c ) - 8028d1a: 4293 cmp r3, r2 - 8028d1c: d04a beq.n 8028db4 - 8028d1e: 687b ldr r3, [r7, #4] - 8028d20: 681b ldr r3, [r3, #0] - 8028d22: 4a5b ldr r2, [pc, #364] ; (8028e90 ) - 8028d24: 4293 cmp r3, r2 - 8028d26: d045 beq.n 8028db4 - 8028d28: 687b ldr r3, [r7, #4] - 8028d2a: 681b ldr r3, [r3, #0] - 8028d2c: 4a59 ldr r2, [pc, #356] ; (8028e94 ) - 8028d2e: 4293 cmp r3, r2 - 8028d30: d040 beq.n 8028db4 - 8028d32: 687b ldr r3, [r7, #4] - 8028d34: 681b ldr r3, [r3, #0] - 8028d36: 4a58 ldr r2, [pc, #352] ; (8028e98 ) - 8028d38: 4293 cmp r3, r2 - 8028d3a: d03b beq.n 8028db4 - 8028d3c: 687b ldr r3, [r7, #4] - 8028d3e: 681b ldr r3, [r3, #0] - 8028d40: 4a56 ldr r2, [pc, #344] ; (8028e9c ) - 8028d42: 4293 cmp r3, r2 - 8028d44: d036 beq.n 8028db4 - 8028d46: 687b ldr r3, [r7, #4] - 8028d48: 681b ldr r3, [r3, #0] - 8028d4a: 4a55 ldr r2, [pc, #340] ; (8028ea0 ) - 8028d4c: 4293 cmp r3, r2 - 8028d4e: d031 beq.n 8028db4 - 8028d50: 687b ldr r3, [r7, #4] - 8028d52: 681b ldr r3, [r3, #0] - 8028d54: 4a53 ldr r2, [pc, #332] ; (8028ea4 ) - 8028d56: 4293 cmp r3, r2 - 8028d58: d02c beq.n 8028db4 - 8028d5a: 687b ldr r3, [r7, #4] - 8028d5c: 681b ldr r3, [r3, #0] - 8028d5e: 4a52 ldr r2, [pc, #328] ; (8028ea8 ) - 8028d60: 4293 cmp r3, r2 - 8028d62: d027 beq.n 8028db4 - 8028d64: 687b ldr r3, [r7, #4] - 8028d66: 681b ldr r3, [r3, #0] - 8028d68: 4a50 ldr r2, [pc, #320] ; (8028eac ) - 8028d6a: 4293 cmp r3, r2 - 8028d6c: d022 beq.n 8028db4 - 8028d6e: 687b ldr r3, [r7, #4] - 8028d70: 681b ldr r3, [r3, #0] - 8028d72: 4a4f ldr r2, [pc, #316] ; (8028eb0 ) - 8028d74: 4293 cmp r3, r2 - 8028d76: d01d beq.n 8028db4 - 8028d78: 687b ldr r3, [r7, #4] - 8028d7a: 681b ldr r3, [r3, #0] - 8028d7c: 4a4d ldr r2, [pc, #308] ; (8028eb4 ) - 8028d7e: 4293 cmp r3, r2 - 8028d80: d018 beq.n 8028db4 - 8028d82: 687b ldr r3, [r7, #4] - 8028d84: 681b ldr r3, [r3, #0] - 8028d86: 4a4c ldr r2, [pc, #304] ; (8028eb8 ) - 8028d88: 4293 cmp r3, r2 - 8028d8a: d013 beq.n 8028db4 - 8028d8c: 687b ldr r3, [r7, #4] - 8028d8e: 681b ldr r3, [r3, #0] - 8028d90: 4a4a ldr r2, [pc, #296] ; (8028ebc ) - 8028d92: 4293 cmp r3, r2 - 8028d94: d00e beq.n 8028db4 - 8028d96: 687b ldr r3, [r7, #4] - 8028d98: 681b ldr r3, [r3, #0] - 8028d9a: 4a49 ldr r2, [pc, #292] ; (8028ec0 ) - 8028d9c: 4293 cmp r3, r2 - 8028d9e: d009 beq.n 8028db4 - 8028da0: 687b ldr r3, [r7, #4] - 8028da2: 681b ldr r3, [r3, #0] - 8028da4: 4a47 ldr r2, [pc, #284] ; (8028ec4 ) - 8028da6: 4293 cmp r3, r2 - 8028da8: d004 beq.n 8028db4 - 8028daa: 687b ldr r3, [r7, #4] - 8028dac: 681b ldr r3, [r3, #0] - 8028dae: 4a46 ldr r2, [pc, #280] ; (8028ec8 ) - 8028db0: 4293 cmp r3, r2 - 8028db2: d101 bne.n 8028db8 - 8028db4: 2301 movs r3, #1 - 8028db6: e000 b.n 8028dba - 8028db8: 2300 movs r3, #0 - 8028dba: 2b00 cmp r3, #0 - 8028dbc: f000 8086 beq.w 8028ecc + 8028d98: 687b ldr r3, [r7, #4] + 8028d9a: 681b ldr r3, [r3, #0] + 8028d9c: 4a5c ldr r2, [pc, #368] ; (8028f10 ) + 8028d9e: 4293 cmp r3, r2 + 8028da0: d04a beq.n 8028e38 + 8028da2: 687b ldr r3, [r7, #4] + 8028da4: 681b ldr r3, [r3, #0] + 8028da6: 4a5b ldr r2, [pc, #364] ; (8028f14 ) + 8028da8: 4293 cmp r3, r2 + 8028daa: d045 beq.n 8028e38 + 8028dac: 687b ldr r3, [r7, #4] + 8028dae: 681b ldr r3, [r3, #0] + 8028db0: 4a59 ldr r2, [pc, #356] ; (8028f18 ) + 8028db2: 4293 cmp r3, r2 + 8028db4: d040 beq.n 8028e38 + 8028db6: 687b ldr r3, [r7, #4] + 8028db8: 681b ldr r3, [r3, #0] + 8028dba: 4a58 ldr r2, [pc, #352] ; (8028f1c ) + 8028dbc: 4293 cmp r3, r2 + 8028dbe: d03b beq.n 8028e38 + 8028dc0: 687b ldr r3, [r7, #4] + 8028dc2: 681b ldr r3, [r3, #0] + 8028dc4: 4a56 ldr r2, [pc, #344] ; (8028f20 ) + 8028dc6: 4293 cmp r3, r2 + 8028dc8: d036 beq.n 8028e38 + 8028dca: 687b ldr r3, [r7, #4] + 8028dcc: 681b ldr r3, [r3, #0] + 8028dce: 4a55 ldr r2, [pc, #340] ; (8028f24 ) + 8028dd0: 4293 cmp r3, r2 + 8028dd2: d031 beq.n 8028e38 + 8028dd4: 687b ldr r3, [r7, #4] + 8028dd6: 681b ldr r3, [r3, #0] + 8028dd8: 4a53 ldr r2, [pc, #332] ; (8028f28 ) + 8028dda: 4293 cmp r3, r2 + 8028ddc: d02c beq.n 8028e38 + 8028dde: 687b ldr r3, [r7, #4] + 8028de0: 681b ldr r3, [r3, #0] + 8028de2: 4a52 ldr r2, [pc, #328] ; (8028f2c ) + 8028de4: 4293 cmp r3, r2 + 8028de6: d027 beq.n 8028e38 + 8028de8: 687b ldr r3, [r7, #4] + 8028dea: 681b ldr r3, [r3, #0] + 8028dec: 4a50 ldr r2, [pc, #320] ; (8028f30 ) + 8028dee: 4293 cmp r3, r2 + 8028df0: d022 beq.n 8028e38 + 8028df2: 687b ldr r3, [r7, #4] + 8028df4: 681b ldr r3, [r3, #0] + 8028df6: 4a4f ldr r2, [pc, #316] ; (8028f34 ) + 8028df8: 4293 cmp r3, r2 + 8028dfa: d01d beq.n 8028e38 + 8028dfc: 687b ldr r3, [r7, #4] + 8028dfe: 681b ldr r3, [r3, #0] + 8028e00: 4a4d ldr r2, [pc, #308] ; (8028f38 ) + 8028e02: 4293 cmp r3, r2 + 8028e04: d018 beq.n 8028e38 + 8028e06: 687b ldr r3, [r7, #4] + 8028e08: 681b ldr r3, [r3, #0] + 8028e0a: 4a4c ldr r2, [pc, #304] ; (8028f3c ) + 8028e0c: 4293 cmp r3, r2 + 8028e0e: d013 beq.n 8028e38 + 8028e10: 687b ldr r3, [r7, #4] + 8028e12: 681b ldr r3, [r3, #0] + 8028e14: 4a4a ldr r2, [pc, #296] ; (8028f40 ) + 8028e16: 4293 cmp r3, r2 + 8028e18: d00e beq.n 8028e38 + 8028e1a: 687b ldr r3, [r7, #4] + 8028e1c: 681b ldr r3, [r3, #0] + 8028e1e: 4a49 ldr r2, [pc, #292] ; (8028f44 ) + 8028e20: 4293 cmp r3, r2 + 8028e22: d009 beq.n 8028e38 + 8028e24: 687b ldr r3, [r7, #4] + 8028e26: 681b ldr r3, [r3, #0] + 8028e28: 4a47 ldr r2, [pc, #284] ; (8028f48 ) + 8028e2a: 4293 cmp r3, r2 + 8028e2c: d004 beq.n 8028e38 + 8028e2e: 687b ldr r3, [r7, #4] + 8028e30: 681b ldr r3, [r3, #0] + 8028e32: 4a46 ldr r2, [pc, #280] ; (8028f4c ) + 8028e34: 4293 cmp r3, r2 + 8028e36: d101 bne.n 8028e3c + 8028e38: 2301 movs r3, #1 + 8028e3a: e000 b.n 8028e3e + 8028e3c: 2300 movs r3, #0 + 8028e3e: 2b00 cmp r3, #0 + 8028e40: f000 8086 beq.w 8028f50 { /* Set Abort State */ hdma->State = HAL_DMA_STATE_ABORT; - 8028dc0: 687b ldr r3, [r7, #4] - 8028dc2: 2204 movs r2, #4 - 8028dc4: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8028e44: 687b ldr r3, [r7, #4] + 8028e46: 2204 movs r2, #4 + 8028e48: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Disable the stream */ __HAL_DMA_DISABLE(hdma); - 8028dc8: 687b ldr r3, [r7, #4] - 8028dca: 681b ldr r3, [r3, #0] - 8028dcc: 4a2f ldr r2, [pc, #188] ; (8028e8c ) - 8028dce: 4293 cmp r3, r2 - 8028dd0: d04a beq.n 8028e68 - 8028dd2: 687b ldr r3, [r7, #4] - 8028dd4: 681b ldr r3, [r3, #0] - 8028dd6: 4a2e ldr r2, [pc, #184] ; (8028e90 ) - 8028dd8: 4293 cmp r3, r2 - 8028dda: d045 beq.n 8028e68 - 8028ddc: 687b ldr r3, [r7, #4] - 8028dde: 681b ldr r3, [r3, #0] - 8028de0: 4a2c ldr r2, [pc, #176] ; (8028e94 ) - 8028de2: 4293 cmp r3, r2 - 8028de4: d040 beq.n 8028e68 - 8028de6: 687b ldr r3, [r7, #4] - 8028de8: 681b ldr r3, [r3, #0] - 8028dea: 4a2b ldr r2, [pc, #172] ; (8028e98 ) - 8028dec: 4293 cmp r3, r2 - 8028dee: d03b beq.n 8028e68 - 8028df0: 687b ldr r3, [r7, #4] - 8028df2: 681b ldr r3, [r3, #0] - 8028df4: 4a29 ldr r2, [pc, #164] ; (8028e9c ) - 8028df6: 4293 cmp r3, r2 - 8028df8: d036 beq.n 8028e68 - 8028dfa: 687b ldr r3, [r7, #4] - 8028dfc: 681b ldr r3, [r3, #0] - 8028dfe: 4a28 ldr r2, [pc, #160] ; (8028ea0 ) - 8028e00: 4293 cmp r3, r2 - 8028e02: d031 beq.n 8028e68 - 8028e04: 687b ldr r3, [r7, #4] - 8028e06: 681b ldr r3, [r3, #0] - 8028e08: 4a26 ldr r2, [pc, #152] ; (8028ea4 ) - 8028e0a: 4293 cmp r3, r2 - 8028e0c: d02c beq.n 8028e68 - 8028e0e: 687b ldr r3, [r7, #4] - 8028e10: 681b ldr r3, [r3, #0] - 8028e12: 4a25 ldr r2, [pc, #148] ; (8028ea8 ) - 8028e14: 4293 cmp r3, r2 - 8028e16: d027 beq.n 8028e68 - 8028e18: 687b ldr r3, [r7, #4] - 8028e1a: 681b ldr r3, [r3, #0] - 8028e1c: 4a23 ldr r2, [pc, #140] ; (8028eac ) - 8028e1e: 4293 cmp r3, r2 - 8028e20: d022 beq.n 8028e68 - 8028e22: 687b ldr r3, [r7, #4] - 8028e24: 681b ldr r3, [r3, #0] - 8028e26: 4a22 ldr r2, [pc, #136] ; (8028eb0 ) - 8028e28: 4293 cmp r3, r2 - 8028e2a: d01d beq.n 8028e68 - 8028e2c: 687b ldr r3, [r7, #4] - 8028e2e: 681b ldr r3, [r3, #0] - 8028e30: 4a20 ldr r2, [pc, #128] ; (8028eb4 ) - 8028e32: 4293 cmp r3, r2 - 8028e34: d018 beq.n 8028e68 - 8028e36: 687b ldr r3, [r7, #4] - 8028e38: 681b ldr r3, [r3, #0] - 8028e3a: 4a1f ldr r2, [pc, #124] ; (8028eb8 ) - 8028e3c: 4293 cmp r3, r2 - 8028e3e: d013 beq.n 8028e68 - 8028e40: 687b ldr r3, [r7, #4] - 8028e42: 681b ldr r3, [r3, #0] - 8028e44: 4a1d ldr r2, [pc, #116] ; (8028ebc ) - 8028e46: 4293 cmp r3, r2 - 8028e48: d00e beq.n 8028e68 - 8028e4a: 687b ldr r3, [r7, #4] - 8028e4c: 681b ldr r3, [r3, #0] - 8028e4e: 4a1c ldr r2, [pc, #112] ; (8028ec0 ) - 8028e50: 4293 cmp r3, r2 - 8028e52: d009 beq.n 8028e68 - 8028e54: 687b ldr r3, [r7, #4] - 8028e56: 681b ldr r3, [r3, #0] - 8028e58: 4a1a ldr r2, [pc, #104] ; (8028ec4 ) - 8028e5a: 4293 cmp r3, r2 - 8028e5c: d004 beq.n 8028e68 - 8028e5e: 687b ldr r3, [r7, #4] - 8028e60: 681b ldr r3, [r3, #0] - 8028e62: 4a19 ldr r2, [pc, #100] ; (8028ec8 ) - 8028e64: 4293 cmp r3, r2 - 8028e66: d108 bne.n 8028e7a - 8028e68: 687b ldr r3, [r7, #4] - 8028e6a: 681b ldr r3, [r3, #0] - 8028e6c: 681a ldr r2, [r3, #0] - 8028e6e: 687b ldr r3, [r7, #4] - 8028e70: 681b ldr r3, [r3, #0] - 8028e72: f022 0201 bic.w r2, r2, #1 - 8028e76: 601a str r2, [r3, #0] - 8028e78: e178 b.n 802916c - 8028e7a: 687b ldr r3, [r7, #4] - 8028e7c: 681b ldr r3, [r3, #0] - 8028e7e: 681a ldr r2, [r3, #0] - 8028e80: 687b ldr r3, [r7, #4] - 8028e82: 681b ldr r3, [r3, #0] - 8028e84: f022 0201 bic.w r2, r2, #1 - 8028e88: 601a str r2, [r3, #0] - 8028e8a: e16f b.n 802916c - 8028e8c: 40020010 .word 0x40020010 - 8028e90: 40020028 .word 0x40020028 - 8028e94: 40020040 .word 0x40020040 - 8028e98: 40020058 .word 0x40020058 - 8028e9c: 40020070 .word 0x40020070 - 8028ea0: 40020088 .word 0x40020088 - 8028ea4: 400200a0 .word 0x400200a0 - 8028ea8: 400200b8 .word 0x400200b8 - 8028eac: 40020410 .word 0x40020410 - 8028eb0: 40020428 .word 0x40020428 - 8028eb4: 40020440 .word 0x40020440 - 8028eb8: 40020458 .word 0x40020458 - 8028ebc: 40020470 .word 0x40020470 - 8028ec0: 40020488 .word 0x40020488 - 8028ec4: 400204a0 .word 0x400204a0 - 8028ec8: 400204b8 .word 0x400204b8 + 8028e4c: 687b ldr r3, [r7, #4] + 8028e4e: 681b ldr r3, [r3, #0] + 8028e50: 4a2f ldr r2, [pc, #188] ; (8028f10 ) + 8028e52: 4293 cmp r3, r2 + 8028e54: d04a beq.n 8028eec + 8028e56: 687b ldr r3, [r7, #4] + 8028e58: 681b ldr r3, [r3, #0] + 8028e5a: 4a2e ldr r2, [pc, #184] ; (8028f14 ) + 8028e5c: 4293 cmp r3, r2 + 8028e5e: d045 beq.n 8028eec + 8028e60: 687b ldr r3, [r7, #4] + 8028e62: 681b ldr r3, [r3, #0] + 8028e64: 4a2c ldr r2, [pc, #176] ; (8028f18 ) + 8028e66: 4293 cmp r3, r2 + 8028e68: d040 beq.n 8028eec + 8028e6a: 687b ldr r3, [r7, #4] + 8028e6c: 681b ldr r3, [r3, #0] + 8028e6e: 4a2b ldr r2, [pc, #172] ; (8028f1c ) + 8028e70: 4293 cmp r3, r2 + 8028e72: d03b beq.n 8028eec + 8028e74: 687b ldr r3, [r7, #4] + 8028e76: 681b ldr r3, [r3, #0] + 8028e78: 4a29 ldr r2, [pc, #164] ; (8028f20 ) + 8028e7a: 4293 cmp r3, r2 + 8028e7c: d036 beq.n 8028eec + 8028e7e: 687b ldr r3, [r7, #4] + 8028e80: 681b ldr r3, [r3, #0] + 8028e82: 4a28 ldr r2, [pc, #160] ; (8028f24 ) + 8028e84: 4293 cmp r3, r2 + 8028e86: d031 beq.n 8028eec + 8028e88: 687b ldr r3, [r7, #4] + 8028e8a: 681b ldr r3, [r3, #0] + 8028e8c: 4a26 ldr r2, [pc, #152] ; (8028f28 ) + 8028e8e: 4293 cmp r3, r2 + 8028e90: d02c beq.n 8028eec + 8028e92: 687b ldr r3, [r7, #4] + 8028e94: 681b ldr r3, [r3, #0] + 8028e96: 4a25 ldr r2, [pc, #148] ; (8028f2c ) + 8028e98: 4293 cmp r3, r2 + 8028e9a: d027 beq.n 8028eec + 8028e9c: 687b ldr r3, [r7, #4] + 8028e9e: 681b ldr r3, [r3, #0] + 8028ea0: 4a23 ldr r2, [pc, #140] ; (8028f30 ) + 8028ea2: 4293 cmp r3, r2 + 8028ea4: d022 beq.n 8028eec + 8028ea6: 687b ldr r3, [r7, #4] + 8028ea8: 681b ldr r3, [r3, #0] + 8028eaa: 4a22 ldr r2, [pc, #136] ; (8028f34 ) + 8028eac: 4293 cmp r3, r2 + 8028eae: d01d beq.n 8028eec + 8028eb0: 687b ldr r3, [r7, #4] + 8028eb2: 681b ldr r3, [r3, #0] + 8028eb4: 4a20 ldr r2, [pc, #128] ; (8028f38 ) + 8028eb6: 4293 cmp r3, r2 + 8028eb8: d018 beq.n 8028eec + 8028eba: 687b ldr r3, [r7, #4] + 8028ebc: 681b ldr r3, [r3, #0] + 8028ebe: 4a1f ldr r2, [pc, #124] ; (8028f3c ) + 8028ec0: 4293 cmp r3, r2 + 8028ec2: d013 beq.n 8028eec + 8028ec4: 687b ldr r3, [r7, #4] + 8028ec6: 681b ldr r3, [r3, #0] + 8028ec8: 4a1d ldr r2, [pc, #116] ; (8028f40 ) + 8028eca: 4293 cmp r3, r2 + 8028ecc: d00e beq.n 8028eec + 8028ece: 687b ldr r3, [r7, #4] + 8028ed0: 681b ldr r3, [r3, #0] + 8028ed2: 4a1c ldr r2, [pc, #112] ; (8028f44 ) + 8028ed4: 4293 cmp r3, r2 + 8028ed6: d009 beq.n 8028eec + 8028ed8: 687b ldr r3, [r7, #4] + 8028eda: 681b ldr r3, [r3, #0] + 8028edc: 4a1a ldr r2, [pc, #104] ; (8028f48 ) + 8028ede: 4293 cmp r3, r2 + 8028ee0: d004 beq.n 8028eec + 8028ee2: 687b ldr r3, [r7, #4] + 8028ee4: 681b ldr r3, [r3, #0] + 8028ee6: 4a19 ldr r2, [pc, #100] ; (8028f4c ) + 8028ee8: 4293 cmp r3, r2 + 8028eea: d108 bne.n 8028efe + 8028eec: 687b ldr r3, [r7, #4] + 8028eee: 681b ldr r3, [r3, #0] + 8028ef0: 681a ldr r2, [r3, #0] + 8028ef2: 687b ldr r3, [r7, #4] + 8028ef4: 681b ldr r3, [r3, #0] + 8028ef6: f022 0201 bic.w r2, r2, #1 + 8028efa: 601a str r2, [r3, #0] + 8028efc: e178 b.n 80291f0 + 8028efe: 687b ldr r3, [r7, #4] + 8028f00: 681b ldr r3, [r3, #0] + 8028f02: 681a ldr r2, [r3, #0] + 8028f04: 687b ldr r3, [r7, #4] + 8028f06: 681b ldr r3, [r3, #0] + 8028f08: f022 0201 bic.w r2, r2, #1 + 8028f0c: 601a str r2, [r3, #0] + 8028f0e: e16f b.n 80291f0 + 8028f10: 40020010 .word 0x40020010 + 8028f14: 40020028 .word 0x40020028 + 8028f18: 40020040 .word 0x40020040 + 8028f1c: 40020058 .word 0x40020058 + 8028f20: 40020070 .word 0x40020070 + 8028f24: 40020088 .word 0x40020088 + 8028f28: 400200a0 .word 0x400200a0 + 8028f2c: 400200b8 .word 0x400200b8 + 8028f30: 40020410 .word 0x40020410 + 8028f34: 40020428 .word 0x40020428 + 8028f38: 40020440 .word 0x40020440 + 8028f3c: 40020458 .word 0x40020458 + 8028f40: 40020470 .word 0x40020470 + 8028f44: 40020488 .word 0x40020488 + 8028f48: 400204a0 .word 0x400204a0 + 8028f4c: 400204b8 .word 0x400204b8 } else /* BDMA channel */ { /* Disable DMA All Interrupts */ ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE); - 8028ecc: 687b ldr r3, [r7, #4] - 8028ece: 681b ldr r3, [r3, #0] - 8028ed0: 681a ldr r2, [r3, #0] - 8028ed2: 687b ldr r3, [r7, #4] - 8028ed4: 681b ldr r3, [r3, #0] - 8028ed6: f022 020e bic.w r2, r2, #14 - 8028eda: 601a str r2, [r3, #0] + 8028f50: 687b ldr r3, [r7, #4] + 8028f52: 681b ldr r3, [r3, #0] + 8028f54: 681a ldr r2, [r3, #0] + 8028f56: 687b ldr r3, [r7, #4] + 8028f58: 681b ldr r3, [r3, #0] + 8028f5a: f022 020e bic.w r2, r2, #14 + 8028f5e: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8028edc: 687b ldr r3, [r7, #4] - 8028ede: 681b ldr r3, [r3, #0] - 8028ee0: 4a6c ldr r2, [pc, #432] ; (8029094 ) - 8028ee2: 4293 cmp r3, r2 - 8028ee4: d04a beq.n 8028f7c - 8028ee6: 687b ldr r3, [r7, #4] - 8028ee8: 681b ldr r3, [r3, #0] - 8028eea: 4a6b ldr r2, [pc, #428] ; (8029098 ) - 8028eec: 4293 cmp r3, r2 - 8028eee: d045 beq.n 8028f7c - 8028ef0: 687b ldr r3, [r7, #4] - 8028ef2: 681b ldr r3, [r3, #0] - 8028ef4: 4a69 ldr r2, [pc, #420] ; (802909c ) - 8028ef6: 4293 cmp r3, r2 - 8028ef8: d040 beq.n 8028f7c - 8028efa: 687b ldr r3, [r7, #4] - 8028efc: 681b ldr r3, [r3, #0] - 8028efe: 4a68 ldr r2, [pc, #416] ; (80290a0 ) - 8028f00: 4293 cmp r3, r2 - 8028f02: d03b beq.n 8028f7c - 8028f04: 687b ldr r3, [r7, #4] - 8028f06: 681b ldr r3, [r3, #0] - 8028f08: 4a66 ldr r2, [pc, #408] ; (80290a4 ) - 8028f0a: 4293 cmp r3, r2 - 8028f0c: d036 beq.n 8028f7c - 8028f0e: 687b ldr r3, [r7, #4] - 8028f10: 681b ldr r3, [r3, #0] - 8028f12: 4a65 ldr r2, [pc, #404] ; (80290a8 ) - 8028f14: 4293 cmp r3, r2 - 8028f16: d031 beq.n 8028f7c - 8028f18: 687b ldr r3, [r7, #4] - 8028f1a: 681b ldr r3, [r3, #0] - 8028f1c: 4a63 ldr r2, [pc, #396] ; (80290ac ) - 8028f1e: 4293 cmp r3, r2 - 8028f20: d02c beq.n 8028f7c - 8028f22: 687b ldr r3, [r7, #4] - 8028f24: 681b ldr r3, [r3, #0] - 8028f26: 4a62 ldr r2, [pc, #392] ; (80290b0 ) - 8028f28: 4293 cmp r3, r2 - 8028f2a: d027 beq.n 8028f7c - 8028f2c: 687b ldr r3, [r7, #4] - 8028f2e: 681b ldr r3, [r3, #0] - 8028f30: 4a60 ldr r2, [pc, #384] ; (80290b4 ) - 8028f32: 4293 cmp r3, r2 - 8028f34: d022 beq.n 8028f7c - 8028f36: 687b ldr r3, [r7, #4] - 8028f38: 681b ldr r3, [r3, #0] - 8028f3a: 4a5f ldr r2, [pc, #380] ; (80290b8 ) - 8028f3c: 4293 cmp r3, r2 - 8028f3e: d01d beq.n 8028f7c - 8028f40: 687b ldr r3, [r7, #4] - 8028f42: 681b ldr r3, [r3, #0] - 8028f44: 4a5d ldr r2, [pc, #372] ; (80290bc ) - 8028f46: 4293 cmp r3, r2 - 8028f48: d018 beq.n 8028f7c - 8028f4a: 687b ldr r3, [r7, #4] - 8028f4c: 681b ldr r3, [r3, #0] - 8028f4e: 4a5c ldr r2, [pc, #368] ; (80290c0 ) - 8028f50: 4293 cmp r3, r2 - 8028f52: d013 beq.n 8028f7c - 8028f54: 687b ldr r3, [r7, #4] - 8028f56: 681b ldr r3, [r3, #0] - 8028f58: 4a5a ldr r2, [pc, #360] ; (80290c4 ) - 8028f5a: 4293 cmp r3, r2 - 8028f5c: d00e beq.n 8028f7c - 8028f5e: 687b ldr r3, [r7, #4] - 8028f60: 681b ldr r3, [r3, #0] - 8028f62: 4a59 ldr r2, [pc, #356] ; (80290c8 ) - 8028f64: 4293 cmp r3, r2 - 8028f66: d009 beq.n 8028f7c - 8028f68: 687b ldr r3, [r7, #4] - 8028f6a: 681b ldr r3, [r3, #0] - 8028f6c: 4a57 ldr r2, [pc, #348] ; (80290cc ) - 8028f6e: 4293 cmp r3, r2 - 8028f70: d004 beq.n 8028f7c - 8028f72: 687b ldr r3, [r7, #4] - 8028f74: 681b ldr r3, [r3, #0] - 8028f76: 4a56 ldr r2, [pc, #344] ; (80290d0 ) - 8028f78: 4293 cmp r3, r2 - 8028f7a: d108 bne.n 8028f8e - 8028f7c: 687b ldr r3, [r7, #4] - 8028f7e: 681b ldr r3, [r3, #0] - 8028f80: 681a ldr r2, [r3, #0] - 8028f82: 687b ldr r3, [r7, #4] - 8028f84: 681b ldr r3, [r3, #0] - 8028f86: f022 0201 bic.w r2, r2, #1 - 8028f8a: 601a str r2, [r3, #0] - 8028f8c: e007 b.n 8028f9e - 8028f8e: 687b ldr r3, [r7, #4] - 8028f90: 681b ldr r3, [r3, #0] - 8028f92: 681a ldr r2, [r3, #0] - 8028f94: 687b ldr r3, [r7, #4] - 8028f96: 681b ldr r3, [r3, #0] - 8028f98: f022 0201 bic.w r2, r2, #1 - 8028f9c: 601a str r2, [r3, #0] + 8028f60: 687b ldr r3, [r7, #4] + 8028f62: 681b ldr r3, [r3, #0] + 8028f64: 4a6c ldr r2, [pc, #432] ; (8029118 ) + 8028f66: 4293 cmp r3, r2 + 8028f68: d04a beq.n 8029000 + 8028f6a: 687b ldr r3, [r7, #4] + 8028f6c: 681b ldr r3, [r3, #0] + 8028f6e: 4a6b ldr r2, [pc, #428] ; (802911c ) + 8028f70: 4293 cmp r3, r2 + 8028f72: d045 beq.n 8029000 + 8028f74: 687b ldr r3, [r7, #4] + 8028f76: 681b ldr r3, [r3, #0] + 8028f78: 4a69 ldr r2, [pc, #420] ; (8029120 ) + 8028f7a: 4293 cmp r3, r2 + 8028f7c: d040 beq.n 8029000 + 8028f7e: 687b ldr r3, [r7, #4] + 8028f80: 681b ldr r3, [r3, #0] + 8028f82: 4a68 ldr r2, [pc, #416] ; (8029124 ) + 8028f84: 4293 cmp r3, r2 + 8028f86: d03b beq.n 8029000 + 8028f88: 687b ldr r3, [r7, #4] + 8028f8a: 681b ldr r3, [r3, #0] + 8028f8c: 4a66 ldr r2, [pc, #408] ; (8029128 ) + 8028f8e: 4293 cmp r3, r2 + 8028f90: d036 beq.n 8029000 + 8028f92: 687b ldr r3, [r7, #4] + 8028f94: 681b ldr r3, [r3, #0] + 8028f96: 4a65 ldr r2, [pc, #404] ; (802912c ) + 8028f98: 4293 cmp r3, r2 + 8028f9a: d031 beq.n 8029000 + 8028f9c: 687b ldr r3, [r7, #4] + 8028f9e: 681b ldr r3, [r3, #0] + 8028fa0: 4a63 ldr r2, [pc, #396] ; (8029130 ) + 8028fa2: 4293 cmp r3, r2 + 8028fa4: d02c beq.n 8029000 + 8028fa6: 687b ldr r3, [r7, #4] + 8028fa8: 681b ldr r3, [r3, #0] + 8028faa: 4a62 ldr r2, [pc, #392] ; (8029134 ) + 8028fac: 4293 cmp r3, r2 + 8028fae: d027 beq.n 8029000 + 8028fb0: 687b ldr r3, [r7, #4] + 8028fb2: 681b ldr r3, [r3, #0] + 8028fb4: 4a60 ldr r2, [pc, #384] ; (8029138 ) + 8028fb6: 4293 cmp r3, r2 + 8028fb8: d022 beq.n 8029000 + 8028fba: 687b ldr r3, [r7, #4] + 8028fbc: 681b ldr r3, [r3, #0] + 8028fbe: 4a5f ldr r2, [pc, #380] ; (802913c ) + 8028fc0: 4293 cmp r3, r2 + 8028fc2: d01d beq.n 8029000 + 8028fc4: 687b ldr r3, [r7, #4] + 8028fc6: 681b ldr r3, [r3, #0] + 8028fc8: 4a5d ldr r2, [pc, #372] ; (8029140 ) + 8028fca: 4293 cmp r3, r2 + 8028fcc: d018 beq.n 8029000 + 8028fce: 687b ldr r3, [r7, #4] + 8028fd0: 681b ldr r3, [r3, #0] + 8028fd2: 4a5c ldr r2, [pc, #368] ; (8029144 ) + 8028fd4: 4293 cmp r3, r2 + 8028fd6: d013 beq.n 8029000 + 8028fd8: 687b ldr r3, [r7, #4] + 8028fda: 681b ldr r3, [r3, #0] + 8028fdc: 4a5a ldr r2, [pc, #360] ; (8029148 ) + 8028fde: 4293 cmp r3, r2 + 8028fe0: d00e beq.n 8029000 + 8028fe2: 687b ldr r3, [r7, #4] + 8028fe4: 681b ldr r3, [r3, #0] + 8028fe6: 4a59 ldr r2, [pc, #356] ; (802914c ) + 8028fe8: 4293 cmp r3, r2 + 8028fea: d009 beq.n 8029000 + 8028fec: 687b ldr r3, [r7, #4] + 8028fee: 681b ldr r3, [r3, #0] + 8028ff0: 4a57 ldr r2, [pc, #348] ; (8029150 ) + 8028ff2: 4293 cmp r3, r2 + 8028ff4: d004 beq.n 8029000 + 8028ff6: 687b ldr r3, [r7, #4] + 8028ff8: 681b ldr r3, [r3, #0] + 8028ffa: 4a56 ldr r2, [pc, #344] ; (8029154 ) + 8028ffc: 4293 cmp r3, r2 + 8028ffe: d108 bne.n 8029012 + 8029000: 687b ldr r3, [r7, #4] + 8029002: 681b ldr r3, [r3, #0] + 8029004: 681a ldr r2, [r3, #0] + 8029006: 687b ldr r3, [r7, #4] + 8029008: 681b ldr r3, [r3, #0] + 802900a: f022 0201 bic.w r2, r2, #1 + 802900e: 601a str r2, [r3, #0] + 8029010: e007 b.n 8029022 + 8029012: 687b ldr r3, [r7, #4] + 8029014: 681b ldr r3, [r3, #0] + 8029016: 681a ldr r2, [r3, #0] + 8029018: 687b ldr r3, [r7, #4] + 802901a: 681b ldr r3, [r3, #0] + 802901c: f022 0201 bic.w r2, r2, #1 + 8029020: 601a str r2, [r3, #0] if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 8028f9e: 687b ldr r3, [r7, #4] - 8028fa0: 681b ldr r3, [r3, #0] - 8028fa2: 4a3c ldr r2, [pc, #240] ; (8029094 ) - 8028fa4: 4293 cmp r3, r2 - 8028fa6: d072 beq.n 802908e - 8028fa8: 687b ldr r3, [r7, #4] - 8028faa: 681b ldr r3, [r3, #0] - 8028fac: 4a3a ldr r2, [pc, #232] ; (8029098 ) - 8028fae: 4293 cmp r3, r2 - 8028fb0: d06d beq.n 802908e - 8028fb2: 687b ldr r3, [r7, #4] - 8028fb4: 681b ldr r3, [r3, #0] - 8028fb6: 4a39 ldr r2, [pc, #228] ; (802909c ) - 8028fb8: 4293 cmp r3, r2 - 8028fba: d068 beq.n 802908e - 8028fbc: 687b ldr r3, [r7, #4] - 8028fbe: 681b ldr r3, [r3, #0] - 8028fc0: 4a37 ldr r2, [pc, #220] ; (80290a0 ) - 8028fc2: 4293 cmp r3, r2 - 8028fc4: d063 beq.n 802908e - 8028fc6: 687b ldr r3, [r7, #4] - 8028fc8: 681b ldr r3, [r3, #0] - 8028fca: 4a36 ldr r2, [pc, #216] ; (80290a4 ) - 8028fcc: 4293 cmp r3, r2 - 8028fce: d05e beq.n 802908e - 8028fd0: 687b ldr r3, [r7, #4] - 8028fd2: 681b ldr r3, [r3, #0] - 8028fd4: 4a34 ldr r2, [pc, #208] ; (80290a8 ) - 8028fd6: 4293 cmp r3, r2 - 8028fd8: d059 beq.n 802908e - 8028fda: 687b ldr r3, [r7, #4] - 8028fdc: 681b ldr r3, [r3, #0] - 8028fde: 4a33 ldr r2, [pc, #204] ; (80290ac ) - 8028fe0: 4293 cmp r3, r2 - 8028fe2: d054 beq.n 802908e - 8028fe4: 687b ldr r3, [r7, #4] - 8028fe6: 681b ldr r3, [r3, #0] - 8028fe8: 4a31 ldr r2, [pc, #196] ; (80290b0 ) - 8028fea: 4293 cmp r3, r2 - 8028fec: d04f beq.n 802908e - 8028fee: 687b ldr r3, [r7, #4] - 8028ff0: 681b ldr r3, [r3, #0] - 8028ff2: 4a30 ldr r2, [pc, #192] ; (80290b4 ) - 8028ff4: 4293 cmp r3, r2 - 8028ff6: d04a beq.n 802908e - 8028ff8: 687b ldr r3, [r7, #4] - 8028ffa: 681b ldr r3, [r3, #0] - 8028ffc: 4a2e ldr r2, [pc, #184] ; (80290b8 ) - 8028ffe: 4293 cmp r3, r2 - 8029000: d045 beq.n 802908e - 8029002: 687b ldr r3, [r7, #4] - 8029004: 681b ldr r3, [r3, #0] - 8029006: 4a2d ldr r2, [pc, #180] ; (80290bc ) - 8029008: 4293 cmp r3, r2 - 802900a: d040 beq.n 802908e - 802900c: 687b ldr r3, [r7, #4] - 802900e: 681b ldr r3, [r3, #0] - 8029010: 4a2b ldr r2, [pc, #172] ; (80290c0 ) - 8029012: 4293 cmp r3, r2 - 8029014: d03b beq.n 802908e - 8029016: 687b ldr r3, [r7, #4] - 8029018: 681b ldr r3, [r3, #0] - 802901a: 4a2a ldr r2, [pc, #168] ; (80290c4 ) - 802901c: 4293 cmp r3, r2 - 802901e: d036 beq.n 802908e - 8029020: 687b ldr r3, [r7, #4] - 8029022: 681b ldr r3, [r3, #0] - 8029024: 4a28 ldr r2, [pc, #160] ; (80290c8 ) - 8029026: 4293 cmp r3, r2 - 8029028: d031 beq.n 802908e - 802902a: 687b ldr r3, [r7, #4] - 802902c: 681b ldr r3, [r3, #0] - 802902e: 4a27 ldr r2, [pc, #156] ; (80290cc ) - 8029030: 4293 cmp r3, r2 - 8029032: d02c beq.n 802908e - 8029034: 687b ldr r3, [r7, #4] - 8029036: 681b ldr r3, [r3, #0] - 8029038: 4a25 ldr r2, [pc, #148] ; (80290d0 ) - 802903a: 4293 cmp r3, r2 - 802903c: d027 beq.n 802908e - 802903e: 687b ldr r3, [r7, #4] - 8029040: 681b ldr r3, [r3, #0] - 8029042: 4a24 ldr r2, [pc, #144] ; (80290d4 ) - 8029044: 4293 cmp r3, r2 - 8029046: d022 beq.n 802908e - 8029048: 687b ldr r3, [r7, #4] - 802904a: 681b ldr r3, [r3, #0] - 802904c: 4a22 ldr r2, [pc, #136] ; (80290d8 ) - 802904e: 4293 cmp r3, r2 - 8029050: d01d beq.n 802908e - 8029052: 687b ldr r3, [r7, #4] - 8029054: 681b ldr r3, [r3, #0] - 8029056: 4a21 ldr r2, [pc, #132] ; (80290dc ) - 8029058: 4293 cmp r3, r2 - 802905a: d018 beq.n 802908e - 802905c: 687b ldr r3, [r7, #4] - 802905e: 681b ldr r3, [r3, #0] - 8029060: 4a1f ldr r2, [pc, #124] ; (80290e0 ) - 8029062: 4293 cmp r3, r2 - 8029064: d013 beq.n 802908e - 8029066: 687b ldr r3, [r7, #4] - 8029068: 681b ldr r3, [r3, #0] - 802906a: 4a1e ldr r2, [pc, #120] ; (80290e4 ) - 802906c: 4293 cmp r3, r2 - 802906e: d00e beq.n 802908e - 8029070: 687b ldr r3, [r7, #4] - 8029072: 681b ldr r3, [r3, #0] - 8029074: 4a1c ldr r2, [pc, #112] ; (80290e8 ) - 8029076: 4293 cmp r3, r2 - 8029078: d009 beq.n 802908e - 802907a: 687b ldr r3, [r7, #4] - 802907c: 681b ldr r3, [r3, #0] - 802907e: 4a1b ldr r2, [pc, #108] ; (80290ec ) - 8029080: 4293 cmp r3, r2 - 8029082: d004 beq.n 802908e - 8029084: 687b ldr r3, [r7, #4] - 8029086: 681b ldr r3, [r3, #0] - 8029088: 4a19 ldr r2, [pc, #100] ; (80290f0 ) - 802908a: 4293 cmp r3, r2 - 802908c: d132 bne.n 80290f4 - 802908e: 2301 movs r3, #1 - 8029090: e031 b.n 80290f6 - 8029092: bf00 nop - 8029094: 40020010 .word 0x40020010 - 8029098: 40020028 .word 0x40020028 - 802909c: 40020040 .word 0x40020040 - 80290a0: 40020058 .word 0x40020058 - 80290a4: 40020070 .word 0x40020070 - 80290a8: 40020088 .word 0x40020088 - 80290ac: 400200a0 .word 0x400200a0 - 80290b0: 400200b8 .word 0x400200b8 - 80290b4: 40020410 .word 0x40020410 - 80290b8: 40020428 .word 0x40020428 - 80290bc: 40020440 .word 0x40020440 - 80290c0: 40020458 .word 0x40020458 - 80290c4: 40020470 .word 0x40020470 - 80290c8: 40020488 .word 0x40020488 - 80290cc: 400204a0 .word 0x400204a0 - 80290d0: 400204b8 .word 0x400204b8 - 80290d4: 58025408 .word 0x58025408 - 80290d8: 5802541c .word 0x5802541c - 80290dc: 58025430 .word 0x58025430 - 80290e0: 58025444 .word 0x58025444 - 80290e4: 58025458 .word 0x58025458 - 80290e8: 5802546c .word 0x5802546c - 80290ec: 58025480 .word 0x58025480 - 80290f0: 58025494 .word 0x58025494 - 80290f4: 2300 movs r3, #0 - 80290f6: 2b00 cmp r3, #0 - 80290f8: d028 beq.n 802914c + 8029022: 687b ldr r3, [r7, #4] + 8029024: 681b ldr r3, [r3, #0] + 8029026: 4a3c ldr r2, [pc, #240] ; (8029118 ) + 8029028: 4293 cmp r3, r2 + 802902a: d072 beq.n 8029112 + 802902c: 687b ldr r3, [r7, #4] + 802902e: 681b ldr r3, [r3, #0] + 8029030: 4a3a ldr r2, [pc, #232] ; (802911c ) + 8029032: 4293 cmp r3, r2 + 8029034: d06d beq.n 8029112 + 8029036: 687b ldr r3, [r7, #4] + 8029038: 681b ldr r3, [r3, #0] + 802903a: 4a39 ldr r2, [pc, #228] ; (8029120 ) + 802903c: 4293 cmp r3, r2 + 802903e: d068 beq.n 8029112 + 8029040: 687b ldr r3, [r7, #4] + 8029042: 681b ldr r3, [r3, #0] + 8029044: 4a37 ldr r2, [pc, #220] ; (8029124 ) + 8029046: 4293 cmp r3, r2 + 8029048: d063 beq.n 8029112 + 802904a: 687b ldr r3, [r7, #4] + 802904c: 681b ldr r3, [r3, #0] + 802904e: 4a36 ldr r2, [pc, #216] ; (8029128 ) + 8029050: 4293 cmp r3, r2 + 8029052: d05e beq.n 8029112 + 8029054: 687b ldr r3, [r7, #4] + 8029056: 681b ldr r3, [r3, #0] + 8029058: 4a34 ldr r2, [pc, #208] ; (802912c ) + 802905a: 4293 cmp r3, r2 + 802905c: d059 beq.n 8029112 + 802905e: 687b ldr r3, [r7, #4] + 8029060: 681b ldr r3, [r3, #0] + 8029062: 4a33 ldr r2, [pc, #204] ; (8029130 ) + 8029064: 4293 cmp r3, r2 + 8029066: d054 beq.n 8029112 + 8029068: 687b ldr r3, [r7, #4] + 802906a: 681b ldr r3, [r3, #0] + 802906c: 4a31 ldr r2, [pc, #196] ; (8029134 ) + 802906e: 4293 cmp r3, r2 + 8029070: d04f beq.n 8029112 + 8029072: 687b ldr r3, [r7, #4] + 8029074: 681b ldr r3, [r3, #0] + 8029076: 4a30 ldr r2, [pc, #192] ; (8029138 ) + 8029078: 4293 cmp r3, r2 + 802907a: d04a beq.n 8029112 + 802907c: 687b ldr r3, [r7, #4] + 802907e: 681b ldr r3, [r3, #0] + 8029080: 4a2e ldr r2, [pc, #184] ; (802913c ) + 8029082: 4293 cmp r3, r2 + 8029084: d045 beq.n 8029112 + 8029086: 687b ldr r3, [r7, #4] + 8029088: 681b ldr r3, [r3, #0] + 802908a: 4a2d ldr r2, [pc, #180] ; (8029140 ) + 802908c: 4293 cmp r3, r2 + 802908e: d040 beq.n 8029112 + 8029090: 687b ldr r3, [r7, #4] + 8029092: 681b ldr r3, [r3, #0] + 8029094: 4a2b ldr r2, [pc, #172] ; (8029144 ) + 8029096: 4293 cmp r3, r2 + 8029098: d03b beq.n 8029112 + 802909a: 687b ldr r3, [r7, #4] + 802909c: 681b ldr r3, [r3, #0] + 802909e: 4a2a ldr r2, [pc, #168] ; (8029148 ) + 80290a0: 4293 cmp r3, r2 + 80290a2: d036 beq.n 8029112 + 80290a4: 687b ldr r3, [r7, #4] + 80290a6: 681b ldr r3, [r3, #0] + 80290a8: 4a28 ldr r2, [pc, #160] ; (802914c ) + 80290aa: 4293 cmp r3, r2 + 80290ac: d031 beq.n 8029112 + 80290ae: 687b ldr r3, [r7, #4] + 80290b0: 681b ldr r3, [r3, #0] + 80290b2: 4a27 ldr r2, [pc, #156] ; (8029150 ) + 80290b4: 4293 cmp r3, r2 + 80290b6: d02c beq.n 8029112 + 80290b8: 687b ldr r3, [r7, #4] + 80290ba: 681b ldr r3, [r3, #0] + 80290bc: 4a25 ldr r2, [pc, #148] ; (8029154 ) + 80290be: 4293 cmp r3, r2 + 80290c0: d027 beq.n 8029112 + 80290c2: 687b ldr r3, [r7, #4] + 80290c4: 681b ldr r3, [r3, #0] + 80290c6: 4a24 ldr r2, [pc, #144] ; (8029158 ) + 80290c8: 4293 cmp r3, r2 + 80290ca: d022 beq.n 8029112 + 80290cc: 687b ldr r3, [r7, #4] + 80290ce: 681b ldr r3, [r3, #0] + 80290d0: 4a22 ldr r2, [pc, #136] ; (802915c ) + 80290d2: 4293 cmp r3, r2 + 80290d4: d01d beq.n 8029112 + 80290d6: 687b ldr r3, [r7, #4] + 80290d8: 681b ldr r3, [r3, #0] + 80290da: 4a21 ldr r2, [pc, #132] ; (8029160 ) + 80290dc: 4293 cmp r3, r2 + 80290de: d018 beq.n 8029112 + 80290e0: 687b ldr r3, [r7, #4] + 80290e2: 681b ldr r3, [r3, #0] + 80290e4: 4a1f ldr r2, [pc, #124] ; (8029164 ) + 80290e6: 4293 cmp r3, r2 + 80290e8: d013 beq.n 8029112 + 80290ea: 687b ldr r3, [r7, #4] + 80290ec: 681b ldr r3, [r3, #0] + 80290ee: 4a1e ldr r2, [pc, #120] ; (8029168 ) + 80290f0: 4293 cmp r3, r2 + 80290f2: d00e beq.n 8029112 + 80290f4: 687b ldr r3, [r7, #4] + 80290f6: 681b ldr r3, [r3, #0] + 80290f8: 4a1c ldr r2, [pc, #112] ; (802916c ) + 80290fa: 4293 cmp r3, r2 + 80290fc: d009 beq.n 8029112 + 80290fe: 687b ldr r3, [r7, #4] + 8029100: 681b ldr r3, [r3, #0] + 8029102: 4a1b ldr r2, [pc, #108] ; (8029170 ) + 8029104: 4293 cmp r3, r2 + 8029106: d004 beq.n 8029112 + 8029108: 687b ldr r3, [r7, #4] + 802910a: 681b ldr r3, [r3, #0] + 802910c: 4a19 ldr r2, [pc, #100] ; (8029174 ) + 802910e: 4293 cmp r3, r2 + 8029110: d132 bne.n 8029178 + 8029112: 2301 movs r3, #1 + 8029114: e031 b.n 802917a + 8029116: bf00 nop + 8029118: 40020010 .word 0x40020010 + 802911c: 40020028 .word 0x40020028 + 8029120: 40020040 .word 0x40020040 + 8029124: 40020058 .word 0x40020058 + 8029128: 40020070 .word 0x40020070 + 802912c: 40020088 .word 0x40020088 + 8029130: 400200a0 .word 0x400200a0 + 8029134: 400200b8 .word 0x400200b8 + 8029138: 40020410 .word 0x40020410 + 802913c: 40020428 .word 0x40020428 + 8029140: 40020440 .word 0x40020440 + 8029144: 40020458 .word 0x40020458 + 8029148: 40020470 .word 0x40020470 + 802914c: 40020488 .word 0x40020488 + 8029150: 400204a0 .word 0x400204a0 + 8029154: 400204b8 .word 0x400204b8 + 8029158: 58025408 .word 0x58025408 + 802915c: 5802541c .word 0x5802541c + 8029160: 58025430 .word 0x58025430 + 8029164: 58025444 .word 0x58025444 + 8029168: 58025458 .word 0x58025458 + 802916c: 5802546c .word 0x5802546c + 8029170: 58025480 .word 0x58025480 + 8029174: 58025494 .word 0x58025494 + 8029178: 2300 movs r3, #0 + 802917a: 2b00 cmp r3, #0 + 802917c: d028 beq.n 80291d0 { /* disable the DMAMUX sync overrun IT */ hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; - 80290fa: 687b ldr r3, [r7, #4] - 80290fc: 6e1b ldr r3, [r3, #96] ; 0x60 - 80290fe: 681a ldr r2, [r3, #0] - 8029100: 687b ldr r3, [r7, #4] - 8029102: 6e1b ldr r3, [r3, #96] ; 0x60 - 8029104: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8029108: 601a str r2, [r3, #0] + 802917e: 687b ldr r3, [r7, #4] + 8029180: 6e1b ldr r3, [r3, #96] ; 0x60 + 8029182: 681a ldr r2, [r3, #0] + 8029184: 687b ldr r3, [r7, #4] + 8029186: 6e1b ldr r3, [r3, #96] ; 0x60 + 8029188: f422 7280 bic.w r2, r2, #256 ; 0x100 + 802918c: 601a str r2, [r3, #0] /* Clear all flags */ regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress; - 802910a: 687b ldr r3, [r7, #4] - 802910c: 6d9b ldr r3, [r3, #88] ; 0x58 - 802910e: 60fb str r3, [r7, #12] + 802918e: 687b ldr r3, [r7, #4] + 8029190: 6d9b ldr r3, [r3, #88] ; 0x58 + 8029192: 60fb str r3, [r7, #12] regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); - 8029110: 687b ldr r3, [r7, #4] - 8029112: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029114: f003 031f and.w r3, r3, #31 - 8029118: 2201 movs r2, #1 - 802911a: 409a lsls r2, r3 - 802911c: 68fb ldr r3, [r7, #12] - 802911e: 605a str r2, [r3, #4] + 8029194: 687b ldr r3, [r7, #4] + 8029196: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029198: f003 031f and.w r3, r3, #31 + 802919c: 2201 movs r2, #1 + 802919e: 409a lsls r2, r3 + 80291a0: 68fb ldr r3, [r7, #12] + 80291a2: 605a str r2, [r3, #4] /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 8029120: 687b ldr r3, [r7, #4] - 8029122: 6e5b ldr r3, [r3, #100] ; 0x64 - 8029124: 687a ldr r2, [r7, #4] - 8029126: 6e92 ldr r2, [r2, #104] ; 0x68 - 8029128: 605a str r2, [r3, #4] + 80291a4: 687b ldr r3, [r7, #4] + 80291a6: 6e5b ldr r3, [r3, #100] ; 0x64 + 80291a8: 687a ldr r2, [r7, #4] + 80291aa: 6e92 ldr r2, [r2, #104] ; 0x68 + 80291ac: 605a str r2, [r3, #4] if(hdma->DMAmuxRequestGen != 0U) - 802912a: 687b ldr r3, [r7, #4] - 802912c: 6edb ldr r3, [r3, #108] ; 0x6c - 802912e: 2b00 cmp r3, #0 - 8029130: d00c beq.n 802914c + 80291ae: 687b ldr r3, [r7, #4] + 80291b0: 6edb ldr r3, [r3, #108] ; 0x6c + 80291b2: 2b00 cmp r3, #0 + 80291b4: d00c beq.n 80291d0 { /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/ /* disable the request gen overrun IT */ hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE; - 8029132: 687b ldr r3, [r7, #4] - 8029134: 6edb ldr r3, [r3, #108] ; 0x6c - 8029136: 681a ldr r2, [r3, #0] - 8029138: 687b ldr r3, [r7, #4] - 802913a: 6edb ldr r3, [r3, #108] ; 0x6c - 802913c: f422 7280 bic.w r2, r2, #256 ; 0x100 - 8029140: 601a str r2, [r3, #0] + 80291b6: 687b ldr r3, [r7, #4] + 80291b8: 6edb ldr r3, [r3, #108] ; 0x6c + 80291ba: 681a ldr r2, [r3, #0] + 80291bc: 687b ldr r3, [r7, #4] + 80291be: 6edb ldr r3, [r3, #108] ; 0x6c + 80291c0: f422 7280 bic.w r2, r2, #256 ; 0x100 + 80291c4: 601a str r2, [r3, #0] /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 8029142: 687b ldr r3, [r7, #4] - 8029144: 6f1b ldr r3, [r3, #112] ; 0x70 - 8029146: 687a ldr r2, [r7, #4] - 8029148: 6f52 ldr r2, [r2, #116] ; 0x74 - 802914a: 605a str r2, [r3, #4] + 80291c6: 687b ldr r3, [r7, #4] + 80291c8: 6f1b ldr r3, [r3, #112] ; 0x70 + 80291ca: 687a ldr r2, [r7, #4] + 80291cc: 6f52 ldr r2, [r2, #116] ; 0x74 + 80291ce: 605a str r2, [r3, #4] } } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 802914c: 687b ldr r3, [r7, #4] - 802914e: 2201 movs r2, #1 - 8029150: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 80291d0: 687b ldr r3, [r7, #4] + 80291d2: 2201 movs r2, #1 + 80291d4: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029154: 687b ldr r3, [r7, #4] - 8029156: 2200 movs r2, #0 - 8029158: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 80291d8: 687b ldr r3, [r7, #4] + 80291da: 2200 movs r2, #0 + 80291dc: f883 2034 strb.w r2, [r3, #52] ; 0x34 /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) - 802915c: 687b ldr r3, [r7, #4] - 802915e: 6d1b ldr r3, [r3, #80] ; 0x50 - 8029160: 2b00 cmp r3, #0 - 8029162: d003 beq.n 802916c + 80291e0: 687b ldr r3, [r7, #4] + 80291e2: 6d1b ldr r3, [r3, #80] ; 0x50 + 80291e4: 2b00 cmp r3, #0 + 80291e6: d003 beq.n 80291f0 { hdma->XferAbortCallback(hdma); - 8029164: 687b ldr r3, [r7, #4] - 8029166: 6d1b ldr r3, [r3, #80] ; 0x50 - 8029168: 6878 ldr r0, [r7, #4] - 802916a: 4798 blx r3 + 80291e8: 687b ldr r3, [r7, #4] + 80291ea: 6d1b ldr r3, [r3, #80] ; 0x50 + 80291ec: 6878 ldr r0, [r7, #4] + 80291ee: 4798 blx r3 } } } return HAL_OK; - 802916c: 2300 movs r3, #0 + 80291f0: 2300 movs r3, #0 } - 802916e: 4618 mov r0, r3 - 8029170: 3710 adds r7, #16 - 8029172: 46bd mov sp, r7 - 8029174: bd80 pop {r7, pc} - 8029176: bf00 nop + 80291f2: 4618 mov r0, r3 + 80291f4: 3710 adds r7, #16 + 80291f6: 46bd mov sp, r7 + 80291f8: bd80 pop {r7, pc} + 80291fa: bf00 nop -08029178 : +080291fc : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { - 8029178: b580 push {r7, lr} - 802917a: b08a sub sp, #40 ; 0x28 - 802917c: af00 add r7, sp, #0 - 802917e: 6078 str r0, [r7, #4] + 80291fc: b580 push {r7, lr} + 80291fe: b08a sub sp, #40 ; 0x28 + 8029200: af00 add r7, sp, #0 + 8029202: 6078 str r0, [r7, #4] uint32_t tmpisr_dma, tmpisr_bdma; uint32_t ccr_reg; __IO uint32_t count = 0U; - 8029180: 2300 movs r3, #0 - 8029182: 60fb str r3, [r7, #12] + 8029204: 2300 movs r3, #0 + 8029206: 60fb str r3, [r7, #12] uint32_t timeout = SystemCoreClock / 9600U; - 8029184: 4b67 ldr r3, [pc, #412] ; (8029324 ) - 8029186: 681b ldr r3, [r3, #0] - 8029188: 4a67 ldr r2, [pc, #412] ; (8029328 ) - 802918a: fba2 2303 umull r2, r3, r2, r3 - 802918e: 0a9b lsrs r3, r3, #10 - 8029190: 627b str r3, [r7, #36] ; 0x24 + 8029208: 4b67 ldr r3, [pc, #412] ; (80293a8 ) + 802920a: 681b ldr r3, [r3, #0] + 802920c: 4a67 ldr r2, [pc, #412] ; (80293ac ) + 802920e: fba2 2303 umull r2, r3, r2, r3 + 8029212: 0a9b lsrs r3, r3, #10 + 8029214: 627b str r3, [r7, #36] ; 0x24 /* calculate DMA base and stream number */ DMA_Base_Registers *regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress; - 8029192: 687b ldr r3, [r7, #4] - 8029194: 6d9b ldr r3, [r3, #88] ; 0x58 - 8029196: 623b str r3, [r7, #32] + 8029216: 687b ldr r3, [r7, #4] + 8029218: 6d9b ldr r3, [r3, #88] ; 0x58 + 802921a: 623b str r3, [r7, #32] BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress; - 8029198: 687b ldr r3, [r7, #4] - 802919a: 6d9b ldr r3, [r3, #88] ; 0x58 - 802919c: 61fb str r3, [r7, #28] + 802921c: 687b ldr r3, [r7, #4] + 802921e: 6d9b ldr r3, [r3, #88] ; 0x58 + 8029220: 61fb str r3, [r7, #28] tmpisr_dma = regs_dma->ISR; - 802919e: 6a3b ldr r3, [r7, #32] - 80291a0: 681b ldr r3, [r3, #0] - 80291a2: 61bb str r3, [r7, #24] + 8029222: 6a3b ldr r3, [r7, #32] + 8029224: 681b ldr r3, [r3, #0] + 8029226: 61bb str r3, [r7, #24] tmpisr_bdma = regs_bdma->ISR; - 80291a4: 69fb ldr r3, [r7, #28] - 80291a6: 681b ldr r3, [r3, #0] - 80291a8: 617b str r3, [r7, #20] + 8029228: 69fb ldr r3, [r7, #28] + 802922a: 681b ldr r3, [r3, #0] + 802922c: 617b str r3, [r7, #20] if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 80291aa: 687b ldr r3, [r7, #4] - 80291ac: 681b ldr r3, [r3, #0] - 80291ae: 4a5f ldr r2, [pc, #380] ; (802932c ) - 80291b0: 4293 cmp r3, r2 - 80291b2: d04a beq.n 802924a - 80291b4: 687b ldr r3, [r7, #4] - 80291b6: 681b ldr r3, [r3, #0] - 80291b8: 4a5d ldr r2, [pc, #372] ; (8029330 ) - 80291ba: 4293 cmp r3, r2 - 80291bc: d045 beq.n 802924a - 80291be: 687b ldr r3, [r7, #4] - 80291c0: 681b ldr r3, [r3, #0] - 80291c2: 4a5c ldr r2, [pc, #368] ; (8029334 ) - 80291c4: 4293 cmp r3, r2 - 80291c6: d040 beq.n 802924a - 80291c8: 687b ldr r3, [r7, #4] - 80291ca: 681b ldr r3, [r3, #0] - 80291cc: 4a5a ldr r2, [pc, #360] ; (8029338 ) - 80291ce: 4293 cmp r3, r2 - 80291d0: d03b beq.n 802924a - 80291d2: 687b ldr r3, [r7, #4] - 80291d4: 681b ldr r3, [r3, #0] - 80291d6: 4a59 ldr r2, [pc, #356] ; (802933c ) - 80291d8: 4293 cmp r3, r2 - 80291da: d036 beq.n 802924a - 80291dc: 687b ldr r3, [r7, #4] - 80291de: 681b ldr r3, [r3, #0] - 80291e0: 4a57 ldr r2, [pc, #348] ; (8029340 ) - 80291e2: 4293 cmp r3, r2 - 80291e4: d031 beq.n 802924a - 80291e6: 687b ldr r3, [r7, #4] - 80291e8: 681b ldr r3, [r3, #0] - 80291ea: 4a56 ldr r2, [pc, #344] ; (8029344 ) - 80291ec: 4293 cmp r3, r2 - 80291ee: d02c beq.n 802924a - 80291f0: 687b ldr r3, [r7, #4] - 80291f2: 681b ldr r3, [r3, #0] - 80291f4: 4a54 ldr r2, [pc, #336] ; (8029348 ) - 80291f6: 4293 cmp r3, r2 - 80291f8: d027 beq.n 802924a - 80291fa: 687b ldr r3, [r7, #4] - 80291fc: 681b ldr r3, [r3, #0] - 80291fe: 4a53 ldr r2, [pc, #332] ; (802934c ) - 8029200: 4293 cmp r3, r2 - 8029202: d022 beq.n 802924a - 8029204: 687b ldr r3, [r7, #4] - 8029206: 681b ldr r3, [r3, #0] - 8029208: 4a51 ldr r2, [pc, #324] ; (8029350 ) - 802920a: 4293 cmp r3, r2 - 802920c: d01d beq.n 802924a - 802920e: 687b ldr r3, [r7, #4] - 8029210: 681b ldr r3, [r3, #0] - 8029212: 4a50 ldr r2, [pc, #320] ; (8029354 ) - 8029214: 4293 cmp r3, r2 - 8029216: d018 beq.n 802924a - 8029218: 687b ldr r3, [r7, #4] - 802921a: 681b ldr r3, [r3, #0] - 802921c: 4a4e ldr r2, [pc, #312] ; (8029358 ) - 802921e: 4293 cmp r3, r2 - 8029220: d013 beq.n 802924a - 8029222: 687b ldr r3, [r7, #4] - 8029224: 681b ldr r3, [r3, #0] - 8029226: 4a4d ldr r2, [pc, #308] ; (802935c ) - 8029228: 4293 cmp r3, r2 - 802922a: d00e beq.n 802924a - 802922c: 687b ldr r3, [r7, #4] - 802922e: 681b ldr r3, [r3, #0] - 8029230: 4a4b ldr r2, [pc, #300] ; (8029360 ) - 8029232: 4293 cmp r3, r2 - 8029234: d009 beq.n 802924a - 8029236: 687b ldr r3, [r7, #4] - 8029238: 681b ldr r3, [r3, #0] - 802923a: 4a4a ldr r2, [pc, #296] ; (8029364 ) - 802923c: 4293 cmp r3, r2 - 802923e: d004 beq.n 802924a - 8029240: 687b ldr r3, [r7, #4] - 8029242: 681b ldr r3, [r3, #0] - 8029244: 4a48 ldr r2, [pc, #288] ; (8029368 ) - 8029246: 4293 cmp r3, r2 - 8029248: d101 bne.n 802924e - 802924a: 2301 movs r3, #1 - 802924c: e000 b.n 8029250 - 802924e: 2300 movs r3, #0 - 8029250: 2b00 cmp r3, #0 - 8029252: f000 842b beq.w 8029aac + 802922e: 687b ldr r3, [r7, #4] + 8029230: 681b ldr r3, [r3, #0] + 8029232: 4a5f ldr r2, [pc, #380] ; (80293b0 ) + 8029234: 4293 cmp r3, r2 + 8029236: d04a beq.n 80292ce + 8029238: 687b ldr r3, [r7, #4] + 802923a: 681b ldr r3, [r3, #0] + 802923c: 4a5d ldr r2, [pc, #372] ; (80293b4 ) + 802923e: 4293 cmp r3, r2 + 8029240: d045 beq.n 80292ce + 8029242: 687b ldr r3, [r7, #4] + 8029244: 681b ldr r3, [r3, #0] + 8029246: 4a5c ldr r2, [pc, #368] ; (80293b8 ) + 8029248: 4293 cmp r3, r2 + 802924a: d040 beq.n 80292ce + 802924c: 687b ldr r3, [r7, #4] + 802924e: 681b ldr r3, [r3, #0] + 8029250: 4a5a ldr r2, [pc, #360] ; (80293bc ) + 8029252: 4293 cmp r3, r2 + 8029254: d03b beq.n 80292ce + 8029256: 687b ldr r3, [r7, #4] + 8029258: 681b ldr r3, [r3, #0] + 802925a: 4a59 ldr r2, [pc, #356] ; (80293c0 ) + 802925c: 4293 cmp r3, r2 + 802925e: d036 beq.n 80292ce + 8029260: 687b ldr r3, [r7, #4] + 8029262: 681b ldr r3, [r3, #0] + 8029264: 4a57 ldr r2, [pc, #348] ; (80293c4 ) + 8029266: 4293 cmp r3, r2 + 8029268: d031 beq.n 80292ce + 802926a: 687b ldr r3, [r7, #4] + 802926c: 681b ldr r3, [r3, #0] + 802926e: 4a56 ldr r2, [pc, #344] ; (80293c8 ) + 8029270: 4293 cmp r3, r2 + 8029272: d02c beq.n 80292ce + 8029274: 687b ldr r3, [r7, #4] + 8029276: 681b ldr r3, [r3, #0] + 8029278: 4a54 ldr r2, [pc, #336] ; (80293cc ) + 802927a: 4293 cmp r3, r2 + 802927c: d027 beq.n 80292ce + 802927e: 687b ldr r3, [r7, #4] + 8029280: 681b ldr r3, [r3, #0] + 8029282: 4a53 ldr r2, [pc, #332] ; (80293d0 ) + 8029284: 4293 cmp r3, r2 + 8029286: d022 beq.n 80292ce + 8029288: 687b ldr r3, [r7, #4] + 802928a: 681b ldr r3, [r3, #0] + 802928c: 4a51 ldr r2, [pc, #324] ; (80293d4 ) + 802928e: 4293 cmp r3, r2 + 8029290: d01d beq.n 80292ce + 8029292: 687b ldr r3, [r7, #4] + 8029294: 681b ldr r3, [r3, #0] + 8029296: 4a50 ldr r2, [pc, #320] ; (80293d8 ) + 8029298: 4293 cmp r3, r2 + 802929a: d018 beq.n 80292ce + 802929c: 687b ldr r3, [r7, #4] + 802929e: 681b ldr r3, [r3, #0] + 80292a0: 4a4e ldr r2, [pc, #312] ; (80293dc ) + 80292a2: 4293 cmp r3, r2 + 80292a4: d013 beq.n 80292ce + 80292a6: 687b ldr r3, [r7, #4] + 80292a8: 681b ldr r3, [r3, #0] + 80292aa: 4a4d ldr r2, [pc, #308] ; (80293e0 ) + 80292ac: 4293 cmp r3, r2 + 80292ae: d00e beq.n 80292ce + 80292b0: 687b ldr r3, [r7, #4] + 80292b2: 681b ldr r3, [r3, #0] + 80292b4: 4a4b ldr r2, [pc, #300] ; (80293e4 ) + 80292b6: 4293 cmp r3, r2 + 80292b8: d009 beq.n 80292ce + 80292ba: 687b ldr r3, [r7, #4] + 80292bc: 681b ldr r3, [r3, #0] + 80292be: 4a4a ldr r2, [pc, #296] ; (80293e8 ) + 80292c0: 4293 cmp r3, r2 + 80292c2: d004 beq.n 80292ce + 80292c4: 687b ldr r3, [r7, #4] + 80292c6: 681b ldr r3, [r3, #0] + 80292c8: 4a48 ldr r2, [pc, #288] ; (80293ec ) + 80292ca: 4293 cmp r3, r2 + 80292cc: d101 bne.n 80292d2 + 80292ce: 2301 movs r3, #1 + 80292d0: e000 b.n 80292d4 + 80292d2: 2300 movs r3, #0 + 80292d4: 2b00 cmp r3, #0 + 80292d6: f000 842b beq.w 8029b30 { /* Transfer Error Interrupt management ***************************************/ if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 8029256: 687b ldr r3, [r7, #4] - 8029258: 6ddb ldr r3, [r3, #92] ; 0x5c - 802925a: f003 031f and.w r3, r3, #31 - 802925e: 2208 movs r2, #8 - 8029260: 409a lsls r2, r3 - 8029262: 69bb ldr r3, [r7, #24] - 8029264: 4013 ands r3, r2 - 8029266: 2b00 cmp r3, #0 - 8029268: f000 80a2 beq.w 80293b0 + 80292da: 687b ldr r3, [r7, #4] + 80292dc: 6ddb ldr r3, [r3, #92] ; 0x5c + 80292de: f003 031f and.w r3, r3, #31 + 80292e2: 2208 movs r2, #8 + 80292e4: 409a lsls r2, r3 + 80292e6: 69bb ldr r3, [r7, #24] + 80292e8: 4013 ands r3, r2 + 80292ea: 2b00 cmp r3, #0 + 80292ec: f000 80a2 beq.w 8029434 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != 0U) - 802926c: 687b ldr r3, [r7, #4] - 802926e: 681b ldr r3, [r3, #0] - 8029270: 4a2e ldr r2, [pc, #184] ; (802932c ) - 8029272: 4293 cmp r3, r2 - 8029274: d04a beq.n 802930c - 8029276: 687b ldr r3, [r7, #4] - 8029278: 681b ldr r3, [r3, #0] - 802927a: 4a2d ldr r2, [pc, #180] ; (8029330 ) - 802927c: 4293 cmp r3, r2 - 802927e: d045 beq.n 802930c - 8029280: 687b ldr r3, [r7, #4] - 8029282: 681b ldr r3, [r3, #0] - 8029284: 4a2b ldr r2, [pc, #172] ; (8029334 ) - 8029286: 4293 cmp r3, r2 - 8029288: d040 beq.n 802930c - 802928a: 687b ldr r3, [r7, #4] - 802928c: 681b ldr r3, [r3, #0] - 802928e: 4a2a ldr r2, [pc, #168] ; (8029338 ) - 8029290: 4293 cmp r3, r2 - 8029292: d03b beq.n 802930c - 8029294: 687b ldr r3, [r7, #4] - 8029296: 681b ldr r3, [r3, #0] - 8029298: 4a28 ldr r2, [pc, #160] ; (802933c ) - 802929a: 4293 cmp r3, r2 - 802929c: d036 beq.n 802930c - 802929e: 687b ldr r3, [r7, #4] - 80292a0: 681b ldr r3, [r3, #0] - 80292a2: 4a27 ldr r2, [pc, #156] ; (8029340 ) - 80292a4: 4293 cmp r3, r2 - 80292a6: d031 beq.n 802930c - 80292a8: 687b ldr r3, [r7, #4] - 80292aa: 681b ldr r3, [r3, #0] - 80292ac: 4a25 ldr r2, [pc, #148] ; (8029344 ) - 80292ae: 4293 cmp r3, r2 - 80292b0: d02c beq.n 802930c - 80292b2: 687b ldr r3, [r7, #4] - 80292b4: 681b ldr r3, [r3, #0] - 80292b6: 4a24 ldr r2, [pc, #144] ; (8029348 ) - 80292b8: 4293 cmp r3, r2 - 80292ba: d027 beq.n 802930c - 80292bc: 687b ldr r3, [r7, #4] - 80292be: 681b ldr r3, [r3, #0] - 80292c0: 4a22 ldr r2, [pc, #136] ; (802934c ) - 80292c2: 4293 cmp r3, r2 - 80292c4: d022 beq.n 802930c - 80292c6: 687b ldr r3, [r7, #4] - 80292c8: 681b ldr r3, [r3, #0] - 80292ca: 4a21 ldr r2, [pc, #132] ; (8029350 ) - 80292cc: 4293 cmp r3, r2 - 80292ce: d01d beq.n 802930c - 80292d0: 687b ldr r3, [r7, #4] - 80292d2: 681b ldr r3, [r3, #0] - 80292d4: 4a1f ldr r2, [pc, #124] ; (8029354 ) - 80292d6: 4293 cmp r3, r2 - 80292d8: d018 beq.n 802930c - 80292da: 687b ldr r3, [r7, #4] - 80292dc: 681b ldr r3, [r3, #0] - 80292de: 4a1e ldr r2, [pc, #120] ; (8029358 ) - 80292e0: 4293 cmp r3, r2 - 80292e2: d013 beq.n 802930c - 80292e4: 687b ldr r3, [r7, #4] - 80292e6: 681b ldr r3, [r3, #0] - 80292e8: 4a1c ldr r2, [pc, #112] ; (802935c ) - 80292ea: 4293 cmp r3, r2 - 80292ec: d00e beq.n 802930c - 80292ee: 687b ldr r3, [r7, #4] - 80292f0: 681b ldr r3, [r3, #0] - 80292f2: 4a1b ldr r2, [pc, #108] ; (8029360 ) - 80292f4: 4293 cmp r3, r2 - 80292f6: d009 beq.n 802930c - 80292f8: 687b ldr r3, [r7, #4] - 80292fa: 681b ldr r3, [r3, #0] - 80292fc: 4a19 ldr r2, [pc, #100] ; (8029364 ) - 80292fe: 4293 cmp r3, r2 - 8029300: d004 beq.n 802930c - 8029302: 687b ldr r3, [r7, #4] - 8029304: 681b ldr r3, [r3, #0] - 8029306: 4a18 ldr r2, [pc, #96] ; (8029368 ) - 8029308: 4293 cmp r3, r2 - 802930a: d12f bne.n 802936c - 802930c: 687b ldr r3, [r7, #4] - 802930e: 681b ldr r3, [r3, #0] + 80292f0: 687b ldr r3, [r7, #4] + 80292f2: 681b ldr r3, [r3, #0] + 80292f4: 4a2e ldr r2, [pc, #184] ; (80293b0 ) + 80292f6: 4293 cmp r3, r2 + 80292f8: d04a beq.n 8029390 + 80292fa: 687b ldr r3, [r7, #4] + 80292fc: 681b ldr r3, [r3, #0] + 80292fe: 4a2d ldr r2, [pc, #180] ; (80293b4 ) + 8029300: 4293 cmp r3, r2 + 8029302: d045 beq.n 8029390 + 8029304: 687b ldr r3, [r7, #4] + 8029306: 681b ldr r3, [r3, #0] + 8029308: 4a2b ldr r2, [pc, #172] ; (80293b8 ) + 802930a: 4293 cmp r3, r2 + 802930c: d040 beq.n 8029390 + 802930e: 687b ldr r3, [r7, #4] 8029310: 681b ldr r3, [r3, #0] - 8029312: f003 0304 and.w r3, r3, #4 - 8029316: 2b00 cmp r3, #0 - 8029318: bf14 ite ne - 802931a: 2301 movne r3, #1 - 802931c: 2300 moveq r3, #0 - 802931e: b2db uxtb r3, r3 - 8029320: e02e b.n 8029380 - 8029322: bf00 nop - 8029324: 24000048 .word 0x24000048 - 8029328: 1b4e81b5 .word 0x1b4e81b5 - 802932c: 40020010 .word 0x40020010 - 8029330: 40020028 .word 0x40020028 - 8029334: 40020040 .word 0x40020040 - 8029338: 40020058 .word 0x40020058 - 802933c: 40020070 .word 0x40020070 - 8029340: 40020088 .word 0x40020088 - 8029344: 400200a0 .word 0x400200a0 - 8029348: 400200b8 .word 0x400200b8 - 802934c: 40020410 .word 0x40020410 - 8029350: 40020428 .word 0x40020428 - 8029354: 40020440 .word 0x40020440 - 8029358: 40020458 .word 0x40020458 - 802935c: 40020470 .word 0x40020470 - 8029360: 40020488 .word 0x40020488 - 8029364: 400204a0 .word 0x400204a0 - 8029368: 400204b8 .word 0x400204b8 - 802936c: 687b ldr r3, [r7, #4] - 802936e: 681b ldr r3, [r3, #0] - 8029370: 681b ldr r3, [r3, #0] - 8029372: f003 0308 and.w r3, r3, #8 - 8029376: 2b00 cmp r3, #0 - 8029378: bf14 ite ne - 802937a: 2301 movne r3, #1 - 802937c: 2300 moveq r3, #0 - 802937e: b2db uxtb r3, r3 - 8029380: 2b00 cmp r3, #0 - 8029382: d015 beq.n 80293b0 + 8029312: 4a2a ldr r2, [pc, #168] ; (80293bc ) + 8029314: 4293 cmp r3, r2 + 8029316: d03b beq.n 8029390 + 8029318: 687b ldr r3, [r7, #4] + 802931a: 681b ldr r3, [r3, #0] + 802931c: 4a28 ldr r2, [pc, #160] ; (80293c0 ) + 802931e: 4293 cmp r3, r2 + 8029320: d036 beq.n 8029390 + 8029322: 687b ldr r3, [r7, #4] + 8029324: 681b ldr r3, [r3, #0] + 8029326: 4a27 ldr r2, [pc, #156] ; (80293c4 ) + 8029328: 4293 cmp r3, r2 + 802932a: d031 beq.n 8029390 + 802932c: 687b ldr r3, [r7, #4] + 802932e: 681b ldr r3, [r3, #0] + 8029330: 4a25 ldr r2, [pc, #148] ; (80293c8 ) + 8029332: 4293 cmp r3, r2 + 8029334: d02c beq.n 8029390 + 8029336: 687b ldr r3, [r7, #4] + 8029338: 681b ldr r3, [r3, #0] + 802933a: 4a24 ldr r2, [pc, #144] ; (80293cc ) + 802933c: 4293 cmp r3, r2 + 802933e: d027 beq.n 8029390 + 8029340: 687b ldr r3, [r7, #4] + 8029342: 681b ldr r3, [r3, #0] + 8029344: 4a22 ldr r2, [pc, #136] ; (80293d0 ) + 8029346: 4293 cmp r3, r2 + 8029348: d022 beq.n 8029390 + 802934a: 687b ldr r3, [r7, #4] + 802934c: 681b ldr r3, [r3, #0] + 802934e: 4a21 ldr r2, [pc, #132] ; (80293d4 ) + 8029350: 4293 cmp r3, r2 + 8029352: d01d beq.n 8029390 + 8029354: 687b ldr r3, [r7, #4] + 8029356: 681b ldr r3, [r3, #0] + 8029358: 4a1f ldr r2, [pc, #124] ; (80293d8 ) + 802935a: 4293 cmp r3, r2 + 802935c: d018 beq.n 8029390 + 802935e: 687b ldr r3, [r7, #4] + 8029360: 681b ldr r3, [r3, #0] + 8029362: 4a1e ldr r2, [pc, #120] ; (80293dc ) + 8029364: 4293 cmp r3, r2 + 8029366: d013 beq.n 8029390 + 8029368: 687b ldr r3, [r7, #4] + 802936a: 681b ldr r3, [r3, #0] + 802936c: 4a1c ldr r2, [pc, #112] ; (80293e0 ) + 802936e: 4293 cmp r3, r2 + 8029370: d00e beq.n 8029390 + 8029372: 687b ldr r3, [r7, #4] + 8029374: 681b ldr r3, [r3, #0] + 8029376: 4a1b ldr r2, [pc, #108] ; (80293e4 ) + 8029378: 4293 cmp r3, r2 + 802937a: d009 beq.n 8029390 + 802937c: 687b ldr r3, [r7, #4] + 802937e: 681b ldr r3, [r3, #0] + 8029380: 4a19 ldr r2, [pc, #100] ; (80293e8 ) + 8029382: 4293 cmp r3, r2 + 8029384: d004 beq.n 8029390 + 8029386: 687b ldr r3, [r7, #4] + 8029388: 681b ldr r3, [r3, #0] + 802938a: 4a18 ldr r2, [pc, #96] ; (80293ec ) + 802938c: 4293 cmp r3, r2 + 802938e: d12f bne.n 80293f0 + 8029390: 687b ldr r3, [r7, #4] + 8029392: 681b ldr r3, [r3, #0] + 8029394: 681b ldr r3, [r3, #0] + 8029396: f003 0304 and.w r3, r3, #4 + 802939a: 2b00 cmp r3, #0 + 802939c: bf14 ite ne + 802939e: 2301 movne r3, #1 + 80293a0: 2300 moveq r3, #0 + 80293a2: b2db uxtb r3, r3 + 80293a4: e02e b.n 8029404 + 80293a6: bf00 nop + 80293a8: 24000048 .word 0x24000048 + 80293ac: 1b4e81b5 .word 0x1b4e81b5 + 80293b0: 40020010 .word 0x40020010 + 80293b4: 40020028 .word 0x40020028 + 80293b8: 40020040 .word 0x40020040 + 80293bc: 40020058 .word 0x40020058 + 80293c0: 40020070 .word 0x40020070 + 80293c4: 40020088 .word 0x40020088 + 80293c8: 400200a0 .word 0x400200a0 + 80293cc: 400200b8 .word 0x400200b8 + 80293d0: 40020410 .word 0x40020410 + 80293d4: 40020428 .word 0x40020428 + 80293d8: 40020440 .word 0x40020440 + 80293dc: 40020458 .word 0x40020458 + 80293e0: 40020470 .word 0x40020470 + 80293e4: 40020488 .word 0x40020488 + 80293e8: 400204a0 .word 0x400204a0 + 80293ec: 400204b8 .word 0x400204b8 + 80293f0: 687b ldr r3, [r7, #4] + 80293f2: 681b ldr r3, [r3, #0] + 80293f4: 681b ldr r3, [r3, #0] + 80293f6: f003 0308 and.w r3, r3, #8 + 80293fa: 2b00 cmp r3, #0 + 80293fc: bf14 ite ne + 80293fe: 2301 movne r3, #1 + 8029400: 2300 moveq r3, #0 + 8029402: b2db uxtb r3, r3 + 8029404: 2b00 cmp r3, #0 + 8029406: d015 beq.n 8029434 { /* Disable the transfer error interrupt */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TE); - 8029384: 687b ldr r3, [r7, #4] - 8029386: 681b ldr r3, [r3, #0] - 8029388: 681a ldr r2, [r3, #0] - 802938a: 687b ldr r3, [r7, #4] - 802938c: 681b ldr r3, [r3, #0] - 802938e: f022 0204 bic.w r2, r2, #4 - 8029392: 601a str r2, [r3, #0] + 8029408: 687b ldr r3, [r7, #4] + 802940a: 681b ldr r3, [r3, #0] + 802940c: 681a ldr r2, [r3, #0] + 802940e: 687b ldr r3, [r7, #4] + 8029410: 681b ldr r3, [r3, #0] + 8029412: f022 0204 bic.w r2, r2, #4 + 8029416: 601a str r2, [r3, #0] /* Clear the transfer error flag */ regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU); - 8029394: 687b ldr r3, [r7, #4] - 8029396: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029398: f003 031f and.w r3, r3, #31 - 802939c: 2208 movs r2, #8 - 802939e: 409a lsls r2, r3 - 80293a0: 6a3b ldr r3, [r7, #32] - 80293a2: 609a str r2, [r3, #8] + 8029418: 687b ldr r3, [r7, #4] + 802941a: 6ddb ldr r3, [r3, #92] ; 0x5c + 802941c: f003 031f and.w r3, r3, #31 + 8029420: 2208 movs r2, #8 + 8029422: 409a lsls r2, r3 + 8029424: 6a3b ldr r3, [r7, #32] + 8029426: 609a str r2, [r3, #8] /* Update error code */ hdma->ErrorCode |= HAL_DMA_ERROR_TE; - 80293a4: 687b ldr r3, [r7, #4] - 80293a6: 6d5b ldr r3, [r3, #84] ; 0x54 - 80293a8: f043 0201 orr.w r2, r3, #1 - 80293ac: 687b ldr r3, [r7, #4] - 80293ae: 655a str r2, [r3, #84] ; 0x54 + 8029428: 687b ldr r3, [r7, #4] + 802942a: 6d5b ldr r3, [r3, #84] ; 0x54 + 802942c: f043 0201 orr.w r2, r3, #1 + 8029430: 687b ldr r3, [r7, #4] + 8029432: 655a str r2, [r3, #84] ; 0x54 } } /* FIFO Error Interrupt management ******************************************/ if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 80293b0: 687b ldr r3, [r7, #4] - 80293b2: 6ddb ldr r3, [r3, #92] ; 0x5c - 80293b4: f003 031f and.w r3, r3, #31 - 80293b8: 69ba ldr r2, [r7, #24] - 80293ba: fa22 f303 lsr.w r3, r2, r3 - 80293be: f003 0301 and.w r3, r3, #1 - 80293c2: 2b00 cmp r3, #0 - 80293c4: d06e beq.n 80294a4 + 8029434: 687b ldr r3, [r7, #4] + 8029436: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029438: f003 031f and.w r3, r3, #31 + 802943c: 69ba ldr r2, [r7, #24] + 802943e: fa22 f303 lsr.w r3, r2, r3 + 8029442: f003 0301 and.w r3, r3, #1 + 8029446: 2b00 cmp r3, #0 + 8029448: d06e beq.n 8029528 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != 0U) - 80293c6: 687b ldr r3, [r7, #4] - 80293c8: 681b ldr r3, [r3, #0] - 80293ca: 4a69 ldr r2, [pc, #420] ; (8029570 ) - 80293cc: 4293 cmp r3, r2 - 80293ce: d04a beq.n 8029466 - 80293d0: 687b ldr r3, [r7, #4] - 80293d2: 681b ldr r3, [r3, #0] - 80293d4: 4a67 ldr r2, [pc, #412] ; (8029574 ) - 80293d6: 4293 cmp r3, r2 - 80293d8: d045 beq.n 8029466 - 80293da: 687b ldr r3, [r7, #4] - 80293dc: 681b ldr r3, [r3, #0] - 80293de: 4a66 ldr r2, [pc, #408] ; (8029578 ) - 80293e0: 4293 cmp r3, r2 - 80293e2: d040 beq.n 8029466 - 80293e4: 687b ldr r3, [r7, #4] - 80293e6: 681b ldr r3, [r3, #0] - 80293e8: 4a64 ldr r2, [pc, #400] ; (802957c ) - 80293ea: 4293 cmp r3, r2 - 80293ec: d03b beq.n 8029466 - 80293ee: 687b ldr r3, [r7, #4] - 80293f0: 681b ldr r3, [r3, #0] - 80293f2: 4a63 ldr r2, [pc, #396] ; (8029580 ) - 80293f4: 4293 cmp r3, r2 - 80293f6: d036 beq.n 8029466 - 80293f8: 687b ldr r3, [r7, #4] - 80293fa: 681b ldr r3, [r3, #0] - 80293fc: 4a61 ldr r2, [pc, #388] ; (8029584 ) - 80293fe: 4293 cmp r3, r2 - 8029400: d031 beq.n 8029466 - 8029402: 687b ldr r3, [r7, #4] - 8029404: 681b ldr r3, [r3, #0] - 8029406: 4a60 ldr r2, [pc, #384] ; (8029588 ) - 8029408: 4293 cmp r3, r2 - 802940a: d02c beq.n 8029466 - 802940c: 687b ldr r3, [r7, #4] - 802940e: 681b ldr r3, [r3, #0] - 8029410: 4a5e ldr r2, [pc, #376] ; (802958c ) - 8029412: 4293 cmp r3, r2 - 8029414: d027 beq.n 8029466 - 8029416: 687b ldr r3, [r7, #4] - 8029418: 681b ldr r3, [r3, #0] - 802941a: 4a5d ldr r2, [pc, #372] ; (8029590 ) - 802941c: 4293 cmp r3, r2 - 802941e: d022 beq.n 8029466 - 8029420: 687b ldr r3, [r7, #4] - 8029422: 681b ldr r3, [r3, #0] - 8029424: 4a5b ldr r2, [pc, #364] ; (8029594 ) - 8029426: 4293 cmp r3, r2 - 8029428: d01d beq.n 8029466 - 802942a: 687b ldr r3, [r7, #4] - 802942c: 681b ldr r3, [r3, #0] - 802942e: 4a5a ldr r2, [pc, #360] ; (8029598 ) - 8029430: 4293 cmp r3, r2 - 8029432: d018 beq.n 8029466 - 8029434: 687b ldr r3, [r7, #4] - 8029436: 681b ldr r3, [r3, #0] - 8029438: 4a58 ldr r2, [pc, #352] ; (802959c ) - 802943a: 4293 cmp r3, r2 - 802943c: d013 beq.n 8029466 - 802943e: 687b ldr r3, [r7, #4] - 8029440: 681b ldr r3, [r3, #0] - 8029442: 4a57 ldr r2, [pc, #348] ; (80295a0 ) - 8029444: 4293 cmp r3, r2 - 8029446: d00e beq.n 8029466 - 8029448: 687b ldr r3, [r7, #4] - 802944a: 681b ldr r3, [r3, #0] - 802944c: 4a55 ldr r2, [pc, #340] ; (80295a4 ) - 802944e: 4293 cmp r3, r2 - 8029450: d009 beq.n 8029466 - 8029452: 687b ldr r3, [r7, #4] - 8029454: 681b ldr r3, [r3, #0] - 8029456: 4a54 ldr r2, [pc, #336] ; (80295a8 ) - 8029458: 4293 cmp r3, r2 - 802945a: d004 beq.n 8029466 - 802945c: 687b ldr r3, [r7, #4] - 802945e: 681b ldr r3, [r3, #0] - 8029460: 4a52 ldr r2, [pc, #328] ; (80295ac ) - 8029462: 4293 cmp r3, r2 - 8029464: d10a bne.n 802947c - 8029466: 687b ldr r3, [r7, #4] - 8029468: 681b ldr r3, [r3, #0] - 802946a: 695b ldr r3, [r3, #20] - 802946c: f003 0380 and.w r3, r3, #128 ; 0x80 - 8029470: 2b00 cmp r3, #0 - 8029472: bf14 ite ne - 8029474: 2301 movne r3, #1 - 8029476: 2300 moveq r3, #0 - 8029478: b2db uxtb r3, r3 - 802947a: e003 b.n 8029484 + 802944a: 687b ldr r3, [r7, #4] + 802944c: 681b ldr r3, [r3, #0] + 802944e: 4a69 ldr r2, [pc, #420] ; (80295f4 ) + 8029450: 4293 cmp r3, r2 + 8029452: d04a beq.n 80294ea + 8029454: 687b ldr r3, [r7, #4] + 8029456: 681b ldr r3, [r3, #0] + 8029458: 4a67 ldr r2, [pc, #412] ; (80295f8 ) + 802945a: 4293 cmp r3, r2 + 802945c: d045 beq.n 80294ea + 802945e: 687b ldr r3, [r7, #4] + 8029460: 681b ldr r3, [r3, #0] + 8029462: 4a66 ldr r2, [pc, #408] ; (80295fc ) + 8029464: 4293 cmp r3, r2 + 8029466: d040 beq.n 80294ea + 8029468: 687b ldr r3, [r7, #4] + 802946a: 681b ldr r3, [r3, #0] + 802946c: 4a64 ldr r2, [pc, #400] ; (8029600 ) + 802946e: 4293 cmp r3, r2 + 8029470: d03b beq.n 80294ea + 8029472: 687b ldr r3, [r7, #4] + 8029474: 681b ldr r3, [r3, #0] + 8029476: 4a63 ldr r2, [pc, #396] ; (8029604 ) + 8029478: 4293 cmp r3, r2 + 802947a: d036 beq.n 80294ea 802947c: 687b ldr r3, [r7, #4] 802947e: 681b ldr r3, [r3, #0] - 8029480: 681b ldr r3, [r3, #0] - 8029482: 2300 movs r3, #0 - 8029484: 2b00 cmp r3, #0 - 8029486: d00d beq.n 80294a4 + 8029480: 4a61 ldr r2, [pc, #388] ; (8029608 ) + 8029482: 4293 cmp r3, r2 + 8029484: d031 beq.n 80294ea + 8029486: 687b ldr r3, [r7, #4] + 8029488: 681b ldr r3, [r3, #0] + 802948a: 4a60 ldr r2, [pc, #384] ; (802960c ) + 802948c: 4293 cmp r3, r2 + 802948e: d02c beq.n 80294ea + 8029490: 687b ldr r3, [r7, #4] + 8029492: 681b ldr r3, [r3, #0] + 8029494: 4a5e ldr r2, [pc, #376] ; (8029610 ) + 8029496: 4293 cmp r3, r2 + 8029498: d027 beq.n 80294ea + 802949a: 687b ldr r3, [r7, #4] + 802949c: 681b ldr r3, [r3, #0] + 802949e: 4a5d ldr r2, [pc, #372] ; (8029614 ) + 80294a0: 4293 cmp r3, r2 + 80294a2: d022 beq.n 80294ea + 80294a4: 687b ldr r3, [r7, #4] + 80294a6: 681b ldr r3, [r3, #0] + 80294a8: 4a5b ldr r2, [pc, #364] ; (8029618 ) + 80294aa: 4293 cmp r3, r2 + 80294ac: d01d beq.n 80294ea + 80294ae: 687b ldr r3, [r7, #4] + 80294b0: 681b ldr r3, [r3, #0] + 80294b2: 4a5a ldr r2, [pc, #360] ; (802961c ) + 80294b4: 4293 cmp r3, r2 + 80294b6: d018 beq.n 80294ea + 80294b8: 687b ldr r3, [r7, #4] + 80294ba: 681b ldr r3, [r3, #0] + 80294bc: 4a58 ldr r2, [pc, #352] ; (8029620 ) + 80294be: 4293 cmp r3, r2 + 80294c0: d013 beq.n 80294ea + 80294c2: 687b ldr r3, [r7, #4] + 80294c4: 681b ldr r3, [r3, #0] + 80294c6: 4a57 ldr r2, [pc, #348] ; (8029624 ) + 80294c8: 4293 cmp r3, r2 + 80294ca: d00e beq.n 80294ea + 80294cc: 687b ldr r3, [r7, #4] + 80294ce: 681b ldr r3, [r3, #0] + 80294d0: 4a55 ldr r2, [pc, #340] ; (8029628 ) + 80294d2: 4293 cmp r3, r2 + 80294d4: d009 beq.n 80294ea + 80294d6: 687b ldr r3, [r7, #4] + 80294d8: 681b ldr r3, [r3, #0] + 80294da: 4a54 ldr r2, [pc, #336] ; (802962c ) + 80294dc: 4293 cmp r3, r2 + 80294de: d004 beq.n 80294ea + 80294e0: 687b ldr r3, [r7, #4] + 80294e2: 681b ldr r3, [r3, #0] + 80294e4: 4a52 ldr r2, [pc, #328] ; (8029630 ) + 80294e6: 4293 cmp r3, r2 + 80294e8: d10a bne.n 8029500 + 80294ea: 687b ldr r3, [r7, #4] + 80294ec: 681b ldr r3, [r3, #0] + 80294ee: 695b ldr r3, [r3, #20] + 80294f0: f003 0380 and.w r3, r3, #128 ; 0x80 + 80294f4: 2b00 cmp r3, #0 + 80294f6: bf14 ite ne + 80294f8: 2301 movne r3, #1 + 80294fa: 2300 moveq r3, #0 + 80294fc: b2db uxtb r3, r3 + 80294fe: e003 b.n 8029508 + 8029500: 687b ldr r3, [r7, #4] + 8029502: 681b ldr r3, [r3, #0] + 8029504: 681b ldr r3, [r3, #0] + 8029506: 2300 movs r3, #0 + 8029508: 2b00 cmp r3, #0 + 802950a: d00d beq.n 8029528 { /* Clear the FIFO error flag */ regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU); - 8029488: 687b ldr r3, [r7, #4] - 802948a: 6ddb ldr r3, [r3, #92] ; 0x5c - 802948c: f003 031f and.w r3, r3, #31 - 8029490: 2201 movs r2, #1 - 8029492: 409a lsls r2, r3 - 8029494: 6a3b ldr r3, [r7, #32] - 8029496: 609a str r2, [r3, #8] + 802950c: 687b ldr r3, [r7, #4] + 802950e: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029510: f003 031f and.w r3, r3, #31 + 8029514: 2201 movs r2, #1 + 8029516: 409a lsls r2, r3 + 8029518: 6a3b ldr r3, [r7, #32] + 802951a: 609a str r2, [r3, #8] /* Update error code */ hdma->ErrorCode |= HAL_DMA_ERROR_FE; - 8029498: 687b ldr r3, [r7, #4] - 802949a: 6d5b ldr r3, [r3, #84] ; 0x54 - 802949c: f043 0202 orr.w r2, r3, #2 - 80294a0: 687b ldr r3, [r7, #4] - 80294a2: 655a str r2, [r3, #84] ; 0x54 + 802951c: 687b ldr r3, [r7, #4] + 802951e: 6d5b ldr r3, [r3, #84] ; 0x54 + 8029520: f043 0202 orr.w r2, r3, #2 + 8029524: 687b ldr r3, [r7, #4] + 8029526: 655a str r2, [r3, #84] ; 0x54 } } /* Direct Mode Error Interrupt management ***********************************/ if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 80294a4: 687b ldr r3, [r7, #4] - 80294a6: 6ddb ldr r3, [r3, #92] ; 0x5c - 80294a8: f003 031f and.w r3, r3, #31 - 80294ac: 2204 movs r2, #4 - 80294ae: 409a lsls r2, r3 - 80294b0: 69bb ldr r3, [r7, #24] - 80294b2: 4013 ands r3, r2 - 80294b4: 2b00 cmp r3, #0 - 80294b6: f000 808f beq.w 80295d8 + 8029528: 687b ldr r3, [r7, #4] + 802952a: 6ddb ldr r3, [r3, #92] ; 0x5c + 802952c: f003 031f and.w r3, r3, #31 + 8029530: 2204 movs r2, #4 + 8029532: 409a lsls r2, r3 + 8029534: 69bb ldr r3, [r7, #24] + 8029536: 4013 ands r3, r2 + 8029538: 2b00 cmp r3, #0 + 802953a: f000 808f beq.w 802965c { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != 0U) - 80294ba: 687b ldr r3, [r7, #4] - 80294bc: 681b ldr r3, [r3, #0] - 80294be: 4a2c ldr r2, [pc, #176] ; (8029570 ) - 80294c0: 4293 cmp r3, r2 - 80294c2: d04a beq.n 802955a - 80294c4: 687b ldr r3, [r7, #4] - 80294c6: 681b ldr r3, [r3, #0] - 80294c8: 4a2a ldr r2, [pc, #168] ; (8029574 ) - 80294ca: 4293 cmp r3, r2 - 80294cc: d045 beq.n 802955a - 80294ce: 687b ldr r3, [r7, #4] - 80294d0: 681b ldr r3, [r3, #0] - 80294d2: 4a29 ldr r2, [pc, #164] ; (8029578 ) - 80294d4: 4293 cmp r3, r2 - 80294d6: d040 beq.n 802955a - 80294d8: 687b ldr r3, [r7, #4] - 80294da: 681b ldr r3, [r3, #0] - 80294dc: 4a27 ldr r2, [pc, #156] ; (802957c ) - 80294de: 4293 cmp r3, r2 - 80294e0: d03b beq.n 802955a - 80294e2: 687b ldr r3, [r7, #4] - 80294e4: 681b ldr r3, [r3, #0] - 80294e6: 4a26 ldr r2, [pc, #152] ; (8029580 ) - 80294e8: 4293 cmp r3, r2 - 80294ea: d036 beq.n 802955a - 80294ec: 687b ldr r3, [r7, #4] - 80294ee: 681b ldr r3, [r3, #0] - 80294f0: 4a24 ldr r2, [pc, #144] ; (8029584 ) - 80294f2: 4293 cmp r3, r2 - 80294f4: d031 beq.n 802955a - 80294f6: 687b ldr r3, [r7, #4] - 80294f8: 681b ldr r3, [r3, #0] - 80294fa: 4a23 ldr r2, [pc, #140] ; (8029588 ) - 80294fc: 4293 cmp r3, r2 - 80294fe: d02c beq.n 802955a - 8029500: 687b ldr r3, [r7, #4] - 8029502: 681b ldr r3, [r3, #0] - 8029504: 4a21 ldr r2, [pc, #132] ; (802958c ) - 8029506: 4293 cmp r3, r2 - 8029508: d027 beq.n 802955a - 802950a: 687b ldr r3, [r7, #4] - 802950c: 681b ldr r3, [r3, #0] - 802950e: 4a20 ldr r2, [pc, #128] ; (8029590 ) - 8029510: 4293 cmp r3, r2 - 8029512: d022 beq.n 802955a - 8029514: 687b ldr r3, [r7, #4] - 8029516: 681b ldr r3, [r3, #0] - 8029518: 4a1e ldr r2, [pc, #120] ; (8029594 ) - 802951a: 4293 cmp r3, r2 - 802951c: d01d beq.n 802955a - 802951e: 687b ldr r3, [r7, #4] - 8029520: 681b ldr r3, [r3, #0] - 8029522: 4a1d ldr r2, [pc, #116] ; (8029598 ) - 8029524: 4293 cmp r3, r2 - 8029526: d018 beq.n 802955a - 8029528: 687b ldr r3, [r7, #4] - 802952a: 681b ldr r3, [r3, #0] - 802952c: 4a1b ldr r2, [pc, #108] ; (802959c ) - 802952e: 4293 cmp r3, r2 - 8029530: d013 beq.n 802955a - 8029532: 687b ldr r3, [r7, #4] - 8029534: 681b ldr r3, [r3, #0] - 8029536: 4a1a ldr r2, [pc, #104] ; (80295a0 ) - 8029538: 4293 cmp r3, r2 - 802953a: d00e beq.n 802955a - 802953c: 687b ldr r3, [r7, #4] - 802953e: 681b ldr r3, [r3, #0] - 8029540: 4a18 ldr r2, [pc, #96] ; (80295a4 ) - 8029542: 4293 cmp r3, r2 - 8029544: d009 beq.n 802955a - 8029546: 687b ldr r3, [r7, #4] - 8029548: 681b ldr r3, [r3, #0] - 802954a: 4a17 ldr r2, [pc, #92] ; (80295a8 ) - 802954c: 4293 cmp r3, r2 - 802954e: d004 beq.n 802955a - 8029550: 687b ldr r3, [r7, #4] - 8029552: 681b ldr r3, [r3, #0] - 8029554: 4a15 ldr r2, [pc, #84] ; (80295ac ) - 8029556: 4293 cmp r3, r2 - 8029558: d12a bne.n 80295b0 - 802955a: 687b ldr r3, [r7, #4] - 802955c: 681b ldr r3, [r3, #0] + 802953e: 687b ldr r3, [r7, #4] + 8029540: 681b ldr r3, [r3, #0] + 8029542: 4a2c ldr r2, [pc, #176] ; (80295f4 ) + 8029544: 4293 cmp r3, r2 + 8029546: d04a beq.n 80295de + 8029548: 687b ldr r3, [r7, #4] + 802954a: 681b ldr r3, [r3, #0] + 802954c: 4a2a ldr r2, [pc, #168] ; (80295f8 ) + 802954e: 4293 cmp r3, r2 + 8029550: d045 beq.n 80295de + 8029552: 687b ldr r3, [r7, #4] + 8029554: 681b ldr r3, [r3, #0] + 8029556: 4a29 ldr r2, [pc, #164] ; (80295fc ) + 8029558: 4293 cmp r3, r2 + 802955a: d040 beq.n 80295de + 802955c: 687b ldr r3, [r7, #4] 802955e: 681b ldr r3, [r3, #0] - 8029560: f003 0302 and.w r3, r3, #2 - 8029564: 2b00 cmp r3, #0 - 8029566: bf14 ite ne - 8029568: 2301 movne r3, #1 - 802956a: 2300 moveq r3, #0 - 802956c: b2db uxtb r3, r3 - 802956e: e023 b.n 80295b8 - 8029570: 40020010 .word 0x40020010 - 8029574: 40020028 .word 0x40020028 - 8029578: 40020040 .word 0x40020040 - 802957c: 40020058 .word 0x40020058 - 8029580: 40020070 .word 0x40020070 - 8029584: 40020088 .word 0x40020088 - 8029588: 400200a0 .word 0x400200a0 - 802958c: 400200b8 .word 0x400200b8 - 8029590: 40020410 .word 0x40020410 - 8029594: 40020428 .word 0x40020428 - 8029598: 40020440 .word 0x40020440 - 802959c: 40020458 .word 0x40020458 - 80295a0: 40020470 .word 0x40020470 - 80295a4: 40020488 .word 0x40020488 - 80295a8: 400204a0 .word 0x400204a0 - 80295ac: 400204b8 .word 0x400204b8 - 80295b0: 687b ldr r3, [r7, #4] - 80295b2: 681b ldr r3, [r3, #0] - 80295b4: 681b ldr r3, [r3, #0] - 80295b6: 2300 movs r3, #0 - 80295b8: 2b00 cmp r3, #0 - 80295ba: d00d beq.n 80295d8 + 8029560: 4a27 ldr r2, [pc, #156] ; (8029600 ) + 8029562: 4293 cmp r3, r2 + 8029564: d03b beq.n 80295de + 8029566: 687b ldr r3, [r7, #4] + 8029568: 681b ldr r3, [r3, #0] + 802956a: 4a26 ldr r2, [pc, #152] ; (8029604 ) + 802956c: 4293 cmp r3, r2 + 802956e: d036 beq.n 80295de + 8029570: 687b ldr r3, [r7, #4] + 8029572: 681b ldr r3, [r3, #0] + 8029574: 4a24 ldr r2, [pc, #144] ; (8029608 ) + 8029576: 4293 cmp r3, r2 + 8029578: d031 beq.n 80295de + 802957a: 687b ldr r3, [r7, #4] + 802957c: 681b ldr r3, [r3, #0] + 802957e: 4a23 ldr r2, [pc, #140] ; (802960c ) + 8029580: 4293 cmp r3, r2 + 8029582: d02c beq.n 80295de + 8029584: 687b ldr r3, [r7, #4] + 8029586: 681b ldr r3, [r3, #0] + 8029588: 4a21 ldr r2, [pc, #132] ; (8029610 ) + 802958a: 4293 cmp r3, r2 + 802958c: d027 beq.n 80295de + 802958e: 687b ldr r3, [r7, #4] + 8029590: 681b ldr r3, [r3, #0] + 8029592: 4a20 ldr r2, [pc, #128] ; (8029614 ) + 8029594: 4293 cmp r3, r2 + 8029596: d022 beq.n 80295de + 8029598: 687b ldr r3, [r7, #4] + 802959a: 681b ldr r3, [r3, #0] + 802959c: 4a1e ldr r2, [pc, #120] ; (8029618 ) + 802959e: 4293 cmp r3, r2 + 80295a0: d01d beq.n 80295de + 80295a2: 687b ldr r3, [r7, #4] + 80295a4: 681b ldr r3, [r3, #0] + 80295a6: 4a1d ldr r2, [pc, #116] ; (802961c ) + 80295a8: 4293 cmp r3, r2 + 80295aa: d018 beq.n 80295de + 80295ac: 687b ldr r3, [r7, #4] + 80295ae: 681b ldr r3, [r3, #0] + 80295b0: 4a1b ldr r2, [pc, #108] ; (8029620 ) + 80295b2: 4293 cmp r3, r2 + 80295b4: d013 beq.n 80295de + 80295b6: 687b ldr r3, [r7, #4] + 80295b8: 681b ldr r3, [r3, #0] + 80295ba: 4a1a ldr r2, [pc, #104] ; (8029624 ) + 80295bc: 4293 cmp r3, r2 + 80295be: d00e beq.n 80295de + 80295c0: 687b ldr r3, [r7, #4] + 80295c2: 681b ldr r3, [r3, #0] + 80295c4: 4a18 ldr r2, [pc, #96] ; (8029628 ) + 80295c6: 4293 cmp r3, r2 + 80295c8: d009 beq.n 80295de + 80295ca: 687b ldr r3, [r7, #4] + 80295cc: 681b ldr r3, [r3, #0] + 80295ce: 4a17 ldr r2, [pc, #92] ; (802962c ) + 80295d0: 4293 cmp r3, r2 + 80295d2: d004 beq.n 80295de + 80295d4: 687b ldr r3, [r7, #4] + 80295d6: 681b ldr r3, [r3, #0] + 80295d8: 4a15 ldr r2, [pc, #84] ; (8029630 ) + 80295da: 4293 cmp r3, r2 + 80295dc: d12a bne.n 8029634 + 80295de: 687b ldr r3, [r7, #4] + 80295e0: 681b ldr r3, [r3, #0] + 80295e2: 681b ldr r3, [r3, #0] + 80295e4: f003 0302 and.w r3, r3, #2 + 80295e8: 2b00 cmp r3, #0 + 80295ea: bf14 ite ne + 80295ec: 2301 movne r3, #1 + 80295ee: 2300 moveq r3, #0 + 80295f0: b2db uxtb r3, r3 + 80295f2: e023 b.n 802963c + 80295f4: 40020010 .word 0x40020010 + 80295f8: 40020028 .word 0x40020028 + 80295fc: 40020040 .word 0x40020040 + 8029600: 40020058 .word 0x40020058 + 8029604: 40020070 .word 0x40020070 + 8029608: 40020088 .word 0x40020088 + 802960c: 400200a0 .word 0x400200a0 + 8029610: 400200b8 .word 0x400200b8 + 8029614: 40020410 .word 0x40020410 + 8029618: 40020428 .word 0x40020428 + 802961c: 40020440 .word 0x40020440 + 8029620: 40020458 .word 0x40020458 + 8029624: 40020470 .word 0x40020470 + 8029628: 40020488 .word 0x40020488 + 802962c: 400204a0 .word 0x400204a0 + 8029630: 400204b8 .word 0x400204b8 + 8029634: 687b ldr r3, [r7, #4] + 8029636: 681b ldr r3, [r3, #0] + 8029638: 681b ldr r3, [r3, #0] + 802963a: 2300 movs r3, #0 + 802963c: 2b00 cmp r3, #0 + 802963e: d00d beq.n 802965c { /* Clear the direct mode error flag */ regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU); - 80295bc: 687b ldr r3, [r7, #4] - 80295be: 6ddb ldr r3, [r3, #92] ; 0x5c - 80295c0: f003 031f and.w r3, r3, #31 - 80295c4: 2204 movs r2, #4 - 80295c6: 409a lsls r2, r3 - 80295c8: 6a3b ldr r3, [r7, #32] - 80295ca: 609a str r2, [r3, #8] + 8029640: 687b ldr r3, [r7, #4] + 8029642: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029644: f003 031f and.w r3, r3, #31 + 8029648: 2204 movs r2, #4 + 802964a: 409a lsls r2, r3 + 802964c: 6a3b ldr r3, [r7, #32] + 802964e: 609a str r2, [r3, #8] /* Update error code */ hdma->ErrorCode |= HAL_DMA_ERROR_DME; - 80295cc: 687b ldr r3, [r7, #4] - 80295ce: 6d5b ldr r3, [r3, #84] ; 0x54 - 80295d0: f043 0204 orr.w r2, r3, #4 - 80295d4: 687b ldr r3, [r7, #4] - 80295d6: 655a str r2, [r3, #84] ; 0x54 + 8029650: 687b ldr r3, [r7, #4] + 8029652: 6d5b ldr r3, [r3, #84] ; 0x54 + 8029654: f043 0204 orr.w r2, r3, #4 + 8029658: 687b ldr r3, [r7, #4] + 802965a: 655a str r2, [r3, #84] ; 0x54 } } /* Half Transfer Complete Interrupt management ******************************/ if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 80295d8: 687b ldr r3, [r7, #4] - 80295da: 6ddb ldr r3, [r3, #92] ; 0x5c - 80295dc: f003 031f and.w r3, r3, #31 - 80295e0: 2210 movs r2, #16 - 80295e2: 409a lsls r2, r3 - 80295e4: 69bb ldr r3, [r7, #24] - 80295e6: 4013 ands r3, r2 - 80295e8: 2b00 cmp r3, #0 - 80295ea: f000 80a6 beq.w 802973a + 802965c: 687b ldr r3, [r7, #4] + 802965e: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029660: f003 031f and.w r3, r3, #31 + 8029664: 2210 movs r2, #16 + 8029666: 409a lsls r2, r3 + 8029668: 69bb ldr r3, [r7, #24] + 802966a: 4013 ands r3, r2 + 802966c: 2b00 cmp r3, #0 + 802966e: f000 80a6 beq.w 80297be { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != 0U) - 80295ee: 687b ldr r3, [r7, #4] - 80295f0: 681b ldr r3, [r3, #0] - 80295f2: 4a85 ldr r2, [pc, #532] ; (8029808 ) - 80295f4: 4293 cmp r3, r2 - 80295f6: d04a beq.n 802968e - 80295f8: 687b ldr r3, [r7, #4] - 80295fa: 681b ldr r3, [r3, #0] - 80295fc: 4a83 ldr r2, [pc, #524] ; (802980c ) - 80295fe: 4293 cmp r3, r2 - 8029600: d045 beq.n 802968e - 8029602: 687b ldr r3, [r7, #4] - 8029604: 681b ldr r3, [r3, #0] - 8029606: 4a82 ldr r2, [pc, #520] ; (8029810 ) - 8029608: 4293 cmp r3, r2 - 802960a: d040 beq.n 802968e - 802960c: 687b ldr r3, [r7, #4] - 802960e: 681b ldr r3, [r3, #0] - 8029610: 4a80 ldr r2, [pc, #512] ; (8029814 ) - 8029612: 4293 cmp r3, r2 - 8029614: d03b beq.n 802968e - 8029616: 687b ldr r3, [r7, #4] - 8029618: 681b ldr r3, [r3, #0] - 802961a: 4a7f ldr r2, [pc, #508] ; (8029818 ) - 802961c: 4293 cmp r3, r2 - 802961e: d036 beq.n 802968e - 8029620: 687b ldr r3, [r7, #4] - 8029622: 681b ldr r3, [r3, #0] - 8029624: 4a7d ldr r2, [pc, #500] ; (802981c ) - 8029626: 4293 cmp r3, r2 - 8029628: d031 beq.n 802968e - 802962a: 687b ldr r3, [r7, #4] - 802962c: 681b ldr r3, [r3, #0] - 802962e: 4a7c ldr r2, [pc, #496] ; (8029820 ) - 8029630: 4293 cmp r3, r2 - 8029632: d02c beq.n 802968e - 8029634: 687b ldr r3, [r7, #4] - 8029636: 681b ldr r3, [r3, #0] - 8029638: 4a7a ldr r2, [pc, #488] ; (8029824 ) - 802963a: 4293 cmp r3, r2 - 802963c: d027 beq.n 802968e - 802963e: 687b ldr r3, [r7, #4] - 8029640: 681b ldr r3, [r3, #0] - 8029642: 4a79 ldr r2, [pc, #484] ; (8029828 ) - 8029644: 4293 cmp r3, r2 - 8029646: d022 beq.n 802968e - 8029648: 687b ldr r3, [r7, #4] - 802964a: 681b ldr r3, [r3, #0] - 802964c: 4a77 ldr r2, [pc, #476] ; (802982c ) - 802964e: 4293 cmp r3, r2 - 8029650: d01d beq.n 802968e - 8029652: 687b ldr r3, [r7, #4] - 8029654: 681b ldr r3, [r3, #0] - 8029656: 4a76 ldr r2, [pc, #472] ; (8029830 ) - 8029658: 4293 cmp r3, r2 - 802965a: d018 beq.n 802968e - 802965c: 687b ldr r3, [r7, #4] - 802965e: 681b ldr r3, [r3, #0] - 8029660: 4a74 ldr r2, [pc, #464] ; (8029834 ) - 8029662: 4293 cmp r3, r2 - 8029664: d013 beq.n 802968e - 8029666: 687b ldr r3, [r7, #4] - 8029668: 681b ldr r3, [r3, #0] - 802966a: 4a73 ldr r2, [pc, #460] ; (8029838 ) - 802966c: 4293 cmp r3, r2 - 802966e: d00e beq.n 802968e - 8029670: 687b ldr r3, [r7, #4] - 8029672: 681b ldr r3, [r3, #0] - 8029674: 4a71 ldr r2, [pc, #452] ; (802983c ) - 8029676: 4293 cmp r3, r2 - 8029678: d009 beq.n 802968e - 802967a: 687b ldr r3, [r7, #4] - 802967c: 681b ldr r3, [r3, #0] - 802967e: 4a70 ldr r2, [pc, #448] ; (8029840 ) - 8029680: 4293 cmp r3, r2 - 8029682: d004 beq.n 802968e - 8029684: 687b ldr r3, [r7, #4] - 8029686: 681b ldr r3, [r3, #0] - 8029688: 4a6e ldr r2, [pc, #440] ; (8029844 ) - 802968a: 4293 cmp r3, r2 - 802968c: d10a bne.n 80296a4 - 802968e: 687b ldr r3, [r7, #4] - 8029690: 681b ldr r3, [r3, #0] + 8029672: 687b ldr r3, [r7, #4] + 8029674: 681b ldr r3, [r3, #0] + 8029676: 4a85 ldr r2, [pc, #532] ; (802988c ) + 8029678: 4293 cmp r3, r2 + 802967a: d04a beq.n 8029712 + 802967c: 687b ldr r3, [r7, #4] + 802967e: 681b ldr r3, [r3, #0] + 8029680: 4a83 ldr r2, [pc, #524] ; (8029890 ) + 8029682: 4293 cmp r3, r2 + 8029684: d045 beq.n 8029712 + 8029686: 687b ldr r3, [r7, #4] + 8029688: 681b ldr r3, [r3, #0] + 802968a: 4a82 ldr r2, [pc, #520] ; (8029894 ) + 802968c: 4293 cmp r3, r2 + 802968e: d040 beq.n 8029712 + 8029690: 687b ldr r3, [r7, #4] 8029692: 681b ldr r3, [r3, #0] - 8029694: f003 0308 and.w r3, r3, #8 - 8029698: 2b00 cmp r3, #0 - 802969a: bf14 ite ne - 802969c: 2301 movne r3, #1 - 802969e: 2300 moveq r3, #0 - 80296a0: b2db uxtb r3, r3 - 80296a2: e009 b.n 80296b8 + 8029694: 4a80 ldr r2, [pc, #512] ; (8029898 ) + 8029696: 4293 cmp r3, r2 + 8029698: d03b beq.n 8029712 + 802969a: 687b ldr r3, [r7, #4] + 802969c: 681b ldr r3, [r3, #0] + 802969e: 4a7f ldr r2, [pc, #508] ; (802989c ) + 80296a0: 4293 cmp r3, r2 + 80296a2: d036 beq.n 8029712 80296a4: 687b ldr r3, [r7, #4] 80296a6: 681b ldr r3, [r3, #0] - 80296a8: 681b ldr r3, [r3, #0] - 80296aa: f003 0304 and.w r3, r3, #4 - 80296ae: 2b00 cmp r3, #0 - 80296b0: bf14 ite ne - 80296b2: 2301 movne r3, #1 - 80296b4: 2300 moveq r3, #0 - 80296b6: b2db uxtb r3, r3 - 80296b8: 2b00 cmp r3, #0 - 80296ba: d03e beq.n 802973a + 80296a8: 4a7d ldr r2, [pc, #500] ; (80298a0 ) + 80296aa: 4293 cmp r3, r2 + 80296ac: d031 beq.n 8029712 + 80296ae: 687b ldr r3, [r7, #4] + 80296b0: 681b ldr r3, [r3, #0] + 80296b2: 4a7c ldr r2, [pc, #496] ; (80298a4 ) + 80296b4: 4293 cmp r3, r2 + 80296b6: d02c beq.n 8029712 + 80296b8: 687b ldr r3, [r7, #4] + 80296ba: 681b ldr r3, [r3, #0] + 80296bc: 4a7a ldr r2, [pc, #488] ; (80298a8 ) + 80296be: 4293 cmp r3, r2 + 80296c0: d027 beq.n 8029712 + 80296c2: 687b ldr r3, [r7, #4] + 80296c4: 681b ldr r3, [r3, #0] + 80296c6: 4a79 ldr r2, [pc, #484] ; (80298ac ) + 80296c8: 4293 cmp r3, r2 + 80296ca: d022 beq.n 8029712 + 80296cc: 687b ldr r3, [r7, #4] + 80296ce: 681b ldr r3, [r3, #0] + 80296d0: 4a77 ldr r2, [pc, #476] ; (80298b0 ) + 80296d2: 4293 cmp r3, r2 + 80296d4: d01d beq.n 8029712 + 80296d6: 687b ldr r3, [r7, #4] + 80296d8: 681b ldr r3, [r3, #0] + 80296da: 4a76 ldr r2, [pc, #472] ; (80298b4 ) + 80296dc: 4293 cmp r3, r2 + 80296de: d018 beq.n 8029712 + 80296e0: 687b ldr r3, [r7, #4] + 80296e2: 681b ldr r3, [r3, #0] + 80296e4: 4a74 ldr r2, [pc, #464] ; (80298b8 ) + 80296e6: 4293 cmp r3, r2 + 80296e8: d013 beq.n 8029712 + 80296ea: 687b ldr r3, [r7, #4] + 80296ec: 681b ldr r3, [r3, #0] + 80296ee: 4a73 ldr r2, [pc, #460] ; (80298bc ) + 80296f0: 4293 cmp r3, r2 + 80296f2: d00e beq.n 8029712 + 80296f4: 687b ldr r3, [r7, #4] + 80296f6: 681b ldr r3, [r3, #0] + 80296f8: 4a71 ldr r2, [pc, #452] ; (80298c0 ) + 80296fa: 4293 cmp r3, r2 + 80296fc: d009 beq.n 8029712 + 80296fe: 687b ldr r3, [r7, #4] + 8029700: 681b ldr r3, [r3, #0] + 8029702: 4a70 ldr r2, [pc, #448] ; (80298c4 ) + 8029704: 4293 cmp r3, r2 + 8029706: d004 beq.n 8029712 + 8029708: 687b ldr r3, [r7, #4] + 802970a: 681b ldr r3, [r3, #0] + 802970c: 4a6e ldr r2, [pc, #440] ; (80298c8 ) + 802970e: 4293 cmp r3, r2 + 8029710: d10a bne.n 8029728 + 8029712: 687b ldr r3, [r7, #4] + 8029714: 681b ldr r3, [r3, #0] + 8029716: 681b ldr r3, [r3, #0] + 8029718: f003 0308 and.w r3, r3, #8 + 802971c: 2b00 cmp r3, #0 + 802971e: bf14 ite ne + 8029720: 2301 movne r3, #1 + 8029722: 2300 moveq r3, #0 + 8029724: b2db uxtb r3, r3 + 8029726: e009 b.n 802973c + 8029728: 687b ldr r3, [r7, #4] + 802972a: 681b ldr r3, [r3, #0] + 802972c: 681b ldr r3, [r3, #0] + 802972e: f003 0304 and.w r3, r3, #4 + 8029732: 2b00 cmp r3, #0 + 8029734: bf14 ite ne + 8029736: 2301 movne r3, #1 + 8029738: 2300 moveq r3, #0 + 802973a: b2db uxtb r3, r3 + 802973c: 2b00 cmp r3, #0 + 802973e: d03e beq.n 80297be { /* Clear the half transfer complete flag */ regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU); - 80296bc: 687b ldr r3, [r7, #4] - 80296be: 6ddb ldr r3, [r3, #92] ; 0x5c - 80296c0: f003 031f and.w r3, r3, #31 - 80296c4: 2210 movs r2, #16 - 80296c6: 409a lsls r2, r3 - 80296c8: 6a3b ldr r3, [r7, #32] - 80296ca: 609a str r2, [r3, #8] + 8029740: 687b ldr r3, [r7, #4] + 8029742: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029744: f003 031f and.w r3, r3, #31 + 8029748: 2210 movs r2, #16 + 802974a: 409a lsls r2, r3 + 802974c: 6a3b ldr r3, [r7, #32] + 802974e: 609a str r2, [r3, #8] /* Multi_Buffering mode enabled */ if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U) - 80296cc: 687b ldr r3, [r7, #4] - 80296ce: 681b ldr r3, [r3, #0] - 80296d0: 681b ldr r3, [r3, #0] - 80296d2: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 80296d6: 2b00 cmp r3, #0 - 80296d8: d018 beq.n 802970c + 8029750: 687b ldr r3, [r7, #4] + 8029752: 681b ldr r3, [r3, #0] + 8029754: 681b ldr r3, [r3, #0] + 8029756: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 802975a: 2b00 cmp r3, #0 + 802975c: d018 beq.n 8029790 { /* Current memory buffer used is Memory 0 */ if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U) - 80296da: 687b ldr r3, [r7, #4] - 80296dc: 681b ldr r3, [r3, #0] - 80296de: 681b ldr r3, [r3, #0] - 80296e0: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 80296e4: 2b00 cmp r3, #0 - 80296e6: d108 bne.n 80296fa + 802975e: 687b ldr r3, [r7, #4] + 8029760: 681b ldr r3, [r3, #0] + 8029762: 681b ldr r3, [r3, #0] + 8029764: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 8029768: 2b00 cmp r3, #0 + 802976a: d108 bne.n 802977e { if(hdma->XferHalfCpltCallback != NULL) - 80296e8: 687b ldr r3, [r7, #4] - 80296ea: 6c1b ldr r3, [r3, #64] ; 0x40 - 80296ec: 2b00 cmp r3, #0 - 80296ee: d024 beq.n 802973a + 802976c: 687b ldr r3, [r7, #4] + 802976e: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029770: 2b00 cmp r3, #0 + 8029772: d024 beq.n 80297be { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); - 80296f0: 687b ldr r3, [r7, #4] - 80296f2: 6c1b ldr r3, [r3, #64] ; 0x40 - 80296f4: 6878 ldr r0, [r7, #4] - 80296f6: 4798 blx r3 - 80296f8: e01f b.n 802973a + 8029774: 687b ldr r3, [r7, #4] + 8029776: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029778: 6878 ldr r0, [r7, #4] + 802977a: 4798 blx r3 + 802977c: e01f b.n 80297be } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferM1HalfCpltCallback != NULL) - 80296fa: 687b ldr r3, [r7, #4] - 80296fc: 6c9b ldr r3, [r3, #72] ; 0x48 - 80296fe: 2b00 cmp r3, #0 - 8029700: d01b beq.n 802973a + 802977e: 687b ldr r3, [r7, #4] + 8029780: 6c9b ldr r3, [r3, #72] ; 0x48 + 8029782: 2b00 cmp r3, #0 + 8029784: d01b beq.n 80297be { /* Half transfer callback */ hdma->XferM1HalfCpltCallback(hdma); - 8029702: 687b ldr r3, [r7, #4] - 8029704: 6c9b ldr r3, [r3, #72] ; 0x48 - 8029706: 6878 ldr r0, [r7, #4] - 8029708: 4798 blx r3 - 802970a: e016 b.n 802973a + 8029786: 687b ldr r3, [r7, #4] + 8029788: 6c9b ldr r3, [r3, #72] ; 0x48 + 802978a: 6878 ldr r0, [r7, #4] + 802978c: 4798 blx r3 + 802978e: e016 b.n 80297be } } else { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U) - 802970c: 687b ldr r3, [r7, #4] - 802970e: 681b ldr r3, [r3, #0] - 8029710: 681b ldr r3, [r3, #0] - 8029712: f403 7380 and.w r3, r3, #256 ; 0x100 - 8029716: 2b00 cmp r3, #0 - 8029718: d107 bne.n 802972a + 8029790: 687b ldr r3, [r7, #4] + 8029792: 681b ldr r3, [r3, #0] + 8029794: 681b ldr r3, [r3, #0] + 8029796: f403 7380 and.w r3, r3, #256 ; 0x100 + 802979a: 2b00 cmp r3, #0 + 802979c: d107 bne.n 80297ae { /* Disable the half transfer interrupt */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_HT); - 802971a: 687b ldr r3, [r7, #4] - 802971c: 681b ldr r3, [r3, #0] - 802971e: 681a ldr r2, [r3, #0] - 8029720: 687b ldr r3, [r7, #4] - 8029722: 681b ldr r3, [r3, #0] - 8029724: f022 0208 bic.w r2, r2, #8 - 8029728: 601a str r2, [r3, #0] + 802979e: 687b ldr r3, [r7, #4] + 80297a0: 681b ldr r3, [r3, #0] + 80297a2: 681a ldr r2, [r3, #0] + 80297a4: 687b ldr r3, [r7, #4] + 80297a6: 681b ldr r3, [r3, #0] + 80297a8: f022 0208 bic.w r2, r2, #8 + 80297ac: 601a str r2, [r3, #0] } if(hdma->XferHalfCpltCallback != NULL) - 802972a: 687b ldr r3, [r7, #4] - 802972c: 6c1b ldr r3, [r3, #64] ; 0x40 - 802972e: 2b00 cmp r3, #0 - 8029730: d003 beq.n 802973a + 80297ae: 687b ldr r3, [r7, #4] + 80297b0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80297b2: 2b00 cmp r3, #0 + 80297b4: d003 beq.n 80297be { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); - 8029732: 687b ldr r3, [r7, #4] - 8029734: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029736: 6878 ldr r0, [r7, #4] - 8029738: 4798 blx r3 + 80297b6: 687b ldr r3, [r7, #4] + 80297b8: 6c1b ldr r3, [r3, #64] ; 0x40 + 80297ba: 6878 ldr r0, [r7, #4] + 80297bc: 4798 blx r3 } } } } /* Transfer Complete Interrupt management ***********************************/ if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U) - 802973a: 687b ldr r3, [r7, #4] - 802973c: 6ddb ldr r3, [r3, #92] ; 0x5c - 802973e: f003 031f and.w r3, r3, #31 - 8029742: 2220 movs r2, #32 - 8029744: 409a lsls r2, r3 - 8029746: 69bb ldr r3, [r7, #24] - 8029748: 4013 ands r3, r2 - 802974a: 2b00 cmp r3, #0 - 802974c: f000 8110 beq.w 8029970 + 80297be: 687b ldr r3, [r7, #4] + 80297c0: 6ddb ldr r3, [r3, #92] ; 0x5c + 80297c2: f003 031f and.w r3, r3, #31 + 80297c6: 2220 movs r2, #32 + 80297c8: 409a lsls r2, r3 + 80297ca: 69bb ldr r3, [r7, #24] + 80297cc: 4013 ands r3, r2 + 80297ce: 2b00 cmp r3, #0 + 80297d0: f000 8110 beq.w 80299f4 { if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != 0U) - 8029750: 687b ldr r3, [r7, #4] - 8029752: 681b ldr r3, [r3, #0] - 8029754: 4a2c ldr r2, [pc, #176] ; (8029808 ) - 8029756: 4293 cmp r3, r2 - 8029758: d04a beq.n 80297f0 - 802975a: 687b ldr r3, [r7, #4] - 802975c: 681b ldr r3, [r3, #0] - 802975e: 4a2b ldr r2, [pc, #172] ; (802980c ) - 8029760: 4293 cmp r3, r2 - 8029762: d045 beq.n 80297f0 - 8029764: 687b ldr r3, [r7, #4] - 8029766: 681b ldr r3, [r3, #0] - 8029768: 4a29 ldr r2, [pc, #164] ; (8029810 ) - 802976a: 4293 cmp r3, r2 - 802976c: d040 beq.n 80297f0 - 802976e: 687b ldr r3, [r7, #4] - 8029770: 681b ldr r3, [r3, #0] - 8029772: 4a28 ldr r2, [pc, #160] ; (8029814 ) - 8029774: 4293 cmp r3, r2 - 8029776: d03b beq.n 80297f0 - 8029778: 687b ldr r3, [r7, #4] - 802977a: 681b ldr r3, [r3, #0] - 802977c: 4a26 ldr r2, [pc, #152] ; (8029818 ) - 802977e: 4293 cmp r3, r2 - 8029780: d036 beq.n 80297f0 - 8029782: 687b ldr r3, [r7, #4] - 8029784: 681b ldr r3, [r3, #0] - 8029786: 4a25 ldr r2, [pc, #148] ; (802981c ) - 8029788: 4293 cmp r3, r2 - 802978a: d031 beq.n 80297f0 - 802978c: 687b ldr r3, [r7, #4] - 802978e: 681b ldr r3, [r3, #0] - 8029790: 4a23 ldr r2, [pc, #140] ; (8029820 ) - 8029792: 4293 cmp r3, r2 - 8029794: d02c beq.n 80297f0 - 8029796: 687b ldr r3, [r7, #4] - 8029798: 681b ldr r3, [r3, #0] - 802979a: 4a22 ldr r2, [pc, #136] ; (8029824 ) - 802979c: 4293 cmp r3, r2 - 802979e: d027 beq.n 80297f0 - 80297a0: 687b ldr r3, [r7, #4] - 80297a2: 681b ldr r3, [r3, #0] - 80297a4: 4a20 ldr r2, [pc, #128] ; (8029828 ) - 80297a6: 4293 cmp r3, r2 - 80297a8: d022 beq.n 80297f0 - 80297aa: 687b ldr r3, [r7, #4] - 80297ac: 681b ldr r3, [r3, #0] - 80297ae: 4a1f ldr r2, [pc, #124] ; (802982c ) - 80297b0: 4293 cmp r3, r2 - 80297b2: d01d beq.n 80297f0 - 80297b4: 687b ldr r3, [r7, #4] - 80297b6: 681b ldr r3, [r3, #0] - 80297b8: 4a1d ldr r2, [pc, #116] ; (8029830 ) - 80297ba: 4293 cmp r3, r2 - 80297bc: d018 beq.n 80297f0 - 80297be: 687b ldr r3, [r7, #4] - 80297c0: 681b ldr r3, [r3, #0] - 80297c2: 4a1c ldr r2, [pc, #112] ; (8029834 ) - 80297c4: 4293 cmp r3, r2 - 80297c6: d013 beq.n 80297f0 - 80297c8: 687b ldr r3, [r7, #4] - 80297ca: 681b ldr r3, [r3, #0] - 80297cc: 4a1a ldr r2, [pc, #104] ; (8029838 ) - 80297ce: 4293 cmp r3, r2 - 80297d0: d00e beq.n 80297f0 - 80297d2: 687b ldr r3, [r7, #4] - 80297d4: 681b ldr r3, [r3, #0] - 80297d6: 4a19 ldr r2, [pc, #100] ; (802983c ) - 80297d8: 4293 cmp r3, r2 - 80297da: d009 beq.n 80297f0 - 80297dc: 687b ldr r3, [r7, #4] - 80297de: 681b ldr r3, [r3, #0] - 80297e0: 4a17 ldr r2, [pc, #92] ; (8029840 ) - 80297e2: 4293 cmp r3, r2 - 80297e4: d004 beq.n 80297f0 - 80297e6: 687b ldr r3, [r7, #4] - 80297e8: 681b ldr r3, [r3, #0] - 80297ea: 4a16 ldr r2, [pc, #88] ; (8029844 ) - 80297ec: 4293 cmp r3, r2 - 80297ee: d12b bne.n 8029848 - 80297f0: 687b ldr r3, [r7, #4] - 80297f2: 681b ldr r3, [r3, #0] + 80297d4: 687b ldr r3, [r7, #4] + 80297d6: 681b ldr r3, [r3, #0] + 80297d8: 4a2c ldr r2, [pc, #176] ; (802988c ) + 80297da: 4293 cmp r3, r2 + 80297dc: d04a beq.n 8029874 + 80297de: 687b ldr r3, [r7, #4] + 80297e0: 681b ldr r3, [r3, #0] + 80297e2: 4a2b ldr r2, [pc, #172] ; (8029890 ) + 80297e4: 4293 cmp r3, r2 + 80297e6: d045 beq.n 8029874 + 80297e8: 687b ldr r3, [r7, #4] + 80297ea: 681b ldr r3, [r3, #0] + 80297ec: 4a29 ldr r2, [pc, #164] ; (8029894 ) + 80297ee: 4293 cmp r3, r2 + 80297f0: d040 beq.n 8029874 + 80297f2: 687b ldr r3, [r7, #4] 80297f4: 681b ldr r3, [r3, #0] - 80297f6: f003 0310 and.w r3, r3, #16 - 80297fa: 2b00 cmp r3, #0 - 80297fc: bf14 ite ne - 80297fe: 2301 movne r3, #1 - 8029800: 2300 moveq r3, #0 - 8029802: b2db uxtb r3, r3 - 8029804: e02a b.n 802985c - 8029806: bf00 nop - 8029808: 40020010 .word 0x40020010 - 802980c: 40020028 .word 0x40020028 - 8029810: 40020040 .word 0x40020040 - 8029814: 40020058 .word 0x40020058 - 8029818: 40020070 .word 0x40020070 - 802981c: 40020088 .word 0x40020088 - 8029820: 400200a0 .word 0x400200a0 - 8029824: 400200b8 .word 0x400200b8 - 8029828: 40020410 .word 0x40020410 - 802982c: 40020428 .word 0x40020428 - 8029830: 40020440 .word 0x40020440 - 8029834: 40020458 .word 0x40020458 - 8029838: 40020470 .word 0x40020470 - 802983c: 40020488 .word 0x40020488 - 8029840: 400204a0 .word 0x400204a0 - 8029844: 400204b8 .word 0x400204b8 - 8029848: 687b ldr r3, [r7, #4] - 802984a: 681b ldr r3, [r3, #0] - 802984c: 681b ldr r3, [r3, #0] - 802984e: f003 0302 and.w r3, r3, #2 - 8029852: 2b00 cmp r3, #0 - 8029854: bf14 ite ne - 8029856: 2301 movne r3, #1 - 8029858: 2300 moveq r3, #0 - 802985a: b2db uxtb r3, r3 - 802985c: 2b00 cmp r3, #0 - 802985e: f000 8087 beq.w 8029970 + 80297f6: 4a28 ldr r2, [pc, #160] ; (8029898 ) + 80297f8: 4293 cmp r3, r2 + 80297fa: d03b beq.n 8029874 + 80297fc: 687b ldr r3, [r7, #4] + 80297fe: 681b ldr r3, [r3, #0] + 8029800: 4a26 ldr r2, [pc, #152] ; (802989c ) + 8029802: 4293 cmp r3, r2 + 8029804: d036 beq.n 8029874 + 8029806: 687b ldr r3, [r7, #4] + 8029808: 681b ldr r3, [r3, #0] + 802980a: 4a25 ldr r2, [pc, #148] ; (80298a0 ) + 802980c: 4293 cmp r3, r2 + 802980e: d031 beq.n 8029874 + 8029810: 687b ldr r3, [r7, #4] + 8029812: 681b ldr r3, [r3, #0] + 8029814: 4a23 ldr r2, [pc, #140] ; (80298a4 ) + 8029816: 4293 cmp r3, r2 + 8029818: d02c beq.n 8029874 + 802981a: 687b ldr r3, [r7, #4] + 802981c: 681b ldr r3, [r3, #0] + 802981e: 4a22 ldr r2, [pc, #136] ; (80298a8 ) + 8029820: 4293 cmp r3, r2 + 8029822: d027 beq.n 8029874 + 8029824: 687b ldr r3, [r7, #4] + 8029826: 681b ldr r3, [r3, #0] + 8029828: 4a20 ldr r2, [pc, #128] ; (80298ac ) + 802982a: 4293 cmp r3, r2 + 802982c: d022 beq.n 8029874 + 802982e: 687b ldr r3, [r7, #4] + 8029830: 681b ldr r3, [r3, #0] + 8029832: 4a1f ldr r2, [pc, #124] ; (80298b0 ) + 8029834: 4293 cmp r3, r2 + 8029836: d01d beq.n 8029874 + 8029838: 687b ldr r3, [r7, #4] + 802983a: 681b ldr r3, [r3, #0] + 802983c: 4a1d ldr r2, [pc, #116] ; (80298b4 ) + 802983e: 4293 cmp r3, r2 + 8029840: d018 beq.n 8029874 + 8029842: 687b ldr r3, [r7, #4] + 8029844: 681b ldr r3, [r3, #0] + 8029846: 4a1c ldr r2, [pc, #112] ; (80298b8 ) + 8029848: 4293 cmp r3, r2 + 802984a: d013 beq.n 8029874 + 802984c: 687b ldr r3, [r7, #4] + 802984e: 681b ldr r3, [r3, #0] + 8029850: 4a1a ldr r2, [pc, #104] ; (80298bc ) + 8029852: 4293 cmp r3, r2 + 8029854: d00e beq.n 8029874 + 8029856: 687b ldr r3, [r7, #4] + 8029858: 681b ldr r3, [r3, #0] + 802985a: 4a19 ldr r2, [pc, #100] ; (80298c0 ) + 802985c: 4293 cmp r3, r2 + 802985e: d009 beq.n 8029874 + 8029860: 687b ldr r3, [r7, #4] + 8029862: 681b ldr r3, [r3, #0] + 8029864: 4a17 ldr r2, [pc, #92] ; (80298c4 ) + 8029866: 4293 cmp r3, r2 + 8029868: d004 beq.n 8029874 + 802986a: 687b ldr r3, [r7, #4] + 802986c: 681b ldr r3, [r3, #0] + 802986e: 4a16 ldr r2, [pc, #88] ; (80298c8 ) + 8029870: 4293 cmp r3, r2 + 8029872: d12b bne.n 80298cc + 8029874: 687b ldr r3, [r7, #4] + 8029876: 681b ldr r3, [r3, #0] + 8029878: 681b ldr r3, [r3, #0] + 802987a: f003 0310 and.w r3, r3, #16 + 802987e: 2b00 cmp r3, #0 + 8029880: bf14 ite ne + 8029882: 2301 movne r3, #1 + 8029884: 2300 moveq r3, #0 + 8029886: b2db uxtb r3, r3 + 8029888: e02a b.n 80298e0 + 802988a: bf00 nop + 802988c: 40020010 .word 0x40020010 + 8029890: 40020028 .word 0x40020028 + 8029894: 40020040 .word 0x40020040 + 8029898: 40020058 .word 0x40020058 + 802989c: 40020070 .word 0x40020070 + 80298a0: 40020088 .word 0x40020088 + 80298a4: 400200a0 .word 0x400200a0 + 80298a8: 400200b8 .word 0x400200b8 + 80298ac: 40020410 .word 0x40020410 + 80298b0: 40020428 .word 0x40020428 + 80298b4: 40020440 .word 0x40020440 + 80298b8: 40020458 .word 0x40020458 + 80298bc: 40020470 .word 0x40020470 + 80298c0: 40020488 .word 0x40020488 + 80298c4: 400204a0 .word 0x400204a0 + 80298c8: 400204b8 .word 0x400204b8 + 80298cc: 687b ldr r3, [r7, #4] + 80298ce: 681b ldr r3, [r3, #0] + 80298d0: 681b ldr r3, [r3, #0] + 80298d2: f003 0302 and.w r3, r3, #2 + 80298d6: 2b00 cmp r3, #0 + 80298d8: bf14 ite ne + 80298da: 2301 movne r3, #1 + 80298dc: 2300 moveq r3, #0 + 80298de: b2db uxtb r3, r3 + 80298e0: 2b00 cmp r3, #0 + 80298e2: f000 8087 beq.w 80299f4 { /* Clear the transfer complete flag */ regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU); - 8029862: 687b ldr r3, [r7, #4] - 8029864: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029866: f003 031f and.w r3, r3, #31 - 802986a: 2220 movs r2, #32 - 802986c: 409a lsls r2, r3 - 802986e: 6a3b ldr r3, [r7, #32] - 8029870: 609a str r2, [r3, #8] + 80298e6: 687b ldr r3, [r7, #4] + 80298e8: 6ddb ldr r3, [r3, #92] ; 0x5c + 80298ea: f003 031f and.w r3, r3, #31 + 80298ee: 2220 movs r2, #32 + 80298f0: 409a lsls r2, r3 + 80298f2: 6a3b ldr r3, [r7, #32] + 80298f4: 609a str r2, [r3, #8] if(HAL_DMA_STATE_ABORT == hdma->State) - 8029872: 687b ldr r3, [r7, #4] - 8029874: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 8029878: b2db uxtb r3, r3 - 802987a: 2b04 cmp r3, #4 - 802987c: d139 bne.n 80298f2 + 80298f6: 687b ldr r3, [r7, #4] + 80298f8: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 80298fc: b2db uxtb r3, r3 + 80298fe: 2b04 cmp r3, #4 + 8029900: d139 bne.n 8029976 { /* Disable all the transfer interrupts */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME); - 802987e: 687b ldr r3, [r7, #4] - 8029880: 681b ldr r3, [r3, #0] - 8029882: 681a ldr r2, [r3, #0] - 8029884: 687b ldr r3, [r7, #4] - 8029886: 681b ldr r3, [r3, #0] - 8029888: f022 0216 bic.w r2, r2, #22 - 802988c: 601a str r2, [r3, #0] + 8029902: 687b ldr r3, [r7, #4] + 8029904: 681b ldr r3, [r3, #0] + 8029906: 681a ldr r2, [r3, #0] + 8029908: 687b ldr r3, [r7, #4] + 802990a: 681b ldr r3, [r3, #0] + 802990c: f022 0216 bic.w r2, r2, #22 + 8029910: 601a str r2, [r3, #0] ((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE); - 802988e: 687b ldr r3, [r7, #4] - 8029890: 681b ldr r3, [r3, #0] - 8029892: 695a ldr r2, [r3, #20] - 8029894: 687b ldr r3, [r7, #4] - 8029896: 681b ldr r3, [r3, #0] - 8029898: f022 0280 bic.w r2, r2, #128 ; 0x80 - 802989c: 615a str r2, [r3, #20] + 8029912: 687b ldr r3, [r7, #4] + 8029914: 681b ldr r3, [r3, #0] + 8029916: 695a ldr r2, [r3, #20] + 8029918: 687b ldr r3, [r7, #4] + 802991a: 681b ldr r3, [r3, #0] + 802991c: f022 0280 bic.w r2, r2, #128 ; 0x80 + 8029920: 615a str r2, [r3, #20] if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) - 802989e: 687b ldr r3, [r7, #4] - 80298a0: 6c1b ldr r3, [r3, #64] ; 0x40 - 80298a2: 2b00 cmp r3, #0 - 80298a4: d103 bne.n 80298ae - 80298a6: 687b ldr r3, [r7, #4] - 80298a8: 6c9b ldr r3, [r3, #72] ; 0x48 - 80298aa: 2b00 cmp r3, #0 - 80298ac: d007 beq.n 80298be + 8029922: 687b ldr r3, [r7, #4] + 8029924: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029926: 2b00 cmp r3, #0 + 8029928: d103 bne.n 8029932 + 802992a: 687b ldr r3, [r7, #4] + 802992c: 6c9b ldr r3, [r3, #72] ; 0x48 + 802992e: 2b00 cmp r3, #0 + 8029930: d007 beq.n 8029942 { ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_HT); - 80298ae: 687b ldr r3, [r7, #4] - 80298b0: 681b ldr r3, [r3, #0] - 80298b2: 681a ldr r2, [r3, #0] - 80298b4: 687b ldr r3, [r7, #4] - 80298b6: 681b ldr r3, [r3, #0] - 80298b8: f022 0208 bic.w r2, r2, #8 - 80298bc: 601a str r2, [r3, #0] + 8029932: 687b ldr r3, [r7, #4] + 8029934: 681b ldr r3, [r3, #0] + 8029936: 681a ldr r2, [r3, #0] + 8029938: 687b ldr r3, [r7, #4] + 802993a: 681b ldr r3, [r3, #0] + 802993c: f022 0208 bic.w r2, r2, #8 + 8029940: 601a str r2, [r3, #0] } /* Clear all interrupt flags at correct offset within the register */ regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); - 80298be: 687b ldr r3, [r7, #4] - 80298c0: 6ddb ldr r3, [r3, #92] ; 0x5c - 80298c2: f003 031f and.w r3, r3, #31 - 80298c6: 223f movs r2, #63 ; 0x3f - 80298c8: 409a lsls r2, r3 - 80298ca: 6a3b ldr r3, [r7, #32] - 80298cc: 609a str r2, [r3, #8] + 8029942: 687b ldr r3, [r7, #4] + 8029944: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029946: f003 031f and.w r3, r3, #31 + 802994a: 223f movs r2, #63 ; 0x3f + 802994c: 409a lsls r2, r3 + 802994e: 6a3b ldr r3, [r7, #32] + 8029950: 609a str r2, [r3, #8] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 80298ce: 687b ldr r3, [r7, #4] - 80298d0: 2201 movs r2, #1 - 80298d2: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029952: 687b ldr r3, [r7, #4] + 8029954: 2201 movs r2, #1 + 8029956: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80298d6: 687b ldr r3, [r7, #4] - 80298d8: 2200 movs r2, #0 - 80298da: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 802995a: 687b ldr r3, [r7, #4] + 802995c: 2200 movs r2, #0 + 802995e: f883 2034 strb.w r2, [r3, #52] ; 0x34 if(hdma->XferAbortCallback != NULL) - 80298de: 687b ldr r3, [r7, #4] - 80298e0: 6d1b ldr r3, [r3, #80] ; 0x50 - 80298e2: 2b00 cmp r3, #0 - 80298e4: f000 834a beq.w 8029f7c + 8029962: 687b ldr r3, [r7, #4] + 8029964: 6d1b ldr r3, [r3, #80] ; 0x50 + 8029966: 2b00 cmp r3, #0 + 8029968: f000 834a beq.w 802a000 { hdma->XferAbortCallback(hdma); - 80298e8: 687b ldr r3, [r7, #4] - 80298ea: 6d1b ldr r3, [r3, #80] ; 0x50 - 80298ec: 6878 ldr r0, [r7, #4] - 80298ee: 4798 blx r3 + 802996c: 687b ldr r3, [r7, #4] + 802996e: 6d1b ldr r3, [r3, #80] ; 0x50 + 8029970: 6878 ldr r0, [r7, #4] + 8029972: 4798 blx r3 } return; - 80298f0: e344 b.n 8029f7c + 8029974: e344 b.n 802a000 } if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U) - 80298f2: 687b ldr r3, [r7, #4] - 80298f4: 681b ldr r3, [r3, #0] - 80298f6: 681b ldr r3, [r3, #0] - 80298f8: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 80298fc: 2b00 cmp r3, #0 - 80298fe: d018 beq.n 8029932 + 8029976: 687b ldr r3, [r7, #4] + 8029978: 681b ldr r3, [r3, #0] + 802997a: 681b ldr r3, [r3, #0] + 802997c: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 8029980: 2b00 cmp r3, #0 + 8029982: d018 beq.n 80299b6 { /* Current memory buffer used is Memory 0 */ if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U) - 8029900: 687b ldr r3, [r7, #4] - 8029902: 681b ldr r3, [r3, #0] - 8029904: 681b ldr r3, [r3, #0] - 8029906: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 802990a: 2b00 cmp r3, #0 - 802990c: d108 bne.n 8029920 + 8029984: 687b ldr r3, [r7, #4] + 8029986: 681b ldr r3, [r3, #0] + 8029988: 681b ldr r3, [r3, #0] + 802998a: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 802998e: 2b00 cmp r3, #0 + 8029990: d108 bne.n 80299a4 { if(hdma->XferM1CpltCallback != NULL) - 802990e: 687b ldr r3, [r7, #4] - 8029910: 6c5b ldr r3, [r3, #68] ; 0x44 - 8029912: 2b00 cmp r3, #0 - 8029914: d02c beq.n 8029970 + 8029992: 687b ldr r3, [r7, #4] + 8029994: 6c5b ldr r3, [r3, #68] ; 0x44 + 8029996: 2b00 cmp r3, #0 + 8029998: d02c beq.n 80299f4 { /* Transfer complete Callback for memory1 */ hdma->XferM1CpltCallback(hdma); - 8029916: 687b ldr r3, [r7, #4] - 8029918: 6c5b ldr r3, [r3, #68] ; 0x44 - 802991a: 6878 ldr r0, [r7, #4] - 802991c: 4798 blx r3 - 802991e: e027 b.n 8029970 + 802999a: 687b ldr r3, [r7, #4] + 802999c: 6c5b ldr r3, [r3, #68] ; 0x44 + 802999e: 6878 ldr r0, [r7, #4] + 80299a0: 4798 blx r3 + 80299a2: e027 b.n 80299f4 } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferCpltCallback != NULL) - 8029920: 687b ldr r3, [r7, #4] - 8029922: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029924: 2b00 cmp r3, #0 - 8029926: d023 beq.n 8029970 + 80299a4: 687b ldr r3, [r7, #4] + 80299a6: 6bdb ldr r3, [r3, #60] ; 0x3c + 80299a8: 2b00 cmp r3, #0 + 80299aa: d023 beq.n 80299f4 { /* Transfer complete Callback for memory0 */ hdma->XferCpltCallback(hdma); - 8029928: 687b ldr r3, [r7, #4] - 802992a: 6bdb ldr r3, [r3, #60] ; 0x3c - 802992c: 6878 ldr r0, [r7, #4] - 802992e: 4798 blx r3 - 8029930: e01e b.n 8029970 + 80299ac: 687b ldr r3, [r7, #4] + 80299ae: 6bdb ldr r3, [r3, #60] ; 0x3c + 80299b0: 6878 ldr r0, [r7, #4] + 80299b2: 4798 blx r3 + 80299b4: e01e b.n 80299f4 } } /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */ else { if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U) - 8029932: 687b ldr r3, [r7, #4] - 8029934: 681b ldr r3, [r3, #0] - 8029936: 681b ldr r3, [r3, #0] - 8029938: f403 7380 and.w r3, r3, #256 ; 0x100 - 802993c: 2b00 cmp r3, #0 - 802993e: d10f bne.n 8029960 + 80299b6: 687b ldr r3, [r7, #4] + 80299b8: 681b ldr r3, [r3, #0] + 80299ba: 681b ldr r3, [r3, #0] + 80299bc: f403 7380 and.w r3, r3, #256 ; 0x100 + 80299c0: 2b00 cmp r3, #0 + 80299c2: d10f bne.n 80299e4 { /* Disable the transfer complete interrupt */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC); - 8029940: 687b ldr r3, [r7, #4] - 8029942: 681b ldr r3, [r3, #0] - 8029944: 681a ldr r2, [r3, #0] - 8029946: 687b ldr r3, [r7, #4] - 8029948: 681b ldr r3, [r3, #0] - 802994a: f022 0210 bic.w r2, r2, #16 - 802994e: 601a str r2, [r3, #0] + 80299c4: 687b ldr r3, [r7, #4] + 80299c6: 681b ldr r3, [r3, #0] + 80299c8: 681a ldr r2, [r3, #0] + 80299ca: 687b ldr r3, [r7, #4] + 80299cc: 681b ldr r3, [r3, #0] + 80299ce: f022 0210 bic.w r2, r2, #16 + 80299d2: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8029950: 687b ldr r3, [r7, #4] - 8029952: 2201 movs r2, #1 - 8029954: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 80299d4: 687b ldr r3, [r7, #4] + 80299d6: 2201 movs r2, #1 + 80299d8: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029958: 687b ldr r3, [r7, #4] - 802995a: 2200 movs r2, #0 - 802995c: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 80299dc: 687b ldr r3, [r7, #4] + 80299de: 2200 movs r2, #0 + 80299e0: f883 2034 strb.w r2, [r3, #52] ; 0x34 } if(hdma->XferCpltCallback != NULL) - 8029960: 687b ldr r3, [r7, #4] - 8029962: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029964: 2b00 cmp r3, #0 - 8029966: d003 beq.n 8029970 + 80299e4: 687b ldr r3, [r7, #4] + 80299e6: 6bdb ldr r3, [r3, #60] ; 0x3c + 80299e8: 2b00 cmp r3, #0 + 80299ea: d003 beq.n 80299f4 { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); - 8029968: 687b ldr r3, [r7, #4] - 802996a: 6bdb ldr r3, [r3, #60] ; 0x3c - 802996c: 6878 ldr r0, [r7, #4] - 802996e: 4798 blx r3 + 80299ec: 687b ldr r3, [r7, #4] + 80299ee: 6bdb ldr r3, [r3, #60] ; 0x3c + 80299f0: 6878 ldr r0, [r7, #4] + 80299f2: 4798 blx r3 } } } /* manage error case */ if(hdma->ErrorCode != HAL_DMA_ERROR_NONE) - 8029970: 687b ldr r3, [r7, #4] - 8029972: 6d5b ldr r3, [r3, #84] ; 0x54 - 8029974: 2b00 cmp r3, #0 - 8029976: f000 8306 beq.w 8029f86 + 80299f4: 687b ldr r3, [r7, #4] + 80299f6: 6d5b ldr r3, [r3, #84] ; 0x54 + 80299f8: 2b00 cmp r3, #0 + 80299fa: f000 8306 beq.w 802a00a { if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != 0U) - 802997a: 687b ldr r3, [r7, #4] - 802997c: 6d5b ldr r3, [r3, #84] ; 0x54 - 802997e: f003 0301 and.w r3, r3, #1 - 8029982: 2b00 cmp r3, #0 - 8029984: f000 8088 beq.w 8029a98 + 80299fe: 687b ldr r3, [r7, #4] + 8029a00: 6d5b ldr r3, [r3, #84] ; 0x54 + 8029a02: f003 0301 and.w r3, r3, #1 + 8029a06: 2b00 cmp r3, #0 + 8029a08: f000 8088 beq.w 8029b1c { hdma->State = HAL_DMA_STATE_ABORT; - 8029988: 687b ldr r3, [r7, #4] - 802998a: 2204 movs r2, #4 - 802998c: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029a0c: 687b ldr r3, [r7, #4] + 8029a0e: 2204 movs r2, #4 + 8029a10: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Disable the stream */ __HAL_DMA_DISABLE(hdma); - 8029990: 687b ldr r3, [r7, #4] - 8029992: 681b ldr r3, [r3, #0] - 8029994: 4a7a ldr r2, [pc, #488] ; (8029b80 ) - 8029996: 4293 cmp r3, r2 - 8029998: d04a beq.n 8029a30 - 802999a: 687b ldr r3, [r7, #4] - 802999c: 681b ldr r3, [r3, #0] - 802999e: 4a79 ldr r2, [pc, #484] ; (8029b84 ) - 80299a0: 4293 cmp r3, r2 - 80299a2: d045 beq.n 8029a30 - 80299a4: 687b ldr r3, [r7, #4] - 80299a6: 681b ldr r3, [r3, #0] - 80299a8: 4a77 ldr r2, [pc, #476] ; (8029b88 ) - 80299aa: 4293 cmp r3, r2 - 80299ac: d040 beq.n 8029a30 - 80299ae: 687b ldr r3, [r7, #4] - 80299b0: 681b ldr r3, [r3, #0] - 80299b2: 4a76 ldr r2, [pc, #472] ; (8029b8c ) - 80299b4: 4293 cmp r3, r2 - 80299b6: d03b beq.n 8029a30 - 80299b8: 687b ldr r3, [r7, #4] - 80299ba: 681b ldr r3, [r3, #0] - 80299bc: 4a74 ldr r2, [pc, #464] ; (8029b90 ) - 80299be: 4293 cmp r3, r2 - 80299c0: d036 beq.n 8029a30 - 80299c2: 687b ldr r3, [r7, #4] - 80299c4: 681b ldr r3, [r3, #0] - 80299c6: 4a73 ldr r2, [pc, #460] ; (8029b94 ) - 80299c8: 4293 cmp r3, r2 - 80299ca: d031 beq.n 8029a30 - 80299cc: 687b ldr r3, [r7, #4] - 80299ce: 681b ldr r3, [r3, #0] - 80299d0: 4a71 ldr r2, [pc, #452] ; (8029b98 ) - 80299d2: 4293 cmp r3, r2 - 80299d4: d02c beq.n 8029a30 - 80299d6: 687b ldr r3, [r7, #4] - 80299d8: 681b ldr r3, [r3, #0] - 80299da: 4a70 ldr r2, [pc, #448] ; (8029b9c ) - 80299dc: 4293 cmp r3, r2 - 80299de: d027 beq.n 8029a30 - 80299e0: 687b ldr r3, [r7, #4] - 80299e2: 681b ldr r3, [r3, #0] - 80299e4: 4a6e ldr r2, [pc, #440] ; (8029ba0 ) - 80299e6: 4293 cmp r3, r2 - 80299e8: d022 beq.n 8029a30 - 80299ea: 687b ldr r3, [r7, #4] - 80299ec: 681b ldr r3, [r3, #0] - 80299ee: 4a6d ldr r2, [pc, #436] ; (8029ba4 ) - 80299f0: 4293 cmp r3, r2 - 80299f2: d01d beq.n 8029a30 - 80299f4: 687b ldr r3, [r7, #4] - 80299f6: 681b ldr r3, [r3, #0] - 80299f8: 4a6b ldr r2, [pc, #428] ; (8029ba8 ) - 80299fa: 4293 cmp r3, r2 - 80299fc: d018 beq.n 8029a30 - 80299fe: 687b ldr r3, [r7, #4] - 8029a00: 681b ldr r3, [r3, #0] - 8029a02: 4a6a ldr r2, [pc, #424] ; (8029bac ) - 8029a04: 4293 cmp r3, r2 - 8029a06: d013 beq.n 8029a30 - 8029a08: 687b ldr r3, [r7, #4] - 8029a0a: 681b ldr r3, [r3, #0] - 8029a0c: 4a68 ldr r2, [pc, #416] ; (8029bb0 ) - 8029a0e: 4293 cmp r3, r2 - 8029a10: d00e beq.n 8029a30 - 8029a12: 687b ldr r3, [r7, #4] - 8029a14: 681b ldr r3, [r3, #0] - 8029a16: 4a67 ldr r2, [pc, #412] ; (8029bb4 ) - 8029a18: 4293 cmp r3, r2 - 8029a1a: d009 beq.n 8029a30 - 8029a1c: 687b ldr r3, [r7, #4] - 8029a1e: 681b ldr r3, [r3, #0] - 8029a20: 4a65 ldr r2, [pc, #404] ; (8029bb8 ) - 8029a22: 4293 cmp r3, r2 - 8029a24: d004 beq.n 8029a30 - 8029a26: 687b ldr r3, [r7, #4] - 8029a28: 681b ldr r3, [r3, #0] - 8029a2a: 4a64 ldr r2, [pc, #400] ; (8029bbc ) - 8029a2c: 4293 cmp r3, r2 - 8029a2e: d108 bne.n 8029a42 - 8029a30: 687b ldr r3, [r7, #4] - 8029a32: 681b ldr r3, [r3, #0] - 8029a34: 681a ldr r2, [r3, #0] - 8029a36: 687b ldr r3, [r7, #4] - 8029a38: 681b ldr r3, [r3, #0] - 8029a3a: f022 0201 bic.w r2, r2, #1 - 8029a3e: 601a str r2, [r3, #0] - 8029a40: e007 b.n 8029a52 - 8029a42: 687b ldr r3, [r7, #4] - 8029a44: 681b ldr r3, [r3, #0] - 8029a46: 681a ldr r2, [r3, #0] - 8029a48: 687b ldr r3, [r7, #4] - 8029a4a: 681b ldr r3, [r3, #0] - 8029a4c: f022 0201 bic.w r2, r2, #1 - 8029a50: 601a str r2, [r3, #0] + 8029a14: 687b ldr r3, [r7, #4] + 8029a16: 681b ldr r3, [r3, #0] + 8029a18: 4a7a ldr r2, [pc, #488] ; (8029c04 ) + 8029a1a: 4293 cmp r3, r2 + 8029a1c: d04a beq.n 8029ab4 + 8029a1e: 687b ldr r3, [r7, #4] + 8029a20: 681b ldr r3, [r3, #0] + 8029a22: 4a79 ldr r2, [pc, #484] ; (8029c08 ) + 8029a24: 4293 cmp r3, r2 + 8029a26: d045 beq.n 8029ab4 + 8029a28: 687b ldr r3, [r7, #4] + 8029a2a: 681b ldr r3, [r3, #0] + 8029a2c: 4a77 ldr r2, [pc, #476] ; (8029c0c ) + 8029a2e: 4293 cmp r3, r2 + 8029a30: d040 beq.n 8029ab4 + 8029a32: 687b ldr r3, [r7, #4] + 8029a34: 681b ldr r3, [r3, #0] + 8029a36: 4a76 ldr r2, [pc, #472] ; (8029c10 ) + 8029a38: 4293 cmp r3, r2 + 8029a3a: d03b beq.n 8029ab4 + 8029a3c: 687b ldr r3, [r7, #4] + 8029a3e: 681b ldr r3, [r3, #0] + 8029a40: 4a74 ldr r2, [pc, #464] ; (8029c14 ) + 8029a42: 4293 cmp r3, r2 + 8029a44: d036 beq.n 8029ab4 + 8029a46: 687b ldr r3, [r7, #4] + 8029a48: 681b ldr r3, [r3, #0] + 8029a4a: 4a73 ldr r2, [pc, #460] ; (8029c18 ) + 8029a4c: 4293 cmp r3, r2 + 8029a4e: d031 beq.n 8029ab4 + 8029a50: 687b ldr r3, [r7, #4] + 8029a52: 681b ldr r3, [r3, #0] + 8029a54: 4a71 ldr r2, [pc, #452] ; (8029c1c ) + 8029a56: 4293 cmp r3, r2 + 8029a58: d02c beq.n 8029ab4 + 8029a5a: 687b ldr r3, [r7, #4] + 8029a5c: 681b ldr r3, [r3, #0] + 8029a5e: 4a70 ldr r2, [pc, #448] ; (8029c20 ) + 8029a60: 4293 cmp r3, r2 + 8029a62: d027 beq.n 8029ab4 + 8029a64: 687b ldr r3, [r7, #4] + 8029a66: 681b ldr r3, [r3, #0] + 8029a68: 4a6e ldr r2, [pc, #440] ; (8029c24 ) + 8029a6a: 4293 cmp r3, r2 + 8029a6c: d022 beq.n 8029ab4 + 8029a6e: 687b ldr r3, [r7, #4] + 8029a70: 681b ldr r3, [r3, #0] + 8029a72: 4a6d ldr r2, [pc, #436] ; (8029c28 ) + 8029a74: 4293 cmp r3, r2 + 8029a76: d01d beq.n 8029ab4 + 8029a78: 687b ldr r3, [r7, #4] + 8029a7a: 681b ldr r3, [r3, #0] + 8029a7c: 4a6b ldr r2, [pc, #428] ; (8029c2c ) + 8029a7e: 4293 cmp r3, r2 + 8029a80: d018 beq.n 8029ab4 + 8029a82: 687b ldr r3, [r7, #4] + 8029a84: 681b ldr r3, [r3, #0] + 8029a86: 4a6a ldr r2, [pc, #424] ; (8029c30 ) + 8029a88: 4293 cmp r3, r2 + 8029a8a: d013 beq.n 8029ab4 + 8029a8c: 687b ldr r3, [r7, #4] + 8029a8e: 681b ldr r3, [r3, #0] + 8029a90: 4a68 ldr r2, [pc, #416] ; (8029c34 ) + 8029a92: 4293 cmp r3, r2 + 8029a94: d00e beq.n 8029ab4 + 8029a96: 687b ldr r3, [r7, #4] + 8029a98: 681b ldr r3, [r3, #0] + 8029a9a: 4a67 ldr r2, [pc, #412] ; (8029c38 ) + 8029a9c: 4293 cmp r3, r2 + 8029a9e: d009 beq.n 8029ab4 + 8029aa0: 687b ldr r3, [r7, #4] + 8029aa2: 681b ldr r3, [r3, #0] + 8029aa4: 4a65 ldr r2, [pc, #404] ; (8029c3c ) + 8029aa6: 4293 cmp r3, r2 + 8029aa8: d004 beq.n 8029ab4 + 8029aaa: 687b ldr r3, [r7, #4] + 8029aac: 681b ldr r3, [r3, #0] + 8029aae: 4a64 ldr r2, [pc, #400] ; (8029c40 ) + 8029ab0: 4293 cmp r3, r2 + 8029ab2: d108 bne.n 8029ac6 + 8029ab4: 687b ldr r3, [r7, #4] + 8029ab6: 681b ldr r3, [r3, #0] + 8029ab8: 681a ldr r2, [r3, #0] + 8029aba: 687b ldr r3, [r7, #4] + 8029abc: 681b ldr r3, [r3, #0] + 8029abe: f022 0201 bic.w r2, r2, #1 + 8029ac2: 601a str r2, [r3, #0] + 8029ac4: e007 b.n 8029ad6 + 8029ac6: 687b ldr r3, [r7, #4] + 8029ac8: 681b ldr r3, [r3, #0] + 8029aca: 681a ldr r2, [r3, #0] + 8029acc: 687b ldr r3, [r7, #4] + 8029ace: 681b ldr r3, [r3, #0] + 8029ad0: f022 0201 bic.w r2, r2, #1 + 8029ad4: 601a str r2, [r3, #0] do { if (++count > timeout) - 8029a52: 68fb ldr r3, [r7, #12] - 8029a54: 3301 adds r3, #1 - 8029a56: 60fb str r3, [r7, #12] - 8029a58: 6a7a ldr r2, [r7, #36] ; 0x24 - 8029a5a: 429a cmp r2, r3 - 8029a5c: d307 bcc.n 8029a6e + 8029ad6: 68fb ldr r3, [r7, #12] + 8029ad8: 3301 adds r3, #1 + 8029ada: 60fb str r3, [r7, #12] + 8029adc: 6a7a ldr r2, [r7, #36] ; 0x24 + 8029ade: 429a cmp r2, r3 + 8029ae0: d307 bcc.n 8029af2 { break; } } while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U); - 8029a5e: 687b ldr r3, [r7, #4] - 8029a60: 681b ldr r3, [r3, #0] - 8029a62: 681b ldr r3, [r3, #0] - 8029a64: f003 0301 and.w r3, r3, #1 - 8029a68: 2b00 cmp r3, #0 - 8029a6a: d1f2 bne.n 8029a52 - 8029a6c: e000 b.n 8029a70 + 8029ae2: 687b ldr r3, [r7, #4] + 8029ae4: 681b ldr r3, [r3, #0] + 8029ae6: 681b ldr r3, [r3, #0] + 8029ae8: f003 0301 and.w r3, r3, #1 + 8029aec: 2b00 cmp r3, #0 + 8029aee: d1f2 bne.n 8029ad6 + 8029af0: e000 b.n 8029af4 break; - 8029a6e: bf00 nop + 8029af2: bf00 nop if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U) - 8029a70: 687b ldr r3, [r7, #4] - 8029a72: 681b ldr r3, [r3, #0] - 8029a74: 681b ldr r3, [r3, #0] - 8029a76: f003 0301 and.w r3, r3, #1 - 8029a7a: 2b00 cmp r3, #0 - 8029a7c: d004 beq.n 8029a88 + 8029af4: 687b ldr r3, [r7, #4] + 8029af6: 681b ldr r3, [r3, #0] + 8029af8: 681b ldr r3, [r3, #0] + 8029afa: f003 0301 and.w r3, r3, #1 + 8029afe: 2b00 cmp r3, #0 + 8029b00: d004 beq.n 8029b0c { /* Change the DMA state to error if DMA disable fails */ hdma->State = HAL_DMA_STATE_ERROR; - 8029a7e: 687b ldr r3, [r7, #4] - 8029a80: 2203 movs r2, #3 - 8029a82: f883 2035 strb.w r2, [r3, #53] ; 0x35 - 8029a86: e003 b.n 8029a90 + 8029b02: 687b ldr r3, [r7, #4] + 8029b04: 2203 movs r2, #3 + 8029b06: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029b0a: e003 b.n 8029b14 } else { /* Change the DMA state to Ready if DMA disable success */ hdma->State = HAL_DMA_STATE_READY; - 8029a88: 687b ldr r3, [r7, #4] - 8029a8a: 2201 movs r2, #1 - 8029a8c: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029b0c: 687b ldr r3, [r7, #4] + 8029b0e: 2201 movs r2, #1 + 8029b10: f883 2035 strb.w r2, [r3, #53] ; 0x35 } /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029a90: 687b ldr r3, [r7, #4] - 8029a92: 2200 movs r2, #0 - 8029a94: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8029b14: 687b ldr r3, [r7, #4] + 8029b16: 2200 movs r2, #0 + 8029b18: f883 2034 strb.w r2, [r3, #52] ; 0x34 } if(hdma->XferErrorCallback != NULL) - 8029a98: 687b ldr r3, [r7, #4] - 8029a9a: 6cdb ldr r3, [r3, #76] ; 0x4c - 8029a9c: 2b00 cmp r3, #0 - 8029a9e: f000 8272 beq.w 8029f86 + 8029b1c: 687b ldr r3, [r7, #4] + 8029b1e: 6cdb ldr r3, [r3, #76] ; 0x4c + 8029b20: 2b00 cmp r3, #0 + 8029b22: f000 8272 beq.w 802a00a { /* Transfer error callback */ hdma->XferErrorCallback(hdma); - 8029aa2: 687b ldr r3, [r7, #4] - 8029aa4: 6cdb ldr r3, [r3, #76] ; 0x4c - 8029aa6: 6878 ldr r0, [r7, #4] - 8029aa8: 4798 blx r3 - 8029aaa: e26c b.n 8029f86 + 8029b26: 687b ldr r3, [r7, #4] + 8029b28: 6cdb ldr r3, [r3, #76] ; 0x4c + 8029b2a: 6878 ldr r0, [r7, #4] + 8029b2c: 4798 blx r3 + 8029b2e: e26c b.n 802a00a } } } else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */ - 8029aac: 687b ldr r3, [r7, #4] - 8029aae: 681b ldr r3, [r3, #0] - 8029ab0: 4a43 ldr r2, [pc, #268] ; (8029bc0 ) - 8029ab2: 4293 cmp r3, r2 - 8029ab4: d022 beq.n 8029afc - 8029ab6: 687b ldr r3, [r7, #4] - 8029ab8: 681b ldr r3, [r3, #0] - 8029aba: 4a42 ldr r2, [pc, #264] ; (8029bc4 ) - 8029abc: 4293 cmp r3, r2 - 8029abe: d01d beq.n 8029afc - 8029ac0: 687b ldr r3, [r7, #4] - 8029ac2: 681b ldr r3, [r3, #0] - 8029ac4: 4a40 ldr r2, [pc, #256] ; (8029bc8 ) - 8029ac6: 4293 cmp r3, r2 - 8029ac8: d018 beq.n 8029afc - 8029aca: 687b ldr r3, [r7, #4] - 8029acc: 681b ldr r3, [r3, #0] - 8029ace: 4a3f ldr r2, [pc, #252] ; (8029bcc ) - 8029ad0: 4293 cmp r3, r2 - 8029ad2: d013 beq.n 8029afc - 8029ad4: 687b ldr r3, [r7, #4] - 8029ad6: 681b ldr r3, [r3, #0] - 8029ad8: 4a3d ldr r2, [pc, #244] ; (8029bd0 ) - 8029ada: 4293 cmp r3, r2 - 8029adc: d00e beq.n 8029afc - 8029ade: 687b ldr r3, [r7, #4] - 8029ae0: 681b ldr r3, [r3, #0] - 8029ae2: 4a3c ldr r2, [pc, #240] ; (8029bd4 ) - 8029ae4: 4293 cmp r3, r2 - 8029ae6: d009 beq.n 8029afc - 8029ae8: 687b ldr r3, [r7, #4] - 8029aea: 681b ldr r3, [r3, #0] - 8029aec: 4a3a ldr r2, [pc, #232] ; (8029bd8 ) - 8029aee: 4293 cmp r3, r2 - 8029af0: d004 beq.n 8029afc - 8029af2: 687b ldr r3, [r7, #4] - 8029af4: 681b ldr r3, [r3, #0] - 8029af6: 4a39 ldr r2, [pc, #228] ; (8029bdc ) - 8029af8: 4293 cmp r3, r2 - 8029afa: d101 bne.n 8029b00 - 8029afc: 2301 movs r3, #1 - 8029afe: e000 b.n 8029b02 - 8029b00: 2300 movs r3, #0 - 8029b02: 2b00 cmp r3, #0 - 8029b04: f000 823f beq.w 8029f86 + 8029b30: 687b ldr r3, [r7, #4] + 8029b32: 681b ldr r3, [r3, #0] + 8029b34: 4a43 ldr r2, [pc, #268] ; (8029c44 ) + 8029b36: 4293 cmp r3, r2 + 8029b38: d022 beq.n 8029b80 + 8029b3a: 687b ldr r3, [r7, #4] + 8029b3c: 681b ldr r3, [r3, #0] + 8029b3e: 4a42 ldr r2, [pc, #264] ; (8029c48 ) + 8029b40: 4293 cmp r3, r2 + 8029b42: d01d beq.n 8029b80 + 8029b44: 687b ldr r3, [r7, #4] + 8029b46: 681b ldr r3, [r3, #0] + 8029b48: 4a40 ldr r2, [pc, #256] ; (8029c4c ) + 8029b4a: 4293 cmp r3, r2 + 8029b4c: d018 beq.n 8029b80 + 8029b4e: 687b ldr r3, [r7, #4] + 8029b50: 681b ldr r3, [r3, #0] + 8029b52: 4a3f ldr r2, [pc, #252] ; (8029c50 ) + 8029b54: 4293 cmp r3, r2 + 8029b56: d013 beq.n 8029b80 + 8029b58: 687b ldr r3, [r7, #4] + 8029b5a: 681b ldr r3, [r3, #0] + 8029b5c: 4a3d ldr r2, [pc, #244] ; (8029c54 ) + 8029b5e: 4293 cmp r3, r2 + 8029b60: d00e beq.n 8029b80 + 8029b62: 687b ldr r3, [r7, #4] + 8029b64: 681b ldr r3, [r3, #0] + 8029b66: 4a3c ldr r2, [pc, #240] ; (8029c58 ) + 8029b68: 4293 cmp r3, r2 + 8029b6a: d009 beq.n 8029b80 + 8029b6c: 687b ldr r3, [r7, #4] + 8029b6e: 681b ldr r3, [r3, #0] + 8029b70: 4a3a ldr r2, [pc, #232] ; (8029c5c ) + 8029b72: 4293 cmp r3, r2 + 8029b74: d004 beq.n 8029b80 + 8029b76: 687b ldr r3, [r7, #4] + 8029b78: 681b ldr r3, [r3, #0] + 8029b7a: 4a39 ldr r2, [pc, #228] ; (8029c60 ) + 8029b7c: 4293 cmp r3, r2 + 8029b7e: d101 bne.n 8029b84 + 8029b80: 2301 movs r3, #1 + 8029b82: e000 b.n 8029b86 + 8029b84: 2300 movs r3, #0 + 8029b86: 2b00 cmp r3, #0 + 8029b88: f000 823f beq.w 802a00a { ccr_reg = (((BDMA_Channel_TypeDef *)hdma->Instance)->CCR); - 8029b08: 687b ldr r3, [r7, #4] - 8029b0a: 681b ldr r3, [r3, #0] - 8029b0c: 681b ldr r3, [r3, #0] - 8029b0e: 613b str r3, [r7, #16] + 8029b8c: 687b ldr r3, [r7, #4] + 8029b8e: 681b ldr r3, [r3, #0] + 8029b90: 681b ldr r3, [r3, #0] + 8029b92: 613b str r3, [r7, #16] /* Half Transfer Complete Interrupt management ******************************/ if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_HTIE) != 0U)) - 8029b10: 687b ldr r3, [r7, #4] - 8029b12: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029b14: f003 031f and.w r3, r3, #31 - 8029b18: 2204 movs r2, #4 - 8029b1a: 409a lsls r2, r3 - 8029b1c: 697b ldr r3, [r7, #20] - 8029b1e: 4013 ands r3, r2 - 8029b20: 2b00 cmp r3, #0 - 8029b22: f000 80cd beq.w 8029cc0 - 8029b26: 693b ldr r3, [r7, #16] - 8029b28: f003 0304 and.w r3, r3, #4 - 8029b2c: 2b00 cmp r3, #0 - 8029b2e: f000 80c7 beq.w 8029cc0 + 8029b94: 687b ldr r3, [r7, #4] + 8029b96: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029b98: f003 031f and.w r3, r3, #31 + 8029b9c: 2204 movs r2, #4 + 8029b9e: 409a lsls r2, r3 + 8029ba0: 697b ldr r3, [r7, #20] + 8029ba2: 4013 ands r3, r2 + 8029ba4: 2b00 cmp r3, #0 + 8029ba6: f000 80cd beq.w 8029d44 + 8029baa: 693b ldr r3, [r7, #16] + 8029bac: f003 0304 and.w r3, r3, #4 + 8029bb0: 2b00 cmp r3, #0 + 8029bb2: f000 80c7 beq.w 8029d44 { /* Clear the half transfer complete flag */ regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU)); - 8029b32: 687b ldr r3, [r7, #4] - 8029b34: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029b36: f003 031f and.w r3, r3, #31 - 8029b3a: 2204 movs r2, #4 - 8029b3c: 409a lsls r2, r3 - 8029b3e: 69fb ldr r3, [r7, #28] - 8029b40: 605a str r2, [r3, #4] + 8029bb6: 687b ldr r3, [r7, #4] + 8029bb8: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029bba: f003 031f and.w r3, r3, #31 + 8029bbe: 2204 movs r2, #4 + 8029bc0: 409a lsls r2, r3 + 8029bc2: 69fb ldr r3, [r7, #28] + 8029bc4: 605a str r2, [r3, #4] /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */ if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029b42: 693b ldr r3, [r7, #16] - 8029b44: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8029b48: 2b00 cmp r3, #0 - 8029b4a: d049 beq.n 8029be0 + 8029bc6: 693b ldr r3, [r7, #16] + 8029bc8: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 8029bcc: 2b00 cmp r3, #0 + 8029bce: d049 beq.n 8029c64 { /* Current memory buffer used is Memory 0 */ if((ccr_reg & BDMA_CCR_CT) == 0U) - 8029b4c: 693b ldr r3, [r7, #16] - 8029b4e: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8029b52: 2b00 cmp r3, #0 - 8029b54: d109 bne.n 8029b6a + 8029bd0: 693b ldr r3, [r7, #16] + 8029bd2: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8029bd6: 2b00 cmp r3, #0 + 8029bd8: d109 bne.n 8029bee { if(hdma->XferM1HalfCpltCallback != NULL) - 8029b56: 687b ldr r3, [r7, #4] - 8029b58: 6c9b ldr r3, [r3, #72] ; 0x48 - 8029b5a: 2b00 cmp r3, #0 - 8029b5c: f000 8210 beq.w 8029f80 + 8029bda: 687b ldr r3, [r7, #4] + 8029bdc: 6c9b ldr r3, [r3, #72] ; 0x48 + 8029bde: 2b00 cmp r3, #0 + 8029be0: f000 8210 beq.w 802a004 { /* Half transfer Callback for Memory 1 */ hdma->XferM1HalfCpltCallback(hdma); - 8029b60: 687b ldr r3, [r7, #4] - 8029b62: 6c9b ldr r3, [r3, #72] ; 0x48 - 8029b64: 6878 ldr r0, [r7, #4] - 8029b66: 4798 blx r3 + 8029be4: 687b ldr r3, [r7, #4] + 8029be6: 6c9b ldr r3, [r3, #72] ; 0x48 + 8029be8: 6878 ldr r0, [r7, #4] + 8029bea: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029b68: e20a b.n 8029f80 + 8029bec: e20a b.n 802a004 } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferHalfCpltCallback != NULL) - 8029b6a: 687b ldr r3, [r7, #4] - 8029b6c: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029b6e: 2b00 cmp r3, #0 - 8029b70: f000 8206 beq.w 8029f80 + 8029bee: 687b ldr r3, [r7, #4] + 8029bf0: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029bf2: 2b00 cmp r3, #0 + 8029bf4: f000 8206 beq.w 802a004 { /* Half transfer Callback for Memory 0 */ hdma->XferHalfCpltCallback(hdma); - 8029b74: 687b ldr r3, [r7, #4] - 8029b76: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029b78: 6878 ldr r0, [r7, #4] - 8029b7a: 4798 blx r3 + 8029bf8: 687b ldr r3, [r7, #4] + 8029bfa: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029bfc: 6878 ldr r0, [r7, #4] + 8029bfe: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029b7c: e200 b.n 8029f80 - 8029b7e: bf00 nop - 8029b80: 40020010 .word 0x40020010 - 8029b84: 40020028 .word 0x40020028 - 8029b88: 40020040 .word 0x40020040 - 8029b8c: 40020058 .word 0x40020058 - 8029b90: 40020070 .word 0x40020070 - 8029b94: 40020088 .word 0x40020088 - 8029b98: 400200a0 .word 0x400200a0 - 8029b9c: 400200b8 .word 0x400200b8 - 8029ba0: 40020410 .word 0x40020410 - 8029ba4: 40020428 .word 0x40020428 - 8029ba8: 40020440 .word 0x40020440 - 8029bac: 40020458 .word 0x40020458 - 8029bb0: 40020470 .word 0x40020470 - 8029bb4: 40020488 .word 0x40020488 - 8029bb8: 400204a0 .word 0x400204a0 - 8029bbc: 400204b8 .word 0x400204b8 - 8029bc0: 58025408 .word 0x58025408 - 8029bc4: 5802541c .word 0x5802541c - 8029bc8: 58025430 .word 0x58025430 - 8029bcc: 58025444 .word 0x58025444 - 8029bd0: 58025458 .word 0x58025458 - 8029bd4: 5802546c .word 0x5802546c - 8029bd8: 58025480 .word 0x58025480 - 8029bdc: 58025494 .word 0x58025494 + 8029c00: e200 b.n 802a004 + 8029c02: bf00 nop + 8029c04: 40020010 .word 0x40020010 + 8029c08: 40020028 .word 0x40020028 + 8029c0c: 40020040 .word 0x40020040 + 8029c10: 40020058 .word 0x40020058 + 8029c14: 40020070 .word 0x40020070 + 8029c18: 40020088 .word 0x40020088 + 8029c1c: 400200a0 .word 0x400200a0 + 8029c20: 400200b8 .word 0x400200b8 + 8029c24: 40020410 .word 0x40020410 + 8029c28: 40020428 .word 0x40020428 + 8029c2c: 40020440 .word 0x40020440 + 8029c30: 40020458 .word 0x40020458 + 8029c34: 40020470 .word 0x40020470 + 8029c38: 40020488 .word 0x40020488 + 8029c3c: 400204a0 .word 0x400204a0 + 8029c40: 400204b8 .word 0x400204b8 + 8029c44: 58025408 .word 0x58025408 + 8029c48: 5802541c .word 0x5802541c + 8029c4c: 58025430 .word 0x58025430 + 8029c50: 58025444 .word 0x58025444 + 8029c54: 58025458 .word 0x58025458 + 8029c58: 5802546c .word 0x5802546c + 8029c5c: 58025480 .word 0x58025480 + 8029c60: 58025494 .word 0x58025494 } } } else { if((ccr_reg & BDMA_CCR_CIRC) == 0U) - 8029be0: 693b ldr r3, [r7, #16] - 8029be2: f003 0320 and.w r3, r3, #32 - 8029be6: 2b00 cmp r3, #0 - 8029be8: d160 bne.n 8029cac + 8029c64: 693b ldr r3, [r7, #16] + 8029c66: f003 0320 and.w r3, r3, #32 + 8029c6a: 2b00 cmp r3, #0 + 8029c6c: d160 bne.n 8029d30 { /* Disable the half transfer interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 8029bea: 687b ldr r3, [r7, #4] - 8029bec: 681b ldr r3, [r3, #0] - 8029bee: 4a7f ldr r2, [pc, #508] ; (8029dec ) - 8029bf0: 4293 cmp r3, r2 - 8029bf2: d04a beq.n 8029c8a - 8029bf4: 687b ldr r3, [r7, #4] - 8029bf6: 681b ldr r3, [r3, #0] - 8029bf8: 4a7d ldr r2, [pc, #500] ; (8029df0 ) - 8029bfa: 4293 cmp r3, r2 - 8029bfc: d045 beq.n 8029c8a - 8029bfe: 687b ldr r3, [r7, #4] - 8029c00: 681b ldr r3, [r3, #0] - 8029c02: 4a7c ldr r2, [pc, #496] ; (8029df4 ) - 8029c04: 4293 cmp r3, r2 - 8029c06: d040 beq.n 8029c8a - 8029c08: 687b ldr r3, [r7, #4] - 8029c0a: 681b ldr r3, [r3, #0] - 8029c0c: 4a7a ldr r2, [pc, #488] ; (8029df8 ) - 8029c0e: 4293 cmp r3, r2 - 8029c10: d03b beq.n 8029c8a - 8029c12: 687b ldr r3, [r7, #4] - 8029c14: 681b ldr r3, [r3, #0] - 8029c16: 4a79 ldr r2, [pc, #484] ; (8029dfc ) - 8029c18: 4293 cmp r3, r2 - 8029c1a: d036 beq.n 8029c8a - 8029c1c: 687b ldr r3, [r7, #4] - 8029c1e: 681b ldr r3, [r3, #0] - 8029c20: 4a77 ldr r2, [pc, #476] ; (8029e00 ) - 8029c22: 4293 cmp r3, r2 - 8029c24: d031 beq.n 8029c8a - 8029c26: 687b ldr r3, [r7, #4] - 8029c28: 681b ldr r3, [r3, #0] - 8029c2a: 4a76 ldr r2, [pc, #472] ; (8029e04 ) - 8029c2c: 4293 cmp r3, r2 - 8029c2e: d02c beq.n 8029c8a - 8029c30: 687b ldr r3, [r7, #4] - 8029c32: 681b ldr r3, [r3, #0] - 8029c34: 4a74 ldr r2, [pc, #464] ; (8029e08 ) - 8029c36: 4293 cmp r3, r2 - 8029c38: d027 beq.n 8029c8a - 8029c3a: 687b ldr r3, [r7, #4] - 8029c3c: 681b ldr r3, [r3, #0] - 8029c3e: 4a73 ldr r2, [pc, #460] ; (8029e0c ) - 8029c40: 4293 cmp r3, r2 - 8029c42: d022 beq.n 8029c8a - 8029c44: 687b ldr r3, [r7, #4] - 8029c46: 681b ldr r3, [r3, #0] - 8029c48: 4a71 ldr r2, [pc, #452] ; (8029e10 ) - 8029c4a: 4293 cmp r3, r2 - 8029c4c: d01d beq.n 8029c8a - 8029c4e: 687b ldr r3, [r7, #4] - 8029c50: 681b ldr r3, [r3, #0] - 8029c52: 4a70 ldr r2, [pc, #448] ; (8029e14 ) - 8029c54: 4293 cmp r3, r2 - 8029c56: d018 beq.n 8029c8a - 8029c58: 687b ldr r3, [r7, #4] - 8029c5a: 681b ldr r3, [r3, #0] - 8029c5c: 4a6e ldr r2, [pc, #440] ; (8029e18 ) - 8029c5e: 4293 cmp r3, r2 - 8029c60: d013 beq.n 8029c8a - 8029c62: 687b ldr r3, [r7, #4] - 8029c64: 681b ldr r3, [r3, #0] - 8029c66: 4a6d ldr r2, [pc, #436] ; (8029e1c ) - 8029c68: 4293 cmp r3, r2 - 8029c6a: d00e beq.n 8029c8a - 8029c6c: 687b ldr r3, [r7, #4] - 8029c6e: 681b ldr r3, [r3, #0] - 8029c70: 4a6b ldr r2, [pc, #428] ; (8029e20 ) - 8029c72: 4293 cmp r3, r2 - 8029c74: d009 beq.n 8029c8a - 8029c76: 687b ldr r3, [r7, #4] - 8029c78: 681b ldr r3, [r3, #0] - 8029c7a: 4a6a ldr r2, [pc, #424] ; (8029e24 ) - 8029c7c: 4293 cmp r3, r2 - 8029c7e: d004 beq.n 8029c8a - 8029c80: 687b ldr r3, [r7, #4] - 8029c82: 681b ldr r3, [r3, #0] - 8029c84: 4a68 ldr r2, [pc, #416] ; (8029e28 ) - 8029c86: 4293 cmp r3, r2 - 8029c88: d108 bne.n 8029c9c - 8029c8a: 687b ldr r3, [r7, #4] - 8029c8c: 681b ldr r3, [r3, #0] - 8029c8e: 681a ldr r2, [r3, #0] - 8029c90: 687b ldr r3, [r7, #4] - 8029c92: 681b ldr r3, [r3, #0] - 8029c94: f022 0208 bic.w r2, r2, #8 - 8029c98: 601a str r2, [r3, #0] - 8029c9a: e007 b.n 8029cac - 8029c9c: 687b ldr r3, [r7, #4] - 8029c9e: 681b ldr r3, [r3, #0] - 8029ca0: 681a ldr r2, [r3, #0] - 8029ca2: 687b ldr r3, [r7, #4] - 8029ca4: 681b ldr r3, [r3, #0] - 8029ca6: f022 0204 bic.w r2, r2, #4 - 8029caa: 601a str r2, [r3, #0] + 8029c6e: 687b ldr r3, [r7, #4] + 8029c70: 681b ldr r3, [r3, #0] + 8029c72: 4a7f ldr r2, [pc, #508] ; (8029e70 ) + 8029c74: 4293 cmp r3, r2 + 8029c76: d04a beq.n 8029d0e + 8029c78: 687b ldr r3, [r7, #4] + 8029c7a: 681b ldr r3, [r3, #0] + 8029c7c: 4a7d ldr r2, [pc, #500] ; (8029e74 ) + 8029c7e: 4293 cmp r3, r2 + 8029c80: d045 beq.n 8029d0e + 8029c82: 687b ldr r3, [r7, #4] + 8029c84: 681b ldr r3, [r3, #0] + 8029c86: 4a7c ldr r2, [pc, #496] ; (8029e78 ) + 8029c88: 4293 cmp r3, r2 + 8029c8a: d040 beq.n 8029d0e + 8029c8c: 687b ldr r3, [r7, #4] + 8029c8e: 681b ldr r3, [r3, #0] + 8029c90: 4a7a ldr r2, [pc, #488] ; (8029e7c ) + 8029c92: 4293 cmp r3, r2 + 8029c94: d03b beq.n 8029d0e + 8029c96: 687b ldr r3, [r7, #4] + 8029c98: 681b ldr r3, [r3, #0] + 8029c9a: 4a79 ldr r2, [pc, #484] ; (8029e80 ) + 8029c9c: 4293 cmp r3, r2 + 8029c9e: d036 beq.n 8029d0e + 8029ca0: 687b ldr r3, [r7, #4] + 8029ca2: 681b ldr r3, [r3, #0] + 8029ca4: 4a77 ldr r2, [pc, #476] ; (8029e84 ) + 8029ca6: 4293 cmp r3, r2 + 8029ca8: d031 beq.n 8029d0e + 8029caa: 687b ldr r3, [r7, #4] + 8029cac: 681b ldr r3, [r3, #0] + 8029cae: 4a76 ldr r2, [pc, #472] ; (8029e88 ) + 8029cb0: 4293 cmp r3, r2 + 8029cb2: d02c beq.n 8029d0e + 8029cb4: 687b ldr r3, [r7, #4] + 8029cb6: 681b ldr r3, [r3, #0] + 8029cb8: 4a74 ldr r2, [pc, #464] ; (8029e8c ) + 8029cba: 4293 cmp r3, r2 + 8029cbc: d027 beq.n 8029d0e + 8029cbe: 687b ldr r3, [r7, #4] + 8029cc0: 681b ldr r3, [r3, #0] + 8029cc2: 4a73 ldr r2, [pc, #460] ; (8029e90 ) + 8029cc4: 4293 cmp r3, r2 + 8029cc6: d022 beq.n 8029d0e + 8029cc8: 687b ldr r3, [r7, #4] + 8029cca: 681b ldr r3, [r3, #0] + 8029ccc: 4a71 ldr r2, [pc, #452] ; (8029e94 ) + 8029cce: 4293 cmp r3, r2 + 8029cd0: d01d beq.n 8029d0e + 8029cd2: 687b ldr r3, [r7, #4] + 8029cd4: 681b ldr r3, [r3, #0] + 8029cd6: 4a70 ldr r2, [pc, #448] ; (8029e98 ) + 8029cd8: 4293 cmp r3, r2 + 8029cda: d018 beq.n 8029d0e + 8029cdc: 687b ldr r3, [r7, #4] + 8029cde: 681b ldr r3, [r3, #0] + 8029ce0: 4a6e ldr r2, [pc, #440] ; (8029e9c ) + 8029ce2: 4293 cmp r3, r2 + 8029ce4: d013 beq.n 8029d0e + 8029ce6: 687b ldr r3, [r7, #4] + 8029ce8: 681b ldr r3, [r3, #0] + 8029cea: 4a6d ldr r2, [pc, #436] ; (8029ea0 ) + 8029cec: 4293 cmp r3, r2 + 8029cee: d00e beq.n 8029d0e + 8029cf0: 687b ldr r3, [r7, #4] + 8029cf2: 681b ldr r3, [r3, #0] + 8029cf4: 4a6b ldr r2, [pc, #428] ; (8029ea4 ) + 8029cf6: 4293 cmp r3, r2 + 8029cf8: d009 beq.n 8029d0e + 8029cfa: 687b ldr r3, [r7, #4] + 8029cfc: 681b ldr r3, [r3, #0] + 8029cfe: 4a6a ldr r2, [pc, #424] ; (8029ea8 ) + 8029d00: 4293 cmp r3, r2 + 8029d02: d004 beq.n 8029d0e + 8029d04: 687b ldr r3, [r7, #4] + 8029d06: 681b ldr r3, [r3, #0] + 8029d08: 4a68 ldr r2, [pc, #416] ; (8029eac ) + 8029d0a: 4293 cmp r3, r2 + 8029d0c: d108 bne.n 8029d20 + 8029d0e: 687b ldr r3, [r7, #4] + 8029d10: 681b ldr r3, [r3, #0] + 8029d12: 681a ldr r2, [r3, #0] + 8029d14: 687b ldr r3, [r7, #4] + 8029d16: 681b ldr r3, [r3, #0] + 8029d18: f022 0208 bic.w r2, r2, #8 + 8029d1c: 601a str r2, [r3, #0] + 8029d1e: e007 b.n 8029d30 + 8029d20: 687b ldr r3, [r7, #4] + 8029d22: 681b ldr r3, [r3, #0] + 8029d24: 681a ldr r2, [r3, #0] + 8029d26: 687b ldr r3, [r7, #4] + 8029d28: 681b ldr r3, [r3, #0] + 8029d2a: f022 0204 bic.w r2, r2, #4 + 8029d2e: 601a str r2, [r3, #0] } /* DMA peripheral state is not updated in Half Transfer */ /* but in Transfer Complete case */ if(hdma->XferHalfCpltCallback != NULL) - 8029cac: 687b ldr r3, [r7, #4] - 8029cae: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029cb0: 2b00 cmp r3, #0 - 8029cb2: f000 8165 beq.w 8029f80 + 8029d30: 687b ldr r3, [r7, #4] + 8029d32: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029d34: 2b00 cmp r3, #0 + 8029d36: f000 8165 beq.w 802a004 { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); - 8029cb6: 687b ldr r3, [r7, #4] - 8029cb8: 6c1b ldr r3, [r3, #64] ; 0x40 - 8029cba: 6878 ldr r0, [r7, #4] - 8029cbc: 4798 blx r3 + 8029d3a: 687b ldr r3, [r7, #4] + 8029d3c: 6c1b ldr r3, [r3, #64] ; 0x40 + 8029d3e: 6878 ldr r0, [r7, #4] + 8029d40: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029cbe: e15f b.n 8029f80 + 8029d42: e15f b.n 802a004 } } } /* Transfer Complete Interrupt management ***********************************/ else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TCIE) != 0U)) - 8029cc0: 687b ldr r3, [r7, #4] - 8029cc2: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029cc4: f003 031f and.w r3, r3, #31 - 8029cc8: 2202 movs r2, #2 - 8029cca: 409a lsls r2, r3 - 8029ccc: 697b ldr r3, [r7, #20] - 8029cce: 4013 ands r3, r2 - 8029cd0: 2b00 cmp r3, #0 - 8029cd2: f000 80c5 beq.w 8029e60 - 8029cd6: 693b ldr r3, [r7, #16] - 8029cd8: f003 0302 and.w r3, r3, #2 - 8029cdc: 2b00 cmp r3, #0 - 8029cde: f000 80bf beq.w 8029e60 + 8029d44: 687b ldr r3, [r7, #4] + 8029d46: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029d48: f003 031f and.w r3, r3, #31 + 8029d4c: 2202 movs r2, #2 + 8029d4e: 409a lsls r2, r3 + 8029d50: 697b ldr r3, [r7, #20] + 8029d52: 4013 ands r3, r2 + 8029d54: 2b00 cmp r3, #0 + 8029d56: f000 80c5 beq.w 8029ee4 + 8029d5a: 693b ldr r3, [r7, #16] + 8029d5c: f003 0302 and.w r3, r3, #2 + 8029d60: 2b00 cmp r3, #0 + 8029d62: f000 80bf beq.w 8029ee4 { /* Clear the transfer complete flag */ regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU); - 8029ce2: 687b ldr r3, [r7, #4] - 8029ce4: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029ce6: f003 031f and.w r3, r3, #31 - 8029cea: 2202 movs r2, #2 - 8029cec: 409a lsls r2, r3 - 8029cee: 69fb ldr r3, [r7, #28] - 8029cf0: 605a str r2, [r3, #4] + 8029d66: 687b ldr r3, [r7, #4] + 8029d68: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029d6a: f003 031f and.w r3, r3, #31 + 8029d6e: 2202 movs r2, #2 + 8029d70: 409a lsls r2, r3 + 8029d72: 69fb ldr r3, [r7, #28] + 8029d74: 605a str r2, [r3, #4] /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */ if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029cf2: 693b ldr r3, [r7, #16] - 8029cf4: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8029cf8: 2b00 cmp r3, #0 - 8029cfa: d018 beq.n 8029d2e + 8029d76: 693b ldr r3, [r7, #16] + 8029d78: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 8029d7c: 2b00 cmp r3, #0 + 8029d7e: d018 beq.n 8029db2 { /* Current memory buffer used is Memory 0 */ if((ccr_reg & BDMA_CCR_CT) == 0U) - 8029cfc: 693b ldr r3, [r7, #16] - 8029cfe: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8029d02: 2b00 cmp r3, #0 - 8029d04: d109 bne.n 8029d1a + 8029d80: 693b ldr r3, [r7, #16] + 8029d82: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8029d86: 2b00 cmp r3, #0 + 8029d88: d109 bne.n 8029d9e { if(hdma->XferM1CpltCallback != NULL) - 8029d06: 687b ldr r3, [r7, #4] - 8029d08: 6c5b ldr r3, [r3, #68] ; 0x44 - 8029d0a: 2b00 cmp r3, #0 - 8029d0c: f000 813a beq.w 8029f84 + 8029d8a: 687b ldr r3, [r7, #4] + 8029d8c: 6c5b ldr r3, [r3, #68] ; 0x44 + 8029d8e: 2b00 cmp r3, #0 + 8029d90: f000 813a beq.w 802a008 { /* Transfer complete Callback for Memory 1 */ hdma->XferM1CpltCallback(hdma); - 8029d10: 687b ldr r3, [r7, #4] - 8029d12: 6c5b ldr r3, [r3, #68] ; 0x44 - 8029d14: 6878 ldr r0, [r7, #4] - 8029d16: 4798 blx r3 + 8029d94: 687b ldr r3, [r7, #4] + 8029d96: 6c5b ldr r3, [r3, #68] ; 0x44 + 8029d98: 6878 ldr r0, [r7, #4] + 8029d9a: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029d18: e134 b.n 8029f84 + 8029d9c: e134 b.n 802a008 } } /* Current memory buffer used is Memory 1 */ else { if(hdma->XferCpltCallback != NULL) - 8029d1a: 687b ldr r3, [r7, #4] - 8029d1c: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029d1e: 2b00 cmp r3, #0 - 8029d20: f000 8130 beq.w 8029f84 + 8029d9e: 687b ldr r3, [r7, #4] + 8029da0: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029da2: 2b00 cmp r3, #0 + 8029da4: f000 8130 beq.w 802a008 { /* Transfer complete Callback for Memory 0 */ hdma->XferCpltCallback(hdma); - 8029d24: 687b ldr r3, [r7, #4] - 8029d26: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029d28: 6878 ldr r0, [r7, #4] - 8029d2a: 4798 blx r3 + 8029da8: 687b ldr r3, [r7, #4] + 8029daa: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029dac: 6878 ldr r0, [r7, #4] + 8029dae: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029d2c: e12a b.n 8029f84 + 8029db0: e12a b.n 802a008 } } } else { if((ccr_reg & BDMA_CCR_CIRC) == 0U) - 8029d2e: 693b ldr r3, [r7, #16] - 8029d30: f003 0320 and.w r3, r3, #32 - 8029d34: 2b00 cmp r3, #0 - 8029d36: f040 8089 bne.w 8029e4c + 8029db2: 693b ldr r3, [r7, #16] + 8029db4: f003 0320 and.w r3, r3, #32 + 8029db8: 2b00 cmp r3, #0 + 8029dba: f040 8089 bne.w 8029ed0 { /* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); - 8029d3a: 687b ldr r3, [r7, #4] - 8029d3c: 681b ldr r3, [r3, #0] - 8029d3e: 4a2b ldr r2, [pc, #172] ; (8029dec ) - 8029d40: 4293 cmp r3, r2 - 8029d42: d04a beq.n 8029dda - 8029d44: 687b ldr r3, [r7, #4] - 8029d46: 681b ldr r3, [r3, #0] - 8029d48: 4a29 ldr r2, [pc, #164] ; (8029df0 ) - 8029d4a: 4293 cmp r3, r2 - 8029d4c: d045 beq.n 8029dda - 8029d4e: 687b ldr r3, [r7, #4] - 8029d50: 681b ldr r3, [r3, #0] - 8029d52: 4a28 ldr r2, [pc, #160] ; (8029df4 ) - 8029d54: 4293 cmp r3, r2 - 8029d56: d040 beq.n 8029dda - 8029d58: 687b ldr r3, [r7, #4] - 8029d5a: 681b ldr r3, [r3, #0] - 8029d5c: 4a26 ldr r2, [pc, #152] ; (8029df8 ) - 8029d5e: 4293 cmp r3, r2 - 8029d60: d03b beq.n 8029dda - 8029d62: 687b ldr r3, [r7, #4] - 8029d64: 681b ldr r3, [r3, #0] - 8029d66: 4a25 ldr r2, [pc, #148] ; (8029dfc ) - 8029d68: 4293 cmp r3, r2 - 8029d6a: d036 beq.n 8029dda - 8029d6c: 687b ldr r3, [r7, #4] - 8029d6e: 681b ldr r3, [r3, #0] - 8029d70: 4a23 ldr r2, [pc, #140] ; (8029e00 ) - 8029d72: 4293 cmp r3, r2 - 8029d74: d031 beq.n 8029dda - 8029d76: 687b ldr r3, [r7, #4] - 8029d78: 681b ldr r3, [r3, #0] - 8029d7a: 4a22 ldr r2, [pc, #136] ; (8029e04 ) - 8029d7c: 4293 cmp r3, r2 - 8029d7e: d02c beq.n 8029dda - 8029d80: 687b ldr r3, [r7, #4] - 8029d82: 681b ldr r3, [r3, #0] - 8029d84: 4a20 ldr r2, [pc, #128] ; (8029e08 ) - 8029d86: 4293 cmp r3, r2 - 8029d88: d027 beq.n 8029dda - 8029d8a: 687b ldr r3, [r7, #4] - 8029d8c: 681b ldr r3, [r3, #0] - 8029d8e: 4a1f ldr r2, [pc, #124] ; (8029e0c ) - 8029d90: 4293 cmp r3, r2 - 8029d92: d022 beq.n 8029dda - 8029d94: 687b ldr r3, [r7, #4] - 8029d96: 681b ldr r3, [r3, #0] - 8029d98: 4a1d ldr r2, [pc, #116] ; (8029e10 ) - 8029d9a: 4293 cmp r3, r2 - 8029d9c: d01d beq.n 8029dda - 8029d9e: 687b ldr r3, [r7, #4] - 8029da0: 681b ldr r3, [r3, #0] - 8029da2: 4a1c ldr r2, [pc, #112] ; (8029e14 ) - 8029da4: 4293 cmp r3, r2 - 8029da6: d018 beq.n 8029dda - 8029da8: 687b ldr r3, [r7, #4] - 8029daa: 681b ldr r3, [r3, #0] - 8029dac: 4a1a ldr r2, [pc, #104] ; (8029e18 ) - 8029dae: 4293 cmp r3, r2 - 8029db0: d013 beq.n 8029dda - 8029db2: 687b ldr r3, [r7, #4] - 8029db4: 681b ldr r3, [r3, #0] - 8029db6: 4a19 ldr r2, [pc, #100] ; (8029e1c ) - 8029db8: 4293 cmp r3, r2 - 8029dba: d00e beq.n 8029dda - 8029dbc: 687b ldr r3, [r7, #4] - 8029dbe: 681b ldr r3, [r3, #0] - 8029dc0: 4a17 ldr r2, [pc, #92] ; (8029e20 ) - 8029dc2: 4293 cmp r3, r2 - 8029dc4: d009 beq.n 8029dda - 8029dc6: 687b ldr r3, [r7, #4] - 8029dc8: 681b ldr r3, [r3, #0] - 8029dca: 4a16 ldr r2, [pc, #88] ; (8029e24 ) - 8029dcc: 4293 cmp r3, r2 - 8029dce: d004 beq.n 8029dda - 8029dd0: 687b ldr r3, [r7, #4] - 8029dd2: 681b ldr r3, [r3, #0] - 8029dd4: 4a14 ldr r2, [pc, #80] ; (8029e28 ) - 8029dd6: 4293 cmp r3, r2 - 8029dd8: d128 bne.n 8029e2c - 8029dda: 687b ldr r3, [r7, #4] - 8029ddc: 681b ldr r3, [r3, #0] - 8029dde: 681a ldr r2, [r3, #0] - 8029de0: 687b ldr r3, [r7, #4] - 8029de2: 681b ldr r3, [r3, #0] - 8029de4: f022 0214 bic.w r2, r2, #20 - 8029de8: 601a str r2, [r3, #0] - 8029dea: e027 b.n 8029e3c - 8029dec: 40020010 .word 0x40020010 - 8029df0: 40020028 .word 0x40020028 - 8029df4: 40020040 .word 0x40020040 - 8029df8: 40020058 .word 0x40020058 - 8029dfc: 40020070 .word 0x40020070 - 8029e00: 40020088 .word 0x40020088 - 8029e04: 400200a0 .word 0x400200a0 - 8029e08: 400200b8 .word 0x400200b8 - 8029e0c: 40020410 .word 0x40020410 - 8029e10: 40020428 .word 0x40020428 - 8029e14: 40020440 .word 0x40020440 - 8029e18: 40020458 .word 0x40020458 - 8029e1c: 40020470 .word 0x40020470 - 8029e20: 40020488 .word 0x40020488 - 8029e24: 400204a0 .word 0x400204a0 - 8029e28: 400204b8 .word 0x400204b8 + 8029dbe: 687b ldr r3, [r7, #4] + 8029dc0: 681b ldr r3, [r3, #0] + 8029dc2: 4a2b ldr r2, [pc, #172] ; (8029e70 ) + 8029dc4: 4293 cmp r3, r2 + 8029dc6: d04a beq.n 8029e5e + 8029dc8: 687b ldr r3, [r7, #4] + 8029dca: 681b ldr r3, [r3, #0] + 8029dcc: 4a29 ldr r2, [pc, #164] ; (8029e74 ) + 8029dce: 4293 cmp r3, r2 + 8029dd0: d045 beq.n 8029e5e + 8029dd2: 687b ldr r3, [r7, #4] + 8029dd4: 681b ldr r3, [r3, #0] + 8029dd6: 4a28 ldr r2, [pc, #160] ; (8029e78 ) + 8029dd8: 4293 cmp r3, r2 + 8029dda: d040 beq.n 8029e5e + 8029ddc: 687b ldr r3, [r7, #4] + 8029dde: 681b ldr r3, [r3, #0] + 8029de0: 4a26 ldr r2, [pc, #152] ; (8029e7c ) + 8029de2: 4293 cmp r3, r2 + 8029de4: d03b beq.n 8029e5e + 8029de6: 687b ldr r3, [r7, #4] + 8029de8: 681b ldr r3, [r3, #0] + 8029dea: 4a25 ldr r2, [pc, #148] ; (8029e80 ) + 8029dec: 4293 cmp r3, r2 + 8029dee: d036 beq.n 8029e5e + 8029df0: 687b ldr r3, [r7, #4] + 8029df2: 681b ldr r3, [r3, #0] + 8029df4: 4a23 ldr r2, [pc, #140] ; (8029e84 ) + 8029df6: 4293 cmp r3, r2 + 8029df8: d031 beq.n 8029e5e + 8029dfa: 687b ldr r3, [r7, #4] + 8029dfc: 681b ldr r3, [r3, #0] + 8029dfe: 4a22 ldr r2, [pc, #136] ; (8029e88 ) + 8029e00: 4293 cmp r3, r2 + 8029e02: d02c beq.n 8029e5e + 8029e04: 687b ldr r3, [r7, #4] + 8029e06: 681b ldr r3, [r3, #0] + 8029e08: 4a20 ldr r2, [pc, #128] ; (8029e8c ) + 8029e0a: 4293 cmp r3, r2 + 8029e0c: d027 beq.n 8029e5e + 8029e0e: 687b ldr r3, [r7, #4] + 8029e10: 681b ldr r3, [r3, #0] + 8029e12: 4a1f ldr r2, [pc, #124] ; (8029e90 ) + 8029e14: 4293 cmp r3, r2 + 8029e16: d022 beq.n 8029e5e + 8029e18: 687b ldr r3, [r7, #4] + 8029e1a: 681b ldr r3, [r3, #0] + 8029e1c: 4a1d ldr r2, [pc, #116] ; (8029e94 ) + 8029e1e: 4293 cmp r3, r2 + 8029e20: d01d beq.n 8029e5e + 8029e22: 687b ldr r3, [r7, #4] + 8029e24: 681b ldr r3, [r3, #0] + 8029e26: 4a1c ldr r2, [pc, #112] ; (8029e98 ) + 8029e28: 4293 cmp r3, r2 + 8029e2a: d018 beq.n 8029e5e 8029e2c: 687b ldr r3, [r7, #4] 8029e2e: 681b ldr r3, [r3, #0] - 8029e30: 681a ldr r2, [r3, #0] - 8029e32: 687b ldr r3, [r7, #4] - 8029e34: 681b ldr r3, [r3, #0] - 8029e36: f022 020a bic.w r2, r2, #10 - 8029e3a: 601a str r2, [r3, #0] + 8029e30: 4a1a ldr r2, [pc, #104] ; (8029e9c ) + 8029e32: 4293 cmp r3, r2 + 8029e34: d013 beq.n 8029e5e + 8029e36: 687b ldr r3, [r7, #4] + 8029e38: 681b ldr r3, [r3, #0] + 8029e3a: 4a19 ldr r2, [pc, #100] ; (8029ea0 ) + 8029e3c: 4293 cmp r3, r2 + 8029e3e: d00e beq.n 8029e5e + 8029e40: 687b ldr r3, [r7, #4] + 8029e42: 681b ldr r3, [r3, #0] + 8029e44: 4a17 ldr r2, [pc, #92] ; (8029ea4 ) + 8029e46: 4293 cmp r3, r2 + 8029e48: d009 beq.n 8029e5e + 8029e4a: 687b ldr r3, [r7, #4] + 8029e4c: 681b ldr r3, [r3, #0] + 8029e4e: 4a16 ldr r2, [pc, #88] ; (8029ea8 ) + 8029e50: 4293 cmp r3, r2 + 8029e52: d004 beq.n 8029e5e + 8029e54: 687b ldr r3, [r7, #4] + 8029e56: 681b ldr r3, [r3, #0] + 8029e58: 4a14 ldr r2, [pc, #80] ; (8029eac ) + 8029e5a: 4293 cmp r3, r2 + 8029e5c: d128 bne.n 8029eb0 + 8029e5e: 687b ldr r3, [r7, #4] + 8029e60: 681b ldr r3, [r3, #0] + 8029e62: 681a ldr r2, [r3, #0] + 8029e64: 687b ldr r3, [r7, #4] + 8029e66: 681b ldr r3, [r3, #0] + 8029e68: f022 0214 bic.w r2, r2, #20 + 8029e6c: 601a str r2, [r3, #0] + 8029e6e: e027 b.n 8029ec0 + 8029e70: 40020010 .word 0x40020010 + 8029e74: 40020028 .word 0x40020028 + 8029e78: 40020040 .word 0x40020040 + 8029e7c: 40020058 .word 0x40020058 + 8029e80: 40020070 .word 0x40020070 + 8029e84: 40020088 .word 0x40020088 + 8029e88: 400200a0 .word 0x400200a0 + 8029e8c: 400200b8 .word 0x400200b8 + 8029e90: 40020410 .word 0x40020410 + 8029e94: 40020428 .word 0x40020428 + 8029e98: 40020440 .word 0x40020440 + 8029e9c: 40020458 .word 0x40020458 + 8029ea0: 40020470 .word 0x40020470 + 8029ea4: 40020488 .word 0x40020488 + 8029ea8: 400204a0 .word 0x400204a0 + 8029eac: 400204b8 .word 0x400204b8 + 8029eb0: 687b ldr r3, [r7, #4] + 8029eb2: 681b ldr r3, [r3, #0] + 8029eb4: 681a ldr r2, [r3, #0] + 8029eb6: 687b ldr r3, [r7, #4] + 8029eb8: 681b ldr r3, [r3, #0] + 8029eba: f022 020a bic.w r2, r2, #10 + 8029ebe: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8029e3c: 687b ldr r3, [r7, #4] - 8029e3e: 2201 movs r2, #1 - 8029e40: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029ec0: 687b ldr r3, [r7, #4] + 8029ec2: 2201 movs r2, #1 + 8029ec4: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029e44: 687b ldr r3, [r7, #4] - 8029e46: 2200 movs r2, #0 - 8029e48: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8029ec8: 687b ldr r3, [r7, #4] + 8029eca: 2200 movs r2, #0 + 8029ecc: f883 2034 strb.w r2, [r3, #52] ; 0x34 } if(hdma->XferCpltCallback != NULL) - 8029e4c: 687b ldr r3, [r7, #4] - 8029e4e: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029e50: 2b00 cmp r3, #0 - 8029e52: f000 8097 beq.w 8029f84 + 8029ed0: 687b ldr r3, [r7, #4] + 8029ed2: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029ed4: 2b00 cmp r3, #0 + 8029ed6: f000 8097 beq.w 802a008 { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); - 8029e56: 687b ldr r3, [r7, #4] - 8029e58: 6bdb ldr r3, [r3, #60] ; 0x3c - 8029e5a: 6878 ldr r0, [r7, #4] - 8029e5c: 4798 blx r3 + 8029eda: 687b ldr r3, [r7, #4] + 8029edc: 6bdb ldr r3, [r3, #60] ; 0x3c + 8029ede: 6878 ldr r0, [r7, #4] + 8029ee0: 4798 blx r3 if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029e5e: e091 b.n 8029f84 + 8029ee2: e091 b.n 802a008 } } } /* Transfer Error Interrupt management **************************************/ else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TEIE) != 0U)) - 8029e60: 687b ldr r3, [r7, #4] - 8029e62: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029e64: f003 031f and.w r3, r3, #31 - 8029e68: 2208 movs r2, #8 - 8029e6a: 409a lsls r2, r3 - 8029e6c: 697b ldr r3, [r7, #20] - 8029e6e: 4013 ands r3, r2 - 8029e70: 2b00 cmp r3, #0 - 8029e72: f000 8088 beq.w 8029f86 - 8029e76: 693b ldr r3, [r7, #16] - 8029e78: f003 0308 and.w r3, r3, #8 - 8029e7c: 2b00 cmp r3, #0 - 8029e7e: f000 8082 beq.w 8029f86 + 8029ee4: 687b ldr r3, [r7, #4] + 8029ee6: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029ee8: f003 031f and.w r3, r3, #31 + 8029eec: 2208 movs r2, #8 + 8029eee: 409a lsls r2, r3 + 8029ef0: 697b ldr r3, [r7, #20] + 8029ef2: 4013 ands r3, r2 + 8029ef4: 2b00 cmp r3, #0 + 8029ef6: f000 8088 beq.w 802a00a + 8029efa: 693b ldr r3, [r7, #16] + 8029efc: f003 0308 and.w r3, r3, #8 + 8029f00: 2b00 cmp r3, #0 + 8029f02: f000 8082 beq.w 802a00a { /* When a DMA transfer error occurs */ /* A hardware clear of its EN bits is performed */ /* Disable ALL DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8029e82: 687b ldr r3, [r7, #4] - 8029e84: 681b ldr r3, [r3, #0] - 8029e86: 4a41 ldr r2, [pc, #260] ; (8029f8c ) - 8029e88: 4293 cmp r3, r2 - 8029e8a: d04a beq.n 8029f22 - 8029e8c: 687b ldr r3, [r7, #4] - 8029e8e: 681b ldr r3, [r3, #0] - 8029e90: 4a3f ldr r2, [pc, #252] ; (8029f90 ) - 8029e92: 4293 cmp r3, r2 - 8029e94: d045 beq.n 8029f22 - 8029e96: 687b ldr r3, [r7, #4] - 8029e98: 681b ldr r3, [r3, #0] - 8029e9a: 4a3e ldr r2, [pc, #248] ; (8029f94 ) - 8029e9c: 4293 cmp r3, r2 - 8029e9e: d040 beq.n 8029f22 - 8029ea0: 687b ldr r3, [r7, #4] - 8029ea2: 681b ldr r3, [r3, #0] - 8029ea4: 4a3c ldr r2, [pc, #240] ; (8029f98 ) - 8029ea6: 4293 cmp r3, r2 - 8029ea8: d03b beq.n 8029f22 - 8029eaa: 687b ldr r3, [r7, #4] - 8029eac: 681b ldr r3, [r3, #0] - 8029eae: 4a3b ldr r2, [pc, #236] ; (8029f9c ) - 8029eb0: 4293 cmp r3, r2 - 8029eb2: d036 beq.n 8029f22 - 8029eb4: 687b ldr r3, [r7, #4] - 8029eb6: 681b ldr r3, [r3, #0] - 8029eb8: 4a39 ldr r2, [pc, #228] ; (8029fa0 ) - 8029eba: 4293 cmp r3, r2 - 8029ebc: d031 beq.n 8029f22 - 8029ebe: 687b ldr r3, [r7, #4] - 8029ec0: 681b ldr r3, [r3, #0] - 8029ec2: 4a38 ldr r2, [pc, #224] ; (8029fa4 ) - 8029ec4: 4293 cmp r3, r2 - 8029ec6: d02c beq.n 8029f22 - 8029ec8: 687b ldr r3, [r7, #4] - 8029eca: 681b ldr r3, [r3, #0] - 8029ecc: 4a36 ldr r2, [pc, #216] ; (8029fa8 ) - 8029ece: 4293 cmp r3, r2 - 8029ed0: d027 beq.n 8029f22 - 8029ed2: 687b ldr r3, [r7, #4] - 8029ed4: 681b ldr r3, [r3, #0] - 8029ed6: 4a35 ldr r2, [pc, #212] ; (8029fac ) - 8029ed8: 4293 cmp r3, r2 - 8029eda: d022 beq.n 8029f22 - 8029edc: 687b ldr r3, [r7, #4] - 8029ede: 681b ldr r3, [r3, #0] - 8029ee0: 4a33 ldr r2, [pc, #204] ; (8029fb0 ) - 8029ee2: 4293 cmp r3, r2 - 8029ee4: d01d beq.n 8029f22 - 8029ee6: 687b ldr r3, [r7, #4] - 8029ee8: 681b ldr r3, [r3, #0] - 8029eea: 4a32 ldr r2, [pc, #200] ; (8029fb4 ) - 8029eec: 4293 cmp r3, r2 - 8029eee: d018 beq.n 8029f22 - 8029ef0: 687b ldr r3, [r7, #4] - 8029ef2: 681b ldr r3, [r3, #0] - 8029ef4: 4a30 ldr r2, [pc, #192] ; (8029fb8 ) - 8029ef6: 4293 cmp r3, r2 - 8029ef8: d013 beq.n 8029f22 - 8029efa: 687b ldr r3, [r7, #4] - 8029efc: 681b ldr r3, [r3, #0] - 8029efe: 4a2f ldr r2, [pc, #188] ; (8029fbc ) - 8029f00: 4293 cmp r3, r2 - 8029f02: d00e beq.n 8029f22 - 8029f04: 687b ldr r3, [r7, #4] - 8029f06: 681b ldr r3, [r3, #0] - 8029f08: 4a2d ldr r2, [pc, #180] ; (8029fc0 ) - 8029f0a: 4293 cmp r3, r2 - 8029f0c: d009 beq.n 8029f22 - 8029f0e: 687b ldr r3, [r7, #4] - 8029f10: 681b ldr r3, [r3, #0] - 8029f12: 4a2c ldr r2, [pc, #176] ; (8029fc4 ) - 8029f14: 4293 cmp r3, r2 - 8029f16: d004 beq.n 8029f22 - 8029f18: 687b ldr r3, [r7, #4] - 8029f1a: 681b ldr r3, [r3, #0] - 8029f1c: 4a2a ldr r2, [pc, #168] ; (8029fc8 ) - 8029f1e: 4293 cmp r3, r2 - 8029f20: d108 bne.n 8029f34 - 8029f22: 687b ldr r3, [r7, #4] - 8029f24: 681b ldr r3, [r3, #0] - 8029f26: 681a ldr r2, [r3, #0] - 8029f28: 687b ldr r3, [r7, #4] - 8029f2a: 681b ldr r3, [r3, #0] - 8029f2c: f022 021c bic.w r2, r2, #28 - 8029f30: 601a str r2, [r3, #0] - 8029f32: e007 b.n 8029f44 - 8029f34: 687b ldr r3, [r7, #4] - 8029f36: 681b ldr r3, [r3, #0] - 8029f38: 681a ldr r2, [r3, #0] - 8029f3a: 687b ldr r3, [r7, #4] - 8029f3c: 681b ldr r3, [r3, #0] - 8029f3e: f022 020e bic.w r2, r2, #14 - 8029f42: 601a str r2, [r3, #0] + 8029f06: 687b ldr r3, [r7, #4] + 8029f08: 681b ldr r3, [r3, #0] + 8029f0a: 4a41 ldr r2, [pc, #260] ; (802a010 ) + 8029f0c: 4293 cmp r3, r2 + 8029f0e: d04a beq.n 8029fa6 + 8029f10: 687b ldr r3, [r7, #4] + 8029f12: 681b ldr r3, [r3, #0] + 8029f14: 4a3f ldr r2, [pc, #252] ; (802a014 ) + 8029f16: 4293 cmp r3, r2 + 8029f18: d045 beq.n 8029fa6 + 8029f1a: 687b ldr r3, [r7, #4] + 8029f1c: 681b ldr r3, [r3, #0] + 8029f1e: 4a3e ldr r2, [pc, #248] ; (802a018 ) + 8029f20: 4293 cmp r3, r2 + 8029f22: d040 beq.n 8029fa6 + 8029f24: 687b ldr r3, [r7, #4] + 8029f26: 681b ldr r3, [r3, #0] + 8029f28: 4a3c ldr r2, [pc, #240] ; (802a01c ) + 8029f2a: 4293 cmp r3, r2 + 8029f2c: d03b beq.n 8029fa6 + 8029f2e: 687b ldr r3, [r7, #4] + 8029f30: 681b ldr r3, [r3, #0] + 8029f32: 4a3b ldr r2, [pc, #236] ; (802a020 ) + 8029f34: 4293 cmp r3, r2 + 8029f36: d036 beq.n 8029fa6 + 8029f38: 687b ldr r3, [r7, #4] + 8029f3a: 681b ldr r3, [r3, #0] + 8029f3c: 4a39 ldr r2, [pc, #228] ; (802a024 ) + 8029f3e: 4293 cmp r3, r2 + 8029f40: d031 beq.n 8029fa6 + 8029f42: 687b ldr r3, [r7, #4] + 8029f44: 681b ldr r3, [r3, #0] + 8029f46: 4a38 ldr r2, [pc, #224] ; (802a028 ) + 8029f48: 4293 cmp r3, r2 + 8029f4a: d02c beq.n 8029fa6 + 8029f4c: 687b ldr r3, [r7, #4] + 8029f4e: 681b ldr r3, [r3, #0] + 8029f50: 4a36 ldr r2, [pc, #216] ; (802a02c ) + 8029f52: 4293 cmp r3, r2 + 8029f54: d027 beq.n 8029fa6 + 8029f56: 687b ldr r3, [r7, #4] + 8029f58: 681b ldr r3, [r3, #0] + 8029f5a: 4a35 ldr r2, [pc, #212] ; (802a030 ) + 8029f5c: 4293 cmp r3, r2 + 8029f5e: d022 beq.n 8029fa6 + 8029f60: 687b ldr r3, [r7, #4] + 8029f62: 681b ldr r3, [r3, #0] + 8029f64: 4a33 ldr r2, [pc, #204] ; (802a034 ) + 8029f66: 4293 cmp r3, r2 + 8029f68: d01d beq.n 8029fa6 + 8029f6a: 687b ldr r3, [r7, #4] + 8029f6c: 681b ldr r3, [r3, #0] + 8029f6e: 4a32 ldr r2, [pc, #200] ; (802a038 ) + 8029f70: 4293 cmp r3, r2 + 8029f72: d018 beq.n 8029fa6 + 8029f74: 687b ldr r3, [r7, #4] + 8029f76: 681b ldr r3, [r3, #0] + 8029f78: 4a30 ldr r2, [pc, #192] ; (802a03c ) + 8029f7a: 4293 cmp r3, r2 + 8029f7c: d013 beq.n 8029fa6 + 8029f7e: 687b ldr r3, [r7, #4] + 8029f80: 681b ldr r3, [r3, #0] + 8029f82: 4a2f ldr r2, [pc, #188] ; (802a040 ) + 8029f84: 4293 cmp r3, r2 + 8029f86: d00e beq.n 8029fa6 + 8029f88: 687b ldr r3, [r7, #4] + 8029f8a: 681b ldr r3, [r3, #0] + 8029f8c: 4a2d ldr r2, [pc, #180] ; (802a044 ) + 8029f8e: 4293 cmp r3, r2 + 8029f90: d009 beq.n 8029fa6 + 8029f92: 687b ldr r3, [r7, #4] + 8029f94: 681b ldr r3, [r3, #0] + 8029f96: 4a2c ldr r2, [pc, #176] ; (802a048 ) + 8029f98: 4293 cmp r3, r2 + 8029f9a: d004 beq.n 8029fa6 + 8029f9c: 687b ldr r3, [r7, #4] + 8029f9e: 681b ldr r3, [r3, #0] + 8029fa0: 4a2a ldr r2, [pc, #168] ; (802a04c ) + 8029fa2: 4293 cmp r3, r2 + 8029fa4: d108 bne.n 8029fb8 + 8029fa6: 687b ldr r3, [r7, #4] + 8029fa8: 681b ldr r3, [r3, #0] + 8029faa: 681a ldr r2, [r3, #0] + 8029fac: 687b ldr r3, [r7, #4] + 8029fae: 681b ldr r3, [r3, #0] + 8029fb0: f022 021c bic.w r2, r2, #28 + 8029fb4: 601a str r2, [r3, #0] + 8029fb6: e007 b.n 8029fc8 + 8029fb8: 687b ldr r3, [r7, #4] + 8029fba: 681b ldr r3, [r3, #0] + 8029fbc: 681a ldr r2, [r3, #0] + 8029fbe: 687b ldr r3, [r7, #4] + 8029fc0: 681b ldr r3, [r3, #0] + 8029fc2: f022 020e bic.w r2, r2, #14 + 8029fc6: 601a str r2, [r3, #0] /* Clear all flags */ regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU); - 8029f44: 687b ldr r3, [r7, #4] - 8029f46: 6ddb ldr r3, [r3, #92] ; 0x5c - 8029f48: f003 031f and.w r3, r3, #31 - 8029f4c: 2201 movs r2, #1 - 8029f4e: 409a lsls r2, r3 - 8029f50: 69fb ldr r3, [r7, #28] - 8029f52: 605a str r2, [r3, #4] + 8029fc8: 687b ldr r3, [r7, #4] + 8029fca: 6ddb ldr r3, [r3, #92] ; 0x5c + 8029fcc: f003 031f and.w r3, r3, #31 + 8029fd0: 2201 movs r2, #1 + 8029fd2: 409a lsls r2, r3 + 8029fd4: 69fb ldr r3, [r7, #28] + 8029fd6: 605a str r2, [r3, #4] /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TE; - 8029f54: 687b ldr r3, [r7, #4] - 8029f56: 2201 movs r2, #1 - 8029f58: 655a str r2, [r3, #84] ; 0x54 + 8029fd8: 687b ldr r3, [r7, #4] + 8029fda: 2201 movs r2, #1 + 8029fdc: 655a str r2, [r3, #84] ; 0x54 /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8029f5a: 687b ldr r3, [r7, #4] - 8029f5c: 2201 movs r2, #1 - 8029f5e: f883 2035 strb.w r2, [r3, #53] ; 0x35 + 8029fde: 687b ldr r3, [r7, #4] + 8029fe0: 2201 movs r2, #1 + 8029fe2: f883 2035 strb.w r2, [r3, #53] ; 0x35 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8029f62: 687b ldr r3, [r7, #4] - 8029f64: 2200 movs r2, #0 - 8029f66: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8029fe6: 687b ldr r3, [r7, #4] + 8029fe8: 2200 movs r2, #0 + 8029fea: f883 2034 strb.w r2, [r3, #52] ; 0x34 if (hdma->XferErrorCallback != NULL) - 8029f6a: 687b ldr r3, [r7, #4] - 8029f6c: 6cdb ldr r3, [r3, #76] ; 0x4c - 8029f6e: 2b00 cmp r3, #0 - 8029f70: d009 beq.n 8029f86 + 8029fee: 687b ldr r3, [r7, #4] + 8029ff0: 6cdb ldr r3, [r3, #76] ; 0x4c + 8029ff2: 2b00 cmp r3, #0 + 8029ff4: d009 beq.n 802a00a { /* Transfer error callback */ hdma->XferErrorCallback(hdma); - 8029f72: 687b ldr r3, [r7, #4] - 8029f74: 6cdb ldr r3, [r3, #76] ; 0x4c - 8029f76: 6878 ldr r0, [r7, #4] - 8029f78: 4798 blx r3 - 8029f7a: e004 b.n 8029f86 + 8029ff6: 687b ldr r3, [r7, #4] + 8029ff8: 6cdb ldr r3, [r3, #76] ; 0x4c + 8029ffa: 6878 ldr r0, [r7, #4] + 8029ffc: 4798 blx r3 + 8029ffe: e004 b.n 802a00a return; - 8029f7c: bf00 nop - 8029f7e: e002 b.n 8029f86 + 802a000: bf00 nop + 802a002: e002 b.n 802a00a if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029f80: bf00 nop - 8029f82: e000 b.n 8029f86 + 802a004: bf00 nop + 802a006: e000 b.n 802a00a if((ccr_reg & BDMA_CCR_DBM) != 0U) - 8029f84: bf00 nop + 802a008: bf00 nop } else { /* Nothing To Do */ } } - 8029f86: 3728 adds r7, #40 ; 0x28 - 8029f88: 46bd mov sp, r7 - 8029f8a: bd80 pop {r7, pc} - 8029f8c: 40020010 .word 0x40020010 - 8029f90: 40020028 .word 0x40020028 - 8029f94: 40020040 .word 0x40020040 - 8029f98: 40020058 .word 0x40020058 - 8029f9c: 40020070 .word 0x40020070 - 8029fa0: 40020088 .word 0x40020088 - 8029fa4: 400200a0 .word 0x400200a0 - 8029fa8: 400200b8 .word 0x400200b8 - 8029fac: 40020410 .word 0x40020410 - 8029fb0: 40020428 .word 0x40020428 - 8029fb4: 40020440 .word 0x40020440 - 8029fb8: 40020458 .word 0x40020458 - 8029fbc: 40020470 .word 0x40020470 - 8029fc0: 40020488 .word 0x40020488 - 8029fc4: 400204a0 .word 0x400204a0 - 8029fc8: 400204b8 .word 0x400204b8 - -08029fcc : + 802a00a: 3728 adds r7, #40 ; 0x28 + 802a00c: 46bd mov sp, r7 + 802a00e: bd80 pop {r7, pc} + 802a010: 40020010 .word 0x40020010 + 802a014: 40020028 .word 0x40020028 + 802a018: 40020040 .word 0x40020040 + 802a01c: 40020058 .word 0x40020058 + 802a020: 40020070 .word 0x40020070 + 802a024: 40020088 .word 0x40020088 + 802a028: 400200a0 .word 0x400200a0 + 802a02c: 400200b8 .word 0x400200b8 + 802a030: 40020410 .word 0x40020410 + 802a034: 40020428 .word 0x40020428 + 802a038: 40020440 .word 0x40020440 + 802a03c: 40020458 .word 0x40020458 + 802a040: 40020470 .word 0x40020470 + 802a044: 40020488 .word 0x40020488 + 802a048: 400204a0 .word 0x400204a0 + 802a04c: 400204b8 .word 0x400204b8 + +0802a050 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL state */ HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) { - 8029fcc: b480 push {r7} - 8029fce: b083 sub sp, #12 - 8029fd0: af00 add r7, sp, #0 - 8029fd2: 6078 str r0, [r7, #4] + 802a050: b480 push {r7} + 802a052: b083 sub sp, #12 + 802a054: af00 add r7, sp, #0 + 802a056: 6078 str r0, [r7, #4] return hdma->State; - 8029fd4: 687b ldr r3, [r7, #4] - 8029fd6: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 - 8029fda: b2db uxtb r3, r3 + 802a058: 687b ldr r3, [r7, #4] + 802a05a: f893 3035 ldrb.w r3, [r3, #53] ; 0x35 + 802a05e: b2db uxtb r3, r3 } - 8029fdc: 4618 mov r0, r3 - 8029fde: 370c adds r7, #12 - 8029fe0: 46bd mov sp, r7 - 8029fe2: f85d 7b04 ldr.w r7, [sp], #4 - 8029fe6: 4770 bx lr + 802a060: 4618 mov r0, r3 + 802a062: 370c adds r7, #12 + 802a064: 46bd mov sp, r7 + 802a066: f85d 7b04 ldr.w r7, [sp], #4 + 802a06a: 4770 bx lr -08029fe8 : +0802a06c : * @param DstAddress: The destination memory Buffer address * @param DataLength: The length of data to be transferred from source to destination * @retval None */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { - 8029fe8: b480 push {r7} - 8029fea: b087 sub sp, #28 - 8029fec: af00 add r7, sp, #0 - 8029fee: 60f8 str r0, [r7, #12] - 8029ff0: 60b9 str r1, [r7, #8] - 8029ff2: 607a str r2, [r7, #4] - 8029ff4: 603b str r3, [r7, #0] + 802a06c: b480 push {r7} + 802a06e: b087 sub sp, #28 + 802a070: af00 add r7, sp, #0 + 802a072: 60f8 str r0, [r7, #12] + 802a074: 60b9 str r1, [r7, #8] + 802a076: 607a str r2, [r7, #4] + 802a078: 603b str r3, [r7, #0] /* calculate DMA base and stream number */ DMA_Base_Registers *regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress; - 8029ff6: 68fb ldr r3, [r7, #12] - 8029ff8: 6d9b ldr r3, [r3, #88] ; 0x58 - 8029ffa: 617b str r3, [r7, #20] + 802a07a: 68fb ldr r3, [r7, #12] + 802a07c: 6d9b ldr r3, [r3, #88] ; 0x58 + 802a07e: 617b str r3, [r7, #20] BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress; - 8029ffc: 68fb ldr r3, [r7, #12] - 8029ffe: 6d9b ldr r3, [r3, #88] ; 0x58 - 802a000: 613b str r3, [r7, #16] + 802a080: 68fb ldr r3, [r7, #12] + 802a082: 6d9b ldr r3, [r3, #88] ; 0x58 + 802a084: 613b str r3, [r7, #16] if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */ - 802a002: 68fb ldr r3, [r7, #12] - 802a004: 681b ldr r3, [r3, #0] - 802a006: 4a7f ldr r2, [pc, #508] ; (802a204 ) - 802a008: 4293 cmp r3, r2 - 802a00a: d072 beq.n 802a0f2 - 802a00c: 68fb ldr r3, [r7, #12] - 802a00e: 681b ldr r3, [r3, #0] - 802a010: 4a7d ldr r2, [pc, #500] ; (802a208 ) - 802a012: 4293 cmp r3, r2 - 802a014: d06d beq.n 802a0f2 - 802a016: 68fb ldr r3, [r7, #12] - 802a018: 681b ldr r3, [r3, #0] - 802a01a: 4a7c ldr r2, [pc, #496] ; (802a20c ) - 802a01c: 4293 cmp r3, r2 - 802a01e: d068 beq.n 802a0f2 - 802a020: 68fb ldr r3, [r7, #12] - 802a022: 681b ldr r3, [r3, #0] - 802a024: 4a7a ldr r2, [pc, #488] ; (802a210 ) - 802a026: 4293 cmp r3, r2 - 802a028: d063 beq.n 802a0f2 - 802a02a: 68fb ldr r3, [r7, #12] - 802a02c: 681b ldr r3, [r3, #0] - 802a02e: 4a79 ldr r2, [pc, #484] ; (802a214 ) - 802a030: 4293 cmp r3, r2 - 802a032: d05e beq.n 802a0f2 - 802a034: 68fb ldr r3, [r7, #12] - 802a036: 681b ldr r3, [r3, #0] - 802a038: 4a77 ldr r2, [pc, #476] ; (802a218 ) - 802a03a: 4293 cmp r3, r2 - 802a03c: d059 beq.n 802a0f2 - 802a03e: 68fb ldr r3, [r7, #12] - 802a040: 681b ldr r3, [r3, #0] - 802a042: 4a76 ldr r2, [pc, #472] ; (802a21c ) - 802a044: 4293 cmp r3, r2 - 802a046: d054 beq.n 802a0f2 - 802a048: 68fb ldr r3, [r7, #12] - 802a04a: 681b ldr r3, [r3, #0] - 802a04c: 4a74 ldr r2, [pc, #464] ; (802a220 ) - 802a04e: 4293 cmp r3, r2 - 802a050: d04f beq.n 802a0f2 - 802a052: 68fb ldr r3, [r7, #12] - 802a054: 681b ldr r3, [r3, #0] - 802a056: 4a73 ldr r2, [pc, #460] ; (802a224 ) - 802a058: 4293 cmp r3, r2 - 802a05a: d04a beq.n 802a0f2 - 802a05c: 68fb ldr r3, [r7, #12] - 802a05e: 681b ldr r3, [r3, #0] - 802a060: 4a71 ldr r2, [pc, #452] ; (802a228 ) - 802a062: 4293 cmp r3, r2 - 802a064: d045 beq.n 802a0f2 - 802a066: 68fb ldr r3, [r7, #12] - 802a068: 681b ldr r3, [r3, #0] - 802a06a: 4a70 ldr r2, [pc, #448] ; (802a22c ) - 802a06c: 4293 cmp r3, r2 - 802a06e: d040 beq.n 802a0f2 - 802a070: 68fb ldr r3, [r7, #12] - 802a072: 681b ldr r3, [r3, #0] - 802a074: 4a6e ldr r2, [pc, #440] ; (802a230 ) - 802a076: 4293 cmp r3, r2 - 802a078: d03b beq.n 802a0f2 - 802a07a: 68fb ldr r3, [r7, #12] - 802a07c: 681b ldr r3, [r3, #0] - 802a07e: 4a6d ldr r2, [pc, #436] ; (802a234 ) - 802a080: 4293 cmp r3, r2 - 802a082: d036 beq.n 802a0f2 - 802a084: 68fb ldr r3, [r7, #12] - 802a086: 681b ldr r3, [r3, #0] - 802a088: 4a6b ldr r2, [pc, #428] ; (802a238 ) - 802a08a: 4293 cmp r3, r2 - 802a08c: d031 beq.n 802a0f2 - 802a08e: 68fb ldr r3, [r7, #12] - 802a090: 681b ldr r3, [r3, #0] - 802a092: 4a6a ldr r2, [pc, #424] ; (802a23c ) - 802a094: 4293 cmp r3, r2 - 802a096: d02c beq.n 802a0f2 - 802a098: 68fb ldr r3, [r7, #12] - 802a09a: 681b ldr r3, [r3, #0] - 802a09c: 4a68 ldr r2, [pc, #416] ; (802a240 ) - 802a09e: 4293 cmp r3, r2 - 802a0a0: d027 beq.n 802a0f2 - 802a0a2: 68fb ldr r3, [r7, #12] - 802a0a4: 681b ldr r3, [r3, #0] - 802a0a6: 4a67 ldr r2, [pc, #412] ; (802a244 ) - 802a0a8: 4293 cmp r3, r2 - 802a0aa: d022 beq.n 802a0f2 - 802a0ac: 68fb ldr r3, [r7, #12] - 802a0ae: 681b ldr r3, [r3, #0] - 802a0b0: 4a65 ldr r2, [pc, #404] ; (802a248 ) - 802a0b2: 4293 cmp r3, r2 - 802a0b4: d01d beq.n 802a0f2 - 802a0b6: 68fb ldr r3, [r7, #12] - 802a0b8: 681b ldr r3, [r3, #0] - 802a0ba: 4a64 ldr r2, [pc, #400] ; (802a24c ) - 802a0bc: 4293 cmp r3, r2 - 802a0be: d018 beq.n 802a0f2 - 802a0c0: 68fb ldr r3, [r7, #12] - 802a0c2: 681b ldr r3, [r3, #0] - 802a0c4: 4a62 ldr r2, [pc, #392] ; (802a250 ) - 802a0c6: 4293 cmp r3, r2 - 802a0c8: d013 beq.n 802a0f2 - 802a0ca: 68fb ldr r3, [r7, #12] - 802a0cc: 681b ldr r3, [r3, #0] - 802a0ce: 4a61 ldr r2, [pc, #388] ; (802a254 ) - 802a0d0: 4293 cmp r3, r2 - 802a0d2: d00e beq.n 802a0f2 - 802a0d4: 68fb ldr r3, [r7, #12] - 802a0d6: 681b ldr r3, [r3, #0] - 802a0d8: 4a5f ldr r2, [pc, #380] ; (802a258 ) - 802a0da: 4293 cmp r3, r2 - 802a0dc: d009 beq.n 802a0f2 - 802a0de: 68fb ldr r3, [r7, #12] - 802a0e0: 681b ldr r3, [r3, #0] - 802a0e2: 4a5e ldr r2, [pc, #376] ; (802a25c ) - 802a0e4: 4293 cmp r3, r2 - 802a0e6: d004 beq.n 802a0f2 - 802a0e8: 68fb ldr r3, [r7, #12] - 802a0ea: 681b ldr r3, [r3, #0] - 802a0ec: 4a5c ldr r2, [pc, #368] ; (802a260 ) - 802a0ee: 4293 cmp r3, r2 - 802a0f0: d101 bne.n 802a0f6 - 802a0f2: 2301 movs r3, #1 - 802a0f4: e000 b.n 802a0f8 - 802a0f6: 2300 movs r3, #0 - 802a0f8: 2b00 cmp r3, #0 - 802a0fa: d00d beq.n 802a118 + 802a086: 68fb ldr r3, [r7, #12] + 802a088: 681b ldr r3, [r3, #0] + 802a08a: 4a7f ldr r2, [pc, #508] ; (802a288 ) + 802a08c: 4293 cmp r3, r2 + 802a08e: d072 beq.n 802a176 + 802a090: 68fb ldr r3, [r7, #12] + 802a092: 681b ldr r3, [r3, #0] + 802a094: 4a7d ldr r2, [pc, #500] ; (802a28c ) + 802a096: 4293 cmp r3, r2 + 802a098: d06d beq.n 802a176 + 802a09a: 68fb ldr r3, [r7, #12] + 802a09c: 681b ldr r3, [r3, #0] + 802a09e: 4a7c ldr r2, [pc, #496] ; (802a290 ) + 802a0a0: 4293 cmp r3, r2 + 802a0a2: d068 beq.n 802a176 + 802a0a4: 68fb ldr r3, [r7, #12] + 802a0a6: 681b ldr r3, [r3, #0] + 802a0a8: 4a7a ldr r2, [pc, #488] ; (802a294 ) + 802a0aa: 4293 cmp r3, r2 + 802a0ac: d063 beq.n 802a176 + 802a0ae: 68fb ldr r3, [r7, #12] + 802a0b0: 681b ldr r3, [r3, #0] + 802a0b2: 4a79 ldr r2, [pc, #484] ; (802a298 ) + 802a0b4: 4293 cmp r3, r2 + 802a0b6: d05e beq.n 802a176 + 802a0b8: 68fb ldr r3, [r7, #12] + 802a0ba: 681b ldr r3, [r3, #0] + 802a0bc: 4a77 ldr r2, [pc, #476] ; (802a29c ) + 802a0be: 4293 cmp r3, r2 + 802a0c0: d059 beq.n 802a176 + 802a0c2: 68fb ldr r3, [r7, #12] + 802a0c4: 681b ldr r3, [r3, #0] + 802a0c6: 4a76 ldr r2, [pc, #472] ; (802a2a0 ) + 802a0c8: 4293 cmp r3, r2 + 802a0ca: d054 beq.n 802a176 + 802a0cc: 68fb ldr r3, [r7, #12] + 802a0ce: 681b ldr r3, [r3, #0] + 802a0d0: 4a74 ldr r2, [pc, #464] ; (802a2a4 ) + 802a0d2: 4293 cmp r3, r2 + 802a0d4: d04f beq.n 802a176 + 802a0d6: 68fb ldr r3, [r7, #12] + 802a0d8: 681b ldr r3, [r3, #0] + 802a0da: 4a73 ldr r2, [pc, #460] ; (802a2a8 ) + 802a0dc: 4293 cmp r3, r2 + 802a0de: d04a beq.n 802a176 + 802a0e0: 68fb ldr r3, [r7, #12] + 802a0e2: 681b ldr r3, [r3, #0] + 802a0e4: 4a71 ldr r2, [pc, #452] ; (802a2ac ) + 802a0e6: 4293 cmp r3, r2 + 802a0e8: d045 beq.n 802a176 + 802a0ea: 68fb ldr r3, [r7, #12] + 802a0ec: 681b ldr r3, [r3, #0] + 802a0ee: 4a70 ldr r2, [pc, #448] ; (802a2b0 ) + 802a0f0: 4293 cmp r3, r2 + 802a0f2: d040 beq.n 802a176 + 802a0f4: 68fb ldr r3, [r7, #12] + 802a0f6: 681b ldr r3, [r3, #0] + 802a0f8: 4a6e ldr r2, [pc, #440] ; (802a2b4 ) + 802a0fa: 4293 cmp r3, r2 + 802a0fc: d03b beq.n 802a176 + 802a0fe: 68fb ldr r3, [r7, #12] + 802a100: 681b ldr r3, [r3, #0] + 802a102: 4a6d ldr r2, [pc, #436] ; (802a2b8 ) + 802a104: 4293 cmp r3, r2 + 802a106: d036 beq.n 802a176 + 802a108: 68fb ldr r3, [r7, #12] + 802a10a: 681b ldr r3, [r3, #0] + 802a10c: 4a6b ldr r2, [pc, #428] ; (802a2bc ) + 802a10e: 4293 cmp r3, r2 + 802a110: d031 beq.n 802a176 + 802a112: 68fb ldr r3, [r7, #12] + 802a114: 681b ldr r3, [r3, #0] + 802a116: 4a6a ldr r2, [pc, #424] ; (802a2c0 ) + 802a118: 4293 cmp r3, r2 + 802a11a: d02c beq.n 802a176 + 802a11c: 68fb ldr r3, [r7, #12] + 802a11e: 681b ldr r3, [r3, #0] + 802a120: 4a68 ldr r2, [pc, #416] ; (802a2c4 ) + 802a122: 4293 cmp r3, r2 + 802a124: d027 beq.n 802a176 + 802a126: 68fb ldr r3, [r7, #12] + 802a128: 681b ldr r3, [r3, #0] + 802a12a: 4a67 ldr r2, [pc, #412] ; (802a2c8 ) + 802a12c: 4293 cmp r3, r2 + 802a12e: d022 beq.n 802a176 + 802a130: 68fb ldr r3, [r7, #12] + 802a132: 681b ldr r3, [r3, #0] + 802a134: 4a65 ldr r2, [pc, #404] ; (802a2cc ) + 802a136: 4293 cmp r3, r2 + 802a138: d01d beq.n 802a176 + 802a13a: 68fb ldr r3, [r7, #12] + 802a13c: 681b ldr r3, [r3, #0] + 802a13e: 4a64 ldr r2, [pc, #400] ; (802a2d0 ) + 802a140: 4293 cmp r3, r2 + 802a142: d018 beq.n 802a176 + 802a144: 68fb ldr r3, [r7, #12] + 802a146: 681b ldr r3, [r3, #0] + 802a148: 4a62 ldr r2, [pc, #392] ; (802a2d4 ) + 802a14a: 4293 cmp r3, r2 + 802a14c: d013 beq.n 802a176 + 802a14e: 68fb ldr r3, [r7, #12] + 802a150: 681b ldr r3, [r3, #0] + 802a152: 4a61 ldr r2, [pc, #388] ; (802a2d8 ) + 802a154: 4293 cmp r3, r2 + 802a156: d00e beq.n 802a176 + 802a158: 68fb ldr r3, [r7, #12] + 802a15a: 681b ldr r3, [r3, #0] + 802a15c: 4a5f ldr r2, [pc, #380] ; (802a2dc ) + 802a15e: 4293 cmp r3, r2 + 802a160: d009 beq.n 802a176 + 802a162: 68fb ldr r3, [r7, #12] + 802a164: 681b ldr r3, [r3, #0] + 802a166: 4a5e ldr r2, [pc, #376] ; (802a2e0 ) + 802a168: 4293 cmp r3, r2 + 802a16a: d004 beq.n 802a176 + 802a16c: 68fb ldr r3, [r7, #12] + 802a16e: 681b ldr r3, [r3, #0] + 802a170: 4a5c ldr r2, [pc, #368] ; (802a2e4 ) + 802a172: 4293 cmp r3, r2 + 802a174: d101 bne.n 802a17a + 802a176: 2301 movs r3, #1 + 802a178: e000 b.n 802a17c + 802a17a: 2300 movs r3, #0 + 802a17c: 2b00 cmp r3, #0 + 802a17e: d00d beq.n 802a19c { /* Clear the DMAMUX synchro overrun flag */ hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; - 802a0fc: 68fb ldr r3, [r7, #12] - 802a0fe: 6e5b ldr r3, [r3, #100] ; 0x64 - 802a100: 68fa ldr r2, [r7, #12] - 802a102: 6e92 ldr r2, [r2, #104] ; 0x68 - 802a104: 605a str r2, [r3, #4] + 802a180: 68fb ldr r3, [r7, #12] + 802a182: 6e5b ldr r3, [r3, #100] ; 0x64 + 802a184: 68fa ldr r2, [r7, #12] + 802a186: 6e92 ldr r2, [r2, #104] ; 0x68 + 802a188: 605a str r2, [r3, #4] if(hdma->DMAmuxRequestGen != 0U) - 802a106: 68fb ldr r3, [r7, #12] - 802a108: 6edb ldr r3, [r3, #108] ; 0x6c - 802a10a: 2b00 cmp r3, #0 - 802a10c: d004 beq.n 802a118 + 802a18a: 68fb ldr r3, [r7, #12] + 802a18c: 6edb ldr r3, [r3, #108] ; 0x6c + 802a18e: 2b00 cmp r3, #0 + 802a190: d004 beq.n 802a19c { /* Clear the DMAMUX request generator overrun flag */ hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; - 802a10e: 68fb ldr r3, [r7, #12] - 802a110: 6f1b ldr r3, [r3, #112] ; 0x70 - 802a112: 68fa ldr r2, [r7, #12] - 802a114: 6f52 ldr r2, [r2, #116] ; 0x74 - 802a116: 605a str r2, [r3, #4] + 802a192: 68fb ldr r3, [r7, #12] + 802a194: 6f1b ldr r3, [r3, #112] ; 0x70 + 802a196: 68fa ldr r2, [r7, #12] + 802a198: 6f52 ldr r2, [r2, #116] ; 0x74 + 802a19a: 605a str r2, [r3, #4] } } if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 802a118: 68fb ldr r3, [r7, #12] - 802a11a: 681b ldr r3, [r3, #0] - 802a11c: 4a39 ldr r2, [pc, #228] ; (802a204 ) - 802a11e: 4293 cmp r3, r2 - 802a120: d04a beq.n 802a1b8 - 802a122: 68fb ldr r3, [r7, #12] - 802a124: 681b ldr r3, [r3, #0] - 802a126: 4a38 ldr r2, [pc, #224] ; (802a208 ) - 802a128: 4293 cmp r3, r2 - 802a12a: d045 beq.n 802a1b8 - 802a12c: 68fb ldr r3, [r7, #12] - 802a12e: 681b ldr r3, [r3, #0] - 802a130: 4a36 ldr r2, [pc, #216] ; (802a20c ) - 802a132: 4293 cmp r3, r2 - 802a134: d040 beq.n 802a1b8 - 802a136: 68fb ldr r3, [r7, #12] - 802a138: 681b ldr r3, [r3, #0] - 802a13a: 4a35 ldr r2, [pc, #212] ; (802a210 ) - 802a13c: 4293 cmp r3, r2 - 802a13e: d03b beq.n 802a1b8 - 802a140: 68fb ldr r3, [r7, #12] - 802a142: 681b ldr r3, [r3, #0] - 802a144: 4a33 ldr r2, [pc, #204] ; (802a214 ) - 802a146: 4293 cmp r3, r2 - 802a148: d036 beq.n 802a1b8 - 802a14a: 68fb ldr r3, [r7, #12] - 802a14c: 681b ldr r3, [r3, #0] - 802a14e: 4a32 ldr r2, [pc, #200] ; (802a218 ) - 802a150: 4293 cmp r3, r2 - 802a152: d031 beq.n 802a1b8 - 802a154: 68fb ldr r3, [r7, #12] - 802a156: 681b ldr r3, [r3, #0] - 802a158: 4a30 ldr r2, [pc, #192] ; (802a21c ) - 802a15a: 4293 cmp r3, r2 - 802a15c: d02c beq.n 802a1b8 - 802a15e: 68fb ldr r3, [r7, #12] - 802a160: 681b ldr r3, [r3, #0] - 802a162: 4a2f ldr r2, [pc, #188] ; (802a220 ) - 802a164: 4293 cmp r3, r2 - 802a166: d027 beq.n 802a1b8 - 802a168: 68fb ldr r3, [r7, #12] - 802a16a: 681b ldr r3, [r3, #0] - 802a16c: 4a2d ldr r2, [pc, #180] ; (802a224 ) - 802a16e: 4293 cmp r3, r2 - 802a170: d022 beq.n 802a1b8 - 802a172: 68fb ldr r3, [r7, #12] - 802a174: 681b ldr r3, [r3, #0] - 802a176: 4a2c ldr r2, [pc, #176] ; (802a228 ) - 802a178: 4293 cmp r3, r2 - 802a17a: d01d beq.n 802a1b8 - 802a17c: 68fb ldr r3, [r7, #12] - 802a17e: 681b ldr r3, [r3, #0] - 802a180: 4a2a ldr r2, [pc, #168] ; (802a22c ) - 802a182: 4293 cmp r3, r2 - 802a184: d018 beq.n 802a1b8 - 802a186: 68fb ldr r3, [r7, #12] - 802a188: 681b ldr r3, [r3, #0] - 802a18a: 4a29 ldr r2, [pc, #164] ; (802a230 ) - 802a18c: 4293 cmp r3, r2 - 802a18e: d013 beq.n 802a1b8 - 802a190: 68fb ldr r3, [r7, #12] - 802a192: 681b ldr r3, [r3, #0] - 802a194: 4a27 ldr r2, [pc, #156] ; (802a234 ) - 802a196: 4293 cmp r3, r2 - 802a198: d00e beq.n 802a1b8 - 802a19a: 68fb ldr r3, [r7, #12] - 802a19c: 681b ldr r3, [r3, #0] - 802a19e: 4a26 ldr r2, [pc, #152] ; (802a238 ) - 802a1a0: 4293 cmp r3, r2 - 802a1a2: d009 beq.n 802a1b8 - 802a1a4: 68fb ldr r3, [r7, #12] - 802a1a6: 681b ldr r3, [r3, #0] - 802a1a8: 4a24 ldr r2, [pc, #144] ; (802a23c ) - 802a1aa: 4293 cmp r3, r2 - 802a1ac: d004 beq.n 802a1b8 - 802a1ae: 68fb ldr r3, [r7, #12] - 802a1b0: 681b ldr r3, [r3, #0] - 802a1b2: 4a23 ldr r2, [pc, #140] ; (802a240 ) - 802a1b4: 4293 cmp r3, r2 - 802a1b6: d101 bne.n 802a1bc - 802a1b8: 2301 movs r3, #1 - 802a1ba: e000 b.n 802a1be - 802a1bc: 2300 movs r3, #0 - 802a1be: 2b00 cmp r3, #0 - 802a1c0: d059 beq.n 802a276 + 802a19c: 68fb ldr r3, [r7, #12] + 802a19e: 681b ldr r3, [r3, #0] + 802a1a0: 4a39 ldr r2, [pc, #228] ; (802a288 ) + 802a1a2: 4293 cmp r3, r2 + 802a1a4: d04a beq.n 802a23c + 802a1a6: 68fb ldr r3, [r7, #12] + 802a1a8: 681b ldr r3, [r3, #0] + 802a1aa: 4a38 ldr r2, [pc, #224] ; (802a28c ) + 802a1ac: 4293 cmp r3, r2 + 802a1ae: d045 beq.n 802a23c + 802a1b0: 68fb ldr r3, [r7, #12] + 802a1b2: 681b ldr r3, [r3, #0] + 802a1b4: 4a36 ldr r2, [pc, #216] ; (802a290 ) + 802a1b6: 4293 cmp r3, r2 + 802a1b8: d040 beq.n 802a23c + 802a1ba: 68fb ldr r3, [r7, #12] + 802a1bc: 681b ldr r3, [r3, #0] + 802a1be: 4a35 ldr r2, [pc, #212] ; (802a294 ) + 802a1c0: 4293 cmp r3, r2 + 802a1c2: d03b beq.n 802a23c + 802a1c4: 68fb ldr r3, [r7, #12] + 802a1c6: 681b ldr r3, [r3, #0] + 802a1c8: 4a33 ldr r2, [pc, #204] ; (802a298 ) + 802a1ca: 4293 cmp r3, r2 + 802a1cc: d036 beq.n 802a23c + 802a1ce: 68fb ldr r3, [r7, #12] + 802a1d0: 681b ldr r3, [r3, #0] + 802a1d2: 4a32 ldr r2, [pc, #200] ; (802a29c ) + 802a1d4: 4293 cmp r3, r2 + 802a1d6: d031 beq.n 802a23c + 802a1d8: 68fb ldr r3, [r7, #12] + 802a1da: 681b ldr r3, [r3, #0] + 802a1dc: 4a30 ldr r2, [pc, #192] ; (802a2a0 ) + 802a1de: 4293 cmp r3, r2 + 802a1e0: d02c beq.n 802a23c + 802a1e2: 68fb ldr r3, [r7, #12] + 802a1e4: 681b ldr r3, [r3, #0] + 802a1e6: 4a2f ldr r2, [pc, #188] ; (802a2a4 ) + 802a1e8: 4293 cmp r3, r2 + 802a1ea: d027 beq.n 802a23c + 802a1ec: 68fb ldr r3, [r7, #12] + 802a1ee: 681b ldr r3, [r3, #0] + 802a1f0: 4a2d ldr r2, [pc, #180] ; (802a2a8 ) + 802a1f2: 4293 cmp r3, r2 + 802a1f4: d022 beq.n 802a23c + 802a1f6: 68fb ldr r3, [r7, #12] + 802a1f8: 681b ldr r3, [r3, #0] + 802a1fa: 4a2c ldr r2, [pc, #176] ; (802a2ac ) + 802a1fc: 4293 cmp r3, r2 + 802a1fe: d01d beq.n 802a23c + 802a200: 68fb ldr r3, [r7, #12] + 802a202: 681b ldr r3, [r3, #0] + 802a204: 4a2a ldr r2, [pc, #168] ; (802a2b0 ) + 802a206: 4293 cmp r3, r2 + 802a208: d018 beq.n 802a23c + 802a20a: 68fb ldr r3, [r7, #12] + 802a20c: 681b ldr r3, [r3, #0] + 802a20e: 4a29 ldr r2, [pc, #164] ; (802a2b4 ) + 802a210: 4293 cmp r3, r2 + 802a212: d013 beq.n 802a23c + 802a214: 68fb ldr r3, [r7, #12] + 802a216: 681b ldr r3, [r3, #0] + 802a218: 4a27 ldr r2, [pc, #156] ; (802a2b8 ) + 802a21a: 4293 cmp r3, r2 + 802a21c: d00e beq.n 802a23c + 802a21e: 68fb ldr r3, [r7, #12] + 802a220: 681b ldr r3, [r3, #0] + 802a222: 4a26 ldr r2, [pc, #152] ; (802a2bc ) + 802a224: 4293 cmp r3, r2 + 802a226: d009 beq.n 802a23c + 802a228: 68fb ldr r3, [r7, #12] + 802a22a: 681b ldr r3, [r3, #0] + 802a22c: 4a24 ldr r2, [pc, #144] ; (802a2c0 ) + 802a22e: 4293 cmp r3, r2 + 802a230: d004 beq.n 802a23c + 802a232: 68fb ldr r3, [r7, #12] + 802a234: 681b ldr r3, [r3, #0] + 802a236: 4a23 ldr r2, [pc, #140] ; (802a2c4 ) + 802a238: 4293 cmp r3, r2 + 802a23a: d101 bne.n 802a240 + 802a23c: 2301 movs r3, #1 + 802a23e: e000 b.n 802a242 + 802a240: 2300 movs r3, #0 + 802a242: 2b00 cmp r3, #0 + 802a244: d059 beq.n 802a2fa { /* Clear all interrupt flags at correct offset within the register */ regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); - 802a1c2: 68fb ldr r3, [r7, #12] - 802a1c4: 6ddb ldr r3, [r3, #92] ; 0x5c - 802a1c6: f003 031f and.w r3, r3, #31 - 802a1ca: 223f movs r2, #63 ; 0x3f - 802a1cc: 409a lsls r2, r3 - 802a1ce: 697b ldr r3, [r7, #20] - 802a1d0: 609a str r2, [r3, #8] + 802a246: 68fb ldr r3, [r7, #12] + 802a248: 6ddb ldr r3, [r3, #92] ; 0x5c + 802a24a: f003 031f and.w r3, r3, #31 + 802a24e: 223f movs r2, #63 ; 0x3f + 802a250: 409a lsls r2, r3 + 802a252: 697b ldr r3, [r7, #20] + 802a254: 609a str r2, [r3, #8] /* Clear DBM bit */ ((DMA_Stream_TypeDef *)hdma->Instance)->CR &= (uint32_t)(~DMA_SxCR_DBM); - 802a1d2: 68fb ldr r3, [r7, #12] - 802a1d4: 681b ldr r3, [r3, #0] - 802a1d6: 681a ldr r2, [r3, #0] - 802a1d8: 68fb ldr r3, [r7, #12] - 802a1da: 681b ldr r3, [r3, #0] - 802a1dc: f422 2280 bic.w r2, r2, #262144 ; 0x40000 - 802a1e0: 601a str r2, [r3, #0] + 802a256: 68fb ldr r3, [r7, #12] + 802a258: 681b ldr r3, [r3, #0] + 802a25a: 681a ldr r2, [r3, #0] + 802a25c: 68fb ldr r3, [r7, #12] + 802a25e: 681b ldr r3, [r3, #0] + 802a260: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 802a264: 601a str r2, [r3, #0] /* Configure DMA Stream data length */ ((DMA_Stream_TypeDef *)hdma->Instance)->NDTR = DataLength; - 802a1e2: 68fb ldr r3, [r7, #12] - 802a1e4: 681b ldr r3, [r3, #0] - 802a1e6: 683a ldr r2, [r7, #0] - 802a1e8: 605a str r2, [r3, #4] + 802a266: 68fb ldr r3, [r7, #12] + 802a268: 681b ldr r3, [r3, #0] + 802a26a: 683a ldr r2, [r7, #0] + 802a26c: 605a str r2, [r3, #4] /* Peripheral to Memory */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 802a1ea: 68fb ldr r3, [r7, #12] - 802a1ec: 689b ldr r3, [r3, #8] - 802a1ee: 2b40 cmp r3, #64 ; 0x40 - 802a1f0: d138 bne.n 802a264 + 802a26e: 68fb ldr r3, [r7, #12] + 802a270: 689b ldr r3, [r3, #8] + 802a272: 2b40 cmp r3, #64 ; 0x40 + 802a274: d138 bne.n 802a2e8 { /* Configure DMA Stream destination address */ ((DMA_Stream_TypeDef *)hdma->Instance)->PAR = DstAddress; - 802a1f2: 68fb ldr r3, [r7, #12] - 802a1f4: 681b ldr r3, [r3, #0] - 802a1f6: 687a ldr r2, [r7, #4] - 802a1f8: 609a str r2, [r3, #8] + 802a276: 68fb ldr r3, [r7, #12] + 802a278: 681b ldr r3, [r3, #0] + 802a27a: 687a ldr r2, [r7, #4] + 802a27c: 609a str r2, [r3, #8] /* Configure DMA Stream source address */ ((DMA_Stream_TypeDef *)hdma->Instance)->M0AR = SrcAddress; - 802a1fa: 68fb ldr r3, [r7, #12] - 802a1fc: 681b ldr r3, [r3, #0] - 802a1fe: 68ba ldr r2, [r7, #8] - 802a200: 60da str r2, [r3, #12] + 802a27e: 68fb ldr r3, [r7, #12] + 802a280: 681b ldr r3, [r3, #0] + 802a282: 68ba ldr r2, [r7, #8] + 802a284: 60da str r2, [r3, #12] } else { /* Nothing To Do */ } } - 802a202: e086 b.n 802a312 - 802a204: 40020010 .word 0x40020010 - 802a208: 40020028 .word 0x40020028 - 802a20c: 40020040 .word 0x40020040 - 802a210: 40020058 .word 0x40020058 - 802a214: 40020070 .word 0x40020070 - 802a218: 40020088 .word 0x40020088 - 802a21c: 400200a0 .word 0x400200a0 - 802a220: 400200b8 .word 0x400200b8 - 802a224: 40020410 .word 0x40020410 - 802a228: 40020428 .word 0x40020428 - 802a22c: 40020440 .word 0x40020440 - 802a230: 40020458 .word 0x40020458 - 802a234: 40020470 .word 0x40020470 - 802a238: 40020488 .word 0x40020488 - 802a23c: 400204a0 .word 0x400204a0 - 802a240: 400204b8 .word 0x400204b8 - 802a244: 58025408 .word 0x58025408 - 802a248: 5802541c .word 0x5802541c - 802a24c: 58025430 .word 0x58025430 - 802a250: 58025444 .word 0x58025444 - 802a254: 58025458 .word 0x58025458 - 802a258: 5802546c .word 0x5802546c - 802a25c: 58025480 .word 0x58025480 - 802a260: 58025494 .word 0x58025494 + 802a286: e086 b.n 802a396 + 802a288: 40020010 .word 0x40020010 + 802a28c: 40020028 .word 0x40020028 + 802a290: 40020040 .word 0x40020040 + 802a294: 40020058 .word 0x40020058 + 802a298: 40020070 .word 0x40020070 + 802a29c: 40020088 .word 0x40020088 + 802a2a0: 400200a0 .word 0x400200a0 + 802a2a4: 400200b8 .word 0x400200b8 + 802a2a8: 40020410 .word 0x40020410 + 802a2ac: 40020428 .word 0x40020428 + 802a2b0: 40020440 .word 0x40020440 + 802a2b4: 40020458 .word 0x40020458 + 802a2b8: 40020470 .word 0x40020470 + 802a2bc: 40020488 .word 0x40020488 + 802a2c0: 400204a0 .word 0x400204a0 + 802a2c4: 400204b8 .word 0x400204b8 + 802a2c8: 58025408 .word 0x58025408 + 802a2cc: 5802541c .word 0x5802541c + 802a2d0: 58025430 .word 0x58025430 + 802a2d4: 58025444 .word 0x58025444 + 802a2d8: 58025458 .word 0x58025458 + 802a2dc: 5802546c .word 0x5802546c + 802a2e0: 58025480 .word 0x58025480 + 802a2e4: 58025494 .word 0x58025494 ((DMA_Stream_TypeDef *)hdma->Instance)->PAR = SrcAddress; - 802a264: 68fb ldr r3, [r7, #12] - 802a266: 681b ldr r3, [r3, #0] - 802a268: 68ba ldr r2, [r7, #8] - 802a26a: 609a str r2, [r3, #8] + 802a2e8: 68fb ldr r3, [r7, #12] + 802a2ea: 681b ldr r3, [r3, #0] + 802a2ec: 68ba ldr r2, [r7, #8] + 802a2ee: 609a str r2, [r3, #8] ((DMA_Stream_TypeDef *)hdma->Instance)->M0AR = DstAddress; - 802a26c: 68fb ldr r3, [r7, #12] - 802a26e: 681b ldr r3, [r3, #0] - 802a270: 687a ldr r2, [r7, #4] - 802a272: 60da str r2, [r3, #12] + 802a2f0: 68fb ldr r3, [r7, #12] + 802a2f2: 681b ldr r3, [r3, #0] + 802a2f4: 687a ldr r2, [r7, #4] + 802a2f6: 60da str r2, [r3, #12] } - 802a274: e04d b.n 802a312 + 802a2f8: e04d b.n 802a396 else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */ - 802a276: 68fb ldr r3, [r7, #12] - 802a278: 681b ldr r3, [r3, #0] - 802a27a: 4a29 ldr r2, [pc, #164] ; (802a320 ) - 802a27c: 4293 cmp r3, r2 - 802a27e: d022 beq.n 802a2c6 - 802a280: 68fb ldr r3, [r7, #12] - 802a282: 681b ldr r3, [r3, #0] - 802a284: 4a27 ldr r2, [pc, #156] ; (802a324 ) - 802a286: 4293 cmp r3, r2 - 802a288: d01d beq.n 802a2c6 - 802a28a: 68fb ldr r3, [r7, #12] - 802a28c: 681b ldr r3, [r3, #0] - 802a28e: 4a26 ldr r2, [pc, #152] ; (802a328 ) - 802a290: 4293 cmp r3, r2 - 802a292: d018 beq.n 802a2c6 - 802a294: 68fb ldr r3, [r7, #12] - 802a296: 681b ldr r3, [r3, #0] - 802a298: 4a24 ldr r2, [pc, #144] ; (802a32c ) - 802a29a: 4293 cmp r3, r2 - 802a29c: d013 beq.n 802a2c6 - 802a29e: 68fb ldr r3, [r7, #12] - 802a2a0: 681b ldr r3, [r3, #0] - 802a2a2: 4a23 ldr r2, [pc, #140] ; (802a330 ) - 802a2a4: 4293 cmp r3, r2 - 802a2a6: d00e beq.n 802a2c6 - 802a2a8: 68fb ldr r3, [r7, #12] - 802a2aa: 681b ldr r3, [r3, #0] - 802a2ac: 4a21 ldr r2, [pc, #132] ; (802a334 ) - 802a2ae: 4293 cmp r3, r2 - 802a2b0: d009 beq.n 802a2c6 - 802a2b2: 68fb ldr r3, [r7, #12] - 802a2b4: 681b ldr r3, [r3, #0] - 802a2b6: 4a20 ldr r2, [pc, #128] ; (802a338 ) - 802a2b8: 4293 cmp r3, r2 - 802a2ba: d004 beq.n 802a2c6 - 802a2bc: 68fb ldr r3, [r7, #12] - 802a2be: 681b ldr r3, [r3, #0] - 802a2c0: 4a1e ldr r2, [pc, #120] ; (802a33c ) - 802a2c2: 4293 cmp r3, r2 - 802a2c4: d101 bne.n 802a2ca - 802a2c6: 2301 movs r3, #1 - 802a2c8: e000 b.n 802a2cc - 802a2ca: 2300 movs r3, #0 - 802a2cc: 2b00 cmp r3, #0 - 802a2ce: d020 beq.n 802a312 + 802a2fa: 68fb ldr r3, [r7, #12] + 802a2fc: 681b ldr r3, [r3, #0] + 802a2fe: 4a29 ldr r2, [pc, #164] ; (802a3a4 ) + 802a300: 4293 cmp r3, r2 + 802a302: d022 beq.n 802a34a + 802a304: 68fb ldr r3, [r7, #12] + 802a306: 681b ldr r3, [r3, #0] + 802a308: 4a27 ldr r2, [pc, #156] ; (802a3a8 ) + 802a30a: 4293 cmp r3, r2 + 802a30c: d01d beq.n 802a34a + 802a30e: 68fb ldr r3, [r7, #12] + 802a310: 681b ldr r3, [r3, #0] + 802a312: 4a26 ldr r2, [pc, #152] ; (802a3ac ) + 802a314: 4293 cmp r3, r2 + 802a316: d018 beq.n 802a34a + 802a318: 68fb ldr r3, [r7, #12] + 802a31a: 681b ldr r3, [r3, #0] + 802a31c: 4a24 ldr r2, [pc, #144] ; (802a3b0 ) + 802a31e: 4293 cmp r3, r2 + 802a320: d013 beq.n 802a34a + 802a322: 68fb ldr r3, [r7, #12] + 802a324: 681b ldr r3, [r3, #0] + 802a326: 4a23 ldr r2, [pc, #140] ; (802a3b4 ) + 802a328: 4293 cmp r3, r2 + 802a32a: d00e beq.n 802a34a + 802a32c: 68fb ldr r3, [r7, #12] + 802a32e: 681b ldr r3, [r3, #0] + 802a330: 4a21 ldr r2, [pc, #132] ; (802a3b8 ) + 802a332: 4293 cmp r3, r2 + 802a334: d009 beq.n 802a34a + 802a336: 68fb ldr r3, [r7, #12] + 802a338: 681b ldr r3, [r3, #0] + 802a33a: 4a20 ldr r2, [pc, #128] ; (802a3bc ) + 802a33c: 4293 cmp r3, r2 + 802a33e: d004 beq.n 802a34a + 802a340: 68fb ldr r3, [r7, #12] + 802a342: 681b ldr r3, [r3, #0] + 802a344: 4a1e ldr r2, [pc, #120] ; (802a3c0 ) + 802a346: 4293 cmp r3, r2 + 802a348: d101 bne.n 802a34e + 802a34a: 2301 movs r3, #1 + 802a34c: e000 b.n 802a350 + 802a34e: 2300 movs r3, #0 + 802a350: 2b00 cmp r3, #0 + 802a352: d020 beq.n 802a396 regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU); - 802a2d0: 68fb ldr r3, [r7, #12] - 802a2d2: 6ddb ldr r3, [r3, #92] ; 0x5c - 802a2d4: f003 031f and.w r3, r3, #31 - 802a2d8: 2201 movs r2, #1 - 802a2da: 409a lsls r2, r3 - 802a2dc: 693b ldr r3, [r7, #16] - 802a2de: 605a str r2, [r3, #4] + 802a354: 68fb ldr r3, [r7, #12] + 802a356: 6ddb ldr r3, [r3, #92] ; 0x5c + 802a358: f003 031f and.w r3, r3, #31 + 802a35c: 2201 movs r2, #1 + 802a35e: 409a lsls r2, r3 + 802a360: 693b ldr r3, [r7, #16] + 802a362: 605a str r2, [r3, #4] ((BDMA_Channel_TypeDef *)hdma->Instance)->CNDTR = DataLength; - 802a2e0: 68fb ldr r3, [r7, #12] - 802a2e2: 681b ldr r3, [r3, #0] - 802a2e4: 683a ldr r2, [r7, #0] - 802a2e6: 605a str r2, [r3, #4] + 802a364: 68fb ldr r3, [r7, #12] + 802a366: 681b ldr r3, [r3, #0] + 802a368: 683a ldr r2, [r7, #0] + 802a36a: 605a str r2, [r3, #4] if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 802a2e8: 68fb ldr r3, [r7, #12] - 802a2ea: 689b ldr r3, [r3, #8] - 802a2ec: 2b40 cmp r3, #64 ; 0x40 - 802a2ee: d108 bne.n 802a302 + 802a36c: 68fb ldr r3, [r7, #12] + 802a36e: 689b ldr r3, [r3, #8] + 802a370: 2b40 cmp r3, #64 ; 0x40 + 802a372: d108 bne.n 802a386 ((BDMA_Channel_TypeDef *)hdma->Instance)->CPAR = DstAddress; - 802a2f0: 68fb ldr r3, [r7, #12] - 802a2f2: 681b ldr r3, [r3, #0] - 802a2f4: 687a ldr r2, [r7, #4] - 802a2f6: 609a str r2, [r3, #8] + 802a374: 68fb ldr r3, [r7, #12] + 802a376: 681b ldr r3, [r3, #0] + 802a378: 687a ldr r2, [r7, #4] + 802a37a: 609a str r2, [r3, #8] ((BDMA_Channel_TypeDef *)hdma->Instance)->CM0AR = SrcAddress; - 802a2f8: 68fb ldr r3, [r7, #12] - 802a2fa: 681b ldr r3, [r3, #0] - 802a2fc: 68ba ldr r2, [r7, #8] - 802a2fe: 60da str r2, [r3, #12] + 802a37c: 68fb ldr r3, [r7, #12] + 802a37e: 681b ldr r3, [r3, #0] + 802a380: 68ba ldr r2, [r7, #8] + 802a382: 60da str r2, [r3, #12] } - 802a300: e007 b.n 802a312 + 802a384: e007 b.n 802a396 ((BDMA_Channel_TypeDef *)hdma->Instance)->CPAR = SrcAddress; - 802a302: 68fb ldr r3, [r7, #12] - 802a304: 681b ldr r3, [r3, #0] - 802a306: 68ba ldr r2, [r7, #8] - 802a308: 609a str r2, [r3, #8] + 802a386: 68fb ldr r3, [r7, #12] + 802a388: 681b ldr r3, [r3, #0] + 802a38a: 68ba ldr r2, [r7, #8] + 802a38c: 609a str r2, [r3, #8] ((BDMA_Channel_TypeDef *)hdma->Instance)->CM0AR = DstAddress; - 802a30a: 68fb ldr r3, [r7, #12] - 802a30c: 681b ldr r3, [r3, #0] - 802a30e: 687a ldr r2, [r7, #4] - 802a310: 60da str r2, [r3, #12] -} - 802a312: bf00 nop - 802a314: 371c adds r7, #28 - 802a316: 46bd mov sp, r7 - 802a318: f85d 7b04 ldr.w r7, [sp], #4 - 802a31c: 4770 bx lr - 802a31e: bf00 nop - 802a320: 58025408 .word 0x58025408 - 802a324: 5802541c .word 0x5802541c - 802a328: 58025430 .word 0x58025430 - 802a32c: 58025444 .word 0x58025444 - 802a330: 58025458 .word 0x58025458 - 802a334: 5802546c .word 0x5802546c - 802a338: 58025480 .word 0x58025480 - 802a33c: 58025494 .word 0x58025494 - -0802a340 : + 802a38e: 68fb ldr r3, [r7, #12] + 802a390: 681b ldr r3, [r3, #0] + 802a392: 687a ldr r2, [r7, #4] + 802a394: 60da str r2, [r3, #12] +} + 802a396: bf00 nop + 802a398: 371c adds r7, #28 + 802a39a: 46bd mov sp, r7 + 802a39c: f85d 7b04 ldr.w r7, [sp], #4 + 802a3a0: 4770 bx lr + 802a3a2: bf00 nop + 802a3a4: 58025408 .word 0x58025408 + 802a3a8: 5802541c .word 0x5802541c + 802a3ac: 58025430 .word 0x58025430 + 802a3b0: 58025444 .word 0x58025444 + 802a3b4: 58025458 .word 0x58025458 + 802a3b8: 5802546c .word 0x5802546c + 802a3bc: 58025480 .word 0x58025480 + 802a3c0: 58025494 .word 0x58025494 + +0802a3c4 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval Stream base address */ static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) { - 802a340: b480 push {r7} - 802a342: b085 sub sp, #20 - 802a344: af00 add r7, sp, #0 - 802a346: 6078 str r0, [r7, #4] + 802a3c4: b480 push {r7} + 802a3c6: b085 sub sp, #20 + 802a3c8: af00 add r7, sp, #0 + 802a3ca: 6078 str r0, [r7, #4] if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */ - 802a348: 687b ldr r3, [r7, #4] - 802a34a: 681b ldr r3, [r3, #0] - 802a34c: 4a42 ldr r2, [pc, #264] ; (802a458 ) - 802a34e: 4293 cmp r3, r2 - 802a350: d04a beq.n 802a3e8 - 802a352: 687b ldr r3, [r7, #4] - 802a354: 681b ldr r3, [r3, #0] - 802a356: 4a41 ldr r2, [pc, #260] ; (802a45c ) - 802a358: 4293 cmp r3, r2 - 802a35a: d045 beq.n 802a3e8 - 802a35c: 687b ldr r3, [r7, #4] - 802a35e: 681b ldr r3, [r3, #0] - 802a360: 4a3f ldr r2, [pc, #252] ; (802a460 ) - 802a362: 4293 cmp r3, r2 - 802a364: d040 beq.n 802a3e8 - 802a366: 687b ldr r3, [r7, #4] - 802a368: 681b ldr r3, [r3, #0] - 802a36a: 4a3e ldr r2, [pc, #248] ; (802a464 ) - 802a36c: 4293 cmp r3, r2 - 802a36e: d03b beq.n 802a3e8 - 802a370: 687b ldr r3, [r7, #4] - 802a372: 681b ldr r3, [r3, #0] - 802a374: 4a3c ldr r2, [pc, #240] ; (802a468 ) - 802a376: 4293 cmp r3, r2 - 802a378: d036 beq.n 802a3e8 - 802a37a: 687b ldr r3, [r7, #4] - 802a37c: 681b ldr r3, [r3, #0] - 802a37e: 4a3b ldr r2, [pc, #236] ; (802a46c ) - 802a380: 4293 cmp r3, r2 - 802a382: d031 beq.n 802a3e8 - 802a384: 687b ldr r3, [r7, #4] - 802a386: 681b ldr r3, [r3, #0] - 802a388: 4a39 ldr r2, [pc, #228] ; (802a470 ) - 802a38a: 4293 cmp r3, r2 - 802a38c: d02c beq.n 802a3e8 - 802a38e: 687b ldr r3, [r7, #4] - 802a390: 681b ldr r3, [r3, #0] - 802a392: 4a38 ldr r2, [pc, #224] ; (802a474 ) - 802a394: 4293 cmp r3, r2 - 802a396: d027 beq.n 802a3e8 - 802a398: 687b ldr r3, [r7, #4] - 802a39a: 681b ldr r3, [r3, #0] - 802a39c: 4a36 ldr r2, [pc, #216] ; (802a478 ) - 802a39e: 4293 cmp r3, r2 - 802a3a0: d022 beq.n 802a3e8 - 802a3a2: 687b ldr r3, [r7, #4] - 802a3a4: 681b ldr r3, [r3, #0] - 802a3a6: 4a35 ldr r2, [pc, #212] ; (802a47c ) - 802a3a8: 4293 cmp r3, r2 - 802a3aa: d01d beq.n 802a3e8 - 802a3ac: 687b ldr r3, [r7, #4] - 802a3ae: 681b ldr r3, [r3, #0] - 802a3b0: 4a33 ldr r2, [pc, #204] ; (802a480 ) - 802a3b2: 4293 cmp r3, r2 - 802a3b4: d018 beq.n 802a3e8 - 802a3b6: 687b ldr r3, [r7, #4] - 802a3b8: 681b ldr r3, [r3, #0] - 802a3ba: 4a32 ldr r2, [pc, #200] ; (802a484 ) - 802a3bc: 4293 cmp r3, r2 - 802a3be: d013 beq.n 802a3e8 - 802a3c0: 687b ldr r3, [r7, #4] - 802a3c2: 681b ldr r3, [r3, #0] - 802a3c4: 4a30 ldr r2, [pc, #192] ; (802a488 ) - 802a3c6: 4293 cmp r3, r2 - 802a3c8: d00e beq.n 802a3e8 - 802a3ca: 687b ldr r3, [r7, #4] - 802a3cc: 681b ldr r3, [r3, #0] - 802a3ce: 4a2f ldr r2, [pc, #188] ; (802a48c ) - 802a3d0: 4293 cmp r3, r2 - 802a3d2: d009 beq.n 802a3e8 - 802a3d4: 687b ldr r3, [r7, #4] - 802a3d6: 681b ldr r3, [r3, #0] - 802a3d8: 4a2d ldr r2, [pc, #180] ; (802a490 ) - 802a3da: 4293 cmp r3, r2 - 802a3dc: d004 beq.n 802a3e8 - 802a3de: 687b ldr r3, [r7, #4] - 802a3e0: 681b ldr r3, [r3, #0] - 802a3e2: 4a2c ldr r2, [pc, #176] ; (802a494 ) - 802a3e4: 4293 cmp r3, r2 - 802a3e6: d101 bne.n 802a3ec - 802a3e8: 2301 movs r3, #1 - 802a3ea: e000 b.n 802a3ee - 802a3ec: 2300 movs r3, #0 - 802a3ee: 2b00 cmp r3, #0 - 802a3f0: d024 beq.n 802a43c + 802a3cc: 687b ldr r3, [r7, #4] + 802a3ce: 681b ldr r3, [r3, #0] + 802a3d0: 4a42 ldr r2, [pc, #264] ; (802a4dc ) + 802a3d2: 4293 cmp r3, r2 + 802a3d4: d04a beq.n 802a46c + 802a3d6: 687b ldr r3, [r7, #4] + 802a3d8: 681b ldr r3, [r3, #0] + 802a3da: 4a41 ldr r2, [pc, #260] ; (802a4e0 ) + 802a3dc: 4293 cmp r3, r2 + 802a3de: d045 beq.n 802a46c + 802a3e0: 687b ldr r3, [r7, #4] + 802a3e2: 681b ldr r3, [r3, #0] + 802a3e4: 4a3f ldr r2, [pc, #252] ; (802a4e4 ) + 802a3e6: 4293 cmp r3, r2 + 802a3e8: d040 beq.n 802a46c + 802a3ea: 687b ldr r3, [r7, #4] + 802a3ec: 681b ldr r3, [r3, #0] + 802a3ee: 4a3e ldr r2, [pc, #248] ; (802a4e8 ) + 802a3f0: 4293 cmp r3, r2 + 802a3f2: d03b beq.n 802a46c + 802a3f4: 687b ldr r3, [r7, #4] + 802a3f6: 681b ldr r3, [r3, #0] + 802a3f8: 4a3c ldr r2, [pc, #240] ; (802a4ec ) + 802a3fa: 4293 cmp r3, r2 + 802a3fc: d036 beq.n 802a46c + 802a3fe: 687b ldr r3, [r7, #4] + 802a400: 681b ldr r3, [r3, #0] + 802a402: 4a3b ldr r2, [pc, #236] ; (802a4f0 ) + 802a404: 4293 cmp r3, r2 + 802a406: d031 beq.n 802a46c + 802a408: 687b ldr r3, [r7, #4] + 802a40a: 681b ldr r3, [r3, #0] + 802a40c: 4a39 ldr r2, [pc, #228] ; (802a4f4 ) + 802a40e: 4293 cmp r3, r2 + 802a410: d02c beq.n 802a46c + 802a412: 687b ldr r3, [r7, #4] + 802a414: 681b ldr r3, [r3, #0] + 802a416: 4a38 ldr r2, [pc, #224] ; (802a4f8 ) + 802a418: 4293 cmp r3, r2 + 802a41a: d027 beq.n 802a46c + 802a41c: 687b ldr r3, [r7, #4] + 802a41e: 681b ldr r3, [r3, #0] + 802a420: 4a36 ldr r2, [pc, #216] ; (802a4fc ) + 802a422: 4293 cmp r3, r2 + 802a424: d022 beq.n 802a46c + 802a426: 687b ldr r3, [r7, #4] + 802a428: 681b ldr r3, [r3, #0] + 802a42a: 4a35 ldr r2, [pc, #212] ; (802a500 ) + 802a42c: 4293 cmp r3, r2 + 802a42e: d01d beq.n 802a46c + 802a430: 687b ldr r3, [r7, #4] + 802a432: 681b ldr r3, [r3, #0] + 802a434: 4a33 ldr r2, [pc, #204] ; (802a504 ) + 802a436: 4293 cmp r3, r2 + 802a438: d018 beq.n 802a46c + 802a43a: 687b ldr r3, [r7, #4] + 802a43c: 681b ldr r3, [r3, #0] + 802a43e: 4a32 ldr r2, [pc, #200] ; (802a508 ) + 802a440: 4293 cmp r3, r2 + 802a442: d013 beq.n 802a46c + 802a444: 687b ldr r3, [r7, #4] + 802a446: 681b ldr r3, [r3, #0] + 802a448: 4a30 ldr r2, [pc, #192] ; (802a50c ) + 802a44a: 4293 cmp r3, r2 + 802a44c: d00e beq.n 802a46c + 802a44e: 687b ldr r3, [r7, #4] + 802a450: 681b ldr r3, [r3, #0] + 802a452: 4a2f ldr r2, [pc, #188] ; (802a510 ) + 802a454: 4293 cmp r3, r2 + 802a456: d009 beq.n 802a46c + 802a458: 687b ldr r3, [r7, #4] + 802a45a: 681b ldr r3, [r3, #0] + 802a45c: 4a2d ldr r2, [pc, #180] ; (802a514 ) + 802a45e: 4293 cmp r3, r2 + 802a460: d004 beq.n 802a46c + 802a462: 687b ldr r3, [r7, #4] + 802a464: 681b ldr r3, [r3, #0] + 802a466: 4a2c ldr r2, [pc, #176] ; (802a518 ) + 802a468: 4293 cmp r3, r2 + 802a46a: d101 bne.n 802a470 + 802a46c: 2301 movs r3, #1 + 802a46e: e000 b.n 802a472 + 802a470: 2300 movs r3, #0 + 802a472: 2b00 cmp r3, #0 + 802a474: d024 beq.n 802a4c0 { uint32_t stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U; - 802a3f2: 687b ldr r3, [r7, #4] - 802a3f4: 681b ldr r3, [r3, #0] - 802a3f6: b2db uxtb r3, r3 - 802a3f8: 3b10 subs r3, #16 - 802a3fa: 4a27 ldr r2, [pc, #156] ; (802a498 ) - 802a3fc: fba2 2303 umull r2, r3, r2, r3 - 802a400: 091b lsrs r3, r3, #4 - 802a402: 60fb str r3, [r7, #12] + 802a476: 687b ldr r3, [r7, #4] + 802a478: 681b ldr r3, [r3, #0] + 802a47a: b2db uxtb r3, r3 + 802a47c: 3b10 subs r3, #16 + 802a47e: 4a27 ldr r2, [pc, #156] ; (802a51c ) + 802a480: fba2 2303 umull r2, r3, r2, r3 + 802a484: 091b lsrs r3, r3, #4 + 802a486: 60fb str r3, [r7, #12] /* lookup table for necessary bitshift of flags within status registers */ static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U}; hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U]; - 802a404: 68fb ldr r3, [r7, #12] - 802a406: f003 0307 and.w r3, r3, #7 - 802a40a: 4a24 ldr r2, [pc, #144] ; (802a49c ) - 802a40c: 5cd3 ldrb r3, [r2, r3] - 802a40e: 461a mov r2, r3 - 802a410: 687b ldr r3, [r7, #4] - 802a412: 65da str r2, [r3, #92] ; 0x5c + 802a488: 68fb ldr r3, [r7, #12] + 802a48a: f003 0307 and.w r3, r3, #7 + 802a48e: 4a24 ldr r2, [pc, #144] ; (802a520 ) + 802a490: 5cd3 ldrb r3, [r2, r3] + 802a492: 461a mov r2, r3 + 802a494: 687b ldr r3, [r7, #4] + 802a496: 65da str r2, [r3, #92] ; 0x5c if (stream_number > 3U) - 802a414: 68fb ldr r3, [r7, #12] - 802a416: 2b03 cmp r3, #3 - 802a418: d908 bls.n 802a42c + 802a498: 68fb ldr r3, [r7, #12] + 802a49a: 2b03 cmp r3, #3 + 802a49c: d908 bls.n 802a4b0 { /* return pointer to HISR and HIFCR */ hdma->StreamBaseAddress = (((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)) + 4U); - 802a41a: 687b ldr r3, [r7, #4] - 802a41c: 681b ldr r3, [r3, #0] - 802a41e: 461a mov r2, r3 - 802a420: 4b1f ldr r3, [pc, #124] ; (802a4a0 ) - 802a422: 4013 ands r3, r2 - 802a424: 1d1a adds r2, r3, #4 - 802a426: 687b ldr r3, [r7, #4] - 802a428: 659a str r2, [r3, #88] ; 0x58 - 802a42a: e00d b.n 802a448 + 802a49e: 687b ldr r3, [r7, #4] + 802a4a0: 681b ldr r3, [r3, #0] + 802a4a2: 461a mov r2, r3 + 802a4a4: 4b1f ldr r3, [pc, #124] ; (802a524 ) + 802a4a6: 4013 ands r3, r2 + 802a4a8: 1d1a adds r2, r3, #4 + 802a4aa: 687b ldr r3, [r7, #4] + 802a4ac: 659a str r2, [r3, #88] ; 0x58 + 802a4ae: e00d b.n 802a4cc } else { /* return pointer to LISR and LIFCR */ hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)); - 802a42c: 687b ldr r3, [r7, #4] - 802a42e: 681b ldr r3, [r3, #0] - 802a430: 461a mov r2, r3 - 802a432: 4b1b ldr r3, [pc, #108] ; (802a4a0 ) - 802a434: 4013 ands r3, r2 - 802a436: 687a ldr r2, [r7, #4] - 802a438: 6593 str r3, [r2, #88] ; 0x58 - 802a43a: e005 b.n 802a448 + 802a4b0: 687b ldr r3, [r7, #4] + 802a4b2: 681b ldr r3, [r3, #0] + 802a4b4: 461a mov r2, r3 + 802a4b6: 4b1b ldr r3, [pc, #108] ; (802a524 ) + 802a4b8: 4013 ands r3, r2 + 802a4ba: 687a ldr r2, [r7, #4] + 802a4bc: 6593 str r3, [r2, #88] ; 0x58 + 802a4be: e005 b.n 802a4cc } } else /* BDMA instance(s) */ { /* return pointer to ISR and IFCR */ hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0xFFU)); - 802a43c: 687b ldr r3, [r7, #4] - 802a43e: 681b ldr r3, [r3, #0] - 802a440: f023 02ff bic.w r2, r3, #255 ; 0xff - 802a444: 687b ldr r3, [r7, #4] - 802a446: 659a str r2, [r3, #88] ; 0x58 + 802a4c0: 687b ldr r3, [r7, #4] + 802a4c2: 681b ldr r3, [r3, #0] + 802a4c4: f023 02ff bic.w r2, r3, #255 ; 0xff + 802a4c8: 687b ldr r3, [r7, #4] + 802a4ca: 659a str r2, [r3, #88] ; 0x58 } return hdma->StreamBaseAddress; - 802a448: 687b ldr r3, [r7, #4] - 802a44a: 6d9b ldr r3, [r3, #88] ; 0x58 -} - 802a44c: 4618 mov r0, r3 - 802a44e: 3714 adds r7, #20 - 802a450: 46bd mov sp, r7 - 802a452: f85d 7b04 ldr.w r7, [sp], #4 - 802a456: 4770 bx lr - 802a458: 40020010 .word 0x40020010 - 802a45c: 40020028 .word 0x40020028 - 802a460: 40020040 .word 0x40020040 - 802a464: 40020058 .word 0x40020058 - 802a468: 40020070 .word 0x40020070 - 802a46c: 40020088 .word 0x40020088 - 802a470: 400200a0 .word 0x400200a0 - 802a474: 400200b8 .word 0x400200b8 - 802a478: 40020410 .word 0x40020410 - 802a47c: 40020428 .word 0x40020428 - 802a480: 40020440 .word 0x40020440 - 802a484: 40020458 .word 0x40020458 - 802a488: 40020470 .word 0x40020470 - 802a48c: 40020488 .word 0x40020488 - 802a490: 400204a0 .word 0x400204a0 - 802a494: 400204b8 .word 0x400204b8 - 802a498: aaaaaaab .word 0xaaaaaaab - 802a49c: 08044ce4 .word 0x08044ce4 - 802a4a0: fffffc00 .word 0xfffffc00 - -0802a4a4 : + 802a4cc: 687b ldr r3, [r7, #4] + 802a4ce: 6d9b ldr r3, [r3, #88] ; 0x58 +} + 802a4d0: 4618 mov r0, r3 + 802a4d2: 3714 adds r7, #20 + 802a4d4: 46bd mov sp, r7 + 802a4d6: f85d 7b04 ldr.w r7, [sp], #4 + 802a4da: 4770 bx lr + 802a4dc: 40020010 .word 0x40020010 + 802a4e0: 40020028 .word 0x40020028 + 802a4e4: 40020040 .word 0x40020040 + 802a4e8: 40020058 .word 0x40020058 + 802a4ec: 40020070 .word 0x40020070 + 802a4f0: 40020088 .word 0x40020088 + 802a4f4: 400200a0 .word 0x400200a0 + 802a4f8: 400200b8 .word 0x400200b8 + 802a4fc: 40020410 .word 0x40020410 + 802a500: 40020428 .word 0x40020428 + 802a504: 40020440 .word 0x40020440 + 802a508: 40020458 .word 0x40020458 + 802a50c: 40020470 .word 0x40020470 + 802a510: 40020488 .word 0x40020488 + 802a514: 400204a0 .word 0x400204a0 + 802a518: 400204b8 .word 0x400204b8 + 802a51c: aaaaaaab .word 0xaaaaaaab + 802a520: 08044d64 .word 0x08044d64 + 802a524: fffffc00 .word 0xfffffc00 + +0802a528 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma) { - 802a4a4: b480 push {r7} - 802a4a6: b085 sub sp, #20 - 802a4a8: af00 add r7, sp, #0 - 802a4aa: 6078 str r0, [r7, #4] + 802a528: b480 push {r7} + 802a52a: b085 sub sp, #20 + 802a52c: af00 add r7, sp, #0 + 802a52e: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 802a4ac: 2300 movs r3, #0 - 802a4ae: 73fb strb r3, [r7, #15] + 802a530: 2300 movs r3, #0 + 802a532: 73fb strb r3, [r7, #15] /* Memory Data size equal to Byte */ if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE) - 802a4b0: 687b ldr r3, [r7, #4] - 802a4b2: 699b ldr r3, [r3, #24] - 802a4b4: 2b00 cmp r3, #0 - 802a4b6: d120 bne.n 802a4fa + 802a534: 687b ldr r3, [r7, #4] + 802a536: 699b ldr r3, [r3, #24] + 802a538: 2b00 cmp r3, #0 + 802a53a: d120 bne.n 802a57e { switch (hdma->Init.FIFOThreshold) - 802a4b8: 687b ldr r3, [r7, #4] - 802a4ba: 6a9b ldr r3, [r3, #40] ; 0x28 - 802a4bc: 2b03 cmp r3, #3 - 802a4be: d858 bhi.n 802a572 - 802a4c0: a201 add r2, pc, #4 ; (adr r2, 802a4c8 ) - 802a4c2: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 802a4c6: bf00 nop - 802a4c8: 0802a4d9 .word 0x0802a4d9 - 802a4cc: 0802a4eb .word 0x0802a4eb - 802a4d0: 0802a4d9 .word 0x0802a4d9 - 802a4d4: 0802a573 .word 0x0802a573 + 802a53c: 687b ldr r3, [r7, #4] + 802a53e: 6a9b ldr r3, [r3, #40] ; 0x28 + 802a540: 2b03 cmp r3, #3 + 802a542: d858 bhi.n 802a5f6 + 802a544: a201 add r2, pc, #4 ; (adr r2, 802a54c ) + 802a546: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 802a54a: bf00 nop + 802a54c: 0802a55d .word 0x0802a55d + 802a550: 0802a56f .word 0x0802a56f + 802a554: 0802a55d .word 0x0802a55d + 802a558: 0802a5f7 .word 0x0802a5f7 { case DMA_FIFO_THRESHOLD_1QUARTERFULL: case DMA_FIFO_THRESHOLD_3QUARTERSFULL: if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) - 802a4d8: 687b ldr r3, [r7, #4] - 802a4da: 6adb ldr r3, [r3, #44] ; 0x2c - 802a4dc: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 802a4e0: 2b00 cmp r3, #0 - 802a4e2: d048 beq.n 802a576 + 802a55c: 687b ldr r3, [r7, #4] + 802a55e: 6adb ldr r3, [r3, #44] ; 0x2c + 802a560: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 802a564: 2b00 cmp r3, #0 + 802a566: d048 beq.n 802a5fa { status = HAL_ERROR; - 802a4e4: 2301 movs r3, #1 - 802a4e6: 73fb strb r3, [r7, #15] + 802a568: 2301 movs r3, #1 + 802a56a: 73fb strb r3, [r7, #15] } break; - 802a4e8: e045 b.n 802a576 + 802a56c: e045 b.n 802a5fa case DMA_FIFO_THRESHOLD_HALFFULL: if (hdma->Init.MemBurst == DMA_MBURST_INC16) - 802a4ea: 687b ldr r3, [r7, #4] - 802a4ec: 6adb ldr r3, [r3, #44] ; 0x2c - 802a4ee: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 - 802a4f2: d142 bne.n 802a57a + 802a56e: 687b ldr r3, [r7, #4] + 802a570: 6adb ldr r3, [r3, #44] ; 0x2c + 802a572: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 + 802a576: d142 bne.n 802a5fe { status = HAL_ERROR; - 802a4f4: 2301 movs r3, #1 - 802a4f6: 73fb strb r3, [r7, #15] + 802a578: 2301 movs r3, #1 + 802a57a: 73fb strb r3, [r7, #15] } break; - 802a4f8: e03f b.n 802a57a + 802a57c: e03f b.n 802a5fe break; } } /* Memory Data size equal to Half-Word */ else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD) - 802a4fa: 687b ldr r3, [r7, #4] - 802a4fc: 699b ldr r3, [r3, #24] - 802a4fe: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 802a502: d123 bne.n 802a54c + 802a57e: 687b ldr r3, [r7, #4] + 802a580: 699b ldr r3, [r3, #24] + 802a582: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 802a586: d123 bne.n 802a5d0 { switch (hdma->Init.FIFOThreshold) - 802a504: 687b ldr r3, [r7, #4] - 802a506: 6a9b ldr r3, [r3, #40] ; 0x28 - 802a508: 2b03 cmp r3, #3 - 802a50a: d838 bhi.n 802a57e - 802a50c: a201 add r2, pc, #4 ; (adr r2, 802a514 ) - 802a50e: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 802a512: bf00 nop - 802a514: 0802a525 .word 0x0802a525 - 802a518: 0802a52b .word 0x0802a52b - 802a51c: 0802a525 .word 0x0802a525 - 802a520: 0802a53d .word 0x0802a53d + 802a588: 687b ldr r3, [r7, #4] + 802a58a: 6a9b ldr r3, [r3, #40] ; 0x28 + 802a58c: 2b03 cmp r3, #3 + 802a58e: d838 bhi.n 802a602 + 802a590: a201 add r2, pc, #4 ; (adr r2, 802a598 ) + 802a592: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 802a596: bf00 nop + 802a598: 0802a5a9 .word 0x0802a5a9 + 802a59c: 0802a5af .word 0x0802a5af + 802a5a0: 0802a5a9 .word 0x0802a5a9 + 802a5a4: 0802a5c1 .word 0x0802a5c1 { case DMA_FIFO_THRESHOLD_1QUARTERFULL: case DMA_FIFO_THRESHOLD_3QUARTERSFULL: status = HAL_ERROR; - 802a524: 2301 movs r3, #1 - 802a526: 73fb strb r3, [r7, #15] + 802a5a8: 2301 movs r3, #1 + 802a5aa: 73fb strb r3, [r7, #15] break; - 802a528: e030 b.n 802a58c + 802a5ac: e030 b.n 802a610 case DMA_FIFO_THRESHOLD_HALFFULL: if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) - 802a52a: 687b ldr r3, [r7, #4] - 802a52c: 6adb ldr r3, [r3, #44] ; 0x2c - 802a52e: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 802a532: 2b00 cmp r3, #0 - 802a534: d025 beq.n 802a582 + 802a5ae: 687b ldr r3, [r7, #4] + 802a5b0: 6adb ldr r3, [r3, #44] ; 0x2c + 802a5b2: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 802a5b6: 2b00 cmp r3, #0 + 802a5b8: d025 beq.n 802a606 { status = HAL_ERROR; - 802a536: 2301 movs r3, #1 - 802a538: 73fb strb r3, [r7, #15] + 802a5ba: 2301 movs r3, #1 + 802a5bc: 73fb strb r3, [r7, #15] } break; - 802a53a: e022 b.n 802a582 + 802a5be: e022 b.n 802a606 case DMA_FIFO_THRESHOLD_FULL: if (hdma->Init.MemBurst == DMA_MBURST_INC16) - 802a53c: 687b ldr r3, [r7, #4] - 802a53e: 6adb ldr r3, [r3, #44] ; 0x2c - 802a540: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 - 802a544: d11f bne.n 802a586 + 802a5c0: 687b ldr r3, [r7, #4] + 802a5c2: 6adb ldr r3, [r3, #44] ; 0x2c + 802a5c4: f1b3 7fc0 cmp.w r3, #25165824 ; 0x1800000 + 802a5c8: d11f bne.n 802a60a { status = HAL_ERROR; - 802a546: 2301 movs r3, #1 - 802a548: 73fb strb r3, [r7, #15] + 802a5ca: 2301 movs r3, #1 + 802a5cc: 73fb strb r3, [r7, #15] } break; - 802a54a: e01c b.n 802a586 + 802a5ce: e01c b.n 802a60a } /* Memory Data size equal to Word */ else { switch (hdma->Init.FIFOThreshold) - 802a54c: 687b ldr r3, [r7, #4] - 802a54e: 6a9b ldr r3, [r3, #40] ; 0x28 - 802a550: 2b02 cmp r3, #2 - 802a552: d902 bls.n 802a55a - 802a554: 2b03 cmp r3, #3 - 802a556: d003 beq.n 802a560 + 802a5d0: 687b ldr r3, [r7, #4] + 802a5d2: 6a9b ldr r3, [r3, #40] ; 0x28 + 802a5d4: 2b02 cmp r3, #2 + 802a5d6: d902 bls.n 802a5de + 802a5d8: 2b03 cmp r3, #3 + 802a5da: d003 beq.n 802a5e4 status = HAL_ERROR; } break; default: break; - 802a558: e018 b.n 802a58c + 802a5dc: e018 b.n 802a610 status = HAL_ERROR; - 802a55a: 2301 movs r3, #1 - 802a55c: 73fb strb r3, [r7, #15] + 802a5de: 2301 movs r3, #1 + 802a5e0: 73fb strb r3, [r7, #15] break; - 802a55e: e015 b.n 802a58c + 802a5e2: e015 b.n 802a610 if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1) - 802a560: 687b ldr r3, [r7, #4] - 802a562: 6adb ldr r3, [r3, #44] ; 0x2c - 802a564: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 802a568: 2b00 cmp r3, #0 - 802a56a: d00e beq.n 802a58a + 802a5e4: 687b ldr r3, [r7, #4] + 802a5e6: 6adb ldr r3, [r3, #44] ; 0x2c + 802a5e8: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 802a5ec: 2b00 cmp r3, #0 + 802a5ee: d00e beq.n 802a60e status = HAL_ERROR; - 802a56c: 2301 movs r3, #1 - 802a56e: 73fb strb r3, [r7, #15] + 802a5f0: 2301 movs r3, #1 + 802a5f2: 73fb strb r3, [r7, #15] break; - 802a570: e00b b.n 802a58a + 802a5f4: e00b b.n 802a60e break; - 802a572: bf00 nop - 802a574: e00a b.n 802a58c + 802a5f6: bf00 nop + 802a5f8: e00a b.n 802a610 break; - 802a576: bf00 nop - 802a578: e008 b.n 802a58c + 802a5fa: bf00 nop + 802a5fc: e008 b.n 802a610 break; - 802a57a: bf00 nop - 802a57c: e006 b.n 802a58c + 802a5fe: bf00 nop + 802a600: e006 b.n 802a610 break; - 802a57e: bf00 nop - 802a580: e004 b.n 802a58c + 802a602: bf00 nop + 802a604: e004 b.n 802a610 break; - 802a582: bf00 nop - 802a584: e002 b.n 802a58c + 802a606: bf00 nop + 802a608: e002 b.n 802a610 break; - 802a586: bf00 nop - 802a588: e000 b.n 802a58c + 802a60a: bf00 nop + 802a60c: e000 b.n 802a610 break; - 802a58a: bf00 nop + 802a60e: bf00 nop } } return status; - 802a58c: 7bfb ldrb r3, [r7, #15] + 802a610: 7bfb ldrb r3, [r7, #15] } - 802a58e: 4618 mov r0, r3 - 802a590: 3714 adds r7, #20 - 802a592: 46bd mov sp, r7 - 802a594: f85d 7b04 ldr.w r7, [sp], #4 - 802a598: 4770 bx lr - 802a59a: bf00 nop + 802a612: 4618 mov r0, r3 + 802a614: 3714 adds r7, #20 + 802a616: 46bd mov sp, r7 + 802a618: f85d 7b04 ldr.w r7, [sp], #4 + 802a61c: 4770 bx lr + 802a61e: bf00 nop -0802a59c : +0802a620 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma) { - 802a59c: b480 push {r7} - 802a59e: b085 sub sp, #20 - 802a5a0: af00 add r7, sp, #0 - 802a5a2: 6078 str r0, [r7, #4] + 802a620: b480 push {r7} + 802a622: b085 sub sp, #20 + 802a624: af00 add r7, sp, #0 + 802a626: 6078 str r0, [r7, #4] uint32_t stream_number; uint32_t stream_baseaddress = (uint32_t)((uint32_t*)hdma->Instance); - 802a5a4: 687b ldr r3, [r7, #4] - 802a5a6: 681b ldr r3, [r3, #0] - 802a5a8: 60bb str r3, [r7, #8] + 802a628: 687b ldr r3, [r7, #4] + 802a62a: 681b ldr r3, [r3, #0] + 802a62c: 60bb str r3, [r7, #8] if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U) - 802a5aa: 687b ldr r3, [r7, #4] - 802a5ac: 681b ldr r3, [r3, #0] - 802a5ae: 4a38 ldr r2, [pc, #224] ; (802a690 ) - 802a5b0: 4293 cmp r3, r2 - 802a5b2: d022 beq.n 802a5fa - 802a5b4: 687b ldr r3, [r7, #4] - 802a5b6: 681b ldr r3, [r3, #0] - 802a5b8: 4a36 ldr r2, [pc, #216] ; (802a694 ) - 802a5ba: 4293 cmp r3, r2 - 802a5bc: d01d beq.n 802a5fa - 802a5be: 687b ldr r3, [r7, #4] - 802a5c0: 681b ldr r3, [r3, #0] - 802a5c2: 4a35 ldr r2, [pc, #212] ; (802a698 ) - 802a5c4: 4293 cmp r3, r2 - 802a5c6: d018 beq.n 802a5fa - 802a5c8: 687b ldr r3, [r7, #4] - 802a5ca: 681b ldr r3, [r3, #0] - 802a5cc: 4a33 ldr r2, [pc, #204] ; (802a69c ) - 802a5ce: 4293 cmp r3, r2 - 802a5d0: d013 beq.n 802a5fa - 802a5d2: 687b ldr r3, [r7, #4] - 802a5d4: 681b ldr r3, [r3, #0] - 802a5d6: 4a32 ldr r2, [pc, #200] ; (802a6a0 ) - 802a5d8: 4293 cmp r3, r2 - 802a5da: d00e beq.n 802a5fa - 802a5dc: 687b ldr r3, [r7, #4] - 802a5de: 681b ldr r3, [r3, #0] - 802a5e0: 4a30 ldr r2, [pc, #192] ; (802a6a4 ) - 802a5e2: 4293 cmp r3, r2 - 802a5e4: d009 beq.n 802a5fa - 802a5e6: 687b ldr r3, [r7, #4] - 802a5e8: 681b ldr r3, [r3, #0] - 802a5ea: 4a2f ldr r2, [pc, #188] ; (802a6a8 ) - 802a5ec: 4293 cmp r3, r2 - 802a5ee: d004 beq.n 802a5fa - 802a5f0: 687b ldr r3, [r7, #4] - 802a5f2: 681b ldr r3, [r3, #0] - 802a5f4: 4a2d ldr r2, [pc, #180] ; (802a6ac ) - 802a5f6: 4293 cmp r3, r2 - 802a5f8: d101 bne.n 802a5fe - 802a5fa: 2301 movs r3, #1 - 802a5fc: e000 b.n 802a600 - 802a5fe: 2300 movs r3, #0 - 802a600: 2b00 cmp r3, #0 - 802a602: d01a beq.n 802a63a + 802a62e: 687b ldr r3, [r7, #4] + 802a630: 681b ldr r3, [r3, #0] + 802a632: 4a38 ldr r2, [pc, #224] ; (802a714 ) + 802a634: 4293 cmp r3, r2 + 802a636: d022 beq.n 802a67e + 802a638: 687b ldr r3, [r7, #4] + 802a63a: 681b ldr r3, [r3, #0] + 802a63c: 4a36 ldr r2, [pc, #216] ; (802a718 ) + 802a63e: 4293 cmp r3, r2 + 802a640: d01d beq.n 802a67e + 802a642: 687b ldr r3, [r7, #4] + 802a644: 681b ldr r3, [r3, #0] + 802a646: 4a35 ldr r2, [pc, #212] ; (802a71c ) + 802a648: 4293 cmp r3, r2 + 802a64a: d018 beq.n 802a67e + 802a64c: 687b ldr r3, [r7, #4] + 802a64e: 681b ldr r3, [r3, #0] + 802a650: 4a33 ldr r2, [pc, #204] ; (802a720 ) + 802a652: 4293 cmp r3, r2 + 802a654: d013 beq.n 802a67e + 802a656: 687b ldr r3, [r7, #4] + 802a658: 681b ldr r3, [r3, #0] + 802a65a: 4a32 ldr r2, [pc, #200] ; (802a724 ) + 802a65c: 4293 cmp r3, r2 + 802a65e: d00e beq.n 802a67e + 802a660: 687b ldr r3, [r7, #4] + 802a662: 681b ldr r3, [r3, #0] + 802a664: 4a30 ldr r2, [pc, #192] ; (802a728 ) + 802a666: 4293 cmp r3, r2 + 802a668: d009 beq.n 802a67e + 802a66a: 687b ldr r3, [r7, #4] + 802a66c: 681b ldr r3, [r3, #0] + 802a66e: 4a2f ldr r2, [pc, #188] ; (802a72c ) + 802a670: 4293 cmp r3, r2 + 802a672: d004 beq.n 802a67e + 802a674: 687b ldr r3, [r7, #4] + 802a676: 681b ldr r3, [r3, #0] + 802a678: 4a2d ldr r2, [pc, #180] ; (802a730 ) + 802a67a: 4293 cmp r3, r2 + 802a67c: d101 bne.n 802a682 + 802a67e: 2301 movs r3, #1 + 802a680: e000 b.n 802a684 + 802a682: 2300 movs r3, #0 + 802a684: 2b00 cmp r3, #0 + 802a686: d01a beq.n 802a6be { /* BDMA Channels are connected to DMAMUX2 channels */ stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 8U) / 20U; - 802a604: 687b ldr r3, [r7, #4] - 802a606: 681b ldr r3, [r3, #0] - 802a608: b2db uxtb r3, r3 - 802a60a: 3b08 subs r3, #8 - 802a60c: 4a28 ldr r2, [pc, #160] ; (802a6b0 ) - 802a60e: fba2 2303 umull r2, r3, r2, r3 - 802a612: 091b lsrs r3, r3, #4 - 802a614: 60fb str r3, [r7, #12] + 802a688: 687b ldr r3, [r7, #4] + 802a68a: 681b ldr r3, [r3, #0] + 802a68c: b2db uxtb r3, r3 + 802a68e: 3b08 subs r3, #8 + 802a690: 4a28 ldr r2, [pc, #160] ; (802a734 ) + 802a692: fba2 2303 umull r2, r3, r2, r3 + 802a696: 091b lsrs r3, r3, #4 + 802a698: 60fb str r3, [r7, #12] hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_Channel0) + (stream_number * 4U))); - 802a616: 68fa ldr r2, [r7, #12] - 802a618: 4b26 ldr r3, [pc, #152] ; (802a6b4 ) - 802a61a: 4413 add r3, r2 - 802a61c: 009b lsls r3, r3, #2 - 802a61e: 461a mov r2, r3 - 802a620: 687b ldr r3, [r7, #4] - 802a622: 661a str r2, [r3, #96] ; 0x60 + 802a69a: 68fa ldr r2, [r7, #12] + 802a69c: 4b26 ldr r3, [pc, #152] ; (802a738 ) + 802a69e: 4413 add r3, r2 + 802a6a0: 009b lsls r3, r3, #2 + 802a6a2: 461a mov r2, r3 + 802a6a4: 687b ldr r3, [r7, #4] + 802a6a6: 661a str r2, [r3, #96] ; 0x60 hdma->DMAmuxChannelStatus = DMAMUX2_ChannelStatus; - 802a624: 687b ldr r3, [r7, #4] - 802a626: 4a24 ldr r2, [pc, #144] ; (802a6b8 ) - 802a628: 665a str r2, [r3, #100] ; 0x64 + 802a6a8: 687b ldr r3, [r7, #4] + 802a6aa: 4a24 ldr r2, [pc, #144] ; (802a73c ) + 802a6ac: 665a str r2, [r3, #100] ; 0x64 hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU); - 802a62a: 68fb ldr r3, [r7, #12] - 802a62c: f003 031f and.w r3, r3, #31 - 802a630: 2201 movs r2, #1 - 802a632: 409a lsls r2, r3 - 802a634: 687b ldr r3, [r7, #4] - 802a636: 669a str r2, [r3, #104] ; 0x68 + 802a6ae: 68fb ldr r3, [r7, #12] + 802a6b0: f003 031f and.w r3, r3, #31 + 802a6b4: 2201 movs r2, #1 + 802a6b6: 409a lsls r2, r3 + 802a6b8: 687b ldr r3, [r7, #4] + 802a6ba: 669a str r2, [r3, #104] ; 0x68 } hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U))); hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU); } } - 802a638: e024 b.n 802a684 + 802a6bc: e024 b.n 802a708 stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U; - 802a63a: 687b ldr r3, [r7, #4] - 802a63c: 681b ldr r3, [r3, #0] - 802a63e: b2db uxtb r3, r3 - 802a640: 3b10 subs r3, #16 - 802a642: 4a1e ldr r2, [pc, #120] ; (802a6bc ) - 802a644: fba2 2303 umull r2, r3, r2, r3 - 802a648: 091b lsrs r3, r3, #4 - 802a64a: 60fb str r3, [r7, #12] + 802a6be: 687b ldr r3, [r7, #4] + 802a6c0: 681b ldr r3, [r3, #0] + 802a6c2: b2db uxtb r3, r3 + 802a6c4: 3b10 subs r3, #16 + 802a6c6: 4a1e ldr r2, [pc, #120] ; (802a740 ) + 802a6c8: fba2 2303 umull r2, r3, r2, r3 + 802a6cc: 091b lsrs r3, r3, #4 + 802a6ce: 60fb str r3, [r7, #12] if((stream_baseaddress <= ((uint32_t)DMA2_Stream7) ) && \ - 802a64c: 68bb ldr r3, [r7, #8] - 802a64e: 4a1c ldr r2, [pc, #112] ; (802a6c0 ) - 802a650: 4293 cmp r3, r2 - 802a652: d806 bhi.n 802a662 - 802a654: 68bb ldr r3, [r7, #8] - 802a656: 4a1b ldr r2, [pc, #108] ; (802a6c4 ) - 802a658: 4293 cmp r3, r2 - 802a65a: d902 bls.n 802a662 + 802a6d0: 68bb ldr r3, [r7, #8] + 802a6d2: 4a1c ldr r2, [pc, #112] ; (802a744 ) + 802a6d4: 4293 cmp r3, r2 + 802a6d6: d806 bhi.n 802a6e6 + 802a6d8: 68bb ldr r3, [r7, #8] + 802a6da: 4a1b ldr r2, [pc, #108] ; (802a748 ) + 802a6dc: 4293 cmp r3, r2 + 802a6de: d902 bls.n 802a6e6 stream_number += 8U; - 802a65c: 68fb ldr r3, [r7, #12] - 802a65e: 3308 adds r3, #8 - 802a660: 60fb str r3, [r7, #12] + 802a6e0: 68fb ldr r3, [r7, #12] + 802a6e2: 3308 adds r3, #8 + 802a6e4: 60fb str r3, [r7, #12] hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U))); - 802a662: 68fa ldr r2, [r7, #12] - 802a664: 4b18 ldr r3, [pc, #96] ; (802a6c8 ) - 802a666: 4413 add r3, r2 - 802a668: 009b lsls r3, r3, #2 - 802a66a: 461a mov r2, r3 - 802a66c: 687b ldr r3, [r7, #4] - 802a66e: 661a str r2, [r3, #96] ; 0x60 + 802a6e6: 68fa ldr r2, [r7, #12] + 802a6e8: 4b18 ldr r3, [pc, #96] ; (802a74c ) + 802a6ea: 4413 add r3, r2 + 802a6ec: 009b lsls r3, r3, #2 + 802a6ee: 461a mov r2, r3 + 802a6f0: 687b ldr r3, [r7, #4] + 802a6f2: 661a str r2, [r3, #96] ; 0x60 hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus; - 802a670: 687b ldr r3, [r7, #4] - 802a672: 4a16 ldr r2, [pc, #88] ; (802a6cc ) - 802a674: 665a str r2, [r3, #100] ; 0x64 + 802a6f4: 687b ldr r3, [r7, #4] + 802a6f6: 4a16 ldr r2, [pc, #88] ; (802a750 ) + 802a6f8: 665a str r2, [r3, #100] ; 0x64 hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU); - 802a676: 68fb ldr r3, [r7, #12] - 802a678: f003 031f and.w r3, r3, #31 - 802a67c: 2201 movs r2, #1 - 802a67e: 409a lsls r2, r3 - 802a680: 687b ldr r3, [r7, #4] - 802a682: 669a str r2, [r3, #104] ; 0x68 -} - 802a684: bf00 nop - 802a686: 3714 adds r7, #20 - 802a688: 46bd mov sp, r7 - 802a68a: f85d 7b04 ldr.w r7, [sp], #4 - 802a68e: 4770 bx lr - 802a690: 58025408 .word 0x58025408 - 802a694: 5802541c .word 0x5802541c - 802a698: 58025430 .word 0x58025430 - 802a69c: 58025444 .word 0x58025444 - 802a6a0: 58025458 .word 0x58025458 - 802a6a4: 5802546c .word 0x5802546c - 802a6a8: 58025480 .word 0x58025480 - 802a6ac: 58025494 .word 0x58025494 - 802a6b0: cccccccd .word 0xcccccccd - 802a6b4: 16009600 .word 0x16009600 - 802a6b8: 58025880 .word 0x58025880 - 802a6bc: aaaaaaab .word 0xaaaaaaab - 802a6c0: 400204b8 .word 0x400204b8 - 802a6c4: 4002040f .word 0x4002040f - 802a6c8: 10008200 .word 0x10008200 - 802a6cc: 40020880 .word 0x40020880 - -0802a6d0 : + 802a6fa: 68fb ldr r3, [r7, #12] + 802a6fc: f003 031f and.w r3, r3, #31 + 802a700: 2201 movs r2, #1 + 802a702: 409a lsls r2, r3 + 802a704: 687b ldr r3, [r7, #4] + 802a706: 669a str r2, [r3, #104] ; 0x68 +} + 802a708: bf00 nop + 802a70a: 3714 adds r7, #20 + 802a70c: 46bd mov sp, r7 + 802a70e: f85d 7b04 ldr.w r7, [sp], #4 + 802a712: 4770 bx lr + 802a714: 58025408 .word 0x58025408 + 802a718: 5802541c .word 0x5802541c + 802a71c: 58025430 .word 0x58025430 + 802a720: 58025444 .word 0x58025444 + 802a724: 58025458 .word 0x58025458 + 802a728: 5802546c .word 0x5802546c + 802a72c: 58025480 .word 0x58025480 + 802a730: 58025494 .word 0x58025494 + 802a734: cccccccd .word 0xcccccccd + 802a738: 16009600 .word 0x16009600 + 802a73c: 58025880 .word 0x58025880 + 802a740: aaaaaaab .word 0xaaaaaaab + 802a744: 400204b8 .word 0x400204b8 + 802a748: 4002040f .word 0x4002040f + 802a74c: 10008200 .word 0x10008200 + 802a750: 40020880 .word 0x40020880 + +0802a754 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Stream. * @retval HAL status */ static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma) { - 802a6d0: b480 push {r7} - 802a6d2: b085 sub sp, #20 - 802a6d4: af00 add r7, sp, #0 - 802a6d6: 6078 str r0, [r7, #4] + 802a754: b480 push {r7} + 802a756: b085 sub sp, #20 + 802a758: af00 add r7, sp, #0 + 802a75a: 6078 str r0, [r7, #4] uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID; - 802a6d8: 687b ldr r3, [r7, #4] - 802a6da: 685b ldr r3, [r3, #4] - 802a6dc: b2db uxtb r3, r3 - 802a6de: 60fb str r3, [r7, #12] + 802a75c: 687b ldr r3, [r7, #4] + 802a75e: 685b ldr r3, [r3, #4] + 802a760: b2db uxtb r3, r3 + 802a762: 60fb str r3, [r7, #12] if((request >= DMA_REQUEST_GENERATOR0) && (request <= DMA_REQUEST_GENERATOR7)) - 802a6e0: 68fb ldr r3, [r7, #12] - 802a6e2: 2b00 cmp r3, #0 - 802a6e4: d04a beq.n 802a77c - 802a6e6: 68fb ldr r3, [r7, #12] - 802a6e8: 2b08 cmp r3, #8 - 802a6ea: d847 bhi.n 802a77c + 802a764: 68fb ldr r3, [r7, #12] + 802a766: 2b00 cmp r3, #0 + 802a768: d04a beq.n 802a800 + 802a76a: 68fb ldr r3, [r7, #12] + 802a76c: 2b08 cmp r3, #8 + 802a76e: d847 bhi.n 802a800 { if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U) - 802a6ec: 687b ldr r3, [r7, #4] - 802a6ee: 681b ldr r3, [r3, #0] - 802a6f0: 4a25 ldr r2, [pc, #148] ; (802a788 ) - 802a6f2: 4293 cmp r3, r2 - 802a6f4: d022 beq.n 802a73c - 802a6f6: 687b ldr r3, [r7, #4] - 802a6f8: 681b ldr r3, [r3, #0] - 802a6fa: 4a24 ldr r2, [pc, #144] ; (802a78c ) - 802a6fc: 4293 cmp r3, r2 - 802a6fe: d01d beq.n 802a73c - 802a700: 687b ldr r3, [r7, #4] - 802a702: 681b ldr r3, [r3, #0] - 802a704: 4a22 ldr r2, [pc, #136] ; (802a790 ) - 802a706: 4293 cmp r3, r2 - 802a708: d018 beq.n 802a73c - 802a70a: 687b ldr r3, [r7, #4] - 802a70c: 681b ldr r3, [r3, #0] - 802a70e: 4a21 ldr r2, [pc, #132] ; (802a794 ) - 802a710: 4293 cmp r3, r2 - 802a712: d013 beq.n 802a73c - 802a714: 687b ldr r3, [r7, #4] - 802a716: 681b ldr r3, [r3, #0] - 802a718: 4a1f ldr r2, [pc, #124] ; (802a798 ) - 802a71a: 4293 cmp r3, r2 - 802a71c: d00e beq.n 802a73c - 802a71e: 687b ldr r3, [r7, #4] - 802a720: 681b ldr r3, [r3, #0] - 802a722: 4a1e ldr r2, [pc, #120] ; (802a79c ) - 802a724: 4293 cmp r3, r2 - 802a726: d009 beq.n 802a73c - 802a728: 687b ldr r3, [r7, #4] - 802a72a: 681b ldr r3, [r3, #0] - 802a72c: 4a1c ldr r2, [pc, #112] ; (802a7a0 ) - 802a72e: 4293 cmp r3, r2 - 802a730: d004 beq.n 802a73c - 802a732: 687b ldr r3, [r7, #4] - 802a734: 681b ldr r3, [r3, #0] - 802a736: 4a1b ldr r2, [pc, #108] ; (802a7a4 ) - 802a738: 4293 cmp r3, r2 - 802a73a: d101 bne.n 802a740 - 802a73c: 2301 movs r3, #1 - 802a73e: e000 b.n 802a742 - 802a740: 2300 movs r3, #0 - 802a742: 2b00 cmp r3, #0 - 802a744: d00a beq.n 802a75c + 802a770: 687b ldr r3, [r7, #4] + 802a772: 681b ldr r3, [r3, #0] + 802a774: 4a25 ldr r2, [pc, #148] ; (802a80c ) + 802a776: 4293 cmp r3, r2 + 802a778: d022 beq.n 802a7c0 + 802a77a: 687b ldr r3, [r7, #4] + 802a77c: 681b ldr r3, [r3, #0] + 802a77e: 4a24 ldr r2, [pc, #144] ; (802a810 ) + 802a780: 4293 cmp r3, r2 + 802a782: d01d beq.n 802a7c0 + 802a784: 687b ldr r3, [r7, #4] + 802a786: 681b ldr r3, [r3, #0] + 802a788: 4a22 ldr r2, [pc, #136] ; (802a814 ) + 802a78a: 4293 cmp r3, r2 + 802a78c: d018 beq.n 802a7c0 + 802a78e: 687b ldr r3, [r7, #4] + 802a790: 681b ldr r3, [r3, #0] + 802a792: 4a21 ldr r2, [pc, #132] ; (802a818 ) + 802a794: 4293 cmp r3, r2 + 802a796: d013 beq.n 802a7c0 + 802a798: 687b ldr r3, [r7, #4] + 802a79a: 681b ldr r3, [r3, #0] + 802a79c: 4a1f ldr r2, [pc, #124] ; (802a81c ) + 802a79e: 4293 cmp r3, r2 + 802a7a0: d00e beq.n 802a7c0 + 802a7a2: 687b ldr r3, [r7, #4] + 802a7a4: 681b ldr r3, [r3, #0] + 802a7a6: 4a1e ldr r2, [pc, #120] ; (802a820 ) + 802a7a8: 4293 cmp r3, r2 + 802a7aa: d009 beq.n 802a7c0 + 802a7ac: 687b ldr r3, [r7, #4] + 802a7ae: 681b ldr r3, [r3, #0] + 802a7b0: 4a1c ldr r2, [pc, #112] ; (802a824 ) + 802a7b2: 4293 cmp r3, r2 + 802a7b4: d004 beq.n 802a7c0 + 802a7b6: 687b ldr r3, [r7, #4] + 802a7b8: 681b ldr r3, [r3, #0] + 802a7ba: 4a1b ldr r2, [pc, #108] ; (802a828 ) + 802a7bc: 4293 cmp r3, r2 + 802a7be: d101 bne.n 802a7c4 + 802a7c0: 2301 movs r3, #1 + 802a7c2: e000 b.n 802a7c6 + 802a7c4: 2300 movs r3, #0 + 802a7c6: 2b00 cmp r3, #0 + 802a7c8: d00a beq.n 802a7e0 { /* BDMA Channels are connected to DMAMUX2 request generator blocks */ hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_RequestGenerator0) + ((request - 1U) * 4U))); - 802a746: 68fa ldr r2, [r7, #12] - 802a748: 4b17 ldr r3, [pc, #92] ; (802a7a8 ) - 802a74a: 4413 add r3, r2 - 802a74c: 009b lsls r3, r3, #2 - 802a74e: 461a mov r2, r3 - 802a750: 687b ldr r3, [r7, #4] - 802a752: 66da str r2, [r3, #108] ; 0x6c + 802a7ca: 68fa ldr r2, [r7, #12] + 802a7cc: 4b17 ldr r3, [pc, #92] ; (802a82c ) + 802a7ce: 4413 add r3, r2 + 802a7d0: 009b lsls r3, r3, #2 + 802a7d2: 461a mov r2, r3 + 802a7d4: 687b ldr r3, [r7, #4] + 802a7d6: 66da str r2, [r3, #108] ; 0x6c hdma->DMAmuxRequestGenStatus = DMAMUX2_RequestGenStatus; - 802a754: 687b ldr r3, [r7, #4] - 802a756: 4a15 ldr r2, [pc, #84] ; (802a7ac ) - 802a758: 671a str r2, [r3, #112] ; 0x70 - 802a75a: e009 b.n 802a770 + 802a7d8: 687b ldr r3, [r7, #4] + 802a7da: 4a15 ldr r2, [pc, #84] ; (802a830 ) + 802a7dc: 671a str r2, [r3, #112] ; 0x70 + 802a7de: e009 b.n 802a7f4 } else { /* DMA1 and DMA2 Streams use DMAMUX1 request generator blocks */ hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U))); - 802a75c: 68fa ldr r2, [r7, #12] - 802a75e: 4b14 ldr r3, [pc, #80] ; (802a7b0 ) - 802a760: 4413 add r3, r2 - 802a762: 009b lsls r3, r3, #2 - 802a764: 461a mov r2, r3 - 802a766: 687b ldr r3, [r7, #4] - 802a768: 66da str r2, [r3, #108] ; 0x6c + 802a7e0: 68fa ldr r2, [r7, #12] + 802a7e2: 4b14 ldr r3, [pc, #80] ; (802a834 ) + 802a7e4: 4413 add r3, r2 + 802a7e6: 009b lsls r3, r3, #2 + 802a7e8: 461a mov r2, r3 + 802a7ea: 687b ldr r3, [r7, #4] + 802a7ec: 66da str r2, [r3, #108] ; 0x6c hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus; - 802a76a: 687b ldr r3, [r7, #4] - 802a76c: 4a11 ldr r2, [pc, #68] ; (802a7b4 ) - 802a76e: 671a str r2, [r3, #112] ; 0x70 + 802a7ee: 687b ldr r3, [r7, #4] + 802a7f0: 4a11 ldr r2, [pc, #68] ; (802a838 ) + 802a7f2: 671a str r2, [r3, #112] ; 0x70 } hdma->DMAmuxRequestGenStatusMask = 1UL << (request - 1U); - 802a770: 68fb ldr r3, [r7, #12] - 802a772: 3b01 subs r3, #1 - 802a774: 2201 movs r2, #1 - 802a776: 409a lsls r2, r3 - 802a778: 687b ldr r3, [r7, #4] - 802a77a: 675a str r2, [r3, #116] ; 0x74 - } -} - 802a77c: bf00 nop - 802a77e: 3714 adds r7, #20 - 802a780: 46bd mov sp, r7 - 802a782: f85d 7b04 ldr.w r7, [sp], #4 - 802a786: 4770 bx lr - 802a788: 58025408 .word 0x58025408 - 802a78c: 5802541c .word 0x5802541c - 802a790: 58025430 .word 0x58025430 - 802a794: 58025444 .word 0x58025444 - 802a798: 58025458 .word 0x58025458 - 802a79c: 5802546c .word 0x5802546c - 802a7a0: 58025480 .word 0x58025480 - 802a7a4: 58025494 .word 0x58025494 - 802a7a8: 1600963f .word 0x1600963f - 802a7ac: 58025940 .word 0x58025940 - 802a7b0: 1000823f .word 0x1000823f - 802a7b4: 40020940 .word 0x40020940 - -0802a7b8 : + 802a7f4: 68fb ldr r3, [r7, #12] + 802a7f6: 3b01 subs r3, #1 + 802a7f8: 2201 movs r2, #1 + 802a7fa: 409a lsls r2, r3 + 802a7fc: 687b ldr r3, [r7, #4] + 802a7fe: 675a str r2, [r3, #116] ; 0x74 + } +} + 802a800: bf00 nop + 802a802: 3714 adds r7, #20 + 802a804: 46bd mov sp, r7 + 802a806: f85d 7b04 ldr.w r7, [sp], #4 + 802a80a: 4770 bx lr + 802a80c: 58025408 .word 0x58025408 + 802a810: 5802541c .word 0x5802541c + 802a814: 58025430 .word 0x58025430 + 802a818: 58025444 .word 0x58025444 + 802a81c: 58025458 .word 0x58025458 + 802a820: 5802546c .word 0x5802546c + 802a824: 58025480 .word 0x58025480 + 802a828: 58025494 .word 0x58025494 + 802a82c: 1600963f .word 0x1600963f + 802a830: 58025940 .word 0x58025940 + 802a834: 1000823f .word 0x1000823f + 802a838: 40020940 .word 0x40020940 + +0802a83c : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth) { - 802a7b8: b580 push {r7, lr} - 802a7ba: b084 sub sp, #16 - 802a7bc: af00 add r7, sp, #0 - 802a7be: 6078 str r0, [r7, #4] + 802a83c: b580 push {r7, lr} + 802a83e: b084 sub sp, #16 + 802a840: af00 add r7, sp, #0 + 802a842: 6078 str r0, [r7, #4] uint32_t tickstart; if (heth == NULL) - 802a7c0: 687b ldr r3, [r7, #4] - 802a7c2: 2b00 cmp r3, #0 - 802a7c4: d101 bne.n 802a7ca + 802a844: 687b ldr r3, [r7, #4] + 802a846: 2b00 cmp r3, #0 + 802a848: d101 bne.n 802a84e { return HAL_ERROR; - 802a7c6: 2301 movs r3, #1 - 802a7c8: e0cf b.n 802a96a + 802a84a: 2301 movs r3, #1 + 802a84c: e0cf b.n 802a9ee } if (heth->gState == HAL_ETH_STATE_RESET) - 802a7ca: 687b ldr r3, [r7, #4] - 802a7cc: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802a7d0: 2b00 cmp r3, #0 - 802a7d2: d106 bne.n 802a7e2 + 802a84e: 687b ldr r3, [r7, #4] + 802a850: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802a854: 2b00 cmp r3, #0 + 802a856: d106 bne.n 802a866 { heth->gState = HAL_ETH_STATE_BUSY; - 802a7d4: 687b ldr r3, [r7, #4] - 802a7d6: 2223 movs r2, #35 ; 0x23 - 802a7d8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802a858: 687b ldr r3, [r7, #4] + 802a85a: 2223 movs r2, #35 ; 0x23 + 802a85c: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Init the low level hardware */ heth->MspInitCallback(heth); #else /* Init the low level hardware : GPIO, CLOCK, NVIC. */ HAL_ETH_MspInit(heth); - 802a7dc: 6878 ldr r0, [r7, #4] - 802a7de: f00b f955 bl 8035a8c + 802a860: 6878 ldr r0, [r7, #4] + 802a862: f00b f955 bl 8035b10 #endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */ } __HAL_RCC_SYSCFG_CLK_ENABLE(); - 802a7e2: 4b64 ldr r3, [pc, #400] ; (802a974 ) - 802a7e4: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 802a7e8: 4a62 ldr r2, [pc, #392] ; (802a974 ) - 802a7ea: f043 0302 orr.w r3, r3, #2 - 802a7ee: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 - 802a7f2: 4b60 ldr r3, [pc, #384] ; (802a974 ) - 802a7f4: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 802a7f8: f003 0302 and.w r3, r3, #2 - 802a7fc: 60bb str r3, [r7, #8] - 802a7fe: 68bb ldr r3, [r7, #8] + 802a866: 4b64 ldr r3, [pc, #400] ; (802a9f8 ) + 802a868: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 802a86c: 4a62 ldr r2, [pc, #392] ; (802a9f8 ) + 802a86e: f043 0302 orr.w r3, r3, #2 + 802a872: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 + 802a876: 4b60 ldr r3, [pc, #384] ; (802a9f8 ) + 802a878: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 802a87c: f003 0302 and.w r3, r3, #2 + 802a880: 60bb str r3, [r7, #8] + 802a882: 68bb ldr r3, [r7, #8] if (heth->Init.MediaInterface == HAL_ETH_MII_MODE) - 802a800: 687b ldr r3, [r7, #4] - 802a802: 7a1b ldrb r3, [r3, #8] - 802a804: 2b00 cmp r3, #0 - 802a806: d103 bne.n 802a810 + 802a884: 687b ldr r3, [r7, #4] + 802a886: 7a1b ldrb r3, [r3, #8] + 802a888: 2b00 cmp r3, #0 + 802a88a: d103 bne.n 802a894 { HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_MII); - 802a808: 2000 movs r0, #0 - 802a80a: f7fb fc17 bl 802603c - 802a80e: e003 b.n 802a818 + 802a88c: 2000 movs r0, #0 + 802a88e: f7fb fc17 bl 80260c0 + 802a892: e003 b.n 802a89c } else { HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_RMII); - 802a810: f44f 0000 mov.w r0, #8388608 ; 0x800000 - 802a814: f7fb fc12 bl 802603c + 802a894: f44f 0000 mov.w r0, #8388608 ; 0x800000 + 802a898: f7fb fc12 bl 80260c0 } /* Dummy read to sync with ETH */ (void)SYSCFG->PMCR; - 802a818: 4b57 ldr r3, [pc, #348] ; (802a978 ) - 802a81a: 685b ldr r3, [r3, #4] + 802a89c: 4b57 ldr r3, [pc, #348] ; (802a9fc ) + 802a89e: 685b ldr r3, [r3, #4] /* Ethernet Software reset */ /* Set the SWR bit: resets all MAC subsystem internal registers and logic */ /* After reset all the registers holds their respective reset values */ SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR); - 802a81c: 687b ldr r3, [r7, #4] - 802a81e: 681b ldr r3, [r3, #0] - 802a820: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a824: 681b ldr r3, [r3, #0] - 802a826: 687a ldr r2, [r7, #4] - 802a828: 6812 ldr r2, [r2, #0] - 802a82a: f043 0301 orr.w r3, r3, #1 - 802a82e: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a832: 6013 str r3, [r2, #0] + 802a8a0: 687b ldr r3, [r7, #4] + 802a8a2: 681b ldr r3, [r3, #0] + 802a8a4: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802a8a8: 681b ldr r3, [r3, #0] + 802a8aa: 687a ldr r2, [r7, #4] + 802a8ac: 6812 ldr r2, [r2, #0] + 802a8ae: f043 0301 orr.w r3, r3, #1 + 802a8b2: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802a8b6: 6013 str r3, [r2, #0] /* Get tick */ tickstart = HAL_GetTick(); - 802a834: f7fb fbc6 bl 8025fc4 - 802a838: 60f8 str r0, [r7, #12] + 802a8b8: f7fb fbc6 bl 8026048 + 802a8bc: 60f8 str r0, [r7, #12] /* Wait for software reset */ while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U) - 802a83a: e011 b.n 802a860 + 802a8be: e011 b.n 802a8e4 { if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT)) - 802a83c: f7fb fbc2 bl 8025fc4 - 802a840: 4602 mov r2, r0 - 802a842: 68fb ldr r3, [r7, #12] - 802a844: 1ad3 subs r3, r2, r3 - 802a846: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 - 802a84a: d909 bls.n 802a860 + 802a8c0: f7fb fbc2 bl 8026048 + 802a8c4: 4602 mov r2, r0 + 802a8c6: 68fb ldr r3, [r7, #12] + 802a8c8: 1ad3 subs r3, r2, r3 + 802a8ca: f5b3 7ffa cmp.w r3, #500 ; 0x1f4 + 802a8ce: d909 bls.n 802a8e4 { /* Set Error Code */ heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT; - 802a84c: 687b ldr r3, [r7, #4] - 802a84e: 2204 movs r2, #4 - 802a850: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802a8d0: 687b ldr r3, [r7, #4] + 802a8d2: 2204 movs r2, #4 + 802a8d4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Set State as Error */ heth->gState = HAL_ETH_STATE_ERROR; - 802a854: 687b ldr r3, [r7, #4] - 802a856: 22e0 movs r2, #224 ; 0xe0 - 802a858: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802a8d8: 687b ldr r3, [r7, #4] + 802a8da: 22e0 movs r2, #224 ; 0xe0 + 802a8dc: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Return Error */ return HAL_ERROR; - 802a85c: 2301 movs r3, #1 - 802a85e: e084 b.n 802a96a + 802a8e0: 2301 movs r3, #1 + 802a8e2: e084 b.n 802a9ee while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U) - 802a860: 687b ldr r3, [r7, #4] - 802a862: 681b ldr r3, [r3, #0] - 802a864: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a868: 681b ldr r3, [r3, #0] - 802a86a: f003 0301 and.w r3, r3, #1 - 802a86e: 2b00 cmp r3, #0 - 802a870: d1e4 bne.n 802a83c + 802a8e4: 687b ldr r3, [r7, #4] + 802a8e6: 681b ldr r3, [r3, #0] + 802a8e8: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802a8ec: 681b ldr r3, [r3, #0] + 802a8ee: f003 0301 and.w r3, r3, #1 + 802a8f2: 2b00 cmp r3, #0 + 802a8f4: d1e4 bne.n 802a8c0 } } /*------------------ MDIO CSR Clock Range Configuration --------------------*/ HAL_ETH_SetMDIOClockRange(heth); - 802a872: 6878 ldr r0, [r7, #4] - 802a874: f000 fee0 bl 802b638 + 802a8f6: 6878 ldr r0, [r7, #4] + 802a8f8: f000 fee0 bl 802b6bc /*------------------ MAC LPI 1US Tic Counter Configuration --------------------*/ WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U)); - 802a878: f005 fa3e bl 802fcf8 - 802a87c: 4603 mov r3, r0 - 802a87e: 4a3f ldr r2, [pc, #252] ; (802a97c ) - 802a880: fba2 2303 umull r2, r3, r2, r3 - 802a884: 0c9a lsrs r2, r3, #18 - 802a886: 687b ldr r3, [r7, #4] - 802a888: 681b ldr r3, [r3, #0] - 802a88a: 3a01 subs r2, #1 - 802a88c: f8c3 20dc str.w r2, [r3, #220] ; 0xdc + 802a8fc: f005 fa3e bl 802fd7c + 802a900: 4603 mov r3, r0 + 802a902: 4a3f ldr r2, [pc, #252] ; (802aa00 ) + 802a904: fba2 2303 umull r2, r3, r2, r3 + 802a908: 0c9a lsrs r2, r3, #18 + 802a90a: 687b ldr r3, [r7, #4] + 802a90c: 681b ldr r3, [r3, #0] + 802a90e: 3a01 subs r2, #1 + 802a910: f8c3 20dc str.w r2, [r3, #220] ; 0xdc /*------------------ MAC, MTL and DMA default Configuration ----------------*/ ETH_MACDMAConfig(heth); - 802a890: 6878 ldr r0, [r7, #4] - 802a892: f001 f8cb bl 802ba2c + 802a914: 6878 ldr r0, [r7, #4] + 802a916: f001 f8cb bl 802bab0 /* SET DSL to 64 bit */ MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT); - 802a896: 687b ldr r3, [r7, #4] - 802a898: 681b ldr r3, [r3, #0] - 802a89a: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a89e: f8d3 3100 ldr.w r3, [r3, #256] ; 0x100 - 802a8a2: f423 13e0 bic.w r3, r3, #1835008 ; 0x1c0000 - 802a8a6: 687a ldr r2, [r7, #4] - 802a8a8: 6812 ldr r2, [r2, #0] - 802a8aa: f443 2300 orr.w r3, r3, #524288 ; 0x80000 - 802a8ae: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a8b2: f8c2 3100 str.w r3, [r2, #256] ; 0x100 + 802a91a: 687b ldr r3, [r7, #4] + 802a91c: 681b ldr r3, [r3, #0] + 802a91e: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802a922: f8d3 3100 ldr.w r3, [r3, #256] ; 0x100 + 802a926: f423 13e0 bic.w r3, r3, #1835008 ; 0x1c0000 + 802a92a: 687a ldr r2, [r7, #4] + 802a92c: 6812 ldr r2, [r2, #0] + 802a92e: f443 2300 orr.w r3, r3, #524288 ; 0x80000 + 802a932: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802a936: f8c2 3100 str.w r3, [r2, #256] ; 0x100 /* Set Receive Buffers Length (must be a multiple of 4) */ if ((heth->Init.RxBuffLen % 0x4U) != 0x0U) - 802a8b6: 687b ldr r3, [r7, #4] - 802a8b8: 695b ldr r3, [r3, #20] - 802a8ba: f003 0303 and.w r3, r3, #3 - 802a8be: 2b00 cmp r3, #0 - 802a8c0: d009 beq.n 802a8d6 + 802a93a: 687b ldr r3, [r7, #4] + 802a93c: 695b ldr r3, [r3, #20] + 802a93e: f003 0303 and.w r3, r3, #3 + 802a942: 2b00 cmp r3, #0 + 802a944: d009 beq.n 802a95a { /* Set Error Code */ heth->ErrorCode = HAL_ETH_ERROR_PARAM; - 802a8c2: 687b ldr r3, [r7, #4] - 802a8c4: 2201 movs r2, #1 - 802a8c6: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802a946: 687b ldr r3, [r7, #4] + 802a948: 2201 movs r2, #1 + 802a94a: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Set State as Error */ heth->gState = HAL_ETH_STATE_ERROR; - 802a8ca: 687b ldr r3, [r7, #4] - 802a8cc: 22e0 movs r2, #224 ; 0xe0 - 802a8ce: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802a94e: 687b ldr r3, [r7, #4] + 802a950: 22e0 movs r2, #224 ; 0xe0 + 802a952: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Return Error */ return HAL_ERROR; - 802a8d2: 2301 movs r3, #1 - 802a8d4: e049 b.n 802a96a + 802a956: 2301 movs r3, #1 + 802a958: e049 b.n 802a9ee } else { MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1)); - 802a8d6: 687b ldr r3, [r7, #4] - 802a8d8: 681b ldr r3, [r3, #0] - 802a8da: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a8de: f8d3 2108 ldr.w r2, [r3, #264] ; 0x108 - 802a8e2: 4b27 ldr r3, [pc, #156] ; (802a980 ) - 802a8e4: 4013 ands r3, r2 - 802a8e6: 687a ldr r2, [r7, #4] - 802a8e8: 6952 ldr r2, [r2, #20] - 802a8ea: 0051 lsls r1, r2, #1 - 802a8ec: 687a ldr r2, [r7, #4] - 802a8ee: 6812 ldr r2, [r2, #0] - 802a8f0: 430b orrs r3, r1 - 802a8f2: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a8f6: f8c2 3108 str.w r3, [r2, #264] ; 0x108 + 802a95a: 687b ldr r3, [r7, #4] + 802a95c: 681b ldr r3, [r3, #0] + 802a95e: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802a962: f8d3 2108 ldr.w r2, [r3, #264] ; 0x108 + 802a966: 4b27 ldr r3, [pc, #156] ; (802aa04 ) + 802a968: 4013 ands r3, r2 + 802a96a: 687a ldr r2, [r7, #4] + 802a96c: 6952 ldr r2, [r2, #20] + 802a96e: 0051 lsls r1, r2, #1 + 802a970: 687a ldr r2, [r7, #4] + 802a972: 6812 ldr r2, [r2, #0] + 802a974: 430b orrs r3, r1 + 802a976: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802a97a: f8c2 3108 str.w r3, [r2, #264] ; 0x108 } /*------------------ DMA Tx Descriptors Configuration ----------------------*/ ETH_DMATxDescListInit(heth); - 802a8fa: 6878 ldr r0, [r7, #4] - 802a8fc: f001 f933 bl 802bb66 + 802a97e: 6878 ldr r0, [r7, #4] + 802a980: f001 f933 bl 802bbea /*------------------ DMA Rx Descriptors Configuration ----------------------*/ ETH_DMARxDescListInit(heth); - 802a900: 6878 ldr r0, [r7, #4] - 802a902: f001 f979 bl 802bbf8 + 802a984: 6878 ldr r0, [r7, #4] + 802a986: f001 f979 bl 802bc7c /*--------------------- ETHERNET MAC Address Configuration ------------------*/ /* Set MAC addr bits 32 to 47 */ heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr[4]); - 802a906: 687b ldr r3, [r7, #4] - 802a908: 685b ldr r3, [r3, #4] - 802a90a: 3305 adds r3, #5 - 802a90c: 781b ldrb r3, [r3, #0] - 802a90e: 021a lsls r2, r3, #8 - 802a910: 687b ldr r3, [r7, #4] - 802a912: 685b ldr r3, [r3, #4] - 802a914: 3304 adds r3, #4 - 802a916: 781b ldrb r3, [r3, #0] - 802a918: 4619 mov r1, r3 - 802a91a: 687b ldr r3, [r7, #4] - 802a91c: 681b ldr r3, [r3, #0] - 802a91e: 430a orrs r2, r1 - 802a920: f8c3 2300 str.w r2, [r3, #768] ; 0x300 + 802a98a: 687b ldr r3, [r7, #4] + 802a98c: 685b ldr r3, [r3, #4] + 802a98e: 3305 adds r3, #5 + 802a990: 781b ldrb r3, [r3, #0] + 802a992: 021a lsls r2, r3, #8 + 802a994: 687b ldr r3, [r7, #4] + 802a996: 685b ldr r3, [r3, #4] + 802a998: 3304 adds r3, #4 + 802a99a: 781b ldrb r3, [r3, #0] + 802a99c: 4619 mov r1, r3 + 802a99e: 687b ldr r3, [r7, #4] + 802a9a0: 681b ldr r3, [r3, #0] + 802a9a2: 430a orrs r2, r1 + 802a9a4: f8c3 2300 str.w r2, [r3, #768] ; 0x300 /* Set MAC addr bits 0 to 31 */ heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) | - 802a924: 687b ldr r3, [r7, #4] - 802a926: 685b ldr r3, [r3, #4] - 802a928: 3303 adds r3, #3 - 802a92a: 781b ldrb r3, [r3, #0] - 802a92c: 061a lsls r2, r3, #24 - 802a92e: 687b ldr r3, [r7, #4] - 802a930: 685b ldr r3, [r3, #4] - 802a932: 3302 adds r3, #2 - 802a934: 781b ldrb r3, [r3, #0] - 802a936: 041b lsls r3, r3, #16 - 802a938: 431a orrs r2, r3 + 802a9a8: 687b ldr r3, [r7, #4] + 802a9aa: 685b ldr r3, [r3, #4] + 802a9ac: 3303 adds r3, #3 + 802a9ae: 781b ldrb r3, [r3, #0] + 802a9b0: 061a lsls r2, r3, #24 + 802a9b2: 687b ldr r3, [r7, #4] + 802a9b4: 685b ldr r3, [r3, #4] + 802a9b6: 3302 adds r3, #2 + 802a9b8: 781b ldrb r3, [r3, #0] + 802a9ba: 041b lsls r3, r3, #16 + 802a9bc: 431a orrs r2, r3 ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]); - 802a93a: 687b ldr r3, [r7, #4] - 802a93c: 685b ldr r3, [r3, #4] - 802a93e: 3301 adds r3, #1 - 802a940: 781b ldrb r3, [r3, #0] - 802a942: 021b lsls r3, r3, #8 + 802a9be: 687b ldr r3, [r7, #4] + 802a9c0: 685b ldr r3, [r3, #4] + 802a9c2: 3301 adds r3, #1 + 802a9c4: 781b ldrb r3, [r3, #0] + 802a9c6: 021b lsls r3, r3, #8 heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) | - 802a944: 431a orrs r2, r3 + 802a9c8: 431a orrs r2, r3 ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]); - 802a946: 687b ldr r3, [r7, #4] - 802a948: 685b ldr r3, [r3, #4] - 802a94a: 781b ldrb r3, [r3, #0] - 802a94c: 4619 mov r1, r3 + 802a9ca: 687b ldr r3, [r7, #4] + 802a9cc: 685b ldr r3, [r3, #4] + 802a9ce: 781b ldrb r3, [r3, #0] + 802a9d0: 4619 mov r1, r3 heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) | - 802a94e: 687b ldr r3, [r7, #4] - 802a950: 681b ldr r3, [r3, #0] + 802a9d2: 687b ldr r3, [r7, #4] + 802a9d4: 681b ldr r3, [r3, #0] ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]); - 802a952: 430a orrs r2, r1 + 802a9d6: 430a orrs r2, r1 heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) | - 802a954: f8c3 2304 str.w r2, [r3, #772] ; 0x304 + 802a9d8: f8c3 2304 str.w r2, [r3, #772] ; 0x304 heth->ErrorCode = HAL_ETH_ERROR_NONE; - 802a958: 687b ldr r3, [r7, #4] - 802a95a: 2200 movs r2, #0 - 802a95c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802a9dc: 687b ldr r3, [r7, #4] + 802a9de: 2200 movs r2, #0 + 802a9e0: f8c3 2088 str.w r2, [r3, #136] ; 0x88 heth->gState = HAL_ETH_STATE_READY; - 802a960: 687b ldr r3, [r7, #4] - 802a962: 2210 movs r2, #16 - 802a964: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802a9e4: 687b ldr r3, [r7, #4] + 802a9e6: 2210 movs r2, #16 + 802a9e8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 return HAL_OK; - 802a968: 2300 movs r3, #0 -} - 802a96a: 4618 mov r0, r3 - 802a96c: 3710 adds r7, #16 - 802a96e: 46bd mov sp, r7 - 802a970: bd80 pop {r7, pc} - 802a972: bf00 nop - 802a974: 58024400 .word 0x58024400 - 802a978: 58000400 .word 0x58000400 - 802a97c: 431bde83 .word 0x431bde83 - 802a980: ffff8001 .word 0xffff8001 - -0802a984 : + 802a9ec: 2300 movs r3, #0 +} + 802a9ee: 4618 mov r0, r3 + 802a9f0: 3710 adds r7, #16 + 802a9f2: 46bd mov sp, r7 + 802a9f4: bd80 pop {r7, pc} + 802a9f6: bf00 nop + 802a9f8: 58024400 .word 0x58024400 + 802a9fc: 58000400 .word 0x58000400 + 802aa00: 431bde83 .word 0x431bde83 + 802aa04: ffff8001 .word 0xffff8001 + +0802aa08 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth) { - 802a984: b580 push {r7, lr} - 802a986: b082 sub sp, #8 - 802a988: af00 add r7, sp, #0 - 802a98a: 6078 str r0, [r7, #4] + 802aa08: b580 push {r7, lr} + 802aa0a: b082 sub sp, #8 + 802aa0c: af00 add r7, sp, #0 + 802aa0e: 6078 str r0, [r7, #4] if (heth->gState == HAL_ETH_STATE_READY) - 802a98c: 687b ldr r3, [r7, #4] - 802a98e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802a992: 2b10 cmp r3, #16 - 802a994: d153 bne.n 802aa3e + 802aa10: 687b ldr r3, [r7, #4] + 802aa12: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802aa16: 2b10 cmp r3, #16 + 802aa18: d153 bne.n 802aac2 { heth->gState = HAL_ETH_STATE_BUSY; - 802a996: 687b ldr r3, [r7, #4] - 802a998: 2223 movs r2, #35 ; 0x23 - 802a99a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802aa1a: 687b ldr r3, [r7, #4] + 802aa1c: 2223 movs r2, #35 ; 0x23 + 802aa1e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Set nombre of descriptors to build */ heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT; - 802a99e: 687b ldr r3, [r7, #4] - 802a9a0: 2204 movs r2, #4 - 802a9a2: 66da str r2, [r3, #108] ; 0x6c + 802aa22: 687b ldr r3, [r7, #4] + 802aa24: 2204 movs r2, #4 + 802aa26: 66da str r2, [r3, #108] ; 0x6c /* Build all descriptors */ ETH_UpdateDescriptor(heth); - 802a9a4: 6878 ldr r0, [r7, #4] - 802a9a6: f000 f9f6 bl 802ad96 + 802aa28: 6878 ldr r0, [r7, #4] + 802aa2a: f000 f9f6 bl 802ae1a /* Enable the MAC transmission */ SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE); - 802a9aa: 687b ldr r3, [r7, #4] - 802a9ac: 681b ldr r3, [r3, #0] - 802a9ae: 681a ldr r2, [r3, #0] - 802a9b0: 687b ldr r3, [r7, #4] - 802a9b2: 681b ldr r3, [r3, #0] - 802a9b4: f042 0202 orr.w r2, r2, #2 - 802a9b8: 601a str r2, [r3, #0] + 802aa2e: 687b ldr r3, [r7, #4] + 802aa30: 681b ldr r3, [r3, #0] + 802aa32: 681a ldr r2, [r3, #0] + 802aa34: 687b ldr r3, [r7, #4] + 802aa36: 681b ldr r3, [r3, #0] + 802aa38: f042 0202 orr.w r2, r2, #2 + 802aa3c: 601a str r2, [r3, #0] /* Enable the MAC reception */ SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE); - 802a9ba: 687b ldr r3, [r7, #4] - 802a9bc: 681b ldr r3, [r3, #0] - 802a9be: 681a ldr r2, [r3, #0] - 802a9c0: 687b ldr r3, [r7, #4] - 802a9c2: 681b ldr r3, [r3, #0] - 802a9c4: f042 0201 orr.w r2, r2, #1 - 802a9c8: 601a str r2, [r3, #0] + 802aa3e: 687b ldr r3, [r7, #4] + 802aa40: 681b ldr r3, [r3, #0] + 802aa42: 681a ldr r2, [r3, #0] + 802aa44: 687b ldr r3, [r7, #4] + 802aa46: 681b ldr r3, [r3, #0] + 802aa48: f042 0201 orr.w r2, r2, #1 + 802aa4c: 601a str r2, [r3, #0] /* Set the Flush Transmit FIFO bit */ SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ); - 802a9ca: 687b ldr r3, [r7, #4] - 802a9cc: 681b ldr r3, [r3, #0] - 802a9ce: f8d3 2d00 ldr.w r2, [r3, #3328] ; 0xd00 - 802a9d2: 687b ldr r3, [r7, #4] - 802a9d4: 681b ldr r3, [r3, #0] - 802a9d6: f042 0201 orr.w r2, r2, #1 - 802a9da: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 + 802aa4e: 687b ldr r3, [r7, #4] + 802aa50: 681b ldr r3, [r3, #0] + 802aa52: f8d3 2d00 ldr.w r2, [r3, #3328] ; 0xd00 + 802aa56: 687b ldr r3, [r7, #4] + 802aa58: 681b ldr r3, [r3, #0] + 802aa5a: f042 0201 orr.w r2, r2, #1 + 802aa5e: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 /* Enable the DMA transmission */ SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST); - 802a9de: 687b ldr r3, [r7, #4] - 802a9e0: 681b ldr r3, [r3, #0] - 802a9e2: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802a9e6: f8d3 3104 ldr.w r3, [r3, #260] ; 0x104 - 802a9ea: 687a ldr r2, [r7, #4] - 802a9ec: 6812 ldr r2, [r2, #0] - 802a9ee: f043 0301 orr.w r3, r3, #1 - 802a9f2: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802a9f6: f8c2 3104 str.w r3, [r2, #260] ; 0x104 + 802aa62: 687b ldr r3, [r7, #4] + 802aa64: 681b ldr r3, [r3, #0] + 802aa66: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aa6a: f8d3 3104 ldr.w r3, [r3, #260] ; 0x104 + 802aa6e: 687a ldr r2, [r7, #4] + 802aa70: 6812 ldr r2, [r2, #0] + 802aa72: f043 0301 orr.w r3, r3, #1 + 802aa76: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802aa7a: f8c2 3104 str.w r3, [r2, #260] ; 0x104 /* Enable the DMA reception */ SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR); - 802a9fa: 687b ldr r3, [r7, #4] - 802a9fc: 681b ldr r3, [r3, #0] - 802a9fe: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aa02: f8d3 3108 ldr.w r3, [r3, #264] ; 0x108 - 802aa06: 687a ldr r2, [r7, #4] - 802aa08: 6812 ldr r2, [r2, #0] - 802aa0a: f043 0301 orr.w r3, r3, #1 - 802aa0e: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802aa12: f8c2 3108 str.w r3, [r2, #264] ; 0x108 + 802aa7e: 687b ldr r3, [r7, #4] + 802aa80: 681b ldr r3, [r3, #0] + 802aa82: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aa86: f8d3 3108 ldr.w r3, [r3, #264] ; 0x108 + 802aa8a: 687a ldr r2, [r7, #4] + 802aa8c: 6812 ldr r2, [r2, #0] + 802aa8e: f043 0301 orr.w r3, r3, #1 + 802aa92: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802aa96: f8c2 3108 str.w r3, [r2, #264] ; 0x108 /* Clear Tx and Rx process stopped flags */ heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS); - 802aa16: 687b ldr r3, [r7, #4] - 802aa18: 681b ldr r3, [r3, #0] - 802aa1a: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aa1e: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802aa22: 687a ldr r2, [r7, #4] - 802aa24: 6812 ldr r2, [r2, #0] - 802aa26: f443 7381 orr.w r3, r3, #258 ; 0x102 - 802aa2a: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802aa2e: f8c2 3160 str.w r3, [r2, #352] ; 0x160 + 802aa9a: 687b ldr r3, [r7, #4] + 802aa9c: 681b ldr r3, [r3, #0] + 802aa9e: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aaa2: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802aaa6: 687a ldr r2, [r7, #4] + 802aaa8: 6812 ldr r2, [r2, #0] + 802aaaa: f443 7381 orr.w r3, r3, #258 ; 0x102 + 802aaae: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802aab2: f8c2 3160 str.w r3, [r2, #352] ; 0x160 heth->gState = HAL_ETH_STATE_STARTED; - 802aa32: 687b ldr r3, [r7, #4] - 802aa34: 2223 movs r2, #35 ; 0x23 - 802aa36: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802aab6: 687b ldr r3, [r7, #4] + 802aab8: 2223 movs r2, #35 ; 0x23 + 802aaba: f8c3 2084 str.w r2, [r3, #132] ; 0x84 return HAL_OK; - 802aa3a: 2300 movs r3, #0 - 802aa3c: e000 b.n 802aa40 + 802aabe: 2300 movs r3, #0 + 802aac0: e000 b.n 802aac4 } else { return HAL_ERROR; - 802aa3e: 2301 movs r3, #1 + 802aac2: 2301 movs r3, #1 } } - 802aa40: 4618 mov r0, r3 - 802aa42: 3708 adds r7, #8 - 802aa44: 46bd mov sp, r7 - 802aa46: bd80 pop {r7, pc} + 802aac4: 4618 mov r0, r3 + 802aac6: 3708 adds r7, #8 + 802aac8: 46bd mov sp, r7 + 802aaca: bd80 pop {r7, pc} -0802aa48 : +0802aacc : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth) { - 802aa48: b480 push {r7} - 802aa4a: b083 sub sp, #12 - 802aa4c: af00 add r7, sp, #0 - 802aa4e: 6078 str r0, [r7, #4] + 802aacc: b480 push {r7} + 802aace: b083 sub sp, #12 + 802aad0: af00 add r7, sp, #0 + 802aad2: 6078 str r0, [r7, #4] if (heth->gState == HAL_ETH_STATE_STARTED) - 802aa50: 687b ldr r3, [r7, #4] - 802aa52: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802aa56: 2b23 cmp r3, #35 ; 0x23 - 802aa58: d13f bne.n 802aada + 802aad4: 687b ldr r3, [r7, #4] + 802aad6: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802aada: 2b23 cmp r3, #35 ; 0x23 + 802aadc: d13f bne.n 802ab5e { /* Set the ETH peripheral state to BUSY */ heth->gState = HAL_ETH_STATE_BUSY; - 802aa5a: 687b ldr r3, [r7, #4] - 802aa5c: 2223 movs r2, #35 ; 0x23 - 802aa5e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802aade: 687b ldr r3, [r7, #4] + 802aae0: 2223 movs r2, #35 ; 0x23 + 802aae2: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Disable the DMA transmission */ CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST); - 802aa62: 687b ldr r3, [r7, #4] - 802aa64: 681b ldr r3, [r3, #0] - 802aa66: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aa6a: f8d3 3104 ldr.w r3, [r3, #260] ; 0x104 - 802aa6e: 687a ldr r2, [r7, #4] - 802aa70: 6812 ldr r2, [r2, #0] - 802aa72: f023 0301 bic.w r3, r3, #1 - 802aa76: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802aa7a: f8c2 3104 str.w r3, [r2, #260] ; 0x104 + 802aae6: 687b ldr r3, [r7, #4] + 802aae8: 681b ldr r3, [r3, #0] + 802aaea: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aaee: f8d3 3104 ldr.w r3, [r3, #260] ; 0x104 + 802aaf2: 687a ldr r2, [r7, #4] + 802aaf4: 6812 ldr r2, [r2, #0] + 802aaf6: f023 0301 bic.w r3, r3, #1 + 802aafa: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802aafe: f8c2 3104 str.w r3, [r2, #260] ; 0x104 /* Disable the DMA reception */ CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR); - 802aa7e: 687b ldr r3, [r7, #4] - 802aa80: 681b ldr r3, [r3, #0] - 802aa82: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aa86: f8d3 3108 ldr.w r3, [r3, #264] ; 0x108 - 802aa8a: 687a ldr r2, [r7, #4] - 802aa8c: 6812 ldr r2, [r2, #0] - 802aa8e: f023 0301 bic.w r3, r3, #1 - 802aa92: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802aa96: f8c2 3108 str.w r3, [r2, #264] ; 0x108 + 802ab02: 687b ldr r3, [r7, #4] + 802ab04: 681b ldr r3, [r3, #0] + 802ab06: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ab0a: f8d3 3108 ldr.w r3, [r3, #264] ; 0x108 + 802ab0e: 687a ldr r2, [r7, #4] + 802ab10: 6812 ldr r2, [r2, #0] + 802ab12: f023 0301 bic.w r3, r3, #1 + 802ab16: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802ab1a: f8c2 3108 str.w r3, [r2, #264] ; 0x108 /* Disable the MAC reception */ CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE); - 802aa9a: 687b ldr r3, [r7, #4] - 802aa9c: 681b ldr r3, [r3, #0] - 802aa9e: 681a ldr r2, [r3, #0] - 802aaa0: 687b ldr r3, [r7, #4] - 802aaa2: 681b ldr r3, [r3, #0] - 802aaa4: f022 0201 bic.w r2, r2, #1 - 802aaa8: 601a str r2, [r3, #0] + 802ab1e: 687b ldr r3, [r7, #4] + 802ab20: 681b ldr r3, [r3, #0] + 802ab22: 681a ldr r2, [r3, #0] + 802ab24: 687b ldr r3, [r7, #4] + 802ab26: 681b ldr r3, [r3, #0] + 802ab28: f022 0201 bic.w r2, r2, #1 + 802ab2c: 601a str r2, [r3, #0] /* Set the Flush Transmit FIFO bit */ SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ); - 802aaaa: 687b ldr r3, [r7, #4] - 802aaac: 681b ldr r3, [r3, #0] - 802aaae: f8d3 2d00 ldr.w r2, [r3, #3328] ; 0xd00 - 802aab2: 687b ldr r3, [r7, #4] - 802aab4: 681b ldr r3, [r3, #0] - 802aab6: f042 0201 orr.w r2, r2, #1 - 802aaba: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 + 802ab2e: 687b ldr r3, [r7, #4] + 802ab30: 681b ldr r3, [r3, #0] + 802ab32: f8d3 2d00 ldr.w r2, [r3, #3328] ; 0xd00 + 802ab36: 687b ldr r3, [r7, #4] + 802ab38: 681b ldr r3, [r3, #0] + 802ab3a: f042 0201 orr.w r2, r2, #1 + 802ab3e: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 /* Disable the MAC transmission */ CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE); - 802aabe: 687b ldr r3, [r7, #4] - 802aac0: 681b ldr r3, [r3, #0] - 802aac2: 681a ldr r2, [r3, #0] - 802aac4: 687b ldr r3, [r7, #4] - 802aac6: 681b ldr r3, [r3, #0] - 802aac8: f022 0202 bic.w r2, r2, #2 - 802aacc: 601a str r2, [r3, #0] + 802ab42: 687b ldr r3, [r7, #4] + 802ab44: 681b ldr r3, [r3, #0] + 802ab46: 681a ldr r2, [r3, #0] + 802ab48: 687b ldr r3, [r7, #4] + 802ab4a: 681b ldr r3, [r3, #0] + 802ab4c: f022 0202 bic.w r2, r2, #2 + 802ab50: 601a str r2, [r3, #0] heth->gState = HAL_ETH_STATE_READY; - 802aace: 687b ldr r3, [r7, #4] - 802aad0: 2210 movs r2, #16 - 802aad2: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802ab52: 687b ldr r3, [r7, #4] + 802ab54: 2210 movs r2, #16 + 802ab56: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Return function status */ return HAL_OK; - 802aad6: 2300 movs r3, #0 - 802aad8: e000 b.n 802aadc + 802ab5a: 2300 movs r3, #0 + 802ab5c: e000 b.n 802ab60 } else { return HAL_ERROR; - 802aada: 2301 movs r3, #1 + 802ab5e: 2301 movs r3, #1 } } - 802aadc: 4618 mov r0, r3 - 802aade: 370c adds r7, #12 - 802aae0: 46bd mov sp, r7 - 802aae2: f85d 7b04 ldr.w r7, [sp], #4 - 802aae6: 4770 bx lr + 802ab60: 4618 mov r0, r3 + 802ab62: 370c adds r7, #12 + 802ab64: 46bd mov sp, r7 + 802ab66: f85d 7b04 ldr.w r7, [sp], #4 + 802ab6a: 4770 bx lr -0802aae8 : +0802ab6c : * @param pTxConfig: Hold the configuration of packet to be transmitted * @param Timeout: timeout value * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_Transmit(ETH_HandleTypeDef *heth, ETH_TxPacketConfig *pTxConfig, uint32_t Timeout) { - 802aae8: b580 push {r7, lr} - 802aaea: b086 sub sp, #24 - 802aaec: af00 add r7, sp, #0 - 802aaee: 60f8 str r0, [r7, #12] - 802aaf0: 60b9 str r1, [r7, #8] - 802aaf2: 607a str r2, [r7, #4] + 802ab6c: b580 push {r7, lr} + 802ab6e: b086 sub sp, #24 + 802ab70: af00 add r7, sp, #0 + 802ab72: 60f8 str r0, [r7, #12] + 802ab74: 60b9 str r1, [r7, #8] + 802ab76: 607a str r2, [r7, #4] uint32_t tickstart; ETH_DMADescTypeDef *dmatxdesc; if (pTxConfig == NULL) - 802aaf4: 68bb ldr r3, [r7, #8] - 802aaf6: 2b00 cmp r3, #0 - 802aaf8: d109 bne.n 802ab0e + 802ab78: 68bb ldr r3, [r7, #8] + 802ab7a: 2b00 cmp r3, #0 + 802ab7c: d109 bne.n 802ab92 { heth->ErrorCode |= HAL_ETH_ERROR_PARAM; - 802aafa: 68fb ldr r3, [r7, #12] - 802aafc: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802ab00: f043 0201 orr.w r2, r3, #1 - 802ab04: 68fb ldr r3, [r7, #12] - 802ab06: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802ab7e: 68fb ldr r3, [r7, #12] + 802ab80: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802ab84: f043 0201 orr.w r2, r3, #1 + 802ab88: 68fb ldr r3, [r7, #12] + 802ab8a: f8c3 2088 str.w r2, [r3, #136] ; 0x88 return HAL_ERROR; - 802ab0a: 2301 movs r3, #1 - 802ab0c: e07f b.n 802ac0e + 802ab8e: 2301 movs r3, #1 + 802ab90: e07f b.n 802ac92 } if (heth->gState == HAL_ETH_STATE_STARTED) - 802ab0e: 68fb ldr r3, [r7, #12] - 802ab10: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802ab14: 2b23 cmp r3, #35 ; 0x23 - 802ab16: d179 bne.n 802ac0c + 802ab92: 68fb ldr r3, [r7, #12] + 802ab94: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802ab98: 2b23 cmp r3, #35 ; 0x23 + 802ab9a: d179 bne.n 802ac90 { /* Config DMA Tx descriptor by Tx Packet info */ if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 0) != HAL_ETH_ERROR_NONE) - 802ab18: 2200 movs r2, #0 - 802ab1a: 68b9 ldr r1, [r7, #8] - 802ab1c: 68f8 ldr r0, [r7, #12] - 802ab1e: f001 f8c9 bl 802bcb4 - 802ab22: 4603 mov r3, r0 - 802ab24: 2b00 cmp r3, #0 - 802ab26: d009 beq.n 802ab3c + 802ab9c: 2200 movs r2, #0 + 802ab9e: 68b9 ldr r1, [r7, #8] + 802aba0: 68f8 ldr r0, [r7, #12] + 802aba2: f001 f8c9 bl 802bd38 + 802aba6: 4603 mov r3, r0 + 802aba8: 2b00 cmp r3, #0 + 802abaa: d009 beq.n 802abc0 { /* Set the ETH error code */ heth->ErrorCode |= HAL_ETH_ERROR_BUSY; - 802ab28: 68fb ldr r3, [r7, #12] - 802ab2a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802ab2e: f043 0202 orr.w r2, r3, #2 - 802ab32: 68fb ldr r3, [r7, #12] - 802ab34: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802abac: 68fb ldr r3, [r7, #12] + 802abae: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802abb2: f043 0202 orr.w r2, r3, #2 + 802abb6: 68fb ldr r3, [r7, #12] + 802abb8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 return HAL_ERROR; - 802ab38: 2301 movs r3, #1 - 802ab3a: e068 b.n 802ac0e + 802abbc: 2301 movs r3, #1 + 802abbe: e068 b.n 802ac92 __ASM volatile ("dsb 0xF":::"memory"); - 802ab3c: f3bf 8f4f dsb sy + 802abc0: f3bf 8f4f dsb sy } - 802ab40: bf00 nop + 802abc4: bf00 nop } /* Ensure completion of descriptor preparation before transmission start */ __DSB(); dmatxdesc = (ETH_DMADescTypeDef *)(&heth->TxDescList)->TxDesc[heth->TxDescList.CurTxDesc]; - 802ab42: 68fb ldr r3, [r7, #12] - 802ab44: 6a9a ldr r2, [r3, #40] ; 0x28 - 802ab46: 68fb ldr r3, [r7, #12] - 802ab48: 3206 adds r2, #6 - 802ab4a: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802ab4e: 617b str r3, [r7, #20] + 802abc6: 68fb ldr r3, [r7, #12] + 802abc8: 6a9a ldr r2, [r3, #40] ; 0x28 + 802abca: 68fb ldr r3, [r7, #12] + 802abcc: 3206 adds r2, #6 + 802abce: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802abd2: 617b str r3, [r7, #20] /* Incr current tx desc index */ INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U); - 802ab50: 68fb ldr r3, [r7, #12] - 802ab52: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ab54: 1c5a adds r2, r3, #1 - 802ab56: 68fb ldr r3, [r7, #12] - 802ab58: 629a str r2, [r3, #40] ; 0x28 - 802ab5a: 68fb ldr r3, [r7, #12] - 802ab5c: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ab5e: 2b03 cmp r3, #3 - 802ab60: d904 bls.n 802ab6c - 802ab62: 68fb ldr r3, [r7, #12] - 802ab64: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ab66: 1f1a subs r2, r3, #4 - 802ab68: 68fb ldr r3, [r7, #12] - 802ab6a: 629a str r2, [r3, #40] ; 0x28 + 802abd4: 68fb ldr r3, [r7, #12] + 802abd6: 6a9b ldr r3, [r3, #40] ; 0x28 + 802abd8: 1c5a adds r2, r3, #1 + 802abda: 68fb ldr r3, [r7, #12] + 802abdc: 629a str r2, [r3, #40] ; 0x28 + 802abde: 68fb ldr r3, [r7, #12] + 802abe0: 6a9b ldr r3, [r3, #40] ; 0x28 + 802abe2: 2b03 cmp r3, #3 + 802abe4: d904 bls.n 802abf0 + 802abe6: 68fb ldr r3, [r7, #12] + 802abe8: 6a9b ldr r3, [r3, #40] ; 0x28 + 802abea: 1f1a subs r2, r3, #4 + 802abec: 68fb ldr r3, [r7, #12] + 802abee: 629a str r2, [r3, #40] ; 0x28 /* Start transmission */ /* issue a poll command to Tx DMA by writing address of next immediate free descriptor */ WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc])); - 802ab6c: 68fb ldr r3, [r7, #12] - 802ab6e: 6a99 ldr r1, [r3, #40] ; 0x28 - 802ab70: 68fb ldr r3, [r7, #12] - 802ab72: 681a ldr r2, [r3, #0] - 802ab74: 68fb ldr r3, [r7, #12] - 802ab76: 3106 adds r1, #6 - 802ab78: f853 3021 ldr.w r3, [r3, r1, lsl #2] - 802ab7c: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802ab80: f8c2 3120 str.w r3, [r2, #288] ; 0x120 + 802abf0: 68fb ldr r3, [r7, #12] + 802abf2: 6a99 ldr r1, [r3, #40] ; 0x28 + 802abf4: 68fb ldr r3, [r7, #12] + 802abf6: 681a ldr r2, [r3, #0] + 802abf8: 68fb ldr r3, [r7, #12] + 802abfa: 3106 adds r1, #6 + 802abfc: f853 3021 ldr.w r3, [r3, r1, lsl #2] + 802ac00: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802ac04: f8c2 3120 str.w r3, [r2, #288] ; 0x120 tickstart = HAL_GetTick(); - 802ab84: f7fb fa1e bl 8025fc4 - 802ab88: 6138 str r0, [r7, #16] + 802ac08: f7fb fa1e bl 8026048 + 802ac0c: 6138 str r0, [r7, #16] /* Wait for data to be transmitted or timeout occurred */ while ((dmatxdesc->DESC3 & ETH_DMATXNDESCWBF_OWN) != (uint32_t)RESET) - 802ab8a: e039 b.n 802ac00 + 802ac0e: e039 b.n 802ac84 { if ((heth->Instance->DMACSR & ETH_DMACSR_FBE) != (uint32_t)RESET) - 802ab8c: 68fb ldr r3, [r7, #12] - 802ab8e: 681b ldr r3, [r3, #0] - 802ab90: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ab94: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802ab98: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 802ab9c: 2b00 cmp r3, #0 - 802ab9e: d012 beq.n 802abc6 + 802ac10: 68fb ldr r3, [r7, #12] + 802ac12: 681b ldr r3, [r3, #0] + 802ac14: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ac18: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802ac1c: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 802ac20: 2b00 cmp r3, #0 + 802ac22: d012 beq.n 802ac4a { heth->ErrorCode |= HAL_ETH_ERROR_DMA; - 802aba0: 68fb ldr r3, [r7, #12] - 802aba2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802aba6: f043 0208 orr.w r2, r3, #8 - 802abaa: 68fb ldr r3, [r7, #12] - 802abac: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802ac24: 68fb ldr r3, [r7, #12] + 802ac26: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802ac2a: f043 0208 orr.w r2, r3, #8 + 802ac2e: 68fb ldr r3, [r7, #12] + 802ac30: f8c3 2088 str.w r2, [r3, #136] ; 0x88 heth->DMAErrorCode = heth->Instance->DMACSR; - 802abb0: 68fb ldr r3, [r7, #12] - 802abb2: 681b ldr r3, [r3, #0] - 802abb4: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802abb8: f8d3 2160 ldr.w r2, [r3, #352] ; 0x160 - 802abbc: 68fb ldr r3, [r7, #12] - 802abbe: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 802ac34: 68fb ldr r3, [r7, #12] + 802ac36: 681b ldr r3, [r3, #0] + 802ac38: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ac3c: f8d3 2160 ldr.w r2, [r3, #352] ; 0x160 + 802ac40: 68fb ldr r3, [r7, #12] + 802ac42: f8c3 208c str.w r2, [r3, #140] ; 0x8c /* Return function status */ return HAL_ERROR; - 802abc2: 2301 movs r3, #1 - 802abc4: e023 b.n 802ac0e + 802ac46: 2301 movs r3, #1 + 802ac48: e023 b.n 802ac92 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 802abc6: 687b ldr r3, [r7, #4] - 802abc8: f1b3 3fff cmp.w r3, #4294967295 - 802abcc: d018 beq.n 802ac00 + 802ac4a: 687b ldr r3, [r7, #4] + 802ac4c: f1b3 3fff cmp.w r3, #4294967295 + 802ac50: d018 beq.n 802ac84 { if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) - 802abce: f7fb f9f9 bl 8025fc4 - 802abd2: 4602 mov r2, r0 - 802abd4: 693b ldr r3, [r7, #16] - 802abd6: 1ad3 subs r3, r2, r3 - 802abd8: 687a ldr r2, [r7, #4] - 802abda: 429a cmp r2, r3 - 802abdc: d302 bcc.n 802abe4 - 802abde: 687b ldr r3, [r7, #4] - 802abe0: 2b00 cmp r3, #0 - 802abe2: d10d bne.n 802ac00 + 802ac52: f7fb f9f9 bl 8026048 + 802ac56: 4602 mov r2, r0 + 802ac58: 693b ldr r3, [r7, #16] + 802ac5a: 1ad3 subs r3, r2, r3 + 802ac5c: 687a ldr r2, [r7, #4] + 802ac5e: 429a cmp r2, r3 + 802ac60: d302 bcc.n 802ac68 + 802ac62: 687b ldr r3, [r7, #4] + 802ac64: 2b00 cmp r3, #0 + 802ac66: d10d bne.n 802ac84 { heth->ErrorCode |= HAL_ETH_ERROR_TIMEOUT; - 802abe4: 68fb ldr r3, [r7, #12] - 802abe6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802abea: f043 0204 orr.w r2, r3, #4 - 802abee: 68fb ldr r3, [r7, #12] - 802abf0: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802ac68: 68fb ldr r3, [r7, #12] + 802ac6a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802ac6e: f043 0204 orr.w r2, r3, #4 + 802ac72: 68fb ldr r3, [r7, #12] + 802ac74: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear TX descriptor so that we can proceed */ dmatxdesc->DESC3 = (ETH_DMATXNDESCWBF_FD | ETH_DMATXNDESCWBF_LD); - 802abf4: 697b ldr r3, [r7, #20] - 802abf6: f04f 5240 mov.w r2, #805306368 ; 0x30000000 - 802abfa: 60da str r2, [r3, #12] + 802ac78: 697b ldr r3, [r7, #20] + 802ac7a: f04f 5240 mov.w r2, #805306368 ; 0x30000000 + 802ac7e: 60da str r2, [r3, #12] return HAL_ERROR; - 802abfc: 2301 movs r3, #1 - 802abfe: e006 b.n 802ac0e + 802ac80: 2301 movs r3, #1 + 802ac82: e006 b.n 802ac92 while ((dmatxdesc->DESC3 & ETH_DMATXNDESCWBF_OWN) != (uint32_t)RESET) - 802ac00: 697b ldr r3, [r7, #20] - 802ac02: 68db ldr r3, [r3, #12] - 802ac04: 2b00 cmp r3, #0 - 802ac06: dbc1 blt.n 802ab8c + 802ac84: 697b ldr r3, [r7, #20] + 802ac86: 68db ldr r3, [r3, #12] + 802ac88: 2b00 cmp r3, #0 + 802ac8a: dbc1 blt.n 802ac10 } } } /* Return function status */ return HAL_OK; - 802ac08: 2300 movs r3, #0 - 802ac0a: e000 b.n 802ac0e + 802ac8c: 2300 movs r3, #0 + 802ac8e: e000 b.n 802ac92 } else { return HAL_ERROR; - 802ac0c: 2301 movs r3, #1 + 802ac90: 2301 movs r3, #1 } } - 802ac0e: 4618 mov r0, r3 - 802ac10: 3718 adds r7, #24 - 802ac12: 46bd mov sp, r7 - 802ac14: bd80 pop {r7, pc} + 802ac92: 4618 mov r0, r3 + 802ac94: 3718 adds r7, #24 + 802ac96: 46bd mov sp, r7 + 802ac98: bd80 pop {r7, pc} -0802ac16 : +0802ac9a : * the configuration information for ETHERNET module * @param pAppBuff: Pointer to an application buffer to receive the packet. * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff) { - 802ac16: b580 push {r7, lr} - 802ac18: b088 sub sp, #32 - 802ac1a: af00 add r7, sp, #0 - 802ac1c: 6078 str r0, [r7, #4] - 802ac1e: 6039 str r1, [r7, #0] + 802ac9a: b580 push {r7, lr} + 802ac9c: b088 sub sp, #32 + 802ac9e: af00 add r7, sp, #0 + 802aca0: 6078 str r0, [r7, #4] + 802aca2: 6039 str r1, [r7, #0] uint32_t descidx; ETH_DMADescTypeDef *dmarxdesc; uint32_t desccnt = 0U; - 802ac20: 2300 movs r3, #0 - 802ac22: 617b str r3, [r7, #20] + 802aca4: 2300 movs r3, #0 + 802aca6: 617b str r3, [r7, #20] uint32_t desccntmax; uint32_t bufflength; uint8_t rxdataready = 0U; - 802ac24: 2300 movs r3, #0 - 802ac26: 73fb strb r3, [r7, #15] + 802aca8: 2300 movs r3, #0 + 802acaa: 73fb strb r3, [r7, #15] if (pAppBuff == NULL) - 802ac28: 683b ldr r3, [r7, #0] - 802ac2a: 2b00 cmp r3, #0 - 802ac2c: d109 bne.n 802ac42 + 802acac: 683b ldr r3, [r7, #0] + 802acae: 2b00 cmp r3, #0 + 802acb0: d109 bne.n 802acc6 { heth->ErrorCode |= HAL_ETH_ERROR_PARAM; - 802ac2e: 687b ldr r3, [r7, #4] - 802ac30: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802ac34: f043 0201 orr.w r2, r3, #1 - 802ac38: 687b ldr r3, [r7, #4] - 802ac3a: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802acb2: 687b ldr r3, [r7, #4] + 802acb4: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802acb8: f043 0201 orr.w r2, r3, #1 + 802acbc: 687b ldr r3, [r7, #4] + 802acbe: f8c3 2088 str.w r2, [r3, #136] ; 0x88 return HAL_ERROR; - 802ac3e: 2301 movs r3, #1 - 802ac40: e0a5 b.n 802ad8e + 802acc2: 2301 movs r3, #1 + 802acc4: e0a5 b.n 802ae12 } if (heth->gState != HAL_ETH_STATE_STARTED) - 802ac42: 687b ldr r3, [r7, #4] - 802ac44: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802ac48: 2b23 cmp r3, #35 ; 0x23 - 802ac4a: d001 beq.n 802ac50 + 802acc6: 687b ldr r3, [r7, #4] + 802acc8: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802accc: 2b23 cmp r3, #35 ; 0x23 + 802acce: d001 beq.n 802acd4 { return HAL_ERROR; - 802ac4c: 2301 movs r3, #1 - 802ac4e: e09e b.n 802ad8e + 802acd0: 2301 movs r3, #1 + 802acd2: e09e b.n 802ae12 } descidx = heth->RxDescList.RxDescIdx; - 802ac50: 687b ldr r3, [r7, #4] - 802ac52: 6ddb ldr r3, [r3, #92] ; 0x5c - 802ac54: 61fb str r3, [r7, #28] + 802acd4: 687b ldr r3, [r7, #4] + 802acd6: 6ddb ldr r3, [r3, #92] ; 0x5c + 802acd8: 61fb str r3, [r7, #28] dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; - 802ac56: 687b ldr r3, [r7, #4] - 802ac58: 69fa ldr r2, [r7, #28] - 802ac5a: 3212 adds r2, #18 - 802ac5c: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802ac60: 61bb str r3, [r7, #24] + 802acda: 687b ldr r3, [r7, #4] + 802acdc: 69fa ldr r2, [r7, #28] + 802acde: 3212 adds r2, #18 + 802ace0: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802ace4: 61bb str r3, [r7, #24] desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt; - 802ac62: 687b ldr r3, [r7, #4] - 802ac64: 6edb ldr r3, [r3, #108] ; 0x6c - 802ac66: f1c3 0304 rsb r3, r3, #4 - 802ac6a: 60bb str r3, [r7, #8] + 802ace6: 687b ldr r3, [r7, #4] + 802ace8: 6edb ldr r3, [r3, #108] ; 0x6c + 802acea: f1c3 0304 rsb r3, r3, #4 + 802acee: 60bb str r3, [r7, #8] /* Check if descriptor is not owned by DMA */ while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax) - 802ac6c: e067 b.n 802ad3e + 802acf0: e067 b.n 802adc2 && (rxdataready == 0U)) { if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_CTXT) != (uint32_t)RESET) - 802ac6e: 69bb ldr r3, [r7, #24] - 802ac70: 68db ldr r3, [r3, #12] - 802ac72: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 - 802ac76: 2b00 cmp r3, #0 - 802ac78: d007 beq.n 802ac8a + 802acf2: 69bb ldr r3, [r7, #24] + 802acf4: 68db ldr r3, [r3, #12] + 802acf6: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 + 802acfa: 2b00 cmp r3, #0 + 802acfc: d007 beq.n 802ad0e { /* Get timestamp high */ heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC1; - 802ac7a: 69bb ldr r3, [r7, #24] - 802ac7c: 685a ldr r2, [r3, #4] - 802ac7e: 687b ldr r3, [r7, #4] - 802ac80: 679a str r2, [r3, #120] ; 0x78 + 802acfe: 69bb ldr r3, [r7, #24] + 802ad00: 685a ldr r2, [r3, #4] + 802ad02: 687b ldr r3, [r7, #4] + 802ad04: 679a str r2, [r3, #120] ; 0x78 /* Get timestamp low */ heth->RxDescList.TimeStamp.TimeStampLow = dmarxdesc->DESC0; - 802ac82: 69bb ldr r3, [r7, #24] - 802ac84: 681a ldr r2, [r3, #0] - 802ac86: 687b ldr r3, [r7, #4] - 802ac88: 675a str r2, [r3, #116] ; 0x74 + 802ad06: 69bb ldr r3, [r7, #24] + 802ad08: 681a ldr r2, [r3, #0] + 802ad0a: 687b ldr r3, [r7, #4] + 802ad0c: 675a str r2, [r3, #116] ; 0x74 } if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRxStart != NULL)) - 802ac8a: 69bb ldr r3, [r7, #24] - 802ac8c: 68db ldr r3, [r3, #12] - 802ac8e: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 802ac92: 2b00 cmp r3, #0 - 802ac94: d103 bne.n 802ac9e - 802ac96: 687b ldr r3, [r7, #4] - 802ac98: 6fdb ldr r3, [r3, #124] ; 0x7c - 802ac9a: 2b00 cmp r3, #0 - 802ac9c: d03d beq.n 802ad1a + 802ad0e: 69bb ldr r3, [r7, #24] + 802ad10: 68db ldr r3, [r3, #12] + 802ad12: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 802ad16: 2b00 cmp r3, #0 + 802ad18: d103 bne.n 802ad22 + 802ad1a: 687b ldr r3, [r7, #4] + 802ad1c: 6fdb ldr r3, [r3, #124] ; 0x7c + 802ad1e: 2b00 cmp r3, #0 + 802ad20: d03d beq.n 802ad9e { /* Check if first descriptor */ if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) - 802ac9e: 69bb ldr r3, [r7, #24] - 802aca0: 68db ldr r3, [r3, #12] - 802aca2: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 802aca6: 2b00 cmp r3, #0 - 802aca8: d005 beq.n 802acb6 + 802ad22: 69bb ldr r3, [r7, #24] + 802ad24: 68db ldr r3, [r3, #12] + 802ad26: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 802ad2a: 2b00 cmp r3, #0 + 802ad2c: d005 beq.n 802ad3a { heth->RxDescList.RxDescCnt = 0; - 802acaa: 687b ldr r3, [r7, #4] - 802acac: 2200 movs r2, #0 - 802acae: 661a str r2, [r3, #96] ; 0x60 + 802ad2e: 687b ldr r3, [r7, #4] + 802ad30: 2200 movs r2, #0 + 802ad32: 661a str r2, [r3, #96] ; 0x60 heth->RxDescList.RxDataLength = 0; - 802acb0: 687b ldr r3, [r7, #4] - 802acb2: 2200 movs r2, #0 - 802acb4: 665a str r2, [r3, #100] ; 0x64 + 802ad34: 687b ldr r3, [r7, #4] + 802ad36: 2200 movs r2, #0 + 802ad38: 665a str r2, [r3, #100] ; 0x64 } /* Check if last descriptor */ bufflength = heth->Init.RxBuffLen; - 802acb6: 687b ldr r3, [r7, #4] - 802acb8: 695b ldr r3, [r3, #20] - 802acba: 613b str r3, [r7, #16] + 802ad3a: 687b ldr r3, [r7, #4] + 802ad3c: 695b ldr r3, [r3, #20] + 802ad3e: 613b str r3, [r7, #16] if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET) - 802acbc: 69bb ldr r3, [r7, #24] - 802acbe: 68db ldr r3, [r3, #12] - 802acc0: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 802acc4: 2b00 cmp r3, #0 - 802acc6: d00d beq.n 802ace4 + 802ad40: 69bb ldr r3, [r7, #24] + 802ad42: 68db ldr r3, [r3, #12] + 802ad44: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 802ad48: 2b00 cmp r3, #0 + 802ad4a: d00d beq.n 802ad68 { bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength; - 802acc8: 69bb ldr r3, [r7, #24] - 802acca: 68db ldr r3, [r3, #12] - 802accc: f3c3 020e ubfx r2, r3, #0, #15 - 802acd0: 687b ldr r3, [r7, #4] - 802acd2: 6e5b ldr r3, [r3, #100] ; 0x64 - 802acd4: 1ad3 subs r3, r2, r3 - 802acd6: 613b str r3, [r7, #16] + 802ad4c: 69bb ldr r3, [r7, #24] + 802ad4e: 68db ldr r3, [r3, #12] + 802ad50: f3c3 020e ubfx r2, r3, #0, #15 + 802ad54: 687b ldr r3, [r7, #4] + 802ad56: 6e5b ldr r3, [r3, #100] ; 0x64 + 802ad58: 1ad3 subs r3, r2, r3 + 802ad5a: 613b str r3, [r7, #16] /* Save Last descriptor index */ heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3; - 802acd8: 69bb ldr r3, [r7, #24] - 802acda: 68da ldr r2, [r3, #12] - 802acdc: 687b ldr r3, [r7, #4] - 802acde: 671a str r2, [r3, #112] ; 0x70 + 802ad5c: 69bb ldr r3, [r7, #24] + 802ad5e: 68da ldr r2, [r3, #12] + 802ad60: 687b ldr r3, [r7, #4] + 802ad62: 671a str r2, [r3, #112] ; 0x70 /* Packet ready */ rxdataready = 1; - 802ace0: 2301 movs r3, #1 - 802ace2: 73fb strb r3, [r7, #15] + 802ad64: 2301 movs r3, #1 + 802ad66: 73fb strb r3, [r7, #15] /*Call registered Link callback*/ heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, (uint8_t *)dmarxdesc->BackupAddr0, bufflength); #else /* Link callback */ HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, - 802ace4: 687b ldr r3, [r7, #4] - 802ace6: f103 007c add.w r0, r3, #124 ; 0x7c - 802acea: 687b ldr r3, [r7, #4] - 802acec: f103 0180 add.w r1, r3, #128 ; 0x80 + 802ad68: 687b ldr r3, [r7, #4] + 802ad6a: f103 007c add.w r0, r3, #124 ; 0x7c + 802ad6e: 687b ldr r3, [r7, #4] + 802ad70: f103 0180 add.w r1, r3, #128 ; 0x80 (uint8_t *)dmarxdesc->BackupAddr0, (uint16_t) bufflength); - 802acf0: 69bb ldr r3, [r7, #24] - 802acf2: 691b ldr r3, [r3, #16] + 802ad74: 69bb ldr r3, [r7, #24] + 802ad76: 691b ldr r3, [r3, #16] HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd, - 802acf4: 461a mov r2, r3 - 802acf6: 693b ldr r3, [r7, #16] - 802acf8: b29b uxth r3, r3 - 802acfa: f00b f885 bl 8035e08 + 802ad78: 461a mov r2, r3 + 802ad7a: 693b ldr r3, [r7, #16] + 802ad7c: b29b uxth r3, r3 + 802ad7e: f00b f885 bl 8035e8c #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ heth->RxDescList.RxDescCnt++; - 802acfe: 687b ldr r3, [r7, #4] - 802ad00: 6e1b ldr r3, [r3, #96] ; 0x60 - 802ad02: 1c5a adds r2, r3, #1 - 802ad04: 687b ldr r3, [r7, #4] - 802ad06: 661a str r2, [r3, #96] ; 0x60 + 802ad82: 687b ldr r3, [r7, #4] + 802ad84: 6e1b ldr r3, [r3, #96] ; 0x60 + 802ad86: 1c5a adds r2, r3, #1 + 802ad88: 687b ldr r3, [r7, #4] + 802ad8a: 661a str r2, [r3, #96] ; 0x60 heth->RxDescList.RxDataLength += bufflength; - 802ad08: 687b ldr r3, [r7, #4] - 802ad0a: 6e5a ldr r2, [r3, #100] ; 0x64 - 802ad0c: 693b ldr r3, [r7, #16] - 802ad0e: 441a add r2, r3 - 802ad10: 687b ldr r3, [r7, #4] - 802ad12: 665a str r2, [r3, #100] ; 0x64 + 802ad8c: 687b ldr r3, [r7, #4] + 802ad8e: 6e5a ldr r2, [r3, #100] ; 0x64 + 802ad90: 693b ldr r3, [r7, #16] + 802ad92: 441a add r2, r3 + 802ad94: 687b ldr r3, [r7, #4] + 802ad96: 665a str r2, [r3, #100] ; 0x64 /* Clear buffer pointer */ dmarxdesc->BackupAddr0 = 0; - 802ad14: 69bb ldr r3, [r7, #24] - 802ad16: 2200 movs r2, #0 - 802ad18: 611a str r2, [r3, #16] + 802ad98: 69bb ldr r3, [r7, #24] + 802ad9a: 2200 movs r2, #0 + 802ad9c: 611a str r2, [r3, #16] } /* Increment current rx descriptor index */ INCR_RX_DESC_INDEX(descidx, 1U); - 802ad1a: 69fb ldr r3, [r7, #28] - 802ad1c: 3301 adds r3, #1 - 802ad1e: 61fb str r3, [r7, #28] - 802ad20: 69fb ldr r3, [r7, #28] - 802ad22: 2b03 cmp r3, #3 - 802ad24: d902 bls.n 802ad2c - 802ad26: 69fb ldr r3, [r7, #28] - 802ad28: 3b04 subs r3, #4 - 802ad2a: 61fb str r3, [r7, #28] + 802ad9e: 69fb ldr r3, [r7, #28] + 802ada0: 3301 adds r3, #1 + 802ada2: 61fb str r3, [r7, #28] + 802ada4: 69fb ldr r3, [r7, #28] + 802ada6: 2b03 cmp r3, #3 + 802ada8: d902 bls.n 802adb0 + 802adaa: 69fb ldr r3, [r7, #28] + 802adac: 3b04 subs r3, #4 + 802adae: 61fb str r3, [r7, #28] /* Get current descriptor address */ dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; - 802ad2c: 687b ldr r3, [r7, #4] - 802ad2e: 69fa ldr r2, [r7, #28] - 802ad30: 3212 adds r2, #18 - 802ad32: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802ad36: 61bb str r3, [r7, #24] + 802adb0: 687b ldr r3, [r7, #4] + 802adb2: 69fa ldr r2, [r7, #28] + 802adb4: 3212 adds r2, #18 + 802adb6: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802adba: 61bb str r3, [r7, #24] desccnt++; - 802ad38: 697b ldr r3, [r7, #20] - 802ad3a: 3301 adds r3, #1 - 802ad3c: 617b str r3, [r7, #20] + 802adbc: 697b ldr r3, [r7, #20] + 802adbe: 3301 adds r3, #1 + 802adc0: 617b str r3, [r7, #20] while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax) - 802ad3e: 69bb ldr r3, [r7, #24] - 802ad40: 68db ldr r3, [r3, #12] - 802ad42: 2b00 cmp r3, #0 - 802ad44: db06 blt.n 802ad54 - 802ad46: 697a ldr r2, [r7, #20] - 802ad48: 68bb ldr r3, [r7, #8] - 802ad4a: 429a cmp r2, r3 - 802ad4c: d202 bcs.n 802ad54 + 802adc2: 69bb ldr r3, [r7, #24] + 802adc4: 68db ldr r3, [r3, #12] + 802adc6: 2b00 cmp r3, #0 + 802adc8: db06 blt.n 802add8 + 802adca: 697a ldr r2, [r7, #20] + 802adcc: 68bb ldr r3, [r7, #8] + 802adce: 429a cmp r2, r3 + 802add0: d202 bcs.n 802add8 && (rxdataready == 0U)) - 802ad4e: 7bfb ldrb r3, [r7, #15] - 802ad50: 2b00 cmp r3, #0 - 802ad52: d08c beq.n 802ac6e + 802add2: 7bfb ldrb r3, [r7, #15] + 802add4: 2b00 cmp r3, #0 + 802add6: d08c beq.n 802acf2 } heth->RxDescList.RxBuildDescCnt += desccnt; - 802ad54: 687b ldr r3, [r7, #4] - 802ad56: 6eda ldr r2, [r3, #108] ; 0x6c - 802ad58: 697b ldr r3, [r7, #20] - 802ad5a: 441a add r2, r3 - 802ad5c: 687b ldr r3, [r7, #4] - 802ad5e: 66da str r2, [r3, #108] ; 0x6c + 802add8: 687b ldr r3, [r7, #4] + 802adda: 6eda ldr r2, [r3, #108] ; 0x6c + 802addc: 697b ldr r3, [r7, #20] + 802adde: 441a add r2, r3 + 802ade0: 687b ldr r3, [r7, #4] + 802ade2: 66da str r2, [r3, #108] ; 0x6c if ((heth->RxDescList.RxBuildDescCnt) != 0U) - 802ad60: 687b ldr r3, [r7, #4] - 802ad62: 6edb ldr r3, [r3, #108] ; 0x6c - 802ad64: 2b00 cmp r3, #0 - 802ad66: d002 beq.n 802ad6e + 802ade4: 687b ldr r3, [r7, #4] + 802ade6: 6edb ldr r3, [r3, #108] ; 0x6c + 802ade8: 2b00 cmp r3, #0 + 802adea: d002 beq.n 802adf2 { /* Update Descriptors */ ETH_UpdateDescriptor(heth); - 802ad68: 6878 ldr r0, [r7, #4] - 802ad6a: f000 f814 bl 802ad96 + 802adec: 6878 ldr r0, [r7, #4] + 802adee: f000 f814 bl 802ae1a } heth->RxDescList.RxDescIdx = descidx; - 802ad6e: 687b ldr r3, [r7, #4] - 802ad70: 69fa ldr r2, [r7, #28] - 802ad72: 65da str r2, [r3, #92] ; 0x5c + 802adf2: 687b ldr r3, [r7, #4] + 802adf4: 69fa ldr r2, [r7, #28] + 802adf6: 65da str r2, [r3, #92] ; 0x5c if (rxdataready == 1U) - 802ad74: 7bfb ldrb r3, [r7, #15] - 802ad76: 2b01 cmp r3, #1 - 802ad78: d108 bne.n 802ad8c + 802adf8: 7bfb ldrb r3, [r7, #15] + 802adfa: 2b01 cmp r3, #1 + 802adfc: d108 bne.n 802ae10 { /* Return received packet */ *pAppBuff = heth->RxDescList.pRxStart; - 802ad7a: 687b ldr r3, [r7, #4] - 802ad7c: 6fda ldr r2, [r3, #124] ; 0x7c - 802ad7e: 683b ldr r3, [r7, #0] - 802ad80: 601a str r2, [r3, #0] + 802adfe: 687b ldr r3, [r7, #4] + 802ae00: 6fda ldr r2, [r3, #124] ; 0x7c + 802ae02: 683b ldr r3, [r7, #0] + 802ae04: 601a str r2, [r3, #0] /* Reset first element */ heth->RxDescList.pRxStart = NULL; - 802ad82: 687b ldr r3, [r7, #4] - 802ad84: 2200 movs r2, #0 - 802ad86: 67da str r2, [r3, #124] ; 0x7c + 802ae06: 687b ldr r3, [r7, #4] + 802ae08: 2200 movs r2, #0 + 802ae0a: 67da str r2, [r3, #124] ; 0x7c return HAL_OK; - 802ad88: 2300 movs r3, #0 - 802ad8a: e000 b.n 802ad8e + 802ae0c: 2300 movs r3, #0 + 802ae0e: e000 b.n 802ae12 } /* Packet not ready */ return HAL_ERROR; - 802ad8c: 2301 movs r3, #1 + 802ae10: 2301 movs r3, #1 } - 802ad8e: 4618 mov r0, r3 - 802ad90: 3720 adds r7, #32 - 802ad92: 46bd mov sp, r7 - 802ad94: bd80 pop {r7, pc} + 802ae12: 4618 mov r0, r3 + 802ae14: 3720 adds r7, #32 + 802ae16: 46bd mov sp, r7 + 802ae18: bd80 pop {r7, pc} -0802ad96 : +0802ae1a : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth) { - 802ad96: b580 push {r7, lr} - 802ad98: b088 sub sp, #32 - 802ad9a: af00 add r7, sp, #0 - 802ad9c: 6078 str r0, [r7, #4] + 802ae1a: b580 push {r7, lr} + 802ae1c: b088 sub sp, #32 + 802ae1e: af00 add r7, sp, #0 + 802ae20: 6078 str r0, [r7, #4] uint32_t descidx; uint32_t desccount; ETH_DMADescTypeDef *dmarxdesc; uint8_t *buff = NULL; - 802ad9e: 2300 movs r3, #0 - 802ada0: 60fb str r3, [r7, #12] + 802ae22: 2300 movs r3, #0 + 802ae24: 60fb str r3, [r7, #12] uint8_t allocStatus = 1U; - 802ada2: 2301 movs r3, #1 - 802ada4: 74fb strb r3, [r7, #19] + 802ae26: 2301 movs r3, #1 + 802ae28: 74fb strb r3, [r7, #19] descidx = heth->RxDescList.RxBuildDescIdx; - 802ada6: 687b ldr r3, [r7, #4] - 802ada8: 6e9b ldr r3, [r3, #104] ; 0x68 - 802adaa: 61fb str r3, [r7, #28] + 802ae2a: 687b ldr r3, [r7, #4] + 802ae2c: 6e9b ldr r3, [r3, #104] ; 0x68 + 802ae2e: 61fb str r3, [r7, #28] dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; - 802adac: 687b ldr r3, [r7, #4] - 802adae: 69fa ldr r2, [r7, #28] - 802adb0: 3212 adds r2, #18 - 802adb2: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802adb6: 617b str r3, [r7, #20] + 802ae30: 687b ldr r3, [r7, #4] + 802ae32: 69fa ldr r2, [r7, #28] + 802ae34: 3212 adds r2, #18 + 802ae36: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802ae3a: 617b str r3, [r7, #20] desccount = heth->RxDescList.RxBuildDescCnt; - 802adb8: 687b ldr r3, [r7, #4] - 802adba: 6edb ldr r3, [r3, #108] ; 0x6c - 802adbc: 61bb str r3, [r7, #24] + 802ae3c: 687b ldr r3, [r7, #4] + 802ae3e: 6edb ldr r3, [r3, #108] ; 0x6c + 802ae40: 61bb str r3, [r7, #24] while ((desccount > 0U) && (allocStatus != 0U)) - 802adbe: e03b b.n 802ae38 + 802ae42: e03b b.n 802aebc { /* Check if a buffer's attached the descriptor */ if (READ_REG(dmarxdesc->BackupAddr0) == 0U) - 802adc0: 697b ldr r3, [r7, #20] - 802adc2: 691b ldr r3, [r3, #16] - 802adc4: 2b00 cmp r3, #0 - 802adc6: d112 bne.n 802adee + 802ae44: 697b ldr r3, [r7, #20] + 802ae46: 691b ldr r3, [r3, #16] + 802ae48: 2b00 cmp r3, #0 + 802ae4a: d112 bne.n 802ae72 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /*Call registered Allocate callback*/ heth->rxAllocateCallback(&buff); #else /* Allocate callback */ HAL_ETH_RxAllocateCallback(&buff); - 802adc8: f107 030c add.w r3, r7, #12 - 802adcc: 4618 mov r0, r3 - 802adce: f00a ffeb bl 8035da8 + 802ae4c: f107 030c add.w r3, r7, #12 + 802ae50: 4618 mov r0, r3 + 802ae52: f00a ffeb bl 8035e2c #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ if (buff == NULL) - 802add2: 68fb ldr r3, [r7, #12] - 802add4: 2b00 cmp r3, #0 - 802add6: d102 bne.n 802adde + 802ae56: 68fb ldr r3, [r7, #12] + 802ae58: 2b00 cmp r3, #0 + 802ae5a: d102 bne.n 802ae62 { allocStatus = 0U; - 802add8: 2300 movs r3, #0 - 802adda: 74fb strb r3, [r7, #19] - 802addc: e007 b.n 802adee + 802ae5c: 2300 movs r3, #0 + 802ae5e: 74fb strb r3, [r7, #19] + 802ae60: e007 b.n 802ae72 } else { WRITE_REG(dmarxdesc->BackupAddr0, (uint32_t)buff); - 802adde: 68fb ldr r3, [r7, #12] - 802ade0: 461a mov r2, r3 - 802ade2: 697b ldr r3, [r7, #20] - 802ade4: 611a str r2, [r3, #16] + 802ae62: 68fb ldr r3, [r7, #12] + 802ae64: 461a mov r2, r3 + 802ae66: 697b ldr r3, [r7, #20] + 802ae68: 611a str r2, [r3, #16] WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff); - 802ade6: 68fb ldr r3, [r7, #12] - 802ade8: 461a mov r2, r3 - 802adea: 697b ldr r3, [r7, #20] - 802adec: 601a str r2, [r3, #0] + 802ae6a: 68fb ldr r3, [r7, #12] + 802ae6c: 461a mov r2, r3 + 802ae6e: 697b ldr r3, [r7, #20] + 802ae70: 601a str r2, [r3, #0] } } if (allocStatus != 0U) - 802adee: 7cfb ldrb r3, [r7, #19] - 802adf0: 2b00 cmp r3, #0 - 802adf2: d021 beq.n 802ae38 + 802ae72: 7cfb ldrb r3, [r7, #19] + 802ae74: 2b00 cmp r3, #0 + 802ae76: d021 beq.n 802aebc __ASM volatile ("dmb 0xF":::"memory"); - 802adf4: f3bf 8f5f dmb sy + 802ae78: f3bf 8f5f dmb sy } - 802adf8: bf00 nop + 802ae7c: bf00 nop { /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); if (heth->RxDescList.ItMode != 0U) - 802adfa: 687b ldr r3, [r7, #4] - 802adfc: 6d9b ldr r3, [r3, #88] ; 0x58 - 802adfe: 2b00 cmp r3, #0 - 802ae00: d004 beq.n 802ae0c + 802ae7e: 687b ldr r3, [r7, #4] + 802ae80: 6d9b ldr r3, [r3, #88] ; 0x58 + 802ae82: 2b00 cmp r3, #0 + 802ae84: d004 beq.n 802ae90 { WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC); - 802ae02: 697b ldr r3, [r7, #20] - 802ae04: f04f 4241 mov.w r2, #3238002688 ; 0xc1000000 - 802ae08: 60da str r2, [r3, #12] - 802ae0a: e003 b.n 802ae14 + 802ae86: 697b ldr r3, [r7, #20] + 802ae88: f04f 4241 mov.w r2, #3238002688 ; 0xc1000000 + 802ae8c: 60da str r2, [r3, #12] + 802ae8e: e003 b.n 802ae98 } else { WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V); - 802ae0c: 697b ldr r3, [r7, #20] - 802ae0e: f04f 4201 mov.w r2, #2164260864 ; 0x81000000 - 802ae12: 60da str r2, [r3, #12] + 802ae90: 697b ldr r3, [r7, #20] + 802ae92: f04f 4201 mov.w r2, #2164260864 ; 0x81000000 + 802ae96: 60da str r2, [r3, #12] } /* Increment current rx descriptor index */ INCR_RX_DESC_INDEX(descidx, 1U); - 802ae14: 69fb ldr r3, [r7, #28] - 802ae16: 3301 adds r3, #1 - 802ae18: 61fb str r3, [r7, #28] - 802ae1a: 69fb ldr r3, [r7, #28] - 802ae1c: 2b03 cmp r3, #3 - 802ae1e: d902 bls.n 802ae26 - 802ae20: 69fb ldr r3, [r7, #28] - 802ae22: 3b04 subs r3, #4 - 802ae24: 61fb str r3, [r7, #28] + 802ae98: 69fb ldr r3, [r7, #28] + 802ae9a: 3301 adds r3, #1 + 802ae9c: 61fb str r3, [r7, #28] + 802ae9e: 69fb ldr r3, [r7, #28] + 802aea0: 2b03 cmp r3, #3 + 802aea2: d902 bls.n 802aeaa + 802aea4: 69fb ldr r3, [r7, #28] + 802aea6: 3b04 subs r3, #4 + 802aea8: 61fb str r3, [r7, #28] /* Get current descriptor address */ dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx]; - 802ae26: 687b ldr r3, [r7, #4] - 802ae28: 69fa ldr r2, [r7, #28] - 802ae2a: 3212 adds r2, #18 - 802ae2c: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802ae30: 617b str r3, [r7, #20] + 802aeaa: 687b ldr r3, [r7, #4] + 802aeac: 69fa ldr r2, [r7, #28] + 802aeae: 3212 adds r2, #18 + 802aeb0: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802aeb4: 617b str r3, [r7, #20] desccount--; - 802ae32: 69bb ldr r3, [r7, #24] - 802ae34: 3b01 subs r3, #1 - 802ae36: 61bb str r3, [r7, #24] + 802aeb6: 69bb ldr r3, [r7, #24] + 802aeb8: 3b01 subs r3, #1 + 802aeba: 61bb str r3, [r7, #24] while ((desccount > 0U) && (allocStatus != 0U)) - 802ae38: 69bb ldr r3, [r7, #24] - 802ae3a: 2b00 cmp r3, #0 - 802ae3c: d002 beq.n 802ae44 - 802ae3e: 7cfb ldrb r3, [r7, #19] - 802ae40: 2b00 cmp r3, #0 - 802ae42: d1bd bne.n 802adc0 + 802aebc: 69bb ldr r3, [r7, #24] + 802aebe: 2b00 cmp r3, #0 + 802aec0: d002 beq.n 802aec8 + 802aec2: 7cfb ldrb r3, [r7, #19] + 802aec4: 2b00 cmp r3, #0 + 802aec6: d1bd bne.n 802ae44 } } if (heth->RxDescList.RxBuildDescCnt != desccount) - 802ae44: 687b ldr r3, [r7, #4] - 802ae46: 6edb ldr r3, [r3, #108] ; 0x6c - 802ae48: 69ba ldr r2, [r7, #24] - 802ae4a: 429a cmp r2, r3 - 802ae4c: d00d beq.n 802ae6a + 802aec8: 687b ldr r3, [r7, #4] + 802aeca: 6edb ldr r3, [r3, #108] ; 0x6c + 802aecc: 69ba ldr r2, [r7, #24] + 802aece: 429a cmp r2, r3 + 802aed0: d00d beq.n 802aeee { /* Set the Tail pointer address */ WRITE_REG(heth->Instance->DMACRDTPR, 0); - 802ae4e: 687b ldr r3, [r7, #4] - 802ae50: 681b ldr r3, [r3, #0] - 802ae52: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ae56: 461a mov r2, r3 - 802ae58: 2300 movs r3, #0 - 802ae5a: f8c2 3128 str.w r3, [r2, #296] ; 0x128 + 802aed2: 687b ldr r3, [r7, #4] + 802aed4: 681b ldr r3, [r3, #0] + 802aed6: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aeda: 461a mov r2, r3 + 802aedc: 2300 movs r3, #0 + 802aede: f8c2 3128 str.w r3, [r2, #296] ; 0x128 heth->RxDescList.RxBuildDescIdx = descidx; - 802ae5e: 687b ldr r3, [r7, #4] - 802ae60: 69fa ldr r2, [r7, #28] - 802ae62: 669a str r2, [r3, #104] ; 0x68 + 802aee2: 687b ldr r3, [r7, #4] + 802aee4: 69fa ldr r2, [r7, #28] + 802aee6: 669a str r2, [r3, #104] ; 0x68 heth->RxDescList.RxBuildDescCnt = desccount; - 802ae64: 687b ldr r3, [r7, #4] - 802ae66: 69ba ldr r2, [r7, #24] - 802ae68: 66da str r2, [r3, #108] ; 0x6c + 802aee8: 687b ldr r3, [r7, #4] + 802aeea: 69ba ldr r2, [r7, #24] + 802aeec: 66da str r2, [r3, #108] ; 0x6c } } - 802ae6a: bf00 nop - 802ae6c: 3720 adds r7, #32 - 802ae6e: 46bd mov sp, r7 - 802ae70: bd80 pop {r7, pc} + 802aeee: bf00 nop + 802aef0: 3720 adds r7, #32 + 802aef2: 46bd mov sp, r7 + 802aef4: bd80 pop {r7, pc} ... -0802ae74 : +0802aef8 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth) { - 802ae74: b580 push {r7, lr} - 802ae76: b084 sub sp, #16 - 802ae78: af00 add r7, sp, #0 - 802ae7a: 6078 str r0, [r7, #4] + 802aef8: b580 push {r7, lr} + 802aefa: b084 sub sp, #16 + 802aefc: af00 add r7, sp, #0 + 802aefe: 6078 str r0, [r7, #4] uint32_t macirqenable; /* Packet received */ if (__HAL_ETH_DMA_GET_IT(heth, ETH_DMACSR_RI)) - 802ae7c: 687b ldr r3, [r7, #4] - 802ae7e: 681b ldr r3, [r3, #0] - 802ae80: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ae84: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802ae88: f003 0340 and.w r3, r3, #64 ; 0x40 - 802ae8c: 2b40 cmp r3, #64 ; 0x40 - 802ae8e: d115 bne.n 802aebc + 802af00: 687b ldr r3, [r7, #4] + 802af02: 681b ldr r3, [r3, #0] + 802af04: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af08: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802af0c: f003 0340 and.w r3, r3, #64 ; 0x40 + 802af10: 2b40 cmp r3, #64 ; 0x40 + 802af12: d115 bne.n 802af40 { if (__HAL_ETH_DMA_GET_IT_SOURCE(heth, ETH_DMACIER_RIE)) - 802ae90: 687b ldr r3, [r7, #4] - 802ae92: 681b ldr r3, [r3, #0] - 802ae94: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802ae98: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 - 802ae9c: f003 0340 and.w r3, r3, #64 ; 0x40 - 802aea0: 2b40 cmp r3, #64 ; 0x40 - 802aea2: d10b bne.n 802aebc + 802af14: 687b ldr r3, [r7, #4] + 802af16: 681b ldr r3, [r3, #0] + 802af18: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af1c: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 + 802af20: f003 0340 and.w r3, r3, #64 ; 0x40 + 802af24: 2b40 cmp r3, #64 ; 0x40 + 802af26: d10b bne.n 802af40 { /* Clear the Eth DMA Rx IT pending bits */ __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_RI | ETH_DMACSR_NIS); - 802aea4: 687b ldr r3, [r7, #4] - 802aea6: 681b ldr r3, [r3, #0] - 802aea8: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aeac: 461a mov r2, r3 - 802aeae: f248 0340 movw r3, #32832 ; 0x8040 - 802aeb2: f8c2 3160 str.w r3, [r2, #352] ; 0x160 + 802af28: 687b ldr r3, [r7, #4] + 802af2a: 681b ldr r3, [r3, #0] + 802af2c: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af30: 461a mov r2, r3 + 802af32: f248 0340 movw r3, #32832 ; 0x8040 + 802af36: f8c2 3160 str.w r3, [r2, #352] ; 0x160 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /*Call registered Receive complete callback*/ heth->RxCpltCallback(heth); #else /* Receive complete callback */ HAL_ETH_RxCpltCallback(heth); - 802aeb6: 6878 ldr r0, [r7, #4] - 802aeb8: f000 f8f6 bl 802b0a8 + 802af3a: 6878 ldr r0, [r7, #4] + 802af3c: f000 f8f6 bl 802b12c #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ } } /* Packet transmitted */ if (__HAL_ETH_DMA_GET_IT(heth, ETH_DMACSR_TI)) - 802aebc: 687b ldr r3, [r7, #4] - 802aebe: 681b ldr r3, [r3, #0] - 802aec0: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aec4: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802aec8: f003 0301 and.w r3, r3, #1 - 802aecc: 2b01 cmp r3, #1 - 802aece: d115 bne.n 802aefc + 802af40: 687b ldr r3, [r7, #4] + 802af42: 681b ldr r3, [r3, #0] + 802af44: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af48: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802af4c: f003 0301 and.w r3, r3, #1 + 802af50: 2b01 cmp r3, #1 + 802af52: d115 bne.n 802af80 { if (__HAL_ETH_DMA_GET_IT_SOURCE(heth, ETH_DMACIER_TIE)) - 802aed0: 687b ldr r3, [r7, #4] - 802aed2: 681b ldr r3, [r3, #0] - 802aed4: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aed8: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 - 802aedc: f003 0301 and.w r3, r3, #1 - 802aee0: 2b01 cmp r3, #1 - 802aee2: d10b bne.n 802aefc + 802af54: 687b ldr r3, [r7, #4] + 802af56: 681b ldr r3, [r3, #0] + 802af58: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af5c: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 + 802af60: f003 0301 and.w r3, r3, #1 + 802af64: 2b01 cmp r3, #1 + 802af66: d10b bne.n 802af80 { /* Clear the Eth DMA Tx IT pending bits */ __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_TI | ETH_DMACSR_NIS); - 802aee4: 687b ldr r3, [r7, #4] - 802aee6: 681b ldr r3, [r3, #0] - 802aee8: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802aeec: 461a mov r2, r3 - 802aeee: f248 0301 movw r3, #32769 ; 0x8001 - 802aef2: f8c2 3160 str.w r3, [r2, #352] ; 0x160 + 802af68: 687b ldr r3, [r7, #4] + 802af6a: 681b ldr r3, [r3, #0] + 802af6c: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af70: 461a mov r2, r3 + 802af72: f248 0301 movw r3, #32769 ; 0x8001 + 802af76: f8c2 3160 str.w r3, [r2, #352] ; 0x160 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /*Call registered Transmit complete callback*/ heth->TxCpltCallback(heth); #else /* Transfer complete callback */ HAL_ETH_TxCpltCallback(heth); - 802aef6: 6878 ldr r0, [r7, #4] - 802aef8: f000 f8cc bl 802b094 + 802af7a: 6878 ldr r0, [r7, #4] + 802af7c: f000 f8cc bl 802b118 } } /* ETH DMA Error */ if (__HAL_ETH_DMA_GET_IT(heth, ETH_DMACSR_AIS)) - 802aefc: 687b ldr r3, [r7, #4] - 802aefe: 681b ldr r3, [r3, #0] - 802af00: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af04: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802af08: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 802af0c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 802af10: d153 bne.n 802afba + 802af80: 687b ldr r3, [r7, #4] + 802af82: 681b ldr r3, [r3, #0] + 802af84: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af88: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802af8c: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 802af90: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 802af94: d153 bne.n 802b03e { if (__HAL_ETH_DMA_GET_IT_SOURCE(heth, ETH_DMACIER_AIE)) - 802af12: 687b ldr r3, [r7, #4] - 802af14: 681b ldr r3, [r3, #0] - 802af16: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af1a: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 - 802af1e: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 802af22: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 802af26: d148 bne.n 802afba + 802af96: 687b ldr r3, [r7, #4] + 802af98: 681b ldr r3, [r3, #0] + 802af9a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802af9e: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 + 802afa2: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 802afa6: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 802afaa: d148 bne.n 802b03e { heth->ErrorCode |= HAL_ETH_ERROR_DMA; - 802af28: 687b ldr r3, [r7, #4] - 802af2a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802af2e: f043 0208 orr.w r2, r3, #8 - 802af32: 687b ldr r3, [r7, #4] - 802af34: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802afac: 687b ldr r3, [r7, #4] + 802afae: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802afb2: f043 0208 orr.w r2, r3, #8 + 802afb6: 687b ldr r3, [r7, #4] + 802afb8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* if fatal bus error occurred */ if (__HAL_ETH_DMA_GET_IT(heth, ETH_DMACSR_FBE)) - 802af38: 687b ldr r3, [r7, #4] - 802af3a: 681b ldr r3, [r3, #0] - 802af3c: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af40: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802af44: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 802af48: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 802af4c: d11e bne.n 802af8c + 802afbc: 687b ldr r3, [r7, #4] + 802afbe: 681b ldr r3, [r3, #0] + 802afc0: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802afc4: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802afc8: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 802afcc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 802afd0: d11e bne.n 802b010 { /* Get DMA error code */ heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_FBE | ETH_DMACSR_TPS | ETH_DMACSR_RPS)); - 802af4e: 687b ldr r3, [r7, #4] - 802af50: 681b ldr r3, [r3, #0] - 802af52: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af56: f8d3 2160 ldr.w r2, [r3, #352] ; 0x160 - 802af5a: f241 1302 movw r3, #4354 ; 0x1102 - 802af5e: 4013 ands r3, r2 - 802af60: 687a ldr r2, [r7, #4] - 802af62: f8c2 308c str.w r3, [r2, #140] ; 0x8c + 802afd2: 687b ldr r3, [r7, #4] + 802afd4: 681b ldr r3, [r3, #0] + 802afd6: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802afda: f8d3 2160 ldr.w r2, [r3, #352] ; 0x160 + 802afde: f241 1302 movw r3, #4354 ; 0x1102 + 802afe2: 4013 ands r3, r2 + 802afe4: 687a ldr r2, [r7, #4] + 802afe6: f8c2 308c str.w r3, [r2, #140] ; 0x8c /* Disable all interrupts */ __HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMACIER_NIE | ETH_DMACIER_AIE); - 802af66: 687b ldr r3, [r7, #4] - 802af68: 681b ldr r3, [r3, #0] - 802af6a: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af6e: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 - 802af72: 687a ldr r2, [r7, #4] - 802af74: 6812 ldr r2, [r2, #0] - 802af76: f423 4340 bic.w r3, r3, #49152 ; 0xc000 - 802af7a: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802af7e: f8c2 3134 str.w r3, [r2, #308] ; 0x134 + 802afea: 687b ldr r3, [r7, #4] + 802afec: 681b ldr r3, [r3, #0] + 802afee: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802aff2: f8d3 3134 ldr.w r3, [r3, #308] ; 0x134 + 802aff6: 687a ldr r2, [r7, #4] + 802aff8: 6812 ldr r2, [r2, #0] + 802affa: f423 4340 bic.w r3, r3, #49152 ; 0xc000 + 802affe: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802b002: f8c2 3134 str.w r3, [r2, #308] ; 0x134 /* Set HAL state to ERROR */ heth->gState = HAL_ETH_STATE_ERROR; - 802af82: 687b ldr r3, [r7, #4] - 802af84: 22e0 movs r2, #224 ; 0xe0 - 802af86: f8c3 2084 str.w r2, [r3, #132] ; 0x84 - 802af8a: e013 b.n 802afb4 + 802b006: 687b ldr r3, [r7, #4] + 802b008: 22e0 movs r2, #224 ; 0xe0 + 802b00a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802b00e: e013 b.n 802b038 } else { /* Get DMA error status */ heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT | - 802af8c: 687b ldr r3, [r7, #4] - 802af8e: 681b ldr r3, [r3, #0] - 802af90: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802af94: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 - 802af98: f403 42cd and.w r2, r3, #26240 ; 0x6680 - 802af9c: 687b ldr r3, [r7, #4] - 802af9e: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 802b010: 687b ldr r3, [r7, #4] + 802b012: 681b ldr r3, [r3, #0] + 802b014: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802b018: f8d3 3160 ldr.w r3, [r3, #352] ; 0x160 + 802b01c: f403 42cd and.w r2, r3, #26240 ; 0x6680 + 802b020: 687b ldr r3, [r7, #4] + 802b022: f8c3 208c str.w r2, [r3, #140] ; 0x8c ETH_DMACSR_RBU | ETH_DMACSR_AIS)); /* Clear the interrupt summary flag */ __HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT | - 802afa2: 687b ldr r3, [r7, #4] - 802afa4: 681b ldr r3, [r3, #0] - 802afa6: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802afaa: 461a mov r2, r3 - 802afac: f44f 43cd mov.w r3, #26240 ; 0x6680 - 802afb0: f8c2 3160 str.w r3, [r2, #352] ; 0x160 + 802b026: 687b ldr r3, [r7, #4] + 802b028: 681b ldr r3, [r3, #0] + 802b02a: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802b02e: 461a mov r2, r3 + 802b030: f44f 43cd mov.w r3, #26240 ; 0x6680 + 802b034: f8c2 3160 str.w r3, [r2, #352] ; 0x160 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered Error callback*/ heth->ErrorCallback(heth); #else /* Ethernet DMA Error callback */ HAL_ETH_ErrorCallback(heth); - 802afb4: 6878 ldr r0, [r7, #4] - 802afb6: f000 f881 bl 802b0bc + 802b038: 6878 ldr r0, [r7, #4] + 802b03a: f000 f881 bl 802b140 } } /* ETH MAC Error IT */ macirqenable = heth->Instance->MACIER; - 802afba: 687b ldr r3, [r7, #4] - 802afbc: 681b ldr r3, [r3, #0] - 802afbe: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 802afc2: 60fb str r3, [r7, #12] + 802b03e: 687b ldr r3, [r7, #4] + 802b040: 681b ldr r3, [r3, #0] + 802b042: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 802b046: 60fb str r3, [r7, #12] if (((macirqenable & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \ - 802afc4: 68fb ldr r3, [r7, #12] - 802afc6: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 802afca: 2b00 cmp r3, #0 - 802afcc: d104 bne.n 802afd8 + 802b048: 68fb ldr r3, [r7, #12] + 802b04a: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 802b04e: 2b00 cmp r3, #0 + 802b050: d104 bne.n 802b05c ((macirqenable & ETH_MACIER_TXSTSIE) == ETH_MACIER_TXSTSIE)) - 802afce: 68fb ldr r3, [r7, #12] - 802afd0: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 802b052: 68fb ldr r3, [r7, #12] + 802b054: f403 5300 and.w r3, r3, #8192 ; 0x2000 if (((macirqenable & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \ - 802afd4: 2b00 cmp r3, #0 - 802afd6: d019 beq.n 802b00c + 802b058: 2b00 cmp r3, #0 + 802b05a: d019 beq.n 802b090 { heth->ErrorCode |= HAL_ETH_ERROR_MAC; - 802afd8: 687b ldr r3, [r7, #4] - 802afda: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802afde: f043 0210 orr.w r2, r3, #16 - 802afe2: 687b ldr r3, [r7, #4] - 802afe4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802b05c: 687b ldr r3, [r7, #4] + 802b05e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802b062: f043 0210 orr.w r2, r3, #16 + 802b066: 687b ldr r3, [r7, #4] + 802b068: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Get MAC Rx Tx status and clear Status register pending bit */ heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR); - 802afe8: 687b ldr r3, [r7, #4] - 802afea: 681b ldr r3, [r3, #0] - 802afec: f8d3 20b8 ldr.w r2, [r3, #184] ; 0xb8 - 802aff0: 687b ldr r3, [r7, #4] - 802aff2: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 802b06c: 687b ldr r3, [r7, #4] + 802b06e: 681b ldr r3, [r3, #0] + 802b070: f8d3 20b8 ldr.w r2, [r3, #184] ; 0xb8 + 802b074: 687b ldr r3, [r7, #4] + 802b076: f8c3 2090 str.w r2, [r3, #144] ; 0x90 heth->gState = HAL_ETH_STATE_ERROR; - 802aff6: 687b ldr r3, [r7, #4] - 802aff8: 22e0 movs r2, #224 ; 0xe0 - 802affa: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802b07a: 687b ldr r3, [r7, #4] + 802b07c: 22e0 movs r2, #224 ; 0xe0 + 802b07e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered Error callback*/ heth->ErrorCallback(heth); #else /* Ethernet Error callback */ HAL_ETH_ErrorCallback(heth); - 802affe: 6878 ldr r0, [r7, #4] - 802b000: f000 f85c bl 802b0bc + 802b082: 6878 ldr r0, [r7, #4] + 802b084: f000 f85c bl 802b140 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ heth->MACErrorCode = (uint32_t)(0x0U); - 802b004: 687b ldr r3, [r7, #4] - 802b006: 2200 movs r2, #0 - 802b008: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 802b088: 687b ldr r3, [r7, #4] + 802b08a: 2200 movs r2, #0 + 802b08c: f8c3 2090 str.w r2, [r3, #144] ; 0x90 } /* ETH PMT IT */ if (__HAL_ETH_MAC_GET_IT(heth, ETH_MAC_PMT_IT)) - 802b00c: 687b ldr r3, [r7, #4] - 802b00e: 681b ldr r3, [r3, #0] - 802b010: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802b014: f003 0310 and.w r3, r3, #16 - 802b018: 2b10 cmp r3, #16 - 802b01a: d10f bne.n 802b03c + 802b090: 687b ldr r3, [r7, #4] + 802b092: 681b ldr r3, [r3, #0] + 802b094: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802b098: f003 0310 and.w r3, r3, #16 + 802b09c: 2b10 cmp r3, #16 + 802b09e: d10f bne.n 802b0c0 { /* Get MAC Wake-up source and clear the status register pending bit */ heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPRCVD)); - 802b01c: 687b ldr r3, [r7, #4] - 802b01e: 681b ldr r3, [r3, #0] - 802b020: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802b024: f003 0260 and.w r2, r3, #96 ; 0x60 - 802b028: 687b ldr r3, [r7, #4] - 802b02a: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 802b0a0: 687b ldr r3, [r7, #4] + 802b0a2: 681b ldr r3, [r3, #0] + 802b0a4: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802b0a8: f003 0260 and.w r2, r3, #96 ; 0x60 + 802b0ac: 687b ldr r3, [r7, #4] + 802b0ae: f8c3 2094 str.w r2, [r3, #148] ; 0x94 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered PMT callback*/ heth->PMTCallback(heth); #else /* Ethernet PMT callback */ HAL_ETH_PMTCallback(heth); - 802b02e: 6878 ldr r0, [r7, #4] - 802b030: f000 f84e bl 802b0d0 + 802b0b2: 6878 ldr r0, [r7, #4] + 802b0b4: f000 f84e bl 802b154 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ heth->MACWakeUpEvent = (uint32_t)(0x0U); - 802b034: 687b ldr r3, [r7, #4] - 802b036: 2200 movs r2, #0 - 802b038: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 802b0b8: 687b ldr r3, [r7, #4] + 802b0ba: 2200 movs r2, #0 + 802b0bc: f8c3 2094 str.w r2, [r3, #148] ; 0x94 } /* ETH EEE IT */ if (__HAL_ETH_MAC_GET_IT(heth, ETH_MAC_LPI_IT)) - 802b03c: 687b ldr r3, [r7, #4] - 802b03e: 681b ldr r3, [r3, #0] - 802b040: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802b044: f003 0320 and.w r3, r3, #32 - 802b048: 2b20 cmp r3, #32 - 802b04a: d10f bne.n 802b06c + 802b0c0: 687b ldr r3, [r7, #4] + 802b0c2: 681b ldr r3, [r3, #0] + 802b0c4: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802b0c8: f003 0320 and.w r3, r3, #32 + 802b0cc: 2b20 cmp r3, #32 + 802b0ce: d10f bne.n 802b0f0 { /* Get MAC LPI interrupt source and clear the status register pending bit */ heth->MACLPIEvent = READ_BIT(heth->Instance->MACPCSR, 0x0000000FU); - 802b04c: 687b ldr r3, [r7, #4] - 802b04e: 681b ldr r3, [r3, #0] - 802b050: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802b054: f003 020f and.w r2, r3, #15 - 802b058: 687b ldr r3, [r7, #4] - 802b05a: f8c3 2098 str.w r2, [r3, #152] ; 0x98 + 802b0d0: 687b ldr r3, [r7, #4] + 802b0d2: 681b ldr r3, [r3, #0] + 802b0d4: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802b0d8: f003 020f and.w r2, r3, #15 + 802b0dc: 687b ldr r3, [r7, #4] + 802b0de: f8c3 2098 str.w r2, [r3, #152] ; 0x98 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered EEE callback*/ heth->EEECallback(heth); #else /* Ethernet EEE callback */ HAL_ETH_EEECallback(heth); - 802b05e: 6878 ldr r0, [r7, #4] - 802b060: f000 f840 bl 802b0e4 + 802b0e2: 6878 ldr r0, [r7, #4] + 802b0e4: f000 f840 bl 802b168 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ heth->MACLPIEvent = (uint32_t)(0x0U); - 802b064: 687b ldr r3, [r7, #4] - 802b066: 2200 movs r2, #0 - 802b068: f8c3 2098 str.w r2, [r3, #152] ; 0x98 + 802b0e8: 687b ldr r3, [r7, #4] + 802b0ea: 2200 movs r2, #0 + 802b0ec: f8c3 2098 str.w r2, [r3, #152] ; 0x98 #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ } } #else /* USE_HAL_ETH_REGISTER_CALLBACKS */ /* check ETH WAKEUP exti flag */ if (__HAL_ETH_WAKEUP_EXTI_GET_FLAG(ETH_WAKEUP_EXTI_LINE) != (uint32_t)RESET) - 802b06c: 4b08 ldr r3, [pc, #32] ; (802b090 ) - 802b06e: 6a9b ldr r3, [r3, #40] ; 0x28 - 802b070: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 802b074: 2b00 cmp r3, #0 - 802b076: d006 beq.n 802b086 + 802b0f0: 4b08 ldr r3, [pc, #32] ; (802b114 ) + 802b0f2: 6a9b ldr r3, [r3, #40] ; 0x28 + 802b0f4: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 802b0f8: 2b00 cmp r3, #0 + 802b0fa: d006 beq.n 802b10a { /* Clear ETH WAKEUP Exti pending bit */ __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG(ETH_WAKEUP_EXTI_LINE); - 802b078: 4b05 ldr r3, [pc, #20] ; (802b090 ) - 802b07a: f44f 0280 mov.w r2, #4194304 ; 0x400000 - 802b07e: 629a str r2, [r3, #40] ; 0x28 + 802b0fc: 4b05 ldr r3, [pc, #20] ; (802b114 ) + 802b0fe: f44f 0280 mov.w r2, #4194304 ; 0x400000 + 802b102: 629a str r2, [r3, #40] ; 0x28 #if (USE_HAL_ETH_REGISTER_CALLBACKS == 1) /* Call registered WakeUp callback*/ heth->WakeUpCallback(heth); #else /* ETH WAKEUP callback */ HAL_ETH_WakeUpCallback(heth); - 802b080: 6878 ldr r0, [r7, #4] - 802b082: f000 f839 bl 802b0f8 + 802b104: 6878 ldr r0, [r7, #4] + 802b106: f000 f839 bl 802b17c #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ } #endif /* USE_HAL_ETH_REGISTER_CALLBACKS */ } - 802b086: bf00 nop - 802b088: 3710 adds r7, #16 - 802b08a: 46bd mov sp, r7 - 802b08c: bd80 pop {r7, pc} - 802b08e: bf00 nop - 802b090: 58000080 .word 0x58000080 + 802b10a: bf00 nop + 802b10c: 3710 adds r7, #16 + 802b10e: 46bd mov sp, r7 + 802b110: bd80 pop {r7, pc} + 802b112: bf00 nop + 802b114: 58000080 .word 0x58000080 -0802b094 : +0802b118 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth) { - 802b094: b480 push {r7} - 802b096: b083 sub sp, #12 - 802b098: af00 add r7, sp, #0 - 802b09a: 6078 str r0, [r7, #4] + 802b118: b480 push {r7} + 802b11a: b083 sub sp, #12 + 802b11c: af00 add r7, sp, #0 + 802b11e: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_TxCpltCallback could be implemented in the user file */ } - 802b09c: bf00 nop - 802b09e: 370c adds r7, #12 - 802b0a0: 46bd mov sp, r7 - 802b0a2: f85d 7b04 ldr.w r7, [sp], #4 - 802b0a6: 4770 bx lr + 802b120: bf00 nop + 802b122: 370c adds r7, #12 + 802b124: 46bd mov sp, r7 + 802b126: f85d 7b04 ldr.w r7, [sp], #4 + 802b12a: 4770 bx lr -0802b0a8 : +0802b12c : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth) { - 802b0a8: b480 push {r7} - 802b0aa: b083 sub sp, #12 - 802b0ac: af00 add r7, sp, #0 - 802b0ae: 6078 str r0, [r7, #4] + 802b12c: b480 push {r7} + 802b12e: b083 sub sp, #12 + 802b130: af00 add r7, sp, #0 + 802b132: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_RxCpltCallback could be implemented in the user file */ } - 802b0b0: bf00 nop - 802b0b2: 370c adds r7, #12 - 802b0b4: 46bd mov sp, r7 - 802b0b6: f85d 7b04 ldr.w r7, [sp], #4 - 802b0ba: 4770 bx lr + 802b134: bf00 nop + 802b136: 370c adds r7, #12 + 802b138: 46bd mov sp, r7 + 802b13a: f85d 7b04 ldr.w r7, [sp], #4 + 802b13e: 4770 bx lr -0802b0bc : +0802b140 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth) { - 802b0bc: b480 push {r7} - 802b0be: b083 sub sp, #12 - 802b0c0: af00 add r7, sp, #0 - 802b0c2: 6078 str r0, [r7, #4] + 802b140: b480 push {r7} + 802b142: b083 sub sp, #12 + 802b144: af00 add r7, sp, #0 + 802b146: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_ErrorCallback could be implemented in the user file */ } - 802b0c4: bf00 nop - 802b0c6: 370c adds r7, #12 - 802b0c8: 46bd mov sp, r7 - 802b0ca: f85d 7b04 ldr.w r7, [sp], #4 - 802b0ce: 4770 bx lr + 802b148: bf00 nop + 802b14a: 370c adds r7, #12 + 802b14c: 46bd mov sp, r7 + 802b14e: f85d 7b04 ldr.w r7, [sp], #4 + 802b152: 4770 bx lr -0802b0d0 : +0802b154 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth) { - 802b0d0: b480 push {r7} - 802b0d2: b083 sub sp, #12 - 802b0d4: af00 add r7, sp, #0 - 802b0d6: 6078 str r0, [r7, #4] + 802b154: b480 push {r7} + 802b156: b083 sub sp, #12 + 802b158: af00 add r7, sp, #0 + 802b15a: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_PMTCallback could be implemented in the user file */ } - 802b0d8: bf00 nop - 802b0da: 370c adds r7, #12 - 802b0dc: 46bd mov sp, r7 - 802b0de: f85d 7b04 ldr.w r7, [sp], #4 - 802b0e2: 4770 bx lr + 802b15c: bf00 nop + 802b15e: 370c adds r7, #12 + 802b160: 46bd mov sp, r7 + 802b162: f85d 7b04 ldr.w r7, [sp], #4 + 802b166: 4770 bx lr -0802b0e4 : +0802b168 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth) { - 802b0e4: b480 push {r7} - 802b0e6: b083 sub sp, #12 - 802b0e8: af00 add r7, sp, #0 - 802b0ea: 6078 str r0, [r7, #4] + 802b168: b480 push {r7} + 802b16a: b083 sub sp, #12 + 802b16c: af00 add r7, sp, #0 + 802b16e: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_EEECallback could be implemented in the user file */ } - 802b0ec: bf00 nop - 802b0ee: 370c adds r7, #12 - 802b0f0: 46bd mov sp, r7 - 802b0f2: f85d 7b04 ldr.w r7, [sp], #4 - 802b0f6: 4770 bx lr + 802b170: bf00 nop + 802b172: 370c adds r7, #12 + 802b174: 46bd mov sp, r7 + 802b176: f85d 7b04 ldr.w r7, [sp], #4 + 802b17a: 4770 bx lr -0802b0f8 : +0802b17c : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ __weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth) { - 802b0f8: b480 push {r7} - 802b0fa: b083 sub sp, #12 - 802b0fc: af00 add r7, sp, #0 - 802b0fe: 6078 str r0, [r7, #4] + 802b17c: b480 push {r7} + 802b17e: b083 sub sp, #12 + 802b180: af00 add r7, sp, #0 + 802b182: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(heth); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_ETH_WakeUpCallback could be implemented in the user file */ } - 802b100: bf00 nop - 802b102: 370c adds r7, #12 - 802b104: 46bd mov sp, r7 - 802b106: f85d 7b04 ldr.w r7, [sp], #4 - 802b10a: 4770 bx lr + 802b184: bf00 nop + 802b186: 370c adds r7, #12 + 802b188: 46bd mov sp, r7 + 802b18a: f85d 7b04 ldr.w r7, [sp], #4 + 802b18e: 4770 bx lr -0802b10c : +0802b190 : * @param pRegValue: parameter to hold read value * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t *pRegValue) { - 802b10c: b580 push {r7, lr} - 802b10e: b086 sub sp, #24 - 802b110: af00 add r7, sp, #0 - 802b112: 60f8 str r0, [r7, #12] - 802b114: 60b9 str r1, [r7, #8] - 802b116: 607a str r2, [r7, #4] - 802b118: 603b str r3, [r7, #0] + 802b190: b580 push {r7, lr} + 802b192: b086 sub sp, #24 + 802b194: af00 add r7, sp, #0 + 802b196: 60f8 str r0, [r7, #12] + 802b198: 60b9 str r1, [r7, #8] + 802b19a: 607a str r2, [r7, #4] + 802b19c: 603b str r3, [r7, #0] uint32_t tickstart; uint32_t tmpreg; /* Check for the Busy flag */ if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET) - 802b11a: 68fb ldr r3, [r7, #12] - 802b11c: 681b ldr r3, [r3, #0] - 802b11e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b122: f003 0301 and.w r3, r3, #1 - 802b126: 2b00 cmp r3, #0 - 802b128: d001 beq.n 802b12e + 802b19e: 68fb ldr r3, [r7, #12] + 802b1a0: 681b ldr r3, [r3, #0] + 802b1a2: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b1a6: f003 0301 and.w r3, r3, #1 + 802b1aa: 2b00 cmp r3, #0 + 802b1ac: d001 beq.n 802b1b2 { return HAL_ERROR; - 802b12a: 2301 movs r3, #1 - 802b12c: e03e b.n 802b1ac + 802b1ae: 2301 movs r3, #1 + 802b1b0: e03e b.n 802b230 } /* Get the MACMDIOAR value */ WRITE_REG(tmpreg, heth->Instance->MACMDIOAR); - 802b12e: 68fb ldr r3, [r7, #12] - 802b130: 681b ldr r3, [r3, #0] - 802b132: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b136: 617b str r3, [r7, #20] + 802b1b2: 68fb ldr r3, [r7, #12] + 802b1b4: 681b ldr r3, [r3, #0] + 802b1b6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b1ba: 617b str r3, [r7, #20] - Set the PHY device address - Set the PHY register address - Set the read mode - Set the MII Busy bit */ MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21)); - 802b138: 697b ldr r3, [r7, #20] - 802b13a: f023 7278 bic.w r2, r3, #65011712 ; 0x3e00000 - 802b13e: 68bb ldr r3, [r7, #8] - 802b140: 055b lsls r3, r3, #21 - 802b142: 4313 orrs r3, r2 - 802b144: 617b str r3, [r7, #20] + 802b1bc: 697b ldr r3, [r7, #20] + 802b1be: f023 7278 bic.w r2, r3, #65011712 ; 0x3e00000 + 802b1c2: 68bb ldr r3, [r7, #8] + 802b1c4: 055b lsls r3, r3, #21 + 802b1c6: 4313 orrs r3, r2 + 802b1c8: 617b str r3, [r7, #20] MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16)); - 802b146: 697b ldr r3, [r7, #20] - 802b148: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 - 802b14c: 687b ldr r3, [r7, #4] - 802b14e: 041b lsls r3, r3, #16 - 802b150: 4313 orrs r3, r2 - 802b152: 617b str r3, [r7, #20] + 802b1ca: 697b ldr r3, [r7, #20] + 802b1cc: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 + 802b1d0: 687b ldr r3, [r7, #4] + 802b1d2: 041b lsls r3, r3, #16 + 802b1d4: 4313 orrs r3, r2 + 802b1d6: 617b str r3, [r7, #20] MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_RD); - 802b154: 697b ldr r3, [r7, #20] - 802b156: f043 030c orr.w r3, r3, #12 - 802b15a: 617b str r3, [r7, #20] + 802b1d8: 697b ldr r3, [r7, #20] + 802b1da: f043 030c orr.w r3, r3, #12 + 802b1de: 617b str r3, [r7, #20] SET_BIT(tmpreg, ETH_MACMDIOAR_MB); - 802b15c: 697b ldr r3, [r7, #20] - 802b15e: f043 0301 orr.w r3, r3, #1 - 802b162: 617b str r3, [r7, #20] + 802b1e0: 697b ldr r3, [r7, #20] + 802b1e2: f043 0301 orr.w r3, r3, #1 + 802b1e6: 617b str r3, [r7, #20] /* Write the result value into the MDII Address register */ WRITE_REG(heth->Instance->MACMDIOAR, tmpreg); - 802b164: 68fb ldr r3, [r7, #12] - 802b166: 681b ldr r3, [r3, #0] - 802b168: 697a ldr r2, [r7, #20] - 802b16a: f8c3 2200 str.w r2, [r3, #512] ; 0x200 + 802b1e8: 68fb ldr r3, [r7, #12] + 802b1ea: 681b ldr r3, [r3, #0] + 802b1ec: 697a ldr r2, [r7, #20] + 802b1ee: f8c3 2200 str.w r2, [r3, #512] ; 0x200 tickstart = HAL_GetTick(); - 802b16e: f7fa ff29 bl 8025fc4 - 802b172: 6138 str r0, [r7, #16] + 802b1f2: f7fa ff29 bl 8026048 + 802b1f6: 6138 str r0, [r7, #16] /* Wait for the Busy flag */ while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) - 802b174: e009 b.n 802b18a + 802b1f8: e009 b.n 802b20e { if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT)) - 802b176: f7fa ff25 bl 8025fc4 - 802b17a: 4602 mov r2, r0 - 802b17c: 693b ldr r3, [r7, #16] - 802b17e: 1ad3 subs r3, r2, r3 - 802b180: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 802b184: d901 bls.n 802b18a + 802b1fa: f7fa ff25 bl 8026048 + 802b1fe: 4602 mov r2, r0 + 802b200: 693b ldr r3, [r7, #16] + 802b202: 1ad3 subs r3, r2, r3 + 802b204: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 802b208: d901 bls.n 802b20e { return HAL_ERROR; - 802b186: 2301 movs r3, #1 - 802b188: e010 b.n 802b1ac + 802b20a: 2301 movs r3, #1 + 802b20c: e010 b.n 802b230 while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) - 802b18a: 68fb ldr r3, [r7, #12] - 802b18c: 681b ldr r3, [r3, #0] - 802b18e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b192: f003 0301 and.w r3, r3, #1 - 802b196: 2b00 cmp r3, #0 - 802b198: d1ed bne.n 802b176 + 802b20e: 68fb ldr r3, [r7, #12] + 802b210: 681b ldr r3, [r3, #0] + 802b212: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b216: f003 0301 and.w r3, r3, #1 + 802b21a: 2b00 cmp r3, #0 + 802b21c: d1ed bne.n 802b1fa } } /* Get MACMIIDR value */ WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR); - 802b19a: 68fb ldr r3, [r7, #12] - 802b19c: 681b ldr r3, [r3, #0] - 802b19e: f8d3 3204 ldr.w r3, [r3, #516] ; 0x204 - 802b1a2: b29b uxth r3, r3 - 802b1a4: 461a mov r2, r3 - 802b1a6: 683b ldr r3, [r7, #0] - 802b1a8: 601a str r2, [r3, #0] + 802b21e: 68fb ldr r3, [r7, #12] + 802b220: 681b ldr r3, [r3, #0] + 802b222: f8d3 3204 ldr.w r3, [r3, #516] ; 0x204 + 802b226: b29b uxth r3, r3 + 802b228: 461a mov r2, r3 + 802b22a: 683b ldr r3, [r7, #0] + 802b22c: 601a str r2, [r3, #0] return HAL_OK; - 802b1aa: 2300 movs r3, #0 + 802b22e: 2300 movs r3, #0 } - 802b1ac: 4618 mov r0, r3 - 802b1ae: 3718 adds r7, #24 - 802b1b0: 46bd mov sp, r7 - 802b1b2: bd80 pop {r7, pc} + 802b230: 4618 mov r0, r3 + 802b232: 3718 adds r7, #24 + 802b234: 46bd mov sp, r7 + 802b236: bd80 pop {r7, pc} -0802b1b4 : +0802b238 : * @param RegValue: the value to write * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg, uint32_t RegValue) { - 802b1b4: b580 push {r7, lr} - 802b1b6: b086 sub sp, #24 - 802b1b8: af00 add r7, sp, #0 - 802b1ba: 60f8 str r0, [r7, #12] - 802b1bc: 60b9 str r1, [r7, #8] - 802b1be: 607a str r2, [r7, #4] - 802b1c0: 603b str r3, [r7, #0] + 802b238: b580 push {r7, lr} + 802b23a: b086 sub sp, #24 + 802b23c: af00 add r7, sp, #0 + 802b23e: 60f8 str r0, [r7, #12] + 802b240: 60b9 str r1, [r7, #8] + 802b242: 607a str r2, [r7, #4] + 802b244: 603b str r3, [r7, #0] uint32_t tickstart; uint32_t tmpreg; /* Check for the Busy flag */ if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET) - 802b1c2: 68fb ldr r3, [r7, #12] - 802b1c4: 681b ldr r3, [r3, #0] - 802b1c6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b1ca: f003 0301 and.w r3, r3, #1 - 802b1ce: 2b00 cmp r3, #0 - 802b1d0: d001 beq.n 802b1d6 + 802b246: 68fb ldr r3, [r7, #12] + 802b248: 681b ldr r3, [r3, #0] + 802b24a: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b24e: f003 0301 and.w r3, r3, #1 + 802b252: 2b00 cmp r3, #0 + 802b254: d001 beq.n 802b25a { return HAL_ERROR; - 802b1d2: 2301 movs r3, #1 - 802b1d4: e03c b.n 802b250 + 802b256: 2301 movs r3, #1 + 802b258: e03c b.n 802b2d4 } /* Get the MACMDIOAR value */ WRITE_REG(tmpreg, heth->Instance->MACMDIOAR); - 802b1d6: 68fb ldr r3, [r7, #12] - 802b1d8: 681b ldr r3, [r3, #0] - 802b1da: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b1de: 617b str r3, [r7, #20] + 802b25a: 68fb ldr r3, [r7, #12] + 802b25c: 681b ldr r3, [r3, #0] + 802b25e: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b262: 617b str r3, [r7, #20] - Set the PHY device address - Set the PHY register address - Set the write mode - Set the MII Busy bit */ MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21)); - 802b1e0: 697b ldr r3, [r7, #20] - 802b1e2: f023 7278 bic.w r2, r3, #65011712 ; 0x3e00000 - 802b1e6: 68bb ldr r3, [r7, #8] - 802b1e8: 055b lsls r3, r3, #21 - 802b1ea: 4313 orrs r3, r2 - 802b1ec: 617b str r3, [r7, #20] + 802b264: 697b ldr r3, [r7, #20] + 802b266: f023 7278 bic.w r2, r3, #65011712 ; 0x3e00000 + 802b26a: 68bb ldr r3, [r7, #8] + 802b26c: 055b lsls r3, r3, #21 + 802b26e: 4313 orrs r3, r2 + 802b270: 617b str r3, [r7, #20] MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16)); - 802b1ee: 697b ldr r3, [r7, #20] - 802b1f0: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 - 802b1f4: 687b ldr r3, [r7, #4] - 802b1f6: 041b lsls r3, r3, #16 - 802b1f8: 4313 orrs r3, r2 - 802b1fa: 617b str r3, [r7, #20] + 802b272: 697b ldr r3, [r7, #20] + 802b274: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000 + 802b278: 687b ldr r3, [r7, #4] + 802b27a: 041b lsls r3, r3, #16 + 802b27c: 4313 orrs r3, r2 + 802b27e: 617b str r3, [r7, #20] MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_WR); - 802b1fc: 697b ldr r3, [r7, #20] - 802b1fe: f023 030c bic.w r3, r3, #12 - 802b202: f043 0304 orr.w r3, r3, #4 - 802b206: 617b str r3, [r7, #20] + 802b280: 697b ldr r3, [r7, #20] + 802b282: f023 030c bic.w r3, r3, #12 + 802b286: f043 0304 orr.w r3, r3, #4 + 802b28a: 617b str r3, [r7, #20] SET_BIT(tmpreg, ETH_MACMDIOAR_MB); - 802b208: 697b ldr r3, [r7, #20] - 802b20a: f043 0301 orr.w r3, r3, #1 - 802b20e: 617b str r3, [r7, #20] + 802b28c: 697b ldr r3, [r7, #20] + 802b28e: f043 0301 orr.w r3, r3, #1 + 802b292: 617b str r3, [r7, #20] /* Give the value to the MII data register */ WRITE_REG(ETH->MACMDIODR, (uint16_t)RegValue); - 802b210: 683b ldr r3, [r7, #0] - 802b212: b29a uxth r2, r3 - 802b214: 4b10 ldr r3, [pc, #64] ; (802b258 ) - 802b216: f8c3 2204 str.w r2, [r3, #516] ; 0x204 + 802b294: 683b ldr r3, [r7, #0] + 802b296: b29a uxth r2, r3 + 802b298: 4b10 ldr r3, [pc, #64] ; (802b2dc ) + 802b29a: f8c3 2204 str.w r2, [r3, #516] ; 0x204 /* Write the result value into the MII Address register */ WRITE_REG(ETH->MACMDIOAR, tmpreg); - 802b21a: 4a0f ldr r2, [pc, #60] ; (802b258 ) - 802b21c: 697b ldr r3, [r7, #20] - 802b21e: f8c2 3200 str.w r3, [r2, #512] ; 0x200 + 802b29e: 4a0f ldr r2, [pc, #60] ; (802b2dc ) + 802b2a0: 697b ldr r3, [r7, #20] + 802b2a2: f8c2 3200 str.w r3, [r2, #512] ; 0x200 tickstart = HAL_GetTick(); - 802b222: f7fa fecf bl 8025fc4 - 802b226: 6138 str r0, [r7, #16] + 802b2a6: f7fa fecf bl 8026048 + 802b2aa: 6138 str r0, [r7, #16] /* Wait for the Busy flag */ while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) - 802b228: e009 b.n 802b23e + 802b2ac: e009 b.n 802b2c2 { if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT)) - 802b22a: f7fa fecb bl 8025fc4 - 802b22e: 4602 mov r2, r0 - 802b230: 693b ldr r3, [r7, #16] - 802b232: 1ad3 subs r3, r2, r3 - 802b234: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 802b238: d901 bls.n 802b23e + 802b2ae: f7fa fecb bl 8026048 + 802b2b2: 4602 mov r2, r0 + 802b2b4: 693b ldr r3, [r7, #16] + 802b2b6: 1ad3 subs r3, r2, r3 + 802b2b8: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 802b2bc: d901 bls.n 802b2c2 { return HAL_ERROR; - 802b23a: 2301 movs r3, #1 - 802b23c: e008 b.n 802b250 + 802b2be: 2301 movs r3, #1 + 802b2c0: e008 b.n 802b2d4 while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U) - 802b23e: 68fb ldr r3, [r7, #12] - 802b240: 681b ldr r3, [r3, #0] - 802b242: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b246: f003 0301 and.w r3, r3, #1 - 802b24a: 2b00 cmp r3, #0 - 802b24c: d1ed bne.n 802b22a + 802b2c2: 68fb ldr r3, [r7, #12] + 802b2c4: 681b ldr r3, [r3, #0] + 802b2c6: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b2ca: f003 0301 and.w r3, r3, #1 + 802b2ce: 2b00 cmp r3, #0 + 802b2d0: d1ed bne.n 802b2ae } } return HAL_OK; - 802b24e: 2300 movs r3, #0 + 802b2d2: 2300 movs r3, #0 } - 802b250: 4618 mov r0, r3 - 802b252: 3718 adds r7, #24 - 802b254: 46bd mov sp, r7 - 802b256: bd80 pop {r7, pc} - 802b258: 40028000 .word 0x40028000 + 802b2d4: 4618 mov r0, r3 + 802b2d6: 3718 adds r7, #24 + 802b2d8: 46bd mov sp, r7 + 802b2da: bd80 pop {r7, pc} + 802b2dc: 40028000 .word 0x40028000 -0802b25c : +0802b2e0 : * @param macconf: pointer to a ETH_MACConfigTypeDef structure that will hold * the configuration of the MAC. * @retval HAL Status */ HAL_StatusTypeDef HAL_ETH_GetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) { - 802b25c: b480 push {r7} - 802b25e: b083 sub sp, #12 - 802b260: af00 add r7, sp, #0 - 802b262: 6078 str r0, [r7, #4] - 802b264: 6039 str r1, [r7, #0] + 802b2e0: b480 push {r7} + 802b2e2: b083 sub sp, #12 + 802b2e4: af00 add r7, sp, #0 + 802b2e6: 6078 str r0, [r7, #4] + 802b2e8: 6039 str r1, [r7, #0] if (macconf == NULL) - 802b266: 683b ldr r3, [r7, #0] - 802b268: 2b00 cmp r3, #0 - 802b26a: d101 bne.n 802b270 + 802b2ea: 683b ldr r3, [r7, #0] + 802b2ec: 2b00 cmp r3, #0 + 802b2ee: d101 bne.n 802b2f4 { return HAL_ERROR; - 802b26c: 2301 movs r3, #1 - 802b26e: e1c3 b.n 802b5f8 + 802b2f0: 2301 movs r3, #1 + 802b2f2: e1c3 b.n 802b67c } /* Get MAC parameters */ macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN); - 802b270: 687b ldr r3, [r7, #4] - 802b272: 681b ldr r3, [r3, #0] - 802b274: 681b ldr r3, [r3, #0] - 802b276: f003 020c and.w r2, r3, #12 - 802b27a: 683b ldr r3, [r7, #0] - 802b27c: 62da str r2, [r3, #44] ; 0x2c + 802b2f4: 687b ldr r3, [r7, #4] + 802b2f6: 681b ldr r3, [r3, #0] + 802b2f8: 681b ldr r3, [r3, #0] + 802b2fa: f003 020c and.w r2, r3, #12 + 802b2fe: 683b ldr r3, [r7, #0] + 802b300: 62da str r2, [r3, #44] ; 0x2c macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DISABLE; - 802b27e: 687b ldr r3, [r7, #4] - 802b280: 681b ldr r3, [r3, #0] - 802b282: 681b ldr r3, [r3, #0] - 802b284: f003 0310 and.w r3, r3, #16 - 802b288: 2b00 cmp r3, #0 - 802b28a: bf14 ite ne - 802b28c: 2301 movne r3, #1 - 802b28e: 2300 moveq r3, #0 - 802b290: b2db uxtb r3, r3 - 802b292: 461a mov r2, r3 - 802b294: 683b ldr r3, [r7, #0] - 802b296: f883 2028 strb.w r2, [r3, #40] ; 0x28 + 802b302: 687b ldr r3, [r7, #4] + 802b304: 681b ldr r3, [r3, #0] + 802b306: 681b ldr r3, [r3, #0] + 802b308: f003 0310 and.w r3, r3, #16 + 802b30c: 2b00 cmp r3, #0 + 802b30e: bf14 ite ne + 802b310: 2301 movne r3, #1 + 802b312: 2300 moveq r3, #0 + 802b314: b2db uxtb r3, r3 + 802b316: 461a mov r2, r3 + 802b318: 683b ldr r3, [r7, #0] + 802b31a: f883 2028 strb.w r2, [r3, #40] ; 0x28 macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL); - 802b29a: 687b ldr r3, [r7, #4] - 802b29c: 681b ldr r3, [r3, #0] - 802b29e: 681b ldr r3, [r3, #0] - 802b2a0: f003 0260 and.w r2, r3, #96 ; 0x60 - 802b2a4: 683b ldr r3, [r7, #0] - 802b2a6: 625a str r2, [r3, #36] ; 0x24 - macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE; - 802b2a8: 687b ldr r3, [r7, #4] - 802b2aa: 681b ldr r3, [r3, #0] - 802b2ac: 681b ldr r3, [r3, #0] - 802b2ae: f403 7380 and.w r3, r3, #256 ; 0x100 - 802b2b2: 2b00 cmp r3, #0 - 802b2b4: bf0c ite eq - 802b2b6: 2301 moveq r3, #1 - 802b2b8: 2300 movne r3, #0 - 802b2ba: b2db uxtb r3, r3 - 802b2bc: 461a mov r2, r3 - 802b2be: 683b ldr r3, [r7, #0] - 802b2c0: f883 2020 strb.w r2, [r3, #32] - macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U) - 802b2c4: 687b ldr r3, [r7, #4] - 802b2c6: 681b ldr r3, [r3, #0] - 802b2c8: 681b ldr r3, [r3, #0] - 802b2ca: f403 7300 and.w r3, r3, #512 ; 0x200 - ? ENABLE : DISABLE; - 802b2ce: 2b00 cmp r3, #0 - 802b2d0: bf14 ite ne - 802b2d2: 2301 movne r3, #1 - 802b2d4: 2300 moveq r3, #0 - 802b2d6: b2db uxtb r3, r3 - 802b2d8: 461a mov r2, r3 - macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U) - 802b2da: 683b ldr r3, [r7, #0] - 802b2dc: 77da strb r2, [r3, #31] - macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE; - 802b2de: 687b ldr r3, [r7, #4] - 802b2e0: 681b ldr r3, [r3, #0] - 802b2e2: 681b ldr r3, [r3, #0] - 802b2e4: f403 6380 and.w r3, r3, #1024 ; 0x400 - 802b2e8: 2b00 cmp r3, #0 - 802b2ea: bf0c ite eq - 802b2ec: 2301 moveq r3, #1 - 802b2ee: 2300 movne r3, #0 - 802b2f0: b2db uxtb r3, r3 - 802b2f2: 461a mov r2, r3 - 802b2f4: 683b ldr r3, [r7, #0] - 802b2f6: 779a strb r2, [r3, #30] - macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR, - 802b2f8: 687b ldr r3, [r7, #4] - 802b2fa: 681b ldr r3, [r3, #0] - 802b2fc: 681b ldr r3, [r3, #0] - ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE; - 802b2fe: f403 6300 and.w r3, r3, #2048 ; 0x800 - 802b302: 2b00 cmp r3, #0 - 802b304: bf14 ite ne - 802b306: 2301 movne r3, #1 - 802b308: 2300 moveq r3, #0 - 802b30a: b2db uxtb r3, r3 - 802b30c: 461a mov r2, r3 - macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR, - 802b30e: 683b ldr r3, [r7, #0] - 802b310: 775a strb r2, [r3, #29] - macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE; - 802b312: 687b ldr r3, [r7, #4] - 802b314: 681b ldr r3, [r3, #0] - 802b316: 681b ldr r3, [r3, #0] - 802b318: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 802b31c: 2b00 cmp r3, #0 - 802b31e: bf14 ite ne - 802b320: 2301 movne r3, #1 - 802b322: 2300 moveq r3, #0 - 802b324: b2db uxtb r3, r3 - 802b326: 461a mov r2, r3 + 802b31e: 687b ldr r3, [r7, #4] + 802b320: 681b ldr r3, [r3, #0] + 802b322: 681b ldr r3, [r3, #0] + 802b324: f003 0260 and.w r2, r3, #96 ; 0x60 802b328: 683b ldr r3, [r7, #0] - 802b32a: 771a strb r2, [r3, #28] - macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM); + 802b32a: 625a str r2, [r3, #36] ; 0x24 + macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE; 802b32c: 687b ldr r3, [r7, #4] 802b32e: 681b ldr r3, [r3, #0] 802b330: 681b ldr r3, [r3, #0] - 802b332: f403 5200 and.w r2, r3, #8192 ; 0x2000 - 802b336: 683b ldr r3, [r7, #0] - 802b338: 619a str r2, [r3, #24] - macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES); - 802b33a: 687b ldr r3, [r7, #4] - 802b33c: 681b ldr r3, [r3, #0] - 802b33e: 681b ldr r3, [r3, #0] - 802b340: f403 4280 and.w r2, r3, #16384 ; 0x4000 - 802b344: 683b ldr r3, [r7, #0] - 802b346: 615a str r2, [r3, #20] - macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE; + 802b332: f403 7380 and.w r3, r3, #256 ; 0x100 + 802b336: 2b00 cmp r3, #0 + 802b338: bf0c ite eq + 802b33a: 2301 moveq r3, #1 + 802b33c: 2300 movne r3, #0 + 802b33e: b2db uxtb r3, r3 + 802b340: 461a mov r2, r3 + 802b342: 683b ldr r3, [r7, #0] + 802b344: f883 2020 strb.w r2, [r3, #32] + macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U) 802b348: 687b ldr r3, [r7, #4] 802b34a: 681b ldr r3, [r3, #0] 802b34c: 681b ldr r3, [r3, #0] - 802b34e: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 802b34e: f403 7300 and.w r3, r3, #512 ; 0x200 + ? ENABLE : DISABLE; 802b352: 2b00 cmp r3, #0 802b354: bf14 ite ne 802b356: 2301 movne r3, #1 802b358: 2300 moveq r3, #0 802b35a: b2db uxtb r3, r3 802b35c: 461a mov r2, r3 + macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U) 802b35e: 683b ldr r3, [r7, #0] - 802b360: 749a strb r2, [r3, #18] - macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE; + 802b360: 77da strb r2, [r3, #31] + macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE; 802b362: 687b ldr r3, [r7, #4] 802b364: 681b ldr r3, [r3, #0] 802b366: 681b ldr r3, [r3, #0] - 802b368: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802b368: f403 6380 and.w r3, r3, #1024 ; 0x400 802b36c: 2b00 cmp r3, #0 802b36e: bf0c ite eq 802b370: 2301 moveq r3, #1 @@ -27991,25 +28031,27 @@ HAL_StatusTypeDef HAL_ETH_GetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTyp 802b374: b2db uxtb r3, r3 802b376: 461a mov r2, r3 802b378: 683b ldr r3, [r7, #0] - 802b37a: 745a strb r2, [r3, #17] - macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISABLE; + 802b37a: 779a strb r2, [r3, #30] + macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR, 802b37c: 687b ldr r3, [r7, #4] 802b37e: 681b ldr r3, [r3, #0] 802b380: 681b ldr r3, [r3, #0] - 802b382: f403 2300 and.w r3, r3, #524288 ; 0x80000 + ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE; + 802b382: f403 6300 and.w r3, r3, #2048 ; 0x800 802b386: 2b00 cmp r3, #0 - 802b388: bf0c ite eq - 802b38a: 2301 moveq r3, #1 - 802b38c: 2300 movne r3, #0 + 802b388: bf14 ite ne + 802b38a: 2301 movne r3, #1 + 802b38c: 2300 moveq r3, #0 802b38e: b2db uxtb r3, r3 802b390: 461a mov r2, r3 + macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR, 802b392: 683b ldr r3, [r7, #0] - 802b394: 741a strb r2, [r3, #16] - macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE; + 802b394: 775a strb r2, [r3, #29] + macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE; 802b396: 687b ldr r3, [r7, #4] 802b398: 681b ldr r3, [r3, #0] 802b39a: 681b ldr r3, [r3, #0] - 802b39c: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 802b39c: f403 5380 and.w r3, r3, #4096 ; 0x1000 802b3a0: 2b00 cmp r3, #0 802b3a2: bf14 ite ne 802b3a4: 2301 movne r3, #1 @@ -28017,59048 +28059,59112 @@ HAL_StatusTypeDef HAL_ETH_GetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTyp 802b3a8: b2db uxtb r3, r3 802b3aa: 461a mov r2, r3 802b3ac: 683b ldr r3, [r7, #0] - 802b3ae: 73da strb r2, [r3, #15] - macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENABLE : DISABLE; + 802b3ae: 771a strb r2, [r3, #28] + macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM); 802b3b0: 687b ldr r3, [r7, #4] 802b3b2: 681b ldr r3, [r3, #0] 802b3b4: 681b ldr r3, [r3, #0] - 802b3b6: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 802b3ba: 2b00 cmp r3, #0 - 802b3bc: bf14 ite ne - 802b3be: 2301 movne r3, #1 - 802b3c0: 2300 moveq r3, #0 - 802b3c2: b2db uxtb r3, r3 - 802b3c4: 461a mov r2, r3 - 802b3c6: 683b ldr r3, [r7, #0] - 802b3c8: 739a strb r2, [r3, #14] - macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE : DISABLE; - 802b3ca: 687b ldr r3, [r7, #4] - 802b3cc: 681b ldr r3, [r3, #0] + 802b3b6: f403 5200 and.w r2, r3, #8192 ; 0x2000 + 802b3ba: 683b ldr r3, [r7, #0] + 802b3bc: 619a str r2, [r3, #24] + macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES); + 802b3be: 687b ldr r3, [r7, #4] + 802b3c0: 681b ldr r3, [r3, #0] + 802b3c2: 681b ldr r3, [r3, #0] + 802b3c4: f403 4280 and.w r2, r3, #16384 ; 0x4000 + 802b3c8: 683b ldr r3, [r7, #0] + 802b3ca: 615a str r2, [r3, #20] + macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE; + 802b3cc: 687b ldr r3, [r7, #4] 802b3ce: 681b ldr r3, [r3, #0] - 802b3d0: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 802b3d4: 2b00 cmp r3, #0 - 802b3d6: bf14 ite ne - 802b3d8: 2301 movne r3, #1 - 802b3da: 2300 moveq r3, #0 - 802b3dc: b2db uxtb r3, r3 - 802b3de: 461a mov r2, r3 - 802b3e0: 683b ldr r3, [r7, #0] - 802b3e2: 735a strb r2, [r3, #13] - macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR, - 802b3e4: 687b ldr r3, [r7, #4] - 802b3e6: 681b ldr r3, [r3, #0] + 802b3d0: 681b ldr r3, [r3, #0] + 802b3d2: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 802b3d6: 2b00 cmp r3, #0 + 802b3d8: bf14 ite ne + 802b3da: 2301 movne r3, #1 + 802b3dc: 2300 moveq r3, #0 + 802b3de: b2db uxtb r3, r3 + 802b3e0: 461a mov r2, r3 + 802b3e2: 683b ldr r3, [r7, #0] + 802b3e4: 749a strb r2, [r3, #18] + macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE; + 802b3e6: 687b ldr r3, [r7, #4] 802b3e8: 681b ldr r3, [r3, #0] + 802b3ea: 681b ldr r3, [r3, #0] + 802b3ec: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802b3f0: 2b00 cmp r3, #0 + 802b3f2: bf0c ite eq + 802b3f4: 2301 moveq r3, #1 + 802b3f6: 2300 movne r3, #0 + 802b3f8: b2db uxtb r3, r3 + 802b3fa: 461a mov r2, r3 + 802b3fc: 683b ldr r3, [r7, #0] + 802b3fe: 745a strb r2, [r3, #17] + macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISABLE; + 802b400: 687b ldr r3, [r7, #4] + 802b402: 681b ldr r3, [r3, #0] + 802b404: 681b ldr r3, [r3, #0] + 802b406: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 802b40a: 2b00 cmp r3, #0 + 802b40c: bf0c ite eq + 802b40e: 2301 moveq r3, #1 + 802b410: 2300 movne r3, #0 + 802b412: b2db uxtb r3, r3 + 802b414: 461a mov r2, r3 + 802b416: 683b ldr r3, [r7, #0] + 802b418: 741a strb r2, [r3, #16] + macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE; + 802b41a: 687b ldr r3, [r7, #4] + 802b41c: 681b ldr r3, [r3, #0] + 802b41e: 681b ldr r3, [r3, #0] + 802b420: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 802b424: 2b00 cmp r3, #0 + 802b426: bf14 ite ne + 802b428: 2301 movne r3, #1 + 802b42a: 2300 moveq r3, #0 + 802b42c: b2db uxtb r3, r3 + 802b42e: 461a mov r2, r3 + 802b430: 683b ldr r3, [r7, #0] + 802b432: 73da strb r2, [r3, #15] + macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENABLE : DISABLE; + 802b434: 687b ldr r3, [r7, #4] + 802b436: 681b ldr r3, [r3, #0] + 802b438: 681b ldr r3, [r3, #0] + 802b43a: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 802b43e: 2b00 cmp r3, #0 + 802b440: bf14 ite ne + 802b442: 2301 movne r3, #1 + 802b444: 2300 moveq r3, #0 + 802b446: b2db uxtb r3, r3 + 802b448: 461a mov r2, r3 + 802b44a: 683b ldr r3, [r7, #0] + 802b44c: 739a strb r2, [r3, #14] + macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE : DISABLE; + 802b44e: 687b ldr r3, [r7, #4] + 802b450: 681b ldr r3, [r3, #0] + 802b452: 681b ldr r3, [r3, #0] + 802b454: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 802b458: 2b00 cmp r3, #0 + 802b45a: bf14 ite ne + 802b45c: 2301 movne r3, #1 + 802b45e: 2300 moveq r3, #0 + 802b460: b2db uxtb r3, r3 + 802b462: 461a mov r2, r3 + 802b464: 683b ldr r3, [r7, #0] + 802b466: 735a strb r2, [r3, #13] + macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR, + 802b468: 687b ldr r3, [r7, #4] + 802b46a: 681b ldr r3, [r3, #0] + 802b46c: 681b ldr r3, [r3, #0] ETH_MACCR_GPSLCE) >> 23) > 0U) ? ENABLE : DISABLE; - 802b3ea: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 802b3ee: 2b00 cmp r3, #0 - 802b3f0: bf14 ite ne - 802b3f2: 2301 movne r3, #1 - 802b3f4: 2300 moveq r3, #0 - 802b3f6: b2db uxtb r3, r3 - 802b3f8: 461a mov r2, r3 + 802b46e: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 802b472: 2b00 cmp r3, #0 + 802b474: bf14 ite ne + 802b476: 2301 movne r3, #1 + 802b478: 2300 moveq r3, #0 + 802b47a: b2db uxtb r3, r3 + 802b47c: 461a mov r2, r3 macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR, - 802b3fa: 683b ldr r3, [r7, #0] - 802b3fc: 731a strb r2, [r3, #12] + 802b47e: 683b ldr r3, [r7, #0] + 802b480: 731a strb r2, [r3, #12] macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG); - 802b3fe: 687b ldr r3, [r7, #4] - 802b400: 681b ldr r3, [r3, #0] - 802b402: 681b ldr r3, [r3, #0] - 802b404: f003 62e0 and.w r2, r3, #117440512 ; 0x7000000 - 802b408: 683b ldr r3, [r7, #0] - 802b40a: 609a str r2, [r3, #8] + 802b482: 687b ldr r3, [r7, #4] + 802b484: 681b ldr r3, [r3, #0] + 802b486: 681b ldr r3, [r3, #0] + 802b488: f003 62e0 and.w r2, r3, #117440512 ; 0x7000000 + 802b48c: 683b ldr r3, [r7, #0] + 802b48e: 609a str r2, [r3, #8] macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE : DISABLE; - 802b40c: 687b ldr r3, [r7, #4] - 802b40e: 681b ldr r3, [r3, #0] - 802b410: 681b ldr r3, [r3, #0] - 802b412: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 802b416: 2b00 cmp r3, #0 - 802b418: bf14 ite ne - 802b41a: 2301 movne r3, #1 - 802b41c: 2300 moveq r3, #0 - 802b41e: b2db uxtb r3, r3 - 802b420: 461a mov r2, r3 - 802b422: 683b ldr r3, [r7, #0] - 802b424: 711a strb r2, [r3, #4] + 802b490: 687b ldr r3, [r7, #4] + 802b492: 681b ldr r3, [r3, #0] + 802b494: 681b ldr r3, [r3, #0] + 802b496: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 802b49a: 2b00 cmp r3, #0 + 802b49c: bf14 ite ne + 802b49e: 2301 movne r3, #1 + 802b4a0: 2300 moveq r3, #0 + 802b4a2: b2db uxtb r3, r3 + 802b4a4: 461a mov r2, r3 + 802b4a6: 683b ldr r3, [r7, #0] + 802b4a8: 711a strb r2, [r3, #4] macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC); - 802b426: 687b ldr r3, [r7, #4] - 802b428: 681b ldr r3, [r3, #0] - 802b42a: 681b ldr r3, [r3, #0] - 802b42c: f003 42e0 and.w r2, r3, #1879048192 ; 0x70000000 - 802b430: 683b ldr r3, [r7, #0] - 802b432: 601a str r2, [r3, #0] + 802b4aa: 687b ldr r3, [r7, #4] + 802b4ac: 681b ldr r3, [r3, #0] + 802b4ae: 681b ldr r3, [r3, #0] + 802b4b0: f003 42e0 and.w r2, r3, #1879048192 ; 0x70000000 + 802b4b4: 683b ldr r3, [r7, #0] + 802b4b6: 601a str r2, [r3, #0] macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL); - 802b434: 687b ldr r3, [r7, #4] - 802b436: 681b ldr r3, [r3, #0] - 802b438: 685b ldr r3, [r3, #4] - 802b43a: f3c3 020d ubfx r2, r3, #0, #14 - 802b43e: 683b ldr r3, [r7, #0] - 802b440: 635a str r2, [r3, #52] ; 0x34 + 802b4b8: 687b ldr r3, [r7, #4] + 802b4ba: 681b ldr r3, [r3, #0] + 802b4bc: 685b ldr r3, [r3, #4] + 802b4be: f3c3 020d ubfx r2, r3, #0, #14 + 802b4c2: 683b ldr r3, [r7, #0] + 802b4c4: 635a str r2, [r3, #52] ; 0x34 macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_DCRCC) >> 16) == 0U) ? ENABLE : DISABLE; - 802b442: 687b ldr r3, [r7, #4] - 802b444: 681b ldr r3, [r3, #0] - 802b446: 685b ldr r3, [r3, #4] - 802b448: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 802b44c: 2b00 cmp r3, #0 - 802b44e: bf0c ite eq - 802b450: 2301 moveq r3, #1 - 802b452: 2300 movne r3, #0 - 802b454: b2db uxtb r3, r3 - 802b456: 461a mov r2, r3 - 802b458: 683b ldr r3, [r7, #0] - 802b45a: f883 2032 strb.w r2, [r3, #50] ; 0x32 + 802b4c6: 687b ldr r3, [r7, #4] + 802b4c8: 681b ldr r3, [r3, #0] + 802b4ca: 685b ldr r3, [r3, #4] + 802b4cc: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 802b4d0: 2b00 cmp r3, #0 + 802b4d2: bf0c ite eq + 802b4d4: 2301 moveq r3, #1 + 802b4d6: 2300 movne r3, #0 + 802b4d8: b2db uxtb r3, r3 + 802b4da: 461a mov r2, r3 + 802b4dc: 683b ldr r3, [r7, #0] + 802b4de: f883 2032 strb.w r2, [r3, #50] ; 0x32 macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? ENABLE : DISABLE; - 802b45e: 687b ldr r3, [r7, #4] - 802b460: 681b ldr r3, [r3, #0] - 802b462: 685b ldr r3, [r3, #4] - 802b464: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802b468: 2b00 cmp r3, #0 - 802b46a: bf14 ite ne - 802b46c: 2301 movne r3, #1 - 802b46e: 2300 moveq r3, #0 - 802b470: b2db uxtb r3, r3 - 802b472: 461a mov r2, r3 - 802b474: 683b ldr r3, [r7, #0] - 802b476: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 802b4e2: 687b ldr r3, [r7, #4] + 802b4e4: 681b ldr r3, [r3, #0] + 802b4e6: 685b ldr r3, [r3, #4] + 802b4e8: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802b4ec: 2b00 cmp r3, #0 + 802b4ee: bf14 ite ne + 802b4f0: 2301 movne r3, #1 + 802b4f2: 2300 moveq r3, #0 + 802b4f4: b2db uxtb r3, r3 + 802b4f6: 461a mov r2, r3 + 802b4f8: 683b ldr r3, [r7, #0] + 802b4fa: f883 2031 strb.w r2, [r3, #49] ; 0x31 macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR, - 802b47a: 687b ldr r3, [r7, #4] - 802b47c: 681b ldr r3, [r3, #0] - 802b47e: 685b ldr r3, [r3, #4] + 802b4fe: 687b ldr r3, [r7, #4] + 802b500: 681b ldr r3, [r3, #0] + 802b502: 685b ldr r3, [r3, #4] ETH_MACECR_USP) >> 18) > 0U) ? ENABLE : DISABLE; - 802b480: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 802b484: 2b00 cmp r3, #0 - 802b486: bf14 ite ne - 802b488: 2301 movne r3, #1 - 802b48a: 2300 moveq r3, #0 - 802b48c: b2db uxtb r3, r3 - 802b48e: 461a mov r2, r3 + 802b504: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 802b508: 2b00 cmp r3, #0 + 802b50a: bf14 ite ne + 802b50c: 2301 movne r3, #1 + 802b50e: 2300 moveq r3, #0 + 802b510: b2db uxtb r3, r3 + 802b512: 461a mov r2, r3 macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR, - 802b490: 683b ldr r3, [r7, #0] - 802b492: f883 2030 strb.w r2, [r3, #48] ; 0x30 + 802b514: 683b ldr r3, [r7, #0] + 802b516: f883 2030 strb.w r2, [r3, #48] ; 0x30 macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U) - 802b496: 687b ldr r3, [r7, #4] - 802b498: 681b ldr r3, [r3, #0] - 802b49a: 685b ldr r3, [r3, #4] - 802b49c: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 802b51a: 687b ldr r3, [r7, #4] + 802b51c: 681b ldr r3, [r3, #0] + 802b51e: 685b ldr r3, [r3, #4] + 802b520: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 ? ENABLE : DISABLE; - 802b4a0: 2b00 cmp r3, #0 - 802b4a2: bf14 ite ne - 802b4a4: 2301 movne r3, #1 - 802b4a6: 2300 moveq r3, #0 - 802b4a8: b2db uxtb r3, r3 - 802b4aa: 461a mov r2, r3 + 802b524: 2b00 cmp r3, #0 + 802b526: bf14 ite ne + 802b528: 2301 movne r3, #1 + 802b52a: 2300 moveq r3, #0 + 802b52c: b2db uxtb r3, r3 + 802b52e: 461a mov r2, r3 macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U) - 802b4ac: 683b ldr r3, [r7, #0] - 802b4ae: f883 2038 strb.w r2, [r3, #56] ; 0x38 + 802b530: 683b ldr r3, [r7, #0] + 802b532: f883 2038 strb.w r2, [r3, #56] ; 0x38 macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25; - 802b4b2: 687b ldr r3, [r7, #4] - 802b4b4: 681b ldr r3, [r3, #0] - 802b4b6: 685b ldr r3, [r3, #4] - 802b4b8: 0e5b lsrs r3, r3, #25 - 802b4ba: f003 021f and.w r2, r3, #31 - 802b4be: 683b ldr r3, [r7, #0] - 802b4c0: 63da str r2, [r3, #60] ; 0x3c + 802b536: 687b ldr r3, [r7, #4] + 802b538: 681b ldr r3, [r3, #0] + 802b53a: 685b ldr r3, [r3, #4] + 802b53c: 0e5b lsrs r3, r3, #25 + 802b53e: f003 021f and.w r2, r3, #31 + 802b542: 683b ldr r3, [r7, #0] + 802b544: 63da str r2, [r3, #60] ; 0x3c macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? ENABLE : DISABLE; - 802b4c2: 687b ldr r3, [r7, #4] - 802b4c4: 681b ldr r3, [r3, #0] - 802b4c6: 68db ldr r3, [r3, #12] - 802b4c8: f403 7380 and.w r3, r3, #256 ; 0x100 - 802b4cc: 2b00 cmp r3, #0 - 802b4ce: bf14 ite ne - 802b4d0: 2301 movne r3, #1 - 802b4d2: 2300 moveq r3, #0 - 802b4d4: b2db uxtb r3, r3 - 802b4d6: 461a mov r2, r3 - 802b4d8: 683b ldr r3, [r7, #0] - 802b4da: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802b546: 687b ldr r3, [r7, #4] + 802b548: 681b ldr r3, [r3, #0] + 802b54a: 68db ldr r3, [r3, #12] + 802b54c: f403 7380 and.w r3, r3, #256 ; 0x100 + 802b550: 2b00 cmp r3, #0 + 802b552: bf14 ite ne + 802b554: 2301 movne r3, #1 + 802b556: 2300 moveq r3, #0 + 802b558: b2db uxtb r3, r3 + 802b55a: 461a mov r2, r3 + 802b55c: 683b ldr r3, [r7, #0] + 802b55e: f883 2040 strb.w r2, [r3, #64] ; 0x40 macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO); - 802b4de: 687b ldr r3, [r7, #4] - 802b4e0: 681b ldr r3, [r3, #0] - 802b4e2: 68db ldr r3, [r3, #12] - 802b4e4: f003 020f and.w r2, r3, #15 - 802b4e8: 683b ldr r3, [r7, #0] - 802b4ea: 645a str r2, [r3, #68] ; 0x44 + 802b562: 687b ldr r3, [r7, #4] + 802b564: 681b ldr r3, [r3, #0] + 802b566: 68db ldr r3, [r3, #12] + 802b568: f003 020f and.w r2, r3, #15 + 802b56c: 683b ldr r3, [r7, #0] + 802b56e: 645a str r2, [r3, #68] ; 0x44 macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_TFE) >> 1) > 0U) ? ENABLE : DISABLE; - 802b4ec: 687b ldr r3, [r7, #4] - 802b4ee: 681b ldr r3, [r3, #0] - 802b4f0: 6f1b ldr r3, [r3, #112] ; 0x70 - 802b4f2: f003 0302 and.w r3, r3, #2 - 802b4f6: 2b00 cmp r3, #0 - 802b4f8: bf14 ite ne - 802b4fa: 2301 movne r3, #1 - 802b4fc: 2300 moveq r3, #0 - 802b4fe: b2db uxtb r3, r3 - 802b500: 461a mov r2, r3 - 802b502: 683b ldr r3, [r7, #0] - 802b504: f883 2054 strb.w r2, [r3, #84] ; 0x54 + 802b570: 687b ldr r3, [r7, #4] + 802b572: 681b ldr r3, [r3, #0] + 802b574: 6f1b ldr r3, [r3, #112] ; 0x70 + 802b576: f003 0302 and.w r3, r3, #2 + 802b57a: 2b00 cmp r3, #0 + 802b57c: bf14 ite ne + 802b57e: 2301 movne r3, #1 + 802b580: 2300 moveq r3, #0 + 802b582: b2db uxtb r3, r3 + 802b584: 461a mov r2, r3 + 802b586: 683b ldr r3, [r7, #0] + 802b588: f883 2054 strb.w r2, [r3, #84] ; 0x54 macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_DZPQ) >> 7) == 0U) ? ENABLE : DISABLE; - 802b508: 687b ldr r3, [r7, #4] - 802b50a: 681b ldr r3, [r3, #0] - 802b50c: 6f1b ldr r3, [r3, #112] ; 0x70 - 802b50e: f003 0380 and.w r3, r3, #128 ; 0x80 - 802b512: 2b00 cmp r3, #0 - 802b514: bf0c ite eq - 802b516: 2301 moveq r3, #1 - 802b518: 2300 movne r3, #0 - 802b51a: b2db uxtb r3, r3 - 802b51c: 461a mov r2, r3 - 802b51e: 683b ldr r3, [r7, #0] - 802b520: f883 204c strb.w r2, [r3, #76] ; 0x4c + 802b58c: 687b ldr r3, [r7, #4] + 802b58e: 681b ldr r3, [r3, #0] + 802b590: 6f1b ldr r3, [r3, #112] ; 0x70 + 802b592: f003 0380 and.w r3, r3, #128 ; 0x80 + 802b596: 2b00 cmp r3, #0 + 802b598: bf0c ite eq + 802b59a: 2301 moveq r3, #1 + 802b59c: 2300 movne r3, #0 + 802b59e: b2db uxtb r3, r3 + 802b5a0: 461a mov r2, r3 + 802b5a2: 683b ldr r3, [r7, #0] + 802b5a4: f883 204c strb.w r2, [r3, #76] ; 0x4c macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PLT); - 802b524: 687b ldr r3, [r7, #4] - 802b526: 681b ldr r3, [r3, #0] - 802b528: 6f1b ldr r3, [r3, #112] ; 0x70 - 802b52a: f003 0270 and.w r2, r3, #112 ; 0x70 - 802b52e: 683b ldr r3, [r7, #0] - 802b530: 651a str r2, [r3, #80] ; 0x50 + 802b5a8: 687b ldr r3, [r7, #4] + 802b5aa: 681b ldr r3, [r3, #0] + 802b5ac: 6f1b ldr r3, [r3, #112] ; 0x70 + 802b5ae: f003 0270 and.w r2, r3, #112 ; 0x70 + 802b5b2: 683b ldr r3, [r7, #0] + 802b5b4: 651a str r2, [r3, #80] ; 0x50 macconf->PauseTime = (READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PT) >> 16); - 802b532: 687b ldr r3, [r7, #4] - 802b534: 681b ldr r3, [r3, #0] - 802b536: 6f1b ldr r3, [r3, #112] ; 0x70 - 802b538: 0c1b lsrs r3, r3, #16 - 802b53a: b29a uxth r2, r3 - 802b53c: 683b ldr r3, [r7, #0] - 802b53e: 649a str r2, [r3, #72] ; 0x48 + 802b5b6: 687b ldr r3, [r7, #4] + 802b5b8: 681b ldr r3, [r3, #0] + 802b5ba: 6f1b ldr r3, [r3, #112] ; 0x70 + 802b5bc: 0c1b lsrs r3, r3, #16 + 802b5be: b29a uxth r2, r3 + 802b5c0: 683b ldr r3, [r7, #0] + 802b5c2: 649a str r2, [r3, #72] ; 0x48 macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_RFE) > 0U) ? ENABLE : DISABLE; - 802b540: 687b ldr r3, [r7, #4] - 802b542: 681b ldr r3, [r3, #0] - 802b544: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802b548: f003 0301 and.w r3, r3, #1 - 802b54c: 2b00 cmp r3, #0 - 802b54e: bf14 ite ne - 802b550: 2301 movne r3, #1 - 802b552: 2300 moveq r3, #0 - 802b554: b2db uxtb r3, r3 - 802b556: 461a mov r2, r3 - 802b558: 683b ldr r3, [r7, #0] - 802b55a: f883 2056 strb.w r2, [r3, #86] ; 0x56 + 802b5c4: 687b ldr r3, [r7, #4] + 802b5c6: 681b ldr r3, [r3, #0] + 802b5c8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802b5cc: f003 0301 and.w r3, r3, #1 + 802b5d0: 2b00 cmp r3, #0 + 802b5d2: bf14 ite ne + 802b5d4: 2301 movne r3, #1 + 802b5d6: 2300 moveq r3, #0 + 802b5d8: b2db uxtb r3, r3 + 802b5da: 461a mov r2, r3 + 802b5dc: 683b ldr r3, [r7, #0] + 802b5de: f883 2056 strb.w r2, [r3, #86] ; 0x56 macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U) - 802b55e: 687b ldr r3, [r7, #4] - 802b560: 681b ldr r3, [r3, #0] - 802b562: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802b566: f003 0302 and.w r3, r3, #2 + 802b5e2: 687b ldr r3, [r7, #4] + 802b5e4: 681b ldr r3, [r3, #0] + 802b5e6: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802b5ea: f003 0302 and.w r3, r3, #2 ? ENABLE : DISABLE; - 802b56a: 2b00 cmp r3, #0 - 802b56c: bf14 ite ne - 802b56e: 2301 movne r3, #1 - 802b570: 2300 moveq r3, #0 - 802b572: b2db uxtb r3, r3 - 802b574: 461a mov r2, r3 + 802b5ee: 2b00 cmp r3, #0 + 802b5f0: bf14 ite ne + 802b5f2: 2301 movne r3, #1 + 802b5f4: 2300 moveq r3, #0 + 802b5f6: b2db uxtb r3, r3 + 802b5f8: 461a mov r2, r3 macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U) - 802b576: 683b ldr r3, [r7, #0] - 802b578: f883 2055 strb.w r2, [r3, #85] ; 0x55 + 802b5fa: 683b ldr r3, [r7, #0] + 802b5fc: f883 2055 strb.w r2, [r3, #85] ; 0x55 macconf->TransmitQueueMode = READ_BIT(heth->Instance->MTLTQOMR, (ETH_MTLTQOMR_TTC | ETH_MTLTQOMR_TSF)); - 802b57c: 687b ldr r3, [r7, #4] - 802b57e: 681b ldr r3, [r3, #0] - 802b580: f8d3 3d00 ldr.w r3, [r3, #3328] ; 0xd00 - 802b584: f003 0272 and.w r2, r3, #114 ; 0x72 - 802b588: 683b ldr r3, [r7, #0] - 802b58a: 659a str r2, [r3, #88] ; 0x58 + 802b600: 687b ldr r3, [r7, #4] + 802b602: 681b ldr r3, [r3, #0] + 802b604: f8d3 3d00 ldr.w r3, [r3, #3328] ; 0xd00 + 802b608: f003 0272 and.w r2, r3, #114 ; 0x72 + 802b60c: 683b ldr r3, [r7, #0] + 802b60e: 659a str r2, [r3, #88] ; 0x58 macconf->ReceiveQueueMode = READ_BIT(heth->Instance->MTLRQOMR, (ETH_MTLRQOMR_RTC | ETH_MTLRQOMR_RSF)); - 802b58c: 687b ldr r3, [r7, #4] - 802b58e: 681b ldr r3, [r3, #0] - 802b590: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 - 802b594: f003 0223 and.w r2, r3, #35 ; 0x23 - 802b598: 683b ldr r3, [r7, #0] - 802b59a: 65da str r2, [r3, #92] ; 0x5c + 802b610: 687b ldr r3, [r7, #4] + 802b612: 681b ldr r3, [r3, #0] + 802b614: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b618: f003 0223 and.w r2, r3, #35 ; 0x23 + 802b61c: 683b ldr r3, [r7, #0] + 802b61e: 65da str r2, [r3, #92] ; 0x5c macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR, - 802b59c: 687b ldr r3, [r7, #4] - 802b59e: 681b ldr r3, [r3, #0] - 802b5a0: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b620: 687b ldr r3, [r7, #4] + 802b622: 681b ldr r3, [r3, #0] + 802b624: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 ETH_MTLRQOMR_FUP) >> 3) > 0U) ? ENABLE : DISABLE; - 802b5a4: f003 0308 and.w r3, r3, #8 - 802b5a8: 2b00 cmp r3, #0 - 802b5aa: bf14 ite ne - 802b5ac: 2301 movne r3, #1 - 802b5ae: 2300 moveq r3, #0 - 802b5b0: b2db uxtb r3, r3 - 802b5b2: 461a mov r2, r3 + 802b628: f003 0308 and.w r3, r3, #8 + 802b62c: 2b00 cmp r3, #0 + 802b62e: bf14 ite ne + 802b630: 2301 movne r3, #1 + 802b632: 2300 moveq r3, #0 + 802b634: b2db uxtb r3, r3 + 802b636: 461a mov r2, r3 macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR, - 802b5b4: 683b ldr r3, [r7, #0] - 802b5b6: f883 2062 strb.w r2, [r3, #98] ; 0x62 + 802b638: 683b ldr r3, [r7, #0] + 802b63a: f883 2062 strb.w r2, [r3, #98] ; 0x62 macconf->ForwardRxErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_FEP) >> 4) > 0U) ? ENABLE : DISABLE; - 802b5ba: 687b ldr r3, [r7, #4] - 802b5bc: 681b ldr r3, [r3, #0] - 802b5be: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 - 802b5c2: f003 0310 and.w r3, r3, #16 - 802b5c6: 2b00 cmp r3, #0 - 802b5c8: bf14 ite ne - 802b5ca: 2301 movne r3, #1 - 802b5cc: 2300 moveq r3, #0 - 802b5ce: b2db uxtb r3, r3 - 802b5d0: 461a mov r2, r3 - 802b5d2: 683b ldr r3, [r7, #0] - 802b5d4: f883 2061 strb.w r2, [r3, #97] ; 0x61 + 802b63e: 687b ldr r3, [r7, #4] + 802b640: 681b ldr r3, [r3, #0] + 802b642: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b646: f003 0310 and.w r3, r3, #16 + 802b64a: 2b00 cmp r3, #0 + 802b64c: bf14 ite ne + 802b64e: 2301 movne r3, #1 + 802b650: 2300 moveq r3, #0 + 802b652: b2db uxtb r3, r3 + 802b654: 461a mov r2, r3 + 802b656: 683b ldr r3, [r7, #0] + 802b658: f883 2061 strb.w r2, [r3, #97] ; 0x61 macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, - 802b5d8: 687b ldr r3, [r7, #4] - 802b5da: 681b ldr r3, [r3, #0] - 802b5dc: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b65c: 687b ldr r3, [r7, #4] + 802b65e: 681b ldr r3, [r3, #0] + 802b660: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 ETH_MTLRQOMR_DISTCPEF) >> 6) == 0U) ? ENABLE : DISABLE; - 802b5e0: f003 0340 and.w r3, r3, #64 ; 0x40 - 802b5e4: 2b00 cmp r3, #0 - 802b5e6: bf0c ite eq - 802b5e8: 2301 moveq r3, #1 - 802b5ea: 2300 movne r3, #0 - 802b5ec: b2db uxtb r3, r3 - 802b5ee: 461a mov r2, r3 + 802b664: f003 0340 and.w r3, r3, #64 ; 0x40 + 802b668: 2b00 cmp r3, #0 + 802b66a: bf0c ite eq + 802b66c: 2301 moveq r3, #1 + 802b66e: 2300 movne r3, #0 + 802b670: b2db uxtb r3, r3 + 802b672: 461a mov r2, r3 macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, - 802b5f0: 683b ldr r3, [r7, #0] - 802b5f2: f883 2060 strb.w r2, [r3, #96] ; 0x60 + 802b674: 683b ldr r3, [r7, #0] + 802b676: f883 2060 strb.w r2, [r3, #96] ; 0x60 return HAL_OK; - 802b5f6: 2300 movs r3, #0 + 802b67a: 2300 movs r3, #0 } - 802b5f8: 4618 mov r0, r3 - 802b5fa: 370c adds r7, #12 - 802b5fc: 46bd mov sp, r7 - 802b5fe: f85d 7b04 ldr.w r7, [sp], #4 - 802b602: 4770 bx lr + 802b67c: 4618 mov r0, r3 + 802b67e: 370c adds r7, #12 + 802b680: 46bd mov sp, r7 + 802b682: f85d 7b04 ldr.w r7, [sp], #4 + 802b686: 4770 bx lr -0802b604 : +0802b688 : * @param macconf: pointer to a ETH_MACConfigTypeDef structure that contains * the configuration of the MAC. * @retval HAL status */ HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) { - 802b604: b580 push {r7, lr} - 802b606: b082 sub sp, #8 - 802b608: af00 add r7, sp, #0 - 802b60a: 6078 str r0, [r7, #4] - 802b60c: 6039 str r1, [r7, #0] + 802b688: b580 push {r7, lr} + 802b68a: b082 sub sp, #8 + 802b68c: af00 add r7, sp, #0 + 802b68e: 6078 str r0, [r7, #4] + 802b690: 6039 str r1, [r7, #0] if (macconf == NULL) - 802b60e: 683b ldr r3, [r7, #0] - 802b610: 2b00 cmp r3, #0 - 802b612: d101 bne.n 802b618 + 802b692: 683b ldr r3, [r7, #0] + 802b694: 2b00 cmp r3, #0 + 802b696: d101 bne.n 802b69c { return HAL_ERROR; - 802b614: 2301 movs r3, #1 - 802b616: e00b b.n 802b630 + 802b698: 2301 movs r3, #1 + 802b69a: e00b b.n 802b6b4 } if (heth->gState == HAL_ETH_STATE_READY) - 802b618: 687b ldr r3, [r7, #4] - 802b61a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802b61e: 2b10 cmp r3, #16 - 802b620: d105 bne.n 802b62e + 802b69c: 687b ldr r3, [r7, #4] + 802b69e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802b6a2: 2b10 cmp r3, #16 + 802b6a4: d105 bne.n 802b6b2 { ETH_SetMACConfig(heth, macconf); - 802b622: 6839 ldr r1, [r7, #0] - 802b624: 6878 ldr r0, [r7, #4] - 802b626: f000 f85f bl 802b6e8 + 802b6a6: 6839 ldr r1, [r7, #0] + 802b6a8: 6878 ldr r0, [r7, #4] + 802b6aa: f000 f85f bl 802b76c return HAL_OK; - 802b62a: 2300 movs r3, #0 - 802b62c: e000 b.n 802b630 + 802b6ae: 2300 movs r3, #0 + 802b6b0: e000 b.n 802b6b4 } else { return HAL_ERROR; - 802b62e: 2301 movs r3, #1 + 802b6b2: 2301 movs r3, #1 } } - 802b630: 4618 mov r0, r3 - 802b632: 3708 adds r7, #8 - 802b634: 46bd mov sp, r7 - 802b636: bd80 pop {r7, pc} + 802b6b4: 4618 mov r0, r3 + 802b6b6: 3708 adds r7, #8 + 802b6b8: 46bd mov sp, r7 + 802b6ba: bd80 pop {r7, pc} -0802b638 : +0802b6bc : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth) { - 802b638: b580 push {r7, lr} - 802b63a: b084 sub sp, #16 - 802b63c: af00 add r7, sp, #0 - 802b63e: 6078 str r0, [r7, #4] + 802b6bc: b580 push {r7, lr} + 802b6be: b084 sub sp, #16 + 802b6c0: af00 add r7, sp, #0 + 802b6c2: 6078 str r0, [r7, #4] uint32_t hclk; uint32_t tmpreg; /* Get the ETHERNET MACMDIOAR value */ tmpreg = (heth->Instance)->MACMDIOAR; - 802b640: 687b ldr r3, [r7, #4] - 802b642: 681b ldr r3, [r3, #0] - 802b644: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 - 802b648: 60fb str r3, [r7, #12] + 802b6c4: 687b ldr r3, [r7, #4] + 802b6c6: 681b ldr r3, [r3, #0] + 802b6c8: f8d3 3200 ldr.w r3, [r3, #512] ; 0x200 + 802b6cc: 60fb str r3, [r7, #12] /* Clear CSR Clock Range bits */ tmpreg &= ~ETH_MACMDIOAR_CR; - 802b64a: 68fb ldr r3, [r7, #12] - 802b64c: f423 6370 bic.w r3, r3, #3840 ; 0xf00 - 802b650: 60fb str r3, [r7, #12] + 802b6ce: 68fb ldr r3, [r7, #12] + 802b6d0: f423 6370 bic.w r3, r3, #3840 ; 0xf00 + 802b6d4: 60fb str r3, [r7, #12] /* Get hclk frequency value */ hclk = HAL_RCC_GetHCLKFreq(); - 802b652: f004 fb51 bl 802fcf8 - 802b656: 60b8 str r0, [r7, #8] + 802b6d6: f004 fb51 bl 802fd7c + 802b6da: 60b8 str r0, [r7, #8] /* Set CR bits depending on hclk value */ if ((hclk >= 20000000U) && (hclk < 35000000U)) - 802b658: 68bb ldr r3, [r7, #8] - 802b65a: 4a1e ldr r2, [pc, #120] ; (802b6d4 ) - 802b65c: 4293 cmp r3, r2 - 802b65e: d908 bls.n 802b672 - 802b660: 68bb ldr r3, [r7, #8] - 802b662: 4a1d ldr r2, [pc, #116] ; (802b6d8 ) - 802b664: 4293 cmp r3, r2 - 802b666: d804 bhi.n 802b672 + 802b6dc: 68bb ldr r3, [r7, #8] + 802b6de: 4a1e ldr r2, [pc, #120] ; (802b758 ) + 802b6e0: 4293 cmp r3, r2 + 802b6e2: d908 bls.n 802b6f6 + 802b6e4: 68bb ldr r3, [r7, #8] + 802b6e6: 4a1d ldr r2, [pc, #116] ; (802b75c ) + 802b6e8: 4293 cmp r3, r2 + 802b6ea: d804 bhi.n 802b6f6 { /* CSR Clock Range between 20-35 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV16; - 802b668: 68fb ldr r3, [r7, #12] - 802b66a: f443 7300 orr.w r3, r3, #512 ; 0x200 - 802b66e: 60fb str r3, [r7, #12] - 802b670: e027 b.n 802b6c2 + 802b6ec: 68fb ldr r3, [r7, #12] + 802b6ee: f443 7300 orr.w r3, r3, #512 ; 0x200 + 802b6f2: 60fb str r3, [r7, #12] + 802b6f4: e027 b.n 802b746 } else if ((hclk >= 35000000U) && (hclk < 60000000U)) - 802b672: 68bb ldr r3, [r7, #8] - 802b674: 4a18 ldr r2, [pc, #96] ; (802b6d8 ) - 802b676: 4293 cmp r3, r2 - 802b678: d908 bls.n 802b68c - 802b67a: 68bb ldr r3, [r7, #8] - 802b67c: 4a17 ldr r2, [pc, #92] ; (802b6dc ) - 802b67e: 4293 cmp r3, r2 - 802b680: d204 bcs.n 802b68c + 802b6f6: 68bb ldr r3, [r7, #8] + 802b6f8: 4a18 ldr r2, [pc, #96] ; (802b75c ) + 802b6fa: 4293 cmp r3, r2 + 802b6fc: d908 bls.n 802b710 + 802b6fe: 68bb ldr r3, [r7, #8] + 802b700: 4a17 ldr r2, [pc, #92] ; (802b760 ) + 802b702: 4293 cmp r3, r2 + 802b704: d204 bcs.n 802b710 { /* CSR Clock Range between 35-60 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV26; - 802b682: 68fb ldr r3, [r7, #12] - 802b684: f443 7340 orr.w r3, r3, #768 ; 0x300 - 802b688: 60fb str r3, [r7, #12] - 802b68a: e01a b.n 802b6c2 + 802b706: 68fb ldr r3, [r7, #12] + 802b708: f443 7340 orr.w r3, r3, #768 ; 0x300 + 802b70c: 60fb str r3, [r7, #12] + 802b70e: e01a b.n 802b746 } else if ((hclk >= 60000000U) && (hclk < 100000000U)) - 802b68c: 68bb ldr r3, [r7, #8] - 802b68e: 4a13 ldr r2, [pc, #76] ; (802b6dc ) - 802b690: 4293 cmp r3, r2 - 802b692: d303 bcc.n 802b69c - 802b694: 68bb ldr r3, [r7, #8] - 802b696: 4a12 ldr r2, [pc, #72] ; (802b6e0 ) - 802b698: 4293 cmp r3, r2 - 802b69a: d911 bls.n 802b6c0 + 802b710: 68bb ldr r3, [r7, #8] + 802b712: 4a13 ldr r2, [pc, #76] ; (802b760 ) + 802b714: 4293 cmp r3, r2 + 802b716: d303 bcc.n 802b720 + 802b718: 68bb ldr r3, [r7, #8] + 802b71a: 4a12 ldr r2, [pc, #72] ; (802b764 ) + 802b71c: 4293 cmp r3, r2 + 802b71e: d911 bls.n 802b744 { /* CSR Clock Range between 60-100 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42; } else if ((hclk >= 100000000U) && (hclk < 150000000U)) - 802b69c: 68bb ldr r3, [r7, #8] - 802b69e: 4a10 ldr r2, [pc, #64] ; (802b6e0 ) - 802b6a0: 4293 cmp r3, r2 - 802b6a2: d908 bls.n 802b6b6 - 802b6a4: 68bb ldr r3, [r7, #8] - 802b6a6: 4a0f ldr r2, [pc, #60] ; (802b6e4 ) - 802b6a8: 4293 cmp r3, r2 - 802b6aa: d804 bhi.n 802b6b6 + 802b720: 68bb ldr r3, [r7, #8] + 802b722: 4a10 ldr r2, [pc, #64] ; (802b764 ) + 802b724: 4293 cmp r3, r2 + 802b726: d908 bls.n 802b73a + 802b728: 68bb ldr r3, [r7, #8] + 802b72a: 4a0f ldr r2, [pc, #60] ; (802b768 ) + 802b72c: 4293 cmp r3, r2 + 802b72e: d804 bhi.n 802b73a { /* CSR Clock Range between 100-150 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV62; - 802b6ac: 68fb ldr r3, [r7, #12] - 802b6ae: f443 7380 orr.w r3, r3, #256 ; 0x100 - 802b6b2: 60fb str r3, [r7, #12] - 802b6b4: e005 b.n 802b6c2 + 802b730: 68fb ldr r3, [r7, #12] + 802b732: f443 7380 orr.w r3, r3, #256 ; 0x100 + 802b736: 60fb str r3, [r7, #12] + 802b738: e005 b.n 802b746 } else /* (hclk >= 150000000)&&(hclk <= 200000000) */ { /* CSR Clock Range between 150-200 MHz */ tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV102; - 802b6b6: 68fb ldr r3, [r7, #12] - 802b6b8: f443 6380 orr.w r3, r3, #1024 ; 0x400 - 802b6bc: 60fb str r3, [r7, #12] - 802b6be: e000 b.n 802b6c2 + 802b73a: 68fb ldr r3, [r7, #12] + 802b73c: f443 6380 orr.w r3, r3, #1024 ; 0x400 + 802b740: 60fb str r3, [r7, #12] + 802b742: e000 b.n 802b746 tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42; - 802b6c0: bf00 nop + 802b744: bf00 nop } /* Configure the CSR Clock Range */ (heth->Instance)->MACMDIOAR = (uint32_t)tmpreg; - 802b6c2: 687b ldr r3, [r7, #4] - 802b6c4: 681b ldr r3, [r3, #0] - 802b6c6: 68fa ldr r2, [r7, #12] - 802b6c8: f8c3 2200 str.w r2, [r3, #512] ; 0x200 -} - 802b6cc: bf00 nop - 802b6ce: 3710 adds r7, #16 - 802b6d0: 46bd mov sp, r7 - 802b6d2: bd80 pop {r7, pc} - 802b6d4: 01312cff .word 0x01312cff - 802b6d8: 02160ebf .word 0x02160ebf - 802b6dc: 03938700 .word 0x03938700 - 802b6e0: 05f5e0ff .word 0x05f5e0ff - 802b6e4: 08f0d17f .word 0x08f0d17f - -0802b6e8 : + 802b746: 687b ldr r3, [r7, #4] + 802b748: 681b ldr r3, [r3, #0] + 802b74a: 68fa ldr r2, [r7, #12] + 802b74c: f8c3 2200 str.w r2, [r3, #512] ; 0x200 +} + 802b750: bf00 nop + 802b752: 3710 adds r7, #16 + 802b754: 46bd mov sp, r7 + 802b756: bd80 pop {r7, pc} + 802b758: 01312cff .word 0x01312cff + 802b75c: 02160ebf .word 0x02160ebf + 802b760: 03938700 .word 0x03938700 + 802b764: 05f5e0ff .word 0x05f5e0ff + 802b768: 08f0d17f .word 0x08f0d17f + +0802b76c : * @{ */ static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf) { - 802b6e8: b480 push {r7} - 802b6ea: b085 sub sp, #20 - 802b6ec: af00 add r7, sp, #0 - 802b6ee: 6078 str r0, [r7, #4] - 802b6f0: 6039 str r1, [r7, #0] + 802b76c: b480 push {r7} + 802b76e: b085 sub sp, #20 + 802b770: af00 add r7, sp, #0 + 802b772: 6078 str r0, [r7, #4] + 802b774: 6039 str r1, [r7, #0] uint32_t macregval; /*------------------------ MACCR Configuration --------------------*/ macregval = (macconf->InterPacketGapVal | - 802b6f2: 683b ldr r3, [r7, #0] - 802b6f4: 689a ldr r2, [r3, #8] + 802b776: 683b ldr r3, [r7, #0] + 802b778: 689a ldr r2, [r3, #8] macconf->SourceAddrControl | - 802b6f6: 683b ldr r3, [r7, #0] - 802b6f8: 681b ldr r3, [r3, #0] + 802b77a: 683b ldr r3, [r7, #0] + 802b77c: 681b ldr r3, [r3, #0] macregval = (macconf->InterPacketGapVal | - 802b6fa: 431a orrs r2, r3 + 802b77e: 431a orrs r2, r3 ((uint32_t)macconf->ChecksumOffload << 27) | - 802b6fc: 683b ldr r3, [r7, #0] - 802b6fe: 791b ldrb r3, [r3, #4] - 802b700: 06db lsls r3, r3, #27 + 802b780: 683b ldr r3, [r7, #0] + 802b782: 791b ldrb r3, [r3, #4] + 802b784: 06db lsls r3, r3, #27 macconf->SourceAddrControl | - 802b702: 431a orrs r2, r3 + 802b786: 431a orrs r2, r3 ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) | - 802b704: 683b ldr r3, [r7, #0] - 802b706: 7b1b ldrb r3, [r3, #12] - 802b708: 05db lsls r3, r3, #23 + 802b788: 683b ldr r3, [r7, #0] + 802b78a: 7b1b ldrb r3, [r3, #12] + 802b78c: 05db lsls r3, r3, #23 ((uint32_t)macconf->ChecksumOffload << 27) | - 802b70a: 431a orrs r2, r3 + 802b78e: 431a orrs r2, r3 ((uint32_t)macconf->Support2KPacket << 22) | - 802b70c: 683b ldr r3, [r7, #0] - 802b70e: 7b5b ldrb r3, [r3, #13] - 802b710: 059b lsls r3, r3, #22 + 802b790: 683b ldr r3, [r7, #0] + 802b792: 7b5b ldrb r3, [r3, #13] + 802b794: 059b lsls r3, r3, #22 ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) | - 802b712: 431a orrs r2, r3 + 802b796: 431a orrs r2, r3 ((uint32_t)macconf->CRCStripTypePacket << 21) | - 802b714: 683b ldr r3, [r7, #0] - 802b716: 7b9b ldrb r3, [r3, #14] - 802b718: 055b lsls r3, r3, #21 + 802b798: 683b ldr r3, [r7, #0] + 802b79a: 7b9b ldrb r3, [r3, #14] + 802b79c: 055b lsls r3, r3, #21 ((uint32_t)macconf->Support2KPacket << 22) | - 802b71a: 431a orrs r2, r3 + 802b79e: 431a orrs r2, r3 ((uint32_t)macconf->AutomaticPadCRCStrip << 20) | - 802b71c: 683b ldr r3, [r7, #0] - 802b71e: 7bdb ldrb r3, [r3, #15] - 802b720: 051b lsls r3, r3, #20 + 802b7a0: 683b ldr r3, [r7, #0] + 802b7a2: 7bdb ldrb r3, [r3, #15] + 802b7a4: 051b lsls r3, r3, #20 ((uint32_t)macconf->CRCStripTypePacket << 21) | - 802b722: 4313 orrs r3, r2 + 802b7a6: 4313 orrs r3, r2 ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) | - 802b724: 683a ldr r2, [r7, #0] - 802b726: 7c12 ldrb r2, [r2, #16] - 802b728: 2a00 cmp r2, #0 - 802b72a: d102 bne.n 802b732 - 802b72c: f44f 2200 mov.w r2, #524288 ; 0x80000 - 802b730: e000 b.n 802b734 - 802b732: 2200 movs r2, #0 + 802b7a8: 683a ldr r2, [r7, #0] + 802b7aa: 7c12 ldrb r2, [r2, #16] + 802b7ac: 2a00 cmp r2, #0 + 802b7ae: d102 bne.n 802b7b6 + 802b7b0: f44f 2200 mov.w r2, #524288 ; 0x80000 + 802b7b4: e000 b.n 802b7b8 + 802b7b6: 2200 movs r2, #0 ((uint32_t)macconf->AutomaticPadCRCStrip << 20) | - 802b734: 4313 orrs r3, r2 + 802b7b8: 4313 orrs r3, r2 ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) | - 802b736: 683a ldr r2, [r7, #0] - 802b738: 7c52 ldrb r2, [r2, #17] - 802b73a: 2a00 cmp r2, #0 - 802b73c: d102 bne.n 802b744 - 802b73e: f44f 3200 mov.w r2, #131072 ; 0x20000 - 802b742: e000 b.n 802b746 - 802b744: 2200 movs r2, #0 + 802b7ba: 683a ldr r2, [r7, #0] + 802b7bc: 7c52 ldrb r2, [r2, #17] + 802b7be: 2a00 cmp r2, #0 + 802b7c0: d102 bne.n 802b7c8 + 802b7c2: f44f 3200 mov.w r2, #131072 ; 0x20000 + 802b7c6: e000 b.n 802b7ca + 802b7c8: 2200 movs r2, #0 ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) | - 802b746: 431a orrs r2, r3 + 802b7ca: 431a orrs r2, r3 ((uint32_t)macconf->JumboPacket << 16) | - 802b748: 683b ldr r3, [r7, #0] - 802b74a: 7c9b ldrb r3, [r3, #18] - 802b74c: 041b lsls r3, r3, #16 + 802b7cc: 683b ldr r3, [r7, #0] + 802b7ce: 7c9b ldrb r3, [r3, #18] + 802b7d0: 041b lsls r3, r3, #16 ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) | - 802b74e: 431a orrs r2, r3 + 802b7d2: 431a orrs r2, r3 macconf->Speed | - 802b750: 683b ldr r3, [r7, #0] - 802b752: 695b ldr r3, [r3, #20] + 802b7d4: 683b ldr r3, [r7, #0] + 802b7d6: 695b ldr r3, [r3, #20] ((uint32_t)macconf->JumboPacket << 16) | - 802b754: 431a orrs r2, r3 + 802b7d8: 431a orrs r2, r3 macconf->DuplexMode | - 802b756: 683b ldr r3, [r7, #0] - 802b758: 699b ldr r3, [r3, #24] + 802b7da: 683b ldr r3, [r7, #0] + 802b7dc: 699b ldr r3, [r3, #24] macconf->Speed | - 802b75a: 431a orrs r2, r3 + 802b7de: 431a orrs r2, r3 ((uint32_t)macconf->LoopbackMode << 12) | - 802b75c: 683b ldr r3, [r7, #0] - 802b75e: 7f1b ldrb r3, [r3, #28] - 802b760: 031b lsls r3, r3, #12 + 802b7e0: 683b ldr r3, [r7, #0] + 802b7e2: 7f1b ldrb r3, [r3, #28] + 802b7e4: 031b lsls r3, r3, #12 macconf->DuplexMode | - 802b762: 431a orrs r2, r3 + 802b7e6: 431a orrs r2, r3 ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) | - 802b764: 683b ldr r3, [r7, #0] - 802b766: 7f5b ldrb r3, [r3, #29] - 802b768: 02db lsls r3, r3, #11 + 802b7e8: 683b ldr r3, [r7, #0] + 802b7ea: 7f5b ldrb r3, [r3, #29] + 802b7ec: 02db lsls r3, r3, #11 ((uint32_t)macconf->LoopbackMode << 12) | - 802b76a: 4313 orrs r3, r2 + 802b7ee: 4313 orrs r3, r2 ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) | - 802b76c: 683a ldr r2, [r7, #0] - 802b76e: 7f92 ldrb r2, [r2, #30] - 802b770: 2a00 cmp r2, #0 - 802b772: d102 bne.n 802b77a - 802b774: f44f 6280 mov.w r2, #1024 ; 0x400 - 802b778: e000 b.n 802b77c - 802b77a: 2200 movs r2, #0 + 802b7f0: 683a ldr r2, [r7, #0] + 802b7f2: 7f92 ldrb r2, [r2, #30] + 802b7f4: 2a00 cmp r2, #0 + 802b7f6: d102 bne.n 802b7fe + 802b7f8: f44f 6280 mov.w r2, #1024 ; 0x400 + 802b7fc: e000 b.n 802b800 + 802b7fe: 2200 movs r2, #0 ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) | - 802b77c: 431a orrs r2, r3 + 802b800: 431a orrs r2, r3 ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) | - 802b77e: 683b ldr r3, [r7, #0] - 802b780: 7fdb ldrb r3, [r3, #31] - 802b782: 025b lsls r3, r3, #9 + 802b802: 683b ldr r3, [r7, #0] + 802b804: 7fdb ldrb r3, [r3, #31] + 802b806: 025b lsls r3, r3, #9 ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) | - 802b784: 4313 orrs r3, r2 + 802b808: 4313 orrs r3, r2 ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) | - 802b786: 683a ldr r2, [r7, #0] - 802b788: f892 2020 ldrb.w r2, [r2, #32] - 802b78c: 2a00 cmp r2, #0 - 802b78e: d102 bne.n 802b796 - 802b790: f44f 7280 mov.w r2, #256 ; 0x100 - 802b794: e000 b.n 802b798 - 802b796: 2200 movs r2, #0 + 802b80a: 683a ldr r2, [r7, #0] + 802b80c: f892 2020 ldrb.w r2, [r2, #32] + 802b810: 2a00 cmp r2, #0 + 802b812: d102 bne.n 802b81a + 802b814: f44f 7280 mov.w r2, #256 ; 0x100 + 802b818: e000 b.n 802b81c + 802b81a: 2200 movs r2, #0 ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) | - 802b798: 431a orrs r2, r3 + 802b81c: 431a orrs r2, r3 macconf->BackOffLimit | - 802b79a: 683b ldr r3, [r7, #0] - 802b79c: 6a5b ldr r3, [r3, #36] ; 0x24 + 802b81e: 683b ldr r3, [r7, #0] + 802b820: 6a5b ldr r3, [r3, #36] ; 0x24 ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) | - 802b79e: 431a orrs r2, r3 + 802b822: 431a orrs r2, r3 ((uint32_t)macconf->DeferralCheck << 4) | - 802b7a0: 683b ldr r3, [r7, #0] - 802b7a2: f893 3028 ldrb.w r3, [r3, #40] ; 0x28 - 802b7a6: 011b lsls r3, r3, #4 + 802b824: 683b ldr r3, [r7, #0] + 802b826: f893 3028 ldrb.w r3, [r3, #40] ; 0x28 + 802b82a: 011b lsls r3, r3, #4 macconf->BackOffLimit | - 802b7a8: 431a orrs r2, r3 + 802b82c: 431a orrs r2, r3 macconf->PreambleLength); - 802b7aa: 683b ldr r3, [r7, #0] - 802b7ac: 6adb ldr r3, [r3, #44] ; 0x2c + 802b82e: 683b ldr r3, [r7, #0] + 802b830: 6adb ldr r3, [r3, #44] ; 0x2c macregval = (macconf->InterPacketGapVal | - 802b7ae: 4313 orrs r3, r2 - 802b7b0: 60fb str r3, [r7, #12] + 802b832: 4313 orrs r3, r2 + 802b834: 60fb str r3, [r7, #12] /* Write to MACCR */ MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval); - 802b7b2: 687b ldr r3, [r7, #4] - 802b7b4: 681b ldr r3, [r3, #0] - 802b7b6: 681a ldr r2, [r3, #0] - 802b7b8: 4b56 ldr r3, [pc, #344] ; (802b914 ) - 802b7ba: 4013 ands r3, r2 - 802b7bc: 687a ldr r2, [r7, #4] - 802b7be: 6812 ldr r2, [r2, #0] - 802b7c0: 68f9 ldr r1, [r7, #12] - 802b7c2: 430b orrs r3, r1 - 802b7c4: 6013 str r3, [r2, #0] + 802b836: 687b ldr r3, [r7, #4] + 802b838: 681b ldr r3, [r3, #0] + 802b83a: 681a ldr r2, [r3, #0] + 802b83c: 4b56 ldr r3, [pc, #344] ; (802b998 ) + 802b83e: 4013 ands r3, r2 + 802b840: 687a ldr r2, [r7, #4] + 802b842: 6812 ldr r2, [r2, #0] + 802b844: 68f9 ldr r1, [r7, #12] + 802b846: 430b orrs r3, r1 + 802b848: 6013 str r3, [r2, #0] /*------------------------ MACECR Configuration --------------------*/ macregval = ((macconf->ExtendedInterPacketGapVal << 25) | - 802b7c6: 683b ldr r3, [r7, #0] - 802b7c8: 6bdb ldr r3, [r3, #60] ; 0x3c - 802b7ca: 065a lsls r2, r3, #25 + 802b84a: 683b ldr r3, [r7, #0] + 802b84c: 6bdb ldr r3, [r3, #60] ; 0x3c + 802b84e: 065a lsls r2, r3, #25 ((uint32_t)macconf->ExtendedInterPacketGap << 24) | - 802b7cc: 683b ldr r3, [r7, #0] - 802b7ce: f893 3038 ldrb.w r3, [r3, #56] ; 0x38 - 802b7d2: 061b lsls r3, r3, #24 + 802b850: 683b ldr r3, [r7, #0] + 802b852: f893 3038 ldrb.w r3, [r3, #56] ; 0x38 + 802b856: 061b lsls r3, r3, #24 macregval = ((macconf->ExtendedInterPacketGapVal << 25) | - 802b7d4: 431a orrs r2, r3 + 802b858: 431a orrs r2, r3 ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) | - 802b7d6: 683b ldr r3, [r7, #0] - 802b7d8: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 802b7dc: 049b lsls r3, r3, #18 + 802b85a: 683b ldr r3, [r7, #0] + 802b85c: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 + 802b860: 049b lsls r3, r3, #18 ((uint32_t)macconf->ExtendedInterPacketGap << 24) | - 802b7de: 431a orrs r2, r3 + 802b862: 431a orrs r2, r3 ((uint32_t)macconf->SlowProtocolDetect << 17) | - 802b7e0: 683b ldr r3, [r7, #0] - 802b7e2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 802b7e6: 045b lsls r3, r3, #17 + 802b864: 683b ldr r3, [r7, #0] + 802b866: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 802b86a: 045b lsls r3, r3, #17 ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) | - 802b7e8: 4313 orrs r3, r2 + 802b86c: 4313 orrs r3, r2 ((uint32_t)((macconf->CRCCheckingRxPackets == DISABLE) ? 1U : 0U) << 16) | - 802b7ea: 683a ldr r2, [r7, #0] - 802b7ec: f892 2032 ldrb.w r2, [r2, #50] ; 0x32 - 802b7f0: 2a00 cmp r2, #0 - 802b7f2: d102 bne.n 802b7fa - 802b7f4: f44f 3280 mov.w r2, #65536 ; 0x10000 - 802b7f8: e000 b.n 802b7fc - 802b7fa: 2200 movs r2, #0 + 802b86e: 683a ldr r2, [r7, #0] + 802b870: f892 2032 ldrb.w r2, [r2, #50] ; 0x32 + 802b874: 2a00 cmp r2, #0 + 802b876: d102 bne.n 802b87e + 802b878: f44f 3280 mov.w r2, #65536 ; 0x10000 + 802b87c: e000 b.n 802b880 + 802b87e: 2200 movs r2, #0 ((uint32_t)macconf->SlowProtocolDetect << 17) | - 802b7fc: 431a orrs r2, r3 + 802b880: 431a orrs r2, r3 macconf->GiantPacketSizeLimit); - 802b7fe: 683b ldr r3, [r7, #0] - 802b800: 6b5b ldr r3, [r3, #52] ; 0x34 + 802b882: 683b ldr r3, [r7, #0] + 802b884: 6b5b ldr r3, [r3, #52] ; 0x34 macregval = ((macconf->ExtendedInterPacketGapVal << 25) | - 802b802: 4313 orrs r3, r2 - 802b804: 60fb str r3, [r7, #12] + 802b886: 4313 orrs r3, r2 + 802b888: 60fb str r3, [r7, #12] /* Write to MACECR */ MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval); - 802b806: 687b ldr r3, [r7, #4] - 802b808: 681b ldr r3, [r3, #0] - 802b80a: 685a ldr r2, [r3, #4] - 802b80c: 4b42 ldr r3, [pc, #264] ; (802b918 ) - 802b80e: 4013 ands r3, r2 - 802b810: 687a ldr r2, [r7, #4] - 802b812: 6812 ldr r2, [r2, #0] - 802b814: 68f9 ldr r1, [r7, #12] - 802b816: 430b orrs r3, r1 - 802b818: 6053 str r3, [r2, #4] + 802b88a: 687b ldr r3, [r7, #4] + 802b88c: 681b ldr r3, [r3, #0] + 802b88e: 685a ldr r2, [r3, #4] + 802b890: 4b42 ldr r3, [pc, #264] ; (802b99c ) + 802b892: 4013 ands r3, r2 + 802b894: 687a ldr r2, [r7, #4] + 802b896: 6812 ldr r2, [r2, #0] + 802b898: 68f9 ldr r1, [r7, #12] + 802b89a: 430b orrs r3, r1 + 802b89c: 6053 str r3, [r2, #4] /*------------------------ MACWTR Configuration --------------------*/ macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) | - 802b81a: 683b ldr r3, [r7, #0] - 802b81c: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 802b820: 021a lsls r2, r3, #8 + 802b89e: 683b ldr r3, [r7, #0] + 802b8a0: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 + 802b8a4: 021a lsls r2, r3, #8 macconf->WatchdogTimeout); - 802b822: 683b ldr r3, [r7, #0] - 802b824: 6c5b ldr r3, [r3, #68] ; 0x44 + 802b8a6: 683b ldr r3, [r7, #0] + 802b8a8: 6c5b ldr r3, [r3, #68] ; 0x44 macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) | - 802b826: 4313 orrs r3, r2 - 802b828: 60fb str r3, [r7, #12] + 802b8aa: 4313 orrs r3, r2 + 802b8ac: 60fb str r3, [r7, #12] /* Write to MACWTR */ MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval); - 802b82a: 687b ldr r3, [r7, #4] - 802b82c: 681b ldr r3, [r3, #0] - 802b82e: 68da ldr r2, [r3, #12] - 802b830: 4b3a ldr r3, [pc, #232] ; (802b91c ) - 802b832: 4013 ands r3, r2 - 802b834: 687a ldr r2, [r7, #4] - 802b836: 6812 ldr r2, [r2, #0] - 802b838: 68f9 ldr r1, [r7, #12] - 802b83a: 430b orrs r3, r1 - 802b83c: 60d3 str r3, [r2, #12] + 802b8ae: 687b ldr r3, [r7, #4] + 802b8b0: 681b ldr r3, [r3, #0] + 802b8b2: 68da ldr r2, [r3, #12] + 802b8b4: 4b3a ldr r3, [pc, #232] ; (802b9a0 ) + 802b8b6: 4013 ands r3, r2 + 802b8b8: 687a ldr r2, [r7, #4] + 802b8ba: 6812 ldr r2, [r2, #0] + 802b8bc: 68f9 ldr r1, [r7, #12] + 802b8be: 430b orrs r3, r1 + 802b8c0: 60d3 str r3, [r2, #12] /*------------------------ MACTFCR Configuration --------------------*/ macregval = (((uint32_t)macconf->TransmitFlowControl << 1) | - 802b83e: 683b ldr r3, [r7, #0] - 802b840: f893 3054 ldrb.w r3, [r3, #84] ; 0x54 - 802b844: 005a lsls r2, r3, #1 + 802b8c2: 683b ldr r3, [r7, #0] + 802b8c4: f893 3054 ldrb.w r3, [r3, #84] ; 0x54 + 802b8c8: 005a lsls r2, r3, #1 macconf->PauseLowThreshold | - 802b846: 683b ldr r3, [r7, #0] - 802b848: 6d1b ldr r3, [r3, #80] ; 0x50 + 802b8ca: 683b ldr r3, [r7, #0] + 802b8cc: 6d1b ldr r3, [r3, #80] ; 0x50 macregval = (((uint32_t)macconf->TransmitFlowControl << 1) | - 802b84a: 4313 orrs r3, r2 + 802b8ce: 4313 orrs r3, r2 ((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7) | - 802b84c: 683a ldr r2, [r7, #0] - 802b84e: f892 204c ldrb.w r2, [r2, #76] ; 0x4c - 802b852: 2a00 cmp r2, #0 - 802b854: d101 bne.n 802b85a - 802b856: 2280 movs r2, #128 ; 0x80 - 802b858: e000 b.n 802b85c - 802b85a: 2200 movs r2, #0 + 802b8d0: 683a ldr r2, [r7, #0] + 802b8d2: f892 204c ldrb.w r2, [r2, #76] ; 0x4c + 802b8d6: 2a00 cmp r2, #0 + 802b8d8: d101 bne.n 802b8de + 802b8da: 2280 movs r2, #128 ; 0x80 + 802b8dc: e000 b.n 802b8e0 + 802b8de: 2200 movs r2, #0 macconf->PauseLowThreshold | - 802b85c: 431a orrs r2, r3 + 802b8e0: 431a orrs r2, r3 (macconf->PauseTime << 16)); - 802b85e: 683b ldr r3, [r7, #0] - 802b860: 6c9b ldr r3, [r3, #72] ; 0x48 - 802b862: 041b lsls r3, r3, #16 + 802b8e2: 683b ldr r3, [r7, #0] + 802b8e4: 6c9b ldr r3, [r3, #72] ; 0x48 + 802b8e6: 041b lsls r3, r3, #16 macregval = (((uint32_t)macconf->TransmitFlowControl << 1) | - 802b864: 4313 orrs r3, r2 - 802b866: 60fb str r3, [r7, #12] + 802b8e8: 4313 orrs r3, r2 + 802b8ea: 60fb str r3, [r7, #12] /* Write to MACTFCR */ MODIFY_REG(heth->Instance->MACTFCR, ETH_MACTFCR_MASK, macregval); - 802b868: 687b ldr r3, [r7, #4] - 802b86a: 681b ldr r3, [r3, #0] - 802b86c: 6f1a ldr r2, [r3, #112] ; 0x70 - 802b86e: f64f 730d movw r3, #65293 ; 0xff0d - 802b872: 4013 ands r3, r2 - 802b874: 687a ldr r2, [r7, #4] - 802b876: 6812 ldr r2, [r2, #0] - 802b878: 68f9 ldr r1, [r7, #12] - 802b87a: 430b orrs r3, r1 - 802b87c: 6713 str r3, [r2, #112] ; 0x70 + 802b8ec: 687b ldr r3, [r7, #4] + 802b8ee: 681b ldr r3, [r3, #0] + 802b8f0: 6f1a ldr r2, [r3, #112] ; 0x70 + 802b8f2: f64f 730d movw r3, #65293 ; 0xff0d + 802b8f6: 4013 ands r3, r2 + 802b8f8: 687a ldr r2, [r7, #4] + 802b8fa: 6812 ldr r2, [r2, #0] + 802b8fc: 68f9 ldr r1, [r7, #12] + 802b8fe: 430b orrs r3, r1 + 802b900: 6713 str r3, [r2, #112] ; 0x70 /*------------------------ MACRFCR Configuration --------------------*/ macregval = ((uint32_t)macconf->ReceiveFlowControl | - 802b87e: 683b ldr r3, [r7, #0] - 802b880: f893 3056 ldrb.w r3, [r3, #86] ; 0x56 - 802b884: 461a mov r2, r3 + 802b902: 683b ldr r3, [r7, #0] + 802b904: f893 3056 ldrb.w r3, [r3, #86] ; 0x56 + 802b908: 461a mov r2, r3 ((uint32_t)macconf->UnicastPausePacketDetect << 1)); - 802b886: 683b ldr r3, [r7, #0] - 802b888: f893 3055 ldrb.w r3, [r3, #85] ; 0x55 - 802b88c: 005b lsls r3, r3, #1 + 802b90a: 683b ldr r3, [r7, #0] + 802b90c: f893 3055 ldrb.w r3, [r3, #85] ; 0x55 + 802b910: 005b lsls r3, r3, #1 macregval = ((uint32_t)macconf->ReceiveFlowControl | - 802b88e: 4313 orrs r3, r2 - 802b890: 60fb str r3, [r7, #12] + 802b912: 4313 orrs r3, r2 + 802b914: 60fb str r3, [r7, #12] /* Write to MACRFCR */ MODIFY_REG(heth->Instance->MACRFCR, ETH_MACRFCR_MASK, macregval); - 802b892: 687b ldr r3, [r7, #4] - 802b894: 681b ldr r3, [r3, #0] - 802b896: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802b89a: f023 0103 bic.w r1, r3, #3 - 802b89e: 687b ldr r3, [r7, #4] - 802b8a0: 681b ldr r3, [r3, #0] - 802b8a2: 68fa ldr r2, [r7, #12] - 802b8a4: 430a orrs r2, r1 - 802b8a6: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 802b916: 687b ldr r3, [r7, #4] + 802b918: 681b ldr r3, [r3, #0] + 802b91a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802b91e: f023 0103 bic.w r1, r3, #3 + 802b922: 687b ldr r3, [r7, #4] + 802b924: 681b ldr r3, [r3, #0] + 802b926: 68fa ldr r2, [r7, #12] + 802b928: 430a orrs r2, r1 + 802b92a: f8c3 2090 str.w r2, [r3, #144] ; 0x90 /*------------------------ MTLTQOMR Configuration --------------------*/ /* Write to MTLTQOMR */ MODIFY_REG(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_MASK, macconf->TransmitQueueMode); - 802b8aa: 687b ldr r3, [r7, #4] - 802b8ac: 681b ldr r3, [r3, #0] - 802b8ae: f8d3 3d00 ldr.w r3, [r3, #3328] ; 0xd00 - 802b8b2: f023 0172 bic.w r1, r3, #114 ; 0x72 - 802b8b6: 683b ldr r3, [r7, #0] - 802b8b8: 6d9a ldr r2, [r3, #88] ; 0x58 - 802b8ba: 687b ldr r3, [r7, #4] - 802b8bc: 681b ldr r3, [r3, #0] - 802b8be: 430a orrs r2, r1 - 802b8c0: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 + 802b92e: 687b ldr r3, [r7, #4] + 802b930: 681b ldr r3, [r3, #0] + 802b932: f8d3 3d00 ldr.w r3, [r3, #3328] ; 0xd00 + 802b936: f023 0172 bic.w r1, r3, #114 ; 0x72 + 802b93a: 683b ldr r3, [r7, #0] + 802b93c: 6d9a ldr r2, [r3, #88] ; 0x58 + 802b93e: 687b ldr r3, [r7, #4] + 802b940: 681b ldr r3, [r3, #0] + 802b942: 430a orrs r2, r1 + 802b944: f8c3 2d00 str.w r2, [r3, #3328] ; 0xd00 /*------------------------ MTLRQOMR Configuration --------------------*/ macregval = (macconf->ReceiveQueueMode | - 802b8c4: 683b ldr r3, [r7, #0] - 802b8c6: 6ddb ldr r3, [r3, #92] ; 0x5c + 802b948: 683b ldr r3, [r7, #0] + 802b94a: 6ddb ldr r3, [r3, #92] ; 0x5c ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) | - 802b8c8: 683a ldr r2, [r7, #0] - 802b8ca: f892 2060 ldrb.w r2, [r2, #96] ; 0x60 - 802b8ce: 2a00 cmp r2, #0 - 802b8d0: d101 bne.n 802b8d6 - 802b8d2: 2240 movs r2, #64 ; 0x40 - 802b8d4: e000 b.n 802b8d8 - 802b8d6: 2200 movs r2, #0 + 802b94c: 683a ldr r2, [r7, #0] + 802b94e: f892 2060 ldrb.w r2, [r2, #96] ; 0x60 + 802b952: 2a00 cmp r2, #0 + 802b954: d101 bne.n 802b95a + 802b956: 2240 movs r2, #64 ; 0x40 + 802b958: e000 b.n 802b95c + 802b95a: 2200 movs r2, #0 macregval = (macconf->ReceiveQueueMode | - 802b8d8: 431a orrs r2, r3 + 802b95c: 431a orrs r2, r3 ((uint32_t)macconf->ForwardRxErrorPacket << 4) | - 802b8da: 683b ldr r3, [r7, #0] - 802b8dc: f893 3061 ldrb.w r3, [r3, #97] ; 0x61 - 802b8e0: 011b lsls r3, r3, #4 + 802b95e: 683b ldr r3, [r7, #0] + 802b960: f893 3061 ldrb.w r3, [r3, #97] ; 0x61 + 802b964: 011b lsls r3, r3, #4 ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) | - 802b8e2: 431a orrs r2, r3 + 802b966: 431a orrs r2, r3 ((uint32_t)macconf->ForwardRxUndersizedGoodPacket << 3)); - 802b8e4: 683b ldr r3, [r7, #0] - 802b8e6: f893 3062 ldrb.w r3, [r3, #98] ; 0x62 - 802b8ea: 00db lsls r3, r3, #3 + 802b968: 683b ldr r3, [r7, #0] + 802b96a: f893 3062 ldrb.w r3, [r3, #98] ; 0x62 + 802b96e: 00db lsls r3, r3, #3 macregval = (macconf->ReceiveQueueMode | - 802b8ec: 4313 orrs r3, r2 - 802b8ee: 60fb str r3, [r7, #12] + 802b970: 4313 orrs r3, r2 + 802b972: 60fb str r3, [r7, #12] /* Write to MTLRQOMR */ MODIFY_REG(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_MASK, macregval); - 802b8f0: 687b ldr r3, [r7, #4] - 802b8f2: 681b ldr r3, [r3, #0] - 802b8f4: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 - 802b8f8: f023 017b bic.w r1, r3, #123 ; 0x7b - 802b8fc: 687b ldr r3, [r7, #4] - 802b8fe: 681b ldr r3, [r3, #0] - 802b900: 68fa ldr r2, [r7, #12] - 802b902: 430a orrs r2, r1 - 802b904: f8c3 2d30 str.w r2, [r3, #3376] ; 0xd30 -} - 802b908: bf00 nop - 802b90a: 3714 adds r7, #20 - 802b90c: 46bd mov sp, r7 - 802b90e: f85d 7b04 ldr.w r7, [sp], #4 - 802b912: 4770 bx lr - 802b914: 00048083 .word 0x00048083 - 802b918: c0f88000 .word 0xc0f88000 - 802b91c: fffffef0 .word 0xfffffef0 - -0802b920 : + 802b974: 687b ldr r3, [r7, #4] + 802b976: 681b ldr r3, [r3, #0] + 802b978: f8d3 3d30 ldr.w r3, [r3, #3376] ; 0xd30 + 802b97c: f023 017b bic.w r1, r3, #123 ; 0x7b + 802b980: 687b ldr r3, [r7, #4] + 802b982: 681b ldr r3, [r3, #0] + 802b984: 68fa ldr r2, [r7, #12] + 802b986: 430a orrs r2, r1 + 802b988: f8c3 2d30 str.w r2, [r3, #3376] ; 0xd30 +} + 802b98c: bf00 nop + 802b98e: 3714 adds r7, #20 + 802b990: 46bd mov sp, r7 + 802b992: f85d 7b04 ldr.w r7, [sp], #4 + 802b996: 4770 bx lr + 802b998: 00048083 .word 0x00048083 + 802b99c: c0f88000 .word 0xc0f88000 + 802b9a0: fffffef0 .word 0xfffffef0 + +0802b9a4 : static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, ETH_DMAConfigTypeDef *dmaconf) { - 802b920: b480 push {r7} - 802b922: b085 sub sp, #20 - 802b924: af00 add r7, sp, #0 - 802b926: 6078 str r0, [r7, #4] - 802b928: 6039 str r1, [r7, #0] + 802b9a4: b480 push {r7} + 802b9a6: b085 sub sp, #20 + 802b9a8: af00 add r7, sp, #0 + 802b9aa: 6078 str r0, [r7, #4] + 802b9ac: 6039 str r1, [r7, #0] uint32_t dmaregval; /*------------------------ DMAMR Configuration --------------------*/ MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaconf->DMAArbitration); - 802b92a: 687b ldr r3, [r7, #4] - 802b92c: 681b ldr r3, [r3, #0] - 802b92e: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b932: 681a ldr r2, [r3, #0] - 802b934: 4b38 ldr r3, [pc, #224] ; (802ba18 ) - 802b936: 4013 ands r3, r2 - 802b938: 683a ldr r2, [r7, #0] - 802b93a: 6811 ldr r1, [r2, #0] - 802b93c: 687a ldr r2, [r7, #4] - 802b93e: 6812 ldr r2, [r2, #0] - 802b940: 430b orrs r3, r1 - 802b942: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802b946: 6013 str r3, [r2, #0] + 802b9ae: 687b ldr r3, [r7, #4] + 802b9b0: 681b ldr r3, [r3, #0] + 802b9b2: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802b9b6: 681a ldr r2, [r3, #0] + 802b9b8: 4b38 ldr r3, [pc, #224] ; (802ba9c ) + 802b9ba: 4013 ands r3, r2 + 802b9bc: 683a ldr r2, [r7, #0] + 802b9be: 6811 ldr r1, [r2, #0] + 802b9c0: 687a ldr r2, [r7, #4] + 802b9c2: 6812 ldr r2, [r2, #0] + 802b9c4: 430b orrs r3, r1 + 802b9c6: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802b9ca: 6013 str r3, [r2, #0] /*------------------------ DMASBMR Configuration --------------------*/ dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) | - 802b948: 683b ldr r3, [r7, #0] - 802b94a: 791b ldrb r3, [r3, #4] - 802b94c: 031a lsls r2, r3, #12 + 802b9cc: 683b ldr r3, [r7, #0] + 802b9ce: 791b ldrb r3, [r3, #4] + 802b9d0: 031a lsls r2, r3, #12 dmaconf->BurstMode | - 802b94e: 683b ldr r3, [r7, #0] - 802b950: 689b ldr r3, [r3, #8] + 802b9d2: 683b ldr r3, [r7, #0] + 802b9d4: 689b ldr r3, [r3, #8] dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) | - 802b952: 431a orrs r2, r3 + 802b9d6: 431a orrs r2, r3 ((uint32_t)dmaconf->RebuildINCRxBurst << 15)); - 802b954: 683b ldr r3, [r7, #0] - 802b956: 7b1b ldrb r3, [r3, #12] - 802b958: 03db lsls r3, r3, #15 + 802b9d8: 683b ldr r3, [r7, #0] + 802b9da: 7b1b ldrb r3, [r3, #12] + 802b9dc: 03db lsls r3, r3, #15 dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) | - 802b95a: 4313 orrs r3, r2 - 802b95c: 60fb str r3, [r7, #12] + 802b9de: 4313 orrs r3, r2 + 802b9e0: 60fb str r3, [r7, #12] MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval); - 802b95e: 687b ldr r3, [r7, #4] - 802b960: 681b ldr r3, [r3, #0] - 802b962: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b966: 685a ldr r2, [r3, #4] - 802b968: 4b2c ldr r3, [pc, #176] ; (802ba1c ) - 802b96a: 4013 ands r3, r2 - 802b96c: 687a ldr r2, [r7, #4] - 802b96e: 6812 ldr r2, [r2, #0] - 802b970: 68f9 ldr r1, [r7, #12] - 802b972: 430b orrs r3, r1 - 802b974: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802b978: 6053 str r3, [r2, #4] + 802b9e2: 687b ldr r3, [r7, #4] + 802b9e4: 681b ldr r3, [r3, #0] + 802b9e6: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802b9ea: 685a ldr r2, [r3, #4] + 802b9ec: 4b2c ldr r3, [pc, #176] ; (802baa0 ) + 802b9ee: 4013 ands r3, r2 + 802b9f0: 687a ldr r2, [r7, #4] + 802b9f2: 6812 ldr r2, [r2, #0] + 802b9f4: 68f9 ldr r1, [r7, #12] + 802b9f6: 430b orrs r3, r1 + 802b9f8: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802b9fc: 6053 str r3, [r2, #4] /*------------------------ DMACCR Configuration --------------------*/ dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) | - 802b97a: 683b ldr r3, [r7, #0] - 802b97c: 7b5b ldrb r3, [r3, #13] - 802b97e: 041a lsls r2, r3, #16 + 802b9fe: 683b ldr r3, [r7, #0] + 802ba00: 7b5b ldrb r3, [r3, #13] + 802ba02: 041a lsls r2, r3, #16 dmaconf->MaximumSegmentSize); - 802b980: 683b ldr r3, [r7, #0] - 802b982: 6a1b ldr r3, [r3, #32] + 802ba04: 683b ldr r3, [r7, #0] + 802ba06: 6a1b ldr r3, [r3, #32] dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) | - 802b984: 4313 orrs r3, r2 - 802b986: 60fb str r3, [r7, #12] + 802ba08: 4313 orrs r3, r2 + 802ba0a: 60fb str r3, [r7, #12] MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_MASK, dmaregval); - 802b988: 687b ldr r3, [r7, #4] - 802b98a: 681b ldr r3, [r3, #0] - 802b98c: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b990: f8d3 2100 ldr.w r2, [r3, #256] ; 0x100 - 802b994: 4b22 ldr r3, [pc, #136] ; (802ba20 ) - 802b996: 4013 ands r3, r2 - 802b998: 687a ldr r2, [r7, #4] - 802b99a: 6812 ldr r2, [r2, #0] - 802b99c: 68f9 ldr r1, [r7, #12] - 802b99e: 430b orrs r3, r1 - 802b9a0: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802b9a4: f8c2 3100 str.w r3, [r2, #256] ; 0x100 + 802ba0c: 687b ldr r3, [r7, #4] + 802ba0e: 681b ldr r3, [r3, #0] + 802ba10: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ba14: f8d3 2100 ldr.w r2, [r3, #256] ; 0x100 + 802ba18: 4b22 ldr r3, [pc, #136] ; (802baa4 ) + 802ba1a: 4013 ands r3, r2 + 802ba1c: 687a ldr r2, [r7, #4] + 802ba1e: 6812 ldr r2, [r2, #0] + 802ba20: 68f9 ldr r1, [r7, #12] + 802ba22: 430b orrs r3, r1 + 802ba24: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802ba28: f8c2 3100 str.w r3, [r2, #256] ; 0x100 /*------------------------ DMACTCR Configuration --------------------*/ dmaregval = (dmaconf->TxDMABurstLength | - 802b9a8: 683b ldr r3, [r7, #0] - 802b9aa: 691a ldr r2, [r3, #16] + 802ba2c: 683b ldr r3, [r7, #0] + 802ba2e: 691a ldr r2, [r3, #16] ((uint32_t)dmaconf->SecondPacketOperate << 4) | - 802b9ac: 683b ldr r3, [r7, #0] - 802b9ae: 7d1b ldrb r3, [r3, #20] - 802b9b0: 011b lsls r3, r3, #4 + 802ba30: 683b ldr r3, [r7, #0] + 802ba32: 7d1b ldrb r3, [r3, #20] + 802ba34: 011b lsls r3, r3, #4 dmaregval = (dmaconf->TxDMABurstLength | - 802b9b2: 431a orrs r2, r3 + 802ba36: 431a orrs r2, r3 ((uint32_t)dmaconf->TCPSegmentation << 12)); - 802b9b4: 683b ldr r3, [r7, #0] - 802b9b6: 7f5b ldrb r3, [r3, #29] - 802b9b8: 031b lsls r3, r3, #12 + 802ba38: 683b ldr r3, [r7, #0] + 802ba3a: 7f5b ldrb r3, [r3, #29] + 802ba3c: 031b lsls r3, r3, #12 dmaregval = (dmaconf->TxDMABurstLength | - 802b9ba: 4313 orrs r3, r2 - 802b9bc: 60fb str r3, [r7, #12] + 802ba3e: 4313 orrs r3, r2 + 802ba40: 60fb str r3, [r7, #12] MODIFY_REG(heth->Instance->DMACTCR, ETH_DMACTCR_MASK, dmaregval); - 802b9be: 687b ldr r3, [r7, #4] - 802b9c0: 681b ldr r3, [r3, #0] - 802b9c2: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b9c6: f8d3 2104 ldr.w r2, [r3, #260] ; 0x104 - 802b9ca: 4b16 ldr r3, [pc, #88] ; (802ba24 ) - 802b9cc: 4013 ands r3, r2 - 802b9ce: 687a ldr r2, [r7, #4] - 802b9d0: 6812 ldr r2, [r2, #0] - 802b9d2: 68f9 ldr r1, [r7, #12] - 802b9d4: 430b orrs r3, r1 - 802b9d6: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802b9da: f8c2 3104 str.w r3, [r2, #260] ; 0x104 + 802ba42: 687b ldr r3, [r7, #4] + 802ba44: 681b ldr r3, [r3, #0] + 802ba46: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ba4a: f8d3 2104 ldr.w r2, [r3, #260] ; 0x104 + 802ba4e: 4b16 ldr r3, [pc, #88] ; (802baa8 ) + 802ba50: 4013 ands r3, r2 + 802ba52: 687a ldr r2, [r7, #4] + 802ba54: 6812 ldr r2, [r2, #0] + 802ba56: 68f9 ldr r1, [r7, #12] + 802ba58: 430b orrs r3, r1 + 802ba5a: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802ba5e: f8c2 3104 str.w r3, [r2, #260] ; 0x104 /*------------------------ DMACRCR Configuration --------------------*/ dmaregval = (((uint32_t)dmaconf->FlushRxPacket << 31) | - 802b9de: 683b ldr r3, [r7, #0] - 802b9e0: 7f1b ldrb r3, [r3, #28] - 802b9e2: 07da lsls r2, r3, #31 + 802ba62: 683b ldr r3, [r7, #0] + 802ba64: 7f1b ldrb r3, [r3, #28] + 802ba66: 07da lsls r2, r3, #31 dmaconf->RxDMABurstLength); - 802b9e4: 683b ldr r3, [r7, #0] - 802b9e6: 699b ldr r3, [r3, #24] + 802ba68: 683b ldr r3, [r7, #0] + 802ba6a: 699b ldr r3, [r3, #24] dmaregval = (((uint32_t)dmaconf->FlushRxPacket << 31) | - 802b9e8: 4313 orrs r3, r2 - 802b9ea: 60fb str r3, [r7, #12] + 802ba6c: 4313 orrs r3, r2 + 802ba6e: 60fb str r3, [r7, #12] /* Write to DMACRCR */ MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_MASK, dmaregval); - 802b9ec: 687b ldr r3, [r7, #4] - 802b9ee: 681b ldr r3, [r3, #0] - 802b9f0: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802b9f4: f8d3 2108 ldr.w r2, [r3, #264] ; 0x108 - 802b9f8: 4b0b ldr r3, [pc, #44] ; (802ba28 ) - 802b9fa: 4013 ands r3, r2 - 802b9fc: 687a ldr r2, [r7, #4] - 802b9fe: 6812 ldr r2, [r2, #0] - 802ba00: 68f9 ldr r1, [r7, #12] - 802ba02: 430b orrs r3, r1 - 802ba04: f502 5280 add.w r2, r2, #4096 ; 0x1000 - 802ba08: f8c2 3108 str.w r3, [r2, #264] ; 0x108 -} - 802ba0c: bf00 nop - 802ba0e: 3714 adds r7, #20 - 802ba10: 46bd mov sp, r7 - 802ba12: f85d 7b04 ldr.w r7, [sp], #4 - 802ba16: 4770 bx lr - 802ba18: ffff87fd .word 0xffff87fd - 802ba1c: ffff2ffe .word 0xffff2ffe - 802ba20: fffec000 .word 0xfffec000 - 802ba24: ffc0efef .word 0xffc0efef - 802ba28: 7fc0ffff .word 0x7fc0ffff - -0802ba2c : + 802ba70: 687b ldr r3, [r7, #4] + 802ba72: 681b ldr r3, [r3, #0] + 802ba74: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802ba78: f8d3 2108 ldr.w r2, [r3, #264] ; 0x108 + 802ba7c: 4b0b ldr r3, [pc, #44] ; (802baac ) + 802ba7e: 4013 ands r3, r2 + 802ba80: 687a ldr r2, [r7, #4] + 802ba82: 6812 ldr r2, [r2, #0] + 802ba84: 68f9 ldr r1, [r7, #12] + 802ba86: 430b orrs r3, r1 + 802ba88: f502 5280 add.w r2, r2, #4096 ; 0x1000 + 802ba8c: f8c2 3108 str.w r3, [r2, #264] ; 0x108 +} + 802ba90: bf00 nop + 802ba92: 3714 adds r7, #20 + 802ba94: 46bd mov sp, r7 + 802ba96: f85d 7b04 ldr.w r7, [sp], #4 + 802ba9a: 4770 bx lr + 802ba9c: ffff87fd .word 0xffff87fd + 802baa0: ffff2ffe .word 0xffff2ffe + 802baa4: fffec000 .word 0xfffec000 + 802baa8: ffc0efef .word 0xffc0efef + 802baac: 7fc0ffff .word 0x7fc0ffff + +0802bab0 : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval HAL status */ static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth) { - 802ba2c: b580 push {r7, lr} - 802ba2e: b0a4 sub sp, #144 ; 0x90 - 802ba30: af00 add r7, sp, #0 - 802ba32: 6078 str r0, [r7, #4] + 802bab0: b580 push {r7, lr} + 802bab2: b0a4 sub sp, #144 ; 0x90 + 802bab4: af00 add r7, sp, #0 + 802bab6: 6078 str r0, [r7, #4] ETH_MACConfigTypeDef macDefaultConf; ETH_DMAConfigTypeDef dmaDefaultConf; /*--------------- ETHERNET MAC registers default Configuration --------------*/ macDefaultConf.AutomaticPadCRCStrip = ENABLE; - 802ba34: 2301 movs r3, #1 - 802ba36: f887 303b strb.w r3, [r7, #59] ; 0x3b + 802bab8: 2301 movs r3, #1 + 802baba: f887 303b strb.w r3, [r7, #59] ; 0x3b macDefaultConf.BackOffLimit = ETH_BACKOFFLIMIT_10; - 802ba3a: 2300 movs r3, #0 - 802ba3c: 653b str r3, [r7, #80] ; 0x50 + 802babe: 2300 movs r3, #0 + 802bac0: 653b str r3, [r7, #80] ; 0x50 macDefaultConf.CarrierSenseBeforeTransmit = DISABLE; - 802ba3e: 2300 movs r3, #0 - 802ba40: f887 3049 strb.w r3, [r7, #73] ; 0x49 + 802bac2: 2300 movs r3, #0 + 802bac4: f887 3049 strb.w r3, [r7, #73] ; 0x49 macDefaultConf.CarrierSenseDuringTransmit = DISABLE; - 802ba44: 2300 movs r3, #0 - 802ba46: f887 304b strb.w r3, [r7, #75] ; 0x4b + 802bac8: 2300 movs r3, #0 + 802baca: f887 304b strb.w r3, [r7, #75] ; 0x4b macDefaultConf.ChecksumOffload = ENABLE; - 802ba4a: 2301 movs r3, #1 - 802ba4c: f887 3030 strb.w r3, [r7, #48] ; 0x30 + 802bace: 2301 movs r3, #1 + 802bad0: f887 3030 strb.w r3, [r7, #48] ; 0x30 macDefaultConf.CRCCheckingRxPackets = ENABLE; - 802ba50: 2301 movs r3, #1 - 802ba52: f887 305e strb.w r3, [r7, #94] ; 0x5e + 802bad4: 2301 movs r3, #1 + 802bad6: f887 305e strb.w r3, [r7, #94] ; 0x5e macDefaultConf.CRCStripTypePacket = ENABLE; - 802ba56: 2301 movs r3, #1 - 802ba58: f887 303a strb.w r3, [r7, #58] ; 0x3a + 802bada: 2301 movs r3, #1 + 802badc: f887 303a strb.w r3, [r7, #58] ; 0x3a macDefaultConf.DeferralCheck = DISABLE; - 802ba5c: 2300 movs r3, #0 - 802ba5e: f887 3054 strb.w r3, [r7, #84] ; 0x54 + 802bae0: 2300 movs r3, #0 + 802bae2: f887 3054 strb.w r3, [r7, #84] ; 0x54 macDefaultConf.DropTCPIPChecksumErrorPacket = ENABLE; - 802ba62: 2301 movs r3, #1 - 802ba64: f887 308c strb.w r3, [r7, #140] ; 0x8c + 802bae6: 2301 movs r3, #1 + 802bae8: f887 308c strb.w r3, [r7, #140] ; 0x8c macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE; - 802ba68: f44f 5300 mov.w r3, #8192 ; 0x2000 - 802ba6c: 647b str r3, [r7, #68] ; 0x44 + 802baec: f44f 5300 mov.w r3, #8192 ; 0x2000 + 802baf0: 647b str r3, [r7, #68] ; 0x44 macDefaultConf.ExtendedInterPacketGap = DISABLE; - 802ba6e: 2300 movs r3, #0 - 802ba70: f887 3064 strb.w r3, [r7, #100] ; 0x64 + 802baf2: 2300 movs r3, #0 + 802baf4: f887 3064 strb.w r3, [r7, #100] ; 0x64 macDefaultConf.ExtendedInterPacketGapVal = 0x0; - 802ba74: 2300 movs r3, #0 - 802ba76: 66bb str r3, [r7, #104] ; 0x68 + 802baf8: 2300 movs r3, #0 + 802bafa: 66bb str r3, [r7, #104] ; 0x68 macDefaultConf.ForwardRxErrorPacket = DISABLE; - 802ba78: 2300 movs r3, #0 - 802ba7a: f887 308d strb.w r3, [r7, #141] ; 0x8d + 802bafc: 2300 movs r3, #0 + 802bafe: f887 308d strb.w r3, [r7, #141] ; 0x8d macDefaultConf.ForwardRxUndersizedGoodPacket = DISABLE; - 802ba7e: 2300 movs r3, #0 - 802ba80: f887 308e strb.w r3, [r7, #142] ; 0x8e + 802bb02: 2300 movs r3, #0 + 802bb04: f887 308e strb.w r3, [r7, #142] ; 0x8e macDefaultConf.GiantPacketSizeLimit = 0x618; - 802ba84: f44f 63c3 mov.w r3, #1560 ; 0x618 - 802ba88: 663b str r3, [r7, #96] ; 0x60 + 802bb08: f44f 63c3 mov.w r3, #1560 ; 0x618 + 802bb0c: 663b str r3, [r7, #96] ; 0x60 macDefaultConf.GiantPacketSizeLimitControl = DISABLE; - 802ba8a: 2300 movs r3, #0 - 802ba8c: f887 3038 strb.w r3, [r7, #56] ; 0x38 + 802bb0e: 2300 movs r3, #0 + 802bb10: f887 3038 strb.w r3, [r7, #56] ; 0x38 macDefaultConf.InterPacketGapVal = ETH_INTERPACKETGAP_96BIT; - 802ba90: 2300 movs r3, #0 - 802ba92: 637b str r3, [r7, #52] ; 0x34 + 802bb14: 2300 movs r3, #0 + 802bb16: 637b str r3, [r7, #52] ; 0x34 macDefaultConf.Jabber = ENABLE; - 802ba94: 2301 movs r3, #1 - 802ba96: f887 303d strb.w r3, [r7, #61] ; 0x3d + 802bb18: 2301 movs r3, #1 + 802bb1a: f887 303d strb.w r3, [r7, #61] ; 0x3d macDefaultConf.JumboPacket = DISABLE; - 802ba9a: 2300 movs r3, #0 - 802ba9c: f887 303e strb.w r3, [r7, #62] ; 0x3e + 802bb1e: 2300 movs r3, #0 + 802bb20: f887 303e strb.w r3, [r7, #62] ; 0x3e macDefaultConf.LoopbackMode = DISABLE; - 802baa0: 2300 movs r3, #0 - 802baa2: f887 3048 strb.w r3, [r7, #72] ; 0x48 + 802bb24: 2300 movs r3, #0 + 802bb26: f887 3048 strb.w r3, [r7, #72] ; 0x48 macDefaultConf.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS_4; - 802baa6: 2300 movs r3, #0 - 802baa8: 67fb str r3, [r7, #124] ; 0x7c + 802bb2a: 2300 movs r3, #0 + 802bb2c: 67fb str r3, [r7, #124] ; 0x7c macDefaultConf.PauseTime = 0x0; - 802baaa: 2300 movs r3, #0 - 802baac: 677b str r3, [r7, #116] ; 0x74 + 802bb2e: 2300 movs r3, #0 + 802bb30: 677b str r3, [r7, #116] ; 0x74 macDefaultConf.PreambleLength = ETH_PREAMBLELENGTH_7; - 802baae: 2300 movs r3, #0 - 802bab0: 65bb str r3, [r7, #88] ; 0x58 + 802bb32: 2300 movs r3, #0 + 802bb34: 65bb str r3, [r7, #88] ; 0x58 macDefaultConf.ProgrammableWatchdog = DISABLE; - 802bab2: 2300 movs r3, #0 - 802bab4: f887 306c strb.w r3, [r7, #108] ; 0x6c + 802bb36: 2300 movs r3, #0 + 802bb38: f887 306c strb.w r3, [r7, #108] ; 0x6c macDefaultConf.ReceiveFlowControl = DISABLE; - 802bab8: 2300 movs r3, #0 - 802baba: f887 3082 strb.w r3, [r7, #130] ; 0x82 + 802bb3c: 2300 movs r3, #0 + 802bb3e: f887 3082 strb.w r3, [r7, #130] ; 0x82 macDefaultConf.ReceiveOwn = ENABLE; - 802babe: 2301 movs r3, #1 - 802bac0: f887 304a strb.w r3, [r7, #74] ; 0x4a + 802bb42: 2301 movs r3, #1 + 802bb44: f887 304a strb.w r3, [r7, #74] ; 0x4a macDefaultConf.ReceiveQueueMode = ETH_RECEIVESTOREFORWARD; - 802bac4: 2320 movs r3, #32 - 802bac6: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 802bb48: 2320 movs r3, #32 + 802bb4a: f8c7 3088 str.w r3, [r7, #136] ; 0x88 macDefaultConf.RetryTransmission = ENABLE; - 802baca: 2301 movs r3, #1 - 802bacc: f887 304c strb.w r3, [r7, #76] ; 0x4c + 802bb4e: 2301 movs r3, #1 + 802bb50: f887 304c strb.w r3, [r7, #76] ; 0x4c macDefaultConf.SlowProtocolDetect = DISABLE; - 802bad0: 2300 movs r3, #0 - 802bad2: f887 305d strb.w r3, [r7, #93] ; 0x5d + 802bb54: 2300 movs r3, #0 + 802bb56: f887 305d strb.w r3, [r7, #93] ; 0x5d macDefaultConf.SourceAddrControl = ETH_SOURCEADDRESS_REPLACE_ADDR0; - 802bad6: f04f 5340 mov.w r3, #805306368 ; 0x30000000 - 802bada: 62fb str r3, [r7, #44] ; 0x2c + 802bb5a: f04f 5340 mov.w r3, #805306368 ; 0x30000000 + 802bb5e: 62fb str r3, [r7, #44] ; 0x2c macDefaultConf.Speed = ETH_SPEED_100M; - 802badc: f44f 4380 mov.w r3, #16384 ; 0x4000 - 802bae0: 643b str r3, [r7, #64] ; 0x40 + 802bb60: f44f 4380 mov.w r3, #16384 ; 0x4000 + 802bb64: 643b str r3, [r7, #64] ; 0x40 macDefaultConf.Support2KPacket = DISABLE; - 802bae2: 2300 movs r3, #0 - 802bae4: f887 3039 strb.w r3, [r7, #57] ; 0x39 + 802bb66: 2300 movs r3, #0 + 802bb68: f887 3039 strb.w r3, [r7, #57] ; 0x39 macDefaultConf.TransmitQueueMode = ETH_TRANSMITSTOREFORWARD; - 802bae8: 2302 movs r3, #2 - 802baea: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 802bb6c: 2302 movs r3, #2 + 802bb6e: f8c7 3084 str.w r3, [r7, #132] ; 0x84 macDefaultConf.TransmitFlowControl = DISABLE; - 802baee: 2300 movs r3, #0 - 802baf0: f887 3080 strb.w r3, [r7, #128] ; 0x80 + 802bb72: 2300 movs r3, #0 + 802bb74: f887 3080 strb.w r3, [r7, #128] ; 0x80 macDefaultConf.UnicastPausePacketDetect = DISABLE; - 802baf4: 2300 movs r3, #0 - 802baf6: f887 3081 strb.w r3, [r7, #129] ; 0x81 + 802bb78: 2300 movs r3, #0 + 802bb7a: f887 3081 strb.w r3, [r7, #129] ; 0x81 macDefaultConf.UnicastSlowProtocolPacketDetect = DISABLE; - 802bafa: 2300 movs r3, #0 - 802bafc: f887 305c strb.w r3, [r7, #92] ; 0x5c + 802bb7e: 2300 movs r3, #0 + 802bb80: f887 305c strb.w r3, [r7, #92] ; 0x5c macDefaultConf.Watchdog = ENABLE; - 802bb00: 2301 movs r3, #1 - 802bb02: f887 303c strb.w r3, [r7, #60] ; 0x3c + 802bb84: 2301 movs r3, #1 + 802bb86: f887 303c strb.w r3, [r7, #60] ; 0x3c macDefaultConf.WatchdogTimeout = ETH_MACWTR_WTO_2KB; - 802bb06: 2300 movs r3, #0 - 802bb08: 673b str r3, [r7, #112] ; 0x70 + 802bb8a: 2300 movs r3, #0 + 802bb8c: 673b str r3, [r7, #112] ; 0x70 macDefaultConf.ZeroQuantaPause = ENABLE; - 802bb0a: 2301 movs r3, #1 - 802bb0c: f887 3078 strb.w r3, [r7, #120] ; 0x78 + 802bb8e: 2301 movs r3, #1 + 802bb90: f887 3078 strb.w r3, [r7, #120] ; 0x78 /* MAC default configuration */ ETH_SetMACConfig(heth, &macDefaultConf); - 802bb10: f107 032c add.w r3, r7, #44 ; 0x2c - 802bb14: 4619 mov r1, r3 - 802bb16: 6878 ldr r0, [r7, #4] - 802bb18: f7ff fde6 bl 802b6e8 + 802bb94: f107 032c add.w r3, r7, #44 ; 0x2c + 802bb98: 4619 mov r1, r3 + 802bb9a: 6878 ldr r0, [r7, #4] + 802bb9c: f7ff fde6 bl 802b76c /*--------------- ETHERNET DMA registers default Configuration --------------*/ dmaDefaultConf.AddressAlignedBeats = ENABLE; - 802bb1c: 2301 movs r3, #1 - 802bb1e: 733b strb r3, [r7, #12] + 802bba0: 2301 movs r3, #1 + 802bba2: 733b strb r3, [r7, #12] dmaDefaultConf.BurstMode = ETH_BURSTLENGTH_FIXED; - 802bb20: 2301 movs r3, #1 - 802bb22: 613b str r3, [r7, #16] + 802bba4: 2301 movs r3, #1 + 802bba6: 613b str r3, [r7, #16] dmaDefaultConf.DMAArbitration = ETH_DMAARBITRATION_RX1_TX1; - 802bb24: 2300 movs r3, #0 - 802bb26: 60bb str r3, [r7, #8] + 802bba8: 2300 movs r3, #0 + 802bbaa: 60bb str r3, [r7, #8] dmaDefaultConf.FlushRxPacket = DISABLE; - 802bb28: 2300 movs r3, #0 - 802bb2a: f887 3024 strb.w r3, [r7, #36] ; 0x24 + 802bbac: 2300 movs r3, #0 + 802bbae: f887 3024 strb.w r3, [r7, #36] ; 0x24 dmaDefaultConf.PBLx8Mode = DISABLE; - 802bb2e: 2300 movs r3, #0 - 802bb30: 757b strb r3, [r7, #21] + 802bbb2: 2300 movs r3, #0 + 802bbb4: 757b strb r3, [r7, #21] dmaDefaultConf.RebuildINCRxBurst = DISABLE; - 802bb32: 2300 movs r3, #0 - 802bb34: 753b strb r3, [r7, #20] + 802bbb6: 2300 movs r3, #0 + 802bbb8: 753b strb r3, [r7, #20] dmaDefaultConf.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT; - 802bb36: f44f 1300 mov.w r3, #2097152 ; 0x200000 - 802bb3a: 623b str r3, [r7, #32] + 802bbba: f44f 1300 mov.w r3, #2097152 ; 0x200000 + 802bbbe: 623b str r3, [r7, #32] dmaDefaultConf.SecondPacketOperate = DISABLE; - 802bb3c: 2300 movs r3, #0 - 802bb3e: 773b strb r3, [r7, #28] + 802bbc0: 2300 movs r3, #0 + 802bbc2: 773b strb r3, [r7, #28] dmaDefaultConf.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT; - 802bb40: f44f 1300 mov.w r3, #2097152 ; 0x200000 - 802bb44: 61bb str r3, [r7, #24] + 802bbc4: f44f 1300 mov.w r3, #2097152 ; 0x200000 + 802bbc8: 61bb str r3, [r7, #24] dmaDefaultConf.TCPSegmentation = DISABLE; - 802bb46: 2300 movs r3, #0 - 802bb48: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 802bbca: 2300 movs r3, #0 + 802bbcc: f887 3025 strb.w r3, [r7, #37] ; 0x25 dmaDefaultConf.MaximumSegmentSize = ETH_SEGMENT_SIZE_DEFAULT; - 802bb4c: f44f 7306 mov.w r3, #536 ; 0x218 - 802bb50: 62bb str r3, [r7, #40] ; 0x28 + 802bbd0: f44f 7306 mov.w r3, #536 ; 0x218 + 802bbd4: 62bb str r3, [r7, #40] ; 0x28 /* DMA default configuration */ ETH_SetDMAConfig(heth, &dmaDefaultConf); - 802bb52: f107 0308 add.w r3, r7, #8 - 802bb56: 4619 mov r1, r3 - 802bb58: 6878 ldr r0, [r7, #4] - 802bb5a: f7ff fee1 bl 802b920 + 802bbd6: f107 0308 add.w r3, r7, #8 + 802bbda: 4619 mov r1, r3 + 802bbdc: 6878 ldr r0, [r7, #4] + 802bbde: f7ff fee1 bl 802b9a4 } - 802bb5e: bf00 nop - 802bb60: 3790 adds r7, #144 ; 0x90 - 802bb62: 46bd mov sp, r7 - 802bb64: bd80 pop {r7, pc} + 802bbe2: bf00 nop + 802bbe4: 3790 adds r7, #144 ; 0x90 + 802bbe6: 46bd mov sp, r7 + 802bbe8: bd80 pop {r7, pc} -0802bb66 : +0802bbea : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth) { - 802bb66: b480 push {r7} - 802bb68: b085 sub sp, #20 - 802bb6a: af00 add r7, sp, #0 - 802bb6c: 6078 str r0, [r7, #4] + 802bbea: b480 push {r7} + 802bbec: b085 sub sp, #20 + 802bbee: af00 add r7, sp, #0 + 802bbf0: 6078 str r0, [r7, #4] ETH_DMADescTypeDef *dmatxdesc; uint32_t i; /* Fill each DMATxDesc descriptor with the right values */ for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++) - 802bb6e: 2300 movs r3, #0 - 802bb70: 60fb str r3, [r7, #12] - 802bb72: e01d b.n 802bbb0 + 802bbf2: 2300 movs r3, #0 + 802bbf4: 60fb str r3, [r7, #12] + 802bbf6: e01d b.n 802bc34 { dmatxdesc = heth->Init.TxDesc + i; - 802bb74: 687b ldr r3, [r7, #4] - 802bb76: 68d9 ldr r1, [r3, #12] - 802bb78: 68fa ldr r2, [r7, #12] - 802bb7a: 4613 mov r3, r2 - 802bb7c: 005b lsls r3, r3, #1 - 802bb7e: 4413 add r3, r2 - 802bb80: 00db lsls r3, r3, #3 - 802bb82: 440b add r3, r1 - 802bb84: 60bb str r3, [r7, #8] + 802bbf8: 687b ldr r3, [r7, #4] + 802bbfa: 68d9 ldr r1, [r3, #12] + 802bbfc: 68fa ldr r2, [r7, #12] + 802bbfe: 4613 mov r3, r2 + 802bc00: 005b lsls r3, r3, #1 + 802bc02: 4413 add r3, r2 + 802bc04: 00db lsls r3, r3, #3 + 802bc06: 440b add r3, r1 + 802bc08: 60bb str r3, [r7, #8] WRITE_REG(dmatxdesc->DESC0, 0x0); - 802bb86: 68bb ldr r3, [r7, #8] - 802bb88: 2200 movs r2, #0 - 802bb8a: 601a str r2, [r3, #0] + 802bc0a: 68bb ldr r3, [r7, #8] + 802bc0c: 2200 movs r2, #0 + 802bc0e: 601a str r2, [r3, #0] WRITE_REG(dmatxdesc->DESC1, 0x0); - 802bb8c: 68bb ldr r3, [r7, #8] - 802bb8e: 2200 movs r2, #0 - 802bb90: 605a str r2, [r3, #4] + 802bc10: 68bb ldr r3, [r7, #8] + 802bc12: 2200 movs r2, #0 + 802bc14: 605a str r2, [r3, #4] WRITE_REG(dmatxdesc->DESC2, 0x0); - 802bb92: 68bb ldr r3, [r7, #8] - 802bb94: 2200 movs r2, #0 - 802bb96: 609a str r2, [r3, #8] + 802bc16: 68bb ldr r3, [r7, #8] + 802bc18: 2200 movs r2, #0 + 802bc1a: 609a str r2, [r3, #8] WRITE_REG(dmatxdesc->DESC3, 0x0); - 802bb98: 68bb ldr r3, [r7, #8] - 802bb9a: 2200 movs r2, #0 - 802bb9c: 60da str r2, [r3, #12] + 802bc1c: 68bb ldr r3, [r7, #8] + 802bc1e: 2200 movs r2, #0 + 802bc20: 60da str r2, [r3, #12] WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc); - 802bb9e: 68b9 ldr r1, [r7, #8] - 802bba0: 687b ldr r3, [r7, #4] - 802bba2: 68fa ldr r2, [r7, #12] - 802bba4: 3206 adds r2, #6 - 802bba6: f843 1022 str.w r1, [r3, r2, lsl #2] + 802bc22: 68b9 ldr r1, [r7, #8] + 802bc24: 687b ldr r3, [r7, #4] + 802bc26: 68fa ldr r2, [r7, #12] + 802bc28: 3206 adds r2, #6 + 802bc2a: f843 1022 str.w r1, [r3, r2, lsl #2] for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++) - 802bbaa: 68fb ldr r3, [r7, #12] - 802bbac: 3301 adds r3, #1 - 802bbae: 60fb str r3, [r7, #12] - 802bbb0: 68fb ldr r3, [r7, #12] - 802bbb2: 2b03 cmp r3, #3 - 802bbb4: d9de bls.n 802bb74 + 802bc2e: 68fb ldr r3, [r7, #12] + 802bc30: 3301 adds r3, #1 + 802bc32: 60fb str r3, [r7, #12] + 802bc34: 68fb ldr r3, [r7, #12] + 802bc36: 2b03 cmp r3, #3 + 802bc38: d9de bls.n 802bbf8 } heth->TxDescList.CurTxDesc = 0; - 802bbb6: 687b ldr r3, [r7, #4] - 802bbb8: 2200 movs r2, #0 - 802bbba: 629a str r2, [r3, #40] ; 0x28 + 802bc3a: 687b ldr r3, [r7, #4] + 802bc3c: 2200 movs r2, #0 + 802bc3e: 629a str r2, [r3, #40] ; 0x28 /* Set Transmit Descriptor Ring Length */ WRITE_REG(heth->Instance->DMACTDRLR, (ETH_TX_DESC_CNT - 1U)); - 802bbbc: 687b ldr r3, [r7, #4] - 802bbbe: 681b ldr r3, [r3, #0] - 802bbc0: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bbc4: 461a mov r2, r3 - 802bbc6: 2303 movs r3, #3 - 802bbc8: f8c2 312c str.w r3, [r2, #300] ; 0x12c + 802bc40: 687b ldr r3, [r7, #4] + 802bc42: 681b ldr r3, [r3, #0] + 802bc44: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bc48: 461a mov r2, r3 + 802bc4a: 2303 movs r3, #3 + 802bc4c: f8c2 312c str.w r3, [r2, #300] ; 0x12c /* Set Transmit Descriptor List Address */ WRITE_REG(heth->Instance->DMACTDLAR, (uint32_t) heth->Init.TxDesc); - 802bbcc: 687b ldr r3, [r7, #4] - 802bbce: 68da ldr r2, [r3, #12] - 802bbd0: 687b ldr r3, [r7, #4] - 802bbd2: 681b ldr r3, [r3, #0] - 802bbd4: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bbd8: f8c3 2114 str.w r2, [r3, #276] ; 0x114 + 802bc50: 687b ldr r3, [r7, #4] + 802bc52: 68da ldr r2, [r3, #12] + 802bc54: 687b ldr r3, [r7, #4] + 802bc56: 681b ldr r3, [r3, #0] + 802bc58: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bc5c: f8c3 2114 str.w r2, [r3, #276] ; 0x114 /* Set Transmit Descriptor Tail pointer */ WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc); - 802bbdc: 687b ldr r3, [r7, #4] - 802bbde: 68da ldr r2, [r3, #12] - 802bbe0: 687b ldr r3, [r7, #4] - 802bbe2: 681b ldr r3, [r3, #0] - 802bbe4: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bbe8: f8c3 2120 str.w r2, [r3, #288] ; 0x120 -} - 802bbec: bf00 nop - 802bbee: 3714 adds r7, #20 - 802bbf0: 46bd mov sp, r7 - 802bbf2: f85d 7b04 ldr.w r7, [sp], #4 - 802bbf6: 4770 bx lr - -0802bbf8 : + 802bc60: 687b ldr r3, [r7, #4] + 802bc62: 68da ldr r2, [r3, #12] + 802bc64: 687b ldr r3, [r7, #4] + 802bc66: 681b ldr r3, [r3, #0] + 802bc68: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bc6c: f8c3 2120 str.w r2, [r3, #288] ; 0x120 +} + 802bc70: bf00 nop + 802bc72: 3714 adds r7, #20 + 802bc74: 46bd mov sp, r7 + 802bc76: f85d 7b04 ldr.w r7, [sp], #4 + 802bc7a: 4770 bx lr + +0802bc7c : * @param heth: pointer to a ETH_HandleTypeDef structure that contains * the configuration information for ETHERNET module * @retval None */ static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth) { - 802bbf8: b480 push {r7} - 802bbfa: b085 sub sp, #20 - 802bbfc: af00 add r7, sp, #0 - 802bbfe: 6078 str r0, [r7, #4] + 802bc7c: b480 push {r7} + 802bc7e: b085 sub sp, #20 + 802bc80: af00 add r7, sp, #0 + 802bc82: 6078 str r0, [r7, #4] ETH_DMADescTypeDef *dmarxdesc; uint32_t i; for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++) - 802bc00: 2300 movs r3, #0 - 802bc02: 60fb str r3, [r7, #12] - 802bc04: e023 b.n 802bc4e + 802bc84: 2300 movs r3, #0 + 802bc86: 60fb str r3, [r7, #12] + 802bc88: e023 b.n 802bcd2 { dmarxdesc = heth->Init.RxDesc + i; - 802bc06: 687b ldr r3, [r7, #4] - 802bc08: 6919 ldr r1, [r3, #16] - 802bc0a: 68fa ldr r2, [r7, #12] - 802bc0c: 4613 mov r3, r2 - 802bc0e: 005b lsls r3, r3, #1 - 802bc10: 4413 add r3, r2 - 802bc12: 00db lsls r3, r3, #3 - 802bc14: 440b add r3, r1 - 802bc16: 60bb str r3, [r7, #8] + 802bc8a: 687b ldr r3, [r7, #4] + 802bc8c: 6919 ldr r1, [r3, #16] + 802bc8e: 68fa ldr r2, [r7, #12] + 802bc90: 4613 mov r3, r2 + 802bc92: 005b lsls r3, r3, #1 + 802bc94: 4413 add r3, r2 + 802bc96: 00db lsls r3, r3, #3 + 802bc98: 440b add r3, r1 + 802bc9a: 60bb str r3, [r7, #8] WRITE_REG(dmarxdesc->DESC0, 0x0); - 802bc18: 68bb ldr r3, [r7, #8] - 802bc1a: 2200 movs r2, #0 - 802bc1c: 601a str r2, [r3, #0] + 802bc9c: 68bb ldr r3, [r7, #8] + 802bc9e: 2200 movs r2, #0 + 802bca0: 601a str r2, [r3, #0] WRITE_REG(dmarxdesc->DESC1, 0x0); - 802bc1e: 68bb ldr r3, [r7, #8] - 802bc20: 2200 movs r2, #0 - 802bc22: 605a str r2, [r3, #4] + 802bca2: 68bb ldr r3, [r7, #8] + 802bca4: 2200 movs r2, #0 + 802bca6: 605a str r2, [r3, #4] WRITE_REG(dmarxdesc->DESC2, 0x0); - 802bc24: 68bb ldr r3, [r7, #8] - 802bc26: 2200 movs r2, #0 - 802bc28: 609a str r2, [r3, #8] + 802bca8: 68bb ldr r3, [r7, #8] + 802bcaa: 2200 movs r2, #0 + 802bcac: 609a str r2, [r3, #8] WRITE_REG(dmarxdesc->DESC3, 0x0); - 802bc2a: 68bb ldr r3, [r7, #8] - 802bc2c: 2200 movs r2, #0 - 802bc2e: 60da str r2, [r3, #12] + 802bcae: 68bb ldr r3, [r7, #8] + 802bcb0: 2200 movs r2, #0 + 802bcb2: 60da str r2, [r3, #12] WRITE_REG(dmarxdesc->BackupAddr0, 0x0); - 802bc30: 68bb ldr r3, [r7, #8] - 802bc32: 2200 movs r2, #0 - 802bc34: 611a str r2, [r3, #16] + 802bcb4: 68bb ldr r3, [r7, #8] + 802bcb6: 2200 movs r2, #0 + 802bcb8: 611a str r2, [r3, #16] WRITE_REG(dmarxdesc->BackupAddr1, 0x0); - 802bc36: 68bb ldr r3, [r7, #8] - 802bc38: 2200 movs r2, #0 - 802bc3a: 615a str r2, [r3, #20] + 802bcba: 68bb ldr r3, [r7, #8] + 802bcbc: 2200 movs r2, #0 + 802bcbe: 615a str r2, [r3, #20] /* Set Rx descritors addresses */ WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc); - 802bc3c: 68b9 ldr r1, [r7, #8] - 802bc3e: 687b ldr r3, [r7, #4] - 802bc40: 68fa ldr r2, [r7, #12] - 802bc42: 3212 adds r2, #18 - 802bc44: f843 1022 str.w r1, [r3, r2, lsl #2] + 802bcc0: 68b9 ldr r1, [r7, #8] + 802bcc2: 687b ldr r3, [r7, #4] + 802bcc4: 68fa ldr r2, [r7, #12] + 802bcc6: 3212 adds r2, #18 + 802bcc8: f843 1022 str.w r1, [r3, r2, lsl #2] for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++) - 802bc48: 68fb ldr r3, [r7, #12] - 802bc4a: 3301 adds r3, #1 - 802bc4c: 60fb str r3, [r7, #12] - 802bc4e: 68fb ldr r3, [r7, #12] - 802bc50: 2b03 cmp r3, #3 - 802bc52: d9d8 bls.n 802bc06 + 802bccc: 68fb ldr r3, [r7, #12] + 802bcce: 3301 adds r3, #1 + 802bcd0: 60fb str r3, [r7, #12] + 802bcd2: 68fb ldr r3, [r7, #12] + 802bcd4: 2b03 cmp r3, #3 + 802bcd6: d9d8 bls.n 802bc8a } WRITE_REG(heth->RxDescList.RxDescIdx, 0); - 802bc54: 687b ldr r3, [r7, #4] - 802bc56: 2200 movs r2, #0 - 802bc58: 65da str r2, [r3, #92] ; 0x5c + 802bcd8: 687b ldr r3, [r7, #4] + 802bcda: 2200 movs r2, #0 + 802bcdc: 65da str r2, [r3, #92] ; 0x5c WRITE_REG(heth->RxDescList.RxDescCnt, 0); - 802bc5a: 687b ldr r3, [r7, #4] - 802bc5c: 2200 movs r2, #0 - 802bc5e: 661a str r2, [r3, #96] ; 0x60 + 802bcde: 687b ldr r3, [r7, #4] + 802bce0: 2200 movs r2, #0 + 802bce2: 661a str r2, [r3, #96] ; 0x60 WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0); - 802bc60: 687b ldr r3, [r7, #4] - 802bc62: 2200 movs r2, #0 - 802bc64: 669a str r2, [r3, #104] ; 0x68 + 802bce4: 687b ldr r3, [r7, #4] + 802bce6: 2200 movs r2, #0 + 802bce8: 669a str r2, [r3, #104] ; 0x68 WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0); - 802bc66: 687b ldr r3, [r7, #4] - 802bc68: 2200 movs r2, #0 - 802bc6a: 66da str r2, [r3, #108] ; 0x6c + 802bcea: 687b ldr r3, [r7, #4] + 802bcec: 2200 movs r2, #0 + 802bcee: 66da str r2, [r3, #108] ; 0x6c WRITE_REG(heth->RxDescList.ItMode, 0); - 802bc6c: 687b ldr r3, [r7, #4] - 802bc6e: 2200 movs r2, #0 - 802bc70: 659a str r2, [r3, #88] ; 0x58 + 802bcf0: 687b ldr r3, [r7, #4] + 802bcf2: 2200 movs r2, #0 + 802bcf4: 659a str r2, [r3, #88] ; 0x58 /* Set Receive Descriptor Ring Length */ WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U))); - 802bc72: 687b ldr r3, [r7, #4] - 802bc74: 681b ldr r3, [r3, #0] - 802bc76: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bc7a: 461a mov r2, r3 - 802bc7c: 2303 movs r3, #3 - 802bc7e: f8c2 3130 str.w r3, [r2, #304] ; 0x130 + 802bcf6: 687b ldr r3, [r7, #4] + 802bcf8: 681b ldr r3, [r3, #0] + 802bcfa: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bcfe: 461a mov r2, r3 + 802bd00: 2303 movs r3, #3 + 802bd02: f8c2 3130 str.w r3, [r2, #304] ; 0x130 /* Set Receive Descriptor List Address */ WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc); - 802bc82: 687b ldr r3, [r7, #4] - 802bc84: 691a ldr r2, [r3, #16] - 802bc86: 687b ldr r3, [r7, #4] - 802bc88: 681b ldr r3, [r3, #0] - 802bc8a: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bc8e: f8c3 211c str.w r2, [r3, #284] ; 0x11c + 802bd06: 687b ldr r3, [r7, #4] + 802bd08: 691a ldr r2, [r3, #16] + 802bd0a: 687b ldr r3, [r7, #4] + 802bd0c: 681b ldr r3, [r3, #0] + 802bd0e: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bd12: f8c3 211c str.w r2, [r3, #284] ; 0x11c /* Set Receive Descriptor Tail pointer Address */ WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (uint32_t)(ETH_RX_DESC_CNT - 1U)))); - 802bc92: 687b ldr r3, [r7, #4] - 802bc94: 691b ldr r3, [r3, #16] - 802bc96: f103 0248 add.w r2, r3, #72 ; 0x48 - 802bc9a: 687b ldr r3, [r7, #4] - 802bc9c: 681b ldr r3, [r3, #0] - 802bc9e: f503 5380 add.w r3, r3, #4096 ; 0x1000 - 802bca2: f8c3 2128 str.w r2, [r3, #296] ; 0x128 -} - 802bca6: bf00 nop - 802bca8: 3714 adds r7, #20 - 802bcaa: 46bd mov sp, r7 - 802bcac: f85d 7b04 ldr.w r7, [sp], #4 - 802bcb0: 4770 bx lr + 802bd16: 687b ldr r3, [r7, #4] + 802bd18: 691b ldr r3, [r3, #16] + 802bd1a: f103 0248 add.w r2, r3, #72 ; 0x48 + 802bd1e: 687b ldr r3, [r7, #4] + 802bd20: 681b ldr r3, [r3, #0] + 802bd22: f503 5380 add.w r3, r3, #4096 ; 0x1000 + 802bd26: f8c3 2128 str.w r2, [r3, #296] ; 0x128 +} + 802bd2a: bf00 nop + 802bd2c: 3714 adds r7, #20 + 802bd2e: 46bd mov sp, r7 + 802bd30: f85d 7b04 ldr.w r7, [sp], #4 + 802bd34: 4770 bx lr ... -0802bcb4 : +0802bd38 : * @param pTxConfig: Tx packet configuration * @param ItMode: Enable or disable Tx EOT interrept * @retval Status */ static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, ETH_TxPacketConfig *pTxConfig, uint32_t ItMode) { - 802bcb4: b480 push {r7} - 802bcb6: b08d sub sp, #52 ; 0x34 - 802bcb8: af00 add r7, sp, #0 - 802bcba: 60f8 str r0, [r7, #12] - 802bcbc: 60b9 str r1, [r7, #8] - 802bcbe: 607a str r2, [r7, #4] + 802bd38: b480 push {r7} + 802bd3a: b08d sub sp, #52 ; 0x34 + 802bd3c: af00 add r7, sp, #0 + 802bd3e: 60f8 str r0, [r7, #12] + 802bd40: 60b9 str r1, [r7, #8] + 802bd42: 607a str r2, [r7, #4] ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList; - 802bcc0: 68fb ldr r3, [r7, #12] - 802bcc2: 3318 adds r3, #24 - 802bcc4: 617b str r3, [r7, #20] + 802bd44: 68fb ldr r3, [r7, #12] + 802bd46: 3318 adds r3, #24 + 802bd48: 617b str r3, [r7, #20] uint32_t descidx = dmatxdesclist->CurTxDesc; - 802bcc6: 697b ldr r3, [r7, #20] - 802bcc8: 691b ldr r3, [r3, #16] - 802bcca: 62fb str r3, [r7, #44] ; 0x2c + 802bd4a: 697b ldr r3, [r7, #20] + 802bd4c: 691b ldr r3, [r3, #16] + 802bd4e: 62fb str r3, [r7, #44] ; 0x2c uint32_t firstdescidx = dmatxdesclist->CurTxDesc; - 802bccc: 697b ldr r3, [r7, #20] - 802bcce: 691b ldr r3, [r3, #16] - 802bcd0: 613b str r3, [r7, #16] + 802bd50: 697b ldr r3, [r7, #20] + 802bd52: 691b ldr r3, [r3, #16] + 802bd54: 613b str r3, [r7, #16] uint32_t idx; uint32_t descnbr = 0; - 802bcd2: 2300 movs r3, #0 - 802bcd4: 627b str r3, [r7, #36] ; 0x24 + 802bd56: 2300 movs r3, #0 + 802bd58: 627b str r3, [r7, #36] ; 0x24 ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802bcd6: 697b ldr r3, [r7, #20] - 802bcd8: 6afa ldr r2, [r7, #44] ; 0x2c - 802bcda: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802bcde: 623b str r3, [r7, #32] + 802bd5a: 697b ldr r3, [r7, #20] + 802bd5c: 6afa ldr r2, [r7, #44] ; 0x2c + 802bd5e: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802bd62: 623b str r3, [r7, #32] ETH_BufferTypeDef *txbuffer = pTxConfig->TxBuffer; - 802bce0: 68bb ldr r3, [r7, #8] - 802bce2: 689b ldr r3, [r3, #8] - 802bce4: 61fb str r3, [r7, #28] + 802bd64: 68bb ldr r3, [r7, #8] + 802bd66: 689b ldr r3, [r3, #8] + 802bd68: 61fb str r3, [r7, #28] uint32_t bd_count = 0; - 802bce6: 2300 movs r3, #0 - 802bce8: 61bb str r3, [r7, #24] + 802bd6a: 2300 movs r3, #0 + 802bd6c: 61bb str r3, [r7, #24] /* Current Tx Descriptor Owned by DMA: cannot be used by the application */ if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) - 802bcea: 6a3b ldr r3, [r7, #32] - 802bcec: 68db ldr r3, [r3, #12] - 802bcee: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 - 802bcf2: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802bcf6: d007 beq.n 802bd08 + 802bd6e: 6a3b ldr r3, [r7, #32] + 802bd70: 68db ldr r3, [r3, #12] + 802bd72: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 + 802bd76: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802bd7a: d007 beq.n 802bd8c || (dmatxdesclist->PacketAddress[descidx] != NULL)) - 802bcf8: 697a ldr r2, [r7, #20] - 802bcfa: 6afb ldr r3, [r7, #44] ; 0x2c - 802bcfc: 3304 adds r3, #4 - 802bcfe: 009b lsls r3, r3, #2 - 802bd00: 4413 add r3, r2 - 802bd02: 685b ldr r3, [r3, #4] - 802bd04: 2b00 cmp r3, #0 - 802bd06: d001 beq.n 802bd0c + 802bd7c: 697a ldr r2, [r7, #20] + 802bd7e: 6afb ldr r3, [r7, #44] ; 0x2c + 802bd80: 3304 adds r3, #4 + 802bd82: 009b lsls r3, r3, #2 + 802bd84: 4413 add r3, r2 + 802bd86: 685b ldr r3, [r3, #4] + 802bd88: 2b00 cmp r3, #0 + 802bd8a: d001 beq.n 802bd90 { return HAL_ETH_ERROR_BUSY; - 802bd08: 2302 movs r3, #2 - 802bd0a: e259 b.n 802c1c0 + 802bd8c: 2302 movs r3, #2 + 802bd8e: e259 b.n 802c244 /***************************************************************************/ /***************** Context descriptor configuration (Optional) **********/ /***************************************************************************/ /* If VLAN tag is enabled for this packet */ if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET) - 802bd0c: 68bb ldr r3, [r7, #8] - 802bd0e: 681b ldr r3, [r3, #0] - 802bd10: f003 0304 and.w r3, r3, #4 - 802bd14: 2b00 cmp r3, #0 - 802bd16: d044 beq.n 802bda2 + 802bd90: 68bb ldr r3, [r7, #8] + 802bd92: 681b ldr r3, [r3, #0] + 802bd94: f003 0304 and.w r3, r3, #4 + 802bd98: 2b00 cmp r3, #0 + 802bd9a: d044 beq.n 802be26 { /* Set vlan tag value */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag); - 802bd18: 6a3b ldr r3, [r7, #32] - 802bd1a: 68da ldr r2, [r3, #12] - 802bd1c: 4b75 ldr r3, [pc, #468] ; (802bef4 ) - 802bd1e: 4013 ands r3, r2 - 802bd20: 68ba ldr r2, [r7, #8] - 802bd22: 6a52 ldr r2, [r2, #36] ; 0x24 - 802bd24: 431a orrs r2, r3 - 802bd26: 6a3b ldr r3, [r7, #32] - 802bd28: 60da str r2, [r3, #12] + 802bd9c: 6a3b ldr r3, [r7, #32] + 802bd9e: 68da ldr r2, [r3, #12] + 802bda0: 4b75 ldr r3, [pc, #468] ; (802bf78 ) + 802bda2: 4013 ands r3, r2 + 802bda4: 68ba ldr r2, [r7, #8] + 802bda6: 6a52 ldr r2, [r2, #36] ; 0x24 + 802bda8: 431a orrs r2, r3 + 802bdaa: 6a3b ldr r3, [r7, #32] + 802bdac: 60da str r2, [r3, #12] /* Set vlan tag valid bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV); - 802bd2a: 6a3b ldr r3, [r7, #32] - 802bd2c: 68db ldr r3, [r3, #12] - 802bd2e: f443 3280 orr.w r2, r3, #65536 ; 0x10000 - 802bd32: 6a3b ldr r3, [r7, #32] - 802bd34: 60da str r2, [r3, #12] + 802bdae: 6a3b ldr r3, [r7, #32] + 802bdb0: 68db ldr r3, [r3, #12] + 802bdb2: f443 3280 orr.w r2, r3, #65536 ; 0x10000 + 802bdb6: 6a3b ldr r3, [r7, #32] + 802bdb8: 60da str r2, [r3, #12] /* Set the descriptor as the vlan input source */ SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI); - 802bd36: 68fb ldr r3, [r7, #12] - 802bd38: 681b ldr r3, [r3, #0] - 802bd3a: 6e1a ldr r2, [r3, #96] ; 0x60 - 802bd3c: 68fb ldr r3, [r7, #12] - 802bd3e: 681b ldr r3, [r3, #0] - 802bd40: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 - 802bd44: 661a str r2, [r3, #96] ; 0x60 + 802bdba: 68fb ldr r3, [r7, #12] + 802bdbc: 681b ldr r3, [r3, #0] + 802bdbe: 6e1a ldr r2, [r3, #96] ; 0x60 + 802bdc0: 68fb ldr r3, [r7, #12] + 802bdc2: 681b ldr r3, [r3, #0] + 802bdc4: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 + 802bdc8: 661a str r2, [r3, #96] ; 0x60 /* if inner VLAN is enabled */ if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_INNERVLANTAG) != (uint32_t)RESET) - 802bd46: 68bb ldr r3, [r7, #8] - 802bd48: 681b ldr r3, [r3, #0] - 802bd4a: f003 0308 and.w r3, r3, #8 - 802bd4e: 2b00 cmp r3, #0 - 802bd50: d027 beq.n 802bda2 + 802bdca: 68bb ldr r3, [r7, #8] + 802bdcc: 681b ldr r3, [r3, #0] + 802bdce: f003 0308 and.w r3, r3, #8 + 802bdd2: 2b00 cmp r3, #0 + 802bdd4: d027 beq.n 802be26 { /* Set inner vlan tag value */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16)); - 802bd52: 6a3b ldr r3, [r7, #32] - 802bd54: 689b ldr r3, [r3, #8] - 802bd56: b29a uxth r2, r3 - 802bd58: 68bb ldr r3, [r7, #8] - 802bd5a: 6adb ldr r3, [r3, #44] ; 0x2c - 802bd5c: 041b lsls r3, r3, #16 - 802bd5e: 431a orrs r2, r3 - 802bd60: 6a3b ldr r3, [r7, #32] - 802bd62: 609a str r2, [r3, #8] + 802bdd6: 6a3b ldr r3, [r7, #32] + 802bdd8: 689b ldr r3, [r3, #8] + 802bdda: b29a uxth r2, r3 + 802bddc: 68bb ldr r3, [r7, #8] + 802bdde: 6adb ldr r3, [r3, #44] ; 0x2c + 802bde0: 041b lsls r3, r3, #16 + 802bde2: 431a orrs r2, r3 + 802bde4: 6a3b ldr r3, [r7, #32] + 802bde6: 609a str r2, [r3, #8] /* Set inner vlan tag valid bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV); - 802bd64: 6a3b ldr r3, [r7, #32] - 802bd66: 68db ldr r3, [r3, #12] - 802bd68: f443 3200 orr.w r2, r3, #131072 ; 0x20000 - 802bd6c: 6a3b ldr r3, [r7, #32] - 802bd6e: 60da str r2, [r3, #12] + 802bde8: 6a3b ldr r3, [r7, #32] + 802bdea: 68db ldr r3, [r3, #12] + 802bdec: f443 3200 orr.w r2, r3, #131072 ; 0x20000 + 802bdf0: 6a3b ldr r3, [r7, #32] + 802bdf2: 60da str r2, [r3, #12] /* Set Vlan Tag control */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl); - 802bd70: 6a3b ldr r3, [r7, #32] - 802bd72: 68db ldr r3, [r3, #12] - 802bd74: f423 2240 bic.w r2, r3, #786432 ; 0xc0000 - 802bd78: 68bb ldr r3, [r7, #8] - 802bd7a: 6b1b ldr r3, [r3, #48] ; 0x30 - 802bd7c: 431a orrs r2, r3 - 802bd7e: 6a3b ldr r3, [r7, #32] - 802bd80: 60da str r2, [r3, #12] + 802bdf4: 6a3b ldr r3, [r7, #32] + 802bdf6: 68db ldr r3, [r3, #12] + 802bdf8: f423 2240 bic.w r2, r3, #786432 ; 0xc0000 + 802bdfc: 68bb ldr r3, [r7, #8] + 802bdfe: 6b1b ldr r3, [r3, #48] ; 0x30 + 802be00: 431a orrs r2, r3 + 802be02: 6a3b ldr r3, [r7, #32] + 802be04: 60da str r2, [r3, #12] /* Set the descriptor as the inner vlan input source */ SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI); - 802bd82: 68fb ldr r3, [r7, #12] - 802bd84: 681b ldr r3, [r3, #0] - 802bd86: 6e5a ldr r2, [r3, #100] ; 0x64 - 802bd88: 68fb ldr r3, [r7, #12] - 802bd8a: 681b ldr r3, [r3, #0] - 802bd8c: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 - 802bd90: 665a str r2, [r3, #100] ; 0x64 + 802be06: 68fb ldr r3, [r7, #12] + 802be08: 681b ldr r3, [r3, #0] + 802be0a: 6e5a ldr r2, [r3, #100] ; 0x64 + 802be0c: 68fb ldr r3, [r7, #12] + 802be0e: 681b ldr r3, [r3, #0] + 802be10: f442 1280 orr.w r2, r2, #1048576 ; 0x100000 + 802be14: 665a str r2, [r3, #100] ; 0x64 /* Enable double VLAN processing */ SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP); - 802bd92: 68fb ldr r3, [r7, #12] - 802bd94: 681b ldr r3, [r3, #0] - 802bd96: 6d1a ldr r2, [r3, #80] ; 0x50 - 802bd98: 68fb ldr r3, [r7, #12] - 802bd9a: 681b ldr r3, [r3, #0] - 802bd9c: f042 6280 orr.w r2, r2, #67108864 ; 0x4000000 - 802bda0: 651a str r2, [r3, #80] ; 0x50 + 802be16: 68fb ldr r3, [r7, #12] + 802be18: 681b ldr r3, [r3, #0] + 802be1a: 6d1a ldr r2, [r3, #80] ; 0x50 + 802be1c: 68fb ldr r3, [r7, #12] + 802be1e: 681b ldr r3, [r3, #0] + 802be20: f042 6280 orr.w r2, r2, #67108864 ; 0x4000000 + 802be24: 651a str r2, [r3, #80] ; 0x50 } } /* if tcp segmentation is enabled for this packet */ if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET) - 802bda2: 68bb ldr r3, [r7, #8] - 802bda4: 681b ldr r3, [r3, #0] - 802bda6: f003 0310 and.w r3, r3, #16 - 802bdaa: 2b00 cmp r3, #0 - 802bdac: d00e beq.n 802bdcc + 802be26: 68bb ldr r3, [r7, #8] + 802be28: 681b ldr r3, [r3, #0] + 802be2a: f003 0310 and.w r3, r3, #16 + 802be2e: 2b00 cmp r3, #0 + 802be30: d00e beq.n 802be50 { /* Set MSS value */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize); - 802bdae: 6a3b ldr r3, [r7, #32] - 802bdb0: 689a ldr r2, [r3, #8] - 802bdb2: 4b51 ldr r3, [pc, #324] ; (802bef8 ) - 802bdb4: 4013 ands r3, r2 - 802bdb6: 68ba ldr r2, [r7, #8] - 802bdb8: 6992 ldr r2, [r2, #24] - 802bdba: 431a orrs r2, r3 - 802bdbc: 6a3b ldr r3, [r7, #32] - 802bdbe: 609a str r2, [r3, #8] + 802be32: 6a3b ldr r3, [r7, #32] + 802be34: 689a ldr r2, [r3, #8] + 802be36: 4b51 ldr r3, [pc, #324] ; (802bf7c ) + 802be38: 4013 ands r3, r2 + 802be3a: 68ba ldr r2, [r7, #8] + 802be3c: 6992 ldr r2, [r2, #24] + 802be3e: 431a orrs r2, r3 + 802be40: 6a3b ldr r3, [r7, #32] + 802be42: 609a str r2, [r3, #8] /* Set MSS valid bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV); - 802bdc0: 6a3b ldr r3, [r7, #32] - 802bdc2: 68db ldr r3, [r3, #12] - 802bdc4: f043 6280 orr.w r2, r3, #67108864 ; 0x4000000 - 802bdc8: 6a3b ldr r3, [r7, #32] - 802bdca: 60da str r2, [r3, #12] + 802be44: 6a3b ldr r3, [r7, #32] + 802be46: 68db ldr r3, [r3, #12] + 802be48: f043 6280 orr.w r2, r3, #67108864 ; 0x4000000 + 802be4c: 6a3b ldr r3, [r7, #32] + 802be4e: 60da str r2, [r3, #12] } if ((READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET) - 802bdcc: 68bb ldr r3, [r7, #8] - 802bdce: 681b ldr r3, [r3, #0] - 802bdd0: f003 0304 and.w r3, r3, #4 - 802bdd4: 2b00 cmp r3, #0 - 802bdd6: d105 bne.n 802bde4 + 802be50: 68bb ldr r3, [r7, #8] + 802be52: 681b ldr r3, [r3, #0] + 802be54: f003 0304 and.w r3, r3, #4 + 802be58: 2b00 cmp r3, #0 + 802be5a: d105 bne.n 802be68 || (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)) - 802bdd8: 68bb ldr r3, [r7, #8] - 802bdda: 681b ldr r3, [r3, #0] - 802bddc: f003 0310 and.w r3, r3, #16 - 802bde0: 2b00 cmp r3, #0 - 802bde2: d036 beq.n 802be52 + 802be5c: 68bb ldr r3, [r7, #8] + 802be5e: 681b ldr r3, [r3, #0] + 802be60: f003 0310 and.w r3, r3, #16 + 802be64: 2b00 cmp r3, #0 + 802be66: d036 beq.n 802bed6 { /* Set as context descriptor */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT); - 802bde4: 6a3b ldr r3, [r7, #32] - 802bde6: 68db ldr r3, [r3, #12] - 802bde8: f043 4280 orr.w r2, r3, #1073741824 ; 0x40000000 - 802bdec: 6a3b ldr r3, [r7, #32] - 802bdee: 60da str r2, [r3, #12] + 802be68: 6a3b ldr r3, [r7, #32] + 802be6a: 68db ldr r3, [r3, #12] + 802be6c: f043 4280 orr.w r2, r3, #1073741824 ; 0x40000000 + 802be70: 6a3b ldr r3, [r7, #32] + 802be72: 60da str r2, [r3, #12] __ASM volatile ("dmb 0xF":::"memory"); - 802bdf0: f3bf 8f5f dmb sy + 802be74: f3bf 8f5f dmb sy } - 802bdf4: bf00 nop + 802be78: bf00 nop /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); /* Set own bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); - 802bdf6: 6a3b ldr r3, [r7, #32] - 802bdf8: 68db ldr r3, [r3, #12] - 802bdfa: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 - 802bdfe: 6a3b ldr r3, [r7, #32] - 802be00: 60da str r2, [r3, #12] + 802be7a: 6a3b ldr r3, [r7, #32] + 802be7c: 68db ldr r3, [r3, #12] + 802be7e: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 + 802be82: 6a3b ldr r3, [r7, #32] + 802be84: 60da str r2, [r3, #12] /* Increment current tx descriptor index */ INCR_TX_DESC_INDEX(descidx, 1U); - 802be02: 6afb ldr r3, [r7, #44] ; 0x2c - 802be04: 3301 adds r3, #1 - 802be06: 62fb str r3, [r7, #44] ; 0x2c - 802be08: 6afb ldr r3, [r7, #44] ; 0x2c - 802be0a: 2b03 cmp r3, #3 - 802be0c: d902 bls.n 802be14 - 802be0e: 6afb ldr r3, [r7, #44] ; 0x2c - 802be10: 3b04 subs r3, #4 - 802be12: 62fb str r3, [r7, #44] ; 0x2c + 802be86: 6afb ldr r3, [r7, #44] ; 0x2c + 802be88: 3301 adds r3, #1 + 802be8a: 62fb str r3, [r7, #44] ; 0x2c + 802be8c: 6afb ldr r3, [r7, #44] ; 0x2c + 802be8e: 2b03 cmp r3, #3 + 802be90: d902 bls.n 802be98 + 802be92: 6afb ldr r3, [r7, #44] ; 0x2c + 802be94: 3b04 subs r3, #4 + 802be96: 62fb str r3, [r7, #44] ; 0x2c /* Get current descriptor address */ dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802be14: 697b ldr r3, [r7, #20] - 802be16: 6afa ldr r2, [r7, #44] ; 0x2c - 802be18: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802be1c: 623b str r3, [r7, #32] + 802be98: 697b ldr r3, [r7, #20] + 802be9a: 6afa ldr r2, [r7, #44] ; 0x2c + 802be9c: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802bea0: 623b str r3, [r7, #32] descnbr += 1U; - 802be1e: 6a7b ldr r3, [r7, #36] ; 0x24 - 802be20: 3301 adds r3, #1 - 802be22: 627b str r3, [r7, #36] ; 0x24 + 802bea2: 6a7b ldr r3, [r7, #36] ; 0x24 + 802bea4: 3301 adds r3, #1 + 802bea6: 627b str r3, [r7, #36] ; 0x24 /* Current Tx Descriptor Owned by DMA: cannot be used by the application */ if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN) - 802be24: 6a3b ldr r3, [r7, #32] - 802be26: 68db ldr r3, [r3, #12] - 802be28: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 - 802be2c: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802be30: d10f bne.n 802be52 + 802bea8: 6a3b ldr r3, [r7, #32] + 802beaa: 68db ldr r3, [r3, #12] + 802beac: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 + 802beb0: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802beb4: d10f bne.n 802bed6 { dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[firstdescidx]; - 802be32: 697b ldr r3, [r7, #20] - 802be34: 693a ldr r2, [r7, #16] - 802be36: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802be3a: 623b str r3, [r7, #32] + 802beb6: 697b ldr r3, [r7, #20] + 802beb8: 693a ldr r2, [r7, #16] + 802beba: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802bebe: 623b str r3, [r7, #32] __ASM volatile ("dmb 0xF":::"memory"); - 802be3c: f3bf 8f5f dmb sy + 802bec0: f3bf 8f5f dmb sy } - 802be40: bf00 nop + 802bec4: bf00 nop /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); /* Clear own bit */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN); - 802be42: 6a3b ldr r3, [r7, #32] - 802be44: 68db ldr r3, [r3, #12] - 802be46: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 802be4a: 6a3b ldr r3, [r7, #32] - 802be4c: 60da str r2, [r3, #12] + 802bec6: 6a3b ldr r3, [r7, #32] + 802bec8: 68db ldr r3, [r3, #12] + 802beca: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 802bece: 6a3b ldr r3, [r7, #32] + 802bed0: 60da str r2, [r3, #12] return HAL_ETH_ERROR_BUSY; - 802be4e: 2302 movs r3, #2 - 802be50: e1b6 b.n 802c1c0 + 802bed2: 2302 movs r3, #2 + 802bed4: e1b6 b.n 802c244 /***************************************************************************/ /***************** Normal descriptors configuration *****************/ /***************************************************************************/ descnbr += 1U; - 802be52: 6a7b ldr r3, [r7, #36] ; 0x24 - 802be54: 3301 adds r3, #1 - 802be56: 627b str r3, [r7, #36] ; 0x24 + 802bed6: 6a7b ldr r3, [r7, #36] ; 0x24 + 802bed8: 3301 adds r3, #1 + 802beda: 627b str r3, [r7, #36] ; 0x24 /* Set header or buffer 1 address */ WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); - 802be58: 69fb ldr r3, [r7, #28] - 802be5a: 681b ldr r3, [r3, #0] - 802be5c: 461a mov r2, r3 - 802be5e: 6a3b ldr r3, [r7, #32] - 802be60: 601a str r2, [r3, #0] + 802bedc: 69fb ldr r3, [r7, #28] + 802bede: 681b ldr r3, [r3, #0] + 802bee0: 461a mov r2, r3 + 802bee2: 6a3b ldr r3, [r7, #32] + 802bee4: 601a str r2, [r3, #0] /* Set header or buffer 1 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); - 802be62: 6a3b ldr r3, [r7, #32] - 802be64: 689a ldr r2, [r3, #8] - 802be66: 4b24 ldr r3, [pc, #144] ; (802bef8 ) - 802be68: 4013 ands r3, r2 - 802be6a: 69fa ldr r2, [r7, #28] - 802be6c: 6852 ldr r2, [r2, #4] - 802be6e: 431a orrs r2, r3 - 802be70: 6a3b ldr r3, [r7, #32] - 802be72: 609a str r2, [r3, #8] + 802bee6: 6a3b ldr r3, [r7, #32] + 802bee8: 689a ldr r2, [r3, #8] + 802beea: 4b24 ldr r3, [pc, #144] ; (802bf7c ) + 802beec: 4013 ands r3, r2 + 802beee: 69fa ldr r2, [r7, #28] + 802bef0: 6852 ldr r2, [r2, #4] + 802bef2: 431a orrs r2, r3 + 802bef4: 6a3b ldr r3, [r7, #32] + 802bef6: 609a str r2, [r3, #8] if (txbuffer->next != NULL) - 802be74: 69fb ldr r3, [r7, #28] - 802be76: 689b ldr r3, [r3, #8] - 802be78: 2b00 cmp r3, #0 - 802be7a: d012 beq.n 802bea2 + 802bef8: 69fb ldr r3, [r7, #28] + 802befa: 689b ldr r3, [r3, #8] + 802befc: 2b00 cmp r3, #0 + 802befe: d012 beq.n 802bf26 { txbuffer = txbuffer->next; - 802be7c: 69fb ldr r3, [r7, #28] - 802be7e: 689b ldr r3, [r3, #8] - 802be80: 61fb str r3, [r7, #28] + 802bf00: 69fb ldr r3, [r7, #28] + 802bf02: 689b ldr r3, [r3, #8] + 802bf04: 61fb str r3, [r7, #28] /* Set buffer 2 address */ WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer); - 802be82: 69fb ldr r3, [r7, #28] - 802be84: 681b ldr r3, [r3, #0] - 802be86: 461a mov r2, r3 - 802be88: 6a3b ldr r3, [r7, #32] - 802be8a: 605a str r2, [r3, #4] + 802bf06: 69fb ldr r3, [r7, #28] + 802bf08: 681b ldr r3, [r3, #0] + 802bf0a: 461a mov r2, r3 + 802bf0c: 6a3b ldr r3, [r7, #32] + 802bf0e: 605a str r2, [r3, #4] /* Set buffer 2 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); - 802be8c: 6a3b ldr r3, [r7, #32] - 802be8e: 689a ldr r2, [r3, #8] - 802be90: 4b1a ldr r3, [pc, #104] ; (802befc ) - 802be92: 4013 ands r3, r2 - 802be94: 69fa ldr r2, [r7, #28] - 802be96: 6852 ldr r2, [r2, #4] - 802be98: 0412 lsls r2, r2, #16 - 802be9a: 431a orrs r2, r3 - 802be9c: 6a3b ldr r3, [r7, #32] - 802be9e: 609a str r2, [r3, #8] - 802bea0: e008 b.n 802beb4 + 802bf10: 6a3b ldr r3, [r7, #32] + 802bf12: 689a ldr r2, [r3, #8] + 802bf14: 4b1a ldr r3, [pc, #104] ; (802bf80 ) + 802bf16: 4013 ands r3, r2 + 802bf18: 69fa ldr r2, [r7, #28] + 802bf1a: 6852 ldr r2, [r2, #4] + 802bf1c: 0412 lsls r2, r2, #16 + 802bf1e: 431a orrs r2, r3 + 802bf20: 6a3b ldr r3, [r7, #32] + 802bf22: 609a str r2, [r3, #8] + 802bf24: e008 b.n 802bf38 } else { WRITE_REG(dmatxdesc->DESC1, 0x0); - 802bea2: 6a3b ldr r3, [r7, #32] - 802bea4: 2200 movs r2, #0 - 802bea6: 605a str r2, [r3, #4] + 802bf26: 6a3b ldr r3, [r7, #32] + 802bf28: 2200 movs r2, #0 + 802bf2a: 605a str r2, [r3, #4] /* Set buffer 2 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); - 802bea8: 6a3b ldr r3, [r7, #32] - 802beaa: 689a ldr r2, [r3, #8] - 802beac: 4b13 ldr r3, [pc, #76] ; (802befc ) - 802beae: 4013 ands r3, r2 - 802beb0: 6a3a ldr r2, [r7, #32] - 802beb2: 6093 str r3, [r2, #8] + 802bf2c: 6a3b ldr r3, [r7, #32] + 802bf2e: 689a ldr r2, [r3, #8] + 802bf30: 4b13 ldr r3, [pc, #76] ; (802bf80 ) + 802bf32: 4013 ands r3, r2 + 802bf34: 6a3a ldr r2, [r7, #32] + 802bf36: 6093 str r3, [r2, #8] } if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET) - 802beb4: 68bb ldr r3, [r7, #8] - 802beb6: 681b ldr r3, [r3, #0] - 802beb8: f003 0310 and.w r3, r3, #16 - 802bebc: 2b00 cmp r3, #0 - 802bebe: d021 beq.n 802bf04 + 802bf38: 68bb ldr r3, [r7, #8] + 802bf3a: 681b ldr r3, [r3, #0] + 802bf3c: f003 0310 and.w r3, r3, #16 + 802bf40: 2b00 cmp r3, #0 + 802bf42: d021 beq.n 802bf88 { /* Set TCP Header length */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19)); - 802bec0: 6a3b ldr r3, [r7, #32] - 802bec2: 68db ldr r3, [r3, #12] - 802bec4: f423 02f0 bic.w r2, r3, #7864320 ; 0x780000 - 802bec8: 68bb ldr r3, [r7, #8] - 802beca: 6a1b ldr r3, [r3, #32] - 802becc: 04db lsls r3, r3, #19 - 802bece: 431a orrs r2, r3 - 802bed0: 6a3b ldr r3, [r7, #32] - 802bed2: 60da str r2, [r3, #12] + 802bf44: 6a3b ldr r3, [r7, #32] + 802bf46: 68db ldr r3, [r3, #12] + 802bf48: f423 02f0 bic.w r2, r3, #7864320 ; 0x780000 + 802bf4c: 68bb ldr r3, [r7, #8] + 802bf4e: 6a1b ldr r3, [r3, #32] + 802bf50: 04db lsls r3, r3, #19 + 802bf52: 431a orrs r2, r3 + 802bf54: 6a3b ldr r3, [r7, #32] + 802bf56: 60da str r2, [r3, #12] /* Set TCP payload length */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); - 802bed4: 6a3b ldr r3, [r7, #32] - 802bed6: 68da ldr r2, [r3, #12] - 802bed8: 4b09 ldr r3, [pc, #36] ; (802bf00 ) - 802beda: 4013 ands r3, r2 - 802bedc: 68ba ldr r2, [r7, #8] - 802bede: 69d2 ldr r2, [r2, #28] - 802bee0: 431a orrs r2, r3 - 802bee2: 6a3b ldr r3, [r7, #32] - 802bee4: 60da str r2, [r3, #12] + 802bf58: 6a3b ldr r3, [r7, #32] + 802bf5a: 68da ldr r2, [r3, #12] + 802bf5c: 4b09 ldr r3, [pc, #36] ; (802bf84 ) + 802bf5e: 4013 ands r3, r2 + 802bf60: 68ba ldr r2, [r7, #8] + 802bf62: 69d2 ldr r2, [r2, #28] + 802bf64: 431a orrs r2, r3 + 802bf66: 6a3b ldr r3, [r7, #32] + 802bf68: 60da str r2, [r3, #12] /* Set TCP Segmentation Enabled bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); - 802bee6: 6a3b ldr r3, [r7, #32] - 802bee8: 68db ldr r3, [r3, #12] - 802beea: f443 2280 orr.w r2, r3, #262144 ; 0x40000 - 802beee: 6a3b ldr r3, [r7, #32] - 802bef0: 60da str r2, [r3, #12] - 802bef2: e02e b.n 802bf52 - 802bef4: ffff0000 .word 0xffff0000 - 802bef8: ffffc000 .word 0xffffc000 - 802befc: c000ffff .word 0xc000ffff - 802bf00: fffc0000 .word 0xfffc0000 + 802bf6a: 6a3b ldr r3, [r7, #32] + 802bf6c: 68db ldr r3, [r3, #12] + 802bf6e: f443 2280 orr.w r2, r3, #262144 ; 0x40000 + 802bf72: 6a3b ldr r3, [r7, #32] + 802bf74: 60da str r2, [r3, #12] + 802bf76: e02e b.n 802bfd6 + 802bf78: ffff0000 .word 0xffff0000 + 802bf7c: ffffc000 .word 0xffffc000 + 802bf80: c000ffff .word 0xc000ffff + 802bf84: fffc0000 .word 0xfffc0000 } else { MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); - 802bf04: 6a3b ldr r3, [r7, #32] - 802bf06: 68da ldr r2, [r3, #12] - 802bf08: 4b7b ldr r3, [pc, #492] ; (802c0f8 ) - 802bf0a: 4013 ands r3, r2 - 802bf0c: 68ba ldr r2, [r7, #8] - 802bf0e: 6852 ldr r2, [r2, #4] - 802bf10: 431a orrs r2, r3 - 802bf12: 6a3b ldr r3, [r7, #32] - 802bf14: 60da str r2, [r3, #12] + 802bf88: 6a3b ldr r3, [r7, #32] + 802bf8a: 68da ldr r2, [r3, #12] + 802bf8c: 4b7b ldr r3, [pc, #492] ; (802c17c ) + 802bf8e: 4013 ands r3, r2 + 802bf90: 68ba ldr r2, [r7, #8] + 802bf92: 6852 ldr r2, [r2, #4] + 802bf94: 431a orrs r2, r3 + 802bf96: 6a3b ldr r3, [r7, #32] + 802bf98: 60da str r2, [r3, #12] if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET) - 802bf16: 68bb ldr r3, [r7, #8] - 802bf18: 681b ldr r3, [r3, #0] - 802bf1a: f003 0301 and.w r3, r3, #1 - 802bf1e: 2b00 cmp r3, #0 - 802bf20: d008 beq.n 802bf34 + 802bf9a: 68bb ldr r3, [r7, #8] + 802bf9c: 681b ldr r3, [r3, #0] + 802bf9e: f003 0301 and.w r3, r3, #1 + 802bfa2: 2b00 cmp r3, #0 + 802bfa4: d008 beq.n 802bfb8 { MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); - 802bf22: 6a3b ldr r3, [r7, #32] - 802bf24: 68db ldr r3, [r3, #12] - 802bf26: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 802bf2a: 68bb ldr r3, [r7, #8] - 802bf2c: 695b ldr r3, [r3, #20] - 802bf2e: 431a orrs r2, r3 - 802bf30: 6a3b ldr r3, [r7, #32] - 802bf32: 60da str r2, [r3, #12] + 802bfa6: 6a3b ldr r3, [r7, #32] + 802bfa8: 68db ldr r3, [r3, #12] + 802bfaa: f423 3240 bic.w r2, r3, #196608 ; 0x30000 + 802bfae: 68bb ldr r3, [r7, #8] + 802bfb0: 695b ldr r3, [r3, #20] + 802bfb2: 431a orrs r2, r3 + 802bfb4: 6a3b ldr r3, [r7, #32] + 802bfb6: 60da str r2, [r3, #12] } if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CRCPAD) != (uint32_t)RESET) - 802bf34: 68bb ldr r3, [r7, #8] - 802bf36: 681b ldr r3, [r3, #0] - 802bf38: f003 0320 and.w r3, r3, #32 - 802bf3c: 2b00 cmp r3, #0 - 802bf3e: d008 beq.n 802bf52 + 802bfb8: 68bb ldr r3, [r7, #8] + 802bfba: 681b ldr r3, [r3, #0] + 802bfbc: f003 0320 and.w r3, r3, #32 + 802bfc0: 2b00 cmp r3, #0 + 802bfc2: d008 beq.n 802bfd6 { MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl); - 802bf40: 6a3b ldr r3, [r7, #32] - 802bf42: 68db ldr r3, [r3, #12] - 802bf44: f023 6240 bic.w r2, r3, #201326592 ; 0xc000000 - 802bf48: 68bb ldr r3, [r7, #8] - 802bf4a: 691b ldr r3, [r3, #16] - 802bf4c: 431a orrs r2, r3 - 802bf4e: 6a3b ldr r3, [r7, #32] - 802bf50: 60da str r2, [r3, #12] + 802bfc4: 6a3b ldr r3, [r7, #32] + 802bfc6: 68db ldr r3, [r3, #12] + 802bfc8: f023 6240 bic.w r2, r3, #201326592 ; 0xc000000 + 802bfcc: 68bb ldr r3, [r7, #8] + 802bfce: 691b ldr r3, [r3, #16] + 802bfd0: 431a orrs r2, r3 + 802bfd2: 6a3b ldr r3, [r7, #32] + 802bfd4: 60da str r2, [r3, #12] } } if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET) - 802bf52: 68bb ldr r3, [r7, #8] - 802bf54: 681b ldr r3, [r3, #0] - 802bf56: f003 0304 and.w r3, r3, #4 - 802bf5a: 2b00 cmp r3, #0 - 802bf5c: d008 beq.n 802bf70 + 802bfd6: 68bb ldr r3, [r7, #8] + 802bfd8: 681b ldr r3, [r3, #0] + 802bfda: f003 0304 and.w r3, r3, #4 + 802bfde: 2b00 cmp r3, #0 + 802bfe0: d008 beq.n 802bff4 { /* Set Vlan Tag control */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl); - 802bf5e: 6a3b ldr r3, [r7, #32] - 802bf60: 689b ldr r3, [r3, #8] - 802bf62: f423 4240 bic.w r2, r3, #49152 ; 0xc000 - 802bf66: 68bb ldr r3, [r7, #8] - 802bf68: 6a9b ldr r3, [r3, #40] ; 0x28 - 802bf6a: 431a orrs r2, r3 - 802bf6c: 6a3b ldr r3, [r7, #32] - 802bf6e: 609a str r2, [r3, #8] + 802bfe2: 6a3b ldr r3, [r7, #32] + 802bfe4: 689b ldr r3, [r3, #8] + 802bfe6: f423 4240 bic.w r2, r3, #49152 ; 0xc000 + 802bfea: 68bb ldr r3, [r7, #8] + 802bfec: 6a9b ldr r3, [r3, #40] ; 0x28 + 802bfee: 431a orrs r2, r3 + 802bff0: 6a3b ldr r3, [r7, #32] + 802bff2: 609a str r2, [r3, #8] } /* Mark it as First Descriptor */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); - 802bf70: 6a3b ldr r3, [r7, #32] - 802bf72: 68db ldr r3, [r3, #12] - 802bf74: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000 - 802bf78: 6a3b ldr r3, [r7, #32] - 802bf7a: 60da str r2, [r3, #12] + 802bff4: 6a3b ldr r3, [r7, #32] + 802bff6: 68db ldr r3, [r3, #12] + 802bff8: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000 + 802bffc: 6a3b ldr r3, [r7, #32] + 802bffe: 60da str r2, [r3, #12] /* Mark it as NORMAL descriptor */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); - 802bf7c: 6a3b ldr r3, [r7, #32] - 802bf7e: 68db ldr r3, [r3, #12] - 802bf80: f023 4280 bic.w r2, r3, #1073741824 ; 0x40000000 - 802bf84: 6a3b ldr r3, [r7, #32] - 802bf86: 60da str r2, [r3, #12] + 802c000: 6a3b ldr r3, [r7, #32] + 802c002: 68db ldr r3, [r3, #12] + 802c004: f023 4280 bic.w r2, r3, #1073741824 ; 0x40000000 + 802c008: 6a3b ldr r3, [r7, #32] + 802c00a: 60da str r2, [r3, #12] __ASM volatile ("dmb 0xF":::"memory"); - 802bf88: f3bf 8f5f dmb sy + 802c00c: f3bf 8f5f dmb sy } - 802bf8c: bf00 nop + 802c010: bf00 nop /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); /* set OWN bit of FIRST descriptor */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); - 802bf8e: 6a3b ldr r3, [r7, #32] - 802bf90: 68db ldr r3, [r3, #12] - 802bf92: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 - 802bf96: 6a3b ldr r3, [r7, #32] - 802bf98: 60da str r2, [r3, #12] + 802c012: 6a3b ldr r3, [r7, #32] + 802c014: 68db ldr r3, [r3, #12] + 802c016: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 + 802c01a: 6a3b ldr r3, [r7, #32] + 802c01c: 60da str r2, [r3, #12] /* If source address insertion/replacement is enabled for this packet */ if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_SAIC) != (uint32_t)RESET) - 802bf9a: 68bb ldr r3, [r7, #8] - 802bf9c: 681b ldr r3, [r3, #0] - 802bf9e: f003 0302 and.w r3, r3, #2 - 802bfa2: 2b00 cmp r3, #0 - 802bfa4: f000 80da beq.w 802c15c + 802c01e: 68bb ldr r3, [r7, #8] + 802c020: 681b ldr r3, [r3, #0] + 802c022: f003 0302 and.w r3, r3, #2 + 802c026: 2b00 cmp r3, #0 + 802c028: f000 80da beq.w 802c1e0 { MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl); - 802bfa8: 6a3b ldr r3, [r7, #32] - 802bfaa: 68db ldr r3, [r3, #12] - 802bfac: f023 7260 bic.w r2, r3, #58720256 ; 0x3800000 - 802bfb0: 68bb ldr r3, [r7, #8] - 802bfb2: 68db ldr r3, [r3, #12] - 802bfb4: 431a orrs r2, r3 - 802bfb6: 6a3b ldr r3, [r7, #32] - 802bfb8: 60da str r2, [r3, #12] + 802c02c: 6a3b ldr r3, [r7, #32] + 802c02e: 68db ldr r3, [r3, #12] + 802c030: f023 7260 bic.w r2, r3, #58720256 ; 0x3800000 + 802c034: 68bb ldr r3, [r7, #8] + 802c036: 68db ldr r3, [r3, #12] + 802c038: 431a orrs r2, r3 + 802c03a: 6a3b ldr r3, [r7, #32] + 802c03c: 60da str r2, [r3, #12] } /* only if the packet is split into more than one descriptors > 1 */ while (txbuffer->next != NULL) - 802bfba: e0cf b.n 802c15c + 802c03e: e0cf b.n 802c1e0 { /* Clear the LD bit of previous descriptor */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); - 802bfbc: 6a3b ldr r3, [r7, #32] - 802bfbe: 68db ldr r3, [r3, #12] - 802bfc0: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000 - 802bfc4: 6a3b ldr r3, [r7, #32] - 802bfc6: 60da str r2, [r3, #12] + 802c040: 6a3b ldr r3, [r7, #32] + 802c042: 68db ldr r3, [r3, #12] + 802c044: f023 5280 bic.w r2, r3, #268435456 ; 0x10000000 + 802c048: 6a3b ldr r3, [r7, #32] + 802c04a: 60da str r2, [r3, #12] /* Increment current tx descriptor index */ INCR_TX_DESC_INDEX(descidx, 1U); - 802bfc8: 6afb ldr r3, [r7, #44] ; 0x2c - 802bfca: 3301 adds r3, #1 - 802bfcc: 62fb str r3, [r7, #44] ; 0x2c - 802bfce: 6afb ldr r3, [r7, #44] ; 0x2c - 802bfd0: 2b03 cmp r3, #3 - 802bfd2: d902 bls.n 802bfda - 802bfd4: 6afb ldr r3, [r7, #44] ; 0x2c - 802bfd6: 3b04 subs r3, #4 - 802bfd8: 62fb str r3, [r7, #44] ; 0x2c + 802c04c: 6afb ldr r3, [r7, #44] ; 0x2c + 802c04e: 3301 adds r3, #1 + 802c050: 62fb str r3, [r7, #44] ; 0x2c + 802c052: 6afb ldr r3, [r7, #44] ; 0x2c + 802c054: 2b03 cmp r3, #3 + 802c056: d902 bls.n 802c05e + 802c058: 6afb ldr r3, [r7, #44] ; 0x2c + 802c05a: 3b04 subs r3, #4 + 802c05c: 62fb str r3, [r7, #44] ; 0x2c /* Get current descriptor address */ dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802bfda: 697b ldr r3, [r7, #20] - 802bfdc: 6afa ldr r2, [r7, #44] ; 0x2c - 802bfde: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802bfe2: 623b str r3, [r7, #32] + 802c05e: 697b ldr r3, [r7, #20] + 802c060: 6afa ldr r2, [r7, #44] ; 0x2c + 802c062: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802c066: 623b str r3, [r7, #32] /* Clear the FD bit of new Descriptor */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD); - 802bfe4: 6a3b ldr r3, [r7, #32] - 802bfe6: 68db ldr r3, [r3, #12] - 802bfe8: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000 - 802bfec: 6a3b ldr r3, [r7, #32] - 802bfee: 60da str r2, [r3, #12] + 802c068: 6a3b ldr r3, [r7, #32] + 802c06a: 68db ldr r3, [r3, #12] + 802c06c: f023 5200 bic.w r2, r3, #536870912 ; 0x20000000 + 802c070: 6a3b ldr r3, [r7, #32] + 802c072: 60da str r2, [r3, #12] /* Current Tx Descriptor Owned by DMA: cannot be used by the application */ if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN) - 802bff0: 6a3b ldr r3, [r7, #32] - 802bff2: 68db ldr r3, [r3, #12] - 802bff4: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 - 802bff8: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802bffc: d007 beq.n 802c00e + 802c074: 6a3b ldr r3, [r7, #32] + 802c076: 68db ldr r3, [r3, #12] + 802c078: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000 + 802c07c: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802c080: d007 beq.n 802c092 || (dmatxdesclist->PacketAddress[descidx] != NULL)) - 802bffe: 697a ldr r2, [r7, #20] - 802c000: 6afb ldr r3, [r7, #44] ; 0x2c - 802c002: 3304 adds r3, #4 - 802c004: 009b lsls r3, r3, #2 - 802c006: 4413 add r3, r2 - 802c008: 685b ldr r3, [r3, #4] - 802c00a: 2b00 cmp r3, #0 - 802c00c: d029 beq.n 802c062 + 802c082: 697a ldr r2, [r7, #20] + 802c084: 6afb ldr r3, [r7, #44] ; 0x2c + 802c086: 3304 adds r3, #4 + 802c088: 009b lsls r3, r3, #2 + 802c08a: 4413 add r3, r2 + 802c08c: 685b ldr r3, [r3, #4] + 802c08e: 2b00 cmp r3, #0 + 802c090: d029 beq.n 802c0e6 { descidx = firstdescidx; - 802c00e: 693b ldr r3, [r7, #16] - 802c010: 62fb str r3, [r7, #44] ; 0x2c + 802c092: 693b ldr r3, [r7, #16] + 802c094: 62fb str r3, [r7, #44] ; 0x2c dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802c012: 697b ldr r3, [r7, #20] - 802c014: 6afa ldr r2, [r7, #44] ; 0x2c - 802c016: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802c01a: 623b str r3, [r7, #32] + 802c096: 697b ldr r3, [r7, #20] + 802c098: 6afa ldr r2, [r7, #44] ; 0x2c + 802c09a: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802c09e: 623b str r3, [r7, #32] /* clear previous desc own bit */ for (idx = 0; idx < descnbr; idx ++) - 802c01c: 2300 movs r3, #0 - 802c01e: 62bb str r3, [r7, #40] ; 0x28 - 802c020: e019 b.n 802c056 + 802c0a0: 2300 movs r3, #0 + 802c0a2: 62bb str r3, [r7, #40] ; 0x28 + 802c0a4: e019 b.n 802c0da __ASM volatile ("dmb 0xF":::"memory"); - 802c022: f3bf 8f5f dmb sy + 802c0a6: f3bf 8f5f dmb sy } - 802c026: bf00 nop + 802c0aa: bf00 nop { /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); - 802c028: 6a3b ldr r3, [r7, #32] - 802c02a: 68db ldr r3, [r3, #12] - 802c02c: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 802c030: 6a3b ldr r3, [r7, #32] - 802c032: 60da str r2, [r3, #12] + 802c0ac: 6a3b ldr r3, [r7, #32] + 802c0ae: 68db ldr r3, [r3, #12] + 802c0b0: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 802c0b4: 6a3b ldr r3, [r7, #32] + 802c0b6: 60da str r2, [r3, #12] /* Increment current tx descriptor index */ INCR_TX_DESC_INDEX(descidx, 1U); - 802c034: 6afb ldr r3, [r7, #44] ; 0x2c - 802c036: 3301 adds r3, #1 - 802c038: 62fb str r3, [r7, #44] ; 0x2c - 802c03a: 6afb ldr r3, [r7, #44] ; 0x2c - 802c03c: 2b03 cmp r3, #3 - 802c03e: d902 bls.n 802c046 - 802c040: 6afb ldr r3, [r7, #44] ; 0x2c - 802c042: 3b04 subs r3, #4 - 802c044: 62fb str r3, [r7, #44] ; 0x2c + 802c0b8: 6afb ldr r3, [r7, #44] ; 0x2c + 802c0ba: 3301 adds r3, #1 + 802c0bc: 62fb str r3, [r7, #44] ; 0x2c + 802c0be: 6afb ldr r3, [r7, #44] ; 0x2c + 802c0c0: 2b03 cmp r3, #3 + 802c0c2: d902 bls.n 802c0ca + 802c0c4: 6afb ldr r3, [r7, #44] ; 0x2c + 802c0c6: 3b04 subs r3, #4 + 802c0c8: 62fb str r3, [r7, #44] ; 0x2c /* Get current descriptor address */ dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx]; - 802c046: 697b ldr r3, [r7, #20] - 802c048: 6afa ldr r2, [r7, #44] ; 0x2c - 802c04a: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802c04e: 623b str r3, [r7, #32] + 802c0ca: 697b ldr r3, [r7, #20] + 802c0cc: 6afa ldr r2, [r7, #44] ; 0x2c + 802c0ce: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802c0d2: 623b str r3, [r7, #32] for (idx = 0; idx < descnbr; idx ++) - 802c050: 6abb ldr r3, [r7, #40] ; 0x28 - 802c052: 3301 adds r3, #1 - 802c054: 62bb str r3, [r7, #40] ; 0x28 - 802c056: 6aba ldr r2, [r7, #40] ; 0x28 - 802c058: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c05a: 429a cmp r2, r3 - 802c05c: d3e1 bcc.n 802c022 + 802c0d4: 6abb ldr r3, [r7, #40] ; 0x28 + 802c0d6: 3301 adds r3, #1 + 802c0d8: 62bb str r3, [r7, #40] ; 0x28 + 802c0da: 6aba ldr r2, [r7, #40] ; 0x28 + 802c0dc: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c0de: 429a cmp r2, r3 + 802c0e0: d3e1 bcc.n 802c0a6 } return HAL_ETH_ERROR_BUSY; - 802c05e: 2302 movs r3, #2 - 802c060: e0ae b.n 802c1c0 + 802c0e2: 2302 movs r3, #2 + 802c0e4: e0ae b.n 802c244 } descnbr += 1U; - 802c062: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c064: 3301 adds r3, #1 - 802c066: 627b str r3, [r7, #36] ; 0x24 + 802c0e6: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c0e8: 3301 adds r3, #1 + 802c0ea: 627b str r3, [r7, #36] ; 0x24 /* Get the next Tx buffer in the list */ txbuffer = txbuffer->next; - 802c068: 69fb ldr r3, [r7, #28] - 802c06a: 689b ldr r3, [r3, #8] - 802c06c: 61fb str r3, [r7, #28] + 802c0ec: 69fb ldr r3, [r7, #28] + 802c0ee: 689b ldr r3, [r3, #8] + 802c0f0: 61fb str r3, [r7, #28] /* Set header or buffer 1 address */ WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer); - 802c06e: 69fb ldr r3, [r7, #28] - 802c070: 681b ldr r3, [r3, #0] - 802c072: 461a mov r2, r3 - 802c074: 6a3b ldr r3, [r7, #32] - 802c076: 601a str r2, [r3, #0] + 802c0f2: 69fb ldr r3, [r7, #28] + 802c0f4: 681b ldr r3, [r3, #0] + 802c0f6: 461a mov r2, r3 + 802c0f8: 6a3b ldr r3, [r7, #32] + 802c0fa: 601a str r2, [r3, #0] /* Set header or buffer 1 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len); - 802c078: 6a3b ldr r3, [r7, #32] - 802c07a: 689a ldr r2, [r3, #8] - 802c07c: 4b1f ldr r3, [pc, #124] ; (802c0fc ) - 802c07e: 4013 ands r3, r2 - 802c080: 69fa ldr r2, [r7, #28] - 802c082: 6852 ldr r2, [r2, #4] - 802c084: 431a orrs r2, r3 - 802c086: 6a3b ldr r3, [r7, #32] - 802c088: 609a str r2, [r3, #8] + 802c0fc: 6a3b ldr r3, [r7, #32] + 802c0fe: 689a ldr r2, [r3, #8] + 802c100: 4b1f ldr r3, [pc, #124] ; (802c180 ) + 802c102: 4013 ands r3, r2 + 802c104: 69fa ldr r2, [r7, #28] + 802c106: 6852 ldr r2, [r2, #4] + 802c108: 431a orrs r2, r3 + 802c10a: 6a3b ldr r3, [r7, #32] + 802c10c: 609a str r2, [r3, #8] if (txbuffer->next != NULL) - 802c08a: 69fb ldr r3, [r7, #28] - 802c08c: 689b ldr r3, [r3, #8] - 802c08e: 2b00 cmp r3, #0 - 802c090: d012 beq.n 802c0b8 + 802c10e: 69fb ldr r3, [r7, #28] + 802c110: 689b ldr r3, [r3, #8] + 802c112: 2b00 cmp r3, #0 + 802c114: d012 beq.n 802c13c { /* Get the next Tx buffer in the list */ txbuffer = txbuffer->next; - 802c092: 69fb ldr r3, [r7, #28] - 802c094: 689b ldr r3, [r3, #8] - 802c096: 61fb str r3, [r7, #28] + 802c116: 69fb ldr r3, [r7, #28] + 802c118: 689b ldr r3, [r3, #8] + 802c11a: 61fb str r3, [r7, #28] /* Set buffer 2 address */ WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer); - 802c098: 69fb ldr r3, [r7, #28] - 802c09a: 681b ldr r3, [r3, #0] - 802c09c: 461a mov r2, r3 - 802c09e: 6a3b ldr r3, [r7, #32] - 802c0a0: 605a str r2, [r3, #4] + 802c11c: 69fb ldr r3, [r7, #28] + 802c11e: 681b ldr r3, [r3, #0] + 802c120: 461a mov r2, r3 + 802c122: 6a3b ldr r3, [r7, #32] + 802c124: 605a str r2, [r3, #4] /* Set buffer 2 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16)); - 802c0a2: 6a3b ldr r3, [r7, #32] - 802c0a4: 689a ldr r2, [r3, #8] - 802c0a6: 4b16 ldr r3, [pc, #88] ; (802c100 ) - 802c0a8: 4013 ands r3, r2 - 802c0aa: 69fa ldr r2, [r7, #28] - 802c0ac: 6852 ldr r2, [r2, #4] - 802c0ae: 0412 lsls r2, r2, #16 - 802c0b0: 431a orrs r2, r3 - 802c0b2: 6a3b ldr r3, [r7, #32] - 802c0b4: 609a str r2, [r3, #8] - 802c0b6: e008 b.n 802c0ca + 802c126: 6a3b ldr r3, [r7, #32] + 802c128: 689a ldr r2, [r3, #8] + 802c12a: 4b16 ldr r3, [pc, #88] ; (802c184 ) + 802c12c: 4013 ands r3, r2 + 802c12e: 69fa ldr r2, [r7, #28] + 802c130: 6852 ldr r2, [r2, #4] + 802c132: 0412 lsls r2, r2, #16 + 802c134: 431a orrs r2, r3 + 802c136: 6a3b ldr r3, [r7, #32] + 802c138: 609a str r2, [r3, #8] + 802c13a: e008 b.n 802c14e } else { WRITE_REG(dmatxdesc->DESC1, 0x0); - 802c0b8: 6a3b ldr r3, [r7, #32] - 802c0ba: 2200 movs r2, #0 - 802c0bc: 605a str r2, [r3, #4] + 802c13c: 6a3b ldr r3, [r7, #32] + 802c13e: 2200 movs r2, #0 + 802c140: 605a str r2, [r3, #4] /* Set buffer 2 Length */ MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U); - 802c0be: 6a3b ldr r3, [r7, #32] - 802c0c0: 689a ldr r2, [r3, #8] - 802c0c2: 4b0f ldr r3, [pc, #60] ; (802c100 ) - 802c0c4: 4013 ands r3, r2 - 802c0c6: 6a3a ldr r2, [r7, #32] - 802c0c8: 6093 str r3, [r2, #8] + 802c142: 6a3b ldr r3, [r7, #32] + 802c144: 689a ldr r2, [r3, #8] + 802c146: 4b0f ldr r3, [pc, #60] ; (802c184 ) + 802c148: 4013 ands r3, r2 + 802c14a: 6a3a ldr r2, [r7, #32] + 802c14c: 6093 str r3, [r2, #8] } if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET) - 802c0ca: 68bb ldr r3, [r7, #8] - 802c0cc: 681b ldr r3, [r3, #0] - 802c0ce: f003 0310 and.w r3, r3, #16 - 802c0d2: 2b00 cmp r3, #0 - 802c0d4: d018 beq.n 802c108 + 802c14e: 68bb ldr r3, [r7, #8] + 802c150: 681b ldr r3, [r3, #0] + 802c152: f003 0310 and.w r3, r3, #16 + 802c156: 2b00 cmp r3, #0 + 802c158: d018 beq.n 802c18c { /* Set TCP payload length */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen); - 802c0d6: 6a3b ldr r3, [r7, #32] - 802c0d8: 68da ldr r2, [r3, #12] - 802c0da: 4b0a ldr r3, [pc, #40] ; (802c104 ) - 802c0dc: 4013 ands r3, r2 - 802c0de: 68ba ldr r2, [r7, #8] - 802c0e0: 69d2 ldr r2, [r2, #28] - 802c0e2: 431a orrs r2, r3 - 802c0e4: 6a3b ldr r3, [r7, #32] - 802c0e6: 60da str r2, [r3, #12] + 802c15a: 6a3b ldr r3, [r7, #32] + 802c15c: 68da ldr r2, [r3, #12] + 802c15e: 4b0a ldr r3, [pc, #40] ; (802c188 ) + 802c160: 4013 ands r3, r2 + 802c162: 68ba ldr r2, [r7, #8] + 802c164: 69d2 ldr r2, [r2, #28] + 802c166: 431a orrs r2, r3 + 802c168: 6a3b ldr r3, [r7, #32] + 802c16a: 60da str r2, [r3, #12] /* Set TCP Segmentation Enabled bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE); - 802c0e8: 6a3b ldr r3, [r7, #32] - 802c0ea: 68db ldr r3, [r3, #12] - 802c0ec: f443 2280 orr.w r2, r3, #262144 ; 0x40000 - 802c0f0: 6a3b ldr r3, [r7, #32] - 802c0f2: 60da str r2, [r3, #12] - 802c0f4: e020 b.n 802c138 - 802c0f6: bf00 nop - 802c0f8: ffff8000 .word 0xffff8000 - 802c0fc: ffffc000 .word 0xffffc000 - 802c100: c000ffff .word 0xc000ffff - 802c104: fffc0000 .word 0xfffc0000 + 802c16c: 6a3b ldr r3, [r7, #32] + 802c16e: 68db ldr r3, [r3, #12] + 802c170: f443 2280 orr.w r2, r3, #262144 ; 0x40000 + 802c174: 6a3b ldr r3, [r7, #32] + 802c176: 60da str r2, [r3, #12] + 802c178: e020 b.n 802c1bc + 802c17a: bf00 nop + 802c17c: ffff8000 .word 0xffff8000 + 802c180: ffffc000 .word 0xffffc000 + 802c184: c000ffff .word 0xc000ffff + 802c188: fffc0000 .word 0xfffc0000 } else { /* Set the packet length */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length); - 802c108: 6a3b ldr r3, [r7, #32] - 802c10a: 68da ldr r2, [r3, #12] - 802c10c: 4b2f ldr r3, [pc, #188] ; (802c1cc ) - 802c10e: 4013 ands r3, r2 - 802c110: 68ba ldr r2, [r7, #8] - 802c112: 6852 ldr r2, [r2, #4] - 802c114: 431a orrs r2, r3 - 802c116: 6a3b ldr r3, [r7, #32] - 802c118: 60da str r2, [r3, #12] + 802c18c: 6a3b ldr r3, [r7, #32] + 802c18e: 68da ldr r2, [r3, #12] + 802c190: 4b2f ldr r3, [pc, #188] ; (802c250 ) + 802c192: 4013 ands r3, r2 + 802c194: 68ba ldr r2, [r7, #8] + 802c196: 6852 ldr r2, [r2, #4] + 802c198: 431a orrs r2, r3 + 802c19a: 6a3b ldr r3, [r7, #32] + 802c19c: 60da str r2, [r3, #12] if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET) - 802c11a: 68bb ldr r3, [r7, #8] - 802c11c: 681b ldr r3, [r3, #0] - 802c11e: f003 0301 and.w r3, r3, #1 - 802c122: 2b00 cmp r3, #0 - 802c124: d008 beq.n 802c138 + 802c19e: 68bb ldr r3, [r7, #8] + 802c1a0: 681b ldr r3, [r3, #0] + 802c1a2: f003 0301 and.w r3, r3, #1 + 802c1a6: 2b00 cmp r3, #0 + 802c1a8: d008 beq.n 802c1bc { /* Checksum Insertion Control */ MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl); - 802c126: 6a3b ldr r3, [r7, #32] - 802c128: 68db ldr r3, [r3, #12] - 802c12a: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 802c12e: 68bb ldr r3, [r7, #8] - 802c130: 695b ldr r3, [r3, #20] - 802c132: 431a orrs r2, r3 - 802c134: 6a3b ldr r3, [r7, #32] - 802c136: 60da str r2, [r3, #12] + 802c1aa: 6a3b ldr r3, [r7, #32] + 802c1ac: 68db ldr r3, [r3, #12] + 802c1ae: f423 3240 bic.w r2, r3, #196608 ; 0x30000 + 802c1b2: 68bb ldr r3, [r7, #8] + 802c1b4: 695b ldr r3, [r3, #20] + 802c1b6: 431a orrs r2, r3 + 802c1b8: 6a3b ldr r3, [r7, #32] + 802c1ba: 60da str r2, [r3, #12] } } bd_count += 1U; - 802c138: 69bb ldr r3, [r7, #24] - 802c13a: 3301 adds r3, #1 - 802c13c: 61bb str r3, [r7, #24] + 802c1bc: 69bb ldr r3, [r7, #24] + 802c1be: 3301 adds r3, #1 + 802c1c0: 61bb str r3, [r7, #24] __ASM volatile ("dmb 0xF":::"memory"); - 802c13e: f3bf 8f5f dmb sy + 802c1c2: f3bf 8f5f dmb sy } - 802c142: bf00 nop + 802c1c6: bf00 nop /* Ensure rest of descriptor is written to RAM before the OWN bit */ __DMB(); /* Set Own bit */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN); - 802c144: 6a3b ldr r3, [r7, #32] - 802c146: 68db ldr r3, [r3, #12] - 802c148: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 - 802c14c: 6a3b ldr r3, [r7, #32] - 802c14e: 60da str r2, [r3, #12] + 802c1c8: 6a3b ldr r3, [r7, #32] + 802c1ca: 68db ldr r3, [r3, #12] + 802c1cc: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 + 802c1d0: 6a3b ldr r3, [r7, #32] + 802c1d2: 60da str r2, [r3, #12] /* Mark it as NORMAL descriptor */ CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT); - 802c150: 6a3b ldr r3, [r7, #32] - 802c152: 68db ldr r3, [r3, #12] - 802c154: f023 4280 bic.w r2, r3, #1073741824 ; 0x40000000 - 802c158: 6a3b ldr r3, [r7, #32] - 802c15a: 60da str r2, [r3, #12] + 802c1d4: 6a3b ldr r3, [r7, #32] + 802c1d6: 68db ldr r3, [r3, #12] + 802c1d8: f023 4280 bic.w r2, r3, #1073741824 ; 0x40000000 + 802c1dc: 6a3b ldr r3, [r7, #32] + 802c1de: 60da str r2, [r3, #12] while (txbuffer->next != NULL) - 802c15c: 69fb ldr r3, [r7, #28] - 802c15e: 689b ldr r3, [r3, #8] - 802c160: 2b00 cmp r3, #0 - 802c162: f47f af2b bne.w 802bfbc + 802c1e0: 69fb ldr r3, [r7, #28] + 802c1e2: 689b ldr r3, [r3, #8] + 802c1e4: 2b00 cmp r3, #0 + 802c1e6: f47f af2b bne.w 802c040 } if (ItMode != ((uint32_t)RESET)) - 802c166: 687b ldr r3, [r7, #4] - 802c168: 2b00 cmp r3, #0 - 802c16a: d006 beq.n 802c17a + 802c1ea: 687b ldr r3, [r7, #4] + 802c1ec: 2b00 cmp r3, #0 + 802c1ee: d006 beq.n 802c1fe { /* Set Interrupt on completion bit */ SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); - 802c16c: 6a3b ldr r3, [r7, #32] - 802c16e: 689b ldr r3, [r3, #8] - 802c170: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 - 802c174: 6a3b ldr r3, [r7, #32] - 802c176: 609a str r2, [r3, #8] - 802c178: e005 b.n 802c186 + 802c1f0: 6a3b ldr r3, [r7, #32] + 802c1f2: 689b ldr r3, [r3, #8] + 802c1f4: f043 4200 orr.w r2, r3, #2147483648 ; 0x80000000 + 802c1f8: 6a3b ldr r3, [r7, #32] + 802c1fa: 609a str r2, [r3, #8] + 802c1fc: e005 b.n 802c20a } else { /* Clear Interrupt on completion bit */ CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC); - 802c17a: 6a3b ldr r3, [r7, #32] - 802c17c: 689b ldr r3, [r3, #8] - 802c17e: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 802c182: 6a3b ldr r3, [r7, #32] - 802c184: 609a str r2, [r3, #8] + 802c1fe: 6a3b ldr r3, [r7, #32] + 802c200: 689b ldr r3, [r3, #8] + 802c202: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 802c206: 6a3b ldr r3, [r7, #32] + 802c208: 609a str r2, [r3, #8] } /* Mark it as LAST descriptor */ SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD); - 802c186: 6a3b ldr r3, [r7, #32] - 802c188: 68db ldr r3, [r3, #12] - 802c18a: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000 - 802c18e: 6a3b ldr r3, [r7, #32] - 802c190: 60da str r2, [r3, #12] + 802c20a: 6a3b ldr r3, [r7, #32] + 802c20c: 68db ldr r3, [r3, #12] + 802c20e: f043 5280 orr.w r2, r3, #268435456 ; 0x10000000 + 802c212: 6a3b ldr r3, [r7, #32] + 802c214: 60da str r2, [r3, #12] /* Save the current packet address to expose it to the application */ dmatxdesclist->PacketAddress[descidx] = dmatxdesclist->CurrentPacketAddress; - 802c192: 697b ldr r3, [r7, #20] - 802c194: 6a5a ldr r2, [r3, #36] ; 0x24 - 802c196: 6979 ldr r1, [r7, #20] - 802c198: 6afb ldr r3, [r7, #44] ; 0x2c - 802c19a: 3304 adds r3, #4 - 802c19c: 009b lsls r3, r3, #2 - 802c19e: 440b add r3, r1 - 802c1a0: 605a str r2, [r3, #4] + 802c216: 697b ldr r3, [r7, #20] + 802c218: 6a5a ldr r2, [r3, #36] ; 0x24 + 802c21a: 6979 ldr r1, [r7, #20] + 802c21c: 6afb ldr r3, [r7, #44] ; 0x2c + 802c21e: 3304 adds r3, #4 + 802c220: 009b lsls r3, r3, #2 + 802c222: 440b add r3, r1 + 802c224: 605a str r2, [r3, #4] dmatxdesclist->CurTxDesc = descidx; - 802c1a2: 697b ldr r3, [r7, #20] - 802c1a4: 6afa ldr r2, [r7, #44] ; 0x2c - 802c1a6: 611a str r2, [r3, #16] + 802c226: 697b ldr r3, [r7, #20] + 802c228: 6afa ldr r2, [r7, #44] ; 0x2c + 802c22a: 611a str r2, [r3, #16] __ASM volatile ("cpsid i" : : : "memory"); - 802c1a8: b672 cpsid i + 802c22c: b672 cpsid i } - 802c1aa: bf00 nop + 802c22e: bf00 nop /* disable the interrupt */ __disable_irq(); dmatxdesclist->BuffersInUse += bd_count + 1U; - 802c1ac: 697b ldr r3, [r7, #20] - 802c1ae: 6a9a ldr r2, [r3, #40] ; 0x28 - 802c1b0: 69bb ldr r3, [r7, #24] - 802c1b2: 4413 add r3, r2 - 802c1b4: 1c5a adds r2, r3, #1 - 802c1b6: 697b ldr r3, [r7, #20] - 802c1b8: 629a str r2, [r3, #40] ; 0x28 + 802c230: 697b ldr r3, [r7, #20] + 802c232: 6a9a ldr r2, [r3, #40] ; 0x28 + 802c234: 69bb ldr r3, [r7, #24] + 802c236: 4413 add r3, r2 + 802c238: 1c5a adds r2, r3, #1 + 802c23a: 697b ldr r3, [r7, #20] + 802c23c: 629a str r2, [r3, #40] ; 0x28 __ASM volatile ("cpsie i" : : : "memory"); - 802c1ba: b662 cpsie i + 802c23e: b662 cpsie i } - 802c1bc: bf00 nop + 802c240: bf00 nop /* Enable interrupts back */ __enable_irq(); /* Return function status */ return HAL_ETH_ERROR_NONE; - 802c1be: 2300 movs r3, #0 + 802c242: 2300 movs r3, #0 } - 802c1c0: 4618 mov r0, r3 - 802c1c2: 3734 adds r7, #52 ; 0x34 - 802c1c4: 46bd mov sp, r7 - 802c1c6: f85d 7b04 ldr.w r7, [sp], #4 - 802c1ca: 4770 bx lr - 802c1cc: ffff8000 .word 0xffff8000 + 802c244: 4618 mov r0, r3 + 802c246: 3734 adds r7, #52 ; 0x34 + 802c248: 46bd mov sp, r7 + 802c24a: f85d 7b04 ldr.w r7, [sp], #4 + 802c24e: 4770 bx lr + 802c250: ffff8000 .word 0xffff8000 -0802c1d0 : +0802c254 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_Init(FDCAN_HandleTypeDef *hfdcan) { - 802c1d0: b580 push {r7, lr} - 802c1d2: b098 sub sp, #96 ; 0x60 - 802c1d4: af00 add r7, sp, #0 - 802c1d6: 6078 str r0, [r7, #4] + 802c254: b580 push {r7, lr} + 802c256: b098 sub sp, #96 ; 0x60 + 802c258: af00 add r7, sp, #0 + 802c25a: 6078 str r0, [r7, #4] uint32_t tickstart; HAL_StatusTypeDef status; const uint32_t CvtEltSize[] = {0, 0, 0, 0, 0, 1, 2, 3, 4, 0, 5, 0, 0, 0, 6, 0, 0, 0, 7}; - 802c1d8: 4a84 ldr r2, [pc, #528] ; (802c3ec ) - 802c1da: f107 030c add.w r3, r7, #12 - 802c1de: 4611 mov r1, r2 - 802c1e0: 224c movs r2, #76 ; 0x4c - 802c1e2: 4618 mov r0, r3 - 802c1e4: f014 fb84 bl 80408f0 + 802c25c: 4a84 ldr r2, [pc, #528] ; (802c470 ) + 802c25e: f107 030c add.w r3, r7, #12 + 802c262: 4611 mov r1, r2 + 802c264: 224c movs r2, #76 ; 0x4c + 802c266: 4618 mov r0, r3 + 802c268: f014 fb84 bl 8040974 /* Check FDCAN handle */ if (hfdcan == NULL) - 802c1e8: 687b ldr r3, [r7, #4] - 802c1ea: 2b00 cmp r3, #0 - 802c1ec: d101 bne.n 802c1f2 + 802c26c: 687b ldr r3, [r7, #4] + 802c26e: 2b00 cmp r3, #0 + 802c270: d101 bne.n 802c276 { return HAL_ERROR; - 802c1ee: 2301 movs r3, #1 - 802c1f0: e1c6 b.n 802c580 + 802c272: 2301 movs r3, #1 + 802c274: e1c6 b.n 802c604 } /* Check FDCAN instance */ if (hfdcan->Instance == FDCAN1) - 802c1f2: 687b ldr r3, [r7, #4] - 802c1f4: 681b ldr r3, [r3, #0] - 802c1f6: 4a7e ldr r2, [pc, #504] ; (802c3f0 ) - 802c1f8: 4293 cmp r3, r2 - 802c1fa: d106 bne.n 802c20a + 802c276: 687b ldr r3, [r7, #4] + 802c278: 681b ldr r3, [r3, #0] + 802c27a: 4a7e ldr r2, [pc, #504] ; (802c474 ) + 802c27c: 4293 cmp r3, r2 + 802c27e: d106 bne.n 802c28e { hfdcan->ttcan = (TTCAN_TypeDef *)((uint32_t)hfdcan->Instance + 0x100U); - 802c1fc: 687b ldr r3, [r7, #4] - 802c1fe: 681b ldr r3, [r3, #0] - 802c200: f503 7380 add.w r3, r3, #256 ; 0x100 - 802c204: 461a mov r2, r3 - 802c206: 687b ldr r3, [r7, #4] - 802c208: 605a str r2, [r3, #4] + 802c280: 687b ldr r3, [r7, #4] + 802c282: 681b ldr r3, [r3, #0] + 802c284: f503 7380 add.w r3, r3, #256 ; 0x100 + 802c288: 461a mov r2, r3 + 802c28a: 687b ldr r3, [r7, #4] + 802c28c: 605a str r2, [r3, #4] /* Init the low level hardware: CLOCK, NVIC */ hfdcan->MspInitCallback(hfdcan); } #else if (hfdcan->State == HAL_FDCAN_STATE_RESET) - 802c20a: 687b ldr r3, [r7, #4] - 802c20c: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c210: b2db uxtb r3, r3 - 802c212: 2b00 cmp r3, #0 - 802c214: d106 bne.n 802c224 + 802c28e: 687b ldr r3, [r7, #4] + 802c290: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802c294: b2db uxtb r3, r3 + 802c296: 2b00 cmp r3, #0 + 802c298: d106 bne.n 802c2a8 { /* Allocate lock resource and initialize it */ hfdcan->Lock = HAL_UNLOCKED; - 802c216: 687b ldr r3, [r7, #4] - 802c218: 2200 movs r2, #0 - 802c21a: f883 2099 strb.w r2, [r3, #153] ; 0x99 + 802c29a: 687b ldr r3, [r7, #4] + 802c29c: 2200 movs r2, #0 + 802c29e: f883 2099 strb.w r2, [r3, #153] ; 0x99 /* Init the low level hardware: CLOCK, NVIC */ HAL_FDCAN_MspInit(hfdcan); - 802c21e: 6878 ldr r0, [r7, #4] - 802c220: f7f7 faa2 bl 8023768 + 802c2a2: 6878 ldr r0, [r7, #4] + 802c2a4: f7f7 fa60 bl 8023768 } #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ /* Exit from Sleep mode */ CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CSR); - 802c224: 687b ldr r3, [r7, #4] - 802c226: 681b ldr r3, [r3, #0] - 802c228: 699a ldr r2, [r3, #24] - 802c22a: 687b ldr r3, [r7, #4] - 802c22c: 681b ldr r3, [r3, #0] - 802c22e: f022 0210 bic.w r2, r2, #16 - 802c232: 619a str r2, [r3, #24] + 802c2a8: 687b ldr r3, [r7, #4] + 802c2aa: 681b ldr r3, [r3, #0] + 802c2ac: 699a ldr r2, [r3, #24] + 802c2ae: 687b ldr r3, [r7, #4] + 802c2b0: 681b ldr r3, [r3, #0] + 802c2b2: f022 0210 bic.w r2, r2, #16 + 802c2b6: 619a str r2, [r3, #24] /* Get tick */ tickstart = HAL_GetTick(); - 802c234: f7f9 fec6 bl 8025fc4 - 802c238: 65f8 str r0, [r7, #92] ; 0x5c + 802c2b8: f7f9 fec6 bl 8026048 + 802c2bc: 65f8 str r0, [r7, #92] ; 0x5c /* Check Sleep mode acknowledge */ while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA) - 802c23a: e014 b.n 802c266 + 802c2be: e014 b.n 802c2ea { if ((HAL_GetTick() - tickstart) > FDCAN_TIMEOUT_VALUE) - 802c23c: f7f9 fec2 bl 8025fc4 - 802c240: 4602 mov r2, r0 - 802c242: 6dfb ldr r3, [r7, #92] ; 0x5c - 802c244: 1ad3 subs r3, r2, r3 - 802c246: 2b0a cmp r3, #10 - 802c248: d90d bls.n 802c266 + 802c2c0: f7f9 fec2 bl 8026048 + 802c2c4: 4602 mov r2, r0 + 802c2c6: 6dfb ldr r3, [r7, #92] ; 0x5c + 802c2c8: 1ad3 subs r3, r2, r3 + 802c2ca: 2b0a cmp r3, #10 + 802c2cc: d90d bls.n 802c2ea { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_TIMEOUT; - 802c24a: 687b ldr r3, [r7, #4] - 802c24c: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c250: f043 0201 orr.w r2, r3, #1 - 802c254: 687b ldr r3, [r7, #4] - 802c256: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c2ce: 687b ldr r3, [r7, #4] + 802c2d0: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c2d4: f043 0201 orr.w r2, r3, #1 + 802c2d8: 687b ldr r3, [r7, #4] + 802c2da: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Change FDCAN state */ hfdcan->State = HAL_FDCAN_STATE_ERROR; - 802c25a: 687b ldr r3, [r7, #4] - 802c25c: 2203 movs r2, #3 - 802c25e: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802c2de: 687b ldr r3, [r7, #4] + 802c2e0: 2203 movs r2, #3 + 802c2e2: f883 2098 strb.w r2, [r3, #152] ; 0x98 return HAL_ERROR; - 802c262: 2301 movs r3, #1 - 802c264: e18c b.n 802c580 + 802c2e6: 2301 movs r3, #1 + 802c2e8: e18c b.n 802c604 while ((hfdcan->Instance->CCCR & FDCAN_CCCR_CSA) == FDCAN_CCCR_CSA) - 802c266: 687b ldr r3, [r7, #4] - 802c268: 681b ldr r3, [r3, #0] - 802c26a: 699b ldr r3, [r3, #24] - 802c26c: f003 0308 and.w r3, r3, #8 - 802c270: 2b08 cmp r3, #8 - 802c272: d0e3 beq.n 802c23c + 802c2ea: 687b ldr r3, [r7, #4] + 802c2ec: 681b ldr r3, [r3, #0] + 802c2ee: 699b ldr r3, [r3, #24] + 802c2f0: f003 0308 and.w r3, r3, #8 + 802c2f4: 2b08 cmp r3, #8 + 802c2f6: d0e3 beq.n 802c2c0 } } /* Request initialisation */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT); - 802c274: 687b ldr r3, [r7, #4] - 802c276: 681b ldr r3, [r3, #0] - 802c278: 699a ldr r2, [r3, #24] - 802c27a: 687b ldr r3, [r7, #4] - 802c27c: 681b ldr r3, [r3, #0] - 802c27e: f042 0201 orr.w r2, r2, #1 - 802c282: 619a str r2, [r3, #24] + 802c2f8: 687b ldr r3, [r7, #4] + 802c2fa: 681b ldr r3, [r3, #0] + 802c2fc: 699a ldr r2, [r3, #24] + 802c2fe: 687b ldr r3, [r7, #4] + 802c300: 681b ldr r3, [r3, #0] + 802c302: f042 0201 orr.w r2, r2, #1 + 802c306: 619a str r2, [r3, #24] /* Get tick */ tickstart = HAL_GetTick(); - 802c284: f7f9 fe9e bl 8025fc4 - 802c288: 65f8 str r0, [r7, #92] ; 0x5c + 802c308: f7f9 fe9e bl 8026048 + 802c30c: 65f8 str r0, [r7, #92] ; 0x5c /* Wait until the INIT bit into CCCR register is set */ while ((hfdcan->Instance->CCCR & FDCAN_CCCR_INIT) == 0U) - 802c28a: e014 b.n 802c2b6 + 802c30e: e014 b.n 802c33a { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > FDCAN_TIMEOUT_VALUE) - 802c28c: f7f9 fe9a bl 8025fc4 - 802c290: 4602 mov r2, r0 - 802c292: 6dfb ldr r3, [r7, #92] ; 0x5c - 802c294: 1ad3 subs r3, r2, r3 - 802c296: 2b0a cmp r3, #10 - 802c298: d90d bls.n 802c2b6 + 802c310: f7f9 fe9a bl 8026048 + 802c314: 4602 mov r2, r0 + 802c316: 6dfb ldr r3, [r7, #92] ; 0x5c + 802c318: 1ad3 subs r3, r2, r3 + 802c31a: 2b0a cmp r3, #10 + 802c31c: d90d bls.n 802c33a { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_TIMEOUT; - 802c29a: 687b ldr r3, [r7, #4] - 802c29c: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c2a0: f043 0201 orr.w r2, r3, #1 - 802c2a4: 687b ldr r3, [r7, #4] - 802c2a6: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c31e: 687b ldr r3, [r7, #4] + 802c320: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c324: f043 0201 orr.w r2, r3, #1 + 802c328: 687b ldr r3, [r7, #4] + 802c32a: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Change FDCAN state */ hfdcan->State = HAL_FDCAN_STATE_ERROR; - 802c2aa: 687b ldr r3, [r7, #4] - 802c2ac: 2203 movs r2, #3 - 802c2ae: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802c32e: 687b ldr r3, [r7, #4] + 802c330: 2203 movs r2, #3 + 802c332: f883 2098 strb.w r2, [r3, #152] ; 0x98 return HAL_ERROR; - 802c2b2: 2301 movs r3, #1 - 802c2b4: e164 b.n 802c580 + 802c336: 2301 movs r3, #1 + 802c338: e164 b.n 802c604 while ((hfdcan->Instance->CCCR & FDCAN_CCCR_INIT) == 0U) - 802c2b6: 687b ldr r3, [r7, #4] - 802c2b8: 681b ldr r3, [r3, #0] - 802c2ba: 699b ldr r3, [r3, #24] - 802c2bc: f003 0301 and.w r3, r3, #1 - 802c2c0: 2b00 cmp r3, #0 - 802c2c2: d0e3 beq.n 802c28c + 802c33a: 687b ldr r3, [r7, #4] + 802c33c: 681b ldr r3, [r3, #0] + 802c33e: 699b ldr r3, [r3, #24] + 802c340: f003 0301 and.w r3, r3, #1 + 802c344: 2b00 cmp r3, #0 + 802c346: d0e3 beq.n 802c310 } } /* Enable configuration change */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_CCE); - 802c2c4: 687b ldr r3, [r7, #4] - 802c2c6: 681b ldr r3, [r3, #0] - 802c2c8: 699a ldr r2, [r3, #24] - 802c2ca: 687b ldr r3, [r7, #4] - 802c2cc: 681b ldr r3, [r3, #0] - 802c2ce: f042 0202 orr.w r2, r2, #2 - 802c2d2: 619a str r2, [r3, #24] + 802c348: 687b ldr r3, [r7, #4] + 802c34a: 681b ldr r3, [r3, #0] + 802c34c: 699a ldr r2, [r3, #24] + 802c34e: 687b ldr r3, [r7, #4] + 802c350: 681b ldr r3, [r3, #0] + 802c352: f042 0202 orr.w r2, r2, #2 + 802c356: 619a str r2, [r3, #24] /* Set the no automatic retransmission */ if (hfdcan->Init.AutoRetransmission == ENABLE) - 802c2d4: 687b ldr r3, [r7, #4] - 802c2d6: 7c1b ldrb r3, [r3, #16] - 802c2d8: 2b01 cmp r3, #1 - 802c2da: d108 bne.n 802c2ee + 802c358: 687b ldr r3, [r7, #4] + 802c35a: 7c1b ldrb r3, [r3, #16] + 802c35c: 2b01 cmp r3, #1 + 802c35e: d108 bne.n 802c372 { CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_DAR); - 802c2dc: 687b ldr r3, [r7, #4] - 802c2de: 681b ldr r3, [r3, #0] - 802c2e0: 699a ldr r2, [r3, #24] - 802c2e2: 687b ldr r3, [r7, #4] - 802c2e4: 681b ldr r3, [r3, #0] - 802c2e6: f022 0240 bic.w r2, r2, #64 ; 0x40 - 802c2ea: 619a str r2, [r3, #24] - 802c2ec: e007 b.n 802c2fe + 802c360: 687b ldr r3, [r7, #4] + 802c362: 681b ldr r3, [r3, #0] + 802c364: 699a ldr r2, [r3, #24] + 802c366: 687b ldr r3, [r7, #4] + 802c368: 681b ldr r3, [r3, #0] + 802c36a: f022 0240 bic.w r2, r2, #64 ; 0x40 + 802c36e: 619a str r2, [r3, #24] + 802c370: e007 b.n 802c382 } else { SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_DAR); - 802c2ee: 687b ldr r3, [r7, #4] - 802c2f0: 681b ldr r3, [r3, #0] - 802c2f2: 699a ldr r2, [r3, #24] - 802c2f4: 687b ldr r3, [r7, #4] - 802c2f6: 681b ldr r3, [r3, #0] - 802c2f8: f042 0240 orr.w r2, r2, #64 ; 0x40 - 802c2fc: 619a str r2, [r3, #24] + 802c372: 687b ldr r3, [r7, #4] + 802c374: 681b ldr r3, [r3, #0] + 802c376: 699a ldr r2, [r3, #24] + 802c378: 687b ldr r3, [r7, #4] + 802c37a: 681b ldr r3, [r3, #0] + 802c37c: f042 0240 orr.w r2, r2, #64 ; 0x40 + 802c380: 619a str r2, [r3, #24] } /* Set the transmit pause feature */ if (hfdcan->Init.TransmitPause == ENABLE) - 802c2fe: 687b ldr r3, [r7, #4] - 802c300: 7c5b ldrb r3, [r3, #17] - 802c302: 2b01 cmp r3, #1 - 802c304: d108 bne.n 802c318 + 802c382: 687b ldr r3, [r7, #4] + 802c384: 7c5b ldrb r3, [r3, #17] + 802c386: 2b01 cmp r3, #1 + 802c388: d108 bne.n 802c39c { SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TXP); - 802c306: 687b ldr r3, [r7, #4] - 802c308: 681b ldr r3, [r3, #0] - 802c30a: 699a ldr r2, [r3, #24] - 802c30c: 687b ldr r3, [r7, #4] - 802c30e: 681b ldr r3, [r3, #0] - 802c310: f442 4280 orr.w r2, r2, #16384 ; 0x4000 - 802c314: 619a str r2, [r3, #24] - 802c316: e007 b.n 802c328 + 802c38a: 687b ldr r3, [r7, #4] + 802c38c: 681b ldr r3, [r3, #0] + 802c38e: 699a ldr r2, [r3, #24] + 802c390: 687b ldr r3, [r7, #4] + 802c392: 681b ldr r3, [r3, #0] + 802c394: f442 4280 orr.w r2, r2, #16384 ; 0x4000 + 802c398: 619a str r2, [r3, #24] + 802c39a: e007 b.n 802c3ac } else { CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TXP); - 802c318: 687b ldr r3, [r7, #4] - 802c31a: 681b ldr r3, [r3, #0] - 802c31c: 699a ldr r2, [r3, #24] - 802c31e: 687b ldr r3, [r7, #4] - 802c320: 681b ldr r3, [r3, #0] - 802c322: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 802c326: 619a str r2, [r3, #24] + 802c39c: 687b ldr r3, [r7, #4] + 802c39e: 681b ldr r3, [r3, #0] + 802c3a0: 699a ldr r2, [r3, #24] + 802c3a2: 687b ldr r3, [r7, #4] + 802c3a4: 681b ldr r3, [r3, #0] + 802c3a6: f422 4280 bic.w r2, r2, #16384 ; 0x4000 + 802c3aa: 619a str r2, [r3, #24] } /* Set the Protocol Exception Handling */ if (hfdcan->Init.ProtocolException == ENABLE) - 802c328: 687b ldr r3, [r7, #4] - 802c32a: 7c9b ldrb r3, [r3, #18] - 802c32c: 2b01 cmp r3, #1 - 802c32e: d108 bne.n 802c342 + 802c3ac: 687b ldr r3, [r7, #4] + 802c3ae: 7c9b ldrb r3, [r3, #18] + 802c3b0: 2b01 cmp r3, #1 + 802c3b2: d108 bne.n 802c3c6 { CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_PXHD); - 802c330: 687b ldr r3, [r7, #4] - 802c332: 681b ldr r3, [r3, #0] - 802c334: 699a ldr r2, [r3, #24] - 802c336: 687b ldr r3, [r7, #4] - 802c338: 681b ldr r3, [r3, #0] - 802c33a: f422 5280 bic.w r2, r2, #4096 ; 0x1000 - 802c33e: 619a str r2, [r3, #24] - 802c340: e007 b.n 802c352 + 802c3b4: 687b ldr r3, [r7, #4] + 802c3b6: 681b ldr r3, [r3, #0] + 802c3b8: 699a ldr r2, [r3, #24] + 802c3ba: 687b ldr r3, [r7, #4] + 802c3bc: 681b ldr r3, [r3, #0] + 802c3be: f422 5280 bic.w r2, r2, #4096 ; 0x1000 + 802c3c2: 619a str r2, [r3, #24] + 802c3c4: e007 b.n 802c3d6 } else { SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_PXHD); - 802c342: 687b ldr r3, [r7, #4] - 802c344: 681b ldr r3, [r3, #0] - 802c346: 699a ldr r2, [r3, #24] - 802c348: 687b ldr r3, [r7, #4] - 802c34a: 681b ldr r3, [r3, #0] - 802c34c: f442 5280 orr.w r2, r2, #4096 ; 0x1000 - 802c350: 619a str r2, [r3, #24] + 802c3c6: 687b ldr r3, [r7, #4] + 802c3c8: 681b ldr r3, [r3, #0] + 802c3ca: 699a ldr r2, [r3, #24] + 802c3cc: 687b ldr r3, [r7, #4] + 802c3ce: 681b ldr r3, [r3, #0] + 802c3d0: f442 5280 orr.w r2, r2, #4096 ; 0x1000 + 802c3d4: 619a str r2, [r3, #24] } /* Set FDCAN Frame Format */ MODIFY_REG(hfdcan->Instance->CCCR, FDCAN_FRAME_FD_BRS, hfdcan->Init.FrameFormat); - 802c352: 687b ldr r3, [r7, #4] - 802c354: 681b ldr r3, [r3, #0] - 802c356: 699b ldr r3, [r3, #24] - 802c358: f423 7140 bic.w r1, r3, #768 ; 0x300 - 802c35c: 687b ldr r3, [r7, #4] - 802c35e: 689a ldr r2, [r3, #8] - 802c360: 687b ldr r3, [r7, #4] - 802c362: 681b ldr r3, [r3, #0] - 802c364: 430a orrs r2, r1 - 802c366: 619a str r2, [r3, #24] + 802c3d6: 687b ldr r3, [r7, #4] + 802c3d8: 681b ldr r3, [r3, #0] + 802c3da: 699b ldr r3, [r3, #24] + 802c3dc: f423 7140 bic.w r1, r3, #768 ; 0x300 + 802c3e0: 687b ldr r3, [r7, #4] + 802c3e2: 689a ldr r2, [r3, #8] + 802c3e4: 687b ldr r3, [r7, #4] + 802c3e6: 681b ldr r3, [r3, #0] + 802c3e8: 430a orrs r2, r1 + 802c3ea: 619a str r2, [r3, #24] /* Reset FDCAN Operation Mode */ CLEAR_BIT(hfdcan->Instance->CCCR, (FDCAN_CCCR_TEST | FDCAN_CCCR_MON | FDCAN_CCCR_ASM)); - 802c368: 687b ldr r3, [r7, #4] - 802c36a: 681b ldr r3, [r3, #0] - 802c36c: 699a ldr r2, [r3, #24] - 802c36e: 687b ldr r3, [r7, #4] - 802c370: 681b ldr r3, [r3, #0] - 802c372: f022 02a4 bic.w r2, r2, #164 ; 0xa4 - 802c376: 619a str r2, [r3, #24] + 802c3ec: 687b ldr r3, [r7, #4] + 802c3ee: 681b ldr r3, [r3, #0] + 802c3f0: 699a ldr r2, [r3, #24] + 802c3f2: 687b ldr r3, [r7, #4] + 802c3f4: 681b ldr r3, [r3, #0] + 802c3f6: f022 02a4 bic.w r2, r2, #164 ; 0xa4 + 802c3fa: 619a str r2, [r3, #24] CLEAR_BIT(hfdcan->Instance->TEST, FDCAN_TEST_LBCK); - 802c378: 687b ldr r3, [r7, #4] - 802c37a: 681b ldr r3, [r3, #0] - 802c37c: 691a ldr r2, [r3, #16] - 802c37e: 687b ldr r3, [r7, #4] - 802c380: 681b ldr r3, [r3, #0] - 802c382: f022 0210 bic.w r2, r2, #16 - 802c386: 611a str r2, [r3, #16] + 802c3fc: 687b ldr r3, [r7, #4] + 802c3fe: 681b ldr r3, [r3, #0] + 802c400: 691a ldr r2, [r3, #16] + 802c402: 687b ldr r3, [r7, #4] + 802c404: 681b ldr r3, [r3, #0] + 802c406: f022 0210 bic.w r2, r2, #16 + 802c40a: 611a str r2, [r3, #16] CCCR.TEST | 0 | 0 | 0 | 1 | 1 CCCR.MON | 0 | 0 | 1 | 1 | 0 TEST.LBCK | 0 | 0 | 0 | 1 | 1 CCCR.ASM | 0 | 1 | 0 | 0 | 0 */ if (hfdcan->Init.Mode == FDCAN_MODE_RESTRICTED_OPERATION) - 802c388: 687b ldr r3, [r7, #4] - 802c38a: 68db ldr r3, [r3, #12] - 802c38c: 2b01 cmp r3, #1 - 802c38e: d108 bne.n 802c3a2 + 802c40c: 687b ldr r3, [r7, #4] + 802c40e: 68db ldr r3, [r3, #12] + 802c410: 2b01 cmp r3, #1 + 802c412: d108 bne.n 802c426 { /* Enable Restricted Operation mode */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_ASM); - 802c390: 687b ldr r3, [r7, #4] - 802c392: 681b ldr r3, [r3, #0] - 802c394: 699a ldr r2, [r3, #24] - 802c396: 687b ldr r3, [r7, #4] - 802c398: 681b ldr r3, [r3, #0] - 802c39a: f042 0204 orr.w r2, r2, #4 - 802c39e: 619a str r2, [r3, #24] - 802c3a0: e030 b.n 802c404 + 802c414: 687b ldr r3, [r7, #4] + 802c416: 681b ldr r3, [r3, #0] + 802c418: 699a ldr r2, [r3, #24] + 802c41a: 687b ldr r3, [r7, #4] + 802c41c: 681b ldr r3, [r3, #0] + 802c41e: f042 0204 orr.w r2, r2, #4 + 802c422: 619a str r2, [r3, #24] + 802c424: e030 b.n 802c488 } else if (hfdcan->Init.Mode != FDCAN_MODE_NORMAL) - 802c3a2: 687b ldr r3, [r7, #4] - 802c3a4: 68db ldr r3, [r3, #12] - 802c3a6: 2b00 cmp r3, #0 - 802c3a8: d02c beq.n 802c404 + 802c426: 687b ldr r3, [r7, #4] + 802c428: 68db ldr r3, [r3, #12] + 802c42a: 2b00 cmp r3, #0 + 802c42c: d02c beq.n 802c488 { if (hfdcan->Init.Mode != FDCAN_MODE_BUS_MONITORING) - 802c3aa: 687b ldr r3, [r7, #4] - 802c3ac: 68db ldr r3, [r3, #12] - 802c3ae: 2b02 cmp r3, #2 - 802c3b0: d020 beq.n 802c3f4 + 802c42e: 687b ldr r3, [r7, #4] + 802c430: 68db ldr r3, [r3, #12] + 802c432: 2b02 cmp r3, #2 + 802c434: d020 beq.n 802c478 { /* Enable write access to TEST register */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_TEST); - 802c3b2: 687b ldr r3, [r7, #4] - 802c3b4: 681b ldr r3, [r3, #0] - 802c3b6: 699a ldr r2, [r3, #24] - 802c3b8: 687b ldr r3, [r7, #4] - 802c3ba: 681b ldr r3, [r3, #0] - 802c3bc: f042 0280 orr.w r2, r2, #128 ; 0x80 - 802c3c0: 619a str r2, [r3, #24] + 802c436: 687b ldr r3, [r7, #4] + 802c438: 681b ldr r3, [r3, #0] + 802c43a: 699a ldr r2, [r3, #24] + 802c43c: 687b ldr r3, [r7, #4] + 802c43e: 681b ldr r3, [r3, #0] + 802c440: f042 0280 orr.w r2, r2, #128 ; 0x80 + 802c444: 619a str r2, [r3, #24] /* Enable LoopBack mode */ SET_BIT(hfdcan->Instance->TEST, FDCAN_TEST_LBCK); - 802c3c2: 687b ldr r3, [r7, #4] - 802c3c4: 681b ldr r3, [r3, #0] - 802c3c6: 691a ldr r2, [r3, #16] - 802c3c8: 687b ldr r3, [r7, #4] - 802c3ca: 681b ldr r3, [r3, #0] - 802c3cc: f042 0210 orr.w r2, r2, #16 - 802c3d0: 611a str r2, [r3, #16] + 802c446: 687b ldr r3, [r7, #4] + 802c448: 681b ldr r3, [r3, #0] + 802c44a: 691a ldr r2, [r3, #16] + 802c44c: 687b ldr r3, [r7, #4] + 802c44e: 681b ldr r3, [r3, #0] + 802c450: f042 0210 orr.w r2, r2, #16 + 802c454: 611a str r2, [r3, #16] if (hfdcan->Init.Mode == FDCAN_MODE_INTERNAL_LOOPBACK) - 802c3d2: 687b ldr r3, [r7, #4] - 802c3d4: 68db ldr r3, [r3, #12] - 802c3d6: 2b03 cmp r3, #3 - 802c3d8: d114 bne.n 802c404 + 802c456: 687b ldr r3, [r7, #4] + 802c458: 68db ldr r3, [r3, #12] + 802c45a: 2b03 cmp r3, #3 + 802c45c: d114 bne.n 802c488 { SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_MON); - 802c3da: 687b ldr r3, [r7, #4] - 802c3dc: 681b ldr r3, [r3, #0] - 802c3de: 699a ldr r2, [r3, #24] - 802c3e0: 687b ldr r3, [r7, #4] - 802c3e2: 681b ldr r3, [r3, #0] - 802c3e4: f042 0220 orr.w r2, r2, #32 - 802c3e8: 619a str r2, [r3, #24] - 802c3ea: e00b b.n 802c404 - 802c3ec: 08042280 .word 0x08042280 - 802c3f0: 4000a000 .word 0x4000a000 + 802c45e: 687b ldr r3, [r7, #4] + 802c460: 681b ldr r3, [r3, #0] + 802c462: 699a ldr r2, [r3, #24] + 802c464: 687b ldr r3, [r7, #4] + 802c466: 681b ldr r3, [r3, #0] + 802c468: f042 0220 orr.w r2, r2, #32 + 802c46c: 619a str r2, [r3, #24] + 802c46e: e00b b.n 802c488 + 802c470: 08042300 .word 0x08042300 + 802c474: 4000a000 .word 0x4000a000 } } else { /* Enable bus monitoring mode */ SET_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_MON); - 802c3f4: 687b ldr r3, [r7, #4] - 802c3f6: 681b ldr r3, [r3, #0] - 802c3f8: 699a ldr r2, [r3, #24] - 802c3fa: 687b ldr r3, [r7, #4] - 802c3fc: 681b ldr r3, [r3, #0] - 802c3fe: f042 0220 orr.w r2, r2, #32 - 802c402: 619a str r2, [r3, #24] + 802c478: 687b ldr r3, [r7, #4] + 802c47a: 681b ldr r3, [r3, #0] + 802c47c: 699a ldr r2, [r3, #24] + 802c47e: 687b ldr r3, [r7, #4] + 802c480: 681b ldr r3, [r3, #0] + 802c482: f042 0220 orr.w r2, r2, #32 + 802c486: 619a str r2, [r3, #24] { /* Nothing to do: normal mode */ } /* Set the nominal bit timing register */ hfdcan->Instance->NBTP = ((((uint32_t)hfdcan->Init.NominalSyncJumpWidth - 1U) << FDCAN_NBTP_NSJW_Pos) | \ - 802c404: 687b ldr r3, [r7, #4] - 802c406: 699b ldr r3, [r3, #24] - 802c408: 3b01 subs r3, #1 - 802c40a: 065a lsls r2, r3, #25 + 802c488: 687b ldr r3, [r7, #4] + 802c48a: 699b ldr r3, [r3, #24] + 802c48c: 3b01 subs r3, #1 + 802c48e: 065a lsls r2, r3, #25 (((uint32_t)hfdcan->Init.NominalTimeSeg1 - 1U) << FDCAN_NBTP_NTSEG1_Pos) | \ - 802c40c: 687b ldr r3, [r7, #4] - 802c40e: 69db ldr r3, [r3, #28] - 802c410: 3b01 subs r3, #1 - 802c412: 021b lsls r3, r3, #8 + 802c490: 687b ldr r3, [r7, #4] + 802c492: 69db ldr r3, [r3, #28] + 802c494: 3b01 subs r3, #1 + 802c496: 021b lsls r3, r3, #8 hfdcan->Instance->NBTP = ((((uint32_t)hfdcan->Init.NominalSyncJumpWidth - 1U) << FDCAN_NBTP_NSJW_Pos) | \ - 802c414: 431a orrs r2, r3 + 802c498: 431a orrs r2, r3 (((uint32_t)hfdcan->Init.NominalTimeSeg2 - 1U) << FDCAN_NBTP_NTSEG2_Pos) | \ - 802c416: 687b ldr r3, [r7, #4] - 802c418: 6a1b ldr r3, [r3, #32] - 802c41a: 3b01 subs r3, #1 + 802c49a: 687b ldr r3, [r7, #4] + 802c49c: 6a1b ldr r3, [r3, #32] + 802c49e: 3b01 subs r3, #1 (((uint32_t)hfdcan->Init.NominalTimeSeg1 - 1U) << FDCAN_NBTP_NTSEG1_Pos) | \ - 802c41c: ea42 0103 orr.w r1, r2, r3 + 802c4a0: ea42 0103 orr.w r1, r2, r3 (((uint32_t)hfdcan->Init.NominalPrescaler - 1U) << FDCAN_NBTP_NBRP_Pos)); - 802c420: 687b ldr r3, [r7, #4] - 802c422: 695b ldr r3, [r3, #20] - 802c424: 3b01 subs r3, #1 - 802c426: 041a lsls r2, r3, #16 + 802c4a4: 687b ldr r3, [r7, #4] + 802c4a6: 695b ldr r3, [r3, #20] + 802c4a8: 3b01 subs r3, #1 + 802c4aa: 041a lsls r2, r3, #16 hfdcan->Instance->NBTP = ((((uint32_t)hfdcan->Init.NominalSyncJumpWidth - 1U) << FDCAN_NBTP_NSJW_Pos) | \ - 802c428: 687b ldr r3, [r7, #4] - 802c42a: 681b ldr r3, [r3, #0] + 802c4ac: 687b ldr r3, [r7, #4] + 802c4ae: 681b ldr r3, [r3, #0] (((uint32_t)hfdcan->Init.NominalTimeSeg2 - 1U) << FDCAN_NBTP_NTSEG2_Pos) | \ - 802c42c: 430a orrs r2, r1 + 802c4b0: 430a orrs r2, r1 hfdcan->Instance->NBTP = ((((uint32_t)hfdcan->Init.NominalSyncJumpWidth - 1U) << FDCAN_NBTP_NSJW_Pos) | \ - 802c42e: 61da str r2, [r3, #28] + 802c4b2: 61da str r2, [r3, #28] /* If FD operation with BRS is selected, set the data bit timing register */ if (hfdcan->Init.FrameFormat == FDCAN_FRAME_FD_BRS) - 802c430: 687b ldr r3, [r7, #4] - 802c432: 689b ldr r3, [r3, #8] - 802c434: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 802c438: d115 bne.n 802c466 + 802c4b4: 687b ldr r3, [r7, #4] + 802c4b6: 689b ldr r3, [r3, #8] + 802c4b8: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 802c4bc: d115 bne.n 802c4ea { hfdcan->Instance->DBTP = ((((uint32_t)hfdcan->Init.DataSyncJumpWidth - 1U) << FDCAN_DBTP_DSJW_Pos) | \ - 802c43a: 687b ldr r3, [r7, #4] - 802c43c: 6a9b ldr r3, [r3, #40] ; 0x28 - 802c43e: 1e5a subs r2, r3, #1 + 802c4be: 687b ldr r3, [r7, #4] + 802c4c0: 6a9b ldr r3, [r3, #40] ; 0x28 + 802c4c2: 1e5a subs r2, r3, #1 (((uint32_t)hfdcan->Init.DataTimeSeg1 - 1U) << FDCAN_DBTP_DTSEG1_Pos) | \ - 802c440: 687b ldr r3, [r7, #4] - 802c442: 6adb ldr r3, [r3, #44] ; 0x2c - 802c444: 3b01 subs r3, #1 - 802c446: 021b lsls r3, r3, #8 + 802c4c4: 687b ldr r3, [r7, #4] + 802c4c6: 6adb ldr r3, [r3, #44] ; 0x2c + 802c4c8: 3b01 subs r3, #1 + 802c4ca: 021b lsls r3, r3, #8 hfdcan->Instance->DBTP = ((((uint32_t)hfdcan->Init.DataSyncJumpWidth - 1U) << FDCAN_DBTP_DSJW_Pos) | \ - 802c448: 431a orrs r2, r3 + 802c4cc: 431a orrs r2, r3 (((uint32_t)hfdcan->Init.DataTimeSeg2 - 1U) << FDCAN_DBTP_DTSEG2_Pos) | \ - 802c44a: 687b ldr r3, [r7, #4] - 802c44c: 6b1b ldr r3, [r3, #48] ; 0x30 - 802c44e: 3b01 subs r3, #1 - 802c450: 011b lsls r3, r3, #4 + 802c4ce: 687b ldr r3, [r7, #4] + 802c4d0: 6b1b ldr r3, [r3, #48] ; 0x30 + 802c4d2: 3b01 subs r3, #1 + 802c4d4: 011b lsls r3, r3, #4 (((uint32_t)hfdcan->Init.DataTimeSeg1 - 1U) << FDCAN_DBTP_DTSEG1_Pos) | \ - 802c452: ea42 0103 orr.w r1, r2, r3 + 802c4d6: ea42 0103 orr.w r1, r2, r3 (((uint32_t)hfdcan->Init.DataPrescaler - 1U) << FDCAN_DBTP_DBRP_Pos)); - 802c456: 687b ldr r3, [r7, #4] - 802c458: 6a5b ldr r3, [r3, #36] ; 0x24 - 802c45a: 3b01 subs r3, #1 - 802c45c: 041a lsls r2, r3, #16 + 802c4da: 687b ldr r3, [r7, #4] + 802c4dc: 6a5b ldr r3, [r3, #36] ; 0x24 + 802c4de: 3b01 subs r3, #1 + 802c4e0: 041a lsls r2, r3, #16 hfdcan->Instance->DBTP = ((((uint32_t)hfdcan->Init.DataSyncJumpWidth - 1U) << FDCAN_DBTP_DSJW_Pos) | \ - 802c45e: 687b ldr r3, [r7, #4] - 802c460: 681b ldr r3, [r3, #0] + 802c4e2: 687b ldr r3, [r7, #4] + 802c4e4: 681b ldr r3, [r3, #0] (((uint32_t)hfdcan->Init.DataTimeSeg2 - 1U) << FDCAN_DBTP_DTSEG2_Pos) | \ - 802c462: 430a orrs r2, r1 + 802c4e6: 430a orrs r2, r1 hfdcan->Instance->DBTP = ((((uint32_t)hfdcan->Init.DataSyncJumpWidth - 1U) << FDCAN_DBTP_DSJW_Pos) | \ - 802c464: 60da str r2, [r3, #12] + 802c4e8: 60da str r2, [r3, #12] } if (hfdcan->Init.TxFifoQueueElmtsNbr > 0U) - 802c466: 687b ldr r3, [r7, #4] - 802c468: 6e1b ldr r3, [r3, #96] ; 0x60 - 802c46a: 2b00 cmp r3, #0 - 802c46c: d00a beq.n 802c484 + 802c4ea: 687b ldr r3, [r7, #4] + 802c4ec: 6e1b ldr r3, [r3, #96] ; 0x60 + 802c4ee: 2b00 cmp r3, #0 + 802c4f0: d00a beq.n 802c508 { /* Select between Tx FIFO and Tx Queue operation modes */ SET_BIT(hfdcan->Instance->TXBC, hfdcan->Init.TxFifoQueueMode); - 802c46e: 687b ldr r3, [r7, #4] - 802c470: 681b ldr r3, [r3, #0] - 802c472: f8d3 10c0 ldr.w r1, [r3, #192] ; 0xc0 - 802c476: 687b ldr r3, [r7, #4] - 802c478: 6e5a ldr r2, [r3, #100] ; 0x64 - 802c47a: 687b ldr r3, [r7, #4] - 802c47c: 681b ldr r3, [r3, #0] - 802c47e: 430a orrs r2, r1 - 802c480: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 + 802c4f2: 687b ldr r3, [r7, #4] + 802c4f4: 681b ldr r3, [r3, #0] + 802c4f6: f8d3 10c0 ldr.w r1, [r3, #192] ; 0xc0 + 802c4fa: 687b ldr r3, [r7, #4] + 802c4fc: 6e5a ldr r2, [r3, #100] ; 0x64 + 802c4fe: 687b ldr r3, [r7, #4] + 802c500: 681b ldr r3, [r3, #0] + 802c502: 430a orrs r2, r1 + 802c504: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 } /* Configure Tx element size */ if ((hfdcan->Init.TxBuffersNbr + hfdcan->Init.TxFifoQueueElmtsNbr) > 0U) - 802c484: 687b ldr r3, [r7, #4] - 802c486: 6dda ldr r2, [r3, #92] ; 0x5c - 802c488: 687b ldr r3, [r7, #4] - 802c48a: 6e1b ldr r3, [r3, #96] ; 0x60 - 802c48c: 4413 add r3, r2 - 802c48e: 2b00 cmp r3, #0 - 802c490: d011 beq.n 802c4b6 + 802c508: 687b ldr r3, [r7, #4] + 802c50a: 6dda ldr r2, [r3, #92] ; 0x5c + 802c50c: 687b ldr r3, [r7, #4] + 802c50e: 6e1b ldr r3, [r3, #96] ; 0x60 + 802c510: 4413 add r3, r2 + 802c512: 2b00 cmp r3, #0 + 802c514: d011 beq.n 802c53a { MODIFY_REG(hfdcan->Instance->TXESC, FDCAN_TXESC_TBDS, CvtEltSize[hfdcan->Init.TxElmtSize]); - 802c492: 687b ldr r3, [r7, #4] - 802c494: 681b ldr r3, [r3, #0] - 802c496: f8d3 30c8 ldr.w r3, [r3, #200] ; 0xc8 - 802c49a: f023 0107 bic.w r1, r3, #7 - 802c49e: 687b ldr r3, [r7, #4] - 802c4a0: 6e9b ldr r3, [r3, #104] ; 0x68 - 802c4a2: 009b lsls r3, r3, #2 - 802c4a4: 3360 adds r3, #96 ; 0x60 - 802c4a6: 443b add r3, r7 - 802c4a8: f853 2c54 ldr.w r2, [r3, #-84] - 802c4ac: 687b ldr r3, [r7, #4] - 802c4ae: 681b ldr r3, [r3, #0] - 802c4b0: 430a orrs r2, r1 - 802c4b2: f8c3 20c8 str.w r2, [r3, #200] ; 0xc8 + 802c516: 687b ldr r3, [r7, #4] + 802c518: 681b ldr r3, [r3, #0] + 802c51a: f8d3 30c8 ldr.w r3, [r3, #200] ; 0xc8 + 802c51e: f023 0107 bic.w r1, r3, #7 + 802c522: 687b ldr r3, [r7, #4] + 802c524: 6e9b ldr r3, [r3, #104] ; 0x68 + 802c526: 009b lsls r3, r3, #2 + 802c528: 3360 adds r3, #96 ; 0x60 + 802c52a: 443b add r3, r7 + 802c52c: f853 2c54 ldr.w r2, [r3, #-84] + 802c530: 687b ldr r3, [r7, #4] + 802c532: 681b ldr r3, [r3, #0] + 802c534: 430a orrs r2, r1 + 802c536: f8c3 20c8 str.w r2, [r3, #200] ; 0xc8 } /* Configure Rx FIFO 0 element size */ if (hfdcan->Init.RxFifo0ElmtsNbr > 0U) - 802c4b6: 687b ldr r3, [r7, #4] - 802c4b8: 6c1b ldr r3, [r3, #64] ; 0x40 - 802c4ba: 2b00 cmp r3, #0 - 802c4bc: d011 beq.n 802c4e2 + 802c53a: 687b ldr r3, [r7, #4] + 802c53c: 6c1b ldr r3, [r3, #64] ; 0x40 + 802c53e: 2b00 cmp r3, #0 + 802c540: d011 beq.n 802c566 { MODIFY_REG(hfdcan->Instance->RXESC, FDCAN_RXESC_F0DS, (CvtEltSize[hfdcan->Init.RxFifo0ElmtSize] << FDCAN_RXESC_F0DS_Pos)); - 802c4be: 687b ldr r3, [r7, #4] - 802c4c0: 681b ldr r3, [r3, #0] - 802c4c2: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc - 802c4c6: f023 0107 bic.w r1, r3, #7 - 802c4ca: 687b ldr r3, [r7, #4] - 802c4cc: 6c5b ldr r3, [r3, #68] ; 0x44 - 802c4ce: 009b lsls r3, r3, #2 - 802c4d0: 3360 adds r3, #96 ; 0x60 - 802c4d2: 443b add r3, r7 - 802c4d4: f853 2c54 ldr.w r2, [r3, #-84] - 802c4d8: 687b ldr r3, [r7, #4] - 802c4da: 681b ldr r3, [r3, #0] - 802c4dc: 430a orrs r2, r1 - 802c4de: f8c3 20bc str.w r2, [r3, #188] ; 0xbc + 802c542: 687b ldr r3, [r7, #4] + 802c544: 681b ldr r3, [r3, #0] + 802c546: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc + 802c54a: f023 0107 bic.w r1, r3, #7 + 802c54e: 687b ldr r3, [r7, #4] + 802c550: 6c5b ldr r3, [r3, #68] ; 0x44 + 802c552: 009b lsls r3, r3, #2 + 802c554: 3360 adds r3, #96 ; 0x60 + 802c556: 443b add r3, r7 + 802c558: f853 2c54 ldr.w r2, [r3, #-84] + 802c55c: 687b ldr r3, [r7, #4] + 802c55e: 681b ldr r3, [r3, #0] + 802c560: 430a orrs r2, r1 + 802c562: f8c3 20bc str.w r2, [r3, #188] ; 0xbc } /* Configure Rx FIFO 1 element size */ if (hfdcan->Init.RxFifo1ElmtsNbr > 0U) - 802c4e2: 687b ldr r3, [r7, #4] - 802c4e4: 6c9b ldr r3, [r3, #72] ; 0x48 - 802c4e6: 2b00 cmp r3, #0 - 802c4e8: d012 beq.n 802c510 + 802c566: 687b ldr r3, [r7, #4] + 802c568: 6c9b ldr r3, [r3, #72] ; 0x48 + 802c56a: 2b00 cmp r3, #0 + 802c56c: d012 beq.n 802c594 { MODIFY_REG(hfdcan->Instance->RXESC, FDCAN_RXESC_F1DS, (CvtEltSize[hfdcan->Init.RxFifo1ElmtSize] << FDCAN_RXESC_F1DS_Pos)); - 802c4ea: 687b ldr r3, [r7, #4] - 802c4ec: 681b ldr r3, [r3, #0] - 802c4ee: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc - 802c4f2: f023 0170 bic.w r1, r3, #112 ; 0x70 - 802c4f6: 687b ldr r3, [r7, #4] - 802c4f8: 6cdb ldr r3, [r3, #76] ; 0x4c - 802c4fa: 009b lsls r3, r3, #2 - 802c4fc: 3360 adds r3, #96 ; 0x60 - 802c4fe: 443b add r3, r7 - 802c500: f853 3c54 ldr.w r3, [r3, #-84] - 802c504: 011a lsls r2, r3, #4 - 802c506: 687b ldr r3, [r7, #4] - 802c508: 681b ldr r3, [r3, #0] - 802c50a: 430a orrs r2, r1 - 802c50c: f8c3 20bc str.w r2, [r3, #188] ; 0xbc + 802c56e: 687b ldr r3, [r7, #4] + 802c570: 681b ldr r3, [r3, #0] + 802c572: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc + 802c576: f023 0170 bic.w r1, r3, #112 ; 0x70 + 802c57a: 687b ldr r3, [r7, #4] + 802c57c: 6cdb ldr r3, [r3, #76] ; 0x4c + 802c57e: 009b lsls r3, r3, #2 + 802c580: 3360 adds r3, #96 ; 0x60 + 802c582: 443b add r3, r7 + 802c584: f853 3c54 ldr.w r3, [r3, #-84] + 802c588: 011a lsls r2, r3, #4 + 802c58a: 687b ldr r3, [r7, #4] + 802c58c: 681b ldr r3, [r3, #0] + 802c58e: 430a orrs r2, r1 + 802c590: f8c3 20bc str.w r2, [r3, #188] ; 0xbc } /* Configure Rx buffer element size */ if (hfdcan->Init.RxBuffersNbr > 0U) - 802c510: 687b ldr r3, [r7, #4] - 802c512: 6d1b ldr r3, [r3, #80] ; 0x50 - 802c514: 2b00 cmp r3, #0 - 802c516: d012 beq.n 802c53e + 802c594: 687b ldr r3, [r7, #4] + 802c596: 6d1b ldr r3, [r3, #80] ; 0x50 + 802c598: 2b00 cmp r3, #0 + 802c59a: d012 beq.n 802c5c2 { MODIFY_REG(hfdcan->Instance->RXESC, FDCAN_RXESC_RBDS, (CvtEltSize[hfdcan->Init.RxBufferSize] << FDCAN_RXESC_RBDS_Pos)); - 802c518: 687b ldr r3, [r7, #4] - 802c51a: 681b ldr r3, [r3, #0] - 802c51c: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc - 802c520: f423 61e0 bic.w r1, r3, #1792 ; 0x700 - 802c524: 687b ldr r3, [r7, #4] - 802c526: 6d5b ldr r3, [r3, #84] ; 0x54 - 802c528: 009b lsls r3, r3, #2 - 802c52a: 3360 adds r3, #96 ; 0x60 - 802c52c: 443b add r3, r7 - 802c52e: f853 3c54 ldr.w r3, [r3, #-84] - 802c532: 021a lsls r2, r3, #8 - 802c534: 687b ldr r3, [r7, #4] - 802c536: 681b ldr r3, [r3, #0] - 802c538: 430a orrs r2, r1 - 802c53a: f8c3 20bc str.w r2, [r3, #188] ; 0xbc + 802c59c: 687b ldr r3, [r7, #4] + 802c59e: 681b ldr r3, [r3, #0] + 802c5a0: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc + 802c5a4: f423 61e0 bic.w r1, r3, #1792 ; 0x700 + 802c5a8: 687b ldr r3, [r7, #4] + 802c5aa: 6d5b ldr r3, [r3, #84] ; 0x54 + 802c5ac: 009b lsls r3, r3, #2 + 802c5ae: 3360 adds r3, #96 ; 0x60 + 802c5b0: 443b add r3, r7 + 802c5b2: f853 3c54 ldr.w r3, [r3, #-84] + 802c5b6: 021a lsls r2, r3, #8 + 802c5b8: 687b ldr r3, [r7, #4] + 802c5ba: 681b ldr r3, [r3, #0] + 802c5bc: 430a orrs r2, r1 + 802c5be: f8c3 20bc str.w r2, [r3, #188] ; 0xbc } /* By default operation mode is set to Event-driven communication. If Time-triggered communication is needed, user should call the HAL_FDCAN_TT_ConfigOperation function just after the HAL_FDCAN_Init */ if (hfdcan->Instance == FDCAN1) - 802c53e: 687b ldr r3, [r7, #4] - 802c540: 681b ldr r3, [r3, #0] - 802c542: 4a11 ldr r2, [pc, #68] ; (802c588 ) - 802c544: 4293 cmp r3, r2 - 802c546: d107 bne.n 802c558 + 802c5c2: 687b ldr r3, [r7, #4] + 802c5c4: 681b ldr r3, [r3, #0] + 802c5c6: 4a11 ldr r2, [pc, #68] ; (802c60c ) + 802c5c8: 4293 cmp r3, r2 + 802c5ca: d107 bne.n 802c5dc { CLEAR_BIT(hfdcan->ttcan->TTOCF, FDCAN_TTOCF_OM); - 802c548: 687b ldr r3, [r7, #4] - 802c54a: 685b ldr r3, [r3, #4] - 802c54c: 689a ldr r2, [r3, #8] - 802c54e: 687b ldr r3, [r7, #4] - 802c550: 685b ldr r3, [r3, #4] - 802c552: f022 0203 bic.w r2, r2, #3 - 802c556: 609a str r2, [r3, #8] + 802c5cc: 687b ldr r3, [r7, #4] + 802c5ce: 685b ldr r3, [r3, #4] + 802c5d0: 689a ldr r2, [r3, #8] + 802c5d2: 687b ldr r3, [r7, #4] + 802c5d4: 685b ldr r3, [r3, #4] + 802c5d6: f022 0203 bic.w r2, r2, #3 + 802c5da: 609a str r2, [r3, #8] } /* Initialize the Latest Tx FIFO/Queue request buffer index */ hfdcan->LatestTxFifoQRequest = 0U; - 802c558: 687b ldr r3, [r7, #4] - 802c55a: 2200 movs r2, #0 - 802c55c: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 802c5dc: 687b ldr r3, [r7, #4] + 802c5de: 2200 movs r2, #0 + 802c5e0: f8c3 2094 str.w r2, [r3, #148] ; 0x94 /* Initialize the error code */ hfdcan->ErrorCode = HAL_FDCAN_ERROR_NONE; - 802c560: 687b ldr r3, [r7, #4] - 802c562: 2200 movs r2, #0 - 802c564: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c5e4: 687b ldr r3, [r7, #4] + 802c5e6: 2200 movs r2, #0 + 802c5e8: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Initialize the FDCAN state */ hfdcan->State = HAL_FDCAN_STATE_READY; - 802c568: 687b ldr r3, [r7, #4] - 802c56a: 2201 movs r2, #1 - 802c56c: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802c5ec: 687b ldr r3, [r7, #4] + 802c5ee: 2201 movs r2, #1 + 802c5f0: f883 2098 strb.w r2, [r3, #152] ; 0x98 /* Calculate each RAM block address */ status = FDCAN_CalcultateRamBlockAddresses(hfdcan); - 802c570: 6878 ldr r0, [r7, #4] - 802c572: f000 fd77 bl 802d064 - 802c576: 4603 mov r3, r0 - 802c578: f887 305b strb.w r3, [r7, #91] ; 0x5b + 802c5f4: 6878 ldr r0, [r7, #4] + 802c5f6: f000 fd77 bl 802d0e8 + 802c5fa: 4603 mov r3, r0 + 802c5fc: f887 305b strb.w r3, [r7, #91] ; 0x5b /* Return function status */ return status; - 802c57c: f897 305b ldrb.w r3, [r7, #91] ; 0x5b + 802c600: f897 305b ldrb.w r3, [r7, #91] ; 0x5b } - 802c580: 4618 mov r0, r3 - 802c582: 3760 adds r7, #96 ; 0x60 - 802c584: 46bd mov sp, r7 - 802c586: bd80 pop {r7, pc} - 802c588: 4000a000 .word 0x4000a000 + 802c604: 4618 mov r0, r3 + 802c606: 3760 adds r7, #96 ; 0x60 + 802c608: 46bd mov sp, r7 + 802c60a: bd80 pop {r7, pc} + 802c60c: 4000a000 .word 0x4000a000 -0802c58c : +0802c610 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_Start(FDCAN_HandleTypeDef *hfdcan) { - 802c58c: b480 push {r7} - 802c58e: b083 sub sp, #12 - 802c590: af00 add r7, sp, #0 - 802c592: 6078 str r0, [r7, #4] + 802c610: b480 push {r7} + 802c612: b083 sub sp, #12 + 802c614: af00 add r7, sp, #0 + 802c616: 6078 str r0, [r7, #4] if (hfdcan->State == HAL_FDCAN_STATE_READY) - 802c594: 687b ldr r3, [r7, #4] - 802c596: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c59a: b2db uxtb r3, r3 - 802c59c: 2b01 cmp r3, #1 - 802c59e: d111 bne.n 802c5c4 + 802c618: 687b ldr r3, [r7, #4] + 802c61a: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802c61e: b2db uxtb r3, r3 + 802c620: 2b01 cmp r3, #1 + 802c622: d111 bne.n 802c648 { /* Change FDCAN peripheral state */ hfdcan->State = HAL_FDCAN_STATE_BUSY; - 802c5a0: 687b ldr r3, [r7, #4] - 802c5a2: 2202 movs r2, #2 - 802c5a4: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802c624: 687b ldr r3, [r7, #4] + 802c626: 2202 movs r2, #2 + 802c628: f883 2098 strb.w r2, [r3, #152] ; 0x98 /* Request leave initialisation */ CLEAR_BIT(hfdcan->Instance->CCCR, FDCAN_CCCR_INIT); - 802c5a8: 687b ldr r3, [r7, #4] - 802c5aa: 681b ldr r3, [r3, #0] - 802c5ac: 699a ldr r2, [r3, #24] - 802c5ae: 687b ldr r3, [r7, #4] - 802c5b0: 681b ldr r3, [r3, #0] - 802c5b2: f022 0201 bic.w r2, r2, #1 - 802c5b6: 619a str r2, [r3, #24] + 802c62c: 687b ldr r3, [r7, #4] + 802c62e: 681b ldr r3, [r3, #0] + 802c630: 699a ldr r2, [r3, #24] + 802c632: 687b ldr r3, [r7, #4] + 802c634: 681b ldr r3, [r3, #0] + 802c636: f022 0201 bic.w r2, r2, #1 + 802c63a: 619a str r2, [r3, #24] /* Reset the FDCAN ErrorCode */ hfdcan->ErrorCode = HAL_FDCAN_ERROR_NONE; - 802c5b8: 687b ldr r3, [r7, #4] - 802c5ba: 2200 movs r2, #0 - 802c5bc: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c63c: 687b ldr r3, [r7, #4] + 802c63e: 2200 movs r2, #0 + 802c640: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Return function status */ return HAL_OK; - 802c5c0: 2300 movs r3, #0 - 802c5c2: e008 b.n 802c5d6 + 802c644: 2300 movs r3, #0 + 802c646: e008 b.n 802c65a } else { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_NOT_READY; - 802c5c4: 687b ldr r3, [r7, #4] - 802c5c6: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c5ca: f043 0204 orr.w r2, r3, #4 - 802c5ce: 687b ldr r3, [r7, #4] - 802c5d0: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c648: 687b ldr r3, [r7, #4] + 802c64a: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c64e: f043 0204 orr.w r2, r3, #4 + 802c652: 687b ldr r3, [r7, #4] + 802c654: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c5d4: 2301 movs r3, #1 + 802c658: 2301 movs r3, #1 } } - 802c5d6: 4618 mov r0, r3 - 802c5d8: 370c adds r7, #12 - 802c5da: 46bd mov sp, r7 - 802c5dc: f85d 7b04 ldr.w r7, [sp], #4 - 802c5e0: 4770 bx lr + 802c65a: 4618 mov r0, r3 + 802c65c: 370c adds r7, #12 + 802c65e: 46bd mov sp, r7 + 802c660: f85d 7b04 ldr.w r7, [sp], #4 + 802c664: 4770 bx lr -0802c5e2 : +0802c666 : * @param pTxHeader pointer to a FDCAN_TxHeaderTypeDef structure. * @param pTxData pointer to a buffer containing the payload of the Tx frame. * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_AddMessageToTxFifoQ(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData) { - 802c5e2: b580 push {r7, lr} - 802c5e4: b086 sub sp, #24 - 802c5e6: af00 add r7, sp, #0 - 802c5e8: 60f8 str r0, [r7, #12] - 802c5ea: 60b9 str r1, [r7, #8] - 802c5ec: 607a str r2, [r7, #4] + 802c666: b580 push {r7, lr} + 802c668: b086 sub sp, #24 + 802c66a: af00 add r7, sp, #0 + 802c66c: 60f8 str r0, [r7, #12] + 802c66e: 60b9 str r1, [r7, #8] + 802c670: 607a str r2, [r7, #4] assert_param(IS_FDCAN_BRS(pTxHeader->BitRateSwitch)); assert_param(IS_FDCAN_FDF(pTxHeader->FDFormat)); assert_param(IS_FDCAN_EFC(pTxHeader->TxEventFifoControl)); assert_param(IS_FDCAN_MAX_VALUE(pTxHeader->MessageMarker, 0xFFU)); if (hfdcan->State == HAL_FDCAN_STATE_BUSY) - 802c5ee: 68fb ldr r3, [r7, #12] - 802c5f0: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c5f4: b2db uxtb r3, r3 - 802c5f6: 2b02 cmp r3, #2 - 802c5f8: d141 bne.n 802c67e + 802c672: 68fb ldr r3, [r7, #12] + 802c674: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802c678: b2db uxtb r3, r3 + 802c67a: 2b02 cmp r3, #2 + 802c67c: d141 bne.n 802c702 { /* Check that the Tx FIFO/Queue has an allocated area into the RAM */ if ((hfdcan->Instance->TXBC & FDCAN_TXBC_TFQS) == 0U) - 802c5fa: 68fb ldr r3, [r7, #12] - 802c5fc: 681b ldr r3, [r3, #0] - 802c5fe: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802c602: f003 537c and.w r3, r3, #1056964608 ; 0x3f000000 - 802c606: 2b00 cmp r3, #0 - 802c608: d109 bne.n 802c61e + 802c67e: 68fb ldr r3, [r7, #12] + 802c680: 681b ldr r3, [r3, #0] + 802c682: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802c686: f003 537c and.w r3, r3, #1056964608 ; 0x3f000000 + 802c68a: 2b00 cmp r3, #0 + 802c68c: d109 bne.n 802c6a2 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802c60a: 68fb ldr r3, [r7, #12] - 802c60c: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c610: f043 0220 orr.w r2, r3, #32 - 802c614: 68fb ldr r3, [r7, #12] - 802c616: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c68e: 68fb ldr r3, [r7, #12] + 802c690: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c694: f043 0220 orr.w r2, r3, #32 + 802c698: 68fb ldr r3, [r7, #12] + 802c69a: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c61a: 2301 movs r3, #1 - 802c61c: e038 b.n 802c690 + 802c69e: 2301 movs r3, #1 + 802c6a0: e038 b.n 802c714 } /* Check that the Tx FIFO/Queue is not full */ if ((hfdcan->Instance->TXFQS & FDCAN_TXFQS_TFQF) != 0U) - 802c61e: 68fb ldr r3, [r7, #12] - 802c620: 681b ldr r3, [r3, #0] - 802c622: f8d3 30c4 ldr.w r3, [r3, #196] ; 0xc4 - 802c626: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 802c62a: 2b00 cmp r3, #0 - 802c62c: d009 beq.n 802c642 + 802c6a2: 68fb ldr r3, [r7, #12] + 802c6a4: 681b ldr r3, [r3, #0] + 802c6a6: f8d3 30c4 ldr.w r3, [r3, #196] ; 0xc4 + 802c6aa: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 802c6ae: 2b00 cmp r3, #0 + 802c6b0: d009 beq.n 802c6c6 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_FIFO_FULL; - 802c62e: 68fb ldr r3, [r7, #12] - 802c630: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c634: f443 7200 orr.w r2, r3, #512 ; 0x200 - 802c638: 68fb ldr r3, [r7, #12] - 802c63a: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c6b2: 68fb ldr r3, [r7, #12] + 802c6b4: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c6b8: f443 7200 orr.w r2, r3, #512 ; 0x200 + 802c6bc: 68fb ldr r3, [r7, #12] + 802c6be: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c63e: 2301 movs r3, #1 - 802c640: e026 b.n 802c690 + 802c6c2: 2301 movs r3, #1 + 802c6c4: e026 b.n 802c714 } else { /* Retrieve the Tx FIFO PutIndex */ PutIndex = ((hfdcan->Instance->TXFQS & FDCAN_TXFQS_TFQPI) >> FDCAN_TXFQS_TFQPI_Pos); - 802c642: 68fb ldr r3, [r7, #12] - 802c644: 681b ldr r3, [r3, #0] - 802c646: f8d3 30c4 ldr.w r3, [r3, #196] ; 0xc4 - 802c64a: 0c1b lsrs r3, r3, #16 - 802c64c: f003 031f and.w r3, r3, #31 - 802c650: 617b str r3, [r7, #20] + 802c6c6: 68fb ldr r3, [r7, #12] + 802c6c8: 681b ldr r3, [r3, #0] + 802c6ca: f8d3 30c4 ldr.w r3, [r3, #196] ; 0xc4 + 802c6ce: 0c1b lsrs r3, r3, #16 + 802c6d0: f003 031f and.w r3, r3, #31 + 802c6d4: 617b str r3, [r7, #20] /* Add the message to the Tx FIFO/Queue */ FDCAN_CopyMessageToRAM(hfdcan, pTxHeader, pTxData, PutIndex); - 802c652: 697b ldr r3, [r7, #20] - 802c654: 687a ldr r2, [r7, #4] - 802c656: 68b9 ldr r1, [r7, #8] - 802c658: 68f8 ldr r0, [r7, #12] - 802c65a: f000 fe89 bl 802d370 + 802c6d6: 697b ldr r3, [r7, #20] + 802c6d8: 687a ldr r2, [r7, #4] + 802c6da: 68b9 ldr r1, [r7, #8] + 802c6dc: 68f8 ldr r0, [r7, #12] + 802c6de: f000 fe89 bl 802d3f4 /* Activate the corresponding transmission request */ hfdcan->Instance->TXBAR = ((uint32_t)1 << PutIndex); - 802c65e: 68fb ldr r3, [r7, #12] - 802c660: 681b ldr r3, [r3, #0] - 802c662: 2101 movs r1, #1 - 802c664: 697a ldr r2, [r7, #20] - 802c666: fa01 f202 lsl.w r2, r1, r2 - 802c66a: f8c3 20d0 str.w r2, [r3, #208] ; 0xd0 + 802c6e2: 68fb ldr r3, [r7, #12] + 802c6e4: 681b ldr r3, [r3, #0] + 802c6e6: 2101 movs r1, #1 + 802c6e8: 697a ldr r2, [r7, #20] + 802c6ea: fa01 f202 lsl.w r2, r1, r2 + 802c6ee: f8c3 20d0 str.w r2, [r3, #208] ; 0xd0 /* Store the Latest Tx FIFO/Queue Request Buffer Index */ hfdcan->LatestTxFifoQRequest = ((uint32_t)1 << PutIndex); - 802c66e: 2201 movs r2, #1 - 802c670: 697b ldr r3, [r7, #20] - 802c672: 409a lsls r2, r3 - 802c674: 68fb ldr r3, [r7, #12] - 802c676: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 802c6f2: 2201 movs r2, #1 + 802c6f4: 697b ldr r3, [r7, #20] + 802c6f6: 409a lsls r2, r3 + 802c6f8: 68fb ldr r3, [r7, #12] + 802c6fa: f8c3 2094 str.w r2, [r3, #148] ; 0x94 } /* Return function status */ return HAL_OK; - 802c67a: 2300 movs r3, #0 - 802c67c: e008 b.n 802c690 + 802c6fe: 2300 movs r3, #0 + 802c700: e008 b.n 802c714 } else { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_NOT_STARTED; - 802c67e: 68fb ldr r3, [r7, #12] - 802c680: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c684: f043 0208 orr.w r2, r3, #8 - 802c688: 68fb ldr r3, [r7, #12] - 802c68a: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c702: 68fb ldr r3, [r7, #12] + 802c704: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c708: f043 0208 orr.w r2, r3, #8 + 802c70c: 68fb ldr r3, [r7, #12] + 802c70e: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c68e: 2301 movs r3, #1 + 802c712: 2301 movs r3, #1 } } - 802c690: 4618 mov r0, r3 - 802c692: 3718 adds r7, #24 - 802c694: 46bd mov sp, r7 - 802c696: bd80 pop {r7, pc} + 802c714: 4618 mov r0, r3 + 802c716: 3718 adds r7, #24 + 802c718: 46bd mov sp, r7 + 802c71a: bd80 pop {r7, pc} -0802c698 : +0802c71c : * @param pRxHeader pointer to a FDCAN_RxHeaderTypeDef structure. * @param pRxData pointer to a buffer where the payload of the Rx frame will be stored. * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_GetRxMessage(FDCAN_HandleTypeDef *hfdcan, uint32_t RxLocation, FDCAN_RxHeaderTypeDef *pRxHeader, uint8_t *pRxData) { - 802c698: b480 push {r7} - 802c69a: b08b sub sp, #44 ; 0x2c - 802c69c: af00 add r7, sp, #0 - 802c69e: 60f8 str r0, [r7, #12] - 802c6a0: 60b9 str r1, [r7, #8] - 802c6a2: 607a str r2, [r7, #4] - 802c6a4: 603b str r3, [r7, #0] + 802c71c: b480 push {r7} + 802c71e: b08b sub sp, #44 ; 0x2c + 802c720: af00 add r7, sp, #0 + 802c722: 60f8 str r0, [r7, #12] + 802c724: 60b9 str r1, [r7, #8] + 802c726: 607a str r2, [r7, #4] + 802c728: 603b str r3, [r7, #0] uint32_t *RxAddress; uint8_t *pData; uint32_t ByteCounter; uint32_t GetIndex = 0; - 802c6a6: 2300 movs r3, #0 - 802c6a8: 61fb str r3, [r7, #28] + 802c72a: 2300 movs r3, #0 + 802c72c: 61fb str r3, [r7, #28] HAL_FDCAN_StateTypeDef state = hfdcan->State; - 802c6aa: 68fb ldr r3, [r7, #12] - 802c6ac: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c6b0: 76fb strb r3, [r7, #27] + 802c72e: 68fb ldr r3, [r7, #12] + 802c730: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802c734: 76fb strb r3, [r7, #27] if (state == HAL_FDCAN_STATE_BUSY) - 802c6b2: 7efb ldrb r3, [r7, #27] - 802c6b4: 2b02 cmp r3, #2 - 802c6b6: f040 814b bne.w 802c950 + 802c736: 7efb ldrb r3, [r7, #27] + 802c738: 2b02 cmp r3, #2 + 802c73a: f040 814b bne.w 802c9d4 { if (RxLocation == FDCAN_RX_FIFO0) /* Rx element is assigned to the Rx FIFO 0 */ - 802c6ba: 68bb ldr r3, [r7, #8] - 802c6bc: 2b40 cmp r3, #64 ; 0x40 - 802c6be: d14d bne.n 802c75c + 802c73e: 68bb ldr r3, [r7, #8] + 802c740: 2b40 cmp r3, #64 ; 0x40 + 802c742: d14d bne.n 802c7e0 { /* Check that the Rx FIFO 0 has an allocated area into the RAM */ if ((hfdcan->Instance->RXF0C & FDCAN_RXF0C_F0S) == 0U) - 802c6c0: 68fb ldr r3, [r7, #12] - 802c6c2: 681b ldr r3, [r3, #0] - 802c6c4: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 802c6c8: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 802c6cc: 2b00 cmp r3, #0 - 802c6ce: d109 bne.n 802c6e4 + 802c744: 68fb ldr r3, [r7, #12] + 802c746: 681b ldr r3, [r3, #0] + 802c748: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 802c74c: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 802c750: 2b00 cmp r3, #0 + 802c752: d109 bne.n 802c768 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802c6d0: 68fb ldr r3, [r7, #12] - 802c6d2: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c6d6: f043 0220 orr.w r2, r3, #32 - 802c6da: 68fb ldr r3, [r7, #12] - 802c6dc: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c754: 68fb ldr r3, [r7, #12] + 802c756: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c75a: f043 0220 orr.w r2, r3, #32 + 802c75e: 68fb ldr r3, [r7, #12] + 802c760: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c6e0: 2301 movs r3, #1 - 802c6e2: e13e b.n 802c962 + 802c764: 2301 movs r3, #1 + 802c766: e13e b.n 802c9e6 } /* Check that the Rx FIFO 0 is not empty */ if ((hfdcan->Instance->RXF0S & FDCAN_RXF0S_F0FL) == 0U) - 802c6e4: 68fb ldr r3, [r7, #12] - 802c6e6: 681b ldr r3, [r3, #0] - 802c6e8: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802c6ec: f003 037f and.w r3, r3, #127 ; 0x7f - 802c6f0: 2b00 cmp r3, #0 - 802c6f2: d109 bne.n 802c708 + 802c768: 68fb ldr r3, [r7, #12] + 802c76a: 681b ldr r3, [r3, #0] + 802c76c: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 802c770: f003 037f and.w r3, r3, #127 ; 0x7f + 802c774: 2b00 cmp r3, #0 + 802c776: d109 bne.n 802c78c { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_FIFO_EMPTY; - 802c6f4: 68fb ldr r3, [r7, #12] - 802c6f6: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c6fa: f443 7280 orr.w r2, r3, #256 ; 0x100 - 802c6fe: 68fb ldr r3, [r7, #12] - 802c700: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c778: 68fb ldr r3, [r7, #12] + 802c77a: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c77e: f443 7280 orr.w r2, r3, #256 ; 0x100 + 802c782: 68fb ldr r3, [r7, #12] + 802c784: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c704: 2301 movs r3, #1 - 802c706: e12c b.n 802c962 + 802c788: 2301 movs r3, #1 + 802c78a: e12c b.n 802c9e6 } else { /* Check that the Rx FIFO 0 is full & overwrite mode is on*/ if(((hfdcan->Instance->RXF0S & FDCAN_RXF0S_F0F) >> FDCAN_RXF0S_F0F_Pos) == 1U) - 802c708: 68fb ldr r3, [r7, #12] - 802c70a: 681b ldr r3, [r3, #0] - 802c70c: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802c710: 0e1b lsrs r3, r3, #24 - 802c712: f003 0301 and.w r3, r3, #1 - 802c716: 2b01 cmp r3, #1 - 802c718: d10b bne.n 802c732 + 802c78c: 68fb ldr r3, [r7, #12] + 802c78e: 681b ldr r3, [r3, #0] + 802c790: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 802c794: 0e1b lsrs r3, r3, #24 + 802c796: f003 0301 and.w r3, r3, #1 + 802c79a: 2b01 cmp r3, #1 + 802c79c: d10b bne.n 802c7b6 { if(((hfdcan->Instance->RXF0C & FDCAN_RXF0C_F0OM) >> FDCAN_RXF0C_F0OM_Pos) == FDCAN_RX_FIFO_OVERWRITE) - 802c71a: 68fb ldr r3, [r7, #12] - 802c71c: 681b ldr r3, [r3, #0] - 802c71e: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 802c722: 0fdb lsrs r3, r3, #31 - 802c724: f003 0301 and.w r3, r3, #1 - 802c728: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802c72c: d101 bne.n 802c732 + 802c79e: 68fb ldr r3, [r7, #12] + 802c7a0: 681b ldr r3, [r3, #0] + 802c7a2: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 802c7a6: 0fdb lsrs r3, r3, #31 + 802c7a8: f003 0301 and.w r3, r3, #1 + 802c7ac: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802c7b0: d101 bne.n 802c7b6 { /* When overwrite status is on discard first message in FIFO */ GetIndex = 1U; - 802c72e: 2301 movs r3, #1 - 802c730: 61fb str r3, [r7, #28] + 802c7b2: 2301 movs r3, #1 + 802c7b4: 61fb str r3, [r7, #28] } } /* Calculate Rx FIFO 0 element index*/ GetIndex += ((hfdcan->Instance->RXF0S & FDCAN_RXF0S_F0GI) >> FDCAN_RXF0S_F0GI_Pos); - 802c732: 68fb ldr r3, [r7, #12] - 802c734: 681b ldr r3, [r3, #0] - 802c736: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802c73a: 0a1b lsrs r3, r3, #8 - 802c73c: f003 033f and.w r3, r3, #63 ; 0x3f - 802c740: 69fa ldr r2, [r7, #28] - 802c742: 4413 add r3, r2 - 802c744: 61fb str r3, [r7, #28] + 802c7b6: 68fb ldr r3, [r7, #12] + 802c7b8: 681b ldr r3, [r3, #0] + 802c7ba: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 802c7be: 0a1b lsrs r3, r3, #8 + 802c7c0: f003 033f and.w r3, r3, #63 ; 0x3f + 802c7c4: 69fa ldr r2, [r7, #28] + 802c7c6: 4413 add r3, r2 + 802c7c8: 61fb str r3, [r7, #28] /* Calculate Rx FIFO 0 element address */ RxAddress = (uint32_t *)(hfdcan->msgRam.RxFIFO0SA + (GetIndex * hfdcan->Init.RxFifo0ElmtSize * 4U)); - 802c746: 68fb ldr r3, [r7, #12] - 802c748: 6f5a ldr r2, [r3, #116] ; 0x74 - 802c74a: 68fb ldr r3, [r7, #12] - 802c74c: 6c5b ldr r3, [r3, #68] ; 0x44 - 802c74e: 69f9 ldr r1, [r7, #28] - 802c750: fb01 f303 mul.w r3, r1, r3 - 802c754: 009b lsls r3, r3, #2 - 802c756: 4413 add r3, r2 - 802c758: 627b str r3, [r7, #36] ; 0x24 - 802c75a: e069 b.n 802c830 + 802c7ca: 68fb ldr r3, [r7, #12] + 802c7cc: 6f5a ldr r2, [r3, #116] ; 0x74 + 802c7ce: 68fb ldr r3, [r7, #12] + 802c7d0: 6c5b ldr r3, [r3, #68] ; 0x44 + 802c7d2: 69f9 ldr r1, [r7, #28] + 802c7d4: fb01 f303 mul.w r3, r1, r3 + 802c7d8: 009b lsls r3, r3, #2 + 802c7da: 4413 add r3, r2 + 802c7dc: 627b str r3, [r7, #36] ; 0x24 + 802c7de: e069 b.n 802c8b4 } } else if (RxLocation == FDCAN_RX_FIFO1) /* Rx element is assigned to the Rx FIFO 1 */ - 802c75c: 68bb ldr r3, [r7, #8] - 802c75e: 2b41 cmp r3, #65 ; 0x41 - 802c760: d14d bne.n 802c7fe + 802c7e0: 68bb ldr r3, [r7, #8] + 802c7e2: 2b41 cmp r3, #65 ; 0x41 + 802c7e4: d14d bne.n 802c882 { /* Check that the Rx FIFO 1 has an allocated area into the RAM */ if ((hfdcan->Instance->RXF1C & FDCAN_RXF1C_F1S) == 0U) - 802c762: 68fb ldr r3, [r7, #12] - 802c764: 681b ldr r3, [r3, #0] - 802c766: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802c76a: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 802c76e: 2b00 cmp r3, #0 - 802c770: d109 bne.n 802c786 + 802c7e6: 68fb ldr r3, [r7, #12] + 802c7e8: 681b ldr r3, [r3, #0] + 802c7ea: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802c7ee: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 802c7f2: 2b00 cmp r3, #0 + 802c7f4: d109 bne.n 802c80a { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802c772: 68fb ldr r3, [r7, #12] - 802c774: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c778: f043 0220 orr.w r2, r3, #32 - 802c77c: 68fb ldr r3, [r7, #12] - 802c77e: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c7f6: 68fb ldr r3, [r7, #12] + 802c7f8: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c7fc: f043 0220 orr.w r2, r3, #32 + 802c800: 68fb ldr r3, [r7, #12] + 802c802: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c782: 2301 movs r3, #1 - 802c784: e0ed b.n 802c962 + 802c806: 2301 movs r3, #1 + 802c808: e0ed b.n 802c9e6 } /* Check that the Rx FIFO 0 is not empty */ if ((hfdcan->Instance->RXF1S & FDCAN_RXF1S_F1FL) == 0U) - 802c786: 68fb ldr r3, [r7, #12] - 802c788: 681b ldr r3, [r3, #0] - 802c78a: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 802c78e: f003 037f and.w r3, r3, #127 ; 0x7f - 802c792: 2b00 cmp r3, #0 - 802c794: d109 bne.n 802c7aa + 802c80a: 68fb ldr r3, [r7, #12] + 802c80c: 681b ldr r3, [r3, #0] + 802c80e: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 802c812: f003 037f and.w r3, r3, #127 ; 0x7f + 802c816: 2b00 cmp r3, #0 + 802c818: d109 bne.n 802c82e { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_FIFO_EMPTY; - 802c796: 68fb ldr r3, [r7, #12] - 802c798: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c79c: f443 7280 orr.w r2, r3, #256 ; 0x100 - 802c7a0: 68fb ldr r3, [r7, #12] - 802c7a2: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c81a: 68fb ldr r3, [r7, #12] + 802c81c: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c820: f443 7280 orr.w r2, r3, #256 ; 0x100 + 802c824: 68fb ldr r3, [r7, #12] + 802c826: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c7a6: 2301 movs r3, #1 - 802c7a8: e0db b.n 802c962 + 802c82a: 2301 movs r3, #1 + 802c82c: e0db b.n 802c9e6 } else { /* Check that the Rx FIFO 1 is full & overwrite mode is on*/ if(((hfdcan->Instance->RXF1S & FDCAN_RXF1S_F1F) >> FDCAN_RXF1S_F1F_Pos) == 1U) - 802c7aa: 68fb ldr r3, [r7, #12] - 802c7ac: 681b ldr r3, [r3, #0] - 802c7ae: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 802c7b2: 0e1b lsrs r3, r3, #24 - 802c7b4: f003 0301 and.w r3, r3, #1 - 802c7b8: 2b01 cmp r3, #1 - 802c7ba: d10b bne.n 802c7d4 + 802c82e: 68fb ldr r3, [r7, #12] + 802c830: 681b ldr r3, [r3, #0] + 802c832: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 802c836: 0e1b lsrs r3, r3, #24 + 802c838: f003 0301 and.w r3, r3, #1 + 802c83c: 2b01 cmp r3, #1 + 802c83e: d10b bne.n 802c858 { if(((hfdcan->Instance->RXF1C & FDCAN_RXF1C_F1OM) >> FDCAN_RXF1C_F1OM_Pos) == FDCAN_RX_FIFO_OVERWRITE) - 802c7bc: 68fb ldr r3, [r7, #12] - 802c7be: 681b ldr r3, [r3, #0] - 802c7c0: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802c7c4: 0fdb lsrs r3, r3, #31 - 802c7c6: f003 0301 and.w r3, r3, #1 - 802c7ca: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 - 802c7ce: d101 bne.n 802c7d4 + 802c840: 68fb ldr r3, [r7, #12] + 802c842: 681b ldr r3, [r3, #0] + 802c844: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802c848: 0fdb lsrs r3, r3, #31 + 802c84a: f003 0301 and.w r3, r3, #1 + 802c84e: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000 + 802c852: d101 bne.n 802c858 { /* When overwrite status is on discard first message in FIFO */ GetIndex = 1U; - 802c7d0: 2301 movs r3, #1 - 802c7d2: 61fb str r3, [r7, #28] + 802c854: 2301 movs r3, #1 + 802c856: 61fb str r3, [r7, #28] } } /* Calculate Rx FIFO 1 element index*/ GetIndex += ((hfdcan->Instance->RXF1S & FDCAN_RXF1S_F1GI) >> FDCAN_RXF1S_F1GI_Pos); - 802c7d4: 68fb ldr r3, [r7, #12] - 802c7d6: 681b ldr r3, [r3, #0] - 802c7d8: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 802c7dc: 0a1b lsrs r3, r3, #8 - 802c7de: f003 033f and.w r3, r3, #63 ; 0x3f - 802c7e2: 69fa ldr r2, [r7, #28] - 802c7e4: 4413 add r3, r2 - 802c7e6: 61fb str r3, [r7, #28] + 802c858: 68fb ldr r3, [r7, #12] + 802c85a: 681b ldr r3, [r3, #0] + 802c85c: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 802c860: 0a1b lsrs r3, r3, #8 + 802c862: f003 033f and.w r3, r3, #63 ; 0x3f + 802c866: 69fa ldr r2, [r7, #28] + 802c868: 4413 add r3, r2 + 802c86a: 61fb str r3, [r7, #28] /* Calculate Rx FIFO 1 element address */ RxAddress = (uint32_t *)(hfdcan->msgRam.RxFIFO1SA + (GetIndex * hfdcan->Init.RxFifo1ElmtSize * 4U)); - 802c7e8: 68fb ldr r3, [r7, #12] - 802c7ea: 6f9a ldr r2, [r3, #120] ; 0x78 - 802c7ec: 68fb ldr r3, [r7, #12] - 802c7ee: 6cdb ldr r3, [r3, #76] ; 0x4c - 802c7f0: 69f9 ldr r1, [r7, #28] - 802c7f2: fb01 f303 mul.w r3, r1, r3 - 802c7f6: 009b lsls r3, r3, #2 - 802c7f8: 4413 add r3, r2 - 802c7fa: 627b str r3, [r7, #36] ; 0x24 - 802c7fc: e018 b.n 802c830 + 802c86c: 68fb ldr r3, [r7, #12] + 802c86e: 6f9a ldr r2, [r3, #120] ; 0x78 + 802c870: 68fb ldr r3, [r7, #12] + 802c872: 6cdb ldr r3, [r3, #76] ; 0x4c + 802c874: 69f9 ldr r1, [r7, #28] + 802c876: fb01 f303 mul.w r3, r1, r3 + 802c87a: 009b lsls r3, r3, #2 + 802c87c: 4413 add r3, r2 + 802c87e: 627b str r3, [r7, #36] ; 0x24 + 802c880: e018 b.n 802c8b4 } } else /* Rx element is assigned to a dedicated Rx buffer */ { /* Check that the selected buffer has an allocated area into the RAM */ if (RxLocation >= hfdcan->Init.RxBuffersNbr) - 802c7fe: 68fb ldr r3, [r7, #12] - 802c800: 6d1b ldr r3, [r3, #80] ; 0x50 - 802c802: 68ba ldr r2, [r7, #8] - 802c804: 429a cmp r2, r3 - 802c806: d309 bcc.n 802c81c + 802c882: 68fb ldr r3, [r7, #12] + 802c884: 6d1b ldr r3, [r3, #80] ; 0x50 + 802c886: 68ba ldr r2, [r7, #8] + 802c888: 429a cmp r2, r3 + 802c88a: d309 bcc.n 802c8a0 { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802c808: 68fb ldr r3, [r7, #12] - 802c80a: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c80e: f043 0220 orr.w r2, r3, #32 - 802c812: 68fb ldr r3, [r7, #12] - 802c814: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c88c: 68fb ldr r3, [r7, #12] + 802c88e: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c892: f043 0220 orr.w r2, r3, #32 + 802c896: 68fb ldr r3, [r7, #12] + 802c898: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c818: 2301 movs r3, #1 - 802c81a: e0a2 b.n 802c962 + 802c89c: 2301 movs r3, #1 + 802c89e: e0a2 b.n 802c9e6 } else { /* Calculate Rx buffer address */ RxAddress = (uint32_t *)(hfdcan->msgRam.RxBufferSA + (RxLocation * hfdcan->Init.RxBufferSize * 4U)); - 802c81c: 68fb ldr r3, [r7, #12] - 802c81e: 6fda ldr r2, [r3, #124] ; 0x7c - 802c820: 68fb ldr r3, [r7, #12] - 802c822: 6d5b ldr r3, [r3, #84] ; 0x54 - 802c824: 68b9 ldr r1, [r7, #8] - 802c826: fb01 f303 mul.w r3, r1, r3 - 802c82a: 009b lsls r3, r3, #2 - 802c82c: 4413 add r3, r2 - 802c82e: 627b str r3, [r7, #36] ; 0x24 + 802c8a0: 68fb ldr r3, [r7, #12] + 802c8a2: 6fda ldr r2, [r3, #124] ; 0x7c + 802c8a4: 68fb ldr r3, [r7, #12] + 802c8a6: 6d5b ldr r3, [r3, #84] ; 0x54 + 802c8a8: 68b9 ldr r1, [r7, #8] + 802c8aa: fb01 f303 mul.w r3, r1, r3 + 802c8ae: 009b lsls r3, r3, #2 + 802c8b0: 4413 add r3, r2 + 802c8b2: 627b str r3, [r7, #36] ; 0x24 } } /* Retrieve IdType */ pRxHeader->IdType = *RxAddress & FDCAN_ELEMENT_MASK_XTD; - 802c830: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c832: 681b ldr r3, [r3, #0] - 802c834: f003 4280 and.w r2, r3, #1073741824 ; 0x40000000 - 802c838: 687b ldr r3, [r7, #4] - 802c83a: 605a str r2, [r3, #4] + 802c8b4: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8b6: 681b ldr r3, [r3, #0] + 802c8b8: f003 4280 and.w r2, r3, #1073741824 ; 0x40000000 + 802c8bc: 687b ldr r3, [r7, #4] + 802c8be: 605a str r2, [r3, #4] /* Retrieve Identifier */ if (pRxHeader->IdType == FDCAN_STANDARD_ID) /* Standard ID element */ - 802c83c: 687b ldr r3, [r7, #4] - 802c83e: 685b ldr r3, [r3, #4] - 802c840: 2b00 cmp r3, #0 - 802c842: d107 bne.n 802c854 + 802c8c0: 687b ldr r3, [r7, #4] + 802c8c2: 685b ldr r3, [r3, #4] + 802c8c4: 2b00 cmp r3, #0 + 802c8c6: d107 bne.n 802c8d8 { pRxHeader->Identifier = ((*RxAddress & FDCAN_ELEMENT_MASK_STDID) >> 18); - 802c844: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c846: 681b ldr r3, [r3, #0] - 802c848: 0c9b lsrs r3, r3, #18 - 802c84a: f3c3 020a ubfx r2, r3, #0, #11 - 802c84e: 687b ldr r3, [r7, #4] - 802c850: 601a str r2, [r3, #0] - 802c852: e005 b.n 802c860 + 802c8c8: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8ca: 681b ldr r3, [r3, #0] + 802c8cc: 0c9b lsrs r3, r3, #18 + 802c8ce: f3c3 020a ubfx r2, r3, #0, #11 + 802c8d2: 687b ldr r3, [r7, #4] + 802c8d4: 601a str r2, [r3, #0] + 802c8d6: e005 b.n 802c8e4 } else /* Extended ID element */ { pRxHeader->Identifier = (*RxAddress & FDCAN_ELEMENT_MASK_EXTID); - 802c854: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c856: 681b ldr r3, [r3, #0] - 802c858: f023 4260 bic.w r2, r3, #3758096384 ; 0xe0000000 - 802c85c: 687b ldr r3, [r7, #4] - 802c85e: 601a str r2, [r3, #0] + 802c8d8: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8da: 681b ldr r3, [r3, #0] + 802c8dc: f023 4260 bic.w r2, r3, #3758096384 ; 0xe0000000 + 802c8e0: 687b ldr r3, [r7, #4] + 802c8e2: 601a str r2, [r3, #0] } /* Retrieve RxFrameType */ pRxHeader->RxFrameType = (*RxAddress & FDCAN_ELEMENT_MASK_RTR); - 802c860: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c862: 681b ldr r3, [r3, #0] - 802c864: f003 5200 and.w r2, r3, #536870912 ; 0x20000000 - 802c868: 687b ldr r3, [r7, #4] - 802c86a: 609a str r2, [r3, #8] + 802c8e4: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8e6: 681b ldr r3, [r3, #0] + 802c8e8: f003 5200 and.w r2, r3, #536870912 ; 0x20000000 + 802c8ec: 687b ldr r3, [r7, #4] + 802c8ee: 609a str r2, [r3, #8] /* Retrieve ErrorStateIndicator */ pRxHeader->ErrorStateIndicator = (*RxAddress & FDCAN_ELEMENT_MASK_ESI); - 802c86c: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c86e: 681b ldr r3, [r3, #0] - 802c870: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 - 802c874: 687b ldr r3, [r7, #4] - 802c876: 611a str r2, [r3, #16] + 802c8f0: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8f2: 681b ldr r3, [r3, #0] + 802c8f4: f003 4200 and.w r2, r3, #2147483648 ; 0x80000000 + 802c8f8: 687b ldr r3, [r7, #4] + 802c8fa: 611a str r2, [r3, #16] /* Increment RxAddress pointer to second word of Rx FIFO element */ RxAddress++; - 802c878: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c87a: 3304 adds r3, #4 - 802c87c: 627b str r3, [r7, #36] ; 0x24 + 802c8fc: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c8fe: 3304 adds r3, #4 + 802c900: 627b str r3, [r7, #36] ; 0x24 /* Retrieve RxTimestamp */ pRxHeader->RxTimestamp = (*RxAddress & FDCAN_ELEMENT_MASK_TS); - 802c87e: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c880: 681b ldr r3, [r3, #0] - 802c882: b29a uxth r2, r3 - 802c884: 687b ldr r3, [r7, #4] - 802c886: 61da str r2, [r3, #28] + 802c902: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c904: 681b ldr r3, [r3, #0] + 802c906: b29a uxth r2, r3 + 802c908: 687b ldr r3, [r7, #4] + 802c90a: 61da str r2, [r3, #28] /* Retrieve DataLength */ pRxHeader->DataLength = (*RxAddress & FDCAN_ELEMENT_MASK_DLC); - 802c888: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c88a: 681b ldr r3, [r3, #0] - 802c88c: f403 2270 and.w r2, r3, #983040 ; 0xf0000 - 802c890: 687b ldr r3, [r7, #4] - 802c892: 60da str r2, [r3, #12] + 802c90c: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c90e: 681b ldr r3, [r3, #0] + 802c910: f403 2270 and.w r2, r3, #983040 ; 0xf0000 + 802c914: 687b ldr r3, [r7, #4] + 802c916: 60da str r2, [r3, #12] /* Retrieve BitRateSwitch */ pRxHeader->BitRateSwitch = (*RxAddress & FDCAN_ELEMENT_MASK_BRS); - 802c894: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c896: 681b ldr r3, [r3, #0] - 802c898: f403 1280 and.w r2, r3, #1048576 ; 0x100000 - 802c89c: 687b ldr r3, [r7, #4] - 802c89e: 615a str r2, [r3, #20] + 802c918: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c91a: 681b ldr r3, [r3, #0] + 802c91c: f403 1280 and.w r2, r3, #1048576 ; 0x100000 + 802c920: 687b ldr r3, [r7, #4] + 802c922: 615a str r2, [r3, #20] /* Retrieve FDFormat */ pRxHeader->FDFormat = (*RxAddress & FDCAN_ELEMENT_MASK_FDF); - 802c8a0: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c8a2: 681b ldr r3, [r3, #0] - 802c8a4: f403 1200 and.w r2, r3, #2097152 ; 0x200000 - 802c8a8: 687b ldr r3, [r7, #4] - 802c8aa: 619a str r2, [r3, #24] + 802c924: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c926: 681b ldr r3, [r3, #0] + 802c928: f403 1200 and.w r2, r3, #2097152 ; 0x200000 + 802c92c: 687b ldr r3, [r7, #4] + 802c92e: 619a str r2, [r3, #24] /* Retrieve FilterIndex */ pRxHeader->FilterIndex = ((*RxAddress & FDCAN_ELEMENT_MASK_FIDX) >> 24); - 802c8ac: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c8ae: 681b ldr r3, [r3, #0] - 802c8b0: 0e1b lsrs r3, r3, #24 - 802c8b2: f003 027f and.w r2, r3, #127 ; 0x7f - 802c8b6: 687b ldr r3, [r7, #4] - 802c8b8: 621a str r2, [r3, #32] + 802c930: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c932: 681b ldr r3, [r3, #0] + 802c934: 0e1b lsrs r3, r3, #24 + 802c936: f003 027f and.w r2, r3, #127 ; 0x7f + 802c93a: 687b ldr r3, [r7, #4] + 802c93c: 621a str r2, [r3, #32] /* Retrieve NonMatchingFrame */ pRxHeader->IsFilterMatchingFrame = ((*RxAddress & FDCAN_ELEMENT_MASK_ANMF) >> 31); - 802c8ba: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c8bc: 681b ldr r3, [r3, #0] - 802c8be: 0fda lsrs r2, r3, #31 - 802c8c0: 687b ldr r3, [r7, #4] - 802c8c2: 625a str r2, [r3, #36] ; 0x24 + 802c93e: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c940: 681b ldr r3, [r3, #0] + 802c942: 0fda lsrs r2, r3, #31 + 802c944: 687b ldr r3, [r7, #4] + 802c946: 625a str r2, [r3, #36] ; 0x24 /* Increment RxAddress pointer to payload of Rx FIFO element */ RxAddress++; - 802c8c4: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c8c6: 3304 adds r3, #4 - 802c8c8: 627b str r3, [r7, #36] ; 0x24 + 802c948: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c94a: 3304 adds r3, #4 + 802c94c: 627b str r3, [r7, #36] ; 0x24 /* Retrieve Rx payload */ pData = (uint8_t *)RxAddress; - 802c8ca: 6a7b ldr r3, [r7, #36] ; 0x24 - 802c8cc: 617b str r3, [r7, #20] + 802c94e: 6a7b ldr r3, [r7, #36] ; 0x24 + 802c950: 617b str r3, [r7, #20] for (ByteCounter = 0; ByteCounter < DLCtoBytes[pRxHeader->DataLength >> 16]; ByteCounter++) - 802c8ce: 2300 movs r3, #0 - 802c8d0: 623b str r3, [r7, #32] - 802c8d2: e00a b.n 802c8ea + 802c952: 2300 movs r3, #0 + 802c954: 623b str r3, [r7, #32] + 802c956: e00a b.n 802c96e { pRxData[ByteCounter] = pData[ByteCounter]; - 802c8d4: 697a ldr r2, [r7, #20] - 802c8d6: 6a3b ldr r3, [r7, #32] - 802c8d8: 441a add r2, r3 - 802c8da: 6839 ldr r1, [r7, #0] - 802c8dc: 6a3b ldr r3, [r7, #32] - 802c8de: 440b add r3, r1 - 802c8e0: 7812 ldrb r2, [r2, #0] - 802c8e2: 701a strb r2, [r3, #0] + 802c958: 697a ldr r2, [r7, #20] + 802c95a: 6a3b ldr r3, [r7, #32] + 802c95c: 441a add r2, r3 + 802c95e: 6839 ldr r1, [r7, #0] + 802c960: 6a3b ldr r3, [r7, #32] + 802c962: 440b add r3, r1 + 802c964: 7812 ldrb r2, [r2, #0] + 802c966: 701a strb r2, [r3, #0] for (ByteCounter = 0; ByteCounter < DLCtoBytes[pRxHeader->DataLength >> 16]; ByteCounter++) - 802c8e4: 6a3b ldr r3, [r7, #32] - 802c8e6: 3301 adds r3, #1 - 802c8e8: 623b str r3, [r7, #32] - 802c8ea: 687b ldr r3, [r7, #4] - 802c8ec: 68db ldr r3, [r3, #12] - 802c8ee: 0c1b lsrs r3, r3, #16 - 802c8f0: 4a1f ldr r2, [pc, #124] ; (802c970 ) - 802c8f2: 5cd3 ldrb r3, [r2, r3] - 802c8f4: 461a mov r2, r3 - 802c8f6: 6a3b ldr r3, [r7, #32] - 802c8f8: 4293 cmp r3, r2 - 802c8fa: d3eb bcc.n 802c8d4 + 802c968: 6a3b ldr r3, [r7, #32] + 802c96a: 3301 adds r3, #1 + 802c96c: 623b str r3, [r7, #32] + 802c96e: 687b ldr r3, [r7, #4] + 802c970: 68db ldr r3, [r3, #12] + 802c972: 0c1b lsrs r3, r3, #16 + 802c974: 4a1f ldr r2, [pc, #124] ; (802c9f4 ) + 802c976: 5cd3 ldrb r3, [r2, r3] + 802c978: 461a mov r2, r3 + 802c97a: 6a3b ldr r3, [r7, #32] + 802c97c: 4293 cmp r3, r2 + 802c97e: d3eb bcc.n 802c958 } if (RxLocation == FDCAN_RX_FIFO0) /* Rx element is assigned to the Rx FIFO 0 */ - 802c8fc: 68bb ldr r3, [r7, #8] - 802c8fe: 2b40 cmp r3, #64 ; 0x40 - 802c900: d105 bne.n 802c90e + 802c980: 68bb ldr r3, [r7, #8] + 802c982: 2b40 cmp r3, #64 ; 0x40 + 802c984: d105 bne.n 802c992 { /* Acknowledge the Rx FIFO 0 that the oldest element is read so that it increments the GetIndex */ hfdcan->Instance->RXF0A = GetIndex; - 802c902: 68fb ldr r3, [r7, #12] - 802c904: 681b ldr r3, [r3, #0] - 802c906: 69fa ldr r2, [r7, #28] - 802c908: f8c3 20a8 str.w r2, [r3, #168] ; 0xa8 - 802c90c: e01e b.n 802c94c + 802c986: 68fb ldr r3, [r7, #12] + 802c988: 681b ldr r3, [r3, #0] + 802c98a: 69fa ldr r2, [r7, #28] + 802c98c: f8c3 20a8 str.w r2, [r3, #168] ; 0xa8 + 802c990: e01e b.n 802c9d0 } else if (RxLocation == FDCAN_RX_FIFO1) /* Rx element is assigned to the Rx FIFO 1 */ - 802c90e: 68bb ldr r3, [r7, #8] - 802c910: 2b41 cmp r3, #65 ; 0x41 - 802c912: d105 bne.n 802c920 + 802c992: 68bb ldr r3, [r7, #8] + 802c994: 2b41 cmp r3, #65 ; 0x41 + 802c996: d105 bne.n 802c9a4 { /* Acknowledge the Rx FIFO 1 that the oldest element is read so that it increments the GetIndex */ hfdcan->Instance->RXF1A = GetIndex; - 802c914: 68fb ldr r3, [r7, #12] - 802c916: 681b ldr r3, [r3, #0] - 802c918: 69fa ldr r2, [r7, #28] - 802c91a: f8c3 20b8 str.w r2, [r3, #184] ; 0xb8 - 802c91e: e015 b.n 802c94c + 802c998: 68fb ldr r3, [r7, #12] + 802c99a: 681b ldr r3, [r3, #0] + 802c99c: 69fa ldr r2, [r7, #28] + 802c99e: f8c3 20b8 str.w r2, [r3, #184] ; 0xb8 + 802c9a2: e015 b.n 802c9d0 } else /* Rx element is assigned to a dedicated Rx buffer */ { /* Clear the New Data flag of the current Rx buffer */ if (RxLocation < FDCAN_RX_BUFFER32) - 802c920: 68bb ldr r3, [r7, #8] - 802c922: 2b1f cmp r3, #31 - 802c924: d808 bhi.n 802c938 + 802c9a4: 68bb ldr r3, [r7, #8] + 802c9a6: 2b1f cmp r3, #31 + 802c9a8: d808 bhi.n 802c9bc { hfdcan->Instance->NDAT1 = ((uint32_t)1 << RxLocation); - 802c926: 68fb ldr r3, [r7, #12] - 802c928: 681b ldr r3, [r3, #0] - 802c92a: 2101 movs r1, #1 - 802c92c: 68ba ldr r2, [r7, #8] - 802c92e: fa01 f202 lsl.w r2, r1, r2 - 802c932: f8c3 2098 str.w r2, [r3, #152] ; 0x98 - 802c936: e009 b.n 802c94c + 802c9aa: 68fb ldr r3, [r7, #12] + 802c9ac: 681b ldr r3, [r3, #0] + 802c9ae: 2101 movs r1, #1 + 802c9b0: 68ba ldr r2, [r7, #8] + 802c9b2: fa01 f202 lsl.w r2, r1, r2 + 802c9b6: f8c3 2098 str.w r2, [r3, #152] ; 0x98 + 802c9ba: e009 b.n 802c9d0 } else /* FDCAN_RX_BUFFER32 <= RxLocation <= FDCAN_RX_BUFFER63 */ { hfdcan->Instance->NDAT2 = ((uint32_t)1 << (RxLocation & 0x1FU)); - 802c938: 68bb ldr r3, [r7, #8] - 802c93a: f003 021f and.w r2, r3, #31 - 802c93e: 68fb ldr r3, [r7, #12] - 802c940: 681b ldr r3, [r3, #0] - 802c942: 2101 movs r1, #1 - 802c944: fa01 f202 lsl.w r2, r1, r2 - 802c948: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c9bc: 68bb ldr r3, [r7, #8] + 802c9be: f003 021f and.w r2, r3, #31 + 802c9c2: 68fb ldr r3, [r7, #12] + 802c9c4: 681b ldr r3, [r3, #0] + 802c9c6: 2101 movs r1, #1 + 802c9c8: fa01 f202 lsl.w r2, r1, r2 + 802c9cc: f8c3 209c str.w r2, [r3, #156] ; 0x9c } } /* Return function status */ return HAL_OK; - 802c94c: 2300 movs r3, #0 - 802c94e: e008 b.n 802c962 + 802c9d0: 2300 movs r3, #0 + 802c9d2: e008 b.n 802c9e6 } else { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_NOT_STARTED; - 802c950: 68fb ldr r3, [r7, #12] - 802c952: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802c956: f043 0208 orr.w r2, r3, #8 - 802c95a: 68fb ldr r3, [r7, #12] - 802c95c: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802c9d4: 68fb ldr r3, [r7, #12] + 802c9d6: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802c9da: f043 0208 orr.w r2, r3, #8 + 802c9de: 68fb ldr r3, [r7, #12] + 802c9e0: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802c960: 2301 movs r3, #1 + 802c9e4: 2301 movs r3, #1 } } - 802c962: 4618 mov r0, r3 - 802c964: 372c adds r7, #44 ; 0x2c - 802c966: 46bd mov sp, r7 - 802c968: f85d 7b04 ldr.w r7, [sp], #4 - 802c96c: 4770 bx lr - 802c96e: bf00 nop - 802c970: 08044cec .word 0x08044cec + 802c9e6: 4618 mov r0, r3 + 802c9e8: 372c adds r7, #44 ; 0x2c + 802c9ea: 46bd mov sp, r7 + 802c9ec: f85d 7b04 ldr.w r7, [sp], #4 + 802c9f0: 4770 bx lr + 802c9f2: bf00 nop + 802c9f4: 08044d6c .word 0x08044d6c -0802c974 : +0802c9f8 : * - FDCAN_IT_TX_COMPLETE * - FDCAN_IT_TX_ABORT_COMPLETE * @retval HAL status */ HAL_StatusTypeDef HAL_FDCAN_ActivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t ActiveITs, uint32_t BufferIndexes) { - 802c974: b480 push {r7} - 802c976: b087 sub sp, #28 - 802c978: af00 add r7, sp, #0 - 802c97a: 60f8 str r0, [r7, #12] - 802c97c: 60b9 str r1, [r7, #8] - 802c97e: 607a str r2, [r7, #4] + 802c9f8: b480 push {r7} + 802c9fa: b087 sub sp, #28 + 802c9fc: af00 add r7, sp, #0 + 802c9fe: 60f8 str r0, [r7, #12] + 802ca00: 60b9 str r1, [r7, #8] + 802ca02: 607a str r2, [r7, #4] HAL_FDCAN_StateTypeDef state = hfdcan->State; - 802c980: 68fb ldr r3, [r7, #12] - 802c982: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 802c986: 75fb strb r3, [r7, #23] + 802ca04: 68fb ldr r3, [r7, #12] + 802ca06: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 802ca0a: 75fb strb r3, [r7, #23] /* Check function parameters */ assert_param(IS_FDCAN_IT(ActiveITs)); if ((state == HAL_FDCAN_STATE_READY) || (state == HAL_FDCAN_STATE_BUSY)) - 802c988: 7dfb ldrb r3, [r7, #23] - 802c98a: 2b01 cmp r3, #1 - 802c98c: d002 beq.n 802c994 - 802c98e: 7dfb ldrb r3, [r7, #23] - 802c990: 2b02 cmp r3, #2 - 802c992: d155 bne.n 802ca40 + 802ca0c: 7dfb ldrb r3, [r7, #23] + 802ca0e: 2b01 cmp r3, #1 + 802ca10: d002 beq.n 802ca18 + 802ca12: 7dfb ldrb r3, [r7, #23] + 802ca14: 2b02 cmp r3, #2 + 802ca16: d155 bne.n 802cac4 { /* Enable Interrupt lines */ if ((ActiveITs & hfdcan->Instance->ILS) == 0U) - 802c994: 68fb ldr r3, [r7, #12] - 802c996: 681b ldr r3, [r3, #0] - 802c998: 6d9a ldr r2, [r3, #88] ; 0x58 - 802c99a: 68bb ldr r3, [r7, #8] - 802c99c: 4013 ands r3, r2 - 802c99e: 2b00 cmp r3, #0 - 802c9a0: d108 bne.n 802c9b4 + 802ca18: 68fb ldr r3, [r7, #12] + 802ca1a: 681b ldr r3, [r3, #0] + 802ca1c: 6d9a ldr r2, [r3, #88] ; 0x58 + 802ca1e: 68bb ldr r3, [r7, #8] + 802ca20: 4013 ands r3, r2 + 802ca22: 2b00 cmp r3, #0 + 802ca24: d108 bne.n 802ca38 { /* Enable Interrupt line 0 */ SET_BIT(hfdcan->Instance->ILE, FDCAN_INTERRUPT_LINE0); - 802c9a2: 68fb ldr r3, [r7, #12] - 802c9a4: 681b ldr r3, [r3, #0] - 802c9a6: 6dda ldr r2, [r3, #92] ; 0x5c - 802c9a8: 68fb ldr r3, [r7, #12] - 802c9aa: 681b ldr r3, [r3, #0] - 802c9ac: f042 0201 orr.w r2, r2, #1 - 802c9b0: 65da str r2, [r3, #92] ; 0x5c - 802c9b2: e014 b.n 802c9de + 802ca26: 68fb ldr r3, [r7, #12] + 802ca28: 681b ldr r3, [r3, #0] + 802ca2a: 6dda ldr r2, [r3, #92] ; 0x5c + 802ca2c: 68fb ldr r3, [r7, #12] + 802ca2e: 681b ldr r3, [r3, #0] + 802ca30: f042 0201 orr.w r2, r2, #1 + 802ca34: 65da str r2, [r3, #92] ; 0x5c + 802ca36: e014 b.n 802ca62 } else if ((ActiveITs & hfdcan->Instance->ILS) == ActiveITs) - 802c9b4: 68fb ldr r3, [r7, #12] - 802c9b6: 681b ldr r3, [r3, #0] - 802c9b8: 6d9a ldr r2, [r3, #88] ; 0x58 - 802c9ba: 68bb ldr r3, [r7, #8] - 802c9bc: 4013 ands r3, r2 - 802c9be: 68ba ldr r2, [r7, #8] - 802c9c0: 429a cmp r2, r3 - 802c9c2: d108 bne.n 802c9d6 + 802ca38: 68fb ldr r3, [r7, #12] + 802ca3a: 681b ldr r3, [r3, #0] + 802ca3c: 6d9a ldr r2, [r3, #88] ; 0x58 + 802ca3e: 68bb ldr r3, [r7, #8] + 802ca40: 4013 ands r3, r2 + 802ca42: 68ba ldr r2, [r7, #8] + 802ca44: 429a cmp r2, r3 + 802ca46: d108 bne.n 802ca5a { /* Enable Interrupt line 1 */ SET_BIT(hfdcan->Instance->ILE, FDCAN_INTERRUPT_LINE1); - 802c9c4: 68fb ldr r3, [r7, #12] - 802c9c6: 681b ldr r3, [r3, #0] - 802c9c8: 6dda ldr r2, [r3, #92] ; 0x5c - 802c9ca: 68fb ldr r3, [r7, #12] - 802c9cc: 681b ldr r3, [r3, #0] - 802c9ce: f042 0202 orr.w r2, r2, #2 - 802c9d2: 65da str r2, [r3, #92] ; 0x5c - 802c9d4: e003 b.n 802c9de + 802ca48: 68fb ldr r3, [r7, #12] + 802ca4a: 681b ldr r3, [r3, #0] + 802ca4c: 6dda ldr r2, [r3, #92] ; 0x5c + 802ca4e: 68fb ldr r3, [r7, #12] + 802ca50: 681b ldr r3, [r3, #0] + 802ca52: f042 0202 orr.w r2, r2, #2 + 802ca56: 65da str r2, [r3, #92] ; 0x5c + 802ca58: e003 b.n 802ca62 } else { /* Enable Interrupt lines 0 and 1 */ hfdcan->Instance->ILE = (FDCAN_INTERRUPT_LINE0 | FDCAN_INTERRUPT_LINE1); - 802c9d6: 68fb ldr r3, [r7, #12] - 802c9d8: 681b ldr r3, [r3, #0] - 802c9da: 2203 movs r2, #3 - 802c9dc: 65da str r2, [r3, #92] ; 0x5c + 802ca5a: 68fb ldr r3, [r7, #12] + 802ca5c: 681b ldr r3, [r3, #0] + 802ca5e: 2203 movs r2, #3 + 802ca60: 65da str r2, [r3, #92] ; 0x5c } if ((ActiveITs & FDCAN_IT_TX_COMPLETE) != 0U) - 802c9de: 68bb ldr r3, [r7, #8] - 802c9e0: f403 7300 and.w r3, r3, #512 ; 0x200 - 802c9e4: 2b00 cmp r3, #0 - 802c9e6: d009 beq.n 802c9fc + 802ca62: 68bb ldr r3, [r7, #8] + 802ca64: f403 7300 and.w r3, r3, #512 ; 0x200 + 802ca68: 2b00 cmp r3, #0 + 802ca6a: d009 beq.n 802ca80 { /* Enable Tx Buffer Transmission Interrupt to set TC flag in IR register, but interrupt will only occur if TC is enabled in IE register */ SET_BIT(hfdcan->Instance->TXBTIE, BufferIndexes); - 802c9e8: 68fb ldr r3, [r7, #12] - 802c9ea: 681b ldr r3, [r3, #0] - 802c9ec: f8d3 10e0 ldr.w r1, [r3, #224] ; 0xe0 - 802c9f0: 68fb ldr r3, [r7, #12] - 802c9f2: 681b ldr r3, [r3, #0] - 802c9f4: 687a ldr r2, [r7, #4] - 802c9f6: 430a orrs r2, r1 - 802c9f8: f8c3 20e0 str.w r2, [r3, #224] ; 0xe0 + 802ca6c: 68fb ldr r3, [r7, #12] + 802ca6e: 681b ldr r3, [r3, #0] + 802ca70: f8d3 10e0 ldr.w r1, [r3, #224] ; 0xe0 + 802ca74: 68fb ldr r3, [r7, #12] + 802ca76: 681b ldr r3, [r3, #0] + 802ca78: 687a ldr r2, [r7, #4] + 802ca7a: 430a orrs r2, r1 + 802ca7c: f8c3 20e0 str.w r2, [r3, #224] ; 0xe0 } if ((ActiveITs & FDCAN_IT_TX_ABORT_COMPLETE) != 0U) - 802c9fc: 68bb ldr r3, [r7, #8] - 802c9fe: f403 6380 and.w r3, r3, #1024 ; 0x400 - 802ca02: 2b00 cmp r3, #0 - 802ca04: d009 beq.n 802ca1a + 802ca80: 68bb ldr r3, [r7, #8] + 802ca82: f403 6380 and.w r3, r3, #1024 ; 0x400 + 802ca86: 2b00 cmp r3, #0 + 802ca88: d009 beq.n 802ca9e { /* Enable Tx Buffer Cancellation Finished Interrupt to set TCF flag in IR register, but interrupt will only occur if TCF is enabled in IE register */ SET_BIT(hfdcan->Instance->TXBCIE, BufferIndexes); - 802ca06: 68fb ldr r3, [r7, #12] - 802ca08: 681b ldr r3, [r3, #0] - 802ca0a: f8d3 10e4 ldr.w r1, [r3, #228] ; 0xe4 - 802ca0e: 68fb ldr r3, [r7, #12] - 802ca10: 681b ldr r3, [r3, #0] - 802ca12: 687a ldr r2, [r7, #4] - 802ca14: 430a orrs r2, r1 - 802ca16: f8c3 20e4 str.w r2, [r3, #228] ; 0xe4 + 802ca8a: 68fb ldr r3, [r7, #12] + 802ca8c: 681b ldr r3, [r3, #0] + 802ca8e: f8d3 10e4 ldr.w r1, [r3, #228] ; 0xe4 + 802ca92: 68fb ldr r3, [r7, #12] + 802ca94: 681b ldr r3, [r3, #0] + 802ca96: 687a ldr r2, [r7, #4] + 802ca98: 430a orrs r2, r1 + 802ca9a: f8c3 20e4 str.w r2, [r3, #228] ; 0xe4 } /* Enable the selected interrupts */ __HAL_FDCAN_ENABLE_IT(hfdcan, ActiveITs); - 802ca1a: 68fb ldr r3, [r7, #12] - 802ca1c: 681b ldr r3, [r3, #0] - 802ca1e: 6d59 ldr r1, [r3, #84] ; 0x54 - 802ca20: 68ba ldr r2, [r7, #8] - 802ca22: 4b0f ldr r3, [pc, #60] ; (802ca60 ) - 802ca24: 4013 ands r3, r2 - 802ca26: 68fa ldr r2, [r7, #12] - 802ca28: 6812 ldr r2, [r2, #0] - 802ca2a: 430b orrs r3, r1 - 802ca2c: 6553 str r3, [r2, #84] ; 0x54 - 802ca2e: 4b0d ldr r3, [pc, #52] ; (802ca64 ) - 802ca30: 695a ldr r2, [r3, #20] - 802ca32: 68bb ldr r3, [r7, #8] - 802ca34: 0f9b lsrs r3, r3, #30 - 802ca36: 490b ldr r1, [pc, #44] ; (802ca64 ) - 802ca38: 4313 orrs r3, r2 - 802ca3a: 614b str r3, [r1, #20] + 802ca9e: 68fb ldr r3, [r7, #12] + 802caa0: 681b ldr r3, [r3, #0] + 802caa2: 6d59 ldr r1, [r3, #84] ; 0x54 + 802caa4: 68ba ldr r2, [r7, #8] + 802caa6: 4b0f ldr r3, [pc, #60] ; (802cae4 ) + 802caa8: 4013 ands r3, r2 + 802caaa: 68fa ldr r2, [r7, #12] + 802caac: 6812 ldr r2, [r2, #0] + 802caae: 430b orrs r3, r1 + 802cab0: 6553 str r3, [r2, #84] ; 0x54 + 802cab2: 4b0d ldr r3, [pc, #52] ; (802cae8 ) + 802cab4: 695a ldr r2, [r3, #20] + 802cab6: 68bb ldr r3, [r7, #8] + 802cab8: 0f9b lsrs r3, r3, #30 + 802caba: 490b ldr r1, [pc, #44] ; (802cae8 ) + 802cabc: 4313 orrs r3, r2 + 802cabe: 614b str r3, [r1, #20] /* Return function status */ return HAL_OK; - 802ca3c: 2300 movs r3, #0 - 802ca3e: e008 b.n 802ca52 + 802cac0: 2300 movs r3, #0 + 802cac2: e008 b.n 802cad6 } else { /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_NOT_INITIALIZED; - 802ca40: 68fb ldr r3, [r7, #12] - 802ca42: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802ca46: f043 0202 orr.w r2, r3, #2 - 802ca4a: 68fb ldr r3, [r7, #12] - 802ca4c: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802cac4: 68fb ldr r3, [r7, #12] + 802cac6: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802caca: f043 0202 orr.w r2, r3, #2 + 802cace: 68fb ldr r3, [r7, #12] + 802cad0: f8c3 209c str.w r2, [r3, #156] ; 0x9c return HAL_ERROR; - 802ca50: 2301 movs r3, #1 + 802cad4: 2301 movs r3, #1 } } - 802ca52: 4618 mov r0, r3 - 802ca54: 371c adds r7, #28 - 802ca56: 46bd mov sp, r7 - 802ca58: f85d 7b04 ldr.w r7, [sp], #4 - 802ca5c: 4770 bx lr - 802ca5e: bf00 nop - 802ca60: 3fcfffff .word 0x3fcfffff - 802ca64: 4000a800 .word 0x4000a800 + 802cad6: 4618 mov r0, r3 + 802cad8: 371c adds r7, #28 + 802cada: 46bd mov sp, r7 + 802cadc: f85d 7b04 ldr.w r7, [sp], #4 + 802cae0: 4770 bx lr + 802cae2: bf00 nop + 802cae4: 3fcfffff .word 0x3fcfffff + 802cae8: 4000a800 .word 0x4000a800 -0802ca68 : +0802caec : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval HAL status */ void HAL_FDCAN_IRQHandler(FDCAN_HandleTypeDef *hfdcan) { - 802ca68: b580 push {r7, lr} - 802ca6a: b096 sub sp, #88 ; 0x58 - 802ca6c: af00 add r7, sp, #0 - 802ca6e: 6078 str r0, [r7, #4] + 802caec: b580 push {r7, lr} + 802caee: b096 sub sp, #88 ; 0x58 + 802caf0: af00 add r7, sp, #0 + 802caf2: 6078 str r0, [r7, #4] uint32_t itsourceIE; uint32_t itsourceTTIE; uint32_t itflagIR; uint32_t itflagTTIR; ClkCalibrationITs = (FDCAN_CCU->IR << 30); - 802ca70: 4b9a ldr r3, [pc, #616] ; (802ccdc ) - 802ca72: 691b ldr r3, [r3, #16] - 802ca74: 079b lsls r3, r3, #30 - 802ca76: 657b str r3, [r7, #84] ; 0x54 + 802caf4: 4b9a ldr r3, [pc, #616] ; (802cd60 ) + 802caf6: 691b ldr r3, [r3, #16] + 802caf8: 079b lsls r3, r3, #30 + 802cafa: 657b str r3, [r7, #84] ; 0x54 ClkCalibrationITs &= (FDCAN_CCU->IE << 30); - 802ca78: 4b98 ldr r3, [pc, #608] ; (802ccdc ) - 802ca7a: 695b ldr r3, [r3, #20] - 802ca7c: 079b lsls r3, r3, #30 - 802ca7e: 6d7a ldr r2, [r7, #84] ; 0x54 - 802ca80: 4013 ands r3, r2 - 802ca82: 657b str r3, [r7, #84] ; 0x54 + 802cafc: 4b98 ldr r3, [pc, #608] ; (802cd60 ) + 802cafe: 695b ldr r3, [r3, #20] + 802cb00: 079b lsls r3, r3, #30 + 802cb02: 6d7a ldr r2, [r7, #84] ; 0x54 + 802cb04: 4013 ands r3, r2 + 802cb06: 657b str r3, [r7, #84] ; 0x54 TxEventFifoITs = hfdcan->Instance->IR & FDCAN_TX_EVENT_FIFO_MASK; - 802ca84: 687b ldr r3, [r7, #4] - 802ca86: 681b ldr r3, [r3, #0] - 802ca88: 6d1b ldr r3, [r3, #80] ; 0x50 - 802ca8a: f403 4370 and.w r3, r3, #61440 ; 0xf000 - 802ca8e: 653b str r3, [r7, #80] ; 0x50 + 802cb08: 687b ldr r3, [r7, #4] + 802cb0a: 681b ldr r3, [r3, #0] + 802cb0c: 6d1b ldr r3, [r3, #80] ; 0x50 + 802cb0e: f403 4370 and.w r3, r3, #61440 ; 0xf000 + 802cb12: 653b str r3, [r7, #80] ; 0x50 TxEventFifoITs &= hfdcan->Instance->IE; - 802ca90: 687b ldr r3, [r7, #4] - 802ca92: 681b ldr r3, [r3, #0] - 802ca94: 6d5b ldr r3, [r3, #84] ; 0x54 - 802ca96: 6d3a ldr r2, [r7, #80] ; 0x50 - 802ca98: 4013 ands r3, r2 - 802ca9a: 653b str r3, [r7, #80] ; 0x50 + 802cb14: 687b ldr r3, [r7, #4] + 802cb16: 681b ldr r3, [r3, #0] + 802cb18: 6d5b ldr r3, [r3, #84] ; 0x54 + 802cb1a: 6d3a ldr r2, [r7, #80] ; 0x50 + 802cb1c: 4013 ands r3, r2 + 802cb1e: 653b str r3, [r7, #80] ; 0x50 RxFifo0ITs = hfdcan->Instance->IR & FDCAN_RX_FIFO0_MASK; - 802ca9c: 687b ldr r3, [r7, #4] - 802ca9e: 681b ldr r3, [r3, #0] - 802caa0: 6d1b ldr r3, [r3, #80] ; 0x50 - 802caa2: f003 030f and.w r3, r3, #15 - 802caa6: 64fb str r3, [r7, #76] ; 0x4c + 802cb20: 687b ldr r3, [r7, #4] + 802cb22: 681b ldr r3, [r3, #0] + 802cb24: 6d1b ldr r3, [r3, #80] ; 0x50 + 802cb26: f003 030f and.w r3, r3, #15 + 802cb2a: 64fb str r3, [r7, #76] ; 0x4c RxFifo0ITs &= hfdcan->Instance->IE; - 802caa8: 687b ldr r3, [r7, #4] - 802caaa: 681b ldr r3, [r3, #0] - 802caac: 6d5b ldr r3, [r3, #84] ; 0x54 - 802caae: 6cfa ldr r2, [r7, #76] ; 0x4c - 802cab0: 4013 ands r3, r2 - 802cab2: 64fb str r3, [r7, #76] ; 0x4c + 802cb2c: 687b ldr r3, [r7, #4] + 802cb2e: 681b ldr r3, [r3, #0] + 802cb30: 6d5b ldr r3, [r3, #84] ; 0x54 + 802cb32: 6cfa ldr r2, [r7, #76] ; 0x4c + 802cb34: 4013 ands r3, r2 + 802cb36: 64fb str r3, [r7, #76] ; 0x4c RxFifo1ITs = hfdcan->Instance->IR & FDCAN_RX_FIFO1_MASK; - 802cab4: 687b ldr r3, [r7, #4] - 802cab6: 681b ldr r3, [r3, #0] - 802cab8: 6d1b ldr r3, [r3, #80] ; 0x50 - 802caba: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 802cabe: 64bb str r3, [r7, #72] ; 0x48 + 802cb38: 687b ldr r3, [r7, #4] + 802cb3a: 681b ldr r3, [r3, #0] + 802cb3c: 6d1b ldr r3, [r3, #80] ; 0x50 + 802cb3e: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 802cb42: 64bb str r3, [r7, #72] ; 0x48 RxFifo1ITs &= hfdcan->Instance->IE; - 802cac0: 687b ldr r3, [r7, #4] - 802cac2: 681b ldr r3, [r3, #0] - 802cac4: 6d5b ldr r3, [r3, #84] ; 0x54 - 802cac6: 6cba ldr r2, [r7, #72] ; 0x48 - 802cac8: 4013 ands r3, r2 - 802caca: 64bb str r3, [r7, #72] ; 0x48 + 802cb44: 687b ldr r3, [r7, #4] + 802cb46: 681b ldr r3, [r3, #0] + 802cb48: 6d5b ldr r3, [r3, #84] ; 0x54 + 802cb4a: 6cba ldr r2, [r7, #72] ; 0x48 + 802cb4c: 4013 ands r3, r2 + 802cb4e: 64bb str r3, [r7, #72] ; 0x48 Errors = hfdcan->Instance->IR & FDCAN_ERROR_MASK; - 802cacc: 687b ldr r3, [r7, #4] - 802cace: 681b ldr r3, [r3, #0] - 802cad0: 6d1b ldr r3, [r3, #80] ; 0x50 - 802cad2: f003 5371 and.w r3, r3, #1010827264 ; 0x3c400000 - 802cad6: 647b str r3, [r7, #68] ; 0x44 + 802cb50: 687b ldr r3, [r7, #4] + 802cb52: 681b ldr r3, [r3, #0] + 802cb54: 6d1b ldr r3, [r3, #80] ; 0x50 + 802cb56: f003 5371 and.w r3, r3, #1010827264 ; 0x3c400000 + 802cb5a: 647b str r3, [r7, #68] ; 0x44 Errors &= hfdcan->Instance->IE; - 802cad8: 687b ldr r3, [r7, #4] - 802cada: 681b ldr r3, [r3, #0] - 802cadc: 6d5b ldr r3, [r3, #84] ; 0x54 - 802cade: 6c7a ldr r2, [r7, #68] ; 0x44 - 802cae0: 4013 ands r3, r2 - 802cae2: 647b str r3, [r7, #68] ; 0x44 + 802cb5c: 687b ldr r3, [r7, #4] + 802cb5e: 681b ldr r3, [r3, #0] + 802cb60: 6d5b ldr r3, [r3, #84] ; 0x54 + 802cb62: 6c7a ldr r2, [r7, #68] ; 0x44 + 802cb64: 4013 ands r3, r2 + 802cb66: 647b str r3, [r7, #68] ; 0x44 ErrorStatusITs = hfdcan->Instance->IR & FDCAN_ERROR_STATUS_MASK; - 802cae4: 687b ldr r3, [r7, #4] - 802cae6: 681b ldr r3, [r3, #0] - 802cae8: 6d1b ldr r3, [r3, #80] ; 0x50 - 802caea: f003 7360 and.w r3, r3, #58720256 ; 0x3800000 - 802caee: 643b str r3, [r7, #64] ; 0x40 + 802cb68: 687b ldr r3, [r7, #4] + 802cb6a: 681b ldr r3, [r3, #0] + 802cb6c: 6d1b ldr r3, [r3, #80] ; 0x50 + 802cb6e: f003 7360 and.w r3, r3, #58720256 ; 0x3800000 + 802cb72: 643b str r3, [r7, #64] ; 0x40 ErrorStatusITs &= hfdcan->Instance->IE; - 802caf0: 687b ldr r3, [r7, #4] - 802caf2: 681b ldr r3, [r3, #0] - 802caf4: 6d5b ldr r3, [r3, #84] ; 0x54 - 802caf6: 6c3a ldr r2, [r7, #64] ; 0x40 - 802caf8: 4013 ands r3, r2 - 802cafa: 643b str r3, [r7, #64] ; 0x40 + 802cb74: 687b ldr r3, [r7, #4] + 802cb76: 681b ldr r3, [r3, #0] + 802cb78: 6d5b ldr r3, [r3, #84] ; 0x54 + 802cb7a: 6c3a ldr r2, [r7, #64] ; 0x40 + 802cb7c: 4013 ands r3, r2 + 802cb7e: 643b str r3, [r7, #64] ; 0x40 itsourceIE = hfdcan->Instance->IE; - 802cafc: 687b ldr r3, [r7, #4] - 802cafe: 681b ldr r3, [r3, #0] - 802cb00: 6d5b ldr r3, [r3, #84] ; 0x54 - 802cb02: 63fb str r3, [r7, #60] ; 0x3c + 802cb80: 687b ldr r3, [r7, #4] + 802cb82: 681b ldr r3, [r3, #0] + 802cb84: 6d5b ldr r3, [r3, #84] ; 0x54 + 802cb86: 63fb str r3, [r7, #60] ; 0x3c itflagIR = hfdcan->Instance->IR; - 802cb04: 687b ldr r3, [r7, #4] - 802cb06: 681b ldr r3, [r3, #0] - 802cb08: 6d1b ldr r3, [r3, #80] ; 0x50 - 802cb0a: 63bb str r3, [r7, #56] ; 0x38 + 802cb88: 687b ldr r3, [r7, #4] + 802cb8a: 681b ldr r3, [r3, #0] + 802cb8c: 6d1b ldr r3, [r3, #80] ; 0x50 + 802cb8e: 63bb str r3, [r7, #56] ; 0x38 /* High Priority Message interrupt management *******************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_RX_HIGH_PRIORITY_MSG) != RESET) - 802cb0c: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cb0e: 0a1b lsrs r3, r3, #8 - 802cb10: f003 0301 and.w r3, r3, #1 - 802cb14: 2b00 cmp r3, #0 - 802cb16: d010 beq.n 802cb3a + 802cb90: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cb92: 0a1b lsrs r3, r3, #8 + 802cb94: f003 0301 and.w r3, r3, #1 + 802cb98: 2b00 cmp r3, #0 + 802cb9a: d010 beq.n 802cbbe { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_RX_HIGH_PRIORITY_MSG) != RESET) - 802cb18: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cb1a: 0a1b lsrs r3, r3, #8 - 802cb1c: f003 0301 and.w r3, r3, #1 - 802cb20: 2b00 cmp r3, #0 - 802cb22: d00a beq.n 802cb3a + 802cb9c: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cb9e: 0a1b lsrs r3, r3, #8 + 802cba0: f003 0301 and.w r3, r3, #1 + 802cba4: 2b00 cmp r3, #0 + 802cba6: d00a beq.n 802cbbe { /* Clear the High Priority Message flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_RX_HIGH_PRIORITY_MSG); - 802cb24: 687b ldr r3, [r7, #4] - 802cb26: 681b ldr r3, [r3, #0] - 802cb28: f44f 7280 mov.w r2, #256 ; 0x100 - 802cb2c: 651a str r2, [r3, #80] ; 0x50 - 802cb2e: 4b6b ldr r3, [pc, #428] ; (802ccdc ) - 802cb30: 2200 movs r2, #0 - 802cb32: 611a str r2, [r3, #16] + 802cba8: 687b ldr r3, [r7, #4] + 802cbaa: 681b ldr r3, [r3, #0] + 802cbac: f44f 7280 mov.w r2, #256 ; 0x100 + 802cbb0: 651a str r2, [r3, #80] ; 0x50 + 802cbb2: 4b6b ldr r3, [pc, #428] ; (802cd60 ) + 802cbb4: 2200 movs r2, #0 + 802cbb6: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->HighPriorityMessageCallback(hfdcan); #else /* High Priority Message Callback */ HAL_FDCAN_HighPriorityMessageCallback(hfdcan); - 802cb34: 6878 ldr r0, [r7, #4] - 802cb36: f000 fa54 bl 802cfe2 + 802cbb8: 6878 ldr r0, [r7, #4] + 802cbba: f000 fa54 bl 802d066 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Transmission Abort interrupt management **********************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TX_ABORT_COMPLETE) != RESET) - 802cb3a: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cb3c: 0a9b lsrs r3, r3, #10 - 802cb3e: f003 0301 and.w r3, r3, #1 - 802cb42: 2b00 cmp r3, #0 - 802cb44: d01d beq.n 802cb82 + 802cbbe: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cbc0: 0a9b lsrs r3, r3, #10 + 802cbc2: f003 0301 and.w r3, r3, #1 + 802cbc6: 2b00 cmp r3, #0 + 802cbc8: d01d beq.n 802cc06 { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TX_ABORT_COMPLETE) != RESET) - 802cb46: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cb48: 0a9b lsrs r3, r3, #10 - 802cb4a: f003 0301 and.w r3, r3, #1 - 802cb4e: 2b00 cmp r3, #0 - 802cb50: d017 beq.n 802cb82 + 802cbca: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cbcc: 0a9b lsrs r3, r3, #10 + 802cbce: f003 0301 and.w r3, r3, #1 + 802cbd2: 2b00 cmp r3, #0 + 802cbd4: d017 beq.n 802cc06 { /* List of aborted monitored buffers */ AbortedBuffers = hfdcan->Instance->TXBCF; - 802cb52: 687b ldr r3, [r7, #4] - 802cb54: 681b ldr r3, [r3, #0] - 802cb56: f8d3 30dc ldr.w r3, [r3, #220] ; 0xdc - 802cb5a: 637b str r3, [r7, #52] ; 0x34 + 802cbd6: 687b ldr r3, [r7, #4] + 802cbd8: 681b ldr r3, [r3, #0] + 802cbda: f8d3 30dc ldr.w r3, [r3, #220] ; 0xdc + 802cbde: 637b str r3, [r7, #52] ; 0x34 AbortedBuffers &= hfdcan->Instance->TXBCIE; - 802cb5c: 687b ldr r3, [r7, #4] - 802cb5e: 681b ldr r3, [r3, #0] - 802cb60: f8d3 30e4 ldr.w r3, [r3, #228] ; 0xe4 - 802cb64: 6b7a ldr r2, [r7, #52] ; 0x34 - 802cb66: 4013 ands r3, r2 - 802cb68: 637b str r3, [r7, #52] ; 0x34 + 802cbe0: 687b ldr r3, [r7, #4] + 802cbe2: 681b ldr r3, [r3, #0] + 802cbe4: f8d3 30e4 ldr.w r3, [r3, #228] ; 0xe4 + 802cbe8: 6b7a ldr r2, [r7, #52] ; 0x34 + 802cbea: 4013 ands r3, r2 + 802cbec: 637b str r3, [r7, #52] ; 0x34 /* Clear the Transmission Cancellation flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TX_ABORT_COMPLETE); - 802cb6a: 687b ldr r3, [r7, #4] - 802cb6c: 681b ldr r3, [r3, #0] - 802cb6e: f44f 6280 mov.w r2, #1024 ; 0x400 - 802cb72: 651a str r2, [r3, #80] ; 0x50 - 802cb74: 4b59 ldr r3, [pc, #356] ; (802ccdc ) - 802cb76: 2200 movs r2, #0 - 802cb78: 611a str r2, [r3, #16] + 802cbee: 687b ldr r3, [r7, #4] + 802cbf0: 681b ldr r3, [r3, #0] + 802cbf2: f44f 6280 mov.w r2, #1024 ; 0x400 + 802cbf6: 651a str r2, [r3, #80] ; 0x50 + 802cbf8: 4b59 ldr r3, [pc, #356] ; (802cd60 ) + 802cbfa: 2200 movs r2, #0 + 802cbfc: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TxBufferAbortCallback(hfdcan, AbortedBuffers); #else /* Transmission Cancellation Callback */ HAL_FDCAN_TxBufferAbortCallback(hfdcan, AbortedBuffers); - 802cb7a: 6b79 ldr r1, [r7, #52] ; 0x34 - 802cb7c: 6878 ldr r0, [r7, #4] - 802cb7e: f000 fa07 bl 802cf90 + 802cbfe: 6b79 ldr r1, [r7, #52] ; 0x34 + 802cc00: 6878 ldr r0, [r7, #4] + 802cc02: f000 fa07 bl 802d014 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Clock calibration unit interrupts management *****************************/ if (ClkCalibrationITs != 0U) - 802cb82: 6d7b ldr r3, [r7, #84] ; 0x54 - 802cb84: 2b00 cmp r3, #0 - 802cb86: d00d beq.n 802cba4 + 802cc06: 6d7b ldr r3, [r7, #84] ; 0x54 + 802cc08: 2b00 cmp r3, #0 + 802cc0a: d00d beq.n 802cc28 { /* Clear the Clock Calibration flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, ClkCalibrationITs); - 802cb88: 687b ldr r3, [r7, #4] - 802cb8a: 681a ldr r2, [r3, #0] - 802cb8c: 6d79 ldr r1, [r7, #84] ; 0x54 - 802cb8e: 4b54 ldr r3, [pc, #336] ; (802cce0 ) - 802cb90: 400b ands r3, r1 - 802cb92: 6513 str r3, [r2, #80] ; 0x50 - 802cb94: 4a51 ldr r2, [pc, #324] ; (802ccdc ) - 802cb96: 6d7b ldr r3, [r7, #84] ; 0x54 - 802cb98: 0f9b lsrs r3, r3, #30 - 802cb9a: 6113 str r3, [r2, #16] + 802cc0c: 687b ldr r3, [r7, #4] + 802cc0e: 681a ldr r2, [r3, #0] + 802cc10: 6d79 ldr r1, [r7, #84] ; 0x54 + 802cc12: 4b54 ldr r3, [pc, #336] ; (802cd64 ) + 802cc14: 400b ands r3, r1 + 802cc16: 6513 str r3, [r2, #80] ; 0x50 + 802cc18: 4a51 ldr r2, [pc, #324] ; (802cd60 ) + 802cc1a: 6d7b ldr r3, [r7, #84] ; 0x54 + 802cc1c: 0f9b lsrs r3, r3, #30 + 802cc1e: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->ClockCalibrationCallback(hfdcan, ClkCalibrationITs); #else /* Clock Calibration Callback */ HAL_FDCAN_ClockCalibrationCallback(hfdcan, ClkCalibrationITs); - 802cb9c: 6d79 ldr r1, [r7, #84] ; 0x54 - 802cb9e: 6878 ldr r0, [r7, #4] - 802cba0: f000 f9c0 bl 802cf24 + 802cc20: 6d79 ldr r1, [r7, #84] ; 0x54 + 802cc22: 6878 ldr r0, [r7, #4] + 802cc24: f000 f9c0 bl 802cfa8 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Tx event FIFO interrupts management **************************************/ if (TxEventFifoITs != 0U) - 802cba4: 6d3b ldr r3, [r7, #80] ; 0x50 - 802cba6: 2b00 cmp r3, #0 - 802cba8: d00d beq.n 802cbc6 + 802cc28: 6d3b ldr r3, [r7, #80] ; 0x50 + 802cc2a: 2b00 cmp r3, #0 + 802cc2c: d00d beq.n 802cc4a { /* Clear the Tx Event FIFO flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, TxEventFifoITs); - 802cbaa: 687b ldr r3, [r7, #4] - 802cbac: 681a ldr r2, [r3, #0] - 802cbae: 6d39 ldr r1, [r7, #80] ; 0x50 - 802cbb0: 4b4b ldr r3, [pc, #300] ; (802cce0 ) - 802cbb2: 400b ands r3, r1 - 802cbb4: 6513 str r3, [r2, #80] ; 0x50 - 802cbb6: 4a49 ldr r2, [pc, #292] ; (802ccdc ) - 802cbb8: 6d3b ldr r3, [r7, #80] ; 0x50 - 802cbba: 0f9b lsrs r3, r3, #30 - 802cbbc: 6113 str r3, [r2, #16] + 802cc2e: 687b ldr r3, [r7, #4] + 802cc30: 681a ldr r2, [r3, #0] + 802cc32: 6d39 ldr r1, [r7, #80] ; 0x50 + 802cc34: 4b4b ldr r3, [pc, #300] ; (802cd64 ) + 802cc36: 400b ands r3, r1 + 802cc38: 6513 str r3, [r2, #80] ; 0x50 + 802cc3a: 4a49 ldr r2, [pc, #292] ; (802cd60 ) + 802cc3c: 6d3b ldr r3, [r7, #80] ; 0x50 + 802cc3e: 0f9b lsrs r3, r3, #30 + 802cc40: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TxEventFifoCallback(hfdcan, TxEventFifoITs); #else /* Tx Event FIFO Callback */ HAL_FDCAN_TxEventFifoCallback(hfdcan, TxEventFifoITs); - 802cbbe: 6d39 ldr r1, [r7, #80] ; 0x50 - 802cbc0: 6878 ldr r0, [r7, #4] - 802cbc2: f000 f9ba bl 802cf3a + 802cc42: 6d39 ldr r1, [r7, #80] ; 0x50 + 802cc44: 6878 ldr r0, [r7, #4] + 802cc46: f000 f9ba bl 802cfbe #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Rx FIFO 0 interrupts management ******************************************/ if (RxFifo0ITs != 0U) - 802cbc6: 6cfb ldr r3, [r7, #76] ; 0x4c - 802cbc8: 2b00 cmp r3, #0 - 802cbca: d00d beq.n 802cbe8 + 802cc4a: 6cfb ldr r3, [r7, #76] ; 0x4c + 802cc4c: 2b00 cmp r3, #0 + 802cc4e: d00d beq.n 802cc6c { /* Clear the Rx FIFO 0 flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, RxFifo0ITs); - 802cbcc: 687b ldr r3, [r7, #4] - 802cbce: 681a ldr r2, [r3, #0] - 802cbd0: 6cf9 ldr r1, [r7, #76] ; 0x4c - 802cbd2: 4b43 ldr r3, [pc, #268] ; (802cce0 ) - 802cbd4: 400b ands r3, r1 - 802cbd6: 6513 str r3, [r2, #80] ; 0x50 - 802cbd8: 4a40 ldr r2, [pc, #256] ; (802ccdc ) - 802cbda: 6cfb ldr r3, [r7, #76] ; 0x4c - 802cbdc: 0f9b lsrs r3, r3, #30 - 802cbde: 6113 str r3, [r2, #16] + 802cc50: 687b ldr r3, [r7, #4] + 802cc52: 681a ldr r2, [r3, #0] + 802cc54: 6cf9 ldr r1, [r7, #76] ; 0x4c + 802cc56: 4b43 ldr r3, [pc, #268] ; (802cd64 ) + 802cc58: 400b ands r3, r1 + 802cc5a: 6513 str r3, [r2, #80] ; 0x50 + 802cc5c: 4a40 ldr r2, [pc, #256] ; (802cd60 ) + 802cc5e: 6cfb ldr r3, [r7, #76] ; 0x4c + 802cc60: 0f9b lsrs r3, r3, #30 + 802cc62: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->RxFifo0Callback(hfdcan, RxFifo0ITs); #else /* Rx FIFO 0 Callback */ HAL_FDCAN_RxFifo0Callback(hfdcan, RxFifo0ITs); - 802cbe0: 6cf9 ldr r1, [r7, #76] ; 0x4c - 802cbe2: 6878 ldr r0, [r7, #4] - 802cbe4: f7f4 f8aa bl 8020d3c + 802cc64: 6cf9 ldr r1, [r7, #76] ; 0x4c + 802cc66: 6878 ldr r0, [r7, #4] + 802cc68: f7f4 f868 bl 8020d3c #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Rx FIFO 1 interrupts management ******************************************/ if (RxFifo1ITs != 0U) - 802cbe8: 6cbb ldr r3, [r7, #72] ; 0x48 - 802cbea: 2b00 cmp r3, #0 - 802cbec: d00d beq.n 802cc0a + 802cc6c: 6cbb ldr r3, [r7, #72] ; 0x48 + 802cc6e: 2b00 cmp r3, #0 + 802cc70: d00d beq.n 802cc8e { /* Clear the Rx FIFO 1 flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, RxFifo1ITs); - 802cbee: 687b ldr r3, [r7, #4] - 802cbf0: 681a ldr r2, [r3, #0] - 802cbf2: 6cb9 ldr r1, [r7, #72] ; 0x48 - 802cbf4: 4b3a ldr r3, [pc, #232] ; (802cce0 ) - 802cbf6: 400b ands r3, r1 - 802cbf8: 6513 str r3, [r2, #80] ; 0x50 - 802cbfa: 4a38 ldr r2, [pc, #224] ; (802ccdc ) - 802cbfc: 6cbb ldr r3, [r7, #72] ; 0x48 - 802cbfe: 0f9b lsrs r3, r3, #30 - 802cc00: 6113 str r3, [r2, #16] + 802cc72: 687b ldr r3, [r7, #4] + 802cc74: 681a ldr r2, [r3, #0] + 802cc76: 6cb9 ldr r1, [r7, #72] ; 0x48 + 802cc78: 4b3a ldr r3, [pc, #232] ; (802cd64 ) + 802cc7a: 400b ands r3, r1 + 802cc7c: 6513 str r3, [r2, #80] ; 0x50 + 802cc7e: 4a38 ldr r2, [pc, #224] ; (802cd60 ) + 802cc80: 6cbb ldr r3, [r7, #72] ; 0x48 + 802cc82: 0f9b lsrs r3, r3, #30 + 802cc84: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->RxFifo1Callback(hfdcan, RxFifo1ITs); #else /* Rx FIFO 1 Callback */ HAL_FDCAN_RxFifo1Callback(hfdcan, RxFifo1ITs); - 802cc02: 6cb9 ldr r1, [r7, #72] ; 0x48 - 802cc04: 6878 ldr r0, [r7, #4] - 802cc06: f000 f9a3 bl 802cf50 + 802cc86: 6cb9 ldr r1, [r7, #72] ; 0x48 + 802cc88: 6878 ldr r0, [r7, #4] + 802cc8a: f000 f9a3 bl 802cfd4 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Tx FIFO empty interrupt management ***************************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TX_FIFO_EMPTY) != RESET) - 802cc0a: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cc0c: 0adb lsrs r3, r3, #11 - 802cc0e: f003 0301 and.w r3, r3, #1 - 802cc12: 2b00 cmp r3, #0 - 802cc14: d010 beq.n 802cc38 + 802cc8e: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cc90: 0adb lsrs r3, r3, #11 + 802cc92: f003 0301 and.w r3, r3, #1 + 802cc96: 2b00 cmp r3, #0 + 802cc98: d010 beq.n 802ccbc { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TX_FIFO_EMPTY) != RESET) - 802cc16: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cc18: 0adb lsrs r3, r3, #11 - 802cc1a: f003 0301 and.w r3, r3, #1 - 802cc1e: 2b00 cmp r3, #0 - 802cc20: d00a beq.n 802cc38 + 802cc9a: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cc9c: 0adb lsrs r3, r3, #11 + 802cc9e: f003 0301 and.w r3, r3, #1 + 802cca2: 2b00 cmp r3, #0 + 802cca4: d00a beq.n 802ccbc { /* Clear the Tx FIFO empty flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TX_FIFO_EMPTY); - 802cc22: 687b ldr r3, [r7, #4] - 802cc24: 681b ldr r3, [r3, #0] - 802cc26: f44f 6200 mov.w r2, #2048 ; 0x800 - 802cc2a: 651a str r2, [r3, #80] ; 0x50 - 802cc2c: 4b2b ldr r3, [pc, #172] ; (802ccdc ) - 802cc2e: 2200 movs r2, #0 - 802cc30: 611a str r2, [r3, #16] + 802cca6: 687b ldr r3, [r7, #4] + 802cca8: 681b ldr r3, [r3, #0] + 802ccaa: f44f 6200 mov.w r2, #2048 ; 0x800 + 802ccae: 651a str r2, [r3, #80] ; 0x50 + 802ccb0: 4b2b ldr r3, [pc, #172] ; (802cd60 ) + 802ccb2: 2200 movs r2, #0 + 802ccb4: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TxFifoEmptyCallback(hfdcan); #else /* Tx FIFO empty Callback */ HAL_FDCAN_TxFifoEmptyCallback(hfdcan); - 802cc32: 6878 ldr r0, [r7, #4] - 802cc34: f000 f997 bl 802cf66 + 802ccb6: 6878 ldr r0, [r7, #4] + 802ccb8: f000 f997 bl 802cfea #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Transmission Complete interrupt management *******************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TX_COMPLETE) != RESET) - 802cc38: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cc3a: 0a5b lsrs r3, r3, #9 - 802cc3c: f003 0301 and.w r3, r3, #1 - 802cc40: 2b00 cmp r3, #0 - 802cc42: d01d beq.n 802cc80 + 802ccbc: 6bfb ldr r3, [r7, #60] ; 0x3c + 802ccbe: 0a5b lsrs r3, r3, #9 + 802ccc0: f003 0301 and.w r3, r3, #1 + 802ccc4: 2b00 cmp r3, #0 + 802ccc6: d01d beq.n 802cd04 { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TX_COMPLETE) != RESET) - 802cc44: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cc46: 0a5b lsrs r3, r3, #9 - 802cc48: f003 0301 and.w r3, r3, #1 - 802cc4c: 2b00 cmp r3, #0 - 802cc4e: d017 beq.n 802cc80 + 802ccc8: 6bbb ldr r3, [r7, #56] ; 0x38 + 802ccca: 0a5b lsrs r3, r3, #9 + 802cccc: f003 0301 and.w r3, r3, #1 + 802ccd0: 2b00 cmp r3, #0 + 802ccd2: d017 beq.n 802cd04 { /* List of transmitted monitored buffers */ TransmittedBuffers = hfdcan->Instance->TXBTO; - 802cc50: 687b ldr r3, [r7, #4] - 802cc52: 681b ldr r3, [r3, #0] - 802cc54: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 802cc58: 633b str r3, [r7, #48] ; 0x30 + 802ccd4: 687b ldr r3, [r7, #4] + 802ccd6: 681b ldr r3, [r3, #0] + 802ccd8: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 802ccdc: 633b str r3, [r7, #48] ; 0x30 TransmittedBuffers &= hfdcan->Instance->TXBTIE; - 802cc5a: 687b ldr r3, [r7, #4] - 802cc5c: 681b ldr r3, [r3, #0] - 802cc5e: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 802cc62: 6b3a ldr r2, [r7, #48] ; 0x30 - 802cc64: 4013 ands r3, r2 - 802cc66: 633b str r3, [r7, #48] ; 0x30 + 802ccde: 687b ldr r3, [r7, #4] + 802cce0: 681b ldr r3, [r3, #0] + 802cce2: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 802cce6: 6b3a ldr r2, [r7, #48] ; 0x30 + 802cce8: 4013 ands r3, r2 + 802ccea: 633b str r3, [r7, #48] ; 0x30 /* Clear the Transmission Complete flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TX_COMPLETE); - 802cc68: 687b ldr r3, [r7, #4] - 802cc6a: 681b ldr r3, [r3, #0] - 802cc6c: f44f 7200 mov.w r2, #512 ; 0x200 - 802cc70: 651a str r2, [r3, #80] ; 0x50 - 802cc72: 4b1a ldr r3, [pc, #104] ; (802ccdc ) - 802cc74: 2200 movs r2, #0 - 802cc76: 611a str r2, [r3, #16] + 802ccec: 687b ldr r3, [r7, #4] + 802ccee: 681b ldr r3, [r3, #0] + 802ccf0: f44f 7200 mov.w r2, #512 ; 0x200 + 802ccf4: 651a str r2, [r3, #80] ; 0x50 + 802ccf6: 4b1a ldr r3, [pc, #104] ; (802cd60 ) + 802ccf8: 2200 movs r2, #0 + 802ccfa: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TxBufferCompleteCallback(hfdcan, TransmittedBuffers); #else /* Transmission Complete Callback */ HAL_FDCAN_TxBufferCompleteCallback(hfdcan, TransmittedBuffers); - 802cc78: 6b39 ldr r1, [r7, #48] ; 0x30 - 802cc7a: 6878 ldr r0, [r7, #4] - 802cc7c: f000 f97d bl 802cf7a + 802ccfc: 6b39 ldr r1, [r7, #48] ; 0x30 + 802ccfe: 6878 ldr r0, [r7, #4] + 802cd00: f000 f97d bl 802cffe #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Rx Buffer New Message interrupt management *******************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_RX_BUFFER_NEW_MESSAGE) != RESET) - 802cc80: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cc82: 0cdb lsrs r3, r3, #19 - 802cc84: f003 0301 and.w r3, r3, #1 - 802cc88: 2b00 cmp r3, #0 - 802cc8a: d010 beq.n 802ccae + 802cd04: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cd06: 0cdb lsrs r3, r3, #19 + 802cd08: f003 0301 and.w r3, r3, #1 + 802cd0c: 2b00 cmp r3, #0 + 802cd0e: d010 beq.n 802cd32 { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_RX_BUFFER_NEW_MESSAGE) != RESET) - 802cc8c: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cc8e: 0cdb lsrs r3, r3, #19 - 802cc90: f003 0301 and.w r3, r3, #1 - 802cc94: 2b00 cmp r3, #0 - 802cc96: d00a beq.n 802ccae + 802cd10: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cd12: 0cdb lsrs r3, r3, #19 + 802cd14: f003 0301 and.w r3, r3, #1 + 802cd18: 2b00 cmp r3, #0 + 802cd1a: d00a beq.n 802cd32 { /* Clear the Rx Buffer New Message flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_RX_BUFFER_NEW_MESSAGE); - 802cc98: 687b ldr r3, [r7, #4] - 802cc9a: 681b ldr r3, [r3, #0] - 802cc9c: f44f 2200 mov.w r2, #524288 ; 0x80000 - 802cca0: 651a str r2, [r3, #80] ; 0x50 - 802cca2: 4b0e ldr r3, [pc, #56] ; (802ccdc ) - 802cca4: 2200 movs r2, #0 - 802cca6: 611a str r2, [r3, #16] + 802cd1c: 687b ldr r3, [r7, #4] + 802cd1e: 681b ldr r3, [r3, #0] + 802cd20: f44f 2200 mov.w r2, #524288 ; 0x80000 + 802cd24: 651a str r2, [r3, #80] ; 0x50 + 802cd26: 4b0e ldr r3, [pc, #56] ; (802cd60 ) + 802cd28: 2200 movs r2, #0 + 802cd2a: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->RxBufferNewMessageCallback(hfdcan); #else /* Rx Buffer New Message Callback */ HAL_FDCAN_RxBufferNewMessageCallback(hfdcan); - 802cca8: 6878 ldr r0, [r7, #4] - 802ccaa: f000 f97c bl 802cfa6 + 802cd2c: 6878 ldr r0, [r7, #4] + 802cd2e: f000 f97c bl 802d02a #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Timestamp Wraparound interrupt management ********************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TIMESTAMP_WRAPAROUND) != RESET) - 802ccae: 6bfb ldr r3, [r7, #60] ; 0x3c - 802ccb0: 0c1b lsrs r3, r3, #16 - 802ccb2: f003 0301 and.w r3, r3, #1 - 802ccb6: 2b00 cmp r3, #0 - 802ccb8: d016 beq.n 802cce8 + 802cd32: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cd34: 0c1b lsrs r3, r3, #16 + 802cd36: f003 0301 and.w r3, r3, #1 + 802cd3a: 2b00 cmp r3, #0 + 802cd3c: d016 beq.n 802cd6c { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TIMESTAMP_WRAPAROUND) != RESET) - 802ccba: 6bbb ldr r3, [r7, #56] ; 0x38 - 802ccbc: 0c1b lsrs r3, r3, #16 - 802ccbe: f003 0301 and.w r3, r3, #1 - 802ccc2: 2b00 cmp r3, #0 - 802ccc4: d010 beq.n 802cce8 + 802cd3e: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cd40: 0c1b lsrs r3, r3, #16 + 802cd42: f003 0301 and.w r3, r3, #1 + 802cd46: 2b00 cmp r3, #0 + 802cd48: d010 beq.n 802cd6c { /* Clear the Timestamp Wraparound flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TIMESTAMP_WRAPAROUND); - 802ccc6: 687b ldr r3, [r7, #4] - 802ccc8: 681b ldr r3, [r3, #0] - 802ccca: f44f 3280 mov.w r2, #65536 ; 0x10000 - 802ccce: 651a str r2, [r3, #80] ; 0x50 - 802ccd0: 4b02 ldr r3, [pc, #8] ; (802ccdc ) - 802ccd2: 2200 movs r2, #0 - 802ccd4: 611a str r2, [r3, #16] + 802cd4a: 687b ldr r3, [r7, #4] + 802cd4c: 681b ldr r3, [r3, #0] + 802cd4e: f44f 3280 mov.w r2, #65536 ; 0x10000 + 802cd52: 651a str r2, [r3, #80] ; 0x50 + 802cd54: 4b02 ldr r3, [pc, #8] ; (802cd60 ) + 802cd56: 2200 movs r2, #0 + 802cd58: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TimestampWraparoundCallback(hfdcan); #else /* Timestamp Wraparound Callback */ HAL_FDCAN_TimestampWraparoundCallback(hfdcan); - 802ccd6: 6878 ldr r0, [r7, #4] - 802ccd8: e004 b.n 802cce4 - 802ccda: bf00 nop - 802ccdc: 4000a800 .word 0x4000a800 - 802cce0: 3fcfffff .word 0x3fcfffff - 802cce4: f000 f969 bl 802cfba + 802cd5a: 6878 ldr r0, [r7, #4] + 802cd5c: e004 b.n 802cd68 + 802cd5e: bf00 nop + 802cd60: 4000a800 .word 0x4000a800 + 802cd64: 3fcfffff .word 0x3fcfffff + 802cd68: f000 f969 bl 802d03e #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Timeout Occurred interrupt management ************************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_TIMEOUT_OCCURRED) != RESET) - 802cce8: 6bfb ldr r3, [r7, #60] ; 0x3c - 802ccea: 0c9b lsrs r3, r3, #18 - 802ccec: f003 0301 and.w r3, r3, #1 - 802ccf0: 2b00 cmp r3, #0 - 802ccf2: d010 beq.n 802cd16 + 802cd6c: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cd6e: 0c9b lsrs r3, r3, #18 + 802cd70: f003 0301 and.w r3, r3, #1 + 802cd74: 2b00 cmp r3, #0 + 802cd76: d010 beq.n 802cd9a { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_TIMEOUT_OCCURRED) != RESET) - 802ccf4: 6bbb ldr r3, [r7, #56] ; 0x38 - 802ccf6: 0c9b lsrs r3, r3, #18 - 802ccf8: f003 0301 and.w r3, r3, #1 - 802ccfc: 2b00 cmp r3, #0 - 802ccfe: d00a beq.n 802cd16 + 802cd78: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cd7a: 0c9b lsrs r3, r3, #18 + 802cd7c: f003 0301 and.w r3, r3, #1 + 802cd80: 2b00 cmp r3, #0 + 802cd82: d00a beq.n 802cd9a { /* Clear the Timeout Occurred flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_TIMEOUT_OCCURRED); - 802cd00: 687b ldr r3, [r7, #4] - 802cd02: 681b ldr r3, [r3, #0] - 802cd04: f44f 2280 mov.w r2, #262144 ; 0x40000 - 802cd08: 651a str r2, [r3, #80] ; 0x50 - 802cd0a: 4b83 ldr r3, [pc, #524] ; (802cf18 ) - 802cd0c: 2200 movs r2, #0 - 802cd0e: 611a str r2, [r3, #16] + 802cd84: 687b ldr r3, [r7, #4] + 802cd86: 681b ldr r3, [r3, #0] + 802cd88: f44f 2280 mov.w r2, #262144 ; 0x40000 + 802cd8c: 651a str r2, [r3, #80] ; 0x50 + 802cd8e: 4b83 ldr r3, [pc, #524] ; (802cf9c ) + 802cd90: 2200 movs r2, #0 + 802cd92: 611a str r2, [r3, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TimeoutOccurredCallback(hfdcan); #else /* Timeout Occurred Callback */ HAL_FDCAN_TimeoutOccurredCallback(hfdcan); - 802cd10: 6878 ldr r0, [r7, #4] - 802cd12: f000 f95c bl 802cfce + 802cd94: 6878 ldr r0, [r7, #4] + 802cd96: f000 f95c bl 802d052 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* Message RAM access failure interrupt management **************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceIE, FDCAN_IT_RAM_ACCESS_FAILURE) != RESET) - 802cd16: 6bfb ldr r3, [r7, #60] ; 0x3c - 802cd18: 0c5b lsrs r3, r3, #17 - 802cd1a: f003 0301 and.w r3, r3, #1 - 802cd1e: 2b00 cmp r3, #0 - 802cd20: d015 beq.n 802cd4e + 802cd9a: 6bfb ldr r3, [r7, #60] ; 0x3c + 802cd9c: 0c5b lsrs r3, r3, #17 + 802cd9e: f003 0301 and.w r3, r3, #1 + 802cda2: 2b00 cmp r3, #0 + 802cda4: d015 beq.n 802cdd2 { if (FDCAN_CHECK_FLAG(itflagIR, FDCAN_FLAG_RAM_ACCESS_FAILURE) != RESET) - 802cd22: 6bbb ldr r3, [r7, #56] ; 0x38 - 802cd24: 0c5b lsrs r3, r3, #17 - 802cd26: f003 0301 and.w r3, r3, #1 - 802cd2a: 2b00 cmp r3, #0 - 802cd2c: d00f beq.n 802cd4e + 802cda6: 6bbb ldr r3, [r7, #56] ; 0x38 + 802cda8: 0c5b lsrs r3, r3, #17 + 802cdaa: f003 0301 and.w r3, r3, #1 + 802cdae: 2b00 cmp r3, #0 + 802cdb0: d00f beq.n 802cdd2 { /* Clear the Message RAM access failure flag */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, FDCAN_FLAG_RAM_ACCESS_FAILURE); - 802cd2e: 687b ldr r3, [r7, #4] - 802cd30: 681b ldr r3, [r3, #0] - 802cd32: f44f 3200 mov.w r2, #131072 ; 0x20000 - 802cd36: 651a str r2, [r3, #80] ; 0x50 - 802cd38: 4b77 ldr r3, [pc, #476] ; (802cf18 ) - 802cd3a: 2200 movs r2, #0 - 802cd3c: 611a str r2, [r3, #16] + 802cdb2: 687b ldr r3, [r7, #4] + 802cdb4: 681b ldr r3, [r3, #0] + 802cdb6: f44f 3200 mov.w r2, #131072 ; 0x20000 + 802cdba: 651a str r2, [r3, #80] ; 0x50 + 802cdbc: 4b77 ldr r3, [pc, #476] ; (802cf9c ) + 802cdbe: 2200 movs r2, #0 + 802cdc0: 611a str r2, [r3, #16] /* Update error code */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_RAM_ACCESS; - 802cd3e: 687b ldr r3, [r7, #4] - 802cd40: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802cd44: f043 0280 orr.w r2, r3, #128 ; 0x80 - 802cd48: 687b ldr r3, [r7, #4] - 802cd4a: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802cdc2: 687b ldr r3, [r7, #4] + 802cdc4: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802cdc8: f043 0280 orr.w r2, r3, #128 ; 0x80 + 802cdcc: 687b ldr r3, [r7, #4] + 802cdce: f8c3 209c str.w r2, [r3, #156] ; 0x9c } } /* Error Status interrupts management ***************************************/ if (ErrorStatusITs != 0U) - 802cd4e: 6c3b ldr r3, [r7, #64] ; 0x40 - 802cd50: 2b00 cmp r3, #0 - 802cd52: d00d beq.n 802cd70 + 802cdd2: 6c3b ldr r3, [r7, #64] ; 0x40 + 802cdd4: 2b00 cmp r3, #0 + 802cdd6: d00d beq.n 802cdf4 { /* Clear the Error flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, ErrorStatusITs); - 802cd54: 687b ldr r3, [r7, #4] - 802cd56: 681a ldr r2, [r3, #0] - 802cd58: 6c39 ldr r1, [r7, #64] ; 0x40 - 802cd5a: 4b70 ldr r3, [pc, #448] ; (802cf1c ) - 802cd5c: 400b ands r3, r1 - 802cd5e: 6513 str r3, [r2, #80] ; 0x50 - 802cd60: 4a6d ldr r2, [pc, #436] ; (802cf18 ) - 802cd62: 6c3b ldr r3, [r7, #64] ; 0x40 - 802cd64: 0f9b lsrs r3, r3, #30 - 802cd66: 6113 str r3, [r2, #16] + 802cdd8: 687b ldr r3, [r7, #4] + 802cdda: 681a ldr r2, [r3, #0] + 802cddc: 6c39 ldr r1, [r7, #64] ; 0x40 + 802cdde: 4b70 ldr r3, [pc, #448] ; (802cfa0 ) + 802cde0: 400b ands r3, r1 + 802cde2: 6513 str r3, [r2, #80] ; 0x50 + 802cde4: 4a6d ldr r2, [pc, #436] ; (802cf9c ) + 802cde6: 6c3b ldr r3, [r7, #64] ; 0x40 + 802cde8: 0f9b lsrs r3, r3, #30 + 802cdea: 6113 str r3, [r2, #16] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->ErrorStatusCallback(hfdcan, ErrorStatusITs); #else /* Error Status Callback */ HAL_FDCAN_ErrorStatusCallback(hfdcan, ErrorStatusITs); - 802cd68: 6c39 ldr r1, [r7, #64] ; 0x40 - 802cd6a: 6878 ldr r0, [r7, #4] - 802cd6c: f7f3 ffca bl 8020d04 + 802cdec: 6c39 ldr r1, [r7, #64] ; 0x40 + 802cdee: 6878 ldr r0, [r7, #4] + 802cdf0: f7f3 ff88 bl 8020d04 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* Error interrupts management **********************************************/ if (Errors != 0U) - 802cd70: 6c7b ldr r3, [r7, #68] ; 0x44 - 802cd72: 2b00 cmp r3, #0 - 802cd74: d011 beq.n 802cd9a + 802cdf4: 6c7b ldr r3, [r7, #68] ; 0x44 + 802cdf6: 2b00 cmp r3, #0 + 802cdf8: d011 beq.n 802ce1e { /* Clear the Error flags */ __HAL_FDCAN_CLEAR_FLAG(hfdcan, Errors); - 802cd76: 687b ldr r3, [r7, #4] - 802cd78: 681a ldr r2, [r3, #0] - 802cd7a: 6c79 ldr r1, [r7, #68] ; 0x44 - 802cd7c: 4b67 ldr r3, [pc, #412] ; (802cf1c ) - 802cd7e: 400b ands r3, r1 - 802cd80: 6513 str r3, [r2, #80] ; 0x50 - 802cd82: 4a65 ldr r2, [pc, #404] ; (802cf18 ) - 802cd84: 6c7b ldr r3, [r7, #68] ; 0x44 - 802cd86: 0f9b lsrs r3, r3, #30 - 802cd88: 6113 str r3, [r2, #16] + 802cdfa: 687b ldr r3, [r7, #4] + 802cdfc: 681a ldr r2, [r3, #0] + 802cdfe: 6c79 ldr r1, [r7, #68] ; 0x44 + 802ce00: 4b67 ldr r3, [pc, #412] ; (802cfa0 ) + 802ce02: 400b ands r3, r1 + 802ce04: 6513 str r3, [r2, #80] ; 0x50 + 802ce06: 4a65 ldr r2, [pc, #404] ; (802cf9c ) + 802ce08: 6c7b ldr r3, [r7, #68] ; 0x44 + 802ce0a: 0f9b lsrs r3, r3, #30 + 802ce0c: 6113 str r3, [r2, #16] /* Update error code */ hfdcan->ErrorCode |= Errors; - 802cd8a: 687b ldr r3, [r7, #4] - 802cd8c: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c - 802cd90: 6c7b ldr r3, [r7, #68] ; 0x44 - 802cd92: 431a orrs r2, r3 - 802cd94: 687b ldr r3, [r7, #4] - 802cd96: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802ce0e: 687b ldr r3, [r7, #4] + 802ce10: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c + 802ce14: 6c7b ldr r3, [r7, #68] ; 0x44 + 802ce16: 431a orrs r2, r3 + 802ce18: 687b ldr r3, [r7, #4] + 802ce1a: f8c3 209c str.w r2, [r3, #156] ; 0x9c } if (hfdcan->Instance == FDCAN1) - 802cd9a: 687b ldr r3, [r7, #4] - 802cd9c: 681b ldr r3, [r3, #0] - 802cd9e: 4a60 ldr r2, [pc, #384] ; (802cf20 ) - 802cda0: 4293 cmp r3, r2 - 802cda2: f040 80ac bne.w 802cefe + 802ce1e: 687b ldr r3, [r7, #4] + 802ce20: 681b ldr r3, [r3, #0] + 802ce22: 4a60 ldr r2, [pc, #384] ; (802cfa4 ) + 802ce24: 4293 cmp r3, r2 + 802ce26: f040 80ac bne.w 802cf82 { if ((hfdcan->ttcan->TTOCF & FDCAN_TTOCF_OM) != 0U) - 802cda6: 687b ldr r3, [r7, #4] - 802cda8: 685b ldr r3, [r3, #4] - 802cdaa: 689b ldr r3, [r3, #8] - 802cdac: f003 0303 and.w r3, r3, #3 - 802cdb0: 2b00 cmp r3, #0 - 802cdb2: f000 80a4 beq.w 802cefe + 802ce2a: 687b ldr r3, [r7, #4] + 802ce2c: 685b ldr r3, [r3, #4] + 802ce2e: 689b ldr r3, [r3, #8] + 802ce30: f003 0303 and.w r3, r3, #3 + 802ce34: 2b00 cmp r3, #0 + 802ce36: f000 80a4 beq.w 802cf82 { TTSchedSyncITs = hfdcan->ttcan->TTIR & FDCAN_TT_SCHEDULE_SYNC_MASK; - 802cdb6: 687b ldr r3, [r7, #4] - 802cdb8: 685b ldr r3, [r3, #4] - 802cdba: 6a1b ldr r3, [r3, #32] - 802cdbc: f003 030f and.w r3, r3, #15 - 802cdc0: 62fb str r3, [r7, #44] ; 0x2c + 802ce3a: 687b ldr r3, [r7, #4] + 802ce3c: 685b ldr r3, [r3, #4] + 802ce3e: 6a1b ldr r3, [r3, #32] + 802ce40: f003 030f and.w r3, r3, #15 + 802ce44: 62fb str r3, [r7, #44] ; 0x2c TTSchedSyncITs &= hfdcan->ttcan->TTIE; - 802cdc2: 687b ldr r3, [r7, #4] - 802cdc4: 685b ldr r3, [r3, #4] - 802cdc6: 6a5b ldr r3, [r3, #36] ; 0x24 - 802cdc8: 6afa ldr r2, [r7, #44] ; 0x2c - 802cdca: 4013 ands r3, r2 - 802cdcc: 62fb str r3, [r7, #44] ; 0x2c + 802ce46: 687b ldr r3, [r7, #4] + 802ce48: 685b ldr r3, [r3, #4] + 802ce4a: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ce4c: 6afa ldr r2, [r7, #44] ; 0x2c + 802ce4e: 4013 ands r3, r2 + 802ce50: 62fb str r3, [r7, #44] ; 0x2c TTTimeMarkITs = hfdcan->ttcan->TTIR & FDCAN_TT_TIME_MARK_MASK; - 802cdce: 687b ldr r3, [r7, #4] - 802cdd0: 685b ldr r3, [r3, #4] - 802cdd2: 6a1b ldr r3, [r3, #32] - 802cdd4: f003 0330 and.w r3, r3, #48 ; 0x30 - 802cdd8: 62bb str r3, [r7, #40] ; 0x28 + 802ce52: 687b ldr r3, [r7, #4] + 802ce54: 685b ldr r3, [r3, #4] + 802ce56: 6a1b ldr r3, [r3, #32] + 802ce58: f003 0330 and.w r3, r3, #48 ; 0x30 + 802ce5c: 62bb str r3, [r7, #40] ; 0x28 TTTimeMarkITs &= hfdcan->ttcan->TTIE; - 802cdda: 687b ldr r3, [r7, #4] - 802cddc: 685b ldr r3, [r3, #4] - 802cdde: 6a5b ldr r3, [r3, #36] ; 0x24 - 802cde0: 6aba ldr r2, [r7, #40] ; 0x28 - 802cde2: 4013 ands r3, r2 - 802cde4: 62bb str r3, [r7, #40] ; 0x28 + 802ce5e: 687b ldr r3, [r7, #4] + 802ce60: 685b ldr r3, [r3, #4] + 802ce62: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ce64: 6aba ldr r2, [r7, #40] ; 0x28 + 802ce66: 4013 ands r3, r2 + 802ce68: 62bb str r3, [r7, #40] ; 0x28 TTGlobTimeITs = hfdcan->ttcan->TTIR & FDCAN_TT_GLOBAL_TIME_MASK; - 802cde6: 687b ldr r3, [r7, #4] - 802cde8: 685b ldr r3, [r3, #4] - 802cdea: 6a1b ldr r3, [r3, #32] - 802cdec: f403 73c0 and.w r3, r3, #384 ; 0x180 - 802cdf0: 627b str r3, [r7, #36] ; 0x24 + 802ce6a: 687b ldr r3, [r7, #4] + 802ce6c: 685b ldr r3, [r3, #4] + 802ce6e: 6a1b ldr r3, [r3, #32] + 802ce70: f403 73c0 and.w r3, r3, #384 ; 0x180 + 802ce74: 627b str r3, [r7, #36] ; 0x24 TTGlobTimeITs &= hfdcan->ttcan->TTIE; - 802cdf2: 687b ldr r3, [r7, #4] - 802cdf4: 685b ldr r3, [r3, #4] - 802cdf6: 6a5b ldr r3, [r3, #36] ; 0x24 - 802cdf8: 6a7a ldr r2, [r7, #36] ; 0x24 - 802cdfa: 4013 ands r3, r2 - 802cdfc: 627b str r3, [r7, #36] ; 0x24 + 802ce76: 687b ldr r3, [r7, #4] + 802ce78: 685b ldr r3, [r3, #4] + 802ce7a: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ce7c: 6a7a ldr r2, [r7, #36] ; 0x24 + 802ce7e: 4013 ands r3, r2 + 802ce80: 627b str r3, [r7, #36] ; 0x24 TTDistErrors = hfdcan->ttcan->TTIR & FDCAN_TT_DISTURBING_ERROR_MASK; - 802cdfe: 687b ldr r3, [r7, #4] - 802ce00: 685b ldr r3, [r3, #4] - 802ce02: 6a1b ldr r3, [r3, #32] - 802ce04: f403 43fc and.w r3, r3, #32256 ; 0x7e00 - 802ce08: 623b str r3, [r7, #32] + 802ce82: 687b ldr r3, [r7, #4] + 802ce84: 685b ldr r3, [r3, #4] + 802ce86: 6a1b ldr r3, [r3, #32] + 802ce88: f403 43fc and.w r3, r3, #32256 ; 0x7e00 + 802ce8c: 623b str r3, [r7, #32] TTDistErrors &= hfdcan->ttcan->TTIE; - 802ce0a: 687b ldr r3, [r7, #4] - 802ce0c: 685b ldr r3, [r3, #4] - 802ce0e: 6a5b ldr r3, [r3, #36] ; 0x24 - 802ce10: 6a3a ldr r2, [r7, #32] - 802ce12: 4013 ands r3, r2 - 802ce14: 623b str r3, [r7, #32] + 802ce8e: 687b ldr r3, [r7, #4] + 802ce90: 685b ldr r3, [r3, #4] + 802ce92: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ce94: 6a3a ldr r2, [r7, #32] + 802ce96: 4013 ands r3, r2 + 802ce98: 623b str r3, [r7, #32] TTFatalErrors = hfdcan->ttcan->TTIR & FDCAN_TT_FATAL_ERROR_MASK; - 802ce16: 687b ldr r3, [r7, #4] - 802ce18: 685b ldr r3, [r3, #4] - 802ce1a: 6a1b ldr r3, [r3, #32] - 802ce1c: f403 23f0 and.w r3, r3, #491520 ; 0x78000 - 802ce20: 61fb str r3, [r7, #28] + 802ce9a: 687b ldr r3, [r7, #4] + 802ce9c: 685b ldr r3, [r3, #4] + 802ce9e: 6a1b ldr r3, [r3, #32] + 802cea0: f403 23f0 and.w r3, r3, #491520 ; 0x78000 + 802cea4: 61fb str r3, [r7, #28] TTFatalErrors &= hfdcan->ttcan->TTIE; - 802ce22: 687b ldr r3, [r7, #4] - 802ce24: 685b ldr r3, [r3, #4] - 802ce26: 6a5b ldr r3, [r3, #36] ; 0x24 - 802ce28: 69fa ldr r2, [r7, #28] - 802ce2a: 4013 ands r3, r2 - 802ce2c: 61fb str r3, [r7, #28] + 802cea6: 687b ldr r3, [r7, #4] + 802cea8: 685b ldr r3, [r3, #4] + 802ceaa: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ceac: 69fa ldr r2, [r7, #28] + 802ceae: 4013 ands r3, r2 + 802ceb0: 61fb str r3, [r7, #28] itsourceTTIE = hfdcan->ttcan->TTIE; - 802ce2e: 687b ldr r3, [r7, #4] - 802ce30: 685b ldr r3, [r3, #4] - 802ce32: 6a5b ldr r3, [r3, #36] ; 0x24 - 802ce34: 61bb str r3, [r7, #24] + 802ceb2: 687b ldr r3, [r7, #4] + 802ceb4: 685b ldr r3, [r3, #4] + 802ceb6: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ceb8: 61bb str r3, [r7, #24] itflagTTIR = hfdcan->ttcan->TTIR; - 802ce36: 687b ldr r3, [r7, #4] - 802ce38: 685b ldr r3, [r3, #4] - 802ce3a: 6a1b ldr r3, [r3, #32] - 802ce3c: 617b str r3, [r7, #20] + 802ceba: 687b ldr r3, [r7, #4] + 802cebc: 685b ldr r3, [r3, #4] + 802cebe: 6a1b ldr r3, [r3, #32] + 802cec0: 617b str r3, [r7, #20] /* TT Schedule Synchronization interrupts management **********************/ if (TTSchedSyncITs != 0U) - 802ce3e: 6afb ldr r3, [r7, #44] ; 0x2c - 802ce40: 2b00 cmp r3, #0 - 802ce42: d007 beq.n 802ce54 + 802cec2: 6afb ldr r3, [r7, #44] ; 0x2c + 802cec4: 2b00 cmp r3, #0 + 802cec6: d007 beq.n 802ced8 { /* Clear the TT Schedule Synchronization flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTSchedSyncITs); - 802ce44: 687b ldr r3, [r7, #4] - 802ce46: 685b ldr r3, [r3, #4] - 802ce48: 6afa ldr r2, [r7, #44] ; 0x2c - 802ce4a: 621a str r2, [r3, #32] + 802cec8: 687b ldr r3, [r7, #4] + 802ceca: 685b ldr r3, [r3, #4] + 802cecc: 6afa ldr r2, [r7, #44] ; 0x2c + 802cece: 621a str r2, [r3, #32] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TT_ScheduleSyncCallback(hfdcan, TTSchedSyncITs); #else /* TT Schedule Synchronization Callback */ HAL_FDCAN_TT_ScheduleSyncCallback(hfdcan, TTSchedSyncITs); - 802ce4c: 6af9 ldr r1, [r7, #44] ; 0x2c - 802ce4e: 6878 ldr r0, [r7, #4] - 802ce50: f000 f8db bl 802d00a + 802ced0: 6af9 ldr r1, [r7, #44] ; 0x2c + 802ced2: 6878 ldr r0, [r7, #4] + 802ced4: f000 f8db bl 802d08e #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* TT Time Mark interrupts management *************************************/ if (TTTimeMarkITs != 0U) - 802ce54: 6abb ldr r3, [r7, #40] ; 0x28 - 802ce56: 2b00 cmp r3, #0 - 802ce58: d007 beq.n 802ce6a + 802ced8: 6abb ldr r3, [r7, #40] ; 0x28 + 802ceda: 2b00 cmp r3, #0 + 802cedc: d007 beq.n 802ceee { /* Clear the TT Time Mark flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTTimeMarkITs); - 802ce5a: 687b ldr r3, [r7, #4] - 802ce5c: 685b ldr r3, [r3, #4] - 802ce5e: 6aba ldr r2, [r7, #40] ; 0x28 - 802ce60: 621a str r2, [r3, #32] + 802cede: 687b ldr r3, [r7, #4] + 802cee0: 685b ldr r3, [r3, #4] + 802cee2: 6aba ldr r2, [r7, #40] ; 0x28 + 802cee4: 621a str r2, [r3, #32] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TT_TimeMarkCallback(hfdcan, TTTimeMarkITs); #else /* TT Time Mark Callback */ HAL_FDCAN_TT_TimeMarkCallback(hfdcan, TTTimeMarkITs); - 802ce62: 6ab9 ldr r1, [r7, #40] ; 0x28 - 802ce64: 6878 ldr r0, [r7, #4] - 802ce66: f000 f8db bl 802d020 + 802cee6: 6ab9 ldr r1, [r7, #40] ; 0x28 + 802cee8: 6878 ldr r0, [r7, #4] + 802ceea: f000 f8db bl 802d0a4 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* TT Stop Watch interrupt management *************************************/ if (FDCAN_CHECK_IT_SOURCE(itsourceTTIE, FDCAN_TT_IT_STOP_WATCH) != RESET) - 802ce6a: 69bb ldr r3, [r7, #24] - 802ce6c: 099b lsrs r3, r3, #6 - 802ce6e: f003 0301 and.w r3, r3, #1 - 802ce72: 2b00 cmp r3, #0 - 802ce74: d01a beq.n 802ceac + 802ceee: 69bb ldr r3, [r7, #24] + 802cef0: 099b lsrs r3, r3, #6 + 802cef2: f003 0301 and.w r3, r3, #1 + 802cef6: 2b00 cmp r3, #0 + 802cef8: d01a beq.n 802cf30 { if (FDCAN_CHECK_FLAG(itflagTTIR, FDCAN_TT_FLAG_STOP_WATCH) != RESET) - 802ce76: 697b ldr r3, [r7, #20] - 802ce78: 099b lsrs r3, r3, #6 - 802ce7a: f003 0301 and.w r3, r3, #1 - 802ce7e: 2b00 cmp r3, #0 - 802ce80: d014 beq.n 802ceac + 802cefa: 697b ldr r3, [r7, #20] + 802cefc: 099b lsrs r3, r3, #6 + 802cefe: f003 0301 and.w r3, r3, #1 + 802cf02: 2b00 cmp r3, #0 + 802cf04: d014 beq.n 802cf30 { /* Retrieve Stop watch Time and Cycle count */ SWTime = ((hfdcan->ttcan->TTCPT & FDCAN_TTCPT_SWV) >> FDCAN_TTCPT_SWV_Pos); - 802ce82: 687b ldr r3, [r7, #4] - 802ce84: 685b ldr r3, [r3, #4] - 802ce86: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ce88: 0c1b lsrs r3, r3, #16 - 802ce8a: b29b uxth r3, r3 - 802ce8c: 613b str r3, [r7, #16] + 802cf06: 687b ldr r3, [r7, #4] + 802cf08: 685b ldr r3, [r3, #4] + 802cf0a: 6bdb ldr r3, [r3, #60] ; 0x3c + 802cf0c: 0c1b lsrs r3, r3, #16 + 802cf0e: b29b uxth r3, r3 + 802cf10: 613b str r3, [r7, #16] SWCycleCount = ((hfdcan->ttcan->TTCPT & FDCAN_TTCPT_CCV) >> FDCAN_TTCPT_CCV_Pos); - 802ce8e: 687b ldr r3, [r7, #4] - 802ce90: 685b ldr r3, [r3, #4] - 802ce92: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ce94: f003 033f and.w r3, r3, #63 ; 0x3f - 802ce98: 60fb str r3, [r7, #12] + 802cf12: 687b ldr r3, [r7, #4] + 802cf14: 685b ldr r3, [r3, #4] + 802cf16: 6bdb ldr r3, [r3, #60] ; 0x3c + 802cf18: f003 033f and.w r3, r3, #63 ; 0x3f + 802cf1c: 60fb str r3, [r7, #12] /* Clear the TT Stop Watch flag */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, FDCAN_TT_FLAG_STOP_WATCH); - 802ce9a: 687b ldr r3, [r7, #4] - 802ce9c: 685b ldr r3, [r3, #4] - 802ce9e: 2240 movs r2, #64 ; 0x40 - 802cea0: 621a str r2, [r3, #32] + 802cf1e: 687b ldr r3, [r7, #4] + 802cf20: 685b ldr r3, [r3, #4] + 802cf22: 2240 movs r2, #64 ; 0x40 + 802cf24: 621a str r2, [r3, #32] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TT_StopWatchCallback(hfdcan, SWTime, SWCycleCount); #else /* TT Stop Watch Callback */ HAL_FDCAN_TT_StopWatchCallback(hfdcan, SWTime, SWCycleCount); - 802cea2: 68fa ldr r2, [r7, #12] - 802cea4: 6939 ldr r1, [r7, #16] - 802cea6: 6878 ldr r0, [r7, #4] - 802cea8: f000 f8c5 bl 802d036 + 802cf26: 68fa ldr r2, [r7, #12] + 802cf28: 6939 ldr r1, [r7, #16] + 802cf2a: 6878 ldr r0, [r7, #4] + 802cf2c: f000 f8c5 bl 802d0ba #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } /* TT Global Time interrupts management ***********************************/ if (TTGlobTimeITs != 0U) - 802ceac: 6a7b ldr r3, [r7, #36] ; 0x24 - 802ceae: 2b00 cmp r3, #0 - 802ceb0: d007 beq.n 802cec2 + 802cf30: 6a7b ldr r3, [r7, #36] ; 0x24 + 802cf32: 2b00 cmp r3, #0 + 802cf34: d007 beq.n 802cf46 { /* Clear the TT Global Time flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTGlobTimeITs); - 802ceb2: 687b ldr r3, [r7, #4] - 802ceb4: 685b ldr r3, [r3, #4] - 802ceb6: 6a7a ldr r2, [r7, #36] ; 0x24 - 802ceb8: 621a str r2, [r3, #32] + 802cf36: 687b ldr r3, [r7, #4] + 802cf38: 685b ldr r3, [r3, #4] + 802cf3a: 6a7a ldr r2, [r7, #36] ; 0x24 + 802cf3c: 621a str r2, [r3, #32] #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->TT_GlobalTimeCallback(hfdcan, TTGlobTimeITs); #else /* TT Global Time Callback */ HAL_FDCAN_TT_GlobalTimeCallback(hfdcan, TTGlobTimeITs); - 802ceba: 6a79 ldr r1, [r7, #36] ; 0x24 - 802cebc: 6878 ldr r0, [r7, #4] - 802cebe: f000 f8c6 bl 802d04e + 802cf3e: 6a79 ldr r1, [r7, #36] ; 0x24 + 802cf40: 6878 ldr r0, [r7, #4] + 802cf42: f000 f8c6 bl 802d0d2 #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } /* TT Disturbing Error interrupts management ******************************/ if (TTDistErrors != 0U) - 802cec2: 6a3b ldr r3, [r7, #32] - 802cec4: 2b00 cmp r3, #0 - 802cec6: d00b beq.n 802cee0 + 802cf46: 6a3b ldr r3, [r7, #32] + 802cf48: 2b00 cmp r3, #0 + 802cf4a: d00b beq.n 802cf64 { /* Clear the TT Disturbing Error flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTDistErrors); - 802cec8: 687b ldr r3, [r7, #4] - 802ceca: 685b ldr r3, [r3, #4] - 802cecc: 6a3a ldr r2, [r7, #32] - 802cece: 621a str r2, [r3, #32] + 802cf4c: 687b ldr r3, [r7, #4] + 802cf4e: 685b ldr r3, [r3, #4] + 802cf50: 6a3a ldr r2, [r7, #32] + 802cf52: 621a str r2, [r3, #32] /* Update error code */ hfdcan->ErrorCode |= TTDistErrors; - 802ced0: 687b ldr r3, [r7, #4] - 802ced2: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c - 802ced6: 6a3b ldr r3, [r7, #32] - 802ced8: 431a orrs r2, r3 - 802ceda: 687b ldr r3, [r7, #4] - 802cedc: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802cf54: 687b ldr r3, [r7, #4] + 802cf56: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c + 802cf5a: 6a3b ldr r3, [r7, #32] + 802cf5c: 431a orrs r2, r3 + 802cf5e: 687b ldr r3, [r7, #4] + 802cf60: f8c3 209c str.w r2, [r3, #156] ; 0x9c } /* TT Fatal Error interrupts management ***********************************/ if (TTFatalErrors != 0U) - 802cee0: 69fb ldr r3, [r7, #28] - 802cee2: 2b00 cmp r3, #0 - 802cee4: d00b beq.n 802cefe + 802cf64: 69fb ldr r3, [r7, #28] + 802cf66: 2b00 cmp r3, #0 + 802cf68: d00b beq.n 802cf82 { /* Clear the TT Fatal Error flags */ __HAL_FDCAN_TT_CLEAR_FLAG(hfdcan, TTFatalErrors); - 802cee6: 687b ldr r3, [r7, #4] - 802cee8: 685b ldr r3, [r3, #4] - 802ceea: 69fa ldr r2, [r7, #28] - 802ceec: 621a str r2, [r3, #32] + 802cf6a: 687b ldr r3, [r7, #4] + 802cf6c: 685b ldr r3, [r3, #4] + 802cf6e: 69fa ldr r2, [r7, #28] + 802cf70: 621a str r2, [r3, #32] /* Update error code */ hfdcan->ErrorCode |= TTFatalErrors; - 802ceee: 687b ldr r3, [r7, #4] - 802cef0: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c - 802cef4: 69fb ldr r3, [r7, #28] - 802cef6: 431a orrs r2, r3 - 802cef8: 687b ldr r3, [r7, #4] - 802cefa: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802cf72: 687b ldr r3, [r7, #4] + 802cf74: f8d3 209c ldr.w r2, [r3, #156] ; 0x9c + 802cf78: 69fb ldr r3, [r7, #28] + 802cf7a: 431a orrs r2, r3 + 802cf7c: 687b ldr r3, [r7, #4] + 802cf7e: f8c3 209c str.w r2, [r3, #156] ; 0x9c } } } if (hfdcan->ErrorCode != HAL_FDCAN_ERROR_NONE) - 802cefe: 687b ldr r3, [r7, #4] - 802cf00: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802cf04: 2b00 cmp r3, #0 - 802cf06: d002 beq.n 802cf0e + 802cf82: 687b ldr r3, [r7, #4] + 802cf84: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802cf88: 2b00 cmp r3, #0 + 802cf8a: d002 beq.n 802cf92 #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 /* Call registered callback*/ hfdcan->ErrorCallback(hfdcan); #else /* Error Callback */ HAL_FDCAN_ErrorCallback(hfdcan); - 802cf08: 6878 ldr r0, [r7, #4] - 802cf0a: f000 f874 bl 802cff6 + 802cf8c: 6878 ldr r0, [r7, #4] + 802cf8e: f000 f874 bl 802d07a #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ } } - 802cf0e: bf00 nop - 802cf10: 3758 adds r7, #88 ; 0x58 - 802cf12: 46bd mov sp, r7 - 802cf14: bd80 pop {r7, pc} - 802cf16: bf00 nop - 802cf18: 4000a800 .word 0x4000a800 - 802cf1c: 3fcfffff .word 0x3fcfffff - 802cf20: 4000a000 .word 0x4000a000 + 802cf92: bf00 nop + 802cf94: 3758 adds r7, #88 ; 0x58 + 802cf96: 46bd mov sp, r7 + 802cf98: bd80 pop {r7, pc} + 802cf9a: bf00 nop + 802cf9c: 4000a800 .word 0x4000a800 + 802cfa0: 3fcfffff .word 0x3fcfffff + 802cfa4: 4000a000 .word 0x4000a000 -0802cf24 : +0802cfa8 : * @param ClkCalibrationITs indicates which Clock Calibration interrupts are signaled. * This parameter can be any combination of @arg FDCAN_Clock_Calibration_Interrupts. * @retval None */ __weak void HAL_FDCAN_ClockCalibrationCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t ClkCalibrationITs) { - 802cf24: b480 push {r7} - 802cf26: b083 sub sp, #12 - 802cf28: af00 add r7, sp, #0 - 802cf2a: 6078 str r0, [r7, #4] - 802cf2c: 6039 str r1, [r7, #0] + 802cfa8: b480 push {r7} + 802cfaa: b083 sub sp, #12 + 802cfac: af00 add r7, sp, #0 + 802cfae: 6078 str r0, [r7, #4] + 802cfb0: 6039 str r1, [r7, #0] UNUSED(ClkCalibrationITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_ClockCalibrationCallback could be implemented in the user file */ } - 802cf2e: bf00 nop - 802cf30: 370c adds r7, #12 - 802cf32: 46bd mov sp, r7 - 802cf34: f85d 7b04 ldr.w r7, [sp], #4 - 802cf38: 4770 bx lr + 802cfb2: bf00 nop + 802cfb4: 370c adds r7, #12 + 802cfb6: 46bd mov sp, r7 + 802cfb8: f85d 7b04 ldr.w r7, [sp], #4 + 802cfbc: 4770 bx lr -0802cf3a : +0802cfbe : * @param TxEventFifoITs indicates which Tx Event FIFO interrupts are signaled. * This parameter can be any combination of @arg FDCAN_Tx_Event_Fifo_Interrupts. * @retval None */ __weak void HAL_FDCAN_TxEventFifoCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TxEventFifoITs) { - 802cf3a: b480 push {r7} - 802cf3c: b083 sub sp, #12 - 802cf3e: af00 add r7, sp, #0 - 802cf40: 6078 str r0, [r7, #4] - 802cf42: 6039 str r1, [r7, #0] + 802cfbe: b480 push {r7} + 802cfc0: b083 sub sp, #12 + 802cfc2: af00 add r7, sp, #0 + 802cfc4: 6078 str r0, [r7, #4] + 802cfc6: 6039 str r1, [r7, #0] UNUSED(TxEventFifoITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TxEventFifoCallback could be implemented in the user file */ } - 802cf44: bf00 nop - 802cf46: 370c adds r7, #12 - 802cf48: 46bd mov sp, r7 - 802cf4a: f85d 7b04 ldr.w r7, [sp], #4 - 802cf4e: 4770 bx lr + 802cfc8: bf00 nop + 802cfca: 370c adds r7, #12 + 802cfcc: 46bd mov sp, r7 + 802cfce: f85d 7b04 ldr.w r7, [sp], #4 + 802cfd2: 4770 bx lr -0802cf50 : +0802cfd4 : * @param RxFifo1ITs indicates which Rx FIFO 1 interrupts are signaled. * This parameter can be any combination of @arg FDCAN_Rx_Fifo1_Interrupts. * @retval None */ __weak void HAL_FDCAN_RxFifo1Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs) { - 802cf50: b480 push {r7} - 802cf52: b083 sub sp, #12 - 802cf54: af00 add r7, sp, #0 - 802cf56: 6078 str r0, [r7, #4] - 802cf58: 6039 str r1, [r7, #0] + 802cfd4: b480 push {r7} + 802cfd6: b083 sub sp, #12 + 802cfd8: af00 add r7, sp, #0 + 802cfda: 6078 str r0, [r7, #4] + 802cfdc: 6039 str r1, [r7, #0] UNUSED(RxFifo1ITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_RxFifo1Callback could be implemented in the user file */ } - 802cf5a: bf00 nop - 802cf5c: 370c adds r7, #12 - 802cf5e: 46bd mov sp, r7 - 802cf60: f85d 7b04 ldr.w r7, [sp], #4 - 802cf64: 4770 bx lr + 802cfde: bf00 nop + 802cfe0: 370c adds r7, #12 + 802cfe2: 46bd mov sp, r7 + 802cfe4: f85d 7b04 ldr.w r7, [sp], #4 + 802cfe8: 4770 bx lr -0802cf66 : +0802cfea : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_TxFifoEmptyCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cf66: b480 push {r7} - 802cf68: b083 sub sp, #12 - 802cf6a: af00 add r7, sp, #0 - 802cf6c: 6078 str r0, [r7, #4] + 802cfea: b480 push {r7} + 802cfec: b083 sub sp, #12 + 802cfee: af00 add r7, sp, #0 + 802cff0: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TxFifoEmptyCallback could be implemented in the user file */ } - 802cf6e: bf00 nop - 802cf70: 370c adds r7, #12 - 802cf72: 46bd mov sp, r7 - 802cf74: f85d 7b04 ldr.w r7, [sp], #4 - 802cf78: 4770 bx lr + 802cff2: bf00 nop + 802cff4: 370c adds r7, #12 + 802cff6: 46bd mov sp, r7 + 802cff8: f85d 7b04 ldr.w r7, [sp], #4 + 802cffc: 4770 bx lr -0802cf7a : +0802cffe : * @param BufferIndexes Indexes of the transmitted buffers. * This parameter can be any combination of @arg FDCAN_Tx_location. * @retval None */ __weak void HAL_FDCAN_TxBufferCompleteCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes) { - 802cf7a: b480 push {r7} - 802cf7c: b083 sub sp, #12 - 802cf7e: af00 add r7, sp, #0 - 802cf80: 6078 str r0, [r7, #4] - 802cf82: 6039 str r1, [r7, #0] + 802cffe: b480 push {r7} + 802d000: b083 sub sp, #12 + 802d002: af00 add r7, sp, #0 + 802d004: 6078 str r0, [r7, #4] + 802d006: 6039 str r1, [r7, #0] UNUSED(BufferIndexes); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TxBufferCompleteCallback could be implemented in the user file */ } - 802cf84: bf00 nop - 802cf86: 370c adds r7, #12 - 802cf88: 46bd mov sp, r7 - 802cf8a: f85d 7b04 ldr.w r7, [sp], #4 - 802cf8e: 4770 bx lr + 802d008: bf00 nop + 802d00a: 370c adds r7, #12 + 802d00c: 46bd mov sp, r7 + 802d00e: f85d 7b04 ldr.w r7, [sp], #4 + 802d012: 4770 bx lr -0802cf90 : +0802d014 : * @param BufferIndexes Indexes of the aborted buffers. * This parameter can be any combination of @arg FDCAN_Tx_location. * @retval None */ __weak void HAL_FDCAN_TxBufferAbortCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes) { - 802cf90: b480 push {r7} - 802cf92: b083 sub sp, #12 - 802cf94: af00 add r7, sp, #0 - 802cf96: 6078 str r0, [r7, #4] - 802cf98: 6039 str r1, [r7, #0] + 802d014: b480 push {r7} + 802d016: b083 sub sp, #12 + 802d018: af00 add r7, sp, #0 + 802d01a: 6078 str r0, [r7, #4] + 802d01c: 6039 str r1, [r7, #0] UNUSED(BufferIndexes); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TxBufferAbortCallback could be implemented in the user file */ } - 802cf9a: bf00 nop - 802cf9c: 370c adds r7, #12 - 802cf9e: 46bd mov sp, r7 - 802cfa0: f85d 7b04 ldr.w r7, [sp], #4 - 802cfa4: 4770 bx lr + 802d01e: bf00 nop + 802d020: 370c adds r7, #12 + 802d022: 46bd mov sp, r7 + 802d024: f85d 7b04 ldr.w r7, [sp], #4 + 802d028: 4770 bx lr -0802cfa6 : +0802d02a : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_RxBufferNewMessageCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cfa6: b480 push {r7} - 802cfa8: b083 sub sp, #12 - 802cfaa: af00 add r7, sp, #0 - 802cfac: 6078 str r0, [r7, #4] + 802d02a: b480 push {r7} + 802d02c: b083 sub sp, #12 + 802d02e: af00 add r7, sp, #0 + 802d030: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_RxBufferNewMessageCallback could be implemented in the user file */ } - 802cfae: bf00 nop - 802cfb0: 370c adds r7, #12 - 802cfb2: 46bd mov sp, r7 - 802cfb4: f85d 7b04 ldr.w r7, [sp], #4 - 802cfb8: 4770 bx lr + 802d032: bf00 nop + 802d034: 370c adds r7, #12 + 802d036: 46bd mov sp, r7 + 802d038: f85d 7b04 ldr.w r7, [sp], #4 + 802d03c: 4770 bx lr -0802cfba : +0802d03e : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_TimestampWraparoundCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cfba: b480 push {r7} - 802cfbc: b083 sub sp, #12 - 802cfbe: af00 add r7, sp, #0 - 802cfc0: 6078 str r0, [r7, #4] + 802d03e: b480 push {r7} + 802d040: b083 sub sp, #12 + 802d042: af00 add r7, sp, #0 + 802d044: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TimestampWraparoundCallback could be implemented in the user file */ } - 802cfc2: bf00 nop - 802cfc4: 370c adds r7, #12 - 802cfc6: 46bd mov sp, r7 - 802cfc8: f85d 7b04 ldr.w r7, [sp], #4 - 802cfcc: 4770 bx lr + 802d046: bf00 nop + 802d048: 370c adds r7, #12 + 802d04a: 46bd mov sp, r7 + 802d04c: f85d 7b04 ldr.w r7, [sp], #4 + 802d050: 4770 bx lr -0802cfce : +0802d052 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_TimeoutOccurredCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cfce: b480 push {r7} - 802cfd0: b083 sub sp, #12 - 802cfd2: af00 add r7, sp, #0 - 802cfd4: 6078 str r0, [r7, #4] + 802d052: b480 push {r7} + 802d054: b083 sub sp, #12 + 802d056: af00 add r7, sp, #0 + 802d058: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TimeoutOccurredCallback could be implemented in the user file */ } - 802cfd6: bf00 nop - 802cfd8: 370c adds r7, #12 - 802cfda: 46bd mov sp, r7 - 802cfdc: f85d 7b04 ldr.w r7, [sp], #4 - 802cfe0: 4770 bx lr + 802d05a: bf00 nop + 802d05c: 370c adds r7, #12 + 802d05e: 46bd mov sp, r7 + 802d060: f85d 7b04 ldr.w r7, [sp], #4 + 802d064: 4770 bx lr -0802cfe2 : +0802d066 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_HighPriorityMessageCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cfe2: b480 push {r7} - 802cfe4: b083 sub sp, #12 - 802cfe6: af00 add r7, sp, #0 - 802cfe8: 6078 str r0, [r7, #4] + 802d066: b480 push {r7} + 802d068: b083 sub sp, #12 + 802d06a: af00 add r7, sp, #0 + 802d06c: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_HighPriorityMessageCallback could be implemented in the user file */ } - 802cfea: bf00 nop - 802cfec: 370c adds r7, #12 - 802cfee: 46bd mov sp, r7 - 802cff0: f85d 7b04 ldr.w r7, [sp], #4 - 802cff4: 4770 bx lr + 802d06e: bf00 nop + 802d070: 370c adds r7, #12 + 802d072: 46bd mov sp, r7 + 802d074: f85d 7b04 ldr.w r7, [sp], #4 + 802d078: 4770 bx lr -0802cff6 : +0802d07a : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval None */ __weak void HAL_FDCAN_ErrorCallback(FDCAN_HandleTypeDef *hfdcan) { - 802cff6: b480 push {r7} - 802cff8: b083 sub sp, #12 - 802cffa: af00 add r7, sp, #0 - 802cffc: 6078 str r0, [r7, #4] + 802d07a: b480 push {r7} + 802d07c: b083 sub sp, #12 + 802d07e: af00 add r7, sp, #0 + 802d080: 6078 str r0, [r7, #4] UNUSED(hfdcan); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_ErrorCallback could be implemented in the user file */ } - 802cffe: bf00 nop - 802d000: 370c adds r7, #12 - 802d002: 46bd mov sp, r7 - 802d004: f85d 7b04 ldr.w r7, [sp], #4 - 802d008: 4770 bx lr + 802d082: bf00 nop + 802d084: 370c adds r7, #12 + 802d086: 46bd mov sp, r7 + 802d088: f85d 7b04 ldr.w r7, [sp], #4 + 802d08c: 4770 bx lr -0802d00a : +0802d08e : * @param TTSchedSyncITs indicates which TT Schedule Synchronization interrupts are signaled. * This parameter can be any combination of @arg FDCAN_TTScheduleSynchronization_Interrupts. * @retval None */ __weak void HAL_FDCAN_TT_ScheduleSyncCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTSchedSyncITs) { - 802d00a: b480 push {r7} - 802d00c: b083 sub sp, #12 - 802d00e: af00 add r7, sp, #0 - 802d010: 6078 str r0, [r7, #4] - 802d012: 6039 str r1, [r7, #0] + 802d08e: b480 push {r7} + 802d090: b083 sub sp, #12 + 802d092: af00 add r7, sp, #0 + 802d094: 6078 str r0, [r7, #4] + 802d096: 6039 str r1, [r7, #0] UNUSED(TTSchedSyncITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TT_ScheduleSyncCallback could be implemented in the user file */ } - 802d014: bf00 nop - 802d016: 370c adds r7, #12 - 802d018: 46bd mov sp, r7 - 802d01a: f85d 7b04 ldr.w r7, [sp], #4 - 802d01e: 4770 bx lr + 802d098: bf00 nop + 802d09a: 370c adds r7, #12 + 802d09c: 46bd mov sp, r7 + 802d09e: f85d 7b04 ldr.w r7, [sp], #4 + 802d0a2: 4770 bx lr -0802d020 : +0802d0a4 : * @param TTTimeMarkITs indicates which TT Schedule Synchronization interrupts are signaled. * This parameter can be any combination of @arg FDCAN_TTTimeMark_Interrupts. * @retval None */ __weak void HAL_FDCAN_TT_TimeMarkCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTTimeMarkITs) { - 802d020: b480 push {r7} - 802d022: b083 sub sp, #12 - 802d024: af00 add r7, sp, #0 - 802d026: 6078 str r0, [r7, #4] - 802d028: 6039 str r1, [r7, #0] + 802d0a4: b480 push {r7} + 802d0a6: b083 sub sp, #12 + 802d0a8: af00 add r7, sp, #0 + 802d0aa: 6078 str r0, [r7, #4] + 802d0ac: 6039 str r1, [r7, #0] UNUSED(TTTimeMarkITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TT_TimeMarkCallback could be implemented in the user file */ } - 802d02a: bf00 nop - 802d02c: 370c adds r7, #12 - 802d02e: 46bd mov sp, r7 - 802d030: f85d 7b04 ldr.w r7, [sp], #4 - 802d034: 4770 bx lr + 802d0ae: bf00 nop + 802d0b0: 370c adds r7, #12 + 802d0b2: 46bd mov sp, r7 + 802d0b4: f85d 7b04 ldr.w r7, [sp], #4 + 802d0b8: 4770 bx lr -0802d036 : +0802d0ba : * @param SWCycleCount Cycle count value captured together with SWTime. * This parameter is a number between 0 and 0x3F. * @retval None */ __weak void HAL_FDCAN_TT_StopWatchCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t SWTime, uint32_t SWCycleCount) { - 802d036: b480 push {r7} - 802d038: b085 sub sp, #20 - 802d03a: af00 add r7, sp, #0 - 802d03c: 60f8 str r0, [r7, #12] - 802d03e: 60b9 str r1, [r7, #8] - 802d040: 607a str r2, [r7, #4] + 802d0ba: b480 push {r7} + 802d0bc: b085 sub sp, #20 + 802d0be: af00 add r7, sp, #0 + 802d0c0: 60f8 str r0, [r7, #12] + 802d0c2: 60b9 str r1, [r7, #8] + 802d0c4: 607a str r2, [r7, #4] UNUSED(SWCycleCount); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TT_StopWatchCallback could be implemented in the user file */ } - 802d042: bf00 nop - 802d044: 3714 adds r7, #20 - 802d046: 46bd mov sp, r7 - 802d048: f85d 7b04 ldr.w r7, [sp], #4 - 802d04c: 4770 bx lr + 802d0c6: bf00 nop + 802d0c8: 3714 adds r7, #20 + 802d0ca: 46bd mov sp, r7 + 802d0cc: f85d 7b04 ldr.w r7, [sp], #4 + 802d0d0: 4770 bx lr -0802d04e : +0802d0d2 : * @param TTGlobTimeITs indicates which TT Global Time interrupts are signaled. * This parameter can be any combination of @arg FDCAN_TTGlobalTime_Interrupts. * @retval None */ __weak void HAL_FDCAN_TT_GlobalTimeCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTGlobTimeITs) { - 802d04e: b480 push {r7} - 802d050: b083 sub sp, #12 - 802d052: af00 add r7, sp, #0 - 802d054: 6078 str r0, [r7, #4] - 802d056: 6039 str r1, [r7, #0] + 802d0d2: b480 push {r7} + 802d0d4: b083 sub sp, #12 + 802d0d6: af00 add r7, sp, #0 + 802d0d8: 6078 str r0, [r7, #4] + 802d0da: 6039 str r1, [r7, #0] UNUSED(TTGlobTimeITs); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_FDCAN_TT_GlobalTimeCallback could be implemented in the user file */ } - 802d058: bf00 nop - 802d05a: 370c adds r7, #12 - 802d05c: 46bd mov sp, r7 - 802d05e: f85d 7b04 ldr.w r7, [sp], #4 - 802d062: 4770 bx lr + 802d0dc: bf00 nop + 802d0de: 370c adds r7, #12 + 802d0e0: 46bd mov sp, r7 + 802d0e2: f85d 7b04 ldr.w r7, [sp], #4 + 802d0e6: 4770 bx lr -0802d064 : +0802d0e8 : * @param hfdcan pointer to an FDCAN_HandleTypeDef structure that contains * the configuration information for the specified FDCAN. * @retval HAL status */ static HAL_StatusTypeDef FDCAN_CalcultateRamBlockAddresses(FDCAN_HandleTypeDef *hfdcan) { - 802d064: b480 push {r7} - 802d066: b085 sub sp, #20 - 802d068: af00 add r7, sp, #0 - 802d06a: 6078 str r0, [r7, #4] + 802d0e8: b480 push {r7} + 802d0ea: b085 sub sp, #20 + 802d0ec: af00 add r7, sp, #0 + 802d0ee: 6078 str r0, [r7, #4] uint32_t RAMcounter; uint32_t StartAddress; StartAddress = hfdcan->Init.MessageRAMOffset; - 802d06c: 687b ldr r3, [r7, #4] - 802d06e: 6b5b ldr r3, [r3, #52] ; 0x34 - 802d070: 60bb str r3, [r7, #8] + 802d0f0: 687b ldr r3, [r7, #4] + 802d0f2: 6b5b ldr r3, [r3, #52] ; 0x34 + 802d0f4: 60bb str r3, [r7, #8] /* Standard filter list start address */ MODIFY_REG(hfdcan->Instance->SIDFC, FDCAN_SIDFC_FLSSA, (StartAddress << FDCAN_SIDFC_FLSSA_Pos)); - 802d072: 687b ldr r3, [r7, #4] - 802d074: 681b ldr r3, [r3, #0] - 802d076: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 - 802d07a: 4ba7 ldr r3, [pc, #668] ; (802d318 ) - 802d07c: 4013 ands r3, r2 - 802d07e: 68ba ldr r2, [r7, #8] - 802d080: 0091 lsls r1, r2, #2 - 802d082: 687a ldr r2, [r7, #4] - 802d084: 6812 ldr r2, [r2, #0] - 802d086: 430b orrs r3, r1 - 802d088: f8c2 3084 str.w r3, [r2, #132] ; 0x84 + 802d0f6: 687b ldr r3, [r7, #4] + 802d0f8: 681b ldr r3, [r3, #0] + 802d0fa: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 + 802d0fe: 4ba7 ldr r3, [pc, #668] ; (802d39c ) + 802d100: 4013 ands r3, r2 + 802d102: 68ba ldr r2, [r7, #8] + 802d104: 0091 lsls r1, r2, #2 + 802d106: 687a ldr r2, [r7, #4] + 802d108: 6812 ldr r2, [r2, #0] + 802d10a: 430b orrs r3, r1 + 802d10c: f8c2 3084 str.w r3, [r2, #132] ; 0x84 /* Standard filter elements number */ MODIFY_REG(hfdcan->Instance->SIDFC, FDCAN_SIDFC_LSS, (hfdcan->Init.StdFiltersNbr << FDCAN_SIDFC_LSS_Pos)); - 802d08c: 687b ldr r3, [r7, #4] - 802d08e: 681b ldr r3, [r3, #0] - 802d090: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 802d094: f423 017f bic.w r1, r3, #16711680 ; 0xff0000 - 802d098: 687b ldr r3, [r7, #4] - 802d09a: 6b9b ldr r3, [r3, #56] ; 0x38 - 802d09c: 041a lsls r2, r3, #16 - 802d09e: 687b ldr r3, [r7, #4] - 802d0a0: 681b ldr r3, [r3, #0] - 802d0a2: 430a orrs r2, r1 - 802d0a4: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802d110: 687b ldr r3, [r7, #4] + 802d112: 681b ldr r3, [r3, #0] + 802d114: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 802d118: f423 017f bic.w r1, r3, #16711680 ; 0xff0000 + 802d11c: 687b ldr r3, [r7, #4] + 802d11e: 6b9b ldr r3, [r3, #56] ; 0x38 + 802d120: 041a lsls r2, r3, #16 + 802d122: 687b ldr r3, [r7, #4] + 802d124: 681b ldr r3, [r3, #0] + 802d126: 430a orrs r2, r1 + 802d128: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Extended filter list start address */ StartAddress += hfdcan->Init.StdFiltersNbr; - 802d0a8: 687b ldr r3, [r7, #4] - 802d0aa: 6b9b ldr r3, [r3, #56] ; 0x38 - 802d0ac: 68ba ldr r2, [r7, #8] - 802d0ae: 4413 add r3, r2 - 802d0b0: 60bb str r3, [r7, #8] + 802d12c: 687b ldr r3, [r7, #4] + 802d12e: 6b9b ldr r3, [r3, #56] ; 0x38 + 802d130: 68ba ldr r2, [r7, #8] + 802d132: 4413 add r3, r2 + 802d134: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->XIDFC, FDCAN_XIDFC_FLESA, (StartAddress << FDCAN_XIDFC_FLESA_Pos)); - 802d0b2: 687b ldr r3, [r7, #4] - 802d0b4: 681b ldr r3, [r3, #0] - 802d0b6: f8d3 2088 ldr.w r2, [r3, #136] ; 0x88 - 802d0ba: 4b97 ldr r3, [pc, #604] ; (802d318 ) - 802d0bc: 4013 ands r3, r2 - 802d0be: 68ba ldr r2, [r7, #8] - 802d0c0: 0091 lsls r1, r2, #2 - 802d0c2: 687a ldr r2, [r7, #4] - 802d0c4: 6812 ldr r2, [r2, #0] - 802d0c6: 430b orrs r3, r1 - 802d0c8: f8c2 3088 str.w r3, [r2, #136] ; 0x88 + 802d136: 687b ldr r3, [r7, #4] + 802d138: 681b ldr r3, [r3, #0] + 802d13a: f8d3 2088 ldr.w r2, [r3, #136] ; 0x88 + 802d13e: 4b97 ldr r3, [pc, #604] ; (802d39c ) + 802d140: 4013 ands r3, r2 + 802d142: 68ba ldr r2, [r7, #8] + 802d144: 0091 lsls r1, r2, #2 + 802d146: 687a ldr r2, [r7, #4] + 802d148: 6812 ldr r2, [r2, #0] + 802d14a: 430b orrs r3, r1 + 802d14c: f8c2 3088 str.w r3, [r2, #136] ; 0x88 /* Extended filter elements number */ MODIFY_REG(hfdcan->Instance->XIDFC, FDCAN_XIDFC_LSE, (hfdcan->Init.ExtFiltersNbr << FDCAN_XIDFC_LSE_Pos)); - 802d0cc: 687b ldr r3, [r7, #4] - 802d0ce: 681b ldr r3, [r3, #0] - 802d0d0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 802d0d4: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 - 802d0d8: 687b ldr r3, [r7, #4] - 802d0da: 6bdb ldr r3, [r3, #60] ; 0x3c - 802d0dc: 041a lsls r2, r3, #16 - 802d0de: 687b ldr r3, [r7, #4] - 802d0e0: 681b ldr r3, [r3, #0] - 802d0e2: 430a orrs r2, r1 - 802d0e4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802d150: 687b ldr r3, [r7, #4] + 802d152: 681b ldr r3, [r3, #0] + 802d154: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 802d158: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 + 802d15c: 687b ldr r3, [r7, #4] + 802d15e: 6bdb ldr r3, [r3, #60] ; 0x3c + 802d160: 041a lsls r2, r3, #16 + 802d162: 687b ldr r3, [r7, #4] + 802d164: 681b ldr r3, [r3, #0] + 802d166: 430a orrs r2, r1 + 802d168: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Rx FIFO 0 start address */ StartAddress += (hfdcan->Init.ExtFiltersNbr * 2U); - 802d0e8: 687b ldr r3, [r7, #4] - 802d0ea: 6bdb ldr r3, [r3, #60] ; 0x3c - 802d0ec: 005b lsls r3, r3, #1 - 802d0ee: 68ba ldr r2, [r7, #8] - 802d0f0: 4413 add r3, r2 - 802d0f2: 60bb str r3, [r7, #8] + 802d16c: 687b ldr r3, [r7, #4] + 802d16e: 6bdb ldr r3, [r3, #60] ; 0x3c + 802d170: 005b lsls r3, r3, #1 + 802d172: 68ba ldr r2, [r7, #8] + 802d174: 4413 add r3, r2 + 802d176: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->RXF0C, FDCAN_RXF0C_F0SA, (StartAddress << FDCAN_RXF0C_F0SA_Pos)); - 802d0f4: 687b ldr r3, [r7, #4] - 802d0f6: 681b ldr r3, [r3, #0] - 802d0f8: f8d3 20a0 ldr.w r2, [r3, #160] ; 0xa0 - 802d0fc: 4b86 ldr r3, [pc, #536] ; (802d318 ) - 802d0fe: 4013 ands r3, r2 - 802d100: 68ba ldr r2, [r7, #8] - 802d102: 0091 lsls r1, r2, #2 - 802d104: 687a ldr r2, [r7, #4] - 802d106: 6812 ldr r2, [r2, #0] - 802d108: 430b orrs r3, r1 - 802d10a: f8c2 30a0 str.w r3, [r2, #160] ; 0xa0 + 802d178: 687b ldr r3, [r7, #4] + 802d17a: 681b ldr r3, [r3, #0] + 802d17c: f8d3 20a0 ldr.w r2, [r3, #160] ; 0xa0 + 802d180: 4b86 ldr r3, [pc, #536] ; (802d39c ) + 802d182: 4013 ands r3, r2 + 802d184: 68ba ldr r2, [r7, #8] + 802d186: 0091 lsls r1, r2, #2 + 802d188: 687a ldr r2, [r7, #4] + 802d18a: 6812 ldr r2, [r2, #0] + 802d18c: 430b orrs r3, r1 + 802d18e: f8c2 30a0 str.w r3, [r2, #160] ; 0xa0 /* Rx FIFO 0 elements number */ MODIFY_REG(hfdcan->Instance->RXF0C, FDCAN_RXF0C_F0S, (hfdcan->Init.RxFifo0ElmtsNbr << FDCAN_RXF0C_F0S_Pos)); - 802d10e: 687b ldr r3, [r7, #4] - 802d110: 681b ldr r3, [r3, #0] - 802d112: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 802d116: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 - 802d11a: 687b ldr r3, [r7, #4] - 802d11c: 6c1b ldr r3, [r3, #64] ; 0x40 - 802d11e: 041a lsls r2, r3, #16 - 802d120: 687b ldr r3, [r7, #4] - 802d122: 681b ldr r3, [r3, #0] - 802d124: 430a orrs r2, r1 - 802d126: f8c3 20a0 str.w r2, [r3, #160] ; 0xa0 + 802d192: 687b ldr r3, [r7, #4] + 802d194: 681b ldr r3, [r3, #0] + 802d196: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 802d19a: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 + 802d19e: 687b ldr r3, [r7, #4] + 802d1a0: 6c1b ldr r3, [r3, #64] ; 0x40 + 802d1a2: 041a lsls r2, r3, #16 + 802d1a4: 687b ldr r3, [r7, #4] + 802d1a6: 681b ldr r3, [r3, #0] + 802d1a8: 430a orrs r2, r1 + 802d1aa: f8c3 20a0 str.w r2, [r3, #160] ; 0xa0 /* Rx FIFO 1 start address */ StartAddress += (hfdcan->Init.RxFifo0ElmtsNbr * hfdcan->Init.RxFifo0ElmtSize); - 802d12a: 687b ldr r3, [r7, #4] - 802d12c: 6c1b ldr r3, [r3, #64] ; 0x40 - 802d12e: 687a ldr r2, [r7, #4] - 802d130: 6c52 ldr r2, [r2, #68] ; 0x44 - 802d132: fb02 f303 mul.w r3, r2, r3 - 802d136: 68ba ldr r2, [r7, #8] - 802d138: 4413 add r3, r2 - 802d13a: 60bb str r3, [r7, #8] + 802d1ae: 687b ldr r3, [r7, #4] + 802d1b0: 6c1b ldr r3, [r3, #64] ; 0x40 + 802d1b2: 687a ldr r2, [r7, #4] + 802d1b4: 6c52 ldr r2, [r2, #68] ; 0x44 + 802d1b6: fb02 f303 mul.w r3, r2, r3 + 802d1ba: 68ba ldr r2, [r7, #8] + 802d1bc: 4413 add r3, r2 + 802d1be: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->RXF1C, FDCAN_RXF1C_F1SA, (StartAddress << FDCAN_RXF1C_F1SA_Pos)); - 802d13c: 687b ldr r3, [r7, #4] - 802d13e: 681b ldr r3, [r3, #0] - 802d140: f8d3 20b0 ldr.w r2, [r3, #176] ; 0xb0 - 802d144: 4b74 ldr r3, [pc, #464] ; (802d318 ) - 802d146: 4013 ands r3, r2 - 802d148: 68ba ldr r2, [r7, #8] - 802d14a: 0091 lsls r1, r2, #2 - 802d14c: 687a ldr r2, [r7, #4] - 802d14e: 6812 ldr r2, [r2, #0] - 802d150: 430b orrs r3, r1 - 802d152: f8c2 30b0 str.w r3, [r2, #176] ; 0xb0 + 802d1c0: 687b ldr r3, [r7, #4] + 802d1c2: 681b ldr r3, [r3, #0] + 802d1c4: f8d3 20b0 ldr.w r2, [r3, #176] ; 0xb0 + 802d1c8: 4b74 ldr r3, [pc, #464] ; (802d39c ) + 802d1ca: 4013 ands r3, r2 + 802d1cc: 68ba ldr r2, [r7, #8] + 802d1ce: 0091 lsls r1, r2, #2 + 802d1d0: 687a ldr r2, [r7, #4] + 802d1d2: 6812 ldr r2, [r2, #0] + 802d1d4: 430b orrs r3, r1 + 802d1d6: f8c2 30b0 str.w r3, [r2, #176] ; 0xb0 /* Rx FIFO 1 elements number */ MODIFY_REG(hfdcan->Instance->RXF1C, FDCAN_RXF1C_F1S, (hfdcan->Init.RxFifo1ElmtsNbr << FDCAN_RXF1C_F1S_Pos)); - 802d156: 687b ldr r3, [r7, #4] - 802d158: 681b ldr r3, [r3, #0] - 802d15a: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 802d15e: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 - 802d162: 687b ldr r3, [r7, #4] - 802d164: 6c9b ldr r3, [r3, #72] ; 0x48 - 802d166: 041a lsls r2, r3, #16 - 802d168: 687b ldr r3, [r7, #4] - 802d16a: 681b ldr r3, [r3, #0] - 802d16c: 430a orrs r2, r1 - 802d16e: f8c3 20b0 str.w r2, [r3, #176] ; 0xb0 + 802d1da: 687b ldr r3, [r7, #4] + 802d1dc: 681b ldr r3, [r3, #0] + 802d1de: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 802d1e2: f423 01fe bic.w r1, r3, #8323072 ; 0x7f0000 + 802d1e6: 687b ldr r3, [r7, #4] + 802d1e8: 6c9b ldr r3, [r3, #72] ; 0x48 + 802d1ea: 041a lsls r2, r3, #16 + 802d1ec: 687b ldr r3, [r7, #4] + 802d1ee: 681b ldr r3, [r3, #0] + 802d1f0: 430a orrs r2, r1 + 802d1f2: f8c3 20b0 str.w r2, [r3, #176] ; 0xb0 /* Rx buffer list start address */ StartAddress += (hfdcan->Init.RxFifo1ElmtsNbr * hfdcan->Init.RxFifo1ElmtSize); - 802d172: 687b ldr r3, [r7, #4] - 802d174: 6c9b ldr r3, [r3, #72] ; 0x48 - 802d176: 687a ldr r2, [r7, #4] - 802d178: 6cd2 ldr r2, [r2, #76] ; 0x4c - 802d17a: fb02 f303 mul.w r3, r2, r3 - 802d17e: 68ba ldr r2, [r7, #8] - 802d180: 4413 add r3, r2 - 802d182: 60bb str r3, [r7, #8] + 802d1f6: 687b ldr r3, [r7, #4] + 802d1f8: 6c9b ldr r3, [r3, #72] ; 0x48 + 802d1fa: 687a ldr r2, [r7, #4] + 802d1fc: 6cd2 ldr r2, [r2, #76] ; 0x4c + 802d1fe: fb02 f303 mul.w r3, r2, r3 + 802d202: 68ba ldr r2, [r7, #8] + 802d204: 4413 add r3, r2 + 802d206: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->RXBC, FDCAN_RXBC_RBSA, (StartAddress << FDCAN_RXBC_RBSA_Pos)); - 802d184: 687b ldr r3, [r7, #4] - 802d186: 681b ldr r3, [r3, #0] - 802d188: f8d3 20ac ldr.w r2, [r3, #172] ; 0xac - 802d18c: 4b62 ldr r3, [pc, #392] ; (802d318 ) - 802d18e: 4013 ands r3, r2 - 802d190: 68ba ldr r2, [r7, #8] - 802d192: 0091 lsls r1, r2, #2 - 802d194: 687a ldr r2, [r7, #4] - 802d196: 6812 ldr r2, [r2, #0] - 802d198: 430b orrs r3, r1 - 802d19a: f8c2 30ac str.w r3, [r2, #172] ; 0xac + 802d208: 687b ldr r3, [r7, #4] + 802d20a: 681b ldr r3, [r3, #0] + 802d20c: f8d3 20ac ldr.w r2, [r3, #172] ; 0xac + 802d210: 4b62 ldr r3, [pc, #392] ; (802d39c ) + 802d212: 4013 ands r3, r2 + 802d214: 68ba ldr r2, [r7, #8] + 802d216: 0091 lsls r1, r2, #2 + 802d218: 687a ldr r2, [r7, #4] + 802d21a: 6812 ldr r2, [r2, #0] + 802d21c: 430b orrs r3, r1 + 802d21e: f8c2 30ac str.w r3, [r2, #172] ; 0xac /* Tx event FIFO start address */ StartAddress += (hfdcan->Init.RxBuffersNbr * hfdcan->Init.RxBufferSize); - 802d19e: 687b ldr r3, [r7, #4] - 802d1a0: 6d1b ldr r3, [r3, #80] ; 0x50 - 802d1a2: 687a ldr r2, [r7, #4] - 802d1a4: 6d52 ldr r2, [r2, #84] ; 0x54 - 802d1a6: fb02 f303 mul.w r3, r2, r3 - 802d1aa: 68ba ldr r2, [r7, #8] - 802d1ac: 4413 add r3, r2 - 802d1ae: 60bb str r3, [r7, #8] + 802d222: 687b ldr r3, [r7, #4] + 802d224: 6d1b ldr r3, [r3, #80] ; 0x50 + 802d226: 687a ldr r2, [r7, #4] + 802d228: 6d52 ldr r2, [r2, #84] ; 0x54 + 802d22a: fb02 f303 mul.w r3, r2, r3 + 802d22e: 68ba ldr r2, [r7, #8] + 802d230: 4413 add r3, r2 + 802d232: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->TXEFC, FDCAN_TXEFC_EFSA, (StartAddress << FDCAN_TXEFC_EFSA_Pos)); - 802d1b0: 687b ldr r3, [r7, #4] - 802d1b2: 681b ldr r3, [r3, #0] - 802d1b4: f8d3 20f0 ldr.w r2, [r3, #240] ; 0xf0 - 802d1b8: 4b57 ldr r3, [pc, #348] ; (802d318 ) - 802d1ba: 4013 ands r3, r2 - 802d1bc: 68ba ldr r2, [r7, #8] - 802d1be: 0091 lsls r1, r2, #2 - 802d1c0: 687a ldr r2, [r7, #4] - 802d1c2: 6812 ldr r2, [r2, #0] - 802d1c4: 430b orrs r3, r1 - 802d1c6: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 + 802d234: 687b ldr r3, [r7, #4] + 802d236: 681b ldr r3, [r3, #0] + 802d238: f8d3 20f0 ldr.w r2, [r3, #240] ; 0xf0 + 802d23c: 4b57 ldr r3, [pc, #348] ; (802d39c ) + 802d23e: 4013 ands r3, r2 + 802d240: 68ba ldr r2, [r7, #8] + 802d242: 0091 lsls r1, r2, #2 + 802d244: 687a ldr r2, [r7, #4] + 802d246: 6812 ldr r2, [r2, #0] + 802d248: 430b orrs r3, r1 + 802d24a: f8c2 30f0 str.w r3, [r2, #240] ; 0xf0 /* Tx event FIFO elements number */ MODIFY_REG(hfdcan->Instance->TXEFC, FDCAN_TXEFC_EFS, (hfdcan->Init.TxEventsNbr << FDCAN_TXEFC_EFS_Pos)); - 802d1ca: 687b ldr r3, [r7, #4] - 802d1cc: 681b ldr r3, [r3, #0] - 802d1ce: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 - 802d1d2: f423 117c bic.w r1, r3, #4128768 ; 0x3f0000 - 802d1d6: 687b ldr r3, [r7, #4] - 802d1d8: 6d9b ldr r3, [r3, #88] ; 0x58 - 802d1da: 041a lsls r2, r3, #16 - 802d1dc: 687b ldr r3, [r7, #4] - 802d1de: 681b ldr r3, [r3, #0] - 802d1e0: 430a orrs r2, r1 - 802d1e2: f8c3 20f0 str.w r2, [r3, #240] ; 0xf0 + 802d24e: 687b ldr r3, [r7, #4] + 802d250: 681b ldr r3, [r3, #0] + 802d252: f8d3 30f0 ldr.w r3, [r3, #240] ; 0xf0 + 802d256: f423 117c bic.w r1, r3, #4128768 ; 0x3f0000 + 802d25a: 687b ldr r3, [r7, #4] + 802d25c: 6d9b ldr r3, [r3, #88] ; 0x58 + 802d25e: 041a lsls r2, r3, #16 + 802d260: 687b ldr r3, [r7, #4] + 802d262: 681b ldr r3, [r3, #0] + 802d264: 430a orrs r2, r1 + 802d266: f8c3 20f0 str.w r2, [r3, #240] ; 0xf0 /* Tx buffer list start address */ StartAddress += (hfdcan->Init.TxEventsNbr * 2U); - 802d1e6: 687b ldr r3, [r7, #4] - 802d1e8: 6d9b ldr r3, [r3, #88] ; 0x58 - 802d1ea: 005b lsls r3, r3, #1 - 802d1ec: 68ba ldr r2, [r7, #8] - 802d1ee: 4413 add r3, r2 - 802d1f0: 60bb str r3, [r7, #8] + 802d26a: 687b ldr r3, [r7, #4] + 802d26c: 6d9b ldr r3, [r3, #88] ; 0x58 + 802d26e: 005b lsls r3, r3, #1 + 802d270: 68ba ldr r2, [r7, #8] + 802d272: 4413 add r3, r2 + 802d274: 60bb str r3, [r7, #8] MODIFY_REG(hfdcan->Instance->TXBC, FDCAN_TXBC_TBSA, (StartAddress << FDCAN_TXBC_TBSA_Pos)); - 802d1f2: 687b ldr r3, [r7, #4] - 802d1f4: 681b ldr r3, [r3, #0] - 802d1f6: f8d3 20c0 ldr.w r2, [r3, #192] ; 0xc0 - 802d1fa: 4b47 ldr r3, [pc, #284] ; (802d318 ) - 802d1fc: 4013 ands r3, r2 - 802d1fe: 68ba ldr r2, [r7, #8] - 802d200: 0091 lsls r1, r2, #2 - 802d202: 687a ldr r2, [r7, #4] - 802d204: 6812 ldr r2, [r2, #0] - 802d206: 430b orrs r3, r1 - 802d208: f8c2 30c0 str.w r3, [r2, #192] ; 0xc0 + 802d276: 687b ldr r3, [r7, #4] + 802d278: 681b ldr r3, [r3, #0] + 802d27a: f8d3 20c0 ldr.w r2, [r3, #192] ; 0xc0 + 802d27e: 4b47 ldr r3, [pc, #284] ; (802d39c ) + 802d280: 4013 ands r3, r2 + 802d282: 68ba ldr r2, [r7, #8] + 802d284: 0091 lsls r1, r2, #2 + 802d286: 687a ldr r2, [r7, #4] + 802d288: 6812 ldr r2, [r2, #0] + 802d28a: 430b orrs r3, r1 + 802d28c: f8c2 30c0 str.w r3, [r2, #192] ; 0xc0 /* Dedicated Tx buffers number */ MODIFY_REG(hfdcan->Instance->TXBC, FDCAN_TXBC_NDTB, (hfdcan->Init.TxBuffersNbr << FDCAN_TXBC_NDTB_Pos)); - 802d20c: 687b ldr r3, [r7, #4] - 802d20e: 681b ldr r3, [r3, #0] - 802d210: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802d214: f423 117c bic.w r1, r3, #4128768 ; 0x3f0000 - 802d218: 687b ldr r3, [r7, #4] - 802d21a: 6ddb ldr r3, [r3, #92] ; 0x5c - 802d21c: 041a lsls r2, r3, #16 - 802d21e: 687b ldr r3, [r7, #4] - 802d220: 681b ldr r3, [r3, #0] - 802d222: 430a orrs r2, r1 - 802d224: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 + 802d290: 687b ldr r3, [r7, #4] + 802d292: 681b ldr r3, [r3, #0] + 802d294: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802d298: f423 117c bic.w r1, r3, #4128768 ; 0x3f0000 + 802d29c: 687b ldr r3, [r7, #4] + 802d29e: 6ddb ldr r3, [r3, #92] ; 0x5c + 802d2a0: 041a lsls r2, r3, #16 + 802d2a2: 687b ldr r3, [r7, #4] + 802d2a4: 681b ldr r3, [r3, #0] + 802d2a6: 430a orrs r2, r1 + 802d2a8: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 /* Tx FIFO/queue elements number */ MODIFY_REG(hfdcan->Instance->TXBC, FDCAN_TXBC_TFQS, (hfdcan->Init.TxFifoQueueElmtsNbr << FDCAN_TXBC_TFQS_Pos)); - 802d228: 687b ldr r3, [r7, #4] - 802d22a: 681b ldr r3, [r3, #0] - 802d22c: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 - 802d230: f023 517c bic.w r1, r3, #1056964608 ; 0x3f000000 - 802d234: 687b ldr r3, [r7, #4] - 802d236: 6e1b ldr r3, [r3, #96] ; 0x60 - 802d238: 061a lsls r2, r3, #24 - 802d23a: 687b ldr r3, [r7, #4] - 802d23c: 681b ldr r3, [r3, #0] - 802d23e: 430a orrs r2, r1 - 802d240: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 + 802d2ac: 687b ldr r3, [r7, #4] + 802d2ae: 681b ldr r3, [r3, #0] + 802d2b0: f8d3 30c0 ldr.w r3, [r3, #192] ; 0xc0 + 802d2b4: f023 517c bic.w r1, r3, #1056964608 ; 0x3f000000 + 802d2b8: 687b ldr r3, [r7, #4] + 802d2ba: 6e1b ldr r3, [r3, #96] ; 0x60 + 802d2bc: 061a lsls r2, r3, #24 + 802d2be: 687b ldr r3, [r7, #4] + 802d2c0: 681b ldr r3, [r3, #0] + 802d2c2: 430a orrs r2, r1 + 802d2c4: f8c3 20c0 str.w r2, [r3, #192] ; 0xc0 hfdcan->msgRam.StandardFilterSA = SRAMCAN_BASE + (hfdcan->Init.MessageRAMOffset * 4U); - 802d244: 687b ldr r3, [r7, #4] - 802d246: 6b5a ldr r2, [r3, #52] ; 0x34 - 802d248: 4b34 ldr r3, [pc, #208] ; (802d31c ) - 802d24a: 4413 add r3, r2 - 802d24c: 009a lsls r2, r3, #2 - 802d24e: 687b ldr r3, [r7, #4] - 802d250: 66da str r2, [r3, #108] ; 0x6c + 802d2c8: 687b ldr r3, [r7, #4] + 802d2ca: 6b5a ldr r2, [r3, #52] ; 0x34 + 802d2cc: 4b34 ldr r3, [pc, #208] ; (802d3a0 ) + 802d2ce: 4413 add r3, r2 + 802d2d0: 009a lsls r2, r3, #2 + 802d2d2: 687b ldr r3, [r7, #4] + 802d2d4: 66da str r2, [r3, #108] ; 0x6c hfdcan->msgRam.ExtendedFilterSA = hfdcan->msgRam.StandardFilterSA + (hfdcan->Init.StdFiltersNbr * 4U); - 802d252: 687b ldr r3, [r7, #4] - 802d254: 6eda ldr r2, [r3, #108] ; 0x6c - 802d256: 687b ldr r3, [r7, #4] - 802d258: 6b9b ldr r3, [r3, #56] ; 0x38 - 802d25a: 009b lsls r3, r3, #2 - 802d25c: 441a add r2, r3 - 802d25e: 687b ldr r3, [r7, #4] - 802d260: 671a str r2, [r3, #112] ; 0x70 + 802d2d6: 687b ldr r3, [r7, #4] + 802d2d8: 6eda ldr r2, [r3, #108] ; 0x6c + 802d2da: 687b ldr r3, [r7, #4] + 802d2dc: 6b9b ldr r3, [r3, #56] ; 0x38 + 802d2de: 009b lsls r3, r3, #2 + 802d2e0: 441a add r2, r3 + 802d2e2: 687b ldr r3, [r7, #4] + 802d2e4: 671a str r2, [r3, #112] ; 0x70 hfdcan->msgRam.RxFIFO0SA = hfdcan->msgRam.ExtendedFilterSA + (hfdcan->Init.ExtFiltersNbr * 2U * 4U); - 802d262: 687b ldr r3, [r7, #4] - 802d264: 6f1a ldr r2, [r3, #112] ; 0x70 - 802d266: 687b ldr r3, [r7, #4] - 802d268: 6bdb ldr r3, [r3, #60] ; 0x3c - 802d26a: 00db lsls r3, r3, #3 - 802d26c: 441a add r2, r3 - 802d26e: 687b ldr r3, [r7, #4] - 802d270: 675a str r2, [r3, #116] ; 0x74 + 802d2e6: 687b ldr r3, [r7, #4] + 802d2e8: 6f1a ldr r2, [r3, #112] ; 0x70 + 802d2ea: 687b ldr r3, [r7, #4] + 802d2ec: 6bdb ldr r3, [r3, #60] ; 0x3c + 802d2ee: 00db lsls r3, r3, #3 + 802d2f0: 441a add r2, r3 + 802d2f2: 687b ldr r3, [r7, #4] + 802d2f4: 675a str r2, [r3, #116] ; 0x74 hfdcan->msgRam.RxFIFO1SA = hfdcan->msgRam.RxFIFO0SA + (hfdcan->Init.RxFifo0ElmtsNbr * hfdcan->Init.RxFifo0ElmtSize * 4U); - 802d272: 687b ldr r3, [r7, #4] - 802d274: 6f5a ldr r2, [r3, #116] ; 0x74 - 802d276: 687b ldr r3, [r7, #4] - 802d278: 6c1b ldr r3, [r3, #64] ; 0x40 - 802d27a: 6879 ldr r1, [r7, #4] - 802d27c: 6c49 ldr r1, [r1, #68] ; 0x44 - 802d27e: fb01 f303 mul.w r3, r1, r3 - 802d282: 009b lsls r3, r3, #2 - 802d284: 441a add r2, r3 - 802d286: 687b ldr r3, [r7, #4] - 802d288: 679a str r2, [r3, #120] ; 0x78 + 802d2f6: 687b ldr r3, [r7, #4] + 802d2f8: 6f5a ldr r2, [r3, #116] ; 0x74 + 802d2fa: 687b ldr r3, [r7, #4] + 802d2fc: 6c1b ldr r3, [r3, #64] ; 0x40 + 802d2fe: 6879 ldr r1, [r7, #4] + 802d300: 6c49 ldr r1, [r1, #68] ; 0x44 + 802d302: fb01 f303 mul.w r3, r1, r3 + 802d306: 009b lsls r3, r3, #2 + 802d308: 441a add r2, r3 + 802d30a: 687b ldr r3, [r7, #4] + 802d30c: 679a str r2, [r3, #120] ; 0x78 hfdcan->msgRam.RxBufferSA = hfdcan->msgRam.RxFIFO1SA + (hfdcan->Init.RxFifo1ElmtsNbr * hfdcan->Init.RxFifo1ElmtSize * 4U); - 802d28a: 687b ldr r3, [r7, #4] - 802d28c: 6f9a ldr r2, [r3, #120] ; 0x78 - 802d28e: 687b ldr r3, [r7, #4] - 802d290: 6c9b ldr r3, [r3, #72] ; 0x48 - 802d292: 6879 ldr r1, [r7, #4] - 802d294: 6cc9 ldr r1, [r1, #76] ; 0x4c - 802d296: fb01 f303 mul.w r3, r1, r3 - 802d29a: 009b lsls r3, r3, #2 - 802d29c: 441a add r2, r3 - 802d29e: 687b ldr r3, [r7, #4] - 802d2a0: 67da str r2, [r3, #124] ; 0x7c + 802d30e: 687b ldr r3, [r7, #4] + 802d310: 6f9a ldr r2, [r3, #120] ; 0x78 + 802d312: 687b ldr r3, [r7, #4] + 802d314: 6c9b ldr r3, [r3, #72] ; 0x48 + 802d316: 6879 ldr r1, [r7, #4] + 802d318: 6cc9 ldr r1, [r1, #76] ; 0x4c + 802d31a: fb01 f303 mul.w r3, r1, r3 + 802d31e: 009b lsls r3, r3, #2 + 802d320: 441a add r2, r3 + 802d322: 687b ldr r3, [r7, #4] + 802d324: 67da str r2, [r3, #124] ; 0x7c hfdcan->msgRam.TxEventFIFOSA = hfdcan->msgRam.RxBufferSA + (hfdcan->Init.RxBuffersNbr * hfdcan->Init.RxBufferSize * 4U); - 802d2a2: 687b ldr r3, [r7, #4] - 802d2a4: 6fda ldr r2, [r3, #124] ; 0x7c - 802d2a6: 687b ldr r3, [r7, #4] - 802d2a8: 6d1b ldr r3, [r3, #80] ; 0x50 - 802d2aa: 6879 ldr r1, [r7, #4] - 802d2ac: 6d49 ldr r1, [r1, #84] ; 0x54 - 802d2ae: fb01 f303 mul.w r3, r1, r3 - 802d2b2: 009b lsls r3, r3, #2 - 802d2b4: 441a add r2, r3 - 802d2b6: 687b ldr r3, [r7, #4] - 802d2b8: f8c3 2080 str.w r2, [r3, #128] ; 0x80 + 802d326: 687b ldr r3, [r7, #4] + 802d328: 6fda ldr r2, [r3, #124] ; 0x7c + 802d32a: 687b ldr r3, [r7, #4] + 802d32c: 6d1b ldr r3, [r3, #80] ; 0x50 + 802d32e: 6879 ldr r1, [r7, #4] + 802d330: 6d49 ldr r1, [r1, #84] ; 0x54 + 802d332: fb01 f303 mul.w r3, r1, r3 + 802d336: 009b lsls r3, r3, #2 + 802d338: 441a add r2, r3 + 802d33a: 687b ldr r3, [r7, #4] + 802d33c: f8c3 2080 str.w r2, [r3, #128] ; 0x80 hfdcan->msgRam.TxBufferSA = hfdcan->msgRam.TxEventFIFOSA + (hfdcan->Init.TxEventsNbr * 2U * 4U); - 802d2bc: 687b ldr r3, [r7, #4] - 802d2be: f8d3 2080 ldr.w r2, [r3, #128] ; 0x80 - 802d2c2: 687b ldr r3, [r7, #4] - 802d2c4: 6d9b ldr r3, [r3, #88] ; 0x58 - 802d2c6: 00db lsls r3, r3, #3 - 802d2c8: 441a add r2, r3 - 802d2ca: 687b ldr r3, [r7, #4] - 802d2cc: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 802d340: 687b ldr r3, [r7, #4] + 802d342: f8d3 2080 ldr.w r2, [r3, #128] ; 0x80 + 802d346: 687b ldr r3, [r7, #4] + 802d348: 6d9b ldr r3, [r3, #88] ; 0x58 + 802d34a: 00db lsls r3, r3, #3 + 802d34c: 441a add r2, r3 + 802d34e: 687b ldr r3, [r7, #4] + 802d350: f8c3 2084 str.w r2, [r3, #132] ; 0x84 hfdcan->msgRam.TxFIFOQSA = hfdcan->msgRam.TxBufferSA + (hfdcan->Init.TxBuffersNbr * hfdcan->Init.TxElmtSize * 4U); - 802d2d0: 687b ldr r3, [r7, #4] - 802d2d2: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 - 802d2d6: 687b ldr r3, [r7, #4] - 802d2d8: 6ddb ldr r3, [r3, #92] ; 0x5c - 802d2da: 6879 ldr r1, [r7, #4] - 802d2dc: 6e89 ldr r1, [r1, #104] ; 0x68 - 802d2de: fb01 f303 mul.w r3, r1, r3 - 802d2e2: 009b lsls r3, r3, #2 - 802d2e4: 441a add r2, r3 - 802d2e6: 687b ldr r3, [r7, #4] - 802d2e8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 802d354: 687b ldr r3, [r7, #4] + 802d356: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 + 802d35a: 687b ldr r3, [r7, #4] + 802d35c: 6ddb ldr r3, [r3, #92] ; 0x5c + 802d35e: 6879 ldr r1, [r7, #4] + 802d360: 6e89 ldr r1, [r1, #104] ; 0x68 + 802d362: fb01 f303 mul.w r3, r1, r3 + 802d366: 009b lsls r3, r3, #2 + 802d368: 441a add r2, r3 + 802d36a: 687b ldr r3, [r7, #4] + 802d36c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 hfdcan->msgRam.EndAddress = hfdcan->msgRam.TxFIFOQSA + (hfdcan->Init.TxFifoQueueElmtsNbr * hfdcan->Init.TxElmtSize * 4U); - 802d2ec: 687b ldr r3, [r7, #4] - 802d2ee: f8d3 2088 ldr.w r2, [r3, #136] ; 0x88 - 802d2f2: 687b ldr r3, [r7, #4] - 802d2f4: 6e1b ldr r3, [r3, #96] ; 0x60 - 802d2f6: 6879 ldr r1, [r7, #4] - 802d2f8: 6e89 ldr r1, [r1, #104] ; 0x68 - 802d2fa: fb01 f303 mul.w r3, r1, r3 - 802d2fe: 009b lsls r3, r3, #2 - 802d300: 441a add r2, r3 - 802d302: 687b ldr r3, [r7, #4] - 802d304: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 802d370: 687b ldr r3, [r7, #4] + 802d372: f8d3 2088 ldr.w r2, [r3, #136] ; 0x88 + 802d376: 687b ldr r3, [r7, #4] + 802d378: 6e1b ldr r3, [r3, #96] ; 0x60 + 802d37a: 6879 ldr r1, [r7, #4] + 802d37c: 6e89 ldr r1, [r1, #104] ; 0x68 + 802d37e: fb01 f303 mul.w r3, r1, r3 + 802d382: 009b lsls r3, r3, #2 + 802d384: 441a add r2, r3 + 802d386: 687b ldr r3, [r7, #4] + 802d388: f8c3 2090 str.w r2, [r3, #144] ; 0x90 if (hfdcan->msgRam.EndAddress > FDCAN_MESSAGE_RAM_END_ADDRESS) /* Last address of the Message RAM */ - 802d308: 687b ldr r3, [r7, #4] - 802d30a: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802d30e: 4a04 ldr r2, [pc, #16] ; (802d320 ) - 802d310: 4293 cmp r3, r2 - 802d312: d915 bls.n 802d340 - 802d314: e006 b.n 802d324 - 802d316: bf00 nop - 802d318: ffff0003 .word 0xffff0003 - 802d31c: 10002b00 .word 0x10002b00 - 802d320: 4000d3fc .word 0x4000d3fc + 802d38c: 687b ldr r3, [r7, #4] + 802d38e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802d392: 4a04 ldr r2, [pc, #16] ; (802d3a4 ) + 802d394: 4293 cmp r3, r2 + 802d396: d915 bls.n 802d3c4 + 802d398: e006 b.n 802d3a8 + 802d39a: bf00 nop + 802d39c: ffff0003 .word 0xffff0003 + 802d3a0: 10002b00 .word 0x10002b00 + 802d3a4: 4000d3fc .word 0x4000d3fc { /* Update error code. Message RAM overflow */ hfdcan->ErrorCode |= HAL_FDCAN_ERROR_PARAM; - 802d324: 687b ldr r3, [r7, #4] - 802d326: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 802d32a: f043 0220 orr.w r2, r3, #32 - 802d32e: 687b ldr r3, [r7, #4] - 802d330: f8c3 209c str.w r2, [r3, #156] ; 0x9c + 802d3a8: 687b ldr r3, [r7, #4] + 802d3aa: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 802d3ae: f043 0220 orr.w r2, r3, #32 + 802d3b2: 687b ldr r3, [r7, #4] + 802d3b4: f8c3 209c str.w r2, [r3, #156] ; 0x9c /* Change FDCAN state */ hfdcan->State = HAL_FDCAN_STATE_ERROR; - 802d334: 687b ldr r3, [r7, #4] - 802d336: 2203 movs r2, #3 - 802d338: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 802d3b8: 687b ldr r3, [r7, #4] + 802d3ba: 2203 movs r2, #3 + 802d3bc: f883 2098 strb.w r2, [r3, #152] ; 0x98 return HAL_ERROR; - 802d33c: 2301 movs r3, #1 - 802d33e: e010 b.n 802d362 + 802d3c0: 2301 movs r3, #1 + 802d3c2: e010 b.n 802d3e6 } else { /* Flush the allocated Message RAM area */ for (RAMcounter = hfdcan->msgRam.StandardFilterSA; RAMcounter < hfdcan->msgRam.EndAddress; RAMcounter += 4U) - 802d340: 687b ldr r3, [r7, #4] - 802d342: 6edb ldr r3, [r3, #108] ; 0x6c - 802d344: 60fb str r3, [r7, #12] - 802d346: e005 b.n 802d354 + 802d3c4: 687b ldr r3, [r7, #4] + 802d3c6: 6edb ldr r3, [r3, #108] ; 0x6c + 802d3c8: 60fb str r3, [r7, #12] + 802d3ca: e005 b.n 802d3d8 { *(uint32_t *)(RAMcounter) = 0x00000000; - 802d348: 68fb ldr r3, [r7, #12] - 802d34a: 2200 movs r2, #0 - 802d34c: 601a str r2, [r3, #0] + 802d3cc: 68fb ldr r3, [r7, #12] + 802d3ce: 2200 movs r2, #0 + 802d3d0: 601a str r2, [r3, #0] for (RAMcounter = hfdcan->msgRam.StandardFilterSA; RAMcounter < hfdcan->msgRam.EndAddress; RAMcounter += 4U) - 802d34e: 68fb ldr r3, [r7, #12] - 802d350: 3304 adds r3, #4 - 802d352: 60fb str r3, [r7, #12] - 802d354: 687b ldr r3, [r7, #4] - 802d356: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 802d35a: 68fa ldr r2, [r7, #12] - 802d35c: 429a cmp r2, r3 - 802d35e: d3f3 bcc.n 802d348 + 802d3d2: 68fb ldr r3, [r7, #12] + 802d3d4: 3304 adds r3, #4 + 802d3d6: 60fb str r3, [r7, #12] + 802d3d8: 687b ldr r3, [r7, #4] + 802d3da: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 802d3de: 68fa ldr r2, [r7, #12] + 802d3e0: 429a cmp r2, r3 + 802d3e2: d3f3 bcc.n 802d3cc } } /* Return function status */ return HAL_OK; - 802d360: 2300 movs r3, #0 + 802d3e4: 2300 movs r3, #0 } - 802d362: 4618 mov r0, r3 - 802d364: 3714 adds r7, #20 - 802d366: 46bd mov sp, r7 - 802d368: f85d 7b04 ldr.w r7, [sp], #4 - 802d36c: 4770 bx lr - 802d36e: bf00 nop + 802d3e6: 4618 mov r0, r3 + 802d3e8: 3714 adds r7, #20 + 802d3ea: 46bd mov sp, r7 + 802d3ec: f85d 7b04 ldr.w r7, [sp], #4 + 802d3f0: 4770 bx lr + 802d3f2: bf00 nop -0802d370 : +0802d3f4 : * @param pTxData pointer to a buffer containing the payload of the Tx frame. * @param BufferIndex index of the buffer to be configured. * @retval HAL status */ static void FDCAN_CopyMessageToRAM(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData, uint32_t BufferIndex) { - 802d370: b480 push {r7} - 802d372: b089 sub sp, #36 ; 0x24 - 802d374: af00 add r7, sp, #0 - 802d376: 60f8 str r0, [r7, #12] - 802d378: 60b9 str r1, [r7, #8] - 802d37a: 607a str r2, [r7, #4] - 802d37c: 603b str r3, [r7, #0] + 802d3f4: b480 push {r7} + 802d3f6: b089 sub sp, #36 ; 0x24 + 802d3f8: af00 add r7, sp, #0 + 802d3fa: 60f8 str r0, [r7, #12] + 802d3fc: 60b9 str r1, [r7, #8] + 802d3fe: 607a str r2, [r7, #4] + 802d400: 603b str r3, [r7, #0] uint32_t TxElementW2; uint32_t *TxAddress; uint32_t ByteCounter; /* Build first word of Tx header element */ if (pTxHeader->IdType == FDCAN_STANDARD_ID) - 802d37e: 68bb ldr r3, [r7, #8] - 802d380: 685b ldr r3, [r3, #4] - 802d382: 2b00 cmp r3, #0 - 802d384: d10a bne.n 802d39c + 802d402: 68bb ldr r3, [r7, #8] + 802d404: 685b ldr r3, [r3, #4] + 802d406: 2b00 cmp r3, #0 + 802d408: d10a bne.n 802d420 { TxElementW1 = (pTxHeader->ErrorStateIndicator | - 802d386: 68bb ldr r3, [r7, #8] - 802d388: 691a ldr r2, [r3, #16] + 802d40a: 68bb ldr r3, [r7, #8] + 802d40c: 691a ldr r2, [r3, #16] FDCAN_STANDARD_ID | pTxHeader->TxFrameType | - 802d38a: 68bb ldr r3, [r7, #8] - 802d38c: 689b ldr r3, [r3, #8] + 802d40e: 68bb ldr r3, [r7, #8] + 802d410: 689b ldr r3, [r3, #8] FDCAN_STANDARD_ID | - 802d38e: 431a orrs r2, r3 + 802d412: 431a orrs r2, r3 (pTxHeader->Identifier << 18)); - 802d390: 68bb ldr r3, [r7, #8] - 802d392: 681b ldr r3, [r3, #0] - 802d394: 049b lsls r3, r3, #18 + 802d414: 68bb ldr r3, [r7, #8] + 802d416: 681b ldr r3, [r3, #0] + 802d418: 049b lsls r3, r3, #18 TxElementW1 = (pTxHeader->ErrorStateIndicator | - 802d396: 4313 orrs r3, r2 - 802d398: 61fb str r3, [r7, #28] - 802d39a: e00a b.n 802d3b2 + 802d41a: 4313 orrs r3, r2 + 802d41c: 61fb str r3, [r7, #28] + 802d41e: e00a b.n 802d436 } else /* pTxHeader->IdType == FDCAN_EXTENDED_ID */ { TxElementW1 = (pTxHeader->ErrorStateIndicator | - 802d39c: 68bb ldr r3, [r7, #8] - 802d39e: 691a ldr r2, [r3, #16] + 802d420: 68bb ldr r3, [r7, #8] + 802d422: 691a ldr r2, [r3, #16] FDCAN_EXTENDED_ID | pTxHeader->TxFrameType | - 802d3a0: 68bb ldr r3, [r7, #8] - 802d3a2: 689b ldr r3, [r3, #8] + 802d424: 68bb ldr r3, [r7, #8] + 802d426: 689b ldr r3, [r3, #8] FDCAN_EXTENDED_ID | - 802d3a4: 431a orrs r2, r3 + 802d428: 431a orrs r2, r3 pTxHeader->Identifier); - 802d3a6: 68bb ldr r3, [r7, #8] - 802d3a8: 681b ldr r3, [r3, #0] + 802d42a: 68bb ldr r3, [r7, #8] + 802d42c: 681b ldr r3, [r3, #0] pTxHeader->TxFrameType | - 802d3aa: 4313 orrs r3, r2 + 802d42e: 4313 orrs r3, r2 TxElementW1 = (pTxHeader->ErrorStateIndicator | - 802d3ac: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 - 802d3b0: 61fb str r3, [r7, #28] + 802d430: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 + 802d434: 61fb str r3, [r7, #28] } /* Build second word of Tx header element */ TxElementW2 = ((pTxHeader->MessageMarker << 24) | - 802d3b2: 68bb ldr r3, [r7, #8] - 802d3b4: 6a1b ldr r3, [r3, #32] - 802d3b6: 061a lsls r2, r3, #24 + 802d436: 68bb ldr r3, [r7, #8] + 802d438: 6a1b ldr r3, [r3, #32] + 802d43a: 061a lsls r2, r3, #24 pTxHeader->TxEventFifoControl | - 802d3b8: 68bb ldr r3, [r7, #8] - 802d3ba: 69db ldr r3, [r3, #28] + 802d43c: 68bb ldr r3, [r7, #8] + 802d43e: 69db ldr r3, [r3, #28] TxElementW2 = ((pTxHeader->MessageMarker << 24) | - 802d3bc: 431a orrs r2, r3 + 802d440: 431a orrs r2, r3 pTxHeader->FDFormat | - 802d3be: 68bb ldr r3, [r7, #8] - 802d3c0: 699b ldr r3, [r3, #24] + 802d442: 68bb ldr r3, [r7, #8] + 802d444: 699b ldr r3, [r3, #24] pTxHeader->TxEventFifoControl | - 802d3c2: 431a orrs r2, r3 + 802d446: 431a orrs r2, r3 pTxHeader->BitRateSwitch | - 802d3c4: 68bb ldr r3, [r7, #8] - 802d3c6: 695b ldr r3, [r3, #20] + 802d448: 68bb ldr r3, [r7, #8] + 802d44a: 695b ldr r3, [r3, #20] pTxHeader->FDFormat | - 802d3c8: 431a orrs r2, r3 + 802d44c: 431a orrs r2, r3 pTxHeader->DataLength); - 802d3ca: 68bb ldr r3, [r7, #8] - 802d3cc: 68db ldr r3, [r3, #12] + 802d44e: 68bb ldr r3, [r7, #8] + 802d450: 68db ldr r3, [r3, #12] TxElementW2 = ((pTxHeader->MessageMarker << 24) | - 802d3ce: 4313 orrs r3, r2 - 802d3d0: 613b str r3, [r7, #16] + 802d452: 4313 orrs r3, r2 + 802d454: 613b str r3, [r7, #16] /* Calculate Tx element address */ TxAddress = (uint32_t *)(hfdcan->msgRam.TxBufferSA + (BufferIndex * hfdcan->Init.TxElmtSize * 4U)); - 802d3d2: 68fb ldr r3, [r7, #12] - 802d3d4: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 - 802d3d8: 68fb ldr r3, [r7, #12] - 802d3da: 6e9b ldr r3, [r3, #104] ; 0x68 - 802d3dc: 6839 ldr r1, [r7, #0] - 802d3de: fb01 f303 mul.w r3, r1, r3 - 802d3e2: 009b lsls r3, r3, #2 - 802d3e4: 4413 add r3, r2 - 802d3e6: 61bb str r3, [r7, #24] + 802d456: 68fb ldr r3, [r7, #12] + 802d458: f8d3 2084 ldr.w r2, [r3, #132] ; 0x84 + 802d45c: 68fb ldr r3, [r7, #12] + 802d45e: 6e9b ldr r3, [r3, #104] ; 0x68 + 802d460: 6839 ldr r1, [r7, #0] + 802d462: fb01 f303 mul.w r3, r1, r3 + 802d466: 009b lsls r3, r3, #2 + 802d468: 4413 add r3, r2 + 802d46a: 61bb str r3, [r7, #24] /* Write Tx element header to the message RAM */ *TxAddress = TxElementW1; - 802d3e8: 69bb ldr r3, [r7, #24] - 802d3ea: 69fa ldr r2, [r7, #28] - 802d3ec: 601a str r2, [r3, #0] + 802d46c: 69bb ldr r3, [r7, #24] + 802d46e: 69fa ldr r2, [r7, #28] + 802d470: 601a str r2, [r3, #0] TxAddress++; - 802d3ee: 69bb ldr r3, [r7, #24] - 802d3f0: 3304 adds r3, #4 - 802d3f2: 61bb str r3, [r7, #24] + 802d472: 69bb ldr r3, [r7, #24] + 802d474: 3304 adds r3, #4 + 802d476: 61bb str r3, [r7, #24] *TxAddress = TxElementW2; - 802d3f4: 69bb ldr r3, [r7, #24] - 802d3f6: 693a ldr r2, [r7, #16] - 802d3f8: 601a str r2, [r3, #0] + 802d478: 69bb ldr r3, [r7, #24] + 802d47a: 693a ldr r2, [r7, #16] + 802d47c: 601a str r2, [r3, #0] TxAddress++; - 802d3fa: 69bb ldr r3, [r7, #24] - 802d3fc: 3304 adds r3, #4 - 802d3fe: 61bb str r3, [r7, #24] + 802d47e: 69bb ldr r3, [r7, #24] + 802d480: 3304 adds r3, #4 + 802d482: 61bb str r3, [r7, #24] /* Write Tx payload to the message RAM */ for (ByteCounter = 0; ByteCounter < DLCtoBytes[pTxHeader->DataLength >> 16]; ByteCounter += 4U) - 802d400: 2300 movs r3, #0 - 802d402: 617b str r3, [r7, #20] - 802d404: e020 b.n 802d448 + 802d484: 2300 movs r3, #0 + 802d486: 617b str r3, [r7, #20] + 802d488: e020 b.n 802d4cc { *TxAddress = (((uint32_t)pTxData[ByteCounter + 3U] << 24) | - 802d406: 697b ldr r3, [r7, #20] - 802d408: 3303 adds r3, #3 - 802d40a: 687a ldr r2, [r7, #4] - 802d40c: 4413 add r3, r2 - 802d40e: 781b ldrb r3, [r3, #0] - 802d410: 061a lsls r2, r3, #24 + 802d48a: 697b ldr r3, [r7, #20] + 802d48c: 3303 adds r3, #3 + 802d48e: 687a ldr r2, [r7, #4] + 802d490: 4413 add r3, r2 + 802d492: 781b ldrb r3, [r3, #0] + 802d494: 061a lsls r2, r3, #24 ((uint32_t)pTxData[ByteCounter + 2U] << 16) | - 802d412: 697b ldr r3, [r7, #20] - 802d414: 3302 adds r3, #2 - 802d416: 6879 ldr r1, [r7, #4] - 802d418: 440b add r3, r1 - 802d41a: 781b ldrb r3, [r3, #0] - 802d41c: 041b lsls r3, r3, #16 + 802d496: 697b ldr r3, [r7, #20] + 802d498: 3302 adds r3, #2 + 802d49a: 6879 ldr r1, [r7, #4] + 802d49c: 440b add r3, r1 + 802d49e: 781b ldrb r3, [r3, #0] + 802d4a0: 041b lsls r3, r3, #16 *TxAddress = (((uint32_t)pTxData[ByteCounter + 3U] << 24) | - 802d41e: 431a orrs r2, r3 + 802d4a2: 431a orrs r2, r3 ((uint32_t)pTxData[ByteCounter + 1U] << 8) | - 802d420: 697b ldr r3, [r7, #20] - 802d422: 3301 adds r3, #1 - 802d424: 6879 ldr r1, [r7, #4] - 802d426: 440b add r3, r1 - 802d428: 781b ldrb r3, [r3, #0] - 802d42a: 021b lsls r3, r3, #8 + 802d4a4: 697b ldr r3, [r7, #20] + 802d4a6: 3301 adds r3, #1 + 802d4a8: 6879 ldr r1, [r7, #4] + 802d4aa: 440b add r3, r1 + 802d4ac: 781b ldrb r3, [r3, #0] + 802d4ae: 021b lsls r3, r3, #8 ((uint32_t)pTxData[ByteCounter + 2U] << 16) | - 802d42c: 4313 orrs r3, r2 + 802d4b0: 4313 orrs r3, r2 (uint32_t)pTxData[ByteCounter]); - 802d42e: 6879 ldr r1, [r7, #4] - 802d430: 697a ldr r2, [r7, #20] - 802d432: 440a add r2, r1 - 802d434: 7812 ldrb r2, [r2, #0] + 802d4b2: 6879 ldr r1, [r7, #4] + 802d4b4: 697a ldr r2, [r7, #20] + 802d4b6: 440a add r2, r1 + 802d4b8: 7812 ldrb r2, [r2, #0] ((uint32_t)pTxData[ByteCounter + 1U] << 8) | - 802d436: 431a orrs r2, r3 + 802d4ba: 431a orrs r2, r3 *TxAddress = (((uint32_t)pTxData[ByteCounter + 3U] << 24) | - 802d438: 69bb ldr r3, [r7, #24] - 802d43a: 601a str r2, [r3, #0] + 802d4bc: 69bb ldr r3, [r7, #24] + 802d4be: 601a str r2, [r3, #0] TxAddress++; - 802d43c: 69bb ldr r3, [r7, #24] - 802d43e: 3304 adds r3, #4 - 802d440: 61bb str r3, [r7, #24] + 802d4c0: 69bb ldr r3, [r7, #24] + 802d4c2: 3304 adds r3, #4 + 802d4c4: 61bb str r3, [r7, #24] for (ByteCounter = 0; ByteCounter < DLCtoBytes[pTxHeader->DataLength >> 16]; ByteCounter += 4U) - 802d442: 697b ldr r3, [r7, #20] - 802d444: 3304 adds r3, #4 - 802d446: 617b str r3, [r7, #20] - 802d448: 68bb ldr r3, [r7, #8] - 802d44a: 68db ldr r3, [r3, #12] - 802d44c: 0c1b lsrs r3, r3, #16 - 802d44e: 4a06 ldr r2, [pc, #24] ; (802d468 ) - 802d450: 5cd3 ldrb r3, [r2, r3] - 802d452: 461a mov r2, r3 - 802d454: 697b ldr r3, [r7, #20] - 802d456: 4293 cmp r3, r2 - 802d458: d3d5 bcc.n 802d406 - } -} - 802d45a: bf00 nop - 802d45c: bf00 nop - 802d45e: 3724 adds r7, #36 ; 0x24 - 802d460: 46bd mov sp, r7 - 802d462: f85d 7b04 ldr.w r7, [sp], #4 - 802d466: 4770 bx lr - 802d468: 08044cec .word 0x08044cec - -0802d46c : + 802d4c6: 697b ldr r3, [r7, #20] + 802d4c8: 3304 adds r3, #4 + 802d4ca: 617b str r3, [r7, #20] + 802d4cc: 68bb ldr r3, [r7, #8] + 802d4ce: 68db ldr r3, [r3, #12] + 802d4d0: 0c1b lsrs r3, r3, #16 + 802d4d2: 4a06 ldr r2, [pc, #24] ; (802d4ec ) + 802d4d4: 5cd3 ldrb r3, [r2, r3] + 802d4d6: 461a mov r2, r3 + 802d4d8: 697b ldr r3, [r7, #20] + 802d4da: 4293 cmp r3, r2 + 802d4dc: d3d5 bcc.n 802d48a + } +} + 802d4de: bf00 nop + 802d4e0: bf00 nop + 802d4e2: 3724 adds r7, #36 ; 0x24 + 802d4e4: 46bd mov sp, r7 + 802d4e6: f85d 7b04 ldr.w r7, [sp], #4 + 802d4ea: 4770 bx lr + 802d4ec: 08044d6c .word 0x08044d6c + +0802d4f0 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 802d46c: b480 push {r7} - 802d46e: b089 sub sp, #36 ; 0x24 - 802d470: af00 add r7, sp, #0 - 802d472: 6078 str r0, [r7, #4] - 802d474: 6039 str r1, [r7, #0] + 802d4f0: b480 push {r7} + 802d4f2: b089 sub sp, #36 ; 0x24 + 802d4f4: af00 add r7, sp, #0 + 802d4f6: 6078 str r0, [r7, #4] + 802d4f8: 6039 str r1, [r7, #0] uint32_t position = 0x00U; - 802d476: 2300 movs r3, #0 - 802d478: 61fb str r3, [r7, #28] + 802d4fa: 2300 movs r3, #0 + 802d4fc: 61fb str r3, [r7, #28] EXTI_Core_TypeDef *EXTI_CurrentCPU; #if defined(DUAL_CORE) && defined(CORE_CM4) EXTI_CurrentCPU = EXTI_D2; /* EXTI for CM4 CPU */ #else EXTI_CurrentCPU = EXTI_D1; /* EXTI for CM7 CPU */ - 802d47a: 4b89 ldr r3, [pc, #548] ; (802d6a0 ) - 802d47c: 617b str r3, [r7, #20] + 802d4fe: 4b89 ldr r3, [pc, #548] ; (802d724 ) + 802d500: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00U) - 802d47e: e194 b.n 802d7aa + 802d502: e194 b.n 802d82e { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1UL << position); - 802d480: 683b ldr r3, [r7, #0] - 802d482: 681a ldr r2, [r3, #0] - 802d484: 2101 movs r1, #1 - 802d486: 69fb ldr r3, [r7, #28] - 802d488: fa01 f303 lsl.w r3, r1, r3 - 802d48c: 4013 ands r3, r2 - 802d48e: 613b str r3, [r7, #16] + 802d504: 683b ldr r3, [r7, #0] + 802d506: 681a ldr r2, [r3, #0] + 802d508: 2101 movs r1, #1 + 802d50a: 69fb ldr r3, [r7, #28] + 802d50c: fa01 f303 lsl.w r3, r1, r3 + 802d510: 4013 ands r3, r2 + 802d512: 613b str r3, [r7, #16] if (iocurrent != 0x00U) - 802d490: 693b ldr r3, [r7, #16] - 802d492: 2b00 cmp r3, #0 - 802d494: f000 8186 beq.w 802d7a4 + 802d514: 693b ldr r3, [r7, #16] + 802d516: 2b00 cmp r3, #0 + 802d518: f000 8186 beq.w 802d828 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 802d498: 683b ldr r3, [r7, #0] - 802d49a: 685b ldr r3, [r3, #4] - 802d49c: f003 0303 and.w r3, r3, #3 - 802d4a0: 2b01 cmp r3, #1 - 802d4a2: d005 beq.n 802d4b0 - 802d4a4: 683b ldr r3, [r7, #0] - 802d4a6: 685b ldr r3, [r3, #4] - 802d4a8: f003 0303 and.w r3, r3, #3 - 802d4ac: 2b02 cmp r3, #2 - 802d4ae: d130 bne.n 802d512 + 802d51c: 683b ldr r3, [r7, #0] + 802d51e: 685b ldr r3, [r3, #4] + 802d520: f003 0303 and.w r3, r3, #3 + 802d524: 2b01 cmp r3, #1 + 802d526: d005 beq.n 802d534 + 802d528: 683b ldr r3, [r7, #0] + 802d52a: 685b ldr r3, [r3, #4] + 802d52c: f003 0303 and.w r3, r3, #3 + 802d530: 2b02 cmp r3, #2 + 802d532: d130 bne.n 802d596 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 802d4b0: 687b ldr r3, [r7, #4] - 802d4b2: 689b ldr r3, [r3, #8] - 802d4b4: 61bb str r3, [r7, #24] + 802d534: 687b ldr r3, [r7, #4] + 802d536: 689b ldr r3, [r3, #8] + 802d538: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U)); - 802d4b6: 69fb ldr r3, [r7, #28] - 802d4b8: 005b lsls r3, r3, #1 - 802d4ba: 2203 movs r2, #3 - 802d4bc: fa02 f303 lsl.w r3, r2, r3 - 802d4c0: 43db mvns r3, r3 - 802d4c2: 69ba ldr r2, [r7, #24] - 802d4c4: 4013 ands r3, r2 - 802d4c6: 61bb str r3, [r7, #24] + 802d53a: 69fb ldr r3, [r7, #28] + 802d53c: 005b lsls r3, r3, #1 + 802d53e: 2203 movs r2, #3 + 802d540: fa02 f303 lsl.w r3, r2, r3 + 802d544: 43db mvns r3, r3 + 802d546: 69ba ldr r2, [r7, #24] + 802d548: 4013 ands r3, r2 + 802d54a: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); - 802d4c8: 683b ldr r3, [r7, #0] - 802d4ca: 68da ldr r2, [r3, #12] - 802d4cc: 69fb ldr r3, [r7, #28] - 802d4ce: 005b lsls r3, r3, #1 - 802d4d0: fa02 f303 lsl.w r3, r2, r3 - 802d4d4: 69ba ldr r2, [r7, #24] - 802d4d6: 4313 orrs r3, r2 - 802d4d8: 61bb str r3, [r7, #24] + 802d54c: 683b ldr r3, [r7, #0] + 802d54e: 68da ldr r2, [r3, #12] + 802d550: 69fb ldr r3, [r7, #28] + 802d552: 005b lsls r3, r3, #1 + 802d554: fa02 f303 lsl.w r3, r2, r3 + 802d558: 69ba ldr r2, [r7, #24] + 802d55a: 4313 orrs r3, r2 + 802d55c: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; - 802d4da: 687b ldr r3, [r7, #4] - 802d4dc: 69ba ldr r2, [r7, #24] - 802d4de: 609a str r2, [r3, #8] + 802d55e: 687b ldr r3, [r7, #4] + 802d560: 69ba ldr r2, [r7, #24] + 802d562: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 802d4e0: 687b ldr r3, [r7, #4] - 802d4e2: 685b ldr r3, [r3, #4] - 802d4e4: 61bb str r3, [r7, #24] + 802d564: 687b ldr r3, [r7, #4] + 802d566: 685b ldr r3, [r3, #4] + 802d568: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT0 << position) ; - 802d4e6: 2201 movs r2, #1 - 802d4e8: 69fb ldr r3, [r7, #28] - 802d4ea: fa02 f303 lsl.w r3, r2, r3 - 802d4ee: 43db mvns r3, r3 - 802d4f0: 69ba ldr r2, [r7, #24] - 802d4f2: 4013 ands r3, r2 - 802d4f4: 61bb str r3, [r7, #24] + 802d56a: 2201 movs r2, #1 + 802d56c: 69fb ldr r3, [r7, #28] + 802d56e: fa02 f303 lsl.w r3, r2, r3 + 802d572: 43db mvns r3, r3 + 802d574: 69ba ldr r2, [r7, #24] + 802d576: 4013 ands r3, r2 + 802d578: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 802d4f6: 683b ldr r3, [r7, #0] - 802d4f8: 685b ldr r3, [r3, #4] - 802d4fa: 091b lsrs r3, r3, #4 - 802d4fc: f003 0201 and.w r2, r3, #1 - 802d500: 69fb ldr r3, [r7, #28] - 802d502: fa02 f303 lsl.w r3, r2, r3 - 802d506: 69ba ldr r2, [r7, #24] - 802d508: 4313 orrs r3, r2 - 802d50a: 61bb str r3, [r7, #24] + 802d57a: 683b ldr r3, [r7, #0] + 802d57c: 685b ldr r3, [r3, #4] + 802d57e: 091b lsrs r3, r3, #4 + 802d580: f003 0201 and.w r2, r3, #1 + 802d584: 69fb ldr r3, [r7, #28] + 802d586: fa02 f303 lsl.w r3, r2, r3 + 802d58a: 69ba ldr r2, [r7, #24] + 802d58c: 4313 orrs r3, r2 + 802d58e: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; - 802d50c: 687b ldr r3, [r7, #4] - 802d50e: 69ba ldr r2, [r7, #24] - 802d510: 605a str r2, [r3, #4] + 802d590: 687b ldr r3, [r7, #4] + 802d592: 69ba ldr r2, [r7, #24] + 802d594: 605a str r2, [r3, #4] } if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 802d512: 683b ldr r3, [r7, #0] - 802d514: 685b ldr r3, [r3, #4] - 802d516: f003 0303 and.w r3, r3, #3 - 802d51a: 2b03 cmp r3, #3 - 802d51c: d017 beq.n 802d54e + 802d596: 683b ldr r3, [r7, #0] + 802d598: 685b ldr r3, [r3, #4] + 802d59a: f003 0303 and.w r3, r3, #3 + 802d59e: 2b03 cmp r3, #3 + 802d5a0: d017 beq.n 802d5d2 { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 802d51e: 687b ldr r3, [r7, #4] - 802d520: 68db ldr r3, [r3, #12] - 802d522: 61bb str r3, [r7, #24] + 802d5a2: 687b ldr r3, [r7, #4] + 802d5a4: 68db ldr r3, [r3, #12] + 802d5a6: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); - 802d524: 69fb ldr r3, [r7, #28] - 802d526: 005b lsls r3, r3, #1 - 802d528: 2203 movs r2, #3 - 802d52a: fa02 f303 lsl.w r3, r2, r3 - 802d52e: 43db mvns r3, r3 - 802d530: 69ba ldr r2, [r7, #24] - 802d532: 4013 ands r3, r2 - 802d534: 61bb str r3, [r7, #24] + 802d5a8: 69fb ldr r3, [r7, #28] + 802d5aa: 005b lsls r3, r3, #1 + 802d5ac: 2203 movs r2, #3 + 802d5ae: fa02 f303 lsl.w r3, r2, r3 + 802d5b2: 43db mvns r3, r3 + 802d5b4: 69ba ldr r2, [r7, #24] + 802d5b6: 4013 ands r3, r2 + 802d5b8: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); - 802d536: 683b ldr r3, [r7, #0] - 802d538: 689a ldr r2, [r3, #8] - 802d53a: 69fb ldr r3, [r7, #28] - 802d53c: 005b lsls r3, r3, #1 - 802d53e: fa02 f303 lsl.w r3, r2, r3 - 802d542: 69ba ldr r2, [r7, #24] - 802d544: 4313 orrs r3, r2 - 802d546: 61bb str r3, [r7, #24] + 802d5ba: 683b ldr r3, [r7, #0] + 802d5bc: 689a ldr r2, [r3, #8] + 802d5be: 69fb ldr r3, [r7, #28] + 802d5c0: 005b lsls r3, r3, #1 + 802d5c2: fa02 f303 lsl.w r3, r2, r3 + 802d5c6: 69ba ldr r2, [r7, #24] + 802d5c8: 4313 orrs r3, r2 + 802d5ca: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; - 802d548: 687b ldr r3, [r7, #4] - 802d54a: 69ba ldr r2, [r7, #24] - 802d54c: 60da str r2, [r3, #12] + 802d5cc: 687b ldr r3, [r7, #4] + 802d5ce: 69ba ldr r2, [r7, #24] + 802d5d0: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 802d54e: 683b ldr r3, [r7, #0] - 802d550: 685b ldr r3, [r3, #4] - 802d552: f003 0303 and.w r3, r3, #3 - 802d556: 2b02 cmp r3, #2 - 802d558: d123 bne.n 802d5a2 + 802d5d2: 683b ldr r3, [r7, #0] + 802d5d4: 685b ldr r3, [r3, #4] + 802d5d6: f003 0303 and.w r3, r3, #3 + 802d5da: 2b02 cmp r3, #2 + 802d5dc: d123 bne.n 802d626 /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; - 802d55a: 69fb ldr r3, [r7, #28] - 802d55c: 08da lsrs r2, r3, #3 - 802d55e: 687b ldr r3, [r7, #4] - 802d560: 3208 adds r2, #8 - 802d562: f853 3022 ldr.w r3, [r3, r2, lsl #2] - 802d566: 61bb str r3, [r7, #24] + 802d5de: 69fb ldr r3, [r7, #28] + 802d5e0: 08da lsrs r2, r3, #3 + 802d5e2: 687b ldr r3, [r7, #4] + 802d5e4: 3208 adds r2, #8 + 802d5e6: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 802d5ea: 61bb str r3, [r7, #24] temp &= ~(0xFU << ((position & 0x07U) * 4U)); - 802d568: 69fb ldr r3, [r7, #28] - 802d56a: f003 0307 and.w r3, r3, #7 - 802d56e: 009b lsls r3, r3, #2 - 802d570: 220f movs r2, #15 - 802d572: fa02 f303 lsl.w r3, r2, r3 - 802d576: 43db mvns r3, r3 - 802d578: 69ba ldr r2, [r7, #24] - 802d57a: 4013 ands r3, r2 - 802d57c: 61bb str r3, [r7, #24] + 802d5ec: 69fb ldr r3, [r7, #28] + 802d5ee: f003 0307 and.w r3, r3, #7 + 802d5f2: 009b lsls r3, r3, #2 + 802d5f4: 220f movs r2, #15 + 802d5f6: fa02 f303 lsl.w r3, r2, r3 + 802d5fa: 43db mvns r3, r3 + 802d5fc: 69ba ldr r2, [r7, #24] + 802d5fe: 4013 ands r3, r2 + 802d600: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Alternate) << ((position & 0x07U) * 4U)); - 802d57e: 683b ldr r3, [r7, #0] - 802d580: 691a ldr r2, [r3, #16] - 802d582: 69fb ldr r3, [r7, #28] - 802d584: f003 0307 and.w r3, r3, #7 - 802d588: 009b lsls r3, r3, #2 - 802d58a: fa02 f303 lsl.w r3, r2, r3 - 802d58e: 69ba ldr r2, [r7, #24] - 802d590: 4313 orrs r3, r2 - 802d592: 61bb str r3, [r7, #24] + 802d602: 683b ldr r3, [r7, #0] + 802d604: 691a ldr r2, [r3, #16] + 802d606: 69fb ldr r3, [r7, #28] + 802d608: f003 0307 and.w r3, r3, #7 + 802d60c: 009b lsls r3, r3, #2 + 802d60e: fa02 f303 lsl.w r3, r2, r3 + 802d612: 69ba ldr r2, [r7, #24] + 802d614: 4313 orrs r3, r2 + 802d616: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3U] = temp; - 802d594: 69fb ldr r3, [r7, #28] - 802d596: 08da lsrs r2, r3, #3 - 802d598: 687b ldr r3, [r7, #4] - 802d59a: 3208 adds r2, #8 - 802d59c: 69b9 ldr r1, [r7, #24] - 802d59e: f843 1022 str.w r1, [r3, r2, lsl #2] + 802d618: 69fb ldr r3, [r7, #28] + 802d61a: 08da lsrs r2, r3, #3 + 802d61c: 687b ldr r3, [r7, #4] + 802d61e: 3208 adds r2, #8 + 802d620: 69b9 ldr r1, [r7, #24] + 802d622: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 802d5a2: 687b ldr r3, [r7, #4] - 802d5a4: 681b ldr r3, [r3, #0] - 802d5a6: 61bb str r3, [r7, #24] + 802d626: 687b ldr r3, [r7, #4] + 802d628: 681b ldr r3, [r3, #0] + 802d62a: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODE0 << (position * 2U)); - 802d5a8: 69fb ldr r3, [r7, #28] - 802d5aa: 005b lsls r3, r3, #1 - 802d5ac: 2203 movs r2, #3 - 802d5ae: fa02 f303 lsl.w r3, r2, r3 - 802d5b2: 43db mvns r3, r3 - 802d5b4: 69ba ldr r2, [r7, #24] - 802d5b6: 4013 ands r3, r2 - 802d5b8: 61bb str r3, [r7, #24] + 802d62c: 69fb ldr r3, [r7, #28] + 802d62e: 005b lsls r3, r3, #1 + 802d630: 2203 movs r2, #3 + 802d632: fa02 f303 lsl.w r3, r2, r3 + 802d636: 43db mvns r3, r3 + 802d638: 69ba ldr r2, [r7, #24] + 802d63a: 4013 ands r3, r2 + 802d63c: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); - 802d5ba: 683b ldr r3, [r7, #0] - 802d5bc: 685b ldr r3, [r3, #4] - 802d5be: f003 0203 and.w r2, r3, #3 - 802d5c2: 69fb ldr r3, [r7, #28] - 802d5c4: 005b lsls r3, r3, #1 - 802d5c6: fa02 f303 lsl.w r3, r2, r3 - 802d5ca: 69ba ldr r2, [r7, #24] - 802d5cc: 4313 orrs r3, r2 - 802d5ce: 61bb str r3, [r7, #24] + 802d63e: 683b ldr r3, [r7, #0] + 802d640: 685b ldr r3, [r3, #4] + 802d642: f003 0203 and.w r2, r3, #3 + 802d646: 69fb ldr r3, [r7, #28] + 802d648: 005b lsls r3, r3, #1 + 802d64a: fa02 f303 lsl.w r3, r2, r3 + 802d64e: 69ba ldr r2, [r7, #24] + 802d650: 4313 orrs r3, r2 + 802d652: 61bb str r3, [r7, #24] GPIOx->MODER = temp; - 802d5d0: 687b ldr r3, [r7, #4] - 802d5d2: 69ba ldr r2, [r7, #24] - 802d5d4: 601a str r2, [r3, #0] + 802d654: 687b ldr r3, [r7, #4] + 802d656: 69ba ldr r2, [r7, #24] + 802d658: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U) - 802d5d6: 683b ldr r3, [r7, #0] - 802d5d8: 685b ldr r3, [r3, #4] - 802d5da: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 802d5de: 2b00 cmp r3, #0 - 802d5e0: f000 80e0 beq.w 802d7a4 + 802d65a: 683b ldr r3, [r7, #0] + 802d65c: 685b ldr r3, [r3, #4] + 802d65e: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 802d662: 2b00 cmp r3, #0 + 802d664: f000 80e0 beq.w 802d828 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 802d5e4: 4b2f ldr r3, [pc, #188] ; (802d6a4 ) - 802d5e6: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 802d5ea: 4a2e ldr r2, [pc, #184] ; (802d6a4 ) - 802d5ec: f043 0302 orr.w r3, r3, #2 - 802d5f0: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 - 802d5f4: 4b2b ldr r3, [pc, #172] ; (802d6a4 ) - 802d5f6: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 - 802d5fa: f003 0302 and.w r3, r3, #2 - 802d5fe: 60fb str r3, [r7, #12] - 802d600: 68fb ldr r3, [r7, #12] + 802d668: 4b2f ldr r3, [pc, #188] ; (802d728 ) + 802d66a: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 802d66e: 4a2e ldr r2, [pc, #184] ; (802d728 ) + 802d670: f043 0302 orr.w r3, r3, #2 + 802d674: f8c2 30f4 str.w r3, [r2, #244] ; 0xf4 + 802d678: 4b2b ldr r3, [pc, #172] ; (802d728 ) + 802d67a: f8d3 30f4 ldr.w r3, [r3, #244] ; 0xf4 + 802d67e: f003 0302 and.w r3, r3, #2 + 802d682: 60fb str r3, [r7, #12] + 802d684: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; - 802d602: 4a29 ldr r2, [pc, #164] ; (802d6a8 ) - 802d604: 69fb ldr r3, [r7, #28] - 802d606: 089b lsrs r3, r3, #2 - 802d608: 3302 adds r3, #2 - 802d60a: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 802d60e: 61bb str r3, [r7, #24] + 802d686: 4a29 ldr r2, [pc, #164] ; (802d72c ) + 802d688: 69fb ldr r3, [r7, #28] + 802d68a: 089b lsrs r3, r3, #2 + 802d68c: 3302 adds r3, #2 + 802d68e: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 802d692: 61bb str r3, [r7, #24] temp &= ~(0x0FUL << (4U * (position & 0x03U))); - 802d610: 69fb ldr r3, [r7, #28] - 802d612: f003 0303 and.w r3, r3, #3 - 802d616: 009b lsls r3, r3, #2 - 802d618: 220f movs r2, #15 - 802d61a: fa02 f303 lsl.w r3, r2, r3 - 802d61e: 43db mvns r3, r3 - 802d620: 69ba ldr r2, [r7, #24] - 802d622: 4013 ands r3, r2 - 802d624: 61bb str r3, [r7, #24] + 802d694: 69fb ldr r3, [r7, #28] + 802d696: f003 0303 and.w r3, r3, #3 + 802d69a: 009b lsls r3, r3, #2 + 802d69c: 220f movs r2, #15 + 802d69e: fa02 f303 lsl.w r3, r2, r3 + 802d6a2: 43db mvns r3, r3 + 802d6a4: 69ba ldr r2, [r7, #24] + 802d6a6: 4013 ands r3, r2 + 802d6a8: 61bb str r3, [r7, #24] temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U))); - 802d626: 687b ldr r3, [r7, #4] - 802d628: 4a20 ldr r2, [pc, #128] ; (802d6ac ) - 802d62a: 4293 cmp r3, r2 - 802d62c: d052 beq.n 802d6d4 - 802d62e: 687b ldr r3, [r7, #4] - 802d630: 4a1f ldr r2, [pc, #124] ; (802d6b0 ) - 802d632: 4293 cmp r3, r2 - 802d634: d031 beq.n 802d69a - 802d636: 687b ldr r3, [r7, #4] - 802d638: 4a1e ldr r2, [pc, #120] ; (802d6b4 ) - 802d63a: 4293 cmp r3, r2 - 802d63c: d02b beq.n 802d696 - 802d63e: 687b ldr r3, [r7, #4] - 802d640: 4a1d ldr r2, [pc, #116] ; (802d6b8 ) - 802d642: 4293 cmp r3, r2 - 802d644: d025 beq.n 802d692 - 802d646: 687b ldr r3, [r7, #4] - 802d648: 4a1c ldr r2, [pc, #112] ; (802d6bc ) - 802d64a: 4293 cmp r3, r2 - 802d64c: d01f beq.n 802d68e - 802d64e: 687b ldr r3, [r7, #4] - 802d650: 4a1b ldr r2, [pc, #108] ; (802d6c0 ) - 802d652: 4293 cmp r3, r2 - 802d654: d019 beq.n 802d68a - 802d656: 687b ldr r3, [r7, #4] - 802d658: 4a1a ldr r2, [pc, #104] ; (802d6c4 ) - 802d65a: 4293 cmp r3, r2 - 802d65c: d013 beq.n 802d686 - 802d65e: 687b ldr r3, [r7, #4] - 802d660: 4a19 ldr r2, [pc, #100] ; (802d6c8 ) - 802d662: 4293 cmp r3, r2 - 802d664: d00d beq.n 802d682 - 802d666: 687b ldr r3, [r7, #4] - 802d668: 4a18 ldr r2, [pc, #96] ; (802d6cc ) - 802d66a: 4293 cmp r3, r2 - 802d66c: d007 beq.n 802d67e - 802d66e: 687b ldr r3, [r7, #4] - 802d670: 4a17 ldr r2, [pc, #92] ; (802d6d0 ) - 802d672: 4293 cmp r3, r2 - 802d674: d101 bne.n 802d67a - 802d676: 2309 movs r3, #9 - 802d678: e02d b.n 802d6d6 - 802d67a: 230a movs r3, #10 - 802d67c: e02b b.n 802d6d6 - 802d67e: 2308 movs r3, #8 - 802d680: e029 b.n 802d6d6 - 802d682: 2307 movs r3, #7 - 802d684: e027 b.n 802d6d6 - 802d686: 2306 movs r3, #6 - 802d688: e025 b.n 802d6d6 - 802d68a: 2305 movs r3, #5 - 802d68c: e023 b.n 802d6d6 - 802d68e: 2304 movs r3, #4 - 802d690: e021 b.n 802d6d6 - 802d692: 2303 movs r3, #3 - 802d694: e01f b.n 802d6d6 - 802d696: 2302 movs r3, #2 - 802d698: e01d b.n 802d6d6 - 802d69a: 2301 movs r3, #1 - 802d69c: e01b b.n 802d6d6 - 802d69e: bf00 nop - 802d6a0: 58000080 .word 0x58000080 - 802d6a4: 58024400 .word 0x58024400 - 802d6a8: 58000400 .word 0x58000400 - 802d6ac: 58020000 .word 0x58020000 - 802d6b0: 58020400 .word 0x58020400 - 802d6b4: 58020800 .word 0x58020800 - 802d6b8: 58020c00 .word 0x58020c00 - 802d6bc: 58021000 .word 0x58021000 - 802d6c0: 58021400 .word 0x58021400 - 802d6c4: 58021800 .word 0x58021800 - 802d6c8: 58021c00 .word 0x58021c00 - 802d6cc: 58022000 .word 0x58022000 - 802d6d0: 58022400 .word 0x58022400 - 802d6d4: 2300 movs r3, #0 - 802d6d6: 69fa ldr r2, [r7, #28] - 802d6d8: f002 0203 and.w r2, r2, #3 - 802d6dc: 0092 lsls r2, r2, #2 - 802d6de: 4093 lsls r3, r2 - 802d6e0: 69ba ldr r2, [r7, #24] - 802d6e2: 4313 orrs r3, r2 - 802d6e4: 61bb str r3, [r7, #24] + 802d6aa: 687b ldr r3, [r7, #4] + 802d6ac: 4a20 ldr r2, [pc, #128] ; (802d730 ) + 802d6ae: 4293 cmp r3, r2 + 802d6b0: d052 beq.n 802d758 + 802d6b2: 687b ldr r3, [r7, #4] + 802d6b4: 4a1f ldr r2, [pc, #124] ; (802d734 ) + 802d6b6: 4293 cmp r3, r2 + 802d6b8: d031 beq.n 802d71e + 802d6ba: 687b ldr r3, [r7, #4] + 802d6bc: 4a1e ldr r2, [pc, #120] ; (802d738 ) + 802d6be: 4293 cmp r3, r2 + 802d6c0: d02b beq.n 802d71a + 802d6c2: 687b ldr r3, [r7, #4] + 802d6c4: 4a1d ldr r2, [pc, #116] ; (802d73c ) + 802d6c6: 4293 cmp r3, r2 + 802d6c8: d025 beq.n 802d716 + 802d6ca: 687b ldr r3, [r7, #4] + 802d6cc: 4a1c ldr r2, [pc, #112] ; (802d740 ) + 802d6ce: 4293 cmp r3, r2 + 802d6d0: d01f beq.n 802d712 + 802d6d2: 687b ldr r3, [r7, #4] + 802d6d4: 4a1b ldr r2, [pc, #108] ; (802d744 ) + 802d6d6: 4293 cmp r3, r2 + 802d6d8: d019 beq.n 802d70e + 802d6da: 687b ldr r3, [r7, #4] + 802d6dc: 4a1a ldr r2, [pc, #104] ; (802d748 ) + 802d6de: 4293 cmp r3, r2 + 802d6e0: d013 beq.n 802d70a + 802d6e2: 687b ldr r3, [r7, #4] + 802d6e4: 4a19 ldr r2, [pc, #100] ; (802d74c ) + 802d6e6: 4293 cmp r3, r2 + 802d6e8: d00d beq.n 802d706 + 802d6ea: 687b ldr r3, [r7, #4] + 802d6ec: 4a18 ldr r2, [pc, #96] ; (802d750 ) + 802d6ee: 4293 cmp r3, r2 + 802d6f0: d007 beq.n 802d702 + 802d6f2: 687b ldr r3, [r7, #4] + 802d6f4: 4a17 ldr r2, [pc, #92] ; (802d754 ) + 802d6f6: 4293 cmp r3, r2 + 802d6f8: d101 bne.n 802d6fe + 802d6fa: 2309 movs r3, #9 + 802d6fc: e02d b.n 802d75a + 802d6fe: 230a movs r3, #10 + 802d700: e02b b.n 802d75a + 802d702: 2308 movs r3, #8 + 802d704: e029 b.n 802d75a + 802d706: 2307 movs r3, #7 + 802d708: e027 b.n 802d75a + 802d70a: 2306 movs r3, #6 + 802d70c: e025 b.n 802d75a + 802d70e: 2305 movs r3, #5 + 802d710: e023 b.n 802d75a + 802d712: 2304 movs r3, #4 + 802d714: e021 b.n 802d75a + 802d716: 2303 movs r3, #3 + 802d718: e01f b.n 802d75a + 802d71a: 2302 movs r3, #2 + 802d71c: e01d b.n 802d75a + 802d71e: 2301 movs r3, #1 + 802d720: e01b b.n 802d75a + 802d722: bf00 nop + 802d724: 58000080 .word 0x58000080 + 802d728: 58024400 .word 0x58024400 + 802d72c: 58000400 .word 0x58000400 + 802d730: 58020000 .word 0x58020000 + 802d734: 58020400 .word 0x58020400 + 802d738: 58020800 .word 0x58020800 + 802d73c: 58020c00 .word 0x58020c00 + 802d740: 58021000 .word 0x58021000 + 802d744: 58021400 .word 0x58021400 + 802d748: 58021800 .word 0x58021800 + 802d74c: 58021c00 .word 0x58021c00 + 802d750: 58022000 .word 0x58022000 + 802d754: 58022400 .word 0x58022400 + 802d758: 2300 movs r3, #0 + 802d75a: 69fa ldr r2, [r7, #28] + 802d75c: f002 0203 and.w r2, r2, #3 + 802d760: 0092 lsls r2, r2, #2 + 802d762: 4093 lsls r3, r2 + 802d764: 69ba ldr r2, [r7, #24] + 802d766: 4313 orrs r3, r2 + 802d768: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2U] = temp; - 802d6e6: 4938 ldr r1, [pc, #224] ; (802d7c8 ) - 802d6e8: 69fb ldr r3, [r7, #28] - 802d6ea: 089b lsrs r3, r3, #2 - 802d6ec: 3302 adds r3, #2 - 802d6ee: 69ba ldr r2, [r7, #24] - 802d6f0: f841 2023 str.w r2, [r1, r3, lsl #2] + 802d76a: 4938 ldr r1, [pc, #224] ; (802d84c ) + 802d76c: 69fb ldr r3, [r7, #28] + 802d76e: 089b lsrs r3, r3, #2 + 802d770: 3302 adds r3, #2 + 802d772: 69ba ldr r2, [r7, #24] + 802d774: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR1; - 802d6f4: f04f 43b0 mov.w r3, #1476395008 ; 0x58000000 - 802d6f8: 681b ldr r3, [r3, #0] - 802d6fa: 61bb str r3, [r7, #24] + 802d778: f04f 43b0 mov.w r3, #1476395008 ; 0x58000000 + 802d77c: 681b ldr r3, [r3, #0] + 802d77e: 61bb str r3, [r7, #24] temp &= ~(iocurrent); - 802d6fc: 693b ldr r3, [r7, #16] - 802d6fe: 43db mvns r3, r3 - 802d700: 69ba ldr r2, [r7, #24] - 802d702: 4013 ands r3, r2 - 802d704: 61bb str r3, [r7, #24] + 802d780: 693b ldr r3, [r7, #16] + 802d782: 43db mvns r3, r3 + 802d784: 69ba ldr r2, [r7, #24] + 802d786: 4013 ands r3, r2 + 802d788: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) - 802d706: 683b ldr r3, [r7, #0] - 802d708: 685b ldr r3, [r3, #4] - 802d70a: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 802d70e: 2b00 cmp r3, #0 - 802d710: d003 beq.n 802d71a + 802d78a: 683b ldr r3, [r7, #0] + 802d78c: 685b ldr r3, [r3, #4] + 802d78e: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 802d792: 2b00 cmp r3, #0 + 802d794: d003 beq.n 802d79e { temp |= iocurrent; - 802d712: 69ba ldr r2, [r7, #24] - 802d714: 693b ldr r3, [r7, #16] - 802d716: 4313 orrs r3, r2 - 802d718: 61bb str r3, [r7, #24] + 802d796: 69ba ldr r2, [r7, #24] + 802d798: 693b ldr r3, [r7, #16] + 802d79a: 4313 orrs r3, r2 + 802d79c: 61bb str r3, [r7, #24] } EXTI->RTSR1 = temp; - 802d71a: f04f 42b0 mov.w r2, #1476395008 ; 0x58000000 - 802d71e: 69bb ldr r3, [r7, #24] - 802d720: 6013 str r3, [r2, #0] + 802d79e: f04f 42b0 mov.w r2, #1476395008 ; 0x58000000 + 802d7a2: 69bb ldr r3, [r7, #24] + 802d7a4: 6013 str r3, [r2, #0] temp = EXTI->FTSR1; - 802d722: f04f 43b0 mov.w r3, #1476395008 ; 0x58000000 - 802d726: 685b ldr r3, [r3, #4] - 802d728: 61bb str r3, [r7, #24] + 802d7a6: f04f 43b0 mov.w r3, #1476395008 ; 0x58000000 + 802d7aa: 685b ldr r3, [r3, #4] + 802d7ac: 61bb str r3, [r7, #24] temp &= ~(iocurrent); - 802d72a: 693b ldr r3, [r7, #16] - 802d72c: 43db mvns r3, r3 - 802d72e: 69ba ldr r2, [r7, #24] - 802d730: 4013 ands r3, r2 - 802d732: 61bb str r3, [r7, #24] + 802d7ae: 693b ldr r3, [r7, #16] + 802d7b0: 43db mvns r3, r3 + 802d7b2: 69ba ldr r2, [r7, #24] + 802d7b4: 4013 ands r3, r2 + 802d7b6: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) - 802d734: 683b ldr r3, [r7, #0] - 802d736: 685b ldr r3, [r3, #4] - 802d738: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 802d73c: 2b00 cmp r3, #0 - 802d73e: d003 beq.n 802d748 + 802d7b8: 683b ldr r3, [r7, #0] + 802d7ba: 685b ldr r3, [r3, #4] + 802d7bc: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 802d7c0: 2b00 cmp r3, #0 + 802d7c2: d003 beq.n 802d7cc { temp |= iocurrent; - 802d740: 69ba ldr r2, [r7, #24] - 802d742: 693b ldr r3, [r7, #16] - 802d744: 4313 orrs r3, r2 - 802d746: 61bb str r3, [r7, #24] + 802d7c4: 69ba ldr r2, [r7, #24] + 802d7c6: 693b ldr r3, [r7, #16] + 802d7c8: 4313 orrs r3, r2 + 802d7ca: 61bb str r3, [r7, #24] } EXTI->FTSR1 = temp; - 802d748: f04f 42b0 mov.w r2, #1476395008 ; 0x58000000 - 802d74c: 69bb ldr r3, [r7, #24] - 802d74e: 6053 str r3, [r2, #4] + 802d7cc: f04f 42b0 mov.w r2, #1476395008 ; 0x58000000 + 802d7d0: 69bb ldr r3, [r7, #24] + 802d7d2: 6053 str r3, [r2, #4] temp = EXTI_CurrentCPU->EMR1; - 802d750: 697b ldr r3, [r7, #20] - 802d752: 685b ldr r3, [r3, #4] - 802d754: 61bb str r3, [r7, #24] + 802d7d4: 697b ldr r3, [r7, #20] + 802d7d6: 685b ldr r3, [r3, #4] + 802d7d8: 61bb str r3, [r7, #24] temp &= ~(iocurrent); - 802d756: 693b ldr r3, [r7, #16] - 802d758: 43db mvns r3, r3 - 802d75a: 69ba ldr r2, [r7, #24] - 802d75c: 4013 ands r3, r2 - 802d75e: 61bb str r3, [r7, #24] + 802d7da: 693b ldr r3, [r7, #16] + 802d7dc: 43db mvns r3, r3 + 802d7de: 69ba ldr r2, [r7, #24] + 802d7e0: 4013 ands r3, r2 + 802d7e2: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U) - 802d760: 683b ldr r3, [r7, #0] - 802d762: 685b ldr r3, [r3, #4] - 802d764: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802d768: 2b00 cmp r3, #0 - 802d76a: d003 beq.n 802d774 + 802d7e4: 683b ldr r3, [r7, #0] + 802d7e6: 685b ldr r3, [r3, #4] + 802d7e8: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802d7ec: 2b00 cmp r3, #0 + 802d7ee: d003 beq.n 802d7f8 { temp |= iocurrent; - 802d76c: 69ba ldr r2, [r7, #24] - 802d76e: 693b ldr r3, [r7, #16] - 802d770: 4313 orrs r3, r2 - 802d772: 61bb str r3, [r7, #24] + 802d7f0: 69ba ldr r2, [r7, #24] + 802d7f2: 693b ldr r3, [r7, #16] + 802d7f4: 4313 orrs r3, r2 + 802d7f6: 61bb str r3, [r7, #24] } EXTI_CurrentCPU->EMR1 = temp; - 802d774: 697b ldr r3, [r7, #20] - 802d776: 69ba ldr r2, [r7, #24] - 802d778: 605a str r2, [r3, #4] + 802d7f8: 697b ldr r3, [r7, #20] + 802d7fa: 69ba ldr r2, [r7, #24] + 802d7fc: 605a str r2, [r3, #4] /* Clear EXTI line configuration */ temp = EXTI_CurrentCPU->IMR1; - 802d77a: 697b ldr r3, [r7, #20] - 802d77c: 681b ldr r3, [r3, #0] - 802d77e: 61bb str r3, [r7, #24] + 802d7fe: 697b ldr r3, [r7, #20] + 802d800: 681b ldr r3, [r3, #0] + 802d802: 61bb str r3, [r7, #24] temp &= ~(iocurrent); - 802d780: 693b ldr r3, [r7, #16] - 802d782: 43db mvns r3, r3 - 802d784: 69ba ldr r2, [r7, #24] - 802d786: 4013 ands r3, r2 - 802d788: 61bb str r3, [r7, #24] + 802d804: 693b ldr r3, [r7, #16] + 802d806: 43db mvns r3, r3 + 802d808: 69ba ldr r2, [r7, #24] + 802d80a: 4013 ands r3, r2 + 802d80c: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & EXTI_IT) != 0x00U) - 802d78a: 683b ldr r3, [r7, #0] - 802d78c: 685b ldr r3, [r3, #4] - 802d78e: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 802d792: 2b00 cmp r3, #0 - 802d794: d003 beq.n 802d79e + 802d80e: 683b ldr r3, [r7, #0] + 802d810: 685b ldr r3, [r3, #4] + 802d812: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 802d816: 2b00 cmp r3, #0 + 802d818: d003 beq.n 802d822 { temp |= iocurrent; - 802d796: 69ba ldr r2, [r7, #24] - 802d798: 693b ldr r3, [r7, #16] - 802d79a: 4313 orrs r3, r2 - 802d79c: 61bb str r3, [r7, #24] + 802d81a: 69ba ldr r2, [r7, #24] + 802d81c: 693b ldr r3, [r7, #16] + 802d81e: 4313 orrs r3, r2 + 802d820: 61bb str r3, [r7, #24] } EXTI_CurrentCPU->IMR1 = temp; - 802d79e: 697b ldr r3, [r7, #20] - 802d7a0: 69ba ldr r2, [r7, #24] - 802d7a2: 601a str r2, [r3, #0] + 802d822: 697b ldr r3, [r7, #20] + 802d824: 69ba ldr r2, [r7, #24] + 802d826: 601a str r2, [r3, #0] } } position++; - 802d7a4: 69fb ldr r3, [r7, #28] - 802d7a6: 3301 adds r3, #1 - 802d7a8: 61fb str r3, [r7, #28] + 802d828: 69fb ldr r3, [r7, #28] + 802d82a: 3301 adds r3, #1 + 802d82c: 61fb str r3, [r7, #28] while (((GPIO_Init->Pin) >> position) != 0x00U) - 802d7aa: 683b ldr r3, [r7, #0] - 802d7ac: 681a ldr r2, [r3, #0] - 802d7ae: 69fb ldr r3, [r7, #28] - 802d7b0: fa22 f303 lsr.w r3, r2, r3 - 802d7b4: 2b00 cmp r3, #0 - 802d7b6: f47f ae63 bne.w 802d480 - } -} - 802d7ba: bf00 nop - 802d7bc: bf00 nop - 802d7be: 3724 adds r7, #36 ; 0x24 - 802d7c0: 46bd mov sp, r7 - 802d7c2: f85d 7b04 ldr.w r7, [sp], #4 - 802d7c6: 4770 bx lr - 802d7c8: 58000400 .word 0x58000400 - -0802d7cc : + 802d82e: 683b ldr r3, [r7, #0] + 802d830: 681a ldr r2, [r3, #0] + 802d832: 69fb ldr r3, [r7, #28] + 802d834: fa22 f303 lsr.w r3, r2, r3 + 802d838: 2b00 cmp r3, #0 + 802d83a: f47f ae63 bne.w 802d504 + } +} + 802d83e: bf00 nop + 802d840: bf00 nop + 802d842: 3724 adds r7, #36 ; 0x24 + 802d844: 46bd mov sp, r7 + 802d846: f85d 7b04 ldr.w r7, [sp], #4 + 802d84a: 4770 bx lr + 802d84c: 58000400 .word 0x58000400 + +0802d850 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 802d7cc: b480 push {r7} - 802d7ce: b083 sub sp, #12 - 802d7d0: af00 add r7, sp, #0 - 802d7d2: 6078 str r0, [r7, #4] - 802d7d4: 460b mov r3, r1 - 802d7d6: 807b strh r3, [r7, #2] - 802d7d8: 4613 mov r3, r2 - 802d7da: 707b strb r3, [r7, #1] + 802d850: b480 push {r7} + 802d852: b083 sub sp, #12 + 802d854: af00 add r7, sp, #0 + 802d856: 6078 str r0, [r7, #4] + 802d858: 460b mov r3, r1 + 802d85a: 807b strh r3, [r7, #2] + 802d85c: 4613 mov r3, r2 + 802d85e: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 802d7dc: 787b ldrb r3, [r7, #1] - 802d7de: 2b00 cmp r3, #0 - 802d7e0: d003 beq.n 802d7ea + 802d860: 787b ldrb r3, [r7, #1] + 802d862: 2b00 cmp r3, #0 + 802d864: d003 beq.n 802d86e { GPIOx->BSRR = GPIO_Pin; - 802d7e2: 887a ldrh r2, [r7, #2] - 802d7e4: 687b ldr r3, [r7, #4] - 802d7e6: 619a str r2, [r3, #24] + 802d866: 887a ldrh r2, [r7, #2] + 802d868: 687b ldr r3, [r7, #4] + 802d86a: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER; } } - 802d7e8: e003 b.n 802d7f2 + 802d86c: e003 b.n 802d876 GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER; - 802d7ea: 887b ldrh r3, [r7, #2] - 802d7ec: 041a lsls r2, r3, #16 - 802d7ee: 687b ldr r3, [r7, #4] - 802d7f0: 619a str r2, [r3, #24] -} - 802d7f2: bf00 nop - 802d7f4: 370c adds r7, #12 - 802d7f6: 46bd mov sp, r7 - 802d7f8: f85d 7b04 ldr.w r7, [sp], #4 - 802d7fc: 4770 bx lr - -0802d7fe : + 802d86e: 887b ldrh r3, [r7, #2] + 802d870: 041a lsls r2, r3, #16 + 802d872: 687b ldr r3, [r7, #4] + 802d874: 619a str r2, [r3, #24] +} + 802d876: bf00 nop + 802d878: 370c adds r7, #12 + 802d87a: 46bd mov sp, r7 + 802d87c: f85d 7b04 ldr.w r7, [sp], #4 + 802d880: 4770 bx lr + +0802d882 : * @param GPIOx: Where x can be (A..K) to select the GPIO peripheral. * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 802d7fe: b480 push {r7} - 802d800: b085 sub sp, #20 - 802d802: af00 add r7, sp, #0 - 802d804: 6078 str r0, [r7, #4] - 802d806: 460b mov r3, r1 - 802d808: 807b strh r3, [r7, #2] + 802d882: b480 push {r7} + 802d884: b085 sub sp, #20 + 802d886: af00 add r7, sp, #0 + 802d888: 6078 str r0, [r7, #4] + 802d88a: 460b mov r3, r1 + 802d88c: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; - 802d80a: 687b ldr r3, [r7, #4] - 802d80c: 695b ldr r3, [r3, #20] - 802d80e: 60fb str r3, [r7, #12] + 802d88e: 687b ldr r3, [r7, #4] + 802d890: 695b ldr r3, [r3, #20] + 802d892: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); - 802d810: 887a ldrh r2, [r7, #2] - 802d812: 68fb ldr r3, [r7, #12] - 802d814: 4013 ands r3, r2 - 802d816: 041a lsls r2, r3, #16 - 802d818: 68fb ldr r3, [r7, #12] - 802d81a: 43d9 mvns r1, r3 - 802d81c: 887b ldrh r3, [r7, #2] - 802d81e: 400b ands r3, r1 - 802d820: 431a orrs r2, r3 - 802d822: 687b ldr r3, [r7, #4] - 802d824: 619a str r2, [r3, #24] -} - 802d826: bf00 nop - 802d828: 3714 adds r7, #20 - 802d82a: 46bd mov sp, r7 - 802d82c: f85d 7b04 ldr.w r7, [sp], #4 - 802d830: 4770 bx lr + 802d894: 887a ldrh r2, [r7, #2] + 802d896: 68fb ldr r3, [r7, #12] + 802d898: 4013 ands r3, r2 + 802d89a: 041a lsls r2, r3, #16 + 802d89c: 68fb ldr r3, [r7, #12] + 802d89e: 43d9 mvns r1, r3 + 802d8a0: 887b ldrh r3, [r7, #2] + 802d8a2: 400b ands r3, r1 + 802d8a4: 431a orrs r2, r3 + 802d8a6: 687b ldr r3, [r7, #4] + 802d8a8: 619a str r2, [r3, #24] +} + 802d8aa: bf00 nop + 802d8ac: 3714 adds r7, #20 + 802d8ae: 46bd mov sp, r7 + 802d8b0: f85d 7b04 ldr.w r7, [sp], #4 + 802d8b4: 4770 bx lr ... -0802d834 : +0802d8b8 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { - 802d834: b580 push {r7, lr} - 802d836: b082 sub sp, #8 - 802d838: af00 add r7, sp, #0 - 802d83a: 6078 str r0, [r7, #4] + 802d8b8: b580 push {r7, lr} + 802d8ba: b082 sub sp, #8 + 802d8bc: af00 add r7, sp, #0 + 802d8be: 6078 str r0, [r7, #4] /* Check the I2C handle allocation */ if (hi2c == NULL) - 802d83c: 687b ldr r3, [r7, #4] - 802d83e: 2b00 cmp r3, #0 - 802d840: d101 bne.n 802d846 + 802d8c0: 687b ldr r3, [r7, #4] + 802d8c2: 2b00 cmp r3, #0 + 802d8c4: d101 bne.n 802d8ca { return HAL_ERROR; - 802d842: 2301 movs r3, #1 - 802d844: e07f b.n 802d946 + 802d8c6: 2301 movs r3, #1 + 802d8c8: e07f b.n 802d9ca assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) - 802d846: 687b ldr r3, [r7, #4] - 802d848: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802d84c: b2db uxtb r3, r3 - 802d84e: 2b00 cmp r3, #0 - 802d850: d106 bne.n 802d860 + 802d8ca: 687b ldr r3, [r7, #4] + 802d8cc: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802d8d0: b2db uxtb r3, r3 + 802d8d2: 2b00 cmp r3, #0 + 802d8d4: d106 bne.n 802d8e4 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; - 802d852: 687b ldr r3, [r7, #4] - 802d854: 2200 movs r2, #0 - 802d856: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802d8d6: 687b ldr r3, [r7, #4] + 802d8d8: 2200 movs r2, #0 + 802d8da: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ HAL_I2C_MspInit(hi2c); - 802d85a: 6878 ldr r0, [r7, #4] - 802d85c: f7f6 f9a8 bl 8023bb0 + 802d8de: 6878 ldr r0, [r7, #4] + 802d8e0: f7f6 f966 bl 8023bb0 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; - 802d860: 687b ldr r3, [r7, #4] - 802d862: 2224 movs r2, #36 ; 0x24 - 802d864: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802d8e4: 687b ldr r3, [r7, #4] + 802d8e6: 2224 movs r2, #36 ; 0x24 + 802d8e8: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 802d868: 687b ldr r3, [r7, #4] - 802d86a: 681b ldr r3, [r3, #0] - 802d86c: 681a ldr r2, [r3, #0] - 802d86e: 687b ldr r3, [r7, #4] - 802d870: 681b ldr r3, [r3, #0] - 802d872: f022 0201 bic.w r2, r2, #1 - 802d876: 601a str r2, [r3, #0] + 802d8ec: 687b ldr r3, [r7, #4] + 802d8ee: 681b ldr r3, [r3, #0] + 802d8f0: 681a ldr r2, [r3, #0] + 802d8f2: 687b ldr r3, [r7, #4] + 802d8f4: 681b ldr r3, [r3, #0] + 802d8f6: f022 0201 bic.w r2, r2, #1 + 802d8fa: 601a str r2, [r3, #0] /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; - 802d878: 687b ldr r3, [r7, #4] - 802d87a: 685a ldr r2, [r3, #4] - 802d87c: 687b ldr r3, [r7, #4] - 802d87e: 681b ldr r3, [r3, #0] - 802d880: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000 - 802d884: 611a str r2, [r3, #16] + 802d8fc: 687b ldr r3, [r7, #4] + 802d8fe: 685a ldr r2, [r3, #4] + 802d900: 687b ldr r3, [r7, #4] + 802d902: 681b ldr r3, [r3, #0] + 802d904: f022 6270 bic.w r2, r2, #251658240 ; 0xf000000 + 802d908: 611a str r2, [r3, #16] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Disable Own Address1 before set the Own Address1 configuration */ hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; - 802d886: 687b ldr r3, [r7, #4] - 802d888: 681b ldr r3, [r3, #0] - 802d88a: 689a ldr r2, [r3, #8] - 802d88c: 687b ldr r3, [r7, #4] - 802d88e: 681b ldr r3, [r3, #0] - 802d890: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802d894: 609a str r2, [r3, #8] + 802d90a: 687b ldr r3, [r7, #4] + 802d90c: 681b ldr r3, [r3, #0] + 802d90e: 689a ldr r2, [r3, #8] + 802d910: 687b ldr r3, [r7, #4] + 802d912: 681b ldr r3, [r3, #0] + 802d914: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802d918: 609a str r2, [r3, #8] /* Configure I2Cx: Own Address1 and ack own address1 mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 802d896: 687b ldr r3, [r7, #4] - 802d898: 68db ldr r3, [r3, #12] - 802d89a: 2b01 cmp r3, #1 - 802d89c: d107 bne.n 802d8ae + 802d91a: 687b ldr r3, [r7, #4] + 802d91c: 68db ldr r3, [r3, #12] + 802d91e: 2b01 cmp r3, #1 + 802d920: d107 bne.n 802d932 { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); - 802d89e: 687b ldr r3, [r7, #4] - 802d8a0: 689a ldr r2, [r3, #8] - 802d8a2: 687b ldr r3, [r7, #4] - 802d8a4: 681b ldr r3, [r3, #0] - 802d8a6: f442 4200 orr.w r2, r2, #32768 ; 0x8000 - 802d8aa: 609a str r2, [r3, #8] - 802d8ac: e006 b.n 802d8bc + 802d922: 687b ldr r3, [r7, #4] + 802d924: 689a ldr r2, [r3, #8] + 802d926: 687b ldr r3, [r7, #4] + 802d928: 681b ldr r3, [r3, #0] + 802d92a: f442 4200 orr.w r2, r2, #32768 ; 0x8000 + 802d92e: 609a str r2, [r3, #8] + 802d930: e006 b.n 802d940 } else /* I2C_ADDRESSINGMODE_10BIT */ { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); - 802d8ae: 687b ldr r3, [r7, #4] - 802d8b0: 689a ldr r2, [r3, #8] - 802d8b2: 687b ldr r3, [r7, #4] - 802d8b4: 681b ldr r3, [r3, #0] - 802d8b6: f442 4204 orr.w r2, r2, #33792 ; 0x8400 - 802d8ba: 609a str r2, [r3, #8] + 802d932: 687b ldr r3, [r7, #4] + 802d934: 689a ldr r2, [r3, #8] + 802d936: 687b ldr r3, [r7, #4] + 802d938: 681b ldr r3, [r3, #0] + 802d93a: f442 4204 orr.w r2, r2, #33792 ; 0x8400 + 802d93e: 609a str r2, [r3, #8] } /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - 802d8bc: 687b ldr r3, [r7, #4] - 802d8be: 68db ldr r3, [r3, #12] - 802d8c0: 2b02 cmp r3, #2 - 802d8c2: d104 bne.n 802d8ce + 802d940: 687b ldr r3, [r7, #4] + 802d942: 68db ldr r3, [r3, #12] + 802d944: 2b02 cmp r3, #2 + 802d946: d104 bne.n 802d952 { hi2c->Instance->CR2 = (I2C_CR2_ADD10); - 802d8c4: 687b ldr r3, [r7, #4] - 802d8c6: 681b ldr r3, [r3, #0] - 802d8c8: f44f 6200 mov.w r2, #2048 ; 0x800 - 802d8cc: 605a str r2, [r3, #4] + 802d948: 687b ldr r3, [r7, #4] + 802d94a: 681b ldr r3, [r3, #0] + 802d94c: f44f 6200 mov.w r2, #2048 ; 0x800 + 802d950: 605a str r2, [r3, #4] } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); - 802d8ce: 687b ldr r3, [r7, #4] - 802d8d0: 681b ldr r3, [r3, #0] - 802d8d2: 6859 ldr r1, [r3, #4] - 802d8d4: 687b ldr r3, [r7, #4] - 802d8d6: 681a ldr r2, [r3, #0] - 802d8d8: 4b1d ldr r3, [pc, #116] ; (802d950 ) - 802d8da: 430b orrs r3, r1 - 802d8dc: 6053 str r3, [r2, #4] + 802d952: 687b ldr r3, [r7, #4] + 802d954: 681b ldr r3, [r3, #0] + 802d956: 6859 ldr r1, [r3, #4] + 802d958: 687b ldr r3, [r7, #4] + 802d95a: 681a ldr r2, [r3, #0] + 802d95c: 4b1d ldr r3, [pc, #116] ; (802d9d4 ) + 802d95e: 430b orrs r3, r1 + 802d960: 6053 str r3, [r2, #4] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Disable Own Address2 before set the Own Address2 configuration */ hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; - 802d8de: 687b ldr r3, [r7, #4] - 802d8e0: 681b ldr r3, [r3, #0] - 802d8e2: 68da ldr r2, [r3, #12] - 802d8e4: 687b ldr r3, [r7, #4] - 802d8e6: 681b ldr r3, [r3, #0] - 802d8e8: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802d8ec: 60da str r2, [r3, #12] + 802d962: 687b ldr r3, [r7, #4] + 802d964: 681b ldr r3, [r3, #0] + 802d966: 68da ldr r2, [r3, #12] + 802d968: 687b ldr r3, [r7, #4] + 802d96a: 681b ldr r3, [r3, #0] + 802d96c: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802d970: 60da str r2, [r3, #12] /* Configure I2Cx: Dual mode and Own Address2 */ hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ - 802d8ee: 687b ldr r3, [r7, #4] - 802d8f0: 691a ldr r2, [r3, #16] - 802d8f2: 687b ldr r3, [r7, #4] - 802d8f4: 695b ldr r3, [r3, #20] - 802d8f6: ea42 0103 orr.w r1, r2, r3 + 802d972: 687b ldr r3, [r7, #4] + 802d974: 691a ldr r2, [r3, #16] + 802d976: 687b ldr r3, [r7, #4] + 802d978: 695b ldr r3, [r3, #20] + 802d97a: ea42 0103 orr.w r1, r2, r3 (hi2c->Init.OwnAddress2Masks << 8)); - 802d8fa: 687b ldr r3, [r7, #4] - 802d8fc: 699b ldr r3, [r3, #24] - 802d8fe: 021a lsls r2, r3, #8 + 802d97e: 687b ldr r3, [r7, #4] + 802d980: 699b ldr r3, [r3, #24] + 802d982: 021a lsls r2, r3, #8 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ - 802d900: 687b ldr r3, [r7, #4] - 802d902: 681b ldr r3, [r3, #0] - 802d904: 430a orrs r2, r1 - 802d906: 60da str r2, [r3, #12] + 802d984: 687b ldr r3, [r7, #4] + 802d986: 681b ldr r3, [r3, #0] + 802d988: 430a orrs r2, r1 + 802d98a: 60da str r2, [r3, #12] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); - 802d908: 687b ldr r3, [r7, #4] - 802d90a: 69d9 ldr r1, [r3, #28] - 802d90c: 687b ldr r3, [r7, #4] - 802d90e: 6a1a ldr r2, [r3, #32] - 802d910: 687b ldr r3, [r7, #4] - 802d912: 681b ldr r3, [r3, #0] - 802d914: 430a orrs r2, r1 - 802d916: 601a str r2, [r3, #0] + 802d98c: 687b ldr r3, [r7, #4] + 802d98e: 69d9 ldr r1, [r3, #28] + 802d990: 687b ldr r3, [r7, #4] + 802d992: 6a1a ldr r2, [r3, #32] + 802d994: 687b ldr r3, [r7, #4] + 802d996: 681b ldr r3, [r3, #0] + 802d998: 430a orrs r2, r1 + 802d99a: 601a str r2, [r3, #0] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 802d918: 687b ldr r3, [r7, #4] - 802d91a: 681b ldr r3, [r3, #0] - 802d91c: 681a ldr r2, [r3, #0] - 802d91e: 687b ldr r3, [r7, #4] - 802d920: 681b ldr r3, [r3, #0] - 802d922: f042 0201 orr.w r2, r2, #1 - 802d926: 601a str r2, [r3, #0] + 802d99c: 687b ldr r3, [r7, #4] + 802d99e: 681b ldr r3, [r3, #0] + 802d9a0: 681a ldr r2, [r3, #0] + 802d9a2: 687b ldr r3, [r7, #4] + 802d9a4: 681b ldr r3, [r3, #0] + 802d9a6: f042 0201 orr.w r2, r2, #1 + 802d9aa: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 802d928: 687b ldr r3, [r7, #4] - 802d92a: 2200 movs r2, #0 - 802d92c: 645a str r2, [r3, #68] ; 0x44 + 802d9ac: 687b ldr r3, [r7, #4] + 802d9ae: 2200 movs r2, #0 + 802d9b0: 645a str r2, [r3, #68] ; 0x44 hi2c->State = HAL_I2C_STATE_READY; - 802d92e: 687b ldr r3, [r7, #4] - 802d930: 2220 movs r2, #32 - 802d932: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802d9b2: 687b ldr r3, [r7, #4] + 802d9b4: 2220 movs r2, #32 + 802d9b6: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802d936: 687b ldr r3, [r7, #4] - 802d938: 2200 movs r2, #0 - 802d93a: 631a str r2, [r3, #48] ; 0x30 + 802d9ba: 687b ldr r3, [r7, #4] + 802d9bc: 2200 movs r2, #0 + 802d9be: 631a str r2, [r3, #48] ; 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; - 802d93c: 687b ldr r3, [r7, #4] - 802d93e: 2200 movs r2, #0 - 802d940: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802d9c0: 687b ldr r3, [r7, #4] + 802d9c2: 2200 movs r2, #0 + 802d9c4: f883 2042 strb.w r2, [r3, #66] ; 0x42 return HAL_OK; - 802d944: 2300 movs r3, #0 + 802d9c8: 2300 movs r3, #0 } - 802d946: 4618 mov r0, r3 - 802d948: 3708 adds r7, #8 - 802d94a: 46bd mov sp, r7 - 802d94c: bd80 pop {r7, pc} - 802d94e: bf00 nop - 802d950: 02008000 .word 0x02008000 + 802d9ca: 4618 mov r0, r3 + 802d9cc: 3708 adds r7, #8 + 802d9ce: 46bd mov sp, r7 + 802d9d0: bd80 pop {r7, pc} + 802d9d2: bf00 nop + 802d9d4: 02008000 .word 0x02008000 -0802d954 : +0802d9d8 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) { - 802d954: b580 push {r7, lr} - 802d956: b084 sub sp, #16 - 802d958: af00 add r7, sp, #0 - 802d95a: 6078 str r0, [r7, #4] + 802d9d8: b580 push {r7, lr} + 802d9da: b084 sub sp, #16 + 802d9dc: af00 add r7, sp, #0 + 802d9de: 6078 str r0, [r7, #4] /* Get current IT Flags and IT sources value */ uint32_t itflags = READ_REG(hi2c->Instance->ISR); - 802d95c: 687b ldr r3, [r7, #4] - 802d95e: 681b ldr r3, [r3, #0] - 802d960: 699b ldr r3, [r3, #24] - 802d962: 60fb str r3, [r7, #12] + 802d9e0: 687b ldr r3, [r7, #4] + 802d9e2: 681b ldr r3, [r3, #0] + 802d9e4: 699b ldr r3, [r3, #24] + 802d9e6: 60fb str r3, [r7, #12] uint32_t itsources = READ_REG(hi2c->Instance->CR1); - 802d964: 687b ldr r3, [r7, #4] - 802d966: 681b ldr r3, [r3, #0] - 802d968: 681b ldr r3, [r3, #0] - 802d96a: 60bb str r3, [r7, #8] + 802d9e8: 687b ldr r3, [r7, #4] + 802d9ea: 681b ldr r3, [r3, #0] + 802d9ec: 681b ldr r3, [r3, #0] + 802d9ee: 60bb str r3, [r7, #8] /* I2C events treatment -------------------------------------*/ if (hi2c->XferISR != NULL) - 802d96c: 687b ldr r3, [r7, #4] - 802d96e: 6b5b ldr r3, [r3, #52] ; 0x34 - 802d970: 2b00 cmp r3, #0 - 802d972: d005 beq.n 802d980 + 802d9f0: 687b ldr r3, [r7, #4] + 802d9f2: 6b5b ldr r3, [r3, #52] ; 0x34 + 802d9f4: 2b00 cmp r3, #0 + 802d9f6: d005 beq.n 802da04 { hi2c->XferISR(hi2c, itflags, itsources); - 802d974: 687b ldr r3, [r7, #4] - 802d976: 6b5b ldr r3, [r3, #52] ; 0x34 - 802d978: 68ba ldr r2, [r7, #8] - 802d97a: 68f9 ldr r1, [r7, #12] - 802d97c: 6878 ldr r0, [r7, #4] - 802d97e: 4798 blx r3 + 802d9f8: 687b ldr r3, [r7, #4] + 802d9fa: 6b5b ldr r3, [r3, #52] ; 0x34 + 802d9fc: 68ba ldr r2, [r7, #8] + 802d9fe: 68f9 ldr r1, [r7, #12] + 802da00: 6878 ldr r0, [r7, #4] + 802da02: 4798 blx r3 } } - 802d980: bf00 nop - 802d982: 3710 adds r7, #16 - 802d984: 46bd mov sp, r7 - 802d986: bd80 pop {r7, pc} + 802da04: bf00 nop + 802da06: 3710 adds r7, #16 + 802da08: 46bd mov sp, r7 + 802da0a: bd80 pop {r7, pc} -0802d988 : +0802da0c : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) { - 802d988: b580 push {r7, lr} - 802d98a: b086 sub sp, #24 - 802d98c: af00 add r7, sp, #0 - 802d98e: 6078 str r0, [r7, #4] + 802da0c: b580 push {r7, lr} + 802da0e: b086 sub sp, #24 + 802da10: af00 add r7, sp, #0 + 802da12: 6078 str r0, [r7, #4] uint32_t itflags = READ_REG(hi2c->Instance->ISR); - 802d990: 687b ldr r3, [r7, #4] - 802d992: 681b ldr r3, [r3, #0] - 802d994: 699b ldr r3, [r3, #24] - 802d996: 617b str r3, [r7, #20] + 802da14: 687b ldr r3, [r7, #4] + 802da16: 681b ldr r3, [r3, #0] + 802da18: 699b ldr r3, [r3, #24] + 802da1a: 617b str r3, [r7, #20] uint32_t itsources = READ_REG(hi2c->Instance->CR1); - 802d998: 687b ldr r3, [r7, #4] - 802d99a: 681b ldr r3, [r3, #0] - 802d99c: 681b ldr r3, [r3, #0] - 802d99e: 613b str r3, [r7, #16] + 802da1c: 687b ldr r3, [r7, #4] + 802da1e: 681b ldr r3, [r3, #0] + 802da20: 681b ldr r3, [r3, #0] + 802da22: 613b str r3, [r7, #16] uint32_t tmperror; /* I2C Bus error interrupt occurred ------------------------------------*/ if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ - 802d9a0: 697b ldr r3, [r7, #20] - 802d9a2: 0a1b lsrs r3, r3, #8 - 802d9a4: f003 0301 and.w r3, r3, #1 - 802d9a8: 2b00 cmp r3, #0 - 802d9aa: d010 beq.n 802d9ce + 802da24: 697b ldr r3, [r7, #20] + 802da26: 0a1b lsrs r3, r3, #8 + 802da28: f003 0301 and.w r3, r3, #1 + 802da2c: 2b00 cmp r3, #0 + 802da2e: d010 beq.n 802da52 (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) - 802d9ac: 693b ldr r3, [r7, #16] - 802d9ae: 09db lsrs r3, r3, #7 - 802d9b0: f003 0301 and.w r3, r3, #1 + 802da30: 693b ldr r3, [r7, #16] + 802da32: 09db lsrs r3, r3, #7 + 802da34: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ - 802d9b4: 2b00 cmp r3, #0 - 802d9b6: d00a beq.n 802d9ce + 802da38: 2b00 cmp r3, #0 + 802da3a: d00a beq.n 802da52 { hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; - 802d9b8: 687b ldr r3, [r7, #4] - 802d9ba: 6c5b ldr r3, [r3, #68] ; 0x44 - 802d9bc: f043 0201 orr.w r2, r3, #1 - 802d9c0: 687b ldr r3, [r7, #4] - 802d9c2: 645a str r2, [r3, #68] ; 0x44 + 802da3c: 687b ldr r3, [r7, #4] + 802da3e: 6c5b ldr r3, [r3, #68] ; 0x44 + 802da40: f043 0201 orr.w r2, r3, #1 + 802da44: 687b ldr r3, [r7, #4] + 802da46: 645a str r2, [r3, #68] ; 0x44 /* Clear BERR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); - 802d9c4: 687b ldr r3, [r7, #4] - 802d9c6: 681b ldr r3, [r3, #0] - 802d9c8: f44f 7280 mov.w r2, #256 ; 0x100 - 802d9cc: 61da str r2, [r3, #28] + 802da48: 687b ldr r3, [r7, #4] + 802da4a: 681b ldr r3, [r3, #0] + 802da4c: f44f 7280 mov.w r2, #256 ; 0x100 + 802da50: 61da str r2, [r3, #28] } /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ - 802d9ce: 697b ldr r3, [r7, #20] - 802d9d0: 0a9b lsrs r3, r3, #10 - 802d9d2: f003 0301 and.w r3, r3, #1 - 802d9d6: 2b00 cmp r3, #0 - 802d9d8: d010 beq.n 802d9fc + 802da52: 697b ldr r3, [r7, #20] + 802da54: 0a9b lsrs r3, r3, #10 + 802da56: f003 0301 and.w r3, r3, #1 + 802da5a: 2b00 cmp r3, #0 + 802da5c: d010 beq.n 802da80 (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) - 802d9da: 693b ldr r3, [r7, #16] - 802d9dc: 09db lsrs r3, r3, #7 - 802d9de: f003 0301 and.w r3, r3, #1 + 802da5e: 693b ldr r3, [r7, #16] + 802da60: 09db lsrs r3, r3, #7 + 802da62: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ - 802d9e2: 2b00 cmp r3, #0 - 802d9e4: d00a beq.n 802d9fc + 802da66: 2b00 cmp r3, #0 + 802da68: d00a beq.n 802da80 { hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; - 802d9e6: 687b ldr r3, [r7, #4] - 802d9e8: 6c5b ldr r3, [r3, #68] ; 0x44 - 802d9ea: f043 0208 orr.w r2, r3, #8 - 802d9ee: 687b ldr r3, [r7, #4] - 802d9f0: 645a str r2, [r3, #68] ; 0x44 + 802da6a: 687b ldr r3, [r7, #4] + 802da6c: 6c5b ldr r3, [r3, #68] ; 0x44 + 802da6e: f043 0208 orr.w r2, r3, #8 + 802da72: 687b ldr r3, [r7, #4] + 802da74: 645a str r2, [r3, #68] ; 0x44 /* Clear OVR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); - 802d9f2: 687b ldr r3, [r7, #4] - 802d9f4: 681b ldr r3, [r3, #0] - 802d9f6: f44f 6280 mov.w r2, #1024 ; 0x400 - 802d9fa: 61da str r2, [r3, #28] + 802da76: 687b ldr r3, [r7, #4] + 802da78: 681b ldr r3, [r3, #0] + 802da7a: f44f 6280 mov.w r2, #1024 ; 0x400 + 802da7e: 61da str r2, [r3, #28] } /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ - 802d9fc: 697b ldr r3, [r7, #20] - 802d9fe: 0a5b lsrs r3, r3, #9 - 802da00: f003 0301 and.w r3, r3, #1 - 802da04: 2b00 cmp r3, #0 - 802da06: d010 beq.n 802da2a + 802da80: 697b ldr r3, [r7, #20] + 802da82: 0a5b lsrs r3, r3, #9 + 802da84: f003 0301 and.w r3, r3, #1 + 802da88: 2b00 cmp r3, #0 + 802da8a: d010 beq.n 802daae (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) - 802da08: 693b ldr r3, [r7, #16] - 802da0a: 09db lsrs r3, r3, #7 - 802da0c: f003 0301 and.w r3, r3, #1 + 802da8c: 693b ldr r3, [r7, #16] + 802da8e: 09db lsrs r3, r3, #7 + 802da90: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ - 802da10: 2b00 cmp r3, #0 - 802da12: d00a beq.n 802da2a + 802da94: 2b00 cmp r3, #0 + 802da96: d00a beq.n 802daae { hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; - 802da14: 687b ldr r3, [r7, #4] - 802da16: 6c5b ldr r3, [r3, #68] ; 0x44 - 802da18: f043 0202 orr.w r2, r3, #2 - 802da1c: 687b ldr r3, [r7, #4] - 802da1e: 645a str r2, [r3, #68] ; 0x44 + 802da98: 687b ldr r3, [r7, #4] + 802da9a: 6c5b ldr r3, [r3, #68] ; 0x44 + 802da9c: f043 0202 orr.w r2, r3, #2 + 802daa0: 687b ldr r3, [r7, #4] + 802daa2: 645a str r2, [r3, #68] ; 0x44 /* Clear ARLO flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); - 802da20: 687b ldr r3, [r7, #4] - 802da22: 681b ldr r3, [r3, #0] - 802da24: f44f 7200 mov.w r2, #512 ; 0x200 - 802da28: 61da str r2, [r3, #28] + 802daa4: 687b ldr r3, [r7, #4] + 802daa6: 681b ldr r3, [r3, #0] + 802daa8: f44f 7200 mov.w r2, #512 ; 0x200 + 802daac: 61da str r2, [r3, #28] } /* Store current volatile hi2c->ErrorCode, misra rule */ tmperror = hi2c->ErrorCode; - 802da2a: 687b ldr r3, [r7, #4] - 802da2c: 6c5b ldr r3, [r3, #68] ; 0x44 - 802da2e: 60fb str r3, [r7, #12] + 802daae: 687b ldr r3, [r7, #4] + 802dab0: 6c5b ldr r3, [r3, #68] ; 0x44 + 802dab2: 60fb str r3, [r7, #12] /* Call the Error Callback in case of Error detected */ if ((tmperror & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_NONE) - 802da30: 68fb ldr r3, [r7, #12] - 802da32: f003 030b and.w r3, r3, #11 - 802da36: 2b00 cmp r3, #0 - 802da38: d003 beq.n 802da42 + 802dab4: 68fb ldr r3, [r7, #12] + 802dab6: f003 030b and.w r3, r3, #11 + 802daba: 2b00 cmp r3, #0 + 802dabc: d003 beq.n 802dac6 { I2C_ITError(hi2c, tmperror); - 802da3a: 68f9 ldr r1, [r7, #12] - 802da3c: 6878 ldr r0, [r7, #4] - 802da3e: f000 fc77 bl 802e330 + 802dabe: 68f9 ldr r1, [r7, #12] + 802dac0: 6878 ldr r0, [r7, #4] + 802dac2: f000 fc77 bl 802e3b4 } } - 802da42: bf00 nop - 802da44: 3718 adds r7, #24 - 802da46: 46bd mov sp, r7 - 802da48: bd80 pop {r7, pc} + 802dac6: bf00 nop + 802dac8: 3718 adds r7, #24 + 802daca: 46bd mov sp, r7 + 802dacc: bd80 pop {r7, pc} -0802da4a : +0802dace : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) { - 802da4a: b480 push {r7} - 802da4c: b083 sub sp, #12 - 802da4e: af00 add r7, sp, #0 - 802da50: 6078 str r0, [r7, #4] + 802dace: b480 push {r7} + 802dad0: b083 sub sp, #12 + 802dad2: af00 add r7, sp, #0 + 802dad4: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file */ } - 802da52: bf00 nop - 802da54: 370c adds r7, #12 - 802da56: 46bd mov sp, r7 - 802da58: f85d 7b04 ldr.w r7, [sp], #4 - 802da5c: 4770 bx lr + 802dad6: bf00 nop + 802dad8: 370c adds r7, #12 + 802dada: 46bd mov sp, r7 + 802dadc: f85d 7b04 ldr.w r7, [sp], #4 + 802dae0: 4770 bx lr -0802da5e : +0802dae2 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) { - 802da5e: b480 push {r7} - 802da60: b083 sub sp, #12 - 802da62: af00 add r7, sp, #0 - 802da64: 6078 str r0, [r7, #4] + 802dae2: b480 push {r7} + 802dae4: b083 sub sp, #12 + 802dae6: af00 add r7, sp, #0 + 802dae8: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file */ } - 802da66: bf00 nop - 802da68: 370c adds r7, #12 - 802da6a: 46bd mov sp, r7 - 802da6c: f85d 7b04 ldr.w r7, [sp], #4 - 802da70: 4770 bx lr + 802daea: bf00 nop + 802daec: 370c adds r7, #12 + 802daee: 46bd mov sp, r7 + 802daf0: f85d 7b04 ldr.w r7, [sp], #4 + 802daf4: 4770 bx lr -0802da72 : +0802daf6 : * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFERDIRECTION * @param AddrMatchCode Address Match Code * @retval None */ __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) { - 802da72: b480 push {r7} - 802da74: b083 sub sp, #12 - 802da76: af00 add r7, sp, #0 - 802da78: 6078 str r0, [r7, #4] - 802da7a: 460b mov r3, r1 - 802da7c: 70fb strb r3, [r7, #3] - 802da7e: 4613 mov r3, r2 - 802da80: 803b strh r3, [r7, #0] + 802daf6: b480 push {r7} + 802daf8: b083 sub sp, #12 + 802dafa: af00 add r7, sp, #0 + 802dafc: 6078 str r0, [r7, #4] + 802dafe: 460b mov r3, r1 + 802db00: 70fb strb r3, [r7, #3] + 802db02: 4613 mov r3, r2 + 802db04: 803b strh r3, [r7, #0] UNUSED(AddrMatchCode); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_AddrCallback() could be implemented in the user file */ } - 802da82: bf00 nop - 802da84: 370c adds r7, #12 - 802da86: 46bd mov sp, r7 - 802da88: f85d 7b04 ldr.w r7, [sp], #4 - 802da8c: 4770 bx lr + 802db06: bf00 nop + 802db08: 370c adds r7, #12 + 802db0a: 46bd mov sp, r7 + 802db0c: f85d 7b04 ldr.w r7, [sp], #4 + 802db10: 4770 bx lr -0802da8e : +0802db12 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) { - 802da8e: b480 push {r7} - 802da90: b083 sub sp, #12 - 802da92: af00 add r7, sp, #0 - 802da94: 6078 str r0, [r7, #4] + 802db12: b480 push {r7} + 802db14: b083 sub sp, #12 + 802db16: af00 add r7, sp, #0 + 802db18: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_ListenCpltCallback() could be implemented in the user file */ } - 802da96: bf00 nop - 802da98: 370c adds r7, #12 - 802da9a: 46bd mov sp, r7 - 802da9c: f85d 7b04 ldr.w r7, [sp], #4 - 802daa0: 4770 bx lr + 802db1a: bf00 nop + 802db1c: 370c adds r7, #12 + 802db1e: 46bd mov sp, r7 + 802db20: f85d 7b04 ldr.w r7, [sp], #4 + 802db24: 4770 bx lr -0802daa2 : +0802db26 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) { - 802daa2: b480 push {r7} - 802daa4: b083 sub sp, #12 - 802daa6: af00 add r7, sp, #0 - 802daa8: 6078 str r0, [r7, #4] + 802db26: b480 push {r7} + 802db28: b083 sub sp, #12 + 802db2a: af00 add r7, sp, #0 + 802db2c: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_ErrorCallback could be implemented in the user file */ } - 802daaa: bf00 nop - 802daac: 370c adds r7, #12 - 802daae: 46bd mov sp, r7 - 802dab0: f85d 7b04 ldr.w r7, [sp], #4 - 802dab4: 4770 bx lr + 802db2e: bf00 nop + 802db30: 370c adds r7, #12 + 802db32: 46bd mov sp, r7 + 802db34: f85d 7b04 ldr.w r7, [sp], #4 + 802db38: 4770 bx lr -0802dab6 : +0802db3a : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval None */ __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) { - 802dab6: b480 push {r7} - 802dab8: b083 sub sp, #12 - 802daba: af00 add r7, sp, #0 - 802dabc: 6078 str r0, [r7, #4] + 802db3a: b480 push {r7} + 802db3c: b083 sub sp, #12 + 802db3e: af00 add r7, sp, #0 + 802db40: 6078 str r0, [r7, #4] UNUSED(hi2c); /* NOTE : This function should not be modified, when the callback is needed, the HAL_I2C_AbortCpltCallback could be implemented in the user file */ } - 802dabe: bf00 nop - 802dac0: 370c adds r7, #12 - 802dac2: 46bd mov sp, r7 - 802dac4: f85d 7b04 ldr.w r7, [sp], #4 - 802dac8: 4770 bx lr + 802db42: bf00 nop + 802db44: 370c adds r7, #12 + 802db46: 46bd mov sp, r7 + 802db48: f85d 7b04 ldr.w r7, [sp], #4 + 802db4c: 4770 bx lr -0802daca : +0802db4e : * @param ITSources Interrupt sources enabled. * @retval HAL status */ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) { - 802daca: b580 push {r7, lr} - 802dacc: b086 sub sp, #24 - 802dace: af00 add r7, sp, #0 - 802dad0: 60f8 str r0, [r7, #12] - 802dad2: 60b9 str r1, [r7, #8] - 802dad4: 607a str r2, [r7, #4] + 802db4e: b580 push {r7, lr} + 802db50: b086 sub sp, #24 + 802db52: af00 add r7, sp, #0 + 802db54: 60f8 str r0, [r7, #12] + 802db56: 60b9 str r1, [r7, #8] + 802db58: 607a str r2, [r7, #4] uint32_t tmpoptions = hi2c->XferOptions; - 802dad6: 68fb ldr r3, [r7, #12] - 802dad8: 6adb ldr r3, [r3, #44] ; 0x2c - 802dada: 617b str r3, [r7, #20] + 802db5a: 68fb ldr r3, [r7, #12] + 802db5c: 6adb ldr r3, [r3, #44] ; 0x2c + 802db5e: 617b str r3, [r7, #20] uint32_t tmpITFlags = ITFlags; - 802dadc: 68bb ldr r3, [r7, #8] - 802dade: 613b str r3, [r7, #16] + 802db60: 68bb ldr r3, [r7, #8] + 802db62: 613b str r3, [r7, #16] /* Process locked */ __HAL_LOCK(hi2c); - 802dae0: 68fb ldr r3, [r7, #12] - 802dae2: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 802dae6: 2b01 cmp r3, #1 - 802dae8: d101 bne.n 802daee - 802daea: 2302 movs r3, #2 - 802daec: e0ec b.n 802dcc8 - 802daee: 68fb ldr r3, [r7, #12] - 802daf0: 2201 movs r2, #1 - 802daf2: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802db64: 68fb ldr r3, [r7, #12] + 802db66: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 + 802db6a: 2b01 cmp r3, #1 + 802db6c: d101 bne.n 802db72 + 802db6e: 2302 movs r3, #2 + 802db70: e0ec b.n 802dd4c + 802db72: 68fb ldr r3, [r7, #12] + 802db74: 2201 movs r2, #1 + 802db76: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Check if STOPF is set */ if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ - 802daf6: 693b ldr r3, [r7, #16] - 802daf8: 095b lsrs r3, r3, #5 - 802dafa: f003 0301 and.w r3, r3, #1 - 802dafe: 2b00 cmp r3, #0 - 802db00: d009 beq.n 802db16 + 802db7a: 693b ldr r3, [r7, #16] + 802db7c: 095b lsrs r3, r3, #5 + 802db7e: f003 0301 and.w r3, r3, #1 + 802db82: 2b00 cmp r3, #0 + 802db84: d009 beq.n 802db9a (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) - 802db02: 687b ldr r3, [r7, #4] - 802db04: 095b lsrs r3, r3, #5 - 802db06: f003 0301 and.w r3, r3, #1 + 802db86: 687b ldr r3, [r7, #4] + 802db88: 095b lsrs r3, r3, #5 + 802db8a: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ - 802db0a: 2b00 cmp r3, #0 - 802db0c: d003 beq.n 802db16 + 802db8e: 2b00 cmp r3, #0 + 802db90: d003 beq.n 802db9a { /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, tmpITFlags); - 802db0e: 6939 ldr r1, [r7, #16] - 802db10: 68f8 ldr r0, [r7, #12] - 802db12: f000 f9bf bl 802de94 + 802db92: 6939 ldr r1, [r7, #16] + 802db94: 68f8 ldr r0, [r7, #12] + 802db96: f000 f9bf bl 802df18 } if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - 802db16: 693b ldr r3, [r7, #16] - 802db18: 091b lsrs r3, r3, #4 - 802db1a: f003 0301 and.w r3, r3, #1 - 802db1e: 2b00 cmp r3, #0 - 802db20: d04d beq.n 802dbbe + 802db9a: 693b ldr r3, [r7, #16] + 802db9c: 091b lsrs r3, r3, #4 + 802db9e: f003 0301 and.w r3, r3, #1 + 802dba2: 2b00 cmp r3, #0 + 802dba4: d04d beq.n 802dc42 (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) - 802db22: 687b ldr r3, [r7, #4] - 802db24: 091b lsrs r3, r3, #4 - 802db26: f003 0301 and.w r3, r3, #1 + 802dba6: 687b ldr r3, [r7, #4] + 802dba8: 091b lsrs r3, r3, #4 + 802dbaa: f003 0301 and.w r3, r3, #1 if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - 802db2a: 2b00 cmp r3, #0 - 802db2c: d047 beq.n 802dbbe + 802dbae: 2b00 cmp r3, #0 + 802dbb0: d047 beq.n 802dc42 { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ /* Mean XferCount == 0*/ /* So clear Flag NACKF only */ if (hi2c->XferCount == 0U) - 802db2e: 68fb ldr r3, [r7, #12] - 802db30: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802db32: b29b uxth r3, r3 - 802db34: 2b00 cmp r3, #0 - 802db36: d128 bne.n 802db8a + 802dbb2: 68fb ldr r3, [r7, #12] + 802dbb4: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dbb6: b29b uxth r3, r3 + 802dbb8: 2b00 cmp r3, #0 + 802dbba: d128 bne.n 802dc0e { if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) - 802db38: 68fb ldr r3, [r7, #12] - 802db3a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802db3e: b2db uxtb r3, r3 - 802db40: 2b28 cmp r3, #40 ; 0x28 - 802db42: d108 bne.n 802db56 - 802db44: 697b ldr r3, [r7, #20] - 802db46: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 802db4a: d104 bne.n 802db56 + 802dbbc: 68fb ldr r3, [r7, #12] + 802dbbe: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802dbc2: b2db uxtb r3, r3 + 802dbc4: 2b28 cmp r3, #40 ; 0x28 + 802dbc6: d108 bne.n 802dbda + 802dbc8: 697b ldr r3, [r7, #20] + 802dbca: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 802dbce: d104 bne.n 802dbda /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */ { /* Call I2C Listen complete process */ I2C_ITListenCplt(hi2c, tmpITFlags); - 802db4c: 6939 ldr r1, [r7, #16] - 802db4e: 68f8 ldr r0, [r7, #12] - 802db50: f000 fb98 bl 802e284 - 802db54: e032 b.n 802dbbc + 802dbd0: 6939 ldr r1, [r7, #16] + 802dbd2: 68f8 ldr r0, [r7, #12] + 802dbd4: f000 fb98 bl 802e308 + 802dbd8: e032 b.n 802dc40 } else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME)) - 802db56: 68fb ldr r3, [r7, #12] - 802db58: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802db5c: b2db uxtb r3, r3 - 802db5e: 2b29 cmp r3, #41 ; 0x29 - 802db60: d10e bne.n 802db80 - 802db62: 697b ldr r3, [r7, #20] - 802db64: f513 3f80 cmn.w r3, #65536 ; 0x10000 - 802db68: d00a beq.n 802db80 + 802dbda: 68fb ldr r3, [r7, #12] + 802dbdc: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802dbe0: b2db uxtb r3, r3 + 802dbe2: 2b29 cmp r3, #41 ; 0x29 + 802dbe4: d10e bne.n 802dc04 + 802dbe6: 697b ldr r3, [r7, #20] + 802dbe8: f513 3f80 cmn.w r3, #65536 ; 0x10000 + 802dbec: d00a beq.n 802dc04 { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 802db6a: 68fb ldr r3, [r7, #12] - 802db6c: 681b ldr r3, [r3, #0] - 802db6e: 2210 movs r2, #16 - 802db70: 61da str r2, [r3, #28] + 802dbee: 68fb ldr r3, [r7, #12] + 802dbf0: 681b ldr r3, [r3, #0] + 802dbf2: 2210 movs r2, #16 + 802dbf4: 61da str r2, [r3, #28] /* Flush TX register */ I2C_Flush_TXDR(hi2c); - 802db72: 68f8 ldr r0, [r7, #12] - 802db74: f000 fcd3 bl 802e51e + 802dbf6: 68f8 ldr r0, [r7, #12] + 802dbf8: f000 fcd3 bl 802e5a2 /* Last Byte is Transmitted */ /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 802db78: 68f8 ldr r0, [r7, #12] - 802db7a: f000 f92d bl 802ddd8 - 802db7e: e01d b.n 802dbbc + 802dbfc: 68f8 ldr r0, [r7, #12] + 802dbfe: f000 f92d bl 802de5c + 802dc02: e01d b.n 802dc40 } else { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 802db80: 68fb ldr r3, [r7, #12] - 802db82: 681b ldr r3, [r3, #0] - 802db84: 2210 movs r2, #16 - 802db86: 61da str r2, [r3, #28] + 802dc04: 68fb ldr r3, [r7, #12] + 802dc06: 681b ldr r3, [r3, #0] + 802dc08: 2210 movs r2, #16 + 802dc0a: 61da str r2, [r3, #28] if (hi2c->XferCount == 0U) - 802db88: e096 b.n 802dcb8 + 802dc0c: e096 b.n 802dd3c } else { /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 802db8a: 68fb ldr r3, [r7, #12] - 802db8c: 681b ldr r3, [r3, #0] - 802db8e: 2210 movs r2, #16 - 802db90: 61da str r2, [r3, #28] + 802dc0e: 68fb ldr r3, [r7, #12] + 802dc10: 681b ldr r3, [r3, #0] + 802dc12: 2210 movs r2, #16 + 802dc14: 61da str r2, [r3, #28] /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 802db92: 68fb ldr r3, [r7, #12] - 802db94: 6c5b ldr r3, [r3, #68] ; 0x44 - 802db96: f043 0204 orr.w r2, r3, #4 - 802db9a: 68fb ldr r3, [r7, #12] - 802db9c: 645a str r2, [r3, #68] ; 0x44 + 802dc16: 68fb ldr r3, [r7, #12] + 802dc18: 6c5b ldr r3, [r3, #68] ; 0x44 + 802dc1a: f043 0204 orr.w r2, r3, #4 + 802dc1e: 68fb ldr r3, [r7, #12] + 802dc20: 645a str r2, [r3, #68] ; 0x44 if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) - 802db9e: 697b ldr r3, [r7, #20] - 802dba0: 2b00 cmp r3, #0 - 802dba2: d004 beq.n 802dbae - 802dba4: 697b ldr r3, [r7, #20] - 802dba6: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 802dbaa: f040 8085 bne.w 802dcb8 + 802dc22: 697b ldr r3, [r7, #20] + 802dc24: 2b00 cmp r3, #0 + 802dc26: d004 beq.n 802dc32 + 802dc28: 697b ldr r3, [r7, #20] + 802dc2a: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 802dc2e: f040 8085 bne.w 802dd3c { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c, hi2c->ErrorCode); - 802dbae: 68fb ldr r3, [r7, #12] - 802dbb0: 6c5b ldr r3, [r3, #68] ; 0x44 - 802dbb2: 4619 mov r1, r3 - 802dbb4: 68f8 ldr r0, [r7, #12] - 802dbb6: f000 fbbb bl 802e330 + 802dc32: 68fb ldr r3, [r7, #12] + 802dc34: 6c5b ldr r3, [r3, #68] ; 0x44 + 802dc36: 4619 mov r1, r3 + 802dc38: 68f8 ldr r0, [r7, #12] + 802dc3a: f000 fbbb bl 802e3b4 if (hi2c->XferCount == 0U) - 802dbba: e07d b.n 802dcb8 - 802dbbc: e07c b.n 802dcb8 + 802dc3e: e07d b.n 802dd3c + 802dc40: e07c b.n 802dd3c } } } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ - 802dbbe: 693b ldr r3, [r7, #16] - 802dbc0: 089b lsrs r3, r3, #2 - 802dbc2: f003 0301 and.w r3, r3, #1 - 802dbc6: 2b00 cmp r3, #0 - 802dbc8: d030 beq.n 802dc2c + 802dc42: 693b ldr r3, [r7, #16] + 802dc44: 089b lsrs r3, r3, #2 + 802dc46: f003 0301 and.w r3, r3, #1 + 802dc4a: 2b00 cmp r3, #0 + 802dc4c: d030 beq.n 802dcb0 (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) - 802dbca: 687b ldr r3, [r7, #4] - 802dbcc: 089b lsrs r3, r3, #2 - 802dbce: f003 0301 and.w r3, r3, #1 + 802dc4e: 687b ldr r3, [r7, #4] + 802dc50: 089b lsrs r3, r3, #2 + 802dc52: f003 0301 and.w r3, r3, #1 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ - 802dbd2: 2b00 cmp r3, #0 - 802dbd4: d02a beq.n 802dc2c + 802dc56: 2b00 cmp r3, #0 + 802dc58: d02a beq.n 802dcb0 { if (hi2c->XferCount > 0U) - 802dbd6: 68fb ldr r3, [r7, #12] - 802dbd8: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dbda: b29b uxth r3, r3 - 802dbdc: 2b00 cmp r3, #0 - 802dbde: d018 beq.n 802dc12 + 802dc5a: 68fb ldr r3, [r7, #12] + 802dc5c: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dc5e: b29b uxth r3, r3 + 802dc60: 2b00 cmp r3, #0 + 802dc62: d018 beq.n 802dc96 { /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - 802dbe0: 68fb ldr r3, [r7, #12] - 802dbe2: 681b ldr r3, [r3, #0] - 802dbe4: 6a5a ldr r2, [r3, #36] ; 0x24 - 802dbe6: 68fb ldr r3, [r7, #12] - 802dbe8: 6a5b ldr r3, [r3, #36] ; 0x24 - 802dbea: b2d2 uxtb r2, r2 - 802dbec: 701a strb r2, [r3, #0] + 802dc64: 68fb ldr r3, [r7, #12] + 802dc66: 681b ldr r3, [r3, #0] + 802dc68: 6a5a ldr r2, [r3, #36] ; 0x24 + 802dc6a: 68fb ldr r3, [r7, #12] + 802dc6c: 6a5b ldr r3, [r3, #36] ; 0x24 + 802dc6e: b2d2 uxtb r2, r2 + 802dc70: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 802dbee: 68fb ldr r3, [r7, #12] - 802dbf0: 6a5b ldr r3, [r3, #36] ; 0x24 - 802dbf2: 1c5a adds r2, r3, #1 - 802dbf4: 68fb ldr r3, [r7, #12] - 802dbf6: 625a str r2, [r3, #36] ; 0x24 + 802dc72: 68fb ldr r3, [r7, #12] + 802dc74: 6a5b ldr r3, [r3, #36] ; 0x24 + 802dc76: 1c5a adds r2, r3, #1 + 802dc78: 68fb ldr r3, [r7, #12] + 802dc7a: 625a str r2, [r3, #36] ; 0x24 hi2c->XferSize--; - 802dbf8: 68fb ldr r3, [r7, #12] - 802dbfa: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802dbfc: 3b01 subs r3, #1 - 802dbfe: b29a uxth r2, r3 - 802dc00: 68fb ldr r3, [r7, #12] - 802dc02: 851a strh r2, [r3, #40] ; 0x28 + 802dc7c: 68fb ldr r3, [r7, #12] + 802dc7e: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802dc80: 3b01 subs r3, #1 + 802dc82: b29a uxth r2, r3 + 802dc84: 68fb ldr r3, [r7, #12] + 802dc86: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; - 802dc04: 68fb ldr r3, [r7, #12] - 802dc06: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dc08: b29b uxth r3, r3 - 802dc0a: 3b01 subs r3, #1 - 802dc0c: b29a uxth r2, r3 - 802dc0e: 68fb ldr r3, [r7, #12] - 802dc10: 855a strh r2, [r3, #42] ; 0x2a + 802dc88: 68fb ldr r3, [r7, #12] + 802dc8a: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dc8c: b29b uxth r3, r3 + 802dc8e: 3b01 subs r3, #1 + 802dc90: b29a uxth r2, r3 + 802dc92: 68fb ldr r3, [r7, #12] + 802dc94: 855a strh r2, [r3, #42] ; 0x2a } if ((hi2c->XferCount == 0U) && \ - 802dc12: 68fb ldr r3, [r7, #12] - 802dc14: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dc16: b29b uxth r3, r3 - 802dc18: 2b00 cmp r3, #0 - 802dc1a: d14f bne.n 802dcbc - 802dc1c: 697b ldr r3, [r7, #20] - 802dc1e: f513 3f80 cmn.w r3, #65536 ; 0x10000 - 802dc22: d04b beq.n 802dcbc + 802dc96: 68fb ldr r3, [r7, #12] + 802dc98: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dc9a: b29b uxth r3, r3 + 802dc9c: 2b00 cmp r3, #0 + 802dc9e: d14f bne.n 802dd40 + 802dca0: 697b ldr r3, [r7, #20] + 802dca2: f513 3f80 cmn.w r3, #65536 ; 0x10000 + 802dca6: d04b beq.n 802dd40 (tmpoptions != I2C_NO_OPTION_FRAME)) { /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 802dc24: 68f8 ldr r0, [r7, #12] - 802dc26: f000 f8d7 bl 802ddd8 + 802dca8: 68f8 ldr r0, [r7, #12] + 802dcaa: f000 f8d7 bl 802de5c if ((hi2c->XferCount == 0U) && \ - 802dc2a: e047 b.n 802dcbc + 802dcae: e047 b.n 802dd40 } } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ - 802dc2c: 693b ldr r3, [r7, #16] - 802dc2e: 08db lsrs r3, r3, #3 - 802dc30: f003 0301 and.w r3, r3, #1 - 802dc34: 2b00 cmp r3, #0 - 802dc36: d00a beq.n 802dc4e + 802dcb0: 693b ldr r3, [r7, #16] + 802dcb2: 08db lsrs r3, r3, #3 + 802dcb4: f003 0301 and.w r3, r3, #1 + 802dcb8: 2b00 cmp r3, #0 + 802dcba: d00a beq.n 802dcd2 (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) - 802dc38: 687b ldr r3, [r7, #4] - 802dc3a: 08db lsrs r3, r3, #3 - 802dc3c: f003 0301 and.w r3, r3, #1 + 802dcbc: 687b ldr r3, [r7, #4] + 802dcbe: 08db lsrs r3, r3, #3 + 802dcc0: f003 0301 and.w r3, r3, #1 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \ - 802dc40: 2b00 cmp r3, #0 - 802dc42: d004 beq.n 802dc4e + 802dcc4: 2b00 cmp r3, #0 + 802dcc6: d004 beq.n 802dcd2 { I2C_ITAddrCplt(hi2c, tmpITFlags); - 802dc44: 6939 ldr r1, [r7, #16] - 802dc46: 68f8 ldr r0, [r7, #12] - 802dc48: f000 f842 bl 802dcd0 - 802dc4c: e037 b.n 802dcbe + 802dcc8: 6939 ldr r1, [r7, #16] + 802dcca: 68f8 ldr r0, [r7, #12] + 802dccc: f000 f842 bl 802dd54 + 802dcd0: e037 b.n 802dd42 } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ - 802dc4e: 693b ldr r3, [r7, #16] - 802dc50: 085b lsrs r3, r3, #1 - 802dc52: f003 0301 and.w r3, r3, #1 - 802dc56: 2b00 cmp r3, #0 - 802dc58: d031 beq.n 802dcbe + 802dcd2: 693b ldr r3, [r7, #16] + 802dcd4: 085b lsrs r3, r3, #1 + 802dcd6: f003 0301 and.w r3, r3, #1 + 802dcda: 2b00 cmp r3, #0 + 802dcdc: d031 beq.n 802dd42 (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) - 802dc5a: 687b ldr r3, [r7, #4] - 802dc5c: 085b lsrs r3, r3, #1 - 802dc5e: f003 0301 and.w r3, r3, #1 + 802dcde: 687b ldr r3, [r7, #4] + 802dce0: 085b lsrs r3, r3, #1 + 802dce2: f003 0301 and.w r3, r3, #1 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ - 802dc62: 2b00 cmp r3, #0 - 802dc64: d02b beq.n 802dcbe + 802dce6: 2b00 cmp r3, #0 + 802dce8: d02b beq.n 802dd42 { /* Write data to TXDR only if XferCount not reach "0" */ /* A TXIS flag can be set, during STOP treatment */ /* Check if all Data have already been sent */ /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ if (hi2c->XferCount > 0U) - 802dc66: 68fb ldr r3, [r7, #12] - 802dc68: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dc6a: b29b uxth r3, r3 - 802dc6c: 2b00 cmp r3, #0 - 802dc6e: d018 beq.n 802dca2 + 802dcea: 68fb ldr r3, [r7, #12] + 802dcec: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dcee: b29b uxth r3, r3 + 802dcf0: 2b00 cmp r3, #0 + 802dcf2: d018 beq.n 802dd26 { /* Write data to TXDR */ hi2c->Instance->TXDR = *hi2c->pBuffPtr; - 802dc70: 68fb ldr r3, [r7, #12] - 802dc72: 6a5b ldr r3, [r3, #36] ; 0x24 - 802dc74: 781a ldrb r2, [r3, #0] - 802dc76: 68fb ldr r3, [r7, #12] - 802dc78: 681b ldr r3, [r3, #0] - 802dc7a: 629a str r2, [r3, #40] ; 0x28 + 802dcf4: 68fb ldr r3, [r7, #12] + 802dcf6: 6a5b ldr r3, [r3, #36] ; 0x24 + 802dcf8: 781a ldrb r2, [r3, #0] + 802dcfa: 68fb ldr r3, [r7, #12] + 802dcfc: 681b ldr r3, [r3, #0] + 802dcfe: 629a str r2, [r3, #40] ; 0x28 /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 802dc7c: 68fb ldr r3, [r7, #12] - 802dc7e: 6a5b ldr r3, [r3, #36] ; 0x24 - 802dc80: 1c5a adds r2, r3, #1 - 802dc82: 68fb ldr r3, [r7, #12] - 802dc84: 625a str r2, [r3, #36] ; 0x24 + 802dd00: 68fb ldr r3, [r7, #12] + 802dd02: 6a5b ldr r3, [r3, #36] ; 0x24 + 802dd04: 1c5a adds r2, r3, #1 + 802dd06: 68fb ldr r3, [r7, #12] + 802dd08: 625a str r2, [r3, #36] ; 0x24 hi2c->XferCount--; - 802dc86: 68fb ldr r3, [r7, #12] - 802dc88: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802dc8a: b29b uxth r3, r3 - 802dc8c: 3b01 subs r3, #1 - 802dc8e: b29a uxth r2, r3 - 802dc90: 68fb ldr r3, [r7, #12] - 802dc92: 855a strh r2, [r3, #42] ; 0x2a + 802dd0a: 68fb ldr r3, [r7, #12] + 802dd0c: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802dd0e: b29b uxth r3, r3 + 802dd10: 3b01 subs r3, #1 + 802dd12: b29a uxth r2, r3 + 802dd14: 68fb ldr r3, [r7, #12] + 802dd16: 855a strh r2, [r3, #42] ; 0x2a hi2c->XferSize--; - 802dc94: 68fb ldr r3, [r7, #12] - 802dc96: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802dc98: 3b01 subs r3, #1 - 802dc9a: b29a uxth r2, r3 - 802dc9c: 68fb ldr r3, [r7, #12] - 802dc9e: 851a strh r2, [r3, #40] ; 0x28 - 802dca0: e00d b.n 802dcbe + 802dd18: 68fb ldr r3, [r7, #12] + 802dd1a: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802dd1c: 3b01 subs r3, #1 + 802dd1e: b29a uxth r2, r3 + 802dd20: 68fb ldr r3, [r7, #12] + 802dd22: 851a strh r2, [r3, #40] ; 0x28 + 802dd24: e00d b.n 802dd42 } else { if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) - 802dca2: 697b ldr r3, [r7, #20] - 802dca4: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 802dca8: d002 beq.n 802dcb0 - 802dcaa: 697b ldr r3, [r7, #20] - 802dcac: 2b00 cmp r3, #0 - 802dcae: d106 bne.n 802dcbe + 802dd26: 697b ldr r3, [r7, #20] + 802dd28: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 802dd2c: d002 beq.n 802dd34 + 802dd2e: 697b ldr r3, [r7, #20] + 802dd30: 2b00 cmp r3, #0 + 802dd32: d106 bne.n 802dd42 { /* Last Byte is Transmitted */ /* Call I2C Slave Sequential complete process */ I2C_ITSlaveSeqCplt(hi2c); - 802dcb0: 68f8 ldr r0, [r7, #12] - 802dcb2: f000 f891 bl 802ddd8 - 802dcb6: e002 b.n 802dcbe + 802dd34: 68f8 ldr r0, [r7, #12] + 802dd36: f000 f891 bl 802de5c + 802dd3a: e002 b.n 802dd42 if (hi2c->XferCount == 0U) - 802dcb8: bf00 nop - 802dcba: e000 b.n 802dcbe + 802dd3c: bf00 nop + 802dd3e: e000 b.n 802dd42 if ((hi2c->XferCount == 0U) && \ - 802dcbc: bf00 nop + 802dd40: bf00 nop { /* Nothing to do */ } /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802dcbe: 68fb ldr r3, [r7, #12] - 802dcc0: 2200 movs r2, #0 - 802dcc2: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802dd42: 68fb ldr r3, [r7, #12] + 802dd44: 2200 movs r2, #0 + 802dd46: f883 2040 strb.w r2, [r3, #64] ; 0x40 return HAL_OK; - 802dcc6: 2300 movs r3, #0 + 802dd4a: 2300 movs r3, #0 } - 802dcc8: 4618 mov r0, r3 - 802dcca: 3718 adds r7, #24 - 802dccc: 46bd mov sp, r7 - 802dcce: bd80 pop {r7, pc} + 802dd4c: 4618 mov r0, r3 + 802dd4e: 3718 adds r7, #24 + 802dd50: 46bd mov sp, r7 + 802dd52: bd80 pop {r7, pc} -0802dcd0 : +0802dd54 : * @param hi2c I2C handle. * @param ITFlags Interrupt flags to handle. * @retval None */ static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { - 802dcd0: b580 push {r7, lr} - 802dcd2: b084 sub sp, #16 - 802dcd4: af00 add r7, sp, #0 - 802dcd6: 6078 str r0, [r7, #4] - 802dcd8: 6039 str r1, [r7, #0] + 802dd54: b580 push {r7, lr} + 802dd56: b084 sub sp, #16 + 802dd58: af00 add r7, sp, #0 + 802dd5a: 6078 str r0, [r7, #4] + 802dd5c: 6039 str r1, [r7, #0] /* Prevent unused argument(s) compilation warning */ UNUSED(ITFlags); /* In case of Listen state, need to inform upper layer of address match code event */ if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) - 802dcda: 687b ldr r3, [r7, #4] - 802dcdc: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802dce0: b2db uxtb r3, r3 - 802dce2: f003 0328 and.w r3, r3, #40 ; 0x28 - 802dce6: 2b28 cmp r3, #40 ; 0x28 - 802dce8: d16a bne.n 802ddc0 + 802dd5e: 687b ldr r3, [r7, #4] + 802dd60: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802dd64: b2db uxtb r3, r3 + 802dd66: f003 0328 and.w r3, r3, #40 ; 0x28 + 802dd6a: 2b28 cmp r3, #40 ; 0x28 + 802dd6c: d16a bne.n 802de44 { transferdirection = I2C_GET_DIR(hi2c); - 802dcea: 687b ldr r3, [r7, #4] - 802dcec: 681b ldr r3, [r3, #0] - 802dcee: 699b ldr r3, [r3, #24] - 802dcf0: 0c1b lsrs r3, r3, #16 - 802dcf2: b2db uxtb r3, r3 - 802dcf4: f003 0301 and.w r3, r3, #1 - 802dcf8: 73fb strb r3, [r7, #15] + 802dd6e: 687b ldr r3, [r7, #4] + 802dd70: 681b ldr r3, [r3, #0] + 802dd72: 699b ldr r3, [r3, #24] + 802dd74: 0c1b lsrs r3, r3, #16 + 802dd76: b2db uxtb r3, r3 + 802dd78: f003 0301 and.w r3, r3, #1 + 802dd7c: 73fb strb r3, [r7, #15] slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); - 802dcfa: 687b ldr r3, [r7, #4] - 802dcfc: 681b ldr r3, [r3, #0] - 802dcfe: 699b ldr r3, [r3, #24] - 802dd00: 0c1b lsrs r3, r3, #16 - 802dd02: b29b uxth r3, r3 - 802dd04: f003 03fe and.w r3, r3, #254 ; 0xfe - 802dd08: 81bb strh r3, [r7, #12] + 802dd7e: 687b ldr r3, [r7, #4] + 802dd80: 681b ldr r3, [r3, #0] + 802dd82: 699b ldr r3, [r3, #24] + 802dd84: 0c1b lsrs r3, r3, #16 + 802dd86: b29b uxth r3, r3 + 802dd88: f003 03fe and.w r3, r3, #254 ; 0xfe + 802dd8c: 81bb strh r3, [r7, #12] ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); - 802dd0a: 687b ldr r3, [r7, #4] - 802dd0c: 681b ldr r3, [r3, #0] - 802dd0e: 689b ldr r3, [r3, #8] - 802dd10: b29b uxth r3, r3 - 802dd12: f3c3 0309 ubfx r3, r3, #0, #10 - 802dd16: 817b strh r3, [r7, #10] + 802dd8e: 687b ldr r3, [r7, #4] + 802dd90: 681b ldr r3, [r3, #0] + 802dd92: 689b ldr r3, [r3, #8] + 802dd94: b29b uxth r3, r3 + 802dd96: f3c3 0309 ubfx r3, r3, #0, #10 + 802dd9a: 817b strh r3, [r7, #10] ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); - 802dd18: 687b ldr r3, [r7, #4] - 802dd1a: 681b ldr r3, [r3, #0] - 802dd1c: 68db ldr r3, [r3, #12] - 802dd1e: b29b uxth r3, r3 - 802dd20: f003 03fe and.w r3, r3, #254 ; 0xfe - 802dd24: 813b strh r3, [r7, #8] + 802dd9c: 687b ldr r3, [r7, #4] + 802dd9e: 681b ldr r3, [r3, #0] + 802dda0: 68db ldr r3, [r3, #12] + 802dda2: b29b uxth r3, r3 + 802dda4: f003 03fe and.w r3, r3, #254 ; 0xfe + 802dda8: 813b strh r3, [r7, #8] /* If 10bits addressing mode is selected */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - 802dd26: 687b ldr r3, [r7, #4] - 802dd28: 68db ldr r3, [r3, #12] - 802dd2a: 2b02 cmp r3, #2 - 802dd2c: d138 bne.n 802dda0 + 802ddaa: 687b ldr r3, [r7, #4] + 802ddac: 68db ldr r3, [r3, #12] + 802ddae: 2b02 cmp r3, #2 + 802ddb0: d138 bne.n 802de24 { if ((slaveaddrcode & SLAVE_ADDR_MSK) == ((ownadd1code >> SLAVE_ADDR_SHIFT) & SLAVE_ADDR_MSK)) - 802dd2e: 897b ldrh r3, [r7, #10] - 802dd30: 09db lsrs r3, r3, #7 - 802dd32: b29a uxth r2, r3 - 802dd34: 89bb ldrh r3, [r7, #12] - 802dd36: 4053 eors r3, r2 - 802dd38: b29b uxth r3, r3 - 802dd3a: f003 0306 and.w r3, r3, #6 - 802dd3e: 2b00 cmp r3, #0 - 802dd40: d11c bne.n 802dd7c + 802ddb2: 897b ldrh r3, [r7, #10] + 802ddb4: 09db lsrs r3, r3, #7 + 802ddb6: b29a uxth r2, r3 + 802ddb8: 89bb ldrh r3, [r7, #12] + 802ddba: 4053 eors r3, r2 + 802ddbc: b29b uxth r3, r3 + 802ddbe: f003 0306 and.w r3, r3, #6 + 802ddc2: 2b00 cmp r3, #0 + 802ddc4: d11c bne.n 802de00 { slaveaddrcode = ownadd1code; - 802dd42: 897b ldrh r3, [r7, #10] - 802dd44: 81bb strh r3, [r7, #12] + 802ddc6: 897b ldrh r3, [r7, #10] + 802ddc8: 81bb strh r3, [r7, #12] hi2c->AddrEventCount++; - 802dd46: 687b ldr r3, [r7, #4] - 802dd48: 6c9b ldr r3, [r3, #72] ; 0x48 - 802dd4a: 1c5a adds r2, r3, #1 - 802dd4c: 687b ldr r3, [r7, #4] - 802dd4e: 649a str r2, [r3, #72] ; 0x48 + 802ddca: 687b ldr r3, [r7, #4] + 802ddcc: 6c9b ldr r3, [r3, #72] ; 0x48 + 802ddce: 1c5a adds r2, r3, #1 + 802ddd0: 687b ldr r3, [r7, #4] + 802ddd2: 649a str r2, [r3, #72] ; 0x48 if (hi2c->AddrEventCount == 2U) - 802dd50: 687b ldr r3, [r7, #4] - 802dd52: 6c9b ldr r3, [r3, #72] ; 0x48 - 802dd54: 2b02 cmp r3, #2 - 802dd56: d13b bne.n 802ddd0 + 802ddd4: 687b ldr r3, [r7, #4] + 802ddd6: 6c9b ldr r3, [r3, #72] ; 0x48 + 802ddd8: 2b02 cmp r3, #2 + 802ddda: d13b bne.n 802de54 { /* Reset Address Event counter */ hi2c->AddrEventCount = 0U; - 802dd58: 687b ldr r3, [r7, #4] - 802dd5a: 2200 movs r2, #0 - 802dd5c: 649a str r2, [r3, #72] ; 0x48 + 802dddc: 687b ldr r3, [r7, #4] + 802ddde: 2200 movs r2, #0 + 802dde0: 649a str r2, [r3, #72] ; 0x48 /* Clear ADDR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - 802dd5e: 687b ldr r3, [r7, #4] - 802dd60: 681b ldr r3, [r3, #0] - 802dd62: 2208 movs r2, #8 - 802dd64: 61da str r2, [r3, #28] + 802dde2: 687b ldr r3, [r7, #4] + 802dde4: 681b ldr r3, [r3, #0] + 802dde6: 2208 movs r2, #8 + 802dde8: 61da str r2, [r3, #28] /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802dd66: 687b ldr r3, [r7, #4] - 802dd68: 2200 movs r2, #0 - 802dd6a: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802ddea: 687b ldr r3, [r7, #4] + 802ddec: 2200 movs r2, #0 + 802ddee: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Call Slave Addr callback */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); #else HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - 802dd6e: 89ba ldrh r2, [r7, #12] - 802dd70: 7bfb ldrb r3, [r7, #15] - 802dd72: 4619 mov r1, r3 - 802dd74: 6878 ldr r0, [r7, #4] - 802dd76: f7ff fe7c bl 802da72 + 802ddf2: 89ba ldrh r2, [r7, #12] + 802ddf4: 7bfb ldrb r3, [r7, #15] + 802ddf6: 4619 mov r1, r3 + 802ddf8: 6878 ldr r0, [r7, #4] + 802ddfa: f7ff fe7c bl 802daf6 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); /* Process Unlocked */ __HAL_UNLOCK(hi2c); } } - 802dd7a: e029 b.n 802ddd0 + 802ddfe: e029 b.n 802de54 slaveaddrcode = ownadd2code; - 802dd7c: 893b ldrh r3, [r7, #8] - 802dd7e: 81bb strh r3, [r7, #12] + 802de00: 893b ldrh r3, [r7, #8] + 802de02: 81bb strh r3, [r7, #12] I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - 802dd80: f44f 4100 mov.w r1, #32768 ; 0x8000 - 802dd84: 6878 ldr r0, [r7, #4] - 802dd86: f000 fc0c bl 802e5a2 + 802de04: f44f 4100 mov.w r1, #32768 ; 0x8000 + 802de08: 6878 ldr r0, [r7, #4] + 802de0a: f000 fc0c bl 802e626 __HAL_UNLOCK(hi2c); - 802dd8a: 687b ldr r3, [r7, #4] - 802dd8c: 2200 movs r2, #0 - 802dd8e: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802de0e: 687b ldr r3, [r7, #4] + 802de10: 2200 movs r2, #0 + 802de12: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - 802dd92: 89ba ldrh r2, [r7, #12] - 802dd94: 7bfb ldrb r3, [r7, #15] - 802dd96: 4619 mov r1, r3 - 802dd98: 6878 ldr r0, [r7, #4] - 802dd9a: f7ff fe6a bl 802da72 + 802de16: 89ba ldrh r2, [r7, #12] + 802de18: 7bfb ldrb r3, [r7, #15] + 802de1a: 4619 mov r1, r3 + 802de1c: 6878 ldr r0, [r7, #4] + 802de1e: f7ff fe6a bl 802daf6 } - 802dd9e: e017 b.n 802ddd0 + 802de22: e017 b.n 802de54 I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - 802dda0: f44f 4100 mov.w r1, #32768 ; 0x8000 - 802dda4: 6878 ldr r0, [r7, #4] - 802dda6: f000 fbfc bl 802e5a2 + 802de24: f44f 4100 mov.w r1, #32768 ; 0x8000 + 802de28: 6878 ldr r0, [r7, #4] + 802de2a: f000 fbfc bl 802e626 __HAL_UNLOCK(hi2c); - 802ddaa: 687b ldr r3, [r7, #4] - 802ddac: 2200 movs r2, #0 - 802ddae: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802de2e: 687b ldr r3, [r7, #4] + 802de30: 2200 movs r2, #0 + 802de32: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); - 802ddb2: 89ba ldrh r2, [r7, #12] - 802ddb4: 7bfb ldrb r3, [r7, #15] - 802ddb6: 4619 mov r1, r3 - 802ddb8: 6878 ldr r0, [r7, #4] - 802ddba: f7ff fe5a bl 802da72 + 802de36: 89ba ldrh r2, [r7, #12] + 802de38: 7bfb ldrb r3, [r7, #15] + 802de3a: 4619 mov r1, r3 + 802de3c: 6878 ldr r0, [r7, #4] + 802de3e: f7ff fe5a bl 802daf6 } - 802ddbe: e007 b.n 802ddd0 + 802de42: e007 b.n 802de54 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - 802ddc0: 687b ldr r3, [r7, #4] - 802ddc2: 681b ldr r3, [r3, #0] - 802ddc4: 2208 movs r2, #8 - 802ddc6: 61da str r2, [r3, #28] + 802de44: 687b ldr r3, [r7, #4] + 802de46: 681b ldr r3, [r3, #0] + 802de48: 2208 movs r2, #8 + 802de4a: 61da str r2, [r3, #28] __HAL_UNLOCK(hi2c); - 802ddc8: 687b ldr r3, [r7, #4] - 802ddca: 2200 movs r2, #0 - 802ddcc: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802de4c: 687b ldr r3, [r7, #4] + 802de4e: 2200 movs r2, #0 + 802de50: f883 2040 strb.w r2, [r3, #64] ; 0x40 } - 802ddd0: bf00 nop - 802ddd2: 3710 adds r7, #16 - 802ddd4: 46bd mov sp, r7 - 802ddd6: bd80 pop {r7, pc} + 802de54: bf00 nop + 802de56: 3710 adds r7, #16 + 802de58: 46bd mov sp, r7 + 802de5a: bd80 pop {r7, pc} -0802ddd8 : +0802de5c : * @brief I2C Slave sequential complete process. * @param hi2c I2C handle. * @retval None */ static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c) { - 802ddd8: b580 push {r7, lr} - 802ddda: b084 sub sp, #16 - 802dddc: af00 add r7, sp, #0 - 802ddde: 6078 str r0, [r7, #4] + 802de5c: b580 push {r7, lr} + 802de5e: b084 sub sp, #16 + 802de60: af00 add r7, sp, #0 + 802de62: 6078 str r0, [r7, #4] uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); - 802dde0: 687b ldr r3, [r7, #4] - 802dde2: 681b ldr r3, [r3, #0] - 802dde4: 681b ldr r3, [r3, #0] - 802dde6: 60fb str r3, [r7, #12] + 802de64: 687b ldr r3, [r7, #4] + 802de66: 681b ldr r3, [r3, #0] + 802de68: 681b ldr r3, [r3, #0] + 802de6a: 60fb str r3, [r7, #12] /* Reset I2C handle mode */ hi2c->Mode = HAL_I2C_MODE_NONE; - 802dde8: 687b ldr r3, [r7, #4] - 802ddea: 2200 movs r2, #0 - 802ddec: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802de6c: 687b ldr r3, [r7, #4] + 802de6e: 2200 movs r2, #0 + 802de70: f883 2042 strb.w r2, [r3, #66] ; 0x42 /* If a DMA is ongoing, Update handle size context */ if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) - 802ddf0: 68fb ldr r3, [r7, #12] - 802ddf2: 0b9b lsrs r3, r3, #14 - 802ddf4: f003 0301 and.w r3, r3, #1 - 802ddf8: 2b00 cmp r3, #0 - 802ddfa: d008 beq.n 802de0e + 802de74: 68fb ldr r3, [r7, #12] + 802de76: 0b9b lsrs r3, r3, #14 + 802de78: f003 0301 and.w r3, r3, #1 + 802de7c: 2b00 cmp r3, #0 + 802de7e: d008 beq.n 802de92 { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - 802ddfc: 687b ldr r3, [r7, #4] - 802ddfe: 681b ldr r3, [r3, #0] - 802de00: 681a ldr r2, [r3, #0] - 802de02: 687b ldr r3, [r7, #4] - 802de04: 681b ldr r3, [r3, #0] - 802de06: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 802de0a: 601a str r2, [r3, #0] - 802de0c: e00d b.n 802de2a + 802de80: 687b ldr r3, [r7, #4] + 802de82: 681b ldr r3, [r3, #0] + 802de84: 681a ldr r2, [r3, #0] + 802de86: 687b ldr r3, [r7, #4] + 802de88: 681b ldr r3, [r3, #0] + 802de8a: f422 4280 bic.w r2, r2, #16384 ; 0x4000 + 802de8e: 601a str r2, [r3, #0] + 802de90: e00d b.n 802deae } else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) - 802de0e: 68fb ldr r3, [r7, #12] - 802de10: 0bdb lsrs r3, r3, #15 - 802de12: f003 0301 and.w r3, r3, #1 - 802de16: 2b00 cmp r3, #0 - 802de18: d007 beq.n 802de2a + 802de92: 68fb ldr r3, [r7, #12] + 802de94: 0bdb lsrs r3, r3, #15 + 802de96: f003 0301 and.w r3, r3, #1 + 802de9a: 2b00 cmp r3, #0 + 802de9c: d007 beq.n 802deae { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - 802de1a: 687b ldr r3, [r7, #4] - 802de1c: 681b ldr r3, [r3, #0] - 802de1e: 681a ldr r2, [r3, #0] - 802de20: 687b ldr r3, [r7, #4] - 802de22: 681b ldr r3, [r3, #0] - 802de24: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802de28: 601a str r2, [r3, #0] + 802de9e: 687b ldr r3, [r7, #4] + 802dea0: 681b ldr r3, [r3, #0] + 802dea2: 681a ldr r2, [r3, #0] + 802dea4: 687b ldr r3, [r7, #4] + 802dea6: 681b ldr r3, [r3, #0] + 802dea8: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802deac: 601a str r2, [r3, #0] else { /* Do nothing */ } if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) - 802de2a: 687b ldr r3, [r7, #4] - 802de2c: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802de30: b2db uxtb r3, r3 - 802de32: 2b29 cmp r3, #41 ; 0x29 - 802de34: d112 bne.n 802de5c + 802deae: 687b ldr r3, [r7, #4] + 802deb0: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802deb4: b2db uxtb r3, r3 + 802deb6: 2b29 cmp r3, #41 ; 0x29 + 802deb8: d112 bne.n 802dee0 { /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ hi2c->State = HAL_I2C_STATE_LISTEN; - 802de36: 687b ldr r3, [r7, #4] - 802de38: 2228 movs r2, #40 ; 0x28 - 802de3a: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802deba: 687b ldr r3, [r7, #4] + 802debc: 2228 movs r2, #40 ; 0x28 + 802debe: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; - 802de3e: 687b ldr r3, [r7, #4] - 802de40: 2221 movs r2, #33 ; 0x21 - 802de42: 631a str r2, [r3, #48] ; 0x30 + 802dec2: 687b ldr r3, [r7, #4] + 802dec4: 2221 movs r2, #33 ; 0x21 + 802dec6: 631a str r2, [r3, #48] ; 0x30 /* Disable Interrupts */ I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); - 802de44: 2101 movs r1, #1 - 802de46: 6878 ldr r0, [r7, #4] - 802de48: f000 fbab bl 802e5a2 + 802dec8: 2101 movs r1, #1 + 802deca: 6878 ldr r0, [r7, #4] + 802decc: f000 fbab bl 802e626 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802de4c: 687b ldr r3, [r7, #4] - 802de4e: 2200 movs r2, #0 - 802de50: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802ded0: 687b ldr r3, [r7, #4] + 802ded2: 2200 movs r2, #0 + 802ded4: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->SlaveTxCpltCallback(hi2c); #else HAL_I2C_SlaveTxCpltCallback(hi2c); - 802de54: 6878 ldr r0, [r7, #4] - 802de56: f7ff fdf8 bl 802da4a + 802ded8: 6878 ldr r0, [r7, #4] + 802deda: f7ff fdf8 bl 802dace } else { /* Nothing to do */ } } - 802de5a: e017 b.n 802de8c + 802dede: e017 b.n 802df10 else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) - 802de5c: 687b ldr r3, [r7, #4] - 802de5e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802de62: b2db uxtb r3, r3 - 802de64: 2b2a cmp r3, #42 ; 0x2a - 802de66: d111 bne.n 802de8c + 802dee0: 687b ldr r3, [r7, #4] + 802dee2: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802dee6: b2db uxtb r3, r3 + 802dee8: 2b2a cmp r3, #42 ; 0x2a + 802deea: d111 bne.n 802df10 hi2c->State = HAL_I2C_STATE_LISTEN; - 802de68: 687b ldr r3, [r7, #4] - 802de6a: 2228 movs r2, #40 ; 0x28 - 802de6c: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802deec: 687b ldr r3, [r7, #4] + 802deee: 2228 movs r2, #40 ; 0x28 + 802def0: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; - 802de70: 687b ldr r3, [r7, #4] - 802de72: 2222 movs r2, #34 ; 0x22 - 802de74: 631a str r2, [r3, #48] ; 0x30 + 802def4: 687b ldr r3, [r7, #4] + 802def6: 2222 movs r2, #34 ; 0x22 + 802def8: 631a str r2, [r3, #48] ; 0x30 I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - 802de76: 2102 movs r1, #2 - 802de78: 6878 ldr r0, [r7, #4] - 802de7a: f000 fb92 bl 802e5a2 + 802defa: 2102 movs r1, #2 + 802defc: 6878 ldr r0, [r7, #4] + 802defe: f000 fb92 bl 802e626 __HAL_UNLOCK(hi2c); - 802de7e: 687b ldr r3, [r7, #4] - 802de80: 2200 movs r2, #0 - 802de82: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802df02: 687b ldr r3, [r7, #4] + 802df04: 2200 movs r2, #0 + 802df06: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_SlaveRxCpltCallback(hi2c); - 802de86: 6878 ldr r0, [r7, #4] - 802de88: f7ff fde9 bl 802da5e + 802df0a: 6878 ldr r0, [r7, #4] + 802df0c: f7ff fde9 bl 802dae2 } - 802de8c: bf00 nop - 802de8e: 3710 adds r7, #16 - 802de90: 46bd mov sp, r7 - 802de92: bd80 pop {r7, pc} + 802df10: bf00 nop + 802df12: 3710 adds r7, #16 + 802df14: 46bd mov sp, r7 + 802df16: bd80 pop {r7, pc} -0802de94 : +0802df18 : * @param hi2c I2C handle. * @param ITFlags Interrupt flags to handle. * @retval None */ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { - 802de94: b580 push {r7, lr} - 802de96: b086 sub sp, #24 - 802de98: af00 add r7, sp, #0 - 802de9a: 6078 str r0, [r7, #4] - 802de9c: 6039 str r1, [r7, #0] + 802df18: b580 push {r7, lr} + 802df1a: b086 sub sp, #24 + 802df1c: af00 add r7, sp, #0 + 802df1e: 6078 str r0, [r7, #4] + 802df20: 6039 str r1, [r7, #0] uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); - 802de9e: 687b ldr r3, [r7, #4] - 802dea0: 681b ldr r3, [r3, #0] - 802dea2: 681b ldr r3, [r3, #0] - 802dea4: 613b str r3, [r7, #16] + 802df22: 687b ldr r3, [r7, #4] + 802df24: 681b ldr r3, [r3, #0] + 802df26: 681b ldr r3, [r3, #0] + 802df28: 613b str r3, [r7, #16] uint32_t tmpITFlags = ITFlags; - 802dea6: 683b ldr r3, [r7, #0] - 802dea8: 617b str r3, [r7, #20] + 802df2a: 683b ldr r3, [r7, #0] + 802df2c: 617b str r3, [r7, #20] HAL_I2C_StateTypeDef tmpstate = hi2c->State; - 802deaa: 687b ldr r3, [r7, #4] - 802deac: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802deb0: 73fb strb r3, [r7, #15] + 802df2e: 687b ldr r3, [r7, #4] + 802df30: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802df34: 73fb strb r3, [r7, #15] /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 802deb2: 687b ldr r3, [r7, #4] - 802deb4: 681b ldr r3, [r3, #0] - 802deb6: 2220 movs r2, #32 - 802deb8: 61da str r2, [r3, #28] + 802df36: 687b ldr r3, [r7, #4] + 802df38: 681b ldr r3, [r3, #0] + 802df3a: 2220 movs r2, #32 + 802df3c: 61da str r2, [r3, #28] /* Disable Interrupts and Store Previous state */ if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN)) - 802deba: 7bfb ldrb r3, [r7, #15] - 802debc: 2b21 cmp r3, #33 ; 0x21 - 802debe: d002 beq.n 802dec6 - 802dec0: 7bfb ldrb r3, [r7, #15] - 802dec2: 2b29 cmp r3, #41 ; 0x29 - 802dec4: d108 bne.n 802ded8 + 802df3e: 7bfb ldrb r3, [r7, #15] + 802df40: 2b21 cmp r3, #33 ; 0x21 + 802df42: d002 beq.n 802df4a + 802df44: 7bfb ldrb r3, [r7, #15] + 802df46: 2b29 cmp r3, #41 ; 0x29 + 802df48: d108 bne.n 802df5c { I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); - 802dec6: f248 0101 movw r1, #32769 ; 0x8001 - 802deca: 6878 ldr r0, [r7, #4] - 802decc: f000 fb69 bl 802e5a2 + 802df4a: f248 0101 movw r1, #32769 ; 0x8001 + 802df4e: 6878 ldr r0, [r7, #4] + 802df50: f000 fb69 bl 802e626 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; - 802ded0: 687b ldr r3, [r7, #4] - 802ded2: 2221 movs r2, #33 ; 0x21 - 802ded4: 631a str r2, [r3, #48] ; 0x30 - 802ded6: e00d b.n 802def4 + 802df54: 687b ldr r3, [r7, #4] + 802df56: 2221 movs r2, #33 ; 0x21 + 802df58: 631a str r2, [r3, #48] ; 0x30 + 802df5a: e00d b.n 802df78 } else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) - 802ded8: 7bfb ldrb r3, [r7, #15] - 802deda: 2b22 cmp r3, #34 ; 0x22 - 802dedc: d002 beq.n 802dee4 - 802dede: 7bfb ldrb r3, [r7, #15] - 802dee0: 2b2a cmp r3, #42 ; 0x2a - 802dee2: d107 bne.n 802def4 + 802df5c: 7bfb ldrb r3, [r7, #15] + 802df5e: 2b22 cmp r3, #34 ; 0x22 + 802df60: d002 beq.n 802df68 + 802df62: 7bfb ldrb r3, [r7, #15] + 802df64: 2b2a cmp r3, #42 ; 0x2a + 802df66: d107 bne.n 802df78 { I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); - 802dee4: f248 0102 movw r1, #32770 ; 0x8002 - 802dee8: 6878 ldr r0, [r7, #4] - 802deea: f000 fb5a bl 802e5a2 + 802df68: f248 0102 movw r1, #32770 ; 0x8002 + 802df6c: 6878 ldr r0, [r7, #4] + 802df6e: f000 fb5a bl 802e626 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; - 802deee: 687b ldr r3, [r7, #4] - 802def0: 2222 movs r2, #34 ; 0x22 - 802def2: 631a str r2, [r3, #48] ; 0x30 + 802df72: 687b ldr r3, [r7, #4] + 802df74: 2222 movs r2, #34 ; 0x22 + 802df76: 631a str r2, [r3, #48] ; 0x30 { /* Do nothing */ } /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; - 802def4: 687b ldr r3, [r7, #4] - 802def6: 681b ldr r3, [r3, #0] - 802def8: 685a ldr r2, [r3, #4] - 802defa: 687b ldr r3, [r7, #4] - 802defc: 681b ldr r3, [r3, #0] - 802defe: f442 4200 orr.w r2, r2, #32768 ; 0x8000 - 802df02: 605a str r2, [r3, #4] + 802df78: 687b ldr r3, [r7, #4] + 802df7a: 681b ldr r3, [r3, #0] + 802df7c: 685a ldr r2, [r3, #4] + 802df7e: 687b ldr r3, [r7, #4] + 802df80: 681b ldr r3, [r3, #0] + 802df82: f442 4200 orr.w r2, r2, #32768 ; 0x8000 + 802df86: 605a str r2, [r3, #4] /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); - 802df04: 687b ldr r3, [r7, #4] - 802df06: 681b ldr r3, [r3, #0] - 802df08: 6859 ldr r1, [r3, #4] - 802df0a: 687b ldr r3, [r7, #4] - 802df0c: 681a ldr r2, [r3, #0] - 802df0e: 4b80 ldr r3, [pc, #512] ; (802e110 ) - 802df10: 400b ands r3, r1 - 802df12: 6053 str r3, [r2, #4] + 802df88: 687b ldr r3, [r7, #4] + 802df8a: 681b ldr r3, [r3, #0] + 802df8c: 6859 ldr r1, [r3, #4] + 802df8e: 687b ldr r3, [r7, #4] + 802df90: 681a ldr r2, [r3, #0] + 802df92: 4b80 ldr r3, [pc, #512] ; (802e194 ) + 802df94: 400b ands r3, r1 + 802df96: 6053 str r3, [r2, #4] /* Flush TX register */ I2C_Flush_TXDR(hi2c); - 802df14: 6878 ldr r0, [r7, #4] - 802df16: f000 fb02 bl 802e51e + 802df98: 6878 ldr r0, [r7, #4] + 802df9a: f000 fb02 bl 802e5a2 /* If a DMA is ongoing, Update handle size context */ if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) - 802df1a: 693b ldr r3, [r7, #16] - 802df1c: 0b9b lsrs r3, r3, #14 - 802df1e: f003 0301 and.w r3, r3, #1 - 802df22: 2b00 cmp r3, #0 - 802df24: d07a beq.n 802e01c + 802df9e: 693b ldr r3, [r7, #16] + 802dfa0: 0b9b lsrs r3, r3, #14 + 802dfa2: f003 0301 and.w r3, r3, #1 + 802dfa6: 2b00 cmp r3, #0 + 802dfa8: d07a beq.n 802e0a0 { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - 802df26: 687b ldr r3, [r7, #4] - 802df28: 681b ldr r3, [r3, #0] - 802df2a: 681a ldr r2, [r3, #0] - 802df2c: 687b ldr r3, [r7, #4] - 802df2e: 681b ldr r3, [r3, #0] - 802df30: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 802df34: 601a str r2, [r3, #0] + 802dfaa: 687b ldr r3, [r7, #4] + 802dfac: 681b ldr r3, [r3, #0] + 802dfae: 681a ldr r2, [r3, #0] + 802dfb0: 687b ldr r3, [r7, #4] + 802dfb2: 681b ldr r3, [r3, #0] + 802dfb4: f422 4280 bic.w r2, r2, #16384 ; 0x4000 + 802dfb8: 601a str r2, [r3, #0] if (hi2c->hdmatx != NULL) - 802df36: 687b ldr r3, [r7, #4] - 802df38: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df3a: 2b00 cmp r3, #0 - 802df3c: f000 8111 beq.w 802e162 + 802dfba: 687b ldr r3, [r7, #4] + 802dfbc: 6b9b ldr r3, [r3, #56] ; 0x38 + 802dfbe: 2b00 cmp r3, #0 + 802dfc0: f000 8111 beq.w 802e1e6 { hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx); - 802df40: 687b ldr r3, [r7, #4] - 802df42: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df44: 681b ldr r3, [r3, #0] - 802df46: 4a73 ldr r2, [pc, #460] ; (802e114 ) - 802df48: 4293 cmp r3, r2 - 802df4a: d059 beq.n 802e000 - 802df4c: 687b ldr r3, [r7, #4] - 802df4e: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df50: 681b ldr r3, [r3, #0] - 802df52: 4a71 ldr r2, [pc, #452] ; (802e118 ) - 802df54: 4293 cmp r3, r2 - 802df56: d053 beq.n 802e000 - 802df58: 687b ldr r3, [r7, #4] - 802df5a: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df5c: 681b ldr r3, [r3, #0] - 802df5e: 4a6f ldr r2, [pc, #444] ; (802e11c ) - 802df60: 4293 cmp r3, r2 - 802df62: d04d beq.n 802e000 - 802df64: 687b ldr r3, [r7, #4] - 802df66: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df68: 681b ldr r3, [r3, #0] - 802df6a: 4a6d ldr r2, [pc, #436] ; (802e120 ) - 802df6c: 4293 cmp r3, r2 - 802df6e: d047 beq.n 802e000 - 802df70: 687b ldr r3, [r7, #4] - 802df72: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df74: 681b ldr r3, [r3, #0] - 802df76: 4a6b ldr r2, [pc, #428] ; (802e124 ) - 802df78: 4293 cmp r3, r2 - 802df7a: d041 beq.n 802e000 - 802df7c: 687b ldr r3, [r7, #4] - 802df7e: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df80: 681b ldr r3, [r3, #0] - 802df82: 4a69 ldr r2, [pc, #420] ; (802e128 ) - 802df84: 4293 cmp r3, r2 - 802df86: d03b beq.n 802e000 - 802df88: 687b ldr r3, [r7, #4] - 802df8a: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df8c: 681b ldr r3, [r3, #0] - 802df8e: 4a67 ldr r2, [pc, #412] ; (802e12c ) - 802df90: 4293 cmp r3, r2 - 802df92: d035 beq.n 802e000 - 802df94: 687b ldr r3, [r7, #4] - 802df96: 6b9b ldr r3, [r3, #56] ; 0x38 - 802df98: 681b ldr r3, [r3, #0] - 802df9a: 4a65 ldr r2, [pc, #404] ; (802e130 ) - 802df9c: 4293 cmp r3, r2 - 802df9e: d02f beq.n 802e000 - 802dfa0: 687b ldr r3, [r7, #4] - 802dfa2: 6b9b ldr r3, [r3, #56] ; 0x38 - 802dfa4: 681b ldr r3, [r3, #0] - 802dfa6: 4a63 ldr r2, [pc, #396] ; (802e134 ) - 802dfa8: 4293 cmp r3, r2 - 802dfaa: d029 beq.n 802e000 - 802dfac: 687b ldr r3, [r7, #4] - 802dfae: 6b9b ldr r3, [r3, #56] ; 0x38 - 802dfb0: 681b ldr r3, [r3, #0] - 802dfb2: 4a61 ldr r2, [pc, #388] ; (802e138 ) - 802dfb4: 4293 cmp r3, r2 - 802dfb6: d023 beq.n 802e000 - 802dfb8: 687b ldr r3, [r7, #4] - 802dfba: 6b9b ldr r3, [r3, #56] ; 0x38 - 802dfbc: 681b ldr r3, [r3, #0] - 802dfbe: 4a5f ldr r2, [pc, #380] ; (802e13c ) - 802dfc0: 4293 cmp r3, r2 - 802dfc2: d01d beq.n 802e000 802dfc4: 687b ldr r3, [r7, #4] 802dfc6: 6b9b ldr r3, [r3, #56] ; 0x38 802dfc8: 681b ldr r3, [r3, #0] - 802dfca: 4a5d ldr r2, [pc, #372] ; (802e140 ) + 802dfca: 4a73 ldr r2, [pc, #460] ; (802e198 ) 802dfcc: 4293 cmp r3, r2 - 802dfce: d017 beq.n 802e000 + 802dfce: d059 beq.n 802e084 802dfd0: 687b ldr r3, [r7, #4] 802dfd2: 6b9b ldr r3, [r3, #56] ; 0x38 802dfd4: 681b ldr r3, [r3, #0] - 802dfd6: 4a5b ldr r2, [pc, #364] ; (802e144 ) + 802dfd6: 4a71 ldr r2, [pc, #452] ; (802e19c ) 802dfd8: 4293 cmp r3, r2 - 802dfda: d011 beq.n 802e000 + 802dfda: d053 beq.n 802e084 802dfdc: 687b ldr r3, [r7, #4] 802dfde: 6b9b ldr r3, [r3, #56] ; 0x38 802dfe0: 681b ldr r3, [r3, #0] - 802dfe2: 4a59 ldr r2, [pc, #356] ; (802e148 ) + 802dfe2: 4a6f ldr r2, [pc, #444] ; (802e1a0 ) 802dfe4: 4293 cmp r3, r2 - 802dfe6: d00b beq.n 802e000 + 802dfe6: d04d beq.n 802e084 802dfe8: 687b ldr r3, [r7, #4] 802dfea: 6b9b ldr r3, [r3, #56] ; 0x38 802dfec: 681b ldr r3, [r3, #0] - 802dfee: 4a57 ldr r2, [pc, #348] ; (802e14c ) + 802dfee: 4a6d ldr r2, [pc, #436] ; (802e1a4 ) 802dff0: 4293 cmp r3, r2 - 802dff2: d005 beq.n 802e000 + 802dff2: d047 beq.n 802e084 802dff4: 687b ldr r3, [r7, #4] 802dff6: 6b9b ldr r3, [r3, #56] ; 0x38 802dff8: 681b ldr r3, [r3, #0] - 802dffa: 4a55 ldr r2, [pc, #340] ; (802e150 ) + 802dffa: 4a6b ldr r2, [pc, #428] ; (802e1a8 ) 802dffc: 4293 cmp r3, r2 - 802dffe: d105 bne.n 802e00c + 802dffe: d041 beq.n 802e084 802e000: 687b ldr r3, [r7, #4] 802e002: 6b9b ldr r3, [r3, #56] ; 0x38 802e004: 681b ldr r3, [r3, #0] - 802e006: 685b ldr r3, [r3, #4] - 802e008: b29b uxth r3, r3 - 802e00a: e004 b.n 802e016 + 802e006: 4a69 ldr r2, [pc, #420] ; (802e1ac ) + 802e008: 4293 cmp r3, r2 + 802e00a: d03b beq.n 802e084 802e00c: 687b ldr r3, [r7, #4] 802e00e: 6b9b ldr r3, [r3, #56] ; 0x38 802e010: 681b ldr r3, [r3, #0] - 802e012: 685b ldr r3, [r3, #4] - 802e014: b29b uxth r3, r3 - 802e016: 687a ldr r2, [r7, #4] - 802e018: 8553 strh r3, [r2, #42] ; 0x2a - 802e01a: e0a2 b.n 802e162 + 802e012: 4a67 ldr r2, [pc, #412] ; (802e1b0 ) + 802e014: 4293 cmp r3, r2 + 802e016: d035 beq.n 802e084 + 802e018: 687b ldr r3, [r7, #4] + 802e01a: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e01c: 681b ldr r3, [r3, #0] + 802e01e: 4a65 ldr r2, [pc, #404] ; (802e1b4 ) + 802e020: 4293 cmp r3, r2 + 802e022: d02f beq.n 802e084 + 802e024: 687b ldr r3, [r7, #4] + 802e026: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e028: 681b ldr r3, [r3, #0] + 802e02a: 4a63 ldr r2, [pc, #396] ; (802e1b8 ) + 802e02c: 4293 cmp r3, r2 + 802e02e: d029 beq.n 802e084 + 802e030: 687b ldr r3, [r7, #4] + 802e032: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e034: 681b ldr r3, [r3, #0] + 802e036: 4a61 ldr r2, [pc, #388] ; (802e1bc ) + 802e038: 4293 cmp r3, r2 + 802e03a: d023 beq.n 802e084 + 802e03c: 687b ldr r3, [r7, #4] + 802e03e: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e040: 681b ldr r3, [r3, #0] + 802e042: 4a5f ldr r2, [pc, #380] ; (802e1c0 ) + 802e044: 4293 cmp r3, r2 + 802e046: d01d beq.n 802e084 + 802e048: 687b ldr r3, [r7, #4] + 802e04a: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e04c: 681b ldr r3, [r3, #0] + 802e04e: 4a5d ldr r2, [pc, #372] ; (802e1c4 ) + 802e050: 4293 cmp r3, r2 + 802e052: d017 beq.n 802e084 + 802e054: 687b ldr r3, [r7, #4] + 802e056: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e058: 681b ldr r3, [r3, #0] + 802e05a: 4a5b ldr r2, [pc, #364] ; (802e1c8 ) + 802e05c: 4293 cmp r3, r2 + 802e05e: d011 beq.n 802e084 + 802e060: 687b ldr r3, [r7, #4] + 802e062: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e064: 681b ldr r3, [r3, #0] + 802e066: 4a59 ldr r2, [pc, #356] ; (802e1cc ) + 802e068: 4293 cmp r3, r2 + 802e06a: d00b beq.n 802e084 + 802e06c: 687b ldr r3, [r7, #4] + 802e06e: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e070: 681b ldr r3, [r3, #0] + 802e072: 4a57 ldr r2, [pc, #348] ; (802e1d0 ) + 802e074: 4293 cmp r3, r2 + 802e076: d005 beq.n 802e084 + 802e078: 687b ldr r3, [r7, #4] + 802e07a: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e07c: 681b ldr r3, [r3, #0] + 802e07e: 4a55 ldr r2, [pc, #340] ; (802e1d4 ) + 802e080: 4293 cmp r3, r2 + 802e082: d105 bne.n 802e090 + 802e084: 687b ldr r3, [r7, #4] + 802e086: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e088: 681b ldr r3, [r3, #0] + 802e08a: 685b ldr r3, [r3, #4] + 802e08c: b29b uxth r3, r3 + 802e08e: e004 b.n 802e09a + 802e090: 687b ldr r3, [r7, #4] + 802e092: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e094: 681b ldr r3, [r3, #0] + 802e096: 685b ldr r3, [r3, #4] + 802e098: b29b uxth r3, r3 + 802e09a: 687a ldr r2, [r7, #4] + 802e09c: 8553 strh r3, [r2, #42] ; 0x2a + 802e09e: e0a2 b.n 802e1e6 } } else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) - 802e01c: 693b ldr r3, [r7, #16] - 802e01e: 0bdb lsrs r3, r3, #15 - 802e020: f003 0301 and.w r3, r3, #1 - 802e024: 2b00 cmp r3, #0 - 802e026: f000 809c beq.w 802e162 + 802e0a0: 693b ldr r3, [r7, #16] + 802e0a2: 0bdb lsrs r3, r3, #15 + 802e0a4: f003 0301 and.w r3, r3, #1 + 802e0a8: 2b00 cmp r3, #0 + 802e0aa: f000 809c beq.w 802e1e6 { /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - 802e02a: 687b ldr r3, [r7, #4] - 802e02c: 681b ldr r3, [r3, #0] - 802e02e: 681a ldr r2, [r3, #0] - 802e030: 687b ldr r3, [r7, #4] - 802e032: 681b ldr r3, [r3, #0] - 802e034: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802e038: 601a str r2, [r3, #0] + 802e0ae: 687b ldr r3, [r7, #4] + 802e0b0: 681b ldr r3, [r3, #0] + 802e0b2: 681a ldr r2, [r3, #0] + 802e0b4: 687b ldr r3, [r7, #4] + 802e0b6: 681b ldr r3, [r3, #0] + 802e0b8: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802e0bc: 601a str r2, [r3, #0] if (hi2c->hdmarx != NULL) - 802e03a: 687b ldr r3, [r7, #4] - 802e03c: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e03e: 2b00 cmp r3, #0 - 802e040: f000 808f beq.w 802e162 + 802e0be: 687b ldr r3, [r7, #4] + 802e0c0: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e0c2: 2b00 cmp r3, #0 + 802e0c4: f000 808f beq.w 802e1e6 { hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx); - 802e044: 687b ldr r3, [r7, #4] - 802e046: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e048: 681b ldr r3, [r3, #0] - 802e04a: 4a32 ldr r2, [pc, #200] ; (802e114 ) - 802e04c: 4293 cmp r3, r2 - 802e04e: d059 beq.n 802e104 - 802e050: 687b ldr r3, [r7, #4] - 802e052: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e054: 681b ldr r3, [r3, #0] - 802e056: 4a30 ldr r2, [pc, #192] ; (802e118 ) - 802e058: 4293 cmp r3, r2 - 802e05a: d053 beq.n 802e104 - 802e05c: 687b ldr r3, [r7, #4] - 802e05e: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e060: 681b ldr r3, [r3, #0] - 802e062: 4a2e ldr r2, [pc, #184] ; (802e11c ) - 802e064: 4293 cmp r3, r2 - 802e066: d04d beq.n 802e104 - 802e068: 687b ldr r3, [r7, #4] - 802e06a: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e06c: 681b ldr r3, [r3, #0] - 802e06e: 4a2c ldr r2, [pc, #176] ; (802e120 ) - 802e070: 4293 cmp r3, r2 - 802e072: d047 beq.n 802e104 - 802e074: 687b ldr r3, [r7, #4] - 802e076: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e078: 681b ldr r3, [r3, #0] - 802e07a: 4a2a ldr r2, [pc, #168] ; (802e124 ) - 802e07c: 4293 cmp r3, r2 - 802e07e: d041 beq.n 802e104 - 802e080: 687b ldr r3, [r7, #4] - 802e082: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e084: 681b ldr r3, [r3, #0] - 802e086: 4a28 ldr r2, [pc, #160] ; (802e128 ) - 802e088: 4293 cmp r3, r2 - 802e08a: d03b beq.n 802e104 - 802e08c: 687b ldr r3, [r7, #4] - 802e08e: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e090: 681b ldr r3, [r3, #0] - 802e092: 4a26 ldr r2, [pc, #152] ; (802e12c ) - 802e094: 4293 cmp r3, r2 - 802e096: d035 beq.n 802e104 - 802e098: 687b ldr r3, [r7, #4] - 802e09a: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e09c: 681b ldr r3, [r3, #0] - 802e09e: 4a24 ldr r2, [pc, #144] ; (802e130 ) - 802e0a0: 4293 cmp r3, r2 - 802e0a2: d02f beq.n 802e104 - 802e0a4: 687b ldr r3, [r7, #4] - 802e0a6: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e0a8: 681b ldr r3, [r3, #0] - 802e0aa: 4a22 ldr r2, [pc, #136] ; (802e134 ) - 802e0ac: 4293 cmp r3, r2 - 802e0ae: d029 beq.n 802e104 - 802e0b0: 687b ldr r3, [r7, #4] - 802e0b2: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e0b4: 681b ldr r3, [r3, #0] - 802e0b6: 4a20 ldr r2, [pc, #128] ; (802e138 ) - 802e0b8: 4293 cmp r3, r2 - 802e0ba: d023 beq.n 802e104 - 802e0bc: 687b ldr r3, [r7, #4] - 802e0be: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e0c0: 681b ldr r3, [r3, #0] - 802e0c2: 4a1e ldr r2, [pc, #120] ; (802e13c ) - 802e0c4: 4293 cmp r3, r2 - 802e0c6: d01d beq.n 802e104 802e0c8: 687b ldr r3, [r7, #4] 802e0ca: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0cc: 681b ldr r3, [r3, #0] - 802e0ce: 4a1c ldr r2, [pc, #112] ; (802e140 ) + 802e0ce: 4a32 ldr r2, [pc, #200] ; (802e198 ) 802e0d0: 4293 cmp r3, r2 - 802e0d2: d017 beq.n 802e104 + 802e0d2: d059 beq.n 802e188 802e0d4: 687b ldr r3, [r7, #4] 802e0d6: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0d8: 681b ldr r3, [r3, #0] - 802e0da: 4a1a ldr r2, [pc, #104] ; (802e144 ) + 802e0da: 4a30 ldr r2, [pc, #192] ; (802e19c ) 802e0dc: 4293 cmp r3, r2 - 802e0de: d011 beq.n 802e104 + 802e0de: d053 beq.n 802e188 802e0e0: 687b ldr r3, [r7, #4] 802e0e2: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0e4: 681b ldr r3, [r3, #0] - 802e0e6: 4a18 ldr r2, [pc, #96] ; (802e148 ) + 802e0e6: 4a2e ldr r2, [pc, #184] ; (802e1a0 ) 802e0e8: 4293 cmp r3, r2 - 802e0ea: d00b beq.n 802e104 + 802e0ea: d04d beq.n 802e188 802e0ec: 687b ldr r3, [r7, #4] 802e0ee: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0f0: 681b ldr r3, [r3, #0] - 802e0f2: 4a16 ldr r2, [pc, #88] ; (802e14c ) + 802e0f2: 4a2c ldr r2, [pc, #176] ; (802e1a4 ) 802e0f4: 4293 cmp r3, r2 - 802e0f6: d005 beq.n 802e104 + 802e0f6: d047 beq.n 802e188 802e0f8: 687b ldr r3, [r7, #4] 802e0fa: 6bdb ldr r3, [r3, #60] ; 0x3c 802e0fc: 681b ldr r3, [r3, #0] - 802e0fe: 4a14 ldr r2, [pc, #80] ; (802e150 ) + 802e0fe: 4a2a ldr r2, [pc, #168] ; (802e1a8 ) 802e100: 4293 cmp r3, r2 - 802e102: d127 bne.n 802e154 + 802e102: d041 beq.n 802e188 802e104: 687b ldr r3, [r7, #4] 802e106: 6bdb ldr r3, [r3, #60] ; 0x3c 802e108: 681b ldr r3, [r3, #0] - 802e10a: 685b ldr r3, [r3, #4] - 802e10c: b29b uxth r3, r3 - 802e10e: e026 b.n 802e15e - 802e110: fe00e800 .word 0xfe00e800 - 802e114: 40020010 .word 0x40020010 - 802e118: 40020028 .word 0x40020028 - 802e11c: 40020040 .word 0x40020040 - 802e120: 40020058 .word 0x40020058 - 802e124: 40020070 .word 0x40020070 - 802e128: 40020088 .word 0x40020088 - 802e12c: 400200a0 .word 0x400200a0 - 802e130: 400200b8 .word 0x400200b8 - 802e134: 40020410 .word 0x40020410 - 802e138: 40020428 .word 0x40020428 - 802e13c: 40020440 .word 0x40020440 - 802e140: 40020458 .word 0x40020458 - 802e144: 40020470 .word 0x40020470 - 802e148: 40020488 .word 0x40020488 - 802e14c: 400204a0 .word 0x400204a0 - 802e150: 400204b8 .word 0x400204b8 - 802e154: 687b ldr r3, [r7, #4] - 802e156: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e158: 681b ldr r3, [r3, #0] - 802e15a: 685b ldr r3, [r3, #4] - 802e15c: b29b uxth r3, r3 - 802e15e: 687a ldr r2, [r7, #4] - 802e160: 8553 strh r3, [r2, #42] ; 0x2a + 802e10a: 4a28 ldr r2, [pc, #160] ; (802e1ac ) + 802e10c: 4293 cmp r3, r2 + 802e10e: d03b beq.n 802e188 + 802e110: 687b ldr r3, [r7, #4] + 802e112: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e114: 681b ldr r3, [r3, #0] + 802e116: 4a26 ldr r2, [pc, #152] ; (802e1b0 ) + 802e118: 4293 cmp r3, r2 + 802e11a: d035 beq.n 802e188 + 802e11c: 687b ldr r3, [r7, #4] + 802e11e: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e120: 681b ldr r3, [r3, #0] + 802e122: 4a24 ldr r2, [pc, #144] ; (802e1b4 ) + 802e124: 4293 cmp r3, r2 + 802e126: d02f beq.n 802e188 + 802e128: 687b ldr r3, [r7, #4] + 802e12a: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e12c: 681b ldr r3, [r3, #0] + 802e12e: 4a22 ldr r2, [pc, #136] ; (802e1b8 ) + 802e130: 4293 cmp r3, r2 + 802e132: d029 beq.n 802e188 + 802e134: 687b ldr r3, [r7, #4] + 802e136: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e138: 681b ldr r3, [r3, #0] + 802e13a: 4a20 ldr r2, [pc, #128] ; (802e1bc ) + 802e13c: 4293 cmp r3, r2 + 802e13e: d023 beq.n 802e188 + 802e140: 687b ldr r3, [r7, #4] + 802e142: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e144: 681b ldr r3, [r3, #0] + 802e146: 4a1e ldr r2, [pc, #120] ; (802e1c0 ) + 802e148: 4293 cmp r3, r2 + 802e14a: d01d beq.n 802e188 + 802e14c: 687b ldr r3, [r7, #4] + 802e14e: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e150: 681b ldr r3, [r3, #0] + 802e152: 4a1c ldr r2, [pc, #112] ; (802e1c4 ) + 802e154: 4293 cmp r3, r2 + 802e156: d017 beq.n 802e188 + 802e158: 687b ldr r3, [r7, #4] + 802e15a: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e15c: 681b ldr r3, [r3, #0] + 802e15e: 4a1a ldr r2, [pc, #104] ; (802e1c8 ) + 802e160: 4293 cmp r3, r2 + 802e162: d011 beq.n 802e188 + 802e164: 687b ldr r3, [r7, #4] + 802e166: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e168: 681b ldr r3, [r3, #0] + 802e16a: 4a18 ldr r2, [pc, #96] ; (802e1cc ) + 802e16c: 4293 cmp r3, r2 + 802e16e: d00b beq.n 802e188 + 802e170: 687b ldr r3, [r7, #4] + 802e172: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e174: 681b ldr r3, [r3, #0] + 802e176: 4a16 ldr r2, [pc, #88] ; (802e1d0 ) + 802e178: 4293 cmp r3, r2 + 802e17a: d005 beq.n 802e188 + 802e17c: 687b ldr r3, [r7, #4] + 802e17e: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e180: 681b ldr r3, [r3, #0] + 802e182: 4a14 ldr r2, [pc, #80] ; (802e1d4 ) + 802e184: 4293 cmp r3, r2 + 802e186: d127 bne.n 802e1d8 + 802e188: 687b ldr r3, [r7, #4] + 802e18a: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e18c: 681b ldr r3, [r3, #0] + 802e18e: 685b ldr r3, [r3, #4] + 802e190: b29b uxth r3, r3 + 802e192: e026 b.n 802e1e2 + 802e194: fe00e800 .word 0xfe00e800 + 802e198: 40020010 .word 0x40020010 + 802e19c: 40020028 .word 0x40020028 + 802e1a0: 40020040 .word 0x40020040 + 802e1a4: 40020058 .word 0x40020058 + 802e1a8: 40020070 .word 0x40020070 + 802e1ac: 40020088 .word 0x40020088 + 802e1b0: 400200a0 .word 0x400200a0 + 802e1b4: 400200b8 .word 0x400200b8 + 802e1b8: 40020410 .word 0x40020410 + 802e1bc: 40020428 .word 0x40020428 + 802e1c0: 40020440 .word 0x40020440 + 802e1c4: 40020458 .word 0x40020458 + 802e1c8: 40020470 .word 0x40020470 + 802e1cc: 40020488 .word 0x40020488 + 802e1d0: 400204a0 .word 0x400204a0 + 802e1d4: 400204b8 .word 0x400204b8 + 802e1d8: 687b ldr r3, [r7, #4] + 802e1da: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e1dc: 681b ldr r3, [r3, #0] + 802e1de: 685b ldr r3, [r3, #4] + 802e1e0: b29b uxth r3, r3 + 802e1e2: 687a ldr r2, [r7, #4] + 802e1e4: 8553 strh r3, [r2, #42] ; 0x2a { /* Do nothing */ } /* Store Last receive data if any */ if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) - 802e162: 697b ldr r3, [r7, #20] - 802e164: 089b lsrs r3, r3, #2 - 802e166: f003 0301 and.w r3, r3, #1 - 802e16a: 2b00 cmp r3, #0 - 802e16c: d020 beq.n 802e1b0 + 802e1e6: 697b ldr r3, [r7, #20] + 802e1e8: 089b lsrs r3, r3, #2 + 802e1ea: f003 0301 and.w r3, r3, #1 + 802e1ee: 2b00 cmp r3, #0 + 802e1f0: d020 beq.n 802e234 { /* Remove RXNE flag on temporary variable as read done */ tmpITFlags &= ~I2C_FLAG_RXNE; - 802e16e: 697b ldr r3, [r7, #20] - 802e170: f023 0304 bic.w r3, r3, #4 - 802e174: 617b str r3, [r7, #20] + 802e1f2: 697b ldr r3, [r7, #20] + 802e1f4: f023 0304 bic.w r3, r3, #4 + 802e1f8: 617b str r3, [r7, #20] /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - 802e176: 687b ldr r3, [r7, #4] - 802e178: 681b ldr r3, [r3, #0] - 802e17a: 6a5a ldr r2, [r3, #36] ; 0x24 - 802e17c: 687b ldr r3, [r7, #4] - 802e17e: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e180: b2d2 uxtb r2, r2 - 802e182: 701a strb r2, [r3, #0] + 802e1fa: 687b ldr r3, [r7, #4] + 802e1fc: 681b ldr r3, [r3, #0] + 802e1fe: 6a5a ldr r2, [r3, #36] ; 0x24 + 802e200: 687b ldr r3, [r7, #4] + 802e202: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e204: b2d2 uxtb r2, r2 + 802e206: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 802e184: 687b ldr r3, [r7, #4] - 802e186: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e188: 1c5a adds r2, r3, #1 - 802e18a: 687b ldr r3, [r7, #4] - 802e18c: 625a str r2, [r3, #36] ; 0x24 + 802e208: 687b ldr r3, [r7, #4] + 802e20a: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e20c: 1c5a adds r2, r3, #1 + 802e20e: 687b ldr r3, [r7, #4] + 802e210: 625a str r2, [r3, #36] ; 0x24 if ((hi2c->XferSize > 0U)) - 802e18e: 687b ldr r3, [r7, #4] - 802e190: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802e192: 2b00 cmp r3, #0 - 802e194: d00c beq.n 802e1b0 + 802e212: 687b ldr r3, [r7, #4] + 802e214: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802e216: 2b00 cmp r3, #0 + 802e218: d00c beq.n 802e234 { hi2c->XferSize--; - 802e196: 687b ldr r3, [r7, #4] - 802e198: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802e19a: 3b01 subs r3, #1 - 802e19c: b29a uxth r2, r3 - 802e19e: 687b ldr r3, [r7, #4] - 802e1a0: 851a strh r2, [r3, #40] ; 0x28 + 802e21a: 687b ldr r3, [r7, #4] + 802e21c: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802e21e: 3b01 subs r3, #1 + 802e220: b29a uxth r2, r3 + 802e222: 687b ldr r3, [r7, #4] + 802e224: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; - 802e1a2: 687b ldr r3, [r7, #4] - 802e1a4: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802e1a6: b29b uxth r3, r3 - 802e1a8: 3b01 subs r3, #1 - 802e1aa: b29a uxth r2, r3 - 802e1ac: 687b ldr r3, [r7, #4] - 802e1ae: 855a strh r2, [r3, #42] ; 0x2a + 802e226: 687b ldr r3, [r7, #4] + 802e228: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802e22a: b29b uxth r3, r3 + 802e22c: 3b01 subs r3, #1 + 802e22e: b29a uxth r2, r3 + 802e230: 687b ldr r3, [r7, #4] + 802e232: 855a strh r2, [r3, #42] ; 0x2a } } /* All data are not transferred, so set error code accordingly */ if (hi2c->XferCount != 0U) - 802e1b0: 687b ldr r3, [r7, #4] - 802e1b2: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802e1b4: b29b uxth r3, r3 - 802e1b6: 2b00 cmp r3, #0 - 802e1b8: d005 beq.n 802e1c6 + 802e234: 687b ldr r3, [r7, #4] + 802e236: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802e238: b29b uxth r3, r3 + 802e23a: 2b00 cmp r3, #0 + 802e23c: d005 beq.n 802e24a { /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 802e1ba: 687b ldr r3, [r7, #4] - 802e1bc: 6c5b ldr r3, [r3, #68] ; 0x44 - 802e1be: f043 0204 orr.w r2, r3, #4 - 802e1c2: 687b ldr r3, [r7, #4] - 802e1c4: 645a str r2, [r3, #68] ; 0x44 + 802e23e: 687b ldr r3, [r7, #4] + 802e240: 6c5b ldr r3, [r3, #68] ; 0x44 + 802e242: f043 0204 orr.w r2, r3, #4 + 802e246: 687b ldr r3, [r7, #4] + 802e248: 645a str r2, [r3, #68] ; 0x44 } hi2c->Mode = HAL_I2C_MODE_NONE; - 802e1c6: 687b ldr r3, [r7, #4] - 802e1c8: 2200 movs r2, #0 - 802e1ca: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802e24a: 687b ldr r3, [r7, #4] + 802e24c: 2200 movs r2, #0 + 802e24e: f883 2042 strb.w r2, [r3, #66] ; 0x42 hi2c->XferISR = NULL; - 802e1ce: 687b ldr r3, [r7, #4] - 802e1d0: 2200 movs r2, #0 - 802e1d2: 635a str r2, [r3, #52] ; 0x34 + 802e252: 687b ldr r3, [r7, #4] + 802e254: 2200 movs r2, #0 + 802e256: 635a str r2, [r3, #52] ; 0x34 if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) - 802e1d4: 687b ldr r3, [r7, #4] - 802e1d6: 6c5b ldr r3, [r3, #68] ; 0x44 - 802e1d8: 2b00 cmp r3, #0 - 802e1da: d010 beq.n 802e1fe + 802e258: 687b ldr r3, [r7, #4] + 802e25a: 6c5b ldr r3, [r3, #68] ; 0x44 + 802e25c: 2b00 cmp r3, #0 + 802e25e: d010 beq.n 802e282 { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c, hi2c->ErrorCode); - 802e1dc: 687b ldr r3, [r7, #4] - 802e1de: 6c5b ldr r3, [r3, #68] ; 0x44 - 802e1e0: 4619 mov r1, r3 - 802e1e2: 6878 ldr r0, [r7, #4] - 802e1e4: f000 f8a4 bl 802e330 + 802e260: 687b ldr r3, [r7, #4] + 802e262: 6c5b ldr r3, [r3, #68] ; 0x44 + 802e264: 4619 mov r1, r3 + 802e266: 6878 ldr r0, [r7, #4] + 802e268: f000 f8a4 bl 802e3b4 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ if (hi2c->State == HAL_I2C_STATE_LISTEN) - 802e1e8: 687b ldr r3, [r7, #4] - 802e1ea: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e1ee: b2db uxtb r3, r3 - 802e1f0: 2b28 cmp r3, #40 ; 0x28 - 802e1f2: d141 bne.n 802e278 + 802e26c: 687b ldr r3, [r7, #4] + 802e26e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e272: b2db uxtb r3, r3 + 802e274: 2b28 cmp r3, #40 ; 0x28 + 802e276: d141 bne.n 802e2fc { /* Call I2C Listen complete process */ I2C_ITListenCplt(hi2c, tmpITFlags); - 802e1f4: 6979 ldr r1, [r7, #20] - 802e1f6: 6878 ldr r0, [r7, #4] - 802e1f8: f000 f844 bl 802e284 + 802e278: 6979 ldr r1, [r7, #20] + 802e27a: 6878 ldr r0, [r7, #4] + 802e27c: f000 f844 bl 802e308 hi2c->SlaveTxCpltCallback(hi2c); #else HAL_I2C_SlaveTxCpltCallback(hi2c); #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } - 802e1fc: e03c b.n 802e278 + 802e280: e03c b.n 802e2fc else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) - 802e1fe: 687b ldr r3, [r7, #4] - 802e200: 6adb ldr r3, [r3, #44] ; 0x2c - 802e202: f513 3f80 cmn.w r3, #65536 ; 0x10000 - 802e206: d014 beq.n 802e232 + 802e282: 687b ldr r3, [r7, #4] + 802e284: 6adb ldr r3, [r3, #44] ; 0x2c + 802e286: f513 3f80 cmn.w r3, #65536 ; 0x10000 + 802e28a: d014 beq.n 802e2b6 I2C_ITSlaveSeqCplt(hi2c); - 802e208: 6878 ldr r0, [r7, #4] - 802e20a: f7ff fde5 bl 802ddd8 + 802e28c: 6878 ldr r0, [r7, #4] + 802e28e: f7ff fde5 bl 802de5c hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 802e20e: 687b ldr r3, [r7, #4] - 802e210: 4a1b ldr r2, [pc, #108] ; (802e280 ) - 802e212: 62da str r2, [r3, #44] ; 0x2c + 802e292: 687b ldr r3, [r7, #4] + 802e294: 4a1b ldr r2, [pc, #108] ; (802e304 ) + 802e296: 62da str r2, [r3, #44] ; 0x2c hi2c->State = HAL_I2C_STATE_READY; - 802e214: 687b ldr r3, [r7, #4] - 802e216: 2220 movs r2, #32 - 802e218: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e298: 687b ldr r3, [r7, #4] + 802e29a: 2220 movs r2, #32 + 802e29c: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802e21c: 687b ldr r3, [r7, #4] - 802e21e: 2200 movs r2, #0 - 802e220: 631a str r2, [r3, #48] ; 0x30 + 802e2a0: 687b ldr r3, [r7, #4] + 802e2a2: 2200 movs r2, #0 + 802e2a4: 631a str r2, [r3, #48] ; 0x30 __HAL_UNLOCK(hi2c); - 802e222: 687b ldr r3, [r7, #4] - 802e224: 2200 movs r2, #0 - 802e226: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e2a6: 687b ldr r3, [r7, #4] + 802e2a8: 2200 movs r2, #0 + 802e2aa: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_ListenCpltCallback(hi2c); - 802e22a: 6878 ldr r0, [r7, #4] - 802e22c: f7ff fc2f bl 802da8e + 802e2ae: 6878 ldr r0, [r7, #4] + 802e2b0: f7ff fc2f bl 802db12 } - 802e230: e022 b.n 802e278 + 802e2b4: e022 b.n 802e2fc else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - 802e232: 687b ldr r3, [r7, #4] - 802e234: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e238: b2db uxtb r3, r3 - 802e23a: 2b22 cmp r3, #34 ; 0x22 - 802e23c: d10e bne.n 802e25c + 802e2b6: 687b ldr r3, [r7, #4] + 802e2b8: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e2bc: b2db uxtb r3, r3 + 802e2be: 2b22 cmp r3, #34 ; 0x22 + 802e2c0: d10e bne.n 802e2e0 hi2c->State = HAL_I2C_STATE_READY; - 802e23e: 687b ldr r3, [r7, #4] - 802e240: 2220 movs r2, #32 - 802e242: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e2c2: 687b ldr r3, [r7, #4] + 802e2c4: 2220 movs r2, #32 + 802e2c6: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802e246: 687b ldr r3, [r7, #4] - 802e248: 2200 movs r2, #0 - 802e24a: 631a str r2, [r3, #48] ; 0x30 + 802e2ca: 687b ldr r3, [r7, #4] + 802e2cc: 2200 movs r2, #0 + 802e2ce: 631a str r2, [r3, #48] ; 0x30 __HAL_UNLOCK(hi2c); - 802e24c: 687b ldr r3, [r7, #4] - 802e24e: 2200 movs r2, #0 - 802e250: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e2d0: 687b ldr r3, [r7, #4] + 802e2d2: 2200 movs r2, #0 + 802e2d4: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_SlaveRxCpltCallback(hi2c); - 802e254: 6878 ldr r0, [r7, #4] - 802e256: f7ff fc02 bl 802da5e + 802e2d8: 6878 ldr r0, [r7, #4] + 802e2da: f7ff fc02 bl 802dae2 } - 802e25a: e00d b.n 802e278 + 802e2de: e00d b.n 802e2fc hi2c->State = HAL_I2C_STATE_READY; - 802e25c: 687b ldr r3, [r7, #4] - 802e25e: 2220 movs r2, #32 - 802e260: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e2e0: 687b ldr r3, [r7, #4] + 802e2e2: 2220 movs r2, #32 + 802e2e4: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802e264: 687b ldr r3, [r7, #4] - 802e266: 2200 movs r2, #0 - 802e268: 631a str r2, [r3, #48] ; 0x30 + 802e2e8: 687b ldr r3, [r7, #4] + 802e2ea: 2200 movs r2, #0 + 802e2ec: 631a str r2, [r3, #48] ; 0x30 __HAL_UNLOCK(hi2c); - 802e26a: 687b ldr r3, [r7, #4] - 802e26c: 2200 movs r2, #0 - 802e26e: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e2ee: 687b ldr r3, [r7, #4] + 802e2f0: 2200 movs r2, #0 + 802e2f2: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_SlaveTxCpltCallback(hi2c); - 802e272: 6878 ldr r0, [r7, #4] - 802e274: f7ff fbe9 bl 802da4a + 802e2f6: 6878 ldr r0, [r7, #4] + 802e2f8: f7ff fbe9 bl 802dace } - 802e278: bf00 nop - 802e27a: 3718 adds r7, #24 - 802e27c: 46bd mov sp, r7 - 802e27e: bd80 pop {r7, pc} - 802e280: ffff0000 .word 0xffff0000 + 802e2fc: bf00 nop + 802e2fe: 3718 adds r7, #24 + 802e300: 46bd mov sp, r7 + 802e302: bd80 pop {r7, pc} + 802e304: ffff0000 .word 0xffff0000 -0802e284 : +0802e308 : * @param hi2c I2C handle. * @param ITFlags Interrupt flags to handle. * @retval None */ static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { - 802e284: b580 push {r7, lr} - 802e286: b082 sub sp, #8 - 802e288: af00 add r7, sp, #0 - 802e28a: 6078 str r0, [r7, #4] - 802e28c: 6039 str r1, [r7, #0] + 802e308: b580 push {r7, lr} + 802e30a: b082 sub sp, #8 + 802e30c: af00 add r7, sp, #0 + 802e30e: 6078 str r0, [r7, #4] + 802e310: 6039 str r1, [r7, #0] /* Reset handle parameters */ hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 802e28e: 687b ldr r3, [r7, #4] - 802e290: 4a26 ldr r2, [pc, #152] ; (802e32c ) - 802e292: 62da str r2, [r3, #44] ; 0x2c + 802e312: 687b ldr r3, [r7, #4] + 802e314: 4a26 ldr r2, [pc, #152] ; (802e3b0 ) + 802e316: 62da str r2, [r3, #44] ; 0x2c hi2c->PreviousState = I2C_STATE_NONE; - 802e294: 687b ldr r3, [r7, #4] - 802e296: 2200 movs r2, #0 - 802e298: 631a str r2, [r3, #48] ; 0x30 + 802e318: 687b ldr r3, [r7, #4] + 802e31a: 2200 movs r2, #0 + 802e31c: 631a str r2, [r3, #48] ; 0x30 hi2c->State = HAL_I2C_STATE_READY; - 802e29a: 687b ldr r3, [r7, #4] - 802e29c: 2220 movs r2, #32 - 802e29e: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e31e: 687b ldr r3, [r7, #4] + 802e320: 2220 movs r2, #32 + 802e322: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; - 802e2a2: 687b ldr r3, [r7, #4] - 802e2a4: 2200 movs r2, #0 - 802e2a6: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802e326: 687b ldr r3, [r7, #4] + 802e328: 2200 movs r2, #0 + 802e32a: f883 2042 strb.w r2, [r3, #66] ; 0x42 hi2c->XferISR = NULL; - 802e2aa: 687b ldr r3, [r7, #4] - 802e2ac: 2200 movs r2, #0 - 802e2ae: 635a str r2, [r3, #52] ; 0x34 + 802e32e: 687b ldr r3, [r7, #4] + 802e330: 2200 movs r2, #0 + 802e332: 635a str r2, [r3, #52] ; 0x34 /* Store Last receive data if any */ if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_RXNE) != RESET) - 802e2b0: 683b ldr r3, [r7, #0] - 802e2b2: 089b lsrs r3, r3, #2 - 802e2b4: f003 0301 and.w r3, r3, #1 - 802e2b8: 2b00 cmp r3, #0 - 802e2ba: d022 beq.n 802e302 + 802e334: 683b ldr r3, [r7, #0] + 802e336: 089b lsrs r3, r3, #2 + 802e338: f003 0301 and.w r3, r3, #1 + 802e33c: 2b00 cmp r3, #0 + 802e33e: d022 beq.n 802e386 { /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - 802e2bc: 687b ldr r3, [r7, #4] - 802e2be: 681b ldr r3, [r3, #0] - 802e2c0: 6a5a ldr r2, [r3, #36] ; 0x24 - 802e2c2: 687b ldr r3, [r7, #4] - 802e2c4: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e2c6: b2d2 uxtb r2, r2 - 802e2c8: 701a strb r2, [r3, #0] + 802e340: 687b ldr r3, [r7, #4] + 802e342: 681b ldr r3, [r3, #0] + 802e344: 6a5a ldr r2, [r3, #36] ; 0x24 + 802e346: 687b ldr r3, [r7, #4] + 802e348: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e34a: b2d2 uxtb r2, r2 + 802e34c: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 802e2ca: 687b ldr r3, [r7, #4] - 802e2cc: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e2ce: 1c5a adds r2, r3, #1 - 802e2d0: 687b ldr r3, [r7, #4] - 802e2d2: 625a str r2, [r3, #36] ; 0x24 + 802e34e: 687b ldr r3, [r7, #4] + 802e350: 6a5b ldr r3, [r3, #36] ; 0x24 + 802e352: 1c5a adds r2, r3, #1 + 802e354: 687b ldr r3, [r7, #4] + 802e356: 625a str r2, [r3, #36] ; 0x24 if ((hi2c->XferSize > 0U)) - 802e2d4: 687b ldr r3, [r7, #4] - 802e2d6: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802e2d8: 2b00 cmp r3, #0 - 802e2da: d012 beq.n 802e302 + 802e358: 687b ldr r3, [r7, #4] + 802e35a: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802e35c: 2b00 cmp r3, #0 + 802e35e: d012 beq.n 802e386 { hi2c->XferSize--; - 802e2dc: 687b ldr r3, [r7, #4] - 802e2de: 8d1b ldrh r3, [r3, #40] ; 0x28 - 802e2e0: 3b01 subs r3, #1 - 802e2e2: b29a uxth r2, r3 - 802e2e4: 687b ldr r3, [r7, #4] - 802e2e6: 851a strh r2, [r3, #40] ; 0x28 + 802e360: 687b ldr r3, [r7, #4] + 802e362: 8d1b ldrh r3, [r3, #40] ; 0x28 + 802e364: 3b01 subs r3, #1 + 802e366: b29a uxth r2, r3 + 802e368: 687b ldr r3, [r7, #4] + 802e36a: 851a strh r2, [r3, #40] ; 0x28 hi2c->XferCount--; - 802e2e8: 687b ldr r3, [r7, #4] - 802e2ea: 8d5b ldrh r3, [r3, #42] ; 0x2a - 802e2ec: b29b uxth r3, r3 - 802e2ee: 3b01 subs r3, #1 - 802e2f0: b29a uxth r2, r3 - 802e2f2: 687b ldr r3, [r7, #4] - 802e2f4: 855a strh r2, [r3, #42] ; 0x2a + 802e36c: 687b ldr r3, [r7, #4] + 802e36e: 8d5b ldrh r3, [r3, #42] ; 0x2a + 802e370: b29b uxth r3, r3 + 802e372: 3b01 subs r3, #1 + 802e374: b29a uxth r2, r3 + 802e376: 687b ldr r3, [r7, #4] + 802e378: 855a strh r2, [r3, #42] ; 0x2a /* Set ErrorCode corresponding to a Non-Acknowledge */ hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 802e2f6: 687b ldr r3, [r7, #4] - 802e2f8: 6c5b ldr r3, [r3, #68] ; 0x44 - 802e2fa: f043 0204 orr.w r2, r3, #4 - 802e2fe: 687b ldr r3, [r7, #4] - 802e300: 645a str r2, [r3, #68] ; 0x44 + 802e37a: 687b ldr r3, [r7, #4] + 802e37c: 6c5b ldr r3, [r3, #68] ; 0x44 + 802e37e: f043 0204 orr.w r2, r3, #4 + 802e382: 687b ldr r3, [r7, #4] + 802e384: 645a str r2, [r3, #68] ; 0x44 } } /* Disable all Interrupts*/ I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - 802e302: f248 0103 movw r1, #32771 ; 0x8003 - 802e306: 6878 ldr r0, [r7, #4] - 802e308: f000 f94b bl 802e5a2 + 802e386: f248 0103 movw r1, #32771 ; 0x8003 + 802e38a: 6878 ldr r0, [r7, #4] + 802e38c: f000 f94b bl 802e626 /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 802e30c: 687b ldr r3, [r7, #4] - 802e30e: 681b ldr r3, [r3, #0] - 802e310: 2210 movs r2, #16 - 802e312: 61da str r2, [r3, #28] + 802e390: 687b ldr r3, [r7, #4] + 802e392: 681b ldr r3, [r3, #0] + 802e394: 2210 movs r2, #16 + 802e396: 61da str r2, [r3, #28] /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e314: 687b ldr r3, [r7, #4] - 802e316: 2200 movs r2, #0 - 802e318: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e398: 687b ldr r3, [r7, #4] + 802e39a: 2200 movs r2, #0 + 802e39c: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->ListenCpltCallback(hi2c); #else HAL_I2C_ListenCpltCallback(hi2c); - 802e31c: 6878 ldr r0, [r7, #4] - 802e31e: f7ff fbb6 bl 802da8e + 802e3a0: 6878 ldr r0, [r7, #4] + 802e3a2: f7ff fbb6 bl 802db12 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } - 802e322: bf00 nop - 802e324: 3708 adds r7, #8 - 802e326: 46bd mov sp, r7 - 802e328: bd80 pop {r7, pc} - 802e32a: bf00 nop - 802e32c: ffff0000 .word 0xffff0000 + 802e3a6: bf00 nop + 802e3a8: 3708 adds r7, #8 + 802e3aa: 46bd mov sp, r7 + 802e3ac: bd80 pop {r7, pc} + 802e3ae: bf00 nop + 802e3b0: ffff0000 .word 0xffff0000 -0802e330 : +0802e3b4 : * @param hi2c I2C handle. * @param ErrorCode Error code to handle. * @retval None */ static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) { - 802e330: b580 push {r7, lr} - 802e332: b084 sub sp, #16 - 802e334: af00 add r7, sp, #0 - 802e336: 6078 str r0, [r7, #4] - 802e338: 6039 str r1, [r7, #0] + 802e3b4: b580 push {r7, lr} + 802e3b6: b084 sub sp, #16 + 802e3b8: af00 add r7, sp, #0 + 802e3ba: 6078 str r0, [r7, #4] + 802e3bc: 6039 str r1, [r7, #0] HAL_I2C_StateTypeDef tmpstate = hi2c->State; - 802e33a: 687b ldr r3, [r7, #4] - 802e33c: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e340: 73fb strb r3, [r7, #15] + 802e3be: 687b ldr r3, [r7, #4] + 802e3c0: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e3c4: 73fb strb r3, [r7, #15] uint32_t tmppreviousstate; /* Reset handle parameters */ hi2c->Mode = HAL_I2C_MODE_NONE; - 802e342: 687b ldr r3, [r7, #4] - 802e344: 2200 movs r2, #0 - 802e346: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 802e3c6: 687b ldr r3, [r7, #4] + 802e3c8: 2200 movs r2, #0 + 802e3ca: f883 2042 strb.w r2, [r3, #66] ; 0x42 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 802e34a: 687b ldr r3, [r7, #4] - 802e34c: 4a5d ldr r2, [pc, #372] ; (802e4c4 ) - 802e34e: 62da str r2, [r3, #44] ; 0x2c + 802e3ce: 687b ldr r3, [r7, #4] + 802e3d0: 4a5d ldr r2, [pc, #372] ; (802e548 ) + 802e3d2: 62da str r2, [r3, #44] ; 0x2c hi2c->XferCount = 0U; - 802e350: 687b ldr r3, [r7, #4] - 802e352: 2200 movs r2, #0 - 802e354: 855a strh r2, [r3, #42] ; 0x2a + 802e3d4: 687b ldr r3, [r7, #4] + 802e3d6: 2200 movs r2, #0 + 802e3d8: 855a strh r2, [r3, #42] ; 0x2a /* Set new error code */ hi2c->ErrorCode |= ErrorCode; - 802e356: 687b ldr r3, [r7, #4] - 802e358: 6c5a ldr r2, [r3, #68] ; 0x44 - 802e35a: 683b ldr r3, [r7, #0] - 802e35c: 431a orrs r2, r3 - 802e35e: 687b ldr r3, [r7, #4] - 802e360: 645a str r2, [r3, #68] ; 0x44 + 802e3da: 687b ldr r3, [r7, #4] + 802e3dc: 6c5a ldr r2, [r3, #68] ; 0x44 + 802e3de: 683b ldr r3, [r7, #0] + 802e3e0: 431a orrs r2, r3 + 802e3e2: 687b ldr r3, [r7, #4] + 802e3e4: 645a str r2, [r3, #68] ; 0x44 /* Disable Interrupts */ if ((tmpstate == HAL_I2C_STATE_LISTEN) || - 802e362: 7bfb ldrb r3, [r7, #15] - 802e364: 2b28 cmp r3, #40 ; 0x28 - 802e366: d005 beq.n 802e374 - 802e368: 7bfb ldrb r3, [r7, #15] - 802e36a: 2b29 cmp r3, #41 ; 0x29 - 802e36c: d002 beq.n 802e374 + 802e3e6: 7bfb ldrb r3, [r7, #15] + 802e3e8: 2b28 cmp r3, #40 ; 0x28 + 802e3ea: d005 beq.n 802e3f8 + 802e3ec: 7bfb ldrb r3, [r7, #15] + 802e3ee: 2b29 cmp r3, #41 ; 0x29 + 802e3f0: d002 beq.n 802e3f8 (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || - 802e36e: 7bfb ldrb r3, [r7, #15] - 802e370: 2b2a cmp r3, #42 ; 0x2a - 802e372: d10b bne.n 802e38c + 802e3f2: 7bfb ldrb r3, [r7, #15] + 802e3f4: 2b2a cmp r3, #42 ; 0x2a + 802e3f6: d10b bne.n 802e410 (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) { /* Disable all interrupts, except interrupts related to LISTEN state */ I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); - 802e374: 2103 movs r1, #3 - 802e376: 6878 ldr r0, [r7, #4] - 802e378: f000 f913 bl 802e5a2 + 802e3f8: 2103 movs r1, #3 + 802e3fa: 6878 ldr r0, [r7, #4] + 802e3fc: f000 f913 bl 802e626 /* keep HAL_I2C_STATE_LISTEN if set */ hi2c->State = HAL_I2C_STATE_LISTEN; - 802e37c: 687b ldr r3, [r7, #4] - 802e37e: 2228 movs r2, #40 ; 0x28 - 802e380: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e400: 687b ldr r3, [r7, #4] + 802e402: 2228 movs r2, #40 ; 0x28 + 802e404: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->XferISR = I2C_Slave_ISR_IT; - 802e384: 687b ldr r3, [r7, #4] - 802e386: 4a50 ldr r2, [pc, #320] ; (802e4c8 ) - 802e388: 635a str r2, [r3, #52] ; 0x34 - 802e38a: e011 b.n 802e3b0 + 802e408: 687b ldr r3, [r7, #4] + 802e40a: 4a50 ldr r2, [pc, #320] ; (802e54c ) + 802e40c: 635a str r2, [r3, #52] ; 0x34 + 802e40e: e011 b.n 802e434 } else { /* Disable all interrupts */ I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); - 802e38c: f248 0103 movw r1, #32771 ; 0x8003 - 802e390: 6878 ldr r0, [r7, #4] - 802e392: f000 f906 bl 802e5a2 + 802e410: f248 0103 movw r1, #32771 ; 0x8003 + 802e414: 6878 ldr r0, [r7, #4] + 802e416: f000 f906 bl 802e626 /* If state is an abort treatment on going, don't change state */ /* This change will be do later */ if (hi2c->State != HAL_I2C_STATE_ABORT) - 802e396: 687b ldr r3, [r7, #4] - 802e398: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e39c: b2db uxtb r3, r3 - 802e39e: 2b60 cmp r3, #96 ; 0x60 - 802e3a0: d003 beq.n 802e3aa + 802e41a: 687b ldr r3, [r7, #4] + 802e41c: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e420: b2db uxtb r3, r3 + 802e422: 2b60 cmp r3, #96 ; 0x60 + 802e424: d003 beq.n 802e42e { /* Set HAL_I2C_STATE_READY */ hi2c->State = HAL_I2C_STATE_READY; - 802e3a2: 687b ldr r3, [r7, #4] - 802e3a4: 2220 movs r2, #32 - 802e3a6: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e426: 687b ldr r3, [r7, #4] + 802e428: 2220 movs r2, #32 + 802e42a: f883 2041 strb.w r2, [r3, #65] ; 0x41 } hi2c->XferISR = NULL; - 802e3aa: 687b ldr r3, [r7, #4] - 802e3ac: 2200 movs r2, #0 - 802e3ae: 635a str r2, [r3, #52] ; 0x34 + 802e42e: 687b ldr r3, [r7, #4] + 802e430: 2200 movs r2, #0 + 802e432: 635a str r2, [r3, #52] ; 0x34 } /* Abort DMA TX transfer if any */ tmppreviousstate = hi2c->PreviousState; - 802e3b0: 687b ldr r3, [r7, #4] - 802e3b2: 6b1b ldr r3, [r3, #48] ; 0x30 - 802e3b4: 60bb str r3, [r7, #8] + 802e434: 687b ldr r3, [r7, #4] + 802e436: 6b1b ldr r3, [r3, #48] ; 0x30 + 802e438: 60bb str r3, [r7, #8] if ((hi2c->hdmatx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_TX) || \ - 802e3b6: 687b ldr r3, [r7, #4] - 802e3b8: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e3ba: 2b00 cmp r3, #0 - 802e3bc: d039 beq.n 802e432 - 802e3be: 68bb ldr r3, [r7, #8] - 802e3c0: 2b11 cmp r3, #17 - 802e3c2: d002 beq.n 802e3ca - 802e3c4: 68bb ldr r3, [r7, #8] - 802e3c6: 2b21 cmp r3, #33 ; 0x21 - 802e3c8: d133 bne.n 802e432 + 802e43a: 687b ldr r3, [r7, #4] + 802e43c: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e43e: 2b00 cmp r3, #0 + 802e440: d039 beq.n 802e4b6 + 802e442: 68bb ldr r3, [r7, #8] + 802e444: 2b11 cmp r3, #17 + 802e446: d002 beq.n 802e44e + 802e448: 68bb ldr r3, [r7, #8] + 802e44a: 2b21 cmp r3, #33 ; 0x21 + 802e44c: d133 bne.n 802e4b6 (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) { if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) - 802e3ca: 687b ldr r3, [r7, #4] - 802e3cc: 681b ldr r3, [r3, #0] - 802e3ce: 681b ldr r3, [r3, #0] - 802e3d0: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 802e3d4: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 802e3d8: d107 bne.n 802e3ea + 802e44e: 687b ldr r3, [r7, #4] + 802e450: 681b ldr r3, [r3, #0] + 802e452: 681b ldr r3, [r3, #0] + 802e454: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 802e458: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 802e45c: d107 bne.n 802e46e { hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; - 802e3da: 687b ldr r3, [r7, #4] - 802e3dc: 681b ldr r3, [r3, #0] - 802e3de: 681a ldr r2, [r3, #0] - 802e3e0: 687b ldr r3, [r7, #4] - 802e3e2: 681b ldr r3, [r3, #0] - 802e3e4: f422 4280 bic.w r2, r2, #16384 ; 0x4000 - 802e3e8: 601a str r2, [r3, #0] + 802e45e: 687b ldr r3, [r7, #4] + 802e460: 681b ldr r3, [r3, #0] + 802e462: 681a ldr r2, [r3, #0] + 802e464: 687b ldr r3, [r7, #4] + 802e466: 681b ldr r3, [r3, #0] + 802e468: f422 4280 bic.w r2, r2, #16384 ; 0x4000 + 802e46c: 601a str r2, [r3, #0] } if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 802e3ea: 687b ldr r3, [r7, #4] - 802e3ec: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e3ee: 4618 mov r0, r3 - 802e3f0: f7fb fdec bl 8029fcc - 802e3f4: 4603 mov r3, r0 - 802e3f6: 2b01 cmp r3, #1 - 802e3f8: d017 beq.n 802e42a + 802e46e: 687b ldr r3, [r7, #4] + 802e470: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e472: 4618 mov r0, r3 + 802e474: f7fb fdec bl 802a050 + 802e478: 4603 mov r3, r0 + 802e47a: 2b01 cmp r3, #1 + 802e47c: d017 beq.n 802e4ae { /* Set the I2C DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; - 802e3fa: 687b ldr r3, [r7, #4] - 802e3fc: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e3fe: 4a33 ldr r2, [pc, #204] ; (802e4cc ) - 802e400: 651a str r2, [r3, #80] ; 0x50 + 802e47e: 687b ldr r3, [r7, #4] + 802e480: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e482: 4a33 ldr r2, [pc, #204] ; (802e550 ) + 802e484: 651a str r2, [r3, #80] ; 0x50 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e402: 687b ldr r3, [r7, #4] - 802e404: 2200 movs r2, #0 - 802e406: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e486: 687b ldr r3, [r7, #4] + 802e488: 2200 movs r2, #0 + 802e48a: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Abort DMA TX */ if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) - 802e40a: 687b ldr r3, [r7, #4] - 802e40c: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e40e: 4618 mov r0, r3 - 802e410: f7fa fc6c bl 8028cec - 802e414: 4603 mov r3, r0 - 802e416: 2b00 cmp r3, #0 - 802e418: d04d beq.n 802e4b6 + 802e48e: 687b ldr r3, [r7, #4] + 802e490: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e492: 4618 mov r0, r3 + 802e494: f7fa fc6c bl 8028d70 + 802e498: 4603 mov r3, r0 + 802e49a: 2b00 cmp r3, #0 + 802e49c: d04d beq.n 802e53a { /* Call Directly XferAbortCallback function in case of error */ hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); - 802e41a: 687b ldr r3, [r7, #4] - 802e41c: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e41e: 6d1b ldr r3, [r3, #80] ; 0x50 - 802e420: 687a ldr r2, [r7, #4] - 802e422: 6b92 ldr r2, [r2, #56] ; 0x38 - 802e424: 4610 mov r0, r2 - 802e426: 4798 blx r3 + 802e49e: 687b ldr r3, [r7, #4] + 802e4a0: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e4a2: 6d1b ldr r3, [r3, #80] ; 0x50 + 802e4a4: 687a ldr r2, [r7, #4] + 802e4a6: 6b92 ldr r2, [r2, #56] ; 0x38 + 802e4a8: 4610 mov r0, r2 + 802e4aa: 4798 blx r3 if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 802e428: e045 b.n 802e4b6 + 802e4ac: e045 b.n 802e53a } } else { I2C_TreatErrorCallback(hi2c); - 802e42a: 6878 ldr r0, [r7, #4] - 802e42c: f000 f850 bl 802e4d0 + 802e4ae: 6878 ldr r0, [r7, #4] + 802e4b0: f000 f850 bl 802e554 if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 802e430: e041 b.n 802e4b6 + 802e4b4: e041 b.n 802e53a } } /* Abort DMA RX transfer if any */ else if ((hi2c->hdmarx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_RX) || \ - 802e432: 687b ldr r3, [r7, #4] - 802e434: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e436: 2b00 cmp r3, #0 - 802e438: d039 beq.n 802e4ae - 802e43a: 68bb ldr r3, [r7, #8] - 802e43c: 2b12 cmp r3, #18 - 802e43e: d002 beq.n 802e446 - 802e440: 68bb ldr r3, [r7, #8] - 802e442: 2b22 cmp r3, #34 ; 0x22 - 802e444: d133 bne.n 802e4ae + 802e4b6: 687b ldr r3, [r7, #4] + 802e4b8: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e4ba: 2b00 cmp r3, #0 + 802e4bc: d039 beq.n 802e532 + 802e4be: 68bb ldr r3, [r7, #8] + 802e4c0: 2b12 cmp r3, #18 + 802e4c2: d002 beq.n 802e4ca + 802e4c4: 68bb ldr r3, [r7, #8] + 802e4c6: 2b22 cmp r3, #34 ; 0x22 + 802e4c8: d133 bne.n 802e532 (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) { if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) - 802e446: 687b ldr r3, [r7, #4] - 802e448: 681b ldr r3, [r3, #0] - 802e44a: 681b ldr r3, [r3, #0] - 802e44c: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 802e450: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 802e454: d107 bne.n 802e466 + 802e4ca: 687b ldr r3, [r7, #4] + 802e4cc: 681b ldr r3, [r3, #0] + 802e4ce: 681b ldr r3, [r3, #0] + 802e4d0: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 802e4d4: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 802e4d8: d107 bne.n 802e4ea { hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; - 802e456: 687b ldr r3, [r7, #4] - 802e458: 681b ldr r3, [r3, #0] - 802e45a: 681a ldr r2, [r3, #0] - 802e45c: 687b ldr r3, [r7, #4] - 802e45e: 681b ldr r3, [r3, #0] - 802e460: f422 4200 bic.w r2, r2, #32768 ; 0x8000 - 802e464: 601a str r2, [r3, #0] + 802e4da: 687b ldr r3, [r7, #4] + 802e4dc: 681b ldr r3, [r3, #0] + 802e4de: 681a ldr r2, [r3, #0] + 802e4e0: 687b ldr r3, [r7, #4] + 802e4e2: 681b ldr r3, [r3, #0] + 802e4e4: f422 4200 bic.w r2, r2, #32768 ; 0x8000 + 802e4e8: 601a str r2, [r3, #0] } if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 802e466: 687b ldr r3, [r7, #4] - 802e468: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e46a: 4618 mov r0, r3 - 802e46c: f7fb fdae bl 8029fcc - 802e470: 4603 mov r3, r0 - 802e472: 2b01 cmp r3, #1 - 802e474: d017 beq.n 802e4a6 + 802e4ea: 687b ldr r3, [r7, #4] + 802e4ec: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e4ee: 4618 mov r0, r3 + 802e4f0: f7fb fdae bl 802a050 + 802e4f4: 4603 mov r3, r0 + 802e4f6: 2b01 cmp r3, #1 + 802e4f8: d017 beq.n 802e52a { /* Set the I2C DMA Abort callback : will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; - 802e476: 687b ldr r3, [r7, #4] - 802e478: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e47a: 4a14 ldr r2, [pc, #80] ; (802e4cc ) - 802e47c: 651a str r2, [r3, #80] ; 0x50 + 802e4fa: 687b ldr r3, [r7, #4] + 802e4fc: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e4fe: 4a14 ldr r2, [pc, #80] ; (802e550 ) + 802e500: 651a str r2, [r3, #80] ; 0x50 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e47e: 687b ldr r3, [r7, #4] - 802e480: 2200 movs r2, #0 - 802e482: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e502: 687b ldr r3, [r7, #4] + 802e504: 2200 movs r2, #0 + 802e506: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Abort DMA RX */ if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) - 802e486: 687b ldr r3, [r7, #4] - 802e488: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e48a: 4618 mov r0, r3 - 802e48c: f7fa fc2e bl 8028cec - 802e490: 4603 mov r3, r0 - 802e492: 2b00 cmp r3, #0 - 802e494: d011 beq.n 802e4ba + 802e50a: 687b ldr r3, [r7, #4] + 802e50c: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e50e: 4618 mov r0, r3 + 802e510: f7fa fc2e bl 8028d70 + 802e514: 4603 mov r3, r0 + 802e516: 2b00 cmp r3, #0 + 802e518: d011 beq.n 802e53e { /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); - 802e496: 687b ldr r3, [r7, #4] - 802e498: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e49a: 6d1b ldr r3, [r3, #80] ; 0x50 - 802e49c: 687a ldr r2, [r7, #4] - 802e49e: 6bd2 ldr r2, [r2, #60] ; 0x3c - 802e4a0: 4610 mov r0, r2 - 802e4a2: 4798 blx r3 + 802e51a: 687b ldr r3, [r7, #4] + 802e51c: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e51e: 6d1b ldr r3, [r3, #80] ; 0x50 + 802e520: 687a ldr r2, [r7, #4] + 802e522: 6bd2 ldr r2, [r2, #60] ; 0x3c + 802e524: 4610 mov r0, r2 + 802e526: 4798 blx r3 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 802e4a4: e009 b.n 802e4ba + 802e528: e009 b.n 802e53e } } else { I2C_TreatErrorCallback(hi2c); - 802e4a6: 6878 ldr r0, [r7, #4] - 802e4a8: f000 f812 bl 802e4d0 + 802e52a: 6878 ldr r0, [r7, #4] + 802e52c: f000 f812 bl 802e554 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 802e4ac: e005 b.n 802e4ba + 802e530: e005 b.n 802e53e } } else { I2C_TreatErrorCallback(hi2c); - 802e4ae: 6878 ldr r0, [r7, #4] - 802e4b0: f000 f80e bl 802e4d0 + 802e532: 6878 ldr r0, [r7, #4] + 802e534: f000 f80e bl 802e554 } } - 802e4b4: e002 b.n 802e4bc + 802e538: e002 b.n 802e540 if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY) - 802e4b6: bf00 nop - 802e4b8: e000 b.n 802e4bc + 802e53a: bf00 nop + 802e53c: e000 b.n 802e540 if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY) - 802e4ba: bf00 nop + 802e53e: bf00 nop } - 802e4bc: bf00 nop - 802e4be: 3710 adds r7, #16 - 802e4c0: 46bd mov sp, r7 - 802e4c2: bd80 pop {r7, pc} - 802e4c4: ffff0000 .word 0xffff0000 - 802e4c8: 0802dacb .word 0x0802dacb - 802e4cc: 0802e567 .word 0x0802e567 + 802e540: bf00 nop + 802e542: 3710 adds r7, #16 + 802e544: 46bd mov sp, r7 + 802e546: bd80 pop {r7, pc} + 802e548: ffff0000 .word 0xffff0000 + 802e54c: 0802db4f .word 0x0802db4f + 802e550: 0802e5eb .word 0x0802e5eb -0802e4d0 : +0802e554 : * @brief I2C Error callback treatment. * @param hi2c I2C handle. * @retval None */ static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c) { - 802e4d0: b580 push {r7, lr} - 802e4d2: b082 sub sp, #8 - 802e4d4: af00 add r7, sp, #0 - 802e4d6: 6078 str r0, [r7, #4] + 802e554: b580 push {r7, lr} + 802e556: b082 sub sp, #8 + 802e558: af00 add r7, sp, #0 + 802e55a: 6078 str r0, [r7, #4] if (hi2c->State == HAL_I2C_STATE_ABORT) - 802e4d8: 687b ldr r3, [r7, #4] - 802e4da: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e4de: b2db uxtb r3, r3 - 802e4e0: 2b60 cmp r3, #96 ; 0x60 - 802e4e2: d10e bne.n 802e502 + 802e55c: 687b ldr r3, [r7, #4] + 802e55e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e562: b2db uxtb r3, r3 + 802e564: 2b60 cmp r3, #96 ; 0x60 + 802e566: d10e bne.n 802e586 { hi2c->State = HAL_I2C_STATE_READY; - 802e4e4: 687b ldr r3, [r7, #4] - 802e4e6: 2220 movs r2, #32 - 802e4e8: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e568: 687b ldr r3, [r7, #4] + 802e56a: 2220 movs r2, #32 + 802e56c: f883 2041 strb.w r2, [r3, #65] ; 0x41 hi2c->PreviousState = I2C_STATE_NONE; - 802e4ec: 687b ldr r3, [r7, #4] - 802e4ee: 2200 movs r2, #0 - 802e4f0: 631a str r2, [r3, #48] ; 0x30 + 802e570: 687b ldr r3, [r7, #4] + 802e572: 2200 movs r2, #0 + 802e574: 631a str r2, [r3, #48] ; 0x30 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e4f2: 687b ldr r3, [r7, #4] - 802e4f4: 2200 movs r2, #0 - 802e4f6: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e576: 687b ldr r3, [r7, #4] + 802e578: 2200 movs r2, #0 + 802e57a: f883 2040 strb.w r2, [r3, #64] ; 0x40 /* Call the corresponding callback to inform upper layer of End of Transfer */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) hi2c->AbortCpltCallback(hi2c); #else HAL_I2C_AbortCpltCallback(hi2c); - 802e4fa: 6878 ldr r0, [r7, #4] - 802e4fc: f7ff fadb bl 802dab6 + 802e57e: 6878 ldr r0, [r7, #4] + 802e580: f7ff fadb bl 802db3a hi2c->ErrorCallback(hi2c); #else HAL_I2C_ErrorCallback(hi2c); #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } } - 802e500: e009 b.n 802e516 + 802e584: e009 b.n 802e59a hi2c->PreviousState = I2C_STATE_NONE; - 802e502: 687b ldr r3, [r7, #4] - 802e504: 2200 movs r2, #0 - 802e506: 631a str r2, [r3, #48] ; 0x30 + 802e586: 687b ldr r3, [r7, #4] + 802e588: 2200 movs r2, #0 + 802e58a: 631a str r2, [r3, #48] ; 0x30 __HAL_UNLOCK(hi2c); - 802e508: 687b ldr r3, [r7, #4] - 802e50a: 2200 movs r2, #0 - 802e50c: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e58c: 687b ldr r3, [r7, #4] + 802e58e: 2200 movs r2, #0 + 802e590: f883 2040 strb.w r2, [r3, #64] ; 0x40 HAL_I2C_ErrorCallback(hi2c); - 802e510: 6878 ldr r0, [r7, #4] - 802e512: f7ff fac6 bl 802daa2 + 802e594: 6878 ldr r0, [r7, #4] + 802e596: f7ff fac6 bl 802db26 } - 802e516: bf00 nop - 802e518: 3708 adds r7, #8 - 802e51a: 46bd mov sp, r7 - 802e51c: bd80 pop {r7, pc} + 802e59a: bf00 nop + 802e59c: 3708 adds r7, #8 + 802e59e: 46bd mov sp, r7 + 802e5a0: bd80 pop {r7, pc} -0802e51e : +0802e5a2 : * @brief I2C Tx data register flush process. * @param hi2c I2C handle. * @retval None */ static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) { - 802e51e: b480 push {r7} - 802e520: b083 sub sp, #12 - 802e522: af00 add r7, sp, #0 - 802e524: 6078 str r0, [r7, #4] + 802e5a2: b480 push {r7} + 802e5a4: b083 sub sp, #12 + 802e5a6: af00 add r7, sp, #0 + 802e5a8: 6078 str r0, [r7, #4] /* If a pending TXIS flag is set */ /* Write a dummy data in TXDR to clear it */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) - 802e526: 687b ldr r3, [r7, #4] - 802e528: 681b ldr r3, [r3, #0] - 802e52a: 699b ldr r3, [r3, #24] - 802e52c: f003 0302 and.w r3, r3, #2 - 802e530: 2b02 cmp r3, #2 - 802e532: d103 bne.n 802e53c + 802e5aa: 687b ldr r3, [r7, #4] + 802e5ac: 681b ldr r3, [r3, #0] + 802e5ae: 699b ldr r3, [r3, #24] + 802e5b0: f003 0302 and.w r3, r3, #2 + 802e5b4: 2b02 cmp r3, #2 + 802e5b6: d103 bne.n 802e5c0 { hi2c->Instance->TXDR = 0x00U; - 802e534: 687b ldr r3, [r7, #4] - 802e536: 681b ldr r3, [r3, #0] - 802e538: 2200 movs r2, #0 - 802e53a: 629a str r2, [r3, #40] ; 0x28 + 802e5b8: 687b ldr r3, [r7, #4] + 802e5ba: 681b ldr r3, [r3, #0] + 802e5bc: 2200 movs r2, #0 + 802e5be: 629a str r2, [r3, #40] ; 0x28 } /* Flush TX register if not empty */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 802e53c: 687b ldr r3, [r7, #4] - 802e53e: 681b ldr r3, [r3, #0] - 802e540: 699b ldr r3, [r3, #24] - 802e542: f003 0301 and.w r3, r3, #1 - 802e546: 2b01 cmp r3, #1 - 802e548: d007 beq.n 802e55a + 802e5c0: 687b ldr r3, [r7, #4] + 802e5c2: 681b ldr r3, [r3, #0] + 802e5c4: 699b ldr r3, [r3, #24] + 802e5c6: f003 0301 and.w r3, r3, #1 + 802e5ca: 2b01 cmp r3, #1 + 802e5cc: d007 beq.n 802e5de { __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); - 802e54a: 687b ldr r3, [r7, #4] - 802e54c: 681b ldr r3, [r3, #0] - 802e54e: 699a ldr r2, [r3, #24] - 802e550: 687b ldr r3, [r7, #4] - 802e552: 681b ldr r3, [r3, #0] - 802e554: f042 0201 orr.w r2, r2, #1 - 802e558: 619a str r2, [r3, #24] - } -} - 802e55a: bf00 nop - 802e55c: 370c adds r7, #12 - 802e55e: 46bd mov sp, r7 - 802e560: f85d 7b04 ldr.w r7, [sp], #4 - 802e564: 4770 bx lr - -0802e566 : + 802e5ce: 687b ldr r3, [r7, #4] + 802e5d0: 681b ldr r3, [r3, #0] + 802e5d2: 699a ldr r2, [r3, #24] + 802e5d4: 687b ldr r3, [r7, #4] + 802e5d6: 681b ldr r3, [r3, #0] + 802e5d8: f042 0201 orr.w r2, r2, #1 + 802e5dc: 619a str r2, [r3, #24] + } +} + 802e5de: bf00 nop + 802e5e0: 370c adds r7, #12 + 802e5e2: 46bd mov sp, r7 + 802e5e4: f85d 7b04 ldr.w r7, [sp], #4 + 802e5e8: 4770 bx lr + +0802e5ea : * (To be called at end of DMA Abort procedure). * @param hdma DMA handle. * @retval None */ static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) { - 802e566: b580 push {r7, lr} - 802e568: b084 sub sp, #16 - 802e56a: af00 add r7, sp, #0 - 802e56c: 6078 str r0, [r7, #4] + 802e5ea: b580 push {r7, lr} + 802e5ec: b084 sub sp, #16 + 802e5ee: af00 add r7, sp, #0 + 802e5f0: 6078 str r0, [r7, #4] /* Derogation MISRAC2012-Rule-11.5 */ I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); - 802e56e: 687b ldr r3, [r7, #4] - 802e570: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e572: 60fb str r3, [r7, #12] + 802e5f2: 687b ldr r3, [r7, #4] + 802e5f4: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e5f6: 60fb str r3, [r7, #12] /* Reset AbortCpltCallback */ if (hi2c->hdmatx != NULL) - 802e574: 68fb ldr r3, [r7, #12] - 802e576: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e578: 2b00 cmp r3, #0 - 802e57a: d003 beq.n 802e584 + 802e5f8: 68fb ldr r3, [r7, #12] + 802e5fa: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e5fc: 2b00 cmp r3, #0 + 802e5fe: d003 beq.n 802e608 { hi2c->hdmatx->XferAbortCallback = NULL; - 802e57c: 68fb ldr r3, [r7, #12] - 802e57e: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e580: 2200 movs r2, #0 - 802e582: 651a str r2, [r3, #80] ; 0x50 + 802e600: 68fb ldr r3, [r7, #12] + 802e602: 6b9b ldr r3, [r3, #56] ; 0x38 + 802e604: 2200 movs r2, #0 + 802e606: 651a str r2, [r3, #80] ; 0x50 } if (hi2c->hdmarx != NULL) - 802e584: 68fb ldr r3, [r7, #12] - 802e586: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e588: 2b00 cmp r3, #0 - 802e58a: d003 beq.n 802e594 + 802e608: 68fb ldr r3, [r7, #12] + 802e60a: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e60c: 2b00 cmp r3, #0 + 802e60e: d003 beq.n 802e618 { hi2c->hdmarx->XferAbortCallback = NULL; - 802e58c: 68fb ldr r3, [r7, #12] - 802e58e: 6bdb ldr r3, [r3, #60] ; 0x3c - 802e590: 2200 movs r2, #0 - 802e592: 651a str r2, [r3, #80] ; 0x50 + 802e610: 68fb ldr r3, [r7, #12] + 802e612: 6bdb ldr r3, [r3, #60] ; 0x3c + 802e614: 2200 movs r2, #0 + 802e616: 651a str r2, [r3, #80] ; 0x50 } I2C_TreatErrorCallback(hi2c); - 802e594: 68f8 ldr r0, [r7, #12] - 802e596: f7ff ff9b bl 802e4d0 + 802e618: 68f8 ldr r0, [r7, #12] + 802e61a: f7ff ff9b bl 802e554 } - 802e59a: bf00 nop - 802e59c: 3710 adds r7, #16 - 802e59e: 46bd mov sp, r7 - 802e5a0: bd80 pop {r7, pc} + 802e61e: bf00 nop + 802e620: 3710 adds r7, #16 + 802e622: 46bd mov sp, r7 + 802e624: bd80 pop {r7, pc} -0802e5a2 : +0802e626 : * the configuration information for the specified I2C. * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. * @retval None */ static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) { - 802e5a2: b480 push {r7} - 802e5a4: b085 sub sp, #20 - 802e5a6: af00 add r7, sp, #0 - 802e5a8: 6078 str r0, [r7, #4] - 802e5aa: 460b mov r3, r1 - 802e5ac: 807b strh r3, [r7, #2] + 802e626: b480 push {r7} + 802e628: b085 sub sp, #20 + 802e62a: af00 add r7, sp, #0 + 802e62c: 6078 str r0, [r7, #4] + 802e62e: 460b mov r3, r1 + 802e630: 807b strh r3, [r7, #2] uint32_t tmpisr = 0U; - 802e5ae: 2300 movs r3, #0 - 802e5b0: 60fb str r3, [r7, #12] + 802e632: 2300 movs r3, #0 + 802e634: 60fb str r3, [r7, #12] if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - 802e5b2: 887b ldrh r3, [r7, #2] - 802e5b4: f003 0301 and.w r3, r3, #1 - 802e5b8: 2b00 cmp r3, #0 - 802e5ba: d00f beq.n 802e5dc + 802e636: 887b ldrh r3, [r7, #2] + 802e638: f003 0301 and.w r3, r3, #1 + 802e63c: 2b00 cmp r3, #0 + 802e63e: d00f beq.n 802e660 { /* Disable TC and TXI interrupts */ tmpisr |= I2C_IT_TCI | I2C_IT_TXI; - 802e5bc: 68fb ldr r3, [r7, #12] - 802e5be: f043 0342 orr.w r3, r3, #66 ; 0x42 - 802e5c2: 60fb str r3, [r7, #12] + 802e640: 68fb ldr r3, [r7, #12] + 802e642: f043 0342 orr.w r3, r3, #66 ; 0x42 + 802e646: 60fb str r3, [r7, #12] if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) - 802e5c4: 687b ldr r3, [r7, #4] - 802e5c6: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e5ca: b2db uxtb r3, r3 - 802e5cc: f003 0328 and.w r3, r3, #40 ; 0x28 - 802e5d0: 2b28 cmp r3, #40 ; 0x28 - 802e5d2: d003 beq.n 802e5dc + 802e648: 687b ldr r3, [r7, #4] + 802e64a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e64e: b2db uxtb r3, r3 + 802e650: f003 0328 and.w r3, r3, #40 ; 0x28 + 802e654: 2b28 cmp r3, #40 ; 0x28 + 802e656: d003 beq.n 802e660 { /* Disable NACK and STOP interrupts */ tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 802e5d4: 68fb ldr r3, [r7, #12] - 802e5d6: f043 03b0 orr.w r3, r3, #176 ; 0xb0 - 802e5da: 60fb str r3, [r7, #12] + 802e658: 68fb ldr r3, [r7, #12] + 802e65a: f043 03b0 orr.w r3, r3, #176 ; 0xb0 + 802e65e: 60fb str r3, [r7, #12] } } if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - 802e5dc: 887b ldrh r3, [r7, #2] - 802e5de: f003 0302 and.w r3, r3, #2 - 802e5e2: 2b00 cmp r3, #0 - 802e5e4: d00f beq.n 802e606 + 802e660: 887b ldrh r3, [r7, #2] + 802e662: f003 0302 and.w r3, r3, #2 + 802e666: 2b00 cmp r3, #0 + 802e668: d00f beq.n 802e68a { /* Disable TC and RXI interrupts */ tmpisr |= I2C_IT_TCI | I2C_IT_RXI; - 802e5e6: 68fb ldr r3, [r7, #12] - 802e5e8: f043 0344 orr.w r3, r3, #68 ; 0x44 - 802e5ec: 60fb str r3, [r7, #12] + 802e66a: 68fb ldr r3, [r7, #12] + 802e66c: f043 0344 orr.w r3, r3, #68 ; 0x44 + 802e670: 60fb str r3, [r7, #12] if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) - 802e5ee: 687b ldr r3, [r7, #4] - 802e5f0: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e5f4: b2db uxtb r3, r3 - 802e5f6: f003 0328 and.w r3, r3, #40 ; 0x28 - 802e5fa: 2b28 cmp r3, #40 ; 0x28 - 802e5fc: d003 beq.n 802e606 + 802e672: 687b ldr r3, [r7, #4] + 802e674: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e678: b2db uxtb r3, r3 + 802e67a: f003 0328 and.w r3, r3, #40 ; 0x28 + 802e67e: 2b28 cmp r3, #40 ; 0x28 + 802e680: d003 beq.n 802e68a { /* Disable NACK and STOP interrupts */ tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 802e5fe: 68fb ldr r3, [r7, #12] - 802e600: f043 03b0 orr.w r3, r3, #176 ; 0xb0 - 802e604: 60fb str r3, [r7, #12] + 802e682: 68fb ldr r3, [r7, #12] + 802e684: f043 03b0 orr.w r3, r3, #176 ; 0xb0 + 802e688: 60fb str r3, [r7, #12] } } if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - 802e606: f9b7 3002 ldrsh.w r3, [r7, #2] - 802e60a: 2b00 cmp r3, #0 - 802e60c: da03 bge.n 802e616 + 802e68a: f9b7 3002 ldrsh.w r3, [r7, #2] + 802e68e: 2b00 cmp r3, #0 + 802e690: da03 bge.n 802e69a { /* Disable ADDR, NACK and STOP interrupts */ tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 802e60e: 68fb ldr r3, [r7, #12] - 802e610: f043 03b8 orr.w r3, r3, #184 ; 0xb8 - 802e614: 60fb str r3, [r7, #12] + 802e692: 68fb ldr r3, [r7, #12] + 802e694: f043 03b8 orr.w r3, r3, #184 ; 0xb8 + 802e698: 60fb str r3, [r7, #12] } if (InterruptRequest == I2C_XFER_ERROR_IT) - 802e616: 887b ldrh r3, [r7, #2] - 802e618: 2b10 cmp r3, #16 - 802e61a: d103 bne.n 802e624 + 802e69a: 887b ldrh r3, [r7, #2] + 802e69c: 2b10 cmp r3, #16 + 802e69e: d103 bne.n 802e6a8 { /* Enable ERR and NACK interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; - 802e61c: 68fb ldr r3, [r7, #12] - 802e61e: f043 0390 orr.w r3, r3, #144 ; 0x90 - 802e622: 60fb str r3, [r7, #12] + 802e6a0: 68fb ldr r3, [r7, #12] + 802e6a2: f043 0390 orr.w r3, r3, #144 ; 0x90 + 802e6a6: 60fb str r3, [r7, #12] } if (InterruptRequest == I2C_XFER_CPLT_IT) - 802e624: 887b ldrh r3, [r7, #2] - 802e626: 2b20 cmp r3, #32 - 802e628: d103 bne.n 802e632 + 802e6a8: 887b ldrh r3, [r7, #2] + 802e6aa: 2b20 cmp r3, #32 + 802e6ac: d103 bne.n 802e6b6 { /* Enable STOP interrupts */ tmpisr |= I2C_IT_STOPI; - 802e62a: 68fb ldr r3, [r7, #12] - 802e62c: f043 0320 orr.w r3, r3, #32 - 802e630: 60fb str r3, [r7, #12] + 802e6ae: 68fb ldr r3, [r7, #12] + 802e6b0: f043 0320 orr.w r3, r3, #32 + 802e6b4: 60fb str r3, [r7, #12] } if (InterruptRequest == I2C_XFER_RELOAD_IT) - 802e632: 887b ldrh r3, [r7, #2] - 802e634: 2b40 cmp r3, #64 ; 0x40 - 802e636: d103 bne.n 802e640 + 802e6b6: 887b ldrh r3, [r7, #2] + 802e6b8: 2b40 cmp r3, #64 ; 0x40 + 802e6ba: d103 bne.n 802e6c4 { /* Enable TC interrupts */ tmpisr |= I2C_IT_TCI; - 802e638: 68fb ldr r3, [r7, #12] - 802e63a: f043 0340 orr.w r3, r3, #64 ; 0x40 - 802e63e: 60fb str r3, [r7, #12] + 802e6bc: 68fb ldr r3, [r7, #12] + 802e6be: f043 0340 orr.w r3, r3, #64 ; 0x40 + 802e6c2: 60fb str r3, [r7, #12] } /* Disable interrupts only at the end */ /* to avoid a breaking situation like at "t" time */ /* all disable interrupts request are not done */ __HAL_I2C_DISABLE_IT(hi2c, tmpisr); - 802e640: 687b ldr r3, [r7, #4] - 802e642: 681b ldr r3, [r3, #0] - 802e644: 6819 ldr r1, [r3, #0] - 802e646: 68fb ldr r3, [r7, #12] - 802e648: 43da mvns r2, r3 - 802e64a: 687b ldr r3, [r7, #4] - 802e64c: 681b ldr r3, [r3, #0] - 802e64e: 400a ands r2, r1 - 802e650: 601a str r2, [r3, #0] -} - 802e652: bf00 nop - 802e654: 3714 adds r7, #20 - 802e656: 46bd mov sp, r7 - 802e658: f85d 7b04 ldr.w r7, [sp], #4 - 802e65c: 4770 bx lr - -0802e65e : + 802e6c4: 687b ldr r3, [r7, #4] + 802e6c6: 681b ldr r3, [r3, #0] + 802e6c8: 6819 ldr r1, [r3, #0] + 802e6ca: 68fb ldr r3, [r7, #12] + 802e6cc: 43da mvns r2, r3 + 802e6ce: 687b ldr r3, [r7, #4] + 802e6d0: 681b ldr r3, [r3, #0] + 802e6d2: 400a ands r2, r1 + 802e6d4: 601a str r2, [r3, #0] +} + 802e6d6: bf00 nop + 802e6d8: 3714 adds r7, #20 + 802e6da: 46bd mov sp, r7 + 802e6dc: f85d 7b04 ldr.w r7, [sp], #4 + 802e6e0: 4770 bx lr + +0802e6e2 : * the configuration information for the specified I2Cx peripheral. * @param AnalogFilter New state of the Analog filter. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) { - 802e65e: b480 push {r7} - 802e660: b083 sub sp, #12 - 802e662: af00 add r7, sp, #0 - 802e664: 6078 str r0, [r7, #4] - 802e666: 6039 str r1, [r7, #0] + 802e6e2: b480 push {r7} + 802e6e4: b083 sub sp, #12 + 802e6e6: af00 add r7, sp, #0 + 802e6e8: 6078 str r0, [r7, #4] + 802e6ea: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); if (hi2c->State == HAL_I2C_STATE_READY) - 802e668: 687b ldr r3, [r7, #4] - 802e66a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e66e: b2db uxtb r3, r3 - 802e670: 2b20 cmp r3, #32 - 802e672: d138 bne.n 802e6e6 + 802e6ec: 687b ldr r3, [r7, #4] + 802e6ee: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e6f2: b2db uxtb r3, r3 + 802e6f4: 2b20 cmp r3, #32 + 802e6f6: d138 bne.n 802e76a { /* Process Locked */ __HAL_LOCK(hi2c); - 802e674: 687b ldr r3, [r7, #4] - 802e676: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 802e67a: 2b01 cmp r3, #1 - 802e67c: d101 bne.n 802e682 - 802e67e: 2302 movs r3, #2 - 802e680: e032 b.n 802e6e8 - 802e682: 687b ldr r3, [r7, #4] - 802e684: 2201 movs r2, #1 - 802e686: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e6f8: 687b ldr r3, [r7, #4] + 802e6fa: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 + 802e6fe: 2b01 cmp r3, #1 + 802e700: d101 bne.n 802e706 + 802e702: 2302 movs r3, #2 + 802e704: e032 b.n 802e76c + 802e706: 687b ldr r3, [r7, #4] + 802e708: 2201 movs r2, #1 + 802e70a: f883 2040 strb.w r2, [r3, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_BUSY; - 802e68a: 687b ldr r3, [r7, #4] - 802e68c: 2224 movs r2, #36 ; 0x24 - 802e68e: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e70e: 687b ldr r3, [r7, #4] + 802e710: 2224 movs r2, #36 ; 0x24 + 802e712: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 802e692: 687b ldr r3, [r7, #4] - 802e694: 681b ldr r3, [r3, #0] - 802e696: 681a ldr r2, [r3, #0] - 802e698: 687b ldr r3, [r7, #4] - 802e69a: 681b ldr r3, [r3, #0] - 802e69c: f022 0201 bic.w r2, r2, #1 - 802e6a0: 601a str r2, [r3, #0] + 802e716: 687b ldr r3, [r7, #4] + 802e718: 681b ldr r3, [r3, #0] + 802e71a: 681a ldr r2, [r3, #0] + 802e71c: 687b ldr r3, [r7, #4] + 802e71e: 681b ldr r3, [r3, #0] + 802e720: f022 0201 bic.w r2, r2, #1 + 802e724: 601a str r2, [r3, #0] /* Reset I2Cx ANOFF bit */ hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); - 802e6a2: 687b ldr r3, [r7, #4] - 802e6a4: 681b ldr r3, [r3, #0] - 802e6a6: 681a ldr r2, [r3, #0] - 802e6a8: 687b ldr r3, [r7, #4] - 802e6aa: 681b ldr r3, [r3, #0] - 802e6ac: f422 5280 bic.w r2, r2, #4096 ; 0x1000 - 802e6b0: 601a str r2, [r3, #0] + 802e726: 687b ldr r3, [r7, #4] + 802e728: 681b ldr r3, [r3, #0] + 802e72a: 681a ldr r2, [r3, #0] + 802e72c: 687b ldr r3, [r7, #4] + 802e72e: 681b ldr r3, [r3, #0] + 802e730: f422 5280 bic.w r2, r2, #4096 ; 0x1000 + 802e734: 601a str r2, [r3, #0] /* Set analog filter bit*/ hi2c->Instance->CR1 |= AnalogFilter; - 802e6b2: 687b ldr r3, [r7, #4] - 802e6b4: 681b ldr r3, [r3, #0] - 802e6b6: 6819 ldr r1, [r3, #0] - 802e6b8: 687b ldr r3, [r7, #4] - 802e6ba: 681b ldr r3, [r3, #0] - 802e6bc: 683a ldr r2, [r7, #0] - 802e6be: 430a orrs r2, r1 - 802e6c0: 601a str r2, [r3, #0] + 802e736: 687b ldr r3, [r7, #4] + 802e738: 681b ldr r3, [r3, #0] + 802e73a: 6819 ldr r1, [r3, #0] + 802e73c: 687b ldr r3, [r7, #4] + 802e73e: 681b ldr r3, [r3, #0] + 802e740: 683a ldr r2, [r7, #0] + 802e742: 430a orrs r2, r1 + 802e744: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); - 802e6c2: 687b ldr r3, [r7, #4] - 802e6c4: 681b ldr r3, [r3, #0] - 802e6c6: 681a ldr r2, [r3, #0] - 802e6c8: 687b ldr r3, [r7, #4] - 802e6ca: 681b ldr r3, [r3, #0] - 802e6cc: f042 0201 orr.w r2, r2, #1 - 802e6d0: 601a str r2, [r3, #0] + 802e746: 687b ldr r3, [r7, #4] + 802e748: 681b ldr r3, [r3, #0] + 802e74a: 681a ldr r2, [r3, #0] + 802e74c: 687b ldr r3, [r7, #4] + 802e74e: 681b ldr r3, [r3, #0] + 802e750: f042 0201 orr.w r2, r2, #1 + 802e754: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 802e6d2: 687b ldr r3, [r7, #4] - 802e6d4: 2220 movs r2, #32 - 802e6d6: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e756: 687b ldr r3, [r7, #4] + 802e758: 2220 movs r2, #32 + 802e75a: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e6da: 687b ldr r3, [r7, #4] - 802e6dc: 2200 movs r2, #0 - 802e6de: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e75e: 687b ldr r3, [r7, #4] + 802e760: 2200 movs r2, #0 + 802e762: f883 2040 strb.w r2, [r3, #64] ; 0x40 return HAL_OK; - 802e6e2: 2300 movs r3, #0 - 802e6e4: e000 b.n 802e6e8 + 802e766: 2300 movs r3, #0 + 802e768: e000 b.n 802e76c } else { return HAL_BUSY; - 802e6e6: 2302 movs r3, #2 + 802e76a: 2302 movs r3, #2 } } - 802e6e8: 4618 mov r0, r3 - 802e6ea: 370c adds r7, #12 - 802e6ec: 46bd mov sp, r7 - 802e6ee: f85d 7b04 ldr.w r7, [sp], #4 - 802e6f2: 4770 bx lr + 802e76c: 4618 mov r0, r3 + 802e76e: 370c adds r7, #12 + 802e770: 46bd mov sp, r7 + 802e772: f85d 7b04 ldr.w r7, [sp], #4 + 802e776: 4770 bx lr -0802e6f4 : +0802e778 : * the configuration information for the specified I2Cx peripheral. * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) { - 802e6f4: b480 push {r7} - 802e6f6: b085 sub sp, #20 - 802e6f8: af00 add r7, sp, #0 - 802e6fa: 6078 str r0, [r7, #4] - 802e6fc: 6039 str r1, [r7, #0] + 802e778: b480 push {r7} + 802e77a: b085 sub sp, #20 + 802e77c: af00 add r7, sp, #0 + 802e77e: 6078 str r0, [r7, #4] + 802e780: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); if (hi2c->State == HAL_I2C_STATE_READY) - 802e6fe: 687b ldr r3, [r7, #4] - 802e700: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e704: b2db uxtb r3, r3 - 802e706: 2b20 cmp r3, #32 - 802e708: d139 bne.n 802e77e + 802e782: 687b ldr r3, [r7, #4] + 802e784: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e788: b2db uxtb r3, r3 + 802e78a: 2b20 cmp r3, #32 + 802e78c: d139 bne.n 802e802 { /* Process Locked */ __HAL_LOCK(hi2c); - 802e70a: 687b ldr r3, [r7, #4] - 802e70c: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 - 802e710: 2b01 cmp r3, #1 - 802e712: d101 bne.n 802e718 - 802e714: 2302 movs r3, #2 - 802e716: e033 b.n 802e780 - 802e718: 687b ldr r3, [r7, #4] - 802e71a: 2201 movs r2, #1 - 802e71c: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e78e: 687b ldr r3, [r7, #4] + 802e790: f893 3040 ldrb.w r3, [r3, #64] ; 0x40 + 802e794: 2b01 cmp r3, #1 + 802e796: d101 bne.n 802e79c + 802e798: 2302 movs r3, #2 + 802e79a: e033 b.n 802e804 + 802e79c: 687b ldr r3, [r7, #4] + 802e79e: 2201 movs r2, #1 + 802e7a0: f883 2040 strb.w r2, [r3, #64] ; 0x40 hi2c->State = HAL_I2C_STATE_BUSY; - 802e720: 687b ldr r3, [r7, #4] - 802e722: 2224 movs r2, #36 ; 0x24 - 802e724: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e7a4: 687b ldr r3, [r7, #4] + 802e7a6: 2224 movs r2, #36 ; 0x24 + 802e7a8: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 802e728: 687b ldr r3, [r7, #4] - 802e72a: 681b ldr r3, [r3, #0] - 802e72c: 681a ldr r2, [r3, #0] - 802e72e: 687b ldr r3, [r7, #4] - 802e730: 681b ldr r3, [r3, #0] - 802e732: f022 0201 bic.w r2, r2, #1 - 802e736: 601a str r2, [r3, #0] + 802e7ac: 687b ldr r3, [r7, #4] + 802e7ae: 681b ldr r3, [r3, #0] + 802e7b0: 681a ldr r2, [r3, #0] + 802e7b2: 687b ldr r3, [r7, #4] + 802e7b4: 681b ldr r3, [r3, #0] + 802e7b6: f022 0201 bic.w r2, r2, #1 + 802e7ba: 601a str r2, [r3, #0] /* Get the old register value */ tmpreg = hi2c->Instance->CR1; - 802e738: 687b ldr r3, [r7, #4] - 802e73a: 681b ldr r3, [r3, #0] - 802e73c: 681b ldr r3, [r3, #0] - 802e73e: 60fb str r3, [r7, #12] + 802e7bc: 687b ldr r3, [r7, #4] + 802e7be: 681b ldr r3, [r3, #0] + 802e7c0: 681b ldr r3, [r3, #0] + 802e7c2: 60fb str r3, [r7, #12] /* Reset I2Cx DNF bits [11:8] */ tmpreg &= ~(I2C_CR1_DNF); - 802e740: 68fb ldr r3, [r7, #12] - 802e742: f423 6370 bic.w r3, r3, #3840 ; 0xf00 - 802e746: 60fb str r3, [r7, #12] + 802e7c4: 68fb ldr r3, [r7, #12] + 802e7c6: f423 6370 bic.w r3, r3, #3840 ; 0xf00 + 802e7ca: 60fb str r3, [r7, #12] /* Set I2Cx DNF coefficient */ tmpreg |= DigitalFilter << 8U; - 802e748: 683b ldr r3, [r7, #0] - 802e74a: 021b lsls r3, r3, #8 - 802e74c: 68fa ldr r2, [r7, #12] - 802e74e: 4313 orrs r3, r2 - 802e750: 60fb str r3, [r7, #12] + 802e7cc: 683b ldr r3, [r7, #0] + 802e7ce: 021b lsls r3, r3, #8 + 802e7d0: 68fa ldr r2, [r7, #12] + 802e7d2: 4313 orrs r3, r2 + 802e7d4: 60fb str r3, [r7, #12] /* Store the new register value */ hi2c->Instance->CR1 = tmpreg; - 802e752: 687b ldr r3, [r7, #4] - 802e754: 681b ldr r3, [r3, #0] - 802e756: 68fa ldr r2, [r7, #12] - 802e758: 601a str r2, [r3, #0] + 802e7d6: 687b ldr r3, [r7, #4] + 802e7d8: 681b ldr r3, [r3, #0] + 802e7da: 68fa ldr r2, [r7, #12] + 802e7dc: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); - 802e75a: 687b ldr r3, [r7, #4] - 802e75c: 681b ldr r3, [r3, #0] - 802e75e: 681a ldr r2, [r3, #0] - 802e760: 687b ldr r3, [r7, #4] - 802e762: 681b ldr r3, [r3, #0] - 802e764: f042 0201 orr.w r2, r2, #1 - 802e768: 601a str r2, [r3, #0] + 802e7de: 687b ldr r3, [r7, #4] + 802e7e0: 681b ldr r3, [r3, #0] + 802e7e2: 681a ldr r2, [r3, #0] + 802e7e4: 687b ldr r3, [r7, #4] + 802e7e6: 681b ldr r3, [r3, #0] + 802e7e8: f042 0201 orr.w r2, r2, #1 + 802e7ec: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 802e76a: 687b ldr r3, [r7, #4] - 802e76c: 2220 movs r2, #32 - 802e76e: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e7ee: 687b ldr r3, [r7, #4] + 802e7f0: 2220 movs r2, #32 + 802e7f2: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 802e772: 687b ldr r3, [r7, #4] - 802e774: 2200 movs r2, #0 - 802e776: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 802e7f6: 687b ldr r3, [r7, #4] + 802e7f8: 2200 movs r2, #0 + 802e7fa: f883 2040 strb.w r2, [r3, #64] ; 0x40 return HAL_OK; - 802e77a: 2300 movs r3, #0 - 802e77c: e000 b.n 802e780 + 802e7fe: 2300 movs r3, #0 + 802e800: e000 b.n 802e804 } else { return HAL_BUSY; - 802e77e: 2302 movs r3, #2 + 802e802: 2302 movs r3, #2 } } - 802e780: 4618 mov r0, r3 - 802e782: 3714 adds r7, #20 - 802e784: 46bd mov sp, r7 - 802e786: f85d 7b04 ldr.w r7, [sp], #4 - 802e78a: 4770 bx lr + 802e804: 4618 mov r0, r3 + 802e806: 3714 adds r7, #20 + 802e808: 46bd mov sp, r7 + 802e80a: f85d 7b04 ldr.w r7, [sp], #4 + 802e80e: 4770 bx lr -0802e78c : +0802e810 : * @param hmdma : pointer to a MDMA_HandleTypeDef structure that contains * the configuration information for the specified MDMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_MDMA_Abort_IT(MDMA_HandleTypeDef *hmdma) { - 802e78c: b480 push {r7} - 802e78e: b083 sub sp, #12 - 802e790: af00 add r7, sp, #0 - 802e792: 6078 str r0, [r7, #4] + 802e810: b480 push {r7} + 802e812: b083 sub sp, #12 + 802e814: af00 add r7, sp, #0 + 802e816: 6078 str r0, [r7, #4] /* Check the MDMA peripheral handle */ if(hmdma == NULL) - 802e794: 687b ldr r3, [r7, #4] - 802e796: 2b00 cmp r3, #0 - 802e798: d101 bne.n 802e79e + 802e818: 687b ldr r3, [r7, #4] + 802e81a: 2b00 cmp r3, #0 + 802e81c: d101 bne.n 802e822 { return HAL_ERROR; - 802e79a: 2301 movs r3, #1 - 802e79c: e017 b.n 802e7ce + 802e81e: 2301 movs r3, #1 + 802e820: e017 b.n 802e852 } if(HAL_MDMA_STATE_BUSY != hmdma->State) - 802e79e: 687b ldr r3, [r7, #4] - 802e7a0: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 802e7a4: b2db uxtb r3, r3 - 802e7a6: 2b02 cmp r3, #2 - 802e7a8: d004 beq.n 802e7b4 + 802e822: 687b ldr r3, [r7, #4] + 802e824: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 802e828: b2db uxtb r3, r3 + 802e82a: 2b02 cmp r3, #2 + 802e82c: d004 beq.n 802e838 { /* No transfer ongoing */ hmdma->ErrorCode = HAL_MDMA_ERROR_NO_XFER; - 802e7aa: 687b ldr r3, [r7, #4] - 802e7ac: 2280 movs r2, #128 ; 0x80 - 802e7ae: 669a str r2, [r3, #104] ; 0x68 + 802e82e: 687b ldr r3, [r7, #4] + 802e830: 2280 movs r2, #128 ; 0x80 + 802e832: 669a str r2, [r3, #104] ; 0x68 return HAL_ERROR; - 802e7b0: 2301 movs r3, #1 - 802e7b2: e00c b.n 802e7ce + 802e834: 2301 movs r3, #1 + 802e836: e00c b.n 802e852 } else { /* Set Abort State */ hmdma->State = HAL_MDMA_STATE_ABORT; - 802e7b4: 687b ldr r3, [r7, #4] - 802e7b6: 2204 movs r2, #4 - 802e7b8: f883 203d strb.w r2, [r3, #61] ; 0x3d + 802e838: 687b ldr r3, [r7, #4] + 802e83a: 2204 movs r2, #4 + 802e83c: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Disable the stream */ __HAL_MDMA_DISABLE(hmdma); - 802e7bc: 687b ldr r3, [r7, #4] - 802e7be: 681b ldr r3, [r3, #0] - 802e7c0: 68da ldr r2, [r3, #12] - 802e7c2: 687b ldr r3, [r7, #4] - 802e7c4: 681b ldr r3, [r3, #0] - 802e7c6: f022 0201 bic.w r2, r2, #1 - 802e7ca: 60da str r2, [r3, #12] + 802e840: 687b ldr r3, [r7, #4] + 802e842: 681b ldr r3, [r3, #0] + 802e844: 68da ldr r2, [r3, #12] + 802e846: 687b ldr r3, [r7, #4] + 802e848: 681b ldr r3, [r3, #0] + 802e84a: f022 0201 bic.w r2, r2, #1 + 802e84e: 60da str r2, [r3, #12] } return HAL_OK; - 802e7cc: 2300 movs r3, #0 + 802e850: 2300 movs r3, #0 } - 802e7ce: 4618 mov r0, r3 - 802e7d0: 370c adds r7, #12 - 802e7d2: 46bd mov sp, r7 - 802e7d4: f85d 7b04 ldr.w r7, [sp], #4 - 802e7d8: 4770 bx lr + 802e852: 4618 mov r0, r3 + 802e854: 370c adds r7, #12 + 802e856: 46bd mov sp, r7 + 802e858: f85d 7b04 ldr.w r7, [sp], #4 + 802e85c: 4770 bx lr ... -0802e7dc : +0802e860 : * PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS * regulator. * @retval HAL status. */ HAL_StatusTypeDef HAL_PWREx_ConfigSupply (uint32_t SupplySource) { - 802e7dc: b580 push {r7, lr} - 802e7de: b084 sub sp, #16 - 802e7e0: af00 add r7, sp, #0 - 802e7e2: 6078 str r0, [r7, #4] + 802e860: b580 push {r7, lr} + 802e862: b084 sub sp, #16 + 802e864: af00 add r7, sp, #0 + 802e866: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param (IS_PWR_SUPPLY (SupplySource)); /* Check if supply source was configured */ #if defined (PWR_FLAG_SCUEN) if (__HAL_PWR_GET_FLAG (PWR_FLAG_SCUEN) == 0U) - 802e7e4: 4b19 ldr r3, [pc, #100] ; (802e84c ) - 802e7e6: 68db ldr r3, [r3, #12] - 802e7e8: f003 0304 and.w r3, r3, #4 - 802e7ec: 2b04 cmp r3, #4 - 802e7ee: d00a beq.n 802e806 + 802e868: 4b19 ldr r3, [pc, #100] ; (802e8d0 ) + 802e86a: 68db ldr r3, [r3, #12] + 802e86c: f003 0304 and.w r3, r3, #4 + 802e870: 2b04 cmp r3, #4 + 802e872: d00a beq.n 802e88a #else if ((PWR->CR3 & (PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)) != (PWR_CR3_SMPSEN | PWR_CR3_LDOEN)) #endif /* defined (PWR_FLAG_SCUEN) */ { /* Check supply configuration */ if ((PWR->CR3 & PWR_SUPPLY_CONFIG_MASK) != SupplySource) - 802e7f0: 4b16 ldr r3, [pc, #88] ; (802e84c ) - 802e7f2: 68db ldr r3, [r3, #12] - 802e7f4: f003 0307 and.w r3, r3, #7 - 802e7f8: 687a ldr r2, [r7, #4] - 802e7fa: 429a cmp r2, r3 - 802e7fc: d001 beq.n 802e802 + 802e874: 4b16 ldr r3, [pc, #88] ; (802e8d0 ) + 802e876: 68db ldr r3, [r3, #12] + 802e878: f003 0307 and.w r3, r3, #7 + 802e87c: 687a ldr r2, [r7, #4] + 802e87e: 429a cmp r2, r3 + 802e880: d001 beq.n 802e886 { /* Supply configuration update locked, can't apply a new supply config */ return HAL_ERROR; - 802e7fe: 2301 movs r3, #1 - 802e800: e01f b.n 802e842 + 802e882: 2301 movs r3, #1 + 802e884: e01f b.n 802e8c6 else { /* Supply configuration update locked, but new supply configuration matches with old supply configuration : nothing to do */ return HAL_OK; - 802e802: 2300 movs r3, #0 - 802e804: e01d b.n 802e842 + 802e886: 2300 movs r3, #0 + 802e888: e01d b.n 802e8c6 } } /* Set the power supply configuration */ MODIFY_REG (PWR->CR3, PWR_SUPPLY_CONFIG_MASK, SupplySource); - 802e806: 4b11 ldr r3, [pc, #68] ; (802e84c ) - 802e808: 68db ldr r3, [r3, #12] - 802e80a: f023 0207 bic.w r2, r3, #7 - 802e80e: 490f ldr r1, [pc, #60] ; (802e84c ) - 802e810: 687b ldr r3, [r7, #4] - 802e812: 4313 orrs r3, r2 - 802e814: 60cb str r3, [r1, #12] + 802e88a: 4b11 ldr r3, [pc, #68] ; (802e8d0 ) + 802e88c: 68db ldr r3, [r3, #12] + 802e88e: f023 0207 bic.w r2, r3, #7 + 802e892: 490f ldr r1, [pc, #60] ; (802e8d0 ) + 802e894: 687b ldr r3, [r7, #4] + 802e896: 4313 orrs r3, r2 + 802e898: 60cb str r3, [r1, #12] /* Get tick */ tickstart = HAL_GetTick (); - 802e816: f7f7 fbd5 bl 8025fc4 - 802e81a: 60f8 str r0, [r7, #12] + 802e89a: f7f7 fbd5 bl 8026048 + 802e89e: 60f8 str r0, [r7, #12] /* Wait till voltage level flag is set */ while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U) - 802e81c: e009 b.n 802e832 + 802e8a0: e009 b.n 802e8b6 { if ((HAL_GetTick () - tickstart) > PWR_FLAG_SETTING_DELAY) - 802e81e: f7f7 fbd1 bl 8025fc4 - 802e822: 4602 mov r2, r0 - 802e824: 68fb ldr r3, [r7, #12] - 802e826: 1ad3 subs r3, r2, r3 - 802e828: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 - 802e82c: d901 bls.n 802e832 + 802e8a2: f7f7 fbd1 bl 8026048 + 802e8a6: 4602 mov r2, r0 + 802e8a8: 68fb ldr r3, [r7, #12] + 802e8aa: 1ad3 subs r3, r2, r3 + 802e8ac: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8 + 802e8b0: d901 bls.n 802e8b6 { return HAL_ERROR; - 802e82e: 2301 movs r3, #1 - 802e830: e007 b.n 802e842 + 802e8b2: 2301 movs r3, #1 + 802e8b4: e007 b.n 802e8c6 while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U) - 802e832: 4b06 ldr r3, [pc, #24] ; (802e84c ) - 802e834: 685b ldr r3, [r3, #4] - 802e836: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 802e83a: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 802e83e: d1ee bne.n 802e81e + 802e8b6: 4b06 ldr r3, [pc, #24] ; (802e8d0 ) + 802e8b8: 685b ldr r3, [r3, #4] + 802e8ba: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 802e8be: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 802e8c2: d1ee bne.n 802e8a2 } } } #endif /* defined (SMPS) */ return HAL_OK; - 802e840: 2300 movs r3, #0 + 802e8c4: 2300 movs r3, #0 } - 802e842: 4618 mov r0, r3 - 802e844: 3710 adds r7, #16 - 802e846: 46bd mov sp, r7 - 802e848: bd80 pop {r7, pc} - 802e84a: bf00 nop - 802e84c: 58024800 .word 0x58024800 + 802e8c6: 4618 mov r0, r3 + 802e8c8: 3710 adds r7, #16 + 802e8ca: 46bd mov sp, r7 + 802e8cc: bd80 pop {r7, pc} + 802e8ce: bf00 nop + 802e8d0: 58024800 .word 0x58024800 -0802e850 : +0802e8d4 : * in the QSPI_InitTypeDef and initialize the associated handle. * @param hqspi QSPI handle * @retval HAL status */ HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi) { - 802e850: b580 push {r7, lr} - 802e852: b086 sub sp, #24 - 802e854: af02 add r7, sp, #8 - 802e856: 6078 str r0, [r7, #4] + 802e8d4: b580 push {r7, lr} + 802e8d6: b086 sub sp, #24 + 802e8d8: af02 add r7, sp, #8 + 802e8da: 6078 str r0, [r7, #4] HAL_StatusTypeDef status; uint32_t tickstart = HAL_GetTick(); - 802e858: f7f7 fbb4 bl 8025fc4 - 802e85c: 60f8 str r0, [r7, #12] + 802e8dc: f7f7 fbb4 bl 8026048 + 802e8e0: 60f8 str r0, [r7, #12] /* Check the QSPI handle allocation */ if(hqspi == NULL) - 802e85e: 687b ldr r3, [r7, #4] - 802e860: 2b00 cmp r3, #0 - 802e862: d101 bne.n 802e868 + 802e8e2: 687b ldr r3, [r7, #4] + 802e8e4: 2b00 cmp r3, #0 + 802e8e6: d101 bne.n 802e8ec { return HAL_ERROR; - 802e864: 2301 movs r3, #1 - 802e866: e05f b.n 802e928 + 802e8e8: 2301 movs r3, #1 + 802e8ea: e05f b.n 802e9ac if (hqspi->Init.DualFlash != QSPI_DUALFLASH_ENABLE ) { assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID)); } if(hqspi->State == HAL_QSPI_STATE_RESET) - 802e868: 687b ldr r3, [r7, #4] - 802e86a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e86e: b2db uxtb r3, r3 - 802e870: 2b00 cmp r3, #0 - 802e872: d107 bne.n 802e884 + 802e8ec: 687b ldr r3, [r7, #4] + 802e8ee: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e8f2: b2db uxtb r3, r3 + 802e8f4: 2b00 cmp r3, #0 + 802e8f6: d107 bne.n 802e908 /* Init the low level hardware */ hqspi->MspInitCallback(hqspi); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_QSPI_MspInit(hqspi); - 802e874: 6878 ldr r0, [r7, #4] - 802e876: f7f5 fd8b bl 8024390 + 802e8f8: 6878 ldr r0, [r7, #4] + 802e8fa: f7f5 fd8b bl 8024414 #endif /* Configure the default timeout for the QSPI memory access */ HAL_QSPI_SetTimeout(hqspi, HAL_QSPI_TIMEOUT_DEFAULT_VALUE); - 802e87a: f241 3188 movw r1, #5000 ; 0x1388 - 802e87e: 6878 ldr r0, [r7, #4] - 802e880: f000 fa64 bl 802ed4c + 802e8fe: f241 3188 movw r1, #5000 ; 0x1388 + 802e902: 6878 ldr r0, [r7, #4] + 802e904: f000 fa64 bl 802edd0 } /* Configure QSPI FIFO Threshold */ MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, - 802e884: 687b ldr r3, [r7, #4] - 802e886: 681b ldr r3, [r3, #0] - 802e888: 681b ldr r3, [r3, #0] - 802e88a: f423 6170 bic.w r1, r3, #3840 ; 0xf00 - 802e88e: 687b ldr r3, [r7, #4] - 802e890: 689b ldr r3, [r3, #8] - 802e892: 3b01 subs r3, #1 - 802e894: 021a lsls r2, r3, #8 - 802e896: 687b ldr r3, [r7, #4] - 802e898: 681b ldr r3, [r3, #0] - 802e89a: 430a orrs r2, r1 - 802e89c: 601a str r2, [r3, #0] + 802e908: 687b ldr r3, [r7, #4] + 802e90a: 681b ldr r3, [r3, #0] + 802e90c: 681b ldr r3, [r3, #0] + 802e90e: f423 6170 bic.w r1, r3, #3840 ; 0xf00 + 802e912: 687b ldr r3, [r7, #4] + 802e914: 689b ldr r3, [r3, #8] + 802e916: 3b01 subs r3, #1 + 802e918: 021a lsls r2, r3, #8 + 802e91a: 687b ldr r3, [r7, #4] + 802e91c: 681b ldr r3, [r3, #0] + 802e91e: 430a orrs r2, r1 + 802e920: 601a str r2, [r3, #0] ((hqspi->Init.FifoThreshold - 1U) << QUADSPI_CR_FTHRES_Pos)); /* Wait till BUSY flag reset */ status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); - 802e89e: 687b ldr r3, [r7, #4] - 802e8a0: 6c9b ldr r3, [r3, #72] ; 0x48 - 802e8a2: 9300 str r3, [sp, #0] - 802e8a4: 68fb ldr r3, [r7, #12] - 802e8a6: 2200 movs r2, #0 - 802e8a8: 2120 movs r1, #32 - 802e8aa: 6878 ldr r0, [r7, #4] - 802e8ac: f000 fa8f bl 802edce - 802e8b0: 4603 mov r3, r0 - 802e8b2: 72fb strb r3, [r7, #11] + 802e922: 687b ldr r3, [r7, #4] + 802e924: 6c9b ldr r3, [r3, #72] ; 0x48 + 802e926: 9300 str r3, [sp, #0] + 802e928: 68fb ldr r3, [r7, #12] + 802e92a: 2200 movs r2, #0 + 802e92c: 2120 movs r1, #32 + 802e92e: 6878 ldr r0, [r7, #4] + 802e930: f000 fa8f bl 802ee52 + 802e934: 4603 mov r3, r0 + 802e936: 72fb strb r3, [r7, #11] if(status == HAL_OK) - 802e8b4: 7afb ldrb r3, [r7, #11] - 802e8b6: 2b00 cmp r3, #0 - 802e8b8: d135 bne.n 802e926 + 802e938: 7afb ldrb r3, [r7, #11] + 802e93a: 2b00 cmp r3, #0 + 802e93c: d135 bne.n 802e9aa { /* Configure QSPI Clock Prescaler and Sample Shift */ MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT | QUADSPI_CR_FSEL | QUADSPI_CR_DFM), - 802e8ba: 687b ldr r3, [r7, #4] - 802e8bc: 681b ldr r3, [r3, #0] - 802e8be: 681a ldr r2, [r3, #0] - 802e8c0: 4b1b ldr r3, [pc, #108] ; (802e930 ) - 802e8c2: 4013 ands r3, r2 - 802e8c4: 687a ldr r2, [r7, #4] - 802e8c6: 6852 ldr r2, [r2, #4] - 802e8c8: 0611 lsls r1, r2, #24 - 802e8ca: 687a ldr r2, [r7, #4] - 802e8cc: 68d2 ldr r2, [r2, #12] - 802e8ce: 4311 orrs r1, r2 - 802e8d0: 687a ldr r2, [r7, #4] - 802e8d2: 69d2 ldr r2, [r2, #28] - 802e8d4: 4311 orrs r1, r2 - 802e8d6: 687a ldr r2, [r7, #4] - 802e8d8: 6a12 ldr r2, [r2, #32] - 802e8da: 4311 orrs r1, r2 - 802e8dc: 687a ldr r2, [r7, #4] - 802e8de: 6812 ldr r2, [r2, #0] - 802e8e0: 430b orrs r3, r1 - 802e8e2: 6013 str r3, [r2, #0] + 802e93e: 687b ldr r3, [r7, #4] + 802e940: 681b ldr r3, [r3, #0] + 802e942: 681a ldr r2, [r3, #0] + 802e944: 4b1b ldr r3, [pc, #108] ; (802e9b4 ) + 802e946: 4013 ands r3, r2 + 802e948: 687a ldr r2, [r7, #4] + 802e94a: 6852 ldr r2, [r2, #4] + 802e94c: 0611 lsls r1, r2, #24 + 802e94e: 687a ldr r2, [r7, #4] + 802e950: 68d2 ldr r2, [r2, #12] + 802e952: 4311 orrs r1, r2 + 802e954: 687a ldr r2, [r7, #4] + 802e956: 69d2 ldr r2, [r2, #28] + 802e958: 4311 orrs r1, r2 + 802e95a: 687a ldr r2, [r7, #4] + 802e95c: 6a12 ldr r2, [r2, #32] + 802e95e: 4311 orrs r1, r2 + 802e960: 687a ldr r2, [r7, #4] + 802e962: 6812 ldr r2, [r2, #0] + 802e964: 430b orrs r3, r1 + 802e966: 6013 str r3, [r2, #0] ((hqspi->Init.ClockPrescaler << QUADSPI_CR_PRESCALER_Pos) | hqspi->Init.SampleShifting | hqspi->Init.FlashID | hqspi->Init.DualFlash)); /* Configure QSPI Flash Size, CS High Time and Clock Mode */ MODIFY_REG(hqspi->Instance->DCR, (QUADSPI_DCR_FSIZE | QUADSPI_DCR_CSHT | QUADSPI_DCR_CKMODE), - 802e8e4: 687b ldr r3, [r7, #4] - 802e8e6: 681b ldr r3, [r3, #0] - 802e8e8: 685a ldr r2, [r3, #4] - 802e8ea: 4b12 ldr r3, [pc, #72] ; (802e934 ) - 802e8ec: 4013 ands r3, r2 - 802e8ee: 687a ldr r2, [r7, #4] - 802e8f0: 6912 ldr r2, [r2, #16] - 802e8f2: 0411 lsls r1, r2, #16 - 802e8f4: 687a ldr r2, [r7, #4] - 802e8f6: 6952 ldr r2, [r2, #20] - 802e8f8: 4311 orrs r1, r2 - 802e8fa: 687a ldr r2, [r7, #4] - 802e8fc: 6992 ldr r2, [r2, #24] - 802e8fe: 4311 orrs r1, r2 - 802e900: 687a ldr r2, [r7, #4] - 802e902: 6812 ldr r2, [r2, #0] - 802e904: 430b orrs r3, r1 - 802e906: 6053 str r3, [r2, #4] + 802e968: 687b ldr r3, [r7, #4] + 802e96a: 681b ldr r3, [r3, #0] + 802e96c: 685a ldr r2, [r3, #4] + 802e96e: 4b12 ldr r3, [pc, #72] ; (802e9b8 ) + 802e970: 4013 ands r3, r2 + 802e972: 687a ldr r2, [r7, #4] + 802e974: 6912 ldr r2, [r2, #16] + 802e976: 0411 lsls r1, r2, #16 + 802e978: 687a ldr r2, [r7, #4] + 802e97a: 6952 ldr r2, [r2, #20] + 802e97c: 4311 orrs r1, r2 + 802e97e: 687a ldr r2, [r7, #4] + 802e980: 6992 ldr r2, [r2, #24] + 802e982: 4311 orrs r1, r2 + 802e984: 687a ldr r2, [r7, #4] + 802e986: 6812 ldr r2, [r2, #0] + 802e988: 430b orrs r3, r1 + 802e98a: 6053 str r3, [r2, #4] ((hqspi->Init.FlashSize << QUADSPI_DCR_FSIZE_Pos) | hqspi->Init.ChipSelectHighTime | hqspi->Init.ClockMode)); /* Enable the QSPI peripheral */ __HAL_QSPI_ENABLE(hqspi); - 802e908: 687b ldr r3, [r7, #4] - 802e90a: 681b ldr r3, [r3, #0] - 802e90c: 681a ldr r2, [r3, #0] - 802e90e: 687b ldr r3, [r7, #4] - 802e910: 681b ldr r3, [r3, #0] - 802e912: f042 0201 orr.w r2, r2, #1 - 802e916: 601a str r2, [r3, #0] + 802e98c: 687b ldr r3, [r7, #4] + 802e98e: 681b ldr r3, [r3, #0] + 802e990: 681a ldr r2, [r3, #0] + 802e992: 687b ldr r3, [r7, #4] + 802e994: 681b ldr r3, [r3, #0] + 802e996: f042 0201 orr.w r2, r2, #1 + 802e99a: 601a str r2, [r3, #0] /* Set QSPI error code to none */ hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; - 802e918: 687b ldr r3, [r7, #4] - 802e91a: 2200 movs r2, #0 - 802e91c: 645a str r2, [r3, #68] ; 0x44 + 802e99c: 687b ldr r3, [r7, #4] + 802e99e: 2200 movs r2, #0 + 802e9a0: 645a str r2, [r3, #68] ; 0x44 /* Initialize the QSPI state */ hqspi->State = HAL_QSPI_STATE_READY; - 802e91e: 687b ldr r3, [r7, #4] - 802e920: 2201 movs r2, #1 - 802e922: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802e9a2: 687b ldr r3, [r7, #4] + 802e9a4: 2201 movs r2, #1 + 802e9a6: f883 2041 strb.w r2, [r3, #65] ; 0x41 } /* Return function status */ return status; - 802e926: 7afb ldrb r3, [r7, #11] + 802e9aa: 7afb ldrb r3, [r7, #11] } - 802e928: 4618 mov r0, r3 - 802e92a: 3710 adds r7, #16 - 802e92c: 46bd mov sp, r7 - 802e92e: bd80 pop {r7, pc} - 802e930: 00ffff2f .word 0x00ffff2f - 802e934: ffe0f8fe .word 0xffe0f8fe + 802e9ac: 4618 mov r0, r3 + 802e9ae: 3710 adds r7, #16 + 802e9b0: 46bd mov sp, r7 + 802e9b2: bd80 pop {r7, pc} + 802e9b4: 00ffff2f .word 0x00ffff2f + 802e9b8: ffe0f8fe .word 0xffe0f8fe -0802e938 : +0802e9bc : * @brief Handle QSPI interrupt request. * @param hqspi QSPI handle * @retval None */ void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) { - 802e938: b580 push {r7, lr} - 802e93a: b086 sub sp, #24 - 802e93c: af00 add r7, sp, #0 - 802e93e: 6078 str r0, [r7, #4] + 802e9bc: b580 push {r7, lr} + 802e9be: b086 sub sp, #24 + 802e9c0: af00 add r7, sp, #0 + 802e9c2: 6078 str r0, [r7, #4] __IO uint32_t *data_reg; uint32_t flag = READ_REG(hqspi->Instance->SR); - 802e940: 687b ldr r3, [r7, #4] - 802e942: 681b ldr r3, [r3, #0] - 802e944: 689b ldr r3, [r3, #8] - 802e946: 617b str r3, [r7, #20] + 802e9c4: 687b ldr r3, [r7, #4] + 802e9c6: 681b ldr r3, [r3, #0] + 802e9c8: 689b ldr r3, [r3, #8] + 802e9ca: 617b str r3, [r7, #20] uint32_t itsource = READ_REG(hqspi->Instance->CR); - 802e948: 687b ldr r3, [r7, #4] - 802e94a: 681b ldr r3, [r3, #0] - 802e94c: 681b ldr r3, [r3, #0] - 802e94e: 613b str r3, [r7, #16] + 802e9cc: 687b ldr r3, [r7, #4] + 802e9ce: 681b ldr r3, [r3, #0] + 802e9d0: 681b ldr r3, [r3, #0] + 802e9d2: 613b str r3, [r7, #16] /* QSPI Fifo Threshold interrupt occurred ----------------------------------*/ if(((flag & QSPI_FLAG_FT) != 0U) && ((itsource & QSPI_IT_FT) != 0U)) - 802e950: 697b ldr r3, [r7, #20] - 802e952: f003 0304 and.w r3, r3, #4 - 802e956: 2b00 cmp r3, #0 - 802e958: d064 beq.n 802ea24 - 802e95a: 693b ldr r3, [r7, #16] - 802e95c: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 802e960: 2b00 cmp r3, #0 - 802e962: d05f beq.n 802ea24 + 802e9d4: 697b ldr r3, [r7, #20] + 802e9d6: f003 0304 and.w r3, r3, #4 + 802e9da: 2b00 cmp r3, #0 + 802e9dc: d064 beq.n 802eaa8 + 802e9de: 693b ldr r3, [r7, #16] + 802e9e0: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 802e9e4: 2b00 cmp r3, #0 + 802e9e6: d05f beq.n 802eaa8 { data_reg = &hqspi->Instance->DR; - 802e964: 687b ldr r3, [r7, #4] - 802e966: 681b ldr r3, [r3, #0] - 802e968: 3320 adds r3, #32 - 802e96a: 60fb str r3, [r7, #12] + 802e9e8: 687b ldr r3, [r7, #4] + 802e9ea: 681b ldr r3, [r3, #0] + 802e9ec: 3320 adds r3, #32 + 802e9ee: 60fb str r3, [r7, #12] if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802e96c: 687b ldr r3, [r7, #4] - 802e96e: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e972: b2db uxtb r3, r3 - 802e974: 2b12 cmp r3, #18 - 802e976: d125 bne.n 802e9c4 + 802e9f0: 687b ldr r3, [r7, #4] + 802e9f2: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802e9f6: b2db uxtb r3, r3 + 802e9f8: 2b12 cmp r3, #18 + 802e9fa: d125 bne.n 802ea48 { /* Transmission process */ while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) - 802e978: e01c b.n 802e9b4 + 802e9fc: e01c b.n 802ea38 { if (hqspi->TxXferCount > 0U) - 802e97a: 687b ldr r3, [r7, #4] - 802e97c: 6adb ldr r3, [r3, #44] ; 0x2c - 802e97e: 2b00 cmp r3, #0 - 802e980: d00f beq.n 802e9a2 + 802e9fe: 687b ldr r3, [r7, #4] + 802ea00: 6adb ldr r3, [r3, #44] ; 0x2c + 802ea02: 2b00 cmp r3, #0 + 802ea04: d00f beq.n 802ea26 { /* Fill the FIFO until the threshold is reached */ *((__IO uint8_t *)data_reg) = *hqspi->pTxBuffPtr; - 802e982: 687b ldr r3, [r7, #4] - 802e984: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e986: 781a ldrb r2, [r3, #0] - 802e988: 68fb ldr r3, [r7, #12] - 802e98a: 701a strb r2, [r3, #0] + 802ea06: 687b ldr r3, [r7, #4] + 802ea08: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ea0a: 781a ldrb r2, [r3, #0] + 802ea0c: 68fb ldr r3, [r7, #12] + 802ea0e: 701a strb r2, [r3, #0] hqspi->pTxBuffPtr++; - 802e98c: 687b ldr r3, [r7, #4] - 802e98e: 6a5b ldr r3, [r3, #36] ; 0x24 - 802e990: 1c5a adds r2, r3, #1 - 802e992: 687b ldr r3, [r7, #4] - 802e994: 625a str r2, [r3, #36] ; 0x24 + 802ea10: 687b ldr r3, [r7, #4] + 802ea12: 6a5b ldr r3, [r3, #36] ; 0x24 + 802ea14: 1c5a adds r2, r3, #1 + 802ea16: 687b ldr r3, [r7, #4] + 802ea18: 625a str r2, [r3, #36] ; 0x24 hqspi->TxXferCount--; - 802e996: 687b ldr r3, [r7, #4] - 802e998: 6adb ldr r3, [r3, #44] ; 0x2c - 802e99a: 1e5a subs r2, r3, #1 - 802e99c: 687b ldr r3, [r7, #4] - 802e99e: 62da str r2, [r3, #44] ; 0x2c - 802e9a0: e008 b.n 802e9b4 + 802ea1a: 687b ldr r3, [r7, #4] + 802ea1c: 6adb ldr r3, [r3, #44] ; 0x2c + 802ea1e: 1e5a subs r2, r3, #1 + 802ea20: 687b ldr r3, [r7, #4] + 802ea22: 62da str r2, [r3, #44] ; 0x2c + 802ea24: e008 b.n 802ea38 } else { /* No more data available for the transfer */ /* Disable the QSPI FIFO Threshold Interrupt */ __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT); - 802e9a2: 687b ldr r3, [r7, #4] - 802e9a4: 681b ldr r3, [r3, #0] - 802e9a6: 681a ldr r2, [r3, #0] - 802e9a8: 687b ldr r3, [r7, #4] - 802e9aa: 681b ldr r3, [r3, #0] - 802e9ac: f422 2280 bic.w r2, r2, #262144 ; 0x40000 - 802e9b0: 601a str r2, [r3, #0] + 802ea26: 687b ldr r3, [r7, #4] + 802ea28: 681b ldr r3, [r3, #0] + 802ea2a: 681a ldr r2, [r3, #0] + 802ea2c: 687b ldr r3, [r7, #4] + 802ea2e: 681b ldr r3, [r3, #0] + 802ea30: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 802ea34: 601a str r2, [r3, #0] break; - 802e9b2: e033 b.n 802ea1c + 802ea36: e033 b.n 802eaa0 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) - 802e9b4: 687b ldr r3, [r7, #4] - 802e9b6: 681b ldr r3, [r3, #0] - 802e9b8: 689b ldr r3, [r3, #8] - 802e9ba: f003 0304 and.w r3, r3, #4 - 802e9be: 2b00 cmp r3, #0 - 802e9c0: d1db bne.n 802e97a - 802e9c2: e02b b.n 802ea1c + 802ea38: 687b ldr r3, [r7, #4] + 802ea3a: 681b ldr r3, [r3, #0] + 802ea3c: 689b ldr r3, [r3, #8] + 802ea3e: f003 0304 and.w r3, r3, #4 + 802ea42: 2b00 cmp r3, #0 + 802ea44: d1db bne.n 802e9fe + 802ea46: e02b b.n 802eaa0 } } } else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) - 802e9c4: 687b ldr r3, [r7, #4] - 802e9c6: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802e9ca: b2db uxtb r3, r3 - 802e9cc: 2b22 cmp r3, #34 ; 0x22 - 802e9ce: d125 bne.n 802ea1c + 802ea48: 687b ldr r3, [r7, #4] + 802ea4a: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802ea4e: b2db uxtb r3, r3 + 802ea50: 2b22 cmp r3, #34 ; 0x22 + 802ea52: d125 bne.n 802eaa0 { /* Receiving Process */ while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) - 802e9d0: e01d b.n 802ea0e + 802ea54: e01d b.n 802ea92 { if (hqspi->RxXferCount > 0U) - 802e9d2: 687b ldr r3, [r7, #4] - 802e9d4: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e9d6: 2b00 cmp r3, #0 - 802e9d8: d010 beq.n 802e9fc + 802ea56: 687b ldr r3, [r7, #4] + 802ea58: 6b9b ldr r3, [r3, #56] ; 0x38 + 802ea5a: 2b00 cmp r3, #0 + 802ea5c: d010 beq.n 802ea80 { /* Read the FIFO until the threshold is reached */ *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg); - 802e9da: 687b ldr r3, [r7, #4] - 802e9dc: 6b1b ldr r3, [r3, #48] ; 0x30 - 802e9de: 68fa ldr r2, [r7, #12] - 802e9e0: 7812 ldrb r2, [r2, #0] - 802e9e2: b2d2 uxtb r2, r2 - 802e9e4: 701a strb r2, [r3, #0] + 802ea5e: 687b ldr r3, [r7, #4] + 802ea60: 6b1b ldr r3, [r3, #48] ; 0x30 + 802ea62: 68fa ldr r2, [r7, #12] + 802ea64: 7812 ldrb r2, [r2, #0] + 802ea66: b2d2 uxtb r2, r2 + 802ea68: 701a strb r2, [r3, #0] hqspi->pRxBuffPtr++; - 802e9e6: 687b ldr r3, [r7, #4] - 802e9e8: 6b1b ldr r3, [r3, #48] ; 0x30 - 802e9ea: 1c5a adds r2, r3, #1 - 802e9ec: 687b ldr r3, [r7, #4] - 802e9ee: 631a str r2, [r3, #48] ; 0x30 + 802ea6a: 687b ldr r3, [r7, #4] + 802ea6c: 6b1b ldr r3, [r3, #48] ; 0x30 + 802ea6e: 1c5a adds r2, r3, #1 + 802ea70: 687b ldr r3, [r7, #4] + 802ea72: 631a str r2, [r3, #48] ; 0x30 hqspi->RxXferCount--; - 802e9f0: 687b ldr r3, [r7, #4] - 802e9f2: 6b9b ldr r3, [r3, #56] ; 0x38 - 802e9f4: 1e5a subs r2, r3, #1 - 802e9f6: 687b ldr r3, [r7, #4] - 802e9f8: 639a str r2, [r3, #56] ; 0x38 - 802e9fa: e008 b.n 802ea0e + 802ea74: 687b ldr r3, [r7, #4] + 802ea76: 6b9b ldr r3, [r3, #56] ; 0x38 + 802ea78: 1e5a subs r2, r3, #1 + 802ea7a: 687b ldr r3, [r7, #4] + 802ea7c: 639a str r2, [r3, #56] ; 0x38 + 802ea7e: e008 b.n 802ea92 } else { /* All data have been received for the transfer */ /* Disable the QSPI FIFO Threshold Interrupt */ __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT); - 802e9fc: 687b ldr r3, [r7, #4] - 802e9fe: 681b ldr r3, [r3, #0] - 802ea00: 681a ldr r2, [r3, #0] - 802ea02: 687b ldr r3, [r7, #4] - 802ea04: 681b ldr r3, [r3, #0] - 802ea06: f422 2280 bic.w r2, r2, #262144 ; 0x40000 - 802ea0a: 601a str r2, [r3, #0] + 802ea80: 687b ldr r3, [r7, #4] + 802ea82: 681b ldr r3, [r3, #0] + 802ea84: 681a ldr r2, [r3, #0] + 802ea86: 687b ldr r3, [r7, #4] + 802ea88: 681b ldr r3, [r3, #0] + 802ea8a: f422 2280 bic.w r2, r2, #262144 ; 0x40000 + 802ea8e: 601a str r2, [r3, #0] break; - 802ea0c: e006 b.n 802ea1c + 802ea90: e006 b.n 802eaa0 while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != RESET) - 802ea0e: 687b ldr r3, [r7, #4] - 802ea10: 681b ldr r3, [r3, #0] - 802ea12: 689b ldr r3, [r3, #8] - 802ea14: f003 0304 and.w r3, r3, #4 - 802ea18: 2b00 cmp r3, #0 - 802ea1a: d1da bne.n 802e9d2 + 802ea92: 687b ldr r3, [r7, #4] + 802ea94: 681b ldr r3, [r3, #0] + 802ea96: 689b ldr r3, [r3, #8] + 802ea98: f003 0304 and.w r3, r3, #4 + 802ea9c: 2b00 cmp r3, #0 + 802ea9e: d1da bne.n 802ea56 /* FIFO Threshold callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->FifoThresholdCallback(hqspi); #else HAL_QSPI_FifoThresholdCallback(hqspi); - 802ea1c: 6878 ldr r0, [r7, #4] - 802ea1e: f000 f977 bl 802ed10 - 802ea22: e13c b.n 802ec9e + 802eaa0: 6878 ldr r0, [r7, #4] + 802eaa2: f000 f977 bl 802ed94 + 802eaa6: e13c b.n 802ed22 #endif } /* QSPI Transfer Complete interrupt occurred -------------------------------*/ else if(((flag & QSPI_FLAG_TC) != 0U) && ((itsource & QSPI_IT_TC) != 0U)) - 802ea24: 697b ldr r3, [r7, #20] - 802ea26: f003 0302 and.w r3, r3, #2 - 802ea2a: 2b00 cmp r3, #0 - 802ea2c: f000 80b0 beq.w 802eb90 - 802ea30: 693b ldr r3, [r7, #16] - 802ea32: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802ea36: 2b00 cmp r3, #0 - 802ea38: f000 80aa beq.w 802eb90 + 802eaa8: 697b ldr r3, [r7, #20] + 802eaaa: f003 0302 and.w r3, r3, #2 + 802eaae: 2b00 cmp r3, #0 + 802eab0: f000 80b0 beq.w 802ec14 + 802eab4: 693b ldr r3, [r7, #16] + 802eab6: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802eaba: 2b00 cmp r3, #0 + 802eabc: f000 80aa beq.w 802ec14 { /* Clear interrupt */ WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TC); - 802ea3c: 687b ldr r3, [r7, #4] - 802ea3e: 681b ldr r3, [r3, #0] - 802ea40: 2202 movs r2, #2 - 802ea42: 60da str r2, [r3, #12] + 802eac0: 687b ldr r3, [r7, #4] + 802eac2: 681b ldr r3, [r3, #0] + 802eac4: 2202 movs r2, #2 + 802eac6: 60da str r2, [r3, #12] /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */ __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); - 802ea44: 687b ldr r3, [r7, #4] - 802ea46: 681b ldr r3, [r3, #0] - 802ea48: 681a ldr r2, [r3, #0] - 802ea4a: 687b ldr r3, [r7, #4] - 802ea4c: 681b ldr r3, [r3, #0] - 802ea4e: f422 22e0 bic.w r2, r2, #458752 ; 0x70000 - 802ea52: 601a str r2, [r3, #0] + 802eac8: 687b ldr r3, [r7, #4] + 802eaca: 681b ldr r3, [r3, #0] + 802eacc: 681a ldr r2, [r3, #0] + 802eace: 687b ldr r3, [r7, #4] + 802ead0: 681b ldr r3, [r3, #0] + 802ead2: f422 22e0 bic.w r2, r2, #458752 ; 0x70000 + 802ead6: 601a str r2, [r3, #0] /* Transfer complete callback */ if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802ea54: 687b ldr r3, [r7, #4] - 802ea56: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802ea5a: b2db uxtb r3, r3 - 802ea5c: 2b12 cmp r3, #18 - 802ea5e: d120 bne.n 802eaa2 + 802ead8: 687b ldr r3, [r7, #4] + 802eada: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802eade: b2db uxtb r3, r3 + 802eae0: 2b12 cmp r3, #18 + 802eae2: d120 bne.n 802eb26 { if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ea60: 687b ldr r3, [r7, #4] - 802ea62: 681b ldr r3, [r3, #0] - 802ea64: 681b ldr r3, [r3, #0] - 802ea66: f003 0304 and.w r3, r3, #4 - 802ea6a: 2b00 cmp r3, #0 - 802ea6c: d011 beq.n 802ea92 + 802eae4: 687b ldr r3, [r7, #4] + 802eae6: 681b ldr r3, [r3, #0] + 802eae8: 681b ldr r3, [r3, #0] + 802eaea: f003 0304 and.w r3, r3, #4 + 802eaee: 2b00 cmp r3, #0 + 802eaf0: d011 beq.n 802eb16 { /* Disable using MDMA by clearing DMAEN, note that DMAEN bit is "reserved" but no impact on H7 HW and it minimize the cost in the footprint */ CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); - 802ea6e: 687b ldr r3, [r7, #4] - 802ea70: 681b ldr r3, [r3, #0] - 802ea72: 681a ldr r2, [r3, #0] - 802ea74: 687b ldr r3, [r7, #4] - 802ea76: 681b ldr r3, [r3, #0] - 802ea78: f022 0204 bic.w r2, r2, #4 - 802ea7c: 601a str r2, [r3, #0] + 802eaf2: 687b ldr r3, [r7, #4] + 802eaf4: 681b ldr r3, [r3, #0] + 802eaf6: 681a ldr r2, [r3, #0] + 802eaf8: 687b ldr r3, [r7, #4] + 802eafa: 681b ldr r3, [r3, #0] + 802eafc: f022 0204 bic.w r2, r2, #4 + 802eb00: 601a str r2, [r3, #0] /* Disable the MDMA channel */ __HAL_MDMA_DISABLE(hqspi->hmdma); - 802ea7e: 687b ldr r3, [r7, #4] - 802ea80: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ea82: 681b ldr r3, [r3, #0] - 802ea84: 68da ldr r2, [r3, #12] - 802ea86: 687b ldr r3, [r7, #4] - 802ea88: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ea8a: 681b ldr r3, [r3, #0] - 802ea8c: f022 0201 bic.w r2, r2, #1 - 802ea90: 60da str r2, [r3, #12] + 802eb02: 687b ldr r3, [r7, #4] + 802eb04: 6bdb ldr r3, [r3, #60] ; 0x3c + 802eb06: 681b ldr r3, [r3, #0] + 802eb08: 68da ldr r2, [r3, #12] + 802eb0a: 687b ldr r3, [r7, #4] + 802eb0c: 6bdb ldr r3, [r3, #60] ; 0x3c + 802eb0e: 681b ldr r3, [r3, #0] + 802eb10: f022 0201 bic.w r2, r2, #1 + 802eb14: 60da str r2, [r3, #12] } /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802ea92: 687b ldr r3, [r7, #4] - 802ea94: 2201 movs r2, #1 - 802ea96: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802eb16: 687b ldr r3, [r7, #4] + 802eb18: 2201 movs r2, #1 + 802eb1a: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* TX Complete callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->TxCpltCallback(hqspi); #else HAL_QSPI_TxCpltCallback(hqspi); - 802ea9a: 6878 ldr r0, [r7, #4] - 802ea9c: f000 f92e bl 802ecfc + 802eb1e: 6878 ldr r0, [r7, #4] + 802eb20: f000 f92e bl 802ed80 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802eaa0: e0fa b.n 802ec98 + 802eb24: e0fa b.n 802ed1c #endif } else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) - 802eaa2: 687b ldr r3, [r7, #4] - 802eaa4: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802eaa8: b2db uxtb r3, r3 - 802eaaa: 2b22 cmp r3, #34 ; 0x22 - 802eaac: d143 bne.n 802eb36 + 802eb26: 687b ldr r3, [r7, #4] + 802eb28: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802eb2c: b2db uxtb r3, r3 + 802eb2e: 2b22 cmp r3, #34 ; 0x22 + 802eb30: d143 bne.n 802ebba { if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802eaae: 687b ldr r3, [r7, #4] - 802eab0: 681b ldr r3, [r3, #0] - 802eab2: 681b ldr r3, [r3, #0] - 802eab4: f003 0304 and.w r3, r3, #4 - 802eab8: 2b00 cmp r3, #0 - 802eaba: d012 beq.n 802eae2 + 802eb32: 687b ldr r3, [r7, #4] + 802eb34: 681b ldr r3, [r3, #0] + 802eb36: 681b ldr r3, [r3, #0] + 802eb38: f003 0304 and.w r3, r3, #4 + 802eb3c: 2b00 cmp r3, #0 + 802eb3e: d012 beq.n 802eb66 { /* Disable using MDMA by clearing DMAEN, note that DMAEN bit is "reserved" but no impact on H7 HW and it minimize the cost in the footprint */ CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); - 802eabc: 687b ldr r3, [r7, #4] - 802eabe: 681b ldr r3, [r3, #0] - 802eac0: 681a ldr r2, [r3, #0] - 802eac2: 687b ldr r3, [r7, #4] - 802eac4: 681b ldr r3, [r3, #0] - 802eac6: f022 0204 bic.w r2, r2, #4 - 802eaca: 601a str r2, [r3, #0] + 802eb40: 687b ldr r3, [r7, #4] + 802eb42: 681b ldr r3, [r3, #0] + 802eb44: 681a ldr r2, [r3, #0] + 802eb46: 687b ldr r3, [r7, #4] + 802eb48: 681b ldr r3, [r3, #0] + 802eb4a: f022 0204 bic.w r2, r2, #4 + 802eb4e: 601a str r2, [r3, #0] /* Disable the MDMA channel */ __HAL_MDMA_DISABLE(hqspi->hmdma); - 802eacc: 687b ldr r3, [r7, #4] - 802eace: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ead0: 681b ldr r3, [r3, #0] - 802ead2: 68da ldr r2, [r3, #12] - 802ead4: 687b ldr r3, [r7, #4] - 802ead6: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ead8: 681b ldr r3, [r3, #0] - 802eada: f022 0201 bic.w r2, r2, #1 - 802eade: 60da str r2, [r3, #12] - 802eae0: e021 b.n 802eb26 + 802eb50: 687b ldr r3, [r7, #4] + 802eb52: 6bdb ldr r3, [r3, #60] ; 0x3c + 802eb54: 681b ldr r3, [r3, #0] + 802eb56: 68da ldr r2, [r3, #12] + 802eb58: 687b ldr r3, [r7, #4] + 802eb5a: 6bdb ldr r3, [r3, #60] ; 0x3c + 802eb5c: 681b ldr r3, [r3, #0] + 802eb5e: f022 0201 bic.w r2, r2, #1 + 802eb62: 60da str r2, [r3, #12] + 802eb64: e021 b.n 802ebaa } else { data_reg = &hqspi->Instance->DR; - 802eae2: 687b ldr r3, [r7, #4] - 802eae4: 681b ldr r3, [r3, #0] - 802eae6: 3320 adds r3, #32 - 802eae8: 60fb str r3, [r7, #12] + 802eb66: 687b ldr r3, [r7, #4] + 802eb68: 681b ldr r3, [r3, #0] + 802eb6a: 3320 adds r3, #32 + 802eb6c: 60fb str r3, [r7, #12] while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0U) - 802eaea: e013 b.n 802eb14 + 802eb6e: e013 b.n 802eb98 { if (hqspi->RxXferCount > 0U) - 802eaec: 687b ldr r3, [r7, #4] - 802eaee: 6b9b ldr r3, [r3, #56] ; 0x38 - 802eaf0: 2b00 cmp r3, #0 - 802eaf2: d017 beq.n 802eb24 + 802eb70: 687b ldr r3, [r7, #4] + 802eb72: 6b9b ldr r3, [r3, #56] ; 0x38 + 802eb74: 2b00 cmp r3, #0 + 802eb76: d017 beq.n 802eba8 { /* Read the last data received in the FIFO until it is empty */ *hqspi->pRxBuffPtr = *((__IO uint8_t *)data_reg); - 802eaf4: 687b ldr r3, [r7, #4] - 802eaf6: 6b1b ldr r3, [r3, #48] ; 0x30 - 802eaf8: 68fa ldr r2, [r7, #12] - 802eafa: 7812 ldrb r2, [r2, #0] - 802eafc: b2d2 uxtb r2, r2 - 802eafe: 701a strb r2, [r3, #0] + 802eb78: 687b ldr r3, [r7, #4] + 802eb7a: 6b1b ldr r3, [r3, #48] ; 0x30 + 802eb7c: 68fa ldr r2, [r7, #12] + 802eb7e: 7812 ldrb r2, [r2, #0] + 802eb80: b2d2 uxtb r2, r2 + 802eb82: 701a strb r2, [r3, #0] hqspi->pRxBuffPtr++; - 802eb00: 687b ldr r3, [r7, #4] - 802eb02: 6b1b ldr r3, [r3, #48] ; 0x30 - 802eb04: 1c5a adds r2, r3, #1 - 802eb06: 687b ldr r3, [r7, #4] - 802eb08: 631a str r2, [r3, #48] ; 0x30 + 802eb84: 687b ldr r3, [r7, #4] + 802eb86: 6b1b ldr r3, [r3, #48] ; 0x30 + 802eb88: 1c5a adds r2, r3, #1 + 802eb8a: 687b ldr r3, [r7, #4] + 802eb8c: 631a str r2, [r3, #48] ; 0x30 hqspi->RxXferCount--; - 802eb0a: 687b ldr r3, [r7, #4] - 802eb0c: 6b9b ldr r3, [r3, #56] ; 0x38 - 802eb0e: 1e5a subs r2, r3, #1 - 802eb10: 687b ldr r3, [r7, #4] - 802eb12: 639a str r2, [r3, #56] ; 0x38 + 802eb8e: 687b ldr r3, [r7, #4] + 802eb90: 6b9b ldr r3, [r3, #56] ; 0x38 + 802eb92: 1e5a subs r2, r3, #1 + 802eb94: 687b ldr r3, [r7, #4] + 802eb96: 639a str r2, [r3, #56] ; 0x38 while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0U) - 802eb14: 687b ldr r3, [r7, #4] - 802eb16: 681b ldr r3, [r3, #0] - 802eb18: 689b ldr r3, [r3, #8] - 802eb1a: f403 537c and.w r3, r3, #16128 ; 0x3f00 - 802eb1e: 2b00 cmp r3, #0 - 802eb20: d1e4 bne.n 802eaec - 802eb22: e000 b.n 802eb26 + 802eb98: 687b ldr r3, [r7, #4] + 802eb9a: 681b ldr r3, [r3, #0] + 802eb9c: 689b ldr r3, [r3, #8] + 802eb9e: f403 537c and.w r3, r3, #16128 ; 0x3f00 + 802eba2: 2b00 cmp r3, #0 + 802eba4: d1e4 bne.n 802eb70 + 802eba6: e000 b.n 802ebaa } else { /* All data have been received for the transfer */ break; - 802eb24: bf00 nop + 802eba8: bf00 nop } } /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802eb26: 687b ldr r3, [r7, #4] - 802eb28: 2201 movs r2, #1 - 802eb2a: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ebaa: 687b ldr r3, [r7, #4] + 802ebac: 2201 movs r2, #1 + 802ebae: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* RX Complete callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->RxCpltCallback(hqspi); #else HAL_QSPI_RxCpltCallback(hqspi); - 802eb2e: 6878 ldr r0, [r7, #4] - 802eb30: f000 f8da bl 802ece8 + 802ebb2: 6878 ldr r0, [r7, #4] + 802ebb4: f000 f8da bl 802ed6c if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802eb34: e0b0 b.n 802ec98 + 802ebb8: e0b0 b.n 802ed1c #endif } else if(hqspi->State == HAL_QSPI_STATE_BUSY) - 802eb36: 687b ldr r3, [r7, #4] - 802eb38: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802eb3c: b2db uxtb r3, r3 - 802eb3e: 2b02 cmp r3, #2 - 802eb40: d107 bne.n 802eb52 + 802ebba: 687b ldr r3, [r7, #4] + 802ebbc: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802ebc0: b2db uxtb r3, r3 + 802ebc2: 2b02 cmp r3, #2 + 802ebc4: d107 bne.n 802ebd6 { /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802eb42: 687b ldr r3, [r7, #4] - 802eb44: 2201 movs r2, #1 - 802eb46: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ebc6: 687b ldr r3, [r7, #4] + 802ebc8: 2201 movs r2, #1 + 802ebca: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Command Complete callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->CmdCpltCallback(hqspi); #else HAL_QSPI_CmdCpltCallback(hqspi); - 802eb4a: 6878 ldr r0, [r7, #4] - 802eb4c: f000 f8c2 bl 802ecd4 + 802ebce: 6878 ldr r0, [r7, #4] + 802ebd0: f000 f8c2 bl 802ed58 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802eb50: e0a2 b.n 802ec98 + 802ebd4: e0a2 b.n 802ed1c #endif } else if(hqspi->State == HAL_QSPI_STATE_ABORT) - 802eb52: 687b ldr r3, [r7, #4] - 802eb54: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802eb58: b2db uxtb r3, r3 - 802eb5a: 2b08 cmp r3, #8 - 802eb5c: f040 809c bne.w 802ec98 + 802ebd6: 687b ldr r3, [r7, #4] + 802ebd8: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802ebdc: b2db uxtb r3, r3 + 802ebde: 2b08 cmp r3, #8 + 802ebe0: f040 809c bne.w 802ed1c { /* Reset functional mode configuration to indirect write mode by default */ CLEAR_BIT(hqspi->Instance->CCR, QUADSPI_CCR_FMODE); - 802eb60: 687b ldr r3, [r7, #4] - 802eb62: 681b ldr r3, [r3, #0] - 802eb64: 695a ldr r2, [r3, #20] - 802eb66: 687b ldr r3, [r7, #4] - 802eb68: 681b ldr r3, [r3, #0] - 802eb6a: f022 6240 bic.w r2, r2, #201326592 ; 0xc000000 - 802eb6e: 615a str r2, [r3, #20] + 802ebe4: 687b ldr r3, [r7, #4] + 802ebe6: 681b ldr r3, [r3, #0] + 802ebe8: 695a ldr r2, [r3, #20] + 802ebea: 687b ldr r3, [r7, #4] + 802ebec: 681b ldr r3, [r3, #0] + 802ebee: f022 6240 bic.w r2, r2, #201326592 ; 0xc000000 + 802ebf2: 615a str r2, [r3, #20] /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802eb70: 687b ldr r3, [r7, #4] - 802eb72: 2201 movs r2, #1 - 802eb74: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ebf4: 687b ldr r3, [r7, #4] + 802ebf6: 2201 movs r2, #1 + 802ebf8: f883 2041 strb.w r2, [r3, #65] ; 0x41 if (hqspi->ErrorCode == HAL_QSPI_ERROR_NONE) - 802eb78: 687b ldr r3, [r7, #4] - 802eb7a: 6c5b ldr r3, [r3, #68] ; 0x44 - 802eb7c: 2b00 cmp r3, #0 - 802eb7e: d103 bne.n 802eb88 + 802ebfc: 687b ldr r3, [r7, #4] + 802ebfe: 6c5b ldr r3, [r3, #68] ; 0x44 + 802ec00: 2b00 cmp r3, #0 + 802ec02: d103 bne.n 802ec0c /* Abort Complete callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->AbortCpltCallback(hqspi); #else HAL_QSPI_AbortCpltCallback(hqspi); - 802eb80: 6878 ldr r0, [r7, #4] - 802eb82: f000 f89d bl 802ecc0 + 802ec04: 6878 ldr r0, [r7, #4] + 802ec06: f000 f89d bl 802ed44 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802eb86: e087 b.n 802ec98 + 802ec0a: e087 b.n 802ed1c /* Error callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->ErrorCallback(hqspi); #else HAL_QSPI_ErrorCallback(hqspi); - 802eb88: 6878 ldr r0, [r7, #4] - 802eb8a: f000 f88f bl 802ecac + 802ec0c: 6878 ldr r0, [r7, #4] + 802ec0e: f000 f88f bl 802ed30 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802eb8e: e083 b.n 802ec98 + 802ec12: e083 b.n 802ed1c /* Nothing to do */ } } /* QSPI Status Match interrupt occurred ------------------------------------*/ else if(((flag & QSPI_FLAG_SM) != 0U) && ((itsource & QSPI_IT_SM) != 0U)) - 802eb90: 697b ldr r3, [r7, #20] - 802eb92: f003 0308 and.w r3, r3, #8 - 802eb96: 2b00 cmp r3, #0 - 802eb98: d01f beq.n 802ebda - 802eb9a: 693b ldr r3, [r7, #16] - 802eb9c: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 802eba0: 2b00 cmp r3, #0 - 802eba2: d01a beq.n 802ebda + 802ec14: 697b ldr r3, [r7, #20] + 802ec16: f003 0308 and.w r3, r3, #8 + 802ec1a: 2b00 cmp r3, #0 + 802ec1c: d01f beq.n 802ec5e + 802ec1e: 693b ldr r3, [r7, #16] + 802ec20: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 802ec24: 2b00 cmp r3, #0 + 802ec26: d01a beq.n 802ec5e { /* Clear interrupt */ WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_SM); - 802eba4: 687b ldr r3, [r7, #4] - 802eba6: 681b ldr r3, [r3, #0] - 802eba8: 2208 movs r2, #8 - 802ebaa: 60da str r2, [r3, #12] + 802ec28: 687b ldr r3, [r7, #4] + 802ec2a: 681b ldr r3, [r3, #0] + 802ec2c: 2208 movs r2, #8 + 802ec2e: 60da str r2, [r3, #12] /* Check if the automatic poll mode stop is activated */ if(READ_BIT(hqspi->Instance->CR, QUADSPI_CR_APMS) != 0U) - 802ebac: 687b ldr r3, [r7, #4] - 802ebae: 681b ldr r3, [r3, #0] - 802ebb0: 681b ldr r3, [r3, #0] - 802ebb2: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 802ebb6: 2b00 cmp r3, #0 - 802ebb8: d00b beq.n 802ebd2 + 802ec30: 687b ldr r3, [r7, #4] + 802ec32: 681b ldr r3, [r3, #0] + 802ec34: 681b ldr r3, [r3, #0] + 802ec36: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 802ec3a: 2b00 cmp r3, #0 + 802ec3c: d00b beq.n 802ec56 { /* Disable the QSPI Transfer Error and Status Match Interrupts */ __HAL_QSPI_DISABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE)); - 802ebba: 687b ldr r3, [r7, #4] - 802ebbc: 681b ldr r3, [r3, #0] - 802ebbe: 681a ldr r2, [r3, #0] - 802ebc0: 687b ldr r3, [r7, #4] - 802ebc2: 681b ldr r3, [r3, #0] - 802ebc4: f422 2210 bic.w r2, r2, #589824 ; 0x90000 - 802ebc8: 601a str r2, [r3, #0] + 802ec3e: 687b ldr r3, [r7, #4] + 802ec40: 681b ldr r3, [r3, #0] + 802ec42: 681a ldr r2, [r3, #0] + 802ec44: 687b ldr r3, [r7, #4] + 802ec46: 681b ldr r3, [r3, #0] + 802ec48: f422 2210 bic.w r2, r2, #589824 ; 0x90000 + 802ec4c: 601a str r2, [r3, #0] /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802ebca: 687b ldr r3, [r7, #4] - 802ebcc: 2201 movs r2, #1 - 802ebce: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ec4e: 687b ldr r3, [r7, #4] + 802ec50: 2201 movs r2, #1 + 802ec52: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Status match callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->StatusMatchCallback(hqspi); #else HAL_QSPI_StatusMatchCallback(hqspi); - 802ebd2: 6878 ldr r0, [r7, #4] - 802ebd4: f000 f8a6 bl 802ed24 - 802ebd8: e061 b.n 802ec9e + 802ec56: 6878 ldr r0, [r7, #4] + 802ec58: f000 f8a6 bl 802eda8 + 802ec5c: e061 b.n 802ed22 #endif } /* QSPI Transfer Error interrupt occurred ----------------------------------*/ else if(((flag & QSPI_FLAG_TE) != 0U) && ((itsource & QSPI_IT_TE) != 0U)) - 802ebda: 697b ldr r3, [r7, #20] - 802ebdc: f003 0301 and.w r3, r3, #1 - 802ebe0: 2b00 cmp r3, #0 - 802ebe2: d047 beq.n 802ec74 - 802ebe4: 693b ldr r3, [r7, #16] - 802ebe6: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 802ebea: 2b00 cmp r3, #0 - 802ebec: d042 beq.n 802ec74 + 802ec5e: 697b ldr r3, [r7, #20] + 802ec60: f003 0301 and.w r3, r3, #1 + 802ec64: 2b00 cmp r3, #0 + 802ec66: d047 beq.n 802ecf8 + 802ec68: 693b ldr r3, [r7, #16] + 802ec6a: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 802ec6e: 2b00 cmp r3, #0 + 802ec70: d042 beq.n 802ecf8 { /* Clear interrupt */ WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TE); - 802ebee: 687b ldr r3, [r7, #4] - 802ebf0: 681b ldr r3, [r3, #0] - 802ebf2: 2201 movs r2, #1 - 802ebf4: 60da str r2, [r3, #12] + 802ec72: 687b ldr r3, [r7, #4] + 802ec74: 681b ldr r3, [r3, #0] + 802ec76: 2201 movs r2, #1 + 802ec78: 60da str r2, [r3, #12] /* Disable all the QSPI Interrupts */ __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); - 802ebf6: 687b ldr r3, [r7, #4] - 802ebf8: 681b ldr r3, [r3, #0] - 802ebfa: 681a ldr r2, [r3, #0] - 802ebfc: 687b ldr r3, [r7, #4] - 802ebfe: 681b ldr r3, [r3, #0] - 802ec00: f422 2270 bic.w r2, r2, #983040 ; 0xf0000 - 802ec04: 601a str r2, [r3, #0] + 802ec7a: 687b ldr r3, [r7, #4] + 802ec7c: 681b ldr r3, [r3, #0] + 802ec7e: 681a ldr r2, [r3, #0] + 802ec80: 687b ldr r3, [r7, #4] + 802ec82: 681b ldr r3, [r3, #0] + 802ec84: f422 2270 bic.w r2, r2, #983040 ; 0xf0000 + 802ec88: 601a str r2, [r3, #0] /* Set error code */ hqspi->ErrorCode |= HAL_QSPI_ERROR_TRANSFER; - 802ec06: 687b ldr r3, [r7, #4] - 802ec08: 6c5b ldr r3, [r3, #68] ; 0x44 - 802ec0a: f043 0202 orr.w r2, r3, #2 - 802ec0e: 687b ldr r3, [r7, #4] - 802ec10: 645a str r2, [r3, #68] ; 0x44 + 802ec8a: 687b ldr r3, [r7, #4] + 802ec8c: 6c5b ldr r3, [r3, #68] ; 0x44 + 802ec8e: f043 0202 orr.w r2, r3, #2 + 802ec92: 687b ldr r3, [r7, #4] + 802ec94: 645a str r2, [r3, #68] ; 0x44 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ec12: 687b ldr r3, [r7, #4] - 802ec14: 681b ldr r3, [r3, #0] - 802ec16: 681b ldr r3, [r3, #0] - 802ec18: f003 0304 and.w r3, r3, #4 - 802ec1c: 2b00 cmp r3, #0 - 802ec1e: d021 beq.n 802ec64 + 802ec96: 687b ldr r3, [r7, #4] + 802ec98: 681b ldr r3, [r3, #0] + 802ec9a: 681b ldr r3, [r3, #0] + 802ec9c: f003 0304 and.w r3, r3, #4 + 802eca0: 2b00 cmp r3, #0 + 802eca2: d021 beq.n 802ece8 { /* Disable using MDMA by clearing DMAEN, note that DMAEN bit is "reserved" but no impact on H7 HW and it minimize the cost in the footprint */ CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); - 802ec20: 687b ldr r3, [r7, #4] - 802ec22: 681b ldr r3, [r3, #0] - 802ec24: 681a ldr r2, [r3, #0] - 802ec26: 687b ldr r3, [r7, #4] - 802ec28: 681b ldr r3, [r3, #0] - 802ec2a: f022 0204 bic.w r2, r2, #4 - 802ec2e: 601a str r2, [r3, #0] + 802eca4: 687b ldr r3, [r7, #4] + 802eca6: 681b ldr r3, [r3, #0] + 802eca8: 681a ldr r2, [r3, #0] + 802ecaa: 687b ldr r3, [r7, #4] + 802ecac: 681b ldr r3, [r3, #0] + 802ecae: f022 0204 bic.w r2, r2, #4 + 802ecb2: 601a str r2, [r3, #0] /* Disable the MDMA channel */ hqspi->hmdma->XferAbortCallback = QSPI_DMAAbortCplt; - 802ec30: 687b ldr r3, [r7, #4] - 802ec32: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ec34: 4a1c ldr r2, [pc, #112] ; (802eca8 ) - 802ec36: 659a str r2, [r3, #88] ; 0x58 + 802ecb4: 687b ldr r3, [r7, #4] + 802ecb6: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ecb8: 4a1c ldr r2, [pc, #112] ; (802ed2c ) + 802ecba: 659a str r2, [r3, #88] ; 0x58 if (HAL_MDMA_Abort_IT(hqspi->hmdma) != HAL_OK) - 802ec38: 687b ldr r3, [r7, #4] - 802ec3a: 6bdb ldr r3, [r3, #60] ; 0x3c - 802ec3c: 4618 mov r0, r3 - 802ec3e: f7ff fda5 bl 802e78c - 802ec42: 4603 mov r3, r0 - 802ec44: 2b00 cmp r3, #0 - 802ec46: d029 beq.n 802ec9c + 802ecbc: 687b ldr r3, [r7, #4] + 802ecbe: 6bdb ldr r3, [r3, #60] ; 0x3c + 802ecc0: 4618 mov r0, r3 + 802ecc2: f7ff fda5 bl 802e810 + 802ecc6: 4603 mov r3, r0 + 802ecc8: 2b00 cmp r3, #0 + 802ecca: d029 beq.n 802ed20 { /* Set error code to DMA */ hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; - 802ec48: 687b ldr r3, [r7, #4] - 802ec4a: 6c5b ldr r3, [r3, #68] ; 0x44 - 802ec4c: f043 0204 orr.w r2, r3, #4 - 802ec50: 687b ldr r3, [r7, #4] - 802ec52: 645a str r2, [r3, #68] ; 0x44 + 802eccc: 687b ldr r3, [r7, #4] + 802ecce: 6c5b ldr r3, [r3, #68] ; 0x44 + 802ecd0: f043 0204 orr.w r2, r3, #4 + 802ecd4: 687b ldr r3, [r7, #4] + 802ecd6: 645a str r2, [r3, #68] ; 0x44 /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802ec54: 687b ldr r3, [r7, #4] - 802ec56: 2201 movs r2, #1 - 802ec58: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ecd8: 687b ldr r3, [r7, #4] + 802ecda: 2201 movs r2, #1 + 802ecdc: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Error callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->ErrorCallback(hqspi); #else HAL_QSPI_ErrorCallback(hqspi); - 802ec5c: 6878 ldr r0, [r7, #4] - 802ec5e: f000 f825 bl 802ecac + 802ece0: 6878 ldr r0, [r7, #4] + 802ece2: f000 f825 bl 802ed30 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ec62: e01b b.n 802ec9c + 802ece6: e01b b.n 802ed20 } } else { /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - 802ec64: 687b ldr r3, [r7, #4] - 802ec66: 2201 movs r2, #1 - 802ec68: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ece8: 687b ldr r3, [r7, #4] + 802ecea: 2201 movs r2, #1 + 802ecec: f883 2041 strb.w r2, [r3, #65] ; 0x41 /* Error callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->ErrorCallback(hqspi); #else HAL_QSPI_ErrorCallback(hqspi); - 802ec6c: 6878 ldr r0, [r7, #4] - 802ec6e: f000 f81d bl 802ecac + 802ecf0: 6878 ldr r0, [r7, #4] + 802ecf2: f000 f81d bl 802ed30 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ec72: e013 b.n 802ec9c + 802ecf6: e013 b.n 802ed20 #endif } } /* QSPI Timeout interrupt occurred -----------------------------------------*/ else if(((flag & QSPI_FLAG_TO) != 0U) && ((itsource & QSPI_IT_TO) != 0U)) - 802ec74: 697b ldr r3, [r7, #20] - 802ec76: f003 0310 and.w r3, r3, #16 - 802ec7a: 2b00 cmp r3, #0 - 802ec7c: d00f beq.n 802ec9e - 802ec7e: 693b ldr r3, [r7, #16] - 802ec80: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 802ec84: 2b00 cmp r3, #0 - 802ec86: d00a beq.n 802ec9e + 802ecf8: 697b ldr r3, [r7, #20] + 802ecfa: f003 0310 and.w r3, r3, #16 + 802ecfe: 2b00 cmp r3, #0 + 802ed00: d00f beq.n 802ed22 + 802ed02: 693b ldr r3, [r7, #16] + 802ed04: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 802ed08: 2b00 cmp r3, #0 + 802ed0a: d00a beq.n 802ed22 { /* Clear interrupt */ WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TO); - 802ec88: 687b ldr r3, [r7, #4] - 802ec8a: 681b ldr r3, [r3, #0] - 802ec8c: 2210 movs r2, #16 - 802ec8e: 60da str r2, [r3, #12] + 802ed0c: 687b ldr r3, [r7, #4] + 802ed0e: 681b ldr r3, [r3, #0] + 802ed10: 2210 movs r2, #16 + 802ed12: 60da str r2, [r3, #12] /* Timeout callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->TimeOutCallback(hqspi); #else HAL_QSPI_TimeOutCallback(hqspi); - 802ec90: 6878 ldr r0, [r7, #4] - 802ec92: f000 f851 bl 802ed38 + 802ed14: 6878 ldr r0, [r7, #4] + 802ed16: f000 f851 bl 802edbc else { /* Nothing to do */ } } - 802ec96: e002 b.n 802ec9e + 802ed1a: e002 b.n 802ed22 if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) - 802ec98: bf00 nop - 802ec9a: e000 b.n 802ec9e + 802ed1c: bf00 nop + 802ed1e: e000 b.n 802ed22 if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN) != 0U) - 802ec9c: bf00 nop + 802ed20: bf00 nop } - 802ec9e: bf00 nop - 802eca0: 3718 adds r7, #24 - 802eca2: 46bd mov sp, r7 - 802eca4: bd80 pop {r7, pc} - 802eca6: bf00 nop - 802eca8: 0802ed69 .word 0x0802ed69 + 802ed22: bf00 nop + 802ed24: 3718 adds r7, #24 + 802ed26: 46bd mov sp, r7 + 802ed28: bd80 pop {r7, pc} + 802ed2a: bf00 nop + 802ed2c: 0802eded .word 0x0802eded -0802ecac : +0802ed30 : * @brief Transfer Error callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_ErrorCallback(QSPI_HandleTypeDef *hqspi) { - 802ecac: b480 push {r7} - 802ecae: b083 sub sp, #12 - 802ecb0: af00 add r7, sp, #0 - 802ecb2: 6078 str r0, [r7, #4] + 802ed30: b480 push {r7} + 802ed32: b083 sub sp, #12 + 802ed34: af00 add r7, sp, #0 + 802ed36: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE : This function should not be modified, when the callback is needed, the HAL_QSPI_ErrorCallback could be implemented in the user file */ } - 802ecb4: bf00 nop - 802ecb6: 370c adds r7, #12 - 802ecb8: 46bd mov sp, r7 - 802ecba: f85d 7b04 ldr.w r7, [sp], #4 - 802ecbe: 4770 bx lr + 802ed38: bf00 nop + 802ed3a: 370c adds r7, #12 + 802ed3c: 46bd mov sp, r7 + 802ed3e: f85d 7b04 ldr.w r7, [sp], #4 + 802ed42: 4770 bx lr -0802ecc0 : +0802ed44 : * @brief Abort completed callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_AbortCpltCallback(QSPI_HandleTypeDef *hqspi) { - 802ecc0: b480 push {r7} - 802ecc2: b083 sub sp, #12 - 802ecc4: af00 add r7, sp, #0 - 802ecc6: 6078 str r0, [r7, #4] + 802ed44: b480 push {r7} + 802ed46: b083 sub sp, #12 + 802ed48: af00 add r7, sp, #0 + 802ed4a: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE: This function should not be modified, when the callback is needed, the HAL_QSPI_AbortCpltCallback could be implemented in the user file */ } - 802ecc8: bf00 nop - 802ecca: 370c adds r7, #12 - 802eccc: 46bd mov sp, r7 - 802ecce: f85d 7b04 ldr.w r7, [sp], #4 - 802ecd2: 4770 bx lr + 802ed4c: bf00 nop + 802ed4e: 370c adds r7, #12 + 802ed50: 46bd mov sp, r7 + 802ed52: f85d 7b04 ldr.w r7, [sp], #4 + 802ed56: 4770 bx lr -0802ecd4 : +0802ed58 : * @brief Command completed callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_CmdCpltCallback(QSPI_HandleTypeDef *hqspi) { - 802ecd4: b480 push {r7} - 802ecd6: b083 sub sp, #12 - 802ecd8: af00 add r7, sp, #0 - 802ecda: 6078 str r0, [r7, #4] + 802ed58: b480 push {r7} + 802ed5a: b083 sub sp, #12 + 802ed5c: af00 add r7, sp, #0 + 802ed5e: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE: This function should not be modified, when the callback is needed, the HAL_QSPI_CmdCpltCallback could be implemented in the user file */ } - 802ecdc: bf00 nop - 802ecde: 370c adds r7, #12 - 802ece0: 46bd mov sp, r7 - 802ece2: f85d 7b04 ldr.w r7, [sp], #4 - 802ece6: 4770 bx lr + 802ed60: bf00 nop + 802ed62: 370c adds r7, #12 + 802ed64: 46bd mov sp, r7 + 802ed66: f85d 7b04 ldr.w r7, [sp], #4 + 802ed6a: 4770 bx lr -0802ece8 : +0802ed6c : * @brief Rx Transfer completed callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_RxCpltCallback(QSPI_HandleTypeDef *hqspi) { - 802ece8: b480 push {r7} - 802ecea: b083 sub sp, #12 - 802ecec: af00 add r7, sp, #0 - 802ecee: 6078 str r0, [r7, #4] + 802ed6c: b480 push {r7} + 802ed6e: b083 sub sp, #12 + 802ed70: af00 add r7, sp, #0 + 802ed72: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE: This function should not be modified, when the callback is needed, the HAL_QSPI_RxCpltCallback could be implemented in the user file */ } - 802ecf0: bf00 nop - 802ecf2: 370c adds r7, #12 - 802ecf4: 46bd mov sp, r7 - 802ecf6: f85d 7b04 ldr.w r7, [sp], #4 - 802ecfa: 4770 bx lr + 802ed74: bf00 nop + 802ed76: 370c adds r7, #12 + 802ed78: 46bd mov sp, r7 + 802ed7a: f85d 7b04 ldr.w r7, [sp], #4 + 802ed7e: 4770 bx lr -0802ecfc : +0802ed80 : * @brief Tx Transfer completed callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_TxCpltCallback(QSPI_HandleTypeDef *hqspi) { - 802ecfc: b480 push {r7} - 802ecfe: b083 sub sp, #12 - 802ed00: af00 add r7, sp, #0 - 802ed02: 6078 str r0, [r7, #4] + 802ed80: b480 push {r7} + 802ed82: b083 sub sp, #12 + 802ed84: af00 add r7, sp, #0 + 802ed86: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE: This function should not be modified, when the callback is needed, the HAL_QSPI_TxCpltCallback could be implemented in the user file */ } - 802ed04: bf00 nop - 802ed06: 370c adds r7, #12 - 802ed08: 46bd mov sp, r7 - 802ed0a: f85d 7b04 ldr.w r7, [sp], #4 - 802ed0e: 4770 bx lr + 802ed88: bf00 nop + 802ed8a: 370c adds r7, #12 + 802ed8c: 46bd mov sp, r7 + 802ed8e: f85d 7b04 ldr.w r7, [sp], #4 + 802ed92: 4770 bx lr -0802ed10 : +0802ed94 : * @brief FIFO Threshold callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi) { - 802ed10: b480 push {r7} - 802ed12: b083 sub sp, #12 - 802ed14: af00 add r7, sp, #0 - 802ed16: 6078 str r0, [r7, #4] + 802ed94: b480 push {r7} + 802ed96: b083 sub sp, #12 + 802ed98: af00 add r7, sp, #0 + 802ed9a: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE : This function should not be modified, when the callback is needed, the HAL_QSPI_FIFOThresholdCallback could be implemented in the user file */ } - 802ed18: bf00 nop - 802ed1a: 370c adds r7, #12 - 802ed1c: 46bd mov sp, r7 - 802ed1e: f85d 7b04 ldr.w r7, [sp], #4 - 802ed22: 4770 bx lr + 802ed9c: bf00 nop + 802ed9e: 370c adds r7, #12 + 802eda0: 46bd mov sp, r7 + 802eda2: f85d 7b04 ldr.w r7, [sp], #4 + 802eda6: 4770 bx lr -0802ed24 : +0802eda8 : * @brief Status Match callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi) { - 802ed24: b480 push {r7} - 802ed26: b083 sub sp, #12 - 802ed28: af00 add r7, sp, #0 - 802ed2a: 6078 str r0, [r7, #4] + 802eda8: b480 push {r7} + 802edaa: b083 sub sp, #12 + 802edac: af00 add r7, sp, #0 + 802edae: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE : This function should not be modified, when the callback is needed, the HAL_QSPI_StatusMatchCallback could be implemented in the user file */ } - 802ed2c: bf00 nop - 802ed2e: 370c adds r7, #12 - 802ed30: 46bd mov sp, r7 - 802ed32: f85d 7b04 ldr.w r7, [sp], #4 - 802ed36: 4770 bx lr + 802edb0: bf00 nop + 802edb2: 370c adds r7, #12 + 802edb4: 46bd mov sp, r7 + 802edb6: f85d 7b04 ldr.w r7, [sp], #4 + 802edba: 4770 bx lr -0802ed38 : +0802edbc : * @brief Timeout callback. * @param hqspi QSPI handle * @retval None */ __weak void HAL_QSPI_TimeOutCallback(QSPI_HandleTypeDef *hqspi) { - 802ed38: b480 push {r7} - 802ed3a: b083 sub sp, #12 - 802ed3c: af00 add r7, sp, #0 - 802ed3e: 6078 str r0, [r7, #4] + 802edbc: b480 push {r7} + 802edbe: b083 sub sp, #12 + 802edc0: af00 add r7, sp, #0 + 802edc2: 6078 str r0, [r7, #4] UNUSED(hqspi); /* NOTE : This function should not be modified, when the callback is needed, the HAL_QSPI_TimeOutCallback could be implemented in the user file */ } - 802ed40: bf00 nop - 802ed42: 370c adds r7, #12 - 802ed44: 46bd mov sp, r7 - 802ed46: f85d 7b04 ldr.w r7, [sp], #4 - 802ed4a: 4770 bx lr + 802edc4: bf00 nop + 802edc6: 370c adds r7, #12 + 802edc8: 46bd mov sp, r7 + 802edca: f85d 7b04 ldr.w r7, [sp], #4 + 802edce: 4770 bx lr -0802ed4c : +0802edd0 : * @param hqspi QSPI handle. * @param Timeout Timeout for the QSPI memory access. * @retval None */ void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout) { - 802ed4c: b480 push {r7} - 802ed4e: b083 sub sp, #12 - 802ed50: af00 add r7, sp, #0 - 802ed52: 6078 str r0, [r7, #4] - 802ed54: 6039 str r1, [r7, #0] + 802edd0: b480 push {r7} + 802edd2: b083 sub sp, #12 + 802edd4: af00 add r7, sp, #0 + 802edd6: 6078 str r0, [r7, #4] + 802edd8: 6039 str r1, [r7, #0] hqspi->Timeout = Timeout; - 802ed56: 687b ldr r3, [r7, #4] - 802ed58: 683a ldr r2, [r7, #0] - 802ed5a: 649a str r2, [r3, #72] ; 0x48 + 802edda: 687b ldr r3, [r7, #4] + 802eddc: 683a ldr r2, [r7, #0] + 802edde: 649a str r2, [r3, #72] ; 0x48 } - 802ed5c: bf00 nop - 802ed5e: 370c adds r7, #12 - 802ed60: 46bd mov sp, r7 - 802ed62: f85d 7b04 ldr.w r7, [sp], #4 - 802ed66: 4770 bx lr + 802ede0: bf00 nop + 802ede2: 370c adds r7, #12 + 802ede4: 46bd mov sp, r7 + 802ede6: f85d 7b04 ldr.w r7, [sp], #4 + 802edea: 4770 bx lr -0802ed68 : +0802edec : * @brief MDMA QSPI abort complete callback. * @param hmdma MDMA handle * @retval None */ static void QSPI_DMAAbortCplt(MDMA_HandleTypeDef *hmdma) { - 802ed68: b580 push {r7, lr} - 802ed6a: b084 sub sp, #16 - 802ed6c: af00 add r7, sp, #0 - 802ed6e: 6078 str r0, [r7, #4] + 802edec: b580 push {r7, lr} + 802edee: b084 sub sp, #16 + 802edf0: af00 add r7, sp, #0 + 802edf2: 6078 str r0, [r7, #4] QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )(hmdma->Parent); - 802ed70: 687b ldr r3, [r7, #4] - 802ed72: 6c1b ldr r3, [r3, #64] ; 0x40 - 802ed74: 60fb str r3, [r7, #12] + 802edf4: 687b ldr r3, [r7, #4] + 802edf6: 6c1b ldr r3, [r3, #64] ; 0x40 + 802edf8: 60fb str r3, [r7, #12] hqspi->RxXferCount = 0U; - 802ed76: 68fb ldr r3, [r7, #12] - 802ed78: 2200 movs r2, #0 - 802ed7a: 639a str r2, [r3, #56] ; 0x38 + 802edfa: 68fb ldr r3, [r7, #12] + 802edfc: 2200 movs r2, #0 + 802edfe: 639a str r2, [r3, #56] ; 0x38 hqspi->TxXferCount = 0U; - 802ed7c: 68fb ldr r3, [r7, #12] - 802ed7e: 2200 movs r2, #0 - 802ed80: 62da str r2, [r3, #44] ; 0x2c + 802ee00: 68fb ldr r3, [r7, #12] + 802ee02: 2200 movs r2, #0 + 802ee04: 62da str r2, [r3, #44] ; 0x2c if(hqspi->State == HAL_QSPI_STATE_ABORT) - 802ed82: 68fb ldr r3, [r7, #12] - 802ed84: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 - 802ed88: b2db uxtb r3, r3 - 802ed8a: 2b08 cmp r3, #8 - 802ed8c: d114 bne.n 802edb8 + 802ee06: 68fb ldr r3, [r7, #12] + 802ee08: f893 3041 ldrb.w r3, [r3, #65] ; 0x41 + 802ee0c: b2db uxtb r3, r3 + 802ee0e: 2b08 cmp r3, #8 + 802ee10: d114 bne.n 802ee3c { /* MDMA Abort called by QSPI abort */ /* Clear interrupt */ __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); - 802ed8e: 68fb ldr r3, [r7, #12] - 802ed90: 681b ldr r3, [r3, #0] - 802ed92: 2202 movs r2, #2 - 802ed94: 60da str r2, [r3, #12] + 802ee12: 68fb ldr r3, [r7, #12] + 802ee14: 681b ldr r3, [r3, #0] + 802ee16: 2202 movs r2, #2 + 802ee18: 60da str r2, [r3, #12] /* Enable the QSPI Transfer Complete Interrupt */ __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); - 802ed96: 68fb ldr r3, [r7, #12] - 802ed98: 681b ldr r3, [r3, #0] - 802ed9a: 681a ldr r2, [r3, #0] - 802ed9c: 68fb ldr r3, [r7, #12] - 802ed9e: 681b ldr r3, [r3, #0] - 802eda0: f442 3200 orr.w r2, r2, #131072 ; 0x20000 - 802eda4: 601a str r2, [r3, #0] + 802ee1a: 68fb ldr r3, [r7, #12] + 802ee1c: 681b ldr r3, [r3, #0] + 802ee1e: 681a ldr r2, [r3, #0] + 802ee20: 68fb ldr r3, [r7, #12] + 802ee22: 681b ldr r3, [r3, #0] + 802ee24: f442 3200 orr.w r2, r2, #131072 ; 0x20000 + 802ee28: 601a str r2, [r3, #0] /* Configure QSPI: CR register with Abort request */ SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT); - 802eda6: 68fb ldr r3, [r7, #12] - 802eda8: 681b ldr r3, [r3, #0] - 802edaa: 681a ldr r2, [r3, #0] - 802edac: 68fb ldr r3, [r7, #12] - 802edae: 681b ldr r3, [r3, #0] - 802edb0: f042 0202 orr.w r2, r2, #2 - 802edb4: 601a str r2, [r3, #0] + 802ee2a: 68fb ldr r3, [r7, #12] + 802ee2c: 681b ldr r3, [r3, #0] + 802ee2e: 681a ldr r2, [r3, #0] + 802ee30: 68fb ldr r3, [r7, #12] + 802ee32: 681b ldr r3, [r3, #0] + 802ee34: f042 0202 orr.w r2, r2, #2 + 802ee38: 601a str r2, [r3, #0] hqspi->ErrorCallback(hqspi); #else HAL_QSPI_ErrorCallback(hqspi); #endif } } - 802edb6: e006 b.n 802edc6 + 802ee3a: e006 b.n 802ee4a hqspi->State = HAL_QSPI_STATE_READY; - 802edb8: 68fb ldr r3, [r7, #12] - 802edba: 2201 movs r2, #1 - 802edbc: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ee3c: 68fb ldr r3, [r7, #12] + 802ee3e: 2201 movs r2, #1 + 802ee40: f883 2041 strb.w r2, [r3, #65] ; 0x41 HAL_QSPI_ErrorCallback(hqspi); - 802edc0: 68f8 ldr r0, [r7, #12] - 802edc2: f7ff ff73 bl 802ecac + 802ee44: 68f8 ldr r0, [r7, #12] + 802ee46: f7ff ff73 bl 802ed30 } - 802edc6: bf00 nop - 802edc8: 3710 adds r7, #16 - 802edca: 46bd mov sp, r7 - 802edcc: bd80 pop {r7, pc} + 802ee4a: bf00 nop + 802ee4c: 3710 adds r7, #16 + 802ee4e: 46bd mov sp, r7 + 802ee50: bd80 pop {r7, pc} -0802edce : +0802ee52 : * @param Timeout Duration of the timeout * @retval HAL status */ static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Tickstart, uint32_t Timeout) { - 802edce: b580 push {r7, lr} - 802edd0: b084 sub sp, #16 - 802edd2: af00 add r7, sp, #0 - 802edd4: 60f8 str r0, [r7, #12] - 802edd6: 60b9 str r1, [r7, #8] - 802edd8: 603b str r3, [r7, #0] - 802edda: 4613 mov r3, r2 - 802eddc: 71fb strb r3, [r7, #7] + 802ee52: b580 push {r7, lr} + 802ee54: b084 sub sp, #16 + 802ee56: af00 add r7, sp, #0 + 802ee58: 60f8 str r0, [r7, #12] + 802ee5a: 60b9 str r1, [r7, #8] + 802ee5c: 603b str r3, [r7, #0] + 802ee5e: 4613 mov r3, r2 + 802ee60: 71fb strb r3, [r7, #7] /* Wait until flag is in expected state */ while((__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State) - 802edde: e01a b.n 802ee16 + 802ee62: e01a b.n 802ee9a { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 802ede0: 69bb ldr r3, [r7, #24] - 802ede2: f1b3 3fff cmp.w r3, #4294967295 - 802ede6: d016 beq.n 802ee16 + 802ee64: 69bb ldr r3, [r7, #24] + 802ee66: f1b3 3fff cmp.w r3, #4294967295 + 802ee6a: d016 beq.n 802ee9a { if(((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 802ede8: f7f7 f8ec bl 8025fc4 - 802edec: 4602 mov r2, r0 - 802edee: 683b ldr r3, [r7, #0] - 802edf0: 1ad3 subs r3, r2, r3 - 802edf2: 69ba ldr r2, [r7, #24] - 802edf4: 429a cmp r2, r3 - 802edf6: d302 bcc.n 802edfe - 802edf8: 69bb ldr r3, [r7, #24] - 802edfa: 2b00 cmp r3, #0 - 802edfc: d10b bne.n 802ee16 + 802ee6c: f7f7 f8ec bl 8026048 + 802ee70: 4602 mov r2, r0 + 802ee72: 683b ldr r3, [r7, #0] + 802ee74: 1ad3 subs r3, r2, r3 + 802ee76: 69ba ldr r2, [r7, #24] + 802ee78: 429a cmp r2, r3 + 802ee7a: d302 bcc.n 802ee82 + 802ee7c: 69bb ldr r3, [r7, #24] + 802ee7e: 2b00 cmp r3, #0 + 802ee80: d10b bne.n 802ee9a { hqspi->State = HAL_QSPI_STATE_ERROR; - 802edfe: 68fb ldr r3, [r7, #12] - 802ee00: 2204 movs r2, #4 - 802ee02: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 802ee82: 68fb ldr r3, [r7, #12] + 802ee84: 2204 movs r2, #4 + 802ee86: f883 2041 strb.w r2, [r3, #65] ; 0x41 hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT; - 802ee06: 68fb ldr r3, [r7, #12] - 802ee08: 6c5b ldr r3, [r3, #68] ; 0x44 - 802ee0a: f043 0201 orr.w r2, r3, #1 - 802ee0e: 68fb ldr r3, [r7, #12] - 802ee10: 645a str r2, [r3, #68] ; 0x44 + 802ee8a: 68fb ldr r3, [r7, #12] + 802ee8c: 6c5b ldr r3, [r3, #68] ; 0x44 + 802ee8e: f043 0201 orr.w r2, r3, #1 + 802ee92: 68fb ldr r3, [r7, #12] + 802ee94: 645a str r2, [r3, #68] ; 0x44 return HAL_ERROR; - 802ee12: 2301 movs r3, #1 - 802ee14: e00e b.n 802ee34 + 802ee96: 2301 movs r3, #1 + 802ee98: e00e b.n 802eeb8 while((__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State) - 802ee16: 68fb ldr r3, [r7, #12] - 802ee18: 681b ldr r3, [r3, #0] - 802ee1a: 689a ldr r2, [r3, #8] - 802ee1c: 68bb ldr r3, [r7, #8] - 802ee1e: 4013 ands r3, r2 - 802ee20: 2b00 cmp r3, #0 - 802ee22: bf14 ite ne - 802ee24: 2301 movne r3, #1 - 802ee26: 2300 moveq r3, #0 - 802ee28: b2db uxtb r3, r3 - 802ee2a: 461a mov r2, r3 - 802ee2c: 79fb ldrb r3, [r7, #7] - 802ee2e: 429a cmp r2, r3 - 802ee30: d1d6 bne.n 802ede0 + 802ee9a: 68fb ldr r3, [r7, #12] + 802ee9c: 681b ldr r3, [r3, #0] + 802ee9e: 689a ldr r2, [r3, #8] + 802eea0: 68bb ldr r3, [r7, #8] + 802eea2: 4013 ands r3, r2 + 802eea4: 2b00 cmp r3, #0 + 802eea6: bf14 ite ne + 802eea8: 2301 movne r3, #1 + 802eeaa: 2300 moveq r3, #0 + 802eeac: b2db uxtb r3, r3 + 802eeae: 461a mov r2, r3 + 802eeb0: 79fb ldrb r3, [r7, #7] + 802eeb2: 429a cmp r2, r3 + 802eeb4: d1d6 bne.n 802ee64 } } } return HAL_OK; - 802ee32: 2300 movs r3, #0 + 802eeb6: 2300 movs r3, #0 } - 802ee34: 4618 mov r0, r3 - 802ee36: 3710 adds r7, #16 - 802ee38: 46bd mov sp, r7 - 802ee3a: bd80 pop {r7, pc} + 802eeb8: 4618 mov r0, r3 + 802eeba: 3710 adds r7, #16 + 802eebc: 46bd mov sp, r7 + 802eebe: bd80 pop {r7, pc} -0802ee3c : +0802eec0 : * supported by this function. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 802ee3c: b580 push {r7, lr} - 802ee3e: b08c sub sp, #48 ; 0x30 - 802ee40: af00 add r7, sp, #0 - 802ee42: 6078 str r0, [r7, #4] + 802eec0: b580 push {r7, lr} + 802eec2: b08c sub sp, #48 ; 0x30 + 802eec4: af00 add r7, sp, #0 + 802eec6: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t temp1_pllckcfg, temp2_pllckcfg; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 802ee44: 687b ldr r3, [r7, #4] - 802ee46: 2b00 cmp r3, #0 - 802ee48: d102 bne.n 802ee50 + 802eec8: 687b ldr r3, [r7, #4] + 802eeca: 2b00 cmp r3, #0 + 802eecc: d102 bne.n 802eed4 { return HAL_ERROR; - 802ee4a: 2301 movs r3, #1 - 802ee4c: f000 bc1d b.w 802f68a + 802eece: 2301 movs r3, #1 + 802eed0: f000 bc1d b.w 802f70e } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 802ee50: 687b ldr r3, [r7, #4] - 802ee52: 681b ldr r3, [r3, #0] - 802ee54: f003 0301 and.w r3, r3, #1 - 802ee58: 2b00 cmp r3, #0 - 802ee5a: f000 8087 beq.w 802ef6c + 802eed4: 687b ldr r3, [r7, #4] + 802eed6: 681b ldr r3, [r3, #0] + 802eed8: f003 0301 and.w r3, r3, #1 + 802eedc: 2b00 cmp r3, #0 + 802eede: f000 8087 beq.w 802eff0 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 802ee5e: 4b99 ldr r3, [pc, #612] ; (802f0c4 ) - 802ee60: 691b ldr r3, [r3, #16] - 802ee62: f003 0338 and.w r3, r3, #56 ; 0x38 - 802ee66: 62fb str r3, [r7, #44] ; 0x2c + 802eee2: 4b99 ldr r3, [pc, #612] ; (802f148 ) + 802eee4: 691b ldr r3, [r3, #16] + 802eee6: f003 0338 and.w r3, r3, #56 ; 0x38 + 802eeea: 62fb str r3, [r7, #44] ; 0x2c const uint32_t temp_pllckselr = RCC->PLLCKSELR; - 802ee68: 4b96 ldr r3, [pc, #600] ; (802f0c4 ) - 802ee6a: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ee6c: 62bb str r3, [r7, #40] ; 0x28 + 802eeec: 4b96 ldr r3, [pc, #600] ; (802f148 ) + 802eeee: 6a9b ldr r3, [r3, #40] ; 0x28 + 802eef0: 62bb str r3, [r7, #40] ; 0x28 /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ if((temp_sysclksrc == RCC_CFGR_SWS_HSE) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSE))) - 802ee6e: 6afb ldr r3, [r7, #44] ; 0x2c - 802ee70: 2b10 cmp r3, #16 - 802ee72: d007 beq.n 802ee84 - 802ee74: 6afb ldr r3, [r7, #44] ; 0x2c - 802ee76: 2b18 cmp r3, #24 - 802ee78: d110 bne.n 802ee9c - 802ee7a: 6abb ldr r3, [r7, #40] ; 0x28 - 802ee7c: f003 0303 and.w r3, r3, #3 - 802ee80: 2b02 cmp r3, #2 - 802ee82: d10b bne.n 802ee9c + 802eef2: 6afb ldr r3, [r7, #44] ; 0x2c + 802eef4: 2b10 cmp r3, #16 + 802eef6: d007 beq.n 802ef08 + 802eef8: 6afb ldr r3, [r7, #44] ; 0x2c + 802eefa: 2b18 cmp r3, #24 + 802eefc: d110 bne.n 802ef20 + 802eefe: 6abb ldr r3, [r7, #40] ; 0x28 + 802ef00: f003 0303 and.w r3, r3, #3 + 802ef04: 2b02 cmp r3, #2 + 802ef06: d10b bne.n 802ef20 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 802ee84: 4b8f ldr r3, [pc, #572] ; (802f0c4 ) - 802ee86: 681b ldr r3, [r3, #0] - 802ee88: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802ee8c: 2b00 cmp r3, #0 - 802ee8e: d06c beq.n 802ef6a - 802ee90: 687b ldr r3, [r7, #4] - 802ee92: 685b ldr r3, [r3, #4] - 802ee94: 2b00 cmp r3, #0 - 802ee96: d168 bne.n 802ef6a + 802ef08: 4b8f ldr r3, [pc, #572] ; (802f148 ) + 802ef0a: 681b ldr r3, [r3, #0] + 802ef0c: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802ef10: 2b00 cmp r3, #0 + 802ef12: d06c beq.n 802efee + 802ef14: 687b ldr r3, [r7, #4] + 802ef16: 685b ldr r3, [r3, #4] + 802ef18: 2b00 cmp r3, #0 + 802ef1a: d168 bne.n 802efee { return HAL_ERROR; - 802ee98: 2301 movs r3, #1 - 802ee9a: e3f6 b.n 802f68a + 802ef1c: 2301 movs r3, #1 + 802ef1e: e3f6 b.n 802f70e } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 802ee9c: 687b ldr r3, [r7, #4] - 802ee9e: 685b ldr r3, [r3, #4] - 802eea0: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 802eea4: d106 bne.n 802eeb4 - 802eea6: 4b87 ldr r3, [pc, #540] ; (802f0c4 ) - 802eea8: 681b ldr r3, [r3, #0] - 802eeaa: 4a86 ldr r2, [pc, #536] ; (802f0c4 ) - 802eeac: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 802eeb0: 6013 str r3, [r2, #0] - 802eeb2: e02e b.n 802ef12 - 802eeb4: 687b ldr r3, [r7, #4] - 802eeb6: 685b ldr r3, [r3, #4] - 802eeb8: 2b00 cmp r3, #0 - 802eeba: d10c bne.n 802eed6 - 802eebc: 4b81 ldr r3, [pc, #516] ; (802f0c4 ) - 802eebe: 681b ldr r3, [r3, #0] - 802eec0: 4a80 ldr r2, [pc, #512] ; (802f0c4 ) - 802eec2: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 802eec6: 6013 str r3, [r2, #0] - 802eec8: 4b7e ldr r3, [pc, #504] ; (802f0c4 ) - 802eeca: 681b ldr r3, [r3, #0] - 802eecc: 4a7d ldr r2, [pc, #500] ; (802f0c4 ) - 802eece: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 802eed2: 6013 str r3, [r2, #0] - 802eed4: e01d b.n 802ef12 - 802eed6: 687b ldr r3, [r7, #4] - 802eed8: 685b ldr r3, [r3, #4] - 802eeda: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 802eede: d10c bne.n 802eefa - 802eee0: 4b78 ldr r3, [pc, #480] ; (802f0c4 ) - 802eee2: 681b ldr r3, [r3, #0] - 802eee4: 4a77 ldr r2, [pc, #476] ; (802f0c4 ) - 802eee6: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 802eeea: 6013 str r3, [r2, #0] - 802eeec: 4b75 ldr r3, [pc, #468] ; (802f0c4 ) - 802eeee: 681b ldr r3, [r3, #0] - 802eef0: 4a74 ldr r2, [pc, #464] ; (802f0c4 ) - 802eef2: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 802eef6: 6013 str r3, [r2, #0] - 802eef8: e00b b.n 802ef12 - 802eefa: 4b72 ldr r3, [pc, #456] ; (802f0c4 ) - 802eefc: 681b ldr r3, [r3, #0] - 802eefe: 4a71 ldr r2, [pc, #452] ; (802f0c4 ) - 802ef00: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 802ef04: 6013 str r3, [r2, #0] - 802ef06: 4b6f ldr r3, [pc, #444] ; (802f0c4 ) - 802ef08: 681b ldr r3, [r3, #0] - 802ef0a: 4a6e ldr r2, [pc, #440] ; (802f0c4 ) - 802ef0c: f423 2380 bic.w r3, r3, #262144 ; 0x40000 - 802ef10: 6013 str r3, [r2, #0] + 802ef20: 687b ldr r3, [r7, #4] + 802ef22: 685b ldr r3, [r3, #4] + 802ef24: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 802ef28: d106 bne.n 802ef38 + 802ef2a: 4b87 ldr r3, [pc, #540] ; (802f148 ) + 802ef2c: 681b ldr r3, [r3, #0] + 802ef2e: 4a86 ldr r2, [pc, #536] ; (802f148 ) + 802ef30: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 802ef34: 6013 str r3, [r2, #0] + 802ef36: e02e b.n 802ef96 + 802ef38: 687b ldr r3, [r7, #4] + 802ef3a: 685b ldr r3, [r3, #4] + 802ef3c: 2b00 cmp r3, #0 + 802ef3e: d10c bne.n 802ef5a + 802ef40: 4b81 ldr r3, [pc, #516] ; (802f148 ) + 802ef42: 681b ldr r3, [r3, #0] + 802ef44: 4a80 ldr r2, [pc, #512] ; (802f148 ) + 802ef46: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 802ef4a: 6013 str r3, [r2, #0] + 802ef4c: 4b7e ldr r3, [pc, #504] ; (802f148 ) + 802ef4e: 681b ldr r3, [r3, #0] + 802ef50: 4a7d ldr r2, [pc, #500] ; (802f148 ) + 802ef52: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 802ef56: 6013 str r3, [r2, #0] + 802ef58: e01d b.n 802ef96 + 802ef5a: 687b ldr r3, [r7, #4] + 802ef5c: 685b ldr r3, [r3, #4] + 802ef5e: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 802ef62: d10c bne.n 802ef7e + 802ef64: 4b78 ldr r3, [pc, #480] ; (802f148 ) + 802ef66: 681b ldr r3, [r3, #0] + 802ef68: 4a77 ldr r2, [pc, #476] ; (802f148 ) + 802ef6a: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 802ef6e: 6013 str r3, [r2, #0] + 802ef70: 4b75 ldr r3, [pc, #468] ; (802f148 ) + 802ef72: 681b ldr r3, [r3, #0] + 802ef74: 4a74 ldr r2, [pc, #464] ; (802f148 ) + 802ef76: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 802ef7a: 6013 str r3, [r2, #0] + 802ef7c: e00b b.n 802ef96 + 802ef7e: 4b72 ldr r3, [pc, #456] ; (802f148 ) + 802ef80: 681b ldr r3, [r3, #0] + 802ef82: 4a71 ldr r2, [pc, #452] ; (802f148 ) + 802ef84: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 802ef88: 6013 str r3, [r2, #0] + 802ef8a: 4b6f ldr r3, [pc, #444] ; (802f148 ) + 802ef8c: 681b ldr r3, [r3, #0] + 802ef8e: 4a6e ldr r2, [pc, #440] ; (802f148 ) + 802ef90: f423 2380 bic.w r3, r3, #262144 ; 0x40000 + 802ef94: 6013 str r3, [r2, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 802ef12: 687b ldr r3, [r7, #4] - 802ef14: 685b ldr r3, [r3, #4] - 802ef16: 2b00 cmp r3, #0 - 802ef18: d013 beq.n 802ef42 + 802ef96: 687b ldr r3, [r7, #4] + 802ef98: 685b ldr r3, [r3, #4] + 802ef9a: 2b00 cmp r3, #0 + 802ef9c: d013 beq.n 802efc6 { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802ef1a: f7f7 f853 bl 8025fc4 - 802ef1e: 6278 str r0, [r7, #36] ; 0x24 + 802ef9e: f7f7 f853 bl 8026048 + 802efa2: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 802ef20: e008 b.n 802ef34 + 802efa4: e008 b.n 802efb8 { if((uint32_t) (HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 802ef22: f7f7 f84f bl 8025fc4 - 802ef26: 4602 mov r2, r0 - 802ef28: 6a7b ldr r3, [r7, #36] ; 0x24 - 802ef2a: 1ad3 subs r3, r2, r3 - 802ef2c: 2b64 cmp r3, #100 ; 0x64 - 802ef2e: d901 bls.n 802ef34 + 802efa6: f7f7 f84f bl 8026048 + 802efaa: 4602 mov r2, r0 + 802efac: 6a7b ldr r3, [r7, #36] ; 0x24 + 802efae: 1ad3 subs r3, r2, r3 + 802efb0: 2b64 cmp r3, #100 ; 0x64 + 802efb2: d901 bls.n 802efb8 { return HAL_TIMEOUT; - 802ef30: 2303 movs r3, #3 - 802ef32: e3aa b.n 802f68a + 802efb4: 2303 movs r3, #3 + 802efb6: e3aa b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 802ef34: 4b63 ldr r3, [pc, #396] ; (802f0c4 ) - 802ef36: 681b ldr r3, [r3, #0] - 802ef38: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802ef3c: 2b00 cmp r3, #0 - 802ef3e: d0f0 beq.n 802ef22 - 802ef40: e014 b.n 802ef6c + 802efb8: 4b63 ldr r3, [pc, #396] ; (802f148 ) + 802efba: 681b ldr r3, [r3, #0] + 802efbc: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802efc0: 2b00 cmp r3, #0 + 802efc2: d0f0 beq.n 802efa6 + 802efc4: e014 b.n 802eff0 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802ef42: f7f7 f83f bl 8025fc4 - 802ef46: 6278 str r0, [r7, #36] ; 0x24 + 802efc6: f7f7 f83f bl 8026048 + 802efca: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 802ef48: e008 b.n 802ef5c + 802efcc: e008 b.n 802efe0 { if((uint32_t) (HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 802ef4a: f7f7 f83b bl 8025fc4 - 802ef4e: 4602 mov r2, r0 - 802ef50: 6a7b ldr r3, [r7, #36] ; 0x24 - 802ef52: 1ad3 subs r3, r2, r3 - 802ef54: 2b64 cmp r3, #100 ; 0x64 - 802ef56: d901 bls.n 802ef5c + 802efce: f7f7 f83b bl 8026048 + 802efd2: 4602 mov r2, r0 + 802efd4: 6a7b ldr r3, [r7, #36] ; 0x24 + 802efd6: 1ad3 subs r3, r2, r3 + 802efd8: 2b64 cmp r3, #100 ; 0x64 + 802efda: d901 bls.n 802efe0 { return HAL_TIMEOUT; - 802ef58: 2303 movs r3, #3 - 802ef5a: e396 b.n 802f68a + 802efdc: 2303 movs r3, #3 + 802efde: e396 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 802ef5c: 4b59 ldr r3, [pc, #356] ; (802f0c4 ) - 802ef5e: 681b ldr r3, [r3, #0] - 802ef60: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802ef64: 2b00 cmp r3, #0 - 802ef66: d1f0 bne.n 802ef4a - 802ef68: e000 b.n 802ef6c + 802efe0: 4b59 ldr r3, [pc, #356] ; (802f148 ) + 802efe2: 681b ldr r3, [r3, #0] + 802efe4: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802efe8: 2b00 cmp r3, #0 + 802efea: d1f0 bne.n 802efce + 802efec: e000 b.n 802eff0 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 802ef6a: bf00 nop + 802efee: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 802ef6c: 687b ldr r3, [r7, #4] - 802ef6e: 681b ldr r3, [r3, #0] - 802ef70: f003 0302 and.w r3, r3, #2 - 802ef74: 2b00 cmp r3, #0 - 802ef76: f000 80cb beq.w 802f110 + 802eff0: 687b ldr r3, [r7, #4] + 802eff2: 681b ldr r3, [r3, #0] + 802eff4: f003 0302 and.w r3, r3, #2 + 802eff8: 2b00 cmp r3, #0 + 802effa: f000 80cb beq.w 802f194 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_HSICALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* When the HSI is used as system clock it will not be disabled */ const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 802ef7a: 4b52 ldr r3, [pc, #328] ; (802f0c4 ) - 802ef7c: 691b ldr r3, [r3, #16] - 802ef7e: f003 0338 and.w r3, r3, #56 ; 0x38 - 802ef82: 623b str r3, [r7, #32] + 802effe: 4b52 ldr r3, [pc, #328] ; (802f148 ) + 802f000: 691b ldr r3, [r3, #16] + 802f002: f003 0338 and.w r3, r3, #56 ; 0x38 + 802f006: 623b str r3, [r7, #32] const uint32_t temp_pllckselr = RCC->PLLCKSELR; - 802ef84: 4b4f ldr r3, [pc, #316] ; (802f0c4 ) - 802ef86: 6a9b ldr r3, [r3, #40] ; 0x28 - 802ef88: 61fb str r3, [r7, #28] + 802f008: 4b4f ldr r3, [pc, #316] ; (802f148 ) + 802f00a: 6a9b ldr r3, [r3, #40] ; 0x28 + 802f00c: 61fb str r3, [r7, #28] if((temp_sysclksrc == RCC_CFGR_SWS_HSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSI))) - 802ef8a: 6a3b ldr r3, [r7, #32] - 802ef8c: 2b00 cmp r3, #0 - 802ef8e: d007 beq.n 802efa0 - 802ef90: 6a3b ldr r3, [r7, #32] - 802ef92: 2b18 cmp r3, #24 - 802ef94: d156 bne.n 802f044 - 802ef96: 69fb ldr r3, [r7, #28] - 802ef98: f003 0303 and.w r3, r3, #3 - 802ef9c: 2b00 cmp r3, #0 - 802ef9e: d151 bne.n 802f044 + 802f00e: 6a3b ldr r3, [r7, #32] + 802f010: 2b00 cmp r3, #0 + 802f012: d007 beq.n 802f024 + 802f014: 6a3b ldr r3, [r7, #32] + 802f016: 2b18 cmp r3, #24 + 802f018: d156 bne.n 802f0c8 + 802f01a: 69fb ldr r3, [r7, #28] + 802f01c: f003 0303 and.w r3, r3, #3 + 802f020: 2b00 cmp r3, #0 + 802f022: d151 bne.n 802f0c8 { /* When HSI is used as system clock it will not be disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 802efa0: 4b48 ldr r3, [pc, #288] ; (802f0c4 ) - 802efa2: 681b ldr r3, [r3, #0] - 802efa4: f003 0304 and.w r3, r3, #4 - 802efa8: 2b00 cmp r3, #0 - 802efaa: d005 beq.n 802efb8 - 802efac: 687b ldr r3, [r7, #4] - 802efae: 68db ldr r3, [r3, #12] - 802efb0: 2b00 cmp r3, #0 - 802efb2: d101 bne.n 802efb8 + 802f024: 4b48 ldr r3, [pc, #288] ; (802f148 ) + 802f026: 681b ldr r3, [r3, #0] + 802f028: f003 0304 and.w r3, r3, #4 + 802f02c: 2b00 cmp r3, #0 + 802f02e: d005 beq.n 802f03c + 802f030: 687b ldr r3, [r7, #4] + 802f032: 68db ldr r3, [r3, #12] + 802f034: 2b00 cmp r3, #0 + 802f036: d101 bne.n 802f03c { return HAL_ERROR; - 802efb4: 2301 movs r3, #1 - 802efb6: e368 b.n 802f68a + 802f038: 2301 movs r3, #1 + 802f03a: e368 b.n 802f70e } /* Otherwise, only HSI division and calibration are allowed */ else { /* Enable the Internal High Speed oscillator (HSI, HSIDIV2, HSIDIV4, or HSIDIV8) */ __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState); - 802efb8: 4b42 ldr r3, [pc, #264] ; (802f0c4 ) - 802efba: 681b ldr r3, [r3, #0] - 802efbc: f023 0219 bic.w r2, r3, #25 - 802efc0: 687b ldr r3, [r7, #4] - 802efc2: 68db ldr r3, [r3, #12] - 802efc4: 493f ldr r1, [pc, #252] ; (802f0c4 ) - 802efc6: 4313 orrs r3, r2 - 802efc8: 600b str r3, [r1, #0] + 802f03c: 4b42 ldr r3, [pc, #264] ; (802f148 ) + 802f03e: 681b ldr r3, [r3, #0] + 802f040: f023 0219 bic.w r2, r3, #25 + 802f044: 687b ldr r3, [r7, #4] + 802f046: 68db ldr r3, [r3, #12] + 802f048: 493f ldr r1, [pc, #252] ; (802f148 ) + 802f04a: 4313 orrs r3, r2 + 802f04c: 600b str r3, [r1, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802efca: f7f6 fffb bl 8025fc4 - 802efce: 6278 str r0, [r7, #36] ; 0x24 + 802f04e: f7f6 fffb bl 8026048 + 802f052: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802efd0: e008 b.n 802efe4 + 802f054: e008 b.n 802f068 { if((uint32_t) (HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 802efd2: f7f6 fff7 bl 8025fc4 - 802efd6: 4602 mov r2, r0 - 802efd8: 6a7b ldr r3, [r7, #36] ; 0x24 - 802efda: 1ad3 subs r3, r2, r3 - 802efdc: 2b02 cmp r3, #2 - 802efde: d901 bls.n 802efe4 + 802f056: f7f6 fff7 bl 8026048 + 802f05a: 4602 mov r2, r0 + 802f05c: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f05e: 1ad3 subs r3, r2, r3 + 802f060: 2b02 cmp r3, #2 + 802f062: d901 bls.n 802f068 { return HAL_TIMEOUT; - 802efe0: 2303 movs r3, #3 - 802efe2: e352 b.n 802f68a + 802f064: 2303 movs r3, #3 + 802f066: e352 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802efe4: 4b37 ldr r3, [pc, #220] ; (802f0c4 ) - 802efe6: 681b ldr r3, [r3, #0] - 802efe8: f003 0304 and.w r3, r3, #4 - 802efec: 2b00 cmp r3, #0 - 802efee: d0f0 beq.n 802efd2 + 802f068: 4b37 ldr r3, [pc, #220] ; (802f148 ) + 802f06a: 681b ldr r3, [r3, #0] + 802f06c: f003 0304 and.w r3, r3, #4 + 802f070: 2b00 cmp r3, #0 + 802f072: d0f0 beq.n 802f056 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 802eff0: f7f7 f818 bl 8026024 - 802eff4: 4603 mov r3, r0 - 802eff6: f241 0203 movw r2, #4099 ; 0x1003 - 802effa: 4293 cmp r3, r2 - 802effc: d817 bhi.n 802f02e - 802effe: 687b ldr r3, [r7, #4] - 802f000: 691b ldr r3, [r3, #16] - 802f002: 2b40 cmp r3, #64 ; 0x40 - 802f004: d108 bne.n 802f018 - 802f006: 4b2f ldr r3, [pc, #188] ; (802f0c4 ) - 802f008: 685b ldr r3, [r3, #4] - 802f00a: f423 337c bic.w r3, r3, #258048 ; 0x3f000 - 802f00e: 4a2d ldr r2, [pc, #180] ; (802f0c4 ) - 802f010: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802f014: 6053 str r3, [r2, #4] + 802f074: f7f7 f818 bl 80260a8 + 802f078: 4603 mov r3, r0 + 802f07a: f241 0203 movw r2, #4099 ; 0x1003 + 802f07e: 4293 cmp r3, r2 + 802f080: d817 bhi.n 802f0b2 + 802f082: 687b ldr r3, [r7, #4] + 802f084: 691b ldr r3, [r3, #16] + 802f086: 2b40 cmp r3, #64 ; 0x40 + 802f088: d108 bne.n 802f09c + 802f08a: 4b2f ldr r3, [pc, #188] ; (802f148 ) + 802f08c: 685b ldr r3, [r3, #4] + 802f08e: f423 337c bic.w r3, r3, #258048 ; 0x3f000 + 802f092: 4a2d ldr r2, [pc, #180] ; (802f148 ) + 802f094: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802f098: 6053 str r3, [r2, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 802f016: e07b b.n 802f110 + 802f09a: e07b b.n 802f194 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 802f018: 4b2a ldr r3, [pc, #168] ; (802f0c4 ) - 802f01a: 685b ldr r3, [r3, #4] - 802f01c: f423 327c bic.w r2, r3, #258048 ; 0x3f000 - 802f020: 687b ldr r3, [r7, #4] - 802f022: 691b ldr r3, [r3, #16] - 802f024: 031b lsls r3, r3, #12 - 802f026: 4927 ldr r1, [pc, #156] ; (802f0c4 ) - 802f028: 4313 orrs r3, r2 - 802f02a: 604b str r3, [r1, #4] + 802f09c: 4b2a ldr r3, [pc, #168] ; (802f148 ) + 802f09e: 685b ldr r3, [r3, #4] + 802f0a0: f423 327c bic.w r2, r3, #258048 ; 0x3f000 + 802f0a4: 687b ldr r3, [r7, #4] + 802f0a6: 691b ldr r3, [r3, #16] + 802f0a8: 031b lsls r3, r3, #12 + 802f0aa: 4927 ldr r1, [pc, #156] ; (802f148 ) + 802f0ac: 4313 orrs r3, r2 + 802f0ae: 604b str r3, [r1, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 802f02c: e070 b.n 802f110 + 802f0b0: e070 b.n 802f194 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 802f02e: 4b25 ldr r3, [pc, #148] ; (802f0c4 ) - 802f030: 685b ldr r3, [r3, #4] - 802f032: f023 42fe bic.w r2, r3, #2130706432 ; 0x7f000000 - 802f036: 687b ldr r3, [r7, #4] - 802f038: 691b ldr r3, [r3, #16] - 802f03a: 061b lsls r3, r3, #24 - 802f03c: 4921 ldr r1, [pc, #132] ; (802f0c4 ) - 802f03e: 4313 orrs r3, r2 - 802f040: 604b str r3, [r1, #4] + 802f0b2: 4b25 ldr r3, [pc, #148] ; (802f148 ) + 802f0b4: 685b ldr r3, [r3, #4] + 802f0b6: f023 42fe bic.w r2, r3, #2130706432 ; 0x7f000000 + 802f0ba: 687b ldr r3, [r7, #4] + 802f0bc: 691b ldr r3, [r3, #16] + 802f0be: 061b lsls r3, r3, #24 + 802f0c0: 4921 ldr r1, [pc, #132] ; (802f148 ) + 802f0c2: 4313 orrs r3, r2 + 802f0c4: 604b str r3, [r1, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) - 802f042: e065 b.n 802f110 + 802f0c6: e065 b.n 802f194 } else { /* Check the HSI State */ if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) - 802f044: 687b ldr r3, [r7, #4] - 802f046: 68db ldr r3, [r3, #12] - 802f048: 2b00 cmp r3, #0 - 802f04a: d048 beq.n 802f0de + 802f0c8: 687b ldr r3, [r7, #4] + 802f0ca: 68db ldr r3, [r3, #12] + 802f0cc: 2b00 cmp r3, #0 + 802f0ce: d048 beq.n 802f162 { /* Enable the Internal High Speed oscillator (HSI, HSIDIV2,HSIDIV4, or HSIDIV8) */ __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState); - 802f04c: 4b1d ldr r3, [pc, #116] ; (802f0c4 ) - 802f04e: 681b ldr r3, [r3, #0] - 802f050: f023 0219 bic.w r2, r3, #25 - 802f054: 687b ldr r3, [r7, #4] - 802f056: 68db ldr r3, [r3, #12] - 802f058: 491a ldr r1, [pc, #104] ; (802f0c4 ) - 802f05a: 4313 orrs r3, r2 - 802f05c: 600b str r3, [r1, #0] + 802f0d0: 4b1d ldr r3, [pc, #116] ; (802f148 ) + 802f0d2: 681b ldr r3, [r3, #0] + 802f0d4: f023 0219 bic.w r2, r3, #25 + 802f0d8: 687b ldr r3, [r7, #4] + 802f0da: 68db ldr r3, [r3, #12] + 802f0dc: 491a ldr r1, [pc, #104] ; (802f148 ) + 802f0de: 4313 orrs r3, r2 + 802f0e0: 600b str r3, [r1, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f05e: f7f6 ffb1 bl 8025fc4 - 802f062: 6278 str r0, [r7, #36] ; 0x24 + 802f0e2: f7f6 ffb1 bl 8026048 + 802f0e6: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802f064: e008 b.n 802f078 + 802f0e8: e008 b.n 802f0fc { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 802f066: f7f6 ffad bl 8025fc4 - 802f06a: 4602 mov r2, r0 - 802f06c: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f06e: 1ad3 subs r3, r2, r3 - 802f070: 2b02 cmp r3, #2 - 802f072: d901 bls.n 802f078 + 802f0ea: f7f6 ffad bl 8026048 + 802f0ee: 4602 mov r2, r0 + 802f0f0: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f0f2: 1ad3 subs r3, r2, r3 + 802f0f4: 2b02 cmp r3, #2 + 802f0f6: d901 bls.n 802f0fc { return HAL_TIMEOUT; - 802f074: 2303 movs r3, #3 - 802f076: e308 b.n 802f68a + 802f0f8: 2303 movs r3, #3 + 802f0fa: e308 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802f078: 4b12 ldr r3, [pc, #72] ; (802f0c4 ) - 802f07a: 681b ldr r3, [r3, #0] - 802f07c: f003 0304 and.w r3, r3, #4 - 802f080: 2b00 cmp r3, #0 - 802f082: d0f0 beq.n 802f066 + 802f0fc: 4b12 ldr r3, [pc, #72] ; (802f148 ) + 802f0fe: 681b ldr r3, [r3, #0] + 802f100: f003 0304 and.w r3, r3, #4 + 802f104: 2b00 cmp r3, #0 + 802f106: d0f0 beq.n 802f0ea } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 802f084: f7f6 ffce bl 8026024 - 802f088: 4603 mov r3, r0 - 802f08a: f241 0203 movw r2, #4099 ; 0x1003 - 802f08e: 4293 cmp r3, r2 - 802f090: d81a bhi.n 802f0c8 - 802f092: 687b ldr r3, [r7, #4] - 802f094: 691b ldr r3, [r3, #16] - 802f096: 2b40 cmp r3, #64 ; 0x40 - 802f098: d108 bne.n 802f0ac - 802f09a: 4b0a ldr r3, [pc, #40] ; (802f0c4 ) - 802f09c: 685b ldr r3, [r3, #4] - 802f09e: f423 337c bic.w r3, r3, #258048 ; 0x3f000 - 802f0a2: 4a08 ldr r2, [pc, #32] ; (802f0c4 ) - 802f0a4: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802f0a8: 6053 str r3, [r2, #4] - 802f0aa: e031 b.n 802f110 - 802f0ac: 4b05 ldr r3, [pc, #20] ; (802f0c4 ) - 802f0ae: 685b ldr r3, [r3, #4] - 802f0b0: f423 327c bic.w r2, r3, #258048 ; 0x3f000 - 802f0b4: 687b ldr r3, [r7, #4] - 802f0b6: 691b ldr r3, [r3, #16] - 802f0b8: 031b lsls r3, r3, #12 - 802f0ba: 4902 ldr r1, [pc, #8] ; (802f0c4 ) - 802f0bc: 4313 orrs r3, r2 - 802f0be: 604b str r3, [r1, #4] - 802f0c0: e026 b.n 802f110 - 802f0c2: bf00 nop - 802f0c4: 58024400 .word 0x58024400 - 802f0c8: 4b9a ldr r3, [pc, #616] ; (802f334 ) - 802f0ca: 685b ldr r3, [r3, #4] - 802f0cc: f023 42fe bic.w r2, r3, #2130706432 ; 0x7f000000 - 802f0d0: 687b ldr r3, [r7, #4] - 802f0d2: 691b ldr r3, [r3, #16] - 802f0d4: 061b lsls r3, r3, #24 - 802f0d6: 4997 ldr r1, [pc, #604] ; (802f334 ) - 802f0d8: 4313 orrs r3, r2 - 802f0da: 604b str r3, [r1, #4] - 802f0dc: e018 b.n 802f110 + 802f108: f7f6 ffce bl 80260a8 + 802f10c: 4603 mov r3, r0 + 802f10e: f241 0203 movw r2, #4099 ; 0x1003 + 802f112: 4293 cmp r3, r2 + 802f114: d81a bhi.n 802f14c + 802f116: 687b ldr r3, [r7, #4] + 802f118: 691b ldr r3, [r3, #16] + 802f11a: 2b40 cmp r3, #64 ; 0x40 + 802f11c: d108 bne.n 802f130 + 802f11e: 4b0a ldr r3, [pc, #40] ; (802f148 ) + 802f120: 685b ldr r3, [r3, #4] + 802f122: f423 337c bic.w r3, r3, #258048 ; 0x3f000 + 802f126: 4a08 ldr r2, [pc, #32] ; (802f148 ) + 802f128: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802f12c: 6053 str r3, [r2, #4] + 802f12e: e031 b.n 802f194 + 802f130: 4b05 ldr r3, [pc, #20] ; (802f148 ) + 802f132: 685b ldr r3, [r3, #4] + 802f134: f423 327c bic.w r2, r3, #258048 ; 0x3f000 + 802f138: 687b ldr r3, [r7, #4] + 802f13a: 691b ldr r3, [r3, #16] + 802f13c: 031b lsls r3, r3, #12 + 802f13e: 4902 ldr r1, [pc, #8] ; (802f148 ) + 802f140: 4313 orrs r3, r2 + 802f142: 604b str r3, [r1, #4] + 802f144: e026 b.n 802f194 + 802f146: bf00 nop + 802f148: 58024400 .word 0x58024400 + 802f14c: 4b9a ldr r3, [pc, #616] ; (802f3b8 ) + 802f14e: 685b ldr r3, [r3, #4] + 802f150: f023 42fe bic.w r2, r3, #2130706432 ; 0x7f000000 + 802f154: 687b ldr r3, [r7, #4] + 802f156: 691b ldr r3, [r3, #16] + 802f158: 061b lsls r3, r3, #24 + 802f15a: 4997 ldr r1, [pc, #604] ; (802f3b8 ) + 802f15c: 4313 orrs r3, r2 + 802f15e: 604b str r3, [r1, #4] + 802f160: e018 b.n 802f194 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 802f0de: 4b95 ldr r3, [pc, #596] ; (802f334 ) - 802f0e0: 681b ldr r3, [r3, #0] - 802f0e2: 4a94 ldr r2, [pc, #592] ; (802f334 ) - 802f0e4: f023 0301 bic.w r3, r3, #1 - 802f0e8: 6013 str r3, [r2, #0] + 802f162: 4b95 ldr r3, [pc, #596] ; (802f3b8 ) + 802f164: 681b ldr r3, [r3, #0] + 802f166: 4a94 ldr r2, [pc, #592] ; (802f3b8 ) + 802f168: f023 0301 bic.w r3, r3, #1 + 802f16c: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f0ea: f7f6 ff6b bl 8025fc4 - 802f0ee: 6278 str r0, [r7, #36] ; 0x24 + 802f16e: f7f6 ff6b bl 8026048 + 802f172: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 802f0f0: e008 b.n 802f104 + 802f174: e008 b.n 802f188 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 802f0f2: f7f6 ff67 bl 8025fc4 - 802f0f6: 4602 mov r2, r0 - 802f0f8: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f0fa: 1ad3 subs r3, r2, r3 - 802f0fc: 2b02 cmp r3, #2 - 802f0fe: d901 bls.n 802f104 + 802f176: f7f6 ff67 bl 8026048 + 802f17a: 4602 mov r2, r0 + 802f17c: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f17e: 1ad3 subs r3, r2, r3 + 802f180: 2b02 cmp r3, #2 + 802f182: d901 bls.n 802f188 { return HAL_TIMEOUT; - 802f100: 2303 movs r3, #3 - 802f102: e2c2 b.n 802f68a + 802f184: 2303 movs r3, #3 + 802f186: e2c2 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 802f104: 4b8b ldr r3, [pc, #556] ; (802f334 ) - 802f106: 681b ldr r3, [r3, #0] - 802f108: f003 0304 and.w r3, r3, #4 - 802f10c: 2b00 cmp r3, #0 - 802f10e: d1f0 bne.n 802f0f2 + 802f188: 4b8b ldr r3, [pc, #556] ; (802f3b8 ) + 802f18a: 681b ldr r3, [r3, #0] + 802f18c: f003 0304 and.w r3, r3, #4 + 802f190: 2b00 cmp r3, #0 + 802f192: d1f0 bne.n 802f176 } } } } /*----------------------------- CSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_CSI) == RCC_OSCILLATORTYPE_CSI) - 802f110: 687b ldr r3, [r7, #4] - 802f112: 681b ldr r3, [r3, #0] - 802f114: f003 0310 and.w r3, r3, #16 - 802f118: 2b00 cmp r3, #0 - 802f11a: f000 80a9 beq.w 802f270 + 802f194: 687b ldr r3, [r7, #4] + 802f196: 681b ldr r3, [r3, #0] + 802f198: f003 0310 and.w r3, r3, #16 + 802f19c: 2b00 cmp r3, #0 + 802f19e: f000 80a9 beq.w 802f2f4 /* Check the parameters */ assert_param(IS_RCC_CSI(RCC_OscInitStruct->CSIState)); assert_param(IS_RCC_CSICALIBRATION_VALUE(RCC_OscInitStruct->CSICalibrationValue)); /* When the CSI is used as system clock it will not disabled */ const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); - 802f11e: 4b85 ldr r3, [pc, #532] ; (802f334 ) - 802f120: 691b ldr r3, [r3, #16] - 802f122: f003 0338 and.w r3, r3, #56 ; 0x38 - 802f126: 61bb str r3, [r7, #24] + 802f1a2: 4b85 ldr r3, [pc, #532] ; (802f3b8 ) + 802f1a4: 691b ldr r3, [r3, #16] + 802f1a6: f003 0338 and.w r3, r3, #56 ; 0x38 + 802f1aa: 61bb str r3, [r7, #24] const uint32_t temp_pllckselr = RCC->PLLCKSELR; - 802f128: 4b82 ldr r3, [pc, #520] ; (802f334 ) - 802f12a: 6a9b ldr r3, [r3, #40] ; 0x28 - 802f12c: 617b str r3, [r7, #20] + 802f1ac: 4b82 ldr r3, [pc, #520] ; (802f3b8 ) + 802f1ae: 6a9b ldr r3, [r3, #40] ; 0x28 + 802f1b0: 617b str r3, [r7, #20] if((temp_sysclksrc == RCC_CFGR_SWS_CSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_CSI))) - 802f12e: 69bb ldr r3, [r7, #24] - 802f130: 2b08 cmp r3, #8 - 802f132: d007 beq.n 802f144 - 802f134: 69bb ldr r3, [r7, #24] - 802f136: 2b18 cmp r3, #24 - 802f138: d13a bne.n 802f1b0 - 802f13a: 697b ldr r3, [r7, #20] - 802f13c: f003 0303 and.w r3, r3, #3 - 802f140: 2b01 cmp r3, #1 - 802f142: d135 bne.n 802f1b0 + 802f1b2: 69bb ldr r3, [r7, #24] + 802f1b4: 2b08 cmp r3, #8 + 802f1b6: d007 beq.n 802f1c8 + 802f1b8: 69bb ldr r3, [r7, #24] + 802f1ba: 2b18 cmp r3, #24 + 802f1bc: d13a bne.n 802f234 + 802f1be: 697b ldr r3, [r7, #20] + 802f1c0: f003 0303 and.w r3, r3, #3 + 802f1c4: 2b01 cmp r3, #1 + 802f1c6: d135 bne.n 802f234 { /* When CSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON)) - 802f144: 4b7b ldr r3, [pc, #492] ; (802f334 ) - 802f146: 681b ldr r3, [r3, #0] - 802f148: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f14c: 2b00 cmp r3, #0 - 802f14e: d005 beq.n 802f15c - 802f150: 687b ldr r3, [r7, #4] - 802f152: 69db ldr r3, [r3, #28] - 802f154: 2b80 cmp r3, #128 ; 0x80 - 802f156: d001 beq.n 802f15c + 802f1c8: 4b7b ldr r3, [pc, #492] ; (802f3b8 ) + 802f1ca: 681b ldr r3, [r3, #0] + 802f1cc: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f1d0: 2b00 cmp r3, #0 + 802f1d2: d005 beq.n 802f1e0 + 802f1d4: 687b ldr r3, [r7, #4] + 802f1d6: 69db ldr r3, [r3, #28] + 802f1d8: 2b80 cmp r3, #128 ; 0x80 + 802f1da: d001 beq.n 802f1e0 { return HAL_ERROR; - 802f158: 2301 movs r3, #1 - 802f15a: e296 b.n 802f68a + 802f1dc: 2301 movs r3, #1 + 802f1de: e296 b.n 802f70e } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/ __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue); - 802f15c: f7f6 ff62 bl 8026024 - 802f160: 4603 mov r3, r0 - 802f162: f241 0203 movw r2, #4099 ; 0x1003 - 802f166: 4293 cmp r3, r2 - 802f168: d817 bhi.n 802f19a - 802f16a: 687b ldr r3, [r7, #4] - 802f16c: 6a1b ldr r3, [r3, #32] - 802f16e: 2b20 cmp r3, #32 - 802f170: d108 bne.n 802f184 - 802f172: 4b70 ldr r3, [pc, #448] ; (802f334 ) - 802f174: 685b ldr r3, [r3, #4] - 802f176: f023 43f8 bic.w r3, r3, #2080374784 ; 0x7c000000 - 802f17a: 4a6e ldr r2, [pc, #440] ; (802f334 ) - 802f17c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 - 802f180: 6053 str r3, [r2, #4] + 802f1e0: f7f6 ff62 bl 80260a8 + 802f1e4: 4603 mov r3, r0 + 802f1e6: f241 0203 movw r2, #4099 ; 0x1003 + 802f1ea: 4293 cmp r3, r2 + 802f1ec: d817 bhi.n 802f21e + 802f1ee: 687b ldr r3, [r7, #4] + 802f1f0: 6a1b ldr r3, [r3, #32] + 802f1f2: 2b20 cmp r3, #32 + 802f1f4: d108 bne.n 802f208 + 802f1f6: 4b70 ldr r3, [pc, #448] ; (802f3b8 ) + 802f1f8: 685b ldr r3, [r3, #4] + 802f1fa: f023 43f8 bic.w r3, r3, #2080374784 ; 0x7c000000 + 802f1fe: 4a6e ldr r2, [pc, #440] ; (802f3b8 ) + 802f200: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 + 802f204: 6053 str r3, [r2, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON)) - 802f182: e075 b.n 802f270 + 802f206: e075 b.n 802f2f4 __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue); - 802f184: 4b6b ldr r3, [pc, #428] ; (802f334 ) - 802f186: 685b ldr r3, [r3, #4] - 802f188: f023 42f8 bic.w r2, r3, #2080374784 ; 0x7c000000 - 802f18c: 687b ldr r3, [r7, #4] - 802f18e: 6a1b ldr r3, [r3, #32] - 802f190: 069b lsls r3, r3, #26 - 802f192: 4968 ldr r1, [pc, #416] ; (802f334 ) - 802f194: 4313 orrs r3, r2 - 802f196: 604b str r3, [r1, #4] + 802f208: 4b6b ldr r3, [pc, #428] ; (802f3b8 ) + 802f20a: 685b ldr r3, [r3, #4] + 802f20c: f023 42f8 bic.w r2, r3, #2080374784 ; 0x7c000000 + 802f210: 687b ldr r3, [r7, #4] + 802f212: 6a1b ldr r3, [r3, #32] + 802f214: 069b lsls r3, r3, #26 + 802f216: 4968 ldr r1, [pc, #416] ; (802f3b8 ) + 802f218: 4313 orrs r3, r2 + 802f21a: 604b str r3, [r1, #4] if((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON)) - 802f198: e06a b.n 802f270 + 802f21c: e06a b.n 802f2f4 __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue); - 802f19a: 4b66 ldr r3, [pc, #408] ; (802f334 ) - 802f19c: 68db ldr r3, [r3, #12] - 802f19e: f023 527c bic.w r2, r3, #1056964608 ; 0x3f000000 - 802f1a2: 687b ldr r3, [r7, #4] - 802f1a4: 6a1b ldr r3, [r3, #32] - 802f1a6: 061b lsls r3, r3, #24 - 802f1a8: 4962 ldr r1, [pc, #392] ; (802f334 ) - 802f1aa: 4313 orrs r3, r2 - 802f1ac: 60cb str r3, [r1, #12] + 802f21e: 4b66 ldr r3, [pc, #408] ; (802f3b8 ) + 802f220: 68db ldr r3, [r3, #12] + 802f222: f023 527c bic.w r2, r3, #1056964608 ; 0x3f000000 + 802f226: 687b ldr r3, [r7, #4] + 802f228: 6a1b ldr r3, [r3, #32] + 802f22a: 061b lsls r3, r3, #24 + 802f22c: 4962 ldr r1, [pc, #392] ; (802f3b8 ) + 802f22e: 4313 orrs r3, r2 + 802f230: 60cb str r3, [r1, #12] if((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON)) - 802f1ae: e05f b.n 802f270 + 802f232: e05f b.n 802f2f4 } } else { /* Check the CSI State */ if((RCC_OscInitStruct->CSIState)!= RCC_CSI_OFF) - 802f1b0: 687b ldr r3, [r7, #4] - 802f1b2: 69db ldr r3, [r3, #28] - 802f1b4: 2b00 cmp r3, #0 - 802f1b6: d042 beq.n 802f23e + 802f234: 687b ldr r3, [r7, #4] + 802f236: 69db ldr r3, [r3, #28] + 802f238: 2b00 cmp r3, #0 + 802f23a: d042 beq.n 802f2c2 { /* Enable the Internal High Speed oscillator (CSI). */ __HAL_RCC_CSI_ENABLE(); - 802f1b8: 4b5e ldr r3, [pc, #376] ; (802f334 ) - 802f1ba: 681b ldr r3, [r3, #0] - 802f1bc: 4a5d ldr r2, [pc, #372] ; (802f334 ) - 802f1be: f043 0380 orr.w r3, r3, #128 ; 0x80 - 802f1c2: 6013 str r3, [r2, #0] + 802f23c: 4b5e ldr r3, [pc, #376] ; (802f3b8 ) + 802f23e: 681b ldr r3, [r3, #0] + 802f240: 4a5d ldr r2, [pc, #372] ; (802f3b8 ) + 802f242: f043 0380 orr.w r3, r3, #128 ; 0x80 + 802f246: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f1c4: f7f6 fefe bl 8025fc4 - 802f1c8: 6278 str r0, [r7, #36] ; 0x24 + 802f248: f7f6 fefe bl 8026048 + 802f24c: 6278 str r0, [r7, #36] ; 0x24 /* Wait till CSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U) - 802f1ca: e008 b.n 802f1de + 802f24e: e008 b.n 802f262 { if((HAL_GetTick() - tickstart ) > CSI_TIMEOUT_VALUE) - 802f1cc: f7f6 fefa bl 8025fc4 - 802f1d0: 4602 mov r2, r0 - 802f1d2: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f1d4: 1ad3 subs r3, r2, r3 - 802f1d6: 2b02 cmp r3, #2 - 802f1d8: d901 bls.n 802f1de + 802f250: f7f6 fefa bl 8026048 + 802f254: 4602 mov r2, r0 + 802f256: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f258: 1ad3 subs r3, r2, r3 + 802f25a: 2b02 cmp r3, #2 + 802f25c: d901 bls.n 802f262 { return HAL_TIMEOUT; - 802f1da: 2303 movs r3, #3 - 802f1dc: e255 b.n 802f68a + 802f25e: 2303 movs r3, #3 + 802f260: e255 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U) - 802f1de: 4b55 ldr r3, [pc, #340] ; (802f334 ) - 802f1e0: 681b ldr r3, [r3, #0] - 802f1e2: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f1e6: 2b00 cmp r3, #0 - 802f1e8: d0f0 beq.n 802f1cc + 802f262: 4b55 ldr r3, [pc, #340] ; (802f3b8 ) + 802f264: 681b ldr r3, [r3, #0] + 802f266: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f26a: 2b00 cmp r3, #0 + 802f26c: d0f0 beq.n 802f250 } } /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/ __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue); - 802f1ea: f7f6 ff1b bl 8026024 - 802f1ee: 4603 mov r3, r0 - 802f1f0: f241 0203 movw r2, #4099 ; 0x1003 - 802f1f4: 4293 cmp r3, r2 - 802f1f6: d817 bhi.n 802f228 - 802f1f8: 687b ldr r3, [r7, #4] - 802f1fa: 6a1b ldr r3, [r3, #32] - 802f1fc: 2b20 cmp r3, #32 - 802f1fe: d108 bne.n 802f212 - 802f200: 4b4c ldr r3, [pc, #304] ; (802f334 ) - 802f202: 685b ldr r3, [r3, #4] - 802f204: f023 43f8 bic.w r3, r3, #2080374784 ; 0x7c000000 - 802f208: 4a4a ldr r2, [pc, #296] ; (802f334 ) - 802f20a: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 - 802f20e: 6053 str r3, [r2, #4] - 802f210: e02e b.n 802f270 - 802f212: 4b48 ldr r3, [pc, #288] ; (802f334 ) - 802f214: 685b ldr r3, [r3, #4] - 802f216: f023 42f8 bic.w r2, r3, #2080374784 ; 0x7c000000 - 802f21a: 687b ldr r3, [r7, #4] - 802f21c: 6a1b ldr r3, [r3, #32] - 802f21e: 069b lsls r3, r3, #26 - 802f220: 4944 ldr r1, [pc, #272] ; (802f334 ) - 802f222: 4313 orrs r3, r2 - 802f224: 604b str r3, [r1, #4] - 802f226: e023 b.n 802f270 - 802f228: 4b42 ldr r3, [pc, #264] ; (802f334 ) - 802f22a: 68db ldr r3, [r3, #12] - 802f22c: f023 527c bic.w r2, r3, #1056964608 ; 0x3f000000 - 802f230: 687b ldr r3, [r7, #4] - 802f232: 6a1b ldr r3, [r3, #32] - 802f234: 061b lsls r3, r3, #24 - 802f236: 493f ldr r1, [pc, #252] ; (802f334 ) - 802f238: 4313 orrs r3, r2 - 802f23a: 60cb str r3, [r1, #12] - 802f23c: e018 b.n 802f270 + 802f26e: f7f6 ff1b bl 80260a8 + 802f272: 4603 mov r3, r0 + 802f274: f241 0203 movw r2, #4099 ; 0x1003 + 802f278: 4293 cmp r3, r2 + 802f27a: d817 bhi.n 802f2ac + 802f27c: 687b ldr r3, [r7, #4] + 802f27e: 6a1b ldr r3, [r3, #32] + 802f280: 2b20 cmp r3, #32 + 802f282: d108 bne.n 802f296 + 802f284: 4b4c ldr r3, [pc, #304] ; (802f3b8 ) + 802f286: 685b ldr r3, [r3, #4] + 802f288: f023 43f8 bic.w r3, r3, #2080374784 ; 0x7c000000 + 802f28c: 4a4a ldr r2, [pc, #296] ; (802f3b8 ) + 802f28e: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000 + 802f292: 6053 str r3, [r2, #4] + 802f294: e02e b.n 802f2f4 + 802f296: 4b48 ldr r3, [pc, #288] ; (802f3b8 ) + 802f298: 685b ldr r3, [r3, #4] + 802f29a: f023 42f8 bic.w r2, r3, #2080374784 ; 0x7c000000 + 802f29e: 687b ldr r3, [r7, #4] + 802f2a0: 6a1b ldr r3, [r3, #32] + 802f2a2: 069b lsls r3, r3, #26 + 802f2a4: 4944 ldr r1, [pc, #272] ; (802f3b8 ) + 802f2a6: 4313 orrs r3, r2 + 802f2a8: 604b str r3, [r1, #4] + 802f2aa: e023 b.n 802f2f4 + 802f2ac: 4b42 ldr r3, [pc, #264] ; (802f3b8 ) + 802f2ae: 68db ldr r3, [r3, #12] + 802f2b0: f023 527c bic.w r2, r3, #1056964608 ; 0x3f000000 + 802f2b4: 687b ldr r3, [r7, #4] + 802f2b6: 6a1b ldr r3, [r3, #32] + 802f2b8: 061b lsls r3, r3, #24 + 802f2ba: 493f ldr r1, [pc, #252] ; (802f3b8 ) + 802f2bc: 4313 orrs r3, r2 + 802f2be: 60cb str r3, [r1, #12] + 802f2c0: e018 b.n 802f2f4 } else { /* Disable the Internal High Speed oscillator (CSI). */ __HAL_RCC_CSI_DISABLE(); - 802f23e: 4b3d ldr r3, [pc, #244] ; (802f334 ) - 802f240: 681b ldr r3, [r3, #0] - 802f242: 4a3c ldr r2, [pc, #240] ; (802f334 ) - 802f244: f023 0380 bic.w r3, r3, #128 ; 0x80 - 802f248: 6013 str r3, [r2, #0] + 802f2c2: 4b3d ldr r3, [pc, #244] ; (802f3b8 ) + 802f2c4: 681b ldr r3, [r3, #0] + 802f2c6: 4a3c ldr r2, [pc, #240] ; (802f3b8 ) + 802f2c8: f023 0380 bic.w r3, r3, #128 ; 0x80 + 802f2cc: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f24a: f7f6 febb bl 8025fc4 - 802f24e: 6278 str r0, [r7, #36] ; 0x24 + 802f2ce: f7f6 febb bl 8026048 + 802f2d2: 6278 str r0, [r7, #36] ; 0x24 /* Wait till CSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) - 802f250: e008 b.n 802f264 + 802f2d4: e008 b.n 802f2e8 { if((HAL_GetTick() - tickstart ) > CSI_TIMEOUT_VALUE) - 802f252: f7f6 feb7 bl 8025fc4 - 802f256: 4602 mov r2, r0 - 802f258: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f25a: 1ad3 subs r3, r2, r3 - 802f25c: 2b02 cmp r3, #2 - 802f25e: d901 bls.n 802f264 + 802f2d6: f7f6 feb7 bl 8026048 + 802f2da: 4602 mov r2, r0 + 802f2dc: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f2de: 1ad3 subs r3, r2, r3 + 802f2e0: 2b02 cmp r3, #2 + 802f2e2: d901 bls.n 802f2e8 { return HAL_TIMEOUT; - 802f260: 2303 movs r3, #3 - 802f262: e212 b.n 802f68a + 802f2e4: 2303 movs r3, #3 + 802f2e6: e212 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) - 802f264: 4b33 ldr r3, [pc, #204] ; (802f334 ) - 802f266: 681b ldr r3, [r3, #0] - 802f268: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f26c: 2b00 cmp r3, #0 - 802f26e: d1f0 bne.n 802f252 + 802f2e8: 4b33 ldr r3, [pc, #204] ; (802f3b8 ) + 802f2ea: 681b ldr r3, [r3, #0] + 802f2ec: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f2f0: 2b00 cmp r3, #0 + 802f2f2: d1f0 bne.n 802f2d6 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 802f270: 687b ldr r3, [r7, #4] - 802f272: 681b ldr r3, [r3, #0] - 802f274: f003 0308 and.w r3, r3, #8 - 802f278: 2b00 cmp r3, #0 - 802f27a: d036 beq.n 802f2ea + 802f2f4: 687b ldr r3, [r7, #4] + 802f2f6: 681b ldr r3, [r3, #0] + 802f2f8: f003 0308 and.w r3, r3, #8 + 802f2fc: 2b00 cmp r3, #0 + 802f2fe: d036 beq.n 802f36e { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) - 802f27c: 687b ldr r3, [r7, #4] - 802f27e: 695b ldr r3, [r3, #20] - 802f280: 2b00 cmp r3, #0 - 802f282: d019 beq.n 802f2b8 + 802f300: 687b ldr r3, [r7, #4] + 802f302: 695b ldr r3, [r3, #20] + 802f304: 2b00 cmp r3, #0 + 802f306: d019 beq.n 802f33c { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 802f284: 4b2b ldr r3, [pc, #172] ; (802f334 ) - 802f286: 6f5b ldr r3, [r3, #116] ; 0x74 - 802f288: 4a2a ldr r2, [pc, #168] ; (802f334 ) - 802f28a: f043 0301 orr.w r3, r3, #1 - 802f28e: 6753 str r3, [r2, #116] ; 0x74 + 802f308: 4b2b ldr r3, [pc, #172] ; (802f3b8 ) + 802f30a: 6f5b ldr r3, [r3, #116] ; 0x74 + 802f30c: 4a2a ldr r2, [pc, #168] ; (802f3b8 ) + 802f30e: f043 0301 orr.w r3, r3, #1 + 802f312: 6753 str r3, [r2, #116] ; 0x74 /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f290: f7f6 fe98 bl 8025fc4 - 802f294: 6278 str r0, [r7, #36] ; 0x24 + 802f314: f7f6 fe98 bl 8026048 + 802f318: 6278 str r0, [r7, #36] ; 0x24 /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 802f296: e008 b.n 802f2aa + 802f31a: e008 b.n 802f32e { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 802f298: f7f6 fe94 bl 8025fc4 - 802f29c: 4602 mov r2, r0 - 802f29e: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f2a0: 1ad3 subs r3, r2, r3 - 802f2a2: 2b02 cmp r3, #2 - 802f2a4: d901 bls.n 802f2aa + 802f31c: f7f6 fe94 bl 8026048 + 802f320: 4602 mov r2, r0 + 802f322: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f324: 1ad3 subs r3, r2, r3 + 802f326: 2b02 cmp r3, #2 + 802f328: d901 bls.n 802f32e { return HAL_TIMEOUT; - 802f2a6: 2303 movs r3, #3 - 802f2a8: e1ef b.n 802f68a + 802f32a: 2303 movs r3, #3 + 802f32c: e1ef b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 802f2aa: 4b22 ldr r3, [pc, #136] ; (802f334 ) - 802f2ac: 6f5b ldr r3, [r3, #116] ; 0x74 - 802f2ae: f003 0302 and.w r3, r3, #2 - 802f2b2: 2b00 cmp r3, #0 - 802f2b4: d0f0 beq.n 802f298 - 802f2b6: e018 b.n 802f2ea + 802f32e: 4b22 ldr r3, [pc, #136] ; (802f3b8 ) + 802f330: 6f5b ldr r3, [r3, #116] ; 0x74 + 802f332: f003 0302 and.w r3, r3, #2 + 802f336: 2b00 cmp r3, #0 + 802f338: d0f0 beq.n 802f31c + 802f33a: e018 b.n 802f36e } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 802f2b8: 4b1e ldr r3, [pc, #120] ; (802f334 ) - 802f2ba: 6f5b ldr r3, [r3, #116] ; 0x74 - 802f2bc: 4a1d ldr r2, [pc, #116] ; (802f334 ) - 802f2be: f023 0301 bic.w r3, r3, #1 - 802f2c2: 6753 str r3, [r2, #116] ; 0x74 + 802f33c: 4b1e ldr r3, [pc, #120] ; (802f3b8 ) + 802f33e: 6f5b ldr r3, [r3, #116] ; 0x74 + 802f340: 4a1d ldr r2, [pc, #116] ; (802f3b8 ) + 802f342: f023 0301 bic.w r3, r3, #1 + 802f346: 6753 str r3, [r2, #116] ; 0x74 /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f2c4: f7f6 fe7e bl 8025fc4 - 802f2c8: 6278 str r0, [r7, #36] ; 0x24 + 802f348: f7f6 fe7e bl 8026048 + 802f34c: 6278 str r0, [r7, #36] ; 0x24 /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 802f2ca: e008 b.n 802f2de + 802f34e: e008 b.n 802f362 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 802f2cc: f7f6 fe7a bl 8025fc4 - 802f2d0: 4602 mov r2, r0 - 802f2d2: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f2d4: 1ad3 subs r3, r2, r3 - 802f2d6: 2b02 cmp r3, #2 - 802f2d8: d901 bls.n 802f2de + 802f350: f7f6 fe7a bl 8026048 + 802f354: 4602 mov r2, r0 + 802f356: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f358: 1ad3 subs r3, r2, r3 + 802f35a: 2b02 cmp r3, #2 + 802f35c: d901 bls.n 802f362 { return HAL_TIMEOUT; - 802f2da: 2303 movs r3, #3 - 802f2dc: e1d5 b.n 802f68a + 802f35e: 2303 movs r3, #3 + 802f360: e1d5 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 802f2de: 4b15 ldr r3, [pc, #84] ; (802f334 ) - 802f2e0: 6f5b ldr r3, [r3, #116] ; 0x74 - 802f2e2: f003 0302 and.w r3, r3, #2 - 802f2e6: 2b00 cmp r3, #0 - 802f2e8: d1f0 bne.n 802f2cc + 802f362: 4b15 ldr r3, [pc, #84] ; (802f3b8 ) + 802f364: 6f5b ldr r3, [r3, #116] ; 0x74 + 802f366: f003 0302 and.w r3, r3, #2 + 802f36a: 2b00 cmp r3, #0 + 802f36c: d1f0 bne.n 802f350 } } } /*------------------------------ HSI48 Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) - 802f2ea: 687b ldr r3, [r7, #4] - 802f2ec: 681b ldr r3, [r3, #0] - 802f2ee: f003 0320 and.w r3, r3, #32 - 802f2f2: 2b00 cmp r3, #0 - 802f2f4: d039 beq.n 802f36a + 802f36e: 687b ldr r3, [r7, #4] + 802f370: 681b ldr r3, [r3, #0] + 802f372: f003 0320 and.w r3, r3, #32 + 802f376: 2b00 cmp r3, #0 + 802f378: d039 beq.n 802f3ee { /* Check the parameters */ assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); /* Check the HSI48 State */ if((RCC_OscInitStruct->HSI48State)!= RCC_HSI48_OFF) - 802f2f6: 687b ldr r3, [r7, #4] - 802f2f8: 699b ldr r3, [r3, #24] - 802f2fa: 2b00 cmp r3, #0 - 802f2fc: d01c beq.n 802f338 + 802f37a: 687b ldr r3, [r7, #4] + 802f37c: 699b ldr r3, [r3, #24] + 802f37e: 2b00 cmp r3, #0 + 802f380: d01c beq.n 802f3bc { /* Enable the Internal Low Speed oscillator (HSI48). */ __HAL_RCC_HSI48_ENABLE(); - 802f2fe: 4b0d ldr r3, [pc, #52] ; (802f334 ) - 802f300: 681b ldr r3, [r3, #0] - 802f302: 4a0c ldr r2, [pc, #48] ; (802f334 ) - 802f304: f443 5380 orr.w r3, r3, #4096 ; 0x1000 - 802f308: 6013 str r3, [r2, #0] + 802f382: 4b0d ldr r3, [pc, #52] ; (802f3b8 ) + 802f384: 681b ldr r3, [r3, #0] + 802f386: 4a0c ldr r2, [pc, #48] ; (802f3b8 ) + 802f388: f443 5380 orr.w r3, r3, #4096 ; 0x1000 + 802f38c: 6013 str r3, [r2, #0] /* Get time-out */ tickstart = HAL_GetTick(); - 802f30a: f7f6 fe5b bl 8025fc4 - 802f30e: 6278 str r0, [r7, #36] ; 0x24 + 802f38e: f7f6 fe5b bl 8026048 + 802f392: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI48 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U) - 802f310: e008 b.n 802f324 + 802f394: e008 b.n 802f3a8 { if((HAL_GetTick() - tickstart ) > HSI48_TIMEOUT_VALUE) - 802f312: f7f6 fe57 bl 8025fc4 - 802f316: 4602 mov r2, r0 - 802f318: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f31a: 1ad3 subs r3, r2, r3 - 802f31c: 2b02 cmp r3, #2 - 802f31e: d901 bls.n 802f324 + 802f396: f7f6 fe57 bl 8026048 + 802f39a: 4602 mov r2, r0 + 802f39c: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f39e: 1ad3 subs r3, r2, r3 + 802f3a0: 2b02 cmp r3, #2 + 802f3a2: d901 bls.n 802f3a8 { return HAL_TIMEOUT; - 802f320: 2303 movs r3, #3 - 802f322: e1b2 b.n 802f68a + 802f3a4: 2303 movs r3, #3 + 802f3a6: e1b2 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U) - 802f324: 4b03 ldr r3, [pc, #12] ; (802f334 ) - 802f326: 681b ldr r3, [r3, #0] - 802f328: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 802f32c: 2b00 cmp r3, #0 - 802f32e: d0f0 beq.n 802f312 - 802f330: e01b b.n 802f36a - 802f332: bf00 nop - 802f334: 58024400 .word 0x58024400 + 802f3a8: 4b03 ldr r3, [pc, #12] ; (802f3b8 ) + 802f3aa: 681b ldr r3, [r3, #0] + 802f3ac: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 802f3b0: 2b00 cmp r3, #0 + 802f3b2: d0f0 beq.n 802f396 + 802f3b4: e01b b.n 802f3ee + 802f3b6: bf00 nop + 802f3b8: 58024400 .word 0x58024400 } } else { /* Disable the Internal Low Speed oscillator (HSI48). */ __HAL_RCC_HSI48_DISABLE(); - 802f338: 4b9b ldr r3, [pc, #620] ; (802f5a8 ) - 802f33a: 681b ldr r3, [r3, #0] - 802f33c: 4a9a ldr r2, [pc, #616] ; (802f5a8 ) - 802f33e: f423 5380 bic.w r3, r3, #4096 ; 0x1000 - 802f342: 6013 str r3, [r2, #0] + 802f3bc: 4b9b ldr r3, [pc, #620] ; (802f62c ) + 802f3be: 681b ldr r3, [r3, #0] + 802f3c0: 4a9a ldr r2, [pc, #616] ; (802f62c ) + 802f3c2: f423 5380 bic.w r3, r3, #4096 ; 0x1000 + 802f3c6: 6013 str r3, [r2, #0] /* Get time-out */ tickstart = HAL_GetTick(); - 802f344: f7f6 fe3e bl 8025fc4 - 802f348: 6278 str r0, [r7, #36] ; 0x24 + 802f3c8: f7f6 fe3e bl 8026048 + 802f3cc: 6278 str r0, [r7, #36] ; 0x24 /* Wait till HSI48 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U) - 802f34a: e008 b.n 802f35e + 802f3ce: e008 b.n 802f3e2 { if((HAL_GetTick() - tickstart ) > HSI48_TIMEOUT_VALUE) - 802f34c: f7f6 fe3a bl 8025fc4 - 802f350: 4602 mov r2, r0 - 802f352: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f354: 1ad3 subs r3, r2, r3 - 802f356: 2b02 cmp r3, #2 - 802f358: d901 bls.n 802f35e + 802f3d0: f7f6 fe3a bl 8026048 + 802f3d4: 4602 mov r2, r0 + 802f3d6: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f3d8: 1ad3 subs r3, r2, r3 + 802f3da: 2b02 cmp r3, #2 + 802f3dc: d901 bls.n 802f3e2 { return HAL_TIMEOUT; - 802f35a: 2303 movs r3, #3 - 802f35c: e195 b.n 802f68a + 802f3de: 2303 movs r3, #3 + 802f3e0: e195 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U) - 802f35e: 4b92 ldr r3, [pc, #584] ; (802f5a8 ) - 802f360: 681b ldr r3, [r3, #0] - 802f362: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 802f366: 2b00 cmp r3, #0 - 802f368: d1f0 bne.n 802f34c + 802f3e2: 4b92 ldr r3, [pc, #584] ; (802f62c ) + 802f3e4: 681b ldr r3, [r3, #0] + 802f3e6: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 802f3ea: 2b00 cmp r3, #0 + 802f3ec: d1f0 bne.n 802f3d0 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 802f36a: 687b ldr r3, [r7, #4] - 802f36c: 681b ldr r3, [r3, #0] - 802f36e: f003 0304 and.w r3, r3, #4 - 802f372: 2b00 cmp r3, #0 - 802f374: f000 8081 beq.w 802f47a + 802f3ee: 687b ldr r3, [r7, #4] + 802f3f0: 681b ldr r3, [r3, #0] + 802f3f2: f003 0304 and.w r3, r3, #4 + 802f3f6: 2b00 cmp r3, #0 + 802f3f8: f000 8081 beq.w 802f4fe { /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Enable write access to Backup domain */ PWR->CR1 |= PWR_CR1_DBP; - 802f378: 4b8c ldr r3, [pc, #560] ; (802f5ac ) - 802f37a: 681b ldr r3, [r3, #0] - 802f37c: 4a8b ldr r2, [pc, #556] ; (802f5ac ) - 802f37e: f443 7380 orr.w r3, r3, #256 ; 0x100 - 802f382: 6013 str r3, [r2, #0] + 802f3fc: 4b8c ldr r3, [pc, #560] ; (802f630 ) + 802f3fe: 681b ldr r3, [r3, #0] + 802f400: 4a8b ldr r2, [pc, #556] ; (802f630 ) + 802f402: f443 7380 orr.w r3, r3, #256 ; 0x100 + 802f406: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 802f384: f7f6 fe1e bl 8025fc4 - 802f388: 6278 str r0, [r7, #36] ; 0x24 + 802f408: f7f6 fe1e bl 8026048 + 802f40c: 6278 str r0, [r7, #36] ; 0x24 while((PWR->CR1 & PWR_CR1_DBP) == 0U) - 802f38a: e008 b.n 802f39e + 802f40e: e008 b.n 802f422 { if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE) - 802f38c: f7f6 fe1a bl 8025fc4 - 802f390: 4602 mov r2, r0 - 802f392: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f394: 1ad3 subs r3, r2, r3 - 802f396: 2b64 cmp r3, #100 ; 0x64 - 802f398: d901 bls.n 802f39e + 802f410: f7f6 fe1a bl 8026048 + 802f414: 4602 mov r2, r0 + 802f416: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f418: 1ad3 subs r3, r2, r3 + 802f41a: 2b64 cmp r3, #100 ; 0x64 + 802f41c: d901 bls.n 802f422 { return HAL_TIMEOUT; - 802f39a: 2303 movs r3, #3 - 802f39c: e175 b.n 802f68a + 802f41e: 2303 movs r3, #3 + 802f420: e175 b.n 802f70e while((PWR->CR1 & PWR_CR1_DBP) == 0U) - 802f39e: 4b83 ldr r3, [pc, #524] ; (802f5ac ) - 802f3a0: 681b ldr r3, [r3, #0] - 802f3a2: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f3a6: 2b00 cmp r3, #0 - 802f3a8: d0f0 beq.n 802f38c + 802f422: 4b83 ldr r3, [pc, #524] ; (802f630 ) + 802f424: 681b ldr r3, [r3, #0] + 802f426: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f42a: 2b00 cmp r3, #0 + 802f42c: d0f0 beq.n 802f410 } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 802f3aa: 687b ldr r3, [r7, #4] - 802f3ac: 689b ldr r3, [r3, #8] - 802f3ae: 2b01 cmp r3, #1 - 802f3b0: d106 bne.n 802f3c0 - 802f3b2: 4b7d ldr r3, [pc, #500] ; (802f5a8 ) - 802f3b4: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3b6: 4a7c ldr r2, [pc, #496] ; (802f5a8 ) - 802f3b8: f043 0301 orr.w r3, r3, #1 - 802f3bc: 6713 str r3, [r2, #112] ; 0x70 - 802f3be: e02d b.n 802f41c - 802f3c0: 687b ldr r3, [r7, #4] - 802f3c2: 689b ldr r3, [r3, #8] - 802f3c4: 2b00 cmp r3, #0 - 802f3c6: d10c bne.n 802f3e2 - 802f3c8: 4b77 ldr r3, [pc, #476] ; (802f5a8 ) - 802f3ca: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3cc: 4a76 ldr r2, [pc, #472] ; (802f5a8 ) - 802f3ce: f023 0301 bic.w r3, r3, #1 - 802f3d2: 6713 str r3, [r2, #112] ; 0x70 - 802f3d4: 4b74 ldr r3, [pc, #464] ; (802f5a8 ) - 802f3d6: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3d8: 4a73 ldr r2, [pc, #460] ; (802f5a8 ) - 802f3da: f023 0304 bic.w r3, r3, #4 - 802f3de: 6713 str r3, [r2, #112] ; 0x70 - 802f3e0: e01c b.n 802f41c - 802f3e2: 687b ldr r3, [r7, #4] - 802f3e4: 689b ldr r3, [r3, #8] - 802f3e6: 2b05 cmp r3, #5 - 802f3e8: d10c bne.n 802f404 - 802f3ea: 4b6f ldr r3, [pc, #444] ; (802f5a8 ) - 802f3ec: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3ee: 4a6e ldr r2, [pc, #440] ; (802f5a8 ) - 802f3f0: f043 0304 orr.w r3, r3, #4 - 802f3f4: 6713 str r3, [r2, #112] ; 0x70 - 802f3f6: 4b6c ldr r3, [pc, #432] ; (802f5a8 ) - 802f3f8: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f3fa: 4a6b ldr r2, [pc, #428] ; (802f5a8 ) - 802f3fc: f043 0301 orr.w r3, r3, #1 - 802f400: 6713 str r3, [r2, #112] ; 0x70 - 802f402: e00b b.n 802f41c - 802f404: 4b68 ldr r3, [pc, #416] ; (802f5a8 ) - 802f406: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f408: 4a67 ldr r2, [pc, #412] ; (802f5a8 ) - 802f40a: f023 0301 bic.w r3, r3, #1 - 802f40e: 6713 str r3, [r2, #112] ; 0x70 - 802f410: 4b65 ldr r3, [pc, #404] ; (802f5a8 ) - 802f412: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f414: 4a64 ldr r2, [pc, #400] ; (802f5a8 ) - 802f416: f023 0304 bic.w r3, r3, #4 - 802f41a: 6713 str r3, [r2, #112] ; 0x70 + 802f42e: 687b ldr r3, [r7, #4] + 802f430: 689b ldr r3, [r3, #8] + 802f432: 2b01 cmp r3, #1 + 802f434: d106 bne.n 802f444 + 802f436: 4b7d ldr r3, [pc, #500] ; (802f62c ) + 802f438: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f43a: 4a7c ldr r2, [pc, #496] ; (802f62c ) + 802f43c: f043 0301 orr.w r3, r3, #1 + 802f440: 6713 str r3, [r2, #112] ; 0x70 + 802f442: e02d b.n 802f4a0 + 802f444: 687b ldr r3, [r7, #4] + 802f446: 689b ldr r3, [r3, #8] + 802f448: 2b00 cmp r3, #0 + 802f44a: d10c bne.n 802f466 + 802f44c: 4b77 ldr r3, [pc, #476] ; (802f62c ) + 802f44e: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f450: 4a76 ldr r2, [pc, #472] ; (802f62c ) + 802f452: f023 0301 bic.w r3, r3, #1 + 802f456: 6713 str r3, [r2, #112] ; 0x70 + 802f458: 4b74 ldr r3, [pc, #464] ; (802f62c ) + 802f45a: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f45c: 4a73 ldr r2, [pc, #460] ; (802f62c ) + 802f45e: f023 0304 bic.w r3, r3, #4 + 802f462: 6713 str r3, [r2, #112] ; 0x70 + 802f464: e01c b.n 802f4a0 + 802f466: 687b ldr r3, [r7, #4] + 802f468: 689b ldr r3, [r3, #8] + 802f46a: 2b05 cmp r3, #5 + 802f46c: d10c bne.n 802f488 + 802f46e: 4b6f ldr r3, [pc, #444] ; (802f62c ) + 802f470: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f472: 4a6e ldr r2, [pc, #440] ; (802f62c ) + 802f474: f043 0304 orr.w r3, r3, #4 + 802f478: 6713 str r3, [r2, #112] ; 0x70 + 802f47a: 4b6c ldr r3, [pc, #432] ; (802f62c ) + 802f47c: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f47e: 4a6b ldr r2, [pc, #428] ; (802f62c ) + 802f480: f043 0301 orr.w r3, r3, #1 + 802f484: 6713 str r3, [r2, #112] ; 0x70 + 802f486: e00b b.n 802f4a0 + 802f488: 4b68 ldr r3, [pc, #416] ; (802f62c ) + 802f48a: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f48c: 4a67 ldr r2, [pc, #412] ; (802f62c ) + 802f48e: f023 0301 bic.w r3, r3, #1 + 802f492: 6713 str r3, [r2, #112] ; 0x70 + 802f494: 4b65 ldr r3, [pc, #404] ; (802f62c ) + 802f496: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f498: 4a64 ldr r2, [pc, #400] ; (802f62c ) + 802f49a: f023 0304 bic.w r3, r3, #4 + 802f49e: 6713 str r3, [r2, #112] ; 0x70 /* Check the LSE State */ if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) - 802f41c: 687b ldr r3, [r7, #4] - 802f41e: 689b ldr r3, [r3, #8] - 802f420: 2b00 cmp r3, #0 - 802f422: d015 beq.n 802f450 + 802f4a0: 687b ldr r3, [r7, #4] + 802f4a2: 689b ldr r3, [r3, #8] + 802f4a4: 2b00 cmp r3, #0 + 802f4a6: d015 beq.n 802f4d4 { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f424: f7f6 fdce bl 8025fc4 - 802f428: 6278 str r0, [r7, #36] ; 0x24 + 802f4a8: f7f6 fdce bl 8026048 + 802f4ac: 6278 str r0, [r7, #36] ; 0x24 /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 802f42a: e00a b.n 802f442 + 802f4ae: e00a b.n 802f4c6 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 802f42c: f7f6 fdca bl 8025fc4 - 802f430: 4602 mov r2, r0 - 802f432: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f434: 1ad3 subs r3, r2, r3 - 802f436: f241 3288 movw r2, #5000 ; 0x1388 - 802f43a: 4293 cmp r3, r2 - 802f43c: d901 bls.n 802f442 + 802f4b0: f7f6 fdca bl 8026048 + 802f4b4: 4602 mov r2, r0 + 802f4b6: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f4b8: 1ad3 subs r3, r2, r3 + 802f4ba: f241 3288 movw r2, #5000 ; 0x1388 + 802f4be: 4293 cmp r3, r2 + 802f4c0: d901 bls.n 802f4c6 { return HAL_TIMEOUT; - 802f43e: 2303 movs r3, #3 - 802f440: e123 b.n 802f68a + 802f4c2: 2303 movs r3, #3 + 802f4c4: e123 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 802f442: 4b59 ldr r3, [pc, #356] ; (802f5a8 ) - 802f444: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f446: f003 0302 and.w r3, r3, #2 - 802f44a: 2b00 cmp r3, #0 - 802f44c: d0ee beq.n 802f42c - 802f44e: e014 b.n 802f47a + 802f4c6: 4b59 ldr r3, [pc, #356] ; (802f62c ) + 802f4c8: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f4ca: f003 0302 and.w r3, r3, #2 + 802f4ce: 2b00 cmp r3, #0 + 802f4d0: d0ee beq.n 802f4b0 + 802f4d2: e014 b.n 802f4fe } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f450: f7f6 fdb8 bl 8025fc4 - 802f454: 6278 str r0, [r7, #36] ; 0x24 + 802f4d4: f7f6 fdb8 bl 8026048 + 802f4d8: 6278 str r0, [r7, #36] ; 0x24 /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 802f456: e00a b.n 802f46e + 802f4da: e00a b.n 802f4f2 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 802f458: f7f6 fdb4 bl 8025fc4 - 802f45c: 4602 mov r2, r0 - 802f45e: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f460: 1ad3 subs r3, r2, r3 - 802f462: f241 3288 movw r2, #5000 ; 0x1388 - 802f466: 4293 cmp r3, r2 - 802f468: d901 bls.n 802f46e + 802f4dc: f7f6 fdb4 bl 8026048 + 802f4e0: 4602 mov r2, r0 + 802f4e2: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f4e4: 1ad3 subs r3, r2, r3 + 802f4e6: f241 3288 movw r2, #5000 ; 0x1388 + 802f4ea: 4293 cmp r3, r2 + 802f4ec: d901 bls.n 802f4f2 { return HAL_TIMEOUT; - 802f46a: 2303 movs r3, #3 - 802f46c: e10d b.n 802f68a + 802f4ee: 2303 movs r3, #3 + 802f4f0: e10d b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 802f46e: 4b4e ldr r3, [pc, #312] ; (802f5a8 ) - 802f470: 6f1b ldr r3, [r3, #112] ; 0x70 - 802f472: f003 0302 and.w r3, r3, #2 - 802f476: 2b00 cmp r3, #0 - 802f478: d1ee bne.n 802f458 + 802f4f2: 4b4e ldr r3, [pc, #312] ; (802f62c ) + 802f4f4: 6f1b ldr r3, [r3, #112] ; 0x70 + 802f4f6: f003 0302 and.w r3, r3, #2 + 802f4fa: 2b00 cmp r3, #0 + 802f4fc: d1ee bne.n 802f4dc } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 802f47a: 687b ldr r3, [r7, #4] - 802f47c: 6a5b ldr r3, [r3, #36] ; 0x24 - 802f47e: 2b00 cmp r3, #0 - 802f480: f000 8102 beq.w 802f688 + 802f4fe: 687b ldr r3, [r7, #4] + 802f500: 6a5b ldr r3, [r3, #36] ; 0x24 + 802f502: 2b00 cmp r3, #0 + 802f504: f000 8102 beq.w 802f70c { /* Check if the PLL is used as system clock or not */ if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1) - 802f484: 4b48 ldr r3, [pc, #288] ; (802f5a8 ) - 802f486: 691b ldr r3, [r3, #16] - 802f488: f003 0338 and.w r3, r3, #56 ; 0x38 - 802f48c: 2b18 cmp r3, #24 - 802f48e: f000 80bd beq.w 802f60c + 802f508: 4b48 ldr r3, [pc, #288] ; (802f62c ) + 802f50a: 691b ldr r3, [r3, #16] + 802f50c: f003 0338 and.w r3, r3, #56 ; 0x38 + 802f510: 2b18 cmp r3, #24 + 802f512: f000 80bd beq.w 802f690 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 802f492: 687b ldr r3, [r7, #4] - 802f494: 6a5b ldr r3, [r3, #36] ; 0x24 - 802f496: 2b02 cmp r3, #2 - 802f498: f040 809e bne.w 802f5d8 + 802f516: 687b ldr r3, [r7, #4] + 802f518: 6a5b ldr r3, [r3, #36] ; 0x24 + 802f51a: 2b02 cmp r3, #2 + 802f51c: f040 809e bne.w 802f65c assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 802f49c: 4b42 ldr r3, [pc, #264] ; (802f5a8 ) - 802f49e: 681b ldr r3, [r3, #0] - 802f4a0: 4a41 ldr r2, [pc, #260] ; (802f5a8 ) - 802f4a2: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 802f4a6: 6013 str r3, [r2, #0] + 802f520: 4b42 ldr r3, [pc, #264] ; (802f62c ) + 802f522: 681b ldr r3, [r3, #0] + 802f524: 4a41 ldr r2, [pc, #260] ; (802f62c ) + 802f526: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 + 802f52a: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f4a8: f7f6 fd8c bl 8025fc4 - 802f4ac: 6278 str r0, [r7, #36] ; 0x24 + 802f52c: f7f6 fd8c bl 8026048 + 802f530: 6278 str r0, [r7, #36] ; 0x24 /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 802f4ae: e008 b.n 802f4c2 + 802f532: e008 b.n 802f546 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 802f4b0: f7f6 fd88 bl 8025fc4 - 802f4b4: 4602 mov r2, r0 - 802f4b6: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f4b8: 1ad3 subs r3, r2, r3 - 802f4ba: 2b02 cmp r3, #2 - 802f4bc: d901 bls.n 802f4c2 + 802f534: f7f6 fd88 bl 8026048 + 802f538: 4602 mov r2, r0 + 802f53a: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f53c: 1ad3 subs r3, r2, r3 + 802f53e: 2b02 cmp r3, #2 + 802f540: d901 bls.n 802f546 { return HAL_TIMEOUT; - 802f4be: 2303 movs r3, #3 - 802f4c0: e0e3 b.n 802f68a + 802f542: 2303 movs r3, #3 + 802f544: e0e3 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 802f4c2: 4b39 ldr r3, [pc, #228] ; (802f5a8 ) - 802f4c4: 681b ldr r3, [r3, #0] - 802f4c6: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802f4ca: 2b00 cmp r3, #0 - 802f4cc: d1f0 bne.n 802f4b0 + 802f546: 4b39 ldr r3, [pc, #228] ; (802f62c ) + 802f548: 681b ldr r3, [r3, #0] + 802f54a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 802f54e: 2b00 cmp r3, #0 + 802f550: d1f0 bne.n 802f534 } } /* Configure the main PLL clock source, multiplication and division factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 802f4ce: 4b36 ldr r3, [pc, #216] ; (802f5a8 ) - 802f4d0: 6a9a ldr r2, [r3, #40] ; 0x28 - 802f4d2: 4b37 ldr r3, [pc, #220] ; (802f5b0 ) - 802f4d4: 4013 ands r3, r2 - 802f4d6: 687a ldr r2, [r7, #4] - 802f4d8: 6a91 ldr r1, [r2, #40] ; 0x28 - 802f4da: 687a ldr r2, [r7, #4] - 802f4dc: 6ad2 ldr r2, [r2, #44] ; 0x2c - 802f4de: 0112 lsls r2, r2, #4 - 802f4e0: 430a orrs r2, r1 - 802f4e2: 4931 ldr r1, [pc, #196] ; (802f5a8 ) - 802f4e4: 4313 orrs r3, r2 - 802f4e6: 628b str r3, [r1, #40] ; 0x28 - 802f4e8: 687b ldr r3, [r7, #4] - 802f4ea: 6b1b ldr r3, [r3, #48] ; 0x30 - 802f4ec: 3b01 subs r3, #1 - 802f4ee: f3c3 0208 ubfx r2, r3, #0, #9 - 802f4f2: 687b ldr r3, [r7, #4] - 802f4f4: 6b5b ldr r3, [r3, #52] ; 0x34 - 802f4f6: 3b01 subs r3, #1 - 802f4f8: 025b lsls r3, r3, #9 - 802f4fa: b29b uxth r3, r3 - 802f4fc: 431a orrs r2, r3 - 802f4fe: 687b ldr r3, [r7, #4] - 802f500: 6b9b ldr r3, [r3, #56] ; 0x38 - 802f502: 3b01 subs r3, #1 - 802f504: 041b lsls r3, r3, #16 - 802f506: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 802f50a: 431a orrs r2, r3 - 802f50c: 687b ldr r3, [r7, #4] - 802f50e: 6bdb ldr r3, [r3, #60] ; 0x3c - 802f510: 3b01 subs r3, #1 - 802f512: 061b lsls r3, r3, #24 - 802f514: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 - 802f518: 4923 ldr r1, [pc, #140] ; (802f5a8 ) - 802f51a: 4313 orrs r3, r2 - 802f51c: 630b str r3, [r1, #48] ; 0x30 + 802f552: 4b36 ldr r3, [pc, #216] ; (802f62c ) + 802f554: 6a9a ldr r2, [r3, #40] ; 0x28 + 802f556: 4b37 ldr r3, [pc, #220] ; (802f634 ) + 802f558: 4013 ands r3, r2 + 802f55a: 687a ldr r2, [r7, #4] + 802f55c: 6a91 ldr r1, [r2, #40] ; 0x28 + 802f55e: 687a ldr r2, [r7, #4] + 802f560: 6ad2 ldr r2, [r2, #44] ; 0x2c + 802f562: 0112 lsls r2, r2, #4 + 802f564: 430a orrs r2, r1 + 802f566: 4931 ldr r1, [pc, #196] ; (802f62c ) + 802f568: 4313 orrs r3, r2 + 802f56a: 628b str r3, [r1, #40] ; 0x28 + 802f56c: 687b ldr r3, [r7, #4] + 802f56e: 6b1b ldr r3, [r3, #48] ; 0x30 + 802f570: 3b01 subs r3, #1 + 802f572: f3c3 0208 ubfx r2, r3, #0, #9 + 802f576: 687b ldr r3, [r7, #4] + 802f578: 6b5b ldr r3, [r3, #52] ; 0x34 + 802f57a: 3b01 subs r3, #1 + 802f57c: 025b lsls r3, r3, #9 + 802f57e: b29b uxth r3, r3 + 802f580: 431a orrs r2, r3 + 802f582: 687b ldr r3, [r7, #4] + 802f584: 6b9b ldr r3, [r3, #56] ; 0x38 + 802f586: 3b01 subs r3, #1 + 802f588: 041b lsls r3, r3, #16 + 802f58a: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 802f58e: 431a orrs r2, r3 + 802f590: 687b ldr r3, [r7, #4] + 802f592: 6bdb ldr r3, [r3, #60] ; 0x3c + 802f594: 3b01 subs r3, #1 + 802f596: 061b lsls r3, r3, #24 + 802f598: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 + 802f59c: 4923 ldr r1, [pc, #140] ; (802f62c ) + 802f59e: 4313 orrs r3, r2 + 802f5a0: 630b str r3, [r1, #48] ; 0x30 RCC_OscInitStruct->PLL.PLLP, RCC_OscInitStruct->PLL.PLLQ, RCC_OscInitStruct->PLL.PLLR); /* Disable PLLFRACN . */ __HAL_RCC_PLLFRACN_DISABLE(); - 802f51e: 4b22 ldr r3, [pc, #136] ; (802f5a8 ) - 802f520: 6adb ldr r3, [r3, #44] ; 0x2c - 802f522: 4a21 ldr r2, [pc, #132] ; (802f5a8 ) - 802f524: f023 0301 bic.w r3, r3, #1 - 802f528: 62d3 str r3, [r2, #44] ; 0x2c + 802f5a2: 4b22 ldr r3, [pc, #136] ; (802f62c ) + 802f5a4: 6adb ldr r3, [r3, #44] ; 0x2c + 802f5a6: 4a21 ldr r2, [pc, #132] ; (802f62c ) + 802f5a8: f023 0301 bic.w r3, r3, #1 + 802f5ac: 62d3 str r3, [r2, #44] ; 0x2c /* Configure PLL PLL1FRACN */ __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN); - 802f52a: 4b1f ldr r3, [pc, #124] ; (802f5a8 ) - 802f52c: 6b5a ldr r2, [r3, #52] ; 0x34 - 802f52e: 4b21 ldr r3, [pc, #132] ; (802f5b4 ) - 802f530: 4013 ands r3, r2 - 802f532: 687a ldr r2, [r7, #4] - 802f534: 6c92 ldr r2, [r2, #72] ; 0x48 - 802f536: 00d2 lsls r2, r2, #3 - 802f538: 491b ldr r1, [pc, #108] ; (802f5a8 ) - 802f53a: 4313 orrs r3, r2 - 802f53c: 634b str r3, [r1, #52] ; 0x34 + 802f5ae: 4b1f ldr r3, [pc, #124] ; (802f62c ) + 802f5b0: 6b5a ldr r2, [r3, #52] ; 0x34 + 802f5b2: 4b21 ldr r3, [pc, #132] ; (802f638 ) + 802f5b4: 4013 ands r3, r2 + 802f5b6: 687a ldr r2, [r7, #4] + 802f5b8: 6c92 ldr r2, [r2, #72] ; 0x48 + 802f5ba: 00d2 lsls r2, r2, #3 + 802f5bc: 491b ldr r1, [pc, #108] ; (802f62c ) + 802f5be: 4313 orrs r3, r2 + 802f5c0: 634b str r3, [r1, #52] ; 0x34 /* Select PLL1 input reference frequency range: VCI */ __HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ; - 802f53e: 4b1a ldr r3, [pc, #104] ; (802f5a8 ) - 802f540: 6adb ldr r3, [r3, #44] ; 0x2c - 802f542: f023 020c bic.w r2, r3, #12 - 802f546: 687b ldr r3, [r7, #4] - 802f548: 6c1b ldr r3, [r3, #64] ; 0x40 - 802f54a: 4917 ldr r1, [pc, #92] ; (802f5a8 ) - 802f54c: 4313 orrs r3, r2 - 802f54e: 62cb str r3, [r1, #44] ; 0x2c + 802f5c2: 4b1a ldr r3, [pc, #104] ; (802f62c ) + 802f5c4: 6adb ldr r3, [r3, #44] ; 0x2c + 802f5c6: f023 020c bic.w r2, r3, #12 + 802f5ca: 687b ldr r3, [r7, #4] + 802f5cc: 6c1b ldr r3, [r3, #64] ; 0x40 + 802f5ce: 4917 ldr r1, [pc, #92] ; (802f62c ) + 802f5d0: 4313 orrs r3, r2 + 802f5d2: 62cb str r3, [r1, #44] ; 0x2c /* Select PLL1 output frequency range : VCO */ __HAL_RCC_PLL_VCORANGE(RCC_OscInitStruct->PLL.PLLVCOSEL) ; - 802f550: 4b15 ldr r3, [pc, #84] ; (802f5a8 ) - 802f552: 6adb ldr r3, [r3, #44] ; 0x2c - 802f554: f023 0202 bic.w r2, r3, #2 - 802f558: 687b ldr r3, [r7, #4] - 802f55a: 6c5b ldr r3, [r3, #68] ; 0x44 - 802f55c: 4912 ldr r1, [pc, #72] ; (802f5a8 ) - 802f55e: 4313 orrs r3, r2 - 802f560: 62cb str r3, [r1, #44] ; 0x2c + 802f5d4: 4b15 ldr r3, [pc, #84] ; (802f62c ) + 802f5d6: 6adb ldr r3, [r3, #44] ; 0x2c + 802f5d8: f023 0202 bic.w r2, r3, #2 + 802f5dc: 687b ldr r3, [r7, #4] + 802f5de: 6c5b ldr r3, [r3, #68] ; 0x44 + 802f5e0: 4912 ldr r1, [pc, #72] ; (802f62c ) + 802f5e2: 4313 orrs r3, r2 + 802f5e4: 62cb str r3, [r1, #44] ; 0x2c /* Enable PLL System Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP); - 802f562: 4b11 ldr r3, [pc, #68] ; (802f5a8 ) - 802f564: 6adb ldr r3, [r3, #44] ; 0x2c - 802f566: 4a10 ldr r2, [pc, #64] ; (802f5a8 ) - 802f568: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 802f56c: 62d3 str r3, [r2, #44] ; 0x2c + 802f5e6: 4b11 ldr r3, [pc, #68] ; (802f62c ) + 802f5e8: 6adb ldr r3, [r3, #44] ; 0x2c + 802f5ea: 4a10 ldr r2, [pc, #64] ; (802f62c ) + 802f5ec: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 802f5f0: 62d3 str r3, [r2, #44] ; 0x2c /* Enable PLL1Q Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802f56e: 4b0e ldr r3, [pc, #56] ; (802f5a8 ) - 802f570: 6adb ldr r3, [r3, #44] ; 0x2c - 802f572: 4a0d ldr r2, [pc, #52] ; (802f5a8 ) - 802f574: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802f578: 62d3 str r3, [r2, #44] ; 0x2c + 802f5f2: 4b0e ldr r3, [pc, #56] ; (802f62c ) + 802f5f4: 6adb ldr r3, [r3, #44] ; 0x2c + 802f5f6: 4a0d ldr r2, [pc, #52] ; (802f62c ) + 802f5f8: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802f5fc: 62d3 str r3, [r2, #44] ; 0x2c /* Enable PLL1R Clock output. */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVR); - 802f57a: 4b0b ldr r3, [pc, #44] ; (802f5a8 ) - 802f57c: 6adb ldr r3, [r3, #44] ; 0x2c - 802f57e: 4a0a ldr r2, [pc, #40] ; (802f5a8 ) - 802f580: f443 2380 orr.w r3, r3, #262144 ; 0x40000 - 802f584: 62d3 str r3, [r2, #44] ; 0x2c + 802f5fe: 4b0b ldr r3, [pc, #44] ; (802f62c ) + 802f600: 6adb ldr r3, [r3, #44] ; 0x2c + 802f602: 4a0a ldr r2, [pc, #40] ; (802f62c ) + 802f604: f443 2380 orr.w r3, r3, #262144 ; 0x40000 + 802f608: 62d3 str r3, [r2, #44] ; 0x2c /* Enable PLL1FRACN . */ __HAL_RCC_PLLFRACN_ENABLE(); - 802f586: 4b08 ldr r3, [pc, #32] ; (802f5a8 ) - 802f588: 6adb ldr r3, [r3, #44] ; 0x2c - 802f58a: 4a07 ldr r2, [pc, #28] ; (802f5a8 ) - 802f58c: f043 0301 orr.w r3, r3, #1 - 802f590: 62d3 str r3, [r2, #44] ; 0x2c + 802f60a: 4b08 ldr r3, [pc, #32] ; (802f62c ) + 802f60c: 6adb ldr r3, [r3, #44] ; 0x2c + 802f60e: 4a07 ldr r2, [pc, #28] ; (802f62c ) + 802f610: f043 0301 orr.w r3, r3, #1 + 802f614: 62d3 str r3, [r2, #44] ; 0x2c /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 802f592: 4b05 ldr r3, [pc, #20] ; (802f5a8 ) - 802f594: 681b ldr r3, [r3, #0] - 802f596: 4a04 ldr r2, [pc, #16] ; (802f5a8 ) - 802f598: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 802f59c: 6013 str r3, [r2, #0] + 802f616: 4b05 ldr r3, [pc, #20] ; (802f62c ) + 802f618: 681b ldr r3, [r3, #0] + 802f61a: 4a04 ldr r2, [pc, #16] ; (802f62c ) + 802f61c: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 802f620: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f59e: f7f6 fd11 bl 8025fc4 - 802f5a2: 6278 str r0, [r7, #36] ; 0x24 + 802f622: f7f6 fd11 bl 8026048 + 802f626: 6278 str r0, [r7, #36] ; 0x24 /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 802f5a4: e011 b.n 802f5ca - 802f5a6: bf00 nop - 802f5a8: 58024400 .word 0x58024400 - 802f5ac: 58024800 .word 0x58024800 - 802f5b0: fffffc0c .word 0xfffffc0c - 802f5b4: ffff0007 .word 0xffff0007 + 802f628: e011 b.n 802f64e + 802f62a: bf00 nop + 802f62c: 58024400 .word 0x58024400 + 802f630: 58024800 .word 0x58024800 + 802f634: fffffc0c .word 0xfffffc0c + 802f638: ffff0007 .word 0xffff0007 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 802f5b8: f7f6 fd04 bl 8025fc4 - 802f5bc: 4602 mov r2, r0 - 802f5be: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f5c0: 1ad3 subs r3, r2, r3 - 802f5c2: 2b02 cmp r3, #2 - 802f5c4: d901 bls.n 802f5ca + 802f63c: f7f6 fd04 bl 8026048 + 802f640: 4602 mov r2, r0 + 802f642: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f644: 1ad3 subs r3, r2, r3 + 802f646: 2b02 cmp r3, #2 + 802f648: d901 bls.n 802f64e { return HAL_TIMEOUT; - 802f5c6: 2303 movs r3, #3 - 802f5c8: e05f b.n 802f68a + 802f64a: 2303 movs r3, #3 + 802f64c: e05f b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 802f5ca: 4b32 ldr r3, [pc, #200] ; (802f694 ) - 802f5cc: 681b ldr r3, [r3, #0] - 802f5ce: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802f5d2: 2b00 cmp r3, #0 - 802f5d4: d0f0 beq.n 802f5b8 - 802f5d6: e057 b.n 802f688 + 802f64e: 4b32 ldr r3, [pc, #200] ; (802f718 ) + 802f650: 681b ldr r3, [r3, #0] + 802f652: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 802f656: 2b00 cmp r3, #0 + 802f658: d0f0 beq.n 802f63c + 802f65a: e057 b.n 802f70c } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 802f5d8: 4b2e ldr r3, [pc, #184] ; (802f694 ) - 802f5da: 681b ldr r3, [r3, #0] - 802f5dc: 4a2d ldr r2, [pc, #180] ; (802f694 ) - 802f5de: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 - 802f5e2: 6013 str r3, [r2, #0] + 802f65c: 4b2e ldr r3, [pc, #184] ; (802f718 ) + 802f65e: 681b ldr r3, [r3, #0] + 802f660: 4a2d ldr r2, [pc, #180] ; (802f718 ) + 802f662: f023 7380 bic.w r3, r3, #16777216 ; 0x1000000 + 802f666: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f5e4: f7f6 fcee bl 8025fc4 - 802f5e8: 6278 str r0, [r7, #36] ; 0x24 + 802f668: f7f6 fcee bl 8026048 + 802f66c: 6278 str r0, [r7, #36] ; 0x24 /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 802f5ea: e008 b.n 802f5fe + 802f66e: e008 b.n 802f682 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 802f5ec: f7f6 fcea bl 8025fc4 - 802f5f0: 4602 mov r2, r0 - 802f5f2: 6a7b ldr r3, [r7, #36] ; 0x24 - 802f5f4: 1ad3 subs r3, r2, r3 - 802f5f6: 2b02 cmp r3, #2 - 802f5f8: d901 bls.n 802f5fe + 802f670: f7f6 fcea bl 8026048 + 802f674: 4602 mov r2, r0 + 802f676: 6a7b ldr r3, [r7, #36] ; 0x24 + 802f678: 1ad3 subs r3, r2, r3 + 802f67a: 2b02 cmp r3, #2 + 802f67c: d901 bls.n 802f682 { return HAL_TIMEOUT; - 802f5fa: 2303 movs r3, #3 - 802f5fc: e045 b.n 802f68a + 802f67e: 2303 movs r3, #3 + 802f680: e045 b.n 802f70e while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 802f5fe: 4b25 ldr r3, [pc, #148] ; (802f694 ) - 802f600: 681b ldr r3, [r3, #0] - 802f602: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802f606: 2b00 cmp r3, #0 - 802f608: d1f0 bne.n 802f5ec - 802f60a: e03d b.n 802f688 + 802f682: 4b25 ldr r3, [pc, #148] ; (802f718 ) + 802f684: 681b ldr r3, [r3, #0] + 802f686: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 802f68a: 2b00 cmp r3, #0 + 802f68c: d1f0 bne.n 802f670 + 802f68e: e03d b.n 802f70c } } else { /* Do not return HAL_ERROR if request repeats the current configuration */ temp1_pllckcfg = RCC->PLLCKSELR; - 802f60c: 4b21 ldr r3, [pc, #132] ; (802f694 ) - 802f60e: 6a9b ldr r3, [r3, #40] ; 0x28 - 802f610: 613b str r3, [r7, #16] + 802f690: 4b21 ldr r3, [pc, #132] ; (802f718 ) + 802f692: 6a9b ldr r3, [r3, #40] ; 0x28 + 802f694: 613b str r3, [r7, #16] temp2_pllckcfg = RCC->PLL1DIVR; - 802f612: 4b20 ldr r3, [pc, #128] ; (802f694 ) - 802f614: 6b1b ldr r3, [r3, #48] ; 0x30 - 802f616: 60fb str r3, [r7, #12] + 802f696: 4b20 ldr r3, [pc, #128] ; (802f718 ) + 802f698: 6b1b ldr r3, [r3, #48] ; 0x30 + 802f69a: 60fb str r3, [r7, #12] if(((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 802f618: 687b ldr r3, [r7, #4] - 802f61a: 6a5b ldr r3, [r3, #36] ; 0x24 - 802f61c: 2b01 cmp r3, #1 - 802f61e: d031 beq.n 802f684 + 802f69c: 687b ldr r3, [r7, #4] + 802f69e: 6a5b ldr r3, [r3, #36] ; 0x24 + 802f6a0: 2b01 cmp r3, #1 + 802f6a2: d031 beq.n 802f708 (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 802f620: 693b ldr r3, [r7, #16] - 802f622: f003 0203 and.w r2, r3, #3 - 802f626: 687b ldr r3, [r7, #4] - 802f628: 6a9b ldr r3, [r3, #40] ; 0x28 + 802f6a4: 693b ldr r3, [r7, #16] + 802f6a6: f003 0203 and.w r2, r3, #3 + 802f6aa: 687b ldr r3, [r7, #4] + 802f6ac: 6a9b ldr r3, [r3, #40] ; 0x28 if(((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || - 802f62a: 429a cmp r2, r3 - 802f62c: d12a bne.n 802f684 + 802f6ae: 429a cmp r2, r3 + 802f6b0: d12a bne.n 802f708 ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) || - 802f62e: 693b ldr r3, [r7, #16] - 802f630: 091b lsrs r3, r3, #4 - 802f632: f003 023f and.w r2, r3, #63 ; 0x3f - 802f636: 687b ldr r3, [r7, #4] - 802f638: 6adb ldr r3, [r3, #44] ; 0x2c + 802f6b2: 693b ldr r3, [r7, #16] + 802f6b4: 091b lsrs r3, r3, #4 + 802f6b6: f003 023f and.w r2, r3, #63 ; 0x3f + 802f6ba: 687b ldr r3, [r7, #4] + 802f6bc: 6adb ldr r3, [r3, #44] ; 0x2c (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 802f63a: 429a cmp r2, r3 - 802f63c: d122 bne.n 802f684 + 802f6be: 429a cmp r2, r3 + 802f6c0: d122 bne.n 802f708 (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) || - 802f63e: 68fb ldr r3, [r7, #12] - 802f640: f3c3 0208 ubfx r2, r3, #0, #9 - 802f644: 687b ldr r3, [r7, #4] - 802f646: 6b1b ldr r3, [r3, #48] ; 0x30 - 802f648: 3b01 subs r3, #1 + 802f6c2: 68fb ldr r3, [r7, #12] + 802f6c4: f3c3 0208 ubfx r2, r3, #0, #9 + 802f6c8: 687b ldr r3, [r7, #4] + 802f6ca: 6b1b ldr r3, [r3, #48] ; 0x30 + 802f6cc: 3b01 subs r3, #1 ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) || - 802f64a: 429a cmp r2, r3 - 802f64c: d11a bne.n 802f684 + 802f6ce: 429a cmp r2, r3 + 802f6d0: d11a bne.n 802f708 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) || - 802f64e: 68fb ldr r3, [r7, #12] - 802f650: 0a5b lsrs r3, r3, #9 - 802f652: f003 027f and.w r2, r3, #127 ; 0x7f - 802f656: 687b ldr r3, [r7, #4] - 802f658: 6b5b ldr r3, [r3, #52] ; 0x34 - 802f65a: 3b01 subs r3, #1 + 802f6d2: 68fb ldr r3, [r7, #12] + 802f6d4: 0a5b lsrs r3, r3, #9 + 802f6d6: f003 027f and.w r2, r3, #127 ; 0x7f + 802f6da: 687b ldr r3, [r7, #4] + 802f6dc: 6b5b ldr r3, [r3, #52] ; 0x34 + 802f6de: 3b01 subs r3, #1 (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) || - 802f65c: 429a cmp r2, r3 - 802f65e: d111 bne.n 802f684 + 802f6e0: 429a cmp r2, r3 + 802f6e2: d111 bne.n 802f708 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) || - 802f660: 68fb ldr r3, [r7, #12] - 802f662: 0c1b lsrs r3, r3, #16 - 802f664: f003 027f and.w r2, r3, #127 ; 0x7f - 802f668: 687b ldr r3, [r7, #4] - 802f66a: 6b9b ldr r3, [r3, #56] ; 0x38 - 802f66c: 3b01 subs r3, #1 + 802f6e4: 68fb ldr r3, [r7, #12] + 802f6e6: 0c1b lsrs r3, r3, #16 + 802f6e8: f003 027f and.w r2, r3, #127 ; 0x7f + 802f6ec: 687b ldr r3, [r7, #4] + 802f6ee: 6b9b ldr r3, [r3, #56] ; 0x38 + 802f6f0: 3b01 subs r3, #1 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) || - 802f66e: 429a cmp r2, r3 - 802f670: d108 bne.n 802f684 + 802f6f2: 429a cmp r2, r3 + 802f6f4: d108 bne.n 802f708 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_R1) >> RCC_PLL1DIVR_R1_Pos) != (RCC_OscInitStruct->PLL.PLLR - 1U))) - 802f672: 68fb ldr r3, [r7, #12] - 802f674: 0e1b lsrs r3, r3, #24 - 802f676: f003 027f and.w r2, r3, #127 ; 0x7f - 802f67a: 687b ldr r3, [r7, #4] - 802f67c: 6bdb ldr r3, [r3, #60] ; 0x3c - 802f67e: 3b01 subs r3, #1 + 802f6f6: 68fb ldr r3, [r7, #12] + 802f6f8: 0e1b lsrs r3, r3, #24 + 802f6fa: f003 027f and.w r2, r3, #127 ; 0x7f + 802f6fe: 687b ldr r3, [r7, #4] + 802f700: 6bdb ldr r3, [r3, #60] ; 0x3c + 802f702: 3b01 subs r3, #1 ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) || - 802f680: 429a cmp r2, r3 - 802f682: d001 beq.n 802f688 + 802f704: 429a cmp r2, r3 + 802f706: d001 beq.n 802f70c { return HAL_ERROR; - 802f684: 2301 movs r3, #1 - 802f686: e000 b.n 802f68a + 802f708: 2301 movs r3, #1 + 802f70a: e000 b.n 802f70e } } } return HAL_OK; - 802f688: 2300 movs r3, #0 + 802f70c: 2300 movs r3, #0 } - 802f68a: 4618 mov r0, r3 - 802f68c: 3730 adds r7, #48 ; 0x30 - 802f68e: 46bd mov sp, r7 - 802f690: bd80 pop {r7, pc} - 802f692: bf00 nop - 802f694: 58024400 .word 0x58024400 + 802f70e: 4618 mov r0, r3 + 802f710: 3730 adds r7, #48 ; 0x30 + 802f712: 46bd mov sp, r7 + 802f714: bd80 pop {r7, pc} + 802f716: bf00 nop + 802f718: 58024400 .word 0x58024400 -0802f698 : +0802f71c : * D1CPRE[3:0] bits to ensure that Domain1 core clock not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 802f698: b580 push {r7, lr} - 802f69a: b086 sub sp, #24 - 802f69c: af00 add r7, sp, #0 - 802f69e: 6078 str r0, [r7, #4] - 802f6a0: 6039 str r1, [r7, #0] + 802f71c: b580 push {r7, lr} + 802f71e: b086 sub sp, #24 + 802f720: af00 add r7, sp, #0 + 802f722: 6078 str r0, [r7, #4] + 802f724: 6039 str r1, [r7, #0] HAL_StatusTypeDef halstatus; uint32_t tickstart; uint32_t common_system_clock; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 802f6a2: 687b ldr r3, [r7, #4] - 802f6a4: 2b00 cmp r3, #0 - 802f6a6: d101 bne.n 802f6ac + 802f726: 687b ldr r3, [r7, #4] + 802f728: 2b00 cmp r3, #0 + 802f72a: d101 bne.n 802f730 { return HAL_ERROR; - 802f6a8: 2301 movs r3, #1 - 802f6aa: e19c b.n 802f9e6 + 802f72c: 2301 movs r3, #1 + 802f72e: e19c b.n 802fa6a /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 802f6ac: 4b8a ldr r3, [pc, #552] ; (802f8d8 ) - 802f6ae: 681b ldr r3, [r3, #0] - 802f6b0: f003 030f and.w r3, r3, #15 - 802f6b4: 683a ldr r2, [r7, #0] - 802f6b6: 429a cmp r2, r3 - 802f6b8: d910 bls.n 802f6dc + 802f730: 4b8a ldr r3, [pc, #552] ; (802f95c ) + 802f732: 681b ldr r3, [r3, #0] + 802f734: f003 030f and.w r3, r3, #15 + 802f738: 683a ldr r2, [r7, #0] + 802f73a: 429a cmp r2, r3 + 802f73c: d910 bls.n 802f760 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 802f6ba: 4b87 ldr r3, [pc, #540] ; (802f8d8 ) - 802f6bc: 681b ldr r3, [r3, #0] - 802f6be: f023 020f bic.w r2, r3, #15 - 802f6c2: 4985 ldr r1, [pc, #532] ; (802f8d8 ) - 802f6c4: 683b ldr r3, [r7, #0] - 802f6c6: 4313 orrs r3, r2 - 802f6c8: 600b str r3, [r1, #0] + 802f73e: 4b87 ldr r3, [pc, #540] ; (802f95c ) + 802f740: 681b ldr r3, [r3, #0] + 802f742: f023 020f bic.w r2, r3, #15 + 802f746: 4985 ldr r1, [pc, #532] ; (802f95c ) + 802f748: 683b ldr r3, [r7, #0] + 802f74a: 4313 orrs r3, r2 + 802f74c: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 802f6ca: 4b83 ldr r3, [pc, #524] ; (802f8d8 ) - 802f6cc: 681b ldr r3, [r3, #0] - 802f6ce: f003 030f and.w r3, r3, #15 - 802f6d2: 683a ldr r2, [r7, #0] - 802f6d4: 429a cmp r2, r3 - 802f6d6: d001 beq.n 802f6dc + 802f74e: 4b83 ldr r3, [pc, #524] ; (802f95c ) + 802f750: 681b ldr r3, [r3, #0] + 802f752: f003 030f and.w r3, r3, #15 + 802f756: 683a ldr r2, [r7, #0] + 802f758: 429a cmp r2, r3 + 802f75a: d001 beq.n 802f760 { return HAL_ERROR; - 802f6d8: 2301 movs r3, #1 - 802f6da: e184 b.n 802f9e6 + 802f75c: 2301 movs r3, #1 + 802f75e: e184 b.n 802fa6a } /* Increasing the BUS frequency divider */ /*-------------------------- D1PCLK1/CDPCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1) - 802f6dc: 687b ldr r3, [r7, #4] - 802f6de: 681b ldr r3, [r3, #0] - 802f6e0: f003 0304 and.w r3, r3, #4 - 802f6e4: 2b00 cmp r3, #0 - 802f6e6: d010 beq.n 802f70a + 802f760: 687b ldr r3, [r7, #4] + 802f762: 681b ldr r3, [r3, #0] + 802f764: f003 0304 and.w r3, r3, #4 + 802f768: 2b00 cmp r3, #0 + 802f76a: d010 beq.n 802f78e { #if defined (RCC_D1CFGR_D1PPRE) if((RCC_ClkInitStruct->APB3CLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_D1PPRE)) - 802f6e8: 687b ldr r3, [r7, #4] - 802f6ea: 691a ldr r2, [r3, #16] - 802f6ec: 4b7b ldr r3, [pc, #492] ; (802f8dc ) - 802f6ee: 699b ldr r3, [r3, #24] - 802f6f0: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f6f4: 429a cmp r2, r3 - 802f6f6: d908 bls.n 802f70a + 802f76c: 687b ldr r3, [r7, #4] + 802f76e: 691a ldr r2, [r3, #16] + 802f770: 4b7b ldr r3, [pc, #492] ; (802f960 ) + 802f772: 699b ldr r3, [r3, #24] + 802f774: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f778: 429a cmp r2, r3 + 802f77a: d908 bls.n 802f78e { assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider)); MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider); - 802f6f8: 4b78 ldr r3, [pc, #480] ; (802f8dc ) - 802f6fa: 699b ldr r3, [r3, #24] - 802f6fc: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f700: 687b ldr r3, [r7, #4] - 802f702: 691b ldr r3, [r3, #16] - 802f704: 4975 ldr r1, [pc, #468] ; (802f8dc ) - 802f706: 4313 orrs r3, r2 - 802f708: 618b str r3, [r1, #24] + 802f77c: 4b78 ldr r3, [pc, #480] ; (802f960 ) + 802f77e: 699b ldr r3, [r3, #24] + 802f780: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f784: 687b ldr r3, [r7, #4] + 802f786: 691b ldr r3, [r3, #16] + 802f788: 4975 ldr r1, [pc, #468] ; (802f960 ) + 802f78a: 4313 orrs r3, r2 + 802f78c: 618b str r3, [r1, #24] } #endif } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 802f70a: 687b ldr r3, [r7, #4] - 802f70c: 681b ldr r3, [r3, #0] - 802f70e: f003 0308 and.w r3, r3, #8 - 802f712: 2b00 cmp r3, #0 - 802f714: d010 beq.n 802f738 + 802f78e: 687b ldr r3, [r7, #4] + 802f790: 681b ldr r3, [r3, #0] + 802f792: f003 0308 and.w r3, r3, #8 + 802f796: 2b00 cmp r3, #0 + 802f798: d010 beq.n 802f7bc { #if defined (RCC_D2CFGR_D2PPRE1) if((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1)) - 802f716: 687b ldr r3, [r7, #4] - 802f718: 695a ldr r2, [r3, #20] - 802f71a: 4b70 ldr r3, [pc, #448] ; (802f8dc ) - 802f71c: 69db ldr r3, [r3, #28] - 802f71e: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f722: 429a cmp r2, r3 - 802f724: d908 bls.n 802f738 + 802f79a: 687b ldr r3, [r7, #4] + 802f79c: 695a ldr r2, [r3, #20] + 802f79e: 4b70 ldr r3, [pc, #448] ; (802f960 ) + 802f7a0: 69db ldr r3, [r3, #28] + 802f7a2: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f7a6: 429a cmp r2, r3 + 802f7a8: d908 bls.n 802f7bc { assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); - 802f726: 4b6d ldr r3, [pc, #436] ; (802f8dc ) - 802f728: 69db ldr r3, [r3, #28] - 802f72a: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f72e: 687b ldr r3, [r7, #4] - 802f730: 695b ldr r3, [r3, #20] - 802f732: 496a ldr r1, [pc, #424] ; (802f8dc ) - 802f734: 4313 orrs r3, r2 - 802f736: 61cb str r3, [r1, #28] + 802f7aa: 4b6d ldr r3, [pc, #436] ; (802f960 ) + 802f7ac: 69db ldr r3, [r3, #28] + 802f7ae: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f7b2: 687b ldr r3, [r7, #4] + 802f7b4: 695b ldr r3, [r3, #20] + 802f7b6: 496a ldr r1, [pc, #424] ; (802f960 ) + 802f7b8: 4313 orrs r3, r2 + 802f7ba: 61cb str r3, [r1, #28] MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); } #endif } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 802f738: 687b ldr r3, [r7, #4] - 802f73a: 681b ldr r3, [r3, #0] - 802f73c: f003 0310 and.w r3, r3, #16 - 802f740: 2b00 cmp r3, #0 - 802f742: d010 beq.n 802f766 + 802f7bc: 687b ldr r3, [r7, #4] + 802f7be: 681b ldr r3, [r3, #0] + 802f7c0: f003 0310 and.w r3, r3, #16 + 802f7c4: 2b00 cmp r3, #0 + 802f7c6: d010 beq.n 802f7ea { #if defined(RCC_D2CFGR_D2PPRE2) if((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2)) - 802f744: 687b ldr r3, [r7, #4] - 802f746: 699a ldr r2, [r3, #24] - 802f748: 4b64 ldr r3, [pc, #400] ; (802f8dc ) - 802f74a: 69db ldr r3, [r3, #28] - 802f74c: f403 63e0 and.w r3, r3, #1792 ; 0x700 - 802f750: 429a cmp r2, r3 - 802f752: d908 bls.n 802f766 + 802f7c8: 687b ldr r3, [r7, #4] + 802f7ca: 699a ldr r2, [r3, #24] + 802f7cc: 4b64 ldr r3, [pc, #400] ; (802f960 ) + 802f7ce: 69db ldr r3, [r3, #28] + 802f7d0: f403 63e0 and.w r3, r3, #1792 ; 0x700 + 802f7d4: 429a cmp r2, r3 + 802f7d6: d908 bls.n 802f7ea { assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider)); - 802f754: 4b61 ldr r3, [pc, #388] ; (802f8dc ) - 802f756: 69db ldr r3, [r3, #28] - 802f758: f423 62e0 bic.w r2, r3, #1792 ; 0x700 - 802f75c: 687b ldr r3, [r7, #4] - 802f75e: 699b ldr r3, [r3, #24] - 802f760: 495e ldr r1, [pc, #376] ; (802f8dc ) - 802f762: 4313 orrs r3, r2 - 802f764: 61cb str r3, [r1, #28] + 802f7d8: 4b61 ldr r3, [pc, #388] ; (802f960 ) + 802f7da: 69db ldr r3, [r3, #28] + 802f7dc: f423 62e0 bic.w r2, r3, #1792 ; 0x700 + 802f7e0: 687b ldr r3, [r7, #4] + 802f7e2: 699b ldr r3, [r3, #24] + 802f7e4: 495e ldr r1, [pc, #376] ; (802f960 ) + 802f7e6: 4313 orrs r3, r2 + 802f7e8: 61cb str r3, [r1, #28] } #endif } /*-------------------------- D3PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1) - 802f766: 687b ldr r3, [r7, #4] - 802f768: 681b ldr r3, [r3, #0] - 802f76a: f003 0320 and.w r3, r3, #32 - 802f76e: 2b00 cmp r3, #0 - 802f770: d010 beq.n 802f794 + 802f7ea: 687b ldr r3, [r7, #4] + 802f7ec: 681b ldr r3, [r3, #0] + 802f7ee: f003 0320 and.w r3, r3, #32 + 802f7f2: 2b00 cmp r3, #0 + 802f7f4: d010 beq.n 802f818 { #if defined(RCC_D3CFGR_D3PPRE) if((RCC_ClkInitStruct->APB4CLKDivider) > (RCC->D3CFGR & RCC_D3CFGR_D3PPRE)) - 802f772: 687b ldr r3, [r7, #4] - 802f774: 69da ldr r2, [r3, #28] - 802f776: 4b59 ldr r3, [pc, #356] ; (802f8dc ) - 802f778: 6a1b ldr r3, [r3, #32] - 802f77a: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f77e: 429a cmp r2, r3 - 802f780: d908 bls.n 802f794 + 802f7f6: 687b ldr r3, [r7, #4] + 802f7f8: 69da ldr r2, [r3, #28] + 802f7fa: 4b59 ldr r3, [pc, #356] ; (802f960 ) + 802f7fc: 6a1b ldr r3, [r3, #32] + 802f7fe: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f802: 429a cmp r2, r3 + 802f804: d908 bls.n 802f818 { assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider)); MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider) ); - 802f782: 4b56 ldr r3, [pc, #344] ; (802f8dc ) - 802f784: 6a1b ldr r3, [r3, #32] - 802f786: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f78a: 687b ldr r3, [r7, #4] - 802f78c: 69db ldr r3, [r3, #28] - 802f78e: 4953 ldr r1, [pc, #332] ; (802f8dc ) - 802f790: 4313 orrs r3, r2 - 802f792: 620b str r3, [r1, #32] + 802f806: 4b56 ldr r3, [pc, #344] ; (802f960 ) + 802f808: 6a1b ldr r3, [r3, #32] + 802f80a: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f80e: 687b ldr r3, [r7, #4] + 802f810: 69db ldr r3, [r3, #28] + 802f812: 4953 ldr r1, [pc, #332] ; (802f960 ) + 802f814: 4313 orrs r3, r2 + 802f816: 620b str r3, [r1, #32] } #endif } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 802f794: 687b ldr r3, [r7, #4] - 802f796: 681b ldr r3, [r3, #0] - 802f798: f003 0302 and.w r3, r3, #2 - 802f79c: 2b00 cmp r3, #0 - 802f79e: d010 beq.n 802f7c2 + 802f818: 687b ldr r3, [r7, #4] + 802f81a: 681b ldr r3, [r3, #0] + 802f81c: f003 0302 and.w r3, r3, #2 + 802f820: 2b00 cmp r3, #0 + 802f822: d010 beq.n 802f846 { #if defined (RCC_D1CFGR_HPRE) if((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE)) - 802f7a0: 687b ldr r3, [r7, #4] - 802f7a2: 68da ldr r2, [r3, #12] - 802f7a4: 4b4d ldr r3, [pc, #308] ; (802f8dc ) - 802f7a6: 699b ldr r3, [r3, #24] - 802f7a8: f003 030f and.w r3, r3, #15 - 802f7ac: 429a cmp r2, r3 - 802f7ae: d908 bls.n 802f7c2 + 802f824: 687b ldr r3, [r7, #4] + 802f826: 68da ldr r2, [r3, #12] + 802f828: 4b4d ldr r3, [pc, #308] ; (802f960 ) + 802f82a: 699b ldr r3, [r3, #24] + 802f82c: f003 030f and.w r3, r3, #15 + 802f830: 429a cmp r2, r3 + 802f832: d908 bls.n 802f846 { /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 802f7b0: 4b4a ldr r3, [pc, #296] ; (802f8dc ) - 802f7b2: 699b ldr r3, [r3, #24] - 802f7b4: f023 020f bic.w r2, r3, #15 - 802f7b8: 687b ldr r3, [r7, #4] - 802f7ba: 68db ldr r3, [r3, #12] - 802f7bc: 4947 ldr r1, [pc, #284] ; (802f8dc ) - 802f7be: 4313 orrs r3, r2 - 802f7c0: 618b str r3, [r1, #24] + 802f834: 4b4a ldr r3, [pc, #296] ; (802f960 ) + 802f836: 699b ldr r3, [r3, #24] + 802f838: f023 020f bic.w r2, r3, #15 + 802f83c: 687b ldr r3, [r7, #4] + 802f83e: 68db ldr r3, [r3, #12] + 802f840: 4947 ldr r1, [pc, #284] ; (802f960 ) + 802f842: 4313 orrs r3, r2 + 802f844: 618b str r3, [r1, #24] } #endif } /*------------------------- SYSCLK Configuration -------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 802f7c2: 687b ldr r3, [r7, #4] - 802f7c4: 681b ldr r3, [r3, #0] - 802f7c6: f003 0301 and.w r3, r3, #1 - 802f7ca: 2b00 cmp r3, #0 - 802f7cc: d055 beq.n 802f87a + 802f846: 687b ldr r3, [r7, #4] + 802f848: 681b ldr r3, [r3, #0] + 802f84a: f003 0301 and.w r3, r3, #1 + 802f84e: 2b00 cmp r3, #0 + 802f850: d055 beq.n 802f8fe { assert_param(IS_RCC_SYSCLK(RCC_ClkInitStruct->SYSCLKDivider)); assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); #if defined(RCC_D1CFGR_D1CPRE) MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, RCC_ClkInitStruct->SYSCLKDivider); - 802f7ce: 4b43 ldr r3, [pc, #268] ; (802f8dc ) - 802f7d0: 699b ldr r3, [r3, #24] - 802f7d2: f423 6270 bic.w r2, r3, #3840 ; 0xf00 - 802f7d6: 687b ldr r3, [r7, #4] - 802f7d8: 689b ldr r3, [r3, #8] - 802f7da: 4940 ldr r1, [pc, #256] ; (802f8dc ) - 802f7dc: 4313 orrs r3, r2 - 802f7de: 618b str r3, [r1, #24] + 802f852: 4b43 ldr r3, [pc, #268] ; (802f960 ) + 802f854: 699b ldr r3, [r3, #24] + 802f856: f423 6270 bic.w r2, r3, #3840 ; 0xf00 + 802f85a: 687b ldr r3, [r7, #4] + 802f85c: 689b ldr r3, [r3, #8] + 802f85e: 4940 ldr r1, [pc, #256] ; (802f960 ) + 802f860: 4313 orrs r3, r2 + 802f862: 618b str r3, [r1, #24] #else MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, RCC_ClkInitStruct->SYSCLKDivider); #endif /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 802f7e0: 687b ldr r3, [r7, #4] - 802f7e2: 685b ldr r3, [r3, #4] - 802f7e4: 2b02 cmp r3, #2 - 802f7e6: d107 bne.n 802f7f8 + 802f864: 687b ldr r3, [r7, #4] + 802f866: 685b ldr r3, [r3, #4] + 802f868: 2b02 cmp r3, #2 + 802f86a: d107 bne.n 802f87c { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 802f7e8: 4b3c ldr r3, [pc, #240] ; (802f8dc ) - 802f7ea: 681b ldr r3, [r3, #0] - 802f7ec: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 802f7f0: 2b00 cmp r3, #0 - 802f7f2: d121 bne.n 802f838 + 802f86c: 4b3c ldr r3, [pc, #240] ; (802f960 ) + 802f86e: 681b ldr r3, [r3, #0] + 802f870: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 802f874: 2b00 cmp r3, #0 + 802f876: d121 bne.n 802f8bc { return HAL_ERROR; - 802f7f4: 2301 movs r3, #1 - 802f7f6: e0f6 b.n 802f9e6 + 802f878: 2301 movs r3, #1 + 802f87a: e0f6 b.n 802fa6a } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 802f7f8: 687b ldr r3, [r7, #4] - 802f7fa: 685b ldr r3, [r3, #4] - 802f7fc: 2b03 cmp r3, #3 - 802f7fe: d107 bne.n 802f810 + 802f87c: 687b ldr r3, [r7, #4] + 802f87e: 685b ldr r3, [r3, #4] + 802f880: 2b03 cmp r3, #3 + 802f882: d107 bne.n 802f894 { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 802f800: 4b36 ldr r3, [pc, #216] ; (802f8dc ) - 802f802: 681b ldr r3, [r3, #0] - 802f804: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 802f808: 2b00 cmp r3, #0 - 802f80a: d115 bne.n 802f838 + 802f884: 4b36 ldr r3, [pc, #216] ; (802f960 ) + 802f886: 681b ldr r3, [r3, #0] + 802f888: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 802f88c: 2b00 cmp r3, #0 + 802f88e: d115 bne.n 802f8bc { return HAL_ERROR; - 802f80c: 2301 movs r3, #1 - 802f80e: e0ea b.n 802f9e6 + 802f890: 2301 movs r3, #1 + 802f892: e0ea b.n 802fa6a } } /* CSI is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_CSI) - 802f810: 687b ldr r3, [r7, #4] - 802f812: 685b ldr r3, [r3, #4] - 802f814: 2b01 cmp r3, #1 - 802f816: d107 bne.n 802f828 + 802f894: 687b ldr r3, [r7, #4] + 802f896: 685b ldr r3, [r3, #4] + 802f898: 2b01 cmp r3, #1 + 802f89a: d107 bne.n 802f8ac { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U) - 802f818: 4b30 ldr r3, [pc, #192] ; (802f8dc ) - 802f81a: 681b ldr r3, [r3, #0] - 802f81c: f403 7380 and.w r3, r3, #256 ; 0x100 - 802f820: 2b00 cmp r3, #0 - 802f822: d109 bne.n 802f838 + 802f89c: 4b30 ldr r3, [pc, #192] ; (802f960 ) + 802f89e: 681b ldr r3, [r3, #0] + 802f8a0: f403 7380 and.w r3, r3, #256 ; 0x100 + 802f8a4: 2b00 cmp r3, #0 + 802f8a6: d109 bne.n 802f8bc { return HAL_ERROR; - 802f824: 2301 movs r3, #1 - 802f826: e0de b.n 802f9e6 + 802f8a8: 2301 movs r3, #1 + 802f8aa: e0de b.n 802fa6a } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 802f828: 4b2c ldr r3, [pc, #176] ; (802f8dc ) - 802f82a: 681b ldr r3, [r3, #0] - 802f82c: f003 0304 and.w r3, r3, #4 - 802f830: 2b00 cmp r3, #0 - 802f832: d101 bne.n 802f838 + 802f8ac: 4b2c ldr r3, [pc, #176] ; (802f960 ) + 802f8ae: 681b ldr r3, [r3, #0] + 802f8b0: f003 0304 and.w r3, r3, #4 + 802f8b4: 2b00 cmp r3, #0 + 802f8b6: d101 bne.n 802f8bc { return HAL_ERROR; - 802f834: 2301 movs r3, #1 - 802f836: e0d6 b.n 802f9e6 + 802f8b8: 2301 movs r3, #1 + 802f8ba: e0d6 b.n 802fa6a } } MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); - 802f838: 4b28 ldr r3, [pc, #160] ; (802f8dc ) - 802f83a: 691b ldr r3, [r3, #16] - 802f83c: f023 0207 bic.w r2, r3, #7 - 802f840: 687b ldr r3, [r7, #4] - 802f842: 685b ldr r3, [r3, #4] - 802f844: 4925 ldr r1, [pc, #148] ; (802f8dc ) - 802f846: 4313 orrs r3, r2 - 802f848: 610b str r3, [r1, #16] + 802f8bc: 4b28 ldr r3, [pc, #160] ; (802f960 ) + 802f8be: 691b ldr r3, [r3, #16] + 802f8c0: f023 0207 bic.w r2, r3, #7 + 802f8c4: 687b ldr r3, [r7, #4] + 802f8c6: 685b ldr r3, [r3, #4] + 802f8c8: 4925 ldr r1, [pc, #148] ; (802f960 ) + 802f8ca: 4313 orrs r3, r2 + 802f8cc: 610b str r3, [r1, #16] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 802f84a: f7f6 fbbb bl 8025fc4 - 802f84e: 6178 str r0, [r7, #20] + 802f8ce: f7f6 fbbb bl 8026048 + 802f8d2: 6178 str r0, [r7, #20] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 802f850: e00a b.n 802f868 + 802f8d4: e00a b.n 802f8ec { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 802f852: f7f6 fbb7 bl 8025fc4 - 802f856: 4602 mov r2, r0 - 802f858: 697b ldr r3, [r7, #20] - 802f85a: 1ad3 subs r3, r2, r3 - 802f85c: f241 3288 movw r2, #5000 ; 0x1388 - 802f860: 4293 cmp r3, r2 - 802f862: d901 bls.n 802f868 + 802f8d6: f7f6 fbb7 bl 8026048 + 802f8da: 4602 mov r2, r0 + 802f8dc: 697b ldr r3, [r7, #20] + 802f8de: 1ad3 subs r3, r2, r3 + 802f8e0: f241 3288 movw r2, #5000 ; 0x1388 + 802f8e4: 4293 cmp r3, r2 + 802f8e6: d901 bls.n 802f8ec { return HAL_TIMEOUT; - 802f864: 2303 movs r3, #3 - 802f866: e0be b.n 802f9e6 + 802f8e8: 2303 movs r3, #3 + 802f8ea: e0be b.n 802fa6a while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 802f868: 4b1c ldr r3, [pc, #112] ; (802f8dc ) - 802f86a: 691b ldr r3, [r3, #16] - 802f86c: f003 0238 and.w r2, r3, #56 ; 0x38 - 802f870: 687b ldr r3, [r7, #4] - 802f872: 685b ldr r3, [r3, #4] - 802f874: 00db lsls r3, r3, #3 - 802f876: 429a cmp r2, r3 - 802f878: d1eb bne.n 802f852 + 802f8ec: 4b1c ldr r3, [pc, #112] ; (802f960 ) + 802f8ee: 691b ldr r3, [r3, #16] + 802f8f0: f003 0238 and.w r2, r3, #56 ; 0x38 + 802f8f4: 687b ldr r3, [r7, #4] + 802f8f6: 685b ldr r3, [r3, #4] + 802f8f8: 00db lsls r3, r3, #3 + 802f8fa: 429a cmp r2, r3 + 802f8fc: d1eb bne.n 802f8d6 } /* Decreasing the BUS frequency divider */ /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 802f87a: 687b ldr r3, [r7, #4] - 802f87c: 681b ldr r3, [r3, #0] - 802f87e: f003 0302 and.w r3, r3, #2 - 802f882: 2b00 cmp r3, #0 - 802f884: d010 beq.n 802f8a8 + 802f8fe: 687b ldr r3, [r7, #4] + 802f900: 681b ldr r3, [r3, #0] + 802f902: f003 0302 and.w r3, r3, #2 + 802f906: 2b00 cmp r3, #0 + 802f908: d010 beq.n 802f92c { #if defined(RCC_D1CFGR_HPRE) if((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE)) - 802f886: 687b ldr r3, [r7, #4] - 802f888: 68da ldr r2, [r3, #12] - 802f88a: 4b14 ldr r3, [pc, #80] ; (802f8dc ) - 802f88c: 699b ldr r3, [r3, #24] - 802f88e: f003 030f and.w r3, r3, #15 - 802f892: 429a cmp r2, r3 - 802f894: d208 bcs.n 802f8a8 + 802f90a: 687b ldr r3, [r7, #4] + 802f90c: 68da ldr r2, [r3, #12] + 802f90e: 4b14 ldr r3, [pc, #80] ; (802f960 ) + 802f910: 699b ldr r3, [r3, #24] + 802f912: f003 030f and.w r3, r3, #15 + 802f916: 429a cmp r2, r3 + 802f918: d208 bcs.n 802f92c { /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 802f896: 4b11 ldr r3, [pc, #68] ; (802f8dc ) - 802f898: 699b ldr r3, [r3, #24] - 802f89a: f023 020f bic.w r2, r3, #15 - 802f89e: 687b ldr r3, [r7, #4] - 802f8a0: 68db ldr r3, [r3, #12] - 802f8a2: 490e ldr r1, [pc, #56] ; (802f8dc ) - 802f8a4: 4313 orrs r3, r2 - 802f8a6: 618b str r3, [r1, #24] + 802f91a: 4b11 ldr r3, [pc, #68] ; (802f960 ) + 802f91c: 699b ldr r3, [r3, #24] + 802f91e: f023 020f bic.w r2, r3, #15 + 802f922: 687b ldr r3, [r7, #4] + 802f924: 68db ldr r3, [r3, #12] + 802f926: 490e ldr r1, [pc, #56] ; (802f960 ) + 802f928: 4313 orrs r3, r2 + 802f92a: 618b str r3, [r1, #24] } #endif } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 802f8a8: 4b0b ldr r3, [pc, #44] ; (802f8d8 ) - 802f8aa: 681b ldr r3, [r3, #0] - 802f8ac: f003 030f and.w r3, r3, #15 - 802f8b0: 683a ldr r2, [r7, #0] - 802f8b2: 429a cmp r2, r3 - 802f8b4: d214 bcs.n 802f8e0 + 802f92c: 4b0b ldr r3, [pc, #44] ; (802f95c ) + 802f92e: 681b ldr r3, [r3, #0] + 802f930: f003 030f and.w r3, r3, #15 + 802f934: 683a ldr r2, [r7, #0] + 802f936: 429a cmp r2, r3 + 802f938: d214 bcs.n 802f964 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 802f8b6: 4b08 ldr r3, [pc, #32] ; (802f8d8 ) - 802f8b8: 681b ldr r3, [r3, #0] - 802f8ba: f023 020f bic.w r2, r3, #15 - 802f8be: 4906 ldr r1, [pc, #24] ; (802f8d8 ) - 802f8c0: 683b ldr r3, [r7, #0] - 802f8c2: 4313 orrs r3, r2 - 802f8c4: 600b str r3, [r1, #0] + 802f93a: 4b08 ldr r3, [pc, #32] ; (802f95c ) + 802f93c: 681b ldr r3, [r3, #0] + 802f93e: f023 020f bic.w r2, r3, #15 + 802f942: 4906 ldr r1, [pc, #24] ; (802f95c ) + 802f944: 683b ldr r3, [r7, #0] + 802f946: 4313 orrs r3, r2 + 802f948: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if(__HAL_FLASH_GET_LATENCY() != FLatency) - 802f8c6: 4b04 ldr r3, [pc, #16] ; (802f8d8 ) - 802f8c8: 681b ldr r3, [r3, #0] - 802f8ca: f003 030f and.w r3, r3, #15 - 802f8ce: 683a ldr r2, [r7, #0] - 802f8d0: 429a cmp r2, r3 - 802f8d2: d005 beq.n 802f8e0 + 802f94a: 4b04 ldr r3, [pc, #16] ; (802f95c ) + 802f94c: 681b ldr r3, [r3, #0] + 802f94e: f003 030f and.w r3, r3, #15 + 802f952: 683a ldr r2, [r7, #0] + 802f954: 429a cmp r2, r3 + 802f956: d005 beq.n 802f964 { return HAL_ERROR; - 802f8d4: 2301 movs r3, #1 - 802f8d6: e086 b.n 802f9e6 - 802f8d8: 52002000 .word 0x52002000 - 802f8dc: 58024400 .word 0x58024400 + 802f958: 2301 movs r3, #1 + 802f95a: e086 b.n 802fa6a + 802f95c: 52002000 .word 0x52002000 + 802f960: 58024400 .word 0x58024400 } } /*-------------------------- D1PCLK1/CDPCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1) - 802f8e0: 687b ldr r3, [r7, #4] - 802f8e2: 681b ldr r3, [r3, #0] - 802f8e4: f003 0304 and.w r3, r3, #4 - 802f8e8: 2b00 cmp r3, #0 - 802f8ea: d010 beq.n 802f90e + 802f964: 687b ldr r3, [r7, #4] + 802f966: 681b ldr r3, [r3, #0] + 802f968: f003 0304 and.w r3, r3, #4 + 802f96c: 2b00 cmp r3, #0 + 802f96e: d010 beq.n 802f992 { #if defined(RCC_D1CFGR_D1PPRE) if((RCC_ClkInitStruct->APB3CLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_D1PPRE)) - 802f8ec: 687b ldr r3, [r7, #4] - 802f8ee: 691a ldr r2, [r3, #16] - 802f8f0: 4b3f ldr r3, [pc, #252] ; (802f9f0 ) - 802f8f2: 699b ldr r3, [r3, #24] - 802f8f4: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f8f8: 429a cmp r2, r3 - 802f8fa: d208 bcs.n 802f90e + 802f970: 687b ldr r3, [r7, #4] + 802f972: 691a ldr r2, [r3, #16] + 802f974: 4b3f ldr r3, [pc, #252] ; (802fa74 ) + 802f976: 699b ldr r3, [r3, #24] + 802f978: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f97c: 429a cmp r2, r3 + 802f97e: d208 bcs.n 802f992 { assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider)); MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider); - 802f8fc: 4b3c ldr r3, [pc, #240] ; (802f9f0 ) - 802f8fe: 699b ldr r3, [r3, #24] - 802f900: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f904: 687b ldr r3, [r7, #4] - 802f906: 691b ldr r3, [r3, #16] - 802f908: 4939 ldr r1, [pc, #228] ; (802f9f0 ) - 802f90a: 4313 orrs r3, r2 - 802f90c: 618b str r3, [r1, #24] + 802f980: 4b3c ldr r3, [pc, #240] ; (802fa74 ) + 802f982: 699b ldr r3, [r3, #24] + 802f984: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f988: 687b ldr r3, [r7, #4] + 802f98a: 691b ldr r3, [r3, #16] + 802f98c: 4939 ldr r1, [pc, #228] ; (802fa74 ) + 802f98e: 4313 orrs r3, r2 + 802f990: 618b str r3, [r1, #24] } #endif } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 802f90e: 687b ldr r3, [r7, #4] - 802f910: 681b ldr r3, [r3, #0] - 802f912: f003 0308 and.w r3, r3, #8 - 802f916: 2b00 cmp r3, #0 - 802f918: d010 beq.n 802f93c + 802f992: 687b ldr r3, [r7, #4] + 802f994: 681b ldr r3, [r3, #0] + 802f996: f003 0308 and.w r3, r3, #8 + 802f99a: 2b00 cmp r3, #0 + 802f99c: d010 beq.n 802f9c0 { #if defined(RCC_D2CFGR_D2PPRE1) if((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1)) - 802f91a: 687b ldr r3, [r7, #4] - 802f91c: 695a ldr r2, [r3, #20] - 802f91e: 4b34 ldr r3, [pc, #208] ; (802f9f0 ) - 802f920: 69db ldr r3, [r3, #28] - 802f922: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f926: 429a cmp r2, r3 - 802f928: d208 bcs.n 802f93c + 802f99e: 687b ldr r3, [r7, #4] + 802f9a0: 695a ldr r2, [r3, #20] + 802f9a2: 4b34 ldr r3, [pc, #208] ; (802fa74 ) + 802f9a4: 69db ldr r3, [r3, #28] + 802f9a6: f003 0370 and.w r3, r3, #112 ; 0x70 + 802f9aa: 429a cmp r2, r3 + 802f9ac: d208 bcs.n 802f9c0 { assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider)); - 802f92a: 4b31 ldr r3, [pc, #196] ; (802f9f0 ) - 802f92c: 69db ldr r3, [r3, #28] - 802f92e: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f932: 687b ldr r3, [r7, #4] - 802f934: 695b ldr r3, [r3, #20] - 802f936: 492e ldr r1, [pc, #184] ; (802f9f0 ) - 802f938: 4313 orrs r3, r2 - 802f93a: 61cb str r3, [r1, #28] + 802f9ae: 4b31 ldr r3, [pc, #196] ; (802fa74 ) + 802f9b0: 69db ldr r3, [r3, #28] + 802f9b2: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802f9b6: 687b ldr r3, [r7, #4] + 802f9b8: 695b ldr r3, [r3, #20] + 802f9ba: 492e ldr r1, [pc, #184] ; (802fa74 ) + 802f9bc: 4313 orrs r3, r2 + 802f9be: 61cb str r3, [r1, #28] } #endif } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 802f93c: 687b ldr r3, [r7, #4] - 802f93e: 681b ldr r3, [r3, #0] - 802f940: f003 0310 and.w r3, r3, #16 - 802f944: 2b00 cmp r3, #0 - 802f946: d010 beq.n 802f96a + 802f9c0: 687b ldr r3, [r7, #4] + 802f9c2: 681b ldr r3, [r3, #0] + 802f9c4: f003 0310 and.w r3, r3, #16 + 802f9c8: 2b00 cmp r3, #0 + 802f9ca: d010 beq.n 802f9ee { #if defined (RCC_D2CFGR_D2PPRE2) if((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2)) - 802f948: 687b ldr r3, [r7, #4] - 802f94a: 699a ldr r2, [r3, #24] - 802f94c: 4b28 ldr r3, [pc, #160] ; (802f9f0 ) - 802f94e: 69db ldr r3, [r3, #28] - 802f950: f403 63e0 and.w r3, r3, #1792 ; 0x700 - 802f954: 429a cmp r2, r3 - 802f956: d208 bcs.n 802f96a + 802f9cc: 687b ldr r3, [r7, #4] + 802f9ce: 699a ldr r2, [r3, #24] + 802f9d0: 4b28 ldr r3, [pc, #160] ; (802fa74 ) + 802f9d2: 69db ldr r3, [r3, #28] + 802f9d4: f403 63e0 and.w r3, r3, #1792 ; 0x700 + 802f9d8: 429a cmp r2, r3 + 802f9da: d208 bcs.n 802f9ee { assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider)); - 802f958: 4b25 ldr r3, [pc, #148] ; (802f9f0 ) - 802f95a: 69db ldr r3, [r3, #28] - 802f95c: f423 62e0 bic.w r2, r3, #1792 ; 0x700 - 802f960: 687b ldr r3, [r7, #4] - 802f962: 699b ldr r3, [r3, #24] - 802f964: 4922 ldr r1, [pc, #136] ; (802f9f0 ) - 802f966: 4313 orrs r3, r2 - 802f968: 61cb str r3, [r1, #28] + 802f9dc: 4b25 ldr r3, [pc, #148] ; (802fa74 ) + 802f9de: 69db ldr r3, [r3, #28] + 802f9e0: f423 62e0 bic.w r2, r3, #1792 ; 0x700 + 802f9e4: 687b ldr r3, [r7, #4] + 802f9e6: 699b ldr r3, [r3, #24] + 802f9e8: 4922 ldr r1, [pc, #136] ; (802fa74 ) + 802f9ea: 4313 orrs r3, r2 + 802f9ec: 61cb str r3, [r1, #28] } #endif } /*-------------------------- D3PCLK1/SRDPCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1) - 802f96a: 687b ldr r3, [r7, #4] - 802f96c: 681b ldr r3, [r3, #0] - 802f96e: f003 0320 and.w r3, r3, #32 - 802f972: 2b00 cmp r3, #0 - 802f974: d010 beq.n 802f998 + 802f9ee: 687b ldr r3, [r7, #4] + 802f9f0: 681b ldr r3, [r3, #0] + 802f9f2: f003 0320 and.w r3, r3, #32 + 802f9f6: 2b00 cmp r3, #0 + 802f9f8: d010 beq.n 802fa1c { #if defined(RCC_D3CFGR_D3PPRE) if((RCC_ClkInitStruct->APB4CLKDivider) < (RCC->D3CFGR & RCC_D3CFGR_D3PPRE)) - 802f976: 687b ldr r3, [r7, #4] - 802f978: 69da ldr r2, [r3, #28] - 802f97a: 4b1d ldr r3, [pc, #116] ; (802f9f0 ) - 802f97c: 6a1b ldr r3, [r3, #32] - 802f97e: f003 0370 and.w r3, r3, #112 ; 0x70 - 802f982: 429a cmp r2, r3 - 802f984: d208 bcs.n 802f998 + 802f9fa: 687b ldr r3, [r7, #4] + 802f9fc: 69da ldr r2, [r3, #28] + 802f9fe: 4b1d ldr r3, [pc, #116] ; (802fa74 ) + 802fa00: 6a1b ldr r3, [r3, #32] + 802fa02: f003 0370 and.w r3, r3, #112 ; 0x70 + 802fa06: 429a cmp r2, r3 + 802fa08: d208 bcs.n 802fa1c { assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider)); MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider) ); - 802f986: 4b1a ldr r3, [pc, #104] ; (802f9f0 ) - 802f988: 6a1b ldr r3, [r3, #32] - 802f98a: f023 0270 bic.w r2, r3, #112 ; 0x70 - 802f98e: 687b ldr r3, [r7, #4] - 802f990: 69db ldr r3, [r3, #28] - 802f992: 4917 ldr r1, [pc, #92] ; (802f9f0 ) - 802f994: 4313 orrs r3, r2 - 802f996: 620b str r3, [r1, #32] + 802fa0a: 4b1a ldr r3, [pc, #104] ; (802fa74 ) + 802fa0c: 6a1b ldr r3, [r3, #32] + 802fa0e: f023 0270 bic.w r2, r3, #112 ; 0x70 + 802fa12: 687b ldr r3, [r7, #4] + 802fa14: 69db ldr r3, [r3, #28] + 802fa16: 4917 ldr r1, [pc, #92] ; (802fa74 ) + 802fa18: 4313 orrs r3, r2 + 802fa1a: 620b str r3, [r1, #32] #endif } /* Update the SystemCoreClock global variable */ #if defined(RCC_D1CFGR_D1CPRE) common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU); - 802f998: f000 f834 bl 802fa04 - 802f99c: 4602 mov r2, r0 - 802f99e: 4b14 ldr r3, [pc, #80] ; (802f9f0 ) - 802f9a0: 699b ldr r3, [r3, #24] - 802f9a2: 0a1b lsrs r3, r3, #8 - 802f9a4: f003 030f and.w r3, r3, #15 - 802f9a8: 4912 ldr r1, [pc, #72] ; (802f9f4 ) - 802f9aa: 5ccb ldrb r3, [r1, r3] - 802f9ac: f003 031f and.w r3, r3, #31 - 802f9b0: fa22 f303 lsr.w r3, r2, r3 - 802f9b4: 613b str r3, [r7, #16] + 802fa1c: f000 f834 bl 802fa88 + 802fa20: 4602 mov r2, r0 + 802fa22: 4b14 ldr r3, [pc, #80] ; (802fa74 ) + 802fa24: 699b ldr r3, [r3, #24] + 802fa26: 0a1b lsrs r3, r3, #8 + 802fa28: f003 030f and.w r3, r3, #15 + 802fa2c: 4912 ldr r1, [pc, #72] ; (802fa78 ) + 802fa2e: 5ccb ldrb r3, [r1, r3] + 802fa30: f003 031f and.w r3, r3, #31 + 802fa34: fa22 f303 lsr.w r3, r2, r3 + 802fa38: 613b str r3, [r7, #16] #else common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU); #endif #if defined(RCC_D1CFGR_HPRE) SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); - 802f9b6: 4b0e ldr r3, [pc, #56] ; (802f9f0 ) - 802f9b8: 699b ldr r3, [r3, #24] - 802f9ba: f003 030f and.w r3, r3, #15 - 802f9be: 4a0d ldr r2, [pc, #52] ; (802f9f4 ) - 802f9c0: 5cd3 ldrb r3, [r2, r3] - 802f9c2: f003 031f and.w r3, r3, #31 - 802f9c6: 693a ldr r2, [r7, #16] - 802f9c8: fa22 f303 lsr.w r3, r2, r3 - 802f9cc: 4a0a ldr r2, [pc, #40] ; (802f9f8 ) - 802f9ce: 6013 str r3, [r2, #0] + 802fa3a: 4b0e ldr r3, [pc, #56] ; (802fa74 ) + 802fa3c: 699b ldr r3, [r3, #24] + 802fa3e: f003 030f and.w r3, r3, #15 + 802fa42: 4a0d ldr r2, [pc, #52] ; (802fa78 ) + 802fa44: 5cd3 ldrb r3, [r2, r3] + 802fa46: f003 031f and.w r3, r3, #31 + 802fa4a: 693a ldr r2, [r7, #16] + 802fa4c: fa22 f303 lsr.w r3, r2, r3 + 802fa50: 4a0a ldr r2, [pc, #40] ; (802fa7c ) + 802fa52: 6013 str r3, [r2, #0] #endif #if defined(DUAL_CORE) && defined(CORE_CM4) SystemCoreClock = SystemD2Clock; #else SystemCoreClock = common_system_clock; - 802f9d0: 4a0a ldr r2, [pc, #40] ; (802f9fc ) - 802f9d2: 693b ldr r3, [r7, #16] - 802f9d4: 6013 str r3, [r2, #0] + 802fa54: 4a0a ldr r2, [pc, #40] ; (802fa80 ) + 802fa56: 693b ldr r3, [r7, #16] + 802fa58: 6013 str r3, [r2, #0] #endif /* DUAL_CORE && CORE_CM4 */ /* Configure the source of time base considering new system clocks settings*/ halstatus = HAL_InitTick (uwTickPrio); - 802f9d6: 4b0a ldr r3, [pc, #40] ; (802fa00 ) - 802f9d8: 681b ldr r3, [r3, #0] - 802f9da: 4618 mov r0, r3 - 802f9dc: f7f6 faa8 bl 8025f30 - 802f9e0: 4603 mov r3, r0 - 802f9e2: 73fb strb r3, [r7, #15] + 802fa5a: 4b0a ldr r3, [pc, #40] ; (802fa84 ) + 802fa5c: 681b ldr r3, [r3, #0] + 802fa5e: 4618 mov r0, r3 + 802fa60: f7f6 faa8 bl 8025fb4 + 802fa64: 4603 mov r3, r0 + 802fa66: 73fb strb r3, [r7, #15] return halstatus; - 802f9e4: 7bfb ldrb r3, [r7, #15] -} - 802f9e6: 4618 mov r0, r3 - 802f9e8: 3718 adds r7, #24 - 802f9ea: 46bd mov sp, r7 - 802f9ec: bd80 pop {r7, pc} - 802f9ee: bf00 nop - 802f9f0: 58024400 .word 0x58024400 - 802f9f4: 08044cd4 .word 0x08044cd4 - 802f9f8: 2400004c .word 0x2400004c - 802f9fc: 24000048 .word 0x24000048 - 802fa00: 24000050 .word 0x24000050 - -0802fa04 : + 802fa68: 7bfb ldrb r3, [r7, #15] +} + 802fa6a: 4618 mov r0, r3 + 802fa6c: 3718 adds r7, #24 + 802fa6e: 46bd mov sp, r7 + 802fa70: bd80 pop {r7, pc} + 802fa72: bf00 nop + 802fa74: 58024400 .word 0x58024400 + 802fa78: 08044d54 .word 0x08044d54 + 802fa7c: 2400004c .word 0x2400004c + 802fa80: 24000048 .word 0x24000048 + 802fa84: 24000050 .word 0x24000050 + +0802fa88 : * * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 802fa04: b480 push {r7} - 802fa06: b089 sub sp, #36 ; 0x24 - 802fa08: af00 add r7, sp, #0 + 802fa88: b480 push {r7} + 802fa8a: b089 sub sp, #36 ; 0x24 + 802fa8c: af00 add r7, sp, #0 float_t fracn1, pllvco; uint32_t sysclockfreq; /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) - 802fa0a: 4bb3 ldr r3, [pc, #716] ; (802fcd8 ) - 802fa0c: 691b ldr r3, [r3, #16] - 802fa0e: f003 0338 and.w r3, r3, #56 ; 0x38 - 802fa12: 2b18 cmp r3, #24 - 802fa14: f200 8155 bhi.w 802fcc2 - 802fa18: a201 add r2, pc, #4 ; (adr r2, 802fa20 ) - 802fa1a: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 802fa1e: bf00 nop - 802fa20: 0802fa85 .word 0x0802fa85 - 802fa24: 0802fcc3 .word 0x0802fcc3 - 802fa28: 0802fcc3 .word 0x0802fcc3 - 802fa2c: 0802fcc3 .word 0x0802fcc3 - 802fa30: 0802fcc3 .word 0x0802fcc3 - 802fa34: 0802fcc3 .word 0x0802fcc3 - 802fa38: 0802fcc3 .word 0x0802fcc3 - 802fa3c: 0802fcc3 .word 0x0802fcc3 - 802fa40: 0802faab .word 0x0802faab - 802fa44: 0802fcc3 .word 0x0802fcc3 - 802fa48: 0802fcc3 .word 0x0802fcc3 - 802fa4c: 0802fcc3 .word 0x0802fcc3 - 802fa50: 0802fcc3 .word 0x0802fcc3 - 802fa54: 0802fcc3 .word 0x0802fcc3 - 802fa58: 0802fcc3 .word 0x0802fcc3 - 802fa5c: 0802fcc3 .word 0x0802fcc3 - 802fa60: 0802fab1 .word 0x0802fab1 - 802fa64: 0802fcc3 .word 0x0802fcc3 - 802fa68: 0802fcc3 .word 0x0802fcc3 - 802fa6c: 0802fcc3 .word 0x0802fcc3 - 802fa70: 0802fcc3 .word 0x0802fcc3 - 802fa74: 0802fcc3 .word 0x0802fcc3 - 802fa78: 0802fcc3 .word 0x0802fcc3 - 802fa7c: 0802fcc3 .word 0x0802fcc3 - 802fa80: 0802fab7 .word 0x0802fab7 + 802fa8e: 4bb3 ldr r3, [pc, #716] ; (802fd5c ) + 802fa90: 691b ldr r3, [r3, #16] + 802fa92: f003 0338 and.w r3, r3, #56 ; 0x38 + 802fa96: 2b18 cmp r3, #24 + 802fa98: f200 8155 bhi.w 802fd46 + 802fa9c: a201 add r2, pc, #4 ; (adr r2, 802faa4 ) + 802fa9e: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 802faa2: bf00 nop + 802faa4: 0802fb09 .word 0x0802fb09 + 802faa8: 0802fd47 .word 0x0802fd47 + 802faac: 0802fd47 .word 0x0802fd47 + 802fab0: 0802fd47 .word 0x0802fd47 + 802fab4: 0802fd47 .word 0x0802fd47 + 802fab8: 0802fd47 .word 0x0802fd47 + 802fabc: 0802fd47 .word 0x0802fd47 + 802fac0: 0802fd47 .word 0x0802fd47 + 802fac4: 0802fb2f .word 0x0802fb2f + 802fac8: 0802fd47 .word 0x0802fd47 + 802facc: 0802fd47 .word 0x0802fd47 + 802fad0: 0802fd47 .word 0x0802fd47 + 802fad4: 0802fd47 .word 0x0802fd47 + 802fad8: 0802fd47 .word 0x0802fd47 + 802fadc: 0802fd47 .word 0x0802fd47 + 802fae0: 0802fd47 .word 0x0802fd47 + 802fae4: 0802fb35 .word 0x0802fb35 + 802fae8: 0802fd47 .word 0x0802fd47 + 802faec: 0802fd47 .word 0x0802fd47 + 802faf0: 0802fd47 .word 0x0802fd47 + 802faf4: 0802fd47 .word 0x0802fd47 + 802faf8: 0802fd47 .word 0x0802fd47 + 802fafc: 0802fd47 .word 0x0802fd47 + 802fb00: 0802fd47 .word 0x0802fd47 + 802fb04: 0802fb3b .word 0x0802fb3b { case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 802fa84: 4b94 ldr r3, [pc, #592] ; (802fcd8 ) - 802fa86: 681b ldr r3, [r3, #0] - 802fa88: f003 0320 and.w r3, r3, #32 - 802fa8c: 2b00 cmp r3, #0 - 802fa8e: d009 beq.n 802faa4 + 802fb08: 4b94 ldr r3, [pc, #592] ; (802fd5c ) + 802fb0a: 681b ldr r3, [r3, #0] + 802fb0c: f003 0320 and.w r3, r3, #32 + 802fb10: 2b00 cmp r3, #0 + 802fb12: d009 beq.n 802fb28 { sysclockfreq = (uint32_t) (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 802fa90: 4b91 ldr r3, [pc, #580] ; (802fcd8 ) - 802fa92: 681b ldr r3, [r3, #0] - 802fa94: 08db lsrs r3, r3, #3 - 802fa96: f003 0303 and.w r3, r3, #3 - 802fa9a: 4a90 ldr r2, [pc, #576] ; (802fcdc ) - 802fa9c: fa22 f303 lsr.w r3, r2, r3 - 802faa0: 61bb str r3, [r7, #24] + 802fb14: 4b91 ldr r3, [pc, #580] ; (802fd5c ) + 802fb16: 681b ldr r3, [r3, #0] + 802fb18: 08db lsrs r3, r3, #3 + 802fb1a: f003 0303 and.w r3, r3, #3 + 802fb1e: 4a90 ldr r2, [pc, #576] ; (802fd60 ) + 802fb20: fa22 f303 lsr.w r3, r2, r3 + 802fb24: 61bb str r3, [r7, #24] else { sysclockfreq = (uint32_t) HSI_VALUE; } break; - 802faa2: e111 b.n 802fcc8 + 802fb26: e111 b.n 802fd4c sysclockfreq = (uint32_t) HSI_VALUE; - 802faa4: 4b8d ldr r3, [pc, #564] ; (802fcdc ) - 802faa6: 61bb str r3, [r7, #24] + 802fb28: 4b8d ldr r3, [pc, #564] ; (802fd60 ) + 802fb2a: 61bb str r3, [r7, #24] break; - 802faa8: e10e b.n 802fcc8 + 802fb2c: e10e b.n 802fd4c case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */ sysclockfreq = CSI_VALUE; - 802faaa: 4b8d ldr r3, [pc, #564] ; (802fce0 ) - 802faac: 61bb str r3, [r7, #24] + 802fb2e: 4b8d ldr r3, [pc, #564] ; (802fd64 ) + 802fb30: 61bb str r3, [r7, #24] break; - 802faae: e10b b.n 802fcc8 + 802fb32: e10b b.n 802fd4c case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ sysclockfreq = HSE_VALUE; - 802fab0: 4b8c ldr r3, [pc, #560] ; (802fce4 ) - 802fab2: 61bb str r3, [r7, #24] + 802fb34: 4b8c ldr r3, [pc, #560] ; (802fd68 ) + 802fb36: 61bb str r3, [r7, #24] break; - 802fab4: e108 b.n 802fcc8 + 802fb38: e108 b.n 802fd4c case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */ /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN SYSCLK = PLL_VCO / PLLR */ pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); - 802fab6: 4b88 ldr r3, [pc, #544] ; (802fcd8 ) - 802fab8: 6a9b ldr r3, [r3, #40] ; 0x28 - 802faba: f003 0303 and.w r3, r3, #3 - 802fabe: 617b str r3, [r7, #20] + 802fb3a: 4b88 ldr r3, [pc, #544] ; (802fd5c ) + 802fb3c: 6a9b ldr r3, [r3, #40] ; 0x28 + 802fb3e: f003 0303 and.w r3, r3, #3 + 802fb42: 617b str r3, [r7, #20] pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; - 802fac0: 4b85 ldr r3, [pc, #532] ; (802fcd8 ) - 802fac2: 6a9b ldr r3, [r3, #40] ; 0x28 - 802fac4: 091b lsrs r3, r3, #4 - 802fac6: f003 033f and.w r3, r3, #63 ; 0x3f - 802faca: 613b str r3, [r7, #16] + 802fb44: 4b85 ldr r3, [pc, #532] ; (802fd5c ) + 802fb46: 6a9b ldr r3, [r3, #40] ; 0x28 + 802fb48: 091b lsrs r3, r3, #4 + 802fb4a: f003 033f and.w r3, r3, #63 ; 0x3f + 802fb4e: 613b str r3, [r7, #16] pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); - 802facc: 4b82 ldr r3, [pc, #520] ; (802fcd8 ) - 802face: 6adb ldr r3, [r3, #44] ; 0x2c - 802fad0: f003 0301 and.w r3, r3, #1 - 802fad4: 60fb str r3, [r7, #12] + 802fb50: 4b82 ldr r3, [pc, #520] ; (802fd5c ) + 802fb52: 6adb ldr r3, [r3, #44] ; 0x2c + 802fb54: f003 0301 and.w r3, r3, #1 + 802fb58: 60fb str r3, [r7, #12] fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3)); - 802fad6: 4b80 ldr r3, [pc, #512] ; (802fcd8 ) - 802fad8: 6b5b ldr r3, [r3, #52] ; 0x34 - 802fada: 08db lsrs r3, r3, #3 - 802fadc: f3c3 030c ubfx r3, r3, #0, #13 - 802fae0: 68fa ldr r2, [r7, #12] - 802fae2: fb02 f303 mul.w r3, r2, r3 - 802fae6: ee07 3a90 vmov s15, r3 - 802faea: eef8 7a67 vcvt.f32.u32 s15, s15 - 802faee: edc7 7a02 vstr s15, [r7, #8] + 802fb5a: 4b80 ldr r3, [pc, #512] ; (802fd5c ) + 802fb5c: 6b5b ldr r3, [r3, #52] ; 0x34 + 802fb5e: 08db lsrs r3, r3, #3 + 802fb60: f3c3 030c ubfx r3, r3, #0, #13 + 802fb64: 68fa ldr r2, [r7, #12] + 802fb66: fb02 f303 mul.w r3, r2, r3 + 802fb6a: ee07 3a90 vmov s15, r3 + 802fb6e: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fb72: edc7 7a02 vstr s15, [r7, #8] if (pllm != 0U) - 802faf2: 693b ldr r3, [r7, #16] - 802faf4: 2b00 cmp r3, #0 - 802faf6: f000 80e1 beq.w 802fcbc - 802fafa: 697b ldr r3, [r7, #20] - 802fafc: 2b02 cmp r3, #2 - 802fafe: f000 8083 beq.w 802fc08 - 802fb02: 697b ldr r3, [r7, #20] - 802fb04: 2b02 cmp r3, #2 - 802fb06: f200 80a1 bhi.w 802fc4c - 802fb0a: 697b ldr r3, [r7, #20] - 802fb0c: 2b00 cmp r3, #0 - 802fb0e: d003 beq.n 802fb18 - 802fb10: 697b ldr r3, [r7, #20] - 802fb12: 2b01 cmp r3, #1 - 802fb14: d056 beq.n 802fbc4 - 802fb16: e099 b.n 802fc4c + 802fb76: 693b ldr r3, [r7, #16] + 802fb78: 2b00 cmp r3, #0 + 802fb7a: f000 80e1 beq.w 802fd40 + 802fb7e: 697b ldr r3, [r7, #20] + 802fb80: 2b02 cmp r3, #2 + 802fb82: f000 8083 beq.w 802fc8c + 802fb86: 697b ldr r3, [r7, #20] + 802fb88: 2b02 cmp r3, #2 + 802fb8a: f200 80a1 bhi.w 802fcd0 + 802fb8e: 697b ldr r3, [r7, #20] + 802fb90: 2b00 cmp r3, #0 + 802fb92: d003 beq.n 802fb9c + 802fb94: 697b ldr r3, [r7, #20] + 802fb96: 2b01 cmp r3, #1 + 802fb98: d056 beq.n 802fc48 + 802fb9a: e099 b.n 802fcd0 { switch (pllsource) { case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 802fb18: 4b6f ldr r3, [pc, #444] ; (802fcd8 ) - 802fb1a: 681b ldr r3, [r3, #0] - 802fb1c: f003 0320 and.w r3, r3, #32 - 802fb20: 2b00 cmp r3, #0 - 802fb22: d02d beq.n 802fb80 + 802fb9c: 4b6f ldr r3, [pc, #444] ; (802fd5c ) + 802fb9e: 681b ldr r3, [r3, #0] + 802fba0: f003 0320 and.w r3, r3, #32 + 802fba4: 2b00 cmp r3, #0 + 802fba6: d02d beq.n 802fc04 { hsivalue= (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 802fb24: 4b6c ldr r3, [pc, #432] ; (802fcd8 ) - 802fb26: 681b ldr r3, [r3, #0] - 802fb28: 08db lsrs r3, r3, #3 - 802fb2a: f003 0303 and.w r3, r3, #3 - 802fb2e: 4a6b ldr r2, [pc, #428] ; (802fcdc ) - 802fb30: fa22 f303 lsr.w r3, r2, r3 - 802fb34: 607b str r3, [r7, #4] + 802fba8: 4b6c ldr r3, [pc, #432] ; (802fd5c ) + 802fbaa: 681b ldr r3, [r3, #0] + 802fbac: 08db lsrs r3, r3, #3 + 802fbae: f003 0303 and.w r3, r3, #3 + 802fbb2: 4a6b ldr r2, [pc, #428] ; (802fd60 ) + 802fbb4: fa22 f303 lsr.w r3, r2, r3 + 802fbb8: 607b str r3, [r7, #4] pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fb36: 687b ldr r3, [r7, #4] - 802fb38: ee07 3a90 vmov s15, r3 - 802fb3c: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fb40: 693b ldr r3, [r7, #16] - 802fb42: ee07 3a90 vmov s15, r3 - 802fb46: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fb4a: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fb4e: 4b62 ldr r3, [pc, #392] ; (802fcd8 ) - 802fb50: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fb52: f3c3 0308 ubfx r3, r3, #0, #9 - 802fb56: ee07 3a90 vmov s15, r3 - 802fb5a: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fb5e: ed97 6a02 vldr s12, [r7, #8] - 802fb62: eddf 5a61 vldr s11, [pc, #388] ; 802fce8 - 802fb66: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fb6a: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fb6e: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fb72: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fb76: ee67 7a27 vmul.f32 s15, s14, s15 - 802fb7a: edc7 7a07 vstr s15, [r7, #28] + 802fbba: 687b ldr r3, [r7, #4] + 802fbbc: ee07 3a90 vmov s15, r3 + 802fbc0: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fbc4: 693b ldr r3, [r7, #16] + 802fbc6: ee07 3a90 vmov s15, r3 + 802fbca: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fbce: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fbd2: 4b62 ldr r3, [pc, #392] ; (802fd5c ) + 802fbd4: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fbd6: f3c3 0308 ubfx r3, r3, #0, #9 + 802fbda: ee07 3a90 vmov s15, r3 + 802fbde: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fbe2: ed97 6a02 vldr s12, [r7, #8] + 802fbe6: eddf 5a61 vldr s11, [pc, #388] ; 802fd6c + 802fbea: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fbee: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fbf2: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fbf6: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fbfa: ee67 7a27 vmul.f32 s15, s14, s15 + 802fbfe: edc7 7a07 vstr s15, [r7, #28] } else { pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); } break; - 802fb7e: e087 b.n 802fc90 + 802fc02: e087 b.n 802fd14 pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fb80: 693b ldr r3, [r7, #16] - 802fb82: ee07 3a90 vmov s15, r3 - 802fb86: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fb8a: eddf 6a58 vldr s13, [pc, #352] ; 802fcec - 802fb8e: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fb92: 4b51 ldr r3, [pc, #324] ; (802fcd8 ) - 802fb94: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fb96: f3c3 0308 ubfx r3, r3, #0, #9 - 802fb9a: ee07 3a90 vmov s15, r3 - 802fb9e: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fba2: ed97 6a02 vldr s12, [r7, #8] - 802fba6: eddf 5a50 vldr s11, [pc, #320] ; 802fce8 - 802fbaa: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fbae: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fbb2: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fbb6: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fbba: ee67 7a27 vmul.f32 s15, s14, s15 - 802fbbe: edc7 7a07 vstr s15, [r7, #28] + 802fc04: 693b ldr r3, [r7, #16] + 802fc06: ee07 3a90 vmov s15, r3 + 802fc0a: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fc0e: eddf 6a58 vldr s13, [pc, #352] ; 802fd70 + 802fc12: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fc16: 4b51 ldr r3, [pc, #324] ; (802fd5c ) + 802fc18: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fc1a: f3c3 0308 ubfx r3, r3, #0, #9 + 802fc1e: ee07 3a90 vmov s15, r3 + 802fc22: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fc26: ed97 6a02 vldr s12, [r7, #8] + 802fc2a: eddf 5a50 vldr s11, [pc, #320] ; 802fd6c + 802fc2e: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fc32: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fc36: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fc3a: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fc3e: ee67 7a27 vmul.f32 s15, s14, s15 + 802fc42: edc7 7a07 vstr s15, [r7, #28] break; - 802fbc2: e065 b.n 802fc90 + 802fc46: e065 b.n 802fd14 case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */ pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fbc4: 693b ldr r3, [r7, #16] - 802fbc6: ee07 3a90 vmov s15, r3 - 802fbca: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fbce: eddf 6a48 vldr s13, [pc, #288] ; 802fcf0 - 802fbd2: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fbd6: 4b40 ldr r3, [pc, #256] ; (802fcd8 ) - 802fbd8: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fbda: f3c3 0308 ubfx r3, r3, #0, #9 - 802fbde: ee07 3a90 vmov s15, r3 - 802fbe2: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fbe6: ed97 6a02 vldr s12, [r7, #8] - 802fbea: eddf 5a3f vldr s11, [pc, #252] ; 802fce8 - 802fbee: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fbf2: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fbf6: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fbfa: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fbfe: ee67 7a27 vmul.f32 s15, s14, s15 - 802fc02: edc7 7a07 vstr s15, [r7, #28] + 802fc48: 693b ldr r3, [r7, #16] + 802fc4a: ee07 3a90 vmov s15, r3 + 802fc4e: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fc52: eddf 6a48 vldr s13, [pc, #288] ; 802fd74 + 802fc56: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fc5a: 4b40 ldr r3, [pc, #256] ; (802fd5c ) + 802fc5c: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fc5e: f3c3 0308 ubfx r3, r3, #0, #9 + 802fc62: ee07 3a90 vmov s15, r3 + 802fc66: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fc6a: ed97 6a02 vldr s12, [r7, #8] + 802fc6e: eddf 5a3f vldr s11, [pc, #252] ; 802fd6c + 802fc72: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fc76: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fc7a: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fc7e: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fc82: ee67 7a27 vmul.f32 s15, s14, s15 + 802fc86: edc7 7a07 vstr s15, [r7, #28] break; - 802fc06: e043 b.n 802fc90 + 802fc8a: e043 b.n 802fd14 case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fc08: 693b ldr r3, [r7, #16] - 802fc0a: ee07 3a90 vmov s15, r3 - 802fc0e: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fc12: eddf 6a38 vldr s13, [pc, #224] ; 802fcf4 - 802fc16: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fc1a: 4b2f ldr r3, [pc, #188] ; (802fcd8 ) - 802fc1c: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fc1e: f3c3 0308 ubfx r3, r3, #0, #9 - 802fc22: ee07 3a90 vmov s15, r3 - 802fc26: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fc2a: ed97 6a02 vldr s12, [r7, #8] - 802fc2e: eddf 5a2e vldr s11, [pc, #184] ; 802fce8 - 802fc32: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fc36: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fc3a: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fc3e: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fc42: ee67 7a27 vmul.f32 s15, s14, s15 - 802fc46: edc7 7a07 vstr s15, [r7, #28] + 802fc8c: 693b ldr r3, [r7, #16] + 802fc8e: ee07 3a90 vmov s15, r3 + 802fc92: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fc96: eddf 6a38 vldr s13, [pc, #224] ; 802fd78 + 802fc9a: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fc9e: 4b2f ldr r3, [pc, #188] ; (802fd5c ) + 802fca0: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fca2: f3c3 0308 ubfx r3, r3, #0, #9 + 802fca6: ee07 3a90 vmov s15, r3 + 802fcaa: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fcae: ed97 6a02 vldr s12, [r7, #8] + 802fcb2: eddf 5a2e vldr s11, [pc, #184] ; 802fd6c + 802fcb6: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fcba: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fcbe: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fcc2: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fcc6: ee67 7a27 vmul.f32 s15, s14, s15 + 802fcca: edc7 7a07 vstr s15, [r7, #28] break; - 802fc4a: e021 b.n 802fc90 + 802fcce: e021 b.n 802fd14 default: pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 802fc4c: 693b ldr r3, [r7, #16] - 802fc4e: ee07 3a90 vmov s15, r3 - 802fc52: eef8 7a67 vcvt.f32.u32 s15, s15 - 802fc56: eddf 6a26 vldr s13, [pc, #152] ; 802fcf0 - 802fc5a: ee86 7aa7 vdiv.f32 s14, s13, s15 - 802fc5e: 4b1e ldr r3, [pc, #120] ; (802fcd8 ) - 802fc60: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fc62: f3c3 0308 ubfx r3, r3, #0, #9 - 802fc66: ee07 3a90 vmov s15, r3 - 802fc6a: eef8 6a67 vcvt.f32.u32 s13, s15 - 802fc6e: ed97 6a02 vldr s12, [r7, #8] - 802fc72: eddf 5a1d vldr s11, [pc, #116] ; 802fce8 - 802fc76: eec6 7a25 vdiv.f32 s15, s12, s11 - 802fc7a: ee76 7aa7 vadd.f32 s15, s13, s15 - 802fc7e: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 802fc82: ee77 7aa6 vadd.f32 s15, s15, s13 - 802fc86: ee67 7a27 vmul.f32 s15, s14, s15 - 802fc8a: edc7 7a07 vstr s15, [r7, #28] + 802fcd0: 693b ldr r3, [r7, #16] + 802fcd2: ee07 3a90 vmov s15, r3 + 802fcd6: eef8 7a67 vcvt.f32.u32 s15, s15 + 802fcda: eddf 6a26 vldr s13, [pc, #152] ; 802fd74 + 802fcde: ee86 7aa7 vdiv.f32 s14, s13, s15 + 802fce2: 4b1e ldr r3, [pc, #120] ; (802fd5c ) + 802fce4: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fce6: f3c3 0308 ubfx r3, r3, #0, #9 + 802fcea: ee07 3a90 vmov s15, r3 + 802fcee: eef8 6a67 vcvt.f32.u32 s13, s15 + 802fcf2: ed97 6a02 vldr s12, [r7, #8] + 802fcf6: eddf 5a1d vldr s11, [pc, #116] ; 802fd6c + 802fcfa: eec6 7a25 vdiv.f32 s15, s12, s11 + 802fcfe: ee76 7aa7 vadd.f32 s15, s13, s15 + 802fd02: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 802fd06: ee77 7aa6 vadd.f32 s15, s15, s13 + 802fd0a: ee67 7a27 vmul.f32 s15, s14, s15 + 802fd0e: edc7 7a07 vstr s15, [r7, #28] break; - 802fc8e: bf00 nop + 802fd12: bf00 nop } pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ; - 802fc90: 4b11 ldr r3, [pc, #68] ; (802fcd8 ) - 802fc92: 6b1b ldr r3, [r3, #48] ; 0x30 - 802fc94: 0a5b lsrs r3, r3, #9 - 802fc96: f003 037f and.w r3, r3, #127 ; 0x7f - 802fc9a: 3301 adds r3, #1 - 802fc9c: 603b str r3, [r7, #0] + 802fd14: 4b11 ldr r3, [pc, #68] ; (802fd5c ) + 802fd16: 6b1b ldr r3, [r3, #48] ; 0x30 + 802fd18: 0a5b lsrs r3, r3, #9 + 802fd1a: f003 037f and.w r3, r3, #127 ; 0x7f + 802fd1e: 3301 adds r3, #1 + 802fd20: 603b str r3, [r7, #0] sysclockfreq = (uint32_t)(float_t)(pllvco/(float_t)pllp); - 802fc9e: 683b ldr r3, [r7, #0] - 802fca0: ee07 3a90 vmov s15, r3 - 802fca4: eeb8 7a67 vcvt.f32.u32 s14, s15 - 802fca8: edd7 6a07 vldr s13, [r7, #28] - 802fcac: eec6 7a87 vdiv.f32 s15, s13, s14 - 802fcb0: eefc 7ae7 vcvt.u32.f32 s15, s15 - 802fcb4: ee17 3a90 vmov r3, s15 - 802fcb8: 61bb str r3, [r7, #24] + 802fd22: 683b ldr r3, [r7, #0] + 802fd24: ee07 3a90 vmov s15, r3 + 802fd28: eeb8 7a67 vcvt.f32.u32 s14, s15 + 802fd2c: edd7 6a07 vldr s13, [r7, #28] + 802fd30: eec6 7a87 vdiv.f32 s15, s13, s14 + 802fd34: eefc 7ae7 vcvt.u32.f32 s15, s15 + 802fd38: ee17 3a90 vmov r3, s15 + 802fd3c: 61bb str r3, [r7, #24] } else { sysclockfreq = 0U; } break; - 802fcba: e005 b.n 802fcc8 + 802fd3e: e005 b.n 802fd4c sysclockfreq = 0U; - 802fcbc: 2300 movs r3, #0 - 802fcbe: 61bb str r3, [r7, #24] + 802fd40: 2300 movs r3, #0 + 802fd42: 61bb str r3, [r7, #24] break; - 802fcc0: e002 b.n 802fcc8 + 802fd44: e002 b.n 802fd4c default: sysclockfreq = CSI_VALUE; - 802fcc2: 4b07 ldr r3, [pc, #28] ; (802fce0 ) - 802fcc4: 61bb str r3, [r7, #24] + 802fd46: 4b07 ldr r3, [pc, #28] ; (802fd64 ) + 802fd48: 61bb str r3, [r7, #24] break; - 802fcc6: bf00 nop + 802fd4a: bf00 nop } return sysclockfreq; - 802fcc8: 69bb ldr r3, [r7, #24] -} - 802fcca: 4618 mov r0, r3 - 802fccc: 3724 adds r7, #36 ; 0x24 - 802fcce: 46bd mov sp, r7 - 802fcd0: f85d 7b04 ldr.w r7, [sp], #4 - 802fcd4: 4770 bx lr - 802fcd6: bf00 nop - 802fcd8: 58024400 .word 0x58024400 - 802fcdc: 03d09000 .word 0x03d09000 - 802fce0: 003d0900 .word 0x003d0900 - 802fce4: 017d7840 .word 0x017d7840 - 802fce8: 46000000 .word 0x46000000 - 802fcec: 4c742400 .word 0x4c742400 - 802fcf0: 4a742400 .word 0x4a742400 - 802fcf4: 4bbebc20 .word 0x4bbebc20 - -0802fcf8 : + 802fd4c: 69bb ldr r3, [r7, #24] +} + 802fd4e: 4618 mov r0, r3 + 802fd50: 3724 adds r7, #36 ; 0x24 + 802fd52: 46bd mov sp, r7 + 802fd54: f85d 7b04 ldr.w r7, [sp], #4 + 802fd58: 4770 bx lr + 802fd5a: bf00 nop + 802fd5c: 58024400 .word 0x58024400 + 802fd60: 03d09000 .word 0x03d09000 + 802fd64: 003d0900 .word 0x003d0900 + 802fd68: 017d7840 .word 0x017d7840 + 802fd6c: 46000000 .word 0x46000000 + 802fd70: 4c742400 .word 0x4c742400 + 802fd74: 4a742400 .word 0x4a742400 + 802fd78: 4bbebc20 .word 0x4bbebc20 + +0802fd7c : * @note The SystemD2Clock CMSIS variable is used to store System domain2 Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 802fcf8: b580 push {r7, lr} - 802fcfa: b082 sub sp, #8 - 802fcfc: af00 add r7, sp, #0 + 802fd7c: b580 push {r7, lr} + 802fd7e: b082 sub sp, #8 + 802fd80: af00 add r7, sp, #0 uint32_t common_system_clock; #if defined(RCC_D1CFGR_D1CPRE) common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos] & 0x1FU); - 802fcfe: f7ff fe81 bl 802fa04 - 802fd02: 4602 mov r2, r0 - 802fd04: 4b10 ldr r3, [pc, #64] ; (802fd48 ) - 802fd06: 699b ldr r3, [r3, #24] - 802fd08: 0a1b lsrs r3, r3, #8 - 802fd0a: f003 030f and.w r3, r3, #15 - 802fd0e: 490f ldr r1, [pc, #60] ; (802fd4c ) - 802fd10: 5ccb ldrb r3, [r1, r3] - 802fd12: f003 031f and.w r3, r3, #31 - 802fd16: fa22 f303 lsr.w r3, r2, r3 - 802fd1a: 607b str r3, [r7, #4] + 802fd82: f7ff fe81 bl 802fa88 + 802fd86: 4602 mov r2, r0 + 802fd88: 4b10 ldr r3, [pc, #64] ; (802fdcc ) + 802fd8a: 699b ldr r3, [r3, #24] + 802fd8c: 0a1b lsrs r3, r3, #8 + 802fd8e: f003 030f and.w r3, r3, #15 + 802fd92: 490f ldr r1, [pc, #60] ; (802fdd0 ) + 802fd94: 5ccb ldrb r3, [r1, r3] + 802fd96: f003 031f and.w r3, r3, #31 + 802fd9a: fa22 f303 lsr.w r3, r2, r3 + 802fd9e: 607b str r3, [r7, #4] #else common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos] & 0x1FU); #endif #if defined(RCC_D1CFGR_HPRE) SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); - 802fd1c: 4b0a ldr r3, [pc, #40] ; (802fd48 ) - 802fd1e: 699b ldr r3, [r3, #24] - 802fd20: f003 030f and.w r3, r3, #15 - 802fd24: 4a09 ldr r2, [pc, #36] ; (802fd4c ) - 802fd26: 5cd3 ldrb r3, [r2, r3] - 802fd28: f003 031f and.w r3, r3, #31 - 802fd2c: 687a ldr r2, [r7, #4] - 802fd2e: fa22 f303 lsr.w r3, r2, r3 - 802fd32: 4a07 ldr r2, [pc, #28] ; (802fd50 ) - 802fd34: 6013 str r3, [r2, #0] + 802fda0: 4b0a ldr r3, [pc, #40] ; (802fdcc ) + 802fda2: 699b ldr r3, [r3, #24] + 802fda4: f003 030f and.w r3, r3, #15 + 802fda8: 4a09 ldr r2, [pc, #36] ; (802fdd0 ) + 802fdaa: 5cd3 ldrb r3, [r2, r3] + 802fdac: f003 031f and.w r3, r3, #31 + 802fdb0: 687a ldr r2, [r7, #4] + 802fdb2: fa22 f303 lsr.w r3, r2, r3 + 802fdb6: 4a07 ldr r2, [pc, #28] ; (802fdd4 ) + 802fdb8: 6013 str r3, [r2, #0] #endif #if defined(DUAL_CORE) && defined(CORE_CM4) SystemCoreClock = SystemD2Clock; #else SystemCoreClock = common_system_clock; - 802fd36: 4a07 ldr r2, [pc, #28] ; (802fd54 ) - 802fd38: 687b ldr r3, [r7, #4] - 802fd3a: 6013 str r3, [r2, #0] + 802fdba: 4a07 ldr r2, [pc, #28] ; (802fdd8 ) + 802fdbc: 687b ldr r3, [r7, #4] + 802fdbe: 6013 str r3, [r2, #0] #endif /* DUAL_CORE && CORE_CM4 */ return SystemD2Clock; - 802fd3c: 4b04 ldr r3, [pc, #16] ; (802fd50 ) - 802fd3e: 681b ldr r3, [r3, #0] -} - 802fd40: 4618 mov r0, r3 - 802fd42: 3708 adds r7, #8 - 802fd44: 46bd mov sp, r7 - 802fd46: bd80 pop {r7, pc} - 802fd48: 58024400 .word 0x58024400 - 802fd4c: 08044cd4 .word 0x08044cd4 - 802fd50: 2400004c .word 0x2400004c - 802fd54: 24000048 .word 0x24000048 - -0802fd58 : + 802fdc0: 4b04 ldr r3, [pc, #16] ; (802fdd4 ) + 802fdc2: 681b ldr r3, [r3, #0] +} + 802fdc4: 4618 mov r0, r3 + 802fdc6: 3708 adds r7, #8 + 802fdc8: 46bd mov sp, r7 + 802fdca: bd80 pop {r7, pc} + 802fdcc: 58024400 .word 0x58024400 + 802fdd0: 08044d54 .word 0x08044d54 + 802fdd4: 2400004c .word 0x2400004c + 802fdd8: 24000048 .word 0x24000048 + +0802fddc : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 802fd58: b580 push {r7, lr} - 802fd5a: af00 add r7, sp, #0 + 802fddc: b580 push {r7, lr} + 802fdde: af00 add r7, sp, #0 #if defined (RCC_D2CFGR_D2PPRE1) /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1)>> RCC_D2CFGR_D2PPRE1_Pos]) & 0x1FU)); - 802fd5c: f7ff ffcc bl 802fcf8 - 802fd60: 4602 mov r2, r0 - 802fd62: 4b06 ldr r3, [pc, #24] ; (802fd7c ) - 802fd64: 69db ldr r3, [r3, #28] - 802fd66: 091b lsrs r3, r3, #4 - 802fd68: f003 0307 and.w r3, r3, #7 - 802fd6c: 4904 ldr r1, [pc, #16] ; (802fd80 ) - 802fd6e: 5ccb ldrb r3, [r1, r3] - 802fd70: f003 031f and.w r3, r3, #31 - 802fd74: fa22 f303 lsr.w r3, r2, r3 + 802fde0: f7ff ffcc bl 802fd7c + 802fde4: 4602 mov r2, r0 + 802fde6: 4b06 ldr r3, [pc, #24] ; (802fe00 ) + 802fde8: 69db ldr r3, [r3, #28] + 802fdea: 091b lsrs r3, r3, #4 + 802fdec: f003 0307 and.w r3, r3, #7 + 802fdf0: 4904 ldr r1, [pc, #16] ; (802fe04 ) + 802fdf2: 5ccb ldrb r3, [r1, r3] + 802fdf4: f003 031f and.w r3, r3, #31 + 802fdf8: fa22 f303 lsr.w r3, r2, r3 #else /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1)>> RCC_CDCFGR2_CDPPRE1_Pos]) & 0x1FU)); #endif } - 802fd78: 4618 mov r0, r3 - 802fd7a: bd80 pop {r7, pc} - 802fd7c: 58024400 .word 0x58024400 - 802fd80: 08044cd4 .word 0x08044cd4 + 802fdfc: 4618 mov r0, r3 + 802fdfe: bd80 pop {r7, pc} + 802fe00: 58024400 .word 0x58024400 + 802fe04: 08044d54 .word 0x08044d54 -0802fd84 : +0802fe08 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 802fd84: b580 push {r7, lr} - 802fd86: af00 add r7, sp, #0 + 802fe08: b580 push {r7, lr} + 802fe0a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ #if defined(RCC_D2CFGR_D2PPRE2) return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2)>> RCC_D2CFGR_D2PPRE2_Pos]) & 0x1FU)); - 802fd88: f7ff ffb6 bl 802fcf8 - 802fd8c: 4602 mov r2, r0 - 802fd8e: 4b06 ldr r3, [pc, #24] ; (802fda8 ) - 802fd90: 69db ldr r3, [r3, #28] - 802fd92: 0a1b lsrs r3, r3, #8 - 802fd94: f003 0307 and.w r3, r3, #7 - 802fd98: 4904 ldr r1, [pc, #16] ; (802fdac ) - 802fd9a: 5ccb ldrb r3, [r1, r3] - 802fd9c: f003 031f and.w r3, r3, #31 - 802fda0: fa22 f303 lsr.w r3, r2, r3 + 802fe0c: f7ff ffb6 bl 802fd7c + 802fe10: 4602 mov r2, r0 + 802fe12: 4b06 ldr r3, [pc, #24] ; (802fe2c ) + 802fe14: 69db ldr r3, [r3, #28] + 802fe16: 0a1b lsrs r3, r3, #8 + 802fe18: f003 0307 and.w r3, r3, #7 + 802fe1c: 4904 ldr r1, [pc, #16] ; (802fe30 ) + 802fe1e: 5ccb ldrb r3, [r1, r3] + 802fe20: f003 031f and.w r3, r3, #31 + 802fe24: fa22 f303 lsr.w r3, r2, r3 #else return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2)>> RCC_CDCFGR2_CDPPRE2_Pos]) & 0x1FU)); #endif } - 802fda4: 4618 mov r0, r3 - 802fda6: bd80 pop {r7, pc} - 802fda8: 58024400 .word 0x58024400 - 802fdac: 08044cd4 .word 0x08044cd4 + 802fe28: 4618 mov r0, r3 + 802fe2a: bd80 pop {r7, pc} + 802fe2c: 58024400 .word 0x58024400 + 802fe30: 08044d54 .word 0x08044d54 -0802fdb0 : +0802fe34 : * (*) : Available on some STM32H7 lines only. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 802fdb0: b580 push {r7, lr} - 802fdb2: b086 sub sp, #24 - 802fdb4: af00 add r7, sp, #0 - 802fdb6: 6078 str r0, [r7, #4] + 802fe34: b580 push {r7, lr} + 802fe36: b086 sub sp, #24 + 802fe38: af00 add r7, sp, #0 + 802fe3a: 6078 str r0, [r7, #4] uint32_t tmpreg; uint32_t tickstart; HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */ - 802fdb8: 2300 movs r3, #0 - 802fdba: 75fb strb r3, [r7, #23] + 802fe3c: 2300 movs r3, #0 + 802fe3e: 75fb strb r3, [r7, #23] HAL_StatusTypeDef status = HAL_OK; /* Final status */ - 802fdbc: 2300 movs r3, #0 - 802fdbe: 75bb strb r3, [r7, #22] + 802fe40: 2300 movs r3, #0 + 802fe42: 75bb strb r3, [r7, #22] /*---------------------------- SPDIFRX configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) - 802fdc0: 687b ldr r3, [r7, #4] - 802fdc2: 681b ldr r3, [r3, #0] - 802fdc4: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 802fdc8: 2b00 cmp r3, #0 - 802fdca: d03f beq.n 802fe4c + 802fe44: 687b ldr r3, [r7, #4] + 802fe46: 681b ldr r3, [r3, #0] + 802fe48: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 802fe4c: 2b00 cmp r3, #0 + 802fe4e: d03f beq.n 802fed0 { switch(PeriphClkInit->SpdifrxClockSelection) - 802fdcc: 687b ldr r3, [r7, #4] - 802fdce: 6e5b ldr r3, [r3, #100] ; 0x64 - 802fdd0: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 - 802fdd4: d02a beq.n 802fe2c - 802fdd6: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 - 802fdda: d824 bhi.n 802fe26 - 802fddc: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 802fde0: d018 beq.n 802fe14 - 802fde2: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 802fde6: d81e bhi.n 802fe26 - 802fde8: 2b00 cmp r3, #0 - 802fdea: d003 beq.n 802fdf4 - 802fdec: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 802fdf0: d007 beq.n 802fe02 - 802fdf2: e018 b.n 802fe26 + 802fe50: 687b ldr r3, [r7, #4] + 802fe52: 6e5b ldr r3, [r3, #100] ; 0x64 + 802fe54: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 + 802fe58: d02a beq.n 802feb0 + 802fe5a: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 + 802fe5e: d824 bhi.n 802feaa + 802fe60: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 802fe64: d018 beq.n 802fe98 + 802fe66: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 802fe6a: d81e bhi.n 802feaa + 802fe6c: 2b00 cmp r3, #0 + 802fe6e: d003 beq.n 802fe78 + 802fe70: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 802fe74: d007 beq.n 802fe86 + 802fe76: e018 b.n 802feaa { case RCC_SPDIFRXCLKSOURCE_PLL: /* PLL is used as clock source for SPDIFRX*/ /* Enable PLL1Q Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802fdf4: 4ba3 ldr r3, [pc, #652] ; (8030084 ) - 802fdf6: 6adb ldr r3, [r3, #44] ; 0x2c - 802fdf8: 4aa2 ldr r2, [pc, #648] ; (8030084 ) - 802fdfa: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802fdfe: 62d3 str r3, [r2, #44] ; 0x2c + 802fe78: 4ba3 ldr r3, [pc, #652] ; (8030108 ) + 802fe7a: 6adb ldr r3, [r3, #44] ; 0x2c + 802fe7c: 4aa2 ldr r2, [pc, #648] ; (8030108 ) + 802fe7e: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802fe82: 62d3 str r3, [r2, #44] ; 0x2c /* SPDIFRX clock source configuration done later after clock selection check */ break; - 802fe00: e015 b.n 802fe2e + 802fe84: e015 b.n 802feb2 case RCC_SPDIFRXCLKSOURCE_PLL2: /* PLL2 is used as clock source for SPDIFRX*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_R_UPDATE); - 802fe02: 687b ldr r3, [r7, #4] - 802fe04: 3304 adds r3, #4 - 802fe06: 2102 movs r1, #2 - 802fe08: 4618 mov r0, r3 - 802fe0a: f001 fff9 bl 8031e00 - 802fe0e: 4603 mov r3, r0 - 802fe10: 75fb strb r3, [r7, #23] + 802fe86: 687b ldr r3, [r7, #4] + 802fe88: 3304 adds r3, #4 + 802fe8a: 2102 movs r1, #2 + 802fe8c: 4618 mov r0, r3 + 802fe8e: f001 fff9 bl 8031e84 + 802fe92: 4603 mov r3, r0 + 802fe94: 75fb strb r3, [r7, #23] /* SPDIFRX clock source configuration done later after clock selection check */ break; - 802fe12: e00c b.n 802fe2e + 802fe96: e00c b.n 802feb2 case RCC_SPDIFRXCLKSOURCE_PLL3: /* PLL3 is used as clock source for SPDIFRX*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 802fe14: 687b ldr r3, [r7, #4] - 802fe16: 3324 adds r3, #36 ; 0x24 - 802fe18: 2102 movs r1, #2 - 802fe1a: 4618 mov r0, r3 - 802fe1c: f002 f8a2 bl 8031f64 - 802fe20: 4603 mov r3, r0 - 802fe22: 75fb strb r3, [r7, #23] + 802fe98: 687b ldr r3, [r7, #4] + 802fe9a: 3324 adds r3, #36 ; 0x24 + 802fe9c: 2102 movs r1, #2 + 802fe9e: 4618 mov r0, r3 + 802fea0: f002 f8a2 bl 8031fe8 + 802fea4: 4603 mov r3, r0 + 802fea6: 75fb strb r3, [r7, #23] /* SPDIFRX clock source configuration done later after clock selection check */ break; - 802fe24: e003 b.n 802fe2e + 802fea8: e003 b.n 802feb2 /* Internal OSC clock is used as source of SPDIFRX clock*/ /* SPDIFRX clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 802fe26: 2301 movs r3, #1 - 802fe28: 75fb strb r3, [r7, #23] + 802feaa: 2301 movs r3, #1 + 802feac: 75fb strb r3, [r7, #23] break; - 802fe2a: e000 b.n 802fe2e + 802feae: e000 b.n 802feb2 break; - 802fe2c: bf00 nop + 802feb0: bf00 nop } if(ret == HAL_OK) - 802fe2e: 7dfb ldrb r3, [r7, #23] - 802fe30: 2b00 cmp r3, #0 - 802fe32: d109 bne.n 802fe48 + 802feb2: 7dfb ldrb r3, [r7, #23] + 802feb4: 2b00 cmp r3, #0 + 802feb6: d109 bne.n 802fecc { /* Set the source of SPDIFRX clock*/ __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifrxClockSelection); - 802fe34: 4b93 ldr r3, [pc, #588] ; (8030084 ) - 802fe36: 6d1b ldr r3, [r3, #80] ; 0x50 - 802fe38: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 - 802fe3c: 687b ldr r3, [r7, #4] - 802fe3e: 6e5b ldr r3, [r3, #100] ; 0x64 - 802fe40: 4990 ldr r1, [pc, #576] ; (8030084 ) - 802fe42: 4313 orrs r3, r2 - 802fe44: 650b str r3, [r1, #80] ; 0x50 - 802fe46: e001 b.n 802fe4c + 802feb8: 4b93 ldr r3, [pc, #588] ; (8030108 ) + 802feba: 6d1b ldr r3, [r3, #80] ; 0x50 + 802febc: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 + 802fec0: 687b ldr r3, [r7, #4] + 802fec2: 6e5b ldr r3, [r3, #100] ; 0x64 + 802fec4: 4990 ldr r1, [pc, #576] ; (8030108 ) + 802fec6: 4313 orrs r3, r2 + 802fec8: 650b str r3, [r1, #80] ; 0x50 + 802feca: e001 b.n 802fed0 } else { /* set overall return value */ status = ret; - 802fe48: 7dfb ldrb r3, [r7, #23] - 802fe4a: 75bb strb r3, [r7, #22] + 802fecc: 7dfb ldrb r3, [r7, #23] + 802fece: 75bb strb r3, [r7, #22] } } /*---------------------------- SAI1 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) - 802fe4c: 687b ldr r3, [r7, #4] - 802fe4e: 681b ldr r3, [r3, #0] - 802fe50: f403 7380 and.w r3, r3, #256 ; 0x100 - 802fe54: 2b00 cmp r3, #0 - 802fe56: d03d beq.n 802fed4 + 802fed0: 687b ldr r3, [r7, #4] + 802fed2: 681b ldr r3, [r3, #0] + 802fed4: f403 7380 and.w r3, r3, #256 ; 0x100 + 802fed8: 2b00 cmp r3, #0 + 802feda: d03d beq.n 802ff58 { switch(PeriphClkInit->Sai1ClockSelection) - 802fe58: 687b ldr r3, [r7, #4] - 802fe5a: 6d5b ldr r3, [r3, #84] ; 0x54 - 802fe5c: 2b04 cmp r3, #4 - 802fe5e: d826 bhi.n 802feae - 802fe60: a201 add r2, pc, #4 ; (adr r2, 802fe68 ) - 802fe62: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 802fe66: bf00 nop - 802fe68: 0802fe7d .word 0x0802fe7d - 802fe6c: 0802fe8b .word 0x0802fe8b - 802fe70: 0802fe9d .word 0x0802fe9d - 802fe74: 0802feb5 .word 0x0802feb5 - 802fe78: 0802feb5 .word 0x0802feb5 + 802fedc: 687b ldr r3, [r7, #4] + 802fede: 6d5b ldr r3, [r3, #84] ; 0x54 + 802fee0: 2b04 cmp r3, #4 + 802fee2: d826 bhi.n 802ff32 + 802fee4: a201 add r2, pc, #4 ; (adr r2, 802feec ) + 802fee6: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 802feea: bf00 nop + 802feec: 0802ff01 .word 0x0802ff01 + 802fef0: 0802ff0f .word 0x0802ff0f + 802fef4: 0802ff21 .word 0x0802ff21 + 802fef8: 0802ff39 .word 0x0802ff39 + 802fefc: 0802ff39 .word 0x0802ff39 { case RCC_SAI1CLKSOURCE_PLL: /* PLL is used as clock source for SAI1*/ /* Enable SAI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802fe7c: 4b81 ldr r3, [pc, #516] ; (8030084 ) - 802fe7e: 6adb ldr r3, [r3, #44] ; 0x2c - 802fe80: 4a80 ldr r2, [pc, #512] ; (8030084 ) - 802fe82: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802fe86: 62d3 str r3, [r2, #44] ; 0x2c + 802ff00: 4b81 ldr r3, [pc, #516] ; (8030108 ) + 802ff02: 6adb ldr r3, [r3, #44] ; 0x2c + 802ff04: 4a80 ldr r2, [pc, #512] ; (8030108 ) + 802ff06: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802ff0a: 62d3 str r3, [r2, #44] ; 0x2c /* SAI1 clock source configuration done later after clock selection check */ break; - 802fe88: e015 b.n 802feb6 + 802ff0c: e015 b.n 802ff3a case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI1*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 802fe8a: 687b ldr r3, [r7, #4] - 802fe8c: 3304 adds r3, #4 - 802fe8e: 2100 movs r1, #0 - 802fe90: 4618 mov r0, r3 - 802fe92: f001 ffb5 bl 8031e00 - 802fe96: 4603 mov r3, r0 - 802fe98: 75fb strb r3, [r7, #23] + 802ff0e: 687b ldr r3, [r7, #4] + 802ff10: 3304 adds r3, #4 + 802ff12: 2100 movs r1, #0 + 802ff14: 4618 mov r0, r3 + 802ff16: f001 ffb5 bl 8031e84 + 802ff1a: 4603 mov r3, r0 + 802ff1c: 75fb strb r3, [r7, #23] /* SAI1 clock source configuration done later after clock selection check */ break; - 802fe9a: e00c b.n 802feb6 + 802ff1e: e00c b.n 802ff3a case RCC_SAI1CLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI1*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_P_UPDATE); - 802fe9c: 687b ldr r3, [r7, #4] - 802fe9e: 3324 adds r3, #36 ; 0x24 - 802fea0: 2100 movs r1, #0 - 802fea2: 4618 mov r0, r3 - 802fea4: f002 f85e bl 8031f64 - 802fea8: 4603 mov r3, r0 - 802feaa: 75fb strb r3, [r7, #23] + 802ff20: 687b ldr r3, [r7, #4] + 802ff22: 3324 adds r3, #36 ; 0x24 + 802ff24: 2100 movs r1, #0 + 802ff26: 4618 mov r0, r3 + 802ff28: f002 f85e bl 8031fe8 + 802ff2c: 4603 mov r3, r0 + 802ff2e: 75fb strb r3, [r7, #23] /* SAI1 clock source configuration done later after clock selection check */ break; - 802feac: e003 b.n 802feb6 + 802ff30: e003 b.n 802ff3a /* HSI, HSE, or CSI oscillator is used as source of SAI1 clock */ /* SAI1 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 802feae: 2301 movs r3, #1 - 802feb0: 75fb strb r3, [r7, #23] + 802ff32: 2301 movs r3, #1 + 802ff34: 75fb strb r3, [r7, #23] break; - 802feb2: e000 b.n 802feb6 + 802ff36: e000 b.n 802ff3a break; - 802feb4: bf00 nop + 802ff38: bf00 nop } if(ret == HAL_OK) - 802feb6: 7dfb ldrb r3, [r7, #23] - 802feb8: 2b00 cmp r3, #0 - 802feba: d109 bne.n 802fed0 + 802ff3a: 7dfb ldrb r3, [r7, #23] + 802ff3c: 2b00 cmp r3, #0 + 802ff3e: d109 bne.n 802ff54 { /* Set the source of SAI1 clock*/ __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); - 802febc: 4b71 ldr r3, [pc, #452] ; (8030084 ) - 802febe: 6d1b ldr r3, [r3, #80] ; 0x50 - 802fec0: f023 0207 bic.w r2, r3, #7 - 802fec4: 687b ldr r3, [r7, #4] - 802fec6: 6d5b ldr r3, [r3, #84] ; 0x54 - 802fec8: 496e ldr r1, [pc, #440] ; (8030084 ) - 802feca: 4313 orrs r3, r2 - 802fecc: 650b str r3, [r1, #80] ; 0x50 - 802fece: e001 b.n 802fed4 + 802ff40: 4b71 ldr r3, [pc, #452] ; (8030108 ) + 802ff42: 6d1b ldr r3, [r3, #80] ; 0x50 + 802ff44: f023 0207 bic.w r2, r3, #7 + 802ff48: 687b ldr r3, [r7, #4] + 802ff4a: 6d5b ldr r3, [r3, #84] ; 0x54 + 802ff4c: 496e ldr r1, [pc, #440] ; (8030108 ) + 802ff4e: 4313 orrs r3, r2 + 802ff50: 650b str r3, [r1, #80] ; 0x50 + 802ff52: e001 b.n 802ff58 } else { /* set overall return value */ status = ret; - 802fed0: 7dfb ldrb r3, [r7, #23] - 802fed2: 75bb strb r3, [r7, #22] + 802ff54: 7dfb ldrb r3, [r7, #23] + 802ff56: 75bb strb r3, [r7, #22] } } #if defined(SAI3) /*---------------------------- SAI2/3 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI23) == RCC_PERIPHCLK_SAI23) - 802fed4: 687b ldr r3, [r7, #4] - 802fed6: 681b ldr r3, [r3, #0] - 802fed8: f403 7300 and.w r3, r3, #512 ; 0x200 - 802fedc: 2b00 cmp r3, #0 - 802fede: d042 beq.n 802ff66 + 802ff58: 687b ldr r3, [r7, #4] + 802ff5a: 681b ldr r3, [r3, #0] + 802ff5c: f403 7300 and.w r3, r3, #512 ; 0x200 + 802ff60: 2b00 cmp r3, #0 + 802ff62: d042 beq.n 802ffea { switch(PeriphClkInit->Sai23ClockSelection) - 802fee0: 687b ldr r3, [r7, #4] - 802fee2: 6d9b ldr r3, [r3, #88] ; 0x58 - 802fee4: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 802fee8: d02b beq.n 802ff42 - 802feea: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 802feee: d825 bhi.n 802ff3c - 802fef0: 2bc0 cmp r3, #192 ; 0xc0 - 802fef2: d028 beq.n 802ff46 - 802fef4: 2bc0 cmp r3, #192 ; 0xc0 - 802fef6: d821 bhi.n 802ff3c - 802fef8: 2b80 cmp r3, #128 ; 0x80 - 802fefa: d016 beq.n 802ff2a - 802fefc: 2b80 cmp r3, #128 ; 0x80 - 802fefe: d81d bhi.n 802ff3c - 802ff00: 2b00 cmp r3, #0 - 802ff02: d002 beq.n 802ff0a - 802ff04: 2b40 cmp r3, #64 ; 0x40 - 802ff06: d007 beq.n 802ff18 - 802ff08: e018 b.n 802ff3c + 802ff64: 687b ldr r3, [r7, #4] + 802ff66: 6d9b ldr r3, [r3, #88] ; 0x58 + 802ff68: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 802ff6c: d02b beq.n 802ffc6 + 802ff6e: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 802ff72: d825 bhi.n 802ffc0 + 802ff74: 2bc0 cmp r3, #192 ; 0xc0 + 802ff76: d028 beq.n 802ffca + 802ff78: 2bc0 cmp r3, #192 ; 0xc0 + 802ff7a: d821 bhi.n 802ffc0 + 802ff7c: 2b80 cmp r3, #128 ; 0x80 + 802ff7e: d016 beq.n 802ffae + 802ff80: 2b80 cmp r3, #128 ; 0x80 + 802ff82: d81d bhi.n 802ffc0 + 802ff84: 2b00 cmp r3, #0 + 802ff86: d002 beq.n 802ff8e + 802ff88: 2b40 cmp r3, #64 ; 0x40 + 802ff8a: d007 beq.n 802ff9c + 802ff8c: e018 b.n 802ffc0 { case RCC_SAI23CLKSOURCE_PLL: /* PLL is used as clock source for SAI2/3 */ /* Enable SAI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802ff0a: 4b5e ldr r3, [pc, #376] ; (8030084 ) - 802ff0c: 6adb ldr r3, [r3, #44] ; 0x2c - 802ff0e: 4a5d ldr r2, [pc, #372] ; (8030084 ) - 802ff10: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802ff14: 62d3 str r3, [r2, #44] ; 0x2c + 802ff8e: 4b5e ldr r3, [pc, #376] ; (8030108 ) + 802ff90: 6adb ldr r3, [r3, #44] ; 0x2c + 802ff92: 4a5d ldr r2, [pc, #372] ; (8030108 ) + 802ff94: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 802ff98: 62d3 str r3, [r2, #44] ; 0x2c /* SAI2/3 clock source configuration done later after clock selection check */ break; - 802ff16: e017 b.n 802ff48 + 802ff9a: e017 b.n 802ffcc case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2/3 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 802ff18: 687b ldr r3, [r7, #4] - 802ff1a: 3304 adds r3, #4 - 802ff1c: 2100 movs r1, #0 - 802ff1e: 4618 mov r0, r3 - 802ff20: f001 ff6e bl 8031e00 - 802ff24: 4603 mov r3, r0 - 802ff26: 75fb strb r3, [r7, #23] + 802ff9c: 687b ldr r3, [r7, #4] + 802ff9e: 3304 adds r3, #4 + 802ffa0: 2100 movs r1, #0 + 802ffa2: 4618 mov r0, r3 + 802ffa4: f001 ff6e bl 8031e84 + 802ffa8: 4603 mov r3, r0 + 802ffaa: 75fb strb r3, [r7, #23] /* SAI2/3 clock source configuration done later after clock selection check */ break; - 802ff28: e00e b.n 802ff48 + 802ffac: e00e b.n 802ffcc case RCC_SAI23CLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2/3 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_P_UPDATE); - 802ff2a: 687b ldr r3, [r7, #4] - 802ff2c: 3324 adds r3, #36 ; 0x24 - 802ff2e: 2100 movs r1, #0 - 802ff30: 4618 mov r0, r3 - 802ff32: f002 f817 bl 8031f64 - 802ff36: 4603 mov r3, r0 - 802ff38: 75fb strb r3, [r7, #23] + 802ffae: 687b ldr r3, [r7, #4] + 802ffb0: 3324 adds r3, #36 ; 0x24 + 802ffb2: 2100 movs r1, #0 + 802ffb4: 4618 mov r0, r3 + 802ffb6: f002 f817 bl 8031fe8 + 802ffba: 4603 mov r3, r0 + 802ffbc: 75fb strb r3, [r7, #23] /* SAI2/3 clock source configuration done later after clock selection check */ break; - 802ff3a: e005 b.n 802ff48 + 802ffbe: e005 b.n 802ffcc /* HSI, HSE, or CSI oscillator is used as source of SAI2/3 clock */ /* SAI2/3 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 802ff3c: 2301 movs r3, #1 - 802ff3e: 75fb strb r3, [r7, #23] + 802ffc0: 2301 movs r3, #1 + 802ffc2: 75fb strb r3, [r7, #23] break; - 802ff40: e002 b.n 802ff48 + 802ffc4: e002 b.n 802ffcc break; - 802ff42: bf00 nop - 802ff44: e000 b.n 802ff48 + 802ffc6: bf00 nop + 802ffc8: e000 b.n 802ffcc break; - 802ff46: bf00 nop + 802ffca: bf00 nop } if(ret == HAL_OK) - 802ff48: 7dfb ldrb r3, [r7, #23] - 802ff4a: 2b00 cmp r3, #0 - 802ff4c: d109 bne.n 802ff62 + 802ffcc: 7dfb ldrb r3, [r7, #23] + 802ffce: 2b00 cmp r3, #0 + 802ffd0: d109 bne.n 802ffe6 { /* Set the source of SAI2/3 clock*/ __HAL_RCC_SAI23_CONFIG(PeriphClkInit->Sai23ClockSelection); - 802ff4e: 4b4d ldr r3, [pc, #308] ; (8030084 ) - 802ff50: 6d1b ldr r3, [r3, #80] ; 0x50 - 802ff52: f423 72e0 bic.w r2, r3, #448 ; 0x1c0 - 802ff56: 687b ldr r3, [r7, #4] - 802ff58: 6d9b ldr r3, [r3, #88] ; 0x58 - 802ff5a: 494a ldr r1, [pc, #296] ; (8030084 ) - 802ff5c: 4313 orrs r3, r2 - 802ff5e: 650b str r3, [r1, #80] ; 0x50 - 802ff60: e001 b.n 802ff66 + 802ffd2: 4b4d ldr r3, [pc, #308] ; (8030108 ) + 802ffd4: 6d1b ldr r3, [r3, #80] ; 0x50 + 802ffd6: f423 72e0 bic.w r2, r3, #448 ; 0x1c0 + 802ffda: 687b ldr r3, [r7, #4] + 802ffdc: 6d9b ldr r3, [r3, #88] ; 0x58 + 802ffde: 494a ldr r1, [pc, #296] ; (8030108 ) + 802ffe0: 4313 orrs r3, r2 + 802ffe2: 650b str r3, [r1, #80] ; 0x50 + 802ffe4: e001 b.n 802ffea } else { /* set overall return value */ status = ret; - 802ff62: 7dfb ldrb r3, [r7, #23] - 802ff64: 75bb strb r3, [r7, #22] + 802ffe6: 7dfb ldrb r3, [r7, #23] + 802ffe8: 75bb strb r3, [r7, #22] } #endif /*SAI2B*/ #if defined(SAI4) /*---------------------------- SAI4A configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4A) == RCC_PERIPHCLK_SAI4A) - 802ff66: 687b ldr r3, [r7, #4] - 802ff68: 681b ldr r3, [r3, #0] - 802ff6a: f403 6380 and.w r3, r3, #1024 ; 0x400 - 802ff6e: 2b00 cmp r3, #0 - 802ff70: d049 beq.n 8030006 + 802ffea: 687b ldr r3, [r7, #4] + 802ffec: 681b ldr r3, [r3, #0] + 802ffee: f403 6380 and.w r3, r3, #1024 ; 0x400 + 802fff2: 2b00 cmp r3, #0 + 802fff4: d049 beq.n 803008a { switch(PeriphClkInit->Sai4AClockSelection) - 802ff72: 687b ldr r3, [r7, #4] - 802ff74: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802ff78: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 802ff7c: d030 beq.n 802ffe0 - 802ff7e: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 802ff82: d82a bhi.n 802ffda - 802ff84: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 - 802ff88: d02c beq.n 802ffe4 - 802ff8a: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 - 802ff8e: d824 bhi.n 802ffda - 802ff90: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 802ff94: d018 beq.n 802ffc8 - 802ff96: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 802ff9a: d81e bhi.n 802ffda - 802ff9c: 2b00 cmp r3, #0 - 802ff9e: d003 beq.n 802ffa8 - 802ffa0: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 802ffa4: d007 beq.n 802ffb6 - 802ffa6: e018 b.n 802ffda + 802fff6: 687b ldr r3, [r7, #4] + 802fff8: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 802fffc: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 8030000: d030 beq.n 8030064 + 8030002: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 8030006: d82a bhi.n 803005e + 8030008: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 + 803000c: d02c beq.n 8030068 + 803000e: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 + 8030012: d824 bhi.n 803005e + 8030014: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 8030018: d018 beq.n 803004c + 803001a: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 803001e: d81e bhi.n 803005e + 8030020: 2b00 cmp r3, #0 + 8030022: d003 beq.n 803002c + 8030024: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 8030028: d007 beq.n 803003a + 803002a: e018 b.n 803005e { case RCC_SAI4ACLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/ /* Enable SAI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 802ffa8: 4b36 ldr r3, [pc, #216] ; (8030084 ) - 802ffaa: 6adb ldr r3, [r3, #44] ; 0x2c - 802ffac: 4a35 ldr r2, [pc, #212] ; (8030084 ) - 802ffae: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 802ffb2: 62d3 str r3, [r2, #44] ; 0x2c + 803002c: 4b36 ldr r3, [pc, #216] ; (8030108 ) + 803002e: 6adb ldr r3, [r3, #44] ; 0x2c + 8030030: 4a35 ldr r2, [pc, #212] ; (8030108 ) + 8030032: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030036: 62d3 str r3, [r2, #44] ; 0x2c /* SAI1 clock source configuration done later after clock selection check */ break; - 802ffb4: e017 b.n 802ffe6 + 8030038: e017 b.n 803006a case RCC_SAI4ACLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 802ffb6: 687b ldr r3, [r7, #4] - 802ffb8: 3304 adds r3, #4 - 802ffba: 2100 movs r1, #0 - 802ffbc: 4618 mov r0, r3 - 802ffbe: f001 ff1f bl 8031e00 - 802ffc2: 4603 mov r3, r0 - 802ffc4: 75fb strb r3, [r7, #23] + 803003a: 687b ldr r3, [r7, #4] + 803003c: 3304 adds r3, #4 + 803003e: 2100 movs r1, #0 + 8030040: 4618 mov r0, r3 + 8030042: f001 ff1f bl 8031e84 + 8030046: 4603 mov r3, r0 + 8030048: 75fb strb r3, [r7, #23] /* SAI2 clock source configuration done later after clock selection check */ break; - 802ffc6: e00e b.n 802ffe6 + 803004a: e00e b.n 803006a case RCC_SAI4ACLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_P_UPDATE); - 802ffc8: 687b ldr r3, [r7, #4] - 802ffca: 3324 adds r3, #36 ; 0x24 - 802ffcc: 2100 movs r1, #0 - 802ffce: 4618 mov r0, r3 - 802ffd0: f001 ffc8 bl 8031f64 - 802ffd4: 4603 mov r3, r0 - 802ffd6: 75fb strb r3, [r7, #23] + 803004c: 687b ldr r3, [r7, #4] + 803004e: 3324 adds r3, #36 ; 0x24 + 8030050: 2100 movs r1, #0 + 8030052: 4618 mov r0, r3 + 8030054: f001 ffc8 bl 8031fe8 + 8030058: 4603 mov r3, r0 + 803005a: 75fb strb r3, [r7, #23] /* SAI1 clock source configuration done later after clock selection check */ break; - 802ffd8: e005 b.n 802ffe6 + 803005c: e005 b.n 803006a /* SAI4A clock source configuration done later after clock selection check */ break; #endif /* RCC_VER_3_0 */ default: ret = HAL_ERROR; - 802ffda: 2301 movs r3, #1 - 802ffdc: 75fb strb r3, [r7, #23] + 803005e: 2301 movs r3, #1 + 8030060: 75fb strb r3, [r7, #23] break; - 802ffde: e002 b.n 802ffe6 + 8030062: e002 b.n 803006a break; - 802ffe0: bf00 nop - 802ffe2: e000 b.n 802ffe6 + 8030064: bf00 nop + 8030066: e000 b.n 803006a break; - 802ffe4: bf00 nop + 8030068: bf00 nop } if(ret == HAL_OK) - 802ffe6: 7dfb ldrb r3, [r7, #23] - 802ffe8: 2b00 cmp r3, #0 - 802ffea: d10a bne.n 8030002 + 803006a: 7dfb ldrb r3, [r7, #23] + 803006c: 2b00 cmp r3, #0 + 803006e: d10a bne.n 8030086 { /* Set the source of SAI4A clock*/ __HAL_RCC_SAI4A_CONFIG(PeriphClkInit->Sai4AClockSelection); - 802ffec: 4b25 ldr r3, [pc, #148] ; (8030084 ) - 802ffee: 6d9b ldr r3, [r3, #88] ; 0x58 - 802fff0: f423 0260 bic.w r2, r3, #14680064 ; 0xe00000 - 802fff4: 687b ldr r3, [r7, #4] - 802fff6: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 - 802fffa: 4922 ldr r1, [pc, #136] ; (8030084 ) - 802fffc: 4313 orrs r3, r2 - 802fffe: 658b str r3, [r1, #88] ; 0x58 - 8030000: e001 b.n 8030006 + 8030070: 4b25 ldr r3, [pc, #148] ; (8030108 ) + 8030072: 6d9b ldr r3, [r3, #88] ; 0x58 + 8030074: f423 0260 bic.w r2, r3, #14680064 ; 0xe00000 + 8030078: 687b ldr r3, [r7, #4] + 803007a: f8d3 30a4 ldr.w r3, [r3, #164] ; 0xa4 + 803007e: 4922 ldr r1, [pc, #136] ; (8030108 ) + 8030080: 4313 orrs r3, r2 + 8030082: 658b str r3, [r1, #88] ; 0x58 + 8030084: e001 b.n 803008a } else { /* set overall return value */ status = ret; - 8030002: 7dfb ldrb r3, [r7, #23] - 8030004: 75bb strb r3, [r7, #22] + 8030086: 7dfb ldrb r3, [r7, #23] + 8030088: 75bb strb r3, [r7, #22] } } /*---------------------------- SAI4B configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4B) == RCC_PERIPHCLK_SAI4B) - 8030006: 687b ldr r3, [r7, #4] - 8030008: 681b ldr r3, [r3, #0] - 803000a: f403 6300 and.w r3, r3, #2048 ; 0x800 - 803000e: 2b00 cmp r3, #0 - 8030010: d04b beq.n 80300aa + 803008a: 687b ldr r3, [r7, #4] + 803008c: 681b ldr r3, [r3, #0] + 803008e: f403 6300 and.w r3, r3, #2048 ; 0x800 + 8030092: 2b00 cmp r3, #0 + 8030094: d04b beq.n 803012e { switch(PeriphClkInit->Sai4BClockSelection) - 8030012: 687b ldr r3, [r7, #4] - 8030014: f8d3 30a8 ldr.w r3, [r3, #168] ; 0xa8 - 8030018: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 - 803001c: d030 beq.n 8030080 - 803001e: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 - 8030022: d82a bhi.n 803007a - 8030024: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 - 8030028: d02e beq.n 8030088 - 803002a: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 - 803002e: d824 bhi.n 803007a - 8030030: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8030034: d018 beq.n 8030068 - 8030036: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 803003a: d81e bhi.n 803007a - 803003c: 2b00 cmp r3, #0 - 803003e: d003 beq.n 8030048 - 8030040: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 8030044: d007 beq.n 8030056 - 8030046: e018 b.n 803007a + 8030096: 687b ldr r3, [r7, #4] + 8030098: f8d3 30a8 ldr.w r3, [r3, #168] ; 0xa8 + 803009c: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 + 80300a0: d030 beq.n 8030104 + 80300a2: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 + 80300a6: d82a bhi.n 80300fe + 80300a8: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 + 80300ac: d02e beq.n 803010c + 80300ae: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 + 80300b2: d824 bhi.n 80300fe + 80300b4: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 80300b8: d018 beq.n 80300ec + 80300ba: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 80300be: d81e bhi.n 80300fe + 80300c0: 2b00 cmp r3, #0 + 80300c2: d003 beq.n 80300cc + 80300c4: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 80300c8: d007 beq.n 80300da + 80300ca: e018 b.n 80300fe { case RCC_SAI4BCLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/ /* Enable SAI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030048: 4b0e ldr r3, [pc, #56] ; (8030084 ) - 803004a: 6adb ldr r3, [r3, #44] ; 0x2c - 803004c: 4a0d ldr r2, [pc, #52] ; (8030084 ) - 803004e: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030052: 62d3 str r3, [r2, #44] ; 0x2c + 80300cc: 4b0e ldr r3, [pc, #56] ; (8030108 ) + 80300ce: 6adb ldr r3, [r3, #44] ; 0x2c + 80300d0: 4a0d ldr r2, [pc, #52] ; (8030108 ) + 80300d2: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 80300d6: 62d3 str r3, [r2, #44] ; 0x2c /* SAI1 clock source configuration done later after clock selection check */ break; - 8030054: e019 b.n 803008a + 80300d8: e019 b.n 803010e case RCC_SAI4BCLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 8030056: 687b ldr r3, [r7, #4] - 8030058: 3304 adds r3, #4 - 803005a: 2100 movs r1, #0 - 803005c: 4618 mov r0, r3 - 803005e: f001 fecf bl 8031e00 - 8030062: 4603 mov r3, r0 - 8030064: 75fb strb r3, [r7, #23] + 80300da: 687b ldr r3, [r7, #4] + 80300dc: 3304 adds r3, #4 + 80300de: 2100 movs r1, #0 + 80300e0: 4618 mov r0, r3 + 80300e2: f001 fecf bl 8031e84 + 80300e6: 4603 mov r3, r0 + 80300e8: 75fb strb r3, [r7, #23] /* SAI2 clock source configuration done later after clock selection check */ break; - 8030066: e010 b.n 803008a + 80300ea: e010 b.n 803010e case RCC_SAI4BCLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE); - 8030068: 687b ldr r3, [r7, #4] - 803006a: 3324 adds r3, #36 ; 0x24 - 803006c: 2100 movs r1, #0 - 803006e: 4618 mov r0, r3 - 8030070: f001 ff78 bl 8031f64 - 8030074: 4603 mov r3, r0 - 8030076: 75fb strb r3, [r7, #23] + 80300ec: 687b ldr r3, [r7, #4] + 80300ee: 3324 adds r3, #36 ; 0x24 + 80300f0: 2100 movs r1, #0 + 80300f2: 4618 mov r0, r3 + 80300f4: f001 ff78 bl 8031fe8 + 80300f8: 4603 mov r3, r0 + 80300fa: 75fb strb r3, [r7, #23] /* SAI1 clock source configuration done later after clock selection check */ break; - 8030078: e007 b.n 803008a + 80300fc: e007 b.n 803010e /* SAI4B clock source configuration done later after clock selection check */ break; #endif /* RCC_VER_3_0 */ default: ret = HAL_ERROR; - 803007a: 2301 movs r3, #1 - 803007c: 75fb strb r3, [r7, #23] + 80300fe: 2301 movs r3, #1 + 8030100: 75fb strb r3, [r7, #23] break; - 803007e: e004 b.n 803008a + 8030102: e004 b.n 803010e break; - 8030080: bf00 nop - 8030082: e002 b.n 803008a - 8030084: 58024400 .word 0x58024400 + 8030104: bf00 nop + 8030106: e002 b.n 803010e + 8030108: 58024400 .word 0x58024400 break; - 8030088: bf00 nop + 803010c: bf00 nop } if(ret == HAL_OK) - 803008a: 7dfb ldrb r3, [r7, #23] - 803008c: 2b00 cmp r3, #0 - 803008e: d10a bne.n 80300a6 + 803010e: 7dfb ldrb r3, [r7, #23] + 8030110: 2b00 cmp r3, #0 + 8030112: d10a bne.n 803012a { /* Set the source of SAI4B clock*/ __HAL_RCC_SAI4B_CONFIG(PeriphClkInit->Sai4BClockSelection); - 8030090: 4b99 ldr r3, [pc, #612] ; (80302f8 ) - 8030092: 6d9b ldr r3, [r3, #88] ; 0x58 - 8030094: f023 62e0 bic.w r2, r3, #117440512 ; 0x7000000 - 8030098: 687b ldr r3, [r7, #4] - 803009a: f8d3 30a8 ldr.w r3, [r3, #168] ; 0xa8 - 803009e: 4996 ldr r1, [pc, #600] ; (80302f8 ) - 80300a0: 4313 orrs r3, r2 - 80300a2: 658b str r3, [r1, #88] ; 0x58 - 80300a4: e001 b.n 80300aa + 8030114: 4b99 ldr r3, [pc, #612] ; (803037c ) + 8030116: 6d9b ldr r3, [r3, #88] ; 0x58 + 8030118: f023 62e0 bic.w r2, r3, #117440512 ; 0x7000000 + 803011c: 687b ldr r3, [r7, #4] + 803011e: f8d3 30a8 ldr.w r3, [r3, #168] ; 0xa8 + 8030122: 4996 ldr r1, [pc, #600] ; (803037c ) + 8030124: 4313 orrs r3, r2 + 8030126: 658b str r3, [r1, #88] ; 0x58 + 8030128: e001 b.n 803012e } else { /* set overall return value */ status = ret; - 80300a6: 7dfb ldrb r3, [r7, #23] - 80300a8: 75bb strb r3, [r7, #22] + 803012a: 7dfb ldrb r3, [r7, #23] + 803012c: 75bb strb r3, [r7, #22] } #endif /*SAI4*/ #if defined(QUADSPI) /*---------------------------- QSPI configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI) - 80300aa: 687b ldr r3, [r7, #4] - 80300ac: 681b ldr r3, [r3, #0] - 80300ae: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80300b2: 2b00 cmp r3, #0 - 80300b4: d032 beq.n 803011c + 803012e: 687b ldr r3, [r7, #4] + 8030130: 681b ldr r3, [r3, #0] + 8030132: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8030136: 2b00 cmp r3, #0 + 8030138: d032 beq.n 80301a0 { switch(PeriphClkInit->QspiClockSelection) - 80300b6: 687b ldr r3, [r7, #4] - 80300b8: 6c9b ldr r3, [r3, #72] ; 0x48 - 80300ba: 2b30 cmp r3, #48 ; 0x30 - 80300bc: d01c beq.n 80300f8 - 80300be: 2b30 cmp r3, #48 ; 0x30 - 80300c0: d817 bhi.n 80300f2 - 80300c2: 2b20 cmp r3, #32 - 80300c4: d00c beq.n 80300e0 - 80300c6: 2b20 cmp r3, #32 - 80300c8: d813 bhi.n 80300f2 - 80300ca: 2b00 cmp r3, #0 - 80300cc: d016 beq.n 80300fc - 80300ce: 2b10 cmp r3, #16 - 80300d0: d10f bne.n 80300f2 + 803013a: 687b ldr r3, [r7, #4] + 803013c: 6c9b ldr r3, [r3, #72] ; 0x48 + 803013e: 2b30 cmp r3, #48 ; 0x30 + 8030140: d01c beq.n 803017c + 8030142: 2b30 cmp r3, #48 ; 0x30 + 8030144: d817 bhi.n 8030176 + 8030146: 2b20 cmp r3, #32 + 8030148: d00c beq.n 8030164 + 803014a: 2b20 cmp r3, #32 + 803014c: d813 bhi.n 8030176 + 803014e: 2b00 cmp r3, #0 + 8030150: d016 beq.n 8030180 + 8030152: 2b10 cmp r3, #16 + 8030154: d10f bne.n 8030176 { case RCC_QSPICLKSOURCE_PLL: /* PLL is used as clock source for QSPI*/ /* Enable QSPI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 80300d2: 4b89 ldr r3, [pc, #548] ; (80302f8 ) - 80300d4: 6adb ldr r3, [r3, #44] ; 0x2c - 80300d6: 4a88 ldr r2, [pc, #544] ; (80302f8 ) - 80300d8: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80300dc: 62d3 str r3, [r2, #44] ; 0x2c + 8030156: 4b89 ldr r3, [pc, #548] ; (803037c ) + 8030158: 6adb ldr r3, [r3, #44] ; 0x2c + 803015a: 4a88 ldr r2, [pc, #544] ; (803037c ) + 803015c: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030160: 62d3 str r3, [r2, #44] ; 0x2c /* QSPI clock source configuration done later after clock selection check */ break; - 80300de: e00e b.n 80300fe + 8030162: e00e b.n 8030182 case RCC_QSPICLKSOURCE_PLL2: /* PLL2 is used as clock source for QSPI*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_R_UPDATE); - 80300e0: 687b ldr r3, [r7, #4] - 80300e2: 3304 adds r3, #4 - 80300e4: 2102 movs r1, #2 - 80300e6: 4618 mov r0, r3 - 80300e8: f001 fe8a bl 8031e00 - 80300ec: 4603 mov r3, r0 - 80300ee: 75fb strb r3, [r7, #23] + 8030164: 687b ldr r3, [r7, #4] + 8030166: 3304 adds r3, #4 + 8030168: 2102 movs r1, #2 + 803016a: 4618 mov r0, r3 + 803016c: f001 fe8a bl 8031e84 + 8030170: 4603 mov r3, r0 + 8030172: 75fb strb r3, [r7, #23] /* QSPI clock source configuration done later after clock selection check */ break; - 80300f0: e005 b.n 80300fe + 8030174: e005 b.n 8030182 case RCC_QSPICLKSOURCE_D1HCLK: /* Domain1 HCLK clock selected as QSPI kernel peripheral clock */ break; default: ret = HAL_ERROR; - 80300f2: 2301 movs r3, #1 - 80300f4: 75fb strb r3, [r7, #23] + 8030176: 2301 movs r3, #1 + 8030178: 75fb strb r3, [r7, #23] break; - 80300f6: e002 b.n 80300fe + 803017a: e002 b.n 8030182 break; - 80300f8: bf00 nop - 80300fa: e000 b.n 80300fe + 803017c: bf00 nop + 803017e: e000 b.n 8030182 break; - 80300fc: bf00 nop + 8030180: bf00 nop } if(ret == HAL_OK) - 80300fe: 7dfb ldrb r3, [r7, #23] - 8030100: 2b00 cmp r3, #0 - 8030102: d109 bne.n 8030118 + 8030182: 7dfb ldrb r3, [r7, #23] + 8030184: 2b00 cmp r3, #0 + 8030186: d109 bne.n 803019c { /* Set the source of QSPI clock*/ __HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection); - 8030104: 4b7c ldr r3, [pc, #496] ; (80302f8 ) - 8030106: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030108: f023 0230 bic.w r2, r3, #48 ; 0x30 - 803010c: 687b ldr r3, [r7, #4] - 803010e: 6c9b ldr r3, [r3, #72] ; 0x48 - 8030110: 4979 ldr r1, [pc, #484] ; (80302f8 ) - 8030112: 4313 orrs r3, r2 - 8030114: 64cb str r3, [r1, #76] ; 0x4c - 8030116: e001 b.n 803011c + 8030188: 4b7c ldr r3, [pc, #496] ; (803037c ) + 803018a: 6cdb ldr r3, [r3, #76] ; 0x4c + 803018c: f023 0230 bic.w r2, r3, #48 ; 0x30 + 8030190: 687b ldr r3, [r7, #4] + 8030192: 6c9b ldr r3, [r3, #72] ; 0x48 + 8030194: 4979 ldr r1, [pc, #484] ; (803037c ) + 8030196: 4313 orrs r3, r2 + 8030198: 64cb str r3, [r1, #76] ; 0x4c + 803019a: e001 b.n 80301a0 } else { /* set overall return value */ status = ret; - 8030118: 7dfb ldrb r3, [r7, #23] - 803011a: 75bb strb r3, [r7, #22] + 803019c: 7dfb ldrb r3, [r7, #23] + 803019e: 75bb strb r3, [r7, #22] } } #endif /*OCTOSPI*/ /*---------------------------- SPI1/2/3 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI123) == RCC_PERIPHCLK_SPI123) - 803011c: 687b ldr r3, [r7, #4] - 803011e: 681b ldr r3, [r3, #0] - 8030120: f403 5380 and.w r3, r3, #4096 ; 0x1000 - 8030124: 2b00 cmp r3, #0 - 8030126: d047 beq.n 80301b8 + 80301a0: 687b ldr r3, [r7, #4] + 80301a2: 681b ldr r3, [r3, #0] + 80301a4: f403 5380 and.w r3, r3, #4096 ; 0x1000 + 80301a8: 2b00 cmp r3, #0 + 80301aa: d047 beq.n 803023c { switch(PeriphClkInit->Spi123ClockSelection) - 8030128: 687b ldr r3, [r7, #4] - 803012a: 6ddb ldr r3, [r3, #92] ; 0x5c - 803012c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8030130: d030 beq.n 8030194 - 8030132: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8030136: d82a bhi.n 803018e - 8030138: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 803013c: d02c beq.n 8030198 - 803013e: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 8030142: d824 bhi.n 803018e - 8030144: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8030148: d018 beq.n 803017c - 803014a: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 803014e: d81e bhi.n 803018e - 8030150: 2b00 cmp r3, #0 - 8030152: d003 beq.n 803015c - 8030154: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8030158: d007 beq.n 803016a - 803015a: e018 b.n 803018e + 80301ac: 687b ldr r3, [r7, #4] + 80301ae: 6ddb ldr r3, [r3, #92] ; 0x5c + 80301b0: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 80301b4: d030 beq.n 8030218 + 80301b6: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 80301ba: d82a bhi.n 8030212 + 80301bc: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 80301c0: d02c beq.n 803021c + 80301c2: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 80301c6: d824 bhi.n 8030212 + 80301c8: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 80301cc: d018 beq.n 8030200 + 80301ce: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 80301d2: d81e bhi.n 8030212 + 80301d4: 2b00 cmp r3, #0 + 80301d6: d003 beq.n 80301e0 + 80301d8: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80301dc: d007 beq.n 80301ee + 80301de: e018 b.n 8030212 { case RCC_SPI123CLKSOURCE_PLL: /* PLL is used as clock source for SPI1/2/3 */ /* Enable SPI Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 803015c: 4b66 ldr r3, [pc, #408] ; (80302f8 ) - 803015e: 6adb ldr r3, [r3, #44] ; 0x2c - 8030160: 4a65 ldr r2, [pc, #404] ; (80302f8 ) - 8030162: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030166: 62d3 str r3, [r2, #44] ; 0x2c + 80301e0: 4b66 ldr r3, [pc, #408] ; (803037c ) + 80301e2: 6adb ldr r3, [r3, #44] ; 0x2c + 80301e4: 4a65 ldr r2, [pc, #404] ; (803037c ) + 80301e6: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 80301ea: 62d3 str r3, [r2, #44] ; 0x2c /* SPI1/2/3 clock source configuration done later after clock selection check */ break; - 8030168: e017 b.n 803019a + 80301ec: e017 b.n 803021e case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI1/2/3 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 803016a: 687b ldr r3, [r7, #4] - 803016c: 3304 adds r3, #4 - 803016e: 2100 movs r1, #0 - 8030170: 4618 mov r0, r3 - 8030172: f001 fe45 bl 8031e00 - 8030176: 4603 mov r3, r0 - 8030178: 75fb strb r3, [r7, #23] + 80301ee: 687b ldr r3, [r7, #4] + 80301f0: 3304 adds r3, #4 + 80301f2: 2100 movs r1, #0 + 80301f4: 4618 mov r0, r3 + 80301f6: f001 fe45 bl 8031e84 + 80301fa: 4603 mov r3, r0 + 80301fc: 75fb strb r3, [r7, #23] /* SPI1/2/3 clock source configuration done later after clock selection check */ break; - 803017a: e00e b.n 803019a + 80301fe: e00e b.n 803021e case RCC_SPI123CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI1/2/3 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_P_UPDATE); - 803017c: 687b ldr r3, [r7, #4] - 803017e: 3324 adds r3, #36 ; 0x24 - 8030180: 2100 movs r1, #0 - 8030182: 4618 mov r0, r3 - 8030184: f001 feee bl 8031f64 - 8030188: 4603 mov r3, r0 - 803018a: 75fb strb r3, [r7, #23] + 8030200: 687b ldr r3, [r7, #4] + 8030202: 3324 adds r3, #36 ; 0x24 + 8030204: 2100 movs r1, #0 + 8030206: 4618 mov r0, r3 + 8030208: f001 feee bl 8031fe8 + 803020c: 4603 mov r3, r0 + 803020e: 75fb strb r3, [r7, #23] /* SPI1/2/3 clock source configuration done later after clock selection check */ break; - 803018c: e005 b.n 803019a + 8030210: e005 b.n 803021e /* HSI, HSE, or CSI oscillator is used as source of SPI1/2/3 clock */ /* SPI1/2/3 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 803018e: 2301 movs r3, #1 - 8030190: 75fb strb r3, [r7, #23] + 8030212: 2301 movs r3, #1 + 8030214: 75fb strb r3, [r7, #23] break; - 8030192: e002 b.n 803019a + 8030216: e002 b.n 803021e break; - 8030194: bf00 nop - 8030196: e000 b.n 803019a + 8030218: bf00 nop + 803021a: e000 b.n 803021e break; - 8030198: bf00 nop + 803021c: bf00 nop } if(ret == HAL_OK) - 803019a: 7dfb ldrb r3, [r7, #23] - 803019c: 2b00 cmp r3, #0 - 803019e: d109 bne.n 80301b4 + 803021e: 7dfb ldrb r3, [r7, #23] + 8030220: 2b00 cmp r3, #0 + 8030222: d109 bne.n 8030238 { /* Set the source of SPI1/2/3 clock*/ __HAL_RCC_SPI123_CONFIG(PeriphClkInit->Spi123ClockSelection); - 80301a0: 4b55 ldr r3, [pc, #340] ; (80302f8 ) - 80301a2: 6d1b ldr r3, [r3, #80] ; 0x50 - 80301a4: f423 42e0 bic.w r2, r3, #28672 ; 0x7000 - 80301a8: 687b ldr r3, [r7, #4] - 80301aa: 6ddb ldr r3, [r3, #92] ; 0x5c - 80301ac: 4952 ldr r1, [pc, #328] ; (80302f8 ) - 80301ae: 4313 orrs r3, r2 - 80301b0: 650b str r3, [r1, #80] ; 0x50 - 80301b2: e001 b.n 80301b8 + 8030224: 4b55 ldr r3, [pc, #340] ; (803037c ) + 8030226: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030228: f423 42e0 bic.w r2, r3, #28672 ; 0x7000 + 803022c: 687b ldr r3, [r7, #4] + 803022e: 6ddb ldr r3, [r3, #92] ; 0x5c + 8030230: 4952 ldr r1, [pc, #328] ; (803037c ) + 8030232: 4313 orrs r3, r2 + 8030234: 650b str r3, [r1, #80] ; 0x50 + 8030236: e001 b.n 803023c } else { /* set overall return value */ status = ret; - 80301b4: 7dfb ldrb r3, [r7, #23] - 80301b6: 75bb strb r3, [r7, #22] + 8030238: 7dfb ldrb r3, [r7, #23] + 803023a: 75bb strb r3, [r7, #22] } } /*---------------------------- SPI4/5 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI45) == RCC_PERIPHCLK_SPI45) - 80301b8: 687b ldr r3, [r7, #4] - 80301ba: 681b ldr r3, [r3, #0] - 80301bc: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 80301c0: 2b00 cmp r3, #0 - 80301c2: d049 beq.n 8030258 + 803023c: 687b ldr r3, [r7, #4] + 803023e: 681b ldr r3, [r3, #0] + 8030240: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 8030244: 2b00 cmp r3, #0 + 8030246: d049 beq.n 80302dc { switch(PeriphClkInit->Spi45ClockSelection) - 80301c4: 687b ldr r3, [r7, #4] - 80301c6: 6e1b ldr r3, [r3, #96] ; 0x60 - 80301c8: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 80301cc: d02e beq.n 803022c - 80301ce: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 - 80301d2: d828 bhi.n 8030226 - 80301d4: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 - 80301d8: d02a beq.n 8030230 - 80301da: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 - 80301de: d822 bhi.n 8030226 - 80301e0: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 - 80301e4: d026 beq.n 8030234 - 80301e6: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 - 80301ea: d81c bhi.n 8030226 - 80301ec: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80301f0: d010 beq.n 8030214 - 80301f2: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80301f6: d816 bhi.n 8030226 - 80301f8: 2b00 cmp r3, #0 - 80301fa: d01d beq.n 8030238 - 80301fc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8030200: d111 bne.n 8030226 + 8030248: 687b ldr r3, [r7, #4] + 803024a: 6e1b ldr r3, [r3, #96] ; 0x60 + 803024c: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 8030250: d02e beq.n 80302b0 + 8030252: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 + 8030256: d828 bhi.n 80302aa + 8030258: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 + 803025c: d02a beq.n 80302b4 + 803025e: f5b3 2f80 cmp.w r3, #262144 ; 0x40000 + 8030262: d822 bhi.n 80302aa + 8030264: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 + 8030268: d026 beq.n 80302b8 + 803026a: f5b3 3f40 cmp.w r3, #196608 ; 0x30000 + 803026e: d81c bhi.n 80302aa + 8030270: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8030274: d010 beq.n 8030298 + 8030276: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 803027a: d816 bhi.n 80302aa + 803027c: 2b00 cmp r3, #0 + 803027e: d01d beq.n 80302bc + 8030280: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8030284: d111 bne.n 80302aa /* SPI4/5 clock source configuration done later after clock selection check */ break; case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI4/5 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 8030202: 687b ldr r3, [r7, #4] - 8030204: 3304 adds r3, #4 - 8030206: 2101 movs r1, #1 - 8030208: 4618 mov r0, r3 - 803020a: f001 fdf9 bl 8031e00 - 803020e: 4603 mov r3, r0 - 8030210: 75fb strb r3, [r7, #23] + 8030286: 687b ldr r3, [r7, #4] + 8030288: 3304 adds r3, #4 + 803028a: 2101 movs r1, #1 + 803028c: 4618 mov r0, r3 + 803028e: f001 fdf9 bl 8031e84 + 8030292: 4603 mov r3, r0 + 8030294: 75fb strb r3, [r7, #23] /* SPI4/5 clock source configuration done later after clock selection check */ break; - 8030212: e012 b.n 803023a + 8030296: e012 b.n 80302be case RCC_SPI45CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI4/5 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 8030214: 687b ldr r3, [r7, #4] - 8030216: 3324 adds r3, #36 ; 0x24 - 8030218: 2101 movs r1, #1 - 803021a: 4618 mov r0, r3 - 803021c: f001 fea2 bl 8031f64 - 8030220: 4603 mov r3, r0 - 8030222: 75fb strb r3, [r7, #23] + 8030298: 687b ldr r3, [r7, #4] + 803029a: 3324 adds r3, #36 ; 0x24 + 803029c: 2101 movs r1, #1 + 803029e: 4618 mov r0, r3 + 80302a0: f001 fea2 bl 8031fe8 + 80302a4: 4603 mov r3, r0 + 80302a6: 75fb strb r3, [r7, #23] /* SPI4/5 clock source configuration done later after clock selection check */ break; - 8030224: e009 b.n 803023a + 80302a8: e009 b.n 80302be /* HSE, oscillator is used as source of SPI4/5 clock */ /* SPI4/5 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030226: 2301 movs r3, #1 - 8030228: 75fb strb r3, [r7, #23] + 80302aa: 2301 movs r3, #1 + 80302ac: 75fb strb r3, [r7, #23] break; - 803022a: e006 b.n 803023a + 80302ae: e006 b.n 80302be break; - 803022c: bf00 nop - 803022e: e004 b.n 803023a + 80302b0: bf00 nop + 80302b2: e004 b.n 80302be break; - 8030230: bf00 nop - 8030232: e002 b.n 803023a + 80302b4: bf00 nop + 80302b6: e002 b.n 80302be break; - 8030234: bf00 nop - 8030236: e000 b.n 803023a + 80302b8: bf00 nop + 80302ba: e000 b.n 80302be break; - 8030238: bf00 nop + 80302bc: bf00 nop } if(ret == HAL_OK) - 803023a: 7dfb ldrb r3, [r7, #23] - 803023c: 2b00 cmp r3, #0 - 803023e: d109 bne.n 8030254 + 80302be: 7dfb ldrb r3, [r7, #23] + 80302c0: 2b00 cmp r3, #0 + 80302c2: d109 bne.n 80302d8 { /* Set the source of SPI4/5 clock*/ __HAL_RCC_SPI45_CONFIG(PeriphClkInit->Spi45ClockSelection); - 8030240: 4b2d ldr r3, [pc, #180] ; (80302f8 ) - 8030242: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030244: f423 22e0 bic.w r2, r3, #458752 ; 0x70000 - 8030248: 687b ldr r3, [r7, #4] - 803024a: 6e1b ldr r3, [r3, #96] ; 0x60 - 803024c: 492a ldr r1, [pc, #168] ; (80302f8 ) - 803024e: 4313 orrs r3, r2 - 8030250: 650b str r3, [r1, #80] ; 0x50 - 8030252: e001 b.n 8030258 + 80302c4: 4b2d ldr r3, [pc, #180] ; (803037c ) + 80302c6: 6d1b ldr r3, [r3, #80] ; 0x50 + 80302c8: f423 22e0 bic.w r2, r3, #458752 ; 0x70000 + 80302cc: 687b ldr r3, [r7, #4] + 80302ce: 6e1b ldr r3, [r3, #96] ; 0x60 + 80302d0: 492a ldr r1, [pc, #168] ; (803037c ) + 80302d2: 4313 orrs r3, r2 + 80302d4: 650b str r3, [r1, #80] ; 0x50 + 80302d6: e001 b.n 80302dc } else { /* set overall return value */ status = ret; - 8030254: 7dfb ldrb r3, [r7, #23] - 8030256: 75bb strb r3, [r7, #22] + 80302d8: 7dfb ldrb r3, [r7, #23] + 80302da: 75bb strb r3, [r7, #22] } } /*---------------------------- SPI6 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI6) == RCC_PERIPHCLK_SPI6) - 8030258: 687b ldr r3, [r7, #4] - 803025a: 681b ldr r3, [r3, #0] - 803025c: f403 4380 and.w r3, r3, #16384 ; 0x4000 - 8030260: 2b00 cmp r3, #0 - 8030262: d04d beq.n 8030300 + 80302dc: 687b ldr r3, [r7, #4] + 80302de: 681b ldr r3, [r3, #0] + 80302e0: f403 4380 and.w r3, r3, #16384 ; 0x4000 + 80302e4: 2b00 cmp r3, #0 + 80302e6: d04d beq.n 8030384 { switch(PeriphClkInit->Spi6ClockSelection) - 8030264: 687b ldr r3, [r7, #4] - 8030266: f8d3 30ac ldr.w r3, [r3, #172] ; 0xac - 803026a: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 803026e: d02e beq.n 80302ce - 8030270: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8030274: d828 bhi.n 80302c8 - 8030276: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 803027a: d02a beq.n 80302d2 - 803027c: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8030280: d822 bhi.n 80302c8 - 8030282: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 8030286: d026 beq.n 80302d6 - 8030288: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 803028c: d81c bhi.n 80302c8 - 803028e: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030292: d010 beq.n 80302b6 - 8030294: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030298: d816 bhi.n 80302c8 - 803029a: 2b00 cmp r3, #0 - 803029c: d01d beq.n 80302da - 803029e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 80302a2: d111 bne.n 80302c8 + 80302e8: 687b ldr r3, [r7, #4] + 80302ea: f8d3 30ac ldr.w r3, [r3, #172] ; 0xac + 80302ee: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 80302f2: d02e beq.n 8030352 + 80302f4: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 80302f8: d828 bhi.n 803034c + 80302fa: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 80302fe: d02a beq.n 8030356 + 8030300: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8030304: d822 bhi.n 803034c + 8030306: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 803030a: d026 beq.n 803035a + 803030c: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 8030310: d81c bhi.n 803034c + 8030312: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030316: d010 beq.n 803033a + 8030318: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803031c: d816 bhi.n 803034c + 803031e: 2b00 cmp r3, #0 + 8030320: d01d beq.n 803035e + 8030322: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8030326: d111 bne.n 803034c /* SPI6 clock source configuration done later after clock selection check */ break; case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI6*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 80302a4: 687b ldr r3, [r7, #4] - 80302a6: 3304 adds r3, #4 - 80302a8: 2101 movs r1, #1 - 80302aa: 4618 mov r0, r3 - 80302ac: f001 fda8 bl 8031e00 - 80302b0: 4603 mov r3, r0 - 80302b2: 75fb strb r3, [r7, #23] + 8030328: 687b ldr r3, [r7, #4] + 803032a: 3304 adds r3, #4 + 803032c: 2101 movs r1, #1 + 803032e: 4618 mov r0, r3 + 8030330: f001 fda8 bl 8031e84 + 8030334: 4603 mov r3, r0 + 8030336: 75fb strb r3, [r7, #23] /* SPI6 clock source configuration done later after clock selection check */ break; - 80302b4: e012 b.n 80302dc + 8030338: e012 b.n 8030360 case RCC_SPI6CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI6*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 80302b6: 687b ldr r3, [r7, #4] - 80302b8: 3324 adds r3, #36 ; 0x24 - 80302ba: 2101 movs r1, #1 - 80302bc: 4618 mov r0, r3 - 80302be: f001 fe51 bl 8031f64 - 80302c2: 4603 mov r3, r0 - 80302c4: 75fb strb r3, [r7, #23] + 803033a: 687b ldr r3, [r7, #4] + 803033c: 3324 adds r3, #36 ; 0x24 + 803033e: 2101 movs r1, #1 + 8030340: 4618 mov r0, r3 + 8030342: f001 fe51 bl 8031fe8 + 8030346: 4603 mov r3, r0 + 8030348: 75fb strb r3, [r7, #23] /* SPI6 clock source configuration done later after clock selection check */ break; - 80302c6: e009 b.n 80302dc + 803034a: e009 b.n 8030360 /* SPI6 clock source configuration done later after clock selection check */ break; #endif default: ret = HAL_ERROR; - 80302c8: 2301 movs r3, #1 - 80302ca: 75fb strb r3, [r7, #23] + 803034c: 2301 movs r3, #1 + 803034e: 75fb strb r3, [r7, #23] break; - 80302cc: e006 b.n 80302dc + 8030350: e006 b.n 8030360 break; - 80302ce: bf00 nop - 80302d0: e004 b.n 80302dc + 8030352: bf00 nop + 8030354: e004 b.n 8030360 break; - 80302d2: bf00 nop - 80302d4: e002 b.n 80302dc + 8030356: bf00 nop + 8030358: e002 b.n 8030360 break; - 80302d6: bf00 nop - 80302d8: e000 b.n 80302dc + 803035a: bf00 nop + 803035c: e000 b.n 8030360 break; - 80302da: bf00 nop + 803035e: bf00 nop } if(ret == HAL_OK) - 80302dc: 7dfb ldrb r3, [r7, #23] - 80302de: 2b00 cmp r3, #0 - 80302e0: d10c bne.n 80302fc + 8030360: 7dfb ldrb r3, [r7, #23] + 8030362: 2b00 cmp r3, #0 + 8030364: d10c bne.n 8030380 { /* Set the source of SPI6 clock*/ __HAL_RCC_SPI6_CONFIG(PeriphClkInit->Spi6ClockSelection); - 80302e2: 4b05 ldr r3, [pc, #20] ; (80302f8 ) - 80302e4: 6d9b ldr r3, [r3, #88] ; 0x58 - 80302e6: f023 42e0 bic.w r2, r3, #1879048192 ; 0x70000000 - 80302ea: 687b ldr r3, [r7, #4] - 80302ec: f8d3 30ac ldr.w r3, [r3, #172] ; 0xac - 80302f0: 4901 ldr r1, [pc, #4] ; (80302f8 ) - 80302f2: 4313 orrs r3, r2 - 80302f4: 658b str r3, [r1, #88] ; 0x58 - 80302f6: e003 b.n 8030300 - 80302f8: 58024400 .word 0x58024400 + 8030366: 4b05 ldr r3, [pc, #20] ; (803037c ) + 8030368: 6d9b ldr r3, [r3, #88] ; 0x58 + 803036a: f023 42e0 bic.w r2, r3, #1879048192 ; 0x70000000 + 803036e: 687b ldr r3, [r7, #4] + 8030370: f8d3 30ac ldr.w r3, [r3, #172] ; 0xac + 8030374: 4901 ldr r1, [pc, #4] ; (803037c ) + 8030376: 4313 orrs r3, r2 + 8030378: 658b str r3, [r1, #88] ; 0x58 + 803037a: e003 b.n 8030384 + 803037c: 58024400 .word 0x58024400 } else { /* set overall return value */ status = ret; - 80302fc: 7dfb ldrb r3, [r7, #23] - 80302fe: 75bb strb r3, [r7, #22] + 8030380: 7dfb ldrb r3, [r7, #23] + 8030382: 75bb strb r3, [r7, #22] } #endif /*DSI*/ #if defined(FDCAN1) || defined(FDCAN2) /*---------------------------- FDCAN configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN) - 8030300: 687b ldr r3, [r7, #4] - 8030302: 681b ldr r3, [r3, #0] - 8030304: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8030308: 2b00 cmp r3, #0 - 803030a: d02f beq.n 803036c + 8030384: 687b ldr r3, [r7, #4] + 8030386: 681b ldr r3, [r3, #0] + 8030388: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 803038c: 2b00 cmp r3, #0 + 803038e: d02f beq.n 80303f0 { switch(PeriphClkInit->FdcanClockSelection) - 803030c: 687b ldr r3, [r7, #4] - 803030e: 6edb ldr r3, [r3, #108] ; 0x6c - 8030310: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030314: d00e beq.n 8030334 - 8030316: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 803031a: d814 bhi.n 8030346 - 803031c: 2b00 cmp r3, #0 - 803031e: d015 beq.n 803034c - 8030320: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8030324: d10f bne.n 8030346 + 8030390: 687b ldr r3, [r7, #4] + 8030392: 6edb ldr r3, [r3, #108] ; 0x6c + 8030394: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030398: d00e beq.n 80303b8 + 803039a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803039e: d814 bhi.n 80303ca + 80303a0: 2b00 cmp r3, #0 + 80303a2: d015 beq.n 80303d0 + 80303a4: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 80303a8: d10f bne.n 80303ca { case RCC_FDCANCLKSOURCE_PLL: /* PLL is used as clock source for FDCAN*/ /* Enable FDCAN Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030326: 4baf ldr r3, [pc, #700] ; (80305e4 ) - 8030328: 6adb ldr r3, [r3, #44] ; 0x2c - 803032a: 4aae ldr r2, [pc, #696] ; (80305e4 ) - 803032c: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030330: 62d3 str r3, [r2, #44] ; 0x2c + 80303aa: 4baf ldr r3, [pc, #700] ; (8030668 ) + 80303ac: 6adb ldr r3, [r3, #44] ; 0x2c + 80303ae: 4aae ldr r2, [pc, #696] ; (8030668 ) + 80303b0: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 80303b4: 62d3 str r3, [r2, #44] ; 0x2c /* FDCAN clock source configuration done later after clock selection check */ break; - 8030332: e00c b.n 803034e + 80303b6: e00c b.n 80303d2 case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is used as clock source for FDCAN*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 8030334: 687b ldr r3, [r7, #4] - 8030336: 3304 adds r3, #4 - 8030338: 2101 movs r1, #1 - 803033a: 4618 mov r0, r3 - 803033c: f001 fd60 bl 8031e00 - 8030340: 4603 mov r3, r0 - 8030342: 75fb strb r3, [r7, #23] + 80303b8: 687b ldr r3, [r7, #4] + 80303ba: 3304 adds r3, #4 + 80303bc: 2101 movs r1, #1 + 80303be: 4618 mov r0, r3 + 80303c0: f001 fd60 bl 8031e84 + 80303c4: 4603 mov r3, r0 + 80303c6: 75fb strb r3, [r7, #23] /* FDCAN clock source configuration done later after clock selection check */ break; - 8030344: e003 b.n 803034e + 80303c8: e003 b.n 80303d2 /* HSE is used as clock source for FDCAN*/ /* FDCAN clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030346: 2301 movs r3, #1 - 8030348: 75fb strb r3, [r7, #23] + 80303ca: 2301 movs r3, #1 + 80303cc: 75fb strb r3, [r7, #23] break; - 803034a: e000 b.n 803034e + 80303ce: e000 b.n 80303d2 break; - 803034c: bf00 nop + 80303d0: bf00 nop } if(ret == HAL_OK) - 803034e: 7dfb ldrb r3, [r7, #23] - 8030350: 2b00 cmp r3, #0 - 8030352: d109 bne.n 8030368 + 80303d2: 7dfb ldrb r3, [r7, #23] + 80303d4: 2b00 cmp r3, #0 + 80303d6: d109 bne.n 80303ec { /* Set the source of FDCAN clock*/ __HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection); - 8030354: 4ba3 ldr r3, [pc, #652] ; (80305e4 ) - 8030356: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030358: f023 5240 bic.w r2, r3, #805306368 ; 0x30000000 - 803035c: 687b ldr r3, [r7, #4] - 803035e: 6edb ldr r3, [r3, #108] ; 0x6c - 8030360: 49a0 ldr r1, [pc, #640] ; (80305e4 ) - 8030362: 4313 orrs r3, r2 - 8030364: 650b str r3, [r1, #80] ; 0x50 - 8030366: e001 b.n 803036c + 80303d8: 4ba3 ldr r3, [pc, #652] ; (8030668 ) + 80303da: 6d1b ldr r3, [r3, #80] ; 0x50 + 80303dc: f023 5240 bic.w r2, r3, #805306368 ; 0x30000000 + 80303e0: 687b ldr r3, [r7, #4] + 80303e2: 6edb ldr r3, [r3, #108] ; 0x6c + 80303e4: 49a0 ldr r1, [pc, #640] ; (8030668 ) + 80303e6: 4313 orrs r3, r2 + 80303e8: 650b str r3, [r1, #80] ; 0x50 + 80303ea: e001 b.n 80303f0 } else { /* set overall return value */ status = ret; - 8030368: 7dfb ldrb r3, [r7, #23] - 803036a: 75bb strb r3, [r7, #22] + 80303ec: 7dfb ldrb r3, [r7, #23] + 80303ee: 75bb strb r3, [r7, #22] } } #endif /*FDCAN1 || FDCAN2*/ /*---------------------------- FMC configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMC) == RCC_PERIPHCLK_FMC) - 803036c: 687b ldr r3, [r7, #4] - 803036e: 681b ldr r3, [r3, #0] - 8030370: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8030374: 2b00 cmp r3, #0 - 8030376: d032 beq.n 80303de + 80303f0: 687b ldr r3, [r7, #4] + 80303f2: 681b ldr r3, [r3, #0] + 80303f4: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 80303f8: 2b00 cmp r3, #0 + 80303fa: d032 beq.n 8030462 { switch(PeriphClkInit->FmcClockSelection) - 8030378: 687b ldr r3, [r7, #4] - 803037a: 6c5b ldr r3, [r3, #68] ; 0x44 - 803037c: 2b03 cmp r3, #3 - 803037e: d81b bhi.n 80303b8 - 8030380: a201 add r2, pc, #4 ; (adr r2, 8030388 ) - 8030382: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8030386: bf00 nop - 8030388: 080303bf .word 0x080303bf - 803038c: 08030399 .word 0x08030399 - 8030390: 080303a7 .word 0x080303a7 - 8030394: 080303bf .word 0x080303bf + 80303fc: 687b ldr r3, [r7, #4] + 80303fe: 6c5b ldr r3, [r3, #68] ; 0x44 + 8030400: 2b03 cmp r3, #3 + 8030402: d81b bhi.n 803043c + 8030404: a201 add r2, pc, #4 ; (adr r2, 803040c ) + 8030406: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 803040a: bf00 nop + 803040c: 08030443 .word 0x08030443 + 8030410: 0803041d .word 0x0803041d + 8030414: 0803042b .word 0x0803042b + 8030418: 08030443 .word 0x08030443 { case RCC_FMCCLKSOURCE_PLL: /* PLL is used as clock source for FMC*/ /* Enable FMC Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030398: 4b92 ldr r3, [pc, #584] ; (80305e4 ) - 803039a: 6adb ldr r3, [r3, #44] ; 0x2c - 803039c: 4a91 ldr r2, [pc, #580] ; (80305e4 ) - 803039e: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 80303a2: 62d3 str r3, [r2, #44] ; 0x2c + 803041c: 4b92 ldr r3, [pc, #584] ; (8030668 ) + 803041e: 6adb ldr r3, [r3, #44] ; 0x2c + 8030420: 4a91 ldr r2, [pc, #580] ; (8030668 ) + 8030422: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030426: 62d3 str r3, [r2, #44] ; 0x2c /* FMC clock source configuration done later after clock selection check */ break; - 80303a4: e00c b.n 80303c0 + 8030428: e00c b.n 8030444 case RCC_FMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for FMC*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_R_UPDATE); - 80303a6: 687b ldr r3, [r7, #4] - 80303a8: 3304 adds r3, #4 - 80303aa: 2102 movs r1, #2 - 80303ac: 4618 mov r0, r3 - 80303ae: f001 fd27 bl 8031e00 - 80303b2: 4603 mov r3, r0 - 80303b4: 75fb strb r3, [r7, #23] + 803042a: 687b ldr r3, [r7, #4] + 803042c: 3304 adds r3, #4 + 803042e: 2102 movs r1, #2 + 8030430: 4618 mov r0, r3 + 8030432: f001 fd27 bl 8031e84 + 8030436: 4603 mov r3, r0 + 8030438: 75fb strb r3, [r7, #23] /* FMC clock source configuration done later after clock selection check */ break; - 80303b6: e003 b.n 80303c0 + 803043a: e003 b.n 8030444 case RCC_FMCCLKSOURCE_HCLK: /* D1/CD HCLK clock selected as FMC kernel peripheral clock */ break; default: ret = HAL_ERROR; - 80303b8: 2301 movs r3, #1 - 80303ba: 75fb strb r3, [r7, #23] + 803043c: 2301 movs r3, #1 + 803043e: 75fb strb r3, [r7, #23] break; - 80303bc: e000 b.n 80303c0 + 8030440: e000 b.n 8030444 break; - 80303be: bf00 nop + 8030442: bf00 nop } if(ret == HAL_OK) - 80303c0: 7dfb ldrb r3, [r7, #23] - 80303c2: 2b00 cmp r3, #0 - 80303c4: d109 bne.n 80303da + 8030444: 7dfb ldrb r3, [r7, #23] + 8030446: 2b00 cmp r3, #0 + 8030448: d109 bne.n 803045e { /* Set the source of FMC clock*/ __HAL_RCC_FMC_CONFIG(PeriphClkInit->FmcClockSelection); - 80303c6: 4b87 ldr r3, [pc, #540] ; (80305e4 ) - 80303c8: 6cdb ldr r3, [r3, #76] ; 0x4c - 80303ca: f023 0203 bic.w r2, r3, #3 - 80303ce: 687b ldr r3, [r7, #4] - 80303d0: 6c5b ldr r3, [r3, #68] ; 0x44 - 80303d2: 4984 ldr r1, [pc, #528] ; (80305e4 ) - 80303d4: 4313 orrs r3, r2 - 80303d6: 64cb str r3, [r1, #76] ; 0x4c - 80303d8: e001 b.n 80303de + 803044a: 4b87 ldr r3, [pc, #540] ; (8030668 ) + 803044c: 6cdb ldr r3, [r3, #76] ; 0x4c + 803044e: f023 0203 bic.w r2, r3, #3 + 8030452: 687b ldr r3, [r7, #4] + 8030454: 6c5b ldr r3, [r3, #68] ; 0x44 + 8030456: 4984 ldr r1, [pc, #528] ; (8030668 ) + 8030458: 4313 orrs r3, r2 + 803045a: 64cb str r3, [r1, #76] ; 0x4c + 803045c: e001 b.n 8030462 } else { /* set overall return value */ status = ret; - 80303da: 7dfb ldrb r3, [r7, #23] - 80303dc: 75bb strb r3, [r7, #22] + 803045e: 7dfb ldrb r3, [r7, #23] + 8030460: 75bb strb r3, [r7, #22] } } /*---------------------------- RTC configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - 80303de: 687b ldr r3, [r7, #4] - 80303e0: 681b ldr r3, [r3, #0] - 80303e2: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 80303e6: 2b00 cmp r3, #0 - 80303e8: f000 8086 beq.w 80304f8 + 8030462: 687b ldr r3, [r7, #4] + 8030464: 681b ldr r3, [r3, #0] + 8030466: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 803046a: 2b00 cmp r3, #0 + 803046c: f000 8086 beq.w 803057c { /* check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable write access to Backup domain */ SET_BIT(PWR->CR1, PWR_CR1_DBP); - 80303ec: 4b7e ldr r3, [pc, #504] ; (80305e8 ) - 80303ee: 681b ldr r3, [r3, #0] - 80303f0: 4a7d ldr r2, [pc, #500] ; (80305e8 ) - 80303f2: f443 7380 orr.w r3, r3, #256 ; 0x100 - 80303f6: 6013 str r3, [r2, #0] + 8030470: 4b7e ldr r3, [pc, #504] ; (803066c ) + 8030472: 681b ldr r3, [r3, #0] + 8030474: 4a7d ldr r2, [pc, #500] ; (803066c ) + 8030476: f443 7380 orr.w r3, r3, #256 ; 0x100 + 803047a: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80303f8: f7f5 fde4 bl 8025fc4 - 80303fc: 6138 str r0, [r7, #16] + 803047c: f7f5 fde4 bl 8026048 + 8030480: 6138 str r0, [r7, #16] while((PWR->CR1 & PWR_CR1_DBP) == 0U) - 80303fe: e009 b.n 8030414 + 8030482: e009 b.n 8030498 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8030400: f7f5 fde0 bl 8025fc4 - 8030404: 4602 mov r2, r0 - 8030406: 693b ldr r3, [r7, #16] - 8030408: 1ad3 subs r3, r2, r3 - 803040a: 2b64 cmp r3, #100 ; 0x64 - 803040c: d902 bls.n 8030414 + 8030484: f7f5 fde0 bl 8026048 + 8030488: 4602 mov r2, r0 + 803048a: 693b ldr r3, [r7, #16] + 803048c: 1ad3 subs r3, r2, r3 + 803048e: 2b64 cmp r3, #100 ; 0x64 + 8030490: d902 bls.n 8030498 { ret = HAL_TIMEOUT; - 803040e: 2303 movs r3, #3 - 8030410: 75fb strb r3, [r7, #23] + 8030492: 2303 movs r3, #3 + 8030494: 75fb strb r3, [r7, #23] break; - 8030412: e005 b.n 8030420 + 8030496: e005 b.n 80304a4 while((PWR->CR1 & PWR_CR1_DBP) == 0U) - 8030414: 4b74 ldr r3, [pc, #464] ; (80305e8 ) - 8030416: 681b ldr r3, [r3, #0] - 8030418: f403 7380 and.w r3, r3, #256 ; 0x100 - 803041c: 2b00 cmp r3, #0 - 803041e: d0ef beq.n 8030400 + 8030498: 4b74 ldr r3, [pc, #464] ; (803066c ) + 803049a: 681b ldr r3, [r3, #0] + 803049c: f403 7380 and.w r3, r3, #256 ; 0x100 + 80304a0: 2b00 cmp r3, #0 + 80304a2: d0ef beq.n 8030484 } } if(ret == HAL_OK) - 8030420: 7dfb ldrb r3, [r7, #23] - 8030422: 2b00 cmp r3, #0 - 8030424: d166 bne.n 80304f4 + 80304a4: 7dfb ldrb r3, [r7, #23] + 80304a6: 2b00 cmp r3, #0 + 80304a8: d166 bne.n 8030578 { /* Reset the Backup domain only if the RTC Clock source selection is modified */ if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)) - 8030426: 4b6f ldr r3, [pc, #444] ; (80305e4 ) - 8030428: 6f1a ldr r2, [r3, #112] ; 0x70 - 803042a: 687b ldr r3, [r7, #4] - 803042c: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 8030430: 4053 eors r3, r2 - 8030432: f403 7340 and.w r3, r3, #768 ; 0x300 - 8030436: 2b00 cmp r3, #0 - 8030438: d013 beq.n 8030462 + 80304aa: 4b6f ldr r3, [pc, #444] ; (8030668 ) + 80304ac: 6f1a ldr r2, [r3, #112] ; 0x70 + 80304ae: 687b ldr r3, [r7, #4] + 80304b0: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 80304b4: 4053 eors r3, r2 + 80304b6: f403 7340 and.w r3, r3, #768 ; 0x300 + 80304ba: 2b00 cmp r3, #0 + 80304bc: d013 beq.n 80304e6 { /* Store the content of BDCR register before the reset of Backup Domain */ tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 803043a: 4b6a ldr r3, [pc, #424] ; (80305e4 ) - 803043c: 6f1b ldr r3, [r3, #112] ; 0x70 - 803043e: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8030442: 60fb str r3, [r7, #12] + 80304be: 4b6a ldr r3, [pc, #424] ; (8030668 ) + 80304c0: 6f1b ldr r3, [r3, #112] ; 0x70 + 80304c2: f423 7340 bic.w r3, r3, #768 ; 0x300 + 80304c6: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 8030444: 4b67 ldr r3, [pc, #412] ; (80305e4 ) - 8030446: 6f1b ldr r3, [r3, #112] ; 0x70 - 8030448: 4a66 ldr r2, [pc, #408] ; (80305e4 ) - 803044a: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 803044e: 6713 str r3, [r2, #112] ; 0x70 + 80304c8: 4b67 ldr r3, [pc, #412] ; (8030668 ) + 80304ca: 6f1b ldr r3, [r3, #112] ; 0x70 + 80304cc: 4a66 ldr r2, [pc, #408] ; (8030668 ) + 80304ce: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 80304d2: 6713 str r3, [r2, #112] ; 0x70 __HAL_RCC_BACKUPRESET_RELEASE(); - 8030450: 4b64 ldr r3, [pc, #400] ; (80305e4 ) - 8030452: 6f1b ldr r3, [r3, #112] ; 0x70 - 8030454: 4a63 ldr r2, [pc, #396] ; (80305e4 ) - 8030456: f423 3380 bic.w r3, r3, #65536 ; 0x10000 - 803045a: 6713 str r3, [r2, #112] ; 0x70 + 80304d4: 4b64 ldr r3, [pc, #400] ; (8030668 ) + 80304d6: 6f1b ldr r3, [r3, #112] ; 0x70 + 80304d8: 4a63 ldr r2, [pc, #396] ; (8030668 ) + 80304da: f423 3380 bic.w r3, r3, #65536 ; 0x10000 + 80304de: 6713 str r3, [r2, #112] ; 0x70 /* Restore the Content of BDCR register */ RCC->BDCR = tmpreg; - 803045c: 4a61 ldr r2, [pc, #388] ; (80305e4 ) - 803045e: 68fb ldr r3, [r7, #12] - 8030460: 6713 str r3, [r2, #112] ; 0x70 + 80304e0: 4a61 ldr r2, [pc, #388] ; (8030668 ) + 80304e2: 68fb ldr r3, [r7, #12] + 80304e4: 6713 str r3, [r2, #112] ; 0x70 } /* If LSE is selected as RTC clock source (and enabled prior to Backup Domain reset), wait for LSE reactivation */ if(PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE) - 8030462: 687b ldr r3, [r7, #4] - 8030464: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 8030468: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803046c: d115 bne.n 803049a + 80304e6: 687b ldr r3, [r7, #4] + 80304e8: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 80304ec: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80304f0: d115 bne.n 803051e { /* Get Start Tick*/ tickstart = HAL_GetTick(); - 803046e: f7f5 fda9 bl 8025fc4 - 8030472: 6138 str r0, [r7, #16] + 80304f2: f7f5 fda9 bl 8026048 + 80304f6: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 8030474: e00b b.n 803048e + 80304f8: e00b b.n 8030512 { if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8030476: f7f5 fda5 bl 8025fc4 - 803047a: 4602 mov r2, r0 - 803047c: 693b ldr r3, [r7, #16] - 803047e: 1ad3 subs r3, r2, r3 - 8030480: f241 3288 movw r2, #5000 ; 0x1388 - 8030484: 4293 cmp r3, r2 - 8030486: d902 bls.n 803048e + 80304fa: f7f5 fda5 bl 8026048 + 80304fe: 4602 mov r2, r0 + 8030500: 693b ldr r3, [r7, #16] + 8030502: 1ad3 subs r3, r2, r3 + 8030504: f241 3288 movw r2, #5000 ; 0x1388 + 8030508: 4293 cmp r3, r2 + 803050a: d902 bls.n 8030512 { ret = HAL_TIMEOUT; - 8030488: 2303 movs r3, #3 - 803048a: 75fb strb r3, [r7, #23] + 803050c: 2303 movs r3, #3 + 803050e: 75fb strb r3, [r7, #23] break; - 803048c: e005 b.n 803049a + 8030510: e005 b.n 803051e while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 803048e: 4b55 ldr r3, [pc, #340] ; (80305e4 ) - 8030490: 6f1b ldr r3, [r3, #112] ; 0x70 - 8030492: f003 0302 and.w r3, r3, #2 - 8030496: 2b00 cmp r3, #0 - 8030498: d0ed beq.n 8030476 + 8030512: 4b55 ldr r3, [pc, #340] ; (8030668 ) + 8030514: 6f1b ldr r3, [r3, #112] ; 0x70 + 8030516: f003 0302 and.w r3, r3, #2 + 803051a: 2b00 cmp r3, #0 + 803051c: d0ed beq.n 80304fa } } } if(ret == HAL_OK) - 803049a: 7dfb ldrb r3, [r7, #23] - 803049c: 2b00 cmp r3, #0 - 803049e: d126 bne.n 80304ee + 803051e: 7dfb ldrb r3, [r7, #23] + 8030520: 2b00 cmp r3, #0 + 8030522: d126 bne.n 8030572 { __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 80304a0: 687b ldr r3, [r7, #4] - 80304a2: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 80304a6: f403 7340 and.w r3, r3, #768 ; 0x300 - 80304aa: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 80304ae: d10d bne.n 80304cc - 80304b0: 4b4c ldr r3, [pc, #304] ; (80305e4 ) - 80304b2: 691b ldr r3, [r3, #16] - 80304b4: f423 527c bic.w r2, r3, #16128 ; 0x3f00 - 80304b8: 687b ldr r3, [r7, #4] - 80304ba: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 80304be: 0919 lsrs r1, r3, #4 - 80304c0: 4b4a ldr r3, [pc, #296] ; (80305ec ) - 80304c2: 400b ands r3, r1 - 80304c4: 4947 ldr r1, [pc, #284] ; (80305e4 ) - 80304c6: 4313 orrs r3, r2 - 80304c8: 610b str r3, [r1, #16] - 80304ca: e005 b.n 80304d8 - 80304cc: 4b45 ldr r3, [pc, #276] ; (80305e4 ) - 80304ce: 691b ldr r3, [r3, #16] - 80304d0: 4a44 ldr r2, [pc, #272] ; (80305e4 ) - 80304d2: f423 537c bic.w r3, r3, #16128 ; 0x3f00 - 80304d6: 6113 str r3, [r2, #16] - 80304d8: 4b42 ldr r3, [pc, #264] ; (80305e4 ) - 80304da: 6f1a ldr r2, [r3, #112] ; 0x70 - 80304dc: 687b ldr r3, [r7, #4] - 80304de: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 - 80304e2: f3c3 030b ubfx r3, r3, #0, #12 - 80304e6: 493f ldr r1, [pc, #252] ; (80305e4 ) - 80304e8: 4313 orrs r3, r2 - 80304ea: 670b str r3, [r1, #112] ; 0x70 - 80304ec: e004 b.n 80304f8 + 8030524: 687b ldr r3, [r7, #4] + 8030526: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 803052a: f403 7340 and.w r3, r3, #768 ; 0x300 + 803052e: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 8030532: d10d bne.n 8030550 + 8030534: 4b4c ldr r3, [pc, #304] ; (8030668 ) + 8030536: 691b ldr r3, [r3, #16] + 8030538: f423 527c bic.w r2, r3, #16128 ; 0x3f00 + 803053c: 687b ldr r3, [r7, #4] + 803053e: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 8030542: 0919 lsrs r1, r3, #4 + 8030544: 4b4a ldr r3, [pc, #296] ; (8030670 ) + 8030546: 400b ands r3, r1 + 8030548: 4947 ldr r1, [pc, #284] ; (8030668 ) + 803054a: 4313 orrs r3, r2 + 803054c: 610b str r3, [r1, #16] + 803054e: e005 b.n 803055c + 8030550: 4b45 ldr r3, [pc, #276] ; (8030668 ) + 8030552: 691b ldr r3, [r3, #16] + 8030554: 4a44 ldr r2, [pc, #272] ; (8030668 ) + 8030556: f423 537c bic.w r3, r3, #16128 ; 0x3f00 + 803055a: 6113 str r3, [r2, #16] + 803055c: 4b42 ldr r3, [pc, #264] ; (8030668 ) + 803055e: 6f1a ldr r2, [r3, #112] ; 0x70 + 8030560: 687b ldr r3, [r7, #4] + 8030562: f8d3 30b0 ldr.w r3, [r3, #176] ; 0xb0 + 8030566: f3c3 030b ubfx r3, r3, #0, #12 + 803056a: 493f ldr r1, [pc, #252] ; (8030668 ) + 803056c: 4313 orrs r3, r2 + 803056e: 670b str r3, [r1, #112] ; 0x70 + 8030570: e004 b.n 803057c } else { /* set overall return value */ status = ret; - 80304ee: 7dfb ldrb r3, [r7, #23] - 80304f0: 75bb strb r3, [r7, #22] - 80304f2: e001 b.n 80304f8 + 8030572: 7dfb ldrb r3, [r7, #23] + 8030574: 75bb strb r3, [r7, #22] + 8030576: e001 b.n 803057c } } else { /* set overall return value */ status = ret; - 80304f4: 7dfb ldrb r3, [r7, #23] - 80304f6: 75bb strb r3, [r7, #22] + 8030578: 7dfb ldrb r3, [r7, #23] + 803057a: 75bb strb r3, [r7, #22] } } /*-------------------------- USART1/6 configuration --------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART16) == RCC_PERIPHCLK_USART16) - 80304f8: 687b ldr r3, [r7, #4] - 80304fa: 681b ldr r3, [r3, #0] - 80304fc: f003 0301 and.w r3, r3, #1 - 8030500: 2b00 cmp r3, #0 - 8030502: f000 8085 beq.w 8030610 + 803057c: 687b ldr r3, [r7, #4] + 803057e: 681b ldr r3, [r3, #0] + 8030580: f003 0301 and.w r3, r3, #1 + 8030584: 2b00 cmp r3, #0 + 8030586: f000 8085 beq.w 8030694 { switch(PeriphClkInit->Usart16ClockSelection) - 8030506: 687b ldr r3, [r7, #4] - 8030508: 6f9b ldr r3, [r3, #120] ; 0x78 - 803050a: 2b28 cmp r3, #40 ; 0x28 - 803050c: d866 bhi.n 80305dc - 803050e: a201 add r2, pc, #4 ; (adr r2, 8030514 ) - 8030510: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8030514: 080305f1 .word 0x080305f1 - 8030518: 080305dd .word 0x080305dd - 803051c: 080305dd .word 0x080305dd - 8030520: 080305dd .word 0x080305dd - 8030524: 080305dd .word 0x080305dd - 8030528: 080305dd .word 0x080305dd - 803052c: 080305dd .word 0x080305dd - 8030530: 080305dd .word 0x080305dd - 8030534: 080305b9 .word 0x080305b9 - 8030538: 080305dd .word 0x080305dd - 803053c: 080305dd .word 0x080305dd - 8030540: 080305dd .word 0x080305dd - 8030544: 080305dd .word 0x080305dd - 8030548: 080305dd .word 0x080305dd - 803054c: 080305dd .word 0x080305dd - 8030550: 080305dd .word 0x080305dd - 8030554: 080305cb .word 0x080305cb - 8030558: 080305dd .word 0x080305dd - 803055c: 080305dd .word 0x080305dd - 8030560: 080305dd .word 0x080305dd - 8030564: 080305dd .word 0x080305dd - 8030568: 080305dd .word 0x080305dd - 803056c: 080305dd .word 0x080305dd - 8030570: 080305dd .word 0x080305dd - 8030574: 080305f1 .word 0x080305f1 - 8030578: 080305dd .word 0x080305dd - 803057c: 080305dd .word 0x080305dd - 8030580: 080305dd .word 0x080305dd - 8030584: 080305dd .word 0x080305dd - 8030588: 080305dd .word 0x080305dd - 803058c: 080305dd .word 0x080305dd - 8030590: 080305dd .word 0x080305dd - 8030594: 080305f1 .word 0x080305f1 - 8030598: 080305dd .word 0x080305dd - 803059c: 080305dd .word 0x080305dd - 80305a0: 080305dd .word 0x080305dd - 80305a4: 080305dd .word 0x080305dd - 80305a8: 080305dd .word 0x080305dd - 80305ac: 080305dd .word 0x080305dd - 80305b0: 080305dd .word 0x080305dd - 80305b4: 080305f1 .word 0x080305f1 + 803058a: 687b ldr r3, [r7, #4] + 803058c: 6f9b ldr r3, [r3, #120] ; 0x78 + 803058e: 2b28 cmp r3, #40 ; 0x28 + 8030590: d866 bhi.n 8030660 + 8030592: a201 add r2, pc, #4 ; (adr r2, 8030598 ) + 8030594: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8030598: 08030675 .word 0x08030675 + 803059c: 08030661 .word 0x08030661 + 80305a0: 08030661 .word 0x08030661 + 80305a4: 08030661 .word 0x08030661 + 80305a8: 08030661 .word 0x08030661 + 80305ac: 08030661 .word 0x08030661 + 80305b0: 08030661 .word 0x08030661 + 80305b4: 08030661 .word 0x08030661 + 80305b8: 0803063d .word 0x0803063d + 80305bc: 08030661 .word 0x08030661 + 80305c0: 08030661 .word 0x08030661 + 80305c4: 08030661 .word 0x08030661 + 80305c8: 08030661 .word 0x08030661 + 80305cc: 08030661 .word 0x08030661 + 80305d0: 08030661 .word 0x08030661 + 80305d4: 08030661 .word 0x08030661 + 80305d8: 0803064f .word 0x0803064f + 80305dc: 08030661 .word 0x08030661 + 80305e0: 08030661 .word 0x08030661 + 80305e4: 08030661 .word 0x08030661 + 80305e8: 08030661 .word 0x08030661 + 80305ec: 08030661 .word 0x08030661 + 80305f0: 08030661 .word 0x08030661 + 80305f4: 08030661 .word 0x08030661 + 80305f8: 08030675 .word 0x08030675 + 80305fc: 08030661 .word 0x08030661 + 8030600: 08030661 .word 0x08030661 + 8030604: 08030661 .word 0x08030661 + 8030608: 08030661 .word 0x08030661 + 803060c: 08030661 .word 0x08030661 + 8030610: 08030661 .word 0x08030661 + 8030614: 08030661 .word 0x08030661 + 8030618: 08030675 .word 0x08030675 + 803061c: 08030661 .word 0x08030661 + 8030620: 08030661 .word 0x08030661 + 8030624: 08030661 .word 0x08030661 + 8030628: 08030661 .word 0x08030661 + 803062c: 08030661 .word 0x08030661 + 8030630: 08030661 .word 0x08030661 + 8030634: 08030661 .word 0x08030661 + 8030638: 08030675 .word 0x08030675 case RCC_USART16CLKSOURCE_PCLK2: /* CD/D2 PCLK2 as clock source for USART1/6 */ /* USART1/6 clock source configuration done later after clock selection check */ break; case RCC_USART16CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART1/6 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 80305b8: 687b ldr r3, [r7, #4] - 80305ba: 3304 adds r3, #4 - 80305bc: 2101 movs r1, #1 - 80305be: 4618 mov r0, r3 - 80305c0: f001 fc1e bl 8031e00 - 80305c4: 4603 mov r3, r0 - 80305c6: 75fb strb r3, [r7, #23] + 803063c: 687b ldr r3, [r7, #4] + 803063e: 3304 adds r3, #4 + 8030640: 2101 movs r1, #1 + 8030642: 4618 mov r0, r3 + 8030644: f001 fc1e bl 8031e84 + 8030648: 4603 mov r3, r0 + 803064a: 75fb strb r3, [r7, #23] /* USART1/6 clock source configuration done later after clock selection check */ break; - 80305c8: e013 b.n 80305f2 + 803064c: e013 b.n 8030676 case RCC_USART16CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART1/6 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 80305ca: 687b ldr r3, [r7, #4] - 80305cc: 3324 adds r3, #36 ; 0x24 - 80305ce: 2101 movs r1, #1 - 80305d0: 4618 mov r0, r3 - 80305d2: f001 fcc7 bl 8031f64 - 80305d6: 4603 mov r3, r0 - 80305d8: 75fb strb r3, [r7, #23] + 803064e: 687b ldr r3, [r7, #4] + 8030650: 3324 adds r3, #36 ; 0x24 + 8030652: 2101 movs r1, #1 + 8030654: 4618 mov r0, r3 + 8030656: f001 fcc7 bl 8031fe8 + 803065a: 4603 mov r3, r0 + 803065c: 75fb strb r3, [r7, #23] /* USART1/6 clock source configuration done later after clock selection check */ break; - 80305da: e00a b.n 80305f2 + 803065e: e00a b.n 8030676 /* LSE, oscillator is used as source of USART1/6 clock */ /* USART1/6 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 80305dc: 2301 movs r3, #1 - 80305de: 75fb strb r3, [r7, #23] + 8030660: 2301 movs r3, #1 + 8030662: 75fb strb r3, [r7, #23] break; - 80305e0: e007 b.n 80305f2 - 80305e2: bf00 nop - 80305e4: 58024400 .word 0x58024400 - 80305e8: 58024800 .word 0x58024800 - 80305ec: 00ffffcf .word 0x00ffffcf + 8030664: e007 b.n 8030676 + 8030666: bf00 nop + 8030668: 58024400 .word 0x58024400 + 803066c: 58024800 .word 0x58024800 + 8030670: 00ffffcf .word 0x00ffffcf break; - 80305f0: bf00 nop + 8030674: bf00 nop } if(ret == HAL_OK) - 80305f2: 7dfb ldrb r3, [r7, #23] - 80305f4: 2b00 cmp r3, #0 - 80305f6: d109 bne.n 803060c + 8030676: 7dfb ldrb r3, [r7, #23] + 8030678: 2b00 cmp r3, #0 + 803067a: d109 bne.n 8030690 { /* Set the source of USART1/6 clock */ __HAL_RCC_USART16_CONFIG(PeriphClkInit->Usart16ClockSelection); - 80305f8: 4b96 ldr r3, [pc, #600] ; (8030854 ) - 80305fa: 6d5b ldr r3, [r3, #84] ; 0x54 - 80305fc: f023 0238 bic.w r2, r3, #56 ; 0x38 - 8030600: 687b ldr r3, [r7, #4] - 8030602: 6f9b ldr r3, [r3, #120] ; 0x78 - 8030604: 4993 ldr r1, [pc, #588] ; (8030854 ) - 8030606: 4313 orrs r3, r2 - 8030608: 654b str r3, [r1, #84] ; 0x54 - 803060a: e001 b.n 8030610 + 803067c: 4b96 ldr r3, [pc, #600] ; (80308d8 ) + 803067e: 6d5b ldr r3, [r3, #84] ; 0x54 + 8030680: f023 0238 bic.w r2, r3, #56 ; 0x38 + 8030684: 687b ldr r3, [r7, #4] + 8030686: 6f9b ldr r3, [r3, #120] ; 0x78 + 8030688: 4993 ldr r1, [pc, #588] ; (80308d8 ) + 803068a: 4313 orrs r3, r2 + 803068c: 654b str r3, [r1, #84] ; 0x54 + 803068e: e001 b.n 8030694 } else { /* set overall return value */ status = ret; - 803060c: 7dfb ldrb r3, [r7, #23] - 803060e: 75bb strb r3, [r7, #22] + 8030690: 7dfb ldrb r3, [r7, #23] + 8030692: 75bb strb r3, [r7, #22] } } /*-------------------------- USART2/3/4/5/7/8 Configuration --------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART234578) == RCC_PERIPHCLK_USART234578) - 8030610: 687b ldr r3, [r7, #4] - 8030612: 681b ldr r3, [r3, #0] - 8030614: f003 0302 and.w r3, r3, #2 - 8030618: 2b00 cmp r3, #0 - 803061a: d038 beq.n 803068e + 8030694: 687b ldr r3, [r7, #4] + 8030696: 681b ldr r3, [r3, #0] + 8030698: f003 0302 and.w r3, r3, #2 + 803069c: 2b00 cmp r3, #0 + 803069e: d038 beq.n 8030712 { switch(PeriphClkInit->Usart234578ClockSelection) - 803061c: 687b ldr r3, [r7, #4] - 803061e: 6f5b ldr r3, [r3, #116] ; 0x74 - 8030620: 2b05 cmp r3, #5 - 8030622: d821 bhi.n 8030668 - 8030624: a201 add r2, pc, #4 ; (adr r2, 803062c ) - 8030626: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 803062a: bf00 nop - 803062c: 0803066f .word 0x0803066f - 8030630: 08030645 .word 0x08030645 - 8030634: 08030657 .word 0x08030657 - 8030638: 0803066f .word 0x0803066f - 803063c: 0803066f .word 0x0803066f - 8030640: 0803066f .word 0x0803066f + 80306a0: 687b ldr r3, [r7, #4] + 80306a2: 6f5b ldr r3, [r3, #116] ; 0x74 + 80306a4: 2b05 cmp r3, #5 + 80306a6: d821 bhi.n 80306ec + 80306a8: a201 add r2, pc, #4 ; (adr r2, 80306b0 ) + 80306aa: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80306ae: bf00 nop + 80306b0: 080306f3 .word 0x080306f3 + 80306b4: 080306c9 .word 0x080306c9 + 80306b8: 080306db .word 0x080306db + 80306bc: 080306f3 .word 0x080306f3 + 80306c0: 080306f3 .word 0x080306f3 + 80306c4: 080306f3 .word 0x080306f3 case RCC_USART234578CLKSOURCE_PCLK1: /* CD/D2 PCLK1 as clock source for USART2/3/4/5/7/8 */ /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */ break; case RCC_USART234578CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART2/3/4/5/7/8 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 8030644: 687b ldr r3, [r7, #4] - 8030646: 3304 adds r3, #4 - 8030648: 2101 movs r1, #1 - 803064a: 4618 mov r0, r3 - 803064c: f001 fbd8 bl 8031e00 - 8030650: 4603 mov r3, r0 - 8030652: 75fb strb r3, [r7, #23] + 80306c8: 687b ldr r3, [r7, #4] + 80306ca: 3304 adds r3, #4 + 80306cc: 2101 movs r1, #1 + 80306ce: 4618 mov r0, r3 + 80306d0: f001 fbd8 bl 8031e84 + 80306d4: 4603 mov r3, r0 + 80306d6: 75fb strb r3, [r7, #23] /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */ break; - 8030654: e00c b.n 8030670 + 80306d8: e00c b.n 80306f4 case RCC_USART234578CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART2/3/4/5/7/8 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 8030656: 687b ldr r3, [r7, #4] - 8030658: 3324 adds r3, #36 ; 0x24 - 803065a: 2101 movs r1, #1 - 803065c: 4618 mov r0, r3 - 803065e: f001 fc81 bl 8031f64 - 8030662: 4603 mov r3, r0 - 8030664: 75fb strb r3, [r7, #23] + 80306da: 687b ldr r3, [r7, #4] + 80306dc: 3324 adds r3, #36 ; 0x24 + 80306de: 2101 movs r1, #1 + 80306e0: 4618 mov r0, r3 + 80306e2: f001 fc81 bl 8031fe8 + 80306e6: 4603 mov r3, r0 + 80306e8: 75fb strb r3, [r7, #23] /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */ break; - 8030666: e003 b.n 8030670 + 80306ea: e003 b.n 80306f4 /* LSE, oscillator is used as source of USART2/3/4/5/7/8 clock */ /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030668: 2301 movs r3, #1 - 803066a: 75fb strb r3, [r7, #23] + 80306ec: 2301 movs r3, #1 + 80306ee: 75fb strb r3, [r7, #23] break; - 803066c: e000 b.n 8030670 + 80306f0: e000 b.n 80306f4 break; - 803066e: bf00 nop + 80306f2: bf00 nop } if(ret == HAL_OK) - 8030670: 7dfb ldrb r3, [r7, #23] - 8030672: 2b00 cmp r3, #0 - 8030674: d109 bne.n 803068a + 80306f4: 7dfb ldrb r3, [r7, #23] + 80306f6: 2b00 cmp r3, #0 + 80306f8: d109 bne.n 803070e { /* Set the source of USART2/3/4/5/7/8 clock */ __HAL_RCC_USART234578_CONFIG(PeriphClkInit->Usart234578ClockSelection); - 8030676: 4b77 ldr r3, [pc, #476] ; (8030854 ) - 8030678: 6d5b ldr r3, [r3, #84] ; 0x54 - 803067a: f023 0207 bic.w r2, r3, #7 - 803067e: 687b ldr r3, [r7, #4] - 8030680: 6f5b ldr r3, [r3, #116] ; 0x74 - 8030682: 4974 ldr r1, [pc, #464] ; (8030854 ) - 8030684: 4313 orrs r3, r2 - 8030686: 654b str r3, [r1, #84] ; 0x54 - 8030688: e001 b.n 803068e + 80306fa: 4b77 ldr r3, [pc, #476] ; (80308d8 ) + 80306fc: 6d5b ldr r3, [r3, #84] ; 0x54 + 80306fe: f023 0207 bic.w r2, r3, #7 + 8030702: 687b ldr r3, [r7, #4] + 8030704: 6f5b ldr r3, [r3, #116] ; 0x74 + 8030706: 4974 ldr r1, [pc, #464] ; (80308d8 ) + 8030708: 4313 orrs r3, r2 + 803070a: 654b str r3, [r1, #84] ; 0x54 + 803070c: e001 b.n 8030712 } else { /* set overall return value */ status = ret; - 803068a: 7dfb ldrb r3, [r7, #23] - 803068c: 75bb strb r3, [r7, #22] + 803070e: 7dfb ldrb r3, [r7, #23] + 8030710: 75bb strb r3, [r7, #22] } } /*-------------------------- LPUART1 Configuration -------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) - 803068e: 687b ldr r3, [r7, #4] - 8030690: 681b ldr r3, [r3, #0] - 8030692: f003 0304 and.w r3, r3, #4 - 8030696: 2b00 cmp r3, #0 - 8030698: d03a beq.n 8030710 + 8030712: 687b ldr r3, [r7, #4] + 8030714: 681b ldr r3, [r3, #0] + 8030716: f003 0304 and.w r3, r3, #4 + 803071a: 2b00 cmp r3, #0 + 803071c: d03a beq.n 8030794 { switch(PeriphClkInit->Lpuart1ClockSelection) - 803069a: 687b ldr r3, [r7, #4] - 803069c: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 80306a0: 2b05 cmp r3, #5 - 80306a2: d821 bhi.n 80306e8 - 80306a4: a201 add r2, pc, #4 ; (adr r2, 80306ac ) - 80306a6: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80306aa: bf00 nop - 80306ac: 080306ef .word 0x080306ef - 80306b0: 080306c5 .word 0x080306c5 - 80306b4: 080306d7 .word 0x080306d7 - 80306b8: 080306ef .word 0x080306ef - 80306bc: 080306ef .word 0x080306ef - 80306c0: 080306ef .word 0x080306ef + 803071e: 687b ldr r3, [r7, #4] + 8030720: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8030724: 2b05 cmp r3, #5 + 8030726: d821 bhi.n 803076c + 8030728: a201 add r2, pc, #4 ; (adr r2, 8030730 ) + 803072a: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 803072e: bf00 nop + 8030730: 08030773 .word 0x08030773 + 8030734: 08030749 .word 0x08030749 + 8030738: 0803075b .word 0x0803075b + 803073c: 08030773 .word 0x08030773 + 8030740: 08030773 .word 0x08030773 + 8030744: 08030773 .word 0x08030773 case RCC_LPUART1CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPUART1 */ /* LPUART1 clock source configuration done later after clock selection check */ break; case RCC_LPUART1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPUART1 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_Q_UPDATE); - 80306c4: 687b ldr r3, [r7, #4] - 80306c6: 3304 adds r3, #4 - 80306c8: 2101 movs r1, #1 - 80306ca: 4618 mov r0, r3 - 80306cc: f001 fb98 bl 8031e00 - 80306d0: 4603 mov r3, r0 - 80306d2: 75fb strb r3, [r7, #23] + 8030748: 687b ldr r3, [r7, #4] + 803074a: 3304 adds r3, #4 + 803074c: 2101 movs r1, #1 + 803074e: 4618 mov r0, r3 + 8030750: f001 fb98 bl 8031e84 + 8030754: 4603 mov r3, r0 + 8030756: 75fb strb r3, [r7, #23] /* LPUART1 clock source configuration done later after clock selection check */ break; - 80306d4: e00c b.n 80306f0 + 8030758: e00c b.n 8030774 case RCC_LPUART1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPUART1 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 80306d6: 687b ldr r3, [r7, #4] - 80306d8: 3324 adds r3, #36 ; 0x24 - 80306da: 2101 movs r1, #1 - 80306dc: 4618 mov r0, r3 - 80306de: f001 fc41 bl 8031f64 - 80306e2: 4603 mov r3, r0 - 80306e4: 75fb strb r3, [r7, #23] + 803075a: 687b ldr r3, [r7, #4] + 803075c: 3324 adds r3, #36 ; 0x24 + 803075e: 2101 movs r1, #1 + 8030760: 4618 mov r0, r3 + 8030762: f001 fc41 bl 8031fe8 + 8030766: 4603 mov r3, r0 + 8030768: 75fb strb r3, [r7, #23] /* LPUART1 clock source configuration done later after clock selection check */ break; - 80306e6: e003 b.n 80306f0 + 803076a: e003 b.n 8030774 /* LSE, oscillator is used as source of LPUART1 clock */ /* LPUART1 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 80306e8: 2301 movs r3, #1 - 80306ea: 75fb strb r3, [r7, #23] + 803076c: 2301 movs r3, #1 + 803076e: 75fb strb r3, [r7, #23] break; - 80306ec: e000 b.n 80306f0 + 8030770: e000 b.n 8030774 break; - 80306ee: bf00 nop + 8030772: bf00 nop } if(ret == HAL_OK) - 80306f0: 7dfb ldrb r3, [r7, #23] - 80306f2: 2b00 cmp r3, #0 - 80306f4: d10a bne.n 803070c + 8030774: 7dfb ldrb r3, [r7, #23] + 8030776: 2b00 cmp r3, #0 + 8030778: d10a bne.n 8030790 { /* Set the source of LPUART1 clock */ __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection); - 80306f6: 4b57 ldr r3, [pc, #348] ; (8030854 ) - 80306f8: 6d9b ldr r3, [r3, #88] ; 0x58 - 80306fa: f023 0207 bic.w r2, r3, #7 - 80306fe: 687b ldr r3, [r7, #4] - 8030700: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8030704: 4953 ldr r1, [pc, #332] ; (8030854 ) - 8030706: 4313 orrs r3, r2 - 8030708: 658b str r3, [r1, #88] ; 0x58 - 803070a: e001 b.n 8030710 + 803077a: 4b57 ldr r3, [pc, #348] ; (80308d8 ) + 803077c: 6d9b ldr r3, [r3, #88] ; 0x58 + 803077e: f023 0207 bic.w r2, r3, #7 + 8030782: 687b ldr r3, [r7, #4] + 8030784: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8030788: 4953 ldr r1, [pc, #332] ; (80308d8 ) + 803078a: 4313 orrs r3, r2 + 803078c: 658b str r3, [r1, #88] ; 0x58 + 803078e: e001 b.n 8030794 } else { /* set overall return value */ status = ret; - 803070c: 7dfb ldrb r3, [r7, #23] - 803070e: 75bb strb r3, [r7, #22] + 8030790: 7dfb ldrb r3, [r7, #23] + 8030792: 75bb strb r3, [r7, #22] } } /*---------------------------- LPTIM1 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) - 8030710: 687b ldr r3, [r7, #4] - 8030712: 681b ldr r3, [r3, #0] - 8030714: f003 0320 and.w r3, r3, #32 - 8030718: 2b00 cmp r3, #0 - 803071a: d04b beq.n 80307b4 + 8030794: 687b ldr r3, [r7, #4] + 8030796: 681b ldr r3, [r3, #0] + 8030798: f003 0320 and.w r3, r3, #32 + 803079c: 2b00 cmp r3, #0 + 803079e: d04b beq.n 8030838 { switch(PeriphClkInit->Lptim1ClockSelection) - 803071c: 687b ldr r3, [r7, #4] - 803071e: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8030722: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8030726: d02e beq.n 8030786 - 8030728: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 803072c: d828 bhi.n 8030780 - 803072e: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8030732: d02a beq.n 803078a - 8030734: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8030738: d822 bhi.n 8030780 - 803073a: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 803073e: d026 beq.n 803078e - 8030740: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 8030744: d81c bhi.n 8030780 - 8030746: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 803074a: d010 beq.n 803076e - 803074c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030750: d816 bhi.n 8030780 - 8030752: 2b00 cmp r3, #0 - 8030754: d01d beq.n 8030792 - 8030756: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 803075a: d111 bne.n 8030780 + 80307a0: 687b ldr r3, [r7, #4] + 80307a2: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 80307a6: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 80307aa: d02e beq.n 803080a + 80307ac: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 80307b0: d828 bhi.n 8030804 + 80307b2: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 80307b6: d02a beq.n 803080e + 80307b8: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 80307bc: d822 bhi.n 8030804 + 80307be: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 80307c2: d026 beq.n 8030812 + 80307c4: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 80307c8: d81c bhi.n 8030804 + 80307ca: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80307ce: d010 beq.n 80307f2 + 80307d0: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80307d4: d816 bhi.n 8030804 + 80307d6: 2b00 cmp r3, #0 + 80307d8: d01d beq.n 8030816 + 80307da: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 80307de: d111 bne.n 8030804 /* LPTIM1 clock source configuration done later after clock selection check */ break; case RCC_LPTIM1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM1*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 803075c: 687b ldr r3, [r7, #4] - 803075e: 3304 adds r3, #4 - 8030760: 2100 movs r1, #0 - 8030762: 4618 mov r0, r3 - 8030764: f001 fb4c bl 8031e00 - 8030768: 4603 mov r3, r0 - 803076a: 75fb strb r3, [r7, #23] + 80307e0: 687b ldr r3, [r7, #4] + 80307e2: 3304 adds r3, #4 + 80307e4: 2100 movs r1, #0 + 80307e6: 4618 mov r0, r3 + 80307e8: f001 fb4c bl 8031e84 + 80307ec: 4603 mov r3, r0 + 80307ee: 75fb strb r3, [r7, #23] /* LPTIM1 clock source configuration done later after clock selection check */ break; - 803076c: e012 b.n 8030794 + 80307f0: e012 b.n 8030818 case RCC_LPTIM1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM1*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 803076e: 687b ldr r3, [r7, #4] - 8030770: 3324 adds r3, #36 ; 0x24 - 8030772: 2102 movs r1, #2 - 8030774: 4618 mov r0, r3 - 8030776: f001 fbf5 bl 8031f64 - 803077a: 4603 mov r3, r0 - 803077c: 75fb strb r3, [r7, #23] + 80307f2: 687b ldr r3, [r7, #4] + 80307f4: 3324 adds r3, #36 ; 0x24 + 80307f6: 2102 movs r1, #2 + 80307f8: 4618 mov r0, r3 + 80307fa: f001 fbf5 bl 8031fe8 + 80307fe: 4603 mov r3, r0 + 8030800: 75fb strb r3, [r7, #23] /* LPTIM1 clock source configuration done later after clock selection check */ break; - 803077e: e009 b.n 8030794 + 8030802: e009 b.n 8030818 /* HSI, HSE, or CSI oscillator is used as source of LPTIM1 clock */ /* LPTIM1 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030780: 2301 movs r3, #1 - 8030782: 75fb strb r3, [r7, #23] + 8030804: 2301 movs r3, #1 + 8030806: 75fb strb r3, [r7, #23] break; - 8030784: e006 b.n 8030794 + 8030808: e006 b.n 8030818 break; - 8030786: bf00 nop - 8030788: e004 b.n 8030794 + 803080a: bf00 nop + 803080c: e004 b.n 8030818 break; - 803078a: bf00 nop - 803078c: e002 b.n 8030794 + 803080e: bf00 nop + 8030810: e002 b.n 8030818 break; - 803078e: bf00 nop - 8030790: e000 b.n 8030794 + 8030812: bf00 nop + 8030814: e000 b.n 8030818 break; - 8030792: bf00 nop + 8030816: bf00 nop } if(ret == HAL_OK) - 8030794: 7dfb ldrb r3, [r7, #23] - 8030796: 2b00 cmp r3, #0 - 8030798: d10a bne.n 80307b0 + 8030818: 7dfb ldrb r3, [r7, #23] + 803081a: 2b00 cmp r3, #0 + 803081c: d10a bne.n 8030834 { /* Set the source of LPTIM1 clock*/ __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection); - 803079a: 4b2e ldr r3, [pc, #184] ; (8030854 ) - 803079c: 6d5b ldr r3, [r3, #84] ; 0x54 - 803079e: f023 42e0 bic.w r2, r3, #1879048192 ; 0x70000000 - 80307a2: 687b ldr r3, [r7, #4] - 80307a4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 80307a8: 492a ldr r1, [pc, #168] ; (8030854 ) - 80307aa: 4313 orrs r3, r2 - 80307ac: 654b str r3, [r1, #84] ; 0x54 - 80307ae: e001 b.n 80307b4 + 803081e: 4b2e ldr r3, [pc, #184] ; (80308d8 ) + 8030820: 6d5b ldr r3, [r3, #84] ; 0x54 + 8030822: f023 42e0 bic.w r2, r3, #1879048192 ; 0x70000000 + 8030826: 687b ldr r3, [r7, #4] + 8030828: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 803082c: 492a ldr r1, [pc, #168] ; (80308d8 ) + 803082e: 4313 orrs r3, r2 + 8030830: 654b str r3, [r1, #84] ; 0x54 + 8030832: e001 b.n 8030838 } else { /* set overall return value */ status = ret; - 80307b0: 7dfb ldrb r3, [r7, #23] - 80307b2: 75bb strb r3, [r7, #22] + 8030834: 7dfb ldrb r3, [r7, #23] + 8030836: 75bb strb r3, [r7, #22] } } /*---------------------------- LPTIM2 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2) - 80307b4: 687b ldr r3, [r7, #4] - 80307b6: 681b ldr r3, [r3, #0] - 80307b8: f003 0340 and.w r3, r3, #64 ; 0x40 - 80307bc: 2b00 cmp r3, #0 - 80307be: d04d beq.n 803085c + 8030838: 687b ldr r3, [r7, #4] + 803083a: 681b ldr r3, [r3, #0] + 803083c: f003 0340 and.w r3, r3, #64 ; 0x40 + 8030840: 2b00 cmp r3, #0 + 8030842: d04d beq.n 80308e0 { switch(PeriphClkInit->Lptim2ClockSelection) - 80307c0: 687b ldr r3, [r7, #4] - 80307c2: f8d3 3098 ldr.w r3, [r3, #152] ; 0x98 - 80307c6: f5b3 5fa0 cmp.w r3, #5120 ; 0x1400 - 80307ca: d02e beq.n 803082a - 80307cc: f5b3 5fa0 cmp.w r3, #5120 ; 0x1400 - 80307d0: d828 bhi.n 8030824 - 80307d2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80307d6: d02a beq.n 803082e - 80307d8: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80307dc: d822 bhi.n 8030824 - 80307de: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 - 80307e2: d026 beq.n 8030832 - 80307e4: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 - 80307e8: d81c bhi.n 8030824 - 80307ea: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 80307ee: d010 beq.n 8030812 - 80307f0: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 80307f4: d816 bhi.n 8030824 - 80307f6: 2b00 cmp r3, #0 - 80307f8: d01d beq.n 8030836 - 80307fa: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 80307fe: d111 bne.n 8030824 + 8030844: 687b ldr r3, [r7, #4] + 8030846: f8d3 3098 ldr.w r3, [r3, #152] ; 0x98 + 803084a: f5b3 5fa0 cmp.w r3, #5120 ; 0x1400 + 803084e: d02e beq.n 80308ae + 8030850: f5b3 5fa0 cmp.w r3, #5120 ; 0x1400 + 8030854: d828 bhi.n 80308a8 + 8030856: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 803085a: d02a beq.n 80308b2 + 803085c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8030860: d822 bhi.n 80308a8 + 8030862: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 + 8030866: d026 beq.n 80308b6 + 8030868: f5b3 6f40 cmp.w r3, #3072 ; 0xc00 + 803086c: d81c bhi.n 80308a8 + 803086e: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 8030872: d010 beq.n 8030896 + 8030874: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 8030878: d816 bhi.n 80308a8 + 803087a: 2b00 cmp r3, #0 + 803087c: d01d beq.n 80308ba + 803087e: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 8030882: d111 bne.n 80308a8 /* LPTIM2 clock source configuration done later after clock selection check */ break; case RCC_LPTIM2CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM2*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 8030800: 687b ldr r3, [r7, #4] - 8030802: 3304 adds r3, #4 - 8030804: 2100 movs r1, #0 - 8030806: 4618 mov r0, r3 - 8030808: f001 fafa bl 8031e00 - 803080c: 4603 mov r3, r0 - 803080e: 75fb strb r3, [r7, #23] + 8030884: 687b ldr r3, [r7, #4] + 8030886: 3304 adds r3, #4 + 8030888: 2100 movs r1, #0 + 803088a: 4618 mov r0, r3 + 803088c: f001 fafa bl 8031e84 + 8030890: 4603 mov r3, r0 + 8030892: 75fb strb r3, [r7, #23] /* LPTIM2 clock source configuration done later after clock selection check */ break; - 8030810: e012 b.n 8030838 + 8030894: e012 b.n 80308bc case RCC_LPTIM2CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM2*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 8030812: 687b ldr r3, [r7, #4] - 8030814: 3324 adds r3, #36 ; 0x24 - 8030816: 2102 movs r1, #2 - 8030818: 4618 mov r0, r3 - 803081a: f001 fba3 bl 8031f64 - 803081e: 4603 mov r3, r0 - 8030820: 75fb strb r3, [r7, #23] + 8030896: 687b ldr r3, [r7, #4] + 8030898: 3324 adds r3, #36 ; 0x24 + 803089a: 2102 movs r1, #2 + 803089c: 4618 mov r0, r3 + 803089e: f001 fba3 bl 8031fe8 + 80308a2: 4603 mov r3, r0 + 80308a4: 75fb strb r3, [r7, #23] /* LPTIM2 clock source configuration done later after clock selection check */ break; - 8030822: e009 b.n 8030838 + 80308a6: e009 b.n 80308bc /* HSI, HSE, or CSI oscillator is used as source of LPTIM2 clock */ /* LPTIM2 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030824: 2301 movs r3, #1 - 8030826: 75fb strb r3, [r7, #23] + 80308a8: 2301 movs r3, #1 + 80308aa: 75fb strb r3, [r7, #23] break; - 8030828: e006 b.n 8030838 + 80308ac: e006 b.n 80308bc break; - 803082a: bf00 nop - 803082c: e004 b.n 8030838 + 80308ae: bf00 nop + 80308b0: e004 b.n 80308bc break; - 803082e: bf00 nop - 8030830: e002 b.n 8030838 + 80308b2: bf00 nop + 80308b4: e002 b.n 80308bc break; - 8030832: bf00 nop - 8030834: e000 b.n 8030838 + 80308b6: bf00 nop + 80308b8: e000 b.n 80308bc break; - 8030836: bf00 nop + 80308ba: bf00 nop } if(ret == HAL_OK) - 8030838: 7dfb ldrb r3, [r7, #23] - 803083a: 2b00 cmp r3, #0 - 803083c: d10c bne.n 8030858 + 80308bc: 7dfb ldrb r3, [r7, #23] + 80308be: 2b00 cmp r3, #0 + 80308c0: d10c bne.n 80308dc { /* Set the source of LPTIM2 clock*/ __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection); - 803083e: 4b05 ldr r3, [pc, #20] ; (8030854 ) - 8030840: 6d9b ldr r3, [r3, #88] ; 0x58 - 8030842: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 - 8030846: 687b ldr r3, [r7, #4] - 8030848: f8d3 3098 ldr.w r3, [r3, #152] ; 0x98 - 803084c: 4901 ldr r1, [pc, #4] ; (8030854 ) - 803084e: 4313 orrs r3, r2 - 8030850: 658b str r3, [r1, #88] ; 0x58 - 8030852: e003 b.n 803085c - 8030854: 58024400 .word 0x58024400 + 80308c2: 4b05 ldr r3, [pc, #20] ; (80308d8 ) + 80308c4: 6d9b ldr r3, [r3, #88] ; 0x58 + 80308c6: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00 + 80308ca: 687b ldr r3, [r7, #4] + 80308cc: f8d3 3098 ldr.w r3, [r3, #152] ; 0x98 + 80308d0: 4901 ldr r1, [pc, #4] ; (80308d8 ) + 80308d2: 4313 orrs r3, r2 + 80308d4: 658b str r3, [r1, #88] ; 0x58 + 80308d6: e003 b.n 80308e0 + 80308d8: 58024400 .word 0x58024400 } else { /* set overall return value */ status = ret; - 8030858: 7dfb ldrb r3, [r7, #23] - 803085a: 75bb strb r3, [r7, #22] + 80308dc: 7dfb ldrb r3, [r7, #23] + 80308de: 75bb strb r3, [r7, #22] } } /*---------------------------- LPTIM345 configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM345) == RCC_PERIPHCLK_LPTIM345) - 803085c: 687b ldr r3, [r7, #4] - 803085e: 681b ldr r3, [r3, #0] - 8030860: f003 0380 and.w r3, r3, #128 ; 0x80 - 8030864: 2b00 cmp r3, #0 - 8030866: d04b beq.n 8030900 + 80308e0: 687b ldr r3, [r7, #4] + 80308e2: 681b ldr r3, [r3, #0] + 80308e4: f003 0380 and.w r3, r3, #128 ; 0x80 + 80308e8: 2b00 cmp r3, #0 + 80308ea: d04b beq.n 8030984 { switch(PeriphClkInit->Lptim345ClockSelection) - 8030868: 687b ldr r3, [r7, #4] - 803086a: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 803086e: f5b3 4f20 cmp.w r3, #40960 ; 0xa000 - 8030872: d02e beq.n 80308d2 - 8030874: f5b3 4f20 cmp.w r3, #40960 ; 0xa000 - 8030878: d828 bhi.n 80308cc - 803087a: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 803087e: d02a beq.n 80308d6 - 8030880: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8030884: d822 bhi.n 80308cc - 8030886: f5b3 4fc0 cmp.w r3, #24576 ; 0x6000 - 803088a: d026 beq.n 80308da - 803088c: f5b3 4fc0 cmp.w r3, #24576 ; 0x6000 - 8030890: d81c bhi.n 80308cc - 8030892: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8030896: d010 beq.n 80308ba - 8030898: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 803089c: d816 bhi.n 80308cc - 803089e: 2b00 cmp r3, #0 - 80308a0: d01d beq.n 80308de - 80308a2: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 80308a6: d111 bne.n 80308cc + 80308ec: 687b ldr r3, [r7, #4] + 80308ee: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 80308f2: f5b3 4f20 cmp.w r3, #40960 ; 0xa000 + 80308f6: d02e beq.n 8030956 + 80308f8: f5b3 4f20 cmp.w r3, #40960 ; 0xa000 + 80308fc: d828 bhi.n 8030950 + 80308fe: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 8030902: d02a beq.n 803095a + 8030904: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 8030908: d822 bhi.n 8030950 + 803090a: f5b3 4fc0 cmp.w r3, #24576 ; 0x6000 + 803090e: d026 beq.n 803095e + 8030910: f5b3 4fc0 cmp.w r3, #24576 ; 0x6000 + 8030914: d81c bhi.n 8030950 + 8030916: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 803091a: d010 beq.n 803093e + 803091c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8030920: d816 bhi.n 8030950 + 8030922: 2b00 cmp r3, #0 + 8030924: d01d beq.n 8030962 + 8030926: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 803092a: d111 bne.n 8030950 case RCC_LPTIM345CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPTIM3/4/5 */ /* LPTIM3/4/5 clock source configuration done later after clock selection check */ break; case RCC_LPTIM345CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM3/4/5 */ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 80308a8: 687b ldr r3, [r7, #4] - 80308aa: 3304 adds r3, #4 - 80308ac: 2100 movs r1, #0 - 80308ae: 4618 mov r0, r3 - 80308b0: f001 faa6 bl 8031e00 - 80308b4: 4603 mov r3, r0 - 80308b6: 75fb strb r3, [r7, #23] + 803092c: 687b ldr r3, [r7, #4] + 803092e: 3304 adds r3, #4 + 8030930: 2100 movs r1, #0 + 8030932: 4618 mov r0, r3 + 8030934: f001 faa6 bl 8031e84 + 8030938: 4603 mov r3, r0 + 803093a: 75fb strb r3, [r7, #23] /* LPTIM3/4/5 clock source configuration done later after clock selection check */ break; - 80308b8: e012 b.n 80308e0 + 803093c: e012 b.n 8030964 case RCC_LPTIM345CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM3/4/5 */ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 80308ba: 687b ldr r3, [r7, #4] - 80308bc: 3324 adds r3, #36 ; 0x24 - 80308be: 2102 movs r1, #2 - 80308c0: 4618 mov r0, r3 - 80308c2: f001 fb4f bl 8031f64 - 80308c6: 4603 mov r3, r0 - 80308c8: 75fb strb r3, [r7, #23] + 803093e: 687b ldr r3, [r7, #4] + 8030940: 3324 adds r3, #36 ; 0x24 + 8030942: 2102 movs r1, #2 + 8030944: 4618 mov r0, r3 + 8030946: f001 fb4f bl 8031fe8 + 803094a: 4603 mov r3, r0 + 803094c: 75fb strb r3, [r7, #23] /* LPTIM3/4/5 clock source configuration done later after clock selection check */ break; - 80308ca: e009 b.n 80308e0 + 803094e: e009 b.n 8030964 /* HSI, HSE, or CSI oscillator is used as source of LPTIM3/4/5 clock */ /* LPTIM3/4/5 clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 80308cc: 2301 movs r3, #1 - 80308ce: 75fb strb r3, [r7, #23] + 8030950: 2301 movs r3, #1 + 8030952: 75fb strb r3, [r7, #23] break; - 80308d0: e006 b.n 80308e0 + 8030954: e006 b.n 8030964 break; - 80308d2: bf00 nop - 80308d4: e004 b.n 80308e0 + 8030956: bf00 nop + 8030958: e004 b.n 8030964 break; - 80308d6: bf00 nop - 80308d8: e002 b.n 80308e0 + 803095a: bf00 nop + 803095c: e002 b.n 8030964 break; - 80308da: bf00 nop - 80308dc: e000 b.n 80308e0 + 803095e: bf00 nop + 8030960: e000 b.n 8030964 break; - 80308de: bf00 nop + 8030962: bf00 nop } if(ret == HAL_OK) - 80308e0: 7dfb ldrb r3, [r7, #23] - 80308e2: 2b00 cmp r3, #0 - 80308e4: d10a bne.n 80308fc + 8030964: 7dfb ldrb r3, [r7, #23] + 8030966: 2b00 cmp r3, #0 + 8030968: d10a bne.n 8030980 { /* Set the source of LPTIM3/4/5 clock */ __HAL_RCC_LPTIM345_CONFIG(PeriphClkInit->Lptim345ClockSelection); - 80308e6: 4b9d ldr r3, [pc, #628] ; (8030b5c ) - 80308e8: 6d9b ldr r3, [r3, #88] ; 0x58 - 80308ea: f423 4260 bic.w r2, r3, #57344 ; 0xe000 - 80308ee: 687b ldr r3, [r7, #4] - 80308f0: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c - 80308f4: 4999 ldr r1, [pc, #612] ; (8030b5c ) - 80308f6: 4313 orrs r3, r2 - 80308f8: 658b str r3, [r1, #88] ; 0x58 - 80308fa: e001 b.n 8030900 + 803096a: 4b9d ldr r3, [pc, #628] ; (8030be0 ) + 803096c: 6d9b ldr r3, [r3, #88] ; 0x58 + 803096e: f423 4260 bic.w r2, r3, #57344 ; 0xe000 + 8030972: 687b ldr r3, [r7, #4] + 8030974: f8d3 309c ldr.w r3, [r3, #156] ; 0x9c + 8030978: 4999 ldr r1, [pc, #612] ; (8030be0 ) + 803097a: 4313 orrs r3, r2 + 803097c: 658b str r3, [r1, #88] ; 0x58 + 803097e: e001 b.n 8030984 } else { /* set overall return value */ status = ret; - 80308fc: 7dfb ldrb r3, [r7, #23] - 80308fe: 75bb strb r3, [r7, #22] + 8030980: 7dfb ldrb r3, [r7, #23] + 8030982: 75bb strb r3, [r7, #22] __HAL_RCC_I2C1235_CONFIG(PeriphClkInit->I2c1235ClockSelection); } #else if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C123) == RCC_PERIPHCLK_I2C123) - 8030900: 687b ldr r3, [r7, #4] - 8030902: 681b ldr r3, [r3, #0] - 8030904: f003 0308 and.w r3, r3, #8 - 8030908: 2b00 cmp r3, #0 - 803090a: d01a beq.n 8030942 + 8030984: 687b ldr r3, [r7, #4] + 8030986: 681b ldr r3, [r3, #0] + 8030988: f003 0308 and.w r3, r3, #8 + 803098c: 2b00 cmp r3, #0 + 803098e: d01a beq.n 80309c6 { /* Check the parameters */ assert_param(IS_RCC_I2C123CLKSOURCE(PeriphClkInit->I2c123ClockSelection)); if ((PeriphClkInit->I2c123ClockSelection )== RCC_I2C123CLKSOURCE_PLL3 ) - 803090c: 687b ldr r3, [r7, #4] - 803090e: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 8030912: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8030916: d10a bne.n 803092e + 8030990: 687b ldr r3, [r7, #4] + 8030992: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 8030996: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 803099a: d10a bne.n 80309b2 { if(RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE)!= HAL_OK) - 8030918: 687b ldr r3, [r7, #4] - 803091a: 3324 adds r3, #36 ; 0x24 - 803091c: 2102 movs r1, #2 - 803091e: 4618 mov r0, r3 - 8030920: f001 fb20 bl 8031f64 - 8030924: 4603 mov r3, r0 - 8030926: 2b00 cmp r3, #0 - 8030928: d001 beq.n 803092e + 803099c: 687b ldr r3, [r7, #4] + 803099e: 3324 adds r3, #36 ; 0x24 + 80309a0: 2102 movs r1, #2 + 80309a2: 4618 mov r0, r3 + 80309a4: f001 fb20 bl 8031fe8 + 80309a8: 4603 mov r3, r0 + 80309aa: 2b00 cmp r3, #0 + 80309ac: d001 beq.n 80309b2 { status = HAL_ERROR; - 803092a: 2301 movs r3, #1 - 803092c: 75bb strb r3, [r7, #22] + 80309ae: 2301 movs r3, #1 + 80309b0: 75bb strb r3, [r7, #22] } } __HAL_RCC_I2C123_CONFIG(PeriphClkInit->I2c123ClockSelection); - 803092e: 4b8b ldr r3, [pc, #556] ; (8030b5c ) - 8030930: 6d5b ldr r3, [r3, #84] ; 0x54 - 8030932: f423 5240 bic.w r2, r3, #12288 ; 0x3000 - 8030936: 687b ldr r3, [r7, #4] - 8030938: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 803093c: 4987 ldr r1, [pc, #540] ; (8030b5c ) - 803093e: 4313 orrs r3, r2 - 8030940: 654b str r3, [r1, #84] ; 0x54 + 80309b2: 4b8b ldr r3, [pc, #556] ; (8030be0 ) + 80309b4: 6d5b ldr r3, [r3, #84] ; 0x54 + 80309b6: f423 5240 bic.w r2, r3, #12288 ; 0x3000 + 80309ba: 687b ldr r3, [r7, #4] + 80309bc: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 80309c0: 4987 ldr r1, [pc, #540] ; (8030be0 ) + 80309c2: 4313 orrs r3, r2 + 80309c4: 654b str r3, [r1, #84] ; 0x54 } #endif /* I2C5 */ /*------------------------------ I2C4 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4) - 8030942: 687b ldr r3, [r7, #4] - 8030944: 681b ldr r3, [r3, #0] - 8030946: f003 0310 and.w r3, r3, #16 - 803094a: 2b00 cmp r3, #0 - 803094c: d01a beq.n 8030984 + 80309c6: 687b ldr r3, [r7, #4] + 80309c8: 681b ldr r3, [r3, #0] + 80309ca: f003 0310 and.w r3, r3, #16 + 80309ce: 2b00 cmp r3, #0 + 80309d0: d01a beq.n 8030a08 { /* Check the parameters */ assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection)); if ((PeriphClkInit->I2c4ClockSelection) == RCC_I2C4CLKSOURCE_PLL3 ) - 803094e: 687b ldr r3, [r7, #4] - 8030950: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 - 8030954: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030958: d10a bne.n 8030970 + 80309d2: 687b ldr r3, [r7, #4] + 80309d4: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 + 80309d8: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80309dc: d10a bne.n 80309f4 { if(RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE)!= HAL_OK) - 803095a: 687b ldr r3, [r7, #4] - 803095c: 3324 adds r3, #36 ; 0x24 - 803095e: 2102 movs r1, #2 - 8030960: 4618 mov r0, r3 - 8030962: f001 faff bl 8031f64 - 8030966: 4603 mov r3, r0 - 8030968: 2b00 cmp r3, #0 - 803096a: d001 beq.n 8030970 + 80309de: 687b ldr r3, [r7, #4] + 80309e0: 3324 adds r3, #36 ; 0x24 + 80309e2: 2102 movs r1, #2 + 80309e4: 4618 mov r0, r3 + 80309e6: f001 faff bl 8031fe8 + 80309ea: 4603 mov r3, r0 + 80309ec: 2b00 cmp r3, #0 + 80309ee: d001 beq.n 80309f4 { status = HAL_ERROR; - 803096c: 2301 movs r3, #1 - 803096e: 75bb strb r3, [r7, #22] + 80309f0: 2301 movs r3, #1 + 80309f2: 75bb strb r3, [r7, #22] } } __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection); - 8030970: 4b7a ldr r3, [pc, #488] ; (8030b5c ) - 8030972: 6d9b ldr r3, [r3, #88] ; 0x58 - 8030974: f423 7240 bic.w r2, r3, #768 ; 0x300 - 8030978: 687b ldr r3, [r7, #4] - 803097a: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 - 803097e: 4977 ldr r1, [pc, #476] ; (8030b5c ) - 8030980: 4313 orrs r3, r2 - 8030982: 658b str r3, [r1, #88] ; 0x58 + 80309f4: 4b7a ldr r3, [pc, #488] ; (8030be0 ) + 80309f6: 6d9b ldr r3, [r3, #88] ; 0x58 + 80309f8: f423 7240 bic.w r2, r3, #768 ; 0x300 + 80309fc: 687b ldr r3, [r7, #4] + 80309fe: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 + 8030a02: 4977 ldr r1, [pc, #476] ; (8030be0 ) + 8030a04: 4313 orrs r3, r2 + 8030a06: 658b str r3, [r1, #88] ; 0x58 } /*---------------------------- ADC configuration -------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8030984: 687b ldr r3, [r7, #4] - 8030986: 681b ldr r3, [r3, #0] - 8030988: f403 2300 and.w r3, r3, #524288 ; 0x80000 - 803098c: 2b00 cmp r3, #0 - 803098e: d034 beq.n 80309fa + 8030a08: 687b ldr r3, [r7, #4] + 8030a0a: 681b ldr r3, [r3, #0] + 8030a0c: f403 2300 and.w r3, r3, #524288 ; 0x80000 + 8030a10: 2b00 cmp r3, #0 + 8030a12: d034 beq.n 8030a7e { switch(PeriphClkInit->AdcClockSelection) - 8030990: 687b ldr r3, [r7, #4] - 8030992: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 8030996: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 803099a: d01d beq.n 80309d8 - 803099c: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80309a0: d817 bhi.n 80309d2 - 80309a2: 2b00 cmp r3, #0 - 80309a4: d003 beq.n 80309ae - 80309a6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80309aa: d009 beq.n 80309c0 - 80309ac: e011 b.n 80309d2 + 8030a14: 687b ldr r3, [r7, #4] + 8030a16: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 8030a1a: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8030a1e: d01d beq.n 8030a5c + 8030a20: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8030a24: d817 bhi.n 8030a56 + 8030a26: 2b00 cmp r3, #0 + 8030a28: d003 beq.n 8030a32 + 8030a2a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8030a2e: d009 beq.n 8030a44 + 8030a30: e011 b.n 8030a56 { case RCC_ADCCLKSOURCE_PLL2: /* PLL2 is used as clock source for ADC*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_P_UPDATE); - 80309ae: 687b ldr r3, [r7, #4] - 80309b0: 3304 adds r3, #4 - 80309b2: 2100 movs r1, #0 - 80309b4: 4618 mov r0, r3 - 80309b6: f001 fa23 bl 8031e00 - 80309ba: 4603 mov r3, r0 - 80309bc: 75fb strb r3, [r7, #23] + 8030a32: 687b ldr r3, [r7, #4] + 8030a34: 3304 adds r3, #4 + 8030a36: 2100 movs r1, #0 + 8030a38: 4618 mov r0, r3 + 8030a3a: f001 fa23 bl 8031e84 + 8030a3e: 4603 mov r3, r0 + 8030a40: 75fb strb r3, [r7, #23] /* ADC clock source configuration done later after clock selection check */ break; - 80309be: e00c b.n 80309da + 8030a42: e00c b.n 8030a5e case RCC_ADCCLKSOURCE_PLL3: /* PLL3 is used as clock source for ADC*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE); - 80309c0: 687b ldr r3, [r7, #4] - 80309c2: 3324 adds r3, #36 ; 0x24 - 80309c4: 2102 movs r1, #2 - 80309c6: 4618 mov r0, r3 - 80309c8: f001 facc bl 8031f64 - 80309cc: 4603 mov r3, r0 - 80309ce: 75fb strb r3, [r7, #23] + 8030a44: 687b ldr r3, [r7, #4] + 8030a46: 3324 adds r3, #36 ; 0x24 + 8030a48: 2102 movs r1, #2 + 8030a4a: 4618 mov r0, r3 + 8030a4c: f001 facc bl 8031fe8 + 8030a50: 4603 mov r3, r0 + 8030a52: 75fb strb r3, [r7, #23] /* ADC clock source configuration done later after clock selection check */ break; - 80309d0: e003 b.n 80309da + 8030a54: e003 b.n 8030a5e /* HSI, HSE, or CSI oscillator is used as source of ADC clock */ /* ADC clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 80309d2: 2301 movs r3, #1 - 80309d4: 75fb strb r3, [r7, #23] + 8030a56: 2301 movs r3, #1 + 8030a58: 75fb strb r3, [r7, #23] break; - 80309d6: e000 b.n 80309da + 8030a5a: e000 b.n 8030a5e break; - 80309d8: bf00 nop + 8030a5c: bf00 nop } if(ret == HAL_OK) - 80309da: 7dfb ldrb r3, [r7, #23] - 80309dc: 2b00 cmp r3, #0 - 80309de: d10a bne.n 80309f6 + 8030a5e: 7dfb ldrb r3, [r7, #23] + 8030a60: 2b00 cmp r3, #0 + 8030a62: d10a bne.n 8030a7a { /* Set the source of ADC clock*/ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 80309e0: 4b5e ldr r3, [pc, #376] ; (8030b5c ) - 80309e2: 6d9b ldr r3, [r3, #88] ; 0x58 - 80309e4: f423 3240 bic.w r2, r3, #196608 ; 0x30000 - 80309e8: 687b ldr r3, [r7, #4] - 80309ea: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 - 80309ee: 495b ldr r1, [pc, #364] ; (8030b5c ) - 80309f0: 4313 orrs r3, r2 - 80309f2: 658b str r3, [r1, #88] ; 0x58 - 80309f4: e001 b.n 80309fa + 8030a64: 4b5e ldr r3, [pc, #376] ; (8030be0 ) + 8030a66: 6d9b ldr r3, [r3, #88] ; 0x58 + 8030a68: f423 3240 bic.w r2, r3, #196608 ; 0x30000 + 8030a6c: 687b ldr r3, [r7, #4] + 8030a6e: f8d3 30a0 ldr.w r3, [r3, #160] ; 0xa0 + 8030a72: 495b ldr r1, [pc, #364] ; (8030be0 ) + 8030a74: 4313 orrs r3, r2 + 8030a76: 658b str r3, [r1, #88] ; 0x58 + 8030a78: e001 b.n 8030a7e } else { /* set overall return value */ status = ret; - 80309f6: 7dfb ldrb r3, [r7, #23] - 80309f8: 75bb strb r3, [r7, #22] + 8030a7a: 7dfb ldrb r3, [r7, #23] + 8030a7c: 75bb strb r3, [r7, #22] } } /*------------------------------ USB Configuration -------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) - 80309fa: 687b ldr r3, [r7, #4] - 80309fc: 681b ldr r3, [r3, #0] - 80309fe: f403 2380 and.w r3, r3, #262144 ; 0x40000 - 8030a02: 2b00 cmp r3, #0 - 8030a04: d033 beq.n 8030a6e + 8030a7e: 687b ldr r3, [r7, #4] + 8030a80: 681b ldr r3, [r3, #0] + 8030a82: f403 2380 and.w r3, r3, #262144 ; 0x40000 + 8030a86: 2b00 cmp r3, #0 + 8030a88: d033 beq.n 8030af2 { switch(PeriphClkInit->UsbClockSelection) - 8030a06: 687b ldr r3, [r7, #4] - 8030a08: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8030a0c: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 - 8030a10: d01c beq.n 8030a4c - 8030a12: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 - 8030a16: d816 bhi.n 8030a46 - 8030a18: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8030a1c: d003 beq.n 8030a26 - 8030a1e: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 8030a22: d007 beq.n 8030a34 - 8030a24: e00f b.n 8030a46 + 8030a8a: 687b ldr r3, [r7, #4] + 8030a8c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8030a90: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 + 8030a94: d01c beq.n 8030ad0 + 8030a96: f5b3 1f40 cmp.w r3, #3145728 ; 0x300000 + 8030a9a: d816 bhi.n 8030aca + 8030a9c: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8030aa0: d003 beq.n 8030aaa + 8030aa2: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 8030aa6: d007 beq.n 8030ab8 + 8030aa8: e00f b.n 8030aca { case RCC_USBCLKSOURCE_PLL: /* PLL is used as clock source for USB*/ /* Enable USB Clock output generated form System USB . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030a26: 4b4d ldr r3, [pc, #308] ; (8030b5c ) - 8030a28: 6adb ldr r3, [r3, #44] ; 0x2c - 8030a2a: 4a4c ldr r2, [pc, #304] ; (8030b5c ) - 8030a2c: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030a30: 62d3 str r3, [r2, #44] ; 0x2c + 8030aaa: 4b4d ldr r3, [pc, #308] ; (8030be0 ) + 8030aac: 6adb ldr r3, [r3, #44] ; 0x2c + 8030aae: 4a4c ldr r2, [pc, #304] ; (8030be0 ) + 8030ab0: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030ab4: 62d3 str r3, [r2, #44] ; 0x2c /* USB clock source configuration done later after clock selection check */ break; - 8030a32: e00c b.n 8030a4e + 8030ab6: e00c b.n 8030ad2 case RCC_USBCLKSOURCE_PLL3: /* PLL3 is used as clock source for USB*/ ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_Q_UPDATE); - 8030a34: 687b ldr r3, [r7, #4] - 8030a36: 3324 adds r3, #36 ; 0x24 - 8030a38: 2101 movs r1, #1 - 8030a3a: 4618 mov r0, r3 - 8030a3c: f001 fa92 bl 8031f64 - 8030a40: 4603 mov r3, r0 - 8030a42: 75fb strb r3, [r7, #23] + 8030ab8: 687b ldr r3, [r7, #4] + 8030aba: 3324 adds r3, #36 ; 0x24 + 8030abc: 2101 movs r1, #1 + 8030abe: 4618 mov r0, r3 + 8030ac0: f001 fa92 bl 8031fe8 + 8030ac4: 4603 mov r3, r0 + 8030ac6: 75fb strb r3, [r7, #23] /* USB clock source configuration done later after clock selection check */ break; - 8030a44: e003 b.n 8030a4e + 8030ac8: e003 b.n 8030ad2 /* HSI48 oscillator is used as source of USB clock */ /* USB clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030a46: 2301 movs r3, #1 - 8030a48: 75fb strb r3, [r7, #23] + 8030aca: 2301 movs r3, #1 + 8030acc: 75fb strb r3, [r7, #23] break; - 8030a4a: e000 b.n 8030a4e + 8030ace: e000 b.n 8030ad2 break; - 8030a4c: bf00 nop + 8030ad0: bf00 nop } if(ret == HAL_OK) - 8030a4e: 7dfb ldrb r3, [r7, #23] - 8030a50: 2b00 cmp r3, #0 - 8030a52: d10a bne.n 8030a6a + 8030ad2: 7dfb ldrb r3, [r7, #23] + 8030ad4: 2b00 cmp r3, #0 + 8030ad6: d10a bne.n 8030aee { /* Set the source of USB clock*/ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - 8030a54: 4b41 ldr r3, [pc, #260] ; (8030b5c ) - 8030a56: 6d5b ldr r3, [r3, #84] ; 0x54 - 8030a58: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 - 8030a5c: 687b ldr r3, [r7, #4] - 8030a5e: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8030a62: 493e ldr r1, [pc, #248] ; (8030b5c ) - 8030a64: 4313 orrs r3, r2 - 8030a66: 654b str r3, [r1, #84] ; 0x54 - 8030a68: e001 b.n 8030a6e + 8030ad8: 4b41 ldr r3, [pc, #260] ; (8030be0 ) + 8030ada: 6d5b ldr r3, [r3, #84] ; 0x54 + 8030adc: f423 1240 bic.w r2, r3, #3145728 ; 0x300000 + 8030ae0: 687b ldr r3, [r7, #4] + 8030ae2: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8030ae6: 493e ldr r1, [pc, #248] ; (8030be0 ) + 8030ae8: 4313 orrs r3, r2 + 8030aea: 654b str r3, [r1, #84] ; 0x54 + 8030aec: e001 b.n 8030af2 } else { /* set overall return value */ status = ret; - 8030a6a: 7dfb ldrb r3, [r7, #23] - 8030a6c: 75bb strb r3, [r7, #22] + 8030aee: 7dfb ldrb r3, [r7, #23] + 8030af0: 75bb strb r3, [r7, #22] } } /*------------------------------------- SDMMC Configuration ------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC) == RCC_PERIPHCLK_SDMMC) - 8030a6e: 687b ldr r3, [r7, #4] - 8030a70: 681b ldr r3, [r3, #0] - 8030a72: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8030a76: 2b00 cmp r3, #0 - 8030a78: d029 beq.n 8030ace + 8030af2: 687b ldr r3, [r7, #4] + 8030af4: 681b ldr r3, [r3, #0] + 8030af6: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8030afa: 2b00 cmp r3, #0 + 8030afc: d029 beq.n 8030b52 { /* Check the parameters */ assert_param(IS_RCC_SDMMC(PeriphClkInit->SdmmcClockSelection)); switch(PeriphClkInit->SdmmcClockSelection) - 8030a7a: 687b ldr r3, [r7, #4] - 8030a7c: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030a7e: 2b00 cmp r3, #0 - 8030a80: d003 beq.n 8030a8a - 8030a82: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8030a86: d007 beq.n 8030a98 - 8030a88: e00f b.n 8030aaa + 8030afe: 687b ldr r3, [r7, #4] + 8030b00: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030b02: 2b00 cmp r3, #0 + 8030b04: d003 beq.n 8030b0e + 8030b06: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8030b0a: d007 beq.n 8030b1c + 8030b0c: e00f b.n 8030b2e { case RCC_SDMMCCLKSOURCE_PLL: /* PLL is used as clock source for SDMMC*/ /* Enable SDMMC Clock output generated form System PLL . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030a8a: 4b34 ldr r3, [pc, #208] ; (8030b5c ) - 8030a8c: 6adb ldr r3, [r3, #44] ; 0x2c - 8030a8e: 4a33 ldr r2, [pc, #204] ; (8030b5c ) - 8030a90: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030a94: 62d3 str r3, [r2, #44] ; 0x2c + 8030b0e: 4b34 ldr r3, [pc, #208] ; (8030be0 ) + 8030b10: 6adb ldr r3, [r3, #44] ; 0x2c + 8030b12: 4a33 ldr r2, [pc, #204] ; (8030be0 ) + 8030b14: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030b18: 62d3 str r3, [r2, #44] ; 0x2c /* SDMMC clock source configuration done later after clock selection check */ break; - 8030a96: e00b b.n 8030ab0 + 8030b1a: e00b b.n 8030b34 case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for SDMMC*/ ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2),DIVIDER_R_UPDATE); - 8030a98: 687b ldr r3, [r7, #4] - 8030a9a: 3304 adds r3, #4 - 8030a9c: 2102 movs r1, #2 - 8030a9e: 4618 mov r0, r3 - 8030aa0: f001 f9ae bl 8031e00 - 8030aa4: 4603 mov r3, r0 - 8030aa6: 75fb strb r3, [r7, #23] + 8030b1c: 687b ldr r3, [r7, #4] + 8030b1e: 3304 adds r3, #4 + 8030b20: 2102 movs r1, #2 + 8030b22: 4618 mov r0, r3 + 8030b24: f001 f9ae bl 8031e84 + 8030b28: 4603 mov r3, r0 + 8030b2a: 75fb strb r3, [r7, #23] /* SDMMC clock source configuration done later after clock selection check */ break; - 8030aa8: e002 b.n 8030ab0 + 8030b2c: e002 b.n 8030b34 default: ret = HAL_ERROR; - 8030aaa: 2301 movs r3, #1 - 8030aac: 75fb strb r3, [r7, #23] + 8030b2e: 2301 movs r3, #1 + 8030b30: 75fb strb r3, [r7, #23] break; - 8030aae: bf00 nop + 8030b32: bf00 nop } if(ret == HAL_OK) - 8030ab0: 7dfb ldrb r3, [r7, #23] - 8030ab2: 2b00 cmp r3, #0 - 8030ab4: d109 bne.n 8030aca + 8030b34: 7dfb ldrb r3, [r7, #23] + 8030b36: 2b00 cmp r3, #0 + 8030b38: d109 bne.n 8030b4e { /* Set the source of SDMMC clock*/ __HAL_RCC_SDMMC_CONFIG(PeriphClkInit->SdmmcClockSelection); - 8030ab6: 4b29 ldr r3, [pc, #164] ; (8030b5c ) - 8030ab8: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030aba: f423 3280 bic.w r2, r3, #65536 ; 0x10000 - 8030abe: 687b ldr r3, [r7, #4] - 8030ac0: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030ac2: 4926 ldr r1, [pc, #152] ; (8030b5c ) - 8030ac4: 4313 orrs r3, r2 - 8030ac6: 64cb str r3, [r1, #76] ; 0x4c - 8030ac8: e001 b.n 8030ace + 8030b3a: 4b29 ldr r3, [pc, #164] ; (8030be0 ) + 8030b3c: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030b3e: f423 3280 bic.w r2, r3, #65536 ; 0x10000 + 8030b42: 687b ldr r3, [r7, #4] + 8030b44: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030b46: 4926 ldr r1, [pc, #152] ; (8030be0 ) + 8030b48: 4313 orrs r3, r2 + 8030b4a: 64cb str r3, [r1, #76] ; 0x4c + 8030b4c: e001 b.n 8030b52 } else { /* set overall return value */ status = ret; - 8030aca: 7dfb ldrb r3, [r7, #23] - 8030acc: 75bb strb r3, [r7, #22] + 8030b4e: 7dfb ldrb r3, [r7, #23] + 8030b50: 75bb strb r3, [r7, #22] } } #if defined(LTDC) /*-------------------------------------- LTDC Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC) - 8030ace: 687b ldr r3, [r7, #4] - 8030ad0: 681b ldr r3, [r3, #0] - 8030ad2: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8030ad6: 2b00 cmp r3, #0 - 8030ad8: d00a beq.n 8030af0 + 8030b52: 687b ldr r3, [r7, #4] + 8030b54: 681b ldr r3, [r3, #0] + 8030b56: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8030b5a: 2b00 cmp r3, #0 + 8030b5c: d00a beq.n 8030b74 { if(RCCEx_PLL3_Config(&(PeriphClkInit->PLL3),DIVIDER_R_UPDATE)!=HAL_OK) - 8030ada: 687b ldr r3, [r7, #4] - 8030adc: 3324 adds r3, #36 ; 0x24 - 8030ade: 2102 movs r1, #2 - 8030ae0: 4618 mov r0, r3 - 8030ae2: f001 fa3f bl 8031f64 - 8030ae6: 4603 mov r3, r0 - 8030ae8: 2b00 cmp r3, #0 - 8030aea: d001 beq.n 8030af0 + 8030b5e: 687b ldr r3, [r7, #4] + 8030b60: 3324 adds r3, #36 ; 0x24 + 8030b62: 2102 movs r1, #2 + 8030b64: 4618 mov r0, r3 + 8030b66: f001 fa3f bl 8031fe8 + 8030b6a: 4603 mov r3, r0 + 8030b6c: 2b00 cmp r3, #0 + 8030b6e: d001 beq.n 8030b74 { status=HAL_ERROR; - 8030aec: 2301 movs r3, #1 - 8030aee: 75bb strb r3, [r7, #22] + 8030b70: 2301 movs r3, #1 + 8030b72: 75bb strb r3, [r7, #22] } } #endif /* LTDC */ /*------------------------------ RNG Configuration -------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG) - 8030af0: 687b ldr r3, [r7, #4] - 8030af2: 681b ldr r3, [r3, #0] - 8030af4: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8030af8: 2b00 cmp r3, #0 - 8030afa: d033 beq.n 8030b64 + 8030b74: 687b ldr r3, [r7, #4] + 8030b76: 681b ldr r3, [r3, #0] + 8030b78: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8030b7c: 2b00 cmp r3, #0 + 8030b7e: d033 beq.n 8030be8 { switch(PeriphClkInit->RngClockSelection) - 8030afc: 687b ldr r3, [r7, #4] - 8030afe: 6fdb ldr r3, [r3, #124] ; 0x7c - 8030b00: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 8030b04: d017 beq.n 8030b36 - 8030b06: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 8030b0a: d811 bhi.n 8030b30 - 8030b0c: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8030b10: d013 beq.n 8030b3a - 8030b12: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8030b16: d80b bhi.n 8030b30 - 8030b18: 2b00 cmp r3, #0 - 8030b1a: d010 beq.n 8030b3e - 8030b1c: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030b20: d106 bne.n 8030b30 + 8030b80: 687b ldr r3, [r7, #4] + 8030b82: 6fdb ldr r3, [r3, #124] ; 0x7c + 8030b84: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 8030b88: d017 beq.n 8030bba + 8030b8a: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 8030b8e: d811 bhi.n 8030bb4 + 8030b90: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8030b94: d013 beq.n 8030bbe + 8030b96: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8030b9a: d80b bhi.n 8030bb4 + 8030b9c: 2b00 cmp r3, #0 + 8030b9e: d010 beq.n 8030bc2 + 8030ba0: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030ba4: d106 bne.n 8030bb4 { case RCC_RNGCLKSOURCE_PLL: /* PLL is used as clock source for RNG*/ /* Enable RNG Clock output generated form System RNG . */ __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ); - 8030b22: 4b0e ldr r3, [pc, #56] ; (8030b5c ) - 8030b24: 6adb ldr r3, [r3, #44] ; 0x2c - 8030b26: 4a0d ldr r2, [pc, #52] ; (8030b5c ) - 8030b28: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8030b2c: 62d3 str r3, [r2, #44] ; 0x2c + 8030ba6: 4b0e ldr r3, [pc, #56] ; (8030be0 ) + 8030ba8: 6adb ldr r3, [r3, #44] ; 0x2c + 8030baa: 4a0d ldr r2, [pc, #52] ; (8030be0 ) + 8030bac: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8030bb0: 62d3 str r3, [r2, #44] ; 0x2c /* RNG clock source configuration done later after clock selection check */ break; - 8030b2e: e007 b.n 8030b40 + 8030bb2: e007 b.n 8030bc4 /* HSI48 oscillator is used as source of RNG clock */ /* RNG clock source configuration done later after clock selection check */ break; default: ret = HAL_ERROR; - 8030b30: 2301 movs r3, #1 - 8030b32: 75fb strb r3, [r7, #23] + 8030bb4: 2301 movs r3, #1 + 8030bb6: 75fb strb r3, [r7, #23] break; - 8030b34: e004 b.n 8030b40 + 8030bb8: e004 b.n 8030bc4 break; - 8030b36: bf00 nop - 8030b38: e002 b.n 8030b40 + 8030bba: bf00 nop + 8030bbc: e002 b.n 8030bc4 break; - 8030b3a: bf00 nop - 8030b3c: e000 b.n 8030b40 + 8030bbe: bf00 nop + 8030bc0: e000 b.n 8030bc4 break; - 8030b3e: bf00 nop + 8030bc2: bf00 nop } if(ret == HAL_OK) - 8030b40: 7dfb ldrb r3, [r7, #23] - 8030b42: 2b00 cmp r3, #0 - 8030b44: d10c bne.n 8030b60 + 8030bc4: 7dfb ldrb r3, [r7, #23] + 8030bc6: 2b00 cmp r3, #0 + 8030bc8: d10c bne.n 8030be4 { /* Set the source of RNG clock*/ __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection); - 8030b46: 4b05 ldr r3, [pc, #20] ; (8030b5c ) - 8030b48: 6d5b ldr r3, [r3, #84] ; 0x54 - 8030b4a: f423 7240 bic.w r2, r3, #768 ; 0x300 - 8030b4e: 687b ldr r3, [r7, #4] - 8030b50: 6fdb ldr r3, [r3, #124] ; 0x7c - 8030b52: 4902 ldr r1, [pc, #8] ; (8030b5c ) - 8030b54: 4313 orrs r3, r2 - 8030b56: 654b str r3, [r1, #84] ; 0x54 - 8030b58: e004 b.n 8030b64 - 8030b5a: bf00 nop - 8030b5c: 58024400 .word 0x58024400 + 8030bca: 4b05 ldr r3, [pc, #20] ; (8030be0 ) + 8030bcc: 6d5b ldr r3, [r3, #84] ; 0x54 + 8030bce: f423 7240 bic.w r2, r3, #768 ; 0x300 + 8030bd2: 687b ldr r3, [r7, #4] + 8030bd4: 6fdb ldr r3, [r3, #124] ; 0x7c + 8030bd6: 4902 ldr r1, [pc, #8] ; (8030be0 ) + 8030bd8: 4313 orrs r3, r2 + 8030bda: 654b str r3, [r1, #84] ; 0x54 + 8030bdc: e004 b.n 8030be8 + 8030bde: bf00 nop + 8030be0: 58024400 .word 0x58024400 } else { /* set overall return value */ status = ret; - 8030b60: 7dfb ldrb r3, [r7, #23] - 8030b62: 75bb strb r3, [r7, #22] + 8030be4: 7dfb ldrb r3, [r7, #23] + 8030be6: 75bb strb r3, [r7, #22] } } /*------------------------------ SWPMI1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) - 8030b64: 687b ldr r3, [r7, #4] - 8030b66: 681b ldr r3, [r3, #0] - 8030b68: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 8030b6c: 2b00 cmp r3, #0 - 8030b6e: d008 beq.n 8030b82 + 8030be8: 687b ldr r3, [r7, #4] + 8030bea: 681b ldr r3, [r3, #0] + 8030bec: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 8030bf0: 2b00 cmp r3, #0 + 8030bf2: d008 beq.n 8030c06 { /* Check the parameters */ assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection)); /* Configure the SWPMI1 interface clock source */ __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection); - 8030b70: 4b31 ldr r3, [pc, #196] ; (8030c38 ) - 8030b72: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030b74: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 - 8030b78: 687b ldr r3, [r7, #4] - 8030b7a: 6f1b ldr r3, [r3, #112] ; 0x70 - 8030b7c: 492e ldr r1, [pc, #184] ; (8030c38 ) - 8030b7e: 4313 orrs r3, r2 - 8030b80: 650b str r3, [r1, #80] ; 0x50 + 8030bf4: 4b31 ldr r3, [pc, #196] ; (8030cbc ) + 8030bf6: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030bf8: f023 4200 bic.w r2, r3, #2147483648 ; 0x80000000 + 8030bfc: 687b ldr r3, [r7, #4] + 8030bfe: 6f1b ldr r3, [r3, #112] ; 0x70 + 8030c00: 492e ldr r1, [pc, #184] ; (8030cbc ) + 8030c02: 4313 orrs r3, r2 + 8030c04: 650b str r3, [r1, #80] ; 0x50 } #if defined(HRTIM1) /*------------------------------ HRTIM1 clock Configuration ----------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1) - 8030b82: 687b ldr r3, [r7, #4] - 8030b84: 681b ldr r3, [r3, #0] - 8030b86: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8030b8a: 2b00 cmp r3, #0 - 8030b8c: d009 beq.n 8030ba2 + 8030c06: 687b ldr r3, [r7, #4] + 8030c08: 681b ldr r3, [r3, #0] + 8030c0a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8030c0e: 2b00 cmp r3, #0 + 8030c10: d009 beq.n 8030c26 { /* Check the parameters */ assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection)); /* Configure the HRTIM1 clock source */ __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection); - 8030b8e: 4b2a ldr r3, [pc, #168] ; (8030c38 ) - 8030b90: 691b ldr r3, [r3, #16] - 8030b92: f423 4280 bic.w r2, r3, #16384 ; 0x4000 - 8030b96: 687b ldr r3, [r7, #4] - 8030b98: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 - 8030b9c: 4926 ldr r1, [pc, #152] ; (8030c38 ) - 8030b9e: 4313 orrs r3, r2 - 8030ba0: 610b str r3, [r1, #16] + 8030c12: 4b2a ldr r3, [pc, #168] ; (8030cbc ) + 8030c14: 691b ldr r3, [r3, #16] + 8030c16: f423 4280 bic.w r2, r3, #16384 ; 0x4000 + 8030c1a: 687b ldr r3, [r7, #4] + 8030c1c: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4 + 8030c20: 4926 ldr r1, [pc, #152] ; (8030cbc ) + 8030c22: 4313 orrs r3, r2 + 8030c24: 610b str r3, [r1, #16] } #endif /*HRTIM1*/ /*------------------------------ DFSDM1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1) - 8030ba2: 687b ldr r3, [r7, #4] - 8030ba4: 681b ldr r3, [r3, #0] - 8030ba6: f403 1300 and.w r3, r3, #2097152 ; 0x200000 - 8030baa: 2b00 cmp r3, #0 - 8030bac: d008 beq.n 8030bc0 + 8030c26: 687b ldr r3, [r7, #4] + 8030c28: 681b ldr r3, [r3, #0] + 8030c2a: f403 1300 and.w r3, r3, #2097152 ; 0x200000 + 8030c2e: 2b00 cmp r3, #0 + 8030c30: d008 beq.n 8030c44 { /* Check the parameters */ assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection)); /* Configure the DFSDM1 interface clock source */ __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection); - 8030bae: 4b22 ldr r3, [pc, #136] ; (8030c38 ) - 8030bb0: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030bb2: f023 7280 bic.w r2, r3, #16777216 ; 0x1000000 - 8030bb6: 687b ldr r3, [r7, #4] - 8030bb8: 6e9b ldr r3, [r3, #104] ; 0x68 - 8030bba: 491f ldr r1, [pc, #124] ; (8030c38 ) - 8030bbc: 4313 orrs r3, r2 - 8030bbe: 650b str r3, [r1, #80] ; 0x50 + 8030c32: 4b22 ldr r3, [pc, #136] ; (8030cbc ) + 8030c34: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030c36: f023 7280 bic.w r2, r3, #16777216 ; 0x1000000 + 8030c3a: 687b ldr r3, [r7, #4] + 8030c3c: 6e9b ldr r3, [r3, #104] ; 0x68 + 8030c3e: 491f ldr r1, [pc, #124] ; (8030cbc ) + 8030c40: 4313 orrs r3, r2 + 8030c42: 650b str r3, [r1, #80] ; 0x50 __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection); } #endif /* DFSDM2 */ /*------------------------------------ TIM configuration --------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == RCC_PERIPHCLK_TIM) - 8030bc0: 687b ldr r3, [r7, #4] - 8030bc2: 681b ldr r3, [r3, #0] - 8030bc4: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 - 8030bc8: 2b00 cmp r3, #0 - 8030bca: d00d beq.n 8030be8 + 8030c44: 687b ldr r3, [r7, #4] + 8030c46: 681b ldr r3, [r3, #0] + 8030c48: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 + 8030c4c: 2b00 cmp r3, #0 + 8030c4e: d00d beq.n 8030c6c { /* Check the parameters */ assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection)); /* Configure Timer Prescaler */ __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection); - 8030bcc: 4b1a ldr r3, [pc, #104] ; (8030c38 ) - 8030bce: 691b ldr r3, [r3, #16] - 8030bd0: 4a19 ldr r2, [pc, #100] ; (8030c38 ) - 8030bd2: f423 4300 bic.w r3, r3, #32768 ; 0x8000 - 8030bd6: 6113 str r3, [r2, #16] - 8030bd8: 4b17 ldr r3, [pc, #92] ; (8030c38 ) - 8030bda: 691a ldr r2, [r3, #16] - 8030bdc: 687b ldr r3, [r7, #4] - 8030bde: f8d3 30b8 ldr.w r3, [r3, #184] ; 0xb8 - 8030be2: 4915 ldr r1, [pc, #84] ; (8030c38 ) - 8030be4: 4313 orrs r3, r2 - 8030be6: 610b str r3, [r1, #16] + 8030c50: 4b1a ldr r3, [pc, #104] ; (8030cbc ) + 8030c52: 691b ldr r3, [r3, #16] + 8030c54: 4a19 ldr r2, [pc, #100] ; (8030cbc ) + 8030c56: f423 4300 bic.w r3, r3, #32768 ; 0x8000 + 8030c5a: 6113 str r3, [r2, #16] + 8030c5c: 4b17 ldr r3, [pc, #92] ; (8030cbc ) + 8030c5e: 691a ldr r2, [r3, #16] + 8030c60: 687b ldr r3, [r7, #4] + 8030c62: f8d3 30b8 ldr.w r3, [r3, #184] ; 0xb8 + 8030c66: 4915 ldr r1, [pc, #84] ; (8030cbc ) + 8030c68: 4313 orrs r3, r2 + 8030c6a: 610b str r3, [r1, #16] } /*------------------------------------ CKPER configuration --------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CKPER) == RCC_PERIPHCLK_CKPER) - 8030be8: 687b ldr r3, [r7, #4] - 8030bea: 681b ldr r3, [r3, #0] - 8030bec: 2b00 cmp r3, #0 - 8030bee: da08 bge.n 8030c02 + 8030c6c: 687b ldr r3, [r7, #4] + 8030c6e: 681b ldr r3, [r3, #0] + 8030c70: 2b00 cmp r3, #0 + 8030c72: da08 bge.n 8030c86 { /* Check the parameters */ assert_param(IS_RCC_CLKPSOURCE(PeriphClkInit->CkperClockSelection)); /* Configure the CKPER clock source */ __HAL_RCC_CLKP_CONFIG(PeriphClkInit->CkperClockSelection); - 8030bf0: 4b11 ldr r3, [pc, #68] ; (8030c38 ) - 8030bf2: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030bf4: f023 5240 bic.w r2, r3, #805306368 ; 0x30000000 - 8030bf8: 687b ldr r3, [r7, #4] - 8030bfa: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030bfc: 490e ldr r1, [pc, #56] ; (8030c38 ) - 8030bfe: 4313 orrs r3, r2 - 8030c00: 64cb str r3, [r1, #76] ; 0x4c + 8030c74: 4b11 ldr r3, [pc, #68] ; (8030cbc ) + 8030c76: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030c78: f023 5240 bic.w r2, r3, #805306368 ; 0x30000000 + 8030c7c: 687b ldr r3, [r7, #4] + 8030c7e: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030c80: 490e ldr r1, [pc, #56] ; (8030cbc ) + 8030c82: 4313 orrs r3, r2 + 8030c84: 64cb str r3, [r1, #76] ; 0x4c } /*------------------------------ CEC Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) - 8030c02: 687b ldr r3, [r7, #4] - 8030c04: 681b ldr r3, [r3, #0] - 8030c06: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 8030c0a: 2b00 cmp r3, #0 - 8030c0c: d009 beq.n 8030c22 + 8030c86: 687b ldr r3, [r7, #4] + 8030c88: 681b ldr r3, [r3, #0] + 8030c8a: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 8030c8e: 2b00 cmp r3, #0 + 8030c90: d009 beq.n 8030ca6 { /* Check the parameters */ assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); /* Configure the CEC interface clock source */ __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); - 8030c0e: 4b0a ldr r3, [pc, #40] ; (8030c38 ) - 8030c10: 6d5b ldr r3, [r3, #84] ; 0x54 - 8030c12: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000 - 8030c16: 687b ldr r3, [r7, #4] - 8030c18: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8030c1c: 4906 ldr r1, [pc, #24] ; (8030c38 ) - 8030c1e: 4313 orrs r3, r2 - 8030c20: 654b str r3, [r1, #84] ; 0x54 + 8030c92: 4b0a ldr r3, [pc, #40] ; (8030cbc ) + 8030c94: 6d5b ldr r3, [r3, #84] ; 0x54 + 8030c96: f423 0240 bic.w r2, r3, #12582912 ; 0xc00000 + 8030c9a: 687b ldr r3, [r7, #4] + 8030c9c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8030ca0: 4906 ldr r1, [pc, #24] ; (8030cbc ) + 8030ca2: 4313 orrs r3, r2 + 8030ca4: 654b str r3, [r1, #84] ; 0x54 } if (status == HAL_OK) - 8030c22: 7dbb ldrb r3, [r7, #22] - 8030c24: 2b00 cmp r3, #0 - 8030c26: d101 bne.n 8030c2c + 8030ca6: 7dbb ldrb r3, [r7, #22] + 8030ca8: 2b00 cmp r3, #0 + 8030caa: d101 bne.n 8030cb0 { return HAL_OK; - 8030c28: 2300 movs r3, #0 - 8030c2a: e000 b.n 8030c2e + 8030cac: 2300 movs r3, #0 + 8030cae: e000 b.n 8030cb2 } return HAL_ERROR; - 8030c2c: 2301 movs r3, #1 + 8030cb0: 2301 movs r3, #1 } - 8030c2e: 4618 mov r0, r3 - 8030c30: 3718 adds r7, #24 - 8030c32: 46bd mov sp, r7 - 8030c34: bd80 pop {r7, pc} - 8030c36: bf00 nop - 8030c38: 58024400 .word 0x58024400 + 8030cb2: 4618 mov r0, r3 + 8030cb4: 3718 adds r7, #24 + 8030cb6: 46bd mov sp, r7 + 8030cb8: bd80 pop {r7, pc} + 8030cba: bf00 nop + 8030cbc: 58024400 .word 0x58024400 -08030c3c : +08030cc0 : * @retval Frequency in KHz * * (*) : Available on some STM32H7 lines only. */ uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) { - 8030c3c: b580 push {r7, lr} - 8030c3e: b090 sub sp, #64 ; 0x40 - 8030c40: af00 add r7, sp, #0 - 8030c42: 6078 str r0, [r7, #4] + 8030cc0: b580 push {r7, lr} + 8030cc2: b090 sub sp, #64 ; 0x40 + 8030cc4: af00 add r7, sp, #0 + 8030cc6: 6078 str r0, [r7, #4] /* This variable is used to store the SAI and CKP clock source */ uint32_t saiclocksource; uint32_t ckpclocksource; uint32_t srcclk; if (PeriphClk == RCC_PERIPHCLK_SAI1) - 8030c44: 687b ldr r3, [r7, #4] - 8030c46: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030c4a: f040 8095 bne.w 8030d78 + 8030cc8: 687b ldr r3, [r7, #4] + 8030cca: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030cce: f040 8095 bne.w 8030dfc { saiclocksource= __HAL_RCC_GET_SAI1_SOURCE(); - 8030c4e: 4b97 ldr r3, [pc, #604] ; (8030eac ) - 8030c50: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030c52: f003 0307 and.w r3, r3, #7 - 8030c56: 633b str r3, [r7, #48] ; 0x30 + 8030cd2: 4b97 ldr r3, [pc, #604] ; (8030f30 ) + 8030cd4: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030cd6: f003 0307 and.w r3, r3, #7 + 8030cda: 633b str r3, [r7, #48] ; 0x30 switch (saiclocksource) - 8030c58: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030c5a: 2b04 cmp r3, #4 - 8030c5c: f200 8088 bhi.w 8030d70 - 8030c60: a201 add r2, pc, #4 ; (adr r2, 8030c68 ) - 8030c62: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8030c66: bf00 nop - 8030c68: 08030c7d .word 0x08030c7d - 8030c6c: 08030ca5 .word 0x08030ca5 - 8030c70: 08030ccd .word 0x08030ccd - 8030c74: 08030d69 .word 0x08030d69 - 8030c78: 08030cf5 .word 0x08030cf5 + 8030cdc: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030cde: 2b04 cmp r3, #4 + 8030ce0: f200 8088 bhi.w 8030df4 + 8030ce4: a201 add r2, pc, #4 ; (adr r2, 8030cec ) + 8030ce6: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8030cea: bf00 nop + 8030cec: 08030d01 .word 0x08030d01 + 8030cf0: 08030d29 .word 0x08030d29 + 8030cf4: 08030d51 .word 0x08030d51 + 8030cf8: 08030ded .word 0x08030ded + 8030cfc: 08030d79 .word 0x08030d79 { case RCC_SAI1CLKSOURCE_PLL: /* PLL1 is the clock source for SAI1 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 8030c7c: 4b8b ldr r3, [pc, #556] ; (8030eac ) - 8030c7e: 681b ldr r3, [r3, #0] - 8030c80: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8030c84: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8030c88: d108 bne.n 8030c9c + 8030d00: 4b8b ldr r3, [pc, #556] ; (8030f30 ) + 8030d02: 681b ldr r3, [r3, #0] + 8030d04: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8030d08: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8030d0c: d108 bne.n 8030d20 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 8030c8a: f107 0324 add.w r3, r7, #36 ; 0x24 - 8030c8e: 4618 mov r0, r3 - 8030c90: f000 ff64 bl 8031b5c + 8030d0e: f107 0324 add.w r3, r7, #36 ; 0x24 + 8030d12: 4618 mov r0, r3 + 8030d14: f000 ff64 bl 8031be0 frequency = pll1_clocks.PLL1_Q_Frequency; - 8030c94: 6abb ldr r3, [r7, #40] ; 0x28 - 8030c96: 63fb str r3, [r7, #60] ; 0x3c + 8030d18: 6abb ldr r3, [r7, #40] ; 0x28 + 8030d1a: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030c98: f000 bc94 b.w 80315c4 + 8030d1c: f000 bc94 b.w 8031648 frequency = 0; - 8030c9c: 2300 movs r3, #0 - 8030c9e: 63fb str r3, [r7, #60] ; 0x3c + 8030d20: 2300 movs r3, #0 + 8030d22: 63fb str r3, [r7, #60] ; 0x3c break; - 8030ca0: f000 bc90 b.w 80315c4 + 8030d24: f000 bc90 b.w 8031648 } case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is the clock source for SAI1 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8030ca4: 4b81 ldr r3, [pc, #516] ; (8030eac ) - 8030ca6: 681b ldr r3, [r3, #0] - 8030ca8: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8030cac: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 8030cb0: d108 bne.n 8030cc4 + 8030d28: 4b81 ldr r3, [pc, #516] ; (8030f30 ) + 8030d2a: 681b ldr r3, [r3, #0] + 8030d2c: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8030d30: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8030d34: d108 bne.n 8030d48 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8030cb2: f107 0318 add.w r3, r7, #24 - 8030cb6: 4618 mov r0, r3 - 8030cb8: f000 fca8 bl 803160c + 8030d36: f107 0318 add.w r3, r7, #24 + 8030d3a: 4618 mov r0, r3 + 8030d3c: f000 fca8 bl 8031690 frequency = pll2_clocks.PLL2_P_Frequency; - 8030cbc: 69bb ldr r3, [r7, #24] - 8030cbe: 63fb str r3, [r7, #60] ; 0x3c + 8030d40: 69bb ldr r3, [r7, #24] + 8030d42: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030cc0: f000 bc80 b.w 80315c4 + 8030d44: f000 bc80 b.w 8031648 frequency = 0; - 8030cc4: 2300 movs r3, #0 - 8030cc6: 63fb str r3, [r7, #60] ; 0x3c + 8030d48: 2300 movs r3, #0 + 8030d4a: 63fb str r3, [r7, #60] ; 0x3c break; - 8030cc8: f000 bc7c b.w 80315c4 + 8030d4c: f000 bc7c b.w 8031648 } case RCC_SAI1CLKSOURCE_PLL3: /* PLL3 is the clock source for SAI1 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 8030ccc: 4b77 ldr r3, [pc, #476] ; (8030eac ) - 8030cce: 681b ldr r3, [r3, #0] - 8030cd0: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8030cd4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030cd8: d108 bne.n 8030cec + 8030d50: 4b77 ldr r3, [pc, #476] ; (8030f30 ) + 8030d52: 681b ldr r3, [r3, #0] + 8030d54: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8030d58: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030d5c: d108 bne.n 8030d70 { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8030cda: f107 030c add.w r3, r7, #12 - 8030cde: 4618 mov r0, r3 - 8030ce0: f000 fde8 bl 80318b4 + 8030d5e: f107 030c add.w r3, r7, #12 + 8030d62: 4618 mov r0, r3 + 8030d64: f000 fde8 bl 8031938 frequency = pll3_clocks.PLL3_P_Frequency; - 8030ce4: 68fb ldr r3, [r7, #12] - 8030ce6: 63fb str r3, [r7, #60] ; 0x3c + 8030d68: 68fb ldr r3, [r7, #12] + 8030d6a: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030ce8: f000 bc6c b.w 80315c4 + 8030d6c: f000 bc6c b.w 8031648 frequency = 0; - 8030cec: 2300 movs r3, #0 - 8030cee: 63fb str r3, [r7, #60] ; 0x3c + 8030d70: 2300 movs r3, #0 + 8030d72: 63fb str r3, [r7, #60] ; 0x3c break; - 8030cf0: f000 bc68 b.w 80315c4 + 8030d74: f000 bc68 b.w 8031648 } case RCC_SAI1CLKSOURCE_CLKP: /* CKPER is the clock source for SAI1*/ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 8030cf4: 4b6d ldr r3, [pc, #436] ; (8030eac ) - 8030cf6: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030cf8: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 8030cfc: 637b str r3, [r7, #52] ; 0x34 + 8030d78: 4b6d ldr r3, [pc, #436] ; (8030f30 ) + 8030d7a: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030d7c: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 8030d80: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 8030cfe: 4b6b ldr r3, [pc, #428] ; (8030eac ) - 8030d00: 681b ldr r3, [r3, #0] - 8030d02: f003 0304 and.w r3, r3, #4 - 8030d06: 2b04 cmp r3, #4 - 8030d08: d10c bne.n 8030d24 - 8030d0a: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030d0c: 2b00 cmp r3, #0 - 8030d0e: d109 bne.n 8030d24 + 8030d82: 4b6b ldr r3, [pc, #428] ; (8030f30 ) + 8030d84: 681b ldr r3, [r3, #0] + 8030d86: f003 0304 and.w r3, r3, #4 + 8030d8a: 2b04 cmp r3, #4 + 8030d8c: d10c bne.n 8030da8 + 8030d8e: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030d90: 2b00 cmp r3, #0 + 8030d92: d109 bne.n 8030da8 { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8030d10: 4b66 ldr r3, [pc, #408] ; (8030eac ) - 8030d12: 681b ldr r3, [r3, #0] - 8030d14: 08db lsrs r3, r3, #3 - 8030d16: f003 0303 and.w r3, r3, #3 - 8030d1a: 4a65 ldr r2, [pc, #404] ; (8030eb0 ) - 8030d1c: fa22 f303 lsr.w r3, r2, r3 - 8030d20: 63fb str r3, [r7, #60] ; 0x3c - 8030d22: e01f b.n 8030d64 + 8030d94: 4b66 ldr r3, [pc, #408] ; (8030f30 ) + 8030d96: 681b ldr r3, [r3, #0] + 8030d98: 08db lsrs r3, r3, #3 + 8030d9a: f003 0303 and.w r3, r3, #3 + 8030d9e: 4a65 ldr r2, [pc, #404] ; (8030f34 ) + 8030da0: fa22 f303 lsr.w r3, r2, r3 + 8030da4: 63fb str r3, [r7, #60] ; 0x3c + 8030da6: e01f b.n 8030de8 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8030d24: 4b61 ldr r3, [pc, #388] ; (8030eac ) - 8030d26: 681b ldr r3, [r3, #0] - 8030d28: f403 7380 and.w r3, r3, #256 ; 0x100 - 8030d2c: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030d30: d106 bne.n 8030d40 - 8030d32: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030d34: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8030d38: d102 bne.n 8030d40 + 8030da8: 4b61 ldr r3, [pc, #388] ; (8030f30 ) + 8030daa: 681b ldr r3, [r3, #0] + 8030dac: f403 7380 and.w r3, r3, #256 ; 0x100 + 8030db0: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030db4: d106 bne.n 8030dc4 + 8030db6: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030db8: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8030dbc: d102 bne.n 8030dc4 { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 8030d3a: 4b5e ldr r3, [pc, #376] ; (8030eb4 ) - 8030d3c: 63fb str r3, [r7, #60] ; 0x3c - 8030d3e: e011 b.n 8030d64 + 8030dbe: 4b5e ldr r3, [pc, #376] ; (8030f38 ) + 8030dc0: 63fb str r3, [r7, #60] ; 0x3c + 8030dc2: e011 b.n 8030de8 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 8030d40: 4b5a ldr r3, [pc, #360] ; (8030eac ) - 8030d42: 681b ldr r3, [r3, #0] - 8030d44: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8030d48: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8030d4c: d106 bne.n 8030d5c - 8030d4e: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030d50: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030d54: d102 bne.n 8030d5c + 8030dc4: 4b5a ldr r3, [pc, #360] ; (8030f30 ) + 8030dc6: 681b ldr r3, [r3, #0] + 8030dc8: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8030dcc: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8030dd0: d106 bne.n 8030de0 + 8030dd2: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030dd4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030dd8: d102 bne.n 8030de0 { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8030d56: 4b58 ldr r3, [pc, #352] ; (8030eb8 ) - 8030d58: 63fb str r3, [r7, #60] ; 0x3c - 8030d5a: e003 b.n 8030d64 + 8030dda: 4b58 ldr r3, [pc, #352] ; (8030f3c ) + 8030ddc: 63fb str r3, [r7, #60] ; 0x3c + 8030dde: e003 b.n 8030de8 } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8030d5c: 2300 movs r3, #0 - 8030d5e: 63fb str r3, [r7, #60] ; 0x3c + 8030de0: 2300 movs r3, #0 + 8030de2: 63fb str r3, [r7, #60] ; 0x3c } break; - 8030d60: f000 bc30 b.w 80315c4 - 8030d64: f000 bc2e b.w 80315c4 + 8030de4: f000 bc30 b.w 8031648 + 8030de8: f000 bc2e b.w 8031648 } case (RCC_SAI1CLKSOURCE_PIN): /* External clock is the clock source for SAI1 */ { frequency = EXTERNAL_CLOCK_VALUE; - 8030d68: 4b54 ldr r3, [pc, #336] ; (8030ebc ) - 8030d6a: 63fb str r3, [r7, #60] ; 0x3c + 8030dec: 4b54 ldr r3, [pc, #336] ; (8030f40 ) + 8030dee: 63fb str r3, [r7, #60] ; 0x3c break; - 8030d6c: f000 bc2a b.w 80315c4 + 8030df0: f000 bc2a b.w 8031648 } default : { frequency = 0; - 8030d70: 2300 movs r3, #0 - 8030d72: 63fb str r3, [r7, #60] ; 0x3c + 8030df4: 2300 movs r3, #0 + 8030df6: 63fb str r3, [r7, #60] ; 0x3c break; - 8030d74: f000 bc26 b.w 80315c4 + 8030df8: f000 bc26 b.w 8031648 } } } #if defined(SAI3) else if (PeriphClk == RCC_PERIPHCLK_SAI23) - 8030d78: 687b ldr r3, [r7, #4] - 8030d7a: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8030d7e: f040 809f bne.w 8030ec0 + 8030dfc: 687b ldr r3, [r7, #4] + 8030dfe: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 8030e02: f040 809f bne.w 8030f44 { saiclocksource= __HAL_RCC_GET_SAI23_SOURCE(); - 8030d82: 4b4a ldr r3, [pc, #296] ; (8030eac ) - 8030d84: 6d1b ldr r3, [r3, #80] ; 0x50 - 8030d86: f403 73e0 and.w r3, r3, #448 ; 0x1c0 - 8030d8a: 633b str r3, [r7, #48] ; 0x30 + 8030e06: 4b4a ldr r3, [pc, #296] ; (8030f30 ) + 8030e08: 6d1b ldr r3, [r3, #80] ; 0x50 + 8030e0a: f403 73e0 and.w r3, r3, #448 ; 0x1c0 + 8030e0e: 633b str r3, [r7, #48] ; 0x30 switch (saiclocksource) - 8030d8c: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d8e: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030d92: d04d beq.n 8030e30 - 8030d94: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030d96: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030d9a: f200 8084 bhi.w 8030ea6 - 8030d9e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030da0: 2bc0 cmp r3, #192 ; 0xc0 - 8030da2: d07d beq.n 8030ea0 - 8030da4: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030da6: 2bc0 cmp r3, #192 ; 0xc0 - 8030da8: d87d bhi.n 8030ea6 - 8030daa: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030dac: 2b80 cmp r3, #128 ; 0x80 - 8030dae: d02d beq.n 8030e0c - 8030db0: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030db2: 2b80 cmp r3, #128 ; 0x80 - 8030db4: d877 bhi.n 8030ea6 - 8030db6: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030db8: 2b00 cmp r3, #0 - 8030dba: d003 beq.n 8030dc4 - 8030dbc: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030dbe: 2b40 cmp r3, #64 ; 0x40 - 8030dc0: d012 beq.n 8030de8 - 8030dc2: e070 b.n 8030ea6 + 8030e10: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030e12: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030e16: d04d beq.n 8030eb4 + 8030e18: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030e1a: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030e1e: f200 8084 bhi.w 8030f2a + 8030e22: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030e24: 2bc0 cmp r3, #192 ; 0xc0 + 8030e26: d07d beq.n 8030f24 + 8030e28: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030e2a: 2bc0 cmp r3, #192 ; 0xc0 + 8030e2c: d87d bhi.n 8030f2a + 8030e2e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030e30: 2b80 cmp r3, #128 ; 0x80 + 8030e32: d02d beq.n 8030e90 + 8030e34: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030e36: 2b80 cmp r3, #128 ; 0x80 + 8030e38: d877 bhi.n 8030f2a + 8030e3a: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030e3c: 2b00 cmp r3, #0 + 8030e3e: d003 beq.n 8030e48 + 8030e40: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030e42: 2b40 cmp r3, #64 ; 0x40 + 8030e44: d012 beq.n 8030e6c + 8030e46: e070 b.n 8030f2a { case RCC_SAI23CLKSOURCE_PLL: /* PLL1 is the clock source for SAI2/3 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 8030dc4: 4b39 ldr r3, [pc, #228] ; (8030eac ) - 8030dc6: 681b ldr r3, [r3, #0] - 8030dc8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8030dcc: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8030dd0: d107 bne.n 8030de2 + 8030e48: 4b39 ldr r3, [pc, #228] ; (8030f30 ) + 8030e4a: 681b ldr r3, [r3, #0] + 8030e4c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8030e50: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8030e54: d107 bne.n 8030e66 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 8030dd2: f107 0324 add.w r3, r7, #36 ; 0x24 - 8030dd6: 4618 mov r0, r3 - 8030dd8: f000 fec0 bl 8031b5c + 8030e56: f107 0324 add.w r3, r7, #36 ; 0x24 + 8030e5a: 4618 mov r0, r3 + 8030e5c: f000 fec0 bl 8031be0 frequency = pll1_clocks.PLL1_Q_Frequency; - 8030ddc: 6abb ldr r3, [r7, #40] ; 0x28 - 8030dde: 63fb str r3, [r7, #60] ; 0x3c + 8030e60: 6abb ldr r3, [r7, #40] ; 0x28 + 8030e62: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030de0: e3f0 b.n 80315c4 + 8030e64: e3f0 b.n 8031648 frequency = 0; - 8030de2: 2300 movs r3, #0 - 8030de4: 63fb str r3, [r7, #60] ; 0x3c + 8030e66: 2300 movs r3, #0 + 8030e68: 63fb str r3, [r7, #60] ; 0x3c break; - 8030de6: e3ed b.n 80315c4 + 8030e6a: e3ed b.n 8031648 } case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is the clock source for SAI2/3 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8030de8: 4b30 ldr r3, [pc, #192] ; (8030eac ) - 8030dea: 681b ldr r3, [r3, #0] - 8030dec: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8030df0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 8030df4: d107 bne.n 8030e06 + 8030e6c: 4b30 ldr r3, [pc, #192] ; (8030f30 ) + 8030e6e: 681b ldr r3, [r3, #0] + 8030e70: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8030e74: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8030e78: d107 bne.n 8030e8a { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8030df6: f107 0318 add.w r3, r7, #24 - 8030dfa: 4618 mov r0, r3 - 8030dfc: f000 fc06 bl 803160c + 8030e7a: f107 0318 add.w r3, r7, #24 + 8030e7e: 4618 mov r0, r3 + 8030e80: f000 fc06 bl 8031690 frequency = pll2_clocks.PLL2_P_Frequency; - 8030e00: 69bb ldr r3, [r7, #24] - 8030e02: 63fb str r3, [r7, #60] ; 0x3c + 8030e84: 69bb ldr r3, [r7, #24] + 8030e86: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030e04: e3de b.n 80315c4 + 8030e88: e3de b.n 8031648 frequency = 0; - 8030e06: 2300 movs r3, #0 - 8030e08: 63fb str r3, [r7, #60] ; 0x3c + 8030e8a: 2300 movs r3, #0 + 8030e8c: 63fb str r3, [r7, #60] ; 0x3c break; - 8030e0a: e3db b.n 80315c4 + 8030e8e: e3db b.n 8031648 } case RCC_SAI23CLKSOURCE_PLL3: /* PLL3 is the clock source for SAI2/3 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 8030e0c: 4b27 ldr r3, [pc, #156] ; (8030eac ) - 8030e0e: 681b ldr r3, [r3, #0] - 8030e10: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8030e14: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030e18: d107 bne.n 8030e2a + 8030e90: 4b27 ldr r3, [pc, #156] ; (8030f30 ) + 8030e92: 681b ldr r3, [r3, #0] + 8030e94: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8030e98: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030e9c: d107 bne.n 8030eae { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8030e1a: f107 030c add.w r3, r7, #12 - 8030e1e: 4618 mov r0, r3 - 8030e20: f000 fd48 bl 80318b4 + 8030e9e: f107 030c add.w r3, r7, #12 + 8030ea2: 4618 mov r0, r3 + 8030ea4: f000 fd48 bl 8031938 frequency = pll3_clocks.PLL3_P_Frequency; - 8030e24: 68fb ldr r3, [r7, #12] - 8030e26: 63fb str r3, [r7, #60] ; 0x3c + 8030ea8: 68fb ldr r3, [r7, #12] + 8030eaa: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030e28: e3cc b.n 80315c4 + 8030eac: e3cc b.n 8031648 frequency = 0; - 8030e2a: 2300 movs r3, #0 - 8030e2c: 63fb str r3, [r7, #60] ; 0x3c + 8030eae: 2300 movs r3, #0 + 8030eb0: 63fb str r3, [r7, #60] ; 0x3c break; - 8030e2e: e3c9 b.n 80315c4 + 8030eb2: e3c9 b.n 8031648 } case RCC_SAI23CLKSOURCE_CLKP: /* CKPER is the clock source for SAI2/3 */ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 8030e30: 4b1e ldr r3, [pc, #120] ; (8030eac ) - 8030e32: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030e34: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 8030e38: 637b str r3, [r7, #52] ; 0x34 + 8030eb4: 4b1e ldr r3, [pc, #120] ; (8030f30 ) + 8030eb6: 6cdb ldr r3, [r3, #76] ; 0x4c + 8030eb8: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 8030ebc: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 8030e3a: 4b1c ldr r3, [pc, #112] ; (8030eac ) - 8030e3c: 681b ldr r3, [r3, #0] - 8030e3e: f003 0304 and.w r3, r3, #4 - 8030e42: 2b04 cmp r3, #4 - 8030e44: d10c bne.n 8030e60 - 8030e46: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030e48: 2b00 cmp r3, #0 - 8030e4a: d109 bne.n 8030e60 + 8030ebe: 4b1c ldr r3, [pc, #112] ; (8030f30 ) + 8030ec0: 681b ldr r3, [r3, #0] + 8030ec2: f003 0304 and.w r3, r3, #4 + 8030ec6: 2b04 cmp r3, #4 + 8030ec8: d10c bne.n 8030ee4 + 8030eca: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030ecc: 2b00 cmp r3, #0 + 8030ece: d109 bne.n 8030ee4 { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8030e4c: 4b17 ldr r3, [pc, #92] ; (8030eac ) - 8030e4e: 681b ldr r3, [r3, #0] - 8030e50: 08db lsrs r3, r3, #3 - 8030e52: f003 0303 and.w r3, r3, #3 - 8030e56: 4a16 ldr r2, [pc, #88] ; (8030eb0 ) - 8030e58: fa22 f303 lsr.w r3, r2, r3 - 8030e5c: 63fb str r3, [r7, #60] ; 0x3c - 8030e5e: e01e b.n 8030e9e + 8030ed0: 4b17 ldr r3, [pc, #92] ; (8030f30 ) + 8030ed2: 681b ldr r3, [r3, #0] + 8030ed4: 08db lsrs r3, r3, #3 + 8030ed6: f003 0303 and.w r3, r3, #3 + 8030eda: 4a16 ldr r2, [pc, #88] ; (8030f34 ) + 8030edc: fa22 f303 lsr.w r3, r2, r3 + 8030ee0: 63fb str r3, [r7, #60] ; 0x3c + 8030ee2: e01e b.n 8030f22 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8030e60: 4b12 ldr r3, [pc, #72] ; (8030eac ) - 8030e62: 681b ldr r3, [r3, #0] - 8030e64: f403 7380 and.w r3, r3, #256 ; 0x100 - 8030e68: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030e6c: d106 bne.n 8030e7c - 8030e6e: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030e70: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8030e74: d102 bne.n 8030e7c + 8030ee4: 4b12 ldr r3, [pc, #72] ; (8030f30 ) + 8030ee6: 681b ldr r3, [r3, #0] + 8030ee8: f403 7380 and.w r3, r3, #256 ; 0x100 + 8030eec: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8030ef0: d106 bne.n 8030f00 + 8030ef2: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030ef4: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8030ef8: d102 bne.n 8030f00 { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 8030e76: 4b0f ldr r3, [pc, #60] ; (8030eb4 ) - 8030e78: 63fb str r3, [r7, #60] ; 0x3c - 8030e7a: e010 b.n 8030e9e + 8030efa: 4b0f ldr r3, [pc, #60] ; (8030f38 ) + 8030efc: 63fb str r3, [r7, #60] ; 0x3c + 8030efe: e010 b.n 8030f22 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 8030e7c: 4b0b ldr r3, [pc, #44] ; (8030eac ) - 8030e7e: 681b ldr r3, [r3, #0] - 8030e80: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8030e84: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8030e88: d106 bne.n 8030e98 - 8030e8a: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030e8c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030e90: d102 bne.n 8030e98 + 8030f00: 4b0b ldr r3, [pc, #44] ; (8030f30 ) + 8030f02: 681b ldr r3, [r3, #0] + 8030f04: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8030f08: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8030f0c: d106 bne.n 8030f1c + 8030f0e: 6b7b ldr r3, [r7, #52] ; 0x34 + 8030f10: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030f14: d102 bne.n 8030f1c { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8030e92: 4b09 ldr r3, [pc, #36] ; (8030eb8 ) - 8030e94: 63fb str r3, [r7, #60] ; 0x3c - 8030e96: e002 b.n 8030e9e + 8030f16: 4b09 ldr r3, [pc, #36] ; (8030f3c ) + 8030f18: 63fb str r3, [r7, #60] ; 0x3c + 8030f1a: e002 b.n 8030f22 } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8030e98: 2300 movs r3, #0 - 8030e9a: 63fb str r3, [r7, #60] ; 0x3c + 8030f1c: 2300 movs r3, #0 + 8030f1e: 63fb str r3, [r7, #60] ; 0x3c } break; - 8030e9c: e392 b.n 80315c4 - 8030e9e: e391 b.n 80315c4 + 8030f20: e392 b.n 8031648 + 8030f22: e391 b.n 8031648 } case (RCC_SAI23CLKSOURCE_PIN): /* External clock is the clock source for SAI2/3 */ { frequency = EXTERNAL_CLOCK_VALUE; - 8030ea0: 4b06 ldr r3, [pc, #24] ; (8030ebc ) - 8030ea2: 63fb str r3, [r7, #60] ; 0x3c + 8030f24: 4b06 ldr r3, [pc, #24] ; (8030f40 ) + 8030f26: 63fb str r3, [r7, #60] ; 0x3c break; - 8030ea4: e38e b.n 80315c4 + 8030f28: e38e b.n 8031648 } default : { frequency = 0; - 8030ea6: 2300 movs r3, #0 - 8030ea8: 63fb str r3, [r7, #60] ; 0x3c + 8030f2a: 2300 movs r3, #0 + 8030f2c: 63fb str r3, [r7, #60] ; 0x3c break; - 8030eaa: e38b b.n 80315c4 - 8030eac: 58024400 .word 0x58024400 - 8030eb0: 03d09000 .word 0x03d09000 - 8030eb4: 003d0900 .word 0x003d0900 - 8030eb8: 017d7840 .word 0x017d7840 - 8030ebc: 00bb8000 .word 0x00bb8000 + 8030f2e: e38b b.n 8031648 + 8030f30: 58024400 .word 0x58024400 + 8030f34: 03d09000 .word 0x03d09000 + 8030f38: 003d0900 .word 0x003d0900 + 8030f3c: 017d7840 .word 0x017d7840 + 8030f40: 00bb8000 .word 0x00bb8000 } } #endif #if defined(SAI4) else if (PeriphClk == RCC_PERIPHCLK_SAI4A) - 8030ec0: 687b ldr r3, [r7, #4] - 8030ec2: f5b3 6f80 cmp.w r3, #1024 ; 0x400 - 8030ec6: f040 809c bne.w 8031002 + 8030f44: 687b ldr r3, [r7, #4] + 8030f46: f5b3 6f80 cmp.w r3, #1024 ; 0x400 + 8030f4a: f040 809c bne.w 8031086 { saiclocksource= __HAL_RCC_GET_SAI4A_SOURCE(); - 8030eca: 4b9d ldr r3, [pc, #628] ; (8031140 ) - 8030ecc: 6d9b ldr r3, [r3, #88] ; 0x58 - 8030ece: f403 0360 and.w r3, r3, #14680064 ; 0xe00000 - 8030ed2: 633b str r3, [r7, #48] ; 0x30 + 8030f4e: 4b9d ldr r3, [pc, #628] ; (80311c4 ) + 8030f50: 6d9b ldr r3, [r3, #88] ; 0x58 + 8030f52: f403 0360 and.w r3, r3, #14680064 ; 0xe00000 + 8030f56: 633b str r3, [r7, #48] ; 0x30 switch (saiclocksource) - 8030ed4: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ed6: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 8030eda: d054 beq.n 8030f86 - 8030edc: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ede: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 - 8030ee2: f200 808b bhi.w 8030ffc - 8030ee6: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ee8: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 - 8030eec: f000 8083 beq.w 8030ff6 - 8030ef0: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030ef2: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 - 8030ef6: f200 8081 bhi.w 8030ffc - 8030efa: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030efc: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 8030f00: d02f beq.n 8030f62 - 8030f02: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030f04: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 - 8030f08: d878 bhi.n 8030ffc - 8030f0a: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030f0c: 2b00 cmp r3, #0 - 8030f0e: d004 beq.n 8030f1a - 8030f10: 6b3b ldr r3, [r7, #48] ; 0x30 - 8030f12: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 - 8030f16: d012 beq.n 8030f3e - 8030f18: e070 b.n 8030ffc + 8030f58: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f5a: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 8030f5e: d054 beq.n 803100a + 8030f60: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f62: f5b3 0f00 cmp.w r3, #8388608 ; 0x800000 + 8030f66: f200 808b bhi.w 8031080 + 8030f6a: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f6c: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 + 8030f70: f000 8083 beq.w 803107a + 8030f74: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f76: f5b3 0fc0 cmp.w r3, #6291456 ; 0x600000 + 8030f7a: f200 8081 bhi.w 8031080 + 8030f7e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f80: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 8030f84: d02f beq.n 8030fe6 + 8030f86: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f88: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 + 8030f8c: d878 bhi.n 8031080 + 8030f8e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f90: 2b00 cmp r3, #0 + 8030f92: d004 beq.n 8030f9e + 8030f94: 6b3b ldr r3, [r7, #48] ; 0x30 + 8030f96: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000 + 8030f9a: d012 beq.n 8030fc2 + 8030f9c: e070 b.n 8031080 { case RCC_SAI4ACLKSOURCE_PLL: /* PLL1 is the clock source for SAI4A */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 8030f1a: 4b89 ldr r3, [pc, #548] ; (8031140 ) - 8030f1c: 681b ldr r3, [r3, #0] - 8030f1e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8030f22: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8030f26: d107 bne.n 8030f38 + 8030f9e: 4b89 ldr r3, [pc, #548] ; (80311c4 ) + 8030fa0: 681b ldr r3, [r3, #0] + 8030fa2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8030fa6: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8030faa: d107 bne.n 8030fbc { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 8030f28: f107 0324 add.w r3, r7, #36 ; 0x24 - 8030f2c: 4618 mov r0, r3 - 8030f2e: f000 fe15 bl 8031b5c + 8030fac: f107 0324 add.w r3, r7, #36 ; 0x24 + 8030fb0: 4618 mov r0, r3 + 8030fb2: f000 fe15 bl 8031be0 frequency = pll1_clocks.PLL1_Q_Frequency; - 8030f32: 6abb ldr r3, [r7, #40] ; 0x28 - 8030f34: 63fb str r3, [r7, #60] ; 0x3c + 8030fb6: 6abb ldr r3, [r7, #40] ; 0x28 + 8030fb8: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030f36: e345 b.n 80315c4 + 8030fba: e345 b.n 8031648 frequency = 0; - 8030f38: 2300 movs r3, #0 - 8030f3a: 63fb str r3, [r7, #60] ; 0x3c + 8030fbc: 2300 movs r3, #0 + 8030fbe: 63fb str r3, [r7, #60] ; 0x3c break; - 8030f3c: e342 b.n 80315c4 + 8030fc0: e342 b.n 8031648 } case RCC_SAI4ACLKSOURCE_PLL2: /* PLLI2 is the clock source for SAI4A */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8030f3e: 4b80 ldr r3, [pc, #512] ; (8031140 ) - 8030f40: 681b ldr r3, [r3, #0] - 8030f42: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8030f46: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 8030f4a: d107 bne.n 8030f5c + 8030fc2: 4b80 ldr r3, [pc, #512] ; (80311c4 ) + 8030fc4: 681b ldr r3, [r3, #0] + 8030fc6: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8030fca: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8030fce: d107 bne.n 8030fe0 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8030f4c: f107 0318 add.w r3, r7, #24 - 8030f50: 4618 mov r0, r3 - 8030f52: f000 fb5b bl 803160c + 8030fd0: f107 0318 add.w r3, r7, #24 + 8030fd4: 4618 mov r0, r3 + 8030fd6: f000 fb5b bl 8031690 frequency = pll2_clocks.PLL2_P_Frequency; - 8030f56: 69bb ldr r3, [r7, #24] - 8030f58: 63fb str r3, [r7, #60] ; 0x3c + 8030fda: 69bb ldr r3, [r7, #24] + 8030fdc: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030f5a: e333 b.n 80315c4 + 8030fde: e333 b.n 8031648 frequency = 0; - 8030f5c: 2300 movs r3, #0 - 8030f5e: 63fb str r3, [r7, #60] ; 0x3c + 8030fe0: 2300 movs r3, #0 + 8030fe2: 63fb str r3, [r7, #60] ; 0x3c break; - 8030f60: e330 b.n 80315c4 + 8030fe4: e330 b.n 8031648 } case RCC_SAI4ACLKSOURCE_PLL3: /* PLLI3 is the clock source for SAI4A */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 8030f62: 4b77 ldr r3, [pc, #476] ; (8031140 ) - 8030f64: 681b ldr r3, [r3, #0] - 8030f66: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8030f6a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030f6e: d107 bne.n 8030f80 + 8030fe6: 4b77 ldr r3, [pc, #476] ; (80311c4 ) + 8030fe8: 681b ldr r3, [r3, #0] + 8030fea: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8030fee: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8030ff2: d107 bne.n 8031004 { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8030f70: f107 030c add.w r3, r7, #12 - 8030f74: 4618 mov r0, r3 - 8030f76: f000 fc9d bl 80318b4 + 8030ff4: f107 030c add.w r3, r7, #12 + 8030ff8: 4618 mov r0, r3 + 8030ffa: f000 fc9d bl 8031938 frequency = pll3_clocks.PLL3_P_Frequency; - 8030f7a: 68fb ldr r3, [r7, #12] - 8030f7c: 63fb str r3, [r7, #60] ; 0x3c + 8030ffe: 68fb ldr r3, [r7, #12] + 8031000: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8030f7e: e321 b.n 80315c4 + 8031002: e321 b.n 8031648 frequency = 0; - 8030f80: 2300 movs r3, #0 - 8030f82: 63fb str r3, [r7, #60] ; 0x3c + 8031004: 2300 movs r3, #0 + 8031006: 63fb str r3, [r7, #60] ; 0x3c break; - 8030f84: e31e b.n 80315c4 + 8031008: e31e b.n 8031648 } case RCC_SAI4ACLKSOURCE_CLKP: /* CKPER is the clock source for SAI4A*/ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 8030f86: 4b6e ldr r3, [pc, #440] ; (8031140 ) - 8030f88: 6cdb ldr r3, [r3, #76] ; 0x4c - 8030f8a: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 8030f8e: 637b str r3, [r7, #52] ; 0x34 + 803100a: 4b6e ldr r3, [pc, #440] ; (80311c4 ) + 803100c: 6cdb ldr r3, [r3, #76] ; 0x4c + 803100e: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 8031012: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 8030f90: 4b6b ldr r3, [pc, #428] ; (8031140 ) - 8030f92: 681b ldr r3, [r3, #0] - 8030f94: f003 0304 and.w r3, r3, #4 - 8030f98: 2b04 cmp r3, #4 - 8030f9a: d10c bne.n 8030fb6 - 8030f9c: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030f9e: 2b00 cmp r3, #0 - 8030fa0: d109 bne.n 8030fb6 + 8031014: 4b6b ldr r3, [pc, #428] ; (80311c4 ) + 8031016: 681b ldr r3, [r3, #0] + 8031018: f003 0304 and.w r3, r3, #4 + 803101c: 2b04 cmp r3, #4 + 803101e: d10c bne.n 803103a + 8031020: 6b7b ldr r3, [r7, #52] ; 0x34 + 8031022: 2b00 cmp r3, #0 + 8031024: d109 bne.n 803103a { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8030fa2: 4b67 ldr r3, [pc, #412] ; (8031140 ) - 8030fa4: 681b ldr r3, [r3, #0] - 8030fa6: 08db lsrs r3, r3, #3 - 8030fa8: f003 0303 and.w r3, r3, #3 - 8030fac: 4a65 ldr r2, [pc, #404] ; (8031144 ) - 8030fae: fa22 f303 lsr.w r3, r2, r3 - 8030fb2: 63fb str r3, [r7, #60] ; 0x3c - 8030fb4: e01e b.n 8030ff4 + 8031026: 4b67 ldr r3, [pc, #412] ; (80311c4 ) + 8031028: 681b ldr r3, [r3, #0] + 803102a: 08db lsrs r3, r3, #3 + 803102c: f003 0303 and.w r3, r3, #3 + 8031030: 4a65 ldr r2, [pc, #404] ; (80311c8 ) + 8031032: fa22 f303 lsr.w r3, r2, r3 + 8031036: 63fb str r3, [r7, #60] ; 0x3c + 8031038: e01e b.n 8031078 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8030fb6: 4b62 ldr r3, [pc, #392] ; (8031140 ) - 8030fb8: 681b ldr r3, [r3, #0] - 8030fba: f403 7380 and.w r3, r3, #256 ; 0x100 - 8030fbe: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8030fc2: d106 bne.n 8030fd2 - 8030fc4: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030fc6: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8030fca: d102 bne.n 8030fd2 + 803103a: 4b62 ldr r3, [pc, #392] ; (80311c4 ) + 803103c: 681b ldr r3, [r3, #0] + 803103e: f403 7380 and.w r3, r3, #256 ; 0x100 + 8031042: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8031046: d106 bne.n 8031056 + 8031048: 6b7b ldr r3, [r7, #52] ; 0x34 + 803104a: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 803104e: d102 bne.n 8031056 { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 8030fcc: 4b5e ldr r3, [pc, #376] ; (8031148 ) - 8030fce: 63fb str r3, [r7, #60] ; 0x3c - 8030fd0: e010 b.n 8030ff4 + 8031050: 4b5e ldr r3, [pc, #376] ; (80311cc ) + 8031052: 63fb str r3, [r7, #60] ; 0x3c + 8031054: e010 b.n 8031078 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 8030fd2: 4b5b ldr r3, [pc, #364] ; (8031140 ) - 8030fd4: 681b ldr r3, [r3, #0] - 8030fd6: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8030fda: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8030fde: d106 bne.n 8030fee - 8030fe0: 6b7b ldr r3, [r7, #52] ; 0x34 - 8030fe2: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8030fe6: d102 bne.n 8030fee + 8031056: 4b5b ldr r3, [pc, #364] ; (80311c4 ) + 8031058: 681b ldr r3, [r3, #0] + 803105a: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 803105e: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8031062: d106 bne.n 8031072 + 8031064: 6b7b ldr r3, [r7, #52] ; 0x34 + 8031066: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803106a: d102 bne.n 8031072 { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8030fe8: 4b58 ldr r3, [pc, #352] ; (803114c ) - 8030fea: 63fb str r3, [r7, #60] ; 0x3c - 8030fec: e002 b.n 8030ff4 + 803106c: 4b58 ldr r3, [pc, #352] ; (80311d0 ) + 803106e: 63fb str r3, [r7, #60] ; 0x3c + 8031070: e002 b.n 8031078 } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8030fee: 2300 movs r3, #0 - 8030ff0: 63fb str r3, [r7, #60] ; 0x3c + 8031072: 2300 movs r3, #0 + 8031074: 63fb str r3, [r7, #60] ; 0x3c } break; - 8030ff2: e2e7 b.n 80315c4 - 8030ff4: e2e6 b.n 80315c4 + 8031076: e2e7 b.n 8031648 + 8031078: e2e6 b.n 8031648 } case RCC_SAI4ACLKSOURCE_PIN: /* External clock is the clock source for SAI4A */ { frequency = EXTERNAL_CLOCK_VALUE; - 8030ff6: 4b56 ldr r3, [pc, #344] ; (8031150 ) - 8030ff8: 63fb str r3, [r7, #60] ; 0x3c + 803107a: 4b56 ldr r3, [pc, #344] ; (80311d4 ) + 803107c: 63fb str r3, [r7, #60] ; 0x3c break; - 8030ffa: e2e3 b.n 80315c4 + 803107e: e2e3 b.n 8031648 } default : { frequency = 0; - 8030ffc: 2300 movs r3, #0 - 8030ffe: 63fb str r3, [r7, #60] ; 0x3c + 8031080: 2300 movs r3, #0 + 8031082: 63fb str r3, [r7, #60] ; 0x3c break; - 8031000: e2e0 b.n 80315c4 + 8031084: e2e0 b.n 8031648 } } } else if (PeriphClk == RCC_PERIPHCLK_SAI4B) - 8031002: 687b ldr r3, [r7, #4] - 8031004: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 8031008: f040 80a7 bne.w 803115a + 8031086: 687b ldr r3, [r7, #4] + 8031088: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 803108c: f040 80a7 bne.w 80311de { saiclocksource= __HAL_RCC_GET_SAI4B_SOURCE(); - 803100c: 4b4c ldr r3, [pc, #304] ; (8031140 ) - 803100e: 6d9b ldr r3, [r3, #88] ; 0x58 - 8031010: f003 63e0 and.w r3, r3, #117440512 ; 0x7000000 - 8031014: 633b str r3, [r7, #48] ; 0x30 + 8031090: 4b4c ldr r3, [pc, #304] ; (80311c4 ) + 8031092: 6d9b ldr r3, [r3, #88] ; 0x58 + 8031094: f003 63e0 and.w r3, r3, #117440512 ; 0x7000000 + 8031098: 633b str r3, [r7, #48] ; 0x30 switch (saiclocksource) - 8031016: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031018: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 - 803101c: d055 beq.n 80310ca - 803101e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031020: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 - 8031024: f200 8096 bhi.w 8031154 - 8031028: 6b3b ldr r3, [r7, #48] ; 0x30 - 803102a: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 - 803102e: f000 8084 beq.w 803113a - 8031032: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031034: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 - 8031038: f200 808c bhi.w 8031154 - 803103c: 6b3b ldr r3, [r7, #48] ; 0x30 - 803103e: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 8031042: d030 beq.n 80310a6 - 8031044: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031046: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 803104a: f200 8083 bhi.w 8031154 - 803104e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031050: 2b00 cmp r3, #0 - 8031052: d004 beq.n 803105e - 8031054: 6b3b ldr r3, [r7, #48] ; 0x30 - 8031056: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 - 803105a: d012 beq.n 8031082 - 803105c: e07a b.n 8031154 + 803109a: 6b3b ldr r3, [r7, #48] ; 0x30 + 803109c: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 + 80310a0: d055 beq.n 803114e + 80310a2: 6b3b ldr r3, [r7, #48] ; 0x30 + 80310a4: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000 + 80310a8: f200 8096 bhi.w 80311d8 + 80310ac: 6b3b ldr r3, [r7, #48] ; 0x30 + 80310ae: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 + 80310b2: f000 8084 beq.w 80311be + 80310b6: 6b3b ldr r3, [r7, #48] ; 0x30 + 80310b8: f1b3 7f40 cmp.w r3, #50331648 ; 0x3000000 + 80310bc: f200 808c bhi.w 80311d8 + 80310c0: 6b3b ldr r3, [r7, #48] ; 0x30 + 80310c2: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 80310c6: d030 beq.n 803112a + 80310c8: 6b3b ldr r3, [r7, #48] ; 0x30 + 80310ca: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 80310ce: f200 8083 bhi.w 80311d8 + 80310d2: 6b3b ldr r3, [r7, #48] ; 0x30 + 80310d4: 2b00 cmp r3, #0 + 80310d6: d004 beq.n 80310e2 + 80310d8: 6b3b ldr r3, [r7, #48] ; 0x30 + 80310da: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 + 80310de: d012 beq.n 8031106 + 80310e0: e07a b.n 80311d8 { case RCC_SAI4BCLKSOURCE_PLL: /* PLL1 is the clock source for SAI4B */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 803105e: 4b38 ldr r3, [pc, #224] ; (8031140 ) - 8031060: 681b ldr r3, [r3, #0] - 8031062: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 8031066: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 803106a: d107 bne.n 803107c + 80310e2: 4b38 ldr r3, [pc, #224] ; (80311c4 ) + 80310e4: 681b ldr r3, [r3, #0] + 80310e6: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80310ea: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 80310ee: d107 bne.n 8031100 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 803106c: f107 0324 add.w r3, r7, #36 ; 0x24 - 8031070: 4618 mov r0, r3 - 8031072: f000 fd73 bl 8031b5c + 80310f0: f107 0324 add.w r3, r7, #36 ; 0x24 + 80310f4: 4618 mov r0, r3 + 80310f6: f000 fd73 bl 8031be0 frequency = pll1_clocks.PLL1_Q_Frequency; - 8031076: 6abb ldr r3, [r7, #40] ; 0x28 - 8031078: 63fb str r3, [r7, #60] ; 0x3c + 80310fa: 6abb ldr r3, [r7, #40] ; 0x28 + 80310fc: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803107a: e2a3 b.n 80315c4 + 80310fe: e2a3 b.n 8031648 frequency = 0; - 803107c: 2300 movs r3, #0 - 803107e: 63fb str r3, [r7, #60] ; 0x3c + 8031100: 2300 movs r3, #0 + 8031102: 63fb str r3, [r7, #60] ; 0x3c break; - 8031080: e2a0 b.n 80315c4 + 8031104: e2a0 b.n 8031648 } case RCC_SAI4BCLKSOURCE_PLL2: /* PLLI2 is the clock source for SAI4B */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8031082: 4b2f ldr r3, [pc, #188] ; (8031140 ) - 8031084: 681b ldr r3, [r3, #0] - 8031086: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 803108a: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 803108e: d107 bne.n 80310a0 + 8031106: 4b2f ldr r3, [pc, #188] ; (80311c4 ) + 8031108: 681b ldr r3, [r3, #0] + 803110a: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 803110e: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8031112: d107 bne.n 8031124 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8031090: f107 0318 add.w r3, r7, #24 - 8031094: 4618 mov r0, r3 - 8031096: f000 fab9 bl 803160c + 8031114: f107 0318 add.w r3, r7, #24 + 8031118: 4618 mov r0, r3 + 803111a: f000 fab9 bl 8031690 frequency = pll2_clocks.PLL2_P_Frequency; - 803109a: 69bb ldr r3, [r7, #24] - 803109c: 63fb str r3, [r7, #60] ; 0x3c + 803111e: 69bb ldr r3, [r7, #24] + 8031120: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803109e: e291 b.n 80315c4 + 8031122: e291 b.n 8031648 frequency = 0; - 80310a0: 2300 movs r3, #0 - 80310a2: 63fb str r3, [r7, #60] ; 0x3c + 8031124: 2300 movs r3, #0 + 8031126: 63fb str r3, [r7, #60] ; 0x3c break; - 80310a4: e28e b.n 80315c4 + 8031128: e28e b.n 8031648 } case RCC_SAI4BCLKSOURCE_PLL3: /* PLLI3 is the clock source for SAI4B */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 80310a6: 4b26 ldr r3, [pc, #152] ; (8031140 ) - 80310a8: 681b ldr r3, [r3, #0] - 80310aa: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 80310ae: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80310b2: d107 bne.n 80310c4 + 803112a: 4b26 ldr r3, [pc, #152] ; (80311c4 ) + 803112c: 681b ldr r3, [r3, #0] + 803112e: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8031132: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8031136: d107 bne.n 8031148 { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 80310b4: f107 030c add.w r3, r7, #12 - 80310b8: 4618 mov r0, r3 - 80310ba: f000 fbfb bl 80318b4 + 8031138: f107 030c add.w r3, r7, #12 + 803113c: 4618 mov r0, r3 + 803113e: f000 fbfb bl 8031938 frequency = pll3_clocks.PLL3_P_Frequency; - 80310be: 68fb ldr r3, [r7, #12] - 80310c0: 63fb str r3, [r7, #60] ; 0x3c + 8031142: 68fb ldr r3, [r7, #12] + 8031144: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80310c2: e27f b.n 80315c4 + 8031146: e27f b.n 8031648 frequency = 0; - 80310c4: 2300 movs r3, #0 - 80310c6: 63fb str r3, [r7, #60] ; 0x3c + 8031148: 2300 movs r3, #0 + 803114a: 63fb str r3, [r7, #60] ; 0x3c break; - 80310c8: e27c b.n 80315c4 + 803114c: e27c b.n 8031648 } case RCC_SAI4BCLKSOURCE_CLKP: /* CKPER is the clock source for SAI4B*/ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 80310ca: 4b1d ldr r3, [pc, #116] ; (8031140 ) - 80310cc: 6cdb ldr r3, [r3, #76] ; 0x4c - 80310ce: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 80310d2: 637b str r3, [r7, #52] ; 0x34 + 803114e: 4b1d ldr r3, [pc, #116] ; (80311c4 ) + 8031150: 6cdb ldr r3, [r3, #76] ; 0x4c + 8031152: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 8031156: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 80310d4: 4b1a ldr r3, [pc, #104] ; (8031140 ) - 80310d6: 681b ldr r3, [r3, #0] - 80310d8: f003 0304 and.w r3, r3, #4 - 80310dc: 2b04 cmp r3, #4 - 80310de: d10c bne.n 80310fa - 80310e0: 6b7b ldr r3, [r7, #52] ; 0x34 - 80310e2: 2b00 cmp r3, #0 - 80310e4: d109 bne.n 80310fa + 8031158: 4b1a ldr r3, [pc, #104] ; (80311c4 ) + 803115a: 681b ldr r3, [r3, #0] + 803115c: f003 0304 and.w r3, r3, #4 + 8031160: 2b04 cmp r3, #4 + 8031162: d10c bne.n 803117e + 8031164: 6b7b ldr r3, [r7, #52] ; 0x34 + 8031166: 2b00 cmp r3, #0 + 8031168: d109 bne.n 803117e { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 80310e6: 4b16 ldr r3, [pc, #88] ; (8031140 ) - 80310e8: 681b ldr r3, [r3, #0] - 80310ea: 08db lsrs r3, r3, #3 - 80310ec: f003 0303 and.w r3, r3, #3 - 80310f0: 4a14 ldr r2, [pc, #80] ; (8031144 ) - 80310f2: fa22 f303 lsr.w r3, r2, r3 - 80310f6: 63fb str r3, [r7, #60] ; 0x3c - 80310f8: e01e b.n 8031138 + 803116a: 4b16 ldr r3, [pc, #88] ; (80311c4 ) + 803116c: 681b ldr r3, [r3, #0] + 803116e: 08db lsrs r3, r3, #3 + 8031170: f003 0303 and.w r3, r3, #3 + 8031174: 4a14 ldr r2, [pc, #80] ; (80311c8 ) + 8031176: fa22 f303 lsr.w r3, r2, r3 + 803117a: 63fb str r3, [r7, #60] ; 0x3c + 803117c: e01e b.n 80311bc } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 80310fa: 4b11 ldr r3, [pc, #68] ; (8031140 ) - 80310fc: 681b ldr r3, [r3, #0] - 80310fe: f403 7380 and.w r3, r3, #256 ; 0x100 - 8031102: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8031106: d106 bne.n 8031116 - 8031108: 6b7b ldr r3, [r7, #52] ; 0x34 - 803110a: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 803110e: d102 bne.n 8031116 + 803117e: 4b11 ldr r3, [pc, #68] ; (80311c4 ) + 8031180: 681b ldr r3, [r3, #0] + 8031182: f403 7380 and.w r3, r3, #256 ; 0x100 + 8031186: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 803118a: d106 bne.n 803119a + 803118c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803118e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8031192: d102 bne.n 803119a { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 8031110: 4b0d ldr r3, [pc, #52] ; (8031148 ) - 8031112: 63fb str r3, [r7, #60] ; 0x3c - 8031114: e010 b.n 8031138 + 8031194: 4b0d ldr r3, [pc, #52] ; (80311cc ) + 8031196: 63fb str r3, [r7, #60] ; 0x3c + 8031198: e010 b.n 80311bc } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 8031116: 4b0a ldr r3, [pc, #40] ; (8031140 ) - 8031118: 681b ldr r3, [r3, #0] - 803111a: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 803111e: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8031122: d106 bne.n 8031132 - 8031124: 6b7b ldr r3, [r7, #52] ; 0x34 - 8031126: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 803112a: d102 bne.n 8031132 + 803119a: 4b0a ldr r3, [pc, #40] ; (80311c4 ) + 803119c: 681b ldr r3, [r3, #0] + 803119e: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 80311a2: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80311a6: d106 bne.n 80311b6 + 80311a8: 6b7b ldr r3, [r7, #52] ; 0x34 + 80311aa: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80311ae: d102 bne.n 80311b6 { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 803112c: 4b07 ldr r3, [pc, #28] ; (803114c ) - 803112e: 63fb str r3, [r7, #60] ; 0x3c - 8031130: e002 b.n 8031138 + 80311b0: 4b07 ldr r3, [pc, #28] ; (80311d0 ) + 80311b2: 63fb str r3, [r7, #60] ; 0x3c + 80311b4: e002 b.n 80311bc } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8031132: 2300 movs r3, #0 - 8031134: 63fb str r3, [r7, #60] ; 0x3c + 80311b6: 2300 movs r3, #0 + 80311b8: 63fb str r3, [r7, #60] ; 0x3c } break; - 8031136: e245 b.n 80315c4 - 8031138: e244 b.n 80315c4 + 80311ba: e245 b.n 8031648 + 80311bc: e244 b.n 8031648 } case RCC_SAI4BCLKSOURCE_PIN: /* External clock is the clock source for SAI4B */ { frequency = EXTERNAL_CLOCK_VALUE; - 803113a: 4b05 ldr r3, [pc, #20] ; (8031150 ) - 803113c: 63fb str r3, [r7, #60] ; 0x3c + 80311be: 4b05 ldr r3, [pc, #20] ; (80311d4 ) + 80311c0: 63fb str r3, [r7, #60] ; 0x3c break; - 803113e: e241 b.n 80315c4 - 8031140: 58024400 .word 0x58024400 - 8031144: 03d09000 .word 0x03d09000 - 8031148: 003d0900 .word 0x003d0900 - 803114c: 017d7840 .word 0x017d7840 - 8031150: 00bb8000 .word 0x00bb8000 + 80311c2: e241 b.n 8031648 + 80311c4: 58024400 .word 0x58024400 + 80311c8: 03d09000 .word 0x03d09000 + 80311cc: 003d0900 .word 0x003d0900 + 80311d0: 017d7840 .word 0x017d7840 + 80311d4: 00bb8000 .word 0x00bb8000 } default : { frequency = 0; - 8031154: 2300 movs r3, #0 - 8031156: 63fb str r3, [r7, #60] ; 0x3c + 80311d8: 2300 movs r3, #0 + 80311da: 63fb str r3, [r7, #60] ; 0x3c break; - 8031158: e234 b.n 80315c4 + 80311dc: e234 b.n 8031648 } } } #endif /*SAI4*/ else if (PeriphClk == RCC_PERIPHCLK_SPI123) - 803115a: 687b ldr r3, [r7, #4] - 803115c: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8031160: f040 809c bne.w 803129c + 80311de: 687b ldr r3, [r7, #4] + 80311e0: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80311e4: f040 809c bne.w 8031320 { /* Get SPI1/2/3 clock source */ srcclk= __HAL_RCC_GET_SPI123_SOURCE(); - 8031164: 4b9b ldr r3, [pc, #620] ; (80313d4 ) - 8031166: 6d1b ldr r3, [r3, #80] ; 0x50 - 8031168: f403 43e0 and.w r3, r3, #28672 ; 0x7000 - 803116c: 63bb str r3, [r7, #56] ; 0x38 + 80311e8: 4b9b ldr r3, [pc, #620] ; (8031458 ) + 80311ea: 6d1b ldr r3, [r3, #80] ; 0x50 + 80311ec: f403 43e0 and.w r3, r3, #28672 ; 0x7000 + 80311f0: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 803116e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031170: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8031174: d054 beq.n 8031220 - 8031176: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031178: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 803117c: f200 808b bhi.w 8031296 - 8031180: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031182: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 8031186: f000 8083 beq.w 8031290 - 803118a: 6bbb ldr r3, [r7, #56] ; 0x38 - 803118c: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 - 8031190: f200 8081 bhi.w 8031296 - 8031194: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031196: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 803119a: d02f beq.n 80311fc - 803119c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803119e: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 80311a2: d878 bhi.n 8031296 - 80311a4: 6bbb ldr r3, [r7, #56] ; 0x38 - 80311a6: 2b00 cmp r3, #0 - 80311a8: d004 beq.n 80311b4 - 80311aa: 6bbb ldr r3, [r7, #56] ; 0x38 - 80311ac: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80311b0: d012 beq.n 80311d8 - 80311b2: e070 b.n 8031296 + 80311f2: 6bbb ldr r3, [r7, #56] ; 0x38 + 80311f4: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 80311f8: d054 beq.n 80312a4 + 80311fa: 6bbb ldr r3, [r7, #56] ; 0x38 + 80311fc: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 8031200: f200 808b bhi.w 803131a + 8031204: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031206: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 803120a: f000 8083 beq.w 8031314 + 803120e: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031210: f5b3 5f40 cmp.w r3, #12288 ; 0x3000 + 8031214: f200 8081 bhi.w 803131a + 8031218: 6bbb ldr r3, [r7, #56] ; 0x38 + 803121a: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 803121e: d02f beq.n 8031280 + 8031220: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031222: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 8031226: d878 bhi.n 803131a + 8031228: 6bbb ldr r3, [r7, #56] ; 0x38 + 803122a: 2b00 cmp r3, #0 + 803122c: d004 beq.n 8031238 + 803122e: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031230: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8031234: d012 beq.n 803125c + 8031236: e070 b.n 803131a { case RCC_SPI123CLKSOURCE_PLL: /* PLL1 is the clock source for SPI123 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 80311b4: 4b87 ldr r3, [pc, #540] ; (80313d4 ) - 80311b6: 681b ldr r3, [r3, #0] - 80311b8: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80311bc: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 80311c0: d107 bne.n 80311d2 + 8031238: 4b87 ldr r3, [pc, #540] ; (8031458 ) + 803123a: 681b ldr r3, [r3, #0] + 803123c: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 8031240: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8031244: d107 bne.n 8031256 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 80311c2: f107 0324 add.w r3, r7, #36 ; 0x24 - 80311c6: 4618 mov r0, r3 - 80311c8: f000 fcc8 bl 8031b5c + 8031246: f107 0324 add.w r3, r7, #36 ; 0x24 + 803124a: 4618 mov r0, r3 + 803124c: f000 fcc8 bl 8031be0 frequency = pll1_clocks.PLL1_Q_Frequency; - 80311cc: 6abb ldr r3, [r7, #40] ; 0x28 - 80311ce: 63fb str r3, [r7, #60] ; 0x3c + 8031250: 6abb ldr r3, [r7, #40] ; 0x28 + 8031252: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80311d0: e1f8 b.n 80315c4 + 8031254: e1f8 b.n 8031648 frequency = 0; - 80311d2: 2300 movs r3, #0 - 80311d4: 63fb str r3, [r7, #60] ; 0x3c + 8031256: 2300 movs r3, #0 + 8031258: 63fb str r3, [r7, #60] ; 0x3c break; - 80311d6: e1f5 b.n 80315c4 + 803125a: e1f5 b.n 8031648 } case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is the clock source for SPI123 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 80311d8: 4b7e ldr r3, [pc, #504] ; (80313d4 ) - 80311da: 681b ldr r3, [r3, #0] - 80311dc: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 80311e0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 80311e4: d107 bne.n 80311f6 + 803125c: 4b7e ldr r3, [pc, #504] ; (8031458 ) + 803125e: 681b ldr r3, [r3, #0] + 8031260: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8031264: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8031268: d107 bne.n 803127a { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 80311e6: f107 0318 add.w r3, r7, #24 - 80311ea: 4618 mov r0, r3 - 80311ec: f000 fa0e bl 803160c + 803126a: f107 0318 add.w r3, r7, #24 + 803126e: 4618 mov r0, r3 + 8031270: f000 fa0e bl 8031690 frequency = pll2_clocks.PLL2_P_Frequency; - 80311f0: 69bb ldr r3, [r7, #24] - 80311f2: 63fb str r3, [r7, #60] ; 0x3c + 8031274: 69bb ldr r3, [r7, #24] + 8031276: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80311f4: e1e6 b.n 80315c4 + 8031278: e1e6 b.n 8031648 frequency = 0; - 80311f6: 2300 movs r3, #0 - 80311f8: 63fb str r3, [r7, #60] ; 0x3c + 803127a: 2300 movs r3, #0 + 803127c: 63fb str r3, [r7, #60] ; 0x3c break; - 80311fa: e1e3 b.n 80315c4 + 803127e: e1e3 b.n 8031648 } case RCC_SPI123CLKSOURCE_PLL3: /* PLL3 is the clock source for SPI123 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 80311fc: 4b75 ldr r3, [pc, #468] ; (80313d4 ) - 80311fe: 681b ldr r3, [r3, #0] - 8031200: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8031204: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031208: d107 bne.n 803121a + 8031280: 4b75 ldr r3, [pc, #468] ; (8031458 ) + 8031282: 681b ldr r3, [r3, #0] + 8031284: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8031288: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803128c: d107 bne.n 803129e { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 803120a: f107 030c add.w r3, r7, #12 - 803120e: 4618 mov r0, r3 - 8031210: f000 fb50 bl 80318b4 + 803128e: f107 030c add.w r3, r7, #12 + 8031292: 4618 mov r0, r3 + 8031294: f000 fb50 bl 8031938 frequency = pll3_clocks.PLL3_P_Frequency; - 8031214: 68fb ldr r3, [r7, #12] - 8031216: 63fb str r3, [r7, #60] ; 0x3c + 8031298: 68fb ldr r3, [r7, #12] + 803129a: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8031218: e1d4 b.n 80315c4 + 803129c: e1d4 b.n 8031648 frequency = 0; - 803121a: 2300 movs r3, #0 - 803121c: 63fb str r3, [r7, #60] ; 0x3c + 803129e: 2300 movs r3, #0 + 80312a0: 63fb str r3, [r7, #60] ; 0x3c break; - 803121e: e1d1 b.n 80315c4 + 80312a2: e1d1 b.n 8031648 } case RCC_SPI123CLKSOURCE_CLKP: /* CKPER is the clock source for SPI123 */ { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 8031220: 4b6c ldr r3, [pc, #432] ; (80313d4 ) - 8031222: 6cdb ldr r3, [r3, #76] ; 0x4c - 8031224: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 8031228: 637b str r3, [r7, #52] ; 0x34 + 80312a4: 4b6c ldr r3, [pc, #432] ; (8031458 ) + 80312a6: 6cdb ldr r3, [r3, #76] ; 0x4c + 80312a8: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 80312ac: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 803122a: 4b6a ldr r3, [pc, #424] ; (80313d4 ) - 803122c: 681b ldr r3, [r3, #0] - 803122e: f003 0304 and.w r3, r3, #4 - 8031232: 2b04 cmp r3, #4 - 8031234: d10c bne.n 8031250 - 8031236: 6b7b ldr r3, [r7, #52] ; 0x34 - 8031238: 2b00 cmp r3, #0 - 803123a: d109 bne.n 8031250 + 80312ae: 4b6a ldr r3, [pc, #424] ; (8031458 ) + 80312b0: 681b ldr r3, [r3, #0] + 80312b2: f003 0304 and.w r3, r3, #4 + 80312b6: 2b04 cmp r3, #4 + 80312b8: d10c bne.n 80312d4 + 80312ba: 6b7b ldr r3, [r7, #52] ; 0x34 + 80312bc: 2b00 cmp r3, #0 + 80312be: d109 bne.n 80312d4 { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 803123c: 4b65 ldr r3, [pc, #404] ; (80313d4 ) - 803123e: 681b ldr r3, [r3, #0] - 8031240: 08db lsrs r3, r3, #3 - 8031242: f003 0303 and.w r3, r3, #3 - 8031246: 4a64 ldr r2, [pc, #400] ; (80313d8 ) - 8031248: fa22 f303 lsr.w r3, r2, r3 - 803124c: 63fb str r3, [r7, #60] ; 0x3c - 803124e: e01e b.n 803128e + 80312c0: 4b65 ldr r3, [pc, #404] ; (8031458 ) + 80312c2: 681b ldr r3, [r3, #0] + 80312c4: 08db lsrs r3, r3, #3 + 80312c6: f003 0303 and.w r3, r3, #3 + 80312ca: 4a64 ldr r2, [pc, #400] ; (803145c ) + 80312cc: fa22 f303 lsr.w r3, r2, r3 + 80312d0: 63fb str r3, [r7, #60] ; 0x3c + 80312d2: e01e b.n 8031312 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8031250: 4b60 ldr r3, [pc, #384] ; (80313d4 ) - 8031252: 681b ldr r3, [r3, #0] - 8031254: f403 7380 and.w r3, r3, #256 ; 0x100 - 8031258: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803125c: d106 bne.n 803126c - 803125e: 6b7b ldr r3, [r7, #52] ; 0x34 - 8031260: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8031264: d102 bne.n 803126c + 80312d4: 4b60 ldr r3, [pc, #384] ; (8031458 ) + 80312d6: 681b ldr r3, [r3, #0] + 80312d8: f403 7380 and.w r3, r3, #256 ; 0x100 + 80312dc: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80312e0: d106 bne.n 80312f0 + 80312e2: 6b7b ldr r3, [r7, #52] ; 0x34 + 80312e4: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 80312e8: d102 bne.n 80312f0 { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 8031266: 4b5d ldr r3, [pc, #372] ; (80313dc ) - 8031268: 63fb str r3, [r7, #60] ; 0x3c - 803126a: e010 b.n 803128e + 80312ea: 4b5d ldr r3, [pc, #372] ; (8031460 ) + 80312ec: 63fb str r3, [r7, #60] ; 0x3c + 80312ee: e010 b.n 8031312 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 803126c: 4b59 ldr r3, [pc, #356] ; (80313d4 ) - 803126e: 681b ldr r3, [r3, #0] - 8031270: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8031274: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8031278: d106 bne.n 8031288 - 803127a: 6b7b ldr r3, [r7, #52] ; 0x34 - 803127c: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031280: d102 bne.n 8031288 + 80312f0: 4b59 ldr r3, [pc, #356] ; (8031458 ) + 80312f2: 681b ldr r3, [r3, #0] + 80312f4: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 80312f8: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80312fc: d106 bne.n 803130c + 80312fe: 6b7b ldr r3, [r7, #52] ; 0x34 + 8031300: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8031304: d102 bne.n 803130c { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8031282: 4b57 ldr r3, [pc, #348] ; (80313e0 ) - 8031284: 63fb str r3, [r7, #60] ; 0x3c - 8031286: e002 b.n 803128e + 8031306: 4b57 ldr r3, [pc, #348] ; (8031464 ) + 8031308: 63fb str r3, [r7, #60] ; 0x3c + 803130a: e002 b.n 8031312 } else { /* In Case the CKPER is disabled*/ frequency = 0; - 8031288: 2300 movs r3, #0 - 803128a: 63fb str r3, [r7, #60] ; 0x3c + 803130c: 2300 movs r3, #0 + 803130e: 63fb str r3, [r7, #60] ; 0x3c } break; - 803128c: e19a b.n 80315c4 - 803128e: e199 b.n 80315c4 + 8031310: e19a b.n 8031648 + 8031312: e199 b.n 8031648 } case (RCC_SPI123CLKSOURCE_PIN): /* External clock is the clock source for I2S */ { frequency = EXTERNAL_CLOCK_VALUE; - 8031290: 4b54 ldr r3, [pc, #336] ; (80313e4 ) - 8031292: 63fb str r3, [r7, #60] ; 0x3c + 8031314: 4b54 ldr r3, [pc, #336] ; (8031468 ) + 8031316: 63fb str r3, [r7, #60] ; 0x3c break; - 8031294: e196 b.n 80315c4 + 8031318: e196 b.n 8031648 } default : { frequency = 0; - 8031296: 2300 movs r3, #0 - 8031298: 63fb str r3, [r7, #60] ; 0x3c + 803131a: 2300 movs r3, #0 + 803131c: 63fb str r3, [r7, #60] ; 0x3c break; - 803129a: e193 b.n 80315c4 + 803131e: e193 b.n 8031648 } } } else if (PeriphClk == RCC_PERIPHCLK_ADC) - 803129c: 687b ldr r3, [r7, #4] - 803129e: f5b3 2f00 cmp.w r3, #524288 ; 0x80000 - 80312a2: d173 bne.n 803138c + 8031320: 687b ldr r3, [r7, #4] + 8031322: f5b3 2f00 cmp.w r3, #524288 ; 0x80000 + 8031326: d173 bne.n 8031410 { /* Get ADC clock source */ srcclk= __HAL_RCC_GET_ADC_SOURCE(); - 80312a4: 4b4b ldr r3, [pc, #300] ; (80313d4 ) - 80312a6: 6d9b ldr r3, [r3, #88] ; 0x58 - 80312a8: f403 3340 and.w r3, r3, #196608 ; 0x30000 - 80312ac: 63bb str r3, [r7, #56] ; 0x38 + 8031328: 4b4b ldr r3, [pc, #300] ; (8031458 ) + 803132a: 6d9b ldr r3, [r3, #88] ; 0x58 + 803132c: f403 3340 and.w r3, r3, #196608 ; 0x30000 + 8031330: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 80312ae: 6bbb ldr r3, [r7, #56] ; 0x38 - 80312b0: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80312b4: d02f beq.n 8031316 - 80312b6: 6bbb ldr r3, [r7, #56] ; 0x38 - 80312b8: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 80312bc: d863 bhi.n 8031386 - 80312be: 6bbb ldr r3, [r7, #56] ; 0x38 - 80312c0: 2b00 cmp r3, #0 - 80312c2: d004 beq.n 80312ce - 80312c4: 6bbb ldr r3, [r7, #56] ; 0x38 - 80312c6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80312ca: d012 beq.n 80312f2 - 80312cc: e05b b.n 8031386 + 8031332: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031334: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8031338: d02f beq.n 803139a + 803133a: 6bbb ldr r3, [r7, #56] ; 0x38 + 803133c: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8031340: d863 bhi.n 803140a + 8031342: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031344: 2b00 cmp r3, #0 + 8031346: d004 beq.n 8031352 + 8031348: 6bbb ldr r3, [r7, #56] ; 0x38 + 803134a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 803134e: d012 beq.n 8031376 + 8031350: e05b b.n 803140a { case RCC_ADCCLKSOURCE_PLL2: { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 80312ce: 4b41 ldr r3, [pc, #260] ; (80313d4 ) - 80312d0: 681b ldr r3, [r3, #0] - 80312d2: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 80312d6: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 80312da: d107 bne.n 80312ec + 8031352: 4b41 ldr r3, [pc, #260] ; (8031458 ) + 8031354: 681b ldr r3, [r3, #0] + 8031356: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 803135a: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 803135e: d107 bne.n 8031370 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 80312dc: f107 0318 add.w r3, r7, #24 - 80312e0: 4618 mov r0, r3 - 80312e2: f000 f993 bl 803160c + 8031360: f107 0318 add.w r3, r7, #24 + 8031364: 4618 mov r0, r3 + 8031366: f000 f993 bl 8031690 frequency = pll2_clocks.PLL2_P_Frequency; - 80312e6: 69bb ldr r3, [r7, #24] - 80312e8: 63fb str r3, [r7, #60] ; 0x3c + 803136a: 69bb ldr r3, [r7, #24] + 803136c: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80312ea: e16b b.n 80315c4 + 803136e: e16b b.n 8031648 frequency = 0; - 80312ec: 2300 movs r3, #0 - 80312ee: 63fb str r3, [r7, #60] ; 0x3c + 8031370: 2300 movs r3, #0 + 8031372: 63fb str r3, [r7, #60] ; 0x3c break; - 80312f0: e168 b.n 80315c4 + 8031374: e168 b.n 8031648 } case RCC_ADCCLKSOURCE_PLL3: { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 80312f2: 4b38 ldr r3, [pc, #224] ; (80313d4 ) - 80312f4: 681b ldr r3, [r3, #0] - 80312f6: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 80312fa: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80312fe: d107 bne.n 8031310 + 8031376: 4b38 ldr r3, [pc, #224] ; (8031458 ) + 8031378: 681b ldr r3, [r3, #0] + 803137a: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 803137e: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8031382: d107 bne.n 8031394 { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8031300: f107 030c add.w r3, r7, #12 - 8031304: 4618 mov r0, r3 - 8031306: f000 fad5 bl 80318b4 + 8031384: f107 030c add.w r3, r7, #12 + 8031388: 4618 mov r0, r3 + 803138a: f000 fad5 bl 8031938 frequency = pll3_clocks.PLL3_R_Frequency; - 803130a: 697b ldr r3, [r7, #20] - 803130c: 63fb str r3, [r7, #60] ; 0x3c + 803138e: 697b ldr r3, [r7, #20] + 8031390: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803130e: e159 b.n 80315c4 + 8031392: e159 b.n 8031648 frequency = 0; - 8031310: 2300 movs r3, #0 - 8031312: 63fb str r3, [r7, #60] ; 0x3c + 8031394: 2300 movs r3, #0 + 8031396: 63fb str r3, [r7, #60] ; 0x3c break; - 8031314: e156 b.n 80315c4 + 8031398: e156 b.n 8031648 } case RCC_ADCCLKSOURCE_CLKP: { ckpclocksource= __HAL_RCC_GET_CLKP_SOURCE(); - 8031316: 4b2f ldr r3, [pc, #188] ; (80313d4 ) - 8031318: 6cdb ldr r3, [r3, #76] ; 0x4c - 803131a: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 803131e: 637b str r3, [r7, #52] ; 0x34 + 803139a: 4b2f ldr r3, [pc, #188] ; (8031458 ) + 803139c: 6cdb ldr r3, [r3, #76] ; 0x4c + 803139e: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 80313a2: 637b str r3, [r7, #52] ; 0x34 if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSI)) - 8031320: 4b2c ldr r3, [pc, #176] ; (80313d4 ) - 8031322: 681b ldr r3, [r3, #0] - 8031324: f003 0304 and.w r3, r3, #4 - 8031328: 2b04 cmp r3, #4 - 803132a: d10c bne.n 8031346 - 803132c: 6b7b ldr r3, [r7, #52] ; 0x34 - 803132e: 2b00 cmp r3, #0 - 8031330: d109 bne.n 8031346 + 80313a4: 4b2c ldr r3, [pc, #176] ; (8031458 ) + 80313a6: 681b ldr r3, [r3, #0] + 80313a8: f003 0304 and.w r3, r3, #4 + 80313ac: 2b04 cmp r3, #4 + 80313ae: d10c bne.n 80313ca + 80313b0: 6b7b ldr r3, [r7, #52] ; 0x34 + 80313b2: 2b00 cmp r3, #0 + 80313b4: d109 bne.n 80313ca { /* In Case the CKPER Source is HSI */ frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8031332: 4b28 ldr r3, [pc, #160] ; (80313d4 ) - 8031334: 681b ldr r3, [r3, #0] - 8031336: 08db lsrs r3, r3, #3 - 8031338: f003 0303 and.w r3, r3, #3 - 803133c: 4a26 ldr r2, [pc, #152] ; (80313d8 ) - 803133e: fa22 f303 lsr.w r3, r2, r3 - 8031342: 63fb str r3, [r7, #60] ; 0x3c - 8031344: e01e b.n 8031384 + 80313b6: 4b28 ldr r3, [pc, #160] ; (8031458 ) + 80313b8: 681b ldr r3, [r3, #0] + 80313ba: 08db lsrs r3, r3, #3 + 80313bc: f003 0303 and.w r3, r3, #3 + 80313c0: 4a26 ldr r2, [pc, #152] ; (803145c ) + 80313c2: fa22 f303 lsr.w r3, r2, r3 + 80313c6: 63fb str r3, [r7, #60] ; 0x3c + 80313c8: e01e b.n 8031408 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) && (ckpclocksource == RCC_CLKPSOURCE_CSI)) - 8031346: 4b23 ldr r3, [pc, #140] ; (80313d4 ) - 8031348: 681b ldr r3, [r3, #0] - 803134a: f403 7380 and.w r3, r3, #256 ; 0x100 - 803134e: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8031352: d106 bne.n 8031362 - 8031354: 6b7b ldr r3, [r7, #52] ; 0x34 - 8031356: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 803135a: d102 bne.n 8031362 + 80313ca: 4b23 ldr r3, [pc, #140] ; (8031458 ) + 80313cc: 681b ldr r3, [r3, #0] + 80313ce: f403 7380 and.w r3, r3, #256 ; 0x100 + 80313d2: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80313d6: d106 bne.n 80313e6 + 80313d8: 6b7b ldr r3, [r7, #52] ; 0x34 + 80313da: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 80313de: d102 bne.n 80313e6 { /* In Case the CKPER Source is CSI */ frequency = CSI_VALUE; - 803135c: 4b1f ldr r3, [pc, #124] ; (80313dc ) - 803135e: 63fb str r3, [r7, #60] ; 0x3c - 8031360: e010 b.n 8031384 + 80313e0: 4b1f ldr r3, [pc, #124] ; (8031460 ) + 80313e2: 63fb str r3, [r7, #60] ; 0x3c + 80313e4: e010 b.n 8031408 } else if ((HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) && (ckpclocksource == RCC_CLKPSOURCE_HSE)) - 8031362: 4b1c ldr r3, [pc, #112] ; (80313d4 ) - 8031364: 681b ldr r3, [r3, #0] - 8031366: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 803136a: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 803136e: d106 bne.n 803137e - 8031370: 6b7b ldr r3, [r7, #52] ; 0x34 - 8031372: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031376: d102 bne.n 803137e + 80313e6: 4b1c ldr r3, [pc, #112] ; (8031458 ) + 80313e8: 681b ldr r3, [r3, #0] + 80313ea: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 80313ee: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80313f2: d106 bne.n 8031402 + 80313f4: 6b7b ldr r3, [r7, #52] ; 0x34 + 80313f6: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80313fa: d102 bne.n 8031402 { /* In Case the CKPER Source is HSE */ frequency = HSE_VALUE; - 8031378: 4b19 ldr r3, [pc, #100] ; (80313e0 ) - 803137a: 63fb str r3, [r7, #60] ; 0x3c - 803137c: e002 b.n 8031384 + 80313fc: 4b19 ldr r3, [pc, #100] ; (8031464 ) + 80313fe: 63fb str r3, [r7, #60] ; 0x3c + 8031400: e002 b.n 8031408 } else { /* In Case the CKPER is disabled*/ frequency = 0; - 803137e: 2300 movs r3, #0 - 8031380: 63fb str r3, [r7, #60] ; 0x3c + 8031402: 2300 movs r3, #0 + 8031404: 63fb str r3, [r7, #60] ; 0x3c } break; - 8031382: e11f b.n 80315c4 - 8031384: e11e b.n 80315c4 + 8031406: e11f b.n 8031648 + 8031408: e11e b.n 8031648 } default : { frequency = 0; - 8031386: 2300 movs r3, #0 - 8031388: 63fb str r3, [r7, #60] ; 0x3c + 803140a: 2300 movs r3, #0 + 803140c: 63fb str r3, [r7, #60] ; 0x3c break; - 803138a: e11b b.n 80315c4 + 803140e: e11b b.n 8031648 } } } else if (PeriphClk == RCC_PERIPHCLK_SDMMC) - 803138c: 687b ldr r3, [r7, #4] - 803138e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8031392: d13e bne.n 8031412 + 8031410: 687b ldr r3, [r7, #4] + 8031412: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8031416: d13e bne.n 8031496 { /* Get SDMMC clock source */ srcclk= __HAL_RCC_GET_SDMMC_SOURCE(); - 8031394: 4b0f ldr r3, [pc, #60] ; (80313d4 ) - 8031396: 6cdb ldr r3, [r3, #76] ; 0x4c - 8031398: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 803139c: 63bb str r3, [r7, #56] ; 0x38 + 8031418: 4b0f ldr r3, [pc, #60] ; (8031458 ) + 803141a: 6cdb ldr r3, [r3, #76] ; 0x4c + 803141c: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8031420: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 803139e: 6bbb ldr r3, [r7, #56] ; 0x38 - 80313a0: 2b00 cmp r3, #0 - 80313a2: d004 beq.n 80313ae - 80313a4: 6bbb ldr r3, [r7, #56] ; 0x38 - 80313a6: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80313aa: d01d beq.n 80313e8 - 80313ac: e02e b.n 803140c + 8031422: 6bbb ldr r3, [r7, #56] ; 0x38 + 8031424: 2b00 cmp r3, #0 + 8031426: d004 beq.n 8031432 + 8031428: 6bbb ldr r3, [r7, #56] ; 0x38 + 803142a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 803142e: d01d beq.n 803146c + 8031430: e02e b.n 8031490 { case RCC_SDMMCCLKSOURCE_PLL: /* PLL1 is the clock source for SDMMC */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 80313ae: 4b09 ldr r3, [pc, #36] ; (80313d4 ) - 80313b0: 681b ldr r3, [r3, #0] - 80313b2: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 80313b6: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 80313ba: d107 bne.n 80313cc + 8031432: 4b09 ldr r3, [pc, #36] ; (8031458 ) + 8031434: 681b ldr r3, [r3, #0] + 8031436: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 803143a: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 803143e: d107 bne.n 8031450 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 80313bc: f107 0324 add.w r3, r7, #36 ; 0x24 - 80313c0: 4618 mov r0, r3 - 80313c2: f000 fbcb bl 8031b5c + 8031440: f107 0324 add.w r3, r7, #36 ; 0x24 + 8031444: 4618 mov r0, r3 + 8031446: f000 fbcb bl 8031be0 frequency = pll1_clocks.PLL1_Q_Frequency; - 80313c6: 6abb ldr r3, [r7, #40] ; 0x28 - 80313c8: 63fb str r3, [r7, #60] ; 0x3c + 803144a: 6abb ldr r3, [r7, #40] ; 0x28 + 803144c: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80313ca: e0fb b.n 80315c4 + 803144e: e0fb b.n 8031648 frequency = 0; - 80313cc: 2300 movs r3, #0 - 80313ce: 63fb str r3, [r7, #60] ; 0x3c + 8031450: 2300 movs r3, #0 + 8031452: 63fb str r3, [r7, #60] ; 0x3c break; - 80313d0: e0f8 b.n 80315c4 - 80313d2: bf00 nop - 80313d4: 58024400 .word 0x58024400 - 80313d8: 03d09000 .word 0x03d09000 - 80313dc: 003d0900 .word 0x003d0900 - 80313e0: 017d7840 .word 0x017d7840 - 80313e4: 00bb8000 .word 0x00bb8000 + 8031454: e0f8 b.n 8031648 + 8031456: bf00 nop + 8031458: 58024400 .word 0x58024400 + 803145c: 03d09000 .word 0x03d09000 + 8031460: 003d0900 .word 0x003d0900 + 8031464: 017d7840 .word 0x017d7840 + 8031468: 00bb8000 .word 0x00bb8000 } case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is the clock source for SDMMC */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 80313e8: 4b79 ldr r3, [pc, #484] ; (80315d0 ) - 80313ea: 681b ldr r3, [r3, #0] - 80313ec: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 80313f0: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 80313f4: d107 bne.n 8031406 + 803146c: 4b79 ldr r3, [pc, #484] ; (8031654 ) + 803146e: 681b ldr r3, [r3, #0] + 8031470: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8031474: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8031478: d107 bne.n 803148a { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 80313f6: f107 0318 add.w r3, r7, #24 - 80313fa: 4618 mov r0, r3 - 80313fc: f000 f906 bl 803160c + 803147a: f107 0318 add.w r3, r7, #24 + 803147e: 4618 mov r0, r3 + 8031480: f000 f906 bl 8031690 frequency = pll2_clocks.PLL2_R_Frequency; - 8031400: 6a3b ldr r3, [r7, #32] - 8031402: 63fb str r3, [r7, #60] ; 0x3c + 8031484: 6a3b ldr r3, [r7, #32] + 8031486: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8031404: e0de b.n 80315c4 + 8031488: e0de b.n 8031648 frequency = 0; - 8031406: 2300 movs r3, #0 - 8031408: 63fb str r3, [r7, #60] ; 0x3c + 803148a: 2300 movs r3, #0 + 803148c: 63fb str r3, [r7, #60] ; 0x3c break; - 803140a: e0db b.n 80315c4 + 803148e: e0db b.n 8031648 } default : { frequency = 0; - 803140c: 2300 movs r3, #0 - 803140e: 63fb str r3, [r7, #60] ; 0x3c + 8031490: 2300 movs r3, #0 + 8031492: 63fb str r3, [r7, #60] ; 0x3c break; - 8031410: e0d8 b.n 80315c4 + 8031494: e0d8 b.n 8031648 } } } else if (PeriphClk == RCC_PERIPHCLK_SPI6) - 8031412: 687b ldr r3, [r7, #4] - 8031414: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 8031418: f040 8085 bne.w 8031526 + 8031496: 687b ldr r3, [r7, #4] + 8031498: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 803149c: f040 8085 bne.w 80315aa { /* Get SPI6 clock source */ srcclk= __HAL_RCC_GET_SPI6_SOURCE(); - 803141c: 4b6c ldr r3, [pc, #432] ; (80315d0 ) - 803141e: 6d9b ldr r3, [r3, #88] ; 0x58 - 8031420: f003 43e0 and.w r3, r3, #1879048192 ; 0x70000000 - 8031424: 63bb str r3, [r7, #56] ; 0x38 + 80314a0: 4b6c ldr r3, [pc, #432] ; (8031654 ) + 80314a2: 6d9b ldr r3, [r3, #88] ; 0x58 + 80314a4: f003 43e0 and.w r3, r3, #1879048192 ; 0x70000000 + 80314a8: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 8031426: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031428: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 803142c: d06b beq.n 8031506 - 803142e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031430: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 - 8031434: d874 bhi.n 8031520 - 8031436: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031438: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 803143c: d056 beq.n 80314ec - 803143e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031440: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8031444: d86c bhi.n 8031520 - 8031446: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031448: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 803144c: d03b beq.n 80314c6 - 803144e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031450: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 - 8031454: d864 bhi.n 8031520 - 8031456: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031458: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 803145c: d021 beq.n 80314a2 - 803145e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031460: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031464: d85c bhi.n 8031520 - 8031466: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031468: 2b00 cmp r3, #0 - 803146a: d004 beq.n 8031476 - 803146c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803146e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8031472: d004 beq.n 803147e - 8031474: e054 b.n 8031520 + 80314aa: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314ac: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 80314b0: d06b beq.n 803158a + 80314b2: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314b4: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000 + 80314b8: d874 bhi.n 80315a4 + 80314ba: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314bc: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 80314c0: d056 beq.n 8031570 + 80314c2: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314c4: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 80314c8: d86c bhi.n 80315a4 + 80314ca: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314cc: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 80314d0: d03b beq.n 803154a + 80314d2: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314d4: f1b3 5f40 cmp.w r3, #805306368 ; 0x30000000 + 80314d8: d864 bhi.n 80315a4 + 80314da: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314dc: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80314e0: d021 beq.n 8031526 + 80314e2: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314e4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80314e8: d85c bhi.n 80315a4 + 80314ea: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314ec: 2b00 cmp r3, #0 + 80314ee: d004 beq.n 80314fa + 80314f0: 6bbb ldr r3, [r7, #56] ; 0x38 + 80314f2: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 80314f6: d004 beq.n 8031502 + 80314f8: e054 b.n 80315a4 { case RCC_SPI6CLKSOURCE_D3PCLK1: /* D3PCLK1 (PCLK4) is the clock source for SPI6 */ { frequency = HAL_RCCEx_GetD3PCLK1Freq(); - 8031476: f000 f8b3 bl 80315e0 - 803147a: 63f8 str r0, [r7, #60] ; 0x3c + 80314fa: f000 f8b3 bl 8031664 + 80314fe: 63f8 str r0, [r7, #60] ; 0x3c break; - 803147c: e0a2 b.n 80315c4 + 8031500: e0a2 b.n 8031648 } case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 803147e: 4b54 ldr r3, [pc, #336] ; (80315d0 ) - 8031480: 681b ldr r3, [r3, #0] - 8031482: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8031486: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 803148a: d107 bne.n 803149c + 8031502: 4b54 ldr r3, [pc, #336] ; (8031654 ) + 8031504: 681b ldr r3, [r3, #0] + 8031506: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 803150a: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 803150e: d107 bne.n 8031520 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 803148c: f107 0318 add.w r3, r7, #24 - 8031490: 4618 mov r0, r3 - 8031492: f000 f8bb bl 803160c + 8031510: f107 0318 add.w r3, r7, #24 + 8031514: 4618 mov r0, r3 + 8031516: f000 f8bb bl 8031690 frequency = pll2_clocks.PLL2_Q_Frequency; - 8031496: 69fb ldr r3, [r7, #28] - 8031498: 63fb str r3, [r7, #60] ; 0x3c + 803151a: 69fb ldr r3, [r7, #28] + 803151c: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803149a: e093 b.n 80315c4 + 803151e: e093 b.n 8031648 frequency = 0; - 803149c: 2300 movs r3, #0 - 803149e: 63fb str r3, [r7, #60] ; 0x3c + 8031520: 2300 movs r3, #0 + 8031522: 63fb str r3, [r7, #60] ; 0x3c break; - 80314a0: e090 b.n 80315c4 + 8031524: e090 b.n 8031648 } case RCC_SPI6CLKSOURCE_PLL3: /* PLL3 is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3RDY)) - 80314a2: 4b4b ldr r3, [pc, #300] ; (80315d0 ) - 80314a4: 681b ldr r3, [r3, #0] - 80314a6: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 80314aa: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80314ae: d107 bne.n 80314c0 + 8031526: 4b4b ldr r3, [pc, #300] ; (8031654 ) + 8031528: 681b ldr r3, [r3, #0] + 803152a: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 803152e: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 8031532: d107 bne.n 8031544 { HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 80314b0: f107 030c add.w r3, r7, #12 - 80314b4: 4618 mov r0, r3 - 80314b6: f000 f9fd bl 80318b4 + 8031534: f107 030c add.w r3, r7, #12 + 8031538: 4618 mov r0, r3 + 803153a: f000 f9fd bl 8031938 frequency = pll3_clocks.PLL3_Q_Frequency; - 80314ba: 693b ldr r3, [r7, #16] - 80314bc: 63fb str r3, [r7, #60] ; 0x3c + 803153e: 693b ldr r3, [r7, #16] + 8031540: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80314be: e081 b.n 80315c4 + 8031542: e081 b.n 8031648 frequency = 0; - 80314c0: 2300 movs r3, #0 - 80314c2: 63fb str r3, [r7, #60] ; 0x3c + 8031544: 2300 movs r3, #0 + 8031546: 63fb str r3, [r7, #60] ; 0x3c break; - 80314c4: e07e b.n 80315c4 + 8031548: e07e b.n 8031648 } case RCC_SPI6CLKSOURCE_HSI: /* HSI is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)) - 80314c6: 4b42 ldr r3, [pc, #264] ; (80315d0 ) - 80314c8: 681b ldr r3, [r3, #0] - 80314ca: f003 0304 and.w r3, r3, #4 - 80314ce: 2b04 cmp r3, #4 - 80314d0: d109 bne.n 80314e6 + 803154a: 4b42 ldr r3, [pc, #264] ; (8031654 ) + 803154c: 681b ldr r3, [r3, #0] + 803154e: f003 0304 and.w r3, r3, #4 + 8031552: 2b04 cmp r3, #4 + 8031554: d109 bne.n 803156a { frequency = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 80314d2: 4b3f ldr r3, [pc, #252] ; (80315d0 ) - 80314d4: 681b ldr r3, [r3, #0] - 80314d6: 08db lsrs r3, r3, #3 - 80314d8: f003 0303 and.w r3, r3, #3 - 80314dc: 4a3d ldr r2, [pc, #244] ; (80315d4 ) - 80314de: fa22 f303 lsr.w r3, r2, r3 - 80314e2: 63fb str r3, [r7, #60] ; 0x3c + 8031556: 4b3f ldr r3, [pc, #252] ; (8031654 ) + 8031558: 681b ldr r3, [r3, #0] + 803155a: 08db lsrs r3, r3, #3 + 803155c: f003 0303 and.w r3, r3, #3 + 8031560: 4a3d ldr r2, [pc, #244] ; (8031658 ) + 8031562: fa22 f303 lsr.w r3, r2, r3 + 8031566: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80314e4: e06e b.n 80315c4 + 8031568: e06e b.n 8031648 frequency = 0; - 80314e6: 2300 movs r3, #0 - 80314e8: 63fb str r3, [r7, #60] ; 0x3c + 803156a: 2300 movs r3, #0 + 803156c: 63fb str r3, [r7, #60] ; 0x3c break; - 80314ea: e06b b.n 80315c4 + 803156e: e06b b.n 8031648 } case RCC_SPI6CLKSOURCE_CSI: /* CSI is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_CSIRDY)) - 80314ec: 4b38 ldr r3, [pc, #224] ; (80315d0 ) - 80314ee: 681b ldr r3, [r3, #0] - 80314f0: f403 7380 and.w r3, r3, #256 ; 0x100 - 80314f4: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80314f8: d102 bne.n 8031500 + 8031570: 4b38 ldr r3, [pc, #224] ; (8031654 ) + 8031572: 681b ldr r3, [r3, #0] + 8031574: f403 7380 and.w r3, r3, #256 ; 0x100 + 8031578: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 803157c: d102 bne.n 8031584 { frequency = CSI_VALUE; - 80314fa: 4b37 ldr r3, [pc, #220] ; (80315d8 ) - 80314fc: 63fb str r3, [r7, #60] ; 0x3c + 803157e: 4b37 ldr r3, [pc, #220] ; (803165c ) + 8031580: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80314fe: e061 b.n 80315c4 + 8031582: e061 b.n 8031648 frequency = 0; - 8031500: 2300 movs r3, #0 - 8031502: 63fb str r3, [r7, #60] ; 0x3c + 8031584: 2300 movs r3, #0 + 8031586: 63fb str r3, [r7, #60] ; 0x3c break; - 8031504: e05e b.n 80315c4 + 8031588: e05e b.n 8031648 } case RCC_SPI6CLKSOURCE_HSE: /* HSE is the clock source for SPI6 */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) - 8031506: 4b32 ldr r3, [pc, #200] ; (80315d0 ) - 8031508: 681b ldr r3, [r3, #0] - 803150a: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 803150e: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8031512: d102 bne.n 803151a + 803158a: 4b32 ldr r3, [pc, #200] ; (8031654 ) + 803158c: 681b ldr r3, [r3, #0] + 803158e: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8031592: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 8031596: d102 bne.n 803159e { frequency = HSE_VALUE; - 8031514: 4b31 ldr r3, [pc, #196] ; (80315dc ) - 8031516: 63fb str r3, [r7, #60] ; 0x3c + 8031598: 4b31 ldr r3, [pc, #196] ; (8031660 ) + 803159a: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 8031518: e054 b.n 80315c4 + 803159c: e054 b.n 8031648 frequency = 0; - 803151a: 2300 movs r3, #0 - 803151c: 63fb str r3, [r7, #60] ; 0x3c + 803159e: 2300 movs r3, #0 + 80315a0: 63fb str r3, [r7, #60] ; 0x3c break; - 803151e: e051 b.n 80315c4 + 80315a2: e051 b.n 8031648 break; } #endif /* RCC_SPI6CLKSOURCE_PIN */ default : { frequency = 0; - 8031520: 2300 movs r3, #0 - 8031522: 63fb str r3, [r7, #60] ; 0x3c + 80315a4: 2300 movs r3, #0 + 80315a6: 63fb str r3, [r7, #60] ; 0x3c break; - 8031524: e04e b.n 80315c4 + 80315a8: e04e b.n 8031648 } } } else if (PeriphClk == RCC_PERIPHCLK_FDCAN) - 8031526: 687b ldr r3, [r7, #4] - 8031528: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 803152c: d148 bne.n 80315c0 + 80315aa: 687b ldr r3, [r7, #4] + 80315ac: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 80315b0: d148 bne.n 8031644 { /* Get FDCAN clock source */ srcclk= __HAL_RCC_GET_FDCAN_SOURCE(); - 803152e: 4b28 ldr r3, [pc, #160] ; (80315d0 ) - 8031530: 6d1b ldr r3, [r3, #80] ; 0x50 - 8031532: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 - 8031536: 63bb str r3, [r7, #56] ; 0x38 + 80315b2: 4b28 ldr r3, [pc, #160] ; (8031654 ) + 80315b4: 6d1b ldr r3, [r3, #80] ; 0x50 + 80315b6: f003 5340 and.w r3, r3, #805306368 ; 0x30000000 + 80315ba: 63bb str r3, [r7, #56] ; 0x38 switch (srcclk) - 8031538: 6bbb ldr r3, [r7, #56] ; 0x38 - 803153a: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 803153e: d02a beq.n 8031596 - 8031540: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031542: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 8031546: d838 bhi.n 80315ba - 8031548: 6bbb ldr r3, [r7, #56] ; 0x38 - 803154a: 2b00 cmp r3, #0 - 803154c: d004 beq.n 8031558 - 803154e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8031550: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8031554: d00d beq.n 8031572 - 8031556: e030 b.n 80315ba + 80315bc: 6bbb ldr r3, [r7, #56] ; 0x38 + 80315be: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80315c2: d02a beq.n 803161a + 80315c4: 6bbb ldr r3, [r7, #56] ; 0x38 + 80315c6: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 80315ca: d838 bhi.n 803163e + 80315cc: 6bbb ldr r3, [r7, #56] ; 0x38 + 80315ce: 2b00 cmp r3, #0 + 80315d0: d004 beq.n 80315dc + 80315d2: 6bbb ldr r3, [r7, #56] ; 0x38 + 80315d4: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 80315d8: d00d beq.n 80315f6 + 80315da: e030 b.n 803163e { case RCC_FDCANCLKSOURCE_HSE: /* HSE is the clock source for FDCAN */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) - 8031558: 4b1d ldr r3, [pc, #116] ; (80315d0 ) - 803155a: 681b ldr r3, [r3, #0] - 803155c: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8031560: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 - 8031564: d102 bne.n 803156c + 80315dc: 4b1d ldr r3, [pc, #116] ; (8031654 ) + 80315de: 681b ldr r3, [r3, #0] + 80315e0: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 80315e4: f5b3 3f00 cmp.w r3, #131072 ; 0x20000 + 80315e8: d102 bne.n 80315f0 { frequency = HSE_VALUE; - 8031566: 4b1d ldr r3, [pc, #116] ; (80315dc ) - 8031568: 63fb str r3, [r7, #60] ; 0x3c + 80315ea: 4b1d ldr r3, [pc, #116] ; (8031660 ) + 80315ec: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803156a: e02b b.n 80315c4 + 80315ee: e02b b.n 8031648 frequency = 0; - 803156c: 2300 movs r3, #0 - 803156e: 63fb str r3, [r7, #60] ; 0x3c + 80315f0: 2300 movs r3, #0 + 80315f2: 63fb str r3, [r7, #60] ; 0x3c break; - 8031570: e028 b.n 80315c4 + 80315f4: e028 b.n 8031648 } case RCC_FDCANCLKSOURCE_PLL: /* PLL is the clock source for FDCAN */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL1RDY)) - 8031572: 4b17 ldr r3, [pc, #92] ; (80315d0 ) - 8031574: 681b ldr r3, [r3, #0] - 8031576: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 - 803157a: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 - 803157e: d107 bne.n 8031590 + 80315f6: 4b17 ldr r3, [pc, #92] ; (8031654 ) + 80315f8: 681b ldr r3, [r3, #0] + 80315fa: f003 7300 and.w r3, r3, #33554432 ; 0x2000000 + 80315fe: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000 + 8031602: d107 bne.n 8031614 { HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks); - 8031580: f107 0324 add.w r3, r7, #36 ; 0x24 - 8031584: 4618 mov r0, r3 - 8031586: f000 fae9 bl 8031b5c + 8031604: f107 0324 add.w r3, r7, #36 ; 0x24 + 8031608: 4618 mov r0, r3 + 803160a: f000 fae9 bl 8031be0 frequency = pll1_clocks.PLL1_Q_Frequency; - 803158a: 6abb ldr r3, [r7, #40] ; 0x28 - 803158c: 63fb str r3, [r7, #60] ; 0x3c + 803160e: 6abb ldr r3, [r7, #40] ; 0x28 + 8031610: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 803158e: e019 b.n 80315c4 + 8031612: e019 b.n 8031648 frequency = 0; - 8031590: 2300 movs r3, #0 - 8031592: 63fb str r3, [r7, #60] ; 0x3c + 8031614: 2300 movs r3, #0 + 8031616: 63fb str r3, [r7, #60] ; 0x3c break; - 8031594: e016 b.n 80315c4 + 8031618: e016 b.n 8031648 } case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is the clock source for FDCAN */ { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2RDY)) - 8031596: 4b0e ldr r3, [pc, #56] ; (80315d0 ) - 8031598: 681b ldr r3, [r3, #0] - 803159a: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 803159e: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 - 80315a2: d107 bne.n 80315b4 + 803161a: 4b0e ldr r3, [pc, #56] ; (8031654 ) + 803161c: 681b ldr r3, [r3, #0] + 803161e: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8031622: f1b3 6f00 cmp.w r3, #134217728 ; 0x8000000 + 8031626: d107 bne.n 8031638 { HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 80315a4: f107 0318 add.w r3, r7, #24 - 80315a8: 4618 mov r0, r3 - 80315aa: f000 f82f bl 803160c + 8031628: f107 0318 add.w r3, r7, #24 + 803162c: 4618 mov r0, r3 + 803162e: f000 f82f bl 8031690 frequency = pll2_clocks.PLL2_Q_Frequency; - 80315ae: 69fb ldr r3, [r7, #28] - 80315b0: 63fb str r3, [r7, #60] ; 0x3c + 8031632: 69fb ldr r3, [r7, #28] + 8031634: 63fb str r3, [r7, #60] ; 0x3c } else { frequency = 0; } break; - 80315b2: e007 b.n 80315c4 + 8031636: e007 b.n 8031648 frequency = 0; - 80315b4: 2300 movs r3, #0 - 80315b6: 63fb str r3, [r7, #60] ; 0x3c + 8031638: 2300 movs r3, #0 + 803163a: 63fb str r3, [r7, #60] ; 0x3c break; - 80315b8: e004 b.n 80315c4 + 803163c: e004 b.n 8031648 } default : { frequency = 0; - 80315ba: 2300 movs r3, #0 - 80315bc: 63fb str r3, [r7, #60] ; 0x3c + 803163e: 2300 movs r3, #0 + 8031640: 63fb str r3, [r7, #60] ; 0x3c break; - 80315be: e001 b.n 80315c4 + 8031642: e001 b.n 8031648 } } } else { frequency = 0; - 80315c0: 2300 movs r3, #0 - 80315c2: 63fb str r3, [r7, #60] ; 0x3c + 8031644: 2300 movs r3, #0 + 8031646: 63fb str r3, [r7, #60] ; 0x3c } return frequency; - 80315c4: 6bfb ldr r3, [r7, #60] ; 0x3c -} - 80315c6: 4618 mov r0, r3 - 80315c8: 3740 adds r7, #64 ; 0x40 - 80315ca: 46bd mov sp, r7 - 80315cc: bd80 pop {r7, pc} - 80315ce: bf00 nop - 80315d0: 58024400 .word 0x58024400 - 80315d4: 03d09000 .word 0x03d09000 - 80315d8: 003d0900 .word 0x003d0900 - 80315dc: 017d7840 .word 0x017d7840 - -080315e0 : + 8031648: 6bfb ldr r3, [r7, #60] ; 0x3c +} + 803164a: 4618 mov r0, r3 + 803164c: 3740 adds r7, #64 ; 0x40 + 803164e: 46bd mov sp, r7 + 8031650: bd80 pop {r7, pc} + 8031652: bf00 nop + 8031654: 58024400 .word 0x58024400 + 8031658: 03d09000 .word 0x03d09000 + 803165c: 003d0900 .word 0x003d0900 + 8031660: 017d7840 .word 0x017d7840 + +08031664 : * @note Each time D3PCLK1 changes, this function must be called to update the * right D3PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval D3PCLK1 frequency */ uint32_t HAL_RCCEx_GetD3PCLK1Freq(void) { - 80315e0: b580 push {r7, lr} - 80315e2: af00 add r7, sp, #0 + 8031664: b580 push {r7, lr} + 8031666: af00 add r7, sp, #0 #if defined(RCC_D3CFGR_D3PPRE) /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->D3CFGR & RCC_D3CFGR_D3PPRE)>> RCC_D3CFGR_D3PPRE_Pos] & 0x1FU)); - 80315e4: f7fe fb88 bl 802fcf8 - 80315e8: 4602 mov r2, r0 - 80315ea: 4b06 ldr r3, [pc, #24] ; (8031604 ) - 80315ec: 6a1b ldr r3, [r3, #32] - 80315ee: 091b lsrs r3, r3, #4 - 80315f0: f003 0307 and.w r3, r3, #7 - 80315f4: 4904 ldr r1, [pc, #16] ; (8031608 ) - 80315f6: 5ccb ldrb r3, [r1, r3] - 80315f8: f003 031f and.w r3, r3, #31 - 80315fc: fa22 f303 lsr.w r3, r2, r3 + 8031668: f7fe fb88 bl 802fd7c + 803166c: 4602 mov r2, r0 + 803166e: 4b06 ldr r3, [pc, #24] ; (8031688 ) + 8031670: 6a1b ldr r3, [r3, #32] + 8031672: 091b lsrs r3, r3, #4 + 8031674: f003 0307 and.w r3, r3, #7 + 8031678: 4904 ldr r1, [pc, #16] ; (803168c ) + 803167a: 5ccb ldrb r3, [r1, r3] + 803167c: f003 031f and.w r3, r3, #31 + 8031680: fa22 f303 lsr.w r3, r2, r3 #else /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE)>> RCC_SRDCFGR_SRDPPRE_Pos] & 0x1FU)); #endif } - 8031600: 4618 mov r0, r3 - 8031602: bd80 pop {r7, pc} - 8031604: 58024400 .word 0x58024400 - 8031608: 08044cd4 .word 0x08044cd4 + 8031684: 4618 mov r0, r3 + 8031686: bd80 pop {r7, pc} + 8031688: 58024400 .word 0x58024400 + 803168c: 08044d54 .word 0x08044d54 -0803160c : +08031690 : * right PLL2CLK value. Otherwise, any configuration based on this function will be incorrect. * @param PLL2_Clocks structure. * @retval None */ void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef* PLL2_Clocks) { - 803160c: b480 push {r7} - 803160e: b089 sub sp, #36 ; 0x24 - 8031610: af00 add r7, sp, #0 - 8031612: 6078 str r0, [r7, #4] + 8031690: b480 push {r7} + 8031692: b089 sub sp, #36 ; 0x24 + 8031694: af00 add r7, sp, #0 + 8031696: 6078 str r0, [r7, #4] float_t fracn2, pll2vco; /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL2M) * PLL2N PLL2xCLK = PLL2_VCO / PLL2x */ pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); - 8031614: 4ba1 ldr r3, [pc, #644] ; (803189c ) - 8031616: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031618: f003 0303 and.w r3, r3, #3 - 803161c: 61bb str r3, [r7, #24] + 8031698: 4ba1 ldr r3, [pc, #644] ; (8031920 ) + 803169a: 6a9b ldr r3, [r3, #40] ; 0x28 + 803169c: f003 0303 and.w r3, r3, #3 + 80316a0: 61bb str r3, [r7, #24] pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2)>> 12); - 803161e: 4b9f ldr r3, [pc, #636] ; (803189c ) - 8031620: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031622: 0b1b lsrs r3, r3, #12 - 8031624: f003 033f and.w r3, r3, #63 ; 0x3f - 8031628: 617b str r3, [r7, #20] + 80316a2: 4b9f ldr r3, [pc, #636] ; (8031920 ) + 80316a4: 6a9b ldr r3, [r3, #40] ; 0x28 + 80316a6: 0b1b lsrs r3, r3, #12 + 80316a8: f003 033f and.w r3, r3, #63 ; 0x3f + 80316ac: 617b str r3, [r7, #20] pll2fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL2FRACEN) >> RCC_PLLCFGR_PLL2FRACEN_Pos; - 803162a: 4b9c ldr r3, [pc, #624] ; (803189c ) - 803162c: 6adb ldr r3, [r3, #44] ; 0x2c - 803162e: 091b lsrs r3, r3, #4 - 8031630: f003 0301 and.w r3, r3, #1 - 8031634: 613b str r3, [r7, #16] + 80316ae: 4b9c ldr r3, [pc, #624] ; (8031920 ) + 80316b0: 6adb ldr r3, [r3, #44] ; 0x2c + 80316b2: 091b lsrs r3, r3, #4 + 80316b4: f003 0301 and.w r3, r3, #1 + 80316b8: 613b str r3, [r7, #16] fracn2 =(float_t)(uint32_t)(pll2fracen* ((RCC->PLL2FRACR & RCC_PLL2FRACR_FRACN2)>> 3)); - 8031636: 4b99 ldr r3, [pc, #612] ; (803189c ) - 8031638: 6bdb ldr r3, [r3, #60] ; 0x3c - 803163a: 08db lsrs r3, r3, #3 - 803163c: f3c3 030c ubfx r3, r3, #0, #13 - 8031640: 693a ldr r2, [r7, #16] - 8031642: fb02 f303 mul.w r3, r2, r3 - 8031646: ee07 3a90 vmov s15, r3 - 803164a: eef8 7a67 vcvt.f32.u32 s15, s15 - 803164e: edc7 7a03 vstr s15, [r7, #12] + 80316ba: 4b99 ldr r3, [pc, #612] ; (8031920 ) + 80316bc: 6bdb ldr r3, [r3, #60] ; 0x3c + 80316be: 08db lsrs r3, r3, #3 + 80316c0: f3c3 030c ubfx r3, r3, #0, #13 + 80316c4: 693a ldr r2, [r7, #16] + 80316c6: fb02 f303 mul.w r3, r2, r3 + 80316ca: ee07 3a90 vmov s15, r3 + 80316ce: eef8 7a67 vcvt.f32.u32 s15, s15 + 80316d2: edc7 7a03 vstr s15, [r7, #12] if (pll2m != 0U) - 8031652: 697b ldr r3, [r7, #20] - 8031654: 2b00 cmp r3, #0 - 8031656: f000 8111 beq.w 803187c + 80316d6: 697b ldr r3, [r7, #20] + 80316d8: 2b00 cmp r3, #0 + 80316da: f000 8111 beq.w 8031900 { switch (pllsource) - 803165a: 69bb ldr r3, [r7, #24] - 803165c: 2b02 cmp r3, #2 - 803165e: f000 8083 beq.w 8031768 - 8031662: 69bb ldr r3, [r7, #24] - 8031664: 2b02 cmp r3, #2 - 8031666: f200 80a1 bhi.w 80317ac - 803166a: 69bb ldr r3, [r7, #24] - 803166c: 2b00 cmp r3, #0 - 803166e: d003 beq.n 8031678 - 8031670: 69bb ldr r3, [r7, #24] - 8031672: 2b01 cmp r3, #1 - 8031674: d056 beq.n 8031724 - 8031676: e099 b.n 80317ac + 80316de: 69bb ldr r3, [r7, #24] + 80316e0: 2b02 cmp r3, #2 + 80316e2: f000 8083 beq.w 80317ec + 80316e6: 69bb ldr r3, [r7, #24] + 80316e8: 2b02 cmp r3, #2 + 80316ea: f200 80a1 bhi.w 8031830 + 80316ee: 69bb ldr r3, [r7, #24] + 80316f0: 2b00 cmp r3, #0 + 80316f2: d003 beq.n 80316fc + 80316f4: 69bb ldr r3, [r7, #24] + 80316f6: 2b01 cmp r3, #1 + 80316f8: d056 beq.n 80317a8 + 80316fa: e099 b.n 8031830 { case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8031678: 4b88 ldr r3, [pc, #544] ; (803189c ) - 803167a: 681b ldr r3, [r3, #0] - 803167c: f003 0320 and.w r3, r3, #32 - 8031680: 2b00 cmp r3, #0 - 8031682: d02d beq.n 80316e0 + 80316fc: 4b88 ldr r3, [pc, #544] ; (8031920 ) + 80316fe: 681b ldr r3, [r3, #0] + 8031700: f003 0320 and.w r3, r3, #32 + 8031704: 2b00 cmp r3, #0 + 8031706: d02d beq.n 8031764 { hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8031684: 4b85 ldr r3, [pc, #532] ; (803189c ) - 8031686: 681b ldr r3, [r3, #0] - 8031688: 08db lsrs r3, r3, #3 - 803168a: f003 0303 and.w r3, r3, #3 - 803168e: 4a84 ldr r2, [pc, #528] ; (80318a0 ) - 8031690: fa22 f303 lsr.w r3, r2, r3 - 8031694: 60bb str r3, [r7, #8] + 8031708: 4b85 ldr r3, [pc, #532] ; (8031920 ) + 803170a: 681b ldr r3, [r3, #0] + 803170c: 08db lsrs r3, r3, #3 + 803170e: f003 0303 and.w r3, r3, #3 + 8031712: 4a84 ldr r2, [pc, #528] ; (8031924 ) + 8031714: fa22 f303 lsr.w r3, r2, r3 + 8031718: 60bb str r3, [r7, #8] pll2vco = ( (float_t)hsivalue / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 8031696: 68bb ldr r3, [r7, #8] - 8031698: ee07 3a90 vmov s15, r3 - 803169c: eef8 6a67 vcvt.f32.u32 s13, s15 - 80316a0: 697b ldr r3, [r7, #20] - 80316a2: ee07 3a90 vmov s15, r3 - 80316a6: eef8 7a67 vcvt.f32.u32 s15, s15 - 80316aa: ee86 7aa7 vdiv.f32 s14, s13, s15 - 80316ae: 4b7b ldr r3, [pc, #492] ; (803189c ) - 80316b0: 6b9b ldr r3, [r3, #56] ; 0x38 - 80316b2: f3c3 0308 ubfx r3, r3, #0, #9 - 80316b6: ee07 3a90 vmov s15, r3 - 80316ba: eef8 6a67 vcvt.f32.u32 s13, s15 - 80316be: ed97 6a03 vldr s12, [r7, #12] - 80316c2: eddf 5a78 vldr s11, [pc, #480] ; 80318a4 - 80316c6: eec6 7a25 vdiv.f32 s15, s12, s11 - 80316ca: ee76 7aa7 vadd.f32 s15, s13, s15 - 80316ce: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 80316d2: ee77 7aa6 vadd.f32 s15, s15, s13 - 80316d6: ee67 7a27 vmul.f32 s15, s14, s15 - 80316da: edc7 7a07 vstr s15, [r7, #28] + 803171a: 68bb ldr r3, [r7, #8] + 803171c: ee07 3a90 vmov s15, r3 + 8031720: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031724: 697b ldr r3, [r7, #20] + 8031726: ee07 3a90 vmov s15, r3 + 803172a: eef8 7a67 vcvt.f32.u32 s15, s15 + 803172e: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031732: 4b7b ldr r3, [pc, #492] ; (8031920 ) + 8031734: 6b9b ldr r3, [r3, #56] ; 0x38 + 8031736: f3c3 0308 ubfx r3, r3, #0, #9 + 803173a: ee07 3a90 vmov s15, r3 + 803173e: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031742: ed97 6a03 vldr s12, [r7, #12] + 8031746: eddf 5a78 vldr s11, [pc, #480] ; 8031928 + 803174a: eec6 7a25 vdiv.f32 s15, s12, s11 + 803174e: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031752: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031756: ee77 7aa6 vadd.f32 s15, s15, s13 + 803175a: ee67 7a27 vmul.f32 s15, s14, s15 + 803175e: edc7 7a07 vstr s15, [r7, #28] } else { pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); } break; - 80316de: e087 b.n 80317f0 + 8031762: e087 b.n 8031874 pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 80316e0: 697b ldr r3, [r7, #20] - 80316e2: ee07 3a90 vmov s15, r3 - 80316e6: eef8 7a67 vcvt.f32.u32 s15, s15 - 80316ea: eddf 6a6f vldr s13, [pc, #444] ; 80318a8 - 80316ee: ee86 7aa7 vdiv.f32 s14, s13, s15 - 80316f2: 4b6a ldr r3, [pc, #424] ; (803189c ) - 80316f4: 6b9b ldr r3, [r3, #56] ; 0x38 - 80316f6: f3c3 0308 ubfx r3, r3, #0, #9 - 80316fa: ee07 3a90 vmov s15, r3 - 80316fe: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031702: ed97 6a03 vldr s12, [r7, #12] - 8031706: eddf 5a67 vldr s11, [pc, #412] ; 80318a4 - 803170a: eec6 7a25 vdiv.f32 s15, s12, s11 - 803170e: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031712: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031716: ee77 7aa6 vadd.f32 s15, s15, s13 - 803171a: ee67 7a27 vmul.f32 s15, s14, s15 - 803171e: edc7 7a07 vstr s15, [r7, #28] + 8031764: 697b ldr r3, [r7, #20] + 8031766: ee07 3a90 vmov s15, r3 + 803176a: eef8 7a67 vcvt.f32.u32 s15, s15 + 803176e: eddf 6a6f vldr s13, [pc, #444] ; 803192c + 8031772: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031776: 4b6a ldr r3, [pc, #424] ; (8031920 ) + 8031778: 6b9b ldr r3, [r3, #56] ; 0x38 + 803177a: f3c3 0308 ubfx r3, r3, #0, #9 + 803177e: ee07 3a90 vmov s15, r3 + 8031782: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031786: ed97 6a03 vldr s12, [r7, #12] + 803178a: eddf 5a67 vldr s11, [pc, #412] ; 8031928 + 803178e: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031792: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031796: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 803179a: ee77 7aa6 vadd.f32 s15, s15, s13 + 803179e: ee67 7a27 vmul.f32 s15, s14, s15 + 80317a2: edc7 7a07 vstr s15, [r7, #28] break; - 8031722: e065 b.n 80317f0 + 80317a6: e065 b.n 8031874 case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */ pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 8031724: 697b ldr r3, [r7, #20] - 8031726: ee07 3a90 vmov s15, r3 - 803172a: eef8 7a67 vcvt.f32.u32 s15, s15 - 803172e: eddf 6a5f vldr s13, [pc, #380] ; 80318ac - 8031732: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031736: 4b59 ldr r3, [pc, #356] ; (803189c ) - 8031738: 6b9b ldr r3, [r3, #56] ; 0x38 - 803173a: f3c3 0308 ubfx r3, r3, #0, #9 - 803173e: ee07 3a90 vmov s15, r3 - 8031742: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031746: ed97 6a03 vldr s12, [r7, #12] - 803174a: eddf 5a56 vldr s11, [pc, #344] ; 80318a4 - 803174e: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031752: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031756: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 803175a: ee77 7aa6 vadd.f32 s15, s15, s13 - 803175e: ee67 7a27 vmul.f32 s15, s14, s15 - 8031762: edc7 7a07 vstr s15, [r7, #28] + 80317a8: 697b ldr r3, [r7, #20] + 80317aa: ee07 3a90 vmov s15, r3 + 80317ae: eef8 7a67 vcvt.f32.u32 s15, s15 + 80317b2: eddf 6a5f vldr s13, [pc, #380] ; 8031930 + 80317b6: ee86 7aa7 vdiv.f32 s14, s13, s15 + 80317ba: 4b59 ldr r3, [pc, #356] ; (8031920 ) + 80317bc: 6b9b ldr r3, [r3, #56] ; 0x38 + 80317be: f3c3 0308 ubfx r3, r3, #0, #9 + 80317c2: ee07 3a90 vmov s15, r3 + 80317c6: eef8 6a67 vcvt.f32.u32 s13, s15 + 80317ca: ed97 6a03 vldr s12, [r7, #12] + 80317ce: eddf 5a56 vldr s11, [pc, #344] ; 8031928 + 80317d2: eec6 7a25 vdiv.f32 s15, s12, s11 + 80317d6: ee76 7aa7 vadd.f32 s15, s13, s15 + 80317da: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 80317de: ee77 7aa6 vadd.f32 s15, s15, s13 + 80317e2: ee67 7a27 vmul.f32 s15, s14, s15 + 80317e6: edc7 7a07 vstr s15, [r7, #28] break; - 8031766: e043 b.n 80317f0 + 80317ea: e043 b.n 8031874 case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pll2vco = ((float_t)HSE_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 8031768: 697b ldr r3, [r7, #20] - 803176a: ee07 3a90 vmov s15, r3 - 803176e: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031772: eddf 6a4f vldr s13, [pc, #316] ; 80318b0 - 8031776: ee86 7aa7 vdiv.f32 s14, s13, s15 - 803177a: 4b48 ldr r3, [pc, #288] ; (803189c ) - 803177c: 6b9b ldr r3, [r3, #56] ; 0x38 - 803177e: f3c3 0308 ubfx r3, r3, #0, #9 - 8031782: ee07 3a90 vmov s15, r3 - 8031786: eef8 6a67 vcvt.f32.u32 s13, s15 - 803178a: ed97 6a03 vldr s12, [r7, #12] - 803178e: eddf 5a45 vldr s11, [pc, #276] ; 80318a4 - 8031792: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031796: ee76 7aa7 vadd.f32 s15, s13, s15 - 803179a: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 803179e: ee77 7aa6 vadd.f32 s15, s15, s13 - 80317a2: ee67 7a27 vmul.f32 s15, s14, s15 - 80317a6: edc7 7a07 vstr s15, [r7, #28] + 80317ec: 697b ldr r3, [r7, #20] + 80317ee: ee07 3a90 vmov s15, r3 + 80317f2: eef8 7a67 vcvt.f32.u32 s15, s15 + 80317f6: eddf 6a4f vldr s13, [pc, #316] ; 8031934 + 80317fa: ee86 7aa7 vdiv.f32 s14, s13, s15 + 80317fe: 4b48 ldr r3, [pc, #288] ; (8031920 ) + 8031800: 6b9b ldr r3, [r3, #56] ; 0x38 + 8031802: f3c3 0308 ubfx r3, r3, #0, #9 + 8031806: ee07 3a90 vmov s15, r3 + 803180a: eef8 6a67 vcvt.f32.u32 s13, s15 + 803180e: ed97 6a03 vldr s12, [r7, #12] + 8031812: eddf 5a45 vldr s11, [pc, #276] ; 8031928 + 8031816: eec6 7a25 vdiv.f32 s15, s12, s11 + 803181a: ee76 7aa7 vadd.f32 s15, s13, s15 + 803181e: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031822: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031826: ee67 7a27 vmul.f32 s15, s14, s15 + 803182a: edc7 7a07 vstr s15, [r7, #28] break; - 80317aa: e021 b.n 80317f0 + 803182e: e021 b.n 8031874 default: pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2/(float_t)0x2000) +(float_t)1 ); - 80317ac: 697b ldr r3, [r7, #20] - 80317ae: ee07 3a90 vmov s15, r3 - 80317b2: eef8 7a67 vcvt.f32.u32 s15, s15 - 80317b6: eddf 6a3d vldr s13, [pc, #244] ; 80318ac - 80317ba: ee86 7aa7 vdiv.f32 s14, s13, s15 - 80317be: 4b37 ldr r3, [pc, #220] ; (803189c ) - 80317c0: 6b9b ldr r3, [r3, #56] ; 0x38 - 80317c2: f3c3 0308 ubfx r3, r3, #0, #9 - 80317c6: ee07 3a90 vmov s15, r3 - 80317ca: eef8 6a67 vcvt.f32.u32 s13, s15 - 80317ce: ed97 6a03 vldr s12, [r7, #12] - 80317d2: eddf 5a34 vldr s11, [pc, #208] ; 80318a4 - 80317d6: eec6 7a25 vdiv.f32 s15, s12, s11 - 80317da: ee76 7aa7 vadd.f32 s15, s13, s15 - 80317de: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 80317e2: ee77 7aa6 vadd.f32 s15, s15, s13 - 80317e6: ee67 7a27 vmul.f32 s15, s14, s15 - 80317ea: edc7 7a07 vstr s15, [r7, #28] + 8031830: 697b ldr r3, [r7, #20] + 8031832: ee07 3a90 vmov s15, r3 + 8031836: eef8 7a67 vcvt.f32.u32 s15, s15 + 803183a: eddf 6a3d vldr s13, [pc, #244] ; 8031930 + 803183e: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031842: 4b37 ldr r3, [pc, #220] ; (8031920 ) + 8031844: 6b9b ldr r3, [r3, #56] ; 0x38 + 8031846: f3c3 0308 ubfx r3, r3, #0, #9 + 803184a: ee07 3a90 vmov s15, r3 + 803184e: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031852: ed97 6a03 vldr s12, [r7, #12] + 8031856: eddf 5a34 vldr s11, [pc, #208] ; 8031928 + 803185a: eec6 7a25 vdiv.f32 s15, s12, s11 + 803185e: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031862: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031866: ee77 7aa6 vadd.f32 s15, s15, s13 + 803186a: ee67 7a27 vmul.f32 s15, s14, s15 + 803186e: edc7 7a07 vstr s15, [r7, #28] break; - 80317ee: bf00 nop + 8031872: bf00 nop } PLL2_Clocks->PLL2_P_Frequency = (uint32_t)(float_t)(pll2vco/((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_P2) >>9) + (float_t)1 )) ; - 80317f0: 4b2a ldr r3, [pc, #168] ; (803189c ) - 80317f2: 6b9b ldr r3, [r3, #56] ; 0x38 - 80317f4: 0a5b lsrs r3, r3, #9 - 80317f6: f003 037f and.w r3, r3, #127 ; 0x7f - 80317fa: ee07 3a90 vmov s15, r3 - 80317fe: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031802: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031806: ee37 7a87 vadd.f32 s14, s15, s14 - 803180a: edd7 6a07 vldr s13, [r7, #28] - 803180e: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031812: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031816: ee17 2a90 vmov r2, s15 - 803181a: 687b ldr r3, [r7, #4] - 803181c: 601a str r2, [r3, #0] + 8031874: 4b2a ldr r3, [pc, #168] ; (8031920 ) + 8031876: 6b9b ldr r3, [r3, #56] ; 0x38 + 8031878: 0a5b lsrs r3, r3, #9 + 803187a: f003 037f and.w r3, r3, #127 ; 0x7f + 803187e: ee07 3a90 vmov s15, r3 + 8031882: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031886: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 803188a: ee37 7a87 vadd.f32 s14, s15, s14 + 803188e: edd7 6a07 vldr s13, [r7, #28] + 8031892: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031896: eefc 7ae7 vcvt.u32.f32 s15, s15 + 803189a: ee17 2a90 vmov r2, s15 + 803189e: 687b ldr r3, [r7, #4] + 80318a0: 601a str r2, [r3, #0] PLL2_Clocks->PLL2_Q_Frequency = (uint32_t)(float_t)(pll2vco/((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_Q2) >>16) + (float_t)1 )) ; - 803181e: 4b1f ldr r3, [pc, #124] ; (803189c ) - 8031820: 6b9b ldr r3, [r3, #56] ; 0x38 - 8031822: 0c1b lsrs r3, r3, #16 - 8031824: f003 037f and.w r3, r3, #127 ; 0x7f - 8031828: ee07 3a90 vmov s15, r3 - 803182c: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031830: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031834: ee37 7a87 vadd.f32 s14, s15, s14 - 8031838: edd7 6a07 vldr s13, [r7, #28] - 803183c: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031840: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031844: ee17 2a90 vmov r2, s15 - 8031848: 687b ldr r3, [r7, #4] - 803184a: 605a str r2, [r3, #4] + 80318a2: 4b1f ldr r3, [pc, #124] ; (8031920 ) + 80318a4: 6b9b ldr r3, [r3, #56] ; 0x38 + 80318a6: 0c1b lsrs r3, r3, #16 + 80318a8: f003 037f and.w r3, r3, #127 ; 0x7f + 80318ac: ee07 3a90 vmov s15, r3 + 80318b0: eef8 7a67 vcvt.f32.u32 s15, s15 + 80318b4: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 80318b8: ee37 7a87 vadd.f32 s14, s15, s14 + 80318bc: edd7 6a07 vldr s13, [r7, #28] + 80318c0: eec6 7a87 vdiv.f32 s15, s13, s14 + 80318c4: eefc 7ae7 vcvt.u32.f32 s15, s15 + 80318c8: ee17 2a90 vmov r2, s15 + 80318cc: 687b ldr r3, [r7, #4] + 80318ce: 605a str r2, [r3, #4] PLL2_Clocks->PLL2_R_Frequency = (uint32_t)(float_t)(pll2vco/((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_R2) >>24) + (float_t)1 )) ; - 803184c: 4b13 ldr r3, [pc, #76] ; (803189c ) - 803184e: 6b9b ldr r3, [r3, #56] ; 0x38 - 8031850: 0e1b lsrs r3, r3, #24 - 8031852: f003 037f and.w r3, r3, #127 ; 0x7f - 8031856: ee07 3a90 vmov s15, r3 - 803185a: eef8 7a67 vcvt.f32.u32 s15, s15 - 803185e: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031862: ee37 7a87 vadd.f32 s14, s15, s14 - 8031866: edd7 6a07 vldr s13, [r7, #28] - 803186a: eec6 7a87 vdiv.f32 s15, s13, s14 - 803186e: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031872: ee17 2a90 vmov r2, s15 - 8031876: 687b ldr r3, [r7, #4] - 8031878: 609a str r2, [r3, #8] + 80318d0: 4b13 ldr r3, [pc, #76] ; (8031920 ) + 80318d2: 6b9b ldr r3, [r3, #56] ; 0x38 + 80318d4: 0e1b lsrs r3, r3, #24 + 80318d6: f003 037f and.w r3, r3, #127 ; 0x7f + 80318da: ee07 3a90 vmov s15, r3 + 80318de: eef8 7a67 vcvt.f32.u32 s15, s15 + 80318e2: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 80318e6: ee37 7a87 vadd.f32 s14, s15, s14 + 80318ea: edd7 6a07 vldr s13, [r7, #28] + 80318ee: eec6 7a87 vdiv.f32 s15, s13, s14 + 80318f2: eefc 7ae7 vcvt.u32.f32 s15, s15 + 80318f6: ee17 2a90 vmov r2, s15 + 80318fa: 687b ldr r3, [r7, #4] + 80318fc: 609a str r2, [r3, #8] { PLL2_Clocks->PLL2_P_Frequency = 0U; PLL2_Clocks->PLL2_Q_Frequency = 0U; PLL2_Clocks->PLL2_R_Frequency = 0U; } } - 803187a: e008 b.n 803188e + 80318fe: e008 b.n 8031912 PLL2_Clocks->PLL2_P_Frequency = 0U; - 803187c: 687b ldr r3, [r7, #4] - 803187e: 2200 movs r2, #0 - 8031880: 601a str r2, [r3, #0] + 8031900: 687b ldr r3, [r7, #4] + 8031902: 2200 movs r2, #0 + 8031904: 601a str r2, [r3, #0] PLL2_Clocks->PLL2_Q_Frequency = 0U; - 8031882: 687b ldr r3, [r7, #4] - 8031884: 2200 movs r2, #0 - 8031886: 605a str r2, [r3, #4] + 8031906: 687b ldr r3, [r7, #4] + 8031908: 2200 movs r2, #0 + 803190a: 605a str r2, [r3, #4] PLL2_Clocks->PLL2_R_Frequency = 0U; - 8031888: 687b ldr r3, [r7, #4] - 803188a: 2200 movs r2, #0 - 803188c: 609a str r2, [r3, #8] -} - 803188e: bf00 nop - 8031890: 3724 adds r7, #36 ; 0x24 - 8031892: 46bd mov sp, r7 - 8031894: f85d 7b04 ldr.w r7, [sp], #4 - 8031898: 4770 bx lr - 803189a: bf00 nop - 803189c: 58024400 .word 0x58024400 - 80318a0: 03d09000 .word 0x03d09000 - 80318a4: 46000000 .word 0x46000000 - 80318a8: 4c742400 .word 0x4c742400 - 80318ac: 4a742400 .word 0x4a742400 - 80318b0: 4bbebc20 .word 0x4bbebc20 - -080318b4 : + 803190c: 687b ldr r3, [r7, #4] + 803190e: 2200 movs r2, #0 + 8031910: 609a str r2, [r3, #8] +} + 8031912: bf00 nop + 8031914: 3724 adds r7, #36 ; 0x24 + 8031916: 46bd mov sp, r7 + 8031918: f85d 7b04 ldr.w r7, [sp], #4 + 803191c: 4770 bx lr + 803191e: bf00 nop + 8031920: 58024400 .word 0x58024400 + 8031924: 03d09000 .word 0x03d09000 + 8031928: 46000000 .word 0x46000000 + 803192c: 4c742400 .word 0x4c742400 + 8031930: 4a742400 .word 0x4a742400 + 8031934: 4bbebc20 .word 0x4bbebc20 + +08031938 : * right PLL3CLK value. Otherwise, any configuration based on this function will be incorrect. * @param PLL3_Clocks structure. * @retval None */ void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef* PLL3_Clocks) { - 80318b4: b480 push {r7} - 80318b6: b089 sub sp, #36 ; 0x24 - 80318b8: af00 add r7, sp, #0 - 80318ba: 6078 str r0, [r7, #4] + 8031938: b480 push {r7} + 803193a: b089 sub sp, #36 ; 0x24 + 803193c: af00 add r7, sp, #0 + 803193e: 6078 str r0, [r7, #4] float_t fracn3, pll3vco; /* PLL3_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL3M) * PLL3N PLL3xCLK = PLL3_VCO / PLLxR */ pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); - 80318bc: 4ba1 ldr r3, [pc, #644] ; (8031b44 ) - 80318be: 6a9b ldr r3, [r3, #40] ; 0x28 - 80318c0: f003 0303 and.w r3, r3, #3 - 80318c4: 61bb str r3, [r7, #24] + 8031940: 4ba1 ldr r3, [pc, #644] ; (8031bc8 ) + 8031942: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031944: f003 0303 and.w r3, r3, #3 + 8031948: 61bb str r3, [r7, #24] pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3)>> 20) ; - 80318c6: 4b9f ldr r3, [pc, #636] ; (8031b44 ) - 80318c8: 6a9b ldr r3, [r3, #40] ; 0x28 - 80318ca: 0d1b lsrs r3, r3, #20 - 80318cc: f003 033f and.w r3, r3, #63 ; 0x3f - 80318d0: 617b str r3, [r7, #20] + 803194a: 4b9f ldr r3, [pc, #636] ; (8031bc8 ) + 803194c: 6a9b ldr r3, [r3, #40] ; 0x28 + 803194e: 0d1b lsrs r3, r3, #20 + 8031950: f003 033f and.w r3, r3, #63 ; 0x3f + 8031954: 617b str r3, [r7, #20] pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN) >> RCC_PLLCFGR_PLL3FRACEN_Pos; - 80318d2: 4b9c ldr r3, [pc, #624] ; (8031b44 ) - 80318d4: 6adb ldr r3, [r3, #44] ; 0x2c - 80318d6: 0a1b lsrs r3, r3, #8 - 80318d8: f003 0301 and.w r3, r3, #1 - 80318dc: 613b str r3, [r7, #16] + 8031956: 4b9c ldr r3, [pc, #624] ; (8031bc8 ) + 8031958: 6adb ldr r3, [r3, #44] ; 0x2c + 803195a: 0a1b lsrs r3, r3, #8 + 803195c: f003 0301 and.w r3, r3, #1 + 8031960: 613b str r3, [r7, #16] fracn3 = (float_t)(uint32_t)(pll3fracen* ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACN3)>> 3)); - 80318de: 4b99 ldr r3, [pc, #612] ; (8031b44 ) - 80318e0: 6c5b ldr r3, [r3, #68] ; 0x44 - 80318e2: 08db lsrs r3, r3, #3 - 80318e4: f3c3 030c ubfx r3, r3, #0, #13 - 80318e8: 693a ldr r2, [r7, #16] - 80318ea: fb02 f303 mul.w r3, r2, r3 - 80318ee: ee07 3a90 vmov s15, r3 - 80318f2: eef8 7a67 vcvt.f32.u32 s15, s15 - 80318f6: edc7 7a03 vstr s15, [r7, #12] + 8031962: 4b99 ldr r3, [pc, #612] ; (8031bc8 ) + 8031964: 6c5b ldr r3, [r3, #68] ; 0x44 + 8031966: 08db lsrs r3, r3, #3 + 8031968: f3c3 030c ubfx r3, r3, #0, #13 + 803196c: 693a ldr r2, [r7, #16] + 803196e: fb02 f303 mul.w r3, r2, r3 + 8031972: ee07 3a90 vmov s15, r3 + 8031976: eef8 7a67 vcvt.f32.u32 s15, s15 + 803197a: edc7 7a03 vstr s15, [r7, #12] if (pll3m != 0U) - 80318fa: 697b ldr r3, [r7, #20] - 80318fc: 2b00 cmp r3, #0 - 80318fe: f000 8111 beq.w 8031b24 + 803197e: 697b ldr r3, [r7, #20] + 8031980: 2b00 cmp r3, #0 + 8031982: f000 8111 beq.w 8031ba8 { switch (pllsource) - 8031902: 69bb ldr r3, [r7, #24] - 8031904: 2b02 cmp r3, #2 - 8031906: f000 8083 beq.w 8031a10 - 803190a: 69bb ldr r3, [r7, #24] - 803190c: 2b02 cmp r3, #2 - 803190e: f200 80a1 bhi.w 8031a54 - 8031912: 69bb ldr r3, [r7, #24] - 8031914: 2b00 cmp r3, #0 - 8031916: d003 beq.n 8031920 - 8031918: 69bb ldr r3, [r7, #24] - 803191a: 2b01 cmp r3, #1 - 803191c: d056 beq.n 80319cc - 803191e: e099 b.n 8031a54 + 8031986: 69bb ldr r3, [r7, #24] + 8031988: 2b02 cmp r3, #2 + 803198a: f000 8083 beq.w 8031a94 + 803198e: 69bb ldr r3, [r7, #24] + 8031990: 2b02 cmp r3, #2 + 8031992: f200 80a1 bhi.w 8031ad8 + 8031996: 69bb ldr r3, [r7, #24] + 8031998: 2b00 cmp r3, #0 + 803199a: d003 beq.n 80319a4 + 803199c: 69bb ldr r3, [r7, #24] + 803199e: 2b01 cmp r3, #1 + 80319a0: d056 beq.n 8031a50 + 80319a2: e099 b.n 8031ad8 { case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8031920: 4b88 ldr r3, [pc, #544] ; (8031b44 ) - 8031922: 681b ldr r3, [r3, #0] - 8031924: f003 0320 and.w r3, r3, #32 - 8031928: 2b00 cmp r3, #0 - 803192a: d02d beq.n 8031988 + 80319a4: 4b88 ldr r3, [pc, #544] ; (8031bc8 ) + 80319a6: 681b ldr r3, [r3, #0] + 80319a8: f003 0320 and.w r3, r3, #32 + 80319ac: 2b00 cmp r3, #0 + 80319ae: d02d beq.n 8031a0c { hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 803192c: 4b85 ldr r3, [pc, #532] ; (8031b44 ) - 803192e: 681b ldr r3, [r3, #0] - 8031930: 08db lsrs r3, r3, #3 - 8031932: f003 0303 and.w r3, r3, #3 - 8031936: 4a84 ldr r2, [pc, #528] ; (8031b48 ) - 8031938: fa22 f303 lsr.w r3, r2, r3 - 803193c: 60bb str r3, [r7, #8] + 80319b0: 4b85 ldr r3, [pc, #532] ; (8031bc8 ) + 80319b2: 681b ldr r3, [r3, #0] + 80319b4: 08db lsrs r3, r3, #3 + 80319b6: f003 0303 and.w r3, r3, #3 + 80319ba: 4a84 ldr r2, [pc, #528] ; (8031bcc ) + 80319bc: fa22 f303 lsr.w r3, r2, r3 + 80319c0: 60bb str r3, [r7, #8] pll3vco = ((float_t)hsivalue / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 803193e: 68bb ldr r3, [r7, #8] - 8031940: ee07 3a90 vmov s15, r3 - 8031944: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031948: 697b ldr r3, [r7, #20] - 803194a: ee07 3a90 vmov s15, r3 - 803194e: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031952: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031956: 4b7b ldr r3, [pc, #492] ; (8031b44 ) - 8031958: 6c1b ldr r3, [r3, #64] ; 0x40 - 803195a: f3c3 0308 ubfx r3, r3, #0, #9 - 803195e: ee07 3a90 vmov s15, r3 - 8031962: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031966: ed97 6a03 vldr s12, [r7, #12] - 803196a: eddf 5a78 vldr s11, [pc, #480] ; 8031b4c - 803196e: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031972: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031976: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 803197a: ee77 7aa6 vadd.f32 s15, s15, s13 - 803197e: ee67 7a27 vmul.f32 s15, s14, s15 - 8031982: edc7 7a07 vstr s15, [r7, #28] + 80319c2: 68bb ldr r3, [r7, #8] + 80319c4: ee07 3a90 vmov s15, r3 + 80319c8: eef8 6a67 vcvt.f32.u32 s13, s15 + 80319cc: 697b ldr r3, [r7, #20] + 80319ce: ee07 3a90 vmov s15, r3 + 80319d2: eef8 7a67 vcvt.f32.u32 s15, s15 + 80319d6: ee86 7aa7 vdiv.f32 s14, s13, s15 + 80319da: 4b7b ldr r3, [pc, #492] ; (8031bc8 ) + 80319dc: 6c1b ldr r3, [r3, #64] ; 0x40 + 80319de: f3c3 0308 ubfx r3, r3, #0, #9 + 80319e2: ee07 3a90 vmov s15, r3 + 80319e6: eef8 6a67 vcvt.f32.u32 s13, s15 + 80319ea: ed97 6a03 vldr s12, [r7, #12] + 80319ee: eddf 5a78 vldr s11, [pc, #480] ; 8031bd0 + 80319f2: eec6 7a25 vdiv.f32 s15, s12, s11 + 80319f6: ee76 7aa7 vadd.f32 s15, s13, s15 + 80319fa: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 80319fe: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031a02: ee67 7a27 vmul.f32 s15, s14, s15 + 8031a06: edc7 7a07 vstr s15, [r7, #28] } else { pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); } break; - 8031986: e087 b.n 8031a98 + 8031a0a: e087 b.n 8031b1c pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 8031988: 697b ldr r3, [r7, #20] - 803198a: ee07 3a90 vmov s15, r3 - 803198e: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031992: eddf 6a6f vldr s13, [pc, #444] ; 8031b50 - 8031996: ee86 7aa7 vdiv.f32 s14, s13, s15 - 803199a: 4b6a ldr r3, [pc, #424] ; (8031b44 ) - 803199c: 6c1b ldr r3, [r3, #64] ; 0x40 - 803199e: f3c3 0308 ubfx r3, r3, #0, #9 - 80319a2: ee07 3a90 vmov s15, r3 - 80319a6: eef8 6a67 vcvt.f32.u32 s13, s15 - 80319aa: ed97 6a03 vldr s12, [r7, #12] - 80319ae: eddf 5a67 vldr s11, [pc, #412] ; 8031b4c - 80319b2: eec6 7a25 vdiv.f32 s15, s12, s11 - 80319b6: ee76 7aa7 vadd.f32 s15, s13, s15 - 80319ba: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 80319be: ee77 7aa6 vadd.f32 s15, s15, s13 - 80319c2: ee67 7a27 vmul.f32 s15, s14, s15 - 80319c6: edc7 7a07 vstr s15, [r7, #28] + 8031a0c: 697b ldr r3, [r7, #20] + 8031a0e: ee07 3a90 vmov s15, r3 + 8031a12: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031a16: eddf 6a6f vldr s13, [pc, #444] ; 8031bd4 + 8031a1a: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031a1e: 4b6a ldr r3, [pc, #424] ; (8031bc8 ) + 8031a20: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031a22: f3c3 0308 ubfx r3, r3, #0, #9 + 8031a26: ee07 3a90 vmov s15, r3 + 8031a2a: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031a2e: ed97 6a03 vldr s12, [r7, #12] + 8031a32: eddf 5a67 vldr s11, [pc, #412] ; 8031bd0 + 8031a36: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031a3a: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031a3e: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031a42: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031a46: ee67 7a27 vmul.f32 s15, s14, s15 + 8031a4a: edc7 7a07 vstr s15, [r7, #28] break; - 80319ca: e065 b.n 8031a98 + 8031a4e: e065 b.n 8031b1c case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */ pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 80319cc: 697b ldr r3, [r7, #20] - 80319ce: ee07 3a90 vmov s15, r3 - 80319d2: eef8 7a67 vcvt.f32.u32 s15, s15 - 80319d6: eddf 6a5f vldr s13, [pc, #380] ; 8031b54 - 80319da: ee86 7aa7 vdiv.f32 s14, s13, s15 - 80319de: 4b59 ldr r3, [pc, #356] ; (8031b44 ) - 80319e0: 6c1b ldr r3, [r3, #64] ; 0x40 - 80319e2: f3c3 0308 ubfx r3, r3, #0, #9 - 80319e6: ee07 3a90 vmov s15, r3 - 80319ea: eef8 6a67 vcvt.f32.u32 s13, s15 - 80319ee: ed97 6a03 vldr s12, [r7, #12] - 80319f2: eddf 5a56 vldr s11, [pc, #344] ; 8031b4c - 80319f6: eec6 7a25 vdiv.f32 s15, s12, s11 - 80319fa: ee76 7aa7 vadd.f32 s15, s13, s15 - 80319fe: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031a02: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031a06: ee67 7a27 vmul.f32 s15, s14, s15 - 8031a0a: edc7 7a07 vstr s15, [r7, #28] + 8031a50: 697b ldr r3, [r7, #20] + 8031a52: ee07 3a90 vmov s15, r3 + 8031a56: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031a5a: eddf 6a5f vldr s13, [pc, #380] ; 8031bd8 + 8031a5e: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031a62: 4b59 ldr r3, [pc, #356] ; (8031bc8 ) + 8031a64: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031a66: f3c3 0308 ubfx r3, r3, #0, #9 + 8031a6a: ee07 3a90 vmov s15, r3 + 8031a6e: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031a72: ed97 6a03 vldr s12, [r7, #12] + 8031a76: eddf 5a56 vldr s11, [pc, #344] ; 8031bd0 + 8031a7a: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031a7e: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031a82: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031a86: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031a8a: ee67 7a27 vmul.f32 s15, s14, s15 + 8031a8e: edc7 7a07 vstr s15, [r7, #28] break; - 8031a0e: e043 b.n 8031a98 + 8031a92: e043 b.n 8031b1c case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pll3vco = ((float_t)HSE_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 8031a10: 697b ldr r3, [r7, #20] - 8031a12: ee07 3a90 vmov s15, r3 - 8031a16: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031a1a: eddf 6a4f vldr s13, [pc, #316] ; 8031b58 - 8031a1e: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031a22: 4b48 ldr r3, [pc, #288] ; (8031b44 ) - 8031a24: 6c1b ldr r3, [r3, #64] ; 0x40 - 8031a26: f3c3 0308 ubfx r3, r3, #0, #9 - 8031a2a: ee07 3a90 vmov s15, r3 - 8031a2e: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031a32: ed97 6a03 vldr s12, [r7, #12] - 8031a36: eddf 5a45 vldr s11, [pc, #276] ; 8031b4c - 8031a3a: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031a3e: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031a42: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031a46: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031a4a: ee67 7a27 vmul.f32 s15, s14, s15 - 8031a4e: edc7 7a07 vstr s15, [r7, #28] + 8031a94: 697b ldr r3, [r7, #20] + 8031a96: ee07 3a90 vmov s15, r3 + 8031a9a: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031a9e: eddf 6a4f vldr s13, [pc, #316] ; 8031bdc + 8031aa2: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031aa6: 4b48 ldr r3, [pc, #288] ; (8031bc8 ) + 8031aa8: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031aaa: f3c3 0308 ubfx r3, r3, #0, #9 + 8031aae: ee07 3a90 vmov s15, r3 + 8031ab2: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031ab6: ed97 6a03 vldr s12, [r7, #12] + 8031aba: eddf 5a45 vldr s11, [pc, #276] ; 8031bd0 + 8031abe: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031ac2: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031ac6: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031aca: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031ace: ee67 7a27 vmul.f32 s15, s14, s15 + 8031ad2: edc7 7a07 vstr s15, [r7, #28] break; - 8031a52: e021 b.n 8031a98 + 8031ad6: e021 b.n 8031b1c default: pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3/(float_t)0x2000) +(float_t)1 ); - 8031a54: 697b ldr r3, [r7, #20] - 8031a56: ee07 3a90 vmov s15, r3 - 8031a5a: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031a5e: eddf 6a3d vldr s13, [pc, #244] ; 8031b54 - 8031a62: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031a66: 4b37 ldr r3, [pc, #220] ; (8031b44 ) - 8031a68: 6c1b ldr r3, [r3, #64] ; 0x40 - 8031a6a: f3c3 0308 ubfx r3, r3, #0, #9 - 8031a6e: ee07 3a90 vmov s15, r3 - 8031a72: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031a76: ed97 6a03 vldr s12, [r7, #12] - 8031a7a: eddf 5a34 vldr s11, [pc, #208] ; 8031b4c - 8031a7e: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031a82: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031a86: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031a8a: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031a8e: ee67 7a27 vmul.f32 s15, s14, s15 - 8031a92: edc7 7a07 vstr s15, [r7, #28] + 8031ad8: 697b ldr r3, [r7, #20] + 8031ada: ee07 3a90 vmov s15, r3 + 8031ade: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031ae2: eddf 6a3d vldr s13, [pc, #244] ; 8031bd8 + 8031ae6: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031aea: 4b37 ldr r3, [pc, #220] ; (8031bc8 ) + 8031aec: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031aee: f3c3 0308 ubfx r3, r3, #0, #9 + 8031af2: ee07 3a90 vmov s15, r3 + 8031af6: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031afa: ed97 6a03 vldr s12, [r7, #12] + 8031afe: eddf 5a34 vldr s11, [pc, #208] ; 8031bd0 + 8031b02: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031b06: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031b0a: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031b0e: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031b12: ee67 7a27 vmul.f32 s15, s14, s15 + 8031b16: edc7 7a07 vstr s15, [r7, #28] break; - 8031a96: bf00 nop + 8031b1a: bf00 nop } PLL3_Clocks->PLL3_P_Frequency = (uint32_t)(float_t)(pll3vco/((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >>9) + (float_t)1 )) ; - 8031a98: 4b2a ldr r3, [pc, #168] ; (8031b44 ) - 8031a9a: 6c1b ldr r3, [r3, #64] ; 0x40 - 8031a9c: 0a5b lsrs r3, r3, #9 - 8031a9e: f003 037f and.w r3, r3, #127 ; 0x7f - 8031aa2: ee07 3a90 vmov s15, r3 - 8031aa6: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031aaa: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031aae: ee37 7a87 vadd.f32 s14, s15, s14 - 8031ab2: edd7 6a07 vldr s13, [r7, #28] - 8031ab6: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031aba: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031abe: ee17 2a90 vmov r2, s15 - 8031ac2: 687b ldr r3, [r7, #4] - 8031ac4: 601a str r2, [r3, #0] + 8031b1c: 4b2a ldr r3, [pc, #168] ; (8031bc8 ) + 8031b1e: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031b20: 0a5b lsrs r3, r3, #9 + 8031b22: f003 037f and.w r3, r3, #127 ; 0x7f + 8031b26: ee07 3a90 vmov s15, r3 + 8031b2a: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031b2e: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031b32: ee37 7a87 vadd.f32 s14, s15, s14 + 8031b36: edd7 6a07 vldr s13, [r7, #28] + 8031b3a: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031b3e: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031b42: ee17 2a90 vmov r2, s15 + 8031b46: 687b ldr r3, [r7, #4] + 8031b48: 601a str r2, [r3, #0] PLL3_Clocks->PLL3_Q_Frequency = (uint32_t)(float_t)(pll3vco/((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_Q3) >>16) + (float_t)1 )) ; - 8031ac6: 4b1f ldr r3, [pc, #124] ; (8031b44 ) - 8031ac8: 6c1b ldr r3, [r3, #64] ; 0x40 - 8031aca: 0c1b lsrs r3, r3, #16 - 8031acc: f003 037f and.w r3, r3, #127 ; 0x7f - 8031ad0: ee07 3a90 vmov s15, r3 - 8031ad4: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031ad8: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031adc: ee37 7a87 vadd.f32 s14, s15, s14 - 8031ae0: edd7 6a07 vldr s13, [r7, #28] - 8031ae4: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031ae8: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031aec: ee17 2a90 vmov r2, s15 - 8031af0: 687b ldr r3, [r7, #4] - 8031af2: 605a str r2, [r3, #4] + 8031b4a: 4b1f ldr r3, [pc, #124] ; (8031bc8 ) + 8031b4c: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031b4e: 0c1b lsrs r3, r3, #16 + 8031b50: f003 037f and.w r3, r3, #127 ; 0x7f + 8031b54: ee07 3a90 vmov s15, r3 + 8031b58: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031b5c: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031b60: ee37 7a87 vadd.f32 s14, s15, s14 + 8031b64: edd7 6a07 vldr s13, [r7, #28] + 8031b68: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031b6c: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031b70: ee17 2a90 vmov r2, s15 + 8031b74: 687b ldr r3, [r7, #4] + 8031b76: 605a str r2, [r3, #4] PLL3_Clocks->PLL3_R_Frequency = (uint32_t)(float_t)(pll3vco/((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_R3) >>24) + (float_t)1 )) ; - 8031af4: 4b13 ldr r3, [pc, #76] ; (8031b44 ) - 8031af6: 6c1b ldr r3, [r3, #64] ; 0x40 - 8031af8: 0e1b lsrs r3, r3, #24 - 8031afa: f003 037f and.w r3, r3, #127 ; 0x7f - 8031afe: ee07 3a90 vmov s15, r3 - 8031b02: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031b06: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031b0a: ee37 7a87 vadd.f32 s14, s15, s14 - 8031b0e: edd7 6a07 vldr s13, [r7, #28] - 8031b12: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031b16: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031b1a: ee17 2a90 vmov r2, s15 - 8031b1e: 687b ldr r3, [r7, #4] - 8031b20: 609a str r2, [r3, #8] + 8031b78: 4b13 ldr r3, [pc, #76] ; (8031bc8 ) + 8031b7a: 6c1b ldr r3, [r3, #64] ; 0x40 + 8031b7c: 0e1b lsrs r3, r3, #24 + 8031b7e: f003 037f and.w r3, r3, #127 ; 0x7f + 8031b82: ee07 3a90 vmov s15, r3 + 8031b86: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031b8a: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031b8e: ee37 7a87 vadd.f32 s14, s15, s14 + 8031b92: edd7 6a07 vldr s13, [r7, #28] + 8031b96: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031b9a: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031b9e: ee17 2a90 vmov r2, s15 + 8031ba2: 687b ldr r3, [r7, #4] + 8031ba4: 609a str r2, [r3, #8] PLL3_Clocks->PLL3_P_Frequency = 0U; PLL3_Clocks->PLL3_Q_Frequency = 0U; PLL3_Clocks->PLL3_R_Frequency = 0U; } } - 8031b22: e008 b.n 8031b36 + 8031ba6: e008 b.n 8031bba PLL3_Clocks->PLL3_P_Frequency = 0U; - 8031b24: 687b ldr r3, [r7, #4] - 8031b26: 2200 movs r2, #0 - 8031b28: 601a str r2, [r3, #0] + 8031ba8: 687b ldr r3, [r7, #4] + 8031baa: 2200 movs r2, #0 + 8031bac: 601a str r2, [r3, #0] PLL3_Clocks->PLL3_Q_Frequency = 0U; - 8031b2a: 687b ldr r3, [r7, #4] - 8031b2c: 2200 movs r2, #0 - 8031b2e: 605a str r2, [r3, #4] + 8031bae: 687b ldr r3, [r7, #4] + 8031bb0: 2200 movs r2, #0 + 8031bb2: 605a str r2, [r3, #4] PLL3_Clocks->PLL3_R_Frequency = 0U; - 8031b30: 687b ldr r3, [r7, #4] - 8031b32: 2200 movs r2, #0 - 8031b34: 609a str r2, [r3, #8] -} - 8031b36: bf00 nop - 8031b38: 3724 adds r7, #36 ; 0x24 - 8031b3a: 46bd mov sp, r7 - 8031b3c: f85d 7b04 ldr.w r7, [sp], #4 - 8031b40: 4770 bx lr - 8031b42: bf00 nop - 8031b44: 58024400 .word 0x58024400 - 8031b48: 03d09000 .word 0x03d09000 - 8031b4c: 46000000 .word 0x46000000 - 8031b50: 4c742400 .word 0x4c742400 - 8031b54: 4a742400 .word 0x4a742400 - 8031b58: 4bbebc20 .word 0x4bbebc20 - -08031b5c : + 8031bb4: 687b ldr r3, [r7, #4] + 8031bb6: 2200 movs r2, #0 + 8031bb8: 609a str r2, [r3, #8] +} + 8031bba: bf00 nop + 8031bbc: 3724 adds r7, #36 ; 0x24 + 8031bbe: 46bd mov sp, r7 + 8031bc0: f85d 7b04 ldr.w r7, [sp], #4 + 8031bc4: 4770 bx lr + 8031bc6: bf00 nop + 8031bc8: 58024400 .word 0x58024400 + 8031bcc: 03d09000 .word 0x03d09000 + 8031bd0: 46000000 .word 0x46000000 + 8031bd4: 4c742400 .word 0x4c742400 + 8031bd8: 4a742400 .word 0x4a742400 + 8031bdc: 4bbebc20 .word 0x4bbebc20 + +08031be0 : * right PLL1CLK value. Otherwise, any configuration based on this function will be incorrect. * @param PLL1_Clocks structure. * @retval None */ void HAL_RCCEx_GetPLL1ClockFreq(PLL1_ClocksTypeDef* PLL1_Clocks) { - 8031b5c: b480 push {r7} - 8031b5e: b089 sub sp, #36 ; 0x24 - 8031b60: af00 add r7, sp, #0 - 8031b62: 6078 str r0, [r7, #4] + 8031be0: b480 push {r7} + 8031be2: b089 sub sp, #36 ; 0x24 + 8031be4: af00 add r7, sp, #0 + 8031be6: 6078 str r0, [r7, #4] uint32_t pllsource, pll1m, pll1fracen, hsivalue; float_t fracn1, pll1vco; pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); - 8031b64: 4ba0 ldr r3, [pc, #640] ; (8031de8 ) - 8031b66: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031b68: f003 0303 and.w r3, r3, #3 - 8031b6c: 61bb str r3, [r7, #24] + 8031be8: 4ba0 ldr r3, [pc, #640] ; (8031e6c ) + 8031bea: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031bec: f003 0303 and.w r3, r3, #3 + 8031bf0: 61bb str r3, [r7, #24] pll1m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4); - 8031b6e: 4b9e ldr r3, [pc, #632] ; (8031de8 ) - 8031b70: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031b72: 091b lsrs r3, r3, #4 - 8031b74: f003 033f and.w r3, r3, #63 ; 0x3f - 8031b78: 617b str r3, [r7, #20] + 8031bf2: 4b9e ldr r3, [pc, #632] ; (8031e6c ) + 8031bf4: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031bf6: 091b lsrs r3, r3, #4 + 8031bf8: f003 033f and.w r3, r3, #63 ; 0x3f + 8031bfc: 617b str r3, [r7, #20] pll1fracen = RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN; - 8031b7a: 4b9b ldr r3, [pc, #620] ; (8031de8 ) - 8031b7c: 6adb ldr r3, [r3, #44] ; 0x2c - 8031b7e: f003 0301 and.w r3, r3, #1 - 8031b82: 613b str r3, [r7, #16] + 8031bfe: 4b9b ldr r3, [pc, #620] ; (8031e6c ) + 8031c00: 6adb ldr r3, [r3, #44] ; 0x2c + 8031c02: f003 0301 and.w r3, r3, #1 + 8031c06: 613b str r3, [r7, #16] fracn1 = (float_t)(uint32_t)(pll1fracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3)); - 8031b84: 4b98 ldr r3, [pc, #608] ; (8031de8 ) - 8031b86: 6b5b ldr r3, [r3, #52] ; 0x34 - 8031b88: 08db lsrs r3, r3, #3 - 8031b8a: f3c3 030c ubfx r3, r3, #0, #13 - 8031b8e: 693a ldr r2, [r7, #16] - 8031b90: fb02 f303 mul.w r3, r2, r3 - 8031b94: ee07 3a90 vmov s15, r3 - 8031b98: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031b9c: edc7 7a03 vstr s15, [r7, #12] + 8031c08: 4b98 ldr r3, [pc, #608] ; (8031e6c ) + 8031c0a: 6b5b ldr r3, [r3, #52] ; 0x34 + 8031c0c: 08db lsrs r3, r3, #3 + 8031c0e: f3c3 030c ubfx r3, r3, #0, #13 + 8031c12: 693a ldr r2, [r7, #16] + 8031c14: fb02 f303 mul.w r3, r2, r3 + 8031c18: ee07 3a90 vmov s15, r3 + 8031c1c: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031c20: edc7 7a03 vstr s15, [r7, #12] if (pll1m != 0U) - 8031ba0: 697b ldr r3, [r7, #20] - 8031ba2: 2b00 cmp r3, #0 - 8031ba4: f000 8111 beq.w 8031dca + 8031c24: 697b ldr r3, [r7, #20] + 8031c26: 2b00 cmp r3, #0 + 8031c28: f000 8111 beq.w 8031e4e { switch (pllsource) - 8031ba8: 69bb ldr r3, [r7, #24] - 8031baa: 2b02 cmp r3, #2 - 8031bac: f000 8083 beq.w 8031cb6 - 8031bb0: 69bb ldr r3, [r7, #24] - 8031bb2: 2b02 cmp r3, #2 - 8031bb4: f200 80a1 bhi.w 8031cfa - 8031bb8: 69bb ldr r3, [r7, #24] - 8031bba: 2b00 cmp r3, #0 - 8031bbc: d003 beq.n 8031bc6 - 8031bbe: 69bb ldr r3, [r7, #24] - 8031bc0: 2b01 cmp r3, #1 - 8031bc2: d056 beq.n 8031c72 - 8031bc4: e099 b.n 8031cfa + 8031c2c: 69bb ldr r3, [r7, #24] + 8031c2e: 2b02 cmp r3, #2 + 8031c30: f000 8083 beq.w 8031d3a + 8031c34: 69bb ldr r3, [r7, #24] + 8031c36: 2b02 cmp r3, #2 + 8031c38: f200 80a1 bhi.w 8031d7e + 8031c3c: 69bb ldr r3, [r7, #24] + 8031c3e: 2b00 cmp r3, #0 + 8031c40: d003 beq.n 8031c4a + 8031c42: 69bb ldr r3, [r7, #24] + 8031c44: 2b01 cmp r3, #1 + 8031c46: d056 beq.n 8031cf6 + 8031c48: e099 b.n 8031d7e { case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8031bc6: 4b88 ldr r3, [pc, #544] ; (8031de8 ) - 8031bc8: 681b ldr r3, [r3, #0] - 8031bca: f003 0320 and.w r3, r3, #32 - 8031bce: 2b00 cmp r3, #0 - 8031bd0: d02d beq.n 8031c2e + 8031c4a: 4b88 ldr r3, [pc, #544] ; (8031e6c ) + 8031c4c: 681b ldr r3, [r3, #0] + 8031c4e: f003 0320 and.w r3, r3, #32 + 8031c52: 2b00 cmp r3, #0 + 8031c54: d02d beq.n 8031cb2 { hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER()>> 3)); - 8031bd2: 4b85 ldr r3, [pc, #532] ; (8031de8 ) - 8031bd4: 681b ldr r3, [r3, #0] - 8031bd6: 08db lsrs r3, r3, #3 - 8031bd8: f003 0303 and.w r3, r3, #3 - 8031bdc: 4a83 ldr r2, [pc, #524] ; (8031dec ) - 8031bde: fa22 f303 lsr.w r3, r2, r3 - 8031be2: 60bb str r3, [r7, #8] + 8031c56: 4b85 ldr r3, [pc, #532] ; (8031e6c ) + 8031c58: 681b ldr r3, [r3, #0] + 8031c5a: 08db lsrs r3, r3, #3 + 8031c5c: f003 0303 and.w r3, r3, #3 + 8031c60: 4a83 ldr r2, [pc, #524] ; (8031e70 ) + 8031c62: fa22 f303 lsr.w r3, r2, r3 + 8031c66: 60bb str r3, [r7, #8] pll1vco = ((float_t)hsivalue / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031be4: 68bb ldr r3, [r7, #8] - 8031be6: ee07 3a90 vmov s15, r3 - 8031bea: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031bee: 697b ldr r3, [r7, #20] - 8031bf0: ee07 3a90 vmov s15, r3 - 8031bf4: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031bf8: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031bfc: 4b7a ldr r3, [pc, #488] ; (8031de8 ) - 8031bfe: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031c00: f3c3 0308 ubfx r3, r3, #0, #9 - 8031c04: ee07 3a90 vmov s15, r3 - 8031c08: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031c0c: ed97 6a03 vldr s12, [r7, #12] - 8031c10: eddf 5a77 vldr s11, [pc, #476] ; 8031df0 - 8031c14: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031c18: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031c1c: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031c20: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031c24: ee67 7a27 vmul.f32 s15, s14, s15 - 8031c28: edc7 7a07 vstr s15, [r7, #28] + 8031c68: 68bb ldr r3, [r7, #8] + 8031c6a: ee07 3a90 vmov s15, r3 + 8031c6e: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031c72: 697b ldr r3, [r7, #20] + 8031c74: ee07 3a90 vmov s15, r3 + 8031c78: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031c7c: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031c80: 4b7a ldr r3, [pc, #488] ; (8031e6c ) + 8031c82: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031c84: f3c3 0308 ubfx r3, r3, #0, #9 + 8031c88: ee07 3a90 vmov s15, r3 + 8031c8c: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031c90: ed97 6a03 vldr s12, [r7, #12] + 8031c94: eddf 5a77 vldr s11, [pc, #476] ; 8031e74 + 8031c98: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031c9c: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031ca0: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031ca4: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031ca8: ee67 7a27 vmul.f32 s15, s14, s15 + 8031cac: edc7 7a07 vstr s15, [r7, #28] } else { pll1vco = ((float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); } break; - 8031c2c: e087 b.n 8031d3e + 8031cb0: e087 b.n 8031dc2 pll1vco = ((float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031c2e: 697b ldr r3, [r7, #20] - 8031c30: ee07 3a90 vmov s15, r3 - 8031c34: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031c38: eddf 6a6e vldr s13, [pc, #440] ; 8031df4 - 8031c3c: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031c40: 4b69 ldr r3, [pc, #420] ; (8031de8 ) - 8031c42: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031c44: f3c3 0308 ubfx r3, r3, #0, #9 - 8031c48: ee07 3a90 vmov s15, r3 - 8031c4c: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031c50: ed97 6a03 vldr s12, [r7, #12] - 8031c54: eddf 5a66 vldr s11, [pc, #408] ; 8031df0 - 8031c58: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031c5c: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031c60: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031c64: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031c68: ee67 7a27 vmul.f32 s15, s14, s15 - 8031c6c: edc7 7a07 vstr s15, [r7, #28] + 8031cb2: 697b ldr r3, [r7, #20] + 8031cb4: ee07 3a90 vmov s15, r3 + 8031cb8: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031cbc: eddf 6a6e vldr s13, [pc, #440] ; 8031e78 + 8031cc0: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031cc4: 4b69 ldr r3, [pc, #420] ; (8031e6c ) + 8031cc6: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031cc8: f3c3 0308 ubfx r3, r3, #0, #9 + 8031ccc: ee07 3a90 vmov s15, r3 + 8031cd0: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031cd4: ed97 6a03 vldr s12, [r7, #12] + 8031cd8: eddf 5a66 vldr s11, [pc, #408] ; 8031e74 + 8031cdc: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031ce0: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031ce4: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031ce8: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031cec: ee67 7a27 vmul.f32 s15, s14, s15 + 8031cf0: edc7 7a07 vstr s15, [r7, #28] break; - 8031c70: e065 b.n 8031d3e + 8031cf4: e065 b.n 8031dc2 case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */ pll1vco = ((float_t)CSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031c72: 697b ldr r3, [r7, #20] - 8031c74: ee07 3a90 vmov s15, r3 - 8031c78: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031c7c: eddf 6a5e vldr s13, [pc, #376] ; 8031df8 - 8031c80: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031c84: 4b58 ldr r3, [pc, #352] ; (8031de8 ) - 8031c86: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031c88: f3c3 0308 ubfx r3, r3, #0, #9 - 8031c8c: ee07 3a90 vmov s15, r3 - 8031c90: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031c94: ed97 6a03 vldr s12, [r7, #12] - 8031c98: eddf 5a55 vldr s11, [pc, #340] ; 8031df0 - 8031c9c: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031ca0: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031ca4: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031ca8: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031cac: ee67 7a27 vmul.f32 s15, s14, s15 - 8031cb0: edc7 7a07 vstr s15, [r7, #28] + 8031cf6: 697b ldr r3, [r7, #20] + 8031cf8: ee07 3a90 vmov s15, r3 + 8031cfc: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031d00: eddf 6a5e vldr s13, [pc, #376] ; 8031e7c + 8031d04: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031d08: 4b58 ldr r3, [pc, #352] ; (8031e6c ) + 8031d0a: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031d0c: f3c3 0308 ubfx r3, r3, #0, #9 + 8031d10: ee07 3a90 vmov s15, r3 + 8031d14: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031d18: ed97 6a03 vldr s12, [r7, #12] + 8031d1c: eddf 5a55 vldr s11, [pc, #340] ; 8031e74 + 8031d20: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031d24: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031d28: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031d2c: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031d30: ee67 7a27 vmul.f32 s15, s14, s15 + 8031d34: edc7 7a07 vstr s15, [r7, #28] break; - 8031cb4: e043 b.n 8031d3e + 8031d38: e043 b.n 8031dc2 case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ pll1vco = ((float_t)HSE_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031cb6: 697b ldr r3, [r7, #20] - 8031cb8: ee07 3a90 vmov s15, r3 - 8031cbc: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031cc0: eddf 6a4e vldr s13, [pc, #312] ; 8031dfc - 8031cc4: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031cc8: 4b47 ldr r3, [pc, #284] ; (8031de8 ) - 8031cca: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031ccc: f3c3 0308 ubfx r3, r3, #0, #9 - 8031cd0: ee07 3a90 vmov s15, r3 - 8031cd4: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031cd8: ed97 6a03 vldr s12, [r7, #12] - 8031cdc: eddf 5a44 vldr s11, [pc, #272] ; 8031df0 - 8031ce0: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031ce4: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031ce8: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031cec: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031cf0: ee67 7a27 vmul.f32 s15, s14, s15 - 8031cf4: edc7 7a07 vstr s15, [r7, #28] + 8031d3a: 697b ldr r3, [r7, #20] + 8031d3c: ee07 3a90 vmov s15, r3 + 8031d40: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031d44: eddf 6a4e vldr s13, [pc, #312] ; 8031e80 + 8031d48: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031d4c: 4b47 ldr r3, [pc, #284] ; (8031e6c ) + 8031d4e: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031d50: f3c3 0308 ubfx r3, r3, #0, #9 + 8031d54: ee07 3a90 vmov s15, r3 + 8031d58: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031d5c: ed97 6a03 vldr s12, [r7, #12] + 8031d60: eddf 5a44 vldr s11, [pc, #272] ; 8031e74 + 8031d64: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031d68: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031d6c: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031d70: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031d74: ee67 7a27 vmul.f32 s15, s14, s15 + 8031d78: edc7 7a07 vstr s15, [r7, #28] break; - 8031cf8: e021 b.n 8031d3e + 8031d7c: e021 b.n 8031dc2 default: pll1vco = ((float_t)HSI_VALUE / (float_t)pll1m) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); - 8031cfa: 697b ldr r3, [r7, #20] - 8031cfc: ee07 3a90 vmov s15, r3 - 8031d00: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031d04: eddf 6a3b vldr s13, [pc, #236] ; 8031df4 - 8031d08: ee86 7aa7 vdiv.f32 s14, s13, s15 - 8031d0c: 4b36 ldr r3, [pc, #216] ; (8031de8 ) - 8031d0e: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031d10: f3c3 0308 ubfx r3, r3, #0, #9 - 8031d14: ee07 3a90 vmov s15, r3 - 8031d18: eef8 6a67 vcvt.f32.u32 s13, s15 - 8031d1c: ed97 6a03 vldr s12, [r7, #12] - 8031d20: eddf 5a33 vldr s11, [pc, #204] ; 8031df0 - 8031d24: eec6 7a25 vdiv.f32 s15, s12, s11 - 8031d28: ee76 7aa7 vadd.f32 s15, s13, s15 - 8031d2c: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 - 8031d30: ee77 7aa6 vadd.f32 s15, s15, s13 - 8031d34: ee67 7a27 vmul.f32 s15, s14, s15 - 8031d38: edc7 7a07 vstr s15, [r7, #28] + 8031d7e: 697b ldr r3, [r7, #20] + 8031d80: ee07 3a90 vmov s15, r3 + 8031d84: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031d88: eddf 6a3b vldr s13, [pc, #236] ; 8031e78 + 8031d8c: ee86 7aa7 vdiv.f32 s14, s13, s15 + 8031d90: 4b36 ldr r3, [pc, #216] ; (8031e6c ) + 8031d92: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031d94: f3c3 0308 ubfx r3, r3, #0, #9 + 8031d98: ee07 3a90 vmov s15, r3 + 8031d9c: eef8 6a67 vcvt.f32.u32 s13, s15 + 8031da0: ed97 6a03 vldr s12, [r7, #12] + 8031da4: eddf 5a33 vldr s11, [pc, #204] ; 8031e74 + 8031da8: eec6 7a25 vdiv.f32 s15, s12, s11 + 8031dac: ee76 7aa7 vadd.f32 s15, s13, s15 + 8031db0: eef7 6a00 vmov.f32 s13, #112 ; 0x3f800000 1.0 + 8031db4: ee77 7aa6 vadd.f32 s15, s15, s13 + 8031db8: ee67 7a27 vmul.f32 s15, s14, s15 + 8031dbc: edc7 7a07 vstr s15, [r7, #28] break; - 8031d3c: bf00 nop + 8031dc0: bf00 nop } PLL1_Clocks->PLL1_P_Frequency = (uint32_t)(float_t)(pll1vco/((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + (float_t)1 )) ; - 8031d3e: 4b2a ldr r3, [pc, #168] ; (8031de8 ) - 8031d40: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031d42: 0a5b lsrs r3, r3, #9 - 8031d44: f003 037f and.w r3, r3, #127 ; 0x7f - 8031d48: ee07 3a90 vmov s15, r3 - 8031d4c: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031d50: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031d54: ee37 7a87 vadd.f32 s14, s15, s14 - 8031d58: edd7 6a07 vldr s13, [r7, #28] - 8031d5c: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031d60: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031d64: ee17 2a90 vmov r2, s15 - 8031d68: 687b ldr r3, [r7, #4] - 8031d6a: 601a str r2, [r3, #0] + 8031dc2: 4b2a ldr r3, [pc, #168] ; (8031e6c ) + 8031dc4: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031dc6: 0a5b lsrs r3, r3, #9 + 8031dc8: f003 037f and.w r3, r3, #127 ; 0x7f + 8031dcc: ee07 3a90 vmov s15, r3 + 8031dd0: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031dd4: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031dd8: ee37 7a87 vadd.f32 s14, s15, s14 + 8031ddc: edd7 6a07 vldr s13, [r7, #28] + 8031de0: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031de4: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031de8: ee17 2a90 vmov r2, s15 + 8031dec: 687b ldr r3, [r7, #4] + 8031dee: 601a str r2, [r3, #0] PLL1_Clocks->PLL1_Q_Frequency = (uint32_t)(float_t)(pll1vco/((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_Q1) >>16) + (float_t)1 )) ; - 8031d6c: 4b1e ldr r3, [pc, #120] ; (8031de8 ) - 8031d6e: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031d70: 0c1b lsrs r3, r3, #16 - 8031d72: f003 037f and.w r3, r3, #127 ; 0x7f - 8031d76: ee07 3a90 vmov s15, r3 - 8031d7a: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031d7e: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031d82: ee37 7a87 vadd.f32 s14, s15, s14 - 8031d86: edd7 6a07 vldr s13, [r7, #28] - 8031d8a: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031d8e: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031d92: ee17 2a90 vmov r2, s15 - 8031d96: 687b ldr r3, [r7, #4] - 8031d98: 605a str r2, [r3, #4] + 8031df0: 4b1e ldr r3, [pc, #120] ; (8031e6c ) + 8031df2: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031df4: 0c1b lsrs r3, r3, #16 + 8031df6: f003 037f and.w r3, r3, #127 ; 0x7f + 8031dfa: ee07 3a90 vmov s15, r3 + 8031dfe: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031e02: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031e06: ee37 7a87 vadd.f32 s14, s15, s14 + 8031e0a: edd7 6a07 vldr s13, [r7, #28] + 8031e0e: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031e12: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031e16: ee17 2a90 vmov r2, s15 + 8031e1a: 687b ldr r3, [r7, #4] + 8031e1c: 605a str r2, [r3, #4] PLL1_Clocks->PLL1_R_Frequency = (uint32_t)(float_t)(pll1vco/((float_t)(uint32_t)((RCC->PLL1DIVR & RCC_PLL1DIVR_R1) >>24) + (float_t)1 )) ; - 8031d9a: 4b13 ldr r3, [pc, #76] ; (8031de8 ) - 8031d9c: 6b1b ldr r3, [r3, #48] ; 0x30 - 8031d9e: 0e1b lsrs r3, r3, #24 - 8031da0: f003 037f and.w r3, r3, #127 ; 0x7f - 8031da4: ee07 3a90 vmov s15, r3 - 8031da8: eef8 7a67 vcvt.f32.u32 s15, s15 - 8031dac: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 - 8031db0: ee37 7a87 vadd.f32 s14, s15, s14 - 8031db4: edd7 6a07 vldr s13, [r7, #28] - 8031db8: eec6 7a87 vdiv.f32 s15, s13, s14 - 8031dbc: eefc 7ae7 vcvt.u32.f32 s15, s15 - 8031dc0: ee17 2a90 vmov r2, s15 - 8031dc4: 687b ldr r3, [r7, #4] - 8031dc6: 609a str r2, [r3, #8] + 8031e1e: 4b13 ldr r3, [pc, #76] ; (8031e6c ) + 8031e20: 6b1b ldr r3, [r3, #48] ; 0x30 + 8031e22: 0e1b lsrs r3, r3, #24 + 8031e24: f003 037f and.w r3, r3, #127 ; 0x7f + 8031e28: ee07 3a90 vmov s15, r3 + 8031e2c: eef8 7a67 vcvt.f32.u32 s15, s15 + 8031e30: eeb7 7a00 vmov.f32 s14, #112 ; 0x3f800000 1.0 + 8031e34: ee37 7a87 vadd.f32 s14, s15, s14 + 8031e38: edd7 6a07 vldr s13, [r7, #28] + 8031e3c: eec6 7a87 vdiv.f32 s15, s13, s14 + 8031e40: eefc 7ae7 vcvt.u32.f32 s15, s15 + 8031e44: ee17 2a90 vmov r2, s15 + 8031e48: 687b ldr r3, [r7, #4] + 8031e4a: 609a str r2, [r3, #8] PLL1_Clocks->PLL1_P_Frequency = 0U; PLL1_Clocks->PLL1_Q_Frequency = 0U; PLL1_Clocks->PLL1_R_Frequency = 0U; } } - 8031dc8: e008 b.n 8031ddc + 8031e4c: e008 b.n 8031e60 PLL1_Clocks->PLL1_P_Frequency = 0U; - 8031dca: 687b ldr r3, [r7, #4] - 8031dcc: 2200 movs r2, #0 - 8031dce: 601a str r2, [r3, #0] + 8031e4e: 687b ldr r3, [r7, #4] + 8031e50: 2200 movs r2, #0 + 8031e52: 601a str r2, [r3, #0] PLL1_Clocks->PLL1_Q_Frequency = 0U; - 8031dd0: 687b ldr r3, [r7, #4] - 8031dd2: 2200 movs r2, #0 - 8031dd4: 605a str r2, [r3, #4] + 8031e54: 687b ldr r3, [r7, #4] + 8031e56: 2200 movs r2, #0 + 8031e58: 605a str r2, [r3, #4] PLL1_Clocks->PLL1_R_Frequency = 0U; - 8031dd6: 687b ldr r3, [r7, #4] - 8031dd8: 2200 movs r2, #0 - 8031dda: 609a str r2, [r3, #8] -} - 8031ddc: bf00 nop - 8031dde: 3724 adds r7, #36 ; 0x24 - 8031de0: 46bd mov sp, r7 - 8031de2: f85d 7b04 ldr.w r7, [sp], #4 - 8031de6: 4770 bx lr - 8031de8: 58024400 .word 0x58024400 - 8031dec: 03d09000 .word 0x03d09000 - 8031df0: 46000000 .word 0x46000000 - 8031df4: 4c742400 .word 0x4c742400 - 8031df8: 4a742400 .word 0x4a742400 - 8031dfc: 4bbebc20 .word 0x4bbebc20 - -08031e00 : + 8031e5a: 687b ldr r3, [r7, #4] + 8031e5c: 2200 movs r2, #0 + 8031e5e: 609a str r2, [r3, #8] +} + 8031e60: bf00 nop + 8031e62: 3724 adds r7, #36 ; 0x24 + 8031e64: 46bd mov sp, r7 + 8031e66: f85d 7b04 ldr.w r7, [sp], #4 + 8031e6a: 4770 bx lr + 8031e6c: 58024400 .word 0x58024400 + 8031e70: 03d09000 .word 0x03d09000 + 8031e74: 46000000 .word 0x46000000 + 8031e78: 4c742400 .word 0x4c742400 + 8031e7c: 4a742400 .word 0x4a742400 + 8031e80: 4bbebc20 .word 0x4bbebc20 + +08031e84 : * @note PLL2 is temporary disabled to apply new parameters * * @retval HAL status */ static HAL_StatusTypeDef RCCEx_PLL2_Config(RCC_PLL2InitTypeDef *pll2, uint32_t Divider) { - 8031e00: b580 push {r7, lr} - 8031e02: b084 sub sp, #16 - 8031e04: af00 add r7, sp, #0 - 8031e06: 6078 str r0, [r7, #4] - 8031e08: 6039 str r1, [r7, #0] + 8031e84: b580 push {r7, lr} + 8031e86: b084 sub sp, #16 + 8031e88: af00 add r7, sp, #0 + 8031e8a: 6078 str r0, [r7, #4] + 8031e8c: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status = HAL_OK; - 8031e0a: 2300 movs r3, #0 - 8031e0c: 73fb strb r3, [r7, #15] + 8031e8e: 2300 movs r3, #0 + 8031e90: 73fb strb r3, [r7, #15] assert_param(IS_RCC_PLL2RGE_VALUE(pll2->PLL2RGE)); assert_param(IS_RCC_PLL2VCO_VALUE(pll2->PLL2VCOSEL)); assert_param(IS_RCC_PLLFRACN_VALUE(pll2->PLL2FRACN)); /* Check that PLL2 OSC clock source is already set */ if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE) - 8031e0e: 4b53 ldr r3, [pc, #332] ; (8031f5c ) - 8031e10: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031e12: f003 0303 and.w r3, r3, #3 - 8031e16: 2b03 cmp r3, #3 - 8031e18: d101 bne.n 8031e1e + 8031e92: 4b53 ldr r3, [pc, #332] ; (8031fe0 ) + 8031e94: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031e96: f003 0303 and.w r3, r3, #3 + 8031e9a: 2b03 cmp r3, #3 + 8031e9c: d101 bne.n 8031ea2 { return HAL_ERROR; - 8031e1a: 2301 movs r3, #1 - 8031e1c: e099 b.n 8031f52 + 8031e9e: 2301 movs r3, #1 + 8031ea0: e099 b.n 8031fd6 else { /* Disable PLL2. */ __HAL_RCC_PLL2_DISABLE(); - 8031e1e: 4b4f ldr r3, [pc, #316] ; (8031f5c ) - 8031e20: 681b ldr r3, [r3, #0] - 8031e22: 4a4e ldr r2, [pc, #312] ; (8031f5c ) - 8031e24: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000 - 8031e28: 6013 str r3, [r2, #0] + 8031ea2: 4b4f ldr r3, [pc, #316] ; (8031fe0 ) + 8031ea4: 681b ldr r3, [r3, #0] + 8031ea6: 4a4e ldr r2, [pc, #312] ; (8031fe0 ) + 8031ea8: f023 6380 bic.w r3, r3, #67108864 ; 0x4000000 + 8031eac: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8031e2a: f7f4 f8cb bl 8025fc4 - 8031e2e: 60b8 str r0, [r7, #8] + 8031eae: f7f4 f8cb bl 8026048 + 8031eb2: 60b8 str r0, [r7, #8] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U) - 8031e30: e008 b.n 8031e44 + 8031eb4: e008 b.n 8031ec8 { if( (HAL_GetTick() - tickstart ) > PLL2_TIMEOUT_VALUE) - 8031e32: f7f4 f8c7 bl 8025fc4 - 8031e36: 4602 mov r2, r0 - 8031e38: 68bb ldr r3, [r7, #8] - 8031e3a: 1ad3 subs r3, r2, r3 - 8031e3c: 2b02 cmp r3, #2 - 8031e3e: d901 bls.n 8031e44 + 8031eb6: f7f4 f8c7 bl 8026048 + 8031eba: 4602 mov r2, r0 + 8031ebc: 68bb ldr r3, [r7, #8] + 8031ebe: 1ad3 subs r3, r2, r3 + 8031ec0: 2b02 cmp r3, #2 + 8031ec2: d901 bls.n 8031ec8 { return HAL_TIMEOUT; - 8031e40: 2303 movs r3, #3 - 8031e42: e086 b.n 8031f52 + 8031ec4: 2303 movs r3, #3 + 8031ec6: e086 b.n 8031fd6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U) - 8031e44: 4b45 ldr r3, [pc, #276] ; (8031f5c ) - 8031e46: 681b ldr r3, [r3, #0] - 8031e48: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8031e4c: 2b00 cmp r3, #0 - 8031e4e: d1f0 bne.n 8031e32 + 8031ec8: 4b45 ldr r3, [pc, #276] ; (8031fe0 ) + 8031eca: 681b ldr r3, [r3, #0] + 8031ecc: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8031ed0: 2b00 cmp r3, #0 + 8031ed2: d1f0 bne.n 8031eb6 } } /* Configure PLL2 multiplication and division factors. */ __HAL_RCC_PLL2_CONFIG(pll2->PLL2M, - 8031e50: 4b42 ldr r3, [pc, #264] ; (8031f5c ) - 8031e52: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031e54: f423 327c bic.w r2, r3, #258048 ; 0x3f000 - 8031e58: 687b ldr r3, [r7, #4] - 8031e5a: 681b ldr r3, [r3, #0] - 8031e5c: 031b lsls r3, r3, #12 - 8031e5e: 493f ldr r1, [pc, #252] ; (8031f5c ) - 8031e60: 4313 orrs r3, r2 - 8031e62: 628b str r3, [r1, #40] ; 0x28 - 8031e64: 687b ldr r3, [r7, #4] - 8031e66: 685b ldr r3, [r3, #4] - 8031e68: 3b01 subs r3, #1 - 8031e6a: f3c3 0208 ubfx r2, r3, #0, #9 - 8031e6e: 687b ldr r3, [r7, #4] - 8031e70: 689b ldr r3, [r3, #8] - 8031e72: 3b01 subs r3, #1 - 8031e74: 025b lsls r3, r3, #9 - 8031e76: b29b uxth r3, r3 - 8031e78: 431a orrs r2, r3 - 8031e7a: 687b ldr r3, [r7, #4] - 8031e7c: 68db ldr r3, [r3, #12] - 8031e7e: 3b01 subs r3, #1 - 8031e80: 041b lsls r3, r3, #16 - 8031e82: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 8031e86: 431a orrs r2, r3 - 8031e88: 687b ldr r3, [r7, #4] - 8031e8a: 691b ldr r3, [r3, #16] - 8031e8c: 3b01 subs r3, #1 - 8031e8e: 061b lsls r3, r3, #24 - 8031e90: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 - 8031e94: 4931 ldr r1, [pc, #196] ; (8031f5c ) - 8031e96: 4313 orrs r3, r2 - 8031e98: 638b str r3, [r1, #56] ; 0x38 + 8031ed4: 4b42 ldr r3, [pc, #264] ; (8031fe0 ) + 8031ed6: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031ed8: f423 327c bic.w r2, r3, #258048 ; 0x3f000 + 8031edc: 687b ldr r3, [r7, #4] + 8031ede: 681b ldr r3, [r3, #0] + 8031ee0: 031b lsls r3, r3, #12 + 8031ee2: 493f ldr r1, [pc, #252] ; (8031fe0 ) + 8031ee4: 4313 orrs r3, r2 + 8031ee6: 628b str r3, [r1, #40] ; 0x28 + 8031ee8: 687b ldr r3, [r7, #4] + 8031eea: 685b ldr r3, [r3, #4] + 8031eec: 3b01 subs r3, #1 + 8031eee: f3c3 0208 ubfx r2, r3, #0, #9 + 8031ef2: 687b ldr r3, [r7, #4] + 8031ef4: 689b ldr r3, [r3, #8] + 8031ef6: 3b01 subs r3, #1 + 8031ef8: 025b lsls r3, r3, #9 + 8031efa: b29b uxth r3, r3 + 8031efc: 431a orrs r2, r3 + 8031efe: 687b ldr r3, [r7, #4] + 8031f00: 68db ldr r3, [r3, #12] + 8031f02: 3b01 subs r3, #1 + 8031f04: 041b lsls r3, r3, #16 + 8031f06: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 8031f0a: 431a orrs r2, r3 + 8031f0c: 687b ldr r3, [r7, #4] + 8031f0e: 691b ldr r3, [r3, #16] + 8031f10: 3b01 subs r3, #1 + 8031f12: 061b lsls r3, r3, #24 + 8031f14: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 + 8031f18: 4931 ldr r1, [pc, #196] ; (8031fe0 ) + 8031f1a: 4313 orrs r3, r2 + 8031f1c: 638b str r3, [r1, #56] ; 0x38 pll2->PLL2P, pll2->PLL2Q, pll2->PLL2R); /* Select PLL2 input reference frequency range: VCI */ __HAL_RCC_PLL2_VCIRANGE(pll2->PLL2RGE) ; - 8031e9a: 4b30 ldr r3, [pc, #192] ; (8031f5c ) - 8031e9c: 6adb ldr r3, [r3, #44] ; 0x2c - 8031e9e: f023 02c0 bic.w r2, r3, #192 ; 0xc0 - 8031ea2: 687b ldr r3, [r7, #4] - 8031ea4: 695b ldr r3, [r3, #20] - 8031ea6: 492d ldr r1, [pc, #180] ; (8031f5c ) - 8031ea8: 4313 orrs r3, r2 - 8031eaa: 62cb str r3, [r1, #44] ; 0x2c + 8031f1e: 4b30 ldr r3, [pc, #192] ; (8031fe0 ) + 8031f20: 6adb ldr r3, [r3, #44] ; 0x2c + 8031f22: f023 02c0 bic.w r2, r3, #192 ; 0xc0 + 8031f26: 687b ldr r3, [r7, #4] + 8031f28: 695b ldr r3, [r3, #20] + 8031f2a: 492d ldr r1, [pc, #180] ; (8031fe0 ) + 8031f2c: 4313 orrs r3, r2 + 8031f2e: 62cb str r3, [r1, #44] ; 0x2c /* Select PLL2 output frequency range : VCO */ __HAL_RCC_PLL2_VCORANGE(pll2->PLL2VCOSEL) ; - 8031eac: 4b2b ldr r3, [pc, #172] ; (8031f5c ) - 8031eae: 6adb ldr r3, [r3, #44] ; 0x2c - 8031eb0: f023 0220 bic.w r2, r3, #32 - 8031eb4: 687b ldr r3, [r7, #4] - 8031eb6: 699b ldr r3, [r3, #24] - 8031eb8: 4928 ldr r1, [pc, #160] ; (8031f5c ) - 8031eba: 4313 orrs r3, r2 - 8031ebc: 62cb str r3, [r1, #44] ; 0x2c + 8031f30: 4b2b ldr r3, [pc, #172] ; (8031fe0 ) + 8031f32: 6adb ldr r3, [r3, #44] ; 0x2c + 8031f34: f023 0220 bic.w r2, r3, #32 + 8031f38: 687b ldr r3, [r7, #4] + 8031f3a: 699b ldr r3, [r3, #24] + 8031f3c: 4928 ldr r1, [pc, #160] ; (8031fe0 ) + 8031f3e: 4313 orrs r3, r2 + 8031f40: 62cb str r3, [r1, #44] ; 0x2c /* Disable PLL2FRACN . */ __HAL_RCC_PLL2FRACN_DISABLE(); - 8031ebe: 4b27 ldr r3, [pc, #156] ; (8031f5c ) - 8031ec0: 6adb ldr r3, [r3, #44] ; 0x2c - 8031ec2: 4a26 ldr r2, [pc, #152] ; (8031f5c ) - 8031ec4: f023 0310 bic.w r3, r3, #16 - 8031ec8: 62d3 str r3, [r2, #44] ; 0x2c + 8031f42: 4b27 ldr r3, [pc, #156] ; (8031fe0 ) + 8031f44: 6adb ldr r3, [r3, #44] ; 0x2c + 8031f46: 4a26 ldr r2, [pc, #152] ; (8031fe0 ) + 8031f48: f023 0310 bic.w r3, r3, #16 + 8031f4c: 62d3 str r3, [r2, #44] ; 0x2c /* Configures PLL2 clock Fractional Part Of The Multiplication Factor */ __HAL_RCC_PLL2FRACN_CONFIG(pll2->PLL2FRACN); - 8031eca: 4b24 ldr r3, [pc, #144] ; (8031f5c ) - 8031ecc: 6bda ldr r2, [r3, #60] ; 0x3c - 8031ece: 4b24 ldr r3, [pc, #144] ; (8031f60 ) - 8031ed0: 4013 ands r3, r2 - 8031ed2: 687a ldr r2, [r7, #4] - 8031ed4: 69d2 ldr r2, [r2, #28] - 8031ed6: 00d2 lsls r2, r2, #3 - 8031ed8: 4920 ldr r1, [pc, #128] ; (8031f5c ) - 8031eda: 4313 orrs r3, r2 - 8031edc: 63cb str r3, [r1, #60] ; 0x3c + 8031f4e: 4b24 ldr r3, [pc, #144] ; (8031fe0 ) + 8031f50: 6bda ldr r2, [r3, #60] ; 0x3c + 8031f52: 4b24 ldr r3, [pc, #144] ; (8031fe4 ) + 8031f54: 4013 ands r3, r2 + 8031f56: 687a ldr r2, [r7, #4] + 8031f58: 69d2 ldr r2, [r2, #28] + 8031f5a: 00d2 lsls r2, r2, #3 + 8031f5c: 4920 ldr r1, [pc, #128] ; (8031fe0 ) + 8031f5e: 4313 orrs r3, r2 + 8031f60: 63cb str r3, [r1, #60] ; 0x3c /* Enable PLL2FRACN . */ __HAL_RCC_PLL2FRACN_ENABLE(); - 8031ede: 4b1f ldr r3, [pc, #124] ; (8031f5c ) - 8031ee0: 6adb ldr r3, [r3, #44] ; 0x2c - 8031ee2: 4a1e ldr r2, [pc, #120] ; (8031f5c ) - 8031ee4: f043 0310 orr.w r3, r3, #16 - 8031ee8: 62d3 str r3, [r2, #44] ; 0x2c + 8031f62: 4b1f ldr r3, [pc, #124] ; (8031fe0 ) + 8031f64: 6adb ldr r3, [r3, #44] ; 0x2c + 8031f66: 4a1e ldr r2, [pc, #120] ; (8031fe0 ) + 8031f68: f043 0310 orr.w r3, r3, #16 + 8031f6c: 62d3 str r3, [r2, #44] ; 0x2c /* Enable the PLL2 clock output */ if(Divider == DIVIDER_P_UPDATE) - 8031eea: 683b ldr r3, [r7, #0] - 8031eec: 2b00 cmp r3, #0 - 8031eee: d106 bne.n 8031efe + 8031f6e: 683b ldr r3, [r7, #0] + 8031f70: 2b00 cmp r3, #0 + 8031f72: d106 bne.n 8031f82 { __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP); - 8031ef0: 4b1a ldr r3, [pc, #104] ; (8031f5c ) - 8031ef2: 6adb ldr r3, [r3, #44] ; 0x2c - 8031ef4: 4a19 ldr r2, [pc, #100] ; (8031f5c ) - 8031ef6: f443 2300 orr.w r3, r3, #524288 ; 0x80000 - 8031efa: 62d3 str r3, [r2, #44] ; 0x2c - 8031efc: e00f b.n 8031f1e + 8031f74: 4b1a ldr r3, [pc, #104] ; (8031fe0 ) + 8031f76: 6adb ldr r3, [r3, #44] ; 0x2c + 8031f78: 4a19 ldr r2, [pc, #100] ; (8031fe0 ) + 8031f7a: f443 2300 orr.w r3, r3, #524288 ; 0x80000 + 8031f7e: 62d3 str r3, [r2, #44] ; 0x2c + 8031f80: e00f b.n 8031fa2 } else if(Divider == DIVIDER_Q_UPDATE) - 8031efe: 683b ldr r3, [r7, #0] - 8031f00: 2b01 cmp r3, #1 - 8031f02: d106 bne.n 8031f12 + 8031f82: 683b ldr r3, [r7, #0] + 8031f84: 2b01 cmp r3, #1 + 8031f86: d106 bne.n 8031f96 { __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVQ); - 8031f04: 4b15 ldr r3, [pc, #84] ; (8031f5c ) - 8031f06: 6adb ldr r3, [r3, #44] ; 0x2c - 8031f08: 4a14 ldr r2, [pc, #80] ; (8031f5c ) - 8031f0a: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 - 8031f0e: 62d3 str r3, [r2, #44] ; 0x2c - 8031f10: e005 b.n 8031f1e + 8031f88: 4b15 ldr r3, [pc, #84] ; (8031fe0 ) + 8031f8a: 6adb ldr r3, [r3, #44] ; 0x2c + 8031f8c: 4a14 ldr r2, [pc, #80] ; (8031fe0 ) + 8031f8e: f443 1380 orr.w r3, r3, #1048576 ; 0x100000 + 8031f92: 62d3 str r3, [r2, #44] ; 0x2c + 8031f94: e005 b.n 8031fa2 } else { __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVR); - 8031f12: 4b12 ldr r3, [pc, #72] ; (8031f5c ) - 8031f14: 6adb ldr r3, [r3, #44] ; 0x2c - 8031f16: 4a11 ldr r2, [pc, #68] ; (8031f5c ) - 8031f18: f443 1300 orr.w r3, r3, #2097152 ; 0x200000 - 8031f1c: 62d3 str r3, [r2, #44] ; 0x2c + 8031f96: 4b12 ldr r3, [pc, #72] ; (8031fe0 ) + 8031f98: 6adb ldr r3, [r3, #44] ; 0x2c + 8031f9a: 4a11 ldr r2, [pc, #68] ; (8031fe0 ) + 8031f9c: f443 1300 orr.w r3, r3, #2097152 ; 0x200000 + 8031fa0: 62d3 str r3, [r2, #44] ; 0x2c } /* Enable PLL2. */ __HAL_RCC_PLL2_ENABLE(); - 8031f1e: 4b0f ldr r3, [pc, #60] ; (8031f5c ) - 8031f20: 681b ldr r3, [r3, #0] - 8031f22: 4a0e ldr r2, [pc, #56] ; (8031f5c ) - 8031f24: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 - 8031f28: 6013 str r3, [r2, #0] + 8031fa2: 4b0f ldr r3, [pc, #60] ; (8031fe0 ) + 8031fa4: 681b ldr r3, [r3, #0] + 8031fa6: 4a0e ldr r2, [pc, #56] ; (8031fe0 ) + 8031fa8: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 + 8031fac: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8031f2a: f7f4 f84b bl 8025fc4 - 8031f2e: 60b8 str r0, [r7, #8] + 8031fae: f7f4 f84b bl 8026048 + 8031fb2: 60b8 str r0, [r7, #8] /* Wait till PLL2 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U) - 8031f30: e008 b.n 8031f44 + 8031fb4: e008 b.n 8031fc8 { if( (HAL_GetTick() - tickstart ) > PLL2_TIMEOUT_VALUE) - 8031f32: f7f4 f847 bl 8025fc4 - 8031f36: 4602 mov r2, r0 - 8031f38: 68bb ldr r3, [r7, #8] - 8031f3a: 1ad3 subs r3, r2, r3 - 8031f3c: 2b02 cmp r3, #2 - 8031f3e: d901 bls.n 8031f44 + 8031fb6: f7f4 f847 bl 8026048 + 8031fba: 4602 mov r2, r0 + 8031fbc: 68bb ldr r3, [r7, #8] + 8031fbe: 1ad3 subs r3, r2, r3 + 8031fc0: 2b02 cmp r3, #2 + 8031fc2: d901 bls.n 8031fc8 { return HAL_TIMEOUT; - 8031f40: 2303 movs r3, #3 - 8031f42: e006 b.n 8031f52 + 8031fc4: 2303 movs r3, #3 + 8031fc6: e006 b.n 8031fd6 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U) - 8031f44: 4b05 ldr r3, [pc, #20] ; (8031f5c ) - 8031f46: 681b ldr r3, [r3, #0] - 8031f48: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 - 8031f4c: 2b00 cmp r3, #0 - 8031f4e: d0f0 beq.n 8031f32 + 8031fc8: 4b05 ldr r3, [pc, #20] ; (8031fe0 ) + 8031fca: 681b ldr r3, [r3, #0] + 8031fcc: f003 6300 and.w r3, r3, #134217728 ; 0x8000000 + 8031fd0: 2b00 cmp r3, #0 + 8031fd2: d0f0 beq.n 8031fb6 } } return status; - 8031f50: 7bfb ldrb r3, [r7, #15] + 8031fd4: 7bfb ldrb r3, [r7, #15] } - 8031f52: 4618 mov r0, r3 - 8031f54: 3710 adds r7, #16 - 8031f56: 46bd mov sp, r7 - 8031f58: bd80 pop {r7, pc} - 8031f5a: bf00 nop - 8031f5c: 58024400 .word 0x58024400 - 8031f60: ffff0007 .word 0xffff0007 + 8031fd6: 4618 mov r0, r3 + 8031fd8: 3710 adds r7, #16 + 8031fda: 46bd mov sp, r7 + 8031fdc: bd80 pop {r7, pc} + 8031fde: bf00 nop + 8031fe0: 58024400 .word 0x58024400 + 8031fe4: ffff0007 .word 0xffff0007 -08031f64 : +08031fe8 : * @note PLL3 is temporary disabled to apply new parameters * * @retval HAL status */ static HAL_StatusTypeDef RCCEx_PLL3_Config(RCC_PLL3InitTypeDef *pll3, uint32_t Divider) { - 8031f64: b580 push {r7, lr} - 8031f66: b084 sub sp, #16 - 8031f68: af00 add r7, sp, #0 - 8031f6a: 6078 str r0, [r7, #4] - 8031f6c: 6039 str r1, [r7, #0] + 8031fe8: b580 push {r7, lr} + 8031fea: b084 sub sp, #16 + 8031fec: af00 add r7, sp, #0 + 8031fee: 6078 str r0, [r7, #4] + 8031ff0: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status = HAL_OK; - 8031f6e: 2300 movs r3, #0 - 8031f70: 73fb strb r3, [r7, #15] + 8031ff2: 2300 movs r3, #0 + 8031ff4: 73fb strb r3, [r7, #15] assert_param(IS_RCC_PLL3RGE_VALUE(pll3->PLL3RGE)); assert_param(IS_RCC_PLL3VCO_VALUE(pll3->PLL3VCOSEL)); assert_param(IS_RCC_PLLFRACN_VALUE(pll3->PLL3FRACN)); /* Check that PLL3 OSC clock source is already set */ if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE) - 8031f72: 4b53 ldr r3, [pc, #332] ; (80320c0 ) - 8031f74: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031f76: f003 0303 and.w r3, r3, #3 - 8031f7a: 2b03 cmp r3, #3 - 8031f7c: d101 bne.n 8031f82 + 8031ff6: 4b53 ldr r3, [pc, #332] ; (8032144 ) + 8031ff8: 6a9b ldr r3, [r3, #40] ; 0x28 + 8031ffa: f003 0303 and.w r3, r3, #3 + 8031ffe: 2b03 cmp r3, #3 + 8032000: d101 bne.n 8032006 { return HAL_ERROR; - 8031f7e: 2301 movs r3, #1 - 8031f80: e099 b.n 80320b6 + 8032002: 2301 movs r3, #1 + 8032004: e099 b.n 803213a else { /* Disable PLL3. */ __HAL_RCC_PLL3_DISABLE(); - 8031f82: 4b4f ldr r3, [pc, #316] ; (80320c0 ) - 8031f84: 681b ldr r3, [r3, #0] - 8031f86: 4a4e ldr r2, [pc, #312] ; (80320c0 ) - 8031f88: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 8031f8c: 6013 str r3, [r2, #0] + 8032006: 4b4f ldr r3, [pc, #316] ; (8032144 ) + 8032008: 681b ldr r3, [r3, #0] + 803200a: 4a4e ldr r2, [pc, #312] ; (8032144 ) + 803200c: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 8032010: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 8031f8e: f7f4 f819 bl 8025fc4 - 8031f92: 60b8 str r0, [r7, #8] + 8032012: f7f4 f819 bl 8026048 + 8032016: 60b8 str r0, [r7, #8] /* Wait till PLL3 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U) - 8031f94: e008 b.n 8031fa8 + 8032018: e008 b.n 803202c { if( (HAL_GetTick() - tickstart ) > PLL3_TIMEOUT_VALUE) - 8031f96: f7f4 f815 bl 8025fc4 - 8031f9a: 4602 mov r2, r0 - 8031f9c: 68bb ldr r3, [r7, #8] - 8031f9e: 1ad3 subs r3, r2, r3 - 8031fa0: 2b02 cmp r3, #2 - 8031fa2: d901 bls.n 8031fa8 + 803201a: f7f4 f815 bl 8026048 + 803201e: 4602 mov r2, r0 + 8032020: 68bb ldr r3, [r7, #8] + 8032022: 1ad3 subs r3, r2, r3 + 8032024: 2b02 cmp r3, #2 + 8032026: d901 bls.n 803202c { return HAL_TIMEOUT; - 8031fa4: 2303 movs r3, #3 - 8031fa6: e086 b.n 80320b6 + 8032028: 2303 movs r3, #3 + 803202a: e086 b.n 803213a while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U) - 8031fa8: 4b45 ldr r3, [pc, #276] ; (80320c0 ) - 8031faa: 681b ldr r3, [r3, #0] - 8031fac: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 8031fb0: 2b00 cmp r3, #0 - 8031fb2: d1f0 bne.n 8031f96 + 803202c: 4b45 ldr r3, [pc, #276] ; (8032144 ) + 803202e: 681b ldr r3, [r3, #0] + 8032030: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8032034: 2b00 cmp r3, #0 + 8032036: d1f0 bne.n 803201a } } /* Configure the PLL3 multiplication and division factors. */ __HAL_RCC_PLL3_CONFIG(pll3->PLL3M, - 8031fb4: 4b42 ldr r3, [pc, #264] ; (80320c0 ) - 8031fb6: 6a9b ldr r3, [r3, #40] ; 0x28 - 8031fb8: f023 727c bic.w r2, r3, #66060288 ; 0x3f00000 - 8031fbc: 687b ldr r3, [r7, #4] - 8031fbe: 681b ldr r3, [r3, #0] - 8031fc0: 051b lsls r3, r3, #20 - 8031fc2: 493f ldr r1, [pc, #252] ; (80320c0 ) - 8031fc4: 4313 orrs r3, r2 - 8031fc6: 628b str r3, [r1, #40] ; 0x28 - 8031fc8: 687b ldr r3, [r7, #4] - 8031fca: 685b ldr r3, [r3, #4] - 8031fcc: 3b01 subs r3, #1 - 8031fce: f3c3 0208 ubfx r2, r3, #0, #9 - 8031fd2: 687b ldr r3, [r7, #4] - 8031fd4: 689b ldr r3, [r3, #8] - 8031fd6: 3b01 subs r3, #1 - 8031fd8: 025b lsls r3, r3, #9 - 8031fda: b29b uxth r3, r3 - 8031fdc: 431a orrs r2, r3 - 8031fde: 687b ldr r3, [r7, #4] - 8031fe0: 68db ldr r3, [r3, #12] - 8031fe2: 3b01 subs r3, #1 - 8031fe4: 041b lsls r3, r3, #16 - 8031fe6: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 - 8031fea: 431a orrs r2, r3 - 8031fec: 687b ldr r3, [r7, #4] - 8031fee: 691b ldr r3, [r3, #16] - 8031ff0: 3b01 subs r3, #1 - 8031ff2: 061b lsls r3, r3, #24 - 8031ff4: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 - 8031ff8: 4931 ldr r1, [pc, #196] ; (80320c0 ) - 8031ffa: 4313 orrs r3, r2 - 8031ffc: 640b str r3, [r1, #64] ; 0x40 + 8032038: 4b42 ldr r3, [pc, #264] ; (8032144 ) + 803203a: 6a9b ldr r3, [r3, #40] ; 0x28 + 803203c: f023 727c bic.w r2, r3, #66060288 ; 0x3f00000 + 8032040: 687b ldr r3, [r7, #4] + 8032042: 681b ldr r3, [r3, #0] + 8032044: 051b lsls r3, r3, #20 + 8032046: 493f ldr r1, [pc, #252] ; (8032144 ) + 8032048: 4313 orrs r3, r2 + 803204a: 628b str r3, [r1, #40] ; 0x28 + 803204c: 687b ldr r3, [r7, #4] + 803204e: 685b ldr r3, [r3, #4] + 8032050: 3b01 subs r3, #1 + 8032052: f3c3 0208 ubfx r2, r3, #0, #9 + 8032056: 687b ldr r3, [r7, #4] + 8032058: 689b ldr r3, [r3, #8] + 803205a: 3b01 subs r3, #1 + 803205c: 025b lsls r3, r3, #9 + 803205e: b29b uxth r3, r3 + 8032060: 431a orrs r2, r3 + 8032062: 687b ldr r3, [r7, #4] + 8032064: 68db ldr r3, [r3, #12] + 8032066: 3b01 subs r3, #1 + 8032068: 041b lsls r3, r3, #16 + 803206a: f403 03fe and.w r3, r3, #8323072 ; 0x7f0000 + 803206e: 431a orrs r2, r3 + 8032070: 687b ldr r3, [r7, #4] + 8032072: 691b ldr r3, [r3, #16] + 8032074: 3b01 subs r3, #1 + 8032076: 061b lsls r3, r3, #24 + 8032078: f003 43fe and.w r3, r3, #2130706432 ; 0x7f000000 + 803207c: 4931 ldr r1, [pc, #196] ; (8032144 ) + 803207e: 4313 orrs r3, r2 + 8032080: 640b str r3, [r1, #64] ; 0x40 pll3->PLL3P, pll3->PLL3Q, pll3->PLL3R); /* Select PLL3 input reference frequency range: VCI */ __HAL_RCC_PLL3_VCIRANGE(pll3->PLL3RGE) ; - 8031ffe: 4b30 ldr r3, [pc, #192] ; (80320c0 ) - 8032000: 6adb ldr r3, [r3, #44] ; 0x2c - 8032002: f423 6240 bic.w r2, r3, #3072 ; 0xc00 - 8032006: 687b ldr r3, [r7, #4] - 8032008: 695b ldr r3, [r3, #20] - 803200a: 492d ldr r1, [pc, #180] ; (80320c0 ) - 803200c: 4313 orrs r3, r2 - 803200e: 62cb str r3, [r1, #44] ; 0x2c + 8032082: 4b30 ldr r3, [pc, #192] ; (8032144 ) + 8032084: 6adb ldr r3, [r3, #44] ; 0x2c + 8032086: f423 6240 bic.w r2, r3, #3072 ; 0xc00 + 803208a: 687b ldr r3, [r7, #4] + 803208c: 695b ldr r3, [r3, #20] + 803208e: 492d ldr r1, [pc, #180] ; (8032144 ) + 8032090: 4313 orrs r3, r2 + 8032092: 62cb str r3, [r1, #44] ; 0x2c /* Select PLL3 output frequency range : VCO */ __HAL_RCC_PLL3_VCORANGE(pll3->PLL3VCOSEL) ; - 8032010: 4b2b ldr r3, [pc, #172] ; (80320c0 ) - 8032012: 6adb ldr r3, [r3, #44] ; 0x2c - 8032014: f423 7200 bic.w r2, r3, #512 ; 0x200 - 8032018: 687b ldr r3, [r7, #4] - 803201a: 699b ldr r3, [r3, #24] - 803201c: 4928 ldr r1, [pc, #160] ; (80320c0 ) - 803201e: 4313 orrs r3, r2 - 8032020: 62cb str r3, [r1, #44] ; 0x2c + 8032094: 4b2b ldr r3, [pc, #172] ; (8032144 ) + 8032096: 6adb ldr r3, [r3, #44] ; 0x2c + 8032098: f423 7200 bic.w r2, r3, #512 ; 0x200 + 803209c: 687b ldr r3, [r7, #4] + 803209e: 699b ldr r3, [r3, #24] + 80320a0: 4928 ldr r1, [pc, #160] ; (8032144 ) + 80320a2: 4313 orrs r3, r2 + 80320a4: 62cb str r3, [r1, #44] ; 0x2c /* Disable PLL3FRACN . */ __HAL_RCC_PLL3FRACN_DISABLE(); - 8032022: 4b27 ldr r3, [pc, #156] ; (80320c0 ) - 8032024: 6adb ldr r3, [r3, #44] ; 0x2c - 8032026: 4a26 ldr r2, [pc, #152] ; (80320c0 ) - 8032028: f423 7380 bic.w r3, r3, #256 ; 0x100 - 803202c: 62d3 str r3, [r2, #44] ; 0x2c + 80320a6: 4b27 ldr r3, [pc, #156] ; (8032144 ) + 80320a8: 6adb ldr r3, [r3, #44] ; 0x2c + 80320aa: 4a26 ldr r2, [pc, #152] ; (8032144 ) + 80320ac: f423 7380 bic.w r3, r3, #256 ; 0x100 + 80320b0: 62d3 str r3, [r2, #44] ; 0x2c /* Configures PLL3 clock Fractional Part Of The Multiplication Factor */ __HAL_RCC_PLL3FRACN_CONFIG(pll3->PLL3FRACN); - 803202e: 4b24 ldr r3, [pc, #144] ; (80320c0 ) - 8032030: 6c5a ldr r2, [r3, #68] ; 0x44 - 8032032: 4b24 ldr r3, [pc, #144] ; (80320c4 ) - 8032034: 4013 ands r3, r2 - 8032036: 687a ldr r2, [r7, #4] - 8032038: 69d2 ldr r2, [r2, #28] - 803203a: 00d2 lsls r2, r2, #3 - 803203c: 4920 ldr r1, [pc, #128] ; (80320c0 ) - 803203e: 4313 orrs r3, r2 - 8032040: 644b str r3, [r1, #68] ; 0x44 + 80320b2: 4b24 ldr r3, [pc, #144] ; (8032144 ) + 80320b4: 6c5a ldr r2, [r3, #68] ; 0x44 + 80320b6: 4b24 ldr r3, [pc, #144] ; (8032148 ) + 80320b8: 4013 ands r3, r2 + 80320ba: 687a ldr r2, [r7, #4] + 80320bc: 69d2 ldr r2, [r2, #28] + 80320be: 00d2 lsls r2, r2, #3 + 80320c0: 4920 ldr r1, [pc, #128] ; (8032144 ) + 80320c2: 4313 orrs r3, r2 + 80320c4: 644b str r3, [r1, #68] ; 0x44 /* Enable PLL3FRACN . */ __HAL_RCC_PLL3FRACN_ENABLE(); - 8032042: 4b1f ldr r3, [pc, #124] ; (80320c0 ) - 8032044: 6adb ldr r3, [r3, #44] ; 0x2c - 8032046: 4a1e ldr r2, [pc, #120] ; (80320c0 ) - 8032048: f443 7380 orr.w r3, r3, #256 ; 0x100 - 803204c: 62d3 str r3, [r2, #44] ; 0x2c + 80320c6: 4b1f ldr r3, [pc, #124] ; (8032144 ) + 80320c8: 6adb ldr r3, [r3, #44] ; 0x2c + 80320ca: 4a1e ldr r2, [pc, #120] ; (8032144 ) + 80320cc: f443 7380 orr.w r3, r3, #256 ; 0x100 + 80320d0: 62d3 str r3, [r2, #44] ; 0x2c /* Enable the PLL3 clock output */ if(Divider == DIVIDER_P_UPDATE) - 803204e: 683b ldr r3, [r7, #0] - 8032050: 2b00 cmp r3, #0 - 8032052: d106 bne.n 8032062 + 80320d2: 683b ldr r3, [r7, #0] + 80320d4: 2b00 cmp r3, #0 + 80320d6: d106 bne.n 80320e6 { __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP); - 8032054: 4b1a ldr r3, [pc, #104] ; (80320c0 ) - 8032056: 6adb ldr r3, [r3, #44] ; 0x2c - 8032058: 4a19 ldr r2, [pc, #100] ; (80320c0 ) - 803205a: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 - 803205e: 62d3 str r3, [r2, #44] ; 0x2c - 8032060: e00f b.n 8032082 + 80320d8: 4b1a ldr r3, [pc, #104] ; (8032144 ) + 80320da: 6adb ldr r3, [r3, #44] ; 0x2c + 80320dc: 4a19 ldr r2, [pc, #100] ; (8032144 ) + 80320de: f443 0380 orr.w r3, r3, #4194304 ; 0x400000 + 80320e2: 62d3 str r3, [r2, #44] ; 0x2c + 80320e4: e00f b.n 8032106 } else if(Divider == DIVIDER_Q_UPDATE) - 8032062: 683b ldr r3, [r7, #0] - 8032064: 2b01 cmp r3, #1 - 8032066: d106 bne.n 8032076 + 80320e6: 683b ldr r3, [r7, #0] + 80320e8: 2b01 cmp r3, #1 + 80320ea: d106 bne.n 80320fa { __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ); - 8032068: 4b15 ldr r3, [pc, #84] ; (80320c0 ) - 803206a: 6adb ldr r3, [r3, #44] ; 0x2c - 803206c: 4a14 ldr r2, [pc, #80] ; (80320c0 ) - 803206e: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 - 8032072: 62d3 str r3, [r2, #44] ; 0x2c - 8032074: e005 b.n 8032082 + 80320ec: 4b15 ldr r3, [pc, #84] ; (8032144 ) + 80320ee: 6adb ldr r3, [r3, #44] ; 0x2c + 80320f0: 4a14 ldr r2, [pc, #80] ; (8032144 ) + 80320f2: f443 0300 orr.w r3, r3, #8388608 ; 0x800000 + 80320f6: 62d3 str r3, [r2, #44] ; 0x2c + 80320f8: e005 b.n 8032106 } else { __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVR); - 8032076: 4b12 ldr r3, [pc, #72] ; (80320c0 ) - 8032078: 6adb ldr r3, [r3, #44] ; 0x2c - 803207a: 4a11 ldr r2, [pc, #68] ; (80320c0 ) - 803207c: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 - 8032080: 62d3 str r3, [r2, #44] ; 0x2c + 80320fa: 4b12 ldr r3, [pc, #72] ; (8032144 ) + 80320fc: 6adb ldr r3, [r3, #44] ; 0x2c + 80320fe: 4a11 ldr r2, [pc, #68] ; (8032144 ) + 8032100: f043 7380 orr.w r3, r3, #16777216 ; 0x1000000 + 8032104: 62d3 str r3, [r2, #44] ; 0x2c } /* Enable PLL3. */ __HAL_RCC_PLL3_ENABLE(); - 8032082: 4b0f ldr r3, [pc, #60] ; (80320c0 ) - 8032084: 681b ldr r3, [r3, #0] - 8032086: 4a0e ldr r2, [pc, #56] ; (80320c0 ) - 8032088: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 803208c: 6013 str r3, [r2, #0] + 8032106: 4b0f ldr r3, [pc, #60] ; (8032144 ) + 8032108: 681b ldr r3, [r3, #0] + 803210a: 4a0e ldr r2, [pc, #56] ; (8032144 ) + 803210c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8032110: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); - 803208e: f7f3 ff99 bl 8025fc4 - 8032092: 60b8 str r0, [r7, #8] + 8032112: f7f3 ff99 bl 8026048 + 8032116: 60b8 str r0, [r7, #8] /* Wait till PLL3 is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U) - 8032094: e008 b.n 80320a8 + 8032118: e008 b.n 803212c { if( (HAL_GetTick() - tickstart ) > PLL3_TIMEOUT_VALUE) - 8032096: f7f3 ff95 bl 8025fc4 - 803209a: 4602 mov r2, r0 - 803209c: 68bb ldr r3, [r7, #8] - 803209e: 1ad3 subs r3, r2, r3 - 80320a0: 2b02 cmp r3, #2 - 80320a2: d901 bls.n 80320a8 + 803211a: f7f3 ff95 bl 8026048 + 803211e: 4602 mov r2, r0 + 8032120: 68bb ldr r3, [r7, #8] + 8032122: 1ad3 subs r3, r2, r3 + 8032124: 2b02 cmp r3, #2 + 8032126: d901 bls.n 803212c { return HAL_TIMEOUT; - 80320a4: 2303 movs r3, #3 - 80320a6: e006 b.n 80320b6 + 8032128: 2303 movs r3, #3 + 803212a: e006 b.n 803213a while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U) - 80320a8: 4b05 ldr r3, [pc, #20] ; (80320c0 ) - 80320aa: 681b ldr r3, [r3, #0] - 80320ac: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 - 80320b0: 2b00 cmp r3, #0 - 80320b2: d0f0 beq.n 8032096 + 803212c: 4b05 ldr r3, [pc, #20] ; (8032144 ) + 803212e: 681b ldr r3, [r3, #0] + 8032130: f003 5300 and.w r3, r3, #536870912 ; 0x20000000 + 8032134: 2b00 cmp r3, #0 + 8032136: d0f0 beq.n 803211a } } return status; - 80320b4: 7bfb ldrb r3, [r7, #15] + 8032138: 7bfb ldrb r3, [r7, #15] } - 80320b6: 4618 mov r0, r3 - 80320b8: 3710 adds r7, #16 - 80320ba: 46bd mov sp, r7 - 80320bc: bd80 pop {r7, pc} - 80320be: bf00 nop - 80320c0: 58024400 .word 0x58024400 - 80320c4: ffff0007 .word 0xffff0007 + 803213a: 4618 mov r0, r3 + 803213c: 3710 adds r7, #16 + 803213e: 46bd mov sp, r7 + 8032140: bd80 pop {r7, pc} + 8032142: bf00 nop + 8032144: 58024400 .word 0x58024400 + 8032148: ffff0007 .word 0xffff0007 -080320c8 : +0803214c : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { - 80320c8: b580 push {r7, lr} - 80320ca: b082 sub sp, #8 - 80320cc: af00 add r7, sp, #0 - 80320ce: 6078 str r0, [r7, #4] + 803214c: b580 push {r7, lr} + 803214e: b082 sub sp, #8 + 8032150: af00 add r7, sp, #0 + 8032152: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) - 80320d0: 687b ldr r3, [r7, #4] - 80320d2: 2b00 cmp r3, #0 - 80320d4: d101 bne.n 80320da + 8032154: 687b ldr r3, [r7, #4] + 8032156: 2b00 cmp r3, #0 + 8032158: d101 bne.n 803215e { return HAL_ERROR; - 80320d6: 2301 movs r3, #1 - 80320d8: e049 b.n 803216e + 803215a: 2301 movs r3, #1 + 803215c: e049 b.n 80321f2 assert_param(IS_TIM_INSTANCE(htim->Instance)); assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) - 80320da: 687b ldr r3, [r7, #4] - 80320dc: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 80320e0: b2db uxtb r3, r3 - 80320e2: 2b00 cmp r3, #0 - 80320e4: d106 bne.n 80320f4 + 803215e: 687b ldr r3, [r7, #4] + 8032160: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 8032164: b2db uxtb r3, r3 + 8032166: 2b00 cmp r3, #0 + 8032168: d106 bne.n 8032178 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; - 80320e6: 687b ldr r3, [r7, #4] - 80320e8: 2200 movs r2, #0 - 80320ea: f883 203c strb.w r2, [r3, #60] ; 0x3c + 803216a: 687b ldr r3, [r7, #4] + 803216c: 2200 movs r2, #0 + 803216e: f883 203c strb.w r2, [r3, #60] ; 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); - 80320ee: 6878 ldr r0, [r7, #4] - 80320f0: f7f2 fd3e bl 8024b70 + 8032172: 6878 ldr r0, [r7, #4] + 8032174: f7f2 fd3e bl 8024bf4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 80320f4: 687b ldr r3, [r7, #4] - 80320f6: 2202 movs r2, #2 - 80320f8: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8032178: 687b ldr r3, [r7, #4] + 803217a: 2202 movs r2, #2 + 803217c: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); - 80320fc: 687b ldr r3, [r7, #4] - 80320fe: 681a ldr r2, [r3, #0] - 8032100: 687b ldr r3, [r7, #4] - 8032102: 3304 adds r3, #4 - 8032104: 4619 mov r1, r3 - 8032106: 4610 mov r0, r2 - 8032108: f000 faee bl 80326e8 + 8032180: 687b ldr r3, [r7, #4] + 8032182: 681a ldr r2, [r3, #0] + 8032184: 687b ldr r3, [r7, #4] + 8032186: 3304 adds r3, #4 + 8032188: 4619 mov r1, r3 + 803218a: 4610 mov r0, r2 + 803218c: f000 faee bl 803276c /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 803210c: 687b ldr r3, [r7, #4] - 803210e: 2201 movs r2, #1 - 8032110: f883 2048 strb.w r2, [r3, #72] ; 0x48 + 8032190: 687b ldr r3, [r7, #4] + 8032192: 2201 movs r2, #1 + 8032194: f883 2048 strb.w r2, [r3, #72] ; 0x48 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8032114: 687b ldr r3, [r7, #4] - 8032116: 2201 movs r2, #1 - 8032118: f883 203e strb.w r2, [r3, #62] ; 0x3e - 803211c: 687b ldr r3, [r7, #4] - 803211e: 2201 movs r2, #1 - 8032120: f883 203f strb.w r2, [r3, #63] ; 0x3f - 8032124: 687b ldr r3, [r7, #4] - 8032126: 2201 movs r2, #1 - 8032128: f883 2040 strb.w r2, [r3, #64] ; 0x40 - 803212c: 687b ldr r3, [r7, #4] - 803212e: 2201 movs r2, #1 - 8032130: f883 2041 strb.w r2, [r3, #65] ; 0x41 - 8032134: 687b ldr r3, [r7, #4] - 8032136: 2201 movs r2, #1 - 8032138: f883 2042 strb.w r2, [r3, #66] ; 0x42 - 803213c: 687b ldr r3, [r7, #4] - 803213e: 2201 movs r2, #1 - 8032140: f883 2043 strb.w r2, [r3, #67] ; 0x43 + 8032198: 687b ldr r3, [r7, #4] + 803219a: 2201 movs r2, #1 + 803219c: f883 203e strb.w r2, [r3, #62] ; 0x3e + 80321a0: 687b ldr r3, [r7, #4] + 80321a2: 2201 movs r2, #1 + 80321a4: f883 203f strb.w r2, [r3, #63] ; 0x3f + 80321a8: 687b ldr r3, [r7, #4] + 80321aa: 2201 movs r2, #1 + 80321ac: f883 2040 strb.w r2, [r3, #64] ; 0x40 + 80321b0: 687b ldr r3, [r7, #4] + 80321b2: 2201 movs r2, #1 + 80321b4: f883 2041 strb.w r2, [r3, #65] ; 0x41 + 80321b8: 687b ldr r3, [r7, #4] + 80321ba: 2201 movs r2, #1 + 80321bc: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 80321c0: 687b ldr r3, [r7, #4] + 80321c2: 2201 movs r2, #1 + 80321c4: f883 2043 strb.w r2, [r3, #67] ; 0x43 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8032144: 687b ldr r3, [r7, #4] - 8032146: 2201 movs r2, #1 - 8032148: f883 2044 strb.w r2, [r3, #68] ; 0x44 - 803214c: 687b ldr r3, [r7, #4] - 803214e: 2201 movs r2, #1 - 8032150: f883 2045 strb.w r2, [r3, #69] ; 0x45 - 8032154: 687b ldr r3, [r7, #4] - 8032156: 2201 movs r2, #1 - 8032158: f883 2046 strb.w r2, [r3, #70] ; 0x46 - 803215c: 687b ldr r3, [r7, #4] - 803215e: 2201 movs r2, #1 - 8032160: f883 2047 strb.w r2, [r3, #71] ; 0x47 + 80321c8: 687b ldr r3, [r7, #4] + 80321ca: 2201 movs r2, #1 + 80321cc: f883 2044 strb.w r2, [r3, #68] ; 0x44 + 80321d0: 687b ldr r3, [r7, #4] + 80321d2: 2201 movs r2, #1 + 80321d4: f883 2045 strb.w r2, [r3, #69] ; 0x45 + 80321d8: 687b ldr r3, [r7, #4] + 80321da: 2201 movs r2, #1 + 80321dc: f883 2046 strb.w r2, [r3, #70] ; 0x46 + 80321e0: 687b ldr r3, [r7, #4] + 80321e2: 2201 movs r2, #1 + 80321e4: f883 2047 strb.w r2, [r3, #71] ; 0x47 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; - 8032164: 687b ldr r3, [r7, #4] - 8032166: 2201 movs r2, #1 - 8032168: f883 203d strb.w r2, [r3, #61] ; 0x3d + 80321e8: 687b ldr r3, [r7, #4] + 80321ea: 2201 movs r2, #1 + 80321ec: f883 203d strb.w r2, [r3, #61] ; 0x3d return HAL_OK; - 803216c: 2300 movs r3, #0 + 80321f0: 2300 movs r3, #0 } - 803216e: 4618 mov r0, r3 - 8032170: 3708 adds r7, #8 - 8032172: 46bd mov sp, r7 - 8032174: bd80 pop {r7, pc} + 80321f2: 4618 mov r0, r3 + 80321f4: 3708 adds r7, #8 + 80321f6: 46bd mov sp, r7 + 80321f8: bd80 pop {r7, pc} ... -08032178 : +080321fc : * @brief Starts the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) { - 8032178: b480 push {r7} - 803217a: b085 sub sp, #20 - 803217c: af00 add r7, sp, #0 - 803217e: 6078 str r0, [r7, #4] + 80321fc: b480 push {r7} + 80321fe: b085 sub sp, #20 + 8032200: af00 add r7, sp, #0 + 8032202: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Check the TIM state */ if (htim->State != HAL_TIM_STATE_READY) - 8032180: 687b ldr r3, [r7, #4] - 8032182: f893 303d ldrb.w r3, [r3, #61] ; 0x3d - 8032186: b2db uxtb r3, r3 - 8032188: 2b01 cmp r3, #1 - 803218a: d001 beq.n 8032190 + 8032204: 687b ldr r3, [r7, #4] + 8032206: f893 303d ldrb.w r3, [r3, #61] ; 0x3d + 803220a: b2db uxtb r3, r3 + 803220c: 2b01 cmp r3, #1 + 803220e: d001 beq.n 8032214 { return HAL_ERROR; - 803218c: 2301 movs r3, #1 - 803218e: e054 b.n 803223a + 8032210: 2301 movs r3, #1 + 8032212: e054 b.n 80322be } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8032190: 687b ldr r3, [r7, #4] - 8032192: 2202 movs r2, #2 - 8032194: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8032214: 687b ldr r3, [r7, #4] + 8032216: 2202 movs r2, #2 + 8032218: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 8032198: 687b ldr r3, [r7, #4] - 803219a: 681b ldr r3, [r3, #0] - 803219c: 68da ldr r2, [r3, #12] - 803219e: 687b ldr r3, [r7, #4] - 80321a0: 681b ldr r3, [r3, #0] - 80321a2: f042 0201 orr.w r2, r2, #1 - 80321a6: 60da str r2, [r3, #12] + 803221c: 687b ldr r3, [r7, #4] + 803221e: 681b ldr r3, [r3, #0] + 8032220: 68da ldr r2, [r3, #12] + 8032222: 687b ldr r3, [r7, #4] + 8032224: 681b ldr r3, [r3, #0] + 8032226: f042 0201 orr.w r2, r2, #1 + 803222a: 60da str r2, [r3, #12] /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 80321a8: 687b ldr r3, [r7, #4] - 80321aa: 681b ldr r3, [r3, #0] - 80321ac: 4a26 ldr r2, [pc, #152] ; (8032248 ) - 80321ae: 4293 cmp r3, r2 - 80321b0: d022 beq.n 80321f8 - 80321b2: 687b ldr r3, [r7, #4] - 80321b4: 681b ldr r3, [r3, #0] - 80321b6: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 80321ba: d01d beq.n 80321f8 - 80321bc: 687b ldr r3, [r7, #4] - 80321be: 681b ldr r3, [r3, #0] - 80321c0: 4a22 ldr r2, [pc, #136] ; (803224c ) - 80321c2: 4293 cmp r3, r2 - 80321c4: d018 beq.n 80321f8 - 80321c6: 687b ldr r3, [r7, #4] - 80321c8: 681b ldr r3, [r3, #0] - 80321ca: 4a21 ldr r2, [pc, #132] ; (8032250 ) - 80321cc: 4293 cmp r3, r2 - 80321ce: d013 beq.n 80321f8 - 80321d0: 687b ldr r3, [r7, #4] - 80321d2: 681b ldr r3, [r3, #0] - 80321d4: 4a1f ldr r2, [pc, #124] ; (8032254 ) - 80321d6: 4293 cmp r3, r2 - 80321d8: d00e beq.n 80321f8 - 80321da: 687b ldr r3, [r7, #4] - 80321dc: 681b ldr r3, [r3, #0] - 80321de: 4a1e ldr r2, [pc, #120] ; (8032258 ) - 80321e0: 4293 cmp r3, r2 - 80321e2: d009 beq.n 80321f8 - 80321e4: 687b ldr r3, [r7, #4] - 80321e6: 681b ldr r3, [r3, #0] - 80321e8: 4a1c ldr r2, [pc, #112] ; (803225c ) - 80321ea: 4293 cmp r3, r2 - 80321ec: d004 beq.n 80321f8 - 80321ee: 687b ldr r3, [r7, #4] - 80321f0: 681b ldr r3, [r3, #0] - 80321f2: 4a1b ldr r2, [pc, #108] ; (8032260 ) - 80321f4: 4293 cmp r3, r2 - 80321f6: d115 bne.n 8032224 + 803222c: 687b ldr r3, [r7, #4] + 803222e: 681b ldr r3, [r3, #0] + 8032230: 4a26 ldr r2, [pc, #152] ; (80322cc ) + 8032232: 4293 cmp r3, r2 + 8032234: d022 beq.n 803227c + 8032236: 687b ldr r3, [r7, #4] + 8032238: 681b ldr r3, [r3, #0] + 803223a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 803223e: d01d beq.n 803227c + 8032240: 687b ldr r3, [r7, #4] + 8032242: 681b ldr r3, [r3, #0] + 8032244: 4a22 ldr r2, [pc, #136] ; (80322d0 ) + 8032246: 4293 cmp r3, r2 + 8032248: d018 beq.n 803227c + 803224a: 687b ldr r3, [r7, #4] + 803224c: 681b ldr r3, [r3, #0] + 803224e: 4a21 ldr r2, [pc, #132] ; (80322d4 ) + 8032250: 4293 cmp r3, r2 + 8032252: d013 beq.n 803227c + 8032254: 687b ldr r3, [r7, #4] + 8032256: 681b ldr r3, [r3, #0] + 8032258: 4a1f ldr r2, [pc, #124] ; (80322d8 ) + 803225a: 4293 cmp r3, r2 + 803225c: d00e beq.n 803227c + 803225e: 687b ldr r3, [r7, #4] + 8032260: 681b ldr r3, [r3, #0] + 8032262: 4a1e ldr r2, [pc, #120] ; (80322dc ) + 8032264: 4293 cmp r3, r2 + 8032266: d009 beq.n 803227c + 8032268: 687b ldr r3, [r7, #4] + 803226a: 681b ldr r3, [r3, #0] + 803226c: 4a1c ldr r2, [pc, #112] ; (80322e0 ) + 803226e: 4293 cmp r3, r2 + 8032270: d004 beq.n 803227c + 8032272: 687b ldr r3, [r7, #4] + 8032274: 681b ldr r3, [r3, #0] + 8032276: 4a1b ldr r2, [pc, #108] ; (80322e4 ) + 8032278: 4293 cmp r3, r2 + 803227a: d115 bne.n 80322a8 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 80321f8: 687b ldr r3, [r7, #4] - 80321fa: 681b ldr r3, [r3, #0] - 80321fc: 689a ldr r2, [r3, #8] - 80321fe: 4b19 ldr r3, [pc, #100] ; (8032264 ) - 8032200: 4013 ands r3, r2 - 8032202: 60fb str r3, [r7, #12] + 803227c: 687b ldr r3, [r7, #4] + 803227e: 681b ldr r3, [r3, #0] + 8032280: 689a ldr r2, [r3, #8] + 8032282: 4b19 ldr r3, [pc, #100] ; (80322e8 ) + 8032284: 4013 ands r3, r2 + 8032286: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8032204: 68fb ldr r3, [r7, #12] - 8032206: 2b06 cmp r3, #6 - 8032208: d015 beq.n 8032236 - 803220a: 68fb ldr r3, [r7, #12] - 803220c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8032210: d011 beq.n 8032236 + 8032288: 68fb ldr r3, [r7, #12] + 803228a: 2b06 cmp r3, #6 + 803228c: d015 beq.n 80322ba + 803228e: 68fb ldr r3, [r7, #12] + 8032290: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8032294: d011 beq.n 80322ba { __HAL_TIM_ENABLE(htim); - 8032212: 687b ldr r3, [r7, #4] - 8032214: 681b ldr r3, [r3, #0] - 8032216: 681a ldr r2, [r3, #0] - 8032218: 687b ldr r3, [r7, #4] - 803221a: 681b ldr r3, [r3, #0] - 803221c: f042 0201 orr.w r2, r2, #1 - 8032220: 601a str r2, [r3, #0] + 8032296: 687b ldr r3, [r7, #4] + 8032298: 681b ldr r3, [r3, #0] + 803229a: 681a ldr r2, [r3, #0] + 803229c: 687b ldr r3, [r7, #4] + 803229e: 681b ldr r3, [r3, #0] + 80322a0: f042 0201 orr.w r2, r2, #1 + 80322a4: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8032222: e008 b.n 8032236 + 80322a6: e008 b.n 80322ba } } else { __HAL_TIM_ENABLE(htim); - 8032224: 687b ldr r3, [r7, #4] - 8032226: 681b ldr r3, [r3, #0] - 8032228: 681a ldr r2, [r3, #0] - 803222a: 687b ldr r3, [r7, #4] - 803222c: 681b ldr r3, [r3, #0] - 803222e: f042 0201 orr.w r2, r2, #1 - 8032232: 601a str r2, [r3, #0] - 8032234: e000 b.n 8032238 + 80322a8: 687b ldr r3, [r7, #4] + 80322aa: 681b ldr r3, [r3, #0] + 80322ac: 681a ldr r2, [r3, #0] + 80322ae: 687b ldr r3, [r7, #4] + 80322b0: 681b ldr r3, [r3, #0] + 80322b2: f042 0201 orr.w r2, r2, #1 + 80322b6: 601a str r2, [r3, #0] + 80322b8: e000 b.n 80322bc if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8032236: bf00 nop + 80322ba: bf00 nop } /* Return function status */ return HAL_OK; - 8032238: 2300 movs r3, #0 -} - 803223a: 4618 mov r0, r3 - 803223c: 3714 adds r7, #20 - 803223e: 46bd mov sp, r7 - 8032240: f85d 7b04 ldr.w r7, [sp], #4 - 8032244: 4770 bx lr - 8032246: bf00 nop - 8032248: 40010000 .word 0x40010000 - 803224c: 40000400 .word 0x40000400 - 8032250: 40000800 .word 0x40000800 - 8032254: 40000c00 .word 0x40000c00 - 8032258: 40010400 .word 0x40010400 - 803225c: 40001800 .word 0x40001800 - 8032260: 40014000 .word 0x40014000 - 8032264: 00010007 .word 0x00010007 - -08032268 : + 80322bc: 2300 movs r3, #0 +} + 80322be: 4618 mov r0, r3 + 80322c0: 3714 adds r7, #20 + 80322c2: 46bd mov sp, r7 + 80322c4: f85d 7b04 ldr.w r7, [sp], #4 + 80322c8: 4770 bx lr + 80322ca: bf00 nop + 80322cc: 40010000 .word 0x40010000 + 80322d0: 40000400 .word 0x40000400 + 80322d4: 40000800 .word 0x40000800 + 80322d8: 40000c00 .word 0x40000c00 + 80322dc: 40010400 .word 0x40010400 + 80322e0: 40001800 .word 0x40001800 + 80322e4: 40014000 .word 0x40014000 + 80322e8: 00010007 .word 0x00010007 + +080322ec : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { - 8032268: b580 push {r7, lr} - 803226a: b082 sub sp, #8 - 803226c: af00 add r7, sp, #0 - 803226e: 6078 str r0, [r7, #4] + 80322ec: b580 push {r7, lr} + 80322ee: b082 sub sp, #8 + 80322f0: af00 add r7, sp, #0 + 80322f2: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - 8032270: 687b ldr r3, [r7, #4] - 8032272: 681b ldr r3, [r3, #0] - 8032274: 691b ldr r3, [r3, #16] - 8032276: f003 0302 and.w r3, r3, #2 - 803227a: 2b02 cmp r3, #2 - 803227c: d122 bne.n 80322c4 + 80322f4: 687b ldr r3, [r7, #4] + 80322f6: 681b ldr r3, [r3, #0] + 80322f8: 691b ldr r3, [r3, #16] + 80322fa: f003 0302 and.w r3, r3, #2 + 80322fe: 2b02 cmp r3, #2 + 8032300: d122 bne.n 8032348 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) - 803227e: 687b ldr r3, [r7, #4] - 8032280: 681b ldr r3, [r3, #0] - 8032282: 68db ldr r3, [r3, #12] - 8032284: f003 0302 and.w r3, r3, #2 - 8032288: 2b02 cmp r3, #2 - 803228a: d11b bne.n 80322c4 + 8032302: 687b ldr r3, [r7, #4] + 8032304: 681b ldr r3, [r3, #0] + 8032306: 68db ldr r3, [r3, #12] + 8032308: f003 0302 and.w r3, r3, #2 + 803230c: 2b02 cmp r3, #2 + 803230e: d11b bne.n 8032348 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - 803228c: 687b ldr r3, [r7, #4] - 803228e: 681b ldr r3, [r3, #0] - 8032290: f06f 0202 mvn.w r2, #2 - 8032294: 611a str r2, [r3, #16] + 8032310: 687b ldr r3, [r7, #4] + 8032312: 681b ldr r3, [r3, #0] + 8032314: f06f 0202 mvn.w r2, #2 + 8032318: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8032296: 687b ldr r3, [r7, #4] - 8032298: 2201 movs r2, #1 - 803229a: 771a strb r2, [r3, #28] + 803231a: 687b ldr r3, [r7, #4] + 803231c: 2201 movs r2, #1 + 803231e: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 803229c: 687b ldr r3, [r7, #4] - 803229e: 681b ldr r3, [r3, #0] - 80322a0: 699b ldr r3, [r3, #24] - 80322a2: f003 0303 and.w r3, r3, #3 - 80322a6: 2b00 cmp r3, #0 - 80322a8: d003 beq.n 80322b2 + 8032320: 687b ldr r3, [r7, #4] + 8032322: 681b ldr r3, [r3, #0] + 8032324: 699b ldr r3, [r3, #24] + 8032326: f003 0303 and.w r3, r3, #3 + 803232a: 2b00 cmp r3, #0 + 803232c: d003 beq.n 8032336 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80322aa: 6878 ldr r0, [r7, #4] - 80322ac: f000 f9fe bl 80326ac - 80322b0: e005 b.n 80322be + 803232e: 6878 ldr r0, [r7, #4] + 8032330: f000 f9fe bl 8032730 + 8032334: e005 b.n 8032342 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 80322b2: 6878 ldr r0, [r7, #4] - 80322b4: f000 f9f0 bl 8032698 + 8032336: 6878 ldr r0, [r7, #4] + 8032338: f000 f9f0 bl 803271c HAL_TIM_PWM_PulseFinishedCallback(htim); - 80322b8: 6878 ldr r0, [r7, #4] - 80322ba: f000 fa01 bl 80326c0 + 803233c: 6878 ldr r0, [r7, #4] + 803233e: f000 fa01 bl 8032744 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80322be: 687b ldr r3, [r7, #4] - 80322c0: 2200 movs r2, #0 - 80322c2: 771a strb r2, [r3, #28] + 8032342: 687b ldr r3, [r7, #4] + 8032344: 2200 movs r2, #0 + 8032346: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - 80322c4: 687b ldr r3, [r7, #4] - 80322c6: 681b ldr r3, [r3, #0] - 80322c8: 691b ldr r3, [r3, #16] - 80322ca: f003 0304 and.w r3, r3, #4 - 80322ce: 2b04 cmp r3, #4 - 80322d0: d122 bne.n 8032318 + 8032348: 687b ldr r3, [r7, #4] + 803234a: 681b ldr r3, [r3, #0] + 803234c: 691b ldr r3, [r3, #16] + 803234e: f003 0304 and.w r3, r3, #4 + 8032352: 2b04 cmp r3, #4 + 8032354: d122 bne.n 803239c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) - 80322d2: 687b ldr r3, [r7, #4] - 80322d4: 681b ldr r3, [r3, #0] - 80322d6: 68db ldr r3, [r3, #12] - 80322d8: f003 0304 and.w r3, r3, #4 - 80322dc: 2b04 cmp r3, #4 - 80322de: d11b bne.n 8032318 + 8032356: 687b ldr r3, [r7, #4] + 8032358: 681b ldr r3, [r3, #0] + 803235a: 68db ldr r3, [r3, #12] + 803235c: f003 0304 and.w r3, r3, #4 + 8032360: 2b04 cmp r3, #4 + 8032362: d11b bne.n 803239c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - 80322e0: 687b ldr r3, [r7, #4] - 80322e2: 681b ldr r3, [r3, #0] - 80322e4: f06f 0204 mvn.w r2, #4 - 80322e8: 611a str r2, [r3, #16] + 8032364: 687b ldr r3, [r7, #4] + 8032366: 681b ldr r3, [r3, #0] + 8032368: f06f 0204 mvn.w r2, #4 + 803236c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 80322ea: 687b ldr r3, [r7, #4] - 80322ec: 2202 movs r2, #2 - 80322ee: 771a strb r2, [r3, #28] + 803236e: 687b ldr r3, [r7, #4] + 8032370: 2202 movs r2, #2 + 8032372: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 80322f0: 687b ldr r3, [r7, #4] - 80322f2: 681b ldr r3, [r3, #0] - 80322f4: 699b ldr r3, [r3, #24] - 80322f6: f403 7340 and.w r3, r3, #768 ; 0x300 - 80322fa: 2b00 cmp r3, #0 - 80322fc: d003 beq.n 8032306 + 8032374: 687b ldr r3, [r7, #4] + 8032376: 681b ldr r3, [r3, #0] + 8032378: 699b ldr r3, [r3, #24] + 803237a: f403 7340 and.w r3, r3, #768 ; 0x300 + 803237e: 2b00 cmp r3, #0 + 8032380: d003 beq.n 803238a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80322fe: 6878 ldr r0, [r7, #4] - 8032300: f000 f9d4 bl 80326ac - 8032304: e005 b.n 8032312 + 8032382: 6878 ldr r0, [r7, #4] + 8032384: f000 f9d4 bl 8032730 + 8032388: e005 b.n 8032396 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8032306: 6878 ldr r0, [r7, #4] - 8032308: f000 f9c6 bl 8032698 + 803238a: 6878 ldr r0, [r7, #4] + 803238c: f000 f9c6 bl 803271c HAL_TIM_PWM_PulseFinishedCallback(htim); - 803230c: 6878 ldr r0, [r7, #4] - 803230e: f000 f9d7 bl 80326c0 + 8032390: 6878 ldr r0, [r7, #4] + 8032392: f000 f9d7 bl 8032744 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8032312: 687b ldr r3, [r7, #4] - 8032314: 2200 movs r2, #0 - 8032316: 771a strb r2, [r3, #28] + 8032396: 687b ldr r3, [r7, #4] + 8032398: 2200 movs r2, #0 + 803239a: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - 8032318: 687b ldr r3, [r7, #4] - 803231a: 681b ldr r3, [r3, #0] - 803231c: 691b ldr r3, [r3, #16] - 803231e: f003 0308 and.w r3, r3, #8 - 8032322: 2b08 cmp r3, #8 - 8032324: d122 bne.n 803236c + 803239c: 687b ldr r3, [r7, #4] + 803239e: 681b ldr r3, [r3, #0] + 80323a0: 691b ldr r3, [r3, #16] + 80323a2: f003 0308 and.w r3, r3, #8 + 80323a6: 2b08 cmp r3, #8 + 80323a8: d122 bne.n 80323f0 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) - 8032326: 687b ldr r3, [r7, #4] - 8032328: 681b ldr r3, [r3, #0] - 803232a: 68db ldr r3, [r3, #12] - 803232c: f003 0308 and.w r3, r3, #8 - 8032330: 2b08 cmp r3, #8 - 8032332: d11b bne.n 803236c + 80323aa: 687b ldr r3, [r7, #4] + 80323ac: 681b ldr r3, [r3, #0] + 80323ae: 68db ldr r3, [r3, #12] + 80323b0: f003 0308 and.w r3, r3, #8 + 80323b4: 2b08 cmp r3, #8 + 80323b6: d11b bne.n 80323f0 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - 8032334: 687b ldr r3, [r7, #4] - 8032336: 681b ldr r3, [r3, #0] - 8032338: f06f 0208 mvn.w r2, #8 - 803233c: 611a str r2, [r3, #16] + 80323b8: 687b ldr r3, [r7, #4] + 80323ba: 681b ldr r3, [r3, #0] + 80323bc: f06f 0208 mvn.w r2, #8 + 80323c0: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 803233e: 687b ldr r3, [r7, #4] - 8032340: 2204 movs r2, #4 - 8032342: 771a strb r2, [r3, #28] + 80323c2: 687b ldr r3, [r7, #4] + 80323c4: 2204 movs r2, #4 + 80323c6: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8032344: 687b ldr r3, [r7, #4] - 8032346: 681b ldr r3, [r3, #0] - 8032348: 69db ldr r3, [r3, #28] - 803234a: f003 0303 and.w r3, r3, #3 - 803234e: 2b00 cmp r3, #0 - 8032350: d003 beq.n 803235a + 80323c8: 687b ldr r3, [r7, #4] + 80323ca: 681b ldr r3, [r3, #0] + 80323cc: 69db ldr r3, [r3, #28] + 80323ce: f003 0303 and.w r3, r3, #3 + 80323d2: 2b00 cmp r3, #0 + 80323d4: d003 beq.n 80323de { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8032352: 6878 ldr r0, [r7, #4] - 8032354: f000 f9aa bl 80326ac - 8032358: e005 b.n 8032366 + 80323d6: 6878 ldr r0, [r7, #4] + 80323d8: f000 f9aa bl 8032730 + 80323dc: e005 b.n 80323ea { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 803235a: 6878 ldr r0, [r7, #4] - 803235c: f000 f99c bl 8032698 + 80323de: 6878 ldr r0, [r7, #4] + 80323e0: f000 f99c bl 803271c HAL_TIM_PWM_PulseFinishedCallback(htim); - 8032360: 6878 ldr r0, [r7, #4] - 8032362: f000 f9ad bl 80326c0 + 80323e4: 6878 ldr r0, [r7, #4] + 80323e6: f000 f9ad bl 8032744 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8032366: 687b ldr r3, [r7, #4] - 8032368: 2200 movs r2, #0 - 803236a: 771a strb r2, [r3, #28] + 80323ea: 687b ldr r3, [r7, #4] + 80323ec: 2200 movs r2, #0 + 80323ee: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - 803236c: 687b ldr r3, [r7, #4] - 803236e: 681b ldr r3, [r3, #0] - 8032370: 691b ldr r3, [r3, #16] - 8032372: f003 0310 and.w r3, r3, #16 - 8032376: 2b10 cmp r3, #16 - 8032378: d122 bne.n 80323c0 + 80323f0: 687b ldr r3, [r7, #4] + 80323f2: 681b ldr r3, [r3, #0] + 80323f4: 691b ldr r3, [r3, #16] + 80323f6: f003 0310 and.w r3, r3, #16 + 80323fa: 2b10 cmp r3, #16 + 80323fc: d122 bne.n 8032444 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) - 803237a: 687b ldr r3, [r7, #4] - 803237c: 681b ldr r3, [r3, #0] - 803237e: 68db ldr r3, [r3, #12] - 8032380: f003 0310 and.w r3, r3, #16 - 8032384: 2b10 cmp r3, #16 - 8032386: d11b bne.n 80323c0 + 80323fe: 687b ldr r3, [r7, #4] + 8032400: 681b ldr r3, [r3, #0] + 8032402: 68db ldr r3, [r3, #12] + 8032404: f003 0310 and.w r3, r3, #16 + 8032408: 2b10 cmp r3, #16 + 803240a: d11b bne.n 8032444 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - 8032388: 687b ldr r3, [r7, #4] - 803238a: 681b ldr r3, [r3, #0] - 803238c: f06f 0210 mvn.w r2, #16 - 8032390: 611a str r2, [r3, #16] + 803240c: 687b ldr r3, [r7, #4] + 803240e: 681b ldr r3, [r3, #0] + 8032410: f06f 0210 mvn.w r2, #16 + 8032414: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 8032392: 687b ldr r3, [r7, #4] - 8032394: 2208 movs r2, #8 - 8032396: 771a strb r2, [r3, #28] + 8032416: 687b ldr r3, [r7, #4] + 8032418: 2208 movs r2, #8 + 803241a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8032398: 687b ldr r3, [r7, #4] - 803239a: 681b ldr r3, [r3, #0] - 803239c: 69db ldr r3, [r3, #28] - 803239e: f403 7340 and.w r3, r3, #768 ; 0x300 - 80323a2: 2b00 cmp r3, #0 - 80323a4: d003 beq.n 80323ae + 803241c: 687b ldr r3, [r7, #4] + 803241e: 681b ldr r3, [r3, #0] + 8032420: 69db ldr r3, [r3, #28] + 8032422: f403 7340 and.w r3, r3, #768 ; 0x300 + 8032426: 2b00 cmp r3, #0 + 8032428: d003 beq.n 8032432 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80323a6: 6878 ldr r0, [r7, #4] - 80323a8: f000 f980 bl 80326ac - 80323ac: e005 b.n 80323ba + 803242a: 6878 ldr r0, [r7, #4] + 803242c: f000 f980 bl 8032730 + 8032430: e005 b.n 803243e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 80323ae: 6878 ldr r0, [r7, #4] - 80323b0: f000 f972 bl 8032698 + 8032432: 6878 ldr r0, [r7, #4] + 8032434: f000 f972 bl 803271c HAL_TIM_PWM_PulseFinishedCallback(htim); - 80323b4: 6878 ldr r0, [r7, #4] - 80323b6: f000 f983 bl 80326c0 + 8032438: 6878 ldr r0, [r7, #4] + 803243a: f000 f983 bl 8032744 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80323ba: 687b ldr r3, [r7, #4] - 80323bc: 2200 movs r2, #0 - 80323be: 771a strb r2, [r3, #28] + 803243e: 687b ldr r3, [r7, #4] + 8032440: 2200 movs r2, #0 + 8032442: 771a strb r2, [r3, #28] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - 80323c0: 687b ldr r3, [r7, #4] - 80323c2: 681b ldr r3, [r3, #0] - 80323c4: 691b ldr r3, [r3, #16] - 80323c6: f003 0301 and.w r3, r3, #1 - 80323ca: 2b01 cmp r3, #1 - 80323cc: d10e bne.n 80323ec + 8032444: 687b ldr r3, [r7, #4] + 8032446: 681b ldr r3, [r3, #0] + 8032448: 691b ldr r3, [r3, #16] + 803244a: f003 0301 and.w r3, r3, #1 + 803244e: 2b01 cmp r3, #1 + 8032450: d10e bne.n 8032470 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) - 80323ce: 687b ldr r3, [r7, #4] - 80323d0: 681b ldr r3, [r3, #0] - 80323d2: 68db ldr r3, [r3, #12] - 80323d4: f003 0301 and.w r3, r3, #1 - 80323d8: 2b01 cmp r3, #1 - 80323da: d107 bne.n 80323ec + 8032452: 687b ldr r3, [r7, #4] + 8032454: 681b ldr r3, [r3, #0] + 8032456: 68db ldr r3, [r3, #12] + 8032458: f003 0301 and.w r3, r3, #1 + 803245c: 2b01 cmp r3, #1 + 803245e: d107 bne.n 8032470 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 80323dc: 687b ldr r3, [r7, #4] - 80323de: 681b ldr r3, [r3, #0] - 80323e0: f06f 0201 mvn.w r2, #1 - 80323e4: 611a str r2, [r3, #16] + 8032460: 687b ldr r3, [r7, #4] + 8032462: 681b ldr r3, [r3, #0] + 8032464: f06f 0201 mvn.w r2, #1 + 8032468: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); - 80323e6: 6878 ldr r0, [r7, #4] - 80323e8: f7ee ffce bl 8021388 + 803246a: 6878 ldr r0, [r7, #4] + 803246c: f7ee ff8c bl 8021388 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - 80323ec: 687b ldr r3, [r7, #4] - 80323ee: 681b ldr r3, [r3, #0] - 80323f0: 691b ldr r3, [r3, #16] - 80323f2: f003 0380 and.w r3, r3, #128 ; 0x80 - 80323f6: 2b80 cmp r3, #128 ; 0x80 - 80323f8: d10e bne.n 8032418 + 8032470: 687b ldr r3, [r7, #4] + 8032472: 681b ldr r3, [r3, #0] + 8032474: 691b ldr r3, [r3, #16] + 8032476: f003 0380 and.w r3, r3, #128 ; 0x80 + 803247a: 2b80 cmp r3, #128 ; 0x80 + 803247c: d10e bne.n 803249c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 80323fa: 687b ldr r3, [r7, #4] - 80323fc: 681b ldr r3, [r3, #0] - 80323fe: 68db ldr r3, [r3, #12] - 8032400: f003 0380 and.w r3, r3, #128 ; 0x80 - 8032404: 2b80 cmp r3, #128 ; 0x80 - 8032406: d107 bne.n 8032418 + 803247e: 687b ldr r3, [r7, #4] + 8032480: 681b ldr r3, [r3, #0] + 8032482: 68db ldr r3, [r3, #12] + 8032484: f003 0380 and.w r3, r3, #128 ; 0x80 + 8032488: 2b80 cmp r3, #128 ; 0x80 + 803248a: d107 bne.n 803249c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - 8032408: 687b ldr r3, [r7, #4] - 803240a: 681b ldr r3, [r3, #0] - 803240c: f06f 0280 mvn.w r2, #128 ; 0x80 - 8032410: 611a str r2, [r3, #16] + 803248c: 687b ldr r3, [r7, #4] + 803248e: 681b ldr r3, [r3, #0] + 8032490: f06f 0280 mvn.w r2, #128 ; 0x80 + 8032494: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); - 8032412: 6878 ldr r0, [r7, #4] - 8032414: f000 fb38 bl 8032a88 + 8032496: 6878 ldr r0, [r7, #4] + 8032498: f000 fb38 bl 8032b0c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break2 input event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK2) != RESET) - 8032418: 687b ldr r3, [r7, #4] - 803241a: 681b ldr r3, [r3, #0] - 803241c: 691b ldr r3, [r3, #16] - 803241e: f403 7380 and.w r3, r3, #256 ; 0x100 - 8032422: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 8032426: d10e bne.n 8032446 + 803249c: 687b ldr r3, [r7, #4] + 803249e: 681b ldr r3, [r3, #0] + 80324a0: 691b ldr r3, [r3, #16] + 80324a2: f403 7380 and.w r3, r3, #256 ; 0x100 + 80324a6: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80324aa: d10e bne.n 80324ca { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) - 8032428: 687b ldr r3, [r7, #4] - 803242a: 681b ldr r3, [r3, #0] - 803242c: 68db ldr r3, [r3, #12] - 803242e: f003 0380 and.w r3, r3, #128 ; 0x80 - 8032432: 2b80 cmp r3, #128 ; 0x80 - 8032434: d107 bne.n 8032446 + 80324ac: 687b ldr r3, [r7, #4] + 80324ae: 681b ldr r3, [r3, #0] + 80324b0: 68db ldr r3, [r3, #12] + 80324b2: f003 0380 and.w r3, r3, #128 ; 0x80 + 80324b6: 2b80 cmp r3, #128 ; 0x80 + 80324b8: d107 bne.n 80324ca { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); - 8032436: 687b ldr r3, [r7, #4] - 8032438: 681b ldr r3, [r3, #0] - 803243a: f46f 7280 mvn.w r2, #256 ; 0x100 - 803243e: 611a str r2, [r3, #16] + 80324ba: 687b ldr r3, [r7, #4] + 80324bc: 681b ldr r3, [r3, #0] + 80324be: f46f 7280 mvn.w r2, #256 ; 0x100 + 80324c2: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->Break2Callback(htim); #else HAL_TIMEx_Break2Callback(htim); - 8032440: 6878 ldr r0, [r7, #4] - 8032442: f000 fb2b bl 8032a9c + 80324c4: 6878 ldr r0, [r7, #4] + 80324c6: f000 fb2b bl 8032b20 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - 8032446: 687b ldr r3, [r7, #4] - 8032448: 681b ldr r3, [r3, #0] - 803244a: 691b ldr r3, [r3, #16] - 803244c: f003 0340 and.w r3, r3, #64 ; 0x40 - 8032450: 2b40 cmp r3, #64 ; 0x40 - 8032452: d10e bne.n 8032472 + 80324ca: 687b ldr r3, [r7, #4] + 80324cc: 681b ldr r3, [r3, #0] + 80324ce: 691b ldr r3, [r3, #16] + 80324d0: f003 0340 and.w r3, r3, #64 ; 0x40 + 80324d4: 2b40 cmp r3, #64 ; 0x40 + 80324d6: d10e bne.n 80324f6 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) - 8032454: 687b ldr r3, [r7, #4] - 8032456: 681b ldr r3, [r3, #0] - 8032458: 68db ldr r3, [r3, #12] - 803245a: f003 0340 and.w r3, r3, #64 ; 0x40 - 803245e: 2b40 cmp r3, #64 ; 0x40 - 8032460: d107 bne.n 8032472 + 80324d8: 687b ldr r3, [r7, #4] + 80324da: 681b ldr r3, [r3, #0] + 80324dc: 68db ldr r3, [r3, #12] + 80324de: f003 0340 and.w r3, r3, #64 ; 0x40 + 80324e2: 2b40 cmp r3, #64 ; 0x40 + 80324e4: d107 bne.n 80324f6 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - 8032462: 687b ldr r3, [r7, #4] - 8032464: 681b ldr r3, [r3, #0] - 8032466: f06f 0240 mvn.w r2, #64 ; 0x40 - 803246a: 611a str r2, [r3, #16] + 80324e6: 687b ldr r3, [r7, #4] + 80324e8: 681b ldr r3, [r3, #0] + 80324ea: f06f 0240 mvn.w r2, #64 ; 0x40 + 80324ee: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); - 803246c: 6878 ldr r0, [r7, #4] - 803246e: f000 f931 bl 80326d4 + 80324f0: 6878 ldr r0, [r7, #4] + 80324f2: f000 f931 bl 8032758 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - 8032472: 687b ldr r3, [r7, #4] - 8032474: 681b ldr r3, [r3, #0] - 8032476: 691b ldr r3, [r3, #16] - 8032478: f003 0320 and.w r3, r3, #32 - 803247c: 2b20 cmp r3, #32 - 803247e: d10e bne.n 803249e + 80324f6: 687b ldr r3, [r7, #4] + 80324f8: 681b ldr r3, [r3, #0] + 80324fa: 691b ldr r3, [r3, #16] + 80324fc: f003 0320 and.w r3, r3, #32 + 8032500: 2b20 cmp r3, #32 + 8032502: d10e bne.n 8032522 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) - 8032480: 687b ldr r3, [r7, #4] - 8032482: 681b ldr r3, [r3, #0] - 8032484: 68db ldr r3, [r3, #12] - 8032486: f003 0320 and.w r3, r3, #32 - 803248a: 2b20 cmp r3, #32 - 803248c: d107 bne.n 803249e + 8032504: 687b ldr r3, [r7, #4] + 8032506: 681b ldr r3, [r3, #0] + 8032508: 68db ldr r3, [r3, #12] + 803250a: f003 0320 and.w r3, r3, #32 + 803250e: 2b20 cmp r3, #32 + 8032510: d107 bne.n 8032522 { __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - 803248e: 687b ldr r3, [r7, #4] - 8032490: 681b ldr r3, [r3, #0] - 8032492: f06f 0220 mvn.w r2, #32 - 8032496: 611a str r2, [r3, #16] + 8032512: 687b ldr r3, [r7, #4] + 8032514: 681b ldr r3, [r3, #0] + 8032516: f06f 0220 mvn.w r2, #32 + 803251a: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); - 8032498: 6878 ldr r0, [r7, #4] - 803249a: f000 faeb bl 8032a74 + 803251c: 6878 ldr r0, [r7, #4] + 803251e: f000 faeb bl 8032af8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } - 803249e: bf00 nop - 80324a0: 3708 adds r7, #8 - 80324a2: 46bd mov sp, r7 - 80324a4: bd80 pop {r7, pc} + 8032522: bf00 nop + 8032524: 3708 adds r7, #8 + 8032526: 46bd mov sp, r7 + 8032528: bd80 pop {r7, pc} ... -080324a8 : +0803252c : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) { - 80324a8: b580 push {r7, lr} - 80324aa: b084 sub sp, #16 - 80324ac: af00 add r7, sp, #0 - 80324ae: 6078 str r0, [r7, #4] - 80324b0: 6039 str r1, [r7, #0] + 803252c: b580 push {r7, lr} + 803252e: b084 sub sp, #16 + 8032530: af00 add r7, sp, #0 + 8032532: 6078 str r0, [r7, #4] + 8032534: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 80324b2: 2300 movs r3, #0 - 80324b4: 73fb strb r3, [r7, #15] + 8032536: 2300 movs r3, #0 + 8032538: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); - 80324b6: 687b ldr r3, [r7, #4] - 80324b8: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 80324bc: 2b01 cmp r3, #1 - 80324be: d101 bne.n 80324c4 - 80324c0: 2302 movs r3, #2 - 80324c2: e0dc b.n 803267e - 80324c4: 687b ldr r3, [r7, #4] - 80324c6: 2201 movs r2, #1 - 80324c8: f883 203c strb.w r2, [r3, #60] ; 0x3c + 803253a: 687b ldr r3, [r7, #4] + 803253c: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 8032540: 2b01 cmp r3, #1 + 8032542: d101 bne.n 8032548 + 8032544: 2302 movs r3, #2 + 8032546: e0dc b.n 8032702 + 8032548: 687b ldr r3, [r7, #4] + 803254a: 2201 movs r2, #1 + 803254c: f883 203c strb.w r2, [r3, #60] ; 0x3c htim->State = HAL_TIM_STATE_BUSY; - 80324cc: 687b ldr r3, [r7, #4] - 80324ce: 2202 movs r2, #2 - 80324d0: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8032550: 687b ldr r3, [r7, #4] + 8032552: 2202 movs r2, #2 + 8032554: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; - 80324d4: 687b ldr r3, [r7, #4] - 80324d6: 681b ldr r3, [r3, #0] - 80324d8: 689b ldr r3, [r3, #8] - 80324da: 60bb str r3, [r7, #8] + 8032558: 687b ldr r3, [r7, #4] + 803255a: 681b ldr r3, [r3, #0] + 803255c: 689b ldr r3, [r3, #8] + 803255e: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 80324dc: 68ba ldr r2, [r7, #8] - 80324de: 4b6a ldr r3, [pc, #424] ; (8032688 ) - 80324e0: 4013 ands r3, r2 - 80324e2: 60bb str r3, [r7, #8] + 8032560: 68ba ldr r2, [r7, #8] + 8032562: 4b6a ldr r3, [pc, #424] ; (803270c ) + 8032564: 4013 ands r3, r2 + 8032566: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 80324e4: 68bb ldr r3, [r7, #8] - 80324e6: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 80324ea: 60bb str r3, [r7, #8] + 8032568: 68bb ldr r3, [r7, #8] + 803256a: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 803256e: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; - 80324ec: 687b ldr r3, [r7, #4] - 80324ee: 681b ldr r3, [r3, #0] - 80324f0: 68ba ldr r2, [r7, #8] - 80324f2: 609a str r2, [r3, #8] + 8032570: 687b ldr r3, [r7, #4] + 8032572: 681b ldr r3, [r3, #0] + 8032574: 68ba ldr r2, [r7, #8] + 8032576: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) - 80324f4: 683b ldr r3, [r7, #0] - 80324f6: 681b ldr r3, [r3, #0] - 80324f8: 4a64 ldr r2, [pc, #400] ; (803268c ) - 80324fa: 4293 cmp r3, r2 - 80324fc: f000 80a9 beq.w 8032652 - 8032500: 4a62 ldr r2, [pc, #392] ; (803268c ) - 8032502: 4293 cmp r3, r2 - 8032504: f200 80ae bhi.w 8032664 - 8032508: 4a61 ldr r2, [pc, #388] ; (8032690 ) - 803250a: 4293 cmp r3, r2 - 803250c: f000 80a1 beq.w 8032652 - 8032510: 4a5f ldr r2, [pc, #380] ; (8032690 ) - 8032512: 4293 cmp r3, r2 - 8032514: f200 80a6 bhi.w 8032664 - 8032518: 4a5e ldr r2, [pc, #376] ; (8032694 ) - 803251a: 4293 cmp r3, r2 - 803251c: f000 8099 beq.w 8032652 - 8032520: 4a5c ldr r2, [pc, #368] ; (8032694 ) - 8032522: 4293 cmp r3, r2 - 8032524: f200 809e bhi.w 8032664 - 8032528: f1b3 1f10 cmp.w r3, #1048592 ; 0x100010 - 803252c: f000 8091 beq.w 8032652 - 8032530: f1b3 1f10 cmp.w r3, #1048592 ; 0x100010 - 8032534: f200 8096 bhi.w 8032664 - 8032538: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 803253c: f000 8089 beq.w 8032652 - 8032540: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8032544: f200 808e bhi.w 8032664 - 8032548: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 803254c: d03e beq.n 80325cc - 803254e: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 - 8032552: f200 8087 bhi.w 8032664 - 8032556: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 803255a: f000 8086 beq.w 803266a - 803255e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8032562: d87f bhi.n 8032664 - 8032564: 2b70 cmp r3, #112 ; 0x70 - 8032566: d01a beq.n 803259e - 8032568: 2b70 cmp r3, #112 ; 0x70 - 803256a: d87b bhi.n 8032664 - 803256c: 2b60 cmp r3, #96 ; 0x60 - 803256e: d050 beq.n 8032612 - 8032570: 2b60 cmp r3, #96 ; 0x60 - 8032572: d877 bhi.n 8032664 - 8032574: 2b50 cmp r3, #80 ; 0x50 - 8032576: d03c beq.n 80325f2 - 8032578: 2b50 cmp r3, #80 ; 0x50 - 803257a: d873 bhi.n 8032664 - 803257c: 2b40 cmp r3, #64 ; 0x40 - 803257e: d058 beq.n 8032632 - 8032580: 2b40 cmp r3, #64 ; 0x40 - 8032582: d86f bhi.n 8032664 - 8032584: 2b30 cmp r3, #48 ; 0x30 - 8032586: d064 beq.n 8032652 - 8032588: 2b30 cmp r3, #48 ; 0x30 - 803258a: d86b bhi.n 8032664 - 803258c: 2b20 cmp r3, #32 - 803258e: d060 beq.n 8032652 - 8032590: 2b20 cmp r3, #32 - 8032592: d867 bhi.n 8032664 - 8032594: 2b00 cmp r3, #0 - 8032596: d05c beq.n 8032652 - 8032598: 2b10 cmp r3, #16 - 803259a: d05a beq.n 8032652 - 803259c: e062 b.n 8032664 + 8032578: 683b ldr r3, [r7, #0] + 803257a: 681b ldr r3, [r3, #0] + 803257c: 4a64 ldr r2, [pc, #400] ; (8032710 ) + 803257e: 4293 cmp r3, r2 + 8032580: f000 80a9 beq.w 80326d6 + 8032584: 4a62 ldr r2, [pc, #392] ; (8032710 ) + 8032586: 4293 cmp r3, r2 + 8032588: f200 80ae bhi.w 80326e8 + 803258c: 4a61 ldr r2, [pc, #388] ; (8032714 ) + 803258e: 4293 cmp r3, r2 + 8032590: f000 80a1 beq.w 80326d6 + 8032594: 4a5f ldr r2, [pc, #380] ; (8032714 ) + 8032596: 4293 cmp r3, r2 + 8032598: f200 80a6 bhi.w 80326e8 + 803259c: 4a5e ldr r2, [pc, #376] ; (8032718 ) + 803259e: 4293 cmp r3, r2 + 80325a0: f000 8099 beq.w 80326d6 + 80325a4: 4a5c ldr r2, [pc, #368] ; (8032718 ) + 80325a6: 4293 cmp r3, r2 + 80325a8: f200 809e bhi.w 80326e8 + 80325ac: f1b3 1f10 cmp.w r3, #1048592 ; 0x100010 + 80325b0: f000 8091 beq.w 80326d6 + 80325b4: f1b3 1f10 cmp.w r3, #1048592 ; 0x100010 + 80325b8: f200 8096 bhi.w 80326e8 + 80325bc: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 80325c0: f000 8089 beq.w 80326d6 + 80325c4: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 80325c8: f200 808e bhi.w 80326e8 + 80325cc: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 80325d0: d03e beq.n 8032650 + 80325d2: f5b3 5f00 cmp.w r3, #8192 ; 0x2000 + 80325d6: f200 8087 bhi.w 80326e8 + 80325da: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80325de: f000 8086 beq.w 80326ee + 80325e2: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80325e6: d87f bhi.n 80326e8 + 80325e8: 2b70 cmp r3, #112 ; 0x70 + 80325ea: d01a beq.n 8032622 + 80325ec: 2b70 cmp r3, #112 ; 0x70 + 80325ee: d87b bhi.n 80326e8 + 80325f0: 2b60 cmp r3, #96 ; 0x60 + 80325f2: d050 beq.n 8032696 + 80325f4: 2b60 cmp r3, #96 ; 0x60 + 80325f6: d877 bhi.n 80326e8 + 80325f8: 2b50 cmp r3, #80 ; 0x50 + 80325fa: d03c beq.n 8032676 + 80325fc: 2b50 cmp r3, #80 ; 0x50 + 80325fe: d873 bhi.n 80326e8 + 8032600: 2b40 cmp r3, #64 ; 0x40 + 8032602: d058 beq.n 80326b6 + 8032604: 2b40 cmp r3, #64 ; 0x40 + 8032606: d86f bhi.n 80326e8 + 8032608: 2b30 cmp r3, #48 ; 0x30 + 803260a: d064 beq.n 80326d6 + 803260c: 2b30 cmp r3, #48 ; 0x30 + 803260e: d86b bhi.n 80326e8 + 8032610: 2b20 cmp r3, #32 + 8032612: d060 beq.n 80326d6 + 8032614: 2b20 cmp r3, #32 + 8032616: d867 bhi.n 80326e8 + 8032618: 2b00 cmp r3, #0 + 803261a: d05c beq.n 80326d6 + 803261c: 2b10 cmp r3, #16 + 803261e: d05a beq.n 80326d6 + 8032620: e062 b.n 80326e8 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 803259e: 687b ldr r3, [r7, #4] - 80325a0: 6818 ldr r0, [r3, #0] - 80325a2: 683b ldr r3, [r7, #0] - 80325a4: 6899 ldr r1, [r3, #8] - 80325a6: 683b ldr r3, [r7, #0] - 80325a8: 685a ldr r2, [r3, #4] - 80325aa: 683b ldr r3, [r7, #0] - 80325ac: 68db ldr r3, [r3, #12] - 80325ae: f000 f9b3 bl 8032918 + 8032622: 687b ldr r3, [r7, #4] + 8032624: 6818 ldr r0, [r3, #0] + 8032626: 683b ldr r3, [r7, #0] + 8032628: 6899 ldr r1, [r3, #8] + 803262a: 683b ldr r3, [r7, #0] + 803262c: 685a ldr r2, [r3, #4] + 803262e: 683b ldr r3, [r7, #0] + 8032630: 68db ldr r3, [r3, #12] + 8032632: f000 f9b3 bl 803299c sClockSourceConfig->ClockPrescaler, sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; - 80325b2: 687b ldr r3, [r7, #4] - 80325b4: 681b ldr r3, [r3, #0] - 80325b6: 689b ldr r3, [r3, #8] - 80325b8: 60bb str r3, [r7, #8] + 8032636: 687b ldr r3, [r7, #4] + 8032638: 681b ldr r3, [r3, #0] + 803263a: 689b ldr r3, [r3, #8] + 803263c: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 80325ba: 68bb ldr r3, [r7, #8] - 80325bc: f043 0377 orr.w r3, r3, #119 ; 0x77 - 80325c0: 60bb str r3, [r7, #8] + 803263e: 68bb ldr r3, [r7, #8] + 8032640: f043 0377 orr.w r3, r3, #119 ; 0x77 + 8032644: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 80325c2: 687b ldr r3, [r7, #4] - 80325c4: 681b ldr r3, [r3, #0] - 80325c6: 68ba ldr r2, [r7, #8] - 80325c8: 609a str r2, [r3, #8] + 8032646: 687b ldr r3, [r7, #4] + 8032648: 681b ldr r3, [r3, #0] + 803264a: 68ba ldr r2, [r7, #8] + 803264c: 609a str r2, [r3, #8] break; - 80325ca: e04f b.n 803266c + 803264e: e04f b.n 80326f0 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 80325cc: 687b ldr r3, [r7, #4] - 80325ce: 6818 ldr r0, [r3, #0] - 80325d0: 683b ldr r3, [r7, #0] - 80325d2: 6899 ldr r1, [r3, #8] - 80325d4: 683b ldr r3, [r7, #0] - 80325d6: 685a ldr r2, [r3, #4] - 80325d8: 683b ldr r3, [r7, #0] - 80325da: 68db ldr r3, [r3, #12] - 80325dc: f000 f99c bl 8032918 + 8032650: 687b ldr r3, [r7, #4] + 8032652: 6818 ldr r0, [r3, #0] + 8032654: 683b ldr r3, [r7, #0] + 8032656: 6899 ldr r1, [r3, #8] + 8032658: 683b ldr r3, [r7, #0] + 803265a: 685a ldr r2, [r3, #4] + 803265c: 683b ldr r3, [r7, #0] + 803265e: 68db ldr r3, [r3, #12] + 8032660: f000 f99c bl 803299c sClockSourceConfig->ClockPrescaler, sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; - 80325e0: 687b ldr r3, [r7, #4] - 80325e2: 681b ldr r3, [r3, #0] - 80325e4: 689a ldr r2, [r3, #8] - 80325e6: 687b ldr r3, [r7, #4] - 80325e8: 681b ldr r3, [r3, #0] - 80325ea: f442 4280 orr.w r2, r2, #16384 ; 0x4000 - 80325ee: 609a str r2, [r3, #8] + 8032664: 687b ldr r3, [r7, #4] + 8032666: 681b ldr r3, [r3, #0] + 8032668: 689a ldr r2, [r3, #8] + 803266a: 687b ldr r3, [r7, #4] + 803266c: 681b ldr r3, [r3, #0] + 803266e: f442 4280 orr.w r2, r2, #16384 ; 0x4000 + 8032672: 609a str r2, [r3, #8] break; - 80325f0: e03c b.n 803266c + 8032674: e03c b.n 80326f0 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 80325f2: 687b ldr r3, [r7, #4] - 80325f4: 6818 ldr r0, [r3, #0] - 80325f6: 683b ldr r3, [r7, #0] - 80325f8: 6859 ldr r1, [r3, #4] - 80325fa: 683b ldr r3, [r7, #0] - 80325fc: 68db ldr r3, [r3, #12] - 80325fe: 461a mov r2, r3 - 8032600: f000 f90c bl 803281c + 8032676: 687b ldr r3, [r7, #4] + 8032678: 6818 ldr r0, [r3, #0] + 803267a: 683b ldr r3, [r7, #0] + 803267c: 6859 ldr r1, [r3, #4] + 803267e: 683b ldr r3, [r7, #0] + 8032680: 68db ldr r3, [r3, #12] + 8032682: 461a mov r2, r3 + 8032684: f000 f90c bl 80328a0 sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 8032604: 687b ldr r3, [r7, #4] - 8032606: 681b ldr r3, [r3, #0] - 8032608: 2150 movs r1, #80 ; 0x50 - 803260a: 4618 mov r0, r3 - 803260c: f000 f966 bl 80328dc + 8032688: 687b ldr r3, [r7, #4] + 803268a: 681b ldr r3, [r3, #0] + 803268c: 2150 movs r1, #80 ; 0x50 + 803268e: 4618 mov r0, r3 + 8032690: f000 f966 bl 8032960 break; - 8032610: e02c b.n 803266c + 8032694: e02c b.n 80326f0 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, - 8032612: 687b ldr r3, [r7, #4] - 8032614: 6818 ldr r0, [r3, #0] - 8032616: 683b ldr r3, [r7, #0] - 8032618: 6859 ldr r1, [r3, #4] - 803261a: 683b ldr r3, [r7, #0] - 803261c: 68db ldr r3, [r3, #12] - 803261e: 461a mov r2, r3 - 8032620: f000 f92b bl 803287a + 8032696: 687b ldr r3, [r7, #4] + 8032698: 6818 ldr r0, [r3, #0] + 803269a: 683b ldr r3, [r7, #0] + 803269c: 6859 ldr r1, [r3, #4] + 803269e: 683b ldr r3, [r7, #0] + 80326a0: 68db ldr r3, [r3, #12] + 80326a2: 461a mov r2, r3 + 80326a4: f000 f92b bl 80328fe sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 8032624: 687b ldr r3, [r7, #4] - 8032626: 681b ldr r3, [r3, #0] - 8032628: 2160 movs r1, #96 ; 0x60 - 803262a: 4618 mov r0, r3 - 803262c: f000 f956 bl 80328dc + 80326a8: 687b ldr r3, [r7, #4] + 80326aa: 681b ldr r3, [r3, #0] + 80326ac: 2160 movs r1, #96 ; 0x60 + 80326ae: 4618 mov r0, r3 + 80326b0: f000 f956 bl 8032960 break; - 8032630: e01c b.n 803266c + 80326b4: e01c b.n 80326f0 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 8032632: 687b ldr r3, [r7, #4] - 8032634: 6818 ldr r0, [r3, #0] - 8032636: 683b ldr r3, [r7, #0] - 8032638: 6859 ldr r1, [r3, #4] - 803263a: 683b ldr r3, [r7, #0] - 803263c: 68db ldr r3, [r3, #12] - 803263e: 461a mov r2, r3 - 8032640: f000 f8ec bl 803281c + 80326b6: 687b ldr r3, [r7, #4] + 80326b8: 6818 ldr r0, [r3, #0] + 80326ba: 683b ldr r3, [r7, #0] + 80326bc: 6859 ldr r1, [r3, #4] + 80326be: 683b ldr r3, [r7, #0] + 80326c0: 68db ldr r3, [r3, #12] + 80326c2: 461a mov r2, r3 + 80326c4: f000 f8ec bl 80328a0 sClockSourceConfig->ClockPolarity, sClockSourceConfig->ClockFilter); TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 8032644: 687b ldr r3, [r7, #4] - 8032646: 681b ldr r3, [r3, #0] - 8032648: 2140 movs r1, #64 ; 0x40 - 803264a: 4618 mov r0, r3 - 803264c: f000 f946 bl 80328dc + 80326c8: 687b ldr r3, [r7, #4] + 80326ca: 681b ldr r3, [r3, #0] + 80326cc: 2140 movs r1, #64 ; 0x40 + 80326ce: 4618 mov r0, r3 + 80326d0: f000 f946 bl 8032960 break; - 8032650: e00c b.n 803266c + 80326d4: e00c b.n 80326f0 case TIM_CLOCKSOURCE_ITR8: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 8032652: 687b ldr r3, [r7, #4] - 8032654: 681a ldr r2, [r3, #0] - 8032656: 683b ldr r3, [r7, #0] - 8032658: 681b ldr r3, [r3, #0] - 803265a: 4619 mov r1, r3 - 803265c: 4610 mov r0, r2 - 803265e: f000 f93d bl 80328dc + 80326d6: 687b ldr r3, [r7, #4] + 80326d8: 681a ldr r2, [r3, #0] + 80326da: 683b ldr r3, [r7, #0] + 80326dc: 681b ldr r3, [r3, #0] + 80326de: 4619 mov r1, r3 + 80326e0: 4610 mov r0, r2 + 80326e2: f000 f93d bl 8032960 break; - 8032662: e003 b.n 803266c + 80326e6: e003 b.n 80326f0 } default: status = HAL_ERROR; - 8032664: 2301 movs r3, #1 - 8032666: 73fb strb r3, [r7, #15] + 80326e8: 2301 movs r3, #1 + 80326ea: 73fb strb r3, [r7, #15] break; - 8032668: e000 b.n 803266c + 80326ec: e000 b.n 80326f0 break; - 803266a: bf00 nop + 80326ee: bf00 nop } htim->State = HAL_TIM_STATE_READY; - 803266c: 687b ldr r3, [r7, #4] - 803266e: 2201 movs r2, #1 - 8032670: f883 203d strb.w r2, [r3, #61] ; 0x3d + 80326f0: 687b ldr r3, [r7, #4] + 80326f2: 2201 movs r2, #1 + 80326f4: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); - 8032674: 687b ldr r3, [r7, #4] - 8032676: 2200 movs r2, #0 - 8032678: f883 203c strb.w r2, [r3, #60] ; 0x3c + 80326f8: 687b ldr r3, [r7, #4] + 80326fa: 2200 movs r2, #0 + 80326fc: f883 203c strb.w r2, [r3, #60] ; 0x3c return status; - 803267c: 7bfb ldrb r3, [r7, #15] -} - 803267e: 4618 mov r0, r3 - 8032680: 3710 adds r7, #16 - 8032682: 46bd mov sp, r7 - 8032684: bd80 pop {r7, pc} - 8032686: bf00 nop - 8032688: ffceff88 .word 0xffceff88 - 803268c: 00100040 .word 0x00100040 - 8032690: 00100030 .word 0x00100030 - 8032694: 00100020 .word 0x00100020 - -08032698 : + 8032700: 7bfb ldrb r3, [r7, #15] +} + 8032702: 4618 mov r0, r3 + 8032704: 3710 adds r7, #16 + 8032706: 46bd mov sp, r7 + 8032708: bd80 pop {r7, pc} + 803270a: bf00 nop + 803270c: ffceff88 .word 0xffceff88 + 8032710: 00100040 .word 0x00100040 + 8032714: 00100030 .word 0x00100030 + 8032718: 00100020 .word 0x00100020 + +0803271c : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { - 8032698: b480 push {r7} - 803269a: b083 sub sp, #12 - 803269c: af00 add r7, sp, #0 - 803269e: 6078 str r0, [r7, #4] + 803271c: b480 push {r7} + 803271e: b083 sub sp, #12 + 8032720: af00 add r7, sp, #0 + 8032722: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } - 80326a0: bf00 nop - 80326a2: 370c adds r7, #12 - 80326a4: 46bd mov sp, r7 - 80326a6: f85d 7b04 ldr.w r7, [sp], #4 - 80326aa: 4770 bx lr + 8032724: bf00 nop + 8032726: 370c adds r7, #12 + 8032728: 46bd mov sp, r7 + 803272a: f85d 7b04 ldr.w r7, [sp], #4 + 803272e: 4770 bx lr -080326ac : +08032730 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { - 80326ac: b480 push {r7} - 80326ae: b083 sub sp, #12 - 80326b0: af00 add r7, sp, #0 - 80326b2: 6078 str r0, [r7, #4] + 8032730: b480 push {r7} + 8032732: b083 sub sp, #12 + 8032734: af00 add r7, sp, #0 + 8032736: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } - 80326b4: bf00 nop - 80326b6: 370c adds r7, #12 - 80326b8: 46bd mov sp, r7 - 80326ba: f85d 7b04 ldr.w r7, [sp], #4 - 80326be: 4770 bx lr + 8032738: bf00 nop + 803273a: 370c adds r7, #12 + 803273c: 46bd mov sp, r7 + 803273e: f85d 7b04 ldr.w r7, [sp], #4 + 8032742: 4770 bx lr -080326c0 : +08032744 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { - 80326c0: b480 push {r7} - 80326c2: b083 sub sp, #12 - 80326c4: af00 add r7, sp, #0 - 80326c6: 6078 str r0, [r7, #4] + 8032744: b480 push {r7} + 8032746: b083 sub sp, #12 + 8032748: af00 add r7, sp, #0 + 803274a: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } - 80326c8: bf00 nop - 80326ca: 370c adds r7, #12 - 80326cc: 46bd mov sp, r7 - 80326ce: f85d 7b04 ldr.w r7, [sp], #4 - 80326d2: 4770 bx lr + 803274c: bf00 nop + 803274e: 370c adds r7, #12 + 8032750: 46bd mov sp, r7 + 8032752: f85d 7b04 ldr.w r7, [sp], #4 + 8032756: 4770 bx lr -080326d4 : +08032758 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { - 80326d4: b480 push {r7} - 80326d6: b083 sub sp, #12 - 80326d8: af00 add r7, sp, #0 - 80326da: 6078 str r0, [r7, #4] + 8032758: b480 push {r7} + 803275a: b083 sub sp, #12 + 803275c: af00 add r7, sp, #0 + 803275e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } - 80326dc: bf00 nop - 80326de: 370c adds r7, #12 - 80326e0: 46bd mov sp, r7 - 80326e2: f85d 7b04 ldr.w r7, [sp], #4 - 80326e6: 4770 bx lr + 8032760: bf00 nop + 8032762: 370c adds r7, #12 + 8032764: 46bd mov sp, r7 + 8032766: f85d 7b04 ldr.w r7, [sp], #4 + 803276a: 4770 bx lr -080326e8 : +0803276c : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) { - 80326e8: b480 push {r7} - 80326ea: b085 sub sp, #20 - 80326ec: af00 add r7, sp, #0 - 80326ee: 6078 str r0, [r7, #4] - 80326f0: 6039 str r1, [r7, #0] + 803276c: b480 push {r7} + 803276e: b085 sub sp, #20 + 8032770: af00 add r7, sp, #0 + 8032772: 6078 str r0, [r7, #4] + 8032774: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; - 80326f2: 687b ldr r3, [r7, #4] - 80326f4: 681b ldr r3, [r3, #0] - 80326f6: 60fb str r3, [r7, #12] + 8032776: 687b ldr r3, [r7, #4] + 8032778: 681b ldr r3, [r3, #0] + 803277a: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 80326f8: 687b ldr r3, [r7, #4] - 80326fa: 4a40 ldr r2, [pc, #256] ; (80327fc ) - 80326fc: 4293 cmp r3, r2 - 80326fe: d013 beq.n 8032728 - 8032700: 687b ldr r3, [r7, #4] - 8032702: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8032706: d00f beq.n 8032728 - 8032708: 687b ldr r3, [r7, #4] - 803270a: 4a3d ldr r2, [pc, #244] ; (8032800 ) - 803270c: 4293 cmp r3, r2 - 803270e: d00b beq.n 8032728 - 8032710: 687b ldr r3, [r7, #4] - 8032712: 4a3c ldr r2, [pc, #240] ; (8032804 ) - 8032714: 4293 cmp r3, r2 - 8032716: d007 beq.n 8032728 - 8032718: 687b ldr r3, [r7, #4] - 803271a: 4a3b ldr r2, [pc, #236] ; (8032808 ) - 803271c: 4293 cmp r3, r2 - 803271e: d003 beq.n 8032728 - 8032720: 687b ldr r3, [r7, #4] - 8032722: 4a3a ldr r2, [pc, #232] ; (803280c ) - 8032724: 4293 cmp r3, r2 - 8032726: d108 bne.n 803273a + 803277c: 687b ldr r3, [r7, #4] + 803277e: 4a40 ldr r2, [pc, #256] ; (8032880 ) + 8032780: 4293 cmp r3, r2 + 8032782: d013 beq.n 80327ac + 8032784: 687b ldr r3, [r7, #4] + 8032786: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 803278a: d00f beq.n 80327ac + 803278c: 687b ldr r3, [r7, #4] + 803278e: 4a3d ldr r2, [pc, #244] ; (8032884 ) + 8032790: 4293 cmp r3, r2 + 8032792: d00b beq.n 80327ac + 8032794: 687b ldr r3, [r7, #4] + 8032796: 4a3c ldr r2, [pc, #240] ; (8032888 ) + 8032798: 4293 cmp r3, r2 + 803279a: d007 beq.n 80327ac + 803279c: 687b ldr r3, [r7, #4] + 803279e: 4a3b ldr r2, [pc, #236] ; (803288c ) + 80327a0: 4293 cmp r3, r2 + 80327a2: d003 beq.n 80327ac + 80327a4: 687b ldr r3, [r7, #4] + 80327a6: 4a3a ldr r2, [pc, #232] ; (8032890 ) + 80327a8: 4293 cmp r3, r2 + 80327aa: d108 bne.n 80327be { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8032728: 68fb ldr r3, [r7, #12] - 803272a: f023 0370 bic.w r3, r3, #112 ; 0x70 - 803272e: 60fb str r3, [r7, #12] + 80327ac: 68fb ldr r3, [r7, #12] + 80327ae: f023 0370 bic.w r3, r3, #112 ; 0x70 + 80327b2: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; - 8032730: 683b ldr r3, [r7, #0] - 8032732: 685b ldr r3, [r3, #4] - 8032734: 68fa ldr r2, [r7, #12] - 8032736: 4313 orrs r3, r2 - 8032738: 60fb str r3, [r7, #12] + 80327b4: 683b ldr r3, [r7, #0] + 80327b6: 685b ldr r3, [r3, #4] + 80327b8: 68fa ldr r2, [r7, #12] + 80327ba: 4313 orrs r3, r2 + 80327bc: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 803273a: 687b ldr r3, [r7, #4] - 803273c: 4a2f ldr r2, [pc, #188] ; (80327fc ) - 803273e: 4293 cmp r3, r2 - 8032740: d01f beq.n 8032782 - 8032742: 687b ldr r3, [r7, #4] - 8032744: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 8032748: d01b beq.n 8032782 - 803274a: 687b ldr r3, [r7, #4] - 803274c: 4a2c ldr r2, [pc, #176] ; (8032800 ) - 803274e: 4293 cmp r3, r2 - 8032750: d017 beq.n 8032782 - 8032752: 687b ldr r3, [r7, #4] - 8032754: 4a2b ldr r2, [pc, #172] ; (8032804 ) - 8032756: 4293 cmp r3, r2 - 8032758: d013 beq.n 8032782 - 803275a: 687b ldr r3, [r7, #4] - 803275c: 4a2a ldr r2, [pc, #168] ; (8032808 ) - 803275e: 4293 cmp r3, r2 - 8032760: d00f beq.n 8032782 - 8032762: 687b ldr r3, [r7, #4] - 8032764: 4a29 ldr r2, [pc, #164] ; (803280c ) - 8032766: 4293 cmp r3, r2 - 8032768: d00b beq.n 8032782 - 803276a: 687b ldr r3, [r7, #4] - 803276c: 4a28 ldr r2, [pc, #160] ; (8032810 ) - 803276e: 4293 cmp r3, r2 - 8032770: d007 beq.n 8032782 - 8032772: 687b ldr r3, [r7, #4] - 8032774: 4a27 ldr r2, [pc, #156] ; (8032814 ) - 8032776: 4293 cmp r3, r2 - 8032778: d003 beq.n 8032782 - 803277a: 687b ldr r3, [r7, #4] - 803277c: 4a26 ldr r2, [pc, #152] ; (8032818 ) - 803277e: 4293 cmp r3, r2 - 8032780: d108 bne.n 8032794 + 80327be: 687b ldr r3, [r7, #4] + 80327c0: 4a2f ldr r2, [pc, #188] ; (8032880 ) + 80327c2: 4293 cmp r3, r2 + 80327c4: d01f beq.n 8032806 + 80327c6: 687b ldr r3, [r7, #4] + 80327c8: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 80327cc: d01b beq.n 8032806 + 80327ce: 687b ldr r3, [r7, #4] + 80327d0: 4a2c ldr r2, [pc, #176] ; (8032884 ) + 80327d2: 4293 cmp r3, r2 + 80327d4: d017 beq.n 8032806 + 80327d6: 687b ldr r3, [r7, #4] + 80327d8: 4a2b ldr r2, [pc, #172] ; (8032888 ) + 80327da: 4293 cmp r3, r2 + 80327dc: d013 beq.n 8032806 + 80327de: 687b ldr r3, [r7, #4] + 80327e0: 4a2a ldr r2, [pc, #168] ; (803288c ) + 80327e2: 4293 cmp r3, r2 + 80327e4: d00f beq.n 8032806 + 80327e6: 687b ldr r3, [r7, #4] + 80327e8: 4a29 ldr r2, [pc, #164] ; (8032890 ) + 80327ea: 4293 cmp r3, r2 + 80327ec: d00b beq.n 8032806 + 80327ee: 687b ldr r3, [r7, #4] + 80327f0: 4a28 ldr r2, [pc, #160] ; (8032894 ) + 80327f2: 4293 cmp r3, r2 + 80327f4: d007 beq.n 8032806 + 80327f6: 687b ldr r3, [r7, #4] + 80327f8: 4a27 ldr r2, [pc, #156] ; (8032898 ) + 80327fa: 4293 cmp r3, r2 + 80327fc: d003 beq.n 8032806 + 80327fe: 687b ldr r3, [r7, #4] + 8032800: 4a26 ldr r2, [pc, #152] ; (803289c ) + 8032802: 4293 cmp r3, r2 + 8032804: d108 bne.n 8032818 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; - 8032782: 68fb ldr r3, [r7, #12] - 8032784: f423 7340 bic.w r3, r3, #768 ; 0x300 - 8032788: 60fb str r3, [r7, #12] + 8032806: 68fb ldr r3, [r7, #12] + 8032808: f423 7340 bic.w r3, r3, #768 ; 0x300 + 803280c: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; - 803278a: 683b ldr r3, [r7, #0] - 803278c: 68db ldr r3, [r3, #12] - 803278e: 68fa ldr r2, [r7, #12] - 8032790: 4313 orrs r3, r2 - 8032792: 60fb str r3, [r7, #12] + 803280e: 683b ldr r3, [r7, #0] + 8032810: 68db ldr r3, [r3, #12] + 8032812: 68fa ldr r2, [r7, #12] + 8032814: 4313 orrs r3, r2 + 8032816: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8032794: 68fb ldr r3, [r7, #12] - 8032796: f023 0280 bic.w r2, r3, #128 ; 0x80 - 803279a: 683b ldr r3, [r7, #0] - 803279c: 695b ldr r3, [r3, #20] - 803279e: 4313 orrs r3, r2 - 80327a0: 60fb str r3, [r7, #12] + 8032818: 68fb ldr r3, [r7, #12] + 803281a: f023 0280 bic.w r2, r3, #128 ; 0x80 + 803281e: 683b ldr r3, [r7, #0] + 8032820: 695b ldr r3, [r3, #20] + 8032822: 4313 orrs r3, r2 + 8032824: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; - 80327a2: 687b ldr r3, [r7, #4] - 80327a4: 68fa ldr r2, [r7, #12] - 80327a6: 601a str r2, [r3, #0] + 8032826: 687b ldr r3, [r7, #4] + 8032828: 68fa ldr r2, [r7, #12] + 803282a: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; - 80327a8: 683b ldr r3, [r7, #0] - 80327aa: 689a ldr r2, [r3, #8] - 80327ac: 687b ldr r3, [r7, #4] - 80327ae: 62da str r2, [r3, #44] ; 0x2c + 803282c: 683b ldr r3, [r7, #0] + 803282e: 689a ldr r2, [r3, #8] + 8032830: 687b ldr r3, [r7, #4] + 8032832: 62da str r2, [r3, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; - 80327b0: 683b ldr r3, [r7, #0] - 80327b2: 681a ldr r2, [r3, #0] - 80327b4: 687b ldr r3, [r7, #4] - 80327b6: 629a str r2, [r3, #40] ; 0x28 + 8032834: 683b ldr r3, [r7, #0] + 8032836: 681a ldr r2, [r3, #0] + 8032838: 687b ldr r3, [r7, #4] + 803283a: 629a str r2, [r3, #40] ; 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 80327b8: 687b ldr r3, [r7, #4] - 80327ba: 4a10 ldr r2, [pc, #64] ; (80327fc ) - 80327bc: 4293 cmp r3, r2 - 80327be: d00f beq.n 80327e0 - 80327c0: 687b ldr r3, [r7, #4] - 80327c2: 4a12 ldr r2, [pc, #72] ; (803280c ) - 80327c4: 4293 cmp r3, r2 - 80327c6: d00b beq.n 80327e0 - 80327c8: 687b ldr r3, [r7, #4] - 80327ca: 4a11 ldr r2, [pc, #68] ; (8032810 ) - 80327cc: 4293 cmp r3, r2 - 80327ce: d007 beq.n 80327e0 - 80327d0: 687b ldr r3, [r7, #4] - 80327d2: 4a10 ldr r2, [pc, #64] ; (8032814 ) - 80327d4: 4293 cmp r3, r2 - 80327d6: d003 beq.n 80327e0 - 80327d8: 687b ldr r3, [r7, #4] - 80327da: 4a0f ldr r2, [pc, #60] ; (8032818 ) - 80327dc: 4293 cmp r3, r2 - 80327de: d103 bne.n 80327e8 + 803283c: 687b ldr r3, [r7, #4] + 803283e: 4a10 ldr r2, [pc, #64] ; (8032880 ) + 8032840: 4293 cmp r3, r2 + 8032842: d00f beq.n 8032864 + 8032844: 687b ldr r3, [r7, #4] + 8032846: 4a12 ldr r2, [pc, #72] ; (8032890 ) + 8032848: 4293 cmp r3, r2 + 803284a: d00b beq.n 8032864 + 803284c: 687b ldr r3, [r7, #4] + 803284e: 4a11 ldr r2, [pc, #68] ; (8032894 ) + 8032850: 4293 cmp r3, r2 + 8032852: d007 beq.n 8032864 + 8032854: 687b ldr r3, [r7, #4] + 8032856: 4a10 ldr r2, [pc, #64] ; (8032898 ) + 8032858: 4293 cmp r3, r2 + 803285a: d003 beq.n 8032864 + 803285c: 687b ldr r3, [r7, #4] + 803285e: 4a0f ldr r2, [pc, #60] ; (803289c ) + 8032860: 4293 cmp r3, r2 + 8032862: d103 bne.n 803286c { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; - 80327e0: 683b ldr r3, [r7, #0] - 80327e2: 691a ldr r2, [r3, #16] - 80327e4: 687b ldr r3, [r7, #4] - 80327e6: 631a str r2, [r3, #48] ; 0x30 + 8032864: 683b ldr r3, [r7, #0] + 8032866: 691a ldr r2, [r3, #16] + 8032868: 687b ldr r3, [r7, #4] + 803286a: 631a str r2, [r3, #48] ; 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - 80327e8: 687b ldr r3, [r7, #4] - 80327ea: 2201 movs r2, #1 - 80327ec: 615a str r2, [r3, #20] -} - 80327ee: bf00 nop - 80327f0: 3714 adds r7, #20 - 80327f2: 46bd mov sp, r7 - 80327f4: f85d 7b04 ldr.w r7, [sp], #4 - 80327f8: 4770 bx lr - 80327fa: bf00 nop - 80327fc: 40010000 .word 0x40010000 - 8032800: 40000400 .word 0x40000400 - 8032804: 40000800 .word 0x40000800 - 8032808: 40000c00 .word 0x40000c00 - 803280c: 40010400 .word 0x40010400 - 8032810: 40014000 .word 0x40014000 - 8032814: 40014400 .word 0x40014400 - 8032818: 40014800 .word 0x40014800 - -0803281c : + 803286c: 687b ldr r3, [r7, #4] + 803286e: 2201 movs r2, #1 + 8032870: 615a str r2, [r3, #20] +} + 8032872: bf00 nop + 8032874: 3714 adds r7, #20 + 8032876: 46bd mov sp, r7 + 8032878: f85d 7b04 ldr.w r7, [sp], #4 + 803287c: 4770 bx lr + 803287e: bf00 nop + 8032880: 40010000 .word 0x40010000 + 8032884: 40000400 .word 0x40000400 + 8032888: 40000800 .word 0x40000800 + 803288c: 40000c00 .word 0x40000c00 + 8032890: 40010400 .word 0x40010400 + 8032894: 40014000 .word 0x40014000 + 8032898: 40014400 .word 0x40014400 + 803289c: 40014800 .word 0x40014800 + +080328a0 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 803281c: b480 push {r7} - 803281e: b087 sub sp, #28 - 8032820: af00 add r7, sp, #0 - 8032822: 60f8 str r0, [r7, #12] - 8032824: 60b9 str r1, [r7, #8] - 8032826: 607a str r2, [r7, #4] + 80328a0: b480 push {r7} + 80328a2: b087 sub sp, #28 + 80328a4: af00 add r7, sp, #0 + 80328a6: 60f8 str r0, [r7, #12] + 80328a8: 60b9 str r1, [r7, #8] + 80328aa: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; - 8032828: 68fb ldr r3, [r7, #12] - 803282a: 6a1b ldr r3, [r3, #32] - 803282c: 617b str r3, [r7, #20] + 80328ac: 68fb ldr r3, [r7, #12] + 80328ae: 6a1b ldr r3, [r3, #32] + 80328b0: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; - 803282e: 68fb ldr r3, [r7, #12] - 8032830: 6a1b ldr r3, [r3, #32] - 8032832: f023 0201 bic.w r2, r3, #1 - 8032836: 68fb ldr r3, [r7, #12] - 8032838: 621a str r2, [r3, #32] + 80328b2: 68fb ldr r3, [r7, #12] + 80328b4: 6a1b ldr r3, [r3, #32] + 80328b6: f023 0201 bic.w r2, r3, #1 + 80328ba: 68fb ldr r3, [r7, #12] + 80328bc: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 803283a: 68fb ldr r3, [r7, #12] - 803283c: 699b ldr r3, [r3, #24] - 803283e: 613b str r3, [r7, #16] + 80328be: 68fb ldr r3, [r7, #12] + 80328c0: 699b ldr r3, [r3, #24] + 80328c2: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8032840: 693b ldr r3, [r7, #16] - 8032842: f023 03f0 bic.w r3, r3, #240 ; 0xf0 - 8032846: 613b str r3, [r7, #16] + 80328c4: 693b ldr r3, [r7, #16] + 80328c6: f023 03f0 bic.w r3, r3, #240 ; 0xf0 + 80328ca: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); - 8032848: 687b ldr r3, [r7, #4] - 803284a: 011b lsls r3, r3, #4 - 803284c: 693a ldr r2, [r7, #16] - 803284e: 4313 orrs r3, r2 - 8032850: 613b str r3, [r7, #16] + 80328cc: 687b ldr r3, [r7, #4] + 80328ce: 011b lsls r3, r3, #4 + 80328d0: 693a ldr r2, [r7, #16] + 80328d2: 4313 orrs r3, r2 + 80328d4: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 8032852: 697b ldr r3, [r7, #20] - 8032854: f023 030a bic.w r3, r3, #10 - 8032858: 617b str r3, [r7, #20] + 80328d6: 697b ldr r3, [r7, #20] + 80328d8: f023 030a bic.w r3, r3, #10 + 80328dc: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; - 803285a: 697a ldr r2, [r7, #20] - 803285c: 68bb ldr r3, [r7, #8] - 803285e: 4313 orrs r3, r2 - 8032860: 617b str r3, [r7, #20] + 80328de: 697a ldr r2, [r7, #20] + 80328e0: 68bb ldr r3, [r7, #8] + 80328e2: 4313 orrs r3, r2 + 80328e4: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; - 8032862: 68fb ldr r3, [r7, #12] - 8032864: 693a ldr r2, [r7, #16] - 8032866: 619a str r2, [r3, #24] + 80328e6: 68fb ldr r3, [r7, #12] + 80328e8: 693a ldr r2, [r7, #16] + 80328ea: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 8032868: 68fb ldr r3, [r7, #12] - 803286a: 697a ldr r2, [r7, #20] - 803286c: 621a str r2, [r3, #32] + 80328ec: 68fb ldr r3, [r7, #12] + 80328ee: 697a ldr r2, [r7, #20] + 80328f0: 621a str r2, [r3, #32] } - 803286e: bf00 nop - 8032870: 371c adds r7, #28 - 8032872: 46bd mov sp, r7 - 8032874: f85d 7b04 ldr.w r7, [sp], #4 - 8032878: 4770 bx lr + 80328f2: bf00 nop + 80328f4: 371c adds r7, #28 + 80328f6: 46bd mov sp, r7 + 80328f8: f85d 7b04 ldr.w r7, [sp], #4 + 80328fc: 4770 bx lr -0803287a : +080328fe : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 803287a: b480 push {r7} - 803287c: b087 sub sp, #28 - 803287e: af00 add r7, sp, #0 - 8032880: 60f8 str r0, [r7, #12] - 8032882: 60b9 str r1, [r7, #8] - 8032884: 607a str r2, [r7, #4] + 80328fe: b480 push {r7} + 8032900: b087 sub sp, #28 + 8032902: af00 add r7, sp, #0 + 8032904: 60f8 str r0, [r7, #12] + 8032906: 60b9 str r1, [r7, #8] + 8032908: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; - 8032886: 68fb ldr r3, [r7, #12] - 8032888: 6a1b ldr r3, [r3, #32] - 803288a: f023 0210 bic.w r2, r3, #16 - 803288e: 68fb ldr r3, [r7, #12] - 8032890: 621a str r2, [r3, #32] + 803290a: 68fb ldr r3, [r7, #12] + 803290c: 6a1b ldr r3, [r3, #32] + 803290e: f023 0210 bic.w r2, r3, #16 + 8032912: 68fb ldr r3, [r7, #12] + 8032914: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 8032892: 68fb ldr r3, [r7, #12] - 8032894: 699b ldr r3, [r3, #24] - 8032896: 617b str r3, [r7, #20] + 8032916: 68fb ldr r3, [r7, #12] + 8032918: 699b ldr r3, [r3, #24] + 803291a: 617b str r3, [r7, #20] tmpccer = TIMx->CCER; - 8032898: 68fb ldr r3, [r7, #12] - 803289a: 6a1b ldr r3, [r3, #32] - 803289c: 613b str r3, [r7, #16] + 803291c: 68fb ldr r3, [r7, #12] + 803291e: 6a1b ldr r3, [r3, #32] + 8032920: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; - 803289e: 697b ldr r3, [r7, #20] - 80328a0: f423 4370 bic.w r3, r3, #61440 ; 0xf000 - 80328a4: 617b str r3, [r7, #20] + 8032922: 697b ldr r3, [r7, #20] + 8032924: f423 4370 bic.w r3, r3, #61440 ; 0xf000 + 8032928: 617b str r3, [r7, #20] tmpccmr1 |= (TIM_ICFilter << 12U); - 80328a6: 687b ldr r3, [r7, #4] - 80328a8: 031b lsls r3, r3, #12 - 80328aa: 697a ldr r2, [r7, #20] - 80328ac: 4313 orrs r3, r2 - 80328ae: 617b str r3, [r7, #20] + 803292a: 687b ldr r3, [r7, #4] + 803292c: 031b lsls r3, r3, #12 + 803292e: 697a ldr r2, [r7, #20] + 8032930: 4313 orrs r3, r2 + 8032932: 617b str r3, [r7, #20] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 80328b0: 693b ldr r3, [r7, #16] - 80328b2: f023 03a0 bic.w r3, r3, #160 ; 0xa0 - 80328b6: 613b str r3, [r7, #16] + 8032934: 693b ldr r3, [r7, #16] + 8032936: f023 03a0 bic.w r3, r3, #160 ; 0xa0 + 803293a: 613b str r3, [r7, #16] tmpccer |= (TIM_ICPolarity << 4U); - 80328b8: 68bb ldr r3, [r7, #8] - 80328ba: 011b lsls r3, r3, #4 - 80328bc: 693a ldr r2, [r7, #16] - 80328be: 4313 orrs r3, r2 - 80328c0: 613b str r3, [r7, #16] + 803293c: 68bb ldr r3, [r7, #8] + 803293e: 011b lsls r3, r3, #4 + 8032940: 693a ldr r2, [r7, #16] + 8032942: 4313 orrs r3, r2 + 8032944: 613b str r3, [r7, #16] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; - 80328c2: 68fb ldr r3, [r7, #12] - 80328c4: 697a ldr r2, [r7, #20] - 80328c6: 619a str r2, [r3, #24] + 8032946: 68fb ldr r3, [r7, #12] + 8032948: 697a ldr r2, [r7, #20] + 803294a: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 80328c8: 68fb ldr r3, [r7, #12] - 80328ca: 693a ldr r2, [r7, #16] - 80328cc: 621a str r2, [r3, #32] -} - 80328ce: bf00 nop - 80328d0: 371c adds r7, #28 - 80328d2: 46bd mov sp, r7 - 80328d4: f85d 7b04 ldr.w r7, [sp], #4 - 80328d8: 4770 bx lr + 803294c: 68fb ldr r3, [r7, #12] + 803294e: 693a ldr r2, [r7, #16] + 8032950: 621a str r2, [r3, #32] +} + 8032952: bf00 nop + 8032954: 371c adds r7, #28 + 8032956: 46bd mov sp, r7 + 8032958: f85d 7b04 ldr.w r7, [sp], #4 + 803295c: 4770 bx lr ... -080328dc : +08032960 : * (*) Value not defined in all devices. * * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { - 80328dc: b480 push {r7} - 80328de: b085 sub sp, #20 - 80328e0: af00 add r7, sp, #0 - 80328e2: 6078 str r0, [r7, #4] - 80328e4: 6039 str r1, [r7, #0] + 8032960: b480 push {r7} + 8032962: b085 sub sp, #20 + 8032964: af00 add r7, sp, #0 + 8032966: 6078 str r0, [r7, #4] + 8032968: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; - 80328e6: 687b ldr r3, [r7, #4] - 80328e8: 689b ldr r3, [r3, #8] - 80328ea: 60fb str r3, [r7, #12] + 803296a: 687b ldr r3, [r7, #4] + 803296c: 689b ldr r3, [r3, #8] + 803296e: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; - 80328ec: 68fa ldr r2, [r7, #12] - 80328ee: 4b09 ldr r3, [pc, #36] ; (8032914 ) - 80328f0: 4013 ands r3, r2 - 80328f2: 60fb str r3, [r7, #12] + 8032970: 68fa ldr r2, [r7, #12] + 8032972: 4b09 ldr r3, [pc, #36] ; (8032998 ) + 8032974: 4013 ands r3, r2 + 8032976: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 80328f4: 683a ldr r2, [r7, #0] - 80328f6: 68fb ldr r3, [r7, #12] - 80328f8: 4313 orrs r3, r2 - 80328fa: f043 0307 orr.w r3, r3, #7 - 80328fe: 60fb str r3, [r7, #12] + 8032978: 683a ldr r2, [r7, #0] + 803297a: 68fb ldr r3, [r7, #12] + 803297c: 4313 orrs r3, r2 + 803297e: f043 0307 orr.w r3, r3, #7 + 8032982: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 8032900: 687b ldr r3, [r7, #4] - 8032902: 68fa ldr r2, [r7, #12] - 8032904: 609a str r2, [r3, #8] -} - 8032906: bf00 nop - 8032908: 3714 adds r7, #20 - 803290a: 46bd mov sp, r7 - 803290c: f85d 7b04 ldr.w r7, [sp], #4 - 8032910: 4770 bx lr - 8032912: bf00 nop - 8032914: ffcfff8f .word 0xffcfff8f - -08032918 : + 8032984: 687b ldr r3, [r7, #4] + 8032986: 68fa ldr r2, [r7, #12] + 8032988: 609a str r2, [r3, #8] +} + 803298a: bf00 nop + 803298c: 3714 adds r7, #20 + 803298e: 46bd mov sp, r7 + 8032990: f85d 7b04 ldr.w r7, [sp], #4 + 8032994: 4770 bx lr + 8032996: bf00 nop + 8032998: ffcfff8f .word 0xffcfff8f + +0803299c : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { - 8032918: b480 push {r7} - 803291a: b087 sub sp, #28 - 803291c: af00 add r7, sp, #0 - 803291e: 60f8 str r0, [r7, #12] - 8032920: 60b9 str r1, [r7, #8] - 8032922: 607a str r2, [r7, #4] - 8032924: 603b str r3, [r7, #0] + 803299c: b480 push {r7} + 803299e: b087 sub sp, #28 + 80329a0: af00 add r7, sp, #0 + 80329a2: 60f8 str r0, [r7, #12] + 80329a4: 60b9 str r1, [r7, #8] + 80329a6: 607a str r2, [r7, #4] + 80329a8: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; - 8032926: 68fb ldr r3, [r7, #12] - 8032928: 689b ldr r3, [r3, #8] - 803292a: 617b str r3, [r7, #20] + 80329aa: 68fb ldr r3, [r7, #12] + 80329ac: 689b ldr r3, [r3, #8] + 80329ae: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 803292c: 697b ldr r3, [r7, #20] - 803292e: f423 437f bic.w r3, r3, #65280 ; 0xff00 - 8032932: 617b str r3, [r7, #20] + 80329b0: 697b ldr r3, [r7, #20] + 80329b2: f423 437f bic.w r3, r3, #65280 ; 0xff00 + 80329b6: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 8032934: 683b ldr r3, [r7, #0] - 8032936: 021a lsls r2, r3, #8 - 8032938: 687b ldr r3, [r7, #4] - 803293a: 431a orrs r2, r3 - 803293c: 68bb ldr r3, [r7, #8] - 803293e: 4313 orrs r3, r2 - 8032940: 697a ldr r2, [r7, #20] - 8032942: 4313 orrs r3, r2 - 8032944: 617b str r3, [r7, #20] + 80329b8: 683b ldr r3, [r7, #0] + 80329ba: 021a lsls r2, r3, #8 + 80329bc: 687b ldr r3, [r7, #4] + 80329be: 431a orrs r2, r3 + 80329c0: 68bb ldr r3, [r7, #8] + 80329c2: 4313 orrs r3, r2 + 80329c4: 697a ldr r2, [r7, #20] + 80329c6: 4313 orrs r3, r2 + 80329c8: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 8032946: 68fb ldr r3, [r7, #12] - 8032948: 697a ldr r2, [r7, #20] - 803294a: 609a str r2, [r3, #8] + 80329ca: 68fb ldr r3, [r7, #12] + 80329cc: 697a ldr r2, [r7, #20] + 80329ce: 609a str r2, [r3, #8] } - 803294c: bf00 nop - 803294e: 371c adds r7, #28 - 8032950: 46bd mov sp, r7 - 8032952: f85d 7b04 ldr.w r7, [sp], #4 - 8032956: 4770 bx lr + 80329d0: bf00 nop + 80329d2: 371c adds r7, #28 + 80329d4: 46bd mov sp, r7 + 80329d6: f85d 7b04 ldr.w r7, [sp], #4 + 80329da: 4770 bx lr -08032958 : +080329dc : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig) { - 8032958: b480 push {r7} - 803295a: b085 sub sp, #20 - 803295c: af00 add r7, sp, #0 - 803295e: 6078 str r0, [r7, #4] - 8032960: 6039 str r1, [r7, #0] + 80329dc: b480 push {r7} + 80329de: b085 sub sp, #20 + 80329e0: af00 add r7, sp, #0 + 80329e2: 6078 str r0, [r7, #4] + 80329e4: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 8032962: 687b ldr r3, [r7, #4] - 8032964: f893 303c ldrb.w r3, [r3, #60] ; 0x3c - 8032968: 2b01 cmp r3, #1 - 803296a: d101 bne.n 8032970 - 803296c: 2302 movs r3, #2 - 803296e: e06d b.n 8032a4c - 8032970: 687b ldr r3, [r7, #4] - 8032972: 2201 movs r2, #1 - 8032974: f883 203c strb.w r2, [r3, #60] ; 0x3c + 80329e6: 687b ldr r3, [r7, #4] + 80329e8: f893 303c ldrb.w r3, [r3, #60] ; 0x3c + 80329ec: 2b01 cmp r3, #1 + 80329ee: d101 bne.n 80329f4 + 80329f0: 2302 movs r3, #2 + 80329f2: e06d b.n 8032ad0 + 80329f4: 687b ldr r3, [r7, #4] + 80329f6: 2201 movs r2, #1 + 80329f8: f883 203c strb.w r2, [r3, #60] ; 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 8032978: 687b ldr r3, [r7, #4] - 803297a: 2202 movs r2, #2 - 803297c: f883 203d strb.w r2, [r3, #61] ; 0x3d + 80329fc: 687b ldr r3, [r7, #4] + 80329fe: 2202 movs r2, #2 + 8032a00: f883 203d strb.w r2, [r3, #61] ; 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 8032980: 687b ldr r3, [r7, #4] - 8032982: 681b ldr r3, [r3, #0] - 8032984: 685b ldr r3, [r3, #4] - 8032986: 60fb str r3, [r7, #12] + 8032a04: 687b ldr r3, [r7, #4] + 8032a06: 681b ldr r3, [r3, #0] + 8032a08: 685b ldr r3, [r3, #4] + 8032a0a: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 8032988: 687b ldr r3, [r7, #4] - 803298a: 681b ldr r3, [r3, #0] - 803298c: 689b ldr r3, [r3, #8] - 803298e: 60bb str r3, [r7, #8] + 8032a0c: 687b ldr r3, [r7, #4] + 8032a0e: 681b ldr r3, [r3, #0] + 8032a10: 689b ldr r3, [r3, #8] + 8032a12: 60bb str r3, [r7, #8] /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - 8032990: 687b ldr r3, [r7, #4] - 8032992: 681b ldr r3, [r3, #0] - 8032994: 4a30 ldr r2, [pc, #192] ; (8032a58 ) - 8032996: 4293 cmp r3, r2 - 8032998: d004 beq.n 80329a4 - 803299a: 687b ldr r3, [r7, #4] - 803299c: 681b ldr r3, [r3, #0] - 803299e: 4a2f ldr r2, [pc, #188] ; (8032a5c ) - 80329a0: 4293 cmp r3, r2 - 80329a2: d108 bne.n 80329b6 + 8032a14: 687b ldr r3, [r7, #4] + 8032a16: 681b ldr r3, [r3, #0] + 8032a18: 4a30 ldr r2, [pc, #192] ; (8032adc ) + 8032a1a: 4293 cmp r3, r2 + 8032a1c: d004 beq.n 8032a28 + 8032a1e: 687b ldr r3, [r7, #4] + 8032a20: 681b ldr r3, [r3, #0] + 8032a22: 4a2f ldr r2, [pc, #188] ; (8032ae0 ) + 8032a24: 4293 cmp r3, r2 + 8032a26: d108 bne.n 8032a3a { /* Check the parameters */ assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); /* Clear the MMS2 bits */ tmpcr2 &= ~TIM_CR2_MMS2; - 80329a4: 68fb ldr r3, [r7, #12] - 80329a6: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 - 80329aa: 60fb str r3, [r7, #12] + 8032a28: 68fb ldr r3, [r7, #12] + 8032a2a: f423 0370 bic.w r3, r3, #15728640 ; 0xf00000 + 8032a2e: 60fb str r3, [r7, #12] /* Select the TRGO2 source*/ tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - 80329ac: 683b ldr r3, [r7, #0] - 80329ae: 685b ldr r3, [r3, #4] - 80329b0: 68fa ldr r2, [r7, #12] - 80329b2: 4313 orrs r3, r2 - 80329b4: 60fb str r3, [r7, #12] + 8032a30: 683b ldr r3, [r7, #0] + 8032a32: 685b ldr r3, [r3, #4] + 8032a34: 68fa ldr r2, [r7, #12] + 8032a36: 4313 orrs r3, r2 + 8032a38: 60fb str r3, [r7, #12] } /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 80329b6: 68fb ldr r3, [r7, #12] - 80329b8: f023 0370 bic.w r3, r3, #112 ; 0x70 - 80329bc: 60fb str r3, [r7, #12] + 8032a3a: 68fb ldr r3, [r7, #12] + 8032a3c: f023 0370 bic.w r3, r3, #112 ; 0x70 + 8032a40: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 80329be: 683b ldr r3, [r7, #0] - 80329c0: 681b ldr r3, [r3, #0] - 80329c2: 68fa ldr r2, [r7, #12] - 80329c4: 4313 orrs r3, r2 - 80329c6: 60fb str r3, [r7, #12] + 8032a42: 683b ldr r3, [r7, #0] + 8032a44: 681b ldr r3, [r3, #0] + 8032a46: 68fa ldr r2, [r7, #12] + 8032a48: 4313 orrs r3, r2 + 8032a4a: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 80329c8: 687b ldr r3, [r7, #4] - 80329ca: 681b ldr r3, [r3, #0] - 80329cc: 68fa ldr r2, [r7, #12] - 80329ce: 605a str r2, [r3, #4] + 8032a4c: 687b ldr r3, [r7, #4] + 8032a4e: 681b ldr r3, [r3, #0] + 8032a50: 68fa ldr r2, [r7, #12] + 8032a52: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 80329d0: 687b ldr r3, [r7, #4] - 80329d2: 681b ldr r3, [r3, #0] - 80329d4: 4a20 ldr r2, [pc, #128] ; (8032a58 ) - 80329d6: 4293 cmp r3, r2 - 80329d8: d022 beq.n 8032a20 - 80329da: 687b ldr r3, [r7, #4] - 80329dc: 681b ldr r3, [r3, #0] - 80329de: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 80329e2: d01d beq.n 8032a20 - 80329e4: 687b ldr r3, [r7, #4] - 80329e6: 681b ldr r3, [r3, #0] - 80329e8: 4a1d ldr r2, [pc, #116] ; (8032a60 ) - 80329ea: 4293 cmp r3, r2 - 80329ec: d018 beq.n 8032a20 - 80329ee: 687b ldr r3, [r7, #4] - 80329f0: 681b ldr r3, [r3, #0] - 80329f2: 4a1c ldr r2, [pc, #112] ; (8032a64 ) - 80329f4: 4293 cmp r3, r2 - 80329f6: d013 beq.n 8032a20 - 80329f8: 687b ldr r3, [r7, #4] - 80329fa: 681b ldr r3, [r3, #0] - 80329fc: 4a1a ldr r2, [pc, #104] ; (8032a68 ) - 80329fe: 4293 cmp r3, r2 - 8032a00: d00e beq.n 8032a20 - 8032a02: 687b ldr r3, [r7, #4] - 8032a04: 681b ldr r3, [r3, #0] - 8032a06: 4a15 ldr r2, [pc, #84] ; (8032a5c ) - 8032a08: 4293 cmp r3, r2 - 8032a0a: d009 beq.n 8032a20 - 8032a0c: 687b ldr r3, [r7, #4] - 8032a0e: 681b ldr r3, [r3, #0] - 8032a10: 4a16 ldr r2, [pc, #88] ; (8032a6c ) - 8032a12: 4293 cmp r3, r2 - 8032a14: d004 beq.n 8032a20 - 8032a16: 687b ldr r3, [r7, #4] - 8032a18: 681b ldr r3, [r3, #0] - 8032a1a: 4a15 ldr r2, [pc, #84] ; (8032a70 ) - 8032a1c: 4293 cmp r3, r2 - 8032a1e: d10c bne.n 8032a3a + 8032a54: 687b ldr r3, [r7, #4] + 8032a56: 681b ldr r3, [r3, #0] + 8032a58: 4a20 ldr r2, [pc, #128] ; (8032adc ) + 8032a5a: 4293 cmp r3, r2 + 8032a5c: d022 beq.n 8032aa4 + 8032a5e: 687b ldr r3, [r7, #4] + 8032a60: 681b ldr r3, [r3, #0] + 8032a62: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 8032a66: d01d beq.n 8032aa4 + 8032a68: 687b ldr r3, [r7, #4] + 8032a6a: 681b ldr r3, [r3, #0] + 8032a6c: 4a1d ldr r2, [pc, #116] ; (8032ae4 ) + 8032a6e: 4293 cmp r3, r2 + 8032a70: d018 beq.n 8032aa4 + 8032a72: 687b ldr r3, [r7, #4] + 8032a74: 681b ldr r3, [r3, #0] + 8032a76: 4a1c ldr r2, [pc, #112] ; (8032ae8 ) + 8032a78: 4293 cmp r3, r2 + 8032a7a: d013 beq.n 8032aa4 + 8032a7c: 687b ldr r3, [r7, #4] + 8032a7e: 681b ldr r3, [r3, #0] + 8032a80: 4a1a ldr r2, [pc, #104] ; (8032aec ) + 8032a82: 4293 cmp r3, r2 + 8032a84: d00e beq.n 8032aa4 + 8032a86: 687b ldr r3, [r7, #4] + 8032a88: 681b ldr r3, [r3, #0] + 8032a8a: 4a15 ldr r2, [pc, #84] ; (8032ae0 ) + 8032a8c: 4293 cmp r3, r2 + 8032a8e: d009 beq.n 8032aa4 + 8032a90: 687b ldr r3, [r7, #4] + 8032a92: 681b ldr r3, [r3, #0] + 8032a94: 4a16 ldr r2, [pc, #88] ; (8032af0 ) + 8032a96: 4293 cmp r3, r2 + 8032a98: d004 beq.n 8032aa4 + 8032a9a: 687b ldr r3, [r7, #4] + 8032a9c: 681b ldr r3, [r3, #0] + 8032a9e: 4a15 ldr r2, [pc, #84] ; (8032af4 ) + 8032aa0: 4293 cmp r3, r2 + 8032aa2: d10c bne.n 8032abe { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 8032a20: 68bb ldr r3, [r7, #8] - 8032a22: f023 0380 bic.w r3, r3, #128 ; 0x80 - 8032a26: 60bb str r3, [r7, #8] + 8032aa4: 68bb ldr r3, [r7, #8] + 8032aa6: f023 0380 bic.w r3, r3, #128 ; 0x80 + 8032aaa: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 8032a28: 683b ldr r3, [r7, #0] - 8032a2a: 689b ldr r3, [r3, #8] - 8032a2c: 68ba ldr r2, [r7, #8] - 8032a2e: 4313 orrs r3, r2 - 8032a30: 60bb str r3, [r7, #8] + 8032aac: 683b ldr r3, [r7, #0] + 8032aae: 689b ldr r3, [r3, #8] + 8032ab0: 68ba ldr r2, [r7, #8] + 8032ab2: 4313 orrs r3, r2 + 8032ab4: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 8032a32: 687b ldr r3, [r7, #4] - 8032a34: 681b ldr r3, [r3, #0] - 8032a36: 68ba ldr r2, [r7, #8] - 8032a38: 609a str r2, [r3, #8] + 8032ab6: 687b ldr r3, [r7, #4] + 8032ab8: 681b ldr r3, [r3, #0] + 8032aba: 68ba ldr r2, [r7, #8] + 8032abc: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 8032a3a: 687b ldr r3, [r7, #4] - 8032a3c: 2201 movs r2, #1 - 8032a3e: f883 203d strb.w r2, [r3, #61] ; 0x3d + 8032abe: 687b ldr r3, [r7, #4] + 8032ac0: 2201 movs r2, #1 + 8032ac2: f883 203d strb.w r2, [r3, #61] ; 0x3d __HAL_UNLOCK(htim); - 8032a42: 687b ldr r3, [r7, #4] - 8032a44: 2200 movs r2, #0 - 8032a46: f883 203c strb.w r2, [r3, #60] ; 0x3c + 8032ac6: 687b ldr r3, [r7, #4] + 8032ac8: 2200 movs r2, #0 + 8032aca: f883 203c strb.w r2, [r3, #60] ; 0x3c return HAL_OK; - 8032a4a: 2300 movs r3, #0 -} - 8032a4c: 4618 mov r0, r3 - 8032a4e: 3714 adds r7, #20 - 8032a50: 46bd mov sp, r7 - 8032a52: f85d 7b04 ldr.w r7, [sp], #4 - 8032a56: 4770 bx lr - 8032a58: 40010000 .word 0x40010000 - 8032a5c: 40010400 .word 0x40010400 - 8032a60: 40000400 .word 0x40000400 - 8032a64: 40000800 .word 0x40000800 - 8032a68: 40000c00 .word 0x40000c00 - 8032a6c: 40001800 .word 0x40001800 - 8032a70: 40014000 .word 0x40014000 - -08032a74 : + 8032ace: 2300 movs r3, #0 +} + 8032ad0: 4618 mov r0, r3 + 8032ad2: 3714 adds r7, #20 + 8032ad4: 46bd mov sp, r7 + 8032ad6: f85d 7b04 ldr.w r7, [sp], #4 + 8032ada: 4770 bx lr + 8032adc: 40010000 .word 0x40010000 + 8032ae0: 40010400 .word 0x40010400 + 8032ae4: 40000400 .word 0x40000400 + 8032ae8: 40000800 .word 0x40000800 + 8032aec: 40000c00 .word 0x40000c00 + 8032af0: 40001800 .word 0x40001800 + 8032af4: 40014000 .word 0x40014000 + +08032af8 : * @brief Hall commutation changed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { - 8032a74: b480 push {r7} - 8032a76: b083 sub sp, #12 - 8032a78: af00 add r7, sp, #0 - 8032a7a: 6078 str r0, [r7, #4] + 8032af8: b480 push {r7} + 8032afa: b083 sub sp, #12 + 8032afc: af00 add r7, sp, #0 + 8032afe: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } - 8032a7c: bf00 nop - 8032a7e: 370c adds r7, #12 - 8032a80: 46bd mov sp, r7 - 8032a82: f85d 7b04 ldr.w r7, [sp], #4 - 8032a86: 4770 bx lr + 8032b00: bf00 nop + 8032b02: 370c adds r7, #12 + 8032b04: 46bd mov sp, r7 + 8032b06: f85d 7b04 ldr.w r7, [sp], #4 + 8032b0a: 4770 bx lr -08032a88 : +08032b0c : * @brief Hall Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { - 8032a88: b480 push {r7} - 8032a8a: b083 sub sp, #12 - 8032a8c: af00 add r7, sp, #0 - 8032a8e: 6078 str r0, [r7, #4] + 8032b0c: b480 push {r7} + 8032b0e: b083 sub sp, #12 + 8032b10: af00 add r7, sp, #0 + 8032b12: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } - 8032a90: bf00 nop - 8032a92: 370c adds r7, #12 - 8032a94: 46bd mov sp, r7 - 8032a96: f85d 7b04 ldr.w r7, [sp], #4 - 8032a9a: 4770 bx lr + 8032b14: bf00 nop + 8032b16: 370c adds r7, #12 + 8032b18: 46bd mov sp, r7 + 8032b1a: f85d 7b04 ldr.w r7, [sp], #4 + 8032b1e: 4770 bx lr -08032a9c : +08032b20 : * @brief Hall Break2 detection callback in non blocking mode * @param htim: TIM handle * @retval None */ __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) { - 8032a9c: b480 push {r7} - 8032a9e: b083 sub sp, #12 - 8032aa0: af00 add r7, sp, #0 - 8032aa2: 6078 str r0, [r7, #4] + 8032b20: b480 push {r7} + 8032b22: b083 sub sp, #12 + 8032b24: af00 add r7, sp, #0 + 8032b26: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_TIMEx_Break2Callback could be implemented in the user file */ } - 8032aa4: bf00 nop - 8032aa6: 370c adds r7, #12 - 8032aa8: 46bd mov sp, r7 - 8032aaa: f85d 7b04 ldr.w r7, [sp], #4 - 8032aae: 4770 bx lr + 8032b28: bf00 nop + 8032b2a: 370c adds r7, #12 + 8032b2c: 46bd mov sp, r7 + 8032b2e: f85d 7b04 ldr.w r7, [sp], #4 + 8032b32: 4770 bx lr -08032ab0 : +08032b34 : * parameters in the UART_InitTypeDef and initialize the associated handle. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8032ab0: b580 push {r7, lr} - 8032ab2: b082 sub sp, #8 - 8032ab4: af00 add r7, sp, #0 - 8032ab6: 6078 str r0, [r7, #4] + 8032b34: b580 push {r7, lr} + 8032b36: b082 sub sp, #8 + 8032b38: af00 add r7, sp, #0 + 8032b3a: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8032ab8: 687b ldr r3, [r7, #4] - 8032aba: 2b00 cmp r3, #0 - 8032abc: d101 bne.n 8032ac2 + 8032b3c: 687b ldr r3, [r7, #4] + 8032b3e: 2b00 cmp r3, #0 + 8032b40: d101 bne.n 8032b46 { return HAL_ERROR; - 8032abe: 2301 movs r3, #1 - 8032ac0: e042 b.n 8032b48 + 8032b42: 2301 movs r3, #1 + 8032b44: e042 b.n 8032bcc { /* Check the parameters */ assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); } if (huart->gState == HAL_UART_STATE_RESET) - 8032ac2: 687b ldr r3, [r7, #4] - 8032ac4: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8032ac8: 2b00 cmp r3, #0 - 8032aca: d106 bne.n 8032ada + 8032b46: 687b ldr r3, [r7, #4] + 8032b48: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8032b4c: 2b00 cmp r3, #0 + 8032b4e: d106 bne.n 8032b5e { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8032acc: 687b ldr r3, [r7, #4] - 8032ace: 2200 movs r2, #0 - 8032ad0: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032b50: 687b ldr r3, [r7, #4] + 8032b52: 2200 movs r2, #0 + 8032b54: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8032ad4: 6878 ldr r0, [r7, #4] - 8032ad6: f7f2 fb47 bl 8025168 + 8032b58: 6878 ldr r0, [r7, #4] + 8032b5a: f7f2 fb47 bl 80251ec #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8032ada: 687b ldr r3, [r7, #4] - 8032adc: 2224 movs r2, #36 ; 0x24 - 8032ade: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032b5e: 687b ldr r3, [r7, #4] + 8032b60: 2224 movs r2, #36 ; 0x24 + 8032b62: f8c3 2084 str.w r2, [r3, #132] ; 0x84 __HAL_UART_DISABLE(huart); - 8032ae2: 687b ldr r3, [r7, #4] - 8032ae4: 681b ldr r3, [r3, #0] - 8032ae6: 681a ldr r2, [r3, #0] - 8032ae8: 687b ldr r3, [r7, #4] - 8032aea: 681b ldr r3, [r3, #0] - 8032aec: f022 0201 bic.w r2, r2, #1 - 8032af0: 601a str r2, [r3, #0] + 8032b66: 687b ldr r3, [r7, #4] + 8032b68: 681b ldr r3, [r3, #0] + 8032b6a: 681a ldr r2, [r3, #0] + 8032b6c: 687b ldr r3, [r7, #4] + 8032b6e: 681b ldr r3, [r3, #0] + 8032b70: f022 0201 bic.w r2, r2, #1 + 8032b74: 601a str r2, [r3, #0] /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) - 8032af2: 6878 ldr r0, [r7, #4] - 8032af4: f000 fd68 bl 80335c8 - 8032af8: 4603 mov r3, r0 - 8032afa: 2b01 cmp r3, #1 - 8032afc: d101 bne.n 8032b02 + 8032b76: 6878 ldr r0, [r7, #4] + 8032b78: f000 fd68 bl 803364c + 8032b7c: 4603 mov r3, r0 + 8032b7e: 2b01 cmp r3, #1 + 8032b80: d101 bne.n 8032b86 { return HAL_ERROR; - 8032afe: 2301 movs r3, #1 - 8032b00: e022 b.n 8032b48 + 8032b82: 2301 movs r3, #1 + 8032b84: e022 b.n 8032bcc } if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 8032b02: 687b ldr r3, [r7, #4] - 8032b04: 6a9b ldr r3, [r3, #40] ; 0x28 - 8032b06: 2b00 cmp r3, #0 - 8032b08: d002 beq.n 8032b10 + 8032b86: 687b ldr r3, [r7, #4] + 8032b88: 6a9b ldr r3, [r3, #40] ; 0x28 + 8032b8a: 2b00 cmp r3, #0 + 8032b8c: d002 beq.n 8032b94 { UART_AdvFeatureConfig(huart); - 8032b0a: 6878 ldr r0, [r7, #4] - 8032b0c: f001 fac4 bl 8034098 + 8032b8e: 6878 ldr r0, [r7, #4] + 8032b90: f001 fac4 bl 803411c } /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8032b10: 687b ldr r3, [r7, #4] - 8032b12: 681b ldr r3, [r3, #0] - 8032b14: 685a ldr r2, [r3, #4] - 8032b16: 687b ldr r3, [r7, #4] - 8032b18: 681b ldr r3, [r3, #0] - 8032b1a: f422 4290 bic.w r2, r2, #18432 ; 0x4800 - 8032b1e: 605a str r2, [r3, #4] + 8032b94: 687b ldr r3, [r7, #4] + 8032b96: 681b ldr r3, [r3, #0] + 8032b98: 685a ldr r2, [r3, #4] + 8032b9a: 687b ldr r3, [r7, #4] + 8032b9c: 681b ldr r3, [r3, #0] + 8032b9e: f422 4290 bic.w r2, r2, #18432 ; 0x4800 + 8032ba2: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8032b20: 687b ldr r3, [r7, #4] - 8032b22: 681b ldr r3, [r3, #0] - 8032b24: 689a ldr r2, [r3, #8] - 8032b26: 687b ldr r3, [r7, #4] - 8032b28: 681b ldr r3, [r3, #0] - 8032b2a: f022 022a bic.w r2, r2, #42 ; 0x2a - 8032b2e: 609a str r2, [r3, #8] + 8032ba4: 687b ldr r3, [r7, #4] + 8032ba6: 681b ldr r3, [r3, #0] + 8032ba8: 689a ldr r2, [r3, #8] + 8032baa: 687b ldr r3, [r7, #4] + 8032bac: 681b ldr r3, [r3, #0] + 8032bae: f022 022a bic.w r2, r2, #42 ; 0x2a + 8032bb2: 609a str r2, [r3, #8] __HAL_UART_ENABLE(huart); - 8032b30: 687b ldr r3, [r7, #4] - 8032b32: 681b ldr r3, [r3, #0] - 8032b34: 681a ldr r2, [r3, #0] - 8032b36: 687b ldr r3, [r7, #4] - 8032b38: 681b ldr r3, [r3, #0] - 8032b3a: f042 0201 orr.w r2, r2, #1 - 8032b3e: 601a str r2, [r3, #0] + 8032bb4: 687b ldr r3, [r7, #4] + 8032bb6: 681b ldr r3, [r3, #0] + 8032bb8: 681a ldr r2, [r3, #0] + 8032bba: 687b ldr r3, [r7, #4] + 8032bbc: 681b ldr r3, [r3, #0] + 8032bbe: f042 0201 orr.w r2, r2, #1 + 8032bc2: 601a str r2, [r3, #0] /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ return (UART_CheckIdleState(huart)); - 8032b40: 6878 ldr r0, [r7, #4] - 8032b42: f001 fb4b bl 80341dc - 8032b46: 4603 mov r3, r0 + 8032bc4: 6878 ldr r0, [r7, #4] + 8032bc6: f001 fb4b bl 8034260 + 8032bca: 4603 mov r3, r0 } - 8032b48: 4618 mov r0, r3 - 8032b4a: 3708 adds r7, #8 - 8032b4c: 46bd mov sp, r7 - 8032b4e: bd80 pop {r7, pc} + 8032bcc: 4618 mov r0, r3 + 8032bce: 3708 adds r7, #8 + 8032bd0: 46bd mov sp, r7 + 8032bd2: bd80 pop {r7, pc} -08032b50 : +08032bd4 : * @param Size Amount of data elements (u8 or u16) to be sent. * @param Timeout Timeout duration. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8032b50: b580 push {r7, lr} - 8032b52: b08a sub sp, #40 ; 0x28 - 8032b54: af02 add r7, sp, #8 - 8032b56: 60f8 str r0, [r7, #12] - 8032b58: 60b9 str r1, [r7, #8] - 8032b5a: 603b str r3, [r7, #0] - 8032b5c: 4613 mov r3, r2 - 8032b5e: 80fb strh r3, [r7, #6] + 8032bd4: b580 push {r7, lr} + 8032bd6: b08a sub sp, #40 ; 0x28 + 8032bd8: af02 add r7, sp, #8 + 8032bda: 60f8 str r0, [r7, #12] + 8032bdc: 60b9 str r1, [r7, #8] + 8032bde: 603b str r3, [r7, #0] + 8032be0: 4613 mov r3, r2 + 8032be2: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart; /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8032b60: 68fb ldr r3, [r7, #12] - 8032b62: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8032b66: 2b20 cmp r3, #32 - 8032b68: f040 8083 bne.w 8032c72 + 8032be4: 68fb ldr r3, [r7, #12] + 8032be6: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8032bea: 2b20 cmp r3, #32 + 8032bec: f040 8083 bne.w 8032cf6 { if ((pData == NULL) || (Size == 0U)) - 8032b6c: 68bb ldr r3, [r7, #8] - 8032b6e: 2b00 cmp r3, #0 - 8032b70: d002 beq.n 8032b78 - 8032b72: 88fb ldrh r3, [r7, #6] - 8032b74: 2b00 cmp r3, #0 - 8032b76: d101 bne.n 8032b7c + 8032bf0: 68bb ldr r3, [r7, #8] + 8032bf2: 2b00 cmp r3, #0 + 8032bf4: d002 beq.n 8032bfc + 8032bf6: 88fb ldrh r3, [r7, #6] + 8032bf8: 2b00 cmp r3, #0 + 8032bfa: d101 bne.n 8032c00 { return HAL_ERROR; - 8032b78: 2301 movs r3, #1 - 8032b7a: e07b b.n 8032c74 + 8032bfc: 2301 movs r3, #1 + 8032bfe: e07b b.n 8032cf8 } __HAL_LOCK(huart); - 8032b7c: 68fb ldr r3, [r7, #12] - 8032b7e: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 8032b82: 2b01 cmp r3, #1 - 8032b84: d101 bne.n 8032b8a - 8032b86: 2302 movs r3, #2 - 8032b88: e074 b.n 8032c74 - 8032b8a: 68fb ldr r3, [r7, #12] - 8032b8c: 2201 movs r2, #1 - 8032b8e: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032c00: 68fb ldr r3, [r7, #12] + 8032c02: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 8032c06: 2b01 cmp r3, #1 + 8032c08: d101 bne.n 8032c0e + 8032c0a: 2302 movs r3, #2 + 8032c0c: e074 b.n 8032cf8 + 8032c0e: 68fb ldr r3, [r7, #12] + 8032c10: 2201 movs r2, #1 + 8032c12: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8032b92: 68fb ldr r3, [r7, #12] - 8032b94: 2200 movs r2, #0 - 8032b96: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032c16: 68fb ldr r3, [r7, #12] + 8032c18: 2200 movs r2, #0 + 8032c1a: f8c3 208c str.w r2, [r3, #140] ; 0x8c huart->gState = HAL_UART_STATE_BUSY_TX; - 8032b9a: 68fb ldr r3, [r7, #12] - 8032b9c: 2221 movs r2, #33 ; 0x21 - 8032b9e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032c1e: 68fb ldr r3, [r7, #12] + 8032c20: 2221 movs r2, #33 ; 0x21 + 8032c22: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8032ba2: f7f3 fa0f bl 8025fc4 - 8032ba6: 6178 str r0, [r7, #20] + 8032c26: f7f3 fa0f bl 8026048 + 8032c2a: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 8032ba8: 68fb ldr r3, [r7, #12] - 8032baa: 88fa ldrh r2, [r7, #6] - 8032bac: f8a3 2054 strh.w r2, [r3, #84] ; 0x54 + 8032c2c: 68fb ldr r3, [r7, #12] + 8032c2e: 88fa ldrh r2, [r7, #6] + 8032c30: f8a3 2054 strh.w r2, [r3, #84] ; 0x54 huart->TxXferCount = Size; - 8032bb0: 68fb ldr r3, [r7, #12] - 8032bb2: 88fa ldrh r2, [r7, #6] - 8032bb4: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 8032c34: 68fb ldr r3, [r7, #12] + 8032c36: 88fa ldrh r2, [r7, #6] + 8032c38: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8032bb8: 68fb ldr r3, [r7, #12] - 8032bba: 689b ldr r3, [r3, #8] - 8032bbc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8032bc0: d108 bne.n 8032bd4 - 8032bc2: 68fb ldr r3, [r7, #12] - 8032bc4: 691b ldr r3, [r3, #16] - 8032bc6: 2b00 cmp r3, #0 - 8032bc8: d104 bne.n 8032bd4 + 8032c3c: 68fb ldr r3, [r7, #12] + 8032c3e: 689b ldr r3, [r3, #8] + 8032c40: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8032c44: d108 bne.n 8032c58 + 8032c46: 68fb ldr r3, [r7, #12] + 8032c48: 691b ldr r3, [r3, #16] + 8032c4a: 2b00 cmp r3, #0 + 8032c4c: d104 bne.n 8032c58 { pdata8bits = NULL; - 8032bca: 2300 movs r3, #0 - 8032bcc: 61fb str r3, [r7, #28] + 8032c4e: 2300 movs r3, #0 + 8032c50: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 8032bce: 68bb ldr r3, [r7, #8] - 8032bd0: 61bb str r3, [r7, #24] - 8032bd2: e003 b.n 8032bdc + 8032c52: 68bb ldr r3, [r7, #8] + 8032c54: 61bb str r3, [r7, #24] + 8032c56: e003 b.n 8032c60 } else { pdata8bits = pData; - 8032bd4: 68bb ldr r3, [r7, #8] - 8032bd6: 61fb str r3, [r7, #28] + 8032c58: 68bb ldr r3, [r7, #8] + 8032c5a: 61fb str r3, [r7, #28] pdata16bits = NULL; - 8032bd8: 2300 movs r3, #0 - 8032bda: 61bb str r3, [r7, #24] + 8032c5c: 2300 movs r3, #0 + 8032c5e: 61bb str r3, [r7, #24] } __HAL_UNLOCK(huart); - 8032bdc: 68fb ldr r3, [r7, #12] - 8032bde: 2200 movs r2, #0 - 8032be0: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032c60: 68fb ldr r3, [r7, #12] + 8032c62: 2200 movs r2, #0 + 8032c64: f883 2080 strb.w r2, [r3, #128] ; 0x80 while (huart->TxXferCount > 0U) - 8032be4: e02c b.n 8032c40 + 8032c68: e02c b.n 8032cc4 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 8032be6: 683b ldr r3, [r7, #0] - 8032be8: 9300 str r3, [sp, #0] - 8032bea: 697b ldr r3, [r7, #20] - 8032bec: 2200 movs r2, #0 - 8032bee: 2180 movs r1, #128 ; 0x80 - 8032bf0: 68f8 ldr r0, [r7, #12] - 8032bf2: f001 fb3e bl 8034272 - 8032bf6: 4603 mov r3, r0 - 8032bf8: 2b00 cmp r3, #0 - 8032bfa: d001 beq.n 8032c00 + 8032c6a: 683b ldr r3, [r7, #0] + 8032c6c: 9300 str r3, [sp, #0] + 8032c6e: 697b ldr r3, [r7, #20] + 8032c70: 2200 movs r2, #0 + 8032c72: 2180 movs r1, #128 ; 0x80 + 8032c74: 68f8 ldr r0, [r7, #12] + 8032c76: f001 fb3e bl 80342f6 + 8032c7a: 4603 mov r3, r0 + 8032c7c: 2b00 cmp r3, #0 + 8032c7e: d001 beq.n 8032c84 { return HAL_TIMEOUT; - 8032bfc: 2303 movs r3, #3 - 8032bfe: e039 b.n 8032c74 + 8032c80: 2303 movs r3, #3 + 8032c82: e039 b.n 8032cf8 } if (pdata8bits == NULL) - 8032c00: 69fb ldr r3, [r7, #28] - 8032c02: 2b00 cmp r3, #0 - 8032c04: d10b bne.n 8032c1e + 8032c84: 69fb ldr r3, [r7, #28] + 8032c86: 2b00 cmp r3, #0 + 8032c88: d10b bne.n 8032ca2 { huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); - 8032c06: 69bb ldr r3, [r7, #24] - 8032c08: 881b ldrh r3, [r3, #0] - 8032c0a: 461a mov r2, r3 - 8032c0c: 68fb ldr r3, [r7, #12] - 8032c0e: 681b ldr r3, [r3, #0] - 8032c10: f3c2 0208 ubfx r2, r2, #0, #9 - 8032c14: 629a str r2, [r3, #40] ; 0x28 + 8032c8a: 69bb ldr r3, [r7, #24] + 8032c8c: 881b ldrh r3, [r3, #0] + 8032c8e: 461a mov r2, r3 + 8032c90: 68fb ldr r3, [r7, #12] + 8032c92: 681b ldr r3, [r3, #0] + 8032c94: f3c2 0208 ubfx r2, r2, #0, #9 + 8032c98: 629a str r2, [r3, #40] ; 0x28 pdata16bits++; - 8032c16: 69bb ldr r3, [r7, #24] - 8032c18: 3302 adds r3, #2 - 8032c1a: 61bb str r3, [r7, #24] - 8032c1c: e007 b.n 8032c2e + 8032c9a: 69bb ldr r3, [r7, #24] + 8032c9c: 3302 adds r3, #2 + 8032c9e: 61bb str r3, [r7, #24] + 8032ca0: e007 b.n 8032cb2 } else { huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); - 8032c1e: 69fb ldr r3, [r7, #28] - 8032c20: 781a ldrb r2, [r3, #0] - 8032c22: 68fb ldr r3, [r7, #12] - 8032c24: 681b ldr r3, [r3, #0] - 8032c26: 629a str r2, [r3, #40] ; 0x28 + 8032ca2: 69fb ldr r3, [r7, #28] + 8032ca4: 781a ldrb r2, [r3, #0] + 8032ca6: 68fb ldr r3, [r7, #12] + 8032ca8: 681b ldr r3, [r3, #0] + 8032caa: 629a str r2, [r3, #40] ; 0x28 pdata8bits++; - 8032c28: 69fb ldr r3, [r7, #28] - 8032c2a: 3301 adds r3, #1 - 8032c2c: 61fb str r3, [r7, #28] + 8032cac: 69fb ldr r3, [r7, #28] + 8032cae: 3301 adds r3, #1 + 8032cb0: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 8032c2e: 68fb ldr r3, [r7, #12] - 8032c30: f8b3 3056 ldrh.w r3, [r3, #86] ; 0x56 - 8032c34: b29b uxth r3, r3 - 8032c36: 3b01 subs r3, #1 - 8032c38: b29a uxth r2, r3 - 8032c3a: 68fb ldr r3, [r7, #12] - 8032c3c: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 8032cb2: 68fb ldr r3, [r7, #12] + 8032cb4: f8b3 3056 ldrh.w r3, [r3, #86] ; 0x56 + 8032cb8: b29b uxth r3, r3 + 8032cba: 3b01 subs r3, #1 + 8032cbc: b29a uxth r2, r3 + 8032cbe: 68fb ldr r3, [r7, #12] + 8032cc0: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 while (huart->TxXferCount > 0U) - 8032c40: 68fb ldr r3, [r7, #12] - 8032c42: f8b3 3056 ldrh.w r3, [r3, #86] ; 0x56 - 8032c46: b29b uxth r3, r3 - 8032c48: 2b00 cmp r3, #0 - 8032c4a: d1cc bne.n 8032be6 + 8032cc4: 68fb ldr r3, [r7, #12] + 8032cc6: f8b3 3056 ldrh.w r3, [r3, #86] ; 0x56 + 8032cca: b29b uxth r3, r3 + 8032ccc: 2b00 cmp r3, #0 + 8032cce: d1cc bne.n 8032c6a } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 8032c4c: 683b ldr r3, [r7, #0] - 8032c4e: 9300 str r3, [sp, #0] - 8032c50: 697b ldr r3, [r7, #20] - 8032c52: 2200 movs r2, #0 - 8032c54: 2140 movs r1, #64 ; 0x40 - 8032c56: 68f8 ldr r0, [r7, #12] - 8032c58: f001 fb0b bl 8034272 - 8032c5c: 4603 mov r3, r0 - 8032c5e: 2b00 cmp r3, #0 - 8032c60: d001 beq.n 8032c66 + 8032cd0: 683b ldr r3, [r7, #0] + 8032cd2: 9300 str r3, [sp, #0] + 8032cd4: 697b ldr r3, [r7, #20] + 8032cd6: 2200 movs r2, #0 + 8032cd8: 2140 movs r1, #64 ; 0x40 + 8032cda: 68f8 ldr r0, [r7, #12] + 8032cdc: f001 fb0b bl 80342f6 + 8032ce0: 4603 mov r3, r0 + 8032ce2: 2b00 cmp r3, #0 + 8032ce4: d001 beq.n 8032cea { return HAL_TIMEOUT; - 8032c62: 2303 movs r3, #3 - 8032c64: e006 b.n 8032c74 + 8032ce6: 2303 movs r3, #3 + 8032ce8: e006 b.n 8032cf8 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8032c66: 68fb ldr r3, [r7, #12] - 8032c68: 2220 movs r2, #32 - 8032c6a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032cea: 68fb ldr r3, [r7, #12] + 8032cec: 2220 movs r2, #32 + 8032cee: f8c3 2084 str.w r2, [r3, #132] ; 0x84 return HAL_OK; - 8032c6e: 2300 movs r3, #0 - 8032c70: e000 b.n 8032c74 + 8032cf2: 2300 movs r3, #0 + 8032cf4: e000 b.n 8032cf8 } else { return HAL_BUSY; - 8032c72: 2302 movs r3, #2 + 8032cf6: 2302 movs r3, #2 } } - 8032c74: 4618 mov r0, r3 - 8032c76: 3720 adds r7, #32 - 8032c78: 46bd mov sp, r7 - 8032c7a: bd80 pop {r7, pc} + 8032cf8: 4618 mov r0, r3 + 8032cfa: 3720 adds r7, #32 + 8032cfc: 46bd mov sp, r7 + 8032cfe: bd80 pop {r7, pc} -08032c7c : +08032d00 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - 8032c7c: b580 push {r7, lr} - 8032c7e: b08a sub sp, #40 ; 0x28 - 8032c80: af00 add r7, sp, #0 - 8032c82: 60f8 str r0, [r7, #12] - 8032c84: 60b9 str r1, [r7, #8] - 8032c86: 4613 mov r3, r2 - 8032c88: 80fb strh r3, [r7, #6] + 8032d00: b580 push {r7, lr} + 8032d02: b08a sub sp, #40 ; 0x28 + 8032d04: af00 add r7, sp, #0 + 8032d06: 60f8 str r0, [r7, #12] + 8032d08: 60b9 str r1, [r7, #8] + 8032d0a: 4613 mov r3, r2 + 8032d0c: 80fb strh r3, [r7, #6] /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) - 8032c8a: 68fb ldr r3, [r7, #12] - 8032c8c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8032c90: 2b20 cmp r3, #32 - 8032c92: d142 bne.n 8032d1a + 8032d0e: 68fb ldr r3, [r7, #12] + 8032d10: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8032d14: 2b20 cmp r3, #32 + 8032d16: d142 bne.n 8032d9e { if ((pData == NULL) || (Size == 0U)) - 8032c94: 68bb ldr r3, [r7, #8] - 8032c96: 2b00 cmp r3, #0 - 8032c98: d002 beq.n 8032ca0 - 8032c9a: 88fb ldrh r3, [r7, #6] - 8032c9c: 2b00 cmp r3, #0 - 8032c9e: d101 bne.n 8032ca4 + 8032d18: 68bb ldr r3, [r7, #8] + 8032d1a: 2b00 cmp r3, #0 + 8032d1c: d002 beq.n 8032d24 + 8032d1e: 88fb ldrh r3, [r7, #6] + 8032d20: 2b00 cmp r3, #0 + 8032d22: d101 bne.n 8032d28 { return HAL_ERROR; - 8032ca0: 2301 movs r3, #1 - 8032ca2: e03b b.n 8032d1c + 8032d24: 2301 movs r3, #1 + 8032d26: e03b b.n 8032da0 } __HAL_LOCK(huart); - 8032ca4: 68fb ldr r3, [r7, #12] - 8032ca6: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 8032caa: 2b01 cmp r3, #1 - 8032cac: d101 bne.n 8032cb2 - 8032cae: 2302 movs r3, #2 - 8032cb0: e034 b.n 8032d1c - 8032cb2: 68fb ldr r3, [r7, #12] - 8032cb4: 2201 movs r2, #1 - 8032cb6: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032d28: 68fb ldr r3, [r7, #12] + 8032d2a: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 8032d2e: 2b01 cmp r3, #1 + 8032d30: d101 bne.n 8032d36 + 8032d32: 2302 movs r3, #2 + 8032d34: e034 b.n 8032da0 + 8032d36: 68fb ldr r3, [r7, #12] + 8032d38: 2201 movs r2, #1 + 8032d3a: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Set Reception type to Standard reception */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8032cba: 68fb ldr r3, [r7, #12] - 8032cbc: 2200 movs r2, #0 - 8032cbe: 66da str r2, [r3, #108] ; 0x6c + 8032d3e: 68fb ldr r3, [r7, #12] + 8032d40: 2200 movs r2, #0 + 8032d42: 66da str r2, [r3, #108] ; 0x6c if (!(IS_LPUART_INSTANCE(huart->Instance))) - 8032cc0: 68fb ldr r3, [r7, #12] - 8032cc2: 681b ldr r3, [r3, #0] - 8032cc4: 4a17 ldr r2, [pc, #92] ; (8032d24 ) - 8032cc6: 4293 cmp r3, r2 - 8032cc8: d01f beq.n 8032d0a + 8032d44: 68fb ldr r3, [r7, #12] + 8032d46: 681b ldr r3, [r3, #0] + 8032d48: 4a17 ldr r2, [pc, #92] ; (8032da8 ) + 8032d4a: 4293 cmp r3, r2 + 8032d4c: d01f beq.n 8032d8e { /* Check that USART RTOEN bit is set */ if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) - 8032cca: 68fb ldr r3, [r7, #12] - 8032ccc: 681b ldr r3, [r3, #0] - 8032cce: 685b ldr r3, [r3, #4] - 8032cd0: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 8032cd4: 2b00 cmp r3, #0 - 8032cd6: d018 beq.n 8032d0a + 8032d4e: 68fb ldr r3, [r7, #12] + 8032d50: 681b ldr r3, [r3, #0] + 8032d52: 685b ldr r3, [r3, #4] + 8032d54: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 8032d58: 2b00 cmp r3, #0 + 8032d5a: d018 beq.n 8032d8e { /* Enable the UART Receiver Timeout Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); - 8032cd8: 68fb ldr r3, [r7, #12] - 8032cda: 681b ldr r3, [r3, #0] - 8032cdc: 617b str r3, [r7, #20] + 8032d5c: 68fb ldr r3, [r7, #12] + 8032d5e: 681b ldr r3, [r3, #0] + 8032d60: 617b str r3, [r7, #20] */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8032cde: 697b ldr r3, [r7, #20] - 8032ce0: e853 3f00 ldrex r3, [r3] - 8032ce4: 613b str r3, [r7, #16] + 8032d62: 697b ldr r3, [r7, #20] + 8032d64: e853 3f00 ldrex r3, [r3] + 8032d68: 613b str r3, [r7, #16] return(result); - 8032ce6: 693b ldr r3, [r7, #16] - 8032ce8: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 - 8032cec: 627b str r3, [r7, #36] ; 0x24 - 8032cee: 68fb ldr r3, [r7, #12] - 8032cf0: 681b ldr r3, [r3, #0] - 8032cf2: 461a mov r2, r3 - 8032cf4: 6a7b ldr r3, [r7, #36] ; 0x24 - 8032cf6: 623b str r3, [r7, #32] - 8032cf8: 61fa str r2, [r7, #28] + 8032d6a: 693b ldr r3, [r7, #16] + 8032d6c: f043 6380 orr.w r3, r3, #67108864 ; 0x4000000 + 8032d70: 627b str r3, [r7, #36] ; 0x24 + 8032d72: 68fb ldr r3, [r7, #12] + 8032d74: 681b ldr r3, [r3, #0] + 8032d76: 461a mov r2, r3 + 8032d78: 6a7b ldr r3, [r7, #36] ; 0x24 + 8032d7a: 623b str r3, [r7, #32] + 8032d7c: 61fa str r2, [r7, #28] */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8032cfa: 69f9 ldr r1, [r7, #28] - 8032cfc: 6a3a ldr r2, [r7, #32] - 8032cfe: e841 2300 strex r3, r2, [r1] - 8032d02: 61bb str r3, [r7, #24] + 8032d7e: 69f9 ldr r1, [r7, #28] + 8032d80: 6a3a ldr r2, [r7, #32] + 8032d82: e841 2300 strex r3, r2, [r1] + 8032d86: 61bb str r3, [r7, #24] return(result); - 8032d04: 69bb ldr r3, [r7, #24] - 8032d06: 2b00 cmp r3, #0 - 8032d08: d1e6 bne.n 8032cd8 + 8032d88: 69bb ldr r3, [r7, #24] + 8032d8a: 2b00 cmp r3, #0 + 8032d8c: d1e6 bne.n 8032d5c } } return (UART_Start_Receive_IT(huart, pData, Size)); - 8032d0a: 88fb ldrh r3, [r7, #6] - 8032d0c: 461a mov r2, r3 - 8032d0e: 68b9 ldr r1, [r7, #8] - 8032d10: 68f8 ldr r0, [r7, #12] - 8032d12: f001 fb77 bl 8034404 - 8032d16: 4603 mov r3, r0 - 8032d18: e000 b.n 8032d1c + 8032d8e: 88fb ldrh r3, [r7, #6] + 8032d90: 461a mov r2, r3 + 8032d92: 68b9 ldr r1, [r7, #8] + 8032d94: 68f8 ldr r0, [r7, #12] + 8032d96: f001 fb77 bl 8034488 + 8032d9a: 4603 mov r3, r0 + 8032d9c: e000 b.n 8032da0 } else { return HAL_BUSY; - 8032d1a: 2302 movs r3, #2 + 8032d9e: 2302 movs r3, #2 } } - 8032d1c: 4618 mov r0, r3 - 8032d1e: 3728 adds r7, #40 ; 0x28 - 8032d20: 46bd mov sp, r7 - 8032d22: bd80 pop {r7, pc} - 8032d24: 58000c00 .word 0x58000c00 + 8032da0: 4618 mov r0, r3 + 8032da2: 3728 adds r7, #40 ; 0x28 + 8032da4: 46bd mov sp, r7 + 8032da6: bd80 pop {r7, pc} + 8032da8: 58000c00 .word 0x58000c00 -08032d28 : +08032dac : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { - 8032d28: b580 push {r7, lr} - 8032d2a: b08a sub sp, #40 ; 0x28 - 8032d2c: af00 add r7, sp, #0 - 8032d2e: 60f8 str r0, [r7, #12] - 8032d30: 60b9 str r1, [r7, #8] - 8032d32: 4613 mov r3, r2 - 8032d34: 80fb strh r3, [r7, #6] + 8032dac: b580 push {r7, lr} + 8032dae: b08a sub sp, #40 ; 0x28 + 8032db0: af00 add r7, sp, #0 + 8032db2: 60f8 str r0, [r7, #12] + 8032db4: 60b9 str r1, [r7, #8] + 8032db6: 4613 mov r3, r2 + 8032db8: 80fb strh r3, [r7, #6] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8032d36: 68fb ldr r3, [r7, #12] - 8032d38: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8032d3c: 2b20 cmp r3, #32 - 8032d3e: d17a bne.n 8032e36 + 8032dba: 68fb ldr r3, [r7, #12] + 8032dbc: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8032dc0: 2b20 cmp r3, #32 + 8032dc2: d17a bne.n 8032eba { if ((pData == NULL) || (Size == 0U)) - 8032d40: 68bb ldr r3, [r7, #8] - 8032d42: 2b00 cmp r3, #0 - 8032d44: d002 beq.n 8032d4c - 8032d46: 88fb ldrh r3, [r7, #6] - 8032d48: 2b00 cmp r3, #0 - 8032d4a: d101 bne.n 8032d50 + 8032dc4: 68bb ldr r3, [r7, #8] + 8032dc6: 2b00 cmp r3, #0 + 8032dc8: d002 beq.n 8032dd0 + 8032dca: 88fb ldrh r3, [r7, #6] + 8032dcc: 2b00 cmp r3, #0 + 8032dce: d101 bne.n 8032dd4 { return HAL_ERROR; - 8032d4c: 2301 movs r3, #1 - 8032d4e: e073 b.n 8032e38 + 8032dd0: 2301 movs r3, #1 + 8032dd2: e073 b.n 8032ebc } __HAL_LOCK(huart); - 8032d50: 68fb ldr r3, [r7, #12] - 8032d52: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 8032d56: 2b01 cmp r3, #1 - 8032d58: d101 bne.n 8032d5e - 8032d5a: 2302 movs r3, #2 - 8032d5c: e06c b.n 8032e38 - 8032d5e: 68fb ldr r3, [r7, #12] - 8032d60: 2201 movs r2, #1 - 8032d62: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032dd4: 68fb ldr r3, [r7, #12] + 8032dd6: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 8032dda: 2b01 cmp r3, #1 + 8032ddc: d101 bne.n 8032de2 + 8032dde: 2302 movs r3, #2 + 8032de0: e06c b.n 8032ebc + 8032de2: 68fb ldr r3, [r7, #12] + 8032de4: 2201 movs r2, #1 + 8032de6: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->pTxBuffPtr = pData; - 8032d66: 68fb ldr r3, [r7, #12] - 8032d68: 68ba ldr r2, [r7, #8] - 8032d6a: 651a str r2, [r3, #80] ; 0x50 + 8032dea: 68fb ldr r3, [r7, #12] + 8032dec: 68ba ldr r2, [r7, #8] + 8032dee: 651a str r2, [r3, #80] ; 0x50 huart->TxXferSize = Size; - 8032d6c: 68fb ldr r3, [r7, #12] - 8032d6e: 88fa ldrh r2, [r7, #6] - 8032d70: f8a3 2054 strh.w r2, [r3, #84] ; 0x54 + 8032df0: 68fb ldr r3, [r7, #12] + 8032df2: 88fa ldrh r2, [r7, #6] + 8032df4: f8a3 2054 strh.w r2, [r3, #84] ; 0x54 huart->TxXferCount = Size; - 8032d74: 68fb ldr r3, [r7, #12] - 8032d76: 88fa ldrh r2, [r7, #6] - 8032d78: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 8032df8: 68fb ldr r3, [r7, #12] + 8032dfa: 88fa ldrh r2, [r7, #6] + 8032dfc: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 huart->ErrorCode = HAL_UART_ERROR_NONE; - 8032d7c: 68fb ldr r3, [r7, #12] - 8032d7e: 2200 movs r2, #0 - 8032d80: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032e00: 68fb ldr r3, [r7, #12] + 8032e02: 2200 movs r2, #0 + 8032e04: f8c3 208c str.w r2, [r3, #140] ; 0x8c huart->gState = HAL_UART_STATE_BUSY_TX; - 8032d84: 68fb ldr r3, [r7, #12] - 8032d86: 2221 movs r2, #33 ; 0x21 - 8032d88: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032e08: 68fb ldr r3, [r7, #12] + 8032e0a: 2221 movs r2, #33 ; 0x21 + 8032e0c: f8c3 2084 str.w r2, [r3, #132] ; 0x84 if (huart->hdmatx != NULL) - 8032d8c: 68fb ldr r3, [r7, #12] - 8032d8e: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032d90: 2b00 cmp r3, #0 - 8032d92: d02c beq.n 8032dee + 8032e10: 68fb ldr r3, [r7, #12] + 8032e12: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032e14: 2b00 cmp r3, #0 + 8032e16: d02c beq.n 8032e72 { /* Set the UART DMA transfer complete callback */ huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; - 8032d94: 68fb ldr r3, [r7, #12] - 8032d96: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032d98: 4a29 ldr r2, [pc, #164] ; (8032e40 ) - 8032d9a: 63da str r2, [r3, #60] ; 0x3c + 8032e18: 68fb ldr r3, [r7, #12] + 8032e1a: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032e1c: 4a29 ldr r2, [pc, #164] ; (8032ec4 ) + 8032e1e: 63da str r2, [r3, #60] ; 0x3c /* Set the UART DMA Half transfer complete callback */ huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; - 8032d9c: 68fb ldr r3, [r7, #12] - 8032d9e: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032da0: 4a28 ldr r2, [pc, #160] ; (8032e44 ) - 8032da2: 641a str r2, [r3, #64] ; 0x40 + 8032e20: 68fb ldr r3, [r7, #12] + 8032e22: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032e24: 4a28 ldr r2, [pc, #160] ; (8032ec8 ) + 8032e26: 641a str r2, [r3, #64] ; 0x40 /* Set the DMA error callback */ huart->hdmatx->XferErrorCallback = UART_DMAError; - 8032da4: 68fb ldr r3, [r7, #12] - 8032da6: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032da8: 4a27 ldr r2, [pc, #156] ; (8032e48 ) - 8032daa: 64da str r2, [r3, #76] ; 0x4c + 8032e28: 68fb ldr r3, [r7, #12] + 8032e2a: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032e2c: 4a27 ldr r2, [pc, #156] ; (8032ecc ) + 8032e2e: 64da str r2, [r3, #76] ; 0x4c /* Set the DMA abort callback */ huart->hdmatx->XferAbortCallback = NULL; - 8032dac: 68fb ldr r3, [r7, #12] - 8032dae: 6f9b ldr r3, [r3, #120] ; 0x78 - 8032db0: 2200 movs r2, #0 - 8032db2: 651a str r2, [r3, #80] ; 0x50 + 8032e30: 68fb ldr r3, [r7, #12] + 8032e32: 6f9b ldr r3, [r3, #120] ; 0x78 + 8032e34: 2200 movs r2, #0 + 8032e36: 651a str r2, [r3, #80] ; 0x50 /* Enable the UART transmit DMA channel */ if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK) - 8032db4: 68fb ldr r3, [r7, #12] - 8032db6: 6f98 ldr r0, [r3, #120] ; 0x78 - 8032db8: 68fb ldr r3, [r7, #12] - 8032dba: 6d1b ldr r3, [r3, #80] ; 0x50 - 8032dbc: 4619 mov r1, r3 - 8032dbe: 68fb ldr r3, [r7, #12] - 8032dc0: 681b ldr r3, [r3, #0] - 8032dc2: 3328 adds r3, #40 ; 0x28 - 8032dc4: 461a mov r2, r3 - 8032dc6: 88fb ldrh r3, [r7, #6] - 8032dc8: f7f5 fa08 bl 80281dc - 8032dcc: 4603 mov r3, r0 - 8032dce: 2b00 cmp r3, #0 - 8032dd0: d00d beq.n 8032dee + 8032e38: 68fb ldr r3, [r7, #12] + 8032e3a: 6f98 ldr r0, [r3, #120] ; 0x78 + 8032e3c: 68fb ldr r3, [r7, #12] + 8032e3e: 6d1b ldr r3, [r3, #80] ; 0x50 + 8032e40: 4619 mov r1, r3 + 8032e42: 68fb ldr r3, [r7, #12] + 8032e44: 681b ldr r3, [r3, #0] + 8032e46: 3328 adds r3, #40 ; 0x28 + 8032e48: 461a mov r2, r3 + 8032e4a: 88fb ldrh r3, [r7, #6] + 8032e4c: f7f5 fa08 bl 8028260 + 8032e50: 4603 mov r3, r0 + 8032e52: 2b00 cmp r3, #0 + 8032e54: d00d beq.n 8032e72 { /* Set error code to DMA */ huart->ErrorCode = HAL_UART_ERROR_DMA; - 8032dd2: 68fb ldr r3, [r7, #12] - 8032dd4: 2210 movs r2, #16 - 8032dd6: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032e56: 68fb ldr r3, [r7, #12] + 8032e58: 2210 movs r2, #16 + 8032e5a: f8c3 208c str.w r2, [r3, #140] ; 0x8c __HAL_UNLOCK(huart); - 8032dda: 68fb ldr r3, [r7, #12] - 8032ddc: 2200 movs r2, #0 - 8032dde: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032e5e: 68fb ldr r3, [r7, #12] + 8032e60: 2200 movs r2, #0 + 8032e62: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Restore huart->gState to ready */ huart->gState = HAL_UART_STATE_READY; - 8032de2: 68fb ldr r3, [r7, #12] - 8032de4: 2220 movs r2, #32 - 8032de6: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8032e66: 68fb ldr r3, [r7, #12] + 8032e68: 2220 movs r2, #32 + 8032e6a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 return HAL_ERROR; - 8032dea: 2301 movs r3, #1 - 8032dec: e024 b.n 8032e38 + 8032e6e: 2301 movs r3, #1 + 8032e70: e024 b.n 8032ebc } } /* Clear the TC flag in the ICR register */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF); - 8032dee: 68fb ldr r3, [r7, #12] - 8032df0: 681b ldr r3, [r3, #0] - 8032df2: 2240 movs r2, #64 ; 0x40 - 8032df4: 621a str r2, [r3, #32] + 8032e72: 68fb ldr r3, [r7, #12] + 8032e74: 681b ldr r3, [r3, #0] + 8032e76: 2240 movs r2, #64 ; 0x40 + 8032e78: 621a str r2, [r3, #32] __HAL_UNLOCK(huart); - 8032df6: 68fb ldr r3, [r7, #12] - 8032df8: 2200 movs r2, #0 - 8032dfa: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8032e7a: 68fb ldr r3, [r7, #12] + 8032e7c: 2200 movs r2, #0 + 8032e7e: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Enable the DMA transfer for transmit request by setting the DMAT bit in the UART CR3 register */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); - 8032dfe: 68fb ldr r3, [r7, #12] - 8032e00: 681b ldr r3, [r3, #0] - 8032e02: 3308 adds r3, #8 - 8032e04: 617b str r3, [r7, #20] + 8032e82: 68fb ldr r3, [r7, #12] + 8032e84: 681b ldr r3, [r3, #0] + 8032e86: 3308 adds r3, #8 + 8032e88: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8032e06: 697b ldr r3, [r7, #20] - 8032e08: e853 3f00 ldrex r3, [r3] - 8032e0c: 613b str r3, [r7, #16] + 8032e8a: 697b ldr r3, [r7, #20] + 8032e8c: e853 3f00 ldrex r3, [r3] + 8032e90: 613b str r3, [r7, #16] return(result); - 8032e0e: 693b ldr r3, [r7, #16] - 8032e10: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8032e14: 627b str r3, [r7, #36] ; 0x24 - 8032e16: 68fb ldr r3, [r7, #12] - 8032e18: 681b ldr r3, [r3, #0] - 8032e1a: 3308 adds r3, #8 - 8032e1c: 6a7a ldr r2, [r7, #36] ; 0x24 - 8032e1e: 623a str r2, [r7, #32] - 8032e20: 61fb str r3, [r7, #28] + 8032e92: 693b ldr r3, [r7, #16] + 8032e94: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8032e98: 627b str r3, [r7, #36] ; 0x24 + 8032e9a: 68fb ldr r3, [r7, #12] + 8032e9c: 681b ldr r3, [r3, #0] + 8032e9e: 3308 adds r3, #8 + 8032ea0: 6a7a ldr r2, [r7, #36] ; 0x24 + 8032ea2: 623a str r2, [r7, #32] + 8032ea4: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8032e22: 69f9 ldr r1, [r7, #28] - 8032e24: 6a3a ldr r2, [r7, #32] - 8032e26: e841 2300 strex r3, r2, [r1] - 8032e2a: 61bb str r3, [r7, #24] + 8032ea6: 69f9 ldr r1, [r7, #28] + 8032ea8: 6a3a ldr r2, [r7, #32] + 8032eaa: e841 2300 strex r3, r2, [r1] + 8032eae: 61bb str r3, [r7, #24] return(result); - 8032e2c: 69bb ldr r3, [r7, #24] - 8032e2e: 2b00 cmp r3, #0 - 8032e30: d1e5 bne.n 8032dfe + 8032eb0: 69bb ldr r3, [r7, #24] + 8032eb2: 2b00 cmp r3, #0 + 8032eb4: d1e5 bne.n 8032e82 return HAL_OK; - 8032e32: 2300 movs r3, #0 - 8032e34: e000 b.n 8032e38 + 8032eb6: 2300 movs r3, #0 + 8032eb8: e000 b.n 8032ebc } else { return HAL_BUSY; - 8032e36: 2302 movs r3, #2 + 8032eba: 2302 movs r3, #2 } } - 8032e38: 4618 mov r0, r3 - 8032e3a: 3728 adds r7, #40 ; 0x28 - 8032e3c: 46bd mov sp, r7 - 8032e3e: bd80 pop {r7, pc} - 8032e40: 080347a9 .word 0x080347a9 - 8032e44: 0803483f .word 0x0803483f - 8032e48: 0803485b .word 0x0803485b + 8032ebc: 4618 mov r0, r3 + 8032ebe: 3728 adds r7, #40 ; 0x28 + 8032ec0: 46bd mov sp, r7 + 8032ec2: bd80 pop {r7, pc} + 8032ec4: 0803482d .word 0x0803482d + 8032ec8: 080348c3 .word 0x080348c3 + 8032ecc: 080348df .word 0x080348df -08032e4c : +08032ed0 : * @brief Handle UART interrupt request. * @param huart UART handle. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 8032e4c: b580 push {r7, lr} - 8032e4e: b0ba sub sp, #232 ; 0xe8 - 8032e50: af00 add r7, sp, #0 - 8032e52: 6078 str r0, [r7, #4] + 8032ed0: b580 push {r7, lr} + 8032ed2: b0ba sub sp, #232 ; 0xe8 + 8032ed4: af00 add r7, sp, #0 + 8032ed6: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->ISR); - 8032e54: 687b ldr r3, [r7, #4] - 8032e56: 681b ldr r3, [r3, #0] - 8032e58: 69db ldr r3, [r3, #28] - 8032e5a: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 + 8032ed8: 687b ldr r3, [r7, #4] + 8032eda: 681b ldr r3, [r3, #0] + 8032edc: 69db ldr r3, [r3, #28] + 8032ede: f8c7 30e4 str.w r3, [r7, #228] ; 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8032e5e: 687b ldr r3, [r7, #4] - 8032e60: 681b ldr r3, [r3, #0] - 8032e62: 681b ldr r3, [r3, #0] - 8032e64: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 + 8032ee2: 687b ldr r3, [r7, #4] + 8032ee4: 681b ldr r3, [r3, #0] + 8032ee6: 681b ldr r3, [r3, #0] + 8032ee8: f8c7 30e0 str.w r3, [r7, #224] ; 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8032e68: 687b ldr r3, [r7, #4] - 8032e6a: 681b ldr r3, [r3, #0] - 8032e6c: 689b ldr r3, [r3, #8] - 8032e6e: f8c7 30dc str.w r3, [r7, #220] ; 0xdc + 8032eec: 687b ldr r3, [r7, #4] + 8032eee: 681b ldr r3, [r3, #0] + 8032ef0: 689b ldr r3, [r3, #8] + 8032ef2: f8c7 30dc str.w r3, [r7, #220] ; 0xdc uint32_t errorflags; uint32_t errorcode; /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF)); - 8032e72: f8d7 20e4 ldr.w r2, [r7, #228] ; 0xe4 - 8032e76: f640 030f movw r3, #2063 ; 0x80f - 8032e7a: 4013 ands r3, r2 - 8032e7c: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 + 8032ef6: f8d7 20e4 ldr.w r2, [r7, #228] ; 0xe4 + 8032efa: f640 030f movw r3, #2063 ; 0x80f + 8032efe: 4013 ands r3, r2 + 8032f00: f8c7 30d8 str.w r3, [r7, #216] ; 0xd8 if (errorflags == 0U) - 8032e80: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 - 8032e84: 2b00 cmp r3, #0 - 8032e86: d11b bne.n 8032ec0 + 8032f04: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 + 8032f08: 2b00 cmp r3, #0 + 8032f0a: d11b bne.n 8032f44 { /* UART in mode Receiver ---------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) - 8032e88: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032e8c: f003 0320 and.w r3, r3, #32 - 8032e90: 2b00 cmp r3, #0 - 8032e92: d015 beq.n 8032ec0 + 8032f0c: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8032f10: f003 0320 and.w r3, r3, #32 + 8032f14: 2b00 cmp r3, #0 + 8032f16: d015 beq.n 8032f44 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) - 8032e94: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032e98: f003 0320 and.w r3, r3, #32 - 8032e9c: 2b00 cmp r3, #0 - 8032e9e: d105 bne.n 8032eac + 8032f18: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8032f1c: f003 0320 and.w r3, r3, #32 + 8032f20: 2b00 cmp r3, #0 + 8032f22: d105 bne.n 8032f30 || ((cr3its & USART_CR3_RXFTIE) != 0U))) - 8032ea0: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 8032ea4: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 8032ea8: 2b00 cmp r3, #0 - 8032eaa: d009 beq.n 8032ec0 + 8032f24: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 8032f28: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8032f2c: 2b00 cmp r3, #0 + 8032f2e: d009 beq.n 8032f44 { if (huart->RxISR != NULL) - 8032eac: 687b ldr r3, [r7, #4] - 8032eae: 6f1b ldr r3, [r3, #112] ; 0x70 - 8032eb0: 2b00 cmp r3, #0 - 8032eb2: f000 835a beq.w 803356a + 8032f30: 687b ldr r3, [r7, #4] + 8032f32: 6f1b ldr r3, [r3, #112] ; 0x70 + 8032f34: 2b00 cmp r3, #0 + 8032f36: f000 835a beq.w 80335ee { huart->RxISR(huart); - 8032eb6: 687b ldr r3, [r7, #4] - 8032eb8: 6f1b ldr r3, [r3, #112] ; 0x70 - 8032eba: 6878 ldr r0, [r7, #4] - 8032ebc: 4798 blx r3 + 8032f3a: 687b ldr r3, [r7, #4] + 8032f3c: 6f1b ldr r3, [r3, #112] ; 0x70 + 8032f3e: 6878 ldr r0, [r7, #4] + 8032f40: 4798 blx r3 } return; - 8032ebe: e354 b.n 803356a + 8032f42: e354 b.n 80335ee } } /* If some errors occur */ if ((errorflags != 0U) - 8032ec0: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 - 8032ec4: 2b00 cmp r3, #0 - 8032ec6: f000 811f beq.w 8033108 + 8032f44: f8d7 30d8 ldr.w r3, [r7, #216] ; 0xd8 + 8032f48: 2b00 cmp r3, #0 + 8032f4a: f000 811f beq.w 803318c && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U) - 8032eca: f8d7 20dc ldr.w r2, [r7, #220] ; 0xdc - 8032ece: 4b8b ldr r3, [pc, #556] ; (80330fc ) - 8032ed0: 4013 ands r3, r2 - 8032ed2: 2b00 cmp r3, #0 - 8032ed4: d106 bne.n 8032ee4 + 8032f4e: f8d7 20dc ldr.w r2, [r7, #220] ; 0xdc + 8032f52: 4b8b ldr r3, [pc, #556] ; (8033180 ) + 8032f54: 4013 ands r3, r2 + 8032f56: 2b00 cmp r3, #0 + 8032f58: d106 bne.n 8032f68 || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))) - 8032ed6: f8d7 20e0 ldr.w r2, [r7, #224] ; 0xe0 - 8032eda: 4b89 ldr r3, [pc, #548] ; (8033100 ) - 8032edc: 4013 ands r3, r2 - 8032ede: 2b00 cmp r3, #0 - 8032ee0: f000 8112 beq.w 8033108 + 8032f5a: f8d7 20e0 ldr.w r2, [r7, #224] ; 0xe0 + 8032f5e: 4b89 ldr r3, [pc, #548] ; (8033184 ) + 8032f60: 4013 ands r3, r2 + 8032f62: 2b00 cmp r3, #0 + 8032f64: f000 8112 beq.w 803318c { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 8032ee4: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032ee8: f003 0301 and.w r3, r3, #1 - 8032eec: 2b00 cmp r3, #0 - 8032eee: d011 beq.n 8032f14 - 8032ef0: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032ef4: f403 7380 and.w r3, r3, #256 ; 0x100 - 8032ef8: 2b00 cmp r3, #0 - 8032efa: d00b beq.n 8032f14 + 8032f68: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8032f6c: f003 0301 and.w r3, r3, #1 + 8032f70: 2b00 cmp r3, #0 + 8032f72: d011 beq.n 8032f98 + 8032f74: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8032f78: f403 7380 and.w r3, r3, #256 ; 0x100 + 8032f7c: 2b00 cmp r3, #0 + 8032f7e: d00b beq.n 8032f98 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 8032efc: 687b ldr r3, [r7, #4] - 8032efe: 681b ldr r3, [r3, #0] - 8032f00: 2201 movs r2, #1 - 8032f02: 621a str r2, [r3, #32] + 8032f80: 687b ldr r3, [r7, #4] + 8032f82: 681b ldr r3, [r3, #0] + 8032f84: 2201 movs r2, #1 + 8032f86: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_PE; - 8032f04: 687b ldr r3, [r7, #4] - 8032f06: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032f0a: f043 0201 orr.w r2, r3, #1 - 8032f0e: 687b ldr r3, [r7, #4] - 8032f10: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032f88: 687b ldr r3, [r7, #4] + 8032f8a: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8032f8e: f043 0201 orr.w r2, r3, #1 + 8032f92: 687b ldr r3, [r7, #4] + 8032f94: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* UART frame error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8032f14: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032f18: f003 0302 and.w r3, r3, #2 - 8032f1c: 2b00 cmp r3, #0 - 8032f1e: d011 beq.n 8032f44 - 8032f20: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 8032f24: f003 0301 and.w r3, r3, #1 - 8032f28: 2b00 cmp r3, #0 - 8032f2a: d00b beq.n 8032f44 + 8032f98: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8032f9c: f003 0302 and.w r3, r3, #2 + 8032fa0: 2b00 cmp r3, #0 + 8032fa2: d011 beq.n 8032fc8 + 8032fa4: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 8032fa8: f003 0301 and.w r3, r3, #1 + 8032fac: 2b00 cmp r3, #0 + 8032fae: d00b beq.n 8032fc8 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - 8032f2c: 687b ldr r3, [r7, #4] - 8032f2e: 681b ldr r3, [r3, #0] - 8032f30: 2202 movs r2, #2 - 8032f32: 621a str r2, [r3, #32] + 8032fb0: 687b ldr r3, [r7, #4] + 8032fb2: 681b ldr r3, [r3, #0] + 8032fb4: 2202 movs r2, #2 + 8032fb6: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_FE; - 8032f34: 687b ldr r3, [r7, #4] - 8032f36: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032f3a: f043 0204 orr.w r2, r3, #4 - 8032f3e: 687b ldr r3, [r7, #4] - 8032f40: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032fb8: 687b ldr r3, [r7, #4] + 8032fba: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8032fbe: f043 0204 orr.w r2, r3, #4 + 8032fc2: 687b ldr r3, [r7, #4] + 8032fc4: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* UART noise error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8032f44: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032f48: f003 0304 and.w r3, r3, #4 - 8032f4c: 2b00 cmp r3, #0 - 8032f4e: d011 beq.n 8032f74 - 8032f50: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 8032f54: f003 0301 and.w r3, r3, #1 - 8032f58: 2b00 cmp r3, #0 - 8032f5a: d00b beq.n 8032f74 + 8032fc8: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8032fcc: f003 0304 and.w r3, r3, #4 + 8032fd0: 2b00 cmp r3, #0 + 8032fd2: d011 beq.n 8032ff8 + 8032fd4: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 8032fd8: f003 0301 and.w r3, r3, #1 + 8032fdc: 2b00 cmp r3, #0 + 8032fde: d00b beq.n 8032ff8 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - 8032f5c: 687b ldr r3, [r7, #4] - 8032f5e: 681b ldr r3, [r3, #0] - 8032f60: 2204 movs r2, #4 - 8032f62: 621a str r2, [r3, #32] + 8032fe0: 687b ldr r3, [r7, #4] + 8032fe2: 681b ldr r3, [r3, #0] + 8032fe4: 2204 movs r2, #4 + 8032fe6: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_NE; - 8032f64: 687b ldr r3, [r7, #4] - 8032f66: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032f6a: f043 0202 orr.w r2, r3, #2 - 8032f6e: 687b ldr r3, [r7, #4] - 8032f70: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8032fe8: 687b ldr r3, [r7, #4] + 8032fea: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8032fee: f043 0202 orr.w r2, r3, #2 + 8032ff2: 687b ldr r3, [r7, #4] + 8032ff4: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* UART Over-Run interrupt occurred -----------------------------------------*/ if (((isrflags & USART_ISR_ORE) != 0U) - 8032f74: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032f78: f003 0308 and.w r3, r3, #8 - 8032f7c: 2b00 cmp r3, #0 - 8032f7e: d017 beq.n 8032fb0 + 8032ff8: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8032ffc: f003 0308 and.w r3, r3, #8 + 8033000: 2b00 cmp r3, #0 + 8033002: d017 beq.n 8033034 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || - 8032f80: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032f84: f003 0320 and.w r3, r3, #32 - 8032f88: 2b00 cmp r3, #0 - 8032f8a: d105 bne.n 8032f98 + 8033004: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8033008: f003 0320 and.w r3, r3, #32 + 803300c: 2b00 cmp r3, #0 + 803300e: d105 bne.n 803301c ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U))) - 8032f8c: f8d7 20dc ldr.w r2, [r7, #220] ; 0xdc - 8032f90: 4b5a ldr r3, [pc, #360] ; (80330fc ) - 8032f92: 4013 ands r3, r2 + 8033010: f8d7 20dc ldr.w r2, [r7, #220] ; 0xdc + 8033014: 4b5a ldr r3, [pc, #360] ; (8033180 ) + 8033016: 4013 ands r3, r2 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) || - 8032f94: 2b00 cmp r3, #0 - 8032f96: d00b beq.n 8032fb0 + 8033018: 2b00 cmp r3, #0 + 803301a: d00b beq.n 8033034 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 8032f98: 687b ldr r3, [r7, #4] - 8032f9a: 681b ldr r3, [r3, #0] - 8032f9c: 2208 movs r2, #8 - 8032f9e: 621a str r2, [r3, #32] + 803301c: 687b ldr r3, [r7, #4] + 803301e: 681b ldr r3, [r3, #0] + 8033020: 2208 movs r2, #8 + 8033022: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_ORE; - 8032fa0: 687b ldr r3, [r7, #4] - 8032fa2: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032fa6: f043 0208 orr.w r2, r3, #8 - 8032faa: 687b ldr r3, [r7, #4] - 8032fac: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8033024: 687b ldr r3, [r7, #4] + 8033026: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 803302a: f043 0208 orr.w r2, r3, #8 + 803302e: 687b ldr r3, [r7, #4] + 8033030: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* UART Receiver Timeout interrupt occurred ---------------------------------*/ if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) - 8032fb0: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032fb4: f403 6300 and.w r3, r3, #2048 ; 0x800 - 8032fb8: 2b00 cmp r3, #0 - 8032fba: d012 beq.n 8032fe2 - 8032fbc: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032fc0: f003 6380 and.w r3, r3, #67108864 ; 0x4000000 - 8032fc4: 2b00 cmp r3, #0 - 8032fc6: d00c beq.n 8032fe2 + 8033034: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8033038: f403 6300 and.w r3, r3, #2048 ; 0x800 + 803303c: 2b00 cmp r3, #0 + 803303e: d012 beq.n 8033066 + 8033040: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8033044: f003 6380 and.w r3, r3, #67108864 ; 0x4000000 + 8033048: 2b00 cmp r3, #0 + 803304a: d00c beq.n 8033066 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 8032fc8: 687b ldr r3, [r7, #4] - 8032fca: 681b ldr r3, [r3, #0] - 8032fcc: f44f 6200 mov.w r2, #2048 ; 0x800 - 8032fd0: 621a str r2, [r3, #32] + 803304c: 687b ldr r3, [r7, #4] + 803304e: 681b ldr r3, [r3, #0] + 8033050: f44f 6200 mov.w r2, #2048 ; 0x800 + 8033054: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_RTO; - 8032fd2: 687b ldr r3, [r7, #4] - 8032fd4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032fd8: f043 0220 orr.w r2, r3, #32 - 8032fdc: 687b ldr r3, [r7, #4] - 8032fde: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8033056: 687b ldr r3, [r7, #4] + 8033058: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 803305c: f043 0220 orr.w r2, r3, #32 + 8033060: 687b ldr r3, [r7, #4] + 8033062: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* Call UART Error Call back function if need be ----------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8032fe2: 687b ldr r3, [r7, #4] - 8032fe4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8032fe8: 2b00 cmp r3, #0 - 8032fea: f000 82c0 beq.w 803356e + 8033066: 687b ldr r3, [r7, #4] + 8033068: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 803306c: 2b00 cmp r3, #0 + 803306e: f000 82c0 beq.w 80335f2 { /* UART in mode Receiver --------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U) - 8032fee: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8032ff2: f003 0320 and.w r3, r3, #32 - 8032ff6: 2b00 cmp r3, #0 - 8032ff8: d013 beq.n 8033022 + 8033072: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8033076: f003 0320 and.w r3, r3, #32 + 803307a: 2b00 cmp r3, #0 + 803307c: d013 beq.n 80330a6 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) - 8032ffa: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8032ffe: f003 0320 and.w r3, r3, #32 - 8033002: 2b00 cmp r3, #0 - 8033004: d105 bne.n 8033012 + 803307e: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 8033082: f003 0320 and.w r3, r3, #32 + 8033086: 2b00 cmp r3, #0 + 8033088: d105 bne.n 8033096 || ((cr3its & USART_CR3_RXFTIE) != 0U))) - 8033006: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 803300a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 - 803300e: 2b00 cmp r3, #0 - 8033010: d007 beq.n 8033022 + 803308a: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 803308e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 + 8033092: 2b00 cmp r3, #0 + 8033094: d007 beq.n 80330a6 { if (huart->RxISR != NULL) - 8033012: 687b ldr r3, [r7, #4] - 8033014: 6f1b ldr r3, [r3, #112] ; 0x70 - 8033016: 2b00 cmp r3, #0 - 8033018: d003 beq.n 8033022 + 8033096: 687b ldr r3, [r7, #4] + 8033098: 6f1b ldr r3, [r3, #112] ; 0x70 + 803309a: 2b00 cmp r3, #0 + 803309c: d003 beq.n 80330a6 { huart->RxISR(huart); - 803301a: 687b ldr r3, [r7, #4] - 803301c: 6f1b ldr r3, [r3, #112] ; 0x70 - 803301e: 6878 ldr r0, [r7, #4] - 8033020: 4798 blx r3 + 803309e: 687b ldr r3, [r7, #4] + 80330a0: 6f1b ldr r3, [r3, #112] ; 0x70 + 80330a2: 6878 ldr r0, [r7, #4] + 80330a4: 4798 blx r3 /* If Error is to be considered as blocking : - Receiver Timeout error in Reception - Overrun error in Reception - any error occurs in DMA mode reception */ errorcode = huart->ErrorCode; - 8033022: 687b ldr r3, [r7, #4] - 8033024: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8033028: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 + 80330a6: 687b ldr r3, [r7, #4] + 80330a8: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 80330ac: f8c7 30d4 str.w r3, [r7, #212] ; 0xd4 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 803302c: 687b ldr r3, [r7, #4] - 803302e: 681b ldr r3, [r3, #0] - 8033030: 689b ldr r3, [r3, #8] - 8033032: f003 0340 and.w r3, r3, #64 ; 0x40 - 8033036: 2b40 cmp r3, #64 ; 0x40 - 8033038: d005 beq.n 8033046 + 80330b0: 687b ldr r3, [r7, #4] + 80330b2: 681b ldr r3, [r3, #0] + 80330b4: 689b ldr r3, [r3, #8] + 80330b6: f003 0340 and.w r3, r3, #64 ; 0x40 + 80330ba: 2b40 cmp r3, #64 ; 0x40 + 80330bc: d005 beq.n 80330ca ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) - 803303a: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4 - 803303e: f003 0328 and.w r3, r3, #40 ; 0x28 + 80330be: f8d7 30d4 ldr.w r3, [r7, #212] ; 0xd4 + 80330c2: f003 0328 and.w r3, r3, #40 ; 0x28 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8033042: 2b00 cmp r3, #0 - 8033044: d04f beq.n 80330e6 + 80330c6: 2b00 cmp r3, #0 + 80330c8: d04f beq.n 803316a { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 8033046: 6878 ldr r0, [r7, #4] - 8033048: f001 fb48 bl 80346dc + 80330ca: 6878 ldr r0, [r7, #4] + 80330cc: f001 fb48 bl 8034760 /* Abort the UART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 803304c: 687b ldr r3, [r7, #4] - 803304e: 681b ldr r3, [r3, #0] - 8033050: 689b ldr r3, [r3, #8] - 8033052: f003 0340 and.w r3, r3, #64 ; 0x40 - 8033056: 2b40 cmp r3, #64 ; 0x40 - 8033058: d141 bne.n 80330de + 80330d0: 687b ldr r3, [r7, #4] + 80330d2: 681b ldr r3, [r3, #0] + 80330d4: 689b ldr r3, [r3, #8] + 80330d6: f003 0340 and.w r3, r3, #64 ; 0x40 + 80330da: 2b40 cmp r3, #64 ; 0x40 + 80330dc: d141 bne.n 8033162 { /* Disable the UART DMA Rx request if enabled */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 803305a: 687b ldr r3, [r7, #4] - 803305c: 681b ldr r3, [r3, #0] - 803305e: 3308 adds r3, #8 - 8033060: f8c7 309c str.w r3, [r7, #156] ; 0x9c + 80330de: 687b ldr r3, [r7, #4] + 80330e0: 681b ldr r3, [r3, #0] + 80330e2: 3308 adds r3, #8 + 80330e4: f8c7 309c str.w r3, [r7, #156] ; 0x9c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8033064: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8033068: e853 3f00 ldrex r3, [r3] - 803306c: f8c7 3098 str.w r3, [r7, #152] ; 0x98 + 80330e8: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 80330ec: e853 3f00 ldrex r3, [r3] + 80330f0: f8c7 3098 str.w r3, [r7, #152] ; 0x98 return(result); - 8033070: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98 - 8033074: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8033078: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0 - 803307c: 687b ldr r3, [r7, #4] - 803307e: 681b ldr r3, [r3, #0] - 8033080: 3308 adds r3, #8 - 8033082: f8d7 20d0 ldr.w r2, [r7, #208] ; 0xd0 - 8033086: f8c7 20a8 str.w r2, [r7, #168] ; 0xa8 - 803308a: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 + 80330f4: f8d7 3098 ldr.w r3, [r7, #152] ; 0x98 + 80330f8: f023 0340 bic.w r3, r3, #64 ; 0x40 + 80330fc: f8c7 30d0 str.w r3, [r7, #208] ; 0xd0 + 8033100: 687b ldr r3, [r7, #4] + 8033102: 681b ldr r3, [r3, #0] + 8033104: 3308 adds r3, #8 + 8033106: f8d7 20d0 ldr.w r2, [r7, #208] ; 0xd0 + 803310a: f8c7 20a8 str.w r2, [r7, #168] ; 0xa8 + 803310e: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803308e: f8d7 10a4 ldr.w r1, [r7, #164] ; 0xa4 - 8033092: f8d7 20a8 ldr.w r2, [r7, #168] ; 0xa8 - 8033096: e841 2300 strex r3, r2, [r1] - 803309a: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 + 8033112: f8d7 10a4 ldr.w r1, [r7, #164] ; 0xa4 + 8033116: f8d7 20a8 ldr.w r2, [r7, #168] ; 0xa8 + 803311a: e841 2300 strex r3, r2, [r1] + 803311e: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 return(result); - 803309e: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0 - 80330a2: 2b00 cmp r3, #0 - 80330a4: d1d9 bne.n 803305a + 8033122: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0 + 8033126: 2b00 cmp r3, #0 + 8033128: d1d9 bne.n 80330de /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 80330a6: 687b ldr r3, [r7, #4] - 80330a8: 6fdb ldr r3, [r3, #124] ; 0x7c - 80330aa: 2b00 cmp r3, #0 - 80330ac: d013 beq.n 80330d6 + 803312a: 687b ldr r3, [r7, #4] + 803312c: 6fdb ldr r3, [r3, #124] ; 0x7c + 803312e: 2b00 cmp r3, #0 + 8033130: d013 beq.n 803315a { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 80330ae: 687b ldr r3, [r7, #4] - 80330b0: 6fdb ldr r3, [r3, #124] ; 0x7c - 80330b2: 4a14 ldr r2, [pc, #80] ; (8033104 ) - 80330b4: 651a str r2, [r3, #80] ; 0x50 + 8033132: 687b ldr r3, [r7, #4] + 8033134: 6fdb ldr r3, [r3, #124] ; 0x7c + 8033136: 4a14 ldr r2, [pc, #80] ; (8033188 ) + 8033138: 651a str r2, [r3, #80] ; 0x50 /* Abort DMA RX */ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 80330b6: 687b ldr r3, [r7, #4] - 80330b8: 6fdb ldr r3, [r3, #124] ; 0x7c - 80330ba: 4618 mov r0, r3 - 80330bc: f7f5 fe16 bl 8028cec - 80330c0: 4603 mov r3, r0 - 80330c2: 2b00 cmp r3, #0 - 80330c4: d017 beq.n 80330f6 + 803313a: 687b ldr r3, [r7, #4] + 803313c: 6fdb ldr r3, [r3, #124] ; 0x7c + 803313e: 4618 mov r0, r3 + 8033140: f7f5 fe16 bl 8028d70 + 8033144: 4603 mov r3, r0 + 8033146: 2b00 cmp r3, #0 + 8033148: d017 beq.n 803317a { /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 80330c6: 687b ldr r3, [r7, #4] - 80330c8: 6fdb ldr r3, [r3, #124] ; 0x7c - 80330ca: 6d1b ldr r3, [r3, #80] ; 0x50 - 80330cc: 687a ldr r2, [r7, #4] - 80330ce: 6fd2 ldr r2, [r2, #124] ; 0x7c - 80330d0: 4610 mov r0, r2 - 80330d2: 4798 blx r3 + 803314a: 687b ldr r3, [r7, #4] + 803314c: 6fdb ldr r3, [r3, #124] ; 0x7c + 803314e: 6d1b ldr r3, [r3, #80] ; 0x50 + 8033150: 687a ldr r2, [r7, #4] + 8033152: 6fd2 ldr r2, [r2, #124] ; 0x7c + 8033154: 4610 mov r0, r2 + 8033156: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80330d4: e00f b.n 80330f6 + 8033158: e00f b.n 803317a #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80330d6: 6878 ldr r0, [r7, #4] - 80330d8: f000 fa60 bl 803359c + 803315a: 6878 ldr r0, [r7, #4] + 803315c: f000 fa60 bl 8033620 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80330dc: e00b b.n 80330f6 + 8033160: e00b b.n 803317a #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80330de: 6878 ldr r0, [r7, #4] - 80330e0: f000 fa5c bl 803359c + 8033162: 6878 ldr r0, [r7, #4] + 8033164: f000 fa5c bl 8033620 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80330e4: e007 b.n 80330f6 + 8033168: e007 b.n 803317a #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80330e6: 6878 ldr r0, [r7, #4] - 80330e8: f000 fa58 bl 803359c + 803316a: 6878 ldr r0, [r7, #4] + 803316c: f000 fa58 bl 8033620 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 80330ec: 687b ldr r3, [r7, #4] - 80330ee: 2200 movs r2, #0 - 80330f0: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8033170: 687b ldr r3, [r7, #4] + 8033172: 2200 movs r2, #0 + 8033174: f8c3 208c str.w r2, [r3, #140] ; 0x8c } } return; - 80330f4: e23b b.n 803356e + 8033178: e23b b.n 80335f2 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80330f6: bf00 nop + 803317a: bf00 nop return; - 80330f8: e239 b.n 803356e - 80330fa: bf00 nop - 80330fc: 10000001 .word 0x10000001 - 8033100: 04000120 .word 0x04000120 - 8033104: 080348db .word 0x080348db + 803317c: e239 b.n 80335f2 + 803317e: bf00 nop + 8033180: 10000001 .word 0x10000001 + 8033184: 04000120 .word 0x04000120 + 8033188: 0803495f .word 0x0803495f } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8033108: 687b ldr r3, [r7, #4] - 803310a: 6edb ldr r3, [r3, #108] ; 0x6c - 803310c: 2b01 cmp r3, #1 - 803310e: f040 81ce bne.w 80334ae + 803318c: 687b ldr r3, [r7, #4] + 803318e: 6edb ldr r3, [r3, #108] ; 0x6c + 8033190: 2b01 cmp r3, #1 + 8033192: f040 81ce bne.w 8033532 && ((isrflags & USART_ISR_IDLE) != 0U) - 8033112: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8033116: f003 0310 and.w r3, r3, #16 - 803311a: 2b00 cmp r3, #0 - 803311c: f000 81c7 beq.w 80334ae + 8033196: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 803319a: f003 0310 and.w r3, r3, #16 + 803319e: 2b00 cmp r3, #0 + 80331a0: f000 81c7 beq.w 8033532 && ((cr1its & USART_ISR_IDLE) != 0U)) - 8033120: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 8033124: f003 0310 and.w r3, r3, #16 - 8033128: 2b00 cmp r3, #0 - 803312a: f000 81c0 beq.w 80334ae + 80331a4: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 80331a8: f003 0310 and.w r3, r3, #16 + 80331ac: 2b00 cmp r3, #0 + 80331ae: f000 81c0 beq.w 8033532 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 803312e: 687b ldr r3, [r7, #4] - 8033130: 681b ldr r3, [r3, #0] - 8033132: 2210 movs r2, #16 - 8033134: 621a str r2, [r3, #32] + 80331b2: 687b ldr r3, [r7, #4] + 80331b4: 681b ldr r3, [r3, #0] + 80331b6: 2210 movs r2, #16 + 80331b8: 621a str r2, [r3, #32] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8033136: 687b ldr r3, [r7, #4] - 8033138: 681b ldr r3, [r3, #0] - 803313a: 689b ldr r3, [r3, #8] - 803313c: f003 0340 and.w r3, r3, #64 ; 0x40 - 8033140: 2b40 cmp r3, #64 ; 0x40 - 8033142: f040 813b bne.w 80333bc + 80331ba: 687b ldr r3, [r7, #4] + 80331bc: 681b ldr r3, [r3, #0] + 80331be: 689b ldr r3, [r3, #8] + 80331c0: f003 0340 and.w r3, r3, #64 ; 0x40 + 80331c4: 2b40 cmp r3, #64 ; 0x40 + 80331c6: f040 813b bne.w 8033440 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 8033146: 687b ldr r3, [r7, #4] - 8033148: 6fdb ldr r3, [r3, #124] ; 0x7c - 803314a: 681b ldr r3, [r3, #0] - 803314c: 4a8b ldr r2, [pc, #556] ; (803337c ) - 803314e: 4293 cmp r3, r2 - 8033150: d059 beq.n 8033206 - 8033152: 687b ldr r3, [r7, #4] - 8033154: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033156: 681b ldr r3, [r3, #0] - 8033158: 4a89 ldr r2, [pc, #548] ; (8033380 ) - 803315a: 4293 cmp r3, r2 - 803315c: d053 beq.n 8033206 - 803315e: 687b ldr r3, [r7, #4] - 8033160: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033162: 681b ldr r3, [r3, #0] - 8033164: 4a87 ldr r2, [pc, #540] ; (8033384 ) - 8033166: 4293 cmp r3, r2 - 8033168: d04d beq.n 8033206 - 803316a: 687b ldr r3, [r7, #4] - 803316c: 6fdb ldr r3, [r3, #124] ; 0x7c - 803316e: 681b ldr r3, [r3, #0] - 8033170: 4a85 ldr r2, [pc, #532] ; (8033388 ) - 8033172: 4293 cmp r3, r2 - 8033174: d047 beq.n 8033206 - 8033176: 687b ldr r3, [r7, #4] - 8033178: 6fdb ldr r3, [r3, #124] ; 0x7c - 803317a: 681b ldr r3, [r3, #0] - 803317c: 4a83 ldr r2, [pc, #524] ; (803338c ) - 803317e: 4293 cmp r3, r2 - 8033180: d041 beq.n 8033206 - 8033182: 687b ldr r3, [r7, #4] - 8033184: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033186: 681b ldr r3, [r3, #0] - 8033188: 4a81 ldr r2, [pc, #516] ; (8033390 ) - 803318a: 4293 cmp r3, r2 - 803318c: d03b beq.n 8033206 - 803318e: 687b ldr r3, [r7, #4] - 8033190: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033192: 681b ldr r3, [r3, #0] - 8033194: 4a7f ldr r2, [pc, #508] ; (8033394 ) - 8033196: 4293 cmp r3, r2 - 8033198: d035 beq.n 8033206 - 803319a: 687b ldr r3, [r7, #4] - 803319c: 6fdb ldr r3, [r3, #124] ; 0x7c - 803319e: 681b ldr r3, [r3, #0] - 80331a0: 4a7d ldr r2, [pc, #500] ; (8033398 ) - 80331a2: 4293 cmp r3, r2 - 80331a4: d02f beq.n 8033206 - 80331a6: 687b ldr r3, [r7, #4] - 80331a8: 6fdb ldr r3, [r3, #124] ; 0x7c - 80331aa: 681b ldr r3, [r3, #0] - 80331ac: 4a7b ldr r2, [pc, #492] ; (803339c ) - 80331ae: 4293 cmp r3, r2 - 80331b0: d029 beq.n 8033206 - 80331b2: 687b ldr r3, [r7, #4] - 80331b4: 6fdb ldr r3, [r3, #124] ; 0x7c - 80331b6: 681b ldr r3, [r3, #0] - 80331b8: 4a79 ldr r2, [pc, #484] ; (80333a0 ) - 80331ba: 4293 cmp r3, r2 - 80331bc: d023 beq.n 8033206 - 80331be: 687b ldr r3, [r7, #4] - 80331c0: 6fdb ldr r3, [r3, #124] ; 0x7c - 80331c2: 681b ldr r3, [r3, #0] - 80331c4: 4a77 ldr r2, [pc, #476] ; (80333a4 ) - 80331c6: 4293 cmp r3, r2 - 80331c8: d01d beq.n 8033206 80331ca: 687b ldr r3, [r7, #4] 80331cc: 6fdb ldr r3, [r3, #124] ; 0x7c 80331ce: 681b ldr r3, [r3, #0] - 80331d0: 4a75 ldr r2, [pc, #468] ; (80333a8 ) + 80331d0: 4a8b ldr r2, [pc, #556] ; (8033400 ) 80331d2: 4293 cmp r3, r2 - 80331d4: d017 beq.n 8033206 + 80331d4: d059 beq.n 803328a 80331d6: 687b ldr r3, [r7, #4] 80331d8: 6fdb ldr r3, [r3, #124] ; 0x7c 80331da: 681b ldr r3, [r3, #0] - 80331dc: 4a73 ldr r2, [pc, #460] ; (80333ac ) + 80331dc: 4a89 ldr r2, [pc, #548] ; (8033404 ) 80331de: 4293 cmp r3, r2 - 80331e0: d011 beq.n 8033206 + 80331e0: d053 beq.n 803328a 80331e2: 687b ldr r3, [r7, #4] 80331e4: 6fdb ldr r3, [r3, #124] ; 0x7c 80331e6: 681b ldr r3, [r3, #0] - 80331e8: 4a71 ldr r2, [pc, #452] ; (80333b0 ) + 80331e8: 4a87 ldr r2, [pc, #540] ; (8033408 ) 80331ea: 4293 cmp r3, r2 - 80331ec: d00b beq.n 8033206 + 80331ec: d04d beq.n 803328a 80331ee: 687b ldr r3, [r7, #4] 80331f0: 6fdb ldr r3, [r3, #124] ; 0x7c 80331f2: 681b ldr r3, [r3, #0] - 80331f4: 4a6f ldr r2, [pc, #444] ; (80333b4 ) + 80331f4: 4a85 ldr r2, [pc, #532] ; (803340c ) 80331f6: 4293 cmp r3, r2 - 80331f8: d005 beq.n 8033206 + 80331f8: d047 beq.n 803328a 80331fa: 687b ldr r3, [r7, #4] 80331fc: 6fdb ldr r3, [r3, #124] ; 0x7c 80331fe: 681b ldr r3, [r3, #0] - 8033200: 4a6d ldr r2, [pc, #436] ; (80333b8 ) + 8033200: 4a83 ldr r2, [pc, #524] ; (8033410 ) 8033202: 4293 cmp r3, r2 - 8033204: d105 bne.n 8033212 + 8033204: d041 beq.n 803328a 8033206: 687b ldr r3, [r7, #4] 8033208: 6fdb ldr r3, [r3, #124] ; 0x7c 803320a: 681b ldr r3, [r3, #0] - 803320c: 685b ldr r3, [r3, #4] - 803320e: b29b uxth r3, r3 - 8033210: e004 b.n 803321c + 803320c: 4a81 ldr r2, [pc, #516] ; (8033414 ) + 803320e: 4293 cmp r3, r2 + 8033210: d03b beq.n 803328a 8033212: 687b ldr r3, [r7, #4] 8033214: 6fdb ldr r3, [r3, #124] ; 0x7c 8033216: 681b ldr r3, [r3, #0] - 8033218: 685b ldr r3, [r3, #4] - 803321a: b29b uxth r3, r3 - 803321c: f8a7 30be strh.w r3, [r7, #190] ; 0xbe + 8033218: 4a7f ldr r2, [pc, #508] ; (8033418 ) + 803321a: 4293 cmp r3, r2 + 803321c: d035 beq.n 803328a + 803321e: 687b ldr r3, [r7, #4] + 8033220: 6fdb ldr r3, [r3, #124] ; 0x7c + 8033222: 681b ldr r3, [r3, #0] + 8033224: 4a7d ldr r2, [pc, #500] ; (803341c ) + 8033226: 4293 cmp r3, r2 + 8033228: d02f beq.n 803328a + 803322a: 687b ldr r3, [r7, #4] + 803322c: 6fdb ldr r3, [r3, #124] ; 0x7c + 803322e: 681b ldr r3, [r3, #0] + 8033230: 4a7b ldr r2, [pc, #492] ; (8033420 ) + 8033232: 4293 cmp r3, r2 + 8033234: d029 beq.n 803328a + 8033236: 687b ldr r3, [r7, #4] + 8033238: 6fdb ldr r3, [r3, #124] ; 0x7c + 803323a: 681b ldr r3, [r3, #0] + 803323c: 4a79 ldr r2, [pc, #484] ; (8033424 ) + 803323e: 4293 cmp r3, r2 + 8033240: d023 beq.n 803328a + 8033242: 687b ldr r3, [r7, #4] + 8033244: 6fdb ldr r3, [r3, #124] ; 0x7c + 8033246: 681b ldr r3, [r3, #0] + 8033248: 4a77 ldr r2, [pc, #476] ; (8033428 ) + 803324a: 4293 cmp r3, r2 + 803324c: d01d beq.n 803328a + 803324e: 687b ldr r3, [r7, #4] + 8033250: 6fdb ldr r3, [r3, #124] ; 0x7c + 8033252: 681b ldr r3, [r3, #0] + 8033254: 4a75 ldr r2, [pc, #468] ; (803342c ) + 8033256: 4293 cmp r3, r2 + 8033258: d017 beq.n 803328a + 803325a: 687b ldr r3, [r7, #4] + 803325c: 6fdb ldr r3, [r3, #124] ; 0x7c + 803325e: 681b ldr r3, [r3, #0] + 8033260: 4a73 ldr r2, [pc, #460] ; (8033430 ) + 8033262: 4293 cmp r3, r2 + 8033264: d011 beq.n 803328a + 8033266: 687b ldr r3, [r7, #4] + 8033268: 6fdb ldr r3, [r3, #124] ; 0x7c + 803326a: 681b ldr r3, [r3, #0] + 803326c: 4a71 ldr r2, [pc, #452] ; (8033434 ) + 803326e: 4293 cmp r3, r2 + 8033270: d00b beq.n 803328a + 8033272: 687b ldr r3, [r7, #4] + 8033274: 6fdb ldr r3, [r3, #124] ; 0x7c + 8033276: 681b ldr r3, [r3, #0] + 8033278: 4a6f ldr r2, [pc, #444] ; (8033438 ) + 803327a: 4293 cmp r3, r2 + 803327c: d005 beq.n 803328a + 803327e: 687b ldr r3, [r7, #4] + 8033280: 6fdb ldr r3, [r3, #124] ; 0x7c + 8033282: 681b ldr r3, [r3, #0] + 8033284: 4a6d ldr r2, [pc, #436] ; (803343c ) + 8033286: 4293 cmp r3, r2 + 8033288: d105 bne.n 8033296 + 803328a: 687b ldr r3, [r7, #4] + 803328c: 6fdb ldr r3, [r3, #124] ; 0x7c + 803328e: 681b ldr r3, [r3, #0] + 8033290: 685b ldr r3, [r3, #4] + 8033292: b29b uxth r3, r3 + 8033294: e004 b.n 80332a0 + 8033296: 687b ldr r3, [r7, #4] + 8033298: 6fdb ldr r3, [r3, #124] ; 0x7c + 803329a: 681b ldr r3, [r3, #0] + 803329c: 685b ldr r3, [r3, #4] + 803329e: b29b uxth r3, r3 + 80332a0: f8a7 30be strh.w r3, [r7, #190] ; 0xbe if ((nb_remaining_rx_data > 0U) - 8033220: f8b7 30be ldrh.w r3, [r7, #190] ; 0xbe - 8033224: 2b00 cmp r3, #0 - 8033226: f000 81a4 beq.w 8033572 + 80332a4: f8b7 30be ldrh.w r3, [r7, #190] ; 0xbe + 80332a8: 2b00 cmp r3, #0 + 80332aa: f000 81a4 beq.w 80335f6 && (nb_remaining_rx_data < huart->RxXferSize)) - 803322a: 687b ldr r3, [r7, #4] - 803322c: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 8033230: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe - 8033234: 429a cmp r2, r3 - 8033236: f080 819c bcs.w 8033572 + 80332ae: 687b ldr r3, [r7, #4] + 80332b0: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 80332b4: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe + 80332b8: 429a cmp r2, r3 + 80332ba: f080 819c bcs.w 80335f6 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; - 803323a: 687b ldr r3, [r7, #4] - 803323c: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe - 8033240: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 80332be: 687b ldr r3, [r7, #4] + 80332c0: f8b7 20be ldrh.w r2, [r7, #190] ; 0xbe + 80332c4: f8a3 205e strh.w r2, [r3, #94] ; 0x5e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - 8033244: 687b ldr r3, [r7, #4] - 8033246: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033248: 69db ldr r3, [r3, #28] - 803324a: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803324e: f000 8086 beq.w 803335e + 80332c8: 687b ldr r3, [r7, #4] + 80332ca: 6fdb ldr r3, [r3, #124] ; 0x7c + 80332cc: 69db ldr r3, [r3, #28] + 80332ce: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 80332d2: f000 8086 beq.w 80333e2 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8033252: 687b ldr r3, [r7, #4] - 8033254: 681b ldr r3, [r3, #0] - 8033256: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 80332d6: 687b ldr r3, [r7, #4] + 80332d8: 681b ldr r3, [r3, #0] + 80332da: f8c7 3088 str.w r3, [r7, #136] ; 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803325a: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 - 803325e: e853 3f00 ldrex r3, [r3] - 8033262: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 80332de: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 + 80332e2: e853 3f00 ldrex r3, [r3] + 80332e6: f8c7 3084 str.w r3, [r7, #132] ; 0x84 return(result); - 8033266: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84 - 803326a: f423 7380 bic.w r3, r3, #256 ; 0x100 - 803326e: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 - 8033272: 687b ldr r3, [r7, #4] - 8033274: 681b ldr r3, [r3, #0] - 8033276: 461a mov r2, r3 - 8033278: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8 - 803327c: f8c7 3094 str.w r3, [r7, #148] ; 0x94 - 8033280: f8c7 2090 str.w r2, [r7, #144] ; 0x90 + 80332ea: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84 + 80332ee: f423 7380 bic.w r3, r3, #256 ; 0x100 + 80332f2: f8c7 30b8 str.w r3, [r7, #184] ; 0xb8 + 80332f6: 687b ldr r3, [r7, #4] + 80332f8: 681b ldr r3, [r3, #0] + 80332fa: 461a mov r2, r3 + 80332fc: f8d7 30b8 ldr.w r3, [r7, #184] ; 0xb8 + 8033300: f8c7 3094 str.w r3, [r7, #148] ; 0x94 + 8033304: f8c7 2090 str.w r2, [r7, #144] ; 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033284: f8d7 1090 ldr.w r1, [r7, #144] ; 0x90 - 8033288: f8d7 2094 ldr.w r2, [r7, #148] ; 0x94 - 803328c: e841 2300 strex r3, r2, [r1] - 8033290: f8c7 308c str.w r3, [r7, #140] ; 0x8c + 8033308: f8d7 1090 ldr.w r1, [r7, #144] ; 0x90 + 803330c: f8d7 2094 ldr.w r2, [r7, #148] ; 0x94 + 8033310: e841 2300 strex r3, r2, [r1] + 8033314: f8c7 308c str.w r3, [r7, #140] ; 0x8c return(result); - 8033294: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c - 8033298: 2b00 cmp r3, #0 - 803329a: d1da bne.n 8033252 + 8033318: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c + 803331c: 2b00 cmp r3, #0 + 803331e: d1da bne.n 80332d6 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 803329c: 687b ldr r3, [r7, #4] - 803329e: 681b ldr r3, [r3, #0] - 80332a0: 3308 adds r3, #8 - 80332a2: 677b str r3, [r7, #116] ; 0x74 + 8033320: 687b ldr r3, [r7, #4] + 8033322: 681b ldr r3, [r3, #0] + 8033324: 3308 adds r3, #8 + 8033326: 677b str r3, [r7, #116] ; 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80332a4: 6f7b ldr r3, [r7, #116] ; 0x74 - 80332a6: e853 3f00 ldrex r3, [r3] - 80332aa: 673b str r3, [r7, #112] ; 0x70 + 8033328: 6f7b ldr r3, [r7, #116] ; 0x74 + 803332a: e853 3f00 ldrex r3, [r3] + 803332e: 673b str r3, [r7, #112] ; 0x70 return(result); - 80332ac: 6f3b ldr r3, [r7, #112] ; 0x70 - 80332ae: f023 0301 bic.w r3, r3, #1 - 80332b2: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4 - 80332b6: 687b ldr r3, [r7, #4] - 80332b8: 681b ldr r3, [r3, #0] - 80332ba: 3308 adds r3, #8 - 80332bc: f8d7 20b4 ldr.w r2, [r7, #180] ; 0xb4 - 80332c0: f8c7 2080 str.w r2, [r7, #128] ; 0x80 - 80332c4: 67fb str r3, [r7, #124] ; 0x7c + 8033330: 6f3b ldr r3, [r7, #112] ; 0x70 + 8033332: f023 0301 bic.w r3, r3, #1 + 8033336: f8c7 30b4 str.w r3, [r7, #180] ; 0xb4 + 803333a: 687b ldr r3, [r7, #4] + 803333c: 681b ldr r3, [r3, #0] + 803333e: 3308 adds r3, #8 + 8033340: f8d7 20b4 ldr.w r2, [r7, #180] ; 0xb4 + 8033344: f8c7 2080 str.w r2, [r7, #128] ; 0x80 + 8033348: 67fb str r3, [r7, #124] ; 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80332c6: 6ff9 ldr r1, [r7, #124] ; 0x7c - 80332c8: f8d7 2080 ldr.w r2, [r7, #128] ; 0x80 - 80332cc: e841 2300 strex r3, r2, [r1] - 80332d0: 67bb str r3, [r7, #120] ; 0x78 + 803334a: 6ff9 ldr r1, [r7, #124] ; 0x7c + 803334c: f8d7 2080 ldr.w r2, [r7, #128] ; 0x80 + 8033350: e841 2300 strex r3, r2, [r1] + 8033354: 67bb str r3, [r7, #120] ; 0x78 return(result); - 80332d2: 6fbb ldr r3, [r7, #120] ; 0x78 - 80332d4: 2b00 cmp r3, #0 - 80332d6: d1e1 bne.n 803329c + 8033356: 6fbb ldr r3, [r7, #120] ; 0x78 + 8033358: 2b00 cmp r3, #0 + 803335a: d1e1 bne.n 8033320 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 80332d8: 687b ldr r3, [r7, #4] - 80332da: 681b ldr r3, [r3, #0] - 80332dc: 3308 adds r3, #8 - 80332de: 663b str r3, [r7, #96] ; 0x60 + 803335c: 687b ldr r3, [r7, #4] + 803335e: 681b ldr r3, [r3, #0] + 8033360: 3308 adds r3, #8 + 8033362: 663b str r3, [r7, #96] ; 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80332e0: 6e3b ldr r3, [r7, #96] ; 0x60 - 80332e2: e853 3f00 ldrex r3, [r3] - 80332e6: 65fb str r3, [r7, #92] ; 0x5c + 8033364: 6e3b ldr r3, [r7, #96] ; 0x60 + 8033366: e853 3f00 ldrex r3, [r3] + 803336a: 65fb str r3, [r7, #92] ; 0x5c return(result); - 80332e8: 6dfb ldr r3, [r7, #92] ; 0x5c - 80332ea: f023 0340 bic.w r3, r3, #64 ; 0x40 - 80332ee: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0 - 80332f2: 687b ldr r3, [r7, #4] - 80332f4: 681b ldr r3, [r3, #0] - 80332f6: 3308 adds r3, #8 - 80332f8: f8d7 20b0 ldr.w r2, [r7, #176] ; 0xb0 - 80332fc: 66fa str r2, [r7, #108] ; 0x6c - 80332fe: 66bb str r3, [r7, #104] ; 0x68 + 803336c: 6dfb ldr r3, [r7, #92] ; 0x5c + 803336e: f023 0340 bic.w r3, r3, #64 ; 0x40 + 8033372: f8c7 30b0 str.w r3, [r7, #176] ; 0xb0 + 8033376: 687b ldr r3, [r7, #4] + 8033378: 681b ldr r3, [r3, #0] + 803337a: 3308 adds r3, #8 + 803337c: f8d7 20b0 ldr.w r2, [r7, #176] ; 0xb0 + 8033380: 66fa str r2, [r7, #108] ; 0x6c + 8033382: 66bb str r3, [r7, #104] ; 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033300: 6eb9 ldr r1, [r7, #104] ; 0x68 - 8033302: 6efa ldr r2, [r7, #108] ; 0x6c - 8033304: e841 2300 strex r3, r2, [r1] - 8033308: 667b str r3, [r7, #100] ; 0x64 + 8033384: 6eb9 ldr r1, [r7, #104] ; 0x68 + 8033386: 6efa ldr r2, [r7, #108] ; 0x6c + 8033388: e841 2300 strex r3, r2, [r1] + 803338c: 667b str r3, [r7, #100] ; 0x64 return(result); - 803330a: 6e7b ldr r3, [r7, #100] ; 0x64 - 803330c: 2b00 cmp r3, #0 - 803330e: d1e3 bne.n 80332d8 + 803338e: 6e7b ldr r3, [r7, #100] ; 0x64 + 8033390: 2b00 cmp r3, #0 + 8033392: d1e3 bne.n 803335c /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8033310: 687b ldr r3, [r7, #4] - 8033312: 2220 movs r2, #32 - 8033314: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8033394: 687b ldr r3, [r7, #4] + 8033396: 2220 movs r2, #32 + 8033398: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8033318: 687b ldr r3, [r7, #4] - 803331a: 2200 movs r2, #0 - 803331c: 66da str r2, [r3, #108] ; 0x6c + 803339c: 687b ldr r3, [r7, #4] + 803339e: 2200 movs r2, #0 + 80333a0: 66da str r2, [r3, #108] ; 0x6c ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 803331e: 687b ldr r3, [r7, #4] - 8033320: 681b ldr r3, [r3, #0] - 8033322: 64fb str r3, [r7, #76] ; 0x4c + 80333a2: 687b ldr r3, [r7, #4] + 80333a4: 681b ldr r3, [r3, #0] + 80333a6: 64fb str r3, [r7, #76] ; 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8033324: 6cfb ldr r3, [r7, #76] ; 0x4c - 8033326: e853 3f00 ldrex r3, [r3] - 803332a: 64bb str r3, [r7, #72] ; 0x48 + 80333a8: 6cfb ldr r3, [r7, #76] ; 0x4c + 80333aa: e853 3f00 ldrex r3, [r3] + 80333ae: 64bb str r3, [r7, #72] ; 0x48 return(result); - 803332c: 6cbb ldr r3, [r7, #72] ; 0x48 - 803332e: f023 0310 bic.w r3, r3, #16 - 8033332: f8c7 30ac str.w r3, [r7, #172] ; 0xac - 8033336: 687b ldr r3, [r7, #4] - 8033338: 681b ldr r3, [r3, #0] - 803333a: 461a mov r2, r3 - 803333c: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac - 8033340: 65bb str r3, [r7, #88] ; 0x58 - 8033342: 657a str r2, [r7, #84] ; 0x54 + 80333b0: 6cbb ldr r3, [r7, #72] ; 0x48 + 80333b2: f023 0310 bic.w r3, r3, #16 + 80333b6: f8c7 30ac str.w r3, [r7, #172] ; 0xac + 80333ba: 687b ldr r3, [r7, #4] + 80333bc: 681b ldr r3, [r3, #0] + 80333be: 461a mov r2, r3 + 80333c0: f8d7 30ac ldr.w r3, [r7, #172] ; 0xac + 80333c4: 65bb str r3, [r7, #88] ; 0x58 + 80333c6: 657a str r2, [r7, #84] ; 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033344: 6d79 ldr r1, [r7, #84] ; 0x54 - 8033346: 6dba ldr r2, [r7, #88] ; 0x58 - 8033348: e841 2300 strex r3, r2, [r1] - 803334c: 653b str r3, [r7, #80] ; 0x50 + 80333c8: 6d79 ldr r1, [r7, #84] ; 0x54 + 80333ca: 6dba ldr r2, [r7, #88] ; 0x58 + 80333cc: e841 2300 strex r3, r2, [r1] + 80333d0: 653b str r3, [r7, #80] ; 0x50 return(result); - 803334e: 6d3b ldr r3, [r7, #80] ; 0x50 - 8033350: 2b00 cmp r3, #0 - 8033352: d1e4 bne.n 803331e + 80333d2: 6d3b ldr r3, [r7, #80] ; 0x50 + 80333d4: 2b00 cmp r3, #0 + 80333d6: d1e4 bne.n 80333a2 /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); - 8033354: 687b ldr r3, [r7, #4] - 8033356: 6fdb ldr r3, [r3, #124] ; 0x7c - 8033358: 4618 mov r0, r3 - 803335a: f7f5 f9a9 bl 80286b0 + 80333d8: 687b ldr r3, [r7, #4] + 80333da: 6fdb ldr r3, [r3, #124] ; 0x7c + 80333dc: 4618 mov r0, r3 + 80333de: f7f5 f9a9 bl 8028734 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 803335e: 687b ldr r3, [r7, #4] - 8033360: f8b3 205c ldrh.w r2, [r3, #92] ; 0x5c - 8033364: 687b ldr r3, [r7, #4] - 8033366: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 803336a: b29b uxth r3, r3 - 803336c: 1ad3 subs r3, r2, r3 - 803336e: b29b uxth r3, r3 - 8033370: 4619 mov r1, r3 - 8033372: 6878 ldr r0, [r7, #4] - 8033374: f000 f91c bl 80335b0 + 80333e2: 687b ldr r3, [r7, #4] + 80333e4: f8b3 205c ldrh.w r2, [r3, #92] ; 0x5c + 80333e8: 687b ldr r3, [r7, #4] + 80333ea: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 80333ee: b29b uxth r3, r3 + 80333f0: 1ad3 subs r3, r2, r3 + 80333f2: b29b uxth r3, r3 + 80333f4: 4619 mov r1, r3 + 80333f6: 6878 ldr r0, [r7, #4] + 80333f8: f000 f91c bl 8033634 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } return; - 8033378: e0fb b.n 8033572 - 803337a: bf00 nop - 803337c: 40020010 .word 0x40020010 - 8033380: 40020028 .word 0x40020028 - 8033384: 40020040 .word 0x40020040 - 8033388: 40020058 .word 0x40020058 - 803338c: 40020070 .word 0x40020070 - 8033390: 40020088 .word 0x40020088 - 8033394: 400200a0 .word 0x400200a0 - 8033398: 400200b8 .word 0x400200b8 - 803339c: 40020410 .word 0x40020410 - 80333a0: 40020428 .word 0x40020428 - 80333a4: 40020440 .word 0x40020440 - 80333a8: 40020458 .word 0x40020458 - 80333ac: 40020470 .word 0x40020470 - 80333b0: 40020488 .word 0x40020488 - 80333b4: 400204a0 .word 0x400204a0 - 80333b8: 400204b8 .word 0x400204b8 + 80333fc: e0fb b.n 80335f6 + 80333fe: bf00 nop + 8033400: 40020010 .word 0x40020010 + 8033404: 40020028 .word 0x40020028 + 8033408: 40020040 .word 0x40020040 + 803340c: 40020058 .word 0x40020058 + 8033410: 40020070 .word 0x40020070 + 8033414: 40020088 .word 0x40020088 + 8033418: 400200a0 .word 0x400200a0 + 803341c: 400200b8 .word 0x400200b8 + 8033420: 40020410 .word 0x40020410 + 8033424: 40020428 .word 0x40020428 + 8033428: 40020440 .word 0x40020440 + 803342c: 40020458 .word 0x40020458 + 8033430: 40020470 .word 0x40020470 + 8033434: 40020488 .word 0x40020488 + 8033438: 400204a0 .word 0x400204a0 + 803343c: 400204b8 .word 0x400204b8 else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 80333bc: 687b ldr r3, [r7, #4] - 80333be: f8b3 205c ldrh.w r2, [r3, #92] ; 0x5c - 80333c2: 687b ldr r3, [r7, #4] - 80333c4: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 80333c8: b29b uxth r3, r3 - 80333ca: 1ad3 subs r3, r2, r3 - 80333cc: f8a7 30ce strh.w r3, [r7, #206] ; 0xce + 8033440: 687b ldr r3, [r7, #4] + 8033442: f8b3 205c ldrh.w r2, [r3, #92] ; 0x5c + 8033446: 687b ldr r3, [r7, #4] + 8033448: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 803344c: b29b uxth r3, r3 + 803344e: 1ad3 subs r3, r2, r3 + 8033450: f8a7 30ce strh.w r3, [r7, #206] ; 0xce if ((huart->RxXferCount > 0U) - 80333d0: 687b ldr r3, [r7, #4] - 80333d2: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 80333d6: b29b uxth r3, r3 - 80333d8: 2b00 cmp r3, #0 - 80333da: f000 80cc beq.w 8033576 + 8033454: 687b ldr r3, [r7, #4] + 8033456: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 803345a: b29b uxth r3, r3 + 803345c: 2b00 cmp r3, #0 + 803345e: f000 80cc beq.w 80335fa && (nb_rx_data > 0U)) - 80333de: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce - 80333e2: 2b00 cmp r3, #0 - 80333e4: f000 80c7 beq.w 8033576 + 8033462: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce + 8033466: 2b00 cmp r3, #0 + 8033468: f000 80c7 beq.w 80335fa { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 80333e8: 687b ldr r3, [r7, #4] - 80333ea: 681b ldr r3, [r3, #0] - 80333ec: 63bb str r3, [r7, #56] ; 0x38 + 803346c: 687b ldr r3, [r7, #4] + 803346e: 681b ldr r3, [r3, #0] + 8033470: 63bb str r3, [r7, #56] ; 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80333ee: 6bbb ldr r3, [r7, #56] ; 0x38 - 80333f0: e853 3f00 ldrex r3, [r3] - 80333f4: 637b str r3, [r7, #52] ; 0x34 + 8033472: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033474: e853 3f00 ldrex r3, [r3] + 8033478: 637b str r3, [r7, #52] ; 0x34 return(result); - 80333f6: 6b7b ldr r3, [r7, #52] ; 0x34 - 80333f8: f423 7390 bic.w r3, r3, #288 ; 0x120 - 80333fc: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 - 8033400: 687b ldr r3, [r7, #4] - 8033402: 681b ldr r3, [r3, #0] - 8033404: 461a mov r2, r3 - 8033406: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8 - 803340a: 647b str r3, [r7, #68] ; 0x44 - 803340c: 643a str r2, [r7, #64] ; 0x40 + 803347a: 6b7b ldr r3, [r7, #52] ; 0x34 + 803347c: f423 7390 bic.w r3, r3, #288 ; 0x120 + 8033480: f8c7 30c8 str.w r3, [r7, #200] ; 0xc8 + 8033484: 687b ldr r3, [r7, #4] + 8033486: 681b ldr r3, [r3, #0] + 8033488: 461a mov r2, r3 + 803348a: f8d7 30c8 ldr.w r3, [r7, #200] ; 0xc8 + 803348e: 647b str r3, [r7, #68] ; 0x44 + 8033490: 643a str r2, [r7, #64] ; 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803340e: 6c39 ldr r1, [r7, #64] ; 0x40 - 8033410: 6c7a ldr r2, [r7, #68] ; 0x44 - 8033412: e841 2300 strex r3, r2, [r1] - 8033416: 63fb str r3, [r7, #60] ; 0x3c + 8033492: 6c39 ldr r1, [r7, #64] ; 0x40 + 8033494: 6c7a ldr r2, [r7, #68] ; 0x44 + 8033496: e841 2300 strex r3, r2, [r1] + 803349a: 63fb str r3, [r7, #60] ; 0x3c return(result); - 8033418: 6bfb ldr r3, [r7, #60] ; 0x3c - 803341a: 2b00 cmp r3, #0 - 803341c: d1e4 bne.n 80333e8 + 803349c: 6bfb ldr r3, [r7, #60] ; 0x3c + 803349e: 2b00 cmp r3, #0 + 80334a0: d1e4 bne.n 803346c /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 803341e: 687b ldr r3, [r7, #4] - 8033420: 681b ldr r3, [r3, #0] - 8033422: 3308 adds r3, #8 - 8033424: 627b str r3, [r7, #36] ; 0x24 + 80334a2: 687b ldr r3, [r7, #4] + 80334a4: 681b ldr r3, [r3, #0] + 80334a6: 3308 adds r3, #8 + 80334a8: 627b str r3, [r7, #36] ; 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8033426: 6a7b ldr r3, [r7, #36] ; 0x24 - 8033428: e853 3f00 ldrex r3, [r3] - 803342c: 623b str r3, [r7, #32] + 80334aa: 6a7b ldr r3, [r7, #36] ; 0x24 + 80334ac: e853 3f00 ldrex r3, [r3] + 80334b0: 623b str r3, [r7, #32] return(result); - 803342e: 6a3a ldr r2, [r7, #32] - 8033430: 4b54 ldr r3, [pc, #336] ; (8033584 ) - 8033432: 4013 ands r3, r2 - 8033434: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 - 8033438: 687b ldr r3, [r7, #4] - 803343a: 681b ldr r3, [r3, #0] - 803343c: 3308 adds r3, #8 - 803343e: f8d7 20c4 ldr.w r2, [r7, #196] ; 0xc4 - 8033442: 633a str r2, [r7, #48] ; 0x30 - 8033444: 62fb str r3, [r7, #44] ; 0x2c + 80334b2: 6a3a ldr r2, [r7, #32] + 80334b4: 4b54 ldr r3, [pc, #336] ; (8033608 ) + 80334b6: 4013 ands r3, r2 + 80334b8: f8c7 30c4 str.w r3, [r7, #196] ; 0xc4 + 80334bc: 687b ldr r3, [r7, #4] + 80334be: 681b ldr r3, [r3, #0] + 80334c0: 3308 adds r3, #8 + 80334c2: f8d7 20c4 ldr.w r2, [r7, #196] ; 0xc4 + 80334c6: 633a str r2, [r7, #48] ; 0x30 + 80334c8: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033446: 6af9 ldr r1, [r7, #44] ; 0x2c - 8033448: 6b3a ldr r2, [r7, #48] ; 0x30 - 803344a: e841 2300 strex r3, r2, [r1] - 803344e: 62bb str r3, [r7, #40] ; 0x28 + 80334ca: 6af9 ldr r1, [r7, #44] ; 0x2c + 80334cc: 6b3a ldr r2, [r7, #48] ; 0x30 + 80334ce: e841 2300 strex r3, r2, [r1] + 80334d2: 62bb str r3, [r7, #40] ; 0x28 return(result); - 8033450: 6abb ldr r3, [r7, #40] ; 0x28 - 8033452: 2b00 cmp r3, #0 - 8033454: d1e3 bne.n 803341e + 80334d4: 6abb ldr r3, [r7, #40] ; 0x28 + 80334d6: 2b00 cmp r3, #0 + 80334d8: d1e3 bne.n 80334a2 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8033456: 687b ldr r3, [r7, #4] - 8033458: 2220 movs r2, #32 - 803345a: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 80334da: 687b ldr r3, [r7, #4] + 80334dc: 2220 movs r2, #32 + 80334de: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 803345e: 687b ldr r3, [r7, #4] - 8033460: 2200 movs r2, #0 - 8033462: 66da str r2, [r3, #108] ; 0x6c + 80334e2: 687b ldr r3, [r7, #4] + 80334e4: 2200 movs r2, #0 + 80334e6: 66da str r2, [r3, #108] ; 0x6c /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8033464: 687b ldr r3, [r7, #4] - 8033466: 2200 movs r2, #0 - 8033468: 671a str r2, [r3, #112] ; 0x70 + 80334e8: 687b ldr r3, [r7, #4] + 80334ea: 2200 movs r2, #0 + 80334ec: 671a str r2, [r3, #112] ; 0x70 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 803346a: 687b ldr r3, [r7, #4] - 803346c: 681b ldr r3, [r3, #0] - 803346e: 613b str r3, [r7, #16] + 80334ee: 687b ldr r3, [r7, #4] + 80334f0: 681b ldr r3, [r3, #0] + 80334f2: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8033470: 693b ldr r3, [r7, #16] - 8033472: e853 3f00 ldrex r3, [r3] - 8033476: 60fb str r3, [r7, #12] + 80334f4: 693b ldr r3, [r7, #16] + 80334f6: e853 3f00 ldrex r3, [r3] + 80334fa: 60fb str r3, [r7, #12] return(result); - 8033478: 68fb ldr r3, [r7, #12] - 803347a: f023 0310 bic.w r3, r3, #16 - 803347e: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0 - 8033482: 687b ldr r3, [r7, #4] - 8033484: 681b ldr r3, [r3, #0] - 8033486: 461a mov r2, r3 - 8033488: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0 - 803348c: 61fb str r3, [r7, #28] - 803348e: 61ba str r2, [r7, #24] + 80334fc: 68fb ldr r3, [r7, #12] + 80334fe: f023 0310 bic.w r3, r3, #16 + 8033502: f8c7 30c0 str.w r3, [r7, #192] ; 0xc0 + 8033506: 687b ldr r3, [r7, #4] + 8033508: 681b ldr r3, [r3, #0] + 803350a: 461a mov r2, r3 + 803350c: f8d7 30c0 ldr.w r3, [r7, #192] ; 0xc0 + 8033510: 61fb str r3, [r7, #28] + 8033512: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8033490: 69b9 ldr r1, [r7, #24] - 8033492: 69fa ldr r2, [r7, #28] - 8033494: e841 2300 strex r3, r2, [r1] - 8033498: 617b str r3, [r7, #20] + 8033514: 69b9 ldr r1, [r7, #24] + 8033516: 69fa ldr r2, [r7, #28] + 8033518: e841 2300 strex r3, r2, [r1] + 803351c: 617b str r3, [r7, #20] return(result); - 803349a: 697b ldr r3, [r7, #20] - 803349c: 2b00 cmp r3, #0 - 803349e: d1e4 bne.n 803346a + 803351e: 697b ldr r3, [r7, #20] + 8033520: 2b00 cmp r3, #0 + 8033522: d1e4 bne.n 80334ee #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 80334a0: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce - 80334a4: 4619 mov r1, r3 - 80334a6: 6878 ldr r0, [r7, #4] - 80334a8: f000 f882 bl 80335b0 + 8033524: f8b7 30ce ldrh.w r3, [r7, #206] ; 0xce + 8033528: 4619 mov r1, r3 + 803352a: 6878 ldr r0, [r7, #4] + 803352c: f000 f882 bl 8033634 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } return; - 80334ac: e063 b.n 8033576 + 8033530: e063 b.n 80335fa } } /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) - 80334ae: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80334b2: f403 1380 and.w r3, r3, #1048576 ; 0x100000 - 80334b6: 2b00 cmp r3, #0 - 80334b8: d00e beq.n 80334d8 - 80334ba: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 80334be: f403 0380 and.w r3, r3, #4194304 ; 0x400000 - 80334c2: 2b00 cmp r3, #0 - 80334c4: d008 beq.n 80334d8 + 8033532: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8033536: f403 1380 and.w r3, r3, #1048576 ; 0x100000 + 803353a: 2b00 cmp r3, #0 + 803353c: d00e beq.n 803355c + 803353e: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 8033542: f403 0380 and.w r3, r3, #4194304 ; 0x400000 + 8033546: 2b00 cmp r3, #0 + 8033548: d008 beq.n 803355c { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); - 80334c6: 687b ldr r3, [r7, #4] - 80334c8: 681b ldr r3, [r3, #0] - 80334ca: f44f 1280 mov.w r2, #1048576 ; 0x100000 - 80334ce: 621a str r2, [r3, #32] + 803354a: 687b ldr r3, [r7, #4] + 803354c: 681b ldr r3, [r3, #0] + 803354e: f44f 1280 mov.w r2, #1048576 ; 0x100000 + 8033552: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Wakeup Callback */ huart->WakeupCallback(huart); #else /* Call legacy weak Wakeup Callback */ HAL_UARTEx_WakeupCallback(huart); - 80334d0: 6878 ldr r0, [r7, #4] - 80334d2: f001 fe9f bl 8035214 + 8033554: 6878 ldr r0, [r7, #4] + 8033556: f001 fe9f bl 8035298 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; - 80334d6: e051 b.n 803357c + 803355a: e051 b.n 8033600 } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_ISR_TXE_TXFNF) != 0U) - 80334d8: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 80334dc: f003 0380 and.w r3, r3, #128 ; 0x80 - 80334e0: 2b00 cmp r3, #0 - 80334e2: d014 beq.n 803350e + 803355c: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8033560: f003 0380 and.w r3, r3, #128 ; 0x80 + 8033564: 2b00 cmp r3, #0 + 8033566: d014 beq.n 8033592 && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U) - 80334e4: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 80334e8: f003 0380 and.w r3, r3, #128 ; 0x80 - 80334ec: 2b00 cmp r3, #0 - 80334ee: d105 bne.n 80334fc + 8033568: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 803356c: f003 0380 and.w r3, r3, #128 ; 0x80 + 8033570: 2b00 cmp r3, #0 + 8033572: d105 bne.n 8033580 || ((cr3its & USART_CR3_TXFTIE) != 0U))) - 80334f0: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc - 80334f4: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 80334f8: 2b00 cmp r3, #0 - 80334fa: d008 beq.n 803350e + 8033574: f8d7 30dc ldr.w r3, [r7, #220] ; 0xdc + 8033578: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 803357c: 2b00 cmp r3, #0 + 803357e: d008 beq.n 8033592 { if (huart->TxISR != NULL) - 80334fc: 687b ldr r3, [r7, #4] - 80334fe: 6f5b ldr r3, [r3, #116] ; 0x74 - 8033500: 2b00 cmp r3, #0 - 8033502: d03a beq.n 803357a + 8033580: 687b ldr r3, [r7, #4] + 8033582: 6f5b ldr r3, [r3, #116] ; 0x74 + 8033584: 2b00 cmp r3, #0 + 8033586: d03a beq.n 80335fe { huart->TxISR(huart); - 8033504: 687b ldr r3, [r7, #4] - 8033506: 6f5b ldr r3, [r3, #116] ; 0x74 - 8033508: 6878 ldr r0, [r7, #4] - 803350a: 4798 blx r3 + 8033588: 687b ldr r3, [r7, #4] + 803358a: 6f5b ldr r3, [r3, #116] ; 0x74 + 803358c: 6878 ldr r0, [r7, #4] + 803358e: 4798 blx r3 } return; - 803350c: e035 b.n 803357a + 8033590: e035 b.n 80335fe } /* UART in mode Transmitter (transmission end) -----------------------------*/ if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) - 803350e: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8033512: f003 0340 and.w r3, r3, #64 ; 0x40 - 8033516: 2b00 cmp r3, #0 - 8033518: d009 beq.n 803352e - 803351a: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 803351e: f003 0340 and.w r3, r3, #64 ; 0x40 - 8033522: 2b00 cmp r3, #0 - 8033524: d003 beq.n 803352e + 8033592: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 8033596: f003 0340 and.w r3, r3, #64 ; 0x40 + 803359a: 2b00 cmp r3, #0 + 803359c: d009 beq.n 80335b2 + 803359e: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 80335a2: f003 0340 and.w r3, r3, #64 ; 0x40 + 80335a6: 2b00 cmp r3, #0 + 80335a8: d003 beq.n 80335b2 { UART_EndTransmit_IT(huart); - 8033526: 6878 ldr r0, [r7, #4] - 8033528: f001 f9ed bl 8034906 + 80335aa: 6878 ldr r0, [r7, #4] + 80335ac: f001 f9ed bl 803498a return; - 803352c: e026 b.n 803357c + 80335b0: e026 b.n 8033600 } /* UART TX Fifo Empty occurred ----------------------------------------------*/ if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U)) - 803352e: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8033532: f403 0300 and.w r3, r3, #8388608 ; 0x800000 - 8033536: 2b00 cmp r3, #0 - 8033538: d009 beq.n 803354e - 803353a: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 803353e: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 - 8033542: 2b00 cmp r3, #0 - 8033544: d003 beq.n 803354e + 80335b2: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 80335b6: f403 0300 and.w r3, r3, #8388608 ; 0x800000 + 80335ba: 2b00 cmp r3, #0 + 80335bc: d009 beq.n 80335d2 + 80335be: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 80335c2: f003 4380 and.w r3, r3, #1073741824 ; 0x40000000 + 80335c6: 2b00 cmp r3, #0 + 80335c8: d003 beq.n 80335d2 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Tx Fifo Empty Callback */ huart->TxFifoEmptyCallback(huart); #else /* Call legacy weak Tx Fifo Empty Callback */ HAL_UARTEx_TxFifoEmptyCallback(huart); - 8033546: 6878 ldr r0, [r7, #4] - 8033548: f001 fe78 bl 803523c + 80335ca: 6878 ldr r0, [r7, #4] + 80335cc: f001 fe78 bl 80352c0 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; - 803354c: e016 b.n 803357c + 80335d0: e016 b.n 8033600 } /* UART RX Fifo Full occurred ----------------------------------------------*/ if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U)) - 803354e: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 - 8033552: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 - 8033556: 2b00 cmp r3, #0 - 8033558: d010 beq.n 803357c - 803355a: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 - 803355e: 2b00 cmp r3, #0 - 8033560: da0c bge.n 803357c + 80335d2: f8d7 30e4 ldr.w r3, [r7, #228] ; 0xe4 + 80335d6: f003 7380 and.w r3, r3, #16777216 ; 0x1000000 + 80335da: 2b00 cmp r3, #0 + 80335dc: d010 beq.n 8033600 + 80335de: f8d7 30e0 ldr.w r3, [r7, #224] ; 0xe0 + 80335e2: 2b00 cmp r3, #0 + 80335e4: da0c bge.n 8033600 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Rx Fifo Full Callback */ huart->RxFifoFullCallback(huart); #else /* Call legacy weak Rx Fifo Full Callback */ HAL_UARTEx_RxFifoFullCallback(huart); - 8033562: 6878 ldr r0, [r7, #4] - 8033564: f001 fe60 bl 8035228 + 80335e6: 6878 ldr r0, [r7, #4] + 80335e8: f001 fe60 bl 80352ac #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; - 8033568: e008 b.n 803357c + 80335ec: e008 b.n 8033600 return; - 803356a: bf00 nop - 803356c: e006 b.n 803357c + 80335ee: bf00 nop + 80335f0: e006 b.n 8033600 return; - 803356e: bf00 nop - 8033570: e004 b.n 803357c + 80335f2: bf00 nop + 80335f4: e004 b.n 8033600 return; - 8033572: bf00 nop - 8033574: e002 b.n 803357c + 80335f6: bf00 nop + 80335f8: e002 b.n 8033600 return; - 8033576: bf00 nop - 8033578: e000 b.n 803357c + 80335fa: bf00 nop + 80335fc: e000 b.n 8033600 return; - 803357a: bf00 nop + 80335fe: bf00 nop } } - 803357c: 37e8 adds r7, #232 ; 0xe8 - 803357e: 46bd mov sp, r7 - 8033580: bd80 pop {r7, pc} - 8033582: bf00 nop - 8033584: effffffe .word 0xeffffffe + 8033600: 37e8 adds r7, #232 ; 0xe8 + 8033602: 46bd mov sp, r7 + 8033604: bd80 pop {r7, pc} + 8033606: bf00 nop + 8033608: effffffe .word 0xeffffffe -08033588 : +0803360c : * @brief Tx Half Transfer completed callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) { - 8033588: b480 push {r7} - 803358a: b083 sub sp, #12 - 803358c: af00 add r7, sp, #0 - 803358e: 6078 str r0, [r7, #4] + 803360c: b480 push {r7} + 803360e: b083 sub sp, #12 + 8033610: af00 add r7, sp, #0 + 8033612: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxHalfCpltCallback can be implemented in the user file. */ } - 8033590: bf00 nop - 8033592: 370c adds r7, #12 - 8033594: 46bd mov sp, r7 - 8033596: f85d 7b04 ldr.w r7, [sp], #4 - 803359a: 4770 bx lr + 8033614: bf00 nop + 8033616: 370c adds r7, #12 + 8033618: 46bd mov sp, r7 + 803361a: f85d 7b04 ldr.w r7, [sp], #4 + 803361e: 4770 bx lr -0803359c : +08033620 : * @brief UART error callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 803359c: b480 push {r7} - 803359e: b083 sub sp, #12 - 80335a0: af00 add r7, sp, #0 - 80335a2: 6078 str r0, [r7, #4] + 8033620: b480 push {r7} + 8033622: b083 sub sp, #12 + 8033624: af00 add r7, sp, #0 + 8033626: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback can be implemented in the user file. */ } - 80335a4: bf00 nop - 80335a6: 370c adds r7, #12 - 80335a8: 46bd mov sp, r7 - 80335aa: f85d 7b04 ldr.w r7, [sp], #4 - 80335ae: 4770 bx lr + 8033628: bf00 nop + 803362a: 370c adds r7, #12 + 803362c: 46bd mov sp, r7 + 803362e: f85d 7b04 ldr.w r7, [sp], #4 + 8033632: 4770 bx lr -080335b0 : +08033634 : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { - 80335b0: b480 push {r7} - 80335b2: b083 sub sp, #12 - 80335b4: af00 add r7, sp, #0 - 80335b6: 6078 str r0, [r7, #4] - 80335b8: 460b mov r3, r1 - 80335ba: 807b strh r3, [r7, #2] + 8033634: b480 push {r7} + 8033636: b083 sub sp, #12 + 8033638: af00 add r7, sp, #0 + 803363a: 6078 str r0, [r7, #4] + 803363c: 460b mov r3, r1 + 803363e: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } - 80335bc: bf00 nop - 80335be: 370c adds r7, #12 - 80335c0: 46bd mov sp, r7 - 80335c2: f85d 7b04 ldr.w r7, [sp], #4 - 80335c6: 4770 bx lr + 8033640: bf00 nop + 8033642: 370c adds r7, #12 + 8033644: 46bd mov sp, r7 + 8033646: f85d 7b04 ldr.w r7, [sp], #4 + 803364a: 4770 bx lr -080335c8 : +0803364c : * @brief Configure the UART peripheral. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) { - 80335c8: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} - 80335cc: b092 sub sp, #72 ; 0x48 - 80335ce: af00 add r7, sp, #0 - 80335d0: 6178 str r0, [r7, #20] + 803364c: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 8033650: b092 sub sp, #72 ; 0x48 + 8033652: af00 add r7, sp, #0 + 8033654: 6178 str r0, [r7, #20] uint32_t tmpreg; uint16_t brrtemp; UART_ClockSourceTypeDef clocksource; uint32_t usartdiv; HAL_StatusTypeDef ret = HAL_OK; - 80335d2: 2300 movs r3, #0 - 80335d4: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033656: 2300 movs r3, #0 + 8033658: f887 3042 strb.w r3, [r7, #66] ; 0x42 * the UART Word Length, Parity, Mode and oversampling: * set the M bits according to huart->Init.WordLength value * set PCE and PS bits according to huart->Init.Parity value * set TE and RE bits according to huart->Init.Mode value * set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 80335d8: 697b ldr r3, [r7, #20] - 80335da: 689a ldr r2, [r3, #8] - 80335dc: 697b ldr r3, [r7, #20] - 80335de: 691b ldr r3, [r3, #16] - 80335e0: 431a orrs r2, r3 - 80335e2: 697b ldr r3, [r7, #20] - 80335e4: 695b ldr r3, [r3, #20] - 80335e6: 431a orrs r2, r3 - 80335e8: 697b ldr r3, [r7, #20] - 80335ea: 69db ldr r3, [r3, #28] - 80335ec: 4313 orrs r3, r2 - 80335ee: 647b str r3, [r7, #68] ; 0x44 + 803365c: 697b ldr r3, [r7, #20] + 803365e: 689a ldr r2, [r3, #8] + 8033660: 697b ldr r3, [r7, #20] + 8033662: 691b ldr r3, [r3, #16] + 8033664: 431a orrs r2, r3 + 8033666: 697b ldr r3, [r7, #20] + 8033668: 695b ldr r3, [r3, #20] + 803366a: 431a orrs r2, r3 + 803366c: 697b ldr r3, [r7, #20] + 803366e: 69db ldr r3, [r3, #28] + 8033670: 4313 orrs r3, r2 + 8033672: 647b str r3, [r7, #68] ; 0x44 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 80335f0: 697b ldr r3, [r7, #20] - 80335f2: 681b ldr r3, [r3, #0] - 80335f4: 681a ldr r2, [r3, #0] - 80335f6: 4bbe ldr r3, [pc, #760] ; (80338f0 ) - 80335f8: 4013 ands r3, r2 - 80335fa: 697a ldr r2, [r7, #20] - 80335fc: 6812 ldr r2, [r2, #0] - 80335fe: 6c79 ldr r1, [r7, #68] ; 0x44 - 8033600: 430b orrs r3, r1 - 8033602: 6013 str r3, [r2, #0] + 8033674: 697b ldr r3, [r7, #20] + 8033676: 681b ldr r3, [r3, #0] + 8033678: 681a ldr r2, [r3, #0] + 803367a: 4bbe ldr r3, [pc, #760] ; (8033974 ) + 803367c: 4013 ands r3, r2 + 803367e: 697a ldr r2, [r7, #20] + 8033680: 6812 ldr r2, [r2, #0] + 8033682: 6c79 ldr r1, [r7, #68] ; 0x44 + 8033684: 430b orrs r3, r1 + 8033686: 6013 str r3, [r2, #0] /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8033604: 697b ldr r3, [r7, #20] - 8033606: 681b ldr r3, [r3, #0] - 8033608: 685b ldr r3, [r3, #4] - 803360a: f423 5140 bic.w r1, r3, #12288 ; 0x3000 - 803360e: 697b ldr r3, [r7, #20] - 8033610: 68da ldr r2, [r3, #12] - 8033612: 697b ldr r3, [r7, #20] - 8033614: 681b ldr r3, [r3, #0] - 8033616: 430a orrs r2, r1 - 8033618: 605a str r2, [r3, #4] + 8033688: 697b ldr r3, [r7, #20] + 803368a: 681b ldr r3, [r3, #0] + 803368c: 685b ldr r3, [r3, #4] + 803368e: f423 5140 bic.w r1, r3, #12288 ; 0x3000 + 8033692: 697b ldr r3, [r7, #20] + 8033694: 68da ldr r2, [r3, #12] + 8033696: 697b ldr r3, [r7, #20] + 8033698: 681b ldr r3, [r3, #0] + 803369a: 430a orrs r2, r1 + 803369c: 605a str r2, [r3, #4] /* Configure * - UART HardWare Flow Control: set CTSE and RTSE bits according * to huart->Init.HwFlowCtl value * - one-bit sampling method versus three samples' majority rule according * to huart->Init.OneBitSampling (not applicable to LPUART) */ tmpreg = (uint32_t)huart->Init.HwFlowCtl; - 803361a: 697b ldr r3, [r7, #20] - 803361c: 699b ldr r3, [r3, #24] - 803361e: 647b str r3, [r7, #68] ; 0x44 + 803369e: 697b ldr r3, [r7, #20] + 80336a0: 699b ldr r3, [r3, #24] + 80336a2: 647b str r3, [r7, #68] ; 0x44 if (!(UART_INSTANCE_LOWPOWER(huart))) - 8033620: 697b ldr r3, [r7, #20] - 8033622: 681b ldr r3, [r3, #0] - 8033624: 4ab3 ldr r2, [pc, #716] ; (80338f4 ) - 8033626: 4293 cmp r3, r2 - 8033628: d004 beq.n 8033634 + 80336a4: 697b ldr r3, [r7, #20] + 80336a6: 681b ldr r3, [r3, #0] + 80336a8: 4ab3 ldr r2, [pc, #716] ; (8033978 ) + 80336aa: 4293 cmp r3, r2 + 80336ac: d004 beq.n 80336b8 { tmpreg |= huart->Init.OneBitSampling; - 803362a: 697b ldr r3, [r7, #20] - 803362c: 6a1b ldr r3, [r3, #32] - 803362e: 6c7a ldr r2, [r7, #68] ; 0x44 - 8033630: 4313 orrs r3, r2 - 8033632: 647b str r3, [r7, #68] ; 0x44 + 80336ae: 697b ldr r3, [r7, #20] + 80336b0: 6a1b ldr r3, [r3, #32] + 80336b2: 6c7a ldr r2, [r7, #68] ; 0x44 + 80336b4: 4313 orrs r3, r2 + 80336b6: 647b str r3, [r7, #68] ; 0x44 } MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 8033634: 697b ldr r3, [r7, #20] - 8033636: 681b ldr r3, [r3, #0] - 8033638: 689a ldr r2, [r3, #8] - 803363a: 4baf ldr r3, [pc, #700] ; (80338f8 ) - 803363c: 4013 ands r3, r2 - 803363e: 697a ldr r2, [r7, #20] - 8033640: 6812 ldr r2, [r2, #0] - 8033642: 6c79 ldr r1, [r7, #68] ; 0x44 - 8033644: 430b orrs r3, r1 - 8033646: 6093 str r3, [r2, #8] + 80336b8: 697b ldr r3, [r7, #20] + 80336ba: 681b ldr r3, [r3, #0] + 80336bc: 689a ldr r2, [r3, #8] + 80336be: 4baf ldr r3, [pc, #700] ; (803397c ) + 80336c0: 4013 ands r3, r2 + 80336c2: 697a ldr r2, [r7, #20] + 80336c4: 6812 ldr r2, [r2, #0] + 80336c6: 6c79 ldr r1, [r7, #68] ; 0x44 + 80336c8: 430b orrs r3, r1 + 80336ca: 6093 str r3, [r2, #8] /*-------------------------- USART PRESC Configuration -----------------------*/ /* Configure * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */ MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler); - 8033648: 697b ldr r3, [r7, #20] - 803364a: 681b ldr r3, [r3, #0] - 803364c: 6adb ldr r3, [r3, #44] ; 0x2c - 803364e: f023 010f bic.w r1, r3, #15 - 8033652: 697b ldr r3, [r7, #20] - 8033654: 6a5a ldr r2, [r3, #36] ; 0x24 - 8033656: 697b ldr r3, [r7, #20] - 8033658: 681b ldr r3, [r3, #0] - 803365a: 430a orrs r2, r1 - 803365c: 62da str r2, [r3, #44] ; 0x2c + 80336cc: 697b ldr r3, [r7, #20] + 80336ce: 681b ldr r3, [r3, #0] + 80336d0: 6adb ldr r3, [r3, #44] ; 0x2c + 80336d2: f023 010f bic.w r1, r3, #15 + 80336d6: 697b ldr r3, [r7, #20] + 80336d8: 6a5a ldr r2, [r3, #36] ; 0x24 + 80336da: 697b ldr r3, [r7, #20] + 80336dc: 681b ldr r3, [r3, #0] + 80336de: 430a orrs r2, r1 + 80336e0: 62da str r2, [r3, #44] ; 0x2c /*-------------------------- USART BRR Configuration -----------------------*/ UART_GETCLOCKSOURCE(huart, clocksource); - 803365e: 697b ldr r3, [r7, #20] - 8033660: 681b ldr r3, [r3, #0] - 8033662: 4aa6 ldr r2, [pc, #664] ; (80338fc ) - 8033664: 4293 cmp r3, r2 - 8033666: d177 bne.n 8033758 - 8033668: 4ba5 ldr r3, [pc, #660] ; (8033900 ) - 803366a: 6d5b ldr r3, [r3, #84] ; 0x54 - 803366c: f003 0338 and.w r3, r3, #56 ; 0x38 - 8033670: 2b28 cmp r3, #40 ; 0x28 - 8033672: d86d bhi.n 8033750 - 8033674: a201 add r2, pc, #4 ; (adr r2, 803367c ) - 8033676: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 803367a: bf00 nop - 803367c: 08033721 .word 0x08033721 - 8033680: 08033751 .word 0x08033751 - 8033684: 08033751 .word 0x08033751 - 8033688: 08033751 .word 0x08033751 - 803368c: 08033751 .word 0x08033751 - 8033690: 08033751 .word 0x08033751 - 8033694: 08033751 .word 0x08033751 - 8033698: 08033751 .word 0x08033751 - 803369c: 08033729 .word 0x08033729 - 80336a0: 08033751 .word 0x08033751 - 80336a4: 08033751 .word 0x08033751 - 80336a8: 08033751 .word 0x08033751 - 80336ac: 08033751 .word 0x08033751 - 80336b0: 08033751 .word 0x08033751 - 80336b4: 08033751 .word 0x08033751 - 80336b8: 08033751 .word 0x08033751 - 80336bc: 08033731 .word 0x08033731 - 80336c0: 08033751 .word 0x08033751 - 80336c4: 08033751 .word 0x08033751 - 80336c8: 08033751 .word 0x08033751 - 80336cc: 08033751 .word 0x08033751 - 80336d0: 08033751 .word 0x08033751 - 80336d4: 08033751 .word 0x08033751 - 80336d8: 08033751 .word 0x08033751 - 80336dc: 08033739 .word 0x08033739 - 80336e0: 08033751 .word 0x08033751 - 80336e4: 08033751 .word 0x08033751 - 80336e8: 08033751 .word 0x08033751 - 80336ec: 08033751 .word 0x08033751 - 80336f0: 08033751 .word 0x08033751 - 80336f4: 08033751 .word 0x08033751 - 80336f8: 08033751 .word 0x08033751 - 80336fc: 08033741 .word 0x08033741 - 8033700: 08033751 .word 0x08033751 - 8033704: 08033751 .word 0x08033751 - 8033708: 08033751 .word 0x08033751 - 803370c: 08033751 .word 0x08033751 - 8033710: 08033751 .word 0x08033751 - 8033714: 08033751 .word 0x08033751 - 8033718: 08033751 .word 0x08033751 - 803371c: 08033749 .word 0x08033749 - 8033720: 2301 movs r3, #1 - 8033722: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033726: e222 b.n 8033b6e - 8033728: 2304 movs r3, #4 - 803372a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803372e: e21e b.n 8033b6e - 8033730: 2308 movs r3, #8 - 8033732: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033736: e21a b.n 8033b6e - 8033738: 2310 movs r3, #16 - 803373a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803373e: e216 b.n 8033b6e - 8033740: 2320 movs r3, #32 - 8033742: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033746: e212 b.n 8033b6e - 8033748: 2340 movs r3, #64 ; 0x40 - 803374a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803374e: e20e b.n 8033b6e - 8033750: 2380 movs r3, #128 ; 0x80 - 8033752: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033756: e20a b.n 8033b6e - 8033758: 697b ldr r3, [r7, #20] - 803375a: 681b ldr r3, [r3, #0] - 803375c: 4a69 ldr r2, [pc, #420] ; (8033904 ) - 803375e: 4293 cmp r3, r2 - 8033760: d130 bne.n 80337c4 - 8033762: 4b67 ldr r3, [pc, #412] ; (8033900 ) - 8033764: 6d5b ldr r3, [r3, #84] ; 0x54 - 8033766: f003 0307 and.w r3, r3, #7 - 803376a: 2b05 cmp r3, #5 - 803376c: d826 bhi.n 80337bc - 803376e: a201 add r2, pc, #4 ; (adr r2, 8033774 ) - 8033770: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033774: 0803378d .word 0x0803378d - 8033778: 08033795 .word 0x08033795 - 803377c: 0803379d .word 0x0803379d - 8033780: 080337a5 .word 0x080337a5 - 8033784: 080337ad .word 0x080337ad - 8033788: 080337b5 .word 0x080337b5 - 803378c: 2300 movs r3, #0 - 803378e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033792: e1ec b.n 8033b6e - 8033794: 2304 movs r3, #4 - 8033796: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803379a: e1e8 b.n 8033b6e - 803379c: 2308 movs r3, #8 - 803379e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337a2: e1e4 b.n 8033b6e - 80337a4: 2310 movs r3, #16 + 80336e2: 697b ldr r3, [r7, #20] + 80336e4: 681b ldr r3, [r3, #0] + 80336e6: 4aa6 ldr r2, [pc, #664] ; (8033980 ) + 80336e8: 4293 cmp r3, r2 + 80336ea: d177 bne.n 80337dc + 80336ec: 4ba5 ldr r3, [pc, #660] ; (8033984 ) + 80336ee: 6d5b ldr r3, [r3, #84] ; 0x54 + 80336f0: f003 0338 and.w r3, r3, #56 ; 0x38 + 80336f4: 2b28 cmp r3, #40 ; 0x28 + 80336f6: d86d bhi.n 80337d4 + 80336f8: a201 add r2, pc, #4 ; (adr r2, 8033700 ) + 80336fa: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80336fe: bf00 nop + 8033700: 080337a5 .word 0x080337a5 + 8033704: 080337d5 .word 0x080337d5 + 8033708: 080337d5 .word 0x080337d5 + 803370c: 080337d5 .word 0x080337d5 + 8033710: 080337d5 .word 0x080337d5 + 8033714: 080337d5 .word 0x080337d5 + 8033718: 080337d5 .word 0x080337d5 + 803371c: 080337d5 .word 0x080337d5 + 8033720: 080337ad .word 0x080337ad + 8033724: 080337d5 .word 0x080337d5 + 8033728: 080337d5 .word 0x080337d5 + 803372c: 080337d5 .word 0x080337d5 + 8033730: 080337d5 .word 0x080337d5 + 8033734: 080337d5 .word 0x080337d5 + 8033738: 080337d5 .word 0x080337d5 + 803373c: 080337d5 .word 0x080337d5 + 8033740: 080337b5 .word 0x080337b5 + 8033744: 080337d5 .word 0x080337d5 + 8033748: 080337d5 .word 0x080337d5 + 803374c: 080337d5 .word 0x080337d5 + 8033750: 080337d5 .word 0x080337d5 + 8033754: 080337d5 .word 0x080337d5 + 8033758: 080337d5 .word 0x080337d5 + 803375c: 080337d5 .word 0x080337d5 + 8033760: 080337bd .word 0x080337bd + 8033764: 080337d5 .word 0x080337d5 + 8033768: 080337d5 .word 0x080337d5 + 803376c: 080337d5 .word 0x080337d5 + 8033770: 080337d5 .word 0x080337d5 + 8033774: 080337d5 .word 0x080337d5 + 8033778: 080337d5 .word 0x080337d5 + 803377c: 080337d5 .word 0x080337d5 + 8033780: 080337c5 .word 0x080337c5 + 8033784: 080337d5 .word 0x080337d5 + 8033788: 080337d5 .word 0x080337d5 + 803378c: 080337d5 .word 0x080337d5 + 8033790: 080337d5 .word 0x080337d5 + 8033794: 080337d5 .word 0x080337d5 + 8033798: 080337d5 .word 0x080337d5 + 803379c: 080337d5 .word 0x080337d5 + 80337a0: 080337cd .word 0x080337cd + 80337a4: 2301 movs r3, #1 80337a6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337aa: e1e0 b.n 8033b6e - 80337ac: 2320 movs r3, #32 + 80337aa: e222 b.n 8033bf2 + 80337ac: 2304 movs r3, #4 80337ae: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337b2: e1dc b.n 8033b6e - 80337b4: 2340 movs r3, #64 ; 0x40 + 80337b2: e21e b.n 8033bf2 + 80337b4: 2308 movs r3, #8 80337b6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337ba: e1d8 b.n 8033b6e - 80337bc: 2380 movs r3, #128 ; 0x80 + 80337ba: e21a b.n 8033bf2 + 80337bc: 2310 movs r3, #16 80337be: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337c2: e1d4 b.n 8033b6e - 80337c4: 697b ldr r3, [r7, #20] - 80337c6: 681b ldr r3, [r3, #0] - 80337c8: 4a4f ldr r2, [pc, #316] ; (8033908 ) - 80337ca: 4293 cmp r3, r2 - 80337cc: d130 bne.n 8033830 - 80337ce: 4b4c ldr r3, [pc, #304] ; (8033900 ) - 80337d0: 6d5b ldr r3, [r3, #84] ; 0x54 - 80337d2: f003 0307 and.w r3, r3, #7 - 80337d6: 2b05 cmp r3, #5 - 80337d8: d826 bhi.n 8033828 - 80337da: a201 add r2, pc, #4 ; (adr r2, 80337e0 ) - 80337dc: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80337e0: 080337f9 .word 0x080337f9 - 80337e4: 08033801 .word 0x08033801 - 80337e8: 08033809 .word 0x08033809 - 80337ec: 08033811 .word 0x08033811 - 80337f0: 08033819 .word 0x08033819 - 80337f4: 08033821 .word 0x08033821 - 80337f8: 2300 movs r3, #0 - 80337fa: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80337fe: e1b6 b.n 8033b6e - 8033800: 2304 movs r3, #4 - 8033802: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033806: e1b2 b.n 8033b6e - 8033808: 2308 movs r3, #8 - 803380a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803380e: e1ae b.n 8033b6e - 8033810: 2310 movs r3, #16 + 80337c2: e216 b.n 8033bf2 + 80337c4: 2320 movs r3, #32 + 80337c6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80337ca: e212 b.n 8033bf2 + 80337cc: 2340 movs r3, #64 ; 0x40 + 80337ce: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80337d2: e20e b.n 8033bf2 + 80337d4: 2380 movs r3, #128 ; 0x80 + 80337d6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80337da: e20a b.n 8033bf2 + 80337dc: 697b ldr r3, [r7, #20] + 80337de: 681b ldr r3, [r3, #0] + 80337e0: 4a69 ldr r2, [pc, #420] ; (8033988 ) + 80337e2: 4293 cmp r3, r2 + 80337e4: d130 bne.n 8033848 + 80337e6: 4b67 ldr r3, [pc, #412] ; (8033984 ) + 80337e8: 6d5b ldr r3, [r3, #84] ; 0x54 + 80337ea: f003 0307 and.w r3, r3, #7 + 80337ee: 2b05 cmp r3, #5 + 80337f0: d826 bhi.n 8033840 + 80337f2: a201 add r2, pc, #4 ; (adr r2, 80337f8 ) + 80337f4: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80337f8: 08033811 .word 0x08033811 + 80337fc: 08033819 .word 0x08033819 + 8033800: 08033821 .word 0x08033821 + 8033804: 08033829 .word 0x08033829 + 8033808: 08033831 .word 0x08033831 + 803380c: 08033839 .word 0x08033839 + 8033810: 2300 movs r3, #0 8033812: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033816: e1aa b.n 8033b6e - 8033818: 2320 movs r3, #32 + 8033816: e1ec b.n 8033bf2 + 8033818: 2304 movs r3, #4 803381a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803381e: e1a6 b.n 8033b6e - 8033820: 2340 movs r3, #64 ; 0x40 + 803381e: e1e8 b.n 8033bf2 + 8033820: 2308 movs r3, #8 8033822: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033826: e1a2 b.n 8033b6e - 8033828: 2380 movs r3, #128 ; 0x80 + 8033826: e1e4 b.n 8033bf2 + 8033828: 2310 movs r3, #16 803382a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803382e: e19e b.n 8033b6e - 8033830: 697b ldr r3, [r7, #20] - 8033832: 681b ldr r3, [r3, #0] - 8033834: 4a35 ldr r2, [pc, #212] ; (803390c ) - 8033836: 4293 cmp r3, r2 - 8033838: d130 bne.n 803389c - 803383a: 4b31 ldr r3, [pc, #196] ; (8033900 ) - 803383c: 6d5b ldr r3, [r3, #84] ; 0x54 - 803383e: f003 0307 and.w r3, r3, #7 - 8033842: 2b05 cmp r3, #5 - 8033844: d826 bhi.n 8033894 - 8033846: a201 add r2, pc, #4 ; (adr r2, 803384c ) - 8033848: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 803384c: 08033865 .word 0x08033865 - 8033850: 0803386d .word 0x0803386d - 8033854: 08033875 .word 0x08033875 - 8033858: 0803387d .word 0x0803387d - 803385c: 08033885 .word 0x08033885 - 8033860: 0803388d .word 0x0803388d - 8033864: 2300 movs r3, #0 - 8033866: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803386a: e180 b.n 8033b6e - 803386c: 2304 movs r3, #4 - 803386e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033872: e17c b.n 8033b6e - 8033874: 2308 movs r3, #8 - 8033876: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803387a: e178 b.n 8033b6e - 803387c: 2310 movs r3, #16 + 803382e: e1e0 b.n 8033bf2 + 8033830: 2320 movs r3, #32 + 8033832: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033836: e1dc b.n 8033bf2 + 8033838: 2340 movs r3, #64 ; 0x40 + 803383a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803383e: e1d8 b.n 8033bf2 + 8033840: 2380 movs r3, #128 ; 0x80 + 8033842: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033846: e1d4 b.n 8033bf2 + 8033848: 697b ldr r3, [r7, #20] + 803384a: 681b ldr r3, [r3, #0] + 803384c: 4a4f ldr r2, [pc, #316] ; (803398c ) + 803384e: 4293 cmp r3, r2 + 8033850: d130 bne.n 80338b4 + 8033852: 4b4c ldr r3, [pc, #304] ; (8033984 ) + 8033854: 6d5b ldr r3, [r3, #84] ; 0x54 + 8033856: f003 0307 and.w r3, r3, #7 + 803385a: 2b05 cmp r3, #5 + 803385c: d826 bhi.n 80338ac + 803385e: a201 add r2, pc, #4 ; (adr r2, 8033864 ) + 8033860: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033864: 0803387d .word 0x0803387d + 8033868: 08033885 .word 0x08033885 + 803386c: 0803388d .word 0x0803388d + 8033870: 08033895 .word 0x08033895 + 8033874: 0803389d .word 0x0803389d + 8033878: 080338a5 .word 0x080338a5 + 803387c: 2300 movs r3, #0 803387e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033882: e174 b.n 8033b6e - 8033884: 2320 movs r3, #32 + 8033882: e1b6 b.n 8033bf2 + 8033884: 2304 movs r3, #4 8033886: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803388a: e170 b.n 8033b6e - 803388c: 2340 movs r3, #64 ; 0x40 + 803388a: e1b2 b.n 8033bf2 + 803388c: 2308 movs r3, #8 803388e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033892: e16c b.n 8033b6e - 8033894: 2380 movs r3, #128 ; 0x80 + 8033892: e1ae b.n 8033bf2 + 8033894: 2310 movs r3, #16 8033896: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803389a: e168 b.n 8033b6e - 803389c: 697b ldr r3, [r7, #20] - 803389e: 681b ldr r3, [r3, #0] - 80338a0: 4a1b ldr r2, [pc, #108] ; (8033910 ) - 80338a2: 4293 cmp r3, r2 - 80338a4: d142 bne.n 803392c - 80338a6: 4b16 ldr r3, [pc, #88] ; (8033900 ) - 80338a8: 6d5b ldr r3, [r3, #84] ; 0x54 - 80338aa: f003 0307 and.w r3, r3, #7 - 80338ae: 2b05 cmp r3, #5 - 80338b0: d838 bhi.n 8033924 - 80338b2: a201 add r2, pc, #4 ; (adr r2, 80338b8 ) - 80338b4: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80338b8: 080338d1 .word 0x080338d1 - 80338bc: 080338d9 .word 0x080338d9 - 80338c0: 080338e1 .word 0x080338e1 - 80338c4: 080338e9 .word 0x080338e9 - 80338c8: 08033915 .word 0x08033915 - 80338cc: 0803391d .word 0x0803391d - 80338d0: 2300 movs r3, #0 - 80338d2: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338d6: e14a b.n 8033b6e - 80338d8: 2304 movs r3, #4 - 80338da: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338de: e146 b.n 8033b6e - 80338e0: 2308 movs r3, #8 - 80338e2: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338e6: e142 b.n 8033b6e - 80338e8: 2310 movs r3, #16 + 803389a: e1aa b.n 8033bf2 + 803389c: 2320 movs r3, #32 + 803389e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80338a2: e1a6 b.n 8033bf2 + 80338a4: 2340 movs r3, #64 ; 0x40 + 80338a6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80338aa: e1a2 b.n 8033bf2 + 80338ac: 2380 movs r3, #128 ; 0x80 + 80338ae: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80338b2: e19e b.n 8033bf2 + 80338b4: 697b ldr r3, [r7, #20] + 80338b6: 681b ldr r3, [r3, #0] + 80338b8: 4a35 ldr r2, [pc, #212] ; (8033990 ) + 80338ba: 4293 cmp r3, r2 + 80338bc: d130 bne.n 8033920 + 80338be: 4b31 ldr r3, [pc, #196] ; (8033984 ) + 80338c0: 6d5b ldr r3, [r3, #84] ; 0x54 + 80338c2: f003 0307 and.w r3, r3, #7 + 80338c6: 2b05 cmp r3, #5 + 80338c8: d826 bhi.n 8033918 + 80338ca: a201 add r2, pc, #4 ; (adr r2, 80338d0 ) + 80338cc: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80338d0: 080338e9 .word 0x080338e9 + 80338d4: 080338f1 .word 0x080338f1 + 80338d8: 080338f9 .word 0x080338f9 + 80338dc: 08033901 .word 0x08033901 + 80338e0: 08033909 .word 0x08033909 + 80338e4: 08033911 .word 0x08033911 + 80338e8: 2300 movs r3, #0 80338ea: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80338ee: e13e b.n 8033b6e - 80338f0: cfff69f3 .word 0xcfff69f3 - 80338f4: 58000c00 .word 0x58000c00 - 80338f8: 11fff4ff .word 0x11fff4ff - 80338fc: 40011000 .word 0x40011000 - 8033900: 58024400 .word 0x58024400 - 8033904: 40004400 .word 0x40004400 - 8033908: 40004800 .word 0x40004800 - 803390c: 40004c00 .word 0x40004c00 - 8033910: 40005000 .word 0x40005000 - 8033914: 2320 movs r3, #32 - 8033916: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803391a: e128 b.n 8033b6e - 803391c: 2340 movs r3, #64 ; 0x40 - 803391e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033922: e124 b.n 8033b6e - 8033924: 2380 movs r3, #128 ; 0x80 - 8033926: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 803392a: e120 b.n 8033b6e - 803392c: 697b ldr r3, [r7, #20] - 803392e: 681b ldr r3, [r3, #0] - 8033930: 4acb ldr r2, [pc, #812] ; (8033c60 ) - 8033932: 4293 cmp r3, r2 - 8033934: d176 bne.n 8033a24 - 8033936: 4bcb ldr r3, [pc, #812] ; (8033c64 ) - 8033938: 6d5b ldr r3, [r3, #84] ; 0x54 - 803393a: f003 0338 and.w r3, r3, #56 ; 0x38 - 803393e: 2b28 cmp r3, #40 ; 0x28 - 8033940: d86c bhi.n 8033a1c - 8033942: a201 add r2, pc, #4 ; (adr r2, 8033948 ) - 8033944: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033948: 080339ed .word 0x080339ed - 803394c: 08033a1d .word 0x08033a1d - 8033950: 08033a1d .word 0x08033a1d - 8033954: 08033a1d .word 0x08033a1d - 8033958: 08033a1d .word 0x08033a1d - 803395c: 08033a1d .word 0x08033a1d - 8033960: 08033a1d .word 0x08033a1d - 8033964: 08033a1d .word 0x08033a1d - 8033968: 080339f5 .word 0x080339f5 - 803396c: 08033a1d .word 0x08033a1d - 8033970: 08033a1d .word 0x08033a1d - 8033974: 08033a1d .word 0x08033a1d - 8033978: 08033a1d .word 0x08033a1d - 803397c: 08033a1d .word 0x08033a1d - 8033980: 08033a1d .word 0x08033a1d - 8033984: 08033a1d .word 0x08033a1d - 8033988: 080339fd .word 0x080339fd - 803398c: 08033a1d .word 0x08033a1d - 8033990: 08033a1d .word 0x08033a1d - 8033994: 08033a1d .word 0x08033a1d - 8033998: 08033a1d .word 0x08033a1d - 803399c: 08033a1d .word 0x08033a1d - 80339a0: 08033a1d .word 0x08033a1d - 80339a4: 08033a1d .word 0x08033a1d - 80339a8: 08033a05 .word 0x08033a05 - 80339ac: 08033a1d .word 0x08033a1d - 80339b0: 08033a1d .word 0x08033a1d - 80339b4: 08033a1d .word 0x08033a1d - 80339b8: 08033a1d .word 0x08033a1d - 80339bc: 08033a1d .word 0x08033a1d - 80339c0: 08033a1d .word 0x08033a1d - 80339c4: 08033a1d .word 0x08033a1d - 80339c8: 08033a0d .word 0x08033a0d - 80339cc: 08033a1d .word 0x08033a1d - 80339d0: 08033a1d .word 0x08033a1d - 80339d4: 08033a1d .word 0x08033a1d - 80339d8: 08033a1d .word 0x08033a1d - 80339dc: 08033a1d .word 0x08033a1d - 80339e0: 08033a1d .word 0x08033a1d - 80339e4: 08033a1d .word 0x08033a1d - 80339e8: 08033a15 .word 0x08033a15 - 80339ec: 2301 movs r3, #1 - 80339ee: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80339f2: e0bc b.n 8033b6e - 80339f4: 2304 movs r3, #4 - 80339f6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 80339fa: e0b8 b.n 8033b6e - 80339fc: 2308 movs r3, #8 - 80339fe: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a02: e0b4 b.n 8033b6e - 8033a04: 2310 movs r3, #16 - 8033a06: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a0a: e0b0 b.n 8033b6e - 8033a0c: 2320 movs r3, #32 - 8033a0e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a12: e0ac b.n 8033b6e - 8033a14: 2340 movs r3, #64 ; 0x40 - 8033a16: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a1a: e0a8 b.n 8033b6e - 8033a1c: 2380 movs r3, #128 ; 0x80 - 8033a1e: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a22: e0a4 b.n 8033b6e - 8033a24: 697b ldr r3, [r7, #20] - 8033a26: 681b ldr r3, [r3, #0] - 8033a28: 4a8f ldr r2, [pc, #572] ; (8033c68 ) - 8033a2a: 4293 cmp r3, r2 - 8033a2c: d130 bne.n 8033a90 - 8033a2e: 4b8d ldr r3, [pc, #564] ; (8033c64 ) - 8033a30: 6d5b ldr r3, [r3, #84] ; 0x54 - 8033a32: f003 0307 and.w r3, r3, #7 - 8033a36: 2b05 cmp r3, #5 - 8033a38: d826 bhi.n 8033a88 - 8033a3a: a201 add r2, pc, #4 ; (adr r2, 8033a40 ) - 8033a3c: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033a40: 08033a59 .word 0x08033a59 - 8033a44: 08033a61 .word 0x08033a61 - 8033a48: 08033a69 .word 0x08033a69 - 8033a4c: 08033a71 .word 0x08033a71 - 8033a50: 08033a79 .word 0x08033a79 - 8033a54: 08033a81 .word 0x08033a81 - 8033a58: 2300 movs r3, #0 - 8033a5a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a5e: e086 b.n 8033b6e - 8033a60: 2304 movs r3, #4 - 8033a62: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a66: e082 b.n 8033b6e - 8033a68: 2308 movs r3, #8 - 8033a6a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a6e: e07e b.n 8033b6e - 8033a70: 2310 movs r3, #16 + 80338ee: e180 b.n 8033bf2 + 80338f0: 2304 movs r3, #4 + 80338f2: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80338f6: e17c b.n 8033bf2 + 80338f8: 2308 movs r3, #8 + 80338fa: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80338fe: e178 b.n 8033bf2 + 8033900: 2310 movs r3, #16 + 8033902: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033906: e174 b.n 8033bf2 + 8033908: 2320 movs r3, #32 + 803390a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803390e: e170 b.n 8033bf2 + 8033910: 2340 movs r3, #64 ; 0x40 + 8033912: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033916: e16c b.n 8033bf2 + 8033918: 2380 movs r3, #128 ; 0x80 + 803391a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803391e: e168 b.n 8033bf2 + 8033920: 697b ldr r3, [r7, #20] + 8033922: 681b ldr r3, [r3, #0] + 8033924: 4a1b ldr r2, [pc, #108] ; (8033994 ) + 8033926: 4293 cmp r3, r2 + 8033928: d142 bne.n 80339b0 + 803392a: 4b16 ldr r3, [pc, #88] ; (8033984 ) + 803392c: 6d5b ldr r3, [r3, #84] ; 0x54 + 803392e: f003 0307 and.w r3, r3, #7 + 8033932: 2b05 cmp r3, #5 + 8033934: d838 bhi.n 80339a8 + 8033936: a201 add r2, pc, #4 ; (adr r2, 803393c ) + 8033938: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 803393c: 08033955 .word 0x08033955 + 8033940: 0803395d .word 0x0803395d + 8033944: 08033965 .word 0x08033965 + 8033948: 0803396d .word 0x0803396d + 803394c: 08033999 .word 0x08033999 + 8033950: 080339a1 .word 0x080339a1 + 8033954: 2300 movs r3, #0 + 8033956: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803395a: e14a b.n 8033bf2 + 803395c: 2304 movs r3, #4 + 803395e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033962: e146 b.n 8033bf2 + 8033964: 2308 movs r3, #8 + 8033966: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803396a: e142 b.n 8033bf2 + 803396c: 2310 movs r3, #16 + 803396e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033972: e13e b.n 8033bf2 + 8033974: cfff69f3 .word 0xcfff69f3 + 8033978: 58000c00 .word 0x58000c00 + 803397c: 11fff4ff .word 0x11fff4ff + 8033980: 40011000 .word 0x40011000 + 8033984: 58024400 .word 0x58024400 + 8033988: 40004400 .word 0x40004400 + 803398c: 40004800 .word 0x40004800 + 8033990: 40004c00 .word 0x40004c00 + 8033994: 40005000 .word 0x40005000 + 8033998: 2320 movs r3, #32 + 803399a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 803399e: e128 b.n 8033bf2 + 80339a0: 2340 movs r3, #64 ; 0x40 + 80339a2: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80339a6: e124 b.n 8033bf2 + 80339a8: 2380 movs r3, #128 ; 0x80 + 80339aa: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 80339ae: e120 b.n 8033bf2 + 80339b0: 697b ldr r3, [r7, #20] + 80339b2: 681b ldr r3, [r3, #0] + 80339b4: 4acb ldr r2, [pc, #812] ; (8033ce4 ) + 80339b6: 4293 cmp r3, r2 + 80339b8: d176 bne.n 8033aa8 + 80339ba: 4bcb ldr r3, [pc, #812] ; (8033ce8 ) + 80339bc: 6d5b ldr r3, [r3, #84] ; 0x54 + 80339be: f003 0338 and.w r3, r3, #56 ; 0x38 + 80339c2: 2b28 cmp r3, #40 ; 0x28 + 80339c4: d86c bhi.n 8033aa0 + 80339c6: a201 add r2, pc, #4 ; (adr r2, 80339cc ) + 80339c8: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80339cc: 08033a71 .word 0x08033a71 + 80339d0: 08033aa1 .word 0x08033aa1 + 80339d4: 08033aa1 .word 0x08033aa1 + 80339d8: 08033aa1 .word 0x08033aa1 + 80339dc: 08033aa1 .word 0x08033aa1 + 80339e0: 08033aa1 .word 0x08033aa1 + 80339e4: 08033aa1 .word 0x08033aa1 + 80339e8: 08033aa1 .word 0x08033aa1 + 80339ec: 08033a79 .word 0x08033a79 + 80339f0: 08033aa1 .word 0x08033aa1 + 80339f4: 08033aa1 .word 0x08033aa1 + 80339f8: 08033aa1 .word 0x08033aa1 + 80339fc: 08033aa1 .word 0x08033aa1 + 8033a00: 08033aa1 .word 0x08033aa1 + 8033a04: 08033aa1 .word 0x08033aa1 + 8033a08: 08033aa1 .word 0x08033aa1 + 8033a0c: 08033a81 .word 0x08033a81 + 8033a10: 08033aa1 .word 0x08033aa1 + 8033a14: 08033aa1 .word 0x08033aa1 + 8033a18: 08033aa1 .word 0x08033aa1 + 8033a1c: 08033aa1 .word 0x08033aa1 + 8033a20: 08033aa1 .word 0x08033aa1 + 8033a24: 08033aa1 .word 0x08033aa1 + 8033a28: 08033aa1 .word 0x08033aa1 + 8033a2c: 08033a89 .word 0x08033a89 + 8033a30: 08033aa1 .word 0x08033aa1 + 8033a34: 08033aa1 .word 0x08033aa1 + 8033a38: 08033aa1 .word 0x08033aa1 + 8033a3c: 08033aa1 .word 0x08033aa1 + 8033a40: 08033aa1 .word 0x08033aa1 + 8033a44: 08033aa1 .word 0x08033aa1 + 8033a48: 08033aa1 .word 0x08033aa1 + 8033a4c: 08033a91 .word 0x08033a91 + 8033a50: 08033aa1 .word 0x08033aa1 + 8033a54: 08033aa1 .word 0x08033aa1 + 8033a58: 08033aa1 .word 0x08033aa1 + 8033a5c: 08033aa1 .word 0x08033aa1 + 8033a60: 08033aa1 .word 0x08033aa1 + 8033a64: 08033aa1 .word 0x08033aa1 + 8033a68: 08033aa1 .word 0x08033aa1 + 8033a6c: 08033a99 .word 0x08033a99 + 8033a70: 2301 movs r3, #1 8033a72: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a76: e07a b.n 8033b6e - 8033a78: 2320 movs r3, #32 + 8033a76: e0bc b.n 8033bf2 + 8033a78: 2304 movs r3, #4 8033a7a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a7e: e076 b.n 8033b6e - 8033a80: 2340 movs r3, #64 ; 0x40 + 8033a7e: e0b8 b.n 8033bf2 + 8033a80: 2308 movs r3, #8 8033a82: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a86: e072 b.n 8033b6e - 8033a88: 2380 movs r3, #128 ; 0x80 + 8033a86: e0b4 b.n 8033bf2 + 8033a88: 2310 movs r3, #16 8033a8a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033a8e: e06e b.n 8033b6e - 8033a90: 697b ldr r3, [r7, #20] - 8033a92: 681b ldr r3, [r3, #0] - 8033a94: 4a75 ldr r2, [pc, #468] ; (8033c6c ) - 8033a96: 4293 cmp r3, r2 - 8033a98: d130 bne.n 8033afc - 8033a9a: 4b72 ldr r3, [pc, #456] ; (8033c64 ) - 8033a9c: 6d5b ldr r3, [r3, #84] ; 0x54 - 8033a9e: f003 0307 and.w r3, r3, #7 - 8033aa2: 2b05 cmp r3, #5 - 8033aa4: d826 bhi.n 8033af4 - 8033aa6: a201 add r2, pc, #4 ; (adr r2, 8033aac ) - 8033aa8: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033aac: 08033ac5 .word 0x08033ac5 - 8033ab0: 08033acd .word 0x08033acd - 8033ab4: 08033ad5 .word 0x08033ad5 - 8033ab8: 08033add .word 0x08033add - 8033abc: 08033ae5 .word 0x08033ae5 - 8033ac0: 08033aed .word 0x08033aed - 8033ac4: 2300 movs r3, #0 - 8033ac6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033aca: e050 b.n 8033b6e - 8033acc: 2304 movs r3, #4 - 8033ace: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033ad2: e04c b.n 8033b6e - 8033ad4: 2308 movs r3, #8 - 8033ad6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033ada: e048 b.n 8033b6e - 8033adc: 2310 movs r3, #16 + 8033a8e: e0b0 b.n 8033bf2 + 8033a90: 2320 movs r3, #32 + 8033a92: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a96: e0ac b.n 8033bf2 + 8033a98: 2340 movs r3, #64 ; 0x40 + 8033a9a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033a9e: e0a8 b.n 8033bf2 + 8033aa0: 2380 movs r3, #128 ; 0x80 + 8033aa2: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033aa6: e0a4 b.n 8033bf2 + 8033aa8: 697b ldr r3, [r7, #20] + 8033aaa: 681b ldr r3, [r3, #0] + 8033aac: 4a8f ldr r2, [pc, #572] ; (8033cec ) + 8033aae: 4293 cmp r3, r2 + 8033ab0: d130 bne.n 8033b14 + 8033ab2: 4b8d ldr r3, [pc, #564] ; (8033ce8 ) + 8033ab4: 6d5b ldr r3, [r3, #84] ; 0x54 + 8033ab6: f003 0307 and.w r3, r3, #7 + 8033aba: 2b05 cmp r3, #5 + 8033abc: d826 bhi.n 8033b0c + 8033abe: a201 add r2, pc, #4 ; (adr r2, 8033ac4 ) + 8033ac0: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033ac4: 08033add .word 0x08033add + 8033ac8: 08033ae5 .word 0x08033ae5 + 8033acc: 08033aed .word 0x08033aed + 8033ad0: 08033af5 .word 0x08033af5 + 8033ad4: 08033afd .word 0x08033afd + 8033ad8: 08033b05 .word 0x08033b05 + 8033adc: 2300 movs r3, #0 8033ade: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033ae2: e044 b.n 8033b6e - 8033ae4: 2320 movs r3, #32 + 8033ae2: e086 b.n 8033bf2 + 8033ae4: 2304 movs r3, #4 8033ae6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033aea: e040 b.n 8033b6e - 8033aec: 2340 movs r3, #64 ; 0x40 + 8033aea: e082 b.n 8033bf2 + 8033aec: 2308 movs r3, #8 8033aee: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033af2: e03c b.n 8033b6e - 8033af4: 2380 movs r3, #128 ; 0x80 + 8033af2: e07e b.n 8033bf2 + 8033af4: 2310 movs r3, #16 8033af6: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033afa: e038 b.n 8033b6e - 8033afc: 697b ldr r3, [r7, #20] - 8033afe: 681b ldr r3, [r3, #0] - 8033b00: 4a5b ldr r2, [pc, #364] ; (8033c70 ) - 8033b02: 4293 cmp r3, r2 - 8033b04: d130 bne.n 8033b68 - 8033b06: 4b57 ldr r3, [pc, #348] ; (8033c64 ) - 8033b08: 6d9b ldr r3, [r3, #88] ; 0x58 - 8033b0a: f003 0307 and.w r3, r3, #7 - 8033b0e: 2b05 cmp r3, #5 - 8033b10: d826 bhi.n 8033b60 - 8033b12: a201 add r2, pc, #4 ; (adr r2, 8033b18 ) - 8033b14: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033b18: 08033b31 .word 0x08033b31 - 8033b1c: 08033b39 .word 0x08033b39 - 8033b20: 08033b41 .word 0x08033b41 - 8033b24: 08033b49 .word 0x08033b49 - 8033b28: 08033b51 .word 0x08033b51 - 8033b2c: 08033b59 .word 0x08033b59 - 8033b30: 2302 movs r3, #2 - 8033b32: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b36: e01a b.n 8033b6e - 8033b38: 2304 movs r3, #4 - 8033b3a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b3e: e016 b.n 8033b6e - 8033b40: 2308 movs r3, #8 - 8033b42: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b46: e012 b.n 8033b6e - 8033b48: 2310 movs r3, #16 + 8033afa: e07a b.n 8033bf2 + 8033afc: 2320 movs r3, #32 + 8033afe: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b02: e076 b.n 8033bf2 + 8033b04: 2340 movs r3, #64 ; 0x40 + 8033b06: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b0a: e072 b.n 8033bf2 + 8033b0c: 2380 movs r3, #128 ; 0x80 + 8033b0e: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b12: e06e b.n 8033bf2 + 8033b14: 697b ldr r3, [r7, #20] + 8033b16: 681b ldr r3, [r3, #0] + 8033b18: 4a75 ldr r2, [pc, #468] ; (8033cf0 ) + 8033b1a: 4293 cmp r3, r2 + 8033b1c: d130 bne.n 8033b80 + 8033b1e: 4b72 ldr r3, [pc, #456] ; (8033ce8 ) + 8033b20: 6d5b ldr r3, [r3, #84] ; 0x54 + 8033b22: f003 0307 and.w r3, r3, #7 + 8033b26: 2b05 cmp r3, #5 + 8033b28: d826 bhi.n 8033b78 + 8033b2a: a201 add r2, pc, #4 ; (adr r2, 8033b30 ) + 8033b2c: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033b30: 08033b49 .word 0x08033b49 + 8033b34: 08033b51 .word 0x08033b51 + 8033b38: 08033b59 .word 0x08033b59 + 8033b3c: 08033b61 .word 0x08033b61 + 8033b40: 08033b69 .word 0x08033b69 + 8033b44: 08033b71 .word 0x08033b71 + 8033b48: 2300 movs r3, #0 8033b4a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b4e: e00e b.n 8033b6e - 8033b50: 2320 movs r3, #32 + 8033b4e: e050 b.n 8033bf2 + 8033b50: 2304 movs r3, #4 8033b52: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b56: e00a b.n 8033b6e - 8033b58: 2340 movs r3, #64 ; 0x40 + 8033b56: e04c b.n 8033bf2 + 8033b58: 2308 movs r3, #8 8033b5a: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b5e: e006 b.n 8033b6e - 8033b60: 2380 movs r3, #128 ; 0x80 + 8033b5e: e048 b.n 8033bf2 + 8033b60: 2310 movs r3, #16 8033b62: f887 3043 strb.w r3, [r7, #67] ; 0x43 - 8033b66: e002 b.n 8033b6e - 8033b68: 2380 movs r3, #128 ; 0x80 + 8033b66: e044 b.n 8033bf2 + 8033b68: 2320 movs r3, #32 8033b6a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b6e: e040 b.n 8033bf2 + 8033b70: 2340 movs r3, #64 ; 0x40 + 8033b72: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b76: e03c b.n 8033bf2 + 8033b78: 2380 movs r3, #128 ; 0x80 + 8033b7a: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033b7e: e038 b.n 8033bf2 + 8033b80: 697b ldr r3, [r7, #20] + 8033b82: 681b ldr r3, [r3, #0] + 8033b84: 4a5b ldr r2, [pc, #364] ; (8033cf4 ) + 8033b86: 4293 cmp r3, r2 + 8033b88: d130 bne.n 8033bec + 8033b8a: 4b57 ldr r3, [pc, #348] ; (8033ce8 ) + 8033b8c: 6d9b ldr r3, [r3, #88] ; 0x58 + 8033b8e: f003 0307 and.w r3, r3, #7 + 8033b92: 2b05 cmp r3, #5 + 8033b94: d826 bhi.n 8033be4 + 8033b96: a201 add r2, pc, #4 ; (adr r2, 8033b9c ) + 8033b98: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033b9c: 08033bb5 .word 0x08033bb5 + 8033ba0: 08033bbd .word 0x08033bbd + 8033ba4: 08033bc5 .word 0x08033bc5 + 8033ba8: 08033bcd .word 0x08033bcd + 8033bac: 08033bd5 .word 0x08033bd5 + 8033bb0: 08033bdd .word 0x08033bdd + 8033bb4: 2302 movs r3, #2 + 8033bb6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033bba: e01a b.n 8033bf2 + 8033bbc: 2304 movs r3, #4 + 8033bbe: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033bc2: e016 b.n 8033bf2 + 8033bc4: 2308 movs r3, #8 + 8033bc6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033bca: e012 b.n 8033bf2 + 8033bcc: 2310 movs r3, #16 + 8033bce: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033bd2: e00e b.n 8033bf2 + 8033bd4: 2320 movs r3, #32 + 8033bd6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033bda: e00a b.n 8033bf2 + 8033bdc: 2340 movs r3, #64 ; 0x40 + 8033bde: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033be2: e006 b.n 8033bf2 + 8033be4: 2380 movs r3, #128 ; 0x80 + 8033be6: f887 3043 strb.w r3, [r7, #67] ; 0x43 + 8033bea: e002 b.n 8033bf2 + 8033bec: 2380 movs r3, #128 ; 0x80 + 8033bee: f887 3043 strb.w r3, [r7, #67] ; 0x43 /* Check LPUART instance */ if (UART_INSTANCE_LOWPOWER(huart)) - 8033b6e: 697b ldr r3, [r7, #20] - 8033b70: 681b ldr r3, [r3, #0] - 8033b72: 4a3f ldr r2, [pc, #252] ; (8033c70 ) - 8033b74: 4293 cmp r3, r2 - 8033b76: f040 80f8 bne.w 8033d6a + 8033bf2: 697b ldr r3, [r7, #20] + 8033bf4: 681b ldr r3, [r3, #0] + 8033bf6: 4a3f ldr r2, [pc, #252] ; (8033cf4 ) + 8033bf8: 4293 cmp r3, r2 + 8033bfa: f040 80f8 bne.w 8033dee { /* Retrieve frequency clock */ switch (clocksource) - 8033b7a: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 - 8033b7e: 2b20 cmp r3, #32 - 8033b80: dc46 bgt.n 8033c10 - 8033b82: 2b02 cmp r3, #2 - 8033b84: f2c0 8082 blt.w 8033c8c - 8033b88: 3b02 subs r3, #2 - 8033b8a: 2b1e cmp r3, #30 - 8033b8c: d87e bhi.n 8033c8c - 8033b8e: a201 add r2, pc, #4 ; (adr r2, 8033b94 ) - 8033b90: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033b94: 08033c17 .word 0x08033c17 - 8033b98: 08033c8d .word 0x08033c8d - 8033b9c: 08033c1f .word 0x08033c1f - 8033ba0: 08033c8d .word 0x08033c8d - 8033ba4: 08033c8d .word 0x08033c8d - 8033ba8: 08033c8d .word 0x08033c8d - 8033bac: 08033c2f .word 0x08033c2f - 8033bb0: 08033c8d .word 0x08033c8d - 8033bb4: 08033c8d .word 0x08033c8d - 8033bb8: 08033c8d .word 0x08033c8d - 8033bbc: 08033c8d .word 0x08033c8d - 8033bc0: 08033c8d .word 0x08033c8d - 8033bc4: 08033c8d .word 0x08033c8d - 8033bc8: 08033c8d .word 0x08033c8d - 8033bcc: 08033c3f .word 0x08033c3f - 8033bd0: 08033c8d .word 0x08033c8d - 8033bd4: 08033c8d .word 0x08033c8d - 8033bd8: 08033c8d .word 0x08033c8d - 8033bdc: 08033c8d .word 0x08033c8d - 8033be0: 08033c8d .word 0x08033c8d - 8033be4: 08033c8d .word 0x08033c8d - 8033be8: 08033c8d .word 0x08033c8d - 8033bec: 08033c8d .word 0x08033c8d - 8033bf0: 08033c8d .word 0x08033c8d - 8033bf4: 08033c8d .word 0x08033c8d - 8033bf8: 08033c8d .word 0x08033c8d - 8033bfc: 08033c8d .word 0x08033c8d - 8033c00: 08033c8d .word 0x08033c8d - 8033c04: 08033c8d .word 0x08033c8d - 8033c08: 08033c8d .word 0x08033c8d - 8033c0c: 08033c7f .word 0x08033c7f - 8033c10: 2b40 cmp r3, #64 ; 0x40 - 8033c12: d037 beq.n 8033c84 - 8033c14: e03a b.n 8033c8c + 8033bfe: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 + 8033c02: 2b20 cmp r3, #32 + 8033c04: dc46 bgt.n 8033c94 + 8033c06: 2b02 cmp r3, #2 + 8033c08: f2c0 8082 blt.w 8033d10 + 8033c0c: 3b02 subs r3, #2 + 8033c0e: 2b1e cmp r3, #30 + 8033c10: d87e bhi.n 8033d10 + 8033c12: a201 add r2, pc, #4 ; (adr r2, 8033c18 ) + 8033c14: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033c18: 08033c9b .word 0x08033c9b + 8033c1c: 08033d11 .word 0x08033d11 + 8033c20: 08033ca3 .word 0x08033ca3 + 8033c24: 08033d11 .word 0x08033d11 + 8033c28: 08033d11 .word 0x08033d11 + 8033c2c: 08033d11 .word 0x08033d11 + 8033c30: 08033cb3 .word 0x08033cb3 + 8033c34: 08033d11 .word 0x08033d11 + 8033c38: 08033d11 .word 0x08033d11 + 8033c3c: 08033d11 .word 0x08033d11 + 8033c40: 08033d11 .word 0x08033d11 + 8033c44: 08033d11 .word 0x08033d11 + 8033c48: 08033d11 .word 0x08033d11 + 8033c4c: 08033d11 .word 0x08033d11 + 8033c50: 08033cc3 .word 0x08033cc3 + 8033c54: 08033d11 .word 0x08033d11 + 8033c58: 08033d11 .word 0x08033d11 + 8033c5c: 08033d11 .word 0x08033d11 + 8033c60: 08033d11 .word 0x08033d11 + 8033c64: 08033d11 .word 0x08033d11 + 8033c68: 08033d11 .word 0x08033d11 + 8033c6c: 08033d11 .word 0x08033d11 + 8033c70: 08033d11 .word 0x08033d11 + 8033c74: 08033d11 .word 0x08033d11 + 8033c78: 08033d11 .word 0x08033d11 + 8033c7c: 08033d11 .word 0x08033d11 + 8033c80: 08033d11 .word 0x08033d11 + 8033c84: 08033d11 .word 0x08033d11 + 8033c88: 08033d11 .word 0x08033d11 + 8033c8c: 08033d11 .word 0x08033d11 + 8033c90: 08033d03 .word 0x08033d03 + 8033c94: 2b40 cmp r3, #64 ; 0x40 + 8033c96: d037 beq.n 8033d08 + 8033c98: e03a b.n 8033d10 { case UART_CLOCKSOURCE_D3PCLK1: pclk = HAL_RCCEx_GetD3PCLK1Freq(); - 8033c16: f7fd fce3 bl 80315e0 - 8033c1a: 63f8 str r0, [r7, #60] ; 0x3c + 8033c9a: f7fd fce3 bl 8031664 + 8033c9e: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033c1c: e03c b.n 8033c98 + 8033ca0: e03c b.n 8033d1c case UART_CLOCKSOURCE_PLL2: HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8033c1e: f107 0324 add.w r3, r7, #36 ; 0x24 - 8033c22: 4618 mov r0, r3 - 8033c24: f7fd fcf2 bl 803160c + 8033ca2: f107 0324 add.w r3, r7, #36 ; 0x24 + 8033ca6: 4618 mov r0, r3 + 8033ca8: f7fd fcf2 bl 8031690 pclk = pll2_clocks.PLL2_Q_Frequency; - 8033c28: 6abb ldr r3, [r7, #40] ; 0x28 - 8033c2a: 63fb str r3, [r7, #60] ; 0x3c + 8033cac: 6abb ldr r3, [r7, #40] ; 0x28 + 8033cae: 63fb str r3, [r7, #60] ; 0x3c break; - 8033c2c: e034 b.n 8033c98 + 8033cb0: e034 b.n 8033d1c case UART_CLOCKSOURCE_PLL3: HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8033c2e: f107 0318 add.w r3, r7, #24 - 8033c32: 4618 mov r0, r3 - 8033c34: f7fd fe3e bl 80318b4 + 8033cb2: f107 0318 add.w r3, r7, #24 + 8033cb6: 4618 mov r0, r3 + 8033cb8: f7fd fe3e bl 8031938 pclk = pll3_clocks.PLL3_Q_Frequency; - 8033c38: 69fb ldr r3, [r7, #28] - 8033c3a: 63fb str r3, [r7, #60] ; 0x3c + 8033cbc: 69fb ldr r3, [r7, #28] + 8033cbe: 63fb str r3, [r7, #60] ; 0x3c break; - 8033c3c: e02c b.n 8033c98 + 8033cc0: e02c b.n 8033d1c case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8033c3e: 4b09 ldr r3, [pc, #36] ; (8033c64 ) - 8033c40: 681b ldr r3, [r3, #0] - 8033c42: f003 0320 and.w r3, r3, #32 - 8033c46: 2b00 cmp r3, #0 - 8033c48: d016 beq.n 8033c78 + 8033cc2: 4b09 ldr r3, [pc, #36] ; (8033ce8 ) + 8033cc4: 681b ldr r3, [r3, #0] + 8033cc6: f003 0320 and.w r3, r3, #32 + 8033cca: 2b00 cmp r3, #0 + 8033ccc: d016 beq.n 8033cfc { pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U)); - 8033c4a: 4b06 ldr r3, [pc, #24] ; (8033c64 ) - 8033c4c: 681b ldr r3, [r3, #0] - 8033c4e: 08db lsrs r3, r3, #3 - 8033c50: f003 0303 and.w r3, r3, #3 - 8033c54: 4a07 ldr r2, [pc, #28] ; (8033c74 ) - 8033c56: fa22 f303 lsr.w r3, r2, r3 - 8033c5a: 63fb str r3, [r7, #60] ; 0x3c + 8033cce: 4b06 ldr r3, [pc, #24] ; (8033ce8 ) + 8033cd0: 681b ldr r3, [r3, #0] + 8033cd2: 08db lsrs r3, r3, #3 + 8033cd4: f003 0303 and.w r3, r3, #3 + 8033cd8: 4a07 ldr r2, [pc, #28] ; (8033cf8 ) + 8033cda: fa22 f303 lsr.w r3, r2, r3 + 8033cde: 63fb str r3, [r7, #60] ; 0x3c } else { pclk = (uint32_t) HSI_VALUE; } break; - 8033c5c: e01c b.n 8033c98 - 8033c5e: bf00 nop - 8033c60: 40011400 .word 0x40011400 - 8033c64: 58024400 .word 0x58024400 - 8033c68: 40007800 .word 0x40007800 - 8033c6c: 40007c00 .word 0x40007c00 - 8033c70: 58000c00 .word 0x58000c00 - 8033c74: 03d09000 .word 0x03d09000 + 8033ce0: e01c b.n 8033d1c + 8033ce2: bf00 nop + 8033ce4: 40011400 .word 0x40011400 + 8033ce8: 58024400 .word 0x58024400 + 8033cec: 40007800 .word 0x40007800 + 8033cf0: 40007c00 .word 0x40007c00 + 8033cf4: 58000c00 .word 0x58000c00 + 8033cf8: 03d09000 .word 0x03d09000 pclk = (uint32_t) HSI_VALUE; - 8033c78: 4b9d ldr r3, [pc, #628] ; (8033ef0 ) - 8033c7a: 63fb str r3, [r7, #60] ; 0x3c + 8033cfc: 4b9d ldr r3, [pc, #628] ; (8033f74 ) + 8033cfe: 63fb str r3, [r7, #60] ; 0x3c break; - 8033c7c: e00c b.n 8033c98 + 8033d00: e00c b.n 8033d1c case UART_CLOCKSOURCE_CSI: pclk = (uint32_t) CSI_VALUE; - 8033c7e: 4b9d ldr r3, [pc, #628] ; (8033ef4 ) - 8033c80: 63fb str r3, [r7, #60] ; 0x3c + 8033d02: 4b9d ldr r3, [pc, #628] ; (8033f78 ) + 8033d04: 63fb str r3, [r7, #60] ; 0x3c break; - 8033c82: e009 b.n 8033c98 + 8033d06: e009 b.n 8033d1c case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 8033c84: f44f 4300 mov.w r3, #32768 ; 0x8000 - 8033c88: 63fb str r3, [r7, #60] ; 0x3c + 8033d08: f44f 4300 mov.w r3, #32768 ; 0x8000 + 8033d0c: 63fb str r3, [r7, #60] ; 0x3c break; - 8033c8a: e005 b.n 8033c98 + 8033d0e: e005 b.n 8033d1c default: pclk = 0U; - 8033c8c: 2300 movs r3, #0 - 8033c8e: 63fb str r3, [r7, #60] ; 0x3c + 8033d10: 2300 movs r3, #0 + 8033d12: 63fb str r3, [r7, #60] ; 0x3c ret = HAL_ERROR; - 8033c90: 2301 movs r3, #1 - 8033c92: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033d14: 2301 movs r3, #1 + 8033d16: f887 3042 strb.w r3, [r7, #66] ; 0x42 break; - 8033c96: bf00 nop + 8033d1a: bf00 nop } /* If proper clock source reported */ if (pclk != 0U) - 8033c98: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033c9a: 2b00 cmp r3, #0 - 8033c9c: f000 81de beq.w 803405c + 8033d1c: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033d1e: 2b00 cmp r3, #0 + 8033d20: f000 81de beq.w 80340e0 { /* Compute clock after Prescaler */ lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]); - 8033ca0: 697b ldr r3, [r7, #20] - 8033ca2: 6a5b ldr r3, [r3, #36] ; 0x24 - 8033ca4: 4a94 ldr r2, [pc, #592] ; (8033ef8 ) - 8033ca6: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8033caa: 461a mov r2, r3 - 8033cac: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033cae: fbb3 f3f2 udiv r3, r3, r2 - 8033cb2: 633b str r3, [r7, #48] ; 0x30 + 8033d24: 697b ldr r3, [r7, #20] + 8033d26: 6a5b ldr r3, [r3, #36] ; 0x24 + 8033d28: 4a94 ldr r2, [pc, #592] ; (8033f7c ) + 8033d2a: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8033d2e: 461a mov r2, r3 + 8033d30: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033d32: fbb3 f3f2 udiv r3, r3, r2 + 8033d36: 633b str r3, [r7, #48] ; 0x30 /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) || - 8033cb4: 697b ldr r3, [r7, #20] - 8033cb6: 685a ldr r2, [r3, #4] - 8033cb8: 4613 mov r3, r2 - 8033cba: 005b lsls r3, r3, #1 - 8033cbc: 4413 add r3, r2 - 8033cbe: 6b3a ldr r2, [r7, #48] ; 0x30 - 8033cc0: 429a cmp r2, r3 - 8033cc2: d305 bcc.n 8033cd0 + 8033d38: 697b ldr r3, [r7, #20] + 8033d3a: 685a ldr r2, [r3, #4] + 8033d3c: 4613 mov r3, r2 + 8033d3e: 005b lsls r3, r3, #1 + 8033d40: 4413 add r3, r2 + 8033d42: 6b3a ldr r2, [r7, #48] ; 0x30 + 8033d44: 429a cmp r2, r3 + 8033d46: d305 bcc.n 8033d54 (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate))) - 8033cc4: 697b ldr r3, [r7, #20] - 8033cc6: 685b ldr r3, [r3, #4] - 8033cc8: 031b lsls r3, r3, #12 + 8033d48: 697b ldr r3, [r7, #20] + 8033d4a: 685b ldr r3, [r3, #4] + 8033d4c: 031b lsls r3, r3, #12 if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) || - 8033cca: 6b3a ldr r2, [r7, #48] ; 0x30 - 8033ccc: 429a cmp r2, r3 - 8033cce: d903 bls.n 8033cd8 + 8033d4e: 6b3a ldr r2, [r7, #48] ; 0x30 + 8033d50: 429a cmp r2, r3 + 8033d52: d903 bls.n 8033d5c { ret = HAL_ERROR; - 8033cd0: 2301 movs r3, #1 - 8033cd2: f887 3042 strb.w r3, [r7, #66] ; 0x42 - 8033cd6: e1c1 b.n 803405c + 8033d54: 2301 movs r3, #1 + 8033d56: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033d5a: e1c1 b.n 80340e0 } else { /* Check computed UsartDiv value is in allocated range (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */ usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 8033cd8: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033cda: 2200 movs r2, #0 - 8033cdc: 60bb str r3, [r7, #8] - 8033cde: 60fa str r2, [r7, #12] - 8033ce0: 697b ldr r3, [r7, #20] - 8033ce2: 6a5b ldr r3, [r3, #36] ; 0x24 - 8033ce4: 4a84 ldr r2, [pc, #528] ; (8033ef8 ) - 8033ce6: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8033cea: b29b uxth r3, r3 - 8033cec: 2200 movs r2, #0 - 8033cee: 603b str r3, [r7, #0] - 8033cf0: 607a str r2, [r7, #4] - 8033cf2: e9d7 2300 ldrd r2, r3, [r7] - 8033cf6: e9d7 0102 ldrd r0, r1, [r7, #8] - 8033cfa: f7ec fb59 bl 80203b0 <__aeabi_uldivmod> - 8033cfe: 4602 mov r2, r0 - 8033d00: 460b mov r3, r1 - 8033d02: 4610 mov r0, r2 - 8033d04: 4619 mov r1, r3 - 8033d06: f04f 0200 mov.w r2, #0 - 8033d0a: f04f 0300 mov.w r3, #0 - 8033d0e: 020b lsls r3, r1, #8 - 8033d10: ea43 6310 orr.w r3, r3, r0, lsr #24 - 8033d14: 0202 lsls r2, r0, #8 - 8033d16: 6979 ldr r1, [r7, #20] - 8033d18: 6849 ldr r1, [r1, #4] - 8033d1a: 0849 lsrs r1, r1, #1 - 8033d1c: 2000 movs r0, #0 - 8033d1e: 460c mov r4, r1 - 8033d20: 4605 mov r5, r0 - 8033d22: eb12 0804 adds.w r8, r2, r4 - 8033d26: eb43 0905 adc.w r9, r3, r5 - 8033d2a: 697b ldr r3, [r7, #20] - 8033d2c: 685b ldr r3, [r3, #4] - 8033d2e: 2200 movs r2, #0 - 8033d30: 469a mov sl, r3 - 8033d32: 4693 mov fp, r2 - 8033d34: 4652 mov r2, sl - 8033d36: 465b mov r3, fp - 8033d38: 4640 mov r0, r8 - 8033d3a: 4649 mov r1, r9 - 8033d3c: f7ec fb38 bl 80203b0 <__aeabi_uldivmod> - 8033d40: 4602 mov r2, r0 - 8033d42: 460b mov r3, r1 - 8033d44: 4613 mov r3, r2 - 8033d46: 63bb str r3, [r7, #56] ; 0x38 + 8033d5c: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033d5e: 2200 movs r2, #0 + 8033d60: 60bb str r3, [r7, #8] + 8033d62: 60fa str r2, [r7, #12] + 8033d64: 697b ldr r3, [r7, #20] + 8033d66: 6a5b ldr r3, [r3, #36] ; 0x24 + 8033d68: 4a84 ldr r2, [pc, #528] ; (8033f7c ) + 8033d6a: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8033d6e: b29b uxth r3, r3 + 8033d70: 2200 movs r2, #0 + 8033d72: 603b str r3, [r7, #0] + 8033d74: 607a str r2, [r7, #4] + 8033d76: e9d7 2300 ldrd r2, r3, [r7] + 8033d7a: e9d7 0102 ldrd r0, r1, [r7, #8] + 8033d7e: f7ec fb17 bl 80203b0 <__aeabi_uldivmod> + 8033d82: 4602 mov r2, r0 + 8033d84: 460b mov r3, r1 + 8033d86: 4610 mov r0, r2 + 8033d88: 4619 mov r1, r3 + 8033d8a: f04f 0200 mov.w r2, #0 + 8033d8e: f04f 0300 mov.w r3, #0 + 8033d92: 020b lsls r3, r1, #8 + 8033d94: ea43 6310 orr.w r3, r3, r0, lsr #24 + 8033d98: 0202 lsls r2, r0, #8 + 8033d9a: 6979 ldr r1, [r7, #20] + 8033d9c: 6849 ldr r1, [r1, #4] + 8033d9e: 0849 lsrs r1, r1, #1 + 8033da0: 2000 movs r0, #0 + 8033da2: 460c mov r4, r1 + 8033da4: 4605 mov r5, r0 + 8033da6: eb12 0804 adds.w r8, r2, r4 + 8033daa: eb43 0905 adc.w r9, r3, r5 + 8033dae: 697b ldr r3, [r7, #20] + 8033db0: 685b ldr r3, [r3, #4] + 8033db2: 2200 movs r2, #0 + 8033db4: 469a mov sl, r3 + 8033db6: 4693 mov fp, r2 + 8033db8: 4652 mov r2, sl + 8033dba: 465b mov r3, fp + 8033dbc: 4640 mov r0, r8 + 8033dbe: 4649 mov r1, r9 + 8033dc0: f7ec faf6 bl 80203b0 <__aeabi_uldivmod> + 8033dc4: 4602 mov r2, r0 + 8033dc6: 460b mov r3, r1 + 8033dc8: 4613 mov r3, r2 + 8033dca: 63bb str r3, [r7, #56] ; 0x38 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX)) - 8033d48: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033d4a: f5b3 7f40 cmp.w r3, #768 ; 0x300 - 8033d4e: d308 bcc.n 8033d62 - 8033d50: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033d52: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8033d56: d204 bcs.n 8033d62 + 8033dcc: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033dce: f5b3 7f40 cmp.w r3, #768 ; 0x300 + 8033dd2: d308 bcc.n 8033de6 + 8033dd4: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033dd6: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 8033dda: d204 bcs.n 8033de6 { huart->Instance->BRR = usartdiv; - 8033d58: 697b ldr r3, [r7, #20] - 8033d5a: 681b ldr r3, [r3, #0] - 8033d5c: 6bba ldr r2, [r7, #56] ; 0x38 - 8033d5e: 60da str r2, [r3, #12] - 8033d60: e17c b.n 803405c + 8033ddc: 697b ldr r3, [r7, #20] + 8033dde: 681b ldr r3, [r3, #0] + 8033de0: 6bba ldr r2, [r7, #56] ; 0x38 + 8033de2: 60da str r2, [r3, #12] + 8033de4: e17c b.n 80340e0 } else { ret = HAL_ERROR; - 8033d62: 2301 movs r3, #1 - 8033d64: f887 3042 strb.w r3, [r7, #66] ; 0x42 - 8033d68: e178 b.n 803405c + 8033de6: 2301 movs r3, #1 + 8033de8: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033dec: e178 b.n 80340e0 } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */ } /* if (pclk != 0) */ } /* Check UART Over Sampling to set Baud Rate Register */ else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 8033d6a: 697b ldr r3, [r7, #20] - 8033d6c: 69db ldr r3, [r3, #28] - 8033d6e: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 - 8033d72: f040 80c5 bne.w 8033f00 + 8033dee: 697b ldr r3, [r7, #20] + 8033df0: 69db ldr r3, [r3, #28] + 8033df2: f5b3 4f00 cmp.w r3, #32768 ; 0x8000 + 8033df6: f040 80c5 bne.w 8033f84 { switch (clocksource) - 8033d76: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 - 8033d7a: 2b20 cmp r3, #32 - 8033d7c: dc48 bgt.n 8033e10 - 8033d7e: 2b00 cmp r3, #0 - 8033d80: db7b blt.n 8033e7a - 8033d82: 2b20 cmp r3, #32 - 8033d84: d879 bhi.n 8033e7a - 8033d86: a201 add r2, pc, #4 ; (adr r2, 8033d8c ) - 8033d88: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033d8c: 08033e17 .word 0x08033e17 - 8033d90: 08033e1f .word 0x08033e1f - 8033d94: 08033e7b .word 0x08033e7b - 8033d98: 08033e7b .word 0x08033e7b - 8033d9c: 08033e27 .word 0x08033e27 - 8033da0: 08033e7b .word 0x08033e7b - 8033da4: 08033e7b .word 0x08033e7b - 8033da8: 08033e7b .word 0x08033e7b - 8033dac: 08033e37 .word 0x08033e37 - 8033db0: 08033e7b .word 0x08033e7b - 8033db4: 08033e7b .word 0x08033e7b - 8033db8: 08033e7b .word 0x08033e7b - 8033dbc: 08033e7b .word 0x08033e7b - 8033dc0: 08033e7b .word 0x08033e7b - 8033dc4: 08033e7b .word 0x08033e7b - 8033dc8: 08033e7b .word 0x08033e7b - 8033dcc: 08033e47 .word 0x08033e47 - 8033dd0: 08033e7b .word 0x08033e7b - 8033dd4: 08033e7b .word 0x08033e7b - 8033dd8: 08033e7b .word 0x08033e7b - 8033ddc: 08033e7b .word 0x08033e7b - 8033de0: 08033e7b .word 0x08033e7b - 8033de4: 08033e7b .word 0x08033e7b - 8033de8: 08033e7b .word 0x08033e7b - 8033dec: 08033e7b .word 0x08033e7b - 8033df0: 08033e7b .word 0x08033e7b - 8033df4: 08033e7b .word 0x08033e7b - 8033df8: 08033e7b .word 0x08033e7b - 8033dfc: 08033e7b .word 0x08033e7b - 8033e00: 08033e7b .word 0x08033e7b - 8033e04: 08033e7b .word 0x08033e7b - 8033e08: 08033e7b .word 0x08033e7b - 8033e0c: 08033e6d .word 0x08033e6d - 8033e10: 2b40 cmp r3, #64 ; 0x40 - 8033e12: d02e beq.n 8033e72 - 8033e14: e031 b.n 8033e7a + 8033dfa: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 + 8033dfe: 2b20 cmp r3, #32 + 8033e00: dc48 bgt.n 8033e94 + 8033e02: 2b00 cmp r3, #0 + 8033e04: db7b blt.n 8033efe + 8033e06: 2b20 cmp r3, #32 + 8033e08: d879 bhi.n 8033efe + 8033e0a: a201 add r2, pc, #4 ; (adr r2, 8033e10 ) + 8033e0c: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033e10: 08033e9b .word 0x08033e9b + 8033e14: 08033ea3 .word 0x08033ea3 + 8033e18: 08033eff .word 0x08033eff + 8033e1c: 08033eff .word 0x08033eff + 8033e20: 08033eab .word 0x08033eab + 8033e24: 08033eff .word 0x08033eff + 8033e28: 08033eff .word 0x08033eff + 8033e2c: 08033eff .word 0x08033eff + 8033e30: 08033ebb .word 0x08033ebb + 8033e34: 08033eff .word 0x08033eff + 8033e38: 08033eff .word 0x08033eff + 8033e3c: 08033eff .word 0x08033eff + 8033e40: 08033eff .word 0x08033eff + 8033e44: 08033eff .word 0x08033eff + 8033e48: 08033eff .word 0x08033eff + 8033e4c: 08033eff .word 0x08033eff + 8033e50: 08033ecb .word 0x08033ecb + 8033e54: 08033eff .word 0x08033eff + 8033e58: 08033eff .word 0x08033eff + 8033e5c: 08033eff .word 0x08033eff + 8033e60: 08033eff .word 0x08033eff + 8033e64: 08033eff .word 0x08033eff + 8033e68: 08033eff .word 0x08033eff + 8033e6c: 08033eff .word 0x08033eff + 8033e70: 08033eff .word 0x08033eff + 8033e74: 08033eff .word 0x08033eff + 8033e78: 08033eff .word 0x08033eff + 8033e7c: 08033eff .word 0x08033eff + 8033e80: 08033eff .word 0x08033eff + 8033e84: 08033eff .word 0x08033eff + 8033e88: 08033eff .word 0x08033eff + 8033e8c: 08033eff .word 0x08033eff + 8033e90: 08033ef1 .word 0x08033ef1 + 8033e94: 2b40 cmp r3, #64 ; 0x40 + 8033e96: d02e beq.n 8033ef6 + 8033e98: e031 b.n 8033efe { case UART_CLOCKSOURCE_D2PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 8033e16: f7fb ff9f bl 802fd58 - 8033e1a: 63f8 str r0, [r7, #60] ; 0x3c + 8033e9a: f7fb ff9f bl 802fddc + 8033e9e: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033e1c: e033 b.n 8033e86 + 8033ea0: e033 b.n 8033f0a case UART_CLOCKSOURCE_D2PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - 8033e1e: f7fb ffb1 bl 802fd84 - 8033e22: 63f8 str r0, [r7, #60] ; 0x3c + 8033ea2: f7fb ffb1 bl 802fe08 + 8033ea6: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033e24: e02f b.n 8033e86 + 8033ea8: e02f b.n 8033f0a case UART_CLOCKSOURCE_PLL2: HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8033e26: f107 0324 add.w r3, r7, #36 ; 0x24 - 8033e2a: 4618 mov r0, r3 - 8033e2c: f7fd fbee bl 803160c + 8033eaa: f107 0324 add.w r3, r7, #36 ; 0x24 + 8033eae: 4618 mov r0, r3 + 8033eb0: f7fd fbee bl 8031690 pclk = pll2_clocks.PLL2_Q_Frequency; - 8033e30: 6abb ldr r3, [r7, #40] ; 0x28 - 8033e32: 63fb str r3, [r7, #60] ; 0x3c + 8033eb4: 6abb ldr r3, [r7, #40] ; 0x28 + 8033eb6: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e34: e027 b.n 8033e86 + 8033eb8: e027 b.n 8033f0a case UART_CLOCKSOURCE_PLL3: HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8033e36: f107 0318 add.w r3, r7, #24 - 8033e3a: 4618 mov r0, r3 - 8033e3c: f7fd fd3a bl 80318b4 + 8033eba: f107 0318 add.w r3, r7, #24 + 8033ebe: 4618 mov r0, r3 + 8033ec0: f7fd fd3a bl 8031938 pclk = pll3_clocks.PLL3_Q_Frequency; - 8033e40: 69fb ldr r3, [r7, #28] - 8033e42: 63fb str r3, [r7, #60] ; 0x3c + 8033ec4: 69fb ldr r3, [r7, #28] + 8033ec6: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e44: e01f b.n 8033e86 + 8033ec8: e01f b.n 8033f0a case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8033e46: 4b2d ldr r3, [pc, #180] ; (8033efc ) - 8033e48: 681b ldr r3, [r3, #0] - 8033e4a: f003 0320 and.w r3, r3, #32 - 8033e4e: 2b00 cmp r3, #0 - 8033e50: d009 beq.n 8033e66 + 8033eca: 4b2d ldr r3, [pc, #180] ; (8033f80 ) + 8033ecc: 681b ldr r3, [r3, #0] + 8033ece: f003 0320 and.w r3, r3, #32 + 8033ed2: 2b00 cmp r3, #0 + 8033ed4: d009 beq.n 8033eea { pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U)); - 8033e52: 4b2a ldr r3, [pc, #168] ; (8033efc ) - 8033e54: 681b ldr r3, [r3, #0] - 8033e56: 08db lsrs r3, r3, #3 - 8033e58: f003 0303 and.w r3, r3, #3 - 8033e5c: 4a24 ldr r2, [pc, #144] ; (8033ef0 ) - 8033e5e: fa22 f303 lsr.w r3, r2, r3 - 8033e62: 63fb str r3, [r7, #60] ; 0x3c + 8033ed6: 4b2a ldr r3, [pc, #168] ; (8033f80 ) + 8033ed8: 681b ldr r3, [r3, #0] + 8033eda: 08db lsrs r3, r3, #3 + 8033edc: f003 0303 and.w r3, r3, #3 + 8033ee0: 4a24 ldr r2, [pc, #144] ; (8033f74 ) + 8033ee2: fa22 f303 lsr.w r3, r2, r3 + 8033ee6: 63fb str r3, [r7, #60] ; 0x3c } else { pclk = (uint32_t) HSI_VALUE; } break; - 8033e64: e00f b.n 8033e86 + 8033ee8: e00f b.n 8033f0a pclk = (uint32_t) HSI_VALUE; - 8033e66: 4b22 ldr r3, [pc, #136] ; (8033ef0 ) - 8033e68: 63fb str r3, [r7, #60] ; 0x3c + 8033eea: 4b22 ldr r3, [pc, #136] ; (8033f74 ) + 8033eec: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e6a: e00c b.n 8033e86 + 8033eee: e00c b.n 8033f0a case UART_CLOCKSOURCE_CSI: pclk = (uint32_t) CSI_VALUE; - 8033e6c: 4b21 ldr r3, [pc, #132] ; (8033ef4 ) - 8033e6e: 63fb str r3, [r7, #60] ; 0x3c + 8033ef0: 4b21 ldr r3, [pc, #132] ; (8033f78 ) + 8033ef2: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e70: e009 b.n 8033e86 + 8033ef4: e009 b.n 8033f0a case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 8033e72: f44f 4300 mov.w r3, #32768 ; 0x8000 - 8033e76: 63fb str r3, [r7, #60] ; 0x3c + 8033ef6: f44f 4300 mov.w r3, #32768 ; 0x8000 + 8033efa: 63fb str r3, [r7, #60] ; 0x3c break; - 8033e78: e005 b.n 8033e86 + 8033efc: e005 b.n 8033f0a default: pclk = 0U; - 8033e7a: 2300 movs r3, #0 - 8033e7c: 63fb str r3, [r7, #60] ; 0x3c + 8033efe: 2300 movs r3, #0 + 8033f00: 63fb str r3, [r7, #60] ; 0x3c ret = HAL_ERROR; - 8033e7e: 2301 movs r3, #1 - 8033e80: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033f02: 2301 movs r3, #1 + 8033f04: f887 3042 strb.w r3, [r7, #66] ; 0x42 break; - 8033e84: bf00 nop + 8033f08: bf00 nop } /* USARTDIV must be greater than or equal to 0d16 */ if (pclk != 0U) - 8033e86: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033e88: 2b00 cmp r3, #0 - 8033e8a: f000 80e7 beq.w 803405c + 8033f0a: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033f0c: 2b00 cmp r3, #0 + 8033f0e: f000 80e7 beq.w 80340e0 { usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 8033e8e: 697b ldr r3, [r7, #20] - 8033e90: 6a5b ldr r3, [r3, #36] ; 0x24 - 8033e92: 4a19 ldr r2, [pc, #100] ; (8033ef8 ) - 8033e94: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8033e98: 461a mov r2, r3 - 8033e9a: 6bfb ldr r3, [r7, #60] ; 0x3c - 8033e9c: fbb3 f3f2 udiv r3, r3, r2 - 8033ea0: 005a lsls r2, r3, #1 - 8033ea2: 697b ldr r3, [r7, #20] - 8033ea4: 685b ldr r3, [r3, #4] - 8033ea6: 085b lsrs r3, r3, #1 - 8033ea8: 441a add r2, r3 - 8033eaa: 697b ldr r3, [r7, #20] - 8033eac: 685b ldr r3, [r3, #4] - 8033eae: fbb2 f3f3 udiv r3, r2, r3 - 8033eb2: 63bb str r3, [r7, #56] ; 0x38 + 8033f12: 697b ldr r3, [r7, #20] + 8033f14: 6a5b ldr r3, [r3, #36] ; 0x24 + 8033f16: 4a19 ldr r2, [pc, #100] ; (8033f7c ) + 8033f18: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8033f1c: 461a mov r2, r3 + 8033f1e: 6bfb ldr r3, [r7, #60] ; 0x3c + 8033f20: fbb3 f3f2 udiv r3, r3, r2 + 8033f24: 005a lsls r2, r3, #1 + 8033f26: 697b ldr r3, [r7, #20] + 8033f28: 685b ldr r3, [r3, #4] + 8033f2a: 085b lsrs r3, r3, #1 + 8033f2c: 441a add r2, r3 + 8033f2e: 697b ldr r3, [r7, #20] + 8033f30: 685b ldr r3, [r3, #4] + 8033f32: fbb2 f3f3 udiv r3, r2, r3 + 8033f36: 63bb str r3, [r7, #56] ; 0x38 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 8033eb4: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033eb6: 2b0f cmp r3, #15 - 8033eb8: d916 bls.n 8033ee8 - 8033eba: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033ebc: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8033ec0: d212 bcs.n 8033ee8 + 8033f38: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033f3a: 2b0f cmp r3, #15 + 8033f3c: d916 bls.n 8033f6c + 8033f3e: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033f40: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8033f44: d212 bcs.n 8033f6c { brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 8033ec2: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033ec4: b29b uxth r3, r3 - 8033ec6: f023 030f bic.w r3, r3, #15 - 8033eca: 86fb strh r3, [r7, #54] ; 0x36 + 8033f46: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033f48: b29b uxth r3, r3 + 8033f4a: f023 030f bic.w r3, r3, #15 + 8033f4e: 86fb strh r3, [r7, #54] ; 0x36 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 8033ecc: 6bbb ldr r3, [r7, #56] ; 0x38 - 8033ece: 085b lsrs r3, r3, #1 - 8033ed0: b29b uxth r3, r3 - 8033ed2: f003 0307 and.w r3, r3, #7 - 8033ed6: b29a uxth r2, r3 - 8033ed8: 8efb ldrh r3, [r7, #54] ; 0x36 - 8033eda: 4313 orrs r3, r2 - 8033edc: 86fb strh r3, [r7, #54] ; 0x36 + 8033f50: 6bbb ldr r3, [r7, #56] ; 0x38 + 8033f52: 085b lsrs r3, r3, #1 + 8033f54: b29b uxth r3, r3 + 8033f56: f003 0307 and.w r3, r3, #7 + 8033f5a: b29a uxth r2, r3 + 8033f5c: 8efb ldrh r3, [r7, #54] ; 0x36 + 8033f5e: 4313 orrs r3, r2 + 8033f60: 86fb strh r3, [r7, #54] ; 0x36 huart->Instance->BRR = brrtemp; - 8033ede: 697b ldr r3, [r7, #20] - 8033ee0: 681b ldr r3, [r3, #0] - 8033ee2: 8efa ldrh r2, [r7, #54] ; 0x36 - 8033ee4: 60da str r2, [r3, #12] - 8033ee6: e0b9 b.n 803405c + 8033f62: 697b ldr r3, [r7, #20] + 8033f64: 681b ldr r3, [r3, #0] + 8033f66: 8efa ldrh r2, [r7, #54] ; 0x36 + 8033f68: 60da str r2, [r3, #12] + 8033f6a: e0b9 b.n 80340e0 } else { ret = HAL_ERROR; - 8033ee8: 2301 movs r3, #1 - 8033eea: f887 3042 strb.w r3, [r7, #66] ; 0x42 - 8033eee: e0b5 b.n 803405c - 8033ef0: 03d09000 .word 0x03d09000 - 8033ef4: 003d0900 .word 0x003d0900 - 8033ef8: 08044cfc .word 0x08044cfc - 8033efc: 58024400 .word 0x58024400 + 8033f6c: 2301 movs r3, #1 + 8033f6e: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 8033f72: e0b5 b.n 80340e0 + 8033f74: 03d09000 .word 0x03d09000 + 8033f78: 003d0900 .word 0x003d0900 + 8033f7c: 08044d7c .word 0x08044d7c + 8033f80: 58024400 .word 0x58024400 } } } else { switch (clocksource) - 8033f00: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 - 8033f04: 2b20 cmp r3, #32 - 8033f06: dc49 bgt.n 8033f9c - 8033f08: 2b00 cmp r3, #0 - 8033f0a: db7c blt.n 8034006 - 8033f0c: 2b20 cmp r3, #32 - 8033f0e: d87a bhi.n 8034006 - 8033f10: a201 add r2, pc, #4 ; (adr r2, 8033f18 ) - 8033f12: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8033f16: bf00 nop - 8033f18: 08033fa3 .word 0x08033fa3 - 8033f1c: 08033fab .word 0x08033fab - 8033f20: 08034007 .word 0x08034007 - 8033f24: 08034007 .word 0x08034007 - 8033f28: 08033fb3 .word 0x08033fb3 - 8033f2c: 08034007 .word 0x08034007 - 8033f30: 08034007 .word 0x08034007 - 8033f34: 08034007 .word 0x08034007 - 8033f38: 08033fc3 .word 0x08033fc3 - 8033f3c: 08034007 .word 0x08034007 - 8033f40: 08034007 .word 0x08034007 - 8033f44: 08034007 .word 0x08034007 - 8033f48: 08034007 .word 0x08034007 - 8033f4c: 08034007 .word 0x08034007 - 8033f50: 08034007 .word 0x08034007 - 8033f54: 08034007 .word 0x08034007 - 8033f58: 08033fd3 .word 0x08033fd3 - 8033f5c: 08034007 .word 0x08034007 - 8033f60: 08034007 .word 0x08034007 - 8033f64: 08034007 .word 0x08034007 - 8033f68: 08034007 .word 0x08034007 - 8033f6c: 08034007 .word 0x08034007 - 8033f70: 08034007 .word 0x08034007 - 8033f74: 08034007 .word 0x08034007 - 8033f78: 08034007 .word 0x08034007 - 8033f7c: 08034007 .word 0x08034007 - 8033f80: 08034007 .word 0x08034007 - 8033f84: 08034007 .word 0x08034007 - 8033f88: 08034007 .word 0x08034007 - 8033f8c: 08034007 .word 0x08034007 - 8033f90: 08034007 .word 0x08034007 - 8033f94: 08034007 .word 0x08034007 - 8033f98: 08033ff9 .word 0x08033ff9 - 8033f9c: 2b40 cmp r3, #64 ; 0x40 - 8033f9e: d02e beq.n 8033ffe - 8033fa0: e031 b.n 8034006 + 8033f84: f897 3043 ldrb.w r3, [r7, #67] ; 0x43 + 8033f88: 2b20 cmp r3, #32 + 8033f8a: dc49 bgt.n 8034020 + 8033f8c: 2b00 cmp r3, #0 + 8033f8e: db7c blt.n 803408a + 8033f90: 2b20 cmp r3, #32 + 8033f92: d87a bhi.n 803408a + 8033f94: a201 add r2, pc, #4 ; (adr r2, 8033f9c ) + 8033f96: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8033f9a: bf00 nop + 8033f9c: 08034027 .word 0x08034027 + 8033fa0: 0803402f .word 0x0803402f + 8033fa4: 0803408b .word 0x0803408b + 8033fa8: 0803408b .word 0x0803408b + 8033fac: 08034037 .word 0x08034037 + 8033fb0: 0803408b .word 0x0803408b + 8033fb4: 0803408b .word 0x0803408b + 8033fb8: 0803408b .word 0x0803408b + 8033fbc: 08034047 .word 0x08034047 + 8033fc0: 0803408b .word 0x0803408b + 8033fc4: 0803408b .word 0x0803408b + 8033fc8: 0803408b .word 0x0803408b + 8033fcc: 0803408b .word 0x0803408b + 8033fd0: 0803408b .word 0x0803408b + 8033fd4: 0803408b .word 0x0803408b + 8033fd8: 0803408b .word 0x0803408b + 8033fdc: 08034057 .word 0x08034057 + 8033fe0: 0803408b .word 0x0803408b + 8033fe4: 0803408b .word 0x0803408b + 8033fe8: 0803408b .word 0x0803408b + 8033fec: 0803408b .word 0x0803408b + 8033ff0: 0803408b .word 0x0803408b + 8033ff4: 0803408b .word 0x0803408b + 8033ff8: 0803408b .word 0x0803408b + 8033ffc: 0803408b .word 0x0803408b + 8034000: 0803408b .word 0x0803408b + 8034004: 0803408b .word 0x0803408b + 8034008: 0803408b .word 0x0803408b + 803400c: 0803408b .word 0x0803408b + 8034010: 0803408b .word 0x0803408b + 8034014: 0803408b .word 0x0803408b + 8034018: 0803408b .word 0x0803408b + 803401c: 0803407d .word 0x0803407d + 8034020: 2b40 cmp r3, #64 ; 0x40 + 8034022: d02e beq.n 8034082 + 8034024: e031 b.n 803408a { case UART_CLOCKSOURCE_D2PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 8033fa2: f7fb fed9 bl 802fd58 - 8033fa6: 63f8 str r0, [r7, #60] ; 0x3c + 8034026: f7fb fed9 bl 802fddc + 803402a: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033fa8: e033 b.n 8034012 + 803402c: e033 b.n 8034096 case UART_CLOCKSOURCE_D2PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - 8033faa: f7fb feeb bl 802fd84 - 8033fae: 63f8 str r0, [r7, #60] ; 0x3c + 803402e: f7fb feeb bl 802fe08 + 8034032: 63f8 str r0, [r7, #60] ; 0x3c break; - 8033fb0: e02f b.n 8034012 + 8034034: e02f b.n 8034096 case UART_CLOCKSOURCE_PLL2: HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks); - 8033fb2: f107 0324 add.w r3, r7, #36 ; 0x24 - 8033fb6: 4618 mov r0, r3 - 8033fb8: f7fd fb28 bl 803160c + 8034036: f107 0324 add.w r3, r7, #36 ; 0x24 + 803403a: 4618 mov r0, r3 + 803403c: f7fd fb28 bl 8031690 pclk = pll2_clocks.PLL2_Q_Frequency; - 8033fbc: 6abb ldr r3, [r7, #40] ; 0x28 - 8033fbe: 63fb str r3, [r7, #60] ; 0x3c + 8034040: 6abb ldr r3, [r7, #40] ; 0x28 + 8034042: 63fb str r3, [r7, #60] ; 0x3c break; - 8033fc0: e027 b.n 8034012 + 8034044: e027 b.n 8034096 case UART_CLOCKSOURCE_PLL3: HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks); - 8033fc2: f107 0318 add.w r3, r7, #24 - 8033fc6: 4618 mov r0, r3 - 8033fc8: f7fd fc74 bl 80318b4 + 8034046: f107 0318 add.w r3, r7, #24 + 803404a: 4618 mov r0, r3 + 803404c: f7fd fc74 bl 8031938 pclk = pll3_clocks.PLL3_Q_Frequency; - 8033fcc: 69fb ldr r3, [r7, #28] - 8033fce: 63fb str r3, [r7, #60] ; 0x3c + 8034050: 69fb ldr r3, [r7, #28] + 8034052: 63fb str r3, [r7, #60] ; 0x3c break; - 8033fd0: e01f b.n 8034012 + 8034054: e01f b.n 8034096 case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8033fd2: 4b2d ldr r3, [pc, #180] ; (8034088 ) - 8033fd4: 681b ldr r3, [r3, #0] - 8033fd6: f003 0320 and.w r3, r3, #32 - 8033fda: 2b00 cmp r3, #0 - 8033fdc: d009 beq.n 8033ff2 + 8034056: 4b2d ldr r3, [pc, #180] ; (803410c ) + 8034058: 681b ldr r3, [r3, #0] + 803405a: f003 0320 and.w r3, r3, #32 + 803405e: 2b00 cmp r3, #0 + 8034060: d009 beq.n 8034076 { pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U)); - 8033fde: 4b2a ldr r3, [pc, #168] ; (8034088 ) - 8033fe0: 681b ldr r3, [r3, #0] - 8033fe2: 08db lsrs r3, r3, #3 - 8033fe4: f003 0303 and.w r3, r3, #3 - 8033fe8: 4a28 ldr r2, [pc, #160] ; (803408c ) - 8033fea: fa22 f303 lsr.w r3, r2, r3 - 8033fee: 63fb str r3, [r7, #60] ; 0x3c + 8034062: 4b2a ldr r3, [pc, #168] ; (803410c ) + 8034064: 681b ldr r3, [r3, #0] + 8034066: 08db lsrs r3, r3, #3 + 8034068: f003 0303 and.w r3, r3, #3 + 803406c: 4a28 ldr r2, [pc, #160] ; (8034110 ) + 803406e: fa22 f303 lsr.w r3, r2, r3 + 8034072: 63fb str r3, [r7, #60] ; 0x3c } else { pclk = (uint32_t) HSI_VALUE; } break; - 8033ff0: e00f b.n 8034012 + 8034074: e00f b.n 8034096 pclk = (uint32_t) HSI_VALUE; - 8033ff2: 4b26 ldr r3, [pc, #152] ; (803408c ) - 8033ff4: 63fb str r3, [r7, #60] ; 0x3c + 8034076: 4b26 ldr r3, [pc, #152] ; (8034110 ) + 8034078: 63fb str r3, [r7, #60] ; 0x3c break; - 8033ff6: e00c b.n 8034012 + 803407a: e00c b.n 8034096 case UART_CLOCKSOURCE_CSI: pclk = (uint32_t) CSI_VALUE; - 8033ff8: 4b25 ldr r3, [pc, #148] ; (8034090 ) - 8033ffa: 63fb str r3, [r7, #60] ; 0x3c + 803407c: 4b25 ldr r3, [pc, #148] ; (8034114 ) + 803407e: 63fb str r3, [r7, #60] ; 0x3c break; - 8033ffc: e009 b.n 8034012 + 8034080: e009 b.n 8034096 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 8033ffe: f44f 4300 mov.w r3, #32768 ; 0x8000 - 8034002: 63fb str r3, [r7, #60] ; 0x3c + 8034082: f44f 4300 mov.w r3, #32768 ; 0x8000 + 8034086: 63fb str r3, [r7, #60] ; 0x3c break; - 8034004: e005 b.n 8034012 + 8034088: e005 b.n 8034096 default: pclk = 0U; - 8034006: 2300 movs r3, #0 - 8034008: 63fb str r3, [r7, #60] ; 0x3c + 803408a: 2300 movs r3, #0 + 803408c: 63fb str r3, [r7, #60] ; 0x3c ret = HAL_ERROR; - 803400a: 2301 movs r3, #1 - 803400c: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 803408e: 2301 movs r3, #1 + 8034090: f887 3042 strb.w r3, [r7, #66] ; 0x42 break; - 8034010: bf00 nop + 8034094: bf00 nop } if (pclk != 0U) - 8034012: 6bfb ldr r3, [r7, #60] ; 0x3c - 8034014: 2b00 cmp r3, #0 - 8034016: d021 beq.n 803405c + 8034096: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034098: 2b00 cmp r3, #0 + 803409a: d021 beq.n 80340e0 { /* USARTDIV must be greater than or equal to 0d16 */ usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); - 8034018: 697b ldr r3, [r7, #20] - 803401a: 6a5b ldr r3, [r3, #36] ; 0x24 - 803401c: 4a1d ldr r2, [pc, #116] ; (8034094 ) - 803401e: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8034022: 461a mov r2, r3 - 8034024: 6bfb ldr r3, [r7, #60] ; 0x3c - 8034026: fbb3 f2f2 udiv r2, r3, r2 - 803402a: 697b ldr r3, [r7, #20] - 803402c: 685b ldr r3, [r3, #4] - 803402e: 085b lsrs r3, r3, #1 - 8034030: 441a add r2, r3 - 8034032: 697b ldr r3, [r7, #20] - 8034034: 685b ldr r3, [r3, #4] - 8034036: fbb2 f3f3 udiv r3, r2, r3 - 803403a: 63bb str r3, [r7, #56] ; 0x38 + 803409c: 697b ldr r3, [r7, #20] + 803409e: 6a5b ldr r3, [r3, #36] ; 0x24 + 80340a0: 4a1d ldr r2, [pc, #116] ; (8034118 ) + 80340a2: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 80340a6: 461a mov r2, r3 + 80340a8: 6bfb ldr r3, [r7, #60] ; 0x3c + 80340aa: fbb3 f2f2 udiv r2, r3, r2 + 80340ae: 697b ldr r3, [r7, #20] + 80340b0: 685b ldr r3, [r3, #4] + 80340b2: 085b lsrs r3, r3, #1 + 80340b4: 441a add r2, r3 + 80340b6: 697b ldr r3, [r7, #20] + 80340b8: 685b ldr r3, [r3, #4] + 80340ba: fbb2 f3f3 udiv r3, r2, r3 + 80340be: 63bb str r3, [r7, #56] ; 0x38 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 803403c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803403e: 2b0f cmp r3, #15 - 8034040: d909 bls.n 8034056 - 8034042: 6bbb ldr r3, [r7, #56] ; 0x38 - 8034044: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 8034048: d205 bcs.n 8034056 + 80340c0: 6bbb ldr r3, [r7, #56] ; 0x38 + 80340c2: 2b0f cmp r3, #15 + 80340c4: d909 bls.n 80340da + 80340c6: 6bbb ldr r3, [r7, #56] ; 0x38 + 80340c8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80340cc: d205 bcs.n 80340da { huart->Instance->BRR = (uint16_t)usartdiv; - 803404a: 6bbb ldr r3, [r7, #56] ; 0x38 - 803404c: b29a uxth r2, r3 - 803404e: 697b ldr r3, [r7, #20] - 8034050: 681b ldr r3, [r3, #0] - 8034052: 60da str r2, [r3, #12] - 8034054: e002 b.n 803405c + 80340ce: 6bbb ldr r3, [r7, #56] ; 0x38 + 80340d0: b29a uxth r2, r3 + 80340d2: 697b ldr r3, [r7, #20] + 80340d4: 681b ldr r3, [r3, #0] + 80340d6: 60da str r2, [r3, #12] + 80340d8: e002 b.n 80340e0 } else { ret = HAL_ERROR; - 8034056: 2301 movs r3, #1 - 8034058: f887 3042 strb.w r3, [r7, #66] ; 0x42 + 80340da: 2301 movs r3, #1 + 80340dc: f887 3042 strb.w r3, [r7, #66] ; 0x42 } } } /* Initialize the number of data to process during RX/TX ISR execution */ huart->NbTxDataToProcess = 1; - 803405c: 697b ldr r3, [r7, #20] - 803405e: 2201 movs r2, #1 - 8034060: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 80340e0: 697b ldr r3, [r7, #20] + 80340e2: 2201 movs r2, #1 + 80340e4: f8a3 206a strh.w r2, [r3, #106] ; 0x6a huart->NbRxDataToProcess = 1; - 8034064: 697b ldr r3, [r7, #20] - 8034066: 2201 movs r2, #1 - 8034068: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 80340e8: 697b ldr r3, [r7, #20] + 80340ea: 2201 movs r2, #1 + 80340ec: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 /* Clear ISR function pointers */ huart->RxISR = NULL; - 803406c: 697b ldr r3, [r7, #20] - 803406e: 2200 movs r2, #0 - 8034070: 671a str r2, [r3, #112] ; 0x70 + 80340f0: 697b ldr r3, [r7, #20] + 80340f2: 2200 movs r2, #0 + 80340f4: 671a str r2, [r3, #112] ; 0x70 huart->TxISR = NULL; - 8034072: 697b ldr r3, [r7, #20] - 8034074: 2200 movs r2, #0 - 8034076: 675a str r2, [r3, #116] ; 0x74 + 80340f6: 697b ldr r3, [r7, #20] + 80340f8: 2200 movs r2, #0 + 80340fa: 675a str r2, [r3, #116] ; 0x74 return ret; - 8034078: f897 3042 ldrb.w r3, [r7, #66] ; 0x42 -} - 803407c: 4618 mov r0, r3 - 803407e: 3748 adds r7, #72 ; 0x48 - 8034080: 46bd mov sp, r7 - 8034082: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} - 8034086: bf00 nop - 8034088: 58024400 .word 0x58024400 - 803408c: 03d09000 .word 0x03d09000 - 8034090: 003d0900 .word 0x003d0900 - 8034094: 08044cfc .word 0x08044cfc - -08034098 : + 80340fc: f897 3042 ldrb.w r3, [r7, #66] ; 0x42 +} + 8034100: 4618 mov r0, r3 + 8034102: 3748 adds r7, #72 ; 0x48 + 8034104: 46bd mov sp, r7 + 8034106: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 803410a: bf00 nop + 803410c: 58024400 .word 0x58024400 + 8034110: 03d09000 .word 0x03d09000 + 8034114: 003d0900 .word 0x003d0900 + 8034118: 08044d7c .word 0x08044d7c + +0803411c : * @brief Configure the UART peripheral advanced features. * @param huart UART handle. * @retval None */ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) { - 8034098: b480 push {r7} - 803409a: b083 sub sp, #12 - 803409c: af00 add r7, sp, #0 - 803409e: 6078 str r0, [r7, #4] + 803411c: b480 push {r7} + 803411e: b083 sub sp, #12 + 8034120: af00 add r7, sp, #0 + 8034122: 6078 str r0, [r7, #4] /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - 80340a0: 687b ldr r3, [r7, #4] - 80340a2: 6a9b ldr r3, [r3, #40] ; 0x28 - 80340a4: f003 0301 and.w r3, r3, #1 - 80340a8: 2b00 cmp r3, #0 - 80340aa: d00a beq.n 80340c2 + 8034124: 687b ldr r3, [r7, #4] + 8034126: 6a9b ldr r3, [r3, #40] ; 0x28 + 8034128: f003 0301 and.w r3, r3, #1 + 803412c: 2b00 cmp r3, #0 + 803412e: d00a beq.n 8034146 { assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - 80340ac: 687b ldr r3, [r7, #4] - 80340ae: 681b ldr r3, [r3, #0] - 80340b0: 685b ldr r3, [r3, #4] - 80340b2: f423 3100 bic.w r1, r3, #131072 ; 0x20000 - 80340b6: 687b ldr r3, [r7, #4] - 80340b8: 6ada ldr r2, [r3, #44] ; 0x2c - 80340ba: 687b ldr r3, [r7, #4] - 80340bc: 681b ldr r3, [r3, #0] - 80340be: 430a orrs r2, r1 - 80340c0: 605a str r2, [r3, #4] + 8034130: 687b ldr r3, [r7, #4] + 8034132: 681b ldr r3, [r3, #0] + 8034134: 685b ldr r3, [r3, #4] + 8034136: f423 3100 bic.w r1, r3, #131072 ; 0x20000 + 803413a: 687b ldr r3, [r7, #4] + 803413c: 6ada ldr r2, [r3, #44] ; 0x2c + 803413e: 687b ldr r3, [r7, #4] + 8034140: 681b ldr r3, [r3, #0] + 8034142: 430a orrs r2, r1 + 8034144: 605a str r2, [r3, #4] } /* if required, configure RX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - 80340c2: 687b ldr r3, [r7, #4] - 80340c4: 6a9b ldr r3, [r3, #40] ; 0x28 - 80340c6: f003 0302 and.w r3, r3, #2 - 80340ca: 2b00 cmp r3, #0 - 80340cc: d00a beq.n 80340e4 + 8034146: 687b ldr r3, [r7, #4] + 8034148: 6a9b ldr r3, [r3, #40] ; 0x28 + 803414a: f003 0302 and.w r3, r3, #2 + 803414e: 2b00 cmp r3, #0 + 8034150: d00a beq.n 8034168 { assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - 80340ce: 687b ldr r3, [r7, #4] - 80340d0: 681b ldr r3, [r3, #0] - 80340d2: 685b ldr r3, [r3, #4] - 80340d4: f423 3180 bic.w r1, r3, #65536 ; 0x10000 - 80340d8: 687b ldr r3, [r7, #4] - 80340da: 6b1a ldr r2, [r3, #48] ; 0x30 - 80340dc: 687b ldr r3, [r7, #4] - 80340de: 681b ldr r3, [r3, #0] - 80340e0: 430a orrs r2, r1 - 80340e2: 605a str r2, [r3, #4] + 8034152: 687b ldr r3, [r7, #4] + 8034154: 681b ldr r3, [r3, #0] + 8034156: 685b ldr r3, [r3, #4] + 8034158: f423 3180 bic.w r1, r3, #65536 ; 0x10000 + 803415c: 687b ldr r3, [r7, #4] + 803415e: 6b1a ldr r2, [r3, #48] ; 0x30 + 8034160: 687b ldr r3, [r7, #4] + 8034162: 681b ldr r3, [r3, #0] + 8034164: 430a orrs r2, r1 + 8034166: 605a str r2, [r3, #4] } /* if required, configure data inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - 80340e4: 687b ldr r3, [r7, #4] - 80340e6: 6a9b ldr r3, [r3, #40] ; 0x28 - 80340e8: f003 0304 and.w r3, r3, #4 - 80340ec: 2b00 cmp r3, #0 - 80340ee: d00a beq.n 8034106 + 8034168: 687b ldr r3, [r7, #4] + 803416a: 6a9b ldr r3, [r3, #40] ; 0x28 + 803416c: f003 0304 and.w r3, r3, #4 + 8034170: 2b00 cmp r3, #0 + 8034172: d00a beq.n 803418a { assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - 80340f0: 687b ldr r3, [r7, #4] - 80340f2: 681b ldr r3, [r3, #0] - 80340f4: 685b ldr r3, [r3, #4] - 80340f6: f423 2180 bic.w r1, r3, #262144 ; 0x40000 - 80340fa: 687b ldr r3, [r7, #4] - 80340fc: 6b5a ldr r2, [r3, #52] ; 0x34 - 80340fe: 687b ldr r3, [r7, #4] - 8034100: 681b ldr r3, [r3, #0] - 8034102: 430a orrs r2, r1 - 8034104: 605a str r2, [r3, #4] + 8034174: 687b ldr r3, [r7, #4] + 8034176: 681b ldr r3, [r3, #0] + 8034178: 685b ldr r3, [r3, #4] + 803417a: f423 2180 bic.w r1, r3, #262144 ; 0x40000 + 803417e: 687b ldr r3, [r7, #4] + 8034180: 6b5a ldr r2, [r3, #52] ; 0x34 + 8034182: 687b ldr r3, [r7, #4] + 8034184: 681b ldr r3, [r3, #0] + 8034186: 430a orrs r2, r1 + 8034188: 605a str r2, [r3, #4] } /* if required, configure RX/TX pins swap */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 8034106: 687b ldr r3, [r7, #4] - 8034108: 6a9b ldr r3, [r3, #40] ; 0x28 - 803410a: f003 0308 and.w r3, r3, #8 - 803410e: 2b00 cmp r3, #0 - 8034110: d00a beq.n 8034128 + 803418a: 687b ldr r3, [r7, #4] + 803418c: 6a9b ldr r3, [r3, #40] ; 0x28 + 803418e: f003 0308 and.w r3, r3, #8 + 8034192: 2b00 cmp r3, #0 + 8034194: d00a beq.n 80341ac { assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - 8034112: 687b ldr r3, [r7, #4] - 8034114: 681b ldr r3, [r3, #0] - 8034116: 685b ldr r3, [r3, #4] - 8034118: f423 4100 bic.w r1, r3, #32768 ; 0x8000 - 803411c: 687b ldr r3, [r7, #4] - 803411e: 6b9a ldr r2, [r3, #56] ; 0x38 - 8034120: 687b ldr r3, [r7, #4] - 8034122: 681b ldr r3, [r3, #0] - 8034124: 430a orrs r2, r1 - 8034126: 605a str r2, [r3, #4] + 8034196: 687b ldr r3, [r7, #4] + 8034198: 681b ldr r3, [r3, #0] + 803419a: 685b ldr r3, [r3, #4] + 803419c: f423 4100 bic.w r1, r3, #32768 ; 0x8000 + 80341a0: 687b ldr r3, [r7, #4] + 80341a2: 6b9a ldr r2, [r3, #56] ; 0x38 + 80341a4: 687b ldr r3, [r7, #4] + 80341a6: 681b ldr r3, [r3, #0] + 80341a8: 430a orrs r2, r1 + 80341aa: 605a str r2, [r3, #4] } /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - 8034128: 687b ldr r3, [r7, #4] - 803412a: 6a9b ldr r3, [r3, #40] ; 0x28 - 803412c: f003 0310 and.w r3, r3, #16 - 8034130: 2b00 cmp r3, #0 - 8034132: d00a beq.n 803414a + 80341ac: 687b ldr r3, [r7, #4] + 80341ae: 6a9b ldr r3, [r3, #40] ; 0x28 + 80341b0: f003 0310 and.w r3, r3, #16 + 80341b4: 2b00 cmp r3, #0 + 80341b6: d00a beq.n 80341ce { assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - 8034134: 687b ldr r3, [r7, #4] - 8034136: 681b ldr r3, [r3, #0] - 8034138: 689b ldr r3, [r3, #8] - 803413a: f423 5180 bic.w r1, r3, #4096 ; 0x1000 - 803413e: 687b ldr r3, [r7, #4] - 8034140: 6bda ldr r2, [r3, #60] ; 0x3c - 8034142: 687b ldr r3, [r7, #4] - 8034144: 681b ldr r3, [r3, #0] - 8034146: 430a orrs r2, r1 - 8034148: 609a str r2, [r3, #8] + 80341b8: 687b ldr r3, [r7, #4] + 80341ba: 681b ldr r3, [r3, #0] + 80341bc: 689b ldr r3, [r3, #8] + 80341be: f423 5180 bic.w r1, r3, #4096 ; 0x1000 + 80341c2: 687b ldr r3, [r7, #4] + 80341c4: 6bda ldr r2, [r3, #60] ; 0x3c + 80341c6: 687b ldr r3, [r7, #4] + 80341c8: 681b ldr r3, [r3, #0] + 80341ca: 430a orrs r2, r1 + 80341cc: 609a str r2, [r3, #8] } /* if required, configure DMA disabling on reception error */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - 803414a: 687b ldr r3, [r7, #4] - 803414c: 6a9b ldr r3, [r3, #40] ; 0x28 - 803414e: f003 0320 and.w r3, r3, #32 - 8034152: 2b00 cmp r3, #0 - 8034154: d00a beq.n 803416c + 80341ce: 687b ldr r3, [r7, #4] + 80341d0: 6a9b ldr r3, [r3, #40] ; 0x28 + 80341d2: f003 0320 and.w r3, r3, #32 + 80341d6: 2b00 cmp r3, #0 + 80341d8: d00a beq.n 80341f0 { assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - 8034156: 687b ldr r3, [r7, #4] - 8034158: 681b ldr r3, [r3, #0] - 803415a: 689b ldr r3, [r3, #8] - 803415c: f423 5100 bic.w r1, r3, #8192 ; 0x2000 - 8034160: 687b ldr r3, [r7, #4] - 8034162: 6c1a ldr r2, [r3, #64] ; 0x40 - 8034164: 687b ldr r3, [r7, #4] - 8034166: 681b ldr r3, [r3, #0] - 8034168: 430a orrs r2, r1 - 803416a: 609a str r2, [r3, #8] + 80341da: 687b ldr r3, [r7, #4] + 80341dc: 681b ldr r3, [r3, #0] + 80341de: 689b ldr r3, [r3, #8] + 80341e0: f423 5100 bic.w r1, r3, #8192 ; 0x2000 + 80341e4: 687b ldr r3, [r7, #4] + 80341e6: 6c1a ldr r2, [r3, #64] ; 0x40 + 80341e8: 687b ldr r3, [r7, #4] + 80341ea: 681b ldr r3, [r3, #0] + 80341ec: 430a orrs r2, r1 + 80341ee: 609a str r2, [r3, #8] } /* if required, configure auto Baud rate detection scheme */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - 803416c: 687b ldr r3, [r7, #4] - 803416e: 6a9b ldr r3, [r3, #40] ; 0x28 - 8034170: f003 0340 and.w r3, r3, #64 ; 0x40 - 8034174: 2b00 cmp r3, #0 - 8034176: d01a beq.n 80341ae + 80341f0: 687b ldr r3, [r7, #4] + 80341f2: 6a9b ldr r3, [r3, #40] ; 0x28 + 80341f4: f003 0340 and.w r3, r3, #64 ; 0x40 + 80341f8: 2b00 cmp r3, #0 + 80341fa: d01a beq.n 8034232 { assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - 8034178: 687b ldr r3, [r7, #4] - 803417a: 681b ldr r3, [r3, #0] - 803417c: 685b ldr r3, [r3, #4] - 803417e: f423 1180 bic.w r1, r3, #1048576 ; 0x100000 - 8034182: 687b ldr r3, [r7, #4] - 8034184: 6c5a ldr r2, [r3, #68] ; 0x44 - 8034186: 687b ldr r3, [r7, #4] - 8034188: 681b ldr r3, [r3, #0] - 803418a: 430a orrs r2, r1 - 803418c: 605a str r2, [r3, #4] + 80341fc: 687b ldr r3, [r7, #4] + 80341fe: 681b ldr r3, [r3, #0] + 8034200: 685b ldr r3, [r3, #4] + 8034202: f423 1180 bic.w r1, r3, #1048576 ; 0x100000 + 8034206: 687b ldr r3, [r7, #4] + 8034208: 6c5a ldr r2, [r3, #68] ; 0x44 + 803420a: 687b ldr r3, [r7, #4] + 803420c: 681b ldr r3, [r3, #0] + 803420e: 430a orrs r2, r1 + 8034210: 605a str r2, [r3, #4] /* set auto Baudrate detection parameters if detection is enabled */ if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - 803418e: 687b ldr r3, [r7, #4] - 8034190: 6c5b ldr r3, [r3, #68] ; 0x44 - 8034192: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 - 8034196: d10a bne.n 80341ae + 8034212: 687b ldr r3, [r7, #4] + 8034214: 6c5b ldr r3, [r3, #68] ; 0x44 + 8034216: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000 + 803421a: d10a bne.n 8034232 { assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - 8034198: 687b ldr r3, [r7, #4] - 803419a: 681b ldr r3, [r3, #0] - 803419c: 685b ldr r3, [r3, #4] - 803419e: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000 - 80341a2: 687b ldr r3, [r7, #4] - 80341a4: 6c9a ldr r2, [r3, #72] ; 0x48 - 80341a6: 687b ldr r3, [r7, #4] - 80341a8: 681b ldr r3, [r3, #0] - 80341aa: 430a orrs r2, r1 - 80341ac: 605a str r2, [r3, #4] + 803421c: 687b ldr r3, [r7, #4] + 803421e: 681b ldr r3, [r3, #0] + 8034220: 685b ldr r3, [r3, #4] + 8034222: f423 01c0 bic.w r1, r3, #6291456 ; 0x600000 + 8034226: 687b ldr r3, [r7, #4] + 8034228: 6c9a ldr r2, [r3, #72] ; 0x48 + 803422a: 687b ldr r3, [r7, #4] + 803422c: 681b ldr r3, [r3, #0] + 803422e: 430a orrs r2, r1 + 8034230: 605a str r2, [r3, #4] } } /* if required, configure MSB first on communication line */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - 80341ae: 687b ldr r3, [r7, #4] - 80341b0: 6a9b ldr r3, [r3, #40] ; 0x28 - 80341b2: f003 0380 and.w r3, r3, #128 ; 0x80 - 80341b6: 2b00 cmp r3, #0 - 80341b8: d00a beq.n 80341d0 + 8034232: 687b ldr r3, [r7, #4] + 8034234: 6a9b ldr r3, [r3, #40] ; 0x28 + 8034236: f003 0380 and.w r3, r3, #128 ; 0x80 + 803423a: 2b00 cmp r3, #0 + 803423c: d00a beq.n 8034254 { assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - 80341ba: 687b ldr r3, [r7, #4] - 80341bc: 681b ldr r3, [r3, #0] - 80341be: 685b ldr r3, [r3, #4] - 80341c0: f423 2100 bic.w r1, r3, #524288 ; 0x80000 - 80341c4: 687b ldr r3, [r7, #4] - 80341c6: 6cda ldr r2, [r3, #76] ; 0x4c - 80341c8: 687b ldr r3, [r7, #4] - 80341ca: 681b ldr r3, [r3, #0] - 80341cc: 430a orrs r2, r1 - 80341ce: 605a str r2, [r3, #4] - } -} - 80341d0: bf00 nop - 80341d2: 370c adds r7, #12 - 80341d4: 46bd mov sp, r7 - 80341d6: f85d 7b04 ldr.w r7, [sp], #4 - 80341da: 4770 bx lr - -080341dc : + 803423e: 687b ldr r3, [r7, #4] + 8034240: 681b ldr r3, [r3, #0] + 8034242: 685b ldr r3, [r3, #4] + 8034244: f423 2100 bic.w r1, r3, #524288 ; 0x80000 + 8034248: 687b ldr r3, [r7, #4] + 803424a: 6cda ldr r2, [r3, #76] ; 0x4c + 803424c: 687b ldr r3, [r7, #4] + 803424e: 681b ldr r3, [r3, #0] + 8034250: 430a orrs r2, r1 + 8034252: 605a str r2, [r3, #4] + } +} + 8034254: bf00 nop + 8034256: 370c adds r7, #12 + 8034258: 46bd mov sp, r7 + 803425a: f85d 7b04 ldr.w r7, [sp], #4 + 803425e: 4770 bx lr + +08034260 : * @brief Check the UART Idle State. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) { - 80341dc: b580 push {r7, lr} - 80341de: b086 sub sp, #24 - 80341e0: af02 add r7, sp, #8 - 80341e2: 6078 str r0, [r7, #4] + 8034260: b580 push {r7, lr} + 8034262: b086 sub sp, #24 + 8034264: af02 add r7, sp, #8 + 8034266: 6078 str r0, [r7, #4] uint32_t tickstart; /* Initialize the UART ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 80341e4: 687b ldr r3, [r7, #4] - 80341e6: 2200 movs r2, #0 - 80341e8: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8034268: 687b ldr r3, [r7, #4] + 803426a: 2200 movs r2, #0 + 803426c: f8c3 208c str.w r2, [r3, #140] ; 0x8c /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 80341ec: f7f1 feea bl 8025fc4 - 80341f0: 60f8 str r0, [r7, #12] + 8034270: f7f1 feea bl 8026048 + 8034274: 60f8 str r0, [r7, #12] /* Check if the Transmitter is enabled */ if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 80341f2: 687b ldr r3, [r7, #4] - 80341f4: 681b ldr r3, [r3, #0] - 80341f6: 681b ldr r3, [r3, #0] - 80341f8: f003 0308 and.w r3, r3, #8 - 80341fc: 2b08 cmp r3, #8 - 80341fe: d10e bne.n 803421e + 8034276: 687b ldr r3, [r7, #4] + 8034278: 681b ldr r3, [r3, #0] + 803427a: 681b ldr r3, [r3, #0] + 803427c: f003 0308 and.w r3, r3, #8 + 8034280: 2b08 cmp r3, #8 + 8034282: d10e bne.n 80342a2 { /* Wait until TEACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 8034200: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 - 8034204: 9300 str r3, [sp, #0] - 8034206: 68fb ldr r3, [r7, #12] - 8034208: 2200 movs r2, #0 - 803420a: f44f 1100 mov.w r1, #2097152 ; 0x200000 - 803420e: 6878 ldr r0, [r7, #4] - 8034210: f000 f82f bl 8034272 - 8034214: 4603 mov r3, r0 - 8034216: 2b00 cmp r3, #0 - 8034218: d001 beq.n 803421e + 8034284: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 + 8034288: 9300 str r3, [sp, #0] + 803428a: 68fb ldr r3, [r7, #12] + 803428c: 2200 movs r2, #0 + 803428e: f44f 1100 mov.w r1, #2097152 ; 0x200000 + 8034292: 6878 ldr r0, [r7, #4] + 8034294: f000 f82f bl 80342f6 + 8034298: 4603 mov r3, r0 + 803429a: 2b00 cmp r3, #0 + 803429c: d001 beq.n 80342a2 { /* Timeout occurred */ return HAL_TIMEOUT; - 803421a: 2303 movs r3, #3 - 803421c: e025 b.n 803426a + 803429e: 2303 movs r3, #3 + 80342a0: e025 b.n 80342ee } } /* Check if the Receiver is enabled */ if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - 803421e: 687b ldr r3, [r7, #4] - 8034220: 681b ldr r3, [r3, #0] - 8034222: 681b ldr r3, [r3, #0] - 8034224: f003 0304 and.w r3, r3, #4 - 8034228: 2b04 cmp r3, #4 - 803422a: d10e bne.n 803424a + 80342a2: 687b ldr r3, [r7, #4] + 80342a4: 681b ldr r3, [r3, #0] + 80342a6: 681b ldr r3, [r3, #0] + 80342a8: f003 0304 and.w r3, r3, #4 + 80342ac: 2b04 cmp r3, #4 + 80342ae: d10e bne.n 80342ce { /* Wait until REACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 803422c: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 - 8034230: 9300 str r3, [sp, #0] - 8034232: 68fb ldr r3, [r7, #12] - 8034234: 2200 movs r2, #0 - 8034236: f44f 0180 mov.w r1, #4194304 ; 0x400000 - 803423a: 6878 ldr r0, [r7, #4] - 803423c: f000 f819 bl 8034272 - 8034240: 4603 mov r3, r0 - 8034242: 2b00 cmp r3, #0 - 8034244: d001 beq.n 803424a + 80342b0: f06f 437e mvn.w r3, #4261412864 ; 0xfe000000 + 80342b4: 9300 str r3, [sp, #0] + 80342b6: 68fb ldr r3, [r7, #12] + 80342b8: 2200 movs r2, #0 + 80342ba: f44f 0180 mov.w r1, #4194304 ; 0x400000 + 80342be: 6878 ldr r0, [r7, #4] + 80342c0: f000 f819 bl 80342f6 + 80342c4: 4603 mov r3, r0 + 80342c6: 2b00 cmp r3, #0 + 80342c8: d001 beq.n 80342ce { /* Timeout occurred */ return HAL_TIMEOUT; - 8034246: 2303 movs r3, #3 - 8034248: e00f b.n 803426a + 80342ca: 2303 movs r3, #3 + 80342cc: e00f b.n 80342ee } } /* Initialize the UART State */ huart->gState = HAL_UART_STATE_READY; - 803424a: 687b ldr r3, [r7, #4] - 803424c: 2220 movs r2, #32 - 803424e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80342ce: 687b ldr r3, [r7, #4] + 80342d0: 2220 movs r2, #32 + 80342d2: f8c3 2084 str.w r2, [r3, #132] ; 0x84 huart->RxState = HAL_UART_STATE_READY; - 8034252: 687b ldr r3, [r7, #4] - 8034254: 2220 movs r2, #32 - 8034256: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 80342d6: 687b ldr r3, [r7, #4] + 80342d8: 2220 movs r2, #32 + 80342da: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 803425a: 687b ldr r3, [r7, #4] - 803425c: 2200 movs r2, #0 - 803425e: 66da str r2, [r3, #108] ; 0x6c + 80342de: 687b ldr r3, [r7, #4] + 80342e0: 2200 movs r2, #0 + 80342e2: 66da str r2, [r3, #108] ; 0x6c __HAL_UNLOCK(huart); - 8034260: 687b ldr r3, [r7, #4] - 8034262: 2200 movs r2, #0 - 8034264: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80342e4: 687b ldr r3, [r7, #4] + 80342e6: 2200 movs r2, #0 + 80342e8: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_OK; - 8034268: 2300 movs r3, #0 + 80342ec: 2300 movs r3, #0 } - 803426a: 4618 mov r0, r3 - 803426c: 3710 adds r7, #16 - 803426e: 46bd mov sp, r7 - 8034270: bd80 pop {r7, pc} + 80342ee: 4618 mov r0, r3 + 80342f0: 3710 adds r7, #16 + 80342f2: 46bd mov sp, r7 + 80342f4: bd80 pop {r7, pc} -08034272 : +080342f6 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8034272: b580 push {r7, lr} - 8034274: b09c sub sp, #112 ; 0x70 - 8034276: af00 add r7, sp, #0 - 8034278: 60f8 str r0, [r7, #12] - 803427a: 60b9 str r1, [r7, #8] - 803427c: 603b str r3, [r7, #0] - 803427e: 4613 mov r3, r2 - 8034280: 71fb strb r3, [r7, #7] + 80342f6: b580 push {r7, lr} + 80342f8: b09c sub sp, #112 ; 0x70 + 80342fa: af00 add r7, sp, #0 + 80342fc: 60f8 str r0, [r7, #12] + 80342fe: 60b9 str r1, [r7, #8] + 8034300: 603b str r3, [r7, #0] + 8034302: 4613 mov r3, r2 + 8034304: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8034282: e0a9 b.n 80343d8 + 8034306: e0a9 b.n 803445c { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8034284: 6fbb ldr r3, [r7, #120] ; 0x78 - 8034286: f1b3 3fff cmp.w r3, #4294967295 - 803428a: f000 80a5 beq.w 80343d8 + 8034308: 6fbb ldr r3, [r7, #120] ; 0x78 + 803430a: f1b3 3fff cmp.w r3, #4294967295 + 803430e: f000 80a5 beq.w 803445c { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 803428e: f7f1 fe99 bl 8025fc4 - 8034292: 4602 mov r2, r0 - 8034294: 683b ldr r3, [r7, #0] - 8034296: 1ad3 subs r3, r2, r3 - 8034298: 6fba ldr r2, [r7, #120] ; 0x78 - 803429a: 429a cmp r2, r3 - 803429c: d302 bcc.n 80342a4 - 803429e: 6fbb ldr r3, [r7, #120] ; 0x78 - 80342a0: 2b00 cmp r3, #0 - 80342a2: d140 bne.n 8034326 + 8034312: f7f1 fe99 bl 8026048 + 8034316: 4602 mov r2, r0 + 8034318: 683b ldr r3, [r7, #0] + 803431a: 1ad3 subs r3, r2, r3 + 803431c: 6fba ldr r2, [r7, #120] ; 0x78 + 803431e: 429a cmp r2, r3 + 8034320: d302 bcc.n 8034328 + 8034322: 6fbb ldr r3, [r7, #120] ; 0x78 + 8034324: 2b00 cmp r3, #0 + 8034326: d140 bne.n 80343aa { /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | - 80342a4: 68fb ldr r3, [r7, #12] - 80342a6: 681b ldr r3, [r3, #0] - 80342a8: 653b str r3, [r7, #80] ; 0x50 + 8034328: 68fb ldr r3, [r7, #12] + 803432a: 681b ldr r3, [r3, #0] + 803432c: 653b str r3, [r7, #80] ; 0x50 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80342aa: 6d3b ldr r3, [r7, #80] ; 0x50 - 80342ac: e853 3f00 ldrex r3, [r3] - 80342b0: 64fb str r3, [r7, #76] ; 0x4c + 803432e: 6d3b ldr r3, [r7, #80] ; 0x50 + 8034330: e853 3f00 ldrex r3, [r3] + 8034334: 64fb str r3, [r7, #76] ; 0x4c return(result); - 80342b2: 6cfb ldr r3, [r7, #76] ; 0x4c - 80342b4: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 - 80342b8: 667b str r3, [r7, #100] ; 0x64 - 80342ba: 68fb ldr r3, [r7, #12] - 80342bc: 681b ldr r3, [r3, #0] - 80342be: 461a mov r2, r3 - 80342c0: 6e7b ldr r3, [r7, #100] ; 0x64 - 80342c2: 65fb str r3, [r7, #92] ; 0x5c - 80342c4: 65ba str r2, [r7, #88] ; 0x58 + 8034336: 6cfb ldr r3, [r7, #76] ; 0x4c + 8034338: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 + 803433c: 667b str r3, [r7, #100] ; 0x64 + 803433e: 68fb ldr r3, [r7, #12] + 8034340: 681b ldr r3, [r3, #0] + 8034342: 461a mov r2, r3 + 8034344: 6e7b ldr r3, [r7, #100] ; 0x64 + 8034346: 65fb str r3, [r7, #92] ; 0x5c + 8034348: 65ba str r2, [r7, #88] ; 0x58 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80342c6: 6db9 ldr r1, [r7, #88] ; 0x58 - 80342c8: 6dfa ldr r2, [r7, #92] ; 0x5c - 80342ca: e841 2300 strex r3, r2, [r1] - 80342ce: 657b str r3, [r7, #84] ; 0x54 + 803434a: 6db9 ldr r1, [r7, #88] ; 0x58 + 803434c: 6dfa ldr r2, [r7, #92] ; 0x5c + 803434e: e841 2300 strex r3, r2, [r1] + 8034352: 657b str r3, [r7, #84] ; 0x54 return(result); - 80342d0: 6d7b ldr r3, [r7, #84] ; 0x54 - 80342d2: 2b00 cmp r3, #0 - 80342d4: d1e6 bne.n 80342a4 + 8034354: 6d7b ldr r3, [r7, #84] ; 0x54 + 8034356: 2b00 cmp r3, #0 + 8034358: d1e6 bne.n 8034328 USART_CR1_TXEIE_TXFNFIE)); ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80342d6: 68fb ldr r3, [r7, #12] - 80342d8: 681b ldr r3, [r3, #0] - 80342da: 3308 adds r3, #8 - 80342dc: 63fb str r3, [r7, #60] ; 0x3c + 803435a: 68fb ldr r3, [r7, #12] + 803435c: 681b ldr r3, [r3, #0] + 803435e: 3308 adds r3, #8 + 8034360: 63fb str r3, [r7, #60] ; 0x3c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80342de: 6bfb ldr r3, [r7, #60] ; 0x3c - 80342e0: e853 3f00 ldrex r3, [r3] - 80342e4: 63bb str r3, [r7, #56] ; 0x38 + 8034362: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034364: e853 3f00 ldrex r3, [r3] + 8034368: 63bb str r3, [r7, #56] ; 0x38 return(result); - 80342e6: 6bbb ldr r3, [r7, #56] ; 0x38 - 80342e8: f023 0301 bic.w r3, r3, #1 - 80342ec: 663b str r3, [r7, #96] ; 0x60 - 80342ee: 68fb ldr r3, [r7, #12] - 80342f0: 681b ldr r3, [r3, #0] - 80342f2: 3308 adds r3, #8 - 80342f4: 6e3a ldr r2, [r7, #96] ; 0x60 - 80342f6: 64ba str r2, [r7, #72] ; 0x48 - 80342f8: 647b str r3, [r7, #68] ; 0x44 + 803436a: 6bbb ldr r3, [r7, #56] ; 0x38 + 803436c: f023 0301 bic.w r3, r3, #1 + 8034370: 663b str r3, [r7, #96] ; 0x60 + 8034372: 68fb ldr r3, [r7, #12] + 8034374: 681b ldr r3, [r3, #0] + 8034376: 3308 adds r3, #8 + 8034378: 6e3a ldr r2, [r7, #96] ; 0x60 + 803437a: 64ba str r2, [r7, #72] ; 0x48 + 803437c: 647b str r3, [r7, #68] ; 0x44 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80342fa: 6c79 ldr r1, [r7, #68] ; 0x44 - 80342fc: 6cba ldr r2, [r7, #72] ; 0x48 - 80342fe: e841 2300 strex r3, r2, [r1] - 8034302: 643b str r3, [r7, #64] ; 0x40 + 803437e: 6c79 ldr r1, [r7, #68] ; 0x44 + 8034380: 6cba ldr r2, [r7, #72] ; 0x48 + 8034382: e841 2300 strex r3, r2, [r1] + 8034386: 643b str r3, [r7, #64] ; 0x40 return(result); - 8034304: 6c3b ldr r3, [r7, #64] ; 0x40 - 8034306: 2b00 cmp r3, #0 - 8034308: d1e5 bne.n 80342d6 + 8034388: 6c3b ldr r3, [r7, #64] ; 0x40 + 803438a: 2b00 cmp r3, #0 + 803438c: d1e5 bne.n 803435a huart->gState = HAL_UART_STATE_READY; - 803430a: 68fb ldr r3, [r7, #12] - 803430c: 2220 movs r2, #32 - 803430e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 803438e: 68fb ldr r3, [r7, #12] + 8034390: 2220 movs r2, #32 + 8034392: f8c3 2084 str.w r2, [r3, #132] ; 0x84 huart->RxState = HAL_UART_STATE_READY; - 8034312: 68fb ldr r3, [r7, #12] - 8034314: 2220 movs r2, #32 - 8034316: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034396: 68fb ldr r3, [r7, #12] + 8034398: 2220 movs r2, #32 + 803439a: f8c3 2088 str.w r2, [r3, #136] ; 0x88 __HAL_UNLOCK(huart); - 803431a: 68fb ldr r3, [r7, #12] - 803431c: 2200 movs r2, #0 - 803431e: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 803439e: 68fb ldr r3, [r7, #12] + 80343a0: 2200 movs r2, #0 + 80343a2: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_TIMEOUT; - 8034322: 2303 movs r3, #3 - 8034324: e069 b.n 80343fa + 80343a6: 2303 movs r3, #3 + 80343a8: e069 b.n 803447e } if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) - 8034326: 68fb ldr r3, [r7, #12] - 8034328: 681b ldr r3, [r3, #0] - 803432a: 681b ldr r3, [r3, #0] - 803432c: f003 0304 and.w r3, r3, #4 - 8034330: 2b00 cmp r3, #0 - 8034332: d051 beq.n 80343d8 + 80343aa: 68fb ldr r3, [r7, #12] + 80343ac: 681b ldr r3, [r3, #0] + 80343ae: 681b ldr r3, [r3, #0] + 80343b0: f003 0304 and.w r3, r3, #4 + 80343b4: 2b00 cmp r3, #0 + 80343b6: d051 beq.n 803445c { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) - 8034334: 68fb ldr r3, [r7, #12] - 8034336: 681b ldr r3, [r3, #0] - 8034338: 69db ldr r3, [r3, #28] - 803433a: f403 6300 and.w r3, r3, #2048 ; 0x800 - 803433e: f5b3 6f00 cmp.w r3, #2048 ; 0x800 - 8034342: d149 bne.n 80343d8 + 80343b8: 68fb ldr r3, [r7, #12] + 80343ba: 681b ldr r3, [r3, #0] + 80343bc: 69db ldr r3, [r3, #28] + 80343be: f403 6300 and.w r3, r3, #2048 ; 0x800 + 80343c2: f5b3 6f00 cmp.w r3, #2048 ; 0x800 + 80343c6: d149 bne.n 803445c { /* Clear Receiver Timeout flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 8034344: 68fb ldr r3, [r7, #12] - 8034346: 681b ldr r3, [r3, #0] - 8034348: f44f 6200 mov.w r2, #2048 ; 0x800 - 803434c: 621a str r2, [r3, #32] + 80343c8: 68fb ldr r3, [r7, #12] + 80343ca: 681b ldr r3, [r3, #0] + 80343cc: f44f 6200 mov.w r2, #2048 ; 0x800 + 80343d0: 621a str r2, [r3, #32] /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | - 803434e: 68fb ldr r3, [r7, #12] - 8034350: 681b ldr r3, [r3, #0] - 8034352: 62bb str r3, [r7, #40] ; 0x28 + 80343d2: 68fb ldr r3, [r7, #12] + 80343d4: 681b ldr r3, [r3, #0] + 80343d6: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034354: 6abb ldr r3, [r7, #40] ; 0x28 - 8034356: e853 3f00 ldrex r3, [r3] - 803435a: 627b str r3, [r7, #36] ; 0x24 + 80343d8: 6abb ldr r3, [r7, #40] ; 0x28 + 80343da: e853 3f00 ldrex r3, [r3] + 80343de: 627b str r3, [r7, #36] ; 0x24 return(result); - 803435c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803435e: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 - 8034362: 66fb str r3, [r7, #108] ; 0x6c - 8034364: 68fb ldr r3, [r7, #12] - 8034366: 681b ldr r3, [r3, #0] - 8034368: 461a mov r2, r3 - 803436a: 6efb ldr r3, [r7, #108] ; 0x6c - 803436c: 637b str r3, [r7, #52] ; 0x34 - 803436e: 633a str r2, [r7, #48] ; 0x30 + 80343e0: 6a7b ldr r3, [r7, #36] ; 0x24 + 80343e2: f423 73d0 bic.w r3, r3, #416 ; 0x1a0 + 80343e6: 66fb str r3, [r7, #108] ; 0x6c + 80343e8: 68fb ldr r3, [r7, #12] + 80343ea: 681b ldr r3, [r3, #0] + 80343ec: 461a mov r2, r3 + 80343ee: 6efb ldr r3, [r7, #108] ; 0x6c + 80343f0: 637b str r3, [r7, #52] ; 0x34 + 80343f2: 633a str r2, [r7, #48] ; 0x30 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034370: 6b39 ldr r1, [r7, #48] ; 0x30 - 8034372: 6b7a ldr r2, [r7, #52] ; 0x34 - 8034374: e841 2300 strex r3, r2, [r1] - 8034378: 62fb str r3, [r7, #44] ; 0x2c + 80343f4: 6b39 ldr r1, [r7, #48] ; 0x30 + 80343f6: 6b7a ldr r2, [r7, #52] ; 0x34 + 80343f8: e841 2300 strex r3, r2, [r1] + 80343fc: 62fb str r3, [r7, #44] ; 0x2c return(result); - 803437a: 6afb ldr r3, [r7, #44] ; 0x2c - 803437c: 2b00 cmp r3, #0 - 803437e: d1e6 bne.n 803434e + 80343fe: 6afb ldr r3, [r7, #44] ; 0x2c + 8034400: 2b00 cmp r3, #0 + 8034402: d1e6 bne.n 80343d2 USART_CR1_TXEIE_TXFNFIE)); ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8034380: 68fb ldr r3, [r7, #12] - 8034382: 681b ldr r3, [r3, #0] - 8034384: 3308 adds r3, #8 - 8034386: 617b str r3, [r7, #20] + 8034404: 68fb ldr r3, [r7, #12] + 8034406: 681b ldr r3, [r3, #0] + 8034408: 3308 adds r3, #8 + 803440a: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034388: 697b ldr r3, [r7, #20] - 803438a: e853 3f00 ldrex r3, [r3] - 803438e: 613b str r3, [r7, #16] + 803440c: 697b ldr r3, [r7, #20] + 803440e: e853 3f00 ldrex r3, [r3] + 8034412: 613b str r3, [r7, #16] return(result); - 8034390: 693b ldr r3, [r7, #16] - 8034392: f023 0301 bic.w r3, r3, #1 - 8034396: 66bb str r3, [r7, #104] ; 0x68 - 8034398: 68fb ldr r3, [r7, #12] - 803439a: 681b ldr r3, [r3, #0] - 803439c: 3308 adds r3, #8 - 803439e: 6eba ldr r2, [r7, #104] ; 0x68 - 80343a0: 623a str r2, [r7, #32] - 80343a2: 61fb str r3, [r7, #28] + 8034414: 693b ldr r3, [r7, #16] + 8034416: f023 0301 bic.w r3, r3, #1 + 803441a: 66bb str r3, [r7, #104] ; 0x68 + 803441c: 68fb ldr r3, [r7, #12] + 803441e: 681b ldr r3, [r3, #0] + 8034420: 3308 adds r3, #8 + 8034422: 6eba ldr r2, [r7, #104] ; 0x68 + 8034424: 623a str r2, [r7, #32] + 8034426: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80343a4: 69f9 ldr r1, [r7, #28] - 80343a6: 6a3a ldr r2, [r7, #32] - 80343a8: e841 2300 strex r3, r2, [r1] - 80343ac: 61bb str r3, [r7, #24] + 8034428: 69f9 ldr r1, [r7, #28] + 803442a: 6a3a ldr r2, [r7, #32] + 803442c: e841 2300 strex r3, r2, [r1] + 8034430: 61bb str r3, [r7, #24] return(result); - 80343ae: 69bb ldr r3, [r7, #24] - 80343b0: 2b00 cmp r3, #0 - 80343b2: d1e5 bne.n 8034380 + 8034432: 69bb ldr r3, [r7, #24] + 8034434: 2b00 cmp r3, #0 + 8034436: d1e5 bne.n 8034404 huart->gState = HAL_UART_STATE_READY; - 80343b4: 68fb ldr r3, [r7, #12] - 80343b6: 2220 movs r2, #32 - 80343b8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8034438: 68fb ldr r3, [r7, #12] + 803443a: 2220 movs r2, #32 + 803443c: f8c3 2084 str.w r2, [r3, #132] ; 0x84 huart->RxState = HAL_UART_STATE_READY; - 80343bc: 68fb ldr r3, [r7, #12] - 80343be: 2220 movs r2, #32 - 80343c0: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034440: 68fb ldr r3, [r7, #12] + 8034442: 2220 movs r2, #32 + 8034444: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ErrorCode = HAL_UART_ERROR_RTO; - 80343c4: 68fb ldr r3, [r7, #12] - 80343c6: 2220 movs r2, #32 - 80343c8: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8034448: 68fb ldr r3, [r7, #12] + 803444a: 2220 movs r2, #32 + 803444c: f8c3 208c str.w r2, [r3, #140] ; 0x8c /* Process Unlocked */ __HAL_UNLOCK(huart); - 80343cc: 68fb ldr r3, [r7, #12] - 80343ce: 2200 movs r2, #0 - 80343d0: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8034450: 68fb ldr r3, [r7, #12] + 8034452: 2200 movs r2, #0 + 8034454: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_TIMEOUT; - 80343d4: 2303 movs r3, #3 - 80343d6: e010 b.n 80343fa + 8034458: 2303 movs r3, #3 + 803445a: e010 b.n 803447e while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80343d8: 68fb ldr r3, [r7, #12] - 80343da: 681b ldr r3, [r3, #0] - 80343dc: 69da ldr r2, [r3, #28] - 80343de: 68bb ldr r3, [r7, #8] - 80343e0: 4013 ands r3, r2 - 80343e2: 68ba ldr r2, [r7, #8] - 80343e4: 429a cmp r2, r3 - 80343e6: bf0c ite eq - 80343e8: 2301 moveq r3, #1 - 80343ea: 2300 movne r3, #0 - 80343ec: b2db uxtb r3, r3 - 80343ee: 461a mov r2, r3 - 80343f0: 79fb ldrb r3, [r7, #7] - 80343f2: 429a cmp r2, r3 - 80343f4: f43f af46 beq.w 8034284 + 803445c: 68fb ldr r3, [r7, #12] + 803445e: 681b ldr r3, [r3, #0] + 8034460: 69da ldr r2, [r3, #28] + 8034462: 68bb ldr r3, [r7, #8] + 8034464: 4013 ands r3, r2 + 8034466: 68ba ldr r2, [r7, #8] + 8034468: 429a cmp r2, r3 + 803446a: bf0c ite eq + 803446c: 2301 moveq r3, #1 + 803446e: 2300 movne r3, #0 + 8034470: b2db uxtb r3, r3 + 8034472: 461a mov r2, r3 + 8034474: 79fb ldrb r3, [r7, #7] + 8034476: 429a cmp r2, r3 + 8034478: f43f af46 beq.w 8034308 } } } } return HAL_OK; - 80343f8: 2300 movs r3, #0 + 803447c: 2300 movs r3, #0 } - 80343fa: 4618 mov r0, r3 - 80343fc: 3770 adds r7, #112 ; 0x70 - 80343fe: 46bd mov sp, r7 - 8034400: bd80 pop {r7, pc} + 803447e: 4618 mov r0, r3 + 8034480: 3770 adds r7, #112 ; 0x70 + 8034482: 46bd mov sp, r7 + 8034484: bd80 pop {r7, pc} ... -08034404 : +08034488 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - 8034404: b480 push {r7} - 8034406: b0a3 sub sp, #140 ; 0x8c - 8034408: af00 add r7, sp, #0 - 803440a: 60f8 str r0, [r7, #12] - 803440c: 60b9 str r1, [r7, #8] - 803440e: 4613 mov r3, r2 - 8034410: 80fb strh r3, [r7, #6] + 8034488: b480 push {r7} + 803448a: b0a3 sub sp, #140 ; 0x8c + 803448c: af00 add r7, sp, #0 + 803448e: 60f8 str r0, [r7, #12] + 8034490: 60b9 str r1, [r7, #8] + 8034492: 4613 mov r3, r2 + 8034494: 80fb strh r3, [r7, #6] huart->pRxBuffPtr = pData; - 8034412: 68fb ldr r3, [r7, #12] - 8034414: 68ba ldr r2, [r7, #8] - 8034416: 659a str r2, [r3, #88] ; 0x58 + 8034496: 68fb ldr r3, [r7, #12] + 8034498: 68ba ldr r2, [r7, #8] + 803449a: 659a str r2, [r3, #88] ; 0x58 huart->RxXferSize = Size; - 8034418: 68fb ldr r3, [r7, #12] - 803441a: 88fa ldrh r2, [r7, #6] - 803441c: f8a3 205c strh.w r2, [r3, #92] ; 0x5c + 803449c: 68fb ldr r3, [r7, #12] + 803449e: 88fa ldrh r2, [r7, #6] + 80344a0: f8a3 205c strh.w r2, [r3, #92] ; 0x5c huart->RxXferCount = Size; - 8034420: 68fb ldr r3, [r7, #12] - 8034422: 88fa ldrh r2, [r7, #6] - 8034424: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 80344a4: 68fb ldr r3, [r7, #12] + 80344a6: 88fa ldrh r2, [r7, #6] + 80344a8: f8a3 205e strh.w r2, [r3, #94] ; 0x5e huart->RxISR = NULL; - 8034428: 68fb ldr r3, [r7, #12] - 803442a: 2200 movs r2, #0 - 803442c: 671a str r2, [r3, #112] ; 0x70 + 80344ac: 68fb ldr r3, [r7, #12] + 80344ae: 2200 movs r2, #0 + 80344b0: 671a str r2, [r3, #112] ; 0x70 /* Computation of UART mask to apply to RDR register */ UART_MASK_COMPUTATION(huart); - 803442e: 68fb ldr r3, [r7, #12] - 8034430: 689b ldr r3, [r3, #8] - 8034432: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 8034436: d10e bne.n 8034456 - 8034438: 68fb ldr r3, [r7, #12] - 803443a: 691b ldr r3, [r3, #16] - 803443c: 2b00 cmp r3, #0 - 803443e: d105 bne.n 803444c - 8034440: 68fb ldr r3, [r7, #12] - 8034442: f240 12ff movw r2, #511 ; 0x1ff - 8034446: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 803444a: e02d b.n 80344a8 - 803444c: 68fb ldr r3, [r7, #12] - 803444e: 22ff movs r2, #255 ; 0xff - 8034450: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 8034454: e028 b.n 80344a8 - 8034456: 68fb ldr r3, [r7, #12] - 8034458: 689b ldr r3, [r3, #8] - 803445a: 2b00 cmp r3, #0 - 803445c: d10d bne.n 803447a - 803445e: 68fb ldr r3, [r7, #12] - 8034460: 691b ldr r3, [r3, #16] - 8034462: 2b00 cmp r3, #0 - 8034464: d104 bne.n 8034470 - 8034466: 68fb ldr r3, [r7, #12] - 8034468: 22ff movs r2, #255 ; 0xff - 803446a: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 803446e: e01b b.n 80344a8 - 8034470: 68fb ldr r3, [r7, #12] - 8034472: 227f movs r2, #127 ; 0x7f - 8034474: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 8034478: e016 b.n 80344a8 - 803447a: 68fb ldr r3, [r7, #12] - 803447c: 689b ldr r3, [r3, #8] - 803447e: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 - 8034482: d10d bne.n 80344a0 - 8034484: 68fb ldr r3, [r7, #12] - 8034486: 691b ldr r3, [r3, #16] - 8034488: 2b00 cmp r3, #0 - 803448a: d104 bne.n 8034496 - 803448c: 68fb ldr r3, [r7, #12] - 803448e: 227f movs r2, #127 ; 0x7f - 8034490: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 8034494: e008 b.n 80344a8 - 8034496: 68fb ldr r3, [r7, #12] - 8034498: 223f movs r2, #63 ; 0x3f - 803449a: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 - 803449e: e003 b.n 80344a8 - 80344a0: 68fb ldr r3, [r7, #12] - 80344a2: 2200 movs r2, #0 - 80344a4: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 80344b2: 68fb ldr r3, [r7, #12] + 80344b4: 689b ldr r3, [r3, #8] + 80344b6: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 80344ba: d10e bne.n 80344da + 80344bc: 68fb ldr r3, [r7, #12] + 80344be: 691b ldr r3, [r3, #16] + 80344c0: 2b00 cmp r3, #0 + 80344c2: d105 bne.n 80344d0 + 80344c4: 68fb ldr r3, [r7, #12] + 80344c6: f240 12ff movw r2, #511 ; 0x1ff + 80344ca: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 80344ce: e02d b.n 803452c + 80344d0: 68fb ldr r3, [r7, #12] + 80344d2: 22ff movs r2, #255 ; 0xff + 80344d4: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 80344d8: e028 b.n 803452c + 80344da: 68fb ldr r3, [r7, #12] + 80344dc: 689b ldr r3, [r3, #8] + 80344de: 2b00 cmp r3, #0 + 80344e0: d10d bne.n 80344fe + 80344e2: 68fb ldr r3, [r7, #12] + 80344e4: 691b ldr r3, [r3, #16] + 80344e6: 2b00 cmp r3, #0 + 80344e8: d104 bne.n 80344f4 + 80344ea: 68fb ldr r3, [r7, #12] + 80344ec: 22ff movs r2, #255 ; 0xff + 80344ee: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 80344f2: e01b b.n 803452c + 80344f4: 68fb ldr r3, [r7, #12] + 80344f6: 227f movs r2, #127 ; 0x7f + 80344f8: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 80344fc: e016 b.n 803452c + 80344fe: 68fb ldr r3, [r7, #12] + 8034500: 689b ldr r3, [r3, #8] + 8034502: f1b3 5f80 cmp.w r3, #268435456 ; 0x10000000 + 8034506: d10d bne.n 8034524 + 8034508: 68fb ldr r3, [r7, #12] + 803450a: 691b ldr r3, [r3, #16] + 803450c: 2b00 cmp r3, #0 + 803450e: d104 bne.n 803451a + 8034510: 68fb ldr r3, [r7, #12] + 8034512: 227f movs r2, #127 ; 0x7f + 8034514: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 8034518: e008 b.n 803452c + 803451a: 68fb ldr r3, [r7, #12] + 803451c: 223f movs r2, #63 ; 0x3f + 803451e: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 8034522: e003 b.n 803452c + 8034524: 68fb ldr r3, [r7, #12] + 8034526: 2200 movs r2, #0 + 8034528: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 huart->ErrorCode = HAL_UART_ERROR_NONE; - 80344a8: 68fb ldr r3, [r7, #12] - 80344aa: 2200 movs r2, #0 - 80344ac: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 803452c: 68fb ldr r3, [r7, #12] + 803452e: 2200 movs r2, #0 + 8034530: f8c3 208c str.w r2, [r3, #140] ; 0x8c huart->RxState = HAL_UART_STATE_BUSY_RX; - 80344b0: 68fb ldr r3, [r7, #12] - 80344b2: 2222 movs r2, #34 ; 0x22 - 80344b4: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034534: 68fb ldr r3, [r7, #12] + 8034536: 2222 movs r2, #34 ; 0x22 + 8034538: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80344b8: 68fb ldr r3, [r7, #12] - 80344ba: 681b ldr r3, [r3, #0] - 80344bc: 3308 adds r3, #8 - 80344be: 667b str r3, [r7, #100] ; 0x64 + 803453c: 68fb ldr r3, [r7, #12] + 803453e: 681b ldr r3, [r3, #0] + 8034540: 3308 adds r3, #8 + 8034542: 667b str r3, [r7, #100] ; 0x64 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80344c0: 6e7b ldr r3, [r7, #100] ; 0x64 - 80344c2: e853 3f00 ldrex r3, [r3] - 80344c6: 663b str r3, [r7, #96] ; 0x60 + 8034544: 6e7b ldr r3, [r7, #100] ; 0x64 + 8034546: e853 3f00 ldrex r3, [r3] + 803454a: 663b str r3, [r7, #96] ; 0x60 return(result); - 80344c8: 6e3b ldr r3, [r7, #96] ; 0x60 - 80344ca: f043 0301 orr.w r3, r3, #1 - 80344ce: f8c7 3084 str.w r3, [r7, #132] ; 0x84 - 80344d2: 68fb ldr r3, [r7, #12] - 80344d4: 681b ldr r3, [r3, #0] - 80344d6: 3308 adds r3, #8 - 80344d8: f8d7 2084 ldr.w r2, [r7, #132] ; 0x84 - 80344dc: 673a str r2, [r7, #112] ; 0x70 - 80344de: 66fb str r3, [r7, #108] ; 0x6c + 803454c: 6e3b ldr r3, [r7, #96] ; 0x60 + 803454e: f043 0301 orr.w r3, r3, #1 + 8034552: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 8034556: 68fb ldr r3, [r7, #12] + 8034558: 681b ldr r3, [r3, #0] + 803455a: 3308 adds r3, #8 + 803455c: f8d7 2084 ldr.w r2, [r7, #132] ; 0x84 + 8034560: 673a str r2, [r7, #112] ; 0x70 + 8034562: 66fb str r3, [r7, #108] ; 0x6c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80344e0: 6ef9 ldr r1, [r7, #108] ; 0x6c - 80344e2: 6f3a ldr r2, [r7, #112] ; 0x70 - 80344e4: e841 2300 strex r3, r2, [r1] - 80344e8: 66bb str r3, [r7, #104] ; 0x68 + 8034564: 6ef9 ldr r1, [r7, #108] ; 0x6c + 8034566: 6f3a ldr r2, [r7, #112] ; 0x70 + 8034568: e841 2300 strex r3, r2, [r1] + 803456c: 66bb str r3, [r7, #104] ; 0x68 return(result); - 80344ea: 6ebb ldr r3, [r7, #104] ; 0x68 - 80344ec: 2b00 cmp r3, #0 - 80344ee: d1e3 bne.n 80344b8 + 803456e: 6ebb ldr r3, [r7, #104] ; 0x68 + 8034570: 2b00 cmp r3, #0 + 8034572: d1e3 bne.n 803453c /* Configure Rx interrupt processing */ if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess)) - 80344f0: 68fb ldr r3, [r7, #12] - 80344f2: 6e5b ldr r3, [r3, #100] ; 0x64 - 80344f4: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 - 80344f8: d153 bne.n 80345a2 - 80344fa: 68fb ldr r3, [r7, #12] - 80344fc: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 8034500: 88fa ldrh r2, [r7, #6] - 8034502: 429a cmp r2, r3 - 8034504: d34d bcc.n 80345a2 + 8034574: 68fb ldr r3, [r7, #12] + 8034576: 6e5b ldr r3, [r3, #100] ; 0x64 + 8034578: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000 + 803457c: d153 bne.n 8034626 + 803457e: 68fb ldr r3, [r7, #12] + 8034580: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 8034584: 88fa ldrh r2, [r7, #6] + 8034586: 429a cmp r2, r3 + 8034588: d34d bcc.n 8034626 { /* Set the Rx ISR function pointer according to the data word length */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8034506: 68fb ldr r3, [r7, #12] - 8034508: 689b ldr r3, [r3, #8] - 803450a: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 803450e: d107 bne.n 8034520 - 8034510: 68fb ldr r3, [r7, #12] - 8034512: 691b ldr r3, [r3, #16] - 8034514: 2b00 cmp r3, #0 - 8034516: d103 bne.n 8034520 + 803458a: 68fb ldr r3, [r7, #12] + 803458c: 689b ldr r3, [r3, #8] + 803458e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 8034592: d107 bne.n 80345a4 + 8034594: 68fb ldr r3, [r7, #12] + 8034596: 691b ldr r3, [r3, #16] + 8034598: 2b00 cmp r3, #0 + 803459a: d103 bne.n 80345a4 { huart->RxISR = UART_RxISR_16BIT_FIFOEN; - 8034518: 68fb ldr r3, [r7, #12] - 803451a: 4a4b ldr r2, [pc, #300] ; (8034648 ) - 803451c: 671a str r2, [r3, #112] ; 0x70 - 803451e: e002 b.n 8034526 + 803459c: 68fb ldr r3, [r7, #12] + 803459e: 4a4b ldr r2, [pc, #300] ; (80346cc ) + 80345a0: 671a str r2, [r3, #112] ; 0x70 + 80345a2: e002 b.n 80345aa } else { huart->RxISR = UART_RxISR_8BIT_FIFOEN; - 8034520: 68fb ldr r3, [r7, #12] - 8034522: 4a4a ldr r2, [pc, #296] ; (803464c ) - 8034524: 671a str r2, [r3, #112] ; 0x70 + 80345a4: 68fb ldr r3, [r7, #12] + 80345a6: 4a4a ldr r2, [pc, #296] ; (80346d0 ) + 80345a8: 671a str r2, [r3, #112] ; 0x70 } __HAL_UNLOCK(huart); - 8034526: 68fb ldr r3, [r7, #12] - 8034528: 2200 movs r2, #0 - 803452a: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80345aa: 68fb ldr r3, [r7, #12] + 80345ac: 2200 movs r2, #0 + 80345ae: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */ if (huart->Init.Parity != UART_PARITY_NONE) - 803452e: 68fb ldr r3, [r7, #12] - 8034530: 691b ldr r3, [r3, #16] - 8034532: 2b00 cmp r3, #0 - 8034534: d01a beq.n 803456c + 80345b2: 68fb ldr r3, [r7, #12] + 80345b4: 691b ldr r3, [r3, #16] + 80345b6: 2b00 cmp r3, #0 + 80345b8: d01a beq.n 80345f0 { ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8034536: 68fb ldr r3, [r7, #12] - 8034538: 681b ldr r3, [r3, #0] - 803453a: 653b str r3, [r7, #80] ; 0x50 + 80345ba: 68fb ldr r3, [r7, #12] + 80345bc: 681b ldr r3, [r3, #0] + 80345be: 653b str r3, [r7, #80] ; 0x50 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803453c: 6d3b ldr r3, [r7, #80] ; 0x50 - 803453e: e853 3f00 ldrex r3, [r3] - 8034542: 64fb str r3, [r7, #76] ; 0x4c + 80345c0: 6d3b ldr r3, [r7, #80] ; 0x50 + 80345c2: e853 3f00 ldrex r3, [r3] + 80345c6: 64fb str r3, [r7, #76] ; 0x4c return(result); - 8034544: 6cfb ldr r3, [r7, #76] ; 0x4c - 8034546: f443 7380 orr.w r3, r3, #256 ; 0x100 - 803454a: f8c7 3080 str.w r3, [r7, #128] ; 0x80 - 803454e: 68fb ldr r3, [r7, #12] - 8034550: 681b ldr r3, [r3, #0] - 8034552: 461a mov r2, r3 - 8034554: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80 - 8034558: 65fb str r3, [r7, #92] ; 0x5c - 803455a: 65ba str r2, [r7, #88] ; 0x58 + 80345c8: 6cfb ldr r3, [r7, #76] ; 0x4c + 80345ca: f443 7380 orr.w r3, r3, #256 ; 0x100 + 80345ce: f8c7 3080 str.w r3, [r7, #128] ; 0x80 + 80345d2: 68fb ldr r3, [r7, #12] + 80345d4: 681b ldr r3, [r3, #0] + 80345d6: 461a mov r2, r3 + 80345d8: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80 + 80345dc: 65fb str r3, [r7, #92] ; 0x5c + 80345de: 65ba str r2, [r7, #88] ; 0x58 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803455c: 6db9 ldr r1, [r7, #88] ; 0x58 - 803455e: 6dfa ldr r2, [r7, #92] ; 0x5c - 8034560: e841 2300 strex r3, r2, [r1] - 8034564: 657b str r3, [r7, #84] ; 0x54 + 80345e0: 6db9 ldr r1, [r7, #88] ; 0x58 + 80345e2: 6dfa ldr r2, [r7, #92] ; 0x5c + 80345e4: e841 2300 strex r3, r2, [r1] + 80345e8: 657b str r3, [r7, #84] ; 0x54 return(result); - 8034566: 6d7b ldr r3, [r7, #84] ; 0x54 - 8034568: 2b00 cmp r3, #0 - 803456a: d1e4 bne.n 8034536 + 80345ea: 6d7b ldr r3, [r7, #84] ; 0x54 + 80345ec: 2b00 cmp r3, #0 + 80345ee: d1e4 bne.n 80345ba } ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - 803456c: 68fb ldr r3, [r7, #12] - 803456e: 681b ldr r3, [r3, #0] - 8034570: 3308 adds r3, #8 - 8034572: 63fb str r3, [r7, #60] ; 0x3c + 80345f0: 68fb ldr r3, [r7, #12] + 80345f2: 681b ldr r3, [r3, #0] + 80345f4: 3308 adds r3, #8 + 80345f6: 63fb str r3, [r7, #60] ; 0x3c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034574: 6bfb ldr r3, [r7, #60] ; 0x3c - 8034576: e853 3f00 ldrex r3, [r3] - 803457a: 63bb str r3, [r7, #56] ; 0x38 + 80345f8: 6bfb ldr r3, [r7, #60] ; 0x3c + 80345fa: e853 3f00 ldrex r3, [r3] + 80345fe: 63bb str r3, [r7, #56] ; 0x38 return(result); - 803457c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803457e: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 - 8034582: 67fb str r3, [r7, #124] ; 0x7c - 8034584: 68fb ldr r3, [r7, #12] - 8034586: 681b ldr r3, [r3, #0] - 8034588: 3308 adds r3, #8 - 803458a: 6ffa ldr r2, [r7, #124] ; 0x7c - 803458c: 64ba str r2, [r7, #72] ; 0x48 - 803458e: 647b str r3, [r7, #68] ; 0x44 + 8034600: 6bbb ldr r3, [r7, #56] ; 0x38 + 8034602: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 + 8034606: 67fb str r3, [r7, #124] ; 0x7c + 8034608: 68fb ldr r3, [r7, #12] + 803460a: 681b ldr r3, [r3, #0] + 803460c: 3308 adds r3, #8 + 803460e: 6ffa ldr r2, [r7, #124] ; 0x7c + 8034610: 64ba str r2, [r7, #72] ; 0x48 + 8034612: 647b str r3, [r7, #68] ; 0x44 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034590: 6c79 ldr r1, [r7, #68] ; 0x44 - 8034592: 6cba ldr r2, [r7, #72] ; 0x48 - 8034594: e841 2300 strex r3, r2, [r1] - 8034598: 643b str r3, [r7, #64] ; 0x40 + 8034614: 6c79 ldr r1, [r7, #68] ; 0x44 + 8034616: 6cba ldr r2, [r7, #72] ; 0x48 + 8034618: e841 2300 strex r3, r2, [r1] + 803461c: 643b str r3, [r7, #64] ; 0x40 return(result); - 803459a: 6c3b ldr r3, [r7, #64] ; 0x40 - 803459c: 2b00 cmp r3, #0 - 803459e: d1e5 bne.n 803456c - 80345a0: e04a b.n 8034638 + 803461e: 6c3b ldr r3, [r7, #64] ; 0x40 + 8034620: 2b00 cmp r3, #0 + 8034622: d1e5 bne.n 80345f0 + 8034624: e04a b.n 80346bc } else { /* Set the Rx ISR function pointer according to the data word length */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80345a2: 68fb ldr r3, [r7, #12] - 80345a4: 689b ldr r3, [r3, #8] - 80345a6: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 - 80345aa: d107 bne.n 80345bc - 80345ac: 68fb ldr r3, [r7, #12] - 80345ae: 691b ldr r3, [r3, #16] - 80345b0: 2b00 cmp r3, #0 - 80345b2: d103 bne.n 80345bc + 8034626: 68fb ldr r3, [r7, #12] + 8034628: 689b ldr r3, [r3, #8] + 803462a: f5b3 5f80 cmp.w r3, #4096 ; 0x1000 + 803462e: d107 bne.n 8034640 + 8034630: 68fb ldr r3, [r7, #12] + 8034632: 691b ldr r3, [r3, #16] + 8034634: 2b00 cmp r3, #0 + 8034636: d103 bne.n 8034640 { huart->RxISR = UART_RxISR_16BIT; - 80345b4: 68fb ldr r3, [r7, #12] - 80345b6: 4a26 ldr r2, [pc, #152] ; (8034650 ) - 80345b8: 671a str r2, [r3, #112] ; 0x70 - 80345ba: e002 b.n 80345c2 + 8034638: 68fb ldr r3, [r7, #12] + 803463a: 4a26 ldr r2, [pc, #152] ; (80346d4 ) + 803463c: 671a str r2, [r3, #112] ; 0x70 + 803463e: e002 b.n 8034646 } else { huart->RxISR = UART_RxISR_8BIT; - 80345bc: 68fb ldr r3, [r7, #12] - 80345be: 4a25 ldr r2, [pc, #148] ; (8034654 ) - 80345c0: 671a str r2, [r3, #112] ; 0x70 + 8034640: 68fb ldr r3, [r7, #12] + 8034642: 4a25 ldr r2, [pc, #148] ; (80346d8 ) + 8034644: 671a str r2, [r3, #112] ; 0x70 } __HAL_UNLOCK(huart); - 80345c2: 68fb ldr r3, [r7, #12] - 80345c4: 2200 movs r2, #0 - 80345c6: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8034646: 68fb ldr r3, [r7, #12] + 8034648: 2200 movs r2, #0 + 803464a: f883 2080 strb.w r2, [r3, #128] ; 0x80 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ if (huart->Init.Parity != UART_PARITY_NONE) - 80345ca: 68fb ldr r3, [r7, #12] - 80345cc: 691b ldr r3, [r3, #16] - 80345ce: 2b00 cmp r3, #0 - 80345d0: d019 beq.n 8034606 + 803464e: 68fb ldr r3, [r7, #12] + 8034650: 691b ldr r3, [r3, #16] + 8034652: 2b00 cmp r3, #0 + 8034654: d019 beq.n 803468a { ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); - 80345d2: 68fb ldr r3, [r7, #12] - 80345d4: 681b ldr r3, [r3, #0] - 80345d6: 62bb str r3, [r7, #40] ; 0x28 + 8034656: 68fb ldr r3, [r7, #12] + 8034658: 681b ldr r3, [r3, #0] + 803465a: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80345d8: 6abb ldr r3, [r7, #40] ; 0x28 - 80345da: e853 3f00 ldrex r3, [r3] - 80345de: 627b str r3, [r7, #36] ; 0x24 + 803465c: 6abb ldr r3, [r7, #40] ; 0x28 + 803465e: e853 3f00 ldrex r3, [r3] + 8034662: 627b str r3, [r7, #36] ; 0x24 return(result); - 80345e0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80345e2: f443 7390 orr.w r3, r3, #288 ; 0x120 - 80345e6: 677b str r3, [r7, #116] ; 0x74 - 80345e8: 68fb ldr r3, [r7, #12] - 80345ea: 681b ldr r3, [r3, #0] - 80345ec: 461a mov r2, r3 - 80345ee: 6f7b ldr r3, [r7, #116] ; 0x74 - 80345f0: 637b str r3, [r7, #52] ; 0x34 - 80345f2: 633a str r2, [r7, #48] ; 0x30 + 8034664: 6a7b ldr r3, [r7, #36] ; 0x24 + 8034666: f443 7390 orr.w r3, r3, #288 ; 0x120 + 803466a: 677b str r3, [r7, #116] ; 0x74 + 803466c: 68fb ldr r3, [r7, #12] + 803466e: 681b ldr r3, [r3, #0] + 8034670: 461a mov r2, r3 + 8034672: 6f7b ldr r3, [r7, #116] ; 0x74 + 8034674: 637b str r3, [r7, #52] ; 0x34 + 8034676: 633a str r2, [r7, #48] ; 0x30 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80345f4: 6b39 ldr r1, [r7, #48] ; 0x30 - 80345f6: 6b7a ldr r2, [r7, #52] ; 0x34 - 80345f8: e841 2300 strex r3, r2, [r1] - 80345fc: 62fb str r3, [r7, #44] ; 0x2c + 8034678: 6b39 ldr r1, [r7, #48] ; 0x30 + 803467a: 6b7a ldr r2, [r7, #52] ; 0x34 + 803467c: e841 2300 strex r3, r2, [r1] + 8034680: 62fb str r3, [r7, #44] ; 0x2c return(result); - 80345fe: 6afb ldr r3, [r7, #44] ; 0x2c - 8034600: 2b00 cmp r3, #0 - 8034602: d1e6 bne.n 80345d2 - 8034604: e018 b.n 8034638 + 8034682: 6afb ldr r3, [r7, #44] ; 0x2c + 8034684: 2b00 cmp r3, #0 + 8034686: d1e6 bne.n 8034656 + 8034688: e018 b.n 80346bc } else { ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - 8034606: 68fb ldr r3, [r7, #12] - 8034608: 681b ldr r3, [r3, #0] - 803460a: 617b str r3, [r7, #20] + 803468a: 68fb ldr r3, [r7, #12] + 803468c: 681b ldr r3, [r3, #0] + 803468e: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803460c: 697b ldr r3, [r7, #20] - 803460e: e853 3f00 ldrex r3, [r3] - 8034612: 613b str r3, [r7, #16] + 8034690: 697b ldr r3, [r7, #20] + 8034692: e853 3f00 ldrex r3, [r3] + 8034696: 613b str r3, [r7, #16] return(result); - 8034614: 693b ldr r3, [r7, #16] - 8034616: f043 0320 orr.w r3, r3, #32 - 803461a: 67bb str r3, [r7, #120] ; 0x78 - 803461c: 68fb ldr r3, [r7, #12] - 803461e: 681b ldr r3, [r3, #0] - 8034620: 461a mov r2, r3 - 8034622: 6fbb ldr r3, [r7, #120] ; 0x78 - 8034624: 623b str r3, [r7, #32] - 8034626: 61fa str r2, [r7, #28] + 8034698: 693b ldr r3, [r7, #16] + 803469a: f043 0320 orr.w r3, r3, #32 + 803469e: 67bb str r3, [r7, #120] ; 0x78 + 80346a0: 68fb ldr r3, [r7, #12] + 80346a2: 681b ldr r3, [r3, #0] + 80346a4: 461a mov r2, r3 + 80346a6: 6fbb ldr r3, [r7, #120] ; 0x78 + 80346a8: 623b str r3, [r7, #32] + 80346aa: 61fa str r2, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034628: 69f9 ldr r1, [r7, #28] - 803462a: 6a3a ldr r2, [r7, #32] - 803462c: e841 2300 strex r3, r2, [r1] - 8034630: 61bb str r3, [r7, #24] + 80346ac: 69f9 ldr r1, [r7, #28] + 80346ae: 6a3a ldr r2, [r7, #32] + 80346b0: e841 2300 strex r3, r2, [r1] + 80346b4: 61bb str r3, [r7, #24] return(result); - 8034632: 69bb ldr r3, [r7, #24] - 8034634: 2b00 cmp r3, #0 - 8034636: d1e6 bne.n 8034606 + 80346b6: 69bb ldr r3, [r7, #24] + 80346b8: 2b00 cmp r3, #0 + 80346ba: d1e6 bne.n 803468a } } return HAL_OK; - 8034638: 2300 movs r3, #0 -} - 803463a: 4618 mov r0, r3 - 803463c: 378c adds r7, #140 ; 0x8c - 803463e: 46bd mov sp, r7 - 8034640: f85d 7b04 ldr.w r7, [sp], #4 - 8034644: 4770 bx lr - 8034646: bf00 nop - 8034648: 08034f15 .word 0x08034f15 - 803464c: 08034c1d .word 0x08034c1d - 8034650: 08034abd .word 0x08034abd - 8034654: 0803495d .word 0x0803495d - -08034658 : + 80346bc: 2300 movs r3, #0 +} + 80346be: 4618 mov r0, r3 + 80346c0: 378c adds r7, #140 ; 0x8c + 80346c2: 46bd mov sp, r7 + 80346c4: f85d 7b04 ldr.w r7, [sp], #4 + 80346c8: 4770 bx lr + 80346ca: bf00 nop + 80346cc: 08034f99 .word 0x08034f99 + 80346d0: 08034ca1 .word 0x08034ca1 + 80346d4: 08034b41 .word 0x08034b41 + 80346d8: 080349e1 .word 0x080349e1 + +080346dc : * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). * @param huart UART handle. * @retval None */ static void UART_EndTxTransfer(UART_HandleTypeDef *huart) { - 8034658: b480 push {r7} - 803465a: b08f sub sp, #60 ; 0x3c - 803465c: af00 add r7, sp, #0 - 803465e: 6078 str r0, [r7, #4] + 80346dc: b480 push {r7} + 80346de: b08f sub sp, #60 ; 0x3c + 80346e0: af00 add r7, sp, #0 + 80346e2: 6078 str r0, [r7, #4] /* Disable TXEIE, TCIE, TXFT interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); - 8034660: 687b ldr r3, [r7, #4] - 8034662: 681b ldr r3, [r3, #0] - 8034664: 623b str r3, [r7, #32] + 80346e4: 687b ldr r3, [r7, #4] + 80346e6: 681b ldr r3, [r3, #0] + 80346e8: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034666: 6a3b ldr r3, [r7, #32] - 8034668: e853 3f00 ldrex r3, [r3] - 803466c: 61fb str r3, [r7, #28] + 80346ea: 6a3b ldr r3, [r7, #32] + 80346ec: e853 3f00 ldrex r3, [r3] + 80346f0: 61fb str r3, [r7, #28] return(result); - 803466e: 69fb ldr r3, [r7, #28] - 8034670: f023 03c0 bic.w r3, r3, #192 ; 0xc0 - 8034674: 637b str r3, [r7, #52] ; 0x34 - 8034676: 687b ldr r3, [r7, #4] - 8034678: 681b ldr r3, [r3, #0] - 803467a: 461a mov r2, r3 - 803467c: 6b7b ldr r3, [r7, #52] ; 0x34 - 803467e: 62fb str r3, [r7, #44] ; 0x2c - 8034680: 62ba str r2, [r7, #40] ; 0x28 + 80346f2: 69fb ldr r3, [r7, #28] + 80346f4: f023 03c0 bic.w r3, r3, #192 ; 0xc0 + 80346f8: 637b str r3, [r7, #52] ; 0x34 + 80346fa: 687b ldr r3, [r7, #4] + 80346fc: 681b ldr r3, [r3, #0] + 80346fe: 461a mov r2, r3 + 8034700: 6b7b ldr r3, [r7, #52] ; 0x34 + 8034702: 62fb str r3, [r7, #44] ; 0x2c + 8034704: 62ba str r2, [r7, #40] ; 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034682: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8034684: 6afa ldr r2, [r7, #44] ; 0x2c - 8034686: e841 2300 strex r3, r2, [r1] - 803468a: 627b str r3, [r7, #36] ; 0x24 + 8034706: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8034708: 6afa ldr r2, [r7, #44] ; 0x2c + 803470a: e841 2300 strex r3, r2, [r1] + 803470e: 627b str r3, [r7, #36] ; 0x24 return(result); - 803468c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803468e: 2b00 cmp r3, #0 - 8034690: d1e6 bne.n 8034660 + 8034710: 6a7b ldr r3, [r7, #36] ; 0x24 + 8034712: 2b00 cmp r3, #0 + 8034714: d1e6 bne.n 80346e4 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE)); - 8034692: 687b ldr r3, [r7, #4] - 8034694: 681b ldr r3, [r3, #0] - 8034696: 3308 adds r3, #8 - 8034698: 60fb str r3, [r7, #12] + 8034716: 687b ldr r3, [r7, #4] + 8034718: 681b ldr r3, [r3, #0] + 803471a: 3308 adds r3, #8 + 803471c: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803469a: 68fb ldr r3, [r7, #12] - 803469c: e853 3f00 ldrex r3, [r3] - 80346a0: 60bb str r3, [r7, #8] + 803471e: 68fb ldr r3, [r7, #12] + 8034720: e853 3f00 ldrex r3, [r3] + 8034724: 60bb str r3, [r7, #8] return(result); - 80346a2: 68bb ldr r3, [r7, #8] - 80346a4: f423 0300 bic.w r3, r3, #8388608 ; 0x800000 - 80346a8: 633b str r3, [r7, #48] ; 0x30 - 80346aa: 687b ldr r3, [r7, #4] - 80346ac: 681b ldr r3, [r3, #0] - 80346ae: 3308 adds r3, #8 - 80346b0: 6b3a ldr r2, [r7, #48] ; 0x30 - 80346b2: 61ba str r2, [r7, #24] - 80346b4: 617b str r3, [r7, #20] + 8034726: 68bb ldr r3, [r7, #8] + 8034728: f423 0300 bic.w r3, r3, #8388608 ; 0x800000 + 803472c: 633b str r3, [r7, #48] ; 0x30 + 803472e: 687b ldr r3, [r7, #4] + 8034730: 681b ldr r3, [r3, #0] + 8034732: 3308 adds r3, #8 + 8034734: 6b3a ldr r2, [r7, #48] ; 0x30 + 8034736: 61ba str r2, [r7, #24] + 8034738: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80346b6: 6979 ldr r1, [r7, #20] - 80346b8: 69ba ldr r2, [r7, #24] - 80346ba: e841 2300 strex r3, r2, [r1] - 80346be: 613b str r3, [r7, #16] + 803473a: 6979 ldr r1, [r7, #20] + 803473c: 69ba ldr r2, [r7, #24] + 803473e: e841 2300 strex r3, r2, [r1] + 8034742: 613b str r3, [r7, #16] return(result); - 80346c0: 693b ldr r3, [r7, #16] - 80346c2: 2b00 cmp r3, #0 - 80346c4: d1e5 bne.n 8034692 + 8034744: 693b ldr r3, [r7, #16] + 8034746: 2b00 cmp r3, #0 + 8034748: d1e5 bne.n 8034716 /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 80346c6: 687b ldr r3, [r7, #4] - 80346c8: 2220 movs r2, #32 - 80346ca: f8c3 2084 str.w r2, [r3, #132] ; 0x84 -} - 80346ce: bf00 nop - 80346d0: 373c adds r7, #60 ; 0x3c - 80346d2: 46bd mov sp, r7 - 80346d4: f85d 7b04 ldr.w r7, [sp], #4 - 80346d8: 4770 bx lr + 803474a: 687b ldr r3, [r7, #4] + 803474c: 2220 movs r2, #32 + 803474e: f8c3 2084 str.w r2, [r3, #132] ; 0x84 +} + 8034752: bf00 nop + 8034754: 373c adds r7, #60 ; 0x3c + 8034756: 46bd mov sp, r7 + 8034758: f85d 7b04 ldr.w r7, [sp], #4 + 803475c: 4770 bx lr ... -080346dc : +08034760 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 80346dc: b480 push {r7} - 80346de: b095 sub sp, #84 ; 0x54 - 80346e0: af00 add r7, sp, #0 - 80346e2: 6078 str r0, [r7, #4] + 8034760: b480 push {r7} + 8034762: b095 sub sp, #84 ; 0x54 + 8034764: af00 add r7, sp, #0 + 8034766: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 80346e4: 687b ldr r3, [r7, #4] - 80346e6: 681b ldr r3, [r3, #0] - 80346e8: 637b str r3, [r7, #52] ; 0x34 + 8034768: 687b ldr r3, [r7, #4] + 803476a: 681b ldr r3, [r3, #0] + 803476c: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80346ea: 6b7b ldr r3, [r7, #52] ; 0x34 - 80346ec: e853 3f00 ldrex r3, [r3] - 80346f0: 633b str r3, [r7, #48] ; 0x30 + 803476e: 6b7b ldr r3, [r7, #52] ; 0x34 + 8034770: e853 3f00 ldrex r3, [r3] + 8034774: 633b str r3, [r7, #48] ; 0x30 return(result); - 80346f2: 6b3b ldr r3, [r7, #48] ; 0x30 - 80346f4: f423 7390 bic.w r3, r3, #288 ; 0x120 - 80346f8: 64fb str r3, [r7, #76] ; 0x4c - 80346fa: 687b ldr r3, [r7, #4] - 80346fc: 681b ldr r3, [r3, #0] - 80346fe: 461a mov r2, r3 - 8034700: 6cfb ldr r3, [r7, #76] ; 0x4c - 8034702: 643b str r3, [r7, #64] ; 0x40 - 8034704: 63fa str r2, [r7, #60] ; 0x3c + 8034776: 6b3b ldr r3, [r7, #48] ; 0x30 + 8034778: f423 7390 bic.w r3, r3, #288 ; 0x120 + 803477c: 64fb str r3, [r7, #76] ; 0x4c + 803477e: 687b ldr r3, [r7, #4] + 8034780: 681b ldr r3, [r3, #0] + 8034782: 461a mov r2, r3 + 8034784: 6cfb ldr r3, [r7, #76] ; 0x4c + 8034786: 643b str r3, [r7, #64] ; 0x40 + 8034788: 63fa str r2, [r7, #60] ; 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034706: 6bf9 ldr r1, [r7, #60] ; 0x3c - 8034708: 6c3a ldr r2, [r7, #64] ; 0x40 - 803470a: e841 2300 strex r3, r2, [r1] - 803470e: 63bb str r3, [r7, #56] ; 0x38 + 803478a: 6bf9 ldr r1, [r7, #60] ; 0x3c + 803478c: 6c3a ldr r2, [r7, #64] ; 0x40 + 803478e: e841 2300 strex r3, r2, [r1] + 8034792: 63bb str r3, [r7, #56] ; 0x38 return(result); - 8034710: 6bbb ldr r3, [r7, #56] ; 0x38 - 8034712: 2b00 cmp r3, #0 - 8034714: d1e6 bne.n 80346e4 + 8034794: 6bbb ldr r3, [r7, #56] ; 0x38 + 8034796: 2b00 cmp r3, #0 + 8034798: d1e6 bne.n 8034768 ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 8034716: 687b ldr r3, [r7, #4] - 8034718: 681b ldr r3, [r3, #0] - 803471a: 3308 adds r3, #8 - 803471c: 623b str r3, [r7, #32] + 803479a: 687b ldr r3, [r7, #4] + 803479c: 681b ldr r3, [r3, #0] + 803479e: 3308 adds r3, #8 + 80347a0: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803471e: 6a3b ldr r3, [r7, #32] - 8034720: e853 3f00 ldrex r3, [r3] - 8034724: 61fb str r3, [r7, #28] + 80347a2: 6a3b ldr r3, [r7, #32] + 80347a4: e853 3f00 ldrex r3, [r3] + 80347a8: 61fb str r3, [r7, #28] return(result); - 8034726: 69fa ldr r2, [r7, #28] - 8034728: 4b1e ldr r3, [pc, #120] ; (80347a4 ) - 803472a: 4013 ands r3, r2 - 803472c: 64bb str r3, [r7, #72] ; 0x48 - 803472e: 687b ldr r3, [r7, #4] - 8034730: 681b ldr r3, [r3, #0] - 8034732: 3308 adds r3, #8 - 8034734: 6cba ldr r2, [r7, #72] ; 0x48 - 8034736: 62fa str r2, [r7, #44] ; 0x2c - 8034738: 62bb str r3, [r7, #40] ; 0x28 + 80347aa: 69fa ldr r2, [r7, #28] + 80347ac: 4b1e ldr r3, [pc, #120] ; (8034828 ) + 80347ae: 4013 ands r3, r2 + 80347b0: 64bb str r3, [r7, #72] ; 0x48 + 80347b2: 687b ldr r3, [r7, #4] + 80347b4: 681b ldr r3, [r3, #0] + 80347b6: 3308 adds r3, #8 + 80347b8: 6cba ldr r2, [r7, #72] ; 0x48 + 80347ba: 62fa str r2, [r7, #44] ; 0x2c + 80347bc: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803473a: 6ab9 ldr r1, [r7, #40] ; 0x28 - 803473c: 6afa ldr r2, [r7, #44] ; 0x2c - 803473e: e841 2300 strex r3, r2, [r1] - 8034742: 627b str r3, [r7, #36] ; 0x24 + 80347be: 6ab9 ldr r1, [r7, #40] ; 0x28 + 80347c0: 6afa ldr r2, [r7, #44] ; 0x2c + 80347c2: e841 2300 strex r3, r2, [r1] + 80347c6: 627b str r3, [r7, #36] ; 0x24 return(result); - 8034744: 6a7b ldr r3, [r7, #36] ; 0x24 - 8034746: 2b00 cmp r3, #0 - 8034748: d1e5 bne.n 8034716 + 80347c8: 6a7b ldr r3, [r7, #36] ; 0x24 + 80347ca: 2b00 cmp r3, #0 + 80347cc: d1e5 bne.n 803479a /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 803474a: 687b ldr r3, [r7, #4] - 803474c: 6edb ldr r3, [r3, #108] ; 0x6c - 803474e: 2b01 cmp r3, #1 - 8034750: d118 bne.n 8034784 + 80347ce: 687b ldr r3, [r7, #4] + 80347d0: 6edb ldr r3, [r3, #108] ; 0x6c + 80347d2: 2b01 cmp r3, #1 + 80347d4: d118 bne.n 8034808 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8034752: 687b ldr r3, [r7, #4] - 8034754: 681b ldr r3, [r3, #0] - 8034756: 60fb str r3, [r7, #12] + 80347d6: 687b ldr r3, [r7, #4] + 80347d8: 681b ldr r3, [r3, #0] + 80347da: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034758: 68fb ldr r3, [r7, #12] - 803475a: e853 3f00 ldrex r3, [r3] - 803475e: 60bb str r3, [r7, #8] + 80347dc: 68fb ldr r3, [r7, #12] + 80347de: e853 3f00 ldrex r3, [r3] + 80347e2: 60bb str r3, [r7, #8] return(result); - 8034760: 68bb ldr r3, [r7, #8] - 8034762: f023 0310 bic.w r3, r3, #16 - 8034766: 647b str r3, [r7, #68] ; 0x44 - 8034768: 687b ldr r3, [r7, #4] - 803476a: 681b ldr r3, [r3, #0] - 803476c: 461a mov r2, r3 - 803476e: 6c7b ldr r3, [r7, #68] ; 0x44 - 8034770: 61bb str r3, [r7, #24] - 8034772: 617a str r2, [r7, #20] + 80347e4: 68bb ldr r3, [r7, #8] + 80347e6: f023 0310 bic.w r3, r3, #16 + 80347ea: 647b str r3, [r7, #68] ; 0x44 + 80347ec: 687b ldr r3, [r7, #4] + 80347ee: 681b ldr r3, [r3, #0] + 80347f0: 461a mov r2, r3 + 80347f2: 6c7b ldr r3, [r7, #68] ; 0x44 + 80347f4: 61bb str r3, [r7, #24] + 80347f6: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034774: 6979 ldr r1, [r7, #20] - 8034776: 69ba ldr r2, [r7, #24] - 8034778: e841 2300 strex r3, r2, [r1] - 803477c: 613b str r3, [r7, #16] + 80347f8: 6979 ldr r1, [r7, #20] + 80347fa: 69ba ldr r2, [r7, #24] + 80347fc: e841 2300 strex r3, r2, [r1] + 8034800: 613b str r3, [r7, #16] return(result); - 803477e: 693b ldr r3, [r7, #16] - 8034780: 2b00 cmp r3, #0 - 8034782: d1e6 bne.n 8034752 + 8034802: 693b ldr r3, [r7, #16] + 8034804: 2b00 cmp r3, #0 + 8034806: d1e6 bne.n 80347d6 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8034784: 687b ldr r3, [r7, #4] - 8034786: 2220 movs r2, #32 - 8034788: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034808: 687b ldr r3, [r7, #4] + 803480a: 2220 movs r2, #32 + 803480c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 803478c: 687b ldr r3, [r7, #4] - 803478e: 2200 movs r2, #0 - 8034790: 66da str r2, [r3, #108] ; 0x6c + 8034810: 687b ldr r3, [r7, #4] + 8034812: 2200 movs r2, #0 + 8034814: 66da str r2, [r3, #108] ; 0x6c /* Reset RxIsr function pointer */ huart->RxISR = NULL; - 8034792: 687b ldr r3, [r7, #4] - 8034794: 2200 movs r2, #0 - 8034796: 671a str r2, [r3, #112] ; 0x70 -} - 8034798: bf00 nop - 803479a: 3754 adds r7, #84 ; 0x54 - 803479c: 46bd mov sp, r7 - 803479e: f85d 7b04 ldr.w r7, [sp], #4 - 80347a2: 4770 bx lr - 80347a4: effffffe .word 0xeffffffe - -080347a8 : + 8034816: 687b ldr r3, [r7, #4] + 8034818: 2200 movs r2, #0 + 803481a: 671a str r2, [r3, #112] ; 0x70 +} + 803481c: bf00 nop + 803481e: 3754 adds r7, #84 ; 0x54 + 8034820: 46bd mov sp, r7 + 8034822: f85d 7b04 ldr.w r7, [sp], #4 + 8034826: 4770 bx lr + 8034828: effffffe .word 0xeffffffe + +0803482c : * @brief DMA UART transmit process complete callback. * @param hdma DMA handle. * @retval None */ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) { - 80347a8: b580 push {r7, lr} - 80347aa: b090 sub sp, #64 ; 0x40 - 80347ac: af00 add r7, sp, #0 - 80347ae: 6078 str r0, [r7, #4] + 803482c: b580 push {r7, lr} + 803482e: b090 sub sp, #64 ; 0x40 + 8034830: af00 add r7, sp, #0 + 8034832: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 80347b0: 687b ldr r3, [r7, #4] - 80347b2: 6b9b ldr r3, [r3, #56] ; 0x38 - 80347b4: 63fb str r3, [r7, #60] ; 0x3c + 8034834: 687b ldr r3, [r7, #4] + 8034836: 6b9b ldr r3, [r3, #56] ; 0x38 + 8034838: 63fb str r3, [r7, #60] ; 0x3c /* DMA Normal mode */ if (hdma->Init.Mode != DMA_CIRCULAR) - 80347b6: 687b ldr r3, [r7, #4] - 80347b8: 69db ldr r3, [r3, #28] - 80347ba: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 80347be: d037 beq.n 8034830 + 803483a: 687b ldr r3, [r7, #4] + 803483c: 69db ldr r3, [r3, #28] + 803483e: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 8034842: d037 beq.n 80348b4 { huart->TxXferCount = 0U; - 80347c0: 6bfb ldr r3, [r7, #60] ; 0x3c - 80347c2: 2200 movs r2, #0 - 80347c4: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 8034844: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034846: 2200 movs r2, #0 + 8034848: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 /* Disable the DMA transfer for transmit request by resetting the DMAT bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); - 80347c8: 6bfb ldr r3, [r7, #60] ; 0x3c - 80347ca: 681b ldr r3, [r3, #0] - 80347cc: 3308 adds r3, #8 - 80347ce: 627b str r3, [r7, #36] ; 0x24 + 803484c: 6bfb ldr r3, [r7, #60] ; 0x3c + 803484e: 681b ldr r3, [r3, #0] + 8034850: 3308 adds r3, #8 + 8034852: 627b str r3, [r7, #36] ; 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80347d0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80347d2: e853 3f00 ldrex r3, [r3] - 80347d6: 623b str r3, [r7, #32] + 8034854: 6a7b ldr r3, [r7, #36] ; 0x24 + 8034856: e853 3f00 ldrex r3, [r3] + 803485a: 623b str r3, [r7, #32] return(result); - 80347d8: 6a3b ldr r3, [r7, #32] - 80347da: f023 0380 bic.w r3, r3, #128 ; 0x80 - 80347de: 63bb str r3, [r7, #56] ; 0x38 - 80347e0: 6bfb ldr r3, [r7, #60] ; 0x3c - 80347e2: 681b ldr r3, [r3, #0] - 80347e4: 3308 adds r3, #8 - 80347e6: 6bba ldr r2, [r7, #56] ; 0x38 - 80347e8: 633a str r2, [r7, #48] ; 0x30 - 80347ea: 62fb str r3, [r7, #44] ; 0x2c + 803485c: 6a3b ldr r3, [r7, #32] + 803485e: f023 0380 bic.w r3, r3, #128 ; 0x80 + 8034862: 63bb str r3, [r7, #56] ; 0x38 + 8034864: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034866: 681b ldr r3, [r3, #0] + 8034868: 3308 adds r3, #8 + 803486a: 6bba ldr r2, [r7, #56] ; 0x38 + 803486c: 633a str r2, [r7, #48] ; 0x30 + 803486e: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80347ec: 6af9 ldr r1, [r7, #44] ; 0x2c - 80347ee: 6b3a ldr r2, [r7, #48] ; 0x30 - 80347f0: e841 2300 strex r3, r2, [r1] - 80347f4: 62bb str r3, [r7, #40] ; 0x28 + 8034870: 6af9 ldr r1, [r7, #44] ; 0x2c + 8034872: 6b3a ldr r2, [r7, #48] ; 0x30 + 8034874: e841 2300 strex r3, r2, [r1] + 8034878: 62bb str r3, [r7, #40] ; 0x28 return(result); - 80347f6: 6abb ldr r3, [r7, #40] ; 0x28 - 80347f8: 2b00 cmp r3, #0 - 80347fa: d1e5 bne.n 80347c8 + 803487a: 6abb ldr r3, [r7, #40] ; 0x28 + 803487c: 2b00 cmp r3, #0 + 803487e: d1e5 bne.n 803484c /* Enable the UART Transmit Complete Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 80347fc: 6bfb ldr r3, [r7, #60] ; 0x3c - 80347fe: 681b ldr r3, [r3, #0] - 8034800: 613b str r3, [r7, #16] + 8034880: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034882: 681b ldr r3, [r3, #0] + 8034884: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034802: 693b ldr r3, [r7, #16] - 8034804: e853 3f00 ldrex r3, [r3] - 8034808: 60fb str r3, [r7, #12] + 8034886: 693b ldr r3, [r7, #16] + 8034888: e853 3f00 ldrex r3, [r3] + 803488c: 60fb str r3, [r7, #12] return(result); - 803480a: 68fb ldr r3, [r7, #12] - 803480c: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8034810: 637b str r3, [r7, #52] ; 0x34 - 8034812: 6bfb ldr r3, [r7, #60] ; 0x3c - 8034814: 681b ldr r3, [r3, #0] - 8034816: 461a mov r2, r3 - 8034818: 6b7b ldr r3, [r7, #52] ; 0x34 - 803481a: 61fb str r3, [r7, #28] - 803481c: 61ba str r2, [r7, #24] + 803488e: 68fb ldr r3, [r7, #12] + 8034890: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8034894: 637b str r3, [r7, #52] ; 0x34 + 8034896: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034898: 681b ldr r3, [r3, #0] + 803489a: 461a mov r2, r3 + 803489c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803489e: 61fb str r3, [r7, #28] + 80348a0: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803481e: 69b9 ldr r1, [r7, #24] - 8034820: 69fa ldr r2, [r7, #28] - 8034822: e841 2300 strex r3, r2, [r1] - 8034826: 617b str r3, [r7, #20] + 80348a2: 69b9 ldr r1, [r7, #24] + 80348a4: 69fa ldr r2, [r7, #28] + 80348a6: e841 2300 strex r3, r2, [r1] + 80348aa: 617b str r3, [r7, #20] return(result); - 8034828: 697b ldr r3, [r7, #20] - 803482a: 2b00 cmp r3, #0 - 803482c: d1e6 bne.n 80347fc + 80348ac: 697b ldr r3, [r7, #20] + 80348ae: 2b00 cmp r3, #0 + 80348b0: d1e6 bne.n 8034880 #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } } - 803482e: e002 b.n 8034836 + 80348b2: e002 b.n 80348ba HAL_UART_TxCpltCallback(huart); - 8034830: 6bf8 ldr r0, [r7, #60] ; 0x3c - 8034832: f7ed f9d7 bl 8021be4 + 80348b4: 6bf8 ldr r0, [r7, #60] ; 0x3c + 80348b6: f7ed f995 bl 8021be4 } - 8034836: bf00 nop - 8034838: 3740 adds r7, #64 ; 0x40 - 803483a: 46bd mov sp, r7 - 803483c: bd80 pop {r7, pc} + 80348ba: bf00 nop + 80348bc: 3740 adds r7, #64 ; 0x40 + 80348be: 46bd mov sp, r7 + 80348c0: bd80 pop {r7, pc} -0803483e : +080348c2 : * @brief DMA UART transmit process half complete callback. * @param hdma DMA handle. * @retval None */ static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) { - 803483e: b580 push {r7, lr} - 8034840: b084 sub sp, #16 - 8034842: af00 add r7, sp, #0 - 8034844: 6078 str r0, [r7, #4] + 80348c2: b580 push {r7, lr} + 80348c4: b084 sub sp, #16 + 80348c6: af00 add r7, sp, #0 + 80348c8: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8034846: 687b ldr r3, [r7, #4] - 8034848: 6b9b ldr r3, [r3, #56] ; 0x38 - 803484a: 60fb str r3, [r7, #12] + 80348ca: 687b ldr r3, [r7, #4] + 80348cc: 6b9b ldr r3, [r3, #56] ; 0x38 + 80348ce: 60fb str r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx Half complete callback*/ huart->TxHalfCpltCallback(huart); #else /*Call legacy weak Tx Half complete callback*/ HAL_UART_TxHalfCpltCallback(huart); - 803484c: 68f8 ldr r0, [r7, #12] - 803484e: f7fe fe9b bl 8033588 + 80348d0: 68f8 ldr r0, [r7, #12] + 80348d2: f7fe fe9b bl 803360c #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8034852: bf00 nop - 8034854: 3710 adds r7, #16 - 8034856: 46bd mov sp, r7 - 8034858: bd80 pop {r7, pc} + 80348d6: bf00 nop + 80348d8: 3710 adds r7, #16 + 80348da: 46bd mov sp, r7 + 80348dc: bd80 pop {r7, pc} -0803485a : +080348de : * @brief DMA UART communication error callback. * @param hdma DMA handle. * @retval None */ static void UART_DMAError(DMA_HandleTypeDef *hdma) { - 803485a: b580 push {r7, lr} - 803485c: b086 sub sp, #24 - 803485e: af00 add r7, sp, #0 - 8034860: 6078 str r0, [r7, #4] + 80348de: b580 push {r7, lr} + 80348e0: b086 sub sp, #24 + 80348e2: af00 add r7, sp, #0 + 80348e4: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 8034862: 687b ldr r3, [r7, #4] - 8034864: 6b9b ldr r3, [r3, #56] ; 0x38 - 8034866: 617b str r3, [r7, #20] + 80348e6: 687b ldr r3, [r7, #4] + 80348e8: 6b9b ldr r3, [r3, #56] ; 0x38 + 80348ea: 617b str r3, [r7, #20] const HAL_UART_StateTypeDef gstate = huart->gState; - 8034868: 697b ldr r3, [r7, #20] - 803486a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 803486e: 613b str r3, [r7, #16] + 80348ec: 697b ldr r3, [r7, #20] + 80348ee: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 80348f2: 613b str r3, [r7, #16] const HAL_UART_StateTypeDef rxstate = huart->RxState; - 8034870: 697b ldr r3, [r7, #20] - 8034872: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034876: 60fb str r3, [r7, #12] + 80348f4: 697b ldr r3, [r7, #20] + 80348f6: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 80348fa: 60fb str r3, [r7, #12] /* Stop UART DMA Tx request if ongoing */ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && - 8034878: 697b ldr r3, [r7, #20] - 803487a: 681b ldr r3, [r3, #0] - 803487c: 689b ldr r3, [r3, #8] - 803487e: f003 0380 and.w r3, r3, #128 ; 0x80 - 8034882: 2b80 cmp r3, #128 ; 0x80 - 8034884: d109 bne.n 803489a - 8034886: 693b ldr r3, [r7, #16] - 8034888: 2b21 cmp r3, #33 ; 0x21 - 803488a: d106 bne.n 803489a + 80348fc: 697b ldr r3, [r7, #20] + 80348fe: 681b ldr r3, [r3, #0] + 8034900: 689b ldr r3, [r3, #8] + 8034902: f003 0380 and.w r3, r3, #128 ; 0x80 + 8034906: 2b80 cmp r3, #128 ; 0x80 + 8034908: d109 bne.n 803491e + 803490a: 693b ldr r3, [r7, #16] + 803490c: 2b21 cmp r3, #33 ; 0x21 + 803490e: d106 bne.n 803491e (gstate == HAL_UART_STATE_BUSY_TX)) { huart->TxXferCount = 0U; - 803488c: 697b ldr r3, [r7, #20] - 803488e: 2200 movs r2, #0 - 8034890: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 8034910: 697b ldr r3, [r7, #20] + 8034912: 2200 movs r2, #0 + 8034914: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 UART_EndTxTransfer(huart); - 8034894: 6978 ldr r0, [r7, #20] - 8034896: f7ff fedf bl 8034658 + 8034918: 6978 ldr r0, [r7, #20] + 803491a: f7ff fedf bl 80346dc } /* Stop UART DMA Rx request if ongoing */ if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && - 803489a: 697b ldr r3, [r7, #20] - 803489c: 681b ldr r3, [r3, #0] - 803489e: 689b ldr r3, [r3, #8] - 80348a0: f003 0340 and.w r3, r3, #64 ; 0x40 - 80348a4: 2b40 cmp r3, #64 ; 0x40 - 80348a6: d109 bne.n 80348bc - 80348a8: 68fb ldr r3, [r7, #12] - 80348aa: 2b22 cmp r3, #34 ; 0x22 - 80348ac: d106 bne.n 80348bc + 803491e: 697b ldr r3, [r7, #20] + 8034920: 681b ldr r3, [r3, #0] + 8034922: 689b ldr r3, [r3, #8] + 8034924: f003 0340 and.w r3, r3, #64 ; 0x40 + 8034928: 2b40 cmp r3, #64 ; 0x40 + 803492a: d109 bne.n 8034940 + 803492c: 68fb ldr r3, [r7, #12] + 803492e: 2b22 cmp r3, #34 ; 0x22 + 8034930: d106 bne.n 8034940 (rxstate == HAL_UART_STATE_BUSY_RX)) { huart->RxXferCount = 0U; - 80348ae: 697b ldr r3, [r7, #20] - 80348b0: 2200 movs r2, #0 - 80348b2: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 8034932: 697b ldr r3, [r7, #20] + 8034934: 2200 movs r2, #0 + 8034936: f8a3 205e strh.w r2, [r3, #94] ; 0x5e UART_EndRxTransfer(huart); - 80348b6: 6978 ldr r0, [r7, #20] - 80348b8: f7ff ff10 bl 80346dc + 803493a: 6978 ldr r0, [r7, #20] + 803493c: f7ff ff10 bl 8034760 } huart->ErrorCode |= HAL_UART_ERROR_DMA; - 80348bc: 697b ldr r3, [r7, #20] - 80348be: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 80348c2: f043 0210 orr.w r2, r3, #16 - 80348c6: 697b ldr r3, [r7, #20] - 80348c8: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8034940: 697b ldr r3, [r7, #20] + 8034942: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8034946: f043 0210 orr.w r2, r3, #16 + 803494a: 697b ldr r3, [r7, #20] + 803494c: f8c3 208c str.w r2, [r3, #140] ; 0x8c #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80348cc: 6978 ldr r0, [r7, #20] - 80348ce: f7fe fe65 bl 803359c + 8034950: 6978 ldr r0, [r7, #20] + 8034952: f7fe fe65 bl 8033620 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 80348d2: bf00 nop - 80348d4: 3718 adds r7, #24 - 80348d6: 46bd mov sp, r7 - 80348d8: bd80 pop {r7, pc} + 8034956: bf00 nop + 8034958: 3718 adds r7, #24 + 803495a: 46bd mov sp, r7 + 803495c: bd80 pop {r7, pc} -080348da : +0803495e : * (To be called at end of DMA Abort procedure following error occurrence). * @param hdma DMA handle. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 80348da: b580 push {r7, lr} - 80348dc: b084 sub sp, #16 - 80348de: af00 add r7, sp, #0 - 80348e0: 6078 str r0, [r7, #4] + 803495e: b580 push {r7, lr} + 8034960: b084 sub sp, #16 + 8034962: af00 add r7, sp, #0 + 8034964: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 80348e2: 687b ldr r3, [r7, #4] - 80348e4: 6b9b ldr r3, [r3, #56] ; 0x38 - 80348e6: 60fb str r3, [r7, #12] + 8034966: 687b ldr r3, [r7, #4] + 8034968: 6b9b ldr r3, [r3, #56] ; 0x38 + 803496a: 60fb str r3, [r7, #12] huart->RxXferCount = 0U; - 80348e8: 68fb ldr r3, [r7, #12] - 80348ea: 2200 movs r2, #0 - 80348ec: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 803496c: 68fb ldr r3, [r7, #12] + 803496e: 2200 movs r2, #0 + 8034970: f8a3 205e strh.w r2, [r3, #94] ; 0x5e huart->TxXferCount = 0U; - 80348f0: 68fb ldr r3, [r7, #12] - 80348f2: 2200 movs r2, #0 - 80348f4: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 + 8034974: 68fb ldr r3, [r7, #12] + 8034976: 2200 movs r2, #0 + 8034978: f8a3 2056 strh.w r2, [r3, #86] ; 0x56 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80348f8: 68f8 ldr r0, [r7, #12] - 80348fa: f7fe fe4f bl 803359c + 803497c: 68f8 ldr r0, [r7, #12] + 803497e: f7fe fe4f bl 8033620 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 80348fe: bf00 nop - 8034900: 3710 adds r7, #16 - 8034902: 46bd mov sp, r7 - 8034904: bd80 pop {r7, pc} + 8034982: bf00 nop + 8034984: 3710 adds r7, #16 + 8034986: 46bd mov sp, r7 + 8034988: bd80 pop {r7, pc} -08034906 : +0803498a : * @param huart pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 8034906: b580 push {r7, lr} - 8034908: b088 sub sp, #32 - 803490a: af00 add r7, sp, #0 - 803490c: 6078 str r0, [r7, #4] + 803498a: b580 push {r7, lr} + 803498c: b088 sub sp, #32 + 803498e: af00 add r7, sp, #0 + 8034990: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 803490e: 687b ldr r3, [r7, #4] - 8034910: 681b ldr r3, [r3, #0] - 8034912: 60fb str r3, [r7, #12] + 8034992: 687b ldr r3, [r7, #4] + 8034994: 681b ldr r3, [r3, #0] + 8034996: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034914: 68fb ldr r3, [r7, #12] - 8034916: e853 3f00 ldrex r3, [r3] - 803491a: 60bb str r3, [r7, #8] + 8034998: 68fb ldr r3, [r7, #12] + 803499a: e853 3f00 ldrex r3, [r3] + 803499e: 60bb str r3, [r7, #8] return(result); - 803491c: 68bb ldr r3, [r7, #8] - 803491e: f023 0340 bic.w r3, r3, #64 ; 0x40 - 8034922: 61fb str r3, [r7, #28] - 8034924: 687b ldr r3, [r7, #4] - 8034926: 681b ldr r3, [r3, #0] - 8034928: 461a mov r2, r3 - 803492a: 69fb ldr r3, [r7, #28] - 803492c: 61bb str r3, [r7, #24] - 803492e: 617a str r2, [r7, #20] + 80349a0: 68bb ldr r3, [r7, #8] + 80349a2: f023 0340 bic.w r3, r3, #64 ; 0x40 + 80349a6: 61fb str r3, [r7, #28] + 80349a8: 687b ldr r3, [r7, #4] + 80349aa: 681b ldr r3, [r3, #0] + 80349ac: 461a mov r2, r3 + 80349ae: 69fb ldr r3, [r7, #28] + 80349b0: 61bb str r3, [r7, #24] + 80349b2: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034930: 6979 ldr r1, [r7, #20] - 8034932: 69ba ldr r2, [r7, #24] - 8034934: e841 2300 strex r3, r2, [r1] - 8034938: 613b str r3, [r7, #16] + 80349b4: 6979 ldr r1, [r7, #20] + 80349b6: 69ba ldr r2, [r7, #24] + 80349b8: e841 2300 strex r3, r2, [r1] + 80349bc: 613b str r3, [r7, #16] return(result); - 803493a: 693b ldr r3, [r7, #16] - 803493c: 2b00 cmp r3, #0 - 803493e: d1e6 bne.n 803490e + 80349be: 693b ldr r3, [r7, #16] + 80349c0: 2b00 cmp r3, #0 + 80349c2: d1e6 bne.n 8034992 /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8034940: 687b ldr r3, [r7, #4] - 8034942: 2220 movs r2, #32 - 8034944: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80349c4: 687b ldr r3, [r7, #4] + 80349c6: 2220 movs r2, #32 + 80349c8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Cleat TxISR function pointer */ huart->TxISR = NULL; - 8034948: 687b ldr r3, [r7, #4] - 803494a: 2200 movs r2, #0 - 803494c: 675a str r2, [r3, #116] ; 0x74 + 80349cc: 687b ldr r3, [r7, #4] + 80349ce: 2200 movs r2, #0 + 80349d0: 675a str r2, [r3, #116] ; 0x74 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 803494e: 6878 ldr r0, [r7, #4] - 8034950: f7ed f948 bl 8021be4 + 80349d2: 6878 ldr r0, [r7, #4] + 80349d4: f7ed f906 bl 8021be4 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8034954: bf00 nop - 8034956: 3720 adds r7, #32 - 8034958: 46bd mov sp, r7 - 803495a: bd80 pop {r7, pc} + 80349d8: bf00 nop + 80349da: 3720 adds r7, #32 + 80349dc: 46bd mov sp, r7 + 80349de: bd80 pop {r7, pc} -0803495c : +080349e0 : * @brief RX interrupt handler for 7 or 8 bits data word length . * @param huart UART handle. * @retval None */ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) { - 803495c: b580 push {r7, lr} - 803495e: b096 sub sp, #88 ; 0x58 - 8034960: af00 add r7, sp, #0 - 8034962: 6078 str r0, [r7, #4] + 80349e0: b580 push {r7, lr} + 80349e2: b096 sub sp, #88 ; 0x58 + 80349e4: af00 add r7, sp, #0 + 80349e6: 6078 str r0, [r7, #4] uint16_t uhMask = huart->Mask; - 8034964: 687b ldr r3, [r7, #4] - 8034966: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803496a: f8a7 3056 strh.w r3, [r7, #86] ; 0x56 + 80349e8: 687b ldr r3, [r7, #4] + 80349ea: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 80349ee: f8a7 3056 strh.w r3, [r7, #86] ; 0x56 uint16_t uhdata; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 803496e: 687b ldr r3, [r7, #4] - 8034970: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034974: 2b22 cmp r3, #34 ; 0x22 - 8034976: f040 8095 bne.w 8034aa4 + 80349f2: 687b ldr r3, [r7, #4] + 80349f4: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 80349f8: 2b22 cmp r3, #34 ; 0x22 + 80349fa: f040 8095 bne.w 8034b28 { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 803497a: 687b ldr r3, [r7, #4] - 803497c: 681b ldr r3, [r3, #0] - 803497e: 6a5b ldr r3, [r3, #36] ; 0x24 - 8034980: f8a7 3054 strh.w r3, [r7, #84] ; 0x54 + 80349fe: 687b ldr r3, [r7, #4] + 8034a00: 681b ldr r3, [r3, #0] + 8034a02: 6a5b ldr r3, [r3, #36] ; 0x24 + 8034a04: f8a7 3054 strh.w r3, [r7, #84] ; 0x54 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); - 8034984: f8b7 3054 ldrh.w r3, [r7, #84] ; 0x54 - 8034988: b2d9 uxtb r1, r3 - 803498a: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56 - 803498e: b2da uxtb r2, r3 - 8034990: 687b ldr r3, [r7, #4] - 8034992: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034994: 400a ands r2, r1 - 8034996: b2d2 uxtb r2, r2 - 8034998: 701a strb r2, [r3, #0] + 8034a08: f8b7 3054 ldrh.w r3, [r7, #84] ; 0x54 + 8034a0c: b2d9 uxtb r1, r3 + 8034a0e: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56 + 8034a12: b2da uxtb r2, r3 + 8034a14: 687b ldr r3, [r7, #4] + 8034a16: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034a18: 400a ands r2, r1 + 8034a1a: b2d2 uxtb r2, r2 + 8034a1c: 701a strb r2, [r3, #0] huart->pRxBuffPtr++; - 803499a: 687b ldr r3, [r7, #4] - 803499c: 6d9b ldr r3, [r3, #88] ; 0x58 - 803499e: 1c5a adds r2, r3, #1 - 80349a0: 687b ldr r3, [r7, #4] - 80349a2: 659a str r2, [r3, #88] ; 0x58 + 8034a1e: 687b ldr r3, [r7, #4] + 8034a20: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034a22: 1c5a adds r2, r3, #1 + 8034a24: 687b ldr r3, [r7, #4] + 8034a26: 659a str r2, [r3, #88] ; 0x58 huart->RxXferCount--; - 80349a4: 687b ldr r3, [r7, #4] - 80349a6: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 80349aa: b29b uxth r3, r3 - 80349ac: 3b01 subs r3, #1 - 80349ae: b29a uxth r2, r3 - 80349b0: 687b ldr r3, [r7, #4] - 80349b2: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 8034a28: 687b ldr r3, [r7, #4] + 8034a2a: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034a2e: b29b uxth r3, r3 + 8034a30: 3b01 subs r3, #1 + 8034a32: b29a uxth r2, r3 + 8034a34: 687b ldr r3, [r7, #4] + 8034a36: f8a3 205e strh.w r2, [r3, #94] ; 0x5e if (huart->RxXferCount == 0U) - 80349b6: 687b ldr r3, [r7, #4] - 80349b8: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 80349bc: b29b uxth r3, r3 - 80349be: 2b00 cmp r3, #0 - 80349c0: d178 bne.n 8034ab4 + 8034a3a: 687b ldr r3, [r7, #4] + 8034a3c: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034a40: b29b uxth r3, r3 + 8034a42: 2b00 cmp r3, #0 + 8034a44: d178 bne.n 8034b38 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 80349c2: 687b ldr r3, [r7, #4] - 80349c4: 681b ldr r3, [r3, #0] - 80349c6: 63bb str r3, [r7, #56] ; 0x38 + 8034a46: 687b ldr r3, [r7, #4] + 8034a48: 681b ldr r3, [r3, #0] + 8034a4a: 63bb str r3, [r7, #56] ; 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80349c8: 6bbb ldr r3, [r7, #56] ; 0x38 - 80349ca: e853 3f00 ldrex r3, [r3] - 80349ce: 637b str r3, [r7, #52] ; 0x34 + 8034a4c: 6bbb ldr r3, [r7, #56] ; 0x38 + 8034a4e: e853 3f00 ldrex r3, [r3] + 8034a52: 637b str r3, [r7, #52] ; 0x34 return(result); - 80349d0: 6b7b ldr r3, [r7, #52] ; 0x34 - 80349d2: f423 7390 bic.w r3, r3, #288 ; 0x120 - 80349d6: 653b str r3, [r7, #80] ; 0x50 - 80349d8: 687b ldr r3, [r7, #4] - 80349da: 681b ldr r3, [r3, #0] - 80349dc: 461a mov r2, r3 - 80349de: 6d3b ldr r3, [r7, #80] ; 0x50 - 80349e0: 647b str r3, [r7, #68] ; 0x44 - 80349e2: 643a str r2, [r7, #64] ; 0x40 + 8034a54: 6b7b ldr r3, [r7, #52] ; 0x34 + 8034a56: f423 7390 bic.w r3, r3, #288 ; 0x120 + 8034a5a: 653b str r3, [r7, #80] ; 0x50 + 8034a5c: 687b ldr r3, [r7, #4] + 8034a5e: 681b ldr r3, [r3, #0] + 8034a60: 461a mov r2, r3 + 8034a62: 6d3b ldr r3, [r7, #80] ; 0x50 + 8034a64: 647b str r3, [r7, #68] ; 0x44 + 8034a66: 643a str r2, [r7, #64] ; 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80349e4: 6c39 ldr r1, [r7, #64] ; 0x40 - 80349e6: 6c7a ldr r2, [r7, #68] ; 0x44 - 80349e8: e841 2300 strex r3, r2, [r1] - 80349ec: 63fb str r3, [r7, #60] ; 0x3c + 8034a68: 6c39 ldr r1, [r7, #64] ; 0x40 + 8034a6a: 6c7a ldr r2, [r7, #68] ; 0x44 + 8034a6c: e841 2300 strex r3, r2, [r1] + 8034a70: 63fb str r3, [r7, #60] ; 0x3c return(result); - 80349ee: 6bfb ldr r3, [r7, #60] ; 0x3c - 80349f0: 2b00 cmp r3, #0 - 80349f2: d1e6 bne.n 80349c2 + 8034a72: 6bfb ldr r3, [r7, #60] ; 0x3c + 8034a74: 2b00 cmp r3, #0 + 8034a76: d1e6 bne.n 8034a46 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80349f4: 687b ldr r3, [r7, #4] - 80349f6: 681b ldr r3, [r3, #0] - 80349f8: 3308 adds r3, #8 - 80349fa: 627b str r3, [r7, #36] ; 0x24 + 8034a78: 687b ldr r3, [r7, #4] + 8034a7a: 681b ldr r3, [r3, #0] + 8034a7c: 3308 adds r3, #8 + 8034a7e: 627b str r3, [r7, #36] ; 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80349fc: 6a7b ldr r3, [r7, #36] ; 0x24 - 80349fe: e853 3f00 ldrex r3, [r3] - 8034a02: 623b str r3, [r7, #32] + 8034a80: 6a7b ldr r3, [r7, #36] ; 0x24 + 8034a82: e853 3f00 ldrex r3, [r3] + 8034a86: 623b str r3, [r7, #32] return(result); - 8034a04: 6a3b ldr r3, [r7, #32] - 8034a06: f023 0301 bic.w r3, r3, #1 - 8034a0a: 64fb str r3, [r7, #76] ; 0x4c - 8034a0c: 687b ldr r3, [r7, #4] - 8034a0e: 681b ldr r3, [r3, #0] - 8034a10: 3308 adds r3, #8 - 8034a12: 6cfa ldr r2, [r7, #76] ; 0x4c - 8034a14: 633a str r2, [r7, #48] ; 0x30 - 8034a16: 62fb str r3, [r7, #44] ; 0x2c + 8034a88: 6a3b ldr r3, [r7, #32] + 8034a8a: f023 0301 bic.w r3, r3, #1 + 8034a8e: 64fb str r3, [r7, #76] ; 0x4c + 8034a90: 687b ldr r3, [r7, #4] + 8034a92: 681b ldr r3, [r3, #0] + 8034a94: 3308 adds r3, #8 + 8034a96: 6cfa ldr r2, [r7, #76] ; 0x4c + 8034a98: 633a str r2, [r7, #48] ; 0x30 + 8034a9a: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034a18: 6af9 ldr r1, [r7, #44] ; 0x2c - 8034a1a: 6b3a ldr r2, [r7, #48] ; 0x30 - 8034a1c: e841 2300 strex r3, r2, [r1] - 8034a20: 62bb str r3, [r7, #40] ; 0x28 + 8034a9c: 6af9 ldr r1, [r7, #44] ; 0x2c + 8034a9e: 6b3a ldr r2, [r7, #48] ; 0x30 + 8034aa0: e841 2300 strex r3, r2, [r1] + 8034aa4: 62bb str r3, [r7, #40] ; 0x28 return(result); - 8034a22: 6abb ldr r3, [r7, #40] ; 0x28 - 8034a24: 2b00 cmp r3, #0 - 8034a26: d1e5 bne.n 80349f4 + 8034aa6: 6abb ldr r3, [r7, #40] ; 0x28 + 8034aa8: 2b00 cmp r3, #0 + 8034aaa: d1e5 bne.n 8034a78 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8034a28: 687b ldr r3, [r7, #4] - 8034a2a: 2220 movs r2, #32 - 8034a2c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034aac: 687b ldr r3, [r7, #4] + 8034aae: 2220 movs r2, #32 + 8034ab0: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8034a30: 687b ldr r3, [r7, #4] - 8034a32: 2200 movs r2, #0 - 8034a34: 671a str r2, [r3, #112] ; 0x70 + 8034ab4: 687b ldr r3, [r7, #4] + 8034ab6: 2200 movs r2, #0 + 8034ab8: 671a str r2, [r3, #112] ; 0x70 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8034a36: 687b ldr r3, [r7, #4] - 8034a38: 6edb ldr r3, [r3, #108] ; 0x6c - 8034a3a: 2b01 cmp r3, #1 - 8034a3c: d12e bne.n 8034a9c + 8034aba: 687b ldr r3, [r7, #4] + 8034abc: 6edb ldr r3, [r3, #108] ; 0x6c + 8034abe: 2b01 cmp r3, #1 + 8034ac0: d12e bne.n 8034b20 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8034a3e: 687b ldr r3, [r7, #4] - 8034a40: 2200 movs r2, #0 - 8034a42: 66da str r2, [r3, #108] ; 0x6c + 8034ac2: 687b ldr r3, [r7, #4] + 8034ac4: 2200 movs r2, #0 + 8034ac6: 66da str r2, [r3, #108] ; 0x6c /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8034a44: 687b ldr r3, [r7, #4] - 8034a46: 681b ldr r3, [r3, #0] - 8034a48: 613b str r3, [r7, #16] + 8034ac8: 687b ldr r3, [r7, #4] + 8034aca: 681b ldr r3, [r3, #0] + 8034acc: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034a4a: 693b ldr r3, [r7, #16] - 8034a4c: e853 3f00 ldrex r3, [r3] - 8034a50: 60fb str r3, [r7, #12] + 8034ace: 693b ldr r3, [r7, #16] + 8034ad0: e853 3f00 ldrex r3, [r3] + 8034ad4: 60fb str r3, [r7, #12] return(result); - 8034a52: 68fb ldr r3, [r7, #12] - 8034a54: f023 0310 bic.w r3, r3, #16 - 8034a58: 64bb str r3, [r7, #72] ; 0x48 - 8034a5a: 687b ldr r3, [r7, #4] - 8034a5c: 681b ldr r3, [r3, #0] - 8034a5e: 461a mov r2, r3 - 8034a60: 6cbb ldr r3, [r7, #72] ; 0x48 - 8034a62: 61fb str r3, [r7, #28] - 8034a64: 61ba str r2, [r7, #24] + 8034ad6: 68fb ldr r3, [r7, #12] + 8034ad8: f023 0310 bic.w r3, r3, #16 + 8034adc: 64bb str r3, [r7, #72] ; 0x48 + 8034ade: 687b ldr r3, [r7, #4] + 8034ae0: 681b ldr r3, [r3, #0] + 8034ae2: 461a mov r2, r3 + 8034ae4: 6cbb ldr r3, [r7, #72] ; 0x48 + 8034ae6: 61fb str r3, [r7, #28] + 8034ae8: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034a66: 69b9 ldr r1, [r7, #24] - 8034a68: 69fa ldr r2, [r7, #28] - 8034a6a: e841 2300 strex r3, r2, [r1] - 8034a6e: 617b str r3, [r7, #20] + 8034aea: 69b9 ldr r1, [r7, #24] + 8034aec: 69fa ldr r2, [r7, #28] + 8034aee: e841 2300 strex r3, r2, [r1] + 8034af2: 617b str r3, [r7, #20] return(result); - 8034a70: 697b ldr r3, [r7, #20] - 8034a72: 2b00 cmp r3, #0 - 8034a74: d1e6 bne.n 8034a44 + 8034af4: 697b ldr r3, [r7, #20] + 8034af6: 2b00 cmp r3, #0 + 8034af8: d1e6 bne.n 8034ac8 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) - 8034a76: 687b ldr r3, [r7, #4] - 8034a78: 681b ldr r3, [r3, #0] - 8034a7a: 69db ldr r3, [r3, #28] - 8034a7c: f003 0310 and.w r3, r3, #16 - 8034a80: 2b10 cmp r3, #16 - 8034a82: d103 bne.n 8034a8c + 8034afa: 687b ldr r3, [r7, #4] + 8034afc: 681b ldr r3, [r3, #0] + 8034afe: 69db ldr r3, [r3, #28] + 8034b00: f003 0310 and.w r3, r3, #16 + 8034b04: 2b10 cmp r3, #16 + 8034b06: d103 bne.n 8034b10 { /* Clear IDLE Flag */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8034a84: 687b ldr r3, [r7, #4] - 8034a86: 681b ldr r3, [r3, #0] - 8034a88: 2210 movs r2, #16 - 8034a8a: 621a str r2, [r3, #32] + 8034b08: 687b ldr r3, [r7, #4] + 8034b0a: 681b ldr r3, [r3, #0] + 8034b0c: 2210 movs r2, #16 + 8034b0e: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8034a8c: 687b ldr r3, [r7, #4] - 8034a8e: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 8034a92: 4619 mov r1, r3 - 8034a94: 6878 ldr r0, [r7, #4] - 8034a96: f7fe fd8b bl 80335b0 + 8034b10: 687b ldr r3, [r7, #4] + 8034b12: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 8034b16: 4619 mov r1, r3 + 8034b18: 6878 ldr r0, [r7, #4] + 8034b1a: f7fe fd8b bl 8033634 else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 8034a9a: e00b b.n 8034ab4 + 8034b1e: e00b b.n 8034b38 HAL_UART_RxCpltCallback(huart); - 8034a9c: 6878 ldr r0, [r7, #4] - 8034a9e: f7ed f827 bl 8021af0 + 8034b20: 6878 ldr r0, [r7, #4] + 8034b22: f7ec ffe5 bl 8021af0 } - 8034aa2: e007 b.n 8034ab4 + 8034b26: e007 b.n 8034b38 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 8034aa4: 687b ldr r3, [r7, #4] - 8034aa6: 681b ldr r3, [r3, #0] - 8034aa8: 699a ldr r2, [r3, #24] - 8034aaa: 687b ldr r3, [r7, #4] - 8034aac: 681b ldr r3, [r3, #0] - 8034aae: f042 0208 orr.w r2, r2, #8 - 8034ab2: 619a str r2, [r3, #24] -} - 8034ab4: bf00 nop - 8034ab6: 3758 adds r7, #88 ; 0x58 - 8034ab8: 46bd mov sp, r7 - 8034aba: bd80 pop {r7, pc} - -08034abc : + 8034b28: 687b ldr r3, [r7, #4] + 8034b2a: 681b ldr r3, [r3, #0] + 8034b2c: 699a ldr r2, [r3, #24] + 8034b2e: 687b ldr r3, [r7, #4] + 8034b30: 681b ldr r3, [r3, #0] + 8034b32: f042 0208 orr.w r2, r2, #8 + 8034b36: 619a str r2, [r3, #24] +} + 8034b38: bf00 nop + 8034b3a: 3758 adds r7, #88 ; 0x58 + 8034b3c: 46bd mov sp, r7 + 8034b3e: bd80 pop {r7, pc} + +08034b40 : * interruptions have been enabled by HAL_UART_Receive_IT() * @param huart UART handle. * @retval None */ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) { - 8034abc: b580 push {r7, lr} - 8034abe: b096 sub sp, #88 ; 0x58 - 8034ac0: af00 add r7, sp, #0 - 8034ac2: 6078 str r0, [r7, #4] + 8034b40: b580 push {r7, lr} + 8034b42: b096 sub sp, #88 ; 0x58 + 8034b44: af00 add r7, sp, #0 + 8034b46: 6078 str r0, [r7, #4] uint16_t *tmp; uint16_t uhMask = huart->Mask; - 8034ac4: 687b ldr r3, [r7, #4] - 8034ac6: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 8034aca: f8a7 3056 strh.w r3, [r7, #86] ; 0x56 + 8034b48: 687b ldr r3, [r7, #4] + 8034b4a: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 8034b4e: f8a7 3056 strh.w r3, [r7, #86] ; 0x56 uint16_t uhdata; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8034ace: 687b ldr r3, [r7, #4] - 8034ad0: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034ad4: 2b22 cmp r3, #34 ; 0x22 - 8034ad6: f040 8095 bne.w 8034c04 + 8034b52: 687b ldr r3, [r7, #4] + 8034b54: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8034b58: 2b22 cmp r3, #34 ; 0x22 + 8034b5a: f040 8095 bne.w 8034c88 { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 8034ada: 687b ldr r3, [r7, #4] - 8034adc: 681b ldr r3, [r3, #0] - 8034ade: 6a5b ldr r3, [r3, #36] ; 0x24 - 8034ae0: f8a7 3054 strh.w r3, [r7, #84] ; 0x54 + 8034b5e: 687b ldr r3, [r7, #4] + 8034b60: 681b ldr r3, [r3, #0] + 8034b62: 6a5b ldr r3, [r3, #36] ; 0x24 + 8034b64: f8a7 3054 strh.w r3, [r7, #84] ; 0x54 tmp = (uint16_t *) huart->pRxBuffPtr ; - 8034ae4: 687b ldr r3, [r7, #4] - 8034ae6: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034ae8: 653b str r3, [r7, #80] ; 0x50 + 8034b68: 687b ldr r3, [r7, #4] + 8034b6a: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034b6c: 653b str r3, [r7, #80] ; 0x50 *tmp = (uint16_t)(uhdata & uhMask); - 8034aea: f8b7 2054 ldrh.w r2, [r7, #84] ; 0x54 - 8034aee: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56 - 8034af2: 4013 ands r3, r2 - 8034af4: b29a uxth r2, r3 - 8034af6: 6d3b ldr r3, [r7, #80] ; 0x50 - 8034af8: 801a strh r2, [r3, #0] + 8034b6e: f8b7 2054 ldrh.w r2, [r7, #84] ; 0x54 + 8034b72: f8b7 3056 ldrh.w r3, [r7, #86] ; 0x56 + 8034b76: 4013 ands r3, r2 + 8034b78: b29a uxth r2, r3 + 8034b7a: 6d3b ldr r3, [r7, #80] ; 0x50 + 8034b7c: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 8034afa: 687b ldr r3, [r7, #4] - 8034afc: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034afe: 1c9a adds r2, r3, #2 - 8034b00: 687b ldr r3, [r7, #4] - 8034b02: 659a str r2, [r3, #88] ; 0x58 + 8034b7e: 687b ldr r3, [r7, #4] + 8034b80: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034b82: 1c9a adds r2, r3, #2 + 8034b84: 687b ldr r3, [r7, #4] + 8034b86: 659a str r2, [r3, #88] ; 0x58 huart->RxXferCount--; - 8034b04: 687b ldr r3, [r7, #4] - 8034b06: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034b0a: b29b uxth r3, r3 - 8034b0c: 3b01 subs r3, #1 - 8034b0e: b29a uxth r2, r3 - 8034b10: 687b ldr r3, [r7, #4] - 8034b12: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 8034b88: 687b ldr r3, [r7, #4] + 8034b8a: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034b8e: b29b uxth r3, r3 + 8034b90: 3b01 subs r3, #1 + 8034b92: b29a uxth r2, r3 + 8034b94: 687b ldr r3, [r7, #4] + 8034b96: f8a3 205e strh.w r2, [r3, #94] ; 0x5e if (huart->RxXferCount == 0U) - 8034b16: 687b ldr r3, [r7, #4] - 8034b18: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034b1c: b29b uxth r3, r3 - 8034b1e: 2b00 cmp r3, #0 - 8034b20: d178 bne.n 8034c14 + 8034b9a: 687b ldr r3, [r7, #4] + 8034b9c: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034ba0: b29b uxth r3, r3 + 8034ba2: 2b00 cmp r3, #0 + 8034ba4: d178 bne.n 8034c98 { /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - 8034b22: 687b ldr r3, [r7, #4] - 8034b24: 681b ldr r3, [r3, #0] - 8034b26: 637b str r3, [r7, #52] ; 0x34 + 8034ba6: 687b ldr r3, [r7, #4] + 8034ba8: 681b ldr r3, [r3, #0] + 8034baa: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034b28: 6b7b ldr r3, [r7, #52] ; 0x34 - 8034b2a: e853 3f00 ldrex r3, [r3] - 8034b2e: 633b str r3, [r7, #48] ; 0x30 + 8034bac: 6b7b ldr r3, [r7, #52] ; 0x34 + 8034bae: e853 3f00 ldrex r3, [r3] + 8034bb2: 633b str r3, [r7, #48] ; 0x30 return(result); - 8034b30: 6b3b ldr r3, [r7, #48] ; 0x30 - 8034b32: f423 7390 bic.w r3, r3, #288 ; 0x120 - 8034b36: 64fb str r3, [r7, #76] ; 0x4c - 8034b38: 687b ldr r3, [r7, #4] - 8034b3a: 681b ldr r3, [r3, #0] - 8034b3c: 461a mov r2, r3 - 8034b3e: 6cfb ldr r3, [r7, #76] ; 0x4c - 8034b40: 643b str r3, [r7, #64] ; 0x40 - 8034b42: 63fa str r2, [r7, #60] ; 0x3c + 8034bb4: 6b3b ldr r3, [r7, #48] ; 0x30 + 8034bb6: f423 7390 bic.w r3, r3, #288 ; 0x120 + 8034bba: 64fb str r3, [r7, #76] ; 0x4c + 8034bbc: 687b ldr r3, [r7, #4] + 8034bbe: 681b ldr r3, [r3, #0] + 8034bc0: 461a mov r2, r3 + 8034bc2: 6cfb ldr r3, [r7, #76] ; 0x4c + 8034bc4: 643b str r3, [r7, #64] ; 0x40 + 8034bc6: 63fa str r2, [r7, #60] ; 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034b44: 6bf9 ldr r1, [r7, #60] ; 0x3c - 8034b46: 6c3a ldr r2, [r7, #64] ; 0x40 - 8034b48: e841 2300 strex r3, r2, [r1] - 8034b4c: 63bb str r3, [r7, #56] ; 0x38 + 8034bc8: 6bf9 ldr r1, [r7, #60] ; 0x3c + 8034bca: 6c3a ldr r2, [r7, #64] ; 0x40 + 8034bcc: e841 2300 strex r3, r2, [r1] + 8034bd0: 63bb str r3, [r7, #56] ; 0x38 return(result); - 8034b4e: 6bbb ldr r3, [r7, #56] ; 0x38 - 8034b50: 2b00 cmp r3, #0 - 8034b52: d1e6 bne.n 8034b22 + 8034bd2: 6bbb ldr r3, [r7, #56] ; 0x38 + 8034bd4: 2b00 cmp r3, #0 + 8034bd6: d1e6 bne.n 8034ba6 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8034b54: 687b ldr r3, [r7, #4] - 8034b56: 681b ldr r3, [r3, #0] - 8034b58: 3308 adds r3, #8 - 8034b5a: 623b str r3, [r7, #32] + 8034bd8: 687b ldr r3, [r7, #4] + 8034bda: 681b ldr r3, [r3, #0] + 8034bdc: 3308 adds r3, #8 + 8034bde: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034b5c: 6a3b ldr r3, [r7, #32] - 8034b5e: e853 3f00 ldrex r3, [r3] - 8034b62: 61fb str r3, [r7, #28] + 8034be0: 6a3b ldr r3, [r7, #32] + 8034be2: e853 3f00 ldrex r3, [r3] + 8034be6: 61fb str r3, [r7, #28] return(result); - 8034b64: 69fb ldr r3, [r7, #28] - 8034b66: f023 0301 bic.w r3, r3, #1 - 8034b6a: 64bb str r3, [r7, #72] ; 0x48 - 8034b6c: 687b ldr r3, [r7, #4] - 8034b6e: 681b ldr r3, [r3, #0] - 8034b70: 3308 adds r3, #8 - 8034b72: 6cba ldr r2, [r7, #72] ; 0x48 - 8034b74: 62fa str r2, [r7, #44] ; 0x2c - 8034b76: 62bb str r3, [r7, #40] ; 0x28 + 8034be8: 69fb ldr r3, [r7, #28] + 8034bea: f023 0301 bic.w r3, r3, #1 + 8034bee: 64bb str r3, [r7, #72] ; 0x48 + 8034bf0: 687b ldr r3, [r7, #4] + 8034bf2: 681b ldr r3, [r3, #0] + 8034bf4: 3308 adds r3, #8 + 8034bf6: 6cba ldr r2, [r7, #72] ; 0x48 + 8034bf8: 62fa str r2, [r7, #44] ; 0x2c + 8034bfa: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034b78: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8034b7a: 6afa ldr r2, [r7, #44] ; 0x2c - 8034b7c: e841 2300 strex r3, r2, [r1] - 8034b80: 627b str r3, [r7, #36] ; 0x24 + 8034bfc: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8034bfe: 6afa ldr r2, [r7, #44] ; 0x2c + 8034c00: e841 2300 strex r3, r2, [r1] + 8034c04: 627b str r3, [r7, #36] ; 0x24 return(result); - 8034b82: 6a7b ldr r3, [r7, #36] ; 0x24 - 8034b84: 2b00 cmp r3, #0 - 8034b86: d1e5 bne.n 8034b54 + 8034c06: 6a7b ldr r3, [r7, #36] ; 0x24 + 8034c08: 2b00 cmp r3, #0 + 8034c0a: d1e5 bne.n 8034bd8 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8034b88: 687b ldr r3, [r7, #4] - 8034b8a: 2220 movs r2, #32 - 8034b8c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034c0c: 687b ldr r3, [r7, #4] + 8034c0e: 2220 movs r2, #32 + 8034c10: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8034b90: 687b ldr r3, [r7, #4] - 8034b92: 2200 movs r2, #0 - 8034b94: 671a str r2, [r3, #112] ; 0x70 + 8034c14: 687b ldr r3, [r7, #4] + 8034c16: 2200 movs r2, #0 + 8034c18: 671a str r2, [r3, #112] ; 0x70 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8034b96: 687b ldr r3, [r7, #4] - 8034b98: 6edb ldr r3, [r3, #108] ; 0x6c - 8034b9a: 2b01 cmp r3, #1 - 8034b9c: d12e bne.n 8034bfc + 8034c1a: 687b ldr r3, [r7, #4] + 8034c1c: 6edb ldr r3, [r3, #108] ; 0x6c + 8034c1e: 2b01 cmp r3, #1 + 8034c20: d12e bne.n 8034c80 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8034b9e: 687b ldr r3, [r7, #4] - 8034ba0: 2200 movs r2, #0 - 8034ba2: 66da str r2, [r3, #108] ; 0x6c + 8034c22: 687b ldr r3, [r7, #4] + 8034c24: 2200 movs r2, #0 + 8034c26: 66da str r2, [r3, #108] ; 0x6c /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8034ba4: 687b ldr r3, [r7, #4] - 8034ba6: 681b ldr r3, [r3, #0] - 8034ba8: 60fb str r3, [r7, #12] + 8034c28: 687b ldr r3, [r7, #4] + 8034c2a: 681b ldr r3, [r3, #0] + 8034c2c: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034baa: 68fb ldr r3, [r7, #12] - 8034bac: e853 3f00 ldrex r3, [r3] - 8034bb0: 60bb str r3, [r7, #8] + 8034c2e: 68fb ldr r3, [r7, #12] + 8034c30: e853 3f00 ldrex r3, [r3] + 8034c34: 60bb str r3, [r7, #8] return(result); - 8034bb2: 68bb ldr r3, [r7, #8] - 8034bb4: f023 0310 bic.w r3, r3, #16 - 8034bb8: 647b str r3, [r7, #68] ; 0x44 - 8034bba: 687b ldr r3, [r7, #4] - 8034bbc: 681b ldr r3, [r3, #0] - 8034bbe: 461a mov r2, r3 - 8034bc0: 6c7b ldr r3, [r7, #68] ; 0x44 - 8034bc2: 61bb str r3, [r7, #24] - 8034bc4: 617a str r2, [r7, #20] + 8034c36: 68bb ldr r3, [r7, #8] + 8034c38: f023 0310 bic.w r3, r3, #16 + 8034c3c: 647b str r3, [r7, #68] ; 0x44 + 8034c3e: 687b ldr r3, [r7, #4] + 8034c40: 681b ldr r3, [r3, #0] + 8034c42: 461a mov r2, r3 + 8034c44: 6c7b ldr r3, [r7, #68] ; 0x44 + 8034c46: 61bb str r3, [r7, #24] + 8034c48: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034bc6: 6979 ldr r1, [r7, #20] - 8034bc8: 69ba ldr r2, [r7, #24] - 8034bca: e841 2300 strex r3, r2, [r1] - 8034bce: 613b str r3, [r7, #16] + 8034c4a: 6979 ldr r1, [r7, #20] + 8034c4c: 69ba ldr r2, [r7, #24] + 8034c4e: e841 2300 strex r3, r2, [r1] + 8034c52: 613b str r3, [r7, #16] return(result); - 8034bd0: 693b ldr r3, [r7, #16] - 8034bd2: 2b00 cmp r3, #0 - 8034bd4: d1e6 bne.n 8034ba4 + 8034c54: 693b ldr r3, [r7, #16] + 8034c56: 2b00 cmp r3, #0 + 8034c58: d1e6 bne.n 8034c28 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) - 8034bd6: 687b ldr r3, [r7, #4] - 8034bd8: 681b ldr r3, [r3, #0] - 8034bda: 69db ldr r3, [r3, #28] - 8034bdc: f003 0310 and.w r3, r3, #16 - 8034be0: 2b10 cmp r3, #16 - 8034be2: d103 bne.n 8034bec + 8034c5a: 687b ldr r3, [r7, #4] + 8034c5c: 681b ldr r3, [r3, #0] + 8034c5e: 69db ldr r3, [r3, #28] + 8034c60: f003 0310 and.w r3, r3, #16 + 8034c64: 2b10 cmp r3, #16 + 8034c66: d103 bne.n 8034c70 { /* Clear IDLE Flag */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8034be4: 687b ldr r3, [r7, #4] - 8034be6: 681b ldr r3, [r3, #0] - 8034be8: 2210 movs r2, #16 - 8034bea: 621a str r2, [r3, #32] + 8034c68: 687b ldr r3, [r7, #4] + 8034c6a: 681b ldr r3, [r3, #0] + 8034c6c: 2210 movs r2, #16 + 8034c6e: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8034bec: 687b ldr r3, [r7, #4] - 8034bee: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 8034bf2: 4619 mov r1, r3 - 8034bf4: 6878 ldr r0, [r7, #4] - 8034bf6: f7fe fcdb bl 80335b0 + 8034c70: 687b ldr r3, [r7, #4] + 8034c72: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 8034c76: 4619 mov r1, r3 + 8034c78: 6878 ldr r0, [r7, #4] + 8034c7a: f7fe fcdb bl 8033634 else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 8034bfa: e00b b.n 8034c14 + 8034c7e: e00b b.n 8034c98 HAL_UART_RxCpltCallback(huart); - 8034bfc: 6878 ldr r0, [r7, #4] - 8034bfe: f7ec ff77 bl 8021af0 + 8034c80: 6878 ldr r0, [r7, #4] + 8034c82: f7ec ff35 bl 8021af0 } - 8034c02: e007 b.n 8034c14 + 8034c86: e007 b.n 8034c98 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 8034c04: 687b ldr r3, [r7, #4] - 8034c06: 681b ldr r3, [r3, #0] - 8034c08: 699a ldr r2, [r3, #24] - 8034c0a: 687b ldr r3, [r7, #4] - 8034c0c: 681b ldr r3, [r3, #0] - 8034c0e: f042 0208 orr.w r2, r2, #8 - 8034c12: 619a str r2, [r3, #24] -} - 8034c14: bf00 nop - 8034c16: 3758 adds r7, #88 ; 0x58 - 8034c18: 46bd mov sp, r7 - 8034c1a: bd80 pop {r7, pc} - -08034c1c : + 8034c88: 687b ldr r3, [r7, #4] + 8034c8a: 681b ldr r3, [r3, #0] + 8034c8c: 699a ldr r2, [r3, #24] + 8034c8e: 687b ldr r3, [r7, #4] + 8034c90: 681b ldr r3, [r3, #0] + 8034c92: f042 0208 orr.w r2, r2, #8 + 8034c96: 619a str r2, [r3, #24] +} + 8034c98: bf00 nop + 8034c9a: 3758 adds r7, #88 ; 0x58 + 8034c9c: 46bd mov sp, r7 + 8034c9e: bd80 pop {r7, pc} + +08034ca0 : * interruptions have been enabled by HAL_UART_Receive_IT() * @param huart UART handle. * @retval None */ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) { - 8034c1c: b580 push {r7, lr} - 8034c1e: b0a6 sub sp, #152 ; 0x98 - 8034c20: af00 add r7, sp, #0 - 8034c22: 6078 str r0, [r7, #4] + 8034ca0: b580 push {r7, lr} + 8034ca2: b0a6 sub sp, #152 ; 0x98 + 8034ca4: af00 add r7, sp, #0 + 8034ca6: 6078 str r0, [r7, #4] uint16_t uhMask = huart->Mask; - 8034c24: 687b ldr r3, [r7, #4] - 8034c26: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 8034c2a: f8a7 3092 strh.w r3, [r7, #146] ; 0x92 + 8034ca8: 687b ldr r3, [r7, #4] + 8034caa: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 8034cae: f8a7 3092 strh.w r3, [r7, #146] ; 0x92 uint16_t uhdata; uint16_t nb_rx_data; uint16_t rxdatacount; uint32_t isrflags = READ_REG(huart->Instance->ISR); - 8034c2e: 687b ldr r3, [r7, #4] - 8034c30: 681b ldr r3, [r3, #0] - 8034c32: 69db ldr r3, [r3, #28] - 8034c34: f8c7 3094 str.w r3, [r7, #148] ; 0x94 + 8034cb2: 687b ldr r3, [r7, #4] + 8034cb4: 681b ldr r3, [r3, #0] + 8034cb6: 69db ldr r3, [r3, #28] + 8034cb8: f8c7 3094 str.w r3, [r7, #148] ; 0x94 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8034c38: 687b ldr r3, [r7, #4] - 8034c3a: 681b ldr r3, [r3, #0] - 8034c3c: 681b ldr r3, [r3, #0] - 8034c3e: f8c7 308c str.w r3, [r7, #140] ; 0x8c + 8034cbc: 687b ldr r3, [r7, #4] + 8034cbe: 681b ldr r3, [r3, #0] + 8034cc0: 681b ldr r3, [r3, #0] + 8034cc2: f8c7 308c str.w r3, [r7, #140] ; 0x8c uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8034c42: 687b ldr r3, [r7, #4] - 8034c44: 681b ldr r3, [r3, #0] - 8034c46: 689b ldr r3, [r3, #8] - 8034c48: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 8034cc6: 687b ldr r3, [r7, #4] + 8034cc8: 681b ldr r3, [r3, #0] + 8034cca: 689b ldr r3, [r3, #8] + 8034ccc: f8c7 3088 str.w r3, [r7, #136] ; 0x88 /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8034c4c: 687b ldr r3, [r7, #4] - 8034c4e: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034c52: 2b22 cmp r3, #34 ; 0x22 - 8034c54: f040 814d bne.w 8034ef2 + 8034cd0: 687b ldr r3, [r7, #4] + 8034cd2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8034cd6: 2b22 cmp r3, #34 ; 0x22 + 8034cd8: f040 814d bne.w 8034f76 { nb_rx_data = huart->NbRxDataToProcess; - 8034c58: 687b ldr r3, [r7, #4] - 8034c5a: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 8034c5e: f8a7 3086 strh.w r3, [r7, #134] ; 0x86 + 8034cdc: 687b ldr r3, [r7, #4] + 8034cde: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 8034ce2: f8a7 3086 strh.w r3, [r7, #134] ; 0x86 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) - 8034c62: e0f4 b.n 8034e4e + 8034ce6: e0f4 b.n 8034ed2 { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 8034c64: 687b ldr r3, [r7, #4] - 8034c66: 681b ldr r3, [r3, #0] - 8034c68: 6a5b ldr r3, [r3, #36] ; 0x24 - 8034c6a: f8a7 3084 strh.w r3, [r7, #132] ; 0x84 + 8034ce8: 687b ldr r3, [r7, #4] + 8034cea: 681b ldr r3, [r3, #0] + 8034cec: 6a5b ldr r3, [r3, #36] ; 0x24 + 8034cee: f8a7 3084 strh.w r3, [r7, #132] ; 0x84 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); - 8034c6e: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 - 8034c72: b2d9 uxtb r1, r3 - 8034c74: f8b7 3092 ldrh.w r3, [r7, #146] ; 0x92 - 8034c78: b2da uxtb r2, r3 - 8034c7a: 687b ldr r3, [r7, #4] - 8034c7c: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034c7e: 400a ands r2, r1 - 8034c80: b2d2 uxtb r2, r2 - 8034c82: 701a strb r2, [r3, #0] + 8034cf2: f8b7 3084 ldrh.w r3, [r7, #132] ; 0x84 + 8034cf6: b2d9 uxtb r1, r3 + 8034cf8: f8b7 3092 ldrh.w r3, [r7, #146] ; 0x92 + 8034cfc: b2da uxtb r2, r3 + 8034cfe: 687b ldr r3, [r7, #4] + 8034d00: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034d02: 400a ands r2, r1 + 8034d04: b2d2 uxtb r2, r2 + 8034d06: 701a strb r2, [r3, #0] huart->pRxBuffPtr++; - 8034c84: 687b ldr r3, [r7, #4] - 8034c86: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034c88: 1c5a adds r2, r3, #1 - 8034c8a: 687b ldr r3, [r7, #4] - 8034c8c: 659a str r2, [r3, #88] ; 0x58 + 8034d08: 687b ldr r3, [r7, #4] + 8034d0a: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034d0c: 1c5a adds r2, r3, #1 + 8034d0e: 687b ldr r3, [r7, #4] + 8034d10: 659a str r2, [r3, #88] ; 0x58 huart->RxXferCount--; - 8034c8e: 687b ldr r3, [r7, #4] - 8034c90: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034c94: b29b uxth r3, r3 - 8034c96: 3b01 subs r3, #1 - 8034c98: b29a uxth r2, r3 - 8034c9a: 687b ldr r3, [r7, #4] - 8034c9c: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 8034d12: 687b ldr r3, [r7, #4] + 8034d14: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034d18: b29b uxth r3, r3 + 8034d1a: 3b01 subs r3, #1 + 8034d1c: b29a uxth r2, r3 + 8034d1e: 687b ldr r3, [r7, #4] + 8034d20: f8a3 205e strh.w r2, [r3, #94] ; 0x5e isrflags = READ_REG(huart->Instance->ISR); - 8034ca0: 687b ldr r3, [r7, #4] - 8034ca2: 681b ldr r3, [r3, #0] - 8034ca4: 69db ldr r3, [r3, #28] - 8034ca6: f8c7 3094 str.w r3, [r7, #148] ; 0x94 + 8034d24: 687b ldr r3, [r7, #4] + 8034d26: 681b ldr r3, [r3, #0] + 8034d28: 69db ldr r3, [r3, #28] + 8034d2a: f8c7 3094 str.w r3, [r7, #148] ; 0x94 /* If some non blocking errors occurred */ if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U) - 8034caa: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034cae: f003 0307 and.w r3, r3, #7 - 8034cb2: 2b00 cmp r3, #0 - 8034cb4: d053 beq.n 8034d5e + 8034d2e: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8034d32: f003 0307 and.w r3, r3, #7 + 8034d36: 2b00 cmp r3, #0 + 8034d38: d053 beq.n 8034de2 { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 8034cb6: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034cba: f003 0301 and.w r3, r3, #1 - 8034cbe: 2b00 cmp r3, #0 - 8034cc0: d011 beq.n 8034ce6 - 8034cc2: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c - 8034cc6: f403 7380 and.w r3, r3, #256 ; 0x100 - 8034cca: 2b00 cmp r3, #0 - 8034ccc: d00b beq.n 8034ce6 + 8034d3a: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8034d3e: f003 0301 and.w r3, r3, #1 + 8034d42: 2b00 cmp r3, #0 + 8034d44: d011 beq.n 8034d6a + 8034d46: f8d7 308c ldr.w r3, [r7, #140] ; 0x8c + 8034d4a: f403 7380 and.w r3, r3, #256 ; 0x100 + 8034d4e: 2b00 cmp r3, #0 + 8034d50: d00b beq.n 8034d6a { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 8034cce: 687b ldr r3, [r7, #4] - 8034cd0: 681b ldr r3, [r3, #0] - 8034cd2: 2201 movs r2, #1 - 8034cd4: 621a str r2, [r3, #32] + 8034d52: 687b ldr r3, [r7, #4] + 8034d54: 681b ldr r3, [r3, #0] + 8034d56: 2201 movs r2, #1 + 8034d58: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_PE; - 8034cd6: 687b ldr r3, [r7, #4] - 8034cd8: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034cdc: f043 0201 orr.w r2, r3, #1 - 8034ce0: 687b ldr r3, [r7, #4] - 8034ce2: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8034d5a: 687b ldr r3, [r7, #4] + 8034d5c: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8034d60: f043 0201 orr.w r2, r3, #1 + 8034d64: 687b ldr r3, [r7, #4] + 8034d66: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* UART frame error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8034ce6: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034cea: f003 0302 and.w r3, r3, #2 - 8034cee: 2b00 cmp r3, #0 - 8034cf0: d011 beq.n 8034d16 - 8034cf2: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 - 8034cf6: f003 0301 and.w r3, r3, #1 - 8034cfa: 2b00 cmp r3, #0 - 8034cfc: d00b beq.n 8034d16 + 8034d6a: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8034d6e: f003 0302 and.w r3, r3, #2 + 8034d72: 2b00 cmp r3, #0 + 8034d74: d011 beq.n 8034d9a + 8034d76: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 + 8034d7a: f003 0301 and.w r3, r3, #1 + 8034d7e: 2b00 cmp r3, #0 + 8034d80: d00b beq.n 8034d9a { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - 8034cfe: 687b ldr r3, [r7, #4] - 8034d00: 681b ldr r3, [r3, #0] - 8034d02: 2202 movs r2, #2 - 8034d04: 621a str r2, [r3, #32] + 8034d82: 687b ldr r3, [r7, #4] + 8034d84: 681b ldr r3, [r3, #0] + 8034d86: 2202 movs r2, #2 + 8034d88: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_FE; - 8034d06: 687b ldr r3, [r7, #4] - 8034d08: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034d0c: f043 0204 orr.w r2, r3, #4 - 8034d10: 687b ldr r3, [r7, #4] - 8034d12: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8034d8a: 687b ldr r3, [r7, #4] + 8034d8c: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8034d90: f043 0204 orr.w r2, r3, #4 + 8034d94: 687b ldr r3, [r7, #4] + 8034d96: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* UART noise error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8034d16: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034d1a: f003 0304 and.w r3, r3, #4 - 8034d1e: 2b00 cmp r3, #0 - 8034d20: d011 beq.n 8034d46 - 8034d22: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 - 8034d26: f003 0301 and.w r3, r3, #1 - 8034d2a: 2b00 cmp r3, #0 - 8034d2c: d00b beq.n 8034d46 + 8034d9a: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8034d9e: f003 0304 and.w r3, r3, #4 + 8034da2: 2b00 cmp r3, #0 + 8034da4: d011 beq.n 8034dca + 8034da6: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 + 8034daa: f003 0301 and.w r3, r3, #1 + 8034dae: 2b00 cmp r3, #0 + 8034db0: d00b beq.n 8034dca { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - 8034d2e: 687b ldr r3, [r7, #4] - 8034d30: 681b ldr r3, [r3, #0] - 8034d32: 2204 movs r2, #4 - 8034d34: 621a str r2, [r3, #32] + 8034db2: 687b ldr r3, [r7, #4] + 8034db4: 681b ldr r3, [r3, #0] + 8034db6: 2204 movs r2, #4 + 8034db8: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_NE; - 8034d36: 687b ldr r3, [r7, #4] - 8034d38: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034d3c: f043 0202 orr.w r2, r3, #2 - 8034d40: 687b ldr r3, [r7, #4] - 8034d42: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8034dba: 687b ldr r3, [r7, #4] + 8034dbc: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8034dc0: f043 0202 orr.w r2, r3, #2 + 8034dc4: 687b ldr r3, [r7, #4] + 8034dc6: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* Call UART Error Call back function if need be ----------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8034d46: 687b ldr r3, [r7, #4] - 8034d48: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034d4c: 2b00 cmp r3, #0 - 8034d4e: d006 beq.n 8034d5e + 8034dca: 687b ldr r3, [r7, #4] + 8034dcc: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8034dd0: 2b00 cmp r3, #0 + 8034dd2: d006 beq.n 8034de2 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8034d50: 6878 ldr r0, [r7, #4] - 8034d52: f7fe fc23 bl 803359c + 8034dd4: 6878 ldr r0, [r7, #4] + 8034dd6: f7fe fc23 bl 8033620 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8034d56: 687b ldr r3, [r7, #4] - 8034d58: 2200 movs r2, #0 - 8034d5a: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8034dda: 687b ldr r3, [r7, #4] + 8034ddc: 2200 movs r2, #0 + 8034dde: f8c3 208c str.w r2, [r3, #140] ; 0x8c } } if (huart->RxXferCount == 0U) - 8034d5e: 687b ldr r3, [r7, #4] - 8034d60: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034d64: b29b uxth r3, r3 - 8034d66: 2b00 cmp r3, #0 - 8034d68: d171 bne.n 8034e4e + 8034de2: 687b ldr r3, [r7, #4] + 8034de4: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034de8: b29b uxth r3, r3 + 8034dea: 2b00 cmp r3, #0 + 8034dec: d171 bne.n 8034ed2 { /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8034d6a: 687b ldr r3, [r7, #4] - 8034d6c: 681b ldr r3, [r3, #0] - 8034d6e: 65fb str r3, [r7, #92] ; 0x5c + 8034dee: 687b ldr r3, [r7, #4] + 8034df0: 681b ldr r3, [r3, #0] + 8034df2: 65fb str r3, [r7, #92] ; 0x5c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034d70: 6dfb ldr r3, [r7, #92] ; 0x5c - 8034d72: e853 3f00 ldrex r3, [r3] - 8034d76: 65bb str r3, [r7, #88] ; 0x58 + 8034df4: 6dfb ldr r3, [r7, #92] ; 0x5c + 8034df6: e853 3f00 ldrex r3, [r3] + 8034dfa: 65bb str r3, [r7, #88] ; 0x58 return(result); - 8034d78: 6dbb ldr r3, [r7, #88] ; 0x58 - 8034d7a: f423 7380 bic.w r3, r3, #256 ; 0x100 - 8034d7e: f8c7 3080 str.w r3, [r7, #128] ; 0x80 - 8034d82: 687b ldr r3, [r7, #4] - 8034d84: 681b ldr r3, [r3, #0] - 8034d86: 461a mov r2, r3 - 8034d88: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80 - 8034d8c: 66bb str r3, [r7, #104] ; 0x68 - 8034d8e: 667a str r2, [r7, #100] ; 0x64 + 8034dfc: 6dbb ldr r3, [r7, #88] ; 0x58 + 8034dfe: f423 7380 bic.w r3, r3, #256 ; 0x100 + 8034e02: f8c7 3080 str.w r3, [r7, #128] ; 0x80 + 8034e06: 687b ldr r3, [r7, #4] + 8034e08: 681b ldr r3, [r3, #0] + 8034e0a: 461a mov r2, r3 + 8034e0c: f8d7 3080 ldr.w r3, [r7, #128] ; 0x80 + 8034e10: 66bb str r3, [r7, #104] ; 0x68 + 8034e12: 667a str r2, [r7, #100] ; 0x64 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034d90: 6e79 ldr r1, [r7, #100] ; 0x64 - 8034d92: 6eba ldr r2, [r7, #104] ; 0x68 - 8034d94: e841 2300 strex r3, r2, [r1] - 8034d98: 663b str r3, [r7, #96] ; 0x60 + 8034e14: 6e79 ldr r1, [r7, #100] ; 0x64 + 8034e16: 6eba ldr r2, [r7, #104] ; 0x68 + 8034e18: e841 2300 strex r3, r2, [r1] + 8034e1c: 663b str r3, [r7, #96] ; 0x60 return(result); - 8034d9a: 6e3b ldr r3, [r7, #96] ; 0x60 - 8034d9c: 2b00 cmp r3, #0 - 8034d9e: d1e4 bne.n 8034d6a + 8034e1e: 6e3b ldr r3, [r7, #96] ; 0x60 + 8034e20: 2b00 cmp r3, #0 + 8034e22: d1e4 bne.n 8034dee /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 8034da0: 687b ldr r3, [r7, #4] - 8034da2: 681b ldr r3, [r3, #0] - 8034da4: 3308 adds r3, #8 - 8034da6: 64bb str r3, [r7, #72] ; 0x48 + 8034e24: 687b ldr r3, [r7, #4] + 8034e26: 681b ldr r3, [r3, #0] + 8034e28: 3308 adds r3, #8 + 8034e2a: 64bb str r3, [r7, #72] ; 0x48 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034da8: 6cbb ldr r3, [r7, #72] ; 0x48 - 8034daa: e853 3f00 ldrex r3, [r3] - 8034dae: 647b str r3, [r7, #68] ; 0x44 + 8034e2c: 6cbb ldr r3, [r7, #72] ; 0x48 + 8034e2e: e853 3f00 ldrex r3, [r3] + 8034e32: 647b str r3, [r7, #68] ; 0x44 return(result); - 8034db0: 6c7a ldr r2, [r7, #68] ; 0x44 - 8034db2: 4b56 ldr r3, [pc, #344] ; (8034f0c ) - 8034db4: 4013 ands r3, r2 - 8034db6: 67fb str r3, [r7, #124] ; 0x7c - 8034db8: 687b ldr r3, [r7, #4] - 8034dba: 681b ldr r3, [r3, #0] - 8034dbc: 3308 adds r3, #8 - 8034dbe: 6ffa ldr r2, [r7, #124] ; 0x7c - 8034dc0: 657a str r2, [r7, #84] ; 0x54 - 8034dc2: 653b str r3, [r7, #80] ; 0x50 + 8034e34: 6c7a ldr r2, [r7, #68] ; 0x44 + 8034e36: 4b56 ldr r3, [pc, #344] ; (8034f90 ) + 8034e38: 4013 ands r3, r2 + 8034e3a: 67fb str r3, [r7, #124] ; 0x7c + 8034e3c: 687b ldr r3, [r7, #4] + 8034e3e: 681b ldr r3, [r3, #0] + 8034e40: 3308 adds r3, #8 + 8034e42: 6ffa ldr r2, [r7, #124] ; 0x7c + 8034e44: 657a str r2, [r7, #84] ; 0x54 + 8034e46: 653b str r3, [r7, #80] ; 0x50 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034dc4: 6d39 ldr r1, [r7, #80] ; 0x50 - 8034dc6: 6d7a ldr r2, [r7, #84] ; 0x54 - 8034dc8: e841 2300 strex r3, r2, [r1] - 8034dcc: 64fb str r3, [r7, #76] ; 0x4c + 8034e48: 6d39 ldr r1, [r7, #80] ; 0x50 + 8034e4a: 6d7a ldr r2, [r7, #84] ; 0x54 + 8034e4c: e841 2300 strex r3, r2, [r1] + 8034e50: 64fb str r3, [r7, #76] ; 0x4c return(result); - 8034dce: 6cfb ldr r3, [r7, #76] ; 0x4c - 8034dd0: 2b00 cmp r3, #0 - 8034dd2: d1e5 bne.n 8034da0 + 8034e52: 6cfb ldr r3, [r7, #76] ; 0x4c + 8034e54: 2b00 cmp r3, #0 + 8034e56: d1e5 bne.n 8034e24 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8034dd4: 687b ldr r3, [r7, #4] - 8034dd6: 2220 movs r2, #32 - 8034dd8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8034e58: 687b ldr r3, [r7, #4] + 8034e5a: 2220 movs r2, #32 + 8034e5c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8034ddc: 687b ldr r3, [r7, #4] - 8034dde: 2200 movs r2, #0 - 8034de0: 671a str r2, [r3, #112] ; 0x70 + 8034e60: 687b ldr r3, [r7, #4] + 8034e62: 2200 movs r2, #0 + 8034e64: 671a str r2, [r3, #112] ; 0x70 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8034de2: 687b ldr r3, [r7, #4] - 8034de4: 6edb ldr r3, [r3, #108] ; 0x6c - 8034de6: 2b01 cmp r3, #1 - 8034de8: d12e bne.n 8034e48 + 8034e66: 687b ldr r3, [r7, #4] + 8034e68: 6edb ldr r3, [r3, #108] ; 0x6c + 8034e6a: 2b01 cmp r3, #1 + 8034e6c: d12e bne.n 8034ecc { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8034dea: 687b ldr r3, [r7, #4] - 8034dec: 2200 movs r2, #0 - 8034dee: 66da str r2, [r3, #108] ; 0x6c + 8034e6e: 687b ldr r3, [r7, #4] + 8034e70: 2200 movs r2, #0 + 8034e72: 66da str r2, [r3, #108] ; 0x6c /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8034df0: 687b ldr r3, [r7, #4] - 8034df2: 681b ldr r3, [r3, #0] - 8034df4: 637b str r3, [r7, #52] ; 0x34 + 8034e74: 687b ldr r3, [r7, #4] + 8034e76: 681b ldr r3, [r3, #0] + 8034e78: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034df6: 6b7b ldr r3, [r7, #52] ; 0x34 - 8034df8: e853 3f00 ldrex r3, [r3] - 8034dfc: 633b str r3, [r7, #48] ; 0x30 + 8034e7a: 6b7b ldr r3, [r7, #52] ; 0x34 + 8034e7c: e853 3f00 ldrex r3, [r3] + 8034e80: 633b str r3, [r7, #48] ; 0x30 return(result); - 8034dfe: 6b3b ldr r3, [r7, #48] ; 0x30 - 8034e00: f023 0310 bic.w r3, r3, #16 - 8034e04: 67bb str r3, [r7, #120] ; 0x78 - 8034e06: 687b ldr r3, [r7, #4] - 8034e08: 681b ldr r3, [r3, #0] - 8034e0a: 461a mov r2, r3 - 8034e0c: 6fbb ldr r3, [r7, #120] ; 0x78 - 8034e0e: 643b str r3, [r7, #64] ; 0x40 - 8034e10: 63fa str r2, [r7, #60] ; 0x3c + 8034e82: 6b3b ldr r3, [r7, #48] ; 0x30 + 8034e84: f023 0310 bic.w r3, r3, #16 + 8034e88: 67bb str r3, [r7, #120] ; 0x78 + 8034e8a: 687b ldr r3, [r7, #4] + 8034e8c: 681b ldr r3, [r3, #0] + 8034e8e: 461a mov r2, r3 + 8034e90: 6fbb ldr r3, [r7, #120] ; 0x78 + 8034e92: 643b str r3, [r7, #64] ; 0x40 + 8034e94: 63fa str r2, [r7, #60] ; 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034e12: 6bf9 ldr r1, [r7, #60] ; 0x3c - 8034e14: 6c3a ldr r2, [r7, #64] ; 0x40 - 8034e16: e841 2300 strex r3, r2, [r1] - 8034e1a: 63bb str r3, [r7, #56] ; 0x38 + 8034e96: 6bf9 ldr r1, [r7, #60] ; 0x3c + 8034e98: 6c3a ldr r2, [r7, #64] ; 0x40 + 8034e9a: e841 2300 strex r3, r2, [r1] + 8034e9e: 63bb str r3, [r7, #56] ; 0x38 return(result); - 8034e1c: 6bbb ldr r3, [r7, #56] ; 0x38 - 8034e1e: 2b00 cmp r3, #0 - 8034e20: d1e6 bne.n 8034df0 + 8034ea0: 6bbb ldr r3, [r7, #56] ; 0x38 + 8034ea2: 2b00 cmp r3, #0 + 8034ea4: d1e6 bne.n 8034e74 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) - 8034e22: 687b ldr r3, [r7, #4] - 8034e24: 681b ldr r3, [r3, #0] - 8034e26: 69db ldr r3, [r3, #28] - 8034e28: f003 0310 and.w r3, r3, #16 - 8034e2c: 2b10 cmp r3, #16 - 8034e2e: d103 bne.n 8034e38 + 8034ea6: 687b ldr r3, [r7, #4] + 8034ea8: 681b ldr r3, [r3, #0] + 8034eaa: 69db ldr r3, [r3, #28] + 8034eac: f003 0310 and.w r3, r3, #16 + 8034eb0: 2b10 cmp r3, #16 + 8034eb2: d103 bne.n 8034ebc { /* Clear IDLE Flag */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8034e30: 687b ldr r3, [r7, #4] - 8034e32: 681b ldr r3, [r3, #0] - 8034e34: 2210 movs r2, #16 - 8034e36: 621a str r2, [r3, #32] + 8034eb4: 687b ldr r3, [r7, #4] + 8034eb6: 681b ldr r3, [r3, #0] + 8034eb8: 2210 movs r2, #16 + 8034eba: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8034e38: 687b ldr r3, [r7, #4] - 8034e3a: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 8034e3e: 4619 mov r1, r3 - 8034e40: 6878 ldr r0, [r7, #4] - 8034e42: f7fe fbb5 bl 80335b0 - 8034e46: e002 b.n 8034e4e + 8034ebc: 687b ldr r3, [r7, #4] + 8034ebe: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 8034ec2: 4619 mov r1, r3 + 8034ec4: 6878 ldr r0, [r7, #4] + 8034ec6: f7fe fbb5 bl 8033634 + 8034eca: e002 b.n 8034ed2 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 8034e48: 6878 ldr r0, [r7, #4] - 8034e4a: f7ec fe51 bl 8021af0 + 8034ecc: 6878 ldr r0, [r7, #4] + 8034ece: f7ec fe0f bl 8021af0 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) - 8034e4e: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86 - 8034e52: 2b00 cmp r3, #0 - 8034e54: d006 beq.n 8034e64 - 8034e56: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034e5a: f003 0320 and.w r3, r3, #32 - 8034e5e: 2b00 cmp r3, #0 - 8034e60: f47f af00 bne.w 8034c64 + 8034ed2: f8b7 3086 ldrh.w r3, [r7, #134] ; 0x86 + 8034ed6: 2b00 cmp r3, #0 + 8034ed8: d006 beq.n 8034ee8 + 8034eda: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8034ede: f003 0320 and.w r3, r3, #32 + 8034ee2: 2b00 cmp r3, #0 + 8034ee4: f47f af00 bne.w 8034ce8 /* When remaining number of bytes to receive is less than the RX FIFO threshold, next incoming frames are processed as if FIFO mode was disabled (i.e. one interrupt per received frame). */ rxdatacount = huart->RxXferCount; - 8034e64: 687b ldr r3, [r7, #4] - 8034e66: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034e6a: f8a7 3076 strh.w r3, [r7, #118] ; 0x76 + 8034ee8: 687b ldr r3, [r7, #4] + 8034eea: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8034eee: f8a7 3076 strh.w r3, [r7, #118] ; 0x76 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess)) - 8034e6e: f8b7 3076 ldrh.w r3, [r7, #118] ; 0x76 - 8034e72: 2b00 cmp r3, #0 - 8034e74: d045 beq.n 8034f02 - 8034e76: 687b ldr r3, [r7, #4] - 8034e78: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 8034e7c: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76 - 8034e80: 429a cmp r2, r3 - 8034e82: d23e bcs.n 8034f02 + 8034ef2: f8b7 3076 ldrh.w r3, [r7, #118] ; 0x76 + 8034ef6: 2b00 cmp r3, #0 + 8034ef8: d045 beq.n 8034f86 + 8034efa: 687b ldr r3, [r7, #4] + 8034efc: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 8034f00: f8b7 2076 ldrh.w r2, [r7, #118] ; 0x76 + 8034f04: 429a cmp r2, r3 + 8034f06: d23e bcs.n 8034f86 { /* Disable the UART RXFT interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - 8034e84: 687b ldr r3, [r7, #4] - 8034e86: 681b ldr r3, [r3, #0] - 8034e88: 3308 adds r3, #8 - 8034e8a: 623b str r3, [r7, #32] + 8034f08: 687b ldr r3, [r7, #4] + 8034f0a: 681b ldr r3, [r3, #0] + 8034f0c: 3308 adds r3, #8 + 8034f0e: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034e8c: 6a3b ldr r3, [r7, #32] - 8034e8e: e853 3f00 ldrex r3, [r3] - 8034e92: 61fb str r3, [r7, #28] + 8034f10: 6a3b ldr r3, [r7, #32] + 8034f12: e853 3f00 ldrex r3, [r3] + 8034f16: 61fb str r3, [r7, #28] return(result); - 8034e94: 69fb ldr r3, [r7, #28] - 8034e96: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 8034e9a: 673b str r3, [r7, #112] ; 0x70 - 8034e9c: 687b ldr r3, [r7, #4] - 8034e9e: 681b ldr r3, [r3, #0] - 8034ea0: 3308 adds r3, #8 - 8034ea2: 6f3a ldr r2, [r7, #112] ; 0x70 - 8034ea4: 62fa str r2, [r7, #44] ; 0x2c - 8034ea6: 62bb str r3, [r7, #40] ; 0x28 + 8034f18: 69fb ldr r3, [r7, #28] + 8034f1a: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 8034f1e: 673b str r3, [r7, #112] ; 0x70 + 8034f20: 687b ldr r3, [r7, #4] + 8034f22: 681b ldr r3, [r3, #0] + 8034f24: 3308 adds r3, #8 + 8034f26: 6f3a ldr r2, [r7, #112] ; 0x70 + 8034f28: 62fa str r2, [r7, #44] ; 0x2c + 8034f2a: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034ea8: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8034eaa: 6afa ldr r2, [r7, #44] ; 0x2c - 8034eac: e841 2300 strex r3, r2, [r1] - 8034eb0: 627b str r3, [r7, #36] ; 0x24 + 8034f2c: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8034f2e: 6afa ldr r2, [r7, #44] ; 0x2c + 8034f30: e841 2300 strex r3, r2, [r1] + 8034f34: 627b str r3, [r7, #36] ; 0x24 return(result); - 8034eb2: 6a7b ldr r3, [r7, #36] ; 0x24 - 8034eb4: 2b00 cmp r3, #0 - 8034eb6: d1e5 bne.n 8034e84 + 8034f36: 6a7b ldr r3, [r7, #36] ; 0x24 + 8034f38: 2b00 cmp r3, #0 + 8034f3a: d1e5 bne.n 8034f08 /* Update the RxISR function pointer */ huart->RxISR = UART_RxISR_8BIT; - 8034eb8: 687b ldr r3, [r7, #4] - 8034eba: 4a15 ldr r2, [pc, #84] ; (8034f10 ) - 8034ebc: 671a str r2, [r3, #112] ; 0x70 + 8034f3c: 687b ldr r3, [r7, #4] + 8034f3e: 4a15 ldr r2, [pc, #84] ; (8034f94 ) + 8034f40: 671a str r2, [r3, #112] ; 0x70 /* Enable the UART Data Register Not Empty interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - 8034ebe: 687b ldr r3, [r7, #4] - 8034ec0: 681b ldr r3, [r3, #0] - 8034ec2: 60fb str r3, [r7, #12] + 8034f42: 687b ldr r3, [r7, #4] + 8034f44: 681b ldr r3, [r3, #0] + 8034f46: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8034ec4: 68fb ldr r3, [r7, #12] - 8034ec6: e853 3f00 ldrex r3, [r3] - 8034eca: 60bb str r3, [r7, #8] + 8034f48: 68fb ldr r3, [r7, #12] + 8034f4a: e853 3f00 ldrex r3, [r3] + 8034f4e: 60bb str r3, [r7, #8] return(result); - 8034ecc: 68bb ldr r3, [r7, #8] - 8034ece: f043 0320 orr.w r3, r3, #32 - 8034ed2: 66fb str r3, [r7, #108] ; 0x6c - 8034ed4: 687b ldr r3, [r7, #4] - 8034ed6: 681b ldr r3, [r3, #0] - 8034ed8: 461a mov r2, r3 - 8034eda: 6efb ldr r3, [r7, #108] ; 0x6c - 8034edc: 61bb str r3, [r7, #24] - 8034ede: 617a str r2, [r7, #20] + 8034f50: 68bb ldr r3, [r7, #8] + 8034f52: f043 0320 orr.w r3, r3, #32 + 8034f56: 66fb str r3, [r7, #108] ; 0x6c + 8034f58: 687b ldr r3, [r7, #4] + 8034f5a: 681b ldr r3, [r3, #0] + 8034f5c: 461a mov r2, r3 + 8034f5e: 6efb ldr r3, [r7, #108] ; 0x6c + 8034f60: 61bb str r3, [r7, #24] + 8034f62: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8034ee0: 6979 ldr r1, [r7, #20] - 8034ee2: 69ba ldr r2, [r7, #24] - 8034ee4: e841 2300 strex r3, r2, [r1] - 8034ee8: 613b str r3, [r7, #16] + 8034f64: 6979 ldr r1, [r7, #20] + 8034f66: 69ba ldr r2, [r7, #24] + 8034f68: e841 2300 strex r3, r2, [r1] + 8034f6c: 613b str r3, [r7, #16] return(result); - 8034eea: 693b ldr r3, [r7, #16] - 8034eec: 2b00 cmp r3, #0 - 8034eee: d1e6 bne.n 8034ebe + 8034f6e: 693b ldr r3, [r7, #16] + 8034f70: 2b00 cmp r3, #0 + 8034f72: d1e6 bne.n 8034f42 else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 8034ef0: e007 b.n 8034f02 + 8034f74: e007 b.n 8034f86 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 8034ef2: 687b ldr r3, [r7, #4] - 8034ef4: 681b ldr r3, [r3, #0] - 8034ef6: 699a ldr r2, [r3, #24] - 8034ef8: 687b ldr r3, [r7, #4] - 8034efa: 681b ldr r3, [r3, #0] - 8034efc: f042 0208 orr.w r2, r2, #8 - 8034f00: 619a str r2, [r3, #24] -} - 8034f02: bf00 nop - 8034f04: 3798 adds r7, #152 ; 0x98 - 8034f06: 46bd mov sp, r7 - 8034f08: bd80 pop {r7, pc} - 8034f0a: bf00 nop - 8034f0c: effffffe .word 0xeffffffe - 8034f10: 0803495d .word 0x0803495d - -08034f14 : + 8034f76: 687b ldr r3, [r7, #4] + 8034f78: 681b ldr r3, [r3, #0] + 8034f7a: 699a ldr r2, [r3, #24] + 8034f7c: 687b ldr r3, [r7, #4] + 8034f7e: 681b ldr r3, [r3, #0] + 8034f80: f042 0208 orr.w r2, r2, #8 + 8034f84: 619a str r2, [r3, #24] +} + 8034f86: bf00 nop + 8034f88: 3798 adds r7, #152 ; 0x98 + 8034f8a: 46bd mov sp, r7 + 8034f8c: bd80 pop {r7, pc} + 8034f8e: bf00 nop + 8034f90: effffffe .word 0xeffffffe + 8034f94: 080349e1 .word 0x080349e1 + +08034f98 : * interruptions have been enabled by HAL_UART_Receive_IT() * @param huart UART handle. * @retval None */ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) { - 8034f14: b580 push {r7, lr} - 8034f16: b0a8 sub sp, #160 ; 0xa0 - 8034f18: af00 add r7, sp, #0 - 8034f1a: 6078 str r0, [r7, #4] + 8034f98: b580 push {r7, lr} + 8034f9a: b0a8 sub sp, #160 ; 0xa0 + 8034f9c: af00 add r7, sp, #0 + 8034f9e: 6078 str r0, [r7, #4] uint16_t *tmp; uint16_t uhMask = huart->Mask; - 8034f1c: 687b ldr r3, [r7, #4] - 8034f1e: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 8034f22: f8a7 309a strh.w r3, [r7, #154] ; 0x9a + 8034fa0: 687b ldr r3, [r7, #4] + 8034fa2: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 8034fa6: f8a7 309a strh.w r3, [r7, #154] ; 0x9a uint16_t uhdata; uint16_t nb_rx_data; uint16_t rxdatacount; uint32_t isrflags = READ_REG(huart->Instance->ISR); - 8034f26: 687b ldr r3, [r7, #4] - 8034f28: 681b ldr r3, [r3, #0] - 8034f2a: 69db ldr r3, [r3, #28] - 8034f2c: f8c7 309c str.w r3, [r7, #156] ; 0x9c + 8034faa: 687b ldr r3, [r7, #4] + 8034fac: 681b ldr r3, [r3, #0] + 8034fae: 69db ldr r3, [r3, #28] + 8034fb0: f8c7 309c str.w r3, [r7, #156] ; 0x9c uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8034f30: 687b ldr r3, [r7, #4] - 8034f32: 681b ldr r3, [r3, #0] - 8034f34: 681b ldr r3, [r3, #0] - 8034f36: f8c7 3094 str.w r3, [r7, #148] ; 0x94 + 8034fb4: 687b ldr r3, [r7, #4] + 8034fb6: 681b ldr r3, [r3, #0] + 8034fb8: 681b ldr r3, [r3, #0] + 8034fba: f8c7 3094 str.w r3, [r7, #148] ; 0x94 uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8034f3a: 687b ldr r3, [r7, #4] - 8034f3c: 681b ldr r3, [r3, #0] - 8034f3e: 689b ldr r3, [r3, #8] - 8034f40: f8c7 3090 str.w r3, [r7, #144] ; 0x90 + 8034fbe: 687b ldr r3, [r7, #4] + 8034fc0: 681b ldr r3, [r3, #0] + 8034fc2: 689b ldr r3, [r3, #8] + 8034fc4: f8c7 3090 str.w r3, [r7, #144] ; 0x90 /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8034f44: 687b ldr r3, [r7, #4] - 8034f46: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 8034f4a: 2b22 cmp r3, #34 ; 0x22 - 8034f4c: f040 8151 bne.w 80351f2 + 8034fc8: 687b ldr r3, [r7, #4] + 8034fca: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 8034fce: 2b22 cmp r3, #34 ; 0x22 + 8034fd0: f040 8151 bne.w 8035276 { nb_rx_data = huart->NbRxDataToProcess; - 8034f50: 687b ldr r3, [r7, #4] - 8034f52: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 8034f56: f8a7 308e strh.w r3, [r7, #142] ; 0x8e + 8034fd4: 687b ldr r3, [r7, #4] + 8034fd6: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 8034fda: f8a7 308e strh.w r3, [r7, #142] ; 0x8e while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) - 8034f5a: e0f8 b.n 803514e + 8034fde: e0f8 b.n 80351d2 { uhdata = (uint16_t) READ_REG(huart->Instance->RDR); - 8034f5c: 687b ldr r3, [r7, #4] - 8034f5e: 681b ldr r3, [r3, #0] - 8034f60: 6a5b ldr r3, [r3, #36] ; 0x24 - 8034f62: f8a7 308c strh.w r3, [r7, #140] ; 0x8c + 8034fe0: 687b ldr r3, [r7, #4] + 8034fe2: 681b ldr r3, [r3, #0] + 8034fe4: 6a5b ldr r3, [r3, #36] ; 0x24 + 8034fe6: f8a7 308c strh.w r3, [r7, #140] ; 0x8c tmp = (uint16_t *) huart->pRxBuffPtr ; - 8034f66: 687b ldr r3, [r7, #4] - 8034f68: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034f6a: f8c7 3088 str.w r3, [r7, #136] ; 0x88 + 8034fea: 687b ldr r3, [r7, #4] + 8034fec: 6d9b ldr r3, [r3, #88] ; 0x58 + 8034fee: f8c7 3088 str.w r3, [r7, #136] ; 0x88 *tmp = (uint16_t)(uhdata & uhMask); - 8034f6e: f8b7 208c ldrh.w r2, [r7, #140] ; 0x8c - 8034f72: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a - 8034f76: 4013 ands r3, r2 - 8034f78: b29a uxth r2, r3 - 8034f7a: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 - 8034f7e: 801a strh r2, [r3, #0] + 8034ff2: f8b7 208c ldrh.w r2, [r7, #140] ; 0x8c + 8034ff6: f8b7 309a ldrh.w r3, [r7, #154] ; 0x9a + 8034ffa: 4013 ands r3, r2 + 8034ffc: b29a uxth r2, r3 + 8034ffe: f8d7 3088 ldr.w r3, [r7, #136] ; 0x88 + 8035002: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 8034f80: 687b ldr r3, [r7, #4] - 8034f82: 6d9b ldr r3, [r3, #88] ; 0x58 - 8034f84: 1c9a adds r2, r3, #2 - 8034f86: 687b ldr r3, [r7, #4] - 8034f88: 659a str r2, [r3, #88] ; 0x58 + 8035004: 687b ldr r3, [r7, #4] + 8035006: 6d9b ldr r3, [r3, #88] ; 0x58 + 8035008: 1c9a adds r2, r3, #2 + 803500a: 687b ldr r3, [r7, #4] + 803500c: 659a str r2, [r3, #88] ; 0x58 huart->RxXferCount--; - 8034f8a: 687b ldr r3, [r7, #4] - 8034f8c: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8034f90: b29b uxth r3, r3 - 8034f92: 3b01 subs r3, #1 - 8034f94: b29a uxth r2, r3 - 8034f96: 687b ldr r3, [r7, #4] - 8034f98: f8a3 205e strh.w r2, [r3, #94] ; 0x5e + 803500e: 687b ldr r3, [r7, #4] + 8035010: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 8035014: b29b uxth r3, r3 + 8035016: 3b01 subs r3, #1 + 8035018: b29a uxth r2, r3 + 803501a: 687b ldr r3, [r7, #4] + 803501c: f8a3 205e strh.w r2, [r3, #94] ; 0x5e isrflags = READ_REG(huart->Instance->ISR); - 8034f9c: 687b ldr r3, [r7, #4] - 8034f9e: 681b ldr r3, [r3, #0] - 8034fa0: 69db ldr r3, [r3, #28] - 8034fa2: f8c7 309c str.w r3, [r7, #156] ; 0x9c + 8035020: 687b ldr r3, [r7, #4] + 8035022: 681b ldr r3, [r3, #0] + 8035024: 69db ldr r3, [r3, #28] + 8035026: f8c7 309c str.w r3, [r7, #156] ; 0x9c /* If some non blocking errors occurred */ if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U) - 8034fa6: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8034faa: f003 0307 and.w r3, r3, #7 - 8034fae: 2b00 cmp r3, #0 - 8034fb0: d053 beq.n 803505a + 803502a: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 803502e: f003 0307 and.w r3, r3, #7 + 8035032: 2b00 cmp r3, #0 + 8035034: d053 beq.n 80350de { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 8034fb2: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8034fb6: f003 0301 and.w r3, r3, #1 - 8034fba: 2b00 cmp r3, #0 - 8034fbc: d011 beq.n 8034fe2 - 8034fbe: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 - 8034fc2: f403 7380 and.w r3, r3, #256 ; 0x100 - 8034fc6: 2b00 cmp r3, #0 - 8034fc8: d00b beq.n 8034fe2 + 8035036: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 803503a: f003 0301 and.w r3, r3, #1 + 803503e: 2b00 cmp r3, #0 + 8035040: d011 beq.n 8035066 + 8035042: f8d7 3094 ldr.w r3, [r7, #148] ; 0x94 + 8035046: f403 7380 and.w r3, r3, #256 ; 0x100 + 803504a: 2b00 cmp r3, #0 + 803504c: d00b beq.n 8035066 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 8034fca: 687b ldr r3, [r7, #4] - 8034fcc: 681b ldr r3, [r3, #0] - 8034fce: 2201 movs r2, #1 - 8034fd0: 621a str r2, [r3, #32] + 803504e: 687b ldr r3, [r7, #4] + 8035050: 681b ldr r3, [r3, #0] + 8035052: 2201 movs r2, #1 + 8035054: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_PE; - 8034fd2: 687b ldr r3, [r7, #4] - 8034fd4: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8034fd8: f043 0201 orr.w r2, r3, #1 - 8034fdc: 687b ldr r3, [r7, #4] - 8034fde: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8035056: 687b ldr r3, [r7, #4] + 8035058: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 803505c: f043 0201 orr.w r2, r3, #1 + 8035060: 687b ldr r3, [r7, #4] + 8035062: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* UART frame error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8034fe2: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8034fe6: f003 0302 and.w r3, r3, #2 - 8034fea: 2b00 cmp r3, #0 - 8034fec: d011 beq.n 8035012 - 8034fee: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90 - 8034ff2: f003 0301 and.w r3, r3, #1 - 8034ff6: 2b00 cmp r3, #0 - 8034ff8: d00b beq.n 8035012 + 8035066: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 803506a: f003 0302 and.w r3, r3, #2 + 803506e: 2b00 cmp r3, #0 + 8035070: d011 beq.n 8035096 + 8035072: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90 + 8035076: f003 0301 and.w r3, r3, #1 + 803507a: 2b00 cmp r3, #0 + 803507c: d00b beq.n 8035096 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - 8034ffa: 687b ldr r3, [r7, #4] - 8034ffc: 681b ldr r3, [r3, #0] - 8034ffe: 2202 movs r2, #2 - 8035000: 621a str r2, [r3, #32] + 803507e: 687b ldr r3, [r7, #4] + 8035080: 681b ldr r3, [r3, #0] + 8035082: 2202 movs r2, #2 + 8035084: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_FE; - 8035002: 687b ldr r3, [r7, #4] - 8035004: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8035008: f043 0204 orr.w r2, r3, #4 - 803500c: 687b ldr r3, [r7, #4] - 803500e: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 8035086: 687b ldr r3, [r7, #4] + 8035088: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 803508c: f043 0204 orr.w r2, r3, #4 + 8035090: 687b ldr r3, [r7, #4] + 8035092: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* UART noise error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8035012: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 8035016: f003 0304 and.w r3, r3, #4 - 803501a: 2b00 cmp r3, #0 - 803501c: d011 beq.n 8035042 - 803501e: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90 - 8035022: f003 0301 and.w r3, r3, #1 - 8035026: 2b00 cmp r3, #0 - 8035028: d00b beq.n 8035042 + 8035096: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 803509a: f003 0304 and.w r3, r3, #4 + 803509e: 2b00 cmp r3, #0 + 80350a0: d011 beq.n 80350c6 + 80350a2: f8d7 3090 ldr.w r3, [r7, #144] ; 0x90 + 80350a6: f003 0301 and.w r3, r3, #1 + 80350aa: 2b00 cmp r3, #0 + 80350ac: d00b beq.n 80350c6 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - 803502a: 687b ldr r3, [r7, #4] - 803502c: 681b ldr r3, [r3, #0] - 803502e: 2204 movs r2, #4 - 8035030: 621a str r2, [r3, #32] + 80350ae: 687b ldr r3, [r7, #4] + 80350b0: 681b ldr r3, [r3, #0] + 80350b2: 2204 movs r2, #4 + 80350b4: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_NE; - 8035032: 687b ldr r3, [r7, #4] - 8035034: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8035038: f043 0202 orr.w r2, r3, #2 - 803503c: 687b ldr r3, [r7, #4] - 803503e: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 80350b6: 687b ldr r3, [r7, #4] + 80350b8: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 80350bc: f043 0202 orr.w r2, r3, #2 + 80350c0: 687b ldr r3, [r7, #4] + 80350c2: f8c3 208c str.w r2, [r3, #140] ; 0x8c } /* Call UART Error Call back function if need be ----------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8035042: 687b ldr r3, [r7, #4] - 8035044: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8035048: 2b00 cmp r3, #0 - 803504a: d006 beq.n 803505a + 80350c6: 687b ldr r3, [r7, #4] + 80350c8: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 80350cc: 2b00 cmp r3, #0 + 80350ce: d006 beq.n 80350de #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 803504c: 6878 ldr r0, [r7, #4] - 803504e: f7fe faa5 bl 803359c + 80350d0: 6878 ldr r0, [r7, #4] + 80350d2: f7fe faa5 bl 8033620 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8035052: 687b ldr r3, [r7, #4] - 8035054: 2200 movs r2, #0 - 8035056: f8c3 208c str.w r2, [r3, #140] ; 0x8c + 80350d6: 687b ldr r3, [r7, #4] + 80350d8: 2200 movs r2, #0 + 80350da: f8c3 208c str.w r2, [r3, #140] ; 0x8c } } if (huart->RxXferCount == 0U) - 803505a: 687b ldr r3, [r7, #4] - 803505c: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 8035060: b29b uxth r3, r3 - 8035062: 2b00 cmp r3, #0 - 8035064: d173 bne.n 803514e + 80350de: 687b ldr r3, [r7, #4] + 80350e0: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 80350e4: b29b uxth r3, r3 + 80350e6: 2b00 cmp r3, #0 + 80350e8: d173 bne.n 80351d2 { /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8035066: 687b ldr r3, [r7, #4] - 8035068: 681b ldr r3, [r3, #0] - 803506a: 663b str r3, [r7, #96] ; 0x60 + 80350ea: 687b ldr r3, [r7, #4] + 80350ec: 681b ldr r3, [r3, #0] + 80350ee: 663b str r3, [r7, #96] ; 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803506c: 6e3b ldr r3, [r7, #96] ; 0x60 - 803506e: e853 3f00 ldrex r3, [r3] - 8035072: 65fb str r3, [r7, #92] ; 0x5c + 80350f0: 6e3b ldr r3, [r7, #96] ; 0x60 + 80350f2: e853 3f00 ldrex r3, [r3] + 80350f6: 65fb str r3, [r7, #92] ; 0x5c return(result); - 8035074: 6dfb ldr r3, [r7, #92] ; 0x5c - 8035076: f423 7380 bic.w r3, r3, #256 ; 0x100 - 803507a: f8c7 3084 str.w r3, [r7, #132] ; 0x84 - 803507e: 687b ldr r3, [r7, #4] - 8035080: 681b ldr r3, [r3, #0] - 8035082: 461a mov r2, r3 - 8035084: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84 - 8035088: 66fb str r3, [r7, #108] ; 0x6c - 803508a: 66ba str r2, [r7, #104] ; 0x68 + 80350f8: 6dfb ldr r3, [r7, #92] ; 0x5c + 80350fa: f423 7380 bic.w r3, r3, #256 ; 0x100 + 80350fe: f8c7 3084 str.w r3, [r7, #132] ; 0x84 + 8035102: 687b ldr r3, [r7, #4] + 8035104: 681b ldr r3, [r3, #0] + 8035106: 461a mov r2, r3 + 8035108: f8d7 3084 ldr.w r3, [r7, #132] ; 0x84 + 803510c: 66fb str r3, [r7, #108] ; 0x6c + 803510e: 66ba str r2, [r7, #104] ; 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 803508c: 6eb9 ldr r1, [r7, #104] ; 0x68 - 803508e: 6efa ldr r2, [r7, #108] ; 0x6c - 8035090: e841 2300 strex r3, r2, [r1] - 8035094: 667b str r3, [r7, #100] ; 0x64 + 8035110: 6eb9 ldr r1, [r7, #104] ; 0x68 + 8035112: 6efa ldr r2, [r7, #108] ; 0x6c + 8035114: e841 2300 strex r3, r2, [r1] + 8035118: 667b str r3, [r7, #100] ; 0x64 return(result); - 8035096: 6e7b ldr r3, [r7, #100] ; 0x64 - 8035098: 2b00 cmp r3, #0 - 803509a: d1e4 bne.n 8035066 + 803511a: 6e7b ldr r3, [r7, #100] ; 0x64 + 803511c: 2b00 cmp r3, #0 + 803511e: d1e4 bne.n 80350ea /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); - 803509c: 687b ldr r3, [r7, #4] - 803509e: 681b ldr r3, [r3, #0] - 80350a0: 3308 adds r3, #8 - 80350a2: 64fb str r3, [r7, #76] ; 0x4c + 8035120: 687b ldr r3, [r7, #4] + 8035122: 681b ldr r3, [r3, #0] + 8035124: 3308 adds r3, #8 + 8035126: 64fb str r3, [r7, #76] ; 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80350a4: 6cfb ldr r3, [r7, #76] ; 0x4c - 80350a6: e853 3f00 ldrex r3, [r3] - 80350aa: 64bb str r3, [r7, #72] ; 0x48 + 8035128: 6cfb ldr r3, [r7, #76] ; 0x4c + 803512a: e853 3f00 ldrex r3, [r3] + 803512e: 64bb str r3, [r7, #72] ; 0x48 return(result); - 80350ac: 6cba ldr r2, [r7, #72] ; 0x48 - 80350ae: 4b57 ldr r3, [pc, #348] ; (803520c ) - 80350b0: 4013 ands r3, r2 - 80350b2: f8c7 3080 str.w r3, [r7, #128] ; 0x80 - 80350b6: 687b ldr r3, [r7, #4] - 80350b8: 681b ldr r3, [r3, #0] - 80350ba: 3308 adds r3, #8 - 80350bc: f8d7 2080 ldr.w r2, [r7, #128] ; 0x80 - 80350c0: 65ba str r2, [r7, #88] ; 0x58 - 80350c2: 657b str r3, [r7, #84] ; 0x54 + 8035130: 6cba ldr r2, [r7, #72] ; 0x48 + 8035132: 4b57 ldr r3, [pc, #348] ; (8035290 ) + 8035134: 4013 ands r3, r2 + 8035136: f8c7 3080 str.w r3, [r7, #128] ; 0x80 + 803513a: 687b ldr r3, [r7, #4] + 803513c: 681b ldr r3, [r3, #0] + 803513e: 3308 adds r3, #8 + 8035140: f8d7 2080 ldr.w r2, [r7, #128] ; 0x80 + 8035144: 65ba str r2, [r7, #88] ; 0x58 + 8035146: 657b str r3, [r7, #84] ; 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80350c4: 6d79 ldr r1, [r7, #84] ; 0x54 - 80350c6: 6dba ldr r2, [r7, #88] ; 0x58 - 80350c8: e841 2300 strex r3, r2, [r1] - 80350cc: 653b str r3, [r7, #80] ; 0x50 + 8035148: 6d79 ldr r1, [r7, #84] ; 0x54 + 803514a: 6dba ldr r2, [r7, #88] ; 0x58 + 803514c: e841 2300 strex r3, r2, [r1] + 8035150: 653b str r3, [r7, #80] ; 0x50 return(result); - 80350ce: 6d3b ldr r3, [r7, #80] ; 0x50 - 80350d0: 2b00 cmp r3, #0 - 80350d2: d1e3 bne.n 803509c + 8035152: 6d3b ldr r3, [r7, #80] ; 0x50 + 8035154: 2b00 cmp r3, #0 + 8035156: d1e3 bne.n 8035120 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 80350d4: 687b ldr r3, [r7, #4] - 80350d6: 2220 movs r2, #32 - 80350d8: f8c3 2088 str.w r2, [r3, #136] ; 0x88 + 8035158: 687b ldr r3, [r7, #4] + 803515a: 2220 movs r2, #32 + 803515c: f8c3 2088 str.w r2, [r3, #136] ; 0x88 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 80350dc: 687b ldr r3, [r7, #4] - 80350de: 2200 movs r2, #0 - 80350e0: 671a str r2, [r3, #112] ; 0x70 + 8035160: 687b ldr r3, [r7, #4] + 8035162: 2200 movs r2, #0 + 8035164: 671a str r2, [r3, #112] ; 0x70 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80350e2: 687b ldr r3, [r7, #4] - 80350e4: 6edb ldr r3, [r3, #108] ; 0x6c - 80350e6: 2b01 cmp r3, #1 - 80350e8: d12e bne.n 8035148 + 8035166: 687b ldr r3, [r7, #4] + 8035168: 6edb ldr r3, [r3, #108] ; 0x6c + 803516a: 2b01 cmp r3, #1 + 803516c: d12e bne.n 80351cc { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80350ea: 687b ldr r3, [r7, #4] - 80350ec: 2200 movs r2, #0 - 80350ee: 66da str r2, [r3, #108] ; 0x6c + 803516e: 687b ldr r3, [r7, #4] + 8035170: 2200 movs r2, #0 + 8035172: 66da str r2, [r3, #108] ; 0x6c /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 80350f0: 687b ldr r3, [r7, #4] - 80350f2: 681b ldr r3, [r3, #0] - 80350f4: 63bb str r3, [r7, #56] ; 0x38 + 8035174: 687b ldr r3, [r7, #4] + 8035176: 681b ldr r3, [r3, #0] + 8035178: 63bb str r3, [r7, #56] ; 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80350f6: 6bbb ldr r3, [r7, #56] ; 0x38 - 80350f8: e853 3f00 ldrex r3, [r3] - 80350fc: 637b str r3, [r7, #52] ; 0x34 + 803517a: 6bbb ldr r3, [r7, #56] ; 0x38 + 803517c: e853 3f00 ldrex r3, [r3] + 8035180: 637b str r3, [r7, #52] ; 0x34 return(result); - 80350fe: 6b7b ldr r3, [r7, #52] ; 0x34 - 8035100: f023 0310 bic.w r3, r3, #16 - 8035104: 67fb str r3, [r7, #124] ; 0x7c - 8035106: 687b ldr r3, [r7, #4] - 8035108: 681b ldr r3, [r3, #0] - 803510a: 461a mov r2, r3 - 803510c: 6ffb ldr r3, [r7, #124] ; 0x7c - 803510e: 647b str r3, [r7, #68] ; 0x44 - 8035110: 643a str r2, [r7, #64] ; 0x40 + 8035182: 6b7b ldr r3, [r7, #52] ; 0x34 + 8035184: f023 0310 bic.w r3, r3, #16 + 8035188: 67fb str r3, [r7, #124] ; 0x7c + 803518a: 687b ldr r3, [r7, #4] + 803518c: 681b ldr r3, [r3, #0] + 803518e: 461a mov r2, r3 + 8035190: 6ffb ldr r3, [r7, #124] ; 0x7c + 8035192: 647b str r3, [r7, #68] ; 0x44 + 8035194: 643a str r2, [r7, #64] ; 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8035112: 6c39 ldr r1, [r7, #64] ; 0x40 - 8035114: 6c7a ldr r2, [r7, #68] ; 0x44 - 8035116: e841 2300 strex r3, r2, [r1] - 803511a: 63fb str r3, [r7, #60] ; 0x3c + 8035196: 6c39 ldr r1, [r7, #64] ; 0x40 + 8035198: 6c7a ldr r2, [r7, #68] ; 0x44 + 803519a: e841 2300 strex r3, r2, [r1] + 803519e: 63fb str r3, [r7, #60] ; 0x3c return(result); - 803511c: 6bfb ldr r3, [r7, #60] ; 0x3c - 803511e: 2b00 cmp r3, #0 - 8035120: d1e6 bne.n 80350f0 + 80351a0: 6bfb ldr r3, [r7, #60] ; 0x3c + 80351a2: 2b00 cmp r3, #0 + 80351a4: d1e6 bne.n 8035174 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) - 8035122: 687b ldr r3, [r7, #4] - 8035124: 681b ldr r3, [r3, #0] - 8035126: 69db ldr r3, [r3, #28] - 8035128: f003 0310 and.w r3, r3, #16 - 803512c: 2b10 cmp r3, #16 - 803512e: d103 bne.n 8035138 + 80351a6: 687b ldr r3, [r7, #4] + 80351a8: 681b ldr r3, [r3, #0] + 80351aa: 69db ldr r3, [r3, #28] + 80351ac: f003 0310 and.w r3, r3, #16 + 80351b0: 2b10 cmp r3, #16 + 80351b2: d103 bne.n 80351bc { /* Clear IDLE Flag */ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8035130: 687b ldr r3, [r7, #4] - 8035132: 681b ldr r3, [r3, #0] - 8035134: 2210 movs r2, #16 - 8035136: 621a str r2, [r3, #32] + 80351b4: 687b ldr r3, [r7, #4] + 80351b6: 681b ldr r3, [r3, #0] + 80351b8: 2210 movs r2, #16 + 80351ba: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8035138: 687b ldr r3, [r7, #4] - 803513a: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c - 803513e: 4619 mov r1, r3 - 8035140: 6878 ldr r0, [r7, #4] - 8035142: f7fe fa35 bl 80335b0 - 8035146: e002 b.n 803514e + 80351bc: 687b ldr r3, [r7, #4] + 80351be: f8b3 305c ldrh.w r3, [r3, #92] ; 0x5c + 80351c2: 4619 mov r1, r3 + 80351c4: 6878 ldr r0, [r7, #4] + 80351c6: f7fe fa35 bl 8033634 + 80351ca: e002 b.n 80351d2 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 8035148: 6878 ldr r0, [r7, #4] - 803514a: f7ec fcd1 bl 8021af0 + 80351cc: 6878 ldr r0, [r7, #4] + 80351ce: f7ec fc8f bl 8021af0 while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U)) - 803514e: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e - 8035152: 2b00 cmp r3, #0 - 8035154: d006 beq.n 8035164 - 8035156: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c - 803515a: f003 0320 and.w r3, r3, #32 - 803515e: 2b00 cmp r3, #0 - 8035160: f47f aefc bne.w 8034f5c + 80351d2: f8b7 308e ldrh.w r3, [r7, #142] ; 0x8e + 80351d6: 2b00 cmp r3, #0 + 80351d8: d006 beq.n 80351e8 + 80351da: f8d7 309c ldr.w r3, [r7, #156] ; 0x9c + 80351de: f003 0320 and.w r3, r3, #32 + 80351e2: 2b00 cmp r3, #0 + 80351e4: f47f aefc bne.w 8034fe0 /* When remaining number of bytes to receive is less than the RX FIFO threshold, next incoming frames are processed as if FIFO mode was disabled (i.e. one interrupt per received frame). */ rxdatacount = huart->RxXferCount; - 8035164: 687b ldr r3, [r7, #4] - 8035166: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e - 803516a: f8a7 307a strh.w r3, [r7, #122] ; 0x7a + 80351e8: 687b ldr r3, [r7, #4] + 80351ea: f8b3 305e ldrh.w r3, [r3, #94] ; 0x5e + 80351ee: f8a7 307a strh.w r3, [r7, #122] ; 0x7a if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess)) - 803516e: f8b7 307a ldrh.w r3, [r7, #122] ; 0x7a - 8035172: 2b00 cmp r3, #0 - 8035174: d045 beq.n 8035202 - 8035176: 687b ldr r3, [r7, #4] - 8035178: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 803517c: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a - 8035180: 429a cmp r2, r3 - 8035182: d23e bcs.n 8035202 + 80351f2: f8b7 307a ldrh.w r3, [r7, #122] ; 0x7a + 80351f6: 2b00 cmp r3, #0 + 80351f8: d045 beq.n 8035286 + 80351fa: 687b ldr r3, [r7, #4] + 80351fc: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 8035200: f8b7 207a ldrh.w r2, [r7, #122] ; 0x7a + 8035204: 429a cmp r2, r3 + 8035206: d23e bcs.n 8035286 { /* Disable the UART RXFT interrupt*/ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); - 8035184: 687b ldr r3, [r7, #4] - 8035186: 681b ldr r3, [r3, #0] - 8035188: 3308 adds r3, #8 - 803518a: 627b str r3, [r7, #36] ; 0x24 + 8035208: 687b ldr r3, [r7, #4] + 803520a: 681b ldr r3, [r3, #0] + 803520c: 3308 adds r3, #8 + 803520e: 627b str r3, [r7, #36] ; 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 803518c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803518e: e853 3f00 ldrex r3, [r3] - 8035192: 623b str r3, [r7, #32] + 8035210: 6a7b ldr r3, [r7, #36] ; 0x24 + 8035212: e853 3f00 ldrex r3, [r3] + 8035216: 623b str r3, [r7, #32] return(result); - 8035194: 6a3b ldr r3, [r7, #32] - 8035196: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 - 803519a: 677b str r3, [r7, #116] ; 0x74 - 803519c: 687b ldr r3, [r7, #4] - 803519e: 681b ldr r3, [r3, #0] - 80351a0: 3308 adds r3, #8 - 80351a2: 6f7a ldr r2, [r7, #116] ; 0x74 - 80351a4: 633a str r2, [r7, #48] ; 0x30 - 80351a6: 62fb str r3, [r7, #44] ; 0x2c + 8035218: 6a3b ldr r3, [r7, #32] + 803521a: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000 + 803521e: 677b str r3, [r7, #116] ; 0x74 + 8035220: 687b ldr r3, [r7, #4] + 8035222: 681b ldr r3, [r3, #0] + 8035224: 3308 adds r3, #8 + 8035226: 6f7a ldr r2, [r7, #116] ; 0x74 + 8035228: 633a str r2, [r7, #48] ; 0x30 + 803522a: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80351a8: 6af9 ldr r1, [r7, #44] ; 0x2c - 80351aa: 6b3a ldr r2, [r7, #48] ; 0x30 - 80351ac: e841 2300 strex r3, r2, [r1] - 80351b0: 62bb str r3, [r7, #40] ; 0x28 + 803522c: 6af9 ldr r1, [r7, #44] ; 0x2c + 803522e: 6b3a ldr r2, [r7, #48] ; 0x30 + 8035230: e841 2300 strex r3, r2, [r1] + 8035234: 62bb str r3, [r7, #40] ; 0x28 return(result); - 80351b2: 6abb ldr r3, [r7, #40] ; 0x28 - 80351b4: 2b00 cmp r3, #0 - 80351b6: d1e5 bne.n 8035184 + 8035236: 6abb ldr r3, [r7, #40] ; 0x28 + 8035238: 2b00 cmp r3, #0 + 803523a: d1e5 bne.n 8035208 /* Update the RxISR function pointer */ huart->RxISR = UART_RxISR_16BIT; - 80351b8: 687b ldr r3, [r7, #4] - 80351ba: 4a15 ldr r2, [pc, #84] ; (8035210 ) - 80351bc: 671a str r2, [r3, #112] ; 0x70 + 803523c: 687b ldr r3, [r7, #4] + 803523e: 4a15 ldr r2, [pc, #84] ; (8035294 ) + 8035240: 671a str r2, [r3, #112] ; 0x70 /* Enable the UART Data Register Not Empty interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); - 80351be: 687b ldr r3, [r7, #4] - 80351c0: 681b ldr r3, [r3, #0] - 80351c2: 613b str r3, [r7, #16] + 8035242: 687b ldr r3, [r7, #4] + 8035244: 681b ldr r3, [r3, #0] + 8035246: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80351c4: 693b ldr r3, [r7, #16] - 80351c6: e853 3f00 ldrex r3, [r3] - 80351ca: 60fb str r3, [r7, #12] + 8035248: 693b ldr r3, [r7, #16] + 803524a: e853 3f00 ldrex r3, [r3] + 803524e: 60fb str r3, [r7, #12] return(result); - 80351cc: 68fb ldr r3, [r7, #12] - 80351ce: f043 0320 orr.w r3, r3, #32 - 80351d2: 673b str r3, [r7, #112] ; 0x70 - 80351d4: 687b ldr r3, [r7, #4] - 80351d6: 681b ldr r3, [r3, #0] - 80351d8: 461a mov r2, r3 - 80351da: 6f3b ldr r3, [r7, #112] ; 0x70 - 80351dc: 61fb str r3, [r7, #28] - 80351de: 61ba str r2, [r7, #24] + 8035250: 68fb ldr r3, [r7, #12] + 8035252: f043 0320 orr.w r3, r3, #32 + 8035256: 673b str r3, [r7, #112] ; 0x70 + 8035258: 687b ldr r3, [r7, #4] + 803525a: 681b ldr r3, [r3, #0] + 803525c: 461a mov r2, r3 + 803525e: 6f3b ldr r3, [r7, #112] ; 0x70 + 8035260: 61fb str r3, [r7, #28] + 8035262: 61ba str r2, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80351e0: 69b9 ldr r1, [r7, #24] - 80351e2: 69fa ldr r2, [r7, #28] - 80351e4: e841 2300 strex r3, r2, [r1] - 80351e8: 617b str r3, [r7, #20] + 8035264: 69b9 ldr r1, [r7, #24] + 8035266: 69fa ldr r2, [r7, #28] + 8035268: e841 2300 strex r3, r2, [r1] + 803526c: 617b str r3, [r7, #20] return(result); - 80351ea: 697b ldr r3, [r7, #20] - 80351ec: 2b00 cmp r3, #0 - 80351ee: d1e6 bne.n 80351be + 803526e: 697b ldr r3, [r7, #20] + 8035270: 2b00 cmp r3, #0 + 8035272: d1e6 bne.n 8035242 else { /* Clear RXNE interrupt flag */ __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); } } - 80351f0: e007 b.n 8035202 + 8035274: e007 b.n 8035286 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); - 80351f2: 687b ldr r3, [r7, #4] - 80351f4: 681b ldr r3, [r3, #0] - 80351f6: 699a ldr r2, [r3, #24] - 80351f8: 687b ldr r3, [r7, #4] - 80351fa: 681b ldr r3, [r3, #0] - 80351fc: f042 0208 orr.w r2, r2, #8 - 8035200: 619a str r2, [r3, #24] -} - 8035202: bf00 nop - 8035204: 37a0 adds r7, #160 ; 0xa0 - 8035206: 46bd mov sp, r7 - 8035208: bd80 pop {r7, pc} - 803520a: bf00 nop - 803520c: effffffe .word 0xeffffffe - 8035210: 08034abd .word 0x08034abd - -08035214 : + 8035276: 687b ldr r3, [r7, #4] + 8035278: 681b ldr r3, [r3, #0] + 803527a: 699a ldr r2, [r3, #24] + 803527c: 687b ldr r3, [r7, #4] + 803527e: 681b ldr r3, [r3, #0] + 8035280: f042 0208 orr.w r2, r2, #8 + 8035284: 619a str r2, [r3, #24] +} + 8035286: bf00 nop + 8035288: 37a0 adds r7, #160 ; 0xa0 + 803528a: 46bd mov sp, r7 + 803528c: bd80 pop {r7, pc} + 803528e: bf00 nop + 8035290: effffffe .word 0xeffffffe + 8035294: 08034b41 .word 0x08034b41 + +08035298 : * @brief UART wakeup from Stop mode callback. * @param huart UART handle. * @retval None */ __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) { - 8035214: b480 push {r7} - 8035216: b083 sub sp, #12 - 8035218: af00 add r7, sp, #0 - 803521a: 6078 str r0, [r7, #4] + 8035298: b480 push {r7} + 803529a: b083 sub sp, #12 + 803529c: af00 add r7, sp, #0 + 803529e: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_WakeupCallback can be implemented in the user file. */ } - 803521c: bf00 nop - 803521e: 370c adds r7, #12 - 8035220: 46bd mov sp, r7 - 8035222: f85d 7b04 ldr.w r7, [sp], #4 - 8035226: 4770 bx lr + 80352a0: bf00 nop + 80352a2: 370c adds r7, #12 + 80352a4: 46bd mov sp, r7 + 80352a6: f85d 7b04 ldr.w r7, [sp], #4 + 80352aa: 4770 bx lr -08035228 : +080352ac : * @brief UART RX Fifo full callback. * @param huart UART handle. * @retval None */ __weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart) { - 8035228: b480 push {r7} - 803522a: b083 sub sp, #12 - 803522c: af00 add r7, sp, #0 - 803522e: 6078 str r0, [r7, #4] + 80352ac: b480 push {r7} + 80352ae: b083 sub sp, #12 + 80352b0: af00 add r7, sp, #0 + 80352b2: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file. */ } - 8035230: bf00 nop - 8035232: 370c adds r7, #12 - 8035234: 46bd mov sp, r7 - 8035236: f85d 7b04 ldr.w r7, [sp], #4 - 803523a: 4770 bx lr + 80352b4: bf00 nop + 80352b6: 370c adds r7, #12 + 80352b8: 46bd mov sp, r7 + 80352ba: f85d 7b04 ldr.w r7, [sp], #4 + 80352be: 4770 bx lr -0803523c : +080352c0 : * @brief UART TX Fifo empty callback. * @param huart UART handle. * @retval None */ __weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart) { - 803523c: b480 push {r7} - 803523e: b083 sub sp, #12 - 8035240: af00 add r7, sp, #0 - 8035242: 6078 str r0, [r7, #4] + 80352c0: b480 push {r7} + 80352c2: b083 sub sp, #12 + 80352c4: af00 add r7, sp, #0 + 80352c6: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file. */ } - 8035244: bf00 nop - 8035246: 370c adds r7, #12 - 8035248: 46bd mov sp, r7 - 803524a: f85d 7b04 ldr.w r7, [sp], #4 - 803524e: 4770 bx lr + 80352c8: bf00 nop + 80352ca: 370c adds r7, #12 + 80352cc: 46bd mov sp, r7 + 80352ce: f85d 7b04 ldr.w r7, [sp], #4 + 80352d2: 4770 bx lr -08035250 : +080352d4 : * @brief Disable the FIFO mode. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart) { - 8035250: b480 push {r7} - 8035252: b085 sub sp, #20 - 8035254: af00 add r7, sp, #0 - 8035256: 6078 str r0, [r7, #4] + 80352d4: b480 push {r7} + 80352d6: b085 sub sp, #20 + 80352d8: af00 add r7, sp, #0 + 80352da: 6078 str r0, [r7, #4] /* Check parameters */ assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); /* Process Locked */ __HAL_LOCK(huart); - 8035258: 687b ldr r3, [r7, #4] - 803525a: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 803525e: 2b01 cmp r3, #1 - 8035260: d101 bne.n 8035266 - 8035262: 2302 movs r3, #2 - 8035264: e027 b.n 80352b6 - 8035266: 687b ldr r3, [r7, #4] - 8035268: 2201 movs r2, #1 - 803526a: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80352dc: 687b ldr r3, [r7, #4] + 80352de: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 80352e2: 2b01 cmp r3, #1 + 80352e4: d101 bne.n 80352ea + 80352e6: 2302 movs r3, #2 + 80352e8: e027 b.n 803533a + 80352ea: 687b ldr r3, [r7, #4] + 80352ec: 2201 movs r2, #1 + 80352ee: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->gState = HAL_UART_STATE_BUSY; - 803526e: 687b ldr r3, [r7, #4] - 8035270: 2224 movs r2, #36 ; 0x24 - 8035272: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80352f2: 687b ldr r3, [r7, #4] + 80352f4: 2224 movs r2, #36 ; 0x24 + 80352f6: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Save actual UART configuration */ tmpcr1 = READ_REG(huart->Instance->CR1); - 8035276: 687b ldr r3, [r7, #4] - 8035278: 681b ldr r3, [r3, #0] - 803527a: 681b ldr r3, [r3, #0] - 803527c: 60fb str r3, [r7, #12] + 80352fa: 687b ldr r3, [r7, #4] + 80352fc: 681b ldr r3, [r3, #0] + 80352fe: 681b ldr r3, [r3, #0] + 8035300: 60fb str r3, [r7, #12] /* Disable UART */ __HAL_UART_DISABLE(huart); - 803527e: 687b ldr r3, [r7, #4] - 8035280: 681b ldr r3, [r3, #0] - 8035282: 681a ldr r2, [r3, #0] - 8035284: 687b ldr r3, [r7, #4] - 8035286: 681b ldr r3, [r3, #0] - 8035288: f022 0201 bic.w r2, r2, #1 - 803528c: 601a str r2, [r3, #0] + 8035302: 687b ldr r3, [r7, #4] + 8035304: 681b ldr r3, [r3, #0] + 8035306: 681a ldr r2, [r3, #0] + 8035308: 687b ldr r3, [r7, #4] + 803530a: 681b ldr r3, [r3, #0] + 803530c: f022 0201 bic.w r2, r2, #1 + 8035310: 601a str r2, [r3, #0] /* Enable FIFO mode */ CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN); - 803528e: 68fb ldr r3, [r7, #12] - 8035290: f023 5300 bic.w r3, r3, #536870912 ; 0x20000000 - 8035294: 60fb str r3, [r7, #12] + 8035312: 68fb ldr r3, [r7, #12] + 8035314: f023 5300 bic.w r3, r3, #536870912 ; 0x20000000 + 8035318: 60fb str r3, [r7, #12] huart->FifoMode = UART_FIFOMODE_DISABLE; - 8035296: 687b ldr r3, [r7, #4] - 8035298: 2200 movs r2, #0 - 803529a: 665a str r2, [r3, #100] ; 0x64 + 803531a: 687b ldr r3, [r7, #4] + 803531c: 2200 movs r2, #0 + 803531e: 665a str r2, [r3, #100] ; 0x64 /* Restore UART configuration */ WRITE_REG(huart->Instance->CR1, tmpcr1); - 803529c: 687b ldr r3, [r7, #4] - 803529e: 681b ldr r3, [r3, #0] - 80352a0: 68fa ldr r2, [r7, #12] - 80352a2: 601a str r2, [r3, #0] + 8035320: 687b ldr r3, [r7, #4] + 8035322: 681b ldr r3, [r3, #0] + 8035324: 68fa ldr r2, [r7, #12] + 8035326: 601a str r2, [r3, #0] huart->gState = HAL_UART_STATE_READY; - 80352a4: 687b ldr r3, [r7, #4] - 80352a6: 2220 movs r2, #32 - 80352a8: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8035328: 687b ldr r3, [r7, #4] + 803532a: 2220 movs r2, #32 + 803532c: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); - 80352ac: 687b ldr r3, [r7, #4] - 80352ae: 2200 movs r2, #0 - 80352b0: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8035330: 687b ldr r3, [r7, #4] + 8035332: 2200 movs r2, #0 + 8035334: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_OK; - 80352b4: 2300 movs r3, #0 + 8035338: 2300 movs r3, #0 } - 80352b6: 4618 mov r0, r3 - 80352b8: 3714 adds r7, #20 - 80352ba: 46bd mov sp, r7 - 80352bc: f85d 7b04 ldr.w r7, [sp], #4 - 80352c0: 4770 bx lr + 803533a: 4618 mov r0, r3 + 803533c: 3714 adds r7, #20 + 803533e: 46bd mov sp, r7 + 8035340: f85d 7b04 ldr.w r7, [sp], #4 + 8035344: 4770 bx lr -080352c2 : +08035346 : * @arg @ref UART_TXFIFO_THRESHOLD_7_8 * @arg @ref UART_TXFIFO_THRESHOLD_8_8 * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) { - 80352c2: b580 push {r7, lr} - 80352c4: b084 sub sp, #16 - 80352c6: af00 add r7, sp, #0 - 80352c8: 6078 str r0, [r7, #4] - 80352ca: 6039 str r1, [r7, #0] + 8035346: b580 push {r7, lr} + 8035348: b084 sub sp, #16 + 803534a: af00 add r7, sp, #0 + 803534c: 6078 str r0, [r7, #4] + 803534e: 6039 str r1, [r7, #0] /* Check parameters */ assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold)); /* Process Locked */ __HAL_LOCK(huart); - 80352cc: 687b ldr r3, [r7, #4] - 80352ce: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 80352d2: 2b01 cmp r3, #1 - 80352d4: d101 bne.n 80352da - 80352d6: 2302 movs r3, #2 - 80352d8: e02d b.n 8035336 - 80352da: 687b ldr r3, [r7, #4] - 80352dc: 2201 movs r2, #1 - 80352de: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 8035350: 687b ldr r3, [r7, #4] + 8035352: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 8035356: 2b01 cmp r3, #1 + 8035358: d101 bne.n 803535e + 803535a: 2302 movs r3, #2 + 803535c: e02d b.n 80353ba + 803535e: 687b ldr r3, [r7, #4] + 8035360: 2201 movs r2, #1 + 8035362: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->gState = HAL_UART_STATE_BUSY; - 80352e2: 687b ldr r3, [r7, #4] - 80352e4: 2224 movs r2, #36 ; 0x24 - 80352e6: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8035366: 687b ldr r3, [r7, #4] + 8035368: 2224 movs r2, #36 ; 0x24 + 803536a: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Save actual UART configuration */ tmpcr1 = READ_REG(huart->Instance->CR1); - 80352ea: 687b ldr r3, [r7, #4] - 80352ec: 681b ldr r3, [r3, #0] - 80352ee: 681b ldr r3, [r3, #0] - 80352f0: 60fb str r3, [r7, #12] + 803536e: 687b ldr r3, [r7, #4] + 8035370: 681b ldr r3, [r3, #0] + 8035372: 681b ldr r3, [r3, #0] + 8035374: 60fb str r3, [r7, #12] /* Disable UART */ __HAL_UART_DISABLE(huart); - 80352f2: 687b ldr r3, [r7, #4] - 80352f4: 681b ldr r3, [r3, #0] - 80352f6: 681a ldr r2, [r3, #0] - 80352f8: 687b ldr r3, [r7, #4] - 80352fa: 681b ldr r3, [r3, #0] - 80352fc: f022 0201 bic.w r2, r2, #1 - 8035300: 601a str r2, [r3, #0] + 8035376: 687b ldr r3, [r7, #4] + 8035378: 681b ldr r3, [r3, #0] + 803537a: 681a ldr r2, [r3, #0] + 803537c: 687b ldr r3, [r7, #4] + 803537e: 681b ldr r3, [r3, #0] + 8035380: f022 0201 bic.w r2, r2, #1 + 8035384: 601a str r2, [r3, #0] /* Update TX threshold configuration */ MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold); - 8035302: 687b ldr r3, [r7, #4] - 8035304: 681b ldr r3, [r3, #0] - 8035306: 689b ldr r3, [r3, #8] - 8035308: f023 4160 bic.w r1, r3, #3758096384 ; 0xe0000000 - 803530c: 687b ldr r3, [r7, #4] - 803530e: 681b ldr r3, [r3, #0] - 8035310: 683a ldr r2, [r7, #0] - 8035312: 430a orrs r2, r1 - 8035314: 609a str r2, [r3, #8] + 8035386: 687b ldr r3, [r7, #4] + 8035388: 681b ldr r3, [r3, #0] + 803538a: 689b ldr r3, [r3, #8] + 803538c: f023 4160 bic.w r1, r3, #3758096384 ; 0xe0000000 + 8035390: 687b ldr r3, [r7, #4] + 8035392: 681b ldr r3, [r3, #0] + 8035394: 683a ldr r2, [r7, #0] + 8035396: 430a orrs r2, r1 + 8035398: 609a str r2, [r3, #8] /* Determine the number of data to process during RX/TX ISR execution */ UARTEx_SetNbDataToProcess(huart); - 8035316: 6878 ldr r0, [r7, #4] - 8035318: f000 f850 bl 80353bc + 803539a: 6878 ldr r0, [r7, #4] + 803539c: f000 f850 bl 8035440 /* Restore UART configuration */ WRITE_REG(huart->Instance->CR1, tmpcr1); - 803531c: 687b ldr r3, [r7, #4] - 803531e: 681b ldr r3, [r3, #0] - 8035320: 68fa ldr r2, [r7, #12] - 8035322: 601a str r2, [r3, #0] + 80353a0: 687b ldr r3, [r7, #4] + 80353a2: 681b ldr r3, [r3, #0] + 80353a4: 68fa ldr r2, [r7, #12] + 80353a6: 601a str r2, [r3, #0] huart->gState = HAL_UART_STATE_READY; - 8035324: 687b ldr r3, [r7, #4] - 8035326: 2220 movs r2, #32 - 8035328: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80353a8: 687b ldr r3, [r7, #4] + 80353aa: 2220 movs r2, #32 + 80353ac: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); - 803532c: 687b ldr r3, [r7, #4] - 803532e: 2200 movs r2, #0 - 8035330: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80353b0: 687b ldr r3, [r7, #4] + 80353b2: 2200 movs r2, #0 + 80353b4: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_OK; - 8035334: 2300 movs r3, #0 + 80353b8: 2300 movs r3, #0 } - 8035336: 4618 mov r0, r3 - 8035338: 3710 adds r7, #16 - 803533a: 46bd mov sp, r7 - 803533c: bd80 pop {r7, pc} + 80353ba: 4618 mov r0, r3 + 80353bc: 3710 adds r7, #16 + 80353be: 46bd mov sp, r7 + 80353c0: bd80 pop {r7, pc} -0803533e : +080353c2 : * @arg @ref UART_RXFIFO_THRESHOLD_7_8 * @arg @ref UART_RXFIFO_THRESHOLD_8_8 * @retval HAL status */ HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold) { - 803533e: b580 push {r7, lr} - 8035340: b084 sub sp, #16 - 8035342: af00 add r7, sp, #0 - 8035344: 6078 str r0, [r7, #4] - 8035346: 6039 str r1, [r7, #0] + 80353c2: b580 push {r7, lr} + 80353c4: b084 sub sp, #16 + 80353c6: af00 add r7, sp, #0 + 80353c8: 6078 str r0, [r7, #4] + 80353ca: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_UART_FIFO_INSTANCE(huart->Instance)); assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold)); /* Process Locked */ __HAL_LOCK(huart); - 8035348: 687b ldr r3, [r7, #4] - 803534a: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 - 803534e: 2b01 cmp r3, #1 - 8035350: d101 bne.n 8035356 - 8035352: 2302 movs r3, #2 - 8035354: e02d b.n 80353b2 - 8035356: 687b ldr r3, [r7, #4] - 8035358: 2201 movs r2, #1 - 803535a: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 80353cc: 687b ldr r3, [r7, #4] + 80353ce: f893 3080 ldrb.w r3, [r3, #128] ; 0x80 + 80353d2: 2b01 cmp r3, #1 + 80353d4: d101 bne.n 80353da + 80353d6: 2302 movs r3, #2 + 80353d8: e02d b.n 8035436 + 80353da: 687b ldr r3, [r7, #4] + 80353dc: 2201 movs r2, #1 + 80353de: f883 2080 strb.w r2, [r3, #128] ; 0x80 huart->gState = HAL_UART_STATE_BUSY; - 803535e: 687b ldr r3, [r7, #4] - 8035360: 2224 movs r2, #36 ; 0x24 - 8035362: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 80353e2: 687b ldr r3, [r7, #4] + 80353e4: 2224 movs r2, #36 ; 0x24 + 80353e6: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Save actual UART configuration */ tmpcr1 = READ_REG(huart->Instance->CR1); - 8035366: 687b ldr r3, [r7, #4] - 8035368: 681b ldr r3, [r3, #0] - 803536a: 681b ldr r3, [r3, #0] - 803536c: 60fb str r3, [r7, #12] + 80353ea: 687b ldr r3, [r7, #4] + 80353ec: 681b ldr r3, [r3, #0] + 80353ee: 681b ldr r3, [r3, #0] + 80353f0: 60fb str r3, [r7, #12] /* Disable UART */ __HAL_UART_DISABLE(huart); - 803536e: 687b ldr r3, [r7, #4] - 8035370: 681b ldr r3, [r3, #0] - 8035372: 681a ldr r2, [r3, #0] - 8035374: 687b ldr r3, [r7, #4] - 8035376: 681b ldr r3, [r3, #0] - 8035378: f022 0201 bic.w r2, r2, #1 - 803537c: 601a str r2, [r3, #0] + 80353f2: 687b ldr r3, [r7, #4] + 80353f4: 681b ldr r3, [r3, #0] + 80353f6: 681a ldr r2, [r3, #0] + 80353f8: 687b ldr r3, [r7, #4] + 80353fa: 681b ldr r3, [r3, #0] + 80353fc: f022 0201 bic.w r2, r2, #1 + 8035400: 601a str r2, [r3, #0] /* Update RX threshold configuration */ MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold); - 803537e: 687b ldr r3, [r7, #4] - 8035380: 681b ldr r3, [r3, #0] - 8035382: 689b ldr r3, [r3, #8] - 8035384: f023 6160 bic.w r1, r3, #234881024 ; 0xe000000 - 8035388: 687b ldr r3, [r7, #4] - 803538a: 681b ldr r3, [r3, #0] - 803538c: 683a ldr r2, [r7, #0] - 803538e: 430a orrs r2, r1 - 8035390: 609a str r2, [r3, #8] + 8035402: 687b ldr r3, [r7, #4] + 8035404: 681b ldr r3, [r3, #0] + 8035406: 689b ldr r3, [r3, #8] + 8035408: f023 6160 bic.w r1, r3, #234881024 ; 0xe000000 + 803540c: 687b ldr r3, [r7, #4] + 803540e: 681b ldr r3, [r3, #0] + 8035410: 683a ldr r2, [r7, #0] + 8035412: 430a orrs r2, r1 + 8035414: 609a str r2, [r3, #8] /* Determine the number of data to process during RX/TX ISR execution */ UARTEx_SetNbDataToProcess(huart); - 8035392: 6878 ldr r0, [r7, #4] - 8035394: f000 f812 bl 80353bc + 8035416: 6878 ldr r0, [r7, #4] + 8035418: f000 f812 bl 8035440 /* Restore UART configuration */ WRITE_REG(huart->Instance->CR1, tmpcr1); - 8035398: 687b ldr r3, [r7, #4] - 803539a: 681b ldr r3, [r3, #0] - 803539c: 68fa ldr r2, [r7, #12] - 803539e: 601a str r2, [r3, #0] + 803541c: 687b ldr r3, [r7, #4] + 803541e: 681b ldr r3, [r3, #0] + 8035420: 68fa ldr r2, [r7, #12] + 8035422: 601a str r2, [r3, #0] huart->gState = HAL_UART_STATE_READY; - 80353a0: 687b ldr r3, [r7, #4] - 80353a2: 2220 movs r2, #32 - 80353a4: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8035424: 687b ldr r3, [r7, #4] + 8035426: 2220 movs r2, #32 + 8035428: f8c3 2084 str.w r2, [r3, #132] ; 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); - 80353a8: 687b ldr r3, [r7, #4] - 80353aa: 2200 movs r2, #0 - 80353ac: f883 2080 strb.w r2, [r3, #128] ; 0x80 + 803542c: 687b ldr r3, [r7, #4] + 803542e: 2200 movs r2, #0 + 8035430: f883 2080 strb.w r2, [r3, #128] ; 0x80 return HAL_OK; - 80353b0: 2300 movs r3, #0 + 8035434: 2300 movs r3, #0 } - 80353b2: 4618 mov r0, r3 - 80353b4: 3710 adds r7, #16 - 80353b6: 46bd mov sp, r7 - 80353b8: bd80 pop {r7, pc} + 8035436: 4618 mov r0, r3 + 8035438: 3710 adds r7, #16 + 803543a: 46bd mov sp, r7 + 803543c: bd80 pop {r7, pc} ... -080353bc : +08035440 : * the UART configuration registers. * @param huart UART handle. * @retval None */ static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart) { - 80353bc: b480 push {r7} - 80353be: b085 sub sp, #20 - 80353c0: af00 add r7, sp, #0 - 80353c2: 6078 str r0, [r7, #4] + 8035440: b480 push {r7} + 8035442: b085 sub sp, #20 + 8035444: af00 add r7, sp, #0 + 8035446: 6078 str r0, [r7, #4] uint8_t rx_fifo_threshold; uint8_t tx_fifo_threshold; static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U}; static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U}; if (huart->FifoMode == UART_FIFOMODE_DISABLE) - 80353c4: 687b ldr r3, [r7, #4] - 80353c6: 6e5b ldr r3, [r3, #100] ; 0x64 - 80353c8: 2b00 cmp r3, #0 - 80353ca: d108 bne.n 80353de + 8035448: 687b ldr r3, [r7, #4] + 803544a: 6e5b ldr r3, [r3, #100] ; 0x64 + 803544c: 2b00 cmp r3, #0 + 803544e: d108 bne.n 8035462 { huart->NbTxDataToProcess = 1U; - 80353cc: 687b ldr r3, [r7, #4] - 80353ce: 2201 movs r2, #1 - 80353d0: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 8035450: 687b ldr r3, [r7, #4] + 8035452: 2201 movs r2, #1 + 8035454: f8a3 206a strh.w r2, [r3, #106] ; 0x6a huart->NbRxDataToProcess = 1U; - 80353d4: 687b ldr r3, [r7, #4] - 80353d6: 2201 movs r2, #1 - 80353d8: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 8035458: 687b ldr r3, [r7, #4] + 803545a: 2201 movs r2, #1 + 803545c: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / (uint16_t)denominator[tx_fifo_threshold]; huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / (uint16_t)denominator[rx_fifo_threshold]; } } - 80353dc: e031 b.n 8035442 + 8035460: e031 b.n 80354c6 rx_fifo_depth = RX_FIFO_DEPTH; - 80353de: 2310 movs r3, #16 - 80353e0: 73fb strb r3, [r7, #15] + 8035462: 2310 movs r3, #16 + 8035464: 73fb strb r3, [r7, #15] tx_fifo_depth = TX_FIFO_DEPTH; - 80353e2: 2310 movs r3, #16 - 80353e4: 73bb strb r3, [r7, #14] + 8035466: 2310 movs r3, #16 + 8035468: 73bb strb r3, [r7, #14] rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); - 80353e6: 687b ldr r3, [r7, #4] - 80353e8: 681b ldr r3, [r3, #0] - 80353ea: 689b ldr r3, [r3, #8] - 80353ec: 0e5b lsrs r3, r3, #25 - 80353ee: b2db uxtb r3, r3 - 80353f0: f003 0307 and.w r3, r3, #7 - 80353f4: 737b strb r3, [r7, #13] + 803546a: 687b ldr r3, [r7, #4] + 803546c: 681b ldr r3, [r3, #0] + 803546e: 689b ldr r3, [r3, #8] + 8035470: 0e5b lsrs r3, r3, #25 + 8035472: b2db uxtb r3, r3 + 8035474: f003 0307 and.w r3, r3, #7 + 8035478: 737b strb r3, [r7, #13] tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); - 80353f6: 687b ldr r3, [r7, #4] - 80353f8: 681b ldr r3, [r3, #0] - 80353fa: 689b ldr r3, [r3, #8] - 80353fc: 0f5b lsrs r3, r3, #29 - 80353fe: b2db uxtb r3, r3 - 8035400: f003 0307 and.w r3, r3, #7 - 8035404: 733b strb r3, [r7, #12] + 803547a: 687b ldr r3, [r7, #4] + 803547c: 681b ldr r3, [r3, #0] + 803547e: 689b ldr r3, [r3, #8] + 8035480: 0f5b lsrs r3, r3, #29 + 8035482: b2db uxtb r3, r3 + 8035484: f003 0307 and.w r3, r3, #7 + 8035488: 733b strb r3, [r7, #12] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 8035406: 7bbb ldrb r3, [r7, #14] - 8035408: 7b3a ldrb r2, [r7, #12] - 803540a: 4911 ldr r1, [pc, #68] ; (8035450 ) - 803540c: 5c8a ldrb r2, [r1, r2] - 803540e: fb02 f303 mul.w r3, r2, r3 + 803548a: 7bbb ldrb r3, [r7, #14] + 803548c: 7b3a ldrb r2, [r7, #12] + 803548e: 4911 ldr r1, [pc, #68] ; (80354d4 ) + 8035490: 5c8a ldrb r2, [r1, r2] + 8035492: fb02 f303 mul.w r3, r2, r3 (uint16_t)denominator[tx_fifo_threshold]; - 8035412: 7b3a ldrb r2, [r7, #12] - 8035414: 490f ldr r1, [pc, #60] ; (8035454 ) - 8035416: 5c8a ldrb r2, [r1, r2] + 8035496: 7b3a ldrb r2, [r7, #12] + 8035498: 490f ldr r1, [pc, #60] ; (80354d8 ) + 803549a: 5c8a ldrb r2, [r1, r2] huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) / - 8035418: fb93 f3f2 sdiv r3, r3, r2 - 803541c: b29a uxth r2, r3 - 803541e: 687b ldr r3, [r7, #4] - 8035420: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803549c: fb93 f3f2 sdiv r3, r3, r2 + 80354a0: b29a uxth r2, r3 + 80354a2: 687b ldr r3, [r7, #4] + 80354a4: f8a3 206a strh.w r2, [r3, #106] ; 0x6a huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / - 8035424: 7bfb ldrb r3, [r7, #15] - 8035426: 7b7a ldrb r2, [r7, #13] - 8035428: 4909 ldr r1, [pc, #36] ; (8035450 ) - 803542a: 5c8a ldrb r2, [r1, r2] - 803542c: fb02 f303 mul.w r3, r2, r3 + 80354a8: 7bfb ldrb r3, [r7, #15] + 80354aa: 7b7a ldrb r2, [r7, #13] + 80354ac: 4909 ldr r1, [pc, #36] ; (80354d4 ) + 80354ae: 5c8a ldrb r2, [r1, r2] + 80354b0: fb02 f303 mul.w r3, r2, r3 (uint16_t)denominator[rx_fifo_threshold]; - 8035430: 7b7a ldrb r2, [r7, #13] - 8035432: 4908 ldr r1, [pc, #32] ; (8035454 ) - 8035434: 5c8a ldrb r2, [r1, r2] + 80354b4: 7b7a ldrb r2, [r7, #13] + 80354b6: 4908 ldr r1, [pc, #32] ; (80354d8 ) + 80354b8: 5c8a ldrb r2, [r1, r2] huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) / - 8035436: fb93 f3f2 sdiv r3, r3, r2 - 803543a: b29a uxth r2, r3 - 803543c: 687b ldr r3, [r7, #4] - 803543e: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 -} - 8035442: bf00 nop - 8035444: 3714 adds r7, #20 - 8035446: 46bd mov sp, r7 - 8035448: f85d 7b04 ldr.w r7, [sp], #4 - 803544c: 4770 bx lr - 803544e: bf00 nop - 8035450: 08044d14 .word 0x08044d14 - 8035454: 08044d1c .word 0x08044d1c - -08035458 : + 80354ba: fb93 f3f2 sdiv r3, r3, r2 + 80354be: b29a uxth r2, r3 + 80354c0: 687b ldr r3, [r7, #4] + 80354c2: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 +} + 80354c6: bf00 nop + 80354c8: 3714 adds r7, #20 + 80354ca: 46bd mov sp, r7 + 80354cc: f85d 7b04 ldr.w r7, [sp], #4 + 80354d0: 4770 bx lr + 80354d2: bf00 nop + 80354d4: 08044d94 .word 0x08044d94 + 80354d8: 08044d9c .word 0x08044d9c + +080354dc : /** * LwIP initialization function */ void MX_LWIP_Init(void) { - 8035458: b580 push {r7, lr} - 803545a: b084 sub sp, #16 - 803545c: af04 add r7, sp, #16 + 80354dc: b580 push {r7, lr} + 80354de: b084 sub sp, #16 + 80354e0: af04 add r7, sp, #16 /* IP addresses initialization */ IP_ADDRESS[0] = 192; - 803545e: 4b8d ldr r3, [pc, #564] ; (8035694 ) - 8035460: 22c0 movs r2, #192 ; 0xc0 - 8035462: 701a strb r2, [r3, #0] + 80354e2: 4b8d ldr r3, [pc, #564] ; (8035718 ) + 80354e4: 22c0 movs r2, #192 ; 0xc0 + 80354e6: 701a strb r2, [r3, #0] IP_ADDRESS[1] = 168; - 8035464: 4b8b ldr r3, [pc, #556] ; (8035694 ) - 8035466: 22a8 movs r2, #168 ; 0xa8 - 8035468: 705a strb r2, [r3, #1] + 80354e8: 4b8b ldr r3, [pc, #556] ; (8035718 ) + 80354ea: 22a8 movs r2, #168 ; 0xa8 + 80354ec: 705a strb r2, [r3, #1] IP_ADDRESS[2] = 144; - 803546a: 4b8a ldr r3, [pc, #552] ; (8035694 ) - 803546c: 2290 movs r2, #144 ; 0x90 - 803546e: 709a strb r2, [r3, #2] + 80354ee: 4b8a ldr r3, [pc, #552] ; (8035718 ) + 80354f0: 2290 movs r2, #144 ; 0x90 + 80354f2: 709a strb r2, [r3, #2] IP_ADDRESS[3] = 98; - 8035470: 4b88 ldr r3, [pc, #544] ; (8035694 ) - 8035472: 2262 movs r2, #98 ; 0x62 - 8035474: 70da strb r2, [r3, #3] + 80354f4: 4b88 ldr r3, [pc, #544] ; (8035718 ) + 80354f6: 2262 movs r2, #98 ; 0x62 + 80354f8: 70da strb r2, [r3, #3] NETMASK_ADDRESS[0] = 255; - 8035476: 4b88 ldr r3, [pc, #544] ; (8035698 ) - 8035478: 22ff movs r2, #255 ; 0xff - 803547a: 701a strb r2, [r3, #0] + 80354fa: 4b88 ldr r3, [pc, #544] ; (803571c ) + 80354fc: 22ff movs r2, #255 ; 0xff + 80354fe: 701a strb r2, [r3, #0] NETMASK_ADDRESS[1] = 255; - 803547c: 4b86 ldr r3, [pc, #536] ; (8035698 ) - 803547e: 22ff movs r2, #255 ; 0xff - 8035480: 705a strb r2, [r3, #1] + 8035500: 4b86 ldr r3, [pc, #536] ; (803571c ) + 8035502: 22ff movs r2, #255 ; 0xff + 8035504: 705a strb r2, [r3, #1] NETMASK_ADDRESS[2] = 255; - 8035482: 4b85 ldr r3, [pc, #532] ; (8035698 ) - 8035484: 22ff movs r2, #255 ; 0xff - 8035486: 709a strb r2, [r3, #2] + 8035506: 4b85 ldr r3, [pc, #532] ; (803571c ) + 8035508: 22ff movs r2, #255 ; 0xff + 803550a: 709a strb r2, [r3, #2] NETMASK_ADDRESS[3] = 0; - 8035488: 4b83 ldr r3, [pc, #524] ; (8035698 ) - 803548a: 2200 movs r2, #0 - 803548c: 70da strb r2, [r3, #3] + 803550c: 4b83 ldr r3, [pc, #524] ; (803571c ) + 803550e: 2200 movs r2, #0 + 8035510: 70da strb r2, [r3, #3] GATEWAY_ADDRESS[0] = 192; - 803548e: 4b83 ldr r3, [pc, #524] ; (803569c ) - 8035490: 22c0 movs r2, #192 ; 0xc0 - 8035492: 701a strb r2, [r3, #0] + 8035512: 4b83 ldr r3, [pc, #524] ; (8035720 ) + 8035514: 22c0 movs r2, #192 ; 0xc0 + 8035516: 701a strb r2, [r3, #0] GATEWAY_ADDRESS[1] = 168; - 8035494: 4b81 ldr r3, [pc, #516] ; (803569c ) - 8035496: 22a8 movs r2, #168 ; 0xa8 - 8035498: 705a strb r2, [r3, #1] + 8035518: 4b81 ldr r3, [pc, #516] ; (8035720 ) + 803551a: 22a8 movs r2, #168 ; 0xa8 + 803551c: 705a strb r2, [r3, #1] GATEWAY_ADDRESS[2] = 144; - 803549a: 4b80 ldr r3, [pc, #512] ; (803569c ) - 803549c: 2290 movs r2, #144 ; 0x90 - 803549e: 709a strb r2, [r3, #2] + 803551e: 4b80 ldr r3, [pc, #512] ; (8035720 ) + 8035520: 2290 movs r2, #144 ; 0x90 + 8035522: 709a strb r2, [r3, #2] GATEWAY_ADDRESS[3] = 1; - 80354a0: 4b7e ldr r3, [pc, #504] ; (803569c ) - 80354a2: 2201 movs r2, #1 - 80354a4: 70da strb r2, [r3, #3] + 8035524: 4b7e ldr r3, [pc, #504] ; (8035720 ) + 8035526: 2201 movs r2, #1 + 8035528: 70da strb r2, [r3, #3] /* USER CODE BEGIN IP_ADDRESSES */ /* USER CODE END IP_ADDRESSES */ /* Initilialize the LwIP stack without RTOS */ lwip_init(); - 80354a6: f000 fe01 bl 80360ac + 803552a: f000 fe01 bl 8036130 /* IP addresses initialization without DHCP (IPv4) */ IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]); - 80354aa: 4b7a ldr r3, [pc, #488] ; (8035694 ) - 80354ac: 781b ldrb r3, [r3, #0] - 80354ae: 061a lsls r2, r3, #24 - 80354b0: 4b78 ldr r3, [pc, #480] ; (8035694 ) - 80354b2: 785b ldrb r3, [r3, #1] - 80354b4: 041b lsls r3, r3, #16 - 80354b6: 431a orrs r2, r3 - 80354b8: 4b76 ldr r3, [pc, #472] ; (8035694 ) - 80354ba: 789b ldrb r3, [r3, #2] - 80354bc: 021b lsls r3, r3, #8 - 80354be: 4313 orrs r3, r2 - 80354c0: 4a74 ldr r2, [pc, #464] ; (8035694 ) - 80354c2: 78d2 ldrb r2, [r2, #3] - 80354c4: 4313 orrs r3, r2 - 80354c6: 061a lsls r2, r3, #24 - 80354c8: 4b72 ldr r3, [pc, #456] ; (8035694 ) - 80354ca: 781b ldrb r3, [r3, #0] - 80354cc: 0619 lsls r1, r3, #24 - 80354ce: 4b71 ldr r3, [pc, #452] ; (8035694 ) - 80354d0: 785b ldrb r3, [r3, #1] - 80354d2: 041b lsls r3, r3, #16 - 80354d4: 4319 orrs r1, r3 - 80354d6: 4b6f ldr r3, [pc, #444] ; (8035694 ) - 80354d8: 789b ldrb r3, [r3, #2] - 80354da: 021b lsls r3, r3, #8 - 80354dc: 430b orrs r3, r1 - 80354de: 496d ldr r1, [pc, #436] ; (8035694 ) - 80354e0: 78c9 ldrb r1, [r1, #3] - 80354e2: 430b orrs r3, r1 - 80354e4: 021b lsls r3, r3, #8 - 80354e6: f403 037f and.w r3, r3, #16711680 ; 0xff0000 - 80354ea: 431a orrs r2, r3 - 80354ec: 4b69 ldr r3, [pc, #420] ; (8035694 ) - 80354ee: 781b ldrb r3, [r3, #0] - 80354f0: 0619 lsls r1, r3, #24 - 80354f2: 4b68 ldr r3, [pc, #416] ; (8035694 ) - 80354f4: 785b ldrb r3, [r3, #1] - 80354f6: 041b lsls r3, r3, #16 - 80354f8: 4319 orrs r1, r3 - 80354fa: 4b66 ldr r3, [pc, #408] ; (8035694 ) - 80354fc: 789b ldrb r3, [r3, #2] - 80354fe: 021b lsls r3, r3, #8 - 8035500: 430b orrs r3, r1 - 8035502: 4964 ldr r1, [pc, #400] ; (8035694 ) - 8035504: 78c9 ldrb r1, [r1, #3] - 8035506: 430b orrs r3, r1 - 8035508: 0a1b lsrs r3, r3, #8 - 803550a: f403 437f and.w r3, r3, #65280 ; 0xff00 - 803550e: 431a orrs r2, r3 - 8035510: 4b60 ldr r3, [pc, #384] ; (8035694 ) - 8035512: 781b ldrb r3, [r3, #0] - 8035514: 0619 lsls r1, r3, #24 - 8035516: 4b5f ldr r3, [pc, #380] ; (8035694 ) - 8035518: 785b ldrb r3, [r3, #1] - 803551a: 041b lsls r3, r3, #16 - 803551c: 4319 orrs r1, r3 - 803551e: 4b5d ldr r3, [pc, #372] ; (8035694 ) - 8035520: 789b ldrb r3, [r3, #2] - 8035522: 021b lsls r3, r3, #8 - 8035524: 430b orrs r3, r1 - 8035526: 495b ldr r1, [pc, #364] ; (8035694 ) - 8035528: 78c9 ldrb r1, [r1, #3] - 803552a: 430b orrs r3, r1 - 803552c: 0e1b lsrs r3, r3, #24 - 803552e: 4313 orrs r3, r2 - 8035530: 4a5b ldr r2, [pc, #364] ; (80356a0 ) - 8035532: 6013 str r3, [r2, #0] - IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]); - 8035534: 4b58 ldr r3, [pc, #352] ; (8035698 ) - 8035536: 781b ldrb r3, [r3, #0] - 8035538: 061a lsls r2, r3, #24 - 803553a: 4b57 ldr r3, [pc, #348] ; (8035698 ) - 803553c: 785b ldrb r3, [r3, #1] - 803553e: 041b lsls r3, r3, #16 - 8035540: 431a orrs r2, r3 - 8035542: 4b55 ldr r3, [pc, #340] ; (8035698 ) - 8035544: 789b ldrb r3, [r3, #2] - 8035546: 021b lsls r3, r3, #8 + 803552e: 4b7a ldr r3, [pc, #488] ; (8035718 ) + 8035530: 781b ldrb r3, [r3, #0] + 8035532: 061a lsls r2, r3, #24 + 8035534: 4b78 ldr r3, [pc, #480] ; (8035718 ) + 8035536: 785b ldrb r3, [r3, #1] + 8035538: 041b lsls r3, r3, #16 + 803553a: 431a orrs r2, r3 + 803553c: 4b76 ldr r3, [pc, #472] ; (8035718 ) + 803553e: 789b ldrb r3, [r3, #2] + 8035540: 021b lsls r3, r3, #8 + 8035542: 4313 orrs r3, r2 + 8035544: 4a74 ldr r2, [pc, #464] ; (8035718 ) + 8035546: 78d2 ldrb r2, [r2, #3] 8035548: 4313 orrs r3, r2 - 803554a: 4a53 ldr r2, [pc, #332] ; (8035698 ) - 803554c: 78d2 ldrb r2, [r2, #3] - 803554e: 4313 orrs r3, r2 - 8035550: 061a lsls r2, r3, #24 - 8035552: 4b51 ldr r3, [pc, #324] ; (8035698 ) - 8035554: 781b ldrb r3, [r3, #0] - 8035556: 0619 lsls r1, r3, #24 - 8035558: 4b4f ldr r3, [pc, #316] ; (8035698 ) - 803555a: 785b ldrb r3, [r3, #1] - 803555c: 041b lsls r3, r3, #16 - 803555e: 4319 orrs r1, r3 - 8035560: 4b4d ldr r3, [pc, #308] ; (8035698 ) - 8035562: 789b ldrb r3, [r3, #2] - 8035564: 021b lsls r3, r3, #8 + 803554a: 061a lsls r2, r3, #24 + 803554c: 4b72 ldr r3, [pc, #456] ; (8035718 ) + 803554e: 781b ldrb r3, [r3, #0] + 8035550: 0619 lsls r1, r3, #24 + 8035552: 4b71 ldr r3, [pc, #452] ; (8035718 ) + 8035554: 785b ldrb r3, [r3, #1] + 8035556: 041b lsls r3, r3, #16 + 8035558: 4319 orrs r1, r3 + 803555a: 4b6f ldr r3, [pc, #444] ; (8035718 ) + 803555c: 789b ldrb r3, [r3, #2] + 803555e: 021b lsls r3, r3, #8 + 8035560: 430b orrs r3, r1 + 8035562: 496d ldr r1, [pc, #436] ; (8035718 ) + 8035564: 78c9 ldrb r1, [r1, #3] 8035566: 430b orrs r3, r1 - 8035568: 494b ldr r1, [pc, #300] ; (8035698 ) - 803556a: 78c9 ldrb r1, [r1, #3] - 803556c: 430b orrs r3, r1 - 803556e: 021b lsls r3, r3, #8 - 8035570: f403 037f and.w r3, r3, #16711680 ; 0xff0000 - 8035574: 431a orrs r2, r3 - 8035576: 4b48 ldr r3, [pc, #288] ; (8035698 ) - 8035578: 781b ldrb r3, [r3, #0] - 803557a: 0619 lsls r1, r3, #24 - 803557c: 4b46 ldr r3, [pc, #280] ; (8035698 ) - 803557e: 785b ldrb r3, [r3, #1] - 8035580: 041b lsls r3, r3, #16 - 8035582: 4319 orrs r1, r3 - 8035584: 4b44 ldr r3, [pc, #272] ; (8035698 ) - 8035586: 789b ldrb r3, [r3, #2] - 8035588: 021b lsls r3, r3, #8 + 8035568: 021b lsls r3, r3, #8 + 803556a: f403 037f and.w r3, r3, #16711680 ; 0xff0000 + 803556e: 431a orrs r2, r3 + 8035570: 4b69 ldr r3, [pc, #420] ; (8035718 ) + 8035572: 781b ldrb r3, [r3, #0] + 8035574: 0619 lsls r1, r3, #24 + 8035576: 4b68 ldr r3, [pc, #416] ; (8035718 ) + 8035578: 785b ldrb r3, [r3, #1] + 803557a: 041b lsls r3, r3, #16 + 803557c: 4319 orrs r1, r3 + 803557e: 4b66 ldr r3, [pc, #408] ; (8035718 ) + 8035580: 789b ldrb r3, [r3, #2] + 8035582: 021b lsls r3, r3, #8 + 8035584: 430b orrs r3, r1 + 8035586: 4964 ldr r1, [pc, #400] ; (8035718 ) + 8035588: 78c9 ldrb r1, [r1, #3] 803558a: 430b orrs r3, r1 - 803558c: 4942 ldr r1, [pc, #264] ; (8035698 ) - 803558e: 78c9 ldrb r1, [r1, #3] - 8035590: 430b orrs r3, r1 - 8035592: 0a1b lsrs r3, r3, #8 - 8035594: f403 437f and.w r3, r3, #65280 ; 0xff00 - 8035598: 431a orrs r2, r3 - 803559a: 4b3f ldr r3, [pc, #252] ; (8035698 ) - 803559c: 781b ldrb r3, [r3, #0] - 803559e: 0619 lsls r1, r3, #24 - 80355a0: 4b3d ldr r3, [pc, #244] ; (8035698 ) - 80355a2: 785b ldrb r3, [r3, #1] - 80355a4: 041b lsls r3, r3, #16 - 80355a6: 4319 orrs r1, r3 - 80355a8: 4b3b ldr r3, [pc, #236] ; (8035698 ) - 80355aa: 789b ldrb r3, [r3, #2] - 80355ac: 021b lsls r3, r3, #8 + 803558c: 0a1b lsrs r3, r3, #8 + 803558e: f403 437f and.w r3, r3, #65280 ; 0xff00 + 8035592: 431a orrs r2, r3 + 8035594: 4b60 ldr r3, [pc, #384] ; (8035718 ) + 8035596: 781b ldrb r3, [r3, #0] + 8035598: 0619 lsls r1, r3, #24 + 803559a: 4b5f ldr r3, [pc, #380] ; (8035718 ) + 803559c: 785b ldrb r3, [r3, #1] + 803559e: 041b lsls r3, r3, #16 + 80355a0: 4319 orrs r1, r3 + 80355a2: 4b5d ldr r3, [pc, #372] ; (8035718 ) + 80355a4: 789b ldrb r3, [r3, #2] + 80355a6: 021b lsls r3, r3, #8 + 80355a8: 430b orrs r3, r1 + 80355aa: 495b ldr r1, [pc, #364] ; (8035718 ) + 80355ac: 78c9 ldrb r1, [r1, #3] 80355ae: 430b orrs r3, r1 - 80355b0: 4939 ldr r1, [pc, #228] ; (8035698 ) - 80355b2: 78c9 ldrb r1, [r1, #3] - 80355b4: 430b orrs r3, r1 - 80355b6: 0e1b lsrs r3, r3, #24 - 80355b8: 4313 orrs r3, r2 - 80355ba: 4a3a ldr r2, [pc, #232] ; (80356a4 ) - 80355bc: 6013 str r3, [r2, #0] - IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]); - 80355be: 4b37 ldr r3, [pc, #220] ; (803569c ) - 80355c0: 781b ldrb r3, [r3, #0] - 80355c2: 061a lsls r2, r3, #24 - 80355c4: 4b35 ldr r3, [pc, #212] ; (803569c ) - 80355c6: 785b ldrb r3, [r3, #1] - 80355c8: 041b lsls r3, r3, #16 - 80355ca: 431a orrs r2, r3 - 80355cc: 4b33 ldr r3, [pc, #204] ; (803569c ) - 80355ce: 789b ldrb r3, [r3, #2] - 80355d0: 021b lsls r3, r3, #8 + 80355b0: 0e1b lsrs r3, r3, #24 + 80355b2: 4313 orrs r3, r2 + 80355b4: 4a5b ldr r2, [pc, #364] ; (8035724 ) + 80355b6: 6013 str r3, [r2, #0] + IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]); + 80355b8: 4b58 ldr r3, [pc, #352] ; (803571c ) + 80355ba: 781b ldrb r3, [r3, #0] + 80355bc: 061a lsls r2, r3, #24 + 80355be: 4b57 ldr r3, [pc, #348] ; (803571c ) + 80355c0: 785b ldrb r3, [r3, #1] + 80355c2: 041b lsls r3, r3, #16 + 80355c4: 431a orrs r2, r3 + 80355c6: 4b55 ldr r3, [pc, #340] ; (803571c ) + 80355c8: 789b ldrb r3, [r3, #2] + 80355ca: 021b lsls r3, r3, #8 + 80355cc: 4313 orrs r3, r2 + 80355ce: 4a53 ldr r2, [pc, #332] ; (803571c ) + 80355d0: 78d2 ldrb r2, [r2, #3] 80355d2: 4313 orrs r3, r2 - 80355d4: 4a31 ldr r2, [pc, #196] ; (803569c ) - 80355d6: 78d2 ldrb r2, [r2, #3] - 80355d8: 4313 orrs r3, r2 - 80355da: 061a lsls r2, r3, #24 - 80355dc: 4b2f ldr r3, [pc, #188] ; (803569c ) - 80355de: 781b ldrb r3, [r3, #0] - 80355e0: 0619 lsls r1, r3, #24 - 80355e2: 4b2e ldr r3, [pc, #184] ; (803569c ) - 80355e4: 785b ldrb r3, [r3, #1] - 80355e6: 041b lsls r3, r3, #16 - 80355e8: 4319 orrs r1, r3 - 80355ea: 4b2c ldr r3, [pc, #176] ; (803569c ) - 80355ec: 789b ldrb r3, [r3, #2] - 80355ee: 021b lsls r3, r3, #8 + 80355d4: 061a lsls r2, r3, #24 + 80355d6: 4b51 ldr r3, [pc, #324] ; (803571c ) + 80355d8: 781b ldrb r3, [r3, #0] + 80355da: 0619 lsls r1, r3, #24 + 80355dc: 4b4f ldr r3, [pc, #316] ; (803571c ) + 80355de: 785b ldrb r3, [r3, #1] + 80355e0: 041b lsls r3, r3, #16 + 80355e2: 4319 orrs r1, r3 + 80355e4: 4b4d ldr r3, [pc, #308] ; (803571c ) + 80355e6: 789b ldrb r3, [r3, #2] + 80355e8: 021b lsls r3, r3, #8 + 80355ea: 430b orrs r3, r1 + 80355ec: 494b ldr r1, [pc, #300] ; (803571c ) + 80355ee: 78c9 ldrb r1, [r1, #3] 80355f0: 430b orrs r3, r1 - 80355f2: 492a ldr r1, [pc, #168] ; (803569c ) - 80355f4: 78c9 ldrb r1, [r1, #3] - 80355f6: 430b orrs r3, r1 - 80355f8: 021b lsls r3, r3, #8 - 80355fa: f403 037f and.w r3, r3, #16711680 ; 0xff0000 - 80355fe: 431a orrs r2, r3 - 8035600: 4b26 ldr r3, [pc, #152] ; (803569c ) - 8035602: 781b ldrb r3, [r3, #0] - 8035604: 0619 lsls r1, r3, #24 - 8035606: 4b25 ldr r3, [pc, #148] ; (803569c ) - 8035608: 785b ldrb r3, [r3, #1] - 803560a: 041b lsls r3, r3, #16 - 803560c: 4319 orrs r1, r3 - 803560e: 4b23 ldr r3, [pc, #140] ; (803569c ) - 8035610: 789b ldrb r3, [r3, #2] - 8035612: 021b lsls r3, r3, #8 + 80355f2: 021b lsls r3, r3, #8 + 80355f4: f403 037f and.w r3, r3, #16711680 ; 0xff0000 + 80355f8: 431a orrs r2, r3 + 80355fa: 4b48 ldr r3, [pc, #288] ; (803571c ) + 80355fc: 781b ldrb r3, [r3, #0] + 80355fe: 0619 lsls r1, r3, #24 + 8035600: 4b46 ldr r3, [pc, #280] ; (803571c ) + 8035602: 785b ldrb r3, [r3, #1] + 8035604: 041b lsls r3, r3, #16 + 8035606: 4319 orrs r1, r3 + 8035608: 4b44 ldr r3, [pc, #272] ; (803571c ) + 803560a: 789b ldrb r3, [r3, #2] + 803560c: 021b lsls r3, r3, #8 + 803560e: 430b orrs r3, r1 + 8035610: 4942 ldr r1, [pc, #264] ; (803571c ) + 8035612: 78c9 ldrb r1, [r1, #3] 8035614: 430b orrs r3, r1 - 8035616: 4921 ldr r1, [pc, #132] ; (803569c ) - 8035618: 78c9 ldrb r1, [r1, #3] - 803561a: 430b orrs r3, r1 - 803561c: 0a1b lsrs r3, r3, #8 - 803561e: f403 437f and.w r3, r3, #65280 ; 0xff00 - 8035622: 431a orrs r2, r3 - 8035624: 4b1d ldr r3, [pc, #116] ; (803569c ) - 8035626: 781b ldrb r3, [r3, #0] - 8035628: 0619 lsls r1, r3, #24 - 803562a: 4b1c ldr r3, [pc, #112] ; (803569c ) - 803562c: 785b ldrb r3, [r3, #1] - 803562e: 041b lsls r3, r3, #16 - 8035630: 4319 orrs r1, r3 - 8035632: 4b1a ldr r3, [pc, #104] ; (803569c ) - 8035634: 789b ldrb r3, [r3, #2] - 8035636: 021b lsls r3, r3, #8 + 8035616: 0a1b lsrs r3, r3, #8 + 8035618: f403 437f and.w r3, r3, #65280 ; 0xff00 + 803561c: 431a orrs r2, r3 + 803561e: 4b3f ldr r3, [pc, #252] ; (803571c ) + 8035620: 781b ldrb r3, [r3, #0] + 8035622: 0619 lsls r1, r3, #24 + 8035624: 4b3d ldr r3, [pc, #244] ; (803571c ) + 8035626: 785b ldrb r3, [r3, #1] + 8035628: 041b lsls r3, r3, #16 + 803562a: 4319 orrs r1, r3 + 803562c: 4b3b ldr r3, [pc, #236] ; (803571c ) + 803562e: 789b ldrb r3, [r3, #2] + 8035630: 021b lsls r3, r3, #8 + 8035632: 430b orrs r3, r1 + 8035634: 4939 ldr r1, [pc, #228] ; (803571c ) + 8035636: 78c9 ldrb r1, [r1, #3] 8035638: 430b orrs r3, r1 - 803563a: 4918 ldr r1, [pc, #96] ; (803569c ) - 803563c: 78c9 ldrb r1, [r1, #3] - 803563e: 430b orrs r3, r1 - 8035640: 0e1b lsrs r3, r3, #24 - 8035642: 4313 orrs r3, r2 - 8035644: 4a18 ldr r2, [pc, #96] ; (80356a8 ) - 8035646: 6013 str r3, [r2, #0] + 803563a: 0e1b lsrs r3, r3, #24 + 803563c: 4313 orrs r3, r2 + 803563e: 4a3a ldr r2, [pc, #232] ; (8035728 ) + 8035640: 6013 str r3, [r2, #0] + IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]); + 8035642: 4b37 ldr r3, [pc, #220] ; (8035720 ) + 8035644: 781b ldrb r3, [r3, #0] + 8035646: 061a lsls r2, r3, #24 + 8035648: 4b35 ldr r3, [pc, #212] ; (8035720 ) + 803564a: 785b ldrb r3, [r3, #1] + 803564c: 041b lsls r3, r3, #16 + 803564e: 431a orrs r2, r3 + 8035650: 4b33 ldr r3, [pc, #204] ; (8035720 ) + 8035652: 789b ldrb r3, [r3, #2] + 8035654: 021b lsls r3, r3, #8 + 8035656: 4313 orrs r3, r2 + 8035658: 4a31 ldr r2, [pc, #196] ; (8035720 ) + 803565a: 78d2 ldrb r2, [r2, #3] + 803565c: 4313 orrs r3, r2 + 803565e: 061a lsls r2, r3, #24 + 8035660: 4b2f ldr r3, [pc, #188] ; (8035720 ) + 8035662: 781b ldrb r3, [r3, #0] + 8035664: 0619 lsls r1, r3, #24 + 8035666: 4b2e ldr r3, [pc, #184] ; (8035720 ) + 8035668: 785b ldrb r3, [r3, #1] + 803566a: 041b lsls r3, r3, #16 + 803566c: 4319 orrs r1, r3 + 803566e: 4b2c ldr r3, [pc, #176] ; (8035720 ) + 8035670: 789b ldrb r3, [r3, #2] + 8035672: 021b lsls r3, r3, #8 + 8035674: 430b orrs r3, r1 + 8035676: 492a ldr r1, [pc, #168] ; (8035720 ) + 8035678: 78c9 ldrb r1, [r1, #3] + 803567a: 430b orrs r3, r1 + 803567c: 021b lsls r3, r3, #8 + 803567e: f403 037f and.w r3, r3, #16711680 ; 0xff0000 + 8035682: 431a orrs r2, r3 + 8035684: 4b26 ldr r3, [pc, #152] ; (8035720 ) + 8035686: 781b ldrb r3, [r3, #0] + 8035688: 0619 lsls r1, r3, #24 + 803568a: 4b25 ldr r3, [pc, #148] ; (8035720 ) + 803568c: 785b ldrb r3, [r3, #1] + 803568e: 041b lsls r3, r3, #16 + 8035690: 4319 orrs r1, r3 + 8035692: 4b23 ldr r3, [pc, #140] ; (8035720 ) + 8035694: 789b ldrb r3, [r3, #2] + 8035696: 021b lsls r3, r3, #8 + 8035698: 430b orrs r3, r1 + 803569a: 4921 ldr r1, [pc, #132] ; (8035720 ) + 803569c: 78c9 ldrb r1, [r1, #3] + 803569e: 430b orrs r3, r1 + 80356a0: 0a1b lsrs r3, r3, #8 + 80356a2: f403 437f and.w r3, r3, #65280 ; 0xff00 + 80356a6: 431a orrs r2, r3 + 80356a8: 4b1d ldr r3, [pc, #116] ; (8035720 ) + 80356aa: 781b ldrb r3, [r3, #0] + 80356ac: 0619 lsls r1, r3, #24 + 80356ae: 4b1c ldr r3, [pc, #112] ; (8035720 ) + 80356b0: 785b ldrb r3, [r3, #1] + 80356b2: 041b lsls r3, r3, #16 + 80356b4: 4319 orrs r1, r3 + 80356b6: 4b1a ldr r3, [pc, #104] ; (8035720 ) + 80356b8: 789b ldrb r3, [r3, #2] + 80356ba: 021b lsls r3, r3, #8 + 80356bc: 430b orrs r3, r1 + 80356be: 4918 ldr r1, [pc, #96] ; (8035720 ) + 80356c0: 78c9 ldrb r1, [r1, #3] + 80356c2: 430b orrs r3, r1 + 80356c4: 0e1b lsrs r3, r3, #24 + 80356c6: 4313 orrs r3, r2 + 80356c8: 4a18 ldr r2, [pc, #96] ; (803572c ) + 80356ca: 6013 str r3, [r2, #0] /* add the network interface (IPv4/IPv6) without RTOS */ netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, ðernetif_init, ðernet_input); - 8035648: 4b18 ldr r3, [pc, #96] ; (80356ac ) - 803564a: 9302 str r3, [sp, #8] - 803564c: 4b18 ldr r3, [pc, #96] ; (80356b0 ) - 803564e: 9301 str r3, [sp, #4] - 8035650: 2300 movs r3, #0 - 8035652: 9300 str r3, [sp, #0] - 8035654: 4b14 ldr r3, [pc, #80] ; (80356a8 ) - 8035656: 4a13 ldr r2, [pc, #76] ; (80356a4 ) - 8035658: 4911 ldr r1, [pc, #68] ; (80356a0 ) - 803565a: 4816 ldr r0, [pc, #88] ; (80356b4 ) - 803565c: f001 fa0e bl 8036a7c + 80356cc: 4b18 ldr r3, [pc, #96] ; (8035730 ) + 80356ce: 9302 str r3, [sp, #8] + 80356d0: 4b18 ldr r3, [pc, #96] ; (8035734 ) + 80356d2: 9301 str r3, [sp, #4] + 80356d4: 2300 movs r3, #0 + 80356d6: 9300 str r3, [sp, #0] + 80356d8: 4b14 ldr r3, [pc, #80] ; (803572c ) + 80356da: 4a13 ldr r2, [pc, #76] ; (8035728 ) + 80356dc: 4911 ldr r1, [pc, #68] ; (8035724 ) + 80356de: 4816 ldr r0, [pc, #88] ; (8035738 ) + 80356e0: f001 fa0e bl 8036b00 /* Registers the default network interface */ netif_set_default(&gnetif); - 8035660: 4814 ldr r0, [pc, #80] ; (80356b4 ) - 8035662: f001 fbc9 bl 8036df8 + 80356e4: 4814 ldr r0, [pc, #80] ; (8035738 ) + 80356e6: f001 fbc9 bl 8036e7c if (netif_is_link_up(&gnetif)) - 8035666: 4b13 ldr r3, [pc, #76] ; (80356b4 ) - 8035668: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803566c: 089b lsrs r3, r3, #2 - 803566e: f003 0301 and.w r3, r3, #1 - 8035672: b2db uxtb r3, r3 - 8035674: 2b00 cmp r3, #0 - 8035676: d003 beq.n 8035680 + 80356ea: 4b13 ldr r3, [pc, #76] ; (8035738 ) + 80356ec: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 80356f0: 089b lsrs r3, r3, #2 + 80356f2: f003 0301 and.w r3, r3, #1 + 80356f6: b2db uxtb r3, r3 + 80356f8: 2b00 cmp r3, #0 + 80356fa: d003 beq.n 8035704 { /* When the netif is fully configured this function must be called */ netif_set_up(&gnetif); - 8035678: 480e ldr r0, [pc, #56] ; (80356b4 ) - 803567a: f001 fbcd bl 8036e18 - 803567e: e002 b.n 8035686 + 80356fc: 480e ldr r0, [pc, #56] ; (8035738 ) + 80356fe: f001 fbcd bl 8036e9c + 8035702: e002 b.n 803570a } else { /* When the netif link is down this function must be called */ netif_set_down(&gnetif); - 8035680: 480c ldr r0, [pc, #48] ; (80356b4 ) - 8035682: f001 fc3d bl 8036f00 + 8035704: 480c ldr r0, [pc, #48] ; (8035738 ) + 8035706: f001 fc3d bl 8036f84 } /* Set the link callback function, this function is called on change of link status*/ netif_set_link_callback(&gnetif, ethernet_link_status_updated); - 8035686: 490c ldr r1, [pc, #48] ; (80356b8 ) - 8035688: 480a ldr r0, [pc, #40] ; (80356b4 ) - 803568a: f001 fcd7 bl 803703c + 803570a: 490c ldr r1, [pc, #48] ; (803573c ) + 803570c: 480a ldr r0, [pc, #40] ; (8035738 ) + 803570e: f001 fcd7 bl 80370c0 /* Create the Ethernet link handler thread */ /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ } - 803568e: bf00 nop - 8035690: 46bd mov sp, r7 - 8035692: bd80 pop {r7, pc} - 8035694: 2400b8a0 .word 0x2400b8a0 - 8035698: 2400b8a4 .word 0x2400b8a4 - 803569c: 2400b8a8 .word 0x2400b8a8 - 80356a0: 2400b894 .word 0x2400b894 - 80356a4: 2400b898 .word 0x2400b898 - 80356a8: 2400b89c .word 0x2400b89c - 80356ac: 080406bd .word 0x080406bd - 80356b0: 080359ed .word 0x080359ed - 80356b4: 2400b85c .word 0x2400b85c - 80356b8: 0803570d .word 0x0803570d - -080356bc : + 8035712: bf00 nop + 8035714: 46bd mov sp, r7 + 8035716: bd80 pop {r7, pc} + 8035718: 2400b8a8 .word 0x2400b8a8 + 803571c: 2400b8ac .word 0x2400b8ac + 8035720: 2400b8b0 .word 0x2400b8b0 + 8035724: 2400b89c .word 0x2400b89c + 8035728: 2400b8a0 .word 0x2400b8a0 + 803572c: 2400b8a4 .word 0x2400b8a4 + 8035730: 08040741 .word 0x08040741 + 8035734: 08035a71 .word 0x08035a71 + 8035738: 2400b864 .word 0x2400b864 + 803573c: 08035791 .word 0x08035791 + +08035740 : * @brief Ethernet Link periodic check * @param netif * @retval None */ static void Ethernet_Link_Periodic_Handle(struct netif *netif) { - 80356bc: b580 push {r7, lr} - 80356be: b082 sub sp, #8 - 80356c0: af00 add r7, sp, #0 - 80356c2: 6078 str r0, [r7, #4] + 8035740: b580 push {r7, lr} + 8035742: b082 sub sp, #8 + 8035744: af00 add r7, sp, #0 + 8035746: 6078 str r0, [r7, #4] /* USER CODE BEGIN 4_4_1 */ /* USER CODE END 4_4_1 */ /* Ethernet Link every 100ms */ if (HAL_GetTick() - EthernetLinkTimer >= 100) - 80356c4: f7f0 fc7e bl 8025fc4 - 80356c8: 4602 mov r2, r0 - 80356ca: 4b08 ldr r3, [pc, #32] ; (80356ec ) - 80356cc: 681b ldr r3, [r3, #0] - 80356ce: 1ad3 subs r3, r2, r3 - 80356d0: 2b63 cmp r3, #99 ; 0x63 - 80356d2: d907 bls.n 80356e4 + 8035748: f7f0 fc7e bl 8026048 + 803574c: 4602 mov r2, r0 + 803574e: 4b08 ldr r3, [pc, #32] ; (8035770 ) + 8035750: 681b ldr r3, [r3, #0] + 8035752: 1ad3 subs r3, r2, r3 + 8035754: 2b63 cmp r3, #99 ; 0x63 + 8035756: d907 bls.n 8035768 { EthernetLinkTimer = HAL_GetTick(); - 80356d4: f7f0 fc76 bl 8025fc4 - 80356d8: 4603 mov r3, r0 - 80356da: 4a04 ldr r2, [pc, #16] ; (80356ec ) - 80356dc: 6013 str r3, [r2, #0] + 8035758: f7f0 fc76 bl 8026048 + 803575c: 4603 mov r3, r0 + 803575e: 4a04 ldr r2, [pc, #16] ; (8035770 ) + 8035760: 6013 str r3, [r2, #0] ethernet_link_check_state(netif); - 80356de: 6878 ldr r0, [r7, #4] - 80356e0: f000 fad6 bl 8035c90 + 8035762: 6878 ldr r0, [r7, #4] + 8035764: f000 fad6 bl 8035d14 } /* USER CODE BEGIN 4_4 */ /* USER CODE END 4_4 */ } - 80356e4: bf00 nop - 80356e6: 3708 adds r7, #8 - 80356e8: 46bd mov sp, r7 - 80356ea: bd80 pop {r7, pc} - 80356ec: 2400b858 .word 0x2400b858 + 8035768: bf00 nop + 803576a: 3708 adds r7, #8 + 803576c: 46bd mov sp, r7 + 803576e: bd80 pop {r7, pc} + 8035770: 2400b860 .word 0x2400b860 -080356f0 : +08035774 : * Send it to the lwIP stack for handling * Handle timeouts if LWIP_TIMERS is set and without RTOS * Handle the llink status if LWIP_NETIF_LINK_CALLBACK is set and without RTOS */ void MX_LWIP_Process(void) { - 80356f0: b580 push {r7, lr} - 80356f2: af00 add r7, sp, #0 + 8035774: b580 push {r7, lr} + 8035776: af00 add r7, sp, #0 /* USER CODE BEGIN 4_1 */ /* USER CODE END 4_1 */ ethernetif_input(&gnetif); - 80356f4: 4804 ldr r0, [pc, #16] ; (8035708 ) - 80356f6: f000 f959 bl 80359ac + 8035778: 4804 ldr r0, [pc, #16] ; (803578c ) + 803577a: f000 f959 bl 8035a30 /* USER CODE BEGIN 4_2 */ /* USER CODE END 4_2 */ /* Handle timeouts */ sys_check_timeouts(); - 80356fa: f008 fbcd bl 803de98 + 803577e: f008 fbcd bl 803df1c Ethernet_Link_Periodic_Handle(&gnetif); - 80356fe: 4802 ldr r0, [pc, #8] ; (8035708 ) - 8035700: f7ff ffdc bl 80356bc + 8035782: 4802 ldr r0, [pc, #8] ; (803578c ) + 8035784: f7ff ffdc bl 8035740 /* USER CODE BEGIN 4_3 */ /* USER CODE END 4_3 */ } - 8035704: bf00 nop - 8035706: bd80 pop {r7, pc} - 8035708: 2400b85c .word 0x2400b85c + 8035788: bf00 nop + 803578a: bd80 pop {r7, pc} + 803578c: 2400b864 .word 0x2400b864 -0803570c : +08035790 : * @brief Notify the User about the network interface config status * @param netif: the network interface * @retval None */ static void ethernet_link_status_updated(struct netif *netif) { - 803570c: b480 push {r7} - 803570e: b083 sub sp, #12 - 8035710: af00 add r7, sp, #0 - 8035712: 6078 str r0, [r7, #4] + 8035790: b480 push {r7} + 8035792: b083 sub sp, #12 + 8035794: af00 add r7, sp, #0 + 8035796: 6078 str r0, [r7, #4] else /* netif is down */ { /* USER CODE BEGIN 6 */ /* USER CODE END 6 */ } } - 8035714: bf00 nop - 8035716: 370c adds r7, #12 - 8035718: 46bd mov sp, r7 - 803571a: f85d 7b04 ldr.w r7, [sp], #4 - 803571e: 4770 bx lr + 8035798: bf00 nop + 803579a: 370c adds r7, #12 + 803579c: 46bd mov sp, r7 + 803579e: f85d 7b04 ldr.w r7, [sp], #4 + 80357a2: 4770 bx lr -08035720 : +080357a4 : * * @param netif the already initialized lwip network interface structure * for this ethernetif */ static void low_level_init(struct netif *netif) { - 8035720: b580 push {r7, lr} - 8035722: b084 sub sp, #16 - 8035724: af00 add r7, sp, #0 - 8035726: 6078 str r0, [r7, #4] + 80357a4: b580 push {r7, lr} + 80357a6: b084 sub sp, #16 + 80357a8: af00 add r7, sp, #0 + 80357aa: 6078 str r0, [r7, #4] HAL_StatusTypeDef hal_eth_init_status = HAL_OK; - 8035728: 2300 movs r3, #0 - 803572a: 73fb strb r3, [r7, #15] + 80357ac: 2300 movs r3, #0 + 80357ae: 73fb strb r3, [r7, #15] /* Start ETH HAL Init */ uint8_t MACAddr[6] ; heth.Instance = ETH; - 803572c: 4b48 ldr r3, [pc, #288] ; (8035850 ) - 803572e: 4a49 ldr r2, [pc, #292] ; (8035854 ) - 8035730: 601a str r2, [r3, #0] + 80357b0: 4b48 ldr r3, [pc, #288] ; (80358d4 ) + 80357b2: 4a49 ldr r2, [pc, #292] ; (80358d8 ) + 80357b4: 601a str r2, [r3, #0] MACAddr[0] = 0x00; - 8035732: 2300 movs r3, #0 - 8035734: 723b strb r3, [r7, #8] + 80357b6: 2300 movs r3, #0 + 80357b8: 723b strb r3, [r7, #8] MACAddr[1] = 0x80; - 8035736: 2380 movs r3, #128 ; 0x80 - 8035738: 727b strb r3, [r7, #9] + 80357ba: 2380 movs r3, #128 ; 0x80 + 80357bc: 727b strb r3, [r7, #9] MACAddr[2] = 0xE1; - 803573a: 23e1 movs r3, #225 ; 0xe1 - 803573c: 72bb strb r3, [r7, #10] + 80357be: 23e1 movs r3, #225 ; 0xe1 + 80357c0: 72bb strb r3, [r7, #10] MACAddr[3] = 0x00; - 803573e: 2300 movs r3, #0 - 8035740: 72fb strb r3, [r7, #11] + 80357c2: 2300 movs r3, #0 + 80357c4: 72fb strb r3, [r7, #11] MACAddr[4] = 0x00; - 8035742: 2300 movs r3, #0 - 8035744: 733b strb r3, [r7, #12] + 80357c6: 2300 movs r3, #0 + 80357c8: 733b strb r3, [r7, #12] MACAddr[5] = 0x00; - 8035746: 2300 movs r3, #0 - 8035748: 737b strb r3, [r7, #13] + 80357ca: 2300 movs r3, #0 + 80357cc: 737b strb r3, [r7, #13] heth.Init.MACAddr = &MACAddr[0]; - 803574a: 4a41 ldr r2, [pc, #260] ; (8035850 ) - 803574c: f107 0308 add.w r3, r7, #8 - 8035750: 6053 str r3, [r2, #4] + 80357ce: 4a41 ldr r2, [pc, #260] ; (80358d4 ) + 80357d0: f107 0308 add.w r3, r7, #8 + 80357d4: 6053 str r3, [r2, #4] heth.Init.MediaInterface = HAL_ETH_RMII_MODE; - 8035752: 4b3f ldr r3, [pc, #252] ; (8035850 ) - 8035754: 2201 movs r2, #1 - 8035756: 721a strb r2, [r3, #8] + 80357d6: 4b3f ldr r3, [pc, #252] ; (80358d4 ) + 80357d8: 2201 movs r2, #1 + 80357da: 721a strb r2, [r3, #8] heth.Init.TxDesc = DMATxDscrTab; - 8035758: 4b3d ldr r3, [pc, #244] ; (8035850 ) - 803575a: 4a3f ldr r2, [pc, #252] ; (8035858 ) - 803575c: 60da str r2, [r3, #12] + 80357dc: 4b3d ldr r3, [pc, #244] ; (80358d4 ) + 80357de: 4a3f ldr r2, [pc, #252] ; (80358dc ) + 80357e0: 60da str r2, [r3, #12] heth.Init.RxDesc = DMARxDscrTab; - 803575e: 4b3c ldr r3, [pc, #240] ; (8035850 ) - 8035760: 4a3e ldr r2, [pc, #248] ; (803585c ) - 8035762: 611a str r2, [r3, #16] + 80357e2: 4b3c ldr r3, [pc, #240] ; (80358d4 ) + 80357e4: 4a3e ldr r2, [pc, #248] ; (80358e0 ) + 80357e6: 611a str r2, [r3, #16] heth.Init.RxBuffLen = 1528; - 8035764: 4b3a ldr r3, [pc, #232] ; (8035850 ) - 8035766: f44f 62bf mov.w r2, #1528 ; 0x5f8 - 803576a: 615a str r2, [r3, #20] + 80357e8: 4b3a ldr r3, [pc, #232] ; (80358d4 ) + 80357ea: f44f 62bf mov.w r2, #1528 ; 0x5f8 + 80357ee: 615a str r2, [r3, #20] /* USER CODE BEGIN MACADDRESS */ /* USER CODE END MACADDRESS */ hal_eth_init_status = HAL_ETH_Init(&heth); - 803576c: 4838 ldr r0, [pc, #224] ; (8035850 ) - 803576e: f7f5 f823 bl 802a7b8 - 8035772: 4603 mov r3, r0 - 8035774: 73fb strb r3, [r7, #15] + 80357f0: 4838 ldr r0, [pc, #224] ; (80358d4 ) + 80357f2: f7f5 f823 bl 802a83c + 80357f6: 4603 mov r3, r0 + 80357f8: 73fb strb r3, [r7, #15] memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig)); - 8035776: 2238 movs r2, #56 ; 0x38 - 8035778: 2100 movs r1, #0 - 803577a: 4839 ldr r0, [pc, #228] ; (8035860 ) - 803577c: f00b f8e0 bl 8040940 + 80357fa: 2238 movs r2, #56 ; 0x38 + 80357fc: 2100 movs r1, #0 + 80357fe: 4839 ldr r0, [pc, #228] ; (80358e4 ) + 8035800: f00b f8e0 bl 80409c4 TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD; - 8035780: 4b37 ldr r3, [pc, #220] ; (8035860 ) - 8035782: 2221 movs r2, #33 ; 0x21 - 8035784: 601a str r2, [r3, #0] + 8035804: 4b37 ldr r3, [pc, #220] ; (80358e4 ) + 8035806: 2221 movs r2, #33 ; 0x21 + 8035808: 601a str r2, [r3, #0] TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC; - 8035786: 4b36 ldr r3, [pc, #216] ; (8035860 ) - 8035788: f44f 3240 mov.w r2, #196608 ; 0x30000 - 803578c: 615a str r2, [r3, #20] + 803580a: 4b36 ldr r3, [pc, #216] ; (80358e4 ) + 803580c: f44f 3240 mov.w r2, #196608 ; 0x30000 + 8035810: 615a str r2, [r3, #20] TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT; - 803578e: 4b34 ldr r3, [pc, #208] ; (8035860 ) - 8035790: 2200 movs r2, #0 - 8035792: 611a str r2, [r3, #16] + 8035812: 4b34 ldr r3, [pc, #208] ; (80358e4 ) + 8035814: 2200 movs r2, #0 + 8035816: 611a str r2, [r3, #16] /* End ETH HAL Init */ /* Initialize the RX POOL */ LWIP_MEMPOOL_INIT(RX_POOL); - 8035794: 4833 ldr r0, [pc, #204] ; (8035864 ) - 8035796: f001 f839 bl 803680c + 8035818: 4833 ldr r0, [pc, #204] ; (80358e8 ) + 803581a: f001 f839 bl 8036890 #if LWIP_ARP || LWIP_ETHERNET /* set MAC hardware address length */ netif->hwaddr_len = ETH_HWADDR_LEN; - 803579a: 687b ldr r3, [r7, #4] - 803579c: 2206 movs r2, #6 - 803579e: f883 2030 strb.w r2, [r3, #48] ; 0x30 + 803581e: 687b ldr r3, [r7, #4] + 8035820: 2206 movs r2, #6 + 8035822: f883 2030 strb.w r2, [r3, #48] ; 0x30 /* set MAC hardware address */ netif->hwaddr[0] = heth.Init.MACAddr[0]; - 80357a2: 4b2b ldr r3, [pc, #172] ; (8035850 ) - 80357a4: 685b ldr r3, [r3, #4] - 80357a6: 781a ldrb r2, [r3, #0] - 80357a8: 687b ldr r3, [r7, #4] - 80357aa: f883 202a strb.w r2, [r3, #42] ; 0x2a + 8035826: 4b2b ldr r3, [pc, #172] ; (80358d4 ) + 8035828: 685b ldr r3, [r3, #4] + 803582a: 781a ldrb r2, [r3, #0] + 803582c: 687b ldr r3, [r7, #4] + 803582e: f883 202a strb.w r2, [r3, #42] ; 0x2a netif->hwaddr[1] = heth.Init.MACAddr[1]; - 80357ae: 4b28 ldr r3, [pc, #160] ; (8035850 ) - 80357b0: 685b ldr r3, [r3, #4] - 80357b2: 785a ldrb r2, [r3, #1] - 80357b4: 687b ldr r3, [r7, #4] - 80357b6: f883 202b strb.w r2, [r3, #43] ; 0x2b + 8035832: 4b28 ldr r3, [pc, #160] ; (80358d4 ) + 8035834: 685b ldr r3, [r3, #4] + 8035836: 785a ldrb r2, [r3, #1] + 8035838: 687b ldr r3, [r7, #4] + 803583a: f883 202b strb.w r2, [r3, #43] ; 0x2b netif->hwaddr[2] = heth.Init.MACAddr[2]; - 80357ba: 4b25 ldr r3, [pc, #148] ; (8035850 ) - 80357bc: 685b ldr r3, [r3, #4] - 80357be: 789a ldrb r2, [r3, #2] - 80357c0: 687b ldr r3, [r7, #4] - 80357c2: f883 202c strb.w r2, [r3, #44] ; 0x2c + 803583e: 4b25 ldr r3, [pc, #148] ; (80358d4 ) + 8035840: 685b ldr r3, [r3, #4] + 8035842: 789a ldrb r2, [r3, #2] + 8035844: 687b ldr r3, [r7, #4] + 8035846: f883 202c strb.w r2, [r3, #44] ; 0x2c netif->hwaddr[3] = heth.Init.MACAddr[3]; - 80357c6: 4b22 ldr r3, [pc, #136] ; (8035850 ) - 80357c8: 685b ldr r3, [r3, #4] - 80357ca: 78da ldrb r2, [r3, #3] - 80357cc: 687b ldr r3, [r7, #4] - 80357ce: f883 202d strb.w r2, [r3, #45] ; 0x2d + 803584a: 4b22 ldr r3, [pc, #136] ; (80358d4 ) + 803584c: 685b ldr r3, [r3, #4] + 803584e: 78da ldrb r2, [r3, #3] + 8035850: 687b ldr r3, [r7, #4] + 8035852: f883 202d strb.w r2, [r3, #45] ; 0x2d netif->hwaddr[4] = heth.Init.MACAddr[4]; - 80357d2: 4b1f ldr r3, [pc, #124] ; (8035850 ) - 80357d4: 685b ldr r3, [r3, #4] - 80357d6: 791a ldrb r2, [r3, #4] - 80357d8: 687b ldr r3, [r7, #4] - 80357da: f883 202e strb.w r2, [r3, #46] ; 0x2e + 8035856: 4b1f ldr r3, [pc, #124] ; (80358d4 ) + 8035858: 685b ldr r3, [r3, #4] + 803585a: 791a ldrb r2, [r3, #4] + 803585c: 687b ldr r3, [r7, #4] + 803585e: f883 202e strb.w r2, [r3, #46] ; 0x2e netif->hwaddr[5] = heth.Init.MACAddr[5]; - 80357de: 4b1c ldr r3, [pc, #112] ; (8035850 ) - 80357e0: 685b ldr r3, [r3, #4] - 80357e2: 795a ldrb r2, [r3, #5] - 80357e4: 687b ldr r3, [r7, #4] - 80357e6: f883 202f strb.w r2, [r3, #47] ; 0x2f + 8035862: 4b1c ldr r3, [pc, #112] ; (80358d4 ) + 8035864: 685b ldr r3, [r3, #4] + 8035866: 795a ldrb r2, [r3, #5] + 8035868: 687b ldr r3, [r7, #4] + 803586a: f883 202f strb.w r2, [r3, #47] ; 0x2f /* maximum transfer unit */ netif->mtu = ETH_MAX_PAYLOAD; - 80357ea: 687b ldr r3, [r7, #4] - 80357ec: f240 52dc movw r2, #1500 ; 0x5dc - 80357f0: 851a strh r2, [r3, #40] ; 0x28 + 803586e: 687b ldr r3, [r7, #4] + 8035870: f240 52dc movw r2, #1500 ; 0x5dc + 8035874: 851a strh r2, [r3, #40] ; 0x28 /* Accept broadcast address and ARP traffic */ /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */ #if LWIP_ARP netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP; - 80357f2: 687b ldr r3, [r7, #4] - 80357f4: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 80357f8: f043 030a orr.w r3, r3, #10 - 80357fc: b2da uxtb r2, r3 - 80357fe: 687b ldr r3, [r7, #4] - 8035800: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8035876: 687b ldr r3, [r7, #4] + 8035878: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803587c: f043 030a orr.w r3, r3, #10 + 8035880: b2da uxtb r2, r3 + 8035882: 687b ldr r3, [r7, #4] + 8035884: f883 2031 strb.w r2, [r3, #49] ; 0x31 netif->flags |= NETIF_FLAG_BROADCAST; #endif /* LWIP_ARP */ /* USER CODE BEGIN PHY_PRE_CONFIG */ HAL_GPIO_WritePin(ETH_RST_GPIO_Port,ETH_RST_Pin,GPIO_PIN_RESET); - 8035804: 2200 movs r2, #0 - 8035806: 2140 movs r1, #64 ; 0x40 - 8035808: 4817 ldr r0, [pc, #92] ; (8035868 ) - 803580a: f7f7 ffdf bl 802d7cc + 8035888: 2200 movs r2, #0 + 803588a: 2140 movs r1, #64 ; 0x40 + 803588c: 4817 ldr r0, [pc, #92] ; (80358ec ) + 803588e: f7f7 ffdf bl 802d850 HAL_Delay(1000); - 803580e: f44f 707a mov.w r0, #1000 ; 0x3e8 - 8035812: f7f0 fbe3 bl 8025fdc + 8035892: f44f 707a mov.w r0, #1000 ; 0x3e8 + 8035896: f7f0 fbe3 bl 8026060 HAL_GPIO_WritePin(ETH_RST_GPIO_Port,ETH_RST_Pin,GPIO_PIN_SET); - 8035816: 2201 movs r2, #1 - 8035818: 2140 movs r1, #64 ; 0x40 - 803581a: 4813 ldr r0, [pc, #76] ; (8035868 ) - 803581c: f7f7 ffd6 bl 802d7cc + 803589a: 2201 movs r2, #1 + 803589c: 2140 movs r1, #64 ; 0x40 + 803589e: 4813 ldr r0, [pc, #76] ; (80358ec ) + 80358a0: f7f7 ffd6 bl 802d850 HAL_Delay(1000); - 8035820: f44f 707a mov.w r0, #1000 ; 0x3e8 - 8035824: f7f0 fbda bl 8025fdc + 80358a4: f44f 707a mov.w r0, #1000 ; 0x3e8 + 80358a8: f7f0 fbda bl 8026060 /* USER CODE END PHY_PRE_CONFIG */ /* Set PHY IO functions */ LAN8742_RegisterBusIO(&LAN8742, &LAN8742_IOCtx); - 8035828: 4910 ldr r1, [pc, #64] ; (803586c ) - 803582a: 4811 ldr r0, [pc, #68] ; (8035870 ) - 803582c: f7f0 f9e3 bl 8025bf6 + 80358ac: 4910 ldr r1, [pc, #64] ; (80358f0 ) + 80358ae: 4811 ldr r0, [pc, #68] ; (80358f4 ) + 80358b0: f7f0 f9e3 bl 8025c7a /* Initialize the LAN8742 ETH PHY */ LAN8742_Init(&LAN8742); - 8035830: 480f ldr r0, [pc, #60] ; (8035870 ) - 8035832: f7f0 fa12 bl 8025c5a + 80358b4: 480f ldr r0, [pc, #60] ; (80358f4 ) + 80358b6: f7f0 fa12 bl 8025cde if (hal_eth_init_status == HAL_OK) - 8035836: 7bfb ldrb r3, [r7, #15] - 8035838: 2b00 cmp r3, #0 - 803583a: d103 bne.n 8035844 + 80358ba: 7bfb ldrb r3, [r7, #15] + 80358bc: 2b00 cmp r3, #0 + 80358be: d103 bne.n 80358c8 { /* Get link state */ ethernet_link_check_state(netif); - 803583c: 6878 ldr r0, [r7, #4] - 803583e: f000 fa27 bl 8035c90 + 80358c0: 6878 ldr r0, [r7, #4] + 80358c2: f000 fa27 bl 8035d14 #endif /* LWIP_ARP || LWIP_ETHERNET */ /* USER CODE BEGIN LOW_LEVEL_INIT */ /* USER CODE END LOW_LEVEL_INIT */ } - 8035842: e001 b.n 8035848 + 80358c6: e001 b.n 80358cc Error_Handler(); - 8035844: f7ee fd72 bl 802432c -} - 8035848: bf00 nop - 803584a: 3710 adds r7, #16 - 803584c: 46bd mov sp, r7 - 803584e: bd80 pop {r7, pc} - 8035850: 2400b8b4 .word 0x2400b8b4 - 8035854: 40028000 .word 0x40028000 - 8035858: 30040200 .word 0x30040200 - 803585c: 30040000 .word 0x30040000 - 8035860: 2400b964 .word 0x2400b964 - 8035864: 08044d24 .word 0x08044d24 - 8035868: 58020000 .word 0x58020000 - 803586c: 24000058 .word 0x24000058 - 8035870: 2400b99c .word 0x2400b99c - -08035874 : + 80358c8: f7ee fd72 bl 80243b0 +} + 80358cc: bf00 nop + 80358ce: 3710 adds r7, #16 + 80358d0: 46bd mov sp, r7 + 80358d2: bd80 pop {r7, pc} + 80358d4: 2400b8bc .word 0x2400b8bc + 80358d8: 40028000 .word 0x40028000 + 80358dc: 30040200 .word 0x30040200 + 80358e0: 30040000 .word 0x30040000 + 80358e4: 2400b96c .word 0x2400b96c + 80358e8: 08044da4 .word 0x08044da4 + 80358ec: 58020000 .word 0x58020000 + 80358f0: 24000058 .word 0x24000058 + 80358f4: 2400b9a4 .word 0x2400b9a4 + +080358f8 : * to become available since the stack doesn't retry to send a packet * dropped because of memory failure (except for the TCP timers). */ static err_t low_level_output(struct netif *netif, struct pbuf *p) { - 8035874: b580 push {r7, lr} - 8035876: b092 sub sp, #72 ; 0x48 - 8035878: af00 add r7, sp, #0 - 803587a: 6078 str r0, [r7, #4] - 803587c: 6039 str r1, [r7, #0] + 80358f8: b580 push {r7, lr} + 80358fa: b092 sub sp, #72 ; 0x48 + 80358fc: af00 add r7, sp, #0 + 80358fe: 6078 str r0, [r7, #4] + 8035900: 6039 str r1, [r7, #0] uint32_t i = 0U; - 803587e: 2300 movs r3, #0 - 8035880: 647b str r3, [r7, #68] ; 0x44 + 8035902: 2300 movs r3, #0 + 8035904: 647b str r3, [r7, #68] ; 0x44 struct pbuf *q = NULL; - 8035882: 2300 movs r3, #0 - 8035884: 643b str r3, [r7, #64] ; 0x40 + 8035906: 2300 movs r3, #0 + 8035908: 643b str r3, [r7, #64] ; 0x40 err_t errval = ERR_OK; - 8035886: 2300 movs r3, #0 - 8035888: f887 303f strb.w r3, [r7, #63] ; 0x3f + 803590a: 2300 movs r3, #0 + 803590c: f887 303f strb.w r3, [r7, #63] ; 0x3f ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0}; - 803588c: f107 030c add.w r3, r7, #12 - 8035890: 2230 movs r2, #48 ; 0x30 - 8035892: 2100 movs r1, #0 - 8035894: 4618 mov r0, r3 - 8035896: f00b f853 bl 8040940 + 8035910: f107 030c add.w r3, r7, #12 + 8035914: 2230 movs r2, #48 ; 0x30 + 8035916: 2100 movs r1, #0 + 8035918: 4618 mov r0, r3 + 803591a: f00b f853 bl 80409c4 memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef)); - 803589a: f107 030c add.w r3, r7, #12 - 803589e: 2230 movs r2, #48 ; 0x30 - 80358a0: 2100 movs r1, #0 - 80358a2: 4618 mov r0, r3 - 80358a4: f00b f84c bl 8040940 + 803591e: f107 030c add.w r3, r7, #12 + 8035922: 2230 movs r2, #48 ; 0x30 + 8035924: 2100 movs r1, #0 + 8035926: 4618 mov r0, r3 + 8035928: f00b f84c bl 80409c4 for(q = p; q != NULL; q = q->next) - 80358a8: 683b ldr r3, [r7, #0] - 80358aa: 643b str r3, [r7, #64] ; 0x40 - 80358ac: e045 b.n 803593a + 803592c: 683b ldr r3, [r7, #0] + 803592e: 643b str r3, [r7, #64] ; 0x40 + 8035930: e045 b.n 80359be { if(i >= ETH_TX_DESC_CNT) - 80358ae: 6c7b ldr r3, [r7, #68] ; 0x44 - 80358b0: 2b03 cmp r3, #3 - 80358b2: d902 bls.n 80358ba + 8035932: 6c7b ldr r3, [r7, #68] ; 0x44 + 8035934: 2b03 cmp r3, #3 + 8035936: d902 bls.n 803593e return ERR_IF; - 80358b4: f06f 030b mvn.w r3, #11 - 80358b8: e055 b.n 8035966 + 8035938: f06f 030b mvn.w r3, #11 + 803593c: e055 b.n 80359ea Txbuffer[i].buffer = q->payload; - 80358ba: 6c3b ldr r3, [r7, #64] ; 0x40 - 80358bc: 6859 ldr r1, [r3, #4] - 80358be: 6c7a ldr r2, [r7, #68] ; 0x44 - 80358c0: 4613 mov r3, r2 - 80358c2: 005b lsls r3, r3, #1 - 80358c4: 4413 add r3, r2 - 80358c6: 009b lsls r3, r3, #2 - 80358c8: 3348 adds r3, #72 ; 0x48 - 80358ca: 443b add r3, r7 - 80358cc: 3b3c subs r3, #60 ; 0x3c - 80358ce: 6019 str r1, [r3, #0] + 803593e: 6c3b ldr r3, [r7, #64] ; 0x40 + 8035940: 6859 ldr r1, [r3, #4] + 8035942: 6c7a ldr r2, [r7, #68] ; 0x44 + 8035944: 4613 mov r3, r2 + 8035946: 005b lsls r3, r3, #1 + 8035948: 4413 add r3, r2 + 803594a: 009b lsls r3, r3, #2 + 803594c: 3348 adds r3, #72 ; 0x48 + 803594e: 443b add r3, r7 + 8035950: 3b3c subs r3, #60 ; 0x3c + 8035952: 6019 str r1, [r3, #0] Txbuffer[i].len = q->len; - 80358d0: 6c3b ldr r3, [r7, #64] ; 0x40 - 80358d2: 895b ldrh r3, [r3, #10] - 80358d4: 4619 mov r1, r3 - 80358d6: 6c7a ldr r2, [r7, #68] ; 0x44 - 80358d8: 4613 mov r3, r2 - 80358da: 005b lsls r3, r3, #1 - 80358dc: 4413 add r3, r2 - 80358de: 009b lsls r3, r3, #2 - 80358e0: 3348 adds r3, #72 ; 0x48 - 80358e2: 443b add r3, r7 - 80358e4: 3b38 subs r3, #56 ; 0x38 - 80358e6: 6019 str r1, [r3, #0] + 8035954: 6c3b ldr r3, [r7, #64] ; 0x40 + 8035956: 895b ldrh r3, [r3, #10] + 8035958: 4619 mov r1, r3 + 803595a: 6c7a ldr r2, [r7, #68] ; 0x44 + 803595c: 4613 mov r3, r2 + 803595e: 005b lsls r3, r3, #1 + 8035960: 4413 add r3, r2 + 8035962: 009b lsls r3, r3, #2 + 8035964: 3348 adds r3, #72 ; 0x48 + 8035966: 443b add r3, r7 + 8035968: 3b38 subs r3, #56 ; 0x38 + 803596a: 6019 str r1, [r3, #0] if(i>0) - 80358e8: 6c7b ldr r3, [r7, #68] ; 0x44 - 80358ea: 2b00 cmp r3, #0 - 80358ec: d011 beq.n 8035912 + 803596c: 6c7b ldr r3, [r7, #68] ; 0x44 + 803596e: 2b00 cmp r3, #0 + 8035970: d011 beq.n 8035996 { Txbuffer[i-1].next = &Txbuffer[i]; - 80358ee: 6c7b ldr r3, [r7, #68] ; 0x44 - 80358f0: 1e5a subs r2, r3, #1 - 80358f2: f107 000c add.w r0, r7, #12 - 80358f6: 6c79 ldr r1, [r7, #68] ; 0x44 - 80358f8: 460b mov r3, r1 - 80358fa: 005b lsls r3, r3, #1 - 80358fc: 440b add r3, r1 - 80358fe: 009b lsls r3, r3, #2 - 8035900: 18c1 adds r1, r0, r3 - 8035902: 4613 mov r3, r2 - 8035904: 005b lsls r3, r3, #1 - 8035906: 4413 add r3, r2 - 8035908: 009b lsls r3, r3, #2 - 803590a: 3348 adds r3, #72 ; 0x48 - 803590c: 443b add r3, r7 - 803590e: 3b34 subs r3, #52 ; 0x34 - 8035910: 6019 str r1, [r3, #0] + 8035972: 6c7b ldr r3, [r7, #68] ; 0x44 + 8035974: 1e5a subs r2, r3, #1 + 8035976: f107 000c add.w r0, r7, #12 + 803597a: 6c79 ldr r1, [r7, #68] ; 0x44 + 803597c: 460b mov r3, r1 + 803597e: 005b lsls r3, r3, #1 + 8035980: 440b add r3, r1 + 8035982: 009b lsls r3, r3, #2 + 8035984: 18c1 adds r1, r0, r3 + 8035986: 4613 mov r3, r2 + 8035988: 005b lsls r3, r3, #1 + 803598a: 4413 add r3, r2 + 803598c: 009b lsls r3, r3, #2 + 803598e: 3348 adds r3, #72 ; 0x48 + 8035990: 443b add r3, r7 + 8035992: 3b34 subs r3, #52 ; 0x34 + 8035994: 6019 str r1, [r3, #0] } if(q->next == NULL) - 8035912: 6c3b ldr r3, [r7, #64] ; 0x40 - 8035914: 681b ldr r3, [r3, #0] - 8035916: 2b00 cmp r3, #0 - 8035918: d109 bne.n 803592e + 8035996: 6c3b ldr r3, [r7, #64] ; 0x40 + 8035998: 681b ldr r3, [r3, #0] + 803599a: 2b00 cmp r3, #0 + 803599c: d109 bne.n 80359b2 { Txbuffer[i].next = NULL; - 803591a: 6c7a ldr r2, [r7, #68] ; 0x44 - 803591c: 4613 mov r3, r2 - 803591e: 005b lsls r3, r3, #1 - 8035920: 4413 add r3, r2 - 8035922: 009b lsls r3, r3, #2 - 8035924: 3348 adds r3, #72 ; 0x48 - 8035926: 443b add r3, r7 - 8035928: 3b34 subs r3, #52 ; 0x34 - 803592a: 2200 movs r2, #0 - 803592c: 601a str r2, [r3, #0] + 803599e: 6c7a ldr r2, [r7, #68] ; 0x44 + 80359a0: 4613 mov r3, r2 + 80359a2: 005b lsls r3, r3, #1 + 80359a4: 4413 add r3, r2 + 80359a6: 009b lsls r3, r3, #2 + 80359a8: 3348 adds r3, #72 ; 0x48 + 80359aa: 443b add r3, r7 + 80359ac: 3b34 subs r3, #52 ; 0x34 + 80359ae: 2200 movs r2, #0 + 80359b0: 601a str r2, [r3, #0] } i++; - 803592e: 6c7b ldr r3, [r7, #68] ; 0x44 - 8035930: 3301 adds r3, #1 - 8035932: 647b str r3, [r7, #68] ; 0x44 + 80359b2: 6c7b ldr r3, [r7, #68] ; 0x44 + 80359b4: 3301 adds r3, #1 + 80359b6: 647b str r3, [r7, #68] ; 0x44 for(q = p; q != NULL; q = q->next) - 8035934: 6c3b ldr r3, [r7, #64] ; 0x40 - 8035936: 681b ldr r3, [r3, #0] - 8035938: 643b str r3, [r7, #64] ; 0x40 - 803593a: 6c3b ldr r3, [r7, #64] ; 0x40 - 803593c: 2b00 cmp r3, #0 - 803593e: d1b6 bne.n 80358ae + 80359b8: 6c3b ldr r3, [r7, #64] ; 0x40 + 80359ba: 681b ldr r3, [r3, #0] + 80359bc: 643b str r3, [r7, #64] ; 0x40 + 80359be: 6c3b ldr r3, [r7, #64] ; 0x40 + 80359c0: 2b00 cmp r3, #0 + 80359c2: d1b6 bne.n 8035932 } TxConfig.Length = p->tot_len; - 8035940: 683b ldr r3, [r7, #0] - 8035942: 891b ldrh r3, [r3, #8] - 8035944: 461a mov r2, r3 - 8035946: 4b0a ldr r3, [pc, #40] ; (8035970 ) - 8035948: 605a str r2, [r3, #4] + 80359c4: 683b ldr r3, [r7, #0] + 80359c6: 891b ldrh r3, [r3, #8] + 80359c8: 461a mov r2, r3 + 80359ca: 4b0a ldr r3, [pc, #40] ; (80359f4 ) + 80359cc: 605a str r2, [r3, #4] TxConfig.TxBuffer = Txbuffer; - 803594a: 4a09 ldr r2, [pc, #36] ; (8035970 ) - 803594c: f107 030c add.w r3, r7, #12 - 8035950: 6093 str r3, [r2, #8] + 80359ce: 4a09 ldr r2, [pc, #36] ; (80359f4 ) + 80359d0: f107 030c add.w r3, r7, #12 + 80359d4: 6093 str r3, [r2, #8] TxConfig.pData = p; - 8035952: 4a07 ldr r2, [pc, #28] ; (8035970 ) - 8035954: 683b ldr r3, [r7, #0] - 8035956: 6353 str r3, [r2, #52] ; 0x34 + 80359d6: 4a07 ldr r2, [pc, #28] ; (80359f4 ) + 80359d8: 683b ldr r3, [r7, #0] + 80359da: 6353 str r3, [r2, #52] ; 0x34 HAL_ETH_Transmit(&heth, &TxConfig, ETH_DMA_TRANSMIT_TIMEOUT); - 8035958: 2214 movs r2, #20 - 803595a: 4905 ldr r1, [pc, #20] ; (8035970 ) - 803595c: 4805 ldr r0, [pc, #20] ; (8035974 ) - 803595e: f7f5 f8c3 bl 802aae8 + 80359dc: 2214 movs r2, #20 + 80359de: 4905 ldr r1, [pc, #20] ; (80359f4 ) + 80359e0: 4805 ldr r0, [pc, #20] ; (80359f8 ) + 80359e2: f7f5 f8c3 bl 802ab6c return errval; - 8035962: f997 303f ldrsb.w r3, [r7, #63] ; 0x3f + 80359e6: f997 303f ldrsb.w r3, [r7, #63] ; 0x3f } - 8035966: 4618 mov r0, r3 - 8035968: 3748 adds r7, #72 ; 0x48 - 803596a: 46bd mov sp, r7 - 803596c: bd80 pop {r7, pc} - 803596e: bf00 nop - 8035970: 2400b964 .word 0x2400b964 - 8035974: 2400b8b4 .word 0x2400b8b4 + 80359ea: 4618 mov r0, r3 + 80359ec: 3748 adds r7, #72 ; 0x48 + 80359ee: 46bd mov sp, r7 + 80359f0: bd80 pop {r7, pc} + 80359f2: bf00 nop + 80359f4: 2400b96c .word 0x2400b96c + 80359f8: 2400b8bc .word 0x2400b8bc -08035978 : +080359fc : * @param netif the lwip network interface structure for this ethernetif * @return a pbuf filled with the received packet (including MAC header) * NULL on memory error */ static struct pbuf * low_level_input(struct netif *netif) { - 8035978: b580 push {r7, lr} - 803597a: b084 sub sp, #16 - 803597c: af00 add r7, sp, #0 - 803597e: 6078 str r0, [r7, #4] + 80359fc: b580 push {r7, lr} + 80359fe: b084 sub sp, #16 + 8035a00: af00 add r7, sp, #0 + 8035a02: 6078 str r0, [r7, #4] struct pbuf *p = NULL; - 8035980: 2300 movs r3, #0 - 8035982: 60fb str r3, [r7, #12] + 8035a04: 2300 movs r3, #0 + 8035a06: 60fb str r3, [r7, #12] if(RxAllocStatus == RX_ALLOC_OK) - 8035984: 4b07 ldr r3, [pc, #28] ; (80359a4 ) - 8035986: 781b ldrb r3, [r3, #0] - 8035988: 2b00 cmp r3, #0 - 803598a: d105 bne.n 8035998 + 8035a08: 4b07 ldr r3, [pc, #28] ; (8035a28 ) + 8035a0a: 781b ldrb r3, [r3, #0] + 8035a0c: 2b00 cmp r3, #0 + 8035a0e: d105 bne.n 8035a1c { HAL_ETH_ReadData(&heth, (void **)&p); - 803598c: f107 030c add.w r3, r7, #12 - 8035990: 4619 mov r1, r3 - 8035992: 4805 ldr r0, [pc, #20] ; (80359a8 ) - 8035994: f7f5 f93f bl 802ac16 + 8035a10: f107 030c add.w r3, r7, #12 + 8035a14: 4619 mov r1, r3 + 8035a16: 4805 ldr r0, [pc, #20] ; (8035a2c ) + 8035a18: f7f5 f93f bl 802ac9a } return p; - 8035998: 68fb ldr r3, [r7, #12] + 8035a1c: 68fb ldr r3, [r7, #12] } - 803599a: 4618 mov r0, r3 - 803599c: 3710 adds r7, #16 - 803599e: 46bd mov sp, r7 - 80359a0: bd80 pop {r7, pc} - 80359a2: bf00 nop - 80359a4: 2400b8b0 .word 0x2400b8b0 - 80359a8: 2400b8b4 .word 0x2400b8b4 + 8035a1e: 4618 mov r0, r3 + 8035a20: 3710 adds r7, #16 + 8035a22: 46bd mov sp, r7 + 8035a24: bd80 pop {r7, pc} + 8035a26: bf00 nop + 8035a28: 2400b8b8 .word 0x2400b8b8 + 8035a2c: 2400b8bc .word 0x2400b8bc -080359ac : +08035a30 : * the appropriate input function is called. * * @param netif the lwip network interface structure for this ethernetif */ void ethernetif_input(struct netif *netif) { - 80359ac: b580 push {r7, lr} - 80359ae: b084 sub sp, #16 - 80359b0: af00 add r7, sp, #0 - 80359b2: 6078 str r0, [r7, #4] + 8035a30: b580 push {r7, lr} + 8035a32: b084 sub sp, #16 + 8035a34: af00 add r7, sp, #0 + 8035a36: 6078 str r0, [r7, #4] struct pbuf *p = NULL; - 80359b4: 2300 movs r3, #0 - 80359b6: 60fb str r3, [r7, #12] + 8035a38: 2300 movs r3, #0 + 8035a3a: 60fb str r3, [r7, #12] do { p = low_level_input( netif ); - 80359b8: 6878 ldr r0, [r7, #4] - 80359ba: f7ff ffdd bl 8035978 - 80359be: 60f8 str r0, [r7, #12] + 8035a3c: 6878 ldr r0, [r7, #4] + 8035a3e: f7ff ffdd bl 80359fc + 8035a42: 60f8 str r0, [r7, #12] if (p != NULL) - 80359c0: 68fb ldr r3, [r7, #12] - 80359c2: 2b00 cmp r3, #0 - 80359c4: d00a beq.n 80359dc + 8035a44: 68fb ldr r3, [r7, #12] + 8035a46: 2b00 cmp r3, #0 + 8035a48: d00a beq.n 8035a60 { if (netif->input( p, netif) != ERR_OK ) - 80359c6: 687b ldr r3, [r7, #4] - 80359c8: 691b ldr r3, [r3, #16] - 80359ca: 6879 ldr r1, [r7, #4] - 80359cc: 68f8 ldr r0, [r7, #12] - 80359ce: 4798 blx r3 - 80359d0: 4603 mov r3, r0 - 80359d2: 2b00 cmp r3, #0 - 80359d4: d002 beq.n 80359dc + 8035a4a: 687b ldr r3, [r7, #4] + 8035a4c: 691b ldr r3, [r3, #16] + 8035a4e: 6879 ldr r1, [r7, #4] + 8035a50: 68f8 ldr r0, [r7, #12] + 8035a52: 4798 blx r3 + 8035a54: 4603 mov r3, r0 + 8035a56: 2b00 cmp r3, #0 + 8035a58: d002 beq.n 8035a60 { pbuf_free(p); - 80359d6: 68f8 ldr r0, [r7, #12] - 80359d8: f001 feb0 bl 803773c + 8035a5a: 68f8 ldr r0, [r7, #12] + 8035a5c: f001 feb0 bl 80377c0 } } } while(p!=NULL); - 80359dc: 68fb ldr r3, [r7, #12] - 80359de: 2b00 cmp r3, #0 - 80359e0: d1ea bne.n 80359b8 + 8035a60: 68fb ldr r3, [r7, #12] + 8035a62: 2b00 cmp r3, #0 + 8035a64: d1ea bne.n 8035a3c } - 80359e2: bf00 nop - 80359e4: bf00 nop - 80359e6: 3710 adds r7, #16 - 80359e8: 46bd mov sp, r7 - 80359ea: bd80 pop {r7, pc} + 8035a66: bf00 nop + 8035a68: bf00 nop + 8035a6a: 3710 adds r7, #16 + 8035a6c: 46bd mov sp, r7 + 8035a6e: bd80 pop {r7, pc} -080359ec : +08035a70 : * @return ERR_OK if the loopif is initialized * ERR_MEM if private data couldn't be allocated * any other err_t on error */ err_t ethernetif_init(struct netif *netif) { - 80359ec: b580 push {r7, lr} - 80359ee: b082 sub sp, #8 - 80359f0: af00 add r7, sp, #0 - 80359f2: 6078 str r0, [r7, #4] + 8035a70: b580 push {r7, lr} + 8035a72: b082 sub sp, #8 + 8035a74: af00 add r7, sp, #0 + 8035a76: 6078 str r0, [r7, #4] LWIP_ASSERT("netif != NULL", (netif != NULL)); - 80359f4: 687b ldr r3, [r7, #4] - 80359f6: 2b00 cmp r3, #0 - 80359f8: d106 bne.n 8035a08 - 80359fa: 4b0e ldr r3, [pc, #56] ; (8035a34 ) - 80359fc: f240 128b movw r2, #395 ; 0x18b - 8035a00: 490d ldr r1, [pc, #52] ; (8035a38 ) - 8035a02: 480e ldr r0, [pc, #56] ; (8035a3c ) - 8035a04: f00b f884 bl 8040b10 + 8035a78: 687b ldr r3, [r7, #4] + 8035a7a: 2b00 cmp r3, #0 + 8035a7c: d106 bne.n 8035a8c + 8035a7e: 4b0e ldr r3, [pc, #56] ; (8035ab8 ) + 8035a80: f240 128b movw r2, #395 ; 0x18b + 8035a84: 490d ldr r1, [pc, #52] ; (8035abc ) + 8035a86: 480e ldr r0, [pc, #56] ; (8035ac0 ) + 8035a88: f00b f884 bl 8040b94 * The last argument should be replaced with your link speed, in units * of bits per second. */ // MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS); netif->name[0] = IFNAME0; - 8035a08: 687b ldr r3, [r7, #4] - 8035a0a: 2273 movs r2, #115 ; 0x73 - 8035a0c: f883 2032 strb.w r2, [r3, #50] ; 0x32 + 8035a8c: 687b ldr r3, [r7, #4] + 8035a8e: 2273 movs r2, #115 ; 0x73 + 8035a90: f883 2032 strb.w r2, [r3, #50] ; 0x32 netif->name[1] = IFNAME1; - 8035a10: 687b ldr r3, [r7, #4] - 8035a12: 2274 movs r2, #116 ; 0x74 - 8035a14: f883 2033 strb.w r2, [r3, #51] ; 0x33 + 8035a94: 687b ldr r3, [r7, #4] + 8035a96: 2274 movs r2, #116 ; 0x74 + 8035a98: f883 2033 strb.w r2, [r3, #51] ; 0x33 * is available...) */ #if LWIP_IPV4 #if LWIP_ARP || LWIP_ETHERNET #if LWIP_ARP netif->output = etharp_output; - 8035a18: 687b ldr r3, [r7, #4] - 8035a1a: 4a09 ldr r2, [pc, #36] ; (8035a40 ) - 8035a1c: 615a str r2, [r3, #20] + 8035a9c: 687b ldr r3, [r7, #4] + 8035a9e: 4a09 ldr r2, [pc, #36] ; (8035ac4 ) + 8035aa0: 615a str r2, [r3, #20] #if LWIP_IPV6 netif->output_ip6 = ethip6_output; #endif /* LWIP_IPV6 */ netif->linkoutput = low_level_output; - 8035a1e: 687b ldr r3, [r7, #4] - 8035a20: 4a08 ldr r2, [pc, #32] ; (8035a44 ) - 8035a22: 619a str r2, [r3, #24] + 8035aa2: 687b ldr r3, [r7, #4] + 8035aa4: 4a08 ldr r2, [pc, #32] ; (8035ac8 ) + 8035aa6: 619a str r2, [r3, #24] /* initialize the hardware */ low_level_init(netif); - 8035a24: 6878 ldr r0, [r7, #4] - 8035a26: f7ff fe7b bl 8035720 + 8035aa8: 6878 ldr r0, [r7, #4] + 8035aaa: f7ff fe7b bl 80357a4 return ERR_OK; - 8035a2a: 2300 movs r3, #0 -} - 8035a2c: 4618 mov r0, r3 - 8035a2e: 3708 adds r7, #8 - 8035a30: 46bd mov sp, r7 - 8035a32: bd80 pop {r7, pc} - 8035a34: 080422cc .word 0x080422cc - 8035a38: 080422e8 .word 0x080422e8 - 8035a3c: 080422f8 .word 0x080422f8 - 8035a40: 0803eb29 .word 0x0803eb29 - 8035a44: 08035875 .word 0x08035875 - -08035a48 : + 8035aae: 2300 movs r3, #0 +} + 8035ab0: 4618 mov r0, r3 + 8035ab2: 3708 adds r7, #8 + 8035ab4: 46bd mov sp, r7 + 8035ab6: bd80 pop {r7, pc} + 8035ab8: 0804234c .word 0x0804234c + 8035abc: 08042368 .word 0x08042368 + 8035ac0: 08042378 .word 0x08042378 + 8035ac4: 0803ebad .word 0x0803ebad + 8035ac8: 080358f9 .word 0x080358f9 + +08035acc : * @brief Custom Rx pbuf free callback * @param pbuf: pbuf to be freed * @retval None */ void pbuf_free_custom(struct pbuf *p) { - 8035a48: b580 push {r7, lr} - 8035a4a: b084 sub sp, #16 - 8035a4c: af00 add r7, sp, #0 - 8035a4e: 6078 str r0, [r7, #4] + 8035acc: b580 push {r7, lr} + 8035ace: b084 sub sp, #16 + 8035ad0: af00 add r7, sp, #0 + 8035ad2: 6078 str r0, [r7, #4] struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p; - 8035a50: 687b ldr r3, [r7, #4] - 8035a52: 60fb str r3, [r7, #12] + 8035ad4: 687b ldr r3, [r7, #4] + 8035ad6: 60fb str r3, [r7, #12] LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf); - 8035a54: 68f9 ldr r1, [r7, #12] - 8035a56: 4807 ldr r0, [pc, #28] ; (8035a74 ) - 8035a58: f000 ffba bl 80369d0 + 8035ad8: 68f9 ldr r1, [r7, #12] + 8035ada: 4807 ldr r0, [pc, #28] ; (8035af8 ) + 8035adc: f000 ffba bl 8036a54 /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to * call HAL_ETH_GetRxDataBuffer to rebuild the Rx descriptors. */ if (RxAllocStatus == RX_ALLOC_ERROR) - 8035a5c: 4b06 ldr r3, [pc, #24] ; (8035a78 ) - 8035a5e: 781b ldrb r3, [r3, #0] - 8035a60: 2b01 cmp r3, #1 - 8035a62: d102 bne.n 8035a6a + 8035ae0: 4b06 ldr r3, [pc, #24] ; (8035afc ) + 8035ae2: 781b ldrb r3, [r3, #0] + 8035ae4: 2b01 cmp r3, #1 + 8035ae6: d102 bne.n 8035aee { RxAllocStatus = RX_ALLOC_OK; - 8035a64: 4b04 ldr r3, [pc, #16] ; (8035a78 ) - 8035a66: 2200 movs r2, #0 - 8035a68: 701a strb r2, [r3, #0] + 8035ae8: 4b04 ldr r3, [pc, #16] ; (8035afc ) + 8035aea: 2200 movs r2, #0 + 8035aec: 701a strb r2, [r3, #0] } } - 8035a6a: bf00 nop - 8035a6c: 3710 adds r7, #16 - 8035a6e: 46bd mov sp, r7 - 8035a70: bd80 pop {r7, pc} - 8035a72: bf00 nop - 8035a74: 08044d24 .word 0x08044d24 - 8035a78: 2400b8b0 .word 0x2400b8b0 + 8035aee: bf00 nop + 8035af0: 3710 adds r7, #16 + 8035af2: 46bd mov sp, r7 + 8035af4: bd80 pop {r7, pc} + 8035af6: bf00 nop + 8035af8: 08044da4 .word 0x08044da4 + 8035afc: 2400b8b8 .word 0x2400b8b8 -08035a7c : +08035b00 : * when LWIP_TIMERS == 1 and NO_SYS == 1 * @param None * @retval Current Time value */ u32_t sys_now(void) { - 8035a7c: b580 push {r7, lr} - 8035a7e: af00 add r7, sp, #0 + 8035b00: b580 push {r7, lr} + 8035b02: af00 add r7, sp, #0 return HAL_GetTick(); - 8035a80: f7f0 faa0 bl 8025fc4 - 8035a84: 4603 mov r3, r0 + 8035b04: f7f0 faa0 bl 8026048 + 8035b08: 4603 mov r3, r0 } - 8035a86: 4618 mov r0, r3 - 8035a88: bd80 pop {r7, pc} + 8035b0a: 4618 mov r0, r3 + 8035b0c: bd80 pop {r7, pc} ... -08035a8c : +08035b10 : * @param ethHandle: ETH handle * @retval None */ void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle) { - 8035a8c: b580 push {r7, lr} - 8035a8e: b08e sub sp, #56 ; 0x38 - 8035a90: af00 add r7, sp, #0 - 8035a92: 6078 str r0, [r7, #4] + 8035b10: b580 push {r7, lr} + 8035b12: b08e sub sp, #56 ; 0x38 + 8035b14: af00 add r7, sp, #0 + 8035b16: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8035a94: f107 0324 add.w r3, r7, #36 ; 0x24 - 8035a98: 2200 movs r2, #0 - 8035a9a: 601a str r2, [r3, #0] - 8035a9c: 605a str r2, [r3, #4] - 8035a9e: 609a str r2, [r3, #8] - 8035aa0: 60da str r2, [r3, #12] - 8035aa2: 611a str r2, [r3, #16] + 8035b18: f107 0324 add.w r3, r7, #36 ; 0x24 + 8035b1c: 2200 movs r2, #0 + 8035b1e: 601a str r2, [r3, #0] + 8035b20: 605a str r2, [r3, #4] + 8035b22: 609a str r2, [r3, #8] + 8035b24: 60da str r2, [r3, #12] + 8035b26: 611a str r2, [r3, #16] if(ethHandle->Instance==ETH) - 8035aa4: 687b ldr r3, [r7, #4] - 8035aa6: 681b ldr r3, [r3, #0] - 8035aa8: 4a4d ldr r2, [pc, #308] ; (8035be0 ) - 8035aaa: 4293 cmp r3, r2 - 8035aac: f040 8093 bne.w 8035bd6 + 8035b28: 687b ldr r3, [r7, #4] + 8035b2a: 681b ldr r3, [r3, #0] + 8035b2c: 4a4d ldr r2, [pc, #308] ; (8035c64 ) + 8035b2e: 4293 cmp r3, r2 + 8035b30: f040 8093 bne.w 8035c5a { /* USER CODE BEGIN ETH_MspInit 0 */ /* USER CODE END ETH_MspInit 0 */ /* Enable Peripheral clock */ __HAL_RCC_ETH1MAC_CLK_ENABLE(); - 8035ab0: 4b4c ldr r3, [pc, #304] ; (8035be4 ) - 8035ab2: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035ab6: 4a4b ldr r2, [pc, #300] ; (8035be4 ) - 8035ab8: f443 4300 orr.w r3, r3, #32768 ; 0x8000 - 8035abc: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 - 8035ac0: 4b48 ldr r3, [pc, #288] ; (8035be4 ) - 8035ac2: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035ac6: f403 4300 and.w r3, r3, #32768 ; 0x8000 - 8035aca: 623b str r3, [r7, #32] - 8035acc: 6a3b ldr r3, [r7, #32] + 8035b34: 4b4c ldr r3, [pc, #304] ; (8035c68 ) + 8035b36: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035b3a: 4a4b ldr r2, [pc, #300] ; (8035c68 ) + 8035b3c: f443 4300 orr.w r3, r3, #32768 ; 0x8000 + 8035b40: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 + 8035b44: 4b48 ldr r3, [pc, #288] ; (8035c68 ) + 8035b46: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035b4a: f403 4300 and.w r3, r3, #32768 ; 0x8000 + 8035b4e: 623b str r3, [r7, #32] + 8035b50: 6a3b ldr r3, [r7, #32] __HAL_RCC_ETH1TX_CLK_ENABLE(); - 8035ace: 4b45 ldr r3, [pc, #276] ; (8035be4 ) - 8035ad0: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035ad4: 4a43 ldr r2, [pc, #268] ; (8035be4 ) - 8035ad6: f443 3380 orr.w r3, r3, #65536 ; 0x10000 - 8035ada: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 - 8035ade: 4b41 ldr r3, [pc, #260] ; (8035be4 ) - 8035ae0: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035ae4: f403 3380 and.w r3, r3, #65536 ; 0x10000 - 8035ae8: 61fb str r3, [r7, #28] - 8035aea: 69fb ldr r3, [r7, #28] + 8035b52: 4b45 ldr r3, [pc, #276] ; (8035c68 ) + 8035b54: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035b58: 4a43 ldr r2, [pc, #268] ; (8035c68 ) + 8035b5a: f443 3380 orr.w r3, r3, #65536 ; 0x10000 + 8035b5e: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 + 8035b62: 4b41 ldr r3, [pc, #260] ; (8035c68 ) + 8035b64: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035b68: f403 3380 and.w r3, r3, #65536 ; 0x10000 + 8035b6c: 61fb str r3, [r7, #28] + 8035b6e: 69fb ldr r3, [r7, #28] __HAL_RCC_ETH1RX_CLK_ENABLE(); - 8035aec: 4b3d ldr r3, [pc, #244] ; (8035be4 ) - 8035aee: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035af2: 4a3c ldr r2, [pc, #240] ; (8035be4 ) - 8035af4: f443 3300 orr.w r3, r3, #131072 ; 0x20000 - 8035af8: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 - 8035afc: 4b39 ldr r3, [pc, #228] ; (8035be4 ) - 8035afe: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 - 8035b02: f403 3300 and.w r3, r3, #131072 ; 0x20000 - 8035b06: 61bb str r3, [r7, #24] - 8035b08: 69bb ldr r3, [r7, #24] + 8035b70: 4b3d ldr r3, [pc, #244] ; (8035c68 ) + 8035b72: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035b76: 4a3c ldr r2, [pc, #240] ; (8035c68 ) + 8035b78: f443 3300 orr.w r3, r3, #131072 ; 0x20000 + 8035b7c: f8c2 30d8 str.w r3, [r2, #216] ; 0xd8 + 8035b80: 4b39 ldr r3, [pc, #228] ; (8035c68 ) + 8035b82: f8d3 30d8 ldr.w r3, [r3, #216] ; 0xd8 + 8035b86: f403 3300 and.w r3, r3, #131072 ; 0x20000 + 8035b8a: 61bb str r3, [r7, #24] + 8035b8c: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOC_CLK_ENABLE(); - 8035b0a: 4b36 ldr r3, [pc, #216] ; (8035be4 ) - 8035b0c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035b10: 4a34 ldr r2, [pc, #208] ; (8035be4 ) - 8035b12: f043 0304 orr.w r3, r3, #4 - 8035b16: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8035b1a: 4b32 ldr r3, [pc, #200] ; (8035be4 ) - 8035b1c: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035b20: f003 0304 and.w r3, r3, #4 - 8035b24: 617b str r3, [r7, #20] - 8035b26: 697b ldr r3, [r7, #20] + 8035b8e: 4b36 ldr r3, [pc, #216] ; (8035c68 ) + 8035b90: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035b94: 4a34 ldr r2, [pc, #208] ; (8035c68 ) + 8035b96: f043 0304 orr.w r3, r3, #4 + 8035b9a: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8035b9e: 4b32 ldr r3, [pc, #200] ; (8035c68 ) + 8035ba0: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035ba4: f003 0304 and.w r3, r3, #4 + 8035ba8: 617b str r3, [r7, #20] + 8035baa: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8035b28: 4b2e ldr r3, [pc, #184] ; (8035be4 ) - 8035b2a: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035b2e: 4a2d ldr r2, [pc, #180] ; (8035be4 ) - 8035b30: f043 0301 orr.w r3, r3, #1 - 8035b34: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8035b38: 4b2a ldr r3, [pc, #168] ; (8035be4 ) - 8035b3a: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035b3e: f003 0301 and.w r3, r3, #1 - 8035b42: 613b str r3, [r7, #16] - 8035b44: 693b ldr r3, [r7, #16] + 8035bac: 4b2e ldr r3, [pc, #184] ; (8035c68 ) + 8035bae: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035bb2: 4a2d ldr r2, [pc, #180] ; (8035c68 ) + 8035bb4: f043 0301 orr.w r3, r3, #1 + 8035bb8: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8035bbc: 4b2a ldr r3, [pc, #168] ; (8035c68 ) + 8035bbe: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035bc2: f003 0301 and.w r3, r3, #1 + 8035bc6: 613b str r3, [r7, #16] + 8035bc8: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8035b46: 4b27 ldr r3, [pc, #156] ; (8035be4 ) - 8035b48: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035b4c: 4a25 ldr r2, [pc, #148] ; (8035be4 ) - 8035b4e: f043 0302 orr.w r3, r3, #2 - 8035b52: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 - 8035b56: 4b23 ldr r3, [pc, #140] ; (8035be4 ) - 8035b58: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 - 8035b5c: f003 0302 and.w r3, r3, #2 - 8035b60: 60fb str r3, [r7, #12] - 8035b62: 68fb ldr r3, [r7, #12] + 8035bca: 4b27 ldr r3, [pc, #156] ; (8035c68 ) + 8035bcc: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035bd0: 4a25 ldr r2, [pc, #148] ; (8035c68 ) + 8035bd2: f043 0302 orr.w r3, r3, #2 + 8035bd6: f8c2 30e0 str.w r3, [r2, #224] ; 0xe0 + 8035bda: 4b23 ldr r3, [pc, #140] ; (8035c68 ) + 8035bdc: f8d3 30e0 ldr.w r3, [r3, #224] ; 0xe0 + 8035be0: f003 0302 and.w r3, r3, #2 + 8035be4: 60fb str r3, [r7, #12] + 8035be6: 68fb ldr r3, [r7, #12] PC5 ------> ETH_RXD1 PB11 ------> ETH_TX_EN PB12 ------> ETH_TXD0 PB13 ------> ETH_TXD1 */ GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5; - 8035b64: 2332 movs r3, #50 ; 0x32 - 8035b66: 627b str r3, [r7, #36] ; 0x24 + 8035be8: 2332 movs r3, #50 ; 0x32 + 8035bea: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8035b68: 2302 movs r3, #2 - 8035b6a: 62bb str r3, [r7, #40] ; 0x28 + 8035bec: 2302 movs r3, #2 + 8035bee: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8035b6c: 2300 movs r3, #0 - 8035b6e: 62fb str r3, [r7, #44] ; 0x2c + 8035bf0: 2300 movs r3, #0 + 8035bf2: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8035b70: 2303 movs r3, #3 - 8035b72: 633b str r3, [r7, #48] ; 0x30 + 8035bf4: 2303 movs r3, #3 + 8035bf6: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8035b74: 230b movs r3, #11 - 8035b76: 637b str r3, [r7, #52] ; 0x34 + 8035bf8: 230b movs r3, #11 + 8035bfa: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8035b78: f107 0324 add.w r3, r7, #36 ; 0x24 - 8035b7c: 4619 mov r1, r3 - 8035b7e: 481a ldr r0, [pc, #104] ; (8035be8 ) - 8035b80: f7f7 fc74 bl 802d46c + 8035bfc: f107 0324 add.w r3, r7, #36 ; 0x24 + 8035c00: 4619 mov r1, r3 + 8035c02: 481a ldr r0, [pc, #104] ; (8035c6c ) + 8035c04: f7f7 fc74 bl 802d4f0 GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7; - 8035b84: 2386 movs r3, #134 ; 0x86 - 8035b86: 627b str r3, [r7, #36] ; 0x24 + 8035c08: 2386 movs r3, #134 ; 0x86 + 8035c0a: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8035b88: 2302 movs r3, #2 - 8035b8a: 62bb str r3, [r7, #40] ; 0x28 + 8035c0c: 2302 movs r3, #2 + 8035c0e: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8035b8c: 2300 movs r3, #0 - 8035b8e: 62fb str r3, [r7, #44] ; 0x2c + 8035c10: 2300 movs r3, #0 + 8035c12: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8035b90: 2303 movs r3, #3 - 8035b92: 633b str r3, [r7, #48] ; 0x30 + 8035c14: 2303 movs r3, #3 + 8035c16: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8035b94: 230b movs r3, #11 - 8035b96: 637b str r3, [r7, #52] ; 0x34 + 8035c18: 230b movs r3, #11 + 8035c1a: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8035b98: f107 0324 add.w r3, r7, #36 ; 0x24 - 8035b9c: 4619 mov r1, r3 - 8035b9e: 4813 ldr r0, [pc, #76] ; (8035bec ) - 8035ba0: f7f7 fc64 bl 802d46c + 8035c1c: f107 0324 add.w r3, r7, #36 ; 0x24 + 8035c20: 4619 mov r1, r3 + 8035c22: 4813 ldr r0, [pc, #76] ; (8035c70 ) + 8035c24: f7f7 fc64 bl 802d4f0 GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13; - 8035ba4: f44f 5360 mov.w r3, #14336 ; 0x3800 - 8035ba8: 627b str r3, [r7, #36] ; 0x24 + 8035c28: f44f 5360 mov.w r3, #14336 ; 0x3800 + 8035c2c: 627b str r3, [r7, #36] ; 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8035baa: 2302 movs r3, #2 - 8035bac: 62bb str r3, [r7, #40] ; 0x28 + 8035c2e: 2302 movs r3, #2 + 8035c30: 62bb str r3, [r7, #40] ; 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; - 8035bae: 2300 movs r3, #0 - 8035bb0: 62fb str r3, [r7, #44] ; 0x2c + 8035c32: 2300 movs r3, #0 + 8035c34: 62fb str r3, [r7, #44] ; 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8035bb2: 2303 movs r3, #3 - 8035bb4: 633b str r3, [r7, #48] ; 0x30 + 8035c36: 2303 movs r3, #3 + 8035c38: 633b str r3, [r7, #48] ; 0x30 GPIO_InitStruct.Alternate = GPIO_AF11_ETH; - 8035bb6: 230b movs r3, #11 - 8035bb8: 637b str r3, [r7, #52] ; 0x34 + 8035c3a: 230b movs r3, #11 + 8035c3c: 637b str r3, [r7, #52] ; 0x34 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8035bba: f107 0324 add.w r3, r7, #36 ; 0x24 - 8035bbe: 4619 mov r1, r3 - 8035bc0: 480b ldr r0, [pc, #44] ; (8035bf0 ) - 8035bc2: f7f7 fc53 bl 802d46c + 8035c3e: f107 0324 add.w r3, r7, #36 ; 0x24 + 8035c42: 4619 mov r1, r3 + 8035c44: 480b ldr r0, [pc, #44] ; (8035c74 ) + 8035c46: f7f7 fc53 bl 802d4f0 /* Peripheral interrupt init */ HAL_NVIC_SetPriority(ETH_IRQn, 6, 0); - 8035bc6: 2200 movs r2, #0 - 8035bc8: 2106 movs r1, #6 - 8035bca: 203d movs r0, #61 ; 0x3d - 8035bcc: f7f1 fef9 bl 80279c2 + 8035c4a: 2200 movs r2, #0 + 8035c4c: 2106 movs r1, #6 + 8035c4e: 203d movs r0, #61 ; 0x3d + 8035c50: f7f1 fef9 bl 8027a46 HAL_NVIC_EnableIRQ(ETH_IRQn); - 8035bd0: 203d movs r0, #61 ; 0x3d - 8035bd2: f7f1 ff10 bl 80279f6 + 8035c54: 203d movs r0, #61 ; 0x3d + 8035c56: f7f1 ff10 bl 8027a7a /* USER CODE BEGIN ETH_MspInit 1 */ /* USER CODE END ETH_MspInit 1 */ } } - 8035bd6: bf00 nop - 8035bd8: 3738 adds r7, #56 ; 0x38 - 8035bda: 46bd mov sp, r7 - 8035bdc: bd80 pop {r7, pc} - 8035bde: bf00 nop - 8035be0: 40028000 .word 0x40028000 - 8035be4: 58024400 .word 0x58024400 - 8035be8: 58020800 .word 0x58020800 - 8035bec: 58020000 .word 0x58020000 - 8035bf0: 58020400 .word 0x58020400 + 8035c5a: bf00 nop + 8035c5c: 3738 adds r7, #56 ; 0x38 + 8035c5e: 46bd mov sp, r7 + 8035c60: bd80 pop {r7, pc} + 8035c62: bf00 nop + 8035c64: 40028000 .word 0x40028000 + 8035c68: 58024400 .word 0x58024400 + 8035c6c: 58020800 .word 0x58020800 + 8035c70: 58020000 .word 0x58020000 + 8035c74: 58020400 .word 0x58020400 -08035bf4 : +08035c78 : * @brief Initializes the MDIO interface GPIO and clocks. * @param None * @retval 0 if OK, -1 if ERROR */ int32_t ETH_PHY_IO_Init(void) { - 8035bf4: b580 push {r7, lr} - 8035bf6: af00 add r7, sp, #0 + 8035c78: b580 push {r7, lr} + 8035c7a: af00 add r7, sp, #0 /* We assume that MDIO GPIO configuration is already done in the ETH_MspInit() else it should be done here */ /* Configure the MDIO Clock */ HAL_ETH_SetMDIOClockRange(&heth); - 8035bf8: 4802 ldr r0, [pc, #8] ; (8035c04 ) - 8035bfa: f7f5 fd1d bl 802b638 + 8035c7c: 4802 ldr r0, [pc, #8] ; (8035c88 ) + 8035c7e: f7f5 fd1d bl 802b6bc return 0; - 8035bfe: 2300 movs r3, #0 + 8035c82: 2300 movs r3, #0 } - 8035c00: 4618 mov r0, r3 - 8035c02: bd80 pop {r7, pc} - 8035c04: 2400b8b4 .word 0x2400b8b4 + 8035c84: 4618 mov r0, r3 + 8035c86: bd80 pop {r7, pc} + 8035c88: 2400b8bc .word 0x2400b8bc -08035c08 : +08035c8c : * @brief De-Initializes the MDIO interface . * @param None * @retval 0 if OK, -1 if ERROR */ int32_t ETH_PHY_IO_DeInit (void) { - 8035c08: b480 push {r7} - 8035c0a: af00 add r7, sp, #0 + 8035c8c: b480 push {r7} + 8035c8e: af00 add r7, sp, #0 return 0; - 8035c0c: 2300 movs r3, #0 + 8035c90: 2300 movs r3, #0 } - 8035c0e: 4618 mov r0, r3 - 8035c10: 46bd mov sp, r7 - 8035c12: f85d 7b04 ldr.w r7, [sp], #4 - 8035c16: 4770 bx lr + 8035c92: 4618 mov r0, r3 + 8035c94: 46bd mov sp, r7 + 8035c96: f85d 7b04 ldr.w r7, [sp], #4 + 8035c9a: 4770 bx lr -08035c18 : +08035c9c : * @param RegAddr: PHY register address * @param pRegVal: pointer to hold the register value * @retval 0 if OK -1 if Error */ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal) { - 8035c18: b580 push {r7, lr} - 8035c1a: b084 sub sp, #16 - 8035c1c: af00 add r7, sp, #0 - 8035c1e: 60f8 str r0, [r7, #12] - 8035c20: 60b9 str r1, [r7, #8] - 8035c22: 607a str r2, [r7, #4] + 8035c9c: b580 push {r7, lr} + 8035c9e: b084 sub sp, #16 + 8035ca0: af00 add r7, sp, #0 + 8035ca2: 60f8 str r0, [r7, #12] + 8035ca4: 60b9 str r1, [r7, #8] + 8035ca6: 607a str r2, [r7, #4] if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK) - 8035c24: 687b ldr r3, [r7, #4] - 8035c26: 68ba ldr r2, [r7, #8] - 8035c28: 68f9 ldr r1, [r7, #12] - 8035c2a: 4807 ldr r0, [pc, #28] ; (8035c48 ) - 8035c2c: f7f5 fa6e bl 802b10c - 8035c30: 4603 mov r3, r0 - 8035c32: 2b00 cmp r3, #0 - 8035c34: d002 beq.n 8035c3c + 8035ca8: 687b ldr r3, [r7, #4] + 8035caa: 68ba ldr r2, [r7, #8] + 8035cac: 68f9 ldr r1, [r7, #12] + 8035cae: 4807 ldr r0, [pc, #28] ; (8035ccc ) + 8035cb0: f7f5 fa6e bl 802b190 + 8035cb4: 4603 mov r3, r0 + 8035cb6: 2b00 cmp r3, #0 + 8035cb8: d002 beq.n 8035cc0 { return -1; - 8035c36: f04f 33ff mov.w r3, #4294967295 - 8035c3a: e000 b.n 8035c3e + 8035cba: f04f 33ff mov.w r3, #4294967295 + 8035cbe: e000 b.n 8035cc2 } return 0; - 8035c3c: 2300 movs r3, #0 + 8035cc0: 2300 movs r3, #0 } - 8035c3e: 4618 mov r0, r3 - 8035c40: 3710 adds r7, #16 - 8035c42: 46bd mov sp, r7 - 8035c44: bd80 pop {r7, pc} - 8035c46: bf00 nop - 8035c48: 2400b8b4 .word 0x2400b8b4 + 8035cc2: 4618 mov r0, r3 + 8035cc4: 3710 adds r7, #16 + 8035cc6: 46bd mov sp, r7 + 8035cc8: bd80 pop {r7, pc} + 8035cca: bf00 nop + 8035ccc: 2400b8bc .word 0x2400b8bc -08035c4c : +08035cd0 : * @param RegAddr: PHY register address * @param RegVal: Value to be written * @retval 0 if OK -1 if Error */ int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal) { - 8035c4c: b580 push {r7, lr} - 8035c4e: b084 sub sp, #16 - 8035c50: af00 add r7, sp, #0 - 8035c52: 60f8 str r0, [r7, #12] - 8035c54: 60b9 str r1, [r7, #8] - 8035c56: 607a str r2, [r7, #4] + 8035cd0: b580 push {r7, lr} + 8035cd2: b084 sub sp, #16 + 8035cd4: af00 add r7, sp, #0 + 8035cd6: 60f8 str r0, [r7, #12] + 8035cd8: 60b9 str r1, [r7, #8] + 8035cda: 607a str r2, [r7, #4] if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK) - 8035c58: 687b ldr r3, [r7, #4] - 8035c5a: 68ba ldr r2, [r7, #8] - 8035c5c: 68f9 ldr r1, [r7, #12] - 8035c5e: 4807 ldr r0, [pc, #28] ; (8035c7c ) - 8035c60: f7f5 faa8 bl 802b1b4 - 8035c64: 4603 mov r3, r0 - 8035c66: 2b00 cmp r3, #0 - 8035c68: d002 beq.n 8035c70 + 8035cdc: 687b ldr r3, [r7, #4] + 8035cde: 68ba ldr r2, [r7, #8] + 8035ce0: 68f9 ldr r1, [r7, #12] + 8035ce2: 4807 ldr r0, [pc, #28] ; (8035d00 ) + 8035ce4: f7f5 faa8 bl 802b238 + 8035ce8: 4603 mov r3, r0 + 8035cea: 2b00 cmp r3, #0 + 8035cec: d002 beq.n 8035cf4 { return -1; - 8035c6a: f04f 33ff mov.w r3, #4294967295 - 8035c6e: e000 b.n 8035c72 + 8035cee: f04f 33ff mov.w r3, #4294967295 + 8035cf2: e000 b.n 8035cf6 } return 0; - 8035c70: 2300 movs r3, #0 + 8035cf4: 2300 movs r3, #0 } - 8035c72: 4618 mov r0, r3 - 8035c74: 3710 adds r7, #16 - 8035c76: 46bd mov sp, r7 - 8035c78: bd80 pop {r7, pc} - 8035c7a: bf00 nop - 8035c7c: 2400b8b4 .word 0x2400b8b4 + 8035cf6: 4618 mov r0, r3 + 8035cf8: 3710 adds r7, #16 + 8035cfa: 46bd mov sp, r7 + 8035cfc: bd80 pop {r7, pc} + 8035cfe: bf00 nop + 8035d00: 2400b8bc .word 0x2400b8bc -08035c80 : +08035d04 : /** * @brief Get the time in millisecons used for internal PHY driver process. * @retval Time value */ int32_t ETH_PHY_IO_GetTick(void) { - 8035c80: b580 push {r7, lr} - 8035c82: af00 add r7, sp, #0 + 8035d04: b580 push {r7, lr} + 8035d06: af00 add r7, sp, #0 return HAL_GetTick(); - 8035c84: f7f0 f99e bl 8025fc4 - 8035c88: 4603 mov r3, r0 + 8035d08: f7f0 f99e bl 8026048 + 8035d0c: 4603 mov r3, r0 } - 8035c8a: 4618 mov r0, r3 - 8035c8c: bd80 pop {r7, pc} + 8035d0e: 4618 mov r0, r3 + 8035d10: bd80 pop {r7, pc} ... -08035c90 : +08035d14 : /** * @brief Check the ETH link state then update ETH driver and netif link accordingly. * @retval None */ void ethernet_link_check_state(struct netif *netif) { - 8035c90: b580 push {r7, lr} - 8035c92: b0a0 sub sp, #128 ; 0x80 - 8035c94: af00 add r7, sp, #0 - 8035c96: 6078 str r0, [r7, #4] + 8035d14: b580 push {r7, lr} + 8035d16: b0a0 sub sp, #128 ; 0x80 + 8035d18: af00 add r7, sp, #0 + 8035d1a: 6078 str r0, [r7, #4] ETH_MACConfigTypeDef MACConf = {0}; - 8035c98: f107 030c add.w r3, r7, #12 - 8035c9c: 2264 movs r2, #100 ; 0x64 - 8035c9e: 2100 movs r1, #0 - 8035ca0: 4618 mov r0, r3 - 8035ca2: f00a fe4d bl 8040940 + 8035d1c: f107 030c add.w r3, r7, #12 + 8035d20: 2264 movs r2, #100 ; 0x64 + 8035d22: 2100 movs r1, #0 + 8035d24: 4618 mov r0, r3 + 8035d26: f00a fe4d bl 80409c4 int32_t PHYLinkState = 0; - 8035ca6: 2300 movs r3, #0 - 8035ca8: 673b str r3, [r7, #112] ; 0x70 + 8035d2a: 2300 movs r3, #0 + 8035d2c: 673b str r3, [r7, #112] ; 0x70 uint32_t linkchanged = 0U, speed = 0U, duplex = 0U; - 8035caa: 2300 movs r3, #0 - 8035cac: 67fb str r3, [r7, #124] ; 0x7c - 8035cae: 2300 movs r3, #0 - 8035cb0: 67bb str r3, [r7, #120] ; 0x78 - 8035cb2: 2300 movs r3, #0 - 8035cb4: 677b str r3, [r7, #116] ; 0x74 + 8035d2e: 2300 movs r3, #0 + 8035d30: 67fb str r3, [r7, #124] ; 0x7c + 8035d32: 2300 movs r3, #0 + 8035d34: 67bb str r3, [r7, #120] ; 0x78 + 8035d36: 2300 movs r3, #0 + 8035d38: 677b str r3, [r7, #116] ; 0x74 PHYLinkState = LAN8742_GetLinkState(&LAN8742); - 8035cb6: 483a ldr r0, [pc, #232] ; (8035da0 ) - 8035cb8: f7f0 f877 bl 8025daa - 8035cbc: 6738 str r0, [r7, #112] ; 0x70 + 8035d3a: 483a ldr r0, [pc, #232] ; (8035e24 ) + 8035d3c: f7f0 f877 bl 8025e2e + 8035d40: 6738 str r0, [r7, #112] ; 0x70 if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)) - 8035cbe: 687b ldr r3, [r7, #4] - 8035cc0: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8035cc4: 089b lsrs r3, r3, #2 - 8035cc6: f003 0301 and.w r3, r3, #1 - 8035cca: b2db uxtb r3, r3 - 8035ccc: 2b00 cmp r3, #0 - 8035cce: d00c beq.n 8035cea - 8035cd0: 6f3b ldr r3, [r7, #112] ; 0x70 - 8035cd2: 2b01 cmp r3, #1 - 8035cd4: dc09 bgt.n 8035cea + 8035d42: 687b ldr r3, [r7, #4] + 8035d44: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8035d48: 089b lsrs r3, r3, #2 + 8035d4a: f003 0301 and.w r3, r3, #1 + 8035d4e: b2db uxtb r3, r3 + 8035d50: 2b00 cmp r3, #0 + 8035d52: d00c beq.n 8035d6e + 8035d54: 6f3b ldr r3, [r7, #112] ; 0x70 + 8035d56: 2b01 cmp r3, #1 + 8035d58: dc09 bgt.n 8035d6e { HAL_ETH_Stop(&heth); - 8035cd6: 4833 ldr r0, [pc, #204] ; (8035da4 ) - 8035cd8: f7f4 feb6 bl 802aa48 + 8035d5a: 4833 ldr r0, [pc, #204] ; (8035e28 ) + 8035d5c: f7f4 feb6 bl 802aacc netif_set_down(netif); - 8035cdc: 6878 ldr r0, [r7, #4] - 8035cde: f001 f90f bl 8036f00 + 8035d60: 6878 ldr r0, [r7, #4] + 8035d62: f001 f90f bl 8036f84 netif_set_link_down(netif); - 8035ce2: 6878 ldr r0, [r7, #4] - 8035ce4: f001 f97a bl 8036fdc + 8035d66: 6878 ldr r0, [r7, #4] + 8035d68: f001 f97a bl 8037060 netif_set_up(netif); netif_set_link_up(netif); } } } - 8035ce8: e055 b.n 8035d96 + 8035d6c: e055 b.n 8035e1a else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN)) - 8035cea: 687b ldr r3, [r7, #4] - 8035cec: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8035cf0: f003 0304 and.w r3, r3, #4 - 8035cf4: 2b00 cmp r3, #0 - 8035cf6: d14e bne.n 8035d96 - 8035cf8: 6f3b ldr r3, [r7, #112] ; 0x70 - 8035cfa: 2b01 cmp r3, #1 - 8035cfc: dd4b ble.n 8035d96 + 8035d6e: 687b ldr r3, [r7, #4] + 8035d70: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8035d74: f003 0304 and.w r3, r3, #4 + 8035d78: 2b00 cmp r3, #0 + 8035d7a: d14e bne.n 8035e1a + 8035d7c: 6f3b ldr r3, [r7, #112] ; 0x70 + 8035d7e: 2b01 cmp r3, #1 + 8035d80: dd4b ble.n 8035e1a switch (PHYLinkState) - 8035cfe: 6f3b ldr r3, [r7, #112] ; 0x70 - 8035d00: 3b02 subs r3, #2 - 8035d02: 2b03 cmp r3, #3 - 8035d04: d82a bhi.n 8035d5c - 8035d06: a201 add r2, pc, #4 ; (adr r2, 8035d0c ) - 8035d08: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8035d0c: 08035d1d .word 0x08035d1d - 8035d10: 08035d2f .word 0x08035d2f - 8035d14: 08035d3f .word 0x08035d3f - 8035d18: 08035d4f .word 0x08035d4f + 8035d82: 6f3b ldr r3, [r7, #112] ; 0x70 + 8035d84: 3b02 subs r3, #2 + 8035d86: 2b03 cmp r3, #3 + 8035d88: d82a bhi.n 8035de0 + 8035d8a: a201 add r2, pc, #4 ; (adr r2, 8035d90 ) + 8035d8c: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8035d90: 08035da1 .word 0x08035da1 + 8035d94: 08035db3 .word 0x08035db3 + 8035d98: 08035dc3 .word 0x08035dc3 + 8035d9c: 08035dd3 .word 0x08035dd3 duplex = ETH_FULLDUPLEX_MODE; - 8035d1c: f44f 5300 mov.w r3, #8192 ; 0x2000 - 8035d20: 677b str r3, [r7, #116] ; 0x74 + 8035da0: f44f 5300 mov.w r3, #8192 ; 0x2000 + 8035da4: 677b str r3, [r7, #116] ; 0x74 speed = ETH_SPEED_100M; - 8035d22: f44f 4380 mov.w r3, #16384 ; 0x4000 - 8035d26: 67bb str r3, [r7, #120] ; 0x78 + 8035da6: f44f 4380 mov.w r3, #16384 ; 0x4000 + 8035daa: 67bb str r3, [r7, #120] ; 0x78 linkchanged = 1; - 8035d28: 2301 movs r3, #1 - 8035d2a: 67fb str r3, [r7, #124] ; 0x7c + 8035dac: 2301 movs r3, #1 + 8035dae: 67fb str r3, [r7, #124] ; 0x7c break; - 8035d2c: e017 b.n 8035d5e + 8035db0: e017 b.n 8035de2 duplex = ETH_HALFDUPLEX_MODE; - 8035d2e: 2300 movs r3, #0 - 8035d30: 677b str r3, [r7, #116] ; 0x74 + 8035db2: 2300 movs r3, #0 + 8035db4: 677b str r3, [r7, #116] ; 0x74 speed = ETH_SPEED_100M; - 8035d32: f44f 4380 mov.w r3, #16384 ; 0x4000 - 8035d36: 67bb str r3, [r7, #120] ; 0x78 + 8035db6: f44f 4380 mov.w r3, #16384 ; 0x4000 + 8035dba: 67bb str r3, [r7, #120] ; 0x78 linkchanged = 1; - 8035d38: 2301 movs r3, #1 - 8035d3a: 67fb str r3, [r7, #124] ; 0x7c + 8035dbc: 2301 movs r3, #1 + 8035dbe: 67fb str r3, [r7, #124] ; 0x7c break; - 8035d3c: e00f b.n 8035d5e + 8035dc0: e00f b.n 8035de2 duplex = ETH_FULLDUPLEX_MODE; - 8035d3e: f44f 5300 mov.w r3, #8192 ; 0x2000 - 8035d42: 677b str r3, [r7, #116] ; 0x74 + 8035dc2: f44f 5300 mov.w r3, #8192 ; 0x2000 + 8035dc6: 677b str r3, [r7, #116] ; 0x74 speed = ETH_SPEED_10M; - 8035d44: 2300 movs r3, #0 - 8035d46: 67bb str r3, [r7, #120] ; 0x78 + 8035dc8: 2300 movs r3, #0 + 8035dca: 67bb str r3, [r7, #120] ; 0x78 linkchanged = 1; - 8035d48: 2301 movs r3, #1 - 8035d4a: 67fb str r3, [r7, #124] ; 0x7c + 8035dcc: 2301 movs r3, #1 + 8035dce: 67fb str r3, [r7, #124] ; 0x7c break; - 8035d4c: e007 b.n 8035d5e + 8035dd0: e007 b.n 8035de2 duplex = ETH_HALFDUPLEX_MODE; - 8035d4e: 2300 movs r3, #0 - 8035d50: 677b str r3, [r7, #116] ; 0x74 + 8035dd2: 2300 movs r3, #0 + 8035dd4: 677b str r3, [r7, #116] ; 0x74 speed = ETH_SPEED_10M; - 8035d52: 2300 movs r3, #0 - 8035d54: 67bb str r3, [r7, #120] ; 0x78 + 8035dd6: 2300 movs r3, #0 + 8035dd8: 67bb str r3, [r7, #120] ; 0x78 linkchanged = 1; - 8035d56: 2301 movs r3, #1 - 8035d58: 67fb str r3, [r7, #124] ; 0x7c + 8035dda: 2301 movs r3, #1 + 8035ddc: 67fb str r3, [r7, #124] ; 0x7c break; - 8035d5a: e000 b.n 8035d5e + 8035dde: e000 b.n 8035de2 break; - 8035d5c: bf00 nop + 8035de0: bf00 nop if(linkchanged) - 8035d5e: 6ffb ldr r3, [r7, #124] ; 0x7c - 8035d60: 2b00 cmp r3, #0 - 8035d62: d018 beq.n 8035d96 + 8035de2: 6ffb ldr r3, [r7, #124] ; 0x7c + 8035de4: 2b00 cmp r3, #0 + 8035de6: d018 beq.n 8035e1a HAL_ETH_GetMACConfig(&heth, &MACConf); - 8035d64: f107 030c add.w r3, r7, #12 - 8035d68: 4619 mov r1, r3 - 8035d6a: 480e ldr r0, [pc, #56] ; (8035da4 ) - 8035d6c: f7f5 fa76 bl 802b25c + 8035de8: f107 030c add.w r3, r7, #12 + 8035dec: 4619 mov r1, r3 + 8035dee: 480e ldr r0, [pc, #56] ; (8035e28 ) + 8035df0: f7f5 fa76 bl 802b2e0 MACConf.DuplexMode = duplex; - 8035d70: 6f7b ldr r3, [r7, #116] ; 0x74 - 8035d72: 627b str r3, [r7, #36] ; 0x24 + 8035df4: 6f7b ldr r3, [r7, #116] ; 0x74 + 8035df6: 627b str r3, [r7, #36] ; 0x24 MACConf.Speed = speed; - 8035d74: 6fbb ldr r3, [r7, #120] ; 0x78 - 8035d76: 623b str r3, [r7, #32] + 8035df8: 6fbb ldr r3, [r7, #120] ; 0x78 + 8035dfa: 623b str r3, [r7, #32] HAL_ETH_SetMACConfig(&heth, &MACConf); - 8035d78: f107 030c add.w r3, r7, #12 - 8035d7c: 4619 mov r1, r3 - 8035d7e: 4809 ldr r0, [pc, #36] ; (8035da4 ) - 8035d80: f7f5 fc40 bl 802b604 + 8035dfc: f107 030c add.w r3, r7, #12 + 8035e00: 4619 mov r1, r3 + 8035e02: 4809 ldr r0, [pc, #36] ; (8035e28 ) + 8035e04: f7f5 fc40 bl 802b688 HAL_ETH_Start(&heth); - 8035d84: 4807 ldr r0, [pc, #28] ; (8035da4 ) - 8035d86: f7f4 fdfd bl 802a984 + 8035e08: 4807 ldr r0, [pc, #28] ; (8035e28 ) + 8035e0a: f7f4 fdfd bl 802aa08 netif_set_up(netif); - 8035d8a: 6878 ldr r0, [r7, #4] - 8035d8c: f001 f844 bl 8036e18 + 8035e0e: 6878 ldr r0, [r7, #4] + 8035e10: f001 f844 bl 8036e9c netif_set_link_up(netif); - 8035d90: 6878 ldr r0, [r7, #4] - 8035d92: f001 f8ef bl 8036f74 + 8035e14: 6878 ldr r0, [r7, #4] + 8035e16: f001 f8ef bl 8036ff8 } - 8035d96: bf00 nop - 8035d98: 3780 adds r7, #128 ; 0x80 - 8035d9a: 46bd mov sp, r7 - 8035d9c: bd80 pop {r7, pc} - 8035d9e: bf00 nop - 8035da0: 2400b99c .word 0x2400b99c - 8035da4: 2400b8b4 .word 0x2400b8b4 + 8035e1a: bf00 nop + 8035e1c: 3780 adds r7, #128 ; 0x80 + 8035e1e: 46bd mov sp, r7 + 8035e20: bd80 pop {r7, pc} + 8035e22: bf00 nop + 8035e24: 2400b9a4 .word 0x2400b9a4 + 8035e28: 2400b8bc .word 0x2400b8bc -08035da8 : +08035e2c : void HAL_ETH_RxAllocateCallback(uint8_t **buff) { - 8035da8: b580 push {r7, lr} - 8035daa: b086 sub sp, #24 - 8035dac: af02 add r7, sp, #8 - 8035dae: 6078 str r0, [r7, #4] + 8035e2c: b580 push {r7, lr} + 8035e2e: b086 sub sp, #24 + 8035e30: af02 add r7, sp, #8 + 8035e32: 6078 str r0, [r7, #4] /* USER CODE BEGIN HAL ETH RxAllocateCallback */ struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL); - 8035db0: 4812 ldr r0, [pc, #72] ; (8035dfc ) - 8035db2: f000 fd9f bl 80368f4 - 8035db6: 60f8 str r0, [r7, #12] + 8035e34: 4812 ldr r0, [pc, #72] ; (8035e80 ) + 8035e36: f000 fd9f bl 8036978 + 8035e3a: 60f8 str r0, [r7, #12] if (p) - 8035db8: 68fb ldr r3, [r7, #12] - 8035dba: 2b00 cmp r3, #0 - 8035dbc: d014 beq.n 8035de8 + 8035e3c: 68fb ldr r3, [r7, #12] + 8035e3e: 2b00 cmp r3, #0 + 8035e40: d014 beq.n 8035e6c { /* Get the buff from the struct pbuf address. */ *buff = (uint8_t *)p + offsetof(RxBuff_t, buff); - 8035dbe: 68fb ldr r3, [r7, #12] - 8035dc0: f103 0220 add.w r2, r3, #32 - 8035dc4: 687b ldr r3, [r7, #4] - 8035dc6: 601a str r2, [r3, #0] + 8035e42: 68fb ldr r3, [r7, #12] + 8035e44: f103 0220 add.w r2, r3, #32 + 8035e48: 687b ldr r3, [r7, #4] + 8035e4a: 601a str r2, [r3, #0] p->custom_free_function = pbuf_free_custom; - 8035dc8: 68fb ldr r3, [r7, #12] - 8035dca: 4a0d ldr r2, [pc, #52] ; (8035e00 ) - 8035dcc: 611a str r2, [r3, #16] + 8035e4c: 68fb ldr r3, [r7, #12] + 8035e4e: 4a0d ldr r2, [pc, #52] ; (8035e84 ) + 8035e50: 611a str r2, [r3, #16] /* Initialize the struct pbuf. * This must be performed whenever a buffer's allocated because it may be * changed by lwIP or the app, e.g., pbuf_free decrements ref. */ pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUFFER_SIZE); - 8035dce: 687b ldr r3, [r7, #4] - 8035dd0: 681b ldr r3, [r3, #0] - 8035dd2: f44f 62bf mov.w r2, #1528 ; 0x5f8 - 8035dd6: 9201 str r2, [sp, #4] - 8035dd8: 9300 str r3, [sp, #0] - 8035dda: 68fb ldr r3, [r7, #12] - 8035ddc: 2241 movs r2, #65 ; 0x41 - 8035dde: 2100 movs r1, #0 - 8035de0: 2000 movs r0, #0 - 8035de2: f001 faf1 bl 80373c8 + 8035e52: 687b ldr r3, [r7, #4] + 8035e54: 681b ldr r3, [r3, #0] + 8035e56: f44f 62bf mov.w r2, #1528 ; 0x5f8 + 8035e5a: 9201 str r2, [sp, #4] + 8035e5c: 9300 str r3, [sp, #0] + 8035e5e: 68fb ldr r3, [r7, #12] + 8035e60: 2241 movs r2, #65 ; 0x41 + 8035e62: 2100 movs r1, #0 + 8035e64: 2000 movs r0, #0 + 8035e66: f001 faf1 bl 803744c { RxAllocStatus = RX_ALLOC_ERROR; *buff = NULL; } /* USER CODE END HAL ETH RxAllocateCallback */ } - 8035de6: e005 b.n 8035df4 + 8035e6a: e005 b.n 8035e78 RxAllocStatus = RX_ALLOC_ERROR; - 8035de8: 4b06 ldr r3, [pc, #24] ; (8035e04 ) - 8035dea: 2201 movs r2, #1 - 8035dec: 701a strb r2, [r3, #0] + 8035e6c: 4b06 ldr r3, [pc, #24] ; (8035e88 ) + 8035e6e: 2201 movs r2, #1 + 8035e70: 701a strb r2, [r3, #0] *buff = NULL; - 8035dee: 687b ldr r3, [r7, #4] - 8035df0: 2200 movs r2, #0 - 8035df2: 601a str r2, [r3, #0] + 8035e72: 687b ldr r3, [r7, #4] + 8035e74: 2200 movs r2, #0 + 8035e76: 601a str r2, [r3, #0] } - 8035df4: bf00 nop - 8035df6: 3710 adds r7, #16 - 8035df8: 46bd mov sp, r7 - 8035dfa: bd80 pop {r7, pc} - 8035dfc: 08044d24 .word 0x08044d24 - 8035e00: 08035a49 .word 0x08035a49 - 8035e04: 2400b8b0 .word 0x2400b8b0 + 8035e78: bf00 nop + 8035e7a: 3710 adds r7, #16 + 8035e7c: 46bd mov sp, r7 + 8035e7e: bd80 pop {r7, pc} + 8035e80: 08044da4 .word 0x08044da4 + 8035e84: 08035acd .word 0x08035acd + 8035e88: 2400b8b8 .word 0x2400b8b8 -08035e08 : +08035e8c : void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length) { - 8035e08: b480 push {r7} - 8035e0a: b08d sub sp, #52 ; 0x34 - 8035e0c: af00 add r7, sp, #0 - 8035e0e: 60f8 str r0, [r7, #12] - 8035e10: 60b9 str r1, [r7, #8] - 8035e12: 607a str r2, [r7, #4] - 8035e14: 807b strh r3, [r7, #2] + 8035e8c: b480 push {r7} + 8035e8e: b08d sub sp, #52 ; 0x34 + 8035e90: af00 add r7, sp, #0 + 8035e92: 60f8 str r0, [r7, #12] + 8035e94: 60b9 str r1, [r7, #8] + 8035e96: 607a str r2, [r7, #4] + 8035e98: 807b strh r3, [r7, #2] /* USER CODE BEGIN HAL ETH RxLinkCallback */ struct pbuf **ppStart = (struct pbuf **)pStart; - 8035e16: 68fb ldr r3, [r7, #12] - 8035e18: 62bb str r3, [r7, #40] ; 0x28 + 8035e9a: 68fb ldr r3, [r7, #12] + 8035e9c: 62bb str r3, [r7, #40] ; 0x28 struct pbuf **ppEnd = (struct pbuf **)pEnd; - 8035e1a: 68bb ldr r3, [r7, #8] - 8035e1c: 627b str r3, [r7, #36] ; 0x24 + 8035e9e: 68bb ldr r3, [r7, #8] + 8035ea0: 627b str r3, [r7, #36] ; 0x24 struct pbuf *p = NULL; - 8035e1e: 2300 movs r3, #0 - 8035e20: 62fb str r3, [r7, #44] ; 0x2c + 8035ea2: 2300 movs r3, #0 + 8035ea4: 62fb str r3, [r7, #44] ; 0x2c /* Get the struct pbuf from the buff address. */ p = (struct pbuf *)(buff - offsetof(RxBuff_t, buff)); - 8035e22: 687b ldr r3, [r7, #4] - 8035e24: 3b20 subs r3, #32 - 8035e26: 62fb str r3, [r7, #44] ; 0x2c + 8035ea6: 687b ldr r3, [r7, #4] + 8035ea8: 3b20 subs r3, #32 + 8035eaa: 62fb str r3, [r7, #44] ; 0x2c p->next = NULL; - 8035e28: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e2a: 2200 movs r2, #0 - 8035e2c: 601a str r2, [r3, #0] + 8035eac: 6afb ldr r3, [r7, #44] ; 0x2c + 8035eae: 2200 movs r2, #0 + 8035eb0: 601a str r2, [r3, #0] p->tot_len = 0; - 8035e2e: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e30: 2200 movs r2, #0 - 8035e32: 811a strh r2, [r3, #8] + 8035eb2: 6afb ldr r3, [r7, #44] ; 0x2c + 8035eb4: 2200 movs r2, #0 + 8035eb6: 811a strh r2, [r3, #8] p->len = Length; - 8035e34: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e36: 887a ldrh r2, [r7, #2] - 8035e38: 815a strh r2, [r3, #10] + 8035eb8: 6afb ldr r3, [r7, #44] ; 0x2c + 8035eba: 887a ldrh r2, [r7, #2] + 8035ebc: 815a strh r2, [r3, #10] /* Chain the buffer. */ if (!*ppStart) - 8035e3a: 6abb ldr r3, [r7, #40] ; 0x28 - 8035e3c: 681b ldr r3, [r3, #0] - 8035e3e: 2b00 cmp r3, #0 - 8035e40: d103 bne.n 8035e4a + 8035ebe: 6abb ldr r3, [r7, #40] ; 0x28 + 8035ec0: 681b ldr r3, [r3, #0] + 8035ec2: 2b00 cmp r3, #0 + 8035ec4: d103 bne.n 8035ece { /* The first buffer of the packet. */ *ppStart = p; - 8035e42: 6abb ldr r3, [r7, #40] ; 0x28 - 8035e44: 6afa ldr r2, [r7, #44] ; 0x2c - 8035e46: 601a str r2, [r3, #0] - 8035e48: e003 b.n 8035e52 + 8035ec6: 6abb ldr r3, [r7, #40] ; 0x28 + 8035ec8: 6afa ldr r2, [r7, #44] ; 0x2c + 8035eca: 601a str r2, [r3, #0] + 8035ecc: e003 b.n 8035ed6 } else { /* Chain the buffer to the end of the packet. */ (*ppEnd)->next = p; - 8035e4a: 6a7b ldr r3, [r7, #36] ; 0x24 - 8035e4c: 681b ldr r3, [r3, #0] - 8035e4e: 6afa ldr r2, [r7, #44] ; 0x2c - 8035e50: 601a str r2, [r3, #0] + 8035ece: 6a7b ldr r3, [r7, #36] ; 0x24 + 8035ed0: 681b ldr r3, [r3, #0] + 8035ed2: 6afa ldr r2, [r7, #44] ; 0x2c + 8035ed4: 601a str r2, [r3, #0] } *ppEnd = p; - 8035e52: 6a7b ldr r3, [r7, #36] ; 0x24 - 8035e54: 6afa ldr r2, [r7, #44] ; 0x2c - 8035e56: 601a str r2, [r3, #0] + 8035ed6: 6a7b ldr r3, [r7, #36] ; 0x24 + 8035ed8: 6afa ldr r2, [r7, #44] ; 0x2c + 8035eda: 601a str r2, [r3, #0] /* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len * set to its own length, plus the length of all the following pbufs in the chain. */ for (p = *ppStart; p != NULL; p = p->next) - 8035e58: 6abb ldr r3, [r7, #40] ; 0x28 - 8035e5a: 681b ldr r3, [r3, #0] - 8035e5c: 62fb str r3, [r7, #44] ; 0x2c - 8035e5e: e009 b.n 8035e74 + 8035edc: 6abb ldr r3, [r7, #40] ; 0x28 + 8035ede: 681b ldr r3, [r3, #0] + 8035ee0: 62fb str r3, [r7, #44] ; 0x2c + 8035ee2: e009 b.n 8035ef8 { p->tot_len += Length; - 8035e60: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e62: 891a ldrh r2, [r3, #8] - 8035e64: 887b ldrh r3, [r7, #2] - 8035e66: 4413 add r3, r2 - 8035e68: b29a uxth r2, r3 - 8035e6a: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e6c: 811a strh r2, [r3, #8] + 8035ee4: 6afb ldr r3, [r7, #44] ; 0x2c + 8035ee6: 891a ldrh r2, [r3, #8] + 8035ee8: 887b ldrh r3, [r7, #2] + 8035eea: 4413 add r3, r2 + 8035eec: b29a uxth r2, r3 + 8035eee: 6afb ldr r3, [r7, #44] ; 0x2c + 8035ef0: 811a strh r2, [r3, #8] for (p = *ppStart; p != NULL; p = p->next) - 8035e6e: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e70: 681b ldr r3, [r3, #0] - 8035e72: 62fb str r3, [r7, #44] ; 0x2c - 8035e74: 6afb ldr r3, [r7, #44] ; 0x2c - 8035e76: 2b00 cmp r3, #0 - 8035e78: d1f2 bne.n 8035e60 + 8035ef2: 6afb ldr r3, [r7, #44] ; 0x2c + 8035ef4: 681b ldr r3, [r3, #0] + 8035ef6: 62fb str r3, [r7, #44] ; 0x2c + 8035ef8: 6afb ldr r3, [r7, #44] ; 0x2c + 8035efa: 2b00 cmp r3, #0 + 8035efc: d1f2 bne.n 8035ee4 } /* Invalidate data cache because Rx DMA's writing to physical memory makes it stale. */ SCB_InvalidateDCache_by_Addr((uint32_t *)buff, Length); - 8035e7a: 887b ldrh r3, [r7, #2] - 8035e7c: 687a ldr r2, [r7, #4] - 8035e7e: 623a str r2, [r7, #32] - 8035e80: 61fb str r3, [r7, #28] + 8035efe: 887b ldrh r3, [r7, #2] + 8035f00: 687a ldr r2, [r7, #4] + 8035f02: 623a str r2, [r7, #32] + 8035f04: 61fb str r3, [r7, #28] if ( dsize > 0 ) { - 8035e82: 69fb ldr r3, [r7, #28] - 8035e84: 2b00 cmp r3, #0 - 8035e86: dd1d ble.n 8035ec4 + 8035f06: 69fb ldr r3, [r7, #28] + 8035f08: 2b00 cmp r3, #0 + 8035f0a: dd1d ble.n 8035f48 int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); - 8035e88: 6a3b ldr r3, [r7, #32] - 8035e8a: f003 021f and.w r2, r3, #31 - 8035e8e: 69fb ldr r3, [r7, #28] - 8035e90: 4413 add r3, r2 - 8035e92: 61bb str r3, [r7, #24] + 8035f0c: 6a3b ldr r3, [r7, #32] + 8035f0e: f003 021f and.w r2, r3, #31 + 8035f12: 69fb ldr r3, [r7, #28] + 8035f14: 4413 add r3, r2 + 8035f16: 61bb str r3, [r7, #24] uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - 8035e94: 6a3b ldr r3, [r7, #32] - 8035e96: 617b str r3, [r7, #20] + 8035f18: 6a3b ldr r3, [r7, #32] + 8035f1a: 617b str r3, [r7, #20] __ASM volatile ("dsb 0xF":::"memory"); - 8035e98: f3bf 8f4f dsb sy + 8035f1c: f3bf 8f4f dsb sy } - 8035e9c: bf00 nop + 8035f20: bf00 nop SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */ - 8035e9e: 4a0d ldr r2, [pc, #52] ; (8035ed4 ) - 8035ea0: 697b ldr r3, [r7, #20] - 8035ea2: f8c2 325c str.w r3, [r2, #604] ; 0x25c + 8035f22: 4a0d ldr r2, [pc, #52] ; (8035f58 ) + 8035f24: 697b ldr r3, [r7, #20] + 8035f26: f8c2 325c str.w r3, [r2, #604] ; 0x25c op_addr += __SCB_DCACHE_LINE_SIZE; - 8035ea6: 697b ldr r3, [r7, #20] - 8035ea8: 3320 adds r3, #32 - 8035eaa: 617b str r3, [r7, #20] + 8035f2a: 697b ldr r3, [r7, #20] + 8035f2c: 3320 adds r3, #32 + 8035f2e: 617b str r3, [r7, #20] op_size -= __SCB_DCACHE_LINE_SIZE; - 8035eac: 69bb ldr r3, [r7, #24] - 8035eae: 3b20 subs r3, #32 - 8035eb0: 61bb str r3, [r7, #24] + 8035f30: 69bb ldr r3, [r7, #24] + 8035f32: 3b20 subs r3, #32 + 8035f34: 61bb str r3, [r7, #24] } while ( op_size > 0 ); - 8035eb2: 69bb ldr r3, [r7, #24] - 8035eb4: 2b00 cmp r3, #0 - 8035eb6: dcf2 bgt.n 8035e9e + 8035f36: 69bb ldr r3, [r7, #24] + 8035f38: 2b00 cmp r3, #0 + 8035f3a: dcf2 bgt.n 8035f22 __ASM volatile ("dsb 0xF":::"memory"); - 8035eb8: f3bf 8f4f dsb sy + 8035f3c: f3bf 8f4f dsb sy } - 8035ebc: bf00 nop + 8035f40: bf00 nop __ASM volatile ("isb 0xF":::"memory"); - 8035ebe: f3bf 8f6f isb sy + 8035f42: f3bf 8f6f isb sy } - 8035ec2: bf00 nop + 8035f46: bf00 nop } - 8035ec4: bf00 nop + 8035f48: bf00 nop /* USER CODE END HAL ETH RxLinkCallback */ } - 8035ec6: bf00 nop - 8035ec8: 3734 adds r7, #52 ; 0x34 - 8035eca: 46bd mov sp, r7 - 8035ecc: f85d 7b04 ldr.w r7, [sp], #4 - 8035ed0: 4770 bx lr - 8035ed2: bf00 nop - 8035ed4: e000ed00 .word 0xe000ed00 + 8035f4a: bf00 nop + 8035f4c: 3734 adds r7, #52 ; 0x34 + 8035f4e: 46bd mov sp, r7 + 8035f50: f85d 7b04 ldr.w r7, [sp], #4 + 8035f54: 4770 bx lr + 8035f56: bf00 nop + 8035f58: e000ed00 .word 0xe000ed00 -08035ed8 : +08035f5c : * @param n u16_t in host byte order * @return n in network byte order */ u16_t lwip_htons(u16_t n) { - 8035ed8: b480 push {r7} - 8035eda: b083 sub sp, #12 - 8035edc: af00 add r7, sp, #0 - 8035ede: 4603 mov r3, r0 - 8035ee0: 80fb strh r3, [r7, #6] + 8035f5c: b480 push {r7} + 8035f5e: b083 sub sp, #12 + 8035f60: af00 add r7, sp, #0 + 8035f62: 4603 mov r3, r0 + 8035f64: 80fb strh r3, [r7, #6] return PP_HTONS(n); - 8035ee2: 88fb ldrh r3, [r7, #6] - 8035ee4: 021b lsls r3, r3, #8 - 8035ee6: b21a sxth r2, r3 - 8035ee8: 88fb ldrh r3, [r7, #6] - 8035eea: 0a1b lsrs r3, r3, #8 - 8035eec: b29b uxth r3, r3 - 8035eee: b21b sxth r3, r3 - 8035ef0: 4313 orrs r3, r2 - 8035ef2: b21b sxth r3, r3 - 8035ef4: b29b uxth r3, r3 -} - 8035ef6: 4618 mov r0, r3 - 8035ef8: 370c adds r7, #12 - 8035efa: 46bd mov sp, r7 - 8035efc: f85d 7b04 ldr.w r7, [sp], #4 - 8035f00: 4770 bx lr - -08035f02 : + 8035f66: 88fb ldrh r3, [r7, #6] + 8035f68: 021b lsls r3, r3, #8 + 8035f6a: b21a sxth r2, r3 + 8035f6c: 88fb ldrh r3, [r7, #6] + 8035f6e: 0a1b lsrs r3, r3, #8 + 8035f70: b29b uxth r3, r3 + 8035f72: b21b sxth r3, r3 + 8035f74: 4313 orrs r3, r2 + 8035f76: b21b sxth r3, r3 + 8035f78: b29b uxth r3, r3 +} + 8035f7a: 4618 mov r0, r3 + 8035f7c: 370c adds r7, #12 + 8035f7e: 46bd mov sp, r7 + 8035f80: f85d 7b04 ldr.w r7, [sp], #4 + 8035f84: 4770 bx lr + +08035f86 : * @param n u32_t in host byte order * @return n in network byte order */ u32_t lwip_htonl(u32_t n) { - 8035f02: b480 push {r7} - 8035f04: b083 sub sp, #12 - 8035f06: af00 add r7, sp, #0 - 8035f08: 6078 str r0, [r7, #4] + 8035f86: b480 push {r7} + 8035f88: b083 sub sp, #12 + 8035f8a: af00 add r7, sp, #0 + 8035f8c: 6078 str r0, [r7, #4] return PP_HTONL(n); - 8035f0a: 687b ldr r3, [r7, #4] - 8035f0c: 061a lsls r2, r3, #24 - 8035f0e: 687b ldr r3, [r7, #4] - 8035f10: 021b lsls r3, r3, #8 - 8035f12: f403 037f and.w r3, r3, #16711680 ; 0xff0000 - 8035f16: 431a orrs r2, r3 - 8035f18: 687b ldr r3, [r7, #4] - 8035f1a: 0a1b lsrs r3, r3, #8 - 8035f1c: f403 437f and.w r3, r3, #65280 ; 0xff00 - 8035f20: 431a orrs r2, r3 - 8035f22: 687b ldr r3, [r7, #4] - 8035f24: 0e1b lsrs r3, r3, #24 - 8035f26: 4313 orrs r3, r2 -} - 8035f28: 4618 mov r0, r3 - 8035f2a: 370c adds r7, #12 - 8035f2c: 46bd mov sp, r7 - 8035f2e: f85d 7b04 ldr.w r7, [sp], #4 - 8035f32: 4770 bx lr - -08035f34 : + 8035f8e: 687b ldr r3, [r7, #4] + 8035f90: 061a lsls r2, r3, #24 + 8035f92: 687b ldr r3, [r7, #4] + 8035f94: 021b lsls r3, r3, #8 + 8035f96: f403 037f and.w r3, r3, #16711680 ; 0xff0000 + 8035f9a: 431a orrs r2, r3 + 8035f9c: 687b ldr r3, [r7, #4] + 8035f9e: 0a1b lsrs r3, r3, #8 + 8035fa0: f403 437f and.w r3, r3, #65280 ; 0xff00 + 8035fa4: 431a orrs r2, r3 + 8035fa6: 687b ldr r3, [r7, #4] + 8035fa8: 0e1b lsrs r3, r3, #24 + 8035faa: 4313 orrs r3, r2 +} + 8035fac: 4618 mov r0, r3 + 8035fae: 370c adds r7, #12 + 8035fb0: 46bd mov sp, r7 + 8035fb2: f85d 7b04 ldr.w r7, [sp], #4 + 8035fb6: 4770 bx lr + +08035fb8 : * @param len length of data to be summed * @return host order (!) lwip checksum (non-inverted Internet sum) */ u16_t lwip_standard_chksum(const void *dataptr, int len) { - 8035f34: b480 push {r7} - 8035f36: b089 sub sp, #36 ; 0x24 - 8035f38: af00 add r7, sp, #0 - 8035f3a: 6078 str r0, [r7, #4] - 8035f3c: 6039 str r1, [r7, #0] + 8035fb8: b480 push {r7} + 8035fba: b089 sub sp, #36 ; 0x24 + 8035fbc: af00 add r7, sp, #0 + 8035fbe: 6078 str r0, [r7, #4] + 8035fc0: 6039 str r1, [r7, #0] const u8_t *pb = (const u8_t *)dataptr; - 8035f3e: 687b ldr r3, [r7, #4] - 8035f40: 61fb str r3, [r7, #28] + 8035fc2: 687b ldr r3, [r7, #4] + 8035fc4: 61fb str r3, [r7, #28] const u16_t *ps; u16_t t = 0; - 8035f42: 2300 movs r3, #0 - 8035f44: 81fb strh r3, [r7, #14] + 8035fc6: 2300 movs r3, #0 + 8035fc8: 81fb strh r3, [r7, #14] u32_t sum = 0; - 8035f46: 2300 movs r3, #0 - 8035f48: 617b str r3, [r7, #20] + 8035fca: 2300 movs r3, #0 + 8035fcc: 617b str r3, [r7, #20] int odd = ((mem_ptr_t)pb & 1); - 8035f4a: 69fb ldr r3, [r7, #28] - 8035f4c: f003 0301 and.w r3, r3, #1 - 8035f50: 613b str r3, [r7, #16] + 8035fce: 69fb ldr r3, [r7, #28] + 8035fd0: f003 0301 and.w r3, r3, #1 + 8035fd4: 613b str r3, [r7, #16] /* Get aligned to u16_t */ if (odd && len > 0) { - 8035f52: 693b ldr r3, [r7, #16] - 8035f54: 2b00 cmp r3, #0 - 8035f56: d00d beq.n 8035f74 - 8035f58: 683b ldr r3, [r7, #0] - 8035f5a: 2b00 cmp r3, #0 - 8035f5c: dd0a ble.n 8035f74 + 8035fd6: 693b ldr r3, [r7, #16] + 8035fd8: 2b00 cmp r3, #0 + 8035fda: d00d beq.n 8035ff8 + 8035fdc: 683b ldr r3, [r7, #0] + 8035fde: 2b00 cmp r3, #0 + 8035fe0: dd0a ble.n 8035ff8 ((u8_t *)&t)[1] = *pb++; - 8035f5e: 69fa ldr r2, [r7, #28] - 8035f60: 1c53 adds r3, r2, #1 - 8035f62: 61fb str r3, [r7, #28] - 8035f64: f107 030e add.w r3, r7, #14 - 8035f68: 3301 adds r3, #1 - 8035f6a: 7812 ldrb r2, [r2, #0] - 8035f6c: 701a strb r2, [r3, #0] + 8035fe2: 69fa ldr r2, [r7, #28] + 8035fe4: 1c53 adds r3, r2, #1 + 8035fe6: 61fb str r3, [r7, #28] + 8035fe8: f107 030e add.w r3, r7, #14 + 8035fec: 3301 adds r3, #1 + 8035fee: 7812 ldrb r2, [r2, #0] + 8035ff0: 701a strb r2, [r3, #0] len--; - 8035f6e: 683b ldr r3, [r7, #0] - 8035f70: 3b01 subs r3, #1 - 8035f72: 603b str r3, [r7, #0] + 8035ff2: 683b ldr r3, [r7, #0] + 8035ff4: 3b01 subs r3, #1 + 8035ff6: 603b str r3, [r7, #0] } /* Add the bulk of the data */ ps = (const u16_t *)(const void *)pb; - 8035f74: 69fb ldr r3, [r7, #28] - 8035f76: 61bb str r3, [r7, #24] + 8035ff8: 69fb ldr r3, [r7, #28] + 8035ffa: 61bb str r3, [r7, #24] while (len > 1) { - 8035f78: e00a b.n 8035f90 + 8035ffc: e00a b.n 8036014 sum += *ps++; - 8035f7a: 69bb ldr r3, [r7, #24] - 8035f7c: 1c9a adds r2, r3, #2 - 8035f7e: 61ba str r2, [r7, #24] - 8035f80: 881b ldrh r3, [r3, #0] - 8035f82: 461a mov r2, r3 - 8035f84: 697b ldr r3, [r7, #20] - 8035f86: 4413 add r3, r2 - 8035f88: 617b str r3, [r7, #20] + 8035ffe: 69bb ldr r3, [r7, #24] + 8036000: 1c9a adds r2, r3, #2 + 8036002: 61ba str r2, [r7, #24] + 8036004: 881b ldrh r3, [r3, #0] + 8036006: 461a mov r2, r3 + 8036008: 697b ldr r3, [r7, #20] + 803600a: 4413 add r3, r2 + 803600c: 617b str r3, [r7, #20] len -= 2; - 8035f8a: 683b ldr r3, [r7, #0] - 8035f8c: 3b02 subs r3, #2 - 8035f8e: 603b str r3, [r7, #0] + 803600e: 683b ldr r3, [r7, #0] + 8036010: 3b02 subs r3, #2 + 8036012: 603b str r3, [r7, #0] while (len > 1) { - 8035f90: 683b ldr r3, [r7, #0] - 8035f92: 2b01 cmp r3, #1 - 8035f94: dcf1 bgt.n 8035f7a + 8036014: 683b ldr r3, [r7, #0] + 8036016: 2b01 cmp r3, #1 + 8036018: dcf1 bgt.n 8035ffe } /* Consume left-over byte, if any */ if (len > 0) { - 8035f96: 683b ldr r3, [r7, #0] - 8035f98: 2b00 cmp r3, #0 - 8035f9a: dd04 ble.n 8035fa6 + 803601a: 683b ldr r3, [r7, #0] + 803601c: 2b00 cmp r3, #0 + 803601e: dd04 ble.n 803602a ((u8_t *)&t)[0] = *(const u8_t *)ps; - 8035f9c: f107 030e add.w r3, r7, #14 - 8035fa0: 69ba ldr r2, [r7, #24] - 8035fa2: 7812 ldrb r2, [r2, #0] - 8035fa4: 701a strb r2, [r3, #0] + 8036020: f107 030e add.w r3, r7, #14 + 8036024: 69ba ldr r2, [r7, #24] + 8036026: 7812 ldrb r2, [r2, #0] + 8036028: 701a strb r2, [r3, #0] } /* Add end bytes */ sum += t; - 8035fa6: 89fb ldrh r3, [r7, #14] - 8035fa8: 461a mov r2, r3 - 8035faa: 697b ldr r3, [r7, #20] - 8035fac: 4413 add r3, r2 - 8035fae: 617b str r3, [r7, #20] + 803602a: 89fb ldrh r3, [r7, #14] + 803602c: 461a mov r2, r3 + 803602e: 697b ldr r3, [r7, #20] + 8036030: 4413 add r3, r2 + 8036032: 617b str r3, [r7, #20] /* Fold 32-bit sum to 16 bits calling this twice is probably faster than if statements... */ sum = FOLD_U32T(sum); - 8035fb0: 697b ldr r3, [r7, #20] - 8035fb2: 0c1a lsrs r2, r3, #16 - 8035fb4: 697b ldr r3, [r7, #20] - 8035fb6: b29b uxth r3, r3 - 8035fb8: 4413 add r3, r2 - 8035fba: 617b str r3, [r7, #20] + 8036034: 697b ldr r3, [r7, #20] + 8036036: 0c1a lsrs r2, r3, #16 + 8036038: 697b ldr r3, [r7, #20] + 803603a: b29b uxth r3, r3 + 803603c: 4413 add r3, r2 + 803603e: 617b str r3, [r7, #20] sum = FOLD_U32T(sum); - 8035fbc: 697b ldr r3, [r7, #20] - 8035fbe: 0c1a lsrs r2, r3, #16 - 8035fc0: 697b ldr r3, [r7, #20] - 8035fc2: b29b uxth r3, r3 - 8035fc4: 4413 add r3, r2 - 8035fc6: 617b str r3, [r7, #20] + 8036040: 697b ldr r3, [r7, #20] + 8036042: 0c1a lsrs r2, r3, #16 + 8036044: 697b ldr r3, [r7, #20] + 8036046: b29b uxth r3, r3 + 8036048: 4413 add r3, r2 + 803604a: 617b str r3, [r7, #20] /* Swap if alignment was odd */ if (odd) { - 8035fc8: 693b ldr r3, [r7, #16] - 8035fca: 2b00 cmp r3, #0 - 8035fcc: d007 beq.n 8035fde + 803604c: 693b ldr r3, [r7, #16] + 803604e: 2b00 cmp r3, #0 + 8036050: d007 beq.n 8036062 sum = SWAP_BYTES_IN_WORD(sum); - 8035fce: 697b ldr r3, [r7, #20] - 8035fd0: 021b lsls r3, r3, #8 - 8035fd2: b29a uxth r2, r3 - 8035fd4: 697b ldr r3, [r7, #20] - 8035fd6: 0a1b lsrs r3, r3, #8 - 8035fd8: b2db uxtb r3, r3 - 8035fda: 4313 orrs r3, r2 - 8035fdc: 617b str r3, [r7, #20] + 8036052: 697b ldr r3, [r7, #20] + 8036054: 021b lsls r3, r3, #8 + 8036056: b29a uxth r2, r3 + 8036058: 697b ldr r3, [r7, #20] + 803605a: 0a1b lsrs r3, r3, #8 + 803605c: b2db uxtb r3, r3 + 803605e: 4313 orrs r3, r2 + 8036060: 617b str r3, [r7, #20] } return (u16_t)sum; - 8035fde: 697b ldr r3, [r7, #20] - 8035fe0: b29b uxth r3, r3 + 8036062: 697b ldr r3, [r7, #20] + 8036064: b29b uxth r3, r3 } - 8035fe2: 4618 mov r0, r3 - 8035fe4: 3724 adds r7, #36 ; 0x24 - 8035fe6: 46bd mov sp, r7 - 8035fe8: f85d 7b04 ldr.w r7, [sp], #4 - 8035fec: 4770 bx lr + 8036066: 4618 mov r0, r3 + 8036068: 3724 adds r7, #36 ; 0x24 + 803606a: 46bd mov sp, r7 + 803606c: f85d 7b04 ldr.w r7, [sp], #4 + 8036070: 4770 bx lr -08035fee : +08036072 : * @return checksum (as u16_t) to be saved directly in the protocol header */ u16_t inet_chksum(const void *dataptr, u16_t len) { - 8035fee: b580 push {r7, lr} - 8035ff0: b082 sub sp, #8 - 8035ff2: af00 add r7, sp, #0 - 8035ff4: 6078 str r0, [r7, #4] - 8035ff6: 460b mov r3, r1 - 8035ff8: 807b strh r3, [r7, #2] + 8036072: b580 push {r7, lr} + 8036074: b082 sub sp, #8 + 8036076: af00 add r7, sp, #0 + 8036078: 6078 str r0, [r7, #4] + 803607a: 460b mov r3, r1 + 803607c: 807b strh r3, [r7, #2] return (u16_t)~(unsigned int)LWIP_CHKSUM(dataptr, len); - 8035ffa: 887b ldrh r3, [r7, #2] - 8035ffc: 4619 mov r1, r3 - 8035ffe: 6878 ldr r0, [r7, #4] - 8036000: f7ff ff98 bl 8035f34 - 8036004: 4603 mov r3, r0 - 8036006: 43db mvns r3, r3 - 8036008: b29b uxth r3, r3 -} - 803600a: 4618 mov r0, r3 - 803600c: 3708 adds r7, #8 - 803600e: 46bd mov sp, r7 - 8036010: bd80 pop {r7, pc} - -08036012 : + 803607e: 887b ldrh r3, [r7, #2] + 8036080: 4619 mov r1, r3 + 8036082: 6878 ldr r0, [r7, #4] + 8036084: f7ff ff98 bl 8035fb8 + 8036088: 4603 mov r3, r0 + 803608a: 43db mvns r3, r3 + 803608c: b29b uxth r3, r3 +} + 803608e: 4618 mov r0, r3 + 8036090: 3708 adds r7, #8 + 8036092: 46bd mov sp, r7 + 8036094: bd80 pop {r7, pc} + +08036096 : * @param p pbuf chain over that the checksum should be calculated * @return checksum (as u16_t) to be saved directly in the protocol header */ u16_t inet_chksum_pbuf(struct pbuf *p) { - 8036012: b580 push {r7, lr} - 8036014: b086 sub sp, #24 - 8036016: af00 add r7, sp, #0 - 8036018: 6078 str r0, [r7, #4] + 8036096: b580 push {r7, lr} + 8036098: b086 sub sp, #24 + 803609a: af00 add r7, sp, #0 + 803609c: 6078 str r0, [r7, #4] u32_t acc; struct pbuf *q; int swapped = 0; - 803601a: 2300 movs r3, #0 - 803601c: 60fb str r3, [r7, #12] + 803609e: 2300 movs r3, #0 + 80360a0: 60fb str r3, [r7, #12] acc = 0; - 803601e: 2300 movs r3, #0 - 8036020: 617b str r3, [r7, #20] + 80360a2: 2300 movs r3, #0 + 80360a4: 617b str r3, [r7, #20] for (q = p; q != NULL; q = q->next) { - 8036022: 687b ldr r3, [r7, #4] - 8036024: 613b str r3, [r7, #16] - 8036026: e02b b.n 8036080 + 80360a6: 687b ldr r3, [r7, #4] + 80360a8: 613b str r3, [r7, #16] + 80360aa: e02b b.n 8036104 acc += LWIP_CHKSUM(q->payload, q->len); - 8036028: 693b ldr r3, [r7, #16] - 803602a: 685a ldr r2, [r3, #4] - 803602c: 693b ldr r3, [r7, #16] - 803602e: 895b ldrh r3, [r3, #10] - 8036030: 4619 mov r1, r3 - 8036032: 4610 mov r0, r2 - 8036034: f7ff ff7e bl 8035f34 - 8036038: 4603 mov r3, r0 - 803603a: 461a mov r2, r3 - 803603c: 697b ldr r3, [r7, #20] - 803603e: 4413 add r3, r2 - 8036040: 617b str r3, [r7, #20] + 80360ac: 693b ldr r3, [r7, #16] + 80360ae: 685a ldr r2, [r3, #4] + 80360b0: 693b ldr r3, [r7, #16] + 80360b2: 895b ldrh r3, [r3, #10] + 80360b4: 4619 mov r1, r3 + 80360b6: 4610 mov r0, r2 + 80360b8: f7ff ff7e bl 8035fb8 + 80360bc: 4603 mov r3, r0 + 80360be: 461a mov r2, r3 + 80360c0: 697b ldr r3, [r7, #20] + 80360c2: 4413 add r3, r2 + 80360c4: 617b str r3, [r7, #20] acc = FOLD_U32T(acc); - 8036042: 697b ldr r3, [r7, #20] - 8036044: 0c1a lsrs r2, r3, #16 - 8036046: 697b ldr r3, [r7, #20] - 8036048: b29b uxth r3, r3 - 803604a: 4413 add r3, r2 - 803604c: 617b str r3, [r7, #20] + 80360c6: 697b ldr r3, [r7, #20] + 80360c8: 0c1a lsrs r2, r3, #16 + 80360ca: 697b ldr r3, [r7, #20] + 80360cc: b29b uxth r3, r3 + 80360ce: 4413 add r3, r2 + 80360d0: 617b str r3, [r7, #20] if (q->len % 2 != 0) { - 803604e: 693b ldr r3, [r7, #16] - 8036050: 895b ldrh r3, [r3, #10] - 8036052: f003 0301 and.w r3, r3, #1 - 8036056: b29b uxth r3, r3 - 8036058: 2b00 cmp r3, #0 - 803605a: d00e beq.n 803607a + 80360d2: 693b ldr r3, [r7, #16] + 80360d4: 895b ldrh r3, [r3, #10] + 80360d6: f003 0301 and.w r3, r3, #1 + 80360da: b29b uxth r3, r3 + 80360dc: 2b00 cmp r3, #0 + 80360de: d00e beq.n 80360fe swapped = !swapped; - 803605c: 68fb ldr r3, [r7, #12] - 803605e: 2b00 cmp r3, #0 - 8036060: bf0c ite eq - 8036062: 2301 moveq r3, #1 - 8036064: 2300 movne r3, #0 - 8036066: b2db uxtb r3, r3 - 8036068: 60fb str r3, [r7, #12] + 80360e0: 68fb ldr r3, [r7, #12] + 80360e2: 2b00 cmp r3, #0 + 80360e4: bf0c ite eq + 80360e6: 2301 moveq r3, #1 + 80360e8: 2300 movne r3, #0 + 80360ea: b2db uxtb r3, r3 + 80360ec: 60fb str r3, [r7, #12] acc = SWAP_BYTES_IN_WORD(acc); - 803606a: 697b ldr r3, [r7, #20] - 803606c: 021b lsls r3, r3, #8 - 803606e: b29a uxth r2, r3 - 8036070: 697b ldr r3, [r7, #20] - 8036072: 0a1b lsrs r3, r3, #8 - 8036074: b2db uxtb r3, r3 - 8036076: 4313 orrs r3, r2 - 8036078: 617b str r3, [r7, #20] + 80360ee: 697b ldr r3, [r7, #20] + 80360f0: 021b lsls r3, r3, #8 + 80360f2: b29a uxth r2, r3 + 80360f4: 697b ldr r3, [r7, #20] + 80360f6: 0a1b lsrs r3, r3, #8 + 80360f8: b2db uxtb r3, r3 + 80360fa: 4313 orrs r3, r2 + 80360fc: 617b str r3, [r7, #20] for (q = p; q != NULL; q = q->next) { - 803607a: 693b ldr r3, [r7, #16] - 803607c: 681b ldr r3, [r3, #0] - 803607e: 613b str r3, [r7, #16] - 8036080: 693b ldr r3, [r7, #16] - 8036082: 2b00 cmp r3, #0 - 8036084: d1d0 bne.n 8036028 + 80360fe: 693b ldr r3, [r7, #16] + 8036100: 681b ldr r3, [r3, #0] + 8036102: 613b str r3, [r7, #16] + 8036104: 693b ldr r3, [r7, #16] + 8036106: 2b00 cmp r3, #0 + 8036108: d1d0 bne.n 80360ac } } if (swapped) { - 8036086: 68fb ldr r3, [r7, #12] - 8036088: 2b00 cmp r3, #0 - 803608a: d007 beq.n 803609c + 803610a: 68fb ldr r3, [r7, #12] + 803610c: 2b00 cmp r3, #0 + 803610e: d007 beq.n 8036120 acc = SWAP_BYTES_IN_WORD(acc); - 803608c: 697b ldr r3, [r7, #20] - 803608e: 021b lsls r3, r3, #8 - 8036090: b29a uxth r2, r3 - 8036092: 697b ldr r3, [r7, #20] - 8036094: 0a1b lsrs r3, r3, #8 - 8036096: b2db uxtb r3, r3 - 8036098: 4313 orrs r3, r2 - 803609a: 617b str r3, [r7, #20] + 8036110: 697b ldr r3, [r7, #20] + 8036112: 021b lsls r3, r3, #8 + 8036114: b29a uxth r2, r3 + 8036116: 697b ldr r3, [r7, #20] + 8036118: 0a1b lsrs r3, r3, #8 + 803611a: b2db uxtb r3, r3 + 803611c: 4313 orrs r3, r2 + 803611e: 617b str r3, [r7, #20] } return (u16_t)~(acc & 0xffffUL); - 803609c: 697b ldr r3, [r7, #20] - 803609e: b29b uxth r3, r3 - 80360a0: 43db mvns r3, r3 - 80360a2: b29b uxth r3, r3 + 8036120: 697b ldr r3, [r7, #20] + 8036122: b29b uxth r3, r3 + 8036124: 43db mvns r3, r3 + 8036126: b29b uxth r3, r3 } - 80360a4: 4618 mov r0, r3 - 80360a6: 3718 adds r7, #24 - 80360a8: 46bd mov sp, r7 - 80360aa: bd80 pop {r7, pc} + 8036128: 4618 mov r0, r3 + 803612a: 3718 adds r7, #24 + 803612c: 46bd mov sp, r7 + 803612e: bd80 pop {r7, pc} -080360ac : +08036130 : * Initialize all modules. * Use this in NO_SYS mode. Use tcpip_init() otherwise. */ void lwip_init(void) { - 80360ac: b580 push {r7, lr} - 80360ae: b082 sub sp, #8 - 80360b0: af00 add r7, sp, #0 + 8036130: b580 push {r7, lr} + 8036132: b082 sub sp, #8 + 8036134: af00 add r7, sp, #0 #ifndef LWIP_SKIP_CONST_CHECK int a = 0; - 80360b2: 2300 movs r3, #0 - 80360b4: 607b str r3, [r7, #4] + 8036136: 2300 movs r3, #0 + 8036138: 607b str r3, [r7, #4] /* Modules initialization */ stats_init(); #if !NO_SYS sys_init(); #endif /* !NO_SYS */ mem_init(); - 80360b6: f000 f8d5 bl 8036264 + 803613a: f000 f8d5 bl 80362e8 memp_init(); - 80360ba: f000 fbd7 bl 803686c + 803613e: f000 fbd7 bl 80368f0 pbuf_init(); netif_init(); - 80360be: f000 fcd5 bl 8036a6c + 8036142: f000 fcd5 bl 8036af0 #endif /* LWIP_IPV4 */ #if LWIP_RAW raw_init(); #endif /* LWIP_RAW */ #if LWIP_UDP udp_init(); - 80360c2: f007 ff2b bl 803df1c + 8036146: f007 ff2b bl 803dfa0 #endif /* LWIP_UDP */ #if LWIP_TCP tcp_init(); - 80360c6: f001 fdc7 bl 8037c58 + 803614a: f001 fdc7 bl 8037cdc #if PPP_SUPPORT ppp_init(); #endif #if LWIP_TIMERS sys_timeouts_init(); - 80360ca: f007 fe9d bl 803de08 + 803614e: f007 fe9d bl 803de8c #endif /* LWIP_TIMERS */ } - 80360ce: bf00 nop - 80360d0: 3708 adds r7, #8 - 80360d2: 46bd mov sp, r7 - 80360d4: bd80 pop {r7, pc} + 8036152: bf00 nop + 8036154: 3708 adds r7, #8 + 8036156: 46bd mov sp, r7 + 8036158: bd80 pop {r7, pc} ... -080360d8 : +0803615c : #define mem_overflow_check_element(mem) #endif /* MEM_OVERFLOW_CHECK */ static struct mem * ptr_to_mem(mem_size_t ptr) { - 80360d8: b480 push {r7} - 80360da: b083 sub sp, #12 - 80360dc: af00 add r7, sp, #0 - 80360de: 4603 mov r3, r0 - 80360e0: 80fb strh r3, [r7, #6] + 803615c: b480 push {r7} + 803615e: b083 sub sp, #12 + 8036160: af00 add r7, sp, #0 + 8036162: 4603 mov r3, r0 + 8036164: 80fb strh r3, [r7, #6] return (struct mem *)(void *)&ram[ptr]; - 80360e2: 4b05 ldr r3, [pc, #20] ; (80360f8 ) - 80360e4: 681a ldr r2, [r3, #0] - 80360e6: 88fb ldrh r3, [r7, #6] - 80360e8: 4413 add r3, r2 + 8036166: 4b05 ldr r3, [pc, #20] ; (803617c ) + 8036168: 681a ldr r2, [r3, #0] + 803616a: 88fb ldrh r3, [r7, #6] + 803616c: 4413 add r3, r2 } - 80360ea: 4618 mov r0, r3 - 80360ec: 370c adds r7, #12 - 80360ee: 46bd mov sp, r7 - 80360f0: f85d 7b04 ldr.w r7, [sp], #4 - 80360f4: 4770 bx lr - 80360f6: bf00 nop - 80360f8: 2400b9d4 .word 0x2400b9d4 + 803616e: 4618 mov r0, r3 + 8036170: 370c adds r7, #12 + 8036172: 46bd mov sp, r7 + 8036174: f85d 7b04 ldr.w r7, [sp], #4 + 8036178: 4770 bx lr + 803617a: bf00 nop + 803617c: 2400b9dc .word 0x2400b9dc -080360fc : +08036180 : static mem_size_t mem_to_ptr(void *mem) { - 80360fc: b480 push {r7} - 80360fe: b083 sub sp, #12 - 8036100: af00 add r7, sp, #0 - 8036102: 6078 str r0, [r7, #4] + 8036180: b480 push {r7} + 8036182: b083 sub sp, #12 + 8036184: af00 add r7, sp, #0 + 8036186: 6078 str r0, [r7, #4] return (mem_size_t)((u8_t *)mem - ram); - 8036104: 4b05 ldr r3, [pc, #20] ; (803611c ) - 8036106: 681b ldr r3, [r3, #0] - 8036108: 687a ldr r2, [r7, #4] - 803610a: 1ad3 subs r3, r2, r3 - 803610c: b29b uxth r3, r3 -} - 803610e: 4618 mov r0, r3 - 8036110: 370c adds r7, #12 - 8036112: 46bd mov sp, r7 - 8036114: f85d 7b04 ldr.w r7, [sp], #4 - 8036118: 4770 bx lr - 803611a: bf00 nop - 803611c: 2400b9d4 .word 0x2400b9d4 - -08036120 : + 8036188: 4b05 ldr r3, [pc, #20] ; (80361a0 ) + 803618a: 681b ldr r3, [r3, #0] + 803618c: 687a ldr r2, [r7, #4] + 803618e: 1ad3 subs r3, r2, r3 + 8036190: b29b uxth r3, r3 +} + 8036192: 4618 mov r0, r3 + 8036194: 370c adds r7, #12 + 8036196: 46bd mov sp, r7 + 8036198: f85d 7b04 ldr.w r7, [sp], #4 + 803619c: 4770 bx lr + 803619e: bf00 nop + 80361a0: 2400b9dc .word 0x2400b9dc + +080361a4 : * This assumes access to the heap is protected by the calling function * already. */ static void plug_holes(struct mem *mem) { - 8036120: b590 push {r4, r7, lr} - 8036122: b085 sub sp, #20 - 8036124: af00 add r7, sp, #0 - 8036126: 6078 str r0, [r7, #4] + 80361a4: b590 push {r4, r7, lr} + 80361a6: b085 sub sp, #20 + 80361a8: af00 add r7, sp, #0 + 80361aa: 6078 str r0, [r7, #4] struct mem *nmem; struct mem *pmem; LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); - 8036128: 4b45 ldr r3, [pc, #276] ; (8036240 ) - 803612a: 681b ldr r3, [r3, #0] - 803612c: 687a ldr r2, [r7, #4] - 803612e: 429a cmp r2, r3 - 8036130: d206 bcs.n 8036140 - 8036132: 4b44 ldr r3, [pc, #272] ; (8036244 ) - 8036134: f240 12df movw r2, #479 ; 0x1df - 8036138: 4943 ldr r1, [pc, #268] ; (8036248 ) - 803613a: 4844 ldr r0, [pc, #272] ; (803624c ) - 803613c: f00a fce8 bl 8040b10 + 80361ac: 4b45 ldr r3, [pc, #276] ; (80362c4 ) + 80361ae: 681b ldr r3, [r3, #0] + 80361b0: 687a ldr r2, [r7, #4] + 80361b2: 429a cmp r2, r3 + 80361b4: d206 bcs.n 80361c4 + 80361b6: 4b44 ldr r3, [pc, #272] ; (80362c8 ) + 80361b8: f240 12df movw r2, #479 ; 0x1df + 80361bc: 4943 ldr r1, [pc, #268] ; (80362cc ) + 80361be: 4844 ldr r0, [pc, #272] ; (80362d0 ) + 80361c0: f00a fce8 bl 8040b94 LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end); - 8036140: 4b43 ldr r3, [pc, #268] ; (8036250 ) - 8036142: 681b ldr r3, [r3, #0] - 8036144: 687a ldr r2, [r7, #4] - 8036146: 429a cmp r2, r3 - 8036148: d306 bcc.n 8036158 - 803614a: 4b3e ldr r3, [pc, #248] ; (8036244 ) - 803614c: f44f 72f0 mov.w r2, #480 ; 0x1e0 - 8036150: 4940 ldr r1, [pc, #256] ; (8036254 ) - 8036152: 483e ldr r0, [pc, #248] ; (803624c ) - 8036154: f00a fcdc bl 8040b10 + 80361c4: 4b43 ldr r3, [pc, #268] ; (80362d4 ) + 80361c6: 681b ldr r3, [r3, #0] + 80361c8: 687a ldr r2, [r7, #4] + 80361ca: 429a cmp r2, r3 + 80361cc: d306 bcc.n 80361dc + 80361ce: 4b3e ldr r3, [pc, #248] ; (80362c8 ) + 80361d0: f44f 72f0 mov.w r2, #480 ; 0x1e0 + 80361d4: 4940 ldr r1, [pc, #256] ; (80362d8 ) + 80361d6: 483e ldr r0, [pc, #248] ; (80362d0 ) + 80361d8: f00a fcdc bl 8040b94 LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0); - 8036158: 687b ldr r3, [r7, #4] - 803615a: 791b ldrb r3, [r3, #4] - 803615c: 2b00 cmp r3, #0 - 803615e: d006 beq.n 803616e - 8036160: 4b38 ldr r3, [pc, #224] ; (8036244 ) - 8036162: f240 12e1 movw r2, #481 ; 0x1e1 - 8036166: 493c ldr r1, [pc, #240] ; (8036258 ) - 8036168: 4838 ldr r0, [pc, #224] ; (803624c ) - 803616a: f00a fcd1 bl 8040b10 + 80361dc: 687b ldr r3, [r7, #4] + 80361de: 791b ldrb r3, [r3, #4] + 80361e0: 2b00 cmp r3, #0 + 80361e2: d006 beq.n 80361f2 + 80361e4: 4b38 ldr r3, [pc, #224] ; (80362c8 ) + 80361e6: f240 12e1 movw r2, #481 ; 0x1e1 + 80361ea: 493c ldr r1, [pc, #240] ; (80362dc ) + 80361ec: 4838 ldr r0, [pc, #224] ; (80362d0 ) + 80361ee: f00a fcd1 bl 8040b94 /* plug hole forward */ LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED); - 803616e: 687b ldr r3, [r7, #4] - 8036170: 881b ldrh r3, [r3, #0] - 8036172: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036176: d906 bls.n 8036186 - 8036178: 4b32 ldr r3, [pc, #200] ; (8036244 ) - 803617a: f44f 72f2 mov.w r2, #484 ; 0x1e4 - 803617e: 4937 ldr r1, [pc, #220] ; (803625c ) - 8036180: 4832 ldr r0, [pc, #200] ; (803624c ) - 8036182: f00a fcc5 bl 8040b10 + 80361f2: 687b ldr r3, [r7, #4] + 80361f4: 881b ldrh r3, [r3, #0] + 80361f6: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80361fa: d906 bls.n 803620a + 80361fc: 4b32 ldr r3, [pc, #200] ; (80362c8 ) + 80361fe: f44f 72f2 mov.w r2, #484 ; 0x1e4 + 8036202: 4937 ldr r1, [pc, #220] ; (80362e0 ) + 8036204: 4832 ldr r0, [pc, #200] ; (80362d0 ) + 8036206: f00a fcc5 bl 8040b94 nmem = ptr_to_mem(mem->next); - 8036186: 687b ldr r3, [r7, #4] - 8036188: 881b ldrh r3, [r3, #0] - 803618a: 4618 mov r0, r3 - 803618c: f7ff ffa4 bl 80360d8 - 8036190: 60f8 str r0, [r7, #12] + 803620a: 687b ldr r3, [r7, #4] + 803620c: 881b ldrh r3, [r3, #0] + 803620e: 4618 mov r0, r3 + 8036210: f7ff ffa4 bl 803615c + 8036214: 60f8 str r0, [r7, #12] if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) { - 8036192: 687a ldr r2, [r7, #4] - 8036194: 68fb ldr r3, [r7, #12] - 8036196: 429a cmp r2, r3 - 8036198: d024 beq.n 80361e4 - 803619a: 68fb ldr r3, [r7, #12] - 803619c: 791b ldrb r3, [r3, #4] - 803619e: 2b00 cmp r3, #0 - 80361a0: d120 bne.n 80361e4 - 80361a2: 4b2b ldr r3, [pc, #172] ; (8036250 ) - 80361a4: 681b ldr r3, [r3, #0] - 80361a6: 68fa ldr r2, [r7, #12] - 80361a8: 429a cmp r2, r3 - 80361aa: d01b beq.n 80361e4 + 8036216: 687a ldr r2, [r7, #4] + 8036218: 68fb ldr r3, [r7, #12] + 803621a: 429a cmp r2, r3 + 803621c: d024 beq.n 8036268 + 803621e: 68fb ldr r3, [r7, #12] + 8036220: 791b ldrb r3, [r3, #4] + 8036222: 2b00 cmp r3, #0 + 8036224: d120 bne.n 8036268 + 8036226: 4b2b ldr r3, [pc, #172] ; (80362d4 ) + 8036228: 681b ldr r3, [r3, #0] + 803622a: 68fa ldr r2, [r7, #12] + 803622c: 429a cmp r2, r3 + 803622e: d01b beq.n 8036268 /* if mem->next is unused and not end of ram, combine mem and mem->next */ if (lfree == nmem) { - 80361ac: 4b2c ldr r3, [pc, #176] ; (8036260 ) - 80361ae: 681b ldr r3, [r3, #0] - 80361b0: 68fa ldr r2, [r7, #12] - 80361b2: 429a cmp r2, r3 - 80361b4: d102 bne.n 80361bc + 8036230: 4b2c ldr r3, [pc, #176] ; (80362e4 ) + 8036232: 681b ldr r3, [r3, #0] + 8036234: 68fa ldr r2, [r7, #12] + 8036236: 429a cmp r2, r3 + 8036238: d102 bne.n 8036240 lfree = mem; - 80361b6: 4a2a ldr r2, [pc, #168] ; (8036260 ) - 80361b8: 687b ldr r3, [r7, #4] - 80361ba: 6013 str r3, [r2, #0] + 803623a: 4a2a ldr r2, [pc, #168] ; (80362e4 ) + 803623c: 687b ldr r3, [r7, #4] + 803623e: 6013 str r3, [r2, #0] } mem->next = nmem->next; - 80361bc: 68fb ldr r3, [r7, #12] - 80361be: 881a ldrh r2, [r3, #0] - 80361c0: 687b ldr r3, [r7, #4] - 80361c2: 801a strh r2, [r3, #0] + 8036240: 68fb ldr r3, [r7, #12] + 8036242: 881a ldrh r2, [r3, #0] + 8036244: 687b ldr r3, [r7, #4] + 8036246: 801a strh r2, [r3, #0] if (nmem->next != MEM_SIZE_ALIGNED) { - 80361c4: 68fb ldr r3, [r7, #12] - 80361c6: 881b ldrh r3, [r3, #0] - 80361c8: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80361cc: d00a beq.n 80361e4 + 8036248: 68fb ldr r3, [r7, #12] + 803624a: 881b ldrh r3, [r3, #0] + 803624c: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036250: d00a beq.n 8036268 ptr_to_mem(nmem->next)->prev = mem_to_ptr(mem); - 80361ce: 68fb ldr r3, [r7, #12] - 80361d0: 881b ldrh r3, [r3, #0] - 80361d2: 4618 mov r0, r3 - 80361d4: f7ff ff80 bl 80360d8 - 80361d8: 4604 mov r4, r0 - 80361da: 6878 ldr r0, [r7, #4] - 80361dc: f7ff ff8e bl 80360fc - 80361e0: 4603 mov r3, r0 - 80361e2: 8063 strh r3, [r4, #2] + 8036252: 68fb ldr r3, [r7, #12] + 8036254: 881b ldrh r3, [r3, #0] + 8036256: 4618 mov r0, r3 + 8036258: f7ff ff80 bl 803615c + 803625c: 4604 mov r4, r0 + 803625e: 6878 ldr r0, [r7, #4] + 8036260: f7ff ff8e bl 8036180 + 8036264: 4603 mov r3, r0 + 8036266: 8063 strh r3, [r4, #2] } } /* plug hole backward */ pmem = ptr_to_mem(mem->prev); - 80361e4: 687b ldr r3, [r7, #4] - 80361e6: 885b ldrh r3, [r3, #2] - 80361e8: 4618 mov r0, r3 - 80361ea: f7ff ff75 bl 80360d8 - 80361ee: 60b8 str r0, [r7, #8] + 8036268: 687b ldr r3, [r7, #4] + 803626a: 885b ldrh r3, [r3, #2] + 803626c: 4618 mov r0, r3 + 803626e: f7ff ff75 bl 803615c + 8036272: 60b8 str r0, [r7, #8] if (pmem != mem && pmem->used == 0) { - 80361f0: 68ba ldr r2, [r7, #8] - 80361f2: 687b ldr r3, [r7, #4] - 80361f4: 429a cmp r2, r3 - 80361f6: d01f beq.n 8036238 - 80361f8: 68bb ldr r3, [r7, #8] - 80361fa: 791b ldrb r3, [r3, #4] - 80361fc: 2b00 cmp r3, #0 - 80361fe: d11b bne.n 8036238 + 8036274: 68ba ldr r2, [r7, #8] + 8036276: 687b ldr r3, [r7, #4] + 8036278: 429a cmp r2, r3 + 803627a: d01f beq.n 80362bc + 803627c: 68bb ldr r3, [r7, #8] + 803627e: 791b ldrb r3, [r3, #4] + 8036280: 2b00 cmp r3, #0 + 8036282: d11b bne.n 80362bc /* if mem->prev is unused, combine mem and mem->prev */ if (lfree == mem) { - 8036200: 4b17 ldr r3, [pc, #92] ; (8036260 ) - 8036202: 681b ldr r3, [r3, #0] - 8036204: 687a ldr r2, [r7, #4] - 8036206: 429a cmp r2, r3 - 8036208: d102 bne.n 8036210 + 8036284: 4b17 ldr r3, [pc, #92] ; (80362e4 ) + 8036286: 681b ldr r3, [r3, #0] + 8036288: 687a ldr r2, [r7, #4] + 803628a: 429a cmp r2, r3 + 803628c: d102 bne.n 8036294 lfree = pmem; - 803620a: 4a15 ldr r2, [pc, #84] ; (8036260 ) - 803620c: 68bb ldr r3, [r7, #8] - 803620e: 6013 str r3, [r2, #0] + 803628e: 4a15 ldr r2, [pc, #84] ; (80362e4 ) + 8036290: 68bb ldr r3, [r7, #8] + 8036292: 6013 str r3, [r2, #0] } pmem->next = mem->next; - 8036210: 687b ldr r3, [r7, #4] - 8036212: 881a ldrh r2, [r3, #0] - 8036214: 68bb ldr r3, [r7, #8] - 8036216: 801a strh r2, [r3, #0] + 8036294: 687b ldr r3, [r7, #4] + 8036296: 881a ldrh r2, [r3, #0] + 8036298: 68bb ldr r3, [r7, #8] + 803629a: 801a strh r2, [r3, #0] if (mem->next != MEM_SIZE_ALIGNED) { - 8036218: 687b ldr r3, [r7, #4] - 803621a: 881b ldrh r3, [r3, #0] - 803621c: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036220: d00a beq.n 8036238 + 803629c: 687b ldr r3, [r7, #4] + 803629e: 881b ldrh r3, [r3, #0] + 80362a0: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80362a4: d00a beq.n 80362bc ptr_to_mem(mem->next)->prev = mem_to_ptr(pmem); - 8036222: 687b ldr r3, [r7, #4] - 8036224: 881b ldrh r3, [r3, #0] - 8036226: 4618 mov r0, r3 - 8036228: f7ff ff56 bl 80360d8 - 803622c: 4604 mov r4, r0 - 803622e: 68b8 ldr r0, [r7, #8] - 8036230: f7ff ff64 bl 80360fc - 8036234: 4603 mov r3, r0 - 8036236: 8063 strh r3, [r4, #2] + 80362a6: 687b ldr r3, [r7, #4] + 80362a8: 881b ldrh r3, [r3, #0] + 80362aa: 4618 mov r0, r3 + 80362ac: f7ff ff56 bl 803615c + 80362b0: 4604 mov r4, r0 + 80362b2: 68b8 ldr r0, [r7, #8] + 80362b4: f7ff ff64 bl 8036180 + 80362b8: 4603 mov r3, r0 + 80362ba: 8063 strh r3, [r4, #2] } } } - 8036238: bf00 nop - 803623a: 3714 adds r7, #20 - 803623c: 46bd mov sp, r7 - 803623e: bd90 pop {r4, r7, pc} - 8036240: 2400b9d4 .word 0x2400b9d4 - 8036244: 08042320 .word 0x08042320 - 8036248: 08042350 .word 0x08042350 - 803624c: 08042368 .word 0x08042368 - 8036250: 2400b9d8 .word 0x2400b9d8 - 8036254: 08042390 .word 0x08042390 - 8036258: 080423ac .word 0x080423ac - 803625c: 080423c8 .word 0x080423c8 - 8036260: 2400b9dc .word 0x2400b9dc - -08036264 : + 80362bc: bf00 nop + 80362be: 3714 adds r7, #20 + 80362c0: 46bd mov sp, r7 + 80362c2: bd90 pop {r4, r7, pc} + 80362c4: 2400b9dc .word 0x2400b9dc + 80362c8: 080423a0 .word 0x080423a0 + 80362cc: 080423d0 .word 0x080423d0 + 80362d0: 080423e8 .word 0x080423e8 + 80362d4: 2400b9e0 .word 0x2400b9e0 + 80362d8: 08042410 .word 0x08042410 + 80362dc: 0804242c .word 0x0804242c + 80362e0: 08042448 .word 0x08042448 + 80362e4: 2400b9e4 .word 0x2400b9e4 + +080362e8 : /** * Zero the heap and initialize start, end and lowest-free */ void mem_init(void) { - 8036264: b580 push {r7, lr} - 8036266: b082 sub sp, #8 - 8036268: af00 add r7, sp, #0 + 80362e8: b580 push {r7, lr} + 80362ea: b082 sub sp, #8 + 80362ec: af00 add r7, sp, #0 LWIP_ASSERT("Sanity check alignment", (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT - 1)) == 0); /* align the heap */ ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER); - 803626a: 4b16 ldr r3, [pc, #88] ; (80362c4 ) - 803626c: 4a16 ldr r2, [pc, #88] ; (80362c8 ) - 803626e: 601a str r2, [r3, #0] + 80362ee: 4b16 ldr r3, [pc, #88] ; (8036348 ) + 80362f0: 4a16 ldr r2, [pc, #88] ; (803634c ) + 80362f2: 601a str r2, [r3, #0] /* initialize the start of the heap */ mem = (struct mem *)(void *)ram; - 8036270: 4b14 ldr r3, [pc, #80] ; (80362c4 ) - 8036272: 681b ldr r3, [r3, #0] - 8036274: 607b str r3, [r7, #4] + 80362f4: 4b14 ldr r3, [pc, #80] ; (8036348 ) + 80362f6: 681b ldr r3, [r3, #0] + 80362f8: 607b str r3, [r7, #4] mem->next = MEM_SIZE_ALIGNED; - 8036276: 687b ldr r3, [r7, #4] - 8036278: f44f 62c8 mov.w r2, #1600 ; 0x640 - 803627c: 801a strh r2, [r3, #0] + 80362fa: 687b ldr r3, [r7, #4] + 80362fc: f44f 62c8 mov.w r2, #1600 ; 0x640 + 8036300: 801a strh r2, [r3, #0] mem->prev = 0; - 803627e: 687b ldr r3, [r7, #4] - 8036280: 2200 movs r2, #0 - 8036282: 805a strh r2, [r3, #2] + 8036302: 687b ldr r3, [r7, #4] + 8036304: 2200 movs r2, #0 + 8036306: 805a strh r2, [r3, #2] mem->used = 0; - 8036284: 687b ldr r3, [r7, #4] - 8036286: 2200 movs r2, #0 - 8036288: 711a strb r2, [r3, #4] + 8036308: 687b ldr r3, [r7, #4] + 803630a: 2200 movs r2, #0 + 803630c: 711a strb r2, [r3, #4] /* initialize the end of the heap */ ram_end = ptr_to_mem(MEM_SIZE_ALIGNED); - 803628a: f44f 60c8 mov.w r0, #1600 ; 0x640 - 803628e: f7ff ff23 bl 80360d8 - 8036292: 4603 mov r3, r0 - 8036294: 4a0d ldr r2, [pc, #52] ; (80362cc ) - 8036296: 6013 str r3, [r2, #0] + 803630e: f44f 60c8 mov.w r0, #1600 ; 0x640 + 8036312: f7ff ff23 bl 803615c + 8036316: 4603 mov r3, r0 + 8036318: 4a0d ldr r2, [pc, #52] ; (8036350 ) + 803631a: 6013 str r3, [r2, #0] ram_end->used = 1; - 8036298: 4b0c ldr r3, [pc, #48] ; (80362cc ) - 803629a: 681b ldr r3, [r3, #0] - 803629c: 2201 movs r2, #1 - 803629e: 711a strb r2, [r3, #4] + 803631c: 4b0c ldr r3, [pc, #48] ; (8036350 ) + 803631e: 681b ldr r3, [r3, #0] + 8036320: 2201 movs r2, #1 + 8036322: 711a strb r2, [r3, #4] ram_end->next = MEM_SIZE_ALIGNED; - 80362a0: 4b0a ldr r3, [pc, #40] ; (80362cc ) - 80362a2: 681b ldr r3, [r3, #0] - 80362a4: f44f 62c8 mov.w r2, #1600 ; 0x640 - 80362a8: 801a strh r2, [r3, #0] + 8036324: 4b0a ldr r3, [pc, #40] ; (8036350 ) + 8036326: 681b ldr r3, [r3, #0] + 8036328: f44f 62c8 mov.w r2, #1600 ; 0x640 + 803632c: 801a strh r2, [r3, #0] ram_end->prev = MEM_SIZE_ALIGNED; - 80362aa: 4b08 ldr r3, [pc, #32] ; (80362cc ) - 80362ac: 681b ldr r3, [r3, #0] - 80362ae: f44f 62c8 mov.w r2, #1600 ; 0x640 - 80362b2: 805a strh r2, [r3, #2] + 803632e: 4b08 ldr r3, [pc, #32] ; (8036350 ) + 8036330: 681b ldr r3, [r3, #0] + 8036332: f44f 62c8 mov.w r2, #1600 ; 0x640 + 8036336: 805a strh r2, [r3, #2] MEM_SANITY(); /* initialize the lowest-free pointer to the start of the heap */ lfree = (struct mem *)(void *)ram; - 80362b4: 4b03 ldr r3, [pc, #12] ; (80362c4 ) - 80362b6: 681b ldr r3, [r3, #0] - 80362b8: 4a05 ldr r2, [pc, #20] ; (80362d0 ) - 80362ba: 6013 str r3, [r2, #0] + 8036338: 4b03 ldr r3, [pc, #12] ; (8036348 ) + 803633a: 681b ldr r3, [r3, #0] + 803633c: 4a05 ldr r2, [pc, #20] ; (8036354 ) + 803633e: 6013 str r3, [r2, #0] MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED); if (sys_mutex_new(&mem_mutex) != ERR_OK) { LWIP_ASSERT("failed to create mem_mutex", 0); } } - 80362bc: bf00 nop - 80362be: 3708 adds r7, #8 - 80362c0: 46bd mov sp, r7 - 80362c2: bd80 pop {r7, pc} - 80362c4: 2400b9d4 .word 0x2400b9d4 - 80362c8: 30044000 .word 0x30044000 - 80362cc: 2400b9d8 .word 0x2400b9d8 - 80362d0: 2400b9dc .word 0x2400b9dc + 8036340: bf00 nop + 8036342: 3708 adds r7, #8 + 8036344: 46bd mov sp, r7 + 8036346: bd80 pop {r7, pc} + 8036348: 2400b9dc .word 0x2400b9dc + 803634c: 30044000 .word 0x30044000 + 8036350: 2400b9e0 .word 0x2400b9e0 + 8036354: 2400b9e4 .word 0x2400b9e4 -080362d4 : +08036358 : /* Check if a struct mem is correctly linked. * If not, double-free is a possible reason. */ static int mem_link_valid(struct mem *mem) { - 80362d4: b580 push {r7, lr} - 80362d6: b086 sub sp, #24 - 80362d8: af00 add r7, sp, #0 - 80362da: 6078 str r0, [r7, #4] + 8036358: b580 push {r7, lr} + 803635a: b086 sub sp, #24 + 803635c: af00 add r7, sp, #0 + 803635e: 6078 str r0, [r7, #4] struct mem *nmem, *pmem; mem_size_t rmem_idx; rmem_idx = mem_to_ptr(mem); - 80362dc: 6878 ldr r0, [r7, #4] - 80362de: f7ff ff0d bl 80360fc - 80362e2: 4603 mov r3, r0 - 80362e4: 82fb strh r3, [r7, #22] + 8036360: 6878 ldr r0, [r7, #4] + 8036362: f7ff ff0d bl 8036180 + 8036366: 4603 mov r3, r0 + 8036368: 82fb strh r3, [r7, #22] nmem = ptr_to_mem(mem->next); - 80362e6: 687b ldr r3, [r7, #4] - 80362e8: 881b ldrh r3, [r3, #0] - 80362ea: 4618 mov r0, r3 - 80362ec: f7ff fef4 bl 80360d8 - 80362f0: 6138 str r0, [r7, #16] + 803636a: 687b ldr r3, [r7, #4] + 803636c: 881b ldrh r3, [r3, #0] + 803636e: 4618 mov r0, r3 + 8036370: f7ff fef4 bl 803615c + 8036374: 6138 str r0, [r7, #16] pmem = ptr_to_mem(mem->prev); - 80362f2: 687b ldr r3, [r7, #4] - 80362f4: 885b ldrh r3, [r3, #2] - 80362f6: 4618 mov r0, r3 - 80362f8: f7ff feee bl 80360d8 - 80362fc: 60f8 str r0, [r7, #12] + 8036376: 687b ldr r3, [r7, #4] + 8036378: 885b ldrh r3, [r3, #2] + 803637a: 4618 mov r0, r3 + 803637c: f7ff feee bl 803615c + 8036380: 60f8 str r0, [r7, #12] if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) || - 80362fe: 687b ldr r3, [r7, #4] - 8036300: 881b ldrh r3, [r3, #0] - 8036302: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036306: d818 bhi.n 803633a - 8036308: 687b ldr r3, [r7, #4] - 803630a: 885b ldrh r3, [r3, #2] - 803630c: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036310: d813 bhi.n 803633a + 8036382: 687b ldr r3, [r7, #4] + 8036384: 881b ldrh r3, [r3, #0] + 8036386: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 803638a: d818 bhi.n 80363be + 803638c: 687b ldr r3, [r7, #4] + 803638e: 885b ldrh r3, [r3, #2] + 8036390: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036394: d813 bhi.n 80363be ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) || - 8036312: 687b ldr r3, [r7, #4] - 8036314: 885b ldrh r3, [r3, #2] + 8036396: 687b ldr r3, [r7, #4] + 8036398: 885b ldrh r3, [r3, #2] if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) || - 8036316: 8afa ldrh r2, [r7, #22] - 8036318: 429a cmp r2, r3 - 803631a: d004 beq.n 8036326 + 803639a: 8afa ldrh r2, [r7, #22] + 803639c: 429a cmp r2, r3 + 803639e: d004 beq.n 80363aa ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) || - 803631c: 68fb ldr r3, [r7, #12] - 803631e: 881b ldrh r3, [r3, #0] - 8036320: 8afa ldrh r2, [r7, #22] - 8036322: 429a cmp r2, r3 - 8036324: d109 bne.n 803633a + 80363a0: 68fb ldr r3, [r7, #12] + 80363a2: 881b ldrh r3, [r3, #0] + 80363a4: 8afa ldrh r2, [r7, #22] + 80363a6: 429a cmp r2, r3 + 80363a8: d109 bne.n 80363be ((nmem != ram_end) && (nmem->prev != rmem_idx))) { - 8036326: 4b08 ldr r3, [pc, #32] ; (8036348 ) - 8036328: 681b ldr r3, [r3, #0] + 80363aa: 4b08 ldr r3, [pc, #32] ; (80363cc ) + 80363ac: 681b ldr r3, [r3, #0] ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) || - 803632a: 693a ldr r2, [r7, #16] - 803632c: 429a cmp r2, r3 - 803632e: d006 beq.n 803633e + 80363ae: 693a ldr r2, [r7, #16] + 80363b0: 429a cmp r2, r3 + 80363b2: d006 beq.n 80363c2 ((nmem != ram_end) && (nmem->prev != rmem_idx))) { - 8036330: 693b ldr r3, [r7, #16] - 8036332: 885b ldrh r3, [r3, #2] - 8036334: 8afa ldrh r2, [r7, #22] - 8036336: 429a cmp r2, r3 - 8036338: d001 beq.n 803633e + 80363b4: 693b ldr r3, [r7, #16] + 80363b6: 885b ldrh r3, [r3, #2] + 80363b8: 8afa ldrh r2, [r7, #22] + 80363ba: 429a cmp r2, r3 + 80363bc: d001 beq.n 80363c2 return 0; - 803633a: 2300 movs r3, #0 - 803633c: e000 b.n 8036340 + 80363be: 2300 movs r3, #0 + 80363c0: e000 b.n 80363c4 } return 1; - 803633e: 2301 movs r3, #1 + 80363c2: 2301 movs r3, #1 } - 8036340: 4618 mov r0, r3 - 8036342: 3718 adds r7, #24 - 8036344: 46bd mov sp, r7 - 8036346: bd80 pop {r7, pc} - 8036348: 2400b9d8 .word 0x2400b9d8 + 80363c4: 4618 mov r0, r3 + 80363c6: 3718 adds r7, #24 + 80363c8: 46bd mov sp, r7 + 80363ca: bd80 pop {r7, pc} + 80363cc: 2400b9e0 .word 0x2400b9e0 -0803634c : +080363d0 : * @param rmem is the data portion of a struct mem as returned by a previous * call to mem_malloc() */ void mem_free(void *rmem) { - 803634c: b580 push {r7, lr} - 803634e: b084 sub sp, #16 - 8036350: af00 add r7, sp, #0 - 8036352: 6078 str r0, [r7, #4] + 80363d0: b580 push {r7, lr} + 80363d2: b084 sub sp, #16 + 80363d4: af00 add r7, sp, #0 + 80363d6: 6078 str r0, [r7, #4] struct mem *mem; LWIP_MEM_FREE_DECL_PROTECT(); if (rmem == NULL) { - 8036354: 687b ldr r3, [r7, #4] - 8036356: 2b00 cmp r3, #0 - 8036358: d04c beq.n 80363f4 + 80363d8: 687b ldr r3, [r7, #4] + 80363da: 2b00 cmp r3, #0 + 80363dc: d04c beq.n 8036478 LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n")); return; } if ((((mem_ptr_t)rmem) & (MEM_ALIGNMENT - 1)) != 0) { - 803635a: 687b ldr r3, [r7, #4] - 803635c: f003 0303 and.w r3, r3, #3 - 8036360: 2b00 cmp r3, #0 - 8036362: d007 beq.n 8036374 + 80363de: 687b ldr r3, [r7, #4] + 80363e0: f003 0303 and.w r3, r3, #3 + 80363e4: 2b00 cmp r3, #0 + 80363e6: d007 beq.n 80363f8 LWIP_MEM_ILLEGAL_FREE("mem_free: sanity check alignment"); - 8036364: 4b25 ldr r3, [pc, #148] ; (80363fc ) - 8036366: f240 2273 movw r2, #627 ; 0x273 - 803636a: 4925 ldr r1, [pc, #148] ; (8036400 ) - 803636c: 4825 ldr r0, [pc, #148] ; (8036404 ) - 803636e: f00a fbcf bl 8040b10 + 80363e8: 4b25 ldr r3, [pc, #148] ; (8036480 ) + 80363ea: f240 2273 movw r2, #627 ; 0x273 + 80363ee: 4925 ldr r1, [pc, #148] ; (8036484 ) + 80363f0: 4825 ldr r0, [pc, #148] ; (8036488 ) + 80363f2: f00a fbcf bl 8040b94 LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: sanity check alignment\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return; - 8036372: e040 b.n 80363f6 + 80363f6: e040 b.n 803647a } /* Get the corresponding struct mem: */ /* cast through void* to get rid of alignment warnings */ mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET)); - 8036374: 687b ldr r3, [r7, #4] - 8036376: 3b08 subs r3, #8 - 8036378: 60fb str r3, [r7, #12] + 80363f8: 687b ldr r3, [r7, #4] + 80363fa: 3b08 subs r3, #8 + 80363fc: 60fb str r3, [r7, #12] if ((u8_t *)mem < ram || (u8_t *)rmem + MIN_SIZE_ALIGNED > (u8_t *)ram_end) { - 803637a: 4b23 ldr r3, [pc, #140] ; (8036408 ) - 803637c: 681b ldr r3, [r3, #0] - 803637e: 68fa ldr r2, [r7, #12] - 8036380: 429a cmp r2, r3 - 8036382: d306 bcc.n 8036392 - 8036384: 687b ldr r3, [r7, #4] - 8036386: f103 020c add.w r2, r3, #12 - 803638a: 4b20 ldr r3, [pc, #128] ; (803640c ) - 803638c: 681b ldr r3, [r3, #0] - 803638e: 429a cmp r2, r3 - 8036390: d907 bls.n 80363a2 + 80363fe: 4b23 ldr r3, [pc, #140] ; (803648c ) + 8036400: 681b ldr r3, [r3, #0] + 8036402: 68fa ldr r2, [r7, #12] + 8036404: 429a cmp r2, r3 + 8036406: d306 bcc.n 8036416 + 8036408: 687b ldr r3, [r7, #4] + 803640a: f103 020c add.w r2, r3, #12 + 803640e: 4b20 ldr r3, [pc, #128] ; (8036490 ) + 8036410: 681b ldr r3, [r3, #0] + 8036412: 429a cmp r2, r3 + 8036414: d907 bls.n 8036426 LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory"); - 8036392: 4b1a ldr r3, [pc, #104] ; (80363fc ) - 8036394: f240 227f movw r2, #639 ; 0x27f - 8036398: 491d ldr r1, [pc, #116] ; (8036410 ) - 803639a: 481a ldr r0, [pc, #104] ; (8036404 ) - 803639c: f00a fbb8 bl 8040b10 + 8036416: 4b1a ldr r3, [pc, #104] ; (8036480 ) + 8036418: f240 227f movw r2, #639 ; 0x27f + 803641c: 491d ldr r1, [pc, #116] ; (8036494 ) + 803641e: 481a ldr r0, [pc, #104] ; (8036488 ) + 8036420: f00a fbb8 bl 8040b94 LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return; - 80363a0: e029 b.n 80363f6 + 8036424: e029 b.n 803647a mem_overflow_check_element(mem); #endif /* protect the heap from concurrent access */ LWIP_MEM_FREE_PROTECT(); /* mem has to be in a used state */ if (!mem->used) { - 80363a2: 68fb ldr r3, [r7, #12] - 80363a4: 791b ldrb r3, [r3, #4] - 80363a6: 2b00 cmp r3, #0 - 80363a8: d107 bne.n 80363ba + 8036426: 68fb ldr r3, [r7, #12] + 8036428: 791b ldrb r3, [r3, #4] + 803642a: 2b00 cmp r3, #0 + 803642c: d107 bne.n 803643e LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: double free"); - 80363aa: 4b14 ldr r3, [pc, #80] ; (80363fc ) - 80363ac: f44f 7223 mov.w r2, #652 ; 0x28c - 80363b0: 4918 ldr r1, [pc, #96] ; (8036414 ) - 80363b2: 4814 ldr r0, [pc, #80] ; (8036404 ) - 80363b4: f00a fbac bl 8040b10 + 803642e: 4b14 ldr r3, [pc, #80] ; (8036480 ) + 8036430: f44f 7223 mov.w r2, #652 ; 0x28c + 8036434: 4918 ldr r1, [pc, #96] ; (8036498 ) + 8036436: 4814 ldr r0, [pc, #80] ; (8036488 ) + 8036438: f00a fbac bl 8040b94 LWIP_MEM_FREE_UNPROTECT(); LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: double free?\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return; - 80363b8: e01d b.n 80363f6 + 803643c: e01d b.n 803647a } if (!mem_link_valid(mem)) { - 80363ba: 68f8 ldr r0, [r7, #12] - 80363bc: f7ff ff8a bl 80362d4 - 80363c0: 4603 mov r3, r0 - 80363c2: 2b00 cmp r3, #0 - 80363c4: d107 bne.n 80363d6 + 803643e: 68f8 ldr r0, [r7, #12] + 8036440: f7ff ff8a bl 8036358 + 8036444: 4603 mov r3, r0 + 8036446: 2b00 cmp r3, #0 + 8036448: d107 bne.n 803645a LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: non-linked: double free"); - 80363c6: 4b0d ldr r3, [pc, #52] ; (80363fc ) - 80363c8: f240 2295 movw r2, #661 ; 0x295 - 80363cc: 4912 ldr r1, [pc, #72] ; (8036418 ) - 80363ce: 480d ldr r0, [pc, #52] ; (8036404 ) - 80363d0: f00a fb9e bl 8040b10 + 803644a: 4b0d ldr r3, [pc, #52] ; (8036480 ) + 803644c: f240 2295 movw r2, #661 ; 0x295 + 8036450: 4912 ldr r1, [pc, #72] ; (803649c ) + 8036452: 480d ldr r0, [pc, #52] ; (8036488 ) + 8036454: f00a fb9e bl 8040b94 LWIP_MEM_FREE_UNPROTECT(); LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: non-linked: double free?\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return; - 80363d4: e00f b.n 80363f6 + 8036458: e00f b.n 803647a } /* mem is now unused. */ mem->used = 0; - 80363d6: 68fb ldr r3, [r7, #12] - 80363d8: 2200 movs r2, #0 - 80363da: 711a strb r2, [r3, #4] + 803645a: 68fb ldr r3, [r7, #12] + 803645c: 2200 movs r2, #0 + 803645e: 711a strb r2, [r3, #4] if (mem < lfree) { - 80363dc: 4b0f ldr r3, [pc, #60] ; (803641c ) - 80363de: 681b ldr r3, [r3, #0] - 80363e0: 68fa ldr r2, [r7, #12] - 80363e2: 429a cmp r2, r3 - 80363e4: d202 bcs.n 80363ec + 8036460: 4b0f ldr r3, [pc, #60] ; (80364a0 ) + 8036462: 681b ldr r3, [r3, #0] + 8036464: 68fa ldr r2, [r7, #12] + 8036466: 429a cmp r2, r3 + 8036468: d202 bcs.n 8036470 /* the newly freed struct is now the lowest */ lfree = mem; - 80363e6: 4a0d ldr r2, [pc, #52] ; (803641c ) - 80363e8: 68fb ldr r3, [r7, #12] - 80363ea: 6013 str r3, [r2, #0] + 803646a: 4a0d ldr r2, [pc, #52] ; (80364a0 ) + 803646c: 68fb ldr r3, [r7, #12] + 803646e: 6013 str r3, [r2, #0] } MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram))); /* finally, see if prev or next are free also */ plug_holes(mem); - 80363ec: 68f8 ldr r0, [r7, #12] - 80363ee: f7ff fe97 bl 8036120 - 80363f2: e000 b.n 80363f6 + 8036470: 68f8 ldr r0, [r7, #12] + 8036472: f7ff fe97 bl 80361a4 + 8036476: e000 b.n 803647a return; - 80363f4: bf00 nop + 8036478: bf00 nop MEM_SANITY(); #if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT mem_free_count = 1; #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ LWIP_MEM_FREE_UNPROTECT(); } - 80363f6: 3710 adds r7, #16 - 80363f8: 46bd mov sp, r7 - 80363fa: bd80 pop {r7, pc} - 80363fc: 08042320 .word 0x08042320 - 8036400: 080423f4 .word 0x080423f4 - 8036404: 08042368 .word 0x08042368 - 8036408: 2400b9d4 .word 0x2400b9d4 - 803640c: 2400b9d8 .word 0x2400b9d8 - 8036410: 08042418 .word 0x08042418 - 8036414: 08042434 .word 0x08042434 - 8036418: 0804245c .word 0x0804245c - 803641c: 2400b9dc .word 0x2400b9dc - -08036420 : + 803647a: 3710 adds r7, #16 + 803647c: 46bd mov sp, r7 + 803647e: bd80 pop {r7, pc} + 8036480: 080423a0 .word 0x080423a0 + 8036484: 08042474 .word 0x08042474 + 8036488: 080423e8 .word 0x080423e8 + 803648c: 2400b9dc .word 0x2400b9dc + 8036490: 2400b9e0 .word 0x2400b9e0 + 8036494: 08042498 .word 0x08042498 + 8036498: 080424b4 .word 0x080424b4 + 803649c: 080424dc .word 0x080424dc + 80364a0: 2400b9e4 .word 0x2400b9e4 + +080364a4 : * or NULL if newsize is > old size, in which case rmem is NOT touched * or freed! */ void * mem_trim(void *rmem, mem_size_t new_size) { - 8036420: b580 push {r7, lr} - 8036422: b088 sub sp, #32 - 8036424: af00 add r7, sp, #0 - 8036426: 6078 str r0, [r7, #4] - 8036428: 460b mov r3, r1 - 803642a: 807b strh r3, [r7, #2] + 80364a4: b580 push {r7, lr} + 80364a6: b088 sub sp, #32 + 80364a8: af00 add r7, sp, #0 + 80364aa: 6078 str r0, [r7, #4] + 80364ac: 460b mov r3, r1 + 80364ae: 807b strh r3, [r7, #2] /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */ LWIP_MEM_FREE_DECL_PROTECT(); /* Expand the size of the allocated memory region so that we can adjust for alignment. */ newsize = (mem_size_t)LWIP_MEM_ALIGN_SIZE(new_size); - 803642c: 887b ldrh r3, [r7, #2] - 803642e: 3303 adds r3, #3 - 8036430: b29b uxth r3, r3 - 8036432: f023 0303 bic.w r3, r3, #3 - 8036436: 83fb strh r3, [r7, #30] + 80364b0: 887b ldrh r3, [r7, #2] + 80364b2: 3303 adds r3, #3 + 80364b4: b29b uxth r3, r3 + 80364b6: f023 0303 bic.w r3, r3, #3 + 80364ba: 83fb strh r3, [r7, #30] if (newsize < MIN_SIZE_ALIGNED) { - 8036438: 8bfb ldrh r3, [r7, #30] - 803643a: 2b0b cmp r3, #11 - 803643c: d801 bhi.n 8036442 + 80364bc: 8bfb ldrh r3, [r7, #30] + 80364be: 2b0b cmp r3, #11 + 80364c0: d801 bhi.n 80364c6 /* every data block must be at least MIN_SIZE_ALIGNED long */ newsize = MIN_SIZE_ALIGNED; - 803643e: 230c movs r3, #12 - 8036440: 83fb strh r3, [r7, #30] + 80364c2: 230c movs r3, #12 + 80364c4: 83fb strh r3, [r7, #30] } #if MEM_OVERFLOW_CHECK newsize += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED; #endif if ((newsize > MEM_SIZE_ALIGNED) || (newsize < new_size)) { - 8036442: 8bfb ldrh r3, [r7, #30] - 8036444: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036448: d803 bhi.n 8036452 - 803644a: 8bfa ldrh r2, [r7, #30] - 803644c: 887b ldrh r3, [r7, #2] - 803644e: 429a cmp r2, r3 - 8036450: d201 bcs.n 8036456 + 80364c6: 8bfb ldrh r3, [r7, #30] + 80364c8: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80364cc: d803 bhi.n 80364d6 + 80364ce: 8bfa ldrh r2, [r7, #30] + 80364d0: 887b ldrh r3, [r7, #2] + 80364d2: 429a cmp r2, r3 + 80364d4: d201 bcs.n 80364da return NULL; - 8036452: 2300 movs r3, #0 - 8036454: e0cc b.n 80365f0 + 80364d6: 2300 movs r3, #0 + 80364d8: e0cc b.n 8036674 } LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram && - 8036456: 4b68 ldr r3, [pc, #416] ; (80365f8 ) - 8036458: 681b ldr r3, [r3, #0] - 803645a: 687a ldr r2, [r7, #4] - 803645c: 429a cmp r2, r3 - 803645e: d304 bcc.n 803646a - 8036460: 4b66 ldr r3, [pc, #408] ; (80365fc ) - 8036462: 681b ldr r3, [r3, #0] - 8036464: 687a ldr r2, [r7, #4] - 8036466: 429a cmp r2, r3 - 8036468: d306 bcc.n 8036478 - 803646a: 4b65 ldr r3, [pc, #404] ; (8036600 ) - 803646c: f240 22d1 movw r2, #721 ; 0x2d1 - 8036470: 4964 ldr r1, [pc, #400] ; (8036604 ) - 8036472: 4865 ldr r0, [pc, #404] ; (8036608 ) - 8036474: f00a fb4c bl 8040b10 + 80364da: 4b68 ldr r3, [pc, #416] ; (803667c ) + 80364dc: 681b ldr r3, [r3, #0] + 80364de: 687a ldr r2, [r7, #4] + 80364e0: 429a cmp r2, r3 + 80364e2: d304 bcc.n 80364ee + 80364e4: 4b66 ldr r3, [pc, #408] ; (8036680 ) + 80364e6: 681b ldr r3, [r3, #0] + 80364e8: 687a ldr r2, [r7, #4] + 80364ea: 429a cmp r2, r3 + 80364ec: d306 bcc.n 80364fc + 80364ee: 4b65 ldr r3, [pc, #404] ; (8036684 ) + 80364f0: f240 22d1 movw r2, #721 ; 0x2d1 + 80364f4: 4964 ldr r1, [pc, #400] ; (8036688 ) + 80364f6: 4865 ldr r0, [pc, #404] ; (803668c ) + 80364f8: f00a fb4c bl 8040b94 (u8_t *)rmem < (u8_t *)ram_end); if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { - 8036478: 4b5f ldr r3, [pc, #380] ; (80365f8 ) - 803647a: 681b ldr r3, [r3, #0] - 803647c: 687a ldr r2, [r7, #4] - 803647e: 429a cmp r2, r3 - 8036480: d304 bcc.n 803648c - 8036482: 4b5e ldr r3, [pc, #376] ; (80365fc ) - 8036484: 681b ldr r3, [r3, #0] - 8036486: 687a ldr r2, [r7, #4] - 8036488: 429a cmp r2, r3 - 803648a: d301 bcc.n 8036490 + 80364fc: 4b5f ldr r3, [pc, #380] ; (803667c ) + 80364fe: 681b ldr r3, [r3, #0] + 8036500: 687a ldr r2, [r7, #4] + 8036502: 429a cmp r2, r3 + 8036504: d304 bcc.n 8036510 + 8036506: 4b5e ldr r3, [pc, #376] ; (8036680 ) + 8036508: 681b ldr r3, [r3, #0] + 803650a: 687a ldr r2, [r7, #4] + 803650c: 429a cmp r2, r3 + 803650e: d301 bcc.n 8036514 LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n")); /* protect mem stats from concurrent access */ MEM_STATS_INC_LOCKED(illegal); return rmem; - 803648c: 687b ldr r3, [r7, #4] - 803648e: e0af b.n 80365f0 + 8036510: 687b ldr r3, [r7, #4] + 8036512: e0af b.n 8036674 } /* Get the corresponding struct mem ... */ /* cast through void* to get rid of alignment warnings */ mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET)); - 8036490: 687b ldr r3, [r7, #4] - 8036492: 3b08 subs r3, #8 - 8036494: 61bb str r3, [r7, #24] + 8036514: 687b ldr r3, [r7, #4] + 8036516: 3b08 subs r3, #8 + 8036518: 61bb str r3, [r7, #24] #if MEM_OVERFLOW_CHECK mem_overflow_check_element(mem); #endif /* ... and its offset pointer */ ptr = mem_to_ptr(mem); - 8036496: 69b8 ldr r0, [r7, #24] - 8036498: f7ff fe30 bl 80360fc - 803649c: 4603 mov r3, r0 - 803649e: 82fb strh r3, [r7, #22] + 803651a: 69b8 ldr r0, [r7, #24] + 803651c: f7ff fe30 bl 8036180 + 8036520: 4603 mov r3, r0 + 8036522: 82fb strh r3, [r7, #22] size = (mem_size_t)((mem_size_t)(mem->next - ptr) - (SIZEOF_STRUCT_MEM + MEM_SANITY_OVERHEAD)); - 80364a0: 69bb ldr r3, [r7, #24] - 80364a2: 881a ldrh r2, [r3, #0] - 80364a4: 8afb ldrh r3, [r7, #22] - 80364a6: 1ad3 subs r3, r2, r3 - 80364a8: b29b uxth r3, r3 - 80364aa: 3b08 subs r3, #8 - 80364ac: 82bb strh r3, [r7, #20] + 8036524: 69bb ldr r3, [r7, #24] + 8036526: 881a ldrh r2, [r3, #0] + 8036528: 8afb ldrh r3, [r7, #22] + 803652a: 1ad3 subs r3, r2, r3 + 803652c: b29b uxth r3, r3 + 803652e: 3b08 subs r3, #8 + 8036530: 82bb strh r3, [r7, #20] LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size); - 80364ae: 8bfa ldrh r2, [r7, #30] - 80364b0: 8abb ldrh r3, [r7, #20] - 80364b2: 429a cmp r2, r3 - 80364b4: d906 bls.n 80364c4 - 80364b6: 4b52 ldr r3, [pc, #328] ; (8036600 ) - 80364b8: f44f 7239 mov.w r2, #740 ; 0x2e4 - 80364bc: 4953 ldr r1, [pc, #332] ; (803660c ) - 80364be: 4852 ldr r0, [pc, #328] ; (8036608 ) - 80364c0: f00a fb26 bl 8040b10 + 8036532: 8bfa ldrh r2, [r7, #30] + 8036534: 8abb ldrh r3, [r7, #20] + 8036536: 429a cmp r2, r3 + 8036538: d906 bls.n 8036548 + 803653a: 4b52 ldr r3, [pc, #328] ; (8036684 ) + 803653c: f44f 7239 mov.w r2, #740 ; 0x2e4 + 8036540: 4953 ldr r1, [pc, #332] ; (8036690 ) + 8036542: 4852 ldr r0, [pc, #328] ; (803668c ) + 8036544: f00a fb26 bl 8040b94 if (newsize > size) { - 80364c4: 8bfa ldrh r2, [r7, #30] - 80364c6: 8abb ldrh r3, [r7, #20] - 80364c8: 429a cmp r2, r3 - 80364ca: d901 bls.n 80364d0 + 8036548: 8bfa ldrh r2, [r7, #30] + 803654a: 8abb ldrh r3, [r7, #20] + 803654c: 429a cmp r2, r3 + 803654e: d901 bls.n 8036554 /* not supported */ return NULL; - 80364cc: 2300 movs r3, #0 - 80364ce: e08f b.n 80365f0 + 8036550: 2300 movs r3, #0 + 8036552: e08f b.n 8036674 } if (newsize == size) { - 80364d0: 8bfa ldrh r2, [r7, #30] - 80364d2: 8abb ldrh r3, [r7, #20] - 80364d4: 429a cmp r2, r3 - 80364d6: d101 bne.n 80364dc + 8036554: 8bfa ldrh r2, [r7, #30] + 8036556: 8abb ldrh r3, [r7, #20] + 8036558: 429a cmp r2, r3 + 803655a: d101 bne.n 8036560 /* No change in size, simply return */ return rmem; - 80364d8: 687b ldr r3, [r7, #4] - 80364da: e089 b.n 80365f0 + 803655c: 687b ldr r3, [r7, #4] + 803655e: e089 b.n 8036674 } /* protect the heap from concurrent access */ LWIP_MEM_FREE_PROTECT(); mem2 = ptr_to_mem(mem->next); - 80364dc: 69bb ldr r3, [r7, #24] - 80364de: 881b ldrh r3, [r3, #0] - 80364e0: 4618 mov r0, r3 - 80364e2: f7ff fdf9 bl 80360d8 - 80364e6: 6138 str r0, [r7, #16] + 8036560: 69bb ldr r3, [r7, #24] + 8036562: 881b ldrh r3, [r3, #0] + 8036564: 4618 mov r0, r3 + 8036566: f7ff fdf9 bl 803615c + 803656a: 6138 str r0, [r7, #16] if (mem2->used == 0) { - 80364e8: 693b ldr r3, [r7, #16] - 80364ea: 791b ldrb r3, [r3, #4] - 80364ec: 2b00 cmp r3, #0 - 80364ee: d13f bne.n 8036570 + 803656c: 693b ldr r3, [r7, #16] + 803656e: 791b ldrb r3, [r3, #4] + 8036570: 2b00 cmp r3, #0 + 8036572: d13f bne.n 80365f4 /* The next struct is unused, we can simply move it at little */ mem_size_t next; LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED); - 80364f0: 69bb ldr r3, [r7, #24] - 80364f2: 881b ldrh r3, [r3, #0] - 80364f4: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80364f8: d106 bne.n 8036508 - 80364fa: 4b41 ldr r3, [pc, #260] ; (8036600 ) - 80364fc: f240 22f5 movw r2, #757 ; 0x2f5 - 8036500: 4943 ldr r1, [pc, #268] ; (8036610 ) - 8036502: 4841 ldr r0, [pc, #260] ; (8036608 ) - 8036504: f00a fb04 bl 8040b10 + 8036574: 69bb ldr r3, [r7, #24] + 8036576: 881b ldrh r3, [r3, #0] + 8036578: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 803657c: d106 bne.n 803658c + 803657e: 4b41 ldr r3, [pc, #260] ; (8036684 ) + 8036580: f240 22f5 movw r2, #757 ; 0x2f5 + 8036584: 4943 ldr r1, [pc, #268] ; (8036694 ) + 8036586: 4841 ldr r0, [pc, #260] ; (803668c ) + 8036588: f00a fb04 bl 8040b94 /* remember the old next pointer */ next = mem2->next; - 8036508: 693b ldr r3, [r7, #16] - 803650a: 881b ldrh r3, [r3, #0] - 803650c: 81bb strh r3, [r7, #12] + 803658c: 693b ldr r3, [r7, #16] + 803658e: 881b ldrh r3, [r3, #0] + 8036590: 81bb strh r3, [r7, #12] /* create new struct mem which is moved directly after the shrinked mem */ ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize); - 803650e: 8afa ldrh r2, [r7, #22] - 8036510: 8bfb ldrh r3, [r7, #30] - 8036512: 4413 add r3, r2 - 8036514: b29b uxth r3, r3 - 8036516: 3308 adds r3, #8 - 8036518: 81fb strh r3, [r7, #14] + 8036592: 8afa ldrh r2, [r7, #22] + 8036594: 8bfb ldrh r3, [r7, #30] + 8036596: 4413 add r3, r2 + 8036598: b29b uxth r3, r3 + 803659a: 3308 adds r3, #8 + 803659c: 81fb strh r3, [r7, #14] if (lfree == mem2) { - 803651a: 4b3e ldr r3, [pc, #248] ; (8036614 ) - 803651c: 681b ldr r3, [r3, #0] - 803651e: 693a ldr r2, [r7, #16] - 8036520: 429a cmp r2, r3 - 8036522: d106 bne.n 8036532 + 803659e: 4b3e ldr r3, [pc, #248] ; (8036698 ) + 80365a0: 681b ldr r3, [r3, #0] + 80365a2: 693a ldr r2, [r7, #16] + 80365a4: 429a cmp r2, r3 + 80365a6: d106 bne.n 80365b6 lfree = ptr_to_mem(ptr2); - 8036524: 89fb ldrh r3, [r7, #14] - 8036526: 4618 mov r0, r3 - 8036528: f7ff fdd6 bl 80360d8 - 803652c: 4603 mov r3, r0 - 803652e: 4a39 ldr r2, [pc, #228] ; (8036614 ) - 8036530: 6013 str r3, [r2, #0] + 80365a8: 89fb ldrh r3, [r7, #14] + 80365aa: 4618 mov r0, r3 + 80365ac: f7ff fdd6 bl 803615c + 80365b0: 4603 mov r3, r0 + 80365b2: 4a39 ldr r2, [pc, #228] ; (8036698 ) + 80365b4: 6013 str r3, [r2, #0] } mem2 = ptr_to_mem(ptr2); - 8036532: 89fb ldrh r3, [r7, #14] - 8036534: 4618 mov r0, r3 - 8036536: f7ff fdcf bl 80360d8 - 803653a: 6138 str r0, [r7, #16] + 80365b6: 89fb ldrh r3, [r7, #14] + 80365b8: 4618 mov r0, r3 + 80365ba: f7ff fdcf bl 803615c + 80365be: 6138 str r0, [r7, #16] mem2->used = 0; - 803653c: 693b ldr r3, [r7, #16] - 803653e: 2200 movs r2, #0 - 8036540: 711a strb r2, [r3, #4] + 80365c0: 693b ldr r3, [r7, #16] + 80365c2: 2200 movs r2, #0 + 80365c4: 711a strb r2, [r3, #4] /* restore the next pointer */ mem2->next = next; - 8036542: 693b ldr r3, [r7, #16] - 8036544: 89ba ldrh r2, [r7, #12] - 8036546: 801a strh r2, [r3, #0] + 80365c6: 693b ldr r3, [r7, #16] + 80365c8: 89ba ldrh r2, [r7, #12] + 80365ca: 801a strh r2, [r3, #0] /* link it back to mem */ mem2->prev = ptr; - 8036548: 693b ldr r3, [r7, #16] - 803654a: 8afa ldrh r2, [r7, #22] - 803654c: 805a strh r2, [r3, #2] + 80365cc: 693b ldr r3, [r7, #16] + 80365ce: 8afa ldrh r2, [r7, #22] + 80365d0: 805a strh r2, [r3, #2] /* link mem to it */ mem->next = ptr2; - 803654e: 69bb ldr r3, [r7, #24] - 8036550: 89fa ldrh r2, [r7, #14] - 8036552: 801a strh r2, [r3, #0] + 80365d2: 69bb ldr r3, [r7, #24] + 80365d4: 89fa ldrh r2, [r7, #14] + 80365d6: 801a strh r2, [r3, #0] /* last thing to restore linked list: as we have moved mem2, * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not * the end of the heap */ if (mem2->next != MEM_SIZE_ALIGNED) { - 8036554: 693b ldr r3, [r7, #16] - 8036556: 881b ldrh r3, [r3, #0] - 8036558: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 803655c: d047 beq.n 80365ee + 80365d8: 693b ldr r3, [r7, #16] + 80365da: 881b ldrh r3, [r3, #0] + 80365dc: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80365e0: d047 beq.n 8036672 ptr_to_mem(mem2->next)->prev = ptr2; - 803655e: 693b ldr r3, [r7, #16] - 8036560: 881b ldrh r3, [r3, #0] - 8036562: 4618 mov r0, r3 - 8036564: f7ff fdb8 bl 80360d8 - 8036568: 4602 mov r2, r0 - 803656a: 89fb ldrh r3, [r7, #14] - 803656c: 8053 strh r3, [r2, #2] - 803656e: e03e b.n 80365ee + 80365e2: 693b ldr r3, [r7, #16] + 80365e4: 881b ldrh r3, [r3, #0] + 80365e6: 4618 mov r0, r3 + 80365e8: f7ff fdb8 bl 803615c + 80365ec: 4602 mov r2, r0 + 80365ee: 89fb ldrh r3, [r7, #14] + 80365f0: 8053 strh r3, [r2, #2] + 80365f2: e03e b.n 8036672 } MEM_STATS_DEC_USED(used, (size - newsize)); /* no need to plug holes, we've already done that */ } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) { - 8036570: 8bfb ldrh r3, [r7, #30] - 8036572: f103 0214 add.w r2, r3, #20 - 8036576: 8abb ldrh r3, [r7, #20] - 8036578: 429a cmp r2, r3 - 803657a: d838 bhi.n 80365ee + 80365f4: 8bfb ldrh r3, [r7, #30] + 80365f6: f103 0214 add.w r2, r3, #20 + 80365fa: 8abb ldrh r3, [r7, #20] + 80365fc: 429a cmp r2, r3 + 80365fe: d838 bhi.n 8036672 * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED'). * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty * region that couldn't hold data, but when mem->next gets freed, * the 2 regions would be combined, resulting in more free memory */ ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize); - 803657c: 8afa ldrh r2, [r7, #22] - 803657e: 8bfb ldrh r3, [r7, #30] - 8036580: 4413 add r3, r2 - 8036582: b29b uxth r3, r3 - 8036584: 3308 adds r3, #8 - 8036586: 81fb strh r3, [r7, #14] + 8036600: 8afa ldrh r2, [r7, #22] + 8036602: 8bfb ldrh r3, [r7, #30] + 8036604: 4413 add r3, r2 + 8036606: b29b uxth r3, r3 + 8036608: 3308 adds r3, #8 + 803660a: 81fb strh r3, [r7, #14] LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED); - 8036588: 69bb ldr r3, [r7, #24] - 803658a: 881b ldrh r3, [r3, #0] - 803658c: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036590: d106 bne.n 80365a0 - 8036592: 4b1b ldr r3, [pc, #108] ; (8036600 ) - 8036594: f240 3216 movw r2, #790 ; 0x316 - 8036598: 491d ldr r1, [pc, #116] ; (8036610 ) - 803659a: 481b ldr r0, [pc, #108] ; (8036608 ) - 803659c: f00a fab8 bl 8040b10 + 803660c: 69bb ldr r3, [r7, #24] + 803660e: 881b ldrh r3, [r3, #0] + 8036610: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036614: d106 bne.n 8036624 + 8036616: 4b1b ldr r3, [pc, #108] ; (8036684 ) + 8036618: f240 3216 movw r2, #790 ; 0x316 + 803661c: 491d ldr r1, [pc, #116] ; (8036694 ) + 803661e: 481b ldr r0, [pc, #108] ; (803668c ) + 8036620: f00a fab8 bl 8040b94 mem2 = ptr_to_mem(ptr2); - 80365a0: 89fb ldrh r3, [r7, #14] - 80365a2: 4618 mov r0, r3 - 80365a4: f7ff fd98 bl 80360d8 - 80365a8: 6138 str r0, [r7, #16] + 8036624: 89fb ldrh r3, [r7, #14] + 8036626: 4618 mov r0, r3 + 8036628: f7ff fd98 bl 803615c + 803662c: 6138 str r0, [r7, #16] if (mem2 < lfree) { - 80365aa: 4b1a ldr r3, [pc, #104] ; (8036614 ) - 80365ac: 681b ldr r3, [r3, #0] - 80365ae: 693a ldr r2, [r7, #16] - 80365b0: 429a cmp r2, r3 - 80365b2: d202 bcs.n 80365ba + 803662e: 4b1a ldr r3, [pc, #104] ; (8036698 ) + 8036630: 681b ldr r3, [r3, #0] + 8036632: 693a ldr r2, [r7, #16] + 8036634: 429a cmp r2, r3 + 8036636: d202 bcs.n 803663e lfree = mem2; - 80365b4: 4a17 ldr r2, [pc, #92] ; (8036614 ) - 80365b6: 693b ldr r3, [r7, #16] - 80365b8: 6013 str r3, [r2, #0] + 8036638: 4a17 ldr r2, [pc, #92] ; (8036698 ) + 803663a: 693b ldr r3, [r7, #16] + 803663c: 6013 str r3, [r2, #0] } mem2->used = 0; - 80365ba: 693b ldr r3, [r7, #16] - 80365bc: 2200 movs r2, #0 - 80365be: 711a strb r2, [r3, #4] + 803663e: 693b ldr r3, [r7, #16] + 8036640: 2200 movs r2, #0 + 8036642: 711a strb r2, [r3, #4] mem2->next = mem->next; - 80365c0: 69bb ldr r3, [r7, #24] - 80365c2: 881a ldrh r2, [r3, #0] - 80365c4: 693b ldr r3, [r7, #16] - 80365c6: 801a strh r2, [r3, #0] + 8036644: 69bb ldr r3, [r7, #24] + 8036646: 881a ldrh r2, [r3, #0] + 8036648: 693b ldr r3, [r7, #16] + 803664a: 801a strh r2, [r3, #0] mem2->prev = ptr; - 80365c8: 693b ldr r3, [r7, #16] - 80365ca: 8afa ldrh r2, [r7, #22] - 80365cc: 805a strh r2, [r3, #2] + 803664c: 693b ldr r3, [r7, #16] + 803664e: 8afa ldrh r2, [r7, #22] + 8036650: 805a strh r2, [r3, #2] mem->next = ptr2; - 80365ce: 69bb ldr r3, [r7, #24] - 80365d0: 89fa ldrh r2, [r7, #14] - 80365d2: 801a strh r2, [r3, #0] + 8036652: 69bb ldr r3, [r7, #24] + 8036654: 89fa ldrh r2, [r7, #14] + 8036656: 801a strh r2, [r3, #0] if (mem2->next != MEM_SIZE_ALIGNED) { - 80365d4: 693b ldr r3, [r7, #16] - 80365d6: 881b ldrh r3, [r3, #0] - 80365d8: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80365dc: d007 beq.n 80365ee + 8036658: 693b ldr r3, [r7, #16] + 803665a: 881b ldrh r3, [r3, #0] + 803665c: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 8036660: d007 beq.n 8036672 ptr_to_mem(mem2->next)->prev = ptr2; - 80365de: 693b ldr r3, [r7, #16] - 80365e0: 881b ldrh r3, [r3, #0] - 80365e2: 4618 mov r0, r3 - 80365e4: f7ff fd78 bl 80360d8 - 80365e8: 4602 mov r2, r0 - 80365ea: 89fb ldrh r3, [r7, #14] - 80365ec: 8053 strh r3, [r2, #2] + 8036662: 693b ldr r3, [r7, #16] + 8036664: 881b ldrh r3, [r3, #0] + 8036666: 4618 mov r0, r3 + 8036668: f7ff fd78 bl 803615c + 803666c: 4602 mov r2, r0 + 803666e: 89fb ldrh r3, [r7, #14] + 8036670: 8053 strh r3, [r2, #2] MEM_SANITY(); #if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT mem_free_count = 1; #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ LWIP_MEM_FREE_UNPROTECT(); return rmem; - 80365ee: 687b ldr r3, [r7, #4] -} - 80365f0: 4618 mov r0, r3 - 80365f2: 3720 adds r7, #32 - 80365f4: 46bd mov sp, r7 - 80365f6: bd80 pop {r7, pc} - 80365f8: 2400b9d4 .word 0x2400b9d4 - 80365fc: 2400b9d8 .word 0x2400b9d8 - 8036600: 08042320 .word 0x08042320 - 8036604: 08042490 .word 0x08042490 - 8036608: 08042368 .word 0x08042368 - 803660c: 080424a8 .word 0x080424a8 - 8036610: 080424c8 .word 0x080424c8 - 8036614: 2400b9dc .word 0x2400b9dc - -08036618 : + 8036672: 687b ldr r3, [r7, #4] +} + 8036674: 4618 mov r0, r3 + 8036676: 3720 adds r7, #32 + 8036678: 46bd mov sp, r7 + 803667a: bd80 pop {r7, pc} + 803667c: 2400b9dc .word 0x2400b9dc + 8036680: 2400b9e0 .word 0x2400b9e0 + 8036684: 080423a0 .word 0x080423a0 + 8036688: 08042510 .word 0x08042510 + 803668c: 080423e8 .word 0x080423e8 + 8036690: 08042528 .word 0x08042528 + 8036694: 08042548 .word 0x08042548 + 8036698: 2400b9e4 .word 0x2400b9e4 + +0803669c : * * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT). */ void * mem_malloc(mem_size_t size_in) { - 8036618: b580 push {r7, lr} - 803661a: b088 sub sp, #32 - 803661c: af00 add r7, sp, #0 - 803661e: 4603 mov r3, r0 - 8036620: 80fb strh r3, [r7, #6] + 803669c: b580 push {r7, lr} + 803669e: b088 sub sp, #32 + 80366a0: af00 add r7, sp, #0 + 80366a2: 4603 mov r3, r0 + 80366a4: 80fb strh r3, [r7, #6] #if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT u8_t local_mem_free_count = 0; #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ LWIP_MEM_ALLOC_DECL_PROTECT(); if (size_in == 0) { - 8036622: 88fb ldrh r3, [r7, #6] - 8036624: 2b00 cmp r3, #0 - 8036626: d101 bne.n 803662c + 80366a6: 88fb ldrh r3, [r7, #6] + 80366a8: 2b00 cmp r3, #0 + 80366aa: d101 bne.n 80366b0 return NULL; - 8036628: 2300 movs r3, #0 - 803662a: e0d9 b.n 80367e0 + 80366ac: 2300 movs r3, #0 + 80366ae: e0d9 b.n 8036864 } /* Expand the size of the allocated memory region so that we can adjust for alignment. */ size = (mem_size_t)LWIP_MEM_ALIGN_SIZE(size_in); - 803662c: 88fb ldrh r3, [r7, #6] - 803662e: 3303 adds r3, #3 - 8036630: b29b uxth r3, r3 - 8036632: f023 0303 bic.w r3, r3, #3 - 8036636: 83bb strh r3, [r7, #28] + 80366b0: 88fb ldrh r3, [r7, #6] + 80366b2: 3303 adds r3, #3 + 80366b4: b29b uxth r3, r3 + 80366b6: f023 0303 bic.w r3, r3, #3 + 80366ba: 83bb strh r3, [r7, #28] if (size < MIN_SIZE_ALIGNED) { - 8036638: 8bbb ldrh r3, [r7, #28] - 803663a: 2b0b cmp r3, #11 - 803663c: d801 bhi.n 8036642 + 80366bc: 8bbb ldrh r3, [r7, #28] + 80366be: 2b0b cmp r3, #11 + 80366c0: d801 bhi.n 80366c6 /* every data block must be at least MIN_SIZE_ALIGNED long */ size = MIN_SIZE_ALIGNED; - 803663e: 230c movs r3, #12 - 8036640: 83bb strh r3, [r7, #28] + 80366c2: 230c movs r3, #12 + 80366c4: 83bb strh r3, [r7, #28] } #if MEM_OVERFLOW_CHECK size += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED; #endif if ((size > MEM_SIZE_ALIGNED) || (size < size_in)) { - 8036642: 8bbb ldrh r3, [r7, #28] - 8036644: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 8036648: d803 bhi.n 8036652 - 803664a: 8bba ldrh r2, [r7, #28] - 803664c: 88fb ldrh r3, [r7, #6] - 803664e: 429a cmp r2, r3 - 8036650: d201 bcs.n 8036656 + 80366c6: 8bbb ldrh r3, [r7, #28] + 80366c8: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 80366cc: d803 bhi.n 80366d6 + 80366ce: 8bba ldrh r2, [r7, #28] + 80366d0: 88fb ldrh r3, [r7, #6] + 80366d2: 429a cmp r2, r3 + 80366d4: d201 bcs.n 80366da return NULL; - 8036652: 2300 movs r3, #0 - 8036654: e0c4 b.n 80367e0 + 80366d6: 2300 movs r3, #0 + 80366d8: e0c4 b.n 8036864 #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ /* Scan through the heap searching for a free block that is big enough, * beginning with the lowest free block. */ for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size; - 8036656: 4b64 ldr r3, [pc, #400] ; (80367e8 ) - 8036658: 681b ldr r3, [r3, #0] - 803665a: 4618 mov r0, r3 - 803665c: f7ff fd4e bl 80360fc - 8036660: 4603 mov r3, r0 - 8036662: 83fb strh r3, [r7, #30] - 8036664: e0b4 b.n 80367d0 + 80366da: 4b64 ldr r3, [pc, #400] ; (803686c ) + 80366dc: 681b ldr r3, [r3, #0] + 80366de: 4618 mov r0, r3 + 80366e0: f7ff fd4e bl 8036180 + 80366e4: 4603 mov r3, r0 + 80366e6: 83fb strh r3, [r7, #30] + 80366e8: e0b4 b.n 8036854 ptr = ptr_to_mem(ptr)->next) { mem = ptr_to_mem(ptr); - 8036666: 8bfb ldrh r3, [r7, #30] - 8036668: 4618 mov r0, r3 - 803666a: f7ff fd35 bl 80360d8 - 803666e: 6178 str r0, [r7, #20] + 80366ea: 8bfb ldrh r3, [r7, #30] + 80366ec: 4618 mov r0, r3 + 80366ee: f7ff fd35 bl 803615c + 80366f2: 6178 str r0, [r7, #20] local_mem_free_count = 1; break; } #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ if ((!mem->used) && - 8036670: 697b ldr r3, [r7, #20] - 8036672: 791b ldrb r3, [r3, #4] - 8036674: 2b00 cmp r3, #0 - 8036676: f040 80a4 bne.w 80367c2 + 80366f4: 697b ldr r3, [r7, #20] + 80366f6: 791b ldrb r3, [r3, #4] + 80366f8: 2b00 cmp r3, #0 + 80366fa: f040 80a4 bne.w 8036846 (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) { - 803667a: 697b ldr r3, [r7, #20] - 803667c: 881b ldrh r3, [r3, #0] - 803667e: 461a mov r2, r3 - 8036680: 8bfb ldrh r3, [r7, #30] - 8036682: 1ad3 subs r3, r2, r3 - 8036684: f1a3 0208 sub.w r2, r3, #8 - 8036688: 8bbb ldrh r3, [r7, #28] + 80366fe: 697b ldr r3, [r7, #20] + 8036700: 881b ldrh r3, [r3, #0] + 8036702: 461a mov r2, r3 + 8036704: 8bfb ldrh r3, [r7, #30] + 8036706: 1ad3 subs r3, r2, r3 + 8036708: f1a3 0208 sub.w r2, r3, #8 + 803670c: 8bbb ldrh r3, [r7, #28] if ((!mem->used) && - 803668a: 429a cmp r2, r3 - 803668c: f0c0 8099 bcc.w 80367c2 + 803670e: 429a cmp r2, r3 + 8036710: f0c0 8099 bcc.w 8036846 /* mem is not used and at least perfect fit is possible: * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */ if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) { - 8036690: 697b ldr r3, [r7, #20] - 8036692: 881b ldrh r3, [r3, #0] - 8036694: 461a mov r2, r3 - 8036696: 8bfb ldrh r3, [r7, #30] - 8036698: 1ad3 subs r3, r2, r3 - 803669a: f1a3 0208 sub.w r2, r3, #8 - 803669e: 8bbb ldrh r3, [r7, #28] - 80366a0: 3314 adds r3, #20 - 80366a2: 429a cmp r2, r3 - 80366a4: d333 bcc.n 803670e + 8036714: 697b ldr r3, [r7, #20] + 8036716: 881b ldrh r3, [r3, #0] + 8036718: 461a mov r2, r3 + 803671a: 8bfb ldrh r3, [r7, #30] + 803671c: 1ad3 subs r3, r2, r3 + 803671e: f1a3 0208 sub.w r2, r3, #8 + 8036722: 8bbb ldrh r3, [r7, #28] + 8036724: 3314 adds r3, #20 + 8036726: 429a cmp r2, r3 + 8036728: d333 bcc.n 8036792 * struct mem would fit in but no data between mem2 and mem2->next * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty * region that couldn't hold data, but when mem->next gets freed, * the 2 regions would be combined, resulting in more free memory */ ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + size); - 80366a6: 8bfa ldrh r2, [r7, #30] - 80366a8: 8bbb ldrh r3, [r7, #28] - 80366aa: 4413 add r3, r2 - 80366ac: b29b uxth r3, r3 - 80366ae: 3308 adds r3, #8 - 80366b0: 827b strh r3, [r7, #18] + 803672a: 8bfa ldrh r2, [r7, #30] + 803672c: 8bbb ldrh r3, [r7, #28] + 803672e: 4413 add r3, r2 + 8036730: b29b uxth r3, r3 + 8036732: 3308 adds r3, #8 + 8036734: 827b strh r3, [r7, #18] LWIP_ASSERT("invalid next ptr",ptr2 != MEM_SIZE_ALIGNED); - 80366b2: 8a7b ldrh r3, [r7, #18] - 80366b4: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80366b8: d106 bne.n 80366c8 - 80366ba: 4b4c ldr r3, [pc, #304] ; (80367ec ) - 80366bc: f240 3287 movw r2, #903 ; 0x387 - 80366c0: 494b ldr r1, [pc, #300] ; (80367f0 ) - 80366c2: 484c ldr r0, [pc, #304] ; (80367f4 ) - 80366c4: f00a fa24 bl 8040b10 + 8036736: 8a7b ldrh r3, [r7, #18] + 8036738: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 803673c: d106 bne.n 803674c + 803673e: 4b4c ldr r3, [pc, #304] ; (8036870 ) + 8036740: f240 3287 movw r2, #903 ; 0x387 + 8036744: 494b ldr r1, [pc, #300] ; (8036874 ) + 8036746: 484c ldr r0, [pc, #304] ; (8036878 ) + 8036748: f00a fa24 bl 8040b94 /* create mem2 struct */ mem2 = ptr_to_mem(ptr2); - 80366c8: 8a7b ldrh r3, [r7, #18] - 80366ca: 4618 mov r0, r3 - 80366cc: f7ff fd04 bl 80360d8 - 80366d0: 60f8 str r0, [r7, #12] + 803674c: 8a7b ldrh r3, [r7, #18] + 803674e: 4618 mov r0, r3 + 8036750: f7ff fd04 bl 803615c + 8036754: 60f8 str r0, [r7, #12] mem2->used = 0; - 80366d2: 68fb ldr r3, [r7, #12] - 80366d4: 2200 movs r2, #0 - 80366d6: 711a strb r2, [r3, #4] + 8036756: 68fb ldr r3, [r7, #12] + 8036758: 2200 movs r2, #0 + 803675a: 711a strb r2, [r3, #4] mem2->next = mem->next; - 80366d8: 697b ldr r3, [r7, #20] - 80366da: 881a ldrh r2, [r3, #0] - 80366dc: 68fb ldr r3, [r7, #12] - 80366de: 801a strh r2, [r3, #0] + 803675c: 697b ldr r3, [r7, #20] + 803675e: 881a ldrh r2, [r3, #0] + 8036760: 68fb ldr r3, [r7, #12] + 8036762: 801a strh r2, [r3, #0] mem2->prev = ptr; - 80366e0: 68fb ldr r3, [r7, #12] - 80366e2: 8bfa ldrh r2, [r7, #30] - 80366e4: 805a strh r2, [r3, #2] + 8036764: 68fb ldr r3, [r7, #12] + 8036766: 8bfa ldrh r2, [r7, #30] + 8036768: 805a strh r2, [r3, #2] /* and insert it between mem and mem->next */ mem->next = ptr2; - 80366e6: 697b ldr r3, [r7, #20] - 80366e8: 8a7a ldrh r2, [r7, #18] - 80366ea: 801a strh r2, [r3, #0] + 803676a: 697b ldr r3, [r7, #20] + 803676c: 8a7a ldrh r2, [r7, #18] + 803676e: 801a strh r2, [r3, #0] mem->used = 1; - 80366ec: 697b ldr r3, [r7, #20] - 80366ee: 2201 movs r2, #1 - 80366f0: 711a strb r2, [r3, #4] + 8036770: 697b ldr r3, [r7, #20] + 8036772: 2201 movs r2, #1 + 8036774: 711a strb r2, [r3, #4] if (mem2->next != MEM_SIZE_ALIGNED) { - 80366f2: 68fb ldr r3, [r7, #12] - 80366f4: 881b ldrh r3, [r3, #0] - 80366f6: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 - 80366fa: d00b beq.n 8036714 + 8036776: 68fb ldr r3, [r7, #12] + 8036778: 881b ldrh r3, [r3, #0] + 803677a: f5b3 6fc8 cmp.w r3, #1600 ; 0x640 + 803677e: d00b beq.n 8036798 ptr_to_mem(mem2->next)->prev = ptr2; - 80366fc: 68fb ldr r3, [r7, #12] - 80366fe: 881b ldrh r3, [r3, #0] - 8036700: 4618 mov r0, r3 - 8036702: f7ff fce9 bl 80360d8 - 8036706: 4602 mov r2, r0 - 8036708: 8a7b ldrh r3, [r7, #18] - 803670a: 8053 strh r3, [r2, #2] - 803670c: e002 b.n 8036714 + 8036780: 68fb ldr r3, [r7, #12] + 8036782: 881b ldrh r3, [r3, #0] + 8036784: 4618 mov r0, r3 + 8036786: f7ff fce9 bl 803615c + 803678a: 4602 mov r2, r0 + 803678c: 8a7b ldrh r3, [r7, #18] + 803678e: 8053 strh r3, [r2, #2] + 8036790: e002 b.n 8036798 * take care of this). * -> near fit or exact fit: do not split, no mem2 creation * also can't move mem->next directly behind mem, since mem->next * will always be used at this point! */ mem->used = 1; - 803670e: 697b ldr r3, [r7, #20] - 8036710: 2201 movs r2, #1 - 8036712: 711a strb r2, [r3, #4] + 8036792: 697b ldr r3, [r7, #20] + 8036794: 2201 movs r2, #1 + 8036796: 711a strb r2, [r3, #4] MEM_STATS_INC_USED(used, mem->next - mem_to_ptr(mem)); } #if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT mem_malloc_adjust_lfree: #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ if (mem == lfree) { - 8036714: 4b34 ldr r3, [pc, #208] ; (80367e8 ) - 8036716: 681b ldr r3, [r3, #0] - 8036718: 697a ldr r2, [r7, #20] - 803671a: 429a cmp r2, r3 - 803671c: d127 bne.n 803676e + 8036798: 4b34 ldr r3, [pc, #208] ; (803686c ) + 803679a: 681b ldr r3, [r3, #0] + 803679c: 697a ldr r2, [r7, #20] + 803679e: 429a cmp r2, r3 + 80367a0: d127 bne.n 80367f2 struct mem *cur = lfree; - 803671e: 4b32 ldr r3, [pc, #200] ; (80367e8 ) - 8036720: 681b ldr r3, [r3, #0] - 8036722: 61bb str r3, [r7, #24] + 80367a2: 4b32 ldr r3, [pc, #200] ; (803686c ) + 80367a4: 681b ldr r3, [r3, #0] + 80367a6: 61bb str r3, [r7, #24] /* Find next free block after mem and update lowest free pointer */ while (cur->used && cur != ram_end) { - 8036724: e005 b.n 8036732 + 80367a8: e005 b.n 80367b6 /* If mem_free or mem_trim have run, we have to restart since they could have altered our current struct mem or lfree. */ goto mem_malloc_adjust_lfree; } #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ cur = ptr_to_mem(cur->next); - 8036726: 69bb ldr r3, [r7, #24] - 8036728: 881b ldrh r3, [r3, #0] - 803672a: 4618 mov r0, r3 - 803672c: f7ff fcd4 bl 80360d8 - 8036730: 61b8 str r0, [r7, #24] + 80367aa: 69bb ldr r3, [r7, #24] + 80367ac: 881b ldrh r3, [r3, #0] + 80367ae: 4618 mov r0, r3 + 80367b0: f7ff fcd4 bl 803615c + 80367b4: 61b8 str r0, [r7, #24] while (cur->used && cur != ram_end) { - 8036732: 69bb ldr r3, [r7, #24] - 8036734: 791b ldrb r3, [r3, #4] - 8036736: 2b00 cmp r3, #0 - 8036738: d004 beq.n 8036744 - 803673a: 4b2f ldr r3, [pc, #188] ; (80367f8 ) - 803673c: 681b ldr r3, [r3, #0] - 803673e: 69ba ldr r2, [r7, #24] - 8036740: 429a cmp r2, r3 - 8036742: d1f0 bne.n 8036726 + 80367b6: 69bb ldr r3, [r7, #24] + 80367b8: 791b ldrb r3, [r3, #4] + 80367ba: 2b00 cmp r3, #0 + 80367bc: d004 beq.n 80367c8 + 80367be: 4b2f ldr r3, [pc, #188] ; (803687c ) + 80367c0: 681b ldr r3, [r3, #0] + 80367c2: 69ba ldr r2, [r7, #24] + 80367c4: 429a cmp r2, r3 + 80367c6: d1f0 bne.n 80367aa } lfree = cur; - 8036744: 4a28 ldr r2, [pc, #160] ; (80367e8 ) - 8036746: 69bb ldr r3, [r7, #24] - 8036748: 6013 str r3, [r2, #0] + 80367c8: 4a28 ldr r2, [pc, #160] ; (803686c ) + 80367ca: 69bb ldr r3, [r7, #24] + 80367cc: 6013 str r3, [r2, #0] LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used))); - 803674a: 4b27 ldr r3, [pc, #156] ; (80367e8 ) - 803674c: 681a ldr r2, [r3, #0] - 803674e: 4b2a ldr r3, [pc, #168] ; (80367f8 ) - 8036750: 681b ldr r3, [r3, #0] - 8036752: 429a cmp r2, r3 - 8036754: d00b beq.n 803676e - 8036756: 4b24 ldr r3, [pc, #144] ; (80367e8 ) - 8036758: 681b ldr r3, [r3, #0] - 803675a: 791b ldrb r3, [r3, #4] - 803675c: 2b00 cmp r3, #0 - 803675e: d006 beq.n 803676e - 8036760: 4b22 ldr r3, [pc, #136] ; (80367ec ) - 8036762: f240 32b5 movw r2, #949 ; 0x3b5 - 8036766: 4925 ldr r1, [pc, #148] ; (80367fc ) - 8036768: 4822 ldr r0, [pc, #136] ; (80367f4 ) - 803676a: f00a f9d1 bl 8040b10 + 80367ce: 4b27 ldr r3, [pc, #156] ; (803686c ) + 80367d0: 681a ldr r2, [r3, #0] + 80367d2: 4b2a ldr r3, [pc, #168] ; (803687c ) + 80367d4: 681b ldr r3, [r3, #0] + 80367d6: 429a cmp r2, r3 + 80367d8: d00b beq.n 80367f2 + 80367da: 4b24 ldr r3, [pc, #144] ; (803686c ) + 80367dc: 681b ldr r3, [r3, #0] + 80367de: 791b ldrb r3, [r3, #4] + 80367e0: 2b00 cmp r3, #0 + 80367e2: d006 beq.n 80367f2 + 80367e4: 4b22 ldr r3, [pc, #136] ; (8036870 ) + 80367e6: f240 32b5 movw r2, #949 ; 0x3b5 + 80367ea: 4925 ldr r1, [pc, #148] ; (8036880 ) + 80367ec: 4822 ldr r0, [pc, #136] ; (8036878 ) + 80367ee: f00a f9d1 bl 8040b94 } LWIP_MEM_ALLOC_UNPROTECT(); sys_mutex_unlock(&mem_mutex); LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.", - 803676e: 8bba ldrh r2, [r7, #28] - 8036770: 697b ldr r3, [r7, #20] - 8036772: 4413 add r3, r2 - 8036774: 3308 adds r3, #8 - 8036776: 4a20 ldr r2, [pc, #128] ; (80367f8 ) - 8036778: 6812 ldr r2, [r2, #0] - 803677a: 4293 cmp r3, r2 - 803677c: d906 bls.n 803678c - 803677e: 4b1b ldr r3, [pc, #108] ; (80367ec ) - 8036780: f240 32b9 movw r2, #953 ; 0x3b9 - 8036784: 491e ldr r1, [pc, #120] ; (8036800 ) - 8036786: 481b ldr r0, [pc, #108] ; (80367f4 ) - 8036788: f00a f9c2 bl 8040b10 + 80367f2: 8bba ldrh r2, [r7, #28] + 80367f4: 697b ldr r3, [r7, #20] + 80367f6: 4413 add r3, r2 + 80367f8: 3308 adds r3, #8 + 80367fa: 4a20 ldr r2, [pc, #128] ; (803687c ) + 80367fc: 6812 ldr r2, [r2, #0] + 80367fe: 4293 cmp r3, r2 + 8036800: d906 bls.n 8036810 + 8036802: 4b1b ldr r3, [pc, #108] ; (8036870 ) + 8036804: f240 32b9 movw r2, #953 ; 0x3b9 + 8036808: 491e ldr r1, [pc, #120] ; (8036884 ) + 803680a: 481b ldr r0, [pc, #108] ; (8036878 ) + 803680c: f00a f9c2 bl 8040b94 (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end); LWIP_ASSERT("mem_malloc: allocated memory properly aligned.", - 803678c: 697b ldr r3, [r7, #20] - 803678e: f003 0303 and.w r3, r3, #3 - 8036792: 2b00 cmp r3, #0 - 8036794: d006 beq.n 80367a4 - 8036796: 4b15 ldr r3, [pc, #84] ; (80367ec ) - 8036798: f240 32bb movw r2, #955 ; 0x3bb - 803679c: 4919 ldr r1, [pc, #100] ; (8036804 ) - 803679e: 4815 ldr r0, [pc, #84] ; (80367f4 ) - 80367a0: f00a f9b6 bl 8040b10 + 8036810: 697b ldr r3, [r7, #20] + 8036812: f003 0303 and.w r3, r3, #3 + 8036816: 2b00 cmp r3, #0 + 8036818: d006 beq.n 8036828 + 803681a: 4b15 ldr r3, [pc, #84] ; (8036870 ) + 803681c: f240 32bb movw r2, #955 ; 0x3bb + 8036820: 4919 ldr r1, [pc, #100] ; (8036888 ) + 8036822: 4815 ldr r0, [pc, #84] ; (8036878 ) + 8036824: f00a f9b6 bl 8040b94 ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0); LWIP_ASSERT("mem_malloc: sanity check alignment", - 80367a4: 697b ldr r3, [r7, #20] - 80367a6: f003 0303 and.w r3, r3, #3 - 80367aa: 2b00 cmp r3, #0 - 80367ac: d006 beq.n 80367bc - 80367ae: 4b0f ldr r3, [pc, #60] ; (80367ec ) - 80367b0: f240 32bd movw r2, #957 ; 0x3bd - 80367b4: 4914 ldr r1, [pc, #80] ; (8036808 ) - 80367b6: 480f ldr r0, [pc, #60] ; (80367f4 ) - 80367b8: f00a f9aa bl 8040b10 + 8036828: 697b ldr r3, [r7, #20] + 803682a: f003 0303 and.w r3, r3, #3 + 803682e: 2b00 cmp r3, #0 + 8036830: d006 beq.n 8036840 + 8036832: 4b0f ldr r3, [pc, #60] ; (8036870 ) + 8036834: f240 32bd movw r2, #957 ; 0x3bd + 8036838: 4914 ldr r1, [pc, #80] ; (803688c ) + 803683a: 480f ldr r0, [pc, #60] ; (8036878 ) + 803683c: f00a f9aa bl 8040b94 #if MEM_OVERFLOW_CHECK mem_overflow_init_element(mem, size_in); #endif MEM_SANITY(); return (u8_t *)mem + SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET; - 80367bc: 697b ldr r3, [r7, #20] - 80367be: 3308 adds r3, #8 - 80367c0: e00e b.n 80367e0 + 8036840: 697b ldr r3, [r7, #20] + 8036842: 3308 adds r3, #8 + 8036844: e00e b.n 8036864 ptr = ptr_to_mem(ptr)->next) { - 80367c2: 8bfb ldrh r3, [r7, #30] - 80367c4: 4618 mov r0, r3 - 80367c6: f7ff fc87 bl 80360d8 - 80367ca: 4603 mov r3, r0 - 80367cc: 881b ldrh r3, [r3, #0] - 80367ce: 83fb strh r3, [r7, #30] + 8036846: 8bfb ldrh r3, [r7, #30] + 8036848: 4618 mov r0, r3 + 803684a: f7ff fc87 bl 803615c + 803684e: 4603 mov r3, r0 + 8036850: 881b ldrh r3, [r3, #0] + 8036852: 83fb strh r3, [r7, #30] for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size; - 80367d0: 8bfa ldrh r2, [r7, #30] - 80367d2: 8bbb ldrh r3, [r7, #28] - 80367d4: f5c3 63c8 rsb r3, r3, #1600 ; 0x640 - 80367d8: 429a cmp r2, r3 - 80367da: f4ff af44 bcc.w 8036666 + 8036854: 8bfa ldrh r2, [r7, #30] + 8036856: 8bbb ldrh r3, [r7, #28] + 8036858: f5c3 63c8 rsb r3, r3, #1600 ; 0x640 + 803685c: 429a cmp r2, r3 + 803685e: f4ff af44 bcc.w 80366ea #endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ MEM_STATS_INC(err); LWIP_MEM_ALLOC_UNPROTECT(); sys_mutex_unlock(&mem_mutex); LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size)); return NULL; - 80367de: 2300 movs r3, #0 -} - 80367e0: 4618 mov r0, r3 - 80367e2: 3720 adds r7, #32 - 80367e4: 46bd mov sp, r7 - 80367e6: bd80 pop {r7, pc} - 80367e8: 2400b9dc .word 0x2400b9dc - 80367ec: 08042320 .word 0x08042320 - 80367f0: 080424c8 .word 0x080424c8 - 80367f4: 08042368 .word 0x08042368 - 80367f8: 2400b9d8 .word 0x2400b9d8 - 80367fc: 080424dc .word 0x080424dc - 8036800: 080424f8 .word 0x080424f8 - 8036804: 08042528 .word 0x08042528 - 8036808: 08042558 .word 0x08042558 - -0803680c : + 8036862: 2300 movs r3, #0 +} + 8036864: 4618 mov r0, r3 + 8036866: 3720 adds r7, #32 + 8036868: 46bd mov sp, r7 + 803686a: bd80 pop {r7, pc} + 803686c: 2400b9e4 .word 0x2400b9e4 + 8036870: 080423a0 .word 0x080423a0 + 8036874: 08042548 .word 0x08042548 + 8036878: 080423e8 .word 0x080423e8 + 803687c: 2400b9e0 .word 0x2400b9e0 + 8036880: 0804255c .word 0x0804255c + 8036884: 08042578 .word 0x08042578 + 8036888: 080425a8 .word 0x080425a8 + 803688c: 080425d8 .word 0x080425d8 + +08036890 : * * @param desc pool to initialize */ void memp_init_pool(const struct memp_desc *desc) { - 803680c: b480 push {r7} - 803680e: b085 sub sp, #20 - 8036810: af00 add r7, sp, #0 - 8036812: 6078 str r0, [r7, #4] + 8036890: b480 push {r7} + 8036892: b085 sub sp, #20 + 8036894: af00 add r7, sp, #0 + 8036896: 6078 str r0, [r7, #4] LWIP_UNUSED_ARG(desc); #else int i; struct memp *memp; *desc->tab = NULL; - 8036814: 687b ldr r3, [r7, #4] - 8036816: 689b ldr r3, [r3, #8] - 8036818: 2200 movs r2, #0 - 803681a: 601a str r2, [r3, #0] + 8036898: 687b ldr r3, [r7, #4] + 803689a: 689b ldr r3, [r3, #8] + 803689c: 2200 movs r2, #0 + 803689e: 601a str r2, [r3, #0] memp = (struct memp *)LWIP_MEM_ALIGN(desc->base); - 803681c: 687b ldr r3, [r7, #4] - 803681e: 685b ldr r3, [r3, #4] - 8036820: 3303 adds r3, #3 - 8036822: f023 0303 bic.w r3, r3, #3 - 8036826: 60bb str r3, [r7, #8] + 80368a0: 687b ldr r3, [r7, #4] + 80368a2: 685b ldr r3, [r3, #4] + 80368a4: 3303 adds r3, #3 + 80368a6: f023 0303 bic.w r3, r3, #3 + 80368aa: 60bb str r3, [r7, #8] + MEM_SANITY_REGION_AFTER_ALIGNED #endif )); #endif /* create a linked list of memp elements */ for (i = 0; i < desc->num; ++i) { - 8036828: 2300 movs r3, #0 - 803682a: 60fb str r3, [r7, #12] - 803682c: e011 b.n 8036852 + 80368ac: 2300 movs r3, #0 + 80368ae: 60fb str r3, [r7, #12] + 80368b0: e011 b.n 80368d6 memp->next = *desc->tab; - 803682e: 687b ldr r3, [r7, #4] - 8036830: 689b ldr r3, [r3, #8] - 8036832: 681a ldr r2, [r3, #0] - 8036834: 68bb ldr r3, [r7, #8] - 8036836: 601a str r2, [r3, #0] + 80368b2: 687b ldr r3, [r7, #4] + 80368b4: 689b ldr r3, [r3, #8] + 80368b6: 681a ldr r2, [r3, #0] + 80368b8: 68bb ldr r3, [r7, #8] + 80368ba: 601a str r2, [r3, #0] *desc->tab = memp; - 8036838: 687b ldr r3, [r7, #4] - 803683a: 689b ldr r3, [r3, #8] - 803683c: 68ba ldr r2, [r7, #8] - 803683e: 601a str r2, [r3, #0] + 80368bc: 687b ldr r3, [r7, #4] + 80368be: 689b ldr r3, [r3, #8] + 80368c0: 68ba ldr r2, [r7, #8] + 80368c2: 601a str r2, [r3, #0] #if MEMP_OVERFLOW_CHECK memp_overflow_init_element(memp, desc); #endif /* MEMP_OVERFLOW_CHECK */ /* cast through void* to get rid of alignment warnings */ memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + desc->size - 8036840: 687b ldr r3, [r7, #4] - 8036842: 881b ldrh r3, [r3, #0] - 8036844: 461a mov r2, r3 - 8036846: 68bb ldr r3, [r7, #8] - 8036848: 4413 add r3, r2 - 803684a: 60bb str r3, [r7, #8] + 80368c4: 687b ldr r3, [r7, #4] + 80368c6: 881b ldrh r3, [r3, #0] + 80368c8: 461a mov r2, r3 + 80368ca: 68bb ldr r3, [r7, #8] + 80368cc: 4413 add r3, r2 + 80368ce: 60bb str r3, [r7, #8] for (i = 0; i < desc->num; ++i) { - 803684c: 68fb ldr r3, [r7, #12] - 803684e: 3301 adds r3, #1 - 8036850: 60fb str r3, [r7, #12] - 8036852: 687b ldr r3, [r7, #4] - 8036854: 885b ldrh r3, [r3, #2] - 8036856: 461a mov r2, r3 - 8036858: 68fb ldr r3, [r7, #12] - 803685a: 4293 cmp r3, r2 - 803685c: dbe7 blt.n 803682e + 80368d0: 68fb ldr r3, [r7, #12] + 80368d2: 3301 adds r3, #1 + 80368d4: 60fb str r3, [r7, #12] + 80368d6: 687b ldr r3, [r7, #4] + 80368d8: 885b ldrh r3, [r3, #2] + 80368da: 461a mov r2, r3 + 80368dc: 68fb ldr r3, [r7, #12] + 80368de: 4293 cmp r3, r2 + 80368e0: dbe7 blt.n 80368b2 #endif /* !MEMP_MEM_MALLOC */ #if MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) desc->stats->name = desc->desc; #endif /* MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) */ } - 803685e: bf00 nop - 8036860: bf00 nop - 8036862: 3714 adds r7, #20 - 8036864: 46bd mov sp, r7 - 8036866: f85d 7b04 ldr.w r7, [sp], #4 - 803686a: 4770 bx lr + 80368e2: bf00 nop + 80368e4: bf00 nop + 80368e6: 3714 adds r7, #20 + 80368e8: 46bd mov sp, r7 + 80368ea: f85d 7b04 ldr.w r7, [sp], #4 + 80368ee: 4770 bx lr -0803686c : +080368f0 : * * Carves out memp_memory into linked lists for each pool-type. */ void memp_init(void) { - 803686c: b580 push {r7, lr} - 803686e: b082 sub sp, #8 - 8036870: af00 add r7, sp, #0 + 80368f0: b580 push {r7, lr} + 80368f2: b082 sub sp, #8 + 80368f4: af00 add r7, sp, #0 u16_t i; /* for every pool: */ for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) { - 8036872: 2300 movs r3, #0 - 8036874: 80fb strh r3, [r7, #6] - 8036876: e009 b.n 803688c + 80368f6: 2300 movs r3, #0 + 80368f8: 80fb strh r3, [r7, #6] + 80368fa: e009 b.n 8036910 memp_init_pool(memp_pools[i]); - 8036878: 88fb ldrh r3, [r7, #6] - 803687a: 4a08 ldr r2, [pc, #32] ; (803689c ) - 803687c: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8036880: 4618 mov r0, r3 - 8036882: f7ff ffc3 bl 803680c + 80368fc: 88fb ldrh r3, [r7, #6] + 80368fe: 4a08 ldr r2, [pc, #32] ; (8036920 ) + 8036900: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8036904: 4618 mov r0, r3 + 8036906: f7ff ffc3 bl 8036890 for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) { - 8036886: 88fb ldrh r3, [r7, #6] - 8036888: 3301 adds r3, #1 - 803688a: 80fb strh r3, [r7, #6] - 803688c: 88fb ldrh r3, [r7, #6] - 803688e: 2b08 cmp r3, #8 - 8036890: d9f2 bls.n 8036878 + 803690a: 88fb ldrh r3, [r7, #6] + 803690c: 3301 adds r3, #1 + 803690e: 80fb strh r3, [r7, #6] + 8036910: 88fb ldrh r3, [r7, #6] + 8036912: 2b08 cmp r3, #8 + 8036914: d9f2 bls.n 80368fc #if MEMP_OVERFLOW_CHECK >= 2 /* check everything a first time to see if it worked */ memp_overflow_check_all(); #endif /* MEMP_OVERFLOW_CHECK >= 2 */ } - 8036892: bf00 nop - 8036894: bf00 nop - 8036896: 3708 adds r7, #8 - 8036898: 46bd mov sp, r7 - 803689a: bd80 pop {r7, pc} - 803689c: 08044d9c .word 0x08044d9c + 8036916: bf00 nop + 8036918: bf00 nop + 803691a: 3708 adds r7, #8 + 803691c: 46bd mov sp, r7 + 803691e: bd80 pop {r7, pc} + 8036920: 08044e1c .word 0x08044e1c -080368a0 : +08036924 : #if !MEMP_OVERFLOW_CHECK do_memp_malloc_pool(const struct memp_desc *desc) #else do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line) #endif { - 80368a0: b580 push {r7, lr} - 80368a2: b084 sub sp, #16 - 80368a4: af00 add r7, sp, #0 - 80368a6: 6078 str r0, [r7, #4] + 8036924: b580 push {r7, lr} + 8036926: b084 sub sp, #16 + 8036928: af00 add r7, sp, #0 + 803692a: 6078 str r0, [r7, #4] memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size)); SYS_ARCH_PROTECT(old_level); #else /* MEMP_MEM_MALLOC */ SYS_ARCH_PROTECT(old_level); memp = *desc->tab; - 80368a8: 687b ldr r3, [r7, #4] - 80368aa: 689b ldr r3, [r3, #8] - 80368ac: 681b ldr r3, [r3, #0] - 80368ae: 60fb str r3, [r7, #12] + 803692c: 687b ldr r3, [r7, #4] + 803692e: 689b ldr r3, [r3, #8] + 8036930: 681b ldr r3, [r3, #0] + 8036932: 60fb str r3, [r7, #12] #endif /* MEMP_MEM_MALLOC */ if (memp != NULL) { - 80368b0: 68fb ldr r3, [r7, #12] - 80368b2: 2b00 cmp r3, #0 - 80368b4: d012 beq.n 80368dc + 8036934: 68fb ldr r3, [r7, #12] + 8036936: 2b00 cmp r3, #0 + 8036938: d012 beq.n 8036960 #if !MEMP_MEM_MALLOC #if MEMP_OVERFLOW_CHECK == 1 memp_overflow_check_element(memp, desc); #endif /* MEMP_OVERFLOW_CHECK */ *desc->tab = memp->next; - 80368b6: 687b ldr r3, [r7, #4] - 80368b8: 689b ldr r3, [r3, #8] - 80368ba: 68fa ldr r2, [r7, #12] - 80368bc: 6812 ldr r2, [r2, #0] - 80368be: 601a str r2, [r3, #0] + 803693a: 687b ldr r3, [r7, #4] + 803693c: 689b ldr r3, [r3, #8] + 803693e: 68fa ldr r2, [r7, #12] + 8036940: 6812 ldr r2, [r2, #0] + 8036942: 601a str r2, [r3, #0] memp->line = line; #if MEMP_MEM_MALLOC memp_overflow_init_element(memp, desc); #endif /* MEMP_MEM_MALLOC */ #endif /* MEMP_OVERFLOW_CHECK */ LWIP_ASSERT("memp_malloc: memp properly aligned", - 80368c0: 68fb ldr r3, [r7, #12] - 80368c2: f003 0303 and.w r3, r3, #3 - 80368c6: 2b00 cmp r3, #0 - 80368c8: d006 beq.n 80368d8 - 80368ca: 4b07 ldr r3, [pc, #28] ; (80368e8 ) - 80368cc: f44f 728c mov.w r2, #280 ; 0x118 - 80368d0: 4906 ldr r1, [pc, #24] ; (80368ec ) - 80368d2: 4807 ldr r0, [pc, #28] ; (80368f0 ) - 80368d4: f00a f91c bl 8040b10 + 8036944: 68fb ldr r3, [r7, #12] + 8036946: f003 0303 and.w r3, r3, #3 + 803694a: 2b00 cmp r3, #0 + 803694c: d006 beq.n 803695c + 803694e: 4b07 ldr r3, [pc, #28] ; (803696c ) + 8036950: f44f 728c mov.w r2, #280 ; 0x118 + 8036954: 4906 ldr r1, [pc, #24] ; (8036970 ) + 8036956: 4807 ldr r0, [pc, #28] ; (8036974 ) + 8036958: f00a f91c bl 8040b94 desc->stats->max = desc->stats->used; } #endif SYS_ARCH_UNPROTECT(old_level); /* cast through u8_t* to get rid of alignment warnings */ return ((u8_t *)memp + MEMP_SIZE); - 80368d8: 68fb ldr r3, [r7, #12] - 80368da: e000 b.n 80368de + 803695c: 68fb ldr r3, [r7, #12] + 803695e: e000 b.n 8036962 #endif SYS_ARCH_UNPROTECT(old_level); LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", desc->desc)); } return NULL; - 80368dc: 2300 movs r3, #0 -} - 80368de: 4618 mov r0, r3 - 80368e0: 3710 adds r7, #16 - 80368e2: 46bd mov sp, r7 - 80368e4: bd80 pop {r7, pc} - 80368e6: bf00 nop - 80368e8: 0804257c .word 0x0804257c - 80368ec: 080425ac .word 0x080425ac - 80368f0: 080425d0 .word 0x080425d0 - -080368f4 : + 8036960: 2300 movs r3, #0 +} + 8036962: 4618 mov r0, r3 + 8036964: 3710 adds r7, #16 + 8036966: 46bd mov sp, r7 + 8036968: bd80 pop {r7, pc} + 803696a: bf00 nop + 803696c: 080425fc .word 0x080425fc + 8036970: 0804262c .word 0x0804262c + 8036974: 08042650 .word 0x08042650 + +08036978 : #if !MEMP_OVERFLOW_CHECK memp_malloc_pool(const struct memp_desc *desc) #else memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line) #endif { - 80368f4: b580 push {r7, lr} - 80368f6: b082 sub sp, #8 - 80368f8: af00 add r7, sp, #0 - 80368fa: 6078 str r0, [r7, #4] + 8036978: b580 push {r7, lr} + 803697a: b082 sub sp, #8 + 803697c: af00 add r7, sp, #0 + 803697e: 6078 str r0, [r7, #4] LWIP_ASSERT("invalid pool desc", desc != NULL); - 80368fc: 687b ldr r3, [r7, #4] - 80368fe: 2b00 cmp r3, #0 - 8036900: d106 bne.n 8036910 - 8036902: 4b0a ldr r3, [pc, #40] ; (803692c ) - 8036904: f44f 729e mov.w r2, #316 ; 0x13c - 8036908: 4909 ldr r1, [pc, #36] ; (8036930 ) - 803690a: 480a ldr r0, [pc, #40] ; (8036934 ) - 803690c: f00a f900 bl 8040b10 + 8036980: 687b ldr r3, [r7, #4] + 8036982: 2b00 cmp r3, #0 + 8036984: d106 bne.n 8036994 + 8036986: 4b0a ldr r3, [pc, #40] ; (80369b0 ) + 8036988: f44f 729e mov.w r2, #316 ; 0x13c + 803698c: 4909 ldr r1, [pc, #36] ; (80369b4 ) + 803698e: 480a ldr r0, [pc, #40] ; (80369b8 ) + 8036990: f00a f900 bl 8040b94 if (desc == NULL) { - 8036910: 687b ldr r3, [r7, #4] - 8036912: 2b00 cmp r3, #0 - 8036914: d101 bne.n 803691a + 8036994: 687b ldr r3, [r7, #4] + 8036996: 2b00 cmp r3, #0 + 8036998: d101 bne.n 803699e return NULL; - 8036916: 2300 movs r3, #0 - 8036918: e003 b.n 8036922 + 803699a: 2300 movs r3, #0 + 803699c: e003 b.n 80369a6 } #if !MEMP_OVERFLOW_CHECK return do_memp_malloc_pool(desc); - 803691a: 6878 ldr r0, [r7, #4] - 803691c: f7ff ffc0 bl 80368a0 - 8036920: 4603 mov r3, r0 + 803699e: 6878 ldr r0, [r7, #4] + 80369a0: f7ff ffc0 bl 8036924 + 80369a4: 4603 mov r3, r0 #else return do_memp_malloc_pool_fn(desc, file, line); #endif } - 8036922: 4618 mov r0, r3 - 8036924: 3708 adds r7, #8 - 8036926: 46bd mov sp, r7 - 8036928: bd80 pop {r7, pc} - 803692a: bf00 nop - 803692c: 0804257c .word 0x0804257c - 8036930: 080425f8 .word 0x080425f8 - 8036934: 080425d0 .word 0x080425d0 + 80369a6: 4618 mov r0, r3 + 80369a8: 3708 adds r7, #8 + 80369aa: 46bd mov sp, r7 + 80369ac: bd80 pop {r7, pc} + 80369ae: bf00 nop + 80369b0: 080425fc .word 0x080425fc + 80369b4: 08042678 .word 0x08042678 + 80369b8: 08042650 .word 0x08042650 -08036938 : +080369bc : #if !MEMP_OVERFLOW_CHECK memp_malloc(memp_t type) #else memp_malloc_fn(memp_t type, const char *file, const int line) #endif { - 8036938: b580 push {r7, lr} - 803693a: b084 sub sp, #16 - 803693c: af00 add r7, sp, #0 - 803693e: 4603 mov r3, r0 - 8036940: 71fb strb r3, [r7, #7] + 80369bc: b580 push {r7, lr} + 80369be: b084 sub sp, #16 + 80369c0: af00 add r7, sp, #0 + 80369c2: 4603 mov r3, r0 + 80369c4: 71fb strb r3, [r7, #7] void *memp; LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;); - 8036942: 79fb ldrb r3, [r7, #7] - 8036944: 2b08 cmp r3, #8 - 8036946: d908 bls.n 803695a - 8036948: 4b0a ldr r3, [pc, #40] ; (8036974 ) - 803694a: f240 1257 movw r2, #343 ; 0x157 - 803694e: 490a ldr r1, [pc, #40] ; (8036978 ) - 8036950: 480a ldr r0, [pc, #40] ; (803697c ) - 8036952: f00a f8dd bl 8040b10 - 8036956: 2300 movs r3, #0 - 8036958: e008 b.n 803696c + 80369c6: 79fb ldrb r3, [r7, #7] + 80369c8: 2b08 cmp r3, #8 + 80369ca: d908 bls.n 80369de + 80369cc: 4b0a ldr r3, [pc, #40] ; (80369f8 ) + 80369ce: f240 1257 movw r2, #343 ; 0x157 + 80369d2: 490a ldr r1, [pc, #40] ; (80369fc ) + 80369d4: 480a ldr r0, [pc, #40] ; (8036a00 ) + 80369d6: f00a f8dd bl 8040b94 + 80369da: 2300 movs r3, #0 + 80369dc: e008 b.n 80369f0 #if MEMP_OVERFLOW_CHECK >= 2 memp_overflow_check_all(); #endif /* MEMP_OVERFLOW_CHECK >= 2 */ #if !MEMP_OVERFLOW_CHECK memp = do_memp_malloc_pool(memp_pools[type]); - 803695a: 79fb ldrb r3, [r7, #7] - 803695c: 4a08 ldr r2, [pc, #32] ; (8036980 ) - 803695e: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8036962: 4618 mov r0, r3 - 8036964: f7ff ff9c bl 80368a0 - 8036968: 60f8 str r0, [r7, #12] + 80369de: 79fb ldrb r3, [r7, #7] + 80369e0: 4a08 ldr r2, [pc, #32] ; (8036a04 ) + 80369e2: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 80369e6: 4618 mov r0, r3 + 80369e8: f7ff ff9c bl 8036924 + 80369ec: 60f8 str r0, [r7, #12] #else memp = do_memp_malloc_pool_fn(memp_pools[type], file, line); #endif return memp; - 803696a: 68fb ldr r3, [r7, #12] + 80369ee: 68fb ldr r3, [r7, #12] } - 803696c: 4618 mov r0, r3 - 803696e: 3710 adds r7, #16 - 8036970: 46bd mov sp, r7 - 8036972: bd80 pop {r7, pc} - 8036974: 0804257c .word 0x0804257c - 8036978: 0804260c .word 0x0804260c - 803697c: 080425d0 .word 0x080425d0 - 8036980: 08044d9c .word 0x08044d9c + 80369f0: 4618 mov r0, r3 + 80369f2: 3710 adds r7, #16 + 80369f4: 46bd mov sp, r7 + 80369f6: bd80 pop {r7, pc} + 80369f8: 080425fc .word 0x080425fc + 80369fc: 0804268c .word 0x0804268c + 8036a00: 08042650 .word 0x08042650 + 8036a04: 08044e1c .word 0x08044e1c -08036984 : +08036a08 : static void do_memp_free_pool(const struct memp_desc *desc, void *mem) { - 8036984: b580 push {r7, lr} - 8036986: b084 sub sp, #16 - 8036988: af00 add r7, sp, #0 - 803698a: 6078 str r0, [r7, #4] - 803698c: 6039 str r1, [r7, #0] + 8036a08: b580 push {r7, lr} + 8036a0a: b084 sub sp, #16 + 8036a0c: af00 add r7, sp, #0 + 8036a0e: 6078 str r0, [r7, #4] + 8036a10: 6039 str r1, [r7, #0] struct memp *memp; SYS_ARCH_DECL_PROTECT(old_level); LWIP_ASSERT("memp_free: mem properly aligned", - 803698e: 683b ldr r3, [r7, #0] - 8036990: f003 0303 and.w r3, r3, #3 - 8036994: 2b00 cmp r3, #0 - 8036996: d006 beq.n 80369a6 - 8036998: 4b0a ldr r3, [pc, #40] ; (80369c4 ) - 803699a: f44f 72b6 mov.w r2, #364 ; 0x16c - 803699e: 490a ldr r1, [pc, #40] ; (80369c8 ) - 80369a0: 480a ldr r0, [pc, #40] ; (80369cc ) - 80369a2: f00a f8b5 bl 8040b10 + 8036a12: 683b ldr r3, [r7, #0] + 8036a14: f003 0303 and.w r3, r3, #3 + 8036a18: 2b00 cmp r3, #0 + 8036a1a: d006 beq.n 8036a2a + 8036a1c: 4b0a ldr r3, [pc, #40] ; (8036a48 ) + 8036a1e: f44f 72b6 mov.w r2, #364 ; 0x16c + 8036a22: 490a ldr r1, [pc, #40] ; (8036a4c ) + 8036a24: 480a ldr r0, [pc, #40] ; (8036a50 ) + 8036a26: f00a f8b5 bl 8040b94 ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0); /* cast through void* to get rid of alignment warnings */ memp = (struct memp *)(void *)((u8_t *)mem - MEMP_SIZE); - 80369a6: 683b ldr r3, [r7, #0] - 80369a8: 60fb str r3, [r7, #12] + 8036a2a: 683b ldr r3, [r7, #0] + 8036a2c: 60fb str r3, [r7, #12] #if MEMP_MEM_MALLOC LWIP_UNUSED_ARG(desc); SYS_ARCH_UNPROTECT(old_level); mem_free(memp); #else /* MEMP_MEM_MALLOC */ memp->next = *desc->tab; - 80369aa: 687b ldr r3, [r7, #4] - 80369ac: 689b ldr r3, [r3, #8] - 80369ae: 681a ldr r2, [r3, #0] - 80369b0: 68fb ldr r3, [r7, #12] - 80369b2: 601a str r2, [r3, #0] + 8036a2e: 687b ldr r3, [r7, #4] + 8036a30: 689b ldr r3, [r3, #8] + 8036a32: 681a ldr r2, [r3, #0] + 8036a34: 68fb ldr r3, [r7, #12] + 8036a36: 601a str r2, [r3, #0] *desc->tab = memp; - 80369b4: 687b ldr r3, [r7, #4] - 80369b6: 689b ldr r3, [r3, #8] - 80369b8: 68fa ldr r2, [r7, #12] - 80369ba: 601a str r2, [r3, #0] + 8036a38: 687b ldr r3, [r7, #4] + 8036a3a: 689b ldr r3, [r3, #8] + 8036a3c: 68fa ldr r2, [r7, #12] + 8036a3e: 601a str r2, [r3, #0] LWIP_ASSERT("memp sanity", memp_sanity(desc)); #endif /* MEMP_SANITY_CHECK */ SYS_ARCH_UNPROTECT(old_level); #endif /* !MEMP_MEM_MALLOC */ } - 80369bc: bf00 nop - 80369be: 3710 adds r7, #16 - 80369c0: 46bd mov sp, r7 - 80369c2: bd80 pop {r7, pc} - 80369c4: 0804257c .word 0x0804257c - 80369c8: 0804262c .word 0x0804262c - 80369cc: 080425d0 .word 0x080425d0 + 8036a40: bf00 nop + 8036a42: 3710 adds r7, #16 + 8036a44: 46bd mov sp, r7 + 8036a46: bd80 pop {r7, pc} + 8036a48: 080425fc .word 0x080425fc + 8036a4c: 080426ac .word 0x080426ac + 8036a50: 08042650 .word 0x08042650 -080369d0 : +08036a54 : * @param desc the pool where to put mem * @param mem the memp element to free */ void memp_free_pool(const struct memp_desc *desc, void *mem) { - 80369d0: b580 push {r7, lr} - 80369d2: b082 sub sp, #8 - 80369d4: af00 add r7, sp, #0 - 80369d6: 6078 str r0, [r7, #4] - 80369d8: 6039 str r1, [r7, #0] + 8036a54: b580 push {r7, lr} + 8036a56: b082 sub sp, #8 + 8036a58: af00 add r7, sp, #0 + 8036a5a: 6078 str r0, [r7, #4] + 8036a5c: 6039 str r1, [r7, #0] LWIP_ASSERT("invalid pool desc", desc != NULL); - 80369da: 687b ldr r3, [r7, #4] - 80369dc: 2b00 cmp r3, #0 - 80369de: d106 bne.n 80369ee - 80369e0: 4b0a ldr r3, [pc, #40] ; (8036a0c ) - 80369e2: f240 1295 movw r2, #405 ; 0x195 - 80369e6: 490a ldr r1, [pc, #40] ; (8036a10 ) - 80369e8: 480a ldr r0, [pc, #40] ; (8036a14 ) - 80369ea: f00a f891 bl 8040b10 + 8036a5e: 687b ldr r3, [r7, #4] + 8036a60: 2b00 cmp r3, #0 + 8036a62: d106 bne.n 8036a72 + 8036a64: 4b0a ldr r3, [pc, #40] ; (8036a90 ) + 8036a66: f240 1295 movw r2, #405 ; 0x195 + 8036a6a: 490a ldr r1, [pc, #40] ; (8036a94 ) + 8036a6c: 480a ldr r0, [pc, #40] ; (8036a98 ) + 8036a6e: f00a f891 bl 8040b94 if ((desc == NULL) || (mem == NULL)) { - 80369ee: 687b ldr r3, [r7, #4] - 80369f0: 2b00 cmp r3, #0 - 80369f2: d007 beq.n 8036a04 - 80369f4: 683b ldr r3, [r7, #0] - 80369f6: 2b00 cmp r3, #0 - 80369f8: d004 beq.n 8036a04 + 8036a72: 687b ldr r3, [r7, #4] + 8036a74: 2b00 cmp r3, #0 + 8036a76: d007 beq.n 8036a88 + 8036a78: 683b ldr r3, [r7, #0] + 8036a7a: 2b00 cmp r3, #0 + 8036a7c: d004 beq.n 8036a88 return; } do_memp_free_pool(desc, mem); - 80369fa: 6839 ldr r1, [r7, #0] - 80369fc: 6878 ldr r0, [r7, #4] - 80369fe: f7ff ffc1 bl 8036984 - 8036a02: e000 b.n 8036a06 + 8036a7e: 6839 ldr r1, [r7, #0] + 8036a80: 6878 ldr r0, [r7, #4] + 8036a82: f7ff ffc1 bl 8036a08 + 8036a86: e000 b.n 8036a8a return; - 8036a04: bf00 nop + 8036a88: bf00 nop } - 8036a06: 3708 adds r7, #8 - 8036a08: 46bd mov sp, r7 - 8036a0a: bd80 pop {r7, pc} - 8036a0c: 0804257c .word 0x0804257c - 8036a10: 080425f8 .word 0x080425f8 - 8036a14: 080425d0 .word 0x080425d0 + 8036a8a: 3708 adds r7, #8 + 8036a8c: 46bd mov sp, r7 + 8036a8e: bd80 pop {r7, pc} + 8036a90: 080425fc .word 0x080425fc + 8036a94: 08042678 .word 0x08042678 + 8036a98: 08042650 .word 0x08042650 -08036a18 : +08036a9c : * @param type the pool where to put mem * @param mem the memp element to free */ void memp_free(memp_t type, void *mem) { - 8036a18: b580 push {r7, lr} - 8036a1a: b082 sub sp, #8 - 8036a1c: af00 add r7, sp, #0 - 8036a1e: 4603 mov r3, r0 - 8036a20: 6039 str r1, [r7, #0] - 8036a22: 71fb strb r3, [r7, #7] + 8036a9c: b580 push {r7, lr} + 8036a9e: b082 sub sp, #8 + 8036aa0: af00 add r7, sp, #0 + 8036aa2: 4603 mov r3, r0 + 8036aa4: 6039 str r1, [r7, #0] + 8036aa6: 71fb strb r3, [r7, #7] #ifdef LWIP_HOOK_MEMP_AVAILABLE struct memp *old_first; #endif LWIP_ERROR("memp_free: type < MEMP_MAX", (type < MEMP_MAX), return;); - 8036a24: 79fb ldrb r3, [r7, #7] - 8036a26: 2b08 cmp r3, #8 - 8036a28: d907 bls.n 8036a3a - 8036a2a: 4b0c ldr r3, [pc, #48] ; (8036a5c ) - 8036a2c: f44f 72d5 mov.w r2, #426 ; 0x1aa - 8036a30: 490b ldr r1, [pc, #44] ; (8036a60 ) - 8036a32: 480c ldr r0, [pc, #48] ; (8036a64 ) - 8036a34: f00a f86c bl 8040b10 - 8036a38: e00c b.n 8036a54 + 8036aa8: 79fb ldrb r3, [r7, #7] + 8036aaa: 2b08 cmp r3, #8 + 8036aac: d907 bls.n 8036abe + 8036aae: 4b0c ldr r3, [pc, #48] ; (8036ae0 ) + 8036ab0: f44f 72d5 mov.w r2, #426 ; 0x1aa + 8036ab4: 490b ldr r1, [pc, #44] ; (8036ae4 ) + 8036ab6: 480c ldr r0, [pc, #48] ; (8036ae8 ) + 8036ab8: f00a f86c bl 8040b94 + 8036abc: e00c b.n 8036ad8 if (mem == NULL) { - 8036a3a: 683b ldr r3, [r7, #0] - 8036a3c: 2b00 cmp r3, #0 - 8036a3e: d008 beq.n 8036a52 + 8036abe: 683b ldr r3, [r7, #0] + 8036ac0: 2b00 cmp r3, #0 + 8036ac2: d008 beq.n 8036ad6 #ifdef LWIP_HOOK_MEMP_AVAILABLE old_first = *memp_pools[type]->tab; #endif do_memp_free_pool(memp_pools[type], mem); - 8036a40: 79fb ldrb r3, [r7, #7] - 8036a42: 4a09 ldr r2, [pc, #36] ; (8036a68 ) - 8036a44: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8036a48: 6839 ldr r1, [r7, #0] - 8036a4a: 4618 mov r0, r3 - 8036a4c: f7ff ff9a bl 8036984 - 8036a50: e000 b.n 8036a54 + 8036ac4: 79fb ldrb r3, [r7, #7] + 8036ac6: 4a09 ldr r2, [pc, #36] ; (8036aec ) + 8036ac8: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8036acc: 6839 ldr r1, [r7, #0] + 8036ace: 4618 mov r0, r3 + 8036ad0: f7ff ff9a bl 8036a08 + 8036ad4: e000 b.n 8036ad8 return; - 8036a52: bf00 nop + 8036ad6: bf00 nop #ifdef LWIP_HOOK_MEMP_AVAILABLE if (old_first == NULL) { LWIP_HOOK_MEMP_AVAILABLE(type); } #endif } - 8036a54: 3708 adds r7, #8 - 8036a56: 46bd mov sp, r7 - 8036a58: bd80 pop {r7, pc} - 8036a5a: bf00 nop - 8036a5c: 0804257c .word 0x0804257c - 8036a60: 0804264c .word 0x0804264c - 8036a64: 080425d0 .word 0x080425d0 - 8036a68: 08044d9c .word 0x08044d9c + 8036ad8: 3708 adds r7, #8 + 8036ada: 46bd mov sp, r7 + 8036adc: bd80 pop {r7, pc} + 8036ade: bf00 nop + 8036ae0: 080425fc .word 0x080425fc + 8036ae4: 080426cc .word 0x080426cc + 8036ae8: 08042650 .word 0x08042650 + 8036aec: 08044e1c .word 0x08044e1c -08036a6c : +08036af0 : } #endif /* LWIP_HAVE_LOOPIF */ void netif_init(void) { - 8036a6c: b480 push {r7} - 8036a6e: af00 add r7, sp, #0 + 8036af0: b480 push {r7} + 8036af2: af00 add r7, sp, #0 netif_set_link_up(&loop_netif); netif_set_up(&loop_netif); #endif /* LWIP_HAVE_LOOPIF */ } - 8036a70: bf00 nop - 8036a72: 46bd mov sp, r7 - 8036a74: f85d 7b04 ldr.w r7, [sp], #4 - 8036a78: 4770 bx lr + 8036af4: bf00 nop + 8036af6: 46bd mov sp, r7 + 8036af8: f85d 7b04 ldr.w r7, [sp], #4 + 8036afc: 4770 bx lr ... -08036a7c : +08036b00 : netif_add(struct netif *netif, #if LWIP_IPV4 const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw, #endif /* LWIP_IPV4 */ void *state, netif_init_fn init, netif_input_fn input) { - 8036a7c: b580 push {r7, lr} - 8036a7e: b086 sub sp, #24 - 8036a80: af00 add r7, sp, #0 - 8036a82: 60f8 str r0, [r7, #12] - 8036a84: 60b9 str r1, [r7, #8] - 8036a86: 607a str r2, [r7, #4] - 8036a88: 603b str r3, [r7, #0] + 8036b00: b580 push {r7, lr} + 8036b02: b086 sub sp, #24 + 8036b04: af00 add r7, sp, #0 + 8036b06: 60f8 str r0, [r7, #12] + 8036b08: 60b9 str r1, [r7, #8] + 8036b0a: 607a str r2, [r7, #4] + 8036b0c: 603b str r3, [r7, #0] LWIP_ASSERT("single netif already set", 0); return NULL; } #endif LWIP_ERROR("netif_add: invalid netif", netif != NULL, return NULL); - 8036a8a: 68fb ldr r3, [r7, #12] - 8036a8c: 2b00 cmp r3, #0 - 8036a8e: d108 bne.n 8036aa2 - 8036a90: 4b59 ldr r3, [pc, #356] ; (8036bf8 ) - 8036a92: f240 1227 movw r2, #295 ; 0x127 - 8036a96: 4959 ldr r1, [pc, #356] ; (8036bfc ) - 8036a98: 4859 ldr r0, [pc, #356] ; (8036c00 ) - 8036a9a: f00a f839 bl 8040b10 - 8036a9e: 2300 movs r3, #0 - 8036aa0: e0a5 b.n 8036bee + 8036b0e: 68fb ldr r3, [r7, #12] + 8036b10: 2b00 cmp r3, #0 + 8036b12: d108 bne.n 8036b26 + 8036b14: 4b59 ldr r3, [pc, #356] ; (8036c7c ) + 8036b16: f240 1227 movw r2, #295 ; 0x127 + 8036b1a: 4959 ldr r1, [pc, #356] ; (8036c80 ) + 8036b1c: 4859 ldr r0, [pc, #356] ; (8036c84 ) + 8036b1e: f00a f839 bl 8040b94 + 8036b22: 2300 movs r3, #0 + 8036b24: e0a5 b.n 8036c72 LWIP_ERROR("netif_add: No init function given", init != NULL, return NULL); - 8036aa2: 6a7b ldr r3, [r7, #36] ; 0x24 - 8036aa4: 2b00 cmp r3, #0 - 8036aa6: d108 bne.n 8036aba - 8036aa8: 4b53 ldr r3, [pc, #332] ; (8036bf8 ) - 8036aaa: f44f 7294 mov.w r2, #296 ; 0x128 - 8036aae: 4955 ldr r1, [pc, #340] ; (8036c04 ) - 8036ab0: 4853 ldr r0, [pc, #332] ; (8036c00 ) - 8036ab2: f00a f82d bl 8040b10 - 8036ab6: 2300 movs r3, #0 - 8036ab8: e099 b.n 8036bee + 8036b26: 6a7b ldr r3, [r7, #36] ; 0x24 + 8036b28: 2b00 cmp r3, #0 + 8036b2a: d108 bne.n 8036b3e + 8036b2c: 4b53 ldr r3, [pc, #332] ; (8036c7c ) + 8036b2e: f44f 7294 mov.w r2, #296 ; 0x128 + 8036b32: 4955 ldr r1, [pc, #340] ; (8036c88 ) + 8036b34: 4853 ldr r0, [pc, #332] ; (8036c84 ) + 8036b36: f00a f82d bl 8040b94 + 8036b3a: 2300 movs r3, #0 + 8036b3c: e099 b.n 8036c72 #if LWIP_IPV4 if (ipaddr == NULL) { - 8036aba: 68bb ldr r3, [r7, #8] - 8036abc: 2b00 cmp r3, #0 - 8036abe: d101 bne.n 8036ac4 + 8036b3e: 68bb ldr r3, [r7, #8] + 8036b40: 2b00 cmp r3, #0 + 8036b42: d101 bne.n 8036b48 ipaddr = ip_2_ip4(IP4_ADDR_ANY); - 8036ac0: 4b51 ldr r3, [pc, #324] ; (8036c08 ) - 8036ac2: 60bb str r3, [r7, #8] + 8036b44: 4b51 ldr r3, [pc, #324] ; (8036c8c ) + 8036b46: 60bb str r3, [r7, #8] } if (netmask == NULL) { - 8036ac4: 687b ldr r3, [r7, #4] - 8036ac6: 2b00 cmp r3, #0 - 8036ac8: d101 bne.n 8036ace + 8036b48: 687b ldr r3, [r7, #4] + 8036b4a: 2b00 cmp r3, #0 + 8036b4c: d101 bne.n 8036b52 netmask = ip_2_ip4(IP4_ADDR_ANY); - 8036aca: 4b4f ldr r3, [pc, #316] ; (8036c08 ) - 8036acc: 607b str r3, [r7, #4] + 8036b4e: 4b4f ldr r3, [pc, #316] ; (8036c8c ) + 8036b50: 607b str r3, [r7, #4] } if (gw == NULL) { - 8036ace: 683b ldr r3, [r7, #0] - 8036ad0: 2b00 cmp r3, #0 - 8036ad2: d101 bne.n 8036ad8 + 8036b52: 683b ldr r3, [r7, #0] + 8036b54: 2b00 cmp r3, #0 + 8036b56: d101 bne.n 8036b5c gw = ip_2_ip4(IP4_ADDR_ANY); - 8036ad4: 4b4c ldr r3, [pc, #304] ; (8036c08 ) - 8036ad6: 603b str r3, [r7, #0] + 8036b58: 4b4c ldr r3, [pc, #304] ; (8036c8c ) + 8036b5a: 603b str r3, [r7, #0] } /* reset new interface configuration state */ ip_addr_set_zero_ip4(&netif->ip_addr); - 8036ad8: 68fb ldr r3, [r7, #12] - 8036ada: 2200 movs r2, #0 - 8036adc: 605a str r2, [r3, #4] + 8036b5c: 68fb ldr r3, [r7, #12] + 8036b5e: 2200 movs r2, #0 + 8036b60: 605a str r2, [r3, #4] ip_addr_set_zero_ip4(&netif->netmask); - 8036ade: 68fb ldr r3, [r7, #12] - 8036ae0: 2200 movs r2, #0 - 8036ae2: 609a str r2, [r3, #8] + 8036b62: 68fb ldr r3, [r7, #12] + 8036b64: 2200 movs r2, #0 + 8036b66: 609a str r2, [r3, #8] ip_addr_set_zero_ip4(&netif->gw); - 8036ae4: 68fb ldr r3, [r7, #12] - 8036ae6: 2200 movs r2, #0 - 8036ae8: 60da str r2, [r3, #12] + 8036b68: 68fb ldr r3, [r7, #12] + 8036b6a: 2200 movs r2, #0 + 8036b6c: 60da str r2, [r3, #12] netif->output = netif_null_output_ip4; - 8036aea: 68fb ldr r3, [r7, #12] - 8036aec: 4a47 ldr r2, [pc, #284] ; (8036c0c ) - 8036aee: 615a str r2, [r3, #20] + 8036b6e: 68fb ldr r3, [r7, #12] + 8036b70: 4a47 ldr r2, [pc, #284] ; (8036c90 ) + 8036b72: 615a str r2, [r3, #20] #endif /* LWIP_IPV6_ADDRESS_LIFETIMES */ } netif->output_ip6 = netif_null_output_ip6; #endif /* LWIP_IPV6 */ NETIF_SET_CHECKSUM_CTRL(netif, NETIF_CHECKSUM_ENABLE_ALL); netif->mtu = 0; - 8036af0: 68fb ldr r3, [r7, #12] - 8036af2: 2200 movs r2, #0 - 8036af4: 851a strh r2, [r3, #40] ; 0x28 + 8036b74: 68fb ldr r3, [r7, #12] + 8036b76: 2200 movs r2, #0 + 8036b78: 851a strh r2, [r3, #40] ; 0x28 netif->flags = 0; - 8036af6: 68fb ldr r3, [r7, #12] - 8036af8: 2200 movs r2, #0 - 8036afa: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8036b7a: 68fb ldr r3, [r7, #12] + 8036b7c: 2200 movs r2, #0 + 8036b7e: f883 2031 strb.w r2, [r3, #49] ; 0x31 netif->ip6_autoconfig_enabled = 0; #endif /* LWIP_IPV6_AUTOCONFIG */ nd6_restart_netif(netif); #endif /* LWIP_IPV6 */ #if LWIP_NETIF_STATUS_CALLBACK netif->status_callback = NULL; - 8036afe: 68fb ldr r3, [r7, #12] - 8036b00: 2200 movs r2, #0 - 8036b02: 61da str r2, [r3, #28] + 8036b82: 68fb ldr r3, [r7, #12] + 8036b84: 2200 movs r2, #0 + 8036b86: 61da str r2, [r3, #28] #endif /* LWIP_NETIF_STATUS_CALLBACK */ #if LWIP_NETIF_LINK_CALLBACK netif->link_callback = NULL; - 8036b04: 68fb ldr r3, [r7, #12] - 8036b06: 2200 movs r2, #0 - 8036b08: 621a str r2, [r3, #32] + 8036b88: 68fb ldr r3, [r7, #12] + 8036b8a: 2200 movs r2, #0 + 8036b8c: 621a str r2, [r3, #32] netif->loop_first = NULL; netif->loop_last = NULL; #endif /* ENABLE_LOOPBACK */ /* remember netif specific state information data */ netif->state = state; - 8036b0a: 68fb ldr r3, [r7, #12] - 8036b0c: 6a3a ldr r2, [r7, #32] - 8036b0e: 625a str r2, [r3, #36] ; 0x24 + 8036b8e: 68fb ldr r3, [r7, #12] + 8036b90: 6a3a ldr r2, [r7, #32] + 8036b92: 625a str r2, [r3, #36] ; 0x24 netif->num = netif_num; - 8036b10: 4b3f ldr r3, [pc, #252] ; (8036c10 ) - 8036b12: 781a ldrb r2, [r3, #0] - 8036b14: 68fb ldr r3, [r7, #12] - 8036b16: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8036b94: 4b3f ldr r3, [pc, #252] ; (8036c94 ) + 8036b96: 781a ldrb r2, [r3, #0] + 8036b98: 68fb ldr r3, [r7, #12] + 8036b9a: f883 2034 strb.w r2, [r3, #52] ; 0x34 netif->input = input; - 8036b1a: 68fb ldr r3, [r7, #12] - 8036b1c: 6aba ldr r2, [r7, #40] ; 0x28 - 8036b1e: 611a str r2, [r3, #16] + 8036b9e: 68fb ldr r3, [r7, #12] + 8036ba0: 6aba ldr r2, [r7, #40] ; 0x28 + 8036ba2: 611a str r2, [r3, #16] #if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS netif->loop_cnt_current = 0; #endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */ #if LWIP_IPV4 netif_set_addr(netif, ipaddr, netmask, gw); - 8036b20: 683b ldr r3, [r7, #0] - 8036b22: 687a ldr r2, [r7, #4] - 8036b24: 68b9 ldr r1, [r7, #8] - 8036b26: 68f8 ldr r0, [r7, #12] - 8036b28: f000 f91c bl 8036d64 + 8036ba4: 683b ldr r3, [r7, #0] + 8036ba6: 687a ldr r2, [r7, #4] + 8036ba8: 68b9 ldr r1, [r7, #8] + 8036baa: 68f8 ldr r0, [r7, #12] + 8036bac: f000 f91c bl 8036de8 #endif /* LWIP_IPV4 */ /* call user specified initialization function for netif */ if (init(netif) != ERR_OK) { - 8036b2c: 6a7b ldr r3, [r7, #36] ; 0x24 - 8036b2e: 68f8 ldr r0, [r7, #12] - 8036b30: 4798 blx r3 - 8036b32: 4603 mov r3, r0 - 8036b34: 2b00 cmp r3, #0 - 8036b36: d001 beq.n 8036b3c + 8036bb0: 6a7b ldr r3, [r7, #36] ; 0x24 + 8036bb2: 68f8 ldr r0, [r7, #12] + 8036bb4: 4798 blx r3 + 8036bb6: 4603 mov r3, r0 + 8036bb8: 2b00 cmp r3, #0 + 8036bba: d001 beq.n 8036bc0 return NULL; - 8036b38: 2300 movs r3, #0 - 8036b3a: e058 b.n 8036bee + 8036bbc: 2300 movs r3, #0 + 8036bbe: e058 b.n 8036c72 */ { struct netif *netif2; int num_netifs; do { if (netif->num == 255) { - 8036b3c: 68fb ldr r3, [r7, #12] - 8036b3e: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036b42: 2bff cmp r3, #255 ; 0xff - 8036b44: d103 bne.n 8036b4e + 8036bc0: 68fb ldr r3, [r7, #12] + 8036bc2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036bc6: 2bff cmp r3, #255 ; 0xff + 8036bc8: d103 bne.n 8036bd2 netif->num = 0; - 8036b46: 68fb ldr r3, [r7, #12] - 8036b48: 2200 movs r2, #0 - 8036b4a: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8036bca: 68fb ldr r3, [r7, #12] + 8036bcc: 2200 movs r2, #0 + 8036bce: f883 2034 strb.w r2, [r3, #52] ; 0x34 } num_netifs = 0; - 8036b4e: 2300 movs r3, #0 - 8036b50: 613b str r3, [r7, #16] + 8036bd2: 2300 movs r3, #0 + 8036bd4: 613b str r3, [r7, #16] for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) { - 8036b52: 4b30 ldr r3, [pc, #192] ; (8036c14 ) - 8036b54: 681b ldr r3, [r3, #0] - 8036b56: 617b str r3, [r7, #20] - 8036b58: e02b b.n 8036bb2 + 8036bd6: 4b30 ldr r3, [pc, #192] ; (8036c98 ) + 8036bd8: 681b ldr r3, [r3, #0] + 8036bda: 617b str r3, [r7, #20] + 8036bdc: e02b b.n 8036c36 LWIP_ASSERT("netif already added", netif2 != netif); - 8036b5a: 697a ldr r2, [r7, #20] - 8036b5c: 68fb ldr r3, [r7, #12] - 8036b5e: 429a cmp r2, r3 - 8036b60: d106 bne.n 8036b70 - 8036b62: 4b25 ldr r3, [pc, #148] ; (8036bf8 ) - 8036b64: f240 128b movw r2, #395 ; 0x18b - 8036b68: 492b ldr r1, [pc, #172] ; (8036c18 ) - 8036b6a: 4825 ldr r0, [pc, #148] ; (8036c00 ) - 8036b6c: f009 ffd0 bl 8040b10 + 8036bde: 697a ldr r2, [r7, #20] + 8036be0: 68fb ldr r3, [r7, #12] + 8036be2: 429a cmp r2, r3 + 8036be4: d106 bne.n 8036bf4 + 8036be6: 4b25 ldr r3, [pc, #148] ; (8036c7c ) + 8036be8: f240 128b movw r2, #395 ; 0x18b + 8036bec: 492b ldr r1, [pc, #172] ; (8036c9c ) + 8036bee: 4825 ldr r0, [pc, #148] ; (8036c84 ) + 8036bf0: f009 ffd0 bl 8040b94 num_netifs++; - 8036b70: 693b ldr r3, [r7, #16] - 8036b72: 3301 adds r3, #1 - 8036b74: 613b str r3, [r7, #16] + 8036bf4: 693b ldr r3, [r7, #16] + 8036bf6: 3301 adds r3, #1 + 8036bf8: 613b str r3, [r7, #16] LWIP_ASSERT("too many netifs, max. supported number is 255", num_netifs <= 255); - 8036b76: 693b ldr r3, [r7, #16] - 8036b78: 2bff cmp r3, #255 ; 0xff - 8036b7a: dd06 ble.n 8036b8a - 8036b7c: 4b1e ldr r3, [pc, #120] ; (8036bf8 ) - 8036b7e: f240 128d movw r2, #397 ; 0x18d - 8036b82: 4926 ldr r1, [pc, #152] ; (8036c1c ) - 8036b84: 481e ldr r0, [pc, #120] ; (8036c00 ) - 8036b86: f009 ffc3 bl 8040b10 + 8036bfa: 693b ldr r3, [r7, #16] + 8036bfc: 2bff cmp r3, #255 ; 0xff + 8036bfe: dd06 ble.n 8036c0e + 8036c00: 4b1e ldr r3, [pc, #120] ; (8036c7c ) + 8036c02: f240 128d movw r2, #397 ; 0x18d + 8036c06: 4926 ldr r1, [pc, #152] ; (8036ca0 ) + 8036c08: 481e ldr r0, [pc, #120] ; (8036c84 ) + 8036c0a: f009 ffc3 bl 8040b94 if (netif2->num == netif->num) { - 8036b8a: 697b ldr r3, [r7, #20] - 8036b8c: f893 2034 ldrb.w r2, [r3, #52] ; 0x34 - 8036b90: 68fb ldr r3, [r7, #12] - 8036b92: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036b96: 429a cmp r2, r3 - 8036b98: d108 bne.n 8036bac + 8036c0e: 697b ldr r3, [r7, #20] + 8036c10: f893 2034 ldrb.w r2, [r3, #52] ; 0x34 + 8036c14: 68fb ldr r3, [r7, #12] + 8036c16: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036c1a: 429a cmp r2, r3 + 8036c1c: d108 bne.n 8036c30 netif->num++; - 8036b9a: 68fb ldr r3, [r7, #12] - 8036b9c: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036ba0: 3301 adds r3, #1 - 8036ba2: b2da uxtb r2, r3 - 8036ba4: 68fb ldr r3, [r7, #12] - 8036ba6: f883 2034 strb.w r2, [r3, #52] ; 0x34 + 8036c1e: 68fb ldr r3, [r7, #12] + 8036c20: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036c24: 3301 adds r3, #1 + 8036c26: b2da uxtb r2, r3 + 8036c28: 68fb ldr r3, [r7, #12] + 8036c2a: f883 2034 strb.w r2, [r3, #52] ; 0x34 break; - 8036baa: e005 b.n 8036bb8 + 8036c2e: e005 b.n 8036c3c for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) { - 8036bac: 697b ldr r3, [r7, #20] - 8036bae: 681b ldr r3, [r3, #0] - 8036bb0: 617b str r3, [r7, #20] - 8036bb2: 697b ldr r3, [r7, #20] - 8036bb4: 2b00 cmp r3, #0 - 8036bb6: d1d0 bne.n 8036b5a + 8036c30: 697b ldr r3, [r7, #20] + 8036c32: 681b ldr r3, [r3, #0] + 8036c34: 617b str r3, [r7, #20] + 8036c36: 697b ldr r3, [r7, #20] + 8036c38: 2b00 cmp r3, #0 + 8036c3a: d1d0 bne.n 8036bde } } } while (netif2 != NULL); - 8036bb8: 697b ldr r3, [r7, #20] - 8036bba: 2b00 cmp r3, #0 - 8036bbc: d1be bne.n 8036b3c + 8036c3c: 697b ldr r3, [r7, #20] + 8036c3e: 2b00 cmp r3, #0 + 8036c40: d1be bne.n 8036bc0 } if (netif->num == 254) { - 8036bbe: 68fb ldr r3, [r7, #12] - 8036bc0: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036bc4: 2bfe cmp r3, #254 ; 0xfe - 8036bc6: d103 bne.n 8036bd0 + 8036c42: 68fb ldr r3, [r7, #12] + 8036c44: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036c48: 2bfe cmp r3, #254 ; 0xfe + 8036c4a: d103 bne.n 8036c54 netif_num = 0; - 8036bc8: 4b11 ldr r3, [pc, #68] ; (8036c10 ) - 8036bca: 2200 movs r2, #0 - 8036bcc: 701a strb r2, [r3, #0] - 8036bce: e006 b.n 8036bde + 8036c4c: 4b11 ldr r3, [pc, #68] ; (8036c94 ) + 8036c4e: 2200 movs r2, #0 + 8036c50: 701a strb r2, [r3, #0] + 8036c52: e006 b.n 8036c62 } else { netif_num = (u8_t)(netif->num + 1); - 8036bd0: 68fb ldr r3, [r7, #12] - 8036bd2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8036bd6: 3301 adds r3, #1 - 8036bd8: b2da uxtb r2, r3 - 8036bda: 4b0d ldr r3, [pc, #52] ; (8036c10 ) - 8036bdc: 701a strb r2, [r3, #0] + 8036c54: 68fb ldr r3, [r7, #12] + 8036c56: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8036c5a: 3301 adds r3, #1 + 8036c5c: b2da uxtb r2, r3 + 8036c5e: 4b0d ldr r3, [pc, #52] ; (8036c94 ) + 8036c60: 701a strb r2, [r3, #0] } /* add this netif to the list */ netif->next = netif_list; - 8036bde: 4b0d ldr r3, [pc, #52] ; (8036c14 ) - 8036be0: 681a ldr r2, [r3, #0] - 8036be2: 68fb ldr r3, [r7, #12] - 8036be4: 601a str r2, [r3, #0] + 8036c62: 4b0d ldr r3, [pc, #52] ; (8036c98 ) + 8036c64: 681a ldr r2, [r3, #0] + 8036c66: 68fb ldr r3, [r7, #12] + 8036c68: 601a str r2, [r3, #0] netif_list = netif; - 8036be6: 4a0b ldr r2, [pc, #44] ; (8036c14 ) - 8036be8: 68fb ldr r3, [r7, #12] - 8036bea: 6013 str r3, [r2, #0] + 8036c6a: 4a0b ldr r2, [pc, #44] ; (8036c98 ) + 8036c6c: 68fb ldr r3, [r7, #12] + 8036c6e: 6013 str r3, [r2, #0] #endif /* LWIP_IPV4 */ LWIP_DEBUGF(NETIF_DEBUG, ("\n")); netif_invoke_ext_callback(netif, LWIP_NSC_NETIF_ADDED, NULL); return netif; - 8036bec: 68fb ldr r3, [r7, #12] -} - 8036bee: 4618 mov r0, r3 - 8036bf0: 3718 adds r7, #24 - 8036bf2: 46bd mov sp, r7 - 8036bf4: bd80 pop {r7, pc} - 8036bf6: bf00 nop - 8036bf8: 08042668 .word 0x08042668 - 8036bfc: 080426fc .word 0x080426fc - 8036c00: 080426b8 .word 0x080426b8 - 8036c04: 08042718 .word 0x08042718 - 8036c08: 08044e00 .word 0x08044e00 - 8036c0c: 0803705f .word 0x0803705f - 8036c10: 2400e954 .word 0x2400e954 - 8036c14: 2400e94c .word 0x2400e94c - 8036c18: 0804273c .word 0x0804273c - 8036c1c: 08042750 .word 0x08042750 - -08036c20 : + 8036c70: 68fb ldr r3, [r7, #12] +} + 8036c72: 4618 mov r0, r3 + 8036c74: 3718 adds r7, #24 + 8036c76: 46bd mov sp, r7 + 8036c78: bd80 pop {r7, pc} + 8036c7a: bf00 nop + 8036c7c: 080426e8 .word 0x080426e8 + 8036c80: 0804277c .word 0x0804277c + 8036c84: 08042738 .word 0x08042738 + 8036c88: 08042798 .word 0x08042798 + 8036c8c: 08044e80 .word 0x08044e80 + 8036c90: 080370e3 .word 0x080370e3 + 8036c94: 2400e95c .word 0x2400e95c + 8036c98: 2400e954 .word 0x2400e954 + 8036c9c: 080427bc .word 0x080427bc + 8036ca0: 080427d0 .word 0x080427d0 + +08036ca4 : static void netif_do_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr) { - 8036c20: b580 push {r7, lr} - 8036c22: b082 sub sp, #8 - 8036c24: af00 add r7, sp, #0 - 8036c26: 6078 str r0, [r7, #4] - 8036c28: 6039 str r1, [r7, #0] + 8036ca4: b580 push {r7, lr} + 8036ca6: b082 sub sp, #8 + 8036ca8: af00 add r7, sp, #0 + 8036caa: 6078 str r0, [r7, #4] + 8036cac: 6039 str r1, [r7, #0] #if LWIP_TCP tcp_netif_ip_addr_changed(old_addr, new_addr); - 8036c2a: 6839 ldr r1, [r7, #0] - 8036c2c: 6878 ldr r0, [r7, #4] - 8036c2e: f002 fdbf bl 80397b0 + 8036cae: 6839 ldr r1, [r7, #0] + 8036cb0: 6878 ldr r0, [r7, #4] + 8036cb2: f002 fdbf bl 8039834 #endif /* LWIP_TCP */ #if LWIP_UDP udp_netif_ip_addr_changed(old_addr, new_addr); - 8036c32: 6839 ldr r1, [r7, #0] - 8036c34: 6878 ldr r0, [r7, #4] - 8036c36: f007 fafb bl 803e230 + 8036cb6: 6839 ldr r1, [r7, #0] + 8036cb8: 6878 ldr r0, [r7, #4] + 8036cba: f007 fafb bl 803e2b4 #endif /* LWIP_UDP */ #if LWIP_RAW raw_netif_ip_addr_changed(old_addr, new_addr); #endif /* LWIP_RAW */ } - 8036c3a: bf00 nop - 8036c3c: 3708 adds r7, #8 - 8036c3e: 46bd mov sp, r7 - 8036c40: bd80 pop {r7, pc} + 8036cbe: bf00 nop + 8036cc0: 3708 adds r7, #8 + 8036cc2: 46bd mov sp, r7 + 8036cc4: bd80 pop {r7, pc} ... -08036c44 : +08036cc8 : #if LWIP_IPV4 static int netif_do_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr, ip_addr_t *old_addr) { - 8036c44: b580 push {r7, lr} - 8036c46: b086 sub sp, #24 - 8036c48: af00 add r7, sp, #0 - 8036c4a: 60f8 str r0, [r7, #12] - 8036c4c: 60b9 str r1, [r7, #8] - 8036c4e: 607a str r2, [r7, #4] + 8036cc8: b580 push {r7, lr} + 8036cca: b086 sub sp, #24 + 8036ccc: af00 add r7, sp, #0 + 8036cce: 60f8 str r0, [r7, #12] + 8036cd0: 60b9 str r1, [r7, #8] + 8036cd2: 607a str r2, [r7, #4] LWIP_ASSERT("invalid pointer", ipaddr != NULL); - 8036c50: 68bb ldr r3, [r7, #8] - 8036c52: 2b00 cmp r3, #0 - 8036c54: d106 bne.n 8036c64 - 8036c56: 4b21 ldr r3, [pc, #132] ; (8036cdc ) - 8036c58: f240 12cb movw r2, #459 ; 0x1cb - 8036c5c: 4920 ldr r1, [pc, #128] ; (8036ce0 ) - 8036c5e: 4821 ldr r0, [pc, #132] ; (8036ce4 ) - 8036c60: f009 ff56 bl 8040b10 + 8036cd4: 68bb ldr r3, [r7, #8] + 8036cd6: 2b00 cmp r3, #0 + 8036cd8: d106 bne.n 8036ce8 + 8036cda: 4b21 ldr r3, [pc, #132] ; (8036d60 ) + 8036cdc: f240 12cb movw r2, #459 ; 0x1cb + 8036ce0: 4920 ldr r1, [pc, #128] ; (8036d64 ) + 8036ce2: 4821 ldr r0, [pc, #132] ; (8036d68 ) + 8036ce4: f009 ff56 bl 8040b94 LWIP_ASSERT("invalid pointer", old_addr != NULL); - 8036c64: 687b ldr r3, [r7, #4] - 8036c66: 2b00 cmp r3, #0 - 8036c68: d106 bne.n 8036c78 - 8036c6a: 4b1c ldr r3, [pc, #112] ; (8036cdc ) - 8036c6c: f44f 72e6 mov.w r2, #460 ; 0x1cc - 8036c70: 491b ldr r1, [pc, #108] ; (8036ce0 ) - 8036c72: 481c ldr r0, [pc, #112] ; (8036ce4 ) - 8036c74: f009 ff4c bl 8040b10 + 8036ce8: 687b ldr r3, [r7, #4] + 8036cea: 2b00 cmp r3, #0 + 8036cec: d106 bne.n 8036cfc + 8036cee: 4b1c ldr r3, [pc, #112] ; (8036d60 ) + 8036cf0: f44f 72e6 mov.w r2, #460 ; 0x1cc + 8036cf4: 491b ldr r1, [pc, #108] ; (8036d64 ) + 8036cf6: 481c ldr r0, [pc, #112] ; (8036d68 ) + 8036cf8: f009 ff4c bl 8040b94 /* address is actually being changed? */ if (ip4_addr_cmp(ipaddr, netif_ip4_addr(netif)) == 0) { - 8036c78: 68bb ldr r3, [r7, #8] - 8036c7a: 681a ldr r2, [r3, #0] - 8036c7c: 68fb ldr r3, [r7, #12] - 8036c7e: 3304 adds r3, #4 - 8036c80: 681b ldr r3, [r3, #0] - 8036c82: 429a cmp r2, r3 - 8036c84: d024 beq.n 8036cd0 + 8036cfc: 68bb ldr r3, [r7, #8] + 8036cfe: 681a ldr r2, [r3, #0] + 8036d00: 68fb ldr r3, [r7, #12] + 8036d02: 3304 adds r3, #4 + 8036d04: 681b ldr r3, [r3, #0] + 8036d06: 429a cmp r2, r3 + 8036d08: d024 beq.n 8036d54 ip_addr_t new_addr; *ip_2_ip4(&new_addr) = *ipaddr; - 8036c86: 68bb ldr r3, [r7, #8] - 8036c88: 681b ldr r3, [r3, #0] - 8036c8a: 617b str r3, [r7, #20] + 8036d0a: 68bb ldr r3, [r7, #8] + 8036d0c: 681b ldr r3, [r3, #0] + 8036d0e: 617b str r3, [r7, #20] IP_SET_TYPE_VAL(new_addr, IPADDR_TYPE_V4); ip_addr_copy(*old_addr, *netif_ip_addr4(netif)); - 8036c8c: 68fb ldr r3, [r7, #12] - 8036c8e: 3304 adds r3, #4 - 8036c90: 681a ldr r2, [r3, #0] - 8036c92: 687b ldr r3, [r7, #4] - 8036c94: 601a str r2, [r3, #0] + 8036d10: 68fb ldr r3, [r7, #12] + 8036d12: 3304 adds r3, #4 + 8036d14: 681a ldr r2, [r3, #0] + 8036d16: 687b ldr r3, [r7, #4] + 8036d18: 601a str r2, [r3, #0] LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n")); netif_do_ip_addr_changed(old_addr, &new_addr); - 8036c96: f107 0314 add.w r3, r7, #20 - 8036c9a: 4619 mov r1, r3 - 8036c9c: 6878 ldr r0, [r7, #4] - 8036c9e: f7ff ffbf bl 8036c20 + 8036d1a: f107 0314 add.w r3, r7, #20 + 8036d1e: 4619 mov r1, r3 + 8036d20: 6878 ldr r0, [r7, #4] + 8036d22: f7ff ffbf bl 8036ca4 mib2_remove_ip4(netif); mib2_remove_route_ip4(0, netif); /* set new IP address to netif */ ip4_addr_set(ip_2_ip4(&netif->ip_addr), ipaddr); - 8036ca2: 68bb ldr r3, [r7, #8] - 8036ca4: 2b00 cmp r3, #0 - 8036ca6: d002 beq.n 8036cae - 8036ca8: 68bb ldr r3, [r7, #8] - 8036caa: 681b ldr r3, [r3, #0] - 8036cac: e000 b.n 8036cb0 - 8036cae: 2300 movs r3, #0 - 8036cb0: 68fa ldr r2, [r7, #12] - 8036cb2: 6053 str r3, [r2, #4] + 8036d26: 68bb ldr r3, [r7, #8] + 8036d28: 2b00 cmp r3, #0 + 8036d2a: d002 beq.n 8036d32 + 8036d2c: 68bb ldr r3, [r7, #8] + 8036d2e: 681b ldr r3, [r3, #0] + 8036d30: e000 b.n 8036d34 + 8036d32: 2300 movs r3, #0 + 8036d34: 68fa ldr r2, [r7, #12] + 8036d36: 6053 str r3, [r2, #4] IP_SET_TYPE_VAL(netif->ip_addr, IPADDR_TYPE_V4); mib2_add_ip4(netif); mib2_add_route_ip4(0, netif); netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4); - 8036cb4: 2101 movs r1, #1 - 8036cb6: 68f8 ldr r0, [r7, #12] - 8036cb8: f000 f8e2 bl 8036e80 + 8036d38: 2101 movs r1, #1 + 8036d3a: 68f8 ldr r0, [r7, #12] + 8036d3c: f000 f8e2 bl 8036f04 NETIF_STATUS_CALLBACK(netif); - 8036cbc: 68fb ldr r3, [r7, #12] - 8036cbe: 69db ldr r3, [r3, #28] - 8036cc0: 2b00 cmp r3, #0 - 8036cc2: d003 beq.n 8036ccc - 8036cc4: 68fb ldr r3, [r7, #12] - 8036cc6: 69db ldr r3, [r3, #28] - 8036cc8: 68f8 ldr r0, [r7, #12] - 8036cca: 4798 blx r3 + 8036d40: 68fb ldr r3, [r7, #12] + 8036d42: 69db ldr r3, [r3, #28] + 8036d44: 2b00 cmp r3, #0 + 8036d46: d003 beq.n 8036d50 + 8036d48: 68fb ldr r3, [r7, #12] + 8036d4a: 69db ldr r3, [r3, #28] + 8036d4c: 68f8 ldr r0, [r7, #12] + 8036d4e: 4798 blx r3 return 1; /* address changed */ - 8036ccc: 2301 movs r3, #1 - 8036cce: e000 b.n 8036cd2 + 8036d50: 2301 movs r3, #1 + 8036d52: e000 b.n 8036d56 } return 0; /* address unchanged */ - 8036cd0: 2300 movs r3, #0 + 8036d54: 2300 movs r3, #0 } - 8036cd2: 4618 mov r0, r3 - 8036cd4: 3718 adds r7, #24 - 8036cd6: 46bd mov sp, r7 - 8036cd8: bd80 pop {r7, pc} - 8036cda: bf00 nop - 8036cdc: 08042668 .word 0x08042668 - 8036ce0: 08042780 .word 0x08042780 - 8036ce4: 080426b8 .word 0x080426b8 + 8036d56: 4618 mov r0, r3 + 8036d58: 3718 adds r7, #24 + 8036d5a: 46bd mov sp, r7 + 8036d5c: bd80 pop {r7, pc} + 8036d5e: bf00 nop + 8036d60: 080426e8 .word 0x080426e8 + 8036d64: 08042800 .word 0x08042800 + 8036d68: 08042738 .word 0x08042738 -08036ce8 : +08036d6c : } } static int netif_do_set_netmask(struct netif *netif, const ip4_addr_t *netmask, ip_addr_t *old_nm) { - 8036ce8: b480 push {r7} - 8036cea: b085 sub sp, #20 - 8036cec: af00 add r7, sp, #0 - 8036cee: 60f8 str r0, [r7, #12] - 8036cf0: 60b9 str r1, [r7, #8] - 8036cf2: 607a str r2, [r7, #4] + 8036d6c: b480 push {r7} + 8036d6e: b085 sub sp, #20 + 8036d70: af00 add r7, sp, #0 + 8036d72: 60f8 str r0, [r7, #12] + 8036d74: 60b9 str r1, [r7, #8] + 8036d76: 607a str r2, [r7, #4] /* address is actually being changed? */ if (ip4_addr_cmp(netmask, netif_ip4_netmask(netif)) == 0) { - 8036cf4: 68bb ldr r3, [r7, #8] - 8036cf6: 681a ldr r2, [r3, #0] - 8036cf8: 68fb ldr r3, [r7, #12] - 8036cfa: 3308 adds r3, #8 - 8036cfc: 681b ldr r3, [r3, #0] - 8036cfe: 429a cmp r2, r3 - 8036d00: d00a beq.n 8036d18 + 8036d78: 68bb ldr r3, [r7, #8] + 8036d7a: 681a ldr r2, [r3, #0] + 8036d7c: 68fb ldr r3, [r7, #12] + 8036d7e: 3308 adds r3, #8 + 8036d80: 681b ldr r3, [r3, #0] + 8036d82: 429a cmp r2, r3 + 8036d84: d00a beq.n 8036d9c #else LWIP_UNUSED_ARG(old_nm); #endif mib2_remove_route_ip4(0, netif); /* set new netmask to netif */ ip4_addr_set(ip_2_ip4(&netif->netmask), netmask); - 8036d02: 68bb ldr r3, [r7, #8] - 8036d04: 2b00 cmp r3, #0 - 8036d06: d002 beq.n 8036d0e - 8036d08: 68bb ldr r3, [r7, #8] - 8036d0a: 681b ldr r3, [r3, #0] - 8036d0c: e000 b.n 8036d10 - 8036d0e: 2300 movs r3, #0 - 8036d10: 68fa ldr r2, [r7, #12] - 8036d12: 6093 str r3, [r2, #8] + 8036d86: 68bb ldr r3, [r7, #8] + 8036d88: 2b00 cmp r3, #0 + 8036d8a: d002 beq.n 8036d92 + 8036d8c: 68bb ldr r3, [r7, #8] + 8036d8e: 681b ldr r3, [r3, #0] + 8036d90: e000 b.n 8036d94 + 8036d92: 2300 movs r3, #0 + 8036d94: 68fa ldr r2, [r7, #12] + 8036d96: 6093 str r3, [r2, #8] netif->name[0], netif->name[1], ip4_addr1_16(netif_ip4_netmask(netif)), ip4_addr2_16(netif_ip4_netmask(netif)), ip4_addr3_16(netif_ip4_netmask(netif)), ip4_addr4_16(netif_ip4_netmask(netif)))); return 1; /* netmask changed */ - 8036d14: 2301 movs r3, #1 - 8036d16: e000 b.n 8036d1a + 8036d98: 2301 movs r3, #1 + 8036d9a: e000 b.n 8036d9e } return 0; /* netmask unchanged */ - 8036d18: 2300 movs r3, #0 + 8036d9c: 2300 movs r3, #0 } - 8036d1a: 4618 mov r0, r3 - 8036d1c: 3714 adds r7, #20 - 8036d1e: 46bd mov sp, r7 - 8036d20: f85d 7b04 ldr.w r7, [sp], #4 - 8036d24: 4770 bx lr + 8036d9e: 4618 mov r0, r3 + 8036da0: 3714 adds r7, #20 + 8036da2: 46bd mov sp, r7 + 8036da4: f85d 7b04 ldr.w r7, [sp], #4 + 8036da8: 4770 bx lr -08036d26 : +08036daa : } } static int netif_do_set_gw(struct netif *netif, const ip4_addr_t *gw, ip_addr_t *old_gw) { - 8036d26: b480 push {r7} - 8036d28: b085 sub sp, #20 - 8036d2a: af00 add r7, sp, #0 - 8036d2c: 60f8 str r0, [r7, #12] - 8036d2e: 60b9 str r1, [r7, #8] - 8036d30: 607a str r2, [r7, #4] + 8036daa: b480 push {r7} + 8036dac: b085 sub sp, #20 + 8036dae: af00 add r7, sp, #0 + 8036db0: 60f8 str r0, [r7, #12] + 8036db2: 60b9 str r1, [r7, #8] + 8036db4: 607a str r2, [r7, #4] /* address is actually being changed? */ if (ip4_addr_cmp(gw, netif_ip4_gw(netif)) == 0) { - 8036d32: 68bb ldr r3, [r7, #8] - 8036d34: 681a ldr r2, [r3, #0] - 8036d36: 68fb ldr r3, [r7, #12] - 8036d38: 330c adds r3, #12 - 8036d3a: 681b ldr r3, [r3, #0] - 8036d3c: 429a cmp r2, r3 - 8036d3e: d00a beq.n 8036d56 + 8036db6: 68bb ldr r3, [r7, #8] + 8036db8: 681a ldr r2, [r3, #0] + 8036dba: 68fb ldr r3, [r7, #12] + 8036dbc: 330c adds r3, #12 + 8036dbe: 681b ldr r3, [r3, #0] + 8036dc0: 429a cmp r2, r3 + 8036dc2: d00a beq.n 8036dda ip_addr_copy(*old_gw, *netif_ip_gw4(netif)); #else LWIP_UNUSED_ARG(old_gw); #endif ip4_addr_set(ip_2_ip4(&netif->gw), gw); - 8036d40: 68bb ldr r3, [r7, #8] - 8036d42: 2b00 cmp r3, #0 - 8036d44: d002 beq.n 8036d4c - 8036d46: 68bb ldr r3, [r7, #8] - 8036d48: 681b ldr r3, [r3, #0] - 8036d4a: e000 b.n 8036d4e - 8036d4c: 2300 movs r3, #0 - 8036d4e: 68fa ldr r2, [r7, #12] - 8036d50: 60d3 str r3, [r2, #12] + 8036dc4: 68bb ldr r3, [r7, #8] + 8036dc6: 2b00 cmp r3, #0 + 8036dc8: d002 beq.n 8036dd0 + 8036dca: 68bb ldr r3, [r7, #8] + 8036dcc: 681b ldr r3, [r3, #0] + 8036dce: e000 b.n 8036dd2 + 8036dd0: 2300 movs r3, #0 + 8036dd2: 68fa ldr r2, [r7, #12] + 8036dd4: 60d3 str r3, [r2, #12] netif->name[0], netif->name[1], ip4_addr1_16(netif_ip4_gw(netif)), ip4_addr2_16(netif_ip4_gw(netif)), ip4_addr3_16(netif_ip4_gw(netif)), ip4_addr4_16(netif_ip4_gw(netif)))); return 1; /* gateway changed */ - 8036d52: 2301 movs r3, #1 - 8036d54: e000 b.n 8036d58 + 8036dd6: 2301 movs r3, #1 + 8036dd8: e000 b.n 8036ddc } return 0; /* gateway unchanged */ - 8036d56: 2300 movs r3, #0 + 8036dda: 2300 movs r3, #0 } - 8036d58: 4618 mov r0, r3 - 8036d5a: 3714 adds r7, #20 - 8036d5c: 46bd mov sp, r7 - 8036d5e: f85d 7b04 ldr.w r7, [sp], #4 - 8036d62: 4770 bx lr + 8036ddc: 4618 mov r0, r3 + 8036dde: 3714 adds r7, #20 + 8036de0: 46bd mov sp, r7 + 8036de2: f85d 7b04 ldr.w r7, [sp], #4 + 8036de6: 4770 bx lr -08036d64 : +08036de8 : * @param gw the new default gateway */ void netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw) { - 8036d64: b580 push {r7, lr} - 8036d66: b088 sub sp, #32 - 8036d68: af00 add r7, sp, #0 - 8036d6a: 60f8 str r0, [r7, #12] - 8036d6c: 60b9 str r1, [r7, #8] - 8036d6e: 607a str r2, [r7, #4] - 8036d70: 603b str r3, [r7, #0] + 8036de8: b580 push {r7, lr} + 8036dea: b088 sub sp, #32 + 8036dec: af00 add r7, sp, #0 + 8036dee: 60f8 str r0, [r7, #12] + 8036df0: 60b9 str r1, [r7, #8] + 8036df2: 607a str r2, [r7, #4] + 8036df4: 603b str r3, [r7, #0] ip_addr_t old_nm_val; ip_addr_t old_gw_val; ip_addr_t *old_nm = &old_nm_val; ip_addr_t *old_gw = &old_gw_val; #else ip_addr_t *old_nm = NULL; - 8036d72: 2300 movs r3, #0 - 8036d74: 61fb str r3, [r7, #28] + 8036df6: 2300 movs r3, #0 + 8036df8: 61fb str r3, [r7, #28] ip_addr_t *old_gw = NULL; - 8036d76: 2300 movs r3, #0 - 8036d78: 61bb str r3, [r7, #24] + 8036dfa: 2300 movs r3, #0 + 8036dfc: 61bb str r3, [r7, #24] int remove; LWIP_ASSERT_CORE_LOCKED(); /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */ if (ipaddr == NULL) { - 8036d7a: 68bb ldr r3, [r7, #8] - 8036d7c: 2b00 cmp r3, #0 - 8036d7e: d101 bne.n 8036d84 + 8036dfe: 68bb ldr r3, [r7, #8] + 8036e00: 2b00 cmp r3, #0 + 8036e02: d101 bne.n 8036e08 ipaddr = IP4_ADDR_ANY4; - 8036d80: 4b1c ldr r3, [pc, #112] ; (8036df4 ) - 8036d82: 60bb str r3, [r7, #8] + 8036e04: 4b1c ldr r3, [pc, #112] ; (8036e78 ) + 8036e06: 60bb str r3, [r7, #8] } if (netmask == NULL) { - 8036d84: 687b ldr r3, [r7, #4] - 8036d86: 2b00 cmp r3, #0 - 8036d88: d101 bne.n 8036d8e + 8036e08: 687b ldr r3, [r7, #4] + 8036e0a: 2b00 cmp r3, #0 + 8036e0c: d101 bne.n 8036e12 netmask = IP4_ADDR_ANY4; - 8036d8a: 4b1a ldr r3, [pc, #104] ; (8036df4 ) - 8036d8c: 607b str r3, [r7, #4] + 8036e0e: 4b1a ldr r3, [pc, #104] ; (8036e78 ) + 8036e10: 607b str r3, [r7, #4] } if (gw == NULL) { - 8036d8e: 683b ldr r3, [r7, #0] - 8036d90: 2b00 cmp r3, #0 - 8036d92: d101 bne.n 8036d98 + 8036e12: 683b ldr r3, [r7, #0] + 8036e14: 2b00 cmp r3, #0 + 8036e16: d101 bne.n 8036e1c gw = IP4_ADDR_ANY4; - 8036d94: 4b17 ldr r3, [pc, #92] ; (8036df4 ) - 8036d96: 603b str r3, [r7, #0] + 8036e18: 4b17 ldr r3, [pc, #92] ; (8036e78 ) + 8036e1a: 603b str r3, [r7, #0] } remove = ip4_addr_isany(ipaddr); - 8036d98: 68bb ldr r3, [r7, #8] - 8036d9a: 2b00 cmp r3, #0 - 8036d9c: d003 beq.n 8036da6 - 8036d9e: 68bb ldr r3, [r7, #8] - 8036da0: 681b ldr r3, [r3, #0] - 8036da2: 2b00 cmp r3, #0 - 8036da4: d101 bne.n 8036daa - 8036da6: 2301 movs r3, #1 - 8036da8: e000 b.n 8036dac - 8036daa: 2300 movs r3, #0 - 8036dac: 617b str r3, [r7, #20] + 8036e1c: 68bb ldr r3, [r7, #8] + 8036e1e: 2b00 cmp r3, #0 + 8036e20: d003 beq.n 8036e2a + 8036e22: 68bb ldr r3, [r7, #8] + 8036e24: 681b ldr r3, [r3, #0] + 8036e26: 2b00 cmp r3, #0 + 8036e28: d101 bne.n 8036e2e + 8036e2a: 2301 movs r3, #1 + 8036e2c: e000 b.n 8036e30 + 8036e2e: 2300 movs r3, #0 + 8036e30: 617b str r3, [r7, #20] if (remove) { - 8036dae: 697b ldr r3, [r7, #20] - 8036db0: 2b00 cmp r3, #0 - 8036db2: d006 beq.n 8036dc2 + 8036e32: 697b ldr r3, [r7, #20] + 8036e34: 2b00 cmp r3, #0 + 8036e36: d006 beq.n 8036e46 /* when removing an address, we have to remove it *before* changing netmask/gw to ensure that tcp RST segment can be sent correctly */ if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) { - 8036db4: f107 0310 add.w r3, r7, #16 - 8036db8: 461a mov r2, r3 - 8036dba: 68b9 ldr r1, [r7, #8] - 8036dbc: 68f8 ldr r0, [r7, #12] - 8036dbe: f7ff ff41 bl 8036c44 + 8036e38: f107 0310 add.w r3, r7, #16 + 8036e3c: 461a mov r2, r3 + 8036e3e: 68b9 ldr r1, [r7, #8] + 8036e40: 68f8 ldr r0, [r7, #12] + 8036e42: f7ff ff41 bl 8036cc8 change_reason |= LWIP_NSC_IPV4_ADDRESS_CHANGED; cb_args.ipv4_changed.old_address = &old_addr; #endif } } if (netif_do_set_netmask(netif, netmask, old_nm)) { - 8036dc2: 69fa ldr r2, [r7, #28] - 8036dc4: 6879 ldr r1, [r7, #4] - 8036dc6: 68f8 ldr r0, [r7, #12] - 8036dc8: f7ff ff8e bl 8036ce8 + 8036e46: 69fa ldr r2, [r7, #28] + 8036e48: 6879 ldr r1, [r7, #4] + 8036e4a: 68f8 ldr r0, [r7, #12] + 8036e4c: f7ff ff8e bl 8036d6c #if LWIP_NETIF_EXT_STATUS_CALLBACK change_reason |= LWIP_NSC_IPV4_NETMASK_CHANGED; cb_args.ipv4_changed.old_netmask = old_nm; #endif } if (netif_do_set_gw(netif, gw, old_gw)) { - 8036dcc: 69ba ldr r2, [r7, #24] - 8036dce: 6839 ldr r1, [r7, #0] - 8036dd0: 68f8 ldr r0, [r7, #12] - 8036dd2: f7ff ffa8 bl 8036d26 + 8036e50: 69ba ldr r2, [r7, #24] + 8036e52: 6839 ldr r1, [r7, #0] + 8036e54: 68f8 ldr r0, [r7, #12] + 8036e56: f7ff ffa8 bl 8036daa #if LWIP_NETIF_EXT_STATUS_CALLBACK change_reason |= LWIP_NSC_IPV4_GATEWAY_CHANGED; cb_args.ipv4_changed.old_gw = old_gw; #endif } if (!remove) { - 8036dd6: 697b ldr r3, [r7, #20] - 8036dd8: 2b00 cmp r3, #0 - 8036dda: d106 bne.n 8036dea + 8036e5a: 697b ldr r3, [r7, #20] + 8036e5c: 2b00 cmp r3, #0 + 8036e5e: d106 bne.n 8036e6e /* set ipaddr last to ensure netmask/gw have been set when status callback is called */ if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) { - 8036ddc: f107 0310 add.w r3, r7, #16 - 8036de0: 461a mov r2, r3 - 8036de2: 68b9 ldr r1, [r7, #8] - 8036de4: 68f8 ldr r0, [r7, #12] - 8036de6: f7ff ff2d bl 8036c44 + 8036e60: f107 0310 add.w r3, r7, #16 + 8036e64: 461a mov r2, r3 + 8036e66: 68b9 ldr r1, [r7, #8] + 8036e68: 68f8 ldr r0, [r7, #12] + 8036e6a: f7ff ff2d bl 8036cc8 if (change_reason != LWIP_NSC_NONE) { change_reason |= LWIP_NSC_IPV4_SETTINGS_CHANGED; netif_invoke_ext_callback(netif, change_reason, &cb_args); } #endif } - 8036dea: bf00 nop - 8036dec: 3720 adds r7, #32 - 8036dee: 46bd mov sp, r7 - 8036df0: bd80 pop {r7, pc} - 8036df2: bf00 nop - 8036df4: 08044e00 .word 0x08044e00 + 8036e6e: bf00 nop + 8036e70: 3720 adds r7, #32 + 8036e72: 46bd mov sp, r7 + 8036e74: bd80 pop {r7, pc} + 8036e76: bf00 nop + 8036e78: 08044e80 .word 0x08044e80 -08036df8 : +08036e7c : * * @param netif the default network interface */ void netif_set_default(struct netif *netif) { - 8036df8: b480 push {r7} - 8036dfa: b083 sub sp, #12 - 8036dfc: af00 add r7, sp, #0 - 8036dfe: 6078 str r0, [r7, #4] + 8036e7c: b480 push {r7} + 8036e7e: b083 sub sp, #12 + 8036e80: af00 add r7, sp, #0 + 8036e82: 6078 str r0, [r7, #4] mib2_remove_route_ip4(1, netif); } else { /* install default route */ mib2_add_route_ip4(1, netif); } netif_default = netif; - 8036e00: 4a04 ldr r2, [pc, #16] ; (8036e14 ) - 8036e02: 687b ldr r3, [r7, #4] - 8036e04: 6013 str r3, [r2, #0] + 8036e84: 4a04 ldr r2, [pc, #16] ; (8036e98 ) + 8036e86: 687b ldr r3, [r7, #4] + 8036e88: 6013 str r3, [r2, #0] LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n", netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\'')); } - 8036e06: bf00 nop - 8036e08: 370c adds r7, #12 - 8036e0a: 46bd mov sp, r7 - 8036e0c: f85d 7b04 ldr.w r7, [sp], #4 - 8036e10: 4770 bx lr - 8036e12: bf00 nop - 8036e14: 2400e950 .word 0x2400e950 + 8036e8a: bf00 nop + 8036e8c: 370c adds r7, #12 + 8036e8e: 46bd mov sp, r7 + 8036e90: f85d 7b04 ldr.w r7, [sp], #4 + 8036e94: 4770 bx lr + 8036e96: bf00 nop + 8036e98: 2400e958 .word 0x2400e958 -08036e18 : +08036e9c : * Bring an interface up, available for processing * traffic. */ void netif_set_up(struct netif *netif) { - 8036e18: b580 push {r7, lr} - 8036e1a: b082 sub sp, #8 - 8036e1c: af00 add r7, sp, #0 - 8036e1e: 6078 str r0, [r7, #4] + 8036e9c: b580 push {r7, lr} + 8036e9e: b082 sub sp, #8 + 8036ea0: af00 add r7, sp, #0 + 8036ea2: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif_set_up: invalid netif", netif != NULL, return); - 8036e20: 687b ldr r3, [r7, #4] - 8036e22: 2b00 cmp r3, #0 - 8036e24: d107 bne.n 8036e36 - 8036e26: 4b13 ldr r3, [pc, #76] ; (8036e74 ) - 8036e28: f44f 7254 mov.w r2, #848 ; 0x350 - 8036e2c: 4912 ldr r1, [pc, #72] ; (8036e78 ) - 8036e2e: 4813 ldr r0, [pc, #76] ; (8036e7c ) - 8036e30: f009 fe6e bl 8040b10 - 8036e34: e01b b.n 8036e6e + 8036ea4: 687b ldr r3, [r7, #4] + 8036ea6: 2b00 cmp r3, #0 + 8036ea8: d107 bne.n 8036eba + 8036eaa: 4b13 ldr r3, [pc, #76] ; (8036ef8 ) + 8036eac: f44f 7254 mov.w r2, #848 ; 0x350 + 8036eb0: 4912 ldr r1, [pc, #72] ; (8036efc ) + 8036eb2: 4813 ldr r0, [pc, #76] ; (8036f00 ) + 8036eb4: f009 fe6e bl 8040b94 + 8036eb8: e01b b.n 8036ef2 if (!(netif->flags & NETIF_FLAG_UP)) { - 8036e36: 687b ldr r3, [r7, #4] - 8036e38: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036e3c: f003 0301 and.w r3, r3, #1 - 8036e40: 2b00 cmp r3, #0 - 8036e42: d114 bne.n 8036e6e + 8036eba: 687b ldr r3, [r7, #4] + 8036ebc: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036ec0: f003 0301 and.w r3, r3, #1 + 8036ec4: 2b00 cmp r3, #0 + 8036ec6: d114 bne.n 8036ef2 netif_set_flags(netif, NETIF_FLAG_UP); - 8036e44: 687b ldr r3, [r7, #4] - 8036e46: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036e4a: f043 0301 orr.w r3, r3, #1 - 8036e4e: b2da uxtb r2, r3 - 8036e50: 687b ldr r3, [r7, #4] - 8036e52: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8036ec8: 687b ldr r3, [r7, #4] + 8036eca: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036ece: f043 0301 orr.w r3, r3, #1 + 8036ed2: b2da uxtb r2, r3 + 8036ed4: 687b ldr r3, [r7, #4] + 8036ed6: f883 2031 strb.w r2, [r3, #49] ; 0x31 MIB2_COPY_SYSUPTIME_TO(&netif->ts); NETIF_STATUS_CALLBACK(netif); - 8036e56: 687b ldr r3, [r7, #4] - 8036e58: 69db ldr r3, [r3, #28] - 8036e5a: 2b00 cmp r3, #0 - 8036e5c: d003 beq.n 8036e66 - 8036e5e: 687b ldr r3, [r7, #4] - 8036e60: 69db ldr r3, [r3, #28] - 8036e62: 6878 ldr r0, [r7, #4] - 8036e64: 4798 blx r3 + 8036eda: 687b ldr r3, [r7, #4] + 8036edc: 69db ldr r3, [r3, #28] + 8036ede: 2b00 cmp r3, #0 + 8036ee0: d003 beq.n 8036eea + 8036ee2: 687b ldr r3, [r7, #4] + 8036ee4: 69db ldr r3, [r3, #28] + 8036ee6: 6878 ldr r0, [r7, #4] + 8036ee8: 4798 blx r3 args.status_changed.state = 1; netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args); } #endif netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6); - 8036e66: 2103 movs r1, #3 - 8036e68: 6878 ldr r0, [r7, #4] - 8036e6a: f000 f809 bl 8036e80 + 8036eea: 2103 movs r1, #3 + 8036eec: 6878 ldr r0, [r7, #4] + 8036eee: f000 f809 bl 8036f04 #if LWIP_IPV6 nd6_restart_netif(netif); #endif /* LWIP_IPV6 */ } } - 8036e6e: 3708 adds r7, #8 - 8036e70: 46bd mov sp, r7 - 8036e72: bd80 pop {r7, pc} - 8036e74: 08042668 .word 0x08042668 - 8036e78: 080427f0 .word 0x080427f0 - 8036e7c: 080426b8 .word 0x080426b8 + 8036ef2: 3708 adds r7, #8 + 8036ef4: 46bd mov sp, r7 + 8036ef6: bd80 pop {r7, pc} + 8036ef8: 080426e8 .word 0x080426e8 + 8036efc: 08042870 .word 0x08042870 + 8036f00: 08042738 .word 0x08042738 -08036e80 : +08036f04 : /** Send ARP/IGMP/MLD/RS events, e.g. on link-up/netif-up or addr-change */ static void netif_issue_reports(struct netif *netif, u8_t report_type) { - 8036e80: b580 push {r7, lr} - 8036e82: b082 sub sp, #8 - 8036e84: af00 add r7, sp, #0 - 8036e86: 6078 str r0, [r7, #4] - 8036e88: 460b mov r3, r1 - 8036e8a: 70fb strb r3, [r7, #3] + 8036f04: b580 push {r7, lr} + 8036f06: b082 sub sp, #8 + 8036f08: af00 add r7, sp, #0 + 8036f0a: 6078 str r0, [r7, #4] + 8036f0c: 460b mov r3, r1 + 8036f0e: 70fb strb r3, [r7, #3] LWIP_ASSERT("netif_issue_reports: invalid netif", netif != NULL); - 8036e8c: 687b ldr r3, [r7, #4] - 8036e8e: 2b00 cmp r3, #0 - 8036e90: d106 bne.n 8036ea0 - 8036e92: 4b18 ldr r3, [pc, #96] ; (8036ef4 ) - 8036e94: f240 326d movw r2, #877 ; 0x36d - 8036e98: 4917 ldr r1, [pc, #92] ; (8036ef8 ) - 8036e9a: 4818 ldr r0, [pc, #96] ; (8036efc ) - 8036e9c: f009 fe38 bl 8040b10 + 8036f10: 687b ldr r3, [r7, #4] + 8036f12: 2b00 cmp r3, #0 + 8036f14: d106 bne.n 8036f24 + 8036f16: 4b18 ldr r3, [pc, #96] ; (8036f78 ) + 8036f18: f240 326d movw r2, #877 ; 0x36d + 8036f1c: 4917 ldr r1, [pc, #92] ; (8036f7c ) + 8036f1e: 4818 ldr r0, [pc, #96] ; (8036f80 ) + 8036f20: f009 fe38 bl 8040b94 /* Only send reports when both link and admin states are up */ if (!(netif->flags & NETIF_FLAG_LINK_UP) || - 8036ea0: 687b ldr r3, [r7, #4] - 8036ea2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036ea6: f003 0304 and.w r3, r3, #4 - 8036eaa: 2b00 cmp r3, #0 - 8036eac: d01e beq.n 8036eec + 8036f24: 687b ldr r3, [r7, #4] + 8036f26: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036f2a: f003 0304 and.w r3, r3, #4 + 8036f2e: 2b00 cmp r3, #0 + 8036f30: d01e beq.n 8036f70 !(netif->flags & NETIF_FLAG_UP)) { - 8036eae: 687b ldr r3, [r7, #4] - 8036eb0: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036eb4: f003 0301 and.w r3, r3, #1 + 8036f32: 687b ldr r3, [r7, #4] + 8036f34: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036f38: f003 0301 and.w r3, r3, #1 if (!(netif->flags & NETIF_FLAG_LINK_UP) || - 8036eb8: 2b00 cmp r3, #0 - 8036eba: d017 beq.n 8036eec + 8036f3c: 2b00 cmp r3, #0 + 8036f3e: d017 beq.n 8036f70 return; } #if LWIP_IPV4 if ((report_type & NETIF_REPORT_TYPE_IPV4) && - 8036ebc: 78fb ldrb r3, [r7, #3] - 8036ebe: f003 0301 and.w r3, r3, #1 - 8036ec2: 2b00 cmp r3, #0 - 8036ec4: d013 beq.n 8036eee + 8036f40: 78fb ldrb r3, [r7, #3] + 8036f42: f003 0301 and.w r3, r3, #1 + 8036f46: 2b00 cmp r3, #0 + 8036f48: d013 beq.n 8036f72 !ip4_addr_isany_val(*netif_ip4_addr(netif))) { - 8036ec6: 687b ldr r3, [r7, #4] - 8036ec8: 3304 adds r3, #4 - 8036eca: 681b ldr r3, [r3, #0] + 8036f4a: 687b ldr r3, [r7, #4] + 8036f4c: 3304 adds r3, #4 + 8036f4e: 681b ldr r3, [r3, #0] if ((report_type & NETIF_REPORT_TYPE_IPV4) && - 8036ecc: 2b00 cmp r3, #0 - 8036ece: d00e beq.n 8036eee + 8036f50: 2b00 cmp r3, #0 + 8036f52: d00e beq.n 8036f72 #if LWIP_ARP /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */ if (netif->flags & (NETIF_FLAG_ETHARP)) { - 8036ed0: 687b ldr r3, [r7, #4] - 8036ed2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036ed6: f003 0308 and.w r3, r3, #8 - 8036eda: 2b00 cmp r3, #0 - 8036edc: d007 beq.n 8036eee + 8036f54: 687b ldr r3, [r7, #4] + 8036f56: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036f5a: f003 0308 and.w r3, r3, #8 + 8036f5e: 2b00 cmp r3, #0 + 8036f60: d007 beq.n 8036f72 etharp_gratuitous(netif); - 8036ede: 687b ldr r3, [r7, #4] - 8036ee0: 3304 adds r3, #4 - 8036ee2: 4619 mov r1, r3 - 8036ee4: 6878 ldr r0, [r7, #4] - 8036ee6: f008 f90d bl 803f104 - 8036eea: e000 b.n 8036eee + 8036f62: 687b ldr r3, [r7, #4] + 8036f64: 3304 adds r3, #4 + 8036f66: 4619 mov r1, r3 + 8036f68: 6878 ldr r0, [r7, #4] + 8036f6a: f008 f90d bl 803f188 + 8036f6e: e000 b.n 8036f72 return; - 8036eec: bf00 nop + 8036f70: bf00 nop /* send mld memberships */ mld6_report_groups(netif); #endif /* LWIP_IPV6_MLD */ } #endif /* LWIP_IPV6 */ } - 8036eee: 3708 adds r7, #8 - 8036ef0: 46bd mov sp, r7 - 8036ef2: bd80 pop {r7, pc} - 8036ef4: 08042668 .word 0x08042668 - 8036ef8: 0804280c .word 0x0804280c - 8036efc: 080426b8 .word 0x080426b8 + 8036f72: 3708 adds r7, #8 + 8036f74: 46bd mov sp, r7 + 8036f76: bd80 pop {r7, pc} + 8036f78: 080426e8 .word 0x080426e8 + 8036f7c: 0804288c .word 0x0804288c + 8036f80: 08042738 .word 0x08042738 -08036f00 : +08036f84 : * @ingroup netif * Bring an interface down, disabling any traffic processing. */ void netif_set_down(struct netif *netif) { - 8036f00: b580 push {r7, lr} - 8036f02: b082 sub sp, #8 - 8036f04: af00 add r7, sp, #0 - 8036f06: 6078 str r0, [r7, #4] + 8036f84: b580 push {r7, lr} + 8036f86: b082 sub sp, #8 + 8036f88: af00 add r7, sp, #0 + 8036f8a: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif_set_down: invalid netif", netif != NULL, return); - 8036f08: 687b ldr r3, [r7, #4] - 8036f0a: 2b00 cmp r3, #0 - 8036f0c: d107 bne.n 8036f1e - 8036f0e: 4b16 ldr r3, [pc, #88] ; (8036f68 ) - 8036f10: f240 329b movw r2, #923 ; 0x39b - 8036f14: 4915 ldr r1, [pc, #84] ; (8036f6c ) - 8036f16: 4816 ldr r0, [pc, #88] ; (8036f70 ) - 8036f18: f009 fdfa bl 8040b10 - 8036f1c: e021 b.n 8036f62 + 8036f8c: 687b ldr r3, [r7, #4] + 8036f8e: 2b00 cmp r3, #0 + 8036f90: d107 bne.n 8036fa2 + 8036f92: 4b16 ldr r3, [pc, #88] ; (8036fec ) + 8036f94: f240 329b movw r2, #923 ; 0x39b + 8036f98: 4915 ldr r1, [pc, #84] ; (8036ff0 ) + 8036f9a: 4816 ldr r0, [pc, #88] ; (8036ff4 ) + 8036f9c: f009 fdfa bl 8040b94 + 8036fa0: e021 b.n 8036fe6 if (netif->flags & NETIF_FLAG_UP) { - 8036f1e: 687b ldr r3, [r7, #4] - 8036f20: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036f24: f003 0301 and.w r3, r3, #1 - 8036f28: 2b00 cmp r3, #0 - 8036f2a: d01a beq.n 8036f62 + 8036fa2: 687b ldr r3, [r7, #4] + 8036fa4: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036fa8: f003 0301 and.w r3, r3, #1 + 8036fac: 2b00 cmp r3, #0 + 8036fae: d01a beq.n 8036fe6 args.status_changed.state = 0; netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args); } #endif netif_clear_flags(netif, NETIF_FLAG_UP); - 8036f2c: 687b ldr r3, [r7, #4] - 8036f2e: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036f32: f023 0301 bic.w r3, r3, #1 - 8036f36: b2da uxtb r2, r3 - 8036f38: 687b ldr r3, [r7, #4] - 8036f3a: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8036fb0: 687b ldr r3, [r7, #4] + 8036fb2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036fb6: f023 0301 bic.w r3, r3, #1 + 8036fba: b2da uxtb r2, r3 + 8036fbc: 687b ldr r3, [r7, #4] + 8036fbe: f883 2031 strb.w r2, [r3, #49] ; 0x31 MIB2_COPY_SYSUPTIME_TO(&netif->ts); #if LWIP_IPV4 && LWIP_ARP if (netif->flags & NETIF_FLAG_ETHARP) { - 8036f3e: 687b ldr r3, [r7, #4] - 8036f40: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036f44: f003 0308 and.w r3, r3, #8 - 8036f48: 2b00 cmp r3, #0 - 8036f4a: d002 beq.n 8036f52 + 8036fc2: 687b ldr r3, [r7, #4] + 8036fc4: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8036fc8: f003 0308 and.w r3, r3, #8 + 8036fcc: 2b00 cmp r3, #0 + 8036fce: d002 beq.n 8036fd6 etharp_cleanup_netif(netif); - 8036f4c: 6878 ldr r0, [r7, #4] - 8036f4e: f007 fc97 bl 803e880 + 8036fd0: 6878 ldr r0, [r7, #4] + 8036fd2: f007 fc97 bl 803e904 #if LWIP_IPV6 nd6_cleanup_netif(netif); #endif /* LWIP_IPV6 */ NETIF_STATUS_CALLBACK(netif); - 8036f52: 687b ldr r3, [r7, #4] - 8036f54: 69db ldr r3, [r3, #28] - 8036f56: 2b00 cmp r3, #0 - 8036f58: d003 beq.n 8036f62 - 8036f5a: 687b ldr r3, [r7, #4] - 8036f5c: 69db ldr r3, [r3, #28] - 8036f5e: 6878 ldr r0, [r7, #4] - 8036f60: 4798 blx r3 - } -} - 8036f62: 3708 adds r7, #8 - 8036f64: 46bd mov sp, r7 - 8036f66: bd80 pop {r7, pc} - 8036f68: 08042668 .word 0x08042668 - 8036f6c: 08042830 .word 0x08042830 - 8036f70: 080426b8 .word 0x080426b8 - -08036f74 : + 8036fd6: 687b ldr r3, [r7, #4] + 8036fd8: 69db ldr r3, [r3, #28] + 8036fda: 2b00 cmp r3, #0 + 8036fdc: d003 beq.n 8036fe6 + 8036fde: 687b ldr r3, [r7, #4] + 8036fe0: 69db ldr r3, [r3, #28] + 8036fe2: 6878 ldr r0, [r7, #4] + 8036fe4: 4798 blx r3 + } +} + 8036fe6: 3708 adds r7, #8 + 8036fe8: 46bd mov sp, r7 + 8036fea: bd80 pop {r7, pc} + 8036fec: 080426e8 .word 0x080426e8 + 8036ff0: 080428b0 .word 0x080428b0 + 8036ff4: 08042738 .word 0x08042738 + +08036ff8 : * @ingroup netif * Called by a driver when its link goes up */ void netif_set_link_up(struct netif *netif) { - 8036f74: b580 push {r7, lr} - 8036f76: b082 sub sp, #8 - 8036f78: af00 add r7, sp, #0 - 8036f7a: 6078 str r0, [r7, #4] + 8036ff8: b580 push {r7, lr} + 8036ffa: b082 sub sp, #8 + 8036ffc: af00 add r7, sp, #0 + 8036ffe: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif_set_link_up: invalid netif", netif != NULL, return); - 8036f7c: 687b ldr r3, [r7, #4] - 8036f7e: 2b00 cmp r3, #0 - 8036f80: d107 bne.n 8036f92 - 8036f82: 4b13 ldr r3, [pc, #76] ; (8036fd0 ) - 8036f84: f44f 7278 mov.w r2, #992 ; 0x3e0 - 8036f88: 4912 ldr r1, [pc, #72] ; (8036fd4 ) - 8036f8a: 4813 ldr r0, [pc, #76] ; (8036fd8 ) - 8036f8c: f009 fdc0 bl 8040b10 - 8036f90: e01b b.n 8036fca + 8037000: 687b ldr r3, [r7, #4] + 8037002: 2b00 cmp r3, #0 + 8037004: d107 bne.n 8037016 + 8037006: 4b13 ldr r3, [pc, #76] ; (8037054 ) + 8037008: f44f 7278 mov.w r2, #992 ; 0x3e0 + 803700c: 4912 ldr r1, [pc, #72] ; (8037058 ) + 803700e: 4813 ldr r0, [pc, #76] ; (803705c ) + 8037010: f009 fdc0 bl 8040b94 + 8037014: e01b b.n 803704e if (!(netif->flags & NETIF_FLAG_LINK_UP)) { - 8036f92: 687b ldr r3, [r7, #4] - 8036f94: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036f98: f003 0304 and.w r3, r3, #4 - 8036f9c: 2b00 cmp r3, #0 - 8036f9e: d114 bne.n 8036fca + 8037016: 687b ldr r3, [r7, #4] + 8037018: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803701c: f003 0304 and.w r3, r3, #4 + 8037020: 2b00 cmp r3, #0 + 8037022: d114 bne.n 803704e netif_set_flags(netif, NETIF_FLAG_LINK_UP); - 8036fa0: 687b ldr r3, [r7, #4] - 8036fa2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8036fa6: f043 0304 orr.w r3, r3, #4 - 8036faa: b2da uxtb r2, r3 - 8036fac: 687b ldr r3, [r7, #4] - 8036fae: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 8037024: 687b ldr r3, [r7, #4] + 8037026: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803702a: f043 0304 orr.w r3, r3, #4 + 803702e: b2da uxtb r2, r3 + 8037030: 687b ldr r3, [r7, #4] + 8037032: f883 2031 strb.w r2, [r3, #49] ; 0x31 #if LWIP_AUTOIP autoip_network_changed(netif); #endif /* LWIP_AUTOIP */ netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6); - 8036fb2: 2103 movs r1, #3 - 8036fb4: 6878 ldr r0, [r7, #4] - 8036fb6: f7ff ff63 bl 8036e80 + 8037036: 2103 movs r1, #3 + 8037038: 6878 ldr r0, [r7, #4] + 803703a: f7ff ff63 bl 8036f04 #if LWIP_IPV6 nd6_restart_netif(netif); #endif /* LWIP_IPV6 */ NETIF_LINK_CALLBACK(netif); - 8036fba: 687b ldr r3, [r7, #4] - 8036fbc: 6a1b ldr r3, [r3, #32] - 8036fbe: 2b00 cmp r3, #0 - 8036fc0: d003 beq.n 8036fca - 8036fc2: 687b ldr r3, [r7, #4] - 8036fc4: 6a1b ldr r3, [r3, #32] - 8036fc6: 6878 ldr r0, [r7, #4] - 8036fc8: 4798 blx r3 + 803703e: 687b ldr r3, [r7, #4] + 8037040: 6a1b ldr r3, [r3, #32] + 8037042: 2b00 cmp r3, #0 + 8037044: d003 beq.n 803704e + 8037046: 687b ldr r3, [r7, #4] + 8037048: 6a1b ldr r3, [r3, #32] + 803704a: 6878 ldr r0, [r7, #4] + 803704c: 4798 blx r3 args.link_changed.state = 1; netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args); } #endif } } - 8036fca: 3708 adds r7, #8 - 8036fcc: 46bd mov sp, r7 - 8036fce: bd80 pop {r7, pc} - 8036fd0: 08042668 .word 0x08042668 - 8036fd4: 08042850 .word 0x08042850 - 8036fd8: 080426b8 .word 0x080426b8 + 803704e: 3708 adds r7, #8 + 8037050: 46bd mov sp, r7 + 8037052: bd80 pop {r7, pc} + 8037054: 080426e8 .word 0x080426e8 + 8037058: 080428d0 .word 0x080428d0 + 803705c: 08042738 .word 0x08042738 -08036fdc : +08037060 : * @ingroup netif * Called by a driver when its link goes down */ void netif_set_link_down(struct netif *netif) { - 8036fdc: b580 push {r7, lr} - 8036fde: b082 sub sp, #8 - 8036fe0: af00 add r7, sp, #0 - 8036fe2: 6078 str r0, [r7, #4] + 8037060: b580 push {r7, lr} + 8037062: b082 sub sp, #8 + 8037064: af00 add r7, sp, #0 + 8037066: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif_set_link_down: invalid netif", netif != NULL, return); - 8036fe4: 687b ldr r3, [r7, #4] - 8036fe6: 2b00 cmp r3, #0 - 8036fe8: d107 bne.n 8036ffa - 8036fea: 4b11 ldr r3, [pc, #68] ; (8037030 ) - 8036fec: f240 4206 movw r2, #1030 ; 0x406 - 8036ff0: 4910 ldr r1, [pc, #64] ; (8037034 ) - 8036ff2: 4811 ldr r0, [pc, #68] ; (8037038 ) - 8036ff4: f009 fd8c bl 8040b10 - 8036ff8: e017 b.n 803702a + 8037068: 687b ldr r3, [r7, #4] + 803706a: 2b00 cmp r3, #0 + 803706c: d107 bne.n 803707e + 803706e: 4b11 ldr r3, [pc, #68] ; (80370b4 ) + 8037070: f240 4206 movw r2, #1030 ; 0x406 + 8037074: 4910 ldr r1, [pc, #64] ; (80370b8 ) + 8037076: 4811 ldr r0, [pc, #68] ; (80370bc ) + 8037078: f009 fd8c bl 8040b94 + 803707c: e017 b.n 80370ae if (netif->flags & NETIF_FLAG_LINK_UP) { - 8036ffa: 687b ldr r3, [r7, #4] - 8036ffc: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8037000: f003 0304 and.w r3, r3, #4 - 8037004: 2b00 cmp r3, #0 - 8037006: d010 beq.n 803702a + 803707e: 687b ldr r3, [r7, #4] + 8037080: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8037084: f003 0304 and.w r3, r3, #4 + 8037088: 2b00 cmp r3, #0 + 803708a: d010 beq.n 80370ae netif_clear_flags(netif, NETIF_FLAG_LINK_UP); - 8037008: 687b ldr r3, [r7, #4] - 803700a: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803700e: f023 0304 bic.w r3, r3, #4 - 8037012: b2da uxtb r2, r3 - 8037014: 687b ldr r3, [r7, #4] - 8037016: f883 2031 strb.w r2, [r3, #49] ; 0x31 + 803708c: 687b ldr r3, [r7, #4] + 803708e: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 8037092: f023 0304 bic.w r3, r3, #4 + 8037096: b2da uxtb r2, r3 + 8037098: 687b ldr r3, [r7, #4] + 803709a: f883 2031 strb.w r2, [r3, #49] ; 0x31 NETIF_LINK_CALLBACK(netif); - 803701a: 687b ldr r3, [r7, #4] - 803701c: 6a1b ldr r3, [r3, #32] - 803701e: 2b00 cmp r3, #0 - 8037020: d003 beq.n 803702a - 8037022: 687b ldr r3, [r7, #4] - 8037024: 6a1b ldr r3, [r3, #32] - 8037026: 6878 ldr r0, [r7, #4] - 8037028: 4798 blx r3 + 803709e: 687b ldr r3, [r7, #4] + 80370a0: 6a1b ldr r3, [r3, #32] + 80370a2: 2b00 cmp r3, #0 + 80370a4: d003 beq.n 80370ae + 80370a6: 687b ldr r3, [r7, #4] + 80370a8: 6a1b ldr r3, [r3, #32] + 80370aa: 6878 ldr r0, [r7, #4] + 80370ac: 4798 blx r3 args.link_changed.state = 0; netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args); } #endif } } - 803702a: 3708 adds r7, #8 - 803702c: 46bd mov sp, r7 - 803702e: bd80 pop {r7, pc} - 8037030: 08042668 .word 0x08042668 - 8037034: 08042874 .word 0x08042874 - 8037038: 080426b8 .word 0x080426b8 + 80370ae: 3708 adds r7, #8 + 80370b0: 46bd mov sp, r7 + 80370b2: bd80 pop {r7, pc} + 80370b4: 080426e8 .word 0x080426e8 + 80370b8: 080428f4 .word 0x080428f4 + 80370bc: 08042738 .word 0x08042738 -0803703c : +080370c0 : * @ingroup netif * Set callback to be called when link is brought up/down */ void netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback) { - 803703c: b480 push {r7} - 803703e: b083 sub sp, #12 - 8037040: af00 add r7, sp, #0 - 8037042: 6078 str r0, [r7, #4] - 8037044: 6039 str r1, [r7, #0] + 80370c0: b480 push {r7} + 80370c2: b083 sub sp, #12 + 80370c4: af00 add r7, sp, #0 + 80370c6: 6078 str r0, [r7, #4] + 80370c8: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if (netif) { - 8037046: 687b ldr r3, [r7, #4] - 8037048: 2b00 cmp r3, #0 - 803704a: d002 beq.n 8037052 + 80370ca: 687b ldr r3, [r7, #4] + 80370cc: 2b00 cmp r3, #0 + 80370ce: d002 beq.n 80370d6 netif->link_callback = link_callback; - 803704c: 687b ldr r3, [r7, #4] - 803704e: 683a ldr r2, [r7, #0] - 8037050: 621a str r2, [r3, #32] + 80370d0: 687b ldr r3, [r7, #4] + 80370d2: 683a ldr r2, [r7, #0] + 80370d4: 621a str r2, [r3, #32] } } - 8037052: bf00 nop - 8037054: 370c adds r7, #12 - 8037056: 46bd mov sp, r7 - 8037058: f85d 7b04 ldr.w r7, [sp], #4 - 803705c: 4770 bx lr + 80370d6: bf00 nop + 80370d8: 370c adds r7, #12 + 80370da: 46bd mov sp, r7 + 80370dc: f85d 7b04 ldr.w r7, [sp], #4 + 80370e0: 4770 bx lr -0803705e : +080370e2 : #if LWIP_IPV4 /** Dummy IPv4 output function for netifs not supporting IPv4 */ static err_t netif_null_output_ip4(struct netif *netif, struct pbuf *p, const ip4_addr_t *ipaddr) { - 803705e: b480 push {r7} - 8037060: b085 sub sp, #20 - 8037062: af00 add r7, sp, #0 - 8037064: 60f8 str r0, [r7, #12] - 8037066: 60b9 str r1, [r7, #8] - 8037068: 607a str r2, [r7, #4] + 80370e2: b480 push {r7} + 80370e4: b085 sub sp, #20 + 80370e6: af00 add r7, sp, #0 + 80370e8: 60f8 str r0, [r7, #12] + 80370ea: 60b9 str r1, [r7, #8] + 80370ec: 607a str r2, [r7, #4] LWIP_UNUSED_ARG(netif); LWIP_UNUSED_ARG(p); LWIP_UNUSED_ARG(ipaddr); return ERR_IF; - 803706a: f06f 030b mvn.w r3, #11 + 80370ee: f06f 030b mvn.w r3, #11 } - 803706e: 4618 mov r0, r3 - 8037070: 3714 adds r7, #20 - 8037072: 46bd mov sp, r7 - 8037074: f85d 7b04 ldr.w r7, [sp], #4 - 8037078: 4770 bx lr + 80370f2: 4618 mov r0, r3 + 80370f4: 3714 adds r7, #20 + 80370f6: 46bd mov sp, r7 + 80370f8: f85d 7b04 ldr.w r7, [sp], #4 + 80370fc: 4770 bx lr ... -0803707c : +08037100 : * * @param idx index of netif to find */ struct netif * netif_get_by_index(u8_t idx) { - 803707c: b480 push {r7} - 803707e: b085 sub sp, #20 - 8037080: af00 add r7, sp, #0 - 8037082: 4603 mov r3, r0 - 8037084: 71fb strb r3, [r7, #7] + 8037100: b480 push {r7} + 8037102: b085 sub sp, #20 + 8037104: af00 add r7, sp, #0 + 8037106: 4603 mov r3, r0 + 8037108: 71fb strb r3, [r7, #7] struct netif *netif; LWIP_ASSERT_CORE_LOCKED(); if (idx != NETIF_NO_INDEX) { - 8037086: 79fb ldrb r3, [r7, #7] - 8037088: 2b00 cmp r3, #0 - 803708a: d013 beq.n 80370b4 + 803710a: 79fb ldrb r3, [r7, #7] + 803710c: 2b00 cmp r3, #0 + 803710e: d013 beq.n 8037138 NETIF_FOREACH(netif) { - 803708c: 4b0d ldr r3, [pc, #52] ; (80370c4 ) - 803708e: 681b ldr r3, [r3, #0] - 8037090: 60fb str r3, [r7, #12] - 8037092: e00c b.n 80370ae + 8037110: 4b0d ldr r3, [pc, #52] ; (8037148 ) + 8037112: 681b ldr r3, [r3, #0] + 8037114: 60fb str r3, [r7, #12] + 8037116: e00c b.n 8037132 if (idx == netif_get_index(netif)) { - 8037094: 68fb ldr r3, [r7, #12] - 8037096: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 803709a: 3301 adds r3, #1 - 803709c: b2db uxtb r3, r3 - 803709e: 79fa ldrb r2, [r7, #7] - 80370a0: 429a cmp r2, r3 - 80370a2: d101 bne.n 80370a8 + 8037118: 68fb ldr r3, [r7, #12] + 803711a: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 803711e: 3301 adds r3, #1 + 8037120: b2db uxtb r3, r3 + 8037122: 79fa ldrb r2, [r7, #7] + 8037124: 429a cmp r2, r3 + 8037126: d101 bne.n 803712c return netif; /* found! */ - 80370a4: 68fb ldr r3, [r7, #12] - 80370a6: e006 b.n 80370b6 + 8037128: 68fb ldr r3, [r7, #12] + 803712a: e006 b.n 803713a NETIF_FOREACH(netif) { - 80370a8: 68fb ldr r3, [r7, #12] - 80370aa: 681b ldr r3, [r3, #0] - 80370ac: 60fb str r3, [r7, #12] - 80370ae: 68fb ldr r3, [r7, #12] - 80370b0: 2b00 cmp r3, #0 - 80370b2: d1ef bne.n 8037094 + 803712c: 68fb ldr r3, [r7, #12] + 803712e: 681b ldr r3, [r3, #0] + 8037130: 60fb str r3, [r7, #12] + 8037132: 68fb ldr r3, [r7, #12] + 8037134: 2b00 cmp r3, #0 + 8037136: d1ef bne.n 8037118 } } } return NULL; - 80370b4: 2300 movs r3, #0 + 8037138: 2300 movs r3, #0 } - 80370b6: 4618 mov r0, r3 - 80370b8: 3714 adds r7, #20 - 80370ba: 46bd mov sp, r7 - 80370bc: f85d 7b04 ldr.w r7, [sp], #4 - 80370c0: 4770 bx lr - 80370c2: bf00 nop - 80370c4: 2400e94c .word 0x2400e94c + 803713a: 4618 mov r0, r3 + 803713c: 3714 adds r7, #20 + 803713e: 46bd mov sp, r7 + 8037140: f85d 7b04 ldr.w r7, [sp], #4 + 8037144: 4770 bx lr + 8037146: bf00 nop + 8037148: 2400e954 .word 0x2400e954 -080370c8 : +0803714c : #if !NO_SYS static #endif /* !NO_SYS */ void pbuf_free_ooseq(void) { - 80370c8: b580 push {r7, lr} - 80370ca: b082 sub sp, #8 - 80370cc: af00 add r7, sp, #0 + 803714c: b580 push {r7, lr} + 803714e: b082 sub sp, #8 + 8037150: af00 add r7, sp, #0 struct tcp_pcb *pcb; SYS_ARCH_SET(pbuf_free_ooseq_pending, 0); - 80370ce: 4b0c ldr r3, [pc, #48] ; (8037100 ) - 80370d0: 2200 movs r2, #0 - 80370d2: 701a strb r2, [r3, #0] + 8037152: 4b0c ldr r3, [pc, #48] ; (8037184 ) + 8037154: 2200 movs r2, #0 + 8037156: 701a strb r2, [r3, #0] for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) { - 80370d4: 4b0b ldr r3, [pc, #44] ; (8037104 ) - 80370d6: 681b ldr r3, [r3, #0] - 80370d8: 607b str r3, [r7, #4] - 80370da: e00a b.n 80370f2 + 8037158: 4b0b ldr r3, [pc, #44] ; (8037188 ) + 803715a: 681b ldr r3, [r3, #0] + 803715c: 607b str r3, [r7, #4] + 803715e: e00a b.n 8037176 if (pcb->ooseq != NULL) { - 80370dc: 687b ldr r3, [r7, #4] - 80370de: 6f5b ldr r3, [r3, #116] ; 0x74 - 80370e0: 2b00 cmp r3, #0 - 80370e2: d003 beq.n 80370ec + 8037160: 687b ldr r3, [r7, #4] + 8037162: 6f5b ldr r3, [r3, #116] ; 0x74 + 8037164: 2b00 cmp r3, #0 + 8037166: d003 beq.n 8037170 /** Free the ooseq pbufs of one PCB only */ LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n")); tcp_free_ooseq(pcb); - 80370e4: 6878 ldr r0, [r7, #4] - 80370e6: f002 fba1 bl 803982c + 8037168: 6878 ldr r0, [r7, #4] + 803716a: f002 fba1 bl 80398b0 return; - 80370ea: e005 b.n 80370f8 + 803716e: e005 b.n 803717c for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) { - 80370ec: 687b ldr r3, [r7, #4] - 80370ee: 68db ldr r3, [r3, #12] - 80370f0: 607b str r3, [r7, #4] - 80370f2: 687b ldr r3, [r7, #4] - 80370f4: 2b00 cmp r3, #0 - 80370f6: d1f1 bne.n 80370dc + 8037170: 687b ldr r3, [r7, #4] + 8037172: 68db ldr r3, [r3, #12] + 8037174: 607b str r3, [r7, #4] + 8037176: 687b ldr r3, [r7, #4] + 8037178: 2b00 cmp r3, #0 + 803717a: d1f1 bne.n 8037160 } } } - 80370f8: 3708 adds r7, #8 - 80370fa: 46bd mov sp, r7 - 80370fc: bd80 pop {r7, pc} - 80370fe: bf00 nop - 8037100: 2400e955 .word 0x2400e955 - 8037104: 2400e964 .word 0x2400e964 + 803717c: 3708 adds r7, #8 + 803717e: 46bd mov sp, r7 + 8037180: bd80 pop {r7, pc} + 8037182: bf00 nop + 8037184: 2400e95d .word 0x2400e95d + 8037188: 2400e96c .word 0x2400e96c -08037108 : +0803718c : #endif /* !NO_SYS */ /** Queue a call to pbuf_free_ooseq if not already queued. */ static void pbuf_pool_is_empty(void) { - 8037108: b480 push {r7} - 803710a: af00 add r7, sp, #0 + 803718c: b480 push {r7} + 803718e: af00 add r7, sp, #0 #ifndef PBUF_POOL_FREE_OOSEQ_QUEUE_CALL SYS_ARCH_SET(pbuf_free_ooseq_pending, 1); - 803710c: 4b03 ldr r3, [pc, #12] ; (803711c ) - 803710e: 2201 movs r2, #1 - 8037110: 701a strb r2, [r3, #0] + 8037190: 4b03 ldr r3, [pc, #12] ; (80371a0 ) + 8037192: 2201 movs r2, #1 + 8037194: 701a strb r2, [r3, #0] if (!queued) { /* queue a call to pbuf_free_ooseq if not already queued */ PBUF_POOL_FREE_OOSEQ_QUEUE_CALL(); } #endif /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */ } - 8037112: bf00 nop - 8037114: 46bd mov sp, r7 - 8037116: f85d 7b04 ldr.w r7, [sp], #4 - 803711a: 4770 bx lr - 803711c: 2400e955 .word 0x2400e955 + 8037196: bf00 nop + 8037198: 46bd mov sp, r7 + 803719a: f85d 7b04 ldr.w r7, [sp], #4 + 803719e: 4770 bx lr + 80371a0: 2400e95d .word 0x2400e95d -08037120 : +080371a4 : #endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || !PBUF_POOL_FREE_OOSEQ */ /* Initialize members of struct pbuf after allocation */ static void pbuf_init_alloced_pbuf(struct pbuf *p, void *payload, u16_t tot_len, u16_t len, pbuf_type type, u8_t flags) { - 8037120: b480 push {r7} - 8037122: b085 sub sp, #20 - 8037124: af00 add r7, sp, #0 - 8037126: 60f8 str r0, [r7, #12] - 8037128: 60b9 str r1, [r7, #8] - 803712a: 4611 mov r1, r2 - 803712c: 461a mov r2, r3 - 803712e: 460b mov r3, r1 - 8037130: 80fb strh r3, [r7, #6] - 8037132: 4613 mov r3, r2 - 8037134: 80bb strh r3, [r7, #4] + 80371a4: b480 push {r7} + 80371a6: b085 sub sp, #20 + 80371a8: af00 add r7, sp, #0 + 80371aa: 60f8 str r0, [r7, #12] + 80371ac: 60b9 str r1, [r7, #8] + 80371ae: 4611 mov r1, r2 + 80371b0: 461a mov r2, r3 + 80371b2: 460b mov r3, r1 + 80371b4: 80fb strh r3, [r7, #6] + 80371b6: 4613 mov r3, r2 + 80371b8: 80bb strh r3, [r7, #4] p->next = NULL; - 8037136: 68fb ldr r3, [r7, #12] - 8037138: 2200 movs r2, #0 - 803713a: 601a str r2, [r3, #0] + 80371ba: 68fb ldr r3, [r7, #12] + 80371bc: 2200 movs r2, #0 + 80371be: 601a str r2, [r3, #0] p->payload = payload; - 803713c: 68fb ldr r3, [r7, #12] - 803713e: 68ba ldr r2, [r7, #8] - 8037140: 605a str r2, [r3, #4] + 80371c0: 68fb ldr r3, [r7, #12] + 80371c2: 68ba ldr r2, [r7, #8] + 80371c4: 605a str r2, [r3, #4] p->tot_len = tot_len; - 8037142: 68fb ldr r3, [r7, #12] - 8037144: 88fa ldrh r2, [r7, #6] - 8037146: 811a strh r2, [r3, #8] + 80371c6: 68fb ldr r3, [r7, #12] + 80371c8: 88fa ldrh r2, [r7, #6] + 80371ca: 811a strh r2, [r3, #8] p->len = len; - 8037148: 68fb ldr r3, [r7, #12] - 803714a: 88ba ldrh r2, [r7, #4] - 803714c: 815a strh r2, [r3, #10] + 80371cc: 68fb ldr r3, [r7, #12] + 80371ce: 88ba ldrh r2, [r7, #4] + 80371d0: 815a strh r2, [r3, #10] p->type_internal = (u8_t)type; - 803714e: 8b3b ldrh r3, [r7, #24] - 8037150: b2da uxtb r2, r3 - 8037152: 68fb ldr r3, [r7, #12] - 8037154: 731a strb r2, [r3, #12] + 80371d2: 8b3b ldrh r3, [r7, #24] + 80371d4: b2da uxtb r2, r3 + 80371d6: 68fb ldr r3, [r7, #12] + 80371d8: 731a strb r2, [r3, #12] p->flags = flags; - 8037156: 68fb ldr r3, [r7, #12] - 8037158: 7f3a ldrb r2, [r7, #28] - 803715a: 735a strb r2, [r3, #13] + 80371da: 68fb ldr r3, [r7, #12] + 80371dc: 7f3a ldrb r2, [r7, #28] + 80371de: 735a strb r2, [r3, #13] p->ref = 1; - 803715c: 68fb ldr r3, [r7, #12] - 803715e: 2201 movs r2, #1 - 8037160: 739a strb r2, [r3, #14] + 80371e0: 68fb ldr r3, [r7, #12] + 80371e2: 2201 movs r2, #1 + 80371e4: 739a strb r2, [r3, #14] p->if_idx = NETIF_NO_INDEX; - 8037162: 68fb ldr r3, [r7, #12] - 8037164: 2200 movs r2, #0 - 8037166: 73da strb r2, [r3, #15] + 80371e6: 68fb ldr r3, [r7, #12] + 80371e8: 2200 movs r2, #0 + 80371ea: 73da strb r2, [r3, #15] } - 8037168: bf00 nop - 803716a: 3714 adds r7, #20 - 803716c: 46bd mov sp, r7 - 803716e: f85d 7b04 ldr.w r7, [sp], #4 - 8037172: 4770 bx lr + 80371ec: bf00 nop + 80371ee: 3714 adds r7, #20 + 80371f0: 46bd mov sp, r7 + 80371f2: f85d 7b04 ldr.w r7, [sp], #4 + 80371f6: 4770 bx lr -08037174 : +080371f8 : * @return the allocated pbuf. If multiple pbufs where allocated, this * is the first pbuf of a pbuf chain. */ struct pbuf * pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type) { - 8037174: b580 push {r7, lr} - 8037176: b08c sub sp, #48 ; 0x30 - 8037178: af02 add r7, sp, #8 - 803717a: 4603 mov r3, r0 - 803717c: 71fb strb r3, [r7, #7] - 803717e: 460b mov r3, r1 - 8037180: 80bb strh r3, [r7, #4] - 8037182: 4613 mov r3, r2 - 8037184: 807b strh r3, [r7, #2] + 80371f8: b580 push {r7, lr} + 80371fa: b08c sub sp, #48 ; 0x30 + 80371fc: af02 add r7, sp, #8 + 80371fe: 4603 mov r3, r0 + 8037200: 71fb strb r3, [r7, #7] + 8037202: 460b mov r3, r1 + 8037204: 80bb strh r3, [r7, #4] + 8037206: 4613 mov r3, r2 + 8037208: 807b strh r3, [r7, #2] struct pbuf *p; u16_t offset = (u16_t)layer; - 8037186: 79fb ldrb r3, [r7, #7] - 8037188: 847b strh r3, [r7, #34] ; 0x22 + 803720a: 79fb ldrb r3, [r7, #7] + 803720c: 847b strh r3, [r7, #34] ; 0x22 LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length)); switch (type) { - 803718a: 887b ldrh r3, [r7, #2] - 803718c: f5b3 7f20 cmp.w r3, #640 ; 0x280 - 8037190: d07f beq.n 8037292 - 8037192: f5b3 7f20 cmp.w r3, #640 ; 0x280 - 8037196: f300 80c8 bgt.w 803732a - 803719a: f5b3 7fc1 cmp.w r3, #386 ; 0x182 - 803719e: d010 beq.n 80371c2 - 80371a0: f5b3 7fc1 cmp.w r3, #386 ; 0x182 - 80371a4: f300 80c1 bgt.w 803732a - 80371a8: 2b01 cmp r3, #1 - 80371aa: d002 beq.n 80371b2 - 80371ac: 2b41 cmp r3, #65 ; 0x41 - 80371ae: f040 80bc bne.w 803732a + 803720e: 887b ldrh r3, [r7, #2] + 8037210: f5b3 7f20 cmp.w r3, #640 ; 0x280 + 8037214: d07f beq.n 8037316 + 8037216: f5b3 7f20 cmp.w r3, #640 ; 0x280 + 803721a: f300 80c8 bgt.w 80373ae + 803721e: f5b3 7fc1 cmp.w r3, #386 ; 0x182 + 8037222: d010 beq.n 8037246 + 8037224: f5b3 7fc1 cmp.w r3, #386 ; 0x182 + 8037228: f300 80c1 bgt.w 80373ae + 803722c: 2b01 cmp r3, #1 + 803722e: d002 beq.n 8037236 + 8037230: 2b41 cmp r3, #65 ; 0x41 + 8037232: f040 80bc bne.w 80373ae case PBUF_REF: /* fall through */ case PBUF_ROM: p = pbuf_alloc_reference(NULL, length, type); - 80371b2: 887a ldrh r2, [r7, #2] - 80371b4: 88bb ldrh r3, [r7, #4] - 80371b6: 4619 mov r1, r3 - 80371b8: 2000 movs r0, #0 - 80371ba: f000 f8d1 bl 8037360 - 80371be: 6278 str r0, [r7, #36] ; 0x24 + 8037236: 887a ldrh r2, [r7, #2] + 8037238: 88bb ldrh r3, [r7, #4] + 803723a: 4619 mov r1, r3 + 803723c: 2000 movs r0, #0 + 803723e: f000 f8d1 bl 80373e4 + 8037242: 6278 str r0, [r7, #36] ; 0x24 break; - 80371c0: e0bd b.n 803733e + 8037244: e0bd b.n 80373c2 case PBUF_POOL: { struct pbuf *q, *last; u16_t rem_len; /* remaining length */ p = NULL; - 80371c2: 2300 movs r3, #0 - 80371c4: 627b str r3, [r7, #36] ; 0x24 + 8037246: 2300 movs r3, #0 + 8037248: 627b str r3, [r7, #36] ; 0x24 last = NULL; - 80371c6: 2300 movs r3, #0 - 80371c8: 61fb str r3, [r7, #28] + 803724a: 2300 movs r3, #0 + 803724c: 61fb str r3, [r7, #28] rem_len = length; - 80371ca: 88bb ldrh r3, [r7, #4] - 80371cc: 837b strh r3, [r7, #26] + 803724e: 88bb ldrh r3, [r7, #4] + 8037250: 837b strh r3, [r7, #26] do { u16_t qlen; q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL); - 80371ce: 2008 movs r0, #8 - 80371d0: f7ff fbb2 bl 8036938 - 80371d4: 6138 str r0, [r7, #16] + 8037252: 2008 movs r0, #8 + 8037254: f7ff fbb2 bl 80369bc + 8037258: 6138 str r0, [r7, #16] if (q == NULL) { - 80371d6: 693b ldr r3, [r7, #16] - 80371d8: 2b00 cmp r3, #0 - 80371da: d109 bne.n 80371f0 + 803725a: 693b ldr r3, [r7, #16] + 803725c: 2b00 cmp r3, #0 + 803725e: d109 bne.n 8037274 PBUF_POOL_IS_EMPTY(); - 80371dc: f7ff ff94 bl 8037108 + 8037260: f7ff ff94 bl 803718c /* free chain so far allocated */ if (p) { - 80371e0: 6a7b ldr r3, [r7, #36] ; 0x24 - 80371e2: 2b00 cmp r3, #0 - 80371e4: d002 beq.n 80371ec + 8037264: 6a7b ldr r3, [r7, #36] ; 0x24 + 8037266: 2b00 cmp r3, #0 + 8037268: d002 beq.n 8037270 pbuf_free(p); - 80371e6: 6a78 ldr r0, [r7, #36] ; 0x24 - 80371e8: f000 faa8 bl 803773c + 803726a: 6a78 ldr r0, [r7, #36] ; 0x24 + 803726c: f000 faa8 bl 80377c0 } /* bail out unsuccessfully */ return NULL; - 80371ec: 2300 movs r3, #0 - 80371ee: e0a7 b.n 8037340 + 8037270: 2300 movs r3, #0 + 8037272: e0a7 b.n 80373c4 } qlen = LWIP_MIN(rem_len, (u16_t)(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset))); - 80371f0: 8c7b ldrh r3, [r7, #34] ; 0x22 - 80371f2: 3303 adds r3, #3 - 80371f4: b29b uxth r3, r3 - 80371f6: f023 0303 bic.w r3, r3, #3 - 80371fa: b29b uxth r3, r3 - 80371fc: f5c3 7314 rsb r3, r3, #592 ; 0x250 - 8037200: b29b uxth r3, r3 - 8037202: 8b7a ldrh r2, [r7, #26] - 8037204: 4293 cmp r3, r2 - 8037206: bf28 it cs - 8037208: 4613 movcs r3, r2 - 803720a: 81fb strh r3, [r7, #14] + 8037274: 8c7b ldrh r3, [r7, #34] ; 0x22 + 8037276: 3303 adds r3, #3 + 8037278: b29b uxth r3, r3 + 803727a: f023 0303 bic.w r3, r3, #3 + 803727e: b29b uxth r3, r3 + 8037280: f5c3 7314 rsb r3, r3, #592 ; 0x250 + 8037284: b29b uxth r3, r3 + 8037286: 8b7a ldrh r2, [r7, #26] + 8037288: 4293 cmp r3, r2 + 803728a: bf28 it cs + 803728c: 4613 movcs r3, r2 + 803728e: 81fb strh r3, [r7, #14] pbuf_init_alloced_pbuf(q, LWIP_MEM_ALIGN((void *)((u8_t *)q + SIZEOF_STRUCT_PBUF + offset)), - 803720c: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803720e: 3310 adds r3, #16 - 8037210: 693a ldr r2, [r7, #16] - 8037212: 4413 add r3, r2 - 8037214: 3303 adds r3, #3 - 8037216: f023 0303 bic.w r3, r3, #3 - 803721a: 4618 mov r0, r3 - 803721c: 89f9 ldrh r1, [r7, #14] - 803721e: 8b7a ldrh r2, [r7, #26] - 8037220: 2300 movs r3, #0 - 8037222: 9301 str r3, [sp, #4] - 8037224: 887b ldrh r3, [r7, #2] - 8037226: 9300 str r3, [sp, #0] - 8037228: 460b mov r3, r1 - 803722a: 4601 mov r1, r0 - 803722c: 6938 ldr r0, [r7, #16] - 803722e: f7ff ff77 bl 8037120 + 8037290: 8c7b ldrh r3, [r7, #34] ; 0x22 + 8037292: 3310 adds r3, #16 + 8037294: 693a ldr r2, [r7, #16] + 8037296: 4413 add r3, r2 + 8037298: 3303 adds r3, #3 + 803729a: f023 0303 bic.w r3, r3, #3 + 803729e: 4618 mov r0, r3 + 80372a0: 89f9 ldrh r1, [r7, #14] + 80372a2: 8b7a ldrh r2, [r7, #26] + 80372a4: 2300 movs r3, #0 + 80372a6: 9301 str r3, [sp, #4] + 80372a8: 887b ldrh r3, [r7, #2] + 80372aa: 9300 str r3, [sp, #0] + 80372ac: 460b mov r3, r1 + 80372ae: 4601 mov r1, r0 + 80372b0: 6938 ldr r0, [r7, #16] + 80372b2: f7ff ff77 bl 80371a4 rem_len, qlen, type, 0); LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned", - 8037232: 693b ldr r3, [r7, #16] - 8037234: 685b ldr r3, [r3, #4] - 8037236: f003 0303 and.w r3, r3, #3 - 803723a: 2b00 cmp r3, #0 - 803723c: d006 beq.n 803724c - 803723e: 4b42 ldr r3, [pc, #264] ; (8037348 ) - 8037240: f44f 7280 mov.w r2, #256 ; 0x100 - 8037244: 4941 ldr r1, [pc, #260] ; (803734c ) - 8037246: 4842 ldr r0, [pc, #264] ; (8037350 ) - 8037248: f009 fc62 bl 8040b10 + 80372b6: 693b ldr r3, [r7, #16] + 80372b8: 685b ldr r3, [r3, #4] + 80372ba: f003 0303 and.w r3, r3, #3 + 80372be: 2b00 cmp r3, #0 + 80372c0: d006 beq.n 80372d0 + 80372c2: 4b42 ldr r3, [pc, #264] ; (80373cc ) + 80372c4: f44f 7280 mov.w r2, #256 ; 0x100 + 80372c8: 4941 ldr r1, [pc, #260] ; (80373d0 ) + 80372ca: 4842 ldr r0, [pc, #264] ; (80373d4 ) + 80372cc: f009 fc62 bl 8040b94 ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0); LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT", - 803724c: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803724e: 3303 adds r3, #3 - 8037250: f023 0303 bic.w r3, r3, #3 - 8037254: f5b3 7f14 cmp.w r3, #592 ; 0x250 - 8037258: d106 bne.n 8037268 - 803725a: 4b3b ldr r3, [pc, #236] ; (8037348 ) - 803725c: f44f 7281 mov.w r2, #258 ; 0x102 - 8037260: 493c ldr r1, [pc, #240] ; (8037354 ) - 8037262: 483b ldr r0, [pc, #236] ; (8037350 ) - 8037264: f009 fc54 bl 8040b10 + 80372d0: 8c7b ldrh r3, [r7, #34] ; 0x22 + 80372d2: 3303 adds r3, #3 + 80372d4: f023 0303 bic.w r3, r3, #3 + 80372d8: f5b3 7f14 cmp.w r3, #592 ; 0x250 + 80372dc: d106 bne.n 80372ec + 80372de: 4b3b ldr r3, [pc, #236] ; (80373cc ) + 80372e0: f44f 7281 mov.w r2, #258 ; 0x102 + 80372e4: 493c ldr r1, [pc, #240] ; (80373d8 ) + 80372e6: 483b ldr r0, [pc, #236] ; (80373d4 ) + 80372e8: f009 fc54 bl 8040b94 (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 ); if (p == NULL) { - 8037268: 6a7b ldr r3, [r7, #36] ; 0x24 - 803726a: 2b00 cmp r3, #0 - 803726c: d102 bne.n 8037274 + 80372ec: 6a7b ldr r3, [r7, #36] ; 0x24 + 80372ee: 2b00 cmp r3, #0 + 80372f0: d102 bne.n 80372f8 /* allocated head of pbuf chain (into p) */ p = q; - 803726e: 693b ldr r3, [r7, #16] - 8037270: 627b str r3, [r7, #36] ; 0x24 - 8037272: e002 b.n 803727a + 80372f2: 693b ldr r3, [r7, #16] + 80372f4: 627b str r3, [r7, #36] ; 0x24 + 80372f6: e002 b.n 80372fe } else { /* make previous pbuf point to this pbuf */ last->next = q; - 8037274: 69fb ldr r3, [r7, #28] - 8037276: 693a ldr r2, [r7, #16] - 8037278: 601a str r2, [r3, #0] + 80372f8: 69fb ldr r3, [r7, #28] + 80372fa: 693a ldr r2, [r7, #16] + 80372fc: 601a str r2, [r3, #0] } last = q; - 803727a: 693b ldr r3, [r7, #16] - 803727c: 61fb str r3, [r7, #28] + 80372fe: 693b ldr r3, [r7, #16] + 8037300: 61fb str r3, [r7, #28] rem_len = (u16_t)(rem_len - qlen); - 803727e: 8b7a ldrh r2, [r7, #26] - 8037280: 89fb ldrh r3, [r7, #14] - 8037282: 1ad3 subs r3, r2, r3 - 8037284: 837b strh r3, [r7, #26] + 8037302: 8b7a ldrh r2, [r7, #26] + 8037304: 89fb ldrh r3, [r7, #14] + 8037306: 1ad3 subs r3, r2, r3 + 8037308: 837b strh r3, [r7, #26] offset = 0; - 8037286: 2300 movs r3, #0 - 8037288: 847b strh r3, [r7, #34] ; 0x22 + 803730a: 2300 movs r3, #0 + 803730c: 847b strh r3, [r7, #34] ; 0x22 } while (rem_len > 0); - 803728a: 8b7b ldrh r3, [r7, #26] - 803728c: 2b00 cmp r3, #0 - 803728e: d19e bne.n 80371ce + 803730e: 8b7b ldrh r3, [r7, #26] + 8037310: 2b00 cmp r3, #0 + 8037312: d19e bne.n 8037252 break; - 8037290: e055 b.n 803733e + 8037314: e055 b.n 80373c2 } case PBUF_RAM: { u16_t payload_len = (u16_t)(LWIP_MEM_ALIGN_SIZE(offset) + LWIP_MEM_ALIGN_SIZE(length)); - 8037292: 8c7b ldrh r3, [r7, #34] ; 0x22 - 8037294: 3303 adds r3, #3 - 8037296: b29b uxth r3, r3 - 8037298: f023 0303 bic.w r3, r3, #3 - 803729c: b29a uxth r2, r3 - 803729e: 88bb ldrh r3, [r7, #4] - 80372a0: 3303 adds r3, #3 - 80372a2: b29b uxth r3, r3 - 80372a4: f023 0303 bic.w r3, r3, #3 - 80372a8: b29b uxth r3, r3 - 80372aa: 4413 add r3, r2 - 80372ac: 833b strh r3, [r7, #24] + 8037316: 8c7b ldrh r3, [r7, #34] ; 0x22 + 8037318: 3303 adds r3, #3 + 803731a: b29b uxth r3, r3 + 803731c: f023 0303 bic.w r3, r3, #3 + 8037320: b29a uxth r2, r3 + 8037322: 88bb ldrh r3, [r7, #4] + 8037324: 3303 adds r3, #3 + 8037326: b29b uxth r3, r3 + 8037328: f023 0303 bic.w r3, r3, #3 + 803732c: b29b uxth r3, r3 + 803732e: 4413 add r3, r2 + 8037330: 833b strh r3, [r7, #24] mem_size_t alloc_len = (mem_size_t)(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF) + payload_len); - 80372ae: 8b3b ldrh r3, [r7, #24] - 80372b0: 3310 adds r3, #16 - 80372b2: 82fb strh r3, [r7, #22] + 8037332: 8b3b ldrh r3, [r7, #24] + 8037334: 3310 adds r3, #16 + 8037336: 82fb strh r3, [r7, #22] /* bug #50040: Check for integer overflow when calculating alloc_len */ if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) || - 80372b4: 8b3a ldrh r2, [r7, #24] - 80372b6: 88bb ldrh r3, [r7, #4] - 80372b8: 3303 adds r3, #3 - 80372ba: f023 0303 bic.w r3, r3, #3 - 80372be: 429a cmp r2, r3 - 80372c0: d306 bcc.n 80372d0 + 8037338: 8b3a ldrh r2, [r7, #24] + 803733a: 88bb ldrh r3, [r7, #4] + 803733c: 3303 adds r3, #3 + 803733e: f023 0303 bic.w r3, r3, #3 + 8037342: 429a cmp r2, r3 + 8037344: d306 bcc.n 8037354 (alloc_len < LWIP_MEM_ALIGN_SIZE(length))) { - 80372c2: 8afa ldrh r2, [r7, #22] - 80372c4: 88bb ldrh r3, [r7, #4] - 80372c6: 3303 adds r3, #3 - 80372c8: f023 0303 bic.w r3, r3, #3 + 8037346: 8afa ldrh r2, [r7, #22] + 8037348: 88bb ldrh r3, [r7, #4] + 803734a: 3303 adds r3, #3 + 803734c: f023 0303 bic.w r3, r3, #3 if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) || - 80372cc: 429a cmp r2, r3 - 80372ce: d201 bcs.n 80372d4 + 8037350: 429a cmp r2, r3 + 8037352: d201 bcs.n 8037358 return NULL; - 80372d0: 2300 movs r3, #0 - 80372d2: e035 b.n 8037340 + 8037354: 2300 movs r3, #0 + 8037356: e035 b.n 80373c4 } /* If pbuf is to be allocated in RAM, allocate memory for it. */ p = (struct pbuf *)mem_malloc(alloc_len); - 80372d4: 8afb ldrh r3, [r7, #22] - 80372d6: 4618 mov r0, r3 - 80372d8: f7ff f99e bl 8036618 - 80372dc: 6278 str r0, [r7, #36] ; 0x24 + 8037358: 8afb ldrh r3, [r7, #22] + 803735a: 4618 mov r0, r3 + 803735c: f7ff f99e bl 803669c + 8037360: 6278 str r0, [r7, #36] ; 0x24 if (p == NULL) { - 80372de: 6a7b ldr r3, [r7, #36] ; 0x24 - 80372e0: 2b00 cmp r3, #0 - 80372e2: d101 bne.n 80372e8 + 8037362: 6a7b ldr r3, [r7, #36] ; 0x24 + 8037364: 2b00 cmp r3, #0 + 8037366: d101 bne.n 803736c return NULL; - 80372e4: 2300 movs r3, #0 - 80372e6: e02b b.n 8037340 + 8037368: 2300 movs r3, #0 + 803736a: e02b b.n 80373c4 } pbuf_init_alloced_pbuf(p, LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)), - 80372e8: 8c7b ldrh r3, [r7, #34] ; 0x22 - 80372ea: 3310 adds r3, #16 - 80372ec: 6a7a ldr r2, [r7, #36] ; 0x24 - 80372ee: 4413 add r3, r2 - 80372f0: 3303 adds r3, #3 - 80372f2: f023 0303 bic.w r3, r3, #3 - 80372f6: 4618 mov r0, r3 - 80372f8: 88b9 ldrh r1, [r7, #4] - 80372fa: 88ba ldrh r2, [r7, #4] - 80372fc: 2300 movs r3, #0 - 80372fe: 9301 str r3, [sp, #4] - 8037300: 887b ldrh r3, [r7, #2] - 8037302: 9300 str r3, [sp, #0] - 8037304: 460b mov r3, r1 - 8037306: 4601 mov r1, r0 - 8037308: 6a78 ldr r0, [r7, #36] ; 0x24 - 803730a: f7ff ff09 bl 8037120 + 803736c: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803736e: 3310 adds r3, #16 + 8037370: 6a7a ldr r2, [r7, #36] ; 0x24 + 8037372: 4413 add r3, r2 + 8037374: 3303 adds r3, #3 + 8037376: f023 0303 bic.w r3, r3, #3 + 803737a: 4618 mov r0, r3 + 803737c: 88b9 ldrh r1, [r7, #4] + 803737e: 88ba ldrh r2, [r7, #4] + 8037380: 2300 movs r3, #0 + 8037382: 9301 str r3, [sp, #4] + 8037384: 887b ldrh r3, [r7, #2] + 8037386: 9300 str r3, [sp, #0] + 8037388: 460b mov r3, r1 + 803738a: 4601 mov r1, r0 + 803738c: 6a78 ldr r0, [r7, #36] ; 0x24 + 803738e: f7ff ff09 bl 80371a4 length, length, type, 0); LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned", - 803730e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8037310: 685b ldr r3, [r3, #4] - 8037312: f003 0303 and.w r3, r3, #3 - 8037316: 2b00 cmp r3, #0 - 8037318: d010 beq.n 803733c - 803731a: 4b0b ldr r3, [pc, #44] ; (8037348 ) - 803731c: f44f 7291 mov.w r2, #290 ; 0x122 - 8037320: 490d ldr r1, [pc, #52] ; (8037358 ) - 8037322: 480b ldr r0, [pc, #44] ; (8037350 ) - 8037324: f009 fbf4 bl 8040b10 + 8037392: 6a7b ldr r3, [r7, #36] ; 0x24 + 8037394: 685b ldr r3, [r3, #4] + 8037396: f003 0303 and.w r3, r3, #3 + 803739a: 2b00 cmp r3, #0 + 803739c: d010 beq.n 80373c0 + 803739e: 4b0b ldr r3, [pc, #44] ; (80373cc ) + 80373a0: f44f 7291 mov.w r2, #290 ; 0x122 + 80373a4: 490d ldr r1, [pc, #52] ; (80373dc ) + 80373a6: 480b ldr r0, [pc, #44] ; (80373d4 ) + 80373a8: f009 fbf4 bl 8040b94 ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); break; - 8037328: e008 b.n 803733c + 80373ac: e008 b.n 80373c0 } default: LWIP_ASSERT("pbuf_alloc: erroneous type", 0); - 803732a: 4b07 ldr r3, [pc, #28] ; (8037348 ) - 803732c: f240 1227 movw r2, #295 ; 0x127 - 8037330: 490a ldr r1, [pc, #40] ; (803735c ) - 8037332: 4807 ldr r0, [pc, #28] ; (8037350 ) - 8037334: f009 fbec bl 8040b10 + 80373ae: 4b07 ldr r3, [pc, #28] ; (80373cc ) + 80373b0: f240 1227 movw r2, #295 ; 0x127 + 80373b4: 490a ldr r1, [pc, #40] ; (80373e0 ) + 80373b6: 4807 ldr r0, [pc, #28] ; (80373d4 ) + 80373b8: f009 fbec bl 8040b94 return NULL; - 8037338: 2300 movs r3, #0 - 803733a: e001 b.n 8037340 + 80373bc: 2300 movs r3, #0 + 80373be: e001 b.n 80373c4 break; - 803733c: bf00 nop + 80373c0: bf00 nop } LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p)); return p; - 803733e: 6a7b ldr r3, [r7, #36] ; 0x24 -} - 8037340: 4618 mov r0, r3 - 8037342: 3728 adds r7, #40 ; 0x28 - 8037344: 46bd mov sp, r7 - 8037346: bd80 pop {r7, pc} - 8037348: 08042898 .word 0x08042898 - 803734c: 080428c8 .word 0x080428c8 - 8037350: 080428f8 .word 0x080428f8 - 8037354: 08042920 .word 0x08042920 - 8037358: 08042954 .word 0x08042954 - 803735c: 08042980 .word 0x08042980 - -08037360 : + 80373c2: 6a7b ldr r3, [r7, #36] ; 0x24 +} + 80373c4: 4618 mov r0, r3 + 80373c6: 3728 adds r7, #40 ; 0x28 + 80373c8: 46bd mov sp, r7 + 80373ca: bd80 pop {r7, pc} + 80373cc: 08042918 .word 0x08042918 + 80373d0: 08042948 .word 0x08042948 + 80373d4: 08042978 .word 0x08042978 + 80373d8: 080429a0 .word 0x080429a0 + 80373dc: 080429d4 .word 0x080429d4 + 80373e0: 08042a00 .word 0x08042a00 + +080373e4 : * * @return the allocated pbuf. */ struct pbuf * pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type) { - 8037360: b580 push {r7, lr} - 8037362: b086 sub sp, #24 - 8037364: af02 add r7, sp, #8 - 8037366: 6078 str r0, [r7, #4] - 8037368: 460b mov r3, r1 - 803736a: 807b strh r3, [r7, #2] - 803736c: 4613 mov r3, r2 - 803736e: 803b strh r3, [r7, #0] + 80373e4: b580 push {r7, lr} + 80373e6: b086 sub sp, #24 + 80373e8: af02 add r7, sp, #8 + 80373ea: 6078 str r0, [r7, #4] + 80373ec: 460b mov r3, r1 + 80373ee: 807b strh r3, [r7, #2] + 80373f0: 4613 mov r3, r2 + 80373f2: 803b strh r3, [r7, #0] struct pbuf *p; LWIP_ASSERT("invalid pbuf_type", (type == PBUF_REF) || (type == PBUF_ROM)); - 8037370: 883b ldrh r3, [r7, #0] - 8037372: 2b41 cmp r3, #65 ; 0x41 - 8037374: d009 beq.n 803738a - 8037376: 883b ldrh r3, [r7, #0] - 8037378: 2b01 cmp r3, #1 - 803737a: d006 beq.n 803738a - 803737c: 4b0f ldr r3, [pc, #60] ; (80373bc ) - 803737e: f44f 72a5 mov.w r2, #330 ; 0x14a - 8037382: 490f ldr r1, [pc, #60] ; (80373c0 ) - 8037384: 480f ldr r0, [pc, #60] ; (80373c4 ) - 8037386: f009 fbc3 bl 8040b10 + 80373f4: 883b ldrh r3, [r7, #0] + 80373f6: 2b41 cmp r3, #65 ; 0x41 + 80373f8: d009 beq.n 803740e + 80373fa: 883b ldrh r3, [r7, #0] + 80373fc: 2b01 cmp r3, #1 + 80373fe: d006 beq.n 803740e + 8037400: 4b0f ldr r3, [pc, #60] ; (8037440 ) + 8037402: f44f 72a5 mov.w r2, #330 ; 0x14a + 8037406: 490f ldr r1, [pc, #60] ; (8037444 ) + 8037408: 480f ldr r0, [pc, #60] ; (8037448 ) + 803740a: f009 fbc3 bl 8040b94 /* only allocate memory for the pbuf structure */ p = (struct pbuf *)memp_malloc(MEMP_PBUF); - 803738a: 2007 movs r0, #7 - 803738c: f7ff fad4 bl 8036938 - 8037390: 60f8 str r0, [r7, #12] + 803740e: 2007 movs r0, #7 + 8037410: f7ff fad4 bl 80369bc + 8037414: 60f8 str r0, [r7, #12] if (p == NULL) { - 8037392: 68fb ldr r3, [r7, #12] - 8037394: 2b00 cmp r3, #0 - 8037396: d101 bne.n 803739c + 8037416: 68fb ldr r3, [r7, #12] + 8037418: 2b00 cmp r3, #0 + 803741a: d101 bne.n 8037420 LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("pbuf_alloc_reference: Could not allocate MEMP_PBUF for PBUF_%s.\n", (type == PBUF_ROM) ? "ROM" : "REF")); return NULL; - 8037398: 2300 movs r3, #0 - 803739a: e00b b.n 80373b4 + 803741c: 2300 movs r3, #0 + 803741e: e00b b.n 8037438 } pbuf_init_alloced_pbuf(p, payload, length, length, type, 0); - 803739c: 8879 ldrh r1, [r7, #2] - 803739e: 887a ldrh r2, [r7, #2] - 80373a0: 2300 movs r3, #0 - 80373a2: 9301 str r3, [sp, #4] - 80373a4: 883b ldrh r3, [r7, #0] - 80373a6: 9300 str r3, [sp, #0] - 80373a8: 460b mov r3, r1 - 80373aa: 6879 ldr r1, [r7, #4] - 80373ac: 68f8 ldr r0, [r7, #12] - 80373ae: f7ff feb7 bl 8037120 + 8037420: 8879 ldrh r1, [r7, #2] + 8037422: 887a ldrh r2, [r7, #2] + 8037424: 2300 movs r3, #0 + 8037426: 9301 str r3, [sp, #4] + 8037428: 883b ldrh r3, [r7, #0] + 803742a: 9300 str r3, [sp, #0] + 803742c: 460b mov r3, r1 + 803742e: 6879 ldr r1, [r7, #4] + 8037430: 68f8 ldr r0, [r7, #12] + 8037432: f7ff feb7 bl 80371a4 return p; - 80373b2: 68fb ldr r3, [r7, #12] + 8037436: 68fb ldr r3, [r7, #12] } - 80373b4: 4618 mov r0, r3 - 80373b6: 3710 adds r7, #16 - 80373b8: 46bd mov sp, r7 - 80373ba: bd80 pop {r7, pc} - 80373bc: 08042898 .word 0x08042898 - 80373c0: 0804299c .word 0x0804299c - 80373c4: 080428f8 .word 0x080428f8 + 8037438: 4618 mov r0, r3 + 803743a: 3710 adds r7, #16 + 803743c: 46bd mov sp, r7 + 803743e: bd80 pop {r7, pc} + 8037440: 08042918 .word 0x08042918 + 8037444: 08042a1c .word 0x08042a1c + 8037448: 08042978 .word 0x08042978 -080373c8 : +0803744c : * big enough to hold 'length' plus the header size */ struct pbuf * pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p, void *payload_mem, u16_t payload_mem_len) { - 80373c8: b580 push {r7, lr} - 80373ca: b088 sub sp, #32 - 80373cc: af02 add r7, sp, #8 - 80373ce: 607b str r3, [r7, #4] - 80373d0: 4603 mov r3, r0 - 80373d2: 73fb strb r3, [r7, #15] - 80373d4: 460b mov r3, r1 - 80373d6: 81bb strh r3, [r7, #12] - 80373d8: 4613 mov r3, r2 - 80373da: 817b strh r3, [r7, #10] + 803744c: b580 push {r7, lr} + 803744e: b088 sub sp, #32 + 8037450: af02 add r7, sp, #8 + 8037452: 607b str r3, [r7, #4] + 8037454: 4603 mov r3, r0 + 8037456: 73fb strb r3, [r7, #15] + 8037458: 460b mov r3, r1 + 803745a: 81bb strh r3, [r7, #12] + 803745c: 4613 mov r3, r2 + 803745e: 817b strh r3, [r7, #10] u16_t offset = (u16_t)l; - 80373dc: 7bfb ldrb r3, [r7, #15] - 80373de: 827b strh r3, [r7, #18] + 8037460: 7bfb ldrb r3, [r7, #15] + 8037462: 827b strh r3, [r7, #18] void *payload; LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length)); if (LWIP_MEM_ALIGN_SIZE(offset) + length > payload_mem_len) { - 80373e0: 8a7b ldrh r3, [r7, #18] - 80373e2: 3303 adds r3, #3 - 80373e4: f023 0203 bic.w r2, r3, #3 - 80373e8: 89bb ldrh r3, [r7, #12] - 80373ea: 441a add r2, r3 - 80373ec: 8cbb ldrh r3, [r7, #36] ; 0x24 - 80373ee: 429a cmp r2, r3 - 80373f0: d901 bls.n 80373f6 + 8037464: 8a7b ldrh r3, [r7, #18] + 8037466: 3303 adds r3, #3 + 8037468: f023 0203 bic.w r2, r3, #3 + 803746c: 89bb ldrh r3, [r7, #12] + 803746e: 441a add r2, r3 + 8037470: 8cbb ldrh r3, [r7, #36] ; 0x24 + 8037472: 429a cmp r2, r3 + 8037474: d901 bls.n 803747a LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length)); return NULL; - 80373f2: 2300 movs r3, #0 - 80373f4: e018 b.n 8037428 + 8037476: 2300 movs r3, #0 + 8037478: e018 b.n 80374ac } if (payload_mem != NULL) { - 80373f6: 6a3b ldr r3, [r7, #32] - 80373f8: 2b00 cmp r3, #0 - 80373fa: d007 beq.n 803740c + 803747a: 6a3b ldr r3, [r7, #32] + 803747c: 2b00 cmp r3, #0 + 803747e: d007 beq.n 8037490 payload = (u8_t *)payload_mem + LWIP_MEM_ALIGN_SIZE(offset); - 80373fc: 8a7b ldrh r3, [r7, #18] - 80373fe: 3303 adds r3, #3 - 8037400: f023 0303 bic.w r3, r3, #3 - 8037404: 6a3a ldr r2, [r7, #32] - 8037406: 4413 add r3, r2 - 8037408: 617b str r3, [r7, #20] - 803740a: e001 b.n 8037410 + 8037480: 8a7b ldrh r3, [r7, #18] + 8037482: 3303 adds r3, #3 + 8037484: f023 0303 bic.w r3, r3, #3 + 8037488: 6a3a ldr r2, [r7, #32] + 803748a: 4413 add r3, r2 + 803748c: 617b str r3, [r7, #20] + 803748e: e001 b.n 8037494 } else { payload = NULL; - 803740c: 2300 movs r3, #0 - 803740e: 617b str r3, [r7, #20] + 8037490: 2300 movs r3, #0 + 8037492: 617b str r3, [r7, #20] } pbuf_init_alloced_pbuf(&p->pbuf, payload, length, length, type, PBUF_FLAG_IS_CUSTOM); - 8037410: 6878 ldr r0, [r7, #4] - 8037412: 89b9 ldrh r1, [r7, #12] - 8037414: 89ba ldrh r2, [r7, #12] - 8037416: 2302 movs r3, #2 - 8037418: 9301 str r3, [sp, #4] - 803741a: 897b ldrh r3, [r7, #10] - 803741c: 9300 str r3, [sp, #0] - 803741e: 460b mov r3, r1 - 8037420: 6979 ldr r1, [r7, #20] - 8037422: f7ff fe7d bl 8037120 + 8037494: 6878 ldr r0, [r7, #4] + 8037496: 89b9 ldrh r1, [r7, #12] + 8037498: 89ba ldrh r2, [r7, #12] + 803749a: 2302 movs r3, #2 + 803749c: 9301 str r3, [sp, #4] + 803749e: 897b ldrh r3, [r7, #10] + 80374a0: 9300 str r3, [sp, #0] + 80374a2: 460b mov r3, r1 + 80374a4: 6979 ldr r1, [r7, #20] + 80374a6: f7ff fe7d bl 80371a4 return &p->pbuf; - 8037426: 687b ldr r3, [r7, #4] + 80374aa: 687b ldr r3, [r7, #4] } - 8037428: 4618 mov r0, r3 - 803742a: 3718 adds r7, #24 - 803742c: 46bd mov sp, r7 - 803742e: bd80 pop {r7, pc} + 80374ac: 4618 mov r0, r3 + 80374ae: 3718 adds r7, #24 + 80374b0: 46bd mov sp, r7 + 80374b2: bd80 pop {r7, pc} -08037430 : +080374b4 : * * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain). */ void pbuf_realloc(struct pbuf *p, u16_t new_len) { - 8037430: b580 push {r7, lr} - 8037432: b084 sub sp, #16 - 8037434: af00 add r7, sp, #0 - 8037436: 6078 str r0, [r7, #4] - 8037438: 460b mov r3, r1 - 803743a: 807b strh r3, [r7, #2] + 80374b4: b580 push {r7, lr} + 80374b6: b084 sub sp, #16 + 80374b8: af00 add r7, sp, #0 + 80374ba: 6078 str r0, [r7, #4] + 80374bc: 460b mov r3, r1 + 80374be: 807b strh r3, [r7, #2] struct pbuf *q; u16_t rem_len; /* remaining length */ u16_t shrink; LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL); - 803743c: 687b ldr r3, [r7, #4] - 803743e: 2b00 cmp r3, #0 - 8037440: d106 bne.n 8037450 - 8037442: 4b3a ldr r3, [pc, #232] ; (803752c ) - 8037444: f44f 72cc mov.w r2, #408 ; 0x198 - 8037448: 4939 ldr r1, [pc, #228] ; (8037530 ) - 803744a: 483a ldr r0, [pc, #232] ; (8037534 ) - 803744c: f009 fb60 bl 8040b10 + 80374c0: 687b ldr r3, [r7, #4] + 80374c2: 2b00 cmp r3, #0 + 80374c4: d106 bne.n 80374d4 + 80374c6: 4b3a ldr r3, [pc, #232] ; (80375b0 ) + 80374c8: f44f 72cc mov.w r2, #408 ; 0x198 + 80374cc: 4939 ldr r1, [pc, #228] ; (80375b4 ) + 80374ce: 483a ldr r0, [pc, #232] ; (80375b8 ) + 80374d0: f009 fb60 bl 8040b94 /* desired length larger than current length? */ if (new_len >= p->tot_len) { - 8037450: 687b ldr r3, [r7, #4] - 8037452: 891b ldrh r3, [r3, #8] - 8037454: 887a ldrh r2, [r7, #2] - 8037456: 429a cmp r2, r3 - 8037458: d263 bcs.n 8037522 + 80374d4: 687b ldr r3, [r7, #4] + 80374d6: 891b ldrh r3, [r3, #8] + 80374d8: 887a ldrh r2, [r7, #2] + 80374da: 429a cmp r2, r3 + 80374dc: d263 bcs.n 80375a6 return; } /* the pbuf chain grows by (new_len - p->tot_len) bytes * (which may be negative in case of shrinking) */ shrink = (u16_t)(p->tot_len - new_len); - 803745a: 687b ldr r3, [r7, #4] - 803745c: 891a ldrh r2, [r3, #8] - 803745e: 887b ldrh r3, [r7, #2] - 8037460: 1ad3 subs r3, r2, r3 - 8037462: 813b strh r3, [r7, #8] + 80374de: 687b ldr r3, [r7, #4] + 80374e0: 891a ldrh r2, [r3, #8] + 80374e2: 887b ldrh r3, [r7, #2] + 80374e4: 1ad3 subs r3, r2, r3 + 80374e6: 813b strh r3, [r7, #8] /* first, step over any pbufs that should remain in the chain */ rem_len = new_len; - 8037464: 887b ldrh r3, [r7, #2] - 8037466: 817b strh r3, [r7, #10] + 80374e8: 887b ldrh r3, [r7, #2] + 80374ea: 817b strh r3, [r7, #10] q = p; - 8037468: 687b ldr r3, [r7, #4] - 803746a: 60fb str r3, [r7, #12] + 80374ec: 687b ldr r3, [r7, #4] + 80374ee: 60fb str r3, [r7, #12] /* should this pbuf be kept? */ while (rem_len > q->len) { - 803746c: e018 b.n 80374a0 + 80374f0: e018 b.n 8037524 /* decrease remaining length by pbuf length */ rem_len = (u16_t)(rem_len - q->len); - 803746e: 68fb ldr r3, [r7, #12] - 8037470: 895b ldrh r3, [r3, #10] - 8037472: 897a ldrh r2, [r7, #10] - 8037474: 1ad3 subs r3, r2, r3 - 8037476: 817b strh r3, [r7, #10] + 80374f2: 68fb ldr r3, [r7, #12] + 80374f4: 895b ldrh r3, [r3, #10] + 80374f6: 897a ldrh r2, [r7, #10] + 80374f8: 1ad3 subs r3, r2, r3 + 80374fa: 817b strh r3, [r7, #10] /* decrease total length indicator */ q->tot_len = (u16_t)(q->tot_len - shrink); - 8037478: 68fb ldr r3, [r7, #12] - 803747a: 891a ldrh r2, [r3, #8] - 803747c: 893b ldrh r3, [r7, #8] - 803747e: 1ad3 subs r3, r2, r3 - 8037480: b29a uxth r2, r3 - 8037482: 68fb ldr r3, [r7, #12] - 8037484: 811a strh r2, [r3, #8] + 80374fc: 68fb ldr r3, [r7, #12] + 80374fe: 891a ldrh r2, [r3, #8] + 8037500: 893b ldrh r3, [r7, #8] + 8037502: 1ad3 subs r3, r2, r3 + 8037504: b29a uxth r2, r3 + 8037506: 68fb ldr r3, [r7, #12] + 8037508: 811a strh r2, [r3, #8] /* proceed to next pbuf in chain */ q = q->next; - 8037486: 68fb ldr r3, [r7, #12] - 8037488: 681b ldr r3, [r3, #0] - 803748a: 60fb str r3, [r7, #12] + 803750a: 68fb ldr r3, [r7, #12] + 803750c: 681b ldr r3, [r3, #0] + 803750e: 60fb str r3, [r7, #12] LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL); - 803748c: 68fb ldr r3, [r7, #12] - 803748e: 2b00 cmp r3, #0 - 8037490: d106 bne.n 80374a0 - 8037492: 4b26 ldr r3, [pc, #152] ; (803752c ) - 8037494: f240 12af movw r2, #431 ; 0x1af - 8037498: 4927 ldr r1, [pc, #156] ; (8037538 ) - 803749a: 4826 ldr r0, [pc, #152] ; (8037534 ) - 803749c: f009 fb38 bl 8040b10 + 8037510: 68fb ldr r3, [r7, #12] + 8037512: 2b00 cmp r3, #0 + 8037514: d106 bne.n 8037524 + 8037516: 4b26 ldr r3, [pc, #152] ; (80375b0 ) + 8037518: f240 12af movw r2, #431 ; 0x1af + 803751c: 4927 ldr r1, [pc, #156] ; (80375bc ) + 803751e: 4826 ldr r0, [pc, #152] ; (80375b8 ) + 8037520: f009 fb38 bl 8040b94 while (rem_len > q->len) { - 80374a0: 68fb ldr r3, [r7, #12] - 80374a2: 895b ldrh r3, [r3, #10] - 80374a4: 897a ldrh r2, [r7, #10] - 80374a6: 429a cmp r2, r3 - 80374a8: d8e1 bhi.n 803746e + 8037524: 68fb ldr r3, [r7, #12] + 8037526: 895b ldrh r3, [r3, #10] + 8037528: 897a ldrh r2, [r7, #10] + 803752a: 429a cmp r2, r3 + 803752c: d8e1 bhi.n 80374f2 /* we have now reached the new last pbuf (in q) */ /* rem_len == desired length for pbuf q */ /* shrink allocated memory for PBUF_RAM */ /* (other types merely adjust their length fields */ if (pbuf_match_allocsrc(q, PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) && (rem_len != q->len) - 80374aa: 68fb ldr r3, [r7, #12] - 80374ac: 7b1b ldrb r3, [r3, #12] - 80374ae: f003 030f and.w r3, r3, #15 - 80374b2: 2b00 cmp r3, #0 - 80374b4: d121 bne.n 80374fa - 80374b6: 68fb ldr r3, [r7, #12] - 80374b8: 895b ldrh r3, [r3, #10] - 80374ba: 897a ldrh r2, [r7, #10] - 80374bc: 429a cmp r2, r3 - 80374be: d01c beq.n 80374fa + 803752e: 68fb ldr r3, [r7, #12] + 8037530: 7b1b ldrb r3, [r3, #12] + 8037532: f003 030f and.w r3, r3, #15 + 8037536: 2b00 cmp r3, #0 + 8037538: d121 bne.n 803757e + 803753a: 68fb ldr r3, [r7, #12] + 803753c: 895b ldrh r3, [r3, #10] + 803753e: 897a ldrh r2, [r7, #10] + 8037540: 429a cmp r2, r3 + 8037542: d01c beq.n 803757e #if LWIP_SUPPORT_CUSTOM_PBUF && ((q->flags & PBUF_FLAG_IS_CUSTOM) == 0) - 80374c0: 68fb ldr r3, [r7, #12] - 80374c2: 7b5b ldrb r3, [r3, #13] - 80374c4: f003 0302 and.w r3, r3, #2 - 80374c8: 2b00 cmp r3, #0 - 80374ca: d116 bne.n 80374fa + 8037544: 68fb ldr r3, [r7, #12] + 8037546: 7b5b ldrb r3, [r3, #13] + 8037548: f003 0302 and.w r3, r3, #2 + 803754c: 2b00 cmp r3, #0 + 803754e: d116 bne.n 803757e #endif /* LWIP_SUPPORT_CUSTOM_PBUF */ ) { /* reallocate and adjust the length of the pbuf that will be split */ q = (struct pbuf *)mem_trim(q, (mem_size_t)(((u8_t *)q->payload - (u8_t *)q) + rem_len)); - 80374cc: 68fb ldr r3, [r7, #12] - 80374ce: 685a ldr r2, [r3, #4] - 80374d0: 68fb ldr r3, [r7, #12] - 80374d2: 1ad3 subs r3, r2, r3 - 80374d4: b29a uxth r2, r3 - 80374d6: 897b ldrh r3, [r7, #10] - 80374d8: 4413 add r3, r2 - 80374da: b29b uxth r3, r3 - 80374dc: 4619 mov r1, r3 - 80374de: 68f8 ldr r0, [r7, #12] - 80374e0: f7fe ff9e bl 8036420 - 80374e4: 60f8 str r0, [r7, #12] + 8037550: 68fb ldr r3, [r7, #12] + 8037552: 685a ldr r2, [r3, #4] + 8037554: 68fb ldr r3, [r7, #12] + 8037556: 1ad3 subs r3, r2, r3 + 8037558: b29a uxth r2, r3 + 803755a: 897b ldrh r3, [r7, #10] + 803755c: 4413 add r3, r2 + 803755e: b29b uxth r3, r3 + 8037560: 4619 mov r1, r3 + 8037562: 68f8 ldr r0, [r7, #12] + 8037564: f7fe ff9e bl 80364a4 + 8037568: 60f8 str r0, [r7, #12] LWIP_ASSERT("mem_trim returned q == NULL", q != NULL); - 80374e6: 68fb ldr r3, [r7, #12] - 80374e8: 2b00 cmp r3, #0 - 80374ea: d106 bne.n 80374fa - 80374ec: 4b0f ldr r3, [pc, #60] ; (803752c ) - 80374ee: f240 12bd movw r2, #445 ; 0x1bd - 80374f2: 4912 ldr r1, [pc, #72] ; (803753c ) - 80374f4: 480f ldr r0, [pc, #60] ; (8037534 ) - 80374f6: f009 fb0b bl 8040b10 + 803756a: 68fb ldr r3, [r7, #12] + 803756c: 2b00 cmp r3, #0 + 803756e: d106 bne.n 803757e + 8037570: 4b0f ldr r3, [pc, #60] ; (80375b0 ) + 8037572: f240 12bd movw r2, #445 ; 0x1bd + 8037576: 4912 ldr r1, [pc, #72] ; (80375c0 ) + 8037578: 480f ldr r0, [pc, #60] ; (80375b8 ) + 803757a: f009 fb0b bl 8040b94 } /* adjust length fields for new last pbuf */ q->len = rem_len; - 80374fa: 68fb ldr r3, [r7, #12] - 80374fc: 897a ldrh r2, [r7, #10] - 80374fe: 815a strh r2, [r3, #10] + 803757e: 68fb ldr r3, [r7, #12] + 8037580: 897a ldrh r2, [r7, #10] + 8037582: 815a strh r2, [r3, #10] q->tot_len = q->len; - 8037500: 68fb ldr r3, [r7, #12] - 8037502: 895a ldrh r2, [r3, #10] - 8037504: 68fb ldr r3, [r7, #12] - 8037506: 811a strh r2, [r3, #8] + 8037584: 68fb ldr r3, [r7, #12] + 8037586: 895a ldrh r2, [r3, #10] + 8037588: 68fb ldr r3, [r7, #12] + 803758a: 811a strh r2, [r3, #8] /* any remaining pbufs in chain? */ if (q->next != NULL) { - 8037508: 68fb ldr r3, [r7, #12] - 803750a: 681b ldr r3, [r3, #0] - 803750c: 2b00 cmp r3, #0 - 803750e: d004 beq.n 803751a + 803758c: 68fb ldr r3, [r7, #12] + 803758e: 681b ldr r3, [r3, #0] + 8037590: 2b00 cmp r3, #0 + 8037592: d004 beq.n 803759e /* free remaining pbufs in chain */ pbuf_free(q->next); - 8037510: 68fb ldr r3, [r7, #12] - 8037512: 681b ldr r3, [r3, #0] - 8037514: 4618 mov r0, r3 - 8037516: f000 f911 bl 803773c + 8037594: 68fb ldr r3, [r7, #12] + 8037596: 681b ldr r3, [r3, #0] + 8037598: 4618 mov r0, r3 + 803759a: f000 f911 bl 80377c0 } /* q is last packet in chain */ q->next = NULL; - 803751a: 68fb ldr r3, [r7, #12] - 803751c: 2200 movs r2, #0 - 803751e: 601a str r2, [r3, #0] - 8037520: e000 b.n 8037524 + 803759e: 68fb ldr r3, [r7, #12] + 80375a0: 2200 movs r2, #0 + 80375a2: 601a str r2, [r3, #0] + 80375a4: e000 b.n 80375a8 return; - 8037522: bf00 nop + 80375a6: bf00 nop } - 8037524: 3710 adds r7, #16 - 8037526: 46bd mov sp, r7 - 8037528: bd80 pop {r7, pc} - 803752a: bf00 nop - 803752c: 08042898 .word 0x08042898 - 8037530: 080429b0 .word 0x080429b0 - 8037534: 080428f8 .word 0x080428f8 - 8037538: 080429c8 .word 0x080429c8 - 803753c: 080429e0 .word 0x080429e0 + 80375a8: 3710 adds r7, #16 + 80375aa: 46bd mov sp, r7 + 80375ac: bd80 pop {r7, pc} + 80375ae: bf00 nop + 80375b0: 08042918 .word 0x08042918 + 80375b4: 08042a30 .word 0x08042a30 + 80375b8: 08042978 .word 0x08042978 + 80375bc: 08042a48 .word 0x08042a48 + 80375c0: 08042a60 .word 0x08042a60 -08037540 : +080375c4 : * @return non-zero on failure, zero on success. * */ static u8_t pbuf_add_header_impl(struct pbuf *p, size_t header_size_increment, u8_t force) { - 8037540: b580 push {r7, lr} - 8037542: b086 sub sp, #24 - 8037544: af00 add r7, sp, #0 - 8037546: 60f8 str r0, [r7, #12] - 8037548: 60b9 str r1, [r7, #8] - 803754a: 4613 mov r3, r2 - 803754c: 71fb strb r3, [r7, #7] + 80375c4: b580 push {r7, lr} + 80375c6: b086 sub sp, #24 + 80375c8: af00 add r7, sp, #0 + 80375ca: 60f8 str r0, [r7, #12] + 80375cc: 60b9 str r1, [r7, #8] + 80375ce: 4613 mov r3, r2 + 80375d0: 71fb strb r3, [r7, #7] u16_t type_internal; void *payload; u16_t increment_magnitude; LWIP_ASSERT("p != NULL", p != NULL); - 803754e: 68fb ldr r3, [r7, #12] - 8037550: 2b00 cmp r3, #0 - 8037552: d106 bne.n 8037562 - 8037554: 4b2b ldr r3, [pc, #172] ; (8037604 ) - 8037556: f240 12df movw r2, #479 ; 0x1df - 803755a: 492b ldr r1, [pc, #172] ; (8037608 ) - 803755c: 482b ldr r0, [pc, #172] ; (803760c ) - 803755e: f009 fad7 bl 8040b10 + 80375d2: 68fb ldr r3, [r7, #12] + 80375d4: 2b00 cmp r3, #0 + 80375d6: d106 bne.n 80375e6 + 80375d8: 4b2b ldr r3, [pc, #172] ; (8037688 ) + 80375da: f240 12df movw r2, #479 ; 0x1df + 80375de: 492b ldr r1, [pc, #172] ; (803768c ) + 80375e0: 482b ldr r0, [pc, #172] ; (8037690 ) + 80375e2: f009 fad7 bl 8040b94 if ((p == NULL) || (header_size_increment > 0xFFFF)) { - 8037562: 68fb ldr r3, [r7, #12] - 8037564: 2b00 cmp r3, #0 - 8037566: d003 beq.n 8037570 - 8037568: 68bb ldr r3, [r7, #8] - 803756a: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803756e: d301 bcc.n 8037574 + 80375e6: 68fb ldr r3, [r7, #12] + 80375e8: 2b00 cmp r3, #0 + 80375ea: d003 beq.n 80375f4 + 80375ec: 68bb ldr r3, [r7, #8] + 80375ee: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80375f2: d301 bcc.n 80375f8 return 1; - 8037570: 2301 movs r3, #1 - 8037572: e043 b.n 80375fc + 80375f4: 2301 movs r3, #1 + 80375f6: e043 b.n 8037680 } if (header_size_increment == 0) { - 8037574: 68bb ldr r3, [r7, #8] - 8037576: 2b00 cmp r3, #0 - 8037578: d101 bne.n 803757e + 80375f8: 68bb ldr r3, [r7, #8] + 80375fa: 2b00 cmp r3, #0 + 80375fc: d101 bne.n 8037602 return 0; - 803757a: 2300 movs r3, #0 - 803757c: e03e b.n 80375fc + 80375fe: 2300 movs r3, #0 + 8037600: e03e b.n 8037680 } increment_magnitude = (u16_t)header_size_increment; - 803757e: 68bb ldr r3, [r7, #8] - 8037580: 827b strh r3, [r7, #18] + 8037602: 68bb ldr r3, [r7, #8] + 8037604: 827b strh r3, [r7, #18] /* Do not allow tot_len to wrap as a result. */ if ((u16_t)(increment_magnitude + p->tot_len) < increment_magnitude) { - 8037582: 68fb ldr r3, [r7, #12] - 8037584: 891a ldrh r2, [r3, #8] - 8037586: 8a7b ldrh r3, [r7, #18] - 8037588: 4413 add r3, r2 - 803758a: b29b uxth r3, r3 - 803758c: 8a7a ldrh r2, [r7, #18] - 803758e: 429a cmp r2, r3 - 8037590: d901 bls.n 8037596 + 8037606: 68fb ldr r3, [r7, #12] + 8037608: 891a ldrh r2, [r3, #8] + 803760a: 8a7b ldrh r3, [r7, #18] + 803760c: 4413 add r3, r2 + 803760e: b29b uxth r3, r3 + 8037610: 8a7a ldrh r2, [r7, #18] + 8037612: 429a cmp r2, r3 + 8037614: d901 bls.n 803761a return 1; - 8037592: 2301 movs r3, #1 - 8037594: e032 b.n 80375fc + 8037616: 2301 movs r3, #1 + 8037618: e032 b.n 8037680 } type_internal = p->type_internal; - 8037596: 68fb ldr r3, [r7, #12] - 8037598: 7b1b ldrb r3, [r3, #12] - 803759a: 823b strh r3, [r7, #16] + 803761a: 68fb ldr r3, [r7, #12] + 803761c: 7b1b ldrb r3, [r3, #12] + 803761e: 823b strh r3, [r7, #16] /* pbuf types containing payloads? */ if (type_internal & PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS) { - 803759c: 8a3b ldrh r3, [r7, #16] - 803759e: f003 0380 and.w r3, r3, #128 ; 0x80 - 80375a2: 2b00 cmp r3, #0 - 80375a4: d00c beq.n 80375c0 + 8037620: 8a3b ldrh r3, [r7, #16] + 8037622: f003 0380 and.w r3, r3, #128 ; 0x80 + 8037626: 2b00 cmp r3, #0 + 8037628: d00c beq.n 8037644 /* set new payload pointer */ payload = (u8_t *)p->payload - header_size_increment; - 80375a6: 68fb ldr r3, [r7, #12] - 80375a8: 685a ldr r2, [r3, #4] - 80375aa: 68bb ldr r3, [r7, #8] - 80375ac: 425b negs r3, r3 - 80375ae: 4413 add r3, r2 - 80375b0: 617b str r3, [r7, #20] + 803762a: 68fb ldr r3, [r7, #12] + 803762c: 685a ldr r2, [r3, #4] + 803762e: 68bb ldr r3, [r7, #8] + 8037630: 425b negs r3, r3 + 8037632: 4413 add r3, r2 + 8037634: 617b str r3, [r7, #20] /* boundary check fails? */ if ((u8_t *)payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) { - 80375b2: 68fb ldr r3, [r7, #12] - 80375b4: 3310 adds r3, #16 - 80375b6: 697a ldr r2, [r7, #20] - 80375b8: 429a cmp r2, r3 - 80375ba: d20d bcs.n 80375d8 + 8037636: 68fb ldr r3, [r7, #12] + 8037638: 3310 adds r3, #16 + 803763a: 697a ldr r2, [r7, #20] + 803763c: 429a cmp r2, r3 + 803763e: d20d bcs.n 803765c LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: failed as %p < %p (not enough space for new header size)\n", (void *)payload, (void *)((u8_t *)p + SIZEOF_STRUCT_PBUF))); /* bail out unsuccessfully */ return 1; - 80375bc: 2301 movs r3, #1 - 80375be: e01d b.n 80375fc + 8037640: 2301 movs r3, #1 + 8037642: e01d b.n 8037680 } /* pbuf types referring to external payloads? */ } else { /* hide a header in the payload? */ if (force) { - 80375c0: 79fb ldrb r3, [r7, #7] - 80375c2: 2b00 cmp r3, #0 - 80375c4: d006 beq.n 80375d4 + 8037644: 79fb ldrb r3, [r7, #7] + 8037646: 2b00 cmp r3, #0 + 8037648: d006 beq.n 8037658 payload = (u8_t *)p->payload - header_size_increment; - 80375c6: 68fb ldr r3, [r7, #12] - 80375c8: 685a ldr r2, [r3, #4] - 80375ca: 68bb ldr r3, [r7, #8] - 80375cc: 425b negs r3, r3 - 80375ce: 4413 add r3, r2 - 80375d0: 617b str r3, [r7, #20] - 80375d2: e001 b.n 80375d8 + 803764a: 68fb ldr r3, [r7, #12] + 803764c: 685a ldr r2, [r3, #4] + 803764e: 68bb ldr r3, [r7, #8] + 8037650: 425b negs r3, r3 + 8037652: 4413 add r3, r2 + 8037654: 617b str r3, [r7, #20] + 8037656: e001 b.n 803765c } else { /* cannot expand payload to front (yet!) * bail out unsuccessfully */ return 1; - 80375d4: 2301 movs r3, #1 - 80375d6: e011 b.n 80375fc + 8037658: 2301 movs r3, #1 + 803765a: e011 b.n 8037680 } LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: old %p new %p (%"U16_F")\n", (void *)p->payload, (void *)payload, increment_magnitude)); /* modify pbuf fields */ p->payload = payload; - 80375d8: 68fb ldr r3, [r7, #12] - 80375da: 697a ldr r2, [r7, #20] - 80375dc: 605a str r2, [r3, #4] + 803765c: 68fb ldr r3, [r7, #12] + 803765e: 697a ldr r2, [r7, #20] + 8037660: 605a str r2, [r3, #4] p->len = (u16_t)(p->len + increment_magnitude); - 80375de: 68fb ldr r3, [r7, #12] - 80375e0: 895a ldrh r2, [r3, #10] - 80375e2: 8a7b ldrh r3, [r7, #18] - 80375e4: 4413 add r3, r2 - 80375e6: b29a uxth r2, r3 - 80375e8: 68fb ldr r3, [r7, #12] - 80375ea: 815a strh r2, [r3, #10] + 8037662: 68fb ldr r3, [r7, #12] + 8037664: 895a ldrh r2, [r3, #10] + 8037666: 8a7b ldrh r3, [r7, #18] + 8037668: 4413 add r3, r2 + 803766a: b29a uxth r2, r3 + 803766c: 68fb ldr r3, [r7, #12] + 803766e: 815a strh r2, [r3, #10] p->tot_len = (u16_t)(p->tot_len + increment_magnitude); - 80375ec: 68fb ldr r3, [r7, #12] - 80375ee: 891a ldrh r2, [r3, #8] - 80375f0: 8a7b ldrh r3, [r7, #18] - 80375f2: 4413 add r3, r2 - 80375f4: b29a uxth r2, r3 - 80375f6: 68fb ldr r3, [r7, #12] - 80375f8: 811a strh r2, [r3, #8] + 8037670: 68fb ldr r3, [r7, #12] + 8037672: 891a ldrh r2, [r3, #8] + 8037674: 8a7b ldrh r3, [r7, #18] + 8037676: 4413 add r3, r2 + 8037678: b29a uxth r2, r3 + 803767a: 68fb ldr r3, [r7, #12] + 803767c: 811a strh r2, [r3, #8] return 0; - 80375fa: 2300 movs r3, #0 + 803767e: 2300 movs r3, #0 } - 80375fc: 4618 mov r0, r3 - 80375fe: 3718 adds r7, #24 - 8037600: 46bd mov sp, r7 - 8037602: bd80 pop {r7, pc} - 8037604: 08042898 .word 0x08042898 - 8037608: 080429fc .word 0x080429fc - 803760c: 080428f8 .word 0x080428f8 + 8037680: 4618 mov r0, r3 + 8037682: 3718 adds r7, #24 + 8037684: 46bd mov sp, r7 + 8037686: bd80 pop {r7, pc} + 8037688: 08042918 .word 0x08042918 + 803768c: 08042a7c .word 0x08042a7c + 8037690: 08042978 .word 0x08042978 -08037610 : +08037694 : * @return non-zero on failure, zero on success. * */ u8_t pbuf_add_header(struct pbuf *p, size_t header_size_increment) { - 8037610: b580 push {r7, lr} - 8037612: b082 sub sp, #8 - 8037614: af00 add r7, sp, #0 - 8037616: 6078 str r0, [r7, #4] - 8037618: 6039 str r1, [r7, #0] + 8037694: b580 push {r7, lr} + 8037696: b082 sub sp, #8 + 8037698: af00 add r7, sp, #0 + 803769a: 6078 str r0, [r7, #4] + 803769c: 6039 str r1, [r7, #0] return pbuf_add_header_impl(p, header_size_increment, 0); - 803761a: 2200 movs r2, #0 - 803761c: 6839 ldr r1, [r7, #0] - 803761e: 6878 ldr r0, [r7, #4] - 8037620: f7ff ff8e bl 8037540 - 8037624: 4603 mov r3, r0 -} - 8037626: 4618 mov r0, r3 - 8037628: 3708 adds r7, #8 - 803762a: 46bd mov sp, r7 - 803762c: bd80 pop {r7, pc} + 803769e: 2200 movs r2, #0 + 80376a0: 6839 ldr r1, [r7, #0] + 80376a2: 6878 ldr r0, [r7, #4] + 80376a4: f7ff ff8e bl 80375c4 + 80376a8: 4603 mov r3, r0 +} + 80376aa: 4618 mov r0, r3 + 80376ac: 3708 adds r7, #8 + 80376ae: 46bd mov sp, r7 + 80376b0: bd80 pop {r7, pc} ... -08037630 : +080376b4 : * @return non-zero on failure, zero on success. * */ u8_t pbuf_remove_header(struct pbuf *p, size_t header_size_decrement) { - 8037630: b580 push {r7, lr} - 8037632: b084 sub sp, #16 - 8037634: af00 add r7, sp, #0 - 8037636: 6078 str r0, [r7, #4] - 8037638: 6039 str r1, [r7, #0] + 80376b4: b580 push {r7, lr} + 80376b6: b084 sub sp, #16 + 80376b8: af00 add r7, sp, #0 + 80376ba: 6078 str r0, [r7, #4] + 80376bc: 6039 str r1, [r7, #0] void *payload; u16_t increment_magnitude; LWIP_ASSERT("p != NULL", p != NULL); - 803763a: 687b ldr r3, [r7, #4] - 803763c: 2b00 cmp r3, #0 - 803763e: d106 bne.n 803764e - 8037640: 4b20 ldr r3, [pc, #128] ; (80376c4 ) - 8037642: f240 224b movw r2, #587 ; 0x24b - 8037646: 4920 ldr r1, [pc, #128] ; (80376c8 ) - 8037648: 4820 ldr r0, [pc, #128] ; (80376cc ) - 803764a: f009 fa61 bl 8040b10 + 80376be: 687b ldr r3, [r7, #4] + 80376c0: 2b00 cmp r3, #0 + 80376c2: d106 bne.n 80376d2 + 80376c4: 4b20 ldr r3, [pc, #128] ; (8037748 ) + 80376c6: f240 224b movw r2, #587 ; 0x24b + 80376ca: 4920 ldr r1, [pc, #128] ; (803774c ) + 80376cc: 4820 ldr r0, [pc, #128] ; (8037750 ) + 80376ce: f009 fa61 bl 8040b94 if ((p == NULL) || (header_size_decrement > 0xFFFF)) { - 803764e: 687b ldr r3, [r7, #4] - 8037650: 2b00 cmp r3, #0 - 8037652: d003 beq.n 803765c - 8037654: 683b ldr r3, [r7, #0] - 8037656: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803765a: d301 bcc.n 8037660 + 80376d2: 687b ldr r3, [r7, #4] + 80376d4: 2b00 cmp r3, #0 + 80376d6: d003 beq.n 80376e0 + 80376d8: 683b ldr r3, [r7, #0] + 80376da: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 80376de: d301 bcc.n 80376e4 return 1; - 803765c: 2301 movs r3, #1 - 803765e: e02c b.n 80376ba + 80376e0: 2301 movs r3, #1 + 80376e2: e02c b.n 803773e } if (header_size_decrement == 0) { - 8037660: 683b ldr r3, [r7, #0] - 8037662: 2b00 cmp r3, #0 - 8037664: d101 bne.n 803766a + 80376e4: 683b ldr r3, [r7, #0] + 80376e6: 2b00 cmp r3, #0 + 80376e8: d101 bne.n 80376ee return 0; - 8037666: 2300 movs r3, #0 - 8037668: e027 b.n 80376ba + 80376ea: 2300 movs r3, #0 + 80376ec: e027 b.n 803773e } increment_magnitude = (u16_t)header_size_decrement; - 803766a: 683b ldr r3, [r7, #0] - 803766c: 81fb strh r3, [r7, #14] + 80376ee: 683b ldr r3, [r7, #0] + 80376f0: 81fb strh r3, [r7, #14] /* Check that we aren't going to move off the end of the pbuf */ LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;); - 803766e: 687b ldr r3, [r7, #4] - 8037670: 895b ldrh r3, [r3, #10] - 8037672: 89fa ldrh r2, [r7, #14] - 8037674: 429a cmp r2, r3 - 8037676: d908 bls.n 803768a - 8037678: 4b12 ldr r3, [pc, #72] ; (80376c4 ) - 803767a: f240 2255 movw r2, #597 ; 0x255 - 803767e: 4914 ldr r1, [pc, #80] ; (80376d0 ) - 8037680: 4812 ldr r0, [pc, #72] ; (80376cc ) - 8037682: f009 fa45 bl 8040b10 - 8037686: 2301 movs r3, #1 - 8037688: e017 b.n 80376ba + 80376f2: 687b ldr r3, [r7, #4] + 80376f4: 895b ldrh r3, [r3, #10] + 80376f6: 89fa ldrh r2, [r7, #14] + 80376f8: 429a cmp r2, r3 + 80376fa: d908 bls.n 803770e + 80376fc: 4b12 ldr r3, [pc, #72] ; (8037748 ) + 80376fe: f240 2255 movw r2, #597 ; 0x255 + 8037702: 4914 ldr r1, [pc, #80] ; (8037754 ) + 8037704: 4812 ldr r0, [pc, #72] ; (8037750 ) + 8037706: f009 fa45 bl 8040b94 + 803770a: 2301 movs r3, #1 + 803770c: e017 b.n 803773e /* remember current payload pointer */ payload = p->payload; - 803768a: 687b ldr r3, [r7, #4] - 803768c: 685b ldr r3, [r3, #4] - 803768e: 60bb str r3, [r7, #8] + 803770e: 687b ldr r3, [r7, #4] + 8037710: 685b ldr r3, [r3, #4] + 8037712: 60bb str r3, [r7, #8] LWIP_UNUSED_ARG(payload); /* only used in LWIP_DEBUGF below */ /* increase payload pointer (guarded by length check above) */ p->payload = (u8_t *)p->payload + header_size_decrement; - 8037690: 687b ldr r3, [r7, #4] - 8037692: 685a ldr r2, [r3, #4] - 8037694: 683b ldr r3, [r7, #0] - 8037696: 441a add r2, r3 - 8037698: 687b ldr r3, [r7, #4] - 803769a: 605a str r2, [r3, #4] + 8037714: 687b ldr r3, [r7, #4] + 8037716: 685a ldr r2, [r3, #4] + 8037718: 683b ldr r3, [r7, #0] + 803771a: 441a add r2, r3 + 803771c: 687b ldr r3, [r7, #4] + 803771e: 605a str r2, [r3, #4] /* modify pbuf length fields */ p->len = (u16_t)(p->len - increment_magnitude); - 803769c: 687b ldr r3, [r7, #4] - 803769e: 895a ldrh r2, [r3, #10] - 80376a0: 89fb ldrh r3, [r7, #14] - 80376a2: 1ad3 subs r3, r2, r3 - 80376a4: b29a uxth r2, r3 - 80376a6: 687b ldr r3, [r7, #4] - 80376a8: 815a strh r2, [r3, #10] + 8037720: 687b ldr r3, [r7, #4] + 8037722: 895a ldrh r2, [r3, #10] + 8037724: 89fb ldrh r3, [r7, #14] + 8037726: 1ad3 subs r3, r2, r3 + 8037728: b29a uxth r2, r3 + 803772a: 687b ldr r3, [r7, #4] + 803772c: 815a strh r2, [r3, #10] p->tot_len = (u16_t)(p->tot_len - increment_magnitude); - 80376aa: 687b ldr r3, [r7, #4] - 80376ac: 891a ldrh r2, [r3, #8] - 80376ae: 89fb ldrh r3, [r7, #14] - 80376b0: 1ad3 subs r3, r2, r3 - 80376b2: b29a uxth r2, r3 - 80376b4: 687b ldr r3, [r7, #4] - 80376b6: 811a strh r2, [r3, #8] + 803772e: 687b ldr r3, [r7, #4] + 8037730: 891a ldrh r2, [r3, #8] + 8037732: 89fb ldrh r3, [r7, #14] + 8037734: 1ad3 subs r3, r2, r3 + 8037736: b29a uxth r2, r3 + 8037738: 687b ldr r3, [r7, #4] + 803773a: 811a strh r2, [r3, #8] LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_remove_header: old %p new %p (%"U16_F")\n", (void *)payload, (void *)p->payload, increment_magnitude)); return 0; - 80376b8: 2300 movs r3, #0 + 803773c: 2300 movs r3, #0 } - 80376ba: 4618 mov r0, r3 - 80376bc: 3710 adds r7, #16 - 80376be: 46bd mov sp, r7 - 80376c0: bd80 pop {r7, pc} - 80376c2: bf00 nop - 80376c4: 08042898 .word 0x08042898 - 80376c8: 080429fc .word 0x080429fc - 80376cc: 080428f8 .word 0x080428f8 - 80376d0: 08042a08 .word 0x08042a08 + 803773e: 4618 mov r0, r3 + 8037740: 3710 adds r7, #16 + 8037742: 46bd mov sp, r7 + 8037744: bd80 pop {r7, pc} + 8037746: bf00 nop + 8037748: 08042918 .word 0x08042918 + 803774c: 08042a7c .word 0x08042a7c + 8037750: 08042978 .word 0x08042978 + 8037754: 08042a88 .word 0x08042a88 -080376d4 : +08037758 : static u8_t pbuf_header_impl(struct pbuf *p, s16_t header_size_increment, u8_t force) { - 80376d4: b580 push {r7, lr} - 80376d6: b082 sub sp, #8 - 80376d8: af00 add r7, sp, #0 - 80376da: 6078 str r0, [r7, #4] - 80376dc: 460b mov r3, r1 - 80376de: 807b strh r3, [r7, #2] - 80376e0: 4613 mov r3, r2 - 80376e2: 707b strb r3, [r7, #1] + 8037758: b580 push {r7, lr} + 803775a: b082 sub sp, #8 + 803775c: af00 add r7, sp, #0 + 803775e: 6078 str r0, [r7, #4] + 8037760: 460b mov r3, r1 + 8037762: 807b strh r3, [r7, #2] + 8037764: 4613 mov r3, r2 + 8037766: 707b strb r3, [r7, #1] if (header_size_increment < 0) { - 80376e4: f9b7 3002 ldrsh.w r3, [r7, #2] - 80376e8: 2b00 cmp r3, #0 - 80376ea: da08 bge.n 80376fe + 8037768: f9b7 3002 ldrsh.w r3, [r7, #2] + 803776c: 2b00 cmp r3, #0 + 803776e: da08 bge.n 8037782 return pbuf_remove_header(p, (size_t) - header_size_increment); - 80376ec: f9b7 3002 ldrsh.w r3, [r7, #2] - 80376f0: 425b negs r3, r3 - 80376f2: 4619 mov r1, r3 - 80376f4: 6878 ldr r0, [r7, #4] - 80376f6: f7ff ff9b bl 8037630 - 80376fa: 4603 mov r3, r0 - 80376fc: e007 b.n 803770e + 8037770: f9b7 3002 ldrsh.w r3, [r7, #2] + 8037774: 425b negs r3, r3 + 8037776: 4619 mov r1, r3 + 8037778: 6878 ldr r0, [r7, #4] + 803777a: f7ff ff9b bl 80376b4 + 803777e: 4603 mov r3, r0 + 8037780: e007 b.n 8037792 } else { return pbuf_add_header_impl(p, (size_t)header_size_increment, force); - 80376fe: f9b7 3002 ldrsh.w r3, [r7, #2] - 8037702: 787a ldrb r2, [r7, #1] - 8037704: 4619 mov r1, r3 - 8037706: 6878 ldr r0, [r7, #4] - 8037708: f7ff ff1a bl 8037540 - 803770c: 4603 mov r3, r0 + 8037782: f9b7 3002 ldrsh.w r3, [r7, #2] + 8037786: 787a ldrb r2, [r7, #1] + 8037788: 4619 mov r1, r3 + 803778a: 6878 ldr r0, [r7, #4] + 803778c: f7ff ff1a bl 80375c4 + 8037790: 4603 mov r3, r0 } } - 803770e: 4618 mov r0, r3 - 8037710: 3708 adds r7, #8 - 8037712: 46bd mov sp, r7 - 8037714: bd80 pop {r7, pc} + 8037792: 4618 mov r0, r3 + 8037794: 3708 adds r7, #8 + 8037796: 46bd mov sp, r7 + 8037798: bd80 pop {r7, pc} -08037716 : +0803779a : * Same as pbuf_header but does not check if 'header_size > 0' is allowed. * This is used internally only, to allow PBUF_REF for RX. */ u8_t pbuf_header_force(struct pbuf *p, s16_t header_size_increment) { - 8037716: b580 push {r7, lr} - 8037718: b082 sub sp, #8 - 803771a: af00 add r7, sp, #0 - 803771c: 6078 str r0, [r7, #4] - 803771e: 460b mov r3, r1 - 8037720: 807b strh r3, [r7, #2] + 803779a: b580 push {r7, lr} + 803779c: b082 sub sp, #8 + 803779e: af00 add r7, sp, #0 + 80377a0: 6078 str r0, [r7, #4] + 80377a2: 460b mov r3, r1 + 80377a4: 807b strh r3, [r7, #2] return pbuf_header_impl(p, header_size_increment, 1); - 8037722: f9b7 3002 ldrsh.w r3, [r7, #2] - 8037726: 2201 movs r2, #1 - 8037728: 4619 mov r1, r3 - 803772a: 6878 ldr r0, [r7, #4] - 803772c: f7ff ffd2 bl 80376d4 - 8037730: 4603 mov r3, r0 -} - 8037732: 4618 mov r0, r3 - 8037734: 3708 adds r7, #8 - 8037736: 46bd mov sp, r7 - 8037738: bd80 pop {r7, pc} + 80377a6: f9b7 3002 ldrsh.w r3, [r7, #2] + 80377aa: 2201 movs r2, #1 + 80377ac: 4619 mov r1, r3 + 80377ae: 6878 ldr r0, [r7, #4] + 80377b0: f7ff ffd2 bl 8037758 + 80377b4: 4603 mov r3, r0 +} + 80377b6: 4618 mov r0, r3 + 80377b8: 3708 adds r7, #8 + 80377ba: 46bd mov sp, r7 + 80377bc: bd80 pop {r7, pc} ... -0803773c : +080377c0 : * 1->1->1 becomes ....... * */ u8_t pbuf_free(struct pbuf *p) { - 803773c: b580 push {r7, lr} - 803773e: b086 sub sp, #24 - 8037740: af00 add r7, sp, #0 - 8037742: 6078 str r0, [r7, #4] + 80377c0: b580 push {r7, lr} + 80377c2: b086 sub sp, #24 + 80377c4: af00 add r7, sp, #0 + 80377c6: 6078 str r0, [r7, #4] u8_t alloc_src; struct pbuf *q; u8_t count; if (p == NULL) { - 8037744: 687b ldr r3, [r7, #4] - 8037746: 2b00 cmp r3, #0 - 8037748: d10b bne.n 8037762 + 80377c8: 687b ldr r3, [r7, #4] + 80377ca: 2b00 cmp r3, #0 + 80377cc: d10b bne.n 80377e6 LWIP_ASSERT("p != NULL", p != NULL); - 803774a: 687b ldr r3, [r7, #4] - 803774c: 2b00 cmp r3, #0 - 803774e: d106 bne.n 803775e - 8037750: 4b38 ldr r3, [pc, #224] ; (8037834 ) - 8037752: f44f 7237 mov.w r2, #732 ; 0x2dc - 8037756: 4938 ldr r1, [pc, #224] ; (8037838 ) - 8037758: 4838 ldr r0, [pc, #224] ; (803783c ) - 803775a: f009 f9d9 bl 8040b10 + 80377ce: 687b ldr r3, [r7, #4] + 80377d0: 2b00 cmp r3, #0 + 80377d2: d106 bne.n 80377e2 + 80377d4: 4b38 ldr r3, [pc, #224] ; (80378b8 ) + 80377d6: f44f 7237 mov.w r2, #732 ; 0x2dc + 80377da: 4938 ldr r1, [pc, #224] ; (80378bc ) + 80377dc: 4838 ldr r0, [pc, #224] ; (80378c0 ) + 80377de: f009 f9d9 bl 8040b94 /* if assertions are disabled, proceed with debug output */ LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("pbuf_free(p == NULL) was called.\n")); return 0; - 803775e: 2300 movs r3, #0 - 8037760: e063 b.n 803782a + 80377e2: 2300 movs r3, #0 + 80377e4: e063 b.n 80378ae } LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p)); PERF_START; count = 0; - 8037762: 2300 movs r3, #0 - 8037764: 75fb strb r3, [r7, #23] + 80377e6: 2300 movs r3, #0 + 80377e8: 75fb strb r3, [r7, #23] /* de-allocate all consecutive pbufs from the head of the chain that * obtain a zero reference count after decrementing*/ while (p != NULL) { - 8037766: e05c b.n 8037822 + 80377ea: e05c b.n 80378a6 /* Since decrementing ref cannot be guaranteed to be a single machine operation * we must protect it. We put the new ref into a local variable to prevent * further protection. */ SYS_ARCH_PROTECT(old_level); /* all pbufs in a chain are referenced at least once */ LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0); - 8037768: 687b ldr r3, [r7, #4] - 803776a: 7b9b ldrb r3, [r3, #14] - 803776c: 2b00 cmp r3, #0 - 803776e: d106 bne.n 803777e - 8037770: 4b30 ldr r3, [pc, #192] ; (8037834 ) - 8037772: f240 22f1 movw r2, #753 ; 0x2f1 - 8037776: 4932 ldr r1, [pc, #200] ; (8037840 ) - 8037778: 4830 ldr r0, [pc, #192] ; (803783c ) - 803777a: f009 f9c9 bl 8040b10 + 80377ec: 687b ldr r3, [r7, #4] + 80377ee: 7b9b ldrb r3, [r3, #14] + 80377f0: 2b00 cmp r3, #0 + 80377f2: d106 bne.n 8037802 + 80377f4: 4b30 ldr r3, [pc, #192] ; (80378b8 ) + 80377f6: f240 22f1 movw r2, #753 ; 0x2f1 + 80377fa: 4932 ldr r1, [pc, #200] ; (80378c4 ) + 80377fc: 4830 ldr r0, [pc, #192] ; (80378c0 ) + 80377fe: f009 f9c9 bl 8040b94 /* decrease reference count (number of pointers to pbuf) */ ref = --(p->ref); - 803777e: 687b ldr r3, [r7, #4] - 8037780: 7b9b ldrb r3, [r3, #14] - 8037782: 3b01 subs r3, #1 - 8037784: b2da uxtb r2, r3 - 8037786: 687b ldr r3, [r7, #4] - 8037788: 739a strb r2, [r3, #14] - 803778a: 687b ldr r3, [r7, #4] - 803778c: 7b9b ldrb r3, [r3, #14] - 803778e: 75bb strb r3, [r7, #22] + 8037802: 687b ldr r3, [r7, #4] + 8037804: 7b9b ldrb r3, [r3, #14] + 8037806: 3b01 subs r3, #1 + 8037808: b2da uxtb r2, r3 + 803780a: 687b ldr r3, [r7, #4] + 803780c: 739a strb r2, [r3, #14] + 803780e: 687b ldr r3, [r7, #4] + 8037810: 7b9b ldrb r3, [r3, #14] + 8037812: 75bb strb r3, [r7, #22] SYS_ARCH_UNPROTECT(old_level); /* this pbuf is no longer referenced to? */ if (ref == 0) { - 8037790: 7dbb ldrb r3, [r7, #22] - 8037792: 2b00 cmp r3, #0 - 8037794: d143 bne.n 803781e + 8037814: 7dbb ldrb r3, [r7, #22] + 8037816: 2b00 cmp r3, #0 + 8037818: d143 bne.n 80378a2 /* remember next pbuf in chain for next iteration */ q = p->next; - 8037796: 687b ldr r3, [r7, #4] - 8037798: 681b ldr r3, [r3, #0] - 803779a: 613b str r3, [r7, #16] + 803781a: 687b ldr r3, [r7, #4] + 803781c: 681b ldr r3, [r3, #0] + 803781e: 613b str r3, [r7, #16] LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p)); alloc_src = pbuf_get_allocsrc(p); - 803779c: 687b ldr r3, [r7, #4] - 803779e: 7b1b ldrb r3, [r3, #12] - 80377a0: f003 030f and.w r3, r3, #15 - 80377a4: 73fb strb r3, [r7, #15] + 8037820: 687b ldr r3, [r7, #4] + 8037822: 7b1b ldrb r3, [r3, #12] + 8037824: f003 030f and.w r3, r3, #15 + 8037828: 73fb strb r3, [r7, #15] #if LWIP_SUPPORT_CUSTOM_PBUF /* is this a custom pbuf? */ if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) { - 80377a6: 687b ldr r3, [r7, #4] - 80377a8: 7b5b ldrb r3, [r3, #13] - 80377aa: f003 0302 and.w r3, r3, #2 - 80377ae: 2b00 cmp r3, #0 - 80377b0: d011 beq.n 80377d6 + 803782a: 687b ldr r3, [r7, #4] + 803782c: 7b5b ldrb r3, [r3, #13] + 803782e: f003 0302 and.w r3, r3, #2 + 8037832: 2b00 cmp r3, #0 + 8037834: d011 beq.n 803785a struct pbuf_custom *pc = (struct pbuf_custom *)p; - 80377b2: 687b ldr r3, [r7, #4] - 80377b4: 60bb str r3, [r7, #8] + 8037836: 687b ldr r3, [r7, #4] + 8037838: 60bb str r3, [r7, #8] LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL); - 80377b6: 68bb ldr r3, [r7, #8] - 80377b8: 691b ldr r3, [r3, #16] - 80377ba: 2b00 cmp r3, #0 - 80377bc: d106 bne.n 80377cc - 80377be: 4b1d ldr r3, [pc, #116] ; (8037834 ) - 80377c0: f240 22ff movw r2, #767 ; 0x2ff - 80377c4: 491f ldr r1, [pc, #124] ; (8037844 ) - 80377c6: 481d ldr r0, [pc, #116] ; (803783c ) - 80377c8: f009 f9a2 bl 8040b10 + 803783a: 68bb ldr r3, [r7, #8] + 803783c: 691b ldr r3, [r3, #16] + 803783e: 2b00 cmp r3, #0 + 8037840: d106 bne.n 8037850 + 8037842: 4b1d ldr r3, [pc, #116] ; (80378b8 ) + 8037844: f240 22ff movw r2, #767 ; 0x2ff + 8037848: 491f ldr r1, [pc, #124] ; (80378c8 ) + 803784a: 481d ldr r0, [pc, #116] ; (80378c0 ) + 803784c: f009 f9a2 bl 8040b94 pc->custom_free_function(p); - 80377cc: 68bb ldr r3, [r7, #8] - 80377ce: 691b ldr r3, [r3, #16] - 80377d0: 6878 ldr r0, [r7, #4] - 80377d2: 4798 blx r3 - 80377d4: e01d b.n 8037812 + 8037850: 68bb ldr r3, [r7, #8] + 8037852: 691b ldr r3, [r3, #16] + 8037854: 6878 ldr r0, [r7, #4] + 8037856: 4798 blx r3 + 8037858: e01d b.n 8037896 } else #endif /* LWIP_SUPPORT_CUSTOM_PBUF */ { /* is this a pbuf from the pool? */ if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL) { - 80377d6: 7bfb ldrb r3, [r7, #15] - 80377d8: 2b02 cmp r3, #2 - 80377da: d104 bne.n 80377e6 + 803785a: 7bfb ldrb r3, [r7, #15] + 803785c: 2b02 cmp r3, #2 + 803785e: d104 bne.n 803786a memp_free(MEMP_PBUF_POOL, p); - 80377dc: 6879 ldr r1, [r7, #4] - 80377de: 2008 movs r0, #8 - 80377e0: f7ff f91a bl 8036a18 - 80377e4: e015 b.n 8037812 + 8037860: 6879 ldr r1, [r7, #4] + 8037862: 2008 movs r0, #8 + 8037864: f7ff f91a bl 8036a9c + 8037868: e015 b.n 8037896 /* is this a ROM or RAM referencing pbuf? */ } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF) { - 80377e6: 7bfb ldrb r3, [r7, #15] - 80377e8: 2b01 cmp r3, #1 - 80377ea: d104 bne.n 80377f6 + 803786a: 7bfb ldrb r3, [r7, #15] + 803786c: 2b01 cmp r3, #1 + 803786e: d104 bne.n 803787a memp_free(MEMP_PBUF, p); - 80377ec: 6879 ldr r1, [r7, #4] - 80377ee: 2007 movs r0, #7 - 80377f0: f7ff f912 bl 8036a18 - 80377f4: e00d b.n 8037812 + 8037870: 6879 ldr r1, [r7, #4] + 8037872: 2007 movs r0, #7 + 8037874: f7ff f912 bl 8036a9c + 8037878: e00d b.n 8037896 /* type == PBUF_RAM */ } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) { - 80377f6: 7bfb ldrb r3, [r7, #15] - 80377f8: 2b00 cmp r3, #0 - 80377fa: d103 bne.n 8037804 + 803787a: 7bfb ldrb r3, [r7, #15] + 803787c: 2b00 cmp r3, #0 + 803787e: d103 bne.n 8037888 mem_free(p); - 80377fc: 6878 ldr r0, [r7, #4] - 80377fe: f7fe fda5 bl 803634c - 8037802: e006 b.n 8037812 + 8037880: 6878 ldr r0, [r7, #4] + 8037882: f7fe fda5 bl 80363d0 + 8037886: e006 b.n 8037896 } else { /* @todo: support freeing other types */ LWIP_ASSERT("invalid pbuf type", 0); - 8037804: 4b0b ldr r3, [pc, #44] ; (8037834 ) - 8037806: f240 320f movw r2, #783 ; 0x30f - 803780a: 490f ldr r1, [pc, #60] ; (8037848 ) - 803780c: 480b ldr r0, [pc, #44] ; (803783c ) - 803780e: f009 f97f bl 8040b10 + 8037888: 4b0b ldr r3, [pc, #44] ; (80378b8 ) + 803788a: f240 320f movw r2, #783 ; 0x30f + 803788e: 490f ldr r1, [pc, #60] ; (80378cc ) + 8037890: 480b ldr r0, [pc, #44] ; (80378c0 ) + 8037892: f009 f97f bl 8040b94 } } count++; - 8037812: 7dfb ldrb r3, [r7, #23] - 8037814: 3301 adds r3, #1 - 8037816: 75fb strb r3, [r7, #23] + 8037896: 7dfb ldrb r3, [r7, #23] + 8037898: 3301 adds r3, #1 + 803789a: 75fb strb r3, [r7, #23] /* proceed to next pbuf */ p = q; - 8037818: 693b ldr r3, [r7, #16] - 803781a: 607b str r3, [r7, #4] - 803781c: e001 b.n 8037822 + 803789c: 693b ldr r3, [r7, #16] + 803789e: 607b str r3, [r7, #4] + 80378a0: e001 b.n 80378a6 /* p->ref > 0, this pbuf is still referenced to */ /* (and so the remaining pbufs in chain as well) */ } else { LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)ref)); /* stop walking through the chain */ p = NULL; - 803781e: 2300 movs r3, #0 - 8037820: 607b str r3, [r7, #4] + 80378a2: 2300 movs r3, #0 + 80378a4: 607b str r3, [r7, #4] while (p != NULL) { - 8037822: 687b ldr r3, [r7, #4] - 8037824: 2b00 cmp r3, #0 - 8037826: d19f bne.n 8037768 + 80378a6: 687b ldr r3, [r7, #4] + 80378a8: 2b00 cmp r3, #0 + 80378aa: d19f bne.n 80377ec } } PERF_STOP("pbuf_free"); /* return number of de-allocated pbufs */ return count; - 8037828: 7dfb ldrb r3, [r7, #23] -} - 803782a: 4618 mov r0, r3 - 803782c: 3718 adds r7, #24 - 803782e: 46bd mov sp, r7 - 8037830: bd80 pop {r7, pc} - 8037832: bf00 nop - 8037834: 08042898 .word 0x08042898 - 8037838: 080429fc .word 0x080429fc - 803783c: 080428f8 .word 0x080428f8 - 8037840: 08042a28 .word 0x08042a28 - 8037844: 08042a40 .word 0x08042a40 - 8037848: 08042a64 .word 0x08042a64 - -0803784c : + 80378ac: 7dfb ldrb r3, [r7, #23] +} + 80378ae: 4618 mov r0, r3 + 80378b0: 3718 adds r7, #24 + 80378b2: 46bd mov sp, r7 + 80378b4: bd80 pop {r7, pc} + 80378b6: bf00 nop + 80378b8: 08042918 .word 0x08042918 + 80378bc: 08042a7c .word 0x08042a7c + 80378c0: 08042978 .word 0x08042978 + 80378c4: 08042aa8 .word 0x08042aa8 + 80378c8: 08042ac0 .word 0x08042ac0 + 80378cc: 08042ae4 .word 0x08042ae4 + +080378d0 : * @param p first pbuf of chain * @return the number of pbufs in a chain */ u16_t pbuf_clen(const struct pbuf *p) { - 803784c: b480 push {r7} - 803784e: b085 sub sp, #20 - 8037850: af00 add r7, sp, #0 - 8037852: 6078 str r0, [r7, #4] + 80378d0: b480 push {r7} + 80378d2: b085 sub sp, #20 + 80378d4: af00 add r7, sp, #0 + 80378d6: 6078 str r0, [r7, #4] u16_t len; len = 0; - 8037854: 2300 movs r3, #0 - 8037856: 81fb strh r3, [r7, #14] + 80378d8: 2300 movs r3, #0 + 80378da: 81fb strh r3, [r7, #14] while (p != NULL) { - 8037858: e005 b.n 8037866 + 80378dc: e005 b.n 80378ea ++len; - 803785a: 89fb ldrh r3, [r7, #14] - 803785c: 3301 adds r3, #1 - 803785e: 81fb strh r3, [r7, #14] + 80378de: 89fb ldrh r3, [r7, #14] + 80378e0: 3301 adds r3, #1 + 80378e2: 81fb strh r3, [r7, #14] p = p->next; - 8037860: 687b ldr r3, [r7, #4] - 8037862: 681b ldr r3, [r3, #0] - 8037864: 607b str r3, [r7, #4] + 80378e4: 687b ldr r3, [r7, #4] + 80378e6: 681b ldr r3, [r3, #0] + 80378e8: 607b str r3, [r7, #4] while (p != NULL) { - 8037866: 687b ldr r3, [r7, #4] - 8037868: 2b00 cmp r3, #0 - 803786a: d1f6 bne.n 803785a + 80378ea: 687b ldr r3, [r7, #4] + 80378ec: 2b00 cmp r3, #0 + 80378ee: d1f6 bne.n 80378de } return len; - 803786c: 89fb ldrh r3, [r7, #14] + 80378f0: 89fb ldrh r3, [r7, #14] } - 803786e: 4618 mov r0, r3 - 8037870: 3714 adds r7, #20 - 8037872: 46bd mov sp, r7 - 8037874: f85d 7b04 ldr.w r7, [sp], #4 - 8037878: 4770 bx lr + 80378f2: 4618 mov r0, r3 + 80378f4: 3714 adds r7, #20 + 80378f6: 46bd mov sp, r7 + 80378f8: f85d 7b04 ldr.w r7, [sp], #4 + 80378fc: 4770 bx lr ... -0803787c : +08037900 : * @param p pbuf to increase reference counter of * */ void pbuf_ref(struct pbuf *p) { - 803787c: b580 push {r7, lr} - 803787e: b082 sub sp, #8 - 8037880: af00 add r7, sp, #0 - 8037882: 6078 str r0, [r7, #4] + 8037900: b580 push {r7, lr} + 8037902: b082 sub sp, #8 + 8037904: af00 add r7, sp, #0 + 8037906: 6078 str r0, [r7, #4] /* pbuf given? */ if (p != NULL) { - 8037884: 687b ldr r3, [r7, #4] - 8037886: 2b00 cmp r3, #0 - 8037888: d010 beq.n 80378ac + 8037908: 687b ldr r3, [r7, #4] + 803790a: 2b00 cmp r3, #0 + 803790c: d010 beq.n 8037930 SYS_ARCH_SET(p->ref, (LWIP_PBUF_REF_T)(p->ref + 1)); - 803788a: 687b ldr r3, [r7, #4] - 803788c: 7b9b ldrb r3, [r3, #14] - 803788e: 3301 adds r3, #1 - 8037890: b2da uxtb r2, r3 - 8037892: 687b ldr r3, [r7, #4] - 8037894: 739a strb r2, [r3, #14] + 803790e: 687b ldr r3, [r7, #4] + 8037910: 7b9b ldrb r3, [r3, #14] + 8037912: 3301 adds r3, #1 + 8037914: b2da uxtb r2, r3 + 8037916: 687b ldr r3, [r7, #4] + 8037918: 739a strb r2, [r3, #14] LWIP_ASSERT("pbuf ref overflow", p->ref > 0); - 8037896: 687b ldr r3, [r7, #4] - 8037898: 7b9b ldrb r3, [r3, #14] - 803789a: 2b00 cmp r3, #0 - 803789c: d106 bne.n 80378ac - 803789e: 4b05 ldr r3, [pc, #20] ; (80378b4 ) - 80378a0: f240 3242 movw r2, #834 ; 0x342 - 80378a4: 4904 ldr r1, [pc, #16] ; (80378b8 ) - 80378a6: 4805 ldr r0, [pc, #20] ; (80378bc ) - 80378a8: f009 f932 bl 8040b10 - } -} - 80378ac: bf00 nop - 80378ae: 3708 adds r7, #8 - 80378b0: 46bd mov sp, r7 - 80378b2: bd80 pop {r7, pc} - 80378b4: 08042898 .word 0x08042898 - 80378b8: 08042a78 .word 0x08042a78 - 80378bc: 080428f8 .word 0x080428f8 - -080378c0 : + 803791a: 687b ldr r3, [r7, #4] + 803791c: 7b9b ldrb r3, [r3, #14] + 803791e: 2b00 cmp r3, #0 + 8037920: d106 bne.n 8037930 + 8037922: 4b05 ldr r3, [pc, #20] ; (8037938 ) + 8037924: f240 3242 movw r2, #834 ; 0x342 + 8037928: 4904 ldr r1, [pc, #16] ; (803793c ) + 803792a: 4805 ldr r0, [pc, #20] ; (8037940 ) + 803792c: f009 f932 bl 8040b94 + } +} + 8037930: bf00 nop + 8037932: 3708 adds r7, #8 + 8037934: 46bd mov sp, r7 + 8037936: bd80 pop {r7, pc} + 8037938: 08042918 .word 0x08042918 + 803793c: 08042af8 .word 0x08042af8 + 8037940: 08042978 .word 0x08042978 + +08037944 : * * @see pbuf_chain() */ void pbuf_cat(struct pbuf *h, struct pbuf *t) { - 80378c0: b580 push {r7, lr} - 80378c2: b084 sub sp, #16 - 80378c4: af00 add r7, sp, #0 - 80378c6: 6078 str r0, [r7, #4] - 80378c8: 6039 str r1, [r7, #0] + 8037944: b580 push {r7, lr} + 8037946: b084 sub sp, #16 + 8037948: af00 add r7, sp, #0 + 803794a: 6078 str r0, [r7, #4] + 803794c: 6039 str r1, [r7, #0] struct pbuf *p; LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)", - 80378ca: 687b ldr r3, [r7, #4] - 80378cc: 2b00 cmp r3, #0 - 80378ce: d002 beq.n 80378d6 - 80378d0: 683b ldr r3, [r7, #0] - 80378d2: 2b00 cmp r3, #0 - 80378d4: d107 bne.n 80378e6 - 80378d6: 4b20 ldr r3, [pc, #128] ; (8037958 ) - 80378d8: f240 3259 movw r2, #857 ; 0x359 - 80378dc: 491f ldr r1, [pc, #124] ; (803795c ) - 80378de: 4820 ldr r0, [pc, #128] ; (8037960 ) - 80378e0: f009 f916 bl 8040b10 - 80378e4: e034 b.n 8037950 + 803794e: 687b ldr r3, [r7, #4] + 8037950: 2b00 cmp r3, #0 + 8037952: d002 beq.n 803795a + 8037954: 683b ldr r3, [r7, #0] + 8037956: 2b00 cmp r3, #0 + 8037958: d107 bne.n 803796a + 803795a: 4b20 ldr r3, [pc, #128] ; (80379dc ) + 803795c: f240 3259 movw r2, #857 ; 0x359 + 8037960: 491f ldr r1, [pc, #124] ; (80379e0 ) + 8037962: 4820 ldr r0, [pc, #128] ; (80379e4 ) + 8037964: f009 f916 bl 8040b94 + 8037968: e034 b.n 80379d4 ((h != NULL) && (t != NULL)), return;); /* proceed to last pbuf of chain */ for (p = h; p->next != NULL; p = p->next) { - 80378e6: 687b ldr r3, [r7, #4] - 80378e8: 60fb str r3, [r7, #12] - 80378ea: e00a b.n 8037902 + 803796a: 687b ldr r3, [r7, #4] + 803796c: 60fb str r3, [r7, #12] + 803796e: e00a b.n 8037986 /* add total length of second chain to all totals of first chain */ p->tot_len = (u16_t)(p->tot_len + t->tot_len); - 80378ec: 68fb ldr r3, [r7, #12] - 80378ee: 891a ldrh r2, [r3, #8] - 80378f0: 683b ldr r3, [r7, #0] - 80378f2: 891b ldrh r3, [r3, #8] - 80378f4: 4413 add r3, r2 - 80378f6: b29a uxth r2, r3 - 80378f8: 68fb ldr r3, [r7, #12] - 80378fa: 811a strh r2, [r3, #8] + 8037970: 68fb ldr r3, [r7, #12] + 8037972: 891a ldrh r2, [r3, #8] + 8037974: 683b ldr r3, [r7, #0] + 8037976: 891b ldrh r3, [r3, #8] + 8037978: 4413 add r3, r2 + 803797a: b29a uxth r2, r3 + 803797c: 68fb ldr r3, [r7, #12] + 803797e: 811a strh r2, [r3, #8] for (p = h; p->next != NULL; p = p->next) { - 80378fc: 68fb ldr r3, [r7, #12] - 80378fe: 681b ldr r3, [r3, #0] - 8037900: 60fb str r3, [r7, #12] - 8037902: 68fb ldr r3, [r7, #12] - 8037904: 681b ldr r3, [r3, #0] - 8037906: 2b00 cmp r3, #0 - 8037908: d1f0 bne.n 80378ec + 8037980: 68fb ldr r3, [r7, #12] + 8037982: 681b ldr r3, [r3, #0] + 8037984: 60fb str r3, [r7, #12] + 8037986: 68fb ldr r3, [r7, #12] + 8037988: 681b ldr r3, [r3, #0] + 803798a: 2b00 cmp r3, #0 + 803798c: d1f0 bne.n 8037970 } /* { p is last pbuf of first h chain, p->next == NULL } */ LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len); - 803790a: 68fb ldr r3, [r7, #12] - 803790c: 891a ldrh r2, [r3, #8] - 803790e: 68fb ldr r3, [r7, #12] - 8037910: 895b ldrh r3, [r3, #10] - 8037912: 429a cmp r2, r3 - 8037914: d006 beq.n 8037924 - 8037916: 4b10 ldr r3, [pc, #64] ; (8037958 ) - 8037918: f240 3262 movw r2, #866 ; 0x362 - 803791c: 4911 ldr r1, [pc, #68] ; (8037964 ) - 803791e: 4810 ldr r0, [pc, #64] ; (8037960 ) - 8037920: f009 f8f6 bl 8040b10 + 803798e: 68fb ldr r3, [r7, #12] + 8037990: 891a ldrh r2, [r3, #8] + 8037992: 68fb ldr r3, [r7, #12] + 8037994: 895b ldrh r3, [r3, #10] + 8037996: 429a cmp r2, r3 + 8037998: d006 beq.n 80379a8 + 803799a: 4b10 ldr r3, [pc, #64] ; (80379dc ) + 803799c: f240 3262 movw r2, #866 ; 0x362 + 80379a0: 4911 ldr r1, [pc, #68] ; (80379e8 ) + 80379a2: 4810 ldr r0, [pc, #64] ; (80379e4 ) + 80379a4: f009 f8f6 bl 8040b94 LWIP_ASSERT("p->next == NULL", p->next == NULL); - 8037924: 68fb ldr r3, [r7, #12] - 8037926: 681b ldr r3, [r3, #0] - 8037928: 2b00 cmp r3, #0 - 803792a: d006 beq.n 803793a - 803792c: 4b0a ldr r3, [pc, #40] ; (8037958 ) - 803792e: f240 3263 movw r2, #867 ; 0x363 - 8037932: 490d ldr r1, [pc, #52] ; (8037968 ) - 8037934: 480a ldr r0, [pc, #40] ; (8037960 ) - 8037936: f009 f8eb bl 8040b10 + 80379a8: 68fb ldr r3, [r7, #12] + 80379aa: 681b ldr r3, [r3, #0] + 80379ac: 2b00 cmp r3, #0 + 80379ae: d006 beq.n 80379be + 80379b0: 4b0a ldr r3, [pc, #40] ; (80379dc ) + 80379b2: f240 3263 movw r2, #867 ; 0x363 + 80379b6: 490d ldr r1, [pc, #52] ; (80379ec ) + 80379b8: 480a ldr r0, [pc, #40] ; (80379e4 ) + 80379ba: f009 f8eb bl 8040b94 /* add total length of second chain to last pbuf total of first chain */ p->tot_len = (u16_t)(p->tot_len + t->tot_len); - 803793a: 68fb ldr r3, [r7, #12] - 803793c: 891a ldrh r2, [r3, #8] - 803793e: 683b ldr r3, [r7, #0] - 8037940: 891b ldrh r3, [r3, #8] - 8037942: 4413 add r3, r2 - 8037944: b29a uxth r2, r3 - 8037946: 68fb ldr r3, [r7, #12] - 8037948: 811a strh r2, [r3, #8] + 80379be: 68fb ldr r3, [r7, #12] + 80379c0: 891a ldrh r2, [r3, #8] + 80379c2: 683b ldr r3, [r7, #0] + 80379c4: 891b ldrh r3, [r3, #8] + 80379c6: 4413 add r3, r2 + 80379c8: b29a uxth r2, r3 + 80379ca: 68fb ldr r3, [r7, #12] + 80379cc: 811a strh r2, [r3, #8] /* chain last pbuf of head (p) with first of tail (t) */ p->next = t; - 803794a: 68fb ldr r3, [r7, #12] - 803794c: 683a ldr r2, [r7, #0] - 803794e: 601a str r2, [r3, #0] + 80379ce: 68fb ldr r3, [r7, #12] + 80379d0: 683a ldr r2, [r7, #0] + 80379d2: 601a str r2, [r3, #0] /* p->next now references t, but the caller will drop its reference to t, * so netto there is no change to the reference count of t. */ } - 8037950: 3710 adds r7, #16 - 8037952: 46bd mov sp, r7 - 8037954: bd80 pop {r7, pc} - 8037956: bf00 nop - 8037958: 08042898 .word 0x08042898 - 803795c: 08042a8c .word 0x08042a8c - 8037960: 080428f8 .word 0x080428f8 - 8037964: 08042ac4 .word 0x08042ac4 - 8037968: 08042af4 .word 0x08042af4 - -0803796c : + 80379d4: 3710 adds r7, #16 + 80379d6: 46bd mov sp, r7 + 80379d8: bd80 pop {r7, pc} + 80379da: bf00 nop + 80379dc: 08042918 .word 0x08042918 + 80379e0: 08042b0c .word 0x08042b0c + 80379e4: 08042978 .word 0x08042978 + 80379e8: 08042b44 .word 0x08042b44 + 80379ec: 08042b74 .word 0x08042b74 + +080379f0 : * ERR_ARG if one of the pbufs is NULL or p_to is not big * enough to hold p_from */ err_t pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from) { - 803796c: b580 push {r7, lr} - 803796e: b086 sub sp, #24 - 8037970: af00 add r7, sp, #0 - 8037972: 6078 str r0, [r7, #4] - 8037974: 6039 str r1, [r7, #0] + 80379f0: b580 push {r7, lr} + 80379f2: b086 sub sp, #24 + 80379f4: af00 add r7, sp, #0 + 80379f6: 6078 str r0, [r7, #4] + 80379f8: 6039 str r1, [r7, #0] size_t offset_to = 0, offset_from = 0, len; - 8037976: 2300 movs r3, #0 - 8037978: 617b str r3, [r7, #20] - 803797a: 2300 movs r3, #0 - 803797c: 613b str r3, [r7, #16] + 80379fa: 2300 movs r3, #0 + 80379fc: 617b str r3, [r7, #20] + 80379fe: 2300 movs r3, #0 + 8037a00: 613b str r3, [r7, #16] LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n", (const void *)p_to, (const void *)p_from)); /* is the target big enough to hold the source? */ LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) && - 803797e: 687b ldr r3, [r7, #4] - 8037980: 2b00 cmp r3, #0 - 8037982: d008 beq.n 8037996 - 8037984: 683b ldr r3, [r7, #0] - 8037986: 2b00 cmp r3, #0 - 8037988: d005 beq.n 8037996 - 803798a: 687b ldr r3, [r7, #4] - 803798c: 891a ldrh r2, [r3, #8] - 803798e: 683b ldr r3, [r7, #0] - 8037990: 891b ldrh r3, [r3, #8] - 8037992: 429a cmp r2, r3 - 8037994: d209 bcs.n 80379aa - 8037996: 4b57 ldr r3, [pc, #348] ; (8037af4 ) - 8037998: f240 32c9 movw r2, #969 ; 0x3c9 - 803799c: 4956 ldr r1, [pc, #344] ; (8037af8 ) - 803799e: 4857 ldr r0, [pc, #348] ; (8037afc ) - 80379a0: f009 f8b6 bl 8040b10 - 80379a4: f06f 030f mvn.w r3, #15 - 80379a8: e09f b.n 8037aea + 8037a02: 687b ldr r3, [r7, #4] + 8037a04: 2b00 cmp r3, #0 + 8037a06: d008 beq.n 8037a1a + 8037a08: 683b ldr r3, [r7, #0] + 8037a0a: 2b00 cmp r3, #0 + 8037a0c: d005 beq.n 8037a1a + 8037a0e: 687b ldr r3, [r7, #4] + 8037a10: 891a ldrh r2, [r3, #8] + 8037a12: 683b ldr r3, [r7, #0] + 8037a14: 891b ldrh r3, [r3, #8] + 8037a16: 429a cmp r2, r3 + 8037a18: d209 bcs.n 8037a2e + 8037a1a: 4b57 ldr r3, [pc, #348] ; (8037b78 ) + 8037a1c: f240 32c9 movw r2, #969 ; 0x3c9 + 8037a20: 4956 ldr r1, [pc, #344] ; (8037b7c ) + 8037a22: 4857 ldr r0, [pc, #348] ; (8037b80 ) + 8037a24: f009 f8b6 bl 8040b94 + 8037a28: f06f 030f mvn.w r3, #15 + 8037a2c: e09f b.n 8037b6e (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;); /* iterate through pbuf chain */ do { /* copy one part of the original chain */ if ((p_to->len - offset_to) >= (p_from->len - offset_from)) { - 80379aa: 687b ldr r3, [r7, #4] - 80379ac: 895b ldrh r3, [r3, #10] - 80379ae: 461a mov r2, r3 - 80379b0: 697b ldr r3, [r7, #20] - 80379b2: 1ad2 subs r2, r2, r3 - 80379b4: 683b ldr r3, [r7, #0] - 80379b6: 895b ldrh r3, [r3, #10] - 80379b8: 4619 mov r1, r3 - 80379ba: 693b ldr r3, [r7, #16] - 80379bc: 1acb subs r3, r1, r3 - 80379be: 429a cmp r2, r3 - 80379c0: d306 bcc.n 80379d0 + 8037a2e: 687b ldr r3, [r7, #4] + 8037a30: 895b ldrh r3, [r3, #10] + 8037a32: 461a mov r2, r3 + 8037a34: 697b ldr r3, [r7, #20] + 8037a36: 1ad2 subs r2, r2, r3 + 8037a38: 683b ldr r3, [r7, #0] + 8037a3a: 895b ldrh r3, [r3, #10] + 8037a3c: 4619 mov r1, r3 + 8037a3e: 693b ldr r3, [r7, #16] + 8037a40: 1acb subs r3, r1, r3 + 8037a42: 429a cmp r2, r3 + 8037a44: d306 bcc.n 8037a54 /* complete current p_from fits into current p_to */ len = p_from->len - offset_from; - 80379c2: 683b ldr r3, [r7, #0] - 80379c4: 895b ldrh r3, [r3, #10] - 80379c6: 461a mov r2, r3 - 80379c8: 693b ldr r3, [r7, #16] - 80379ca: 1ad3 subs r3, r2, r3 - 80379cc: 60fb str r3, [r7, #12] - 80379ce: e005 b.n 80379dc + 8037a46: 683b ldr r3, [r7, #0] + 8037a48: 895b ldrh r3, [r3, #10] + 8037a4a: 461a mov r2, r3 + 8037a4c: 693b ldr r3, [r7, #16] + 8037a4e: 1ad3 subs r3, r2, r3 + 8037a50: 60fb str r3, [r7, #12] + 8037a52: e005 b.n 8037a60 } else { /* current p_from does not fit into current p_to */ len = p_to->len - offset_to; - 80379d0: 687b ldr r3, [r7, #4] - 80379d2: 895b ldrh r3, [r3, #10] - 80379d4: 461a mov r2, r3 - 80379d6: 697b ldr r3, [r7, #20] - 80379d8: 1ad3 subs r3, r2, r3 - 80379da: 60fb str r3, [r7, #12] + 8037a54: 687b ldr r3, [r7, #4] + 8037a56: 895b ldrh r3, [r3, #10] + 8037a58: 461a mov r2, r3 + 8037a5a: 697b ldr r3, [r7, #20] + 8037a5c: 1ad3 subs r3, r2, r3 + 8037a5e: 60fb str r3, [r7, #12] } MEMCPY((u8_t *)p_to->payload + offset_to, (u8_t *)p_from->payload + offset_from, len); - 80379dc: 687b ldr r3, [r7, #4] - 80379de: 685a ldr r2, [r3, #4] - 80379e0: 697b ldr r3, [r7, #20] - 80379e2: 18d0 adds r0, r2, r3 - 80379e4: 683b ldr r3, [r7, #0] - 80379e6: 685a ldr r2, [r3, #4] - 80379e8: 693b ldr r3, [r7, #16] - 80379ea: 4413 add r3, r2 - 80379ec: 68fa ldr r2, [r7, #12] - 80379ee: 4619 mov r1, r3 - 80379f0: f008 ff7e bl 80408f0 + 8037a60: 687b ldr r3, [r7, #4] + 8037a62: 685a ldr r2, [r3, #4] + 8037a64: 697b ldr r3, [r7, #20] + 8037a66: 18d0 adds r0, r2, r3 + 8037a68: 683b ldr r3, [r7, #0] + 8037a6a: 685a ldr r2, [r3, #4] + 8037a6c: 693b ldr r3, [r7, #16] + 8037a6e: 4413 add r3, r2 + 8037a70: 68fa ldr r2, [r7, #12] + 8037a72: 4619 mov r1, r3 + 8037a74: f008 ff7e bl 8040974 offset_to += len; - 80379f4: 697a ldr r2, [r7, #20] - 80379f6: 68fb ldr r3, [r7, #12] - 80379f8: 4413 add r3, r2 - 80379fa: 617b str r3, [r7, #20] + 8037a78: 697a ldr r2, [r7, #20] + 8037a7a: 68fb ldr r3, [r7, #12] + 8037a7c: 4413 add r3, r2 + 8037a7e: 617b str r3, [r7, #20] offset_from += len; - 80379fc: 693a ldr r2, [r7, #16] - 80379fe: 68fb ldr r3, [r7, #12] - 8037a00: 4413 add r3, r2 - 8037a02: 613b str r3, [r7, #16] + 8037a80: 693a ldr r2, [r7, #16] + 8037a82: 68fb ldr r3, [r7, #12] + 8037a84: 4413 add r3, r2 + 8037a86: 613b str r3, [r7, #16] LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len); - 8037a04: 687b ldr r3, [r7, #4] - 8037a06: 895b ldrh r3, [r3, #10] - 8037a08: 461a mov r2, r3 - 8037a0a: 697b ldr r3, [r7, #20] - 8037a0c: 4293 cmp r3, r2 - 8037a0e: d906 bls.n 8037a1e - 8037a10: 4b38 ldr r3, [pc, #224] ; (8037af4 ) - 8037a12: f240 32d9 movw r2, #985 ; 0x3d9 - 8037a16: 493a ldr r1, [pc, #232] ; (8037b00 ) - 8037a18: 4838 ldr r0, [pc, #224] ; (8037afc ) - 8037a1a: f009 f879 bl 8040b10 + 8037a88: 687b ldr r3, [r7, #4] + 8037a8a: 895b ldrh r3, [r3, #10] + 8037a8c: 461a mov r2, r3 + 8037a8e: 697b ldr r3, [r7, #20] + 8037a90: 4293 cmp r3, r2 + 8037a92: d906 bls.n 8037aa2 + 8037a94: 4b38 ldr r3, [pc, #224] ; (8037b78 ) + 8037a96: f240 32d9 movw r2, #985 ; 0x3d9 + 8037a9a: 493a ldr r1, [pc, #232] ; (8037b84 ) + 8037a9c: 4838 ldr r0, [pc, #224] ; (8037b80 ) + 8037a9e: f009 f879 bl 8040b94 LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len); - 8037a1e: 683b ldr r3, [r7, #0] - 8037a20: 895b ldrh r3, [r3, #10] - 8037a22: 461a mov r2, r3 - 8037a24: 693b ldr r3, [r7, #16] - 8037a26: 4293 cmp r3, r2 - 8037a28: d906 bls.n 8037a38 - 8037a2a: 4b32 ldr r3, [pc, #200] ; (8037af4 ) - 8037a2c: f240 32da movw r2, #986 ; 0x3da - 8037a30: 4934 ldr r1, [pc, #208] ; (8037b04 ) - 8037a32: 4832 ldr r0, [pc, #200] ; (8037afc ) - 8037a34: f009 f86c bl 8040b10 + 8037aa2: 683b ldr r3, [r7, #0] + 8037aa4: 895b ldrh r3, [r3, #10] + 8037aa6: 461a mov r2, r3 + 8037aa8: 693b ldr r3, [r7, #16] + 8037aaa: 4293 cmp r3, r2 + 8037aac: d906 bls.n 8037abc + 8037aae: 4b32 ldr r3, [pc, #200] ; (8037b78 ) + 8037ab0: f240 32da movw r2, #986 ; 0x3da + 8037ab4: 4934 ldr r1, [pc, #208] ; (8037b88 ) + 8037ab6: 4832 ldr r0, [pc, #200] ; (8037b80 ) + 8037ab8: f009 f86c bl 8040b94 if (offset_from >= p_from->len) { - 8037a38: 683b ldr r3, [r7, #0] - 8037a3a: 895b ldrh r3, [r3, #10] - 8037a3c: 461a mov r2, r3 - 8037a3e: 693b ldr r3, [r7, #16] - 8037a40: 4293 cmp r3, r2 - 8037a42: d304 bcc.n 8037a4e + 8037abc: 683b ldr r3, [r7, #0] + 8037abe: 895b ldrh r3, [r3, #10] + 8037ac0: 461a mov r2, r3 + 8037ac2: 693b ldr r3, [r7, #16] + 8037ac4: 4293 cmp r3, r2 + 8037ac6: d304 bcc.n 8037ad2 /* on to next p_from (if any) */ offset_from = 0; - 8037a44: 2300 movs r3, #0 - 8037a46: 613b str r3, [r7, #16] + 8037ac8: 2300 movs r3, #0 + 8037aca: 613b str r3, [r7, #16] p_from = p_from->next; - 8037a48: 683b ldr r3, [r7, #0] - 8037a4a: 681b ldr r3, [r3, #0] - 8037a4c: 603b str r3, [r7, #0] + 8037acc: 683b ldr r3, [r7, #0] + 8037ace: 681b ldr r3, [r3, #0] + 8037ad0: 603b str r3, [r7, #0] } if (offset_to == p_to->len) { - 8037a4e: 687b ldr r3, [r7, #4] - 8037a50: 895b ldrh r3, [r3, #10] - 8037a52: 461a mov r2, r3 - 8037a54: 697b ldr r3, [r7, #20] - 8037a56: 4293 cmp r3, r2 - 8037a58: d114 bne.n 8037a84 + 8037ad2: 687b ldr r3, [r7, #4] + 8037ad4: 895b ldrh r3, [r3, #10] + 8037ad6: 461a mov r2, r3 + 8037ad8: 697b ldr r3, [r7, #20] + 8037ada: 4293 cmp r3, r2 + 8037adc: d114 bne.n 8037b08 /* on to next p_to (if any) */ offset_to = 0; - 8037a5a: 2300 movs r3, #0 - 8037a5c: 617b str r3, [r7, #20] + 8037ade: 2300 movs r3, #0 + 8037ae0: 617b str r3, [r7, #20] p_to = p_to->next; - 8037a5e: 687b ldr r3, [r7, #4] - 8037a60: 681b ldr r3, [r3, #0] - 8037a62: 607b str r3, [r7, #4] + 8037ae2: 687b ldr r3, [r7, #4] + 8037ae4: 681b ldr r3, [r3, #0] + 8037ae6: 607b str r3, [r7, #4] LWIP_ERROR("p_to != NULL", (p_to != NULL) || (p_from == NULL), return ERR_ARG;); - 8037a64: 687b ldr r3, [r7, #4] - 8037a66: 2b00 cmp r3, #0 - 8037a68: d10c bne.n 8037a84 - 8037a6a: 683b ldr r3, [r7, #0] - 8037a6c: 2b00 cmp r3, #0 - 8037a6e: d009 beq.n 8037a84 - 8037a70: 4b20 ldr r3, [pc, #128] ; (8037af4 ) - 8037a72: f44f 7279 mov.w r2, #996 ; 0x3e4 - 8037a76: 4924 ldr r1, [pc, #144] ; (8037b08 ) - 8037a78: 4820 ldr r0, [pc, #128] ; (8037afc ) - 8037a7a: f009 f849 bl 8040b10 - 8037a7e: f06f 030f mvn.w r3, #15 - 8037a82: e032 b.n 8037aea + 8037ae8: 687b ldr r3, [r7, #4] + 8037aea: 2b00 cmp r3, #0 + 8037aec: d10c bne.n 8037b08 + 8037aee: 683b ldr r3, [r7, #0] + 8037af0: 2b00 cmp r3, #0 + 8037af2: d009 beq.n 8037b08 + 8037af4: 4b20 ldr r3, [pc, #128] ; (8037b78 ) + 8037af6: f44f 7279 mov.w r2, #996 ; 0x3e4 + 8037afa: 4924 ldr r1, [pc, #144] ; (8037b8c ) + 8037afc: 4820 ldr r0, [pc, #128] ; (8037b80 ) + 8037afe: f009 f849 bl 8040b94 + 8037b02: f06f 030f mvn.w r3, #15 + 8037b06: e032 b.n 8037b6e } if ((p_from != NULL) && (p_from->len == p_from->tot_len)) { - 8037a84: 683b ldr r3, [r7, #0] - 8037a86: 2b00 cmp r3, #0 - 8037a88: d013 beq.n 8037ab2 - 8037a8a: 683b ldr r3, [r7, #0] - 8037a8c: 895a ldrh r2, [r3, #10] - 8037a8e: 683b ldr r3, [r7, #0] - 8037a90: 891b ldrh r3, [r3, #8] - 8037a92: 429a cmp r2, r3 - 8037a94: d10d bne.n 8037ab2 + 8037b08: 683b ldr r3, [r7, #0] + 8037b0a: 2b00 cmp r3, #0 + 8037b0c: d013 beq.n 8037b36 + 8037b0e: 683b ldr r3, [r7, #0] + 8037b10: 895a ldrh r2, [r3, #10] + 8037b12: 683b ldr r3, [r7, #0] + 8037b14: 891b ldrh r3, [r3, #8] + 8037b16: 429a cmp r2, r3 + 8037b18: d10d bne.n 8037b36 /* don't copy more than one packet! */ LWIP_ERROR("pbuf_copy() does not allow packet queues!", - 8037a96: 683b ldr r3, [r7, #0] - 8037a98: 681b ldr r3, [r3, #0] - 8037a9a: 2b00 cmp r3, #0 - 8037a9c: d009 beq.n 8037ab2 - 8037a9e: 4b15 ldr r3, [pc, #84] ; (8037af4 ) - 8037aa0: f240 32e9 movw r2, #1001 ; 0x3e9 - 8037aa4: 4919 ldr r1, [pc, #100] ; (8037b0c ) - 8037aa6: 4815 ldr r0, [pc, #84] ; (8037afc ) - 8037aa8: f009 f832 bl 8040b10 - 8037aac: f06f 0305 mvn.w r3, #5 - 8037ab0: e01b b.n 8037aea + 8037b1a: 683b ldr r3, [r7, #0] + 8037b1c: 681b ldr r3, [r3, #0] + 8037b1e: 2b00 cmp r3, #0 + 8037b20: d009 beq.n 8037b36 + 8037b22: 4b15 ldr r3, [pc, #84] ; (8037b78 ) + 8037b24: f240 32e9 movw r2, #1001 ; 0x3e9 + 8037b28: 4919 ldr r1, [pc, #100] ; (8037b90 ) + 8037b2a: 4815 ldr r0, [pc, #84] ; (8037b80 ) + 8037b2c: f009 f832 bl 8040b94 + 8037b30: f06f 0305 mvn.w r3, #5 + 8037b34: e01b b.n 8037b6e (p_from->next == NULL), return ERR_VAL;); } if ((p_to != NULL) && (p_to->len == p_to->tot_len)) { - 8037ab2: 687b ldr r3, [r7, #4] - 8037ab4: 2b00 cmp r3, #0 - 8037ab6: d013 beq.n 8037ae0 - 8037ab8: 687b ldr r3, [r7, #4] - 8037aba: 895a ldrh r2, [r3, #10] - 8037abc: 687b ldr r3, [r7, #4] - 8037abe: 891b ldrh r3, [r3, #8] - 8037ac0: 429a cmp r2, r3 - 8037ac2: d10d bne.n 8037ae0 + 8037b36: 687b ldr r3, [r7, #4] + 8037b38: 2b00 cmp r3, #0 + 8037b3a: d013 beq.n 8037b64 + 8037b3c: 687b ldr r3, [r7, #4] + 8037b3e: 895a ldrh r2, [r3, #10] + 8037b40: 687b ldr r3, [r7, #4] + 8037b42: 891b ldrh r3, [r3, #8] + 8037b44: 429a cmp r2, r3 + 8037b46: d10d bne.n 8037b64 /* don't copy more than one packet! */ LWIP_ERROR("pbuf_copy() does not allow packet queues!", - 8037ac4: 687b ldr r3, [r7, #4] - 8037ac6: 681b ldr r3, [r3, #0] - 8037ac8: 2b00 cmp r3, #0 - 8037aca: d009 beq.n 8037ae0 - 8037acc: 4b09 ldr r3, [pc, #36] ; (8037af4 ) - 8037ace: f240 32ee movw r2, #1006 ; 0x3ee - 8037ad2: 490e ldr r1, [pc, #56] ; (8037b0c ) - 8037ad4: 4809 ldr r0, [pc, #36] ; (8037afc ) - 8037ad6: f009 f81b bl 8040b10 - 8037ada: f06f 0305 mvn.w r3, #5 - 8037ade: e004 b.n 8037aea + 8037b48: 687b ldr r3, [r7, #4] + 8037b4a: 681b ldr r3, [r3, #0] + 8037b4c: 2b00 cmp r3, #0 + 8037b4e: d009 beq.n 8037b64 + 8037b50: 4b09 ldr r3, [pc, #36] ; (8037b78 ) + 8037b52: f240 32ee movw r2, #1006 ; 0x3ee + 8037b56: 490e ldr r1, [pc, #56] ; (8037b90 ) + 8037b58: 4809 ldr r0, [pc, #36] ; (8037b80 ) + 8037b5a: f009 f81b bl 8040b94 + 8037b5e: f06f 0305 mvn.w r3, #5 + 8037b62: e004 b.n 8037b6e (p_to->next == NULL), return ERR_VAL;); } } while (p_from); - 8037ae0: 683b ldr r3, [r7, #0] - 8037ae2: 2b00 cmp r3, #0 - 8037ae4: f47f af61 bne.w 80379aa + 8037b64: 683b ldr r3, [r7, #0] + 8037b66: 2b00 cmp r3, #0 + 8037b68: f47f af61 bne.w 8037a2e LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n")); return ERR_OK; - 8037ae8: 2300 movs r3, #0 -} - 8037aea: 4618 mov r0, r3 - 8037aec: 3718 adds r7, #24 - 8037aee: 46bd mov sp, r7 - 8037af0: bd80 pop {r7, pc} - 8037af2: bf00 nop - 8037af4: 08042898 .word 0x08042898 - 8037af8: 08042b40 .word 0x08042b40 - 8037afc: 080428f8 .word 0x080428f8 - 8037b00: 08042b70 .word 0x08042b70 - 8037b04: 08042b88 .word 0x08042b88 - 8037b08: 08042ba4 .word 0x08042ba4 - 8037b0c: 08042bb4 .word 0x08042bb4 - -08037b10 : + 8037b6c: 2300 movs r3, #0 +} + 8037b6e: 4618 mov r0, r3 + 8037b70: 3718 adds r7, #24 + 8037b72: 46bd mov sp, r7 + 8037b74: bd80 pop {r7, pc} + 8037b76: bf00 nop + 8037b78: 08042918 .word 0x08042918 + 8037b7c: 08042bc0 .word 0x08042bc0 + 8037b80: 08042978 .word 0x08042978 + 8037b84: 08042bf0 .word 0x08042bf0 + 8037b88: 08042c08 .word 0x08042c08 + 8037b8c: 08042c24 .word 0x08042c24 + 8037b90: 08042c34 .word 0x08042c34 + +08037b94 : * @param offset offset into the packet buffer from where to begin copying len bytes * @return the number of bytes copied, or 0 on failure */ u16_t pbuf_copy_partial(const struct pbuf *buf, void *dataptr, u16_t len, u16_t offset) { - 8037b10: b580 push {r7, lr} - 8037b12: b088 sub sp, #32 - 8037b14: af00 add r7, sp, #0 - 8037b16: 60f8 str r0, [r7, #12] - 8037b18: 60b9 str r1, [r7, #8] - 8037b1a: 4611 mov r1, r2 - 8037b1c: 461a mov r2, r3 - 8037b1e: 460b mov r3, r1 - 8037b20: 80fb strh r3, [r7, #6] - 8037b22: 4613 mov r3, r2 - 8037b24: 80bb strh r3, [r7, #4] + 8037b94: b580 push {r7, lr} + 8037b96: b088 sub sp, #32 + 8037b98: af00 add r7, sp, #0 + 8037b9a: 60f8 str r0, [r7, #12] + 8037b9c: 60b9 str r1, [r7, #8] + 8037b9e: 4611 mov r1, r2 + 8037ba0: 461a mov r2, r3 + 8037ba2: 460b mov r3, r1 + 8037ba4: 80fb strh r3, [r7, #6] + 8037ba6: 4613 mov r3, r2 + 8037ba8: 80bb strh r3, [r7, #4] const struct pbuf *p; u16_t left = 0; - 8037b26: 2300 movs r3, #0 - 8037b28: 837b strh r3, [r7, #26] + 8037baa: 2300 movs r3, #0 + 8037bac: 837b strh r3, [r7, #26] u16_t buf_copy_len; u16_t copied_total = 0; - 8037b2a: 2300 movs r3, #0 - 8037b2c: 82fb strh r3, [r7, #22] + 8037bae: 2300 movs r3, #0 + 8037bb0: 82fb strh r3, [r7, #22] LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;); - 8037b2e: 68fb ldr r3, [r7, #12] - 8037b30: 2b00 cmp r3, #0 - 8037b32: d108 bne.n 8037b46 - 8037b34: 4b2b ldr r3, [pc, #172] ; (8037be4 ) - 8037b36: f240 420a movw r2, #1034 ; 0x40a - 8037b3a: 492b ldr r1, [pc, #172] ; (8037be8 ) - 8037b3c: 482b ldr r0, [pc, #172] ; (8037bec ) - 8037b3e: f008 ffe7 bl 8040b10 - 8037b42: 2300 movs r3, #0 - 8037b44: e04a b.n 8037bdc + 8037bb2: 68fb ldr r3, [r7, #12] + 8037bb4: 2b00 cmp r3, #0 + 8037bb6: d108 bne.n 8037bca + 8037bb8: 4b2b ldr r3, [pc, #172] ; (8037c68 ) + 8037bba: f240 420a movw r2, #1034 ; 0x40a + 8037bbe: 492b ldr r1, [pc, #172] ; (8037c6c ) + 8037bc0: 482b ldr r0, [pc, #172] ; (8037c70 ) + 8037bc2: f008 ffe7 bl 8040b94 + 8037bc6: 2300 movs r3, #0 + 8037bc8: e04a b.n 8037c60 LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;); - 8037b46: 68bb ldr r3, [r7, #8] - 8037b48: 2b00 cmp r3, #0 - 8037b4a: d108 bne.n 8037b5e - 8037b4c: 4b25 ldr r3, [pc, #148] ; (8037be4 ) - 8037b4e: f240 420b movw r2, #1035 ; 0x40b - 8037b52: 4927 ldr r1, [pc, #156] ; (8037bf0 ) - 8037b54: 4825 ldr r0, [pc, #148] ; (8037bec ) - 8037b56: f008 ffdb bl 8040b10 - 8037b5a: 2300 movs r3, #0 - 8037b5c: e03e b.n 8037bdc + 8037bca: 68bb ldr r3, [r7, #8] + 8037bcc: 2b00 cmp r3, #0 + 8037bce: d108 bne.n 8037be2 + 8037bd0: 4b25 ldr r3, [pc, #148] ; (8037c68 ) + 8037bd2: f240 420b movw r2, #1035 ; 0x40b + 8037bd6: 4927 ldr r1, [pc, #156] ; (8037c74 ) + 8037bd8: 4825 ldr r0, [pc, #148] ; (8037c70 ) + 8037bda: f008 ffdb bl 8040b94 + 8037bde: 2300 movs r3, #0 + 8037be0: e03e b.n 8037c60 /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */ for (p = buf; len != 0 && p != NULL; p = p->next) { - 8037b5e: 68fb ldr r3, [r7, #12] - 8037b60: 61fb str r3, [r7, #28] - 8037b62: e034 b.n 8037bce + 8037be2: 68fb ldr r3, [r7, #12] + 8037be4: 61fb str r3, [r7, #28] + 8037be6: e034 b.n 8037c52 if ((offset != 0) && (offset >= p->len)) { - 8037b64: 88bb ldrh r3, [r7, #4] - 8037b66: 2b00 cmp r3, #0 - 8037b68: d00a beq.n 8037b80 - 8037b6a: 69fb ldr r3, [r7, #28] - 8037b6c: 895b ldrh r3, [r3, #10] - 8037b6e: 88ba ldrh r2, [r7, #4] - 8037b70: 429a cmp r2, r3 - 8037b72: d305 bcc.n 8037b80 + 8037be8: 88bb ldrh r3, [r7, #4] + 8037bea: 2b00 cmp r3, #0 + 8037bec: d00a beq.n 8037c04 + 8037bee: 69fb ldr r3, [r7, #28] + 8037bf0: 895b ldrh r3, [r3, #10] + 8037bf2: 88ba ldrh r2, [r7, #4] + 8037bf4: 429a cmp r2, r3 + 8037bf6: d305 bcc.n 8037c04 /* don't copy from this buffer -> on to the next */ offset = (u16_t)(offset - p->len); - 8037b74: 69fb ldr r3, [r7, #28] - 8037b76: 895b ldrh r3, [r3, #10] - 8037b78: 88ba ldrh r2, [r7, #4] - 8037b7a: 1ad3 subs r3, r2, r3 - 8037b7c: 80bb strh r3, [r7, #4] - 8037b7e: e023 b.n 8037bc8 + 8037bf8: 69fb ldr r3, [r7, #28] + 8037bfa: 895b ldrh r3, [r3, #10] + 8037bfc: 88ba ldrh r2, [r7, #4] + 8037bfe: 1ad3 subs r3, r2, r3 + 8037c00: 80bb strh r3, [r7, #4] + 8037c02: e023 b.n 8037c4c } else { /* copy from this buffer. maybe only partially. */ buf_copy_len = (u16_t)(p->len - offset); - 8037b80: 69fb ldr r3, [r7, #28] - 8037b82: 895a ldrh r2, [r3, #10] - 8037b84: 88bb ldrh r3, [r7, #4] - 8037b86: 1ad3 subs r3, r2, r3 - 8037b88: 833b strh r3, [r7, #24] + 8037c04: 69fb ldr r3, [r7, #28] + 8037c06: 895a ldrh r2, [r3, #10] + 8037c08: 88bb ldrh r3, [r7, #4] + 8037c0a: 1ad3 subs r3, r2, r3 + 8037c0c: 833b strh r3, [r7, #24] if (buf_copy_len > len) { - 8037b8a: 8b3a ldrh r2, [r7, #24] - 8037b8c: 88fb ldrh r3, [r7, #6] - 8037b8e: 429a cmp r2, r3 - 8037b90: d901 bls.n 8037b96 + 8037c0e: 8b3a ldrh r2, [r7, #24] + 8037c10: 88fb ldrh r3, [r7, #6] + 8037c12: 429a cmp r2, r3 + 8037c14: d901 bls.n 8037c1a buf_copy_len = len; - 8037b92: 88fb ldrh r3, [r7, #6] - 8037b94: 833b strh r3, [r7, #24] + 8037c16: 88fb ldrh r3, [r7, #6] + 8037c18: 833b strh r3, [r7, #24] } /* copy the necessary parts of the buffer */ MEMCPY(&((char *)dataptr)[left], &((char *)p->payload)[offset], buf_copy_len); - 8037b96: 8b7b ldrh r3, [r7, #26] - 8037b98: 68ba ldr r2, [r7, #8] - 8037b9a: 18d0 adds r0, r2, r3 - 8037b9c: 69fb ldr r3, [r7, #28] - 8037b9e: 685a ldr r2, [r3, #4] - 8037ba0: 88bb ldrh r3, [r7, #4] - 8037ba2: 4413 add r3, r2 - 8037ba4: 8b3a ldrh r2, [r7, #24] - 8037ba6: 4619 mov r1, r3 - 8037ba8: f008 fea2 bl 80408f0 + 8037c1a: 8b7b ldrh r3, [r7, #26] + 8037c1c: 68ba ldr r2, [r7, #8] + 8037c1e: 18d0 adds r0, r2, r3 + 8037c20: 69fb ldr r3, [r7, #28] + 8037c22: 685a ldr r2, [r3, #4] + 8037c24: 88bb ldrh r3, [r7, #4] + 8037c26: 4413 add r3, r2 + 8037c28: 8b3a ldrh r2, [r7, #24] + 8037c2a: 4619 mov r1, r3 + 8037c2c: f008 fea2 bl 8040974 copied_total = (u16_t)(copied_total + buf_copy_len); - 8037bac: 8afa ldrh r2, [r7, #22] - 8037bae: 8b3b ldrh r3, [r7, #24] - 8037bb0: 4413 add r3, r2 - 8037bb2: 82fb strh r3, [r7, #22] + 8037c30: 8afa ldrh r2, [r7, #22] + 8037c32: 8b3b ldrh r3, [r7, #24] + 8037c34: 4413 add r3, r2 + 8037c36: 82fb strh r3, [r7, #22] left = (u16_t)(left + buf_copy_len); - 8037bb4: 8b7a ldrh r2, [r7, #26] - 8037bb6: 8b3b ldrh r3, [r7, #24] - 8037bb8: 4413 add r3, r2 - 8037bba: 837b strh r3, [r7, #26] + 8037c38: 8b7a ldrh r2, [r7, #26] + 8037c3a: 8b3b ldrh r3, [r7, #24] + 8037c3c: 4413 add r3, r2 + 8037c3e: 837b strh r3, [r7, #26] len = (u16_t)(len - buf_copy_len); - 8037bbc: 88fa ldrh r2, [r7, #6] - 8037bbe: 8b3b ldrh r3, [r7, #24] - 8037bc0: 1ad3 subs r3, r2, r3 - 8037bc2: 80fb strh r3, [r7, #6] + 8037c40: 88fa ldrh r2, [r7, #6] + 8037c42: 8b3b ldrh r3, [r7, #24] + 8037c44: 1ad3 subs r3, r2, r3 + 8037c46: 80fb strh r3, [r7, #6] offset = 0; - 8037bc4: 2300 movs r3, #0 - 8037bc6: 80bb strh r3, [r7, #4] + 8037c48: 2300 movs r3, #0 + 8037c4a: 80bb strh r3, [r7, #4] for (p = buf; len != 0 && p != NULL; p = p->next) { - 8037bc8: 69fb ldr r3, [r7, #28] - 8037bca: 681b ldr r3, [r3, #0] - 8037bcc: 61fb str r3, [r7, #28] - 8037bce: 88fb ldrh r3, [r7, #6] - 8037bd0: 2b00 cmp r3, #0 - 8037bd2: d002 beq.n 8037bda - 8037bd4: 69fb ldr r3, [r7, #28] - 8037bd6: 2b00 cmp r3, #0 - 8037bd8: d1c4 bne.n 8037b64 + 8037c4c: 69fb ldr r3, [r7, #28] + 8037c4e: 681b ldr r3, [r3, #0] + 8037c50: 61fb str r3, [r7, #28] + 8037c52: 88fb ldrh r3, [r7, #6] + 8037c54: 2b00 cmp r3, #0 + 8037c56: d002 beq.n 8037c5e + 8037c58: 69fb ldr r3, [r7, #28] + 8037c5a: 2b00 cmp r3, #0 + 8037c5c: d1c4 bne.n 8037be8 } } return copied_total; - 8037bda: 8afb ldrh r3, [r7, #22] -} - 8037bdc: 4618 mov r0, r3 - 8037bde: 3720 adds r7, #32 - 8037be0: 46bd mov sp, r7 - 8037be2: bd80 pop {r7, pc} - 8037be4: 08042898 .word 0x08042898 - 8037be8: 08042be0 .word 0x08042be0 - 8037bec: 080428f8 .word 0x080428f8 - 8037bf0: 08042c00 .word 0x08042c00 - -08037bf4 : + 8037c5e: 8afb ldrh r3, [r7, #22] +} + 8037c60: 4618 mov r0, r3 + 8037c62: 3720 adds r7, #32 + 8037c64: 46bd mov sp, r7 + 8037c66: bd80 pop {r7, pc} + 8037c68: 08042918 .word 0x08042918 + 8037c6c: 08042c60 .word 0x08042c60 + 8037c70: 08042978 .word 0x08042978 + 8037c74: 08042c80 .word 0x08042c80 + +08037c78 : * * @return a new pbuf or NULL if allocation fails */ struct pbuf * pbuf_clone(pbuf_layer layer, pbuf_type type, struct pbuf *p) { - 8037bf4: b580 push {r7, lr} - 8037bf6: b084 sub sp, #16 - 8037bf8: af00 add r7, sp, #0 - 8037bfa: 4603 mov r3, r0 - 8037bfc: 603a str r2, [r7, #0] - 8037bfe: 71fb strb r3, [r7, #7] - 8037c00: 460b mov r3, r1 - 8037c02: 80bb strh r3, [r7, #4] + 8037c78: b580 push {r7, lr} + 8037c7a: b084 sub sp, #16 + 8037c7c: af00 add r7, sp, #0 + 8037c7e: 4603 mov r3, r0 + 8037c80: 603a str r2, [r7, #0] + 8037c82: 71fb strb r3, [r7, #7] + 8037c84: 460b mov r3, r1 + 8037c86: 80bb strh r3, [r7, #4] struct pbuf *q; err_t err; q = pbuf_alloc(layer, p->tot_len, type); - 8037c04: 683b ldr r3, [r7, #0] - 8037c06: 8919 ldrh r1, [r3, #8] - 8037c08: 88ba ldrh r2, [r7, #4] - 8037c0a: 79fb ldrb r3, [r7, #7] - 8037c0c: 4618 mov r0, r3 - 8037c0e: f7ff fab1 bl 8037174 - 8037c12: 60f8 str r0, [r7, #12] + 8037c88: 683b ldr r3, [r7, #0] + 8037c8a: 8919 ldrh r1, [r3, #8] + 8037c8c: 88ba ldrh r2, [r7, #4] + 8037c8e: 79fb ldrb r3, [r7, #7] + 8037c90: 4618 mov r0, r3 + 8037c92: f7ff fab1 bl 80371f8 + 8037c96: 60f8 str r0, [r7, #12] if (q == NULL) { - 8037c14: 68fb ldr r3, [r7, #12] - 8037c16: 2b00 cmp r3, #0 - 8037c18: d101 bne.n 8037c1e + 8037c98: 68fb ldr r3, [r7, #12] + 8037c9a: 2b00 cmp r3, #0 + 8037c9c: d101 bne.n 8037ca2 return NULL; - 8037c1a: 2300 movs r3, #0 - 8037c1c: e011 b.n 8037c42 + 8037c9e: 2300 movs r3, #0 + 8037ca0: e011 b.n 8037cc6 } err = pbuf_copy(q, p); - 8037c1e: 6839 ldr r1, [r7, #0] - 8037c20: 68f8 ldr r0, [r7, #12] - 8037c22: f7ff fea3 bl 803796c - 8037c26: 4603 mov r3, r0 - 8037c28: 72fb strb r3, [r7, #11] + 8037ca2: 6839 ldr r1, [r7, #0] + 8037ca4: 68f8 ldr r0, [r7, #12] + 8037ca6: f7ff fea3 bl 80379f0 + 8037caa: 4603 mov r3, r0 + 8037cac: 72fb strb r3, [r7, #11] LWIP_UNUSED_ARG(err); /* in case of LWIP_NOASSERT */ LWIP_ASSERT("pbuf_copy failed", err == ERR_OK); - 8037c2a: f997 300b ldrsb.w r3, [r7, #11] - 8037c2e: 2b00 cmp r3, #0 - 8037c30: d006 beq.n 8037c40 - 8037c32: 4b06 ldr r3, [pc, #24] ; (8037c4c ) - 8037c34: f240 5224 movw r2, #1316 ; 0x524 - 8037c38: 4905 ldr r1, [pc, #20] ; (8037c50 ) - 8037c3a: 4806 ldr r0, [pc, #24] ; (8037c54 ) - 8037c3c: f008 ff68 bl 8040b10 + 8037cae: f997 300b ldrsb.w r3, [r7, #11] + 8037cb2: 2b00 cmp r3, #0 + 8037cb4: d006 beq.n 8037cc4 + 8037cb6: 4b06 ldr r3, [pc, #24] ; (8037cd0 ) + 8037cb8: f240 5224 movw r2, #1316 ; 0x524 + 8037cbc: 4905 ldr r1, [pc, #20] ; (8037cd4 ) + 8037cbe: 4806 ldr r0, [pc, #24] ; (8037cd8 ) + 8037cc0: f008 ff68 bl 8040b94 return q; - 8037c40: 68fb ldr r3, [r7, #12] -} - 8037c42: 4618 mov r0, r3 - 8037c44: 3710 adds r7, #16 - 8037c46: 46bd mov sp, r7 - 8037c48: bd80 pop {r7, pc} - 8037c4a: bf00 nop - 8037c4c: 08042898 .word 0x08042898 - 8037c50: 08042d0c .word 0x08042d0c - 8037c54: 080428f8 .word 0x080428f8 - -08037c58 : + 8037cc4: 68fb ldr r3, [r7, #12] +} + 8037cc6: 4618 mov r0, r3 + 8037cc8: 3710 adds r7, #16 + 8037cca: 46bd mov sp, r7 + 8037ccc: bd80 pop {r7, pc} + 8037cce: bf00 nop + 8037cd0: 08042918 .word 0x08042918 + 8037cd4: 08042d8c .word 0x08042d8c + 8037cd8: 08042978 .word 0x08042978 + +08037cdc : /** * Initialize this module. */ void tcp_init(void) { - 8037c58: b580 push {r7, lr} - 8037c5a: af00 add r7, sp, #0 + 8037cdc: b580 push {r7, lr} + 8037cde: af00 add r7, sp, #0 #ifdef LWIP_RAND tcp_port = TCP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND()); - 8037c5c: f008 ff70 bl 8040b40 - 8037c60: 4603 mov r3, r0 - 8037c62: b29b uxth r3, r3 - 8037c64: f3c3 030d ubfx r3, r3, #0, #14 - 8037c68: b29b uxth r3, r3 - 8037c6a: f5a3 4380 sub.w r3, r3, #16384 ; 0x4000 - 8037c6e: b29a uxth r2, r3 - 8037c70: 4b01 ldr r3, [pc, #4] ; (8037c78 ) - 8037c72: 801a strh r2, [r3, #0] + 8037ce0: f008 ff70 bl 8040bc4 + 8037ce4: 4603 mov r3, r0 + 8037ce6: b29b uxth r3, r3 + 8037ce8: f3c3 030d ubfx r3, r3, #0, #14 + 8037cec: b29b uxth r3, r3 + 8037cee: f5a3 4380 sub.w r3, r3, #16384 ; 0x4000 + 8037cf2: b29a uxth r2, r3 + 8037cf4: 4b01 ldr r3, [pc, #4] ; (8037cfc ) + 8037cf6: 801a strh r2, [r3, #0] #endif /* LWIP_RAND */ } - 8037c74: bf00 nop - 8037c76: bd80 pop {r7, pc} - 8037c78: 2400006c .word 0x2400006c + 8037cf8: bf00 nop + 8037cfa: bd80 pop {r7, pc} + 8037cfc: 2400006c .word 0x2400006c -08037c7c : +08037d00 : /** Free a tcp pcb */ void tcp_free(struct tcp_pcb *pcb) { - 8037c7c: b580 push {r7, lr} - 8037c7e: b082 sub sp, #8 - 8037c80: af00 add r7, sp, #0 - 8037c82: 6078 str r0, [r7, #4] + 8037d00: b580 push {r7, lr} + 8037d02: b082 sub sp, #8 + 8037d04: af00 add r7, sp, #0 + 8037d06: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_free: LISTEN", pcb->state != LISTEN); - 8037c84: 687b ldr r3, [r7, #4] - 8037c86: 7d1b ldrb r3, [r3, #20] - 8037c88: 2b01 cmp r3, #1 - 8037c8a: d105 bne.n 8037c98 - 8037c8c: 4b06 ldr r3, [pc, #24] ; (8037ca8 ) - 8037c8e: 22d4 movs r2, #212 ; 0xd4 - 8037c90: 4906 ldr r1, [pc, #24] ; (8037cac ) - 8037c92: 4807 ldr r0, [pc, #28] ; (8037cb0 ) - 8037c94: f008 ff3c bl 8040b10 + 8037d08: 687b ldr r3, [r7, #4] + 8037d0a: 7d1b ldrb r3, [r3, #20] + 8037d0c: 2b01 cmp r3, #1 + 8037d0e: d105 bne.n 8037d1c + 8037d10: 4b06 ldr r3, [pc, #24] ; (8037d2c ) + 8037d12: 22d4 movs r2, #212 ; 0xd4 + 8037d14: 4906 ldr r1, [pc, #24] ; (8037d30 ) + 8037d16: 4807 ldr r0, [pc, #28] ; (8037d34 ) + 8037d18: f008 ff3c bl 8040b94 #if LWIP_TCP_PCB_NUM_EXT_ARGS tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args); #endif memp_free(MEMP_TCP_PCB, pcb); - 8037c98: 6879 ldr r1, [r7, #4] - 8037c9a: 2001 movs r0, #1 - 8037c9c: f7fe febc bl 8036a18 + 8037d1c: 6879 ldr r1, [r7, #4] + 8037d1e: 2001 movs r0, #1 + 8037d20: f7fe febc bl 8036a9c } - 8037ca0: bf00 nop - 8037ca2: 3708 adds r7, #8 - 8037ca4: 46bd mov sp, r7 - 8037ca6: bd80 pop {r7, pc} - 8037ca8: 08042d98 .word 0x08042d98 - 8037cac: 08042dc8 .word 0x08042dc8 - 8037cb0: 08042ddc .word 0x08042ddc + 8037d24: bf00 nop + 8037d26: 3708 adds r7, #8 + 8037d28: 46bd mov sp, r7 + 8037d2a: bd80 pop {r7, pc} + 8037d2c: 08042e18 .word 0x08042e18 + 8037d30: 08042e48 .word 0x08042e48 + 8037d34: 08042e5c .word 0x08042e5c -08037cb4 : +08037d38 : /** Free a tcp listen pcb */ static void tcp_free_listen(struct tcp_pcb *pcb) { - 8037cb4: b580 push {r7, lr} - 8037cb6: b082 sub sp, #8 - 8037cb8: af00 add r7, sp, #0 - 8037cba: 6078 str r0, [r7, #4] + 8037d38: b580 push {r7, lr} + 8037d3a: b082 sub sp, #8 + 8037d3c: af00 add r7, sp, #0 + 8037d3e: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_free_listen: !LISTEN", pcb->state != LISTEN); - 8037cbc: 687b ldr r3, [r7, #4] - 8037cbe: 7d1b ldrb r3, [r3, #20] - 8037cc0: 2b01 cmp r3, #1 - 8037cc2: d105 bne.n 8037cd0 - 8037cc4: 4b06 ldr r3, [pc, #24] ; (8037ce0 ) - 8037cc6: 22df movs r2, #223 ; 0xdf - 8037cc8: 4906 ldr r1, [pc, #24] ; (8037ce4 ) - 8037cca: 4807 ldr r0, [pc, #28] ; (8037ce8 ) - 8037ccc: f008 ff20 bl 8040b10 + 8037d40: 687b ldr r3, [r7, #4] + 8037d42: 7d1b ldrb r3, [r3, #20] + 8037d44: 2b01 cmp r3, #1 + 8037d46: d105 bne.n 8037d54 + 8037d48: 4b06 ldr r3, [pc, #24] ; (8037d64 ) + 8037d4a: 22df movs r2, #223 ; 0xdf + 8037d4c: 4906 ldr r1, [pc, #24] ; (8037d68 ) + 8037d4e: 4807 ldr r0, [pc, #28] ; (8037d6c ) + 8037d50: f008 ff20 bl 8040b94 #if LWIP_TCP_PCB_NUM_EXT_ARGS tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args); #endif memp_free(MEMP_TCP_PCB_LISTEN, pcb); - 8037cd0: 6879 ldr r1, [r7, #4] - 8037cd2: 2002 movs r0, #2 - 8037cd4: f7fe fea0 bl 8036a18 -} - 8037cd8: bf00 nop - 8037cda: 3708 adds r7, #8 - 8037cdc: 46bd mov sp, r7 - 8037cde: bd80 pop {r7, pc} - 8037ce0: 08042d98 .word 0x08042d98 - 8037ce4: 08042e04 .word 0x08042e04 - 8037ce8: 08042ddc .word 0x08042ddc - -08037cec : + 8037d54: 6879 ldr r1, [r7, #4] + 8037d56: 2002 movs r0, #2 + 8037d58: f7fe fea0 bl 8036a9c +} + 8037d5c: bf00 nop + 8037d5e: 3708 adds r7, #8 + 8037d60: 46bd mov sp, r7 + 8037d62: bd80 pop {r7, pc} + 8037d64: 08042e18 .word 0x08042e18 + 8037d68: 08042e84 .word 0x08042e84 + 8037d6c: 08042e5c .word 0x08042e5c + +08037d70 : /** * Called periodically to dispatch TCP timers. */ void tcp_tmr(void) { - 8037cec: b580 push {r7, lr} - 8037cee: af00 add r7, sp, #0 + 8037d70: b580 push {r7, lr} + 8037d72: af00 add r7, sp, #0 /* Call tcp_fasttmr() every 250 ms */ tcp_fasttmr(); - 8037cf0: f001 f85c bl 8038dac + 8037d74: f001 f85c bl 8038e30 if (++tcp_timer & 1) { - 8037cf4: 4b07 ldr r3, [pc, #28] ; (8037d14 ) - 8037cf6: 781b ldrb r3, [r3, #0] - 8037cf8: 3301 adds r3, #1 - 8037cfa: b2da uxtb r2, r3 - 8037cfc: 4b05 ldr r3, [pc, #20] ; (8037d14 ) - 8037cfe: 701a strb r2, [r3, #0] - 8037d00: 4b04 ldr r3, [pc, #16] ; (8037d14 ) - 8037d02: 781b ldrb r3, [r3, #0] - 8037d04: f003 0301 and.w r3, r3, #1 - 8037d08: 2b00 cmp r3, #0 - 8037d0a: d001 beq.n 8037d10 + 8037d78: 4b07 ldr r3, [pc, #28] ; (8037d98 ) + 8037d7a: 781b ldrb r3, [r3, #0] + 8037d7c: 3301 adds r3, #1 + 8037d7e: b2da uxtb r2, r3 + 8037d80: 4b05 ldr r3, [pc, #20] ; (8037d98 ) + 8037d82: 701a strb r2, [r3, #0] + 8037d84: 4b04 ldr r3, [pc, #16] ; (8037d98 ) + 8037d86: 781b ldrb r3, [r3, #0] + 8037d88: f003 0301 and.w r3, r3, #1 + 8037d8c: 2b00 cmp r3, #0 + 8037d8e: d001 beq.n 8037d94 /* Call tcp_slowtmr() every 500 ms, i.e., every other timer tcp_tmr() is called. */ tcp_slowtmr(); - 8037d0c: f000 fd0e bl 803872c + 8037d90: f000 fd0e bl 80387b0 } } - 8037d10: bf00 nop - 8037d12: bd80 pop {r7, pc} - 8037d14: 2400e96d .word 0x2400e96d + 8037d94: bf00 nop + 8037d96: bd80 pop {r7, pc} + 8037d98: 2400e975 .word 0x2400e975 -08037d18 : +08037d9c : /** Called when a listen pcb is closed. Iterates one pcb list and removes the * closed listener pcb from pcb->listener if matching. */ static void tcp_remove_listener(struct tcp_pcb *list, struct tcp_pcb_listen *lpcb) { - 8037d18: b580 push {r7, lr} - 8037d1a: b084 sub sp, #16 - 8037d1c: af00 add r7, sp, #0 - 8037d1e: 6078 str r0, [r7, #4] - 8037d20: 6039 str r1, [r7, #0] + 8037d9c: b580 push {r7, lr} + 8037d9e: b084 sub sp, #16 + 8037da0: af00 add r7, sp, #0 + 8037da2: 6078 str r0, [r7, #4] + 8037da4: 6039 str r1, [r7, #0] struct tcp_pcb *pcb; LWIP_ASSERT("tcp_remove_listener: invalid listener", lpcb != NULL); - 8037d22: 683b ldr r3, [r7, #0] - 8037d24: 2b00 cmp r3, #0 - 8037d26: d105 bne.n 8037d34 - 8037d28: 4b0d ldr r3, [pc, #52] ; (8037d60 ) - 8037d2a: 22ff movs r2, #255 ; 0xff - 8037d2c: 490d ldr r1, [pc, #52] ; (8037d64 ) - 8037d2e: 480e ldr r0, [pc, #56] ; (8037d68 ) - 8037d30: f008 feee bl 8040b10 + 8037da6: 683b ldr r3, [r7, #0] + 8037da8: 2b00 cmp r3, #0 + 8037daa: d105 bne.n 8037db8 + 8037dac: 4b0d ldr r3, [pc, #52] ; (8037de4 ) + 8037dae: 22ff movs r2, #255 ; 0xff + 8037db0: 490d ldr r1, [pc, #52] ; (8037de8 ) + 8037db2: 480e ldr r0, [pc, #56] ; (8037dec ) + 8037db4: f008 feee bl 8040b94 for (pcb = list; pcb != NULL; pcb = pcb->next) { - 8037d34: 687b ldr r3, [r7, #4] - 8037d36: 60fb str r3, [r7, #12] - 8037d38: e00a b.n 8037d50 + 8037db8: 687b ldr r3, [r7, #4] + 8037dba: 60fb str r3, [r7, #12] + 8037dbc: e00a b.n 8037dd4 if (pcb->listener == lpcb) { - 8037d3a: 68fb ldr r3, [r7, #12] - 8037d3c: 6fdb ldr r3, [r3, #124] ; 0x7c - 8037d3e: 683a ldr r2, [r7, #0] - 8037d40: 429a cmp r2, r3 - 8037d42: d102 bne.n 8037d4a + 8037dbe: 68fb ldr r3, [r7, #12] + 8037dc0: 6fdb ldr r3, [r3, #124] ; 0x7c + 8037dc2: 683a ldr r2, [r7, #0] + 8037dc4: 429a cmp r2, r3 + 8037dc6: d102 bne.n 8037dce pcb->listener = NULL; - 8037d44: 68fb ldr r3, [r7, #12] - 8037d46: 2200 movs r2, #0 - 8037d48: 67da str r2, [r3, #124] ; 0x7c + 8037dc8: 68fb ldr r3, [r7, #12] + 8037dca: 2200 movs r2, #0 + 8037dcc: 67da str r2, [r3, #124] ; 0x7c for (pcb = list; pcb != NULL; pcb = pcb->next) { - 8037d4a: 68fb ldr r3, [r7, #12] - 8037d4c: 68db ldr r3, [r3, #12] - 8037d4e: 60fb str r3, [r7, #12] - 8037d50: 68fb ldr r3, [r7, #12] - 8037d52: 2b00 cmp r3, #0 - 8037d54: d1f1 bne.n 8037d3a + 8037dce: 68fb ldr r3, [r7, #12] + 8037dd0: 68db ldr r3, [r3, #12] + 8037dd2: 60fb str r3, [r7, #12] + 8037dd4: 68fb ldr r3, [r7, #12] + 8037dd6: 2b00 cmp r3, #0 + 8037dd8: d1f1 bne.n 8037dbe } } } - 8037d56: bf00 nop - 8037d58: bf00 nop - 8037d5a: 3710 adds r7, #16 - 8037d5c: 46bd mov sp, r7 - 8037d5e: bd80 pop {r7, pc} - 8037d60: 08042d98 .word 0x08042d98 - 8037d64: 08042e20 .word 0x08042e20 - 8037d68: 08042ddc .word 0x08042ddc + 8037dda: bf00 nop + 8037ddc: bf00 nop + 8037dde: 3710 adds r7, #16 + 8037de0: 46bd mov sp, r7 + 8037de2: bd80 pop {r7, pc} + 8037de4: 08042e18 .word 0x08042e18 + 8037de8: 08042ea0 .word 0x08042ea0 + 8037dec: 08042e5c .word 0x08042e5c -08037d6c : +08037df0 : /** Called when a listen pcb is closed. Iterates all pcb lists and removes the * closed listener pcb from pcb->listener if matching. */ static void tcp_listen_closed(struct tcp_pcb *pcb) { - 8037d6c: b580 push {r7, lr} - 8037d6e: b084 sub sp, #16 - 8037d70: af00 add r7, sp, #0 - 8037d72: 6078 str r0, [r7, #4] + 8037df0: b580 push {r7, lr} + 8037df2: b084 sub sp, #16 + 8037df4: af00 add r7, sp, #0 + 8037df6: 6078 str r0, [r7, #4] #if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG size_t i; LWIP_ASSERT("pcb != NULL", pcb != NULL); - 8037d74: 687b ldr r3, [r7, #4] - 8037d76: 2b00 cmp r3, #0 - 8037d78: d106 bne.n 8037d88 - 8037d7a: 4b14 ldr r3, [pc, #80] ; (8037dcc ) - 8037d7c: f240 1211 movw r2, #273 ; 0x111 - 8037d80: 4913 ldr r1, [pc, #76] ; (8037dd0 ) - 8037d82: 4814 ldr r0, [pc, #80] ; (8037dd4 ) - 8037d84: f008 fec4 bl 8040b10 + 8037df8: 687b ldr r3, [r7, #4] + 8037dfa: 2b00 cmp r3, #0 + 8037dfc: d106 bne.n 8037e0c + 8037dfe: 4b14 ldr r3, [pc, #80] ; (8037e50 ) + 8037e00: f240 1211 movw r2, #273 ; 0x111 + 8037e04: 4913 ldr r1, [pc, #76] ; (8037e54 ) + 8037e06: 4814 ldr r0, [pc, #80] ; (8037e58 ) + 8037e08: f008 fec4 bl 8040b94 LWIP_ASSERT("pcb->state == LISTEN", pcb->state == LISTEN); - 8037d88: 687b ldr r3, [r7, #4] - 8037d8a: 7d1b ldrb r3, [r3, #20] - 8037d8c: 2b01 cmp r3, #1 - 8037d8e: d006 beq.n 8037d9e - 8037d90: 4b0e ldr r3, [pc, #56] ; (8037dcc ) - 8037d92: f44f 7289 mov.w r2, #274 ; 0x112 - 8037d96: 4910 ldr r1, [pc, #64] ; (8037dd8 ) - 8037d98: 480e ldr r0, [pc, #56] ; (8037dd4 ) - 8037d9a: f008 feb9 bl 8040b10 + 8037e0c: 687b ldr r3, [r7, #4] + 8037e0e: 7d1b ldrb r3, [r3, #20] + 8037e10: 2b01 cmp r3, #1 + 8037e12: d006 beq.n 8037e22 + 8037e14: 4b0e ldr r3, [pc, #56] ; (8037e50 ) + 8037e16: f44f 7289 mov.w r2, #274 ; 0x112 + 8037e1a: 4910 ldr r1, [pc, #64] ; (8037e5c ) + 8037e1c: 480e ldr r0, [pc, #56] ; (8037e58 ) + 8037e1e: f008 feb9 bl 8040b94 for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) { - 8037d9e: 2301 movs r3, #1 - 8037da0: 60fb str r3, [r7, #12] - 8037da2: e00b b.n 8037dbc + 8037e22: 2301 movs r3, #1 + 8037e24: 60fb str r3, [r7, #12] + 8037e26: e00b b.n 8037e40 tcp_remove_listener(*tcp_pcb_lists[i], (struct tcp_pcb_listen *)pcb); - 8037da4: 4a0d ldr r2, [pc, #52] ; (8037ddc ) - 8037da6: 68fb ldr r3, [r7, #12] - 8037da8: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8037dac: 681b ldr r3, [r3, #0] - 8037dae: 6879 ldr r1, [r7, #4] - 8037db0: 4618 mov r0, r3 - 8037db2: f7ff ffb1 bl 8037d18 + 8037e28: 4a0d ldr r2, [pc, #52] ; (8037e60 ) + 8037e2a: 68fb ldr r3, [r7, #12] + 8037e2c: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8037e30: 681b ldr r3, [r3, #0] + 8037e32: 6879 ldr r1, [r7, #4] + 8037e34: 4618 mov r0, r3 + 8037e36: f7ff ffb1 bl 8037d9c for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) { - 8037db6: 68fb ldr r3, [r7, #12] - 8037db8: 3301 adds r3, #1 - 8037dba: 60fb str r3, [r7, #12] - 8037dbc: 68fb ldr r3, [r7, #12] - 8037dbe: 2b03 cmp r3, #3 - 8037dc0: d9f0 bls.n 8037da4 + 8037e3a: 68fb ldr r3, [r7, #12] + 8037e3c: 3301 adds r3, #1 + 8037e3e: 60fb str r3, [r7, #12] + 8037e40: 68fb ldr r3, [r7, #12] + 8037e42: 2b03 cmp r3, #3 + 8037e44: d9f0 bls.n 8037e28 } #endif LWIP_UNUSED_ARG(pcb); } - 8037dc2: bf00 nop - 8037dc4: bf00 nop - 8037dc6: 3710 adds r7, #16 - 8037dc8: 46bd mov sp, r7 - 8037dca: bd80 pop {r7, pc} - 8037dcc: 08042d98 .word 0x08042d98 - 8037dd0: 08042e48 .word 0x08042e48 - 8037dd4: 08042ddc .word 0x08042ddc - 8037dd8: 08042e54 .word 0x08042e54 - 8037ddc: 08044dd8 .word 0x08044dd8 - -08037de0 : + 8037e46: bf00 nop + 8037e48: bf00 nop + 8037e4a: 3710 adds r7, #16 + 8037e4c: 46bd mov sp, r7 + 8037e4e: bd80 pop {r7, pc} + 8037e50: 08042e18 .word 0x08042e18 + 8037e54: 08042ec8 .word 0x08042ec8 + 8037e58: 08042e5c .word 0x08042e5c + 8037e5c: 08042ed4 .word 0x08042ed4 + 8037e60: 08044e58 .word 0x08044e58 + +08037e64 : * @return ERR_OK if connection has been closed * another err_t if closing failed and pcb is not freed */ static err_t tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data) { - 8037de0: b5b0 push {r4, r5, r7, lr} - 8037de2: b088 sub sp, #32 - 8037de4: af04 add r7, sp, #16 - 8037de6: 6078 str r0, [r7, #4] - 8037de8: 460b mov r3, r1 - 8037dea: 70fb strb r3, [r7, #3] + 8037e64: b5b0 push {r4, r5, r7, lr} + 8037e66: b088 sub sp, #32 + 8037e68: af04 add r7, sp, #16 + 8037e6a: 6078 str r0, [r7, #4] + 8037e6c: 460b mov r3, r1 + 8037e6e: 70fb strb r3, [r7, #3] LWIP_ASSERT("tcp_close_shutdown: invalid pcb", pcb != NULL); - 8037dec: 687b ldr r3, [r7, #4] - 8037dee: 2b00 cmp r3, #0 - 8037df0: d106 bne.n 8037e00 - 8037df2: 4b63 ldr r3, [pc, #396] ; (8037f80 ) - 8037df4: f44f 72af mov.w r2, #350 ; 0x15e - 8037df8: 4962 ldr r1, [pc, #392] ; (8037f84 ) - 8037dfa: 4863 ldr r0, [pc, #396] ; (8037f88 ) - 8037dfc: f008 fe88 bl 8040b10 + 8037e70: 687b ldr r3, [r7, #4] + 8037e72: 2b00 cmp r3, #0 + 8037e74: d106 bne.n 8037e84 + 8037e76: 4b63 ldr r3, [pc, #396] ; (8038004 ) + 8037e78: f44f 72af mov.w r2, #350 ; 0x15e + 8037e7c: 4962 ldr r1, [pc, #392] ; (8038008 ) + 8037e7e: 4863 ldr r0, [pc, #396] ; (803800c ) + 8037e80: f008 fe88 bl 8040b94 if (rst_on_unacked_data && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) { - 8037e00: 78fb ldrb r3, [r7, #3] - 8037e02: 2b00 cmp r3, #0 - 8037e04: d066 beq.n 8037ed4 - 8037e06: 687b ldr r3, [r7, #4] - 8037e08: 7d1b ldrb r3, [r3, #20] - 8037e0a: 2b04 cmp r3, #4 - 8037e0c: d003 beq.n 8037e16 - 8037e0e: 687b ldr r3, [r7, #4] - 8037e10: 7d1b ldrb r3, [r3, #20] - 8037e12: 2b07 cmp r3, #7 - 8037e14: d15e bne.n 8037ed4 + 8037e84: 78fb ldrb r3, [r7, #3] + 8037e86: 2b00 cmp r3, #0 + 8037e88: d066 beq.n 8037f58 + 8037e8a: 687b ldr r3, [r7, #4] + 8037e8c: 7d1b ldrb r3, [r3, #20] + 8037e8e: 2b04 cmp r3, #4 + 8037e90: d003 beq.n 8037e9a + 8037e92: 687b ldr r3, [r7, #4] + 8037e94: 7d1b ldrb r3, [r3, #20] + 8037e96: 2b07 cmp r3, #7 + 8037e98: d15e bne.n 8037f58 if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND_MAX(pcb))) { - 8037e16: 687b ldr r3, [r7, #4] - 8037e18: 6f9b ldr r3, [r3, #120] ; 0x78 - 8037e1a: 2b00 cmp r3, #0 - 8037e1c: d104 bne.n 8037e28 - 8037e1e: 687b ldr r3, [r7, #4] - 8037e20: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8037e22: f5b3 6f06 cmp.w r3, #2144 ; 0x860 - 8037e26: d055 beq.n 8037ed4 + 8037e9a: 687b ldr r3, [r7, #4] + 8037e9c: 6f9b ldr r3, [r3, #120] ; 0x78 + 8037e9e: 2b00 cmp r3, #0 + 8037ea0: d104 bne.n 8037eac + 8037ea2: 687b ldr r3, [r7, #4] + 8037ea4: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8037ea6: f5b3 6f06 cmp.w r3, #2144 ; 0x860 + 8037eaa: d055 beq.n 8037f58 /* Not all data received by application, send RST to tell the remote side about this. */ LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED); - 8037e28: 687b ldr r3, [r7, #4] - 8037e2a: 8b5b ldrh r3, [r3, #26] - 8037e2c: f003 0310 and.w r3, r3, #16 - 8037e30: 2b00 cmp r3, #0 - 8037e32: d106 bne.n 8037e42 - 8037e34: 4b52 ldr r3, [pc, #328] ; (8037f80 ) - 8037e36: f44f 72b2 mov.w r2, #356 ; 0x164 - 8037e3a: 4954 ldr r1, [pc, #336] ; (8037f8c ) - 8037e3c: 4852 ldr r0, [pc, #328] ; (8037f88 ) - 8037e3e: f008 fe67 bl 8040b10 + 8037eac: 687b ldr r3, [r7, #4] + 8037eae: 8b5b ldrh r3, [r3, #26] + 8037eb0: f003 0310 and.w r3, r3, #16 + 8037eb4: 2b00 cmp r3, #0 + 8037eb6: d106 bne.n 8037ec6 + 8037eb8: 4b52 ldr r3, [pc, #328] ; (8038004 ) + 8037eba: f44f 72b2 mov.w r2, #356 ; 0x164 + 8037ebe: 4954 ldr r1, [pc, #336] ; (8038010 ) + 8037ec0: 4852 ldr r0, [pc, #328] ; (803800c ) + 8037ec2: f008 fe67 bl 8040b94 /* don't call tcp_abort here: we must not deallocate the pcb since that might not be expected when calling tcp_close */ tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip, - 8037e42: 687b ldr r3, [r7, #4] - 8037e44: 6d18 ldr r0, [r3, #80] ; 0x50 - 8037e46: 687b ldr r3, [r7, #4] - 8037e48: 6a5c ldr r4, [r3, #36] ; 0x24 - 8037e4a: 687d ldr r5, [r7, #4] - 8037e4c: 687b ldr r3, [r7, #4] - 8037e4e: 3304 adds r3, #4 - 8037e50: 687a ldr r2, [r7, #4] - 8037e52: 8ad2 ldrh r2, [r2, #22] - 8037e54: 6879 ldr r1, [r7, #4] - 8037e56: 8b09 ldrh r1, [r1, #24] - 8037e58: 9102 str r1, [sp, #8] - 8037e5a: 9201 str r2, [sp, #4] - 8037e5c: 9300 str r3, [sp, #0] - 8037e5e: 462b mov r3, r5 - 8037e60: 4622 mov r2, r4 - 8037e62: 4601 mov r1, r0 - 8037e64: 6878 ldr r0, [r7, #4] - 8037e66: f005 fd4d bl 803d904 + 8037ec6: 687b ldr r3, [r7, #4] + 8037ec8: 6d18 ldr r0, [r3, #80] ; 0x50 + 8037eca: 687b ldr r3, [r7, #4] + 8037ecc: 6a5c ldr r4, [r3, #36] ; 0x24 + 8037ece: 687d ldr r5, [r7, #4] + 8037ed0: 687b ldr r3, [r7, #4] + 8037ed2: 3304 adds r3, #4 + 8037ed4: 687a ldr r2, [r7, #4] + 8037ed6: 8ad2 ldrh r2, [r2, #22] + 8037ed8: 6879 ldr r1, [r7, #4] + 8037eda: 8b09 ldrh r1, [r1, #24] + 8037edc: 9102 str r1, [sp, #8] + 8037ede: 9201 str r2, [sp, #4] + 8037ee0: 9300 str r3, [sp, #0] + 8037ee2: 462b mov r3, r5 + 8037ee4: 4622 mov r2, r4 + 8037ee6: 4601 mov r1, r0 + 8037ee8: 6878 ldr r0, [r7, #4] + 8037eea: f005 fd4d bl 803d988 pcb->local_port, pcb->remote_port); tcp_pcb_purge(pcb); - 8037e6a: 6878 ldr r0, [r7, #4] - 8037e6c: f001 fb2a bl 80394c4 + 8037eee: 6878 ldr r0, [r7, #4] + 8037ef0: f001 fb2a bl 8039548 TCP_RMV_ACTIVE(pcb); - 8037e70: 4b47 ldr r3, [pc, #284] ; (8037f90 ) - 8037e72: 681b ldr r3, [r3, #0] - 8037e74: 687a ldr r2, [r7, #4] - 8037e76: 429a cmp r2, r3 - 8037e78: d105 bne.n 8037e86 - 8037e7a: 4b45 ldr r3, [pc, #276] ; (8037f90 ) - 8037e7c: 681b ldr r3, [r3, #0] - 8037e7e: 68db ldr r3, [r3, #12] - 8037e80: 4a43 ldr r2, [pc, #268] ; (8037f90 ) - 8037e82: 6013 str r3, [r2, #0] - 8037e84: e013 b.n 8037eae - 8037e86: 4b42 ldr r3, [pc, #264] ; (8037f90 ) - 8037e88: 681b ldr r3, [r3, #0] - 8037e8a: 60fb str r3, [r7, #12] - 8037e8c: e00c b.n 8037ea8 - 8037e8e: 68fb ldr r3, [r7, #12] - 8037e90: 68db ldr r3, [r3, #12] - 8037e92: 687a ldr r2, [r7, #4] - 8037e94: 429a cmp r2, r3 - 8037e96: d104 bne.n 8037ea2 - 8037e98: 687b ldr r3, [r7, #4] - 8037e9a: 68da ldr r2, [r3, #12] - 8037e9c: 68fb ldr r3, [r7, #12] - 8037e9e: 60da str r2, [r3, #12] - 8037ea0: e005 b.n 8037eae - 8037ea2: 68fb ldr r3, [r7, #12] - 8037ea4: 68db ldr r3, [r3, #12] - 8037ea6: 60fb str r3, [r7, #12] - 8037ea8: 68fb ldr r3, [r7, #12] - 8037eaa: 2b00 cmp r3, #0 - 8037eac: d1ef bne.n 8037e8e - 8037eae: 687b ldr r3, [r7, #4] - 8037eb0: 2200 movs r2, #0 - 8037eb2: 60da str r2, [r3, #12] - 8037eb4: 4b37 ldr r3, [pc, #220] ; (8037f94 ) - 8037eb6: 2201 movs r2, #1 - 8037eb8: 701a strb r2, [r3, #0] + 8037ef4: 4b47 ldr r3, [pc, #284] ; (8038014 ) + 8037ef6: 681b ldr r3, [r3, #0] + 8037ef8: 687a ldr r2, [r7, #4] + 8037efa: 429a cmp r2, r3 + 8037efc: d105 bne.n 8037f0a + 8037efe: 4b45 ldr r3, [pc, #276] ; (8038014 ) + 8037f00: 681b ldr r3, [r3, #0] + 8037f02: 68db ldr r3, [r3, #12] + 8037f04: 4a43 ldr r2, [pc, #268] ; (8038014 ) + 8037f06: 6013 str r3, [r2, #0] + 8037f08: e013 b.n 8037f32 + 8037f0a: 4b42 ldr r3, [pc, #264] ; (8038014 ) + 8037f0c: 681b ldr r3, [r3, #0] + 8037f0e: 60fb str r3, [r7, #12] + 8037f10: e00c b.n 8037f2c + 8037f12: 68fb ldr r3, [r7, #12] + 8037f14: 68db ldr r3, [r3, #12] + 8037f16: 687a ldr r2, [r7, #4] + 8037f18: 429a cmp r2, r3 + 8037f1a: d104 bne.n 8037f26 + 8037f1c: 687b ldr r3, [r7, #4] + 8037f1e: 68da ldr r2, [r3, #12] + 8037f20: 68fb ldr r3, [r7, #12] + 8037f22: 60da str r2, [r3, #12] + 8037f24: e005 b.n 8037f32 + 8037f26: 68fb ldr r3, [r7, #12] + 8037f28: 68db ldr r3, [r3, #12] + 8037f2a: 60fb str r3, [r7, #12] + 8037f2c: 68fb ldr r3, [r7, #12] + 8037f2e: 2b00 cmp r3, #0 + 8037f30: d1ef bne.n 8037f12 + 8037f32: 687b ldr r3, [r7, #4] + 8037f34: 2200 movs r2, #0 + 8037f36: 60da str r2, [r3, #12] + 8037f38: 4b37 ldr r3, [pc, #220] ; (8038018 ) + 8037f3a: 2201 movs r2, #1 + 8037f3c: 701a strb r2, [r3, #0] /* Deallocate the pcb since we already sent a RST for it */ if (tcp_input_pcb == pcb) { - 8037eba: 4b37 ldr r3, [pc, #220] ; (8037f98 ) - 8037ebc: 681b ldr r3, [r3, #0] - 8037ebe: 687a ldr r2, [r7, #4] - 8037ec0: 429a cmp r2, r3 - 8037ec2: d102 bne.n 8037eca + 8037f3e: 4b37 ldr r3, [pc, #220] ; (803801c ) + 8037f40: 681b ldr r3, [r3, #0] + 8037f42: 687a ldr r2, [r7, #4] + 8037f44: 429a cmp r2, r3 + 8037f46: d102 bne.n 8037f4e /* prevent using a deallocated pcb: free it from tcp_input later */ tcp_trigger_input_pcb_close(); - 8037ec4: f003 ffc2 bl 803be4c - 8037ec8: e002 b.n 8037ed0 + 8037f48: f003 ffc2 bl 803bed0 + 8037f4c: e002 b.n 8037f54 } else { tcp_free(pcb); - 8037eca: 6878 ldr r0, [r7, #4] - 8037ecc: f7ff fed6 bl 8037c7c + 8037f4e: 6878 ldr r0, [r7, #4] + 8037f50: f7ff fed6 bl 8037d00 } return ERR_OK; - 8037ed0: 2300 movs r3, #0 - 8037ed2: e050 b.n 8037f76 + 8037f54: 2300 movs r3, #0 + 8037f56: e050 b.n 8037ffa } } /* - states which free the pcb are handled here, - states which send FIN and change state are handled in tcp_close_shutdown_fin() */ switch (pcb->state) { - 8037ed4: 687b ldr r3, [r7, #4] - 8037ed6: 7d1b ldrb r3, [r3, #20] - 8037ed8: 2b02 cmp r3, #2 - 8037eda: d03b beq.n 8037f54 - 8037edc: 2b02 cmp r3, #2 - 8037ede: dc44 bgt.n 8037f6a - 8037ee0: 2b00 cmp r3, #0 - 8037ee2: d002 beq.n 8037eea - 8037ee4: 2b01 cmp r3, #1 - 8037ee6: d02a beq.n 8037f3e - 8037ee8: e03f b.n 8037f6a + 8037f58: 687b ldr r3, [r7, #4] + 8037f5a: 7d1b ldrb r3, [r3, #20] + 8037f5c: 2b02 cmp r3, #2 + 8037f5e: d03b beq.n 8037fd8 + 8037f60: 2b02 cmp r3, #2 + 8037f62: dc44 bgt.n 8037fee + 8037f64: 2b00 cmp r3, #0 + 8037f66: d002 beq.n 8037f6e + 8037f68: 2b01 cmp r3, #1 + 8037f6a: d02a beq.n 8037fc2 + 8037f6c: e03f b.n 8037fee * and the user needs some way to free it should the need arise. * Calling tcp_close() with a pcb that has already been closed, (i.e. twice) * or for a pcb that has been used and then entered the CLOSED state * is erroneous, but this should never happen as the pcb has in those cases * been freed, and so any remaining handles are bogus. */ if (pcb->local_port != 0) { - 8037eea: 687b ldr r3, [r7, #4] - 8037eec: 8adb ldrh r3, [r3, #22] - 8037eee: 2b00 cmp r3, #0 - 8037ef0: d021 beq.n 8037f36 + 8037f6e: 687b ldr r3, [r7, #4] + 8037f70: 8adb ldrh r3, [r3, #22] + 8037f72: 2b00 cmp r3, #0 + 8037f74: d021 beq.n 8037fba TCP_RMV(&tcp_bound_pcbs, pcb); - 8037ef2: 4b2a ldr r3, [pc, #168] ; (8037f9c ) - 8037ef4: 681b ldr r3, [r3, #0] - 8037ef6: 687a ldr r2, [r7, #4] - 8037ef8: 429a cmp r2, r3 - 8037efa: d105 bne.n 8037f08 - 8037efc: 4b27 ldr r3, [pc, #156] ; (8037f9c ) - 8037efe: 681b ldr r3, [r3, #0] - 8037f00: 68db ldr r3, [r3, #12] - 8037f02: 4a26 ldr r2, [pc, #152] ; (8037f9c ) - 8037f04: 6013 str r3, [r2, #0] - 8037f06: e013 b.n 8037f30 - 8037f08: 4b24 ldr r3, [pc, #144] ; (8037f9c ) - 8037f0a: 681b ldr r3, [r3, #0] - 8037f0c: 60bb str r3, [r7, #8] - 8037f0e: e00c b.n 8037f2a - 8037f10: 68bb ldr r3, [r7, #8] - 8037f12: 68db ldr r3, [r3, #12] - 8037f14: 687a ldr r2, [r7, #4] - 8037f16: 429a cmp r2, r3 - 8037f18: d104 bne.n 8037f24 - 8037f1a: 687b ldr r3, [r7, #4] - 8037f1c: 68da ldr r2, [r3, #12] - 8037f1e: 68bb ldr r3, [r7, #8] - 8037f20: 60da str r2, [r3, #12] - 8037f22: e005 b.n 8037f30 - 8037f24: 68bb ldr r3, [r7, #8] - 8037f26: 68db ldr r3, [r3, #12] - 8037f28: 60bb str r3, [r7, #8] - 8037f2a: 68bb ldr r3, [r7, #8] - 8037f2c: 2b00 cmp r3, #0 - 8037f2e: d1ef bne.n 8037f10 - 8037f30: 687b ldr r3, [r7, #4] - 8037f32: 2200 movs r2, #0 - 8037f34: 60da str r2, [r3, #12] + 8037f76: 4b2a ldr r3, [pc, #168] ; (8038020 ) + 8037f78: 681b ldr r3, [r3, #0] + 8037f7a: 687a ldr r2, [r7, #4] + 8037f7c: 429a cmp r2, r3 + 8037f7e: d105 bne.n 8037f8c + 8037f80: 4b27 ldr r3, [pc, #156] ; (8038020 ) + 8037f82: 681b ldr r3, [r3, #0] + 8037f84: 68db ldr r3, [r3, #12] + 8037f86: 4a26 ldr r2, [pc, #152] ; (8038020 ) + 8037f88: 6013 str r3, [r2, #0] + 8037f8a: e013 b.n 8037fb4 + 8037f8c: 4b24 ldr r3, [pc, #144] ; (8038020 ) + 8037f8e: 681b ldr r3, [r3, #0] + 8037f90: 60bb str r3, [r7, #8] + 8037f92: e00c b.n 8037fae + 8037f94: 68bb ldr r3, [r7, #8] + 8037f96: 68db ldr r3, [r3, #12] + 8037f98: 687a ldr r2, [r7, #4] + 8037f9a: 429a cmp r2, r3 + 8037f9c: d104 bne.n 8037fa8 + 8037f9e: 687b ldr r3, [r7, #4] + 8037fa0: 68da ldr r2, [r3, #12] + 8037fa2: 68bb ldr r3, [r7, #8] + 8037fa4: 60da str r2, [r3, #12] + 8037fa6: e005 b.n 8037fb4 + 8037fa8: 68bb ldr r3, [r7, #8] + 8037faa: 68db ldr r3, [r3, #12] + 8037fac: 60bb str r3, [r7, #8] + 8037fae: 68bb ldr r3, [r7, #8] + 8037fb0: 2b00 cmp r3, #0 + 8037fb2: d1ef bne.n 8037f94 + 8037fb4: 687b ldr r3, [r7, #4] + 8037fb6: 2200 movs r2, #0 + 8037fb8: 60da str r2, [r3, #12] } tcp_free(pcb); - 8037f36: 6878 ldr r0, [r7, #4] - 8037f38: f7ff fea0 bl 8037c7c + 8037fba: 6878 ldr r0, [r7, #4] + 8037fbc: f7ff fea0 bl 8037d00 break; - 8037f3c: e01a b.n 8037f74 + 8037fc0: e01a b.n 8037ff8 case LISTEN: tcp_listen_closed(pcb); - 8037f3e: 6878 ldr r0, [r7, #4] - 8037f40: f7ff ff14 bl 8037d6c + 8037fc2: 6878 ldr r0, [r7, #4] + 8037fc4: f7ff ff14 bl 8037df0 tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb); - 8037f44: 6879 ldr r1, [r7, #4] - 8037f46: 4816 ldr r0, [pc, #88] ; (8037fa0 ) - 8037f48: f001 fb0c bl 8039564 + 8037fc8: 6879 ldr r1, [r7, #4] + 8037fca: 4816 ldr r0, [pc, #88] ; (8038024 ) + 8037fcc: f001 fb0c bl 80395e8 tcp_free_listen(pcb); - 8037f4c: 6878 ldr r0, [r7, #4] - 8037f4e: f7ff feb1 bl 8037cb4 + 8037fd0: 6878 ldr r0, [r7, #4] + 8037fd2: f7ff feb1 bl 8037d38 break; - 8037f52: e00f b.n 8037f74 + 8037fd6: e00f b.n 8037ff8 case SYN_SENT: TCP_PCB_REMOVE_ACTIVE(pcb); - 8037f54: 6879 ldr r1, [r7, #4] - 8037f56: 480e ldr r0, [pc, #56] ; (8037f90 ) - 8037f58: f001 fb04 bl 8039564 - 8037f5c: 4b0d ldr r3, [pc, #52] ; (8037f94 ) - 8037f5e: 2201 movs r2, #1 - 8037f60: 701a strb r2, [r3, #0] + 8037fd8: 6879 ldr r1, [r7, #4] + 8037fda: 480e ldr r0, [pc, #56] ; (8038014 ) + 8037fdc: f001 fb04 bl 80395e8 + 8037fe0: 4b0d ldr r3, [pc, #52] ; (8038018 ) + 8037fe2: 2201 movs r2, #1 + 8037fe4: 701a strb r2, [r3, #0] tcp_free(pcb); - 8037f62: 6878 ldr r0, [r7, #4] - 8037f64: f7ff fe8a bl 8037c7c + 8037fe6: 6878 ldr r0, [r7, #4] + 8037fe8: f7ff fe8a bl 8037d00 MIB2_STATS_INC(mib2.tcpattemptfails); break; - 8037f68: e004 b.n 8037f74 + 8037fec: e004 b.n 8037ff8 default: return tcp_close_shutdown_fin(pcb); - 8037f6a: 6878 ldr r0, [r7, #4] - 8037f6c: f000 f81a bl 8037fa4 - 8037f70: 4603 mov r3, r0 - 8037f72: e000 b.n 8037f76 + 8037fee: 6878 ldr r0, [r7, #4] + 8037ff0: f000 f81a bl 8038028 + 8037ff4: 4603 mov r3, r0 + 8037ff6: e000 b.n 8037ffa } return ERR_OK; - 8037f74: 2300 movs r3, #0 -} - 8037f76: 4618 mov r0, r3 - 8037f78: 3710 adds r7, #16 - 8037f7a: 46bd mov sp, r7 - 8037f7c: bdb0 pop {r4, r5, r7, pc} - 8037f7e: bf00 nop - 8037f80: 08042d98 .word 0x08042d98 - 8037f84: 08042e6c .word 0x08042e6c - 8037f88: 08042ddc .word 0x08042ddc - 8037f8c: 08042e8c .word 0x08042e8c - 8037f90: 2400e964 .word 0x2400e964 - 8037f94: 2400e96c .word 0x2400e96c - 8037f98: 2400e9a4 .word 0x2400e9a4 - 8037f9c: 2400e95c .word 0x2400e95c - 8037fa0: 2400e960 .word 0x2400e960 - -08037fa4 : + 8037ff8: 2300 movs r3, #0 +} + 8037ffa: 4618 mov r0, r3 + 8037ffc: 3710 adds r7, #16 + 8037ffe: 46bd mov sp, r7 + 8038000: bdb0 pop {r4, r5, r7, pc} + 8038002: bf00 nop + 8038004: 08042e18 .word 0x08042e18 + 8038008: 08042eec .word 0x08042eec + 803800c: 08042e5c .word 0x08042e5c + 8038010: 08042f0c .word 0x08042f0c + 8038014: 2400e96c .word 0x2400e96c + 8038018: 2400e974 .word 0x2400e974 + 803801c: 2400e9ac .word 0x2400e9ac + 8038020: 2400e964 .word 0x2400e964 + 8038024: 2400e968 .word 0x2400e968 + +08038028 : static err_t tcp_close_shutdown_fin(struct tcp_pcb *pcb) { - 8037fa4: b580 push {r7, lr} - 8037fa6: b084 sub sp, #16 - 8037fa8: af00 add r7, sp, #0 - 8037faa: 6078 str r0, [r7, #4] + 8038028: b580 push {r7, lr} + 803802a: b084 sub sp, #16 + 803802c: af00 add r7, sp, #0 + 803802e: 6078 str r0, [r7, #4] err_t err; LWIP_ASSERT("pcb != NULL", pcb != NULL); - 8037fac: 687b ldr r3, [r7, #4] - 8037fae: 2b00 cmp r3, #0 - 8037fb0: d106 bne.n 8037fc0 - 8037fb2: 4b2e ldr r3, [pc, #184] ; (803806c ) - 8037fb4: f44f 72ce mov.w r2, #412 ; 0x19c - 8037fb8: 492d ldr r1, [pc, #180] ; (8038070 ) - 8037fba: 482e ldr r0, [pc, #184] ; (8038074 ) - 8037fbc: f008 fda8 bl 8040b10 + 8038030: 687b ldr r3, [r7, #4] + 8038032: 2b00 cmp r3, #0 + 8038034: d106 bne.n 8038044 + 8038036: 4b2e ldr r3, [pc, #184] ; (80380f0 ) + 8038038: f44f 72ce mov.w r2, #412 ; 0x19c + 803803c: 492d ldr r1, [pc, #180] ; (80380f4 ) + 803803e: 482e ldr r0, [pc, #184] ; (80380f8 ) + 8038040: f008 fda8 bl 8040b94 switch (pcb->state) { - 8037fc0: 687b ldr r3, [r7, #4] - 8037fc2: 7d1b ldrb r3, [r3, #20] - 8037fc4: 2b07 cmp r3, #7 - 8037fc6: d020 beq.n 803800a - 8037fc8: 2b07 cmp r3, #7 - 8037fca: dc2b bgt.n 8038024 - 8037fcc: 2b03 cmp r3, #3 - 8037fce: d002 beq.n 8037fd6 - 8037fd0: 2b04 cmp r3, #4 - 8037fd2: d00d beq.n 8037ff0 - 8037fd4: e026 b.n 8038024 + 8038044: 687b ldr r3, [r7, #4] + 8038046: 7d1b ldrb r3, [r3, #20] + 8038048: 2b07 cmp r3, #7 + 803804a: d020 beq.n 803808e + 803804c: 2b07 cmp r3, #7 + 803804e: dc2b bgt.n 80380a8 + 8038050: 2b03 cmp r3, #3 + 8038052: d002 beq.n 803805a + 8038054: 2b04 cmp r3, #4 + 8038056: d00d beq.n 8038074 + 8038058: e026 b.n 80380a8 case SYN_RCVD: err = tcp_send_fin(pcb); - 8037fd6: 6878 ldr r0, [r7, #4] - 8037fd8: f004 fda2 bl 803cb20 - 8037fdc: 4603 mov r3, r0 - 8037fde: 73fb strb r3, [r7, #15] + 803805a: 6878 ldr r0, [r7, #4] + 803805c: f004 fda2 bl 803cba4 + 8038060: 4603 mov r3, r0 + 8038062: 73fb strb r3, [r7, #15] if (err == ERR_OK) { - 8037fe0: f997 300f ldrsb.w r3, [r7, #15] - 8037fe4: 2b00 cmp r3, #0 - 8037fe6: d11f bne.n 8038028 + 8038064: f997 300f ldrsb.w r3, [r7, #15] + 8038068: 2b00 cmp r3, #0 + 803806a: d11f bne.n 80380ac tcp_backlog_accepted(pcb); MIB2_STATS_INC(mib2.tcpattemptfails); pcb->state = FIN_WAIT_1; - 8037fe8: 687b ldr r3, [r7, #4] - 8037fea: 2205 movs r2, #5 - 8037fec: 751a strb r2, [r3, #20] + 803806c: 687b ldr r3, [r7, #4] + 803806e: 2205 movs r2, #5 + 8038070: 751a strb r2, [r3, #20] } break; - 8037fee: e01b b.n 8038028 + 8038072: e01b b.n 80380ac case ESTABLISHED: err = tcp_send_fin(pcb); - 8037ff0: 6878 ldr r0, [r7, #4] - 8037ff2: f004 fd95 bl 803cb20 - 8037ff6: 4603 mov r3, r0 - 8037ff8: 73fb strb r3, [r7, #15] + 8038074: 6878 ldr r0, [r7, #4] + 8038076: f004 fd95 bl 803cba4 + 803807a: 4603 mov r3, r0 + 803807c: 73fb strb r3, [r7, #15] if (err == ERR_OK) { - 8037ffa: f997 300f ldrsb.w r3, [r7, #15] - 8037ffe: 2b00 cmp r3, #0 - 8038000: d114 bne.n 803802c + 803807e: f997 300f ldrsb.w r3, [r7, #15] + 8038082: 2b00 cmp r3, #0 + 8038084: d114 bne.n 80380b0 MIB2_STATS_INC(mib2.tcpestabresets); pcb->state = FIN_WAIT_1; - 8038002: 687b ldr r3, [r7, #4] - 8038004: 2205 movs r2, #5 - 8038006: 751a strb r2, [r3, #20] + 8038086: 687b ldr r3, [r7, #4] + 8038088: 2205 movs r2, #5 + 803808a: 751a strb r2, [r3, #20] } break; - 8038008: e010 b.n 803802c + 803808c: e010 b.n 80380b0 case CLOSE_WAIT: err = tcp_send_fin(pcb); - 803800a: 6878 ldr r0, [r7, #4] - 803800c: f004 fd88 bl 803cb20 - 8038010: 4603 mov r3, r0 - 8038012: 73fb strb r3, [r7, #15] + 803808e: 6878 ldr r0, [r7, #4] + 8038090: f004 fd88 bl 803cba4 + 8038094: 4603 mov r3, r0 + 8038096: 73fb strb r3, [r7, #15] if (err == ERR_OK) { - 8038014: f997 300f ldrsb.w r3, [r7, #15] - 8038018: 2b00 cmp r3, #0 - 803801a: d109 bne.n 8038030 + 8038098: f997 300f ldrsb.w r3, [r7, #15] + 803809c: 2b00 cmp r3, #0 + 803809e: d109 bne.n 80380b4 MIB2_STATS_INC(mib2.tcpestabresets); pcb->state = LAST_ACK; - 803801c: 687b ldr r3, [r7, #4] - 803801e: 2209 movs r2, #9 - 8038020: 751a strb r2, [r3, #20] + 80380a0: 687b ldr r3, [r7, #4] + 80380a2: 2209 movs r2, #9 + 80380a4: 751a strb r2, [r3, #20] } break; - 8038022: e005 b.n 8038030 + 80380a6: e005 b.n 80380b4 default: /* Has already been closed, do nothing. */ return ERR_OK; - 8038024: 2300 movs r3, #0 - 8038026: e01c b.n 8038062 + 80380a8: 2300 movs r3, #0 + 80380aa: e01c b.n 80380e6 break; - 8038028: bf00 nop - 803802a: e002 b.n 8038032 + 80380ac: bf00 nop + 80380ae: e002 b.n 80380b6 break; - 803802c: bf00 nop - 803802e: e000 b.n 8038032 + 80380b0: bf00 nop + 80380b2: e000 b.n 80380b6 break; - 8038030: bf00 nop + 80380b4: bf00 nop } if (err == ERR_OK) { - 8038032: f997 300f ldrsb.w r3, [r7, #15] - 8038036: 2b00 cmp r3, #0 - 8038038: d103 bne.n 8038042 + 80380b6: f997 300f ldrsb.w r3, [r7, #15] + 80380ba: 2b00 cmp r3, #0 + 80380bc: d103 bne.n 80380c6 /* To ensure all data has been sent when tcp_close returns, we have to make sure tcp_output doesn't fail. Since we don't really have to ensure all data has been sent when tcp_close returns (unsent data is sent from tcp timer functions, also), we don't care for the return value of tcp_output for now. */ tcp_output(pcb); - 803803a: 6878 ldr r0, [r7, #4] - 803803c: f004 feae bl 803cd9c - 8038040: e00d b.n 803805e + 80380be: 6878 ldr r0, [r7, #4] + 80380c0: f004 feae bl 803ce20 + 80380c4: e00d b.n 80380e2 } else if (err == ERR_MEM) { - 8038042: f997 300f ldrsb.w r3, [r7, #15] - 8038046: f1b3 3fff cmp.w r3, #4294967295 - 803804a: d108 bne.n 803805e + 80380c6: f997 300f ldrsb.w r3, [r7, #15] + 80380ca: f1b3 3fff cmp.w r3, #4294967295 + 80380ce: d108 bne.n 80380e2 /* Mark this pcb for closing. Closing is retried from tcp_tmr. */ tcp_set_flags(pcb, TF_CLOSEPEND); - 803804c: 687b ldr r3, [r7, #4] - 803804e: 8b5b ldrh r3, [r3, #26] - 8038050: f043 0308 orr.w r3, r3, #8 - 8038054: b29a uxth r2, r3 - 8038056: 687b ldr r3, [r7, #4] - 8038058: 835a strh r2, [r3, #26] + 80380d0: 687b ldr r3, [r7, #4] + 80380d2: 8b5b ldrh r3, [r3, #26] + 80380d4: f043 0308 orr.w r3, r3, #8 + 80380d8: b29a uxth r2, r3 + 80380da: 687b ldr r3, [r7, #4] + 80380dc: 835a strh r2, [r3, #26] /* We have to return ERR_OK from here to indicate to the callers that this pcb should not be used any more as it will be freed soon via tcp_tmr. This is OK here since sending FIN does not guarantee a time frime for actually freeing the pcb, either (it is left in closure states for remote ACK or timeout) */ return ERR_OK; - 803805a: 2300 movs r3, #0 - 803805c: e001 b.n 8038062 + 80380de: 2300 movs r3, #0 + 80380e0: e001 b.n 80380e6 } return err; - 803805e: f997 300f ldrsb.w r3, [r7, #15] -} - 8038062: 4618 mov r0, r3 - 8038064: 3710 adds r7, #16 - 8038066: 46bd mov sp, r7 - 8038068: bd80 pop {r7, pc} - 803806a: bf00 nop - 803806c: 08042d98 .word 0x08042d98 - 8038070: 08042e48 .word 0x08042e48 - 8038074: 08042ddc .word 0x08042ddc - -08038078 : + 80380e2: f997 300f ldrsb.w r3, [r7, #15] +} + 80380e6: 4618 mov r0, r3 + 80380e8: 3710 adds r7, #16 + 80380ea: 46bd mov sp, r7 + 80380ec: bd80 pop {r7, pc} + 80380ee: bf00 nop + 80380f0: 08042e18 .word 0x08042e18 + 80380f4: 08042ec8 .word 0x08042ec8 + 80380f8: 08042e5c .word 0x08042e5c + +080380fc : * @return ERR_OK if connection has been closed * another err_t if closing failed and pcb is not freed */ err_t tcp_close(struct tcp_pcb *pcb) { - 8038078: b580 push {r7, lr} - 803807a: b082 sub sp, #8 - 803807c: af00 add r7, sp, #0 - 803807e: 6078 str r0, [r7, #4] + 80380fc: b580 push {r7, lr} + 80380fe: b082 sub sp, #8 + 8038100: af00 add r7, sp, #0 + 8038102: 6078 str r0, [r7, #4] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_close: invalid pcb", pcb != NULL, return ERR_ARG); - 8038080: 687b ldr r3, [r7, #4] - 8038082: 2b00 cmp r3, #0 - 8038084: d109 bne.n 803809a - 8038086: 4b0f ldr r3, [pc, #60] ; (80380c4 ) - 8038088: f44f 72f4 mov.w r2, #488 ; 0x1e8 - 803808c: 490e ldr r1, [pc, #56] ; (80380c8 ) - 803808e: 480f ldr r0, [pc, #60] ; (80380cc ) - 8038090: f008 fd3e bl 8040b10 - 8038094: f06f 030f mvn.w r3, #15 - 8038098: e00f b.n 80380ba + 8038104: 687b ldr r3, [r7, #4] + 8038106: 2b00 cmp r3, #0 + 8038108: d109 bne.n 803811e + 803810a: 4b0f ldr r3, [pc, #60] ; (8038148 ) + 803810c: f44f 72f4 mov.w r2, #488 ; 0x1e8 + 8038110: 490e ldr r1, [pc, #56] ; (803814c ) + 8038112: 480f ldr r0, [pc, #60] ; (8038150 ) + 8038114: f008 fd3e bl 8040b94 + 8038118: f06f 030f mvn.w r3, #15 + 803811c: e00f b.n 803813e LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in ")); tcp_debug_print_state(pcb->state); if (pcb->state != LISTEN) { - 803809a: 687b ldr r3, [r7, #4] - 803809c: 7d1b ldrb r3, [r3, #20] - 803809e: 2b01 cmp r3, #1 - 80380a0: d006 beq.n 80380b0 + 803811e: 687b ldr r3, [r7, #4] + 8038120: 7d1b ldrb r3, [r3, #20] + 8038122: 2b01 cmp r3, #1 + 8038124: d006 beq.n 8038134 /* Set a flag not to receive any more data... */ tcp_set_flags(pcb, TF_RXCLOSED); - 80380a2: 687b ldr r3, [r7, #4] - 80380a4: 8b5b ldrh r3, [r3, #26] - 80380a6: f043 0310 orr.w r3, r3, #16 - 80380aa: b29a uxth r2, r3 - 80380ac: 687b ldr r3, [r7, #4] - 80380ae: 835a strh r2, [r3, #26] + 8038126: 687b ldr r3, [r7, #4] + 8038128: 8b5b ldrh r3, [r3, #26] + 803812a: f043 0310 orr.w r3, r3, #16 + 803812e: b29a uxth r2, r3 + 8038130: 687b ldr r3, [r7, #4] + 8038132: 835a strh r2, [r3, #26] } /* ... and close */ return tcp_close_shutdown(pcb, 1); - 80380b0: 2101 movs r1, #1 - 80380b2: 6878 ldr r0, [r7, #4] - 80380b4: f7ff fe94 bl 8037de0 - 80380b8: 4603 mov r3, r0 -} - 80380ba: 4618 mov r0, r3 - 80380bc: 3708 adds r7, #8 - 80380be: 46bd mov sp, r7 - 80380c0: bd80 pop {r7, pc} - 80380c2: bf00 nop - 80380c4: 08042d98 .word 0x08042d98 - 80380c8: 08042ea8 .word 0x08042ea8 - 80380cc: 08042ddc .word 0x08042ddc - -080380d0 : + 8038134: 2101 movs r1, #1 + 8038136: 6878 ldr r0, [r7, #4] + 8038138: f7ff fe94 bl 8037e64 + 803813c: 4603 mov r3, r0 +} + 803813e: 4618 mov r0, r3 + 8038140: 3708 adds r7, #8 + 8038142: 46bd mov sp, r7 + 8038144: bd80 pop {r7, pc} + 8038146: bf00 nop + 8038148: 08042e18 .word 0x08042e18 + 803814c: 08042f28 .word 0x08042f28 + 8038150: 08042e5c .word 0x08042e5c + +08038154 : * @param pcb the tcp_pcb to abort * @param reset boolean to indicate whether a reset should be sent */ void tcp_abandon(struct tcp_pcb *pcb, int reset) { - 80380d0: b580 push {r7, lr} - 80380d2: b08e sub sp, #56 ; 0x38 - 80380d4: af04 add r7, sp, #16 - 80380d6: 6078 str r0, [r7, #4] - 80380d8: 6039 str r1, [r7, #0] + 8038154: b580 push {r7, lr} + 8038156: b08e sub sp, #56 ; 0x38 + 8038158: af04 add r7, sp, #16 + 803815a: 6078 str r0, [r7, #4] + 803815c: 6039 str r1, [r7, #0] #endif /* LWIP_CALLBACK_API */ void *errf_arg; LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_abandon: invalid pcb", pcb != NULL, return); - 80380da: 687b ldr r3, [r7, #4] - 80380dc: 2b00 cmp r3, #0 - 80380de: d107 bne.n 80380f0 - 80380e0: 4b52 ldr r3, [pc, #328] ; (803822c ) - 80380e2: f240 223d movw r2, #573 ; 0x23d - 80380e6: 4952 ldr r1, [pc, #328] ; (8038230 ) - 80380e8: 4852 ldr r0, [pc, #328] ; (8038234 ) - 80380ea: f008 fd11 bl 8040b10 - 80380ee: e099 b.n 8038224 + 803815e: 687b ldr r3, [r7, #4] + 8038160: 2b00 cmp r3, #0 + 8038162: d107 bne.n 8038174 + 8038164: 4b52 ldr r3, [pc, #328] ; (80382b0 ) + 8038166: f240 223d movw r2, #573 ; 0x23d + 803816a: 4952 ldr r1, [pc, #328] ; (80382b4 ) + 803816c: 4852 ldr r0, [pc, #328] ; (80382b8 ) + 803816e: f008 fd11 bl 8040b94 + 8038172: e099 b.n 80382a8 /* pcb->state LISTEN not allowed here */ LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs", - 80380f0: 687b ldr r3, [r7, #4] - 80380f2: 7d1b ldrb r3, [r3, #20] - 80380f4: 2b01 cmp r3, #1 - 80380f6: d106 bne.n 8038106 - 80380f8: 4b4c ldr r3, [pc, #304] ; (803822c ) - 80380fa: f44f 7210 mov.w r2, #576 ; 0x240 - 80380fe: 494e ldr r1, [pc, #312] ; (8038238 ) - 8038100: 484c ldr r0, [pc, #304] ; (8038234 ) - 8038102: f008 fd05 bl 8040b10 + 8038174: 687b ldr r3, [r7, #4] + 8038176: 7d1b ldrb r3, [r3, #20] + 8038178: 2b01 cmp r3, #1 + 803817a: d106 bne.n 803818a + 803817c: 4b4c ldr r3, [pc, #304] ; (80382b0 ) + 803817e: f44f 7210 mov.w r2, #576 ; 0x240 + 8038182: 494e ldr r1, [pc, #312] ; (80382bc ) + 8038184: 484c ldr r0, [pc, #304] ; (80382b8 ) + 8038186: f008 fd05 bl 8040b94 pcb->state != LISTEN); /* Figure out on which TCP PCB list we are, and remove us. If we are in an active state, call the receive function associated with the PCB with a NULL argument, and send an RST to the remote end. */ if (pcb->state == TIME_WAIT) { - 8038106: 687b ldr r3, [r7, #4] - 8038108: 7d1b ldrb r3, [r3, #20] - 803810a: 2b0a cmp r3, #10 - 803810c: d107 bne.n 803811e + 803818a: 687b ldr r3, [r7, #4] + 803818c: 7d1b ldrb r3, [r3, #20] + 803818e: 2b0a cmp r3, #10 + 8038190: d107 bne.n 80381a2 tcp_pcb_remove(&tcp_tw_pcbs, pcb); - 803810e: 6879 ldr r1, [r7, #4] - 8038110: 484a ldr r0, [pc, #296] ; (803823c ) - 8038112: f001 fa27 bl 8039564 + 8038192: 6879 ldr r1, [r7, #4] + 8038194: 484a ldr r0, [pc, #296] ; (80382c0 ) + 8038196: f001 fa27 bl 80395e8 tcp_free(pcb); - 8038116: 6878 ldr r0, [r7, #4] - 8038118: f7ff fdb0 bl 8037c7c - 803811c: e082 b.n 8038224 + 803819a: 6878 ldr r0, [r7, #4] + 803819c: f7ff fdb0 bl 8037d00 + 80381a0: e082 b.n 80382a8 } else { int send_rst = 0; - 803811e: 2300 movs r3, #0 - 8038120: 627b str r3, [r7, #36] ; 0x24 + 80381a2: 2300 movs r3, #0 + 80381a4: 627b str r3, [r7, #36] ; 0x24 u16_t local_port = 0; - 8038122: 2300 movs r3, #0 - 8038124: 847b strh r3, [r7, #34] ; 0x22 + 80381a6: 2300 movs r3, #0 + 80381a8: 847b strh r3, [r7, #34] ; 0x22 enum tcp_state last_state; seqno = pcb->snd_nxt; - 8038126: 687b ldr r3, [r7, #4] - 8038128: 6d1b ldr r3, [r3, #80] ; 0x50 - 803812a: 61bb str r3, [r7, #24] + 80381aa: 687b ldr r3, [r7, #4] + 80381ac: 6d1b ldr r3, [r3, #80] ; 0x50 + 80381ae: 61bb str r3, [r7, #24] ackno = pcb->rcv_nxt; - 803812c: 687b ldr r3, [r7, #4] - 803812e: 6a5b ldr r3, [r3, #36] ; 0x24 - 8038130: 617b str r3, [r7, #20] + 80381b0: 687b ldr r3, [r7, #4] + 80381b2: 6a5b ldr r3, [r3, #36] ; 0x24 + 80381b4: 617b str r3, [r7, #20] #if LWIP_CALLBACK_API errf = pcb->errf; - 8038132: 687b ldr r3, [r7, #4] - 8038134: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8038138: 613b str r3, [r7, #16] + 80381b6: 687b ldr r3, [r7, #4] + 80381b8: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 80381bc: 613b str r3, [r7, #16] #endif /* LWIP_CALLBACK_API */ errf_arg = pcb->callback_arg; - 803813a: 687b ldr r3, [r7, #4] - 803813c: 691b ldr r3, [r3, #16] - 803813e: 60fb str r3, [r7, #12] + 80381be: 687b ldr r3, [r7, #4] + 80381c0: 691b ldr r3, [r3, #16] + 80381c2: 60fb str r3, [r7, #12] if (pcb->state == CLOSED) { - 8038140: 687b ldr r3, [r7, #4] - 8038142: 7d1b ldrb r3, [r3, #20] - 8038144: 2b00 cmp r3, #0 - 8038146: d126 bne.n 8038196 + 80381c4: 687b ldr r3, [r7, #4] + 80381c6: 7d1b ldrb r3, [r3, #20] + 80381c8: 2b00 cmp r3, #0 + 80381ca: d126 bne.n 803821a if (pcb->local_port != 0) { - 8038148: 687b ldr r3, [r7, #4] - 803814a: 8adb ldrh r3, [r3, #22] - 803814c: 2b00 cmp r3, #0 - 803814e: d02e beq.n 80381ae + 80381cc: 687b ldr r3, [r7, #4] + 80381ce: 8adb ldrh r3, [r3, #22] + 80381d0: 2b00 cmp r3, #0 + 80381d2: d02e beq.n 8038232 /* bound, not yet opened */ TCP_RMV(&tcp_bound_pcbs, pcb); - 8038150: 4b3b ldr r3, [pc, #236] ; (8038240 ) - 8038152: 681b ldr r3, [r3, #0] - 8038154: 687a ldr r2, [r7, #4] - 8038156: 429a cmp r2, r3 - 8038158: d105 bne.n 8038166 - 803815a: 4b39 ldr r3, [pc, #228] ; (8038240 ) - 803815c: 681b ldr r3, [r3, #0] - 803815e: 68db ldr r3, [r3, #12] - 8038160: 4a37 ldr r2, [pc, #220] ; (8038240 ) - 8038162: 6013 str r3, [r2, #0] - 8038164: e013 b.n 803818e - 8038166: 4b36 ldr r3, [pc, #216] ; (8038240 ) - 8038168: 681b ldr r3, [r3, #0] - 803816a: 61fb str r3, [r7, #28] - 803816c: e00c b.n 8038188 - 803816e: 69fb ldr r3, [r7, #28] - 8038170: 68db ldr r3, [r3, #12] - 8038172: 687a ldr r2, [r7, #4] - 8038174: 429a cmp r2, r3 - 8038176: d104 bne.n 8038182 - 8038178: 687b ldr r3, [r7, #4] - 803817a: 68da ldr r2, [r3, #12] - 803817c: 69fb ldr r3, [r7, #28] - 803817e: 60da str r2, [r3, #12] - 8038180: e005 b.n 803818e - 8038182: 69fb ldr r3, [r7, #28] - 8038184: 68db ldr r3, [r3, #12] - 8038186: 61fb str r3, [r7, #28] - 8038188: 69fb ldr r3, [r7, #28] - 803818a: 2b00 cmp r3, #0 - 803818c: d1ef bne.n 803816e - 803818e: 687b ldr r3, [r7, #4] - 8038190: 2200 movs r2, #0 - 8038192: 60da str r2, [r3, #12] - 8038194: e00b b.n 80381ae + 80381d4: 4b3b ldr r3, [pc, #236] ; (80382c4 ) + 80381d6: 681b ldr r3, [r3, #0] + 80381d8: 687a ldr r2, [r7, #4] + 80381da: 429a cmp r2, r3 + 80381dc: d105 bne.n 80381ea + 80381de: 4b39 ldr r3, [pc, #228] ; (80382c4 ) + 80381e0: 681b ldr r3, [r3, #0] + 80381e2: 68db ldr r3, [r3, #12] + 80381e4: 4a37 ldr r2, [pc, #220] ; (80382c4 ) + 80381e6: 6013 str r3, [r2, #0] + 80381e8: e013 b.n 8038212 + 80381ea: 4b36 ldr r3, [pc, #216] ; (80382c4 ) + 80381ec: 681b ldr r3, [r3, #0] + 80381ee: 61fb str r3, [r7, #28] + 80381f0: e00c b.n 803820c + 80381f2: 69fb ldr r3, [r7, #28] + 80381f4: 68db ldr r3, [r3, #12] + 80381f6: 687a ldr r2, [r7, #4] + 80381f8: 429a cmp r2, r3 + 80381fa: d104 bne.n 8038206 + 80381fc: 687b ldr r3, [r7, #4] + 80381fe: 68da ldr r2, [r3, #12] + 8038200: 69fb ldr r3, [r7, #28] + 8038202: 60da str r2, [r3, #12] + 8038204: e005 b.n 8038212 + 8038206: 69fb ldr r3, [r7, #28] + 8038208: 68db ldr r3, [r3, #12] + 803820a: 61fb str r3, [r7, #28] + 803820c: 69fb ldr r3, [r7, #28] + 803820e: 2b00 cmp r3, #0 + 8038210: d1ef bne.n 80381f2 + 8038212: 687b ldr r3, [r7, #4] + 8038214: 2200 movs r2, #0 + 8038216: 60da str r2, [r3, #12] + 8038218: e00b b.n 8038232 } } else { send_rst = reset; - 8038196: 683b ldr r3, [r7, #0] - 8038198: 627b str r3, [r7, #36] ; 0x24 + 803821a: 683b ldr r3, [r7, #0] + 803821c: 627b str r3, [r7, #36] ; 0x24 local_port = pcb->local_port; - 803819a: 687b ldr r3, [r7, #4] - 803819c: 8adb ldrh r3, [r3, #22] - 803819e: 847b strh r3, [r7, #34] ; 0x22 + 803821e: 687b ldr r3, [r7, #4] + 8038220: 8adb ldrh r3, [r3, #22] + 8038222: 847b strh r3, [r7, #34] ; 0x22 TCP_PCB_REMOVE_ACTIVE(pcb); - 80381a0: 6879 ldr r1, [r7, #4] - 80381a2: 4828 ldr r0, [pc, #160] ; (8038244 ) - 80381a4: f001 f9de bl 8039564 - 80381a8: 4b27 ldr r3, [pc, #156] ; (8038248 ) - 80381aa: 2201 movs r2, #1 - 80381ac: 701a strb r2, [r3, #0] + 8038224: 6879 ldr r1, [r7, #4] + 8038226: 4828 ldr r0, [pc, #160] ; (80382c8 ) + 8038228: f001 f9de bl 80395e8 + 803822c: 4b27 ldr r3, [pc, #156] ; (80382cc ) + 803822e: 2201 movs r2, #1 + 8038230: 701a strb r2, [r3, #0] } if (pcb->unacked != NULL) { - 80381ae: 687b ldr r3, [r7, #4] - 80381b0: 6f1b ldr r3, [r3, #112] ; 0x70 - 80381b2: 2b00 cmp r3, #0 - 80381b4: d004 beq.n 80381c0 + 8038232: 687b ldr r3, [r7, #4] + 8038234: 6f1b ldr r3, [r3, #112] ; 0x70 + 8038236: 2b00 cmp r3, #0 + 8038238: d004 beq.n 8038244 tcp_segs_free(pcb->unacked); - 80381b6: 687b ldr r3, [r7, #4] - 80381b8: 6f1b ldr r3, [r3, #112] ; 0x70 - 80381ba: 4618 mov r0, r3 - 80381bc: f000 fed6 bl 8038f6c + 803823a: 687b ldr r3, [r7, #4] + 803823c: 6f1b ldr r3, [r3, #112] ; 0x70 + 803823e: 4618 mov r0, r3 + 8038240: f000 fed6 bl 8038ff0 } if (pcb->unsent != NULL) { - 80381c0: 687b ldr r3, [r7, #4] - 80381c2: 6edb ldr r3, [r3, #108] ; 0x6c - 80381c4: 2b00 cmp r3, #0 - 80381c6: d004 beq.n 80381d2 + 8038244: 687b ldr r3, [r7, #4] + 8038246: 6edb ldr r3, [r3, #108] ; 0x6c + 8038248: 2b00 cmp r3, #0 + 803824a: d004 beq.n 8038256 tcp_segs_free(pcb->unsent); - 80381c8: 687b ldr r3, [r7, #4] - 80381ca: 6edb ldr r3, [r3, #108] ; 0x6c - 80381cc: 4618 mov r0, r3 - 80381ce: f000 fecd bl 8038f6c + 803824c: 687b ldr r3, [r7, #4] + 803824e: 6edb ldr r3, [r3, #108] ; 0x6c + 8038250: 4618 mov r0, r3 + 8038252: f000 fecd bl 8038ff0 } #if TCP_QUEUE_OOSEQ if (pcb->ooseq != NULL) { - 80381d2: 687b ldr r3, [r7, #4] - 80381d4: 6f5b ldr r3, [r3, #116] ; 0x74 - 80381d6: 2b00 cmp r3, #0 - 80381d8: d004 beq.n 80381e4 + 8038256: 687b ldr r3, [r7, #4] + 8038258: 6f5b ldr r3, [r3, #116] ; 0x74 + 803825a: 2b00 cmp r3, #0 + 803825c: d004 beq.n 8038268 tcp_segs_free(pcb->ooseq); - 80381da: 687b ldr r3, [r7, #4] - 80381dc: 6f5b ldr r3, [r3, #116] ; 0x74 - 80381de: 4618 mov r0, r3 - 80381e0: f000 fec4 bl 8038f6c + 803825e: 687b ldr r3, [r7, #4] + 8038260: 6f5b ldr r3, [r3, #116] ; 0x74 + 8038262: 4618 mov r0, r3 + 8038264: f000 fec4 bl 8038ff0 } #endif /* TCP_QUEUE_OOSEQ */ tcp_backlog_accepted(pcb); if (send_rst) { - 80381e4: 6a7b ldr r3, [r7, #36] ; 0x24 - 80381e6: 2b00 cmp r3, #0 - 80381e8: d00e beq.n 8038208 + 8038268: 6a7b ldr r3, [r7, #36] ; 0x24 + 803826a: 2b00 cmp r3, #0 + 803826c: d00e beq.n 803828c LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n")); tcp_rst(pcb, seqno, ackno, &pcb->local_ip, &pcb->remote_ip, local_port, pcb->remote_port); - 80381ea: 6879 ldr r1, [r7, #4] - 80381ec: 687b ldr r3, [r7, #4] - 80381ee: 3304 adds r3, #4 - 80381f0: 687a ldr r2, [r7, #4] - 80381f2: 8b12 ldrh r2, [r2, #24] - 80381f4: 9202 str r2, [sp, #8] - 80381f6: 8c7a ldrh r2, [r7, #34] ; 0x22 - 80381f8: 9201 str r2, [sp, #4] - 80381fa: 9300 str r3, [sp, #0] - 80381fc: 460b mov r3, r1 - 80381fe: 697a ldr r2, [r7, #20] - 8038200: 69b9 ldr r1, [r7, #24] - 8038202: 6878 ldr r0, [r7, #4] - 8038204: f005 fb7e bl 803d904 + 803826e: 6879 ldr r1, [r7, #4] + 8038270: 687b ldr r3, [r7, #4] + 8038272: 3304 adds r3, #4 + 8038274: 687a ldr r2, [r7, #4] + 8038276: 8b12 ldrh r2, [r2, #24] + 8038278: 9202 str r2, [sp, #8] + 803827a: 8c7a ldrh r2, [r7, #34] ; 0x22 + 803827c: 9201 str r2, [sp, #4] + 803827e: 9300 str r3, [sp, #0] + 8038280: 460b mov r3, r1 + 8038282: 697a ldr r2, [r7, #20] + 8038284: 69b9 ldr r1, [r7, #24] + 8038286: 6878 ldr r0, [r7, #4] + 8038288: f005 fb7e bl 803d988 } last_state = pcb->state; - 8038208: 687b ldr r3, [r7, #4] - 803820a: 7d1b ldrb r3, [r3, #20] - 803820c: 72fb strb r3, [r7, #11] + 803828c: 687b ldr r3, [r7, #4] + 803828e: 7d1b ldrb r3, [r3, #20] + 8038290: 72fb strb r3, [r7, #11] tcp_free(pcb); - 803820e: 6878 ldr r0, [r7, #4] - 8038210: f7ff fd34 bl 8037c7c + 8038292: 6878 ldr r0, [r7, #4] + 8038294: f7ff fd34 bl 8037d00 TCP_EVENT_ERR(last_state, errf, errf_arg, ERR_ABRT); - 8038214: 693b ldr r3, [r7, #16] - 8038216: 2b00 cmp r3, #0 - 8038218: d004 beq.n 8038224 - 803821a: 693b ldr r3, [r7, #16] - 803821c: f06f 010c mvn.w r1, #12 - 8038220: 68f8 ldr r0, [r7, #12] - 8038222: 4798 blx r3 - } -} - 8038224: 3728 adds r7, #40 ; 0x28 - 8038226: 46bd mov sp, r7 - 8038228: bd80 pop {r7, pc} - 803822a: bf00 nop - 803822c: 08042d98 .word 0x08042d98 - 8038230: 08042edc .word 0x08042edc - 8038234: 08042ddc .word 0x08042ddc - 8038238: 08042ef8 .word 0x08042ef8 - 803823c: 2400e968 .word 0x2400e968 - 8038240: 2400e95c .word 0x2400e95c - 8038244: 2400e964 .word 0x2400e964 - 8038248: 2400e96c .word 0x2400e96c - -0803824c : + 8038298: 693b ldr r3, [r7, #16] + 803829a: 2b00 cmp r3, #0 + 803829c: d004 beq.n 80382a8 + 803829e: 693b ldr r3, [r7, #16] + 80382a0: f06f 010c mvn.w r1, #12 + 80382a4: 68f8 ldr r0, [r7, #12] + 80382a6: 4798 blx r3 + } +} + 80382a8: 3728 adds r7, #40 ; 0x28 + 80382aa: 46bd mov sp, r7 + 80382ac: bd80 pop {r7, pc} + 80382ae: bf00 nop + 80382b0: 08042e18 .word 0x08042e18 + 80382b4: 08042f5c .word 0x08042f5c + 80382b8: 08042e5c .word 0x08042e5c + 80382bc: 08042f78 .word 0x08042f78 + 80382c0: 2400e970 .word 0x2400e970 + 80382c4: 2400e964 .word 0x2400e964 + 80382c8: 2400e96c .word 0x2400e96c + 80382cc: 2400e974 .word 0x2400e974 + +080382d0 : * * @param pcb the tcp pcb to abort */ void tcp_abort(struct tcp_pcb *pcb) { - 803824c: b580 push {r7, lr} - 803824e: b082 sub sp, #8 - 8038250: af00 add r7, sp, #0 - 8038252: 6078 str r0, [r7, #4] + 80382d0: b580 push {r7, lr} + 80382d2: b082 sub sp, #8 + 80382d4: af00 add r7, sp, #0 + 80382d6: 6078 str r0, [r7, #4] tcp_abandon(pcb, 1); - 8038254: 2101 movs r1, #1 - 8038256: 6878 ldr r0, [r7, #4] - 8038258: f7ff ff3a bl 80380d0 + 80382d8: 2101 movs r1, #1 + 80382da: 6878 ldr r0, [r7, #4] + 80382dc: f7ff ff3a bl 8038154 } - 803825c: bf00 nop - 803825e: 3708 adds r7, #8 - 8038260: 46bd mov sp, r7 - 8038262: bd80 pop {r7, pc} + 80382e0: bf00 nop + 80382e2: 3708 adds r7, #8 + 80382e4: 46bd mov sp, r7 + 80382e6: bd80 pop {r7, pc} -08038264 : +080382e8 : * ERR_VAL if bind failed because the PCB is not in a valid state * ERR_OK if bound */ err_t tcp_bind(struct tcp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port) { - 8038264: b580 push {r7, lr} - 8038266: b088 sub sp, #32 - 8038268: af00 add r7, sp, #0 - 803826a: 60f8 str r0, [r7, #12] - 803826c: 60b9 str r1, [r7, #8] - 803826e: 4613 mov r3, r2 - 8038270: 80fb strh r3, [r7, #6] + 80382e8: b580 push {r7, lr} + 80382ea: b088 sub sp, #32 + 80382ec: af00 add r7, sp, #0 + 80382ee: 60f8 str r0, [r7, #12] + 80382f0: 60b9 str r1, [r7, #8] + 80382f2: 4613 mov r3, r2 + 80382f4: 80fb strh r3, [r7, #6] int i; int max_pcb_list = NUM_TCP_PCB_LISTS; - 8038272: 2304 movs r3, #4 - 8038274: 617b str r3, [r7, #20] + 80382f6: 2304 movs r3, #4 + 80382f8: 617b str r3, [r7, #20] LWIP_ASSERT_CORE_LOCKED(); #if LWIP_IPV4 /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */ if (ipaddr == NULL) { - 8038276: 68bb ldr r3, [r7, #8] - 8038278: 2b00 cmp r3, #0 - 803827a: d101 bne.n 8038280 + 80382fa: 68bb ldr r3, [r7, #8] + 80382fc: 2b00 cmp r3, #0 + 80382fe: d101 bne.n 8038304 ipaddr = IP4_ADDR_ANY; - 803827c: 4b3e ldr r3, [pc, #248] ; (8038378 ) - 803827e: 60bb str r3, [r7, #8] + 8038300: 4b3e ldr r3, [pc, #248] ; (80383fc ) + 8038302: 60bb str r3, [r7, #8] } #else /* LWIP_IPV4 */ LWIP_ERROR("tcp_bind: invalid ipaddr", ipaddr != NULL, return ERR_ARG); #endif /* LWIP_IPV4 */ LWIP_ERROR("tcp_bind: invalid pcb", pcb != NULL, return ERR_ARG); - 8038280: 68fb ldr r3, [r7, #12] - 8038282: 2b00 cmp r3, #0 - 8038284: d109 bne.n 803829a - 8038286: 4b3d ldr r3, [pc, #244] ; (803837c ) - 8038288: f240 22a9 movw r2, #681 ; 0x2a9 - 803828c: 493c ldr r1, [pc, #240] ; (8038380 ) - 803828e: 483d ldr r0, [pc, #244] ; (8038384 ) - 8038290: f008 fc3e bl 8040b10 - 8038294: f06f 030f mvn.w r3, #15 - 8038298: e06a b.n 8038370 + 8038304: 68fb ldr r3, [r7, #12] + 8038306: 2b00 cmp r3, #0 + 8038308: d109 bne.n 803831e + 803830a: 4b3d ldr r3, [pc, #244] ; (8038400 ) + 803830c: f240 22a9 movw r2, #681 ; 0x2a9 + 8038310: 493c ldr r1, [pc, #240] ; (8038404 ) + 8038312: 483d ldr r0, [pc, #244] ; (8038408 ) + 8038314: f008 fc3e bl 8040b94 + 8038318: f06f 030f mvn.w r3, #15 + 803831c: e06a b.n 80383f4 LWIP_ERROR("tcp_bind: can only bind in state CLOSED", pcb->state == CLOSED, return ERR_VAL); - 803829a: 68fb ldr r3, [r7, #12] - 803829c: 7d1b ldrb r3, [r3, #20] - 803829e: 2b00 cmp r3, #0 - 80382a0: d009 beq.n 80382b6 - 80382a2: 4b36 ldr r3, [pc, #216] ; (803837c ) - 80382a4: f240 22ab movw r2, #683 ; 0x2ab - 80382a8: 4937 ldr r1, [pc, #220] ; (8038388 ) - 80382aa: 4836 ldr r0, [pc, #216] ; (8038384 ) - 80382ac: f008 fc30 bl 8040b10 - 80382b0: f06f 0305 mvn.w r3, #5 - 80382b4: e05c b.n 8038370 + 803831e: 68fb ldr r3, [r7, #12] + 8038320: 7d1b ldrb r3, [r3, #20] + 8038322: 2b00 cmp r3, #0 + 8038324: d009 beq.n 803833a + 8038326: 4b36 ldr r3, [pc, #216] ; (8038400 ) + 8038328: f240 22ab movw r2, #683 ; 0x2ab + 803832c: 4937 ldr r1, [pc, #220] ; (803840c ) + 803832e: 4836 ldr r0, [pc, #216] ; (8038408 ) + 8038330: f008 fc30 bl 8040b94 + 8038334: f06f 0305 mvn.w r3, #5 + 8038338: e05c b.n 80383f4 ip6_addr_select_zone(ip_2_ip6(&zoned_ipaddr), ip_2_ip6(&zoned_ipaddr)); ipaddr = &zoned_ipaddr; } #endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */ if (port == 0) { - 80382b6: 88fb ldrh r3, [r7, #6] - 80382b8: 2b00 cmp r3, #0 - 80382ba: d109 bne.n 80382d0 + 803833a: 88fb ldrh r3, [r7, #6] + 803833c: 2b00 cmp r3, #0 + 803833e: d109 bne.n 8038354 port = tcp_new_port(); - 80382bc: f000 f9f0 bl 80386a0 - 80382c0: 4603 mov r3, r0 - 80382c2: 80fb strh r3, [r7, #6] + 8038340: f000 f9f0 bl 8038724 + 8038344: 4603 mov r3, r0 + 8038346: 80fb strh r3, [r7, #6] if (port == 0) { - 80382c4: 88fb ldrh r3, [r7, #6] - 80382c6: 2b00 cmp r3, #0 - 80382c8: d135 bne.n 8038336 + 8038348: 88fb ldrh r3, [r7, #6] + 803834a: 2b00 cmp r3, #0 + 803834c: d135 bne.n 80383ba return ERR_BUF; - 80382ca: f06f 0301 mvn.w r3, #1 - 80382ce: e04f b.n 8038370 + 803834e: f06f 0301 mvn.w r3, #1 + 8038352: e04f b.n 80383f4 } } else { /* Check if the address already is in use (on all lists) */ for (i = 0; i < max_pcb_list; i++) { - 80382d0: 2300 movs r3, #0 - 80382d2: 61fb str r3, [r7, #28] - 80382d4: e02b b.n 803832e + 8038354: 2300 movs r3, #0 + 8038356: 61fb str r3, [r7, #28] + 8038358: e02b b.n 80383b2 for (cpcb = *tcp_pcb_lists[i]; cpcb != NULL; cpcb = cpcb->next) { - 80382d6: 4a2d ldr r2, [pc, #180] ; (803838c ) - 80382d8: 69fb ldr r3, [r7, #28] - 80382da: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 80382de: 681b ldr r3, [r3, #0] - 80382e0: 61bb str r3, [r7, #24] - 80382e2: e01e b.n 8038322 + 803835a: 4a2d ldr r2, [pc, #180] ; (8038410 ) + 803835c: 69fb ldr r3, [r7, #28] + 803835e: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8038362: 681b ldr r3, [r3, #0] + 8038364: 61bb str r3, [r7, #24] + 8038366: e01e b.n 80383a6 if (cpcb->local_port == port) { - 80382e4: 69bb ldr r3, [r7, #24] - 80382e6: 8adb ldrh r3, [r3, #22] - 80382e8: 88fa ldrh r2, [r7, #6] - 80382ea: 429a cmp r2, r3 - 80382ec: d116 bne.n 803831c + 8038368: 69bb ldr r3, [r7, #24] + 803836a: 8adb ldrh r3, [r3, #22] + 803836c: 88fa ldrh r2, [r7, #6] + 803836e: 429a cmp r2, r3 + 8038370: d116 bne.n 80383a0 !ip_get_option(cpcb, SOF_REUSEADDR)) #endif /* SO_REUSE */ { /* @todo: check accept_any_ip_version */ if ((IP_IS_V6(ipaddr) == IP_IS_V6_VAL(cpcb->local_ip)) && (ip_addr_isany(&cpcb->local_ip) || - 80382ee: 69bb ldr r3, [r7, #24] + 8038372: 69bb ldr r3, [r7, #24] if ((IP_IS_V6(ipaddr) == IP_IS_V6_VAL(cpcb->local_ip)) && - 80382f0: 2b00 cmp r3, #0 - 80382f2: d010 beq.n 8038316 + 8038374: 2b00 cmp r3, #0 + 8038376: d010 beq.n 803839a (ip_addr_isany(&cpcb->local_ip) || - 80382f4: 69bb ldr r3, [r7, #24] - 80382f6: 681b ldr r3, [r3, #0] - 80382f8: 2b00 cmp r3, #0 - 80382fa: d00c beq.n 8038316 - 80382fc: 68bb ldr r3, [r7, #8] - 80382fe: 2b00 cmp r3, #0 - 8038300: d009 beq.n 8038316 + 8038378: 69bb ldr r3, [r7, #24] + 803837a: 681b ldr r3, [r3, #0] + 803837c: 2b00 cmp r3, #0 + 803837e: d00c beq.n 803839a + 8038380: 68bb ldr r3, [r7, #8] + 8038382: 2b00 cmp r3, #0 + 8038384: d009 beq.n 803839a ip_addr_isany(ipaddr) || - 8038302: 68bb ldr r3, [r7, #8] - 8038304: 681b ldr r3, [r3, #0] - 8038306: 2b00 cmp r3, #0 - 8038308: d005 beq.n 8038316 + 8038386: 68bb ldr r3, [r7, #8] + 8038388: 681b ldr r3, [r3, #0] + 803838a: 2b00 cmp r3, #0 + 803838c: d005 beq.n 803839a ip_addr_cmp(&cpcb->local_ip, ipaddr))) { - 803830a: 69bb ldr r3, [r7, #24] - 803830c: 681a ldr r2, [r3, #0] - 803830e: 68bb ldr r3, [r7, #8] - 8038310: 681b ldr r3, [r3, #0] + 803838e: 69bb ldr r3, [r7, #24] + 8038390: 681a ldr r2, [r3, #0] + 8038392: 68bb ldr r3, [r7, #8] + 8038394: 681b ldr r3, [r3, #0] if ((IP_IS_V6(ipaddr) == IP_IS_V6_VAL(cpcb->local_ip)) && - 8038312: 429a cmp r2, r3 - 8038314: d102 bne.n 803831c + 8038396: 429a cmp r2, r3 + 8038398: d102 bne.n 80383a0 return ERR_USE; - 8038316: f06f 0307 mvn.w r3, #7 - 803831a: e029 b.n 8038370 + 803839a: f06f 0307 mvn.w r3, #7 + 803839e: e029 b.n 80383f4 for (cpcb = *tcp_pcb_lists[i]; cpcb != NULL; cpcb = cpcb->next) { - 803831c: 69bb ldr r3, [r7, #24] - 803831e: 68db ldr r3, [r3, #12] - 8038320: 61bb str r3, [r7, #24] - 8038322: 69bb ldr r3, [r7, #24] - 8038324: 2b00 cmp r3, #0 - 8038326: d1dd bne.n 80382e4 + 80383a0: 69bb ldr r3, [r7, #24] + 80383a2: 68db ldr r3, [r3, #12] + 80383a4: 61bb str r3, [r7, #24] + 80383a6: 69bb ldr r3, [r7, #24] + 80383a8: 2b00 cmp r3, #0 + 80383aa: d1dd bne.n 8038368 for (i = 0; i < max_pcb_list; i++) { - 8038328: 69fb ldr r3, [r7, #28] - 803832a: 3301 adds r3, #1 - 803832c: 61fb str r3, [r7, #28] - 803832e: 69fa ldr r2, [r7, #28] - 8038330: 697b ldr r3, [r7, #20] - 8038332: 429a cmp r2, r3 - 8038334: dbcf blt.n 80382d6 + 80383ac: 69fb ldr r3, [r7, #28] + 80383ae: 3301 adds r3, #1 + 80383b0: 61fb str r3, [r7, #28] + 80383b2: 69fa ldr r2, [r7, #28] + 80383b4: 697b ldr r3, [r7, #20] + 80383b6: 429a cmp r2, r3 + 80383b8: dbcf blt.n 803835a } } } } if (!ip_addr_isany(ipaddr) - 8038336: 68bb ldr r3, [r7, #8] - 8038338: 2b00 cmp r3, #0 - 803833a: d00c beq.n 8038356 - 803833c: 68bb ldr r3, [r7, #8] - 803833e: 681b ldr r3, [r3, #0] - 8038340: 2b00 cmp r3, #0 - 8038342: d008 beq.n 8038356 + 80383ba: 68bb ldr r3, [r7, #8] + 80383bc: 2b00 cmp r3, #0 + 80383be: d00c beq.n 80383da + 80383c0: 68bb ldr r3, [r7, #8] + 80383c2: 681b ldr r3, [r3, #0] + 80383c4: 2b00 cmp r3, #0 + 80383c6: d008 beq.n 80383da #if LWIP_IPV4 && LWIP_IPV6 || (IP_GET_TYPE(ipaddr) != IP_GET_TYPE(&pcb->local_ip)) #endif /* LWIP_IPV4 && LWIP_IPV6 */ ) { ip_addr_set(&pcb->local_ip, ipaddr); - 8038344: 68bb ldr r3, [r7, #8] - 8038346: 2b00 cmp r3, #0 - 8038348: d002 beq.n 8038350 - 803834a: 68bb ldr r3, [r7, #8] - 803834c: 681b ldr r3, [r3, #0] - 803834e: e000 b.n 8038352 - 8038350: 2300 movs r3, #0 - 8038352: 68fa ldr r2, [r7, #12] - 8038354: 6013 str r3, [r2, #0] + 80383c8: 68bb ldr r3, [r7, #8] + 80383ca: 2b00 cmp r3, #0 + 80383cc: d002 beq.n 80383d4 + 80383ce: 68bb ldr r3, [r7, #8] + 80383d0: 681b ldr r3, [r3, #0] + 80383d2: e000 b.n 80383d6 + 80383d4: 2300 movs r3, #0 + 80383d6: 68fa ldr r2, [r7, #12] + 80383d8: 6013 str r3, [r2, #0] } pcb->local_port = port; - 8038356: 68fb ldr r3, [r7, #12] - 8038358: 88fa ldrh r2, [r7, #6] - 803835a: 82da strh r2, [r3, #22] + 80383da: 68fb ldr r3, [r7, #12] + 80383dc: 88fa ldrh r2, [r7, #6] + 80383de: 82da strh r2, [r3, #22] TCP_REG(&tcp_bound_pcbs, pcb); - 803835c: 4b0c ldr r3, [pc, #48] ; (8038390 ) - 803835e: 681a ldr r2, [r3, #0] - 8038360: 68fb ldr r3, [r7, #12] - 8038362: 60da str r2, [r3, #12] - 8038364: 4a0a ldr r2, [pc, #40] ; (8038390 ) - 8038366: 68fb ldr r3, [r7, #12] - 8038368: 6013 str r3, [r2, #0] - 803836a: f005 fc8d bl 803dc88 + 80383e0: 4b0c ldr r3, [pc, #48] ; (8038414 ) + 80383e2: 681a ldr r2, [r3, #0] + 80383e4: 68fb ldr r3, [r7, #12] + 80383e6: 60da str r2, [r3, #12] + 80383e8: 4a0a ldr r2, [pc, #40] ; (8038414 ) + 80383ea: 68fb ldr r3, [r7, #12] + 80383ec: 6013 str r3, [r2, #0] + 80383ee: f005 fc8d bl 803dd0c LWIP_DEBUGF(TCP_DEBUG, ("tcp_bind: bind to port %"U16_F"\n", port)); return ERR_OK; - 803836e: 2300 movs r3, #0 -} - 8038370: 4618 mov r0, r3 - 8038372: 3720 adds r7, #32 - 8038374: 46bd mov sp, r7 - 8038376: bd80 pop {r7, pc} - 8038378: 08044e00 .word 0x08044e00 - 803837c: 08042d98 .word 0x08042d98 - 8038380: 08042f2c .word 0x08042f2c - 8038384: 08042ddc .word 0x08042ddc - 8038388: 08042f44 .word 0x08042f44 - 803838c: 08044dd8 .word 0x08044dd8 - 8038390: 2400e95c .word 0x2400e95c - -08038394 : + 80383f2: 2300 movs r3, #0 +} + 80383f4: 4618 mov r0, r3 + 80383f6: 3720 adds r7, #32 + 80383f8: 46bd mov sp, r7 + 80383fa: bd80 pop {r7, pc} + 80383fc: 08044e80 .word 0x08044e80 + 8038400: 08042e18 .word 0x08042e18 + 8038404: 08042fac .word 0x08042fac + 8038408: 08042e5c .word 0x08042e5c + 803840c: 08042fc4 .word 0x08042fc4 + 8038410: 08044e58 .word 0x08044e58 + 8038414: 2400e964 .word 0x2400e964 + +08038418 : /** * Default accept callback if no accept callback is specified by the user. */ static err_t tcp_accept_null(void *arg, struct tcp_pcb *pcb, err_t err) { - 8038394: b580 push {r7, lr} - 8038396: b084 sub sp, #16 - 8038398: af00 add r7, sp, #0 - 803839a: 60f8 str r0, [r7, #12] - 803839c: 60b9 str r1, [r7, #8] - 803839e: 4613 mov r3, r2 - 80383a0: 71fb strb r3, [r7, #7] + 8038418: b580 push {r7, lr} + 803841a: b084 sub sp, #16 + 803841c: af00 add r7, sp, #0 + 803841e: 60f8 str r0, [r7, #12] + 8038420: 60b9 str r1, [r7, #8] + 8038422: 4613 mov r3, r2 + 8038424: 71fb strb r3, [r7, #7] LWIP_UNUSED_ARG(arg); LWIP_UNUSED_ARG(err); LWIP_ASSERT("tcp_accept_null: invalid pcb", pcb != NULL); - 80383a2: 68bb ldr r3, [r7, #8] - 80383a4: 2b00 cmp r3, #0 - 80383a6: d106 bne.n 80383b6 - 80383a8: 4b07 ldr r3, [pc, #28] ; (80383c8 ) - 80383aa: f240 320f movw r2, #783 ; 0x30f - 80383ae: 4907 ldr r1, [pc, #28] ; (80383cc ) - 80383b0: 4807 ldr r0, [pc, #28] ; (80383d0 ) - 80383b2: f008 fbad bl 8040b10 + 8038426: 68bb ldr r3, [r7, #8] + 8038428: 2b00 cmp r3, #0 + 803842a: d106 bne.n 803843a + 803842c: 4b07 ldr r3, [pc, #28] ; (803844c ) + 803842e: f240 320f movw r2, #783 ; 0x30f + 8038432: 4907 ldr r1, [pc, #28] ; (8038450 ) + 8038434: 4807 ldr r0, [pc, #28] ; (8038454 ) + 8038436: f008 fbad bl 8040b94 tcp_abort(pcb); - 80383b6: 68b8 ldr r0, [r7, #8] - 80383b8: f7ff ff48 bl 803824c + 803843a: 68b8 ldr r0, [r7, #8] + 803843c: f7ff ff48 bl 80382d0 return ERR_ABRT; - 80383bc: f06f 030c mvn.w r3, #12 + 8038440: f06f 030c mvn.w r3, #12 } - 80383c0: 4618 mov r0, r3 - 80383c2: 3710 adds r7, #16 - 80383c4: 46bd mov sp, r7 - 80383c6: bd80 pop {r7, pc} - 80383c8: 08042d98 .word 0x08042d98 - 80383cc: 08042f6c .word 0x08042f6c - 80383d0: 08042ddc .word 0x08042ddc + 8038444: 4618 mov r0, r3 + 8038446: 3710 adds r7, #16 + 8038448: 46bd mov sp, r7 + 803844a: bd80 pop {r7, pc} + 803844c: 08042e18 .word 0x08042e18 + 8038450: 08042fec .word 0x08042fec + 8038454: 08042e5c .word 0x08042e5c -080383d4 : +08038458 : * called like this: * tpcb = tcp_listen_with_backlog(tpcb, backlog); */ struct tcp_pcb * tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog) { - 80383d4: b580 push {r7, lr} - 80383d6: b082 sub sp, #8 - 80383d8: af00 add r7, sp, #0 - 80383da: 6078 str r0, [r7, #4] - 80383dc: 460b mov r3, r1 - 80383de: 70fb strb r3, [r7, #3] + 8038458: b580 push {r7, lr} + 803845a: b082 sub sp, #8 + 803845c: af00 add r7, sp, #0 + 803845e: 6078 str r0, [r7, #4] + 8038460: 460b mov r3, r1 + 8038462: 70fb strb r3, [r7, #3] LWIP_ASSERT_CORE_LOCKED(); return tcp_listen_with_backlog_and_err(pcb, backlog, NULL); - 80383e0: 78fb ldrb r3, [r7, #3] - 80383e2: 2200 movs r2, #0 - 80383e4: 4619 mov r1, r3 - 80383e6: 6878 ldr r0, [r7, #4] - 80383e8: f000 f806 bl 80383f8 - 80383ec: 4603 mov r3, r0 -} - 80383ee: 4618 mov r0, r3 - 80383f0: 3708 adds r7, #8 - 80383f2: 46bd mov sp, r7 - 80383f4: bd80 pop {r7, pc} + 8038464: 78fb ldrb r3, [r7, #3] + 8038466: 2200 movs r2, #0 + 8038468: 4619 mov r1, r3 + 803846a: 6878 ldr r0, [r7, #4] + 803846c: f000 f806 bl 803847c + 8038470: 4603 mov r3, r0 +} + 8038472: 4618 mov r0, r3 + 8038474: 3708 adds r7, #8 + 8038476: 46bd mov sp, r7 + 8038478: bd80 pop {r7, pc} ... -080383f8 : +0803847c : * called like this: * tpcb = tcp_listen_with_backlog_and_err(tpcb, backlog, &err); */ struct tcp_pcb * tcp_listen_with_backlog_and_err(struct tcp_pcb *pcb, u8_t backlog, err_t *err) { - 80383f8: b580 push {r7, lr} - 80383fa: b088 sub sp, #32 - 80383fc: af00 add r7, sp, #0 - 80383fe: 60f8 str r0, [r7, #12] - 8038400: 460b mov r3, r1 - 8038402: 607a str r2, [r7, #4] - 8038404: 72fb strb r3, [r7, #11] + 803847c: b580 push {r7, lr} + 803847e: b088 sub sp, #32 + 8038480: af00 add r7, sp, #0 + 8038482: 60f8 str r0, [r7, #12] + 8038484: 460b mov r3, r1 + 8038486: 607a str r2, [r7, #4] + 8038488: 72fb strb r3, [r7, #11] struct tcp_pcb_listen *lpcb = NULL; - 8038406: 2300 movs r3, #0 - 8038408: 61fb str r3, [r7, #28] + 803848a: 2300 movs r3, #0 + 803848c: 61fb str r3, [r7, #28] LWIP_UNUSED_ARG(backlog); LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_listen_with_backlog_and_err: invalid pcb", pcb != NULL, res = ERR_ARG; goto done); - 803840a: 68fb ldr r3, [r7, #12] - 803840c: 2b00 cmp r3, #0 - 803840e: d109 bne.n 8038424 - 8038410: 4b47 ldr r3, [pc, #284] ; (8038530 ) - 8038412: f240 3259 movw r2, #857 ; 0x359 - 8038416: 4947 ldr r1, [pc, #284] ; (8038534 ) - 8038418: 4847 ldr r0, [pc, #284] ; (8038538 ) - 803841a: f008 fb79 bl 8040b10 - 803841e: 23f0 movs r3, #240 ; 0xf0 - 8038420: 76fb strb r3, [r7, #27] - 8038422: e079 b.n 8038518 + 803848e: 68fb ldr r3, [r7, #12] + 8038490: 2b00 cmp r3, #0 + 8038492: d109 bne.n 80384a8 + 8038494: 4b47 ldr r3, [pc, #284] ; (80385b4 ) + 8038496: f240 3259 movw r2, #857 ; 0x359 + 803849a: 4947 ldr r1, [pc, #284] ; (80385b8 ) + 803849c: 4847 ldr r0, [pc, #284] ; (80385bc ) + 803849e: f008 fb79 bl 8040b94 + 80384a2: 23f0 movs r3, #240 ; 0xf0 + 80384a4: 76fb strb r3, [r7, #27] + 80384a6: e079 b.n 803859c LWIP_ERROR("tcp_listen_with_backlog_and_err: pcb already connected", pcb->state == CLOSED, res = ERR_CLSD; goto done); - 8038424: 68fb ldr r3, [r7, #12] - 8038426: 7d1b ldrb r3, [r3, #20] - 8038428: 2b00 cmp r3, #0 - 803842a: d009 beq.n 8038440 - 803842c: 4b40 ldr r3, [pc, #256] ; (8038530 ) - 803842e: f240 325a movw r2, #858 ; 0x35a - 8038432: 4942 ldr r1, [pc, #264] ; (803853c ) - 8038434: 4840 ldr r0, [pc, #256] ; (8038538 ) - 8038436: f008 fb6b bl 8040b10 - 803843a: 23f1 movs r3, #241 ; 0xf1 - 803843c: 76fb strb r3, [r7, #27] - 803843e: e06b b.n 8038518 + 80384a8: 68fb ldr r3, [r7, #12] + 80384aa: 7d1b ldrb r3, [r3, #20] + 80384ac: 2b00 cmp r3, #0 + 80384ae: d009 beq.n 80384c4 + 80384b0: 4b40 ldr r3, [pc, #256] ; (80385b4 ) + 80384b2: f240 325a movw r2, #858 ; 0x35a + 80384b6: 4942 ldr r1, [pc, #264] ; (80385c0 ) + 80384b8: 4840 ldr r0, [pc, #256] ; (80385bc ) + 80384ba: f008 fb6b bl 8040b94 + 80384be: 23f1 movs r3, #241 ; 0xf1 + 80384c0: 76fb strb r3, [r7, #27] + 80384c2: e06b b.n 803859c /* already listening? */ if (pcb->state == LISTEN) { - 8038440: 68fb ldr r3, [r7, #12] - 8038442: 7d1b ldrb r3, [r3, #20] - 8038444: 2b01 cmp r3, #1 - 8038446: d104 bne.n 8038452 + 80384c4: 68fb ldr r3, [r7, #12] + 80384c6: 7d1b ldrb r3, [r3, #20] + 80384c8: 2b01 cmp r3, #1 + 80384ca: d104 bne.n 80384d6 lpcb = (struct tcp_pcb_listen *)pcb; - 8038448: 68fb ldr r3, [r7, #12] - 803844a: 61fb str r3, [r7, #28] + 80384cc: 68fb ldr r3, [r7, #12] + 80384ce: 61fb str r3, [r7, #28] res = ERR_ALREADY; - 803844c: 23f7 movs r3, #247 ; 0xf7 - 803844e: 76fb strb r3, [r7, #27] + 80384d0: 23f7 movs r3, #247 ; 0xf7 + 80384d2: 76fb strb r3, [r7, #27] goto done; - 8038450: e062 b.n 8038518 + 80384d4: e062 b.n 803859c goto done; } } } #endif /* SO_REUSE */ lpcb = (struct tcp_pcb_listen *)memp_malloc(MEMP_TCP_PCB_LISTEN); - 8038452: 2002 movs r0, #2 - 8038454: f7fe fa70 bl 8036938 - 8038458: 61f8 str r0, [r7, #28] + 80384d6: 2002 movs r0, #2 + 80384d8: f7fe fa70 bl 80369bc + 80384dc: 61f8 str r0, [r7, #28] if (lpcb == NULL) { - 803845a: 69fb ldr r3, [r7, #28] - 803845c: 2b00 cmp r3, #0 - 803845e: d102 bne.n 8038466 + 80384de: 69fb ldr r3, [r7, #28] + 80384e0: 2b00 cmp r3, #0 + 80384e2: d102 bne.n 80384ea res = ERR_MEM; - 8038460: 23ff movs r3, #255 ; 0xff - 8038462: 76fb strb r3, [r7, #27] + 80384e4: 23ff movs r3, #255 ; 0xff + 80384e6: 76fb strb r3, [r7, #27] goto done; - 8038464: e058 b.n 8038518 + 80384e8: e058 b.n 803859c } lpcb->callback_arg = pcb->callback_arg; - 8038466: 68fb ldr r3, [r7, #12] - 8038468: 691a ldr r2, [r3, #16] - 803846a: 69fb ldr r3, [r7, #28] - 803846c: 611a str r2, [r3, #16] + 80384ea: 68fb ldr r3, [r7, #12] + 80384ec: 691a ldr r2, [r3, #16] + 80384ee: 69fb ldr r3, [r7, #28] + 80384f0: 611a str r2, [r3, #16] lpcb->local_port = pcb->local_port; - 803846e: 68fb ldr r3, [r7, #12] - 8038470: 8ada ldrh r2, [r3, #22] - 8038472: 69fb ldr r3, [r7, #28] - 8038474: 82da strh r2, [r3, #22] + 80384f2: 68fb ldr r3, [r7, #12] + 80384f4: 8ada ldrh r2, [r3, #22] + 80384f6: 69fb ldr r3, [r7, #28] + 80384f8: 82da strh r2, [r3, #22] lpcb->state = LISTEN; - 8038476: 69fb ldr r3, [r7, #28] - 8038478: 2201 movs r2, #1 - 803847a: 751a strb r2, [r3, #20] + 80384fa: 69fb ldr r3, [r7, #28] + 80384fc: 2201 movs r2, #1 + 80384fe: 751a strb r2, [r3, #20] lpcb->prio = pcb->prio; - 803847c: 68fb ldr r3, [r7, #12] - 803847e: 7d5a ldrb r2, [r3, #21] - 8038480: 69fb ldr r3, [r7, #28] - 8038482: 755a strb r2, [r3, #21] + 8038500: 68fb ldr r3, [r7, #12] + 8038502: 7d5a ldrb r2, [r3, #21] + 8038504: 69fb ldr r3, [r7, #28] + 8038506: 755a strb r2, [r3, #21] lpcb->so_options = pcb->so_options; - 8038484: 68fb ldr r3, [r7, #12] - 8038486: 7a5a ldrb r2, [r3, #9] - 8038488: 69fb ldr r3, [r7, #28] - 803848a: 725a strb r2, [r3, #9] + 8038508: 68fb ldr r3, [r7, #12] + 803850a: 7a5a ldrb r2, [r3, #9] + 803850c: 69fb ldr r3, [r7, #28] + 803850e: 725a strb r2, [r3, #9] lpcb->netif_idx = NETIF_NO_INDEX; - 803848c: 69fb ldr r3, [r7, #28] - 803848e: 2200 movs r2, #0 - 8038490: 721a strb r2, [r3, #8] + 8038510: 69fb ldr r3, [r7, #28] + 8038512: 2200 movs r2, #0 + 8038514: 721a strb r2, [r3, #8] lpcb->ttl = pcb->ttl; - 8038492: 68fb ldr r3, [r7, #12] - 8038494: 7ada ldrb r2, [r3, #11] - 8038496: 69fb ldr r3, [r7, #28] - 8038498: 72da strb r2, [r3, #11] + 8038516: 68fb ldr r3, [r7, #12] + 8038518: 7ada ldrb r2, [r3, #11] + 803851a: 69fb ldr r3, [r7, #28] + 803851c: 72da strb r2, [r3, #11] lpcb->tos = pcb->tos; - 803849a: 68fb ldr r3, [r7, #12] - 803849c: 7a9a ldrb r2, [r3, #10] - 803849e: 69fb ldr r3, [r7, #28] - 80384a0: 729a strb r2, [r3, #10] + 803851e: 68fb ldr r3, [r7, #12] + 8038520: 7a9a ldrb r2, [r3, #10] + 8038522: 69fb ldr r3, [r7, #28] + 8038524: 729a strb r2, [r3, #10] #if LWIP_IPV4 && LWIP_IPV6 IP_SET_TYPE_VAL(lpcb->remote_ip, pcb->local_ip.type); #endif /* LWIP_IPV4 && LWIP_IPV6 */ ip_addr_copy(lpcb->local_ip, pcb->local_ip); - 80384a2: 68fb ldr r3, [r7, #12] - 80384a4: 681a ldr r2, [r3, #0] - 80384a6: 69fb ldr r3, [r7, #28] - 80384a8: 601a str r2, [r3, #0] + 8038526: 68fb ldr r3, [r7, #12] + 8038528: 681a ldr r2, [r3, #0] + 803852a: 69fb ldr r3, [r7, #28] + 803852c: 601a str r2, [r3, #0] if (pcb->local_port != 0) { - 80384aa: 68fb ldr r3, [r7, #12] - 80384ac: 8adb ldrh r3, [r3, #22] - 80384ae: 2b00 cmp r3, #0 - 80384b0: d021 beq.n 80384f6 + 803852e: 68fb ldr r3, [r7, #12] + 8038530: 8adb ldrh r3, [r3, #22] + 8038532: 2b00 cmp r3, #0 + 8038534: d021 beq.n 803857a TCP_RMV(&tcp_bound_pcbs, pcb); - 80384b2: 4b23 ldr r3, [pc, #140] ; (8038540 ) - 80384b4: 681b ldr r3, [r3, #0] - 80384b6: 68fa ldr r2, [r7, #12] - 80384b8: 429a cmp r2, r3 - 80384ba: d105 bne.n 80384c8 - 80384bc: 4b20 ldr r3, [pc, #128] ; (8038540 ) - 80384be: 681b ldr r3, [r3, #0] - 80384c0: 68db ldr r3, [r3, #12] - 80384c2: 4a1f ldr r2, [pc, #124] ; (8038540 ) - 80384c4: 6013 str r3, [r2, #0] - 80384c6: e013 b.n 80384f0 - 80384c8: 4b1d ldr r3, [pc, #116] ; (8038540 ) - 80384ca: 681b ldr r3, [r3, #0] - 80384cc: 617b str r3, [r7, #20] - 80384ce: e00c b.n 80384ea - 80384d0: 697b ldr r3, [r7, #20] - 80384d2: 68db ldr r3, [r3, #12] - 80384d4: 68fa ldr r2, [r7, #12] - 80384d6: 429a cmp r2, r3 - 80384d8: d104 bne.n 80384e4 - 80384da: 68fb ldr r3, [r7, #12] - 80384dc: 68da ldr r2, [r3, #12] - 80384de: 697b ldr r3, [r7, #20] - 80384e0: 60da str r2, [r3, #12] - 80384e2: e005 b.n 80384f0 - 80384e4: 697b ldr r3, [r7, #20] - 80384e6: 68db ldr r3, [r3, #12] - 80384e8: 617b str r3, [r7, #20] - 80384ea: 697b ldr r3, [r7, #20] - 80384ec: 2b00 cmp r3, #0 - 80384ee: d1ef bne.n 80384d0 - 80384f0: 68fb ldr r3, [r7, #12] - 80384f2: 2200 movs r2, #0 - 80384f4: 60da str r2, [r3, #12] + 8038536: 4b23 ldr r3, [pc, #140] ; (80385c4 ) + 8038538: 681b ldr r3, [r3, #0] + 803853a: 68fa ldr r2, [r7, #12] + 803853c: 429a cmp r2, r3 + 803853e: d105 bne.n 803854c + 8038540: 4b20 ldr r3, [pc, #128] ; (80385c4 ) + 8038542: 681b ldr r3, [r3, #0] + 8038544: 68db ldr r3, [r3, #12] + 8038546: 4a1f ldr r2, [pc, #124] ; (80385c4 ) + 8038548: 6013 str r3, [r2, #0] + 803854a: e013 b.n 8038574 + 803854c: 4b1d ldr r3, [pc, #116] ; (80385c4 ) + 803854e: 681b ldr r3, [r3, #0] + 8038550: 617b str r3, [r7, #20] + 8038552: e00c b.n 803856e + 8038554: 697b ldr r3, [r7, #20] + 8038556: 68db ldr r3, [r3, #12] + 8038558: 68fa ldr r2, [r7, #12] + 803855a: 429a cmp r2, r3 + 803855c: d104 bne.n 8038568 + 803855e: 68fb ldr r3, [r7, #12] + 8038560: 68da ldr r2, [r3, #12] + 8038562: 697b ldr r3, [r7, #20] + 8038564: 60da str r2, [r3, #12] + 8038566: e005 b.n 8038574 + 8038568: 697b ldr r3, [r7, #20] + 803856a: 68db ldr r3, [r3, #12] + 803856c: 617b str r3, [r7, #20] + 803856e: 697b ldr r3, [r7, #20] + 8038570: 2b00 cmp r3, #0 + 8038572: d1ef bne.n 8038554 + 8038574: 68fb ldr r3, [r7, #12] + 8038576: 2200 movs r2, #0 + 8038578: 60da str r2, [r3, #12] } #if LWIP_TCP_PCB_NUM_EXT_ARGS /* copy over ext_args to listening pcb */ memcpy(&lpcb->ext_args, &pcb->ext_args, sizeof(pcb->ext_args)); #endif tcp_free(pcb); - 80384f6: 68f8 ldr r0, [r7, #12] - 80384f8: f7ff fbc0 bl 8037c7c + 803857a: 68f8 ldr r0, [r7, #12] + 803857c: f7ff fbc0 bl 8037d00 #if LWIP_CALLBACK_API lpcb->accept = tcp_accept_null; - 80384fc: 69fb ldr r3, [r7, #28] - 80384fe: 4a11 ldr r2, [pc, #68] ; (8038544 ) - 8038500: 619a str r2, [r3, #24] + 8038580: 69fb ldr r3, [r7, #28] + 8038582: 4a11 ldr r2, [pc, #68] ; (80385c8 ) + 8038584: 619a str r2, [r3, #24] #endif /* LWIP_CALLBACK_API */ #if TCP_LISTEN_BACKLOG lpcb->accepts_pending = 0; tcp_backlog_set(lpcb, backlog); #endif /* TCP_LISTEN_BACKLOG */ TCP_REG(&tcp_listen_pcbs.pcbs, (struct tcp_pcb *)lpcb); - 8038502: 4b11 ldr r3, [pc, #68] ; (8038548 ) - 8038504: 681a ldr r2, [r3, #0] - 8038506: 69fb ldr r3, [r7, #28] - 8038508: 60da str r2, [r3, #12] - 803850a: 4a0f ldr r2, [pc, #60] ; (8038548 ) - 803850c: 69fb ldr r3, [r7, #28] - 803850e: 6013 str r3, [r2, #0] - 8038510: f005 fbba bl 803dc88 + 8038586: 4b11 ldr r3, [pc, #68] ; (80385cc ) + 8038588: 681a ldr r2, [r3, #0] + 803858a: 69fb ldr r3, [r7, #28] + 803858c: 60da str r2, [r3, #12] + 803858e: 4a0f ldr r2, [pc, #60] ; (80385cc ) + 8038590: 69fb ldr r3, [r7, #28] + 8038592: 6013 str r3, [r2, #0] + 8038594: f005 fbba bl 803dd0c res = ERR_OK; - 8038514: 2300 movs r3, #0 - 8038516: 76fb strb r3, [r7, #27] + 8038598: 2300 movs r3, #0 + 803859a: 76fb strb r3, [r7, #27] done: if (err != NULL) { - 8038518: 687b ldr r3, [r7, #4] - 803851a: 2b00 cmp r3, #0 - 803851c: d002 beq.n 8038524 + 803859c: 687b ldr r3, [r7, #4] + 803859e: 2b00 cmp r3, #0 + 80385a0: d002 beq.n 80385a8 *err = res; - 803851e: 687b ldr r3, [r7, #4] - 8038520: 7efa ldrb r2, [r7, #27] - 8038522: 701a strb r2, [r3, #0] + 80385a2: 687b ldr r3, [r7, #4] + 80385a4: 7efa ldrb r2, [r7, #27] + 80385a6: 701a strb r2, [r3, #0] } return (struct tcp_pcb *)lpcb; - 8038524: 69fb ldr r3, [r7, #28] -} - 8038526: 4618 mov r0, r3 - 8038528: 3720 adds r7, #32 - 803852a: 46bd mov sp, r7 - 803852c: bd80 pop {r7, pc} - 803852e: bf00 nop - 8038530: 08042d98 .word 0x08042d98 - 8038534: 08042f8c .word 0x08042f8c - 8038538: 08042ddc .word 0x08042ddc - 803853c: 08042fbc .word 0x08042fbc - 8038540: 2400e95c .word 0x2400e95c - 8038544: 08038395 .word 0x08038395 - 8038548: 2400e960 .word 0x2400e960 - -0803854c : + 80385a8: 69fb ldr r3, [r7, #28] +} + 80385aa: 4618 mov r0, r3 + 80385ac: 3720 adds r7, #32 + 80385ae: 46bd mov sp, r7 + 80385b0: bd80 pop {r7, pc} + 80385b2: bf00 nop + 80385b4: 08042e18 .word 0x08042e18 + 80385b8: 0804300c .word 0x0804300c + 80385bc: 08042e5c .word 0x08042e5c + 80385c0: 0804303c .word 0x0804303c + 80385c4: 2400e964 .word 0x2400e964 + 80385c8: 08038419 .word 0x08038419 + 80385cc: 2400e968 .word 0x2400e968 + +080385d0 : * Returns how much extra window would be advertised if we sent an * update now. */ u32_t tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb) { - 803854c: b580 push {r7, lr} - 803854e: b084 sub sp, #16 - 8038550: af00 add r7, sp, #0 - 8038552: 6078 str r0, [r7, #4] + 80385d0: b580 push {r7, lr} + 80385d2: b084 sub sp, #16 + 80385d4: af00 add r7, sp, #0 + 80385d6: 6078 str r0, [r7, #4] u32_t new_right_edge; LWIP_ASSERT("tcp_update_rcv_ann_wnd: invalid pcb", pcb != NULL); - 8038554: 687b ldr r3, [r7, #4] - 8038556: 2b00 cmp r3, #0 - 8038558: d106 bne.n 8038568 - 803855a: 4b25 ldr r3, [pc, #148] ; (80385f0 ) - 803855c: f240 32a6 movw r2, #934 ; 0x3a6 - 8038560: 4924 ldr r1, [pc, #144] ; (80385f4 ) - 8038562: 4825 ldr r0, [pc, #148] ; (80385f8 ) - 8038564: f008 fad4 bl 8040b10 + 80385d8: 687b ldr r3, [r7, #4] + 80385da: 2b00 cmp r3, #0 + 80385dc: d106 bne.n 80385ec + 80385de: 4b25 ldr r3, [pc, #148] ; (8038674 ) + 80385e0: f240 32a6 movw r2, #934 ; 0x3a6 + 80385e4: 4924 ldr r1, [pc, #144] ; (8038678 ) + 80385e6: 4825 ldr r0, [pc, #148] ; (803867c ) + 80385e8: f008 fad4 bl 8040b94 new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd; - 8038568: 687b ldr r3, [r7, #4] - 803856a: 6a5b ldr r3, [r3, #36] ; 0x24 - 803856c: 687a ldr r2, [r7, #4] - 803856e: 8d12 ldrh r2, [r2, #40] ; 0x28 - 8038570: 4413 add r3, r2 - 8038572: 60fb str r3, [r7, #12] + 80385ec: 687b ldr r3, [r7, #4] + 80385ee: 6a5b ldr r3, [r3, #36] ; 0x24 + 80385f0: 687a ldr r2, [r7, #4] + 80385f2: 8d12 ldrh r2, [r2, #40] ; 0x28 + 80385f4: 4413 add r3, r2 + 80385f6: 60fb str r3, [r7, #12] if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) { - 8038574: 687b ldr r3, [r7, #4] - 8038576: 6adb ldr r3, [r3, #44] ; 0x2c - 8038578: 687a ldr r2, [r7, #4] - 803857a: 8e52 ldrh r2, [r2, #50] ; 0x32 - 803857c: f5b2 6f86 cmp.w r2, #1072 ; 0x430 - 8038580: bf28 it cs - 8038582: f44f 6286 movcs.w r2, #1072 ; 0x430 - 8038586: b292 uxth r2, r2 - 8038588: 4413 add r3, r2 - 803858a: 68fa ldr r2, [r7, #12] - 803858c: 1ad3 subs r3, r2, r3 - 803858e: 2b00 cmp r3, #0 - 8038590: db08 blt.n 80385a4 + 80385f8: 687b ldr r3, [r7, #4] + 80385fa: 6adb ldr r3, [r3, #44] ; 0x2c + 80385fc: 687a ldr r2, [r7, #4] + 80385fe: 8e52 ldrh r2, [r2, #50] ; 0x32 + 8038600: f5b2 6f86 cmp.w r2, #1072 ; 0x430 + 8038604: bf28 it cs + 8038606: f44f 6286 movcs.w r2, #1072 ; 0x430 + 803860a: b292 uxth r2, r2 + 803860c: 4413 add r3, r2 + 803860e: 68fa ldr r2, [r7, #12] + 8038610: 1ad3 subs r3, r2, r3 + 8038612: 2b00 cmp r3, #0 + 8038614: db08 blt.n 8038628 /* we can advertise more window */ pcb->rcv_ann_wnd = pcb->rcv_wnd; - 8038592: 687b ldr r3, [r7, #4] - 8038594: 8d1a ldrh r2, [r3, #40] ; 0x28 - 8038596: 687b ldr r3, [r7, #4] - 8038598: 855a strh r2, [r3, #42] ; 0x2a + 8038616: 687b ldr r3, [r7, #4] + 8038618: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803861a: 687b ldr r3, [r7, #4] + 803861c: 855a strh r2, [r3, #42] ; 0x2a return new_right_edge - pcb->rcv_ann_right_edge; - 803859a: 687b ldr r3, [r7, #4] - 803859c: 6adb ldr r3, [r3, #44] ; 0x2c - 803859e: 68fa ldr r2, [r7, #12] - 80385a0: 1ad3 subs r3, r2, r3 - 80385a2: e020 b.n 80385e6 + 803861e: 687b ldr r3, [r7, #4] + 8038620: 6adb ldr r3, [r3, #44] ; 0x2c + 8038622: 68fa ldr r2, [r7, #12] + 8038624: 1ad3 subs r3, r2, r3 + 8038626: e020 b.n 803866a } else { if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) { - 80385a4: 687b ldr r3, [r7, #4] - 80385a6: 6a5a ldr r2, [r3, #36] ; 0x24 - 80385a8: 687b ldr r3, [r7, #4] - 80385aa: 6adb ldr r3, [r3, #44] ; 0x2c - 80385ac: 1ad3 subs r3, r2, r3 - 80385ae: 2b00 cmp r3, #0 - 80385b0: dd03 ble.n 80385ba + 8038628: 687b ldr r3, [r7, #4] + 803862a: 6a5a ldr r2, [r3, #36] ; 0x24 + 803862c: 687b ldr r3, [r7, #4] + 803862e: 6adb ldr r3, [r3, #44] ; 0x2c + 8038630: 1ad3 subs r3, r2, r3 + 8038632: 2b00 cmp r3, #0 + 8038634: dd03 ble.n 803863e /* Can happen due to other end sending out of advertised window, * but within actual available (but not yet advertised) window */ pcb->rcv_ann_wnd = 0; - 80385b2: 687b ldr r3, [r7, #4] - 80385b4: 2200 movs r2, #0 - 80385b6: 855a strh r2, [r3, #42] ; 0x2a - 80385b8: e014 b.n 80385e4 + 8038636: 687b ldr r3, [r7, #4] + 8038638: 2200 movs r2, #0 + 803863a: 855a strh r2, [r3, #42] ; 0x2a + 803863c: e014 b.n 8038668 } else { /* keep the right edge of window constant */ u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt; - 80385ba: 687b ldr r3, [r7, #4] - 80385bc: 6ada ldr r2, [r3, #44] ; 0x2c - 80385be: 687b ldr r3, [r7, #4] - 80385c0: 6a5b ldr r3, [r3, #36] ; 0x24 - 80385c2: 1ad3 subs r3, r2, r3 - 80385c4: 60bb str r3, [r7, #8] + 803863e: 687b ldr r3, [r7, #4] + 8038640: 6ada ldr r2, [r3, #44] ; 0x2c + 8038642: 687b ldr r3, [r7, #4] + 8038644: 6a5b ldr r3, [r3, #36] ; 0x24 + 8038646: 1ad3 subs r3, r2, r3 + 8038648: 60bb str r3, [r7, #8] #if !LWIP_WND_SCALE LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff); - 80385c6: 68bb ldr r3, [r7, #8] - 80385c8: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 80385cc: d306 bcc.n 80385dc - 80385ce: 4b08 ldr r3, [pc, #32] ; (80385f0 ) - 80385d0: f240 32b6 movw r2, #950 ; 0x3b6 - 80385d4: 4909 ldr r1, [pc, #36] ; (80385fc ) - 80385d6: 4808 ldr r0, [pc, #32] ; (80385f8 ) - 80385d8: f008 fa9a bl 8040b10 + 803864a: 68bb ldr r3, [r7, #8] + 803864c: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 8038650: d306 bcc.n 8038660 + 8038652: 4b08 ldr r3, [pc, #32] ; (8038674 ) + 8038654: f240 32b6 movw r2, #950 ; 0x3b6 + 8038658: 4909 ldr r1, [pc, #36] ; (8038680 ) + 803865a: 4808 ldr r0, [pc, #32] ; (803867c ) + 803865c: f008 fa9a bl 8040b94 #endif pcb->rcv_ann_wnd = (tcpwnd_size_t)new_rcv_ann_wnd; - 80385dc: 68bb ldr r3, [r7, #8] - 80385de: b29a uxth r2, r3 - 80385e0: 687b ldr r3, [r7, #4] - 80385e2: 855a strh r2, [r3, #42] ; 0x2a + 8038660: 68bb ldr r3, [r7, #8] + 8038662: b29a uxth r2, r3 + 8038664: 687b ldr r3, [r7, #4] + 8038666: 855a strh r2, [r3, #42] ; 0x2a } return 0; - 80385e4: 2300 movs r3, #0 + 8038668: 2300 movs r3, #0 } } - 80385e6: 4618 mov r0, r3 - 80385e8: 3710 adds r7, #16 - 80385ea: 46bd mov sp, r7 - 80385ec: bd80 pop {r7, pc} - 80385ee: bf00 nop - 80385f0: 08042d98 .word 0x08042d98 - 80385f4: 08042ff4 .word 0x08042ff4 - 80385f8: 08042ddc .word 0x08042ddc - 80385fc: 08043018 .word 0x08043018 + 803866a: 4618 mov r0, r3 + 803866c: 3710 adds r7, #16 + 803866e: 46bd mov sp, r7 + 8038670: bd80 pop {r7, pc} + 8038672: bf00 nop + 8038674: 08042e18 .word 0x08042e18 + 8038678: 08043074 .word 0x08043074 + 803867c: 08042e5c .word 0x08042e5c + 8038680: 08043098 .word 0x08043098 -08038600 : +08038684 : * @param pcb the tcp_pcb for which data is read * @param len the amount of bytes that have been read by the application */ void tcp_recved(struct tcp_pcb *pcb, u16_t len) { - 8038600: b580 push {r7, lr} - 8038602: b084 sub sp, #16 - 8038604: af00 add r7, sp, #0 - 8038606: 6078 str r0, [r7, #4] - 8038608: 460b mov r3, r1 - 803860a: 807b strh r3, [r7, #2] + 8038684: b580 push {r7, lr} + 8038686: b084 sub sp, #16 + 8038688: af00 add r7, sp, #0 + 803868a: 6078 str r0, [r7, #4] + 803868c: 460b mov r3, r1 + 803868e: 807b strh r3, [r7, #2] u32_t wnd_inflation; tcpwnd_size_t rcv_wnd; LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_recved: invalid pcb", pcb != NULL, return); - 803860c: 687b ldr r3, [r7, #4] - 803860e: 2b00 cmp r3, #0 - 8038610: d107 bne.n 8038622 - 8038612: 4b1f ldr r3, [pc, #124] ; (8038690 ) - 8038614: f240 32cf movw r2, #975 ; 0x3cf - 8038618: 491e ldr r1, [pc, #120] ; (8038694 ) - 803861a: 481f ldr r0, [pc, #124] ; (8038698 ) - 803861c: f008 fa78 bl 8040b10 - 8038620: e032 b.n 8038688 + 8038690: 687b ldr r3, [r7, #4] + 8038692: 2b00 cmp r3, #0 + 8038694: d107 bne.n 80386a6 + 8038696: 4b1f ldr r3, [pc, #124] ; (8038714 ) + 8038698: f240 32cf movw r2, #975 ; 0x3cf + 803869c: 491e ldr r1, [pc, #120] ; (8038718 ) + 803869e: 481f ldr r0, [pc, #124] ; (803871c ) + 80386a0: f008 fa78 bl 8040b94 + 80386a4: e032 b.n 803870c /* pcb->state LISTEN not allowed here */ LWIP_ASSERT("don't call tcp_recved for listen-pcbs", - 8038622: 687b ldr r3, [r7, #4] - 8038624: 7d1b ldrb r3, [r3, #20] - 8038626: 2b01 cmp r3, #1 - 8038628: d106 bne.n 8038638 - 803862a: 4b19 ldr r3, [pc, #100] ; (8038690 ) - 803862c: f240 32d2 movw r2, #978 ; 0x3d2 - 8038630: 491a ldr r1, [pc, #104] ; (803869c ) - 8038632: 4819 ldr r0, [pc, #100] ; (8038698 ) - 8038634: f008 fa6c bl 8040b10 + 80386a6: 687b ldr r3, [r7, #4] + 80386a8: 7d1b ldrb r3, [r3, #20] + 80386aa: 2b01 cmp r3, #1 + 80386ac: d106 bne.n 80386bc + 80386ae: 4b19 ldr r3, [pc, #100] ; (8038714 ) + 80386b0: f240 32d2 movw r2, #978 ; 0x3d2 + 80386b4: 491a ldr r1, [pc, #104] ; (8038720 ) + 80386b6: 4819 ldr r0, [pc, #100] ; (803871c ) + 80386b8: f008 fa6c bl 8040b94 pcb->state != LISTEN); rcv_wnd = (tcpwnd_size_t)(pcb->rcv_wnd + len); - 8038638: 687b ldr r3, [r7, #4] - 803863a: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803863c: 887b ldrh r3, [r7, #2] - 803863e: 4413 add r3, r2 - 8038640: 81fb strh r3, [r7, #14] + 80386bc: 687b ldr r3, [r7, #4] + 80386be: 8d1a ldrh r2, [r3, #40] ; 0x28 + 80386c0: 887b ldrh r3, [r7, #2] + 80386c2: 4413 add r3, r2 + 80386c4: 81fb strh r3, [r7, #14] if ((rcv_wnd > TCP_WND_MAX(pcb)) || (rcv_wnd < pcb->rcv_wnd)) { - 8038642: 89fb ldrh r3, [r7, #14] - 8038644: f5b3 6f06 cmp.w r3, #2144 ; 0x860 - 8038648: d804 bhi.n 8038654 - 803864a: 687b ldr r3, [r7, #4] - 803864c: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803864e: 89fa ldrh r2, [r7, #14] - 8038650: 429a cmp r2, r3 - 8038652: d204 bcs.n 803865e + 80386c6: 89fb ldrh r3, [r7, #14] + 80386c8: f5b3 6f06 cmp.w r3, #2144 ; 0x860 + 80386cc: d804 bhi.n 80386d8 + 80386ce: 687b ldr r3, [r7, #4] + 80386d0: 8d1b ldrh r3, [r3, #40] ; 0x28 + 80386d2: 89fa ldrh r2, [r7, #14] + 80386d4: 429a cmp r2, r3 + 80386d6: d204 bcs.n 80386e2 /* window got too big or tcpwnd_size_t overflow */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: window got too big or tcpwnd_size_t overflow\n")); pcb->rcv_wnd = TCP_WND_MAX(pcb); - 8038654: 687b ldr r3, [r7, #4] - 8038656: f44f 6206 mov.w r2, #2144 ; 0x860 - 803865a: 851a strh r2, [r3, #40] ; 0x28 - 803865c: e002 b.n 8038664 + 80386d8: 687b ldr r3, [r7, #4] + 80386da: f44f 6206 mov.w r2, #2144 ; 0x860 + 80386de: 851a strh r2, [r3, #40] ; 0x28 + 80386e0: e002 b.n 80386e8 } else { pcb->rcv_wnd = rcv_wnd; - 803865e: 687b ldr r3, [r7, #4] - 8038660: 89fa ldrh r2, [r7, #14] - 8038662: 851a strh r2, [r3, #40] ; 0x28 + 80386e2: 687b ldr r3, [r7, #4] + 80386e4: 89fa ldrh r2, [r7, #14] + 80386e6: 851a strh r2, [r3, #40] ; 0x28 } wnd_inflation = tcp_update_rcv_ann_wnd(pcb); - 8038664: 6878 ldr r0, [r7, #4] - 8038666: f7ff ff71 bl 803854c - 803866a: 60b8 str r0, [r7, #8] + 80386e8: 6878 ldr r0, [r7, #4] + 80386ea: f7ff ff71 bl 80385d0 + 80386ee: 60b8 str r0, [r7, #8] /* If the change in the right edge of window is significant (default * watermark is TCP_WND/4), then send an explicit update now. * Otherwise wait for a packet to be sent in the normal course of * events (or more window to be available later) */ if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) { - 803866c: 68bb ldr r3, [r7, #8] - 803866e: f5b3 7f06 cmp.w r3, #536 ; 0x218 - 8038672: d309 bcc.n 8038688 + 80386f0: 68bb ldr r3, [r7, #8] + 80386f2: f5b3 7f06 cmp.w r3, #536 ; 0x218 + 80386f6: d309 bcc.n 803870c tcp_ack_now(pcb); - 8038674: 687b ldr r3, [r7, #4] - 8038676: 8b5b ldrh r3, [r3, #26] - 8038678: f043 0302 orr.w r3, r3, #2 - 803867c: b29a uxth r2, r3 - 803867e: 687b ldr r3, [r7, #4] - 8038680: 835a strh r2, [r3, #26] + 80386f8: 687b ldr r3, [r7, #4] + 80386fa: 8b5b ldrh r3, [r3, #26] + 80386fc: f043 0302 orr.w r3, r3, #2 + 8038700: b29a uxth r2, r3 + 8038702: 687b ldr r3, [r7, #4] + 8038704: 835a strh r2, [r3, #26] tcp_output(pcb); - 8038682: 6878 ldr r0, [r7, #4] - 8038684: f004 fb8a bl 803cd9c + 8038706: 6878 ldr r0, [r7, #4] + 8038708: f004 fb8a bl 803ce20 } LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: received %"U16_F" bytes, wnd %"TCPWNDSIZE_F" (%"TCPWNDSIZE_F").\n", len, pcb->rcv_wnd, (u16_t)(TCP_WND_MAX(pcb) - pcb->rcv_wnd))); } - 8038688: 3710 adds r7, #16 - 803868a: 46bd mov sp, r7 - 803868c: bd80 pop {r7, pc} - 803868e: bf00 nop - 8038690: 08042d98 .word 0x08042d98 - 8038694: 08043034 .word 0x08043034 - 8038698: 08042ddc .word 0x08042ddc - 803869c: 0804304c .word 0x0804304c + 803870c: 3710 adds r7, #16 + 803870e: 46bd mov sp, r7 + 8038710: bd80 pop {r7, pc} + 8038712: bf00 nop + 8038714: 08042e18 .word 0x08042e18 + 8038718: 080430b4 .word 0x080430b4 + 803871c: 08042e5c .word 0x08042e5c + 8038720: 080430cc .word 0x080430cc -080386a0 : +08038724 : * * @return a new (free) local TCP port number */ static u16_t tcp_new_port(void) { - 80386a0: b480 push {r7} - 80386a2: b083 sub sp, #12 - 80386a4: af00 add r7, sp, #0 + 8038724: b480 push {r7} + 8038726: b083 sub sp, #12 + 8038728: af00 add r7, sp, #0 u8_t i; u16_t n = 0; - 80386a6: 2300 movs r3, #0 - 80386a8: 80bb strh r3, [r7, #4] + 803872a: 2300 movs r3, #0 + 803872c: 80bb strh r3, [r7, #4] struct tcp_pcb *pcb; again: tcp_port++; - 80386aa: 4b1e ldr r3, [pc, #120] ; (8038724 ) - 80386ac: 881b ldrh r3, [r3, #0] - 80386ae: 3301 adds r3, #1 - 80386b0: b29a uxth r2, r3 - 80386b2: 4b1c ldr r3, [pc, #112] ; (8038724 ) - 80386b4: 801a strh r2, [r3, #0] + 803872e: 4b1e ldr r3, [pc, #120] ; (80387a8 ) + 8038730: 881b ldrh r3, [r3, #0] + 8038732: 3301 adds r3, #1 + 8038734: b29a uxth r2, r3 + 8038736: 4b1c ldr r3, [pc, #112] ; (80387a8 ) + 8038738: 801a strh r2, [r3, #0] if (tcp_port == TCP_LOCAL_PORT_RANGE_END) { - 80386b6: 4b1b ldr r3, [pc, #108] ; (8038724 ) - 80386b8: 881b ldrh r3, [r3, #0] - 80386ba: f64f 72ff movw r2, #65535 ; 0xffff - 80386be: 4293 cmp r3, r2 - 80386c0: d103 bne.n 80386ca + 803873a: 4b1b ldr r3, [pc, #108] ; (80387a8 ) + 803873c: 881b ldrh r3, [r3, #0] + 803873e: f64f 72ff movw r2, #65535 ; 0xffff + 8038742: 4293 cmp r3, r2 + 8038744: d103 bne.n 803874e tcp_port = TCP_LOCAL_PORT_RANGE_START; - 80386c2: 4b18 ldr r3, [pc, #96] ; (8038724 ) - 80386c4: f44f 4240 mov.w r2, #49152 ; 0xc000 - 80386c8: 801a strh r2, [r3, #0] + 8038746: 4b18 ldr r3, [pc, #96] ; (80387a8 ) + 8038748: f44f 4240 mov.w r2, #49152 ; 0xc000 + 803874c: 801a strh r2, [r3, #0] } /* Check all PCB lists. */ for (i = 0; i < NUM_TCP_PCB_LISTS; i++) { - 80386ca: 2300 movs r3, #0 - 80386cc: 71fb strb r3, [r7, #7] - 80386ce: e01e b.n 803870e + 803874e: 2300 movs r3, #0 + 8038750: 71fb strb r3, [r7, #7] + 8038752: e01e b.n 8038792 for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) { - 80386d0: 79fb ldrb r3, [r7, #7] - 80386d2: 4a15 ldr r2, [pc, #84] ; (8038728 ) - 80386d4: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 80386d8: 681b ldr r3, [r3, #0] - 80386da: 603b str r3, [r7, #0] - 80386dc: e011 b.n 8038702 + 8038754: 79fb ldrb r3, [r7, #7] + 8038756: 4a15 ldr r2, [pc, #84] ; (80387ac ) + 8038758: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 803875c: 681b ldr r3, [r3, #0] + 803875e: 603b str r3, [r7, #0] + 8038760: e011 b.n 8038786 if (pcb->local_port == tcp_port) { - 80386de: 683b ldr r3, [r7, #0] - 80386e0: 8ada ldrh r2, [r3, #22] - 80386e2: 4b10 ldr r3, [pc, #64] ; (8038724 ) - 80386e4: 881b ldrh r3, [r3, #0] - 80386e6: 429a cmp r2, r3 - 80386e8: d108 bne.n 80386fc + 8038762: 683b ldr r3, [r7, #0] + 8038764: 8ada ldrh r2, [r3, #22] + 8038766: 4b10 ldr r3, [pc, #64] ; (80387a8 ) + 8038768: 881b ldrh r3, [r3, #0] + 803876a: 429a cmp r2, r3 + 803876c: d108 bne.n 8038780 n++; - 80386ea: 88bb ldrh r3, [r7, #4] - 80386ec: 3301 adds r3, #1 - 80386ee: 80bb strh r3, [r7, #4] + 803876e: 88bb ldrh r3, [r7, #4] + 8038770: 3301 adds r3, #1 + 8038772: 80bb strh r3, [r7, #4] if (n > (TCP_LOCAL_PORT_RANGE_END - TCP_LOCAL_PORT_RANGE_START)) { - 80386f0: 88bb ldrh r3, [r7, #4] - 80386f2: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 - 80386f6: d3d8 bcc.n 80386aa + 8038774: 88bb ldrh r3, [r7, #4] + 8038776: f5b3 4f80 cmp.w r3, #16384 ; 0x4000 + 803877a: d3d8 bcc.n 803872e return 0; - 80386f8: 2300 movs r3, #0 - 80386fa: e00d b.n 8038718 + 803877c: 2300 movs r3, #0 + 803877e: e00d b.n 803879c for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) { - 80386fc: 683b ldr r3, [r7, #0] - 80386fe: 68db ldr r3, [r3, #12] - 8038700: 603b str r3, [r7, #0] - 8038702: 683b ldr r3, [r7, #0] - 8038704: 2b00 cmp r3, #0 - 8038706: d1ea bne.n 80386de + 8038780: 683b ldr r3, [r7, #0] + 8038782: 68db ldr r3, [r3, #12] + 8038784: 603b str r3, [r7, #0] + 8038786: 683b ldr r3, [r7, #0] + 8038788: 2b00 cmp r3, #0 + 803878a: d1ea bne.n 8038762 for (i = 0; i < NUM_TCP_PCB_LISTS; i++) { - 8038708: 79fb ldrb r3, [r7, #7] - 803870a: 3301 adds r3, #1 - 803870c: 71fb strb r3, [r7, #7] - 803870e: 79fb ldrb r3, [r7, #7] - 8038710: 2b03 cmp r3, #3 - 8038712: d9dd bls.n 80386d0 + 803878c: 79fb ldrb r3, [r7, #7] + 803878e: 3301 adds r3, #1 + 8038790: 71fb strb r3, [r7, #7] + 8038792: 79fb ldrb r3, [r7, #7] + 8038794: 2b03 cmp r3, #3 + 8038796: d9dd bls.n 8038754 } goto again; } } } return tcp_port; - 8038714: 4b03 ldr r3, [pc, #12] ; (8038724 ) - 8038716: 881b ldrh r3, [r3, #0] -} - 8038718: 4618 mov r0, r3 - 803871a: 370c adds r7, #12 - 803871c: 46bd mov sp, r7 - 803871e: f85d 7b04 ldr.w r7, [sp], #4 - 8038722: 4770 bx lr - 8038724: 2400006c .word 0x2400006c - 8038728: 08044dd8 .word 0x08044dd8 - -0803872c : + 8038798: 4b03 ldr r3, [pc, #12] ; (80387a8 ) + 803879a: 881b ldrh r3, [r3, #0] +} + 803879c: 4618 mov r0, r3 + 803879e: 370c adds r7, #12 + 80387a0: 46bd mov sp, r7 + 80387a2: f85d 7b04 ldr.w r7, [sp], #4 + 80387a6: 4770 bx lr + 80387a8: 2400006c .word 0x2400006c + 80387ac: 08044e58 .word 0x08044e58 + +080387b0 : * * Automatically called from tcp_tmr(). */ void tcp_slowtmr(void) { - 803872c: b5b0 push {r4, r5, r7, lr} - 803872e: b090 sub sp, #64 ; 0x40 - 8038730: af04 add r7, sp, #16 + 80387b0: b5b0 push {r4, r5, r7, lr} + 80387b2: b090 sub sp, #64 ; 0x40 + 80387b4: af04 add r7, sp, #16 tcpwnd_size_t eff_wnd; u8_t pcb_remove; /* flag if a PCB should be removed */ u8_t pcb_reset; /* flag if a RST should be sent when removing */ err_t err; err = ERR_OK; - 8038732: 2300 movs r3, #0 - 8038734: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 80387b6: 2300 movs r3, #0 + 80387b8: f887 3025 strb.w r3, [r7, #37] ; 0x25 ++tcp_ticks; - 8038738: 4b94 ldr r3, [pc, #592] ; (803898c ) - 803873a: 681b ldr r3, [r3, #0] - 803873c: 3301 adds r3, #1 - 803873e: 4a93 ldr r2, [pc, #588] ; (803898c ) - 8038740: 6013 str r3, [r2, #0] + 80387bc: 4b94 ldr r3, [pc, #592] ; (8038a10 ) + 80387be: 681b ldr r3, [r3, #0] + 80387c0: 3301 adds r3, #1 + 80387c2: 4a93 ldr r2, [pc, #588] ; (8038a10 ) + 80387c4: 6013 str r3, [r2, #0] ++tcp_timer_ctr; - 8038742: 4b93 ldr r3, [pc, #588] ; (8038990 ) - 8038744: 781b ldrb r3, [r3, #0] - 8038746: 3301 adds r3, #1 - 8038748: b2da uxtb r2, r3 - 803874a: 4b91 ldr r3, [pc, #580] ; (8038990 ) - 803874c: 701a strb r2, [r3, #0] + 80387c6: 4b93 ldr r3, [pc, #588] ; (8038a14 ) + 80387c8: 781b ldrb r3, [r3, #0] + 80387ca: 3301 adds r3, #1 + 80387cc: b2da uxtb r2, r3 + 80387ce: 4b91 ldr r3, [pc, #580] ; (8038a14 ) + 80387d0: 701a strb r2, [r3, #0] tcp_slowtmr_start: /* Steps through all of the active PCBs. */ prev = NULL; - 803874e: 2300 movs r3, #0 - 8038750: 62bb str r3, [r7, #40] ; 0x28 + 80387d2: 2300 movs r3, #0 + 80387d4: 62bb str r3, [r7, #40] ; 0x28 pcb = tcp_active_pcbs; - 8038752: 4b90 ldr r3, [pc, #576] ; (8038994 ) - 8038754: 681b ldr r3, [r3, #0] - 8038756: 62fb str r3, [r7, #44] ; 0x2c + 80387d6: 4b90 ldr r3, [pc, #576] ; (8038a18 ) + 80387d8: 681b ldr r3, [r3, #0] + 80387da: 62fb str r3, [r7, #44] ; 0x2c if (pcb == NULL) { LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: no active pcbs\n")); } while (pcb != NULL) { - 8038758: e29d b.n 8038c96 + 80387dc: e29d b.n 8038d1a LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: processing active pcb\n")); LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED); - 803875a: 6afb ldr r3, [r7, #44] ; 0x2c - 803875c: 7d1b ldrb r3, [r3, #20] - 803875e: 2b00 cmp r3, #0 - 8038760: d106 bne.n 8038770 - 8038762: 4b8d ldr r3, [pc, #564] ; (8038998 ) - 8038764: f240 42be movw r2, #1214 ; 0x4be - 8038768: 498c ldr r1, [pc, #560] ; (803899c ) - 803876a: 488d ldr r0, [pc, #564] ; (80389a0 ) - 803876c: f008 f9d0 bl 8040b10 + 80387de: 6afb ldr r3, [r7, #44] ; 0x2c + 80387e0: 7d1b ldrb r3, [r3, #20] + 80387e2: 2b00 cmp r3, #0 + 80387e4: d106 bne.n 80387f4 + 80387e6: 4b8d ldr r3, [pc, #564] ; (8038a1c ) + 80387e8: f240 42be movw r2, #1214 ; 0x4be + 80387ec: 498c ldr r1, [pc, #560] ; (8038a20 ) + 80387ee: 488d ldr r0, [pc, #564] ; (8038a24 ) + 80387f0: f008 f9d0 bl 8040b94 LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN); - 8038770: 6afb ldr r3, [r7, #44] ; 0x2c - 8038772: 7d1b ldrb r3, [r3, #20] - 8038774: 2b01 cmp r3, #1 - 8038776: d106 bne.n 8038786 - 8038778: 4b87 ldr r3, [pc, #540] ; (8038998 ) - 803877a: f240 42bf movw r2, #1215 ; 0x4bf - 803877e: 4989 ldr r1, [pc, #548] ; (80389a4 ) - 8038780: 4887 ldr r0, [pc, #540] ; (80389a0 ) - 8038782: f008 f9c5 bl 8040b10 + 80387f4: 6afb ldr r3, [r7, #44] ; 0x2c + 80387f6: 7d1b ldrb r3, [r3, #20] + 80387f8: 2b01 cmp r3, #1 + 80387fa: d106 bne.n 803880a + 80387fc: 4b87 ldr r3, [pc, #540] ; (8038a1c ) + 80387fe: f240 42bf movw r2, #1215 ; 0x4bf + 8038802: 4989 ldr r1, [pc, #548] ; (8038a28 ) + 8038804: 4887 ldr r0, [pc, #540] ; (8038a24 ) + 8038806: f008 f9c5 bl 8040b94 LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT); - 8038786: 6afb ldr r3, [r7, #44] ; 0x2c - 8038788: 7d1b ldrb r3, [r3, #20] - 803878a: 2b0a cmp r3, #10 - 803878c: d106 bne.n 803879c - 803878e: 4b82 ldr r3, [pc, #520] ; (8038998 ) - 8038790: f44f 6298 mov.w r2, #1216 ; 0x4c0 - 8038794: 4984 ldr r1, [pc, #528] ; (80389a8 ) - 8038796: 4882 ldr r0, [pc, #520] ; (80389a0 ) - 8038798: f008 f9ba bl 8040b10 + 803880a: 6afb ldr r3, [r7, #44] ; 0x2c + 803880c: 7d1b ldrb r3, [r3, #20] + 803880e: 2b0a cmp r3, #10 + 8038810: d106 bne.n 8038820 + 8038812: 4b82 ldr r3, [pc, #520] ; (8038a1c ) + 8038814: f44f 6298 mov.w r2, #1216 ; 0x4c0 + 8038818: 4984 ldr r1, [pc, #528] ; (8038a2c ) + 803881a: 4882 ldr r0, [pc, #520] ; (8038a24 ) + 803881c: f008 f9ba bl 8040b94 if (pcb->last_timer == tcp_timer_ctr) { - 803879c: 6afb ldr r3, [r7, #44] ; 0x2c - 803879e: 7f9a ldrb r2, [r3, #30] - 80387a0: 4b7b ldr r3, [pc, #492] ; (8038990 ) - 80387a2: 781b ldrb r3, [r3, #0] - 80387a4: 429a cmp r2, r3 - 80387a6: d105 bne.n 80387b4 + 8038820: 6afb ldr r3, [r7, #44] ; 0x2c + 8038822: 7f9a ldrb r2, [r3, #30] + 8038824: 4b7b ldr r3, [pc, #492] ; (8038a14 ) + 8038826: 781b ldrb r3, [r3, #0] + 8038828: 429a cmp r2, r3 + 803882a: d105 bne.n 8038838 /* skip this pcb, we have already processed it */ prev = pcb; - 80387a8: 6afb ldr r3, [r7, #44] ; 0x2c - 80387aa: 62bb str r3, [r7, #40] ; 0x28 + 803882c: 6afb ldr r3, [r7, #44] ; 0x2c + 803882e: 62bb str r3, [r7, #40] ; 0x28 pcb = pcb->next; - 80387ac: 6afb ldr r3, [r7, #44] ; 0x2c - 80387ae: 68db ldr r3, [r3, #12] - 80387b0: 62fb str r3, [r7, #44] ; 0x2c + 8038830: 6afb ldr r3, [r7, #44] ; 0x2c + 8038832: 68db ldr r3, [r3, #12] + 8038834: 62fb str r3, [r7, #44] ; 0x2c continue; - 80387b2: e270 b.n 8038c96 + 8038836: e270 b.n 8038d1a } pcb->last_timer = tcp_timer_ctr; - 80387b4: 4b76 ldr r3, [pc, #472] ; (8038990 ) - 80387b6: 781a ldrb r2, [r3, #0] - 80387b8: 6afb ldr r3, [r7, #44] ; 0x2c - 80387ba: 779a strb r2, [r3, #30] + 8038838: 4b76 ldr r3, [pc, #472] ; (8038a14 ) + 803883a: 781a ldrb r2, [r3, #0] + 803883c: 6afb ldr r3, [r7, #44] ; 0x2c + 803883e: 779a strb r2, [r3, #30] pcb_remove = 0; - 80387bc: 2300 movs r3, #0 - 80387be: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038840: 2300 movs r3, #0 + 8038842: f887 3027 strb.w r3, [r7, #39] ; 0x27 pcb_reset = 0; - 80387c2: 2300 movs r3, #0 - 80387c4: f887 3026 strb.w r3, [r7, #38] ; 0x26 + 8038846: 2300 movs r3, #0 + 8038848: f887 3026 strb.w r3, [r7, #38] ; 0x26 if (pcb->state == SYN_SENT && pcb->nrtx >= TCP_SYNMAXRTX) { - 80387c8: 6afb ldr r3, [r7, #44] ; 0x2c - 80387ca: 7d1b ldrb r3, [r3, #20] - 80387cc: 2b02 cmp r3, #2 - 80387ce: d10a bne.n 80387e6 - 80387d0: 6afb ldr r3, [r7, #44] ; 0x2c - 80387d2: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 80387d6: 2b05 cmp r3, #5 - 80387d8: d905 bls.n 80387e6 + 803884c: 6afb ldr r3, [r7, #44] ; 0x2c + 803884e: 7d1b ldrb r3, [r3, #20] + 8038850: 2b02 cmp r3, #2 + 8038852: d10a bne.n 803886a + 8038854: 6afb ldr r3, [r7, #44] ; 0x2c + 8038856: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803885a: 2b05 cmp r3, #5 + 803885c: d905 bls.n 803886a ++pcb_remove; - 80387da: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 80387de: 3301 adds r3, #1 - 80387e0: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 80387e4: e11e b.n 8038a24 + 803885e: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038862: 3301 adds r3, #1 + 8038864: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038868: e11e b.n 8038aa8 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n")); } else if (pcb->nrtx >= TCP_MAXRTX) { - 80387e6: 6afb ldr r3, [r7, #44] ; 0x2c - 80387e8: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 80387ec: 2b0b cmp r3, #11 - 80387ee: d905 bls.n 80387fc + 803886a: 6afb ldr r3, [r7, #44] ; 0x2c + 803886c: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 8038870: 2b0b cmp r3, #11 + 8038872: d905 bls.n 8038880 ++pcb_remove; - 80387f0: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 80387f4: 3301 adds r3, #1 - 80387f6: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 80387fa: e113 b.n 8038a24 + 8038874: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038878: 3301 adds r3, #1 + 803887a: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803887e: e113 b.n 8038aa8 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max DATA retries reached\n")); } else { if (pcb->persist_backoff > 0) { - 80387fc: 6afb ldr r3, [r7, #44] ; 0x2c - 80387fe: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 8038802: 2b00 cmp r3, #0 - 8038804: d075 beq.n 80388f2 + 8038880: 6afb ldr r3, [r7, #44] ; 0x2c + 8038882: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 8038886: 2b00 cmp r3, #0 + 8038888: d075 beq.n 8038976 LWIP_ASSERT("tcp_slowtimr: persist ticking with in-flight data", pcb->unacked == NULL); - 8038806: 6afb ldr r3, [r7, #44] ; 0x2c - 8038808: 6f1b ldr r3, [r3, #112] ; 0x70 - 803880a: 2b00 cmp r3, #0 - 803880c: d006 beq.n 803881c - 803880e: 4b62 ldr r3, [pc, #392] ; (8038998 ) - 8038810: f240 42d4 movw r2, #1236 ; 0x4d4 - 8038814: 4965 ldr r1, [pc, #404] ; (80389ac ) - 8038816: 4862 ldr r0, [pc, #392] ; (80389a0 ) - 8038818: f008 f97a bl 8040b10 + 803888a: 6afb ldr r3, [r7, #44] ; 0x2c + 803888c: 6f1b ldr r3, [r3, #112] ; 0x70 + 803888e: 2b00 cmp r3, #0 + 8038890: d006 beq.n 80388a0 + 8038892: 4b62 ldr r3, [pc, #392] ; (8038a1c ) + 8038894: f240 42d4 movw r2, #1236 ; 0x4d4 + 8038898: 4965 ldr r1, [pc, #404] ; (8038a30 ) + 803889a: 4862 ldr r0, [pc, #392] ; (8038a24 ) + 803889c: f008 f97a bl 8040b94 LWIP_ASSERT("tcp_slowtimr: persist ticking with empty send buffer", pcb->unsent != NULL); - 803881c: 6afb ldr r3, [r7, #44] ; 0x2c - 803881e: 6edb ldr r3, [r3, #108] ; 0x6c - 8038820: 2b00 cmp r3, #0 - 8038822: d106 bne.n 8038832 - 8038824: 4b5c ldr r3, [pc, #368] ; (8038998 ) - 8038826: f240 42d5 movw r2, #1237 ; 0x4d5 - 803882a: 4961 ldr r1, [pc, #388] ; (80389b0 ) - 803882c: 485c ldr r0, [pc, #368] ; (80389a0 ) - 803882e: f008 f96f bl 8040b10 + 80388a0: 6afb ldr r3, [r7, #44] ; 0x2c + 80388a2: 6edb ldr r3, [r3, #108] ; 0x6c + 80388a4: 2b00 cmp r3, #0 + 80388a6: d106 bne.n 80388b6 + 80388a8: 4b5c ldr r3, [pc, #368] ; (8038a1c ) + 80388aa: f240 42d5 movw r2, #1237 ; 0x4d5 + 80388ae: 4961 ldr r1, [pc, #388] ; (8038a34 ) + 80388b0: 485c ldr r0, [pc, #368] ; (8038a24 ) + 80388b2: f008 f96f bl 8040b94 if (pcb->persist_probe >= TCP_MAXRTX) { - 8038832: 6afb ldr r3, [r7, #44] ; 0x2c - 8038834: f893 309a ldrb.w r3, [r3, #154] ; 0x9a - 8038838: 2b0b cmp r3, #11 - 803883a: d905 bls.n 8038848 + 80388b6: 6afb ldr r3, [r7, #44] ; 0x2c + 80388b8: f893 309a ldrb.w r3, [r3, #154] ; 0x9a + 80388bc: 2b0b cmp r3, #11 + 80388be: d905 bls.n 80388cc ++pcb_remove; /* max probes reached */ - 803883c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038840: 3301 adds r3, #1 - 8038842: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 8038846: e0ed b.n 8038a24 + 80388c0: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 80388c4: 3301 adds r3, #1 + 80388c6: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 80388ca: e0ed b.n 8038aa8 } else { u8_t backoff_cnt = tcp_persist_backoff[pcb->persist_backoff - 1]; - 8038848: 6afb ldr r3, [r7, #44] ; 0x2c - 803884a: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 803884e: 3b01 subs r3, #1 - 8038850: 4a58 ldr r2, [pc, #352] ; (80389b4 ) - 8038852: 5cd3 ldrb r3, [r2, r3] - 8038854: 747b strb r3, [r7, #17] + 80388cc: 6afb ldr r3, [r7, #44] ; 0x2c + 80388ce: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 80388d2: 3b01 subs r3, #1 + 80388d4: 4a58 ldr r2, [pc, #352] ; (8038a38 ) + 80388d6: 5cd3 ldrb r3, [r2, r3] + 80388d8: 747b strb r3, [r7, #17] if (pcb->persist_cnt < backoff_cnt) { - 8038856: 6afb ldr r3, [r7, #44] ; 0x2c - 8038858: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 803885c: 7c7a ldrb r2, [r7, #17] - 803885e: 429a cmp r2, r3 - 8038860: d907 bls.n 8038872 + 80388da: 6afb ldr r3, [r7, #44] ; 0x2c + 80388dc: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 80388e0: 7c7a ldrb r2, [r7, #17] + 80388e2: 429a cmp r2, r3 + 80388e4: d907 bls.n 80388f6 pcb->persist_cnt++; - 8038862: 6afb ldr r3, [r7, #44] ; 0x2c - 8038864: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 8038868: 3301 adds r3, #1 - 803886a: b2da uxtb r2, r3 - 803886c: 6afb ldr r3, [r7, #44] ; 0x2c - 803886e: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 80388e6: 6afb ldr r3, [r7, #44] ; 0x2c + 80388e8: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 80388ec: 3301 adds r3, #1 + 80388ee: b2da uxtb r2, r3 + 80388f0: 6afb ldr r3, [r7, #44] ; 0x2c + 80388f2: f883 2098 strb.w r2, [r3, #152] ; 0x98 } if (pcb->persist_cnt >= backoff_cnt) { - 8038872: 6afb ldr r3, [r7, #44] ; 0x2c - 8038874: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 - 8038878: 7c7a ldrb r2, [r7, #17] - 803887a: 429a cmp r2, r3 - 803887c: f200 80d2 bhi.w 8038a24 + 80388f6: 6afb ldr r3, [r7, #44] ; 0x2c + 80388f8: f893 3098 ldrb.w r3, [r3, #152] ; 0x98 + 80388fc: 7c7a ldrb r2, [r7, #17] + 80388fe: 429a cmp r2, r3 + 8038900: f200 80d2 bhi.w 8038aa8 int next_slot = 1; /* increment timer to next slot */ - 8038880: 2301 movs r3, #1 - 8038882: 623b str r3, [r7, #32] + 8038904: 2301 movs r3, #1 + 8038906: 623b str r3, [r7, #32] /* If snd_wnd is zero, send 1 byte probes */ if (pcb->snd_wnd == 0) { - 8038884: 6afb ldr r3, [r7, #44] ; 0x2c - 8038886: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803888a: 2b00 cmp r3, #0 - 803888c: d108 bne.n 80388a0 + 8038908: 6afb ldr r3, [r7, #44] ; 0x2c + 803890a: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803890e: 2b00 cmp r3, #0 + 8038910: d108 bne.n 8038924 if (tcp_zero_window_probe(pcb) != ERR_OK) { - 803888e: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038890: f005 f92c bl 803daec - 8038894: 4603 mov r3, r0 - 8038896: 2b00 cmp r3, #0 - 8038898: d014 beq.n 80388c4 + 8038912: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038914: f005 f92c bl 803db70 + 8038918: 4603 mov r3, r0 + 803891a: 2b00 cmp r3, #0 + 803891c: d014 beq.n 8038948 next_slot = 0; /* try probe again with current slot */ - 803889a: 2300 movs r3, #0 - 803889c: 623b str r3, [r7, #32] - 803889e: e011 b.n 80388c4 + 803891e: 2300 movs r3, #0 + 8038920: 623b str r3, [r7, #32] + 8038922: e011 b.n 8038948 } /* snd_wnd not fully closed, split unsent head and fill window */ } else { if (tcp_split_unsent_seg(pcb, (u16_t)pcb->snd_wnd) == ERR_OK) { - 80388a0: 6afb ldr r3, [r7, #44] ; 0x2c - 80388a2: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 80388a6: 4619 mov r1, r3 - 80388a8: 6af8 ldr r0, [r7, #44] ; 0x2c - 80388aa: f003 fff1 bl 803c890 - 80388ae: 4603 mov r3, r0 - 80388b0: 2b00 cmp r3, #0 - 80388b2: d107 bne.n 80388c4 + 8038924: 6afb ldr r3, [r7, #44] ; 0x2c + 8038926: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803892a: 4619 mov r1, r3 + 803892c: 6af8 ldr r0, [r7, #44] ; 0x2c + 803892e: f003 fff1 bl 803c914 + 8038932: 4603 mov r3, r0 + 8038934: 2b00 cmp r3, #0 + 8038936: d107 bne.n 8038948 if (tcp_output(pcb) == ERR_OK) { - 80388b4: 6af8 ldr r0, [r7, #44] ; 0x2c - 80388b6: f004 fa71 bl 803cd9c - 80388ba: 4603 mov r3, r0 - 80388bc: 2b00 cmp r3, #0 - 80388be: d101 bne.n 80388c4 + 8038938: 6af8 ldr r0, [r7, #44] ; 0x2c + 803893a: f004 fa71 bl 803ce20 + 803893e: 4603 mov r3, r0 + 8038940: 2b00 cmp r3, #0 + 8038942: d101 bne.n 8038948 /* sending will cancel persist timer, else retry with current slot */ next_slot = 0; - 80388c0: 2300 movs r3, #0 - 80388c2: 623b str r3, [r7, #32] + 8038944: 2300 movs r3, #0 + 8038946: 623b str r3, [r7, #32] } } } if (next_slot) { - 80388c4: 6a3b ldr r3, [r7, #32] - 80388c6: 2b00 cmp r3, #0 - 80388c8: f000 80ac beq.w 8038a24 + 8038948: 6a3b ldr r3, [r7, #32] + 803894a: 2b00 cmp r3, #0 + 803894c: f000 80ac beq.w 8038aa8 pcb->persist_cnt = 0; - 80388cc: 6afb ldr r3, [r7, #44] ; 0x2c - 80388ce: 2200 movs r2, #0 - 80388d0: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 8038950: 6afb ldr r3, [r7, #44] ; 0x2c + 8038952: 2200 movs r2, #0 + 8038954: f883 2098 strb.w r2, [r3, #152] ; 0x98 if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) { - 80388d4: 6afb ldr r3, [r7, #44] ; 0x2c - 80388d6: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 80388da: 2b06 cmp r3, #6 - 80388dc: f200 80a2 bhi.w 8038a24 + 8038958: 6afb ldr r3, [r7, #44] ; 0x2c + 803895a: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 803895e: 2b06 cmp r3, #6 + 8038960: f200 80a2 bhi.w 8038aa8 pcb->persist_backoff++; - 80388e0: 6afb ldr r3, [r7, #44] ; 0x2c - 80388e2: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 80388e6: 3301 adds r3, #1 - 80388e8: b2da uxtb r2, r3 - 80388ea: 6afb ldr r3, [r7, #44] ; 0x2c - 80388ec: f883 2099 strb.w r2, [r3, #153] ; 0x99 - 80388f0: e098 b.n 8038a24 + 8038964: 6afb ldr r3, [r7, #44] ; 0x2c + 8038966: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 803896a: 3301 adds r3, #1 + 803896c: b2da uxtb r2, r3 + 803896e: 6afb ldr r3, [r7, #44] ; 0x2c + 8038970: f883 2099 strb.w r2, [r3, #153] ; 0x99 + 8038974: e098 b.n 8038aa8 } } } } else { /* Increase the retransmission timer if it is running */ if ((pcb->rtime >= 0) && (pcb->rtime < 0x7FFF)) { - 80388f2: 6afb ldr r3, [r7, #44] ; 0x2c - 80388f4: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 80388f8: 2b00 cmp r3, #0 - 80388fa: db0f blt.n 803891c - 80388fc: 6afb ldr r3, [r7, #44] ; 0x2c - 80388fe: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 8038902: f647 72ff movw r2, #32767 ; 0x7fff - 8038906: 4293 cmp r3, r2 - 8038908: d008 beq.n 803891c + 8038976: 6afb ldr r3, [r7, #44] ; 0x2c + 8038978: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 803897c: 2b00 cmp r3, #0 + 803897e: db0f blt.n 80389a0 + 8038980: 6afb ldr r3, [r7, #44] ; 0x2c + 8038982: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 8038986: f647 72ff movw r2, #32767 ; 0x7fff + 803898a: 4293 cmp r3, r2 + 803898c: d008 beq.n 80389a0 ++pcb->rtime; - 803890a: 6afb ldr r3, [r7, #44] ; 0x2c - 803890c: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 8038910: b29b uxth r3, r3 - 8038912: 3301 adds r3, #1 - 8038914: b29b uxth r3, r3 - 8038916: b21a sxth r2, r3 - 8038918: 6afb ldr r3, [r7, #44] ; 0x2c - 803891a: 861a strh r2, [r3, #48] ; 0x30 + 803898e: 6afb ldr r3, [r7, #44] ; 0x2c + 8038990: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 8038994: b29b uxth r3, r3 + 8038996: 3301 adds r3, #1 + 8038998: b29b uxth r3, r3 + 803899a: b21a sxth r2, r3 + 803899c: 6afb ldr r3, [r7, #44] ; 0x2c + 803899e: 861a strh r2, [r3, #48] ; 0x30 } if (pcb->rtime >= pcb->rto) { - 803891c: 6afb ldr r3, [r7, #44] ; 0x2c - 803891e: f9b3 2030 ldrsh.w r2, [r3, #48] ; 0x30 - 8038922: 6afb ldr r3, [r7, #44] ; 0x2c - 8038924: f9b3 3040 ldrsh.w r3, [r3, #64] ; 0x40 - 8038928: 429a cmp r2, r3 - 803892a: db7b blt.n 8038a24 + 80389a0: 6afb ldr r3, [r7, #44] ; 0x2c + 80389a2: f9b3 2030 ldrsh.w r2, [r3, #48] ; 0x30 + 80389a6: 6afb ldr r3, [r7, #44] ; 0x2c + 80389a8: f9b3 3040 ldrsh.w r3, [r3, #64] ; 0x40 + 80389ac: 429a cmp r2, r3 + 80389ae: db7b blt.n 8038aa8 " pcb->rto %"S16_F"\n", pcb->rtime, pcb->rto)); /* If prepare phase fails but we have unsent data but no unacked data, still execute the backoff calculations below, as this means we somehow failed to send segment. */ if ((tcp_rexmit_rto_prepare(pcb) == ERR_OK) || ((pcb->unacked == NULL) && (pcb->unsent != NULL))) { - 803892c: 6af8 ldr r0, [r7, #44] ; 0x2c - 803892e: f004 fd27 bl 803d380 - 8038932: 4603 mov r3, r0 - 8038934: 2b00 cmp r3, #0 - 8038936: d007 beq.n 8038948 - 8038938: 6afb ldr r3, [r7, #44] ; 0x2c - 803893a: 6f1b ldr r3, [r3, #112] ; 0x70 - 803893c: 2b00 cmp r3, #0 - 803893e: d171 bne.n 8038a24 - 8038940: 6afb ldr r3, [r7, #44] ; 0x2c - 8038942: 6edb ldr r3, [r3, #108] ; 0x6c - 8038944: 2b00 cmp r3, #0 - 8038946: d06d beq.n 8038a24 + 80389b0: 6af8 ldr r0, [r7, #44] ; 0x2c + 80389b2: f004 fd27 bl 803d404 + 80389b6: 4603 mov r3, r0 + 80389b8: 2b00 cmp r3, #0 + 80389ba: d007 beq.n 80389cc + 80389bc: 6afb ldr r3, [r7, #44] ; 0x2c + 80389be: 6f1b ldr r3, [r3, #112] ; 0x70 + 80389c0: 2b00 cmp r3, #0 + 80389c2: d171 bne.n 8038aa8 + 80389c4: 6afb ldr r3, [r7, #44] ; 0x2c + 80389c6: 6edb ldr r3, [r3, #108] ; 0x6c + 80389c8: 2b00 cmp r3, #0 + 80389ca: d06d beq.n 8038aa8 /* Double retransmission time-out unless we are trying to * connect to somebody (i.e., we are in SYN_SENT). */ if (pcb->state != SYN_SENT) { - 8038948: 6afb ldr r3, [r7, #44] ; 0x2c - 803894a: 7d1b ldrb r3, [r3, #20] - 803894c: 2b02 cmp r3, #2 - 803894e: d03a beq.n 80389c6 + 80389cc: 6afb ldr r3, [r7, #44] ; 0x2c + 80389ce: 7d1b ldrb r3, [r3, #20] + 80389d0: 2b02 cmp r3, #2 + 80389d2: d03a beq.n 8038a4a u8_t backoff_idx = LWIP_MIN(pcb->nrtx, sizeof(tcp_backoff) - 1); - 8038950: 6afb ldr r3, [r7, #44] ; 0x2c - 8038952: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 8038956: 2b0c cmp r3, #12 - 8038958: bf28 it cs - 803895a: 230c movcs r3, #12 - 803895c: 76fb strb r3, [r7, #27] + 80389d4: 6afb ldr r3, [r7, #44] ; 0x2c + 80389d6: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 80389da: 2b0c cmp r3, #12 + 80389dc: bf28 it cs + 80389de: 230c movcs r3, #12 + 80389e0: 76fb strb r3, [r7, #27] int calc_rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[backoff_idx]; - 803895e: 6afb ldr r3, [r7, #44] ; 0x2c - 8038960: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 8038964: 10db asrs r3, r3, #3 - 8038966: b21b sxth r3, r3 - 8038968: 461a mov r2, r3 - 803896a: 6afb ldr r3, [r7, #44] ; 0x2c - 803896c: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 8038970: 4413 add r3, r2 - 8038972: 7efa ldrb r2, [r7, #27] - 8038974: 4910 ldr r1, [pc, #64] ; (80389b8 ) - 8038976: 5c8a ldrb r2, [r1, r2] - 8038978: 4093 lsls r3, r2 - 803897a: 617b str r3, [r7, #20] + 80389e2: 6afb ldr r3, [r7, #44] ; 0x2c + 80389e4: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 80389e8: 10db asrs r3, r3, #3 + 80389ea: b21b sxth r3, r3 + 80389ec: 461a mov r2, r3 + 80389ee: 6afb ldr r3, [r7, #44] ; 0x2c + 80389f0: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 80389f4: 4413 add r3, r2 + 80389f6: 7efa ldrb r2, [r7, #27] + 80389f8: 4910 ldr r1, [pc, #64] ; (8038a3c ) + 80389fa: 5c8a ldrb r2, [r1, r2] + 80389fc: 4093 lsls r3, r2 + 80389fe: 617b str r3, [r7, #20] pcb->rto = (s16_t)LWIP_MIN(calc_rto, 0x7FFF); - 803897c: 697b ldr r3, [r7, #20] - 803897e: f647 72fe movw r2, #32766 ; 0x7ffe - 8038982: 4293 cmp r3, r2 - 8038984: dc1a bgt.n 80389bc - 8038986: 697b ldr r3, [r7, #20] - 8038988: b21a sxth r2, r3 - 803898a: e019 b.n 80389c0 - 803898c: 2400e958 .word 0x2400e958 - 8038990: 2400e96e .word 0x2400e96e - 8038994: 2400e964 .word 0x2400e964 - 8038998: 08042d98 .word 0x08042d98 - 803899c: 080430dc .word 0x080430dc - 80389a0: 08042ddc .word 0x08042ddc - 80389a4: 08043108 .word 0x08043108 - 80389a8: 08043134 .word 0x08043134 - 80389ac: 08043164 .word 0x08043164 - 80389b0: 08043198 .word 0x08043198 - 80389b4: 08044dd0 .word 0x08044dd0 - 80389b8: 08044dc0 .word 0x08044dc0 - 80389bc: f647 72ff movw r2, #32767 ; 0x7fff - 80389c0: 6afb ldr r3, [r7, #44] ; 0x2c - 80389c2: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 + 8038a00: 697b ldr r3, [r7, #20] + 8038a02: f647 72fe movw r2, #32766 ; 0x7ffe + 8038a06: 4293 cmp r3, r2 + 8038a08: dc1a bgt.n 8038a40 + 8038a0a: 697b ldr r3, [r7, #20] + 8038a0c: b21a sxth r2, r3 + 8038a0e: e019 b.n 8038a44 + 8038a10: 2400e960 .word 0x2400e960 + 8038a14: 2400e976 .word 0x2400e976 + 8038a18: 2400e96c .word 0x2400e96c + 8038a1c: 08042e18 .word 0x08042e18 + 8038a20: 0804315c .word 0x0804315c + 8038a24: 08042e5c .word 0x08042e5c + 8038a28: 08043188 .word 0x08043188 + 8038a2c: 080431b4 .word 0x080431b4 + 8038a30: 080431e4 .word 0x080431e4 + 8038a34: 08043218 .word 0x08043218 + 8038a38: 08044e50 .word 0x08044e50 + 8038a3c: 08044e40 .word 0x08044e40 + 8038a40: f647 72ff movw r2, #32767 ; 0x7fff + 8038a44: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a46: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 } /* Reset the retransmission timer. */ pcb->rtime = 0; - 80389c6: 6afb ldr r3, [r7, #44] ; 0x2c - 80389c8: 2200 movs r2, #0 - 80389ca: 861a strh r2, [r3, #48] ; 0x30 + 8038a4a: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a4c: 2200 movs r2, #0 + 8038a4e: 861a strh r2, [r3, #48] ; 0x30 /* Reduce congestion window and ssthresh. */ eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd); - 80389cc: 6afb ldr r3, [r7, #44] ; 0x2c - 80389ce: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 80389d2: 6afb ldr r3, [r7, #44] ; 0x2c - 80389d4: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 80389d8: 4293 cmp r3, r2 - 80389da: bf28 it cs - 80389dc: 4613 movcs r3, r2 - 80389de: 827b strh r3, [r7, #18] + 8038a50: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a52: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 8038a56: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a58: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 8038a5c: 4293 cmp r3, r2 + 8038a5e: bf28 it cs + 8038a60: 4613 movcs r3, r2 + 8038a62: 827b strh r3, [r7, #18] pcb->ssthresh = eff_wnd >> 1; - 80389e0: 8a7b ldrh r3, [r7, #18] - 80389e2: 085b lsrs r3, r3, #1 - 80389e4: b29a uxth r2, r3 - 80389e6: 6afb ldr r3, [r7, #44] ; 0x2c - 80389e8: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 8038a64: 8a7b ldrh r3, [r7, #18] + 8038a66: 085b lsrs r3, r3, #1 + 8038a68: b29a uxth r2, r3 + 8038a6a: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a6c: f8a3 204a strh.w r2, [r3, #74] ; 0x4a if (pcb->ssthresh < (tcpwnd_size_t)(pcb->mss << 1)) { - 80389ec: 6afb ldr r3, [r7, #44] ; 0x2c - 80389ee: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a - 80389f2: 6afb ldr r3, [r7, #44] ; 0x2c - 80389f4: 8e5b ldrh r3, [r3, #50] ; 0x32 - 80389f6: 005b lsls r3, r3, #1 - 80389f8: b29b uxth r3, r3 - 80389fa: 429a cmp r2, r3 - 80389fc: d206 bcs.n 8038a0c + 8038a70: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a72: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a + 8038a76: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a78: 8e5b ldrh r3, [r3, #50] ; 0x32 + 8038a7a: 005b lsls r3, r3, #1 + 8038a7c: b29b uxth r3, r3 + 8038a7e: 429a cmp r2, r3 + 8038a80: d206 bcs.n 8038a90 pcb->ssthresh = (tcpwnd_size_t)(pcb->mss << 1); - 80389fe: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a00: 8e5b ldrh r3, [r3, #50] ; 0x32 - 8038a02: 005b lsls r3, r3, #1 - 8038a04: b29a uxth r2, r3 - 8038a06: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a08: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 8038a82: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a84: 8e5b ldrh r3, [r3, #50] ; 0x32 + 8038a86: 005b lsls r3, r3, #1 + 8038a88: b29a uxth r2, r3 + 8038a8a: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a8c: f8a3 204a strh.w r2, [r3, #74] ; 0x4a } pcb->cwnd = pcb->mss; - 8038a0c: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a0e: 8e5a ldrh r2, [r3, #50] ; 0x32 - 8038a10: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a12: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 8038a90: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a92: 8e5a ldrh r2, [r3, #50] ; 0x32 + 8038a94: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a96: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: cwnd %"TCPWNDSIZE_F " ssthresh %"TCPWNDSIZE_F"\n", pcb->cwnd, pcb->ssthresh)); pcb->bytes_acked = 0; - 8038a16: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a18: 2200 movs r2, #0 - 8038a1a: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 8038a9a: 6afb ldr r3, [r7, #44] ; 0x2c + 8038a9c: 2200 movs r2, #0 + 8038a9e: f8a3 206a strh.w r2, [r3, #106] ; 0x6a /* The following needs to be called AFTER cwnd is set to one mss - STJ */ tcp_rexmit_rto_commit(pcb); - 8038a1e: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038a20: f004 fd1e bl 803d460 + 8038aa2: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038aa4: f004 fd1e bl 803d4e4 } } } } /* Check if this PCB has stayed too long in FIN-WAIT-2 */ if (pcb->state == FIN_WAIT_2) { - 8038a24: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a26: 7d1b ldrb r3, [r3, #20] - 8038a28: 2b06 cmp r3, #6 - 8038a2a: d111 bne.n 8038a50 + 8038aa8: 6afb ldr r3, [r7, #44] ; 0x2c + 8038aaa: 7d1b ldrb r3, [r3, #20] + 8038aac: 2b06 cmp r3, #6 + 8038aae: d111 bne.n 8038ad4 /* If this PCB is in FIN_WAIT_2 because of SHUT_WR don't let it time out. */ if (pcb->flags & TF_RXCLOSED) { - 8038a2c: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a2e: 8b5b ldrh r3, [r3, #26] - 8038a30: f003 0310 and.w r3, r3, #16 - 8038a34: 2b00 cmp r3, #0 - 8038a36: d00b beq.n 8038a50 + 8038ab0: 6afb ldr r3, [r7, #44] ; 0x2c + 8038ab2: 8b5b ldrh r3, [r3, #26] + 8038ab4: f003 0310 and.w r3, r3, #16 + 8038ab8: 2b00 cmp r3, #0 + 8038aba: d00b beq.n 8038ad4 /* PCB was fully closed (either through close() or SHUT_RDWR): normal FIN-WAIT timeout handling. */ if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038a38: 4b9c ldr r3, [pc, #624] ; (8038cac ) - 8038a3a: 681a ldr r2, [r3, #0] - 8038a3c: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a3e: 6a1b ldr r3, [r3, #32] - 8038a40: 1ad3 subs r3, r2, r3 - 8038a42: 2b28 cmp r3, #40 ; 0x28 - 8038a44: d904 bls.n 8038a50 + 8038abc: 4b9c ldr r3, [pc, #624] ; (8038d30 ) + 8038abe: 681a ldr r2, [r3, #0] + 8038ac0: 6afb ldr r3, [r7, #44] ; 0x2c + 8038ac2: 6a1b ldr r3, [r3, #32] + 8038ac4: 1ad3 subs r3, r2, r3 + 8038ac6: 2b28 cmp r3, #40 ; 0x28 + 8038ac8: d904 bls.n 8038ad4 TCP_FIN_WAIT_TIMEOUT / TCP_SLOW_INTERVAL) { ++pcb_remove; - 8038a46: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038a4a: 3301 adds r3, #1 - 8038a4c: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038aca: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038ace: 3301 adds r3, #1 + 8038ad0: f887 3027 strb.w r3, [r7, #39] ; 0x27 } } } /* Check if KEEPALIVE should be sent */ if (ip_get_option(pcb, SOF_KEEPALIVE) && - 8038a50: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a52: 7a5b ldrb r3, [r3, #9] - 8038a54: f003 0308 and.w r3, r3, #8 - 8038a58: 2b00 cmp r3, #0 - 8038a5a: d04a beq.n 8038af2 + 8038ad4: 6afb ldr r3, [r7, #44] ; 0x2c + 8038ad6: 7a5b ldrb r3, [r3, #9] + 8038ad8: f003 0308 and.w r3, r3, #8 + 8038adc: 2b00 cmp r3, #0 + 8038ade: d04a beq.n 8038b76 ((pcb->state == ESTABLISHED) || - 8038a5c: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a5e: 7d1b ldrb r3, [r3, #20] + 8038ae0: 6afb ldr r3, [r7, #44] ; 0x2c + 8038ae2: 7d1b ldrb r3, [r3, #20] if (ip_get_option(pcb, SOF_KEEPALIVE) && - 8038a60: 2b04 cmp r3, #4 - 8038a62: d003 beq.n 8038a6c + 8038ae4: 2b04 cmp r3, #4 + 8038ae6: d003 beq.n 8038af0 (pcb->state == CLOSE_WAIT))) { - 8038a64: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a66: 7d1b ldrb r3, [r3, #20] + 8038ae8: 6afb ldr r3, [r7, #44] ; 0x2c + 8038aea: 7d1b ldrb r3, [r3, #20] ((pcb->state == ESTABLISHED) || - 8038a68: 2b07 cmp r3, #7 - 8038a6a: d142 bne.n 8038af2 + 8038aec: 2b07 cmp r3, #7 + 8038aee: d142 bne.n 8038b76 if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038a6c: 4b8f ldr r3, [pc, #572] ; (8038cac ) - 8038a6e: 681a ldr r2, [r3, #0] - 8038a70: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a72: 6a1b ldr r3, [r3, #32] - 8038a74: 1ad2 subs r2, r2, r3 + 8038af0: 4b8f ldr r3, [pc, #572] ; (8038d30 ) + 8038af2: 681a ldr r2, [r3, #0] + 8038af4: 6afb ldr r3, [r7, #44] ; 0x2c + 8038af6: 6a1b ldr r3, [r3, #32] + 8038af8: 1ad2 subs r2, r2, r3 (pcb->keep_idle + TCP_KEEP_DUR(pcb)) / TCP_SLOW_INTERVAL) { - 8038a76: 6afb ldr r3, [r7, #44] ; 0x2c - 8038a78: f8d3 1094 ldr.w r1, [r3, #148] ; 0x94 - 8038a7c: 4b8c ldr r3, [pc, #560] ; (8038cb0 ) - 8038a7e: 440b add r3, r1 - 8038a80: 498c ldr r1, [pc, #560] ; (8038cb4 ) - 8038a82: fba1 1303 umull r1, r3, r1, r3 - 8038a86: 095b lsrs r3, r3, #5 + 8038afa: 6afb ldr r3, [r7, #44] ; 0x2c + 8038afc: f8d3 1094 ldr.w r1, [r3, #148] ; 0x94 + 8038b00: 4b8c ldr r3, [pc, #560] ; (8038d34 ) + 8038b02: 440b add r3, r1 + 8038b04: 498c ldr r1, [pc, #560] ; (8038d38 ) + 8038b06: fba1 1303 umull r1, r3, r1, r3 + 8038b0a: 095b lsrs r3, r3, #5 if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038a88: 429a cmp r2, r3 - 8038a8a: d90a bls.n 8038aa2 + 8038b0c: 429a cmp r2, r3 + 8038b0e: d90a bls.n 8038b26 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: KEEPALIVE timeout. Aborting connection to ")); ip_addr_debug_print_val(TCP_DEBUG, pcb->remote_ip); LWIP_DEBUGF(TCP_DEBUG, ("\n")); ++pcb_remove; - 8038a8c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038a90: 3301 adds r3, #1 - 8038a92: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038b10: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038b14: 3301 adds r3, #1 + 8038b16: f887 3027 strb.w r3, [r7, #39] ; 0x27 ++pcb_reset; - 8038a96: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 - 8038a9a: 3301 adds r3, #1 - 8038a9c: f887 3026 strb.w r3, [r7, #38] ; 0x26 - 8038aa0: e027 b.n 8038af2 + 8038b1a: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 + 8038b1e: 3301 adds r3, #1 + 8038b20: f887 3026 strb.w r3, [r7, #38] ; 0x26 + 8038b24: e027 b.n 8038b76 } else if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038aa2: 4b82 ldr r3, [pc, #520] ; (8038cac ) - 8038aa4: 681a ldr r2, [r3, #0] - 8038aa6: 6afb ldr r3, [r7, #44] ; 0x2c - 8038aa8: 6a1b ldr r3, [r3, #32] - 8038aaa: 1ad2 subs r2, r2, r3 + 8038b26: 4b82 ldr r3, [pc, #520] ; (8038d30 ) + 8038b28: 681a ldr r2, [r3, #0] + 8038b2a: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b2c: 6a1b ldr r3, [r3, #32] + 8038b2e: 1ad2 subs r2, r2, r3 (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEP_INTVL(pcb)) - 8038aac: 6afb ldr r3, [r7, #44] ; 0x2c - 8038aae: f8d3 1094 ldr.w r1, [r3, #148] ; 0x94 - 8038ab2: 6afb ldr r3, [r7, #44] ; 0x2c - 8038ab4: f893 309b ldrb.w r3, [r3, #155] ; 0x9b - 8038ab8: 4618 mov r0, r3 - 8038aba: 4b7f ldr r3, [pc, #508] ; (8038cb8 ) - 8038abc: fb00 f303 mul.w r3, r0, r3 - 8038ac0: 440b add r3, r1 + 8038b30: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b32: f8d3 1094 ldr.w r1, [r3, #148] ; 0x94 + 8038b36: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b38: f893 309b ldrb.w r3, [r3, #155] ; 0x9b + 8038b3c: 4618 mov r0, r3 + 8038b3e: 4b7f ldr r3, [pc, #508] ; (8038d3c ) + 8038b40: fb00 f303 mul.w r3, r0, r3 + 8038b44: 440b add r3, r1 / TCP_SLOW_INTERVAL) { - 8038ac2: 497c ldr r1, [pc, #496] ; (8038cb4 ) - 8038ac4: fba1 1303 umull r1, r3, r1, r3 - 8038ac8: 095b lsrs r3, r3, #5 + 8038b46: 497c ldr r1, [pc, #496] ; (8038d38 ) + 8038b48: fba1 1303 umull r1, r3, r1, r3 + 8038b4c: 095b lsrs r3, r3, #5 } else if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038aca: 429a cmp r2, r3 - 8038acc: d911 bls.n 8038af2 + 8038b4e: 429a cmp r2, r3 + 8038b50: d911 bls.n 8038b76 err = tcp_keepalive(pcb); - 8038ace: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038ad0: f004 ffcc bl 803da6c - 8038ad4: 4603 mov r3, r0 - 8038ad6: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 8038b52: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038b54: f004 ffcc bl 803daf0 + 8038b58: 4603 mov r3, r0 + 8038b5a: f887 3025 strb.w r3, [r7, #37] ; 0x25 if (err == ERR_OK) { - 8038ada: f997 3025 ldrsb.w r3, [r7, #37] ; 0x25 - 8038ade: 2b00 cmp r3, #0 - 8038ae0: d107 bne.n 8038af2 + 8038b5e: f997 3025 ldrsb.w r3, [r7, #37] ; 0x25 + 8038b62: 2b00 cmp r3, #0 + 8038b64: d107 bne.n 8038b76 pcb->keep_cnt_sent++; - 8038ae2: 6afb ldr r3, [r7, #44] ; 0x2c - 8038ae4: f893 309b ldrb.w r3, [r3, #155] ; 0x9b - 8038ae8: 3301 adds r3, #1 - 8038aea: b2da uxtb r2, r3 - 8038aec: 6afb ldr r3, [r7, #44] ; 0x2c - 8038aee: f883 209b strb.w r2, [r3, #155] ; 0x9b + 8038b66: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b68: f893 309b ldrb.w r3, [r3, #155] ; 0x9b + 8038b6c: 3301 adds r3, #1 + 8038b6e: b2da uxtb r2, r3 + 8038b70: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b72: f883 209b strb.w r2, [r3, #155] ; 0x9b /* If this PCB has queued out of sequence data, but has been inactive for too long, will drop the data (it will eventually be retransmitted). */ #if TCP_QUEUE_OOSEQ if (pcb->ooseq != NULL && - 8038af2: 6afb ldr r3, [r7, #44] ; 0x2c - 8038af4: 6f5b ldr r3, [r3, #116] ; 0x74 - 8038af6: 2b00 cmp r3, #0 - 8038af8: d011 beq.n 8038b1e + 8038b76: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b78: 6f5b ldr r3, [r3, #116] ; 0x74 + 8038b7a: 2b00 cmp r3, #0 + 8038b7c: d011 beq.n 8038ba2 (tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) { - 8038afa: 4b6c ldr r3, [pc, #432] ; (8038cac ) - 8038afc: 681a ldr r2, [r3, #0] - 8038afe: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b00: 6a1b ldr r3, [r3, #32] - 8038b02: 1ad2 subs r2, r2, r3 - 8038b04: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b06: f9b3 3040 ldrsh.w r3, [r3, #64] ; 0x40 - 8038b0a: 4619 mov r1, r3 - 8038b0c: 460b mov r3, r1 - 8038b0e: 005b lsls r3, r3, #1 - 8038b10: 440b add r3, r1 - 8038b12: 005b lsls r3, r3, #1 + 8038b7e: 4b6c ldr r3, [pc, #432] ; (8038d30 ) + 8038b80: 681a ldr r2, [r3, #0] + 8038b82: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b84: 6a1b ldr r3, [r3, #32] + 8038b86: 1ad2 subs r2, r2, r3 + 8038b88: 6afb ldr r3, [r7, #44] ; 0x2c + 8038b8a: f9b3 3040 ldrsh.w r3, [r3, #64] ; 0x40 + 8038b8e: 4619 mov r1, r3 + 8038b90: 460b mov r3, r1 + 8038b92: 005b lsls r3, r3, #1 + 8038b94: 440b add r3, r1 + 8038b96: 005b lsls r3, r3, #1 if (pcb->ooseq != NULL && - 8038b14: 429a cmp r2, r3 - 8038b16: d302 bcc.n 8038b1e + 8038b98: 429a cmp r2, r3 + 8038b9a: d302 bcc.n 8038ba2 LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: dropping OOSEQ queued data\n")); tcp_free_ooseq(pcb); - 8038b18: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038b1a: f000 fe87 bl 803982c + 8038b9c: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038b9e: f000 fe87 bl 80398b0 } #endif /* TCP_QUEUE_OOSEQ */ /* Check if this PCB has stayed too long in SYN-RCVD */ if (pcb->state == SYN_RCVD) { - 8038b1e: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b20: 7d1b ldrb r3, [r3, #20] - 8038b22: 2b03 cmp r3, #3 - 8038b24: d10b bne.n 8038b3e + 8038ba2: 6afb ldr r3, [r7, #44] ; 0x2c + 8038ba4: 7d1b ldrb r3, [r3, #20] + 8038ba6: 2b03 cmp r3, #3 + 8038ba8: d10b bne.n 8038bc2 if ((u32_t)(tcp_ticks - pcb->tmr) > - 8038b26: 4b61 ldr r3, [pc, #388] ; (8038cac ) - 8038b28: 681a ldr r2, [r3, #0] - 8038b2a: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b2c: 6a1b ldr r3, [r3, #32] - 8038b2e: 1ad3 subs r3, r2, r3 - 8038b30: 2b28 cmp r3, #40 ; 0x28 - 8038b32: d904 bls.n 8038b3e + 8038baa: 4b61 ldr r3, [pc, #388] ; (8038d30 ) + 8038bac: 681a ldr r2, [r3, #0] + 8038bae: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bb0: 6a1b ldr r3, [r3, #32] + 8038bb2: 1ad3 subs r3, r2, r3 + 8038bb4: 2b28 cmp r3, #40 ; 0x28 + 8038bb6: d904 bls.n 8038bc2 TCP_SYN_RCVD_TIMEOUT / TCP_SLOW_INTERVAL) { ++pcb_remove; - 8038b34: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038b38: 3301 adds r3, #1 - 8038b3a: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038bb8: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038bbc: 3301 adds r3, #1 + 8038bbe: f887 3027 strb.w r3, [r7, #39] ; 0x27 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in SYN-RCVD\n")); } } /* Check if this PCB has stayed too long in LAST-ACK */ if (pcb->state == LAST_ACK) { - 8038b3e: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b40: 7d1b ldrb r3, [r3, #20] - 8038b42: 2b09 cmp r3, #9 - 8038b44: d10b bne.n 8038b5e + 8038bc2: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bc4: 7d1b ldrb r3, [r3, #20] + 8038bc6: 2b09 cmp r3, #9 + 8038bc8: d10b bne.n 8038be2 if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { - 8038b46: 4b59 ldr r3, [pc, #356] ; (8038cac ) - 8038b48: 681a ldr r2, [r3, #0] - 8038b4a: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b4c: 6a1b ldr r3, [r3, #32] - 8038b4e: 1ad3 subs r3, r2, r3 - 8038b50: 2bf0 cmp r3, #240 ; 0xf0 - 8038b52: d904 bls.n 8038b5e + 8038bca: 4b59 ldr r3, [pc, #356] ; (8038d30 ) + 8038bcc: 681a ldr r2, [r3, #0] + 8038bce: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bd0: 6a1b ldr r3, [r3, #32] + 8038bd2: 1ad3 subs r3, r2, r3 + 8038bd4: 2bf0 cmp r3, #240 ; 0xf0 + 8038bd6: d904 bls.n 8038be2 ++pcb_remove; - 8038b54: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038b58: 3301 adds r3, #1 - 8038b5a: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038bd8: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038bdc: 3301 adds r3, #1 + 8038bde: f887 3027 strb.w r3, [r7, #39] ; 0x27 LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in LAST-ACK\n")); } } /* If the PCB should be removed, do it. */ if (pcb_remove) { - 8038b5e: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038b62: 2b00 cmp r3, #0 - 8038b64: d060 beq.n 8038c28 + 8038be2: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038be6: 2b00 cmp r3, #0 + 8038be8: d060 beq.n 8038cac struct tcp_pcb *pcb2; #if LWIP_CALLBACK_API tcp_err_fn err_fn = pcb->errf; - 8038b66: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b68: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8038b6c: 60fb str r3, [r7, #12] + 8038bea: 6afb ldr r3, [r7, #44] ; 0x2c + 8038bec: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8038bf0: 60fb str r3, [r7, #12] #endif /* LWIP_CALLBACK_API */ void *err_arg; enum tcp_state last_state; tcp_pcb_purge(pcb); - 8038b6e: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038b70: f000 fca8 bl 80394c4 + 8038bf2: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038bf4: f000 fca8 bl 8039548 /* Remove PCB from tcp_active_pcbs list. */ if (prev != NULL) { - 8038b74: 6abb ldr r3, [r7, #40] ; 0x28 - 8038b76: 2b00 cmp r3, #0 - 8038b78: d010 beq.n 8038b9c + 8038bf8: 6abb ldr r3, [r7, #40] ; 0x28 + 8038bfa: 2b00 cmp r3, #0 + 8038bfc: d010 beq.n 8038c20 LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs); - 8038b7a: 4b50 ldr r3, [pc, #320] ; (8038cbc ) - 8038b7c: 681b ldr r3, [r3, #0] - 8038b7e: 6afa ldr r2, [r7, #44] ; 0x2c - 8038b80: 429a cmp r2, r3 - 8038b82: d106 bne.n 8038b92 - 8038b84: 4b4e ldr r3, [pc, #312] ; (8038cc0 ) - 8038b86: f240 526d movw r2, #1389 ; 0x56d - 8038b8a: 494e ldr r1, [pc, #312] ; (8038cc4 ) - 8038b8c: 484e ldr r0, [pc, #312] ; (8038cc8 ) - 8038b8e: f007 ffbf bl 8040b10 + 8038bfe: 4b50 ldr r3, [pc, #320] ; (8038d40 ) + 8038c00: 681b ldr r3, [r3, #0] + 8038c02: 6afa ldr r2, [r7, #44] ; 0x2c + 8038c04: 429a cmp r2, r3 + 8038c06: d106 bne.n 8038c16 + 8038c08: 4b4e ldr r3, [pc, #312] ; (8038d44 ) + 8038c0a: f240 526d movw r2, #1389 ; 0x56d + 8038c0e: 494e ldr r1, [pc, #312] ; (8038d48 ) + 8038c10: 484e ldr r0, [pc, #312] ; (8038d4c ) + 8038c12: f007 ffbf bl 8040b94 prev->next = pcb->next; - 8038b92: 6afb ldr r3, [r7, #44] ; 0x2c - 8038b94: 68da ldr r2, [r3, #12] - 8038b96: 6abb ldr r3, [r7, #40] ; 0x28 - 8038b98: 60da str r2, [r3, #12] - 8038b9a: e00f b.n 8038bbc + 8038c16: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c18: 68da ldr r2, [r3, #12] + 8038c1a: 6abb ldr r3, [r7, #40] ; 0x28 + 8038c1c: 60da str r2, [r3, #12] + 8038c1e: e00f b.n 8038c40 } else { /* This PCB was the first. */ LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb); - 8038b9c: 4b47 ldr r3, [pc, #284] ; (8038cbc ) - 8038b9e: 681b ldr r3, [r3, #0] - 8038ba0: 6afa ldr r2, [r7, #44] ; 0x2c - 8038ba2: 429a cmp r2, r3 - 8038ba4: d006 beq.n 8038bb4 - 8038ba6: 4b46 ldr r3, [pc, #280] ; (8038cc0 ) - 8038ba8: f240 5271 movw r2, #1393 ; 0x571 - 8038bac: 4947 ldr r1, [pc, #284] ; (8038ccc ) - 8038bae: 4846 ldr r0, [pc, #280] ; (8038cc8 ) - 8038bb0: f007 ffae bl 8040b10 + 8038c20: 4b47 ldr r3, [pc, #284] ; (8038d40 ) + 8038c22: 681b ldr r3, [r3, #0] + 8038c24: 6afa ldr r2, [r7, #44] ; 0x2c + 8038c26: 429a cmp r2, r3 + 8038c28: d006 beq.n 8038c38 + 8038c2a: 4b46 ldr r3, [pc, #280] ; (8038d44 ) + 8038c2c: f240 5271 movw r2, #1393 ; 0x571 + 8038c30: 4947 ldr r1, [pc, #284] ; (8038d50 ) + 8038c32: 4846 ldr r0, [pc, #280] ; (8038d4c ) + 8038c34: f007 ffae bl 8040b94 tcp_active_pcbs = pcb->next; - 8038bb4: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bb6: 68db ldr r3, [r3, #12] - 8038bb8: 4a40 ldr r2, [pc, #256] ; (8038cbc ) - 8038bba: 6013 str r3, [r2, #0] + 8038c38: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c3a: 68db ldr r3, [r3, #12] + 8038c3c: 4a40 ldr r2, [pc, #256] ; (8038d40 ) + 8038c3e: 6013 str r3, [r2, #0] } if (pcb_reset) { - 8038bbc: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 - 8038bc0: 2b00 cmp r3, #0 - 8038bc2: d013 beq.n 8038bec + 8038c40: f897 3026 ldrb.w r3, [r7, #38] ; 0x26 + 8038c44: 2b00 cmp r3, #0 + 8038c46: d013 beq.n 8038c70 tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip, - 8038bc4: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bc6: 6d18 ldr r0, [r3, #80] ; 0x50 - 8038bc8: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bca: 6a5c ldr r4, [r3, #36] ; 0x24 - 8038bcc: 6afd ldr r5, [r7, #44] ; 0x2c - 8038bce: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bd0: 3304 adds r3, #4 - 8038bd2: 6afa ldr r2, [r7, #44] ; 0x2c - 8038bd4: 8ad2 ldrh r2, [r2, #22] - 8038bd6: 6af9 ldr r1, [r7, #44] ; 0x2c - 8038bd8: 8b09 ldrh r1, [r1, #24] - 8038bda: 9102 str r1, [sp, #8] - 8038bdc: 9201 str r2, [sp, #4] - 8038bde: 9300 str r3, [sp, #0] - 8038be0: 462b mov r3, r5 - 8038be2: 4622 mov r2, r4 - 8038be4: 4601 mov r1, r0 - 8038be6: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038be8: f004 fe8c bl 803d904 + 8038c48: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c4a: 6d18 ldr r0, [r3, #80] ; 0x50 + 8038c4c: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c4e: 6a5c ldr r4, [r3, #36] ; 0x24 + 8038c50: 6afd ldr r5, [r7, #44] ; 0x2c + 8038c52: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c54: 3304 adds r3, #4 + 8038c56: 6afa ldr r2, [r7, #44] ; 0x2c + 8038c58: 8ad2 ldrh r2, [r2, #22] + 8038c5a: 6af9 ldr r1, [r7, #44] ; 0x2c + 8038c5c: 8b09 ldrh r1, [r1, #24] + 8038c5e: 9102 str r1, [sp, #8] + 8038c60: 9201 str r2, [sp, #4] + 8038c62: 9300 str r3, [sp, #0] + 8038c64: 462b mov r3, r5 + 8038c66: 4622 mov r2, r4 + 8038c68: 4601 mov r1, r0 + 8038c6a: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038c6c: f004 fe8c bl 803d988 pcb->local_port, pcb->remote_port); } err_arg = pcb->callback_arg; - 8038bec: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bee: 691b ldr r3, [r3, #16] - 8038bf0: 60bb str r3, [r7, #8] + 8038c70: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c72: 691b ldr r3, [r3, #16] + 8038c74: 60bb str r3, [r7, #8] last_state = pcb->state; - 8038bf2: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bf4: 7d1b ldrb r3, [r3, #20] - 8038bf6: 71fb strb r3, [r7, #7] + 8038c76: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c78: 7d1b ldrb r3, [r3, #20] + 8038c7a: 71fb strb r3, [r7, #7] pcb2 = pcb; - 8038bf8: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bfa: 603b str r3, [r7, #0] + 8038c7c: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c7e: 603b str r3, [r7, #0] pcb = pcb->next; - 8038bfc: 6afb ldr r3, [r7, #44] ; 0x2c - 8038bfe: 68db ldr r3, [r3, #12] - 8038c00: 62fb str r3, [r7, #44] ; 0x2c + 8038c80: 6afb ldr r3, [r7, #44] ; 0x2c + 8038c82: 68db ldr r3, [r3, #12] + 8038c84: 62fb str r3, [r7, #44] ; 0x2c tcp_free(pcb2); - 8038c02: 6838 ldr r0, [r7, #0] - 8038c04: f7ff f83a bl 8037c7c + 8038c86: 6838 ldr r0, [r7, #0] + 8038c88: f7ff f83a bl 8037d00 tcp_active_pcbs_changed = 0; - 8038c08: 4b31 ldr r3, [pc, #196] ; (8038cd0 ) - 8038c0a: 2200 movs r2, #0 - 8038c0c: 701a strb r2, [r3, #0] + 8038c8c: 4b31 ldr r3, [pc, #196] ; (8038d54 ) + 8038c8e: 2200 movs r2, #0 + 8038c90: 701a strb r2, [r3, #0] TCP_EVENT_ERR(last_state, err_fn, err_arg, ERR_ABRT); - 8038c0e: 68fb ldr r3, [r7, #12] - 8038c10: 2b00 cmp r3, #0 - 8038c12: d004 beq.n 8038c1e - 8038c14: 68fb ldr r3, [r7, #12] - 8038c16: f06f 010c mvn.w r1, #12 - 8038c1a: 68b8 ldr r0, [r7, #8] - 8038c1c: 4798 blx r3 + 8038c92: 68fb ldr r3, [r7, #12] + 8038c94: 2b00 cmp r3, #0 + 8038c96: d004 beq.n 8038ca2 + 8038c98: 68fb ldr r3, [r7, #12] + 8038c9a: f06f 010c mvn.w r1, #12 + 8038c9e: 68b8 ldr r0, [r7, #8] + 8038ca0: 4798 blx r3 if (tcp_active_pcbs_changed) { - 8038c1e: 4b2c ldr r3, [pc, #176] ; (8038cd0 ) - 8038c20: 781b ldrb r3, [r3, #0] - 8038c22: 2b00 cmp r3, #0 - 8038c24: d037 beq.n 8038c96 + 8038ca2: 4b2c ldr r3, [pc, #176] ; (8038d54 ) + 8038ca4: 781b ldrb r3, [r3, #0] + 8038ca6: 2b00 cmp r3, #0 + 8038ca8: d037 beq.n 8038d1a goto tcp_slowtmr_start; - 8038c26: e592 b.n 803874e + 8038caa: e592 b.n 80387d2 } } else { /* get the 'next' element now and work with 'prev' below (in case of abort) */ prev = pcb; - 8038c28: 6afb ldr r3, [r7, #44] ; 0x2c - 8038c2a: 62bb str r3, [r7, #40] ; 0x28 + 8038cac: 6afb ldr r3, [r7, #44] ; 0x2c + 8038cae: 62bb str r3, [r7, #40] ; 0x28 pcb = pcb->next; - 8038c2c: 6afb ldr r3, [r7, #44] ; 0x2c - 8038c2e: 68db ldr r3, [r3, #12] - 8038c30: 62fb str r3, [r7, #44] ; 0x2c + 8038cb0: 6afb ldr r3, [r7, #44] ; 0x2c + 8038cb2: 68db ldr r3, [r3, #12] + 8038cb4: 62fb str r3, [r7, #44] ; 0x2c /* We check if we should poll the connection. */ ++prev->polltmr; - 8038c32: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c34: 7f1b ldrb r3, [r3, #28] - 8038c36: 3301 adds r3, #1 - 8038c38: b2da uxtb r2, r3 - 8038c3a: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c3c: 771a strb r2, [r3, #28] + 8038cb6: 6abb ldr r3, [r7, #40] ; 0x28 + 8038cb8: 7f1b ldrb r3, [r3, #28] + 8038cba: 3301 adds r3, #1 + 8038cbc: b2da uxtb r2, r3 + 8038cbe: 6abb ldr r3, [r7, #40] ; 0x28 + 8038cc0: 771a strb r2, [r3, #28] if (prev->polltmr >= prev->pollinterval) { - 8038c3e: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c40: 7f1a ldrb r2, [r3, #28] - 8038c42: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c44: 7f5b ldrb r3, [r3, #29] - 8038c46: 429a cmp r2, r3 - 8038c48: d325 bcc.n 8038c96 + 8038cc2: 6abb ldr r3, [r7, #40] ; 0x28 + 8038cc4: 7f1a ldrb r2, [r3, #28] + 8038cc6: 6abb ldr r3, [r7, #40] ; 0x28 + 8038cc8: 7f5b ldrb r3, [r3, #29] + 8038cca: 429a cmp r2, r3 + 8038ccc: d325 bcc.n 8038d1a prev->polltmr = 0; - 8038c4a: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c4c: 2200 movs r2, #0 - 8038c4e: 771a strb r2, [r3, #28] + 8038cce: 6abb ldr r3, [r7, #40] ; 0x28 + 8038cd0: 2200 movs r2, #0 + 8038cd2: 771a strb r2, [r3, #28] LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n")); tcp_active_pcbs_changed = 0; - 8038c50: 4b1f ldr r3, [pc, #124] ; (8038cd0 ) - 8038c52: 2200 movs r2, #0 - 8038c54: 701a strb r2, [r3, #0] + 8038cd4: 4b1f ldr r3, [pc, #124] ; (8038d54 ) + 8038cd6: 2200 movs r2, #0 + 8038cd8: 701a strb r2, [r3, #0] TCP_EVENT_POLL(prev, err); - 8038c56: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c58: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8038c5c: 2b00 cmp r3, #0 - 8038c5e: d00b beq.n 8038c78 - 8038c60: 6abb ldr r3, [r7, #40] ; 0x28 - 8038c62: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c - 8038c66: 6aba ldr r2, [r7, #40] ; 0x28 - 8038c68: 6912 ldr r2, [r2, #16] - 8038c6a: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8038c6c: 4610 mov r0, r2 - 8038c6e: 4798 blx r3 - 8038c70: 4603 mov r3, r0 - 8038c72: f887 3025 strb.w r3, [r7, #37] ; 0x25 - 8038c76: e002 b.n 8038c7e - 8038c78: 2300 movs r3, #0 - 8038c7a: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 8038cda: 6abb ldr r3, [r7, #40] ; 0x28 + 8038cdc: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8038ce0: 2b00 cmp r3, #0 + 8038ce2: d00b beq.n 8038cfc + 8038ce4: 6abb ldr r3, [r7, #40] ; 0x28 + 8038ce6: f8d3 308c ldr.w r3, [r3, #140] ; 0x8c + 8038cea: 6aba ldr r2, [r7, #40] ; 0x28 + 8038cec: 6912 ldr r2, [r2, #16] + 8038cee: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8038cf0: 4610 mov r0, r2 + 8038cf2: 4798 blx r3 + 8038cf4: 4603 mov r3, r0 + 8038cf6: f887 3025 strb.w r3, [r7, #37] ; 0x25 + 8038cfa: e002 b.n 8038d02 + 8038cfc: 2300 movs r3, #0 + 8038cfe: f887 3025 strb.w r3, [r7, #37] ; 0x25 if (tcp_active_pcbs_changed) { - 8038c7e: 4b14 ldr r3, [pc, #80] ; (8038cd0 ) - 8038c80: 781b ldrb r3, [r3, #0] - 8038c82: 2b00 cmp r3, #0 - 8038c84: d000 beq.n 8038c88 + 8038d02: 4b14 ldr r3, [pc, #80] ; (8038d54 ) + 8038d04: 781b ldrb r3, [r3, #0] + 8038d06: 2b00 cmp r3, #0 + 8038d08: d000 beq.n 8038d0c goto tcp_slowtmr_start; - 8038c86: e562 b.n 803874e + 8038d0a: e562 b.n 80387d2 } /* if err == ERR_ABRT, 'prev' is already deallocated */ if (err == ERR_OK) { - 8038c88: f997 3025 ldrsb.w r3, [r7, #37] ; 0x25 - 8038c8c: 2b00 cmp r3, #0 - 8038c8e: d102 bne.n 8038c96 + 8038d0c: f997 3025 ldrsb.w r3, [r7, #37] ; 0x25 + 8038d10: 2b00 cmp r3, #0 + 8038d12: d102 bne.n 8038d1a tcp_output(prev); - 8038c90: 6ab8 ldr r0, [r7, #40] ; 0x28 - 8038c92: f004 f883 bl 803cd9c + 8038d14: 6ab8 ldr r0, [r7, #40] ; 0x28 + 8038d16: f004 f883 bl 803ce20 while (pcb != NULL) { - 8038c96: 6afb ldr r3, [r7, #44] ; 0x2c - 8038c98: 2b00 cmp r3, #0 - 8038c9a: f47f ad5e bne.w 803875a + 8038d1a: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d1c: 2b00 cmp r3, #0 + 8038d1e: f47f ad5e bne.w 80387de } } /* Steps through all of the TIME-WAIT PCBs. */ prev = NULL; - 8038c9e: 2300 movs r3, #0 - 8038ca0: 62bb str r3, [r7, #40] ; 0x28 + 8038d22: 2300 movs r3, #0 + 8038d24: 62bb str r3, [r7, #40] ; 0x28 pcb = tcp_tw_pcbs; - 8038ca2: 4b0c ldr r3, [pc, #48] ; (8038cd4 ) - 8038ca4: 681b ldr r3, [r3, #0] - 8038ca6: 62fb str r3, [r7, #44] ; 0x2c + 8038d26: 4b0c ldr r3, [pc, #48] ; (8038d58 ) + 8038d28: 681b ldr r3, [r3, #0] + 8038d2a: 62fb str r3, [r7, #44] ; 0x2c while (pcb != NULL) { - 8038ca8: e069 b.n 8038d7e - 8038caa: bf00 nop - 8038cac: 2400e958 .word 0x2400e958 - 8038cb0: 000a4cb8 .word 0x000a4cb8 - 8038cb4: 10624dd3 .word 0x10624dd3 - 8038cb8: 000124f8 .word 0x000124f8 - 8038cbc: 2400e964 .word 0x2400e964 - 8038cc0: 08042d98 .word 0x08042d98 - 8038cc4: 080431d0 .word 0x080431d0 - 8038cc8: 08042ddc .word 0x08042ddc - 8038ccc: 080431fc .word 0x080431fc - 8038cd0: 2400e96c .word 0x2400e96c - 8038cd4: 2400e968 .word 0x2400e968 + 8038d2c: e069 b.n 8038e02 + 8038d2e: bf00 nop + 8038d30: 2400e960 .word 0x2400e960 + 8038d34: 000a4cb8 .word 0x000a4cb8 + 8038d38: 10624dd3 .word 0x10624dd3 + 8038d3c: 000124f8 .word 0x000124f8 + 8038d40: 2400e96c .word 0x2400e96c + 8038d44: 08042e18 .word 0x08042e18 + 8038d48: 08043250 .word 0x08043250 + 8038d4c: 08042e5c .word 0x08042e5c + 8038d50: 0804327c .word 0x0804327c + 8038d54: 2400e974 .word 0x2400e974 + 8038d58: 2400e970 .word 0x2400e970 LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - 8038cd8: 6afb ldr r3, [r7, #44] ; 0x2c - 8038cda: 7d1b ldrb r3, [r3, #20] - 8038cdc: 2b0a cmp r3, #10 - 8038cde: d006 beq.n 8038cee - 8038ce0: 4b2b ldr r3, [pc, #172] ; (8038d90 ) - 8038ce2: f240 52a1 movw r2, #1441 ; 0x5a1 - 8038ce6: 492b ldr r1, [pc, #172] ; (8038d94 ) - 8038ce8: 482b ldr r0, [pc, #172] ; (8038d98 ) - 8038cea: f007 ff11 bl 8040b10 + 8038d5c: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d5e: 7d1b ldrb r3, [r3, #20] + 8038d60: 2b0a cmp r3, #10 + 8038d62: d006 beq.n 8038d72 + 8038d64: 4b2b ldr r3, [pc, #172] ; (8038e14 ) + 8038d66: f240 52a1 movw r2, #1441 ; 0x5a1 + 8038d6a: 492b ldr r1, [pc, #172] ; (8038e18 ) + 8038d6c: 482b ldr r0, [pc, #172] ; (8038e1c ) + 8038d6e: f007 ff11 bl 8040b94 pcb_remove = 0; - 8038cee: 2300 movs r3, #0 - 8038cf0: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038d72: 2300 movs r3, #0 + 8038d74: f887 3027 strb.w r3, [r7, #39] ; 0x27 /* Check if this PCB has stayed long enough in TIME-WAIT */ if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { - 8038cf4: 4b29 ldr r3, [pc, #164] ; (8038d9c ) - 8038cf6: 681a ldr r2, [r3, #0] - 8038cf8: 6afb ldr r3, [r7, #44] ; 0x2c - 8038cfa: 6a1b ldr r3, [r3, #32] - 8038cfc: 1ad3 subs r3, r2, r3 - 8038cfe: 2bf0 cmp r3, #240 ; 0xf0 - 8038d00: d904 bls.n 8038d0c + 8038d78: 4b29 ldr r3, [pc, #164] ; (8038e20 ) + 8038d7a: 681a ldr r2, [r3, #0] + 8038d7c: 6afb ldr r3, [r7, #44] ; 0x2c + 8038d7e: 6a1b ldr r3, [r3, #32] + 8038d80: 1ad3 subs r3, r2, r3 + 8038d82: 2bf0 cmp r3, #240 ; 0xf0 + 8038d84: d904 bls.n 8038d90 ++pcb_remove; - 8038d02: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038d06: 3301 adds r3, #1 - 8038d08: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 8038d86: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038d8a: 3301 adds r3, #1 + 8038d8c: f887 3027 strb.w r3, [r7, #39] ; 0x27 } /* If the PCB should be removed, do it. */ if (pcb_remove) { - 8038d0c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 8038d10: 2b00 cmp r3, #0 - 8038d12: d02f beq.n 8038d74 + 8038d90: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 8038d94: 2b00 cmp r3, #0 + 8038d96: d02f beq.n 8038df8 struct tcp_pcb *pcb2; tcp_pcb_purge(pcb); - 8038d14: 6af8 ldr r0, [r7, #44] ; 0x2c - 8038d16: f000 fbd5 bl 80394c4 + 8038d98: 6af8 ldr r0, [r7, #44] ; 0x2c + 8038d9a: f000 fbd5 bl 8039548 /* Remove PCB from tcp_tw_pcbs list. */ if (prev != NULL) { - 8038d1a: 6abb ldr r3, [r7, #40] ; 0x28 - 8038d1c: 2b00 cmp r3, #0 - 8038d1e: d010 beq.n 8038d42 + 8038d9e: 6abb ldr r3, [r7, #40] ; 0x28 + 8038da0: 2b00 cmp r3, #0 + 8038da2: d010 beq.n 8038dc6 LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs); - 8038d20: 4b1f ldr r3, [pc, #124] ; (8038da0 ) - 8038d22: 681b ldr r3, [r3, #0] - 8038d24: 6afa ldr r2, [r7, #44] ; 0x2c - 8038d26: 429a cmp r2, r3 - 8038d28: d106 bne.n 8038d38 - 8038d2a: 4b19 ldr r3, [pc, #100] ; (8038d90 ) - 8038d2c: f240 52af movw r2, #1455 ; 0x5af - 8038d30: 491c ldr r1, [pc, #112] ; (8038da4 ) - 8038d32: 4819 ldr r0, [pc, #100] ; (8038d98 ) - 8038d34: f007 feec bl 8040b10 + 8038da4: 4b1f ldr r3, [pc, #124] ; (8038e24 ) + 8038da6: 681b ldr r3, [r3, #0] + 8038da8: 6afa ldr r2, [r7, #44] ; 0x2c + 8038daa: 429a cmp r2, r3 + 8038dac: d106 bne.n 8038dbc + 8038dae: 4b19 ldr r3, [pc, #100] ; (8038e14 ) + 8038db0: f240 52af movw r2, #1455 ; 0x5af + 8038db4: 491c ldr r1, [pc, #112] ; (8038e28 ) + 8038db6: 4819 ldr r0, [pc, #100] ; (8038e1c ) + 8038db8: f007 feec bl 8040b94 prev->next = pcb->next; - 8038d38: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d3a: 68da ldr r2, [r3, #12] - 8038d3c: 6abb ldr r3, [r7, #40] ; 0x28 - 8038d3e: 60da str r2, [r3, #12] - 8038d40: e00f b.n 8038d62 + 8038dbc: 6afb ldr r3, [r7, #44] ; 0x2c + 8038dbe: 68da ldr r2, [r3, #12] + 8038dc0: 6abb ldr r3, [r7, #40] ; 0x28 + 8038dc2: 60da str r2, [r3, #12] + 8038dc4: e00f b.n 8038de6 } else { /* This PCB was the first. */ LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb); - 8038d42: 4b17 ldr r3, [pc, #92] ; (8038da0 ) - 8038d44: 681b ldr r3, [r3, #0] - 8038d46: 6afa ldr r2, [r7, #44] ; 0x2c - 8038d48: 429a cmp r2, r3 - 8038d4a: d006 beq.n 8038d5a - 8038d4c: 4b10 ldr r3, [pc, #64] ; (8038d90 ) - 8038d4e: f240 52b3 movw r2, #1459 ; 0x5b3 - 8038d52: 4915 ldr r1, [pc, #84] ; (8038da8 ) - 8038d54: 4810 ldr r0, [pc, #64] ; (8038d98 ) - 8038d56: f007 fedb bl 8040b10 + 8038dc6: 4b17 ldr r3, [pc, #92] ; (8038e24 ) + 8038dc8: 681b ldr r3, [r3, #0] + 8038dca: 6afa ldr r2, [r7, #44] ; 0x2c + 8038dcc: 429a cmp r2, r3 + 8038dce: d006 beq.n 8038dde + 8038dd0: 4b10 ldr r3, [pc, #64] ; (8038e14 ) + 8038dd2: f240 52b3 movw r2, #1459 ; 0x5b3 + 8038dd6: 4915 ldr r1, [pc, #84] ; (8038e2c ) + 8038dd8: 4810 ldr r0, [pc, #64] ; (8038e1c ) + 8038dda: f007 fedb bl 8040b94 tcp_tw_pcbs = pcb->next; - 8038d5a: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d5c: 68db ldr r3, [r3, #12] - 8038d5e: 4a10 ldr r2, [pc, #64] ; (8038da0 ) - 8038d60: 6013 str r3, [r2, #0] + 8038dde: 6afb ldr r3, [r7, #44] ; 0x2c + 8038de0: 68db ldr r3, [r3, #12] + 8038de2: 4a10 ldr r2, [pc, #64] ; (8038e24 ) + 8038de4: 6013 str r3, [r2, #0] } pcb2 = pcb; - 8038d62: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d64: 61fb str r3, [r7, #28] + 8038de6: 6afb ldr r3, [r7, #44] ; 0x2c + 8038de8: 61fb str r3, [r7, #28] pcb = pcb->next; - 8038d66: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d68: 68db ldr r3, [r3, #12] - 8038d6a: 62fb str r3, [r7, #44] ; 0x2c + 8038dea: 6afb ldr r3, [r7, #44] ; 0x2c + 8038dec: 68db ldr r3, [r3, #12] + 8038dee: 62fb str r3, [r7, #44] ; 0x2c tcp_free(pcb2); - 8038d6c: 69f8 ldr r0, [r7, #28] - 8038d6e: f7fe ff85 bl 8037c7c - 8038d72: e004 b.n 8038d7e + 8038df0: 69f8 ldr r0, [r7, #28] + 8038df2: f7fe ff85 bl 8037d00 + 8038df6: e004 b.n 8038e02 } else { prev = pcb; - 8038d74: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d76: 62bb str r3, [r7, #40] ; 0x28 + 8038df8: 6afb ldr r3, [r7, #44] ; 0x2c + 8038dfa: 62bb str r3, [r7, #40] ; 0x28 pcb = pcb->next; - 8038d78: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d7a: 68db ldr r3, [r3, #12] - 8038d7c: 62fb str r3, [r7, #44] ; 0x2c + 8038dfc: 6afb ldr r3, [r7, #44] ; 0x2c + 8038dfe: 68db ldr r3, [r3, #12] + 8038e00: 62fb str r3, [r7, #44] ; 0x2c while (pcb != NULL) { - 8038d7e: 6afb ldr r3, [r7, #44] ; 0x2c - 8038d80: 2b00 cmp r3, #0 - 8038d82: d1a9 bne.n 8038cd8 + 8038e02: 6afb ldr r3, [r7, #44] ; 0x2c + 8038e04: 2b00 cmp r3, #0 + 8038e06: d1a9 bne.n 8038d5c } } } - 8038d84: bf00 nop - 8038d86: bf00 nop - 8038d88: 3730 adds r7, #48 ; 0x30 - 8038d8a: 46bd mov sp, r7 - 8038d8c: bdb0 pop {r4, r5, r7, pc} - 8038d8e: bf00 nop - 8038d90: 08042d98 .word 0x08042d98 - 8038d94: 08043228 .word 0x08043228 - 8038d98: 08042ddc .word 0x08042ddc - 8038d9c: 2400e958 .word 0x2400e958 - 8038da0: 2400e968 .word 0x2400e968 - 8038da4: 08043258 .word 0x08043258 - 8038da8: 08043280 .word 0x08043280 - -08038dac : + 8038e08: bf00 nop + 8038e0a: bf00 nop + 8038e0c: 3730 adds r7, #48 ; 0x30 + 8038e0e: 46bd mov sp, r7 + 8038e10: bdb0 pop {r4, r5, r7, pc} + 8038e12: bf00 nop + 8038e14: 08042e18 .word 0x08042e18 + 8038e18: 080432a8 .word 0x080432a8 + 8038e1c: 08042e5c .word 0x08042e5c + 8038e20: 2400e960 .word 0x2400e960 + 8038e24: 2400e970 .word 0x2400e970 + 8038e28: 080432d8 .word 0x080432d8 + 8038e2c: 08043300 .word 0x08043300 + +08038e30 : * * Automatically called from tcp_tmr(). */ void tcp_fasttmr(void) { - 8038dac: b580 push {r7, lr} - 8038dae: b082 sub sp, #8 - 8038db0: af00 add r7, sp, #0 + 8038e30: b580 push {r7, lr} + 8038e32: b082 sub sp, #8 + 8038e34: af00 add r7, sp, #0 struct tcp_pcb *pcb; ++tcp_timer_ctr; - 8038db2: 4b2d ldr r3, [pc, #180] ; (8038e68 ) - 8038db4: 781b ldrb r3, [r3, #0] - 8038db6: 3301 adds r3, #1 - 8038db8: b2da uxtb r2, r3 - 8038dba: 4b2b ldr r3, [pc, #172] ; (8038e68 ) - 8038dbc: 701a strb r2, [r3, #0] + 8038e36: 4b2d ldr r3, [pc, #180] ; (8038eec ) + 8038e38: 781b ldrb r3, [r3, #0] + 8038e3a: 3301 adds r3, #1 + 8038e3c: b2da uxtb r2, r3 + 8038e3e: 4b2b ldr r3, [pc, #172] ; (8038eec ) + 8038e40: 701a strb r2, [r3, #0] tcp_fasttmr_start: pcb = tcp_active_pcbs; - 8038dbe: 4b2b ldr r3, [pc, #172] ; (8038e6c ) - 8038dc0: 681b ldr r3, [r3, #0] - 8038dc2: 607b str r3, [r7, #4] + 8038e42: 4b2b ldr r3, [pc, #172] ; (8038ef0 ) + 8038e44: 681b ldr r3, [r3, #0] + 8038e46: 607b str r3, [r7, #4] while (pcb != NULL) { - 8038dc4: e048 b.n 8038e58 + 8038e48: e048 b.n 8038edc if (pcb->last_timer != tcp_timer_ctr) { - 8038dc6: 687b ldr r3, [r7, #4] - 8038dc8: 7f9a ldrb r2, [r3, #30] - 8038dca: 4b27 ldr r3, [pc, #156] ; (8038e68 ) - 8038dcc: 781b ldrb r3, [r3, #0] - 8038dce: 429a cmp r2, r3 - 8038dd0: d03f beq.n 8038e52 + 8038e4a: 687b ldr r3, [r7, #4] + 8038e4c: 7f9a ldrb r2, [r3, #30] + 8038e4e: 4b27 ldr r3, [pc, #156] ; (8038eec ) + 8038e50: 781b ldrb r3, [r3, #0] + 8038e52: 429a cmp r2, r3 + 8038e54: d03f beq.n 8038ed6 struct tcp_pcb *next; pcb->last_timer = tcp_timer_ctr; - 8038dd2: 4b25 ldr r3, [pc, #148] ; (8038e68 ) - 8038dd4: 781a ldrb r2, [r3, #0] - 8038dd6: 687b ldr r3, [r7, #4] - 8038dd8: 779a strb r2, [r3, #30] + 8038e56: 4b25 ldr r3, [pc, #148] ; (8038eec ) + 8038e58: 781a ldrb r2, [r3, #0] + 8038e5a: 687b ldr r3, [r7, #4] + 8038e5c: 779a strb r2, [r3, #30] /* send delayed ACKs */ if (pcb->flags & TF_ACK_DELAY) { - 8038dda: 687b ldr r3, [r7, #4] - 8038ddc: 8b5b ldrh r3, [r3, #26] - 8038dde: f003 0301 and.w r3, r3, #1 - 8038de2: 2b00 cmp r3, #0 - 8038de4: d010 beq.n 8038e08 + 8038e5e: 687b ldr r3, [r7, #4] + 8038e60: 8b5b ldrh r3, [r3, #26] + 8038e62: f003 0301 and.w r3, r3, #1 + 8038e66: 2b00 cmp r3, #0 + 8038e68: d010 beq.n 8038e8c LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n")); tcp_ack_now(pcb); - 8038de6: 687b ldr r3, [r7, #4] - 8038de8: 8b5b ldrh r3, [r3, #26] - 8038dea: f043 0302 orr.w r3, r3, #2 - 8038dee: b29a uxth r2, r3 - 8038df0: 687b ldr r3, [r7, #4] - 8038df2: 835a strh r2, [r3, #26] + 8038e6a: 687b ldr r3, [r7, #4] + 8038e6c: 8b5b ldrh r3, [r3, #26] + 8038e6e: f043 0302 orr.w r3, r3, #2 + 8038e72: b29a uxth r2, r3 + 8038e74: 687b ldr r3, [r7, #4] + 8038e76: 835a strh r2, [r3, #26] tcp_output(pcb); - 8038df4: 6878 ldr r0, [r7, #4] - 8038df6: f003 ffd1 bl 803cd9c + 8038e78: 6878 ldr r0, [r7, #4] + 8038e7a: f003 ffd1 bl 803ce20 tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 8038dfa: 687b ldr r3, [r7, #4] - 8038dfc: 8b5b ldrh r3, [r3, #26] - 8038dfe: f023 0303 bic.w r3, r3, #3 - 8038e02: b29a uxth r2, r3 - 8038e04: 687b ldr r3, [r7, #4] - 8038e06: 835a strh r2, [r3, #26] + 8038e7e: 687b ldr r3, [r7, #4] + 8038e80: 8b5b ldrh r3, [r3, #26] + 8038e82: f023 0303 bic.w r3, r3, #3 + 8038e86: b29a uxth r2, r3 + 8038e88: 687b ldr r3, [r7, #4] + 8038e8a: 835a strh r2, [r3, #26] } /* send pending FIN */ if (pcb->flags & TF_CLOSEPEND) { - 8038e08: 687b ldr r3, [r7, #4] - 8038e0a: 8b5b ldrh r3, [r3, #26] - 8038e0c: f003 0308 and.w r3, r3, #8 - 8038e10: 2b00 cmp r3, #0 - 8038e12: d009 beq.n 8038e28 + 8038e8c: 687b ldr r3, [r7, #4] + 8038e8e: 8b5b ldrh r3, [r3, #26] + 8038e90: f003 0308 and.w r3, r3, #8 + 8038e94: 2b00 cmp r3, #0 + 8038e96: d009 beq.n 8038eac LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: pending FIN\n")); tcp_clear_flags(pcb, TF_CLOSEPEND); - 8038e14: 687b ldr r3, [r7, #4] - 8038e16: 8b5b ldrh r3, [r3, #26] - 8038e18: f023 0308 bic.w r3, r3, #8 - 8038e1c: b29a uxth r2, r3 - 8038e1e: 687b ldr r3, [r7, #4] - 8038e20: 835a strh r2, [r3, #26] + 8038e98: 687b ldr r3, [r7, #4] + 8038e9a: 8b5b ldrh r3, [r3, #26] + 8038e9c: f023 0308 bic.w r3, r3, #8 + 8038ea0: b29a uxth r2, r3 + 8038ea2: 687b ldr r3, [r7, #4] + 8038ea4: 835a strh r2, [r3, #26] tcp_close_shutdown_fin(pcb); - 8038e22: 6878 ldr r0, [r7, #4] - 8038e24: f7ff f8be bl 8037fa4 + 8038ea6: 6878 ldr r0, [r7, #4] + 8038ea8: f7ff f8be bl 8038028 } next = pcb->next; - 8038e28: 687b ldr r3, [r7, #4] - 8038e2a: 68db ldr r3, [r3, #12] - 8038e2c: 603b str r3, [r7, #0] + 8038eac: 687b ldr r3, [r7, #4] + 8038eae: 68db ldr r3, [r3, #12] + 8038eb0: 603b str r3, [r7, #0] /* If there is data which was previously "refused" by upper layer */ if (pcb->refused_data != NULL) { - 8038e2e: 687b ldr r3, [r7, #4] - 8038e30: 6f9b ldr r3, [r3, #120] ; 0x78 - 8038e32: 2b00 cmp r3, #0 - 8038e34: d00a beq.n 8038e4c + 8038eb2: 687b ldr r3, [r7, #4] + 8038eb4: 6f9b ldr r3, [r3, #120] ; 0x78 + 8038eb6: 2b00 cmp r3, #0 + 8038eb8: d00a beq.n 8038ed0 tcp_active_pcbs_changed = 0; - 8038e36: 4b0e ldr r3, [pc, #56] ; (8038e70 ) - 8038e38: 2200 movs r2, #0 - 8038e3a: 701a strb r2, [r3, #0] + 8038eba: 4b0e ldr r3, [pc, #56] ; (8038ef4 ) + 8038ebc: 2200 movs r2, #0 + 8038ebe: 701a strb r2, [r3, #0] tcp_process_refused_data(pcb); - 8038e3c: 6878 ldr r0, [r7, #4] - 8038e3e: f000 f819 bl 8038e74 + 8038ec0: 6878 ldr r0, [r7, #4] + 8038ec2: f000 f819 bl 8038ef8 if (tcp_active_pcbs_changed) { - 8038e42: 4b0b ldr r3, [pc, #44] ; (8038e70 ) - 8038e44: 781b ldrb r3, [r3, #0] - 8038e46: 2b00 cmp r3, #0 - 8038e48: d000 beq.n 8038e4c + 8038ec6: 4b0b ldr r3, [pc, #44] ; (8038ef4 ) + 8038ec8: 781b ldrb r3, [r3, #0] + 8038eca: 2b00 cmp r3, #0 + 8038ecc: d000 beq.n 8038ed0 /* application callback has changed the pcb list: restart the loop */ goto tcp_fasttmr_start; - 8038e4a: e7b8 b.n 8038dbe + 8038ece: e7b8 b.n 8038e42 } } pcb = next; - 8038e4c: 683b ldr r3, [r7, #0] - 8038e4e: 607b str r3, [r7, #4] - 8038e50: e002 b.n 8038e58 + 8038ed0: 683b ldr r3, [r7, #0] + 8038ed2: 607b str r3, [r7, #4] + 8038ed4: e002 b.n 8038edc } else { pcb = pcb->next; - 8038e52: 687b ldr r3, [r7, #4] - 8038e54: 68db ldr r3, [r3, #12] - 8038e56: 607b str r3, [r7, #4] + 8038ed6: 687b ldr r3, [r7, #4] + 8038ed8: 68db ldr r3, [r3, #12] + 8038eda: 607b str r3, [r7, #4] while (pcb != NULL) { - 8038e58: 687b ldr r3, [r7, #4] - 8038e5a: 2b00 cmp r3, #0 - 8038e5c: d1b3 bne.n 8038dc6 + 8038edc: 687b ldr r3, [r7, #4] + 8038ede: 2b00 cmp r3, #0 + 8038ee0: d1b3 bne.n 8038e4a } } } - 8038e5e: bf00 nop - 8038e60: bf00 nop - 8038e62: 3708 adds r7, #8 - 8038e64: 46bd mov sp, r7 - 8038e66: bd80 pop {r7, pc} - 8038e68: 2400e96e .word 0x2400e96e - 8038e6c: 2400e964 .word 0x2400e964 - 8038e70: 2400e96c .word 0x2400e96c + 8038ee2: bf00 nop + 8038ee4: bf00 nop + 8038ee6: 3708 adds r7, #8 + 8038ee8: 46bd mov sp, r7 + 8038eea: bd80 pop {r7, pc} + 8038eec: 2400e976 .word 0x2400e976 + 8038ef0: 2400e96c .word 0x2400e96c + 8038ef4: 2400e974 .word 0x2400e974 -08038e74 : +08038ef8 : } /** Pass pcb->refused_data to the recv callback */ err_t tcp_process_refused_data(struct tcp_pcb *pcb) { - 8038e74: b590 push {r4, r7, lr} - 8038e76: b085 sub sp, #20 - 8038e78: af00 add r7, sp, #0 - 8038e7a: 6078 str r0, [r7, #4] + 8038ef8: b590 push {r4, r7, lr} + 8038efa: b085 sub sp, #20 + 8038efc: af00 add r7, sp, #0 + 8038efe: 6078 str r0, [r7, #4] #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE struct pbuf *rest; #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ LWIP_ERROR("tcp_process_refused_data: invalid pcb", pcb != NULL, return ERR_ARG); - 8038e7c: 687b ldr r3, [r7, #4] - 8038e7e: 2b00 cmp r3, #0 - 8038e80: d109 bne.n 8038e96 - 8038e82: 4b37 ldr r3, [pc, #220] ; (8038f60 ) - 8038e84: f240 6209 movw r2, #1545 ; 0x609 - 8038e88: 4936 ldr r1, [pc, #216] ; (8038f64 ) - 8038e8a: 4837 ldr r0, [pc, #220] ; (8038f68 ) - 8038e8c: f007 fe40 bl 8040b10 - 8038e90: f06f 030f mvn.w r3, #15 - 8038e94: e060 b.n 8038f58 + 8038f00: 687b ldr r3, [r7, #4] + 8038f02: 2b00 cmp r3, #0 + 8038f04: d109 bne.n 8038f1a + 8038f06: 4b37 ldr r3, [pc, #220] ; (8038fe4 ) + 8038f08: f240 6209 movw r2, #1545 ; 0x609 + 8038f0c: 4936 ldr r1, [pc, #216] ; (8038fe8 ) + 8038f0e: 4837 ldr r0, [pc, #220] ; (8038fec ) + 8038f10: f007 fe40 bl 8040b94 + 8038f14: f06f 030f mvn.w r3, #15 + 8038f18: e060 b.n 8038fdc #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE while (pcb->refused_data != NULL) #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ { err_t err; u8_t refused_flags = pcb->refused_data->flags; - 8038e96: 687b ldr r3, [r7, #4] - 8038e98: 6f9b ldr r3, [r3, #120] ; 0x78 - 8038e9a: 7b5b ldrb r3, [r3, #13] - 8038e9c: 73bb strb r3, [r7, #14] + 8038f1a: 687b ldr r3, [r7, #4] + 8038f1c: 6f9b ldr r3, [r3, #120] ; 0x78 + 8038f1e: 7b5b ldrb r3, [r3, #13] + 8038f20: 73bb strb r3, [r7, #14] /* set pcb->refused_data to NULL in case the callback frees it and then closes the pcb */ struct pbuf *refused_data = pcb->refused_data; - 8038e9e: 687b ldr r3, [r7, #4] - 8038ea0: 6f9b ldr r3, [r3, #120] ; 0x78 - 8038ea2: 60bb str r3, [r7, #8] + 8038f22: 687b ldr r3, [r7, #4] + 8038f24: 6f9b ldr r3, [r3, #120] ; 0x78 + 8038f26: 60bb str r3, [r7, #8] #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE pbuf_split_64k(refused_data, &rest); pcb->refused_data = rest; #else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ pcb->refused_data = NULL; - 8038ea4: 687b ldr r3, [r7, #4] - 8038ea6: 2200 movs r2, #0 - 8038ea8: 679a str r2, [r3, #120] ; 0x78 + 8038f28: 687b ldr r3, [r7, #4] + 8038f2a: 2200 movs r2, #0 + 8038f2c: 679a str r2, [r3, #120] ; 0x78 #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ /* Notify again application with data previously received. */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n")); TCP_EVENT_RECV(pcb, refused_data, ERR_OK, err); - 8038eaa: 687b ldr r3, [r7, #4] - 8038eac: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8038eb0: 2b00 cmp r3, #0 - 8038eb2: d00b beq.n 8038ecc - 8038eb4: 687b ldr r3, [r7, #4] - 8038eb6: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 - 8038eba: 687b ldr r3, [r7, #4] - 8038ebc: 6918 ldr r0, [r3, #16] - 8038ebe: 2300 movs r3, #0 - 8038ec0: 68ba ldr r2, [r7, #8] - 8038ec2: 6879 ldr r1, [r7, #4] - 8038ec4: 47a0 blx r4 - 8038ec6: 4603 mov r3, r0 - 8038ec8: 73fb strb r3, [r7, #15] - 8038eca: e007 b.n 8038edc - 8038ecc: 2300 movs r3, #0 - 8038ece: 68ba ldr r2, [r7, #8] - 8038ed0: 6879 ldr r1, [r7, #4] - 8038ed2: 2000 movs r0, #0 - 8038ed4: f000 f8c2 bl 803905c - 8038ed8: 4603 mov r3, r0 - 8038eda: 73fb strb r3, [r7, #15] + 8038f2e: 687b ldr r3, [r7, #4] + 8038f30: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8038f34: 2b00 cmp r3, #0 + 8038f36: d00b beq.n 8038f50 + 8038f38: 687b ldr r3, [r7, #4] + 8038f3a: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 + 8038f3e: 687b ldr r3, [r7, #4] + 8038f40: 6918 ldr r0, [r3, #16] + 8038f42: 2300 movs r3, #0 + 8038f44: 68ba ldr r2, [r7, #8] + 8038f46: 6879 ldr r1, [r7, #4] + 8038f48: 47a0 blx r4 + 8038f4a: 4603 mov r3, r0 + 8038f4c: 73fb strb r3, [r7, #15] + 8038f4e: e007 b.n 8038f60 + 8038f50: 2300 movs r3, #0 + 8038f52: 68ba ldr r2, [r7, #8] + 8038f54: 6879 ldr r1, [r7, #4] + 8038f56: 2000 movs r0, #0 + 8038f58: f000 f8c2 bl 80390e0 + 8038f5c: 4603 mov r3, r0 + 8038f5e: 73fb strb r3, [r7, #15] if (err == ERR_OK) { - 8038edc: f997 300f ldrsb.w r3, [r7, #15] - 8038ee0: 2b00 cmp r3, #0 - 8038ee2: d12a bne.n 8038f3a + 8038f60: f997 300f ldrsb.w r3, [r7, #15] + 8038f64: 2b00 cmp r3, #0 + 8038f66: d12a bne.n 8038fbe /* did refused_data include a FIN? */ if ((refused_flags & PBUF_FLAG_TCP_FIN) - 8038ee4: 7bbb ldrb r3, [r7, #14] - 8038ee6: f003 0320 and.w r3, r3, #32 - 8038eea: 2b00 cmp r3, #0 - 8038eec: d033 beq.n 8038f56 + 8038f68: 7bbb ldrb r3, [r7, #14] + 8038f6a: f003 0320 and.w r3, r3, #32 + 8038f6e: 2b00 cmp r3, #0 + 8038f70: d033 beq.n 8038fda && (rest == NULL) #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ ) { /* correct rcv_wnd as the application won't call tcp_recved() for the FIN's seqno */ if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) { - 8038eee: 687b ldr r3, [r7, #4] - 8038ef0: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8038ef2: f5b3 6f06 cmp.w r3, #2144 ; 0x860 - 8038ef6: d005 beq.n 8038f04 + 8038f72: 687b ldr r3, [r7, #4] + 8038f74: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8038f76: f5b3 6f06 cmp.w r3, #2144 ; 0x860 + 8038f7a: d005 beq.n 8038f88 pcb->rcv_wnd++; - 8038ef8: 687b ldr r3, [r7, #4] - 8038efa: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8038efc: 3301 adds r3, #1 - 8038efe: b29a uxth r2, r3 - 8038f00: 687b ldr r3, [r7, #4] - 8038f02: 851a strh r2, [r3, #40] ; 0x28 + 8038f7c: 687b ldr r3, [r7, #4] + 8038f7e: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8038f80: 3301 adds r3, #1 + 8038f82: b29a uxth r2, r3 + 8038f84: 687b ldr r3, [r7, #4] + 8038f86: 851a strh r2, [r3, #40] ; 0x28 } TCP_EVENT_CLOSED(pcb, err); - 8038f04: 687b ldr r3, [r7, #4] - 8038f06: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8038f0a: 2b00 cmp r3, #0 - 8038f0c: d00b beq.n 8038f26 - 8038f0e: 687b ldr r3, [r7, #4] - 8038f10: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 - 8038f14: 687b ldr r3, [r7, #4] - 8038f16: 6918 ldr r0, [r3, #16] - 8038f18: 2300 movs r3, #0 - 8038f1a: 2200 movs r2, #0 - 8038f1c: 6879 ldr r1, [r7, #4] - 8038f1e: 47a0 blx r4 - 8038f20: 4603 mov r3, r0 - 8038f22: 73fb strb r3, [r7, #15] - 8038f24: e001 b.n 8038f2a - 8038f26: 2300 movs r3, #0 - 8038f28: 73fb strb r3, [r7, #15] + 8038f88: 687b ldr r3, [r7, #4] + 8038f8a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8038f8e: 2b00 cmp r3, #0 + 8038f90: d00b beq.n 8038faa + 8038f92: 687b ldr r3, [r7, #4] + 8038f94: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 + 8038f98: 687b ldr r3, [r7, #4] + 8038f9a: 6918 ldr r0, [r3, #16] + 8038f9c: 2300 movs r3, #0 + 8038f9e: 2200 movs r2, #0 + 8038fa0: 6879 ldr r1, [r7, #4] + 8038fa2: 47a0 blx r4 + 8038fa4: 4603 mov r3, r0 + 8038fa6: 73fb strb r3, [r7, #15] + 8038fa8: e001 b.n 8038fae + 8038faa: 2300 movs r3, #0 + 8038fac: 73fb strb r3, [r7, #15] if (err == ERR_ABRT) { - 8038f2a: f997 300f ldrsb.w r3, [r7, #15] - 8038f2e: f113 0f0d cmn.w r3, #13 - 8038f32: d110 bne.n 8038f56 + 8038fae: f997 300f ldrsb.w r3, [r7, #15] + 8038fb2: f113 0f0d cmn.w r3, #13 + 8038fb6: d110 bne.n 8038fda return ERR_ABRT; - 8038f34: f06f 030c mvn.w r3, #12 - 8038f38: e00e b.n 8038f58 + 8038fb8: f06f 030c mvn.w r3, #12 + 8038fbc: e00e b.n 8038fdc } } } else if (err == ERR_ABRT) { - 8038f3a: f997 300f ldrsb.w r3, [r7, #15] - 8038f3e: f113 0f0d cmn.w r3, #13 - 8038f42: d102 bne.n 8038f4a + 8038fbe: f997 300f ldrsb.w r3, [r7, #15] + 8038fc2: f113 0f0d cmn.w r3, #13 + 8038fc6: d102 bne.n 8038fce /* if err == ERR_ABRT, 'pcb' is already deallocated */ /* Drop incoming packets because pcb is "full" (only if the incoming segment contains data). */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n")); return ERR_ABRT; - 8038f44: f06f 030c mvn.w r3, #12 - 8038f48: e006 b.n 8038f58 + 8038fc8: f06f 030c mvn.w r3, #12 + 8038fcc: e006 b.n 8038fdc #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE if (rest != NULL) { pbuf_cat(refused_data, rest); } #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ pcb->refused_data = refused_data; - 8038f4a: 687b ldr r3, [r7, #4] - 8038f4c: 68ba ldr r2, [r7, #8] - 8038f4e: 679a str r2, [r3, #120] ; 0x78 + 8038fce: 687b ldr r3, [r7, #4] + 8038fd0: 68ba ldr r2, [r7, #8] + 8038fd2: 679a str r2, [r3, #120] ; 0x78 return ERR_INPROGRESS; - 8038f50: f06f 0304 mvn.w r3, #4 - 8038f54: e000 b.n 8038f58 + 8038fd4: f06f 0304 mvn.w r3, #4 + 8038fd8: e000 b.n 8038fdc } } return ERR_OK; - 8038f56: 2300 movs r3, #0 + 8038fda: 2300 movs r3, #0 } - 8038f58: 4618 mov r0, r3 - 8038f5a: 3714 adds r7, #20 - 8038f5c: 46bd mov sp, r7 - 8038f5e: bd90 pop {r4, r7, pc} - 8038f60: 08042d98 .word 0x08042d98 - 8038f64: 080432a8 .word 0x080432a8 - 8038f68: 08042ddc .word 0x08042ddc + 8038fdc: 4618 mov r0, r3 + 8038fde: 3714 adds r7, #20 + 8038fe0: 46bd mov sp, r7 + 8038fe2: bd90 pop {r4, r7, pc} + 8038fe4: 08042e18 .word 0x08042e18 + 8038fe8: 08043328 .word 0x08043328 + 8038fec: 08042e5c .word 0x08042e5c -08038f6c : +08038ff0 : * * @param seg tcp_seg list of TCP segments to free */ void tcp_segs_free(struct tcp_seg *seg) { - 8038f6c: b580 push {r7, lr} - 8038f6e: b084 sub sp, #16 - 8038f70: af00 add r7, sp, #0 - 8038f72: 6078 str r0, [r7, #4] + 8038ff0: b580 push {r7, lr} + 8038ff2: b084 sub sp, #16 + 8038ff4: af00 add r7, sp, #0 + 8038ff6: 6078 str r0, [r7, #4] while (seg != NULL) { - 8038f74: e007 b.n 8038f86 + 8038ff8: e007 b.n 803900a struct tcp_seg *next = seg->next; - 8038f76: 687b ldr r3, [r7, #4] - 8038f78: 681b ldr r3, [r3, #0] - 8038f7a: 60fb str r3, [r7, #12] + 8038ffa: 687b ldr r3, [r7, #4] + 8038ffc: 681b ldr r3, [r3, #0] + 8038ffe: 60fb str r3, [r7, #12] tcp_seg_free(seg); - 8038f7c: 6878 ldr r0, [r7, #4] - 8038f7e: f000 f80a bl 8038f96 + 8039000: 6878 ldr r0, [r7, #4] + 8039002: f000 f80a bl 803901a seg = next; - 8038f82: 68fb ldr r3, [r7, #12] - 8038f84: 607b str r3, [r7, #4] + 8039006: 68fb ldr r3, [r7, #12] + 8039008: 607b str r3, [r7, #4] while (seg != NULL) { - 8038f86: 687b ldr r3, [r7, #4] - 8038f88: 2b00 cmp r3, #0 - 8038f8a: d1f4 bne.n 8038f76 + 803900a: 687b ldr r3, [r7, #4] + 803900c: 2b00 cmp r3, #0 + 803900e: d1f4 bne.n 8038ffa } } - 8038f8c: bf00 nop - 8038f8e: bf00 nop - 8038f90: 3710 adds r7, #16 - 8038f92: 46bd mov sp, r7 - 8038f94: bd80 pop {r7, pc} + 8039010: bf00 nop + 8039012: bf00 nop + 8039014: 3710 adds r7, #16 + 8039016: 46bd mov sp, r7 + 8039018: bd80 pop {r7, pc} -08038f96 : +0803901a : * * @param seg single tcp_seg to free */ void tcp_seg_free(struct tcp_seg *seg) { - 8038f96: b580 push {r7, lr} - 8038f98: b082 sub sp, #8 - 8038f9a: af00 add r7, sp, #0 - 8038f9c: 6078 str r0, [r7, #4] + 803901a: b580 push {r7, lr} + 803901c: b082 sub sp, #8 + 803901e: af00 add r7, sp, #0 + 8039020: 6078 str r0, [r7, #4] if (seg != NULL) { - 8038f9e: 687b ldr r3, [r7, #4] - 8038fa0: 2b00 cmp r3, #0 - 8038fa2: d00c beq.n 8038fbe + 8039022: 687b ldr r3, [r7, #4] + 8039024: 2b00 cmp r3, #0 + 8039026: d00c beq.n 8039042 if (seg->p != NULL) { - 8038fa4: 687b ldr r3, [r7, #4] - 8038fa6: 685b ldr r3, [r3, #4] - 8038fa8: 2b00 cmp r3, #0 - 8038faa: d004 beq.n 8038fb6 + 8039028: 687b ldr r3, [r7, #4] + 803902a: 685b ldr r3, [r3, #4] + 803902c: 2b00 cmp r3, #0 + 803902e: d004 beq.n 803903a pbuf_free(seg->p); - 8038fac: 687b ldr r3, [r7, #4] - 8038fae: 685b ldr r3, [r3, #4] - 8038fb0: 4618 mov r0, r3 - 8038fb2: f7fe fbc3 bl 803773c + 8039030: 687b ldr r3, [r7, #4] + 8039032: 685b ldr r3, [r3, #4] + 8039034: 4618 mov r0, r3 + 8039036: f7fe fbc3 bl 80377c0 #if TCP_DEBUG seg->p = NULL; #endif /* TCP_DEBUG */ } memp_free(MEMP_TCP_SEG, seg); - 8038fb6: 6879 ldr r1, [r7, #4] - 8038fb8: 2003 movs r0, #3 - 8038fba: f7fd fd2d bl 8036a18 + 803903a: 6879 ldr r1, [r7, #4] + 803903c: 2003 movs r0, #3 + 803903e: f7fd fd2d bl 8036a9c } } - 8038fbe: bf00 nop - 8038fc0: 3708 adds r7, #8 - 8038fc2: 46bd mov sp, r7 - 8038fc4: bd80 pop {r7, pc} + 8039042: bf00 nop + 8039044: 3708 adds r7, #8 + 8039046: 46bd mov sp, r7 + 8039048: bd80 pop {r7, pc} ... -08038fc8 : +0803904c : * @param pcb the tcp_pcb to manipulate * @param prio new priority */ void tcp_setprio(struct tcp_pcb *pcb, u8_t prio) { - 8038fc8: b580 push {r7, lr} - 8038fca: b082 sub sp, #8 - 8038fcc: af00 add r7, sp, #0 - 8038fce: 6078 str r0, [r7, #4] - 8038fd0: 460b mov r3, r1 - 8038fd2: 70fb strb r3, [r7, #3] + 803904c: b580 push {r7, lr} + 803904e: b082 sub sp, #8 + 8039050: af00 add r7, sp, #0 + 8039052: 6078 str r0, [r7, #4] + 8039054: 460b mov r3, r1 + 8039056: 70fb strb r3, [r7, #3] LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("tcp_setprio: invalid pcb", pcb != NULL, return); - 8038fd4: 687b ldr r3, [r7, #4] - 8038fd6: 2b00 cmp r3, #0 - 8038fd8: d107 bne.n 8038fea - 8038fda: 4b07 ldr r3, [pc, #28] ; (8038ff8 ) - 8038fdc: f44f 62ce mov.w r2, #1648 ; 0x670 - 8038fe0: 4906 ldr r1, [pc, #24] ; (8038ffc ) - 8038fe2: 4807 ldr r0, [pc, #28] ; (8039000 ) - 8038fe4: f007 fd94 bl 8040b10 - 8038fe8: e002 b.n 8038ff0 + 8039058: 687b ldr r3, [r7, #4] + 803905a: 2b00 cmp r3, #0 + 803905c: d107 bne.n 803906e + 803905e: 4b07 ldr r3, [pc, #28] ; (803907c ) + 8039060: f44f 62ce mov.w r2, #1648 ; 0x670 + 8039064: 4906 ldr r1, [pc, #24] ; (8039080 ) + 8039066: 4807 ldr r0, [pc, #28] ; (8039084 ) + 8039068: f007 fd94 bl 8040b94 + 803906c: e002 b.n 8039074 pcb->prio = prio; - 8038fea: 687b ldr r3, [r7, #4] - 8038fec: 78fa ldrb r2, [r7, #3] - 8038fee: 755a strb r2, [r3, #21] -} - 8038ff0: 3708 adds r7, #8 - 8038ff2: 46bd mov sp, r7 - 8038ff4: bd80 pop {r7, pc} - 8038ff6: bf00 nop - 8038ff8: 08042d98 .word 0x08042d98 - 8038ffc: 080432d0 .word 0x080432d0 - 8039000: 08042ddc .word 0x08042ddc - -08039004 : + 803906e: 687b ldr r3, [r7, #4] + 8039070: 78fa ldrb r2, [r7, #3] + 8039072: 755a strb r2, [r3, #21] +} + 8039074: 3708 adds r7, #8 + 8039076: 46bd mov sp, r7 + 8039078: bd80 pop {r7, pc} + 803907a: bf00 nop + 803907c: 08042e18 .word 0x08042e18 + 8039080: 08043350 .word 0x08043350 + 8039084: 08042e5c .word 0x08042e5c + +08039088 : * @param seg the old tcp_seg * @return a copy of seg */ struct tcp_seg * tcp_seg_copy(struct tcp_seg *seg) { - 8039004: b580 push {r7, lr} - 8039006: b084 sub sp, #16 - 8039008: af00 add r7, sp, #0 - 803900a: 6078 str r0, [r7, #4] + 8039088: b580 push {r7, lr} + 803908a: b084 sub sp, #16 + 803908c: af00 add r7, sp, #0 + 803908e: 6078 str r0, [r7, #4] struct tcp_seg *cseg; LWIP_ASSERT("tcp_seg_copy: invalid seg", seg != NULL); - 803900c: 687b ldr r3, [r7, #4] - 803900e: 2b00 cmp r3, #0 - 8039010: d106 bne.n 8039020 - 8039012: 4b0f ldr r3, [pc, #60] ; (8039050 ) - 8039014: f240 6282 movw r2, #1666 ; 0x682 - 8039018: 490e ldr r1, [pc, #56] ; (8039054 ) - 803901a: 480f ldr r0, [pc, #60] ; (8039058 ) - 803901c: f007 fd78 bl 8040b10 + 8039090: 687b ldr r3, [r7, #4] + 8039092: 2b00 cmp r3, #0 + 8039094: d106 bne.n 80390a4 + 8039096: 4b0f ldr r3, [pc, #60] ; (80390d4 ) + 8039098: f240 6282 movw r2, #1666 ; 0x682 + 803909c: 490e ldr r1, [pc, #56] ; (80390d8 ) + 803909e: 480f ldr r0, [pc, #60] ; (80390dc ) + 80390a0: f007 fd78 bl 8040b94 cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG); - 8039020: 2003 movs r0, #3 - 8039022: f7fd fc89 bl 8036938 - 8039026: 60f8 str r0, [r7, #12] + 80390a4: 2003 movs r0, #3 + 80390a6: f7fd fc89 bl 80369bc + 80390aa: 60f8 str r0, [r7, #12] if (cseg == NULL) { - 8039028: 68fb ldr r3, [r7, #12] - 803902a: 2b00 cmp r3, #0 - 803902c: d101 bne.n 8039032 + 80390ac: 68fb ldr r3, [r7, #12] + 80390ae: 2b00 cmp r3, #0 + 80390b0: d101 bne.n 80390b6 return NULL; - 803902e: 2300 movs r3, #0 - 8039030: e00a b.n 8039048 + 80390b2: 2300 movs r3, #0 + 80390b4: e00a b.n 80390cc } SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg)); - 8039032: 2210 movs r2, #16 - 8039034: 6879 ldr r1, [r7, #4] - 8039036: 68f8 ldr r0, [r7, #12] - 8039038: f007 fc5a bl 80408f0 + 80390b6: 2210 movs r2, #16 + 80390b8: 6879 ldr r1, [r7, #4] + 80390ba: 68f8 ldr r0, [r7, #12] + 80390bc: f007 fc5a bl 8040974 pbuf_ref(cseg->p); - 803903c: 68fb ldr r3, [r7, #12] - 803903e: 685b ldr r3, [r3, #4] - 8039040: 4618 mov r0, r3 - 8039042: f7fe fc1b bl 803787c + 80390c0: 68fb ldr r3, [r7, #12] + 80390c2: 685b ldr r3, [r3, #4] + 80390c4: 4618 mov r0, r3 + 80390c6: f7fe fc1b bl 8037900 return cseg; - 8039046: 68fb ldr r3, [r7, #12] + 80390ca: 68fb ldr r3, [r7, #12] } - 8039048: 4618 mov r0, r3 - 803904a: 3710 adds r7, #16 - 803904c: 46bd mov sp, r7 - 803904e: bd80 pop {r7, pc} - 8039050: 08042d98 .word 0x08042d98 - 8039054: 080432ec .word 0x080432ec - 8039058: 08042ddc .word 0x08042ddc + 80390cc: 4618 mov r0, r3 + 80390ce: 3710 adds r7, #16 + 80390d0: 46bd mov sp, r7 + 80390d2: bd80 pop {r7, pc} + 80390d4: 08042e18 .word 0x08042e18 + 80390d8: 0804336c .word 0x0804336c + 80390dc: 08042e5c .word 0x08042e5c -0803905c : +080390e0 : * Default receive callback that is called if the user didn't register * a recv callback for the pcb. */ err_t tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) { - 803905c: b580 push {r7, lr} - 803905e: b084 sub sp, #16 - 8039060: af00 add r7, sp, #0 - 8039062: 60f8 str r0, [r7, #12] - 8039064: 60b9 str r1, [r7, #8] - 8039066: 607a str r2, [r7, #4] - 8039068: 70fb strb r3, [r7, #3] + 80390e0: b580 push {r7, lr} + 80390e2: b084 sub sp, #16 + 80390e4: af00 add r7, sp, #0 + 80390e6: 60f8 str r0, [r7, #12] + 80390e8: 60b9 str r1, [r7, #8] + 80390ea: 607a str r2, [r7, #4] + 80390ec: 70fb strb r3, [r7, #3] LWIP_UNUSED_ARG(arg); LWIP_ERROR("tcp_recv_null: invalid pcb", pcb != NULL, return ERR_ARG); - 803906a: 68bb ldr r3, [r7, #8] - 803906c: 2b00 cmp r3, #0 - 803906e: d109 bne.n 8039084 - 8039070: 4b12 ldr r3, [pc, #72] ; (80390bc ) - 8039072: f44f 62d3 mov.w r2, #1688 ; 0x698 - 8039076: 4912 ldr r1, [pc, #72] ; (80390c0 ) - 8039078: 4812 ldr r0, [pc, #72] ; (80390c4 ) - 803907a: f007 fd49 bl 8040b10 - 803907e: f06f 030f mvn.w r3, #15 - 8039082: e016 b.n 80390b2 + 80390ee: 68bb ldr r3, [r7, #8] + 80390f0: 2b00 cmp r3, #0 + 80390f2: d109 bne.n 8039108 + 80390f4: 4b12 ldr r3, [pc, #72] ; (8039140 ) + 80390f6: f44f 62d3 mov.w r2, #1688 ; 0x698 + 80390fa: 4912 ldr r1, [pc, #72] ; (8039144 ) + 80390fc: 4812 ldr r0, [pc, #72] ; (8039148 ) + 80390fe: f007 fd49 bl 8040b94 + 8039102: f06f 030f mvn.w r3, #15 + 8039106: e016 b.n 8039136 if (p != NULL) { - 8039084: 687b ldr r3, [r7, #4] - 8039086: 2b00 cmp r3, #0 - 8039088: d009 beq.n 803909e + 8039108: 687b ldr r3, [r7, #4] + 803910a: 2b00 cmp r3, #0 + 803910c: d009 beq.n 8039122 tcp_recved(pcb, p->tot_len); - 803908a: 687b ldr r3, [r7, #4] - 803908c: 891b ldrh r3, [r3, #8] - 803908e: 4619 mov r1, r3 - 8039090: 68b8 ldr r0, [r7, #8] - 8039092: f7ff fab5 bl 8038600 + 803910e: 687b ldr r3, [r7, #4] + 8039110: 891b ldrh r3, [r3, #8] + 8039112: 4619 mov r1, r3 + 8039114: 68b8 ldr r0, [r7, #8] + 8039116: f7ff fab5 bl 8038684 pbuf_free(p); - 8039096: 6878 ldr r0, [r7, #4] - 8039098: f7fe fb50 bl 803773c - 803909c: e008 b.n 80390b0 + 803911a: 6878 ldr r0, [r7, #4] + 803911c: f7fe fb50 bl 80377c0 + 8039120: e008 b.n 8039134 } else if (err == ERR_OK) { - 803909e: f997 3003 ldrsb.w r3, [r7, #3] - 80390a2: 2b00 cmp r3, #0 - 80390a4: d104 bne.n 80390b0 + 8039122: f997 3003 ldrsb.w r3, [r7, #3] + 8039126: 2b00 cmp r3, #0 + 8039128: d104 bne.n 8039134 return tcp_close(pcb); - 80390a6: 68b8 ldr r0, [r7, #8] - 80390a8: f7fe ffe6 bl 8038078 - 80390ac: 4603 mov r3, r0 - 80390ae: e000 b.n 80390b2 + 803912a: 68b8 ldr r0, [r7, #8] + 803912c: f7fe ffe6 bl 80380fc + 8039130: 4603 mov r3, r0 + 8039132: e000 b.n 8039136 } return ERR_OK; - 80390b0: 2300 movs r3, #0 -} - 80390b2: 4618 mov r0, r3 - 80390b4: 3710 adds r7, #16 - 80390b6: 46bd mov sp, r7 - 80390b8: bd80 pop {r7, pc} - 80390ba: bf00 nop - 80390bc: 08042d98 .word 0x08042d98 - 80390c0: 08043308 .word 0x08043308 - 80390c4: 08042ddc .word 0x08042ddc - -080390c8 : + 8039134: 2300 movs r3, #0 +} + 8039136: 4618 mov r0, r3 + 8039138: 3710 adds r7, #16 + 803913a: 46bd mov sp, r7 + 803913c: bd80 pop {r7, pc} + 803913e: bf00 nop + 8039140: 08042e18 .word 0x08042e18 + 8039144: 08043388 .word 0x08043388 + 8039148: 08042e5c .word 0x08042e5c + +0803914c : * * @param prio minimum priority */ static void tcp_kill_prio(u8_t prio) { - 80390c8: b580 push {r7, lr} - 80390ca: b086 sub sp, #24 - 80390cc: af00 add r7, sp, #0 - 80390ce: 4603 mov r3, r0 - 80390d0: 71fb strb r3, [r7, #7] + 803914c: b580 push {r7, lr} + 803914e: b086 sub sp, #24 + 8039150: af00 add r7, sp, #0 + 8039152: 4603 mov r3, r0 + 8039154: 71fb strb r3, [r7, #7] struct tcp_pcb *pcb, *inactive; u32_t inactivity; u8_t mprio; mprio = LWIP_MIN(TCP_PRIO_MAX, prio); - 80390d2: f997 3007 ldrsb.w r3, [r7, #7] - 80390d6: 2b00 cmp r3, #0 - 80390d8: db01 blt.n 80390de - 80390da: 79fb ldrb r3, [r7, #7] - 80390dc: e000 b.n 80390e0 - 80390de: 237f movs r3, #127 ; 0x7f - 80390e0: 72fb strb r3, [r7, #11] + 8039156: f997 3007 ldrsb.w r3, [r7, #7] + 803915a: 2b00 cmp r3, #0 + 803915c: db01 blt.n 8039162 + 803915e: 79fb ldrb r3, [r7, #7] + 8039160: e000 b.n 8039164 + 8039162: 237f movs r3, #127 ; 0x7f + 8039164: 72fb strb r3, [r7, #11] /* We want to kill connections with a lower prio, so bail out if * supplied prio is 0 - there can never be a lower prio */ if (mprio == 0) { - 80390e2: 7afb ldrb r3, [r7, #11] - 80390e4: 2b00 cmp r3, #0 - 80390e6: d034 beq.n 8039152 + 8039166: 7afb ldrb r3, [r7, #11] + 8039168: 2b00 cmp r3, #0 + 803916a: d034 beq.n 80391d6 /* We only want kill connections with a lower prio, so decrement prio by one * and start searching for oldest connection with same or lower priority than mprio. * We want to find the connections with the lowest possible prio, and among * these the one with the longest inactivity time. */ mprio--; - 80390e8: 7afb ldrb r3, [r7, #11] - 80390ea: 3b01 subs r3, #1 - 80390ec: 72fb strb r3, [r7, #11] + 803916c: 7afb ldrb r3, [r7, #11] + 803916e: 3b01 subs r3, #1 + 8039170: 72fb strb r3, [r7, #11] inactivity = 0; - 80390ee: 2300 movs r3, #0 - 80390f0: 60fb str r3, [r7, #12] + 8039172: 2300 movs r3, #0 + 8039174: 60fb str r3, [r7, #12] inactive = NULL; - 80390f2: 2300 movs r3, #0 - 80390f4: 613b str r3, [r7, #16] + 8039176: 2300 movs r3, #0 + 8039178: 613b str r3, [r7, #16] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 80390f6: 4b19 ldr r3, [pc, #100] ; (803915c ) - 80390f8: 681b ldr r3, [r3, #0] - 80390fa: 617b str r3, [r7, #20] - 80390fc: e01f b.n 803913e + 803917a: 4b19 ldr r3, [pc, #100] ; (80391e0 ) + 803917c: 681b ldr r3, [r3, #0] + 803917e: 617b str r3, [r7, #20] + 8039180: e01f b.n 80391c2 /* lower prio is always a kill candidate */ if ((pcb->prio < mprio) || - 80390fe: 697b ldr r3, [r7, #20] - 8039100: 7d5b ldrb r3, [r3, #21] - 8039102: 7afa ldrb r2, [r7, #11] - 8039104: 429a cmp r2, r3 - 8039106: d80c bhi.n 8039122 + 8039182: 697b ldr r3, [r7, #20] + 8039184: 7d5b ldrb r3, [r3, #21] + 8039186: 7afa ldrb r2, [r7, #11] + 8039188: 429a cmp r2, r3 + 803918a: d80c bhi.n 80391a6 /* longer inactivity is also a kill candidate */ ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) { - 8039108: 697b ldr r3, [r7, #20] - 803910a: 7d5b ldrb r3, [r3, #21] + 803918c: 697b ldr r3, [r7, #20] + 803918e: 7d5b ldrb r3, [r3, #21] if ((pcb->prio < mprio) || - 803910c: 7afa ldrb r2, [r7, #11] - 803910e: 429a cmp r2, r3 - 8039110: d112 bne.n 8039138 + 8039190: 7afa ldrb r2, [r7, #11] + 8039192: 429a cmp r2, r3 + 8039194: d112 bne.n 80391bc ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) { - 8039112: 4b13 ldr r3, [pc, #76] ; (8039160 ) - 8039114: 681a ldr r2, [r3, #0] - 8039116: 697b ldr r3, [r7, #20] - 8039118: 6a1b ldr r3, [r3, #32] - 803911a: 1ad3 subs r3, r2, r3 - 803911c: 68fa ldr r2, [r7, #12] - 803911e: 429a cmp r2, r3 - 8039120: d80a bhi.n 8039138 + 8039196: 4b13 ldr r3, [pc, #76] ; (80391e4 ) + 8039198: 681a ldr r2, [r3, #0] + 803919a: 697b ldr r3, [r7, #20] + 803919c: 6a1b ldr r3, [r3, #32] + 803919e: 1ad3 subs r3, r2, r3 + 80391a0: 68fa ldr r2, [r7, #12] + 80391a2: 429a cmp r2, r3 + 80391a4: d80a bhi.n 80391bc inactivity = tcp_ticks - pcb->tmr; - 8039122: 4b0f ldr r3, [pc, #60] ; (8039160 ) - 8039124: 681a ldr r2, [r3, #0] - 8039126: 697b ldr r3, [r7, #20] - 8039128: 6a1b ldr r3, [r3, #32] - 803912a: 1ad3 subs r3, r2, r3 - 803912c: 60fb str r3, [r7, #12] + 80391a6: 4b0f ldr r3, [pc, #60] ; (80391e4 ) + 80391a8: 681a ldr r2, [r3, #0] + 80391aa: 697b ldr r3, [r7, #20] + 80391ac: 6a1b ldr r3, [r3, #32] + 80391ae: 1ad3 subs r3, r2, r3 + 80391b0: 60fb str r3, [r7, #12] inactive = pcb; - 803912e: 697b ldr r3, [r7, #20] - 8039130: 613b str r3, [r7, #16] + 80391b2: 697b ldr r3, [r7, #20] + 80391b4: 613b str r3, [r7, #16] mprio = pcb->prio; - 8039132: 697b ldr r3, [r7, #20] - 8039134: 7d5b ldrb r3, [r3, #21] - 8039136: 72fb strb r3, [r7, #11] + 80391b6: 697b ldr r3, [r7, #20] + 80391b8: 7d5b ldrb r3, [r3, #21] + 80391ba: 72fb strb r3, [r7, #11] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 8039138: 697b ldr r3, [r7, #20] - 803913a: 68db ldr r3, [r3, #12] - 803913c: 617b str r3, [r7, #20] - 803913e: 697b ldr r3, [r7, #20] - 8039140: 2b00 cmp r3, #0 - 8039142: d1dc bne.n 80390fe + 80391bc: 697b ldr r3, [r7, #20] + 80391be: 68db ldr r3, [r3, #12] + 80391c0: 617b str r3, [r7, #20] + 80391c2: 697b ldr r3, [r7, #20] + 80391c4: 2b00 cmp r3, #0 + 80391c6: d1dc bne.n 8039182 } } if (inactive != NULL) { - 8039144: 693b ldr r3, [r7, #16] - 8039146: 2b00 cmp r3, #0 - 8039148: d004 beq.n 8039154 + 80391c8: 693b ldr r3, [r7, #16] + 80391ca: 2b00 cmp r3, #0 + 80391cc: d004 beq.n 80391d8 LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n", (void *)inactive, inactivity)); tcp_abort(inactive); - 803914a: 6938 ldr r0, [r7, #16] - 803914c: f7ff f87e bl 803824c - 8039150: e000 b.n 8039154 + 80391ce: 6938 ldr r0, [r7, #16] + 80391d0: f7ff f87e bl 80382d0 + 80391d4: e000 b.n 80391d8 return; - 8039152: bf00 nop + 80391d6: bf00 nop } } - 8039154: 3718 adds r7, #24 - 8039156: 46bd mov sp, r7 - 8039158: bd80 pop {r7, pc} - 803915a: bf00 nop - 803915c: 2400e964 .word 0x2400e964 - 8039160: 2400e958 .word 0x2400e958 + 80391d8: 3718 adds r7, #24 + 80391da: 46bd mov sp, r7 + 80391dc: bd80 pop {r7, pc} + 80391de: bf00 nop + 80391e0: 2400e96c .word 0x2400e96c + 80391e4: 2400e960 .word 0x2400e960 -08039164 : +080391e8 : * Kills the oldest connection that is in specific state. * Called from tcp_alloc() for LAST_ACK and CLOSING if no more connections are available. */ static void tcp_kill_state(enum tcp_state state) { - 8039164: b580 push {r7, lr} - 8039166: b086 sub sp, #24 - 8039168: af00 add r7, sp, #0 - 803916a: 4603 mov r3, r0 - 803916c: 71fb strb r3, [r7, #7] + 80391e8: b580 push {r7, lr} + 80391ea: b086 sub sp, #24 + 80391ec: af00 add r7, sp, #0 + 80391ee: 4603 mov r3, r0 + 80391f0: 71fb strb r3, [r7, #7] struct tcp_pcb *pcb, *inactive; u32_t inactivity; LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK)); - 803916e: 79fb ldrb r3, [r7, #7] - 8039170: 2b08 cmp r3, #8 - 8039172: d009 beq.n 8039188 - 8039174: 79fb ldrb r3, [r7, #7] - 8039176: 2b09 cmp r3, #9 - 8039178: d006 beq.n 8039188 - 803917a: 4b1a ldr r3, [pc, #104] ; (80391e4 ) - 803917c: f240 62dd movw r2, #1757 ; 0x6dd - 8039180: 4919 ldr r1, [pc, #100] ; (80391e8 ) - 8039182: 481a ldr r0, [pc, #104] ; (80391ec ) - 8039184: f007 fcc4 bl 8040b10 + 80391f2: 79fb ldrb r3, [r7, #7] + 80391f4: 2b08 cmp r3, #8 + 80391f6: d009 beq.n 803920c + 80391f8: 79fb ldrb r3, [r7, #7] + 80391fa: 2b09 cmp r3, #9 + 80391fc: d006 beq.n 803920c + 80391fe: 4b1a ldr r3, [pc, #104] ; (8039268 ) + 8039200: f240 62dd movw r2, #1757 ; 0x6dd + 8039204: 4919 ldr r1, [pc, #100] ; (803926c ) + 8039206: 481a ldr r0, [pc, #104] ; (8039270 ) + 8039208: f007 fcc4 bl 8040b94 inactivity = 0; - 8039188: 2300 movs r3, #0 - 803918a: 60fb str r3, [r7, #12] + 803920c: 2300 movs r3, #0 + 803920e: 60fb str r3, [r7, #12] inactive = NULL; - 803918c: 2300 movs r3, #0 - 803918e: 613b str r3, [r7, #16] + 8039210: 2300 movs r3, #0 + 8039212: 613b str r3, [r7, #16] /* Go through the list of active pcbs and get the oldest pcb that is in state CLOSING/LAST_ACK. */ for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 8039190: 4b17 ldr r3, [pc, #92] ; (80391f0 ) - 8039192: 681b ldr r3, [r3, #0] - 8039194: 617b str r3, [r7, #20] - 8039196: e017 b.n 80391c8 + 8039214: 4b17 ldr r3, [pc, #92] ; (8039274 ) + 8039216: 681b ldr r3, [r3, #0] + 8039218: 617b str r3, [r7, #20] + 803921a: e017 b.n 803924c if (pcb->state == state) { - 8039198: 697b ldr r3, [r7, #20] - 803919a: 7d1b ldrb r3, [r3, #20] - 803919c: 79fa ldrb r2, [r7, #7] - 803919e: 429a cmp r2, r3 - 80391a0: d10f bne.n 80391c2 + 803921c: 697b ldr r3, [r7, #20] + 803921e: 7d1b ldrb r3, [r3, #20] + 8039220: 79fa ldrb r2, [r7, #7] + 8039222: 429a cmp r2, r3 + 8039224: d10f bne.n 8039246 if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { - 80391a2: 4b14 ldr r3, [pc, #80] ; (80391f4 ) - 80391a4: 681a ldr r2, [r3, #0] - 80391a6: 697b ldr r3, [r7, #20] - 80391a8: 6a1b ldr r3, [r3, #32] - 80391aa: 1ad3 subs r3, r2, r3 - 80391ac: 68fa ldr r2, [r7, #12] - 80391ae: 429a cmp r2, r3 - 80391b0: d807 bhi.n 80391c2 + 8039226: 4b14 ldr r3, [pc, #80] ; (8039278 ) + 8039228: 681a ldr r2, [r3, #0] + 803922a: 697b ldr r3, [r7, #20] + 803922c: 6a1b ldr r3, [r3, #32] + 803922e: 1ad3 subs r3, r2, r3 + 8039230: 68fa ldr r2, [r7, #12] + 8039232: 429a cmp r2, r3 + 8039234: d807 bhi.n 8039246 inactivity = tcp_ticks - pcb->tmr; - 80391b2: 4b10 ldr r3, [pc, #64] ; (80391f4 ) - 80391b4: 681a ldr r2, [r3, #0] - 80391b6: 697b ldr r3, [r7, #20] - 80391b8: 6a1b ldr r3, [r3, #32] - 80391ba: 1ad3 subs r3, r2, r3 - 80391bc: 60fb str r3, [r7, #12] + 8039236: 4b10 ldr r3, [pc, #64] ; (8039278 ) + 8039238: 681a ldr r2, [r3, #0] + 803923a: 697b ldr r3, [r7, #20] + 803923c: 6a1b ldr r3, [r3, #32] + 803923e: 1ad3 subs r3, r2, r3 + 8039240: 60fb str r3, [r7, #12] inactive = pcb; - 80391be: 697b ldr r3, [r7, #20] - 80391c0: 613b str r3, [r7, #16] + 8039242: 697b ldr r3, [r7, #20] + 8039244: 613b str r3, [r7, #16] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 80391c2: 697b ldr r3, [r7, #20] - 80391c4: 68db ldr r3, [r3, #12] - 80391c6: 617b str r3, [r7, #20] - 80391c8: 697b ldr r3, [r7, #20] - 80391ca: 2b00 cmp r3, #0 - 80391cc: d1e4 bne.n 8039198 + 8039246: 697b ldr r3, [r7, #20] + 8039248: 68db ldr r3, [r3, #12] + 803924a: 617b str r3, [r7, #20] + 803924c: 697b ldr r3, [r7, #20] + 803924e: 2b00 cmp r3, #0 + 8039250: d1e4 bne.n 803921c } } } if (inactive != NULL) { - 80391ce: 693b ldr r3, [r7, #16] - 80391d0: 2b00 cmp r3, #0 - 80391d2: d003 beq.n 80391dc + 8039252: 693b ldr r3, [r7, #16] + 8039254: 2b00 cmp r3, #0 + 8039256: d003 beq.n 8039260 LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_closing: killing oldest %s PCB %p (%"S32_F")\n", tcp_state_str[state], (void *)inactive, inactivity)); /* Don't send a RST, since no data is lost. */ tcp_abandon(inactive, 0); - 80391d4: 2100 movs r1, #0 - 80391d6: 6938 ldr r0, [r7, #16] - 80391d8: f7fe ff7a bl 80380d0 - } -} - 80391dc: bf00 nop - 80391de: 3718 adds r7, #24 - 80391e0: 46bd mov sp, r7 - 80391e2: bd80 pop {r7, pc} - 80391e4: 08042d98 .word 0x08042d98 - 80391e8: 08043324 .word 0x08043324 - 80391ec: 08042ddc .word 0x08042ddc - 80391f0: 2400e964 .word 0x2400e964 - 80391f4: 2400e958 .word 0x2400e958 - -080391f8 : + 8039258: 2100 movs r1, #0 + 803925a: 6938 ldr r0, [r7, #16] + 803925c: f7fe ff7a bl 8038154 + } +} + 8039260: bf00 nop + 8039262: 3718 adds r7, #24 + 8039264: 46bd mov sp, r7 + 8039266: bd80 pop {r7, pc} + 8039268: 08042e18 .word 0x08042e18 + 803926c: 080433a4 .word 0x080433a4 + 8039270: 08042e5c .word 0x08042e5c + 8039274: 2400e96c .word 0x2400e96c + 8039278: 2400e960 .word 0x2400e960 + +0803927c : * Kills the oldest connection that is in TIME_WAIT state. * Called from tcp_alloc() if no more connections are available. */ static void tcp_kill_timewait(void) { - 80391f8: b580 push {r7, lr} - 80391fa: b084 sub sp, #16 - 80391fc: af00 add r7, sp, #0 + 803927c: b580 push {r7, lr} + 803927e: b084 sub sp, #16 + 8039280: af00 add r7, sp, #0 struct tcp_pcb *pcb, *inactive; u32_t inactivity; inactivity = 0; - 80391fe: 2300 movs r3, #0 - 8039200: 607b str r3, [r7, #4] + 8039282: 2300 movs r3, #0 + 8039284: 607b str r3, [r7, #4] inactive = NULL; - 8039202: 2300 movs r3, #0 - 8039204: 60bb str r3, [r7, #8] + 8039286: 2300 movs r3, #0 + 8039288: 60bb str r3, [r7, #8] /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */ for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - 8039206: 4b12 ldr r3, [pc, #72] ; (8039250 ) - 8039208: 681b ldr r3, [r3, #0] - 803920a: 60fb str r3, [r7, #12] - 803920c: e012 b.n 8039234 + 803928a: 4b12 ldr r3, [pc, #72] ; (80392d4 ) + 803928c: 681b ldr r3, [r3, #0] + 803928e: 60fb str r3, [r7, #12] + 8039290: e012 b.n 80392b8 if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { - 803920e: 4b11 ldr r3, [pc, #68] ; (8039254 ) - 8039210: 681a ldr r2, [r3, #0] - 8039212: 68fb ldr r3, [r7, #12] - 8039214: 6a1b ldr r3, [r3, #32] - 8039216: 1ad3 subs r3, r2, r3 - 8039218: 687a ldr r2, [r7, #4] - 803921a: 429a cmp r2, r3 - 803921c: d807 bhi.n 803922e + 8039292: 4b11 ldr r3, [pc, #68] ; (80392d8 ) + 8039294: 681a ldr r2, [r3, #0] + 8039296: 68fb ldr r3, [r7, #12] + 8039298: 6a1b ldr r3, [r3, #32] + 803929a: 1ad3 subs r3, r2, r3 + 803929c: 687a ldr r2, [r7, #4] + 803929e: 429a cmp r2, r3 + 80392a0: d807 bhi.n 80392b2 inactivity = tcp_ticks - pcb->tmr; - 803921e: 4b0d ldr r3, [pc, #52] ; (8039254 ) - 8039220: 681a ldr r2, [r3, #0] - 8039222: 68fb ldr r3, [r7, #12] - 8039224: 6a1b ldr r3, [r3, #32] - 8039226: 1ad3 subs r3, r2, r3 - 8039228: 607b str r3, [r7, #4] + 80392a2: 4b0d ldr r3, [pc, #52] ; (80392d8 ) + 80392a4: 681a ldr r2, [r3, #0] + 80392a6: 68fb ldr r3, [r7, #12] + 80392a8: 6a1b ldr r3, [r3, #32] + 80392aa: 1ad3 subs r3, r2, r3 + 80392ac: 607b str r3, [r7, #4] inactive = pcb; - 803922a: 68fb ldr r3, [r7, #12] - 803922c: 60bb str r3, [r7, #8] + 80392ae: 68fb ldr r3, [r7, #12] + 80392b0: 60bb str r3, [r7, #8] for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - 803922e: 68fb ldr r3, [r7, #12] - 8039230: 68db ldr r3, [r3, #12] - 8039232: 60fb str r3, [r7, #12] - 8039234: 68fb ldr r3, [r7, #12] - 8039236: 2b00 cmp r3, #0 - 8039238: d1e9 bne.n 803920e + 80392b2: 68fb ldr r3, [r7, #12] + 80392b4: 68db ldr r3, [r3, #12] + 80392b6: 60fb str r3, [r7, #12] + 80392b8: 68fb ldr r3, [r7, #12] + 80392ba: 2b00 cmp r3, #0 + 80392bc: d1e9 bne.n 8039292 } } if (inactive != NULL) { - 803923a: 68bb ldr r3, [r7, #8] - 803923c: 2b00 cmp r3, #0 - 803923e: d002 beq.n 8039246 + 80392be: 68bb ldr r3, [r7, #8] + 80392c0: 2b00 cmp r3, #0 + 80392c2: d002 beq.n 80392ca LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n", (void *)inactive, inactivity)); tcp_abort(inactive); - 8039240: 68b8 ldr r0, [r7, #8] - 8039242: f7ff f803 bl 803824c + 80392c4: 68b8 ldr r0, [r7, #8] + 80392c6: f7ff f803 bl 80382d0 } } - 8039246: bf00 nop - 8039248: 3710 adds r7, #16 - 803924a: 46bd mov sp, r7 - 803924c: bd80 pop {r7, pc} - 803924e: bf00 nop - 8039250: 2400e968 .word 0x2400e968 - 8039254: 2400e958 .word 0x2400e958 + 80392ca: bf00 nop + 80392cc: 3710 adds r7, #16 + 80392ce: 46bd mov sp, r7 + 80392d0: bd80 pop {r7, pc} + 80392d2: bf00 nop + 80392d4: 2400e970 .word 0x2400e970 + 80392d8: 2400e960 .word 0x2400e960 -08039258 : +080392dc : * now send the FIN (which failed before), the pcb might be in a state that is * OK for us to now free it. */ static void tcp_handle_closepend(void) { - 8039258: b580 push {r7, lr} - 803925a: b082 sub sp, #8 - 803925c: af00 add r7, sp, #0 + 80392dc: b580 push {r7, lr} + 80392de: b082 sub sp, #8 + 80392e0: af00 add r7, sp, #0 struct tcp_pcb *pcb = tcp_active_pcbs; - 803925e: 4b10 ldr r3, [pc, #64] ; (80392a0 ) - 8039260: 681b ldr r3, [r3, #0] - 8039262: 607b str r3, [r7, #4] + 80392e2: 4b10 ldr r3, [pc, #64] ; (8039324 ) + 80392e4: 681b ldr r3, [r3, #0] + 80392e6: 607b str r3, [r7, #4] while (pcb != NULL) { - 8039264: e014 b.n 8039290 + 80392e8: e014 b.n 8039314 struct tcp_pcb *next = pcb->next; - 8039266: 687b ldr r3, [r7, #4] - 8039268: 68db ldr r3, [r3, #12] - 803926a: 603b str r3, [r7, #0] + 80392ea: 687b ldr r3, [r7, #4] + 80392ec: 68db ldr r3, [r3, #12] + 80392ee: 603b str r3, [r7, #0] /* send pending FIN */ if (pcb->flags & TF_CLOSEPEND) { - 803926c: 687b ldr r3, [r7, #4] - 803926e: 8b5b ldrh r3, [r3, #26] - 8039270: f003 0308 and.w r3, r3, #8 - 8039274: 2b00 cmp r3, #0 - 8039276: d009 beq.n 803928c + 80392f0: 687b ldr r3, [r7, #4] + 80392f2: 8b5b ldrh r3, [r3, #26] + 80392f4: f003 0308 and.w r3, r3, #8 + 80392f8: 2b00 cmp r3, #0 + 80392fa: d009 beq.n 8039310 LWIP_DEBUGF(TCP_DEBUG, ("tcp_handle_closepend: pending FIN\n")); tcp_clear_flags(pcb, TF_CLOSEPEND); - 8039278: 687b ldr r3, [r7, #4] - 803927a: 8b5b ldrh r3, [r3, #26] - 803927c: f023 0308 bic.w r3, r3, #8 - 8039280: b29a uxth r2, r3 - 8039282: 687b ldr r3, [r7, #4] - 8039284: 835a strh r2, [r3, #26] + 80392fc: 687b ldr r3, [r7, #4] + 80392fe: 8b5b ldrh r3, [r3, #26] + 8039300: f023 0308 bic.w r3, r3, #8 + 8039304: b29a uxth r2, r3 + 8039306: 687b ldr r3, [r7, #4] + 8039308: 835a strh r2, [r3, #26] tcp_close_shutdown_fin(pcb); - 8039286: 6878 ldr r0, [r7, #4] - 8039288: f7fe fe8c bl 8037fa4 + 803930a: 6878 ldr r0, [r7, #4] + 803930c: f7fe fe8c bl 8038028 } pcb = next; - 803928c: 683b ldr r3, [r7, #0] - 803928e: 607b str r3, [r7, #4] + 8039310: 683b ldr r3, [r7, #0] + 8039312: 607b str r3, [r7, #4] while (pcb != NULL) { - 8039290: 687b ldr r3, [r7, #4] - 8039292: 2b00 cmp r3, #0 - 8039294: d1e7 bne.n 8039266 + 8039314: 687b ldr r3, [r7, #4] + 8039316: 2b00 cmp r3, #0 + 8039318: d1e7 bne.n 80392ea } } - 8039296: bf00 nop - 8039298: bf00 nop - 803929a: 3708 adds r7, #8 - 803929c: 46bd mov sp, r7 - 803929e: bd80 pop {r7, pc} - 80392a0: 2400e964 .word 0x2400e964 + 803931a: bf00 nop + 803931c: bf00 nop + 803931e: 3708 adds r7, #8 + 8039320: 46bd mov sp, r7 + 8039322: bd80 pop {r7, pc} + 8039324: 2400e96c .word 0x2400e96c -080392a4 : +08039328 : * @param prio priority for the new pcb * @return a new tcp_pcb that initially is in state CLOSED */ struct tcp_pcb * tcp_alloc(u8_t prio) { - 80392a4: b580 push {r7, lr} - 80392a6: b084 sub sp, #16 - 80392a8: af00 add r7, sp, #0 - 80392aa: 4603 mov r3, r0 - 80392ac: 71fb strb r3, [r7, #7] + 8039328: b580 push {r7, lr} + 803932a: b084 sub sp, #16 + 803932c: af00 add r7, sp, #0 + 803932e: 4603 mov r3, r0 + 8039330: 71fb strb r3, [r7, #7] struct tcp_pcb *pcb; LWIP_ASSERT_CORE_LOCKED(); pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 80392ae: 2001 movs r0, #1 - 80392b0: f7fd fb42 bl 8036938 - 80392b4: 60f8 str r0, [r7, #12] + 8039332: 2001 movs r0, #1 + 8039334: f7fd fb42 bl 80369bc + 8039338: 60f8 str r0, [r7, #12] if (pcb == NULL) { - 80392b6: 68fb ldr r3, [r7, #12] - 80392b8: 2b00 cmp r3, #0 - 80392ba: d126 bne.n 803930a + 803933a: 68fb ldr r3, [r7, #12] + 803933c: 2b00 cmp r3, #0 + 803933e: d126 bne.n 803938e /* Try to send FIN for all pcbs stuck in TF_CLOSEPEND first */ tcp_handle_closepend(); - 80392bc: f7ff ffcc bl 8039258 + 8039340: f7ff ffcc bl 80392dc /* Try killing oldest connection in TIME-WAIT. */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n")); tcp_kill_timewait(); - 80392c0: f7ff ff9a bl 80391f8 + 8039344: f7ff ff9a bl 803927c /* Try to allocate a tcp_pcb again. */ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 80392c4: 2001 movs r0, #1 - 80392c6: f7fd fb37 bl 8036938 - 80392ca: 60f8 str r0, [r7, #12] + 8039348: 2001 movs r0, #1 + 803934a: f7fd fb37 bl 80369bc + 803934e: 60f8 str r0, [r7, #12] if (pcb == NULL) { - 80392cc: 68fb ldr r3, [r7, #12] - 80392ce: 2b00 cmp r3, #0 - 80392d0: d11b bne.n 803930a + 8039350: 68fb ldr r3, [r7, #12] + 8039352: 2b00 cmp r3, #0 + 8039354: d11b bne.n 803938e /* Try killing oldest connection in LAST-ACK (these wouldn't go to TIME-WAIT). */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest LAST-ACK connection\n")); tcp_kill_state(LAST_ACK); - 80392d2: 2009 movs r0, #9 - 80392d4: f7ff ff46 bl 8039164 + 8039356: 2009 movs r0, #9 + 8039358: f7ff ff46 bl 80391e8 /* Try to allocate a tcp_pcb again. */ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 80392d8: 2001 movs r0, #1 - 80392da: f7fd fb2d bl 8036938 - 80392de: 60f8 str r0, [r7, #12] + 803935c: 2001 movs r0, #1 + 803935e: f7fd fb2d bl 80369bc + 8039362: 60f8 str r0, [r7, #12] if (pcb == NULL) { - 80392e0: 68fb ldr r3, [r7, #12] - 80392e2: 2b00 cmp r3, #0 - 80392e4: d111 bne.n 803930a + 8039364: 68fb ldr r3, [r7, #12] + 8039366: 2b00 cmp r3, #0 + 8039368: d111 bne.n 803938e /* Try killing oldest connection in CLOSING. */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest CLOSING connection\n")); tcp_kill_state(CLOSING); - 80392e6: 2008 movs r0, #8 - 80392e8: f7ff ff3c bl 8039164 + 803936a: 2008 movs r0, #8 + 803936c: f7ff ff3c bl 80391e8 /* Try to allocate a tcp_pcb again. */ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 80392ec: 2001 movs r0, #1 - 80392ee: f7fd fb23 bl 8036938 - 80392f2: 60f8 str r0, [r7, #12] + 8039370: 2001 movs r0, #1 + 8039372: f7fd fb23 bl 80369bc + 8039376: 60f8 str r0, [r7, #12] if (pcb == NULL) { - 80392f4: 68fb ldr r3, [r7, #12] - 80392f6: 2b00 cmp r3, #0 - 80392f8: d107 bne.n 803930a + 8039378: 68fb ldr r3, [r7, #12] + 803937a: 2b00 cmp r3, #0 + 803937c: d107 bne.n 803938e /* Try killing oldest active connection with lower priority than the new one. */ LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio)); tcp_kill_prio(prio); - 80392fa: 79fb ldrb r3, [r7, #7] - 80392fc: 4618 mov r0, r3 - 80392fe: f7ff fee3 bl 80390c8 + 803937e: 79fb ldrb r3, [r7, #7] + 8039380: 4618 mov r0, r3 + 8039382: f7ff fee3 bl 803914c /* Try to allocate a tcp_pcb again. */ pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB); - 8039302: 2001 movs r0, #1 - 8039304: f7fd fb18 bl 8036938 - 8039308: 60f8 str r0, [r7, #12] + 8039386: 2001 movs r0, #1 + 8039388: f7fd fb18 bl 80369bc + 803938c: 60f8 str r0, [r7, #12] if (pcb != NULL) { /* adjust err stats: memp_malloc failed above */ MEMP_STATS_DEC(err, MEMP_TCP_PCB); } } if (pcb != NULL) { - 803930a: 68fb ldr r3, [r7, #12] - 803930c: 2b00 cmp r3, #0 - 803930e: d03f beq.n 8039390 + 803938e: 68fb ldr r3, [r7, #12] + 8039390: 2b00 cmp r3, #0 + 8039392: d03f beq.n 8039414 /* zero out the whole pcb, so there is no need to initialize members to zero */ memset(pcb, 0, sizeof(struct tcp_pcb)); - 8039310: 229c movs r2, #156 ; 0x9c - 8039312: 2100 movs r1, #0 - 8039314: 68f8 ldr r0, [r7, #12] - 8039316: f007 fb13 bl 8040940 + 8039394: 229c movs r2, #156 ; 0x9c + 8039396: 2100 movs r1, #0 + 8039398: 68f8 ldr r0, [r7, #12] + 803939a: f007 fb13 bl 80409c4 pcb->prio = prio; - 803931a: 68fb ldr r3, [r7, #12] - 803931c: 79fa ldrb r2, [r7, #7] - 803931e: 755a strb r2, [r3, #21] + 803939e: 68fb ldr r3, [r7, #12] + 80393a0: 79fa ldrb r2, [r7, #7] + 80393a2: 755a strb r2, [r3, #21] pcb->snd_buf = TCP_SND_BUF; - 8039320: 68fb ldr r3, [r7, #12] - 8039322: f44f 6206 mov.w r2, #2144 ; 0x860 - 8039326: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 + 80393a4: 68fb ldr r3, [r7, #12] + 80393a6: f44f 6206 mov.w r2, #2144 ; 0x860 + 80393aa: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 /* Start with a window that does not need scaling. When window scaling is enabled and used, the window is enlarged when both sides agree on scaling. */ pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND); - 803932a: 68fb ldr r3, [r7, #12] - 803932c: f44f 6206 mov.w r2, #2144 ; 0x860 - 8039330: 855a strh r2, [r3, #42] ; 0x2a - 8039332: 68fb ldr r3, [r7, #12] - 8039334: 8d5a ldrh r2, [r3, #42] ; 0x2a - 8039336: 68fb ldr r3, [r7, #12] - 8039338: 851a strh r2, [r3, #40] ; 0x28 + 80393ae: 68fb ldr r3, [r7, #12] + 80393b0: f44f 6206 mov.w r2, #2144 ; 0x860 + 80393b4: 855a strh r2, [r3, #42] ; 0x2a + 80393b6: 68fb ldr r3, [r7, #12] + 80393b8: 8d5a ldrh r2, [r3, #42] ; 0x2a + 80393ba: 68fb ldr r3, [r7, #12] + 80393bc: 851a strh r2, [r3, #40] ; 0x28 pcb->ttl = TCP_TTL; - 803933a: 68fb ldr r3, [r7, #12] - 803933c: 22ff movs r2, #255 ; 0xff - 803933e: 72da strb r2, [r3, #11] + 80393be: 68fb ldr r3, [r7, #12] + 80393c0: 22ff movs r2, #255 ; 0xff + 80393c2: 72da strb r2, [r3, #11] /* As initial send MSS, we use TCP_MSS but limit it to 536. The send MSS is updated when an MSS option is received. */ pcb->mss = INITIAL_MSS; - 8039340: 68fb ldr r3, [r7, #12] - 8039342: f44f 7206 mov.w r2, #536 ; 0x218 - 8039346: 865a strh r2, [r3, #50] ; 0x32 + 80393c4: 68fb ldr r3, [r7, #12] + 80393c6: f44f 7206 mov.w r2, #536 ; 0x218 + 80393ca: 865a strh r2, [r3, #50] ; 0x32 pcb->rto = 3000 / TCP_SLOW_INTERVAL; - 8039348: 68fb ldr r3, [r7, #12] - 803934a: 2206 movs r2, #6 - 803934c: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 + 80393cc: 68fb ldr r3, [r7, #12] + 80393ce: 2206 movs r2, #6 + 80393d0: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 pcb->sv = 3000 / TCP_SLOW_INTERVAL; - 8039350: 68fb ldr r3, [r7, #12] - 8039352: 2206 movs r2, #6 - 8039354: 87da strh r2, [r3, #62] ; 0x3e + 80393d4: 68fb ldr r3, [r7, #12] + 80393d6: 2206 movs r2, #6 + 80393d8: 87da strh r2, [r3, #62] ; 0x3e pcb->rtime = -1; - 8039356: 68fb ldr r3, [r7, #12] - 8039358: f64f 72ff movw r2, #65535 ; 0xffff - 803935c: 861a strh r2, [r3, #48] ; 0x30 + 80393da: 68fb ldr r3, [r7, #12] + 80393dc: f64f 72ff movw r2, #65535 ; 0xffff + 80393e0: 861a strh r2, [r3, #48] ; 0x30 pcb->cwnd = 1; - 803935e: 68fb ldr r3, [r7, #12] - 8039360: 2201 movs r2, #1 - 8039362: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 80393e2: 68fb ldr r3, [r7, #12] + 80393e4: 2201 movs r2, #1 + 80393e6: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 pcb->tmr = tcp_ticks; - 8039366: 4b0d ldr r3, [pc, #52] ; (803939c ) - 8039368: 681a ldr r2, [r3, #0] - 803936a: 68fb ldr r3, [r7, #12] - 803936c: 621a str r2, [r3, #32] + 80393ea: 4b0d ldr r3, [pc, #52] ; (8039420 ) + 80393ec: 681a ldr r2, [r3, #0] + 80393ee: 68fb ldr r3, [r7, #12] + 80393f0: 621a str r2, [r3, #32] pcb->last_timer = tcp_timer_ctr; - 803936e: 4b0c ldr r3, [pc, #48] ; (80393a0 ) - 8039370: 781a ldrb r2, [r3, #0] - 8039372: 68fb ldr r3, [r7, #12] - 8039374: 779a strb r2, [r3, #30] + 80393f2: 4b0c ldr r3, [pc, #48] ; (8039424 ) + 80393f4: 781a ldrb r2, [r3, #0] + 80393f6: 68fb ldr r3, [r7, #12] + 80393f8: 779a strb r2, [r3, #30] of using the largest advertised receive window. We've seen complications with receiving TCPs that use window scaling and/or window auto-tuning where the initial advertised window is very small and then grows rapidly once the connection is established. To avoid these complications, we set ssthresh to the largest effective cwnd (amount of in-flight data) that the sender can have. */ pcb->ssthresh = TCP_SND_BUF; - 8039376: 68fb ldr r3, [r7, #12] - 8039378: f44f 6206 mov.w r2, #2144 ; 0x860 - 803937c: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 80393fa: 68fb ldr r3, [r7, #12] + 80393fc: f44f 6206 mov.w r2, #2144 ; 0x860 + 8039400: f8a3 204a strh.w r2, [r3, #74] ; 0x4a #if LWIP_CALLBACK_API pcb->recv = tcp_recv_null; - 8039380: 68fb ldr r3, [r7, #12] - 8039382: 4a08 ldr r2, [pc, #32] ; (80393a4 ) - 8039384: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8039404: 68fb ldr r3, [r7, #12] + 8039406: 4a08 ldr r2, [pc, #32] ; (8039428 ) + 8039408: f8c3 2084 str.w r2, [r3, #132] ; 0x84 #endif /* LWIP_CALLBACK_API */ /* Init KEEPALIVE timer */ pcb->keep_idle = TCP_KEEPIDLE_DEFAULT; - 8039388: 68fb ldr r3, [r7, #12] - 803938a: 4a07 ldr r2, [pc, #28] ; (80393a8 ) - 803938c: f8c3 2094 str.w r2, [r3, #148] ; 0x94 + 803940c: 68fb ldr r3, [r7, #12] + 803940e: 4a07 ldr r2, [pc, #28] ; (803942c ) + 8039410: f8c3 2094 str.w r2, [r3, #148] ; 0x94 #if LWIP_TCP_KEEPALIVE pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT; pcb->keep_cnt = TCP_KEEPCNT_DEFAULT; #endif /* LWIP_TCP_KEEPALIVE */ } return pcb; - 8039390: 68fb ldr r3, [r7, #12] -} - 8039392: 4618 mov r0, r3 - 8039394: 3710 adds r7, #16 - 8039396: 46bd mov sp, r7 - 8039398: bd80 pop {r7, pc} - 803939a: bf00 nop - 803939c: 2400e958 .word 0x2400e958 - 80393a0: 2400e96e .word 0x2400e96e - 80393a4: 0803905d .word 0x0803905d - 80393a8: 006ddd00 .word 0x006ddd00 - -080393ac : + 8039414: 68fb ldr r3, [r7, #12] +} + 8039416: 4618 mov r0, r3 + 8039418: 3710 adds r7, #16 + 803941a: 46bd mov sp, r7 + 803941c: bd80 pop {r7, pc} + 803941e: bf00 nop + 8039420: 2400e960 .word 0x2400e960 + 8039424: 2400e976 .word 0x2400e976 + 8039428: 080390e1 .word 0x080390e1 + 803942c: 006ddd00 .word 0x006ddd00 + +08039430 : * supply @ref IPADDR_TYPE_ANY as argument and bind to @ref IP_ANY_TYPE. * @return a new tcp_pcb that initially is in state CLOSED */ struct tcp_pcb * tcp_new_ip_type(u8_t type) { - 80393ac: b580 push {r7, lr} - 80393ae: b084 sub sp, #16 - 80393b0: af00 add r7, sp, #0 - 80393b2: 4603 mov r3, r0 - 80393b4: 71fb strb r3, [r7, #7] + 8039430: b580 push {r7, lr} + 8039432: b084 sub sp, #16 + 8039434: af00 add r7, sp, #0 + 8039436: 4603 mov r3, r0 + 8039438: 71fb strb r3, [r7, #7] struct tcp_pcb *pcb; pcb = tcp_alloc(TCP_PRIO_NORMAL); - 80393b6: 2040 movs r0, #64 ; 0x40 - 80393b8: f7ff ff74 bl 80392a4 - 80393bc: 60f8 str r0, [r7, #12] + 803943a: 2040 movs r0, #64 ; 0x40 + 803943c: f7ff ff74 bl 8039328 + 8039440: 60f8 str r0, [r7, #12] IP_SET_TYPE_VAL(pcb->remote_ip, type); } #else LWIP_UNUSED_ARG(type); #endif /* LWIP_IPV4 && LWIP_IPV6 */ return pcb; - 80393be: 68fb ldr r3, [r7, #12] + 8039442: 68fb ldr r3, [r7, #12] } - 80393c0: 4618 mov r0, r3 - 80393c2: 3710 adds r7, #16 - 80393c4: 46bd mov sp, r7 - 80393c6: bd80 pop {r7, pc} + 8039444: 4618 mov r0, r3 + 8039446: 3710 adds r7, #16 + 8039448: 46bd mov sp, r7 + 803944a: bd80 pop {r7, pc} -080393c8 : +0803944c : * @param pcb tcp_pcb to set the recv callback * @param recv callback function to call for this pcb when data is received */ void tcp_recv(struct tcp_pcb *pcb, tcp_recv_fn recv) { - 80393c8: b580 push {r7, lr} - 80393ca: b082 sub sp, #8 - 80393cc: af00 add r7, sp, #0 - 80393ce: 6078 str r0, [r7, #4] - 80393d0: 6039 str r1, [r7, #0] + 803944c: b580 push {r7, lr} + 803944e: b082 sub sp, #8 + 8039450: af00 add r7, sp, #0 + 8039452: 6078 str r0, [r7, #4] + 8039454: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if (pcb != NULL) { - 80393d2: 687b ldr r3, [r7, #4] - 80393d4: 2b00 cmp r3, #0 - 80393d6: d00e beq.n 80393f6 + 8039456: 687b ldr r3, [r7, #4] + 8039458: 2b00 cmp r3, #0 + 803945a: d00e beq.n 803947a LWIP_ASSERT("invalid socket state for recv callback", pcb->state != LISTEN); - 80393d8: 687b ldr r3, [r7, #4] - 80393da: 7d1b ldrb r3, [r3, #20] - 80393dc: 2b01 cmp r3, #1 - 80393de: d106 bne.n 80393ee - 80393e0: 4b07 ldr r3, [pc, #28] ; (8039400 ) - 80393e2: f240 72df movw r2, #2015 ; 0x7df - 80393e6: 4907 ldr r1, [pc, #28] ; (8039404 ) - 80393e8: 4807 ldr r0, [pc, #28] ; (8039408 ) - 80393ea: f007 fb91 bl 8040b10 + 803945c: 687b ldr r3, [r7, #4] + 803945e: 7d1b ldrb r3, [r3, #20] + 8039460: 2b01 cmp r3, #1 + 8039462: d106 bne.n 8039472 + 8039464: 4b07 ldr r3, [pc, #28] ; (8039484 ) + 8039466: f240 72df movw r2, #2015 ; 0x7df + 803946a: 4907 ldr r1, [pc, #28] ; (8039488 ) + 803946c: 4807 ldr r0, [pc, #28] ; (803948c ) + 803946e: f007 fb91 bl 8040b94 pcb->recv = recv; - 80393ee: 687b ldr r3, [r7, #4] - 80393f0: 683a ldr r2, [r7, #0] - 80393f2: f8c3 2084 str.w r2, [r3, #132] ; 0x84 + 8039472: 687b ldr r3, [r7, #4] + 8039474: 683a ldr r2, [r7, #0] + 8039476: f8c3 2084 str.w r2, [r3, #132] ; 0x84 } } - 80393f6: bf00 nop - 80393f8: 3708 adds r7, #8 - 80393fa: 46bd mov sp, r7 - 80393fc: bd80 pop {r7, pc} - 80393fe: bf00 nop - 8039400: 08042d98 .word 0x08042d98 - 8039404: 08043334 .word 0x08043334 - 8039408: 08042ddc .word 0x08042ddc + 803947a: bf00 nop + 803947c: 3708 adds r7, #8 + 803947e: 46bd mov sp, r7 + 8039480: bd80 pop {r7, pc} + 8039482: bf00 nop + 8039484: 08042e18 .word 0x08042e18 + 8039488: 080433b4 .word 0x080433b4 + 803948c: 08042e5c .word 0x08042e5c -0803940c : +08039490 : * @param pcb tcp_pcb to set the sent callback * @param sent callback function to call for this pcb when data is successfully sent */ void tcp_sent(struct tcp_pcb *pcb, tcp_sent_fn sent) { - 803940c: b580 push {r7, lr} - 803940e: b082 sub sp, #8 - 8039410: af00 add r7, sp, #0 - 8039412: 6078 str r0, [r7, #4] - 8039414: 6039 str r1, [r7, #0] + 8039490: b580 push {r7, lr} + 8039492: b082 sub sp, #8 + 8039494: af00 add r7, sp, #0 + 8039496: 6078 str r0, [r7, #4] + 8039498: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if (pcb != NULL) { - 8039416: 687b ldr r3, [r7, #4] - 8039418: 2b00 cmp r3, #0 - 803941a: d00e beq.n 803943a + 803949a: 687b ldr r3, [r7, #4] + 803949c: 2b00 cmp r3, #0 + 803949e: d00e beq.n 80394be LWIP_ASSERT("invalid socket state for sent callback", pcb->state != LISTEN); - 803941c: 687b ldr r3, [r7, #4] - 803941e: 7d1b ldrb r3, [r3, #20] - 8039420: 2b01 cmp r3, #1 - 8039422: d106 bne.n 8039432 - 8039424: 4b07 ldr r3, [pc, #28] ; (8039444 ) - 8039426: f240 72f3 movw r2, #2035 ; 0x7f3 - 803942a: 4907 ldr r1, [pc, #28] ; (8039448 ) - 803942c: 4807 ldr r0, [pc, #28] ; (803944c ) - 803942e: f007 fb6f bl 8040b10 + 80394a0: 687b ldr r3, [r7, #4] + 80394a2: 7d1b ldrb r3, [r3, #20] + 80394a4: 2b01 cmp r3, #1 + 80394a6: d106 bne.n 80394b6 + 80394a8: 4b07 ldr r3, [pc, #28] ; (80394c8 ) + 80394aa: f240 72f3 movw r2, #2035 ; 0x7f3 + 80394ae: 4907 ldr r1, [pc, #28] ; (80394cc ) + 80394b0: 4807 ldr r0, [pc, #28] ; (80394d0 ) + 80394b2: f007 fb6f bl 8040b94 pcb->sent = sent; - 8039432: 687b ldr r3, [r7, #4] - 8039434: 683a ldr r2, [r7, #0] - 8039436: f8c3 2080 str.w r2, [r3, #128] ; 0x80 + 80394b6: 687b ldr r3, [r7, #4] + 80394b8: 683a ldr r2, [r7, #0] + 80394ba: f8c3 2080 str.w r2, [r3, #128] ; 0x80 } } - 803943a: bf00 nop - 803943c: 3708 adds r7, #8 - 803943e: 46bd mov sp, r7 - 8039440: bd80 pop {r7, pc} - 8039442: bf00 nop - 8039444: 08042d98 .word 0x08042d98 - 8039448: 0804335c .word 0x0804335c - 803944c: 08042ddc .word 0x08042ddc + 80394be: bf00 nop + 80394c0: 3708 adds r7, #8 + 80394c2: 46bd mov sp, r7 + 80394c4: bd80 pop {r7, pc} + 80394c6: bf00 nop + 80394c8: 08042e18 .word 0x08042e18 + 80394cc: 080433dc .word 0x080433dc + 80394d0: 08042e5c .word 0x08042e5c -08039450 : +080394d4 : * @param err callback function to call for this pcb when a fatal error * has occurred on the connection */ void tcp_err(struct tcp_pcb *pcb, tcp_err_fn err) { - 8039450: b580 push {r7, lr} - 8039452: b082 sub sp, #8 - 8039454: af00 add r7, sp, #0 - 8039456: 6078 str r0, [r7, #4] - 8039458: 6039 str r1, [r7, #0] + 80394d4: b580 push {r7, lr} + 80394d6: b082 sub sp, #8 + 80394d8: af00 add r7, sp, #0 + 80394da: 6078 str r0, [r7, #4] + 80394dc: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if (pcb != NULL) { - 803945a: 687b ldr r3, [r7, #4] - 803945c: 2b00 cmp r3, #0 - 803945e: d00e beq.n 803947e + 80394de: 687b ldr r3, [r7, #4] + 80394e0: 2b00 cmp r3, #0 + 80394e2: d00e beq.n 8039502 LWIP_ASSERT("invalid socket state for err callback", pcb->state != LISTEN); - 8039460: 687b ldr r3, [r7, #4] - 8039462: 7d1b ldrb r3, [r3, #20] - 8039464: 2b01 cmp r3, #1 - 8039466: d106 bne.n 8039476 - 8039468: 4b07 ldr r3, [pc, #28] ; (8039488 ) - 803946a: f640 020d movw r2, #2061 ; 0x80d - 803946e: 4907 ldr r1, [pc, #28] ; (803948c ) - 8039470: 4807 ldr r0, [pc, #28] ; (8039490 ) - 8039472: f007 fb4d bl 8040b10 + 80394e4: 687b ldr r3, [r7, #4] + 80394e6: 7d1b ldrb r3, [r3, #20] + 80394e8: 2b01 cmp r3, #1 + 80394ea: d106 bne.n 80394fa + 80394ec: 4b07 ldr r3, [pc, #28] ; (803950c ) + 80394ee: f640 020d movw r2, #2061 ; 0x80d + 80394f2: 4907 ldr r1, [pc, #28] ; (8039510 ) + 80394f4: 4807 ldr r0, [pc, #28] ; (8039514 ) + 80394f6: f007 fb4d bl 8040b94 pcb->errf = err; - 8039476: 687b ldr r3, [r7, #4] - 8039478: 683a ldr r2, [r7, #0] - 803947a: f8c3 2090 str.w r2, [r3, #144] ; 0x90 + 80394fa: 687b ldr r3, [r7, #4] + 80394fc: 683a ldr r2, [r7, #0] + 80394fe: f8c3 2090 str.w r2, [r3, #144] ; 0x90 } } - 803947e: bf00 nop - 8039480: 3708 adds r7, #8 - 8039482: 46bd mov sp, r7 - 8039484: bd80 pop {r7, pc} - 8039486: bf00 nop - 8039488: 08042d98 .word 0x08042d98 - 803948c: 08043384 .word 0x08043384 - 8039490: 08042ddc .word 0x08042ddc + 8039502: bf00 nop + 8039504: 3708 adds r7, #8 + 8039506: 46bd mov sp, r7 + 8039508: bd80 pop {r7, pc} + 803950a: bf00 nop + 803950c: 08042e18 .word 0x08042e18 + 8039510: 08043404 .word 0x08043404 + 8039514: 08042e5c .word 0x08042e5c -08039494 : +08039518 : * @param accept callback function to call for this pcb when LISTENing * connection has been connected to another host */ void tcp_accept(struct tcp_pcb *pcb, tcp_accept_fn accept) { - 8039494: b480 push {r7} - 8039496: b085 sub sp, #20 - 8039498: af00 add r7, sp, #0 - 803949a: 6078 str r0, [r7, #4] - 803949c: 6039 str r1, [r7, #0] + 8039518: b480 push {r7} + 803951a: b085 sub sp, #20 + 803951c: af00 add r7, sp, #0 + 803951e: 6078 str r0, [r7, #4] + 8039520: 6039 str r1, [r7, #0] LWIP_ASSERT_CORE_LOCKED(); if ((pcb != NULL) && (pcb->state == LISTEN)) { - 803949e: 687b ldr r3, [r7, #4] - 80394a0: 2b00 cmp r3, #0 - 80394a2: d008 beq.n 80394b6 - 80394a4: 687b ldr r3, [r7, #4] - 80394a6: 7d1b ldrb r3, [r3, #20] - 80394a8: 2b01 cmp r3, #1 - 80394aa: d104 bne.n 80394b6 + 8039522: 687b ldr r3, [r7, #4] + 8039524: 2b00 cmp r3, #0 + 8039526: d008 beq.n 803953a + 8039528: 687b ldr r3, [r7, #4] + 803952a: 7d1b ldrb r3, [r3, #20] + 803952c: 2b01 cmp r3, #1 + 803952e: d104 bne.n 803953a struct tcp_pcb_listen *lpcb = (struct tcp_pcb_listen *)pcb; - 80394ac: 687b ldr r3, [r7, #4] - 80394ae: 60fb str r3, [r7, #12] + 8039530: 687b ldr r3, [r7, #4] + 8039532: 60fb str r3, [r7, #12] lpcb->accept = accept; - 80394b0: 68fb ldr r3, [r7, #12] - 80394b2: 683a ldr r2, [r7, #0] - 80394b4: 619a str r2, [r3, #24] + 8039534: 68fb ldr r3, [r7, #12] + 8039536: 683a ldr r2, [r7, #0] + 8039538: 619a str r2, [r3, #24] } } - 80394b6: bf00 nop - 80394b8: 3714 adds r7, #20 - 80394ba: 46bd mov sp, r7 - 80394bc: f85d 7b04 ldr.w r7, [sp], #4 - 80394c0: 4770 bx lr + 803953a: bf00 nop + 803953c: 3714 adds r7, #20 + 803953e: 46bd mov sp, r7 + 8039540: f85d 7b04 ldr.w r7, [sp], #4 + 8039544: 4770 bx lr ... -080394c4 : +08039548 : * * @param pcb tcp_pcb to purge. The pcb itself is not deallocated! */ void tcp_pcb_purge(struct tcp_pcb *pcb) { - 80394c4: b580 push {r7, lr} - 80394c6: b082 sub sp, #8 - 80394c8: af00 add r7, sp, #0 - 80394ca: 6078 str r0, [r7, #4] + 8039548: b580 push {r7, lr} + 803954a: b082 sub sp, #8 + 803954c: af00 add r7, sp, #0 + 803954e: 6078 str r0, [r7, #4] LWIP_ERROR("tcp_pcb_purge: invalid pcb", pcb != NULL, return); - 80394cc: 687b ldr r3, [r7, #4] - 80394ce: 2b00 cmp r3, #0 - 80394d0: d107 bne.n 80394e2 - 80394d2: 4b21 ldr r3, [pc, #132] ; (8039558 ) - 80394d4: f640 0251 movw r2, #2129 ; 0x851 - 80394d8: 4920 ldr r1, [pc, #128] ; (803955c ) - 80394da: 4821 ldr r0, [pc, #132] ; (8039560 ) - 80394dc: f007 fb18 bl 8040b10 - 80394e0: e037 b.n 8039552 + 8039550: 687b ldr r3, [r7, #4] + 8039552: 2b00 cmp r3, #0 + 8039554: d107 bne.n 8039566 + 8039556: 4b21 ldr r3, [pc, #132] ; (80395dc ) + 8039558: f640 0251 movw r2, #2129 ; 0x851 + 803955c: 4920 ldr r1, [pc, #128] ; (80395e0 ) + 803955e: 4821 ldr r0, [pc, #132] ; (80395e4 ) + 8039560: f007 fb18 bl 8040b94 + 8039564: e037 b.n 80395d6 if (pcb->state != CLOSED && - 80394e2: 687b ldr r3, [r7, #4] - 80394e4: 7d1b ldrb r3, [r3, #20] - 80394e6: 2b00 cmp r3, #0 - 80394e8: d033 beq.n 8039552 + 8039566: 687b ldr r3, [r7, #4] + 8039568: 7d1b ldrb r3, [r3, #20] + 803956a: 2b00 cmp r3, #0 + 803956c: d033 beq.n 80395d6 pcb->state != TIME_WAIT && - 80394ea: 687b ldr r3, [r7, #4] - 80394ec: 7d1b ldrb r3, [r3, #20] + 803956e: 687b ldr r3, [r7, #4] + 8039570: 7d1b ldrb r3, [r3, #20] if (pcb->state != CLOSED && - 80394ee: 2b0a cmp r3, #10 - 80394f0: d02f beq.n 8039552 + 8039572: 2b0a cmp r3, #10 + 8039574: d02f beq.n 80395d6 pcb->state != LISTEN) { - 80394f2: 687b ldr r3, [r7, #4] - 80394f4: 7d1b ldrb r3, [r3, #20] + 8039576: 687b ldr r3, [r7, #4] + 8039578: 7d1b ldrb r3, [r3, #20] pcb->state != TIME_WAIT && - 80394f6: 2b01 cmp r3, #1 - 80394f8: d02b beq.n 8039552 + 803957a: 2b01 cmp r3, #1 + 803957c: d02b beq.n 80395d6 LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n")); tcp_backlog_accepted(pcb); if (pcb->refused_data != NULL) { - 80394fa: 687b ldr r3, [r7, #4] - 80394fc: 6f9b ldr r3, [r3, #120] ; 0x78 - 80394fe: 2b00 cmp r3, #0 - 8039500: d007 beq.n 8039512 + 803957e: 687b ldr r3, [r7, #4] + 8039580: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039582: 2b00 cmp r3, #0 + 8039584: d007 beq.n 8039596 LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n")); pbuf_free(pcb->refused_data); - 8039502: 687b ldr r3, [r7, #4] - 8039504: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039506: 4618 mov r0, r3 - 8039508: f7fe f918 bl 803773c + 8039586: 687b ldr r3, [r7, #4] + 8039588: 6f9b ldr r3, [r3, #120] ; 0x78 + 803958a: 4618 mov r0, r3 + 803958c: f7fe f918 bl 80377c0 pcb->refused_data = NULL; - 803950c: 687b ldr r3, [r7, #4] - 803950e: 2200 movs r2, #0 - 8039510: 679a str r2, [r3, #120] ; 0x78 + 8039590: 687b ldr r3, [r7, #4] + 8039592: 2200 movs r2, #0 + 8039594: 679a str r2, [r3, #120] ; 0x78 } if (pcb->unacked != NULL) { LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n")); } #if TCP_QUEUE_OOSEQ if (pcb->ooseq != NULL) { - 8039512: 687b ldr r3, [r7, #4] - 8039514: 6f5b ldr r3, [r3, #116] ; 0x74 - 8039516: 2b00 cmp r3, #0 - 8039518: d002 beq.n 8039520 + 8039596: 687b ldr r3, [r7, #4] + 8039598: 6f5b ldr r3, [r3, #116] ; 0x74 + 803959a: 2b00 cmp r3, #0 + 803959c: d002 beq.n 80395a4 LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n")); tcp_free_ooseq(pcb); - 803951a: 6878 ldr r0, [r7, #4] - 803951c: f000 f986 bl 803982c + 803959e: 6878 ldr r0, [r7, #4] + 80395a0: f000 f986 bl 80398b0 } #endif /* TCP_QUEUE_OOSEQ */ /* Stop the retransmission timer as it will expect data on unacked queue if it fires */ pcb->rtime = -1; - 8039520: 687b ldr r3, [r7, #4] - 8039522: f64f 72ff movw r2, #65535 ; 0xffff - 8039526: 861a strh r2, [r3, #48] ; 0x30 + 80395a4: 687b ldr r3, [r7, #4] + 80395a6: f64f 72ff movw r2, #65535 ; 0xffff + 80395aa: 861a strh r2, [r3, #48] ; 0x30 tcp_segs_free(pcb->unsent); - 8039528: 687b ldr r3, [r7, #4] - 803952a: 6edb ldr r3, [r3, #108] ; 0x6c - 803952c: 4618 mov r0, r3 - 803952e: f7ff fd1d bl 8038f6c + 80395ac: 687b ldr r3, [r7, #4] + 80395ae: 6edb ldr r3, [r3, #108] ; 0x6c + 80395b0: 4618 mov r0, r3 + 80395b2: f7ff fd1d bl 8038ff0 tcp_segs_free(pcb->unacked); - 8039532: 687b ldr r3, [r7, #4] - 8039534: 6f1b ldr r3, [r3, #112] ; 0x70 - 8039536: 4618 mov r0, r3 - 8039538: f7ff fd18 bl 8038f6c + 80395b6: 687b ldr r3, [r7, #4] + 80395b8: 6f1b ldr r3, [r3, #112] ; 0x70 + 80395ba: 4618 mov r0, r3 + 80395bc: f7ff fd18 bl 8038ff0 pcb->unacked = pcb->unsent = NULL; - 803953c: 687b ldr r3, [r7, #4] - 803953e: 2200 movs r2, #0 - 8039540: 66da str r2, [r3, #108] ; 0x6c - 8039542: 687b ldr r3, [r7, #4] - 8039544: 6eda ldr r2, [r3, #108] ; 0x6c - 8039546: 687b ldr r3, [r7, #4] - 8039548: 671a str r2, [r3, #112] ; 0x70 + 80395c0: 687b ldr r3, [r7, #4] + 80395c2: 2200 movs r2, #0 + 80395c4: 66da str r2, [r3, #108] ; 0x6c + 80395c6: 687b ldr r3, [r7, #4] + 80395c8: 6eda ldr r2, [r3, #108] ; 0x6c + 80395ca: 687b ldr r3, [r7, #4] + 80395cc: 671a str r2, [r3, #112] ; 0x70 #if TCP_OVERSIZE pcb->unsent_oversize = 0; - 803954a: 687b ldr r3, [r7, #4] - 803954c: 2200 movs r2, #0 - 803954e: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 80395ce: 687b ldr r3, [r7, #4] + 80395d0: 2200 movs r2, #0 + 80395d2: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 #endif /* TCP_OVERSIZE */ } } - 8039552: 3708 adds r7, #8 - 8039554: 46bd mov sp, r7 - 8039556: bd80 pop {r7, pc} - 8039558: 08042d98 .word 0x08042d98 - 803955c: 080433e4 .word 0x080433e4 - 8039560: 08042ddc .word 0x08042ddc + 80395d6: 3708 adds r7, #8 + 80395d8: 46bd mov sp, r7 + 80395da: bd80 pop {r7, pc} + 80395dc: 08042e18 .word 0x08042e18 + 80395e0: 08043464 .word 0x08043464 + 80395e4: 08042e5c .word 0x08042e5c -08039564 : +080395e8 : * @param pcblist PCB list to purge. * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated! */ void tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb) { - 8039564: b580 push {r7, lr} - 8039566: b084 sub sp, #16 - 8039568: af00 add r7, sp, #0 - 803956a: 6078 str r0, [r7, #4] - 803956c: 6039 str r1, [r7, #0] + 80395e8: b580 push {r7, lr} + 80395ea: b084 sub sp, #16 + 80395ec: af00 add r7, sp, #0 + 80395ee: 6078 str r0, [r7, #4] + 80395f0: 6039 str r1, [r7, #0] LWIP_ASSERT("tcp_pcb_remove: invalid pcb", pcb != NULL); - 803956e: 683b ldr r3, [r7, #0] - 8039570: 2b00 cmp r3, #0 - 8039572: d106 bne.n 8039582 - 8039574: 4b3e ldr r3, [pc, #248] ; (8039670 ) - 8039576: f640 0283 movw r2, #2179 ; 0x883 - 803957a: 493e ldr r1, [pc, #248] ; (8039674 ) - 803957c: 483e ldr r0, [pc, #248] ; (8039678 ) - 803957e: f007 fac7 bl 8040b10 + 80395f2: 683b ldr r3, [r7, #0] + 80395f4: 2b00 cmp r3, #0 + 80395f6: d106 bne.n 8039606 + 80395f8: 4b3e ldr r3, [pc, #248] ; (80396f4 ) + 80395fa: f640 0283 movw r2, #2179 ; 0x883 + 80395fe: 493e ldr r1, [pc, #248] ; (80396f8 ) + 8039600: 483e ldr r0, [pc, #248] ; (80396fc ) + 8039602: f007 fac7 bl 8040b94 LWIP_ASSERT("tcp_pcb_remove: invalid pcblist", pcblist != NULL); - 8039582: 687b ldr r3, [r7, #4] - 8039584: 2b00 cmp r3, #0 - 8039586: d106 bne.n 8039596 - 8039588: 4b39 ldr r3, [pc, #228] ; (8039670 ) - 803958a: f640 0284 movw r2, #2180 ; 0x884 - 803958e: 493b ldr r1, [pc, #236] ; (803967c ) - 8039590: 4839 ldr r0, [pc, #228] ; (8039678 ) - 8039592: f007 fabd bl 8040b10 + 8039606: 687b ldr r3, [r7, #4] + 8039608: 2b00 cmp r3, #0 + 803960a: d106 bne.n 803961a + 803960c: 4b39 ldr r3, [pc, #228] ; (80396f4 ) + 803960e: f640 0284 movw r2, #2180 ; 0x884 + 8039612: 493b ldr r1, [pc, #236] ; (8039700 ) + 8039614: 4839 ldr r0, [pc, #228] ; (80396fc ) + 8039616: f007 fabd bl 8040b94 TCP_RMV(pcblist, pcb); - 8039596: 687b ldr r3, [r7, #4] - 8039598: 681b ldr r3, [r3, #0] - 803959a: 683a ldr r2, [r7, #0] - 803959c: 429a cmp r2, r3 - 803959e: d105 bne.n 80395ac - 80395a0: 687b ldr r3, [r7, #4] - 80395a2: 681b ldr r3, [r3, #0] - 80395a4: 68da ldr r2, [r3, #12] - 80395a6: 687b ldr r3, [r7, #4] - 80395a8: 601a str r2, [r3, #0] - 80395aa: e013 b.n 80395d4 - 80395ac: 687b ldr r3, [r7, #4] - 80395ae: 681b ldr r3, [r3, #0] - 80395b0: 60fb str r3, [r7, #12] - 80395b2: e00c b.n 80395ce - 80395b4: 68fb ldr r3, [r7, #12] - 80395b6: 68db ldr r3, [r3, #12] - 80395b8: 683a ldr r2, [r7, #0] - 80395ba: 429a cmp r2, r3 - 80395bc: d104 bne.n 80395c8 - 80395be: 683b ldr r3, [r7, #0] - 80395c0: 68da ldr r2, [r3, #12] - 80395c2: 68fb ldr r3, [r7, #12] - 80395c4: 60da str r2, [r3, #12] - 80395c6: e005 b.n 80395d4 - 80395c8: 68fb ldr r3, [r7, #12] - 80395ca: 68db ldr r3, [r3, #12] - 80395cc: 60fb str r3, [r7, #12] - 80395ce: 68fb ldr r3, [r7, #12] - 80395d0: 2b00 cmp r3, #0 - 80395d2: d1ef bne.n 80395b4 - 80395d4: 683b ldr r3, [r7, #0] - 80395d6: 2200 movs r2, #0 - 80395d8: 60da str r2, [r3, #12] + 803961a: 687b ldr r3, [r7, #4] + 803961c: 681b ldr r3, [r3, #0] + 803961e: 683a ldr r2, [r7, #0] + 8039620: 429a cmp r2, r3 + 8039622: d105 bne.n 8039630 + 8039624: 687b ldr r3, [r7, #4] + 8039626: 681b ldr r3, [r3, #0] + 8039628: 68da ldr r2, [r3, #12] + 803962a: 687b ldr r3, [r7, #4] + 803962c: 601a str r2, [r3, #0] + 803962e: e013 b.n 8039658 + 8039630: 687b ldr r3, [r7, #4] + 8039632: 681b ldr r3, [r3, #0] + 8039634: 60fb str r3, [r7, #12] + 8039636: e00c b.n 8039652 + 8039638: 68fb ldr r3, [r7, #12] + 803963a: 68db ldr r3, [r3, #12] + 803963c: 683a ldr r2, [r7, #0] + 803963e: 429a cmp r2, r3 + 8039640: d104 bne.n 803964c + 8039642: 683b ldr r3, [r7, #0] + 8039644: 68da ldr r2, [r3, #12] + 8039646: 68fb ldr r3, [r7, #12] + 8039648: 60da str r2, [r3, #12] + 803964a: e005 b.n 8039658 + 803964c: 68fb ldr r3, [r7, #12] + 803964e: 68db ldr r3, [r3, #12] + 8039650: 60fb str r3, [r7, #12] + 8039652: 68fb ldr r3, [r7, #12] + 8039654: 2b00 cmp r3, #0 + 8039656: d1ef bne.n 8039638 + 8039658: 683b ldr r3, [r7, #0] + 803965a: 2200 movs r2, #0 + 803965c: 60da str r2, [r3, #12] tcp_pcb_purge(pcb); - 80395da: 6838 ldr r0, [r7, #0] - 80395dc: f7ff ff72 bl 80394c4 + 803965e: 6838 ldr r0, [r7, #0] + 8039660: f7ff ff72 bl 8039548 /* if there is an outstanding delayed ACKs, send it */ if ((pcb->state != TIME_WAIT) && - 80395e0: 683b ldr r3, [r7, #0] - 80395e2: 7d1b ldrb r3, [r3, #20] - 80395e4: 2b0a cmp r3, #10 - 80395e6: d013 beq.n 8039610 + 8039664: 683b ldr r3, [r7, #0] + 8039666: 7d1b ldrb r3, [r3, #20] + 8039668: 2b0a cmp r3, #10 + 803966a: d013 beq.n 8039694 (pcb->state != LISTEN) && - 80395e8: 683b ldr r3, [r7, #0] - 80395ea: 7d1b ldrb r3, [r3, #20] + 803966c: 683b ldr r3, [r7, #0] + 803966e: 7d1b ldrb r3, [r3, #20] if ((pcb->state != TIME_WAIT) && - 80395ec: 2b01 cmp r3, #1 - 80395ee: d00f beq.n 8039610 + 8039670: 2b01 cmp r3, #1 + 8039672: d00f beq.n 8039694 (pcb->flags & TF_ACK_DELAY)) { - 80395f0: 683b ldr r3, [r7, #0] - 80395f2: 8b5b ldrh r3, [r3, #26] - 80395f4: f003 0301 and.w r3, r3, #1 + 8039674: 683b ldr r3, [r7, #0] + 8039676: 8b5b ldrh r3, [r3, #26] + 8039678: f003 0301 and.w r3, r3, #1 (pcb->state != LISTEN) && - 80395f8: 2b00 cmp r3, #0 - 80395fa: d009 beq.n 8039610 + 803967c: 2b00 cmp r3, #0 + 803967e: d009 beq.n 8039694 tcp_ack_now(pcb); - 80395fc: 683b ldr r3, [r7, #0] - 80395fe: 8b5b ldrh r3, [r3, #26] - 8039600: f043 0302 orr.w r3, r3, #2 - 8039604: b29a uxth r2, r3 - 8039606: 683b ldr r3, [r7, #0] - 8039608: 835a strh r2, [r3, #26] + 8039680: 683b ldr r3, [r7, #0] + 8039682: 8b5b ldrh r3, [r3, #26] + 8039684: f043 0302 orr.w r3, r3, #2 + 8039688: b29a uxth r2, r3 + 803968a: 683b ldr r3, [r7, #0] + 803968c: 835a strh r2, [r3, #26] tcp_output(pcb); - 803960a: 6838 ldr r0, [r7, #0] - 803960c: f003 fbc6 bl 803cd9c + 803968e: 6838 ldr r0, [r7, #0] + 8039690: f003 fbc6 bl 803ce20 } if (pcb->state != LISTEN) { - 8039610: 683b ldr r3, [r7, #0] - 8039612: 7d1b ldrb r3, [r3, #20] - 8039614: 2b01 cmp r3, #1 - 8039616: d020 beq.n 803965a + 8039694: 683b ldr r3, [r7, #0] + 8039696: 7d1b ldrb r3, [r3, #20] + 8039698: 2b01 cmp r3, #1 + 803969a: d020 beq.n 80396de LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL); - 8039618: 683b ldr r3, [r7, #0] - 803961a: 6edb ldr r3, [r3, #108] ; 0x6c - 803961c: 2b00 cmp r3, #0 - 803961e: d006 beq.n 803962e - 8039620: 4b13 ldr r3, [pc, #76] ; (8039670 ) - 8039622: f640 0293 movw r2, #2195 ; 0x893 - 8039626: 4916 ldr r1, [pc, #88] ; (8039680 ) - 8039628: 4813 ldr r0, [pc, #76] ; (8039678 ) - 803962a: f007 fa71 bl 8040b10 + 803969c: 683b ldr r3, [r7, #0] + 803969e: 6edb ldr r3, [r3, #108] ; 0x6c + 80396a0: 2b00 cmp r3, #0 + 80396a2: d006 beq.n 80396b2 + 80396a4: 4b13 ldr r3, [pc, #76] ; (80396f4 ) + 80396a6: f640 0293 movw r2, #2195 ; 0x893 + 80396aa: 4916 ldr r1, [pc, #88] ; (8039704 ) + 80396ac: 4813 ldr r0, [pc, #76] ; (80396fc ) + 80396ae: f007 fa71 bl 8040b94 LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL); - 803962e: 683b ldr r3, [r7, #0] - 8039630: 6f1b ldr r3, [r3, #112] ; 0x70 - 8039632: 2b00 cmp r3, #0 - 8039634: d006 beq.n 8039644 - 8039636: 4b0e ldr r3, [pc, #56] ; (8039670 ) - 8039638: f640 0294 movw r2, #2196 ; 0x894 - 803963c: 4911 ldr r1, [pc, #68] ; (8039684 ) - 803963e: 480e ldr r0, [pc, #56] ; (8039678 ) - 8039640: f007 fa66 bl 8040b10 + 80396b2: 683b ldr r3, [r7, #0] + 80396b4: 6f1b ldr r3, [r3, #112] ; 0x70 + 80396b6: 2b00 cmp r3, #0 + 80396b8: d006 beq.n 80396c8 + 80396ba: 4b0e ldr r3, [pc, #56] ; (80396f4 ) + 80396bc: f640 0294 movw r2, #2196 ; 0x894 + 80396c0: 4911 ldr r1, [pc, #68] ; (8039708 ) + 80396c2: 480e ldr r0, [pc, #56] ; (80396fc ) + 80396c4: f007 fa66 bl 8040b94 #if TCP_QUEUE_OOSEQ LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL); - 8039644: 683b ldr r3, [r7, #0] - 8039646: 6f5b ldr r3, [r3, #116] ; 0x74 - 8039648: 2b00 cmp r3, #0 - 803964a: d006 beq.n 803965a - 803964c: 4b08 ldr r3, [pc, #32] ; (8039670 ) - 803964e: f640 0296 movw r2, #2198 ; 0x896 - 8039652: 490d ldr r1, [pc, #52] ; (8039688 ) - 8039654: 4808 ldr r0, [pc, #32] ; (8039678 ) - 8039656: f007 fa5b bl 8040b10 + 80396c8: 683b ldr r3, [r7, #0] + 80396ca: 6f5b ldr r3, [r3, #116] ; 0x74 + 80396cc: 2b00 cmp r3, #0 + 80396ce: d006 beq.n 80396de + 80396d0: 4b08 ldr r3, [pc, #32] ; (80396f4 ) + 80396d2: f640 0296 movw r2, #2198 ; 0x896 + 80396d6: 490d ldr r1, [pc, #52] ; (803970c ) + 80396d8: 4808 ldr r0, [pc, #32] ; (80396fc ) + 80396da: f007 fa5b bl 8040b94 #endif /* TCP_QUEUE_OOSEQ */ } pcb->state = CLOSED; - 803965a: 683b ldr r3, [r7, #0] - 803965c: 2200 movs r2, #0 - 803965e: 751a strb r2, [r3, #20] + 80396de: 683b ldr r3, [r7, #0] + 80396e0: 2200 movs r2, #0 + 80396e2: 751a strb r2, [r3, #20] /* reset the local port to prevent the pcb from being 'bound' */ pcb->local_port = 0; - 8039660: 683b ldr r3, [r7, #0] - 8039662: 2200 movs r2, #0 - 8039664: 82da strh r2, [r3, #22] + 80396e4: 683b ldr r3, [r7, #0] + 80396e6: 2200 movs r2, #0 + 80396e8: 82da strh r2, [r3, #22] LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane()); } - 8039666: bf00 nop - 8039668: 3710 adds r7, #16 - 803966a: 46bd mov sp, r7 - 803966c: bd80 pop {r7, pc} - 803966e: bf00 nop - 8039670: 08042d98 .word 0x08042d98 - 8039674: 08043400 .word 0x08043400 - 8039678: 08042ddc .word 0x08042ddc - 803967c: 0804341c .word 0x0804341c - 8039680: 0804343c .word 0x0804343c - 8039684: 08043454 .word 0x08043454 - 8039688: 08043470 .word 0x08043470 - -0803968c : + 80396ea: bf00 nop + 80396ec: 3710 adds r7, #16 + 80396ee: 46bd mov sp, r7 + 80396f0: bd80 pop {r7, pc} + 80396f2: bf00 nop + 80396f4: 08042e18 .word 0x08042e18 + 80396f8: 08043480 .word 0x08043480 + 80396fc: 08042e5c .word 0x08042e5c + 8039700: 0804349c .word 0x0804349c + 8039704: 080434bc .word 0x080434bc + 8039708: 080434d4 .word 0x080434d4 + 803970c: 080434f0 .word 0x080434f0 + +08039710 : * * @return u32_t pseudo random sequence number */ u32_t tcp_next_iss(struct tcp_pcb *pcb) { - 803968c: b580 push {r7, lr} - 803968e: b082 sub sp, #8 - 8039690: af00 add r7, sp, #0 - 8039692: 6078 str r0, [r7, #4] + 8039710: b580 push {r7, lr} + 8039712: b082 sub sp, #8 + 8039714: af00 add r7, sp, #0 + 8039716: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL); return LWIP_HOOK_TCP_ISN(&pcb->local_ip, pcb->local_port, &pcb->remote_ip, pcb->remote_port); #else /* LWIP_HOOK_TCP_ISN */ static u32_t iss = 6510; LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL); - 8039694: 687b ldr r3, [r7, #4] - 8039696: 2b00 cmp r3, #0 - 8039698: d106 bne.n 80396a8 - 803969a: 4b0a ldr r3, [pc, #40] ; (80396c4 ) - 803969c: f640 02af movw r2, #2223 ; 0x8af - 80396a0: 4909 ldr r1, [pc, #36] ; (80396c8 ) - 80396a2: 480a ldr r0, [pc, #40] ; (80396cc ) - 80396a4: f007 fa34 bl 8040b10 + 8039718: 687b ldr r3, [r7, #4] + 803971a: 2b00 cmp r3, #0 + 803971c: d106 bne.n 803972c + 803971e: 4b0a ldr r3, [pc, #40] ; (8039748 ) + 8039720: f640 02af movw r2, #2223 ; 0x8af + 8039724: 4909 ldr r1, [pc, #36] ; (803974c ) + 8039726: 480a ldr r0, [pc, #40] ; (8039750 ) + 8039728: f007 fa34 bl 8040b94 LWIP_UNUSED_ARG(pcb); iss += tcp_ticks; /* XXX */ - 80396a8: 4b09 ldr r3, [pc, #36] ; (80396d0 ) - 80396aa: 681a ldr r2, [r3, #0] - 80396ac: 4b09 ldr r3, [pc, #36] ; (80396d4 ) - 80396ae: 681b ldr r3, [r3, #0] - 80396b0: 4413 add r3, r2 - 80396b2: 4a07 ldr r2, [pc, #28] ; (80396d0 ) - 80396b4: 6013 str r3, [r2, #0] + 803972c: 4b09 ldr r3, [pc, #36] ; (8039754 ) + 803972e: 681a ldr r2, [r3, #0] + 8039730: 4b09 ldr r3, [pc, #36] ; (8039758 ) + 8039732: 681b ldr r3, [r3, #0] + 8039734: 4413 add r3, r2 + 8039736: 4a07 ldr r2, [pc, #28] ; (8039754 ) + 8039738: 6013 str r3, [r2, #0] return iss; - 80396b6: 4b06 ldr r3, [pc, #24] ; (80396d0 ) - 80396b8: 681b ldr r3, [r3, #0] + 803973a: 4b06 ldr r3, [pc, #24] ; (8039754 ) + 803973c: 681b ldr r3, [r3, #0] #endif /* LWIP_HOOK_TCP_ISN */ } - 80396ba: 4618 mov r0, r3 - 80396bc: 3708 adds r7, #8 - 80396be: 46bd mov sp, r7 - 80396c0: bd80 pop {r7, pc} - 80396c2: bf00 nop - 80396c4: 08042d98 .word 0x08042d98 - 80396c8: 08043488 .word 0x08043488 - 80396cc: 08042ddc .word 0x08042ddc - 80396d0: 24000070 .word 0x24000070 - 80396d4: 2400e958 .word 0x2400e958 - -080396d8 : + 803973e: 4618 mov r0, r3 + 8039740: 3708 adds r7, #8 + 8039742: 46bd mov sp, r7 + 8039744: bd80 pop {r7, pc} + 8039746: bf00 nop + 8039748: 08042e18 .word 0x08042e18 + 803974c: 08043508 .word 0x08043508 + 8039750: 08042e5c .word 0x08042e5c + 8039754: 24000070 .word 0x24000070 + 8039758: 2400e960 .word 0x2400e960 + +0803975c : * by calculating the minimum of TCP_MSS and the mtu (if set) of the target * netif (if not NULL). */ u16_t tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif, const ip_addr_t *dest) { - 80396d8: b580 push {r7, lr} - 80396da: b086 sub sp, #24 - 80396dc: af00 add r7, sp, #0 - 80396de: 4603 mov r3, r0 - 80396e0: 60b9 str r1, [r7, #8] - 80396e2: 607a str r2, [r7, #4] - 80396e4: 81fb strh r3, [r7, #14] + 803975c: b580 push {r7, lr} + 803975e: b086 sub sp, #24 + 8039760: af00 add r7, sp, #0 + 8039762: 4603 mov r3, r0 + 8039764: 60b9 str r1, [r7, #8] + 8039766: 607a str r2, [r7, #4] + 8039768: 81fb strh r3, [r7, #14] u16_t mss_s; u16_t mtu; LWIP_UNUSED_ARG(dest); /* in case IPv6 is disabled */ LWIP_ASSERT("tcp_eff_send_mss_netif: invalid dst_ip", dest != NULL); - 80396e6: 687b ldr r3, [r7, #4] - 80396e8: 2b00 cmp r3, #0 - 80396ea: d106 bne.n 80396fa - 80396ec: 4b14 ldr r3, [pc, #80] ; (8039740 ) - 80396ee: f640 02c5 movw r2, #2245 ; 0x8c5 - 80396f2: 4914 ldr r1, [pc, #80] ; (8039744 ) - 80396f4: 4814 ldr r0, [pc, #80] ; (8039748 ) - 80396f6: f007 fa0b bl 8040b10 + 803976a: 687b ldr r3, [r7, #4] + 803976c: 2b00 cmp r3, #0 + 803976e: d106 bne.n 803977e + 8039770: 4b14 ldr r3, [pc, #80] ; (80397c4 ) + 8039772: f640 02c5 movw r2, #2245 ; 0x8c5 + 8039776: 4914 ldr r1, [pc, #80] ; (80397c8 ) + 8039778: 4814 ldr r0, [pc, #80] ; (80397cc ) + 803977a: f007 fa0b bl 8040b94 else #endif /* LWIP_IPV4 */ #endif /* LWIP_IPV6 */ #if LWIP_IPV4 { if (outif == NULL) { - 80396fa: 68bb ldr r3, [r7, #8] - 80396fc: 2b00 cmp r3, #0 - 80396fe: d101 bne.n 8039704 + 803977e: 68bb ldr r3, [r7, #8] + 8039780: 2b00 cmp r3, #0 + 8039782: d101 bne.n 8039788 return sendmss; - 8039700: 89fb ldrh r3, [r7, #14] - 8039702: e019 b.n 8039738 + 8039784: 89fb ldrh r3, [r7, #14] + 8039786: e019 b.n 80397bc } mtu = outif->mtu; - 8039704: 68bb ldr r3, [r7, #8] - 8039706: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8039708: 82fb strh r3, [r7, #22] + 8039788: 68bb ldr r3, [r7, #8] + 803978a: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803978c: 82fb strh r3, [r7, #22] } #endif /* LWIP_IPV4 */ if (mtu != 0) { - 803970a: 8afb ldrh r3, [r7, #22] - 803970c: 2b00 cmp r3, #0 - 803970e: d012 beq.n 8039736 + 803978e: 8afb ldrh r3, [r7, #22] + 8039790: 2b00 cmp r3, #0 + 8039792: d012 beq.n 80397ba else #endif /* LWIP_IPV4 */ #endif /* LWIP_IPV6 */ #if LWIP_IPV4 { offset = IP_HLEN + TCP_HLEN; - 8039710: 2328 movs r3, #40 ; 0x28 - 8039712: 82bb strh r3, [r7, #20] + 8039794: 2328 movs r3, #40 ; 0x28 + 8039796: 82bb strh r3, [r7, #20] } #endif /* LWIP_IPV4 */ mss_s = (mtu > offset) ? (u16_t)(mtu - offset) : 0; - 8039714: 8afa ldrh r2, [r7, #22] - 8039716: 8abb ldrh r3, [r7, #20] - 8039718: 429a cmp r2, r3 - 803971a: d904 bls.n 8039726 - 803971c: 8afa ldrh r2, [r7, #22] - 803971e: 8abb ldrh r3, [r7, #20] - 8039720: 1ad3 subs r3, r2, r3 - 8039722: b29b uxth r3, r3 - 8039724: e000 b.n 8039728 - 8039726: 2300 movs r3, #0 - 8039728: 827b strh r3, [r7, #18] + 8039798: 8afa ldrh r2, [r7, #22] + 803979a: 8abb ldrh r3, [r7, #20] + 803979c: 429a cmp r2, r3 + 803979e: d904 bls.n 80397aa + 80397a0: 8afa ldrh r2, [r7, #22] + 80397a2: 8abb ldrh r3, [r7, #20] + 80397a4: 1ad3 subs r3, r2, r3 + 80397a6: b29b uxth r3, r3 + 80397a8: e000 b.n 80397ac + 80397aa: 2300 movs r3, #0 + 80397ac: 827b strh r3, [r7, #18] /* RFC 1122, chap 4.2.2.6: * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize * We correct for TCP options in tcp_write(), and don't support IP options. */ sendmss = LWIP_MIN(sendmss, mss_s); - 803972a: 8a7a ldrh r2, [r7, #18] - 803972c: 89fb ldrh r3, [r7, #14] - 803972e: 4293 cmp r3, r2 - 8039730: bf28 it cs - 8039732: 4613 movcs r3, r2 - 8039734: 81fb strh r3, [r7, #14] + 80397ae: 8a7a ldrh r2, [r7, #18] + 80397b0: 89fb ldrh r3, [r7, #14] + 80397b2: 4293 cmp r3, r2 + 80397b4: bf28 it cs + 80397b6: 4613 movcs r3, r2 + 80397b8: 81fb strh r3, [r7, #14] } return sendmss; - 8039736: 89fb ldrh r3, [r7, #14] + 80397ba: 89fb ldrh r3, [r7, #14] } - 8039738: 4618 mov r0, r3 - 803973a: 3718 adds r7, #24 - 803973c: 46bd mov sp, r7 - 803973e: bd80 pop {r7, pc} - 8039740: 08042d98 .word 0x08042d98 - 8039744: 080434a4 .word 0x080434a4 - 8039748: 08042ddc .word 0x08042ddc + 80397bc: 4618 mov r0, r3 + 80397be: 3718 adds r7, #24 + 80397c0: 46bd mov sp, r7 + 80397c2: bd80 pop {r7, pc} + 80397c4: 08042e18 .word 0x08042e18 + 80397c8: 08043524 .word 0x08043524 + 80397cc: 08042e5c .word 0x08042e5c -0803974c : +080397d0 : #endif /* TCP_CALCULATE_EFF_SEND_MSS */ /** Helper function for tcp_netif_ip_addr_changed() that iterates a pcb list */ static void tcp_netif_ip_addr_changed_pcblist(const ip_addr_t *old_addr, struct tcp_pcb *pcb_list) { - 803974c: b580 push {r7, lr} - 803974e: b084 sub sp, #16 - 8039750: af00 add r7, sp, #0 - 8039752: 6078 str r0, [r7, #4] - 8039754: 6039 str r1, [r7, #0] + 80397d0: b580 push {r7, lr} + 80397d2: b084 sub sp, #16 + 80397d4: af00 add r7, sp, #0 + 80397d6: 6078 str r0, [r7, #4] + 80397d8: 6039 str r1, [r7, #0] struct tcp_pcb *pcb; pcb = pcb_list; - 8039756: 683b ldr r3, [r7, #0] - 8039758: 60fb str r3, [r7, #12] + 80397da: 683b ldr r3, [r7, #0] + 80397dc: 60fb str r3, [r7, #12] LWIP_ASSERT("tcp_netif_ip_addr_changed_pcblist: invalid old_addr", old_addr != NULL); - 803975a: 687b ldr r3, [r7, #4] - 803975c: 2b00 cmp r3, #0 - 803975e: d119 bne.n 8039794 - 8039760: 4b10 ldr r3, [pc, #64] ; (80397a4 ) - 8039762: f44f 6210 mov.w r2, #2304 ; 0x900 - 8039766: 4910 ldr r1, [pc, #64] ; (80397a8 ) - 8039768: 4810 ldr r0, [pc, #64] ; (80397ac ) - 803976a: f007 f9d1 bl 8040b10 + 80397de: 687b ldr r3, [r7, #4] + 80397e0: 2b00 cmp r3, #0 + 80397e2: d119 bne.n 8039818 + 80397e4: 4b10 ldr r3, [pc, #64] ; (8039828 ) + 80397e6: f44f 6210 mov.w r2, #2304 ; 0x900 + 80397ea: 4910 ldr r1, [pc, #64] ; (803982c ) + 80397ec: 4810 ldr r0, [pc, #64] ; (8039830 ) + 80397ee: f007 f9d1 bl 8040b94 while (pcb != NULL) { - 803976e: e011 b.n 8039794 + 80397f2: e011 b.n 8039818 /* PCB bound to current local interface address? */ if (ip_addr_cmp(&pcb->local_ip, old_addr) - 8039770: 68fb ldr r3, [r7, #12] - 8039772: 681a ldr r2, [r3, #0] - 8039774: 687b ldr r3, [r7, #4] - 8039776: 681b ldr r3, [r3, #0] - 8039778: 429a cmp r2, r3 - 803977a: d108 bne.n 803978e + 80397f4: 68fb ldr r3, [r7, #12] + 80397f6: 681a ldr r2, [r3, #0] + 80397f8: 687b ldr r3, [r7, #4] + 80397fa: 681b ldr r3, [r3, #0] + 80397fc: 429a cmp r2, r3 + 80397fe: d108 bne.n 8039812 /* connections to link-local addresses must persist (RFC3927 ch. 1.9) */ && (!IP_IS_V4_VAL(pcb->local_ip) || !ip4_addr_islinklocal(ip_2_ip4(&pcb->local_ip))) #endif /* LWIP_AUTOIP */ ) { /* this connection must be aborted */ struct tcp_pcb *next = pcb->next; - 803977c: 68fb ldr r3, [r7, #12] - 803977e: 68db ldr r3, [r3, #12] - 8039780: 60bb str r3, [r7, #8] + 8039800: 68fb ldr r3, [r7, #12] + 8039802: 68db ldr r3, [r3, #12] + 8039804: 60bb str r3, [r7, #8] LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb)); tcp_abort(pcb); - 8039782: 68f8 ldr r0, [r7, #12] - 8039784: f7fe fd62 bl 803824c + 8039806: 68f8 ldr r0, [r7, #12] + 8039808: f7fe fd62 bl 80382d0 pcb = next; - 8039788: 68bb ldr r3, [r7, #8] - 803978a: 60fb str r3, [r7, #12] - 803978c: e002 b.n 8039794 + 803980c: 68bb ldr r3, [r7, #8] + 803980e: 60fb str r3, [r7, #12] + 8039810: e002 b.n 8039818 } else { pcb = pcb->next; - 803978e: 68fb ldr r3, [r7, #12] - 8039790: 68db ldr r3, [r3, #12] - 8039792: 60fb str r3, [r7, #12] + 8039812: 68fb ldr r3, [r7, #12] + 8039814: 68db ldr r3, [r3, #12] + 8039816: 60fb str r3, [r7, #12] while (pcb != NULL) { - 8039794: 68fb ldr r3, [r7, #12] - 8039796: 2b00 cmp r3, #0 - 8039798: d1ea bne.n 8039770 + 8039818: 68fb ldr r3, [r7, #12] + 803981a: 2b00 cmp r3, #0 + 803981c: d1ea bne.n 80397f4 } } } - 803979a: bf00 nop - 803979c: bf00 nop - 803979e: 3710 adds r7, #16 - 80397a0: 46bd mov sp, r7 - 80397a2: bd80 pop {r7, pc} - 80397a4: 08042d98 .word 0x08042d98 - 80397a8: 080434cc .word 0x080434cc - 80397ac: 08042ddc .word 0x08042ddc - -080397b0 : + 803981e: bf00 nop + 8039820: bf00 nop + 8039822: 3710 adds r7, #16 + 8039824: 46bd mov sp, r7 + 8039826: bd80 pop {r7, pc} + 8039828: 08042e18 .word 0x08042e18 + 803982c: 0804354c .word 0x0804354c + 8039830: 08042e5c .word 0x08042e5c + +08039834 : * @param old_addr IP address of the netif before change * @param new_addr IP address of the netif after change or NULL if netif has been removed */ void tcp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr) { - 80397b0: b580 push {r7, lr} - 80397b2: b084 sub sp, #16 - 80397b4: af00 add r7, sp, #0 - 80397b6: 6078 str r0, [r7, #4] - 80397b8: 6039 str r1, [r7, #0] + 8039834: b580 push {r7, lr} + 8039836: b084 sub sp, #16 + 8039838: af00 add r7, sp, #0 + 803983a: 6078 str r0, [r7, #4] + 803983c: 6039 str r1, [r7, #0] struct tcp_pcb_listen *lpcb; if (!ip_addr_isany(old_addr)) { - 80397ba: 687b ldr r3, [r7, #4] - 80397bc: 2b00 cmp r3, #0 - 80397be: d02a beq.n 8039816 - 80397c0: 687b ldr r3, [r7, #4] - 80397c2: 681b ldr r3, [r3, #0] - 80397c4: 2b00 cmp r3, #0 - 80397c6: d026 beq.n 8039816 + 803983e: 687b ldr r3, [r7, #4] + 8039840: 2b00 cmp r3, #0 + 8039842: d02a beq.n 803989a + 8039844: 687b ldr r3, [r7, #4] + 8039846: 681b ldr r3, [r3, #0] + 8039848: 2b00 cmp r3, #0 + 803984a: d026 beq.n 803989a tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_active_pcbs); - 80397c8: 4b15 ldr r3, [pc, #84] ; (8039820 ) - 80397ca: 681b ldr r3, [r3, #0] - 80397cc: 4619 mov r1, r3 - 80397ce: 6878 ldr r0, [r7, #4] - 80397d0: f7ff ffbc bl 803974c + 803984c: 4b15 ldr r3, [pc, #84] ; (80398a4 ) + 803984e: 681b ldr r3, [r3, #0] + 8039850: 4619 mov r1, r3 + 8039852: 6878 ldr r0, [r7, #4] + 8039854: f7ff ffbc bl 80397d0 tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_bound_pcbs); - 80397d4: 4b13 ldr r3, [pc, #76] ; (8039824 ) - 80397d6: 681b ldr r3, [r3, #0] - 80397d8: 4619 mov r1, r3 - 80397da: 6878 ldr r0, [r7, #4] - 80397dc: f7ff ffb6 bl 803974c + 8039858: 4b13 ldr r3, [pc, #76] ; (80398a8 ) + 803985a: 681b ldr r3, [r3, #0] + 803985c: 4619 mov r1, r3 + 803985e: 6878 ldr r0, [r7, #4] + 8039860: f7ff ffb6 bl 80397d0 if (!ip_addr_isany(new_addr)) { - 80397e0: 683b ldr r3, [r7, #0] - 80397e2: 2b00 cmp r3, #0 - 80397e4: d017 beq.n 8039816 - 80397e6: 683b ldr r3, [r7, #0] - 80397e8: 681b ldr r3, [r3, #0] - 80397ea: 2b00 cmp r3, #0 - 80397ec: d013 beq.n 8039816 + 8039864: 683b ldr r3, [r7, #0] + 8039866: 2b00 cmp r3, #0 + 8039868: d017 beq.n 803989a + 803986a: 683b ldr r3, [r7, #0] + 803986c: 681b ldr r3, [r3, #0] + 803986e: 2b00 cmp r3, #0 + 8039870: d013 beq.n 803989a /* PCB bound to current local interface address? */ for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - 80397ee: 4b0e ldr r3, [pc, #56] ; (8039828 ) - 80397f0: 681b ldr r3, [r3, #0] - 80397f2: 60fb str r3, [r7, #12] - 80397f4: e00c b.n 8039810 + 8039872: 4b0e ldr r3, [pc, #56] ; (80398ac ) + 8039874: 681b ldr r3, [r3, #0] + 8039876: 60fb str r3, [r7, #12] + 8039878: e00c b.n 8039894 /* PCB bound to current local interface address? */ if (ip_addr_cmp(&lpcb->local_ip, old_addr)) { - 80397f6: 68fb ldr r3, [r7, #12] - 80397f8: 681a ldr r2, [r3, #0] - 80397fa: 687b ldr r3, [r7, #4] - 80397fc: 681b ldr r3, [r3, #0] - 80397fe: 429a cmp r2, r3 - 8039800: d103 bne.n 803980a + 803987a: 68fb ldr r3, [r7, #12] + 803987c: 681a ldr r2, [r3, #0] + 803987e: 687b ldr r3, [r7, #4] + 8039880: 681b ldr r3, [r3, #0] + 8039882: 429a cmp r2, r3 + 8039884: d103 bne.n 803988e /* The PCB is listening to the old ipaddr and * is set to listen to the new one instead */ ip_addr_copy(lpcb->local_ip, *new_addr); - 8039802: 683b ldr r3, [r7, #0] - 8039804: 681a ldr r2, [r3, #0] - 8039806: 68fb ldr r3, [r7, #12] - 8039808: 601a str r2, [r3, #0] + 8039886: 683b ldr r3, [r7, #0] + 8039888: 681a ldr r2, [r3, #0] + 803988a: 68fb ldr r3, [r7, #12] + 803988c: 601a str r2, [r3, #0] for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - 803980a: 68fb ldr r3, [r7, #12] - 803980c: 68db ldr r3, [r3, #12] - 803980e: 60fb str r3, [r7, #12] - 8039810: 68fb ldr r3, [r7, #12] - 8039812: 2b00 cmp r3, #0 - 8039814: d1ef bne.n 80397f6 + 803988e: 68fb ldr r3, [r7, #12] + 8039890: 68db ldr r3, [r3, #12] + 8039892: 60fb str r3, [r7, #12] + 8039894: 68fb ldr r3, [r7, #12] + 8039896: 2b00 cmp r3, #0 + 8039898: d1ef bne.n 803987a } } } } } - 8039816: bf00 nop - 8039818: 3710 adds r7, #16 - 803981a: 46bd mov sp, r7 - 803981c: bd80 pop {r7, pc} - 803981e: bf00 nop - 8039820: 2400e964 .word 0x2400e964 - 8039824: 2400e95c .word 0x2400e95c - 8039828: 2400e960 .word 0x2400e960 + 803989a: bf00 nop + 803989c: 3710 adds r7, #16 + 803989e: 46bd mov sp, r7 + 80398a0: bd80 pop {r7, pc} + 80398a2: bf00 nop + 80398a4: 2400e96c .word 0x2400e96c + 80398a8: 2400e964 .word 0x2400e964 + 80398ac: 2400e968 .word 0x2400e968 -0803982c : +080398b0 : #if TCP_QUEUE_OOSEQ /* Free all ooseq pbufs (and possibly reset SACK state) */ void tcp_free_ooseq(struct tcp_pcb *pcb) { - 803982c: b580 push {r7, lr} - 803982e: b082 sub sp, #8 - 8039830: af00 add r7, sp, #0 - 8039832: 6078 str r0, [r7, #4] + 80398b0: b580 push {r7, lr} + 80398b2: b082 sub sp, #8 + 80398b4: af00 add r7, sp, #0 + 80398b6: 6078 str r0, [r7, #4] if (pcb->ooseq) { - 8039834: 687b ldr r3, [r7, #4] - 8039836: 6f5b ldr r3, [r3, #116] ; 0x74 - 8039838: 2b00 cmp r3, #0 - 803983a: d007 beq.n 803984c + 80398b8: 687b ldr r3, [r7, #4] + 80398ba: 6f5b ldr r3, [r3, #116] ; 0x74 + 80398bc: 2b00 cmp r3, #0 + 80398be: d007 beq.n 80398d0 tcp_segs_free(pcb->ooseq); - 803983c: 687b ldr r3, [r7, #4] - 803983e: 6f5b ldr r3, [r3, #116] ; 0x74 - 8039840: 4618 mov r0, r3 - 8039842: f7ff fb93 bl 8038f6c + 80398c0: 687b ldr r3, [r7, #4] + 80398c2: 6f5b ldr r3, [r3, #116] ; 0x74 + 80398c4: 4618 mov r0, r3 + 80398c6: f7ff fb93 bl 8038ff0 pcb->ooseq = NULL; - 8039846: 687b ldr r3, [r7, #4] - 8039848: 2200 movs r2, #0 - 803984a: 675a str r2, [r3, #116] ; 0x74 + 80398ca: 687b ldr r3, [r7, #4] + 80398cc: 2200 movs r2, #0 + 80398ce: 675a str r2, [r3, #116] ; 0x74 #if LWIP_TCP_SACK_OUT memset(pcb->rcv_sacks, 0, sizeof(pcb->rcv_sacks)); #endif /* LWIP_TCP_SACK_OUT */ } } - 803984c: bf00 nop - 803984e: 3708 adds r7, #8 - 8039850: 46bd mov sp, r7 - 8039852: bd80 pop {r7, pc} + 80398d0: bf00 nop + 80398d2: 3708 adds r7, #8 + 80398d4: 46bd mov sp, r7 + 80398d6: bd80 pop {r7, pc} -08039854 : +080398d8 : * @param p received TCP segment to process (p->payload pointing to the TCP header) * @param inp network interface on which this segment was received */ void tcp_input(struct pbuf *p, struct netif *inp) { - 8039854: b590 push {r4, r7, lr} - 8039856: b08d sub sp, #52 ; 0x34 - 8039858: af04 add r7, sp, #16 - 803985a: 6078 str r0, [r7, #4] - 803985c: 6039 str r1, [r7, #0] + 80398d8: b590 push {r4, r7, lr} + 80398da: b08d sub sp, #52 ; 0x34 + 80398dc: af04 add r7, sp, #16 + 80398de: 6078 str r0, [r7, #4] + 80398e0: 6039 str r1, [r7, #0] u8_t hdrlen_bytes; err_t err; LWIP_UNUSED_ARG(inp); LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("tcp_input: invalid pbuf", p != NULL); - 803985e: 687b ldr r3, [r7, #4] - 8039860: 2b00 cmp r3, #0 - 8039862: d105 bne.n 8039870 - 8039864: 4b9b ldr r3, [pc, #620] ; (8039ad4 ) - 8039866: 2283 movs r2, #131 ; 0x83 - 8039868: 499b ldr r1, [pc, #620] ; (8039ad8 ) - 803986a: 489c ldr r0, [pc, #624] ; (8039adc ) - 803986c: f007 f950 bl 8040b10 + 80398e2: 687b ldr r3, [r7, #4] + 80398e4: 2b00 cmp r3, #0 + 80398e6: d105 bne.n 80398f4 + 80398e8: 4b9b ldr r3, [pc, #620] ; (8039b58 ) + 80398ea: 2283 movs r2, #131 ; 0x83 + 80398ec: 499b ldr r1, [pc, #620] ; (8039b5c ) + 80398ee: 489c ldr r0, [pc, #624] ; (8039b60 ) + 80398f0: f007 f950 bl 8040b94 PERF_START; TCP_STATS_INC(tcp.recv); MIB2_STATS_INC(mib2.tcpinsegs); tcphdr = (struct tcp_hdr *)p->payload; - 8039870: 687b ldr r3, [r7, #4] - 8039872: 685b ldr r3, [r3, #4] - 8039874: 4a9a ldr r2, [pc, #616] ; (8039ae0 ) - 8039876: 6013 str r3, [r2, #0] + 80398f4: 687b ldr r3, [r7, #4] + 80398f6: 685b ldr r3, [r3, #4] + 80398f8: 4a9a ldr r2, [pc, #616] ; (8039b64 ) + 80398fa: 6013 str r3, [r2, #0] #if TCP_INPUT_DEBUG tcp_debug_print(tcphdr); #endif /* Check that TCP header fits in payload */ if (p->len < TCP_HLEN) { - 8039878: 687b ldr r3, [r7, #4] - 803987a: 895b ldrh r3, [r3, #10] - 803987c: 2b13 cmp r3, #19 - 803987e: f240 83d1 bls.w 803a024 + 80398fc: 687b ldr r3, [r7, #4] + 80398fe: 895b ldrh r3, [r3, #10] + 8039900: 2b13 cmp r3, #19 + 8039902: f240 83d1 bls.w 803a0a8 TCP_STATS_INC(tcp.lenerr); goto dropped; } /* Don't even process incoming broadcasts/multicasts. */ if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) || - 8039882: 4b98 ldr r3, [pc, #608] ; (8039ae4 ) - 8039884: 695b ldr r3, [r3, #20] - 8039886: 4a97 ldr r2, [pc, #604] ; (8039ae4 ) - 8039888: 6812 ldr r2, [r2, #0] - 803988a: 4611 mov r1, r2 - 803988c: 4618 mov r0, r3 - 803988e: f006 f895 bl 803f9bc - 8039892: 4603 mov r3, r0 - 8039894: 2b00 cmp r3, #0 - 8039896: f040 83c7 bne.w 803a028 + 8039906: 4b98 ldr r3, [pc, #608] ; (8039b68 ) + 8039908: 695b ldr r3, [r3, #20] + 803990a: 4a97 ldr r2, [pc, #604] ; (8039b68 ) + 803990c: 6812 ldr r2, [r2, #0] + 803990e: 4611 mov r1, r2 + 8039910: 4618 mov r0, r3 + 8039912: f006 f895 bl 803fa40 + 8039916: 4603 mov r3, r0 + 8039918: 2b00 cmp r3, #0 + 803991a: f040 83c7 bne.w 803a0ac ip_addr_ismulticast(ip_current_dest_addr())) { - 803989a: 4b92 ldr r3, [pc, #584] ; (8039ae4 ) - 803989c: 695b ldr r3, [r3, #20] - 803989e: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803991e: 4b92 ldr r3, [pc, #584] ; (8039b68 ) + 8039920: 695b ldr r3, [r3, #20] + 8039922: f003 03f0 and.w r3, r3, #240 ; 0xf0 if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) || - 80398a2: 2be0 cmp r3, #224 ; 0xe0 - 80398a4: f000 83c0 beq.w 803a028 + 8039926: 2be0 cmp r3, #224 ; 0xe0 + 8039928: f000 83c0 beq.w 803a0ac } } #endif /* CHECKSUM_CHECK_TCP */ /* sanity-check header length */ hdrlen_bytes = TCPH_HDRLEN_BYTES(tcphdr); - 80398a8: 4b8d ldr r3, [pc, #564] ; (8039ae0 ) - 80398aa: 681b ldr r3, [r3, #0] - 80398ac: 899b ldrh r3, [r3, #12] - 80398ae: b29b uxth r3, r3 - 80398b0: 4618 mov r0, r3 - 80398b2: f7fc fb11 bl 8035ed8 - 80398b6: 4603 mov r3, r0 - 80398b8: 0b1b lsrs r3, r3, #12 - 80398ba: b29b uxth r3, r3 - 80398bc: b2db uxtb r3, r3 - 80398be: 009b lsls r3, r3, #2 - 80398c0: 74bb strb r3, [r7, #18] + 803992c: 4b8d ldr r3, [pc, #564] ; (8039b64 ) + 803992e: 681b ldr r3, [r3, #0] + 8039930: 899b ldrh r3, [r3, #12] + 8039932: b29b uxth r3, r3 + 8039934: 4618 mov r0, r3 + 8039936: f7fc fb11 bl 8035f5c + 803993a: 4603 mov r3, r0 + 803993c: 0b1b lsrs r3, r3, #12 + 803993e: b29b uxth r3, r3 + 8039940: b2db uxtb r3, r3 + 8039942: 009b lsls r3, r3, #2 + 8039944: 74bb strb r3, [r7, #18] if ((hdrlen_bytes < TCP_HLEN) || (hdrlen_bytes > p->tot_len)) { - 80398c2: 7cbb ldrb r3, [r7, #18] - 80398c4: 2b13 cmp r3, #19 - 80398c6: f240 83b1 bls.w 803a02c - 80398ca: 7cbb ldrb r3, [r7, #18] - 80398cc: b29a uxth r2, r3 - 80398ce: 687b ldr r3, [r7, #4] - 80398d0: 891b ldrh r3, [r3, #8] - 80398d2: 429a cmp r2, r3 - 80398d4: f200 83aa bhi.w 803a02c + 8039946: 7cbb ldrb r3, [r7, #18] + 8039948: 2b13 cmp r3, #19 + 803994a: f240 83b1 bls.w 803a0b0 + 803994e: 7cbb ldrb r3, [r7, #18] + 8039950: b29a uxth r2, r3 + 8039952: 687b ldr r3, [r7, #4] + 8039954: 891b ldrh r3, [r3, #8] + 8039956: 429a cmp r2, r3 + 8039958: f200 83aa bhi.w 803a0b0 goto dropped; } /* Move the payload pointer in the pbuf so that it points to the TCP data instead of the TCP header. */ tcphdr_optlen = (u16_t)(hdrlen_bytes - TCP_HLEN); - 80398d8: 7cbb ldrb r3, [r7, #18] - 80398da: b29b uxth r3, r3 - 80398dc: 3b14 subs r3, #20 - 80398de: b29a uxth r2, r3 - 80398e0: 4b81 ldr r3, [pc, #516] ; (8039ae8 ) - 80398e2: 801a strh r2, [r3, #0] + 803995c: 7cbb ldrb r3, [r7, #18] + 803995e: b29b uxth r3, r3 + 8039960: 3b14 subs r3, #20 + 8039962: b29a uxth r2, r3 + 8039964: 4b81 ldr r3, [pc, #516] ; (8039b6c ) + 8039966: 801a strh r2, [r3, #0] tcphdr_opt2 = NULL; - 80398e4: 4b81 ldr r3, [pc, #516] ; (8039aec ) - 80398e6: 2200 movs r2, #0 - 80398e8: 601a str r2, [r3, #0] + 8039968: 4b81 ldr r3, [pc, #516] ; (8039b70 ) + 803996a: 2200 movs r2, #0 + 803996c: 601a str r2, [r3, #0] if (p->len >= hdrlen_bytes) { - 80398ea: 687b ldr r3, [r7, #4] - 80398ec: 895a ldrh r2, [r3, #10] - 80398ee: 7cbb ldrb r3, [r7, #18] - 80398f0: b29b uxth r3, r3 - 80398f2: 429a cmp r2, r3 - 80398f4: d309 bcc.n 803990a + 803996e: 687b ldr r3, [r7, #4] + 8039970: 895a ldrh r2, [r3, #10] + 8039972: 7cbb ldrb r3, [r7, #18] + 8039974: b29b uxth r3, r3 + 8039976: 429a cmp r2, r3 + 8039978: d309 bcc.n 803998e /* all options are in the first pbuf */ tcphdr_opt1len = tcphdr_optlen; - 80398f6: 4b7c ldr r3, [pc, #496] ; (8039ae8 ) - 80398f8: 881a ldrh r2, [r3, #0] - 80398fa: 4b7d ldr r3, [pc, #500] ; (8039af0 ) - 80398fc: 801a strh r2, [r3, #0] + 803997a: 4b7c ldr r3, [pc, #496] ; (8039b6c ) + 803997c: 881a ldrh r2, [r3, #0] + 803997e: 4b7d ldr r3, [pc, #500] ; (8039b74 ) + 8039980: 801a strh r2, [r3, #0] pbuf_remove_header(p, hdrlen_bytes); /* cannot fail */ - 80398fe: 7cbb ldrb r3, [r7, #18] - 8039900: 4619 mov r1, r3 - 8039902: 6878 ldr r0, [r7, #4] - 8039904: f7fd fe94 bl 8037630 - 8039908: e04e b.n 80399a8 + 8039982: 7cbb ldrb r3, [r7, #18] + 8039984: 4619 mov r1, r3 + 8039986: 6878 ldr r0, [r7, #4] + 8039988: f7fd fe94 bl 80376b4 + 803998c: e04e b.n 8039a2c } else { u16_t opt2len; /* TCP header fits into first pbuf, options don't - data is in the next pbuf */ /* there must be a next pbuf, due to hdrlen_bytes sanity check above */ LWIP_ASSERT("p->next != NULL", p->next != NULL); - 803990a: 687b ldr r3, [r7, #4] - 803990c: 681b ldr r3, [r3, #0] - 803990e: 2b00 cmp r3, #0 - 8039910: d105 bne.n 803991e - 8039912: 4b70 ldr r3, [pc, #448] ; (8039ad4 ) - 8039914: 22c2 movs r2, #194 ; 0xc2 - 8039916: 4977 ldr r1, [pc, #476] ; (8039af4 ) - 8039918: 4870 ldr r0, [pc, #448] ; (8039adc ) - 803991a: f007 f8f9 bl 8040b10 + 803998e: 687b ldr r3, [r7, #4] + 8039990: 681b ldr r3, [r3, #0] + 8039992: 2b00 cmp r3, #0 + 8039994: d105 bne.n 80399a2 + 8039996: 4b70 ldr r3, [pc, #448] ; (8039b58 ) + 8039998: 22c2 movs r2, #194 ; 0xc2 + 803999a: 4977 ldr r1, [pc, #476] ; (8039b78 ) + 803999c: 4870 ldr r0, [pc, #448] ; (8039b60 ) + 803999e: f007 f8f9 bl 8040b94 /* advance over the TCP header (cannot fail) */ pbuf_remove_header(p, TCP_HLEN); - 803991e: 2114 movs r1, #20 - 8039920: 6878 ldr r0, [r7, #4] - 8039922: f7fd fe85 bl 8037630 + 80399a2: 2114 movs r1, #20 + 80399a4: 6878 ldr r0, [r7, #4] + 80399a6: f7fd fe85 bl 80376b4 /* determine how long the first and second parts of the options are */ tcphdr_opt1len = p->len; - 8039926: 687b ldr r3, [r7, #4] - 8039928: 895a ldrh r2, [r3, #10] - 803992a: 4b71 ldr r3, [pc, #452] ; (8039af0 ) - 803992c: 801a strh r2, [r3, #0] + 80399aa: 687b ldr r3, [r7, #4] + 80399ac: 895a ldrh r2, [r3, #10] + 80399ae: 4b71 ldr r3, [pc, #452] ; (8039b74 ) + 80399b0: 801a strh r2, [r3, #0] opt2len = (u16_t)(tcphdr_optlen - tcphdr_opt1len); - 803992e: 4b6e ldr r3, [pc, #440] ; (8039ae8 ) - 8039930: 881a ldrh r2, [r3, #0] - 8039932: 4b6f ldr r3, [pc, #444] ; (8039af0 ) - 8039934: 881b ldrh r3, [r3, #0] - 8039936: 1ad3 subs r3, r2, r3 - 8039938: 823b strh r3, [r7, #16] + 80399b2: 4b6e ldr r3, [pc, #440] ; (8039b6c ) + 80399b4: 881a ldrh r2, [r3, #0] + 80399b6: 4b6f ldr r3, [pc, #444] ; (8039b74 ) + 80399b8: 881b ldrh r3, [r3, #0] + 80399ba: 1ad3 subs r3, r2, r3 + 80399bc: 823b strh r3, [r7, #16] /* options continue in the next pbuf: set p to zero length and hide the options in the next pbuf (adjusting p->tot_len) */ pbuf_remove_header(p, tcphdr_opt1len); - 803993a: 4b6d ldr r3, [pc, #436] ; (8039af0 ) - 803993c: 881b ldrh r3, [r3, #0] - 803993e: 4619 mov r1, r3 - 8039940: 6878 ldr r0, [r7, #4] - 8039942: f7fd fe75 bl 8037630 + 80399be: 4b6d ldr r3, [pc, #436] ; (8039b74 ) + 80399c0: 881b ldrh r3, [r3, #0] + 80399c2: 4619 mov r1, r3 + 80399c4: 6878 ldr r0, [r7, #4] + 80399c6: f7fd fe75 bl 80376b4 /* check that the options fit in the second pbuf */ if (opt2len > p->next->len) { - 8039946: 687b ldr r3, [r7, #4] - 8039948: 681b ldr r3, [r3, #0] - 803994a: 895b ldrh r3, [r3, #10] - 803994c: 8a3a ldrh r2, [r7, #16] - 803994e: 429a cmp r2, r3 - 8039950: f200 836e bhi.w 803a030 + 80399ca: 687b ldr r3, [r7, #4] + 80399cc: 681b ldr r3, [r3, #0] + 80399ce: 895b ldrh r3, [r3, #10] + 80399d0: 8a3a ldrh r2, [r7, #16] + 80399d2: 429a cmp r2, r3 + 80399d4: f200 836e bhi.w 803a0b4 TCP_STATS_INC(tcp.lenerr); goto dropped; } /* remember the pointer to the second part of the options */ tcphdr_opt2 = (u8_t *)p->next->payload; - 8039954: 687b ldr r3, [r7, #4] - 8039956: 681b ldr r3, [r3, #0] - 8039958: 685b ldr r3, [r3, #4] - 803995a: 4a64 ldr r2, [pc, #400] ; (8039aec ) - 803995c: 6013 str r3, [r2, #0] + 80399d8: 687b ldr r3, [r7, #4] + 80399da: 681b ldr r3, [r3, #0] + 80399dc: 685b ldr r3, [r3, #4] + 80399de: 4a64 ldr r2, [pc, #400] ; (8039b70 ) + 80399e0: 6013 str r3, [r2, #0] /* advance p->next to point after the options, and manually adjust p->tot_len to keep it consistent with the changed p->next */ pbuf_remove_header(p->next, opt2len); - 803995e: 687b ldr r3, [r7, #4] - 8039960: 681b ldr r3, [r3, #0] - 8039962: 8a3a ldrh r2, [r7, #16] - 8039964: 4611 mov r1, r2 - 8039966: 4618 mov r0, r3 - 8039968: f7fd fe62 bl 8037630 + 80399e2: 687b ldr r3, [r7, #4] + 80399e4: 681b ldr r3, [r3, #0] + 80399e6: 8a3a ldrh r2, [r7, #16] + 80399e8: 4611 mov r1, r2 + 80399ea: 4618 mov r0, r3 + 80399ec: f7fd fe62 bl 80376b4 p->tot_len = (u16_t)(p->tot_len - opt2len); - 803996c: 687b ldr r3, [r7, #4] - 803996e: 891a ldrh r2, [r3, #8] - 8039970: 8a3b ldrh r3, [r7, #16] - 8039972: 1ad3 subs r3, r2, r3 - 8039974: b29a uxth r2, r3 - 8039976: 687b ldr r3, [r7, #4] - 8039978: 811a strh r2, [r3, #8] + 80399f0: 687b ldr r3, [r7, #4] + 80399f2: 891a ldrh r2, [r3, #8] + 80399f4: 8a3b ldrh r3, [r7, #16] + 80399f6: 1ad3 subs r3, r2, r3 + 80399f8: b29a uxth r2, r3 + 80399fa: 687b ldr r3, [r7, #4] + 80399fc: 811a strh r2, [r3, #8] LWIP_ASSERT("p->len == 0", p->len == 0); - 803997a: 687b ldr r3, [r7, #4] - 803997c: 895b ldrh r3, [r3, #10] - 803997e: 2b00 cmp r3, #0 - 8039980: d005 beq.n 803998e - 8039982: 4b54 ldr r3, [pc, #336] ; (8039ad4 ) - 8039984: 22df movs r2, #223 ; 0xdf - 8039986: 495c ldr r1, [pc, #368] ; (8039af8 ) - 8039988: 4854 ldr r0, [pc, #336] ; (8039adc ) - 803998a: f007 f8c1 bl 8040b10 + 80399fe: 687b ldr r3, [r7, #4] + 8039a00: 895b ldrh r3, [r3, #10] + 8039a02: 2b00 cmp r3, #0 + 8039a04: d005 beq.n 8039a12 + 8039a06: 4b54 ldr r3, [pc, #336] ; (8039b58 ) + 8039a08: 22df movs r2, #223 ; 0xdf + 8039a0a: 495c ldr r1, [pc, #368] ; (8039b7c ) + 8039a0c: 4854 ldr r0, [pc, #336] ; (8039b60 ) + 8039a0e: f007 f8c1 bl 8040b94 LWIP_ASSERT("p->tot_len == p->next->tot_len", p->tot_len == p->next->tot_len); - 803998e: 687b ldr r3, [r7, #4] - 8039990: 891a ldrh r2, [r3, #8] - 8039992: 687b ldr r3, [r7, #4] - 8039994: 681b ldr r3, [r3, #0] - 8039996: 891b ldrh r3, [r3, #8] - 8039998: 429a cmp r2, r3 - 803999a: d005 beq.n 80399a8 - 803999c: 4b4d ldr r3, [pc, #308] ; (8039ad4 ) - 803999e: 22e0 movs r2, #224 ; 0xe0 - 80399a0: 4956 ldr r1, [pc, #344] ; (8039afc ) - 80399a2: 484e ldr r0, [pc, #312] ; (8039adc ) - 80399a4: f007 f8b4 bl 8040b10 + 8039a12: 687b ldr r3, [r7, #4] + 8039a14: 891a ldrh r2, [r3, #8] + 8039a16: 687b ldr r3, [r7, #4] + 8039a18: 681b ldr r3, [r3, #0] + 8039a1a: 891b ldrh r3, [r3, #8] + 8039a1c: 429a cmp r2, r3 + 8039a1e: d005 beq.n 8039a2c + 8039a20: 4b4d ldr r3, [pc, #308] ; (8039b58 ) + 8039a22: 22e0 movs r2, #224 ; 0xe0 + 8039a24: 4956 ldr r1, [pc, #344] ; (8039b80 ) + 8039a26: 484e ldr r0, [pc, #312] ; (8039b60 ) + 8039a28: f007 f8b4 bl 8040b94 } /* Convert fields in TCP header to host byte order. */ tcphdr->src = lwip_ntohs(tcphdr->src); - 80399a8: 4b4d ldr r3, [pc, #308] ; (8039ae0 ) - 80399aa: 681b ldr r3, [r3, #0] - 80399ac: 881b ldrh r3, [r3, #0] - 80399ae: b29b uxth r3, r3 - 80399b0: 4a4b ldr r2, [pc, #300] ; (8039ae0 ) - 80399b2: 6814 ldr r4, [r2, #0] - 80399b4: 4618 mov r0, r3 - 80399b6: f7fc fa8f bl 8035ed8 - 80399ba: 4603 mov r3, r0 - 80399bc: 8023 strh r3, [r4, #0] + 8039a2c: 4b4d ldr r3, [pc, #308] ; (8039b64 ) + 8039a2e: 681b ldr r3, [r3, #0] + 8039a30: 881b ldrh r3, [r3, #0] + 8039a32: b29b uxth r3, r3 + 8039a34: 4a4b ldr r2, [pc, #300] ; (8039b64 ) + 8039a36: 6814 ldr r4, [r2, #0] + 8039a38: 4618 mov r0, r3 + 8039a3a: f7fc fa8f bl 8035f5c + 8039a3e: 4603 mov r3, r0 + 8039a40: 8023 strh r3, [r4, #0] tcphdr->dest = lwip_ntohs(tcphdr->dest); - 80399be: 4b48 ldr r3, [pc, #288] ; (8039ae0 ) - 80399c0: 681b ldr r3, [r3, #0] - 80399c2: 885b ldrh r3, [r3, #2] - 80399c4: b29b uxth r3, r3 - 80399c6: 4a46 ldr r2, [pc, #280] ; (8039ae0 ) - 80399c8: 6814 ldr r4, [r2, #0] - 80399ca: 4618 mov r0, r3 - 80399cc: f7fc fa84 bl 8035ed8 - 80399d0: 4603 mov r3, r0 - 80399d2: 8063 strh r3, [r4, #2] + 8039a42: 4b48 ldr r3, [pc, #288] ; (8039b64 ) + 8039a44: 681b ldr r3, [r3, #0] + 8039a46: 885b ldrh r3, [r3, #2] + 8039a48: b29b uxth r3, r3 + 8039a4a: 4a46 ldr r2, [pc, #280] ; (8039b64 ) + 8039a4c: 6814 ldr r4, [r2, #0] + 8039a4e: 4618 mov r0, r3 + 8039a50: f7fc fa84 bl 8035f5c + 8039a54: 4603 mov r3, r0 + 8039a56: 8063 strh r3, [r4, #2] seqno = tcphdr->seqno = lwip_ntohl(tcphdr->seqno); - 80399d4: 4b42 ldr r3, [pc, #264] ; (8039ae0 ) - 80399d6: 681b ldr r3, [r3, #0] - 80399d8: 685b ldr r3, [r3, #4] - 80399da: 4a41 ldr r2, [pc, #260] ; (8039ae0 ) - 80399dc: 6814 ldr r4, [r2, #0] - 80399de: 4618 mov r0, r3 - 80399e0: f7fc fa8f bl 8035f02 - 80399e4: 4603 mov r3, r0 - 80399e6: 6063 str r3, [r4, #4] - 80399e8: 6863 ldr r3, [r4, #4] - 80399ea: 4a45 ldr r2, [pc, #276] ; (8039b00 ) - 80399ec: 6013 str r3, [r2, #0] + 8039a58: 4b42 ldr r3, [pc, #264] ; (8039b64 ) + 8039a5a: 681b ldr r3, [r3, #0] + 8039a5c: 685b ldr r3, [r3, #4] + 8039a5e: 4a41 ldr r2, [pc, #260] ; (8039b64 ) + 8039a60: 6814 ldr r4, [r2, #0] + 8039a62: 4618 mov r0, r3 + 8039a64: f7fc fa8f bl 8035f86 + 8039a68: 4603 mov r3, r0 + 8039a6a: 6063 str r3, [r4, #4] + 8039a6c: 6863 ldr r3, [r4, #4] + 8039a6e: 4a45 ldr r2, [pc, #276] ; (8039b84 ) + 8039a70: 6013 str r3, [r2, #0] ackno = tcphdr->ackno = lwip_ntohl(tcphdr->ackno); - 80399ee: 4b3c ldr r3, [pc, #240] ; (8039ae0 ) - 80399f0: 681b ldr r3, [r3, #0] - 80399f2: 689b ldr r3, [r3, #8] - 80399f4: 4a3a ldr r2, [pc, #232] ; (8039ae0 ) - 80399f6: 6814 ldr r4, [r2, #0] - 80399f8: 4618 mov r0, r3 - 80399fa: f7fc fa82 bl 8035f02 - 80399fe: 4603 mov r3, r0 - 8039a00: 60a3 str r3, [r4, #8] - 8039a02: 68a3 ldr r3, [r4, #8] - 8039a04: 4a3f ldr r2, [pc, #252] ; (8039b04 ) - 8039a06: 6013 str r3, [r2, #0] + 8039a72: 4b3c ldr r3, [pc, #240] ; (8039b64 ) + 8039a74: 681b ldr r3, [r3, #0] + 8039a76: 689b ldr r3, [r3, #8] + 8039a78: 4a3a ldr r2, [pc, #232] ; (8039b64 ) + 8039a7a: 6814 ldr r4, [r2, #0] + 8039a7c: 4618 mov r0, r3 + 8039a7e: f7fc fa82 bl 8035f86 + 8039a82: 4603 mov r3, r0 + 8039a84: 60a3 str r3, [r4, #8] + 8039a86: 68a3 ldr r3, [r4, #8] + 8039a88: 4a3f ldr r2, [pc, #252] ; (8039b88 ) + 8039a8a: 6013 str r3, [r2, #0] tcphdr->wnd = lwip_ntohs(tcphdr->wnd); - 8039a08: 4b35 ldr r3, [pc, #212] ; (8039ae0 ) - 8039a0a: 681b ldr r3, [r3, #0] - 8039a0c: 89db ldrh r3, [r3, #14] - 8039a0e: b29b uxth r3, r3 - 8039a10: 4a33 ldr r2, [pc, #204] ; (8039ae0 ) - 8039a12: 6814 ldr r4, [r2, #0] - 8039a14: 4618 mov r0, r3 - 8039a16: f7fc fa5f bl 8035ed8 - 8039a1a: 4603 mov r3, r0 - 8039a1c: 81e3 strh r3, [r4, #14] + 8039a8c: 4b35 ldr r3, [pc, #212] ; (8039b64 ) + 8039a8e: 681b ldr r3, [r3, #0] + 8039a90: 89db ldrh r3, [r3, #14] + 8039a92: b29b uxth r3, r3 + 8039a94: 4a33 ldr r2, [pc, #204] ; (8039b64 ) + 8039a96: 6814 ldr r4, [r2, #0] + 8039a98: 4618 mov r0, r3 + 8039a9a: f7fc fa5f bl 8035f5c + 8039a9e: 4603 mov r3, r0 + 8039aa0: 81e3 strh r3, [r4, #14] flags = TCPH_FLAGS(tcphdr); - 8039a1e: 4b30 ldr r3, [pc, #192] ; (8039ae0 ) - 8039a20: 681b ldr r3, [r3, #0] - 8039a22: 899b ldrh r3, [r3, #12] - 8039a24: b29b uxth r3, r3 - 8039a26: 4618 mov r0, r3 - 8039a28: f7fc fa56 bl 8035ed8 - 8039a2c: 4603 mov r3, r0 - 8039a2e: b2db uxtb r3, r3 - 8039a30: f003 033f and.w r3, r3, #63 ; 0x3f - 8039a34: b2da uxtb r2, r3 - 8039a36: 4b34 ldr r3, [pc, #208] ; (8039b08 ) - 8039a38: 701a strb r2, [r3, #0] + 8039aa2: 4b30 ldr r3, [pc, #192] ; (8039b64 ) + 8039aa4: 681b ldr r3, [r3, #0] + 8039aa6: 899b ldrh r3, [r3, #12] + 8039aa8: b29b uxth r3, r3 + 8039aaa: 4618 mov r0, r3 + 8039aac: f7fc fa56 bl 8035f5c + 8039ab0: 4603 mov r3, r0 + 8039ab2: b2db uxtb r3, r3 + 8039ab4: f003 033f and.w r3, r3, #63 ; 0x3f + 8039ab8: b2da uxtb r2, r3 + 8039aba: 4b34 ldr r3, [pc, #208] ; (8039b8c ) + 8039abc: 701a strb r2, [r3, #0] tcplen = p->tot_len; - 8039a3a: 687b ldr r3, [r7, #4] - 8039a3c: 891a ldrh r2, [r3, #8] - 8039a3e: 4b33 ldr r3, [pc, #204] ; (8039b0c ) - 8039a40: 801a strh r2, [r3, #0] + 8039abe: 687b ldr r3, [r7, #4] + 8039ac0: 891a ldrh r2, [r3, #8] + 8039ac2: 4b33 ldr r3, [pc, #204] ; (8039b90 ) + 8039ac4: 801a strh r2, [r3, #0] if (flags & (TCP_FIN | TCP_SYN)) { - 8039a42: 4b31 ldr r3, [pc, #196] ; (8039b08 ) - 8039a44: 781b ldrb r3, [r3, #0] - 8039a46: f003 0303 and.w r3, r3, #3 - 8039a4a: 2b00 cmp r3, #0 - 8039a4c: d00c beq.n 8039a68 + 8039ac6: 4b31 ldr r3, [pc, #196] ; (8039b8c ) + 8039ac8: 781b ldrb r3, [r3, #0] + 8039aca: f003 0303 and.w r3, r3, #3 + 8039ace: 2b00 cmp r3, #0 + 8039ad0: d00c beq.n 8039aec tcplen++; - 8039a4e: 4b2f ldr r3, [pc, #188] ; (8039b0c ) - 8039a50: 881b ldrh r3, [r3, #0] - 8039a52: 3301 adds r3, #1 - 8039a54: b29a uxth r2, r3 - 8039a56: 4b2d ldr r3, [pc, #180] ; (8039b0c ) - 8039a58: 801a strh r2, [r3, #0] + 8039ad2: 4b2f ldr r3, [pc, #188] ; (8039b90 ) + 8039ad4: 881b ldrh r3, [r3, #0] + 8039ad6: 3301 adds r3, #1 + 8039ad8: b29a uxth r2, r3 + 8039ada: 4b2d ldr r3, [pc, #180] ; (8039b90 ) + 8039adc: 801a strh r2, [r3, #0] if (tcplen < p->tot_len) { - 8039a5a: 687b ldr r3, [r7, #4] - 8039a5c: 891a ldrh r2, [r3, #8] - 8039a5e: 4b2b ldr r3, [pc, #172] ; (8039b0c ) - 8039a60: 881b ldrh r3, [r3, #0] - 8039a62: 429a cmp r2, r3 - 8039a64: f200 82e6 bhi.w 803a034 + 8039ade: 687b ldr r3, [r7, #4] + 8039ae0: 891a ldrh r2, [r3, #8] + 8039ae2: 4b2b ldr r3, [pc, #172] ; (8039b90 ) + 8039ae4: 881b ldrh r3, [r3, #0] + 8039ae6: 429a cmp r2, r3 + 8039ae8: f200 82e6 bhi.w 803a0b8 } } /* Demultiplex an incoming segment. First, we check if it is destined for an active connection. */ prev = NULL; - 8039a68: 2300 movs r3, #0 - 8039a6a: 61bb str r3, [r7, #24] + 8039aec: 2300 movs r3, #0 + 8039aee: 61bb str r3, [r7, #24] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 8039a6c: 4b28 ldr r3, [pc, #160] ; (8039b10 ) - 8039a6e: 681b ldr r3, [r3, #0] - 8039a70: 61fb str r3, [r7, #28] - 8039a72: e09d b.n 8039bb0 + 8039af0: 4b28 ldr r3, [pc, #160] ; (8039b94 ) + 8039af2: 681b ldr r3, [r3, #0] + 8039af4: 61fb str r3, [r7, #28] + 8039af6: e09d b.n 8039c34 LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED); - 8039a74: 69fb ldr r3, [r7, #28] - 8039a76: 7d1b ldrb r3, [r3, #20] - 8039a78: 2b00 cmp r3, #0 - 8039a7a: d105 bne.n 8039a88 - 8039a7c: 4b15 ldr r3, [pc, #84] ; (8039ad4 ) - 8039a7e: 22fb movs r2, #251 ; 0xfb - 8039a80: 4924 ldr r1, [pc, #144] ; (8039b14 ) - 8039a82: 4816 ldr r0, [pc, #88] ; (8039adc ) - 8039a84: f007 f844 bl 8040b10 + 8039af8: 69fb ldr r3, [r7, #28] + 8039afa: 7d1b ldrb r3, [r3, #20] + 8039afc: 2b00 cmp r3, #0 + 8039afe: d105 bne.n 8039b0c + 8039b00: 4b15 ldr r3, [pc, #84] ; (8039b58 ) + 8039b02: 22fb movs r2, #251 ; 0xfb + 8039b04: 4924 ldr r1, [pc, #144] ; (8039b98 ) + 8039b06: 4816 ldr r0, [pc, #88] ; (8039b60 ) + 8039b08: f007 f844 bl 8040b94 LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); - 8039a88: 69fb ldr r3, [r7, #28] - 8039a8a: 7d1b ldrb r3, [r3, #20] - 8039a8c: 2b0a cmp r3, #10 - 8039a8e: d105 bne.n 8039a9c - 8039a90: 4b10 ldr r3, [pc, #64] ; (8039ad4 ) - 8039a92: 22fc movs r2, #252 ; 0xfc - 8039a94: 4920 ldr r1, [pc, #128] ; (8039b18 ) - 8039a96: 4811 ldr r0, [pc, #68] ; (8039adc ) - 8039a98: f007 f83a bl 8040b10 + 8039b0c: 69fb ldr r3, [r7, #28] + 8039b0e: 7d1b ldrb r3, [r3, #20] + 8039b10: 2b0a cmp r3, #10 + 8039b12: d105 bne.n 8039b20 + 8039b14: 4b10 ldr r3, [pc, #64] ; (8039b58 ) + 8039b16: 22fc movs r2, #252 ; 0xfc + 8039b18: 4920 ldr r1, [pc, #128] ; (8039b9c ) + 8039b1a: 4811 ldr r0, [pc, #68] ; (8039b60 ) + 8039b1c: f007 f83a bl 8040b94 LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN); - 8039a9c: 69fb ldr r3, [r7, #28] - 8039a9e: 7d1b ldrb r3, [r3, #20] - 8039aa0: 2b01 cmp r3, #1 - 8039aa2: d105 bne.n 8039ab0 - 8039aa4: 4b0b ldr r3, [pc, #44] ; (8039ad4 ) - 8039aa6: 22fd movs r2, #253 ; 0xfd - 8039aa8: 491c ldr r1, [pc, #112] ; (8039b1c ) - 8039aaa: 480c ldr r0, [pc, #48] ; (8039adc ) - 8039aac: f007 f830 bl 8040b10 + 8039b20: 69fb ldr r3, [r7, #28] + 8039b22: 7d1b ldrb r3, [r3, #20] + 8039b24: 2b01 cmp r3, #1 + 8039b26: d105 bne.n 8039b34 + 8039b28: 4b0b ldr r3, [pc, #44] ; (8039b58 ) + 8039b2a: 22fd movs r2, #253 ; 0xfd + 8039b2c: 491c ldr r1, [pc, #112] ; (8039ba0 ) + 8039b2e: 480c ldr r0, [pc, #48] ; (8039b60 ) + 8039b30: f007 f830 bl 8040b94 /* check if PCB is bound to specific netif */ if ((pcb->netif_idx != NETIF_NO_INDEX) && - 8039ab0: 69fb ldr r3, [r7, #28] - 8039ab2: 7a1b ldrb r3, [r3, #8] - 8039ab4: 2b00 cmp r3, #0 - 8039ab6: d033 beq.n 8039b20 + 8039b34: 69fb ldr r3, [r7, #28] + 8039b36: 7a1b ldrb r3, [r3, #8] + 8039b38: 2b00 cmp r3, #0 + 8039b3a: d033 beq.n 8039ba4 (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) { - 8039ab8: 69fb ldr r3, [r7, #28] - 8039aba: 7a1a ldrb r2, [r3, #8] - 8039abc: 4b09 ldr r3, [pc, #36] ; (8039ae4 ) - 8039abe: 685b ldr r3, [r3, #4] - 8039ac0: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8039ac4: 3301 adds r3, #1 - 8039ac6: b2db uxtb r3, r3 + 8039b3c: 69fb ldr r3, [r7, #28] + 8039b3e: 7a1a ldrb r2, [r3, #8] + 8039b40: 4b09 ldr r3, [pc, #36] ; (8039b68 ) + 8039b42: 685b ldr r3, [r3, #4] + 8039b44: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8039b48: 3301 adds r3, #1 + 8039b4a: b2db uxtb r3, r3 if ((pcb->netif_idx != NETIF_NO_INDEX) && - 8039ac8: 429a cmp r2, r3 - 8039aca: d029 beq.n 8039b20 + 8039b4c: 429a cmp r2, r3 + 8039b4e: d029 beq.n 8039ba4 prev = pcb; - 8039acc: 69fb ldr r3, [r7, #28] - 8039ace: 61bb str r3, [r7, #24] + 8039b50: 69fb ldr r3, [r7, #28] + 8039b52: 61bb str r3, [r7, #24] continue; - 8039ad0: e06b b.n 8039baa - 8039ad2: bf00 nop - 8039ad4: 08043500 .word 0x08043500 - 8039ad8: 08043534 .word 0x08043534 - 8039adc: 0804354c .word 0x0804354c - 8039ae0: 2400e980 .word 0x2400e980 - 8039ae4: 2400b9bc .word 0x2400b9bc - 8039ae8: 2400e984 .word 0x2400e984 - 8039aec: 2400e988 .word 0x2400e988 - 8039af0: 2400e986 .word 0x2400e986 - 8039af4: 08043574 .word 0x08043574 - 8039af8: 08043584 .word 0x08043584 - 8039afc: 08043590 .word 0x08043590 - 8039b00: 2400e990 .word 0x2400e990 - 8039b04: 2400e994 .word 0x2400e994 - 8039b08: 2400e99c .word 0x2400e99c - 8039b0c: 2400e99a .word 0x2400e99a - 8039b10: 2400e964 .word 0x2400e964 - 8039b14: 080435b0 .word 0x080435b0 - 8039b18: 080435d8 .word 0x080435d8 - 8039b1c: 08043604 .word 0x08043604 + 8039b54: e06b b.n 8039c2e + 8039b56: bf00 nop + 8039b58: 08043580 .word 0x08043580 + 8039b5c: 080435b4 .word 0x080435b4 + 8039b60: 080435cc .word 0x080435cc + 8039b64: 2400e988 .word 0x2400e988 + 8039b68: 2400b9c4 .word 0x2400b9c4 + 8039b6c: 2400e98c .word 0x2400e98c + 8039b70: 2400e990 .word 0x2400e990 + 8039b74: 2400e98e .word 0x2400e98e + 8039b78: 080435f4 .word 0x080435f4 + 8039b7c: 08043604 .word 0x08043604 + 8039b80: 08043610 .word 0x08043610 + 8039b84: 2400e998 .word 0x2400e998 + 8039b88: 2400e99c .word 0x2400e99c + 8039b8c: 2400e9a4 .word 0x2400e9a4 + 8039b90: 2400e9a2 .word 0x2400e9a2 + 8039b94: 2400e96c .word 0x2400e96c + 8039b98: 08043630 .word 0x08043630 + 8039b9c: 08043658 .word 0x08043658 + 8039ba0: 08043684 .word 0x08043684 } if (pcb->remote_port == tcphdr->src && - 8039b20: 69fb ldr r3, [r7, #28] - 8039b22: 8b1a ldrh r2, [r3, #24] - 8039b24: 4b72 ldr r3, [pc, #456] ; (8039cf0 ) - 8039b26: 681b ldr r3, [r3, #0] - 8039b28: 881b ldrh r3, [r3, #0] - 8039b2a: b29b uxth r3, r3 - 8039b2c: 429a cmp r2, r3 - 8039b2e: d13a bne.n 8039ba6 + 8039ba4: 69fb ldr r3, [r7, #28] + 8039ba6: 8b1a ldrh r2, [r3, #24] + 8039ba8: 4b72 ldr r3, [pc, #456] ; (8039d74 ) + 8039baa: 681b ldr r3, [r3, #0] + 8039bac: 881b ldrh r3, [r3, #0] + 8039bae: b29b uxth r3, r3 + 8039bb0: 429a cmp r2, r3 + 8039bb2: d13a bne.n 8039c2a pcb->local_port == tcphdr->dest && - 8039b30: 69fb ldr r3, [r7, #28] - 8039b32: 8ada ldrh r2, [r3, #22] - 8039b34: 4b6e ldr r3, [pc, #440] ; (8039cf0 ) - 8039b36: 681b ldr r3, [r3, #0] - 8039b38: 885b ldrh r3, [r3, #2] - 8039b3a: b29b uxth r3, r3 + 8039bb4: 69fb ldr r3, [r7, #28] + 8039bb6: 8ada ldrh r2, [r3, #22] + 8039bb8: 4b6e ldr r3, [pc, #440] ; (8039d74 ) + 8039bba: 681b ldr r3, [r3, #0] + 8039bbc: 885b ldrh r3, [r3, #2] + 8039bbe: b29b uxth r3, r3 if (pcb->remote_port == tcphdr->src && - 8039b3c: 429a cmp r2, r3 - 8039b3e: d132 bne.n 8039ba6 + 8039bc0: 429a cmp r2, r3 + 8039bc2: d132 bne.n 8039c2a ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) && - 8039b40: 69fb ldr r3, [r7, #28] - 8039b42: 685a ldr r2, [r3, #4] - 8039b44: 4b6b ldr r3, [pc, #428] ; (8039cf4 ) - 8039b46: 691b ldr r3, [r3, #16] + 8039bc4: 69fb ldr r3, [r7, #28] + 8039bc6: 685a ldr r2, [r3, #4] + 8039bc8: 4b6b ldr r3, [pc, #428] ; (8039d78 ) + 8039bca: 691b ldr r3, [r3, #16] pcb->local_port == tcphdr->dest && - 8039b48: 429a cmp r2, r3 - 8039b4a: d12c bne.n 8039ba6 + 8039bcc: 429a cmp r2, r3 + 8039bce: d12c bne.n 8039c2a ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) { - 8039b4c: 69fb ldr r3, [r7, #28] - 8039b4e: 681a ldr r2, [r3, #0] - 8039b50: 4b68 ldr r3, [pc, #416] ; (8039cf4 ) - 8039b52: 695b ldr r3, [r3, #20] + 8039bd0: 69fb ldr r3, [r7, #28] + 8039bd2: 681a ldr r2, [r3, #0] + 8039bd4: 4b68 ldr r3, [pc, #416] ; (8039d78 ) + 8039bd6: 695b ldr r3, [r3, #20] ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) && - 8039b54: 429a cmp r2, r3 - 8039b56: d126 bne.n 8039ba6 + 8039bd8: 429a cmp r2, r3 + 8039bda: d126 bne.n 8039c2a /* Move this PCB to the front of the list so that subsequent lookups will be faster (we exploit locality in TCP segment arrivals). */ LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb); - 8039b58: 69fb ldr r3, [r7, #28] - 8039b5a: 68db ldr r3, [r3, #12] - 8039b5c: 69fa ldr r2, [r7, #28] - 8039b5e: 429a cmp r2, r3 - 8039b60: d106 bne.n 8039b70 - 8039b62: 4b65 ldr r3, [pc, #404] ; (8039cf8 ) - 8039b64: f240 120d movw r2, #269 ; 0x10d - 8039b68: 4964 ldr r1, [pc, #400] ; (8039cfc ) - 8039b6a: 4865 ldr r0, [pc, #404] ; (8039d00 ) - 8039b6c: f006 ffd0 bl 8040b10 + 8039bdc: 69fb ldr r3, [r7, #28] + 8039bde: 68db ldr r3, [r3, #12] + 8039be0: 69fa ldr r2, [r7, #28] + 8039be2: 429a cmp r2, r3 + 8039be4: d106 bne.n 8039bf4 + 8039be6: 4b65 ldr r3, [pc, #404] ; (8039d7c ) + 8039be8: f240 120d movw r2, #269 ; 0x10d + 8039bec: 4964 ldr r1, [pc, #400] ; (8039d80 ) + 8039bee: 4865 ldr r0, [pc, #404] ; (8039d84 ) + 8039bf0: f006 ffd0 bl 8040b94 if (prev != NULL) { - 8039b70: 69bb ldr r3, [r7, #24] - 8039b72: 2b00 cmp r3, #0 - 8039b74: d00a beq.n 8039b8c + 8039bf4: 69bb ldr r3, [r7, #24] + 8039bf6: 2b00 cmp r3, #0 + 8039bf8: d00a beq.n 8039c10 prev->next = pcb->next; - 8039b76: 69fb ldr r3, [r7, #28] - 8039b78: 68da ldr r2, [r3, #12] - 8039b7a: 69bb ldr r3, [r7, #24] - 8039b7c: 60da str r2, [r3, #12] + 8039bfa: 69fb ldr r3, [r7, #28] + 8039bfc: 68da ldr r2, [r3, #12] + 8039bfe: 69bb ldr r3, [r7, #24] + 8039c00: 60da str r2, [r3, #12] pcb->next = tcp_active_pcbs; - 8039b7e: 4b61 ldr r3, [pc, #388] ; (8039d04 ) - 8039b80: 681a ldr r2, [r3, #0] - 8039b82: 69fb ldr r3, [r7, #28] - 8039b84: 60da str r2, [r3, #12] + 8039c02: 4b61 ldr r3, [pc, #388] ; (8039d88 ) + 8039c04: 681a ldr r2, [r3, #0] + 8039c06: 69fb ldr r3, [r7, #28] + 8039c08: 60da str r2, [r3, #12] tcp_active_pcbs = pcb; - 8039b86: 4a5f ldr r2, [pc, #380] ; (8039d04 ) - 8039b88: 69fb ldr r3, [r7, #28] - 8039b8a: 6013 str r3, [r2, #0] + 8039c0a: 4a5f ldr r2, [pc, #380] ; (8039d88 ) + 8039c0c: 69fb ldr r3, [r7, #28] + 8039c0e: 6013 str r3, [r2, #0] } else { TCP_STATS_INC(tcp.cachehit); } LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb); - 8039b8c: 69fb ldr r3, [r7, #28] - 8039b8e: 68db ldr r3, [r3, #12] - 8039b90: 69fa ldr r2, [r7, #28] - 8039b92: 429a cmp r2, r3 - 8039b94: d111 bne.n 8039bba - 8039b96: 4b58 ldr r3, [pc, #352] ; (8039cf8 ) - 8039b98: f240 1215 movw r2, #277 ; 0x115 - 8039b9c: 495a ldr r1, [pc, #360] ; (8039d08 ) - 8039b9e: 4858 ldr r0, [pc, #352] ; (8039d00 ) - 8039ba0: f006 ffb6 bl 8040b10 + 8039c10: 69fb ldr r3, [r7, #28] + 8039c12: 68db ldr r3, [r3, #12] + 8039c14: 69fa ldr r2, [r7, #28] + 8039c16: 429a cmp r2, r3 + 8039c18: d111 bne.n 8039c3e + 8039c1a: 4b58 ldr r3, [pc, #352] ; (8039d7c ) + 8039c1c: f240 1215 movw r2, #277 ; 0x115 + 8039c20: 495a ldr r1, [pc, #360] ; (8039d8c ) + 8039c22: 4858 ldr r0, [pc, #352] ; (8039d84 ) + 8039c24: f006 ffb6 bl 8040b94 break; - 8039ba4: e009 b.n 8039bba + 8039c28: e009 b.n 8039c3e } prev = pcb; - 8039ba6: 69fb ldr r3, [r7, #28] - 8039ba8: 61bb str r3, [r7, #24] + 8039c2a: 69fb ldr r3, [r7, #28] + 8039c2c: 61bb str r3, [r7, #24] for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { - 8039baa: 69fb ldr r3, [r7, #28] - 8039bac: 68db ldr r3, [r3, #12] - 8039bae: 61fb str r3, [r7, #28] - 8039bb0: 69fb ldr r3, [r7, #28] - 8039bb2: 2b00 cmp r3, #0 - 8039bb4: f47f af5e bne.w 8039a74 - 8039bb8: e000 b.n 8039bbc + 8039c2e: 69fb ldr r3, [r7, #28] + 8039c30: 68db ldr r3, [r3, #12] + 8039c32: 61fb str r3, [r7, #28] + 8039c34: 69fb ldr r3, [r7, #28] + 8039c36: 2b00 cmp r3, #0 + 8039c38: f47f af5e bne.w 8039af8 + 8039c3c: e000 b.n 8039c40 break; - 8039bba: bf00 nop + 8039c3e: bf00 nop } if (pcb == NULL) { - 8039bbc: 69fb ldr r3, [r7, #28] - 8039bbe: 2b00 cmp r3, #0 - 8039bc0: f040 80aa bne.w 8039d18 + 8039c40: 69fb ldr r3, [r7, #28] + 8039c42: 2b00 cmp r3, #0 + 8039c44: f040 80aa bne.w 8039d9c /* If it did not go to an active connection, we check the connections in the TIME-WAIT state. */ for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - 8039bc4: 4b51 ldr r3, [pc, #324] ; (8039d0c ) - 8039bc6: 681b ldr r3, [r3, #0] - 8039bc8: 61fb str r3, [r7, #28] - 8039bca: e03f b.n 8039c4c + 8039c48: 4b51 ldr r3, [pc, #324] ; (8039d90 ) + 8039c4a: 681b ldr r3, [r3, #0] + 8039c4c: 61fb str r3, [r7, #28] + 8039c4e: e03f b.n 8039cd0 LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); - 8039bcc: 69fb ldr r3, [r7, #28] - 8039bce: 7d1b ldrb r3, [r3, #20] - 8039bd0: 2b0a cmp r3, #10 - 8039bd2: d006 beq.n 8039be2 - 8039bd4: 4b48 ldr r3, [pc, #288] ; (8039cf8 ) - 8039bd6: f240 121f movw r2, #287 ; 0x11f - 8039bda: 494d ldr r1, [pc, #308] ; (8039d10 ) - 8039bdc: 4848 ldr r0, [pc, #288] ; (8039d00 ) - 8039bde: f006 ff97 bl 8040b10 + 8039c50: 69fb ldr r3, [r7, #28] + 8039c52: 7d1b ldrb r3, [r3, #20] + 8039c54: 2b0a cmp r3, #10 + 8039c56: d006 beq.n 8039c66 + 8039c58: 4b48 ldr r3, [pc, #288] ; (8039d7c ) + 8039c5a: f240 121f movw r2, #287 ; 0x11f + 8039c5e: 494d ldr r1, [pc, #308] ; (8039d94 ) + 8039c60: 4848 ldr r0, [pc, #288] ; (8039d84 ) + 8039c62: f006 ff97 bl 8040b94 /* check if PCB is bound to specific netif */ if ((pcb->netif_idx != NETIF_NO_INDEX) && - 8039be2: 69fb ldr r3, [r7, #28] - 8039be4: 7a1b ldrb r3, [r3, #8] - 8039be6: 2b00 cmp r3, #0 - 8039be8: d009 beq.n 8039bfe + 8039c66: 69fb ldr r3, [r7, #28] + 8039c68: 7a1b ldrb r3, [r3, #8] + 8039c6a: 2b00 cmp r3, #0 + 8039c6c: d009 beq.n 8039c82 (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) { - 8039bea: 69fb ldr r3, [r7, #28] - 8039bec: 7a1a ldrb r2, [r3, #8] - 8039bee: 4b41 ldr r3, [pc, #260] ; (8039cf4 ) - 8039bf0: 685b ldr r3, [r3, #4] - 8039bf2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8039bf6: 3301 adds r3, #1 - 8039bf8: b2db uxtb r3, r3 + 8039c6e: 69fb ldr r3, [r7, #28] + 8039c70: 7a1a ldrb r2, [r3, #8] + 8039c72: 4b41 ldr r3, [pc, #260] ; (8039d78 ) + 8039c74: 685b ldr r3, [r3, #4] + 8039c76: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8039c7a: 3301 adds r3, #1 + 8039c7c: b2db uxtb r3, r3 if ((pcb->netif_idx != NETIF_NO_INDEX) && - 8039bfa: 429a cmp r2, r3 - 8039bfc: d122 bne.n 8039c44 + 8039c7e: 429a cmp r2, r3 + 8039c80: d122 bne.n 8039cc8 continue; } if (pcb->remote_port == tcphdr->src && - 8039bfe: 69fb ldr r3, [r7, #28] - 8039c00: 8b1a ldrh r2, [r3, #24] - 8039c02: 4b3b ldr r3, [pc, #236] ; (8039cf0 ) - 8039c04: 681b ldr r3, [r3, #0] - 8039c06: 881b ldrh r3, [r3, #0] - 8039c08: b29b uxth r3, r3 - 8039c0a: 429a cmp r2, r3 - 8039c0c: d11b bne.n 8039c46 + 8039c82: 69fb ldr r3, [r7, #28] + 8039c84: 8b1a ldrh r2, [r3, #24] + 8039c86: 4b3b ldr r3, [pc, #236] ; (8039d74 ) + 8039c88: 681b ldr r3, [r3, #0] + 8039c8a: 881b ldrh r3, [r3, #0] + 8039c8c: b29b uxth r3, r3 + 8039c8e: 429a cmp r2, r3 + 8039c90: d11b bne.n 8039cca pcb->local_port == tcphdr->dest && - 8039c0e: 69fb ldr r3, [r7, #28] - 8039c10: 8ada ldrh r2, [r3, #22] - 8039c12: 4b37 ldr r3, [pc, #220] ; (8039cf0 ) - 8039c14: 681b ldr r3, [r3, #0] - 8039c16: 885b ldrh r3, [r3, #2] - 8039c18: b29b uxth r3, r3 + 8039c92: 69fb ldr r3, [r7, #28] + 8039c94: 8ada ldrh r2, [r3, #22] + 8039c96: 4b37 ldr r3, [pc, #220] ; (8039d74 ) + 8039c98: 681b ldr r3, [r3, #0] + 8039c9a: 885b ldrh r3, [r3, #2] + 8039c9c: b29b uxth r3, r3 if (pcb->remote_port == tcphdr->src && - 8039c1a: 429a cmp r2, r3 - 8039c1c: d113 bne.n 8039c46 + 8039c9e: 429a cmp r2, r3 + 8039ca0: d113 bne.n 8039cca ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) && - 8039c1e: 69fb ldr r3, [r7, #28] - 8039c20: 685a ldr r2, [r3, #4] - 8039c22: 4b34 ldr r3, [pc, #208] ; (8039cf4 ) - 8039c24: 691b ldr r3, [r3, #16] + 8039ca2: 69fb ldr r3, [r7, #28] + 8039ca4: 685a ldr r2, [r3, #4] + 8039ca6: 4b34 ldr r3, [pc, #208] ; (8039d78 ) + 8039ca8: 691b ldr r3, [r3, #16] pcb->local_port == tcphdr->dest && - 8039c26: 429a cmp r2, r3 - 8039c28: d10d bne.n 8039c46 + 8039caa: 429a cmp r2, r3 + 8039cac: d10d bne.n 8039cca ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) { - 8039c2a: 69fb ldr r3, [r7, #28] - 8039c2c: 681a ldr r2, [r3, #0] - 8039c2e: 4b31 ldr r3, [pc, #196] ; (8039cf4 ) - 8039c30: 695b ldr r3, [r3, #20] + 8039cae: 69fb ldr r3, [r7, #28] + 8039cb0: 681a ldr r2, [r3, #0] + 8039cb2: 4b31 ldr r3, [pc, #196] ; (8039d78 ) + 8039cb4: 695b ldr r3, [r3, #20] ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) && - 8039c32: 429a cmp r2, r3 - 8039c34: d107 bne.n 8039c46 + 8039cb6: 429a cmp r2, r3 + 8039cb8: d107 bne.n 8039cca #ifdef LWIP_HOOK_TCP_INPACKET_PCB if (LWIP_HOOK_TCP_INPACKET_PCB(pcb, tcphdr, tcphdr_optlen, tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK) #endif { tcp_timewait_input(pcb); - 8039c36: 69f8 ldr r0, [r7, #28] - 8039c38: f000 fb56 bl 803a2e8 + 8039cba: 69f8 ldr r0, [r7, #28] + 8039cbc: f000 fb56 bl 803a36c } pbuf_free(p); - 8039c3c: 6878 ldr r0, [r7, #4] - 8039c3e: f7fd fd7d bl 803773c + 8039cc0: 6878 ldr r0, [r7, #4] + 8039cc2: f7fd fd7d bl 80377c0 return; - 8039c42: e1fd b.n 803a040 + 8039cc6: e1fd b.n 803a0c4 continue; - 8039c44: bf00 nop + 8039cc8: bf00 nop for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { - 8039c46: 69fb ldr r3, [r7, #28] - 8039c48: 68db ldr r3, [r3, #12] - 8039c4a: 61fb str r3, [r7, #28] - 8039c4c: 69fb ldr r3, [r7, #28] - 8039c4e: 2b00 cmp r3, #0 - 8039c50: d1bc bne.n 8039bcc + 8039cca: 69fb ldr r3, [r7, #28] + 8039ccc: 68db ldr r3, [r3, #12] + 8039cce: 61fb str r3, [r7, #28] + 8039cd0: 69fb ldr r3, [r7, #28] + 8039cd2: 2b00 cmp r3, #0 + 8039cd4: d1bc bne.n 8039c50 } } /* Finally, if we still did not get a match, we check all PCBs that are LISTENing for incoming connections. */ prev = NULL; - 8039c52: 2300 movs r3, #0 - 8039c54: 61bb str r3, [r7, #24] + 8039cd6: 2300 movs r3, #0 + 8039cd8: 61bb str r3, [r7, #24] for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - 8039c56: 4b2f ldr r3, [pc, #188] ; (8039d14 ) - 8039c58: 681b ldr r3, [r3, #0] - 8039c5a: 617b str r3, [r7, #20] - 8039c5c: e02a b.n 8039cb4 + 8039cda: 4b2f ldr r3, [pc, #188] ; (8039d98 ) + 8039cdc: 681b ldr r3, [r3, #0] + 8039cde: 617b str r3, [r7, #20] + 8039ce0: e02a b.n 8039d38 /* check if PCB is bound to specific netif */ if ((lpcb->netif_idx != NETIF_NO_INDEX) && - 8039c5e: 697b ldr r3, [r7, #20] - 8039c60: 7a1b ldrb r3, [r3, #8] - 8039c62: 2b00 cmp r3, #0 - 8039c64: d00c beq.n 8039c80 + 8039ce2: 697b ldr r3, [r7, #20] + 8039ce4: 7a1b ldrb r3, [r3, #8] + 8039ce6: 2b00 cmp r3, #0 + 8039ce8: d00c beq.n 8039d04 (lpcb->netif_idx != netif_get_index(ip_data.current_input_netif))) { - 8039c66: 697b ldr r3, [r7, #20] - 8039c68: 7a1a ldrb r2, [r3, #8] - 8039c6a: 4b22 ldr r3, [pc, #136] ; (8039cf4 ) - 8039c6c: 685b ldr r3, [r3, #4] - 8039c6e: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 8039c72: 3301 adds r3, #1 - 8039c74: b2db uxtb r3, r3 + 8039cea: 697b ldr r3, [r7, #20] + 8039cec: 7a1a ldrb r2, [r3, #8] + 8039cee: 4b22 ldr r3, [pc, #136] ; (8039d78 ) + 8039cf0: 685b ldr r3, [r3, #4] + 8039cf2: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8039cf6: 3301 adds r3, #1 + 8039cf8: b2db uxtb r3, r3 if ((lpcb->netif_idx != NETIF_NO_INDEX) && - 8039c76: 429a cmp r2, r3 - 8039c78: d002 beq.n 8039c80 + 8039cfa: 429a cmp r2, r3 + 8039cfc: d002 beq.n 8039d04 prev = (struct tcp_pcb *)lpcb; - 8039c7a: 697b ldr r3, [r7, #20] - 8039c7c: 61bb str r3, [r7, #24] + 8039cfe: 697b ldr r3, [r7, #20] + 8039d00: 61bb str r3, [r7, #24] continue; - 8039c7e: e016 b.n 8039cae + 8039d02: e016 b.n 8039d32 } if (lpcb->local_port == tcphdr->dest) { - 8039c80: 697b ldr r3, [r7, #20] - 8039c82: 8ada ldrh r2, [r3, #22] - 8039c84: 4b1a ldr r3, [pc, #104] ; (8039cf0 ) - 8039c86: 681b ldr r3, [r3, #0] - 8039c88: 885b ldrh r3, [r3, #2] - 8039c8a: b29b uxth r3, r3 - 8039c8c: 429a cmp r2, r3 - 8039c8e: d10c bne.n 8039caa + 8039d04: 697b ldr r3, [r7, #20] + 8039d06: 8ada ldrh r2, [r3, #22] + 8039d08: 4b1a ldr r3, [pc, #104] ; (8039d74 ) + 8039d0a: 681b ldr r3, [r3, #0] + 8039d0c: 885b ldrh r3, [r3, #2] + 8039d0e: b29b uxth r3, r3 + 8039d10: 429a cmp r2, r3 + 8039d12: d10c bne.n 8039d2e lpcb_prev = prev; #else /* SO_REUSE */ break; #endif /* SO_REUSE */ } else if (IP_ADDR_PCB_VERSION_MATCH_EXACT(lpcb, ip_current_dest_addr())) { if (ip_addr_cmp(&lpcb->local_ip, ip_current_dest_addr())) { - 8039c90: 697b ldr r3, [r7, #20] - 8039c92: 681a ldr r2, [r3, #0] - 8039c94: 4b17 ldr r3, [pc, #92] ; (8039cf4 ) - 8039c96: 695b ldr r3, [r3, #20] - 8039c98: 429a cmp r2, r3 - 8039c9a: d00f beq.n 8039cbc + 8039d14: 697b ldr r3, [r7, #20] + 8039d16: 681a ldr r2, [r3, #0] + 8039d18: 4b17 ldr r3, [pc, #92] ; (8039d78 ) + 8039d1a: 695b ldr r3, [r3, #20] + 8039d1c: 429a cmp r2, r3 + 8039d1e: d00f beq.n 8039d40 /* found an exact match */ break; } else if (ip_addr_isany(&lpcb->local_ip)) { - 8039c9c: 697b ldr r3, [r7, #20] - 8039c9e: 2b00 cmp r3, #0 - 8039ca0: d00d beq.n 8039cbe - 8039ca2: 697b ldr r3, [r7, #20] - 8039ca4: 681b ldr r3, [r3, #0] - 8039ca6: 2b00 cmp r3, #0 - 8039ca8: d009 beq.n 8039cbe + 8039d20: 697b ldr r3, [r7, #20] + 8039d22: 2b00 cmp r3, #0 + 8039d24: d00d beq.n 8039d42 + 8039d26: 697b ldr r3, [r7, #20] + 8039d28: 681b ldr r3, [r3, #0] + 8039d2a: 2b00 cmp r3, #0 + 8039d2c: d009 beq.n 8039d42 break; #endif /* SO_REUSE */ } } } prev = (struct tcp_pcb *)lpcb; - 8039caa: 697b ldr r3, [r7, #20] - 8039cac: 61bb str r3, [r7, #24] + 8039d2e: 697b ldr r3, [r7, #20] + 8039d30: 61bb str r3, [r7, #24] for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { - 8039cae: 697b ldr r3, [r7, #20] - 8039cb0: 68db ldr r3, [r3, #12] - 8039cb2: 617b str r3, [r7, #20] - 8039cb4: 697b ldr r3, [r7, #20] - 8039cb6: 2b00 cmp r3, #0 - 8039cb8: d1d1 bne.n 8039c5e - 8039cba: e000 b.n 8039cbe + 8039d32: 697b ldr r3, [r7, #20] + 8039d34: 68db ldr r3, [r3, #12] + 8039d36: 617b str r3, [r7, #20] + 8039d38: 697b ldr r3, [r7, #20] + 8039d3a: 2b00 cmp r3, #0 + 8039d3c: d1d1 bne.n 8039ce2 + 8039d3e: e000 b.n 8039d42 break; - 8039cbc: bf00 nop + 8039d40: bf00 nop /* only pass to ANY if no specific local IP has been found */ lpcb = lpcb_any; prev = lpcb_prev; } #endif /* SO_REUSE */ if (lpcb != NULL) { - 8039cbe: 697b ldr r3, [r7, #20] - 8039cc0: 2b00 cmp r3, #0 - 8039cc2: d029 beq.n 8039d18 + 8039d42: 697b ldr r3, [r7, #20] + 8039d44: 2b00 cmp r3, #0 + 8039d46: d029 beq.n 8039d9c /* Move this PCB to the front of the list so that subsequent lookups will be faster (we exploit locality in TCP segment arrivals). */ if (prev != NULL) { - 8039cc4: 69bb ldr r3, [r7, #24] - 8039cc6: 2b00 cmp r3, #0 - 8039cc8: d00a beq.n 8039ce0 + 8039d48: 69bb ldr r3, [r7, #24] + 8039d4a: 2b00 cmp r3, #0 + 8039d4c: d00a beq.n 8039d64 ((struct tcp_pcb_listen *)prev)->next = lpcb->next; - 8039cca: 697b ldr r3, [r7, #20] - 8039ccc: 68da ldr r2, [r3, #12] - 8039cce: 69bb ldr r3, [r7, #24] - 8039cd0: 60da str r2, [r3, #12] + 8039d4e: 697b ldr r3, [r7, #20] + 8039d50: 68da ldr r2, [r3, #12] + 8039d52: 69bb ldr r3, [r7, #24] + 8039d54: 60da str r2, [r3, #12] /* our successor is the remainder of the listening list */ lpcb->next = tcp_listen_pcbs.listen_pcbs; - 8039cd2: 4b10 ldr r3, [pc, #64] ; (8039d14 ) - 8039cd4: 681a ldr r2, [r3, #0] - 8039cd6: 697b ldr r3, [r7, #20] - 8039cd8: 60da str r2, [r3, #12] + 8039d56: 4b10 ldr r3, [pc, #64] ; (8039d98 ) + 8039d58: 681a ldr r2, [r3, #0] + 8039d5a: 697b ldr r3, [r7, #20] + 8039d5c: 60da str r2, [r3, #12] /* put this listening pcb at the head of the listening list */ tcp_listen_pcbs.listen_pcbs = lpcb; - 8039cda: 4a0e ldr r2, [pc, #56] ; (8039d14 ) - 8039cdc: 697b ldr r3, [r7, #20] - 8039cde: 6013 str r3, [r2, #0] + 8039d5e: 4a0e ldr r2, [pc, #56] ; (8039d98 ) + 8039d60: 697b ldr r3, [r7, #20] + 8039d62: 6013 str r3, [r2, #0] #ifdef LWIP_HOOK_TCP_INPACKET_PCB if (LWIP_HOOK_TCP_INPACKET_PCB((struct tcp_pcb *)lpcb, tcphdr, tcphdr_optlen, tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK) #endif { tcp_listen_input(lpcb); - 8039ce0: 6978 ldr r0, [r7, #20] - 8039ce2: f000 fa03 bl 803a0ec + 8039d64: 6978 ldr r0, [r7, #20] + 8039d66: f000 fa03 bl 803a170 } pbuf_free(p); - 8039ce6: 6878 ldr r0, [r7, #4] - 8039ce8: f7fd fd28 bl 803773c + 8039d6a: 6878 ldr r0, [r7, #4] + 8039d6c: f7fd fd28 bl 80377c0 return; - 8039cec: e1a8 b.n 803a040 - 8039cee: bf00 nop - 8039cf0: 2400e980 .word 0x2400e980 - 8039cf4: 2400b9bc .word 0x2400b9bc - 8039cf8: 08043500 .word 0x08043500 - 8039cfc: 0804362c .word 0x0804362c - 8039d00: 0804354c .word 0x0804354c - 8039d04: 2400e964 .word 0x2400e964 - 8039d08: 08043658 .word 0x08043658 - 8039d0c: 2400e968 .word 0x2400e968 - 8039d10: 08043684 .word 0x08043684 - 8039d14: 2400e960 .word 0x2400e960 + 8039d70: e1a8 b.n 803a0c4 + 8039d72: bf00 nop + 8039d74: 2400e988 .word 0x2400e988 + 8039d78: 2400b9c4 .word 0x2400b9c4 + 8039d7c: 08043580 .word 0x08043580 + 8039d80: 080436ac .word 0x080436ac + 8039d84: 080435cc .word 0x080435cc + 8039d88: 2400e96c .word 0x2400e96c + 8039d8c: 080436d8 .word 0x080436d8 + 8039d90: 2400e970 .word 0x2400e970 + 8039d94: 08043704 .word 0x08043704 + 8039d98: 2400e968 .word 0x2400e968 tcphdr_opt1len, tcphdr_opt2, p) != ERR_OK) { pbuf_free(p); return; } #endif if (pcb != NULL) { - 8039d18: 69fb ldr r3, [r7, #28] - 8039d1a: 2b00 cmp r3, #0 - 8039d1c: f000 8158 beq.w 8039fd0 + 8039d9c: 69fb ldr r3, [r7, #28] + 8039d9e: 2b00 cmp r3, #0 + 8039da0: f000 8158 beq.w 803a054 #if TCP_INPUT_DEBUG tcp_debug_print_state(pcb->state); #endif /* TCP_INPUT_DEBUG */ /* Set up a tcp_seg structure. */ inseg.next = NULL; - 8039d20: 4b95 ldr r3, [pc, #596] ; (8039f78 ) - 8039d22: 2200 movs r2, #0 - 8039d24: 601a str r2, [r3, #0] + 8039da4: 4b95 ldr r3, [pc, #596] ; (8039ffc ) + 8039da6: 2200 movs r2, #0 + 8039da8: 601a str r2, [r3, #0] inseg.len = p->tot_len; - 8039d26: 687b ldr r3, [r7, #4] - 8039d28: 891a ldrh r2, [r3, #8] - 8039d2a: 4b93 ldr r3, [pc, #588] ; (8039f78 ) - 8039d2c: 811a strh r2, [r3, #8] + 8039daa: 687b ldr r3, [r7, #4] + 8039dac: 891a ldrh r2, [r3, #8] + 8039dae: 4b93 ldr r3, [pc, #588] ; (8039ffc ) + 8039db0: 811a strh r2, [r3, #8] inseg.p = p; - 8039d2e: 4a92 ldr r2, [pc, #584] ; (8039f78 ) - 8039d30: 687b ldr r3, [r7, #4] - 8039d32: 6053 str r3, [r2, #4] + 8039db2: 4a92 ldr r2, [pc, #584] ; (8039ffc ) + 8039db4: 687b ldr r3, [r7, #4] + 8039db6: 6053 str r3, [r2, #4] inseg.tcphdr = tcphdr; - 8039d34: 4b91 ldr r3, [pc, #580] ; (8039f7c ) - 8039d36: 681b ldr r3, [r3, #0] - 8039d38: 4a8f ldr r2, [pc, #572] ; (8039f78 ) - 8039d3a: 60d3 str r3, [r2, #12] + 8039db8: 4b91 ldr r3, [pc, #580] ; (803a000 ) + 8039dba: 681b ldr r3, [r3, #0] + 8039dbc: 4a8f ldr r2, [pc, #572] ; (8039ffc ) + 8039dbe: 60d3 str r3, [r2, #12] recv_data = NULL; - 8039d3c: 4b90 ldr r3, [pc, #576] ; (8039f80 ) - 8039d3e: 2200 movs r2, #0 - 8039d40: 601a str r2, [r3, #0] + 8039dc0: 4b90 ldr r3, [pc, #576] ; (803a004 ) + 8039dc2: 2200 movs r2, #0 + 8039dc4: 601a str r2, [r3, #0] recv_flags = 0; - 8039d42: 4b90 ldr r3, [pc, #576] ; (8039f84 ) - 8039d44: 2200 movs r2, #0 - 8039d46: 701a strb r2, [r3, #0] + 8039dc6: 4b90 ldr r3, [pc, #576] ; (803a008 ) + 8039dc8: 2200 movs r2, #0 + 8039dca: 701a strb r2, [r3, #0] recv_acked = 0; - 8039d48: 4b8f ldr r3, [pc, #572] ; (8039f88 ) - 8039d4a: 2200 movs r2, #0 - 8039d4c: 801a strh r2, [r3, #0] + 8039dcc: 4b8f ldr r3, [pc, #572] ; (803a00c ) + 8039dce: 2200 movs r2, #0 + 8039dd0: 801a strh r2, [r3, #0] if (flags & TCP_PSH) { - 8039d4e: 4b8f ldr r3, [pc, #572] ; (8039f8c ) - 8039d50: 781b ldrb r3, [r3, #0] - 8039d52: f003 0308 and.w r3, r3, #8 - 8039d56: 2b00 cmp r3, #0 - 8039d58: d006 beq.n 8039d68 + 8039dd2: 4b8f ldr r3, [pc, #572] ; (803a010 ) + 8039dd4: 781b ldrb r3, [r3, #0] + 8039dd6: f003 0308 and.w r3, r3, #8 + 8039dda: 2b00 cmp r3, #0 + 8039ddc: d006 beq.n 8039dec p->flags |= PBUF_FLAG_PUSH; - 8039d5a: 687b ldr r3, [r7, #4] - 8039d5c: 7b5b ldrb r3, [r3, #13] - 8039d5e: f043 0301 orr.w r3, r3, #1 - 8039d62: b2da uxtb r2, r3 - 8039d64: 687b ldr r3, [r7, #4] - 8039d66: 735a strb r2, [r3, #13] + 8039dde: 687b ldr r3, [r7, #4] + 8039de0: 7b5b ldrb r3, [r3, #13] + 8039de2: f043 0301 orr.w r3, r3, #1 + 8039de6: b2da uxtb r2, r3 + 8039de8: 687b ldr r3, [r7, #4] + 8039dea: 735a strb r2, [r3, #13] } /* If there is data which was previously "refused" by upper layer */ if (pcb->refused_data != NULL) { - 8039d68: 69fb ldr r3, [r7, #28] - 8039d6a: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039d6c: 2b00 cmp r3, #0 - 8039d6e: d017 beq.n 8039da0 + 8039dec: 69fb ldr r3, [r7, #28] + 8039dee: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039df0: 2b00 cmp r3, #0 + 8039df2: d017 beq.n 8039e24 if ((tcp_process_refused_data(pcb) == ERR_ABRT) || - 8039d70: 69f8 ldr r0, [r7, #28] - 8039d72: f7ff f87f bl 8038e74 - 8039d76: 4603 mov r3, r0 - 8039d78: f113 0f0d cmn.w r3, #13 - 8039d7c: d007 beq.n 8039d8e + 8039df4: 69f8 ldr r0, [r7, #28] + 8039df6: f7ff f87f bl 8038ef8 + 8039dfa: 4603 mov r3, r0 + 8039dfc: f113 0f0d cmn.w r3, #13 + 8039e00: d007 beq.n 8039e12 ((pcb->refused_data != NULL) && (tcplen > 0))) { - 8039d7e: 69fb ldr r3, [r7, #28] - 8039d80: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039e02: 69fb ldr r3, [r7, #28] + 8039e04: 6f9b ldr r3, [r3, #120] ; 0x78 if ((tcp_process_refused_data(pcb) == ERR_ABRT) || - 8039d82: 2b00 cmp r3, #0 - 8039d84: d00c beq.n 8039da0 + 8039e06: 2b00 cmp r3, #0 + 8039e08: d00c beq.n 8039e24 ((pcb->refused_data != NULL) && (tcplen > 0))) { - 8039d86: 4b82 ldr r3, [pc, #520] ; (8039f90 ) - 8039d88: 881b ldrh r3, [r3, #0] - 8039d8a: 2b00 cmp r3, #0 - 8039d8c: d008 beq.n 8039da0 + 8039e0a: 4b82 ldr r3, [pc, #520] ; (803a014 ) + 8039e0c: 881b ldrh r3, [r3, #0] + 8039e0e: 2b00 cmp r3, #0 + 8039e10: d008 beq.n 8039e24 /* pcb has been aborted or refused data is still refused and the new segment contains data */ if (pcb->rcv_ann_wnd == 0) { - 8039d8e: 69fb ldr r3, [r7, #28] - 8039d90: 8d5b ldrh r3, [r3, #42] ; 0x2a - 8039d92: 2b00 cmp r3, #0 - 8039d94: f040 80e3 bne.w 8039f5e + 8039e12: 69fb ldr r3, [r7, #28] + 8039e14: 8d5b ldrh r3, [r3, #42] ; 0x2a + 8039e16: 2b00 cmp r3, #0 + 8039e18: f040 80e3 bne.w 8039fe2 /* this is a zero-window probe, we respond to it with current RCV.NXT and drop the data segment */ tcp_send_empty_ack(pcb); - 8039d98: 69f8 ldr r0, [r7, #28] - 8039d9a: f003 fe05 bl 803d9a8 + 8039e1c: 69f8 ldr r0, [r7, #28] + 8039e1e: f003 fe05 bl 803da2c } TCP_STATS_INC(tcp.drop); MIB2_STATS_INC(mib2.tcpinerrs); goto aborted; - 8039d9e: e0de b.n 8039f5e + 8039e22: e0de b.n 8039fe2 } } tcp_input_pcb = pcb; - 8039da0: 4a7c ldr r2, [pc, #496] ; (8039f94 ) - 8039da2: 69fb ldr r3, [r7, #28] - 8039da4: 6013 str r3, [r2, #0] + 8039e24: 4a7c ldr r2, [pc, #496] ; (803a018 ) + 8039e26: 69fb ldr r3, [r7, #28] + 8039e28: 6013 str r3, [r2, #0] err = tcp_process(pcb); - 8039da6: 69f8 ldr r0, [r7, #28] - 8039da8: f000 fb18 bl 803a3dc - 8039dac: 4603 mov r3, r0 - 8039dae: 74fb strb r3, [r7, #19] + 8039e2a: 69f8 ldr r0, [r7, #28] + 8039e2c: f000 fb18 bl 803a460 + 8039e30: 4603 mov r3, r0 + 8039e32: 74fb strb r3, [r7, #19] /* A return value of ERR_ABRT means that tcp_abort() was called and that the pcb has been freed. If so, we don't do anything. */ if (err != ERR_ABRT) { - 8039db0: f997 3013 ldrsb.w r3, [r7, #19] - 8039db4: f113 0f0d cmn.w r3, #13 - 8039db8: f000 80d3 beq.w 8039f62 + 8039e34: f997 3013 ldrsb.w r3, [r7, #19] + 8039e38: f113 0f0d cmn.w r3, #13 + 8039e3c: f000 80d3 beq.w 8039fe6 if (recv_flags & TF_RESET) { - 8039dbc: 4b71 ldr r3, [pc, #452] ; (8039f84 ) - 8039dbe: 781b ldrb r3, [r3, #0] - 8039dc0: f003 0308 and.w r3, r3, #8 - 8039dc4: 2b00 cmp r3, #0 - 8039dc6: d015 beq.n 8039df4 + 8039e40: 4b71 ldr r3, [pc, #452] ; (803a008 ) + 8039e42: 781b ldrb r3, [r3, #0] + 8039e44: f003 0308 and.w r3, r3, #8 + 8039e48: 2b00 cmp r3, #0 + 8039e4a: d015 beq.n 8039e78 /* TF_RESET means that the connection was reset by the other end. We then call the error callback to inform the application that the connection is dead before we deallocate the PCB. */ TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_RST); - 8039dc8: 69fb ldr r3, [r7, #28] - 8039dca: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8039dce: 2b00 cmp r3, #0 - 8039dd0: d008 beq.n 8039de4 - 8039dd2: 69fb ldr r3, [r7, #28] - 8039dd4: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 8039dd8: 69fa ldr r2, [r7, #28] - 8039dda: 6912 ldr r2, [r2, #16] - 8039ddc: f06f 010d mvn.w r1, #13 - 8039de0: 4610 mov r0, r2 - 8039de2: 4798 blx r3 + 8039e4c: 69fb ldr r3, [r7, #28] + 8039e4e: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8039e52: 2b00 cmp r3, #0 + 8039e54: d008 beq.n 8039e68 + 8039e56: 69fb ldr r3, [r7, #28] + 8039e58: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 8039e5c: 69fa ldr r2, [r7, #28] + 8039e5e: 6912 ldr r2, [r2, #16] + 8039e60: f06f 010d mvn.w r1, #13 + 8039e64: 4610 mov r0, r2 + 8039e66: 4798 blx r3 tcp_pcb_remove(&tcp_active_pcbs, pcb); - 8039de4: 69f9 ldr r1, [r7, #28] - 8039de6: 486c ldr r0, [pc, #432] ; (8039f98 ) - 8039de8: f7ff fbbc bl 8039564 + 8039e68: 69f9 ldr r1, [r7, #28] + 8039e6a: 486c ldr r0, [pc, #432] ; (803a01c ) + 8039e6c: f7ff fbbc bl 80395e8 tcp_free(pcb); - 8039dec: 69f8 ldr r0, [r7, #28] - 8039dee: f7fd ff45 bl 8037c7c - 8039df2: e0da b.n 8039faa + 8039e70: 69f8 ldr r0, [r7, #28] + 8039e72: f7fd ff45 bl 8037d00 + 8039e76: e0da b.n 803a02e } else { err = ERR_OK; - 8039df4: 2300 movs r3, #0 - 8039df6: 74fb strb r3, [r7, #19] + 8039e78: 2300 movs r3, #0 + 8039e7a: 74fb strb r3, [r7, #19] /* If the application has registered a "sent" function to be called when new send buffer space is available, we call it now. */ if (recv_acked > 0) { - 8039df8: 4b63 ldr r3, [pc, #396] ; (8039f88 ) - 8039dfa: 881b ldrh r3, [r3, #0] - 8039dfc: 2b00 cmp r3, #0 - 8039dfe: d01d beq.n 8039e3c + 8039e7c: 4b63 ldr r3, [pc, #396] ; (803a00c ) + 8039e7e: 881b ldrh r3, [r3, #0] + 8039e80: 2b00 cmp r3, #0 + 8039e82: d01d beq.n 8039ec0 while (acked > 0) { acked16 = (u16_t)LWIP_MIN(acked, 0xffffu); acked -= acked16; #else { acked16 = recv_acked; - 8039e00: 4b61 ldr r3, [pc, #388] ; (8039f88 ) - 8039e02: 881b ldrh r3, [r3, #0] - 8039e04: 81fb strh r3, [r7, #14] + 8039e84: 4b61 ldr r3, [pc, #388] ; (803a00c ) + 8039e86: 881b ldrh r3, [r3, #0] + 8039e88: 81fb strh r3, [r7, #14] #endif TCP_EVENT_SENT(pcb, (u16_t)acked16, err); - 8039e06: 69fb ldr r3, [r7, #28] - 8039e08: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 8039e0c: 2b00 cmp r3, #0 - 8039e0e: d00a beq.n 8039e26 - 8039e10: 69fb ldr r3, [r7, #28] - 8039e12: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 - 8039e16: 69fa ldr r2, [r7, #28] - 8039e18: 6910 ldr r0, [r2, #16] - 8039e1a: 89fa ldrh r2, [r7, #14] - 8039e1c: 69f9 ldr r1, [r7, #28] - 8039e1e: 4798 blx r3 - 8039e20: 4603 mov r3, r0 - 8039e22: 74fb strb r3, [r7, #19] - 8039e24: e001 b.n 8039e2a - 8039e26: 2300 movs r3, #0 - 8039e28: 74fb strb r3, [r7, #19] + 8039e8a: 69fb ldr r3, [r7, #28] + 8039e8c: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 8039e90: 2b00 cmp r3, #0 + 8039e92: d00a beq.n 8039eaa + 8039e94: 69fb ldr r3, [r7, #28] + 8039e96: f8d3 3080 ldr.w r3, [r3, #128] ; 0x80 + 8039e9a: 69fa ldr r2, [r7, #28] + 8039e9c: 6910 ldr r0, [r2, #16] + 8039e9e: 89fa ldrh r2, [r7, #14] + 8039ea0: 69f9 ldr r1, [r7, #28] + 8039ea2: 4798 blx r3 + 8039ea4: 4603 mov r3, r0 + 8039ea6: 74fb strb r3, [r7, #19] + 8039ea8: e001 b.n 8039eae + 8039eaa: 2300 movs r3, #0 + 8039eac: 74fb strb r3, [r7, #19] if (err == ERR_ABRT) { - 8039e2a: f997 3013 ldrsb.w r3, [r7, #19] - 8039e2e: f113 0f0d cmn.w r3, #13 - 8039e32: f000 8098 beq.w 8039f66 + 8039eae: f997 3013 ldrsb.w r3, [r7, #19] + 8039eb2: f113 0f0d cmn.w r3, #13 + 8039eb6: f000 8098 beq.w 8039fea goto aborted; } } recv_acked = 0; - 8039e36: 4b54 ldr r3, [pc, #336] ; (8039f88 ) - 8039e38: 2200 movs r2, #0 - 8039e3a: 801a strh r2, [r3, #0] + 8039eba: 4b54 ldr r3, [pc, #336] ; (803a00c ) + 8039ebc: 2200 movs r2, #0 + 8039ebe: 801a strh r2, [r3, #0] } if (tcp_input_delayed_close(pcb)) { - 8039e3c: 69f8 ldr r0, [r7, #28] - 8039e3e: f000 f915 bl 803a06c - 8039e42: 4603 mov r3, r0 - 8039e44: 2b00 cmp r3, #0 - 8039e46: f040 8090 bne.w 8039f6a + 8039ec0: 69f8 ldr r0, [r7, #28] + 8039ec2: f000 f915 bl 803a0f0 + 8039ec6: 4603 mov r3, r0 + 8039ec8: 2b00 cmp r3, #0 + 8039eca: f040 8090 bne.w 8039fee #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE while (recv_data != NULL) { struct pbuf *rest = NULL; pbuf_split_64k(recv_data, &rest); #else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ if (recv_data != NULL) { - 8039e4a: 4b4d ldr r3, [pc, #308] ; (8039f80 ) - 8039e4c: 681b ldr r3, [r3, #0] - 8039e4e: 2b00 cmp r3, #0 - 8039e50: d041 beq.n 8039ed6 + 8039ece: 4b4d ldr r3, [pc, #308] ; (803a004 ) + 8039ed0: 681b ldr r3, [r3, #0] + 8039ed2: 2b00 cmp r3, #0 + 8039ed4: d041 beq.n 8039f5a #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL); - 8039e52: 69fb ldr r3, [r7, #28] - 8039e54: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039e56: 2b00 cmp r3, #0 - 8039e58: d006 beq.n 8039e68 - 8039e5a: 4b50 ldr r3, [pc, #320] ; (8039f9c ) - 8039e5c: f44f 72f3 mov.w r2, #486 ; 0x1e6 - 8039e60: 494f ldr r1, [pc, #316] ; (8039fa0 ) - 8039e62: 4850 ldr r0, [pc, #320] ; (8039fa4 ) - 8039e64: f006 fe54 bl 8040b10 + 8039ed6: 69fb ldr r3, [r7, #28] + 8039ed8: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039eda: 2b00 cmp r3, #0 + 8039edc: d006 beq.n 8039eec + 8039ede: 4b50 ldr r3, [pc, #320] ; (803a020 ) + 8039ee0: f44f 72f3 mov.w r2, #486 ; 0x1e6 + 8039ee4: 494f ldr r1, [pc, #316] ; (803a024 ) + 8039ee6: 4850 ldr r0, [pc, #320] ; (803a028 ) + 8039ee8: f006 fe54 bl 8040b94 if (pcb->flags & TF_RXCLOSED) { - 8039e68: 69fb ldr r3, [r7, #28] - 8039e6a: 8b5b ldrh r3, [r3, #26] - 8039e6c: f003 0310 and.w r3, r3, #16 - 8039e70: 2b00 cmp r3, #0 - 8039e72: d008 beq.n 8039e86 + 8039eec: 69fb ldr r3, [r7, #28] + 8039eee: 8b5b ldrh r3, [r3, #26] + 8039ef0: f003 0310 and.w r3, r3, #16 + 8039ef4: 2b00 cmp r3, #0 + 8039ef6: d008 beq.n 8039f0a /* received data although already closed -> abort (send RST) to notify the remote host that not all data has been processed */ pbuf_free(recv_data); - 8039e74: 4b42 ldr r3, [pc, #264] ; (8039f80 ) - 8039e76: 681b ldr r3, [r3, #0] - 8039e78: 4618 mov r0, r3 - 8039e7a: f7fd fc5f bl 803773c + 8039ef8: 4b42 ldr r3, [pc, #264] ; (803a004 ) + 8039efa: 681b ldr r3, [r3, #0] + 8039efc: 4618 mov r0, r3 + 8039efe: f7fd fc5f bl 80377c0 #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE if (rest != NULL) { pbuf_free(rest); } #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ tcp_abort(pcb); - 8039e7e: 69f8 ldr r0, [r7, #28] - 8039e80: f7fe f9e4 bl 803824c + 8039f02: 69f8 ldr r0, [r7, #28] + 8039f04: f7fe f9e4 bl 80382d0 goto aborted; - 8039e84: e091 b.n 8039faa + 8039f08: e091 b.n 803a02e } /* Notify application that data has been received. */ TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err); - 8039e86: 69fb ldr r3, [r7, #28] - 8039e88: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8039e8c: 2b00 cmp r3, #0 - 8039e8e: d00c beq.n 8039eaa - 8039e90: 69fb ldr r3, [r7, #28] - 8039e92: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 - 8039e96: 69fb ldr r3, [r7, #28] - 8039e98: 6918 ldr r0, [r3, #16] - 8039e9a: 4b39 ldr r3, [pc, #228] ; (8039f80 ) - 8039e9c: 681a ldr r2, [r3, #0] - 8039e9e: 2300 movs r3, #0 - 8039ea0: 69f9 ldr r1, [r7, #28] - 8039ea2: 47a0 blx r4 - 8039ea4: 4603 mov r3, r0 - 8039ea6: 74fb strb r3, [r7, #19] - 8039ea8: e008 b.n 8039ebc - 8039eaa: 4b35 ldr r3, [pc, #212] ; (8039f80 ) - 8039eac: 681a ldr r2, [r3, #0] - 8039eae: 2300 movs r3, #0 - 8039eb0: 69f9 ldr r1, [r7, #28] - 8039eb2: 2000 movs r0, #0 - 8039eb4: f7ff f8d2 bl 803905c - 8039eb8: 4603 mov r3, r0 - 8039eba: 74fb strb r3, [r7, #19] + 8039f0a: 69fb ldr r3, [r7, #28] + 8039f0c: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8039f10: 2b00 cmp r3, #0 + 8039f12: d00c beq.n 8039f2e + 8039f14: 69fb ldr r3, [r7, #28] + 8039f16: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 + 8039f1a: 69fb ldr r3, [r7, #28] + 8039f1c: 6918 ldr r0, [r3, #16] + 8039f1e: 4b39 ldr r3, [pc, #228] ; (803a004 ) + 8039f20: 681a ldr r2, [r3, #0] + 8039f22: 2300 movs r3, #0 + 8039f24: 69f9 ldr r1, [r7, #28] + 8039f26: 47a0 blx r4 + 8039f28: 4603 mov r3, r0 + 8039f2a: 74fb strb r3, [r7, #19] + 8039f2c: e008 b.n 8039f40 + 8039f2e: 4b35 ldr r3, [pc, #212] ; (803a004 ) + 8039f30: 681a ldr r2, [r3, #0] + 8039f32: 2300 movs r3, #0 + 8039f34: 69f9 ldr r1, [r7, #28] + 8039f36: 2000 movs r0, #0 + 8039f38: f7ff f8d2 bl 80390e0 + 8039f3c: 4603 mov r3, r0 + 8039f3e: 74fb strb r3, [r7, #19] if (err == ERR_ABRT) { - 8039ebc: f997 3013 ldrsb.w r3, [r7, #19] - 8039ec0: f113 0f0d cmn.w r3, #13 - 8039ec4: d053 beq.n 8039f6e + 8039f40: f997 3013 ldrsb.w r3, [r7, #19] + 8039f44: f113 0f0d cmn.w r3, #13 + 8039f48: d053 beq.n 8039ff2 #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ goto aborted; } /* If the upper layer can't receive this data, store it */ if (err != ERR_OK) { - 8039ec6: f997 3013 ldrsb.w r3, [r7, #19] - 8039eca: 2b00 cmp r3, #0 - 8039ecc: d003 beq.n 8039ed6 + 8039f4a: f997 3013 ldrsb.w r3, [r7, #19] + 8039f4e: 2b00 cmp r3, #0 + 8039f50: d003 beq.n 8039f5a #if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE if (rest != NULL) { pbuf_cat(recv_data, rest); } #endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */ pcb->refused_data = recv_data; - 8039ece: 4b2c ldr r3, [pc, #176] ; (8039f80 ) - 8039ed0: 681a ldr r2, [r3, #0] - 8039ed2: 69fb ldr r3, [r7, #28] - 8039ed4: 679a str r2, [r3, #120] ; 0x78 + 8039f52: 4b2c ldr r3, [pc, #176] ; (803a004 ) + 8039f54: 681a ldr r2, [r3, #0] + 8039f56: 69fb ldr r3, [r7, #28] + 8039f58: 679a str r2, [r3, #120] ; 0x78 } } /* If a FIN segment was received, we call the callback function with a NULL buffer to indicate EOF. */ if (recv_flags & TF_GOT_FIN) { - 8039ed6: 4b2b ldr r3, [pc, #172] ; (8039f84 ) - 8039ed8: 781b ldrb r3, [r3, #0] - 8039eda: f003 0320 and.w r3, r3, #32 - 8039ede: 2b00 cmp r3, #0 - 8039ee0: d030 beq.n 8039f44 + 8039f5a: 4b2b ldr r3, [pc, #172] ; (803a008 ) + 8039f5c: 781b ldrb r3, [r3, #0] + 8039f5e: f003 0320 and.w r3, r3, #32 + 8039f62: 2b00 cmp r3, #0 + 8039f64: d030 beq.n 8039fc8 if (pcb->refused_data != NULL) { - 8039ee2: 69fb ldr r3, [r7, #28] - 8039ee4: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039ee6: 2b00 cmp r3, #0 - 8039ee8: d009 beq.n 8039efe + 8039f66: 69fb ldr r3, [r7, #28] + 8039f68: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039f6a: 2b00 cmp r3, #0 + 8039f6c: d009 beq.n 8039f82 /* Delay this if we have refused data. */ pcb->refused_data->flags |= PBUF_FLAG_TCP_FIN; - 8039eea: 69fb ldr r3, [r7, #28] - 8039eec: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039eee: 7b5a ldrb r2, [r3, #13] - 8039ef0: 69fb ldr r3, [r7, #28] - 8039ef2: 6f9b ldr r3, [r3, #120] ; 0x78 - 8039ef4: f042 0220 orr.w r2, r2, #32 - 8039ef8: b2d2 uxtb r2, r2 - 8039efa: 735a strb r2, [r3, #13] - 8039efc: e022 b.n 8039f44 + 8039f6e: 69fb ldr r3, [r7, #28] + 8039f70: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039f72: 7b5a ldrb r2, [r3, #13] + 8039f74: 69fb ldr r3, [r7, #28] + 8039f76: 6f9b ldr r3, [r3, #120] ; 0x78 + 8039f78: f042 0220 orr.w r2, r2, #32 + 8039f7c: b2d2 uxtb r2, r2 + 8039f7e: 735a strb r2, [r3, #13] + 8039f80: e022 b.n 8039fc8 } else { /* correct rcv_wnd as the application won't call tcp_recved() for the FIN's seqno */ if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) { - 8039efe: 69fb ldr r3, [r7, #28] - 8039f00: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8039f02: f5b3 6f06 cmp.w r3, #2144 ; 0x860 - 8039f06: d005 beq.n 8039f14 + 8039f82: 69fb ldr r3, [r7, #28] + 8039f84: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8039f86: f5b3 6f06 cmp.w r3, #2144 ; 0x860 + 8039f8a: d005 beq.n 8039f98 pcb->rcv_wnd++; - 8039f08: 69fb ldr r3, [r7, #28] - 8039f0a: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8039f0c: 3301 adds r3, #1 - 8039f0e: b29a uxth r2, r3 - 8039f10: 69fb ldr r3, [r7, #28] - 8039f12: 851a strh r2, [r3, #40] ; 0x28 + 8039f8c: 69fb ldr r3, [r7, #28] + 8039f8e: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8039f90: 3301 adds r3, #1 + 8039f92: b29a uxth r2, r3 + 8039f94: 69fb ldr r3, [r7, #28] + 8039f96: 851a strh r2, [r3, #40] ; 0x28 } TCP_EVENT_CLOSED(pcb, err); - 8039f14: 69fb ldr r3, [r7, #28] - 8039f16: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 - 8039f1a: 2b00 cmp r3, #0 - 8039f1c: d00b beq.n 8039f36 - 8039f1e: 69fb ldr r3, [r7, #28] - 8039f20: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 - 8039f24: 69fb ldr r3, [r7, #28] - 8039f26: 6918 ldr r0, [r3, #16] - 8039f28: 2300 movs r3, #0 - 8039f2a: 2200 movs r2, #0 - 8039f2c: 69f9 ldr r1, [r7, #28] - 8039f2e: 47a0 blx r4 - 8039f30: 4603 mov r3, r0 - 8039f32: 74fb strb r3, [r7, #19] - 8039f34: e001 b.n 8039f3a - 8039f36: 2300 movs r3, #0 - 8039f38: 74fb strb r3, [r7, #19] + 8039f98: 69fb ldr r3, [r7, #28] + 8039f9a: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84 + 8039f9e: 2b00 cmp r3, #0 + 8039fa0: d00b beq.n 8039fba + 8039fa2: 69fb ldr r3, [r7, #28] + 8039fa4: f8d3 4084 ldr.w r4, [r3, #132] ; 0x84 + 8039fa8: 69fb ldr r3, [r7, #28] + 8039faa: 6918 ldr r0, [r3, #16] + 8039fac: 2300 movs r3, #0 + 8039fae: 2200 movs r2, #0 + 8039fb0: 69f9 ldr r1, [r7, #28] + 8039fb2: 47a0 blx r4 + 8039fb4: 4603 mov r3, r0 + 8039fb6: 74fb strb r3, [r7, #19] + 8039fb8: e001 b.n 8039fbe + 8039fba: 2300 movs r3, #0 + 8039fbc: 74fb strb r3, [r7, #19] if (err == ERR_ABRT) { - 8039f3a: f997 3013 ldrsb.w r3, [r7, #19] - 8039f3e: f113 0f0d cmn.w r3, #13 - 8039f42: d016 beq.n 8039f72 + 8039fbe: f997 3013 ldrsb.w r3, [r7, #19] + 8039fc2: f113 0f0d cmn.w r3, #13 + 8039fc6: d016 beq.n 8039ff6 goto aborted; } } } tcp_input_pcb = NULL; - 8039f44: 4b13 ldr r3, [pc, #76] ; (8039f94 ) - 8039f46: 2200 movs r2, #0 - 8039f48: 601a str r2, [r3, #0] + 8039fc8: 4b13 ldr r3, [pc, #76] ; (803a018 ) + 8039fca: 2200 movs r2, #0 + 8039fcc: 601a str r2, [r3, #0] if (tcp_input_delayed_close(pcb)) { - 8039f4a: 69f8 ldr r0, [r7, #28] - 8039f4c: f000 f88e bl 803a06c - 8039f50: 4603 mov r3, r0 - 8039f52: 2b00 cmp r3, #0 - 8039f54: d128 bne.n 8039fa8 + 8039fce: 69f8 ldr r0, [r7, #28] + 8039fd0: f000 f88e bl 803a0f0 + 8039fd4: 4603 mov r3, r0 + 8039fd6: 2b00 cmp r3, #0 + 8039fd8: d128 bne.n 803a02c goto aborted; } /* Try to send something out. */ tcp_output(pcb); - 8039f56: 69f8 ldr r0, [r7, #28] - 8039f58: f002 ff20 bl 803cd9c - 8039f5c: e025 b.n 8039faa + 8039fda: 69f8 ldr r0, [r7, #28] + 8039fdc: f002 ff20 bl 803ce20 + 8039fe0: e025 b.n 803a02e goto aborted; - 8039f5e: bf00 nop - 8039f60: e023 b.n 8039faa + 8039fe2: bf00 nop + 8039fe4: e023 b.n 803a02e #endif /* TCP_INPUT_DEBUG */ } } /* Jump target if pcb has been aborted in a callback (by calling tcp_abort()). Below this line, 'pcb' may not be dereferenced! */ aborted: - 8039f62: bf00 nop - 8039f64: e021 b.n 8039faa + 8039fe6: bf00 nop + 8039fe8: e021 b.n 803a02e goto aborted; - 8039f66: bf00 nop - 8039f68: e01f b.n 8039faa + 8039fea: bf00 nop + 8039fec: e01f b.n 803a02e goto aborted; - 8039f6a: bf00 nop - 8039f6c: e01d b.n 8039faa + 8039fee: bf00 nop + 8039ff0: e01d b.n 803a02e goto aborted; - 8039f6e: bf00 nop - 8039f70: e01b b.n 8039faa + 8039ff2: bf00 nop + 8039ff4: e01b b.n 803a02e goto aborted; - 8039f72: bf00 nop - 8039f74: e019 b.n 8039faa - 8039f76: bf00 nop - 8039f78: 2400e970 .word 0x2400e970 - 8039f7c: 2400e980 .word 0x2400e980 - 8039f80: 2400e9a0 .word 0x2400e9a0 - 8039f84: 2400e99d .word 0x2400e99d - 8039f88: 2400e998 .word 0x2400e998 - 8039f8c: 2400e99c .word 0x2400e99c - 8039f90: 2400e99a .word 0x2400e99a - 8039f94: 2400e9a4 .word 0x2400e9a4 - 8039f98: 2400e964 .word 0x2400e964 - 8039f9c: 08043500 .word 0x08043500 - 8039fa0: 080436b4 .word 0x080436b4 - 8039fa4: 0804354c .word 0x0804354c + 8039ff6: bf00 nop + 8039ff8: e019 b.n 803a02e + 8039ffa: bf00 nop + 8039ffc: 2400e978 .word 0x2400e978 + 803a000: 2400e988 .word 0x2400e988 + 803a004: 2400e9a8 .word 0x2400e9a8 + 803a008: 2400e9a5 .word 0x2400e9a5 + 803a00c: 2400e9a0 .word 0x2400e9a0 + 803a010: 2400e9a4 .word 0x2400e9a4 + 803a014: 2400e9a2 .word 0x2400e9a2 + 803a018: 2400e9ac .word 0x2400e9ac + 803a01c: 2400e96c .word 0x2400e96c + 803a020: 08043580 .word 0x08043580 + 803a024: 08043734 .word 0x08043734 + 803a028: 080435cc .word 0x080435cc goto aborted; - 8039fa8: bf00 nop + 803a02c: bf00 nop tcp_input_pcb = NULL; - 8039faa: 4b27 ldr r3, [pc, #156] ; (803a048 ) - 8039fac: 2200 movs r2, #0 - 8039fae: 601a str r2, [r3, #0] + 803a02e: 4b27 ldr r3, [pc, #156] ; (803a0cc ) + 803a030: 2200 movs r2, #0 + 803a032: 601a str r2, [r3, #0] recv_data = NULL; - 8039fb0: 4b26 ldr r3, [pc, #152] ; (803a04c ) - 8039fb2: 2200 movs r2, #0 - 8039fb4: 601a str r2, [r3, #0] + 803a034: 4b26 ldr r3, [pc, #152] ; (803a0d0 ) + 803a036: 2200 movs r2, #0 + 803a038: 601a str r2, [r3, #0] /* give up our reference to inseg.p */ if (inseg.p != NULL) { - 8039fb6: 4b26 ldr r3, [pc, #152] ; (803a050 ) - 8039fb8: 685b ldr r3, [r3, #4] - 8039fba: 2b00 cmp r3, #0 - 8039fbc: d03f beq.n 803a03e + 803a03a: 4b26 ldr r3, [pc, #152] ; (803a0d4 ) + 803a03c: 685b ldr r3, [r3, #4] + 803a03e: 2b00 cmp r3, #0 + 803a040: d03f beq.n 803a0c2 pbuf_free(inseg.p); - 8039fbe: 4b24 ldr r3, [pc, #144] ; (803a050 ) - 8039fc0: 685b ldr r3, [r3, #4] - 8039fc2: 4618 mov r0, r3 - 8039fc4: f7fd fbba bl 803773c + 803a042: 4b24 ldr r3, [pc, #144] ; (803a0d4 ) + 803a044: 685b ldr r3, [r3, #4] + 803a046: 4618 mov r0, r3 + 803a048: f7fd fbba bl 80377c0 inseg.p = NULL; - 8039fc8: 4b21 ldr r3, [pc, #132] ; (803a050 ) - 8039fca: 2200 movs r2, #0 - 8039fcc: 605a str r2, [r3, #4] + 803a04c: 4b21 ldr r3, [pc, #132] ; (803a0d4 ) + 803a04e: 2200 movs r2, #0 + 803a050: 605a str r2, [r3, #4] pbuf_free(p); } LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane()); PERF_STOP("tcp_input"); return; - 8039fce: e036 b.n 803a03e + 803a052: e036 b.n 803a0c2 if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) { - 8039fd0: 4b20 ldr r3, [pc, #128] ; (803a054 ) - 8039fd2: 681b ldr r3, [r3, #0] - 8039fd4: 899b ldrh r3, [r3, #12] - 8039fd6: b29b uxth r3, r3 - 8039fd8: 4618 mov r0, r3 - 8039fda: f7fb ff7d bl 8035ed8 - 8039fde: 4603 mov r3, r0 - 8039fe0: b2db uxtb r3, r3 - 8039fe2: f003 0304 and.w r3, r3, #4 - 8039fe6: 2b00 cmp r3, #0 - 8039fe8: d118 bne.n 803a01c + 803a054: 4b20 ldr r3, [pc, #128] ; (803a0d8 ) + 803a056: 681b ldr r3, [r3, #0] + 803a058: 899b ldrh r3, [r3, #12] + 803a05a: b29b uxth r3, r3 + 803a05c: 4618 mov r0, r3 + 803a05e: f7fb ff7d bl 8035f5c + 803a062: 4603 mov r3, r0 + 803a064: b2db uxtb r3, r3 + 803a066: f003 0304 and.w r3, r3, #4 + 803a06a: 2b00 cmp r3, #0 + 803a06c: d118 bne.n 803a0a0 tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(), - 8039fea: 4b1b ldr r3, [pc, #108] ; (803a058 ) - 8039fec: 6819 ldr r1, [r3, #0] - 8039fee: 4b1b ldr r3, [pc, #108] ; (803a05c ) - 8039ff0: 881b ldrh r3, [r3, #0] - 8039ff2: 461a mov r2, r3 - 8039ff4: 4b1a ldr r3, [pc, #104] ; (803a060 ) - 8039ff6: 681b ldr r3, [r3, #0] - 8039ff8: 18d0 adds r0, r2, r3 + 803a06e: 4b1b ldr r3, [pc, #108] ; (803a0dc ) + 803a070: 6819 ldr r1, [r3, #0] + 803a072: 4b1b ldr r3, [pc, #108] ; (803a0e0 ) + 803a074: 881b ldrh r3, [r3, #0] + 803a076: 461a mov r2, r3 + 803a078: 4b1a ldr r3, [pc, #104] ; (803a0e4 ) + 803a07a: 681b ldr r3, [r3, #0] + 803a07c: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 8039ffa: 4b16 ldr r3, [pc, #88] ; (803a054 ) - 8039ffc: 681b ldr r3, [r3, #0] + 803a07e: 4b16 ldr r3, [pc, #88] ; (803a0d8 ) + 803a080: 681b ldr r3, [r3, #0] tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(), - 8039ffe: 885b ldrh r3, [r3, #2] - 803a000: b29b uxth r3, r3 + 803a082: 885b ldrh r3, [r3, #2] + 803a084: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a002: 4a14 ldr r2, [pc, #80] ; (803a054 ) - 803a004: 6812 ldr r2, [r2, #0] + 803a086: 4a14 ldr r2, [pc, #80] ; (803a0d8 ) + 803a088: 6812 ldr r2, [r2, #0] tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a006: 8812 ldrh r2, [r2, #0] - 803a008: b292 uxth r2, r2 - 803a00a: 9202 str r2, [sp, #8] - 803a00c: 9301 str r3, [sp, #4] - 803a00e: 4b15 ldr r3, [pc, #84] ; (803a064 ) - 803a010: 9300 str r3, [sp, #0] - 803a012: 4b15 ldr r3, [pc, #84] ; (803a068 ) - 803a014: 4602 mov r2, r0 - 803a016: 2000 movs r0, #0 - 803a018: f003 fc74 bl 803d904 + 803a08a: 8812 ldrh r2, [r2, #0] + 803a08c: b292 uxth r2, r2 + 803a08e: 9202 str r2, [sp, #8] + 803a090: 9301 str r3, [sp, #4] + 803a092: 4b15 ldr r3, [pc, #84] ; (803a0e8 ) + 803a094: 9300 str r3, [sp, #0] + 803a096: 4b15 ldr r3, [pc, #84] ; (803a0ec ) + 803a098: 4602 mov r2, r0 + 803a09a: 2000 movs r0, #0 + 803a09c: f003 fc74 bl 803d988 pbuf_free(p); - 803a01c: 6878 ldr r0, [r7, #4] - 803a01e: f7fd fb8d bl 803773c + 803a0a0: 6878 ldr r0, [r7, #4] + 803a0a2: f7fd fb8d bl 80377c0 return; - 803a022: e00c b.n 803a03e + 803a0a6: e00c b.n 803a0c2 goto dropped; - 803a024: bf00 nop - 803a026: e006 b.n 803a036 + 803a0a8: bf00 nop + 803a0aa: e006 b.n 803a0ba goto dropped; - 803a028: bf00 nop - 803a02a: e004 b.n 803a036 + 803a0ac: bf00 nop + 803a0ae: e004 b.n 803a0ba goto dropped; - 803a02c: bf00 nop - 803a02e: e002 b.n 803a036 + 803a0b0: bf00 nop + 803a0b2: e002 b.n 803a0ba goto dropped; - 803a030: bf00 nop - 803a032: e000 b.n 803a036 + 803a0b4: bf00 nop + 803a0b6: e000 b.n 803a0ba goto dropped; - 803a034: bf00 nop + 803a0b8: bf00 nop dropped: TCP_STATS_INC(tcp.drop); MIB2_STATS_INC(mib2.tcpinerrs); pbuf_free(p); - 803a036: 6878 ldr r0, [r7, #4] - 803a038: f7fd fb80 bl 803773c - 803a03c: e000 b.n 803a040 + 803a0ba: 6878 ldr r0, [r7, #4] + 803a0bc: f7fd fb80 bl 80377c0 + 803a0c0: e000 b.n 803a0c4 return; - 803a03e: bf00 nop -} - 803a040: 3724 adds r7, #36 ; 0x24 - 803a042: 46bd mov sp, r7 - 803a044: bd90 pop {r4, r7, pc} - 803a046: bf00 nop - 803a048: 2400e9a4 .word 0x2400e9a4 - 803a04c: 2400e9a0 .word 0x2400e9a0 - 803a050: 2400e970 .word 0x2400e970 - 803a054: 2400e980 .word 0x2400e980 - 803a058: 2400e994 .word 0x2400e994 - 803a05c: 2400e99a .word 0x2400e99a - 803a060: 2400e990 .word 0x2400e990 - 803a064: 2400b9cc .word 0x2400b9cc - 803a068: 2400b9d0 .word 0x2400b9d0 - -0803a06c : + 803a0c2: bf00 nop +} + 803a0c4: 3724 adds r7, #36 ; 0x24 + 803a0c6: 46bd mov sp, r7 + 803a0c8: bd90 pop {r4, r7, pc} + 803a0ca: bf00 nop + 803a0cc: 2400e9ac .word 0x2400e9ac + 803a0d0: 2400e9a8 .word 0x2400e9a8 + 803a0d4: 2400e978 .word 0x2400e978 + 803a0d8: 2400e988 .word 0x2400e988 + 803a0dc: 2400e99c .word 0x2400e99c + 803a0e0: 2400e9a2 .word 0x2400e9a2 + 803a0e4: 2400e998 .word 0x2400e998 + 803a0e8: 2400b9d4 .word 0x2400b9d4 + 803a0ec: 2400b9d8 .word 0x2400b9d8 + +0803a0f0 : * any more. * @returns 1 if the pcb has been closed and deallocated, 0 otherwise */ static int tcp_input_delayed_close(struct tcp_pcb *pcb) { - 803a06c: b580 push {r7, lr} - 803a06e: b082 sub sp, #8 - 803a070: af00 add r7, sp, #0 - 803a072: 6078 str r0, [r7, #4] + 803a0f0: b580 push {r7, lr} + 803a0f2: b082 sub sp, #8 + 803a0f4: af00 add r7, sp, #0 + 803a0f6: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_input_delayed_close: invalid pcb", pcb != NULL); - 803a074: 687b ldr r3, [r7, #4] - 803a076: 2b00 cmp r3, #0 - 803a078: d106 bne.n 803a088 - 803a07a: 4b17 ldr r3, [pc, #92] ; (803a0d8 ) - 803a07c: f240 225a movw r2, #602 ; 0x25a - 803a080: 4916 ldr r1, [pc, #88] ; (803a0dc ) - 803a082: 4817 ldr r0, [pc, #92] ; (803a0e0 ) - 803a084: f006 fd44 bl 8040b10 + 803a0f8: 687b ldr r3, [r7, #4] + 803a0fa: 2b00 cmp r3, #0 + 803a0fc: d106 bne.n 803a10c + 803a0fe: 4b17 ldr r3, [pc, #92] ; (803a15c ) + 803a100: f240 225a movw r2, #602 ; 0x25a + 803a104: 4916 ldr r1, [pc, #88] ; (803a160 ) + 803a106: 4817 ldr r0, [pc, #92] ; (803a164 ) + 803a108: f006 fd44 bl 8040b94 if (recv_flags & TF_CLOSED) { - 803a088: 4b16 ldr r3, [pc, #88] ; (803a0e4 ) - 803a08a: 781b ldrb r3, [r3, #0] - 803a08c: f003 0310 and.w r3, r3, #16 - 803a090: 2b00 cmp r3, #0 - 803a092: d01c beq.n 803a0ce + 803a10c: 4b16 ldr r3, [pc, #88] ; (803a168 ) + 803a10e: 781b ldrb r3, [r3, #0] + 803a110: f003 0310 and.w r3, r3, #16 + 803a114: 2b00 cmp r3, #0 + 803a116: d01c beq.n 803a152 /* The connection has been closed and we will deallocate the PCB. */ if (!(pcb->flags & TF_RXCLOSED)) { - 803a094: 687b ldr r3, [r7, #4] - 803a096: 8b5b ldrh r3, [r3, #26] - 803a098: f003 0310 and.w r3, r3, #16 - 803a09c: 2b00 cmp r3, #0 - 803a09e: d10d bne.n 803a0bc + 803a118: 687b ldr r3, [r7, #4] + 803a11a: 8b5b ldrh r3, [r3, #26] + 803a11c: f003 0310 and.w r3, r3, #16 + 803a120: 2b00 cmp r3, #0 + 803a122: d10d bne.n 803a140 /* Connection closed although the application has only shut down the tx side: call the PCB's err callback and indicate the closure to ensure the application doesn't continue using the PCB. */ TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_CLSD); - 803a0a0: 687b ldr r3, [r7, #4] - 803a0a2: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 803a0a6: 2b00 cmp r3, #0 - 803a0a8: d008 beq.n 803a0bc - 803a0aa: 687b ldr r3, [r7, #4] - 803a0ac: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 - 803a0b0: 687a ldr r2, [r7, #4] - 803a0b2: 6912 ldr r2, [r2, #16] - 803a0b4: f06f 010e mvn.w r1, #14 - 803a0b8: 4610 mov r0, r2 - 803a0ba: 4798 blx r3 + 803a124: 687b ldr r3, [r7, #4] + 803a126: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 803a12a: 2b00 cmp r3, #0 + 803a12c: d008 beq.n 803a140 + 803a12e: 687b ldr r3, [r7, #4] + 803a130: f8d3 3090 ldr.w r3, [r3, #144] ; 0x90 + 803a134: 687a ldr r2, [r7, #4] + 803a136: 6912 ldr r2, [r2, #16] + 803a138: f06f 010e mvn.w r1, #14 + 803a13c: 4610 mov r0, r2 + 803a13e: 4798 blx r3 } tcp_pcb_remove(&tcp_active_pcbs, pcb); - 803a0bc: 6879 ldr r1, [r7, #4] - 803a0be: 480a ldr r0, [pc, #40] ; (803a0e8 ) - 803a0c0: f7ff fa50 bl 8039564 + 803a140: 6879 ldr r1, [r7, #4] + 803a142: 480a ldr r0, [pc, #40] ; (803a16c ) + 803a144: f7ff fa50 bl 80395e8 tcp_free(pcb); - 803a0c4: 6878 ldr r0, [r7, #4] - 803a0c6: f7fd fdd9 bl 8037c7c + 803a148: 6878 ldr r0, [r7, #4] + 803a14a: f7fd fdd9 bl 8037d00 return 1; - 803a0ca: 2301 movs r3, #1 - 803a0cc: e000 b.n 803a0d0 + 803a14e: 2301 movs r3, #1 + 803a150: e000 b.n 803a154 } return 0; - 803a0ce: 2300 movs r3, #0 -} - 803a0d0: 4618 mov r0, r3 - 803a0d2: 3708 adds r7, #8 - 803a0d4: 46bd mov sp, r7 - 803a0d6: bd80 pop {r7, pc} - 803a0d8: 08043500 .word 0x08043500 - 803a0dc: 080436d0 .word 0x080436d0 - 803a0e0: 0804354c .word 0x0804354c - 803a0e4: 2400e99d .word 0x2400e99d - 803a0e8: 2400e964 .word 0x2400e964 - -0803a0ec : + 803a152: 2300 movs r3, #0 +} + 803a154: 4618 mov r0, r3 + 803a156: 3708 adds r7, #8 + 803a158: 46bd mov sp, r7 + 803a15a: bd80 pop {r7, pc} + 803a15c: 08043580 .word 0x08043580 + 803a160: 08043750 .word 0x08043750 + 803a164: 080435cc .word 0x080435cc + 803a168: 2400e9a5 .word 0x2400e9a5 + 803a16c: 2400e96c .word 0x2400e96c + +0803a170 : * @note the segment which arrived is saved in global variables, therefore only the pcb * involved is passed as a parameter to this function */ static void tcp_listen_input(struct tcp_pcb_listen *pcb) { - 803a0ec: b590 push {r4, r7, lr} - 803a0ee: b08b sub sp, #44 ; 0x2c - 803a0f0: af04 add r7, sp, #16 - 803a0f2: 6078 str r0, [r7, #4] + 803a170: b590 push {r4, r7, lr} + 803a172: b08b sub sp, #44 ; 0x2c + 803a174: af04 add r7, sp, #16 + 803a176: 6078 str r0, [r7, #4] struct tcp_pcb *npcb; u32_t iss; err_t rc; if (flags & TCP_RST) { - 803a0f4: 4b6f ldr r3, [pc, #444] ; (803a2b4 ) - 803a0f6: 781b ldrb r3, [r3, #0] - 803a0f8: f003 0304 and.w r3, r3, #4 - 803a0fc: 2b00 cmp r3, #0 - 803a0fe: f040 80d2 bne.w 803a2a6 + 803a178: 4b6f ldr r3, [pc, #444] ; (803a338 ) + 803a17a: 781b ldrb r3, [r3, #0] + 803a17c: f003 0304 and.w r3, r3, #4 + 803a180: 2b00 cmp r3, #0 + 803a182: f040 80d2 bne.w 803a32a /* An incoming RST should be ignored. Return. */ return; } LWIP_ASSERT("tcp_listen_input: invalid pcb", pcb != NULL); - 803a102: 687b ldr r3, [r7, #4] - 803a104: 2b00 cmp r3, #0 - 803a106: d106 bne.n 803a116 - 803a108: 4b6b ldr r3, [pc, #428] ; (803a2b8 ) - 803a10a: f240 2281 movw r2, #641 ; 0x281 - 803a10e: 496b ldr r1, [pc, #428] ; (803a2bc ) - 803a110: 486b ldr r0, [pc, #428] ; (803a2c0 ) - 803a112: f006 fcfd bl 8040b10 + 803a186: 687b ldr r3, [r7, #4] + 803a188: 2b00 cmp r3, #0 + 803a18a: d106 bne.n 803a19a + 803a18c: 4b6b ldr r3, [pc, #428] ; (803a33c ) + 803a18e: f240 2281 movw r2, #641 ; 0x281 + 803a192: 496b ldr r1, [pc, #428] ; (803a340 ) + 803a194: 486b ldr r0, [pc, #428] ; (803a344 ) + 803a196: f006 fcfd bl 8040b94 /* In the LISTEN state, we check for incoming SYN segments, creates a new PCB, and responds with a SYN|ACK. */ if (flags & TCP_ACK) { - 803a116: 4b67 ldr r3, [pc, #412] ; (803a2b4 ) - 803a118: 781b ldrb r3, [r3, #0] - 803a11a: f003 0310 and.w r3, r3, #16 - 803a11e: 2b00 cmp r3, #0 - 803a120: d019 beq.n 803a156 + 803a19a: 4b67 ldr r3, [pc, #412] ; (803a338 ) + 803a19c: 781b ldrb r3, [r3, #0] + 803a19e: f003 0310 and.w r3, r3, #16 + 803a1a2: 2b00 cmp r3, #0 + 803a1a4: d019 beq.n 803a1da /* For incoming segments with the ACK flag set, respond with a RST. */ LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n")); tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a122: 4b68 ldr r3, [pc, #416] ; (803a2c4 ) - 803a124: 6819 ldr r1, [r3, #0] - 803a126: 4b68 ldr r3, [pc, #416] ; (803a2c8 ) - 803a128: 881b ldrh r3, [r3, #0] - 803a12a: 461a mov r2, r3 - 803a12c: 4b67 ldr r3, [pc, #412] ; (803a2cc ) - 803a12e: 681b ldr r3, [r3, #0] - 803a130: 18d0 adds r0, r2, r3 + 803a1a6: 4b68 ldr r3, [pc, #416] ; (803a348 ) + 803a1a8: 6819 ldr r1, [r3, #0] + 803a1aa: 4b68 ldr r3, [pc, #416] ; (803a34c ) + 803a1ac: 881b ldrh r3, [r3, #0] + 803a1ae: 461a mov r2, r3 + 803a1b0: 4b67 ldr r3, [pc, #412] ; (803a350 ) + 803a1b2: 681b ldr r3, [r3, #0] + 803a1b4: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a132: 4b67 ldr r3, [pc, #412] ; (803a2d0 ) - 803a134: 681b ldr r3, [r3, #0] + 803a1b6: 4b67 ldr r3, [pc, #412] ; (803a354 ) + 803a1b8: 681b ldr r3, [r3, #0] tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a136: 885b ldrh r3, [r3, #2] - 803a138: b29b uxth r3, r3 + 803a1ba: 885b ldrh r3, [r3, #2] + 803a1bc: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a13a: 4a65 ldr r2, [pc, #404] ; (803a2d0 ) - 803a13c: 6812 ldr r2, [r2, #0] + 803a1be: 4a65 ldr r2, [pc, #404] ; (803a354 ) + 803a1c0: 6812 ldr r2, [r2, #0] tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a13e: 8812 ldrh r2, [r2, #0] - 803a140: b292 uxth r2, r2 - 803a142: 9202 str r2, [sp, #8] - 803a144: 9301 str r3, [sp, #4] - 803a146: 4b63 ldr r3, [pc, #396] ; (803a2d4 ) - 803a148: 9300 str r3, [sp, #0] - 803a14a: 4b63 ldr r3, [pc, #396] ; (803a2d8 ) - 803a14c: 4602 mov r2, r0 - 803a14e: 6878 ldr r0, [r7, #4] - 803a150: f003 fbd8 bl 803d904 + 803a1c2: 8812 ldrh r2, [r2, #0] + 803a1c4: b292 uxth r2, r2 + 803a1c6: 9202 str r2, [sp, #8] + 803a1c8: 9301 str r3, [sp, #4] + 803a1ca: 4b63 ldr r3, [pc, #396] ; (803a358 ) + 803a1cc: 9300 str r3, [sp, #0] + 803a1ce: 4b63 ldr r3, [pc, #396] ; (803a35c ) + 803a1d0: 4602 mov r2, r0 + 803a1d2: 6878 ldr r0, [r7, #4] + 803a1d4: f003 fbd8 bl 803d988 tcp_abandon(npcb, 0); return; } tcp_output(npcb); } return; - 803a154: e0a9 b.n 803a2aa + 803a1d8: e0a9 b.n 803a32e } else if (flags & TCP_SYN) { - 803a156: 4b57 ldr r3, [pc, #348] ; (803a2b4 ) - 803a158: 781b ldrb r3, [r3, #0] - 803a15a: f003 0302 and.w r3, r3, #2 - 803a15e: 2b00 cmp r3, #0 - 803a160: f000 80a3 beq.w 803a2aa + 803a1da: 4b57 ldr r3, [pc, #348] ; (803a338 ) + 803a1dc: 781b ldrb r3, [r3, #0] + 803a1de: f003 0302 and.w r3, r3, #2 + 803a1e2: 2b00 cmp r3, #0 + 803a1e4: f000 80a3 beq.w 803a32e npcb = tcp_alloc(pcb->prio); - 803a164: 687b ldr r3, [r7, #4] - 803a166: 7d5b ldrb r3, [r3, #21] - 803a168: 4618 mov r0, r3 - 803a16a: f7ff f89b bl 80392a4 - 803a16e: 6178 str r0, [r7, #20] + 803a1e8: 687b ldr r3, [r7, #4] + 803a1ea: 7d5b ldrb r3, [r3, #21] + 803a1ec: 4618 mov r0, r3 + 803a1ee: f7ff f89b bl 8039328 + 803a1f2: 6178 str r0, [r7, #20] if (npcb == NULL) { - 803a170: 697b ldr r3, [r7, #20] - 803a172: 2b00 cmp r3, #0 - 803a174: d111 bne.n 803a19a + 803a1f4: 697b ldr r3, [r7, #20] + 803a1f6: 2b00 cmp r3, #0 + 803a1f8: d111 bne.n 803a21e TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err); - 803a176: 687b ldr r3, [r7, #4] - 803a178: 699b ldr r3, [r3, #24] - 803a17a: 2b00 cmp r3, #0 - 803a17c: d00a beq.n 803a194 - 803a17e: 687b ldr r3, [r7, #4] - 803a180: 699b ldr r3, [r3, #24] - 803a182: 687a ldr r2, [r7, #4] - 803a184: 6910 ldr r0, [r2, #16] - 803a186: f04f 32ff mov.w r2, #4294967295 - 803a18a: 2100 movs r1, #0 - 803a18c: 4798 blx r3 - 803a18e: 4603 mov r3, r0 - 803a190: 73bb strb r3, [r7, #14] + 803a1fa: 687b ldr r3, [r7, #4] + 803a1fc: 699b ldr r3, [r3, #24] + 803a1fe: 2b00 cmp r3, #0 + 803a200: d00a beq.n 803a218 + 803a202: 687b ldr r3, [r7, #4] + 803a204: 699b ldr r3, [r3, #24] + 803a206: 687a ldr r2, [r7, #4] + 803a208: 6910 ldr r0, [r2, #16] + 803a20a: f04f 32ff mov.w r2, #4294967295 + 803a20e: 2100 movs r1, #0 + 803a210: 4798 blx r3 + 803a212: 4603 mov r3, r0 + 803a214: 73bb strb r3, [r7, #14] return; - 803a192: e08b b.n 803a2ac + 803a216: e08b b.n 803a330 TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err); - 803a194: 23f0 movs r3, #240 ; 0xf0 - 803a196: 73bb strb r3, [r7, #14] + 803a218: 23f0 movs r3, #240 ; 0xf0 + 803a21a: 73bb strb r3, [r7, #14] return; - 803a198: e088 b.n 803a2ac + 803a21c: e088 b.n 803a330 ip_addr_copy(npcb->local_ip, *ip_current_dest_addr()); - 803a19a: 4b50 ldr r3, [pc, #320] ; (803a2dc ) - 803a19c: 695a ldr r2, [r3, #20] - 803a19e: 697b ldr r3, [r7, #20] - 803a1a0: 601a str r2, [r3, #0] + 803a21e: 4b50 ldr r3, [pc, #320] ; (803a360 ) + 803a220: 695a ldr r2, [r3, #20] + 803a222: 697b ldr r3, [r7, #20] + 803a224: 601a str r2, [r3, #0] ip_addr_copy(npcb->remote_ip, *ip_current_src_addr()); - 803a1a2: 4b4e ldr r3, [pc, #312] ; (803a2dc ) - 803a1a4: 691a ldr r2, [r3, #16] - 803a1a6: 697b ldr r3, [r7, #20] - 803a1a8: 605a str r2, [r3, #4] + 803a226: 4b4e ldr r3, [pc, #312] ; (803a360 ) + 803a228: 691a ldr r2, [r3, #16] + 803a22a: 697b ldr r3, [r7, #20] + 803a22c: 605a str r2, [r3, #4] npcb->local_port = pcb->local_port; - 803a1aa: 687b ldr r3, [r7, #4] - 803a1ac: 8ada ldrh r2, [r3, #22] - 803a1ae: 697b ldr r3, [r7, #20] - 803a1b0: 82da strh r2, [r3, #22] + 803a22e: 687b ldr r3, [r7, #4] + 803a230: 8ada ldrh r2, [r3, #22] + 803a232: 697b ldr r3, [r7, #20] + 803a234: 82da strh r2, [r3, #22] npcb->remote_port = tcphdr->src; - 803a1b2: 4b47 ldr r3, [pc, #284] ; (803a2d0 ) - 803a1b4: 681b ldr r3, [r3, #0] - 803a1b6: 881b ldrh r3, [r3, #0] - 803a1b8: b29a uxth r2, r3 - 803a1ba: 697b ldr r3, [r7, #20] - 803a1bc: 831a strh r2, [r3, #24] + 803a236: 4b47 ldr r3, [pc, #284] ; (803a354 ) + 803a238: 681b ldr r3, [r3, #0] + 803a23a: 881b ldrh r3, [r3, #0] + 803a23c: b29a uxth r2, r3 + 803a23e: 697b ldr r3, [r7, #20] + 803a240: 831a strh r2, [r3, #24] npcb->state = SYN_RCVD; - 803a1be: 697b ldr r3, [r7, #20] - 803a1c0: 2203 movs r2, #3 - 803a1c2: 751a strb r2, [r3, #20] + 803a242: 697b ldr r3, [r7, #20] + 803a244: 2203 movs r2, #3 + 803a246: 751a strb r2, [r3, #20] npcb->rcv_nxt = seqno + 1; - 803a1c4: 4b41 ldr r3, [pc, #260] ; (803a2cc ) - 803a1c6: 681b ldr r3, [r3, #0] - 803a1c8: 1c5a adds r2, r3, #1 - 803a1ca: 697b ldr r3, [r7, #20] - 803a1cc: 625a str r2, [r3, #36] ; 0x24 + 803a248: 4b41 ldr r3, [pc, #260] ; (803a350 ) + 803a24a: 681b ldr r3, [r3, #0] + 803a24c: 1c5a adds r2, r3, #1 + 803a24e: 697b ldr r3, [r7, #20] + 803a250: 625a str r2, [r3, #36] ; 0x24 npcb->rcv_ann_right_edge = npcb->rcv_nxt; - 803a1ce: 697b ldr r3, [r7, #20] - 803a1d0: 6a5a ldr r2, [r3, #36] ; 0x24 - 803a1d2: 697b ldr r3, [r7, #20] - 803a1d4: 62da str r2, [r3, #44] ; 0x2c + 803a252: 697b ldr r3, [r7, #20] + 803a254: 6a5a ldr r2, [r3, #36] ; 0x24 + 803a256: 697b ldr r3, [r7, #20] + 803a258: 62da str r2, [r3, #44] ; 0x2c iss = tcp_next_iss(npcb); - 803a1d6: 6978 ldr r0, [r7, #20] - 803a1d8: f7ff fa58 bl 803968c - 803a1dc: 6138 str r0, [r7, #16] + 803a25a: 6978 ldr r0, [r7, #20] + 803a25c: f7ff fa58 bl 8039710 + 803a260: 6138 str r0, [r7, #16] npcb->snd_wl2 = iss; - 803a1de: 697b ldr r3, [r7, #20] - 803a1e0: 693a ldr r2, [r7, #16] - 803a1e2: 659a str r2, [r3, #88] ; 0x58 + 803a262: 697b ldr r3, [r7, #20] + 803a264: 693a ldr r2, [r7, #16] + 803a266: 659a str r2, [r3, #88] ; 0x58 npcb->snd_nxt = iss; - 803a1e4: 697b ldr r3, [r7, #20] - 803a1e6: 693a ldr r2, [r7, #16] - 803a1e8: 651a str r2, [r3, #80] ; 0x50 + 803a268: 697b ldr r3, [r7, #20] + 803a26a: 693a ldr r2, [r7, #16] + 803a26c: 651a str r2, [r3, #80] ; 0x50 npcb->lastack = iss; - 803a1ea: 697b ldr r3, [r7, #20] - 803a1ec: 693a ldr r2, [r7, #16] - 803a1ee: 645a str r2, [r3, #68] ; 0x44 + 803a26e: 697b ldr r3, [r7, #20] + 803a270: 693a ldr r2, [r7, #16] + 803a272: 645a str r2, [r3, #68] ; 0x44 npcb->snd_lbb = iss; - 803a1f0: 697b ldr r3, [r7, #20] - 803a1f2: 693a ldr r2, [r7, #16] - 803a1f4: 65da str r2, [r3, #92] ; 0x5c + 803a274: 697b ldr r3, [r7, #20] + 803a276: 693a ldr r2, [r7, #16] + 803a278: 65da str r2, [r3, #92] ; 0x5c npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */ - 803a1f6: 4b35 ldr r3, [pc, #212] ; (803a2cc ) - 803a1f8: 681b ldr r3, [r3, #0] - 803a1fa: 1e5a subs r2, r3, #1 - 803a1fc: 697b ldr r3, [r7, #20] - 803a1fe: 655a str r2, [r3, #84] ; 0x54 + 803a27a: 4b35 ldr r3, [pc, #212] ; (803a350 ) + 803a27c: 681b ldr r3, [r3, #0] + 803a27e: 1e5a subs r2, r3, #1 + 803a280: 697b ldr r3, [r7, #20] + 803a282: 655a str r2, [r3, #84] ; 0x54 npcb->callback_arg = pcb->callback_arg; - 803a200: 687b ldr r3, [r7, #4] - 803a202: 691a ldr r2, [r3, #16] - 803a204: 697b ldr r3, [r7, #20] - 803a206: 611a str r2, [r3, #16] + 803a284: 687b ldr r3, [r7, #4] + 803a286: 691a ldr r2, [r3, #16] + 803a288: 697b ldr r3, [r7, #20] + 803a28a: 611a str r2, [r3, #16] npcb->listener = pcb; - 803a208: 697b ldr r3, [r7, #20] - 803a20a: 687a ldr r2, [r7, #4] - 803a20c: 67da str r2, [r3, #124] ; 0x7c + 803a28c: 697b ldr r3, [r7, #20] + 803a28e: 687a ldr r2, [r7, #4] + 803a290: 67da str r2, [r3, #124] ; 0x7c npcb->so_options = pcb->so_options & SOF_INHERITED; - 803a20e: 687b ldr r3, [r7, #4] - 803a210: 7a5b ldrb r3, [r3, #9] - 803a212: f003 030c and.w r3, r3, #12 - 803a216: b2da uxtb r2, r3 - 803a218: 697b ldr r3, [r7, #20] - 803a21a: 725a strb r2, [r3, #9] + 803a292: 687b ldr r3, [r7, #4] + 803a294: 7a5b ldrb r3, [r3, #9] + 803a296: f003 030c and.w r3, r3, #12 + 803a29a: b2da uxtb r2, r3 + 803a29c: 697b ldr r3, [r7, #20] + 803a29e: 725a strb r2, [r3, #9] npcb->netif_idx = pcb->netif_idx; - 803a21c: 687b ldr r3, [r7, #4] - 803a21e: 7a1a ldrb r2, [r3, #8] - 803a220: 697b ldr r3, [r7, #20] - 803a222: 721a strb r2, [r3, #8] + 803a2a0: 687b ldr r3, [r7, #4] + 803a2a2: 7a1a ldrb r2, [r3, #8] + 803a2a4: 697b ldr r3, [r7, #20] + 803a2a6: 721a strb r2, [r3, #8] TCP_REG_ACTIVE(npcb); - 803a224: 4b2e ldr r3, [pc, #184] ; (803a2e0 ) - 803a226: 681a ldr r2, [r3, #0] - 803a228: 697b ldr r3, [r7, #20] - 803a22a: 60da str r2, [r3, #12] - 803a22c: 4a2c ldr r2, [pc, #176] ; (803a2e0 ) - 803a22e: 697b ldr r3, [r7, #20] - 803a230: 6013 str r3, [r2, #0] - 803a232: f003 fd29 bl 803dc88 - 803a236: 4b2b ldr r3, [pc, #172] ; (803a2e4 ) - 803a238: 2201 movs r2, #1 - 803a23a: 701a strb r2, [r3, #0] + 803a2a8: 4b2e ldr r3, [pc, #184] ; (803a364 ) + 803a2aa: 681a ldr r2, [r3, #0] + 803a2ac: 697b ldr r3, [r7, #20] + 803a2ae: 60da str r2, [r3, #12] + 803a2b0: 4a2c ldr r2, [pc, #176] ; (803a364 ) + 803a2b2: 697b ldr r3, [r7, #20] + 803a2b4: 6013 str r3, [r2, #0] + 803a2b6: f003 fd29 bl 803dd0c + 803a2ba: 4b2b ldr r3, [pc, #172] ; (803a368 ) + 803a2bc: 2201 movs r2, #1 + 803a2be: 701a strb r2, [r3, #0] tcp_parseopt(npcb); - 803a23c: 6978 ldr r0, [r7, #20] - 803a23e: f001 fd8f bl 803bd60 + 803a2c0: 6978 ldr r0, [r7, #20] + 803a2c2: f001 fd8f bl 803bde4 npcb->snd_wnd = tcphdr->wnd; - 803a242: 4b23 ldr r3, [pc, #140] ; (803a2d0 ) - 803a244: 681b ldr r3, [r3, #0] - 803a246: 89db ldrh r3, [r3, #14] - 803a248: b29a uxth r2, r3 - 803a24a: 697b ldr r3, [r7, #20] - 803a24c: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 803a2c6: 4b23 ldr r3, [pc, #140] ; (803a354 ) + 803a2c8: 681b ldr r3, [r3, #0] + 803a2ca: 89db ldrh r3, [r3, #14] + 803a2cc: b29a uxth r2, r3 + 803a2ce: 697b ldr r3, [r7, #20] + 803a2d0: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 npcb->snd_wnd_max = npcb->snd_wnd; - 803a250: 697b ldr r3, [r7, #20] - 803a252: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 803a256: 697b ldr r3, [r7, #20] - 803a258: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 + 803a2d4: 697b ldr r3, [r7, #20] + 803a2d6: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 803a2da: 697b ldr r3, [r7, #20] + 803a2dc: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 npcb->mss = tcp_eff_send_mss(npcb->mss, &npcb->local_ip, &npcb->remote_ip); - 803a25c: 697b ldr r3, [r7, #20] - 803a25e: 8e5c ldrh r4, [r3, #50] ; 0x32 - 803a260: 697b ldr r3, [r7, #20] - 803a262: 3304 adds r3, #4 - 803a264: 4618 mov r0, r3 - 803a266: f005 f913 bl 803f490 - 803a26a: 4601 mov r1, r0 - 803a26c: 697b ldr r3, [r7, #20] - 803a26e: 3304 adds r3, #4 - 803a270: 461a mov r2, r3 - 803a272: 4620 mov r0, r4 - 803a274: f7ff fa30 bl 80396d8 - 803a278: 4603 mov r3, r0 - 803a27a: 461a mov r2, r3 - 803a27c: 697b ldr r3, [r7, #20] - 803a27e: 865a strh r2, [r3, #50] ; 0x32 + 803a2e0: 697b ldr r3, [r7, #20] + 803a2e2: 8e5c ldrh r4, [r3, #50] ; 0x32 + 803a2e4: 697b ldr r3, [r7, #20] + 803a2e6: 3304 adds r3, #4 + 803a2e8: 4618 mov r0, r3 + 803a2ea: f005 f913 bl 803f514 + 803a2ee: 4601 mov r1, r0 + 803a2f0: 697b ldr r3, [r7, #20] + 803a2f2: 3304 adds r3, #4 + 803a2f4: 461a mov r2, r3 + 803a2f6: 4620 mov r0, r4 + 803a2f8: f7ff fa30 bl 803975c + 803a2fc: 4603 mov r3, r0 + 803a2fe: 461a mov r2, r3 + 803a300: 697b ldr r3, [r7, #20] + 803a302: 865a strh r2, [r3, #50] ; 0x32 rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK); - 803a280: 2112 movs r1, #18 - 803a282: 6978 ldr r0, [r7, #20] - 803a284: f002 fc9c bl 803cbc0 - 803a288: 4603 mov r3, r0 - 803a28a: 73fb strb r3, [r7, #15] + 803a304: 2112 movs r1, #18 + 803a306: 6978 ldr r0, [r7, #20] + 803a308: f002 fc9c bl 803cc44 + 803a30c: 4603 mov r3, r0 + 803a30e: 73fb strb r3, [r7, #15] if (rc != ERR_OK) { - 803a28c: f997 300f ldrsb.w r3, [r7, #15] - 803a290: 2b00 cmp r3, #0 - 803a292: d004 beq.n 803a29e + 803a310: f997 300f ldrsb.w r3, [r7, #15] + 803a314: 2b00 cmp r3, #0 + 803a316: d004 beq.n 803a322 tcp_abandon(npcb, 0); - 803a294: 2100 movs r1, #0 - 803a296: 6978 ldr r0, [r7, #20] - 803a298: f7fd ff1a bl 80380d0 + 803a318: 2100 movs r1, #0 + 803a31a: 6978 ldr r0, [r7, #20] + 803a31c: f7fd ff1a bl 8038154 return; - 803a29c: e006 b.n 803a2ac + 803a320: e006 b.n 803a330 tcp_output(npcb); - 803a29e: 6978 ldr r0, [r7, #20] - 803a2a0: f002 fd7c bl 803cd9c + 803a322: 6978 ldr r0, [r7, #20] + 803a324: f002 fd7c bl 803ce20 return; - 803a2a4: e001 b.n 803a2aa + 803a328: e001 b.n 803a32e return; - 803a2a6: bf00 nop - 803a2a8: e000 b.n 803a2ac + 803a32a: bf00 nop + 803a32c: e000 b.n 803a330 return; - 803a2aa: bf00 nop -} - 803a2ac: 371c adds r7, #28 - 803a2ae: 46bd mov sp, r7 - 803a2b0: bd90 pop {r4, r7, pc} - 803a2b2: bf00 nop - 803a2b4: 2400e99c .word 0x2400e99c - 803a2b8: 08043500 .word 0x08043500 - 803a2bc: 080436f8 .word 0x080436f8 - 803a2c0: 0804354c .word 0x0804354c - 803a2c4: 2400e994 .word 0x2400e994 - 803a2c8: 2400e99a .word 0x2400e99a - 803a2cc: 2400e990 .word 0x2400e990 - 803a2d0: 2400e980 .word 0x2400e980 - 803a2d4: 2400b9cc .word 0x2400b9cc - 803a2d8: 2400b9d0 .word 0x2400b9d0 - 803a2dc: 2400b9bc .word 0x2400b9bc - 803a2e0: 2400e964 .word 0x2400e964 - 803a2e4: 2400e96c .word 0x2400e96c - -0803a2e8 : + 803a32e: bf00 nop +} + 803a330: 371c adds r7, #28 + 803a332: 46bd mov sp, r7 + 803a334: bd90 pop {r4, r7, pc} + 803a336: bf00 nop + 803a338: 2400e9a4 .word 0x2400e9a4 + 803a33c: 08043580 .word 0x08043580 + 803a340: 08043778 .word 0x08043778 + 803a344: 080435cc .word 0x080435cc + 803a348: 2400e99c .word 0x2400e99c + 803a34c: 2400e9a2 .word 0x2400e9a2 + 803a350: 2400e998 .word 0x2400e998 + 803a354: 2400e988 .word 0x2400e988 + 803a358: 2400b9d4 .word 0x2400b9d4 + 803a35c: 2400b9d8 .word 0x2400b9d8 + 803a360: 2400b9c4 .word 0x2400b9c4 + 803a364: 2400e96c .word 0x2400e96c + 803a368: 2400e974 .word 0x2400e974 + +0803a36c : * @note the segment which arrived is saved in global variables, therefore only the pcb * involved is passed as a parameter to this function */ static void tcp_timewait_input(struct tcp_pcb *pcb) { - 803a2e8: b580 push {r7, lr} - 803a2ea: b086 sub sp, #24 - 803a2ec: af04 add r7, sp, #16 - 803a2ee: 6078 str r0, [r7, #4] + 803a36c: b580 push {r7, lr} + 803a36e: b086 sub sp, #24 + 803a370: af04 add r7, sp, #16 + 803a372: 6078 str r0, [r7, #4] /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */ /* RFC 793 3.9 Event Processing - Segment Arrives: * - first check sequence number - we skip that one in TIME_WAIT (always * acceptable since we only send ACKs) * - second check the RST bit (... return) */ if (flags & TCP_RST) { - 803a2f0: 4b2f ldr r3, [pc, #188] ; (803a3b0 ) - 803a2f2: 781b ldrb r3, [r3, #0] - 803a2f4: f003 0304 and.w r3, r3, #4 - 803a2f8: 2b00 cmp r3, #0 - 803a2fa: d153 bne.n 803a3a4 + 803a374: 4b2f ldr r3, [pc, #188] ; (803a434 ) + 803a376: 781b ldrb r3, [r3, #0] + 803a378: f003 0304 and.w r3, r3, #4 + 803a37c: 2b00 cmp r3, #0 + 803a37e: d153 bne.n 803a428 return; } LWIP_ASSERT("tcp_timewait_input: invalid pcb", pcb != NULL); - 803a2fc: 687b ldr r3, [r7, #4] - 803a2fe: 2b00 cmp r3, #0 - 803a300: d106 bne.n 803a310 - 803a302: 4b2c ldr r3, [pc, #176] ; (803a3b4 ) - 803a304: f240 22ee movw r2, #750 ; 0x2ee - 803a308: 492b ldr r1, [pc, #172] ; (803a3b8 ) - 803a30a: 482c ldr r0, [pc, #176] ; (803a3bc ) - 803a30c: f006 fc00 bl 8040b10 + 803a380: 687b ldr r3, [r7, #4] + 803a382: 2b00 cmp r3, #0 + 803a384: d106 bne.n 803a394 + 803a386: 4b2c ldr r3, [pc, #176] ; (803a438 ) + 803a388: f240 22ee movw r2, #750 ; 0x2ee + 803a38c: 492b ldr r1, [pc, #172] ; (803a43c ) + 803a38e: 482c ldr r0, [pc, #176] ; (803a440 ) + 803a390: f006 fc00 bl 8040b94 /* - fourth, check the SYN bit, */ if (flags & TCP_SYN) { - 803a310: 4b27 ldr r3, [pc, #156] ; (803a3b0 ) - 803a312: 781b ldrb r3, [r3, #0] - 803a314: f003 0302 and.w r3, r3, #2 - 803a318: 2b00 cmp r3, #0 - 803a31a: d02a beq.n 803a372 + 803a394: 4b27 ldr r3, [pc, #156] ; (803a434 ) + 803a396: 781b ldrb r3, [r3, #0] + 803a398: f003 0302 and.w r3, r3, #2 + 803a39c: 2b00 cmp r3, #0 + 803a39e: d02a beq.n 803a3f6 /* If an incoming segment is not acceptable, an acknowledgment should be sent in reply */ if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd)) { - 803a31c: 4b28 ldr r3, [pc, #160] ; (803a3c0 ) - 803a31e: 681a ldr r2, [r3, #0] - 803a320: 687b ldr r3, [r7, #4] - 803a322: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a324: 1ad3 subs r3, r2, r3 - 803a326: 2b00 cmp r3, #0 - 803a328: db2d blt.n 803a386 - 803a32a: 4b25 ldr r3, [pc, #148] ; (803a3c0 ) - 803a32c: 681a ldr r2, [r3, #0] - 803a32e: 687b ldr r3, [r7, #4] - 803a330: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a332: 6879 ldr r1, [r7, #4] - 803a334: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803a336: 440b add r3, r1 - 803a338: 1ad3 subs r3, r2, r3 - 803a33a: 2b00 cmp r3, #0 - 803a33c: dc23 bgt.n 803a386 + 803a3a0: 4b28 ldr r3, [pc, #160] ; (803a444 ) + 803a3a2: 681a ldr r2, [r3, #0] + 803a3a4: 687b ldr r3, [r7, #4] + 803a3a6: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a3a8: 1ad3 subs r3, r2, r3 + 803a3aa: 2b00 cmp r3, #0 + 803a3ac: db2d blt.n 803a40a + 803a3ae: 4b25 ldr r3, [pc, #148] ; (803a444 ) + 803a3b0: 681a ldr r2, [r3, #0] + 803a3b2: 687b ldr r3, [r7, #4] + 803a3b4: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a3b6: 6879 ldr r1, [r7, #4] + 803a3b8: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803a3ba: 440b add r3, r1 + 803a3bc: 1ad3 subs r3, r2, r3 + 803a3be: 2b00 cmp r3, #0 + 803a3c0: dc23 bgt.n 803a40a /* If the SYN is in the window it is an error, send a reset */ tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a33e: 4b21 ldr r3, [pc, #132] ; (803a3c4 ) - 803a340: 6819 ldr r1, [r3, #0] - 803a342: 4b21 ldr r3, [pc, #132] ; (803a3c8 ) - 803a344: 881b ldrh r3, [r3, #0] - 803a346: 461a mov r2, r3 - 803a348: 4b1d ldr r3, [pc, #116] ; (803a3c0 ) - 803a34a: 681b ldr r3, [r3, #0] - 803a34c: 18d0 adds r0, r2, r3 + 803a3c2: 4b21 ldr r3, [pc, #132] ; (803a448 ) + 803a3c4: 6819 ldr r1, [r3, #0] + 803a3c6: 4b21 ldr r3, [pc, #132] ; (803a44c ) + 803a3c8: 881b ldrh r3, [r3, #0] + 803a3ca: 461a mov r2, r3 + 803a3cc: 4b1d ldr r3, [pc, #116] ; (803a444 ) + 803a3ce: 681b ldr r3, [r3, #0] + 803a3d0: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a34e: 4b1f ldr r3, [pc, #124] ; (803a3cc ) - 803a350: 681b ldr r3, [r3, #0] + 803a3d2: 4b1f ldr r3, [pc, #124] ; (803a450 ) + 803a3d4: 681b ldr r3, [r3, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a352: 885b ldrh r3, [r3, #2] - 803a354: b29b uxth r3, r3 + 803a3d6: 885b ldrh r3, [r3, #2] + 803a3d8: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a356: 4a1d ldr r2, [pc, #116] ; (803a3cc ) - 803a358: 6812 ldr r2, [r2, #0] + 803a3da: 4a1d ldr r2, [pc, #116] ; (803a450 ) + 803a3dc: 6812 ldr r2, [r2, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a35a: 8812 ldrh r2, [r2, #0] - 803a35c: b292 uxth r2, r2 - 803a35e: 9202 str r2, [sp, #8] - 803a360: 9301 str r3, [sp, #4] - 803a362: 4b1b ldr r3, [pc, #108] ; (803a3d0 ) - 803a364: 9300 str r3, [sp, #0] - 803a366: 4b1b ldr r3, [pc, #108] ; (803a3d4 ) - 803a368: 4602 mov r2, r0 - 803a36a: 6878 ldr r0, [r7, #4] - 803a36c: f003 faca bl 803d904 + 803a3de: 8812 ldrh r2, [r2, #0] + 803a3e0: b292 uxth r2, r2 + 803a3e2: 9202 str r2, [sp, #8] + 803a3e4: 9301 str r3, [sp, #4] + 803a3e6: 4b1b ldr r3, [pc, #108] ; (803a454 ) + 803a3e8: 9300 str r3, [sp, #0] + 803a3ea: 4b1b ldr r3, [pc, #108] ; (803a458 ) + 803a3ec: 4602 mov r2, r0 + 803a3ee: 6878 ldr r0, [r7, #4] + 803a3f0: f003 faca bl 803d988 return; - 803a370: e01b b.n 803a3aa + 803a3f4: e01b b.n 803a42e } } else if (flags & TCP_FIN) { - 803a372: 4b0f ldr r3, [pc, #60] ; (803a3b0 ) - 803a374: 781b ldrb r3, [r3, #0] - 803a376: f003 0301 and.w r3, r3, #1 - 803a37a: 2b00 cmp r3, #0 - 803a37c: d003 beq.n 803a386 + 803a3f6: 4b0f ldr r3, [pc, #60] ; (803a434 ) + 803a3f8: 781b ldrb r3, [r3, #0] + 803a3fa: f003 0301 and.w r3, r3, #1 + 803a3fe: 2b00 cmp r3, #0 + 803a400: d003 beq.n 803a40a /* - eighth, check the FIN bit: Remain in the TIME-WAIT state. Restart the 2 MSL time-wait timeout.*/ pcb->tmr = tcp_ticks; - 803a37e: 4b16 ldr r3, [pc, #88] ; (803a3d8 ) - 803a380: 681a ldr r2, [r3, #0] - 803a382: 687b ldr r3, [r7, #4] - 803a384: 621a str r2, [r3, #32] + 803a402: 4b16 ldr r3, [pc, #88] ; (803a45c ) + 803a404: 681a ldr r2, [r3, #0] + 803a406: 687b ldr r3, [r7, #4] + 803a408: 621a str r2, [r3, #32] } if ((tcplen > 0)) { - 803a386: 4b10 ldr r3, [pc, #64] ; (803a3c8 ) - 803a388: 881b ldrh r3, [r3, #0] - 803a38a: 2b00 cmp r3, #0 - 803a38c: d00c beq.n 803a3a8 + 803a40a: 4b10 ldr r3, [pc, #64] ; (803a44c ) + 803a40c: 881b ldrh r3, [r3, #0] + 803a40e: 2b00 cmp r3, #0 + 803a410: d00c beq.n 803a42c /* Acknowledge data, FIN or out-of-window SYN */ tcp_ack_now(pcb); - 803a38e: 687b ldr r3, [r7, #4] - 803a390: 8b5b ldrh r3, [r3, #26] - 803a392: f043 0302 orr.w r3, r3, #2 - 803a396: b29a uxth r2, r3 - 803a398: 687b ldr r3, [r7, #4] - 803a39a: 835a strh r2, [r3, #26] + 803a412: 687b ldr r3, [r7, #4] + 803a414: 8b5b ldrh r3, [r3, #26] + 803a416: f043 0302 orr.w r3, r3, #2 + 803a41a: b29a uxth r2, r3 + 803a41c: 687b ldr r3, [r7, #4] + 803a41e: 835a strh r2, [r3, #26] tcp_output(pcb); - 803a39c: 6878 ldr r0, [r7, #4] - 803a39e: f002 fcfd bl 803cd9c + 803a420: 6878 ldr r0, [r7, #4] + 803a422: f002 fcfd bl 803ce20 } return; - 803a3a2: e001 b.n 803a3a8 + 803a426: e001 b.n 803a42c return; - 803a3a4: bf00 nop - 803a3a6: e000 b.n 803a3aa + 803a428: bf00 nop + 803a42a: e000 b.n 803a42e return; - 803a3a8: bf00 nop -} - 803a3aa: 3708 adds r7, #8 - 803a3ac: 46bd mov sp, r7 - 803a3ae: bd80 pop {r7, pc} - 803a3b0: 2400e99c .word 0x2400e99c - 803a3b4: 08043500 .word 0x08043500 - 803a3b8: 08043718 .word 0x08043718 - 803a3bc: 0804354c .word 0x0804354c - 803a3c0: 2400e990 .word 0x2400e990 - 803a3c4: 2400e994 .word 0x2400e994 - 803a3c8: 2400e99a .word 0x2400e99a - 803a3cc: 2400e980 .word 0x2400e980 - 803a3d0: 2400b9cc .word 0x2400b9cc - 803a3d4: 2400b9d0 .word 0x2400b9d0 - 803a3d8: 2400e958 .word 0x2400e958 - -0803a3dc : + 803a42c: bf00 nop +} + 803a42e: 3708 adds r7, #8 + 803a430: 46bd mov sp, r7 + 803a432: bd80 pop {r7, pc} + 803a434: 2400e9a4 .word 0x2400e9a4 + 803a438: 08043580 .word 0x08043580 + 803a43c: 08043798 .word 0x08043798 + 803a440: 080435cc .word 0x080435cc + 803a444: 2400e998 .word 0x2400e998 + 803a448: 2400e99c .word 0x2400e99c + 803a44c: 2400e9a2 .word 0x2400e9a2 + 803a450: 2400e988 .word 0x2400e988 + 803a454: 2400b9d4 .word 0x2400b9d4 + 803a458: 2400b9d8 .word 0x2400b9d8 + 803a45c: 2400e960 .word 0x2400e960 + +0803a460 : * @note the segment which arrived is saved in global variables, therefore only the pcb * involved is passed as a parameter to this function */ static err_t tcp_process(struct tcp_pcb *pcb) { - 803a3dc: b590 push {r4, r7, lr} - 803a3de: b08d sub sp, #52 ; 0x34 - 803a3e0: af04 add r7, sp, #16 - 803a3e2: 6078 str r0, [r7, #4] + 803a460: b590 push {r4, r7, lr} + 803a462: b08d sub sp, #52 ; 0x34 + 803a464: af04 add r7, sp, #16 + 803a466: 6078 str r0, [r7, #4] struct tcp_seg *rseg; u8_t acceptable = 0; - 803a3e4: 2300 movs r3, #0 - 803a3e6: 76fb strb r3, [r7, #27] + 803a468: 2300 movs r3, #0 + 803a46a: 76fb strb r3, [r7, #27] err_t err; err = ERR_OK; - 803a3e8: 2300 movs r3, #0 - 803a3ea: 76bb strb r3, [r7, #26] + 803a46c: 2300 movs r3, #0 + 803a46e: 76bb strb r3, [r7, #26] LWIP_ASSERT("tcp_process: invalid pcb", pcb != NULL); - 803a3ec: 687b ldr r3, [r7, #4] - 803a3ee: 2b00 cmp r3, #0 - 803a3f0: d106 bne.n 803a400 - 803a3f2: 4b9d ldr r3, [pc, #628] ; (803a668 ) - 803a3f4: f44f 7247 mov.w r2, #796 ; 0x31c - 803a3f8: 499c ldr r1, [pc, #624] ; (803a66c ) - 803a3fa: 489d ldr r0, [pc, #628] ; (803a670 ) - 803a3fc: f006 fb88 bl 8040b10 + 803a470: 687b ldr r3, [r7, #4] + 803a472: 2b00 cmp r3, #0 + 803a474: d106 bne.n 803a484 + 803a476: 4b9d ldr r3, [pc, #628] ; (803a6ec ) + 803a478: f44f 7247 mov.w r2, #796 ; 0x31c + 803a47c: 499c ldr r1, [pc, #624] ; (803a6f0 ) + 803a47e: 489d ldr r0, [pc, #628] ; (803a6f4 ) + 803a480: f006 fb88 bl 8040b94 /* Process incoming RST segments. */ if (flags & TCP_RST) { - 803a400: 4b9c ldr r3, [pc, #624] ; (803a674 ) - 803a402: 781b ldrb r3, [r3, #0] - 803a404: f003 0304 and.w r3, r3, #4 - 803a408: 2b00 cmp r3, #0 - 803a40a: d04e beq.n 803a4aa + 803a484: 4b9c ldr r3, [pc, #624] ; (803a6f8 ) + 803a486: 781b ldrb r3, [r3, #0] + 803a488: f003 0304 and.w r3, r3, #4 + 803a48c: 2b00 cmp r3, #0 + 803a48e: d04e beq.n 803a52e /* First, determine if the reset is acceptable. */ if (pcb->state == SYN_SENT) { - 803a40c: 687b ldr r3, [r7, #4] - 803a40e: 7d1b ldrb r3, [r3, #20] - 803a410: 2b02 cmp r3, #2 - 803a412: d108 bne.n 803a426 + 803a490: 687b ldr r3, [r7, #4] + 803a492: 7d1b ldrb r3, [r3, #20] + 803a494: 2b02 cmp r3, #2 + 803a496: d108 bne.n 803a4aa /* "In the SYN-SENT state (a RST received in response to an initial SYN), the RST is acceptable if the ACK field acknowledges the SYN." */ if (ackno == pcb->snd_nxt) { - 803a414: 687b ldr r3, [r7, #4] - 803a416: 6d1a ldr r2, [r3, #80] ; 0x50 - 803a418: 4b97 ldr r3, [pc, #604] ; (803a678 ) - 803a41a: 681b ldr r3, [r3, #0] - 803a41c: 429a cmp r2, r3 - 803a41e: d123 bne.n 803a468 + 803a498: 687b ldr r3, [r7, #4] + 803a49a: 6d1a ldr r2, [r3, #80] ; 0x50 + 803a49c: 4b97 ldr r3, [pc, #604] ; (803a6fc ) + 803a49e: 681b ldr r3, [r3, #0] + 803a4a0: 429a cmp r2, r3 + 803a4a2: d123 bne.n 803a4ec acceptable = 1; - 803a420: 2301 movs r3, #1 - 803a422: 76fb strb r3, [r7, #27] - 803a424: e020 b.n 803a468 + 803a4a4: 2301 movs r3, #1 + 803a4a6: 76fb strb r3, [r7, #27] + 803a4a8: e020 b.n 803a4ec } } else { /* "In all states except SYN-SENT, all reset (RST) segments are validated by checking their SEQ-fields." */ if (seqno == pcb->rcv_nxt) { - 803a426: 687b ldr r3, [r7, #4] - 803a428: 6a5a ldr r2, [r3, #36] ; 0x24 - 803a42a: 4b94 ldr r3, [pc, #592] ; (803a67c ) - 803a42c: 681b ldr r3, [r3, #0] - 803a42e: 429a cmp r2, r3 - 803a430: d102 bne.n 803a438 + 803a4aa: 687b ldr r3, [r7, #4] + 803a4ac: 6a5a ldr r2, [r3, #36] ; 0x24 + 803a4ae: 4b94 ldr r3, [pc, #592] ; (803a700 ) + 803a4b0: 681b ldr r3, [r3, #0] + 803a4b2: 429a cmp r2, r3 + 803a4b4: d102 bne.n 803a4bc acceptable = 1; - 803a432: 2301 movs r3, #1 - 803a434: 76fb strb r3, [r7, #27] - 803a436: e017 b.n 803a468 + 803a4b6: 2301 movs r3, #1 + 803a4b8: 76fb strb r3, [r7, #27] + 803a4ba: e017 b.n 803a4ec } else if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, - 803a438: 4b90 ldr r3, [pc, #576] ; (803a67c ) - 803a43a: 681a ldr r2, [r3, #0] - 803a43c: 687b ldr r3, [r7, #4] - 803a43e: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a440: 1ad3 subs r3, r2, r3 - 803a442: 2b00 cmp r3, #0 - 803a444: db10 blt.n 803a468 - 803a446: 4b8d ldr r3, [pc, #564] ; (803a67c ) - 803a448: 681a ldr r2, [r3, #0] - 803a44a: 687b ldr r3, [r7, #4] - 803a44c: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a44e: 6879 ldr r1, [r7, #4] - 803a450: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803a452: 440b add r3, r1 - 803a454: 1ad3 subs r3, r2, r3 - 803a456: 2b00 cmp r3, #0 - 803a458: dc06 bgt.n 803a468 + 803a4bc: 4b90 ldr r3, [pc, #576] ; (803a700 ) + 803a4be: 681a ldr r2, [r3, #0] + 803a4c0: 687b ldr r3, [r7, #4] + 803a4c2: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a4c4: 1ad3 subs r3, r2, r3 + 803a4c6: 2b00 cmp r3, #0 + 803a4c8: db10 blt.n 803a4ec + 803a4ca: 4b8d ldr r3, [pc, #564] ; (803a700 ) + 803a4cc: 681a ldr r2, [r3, #0] + 803a4ce: 687b ldr r3, [r7, #4] + 803a4d0: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a4d2: 6879 ldr r1, [r7, #4] + 803a4d4: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803a4d6: 440b add r3, r1 + 803a4d8: 1ad3 subs r3, r2, r3 + 803a4da: 2b00 cmp r3, #0 + 803a4dc: dc06 bgt.n 803a4ec pcb->rcv_nxt + pcb->rcv_wnd)) { /* If the sequence number is inside the window, we send a challenge ACK and wait for a re-send with matching sequence number. This follows RFC 5961 section 3.2 and addresses CVE-2004-0230 (RST spoofing attack), which is present in RFC 793 RST handling. */ tcp_ack_now(pcb); - 803a45a: 687b ldr r3, [r7, #4] - 803a45c: 8b5b ldrh r3, [r3, #26] - 803a45e: f043 0302 orr.w r3, r3, #2 - 803a462: b29a uxth r2, r3 - 803a464: 687b ldr r3, [r7, #4] - 803a466: 835a strh r2, [r3, #26] + 803a4de: 687b ldr r3, [r7, #4] + 803a4e0: 8b5b ldrh r3, [r3, #26] + 803a4e2: f043 0302 orr.w r3, r3, #2 + 803a4e6: b29a uxth r2, r3 + 803a4e8: 687b ldr r3, [r7, #4] + 803a4ea: 835a strh r2, [r3, #26] } } if (acceptable) { - 803a468: 7efb ldrb r3, [r7, #27] - 803a46a: 2b00 cmp r3, #0 - 803a46c: d01b beq.n 803a4a6 + 803a4ec: 7efb ldrb r3, [r7, #27] + 803a4ee: 2b00 cmp r3, #0 + 803a4f0: d01b beq.n 803a52a LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n")); LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED); - 803a46e: 687b ldr r3, [r7, #4] - 803a470: 7d1b ldrb r3, [r3, #20] - 803a472: 2b00 cmp r3, #0 - 803a474: d106 bne.n 803a484 - 803a476: 4b7c ldr r3, [pc, #496] ; (803a668 ) - 803a478: f44f 724e mov.w r2, #824 ; 0x338 - 803a47c: 4980 ldr r1, [pc, #512] ; (803a680 ) - 803a47e: 487c ldr r0, [pc, #496] ; (803a670 ) - 803a480: f006 fb46 bl 8040b10 + 803a4f2: 687b ldr r3, [r7, #4] + 803a4f4: 7d1b ldrb r3, [r3, #20] + 803a4f6: 2b00 cmp r3, #0 + 803a4f8: d106 bne.n 803a508 + 803a4fa: 4b7c ldr r3, [pc, #496] ; (803a6ec ) + 803a4fc: f44f 724e mov.w r2, #824 ; 0x338 + 803a500: 4980 ldr r1, [pc, #512] ; (803a704 ) + 803a502: 487c ldr r0, [pc, #496] ; (803a6f4 ) + 803a504: f006 fb46 bl 8040b94 recv_flags |= TF_RESET; - 803a484: 4b7f ldr r3, [pc, #508] ; (803a684 ) - 803a486: 781b ldrb r3, [r3, #0] - 803a488: f043 0308 orr.w r3, r3, #8 - 803a48c: b2da uxtb r2, r3 - 803a48e: 4b7d ldr r3, [pc, #500] ; (803a684 ) - 803a490: 701a strb r2, [r3, #0] + 803a508: 4b7f ldr r3, [pc, #508] ; (803a708 ) + 803a50a: 781b ldrb r3, [r3, #0] + 803a50c: f043 0308 orr.w r3, r3, #8 + 803a510: b2da uxtb r2, r3 + 803a512: 4b7d ldr r3, [pc, #500] ; (803a708 ) + 803a514: 701a strb r2, [r3, #0] tcp_clear_flags(pcb, TF_ACK_DELAY); - 803a492: 687b ldr r3, [r7, #4] - 803a494: 8b5b ldrh r3, [r3, #26] - 803a496: f023 0301 bic.w r3, r3, #1 - 803a49a: b29a uxth r2, r3 - 803a49c: 687b ldr r3, [r7, #4] - 803a49e: 835a strh r2, [r3, #26] + 803a516: 687b ldr r3, [r7, #4] + 803a518: 8b5b ldrh r3, [r3, #26] + 803a51a: f023 0301 bic.w r3, r3, #1 + 803a51e: b29a uxth r2, r3 + 803a520: 687b ldr r3, [r7, #4] + 803a522: 835a strh r2, [r3, #26] return ERR_RST; - 803a4a0: f06f 030d mvn.w r3, #13 - 803a4a4: e37a b.n 803ab9c + 803a524: f06f 030d mvn.w r3, #13 + 803a528: e37a b.n 803ac20 } else { LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", seqno, pcb->rcv_nxt)); LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", seqno, pcb->rcv_nxt)); return ERR_OK; - 803a4a6: 2300 movs r3, #0 - 803a4a8: e378 b.n 803ab9c + 803a52a: 2300 movs r3, #0 + 803a52c: e378 b.n 803ac20 } } if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) { - 803a4aa: 4b72 ldr r3, [pc, #456] ; (803a674 ) - 803a4ac: 781b ldrb r3, [r3, #0] - 803a4ae: f003 0302 and.w r3, r3, #2 - 803a4b2: 2b00 cmp r3, #0 - 803a4b4: d010 beq.n 803a4d8 - 803a4b6: 687b ldr r3, [r7, #4] - 803a4b8: 7d1b ldrb r3, [r3, #20] - 803a4ba: 2b02 cmp r3, #2 - 803a4bc: d00c beq.n 803a4d8 - 803a4be: 687b ldr r3, [r7, #4] - 803a4c0: 7d1b ldrb r3, [r3, #20] - 803a4c2: 2b03 cmp r3, #3 - 803a4c4: d008 beq.n 803a4d8 + 803a52e: 4b72 ldr r3, [pc, #456] ; (803a6f8 ) + 803a530: 781b ldrb r3, [r3, #0] + 803a532: f003 0302 and.w r3, r3, #2 + 803a536: 2b00 cmp r3, #0 + 803a538: d010 beq.n 803a55c + 803a53a: 687b ldr r3, [r7, #4] + 803a53c: 7d1b ldrb r3, [r3, #20] + 803a53e: 2b02 cmp r3, #2 + 803a540: d00c beq.n 803a55c + 803a542: 687b ldr r3, [r7, #4] + 803a544: 7d1b ldrb r3, [r3, #20] + 803a546: 2b03 cmp r3, #3 + 803a548: d008 beq.n 803a55c /* Cope with new connection attempt after remote end crashed */ tcp_ack_now(pcb); - 803a4c6: 687b ldr r3, [r7, #4] - 803a4c8: 8b5b ldrh r3, [r3, #26] - 803a4ca: f043 0302 orr.w r3, r3, #2 - 803a4ce: b29a uxth r2, r3 - 803a4d0: 687b ldr r3, [r7, #4] - 803a4d2: 835a strh r2, [r3, #26] + 803a54a: 687b ldr r3, [r7, #4] + 803a54c: 8b5b ldrh r3, [r3, #26] + 803a54e: f043 0302 orr.w r3, r3, #2 + 803a552: b29a uxth r2, r3 + 803a554: 687b ldr r3, [r7, #4] + 803a556: 835a strh r2, [r3, #26] return ERR_OK; - 803a4d4: 2300 movs r3, #0 - 803a4d6: e361 b.n 803ab9c + 803a558: 2300 movs r3, #0 + 803a55a: e361 b.n 803ac20 } if ((pcb->flags & TF_RXCLOSED) == 0) { - 803a4d8: 687b ldr r3, [r7, #4] - 803a4da: 8b5b ldrh r3, [r3, #26] - 803a4dc: f003 0310 and.w r3, r3, #16 - 803a4e0: 2b00 cmp r3, #0 - 803a4e2: d103 bne.n 803a4ec + 803a55c: 687b ldr r3, [r7, #4] + 803a55e: 8b5b ldrh r3, [r3, #26] + 803a560: f003 0310 and.w r3, r3, #16 + 803a564: 2b00 cmp r3, #0 + 803a566: d103 bne.n 803a570 /* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */ pcb->tmr = tcp_ticks; - 803a4e4: 4b68 ldr r3, [pc, #416] ; (803a688 ) - 803a4e6: 681a ldr r2, [r3, #0] - 803a4e8: 687b ldr r3, [r7, #4] - 803a4ea: 621a str r2, [r3, #32] + 803a568: 4b68 ldr r3, [pc, #416] ; (803a70c ) + 803a56a: 681a ldr r2, [r3, #0] + 803a56c: 687b ldr r3, [r7, #4] + 803a56e: 621a str r2, [r3, #32] } pcb->keep_cnt_sent = 0; - 803a4ec: 687b ldr r3, [r7, #4] - 803a4ee: 2200 movs r2, #0 - 803a4f0: f883 209b strb.w r2, [r3, #155] ; 0x9b + 803a570: 687b ldr r3, [r7, #4] + 803a572: 2200 movs r2, #0 + 803a574: f883 209b strb.w r2, [r3, #155] ; 0x9b pcb->persist_probe = 0; - 803a4f4: 687b ldr r3, [r7, #4] - 803a4f6: 2200 movs r2, #0 - 803a4f8: f883 209a strb.w r2, [r3, #154] ; 0x9a + 803a578: 687b ldr r3, [r7, #4] + 803a57a: 2200 movs r2, #0 + 803a57c: f883 209a strb.w r2, [r3, #154] ; 0x9a tcp_parseopt(pcb); - 803a4fc: 6878 ldr r0, [r7, #4] - 803a4fe: f001 fc2f bl 803bd60 + 803a580: 6878 ldr r0, [r7, #4] + 803a582: f001 fc2f bl 803bde4 /* Do different things depending on the TCP state. */ switch (pcb->state) { - 803a502: 687b ldr r3, [r7, #4] - 803a504: 7d1b ldrb r3, [r3, #20] - 803a506: 3b02 subs r3, #2 - 803a508: 2b07 cmp r3, #7 - 803a50a: f200 8337 bhi.w 803ab7c - 803a50e: a201 add r2, pc, #4 ; (adr r2, 803a514 ) - 803a510: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 803a514: 0803a535 .word 0x0803a535 - 803a518: 0803a765 .word 0x0803a765 - 803a51c: 0803a8dd .word 0x0803a8dd - 803a520: 0803a907 .word 0x0803a907 - 803a524: 0803aa2b .word 0x0803aa2b - 803a528: 0803a8dd .word 0x0803a8dd - 803a52c: 0803aab7 .word 0x0803aab7 - 803a530: 0803ab47 .word 0x0803ab47 + 803a586: 687b ldr r3, [r7, #4] + 803a588: 7d1b ldrb r3, [r3, #20] + 803a58a: 3b02 subs r3, #2 + 803a58c: 2b07 cmp r3, #7 + 803a58e: f200 8337 bhi.w 803ac00 + 803a592: a201 add r2, pc, #4 ; (adr r2, 803a598 ) + 803a594: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 803a598: 0803a5b9 .word 0x0803a5b9 + 803a59c: 0803a7e9 .word 0x0803a7e9 + 803a5a0: 0803a961 .word 0x0803a961 + 803a5a4: 0803a98b .word 0x0803a98b + 803a5a8: 0803aaaf .word 0x0803aaaf + 803a5ac: 0803a961 .word 0x0803a961 + 803a5b0: 0803ab3b .word 0x0803ab3b + 803a5b4: 0803abcb .word 0x0803abcb case SYN_SENT: LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno, pcb->snd_nxt, lwip_ntohl(pcb->unacked->tcphdr->seqno))); /* received SYN ACK with expected sequence number? */ if ((flags & TCP_ACK) && (flags & TCP_SYN) - 803a534: 4b4f ldr r3, [pc, #316] ; (803a674 ) - 803a536: 781b ldrb r3, [r3, #0] - 803a538: f003 0310 and.w r3, r3, #16 - 803a53c: 2b00 cmp r3, #0 - 803a53e: f000 80e4 beq.w 803a70a - 803a542: 4b4c ldr r3, [pc, #304] ; (803a674 ) - 803a544: 781b ldrb r3, [r3, #0] - 803a546: f003 0302 and.w r3, r3, #2 - 803a54a: 2b00 cmp r3, #0 - 803a54c: f000 80dd beq.w 803a70a + 803a5b8: 4b4f ldr r3, [pc, #316] ; (803a6f8 ) + 803a5ba: 781b ldrb r3, [r3, #0] + 803a5bc: f003 0310 and.w r3, r3, #16 + 803a5c0: 2b00 cmp r3, #0 + 803a5c2: f000 80e4 beq.w 803a78e + 803a5c6: 4b4c ldr r3, [pc, #304] ; (803a6f8 ) + 803a5c8: 781b ldrb r3, [r3, #0] + 803a5ca: f003 0302 and.w r3, r3, #2 + 803a5ce: 2b00 cmp r3, #0 + 803a5d0: f000 80dd beq.w 803a78e && (ackno == pcb->lastack + 1)) { - 803a550: 687b ldr r3, [r7, #4] - 803a552: 6c5b ldr r3, [r3, #68] ; 0x44 - 803a554: 1c5a adds r2, r3, #1 - 803a556: 4b48 ldr r3, [pc, #288] ; (803a678 ) - 803a558: 681b ldr r3, [r3, #0] - 803a55a: 429a cmp r2, r3 - 803a55c: f040 80d5 bne.w 803a70a + 803a5d4: 687b ldr r3, [r7, #4] + 803a5d6: 6c5b ldr r3, [r3, #68] ; 0x44 + 803a5d8: 1c5a adds r2, r3, #1 + 803a5da: 4b48 ldr r3, [pc, #288] ; (803a6fc ) + 803a5dc: 681b ldr r3, [r3, #0] + 803a5de: 429a cmp r2, r3 + 803a5e0: f040 80d5 bne.w 803a78e pcb->rcv_nxt = seqno + 1; - 803a560: 4b46 ldr r3, [pc, #280] ; (803a67c ) - 803a562: 681b ldr r3, [r3, #0] - 803a564: 1c5a adds r2, r3, #1 - 803a566: 687b ldr r3, [r7, #4] - 803a568: 625a str r2, [r3, #36] ; 0x24 + 803a5e4: 4b46 ldr r3, [pc, #280] ; (803a700 ) + 803a5e6: 681b ldr r3, [r3, #0] + 803a5e8: 1c5a adds r2, r3, #1 + 803a5ea: 687b ldr r3, [r7, #4] + 803a5ec: 625a str r2, [r3, #36] ; 0x24 pcb->rcv_ann_right_edge = pcb->rcv_nxt; - 803a56a: 687b ldr r3, [r7, #4] - 803a56c: 6a5a ldr r2, [r3, #36] ; 0x24 - 803a56e: 687b ldr r3, [r7, #4] - 803a570: 62da str r2, [r3, #44] ; 0x2c + 803a5ee: 687b ldr r3, [r7, #4] + 803a5f0: 6a5a ldr r2, [r3, #36] ; 0x24 + 803a5f2: 687b ldr r3, [r7, #4] + 803a5f4: 62da str r2, [r3, #44] ; 0x2c pcb->lastack = ackno; - 803a572: 4b41 ldr r3, [pc, #260] ; (803a678 ) - 803a574: 681a ldr r2, [r3, #0] - 803a576: 687b ldr r3, [r7, #4] - 803a578: 645a str r2, [r3, #68] ; 0x44 + 803a5f6: 4b41 ldr r3, [pc, #260] ; (803a6fc ) + 803a5f8: 681a ldr r2, [r3, #0] + 803a5fa: 687b ldr r3, [r7, #4] + 803a5fc: 645a str r2, [r3, #68] ; 0x44 pcb->snd_wnd = tcphdr->wnd; - 803a57a: 4b44 ldr r3, [pc, #272] ; (803a68c ) - 803a57c: 681b ldr r3, [r3, #0] - 803a57e: 89db ldrh r3, [r3, #14] - 803a580: b29a uxth r2, r3 - 803a582: 687b ldr r3, [r7, #4] - 803a584: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 803a5fe: 4b44 ldr r3, [pc, #272] ; (803a710 ) + 803a600: 681b ldr r3, [r3, #0] + 803a602: 89db ldrh r3, [r3, #14] + 803a604: b29a uxth r2, r3 + 803a606: 687b ldr r3, [r7, #4] + 803a608: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 pcb->snd_wnd_max = pcb->snd_wnd; - 803a588: 687b ldr r3, [r7, #4] - 803a58a: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 803a58e: 687b ldr r3, [r7, #4] - 803a590: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 + 803a60c: 687b ldr r3, [r7, #4] + 803a60e: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 803a612: 687b ldr r3, [r7, #4] + 803a614: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */ - 803a594: 4b39 ldr r3, [pc, #228] ; (803a67c ) - 803a596: 681b ldr r3, [r3, #0] - 803a598: 1e5a subs r2, r3, #1 - 803a59a: 687b ldr r3, [r7, #4] - 803a59c: 655a str r2, [r3, #84] ; 0x54 + 803a618: 4b39 ldr r3, [pc, #228] ; (803a700 ) + 803a61a: 681b ldr r3, [r3, #0] + 803a61c: 1e5a subs r2, r3, #1 + 803a61e: 687b ldr r3, [r7, #4] + 803a620: 655a str r2, [r3, #84] ; 0x54 pcb->state = ESTABLISHED; - 803a59e: 687b ldr r3, [r7, #4] - 803a5a0: 2204 movs r2, #4 - 803a5a2: 751a strb r2, [r3, #20] + 803a622: 687b ldr r3, [r7, #4] + 803a624: 2204 movs r2, #4 + 803a626: 751a strb r2, [r3, #20] #if TCP_CALCULATE_EFF_SEND_MSS pcb->mss = tcp_eff_send_mss(pcb->mss, &pcb->local_ip, &pcb->remote_ip); - 803a5a4: 687b ldr r3, [r7, #4] - 803a5a6: 8e5c ldrh r4, [r3, #50] ; 0x32 - 803a5a8: 687b ldr r3, [r7, #4] - 803a5aa: 3304 adds r3, #4 - 803a5ac: 4618 mov r0, r3 - 803a5ae: f004 ff6f bl 803f490 - 803a5b2: 4601 mov r1, r0 - 803a5b4: 687b ldr r3, [r7, #4] - 803a5b6: 3304 adds r3, #4 - 803a5b8: 461a mov r2, r3 - 803a5ba: 4620 mov r0, r4 - 803a5bc: f7ff f88c bl 80396d8 - 803a5c0: 4603 mov r3, r0 - 803a5c2: 461a mov r2, r3 - 803a5c4: 687b ldr r3, [r7, #4] - 803a5c6: 865a strh r2, [r3, #50] ; 0x32 + 803a628: 687b ldr r3, [r7, #4] + 803a62a: 8e5c ldrh r4, [r3, #50] ; 0x32 + 803a62c: 687b ldr r3, [r7, #4] + 803a62e: 3304 adds r3, #4 + 803a630: 4618 mov r0, r3 + 803a632: f004 ff6f bl 803f514 + 803a636: 4601 mov r1, r0 + 803a638: 687b ldr r3, [r7, #4] + 803a63a: 3304 adds r3, #4 + 803a63c: 461a mov r2, r3 + 803a63e: 4620 mov r0, r4 + 803a640: f7ff f88c bl 803975c + 803a644: 4603 mov r3, r0 + 803a646: 461a mov r2, r3 + 803a648: 687b ldr r3, [r7, #4] + 803a64a: 865a strh r2, [r3, #50] ; 0x32 #endif /* TCP_CALCULATE_EFF_SEND_MSS */ pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss); - 803a5c8: 687b ldr r3, [r7, #4] - 803a5ca: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a5cc: 009a lsls r2, r3, #2 - 803a5ce: 687b ldr r3, [r7, #4] - 803a5d0: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a5d2: 005b lsls r3, r3, #1 - 803a5d4: f241 111c movw r1, #4380 ; 0x111c - 803a5d8: 428b cmp r3, r1 - 803a5da: bf38 it cc - 803a5dc: 460b movcc r3, r1 - 803a5de: 429a cmp r2, r3 - 803a5e0: d204 bcs.n 803a5ec - 803a5e2: 687b ldr r3, [r7, #4] - 803a5e4: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a5e6: 009b lsls r3, r3, #2 - 803a5e8: b29b uxth r3, r3 - 803a5ea: e00d b.n 803a608 - 803a5ec: 687b ldr r3, [r7, #4] - 803a5ee: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a5f0: 005b lsls r3, r3, #1 - 803a5f2: f241 121c movw r2, #4380 ; 0x111c - 803a5f6: 4293 cmp r3, r2 - 803a5f8: d904 bls.n 803a604 - 803a5fa: 687b ldr r3, [r7, #4] - 803a5fc: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a5fe: 005b lsls r3, r3, #1 - 803a600: b29b uxth r3, r3 - 803a602: e001 b.n 803a608 - 803a604: f241 131c movw r3, #4380 ; 0x111c - 803a608: 687a ldr r2, [r7, #4] - 803a60a: f8a2 3048 strh.w r3, [r2, #72] ; 0x48 + 803a64c: 687b ldr r3, [r7, #4] + 803a64e: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a650: 009a lsls r2, r3, #2 + 803a652: 687b ldr r3, [r7, #4] + 803a654: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a656: 005b lsls r3, r3, #1 + 803a658: f241 111c movw r1, #4380 ; 0x111c + 803a65c: 428b cmp r3, r1 + 803a65e: bf38 it cc + 803a660: 460b movcc r3, r1 + 803a662: 429a cmp r2, r3 + 803a664: d204 bcs.n 803a670 + 803a666: 687b ldr r3, [r7, #4] + 803a668: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a66a: 009b lsls r3, r3, #2 + 803a66c: b29b uxth r3, r3 + 803a66e: e00d b.n 803a68c + 803a670: 687b ldr r3, [r7, #4] + 803a672: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a674: 005b lsls r3, r3, #1 + 803a676: f241 121c movw r2, #4380 ; 0x111c + 803a67a: 4293 cmp r3, r2 + 803a67c: d904 bls.n 803a688 + 803a67e: 687b ldr r3, [r7, #4] + 803a680: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a682: 005b lsls r3, r3, #1 + 803a684: b29b uxth r3, r3 + 803a686: e001 b.n 803a68c + 803a688: f241 131c movw r3, #4380 ; 0x111c + 803a68c: 687a ldr r2, [r7, #4] + 803a68e: f8a2 3048 strh.w r3, [r2, #72] ; 0x48 LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SENT): cwnd %"TCPWNDSIZE_F " ssthresh %"TCPWNDSIZE_F"\n", pcb->cwnd, pcb->ssthresh)); LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0)); - 803a60e: 687b ldr r3, [r7, #4] - 803a610: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803a614: 2b00 cmp r3, #0 - 803a616: d106 bne.n 803a626 - 803a618: 4b13 ldr r3, [pc, #76] ; (803a668 ) - 803a61a: f44f 725b mov.w r2, #876 ; 0x36c - 803a61e: 491c ldr r1, [pc, #112] ; (803a690 ) - 803a620: 4813 ldr r0, [pc, #76] ; (803a670 ) - 803a622: f006 fa75 bl 8040b10 + 803a692: 687b ldr r3, [r7, #4] + 803a694: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803a698: 2b00 cmp r3, #0 + 803a69a: d106 bne.n 803a6aa + 803a69c: 4b13 ldr r3, [pc, #76] ; (803a6ec ) + 803a69e: f44f 725b mov.w r2, #876 ; 0x36c + 803a6a2: 491c ldr r1, [pc, #112] ; (803a714 ) + 803a6a4: 4813 ldr r0, [pc, #76] ; (803a6f4 ) + 803a6a6: f006 fa75 bl 8040b94 --pcb->snd_queuelen; - 803a626: 687b ldr r3, [r7, #4] - 803a628: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803a62c: 3b01 subs r3, #1 - 803a62e: b29a uxth r2, r3 - 803a630: 687b ldr r3, [r7, #4] - 803a632: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803a6aa: 687b ldr r3, [r7, #4] + 803a6ac: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803a6b0: 3b01 subs r3, #1 + 803a6b2: b29a uxth r2, r3 + 803a6b4: 687b ldr r3, [r7, #4] + 803a6b6: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen)); rseg = pcb->unacked; - 803a636: 687b ldr r3, [r7, #4] - 803a638: 6f1b ldr r3, [r3, #112] ; 0x70 - 803a63a: 61fb str r3, [r7, #28] + 803a6ba: 687b ldr r3, [r7, #4] + 803a6bc: 6f1b ldr r3, [r3, #112] ; 0x70 + 803a6be: 61fb str r3, [r7, #28] if (rseg == NULL) { - 803a63c: 69fb ldr r3, [r7, #28] - 803a63e: 2b00 cmp r3, #0 - 803a640: d12a bne.n 803a698 + 803a6c0: 69fb ldr r3, [r7, #28] + 803a6c2: 2b00 cmp r3, #0 + 803a6c4: d12a bne.n 803a71c /* might happen if tcp_output fails in tcp_rexmit_rto() in which case the segment is on the unsent list */ rseg = pcb->unsent; - 803a642: 687b ldr r3, [r7, #4] - 803a644: 6edb ldr r3, [r3, #108] ; 0x6c - 803a646: 61fb str r3, [r7, #28] + 803a6c6: 687b ldr r3, [r7, #4] + 803a6c8: 6edb ldr r3, [r3, #108] ; 0x6c + 803a6ca: 61fb str r3, [r7, #28] LWIP_ASSERT("no segment to free", rseg != NULL); - 803a648: 69fb ldr r3, [r7, #28] - 803a64a: 2b00 cmp r3, #0 - 803a64c: d106 bne.n 803a65c - 803a64e: 4b06 ldr r3, [pc, #24] ; (803a668 ) - 803a650: f44f 725d mov.w r2, #884 ; 0x374 - 803a654: 490f ldr r1, [pc, #60] ; (803a694 ) - 803a656: 4806 ldr r0, [pc, #24] ; (803a670 ) - 803a658: f006 fa5a bl 8040b10 + 803a6cc: 69fb ldr r3, [r7, #28] + 803a6ce: 2b00 cmp r3, #0 + 803a6d0: d106 bne.n 803a6e0 + 803a6d2: 4b06 ldr r3, [pc, #24] ; (803a6ec ) + 803a6d4: f44f 725d mov.w r2, #884 ; 0x374 + 803a6d8: 490f ldr r1, [pc, #60] ; (803a718 ) + 803a6da: 4806 ldr r0, [pc, #24] ; (803a6f4 ) + 803a6dc: f006 fa5a bl 8040b94 pcb->unsent = rseg->next; - 803a65c: 69fb ldr r3, [r7, #28] - 803a65e: 681a ldr r2, [r3, #0] - 803a660: 687b ldr r3, [r7, #4] - 803a662: 66da str r2, [r3, #108] ; 0x6c - 803a664: e01c b.n 803a6a0 - 803a666: bf00 nop - 803a668: 08043500 .word 0x08043500 - 803a66c: 08043738 .word 0x08043738 - 803a670: 0804354c .word 0x0804354c - 803a674: 2400e99c .word 0x2400e99c - 803a678: 2400e994 .word 0x2400e994 - 803a67c: 2400e990 .word 0x2400e990 - 803a680: 08043754 .word 0x08043754 - 803a684: 2400e99d .word 0x2400e99d - 803a688: 2400e958 .word 0x2400e958 - 803a68c: 2400e980 .word 0x2400e980 - 803a690: 08043774 .word 0x08043774 - 803a694: 0804378c .word 0x0804378c + 803a6e0: 69fb ldr r3, [r7, #28] + 803a6e2: 681a ldr r2, [r3, #0] + 803a6e4: 687b ldr r3, [r7, #4] + 803a6e6: 66da str r2, [r3, #108] ; 0x6c + 803a6e8: e01c b.n 803a724 + 803a6ea: bf00 nop + 803a6ec: 08043580 .word 0x08043580 + 803a6f0: 080437b8 .word 0x080437b8 + 803a6f4: 080435cc .word 0x080435cc + 803a6f8: 2400e9a4 .word 0x2400e9a4 + 803a6fc: 2400e99c .word 0x2400e99c + 803a700: 2400e998 .word 0x2400e998 + 803a704: 080437d4 .word 0x080437d4 + 803a708: 2400e9a5 .word 0x2400e9a5 + 803a70c: 2400e960 .word 0x2400e960 + 803a710: 2400e988 .word 0x2400e988 + 803a714: 080437f4 .word 0x080437f4 + 803a718: 0804380c .word 0x0804380c } else { pcb->unacked = rseg->next; - 803a698: 69fb ldr r3, [r7, #28] - 803a69a: 681a ldr r2, [r3, #0] - 803a69c: 687b ldr r3, [r7, #4] - 803a69e: 671a str r2, [r3, #112] ; 0x70 + 803a71c: 69fb ldr r3, [r7, #28] + 803a71e: 681a ldr r2, [r3, #0] + 803a720: 687b ldr r3, [r7, #4] + 803a722: 671a str r2, [r3, #112] ; 0x70 } tcp_seg_free(rseg); - 803a6a0: 69f8 ldr r0, [r7, #28] - 803a6a2: f7fe fc78 bl 8038f96 + 803a724: 69f8 ldr r0, [r7, #28] + 803a726: f7fe fc78 bl 803901a /* If there's nothing left to acknowledge, stop the retransmit timer, otherwise reset it to start again */ if (pcb->unacked == NULL) { - 803a6a6: 687b ldr r3, [r7, #4] - 803a6a8: 6f1b ldr r3, [r3, #112] ; 0x70 - 803a6aa: 2b00 cmp r3, #0 - 803a6ac: d104 bne.n 803a6b8 + 803a72a: 687b ldr r3, [r7, #4] + 803a72c: 6f1b ldr r3, [r3, #112] ; 0x70 + 803a72e: 2b00 cmp r3, #0 + 803a730: d104 bne.n 803a73c pcb->rtime = -1; - 803a6ae: 687b ldr r3, [r7, #4] - 803a6b0: f64f 72ff movw r2, #65535 ; 0xffff - 803a6b4: 861a strh r2, [r3, #48] ; 0x30 - 803a6b6: e006 b.n 803a6c6 + 803a732: 687b ldr r3, [r7, #4] + 803a734: f64f 72ff movw r2, #65535 ; 0xffff + 803a738: 861a strh r2, [r3, #48] ; 0x30 + 803a73a: e006 b.n 803a74a } else { pcb->rtime = 0; - 803a6b8: 687b ldr r3, [r7, #4] - 803a6ba: 2200 movs r2, #0 - 803a6bc: 861a strh r2, [r3, #48] ; 0x30 + 803a73c: 687b ldr r3, [r7, #4] + 803a73e: 2200 movs r2, #0 + 803a740: 861a strh r2, [r3, #48] ; 0x30 pcb->nrtx = 0; - 803a6be: 687b ldr r3, [r7, #4] - 803a6c0: 2200 movs r2, #0 - 803a6c2: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 803a742: 687b ldr r3, [r7, #4] + 803a744: 2200 movs r2, #0 + 803a746: f883 2042 strb.w r2, [r3, #66] ; 0x42 } /* Call the user specified function to call when successfully * connected. */ TCP_EVENT_CONNECTED(pcb, ERR_OK, err); - 803a6c6: 687b ldr r3, [r7, #4] - 803a6c8: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 803a6cc: 2b00 cmp r3, #0 - 803a6ce: d00a beq.n 803a6e6 - 803a6d0: 687b ldr r3, [r7, #4] - 803a6d2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 - 803a6d6: 687a ldr r2, [r7, #4] - 803a6d8: 6910 ldr r0, [r2, #16] - 803a6da: 2200 movs r2, #0 - 803a6dc: 6879 ldr r1, [r7, #4] - 803a6de: 4798 blx r3 - 803a6e0: 4603 mov r3, r0 - 803a6e2: 76bb strb r3, [r7, #26] - 803a6e4: e001 b.n 803a6ea - 803a6e6: 2300 movs r3, #0 - 803a6e8: 76bb strb r3, [r7, #26] + 803a74a: 687b ldr r3, [r7, #4] + 803a74c: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 803a750: 2b00 cmp r3, #0 + 803a752: d00a beq.n 803a76a + 803a754: 687b ldr r3, [r7, #4] + 803a756: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 + 803a75a: 687a ldr r2, [r7, #4] + 803a75c: 6910 ldr r0, [r2, #16] + 803a75e: 2200 movs r2, #0 + 803a760: 6879 ldr r1, [r7, #4] + 803a762: 4798 blx r3 + 803a764: 4603 mov r3, r0 + 803a766: 76bb strb r3, [r7, #26] + 803a768: e001 b.n 803a76e + 803a76a: 2300 movs r3, #0 + 803a76c: 76bb strb r3, [r7, #26] if (err == ERR_ABRT) { - 803a6ea: f997 301a ldrsb.w r3, [r7, #26] - 803a6ee: f113 0f0d cmn.w r3, #13 - 803a6f2: d102 bne.n 803a6fa + 803a76e: f997 301a ldrsb.w r3, [r7, #26] + 803a772: f113 0f0d cmn.w r3, #13 + 803a776: d102 bne.n 803a77e return ERR_ABRT; - 803a6f4: f06f 030c mvn.w r3, #12 - 803a6f8: e250 b.n 803ab9c + 803a778: f06f 030c mvn.w r3, #12 + 803a77c: e250 b.n 803ac20 } tcp_ack_now(pcb); - 803a6fa: 687b ldr r3, [r7, #4] - 803a6fc: 8b5b ldrh r3, [r3, #26] - 803a6fe: f043 0302 orr.w r3, r3, #2 - 803a702: b29a uxth r2, r3 - 803a704: 687b ldr r3, [r7, #4] - 803a706: 835a strh r2, [r3, #26] + 803a77e: 687b ldr r3, [r7, #4] + 803a780: 8b5b ldrh r3, [r3, #26] + 803a782: f043 0302 orr.w r3, r3, #2 + 803a786: b29a uxth r2, r3 + 803a788: 687b ldr r3, [r7, #4] + 803a78a: 835a strh r2, [r3, #26] if (pcb->nrtx < TCP_SYNMAXRTX) { pcb->rtime = 0; tcp_rexmit_rto(pcb); } } break; - 803a708: e23a b.n 803ab80 + 803a78c: e23a b.n 803ac04 else if (flags & TCP_ACK) { - 803a70a: 4b98 ldr r3, [pc, #608] ; (803a96c ) - 803a70c: 781b ldrb r3, [r3, #0] - 803a70e: f003 0310 and.w r3, r3, #16 - 803a712: 2b00 cmp r3, #0 - 803a714: f000 8234 beq.w 803ab80 + 803a78e: 4b98 ldr r3, [pc, #608] ; (803a9f0 ) + 803a790: 781b ldrb r3, [r3, #0] + 803a792: f003 0310 and.w r3, r3, #16 + 803a796: 2b00 cmp r3, #0 + 803a798: f000 8234 beq.w 803ac04 tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a718: 4b95 ldr r3, [pc, #596] ; (803a970 ) - 803a71a: 6819 ldr r1, [r3, #0] - 803a71c: 4b95 ldr r3, [pc, #596] ; (803a974 ) - 803a71e: 881b ldrh r3, [r3, #0] - 803a720: 461a mov r2, r3 - 803a722: 4b95 ldr r3, [pc, #596] ; (803a978 ) - 803a724: 681b ldr r3, [r3, #0] - 803a726: 18d0 adds r0, r2, r3 + 803a79c: 4b95 ldr r3, [pc, #596] ; (803a9f4 ) + 803a79e: 6819 ldr r1, [r3, #0] + 803a7a0: 4b95 ldr r3, [pc, #596] ; (803a9f8 ) + 803a7a2: 881b ldrh r3, [r3, #0] + 803a7a4: 461a mov r2, r3 + 803a7a6: 4b95 ldr r3, [pc, #596] ; (803a9fc ) + 803a7a8: 681b ldr r3, [r3, #0] + 803a7aa: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a728: 4b94 ldr r3, [pc, #592] ; (803a97c ) - 803a72a: 681b ldr r3, [r3, #0] + 803a7ac: 4b94 ldr r3, [pc, #592] ; (803aa00 ) + 803a7ae: 681b ldr r3, [r3, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a72c: 885b ldrh r3, [r3, #2] - 803a72e: b29b uxth r3, r3 + 803a7b0: 885b ldrh r3, [r3, #2] + 803a7b2: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a730: 4a92 ldr r2, [pc, #584] ; (803a97c ) - 803a732: 6812 ldr r2, [r2, #0] + 803a7b4: 4a92 ldr r2, [pc, #584] ; (803aa00 ) + 803a7b6: 6812 ldr r2, [r2, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a734: 8812 ldrh r2, [r2, #0] - 803a736: b292 uxth r2, r2 - 803a738: 9202 str r2, [sp, #8] - 803a73a: 9301 str r3, [sp, #4] - 803a73c: 4b90 ldr r3, [pc, #576] ; (803a980 ) - 803a73e: 9300 str r3, [sp, #0] - 803a740: 4b90 ldr r3, [pc, #576] ; (803a984 ) - 803a742: 4602 mov r2, r0 - 803a744: 6878 ldr r0, [r7, #4] - 803a746: f003 f8dd bl 803d904 + 803a7b8: 8812 ldrh r2, [r2, #0] + 803a7ba: b292 uxth r2, r2 + 803a7bc: 9202 str r2, [sp, #8] + 803a7be: 9301 str r3, [sp, #4] + 803a7c0: 4b90 ldr r3, [pc, #576] ; (803aa04 ) + 803a7c2: 9300 str r3, [sp, #0] + 803a7c4: 4b90 ldr r3, [pc, #576] ; (803aa08 ) + 803a7c6: 4602 mov r2, r0 + 803a7c8: 6878 ldr r0, [r7, #4] + 803a7ca: f003 f8dd bl 803d988 if (pcb->nrtx < TCP_SYNMAXRTX) { - 803a74a: 687b ldr r3, [r7, #4] - 803a74c: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803a750: 2b05 cmp r3, #5 - 803a752: f200 8215 bhi.w 803ab80 + 803a7ce: 687b ldr r3, [r7, #4] + 803a7d0: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803a7d4: 2b05 cmp r3, #5 + 803a7d6: f200 8215 bhi.w 803ac04 pcb->rtime = 0; - 803a756: 687b ldr r3, [r7, #4] - 803a758: 2200 movs r2, #0 - 803a75a: 861a strh r2, [r3, #48] ; 0x30 + 803a7da: 687b ldr r3, [r7, #4] + 803a7dc: 2200 movs r2, #0 + 803a7de: 861a strh r2, [r3, #48] ; 0x30 tcp_rexmit_rto(pcb); - 803a75c: 6878 ldr r0, [r7, #4] - 803a75e: f002 fea7 bl 803d4b0 + 803a7e0: 6878 ldr r0, [r7, #4] + 803a7e2: f002 fea7 bl 803d534 break; - 803a762: e20d b.n 803ab80 + 803a7e6: e20d b.n 803ac04 case SYN_RCVD: if (flags & TCP_ACK) { - 803a764: 4b81 ldr r3, [pc, #516] ; (803a96c ) - 803a766: 781b ldrb r3, [r3, #0] - 803a768: f003 0310 and.w r3, r3, #16 - 803a76c: 2b00 cmp r3, #0 - 803a76e: f000 80a1 beq.w 803a8b4 + 803a7e8: 4b81 ldr r3, [pc, #516] ; (803a9f0 ) + 803a7ea: 781b ldrb r3, [r3, #0] + 803a7ec: f003 0310 and.w r3, r3, #16 + 803a7f0: 2b00 cmp r3, #0 + 803a7f2: f000 80a1 beq.w 803a938 /* expected ACK number? */ if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803a772: 4b7f ldr r3, [pc, #508] ; (803a970 ) - 803a774: 681a ldr r2, [r3, #0] - 803a776: 687b ldr r3, [r7, #4] - 803a778: 6c5b ldr r3, [r3, #68] ; 0x44 - 803a77a: 1ad3 subs r3, r2, r3 - 803a77c: 3b01 subs r3, #1 - 803a77e: 2b00 cmp r3, #0 - 803a780: db7e blt.n 803a880 - 803a782: 4b7b ldr r3, [pc, #492] ; (803a970 ) - 803a784: 681a ldr r2, [r3, #0] - 803a786: 687b ldr r3, [r7, #4] - 803a788: 6d1b ldr r3, [r3, #80] ; 0x50 - 803a78a: 1ad3 subs r3, r2, r3 - 803a78c: 2b00 cmp r3, #0 - 803a78e: dc77 bgt.n 803a880 + 803a7f6: 4b7f ldr r3, [pc, #508] ; (803a9f4 ) + 803a7f8: 681a ldr r2, [r3, #0] + 803a7fa: 687b ldr r3, [r7, #4] + 803a7fc: 6c5b ldr r3, [r3, #68] ; 0x44 + 803a7fe: 1ad3 subs r3, r2, r3 + 803a800: 3b01 subs r3, #1 + 803a802: 2b00 cmp r3, #0 + 803a804: db7e blt.n 803a904 + 803a806: 4b7b ldr r3, [pc, #492] ; (803a9f4 ) + 803a808: 681a ldr r2, [r3, #0] + 803a80a: 687b ldr r3, [r7, #4] + 803a80c: 6d1b ldr r3, [r3, #80] ; 0x50 + 803a80e: 1ad3 subs r3, r2, r3 + 803a810: 2b00 cmp r3, #0 + 803a812: dc77 bgt.n 803a904 pcb->state = ESTABLISHED; - 803a790: 687b ldr r3, [r7, #4] - 803a792: 2204 movs r2, #4 - 803a794: 751a strb r2, [r3, #20] + 803a814: 687b ldr r3, [r7, #4] + 803a816: 2204 movs r2, #4 + 803a818: 751a strb r2, [r3, #20] LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); #if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG if (pcb->listener == NULL) { - 803a796: 687b ldr r3, [r7, #4] - 803a798: 6fdb ldr r3, [r3, #124] ; 0x7c - 803a79a: 2b00 cmp r3, #0 - 803a79c: d102 bne.n 803a7a4 + 803a81a: 687b ldr r3, [r7, #4] + 803a81c: 6fdb ldr r3, [r3, #124] ; 0x7c + 803a81e: 2b00 cmp r3, #0 + 803a820: d102 bne.n 803a828 /* listen pcb might be closed by now */ err = ERR_VAL; - 803a79e: 23fa movs r3, #250 ; 0xfa - 803a7a0: 76bb strb r3, [r7, #26] - 803a7a2: e01d b.n 803a7e0 + 803a822: 23fa movs r3, #250 ; 0xfa + 803a824: 76bb strb r3, [r7, #26] + 803a826: e01d b.n 803a864 } else #endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */ { #if LWIP_CALLBACK_API LWIP_ASSERT("pcb->listener->accept != NULL", pcb->listener->accept != NULL); - 803a7a4: 687b ldr r3, [r7, #4] - 803a7a6: 6fdb ldr r3, [r3, #124] ; 0x7c - 803a7a8: 699b ldr r3, [r3, #24] - 803a7aa: 2b00 cmp r3, #0 - 803a7ac: d106 bne.n 803a7bc - 803a7ae: 4b76 ldr r3, [pc, #472] ; (803a988 ) - 803a7b0: f44f 726a mov.w r2, #936 ; 0x3a8 - 803a7b4: 4975 ldr r1, [pc, #468] ; (803a98c ) - 803a7b6: 4876 ldr r0, [pc, #472] ; (803a990 ) - 803a7b8: f006 f9aa bl 8040b10 + 803a828: 687b ldr r3, [r7, #4] + 803a82a: 6fdb ldr r3, [r3, #124] ; 0x7c + 803a82c: 699b ldr r3, [r3, #24] + 803a82e: 2b00 cmp r3, #0 + 803a830: d106 bne.n 803a840 + 803a832: 4b76 ldr r3, [pc, #472] ; (803aa0c ) + 803a834: f44f 726a mov.w r2, #936 ; 0x3a8 + 803a838: 4975 ldr r1, [pc, #468] ; (803aa10 ) + 803a83a: 4876 ldr r0, [pc, #472] ; (803aa14 ) + 803a83c: f006 f9aa bl 8040b94 #endif tcp_backlog_accepted(pcb); /* Call the accept function. */ TCP_EVENT_ACCEPT(pcb->listener, pcb, pcb->callback_arg, ERR_OK, err); - 803a7bc: 687b ldr r3, [r7, #4] - 803a7be: 6fdb ldr r3, [r3, #124] ; 0x7c - 803a7c0: 699b ldr r3, [r3, #24] - 803a7c2: 2b00 cmp r3, #0 - 803a7c4: d00a beq.n 803a7dc - 803a7c6: 687b ldr r3, [r7, #4] - 803a7c8: 6fdb ldr r3, [r3, #124] ; 0x7c - 803a7ca: 699b ldr r3, [r3, #24] - 803a7cc: 687a ldr r2, [r7, #4] - 803a7ce: 6910 ldr r0, [r2, #16] - 803a7d0: 2200 movs r2, #0 - 803a7d2: 6879 ldr r1, [r7, #4] - 803a7d4: 4798 blx r3 - 803a7d6: 4603 mov r3, r0 - 803a7d8: 76bb strb r3, [r7, #26] - 803a7da: e001 b.n 803a7e0 - 803a7dc: 23f0 movs r3, #240 ; 0xf0 - 803a7de: 76bb strb r3, [r7, #26] + 803a840: 687b ldr r3, [r7, #4] + 803a842: 6fdb ldr r3, [r3, #124] ; 0x7c + 803a844: 699b ldr r3, [r3, #24] + 803a846: 2b00 cmp r3, #0 + 803a848: d00a beq.n 803a860 + 803a84a: 687b ldr r3, [r7, #4] + 803a84c: 6fdb ldr r3, [r3, #124] ; 0x7c + 803a84e: 699b ldr r3, [r3, #24] + 803a850: 687a ldr r2, [r7, #4] + 803a852: 6910 ldr r0, [r2, #16] + 803a854: 2200 movs r2, #0 + 803a856: 6879 ldr r1, [r7, #4] + 803a858: 4798 blx r3 + 803a85a: 4603 mov r3, r0 + 803a85c: 76bb strb r3, [r7, #26] + 803a85e: e001 b.n 803a864 + 803a860: 23f0 movs r3, #240 ; 0xf0 + 803a862: 76bb strb r3, [r7, #26] } if (err != ERR_OK) { - 803a7e0: f997 301a ldrsb.w r3, [r7, #26] - 803a7e4: 2b00 cmp r3, #0 - 803a7e6: d00a beq.n 803a7fe + 803a864: f997 301a ldrsb.w r3, [r7, #26] + 803a868: 2b00 cmp r3, #0 + 803a86a: d00a beq.n 803a882 /* If the accept function returns with an error, we abort * the connection. */ /* Already aborted? */ if (err != ERR_ABRT) { - 803a7e8: f997 301a ldrsb.w r3, [r7, #26] - 803a7ec: f113 0f0d cmn.w r3, #13 - 803a7f0: d002 beq.n 803a7f8 + 803a86c: f997 301a ldrsb.w r3, [r7, #26] + 803a870: f113 0f0d cmn.w r3, #13 + 803a874: d002 beq.n 803a87c tcp_abort(pcb); - 803a7f2: 6878 ldr r0, [r7, #4] - 803a7f4: f7fd fd2a bl 803824c + 803a876: 6878 ldr r0, [r7, #4] + 803a878: f7fd fd2a bl 80382d0 } return ERR_ABRT; - 803a7f8: f06f 030c mvn.w r3, #12 - 803a7fc: e1ce b.n 803ab9c + 803a87c: f06f 030c mvn.w r3, #12 + 803a880: e1ce b.n 803ac20 } /* If there was any data contained within this ACK, * we'd better pass it on to the application as well. */ tcp_receive(pcb); - 803a7fe: 6878 ldr r0, [r7, #4] - 803a800: f000 fae0 bl 803adc4 + 803a882: 6878 ldr r0, [r7, #4] + 803a884: f000 fae0 bl 803ae48 /* Prevent ACK for SYN to generate a sent event */ if (recv_acked != 0) { - 803a804: 4b63 ldr r3, [pc, #396] ; (803a994 ) - 803a806: 881b ldrh r3, [r3, #0] - 803a808: 2b00 cmp r3, #0 - 803a80a: d005 beq.n 803a818 + 803a888: 4b63 ldr r3, [pc, #396] ; (803aa18 ) + 803a88a: 881b ldrh r3, [r3, #0] + 803a88c: 2b00 cmp r3, #0 + 803a88e: d005 beq.n 803a89c recv_acked--; - 803a80c: 4b61 ldr r3, [pc, #388] ; (803a994 ) - 803a80e: 881b ldrh r3, [r3, #0] - 803a810: 3b01 subs r3, #1 - 803a812: b29a uxth r2, r3 - 803a814: 4b5f ldr r3, [pc, #380] ; (803a994 ) - 803a816: 801a strh r2, [r3, #0] + 803a890: 4b61 ldr r3, [pc, #388] ; (803aa18 ) + 803a892: 881b ldrh r3, [r3, #0] + 803a894: 3b01 subs r3, #1 + 803a896: b29a uxth r2, r3 + 803a898: 4b5f ldr r3, [pc, #380] ; (803aa18 ) + 803a89a: 801a strh r2, [r3, #0] } pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss); - 803a818: 687b ldr r3, [r7, #4] - 803a81a: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a81c: 009a lsls r2, r3, #2 - 803a81e: 687b ldr r3, [r7, #4] - 803a820: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a822: 005b lsls r3, r3, #1 - 803a824: f241 111c movw r1, #4380 ; 0x111c - 803a828: 428b cmp r3, r1 - 803a82a: bf38 it cc - 803a82c: 460b movcc r3, r1 - 803a82e: 429a cmp r2, r3 - 803a830: d204 bcs.n 803a83c - 803a832: 687b ldr r3, [r7, #4] - 803a834: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a836: 009b lsls r3, r3, #2 - 803a838: b29b uxth r3, r3 - 803a83a: e00d b.n 803a858 - 803a83c: 687b ldr r3, [r7, #4] - 803a83e: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a840: 005b lsls r3, r3, #1 - 803a842: f241 121c movw r2, #4380 ; 0x111c - 803a846: 4293 cmp r3, r2 - 803a848: d904 bls.n 803a854 - 803a84a: 687b ldr r3, [r7, #4] - 803a84c: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803a84e: 005b lsls r3, r3, #1 - 803a850: b29b uxth r3, r3 - 803a852: e001 b.n 803a858 - 803a854: f241 131c movw r3, #4380 ; 0x111c - 803a858: 687a ldr r2, [r7, #4] - 803a85a: f8a2 3048 strh.w r3, [r2, #72] ; 0x48 + 803a89c: 687b ldr r3, [r7, #4] + 803a89e: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a8a0: 009a lsls r2, r3, #2 + 803a8a2: 687b ldr r3, [r7, #4] + 803a8a4: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a8a6: 005b lsls r3, r3, #1 + 803a8a8: f241 111c movw r1, #4380 ; 0x111c + 803a8ac: 428b cmp r3, r1 + 803a8ae: bf38 it cc + 803a8b0: 460b movcc r3, r1 + 803a8b2: 429a cmp r2, r3 + 803a8b4: d204 bcs.n 803a8c0 + 803a8b6: 687b ldr r3, [r7, #4] + 803a8b8: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a8ba: 009b lsls r3, r3, #2 + 803a8bc: b29b uxth r3, r3 + 803a8be: e00d b.n 803a8dc + 803a8c0: 687b ldr r3, [r7, #4] + 803a8c2: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a8c4: 005b lsls r3, r3, #1 + 803a8c6: f241 121c movw r2, #4380 ; 0x111c + 803a8ca: 4293 cmp r3, r2 + 803a8cc: d904 bls.n 803a8d8 + 803a8ce: 687b ldr r3, [r7, #4] + 803a8d0: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803a8d2: 005b lsls r3, r3, #1 + 803a8d4: b29b uxth r3, r3 + 803a8d6: e001 b.n 803a8dc + 803a8d8: f241 131c movw r3, #4380 ; 0x111c + 803a8dc: 687a ldr r2, [r7, #4] + 803a8de: f8a2 3048 strh.w r3, [r2, #72] ; 0x48 LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SYN_RCVD): cwnd %"TCPWNDSIZE_F " ssthresh %"TCPWNDSIZE_F"\n", pcb->cwnd, pcb->ssthresh)); if (recv_flags & TF_GOT_FIN) { - 803a85e: 4b4e ldr r3, [pc, #312] ; (803a998 ) - 803a860: 781b ldrb r3, [r3, #0] - 803a862: f003 0320 and.w r3, r3, #32 - 803a866: 2b00 cmp r3, #0 - 803a868: d037 beq.n 803a8da + 803a8e2: 4b4e ldr r3, [pc, #312] ; (803aa1c ) + 803a8e4: 781b ldrb r3, [r3, #0] + 803a8e6: f003 0320 and.w r3, r3, #32 + 803a8ea: 2b00 cmp r3, #0 + 803a8ec: d037 beq.n 803a95e tcp_ack_now(pcb); - 803a86a: 687b ldr r3, [r7, #4] - 803a86c: 8b5b ldrh r3, [r3, #26] - 803a86e: f043 0302 orr.w r3, r3, #2 - 803a872: b29a uxth r2, r3 - 803a874: 687b ldr r3, [r7, #4] - 803a876: 835a strh r2, [r3, #26] + 803a8ee: 687b ldr r3, [r7, #4] + 803a8f0: 8b5b ldrh r3, [r3, #26] + 803a8f2: f043 0302 orr.w r3, r3, #2 + 803a8f6: b29a uxth r2, r3 + 803a8f8: 687b ldr r3, [r7, #4] + 803a8fa: 835a strh r2, [r3, #26] pcb->state = CLOSE_WAIT; - 803a878: 687b ldr r3, [r7, #4] - 803a87a: 2207 movs r2, #7 - 803a87c: 751a strb r2, [r3, #20] + 803a8fc: 687b ldr r3, [r7, #4] + 803a8fe: 2207 movs r2, #7 + 803a900: 751a strb r2, [r3, #20] if (recv_flags & TF_GOT_FIN) { - 803a87e: e02c b.n 803a8da + 803a902: e02c b.n 803a95e } } else { /* incorrect ACK number, send RST */ tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a880: 4b3b ldr r3, [pc, #236] ; (803a970 ) - 803a882: 6819 ldr r1, [r3, #0] - 803a884: 4b3b ldr r3, [pc, #236] ; (803a974 ) - 803a886: 881b ldrh r3, [r3, #0] - 803a888: 461a mov r2, r3 - 803a88a: 4b3b ldr r3, [pc, #236] ; (803a978 ) - 803a88c: 681b ldr r3, [r3, #0] - 803a88e: 18d0 adds r0, r2, r3 + 803a904: 4b3b ldr r3, [pc, #236] ; (803a9f4 ) + 803a906: 6819 ldr r1, [r3, #0] + 803a908: 4b3b ldr r3, [pc, #236] ; (803a9f8 ) + 803a90a: 881b ldrh r3, [r3, #0] + 803a90c: 461a mov r2, r3 + 803a90e: 4b3b ldr r3, [pc, #236] ; (803a9fc ) + 803a910: 681b ldr r3, [r3, #0] + 803a912: 18d0 adds r0, r2, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a890: 4b3a ldr r3, [pc, #232] ; (803a97c ) - 803a892: 681b ldr r3, [r3, #0] + 803a914: 4b3a ldr r3, [pc, #232] ; (803aa00 ) + 803a916: 681b ldr r3, [r3, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a894: 885b ldrh r3, [r3, #2] - 803a896: b29b uxth r3, r3 + 803a918: 885b ldrh r3, [r3, #2] + 803a91a: b29b uxth r3, r3 ip_current_src_addr(), tcphdr->dest, tcphdr->src); - 803a898: 4a38 ldr r2, [pc, #224] ; (803a97c ) - 803a89a: 6812 ldr r2, [r2, #0] + 803a91c: 4a38 ldr r2, [pc, #224] ; (803aa00 ) + 803a91e: 6812 ldr r2, [r2, #0] tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(), - 803a89c: 8812 ldrh r2, [r2, #0] - 803a89e: b292 uxth r2, r2 - 803a8a0: 9202 str r2, [sp, #8] - 803a8a2: 9301 str r3, [sp, #4] - 803a8a4: 4b36 ldr r3, [pc, #216] ; (803a980 ) - 803a8a6: 9300 str r3, [sp, #0] - 803a8a8: 4b36 ldr r3, [pc, #216] ; (803a984 ) - 803a8aa: 4602 mov r2, r0 - 803a8ac: 6878 ldr r0, [r7, #4] - 803a8ae: f003 f829 bl 803d904 + 803a920: 8812 ldrh r2, [r2, #0] + 803a922: b292 uxth r2, r2 + 803a924: 9202 str r2, [sp, #8] + 803a926: 9301 str r3, [sp, #4] + 803a928: 4b36 ldr r3, [pc, #216] ; (803aa04 ) + 803a92a: 9300 str r3, [sp, #0] + 803a92c: 4b36 ldr r3, [pc, #216] ; (803aa08 ) + 803a92e: 4602 mov r2, r0 + 803a930: 6878 ldr r0, [r7, #4] + 803a932: f003 f829 bl 803d988 } } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) { /* Looks like another copy of the SYN - retransmit our SYN-ACK */ tcp_rexmit(pcb); } break; - 803a8b2: e167 b.n 803ab84 + 803a936: e167 b.n 803ac08 } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) { - 803a8b4: 4b2d ldr r3, [pc, #180] ; (803a96c ) - 803a8b6: 781b ldrb r3, [r3, #0] - 803a8b8: f003 0302 and.w r3, r3, #2 - 803a8bc: 2b00 cmp r3, #0 - 803a8be: f000 8161 beq.w 803ab84 - 803a8c2: 687b ldr r3, [r7, #4] - 803a8c4: 6a5b ldr r3, [r3, #36] ; 0x24 - 803a8c6: 1e5a subs r2, r3, #1 - 803a8c8: 4b2b ldr r3, [pc, #172] ; (803a978 ) - 803a8ca: 681b ldr r3, [r3, #0] - 803a8cc: 429a cmp r2, r3 - 803a8ce: f040 8159 bne.w 803ab84 + 803a938: 4b2d ldr r3, [pc, #180] ; (803a9f0 ) + 803a93a: 781b ldrb r3, [r3, #0] + 803a93c: f003 0302 and.w r3, r3, #2 + 803a940: 2b00 cmp r3, #0 + 803a942: f000 8161 beq.w 803ac08 + 803a946: 687b ldr r3, [r7, #4] + 803a948: 6a5b ldr r3, [r3, #36] ; 0x24 + 803a94a: 1e5a subs r2, r3, #1 + 803a94c: 4b2b ldr r3, [pc, #172] ; (803a9fc ) + 803a94e: 681b ldr r3, [r3, #0] + 803a950: 429a cmp r2, r3 + 803a952: f040 8159 bne.w 803ac08 tcp_rexmit(pcb); - 803a8d2: 6878 ldr r0, [r7, #4] - 803a8d4: f002 fe0e bl 803d4f4 + 803a956: 6878 ldr r0, [r7, #4] + 803a958: f002 fe0e bl 803d578 break; - 803a8d8: e154 b.n 803ab84 - 803a8da: e153 b.n 803ab84 + 803a95c: e154 b.n 803ac08 + 803a95e: e153 b.n 803ac08 case CLOSE_WAIT: /* FALLTHROUGH */ case ESTABLISHED: tcp_receive(pcb); - 803a8dc: 6878 ldr r0, [r7, #4] - 803a8de: f000 fa71 bl 803adc4 + 803a960: 6878 ldr r0, [r7, #4] + 803a962: f000 fa71 bl 803ae48 if (recv_flags & TF_GOT_FIN) { /* passive close */ - 803a8e2: 4b2d ldr r3, [pc, #180] ; (803a998 ) - 803a8e4: 781b ldrb r3, [r3, #0] - 803a8e6: f003 0320 and.w r3, r3, #32 - 803a8ea: 2b00 cmp r3, #0 - 803a8ec: f000 814c beq.w 803ab88 + 803a966: 4b2d ldr r3, [pc, #180] ; (803aa1c ) + 803a968: 781b ldrb r3, [r3, #0] + 803a96a: f003 0320 and.w r3, r3, #32 + 803a96e: 2b00 cmp r3, #0 + 803a970: f000 814c beq.w 803ac0c tcp_ack_now(pcb); - 803a8f0: 687b ldr r3, [r7, #4] - 803a8f2: 8b5b ldrh r3, [r3, #26] - 803a8f4: f043 0302 orr.w r3, r3, #2 - 803a8f8: b29a uxth r2, r3 - 803a8fa: 687b ldr r3, [r7, #4] - 803a8fc: 835a strh r2, [r3, #26] + 803a974: 687b ldr r3, [r7, #4] + 803a976: 8b5b ldrh r3, [r3, #26] + 803a978: f043 0302 orr.w r3, r3, #2 + 803a97c: b29a uxth r2, r3 + 803a97e: 687b ldr r3, [r7, #4] + 803a980: 835a strh r2, [r3, #26] pcb->state = CLOSE_WAIT; - 803a8fe: 687b ldr r3, [r7, #4] - 803a900: 2207 movs r2, #7 - 803a902: 751a strb r2, [r3, #20] + 803a982: 687b ldr r3, [r7, #4] + 803a984: 2207 movs r2, #7 + 803a986: 751a strb r2, [r3, #20] } break; - 803a904: e140 b.n 803ab88 + 803a988: e140 b.n 803ac0c case FIN_WAIT_1: tcp_receive(pcb); - 803a906: 6878 ldr r0, [r7, #4] - 803a908: f000 fa5c bl 803adc4 + 803a98a: 6878 ldr r0, [r7, #4] + 803a98c: f000 fa5c bl 803ae48 if (recv_flags & TF_GOT_FIN) { - 803a90c: 4b22 ldr r3, [pc, #136] ; (803a998 ) - 803a90e: 781b ldrb r3, [r3, #0] - 803a910: f003 0320 and.w r3, r3, #32 - 803a914: 2b00 cmp r3, #0 - 803a916: d071 beq.n 803a9fc + 803a990: 4b22 ldr r3, [pc, #136] ; (803aa1c ) + 803a992: 781b ldrb r3, [r3, #0] + 803a994: f003 0320 and.w r3, r3, #32 + 803a998: 2b00 cmp r3, #0 + 803a99a: d071 beq.n 803aa80 if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && - 803a918: 4b14 ldr r3, [pc, #80] ; (803a96c ) - 803a91a: 781b ldrb r3, [r3, #0] - 803a91c: f003 0310 and.w r3, r3, #16 - 803a920: 2b00 cmp r3, #0 - 803a922: d060 beq.n 803a9e6 - 803a924: 687b ldr r3, [r7, #4] - 803a926: 6d1a ldr r2, [r3, #80] ; 0x50 - 803a928: 4b11 ldr r3, [pc, #68] ; (803a970 ) - 803a92a: 681b ldr r3, [r3, #0] - 803a92c: 429a cmp r2, r3 - 803a92e: d15a bne.n 803a9e6 + 803a99c: 4b14 ldr r3, [pc, #80] ; (803a9f0 ) + 803a99e: 781b ldrb r3, [r3, #0] + 803a9a0: f003 0310 and.w r3, r3, #16 + 803a9a4: 2b00 cmp r3, #0 + 803a9a6: d060 beq.n 803aa6a + 803a9a8: 687b ldr r3, [r7, #4] + 803a9aa: 6d1a ldr r2, [r3, #80] ; 0x50 + 803a9ac: 4b11 ldr r3, [pc, #68] ; (803a9f4 ) + 803a9ae: 681b ldr r3, [r3, #0] + 803a9b0: 429a cmp r2, r3 + 803a9b2: d15a bne.n 803aa6a pcb->unsent == NULL) { - 803a930: 687b ldr r3, [r7, #4] - 803a932: 6edb ldr r3, [r3, #108] ; 0x6c + 803a9b4: 687b ldr r3, [r7, #4] + 803a9b6: 6edb ldr r3, [r3, #108] ; 0x6c if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && - 803a934: 2b00 cmp r3, #0 - 803a936: d156 bne.n 803a9e6 + 803a9b8: 2b00 cmp r3, #0 + 803a9ba: d156 bne.n 803aa6a LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); tcp_ack_now(pcb); - 803a938: 687b ldr r3, [r7, #4] - 803a93a: 8b5b ldrh r3, [r3, #26] - 803a93c: f043 0302 orr.w r3, r3, #2 - 803a940: b29a uxth r2, r3 - 803a942: 687b ldr r3, [r7, #4] - 803a944: 835a strh r2, [r3, #26] + 803a9bc: 687b ldr r3, [r7, #4] + 803a9be: 8b5b ldrh r3, [r3, #26] + 803a9c0: f043 0302 orr.w r3, r3, #2 + 803a9c4: b29a uxth r2, r3 + 803a9c6: 687b ldr r3, [r7, #4] + 803a9c8: 835a strh r2, [r3, #26] tcp_pcb_purge(pcb); - 803a946: 6878 ldr r0, [r7, #4] - 803a948: f7fe fdbc bl 80394c4 + 803a9ca: 6878 ldr r0, [r7, #4] + 803a9cc: f7fe fdbc bl 8039548 TCP_RMV_ACTIVE(pcb); - 803a94c: 4b13 ldr r3, [pc, #76] ; (803a99c ) - 803a94e: 681b ldr r3, [r3, #0] - 803a950: 687a ldr r2, [r7, #4] - 803a952: 429a cmp r2, r3 - 803a954: d105 bne.n 803a962 - 803a956: 4b11 ldr r3, [pc, #68] ; (803a99c ) - 803a958: 681b ldr r3, [r3, #0] - 803a95a: 68db ldr r3, [r3, #12] - 803a95c: 4a0f ldr r2, [pc, #60] ; (803a99c ) - 803a95e: 6013 str r3, [r2, #0] - 803a960: e02e b.n 803a9c0 - 803a962: 4b0e ldr r3, [pc, #56] ; (803a99c ) - 803a964: 681b ldr r3, [r3, #0] - 803a966: 617b str r3, [r7, #20] - 803a968: e027 b.n 803a9ba - 803a96a: bf00 nop - 803a96c: 2400e99c .word 0x2400e99c - 803a970: 2400e994 .word 0x2400e994 - 803a974: 2400e99a .word 0x2400e99a - 803a978: 2400e990 .word 0x2400e990 - 803a97c: 2400e980 .word 0x2400e980 - 803a980: 2400b9cc .word 0x2400b9cc - 803a984: 2400b9d0 .word 0x2400b9d0 - 803a988: 08043500 .word 0x08043500 - 803a98c: 080437a0 .word 0x080437a0 - 803a990: 0804354c .word 0x0804354c - 803a994: 2400e998 .word 0x2400e998 - 803a998: 2400e99d .word 0x2400e99d - 803a99c: 2400e964 .word 0x2400e964 - 803a9a0: 697b ldr r3, [r7, #20] - 803a9a2: 68db ldr r3, [r3, #12] - 803a9a4: 687a ldr r2, [r7, #4] - 803a9a6: 429a cmp r2, r3 - 803a9a8: d104 bne.n 803a9b4 - 803a9aa: 687b ldr r3, [r7, #4] - 803a9ac: 68da ldr r2, [r3, #12] - 803a9ae: 697b ldr r3, [r7, #20] - 803a9b0: 60da str r2, [r3, #12] - 803a9b2: e005 b.n 803a9c0 - 803a9b4: 697b ldr r3, [r7, #20] - 803a9b6: 68db ldr r3, [r3, #12] - 803a9b8: 617b str r3, [r7, #20] - 803a9ba: 697b ldr r3, [r7, #20] - 803a9bc: 2b00 cmp r3, #0 - 803a9be: d1ef bne.n 803a9a0 - 803a9c0: 687b ldr r3, [r7, #4] - 803a9c2: 2200 movs r2, #0 - 803a9c4: 60da str r2, [r3, #12] - 803a9c6: 4b77 ldr r3, [pc, #476] ; (803aba4 ) - 803a9c8: 2201 movs r2, #1 - 803a9ca: 701a strb r2, [r3, #0] + 803a9d0: 4b13 ldr r3, [pc, #76] ; (803aa20 ) + 803a9d2: 681b ldr r3, [r3, #0] + 803a9d4: 687a ldr r2, [r7, #4] + 803a9d6: 429a cmp r2, r3 + 803a9d8: d105 bne.n 803a9e6 + 803a9da: 4b11 ldr r3, [pc, #68] ; (803aa20 ) + 803a9dc: 681b ldr r3, [r3, #0] + 803a9de: 68db ldr r3, [r3, #12] + 803a9e0: 4a0f ldr r2, [pc, #60] ; (803aa20 ) + 803a9e2: 6013 str r3, [r2, #0] + 803a9e4: e02e b.n 803aa44 + 803a9e6: 4b0e ldr r3, [pc, #56] ; (803aa20 ) + 803a9e8: 681b ldr r3, [r3, #0] + 803a9ea: 617b str r3, [r7, #20] + 803a9ec: e027 b.n 803aa3e + 803a9ee: bf00 nop + 803a9f0: 2400e9a4 .word 0x2400e9a4 + 803a9f4: 2400e99c .word 0x2400e99c + 803a9f8: 2400e9a2 .word 0x2400e9a2 + 803a9fc: 2400e998 .word 0x2400e998 + 803aa00: 2400e988 .word 0x2400e988 + 803aa04: 2400b9d4 .word 0x2400b9d4 + 803aa08: 2400b9d8 .word 0x2400b9d8 + 803aa0c: 08043580 .word 0x08043580 + 803aa10: 08043820 .word 0x08043820 + 803aa14: 080435cc .word 0x080435cc + 803aa18: 2400e9a0 .word 0x2400e9a0 + 803aa1c: 2400e9a5 .word 0x2400e9a5 + 803aa20: 2400e96c .word 0x2400e96c + 803aa24: 697b ldr r3, [r7, #20] + 803aa26: 68db ldr r3, [r3, #12] + 803aa28: 687a ldr r2, [r7, #4] + 803aa2a: 429a cmp r2, r3 + 803aa2c: d104 bne.n 803aa38 + 803aa2e: 687b ldr r3, [r7, #4] + 803aa30: 68da ldr r2, [r3, #12] + 803aa32: 697b ldr r3, [r7, #20] + 803aa34: 60da str r2, [r3, #12] + 803aa36: e005 b.n 803aa44 + 803aa38: 697b ldr r3, [r7, #20] + 803aa3a: 68db ldr r3, [r3, #12] + 803aa3c: 617b str r3, [r7, #20] + 803aa3e: 697b ldr r3, [r7, #20] + 803aa40: 2b00 cmp r3, #0 + 803aa42: d1ef bne.n 803aa24 + 803aa44: 687b ldr r3, [r7, #4] + 803aa46: 2200 movs r2, #0 + 803aa48: 60da str r2, [r3, #12] + 803aa4a: 4b77 ldr r3, [pc, #476] ; (803ac28 ) + 803aa4c: 2201 movs r2, #1 + 803aa4e: 701a strb r2, [r3, #0] pcb->state = TIME_WAIT; - 803a9cc: 687b ldr r3, [r7, #4] - 803a9ce: 220a movs r2, #10 - 803a9d0: 751a strb r2, [r3, #20] + 803aa50: 687b ldr r3, [r7, #4] + 803aa52: 220a movs r2, #10 + 803aa54: 751a strb r2, [r3, #20] TCP_REG(&tcp_tw_pcbs, pcb); - 803a9d2: 4b75 ldr r3, [pc, #468] ; (803aba8 ) - 803a9d4: 681a ldr r2, [r3, #0] - 803a9d6: 687b ldr r3, [r7, #4] - 803a9d8: 60da str r2, [r3, #12] - 803a9da: 4a73 ldr r2, [pc, #460] ; (803aba8 ) - 803a9dc: 687b ldr r3, [r7, #4] - 803a9de: 6013 str r3, [r2, #0] - 803a9e0: f003 f952 bl 803dc88 + 803aa56: 4b75 ldr r3, [pc, #468] ; (803ac2c ) + 803aa58: 681a ldr r2, [r3, #0] + 803aa5a: 687b ldr r3, [r7, #4] + 803aa5c: 60da str r2, [r3, #12] + 803aa5e: 4a73 ldr r2, [pc, #460] ; (803ac2c ) + 803aa60: 687b ldr r3, [r7, #4] + 803aa62: 6013 str r3, [r2, #0] + 803aa64: f003 f952 bl 803dd0c } } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && pcb->unsent == NULL) { pcb->state = FIN_WAIT_2; } break; - 803a9e4: e0d2 b.n 803ab8c + 803aa68: e0d2 b.n 803ac10 tcp_ack_now(pcb); - 803a9e6: 687b ldr r3, [r7, #4] - 803a9e8: 8b5b ldrh r3, [r3, #26] - 803a9ea: f043 0302 orr.w r3, r3, #2 - 803a9ee: b29a uxth r2, r3 - 803a9f0: 687b ldr r3, [r7, #4] - 803a9f2: 835a strh r2, [r3, #26] + 803aa6a: 687b ldr r3, [r7, #4] + 803aa6c: 8b5b ldrh r3, [r3, #26] + 803aa6e: f043 0302 orr.w r3, r3, #2 + 803aa72: b29a uxth r2, r3 + 803aa74: 687b ldr r3, [r7, #4] + 803aa76: 835a strh r2, [r3, #26] pcb->state = CLOSING; - 803a9f4: 687b ldr r3, [r7, #4] - 803a9f6: 2208 movs r2, #8 - 803a9f8: 751a strb r2, [r3, #20] + 803aa78: 687b ldr r3, [r7, #4] + 803aa7a: 2208 movs r2, #8 + 803aa7c: 751a strb r2, [r3, #20] break; - 803a9fa: e0c7 b.n 803ab8c + 803aa7e: e0c7 b.n 803ac10 } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && - 803a9fc: 4b6b ldr r3, [pc, #428] ; (803abac ) - 803a9fe: 781b ldrb r3, [r3, #0] - 803aa00: f003 0310 and.w r3, r3, #16 - 803aa04: 2b00 cmp r3, #0 - 803aa06: f000 80c1 beq.w 803ab8c - 803aa0a: 687b ldr r3, [r7, #4] - 803aa0c: 6d1a ldr r2, [r3, #80] ; 0x50 - 803aa0e: 4b68 ldr r3, [pc, #416] ; (803abb0 ) - 803aa10: 681b ldr r3, [r3, #0] - 803aa12: 429a cmp r2, r3 - 803aa14: f040 80ba bne.w 803ab8c + 803aa80: 4b6b ldr r3, [pc, #428] ; (803ac30 ) + 803aa82: 781b ldrb r3, [r3, #0] + 803aa84: f003 0310 and.w r3, r3, #16 + 803aa88: 2b00 cmp r3, #0 + 803aa8a: f000 80c1 beq.w 803ac10 + 803aa8e: 687b ldr r3, [r7, #4] + 803aa90: 6d1a ldr r2, [r3, #80] ; 0x50 + 803aa92: 4b68 ldr r3, [pc, #416] ; (803ac34 ) + 803aa94: 681b ldr r3, [r3, #0] + 803aa96: 429a cmp r2, r3 + 803aa98: f040 80ba bne.w 803ac10 pcb->unsent == NULL) { - 803aa18: 687b ldr r3, [r7, #4] - 803aa1a: 6edb ldr r3, [r3, #108] ; 0x6c + 803aa9c: 687b ldr r3, [r7, #4] + 803aa9e: 6edb ldr r3, [r3, #108] ; 0x6c } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) && - 803aa1c: 2b00 cmp r3, #0 - 803aa1e: f040 80b5 bne.w 803ab8c + 803aaa0: 2b00 cmp r3, #0 + 803aaa2: f040 80b5 bne.w 803ac10 pcb->state = FIN_WAIT_2; - 803aa22: 687b ldr r3, [r7, #4] - 803aa24: 2206 movs r2, #6 - 803aa26: 751a strb r2, [r3, #20] + 803aaa6: 687b ldr r3, [r7, #4] + 803aaa8: 2206 movs r2, #6 + 803aaaa: 751a strb r2, [r3, #20] break; - 803aa28: e0b0 b.n 803ab8c + 803aaac: e0b0 b.n 803ac10 case FIN_WAIT_2: tcp_receive(pcb); - 803aa2a: 6878 ldr r0, [r7, #4] - 803aa2c: f000 f9ca bl 803adc4 + 803aaae: 6878 ldr r0, [r7, #4] + 803aab0: f000 f9ca bl 803ae48 if (recv_flags & TF_GOT_FIN) { - 803aa30: 4b60 ldr r3, [pc, #384] ; (803abb4 ) - 803aa32: 781b ldrb r3, [r3, #0] - 803aa34: f003 0320 and.w r3, r3, #32 - 803aa38: 2b00 cmp r3, #0 - 803aa3a: f000 80a9 beq.w 803ab90 + 803aab4: 4b60 ldr r3, [pc, #384] ; (803ac38 ) + 803aab6: 781b ldrb r3, [r3, #0] + 803aab8: f003 0320 and.w r3, r3, #32 + 803aabc: 2b00 cmp r3, #0 + 803aabe: f000 80a9 beq.w 803ac14 LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); tcp_ack_now(pcb); - 803aa3e: 687b ldr r3, [r7, #4] - 803aa40: 8b5b ldrh r3, [r3, #26] - 803aa42: f043 0302 orr.w r3, r3, #2 - 803aa46: b29a uxth r2, r3 - 803aa48: 687b ldr r3, [r7, #4] - 803aa4a: 835a strh r2, [r3, #26] + 803aac2: 687b ldr r3, [r7, #4] + 803aac4: 8b5b ldrh r3, [r3, #26] + 803aac6: f043 0302 orr.w r3, r3, #2 + 803aaca: b29a uxth r2, r3 + 803aacc: 687b ldr r3, [r7, #4] + 803aace: 835a strh r2, [r3, #26] tcp_pcb_purge(pcb); - 803aa4c: 6878 ldr r0, [r7, #4] - 803aa4e: f7fe fd39 bl 80394c4 + 803aad0: 6878 ldr r0, [r7, #4] + 803aad2: f7fe fd39 bl 8039548 TCP_RMV_ACTIVE(pcb); - 803aa52: 4b59 ldr r3, [pc, #356] ; (803abb8 ) - 803aa54: 681b ldr r3, [r3, #0] - 803aa56: 687a ldr r2, [r7, #4] - 803aa58: 429a cmp r2, r3 - 803aa5a: d105 bne.n 803aa68 - 803aa5c: 4b56 ldr r3, [pc, #344] ; (803abb8 ) - 803aa5e: 681b ldr r3, [r3, #0] - 803aa60: 68db ldr r3, [r3, #12] - 803aa62: 4a55 ldr r2, [pc, #340] ; (803abb8 ) - 803aa64: 6013 str r3, [r2, #0] - 803aa66: e013 b.n 803aa90 - 803aa68: 4b53 ldr r3, [pc, #332] ; (803abb8 ) - 803aa6a: 681b ldr r3, [r3, #0] - 803aa6c: 613b str r3, [r7, #16] - 803aa6e: e00c b.n 803aa8a - 803aa70: 693b ldr r3, [r7, #16] - 803aa72: 68db ldr r3, [r3, #12] - 803aa74: 687a ldr r2, [r7, #4] - 803aa76: 429a cmp r2, r3 - 803aa78: d104 bne.n 803aa84 - 803aa7a: 687b ldr r3, [r7, #4] - 803aa7c: 68da ldr r2, [r3, #12] - 803aa7e: 693b ldr r3, [r7, #16] - 803aa80: 60da str r2, [r3, #12] - 803aa82: e005 b.n 803aa90 - 803aa84: 693b ldr r3, [r7, #16] - 803aa86: 68db ldr r3, [r3, #12] - 803aa88: 613b str r3, [r7, #16] - 803aa8a: 693b ldr r3, [r7, #16] - 803aa8c: 2b00 cmp r3, #0 - 803aa8e: d1ef bne.n 803aa70 - 803aa90: 687b ldr r3, [r7, #4] - 803aa92: 2200 movs r2, #0 - 803aa94: 60da str r2, [r3, #12] - 803aa96: 4b43 ldr r3, [pc, #268] ; (803aba4 ) - 803aa98: 2201 movs r2, #1 - 803aa9a: 701a strb r2, [r3, #0] + 803aad6: 4b59 ldr r3, [pc, #356] ; (803ac3c ) + 803aad8: 681b ldr r3, [r3, #0] + 803aada: 687a ldr r2, [r7, #4] + 803aadc: 429a cmp r2, r3 + 803aade: d105 bne.n 803aaec + 803aae0: 4b56 ldr r3, [pc, #344] ; (803ac3c ) + 803aae2: 681b ldr r3, [r3, #0] + 803aae4: 68db ldr r3, [r3, #12] + 803aae6: 4a55 ldr r2, [pc, #340] ; (803ac3c ) + 803aae8: 6013 str r3, [r2, #0] + 803aaea: e013 b.n 803ab14 + 803aaec: 4b53 ldr r3, [pc, #332] ; (803ac3c ) + 803aaee: 681b ldr r3, [r3, #0] + 803aaf0: 613b str r3, [r7, #16] + 803aaf2: e00c b.n 803ab0e + 803aaf4: 693b ldr r3, [r7, #16] + 803aaf6: 68db ldr r3, [r3, #12] + 803aaf8: 687a ldr r2, [r7, #4] + 803aafa: 429a cmp r2, r3 + 803aafc: d104 bne.n 803ab08 + 803aafe: 687b ldr r3, [r7, #4] + 803ab00: 68da ldr r2, [r3, #12] + 803ab02: 693b ldr r3, [r7, #16] + 803ab04: 60da str r2, [r3, #12] + 803ab06: e005 b.n 803ab14 + 803ab08: 693b ldr r3, [r7, #16] + 803ab0a: 68db ldr r3, [r3, #12] + 803ab0c: 613b str r3, [r7, #16] + 803ab0e: 693b ldr r3, [r7, #16] + 803ab10: 2b00 cmp r3, #0 + 803ab12: d1ef bne.n 803aaf4 + 803ab14: 687b ldr r3, [r7, #4] + 803ab16: 2200 movs r2, #0 + 803ab18: 60da str r2, [r3, #12] + 803ab1a: 4b43 ldr r3, [pc, #268] ; (803ac28 ) + 803ab1c: 2201 movs r2, #1 + 803ab1e: 701a strb r2, [r3, #0] pcb->state = TIME_WAIT; - 803aa9c: 687b ldr r3, [r7, #4] - 803aa9e: 220a movs r2, #10 - 803aaa0: 751a strb r2, [r3, #20] + 803ab20: 687b ldr r3, [r7, #4] + 803ab22: 220a movs r2, #10 + 803ab24: 751a strb r2, [r3, #20] TCP_REG(&tcp_tw_pcbs, pcb); - 803aaa2: 4b41 ldr r3, [pc, #260] ; (803aba8 ) - 803aaa4: 681a ldr r2, [r3, #0] - 803aaa6: 687b ldr r3, [r7, #4] - 803aaa8: 60da str r2, [r3, #12] - 803aaaa: 4a3f ldr r2, [pc, #252] ; (803aba8 ) - 803aaac: 687b ldr r3, [r7, #4] - 803aaae: 6013 str r3, [r2, #0] - 803aab0: f003 f8ea bl 803dc88 + 803ab26: 4b41 ldr r3, [pc, #260] ; (803ac2c ) + 803ab28: 681a ldr r2, [r3, #0] + 803ab2a: 687b ldr r3, [r7, #4] + 803ab2c: 60da str r2, [r3, #12] + 803ab2e: 4a3f ldr r2, [pc, #252] ; (803ac2c ) + 803ab30: 687b ldr r3, [r7, #4] + 803ab32: 6013 str r3, [r2, #0] + 803ab34: f003 f8ea bl 803dd0c } break; - 803aab4: e06c b.n 803ab90 + 803ab38: e06c b.n 803ac14 case CLOSING: tcp_receive(pcb); - 803aab6: 6878 ldr r0, [r7, #4] - 803aab8: f000 f984 bl 803adc4 + 803ab3a: 6878 ldr r0, [r7, #4] + 803ab3c: f000 f984 bl 803ae48 if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) { - 803aabc: 4b3b ldr r3, [pc, #236] ; (803abac ) - 803aabe: 781b ldrb r3, [r3, #0] - 803aac0: f003 0310 and.w r3, r3, #16 - 803aac4: 2b00 cmp r3, #0 - 803aac6: d065 beq.n 803ab94 - 803aac8: 687b ldr r3, [r7, #4] - 803aaca: 6d1a ldr r2, [r3, #80] ; 0x50 - 803aacc: 4b38 ldr r3, [pc, #224] ; (803abb0 ) - 803aace: 681b ldr r3, [r3, #0] - 803aad0: 429a cmp r2, r3 - 803aad2: d15f bne.n 803ab94 - 803aad4: 687b ldr r3, [r7, #4] - 803aad6: 6edb ldr r3, [r3, #108] ; 0x6c - 803aad8: 2b00 cmp r3, #0 - 803aada: d15b bne.n 803ab94 + 803ab40: 4b3b ldr r3, [pc, #236] ; (803ac30 ) + 803ab42: 781b ldrb r3, [r3, #0] + 803ab44: f003 0310 and.w r3, r3, #16 + 803ab48: 2b00 cmp r3, #0 + 803ab4a: d065 beq.n 803ac18 + 803ab4c: 687b ldr r3, [r7, #4] + 803ab4e: 6d1a ldr r2, [r3, #80] ; 0x50 + 803ab50: 4b38 ldr r3, [pc, #224] ; (803ac34 ) + 803ab52: 681b ldr r3, [r3, #0] + 803ab54: 429a cmp r2, r3 + 803ab56: d15f bne.n 803ac18 + 803ab58: 687b ldr r3, [r7, #4] + 803ab5a: 6edb ldr r3, [r3, #108] ; 0x6c + 803ab5c: 2b00 cmp r3, #0 + 803ab5e: d15b bne.n 803ac18 LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); tcp_pcb_purge(pcb); - 803aadc: 6878 ldr r0, [r7, #4] - 803aade: f7fe fcf1 bl 80394c4 + 803ab60: 6878 ldr r0, [r7, #4] + 803ab62: f7fe fcf1 bl 8039548 TCP_RMV_ACTIVE(pcb); - 803aae2: 4b35 ldr r3, [pc, #212] ; (803abb8 ) - 803aae4: 681b ldr r3, [r3, #0] - 803aae6: 687a ldr r2, [r7, #4] - 803aae8: 429a cmp r2, r3 - 803aaea: d105 bne.n 803aaf8 - 803aaec: 4b32 ldr r3, [pc, #200] ; (803abb8 ) - 803aaee: 681b ldr r3, [r3, #0] - 803aaf0: 68db ldr r3, [r3, #12] - 803aaf2: 4a31 ldr r2, [pc, #196] ; (803abb8 ) - 803aaf4: 6013 str r3, [r2, #0] - 803aaf6: e013 b.n 803ab20 - 803aaf8: 4b2f ldr r3, [pc, #188] ; (803abb8 ) - 803aafa: 681b ldr r3, [r3, #0] - 803aafc: 60fb str r3, [r7, #12] - 803aafe: e00c b.n 803ab1a - 803ab00: 68fb ldr r3, [r7, #12] - 803ab02: 68db ldr r3, [r3, #12] - 803ab04: 687a ldr r2, [r7, #4] - 803ab06: 429a cmp r2, r3 - 803ab08: d104 bne.n 803ab14 - 803ab0a: 687b ldr r3, [r7, #4] - 803ab0c: 68da ldr r2, [r3, #12] - 803ab0e: 68fb ldr r3, [r7, #12] - 803ab10: 60da str r2, [r3, #12] - 803ab12: e005 b.n 803ab20 - 803ab14: 68fb ldr r3, [r7, #12] - 803ab16: 68db ldr r3, [r3, #12] - 803ab18: 60fb str r3, [r7, #12] - 803ab1a: 68fb ldr r3, [r7, #12] - 803ab1c: 2b00 cmp r3, #0 - 803ab1e: d1ef bne.n 803ab00 - 803ab20: 687b ldr r3, [r7, #4] - 803ab22: 2200 movs r2, #0 - 803ab24: 60da str r2, [r3, #12] - 803ab26: 4b1f ldr r3, [pc, #124] ; (803aba4 ) - 803ab28: 2201 movs r2, #1 - 803ab2a: 701a strb r2, [r3, #0] + 803ab66: 4b35 ldr r3, [pc, #212] ; (803ac3c ) + 803ab68: 681b ldr r3, [r3, #0] + 803ab6a: 687a ldr r2, [r7, #4] + 803ab6c: 429a cmp r2, r3 + 803ab6e: d105 bne.n 803ab7c + 803ab70: 4b32 ldr r3, [pc, #200] ; (803ac3c ) + 803ab72: 681b ldr r3, [r3, #0] + 803ab74: 68db ldr r3, [r3, #12] + 803ab76: 4a31 ldr r2, [pc, #196] ; (803ac3c ) + 803ab78: 6013 str r3, [r2, #0] + 803ab7a: e013 b.n 803aba4 + 803ab7c: 4b2f ldr r3, [pc, #188] ; (803ac3c ) + 803ab7e: 681b ldr r3, [r3, #0] + 803ab80: 60fb str r3, [r7, #12] + 803ab82: e00c b.n 803ab9e + 803ab84: 68fb ldr r3, [r7, #12] + 803ab86: 68db ldr r3, [r3, #12] + 803ab88: 687a ldr r2, [r7, #4] + 803ab8a: 429a cmp r2, r3 + 803ab8c: d104 bne.n 803ab98 + 803ab8e: 687b ldr r3, [r7, #4] + 803ab90: 68da ldr r2, [r3, #12] + 803ab92: 68fb ldr r3, [r7, #12] + 803ab94: 60da str r2, [r3, #12] + 803ab96: e005 b.n 803aba4 + 803ab98: 68fb ldr r3, [r7, #12] + 803ab9a: 68db ldr r3, [r3, #12] + 803ab9c: 60fb str r3, [r7, #12] + 803ab9e: 68fb ldr r3, [r7, #12] + 803aba0: 2b00 cmp r3, #0 + 803aba2: d1ef bne.n 803ab84 + 803aba4: 687b ldr r3, [r7, #4] + 803aba6: 2200 movs r2, #0 + 803aba8: 60da str r2, [r3, #12] + 803abaa: 4b1f ldr r3, [pc, #124] ; (803ac28 ) + 803abac: 2201 movs r2, #1 + 803abae: 701a strb r2, [r3, #0] pcb->state = TIME_WAIT; - 803ab2c: 687b ldr r3, [r7, #4] - 803ab2e: 220a movs r2, #10 - 803ab30: 751a strb r2, [r3, #20] + 803abb0: 687b ldr r3, [r7, #4] + 803abb2: 220a movs r2, #10 + 803abb4: 751a strb r2, [r3, #20] TCP_REG(&tcp_tw_pcbs, pcb); - 803ab32: 4b1d ldr r3, [pc, #116] ; (803aba8 ) - 803ab34: 681a ldr r2, [r3, #0] - 803ab36: 687b ldr r3, [r7, #4] - 803ab38: 60da str r2, [r3, #12] - 803ab3a: 4a1b ldr r2, [pc, #108] ; (803aba8 ) - 803ab3c: 687b ldr r3, [r7, #4] - 803ab3e: 6013 str r3, [r2, #0] - 803ab40: f003 f8a2 bl 803dc88 + 803abb6: 4b1d ldr r3, [pc, #116] ; (803ac2c ) + 803abb8: 681a ldr r2, [r3, #0] + 803abba: 687b ldr r3, [r7, #4] + 803abbc: 60da str r2, [r3, #12] + 803abbe: 4a1b ldr r2, [pc, #108] ; (803ac2c ) + 803abc0: 687b ldr r3, [r7, #4] + 803abc2: 6013 str r3, [r2, #0] + 803abc4: f003 f8a2 bl 803dd0c } break; - 803ab44: e026 b.n 803ab94 + 803abc8: e026 b.n 803ac18 case LAST_ACK: tcp_receive(pcb); - 803ab46: 6878 ldr r0, [r7, #4] - 803ab48: f000 f93c bl 803adc4 + 803abca: 6878 ldr r0, [r7, #4] + 803abcc: f000 f93c bl 803ae48 if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) { - 803ab4c: 4b17 ldr r3, [pc, #92] ; (803abac ) - 803ab4e: 781b ldrb r3, [r3, #0] - 803ab50: f003 0310 and.w r3, r3, #16 - 803ab54: 2b00 cmp r3, #0 - 803ab56: d01f beq.n 803ab98 - 803ab58: 687b ldr r3, [r7, #4] - 803ab5a: 6d1a ldr r2, [r3, #80] ; 0x50 - 803ab5c: 4b14 ldr r3, [pc, #80] ; (803abb0 ) - 803ab5e: 681b ldr r3, [r3, #0] - 803ab60: 429a cmp r2, r3 - 803ab62: d119 bne.n 803ab98 - 803ab64: 687b ldr r3, [r7, #4] - 803ab66: 6edb ldr r3, [r3, #108] ; 0x6c - 803ab68: 2b00 cmp r3, #0 - 803ab6a: d115 bne.n 803ab98 + 803abd0: 4b17 ldr r3, [pc, #92] ; (803ac30 ) + 803abd2: 781b ldrb r3, [r3, #0] + 803abd4: f003 0310 and.w r3, r3, #16 + 803abd8: 2b00 cmp r3, #0 + 803abda: d01f beq.n 803ac1c + 803abdc: 687b ldr r3, [r7, #4] + 803abde: 6d1a ldr r2, [r3, #80] ; 0x50 + 803abe0: 4b14 ldr r3, [pc, #80] ; (803ac34 ) + 803abe2: 681b ldr r3, [r3, #0] + 803abe4: 429a cmp r2, r3 + 803abe6: d119 bne.n 803ac1c + 803abe8: 687b ldr r3, [r7, #4] + 803abea: 6edb ldr r3, [r3, #108] ; 0x6c + 803abec: 2b00 cmp r3, #0 + 803abee: d115 bne.n 803ac1c LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */ recv_flags |= TF_CLOSED; - 803ab6c: 4b11 ldr r3, [pc, #68] ; (803abb4 ) - 803ab6e: 781b ldrb r3, [r3, #0] - 803ab70: f043 0310 orr.w r3, r3, #16 - 803ab74: b2da uxtb r2, r3 - 803ab76: 4b0f ldr r3, [pc, #60] ; (803abb4 ) - 803ab78: 701a strb r2, [r3, #0] + 803abf0: 4b11 ldr r3, [pc, #68] ; (803ac38 ) + 803abf2: 781b ldrb r3, [r3, #0] + 803abf4: f043 0310 orr.w r3, r3, #16 + 803abf8: b2da uxtb r2, r3 + 803abfa: 4b0f ldr r3, [pc, #60] ; (803ac38 ) + 803abfc: 701a strb r2, [r3, #0] } break; - 803ab7a: e00d b.n 803ab98 + 803abfe: e00d b.n 803ac1c default: break; - 803ab7c: bf00 nop - 803ab7e: e00c b.n 803ab9a + 803ac00: bf00 nop + 803ac02: e00c b.n 803ac1e break; - 803ab80: bf00 nop - 803ab82: e00a b.n 803ab9a + 803ac04: bf00 nop + 803ac06: e00a b.n 803ac1e break; - 803ab84: bf00 nop - 803ab86: e008 b.n 803ab9a + 803ac08: bf00 nop + 803ac0a: e008 b.n 803ac1e break; - 803ab88: bf00 nop - 803ab8a: e006 b.n 803ab9a + 803ac0c: bf00 nop + 803ac0e: e006 b.n 803ac1e break; - 803ab8c: bf00 nop - 803ab8e: e004 b.n 803ab9a + 803ac10: bf00 nop + 803ac12: e004 b.n 803ac1e break; - 803ab90: bf00 nop - 803ab92: e002 b.n 803ab9a + 803ac14: bf00 nop + 803ac16: e002 b.n 803ac1e break; - 803ab94: bf00 nop - 803ab96: e000 b.n 803ab9a + 803ac18: bf00 nop + 803ac1a: e000 b.n 803ac1e break; - 803ab98: bf00 nop + 803ac1c: bf00 nop } return ERR_OK; - 803ab9a: 2300 movs r3, #0 -} - 803ab9c: 4618 mov r0, r3 - 803ab9e: 3724 adds r7, #36 ; 0x24 - 803aba0: 46bd mov sp, r7 - 803aba2: bd90 pop {r4, r7, pc} - 803aba4: 2400e96c .word 0x2400e96c - 803aba8: 2400e968 .word 0x2400e968 - 803abac: 2400e99c .word 0x2400e99c - 803abb0: 2400e994 .word 0x2400e994 - 803abb4: 2400e99d .word 0x2400e99d - 803abb8: 2400e964 .word 0x2400e964 - -0803abbc : + 803ac1e: 2300 movs r3, #0 +} + 803ac20: 4618 mov r0, r3 + 803ac22: 3724 adds r7, #36 ; 0x24 + 803ac24: 46bd mov sp, r7 + 803ac26: bd90 pop {r4, r7, pc} + 803ac28: 2400e974 .word 0x2400e974 + 803ac2c: 2400e970 .word 0x2400e970 + 803ac30: 2400e9a4 .word 0x2400e9a4 + 803ac34: 2400e99c .word 0x2400e99c + 803ac38: 2400e9a5 .word 0x2400e9a5 + 803ac3c: 2400e96c .word 0x2400e96c + +0803ac40 : * * Called from tcp_receive() */ static void tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next) { - 803abbc: b590 push {r4, r7, lr} - 803abbe: b085 sub sp, #20 - 803abc0: af00 add r7, sp, #0 - 803abc2: 6078 str r0, [r7, #4] - 803abc4: 6039 str r1, [r7, #0] + 803ac40: b590 push {r4, r7, lr} + 803ac42: b085 sub sp, #20 + 803ac44: af00 add r7, sp, #0 + 803ac46: 6078 str r0, [r7, #4] + 803ac48: 6039 str r1, [r7, #0] struct tcp_seg *old_seg; LWIP_ASSERT("tcp_oos_insert_segment: invalid cseg", cseg != NULL); - 803abc6: 687b ldr r3, [r7, #4] - 803abc8: 2b00 cmp r3, #0 - 803abca: d106 bne.n 803abda - 803abcc: 4b3b ldr r3, [pc, #236] ; (803acbc ) - 803abce: f240 421f movw r2, #1055 ; 0x41f - 803abd2: 493b ldr r1, [pc, #236] ; (803acc0 ) - 803abd4: 483b ldr r0, [pc, #236] ; (803acc4 ) - 803abd6: f005 ff9b bl 8040b10 + 803ac4a: 687b ldr r3, [r7, #4] + 803ac4c: 2b00 cmp r3, #0 + 803ac4e: d106 bne.n 803ac5e + 803ac50: 4b3b ldr r3, [pc, #236] ; (803ad40 ) + 803ac52: f240 421f movw r2, #1055 ; 0x41f + 803ac56: 493b ldr r1, [pc, #236] ; (803ad44 ) + 803ac58: 483b ldr r0, [pc, #236] ; (803ad48 ) + 803ac5a: f005 ff9b bl 8040b94 if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { - 803abda: 687b ldr r3, [r7, #4] - 803abdc: 68db ldr r3, [r3, #12] - 803abde: 899b ldrh r3, [r3, #12] - 803abe0: b29b uxth r3, r3 - 803abe2: 4618 mov r0, r3 - 803abe4: f7fb f978 bl 8035ed8 - 803abe8: 4603 mov r3, r0 - 803abea: b2db uxtb r3, r3 - 803abec: f003 0301 and.w r3, r3, #1 - 803abf0: 2b00 cmp r3, #0 - 803abf2: d028 beq.n 803ac46 + 803ac5e: 687b ldr r3, [r7, #4] + 803ac60: 68db ldr r3, [r3, #12] + 803ac62: 899b ldrh r3, [r3, #12] + 803ac64: b29b uxth r3, r3 + 803ac66: 4618 mov r0, r3 + 803ac68: f7fb f978 bl 8035f5c + 803ac6c: 4603 mov r3, r0 + 803ac6e: b2db uxtb r3, r3 + 803ac70: f003 0301 and.w r3, r3, #1 + 803ac74: 2b00 cmp r3, #0 + 803ac76: d028 beq.n 803acca /* received segment overlaps all following segments */ tcp_segs_free(next); - 803abf4: 6838 ldr r0, [r7, #0] - 803abf6: f7fe f9b9 bl 8038f6c + 803ac78: 6838 ldr r0, [r7, #0] + 803ac7a: f7fe f9b9 bl 8038ff0 next = NULL; - 803abfa: 2300 movs r3, #0 - 803abfc: 603b str r3, [r7, #0] - 803abfe: e056 b.n 803acae + 803ac7e: 2300 movs r3, #0 + 803ac80: 603b str r3, [r7, #0] + 803ac82: e056 b.n 803ad32 oos queue may have segments with FIN flag */ while (next && TCP_SEQ_GEQ((seqno + cseg->len), (next->tcphdr->seqno + next->len))) { /* cseg with FIN already processed */ if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { - 803ac00: 683b ldr r3, [r7, #0] - 803ac02: 68db ldr r3, [r3, #12] - 803ac04: 899b ldrh r3, [r3, #12] - 803ac06: b29b uxth r3, r3 - 803ac08: 4618 mov r0, r3 - 803ac0a: f7fb f965 bl 8035ed8 - 803ac0e: 4603 mov r3, r0 - 803ac10: b2db uxtb r3, r3 - 803ac12: f003 0301 and.w r3, r3, #1 - 803ac16: 2b00 cmp r3, #0 - 803ac18: d00d beq.n 803ac36 + 803ac84: 683b ldr r3, [r7, #0] + 803ac86: 68db ldr r3, [r3, #12] + 803ac88: 899b ldrh r3, [r3, #12] + 803ac8a: b29b uxth r3, r3 + 803ac8c: 4618 mov r0, r3 + 803ac8e: f7fb f965 bl 8035f5c + 803ac92: 4603 mov r3, r0 + 803ac94: b2db uxtb r3, r3 + 803ac96: f003 0301 and.w r3, r3, #1 + 803ac9a: 2b00 cmp r3, #0 + 803ac9c: d00d beq.n 803acba TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN); - 803ac1a: 687b ldr r3, [r7, #4] - 803ac1c: 68db ldr r3, [r3, #12] - 803ac1e: 899b ldrh r3, [r3, #12] - 803ac20: b29c uxth r4, r3 - 803ac22: 2001 movs r0, #1 - 803ac24: f7fb f958 bl 8035ed8 - 803ac28: 4603 mov r3, r0 - 803ac2a: 461a mov r2, r3 - 803ac2c: 687b ldr r3, [r7, #4] - 803ac2e: 68db ldr r3, [r3, #12] - 803ac30: 4322 orrs r2, r4 - 803ac32: b292 uxth r2, r2 - 803ac34: 819a strh r2, [r3, #12] + 803ac9e: 687b ldr r3, [r7, #4] + 803aca0: 68db ldr r3, [r3, #12] + 803aca2: 899b ldrh r3, [r3, #12] + 803aca4: b29c uxth r4, r3 + 803aca6: 2001 movs r0, #1 + 803aca8: f7fb f958 bl 8035f5c + 803acac: 4603 mov r3, r0 + 803acae: 461a mov r2, r3 + 803acb0: 687b ldr r3, [r7, #4] + 803acb2: 68db ldr r3, [r3, #12] + 803acb4: 4322 orrs r2, r4 + 803acb6: b292 uxth r2, r2 + 803acb8: 819a strh r2, [r3, #12] } old_seg = next; - 803ac36: 683b ldr r3, [r7, #0] - 803ac38: 60fb str r3, [r7, #12] + 803acba: 683b ldr r3, [r7, #0] + 803acbc: 60fb str r3, [r7, #12] next = next->next; - 803ac3a: 683b ldr r3, [r7, #0] - 803ac3c: 681b ldr r3, [r3, #0] - 803ac3e: 603b str r3, [r7, #0] + 803acbe: 683b ldr r3, [r7, #0] + 803acc0: 681b ldr r3, [r3, #0] + 803acc2: 603b str r3, [r7, #0] tcp_seg_free(old_seg); - 803ac40: 68f8 ldr r0, [r7, #12] - 803ac42: f7fe f9a8 bl 8038f96 + 803acc4: 68f8 ldr r0, [r7, #12] + 803acc6: f7fe f9a8 bl 803901a while (next && - 803ac46: 683b ldr r3, [r7, #0] - 803ac48: 2b00 cmp r3, #0 - 803ac4a: d00e beq.n 803ac6a + 803acca: 683b ldr r3, [r7, #0] + 803accc: 2b00 cmp r3, #0 + 803acce: d00e beq.n 803acee TCP_SEQ_GEQ((seqno + cseg->len), - 803ac4c: 687b ldr r3, [r7, #4] - 803ac4e: 891b ldrh r3, [r3, #8] - 803ac50: 461a mov r2, r3 - 803ac52: 4b1d ldr r3, [pc, #116] ; (803acc8 ) - 803ac54: 681b ldr r3, [r3, #0] - 803ac56: 441a add r2, r3 - 803ac58: 683b ldr r3, [r7, #0] - 803ac5a: 68db ldr r3, [r3, #12] - 803ac5c: 685b ldr r3, [r3, #4] - 803ac5e: 6839 ldr r1, [r7, #0] - 803ac60: 8909 ldrh r1, [r1, #8] - 803ac62: 440b add r3, r1 - 803ac64: 1ad3 subs r3, r2, r3 + 803acd0: 687b ldr r3, [r7, #4] + 803acd2: 891b ldrh r3, [r3, #8] + 803acd4: 461a mov r2, r3 + 803acd6: 4b1d ldr r3, [pc, #116] ; (803ad4c ) + 803acd8: 681b ldr r3, [r3, #0] + 803acda: 441a add r2, r3 + 803acdc: 683b ldr r3, [r7, #0] + 803acde: 68db ldr r3, [r3, #12] + 803ace0: 685b ldr r3, [r3, #4] + 803ace2: 6839 ldr r1, [r7, #0] + 803ace4: 8909 ldrh r1, [r1, #8] + 803ace6: 440b add r3, r1 + 803ace8: 1ad3 subs r3, r2, r3 while (next && - 803ac66: 2b00 cmp r3, #0 - 803ac68: daca bge.n 803ac00 + 803acea: 2b00 cmp r3, #0 + 803acec: daca bge.n 803ac84 } if (next && - 803ac6a: 683b ldr r3, [r7, #0] - 803ac6c: 2b00 cmp r3, #0 - 803ac6e: d01e beq.n 803acae + 803acee: 683b ldr r3, [r7, #0] + 803acf0: 2b00 cmp r3, #0 + 803acf2: d01e beq.n 803ad32 TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) { - 803ac70: 687b ldr r3, [r7, #4] - 803ac72: 891b ldrh r3, [r3, #8] - 803ac74: 461a mov r2, r3 - 803ac76: 4b14 ldr r3, [pc, #80] ; (803acc8 ) - 803ac78: 681b ldr r3, [r3, #0] - 803ac7a: 441a add r2, r3 - 803ac7c: 683b ldr r3, [r7, #0] - 803ac7e: 68db ldr r3, [r3, #12] - 803ac80: 685b ldr r3, [r3, #4] - 803ac82: 1ad3 subs r3, r2, r3 + 803acf4: 687b ldr r3, [r7, #4] + 803acf6: 891b ldrh r3, [r3, #8] + 803acf8: 461a mov r2, r3 + 803acfa: 4b14 ldr r3, [pc, #80] ; (803ad4c ) + 803acfc: 681b ldr r3, [r3, #0] + 803acfe: 441a add r2, r3 + 803ad00: 683b ldr r3, [r7, #0] + 803ad02: 68db ldr r3, [r3, #12] + 803ad04: 685b ldr r3, [r3, #4] + 803ad06: 1ad3 subs r3, r2, r3 if (next && - 803ac84: 2b00 cmp r3, #0 - 803ac86: dd12 ble.n 803acae + 803ad08: 2b00 cmp r3, #0 + 803ad0a: dd12 ble.n 803ad32 /* We need to trim the incoming segment. */ cseg->len = (u16_t)(next->tcphdr->seqno - seqno); - 803ac88: 683b ldr r3, [r7, #0] - 803ac8a: 68db ldr r3, [r3, #12] - 803ac8c: 685b ldr r3, [r3, #4] - 803ac8e: b29a uxth r2, r3 - 803ac90: 4b0d ldr r3, [pc, #52] ; (803acc8 ) - 803ac92: 681b ldr r3, [r3, #0] - 803ac94: b29b uxth r3, r3 - 803ac96: 1ad3 subs r3, r2, r3 - 803ac98: b29a uxth r2, r3 - 803ac9a: 687b ldr r3, [r7, #4] - 803ac9c: 811a strh r2, [r3, #8] + 803ad0c: 683b ldr r3, [r7, #0] + 803ad0e: 68db ldr r3, [r3, #12] + 803ad10: 685b ldr r3, [r3, #4] + 803ad12: b29a uxth r2, r3 + 803ad14: 4b0d ldr r3, [pc, #52] ; (803ad4c ) + 803ad16: 681b ldr r3, [r3, #0] + 803ad18: b29b uxth r3, r3 + 803ad1a: 1ad3 subs r3, r2, r3 + 803ad1c: b29a uxth r2, r3 + 803ad1e: 687b ldr r3, [r7, #4] + 803ad20: 811a strh r2, [r3, #8] pbuf_realloc(cseg->p, cseg->len); - 803ac9e: 687b ldr r3, [r7, #4] - 803aca0: 685a ldr r2, [r3, #4] - 803aca2: 687b ldr r3, [r7, #4] - 803aca4: 891b ldrh r3, [r3, #8] - 803aca6: 4619 mov r1, r3 - 803aca8: 4610 mov r0, r2 - 803acaa: f7fc fbc1 bl 8037430 + 803ad22: 687b ldr r3, [r7, #4] + 803ad24: 685a ldr r2, [r3, #4] + 803ad26: 687b ldr r3, [r7, #4] + 803ad28: 891b ldrh r3, [r3, #8] + 803ad2a: 4619 mov r1, r3 + 803ad2c: 4610 mov r0, r2 + 803ad2e: f7fc fbc1 bl 80374b4 } } cseg->next = next; - 803acae: 687b ldr r3, [r7, #4] - 803acb0: 683a ldr r2, [r7, #0] - 803acb2: 601a str r2, [r3, #0] + 803ad32: 687b ldr r3, [r7, #4] + 803ad34: 683a ldr r2, [r7, #0] + 803ad36: 601a str r2, [r3, #0] } - 803acb4: bf00 nop - 803acb6: 3714 adds r7, #20 - 803acb8: 46bd mov sp, r7 - 803acba: bd90 pop {r4, r7, pc} - 803acbc: 08043500 .word 0x08043500 - 803acc0: 080437c0 .word 0x080437c0 - 803acc4: 0804354c .word 0x0804354c - 803acc8: 2400e990 .word 0x2400e990 + 803ad38: bf00 nop + 803ad3a: 3714 adds r7, #20 + 803ad3c: 46bd mov sp, r7 + 803ad3e: bd90 pop {r4, r7, pc} + 803ad40: 08043580 .word 0x08043580 + 803ad44: 08043840 .word 0x08043840 + 803ad48: 080435cc .word 0x080435cc + 803ad4c: 2400e998 .word 0x2400e998 -0803accc : +0803ad50 : /** Remove segments from a list if the incoming ACK acknowledges them */ static struct tcp_seg * tcp_free_acked_segments(struct tcp_pcb *pcb, struct tcp_seg *seg_list, const char *dbg_list_name, struct tcp_seg *dbg_other_seg_list) { - 803accc: b5b0 push {r4, r5, r7, lr} - 803acce: b086 sub sp, #24 - 803acd0: af00 add r7, sp, #0 - 803acd2: 60f8 str r0, [r7, #12] - 803acd4: 60b9 str r1, [r7, #8] - 803acd6: 607a str r2, [r7, #4] - 803acd8: 603b str r3, [r7, #0] + 803ad50: b5b0 push {r4, r5, r7, lr} + 803ad52: b086 sub sp, #24 + 803ad54: af00 add r7, sp, #0 + 803ad56: 60f8 str r0, [r7, #12] + 803ad58: 60b9 str r1, [r7, #8] + 803ad5a: 607a str r2, [r7, #4] + 803ad5c: 603b str r3, [r7, #0] u16_t clen; LWIP_UNUSED_ARG(dbg_list_name); LWIP_UNUSED_ARG(dbg_other_seg_list); while (seg_list != NULL && - 803acda: e03e b.n 803ad5a + 803ad5e: e03e b.n 803adde LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->%s\n", lwip_ntohl(seg_list->tcphdr->seqno), lwip_ntohl(seg_list->tcphdr->seqno) + TCP_TCPLEN(seg_list), dbg_list_name)); next = seg_list; - 803acdc: 68bb ldr r3, [r7, #8] - 803acde: 617b str r3, [r7, #20] + 803ad60: 68bb ldr r3, [r7, #8] + 803ad62: 617b str r3, [r7, #20] seg_list = seg_list->next; - 803ace0: 68bb ldr r3, [r7, #8] - 803ace2: 681b ldr r3, [r3, #0] - 803ace4: 60bb str r3, [r7, #8] + 803ad64: 68bb ldr r3, [r7, #8] + 803ad66: 681b ldr r3, [r3, #0] + 803ad68: 60bb str r3, [r7, #8] clen = pbuf_clen(next->p); - 803ace6: 697b ldr r3, [r7, #20] - 803ace8: 685b ldr r3, [r3, #4] - 803acea: 4618 mov r0, r3 - 803acec: f7fc fdae bl 803784c - 803acf0: 4603 mov r3, r0 - 803acf2: 827b strh r3, [r7, #18] + 803ad6a: 697b ldr r3, [r7, #20] + 803ad6c: 685b ldr r3, [r3, #4] + 803ad6e: 4618 mov r0, r3 + 803ad70: f7fc fdae bl 80378d0 + 803ad74: 4603 mov r3, r0 + 803ad76: 827b strh r3, [r7, #18] LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"TCPWNDSIZE_F" ... ", (tcpwnd_size_t)pcb->snd_queuelen)); LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= clen)); - 803acf4: 68fb ldr r3, [r7, #12] - 803acf6: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803acfa: 8a7a ldrh r2, [r7, #18] - 803acfc: 429a cmp r2, r3 - 803acfe: d906 bls.n 803ad0e - 803ad00: 4b2a ldr r3, [pc, #168] ; (803adac ) - 803ad02: f240 4257 movw r2, #1111 ; 0x457 - 803ad06: 492a ldr r1, [pc, #168] ; (803adb0 ) - 803ad08: 482a ldr r0, [pc, #168] ; (803adb4 ) - 803ad0a: f005 ff01 bl 8040b10 + 803ad78: 68fb ldr r3, [r7, #12] + 803ad7a: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803ad7e: 8a7a ldrh r2, [r7, #18] + 803ad80: 429a cmp r2, r3 + 803ad82: d906 bls.n 803ad92 + 803ad84: 4b2a ldr r3, [pc, #168] ; (803ae30 ) + 803ad86: f240 4257 movw r2, #1111 ; 0x457 + 803ad8a: 492a ldr r1, [pc, #168] ; (803ae34 ) + 803ad8c: 482a ldr r0, [pc, #168] ; (803ae38 ) + 803ad8e: f005 ff01 bl 8040b94 pcb->snd_queuelen = (u16_t)(pcb->snd_queuelen - clen); - 803ad0e: 68fb ldr r3, [r7, #12] - 803ad10: f8b3 2066 ldrh.w r2, [r3, #102] ; 0x66 - 803ad14: 8a7b ldrh r3, [r7, #18] - 803ad16: 1ad3 subs r3, r2, r3 - 803ad18: b29a uxth r2, r3 - 803ad1a: 68fb ldr r3, [r7, #12] - 803ad1c: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803ad92: 68fb ldr r3, [r7, #12] + 803ad94: f8b3 2066 ldrh.w r2, [r3, #102] ; 0x66 + 803ad98: 8a7b ldrh r3, [r7, #18] + 803ad9a: 1ad3 subs r3, r2, r3 + 803ad9c: b29a uxth r2, r3 + 803ad9e: 68fb ldr r3, [r7, #12] + 803ada0: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 recv_acked = (tcpwnd_size_t)(recv_acked + next->len); - 803ad20: 697b ldr r3, [r7, #20] - 803ad22: 891a ldrh r2, [r3, #8] - 803ad24: 4b24 ldr r3, [pc, #144] ; (803adb8 ) - 803ad26: 881b ldrh r3, [r3, #0] - 803ad28: 4413 add r3, r2 - 803ad2a: b29a uxth r2, r3 - 803ad2c: 4b22 ldr r3, [pc, #136] ; (803adb8 ) - 803ad2e: 801a strh r2, [r3, #0] + 803ada4: 697b ldr r3, [r7, #20] + 803ada6: 891a ldrh r2, [r3, #8] + 803ada8: 4b24 ldr r3, [pc, #144] ; (803ae3c ) + 803adaa: 881b ldrh r3, [r3, #0] + 803adac: 4413 add r3, r2 + 803adae: b29a uxth r2, r3 + 803adb0: 4b22 ldr r3, [pc, #136] ; (803ae3c ) + 803adb2: 801a strh r2, [r3, #0] tcp_seg_free(next); - 803ad30: 6978 ldr r0, [r7, #20] - 803ad32: f7fe f930 bl 8038f96 + 803adb4: 6978 ldr r0, [r7, #20] + 803adb6: f7fe f930 bl 803901a LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"TCPWNDSIZE_F" (after freeing %s)\n", (tcpwnd_size_t)pcb->snd_queuelen, dbg_list_name)); if (pcb->snd_queuelen != 0) { - 803ad36: 68fb ldr r3, [r7, #12] - 803ad38: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803ad3c: 2b00 cmp r3, #0 - 803ad3e: d00c beq.n 803ad5a + 803adba: 68fb ldr r3, [r7, #12] + 803adbc: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803adc0: 2b00 cmp r3, #0 + 803adc2: d00c beq.n 803adde LWIP_ASSERT("tcp_receive: valid queue length", - 803ad40: 68bb ldr r3, [r7, #8] - 803ad42: 2b00 cmp r3, #0 - 803ad44: d109 bne.n 803ad5a - 803ad46: 683b ldr r3, [r7, #0] - 803ad48: 2b00 cmp r3, #0 - 803ad4a: d106 bne.n 803ad5a - 803ad4c: 4b17 ldr r3, [pc, #92] ; (803adac ) - 803ad4e: f240 4261 movw r2, #1121 ; 0x461 - 803ad52: 491a ldr r1, [pc, #104] ; (803adbc ) - 803ad54: 4817 ldr r0, [pc, #92] ; (803adb4 ) - 803ad56: f005 fedb bl 8040b10 + 803adc4: 68bb ldr r3, [r7, #8] + 803adc6: 2b00 cmp r3, #0 + 803adc8: d109 bne.n 803adde + 803adca: 683b ldr r3, [r7, #0] + 803adcc: 2b00 cmp r3, #0 + 803adce: d106 bne.n 803adde + 803add0: 4b17 ldr r3, [pc, #92] ; (803ae30 ) + 803add2: f240 4261 movw r2, #1121 ; 0x461 + 803add6: 491a ldr r1, [pc, #104] ; (803ae40 ) + 803add8: 4817 ldr r0, [pc, #92] ; (803ae38 ) + 803adda: f005 fedb bl 8040b94 while (seg_list != NULL && - 803ad5a: 68bb ldr r3, [r7, #8] - 803ad5c: 2b00 cmp r3, #0 - 803ad5e: d020 beq.n 803ada2 + 803adde: 68bb ldr r3, [r7, #8] + 803ade0: 2b00 cmp r3, #0 + 803ade2: d020 beq.n 803ae26 TCP_SEQ_LEQ(lwip_ntohl(seg_list->tcphdr->seqno) + - 803ad60: 68bb ldr r3, [r7, #8] - 803ad62: 68db ldr r3, [r3, #12] - 803ad64: 685b ldr r3, [r3, #4] - 803ad66: 4618 mov r0, r3 - 803ad68: f7fb f8cb bl 8035f02 - 803ad6c: 4604 mov r4, r0 - 803ad6e: 68bb ldr r3, [r7, #8] - 803ad70: 891b ldrh r3, [r3, #8] - 803ad72: 461d mov r5, r3 - 803ad74: 68bb ldr r3, [r7, #8] - 803ad76: 68db ldr r3, [r3, #12] - 803ad78: 899b ldrh r3, [r3, #12] - 803ad7a: b29b uxth r3, r3 - 803ad7c: 4618 mov r0, r3 - 803ad7e: f7fb f8ab bl 8035ed8 - 803ad82: 4603 mov r3, r0 - 803ad84: b2db uxtb r3, r3 - 803ad86: f003 0303 and.w r3, r3, #3 - 803ad8a: 2b00 cmp r3, #0 - 803ad8c: d001 beq.n 803ad92 - 803ad8e: 2301 movs r3, #1 - 803ad90: e000 b.n 803ad94 - 803ad92: 2300 movs r3, #0 - 803ad94: 442b add r3, r5 - 803ad96: 18e2 adds r2, r4, r3 - 803ad98: 4b09 ldr r3, [pc, #36] ; (803adc0 ) - 803ad9a: 681b ldr r3, [r3, #0] - 803ad9c: 1ad3 subs r3, r2, r3 + 803ade4: 68bb ldr r3, [r7, #8] + 803ade6: 68db ldr r3, [r3, #12] + 803ade8: 685b ldr r3, [r3, #4] + 803adea: 4618 mov r0, r3 + 803adec: f7fb f8cb bl 8035f86 + 803adf0: 4604 mov r4, r0 + 803adf2: 68bb ldr r3, [r7, #8] + 803adf4: 891b ldrh r3, [r3, #8] + 803adf6: 461d mov r5, r3 + 803adf8: 68bb ldr r3, [r7, #8] + 803adfa: 68db ldr r3, [r3, #12] + 803adfc: 899b ldrh r3, [r3, #12] + 803adfe: b29b uxth r3, r3 + 803ae00: 4618 mov r0, r3 + 803ae02: f7fb f8ab bl 8035f5c + 803ae06: 4603 mov r3, r0 + 803ae08: b2db uxtb r3, r3 + 803ae0a: f003 0303 and.w r3, r3, #3 + 803ae0e: 2b00 cmp r3, #0 + 803ae10: d001 beq.n 803ae16 + 803ae12: 2301 movs r3, #1 + 803ae14: e000 b.n 803ae18 + 803ae16: 2300 movs r3, #0 + 803ae18: 442b add r3, r5 + 803ae1a: 18e2 adds r2, r4, r3 + 803ae1c: 4b09 ldr r3, [pc, #36] ; (803ae44 ) + 803ae1e: 681b ldr r3, [r3, #0] + 803ae20: 1ad3 subs r3, r2, r3 while (seg_list != NULL && - 803ad9e: 2b00 cmp r3, #0 - 803ada0: dd9c ble.n 803acdc + 803ae22: 2b00 cmp r3, #0 + 803ae24: dd9c ble.n 803ad60 seg_list != NULL || dbg_other_seg_list != NULL); } } return seg_list; - 803ada2: 68bb ldr r3, [r7, #8] -} - 803ada4: 4618 mov r0, r3 - 803ada6: 3718 adds r7, #24 - 803ada8: 46bd mov sp, r7 - 803adaa: bdb0 pop {r4, r5, r7, pc} - 803adac: 08043500 .word 0x08043500 - 803adb0: 080437e8 .word 0x080437e8 - 803adb4: 0804354c .word 0x0804354c - 803adb8: 2400e998 .word 0x2400e998 - 803adbc: 08043810 .word 0x08043810 - 803adc0: 2400e994 .word 0x2400e994 - -0803adc4 : + 803ae26: 68bb ldr r3, [r7, #8] +} + 803ae28: 4618 mov r0, r3 + 803ae2a: 3718 adds r7, #24 + 803ae2c: 46bd mov sp, r7 + 803ae2e: bdb0 pop {r4, r5, r7, pc} + 803ae30: 08043580 .word 0x08043580 + 803ae34: 08043868 .word 0x08043868 + 803ae38: 080435cc .word 0x080435cc + 803ae3c: 2400e9a0 .word 0x2400e9a0 + 803ae40: 08043890 .word 0x08043890 + 803ae44: 2400e99c .word 0x2400e99c + +0803ae48 : * * Called from tcp_process(). */ static void tcp_receive(struct tcp_pcb *pcb) { - 803adc4: b5b0 push {r4, r5, r7, lr} - 803adc6: b094 sub sp, #80 ; 0x50 - 803adc8: af00 add r7, sp, #0 - 803adca: 6078 str r0, [r7, #4] + 803ae48: b5b0 push {r4, r5, r7, lr} + 803ae4a: b094 sub sp, #80 ; 0x50 + 803ae4c: af00 add r7, sp, #0 + 803ae4e: 6078 str r0, [r7, #4] s16_t m; u32_t right_wnd_edge; int found_dupack = 0; - 803adcc: 2300 movs r3, #0 - 803adce: 64bb str r3, [r7, #72] ; 0x48 + 803ae50: 2300 movs r3, #0 + 803ae52: 64bb str r3, [r7, #72] ; 0x48 LWIP_ASSERT("tcp_receive: invalid pcb", pcb != NULL); - 803add0: 687b ldr r3, [r7, #4] - 803add2: 2b00 cmp r3, #0 - 803add4: d106 bne.n 803ade4 - 803add6: 4b91 ldr r3, [pc, #580] ; (803b01c ) - 803add8: f240 427b movw r2, #1147 ; 0x47b - 803addc: 4990 ldr r1, [pc, #576] ; (803b020 ) - 803adde: 4891 ldr r0, [pc, #580] ; (803b024 ) - 803ade0: f005 fe96 bl 8040b10 + 803ae54: 687b ldr r3, [r7, #4] + 803ae56: 2b00 cmp r3, #0 + 803ae58: d106 bne.n 803ae68 + 803ae5a: 4b91 ldr r3, [pc, #580] ; (803b0a0 ) + 803ae5c: f240 427b movw r2, #1147 ; 0x47b + 803ae60: 4990 ldr r1, [pc, #576] ; (803b0a4 ) + 803ae62: 4891 ldr r0, [pc, #580] ; (803b0a8 ) + 803ae64: f005 fe96 bl 8040b94 LWIP_ASSERT("tcp_receive: wrong state", pcb->state >= ESTABLISHED); - 803ade4: 687b ldr r3, [r7, #4] - 803ade6: 7d1b ldrb r3, [r3, #20] - 803ade8: 2b03 cmp r3, #3 - 803adea: d806 bhi.n 803adfa - 803adec: 4b8b ldr r3, [pc, #556] ; (803b01c ) - 803adee: f240 427c movw r2, #1148 ; 0x47c - 803adf2: 498d ldr r1, [pc, #564] ; (803b028 ) - 803adf4: 488b ldr r0, [pc, #556] ; (803b024 ) - 803adf6: f005 fe8b bl 8040b10 + 803ae68: 687b ldr r3, [r7, #4] + 803ae6a: 7d1b ldrb r3, [r3, #20] + 803ae6c: 2b03 cmp r3, #3 + 803ae6e: d806 bhi.n 803ae7e + 803ae70: 4b8b ldr r3, [pc, #556] ; (803b0a0 ) + 803ae72: f240 427c movw r2, #1148 ; 0x47c + 803ae76: 498d ldr r1, [pc, #564] ; (803b0ac ) + 803ae78: 488b ldr r0, [pc, #556] ; (803b0a8 ) + 803ae7a: f005 fe8b bl 8040b94 if (flags & TCP_ACK) { - 803adfa: 4b8c ldr r3, [pc, #560] ; (803b02c ) - 803adfc: 781b ldrb r3, [r3, #0] - 803adfe: f003 0310 and.w r3, r3, #16 - 803ae02: 2b00 cmp r3, #0 - 803ae04: f000 8264 beq.w 803b2d0 + 803ae7e: 4b8c ldr r3, [pc, #560] ; (803b0b0 ) + 803ae80: 781b ldrb r3, [r3, #0] + 803ae82: f003 0310 and.w r3, r3, #16 + 803ae86: 2b00 cmp r3, #0 + 803ae88: f000 8264 beq.w 803b354 right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2; - 803ae08: 687b ldr r3, [r7, #4] - 803ae0a: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803ae0e: 461a mov r2, r3 - 803ae10: 687b ldr r3, [r7, #4] - 803ae12: 6d9b ldr r3, [r3, #88] ; 0x58 - 803ae14: 4413 add r3, r2 - 803ae16: 633b str r3, [r7, #48] ; 0x30 + 803ae8c: 687b ldr r3, [r7, #4] + 803ae8e: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803ae92: 461a mov r2, r3 + 803ae94: 687b ldr r3, [r7, #4] + 803ae96: 6d9b ldr r3, [r3, #88] ; 0x58 + 803ae98: 4413 add r3, r2 + 803ae9a: 633b str r3, [r7, #48] ; 0x30 /* Update window. */ if (TCP_SEQ_LT(pcb->snd_wl1, seqno) || - 803ae18: 687b ldr r3, [r7, #4] - 803ae1a: 6d5a ldr r2, [r3, #84] ; 0x54 - 803ae1c: 4b84 ldr r3, [pc, #528] ; (803b030 ) - 803ae1e: 681b ldr r3, [r3, #0] - 803ae20: 1ad3 subs r3, r2, r3 - 803ae22: 2b00 cmp r3, #0 - 803ae24: db1b blt.n 803ae5e + 803ae9c: 687b ldr r3, [r7, #4] + 803ae9e: 6d5a ldr r2, [r3, #84] ; 0x54 + 803aea0: 4b84 ldr r3, [pc, #528] ; (803b0b4 ) + 803aea2: 681b ldr r3, [r3, #0] + 803aea4: 1ad3 subs r3, r2, r3 + 803aea6: 2b00 cmp r3, #0 + 803aea8: db1b blt.n 803aee2 (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || - 803ae26: 687b ldr r3, [r7, #4] - 803ae28: 6d5a ldr r2, [r3, #84] ; 0x54 - 803ae2a: 4b81 ldr r3, [pc, #516] ; (803b030 ) - 803ae2c: 681b ldr r3, [r3, #0] + 803aeaa: 687b ldr r3, [r7, #4] + 803aeac: 6d5a ldr r2, [r3, #84] ; 0x54 + 803aeae: 4b81 ldr r3, [pc, #516] ; (803b0b4 ) + 803aeb0: 681b ldr r3, [r3, #0] if (TCP_SEQ_LT(pcb->snd_wl1, seqno) || - 803ae2e: 429a cmp r2, r3 - 803ae30: d106 bne.n 803ae40 + 803aeb2: 429a cmp r2, r3 + 803aeb4: d106 bne.n 803aec4 (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || - 803ae32: 687b ldr r3, [r7, #4] - 803ae34: 6d9a ldr r2, [r3, #88] ; 0x58 - 803ae36: 4b7f ldr r3, [pc, #508] ; (803b034 ) - 803ae38: 681b ldr r3, [r3, #0] - 803ae3a: 1ad3 subs r3, r2, r3 - 803ae3c: 2b00 cmp r3, #0 - 803ae3e: db0e blt.n 803ae5e + 803aeb6: 687b ldr r3, [r7, #4] + 803aeb8: 6d9a ldr r2, [r3, #88] ; 0x58 + 803aeba: 4b7f ldr r3, [pc, #508] ; (803b0b8 ) + 803aebc: 681b ldr r3, [r3, #0] + 803aebe: 1ad3 subs r3, r2, r3 + 803aec0: 2b00 cmp r3, #0 + 803aec2: db0e blt.n 803aee2 (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) { - 803ae40: 687b ldr r3, [r7, #4] - 803ae42: 6d9a ldr r2, [r3, #88] ; 0x58 - 803ae44: 4b7b ldr r3, [pc, #492] ; (803b034 ) - 803ae46: 681b ldr r3, [r3, #0] + 803aec4: 687b ldr r3, [r7, #4] + 803aec6: 6d9a ldr r2, [r3, #88] ; 0x58 + 803aec8: 4b7b ldr r3, [pc, #492] ; (803b0b8 ) + 803aeca: 681b ldr r3, [r3, #0] (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || - 803ae48: 429a cmp r2, r3 - 803ae4a: d125 bne.n 803ae98 + 803aecc: 429a cmp r2, r3 + 803aece: d125 bne.n 803af1c (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) { - 803ae4c: 4b7a ldr r3, [pc, #488] ; (803b038 ) - 803ae4e: 681b ldr r3, [r3, #0] - 803ae50: 89db ldrh r3, [r3, #14] - 803ae52: b29a uxth r2, r3 - 803ae54: 687b ldr r3, [r7, #4] - 803ae56: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803ae5a: 429a cmp r2, r3 - 803ae5c: d91c bls.n 803ae98 + 803aed0: 4b7a ldr r3, [pc, #488] ; (803b0bc ) + 803aed2: 681b ldr r3, [r3, #0] + 803aed4: 89db ldrh r3, [r3, #14] + 803aed6: b29a uxth r2, r3 + 803aed8: 687b ldr r3, [r7, #4] + 803aeda: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803aede: 429a cmp r2, r3 + 803aee0: d91c bls.n 803af1c pcb->snd_wnd = SND_WND_SCALE(pcb, tcphdr->wnd); - 803ae5e: 4b76 ldr r3, [pc, #472] ; (803b038 ) - 803ae60: 681b ldr r3, [r3, #0] - 803ae62: 89db ldrh r3, [r3, #14] - 803ae64: b29a uxth r2, r3 - 803ae66: 687b ldr r3, [r7, #4] - 803ae68: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 + 803aee2: 4b76 ldr r3, [pc, #472] ; (803b0bc ) + 803aee4: 681b ldr r3, [r3, #0] + 803aee6: 89db ldrh r3, [r3, #14] + 803aee8: b29a uxth r2, r3 + 803aeea: 687b ldr r3, [r7, #4] + 803aeec: f8a3 2060 strh.w r2, [r3, #96] ; 0x60 /* keep track of the biggest window announced by the remote host to calculate the maximum segment size */ if (pcb->snd_wnd_max < pcb->snd_wnd) { - 803ae6c: 687b ldr r3, [r7, #4] - 803ae6e: f8b3 2062 ldrh.w r2, [r3, #98] ; 0x62 - 803ae72: 687b ldr r3, [r7, #4] - 803ae74: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803ae78: 429a cmp r2, r3 - 803ae7a: d205 bcs.n 803ae88 + 803aef0: 687b ldr r3, [r7, #4] + 803aef2: f8b3 2062 ldrh.w r2, [r3, #98] ; 0x62 + 803aef6: 687b ldr r3, [r7, #4] + 803aef8: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803aefc: 429a cmp r2, r3 + 803aefe: d205 bcs.n 803af0c pcb->snd_wnd_max = pcb->snd_wnd; - 803ae7c: 687b ldr r3, [r7, #4] - 803ae7e: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 803ae82: 687b ldr r3, [r7, #4] - 803ae84: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 + 803af00: 687b ldr r3, [r7, #4] + 803af02: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 803af06: 687b ldr r3, [r7, #4] + 803af08: f8a3 2062 strh.w r2, [r3, #98] ; 0x62 } pcb->snd_wl1 = seqno; - 803ae88: 4b69 ldr r3, [pc, #420] ; (803b030 ) - 803ae8a: 681a ldr r2, [r3, #0] - 803ae8c: 687b ldr r3, [r7, #4] - 803ae8e: 655a str r2, [r3, #84] ; 0x54 + 803af0c: 4b69 ldr r3, [pc, #420] ; (803b0b4 ) + 803af0e: 681a ldr r2, [r3, #0] + 803af10: 687b ldr r3, [r7, #4] + 803af12: 655a str r2, [r3, #84] ; 0x54 pcb->snd_wl2 = ackno; - 803ae90: 4b68 ldr r3, [pc, #416] ; (803b034 ) - 803ae92: 681a ldr r2, [r3, #0] - 803ae94: 687b ldr r3, [r7, #4] - 803ae96: 659a str r2, [r3, #88] ; 0x58 + 803af14: 4b68 ldr r3, [pc, #416] ; (803b0b8 ) + 803af16: 681a ldr r2, [r3, #0] + 803af18: 687b ldr r3, [r7, #4] + 803af1a: 659a str r2, [r3, #88] ; 0x58 * If it only passes 1, should reset dupack counter * */ /* Clause 1 */ if (TCP_SEQ_LEQ(ackno, pcb->lastack)) { - 803ae98: 4b66 ldr r3, [pc, #408] ; (803b034 ) - 803ae9a: 681a ldr r2, [r3, #0] - 803ae9c: 687b ldr r3, [r7, #4] - 803ae9e: 6c5b ldr r3, [r3, #68] ; 0x44 - 803aea0: 1ad3 subs r3, r2, r3 - 803aea2: 2b00 cmp r3, #0 - 803aea4: dc58 bgt.n 803af58 + 803af1c: 4b66 ldr r3, [pc, #408] ; (803b0b8 ) + 803af1e: 681a ldr r2, [r3, #0] + 803af20: 687b ldr r3, [r7, #4] + 803af22: 6c5b ldr r3, [r3, #68] ; 0x44 + 803af24: 1ad3 subs r3, r2, r3 + 803af26: 2b00 cmp r3, #0 + 803af28: dc58 bgt.n 803afdc /* Clause 2 */ if (tcplen == 0) { - 803aea6: 4b65 ldr r3, [pc, #404] ; (803b03c ) - 803aea8: 881b ldrh r3, [r3, #0] - 803aeaa: 2b00 cmp r3, #0 - 803aeac: d14b bne.n 803af46 + 803af2a: 4b65 ldr r3, [pc, #404] ; (803b0c0 ) + 803af2c: 881b ldrh r3, [r3, #0] + 803af2e: 2b00 cmp r3, #0 + 803af30: d14b bne.n 803afca /* Clause 3 */ if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge) { - 803aeae: 687b ldr r3, [r7, #4] - 803aeb0: 6d9b ldr r3, [r3, #88] ; 0x58 - 803aeb2: 687a ldr r2, [r7, #4] - 803aeb4: f8b2 2060 ldrh.w r2, [r2, #96] ; 0x60 - 803aeb8: 4413 add r3, r2 - 803aeba: 6b3a ldr r2, [r7, #48] ; 0x30 - 803aebc: 429a cmp r2, r3 - 803aebe: d142 bne.n 803af46 + 803af32: 687b ldr r3, [r7, #4] + 803af34: 6d9b ldr r3, [r3, #88] ; 0x58 + 803af36: 687a ldr r2, [r7, #4] + 803af38: f8b2 2060 ldrh.w r2, [r2, #96] ; 0x60 + 803af3c: 4413 add r3, r2 + 803af3e: 6b3a ldr r2, [r7, #48] ; 0x30 + 803af40: 429a cmp r2, r3 + 803af42: d142 bne.n 803afca /* Clause 4 */ if (pcb->rtime >= 0) { - 803aec0: 687b ldr r3, [r7, #4] - 803aec2: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 803aec6: 2b00 cmp r3, #0 - 803aec8: db3d blt.n 803af46 + 803af44: 687b ldr r3, [r7, #4] + 803af46: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 803af4a: 2b00 cmp r3, #0 + 803af4c: db3d blt.n 803afca /* Clause 5 */ if (pcb->lastack == ackno) { - 803aeca: 687b ldr r3, [r7, #4] - 803aecc: 6c5a ldr r2, [r3, #68] ; 0x44 - 803aece: 4b59 ldr r3, [pc, #356] ; (803b034 ) - 803aed0: 681b ldr r3, [r3, #0] - 803aed2: 429a cmp r2, r3 - 803aed4: d137 bne.n 803af46 + 803af4e: 687b ldr r3, [r7, #4] + 803af50: 6c5a ldr r2, [r3, #68] ; 0x44 + 803af52: 4b59 ldr r3, [pc, #356] ; (803b0b8 ) + 803af54: 681b ldr r3, [r3, #0] + 803af56: 429a cmp r2, r3 + 803af58: d137 bne.n 803afca found_dupack = 1; - 803aed6: 2301 movs r3, #1 - 803aed8: 64bb str r3, [r7, #72] ; 0x48 + 803af5a: 2301 movs r3, #1 + 803af5c: 64bb str r3, [r7, #72] ; 0x48 if ((u8_t)(pcb->dupacks + 1) > pcb->dupacks) { - 803aeda: 687b ldr r3, [r7, #4] - 803aedc: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 - 803aee0: 2bff cmp r3, #255 ; 0xff - 803aee2: d007 beq.n 803aef4 + 803af5e: 687b ldr r3, [r7, #4] + 803af60: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 + 803af64: 2bff cmp r3, #255 ; 0xff + 803af66: d007 beq.n 803af78 ++pcb->dupacks; - 803aee4: 687b ldr r3, [r7, #4] - 803aee6: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 - 803aeea: 3301 adds r3, #1 - 803aeec: b2da uxtb r2, r3 - 803aeee: 687b ldr r3, [r7, #4] - 803aef0: f883 2043 strb.w r2, [r3, #67] ; 0x43 + 803af68: 687b ldr r3, [r7, #4] + 803af6a: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 + 803af6e: 3301 adds r3, #1 + 803af70: b2da uxtb r2, r3 + 803af72: 687b ldr r3, [r7, #4] + 803af74: f883 2043 strb.w r2, [r3, #67] ; 0x43 } if (pcb->dupacks > 3) { - 803aef4: 687b ldr r3, [r7, #4] - 803aef6: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 - 803aefa: 2b03 cmp r3, #3 - 803aefc: d91b bls.n 803af36 + 803af78: 687b ldr r3, [r7, #4] + 803af7a: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 + 803af7e: 2b03 cmp r3, #3 + 803af80: d91b bls.n 803afba /* Inflate the congestion window */ TCP_WND_INC(pcb->cwnd, pcb->mss); - 803aefe: 687b ldr r3, [r7, #4] - 803af00: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803af04: 687b ldr r3, [r7, #4] - 803af06: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803af08: 4413 add r3, r2 - 803af0a: b29a uxth r2, r3 - 803af0c: 687b ldr r3, [r7, #4] - 803af0e: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803af12: 429a cmp r2, r3 - 803af14: d30a bcc.n 803af2c - 803af16: 687b ldr r3, [r7, #4] - 803af18: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803af1c: 687b ldr r3, [r7, #4] - 803af1e: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803af20: 4413 add r3, r2 - 803af22: b29a uxth r2, r3 - 803af24: 687b ldr r3, [r7, #4] - 803af26: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 - 803af2a: e004 b.n 803af36 - 803af2c: 687b ldr r3, [r7, #4] - 803af2e: f64f 72ff movw r2, #65535 ; 0xffff - 803af32: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803af82: 687b ldr r3, [r7, #4] + 803af84: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803af88: 687b ldr r3, [r7, #4] + 803af8a: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803af8c: 4413 add r3, r2 + 803af8e: b29a uxth r2, r3 + 803af90: 687b ldr r3, [r7, #4] + 803af92: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803af96: 429a cmp r2, r3 + 803af98: d30a bcc.n 803afb0 + 803af9a: 687b ldr r3, [r7, #4] + 803af9c: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803afa0: 687b ldr r3, [r7, #4] + 803afa2: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803afa4: 4413 add r3, r2 + 803afa6: b29a uxth r2, r3 + 803afa8: 687b ldr r3, [r7, #4] + 803afaa: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803afae: e004 b.n 803afba + 803afb0: 687b ldr r3, [r7, #4] + 803afb2: f64f 72ff movw r2, #65535 ; 0xffff + 803afb6: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 } if (pcb->dupacks >= 3) { - 803af36: 687b ldr r3, [r7, #4] - 803af38: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 - 803af3c: 2b02 cmp r3, #2 - 803af3e: d902 bls.n 803af46 + 803afba: 687b ldr r3, [r7, #4] + 803afbc: f893 3043 ldrb.w r3, [r3, #67] ; 0x43 + 803afc0: 2b02 cmp r3, #2 + 803afc2: d902 bls.n 803afca /* Do fast retransmit (checked via TF_INFR, not via dupacks count) */ tcp_rexmit_fast(pcb); - 803af40: 6878 ldr r0, [r7, #4] - 803af42: f002 fb43 bl 803d5cc + 803afc4: 6878 ldr r0, [r7, #4] + 803afc6: f002 fb43 bl 803d650 } } } /* If Clause (1) or more is true, but not a duplicate ack, reset * count of consecutive duplicate acks */ if (!found_dupack) { - 803af46: 6cbb ldr r3, [r7, #72] ; 0x48 - 803af48: 2b00 cmp r3, #0 - 803af4a: f040 8161 bne.w 803b210 + 803afca: 6cbb ldr r3, [r7, #72] ; 0x48 + 803afcc: 2b00 cmp r3, #0 + 803afce: f040 8161 bne.w 803b294 pcb->dupacks = 0; - 803af4e: 687b ldr r3, [r7, #4] - 803af50: 2200 movs r2, #0 - 803af52: f883 2043 strb.w r2, [r3, #67] ; 0x43 - 803af56: e15b b.n 803b210 + 803afd2: 687b ldr r3, [r7, #4] + 803afd4: 2200 movs r2, #0 + 803afd6: f883 2043 strb.w r2, [r3, #67] ; 0x43 + 803afda: e15b b.n 803b294 } } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803af58: 4b36 ldr r3, [pc, #216] ; (803b034 ) - 803af5a: 681a ldr r2, [r3, #0] - 803af5c: 687b ldr r3, [r7, #4] - 803af5e: 6c5b ldr r3, [r3, #68] ; 0x44 - 803af60: 1ad3 subs r3, r2, r3 - 803af62: 3b01 subs r3, #1 - 803af64: 2b00 cmp r3, #0 - 803af66: f2c0 814e blt.w 803b206 - 803af6a: 4b32 ldr r3, [pc, #200] ; (803b034 ) - 803af6c: 681a ldr r2, [r3, #0] - 803af6e: 687b ldr r3, [r7, #4] - 803af70: 6d1b ldr r3, [r3, #80] ; 0x50 - 803af72: 1ad3 subs r3, r2, r3 - 803af74: 2b00 cmp r3, #0 - 803af76: f300 8146 bgt.w 803b206 + 803afdc: 4b36 ldr r3, [pc, #216] ; (803b0b8 ) + 803afde: 681a ldr r2, [r3, #0] + 803afe0: 687b ldr r3, [r7, #4] + 803afe2: 6c5b ldr r3, [r3, #68] ; 0x44 + 803afe4: 1ad3 subs r3, r2, r3 + 803afe6: 3b01 subs r3, #1 + 803afe8: 2b00 cmp r3, #0 + 803afea: f2c0 814e blt.w 803b28a + 803afee: 4b32 ldr r3, [pc, #200] ; (803b0b8 ) + 803aff0: 681a ldr r2, [r3, #0] + 803aff2: 687b ldr r3, [r7, #4] + 803aff4: 6d1b ldr r3, [r3, #80] ; 0x50 + 803aff6: 1ad3 subs r3, r2, r3 + 803aff8: 2b00 cmp r3, #0 + 803affa: f300 8146 bgt.w 803b28a tcpwnd_size_t acked; /* Reset the "IN Fast Retransmit" flag, since we are no longer in fast retransmit. Also reset the congestion window to the slow start threshold. */ if (pcb->flags & TF_INFR) { - 803af7a: 687b ldr r3, [r7, #4] - 803af7c: 8b5b ldrh r3, [r3, #26] - 803af7e: f003 0304 and.w r3, r3, #4 - 803af82: 2b00 cmp r3, #0 - 803af84: d010 beq.n 803afa8 + 803affe: 687b ldr r3, [r7, #4] + 803b000: 8b5b ldrh r3, [r3, #26] + 803b002: f003 0304 and.w r3, r3, #4 + 803b006: 2b00 cmp r3, #0 + 803b008: d010 beq.n 803b02c tcp_clear_flags(pcb, TF_INFR); - 803af86: 687b ldr r3, [r7, #4] - 803af88: 8b5b ldrh r3, [r3, #26] - 803af8a: f023 0304 bic.w r3, r3, #4 - 803af8e: b29a uxth r2, r3 - 803af90: 687b ldr r3, [r7, #4] - 803af92: 835a strh r2, [r3, #26] + 803b00a: 687b ldr r3, [r7, #4] + 803b00c: 8b5b ldrh r3, [r3, #26] + 803b00e: f023 0304 bic.w r3, r3, #4 + 803b012: b29a uxth r2, r3 + 803b014: 687b ldr r3, [r7, #4] + 803b016: 835a strh r2, [r3, #26] pcb->cwnd = pcb->ssthresh; - 803af94: 687b ldr r3, [r7, #4] - 803af96: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a - 803af9a: 687b ldr r3, [r7, #4] - 803af9c: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803b018: 687b ldr r3, [r7, #4] + 803b01a: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a + 803b01e: 687b ldr r3, [r7, #4] + 803b020: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 pcb->bytes_acked = 0; - 803afa0: 687b ldr r3, [r7, #4] - 803afa2: 2200 movs r2, #0 - 803afa4: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803b024: 687b ldr r3, [r7, #4] + 803b026: 2200 movs r2, #0 + 803b028: f8a3 206a strh.w r2, [r3, #106] ; 0x6a } /* Reset the number of retransmissions. */ pcb->nrtx = 0; - 803afa8: 687b ldr r3, [r7, #4] - 803afaa: 2200 movs r2, #0 - 803afac: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 803b02c: 687b ldr r3, [r7, #4] + 803b02e: 2200 movs r2, #0 + 803b030: f883 2042 strb.w r2, [r3, #66] ; 0x42 /* Reset the retransmission time-out. */ pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv); - 803afb0: 687b ldr r3, [r7, #4] - 803afb2: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 803afb6: 10db asrs r3, r3, #3 - 803afb8: b21b sxth r3, r3 - 803afba: b29a uxth r2, r3 - 803afbc: 687b ldr r3, [r7, #4] - 803afbe: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 803afc2: b29b uxth r3, r3 - 803afc4: 4413 add r3, r2 - 803afc6: b29b uxth r3, r3 - 803afc8: b21a sxth r2, r3 - 803afca: 687b ldr r3, [r7, #4] - 803afcc: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 + 803b034: 687b ldr r3, [r7, #4] + 803b036: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 803b03a: 10db asrs r3, r3, #3 + 803b03c: b21b sxth r3, r3 + 803b03e: b29a uxth r2, r3 + 803b040: 687b ldr r3, [r7, #4] + 803b042: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 803b046: b29b uxth r3, r3 + 803b048: 4413 add r3, r2 + 803b04a: b29b uxth r3, r3 + 803b04c: b21a sxth r2, r3 + 803b04e: 687b ldr r3, [r7, #4] + 803b050: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 /* Record how much data this ACK acks */ acked = (tcpwnd_size_t)(ackno - pcb->lastack); - 803afd0: 4b18 ldr r3, [pc, #96] ; (803b034 ) - 803afd2: 681b ldr r3, [r3, #0] - 803afd4: b29a uxth r2, r3 - 803afd6: 687b ldr r3, [r7, #4] - 803afd8: 6c5b ldr r3, [r3, #68] ; 0x44 - 803afda: b29b uxth r3, r3 - 803afdc: 1ad3 subs r3, r2, r3 - 803afde: 85fb strh r3, [r7, #46] ; 0x2e + 803b054: 4b18 ldr r3, [pc, #96] ; (803b0b8 ) + 803b056: 681b ldr r3, [r3, #0] + 803b058: b29a uxth r2, r3 + 803b05a: 687b ldr r3, [r7, #4] + 803b05c: 6c5b ldr r3, [r3, #68] ; 0x44 + 803b05e: b29b uxth r3, r3 + 803b060: 1ad3 subs r3, r2, r3 + 803b062: 85fb strh r3, [r7, #46] ; 0x2e /* Reset the fast retransmit variables. */ pcb->dupacks = 0; - 803afe0: 687b ldr r3, [r7, #4] - 803afe2: 2200 movs r2, #0 - 803afe4: f883 2043 strb.w r2, [r3, #67] ; 0x43 + 803b064: 687b ldr r3, [r7, #4] + 803b066: 2200 movs r2, #0 + 803b068: f883 2043 strb.w r2, [r3, #67] ; 0x43 pcb->lastack = ackno; - 803afe8: 4b12 ldr r3, [pc, #72] ; (803b034 ) - 803afea: 681a ldr r2, [r3, #0] - 803afec: 687b ldr r3, [r7, #4] - 803afee: 645a str r2, [r3, #68] ; 0x44 + 803b06c: 4b12 ldr r3, [pc, #72] ; (803b0b8 ) + 803b06e: 681a ldr r2, [r3, #0] + 803b070: 687b ldr r3, [r7, #4] + 803b072: 645a str r2, [r3, #68] ; 0x44 /* Update the congestion control variables (cwnd and ssthresh). */ if (pcb->state >= ESTABLISHED) { - 803aff0: 687b ldr r3, [r7, #4] - 803aff2: 7d1b ldrb r3, [r3, #20] - 803aff4: 2b03 cmp r3, #3 - 803aff6: f240 8097 bls.w 803b128 + 803b074: 687b ldr r3, [r7, #4] + 803b076: 7d1b ldrb r3, [r3, #20] + 803b078: 2b03 cmp r3, #3 + 803b07a: f240 8097 bls.w 803b1ac if (pcb->cwnd < pcb->ssthresh) { - 803affa: 687b ldr r3, [r7, #4] - 803affc: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803b000: 687b ldr r3, [r7, #4] - 803b002: f8b3 304a ldrh.w r3, [r3, #74] ; 0x4a - 803b006: 429a cmp r2, r3 - 803b008: d245 bcs.n 803b096 + 803b07e: 687b ldr r3, [r7, #4] + 803b080: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b084: 687b ldr r3, [r7, #4] + 803b086: f8b3 304a ldrh.w r3, [r3, #74] ; 0x4a + 803b08a: 429a cmp r2, r3 + 803b08c: d245 bcs.n 803b11a tcpwnd_size_t increase; /* limit to 1 SMSS segment during period following RTO */ u8_t num_seg = (pcb->flags & TF_RTO) ? 1 : 2; - 803b00a: 687b ldr r3, [r7, #4] - 803b00c: 8b5b ldrh r3, [r3, #26] - 803b00e: f403 6300 and.w r3, r3, #2048 ; 0x800 - 803b012: 2b00 cmp r3, #0 - 803b014: d014 beq.n 803b040 - 803b016: 2301 movs r3, #1 - 803b018: e013 b.n 803b042 - 803b01a: bf00 nop - 803b01c: 08043500 .word 0x08043500 - 803b020: 08043830 .word 0x08043830 - 803b024: 0804354c .word 0x0804354c - 803b028: 0804384c .word 0x0804384c - 803b02c: 2400e99c .word 0x2400e99c - 803b030: 2400e990 .word 0x2400e990 - 803b034: 2400e994 .word 0x2400e994 - 803b038: 2400e980 .word 0x2400e980 - 803b03c: 2400e99a .word 0x2400e99a - 803b040: 2302 movs r3, #2 - 803b042: f887 302d strb.w r3, [r7, #45] ; 0x2d + 803b08e: 687b ldr r3, [r7, #4] + 803b090: 8b5b ldrh r3, [r3, #26] + 803b092: f403 6300 and.w r3, r3, #2048 ; 0x800 + 803b096: 2b00 cmp r3, #0 + 803b098: d014 beq.n 803b0c4 + 803b09a: 2301 movs r3, #1 + 803b09c: e013 b.n 803b0c6 + 803b09e: bf00 nop + 803b0a0: 08043580 .word 0x08043580 + 803b0a4: 080438b0 .word 0x080438b0 + 803b0a8: 080435cc .word 0x080435cc + 803b0ac: 080438cc .word 0x080438cc + 803b0b0: 2400e9a4 .word 0x2400e9a4 + 803b0b4: 2400e998 .word 0x2400e998 + 803b0b8: 2400e99c .word 0x2400e99c + 803b0bc: 2400e988 .word 0x2400e988 + 803b0c0: 2400e9a2 .word 0x2400e9a2 + 803b0c4: 2302 movs r3, #2 + 803b0c6: f887 302d strb.w r3, [r7, #45] ; 0x2d /* RFC 3465, section 2.2 Slow Start */ increase = LWIP_MIN(acked, (tcpwnd_size_t)(num_seg * pcb->mss)); - 803b046: f897 302d ldrb.w r3, [r7, #45] ; 0x2d - 803b04a: b29a uxth r2, r3 - 803b04c: 687b ldr r3, [r7, #4] - 803b04e: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803b050: fb12 f303 smulbb r3, r2, r3 - 803b054: b29b uxth r3, r3 - 803b056: 8dfa ldrh r2, [r7, #46] ; 0x2e - 803b058: 4293 cmp r3, r2 - 803b05a: bf28 it cs - 803b05c: 4613 movcs r3, r2 - 803b05e: 857b strh r3, [r7, #42] ; 0x2a + 803b0ca: f897 302d ldrb.w r3, [r7, #45] ; 0x2d + 803b0ce: b29a uxth r2, r3 + 803b0d0: 687b ldr r3, [r7, #4] + 803b0d2: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803b0d4: fb12 f303 smulbb r3, r2, r3 + 803b0d8: b29b uxth r3, r3 + 803b0da: 8dfa ldrh r2, [r7, #46] ; 0x2e + 803b0dc: 4293 cmp r3, r2 + 803b0de: bf28 it cs + 803b0e0: 4613 movcs r3, r2 + 803b0e2: 857b strh r3, [r7, #42] ; 0x2a TCP_WND_INC(pcb->cwnd, increase); - 803b060: 687b ldr r3, [r7, #4] - 803b062: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803b066: 8d7b ldrh r3, [r7, #42] ; 0x2a - 803b068: 4413 add r3, r2 - 803b06a: b29a uxth r2, r3 - 803b06c: 687b ldr r3, [r7, #4] - 803b06e: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803b072: 429a cmp r2, r3 - 803b074: d309 bcc.n 803b08a - 803b076: 687b ldr r3, [r7, #4] - 803b078: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803b07c: 8d7b ldrh r3, [r7, #42] ; 0x2a - 803b07e: 4413 add r3, r2 - 803b080: b29a uxth r2, r3 - 803b082: 687b ldr r3, [r7, #4] - 803b084: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 - 803b088: e04e b.n 803b128 - 803b08a: 687b ldr r3, [r7, #4] - 803b08c: f64f 72ff movw r2, #65535 ; 0xffff - 803b090: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 - 803b094: e048 b.n 803b128 + 803b0e4: 687b ldr r3, [r7, #4] + 803b0e6: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b0ea: 8d7b ldrh r3, [r7, #42] ; 0x2a + 803b0ec: 4413 add r3, r2 + 803b0ee: b29a uxth r2, r3 + 803b0f0: 687b ldr r3, [r7, #4] + 803b0f2: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803b0f6: 429a cmp r2, r3 + 803b0f8: d309 bcc.n 803b10e + 803b0fa: 687b ldr r3, [r7, #4] + 803b0fc: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b100: 8d7b ldrh r3, [r7, #42] ; 0x2a + 803b102: 4413 add r3, r2 + 803b104: b29a uxth r2, r3 + 803b106: 687b ldr r3, [r7, #4] + 803b108: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803b10c: e04e b.n 803b1ac + 803b10e: 687b ldr r3, [r7, #4] + 803b110: f64f 72ff movw r2, #65535 ; 0xffff + 803b114: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803b118: e048 b.n 803b1ac LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"TCPWNDSIZE_F"\n", pcb->cwnd)); } else { /* RFC 3465, section 2.1 Congestion Avoidance */ TCP_WND_INC(pcb->bytes_acked, acked); - 803b096: 687b ldr r3, [r7, #4] - 803b098: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a - 803b09c: 8dfb ldrh r3, [r7, #46] ; 0x2e - 803b09e: 4413 add r3, r2 - 803b0a0: b29a uxth r2, r3 - 803b0a2: 687b ldr r3, [r7, #4] - 803b0a4: f8b3 306a ldrh.w r3, [r3, #106] ; 0x6a - 803b0a8: 429a cmp r2, r3 - 803b0aa: d309 bcc.n 803b0c0 - 803b0ac: 687b ldr r3, [r7, #4] - 803b0ae: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a - 803b0b2: 8dfb ldrh r3, [r7, #46] ; 0x2e - 803b0b4: 4413 add r3, r2 - 803b0b6: b29a uxth r2, r3 - 803b0b8: 687b ldr r3, [r7, #4] - 803b0ba: f8a3 206a strh.w r2, [r3, #106] ; 0x6a - 803b0be: e004 b.n 803b0ca - 803b0c0: 687b ldr r3, [r7, #4] - 803b0c2: f64f 72ff movw r2, #65535 ; 0xffff - 803b0c6: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803b11a: 687b ldr r3, [r7, #4] + 803b11c: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a + 803b120: 8dfb ldrh r3, [r7, #46] ; 0x2e + 803b122: 4413 add r3, r2 + 803b124: b29a uxth r2, r3 + 803b126: 687b ldr r3, [r7, #4] + 803b128: f8b3 306a ldrh.w r3, [r3, #106] ; 0x6a + 803b12c: 429a cmp r2, r3 + 803b12e: d309 bcc.n 803b144 + 803b130: 687b ldr r3, [r7, #4] + 803b132: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a + 803b136: 8dfb ldrh r3, [r7, #46] ; 0x2e + 803b138: 4413 add r3, r2 + 803b13a: b29a uxth r2, r3 + 803b13c: 687b ldr r3, [r7, #4] + 803b13e: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803b142: e004 b.n 803b14e + 803b144: 687b ldr r3, [r7, #4] + 803b146: f64f 72ff movw r2, #65535 ; 0xffff + 803b14a: f8a3 206a strh.w r2, [r3, #106] ; 0x6a if (pcb->bytes_acked >= pcb->cwnd) { - 803b0ca: 687b ldr r3, [r7, #4] - 803b0cc: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a - 803b0d0: 687b ldr r3, [r7, #4] - 803b0d2: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803b0d6: 429a cmp r2, r3 - 803b0d8: d326 bcc.n 803b128 + 803b14e: 687b ldr r3, [r7, #4] + 803b150: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a + 803b154: 687b ldr r3, [r7, #4] + 803b156: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803b15a: 429a cmp r2, r3 + 803b15c: d326 bcc.n 803b1ac pcb->bytes_acked = (tcpwnd_size_t)(pcb->bytes_acked - pcb->cwnd); - 803b0da: 687b ldr r3, [r7, #4] - 803b0dc: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a - 803b0e0: 687b ldr r3, [r7, #4] - 803b0e2: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803b0e6: 1ad3 subs r3, r2, r3 - 803b0e8: b29a uxth r2, r3 - 803b0ea: 687b ldr r3, [r7, #4] - 803b0ec: f8a3 206a strh.w r2, [r3, #106] ; 0x6a + 803b15e: 687b ldr r3, [r7, #4] + 803b160: f8b3 206a ldrh.w r2, [r3, #106] ; 0x6a + 803b164: 687b ldr r3, [r7, #4] + 803b166: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803b16a: 1ad3 subs r3, r2, r3 + 803b16c: b29a uxth r2, r3 + 803b16e: 687b ldr r3, [r7, #4] + 803b170: f8a3 206a strh.w r2, [r3, #106] ; 0x6a TCP_WND_INC(pcb->cwnd, pcb->mss); - 803b0f0: 687b ldr r3, [r7, #4] - 803b0f2: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803b0f6: 687b ldr r3, [r7, #4] - 803b0f8: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803b0fa: 4413 add r3, r2 - 803b0fc: b29a uxth r2, r3 - 803b0fe: 687b ldr r3, [r7, #4] - 803b100: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803b104: 429a cmp r2, r3 - 803b106: d30a bcc.n 803b11e - 803b108: 687b ldr r3, [r7, #4] - 803b10a: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803b10e: 687b ldr r3, [r7, #4] - 803b110: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803b112: 4413 add r3, r2 - 803b114: b29a uxth r2, r3 - 803b116: 687b ldr r3, [r7, #4] - 803b118: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 - 803b11c: e004 b.n 803b128 - 803b11e: 687b ldr r3, [r7, #4] - 803b120: f64f 72ff movw r2, #65535 ; 0xffff - 803b124: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803b174: 687b ldr r3, [r7, #4] + 803b176: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b17a: 687b ldr r3, [r7, #4] + 803b17c: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803b17e: 4413 add r3, r2 + 803b180: b29a uxth r2, r3 + 803b182: 687b ldr r3, [r7, #4] + 803b184: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803b188: 429a cmp r2, r3 + 803b18a: d30a bcc.n 803b1a2 + 803b18c: 687b ldr r3, [r7, #4] + 803b18e: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803b192: 687b ldr r3, [r7, #4] + 803b194: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803b196: 4413 add r3, r2 + 803b198: b29a uxth r2, r3 + 803b19a: 687b ldr r3, [r7, #4] + 803b19c: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803b1a0: e004 b.n 803b1ac + 803b1a2: 687b ldr r3, [r7, #4] + 803b1a4: f64f 72ff movw r2, #65535 ; 0xffff + 803b1a8: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 pcb->unacked != NULL ? lwip_ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked) : 0)); /* Remove segment from the unacknowledged list if the incoming ACK acknowledges them. */ pcb->unacked = tcp_free_acked_segments(pcb, pcb->unacked, "unacked", pcb->unsent); - 803b128: 687b ldr r3, [r7, #4] - 803b12a: 6f19 ldr r1, [r3, #112] ; 0x70 - 803b12c: 687b ldr r3, [r7, #4] - 803b12e: 6edb ldr r3, [r3, #108] ; 0x6c - 803b130: 4a98 ldr r2, [pc, #608] ; (803b394 ) - 803b132: 6878 ldr r0, [r7, #4] - 803b134: f7ff fdca bl 803accc - 803b138: 4602 mov r2, r0 - 803b13a: 687b ldr r3, [r7, #4] - 803b13c: 671a str r2, [r3, #112] ; 0x70 + 803b1ac: 687b ldr r3, [r7, #4] + 803b1ae: 6f19 ldr r1, [r3, #112] ; 0x70 + 803b1b0: 687b ldr r3, [r7, #4] + 803b1b2: 6edb ldr r3, [r3, #108] ; 0x6c + 803b1b4: 4a98 ldr r2, [pc, #608] ; (803b418 ) + 803b1b6: 6878 ldr r0, [r7, #4] + 803b1b8: f7ff fdca bl 803ad50 + 803b1bc: 4602 mov r2, r0 + 803b1be: 687b ldr r3, [r7, #4] + 803b1c0: 671a str r2, [r3, #112] ; 0x70 on the list are acknowledged by the ACK. This may seem strange since an "unsent" segment shouldn't be acked. The rationale is that lwIP puts all outstanding segments on the ->unsent list after a retransmission, so these segments may in fact have been sent once. */ pcb->unsent = tcp_free_acked_segments(pcb, pcb->unsent, "unsent", pcb->unacked); - 803b13e: 687b ldr r3, [r7, #4] - 803b140: 6ed9 ldr r1, [r3, #108] ; 0x6c - 803b142: 687b ldr r3, [r7, #4] - 803b144: 6f1b ldr r3, [r3, #112] ; 0x70 - 803b146: 4a94 ldr r2, [pc, #592] ; (803b398 ) - 803b148: 6878 ldr r0, [r7, #4] - 803b14a: f7ff fdbf bl 803accc - 803b14e: 4602 mov r2, r0 - 803b150: 687b ldr r3, [r7, #4] - 803b152: 66da str r2, [r3, #108] ; 0x6c + 803b1c2: 687b ldr r3, [r7, #4] + 803b1c4: 6ed9 ldr r1, [r3, #108] ; 0x6c + 803b1c6: 687b ldr r3, [r7, #4] + 803b1c8: 6f1b ldr r3, [r3, #112] ; 0x70 + 803b1ca: 4a94 ldr r2, [pc, #592] ; (803b41c ) + 803b1cc: 6878 ldr r0, [r7, #4] + 803b1ce: f7ff fdbf bl 803ad50 + 803b1d2: 4602 mov r2, r0 + 803b1d4: 687b ldr r3, [r7, #4] + 803b1d6: 66da str r2, [r3, #108] ; 0x6c /* If there's nothing left to acknowledge, stop the retransmit timer, otherwise reset it to start again */ if (pcb->unacked == NULL) { - 803b154: 687b ldr r3, [r7, #4] - 803b156: 6f1b ldr r3, [r3, #112] ; 0x70 - 803b158: 2b00 cmp r3, #0 - 803b15a: d104 bne.n 803b166 + 803b1d8: 687b ldr r3, [r7, #4] + 803b1da: 6f1b ldr r3, [r3, #112] ; 0x70 + 803b1dc: 2b00 cmp r3, #0 + 803b1de: d104 bne.n 803b1ea pcb->rtime = -1; - 803b15c: 687b ldr r3, [r7, #4] - 803b15e: f64f 72ff movw r2, #65535 ; 0xffff - 803b162: 861a strh r2, [r3, #48] ; 0x30 - 803b164: e002 b.n 803b16c + 803b1e0: 687b ldr r3, [r7, #4] + 803b1e2: f64f 72ff movw r2, #65535 ; 0xffff + 803b1e6: 861a strh r2, [r3, #48] ; 0x30 + 803b1e8: e002 b.n 803b1f0 } else { pcb->rtime = 0; - 803b166: 687b ldr r3, [r7, #4] - 803b168: 2200 movs r2, #0 - 803b16a: 861a strh r2, [r3, #48] ; 0x30 + 803b1ea: 687b ldr r3, [r7, #4] + 803b1ec: 2200 movs r2, #0 + 803b1ee: 861a strh r2, [r3, #48] ; 0x30 } pcb->polltmr = 0; - 803b16c: 687b ldr r3, [r7, #4] - 803b16e: 2200 movs r2, #0 - 803b170: 771a strb r2, [r3, #28] + 803b1f0: 687b ldr r3, [r7, #4] + 803b1f2: 2200 movs r2, #0 + 803b1f4: 771a strb r2, [r3, #28] #if TCP_OVERSIZE if (pcb->unsent == NULL) { - 803b172: 687b ldr r3, [r7, #4] - 803b174: 6edb ldr r3, [r3, #108] ; 0x6c - 803b176: 2b00 cmp r3, #0 - 803b178: d103 bne.n 803b182 + 803b1f6: 687b ldr r3, [r7, #4] + 803b1f8: 6edb ldr r3, [r3, #108] ; 0x6c + 803b1fa: 2b00 cmp r3, #0 + 803b1fc: d103 bne.n 803b206 pcb->unsent_oversize = 0; - 803b17a: 687b ldr r3, [r7, #4] - 803b17c: 2200 movs r2, #0 - 803b17e: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803b1fe: 687b ldr r3, [r7, #4] + 803b200: 2200 movs r2, #0 + 803b202: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 /* Inform neighbor reachability of forward progress. */ nd6_reachability_hint(ip6_current_src_addr()); } #endif /* LWIP_IPV6 && LWIP_ND6_TCP_REACHABILITY_HINTS*/ pcb->snd_buf = (tcpwnd_size_t)(pcb->snd_buf + recv_acked); - 803b182: 687b ldr r3, [r7, #4] - 803b184: f8b3 2064 ldrh.w r2, [r3, #100] ; 0x64 - 803b188: 4b84 ldr r3, [pc, #528] ; (803b39c ) - 803b18a: 881b ldrh r3, [r3, #0] - 803b18c: 4413 add r3, r2 - 803b18e: b29a uxth r2, r3 - 803b190: 687b ldr r3, [r7, #4] - 803b192: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 + 803b206: 687b ldr r3, [r7, #4] + 803b208: f8b3 2064 ldrh.w r2, [r3, #100] ; 0x64 + 803b20c: 4b84 ldr r3, [pc, #528] ; (803b420 ) + 803b20e: 881b ldrh r3, [r3, #0] + 803b210: 4413 add r3, r2 + 803b212: b29a uxth r2, r3 + 803b214: 687b ldr r3, [r7, #4] + 803b216: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 /* check if this ACK ends our retransmission of in-flight data */ if (pcb->flags & TF_RTO) { - 803b196: 687b ldr r3, [r7, #4] - 803b198: 8b5b ldrh r3, [r3, #26] - 803b19a: f403 6300 and.w r3, r3, #2048 ; 0x800 - 803b19e: 2b00 cmp r3, #0 - 803b1a0: d035 beq.n 803b20e + 803b21a: 687b ldr r3, [r7, #4] + 803b21c: 8b5b ldrh r3, [r3, #26] + 803b21e: f403 6300 and.w r3, r3, #2048 ; 0x800 + 803b222: 2b00 cmp r3, #0 + 803b224: d035 beq.n 803b292 /* RTO is done if 1) both queues are empty or 2) unacked is empty and unsent head contains data not part of RTO or 3) unacked head contains data not part of RTO */ if (pcb->unacked == NULL) { - 803b1a2: 687b ldr r3, [r7, #4] - 803b1a4: 6f1b ldr r3, [r3, #112] ; 0x70 - 803b1a6: 2b00 cmp r3, #0 - 803b1a8: d118 bne.n 803b1dc + 803b226: 687b ldr r3, [r7, #4] + 803b228: 6f1b ldr r3, [r3, #112] ; 0x70 + 803b22a: 2b00 cmp r3, #0 + 803b22c: d118 bne.n 803b260 if ((pcb->unsent == NULL) || - 803b1aa: 687b ldr r3, [r7, #4] - 803b1ac: 6edb ldr r3, [r3, #108] ; 0x6c - 803b1ae: 2b00 cmp r3, #0 - 803b1b0: d00c beq.n 803b1cc + 803b22e: 687b ldr r3, [r7, #4] + 803b230: 6edb ldr r3, [r3, #108] ; 0x6c + 803b232: 2b00 cmp r3, #0 + 803b234: d00c beq.n 803b250 (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unsent->tcphdr->seqno)))) { - 803b1b2: 687b ldr r3, [r7, #4] - 803b1b4: 6cdc ldr r4, [r3, #76] ; 0x4c - 803b1b6: 687b ldr r3, [r7, #4] - 803b1b8: 6edb ldr r3, [r3, #108] ; 0x6c - 803b1ba: 68db ldr r3, [r3, #12] - 803b1bc: 685b ldr r3, [r3, #4] - 803b1be: 4618 mov r0, r3 - 803b1c0: f7fa fe9f bl 8035f02 - 803b1c4: 4603 mov r3, r0 - 803b1c6: 1ae3 subs r3, r4, r3 + 803b236: 687b ldr r3, [r7, #4] + 803b238: 6cdc ldr r4, [r3, #76] ; 0x4c + 803b23a: 687b ldr r3, [r7, #4] + 803b23c: 6edb ldr r3, [r3, #108] ; 0x6c + 803b23e: 68db ldr r3, [r3, #12] + 803b240: 685b ldr r3, [r3, #4] + 803b242: 4618 mov r0, r3 + 803b244: f7fa fe9f bl 8035f86 + 803b248: 4603 mov r3, r0 + 803b24a: 1ae3 subs r3, r4, r3 if ((pcb->unsent == NULL) || - 803b1c8: 2b00 cmp r3, #0 - 803b1ca: dc20 bgt.n 803b20e + 803b24c: 2b00 cmp r3, #0 + 803b24e: dc20 bgt.n 803b292 tcp_clear_flags(pcb, TF_RTO); - 803b1cc: 687b ldr r3, [r7, #4] - 803b1ce: 8b5b ldrh r3, [r3, #26] - 803b1d0: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 803b1d4: b29a uxth r2, r3 - 803b1d6: 687b ldr r3, [r7, #4] - 803b1d8: 835a strh r2, [r3, #26] + 803b250: 687b ldr r3, [r7, #4] + 803b252: 8b5b ldrh r3, [r3, #26] + 803b254: f423 6300 bic.w r3, r3, #2048 ; 0x800 + 803b258: b29a uxth r2, r3 + 803b25a: 687b ldr r3, [r7, #4] + 803b25c: 835a strh r2, [r3, #26] } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803b1da: e018 b.n 803b20e + 803b25e: e018 b.n 803b292 } } else if (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unacked->tcphdr->seqno))) { - 803b1dc: 687b ldr r3, [r7, #4] - 803b1de: 6cdc ldr r4, [r3, #76] ; 0x4c - 803b1e0: 687b ldr r3, [r7, #4] - 803b1e2: 6f1b ldr r3, [r3, #112] ; 0x70 - 803b1e4: 68db ldr r3, [r3, #12] - 803b1e6: 685b ldr r3, [r3, #4] - 803b1e8: 4618 mov r0, r3 - 803b1ea: f7fa fe8a bl 8035f02 - 803b1ee: 4603 mov r3, r0 - 803b1f0: 1ae3 subs r3, r4, r3 - 803b1f2: 2b00 cmp r3, #0 - 803b1f4: dc0b bgt.n 803b20e + 803b260: 687b ldr r3, [r7, #4] + 803b262: 6cdc ldr r4, [r3, #76] ; 0x4c + 803b264: 687b ldr r3, [r7, #4] + 803b266: 6f1b ldr r3, [r3, #112] ; 0x70 + 803b268: 68db ldr r3, [r3, #12] + 803b26a: 685b ldr r3, [r3, #4] + 803b26c: 4618 mov r0, r3 + 803b26e: f7fa fe8a bl 8035f86 + 803b272: 4603 mov r3, r0 + 803b274: 1ae3 subs r3, r4, r3 + 803b276: 2b00 cmp r3, #0 + 803b278: dc0b bgt.n 803b292 tcp_clear_flags(pcb, TF_RTO); - 803b1f6: 687b ldr r3, [r7, #4] - 803b1f8: 8b5b ldrh r3, [r3, #26] - 803b1fa: f423 6300 bic.w r3, r3, #2048 ; 0x800 - 803b1fe: b29a uxth r2, r3 - 803b200: 687b ldr r3, [r7, #4] - 803b202: 835a strh r2, [r3, #26] + 803b27a: 687b ldr r3, [r7, #4] + 803b27c: 8b5b ldrh r3, [r3, #26] + 803b27e: f423 6300 bic.w r3, r3, #2048 ; 0x800 + 803b282: b29a uxth r2, r3 + 803b284: 687b ldr r3, [r7, #4] + 803b286: 835a strh r2, [r3, #26] } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803b204: e003 b.n 803b20e + 803b288: e003 b.n 803b292 } } /* End of ACK for new data processing. */ } else { /* Out of sequence ACK, didn't really ack anything */ tcp_send_empty_ack(pcb); - 803b206: 6878 ldr r0, [r7, #4] - 803b208: f002 fbce bl 803d9a8 - 803b20c: e000 b.n 803b210 + 803b28a: 6878 ldr r0, [r7, #4] + 803b28c: f002 fbce bl 803da2c + 803b290: e000 b.n 803b294 } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) { - 803b20e: bf00 nop + 803b292: bf00 nop pcb->rttest, pcb->rtseq, ackno)); /* RTT estimation calculations. This is done by checking if the incoming segment acknowledges the segment we use to take a round-trip time measurement. */ if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) { - 803b210: 687b ldr r3, [r7, #4] - 803b212: 6b5b ldr r3, [r3, #52] ; 0x34 - 803b214: 2b00 cmp r3, #0 - 803b216: d05b beq.n 803b2d0 - 803b218: 687b ldr r3, [r7, #4] - 803b21a: 6b9a ldr r2, [r3, #56] ; 0x38 - 803b21c: 4b60 ldr r3, [pc, #384] ; (803b3a0 ) - 803b21e: 681b ldr r3, [r3, #0] - 803b220: 1ad3 subs r3, r2, r3 - 803b222: 2b00 cmp r3, #0 - 803b224: da54 bge.n 803b2d0 + 803b294: 687b ldr r3, [r7, #4] + 803b296: 6b5b ldr r3, [r3, #52] ; 0x34 + 803b298: 2b00 cmp r3, #0 + 803b29a: d05b beq.n 803b354 + 803b29c: 687b ldr r3, [r7, #4] + 803b29e: 6b9a ldr r2, [r3, #56] ; 0x38 + 803b2a0: 4b60 ldr r3, [pc, #384] ; (803b424 ) + 803b2a2: 681b ldr r3, [r3, #0] + 803b2a4: 1ad3 subs r3, r2, r3 + 803b2a6: 2b00 cmp r3, #0 + 803b2a8: da54 bge.n 803b354 /* diff between this shouldn't exceed 32K since this are tcp timer ticks and a round-trip shouldn't be that long... */ m = (s16_t)(tcp_ticks - pcb->rttest); - 803b226: 4b5f ldr r3, [pc, #380] ; (803b3a4 ) - 803b228: 681b ldr r3, [r3, #0] - 803b22a: b29a uxth r2, r3 - 803b22c: 687b ldr r3, [r7, #4] - 803b22e: 6b5b ldr r3, [r3, #52] ; 0x34 - 803b230: b29b uxth r3, r3 - 803b232: 1ad3 subs r3, r2, r3 - 803b234: b29b uxth r3, r3 - 803b236: f8a7 304e strh.w r3, [r7, #78] ; 0x4e + 803b2aa: 4b5f ldr r3, [pc, #380] ; (803b428 ) + 803b2ac: 681b ldr r3, [r3, #0] + 803b2ae: b29a uxth r2, r3 + 803b2b0: 687b ldr r3, [r7, #4] + 803b2b2: 6b5b ldr r3, [r3, #52] ; 0x34 + 803b2b4: b29b uxth r3, r3 + 803b2b6: 1ad3 subs r3, r2, r3 + 803b2b8: b29b uxth r3, r3 + 803b2ba: f8a7 304e strh.w r3, [r7, #78] ; 0x4e LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n", m, (u16_t)(m * TCP_SLOW_INTERVAL))); /* This is taken directly from VJs original code in his paper */ m = (s16_t)(m - (pcb->sa >> 3)); - 803b23a: f8b7 204e ldrh.w r2, [r7, #78] ; 0x4e - 803b23e: 687b ldr r3, [r7, #4] - 803b240: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 803b244: 10db asrs r3, r3, #3 - 803b246: b21b sxth r3, r3 - 803b248: b29b uxth r3, r3 - 803b24a: 1ad3 subs r3, r2, r3 - 803b24c: b29b uxth r3, r3 - 803b24e: f8a7 304e strh.w r3, [r7, #78] ; 0x4e + 803b2be: f8b7 204e ldrh.w r2, [r7, #78] ; 0x4e + 803b2c2: 687b ldr r3, [r7, #4] + 803b2c4: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 803b2c8: 10db asrs r3, r3, #3 + 803b2ca: b21b sxth r3, r3 + 803b2cc: b29b uxth r3, r3 + 803b2ce: 1ad3 subs r3, r2, r3 + 803b2d0: b29b uxth r3, r3 + 803b2d2: f8a7 304e strh.w r3, [r7, #78] ; 0x4e pcb->sa = (s16_t)(pcb->sa + m); - 803b252: 687b ldr r3, [r7, #4] - 803b254: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 803b258: b29a uxth r2, r3 - 803b25a: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e - 803b25e: 4413 add r3, r2 - 803b260: b29b uxth r3, r3 - 803b262: b21a sxth r2, r3 - 803b264: 687b ldr r3, [r7, #4] - 803b266: 879a strh r2, [r3, #60] ; 0x3c + 803b2d6: 687b ldr r3, [r7, #4] + 803b2d8: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 803b2dc: b29a uxth r2, r3 + 803b2de: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e + 803b2e2: 4413 add r3, r2 + 803b2e4: b29b uxth r3, r3 + 803b2e6: b21a sxth r2, r3 + 803b2e8: 687b ldr r3, [r7, #4] + 803b2ea: 879a strh r2, [r3, #60] ; 0x3c if (m < 0) { - 803b268: f9b7 304e ldrsh.w r3, [r7, #78] ; 0x4e - 803b26c: 2b00 cmp r3, #0 - 803b26e: da05 bge.n 803b27c + 803b2ec: f9b7 304e ldrsh.w r3, [r7, #78] ; 0x4e + 803b2f0: 2b00 cmp r3, #0 + 803b2f2: da05 bge.n 803b300 m = (s16_t) - m; - 803b270: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e - 803b274: 425b negs r3, r3 - 803b276: b29b uxth r3, r3 - 803b278: f8a7 304e strh.w r3, [r7, #78] ; 0x4e + 803b2f4: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e + 803b2f8: 425b negs r3, r3 + 803b2fa: b29b uxth r3, r3 + 803b2fc: f8a7 304e strh.w r3, [r7, #78] ; 0x4e } m = (s16_t)(m - (pcb->sv >> 2)); - 803b27c: f8b7 204e ldrh.w r2, [r7, #78] ; 0x4e - 803b280: 687b ldr r3, [r7, #4] - 803b282: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 803b286: 109b asrs r3, r3, #2 - 803b288: b21b sxth r3, r3 - 803b28a: b29b uxth r3, r3 - 803b28c: 1ad3 subs r3, r2, r3 - 803b28e: b29b uxth r3, r3 - 803b290: f8a7 304e strh.w r3, [r7, #78] ; 0x4e + 803b300: f8b7 204e ldrh.w r2, [r7, #78] ; 0x4e + 803b304: 687b ldr r3, [r7, #4] + 803b306: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 803b30a: 109b asrs r3, r3, #2 + 803b30c: b21b sxth r3, r3 + 803b30e: b29b uxth r3, r3 + 803b310: 1ad3 subs r3, r2, r3 + 803b312: b29b uxth r3, r3 + 803b314: f8a7 304e strh.w r3, [r7, #78] ; 0x4e pcb->sv = (s16_t)(pcb->sv + m); - 803b294: 687b ldr r3, [r7, #4] - 803b296: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 803b29a: b29a uxth r2, r3 - 803b29c: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e - 803b2a0: 4413 add r3, r2 - 803b2a2: b29b uxth r3, r3 - 803b2a4: b21a sxth r2, r3 - 803b2a6: 687b ldr r3, [r7, #4] - 803b2a8: 87da strh r2, [r3, #62] ; 0x3e + 803b318: 687b ldr r3, [r7, #4] + 803b31a: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 803b31e: b29a uxth r2, r3 + 803b320: f8b7 304e ldrh.w r3, [r7, #78] ; 0x4e + 803b324: 4413 add r3, r2 + 803b326: b29b uxth r3, r3 + 803b328: b21a sxth r2, r3 + 803b32a: 687b ldr r3, [r7, #4] + 803b32c: 87da strh r2, [r3, #62] ; 0x3e pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv); - 803b2aa: 687b ldr r3, [r7, #4] - 803b2ac: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c - 803b2b0: 10db asrs r3, r3, #3 - 803b2b2: b21b sxth r3, r3 - 803b2b4: b29a uxth r2, r3 - 803b2b6: 687b ldr r3, [r7, #4] - 803b2b8: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e - 803b2bc: b29b uxth r3, r3 - 803b2be: 4413 add r3, r2 - 803b2c0: b29b uxth r3, r3 - 803b2c2: b21a sxth r2, r3 - 803b2c4: 687b ldr r3, [r7, #4] - 803b2c6: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 + 803b32e: 687b ldr r3, [r7, #4] + 803b330: f9b3 303c ldrsh.w r3, [r3, #60] ; 0x3c + 803b334: 10db asrs r3, r3, #3 + 803b336: b21b sxth r3, r3 + 803b338: b29a uxth r2, r3 + 803b33a: 687b ldr r3, [r7, #4] + 803b33c: f9b3 303e ldrsh.w r3, [r3, #62] ; 0x3e + 803b340: b29b uxth r3, r3 + 803b342: 4413 add r3, r2 + 803b344: b29b uxth r3, r3 + 803b346: b21a sxth r2, r3 + 803b348: 687b ldr r3, [r7, #4] + 803b34a: f8a3 2040 strh.w r2, [r3, #64] ; 0x40 LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n", pcb->rto, (u16_t)(pcb->rto * TCP_SLOW_INTERVAL))); pcb->rttest = 0; - 803b2ca: 687b ldr r3, [r7, #4] - 803b2cc: 2200 movs r2, #0 - 803b2ce: 635a str r2, [r3, #52] ; 0x34 + 803b34e: 687b ldr r3, [r7, #4] + 803b350: 2200 movs r2, #0 + 803b352: 635a str r2, [r3, #52] ; 0x34 /* If the incoming segment contains data, we must process it further unless the pcb already received a FIN. (RFC 793, chapter 3.9, "SEGMENT ARRIVES" in states CLOSE-WAIT, CLOSING, LAST-ACK and TIME-WAIT: "Ignore the segment text.") */ if ((tcplen > 0) && (pcb->state < CLOSE_WAIT)) { - 803b2d0: 4b35 ldr r3, [pc, #212] ; (803b3a8 ) - 803b2d2: 881b ldrh r3, [r3, #0] - 803b2d4: 2b00 cmp r3, #0 - 803b2d6: f000 84e2 beq.w 803bc9e - 803b2da: 687b ldr r3, [r7, #4] - 803b2dc: 7d1b ldrb r3, [r3, #20] - 803b2de: 2b06 cmp r3, #6 - 803b2e0: f200 84dd bhi.w 803bc9e + 803b354: 4b35 ldr r3, [pc, #212] ; (803b42c ) + 803b356: 881b ldrh r3, [r3, #0] + 803b358: 2b00 cmp r3, #0 + 803b35a: f000 84e2 beq.w 803bd22 + 803b35e: 687b ldr r3, [r7, #4] + 803b360: 7d1b ldrb r3, [r3, #20] + 803b362: 2b06 cmp r3, #6 + 803b364: f200 84dd bhi.w 803bd22 this if the sequence number of the incoming segment is less than rcv_nxt, and the sequence number plus the length of the segment is larger than rcv_nxt. */ /* if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) { if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/ if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) { - 803b2e4: 687b ldr r3, [r7, #4] - 803b2e6: 6a5a ldr r2, [r3, #36] ; 0x24 - 803b2e8: 4b30 ldr r3, [pc, #192] ; (803b3ac ) - 803b2ea: 681b ldr r3, [r3, #0] - 803b2ec: 1ad3 subs r3, r2, r3 - 803b2ee: 3b01 subs r3, #1 - 803b2f0: 2b00 cmp r3, #0 - 803b2f2: f2c0 808f blt.w 803b414 - 803b2f6: 687b ldr r3, [r7, #4] - 803b2f8: 6a5a ldr r2, [r3, #36] ; 0x24 - 803b2fa: 4b2b ldr r3, [pc, #172] ; (803b3a8 ) - 803b2fc: 881b ldrh r3, [r3, #0] - 803b2fe: 4619 mov r1, r3 - 803b300: 4b2a ldr r3, [pc, #168] ; (803b3ac ) - 803b302: 681b ldr r3, [r3, #0] - 803b304: 440b add r3, r1 - 803b306: 1ad3 subs r3, r2, r3 - 803b308: 3301 adds r3, #1 - 803b30a: 2b00 cmp r3, #0 - 803b30c: f300 8082 bgt.w 803b414 + 803b368: 687b ldr r3, [r7, #4] + 803b36a: 6a5a ldr r2, [r3, #36] ; 0x24 + 803b36c: 4b30 ldr r3, [pc, #192] ; (803b430 ) + 803b36e: 681b ldr r3, [r3, #0] + 803b370: 1ad3 subs r3, r2, r3 + 803b372: 3b01 subs r3, #1 + 803b374: 2b00 cmp r3, #0 + 803b376: f2c0 808f blt.w 803b498 + 803b37a: 687b ldr r3, [r7, #4] + 803b37c: 6a5a ldr r2, [r3, #36] ; 0x24 + 803b37e: 4b2b ldr r3, [pc, #172] ; (803b42c ) + 803b380: 881b ldrh r3, [r3, #0] + 803b382: 4619 mov r1, r3 + 803b384: 4b2a ldr r3, [pc, #168] ; (803b430 ) + 803b386: 681b ldr r3, [r3, #0] + 803b388: 440b add r3, r1 + 803b38a: 1ad3 subs r3, r2, r3 + 803b38c: 3301 adds r3, #1 + 803b38e: 2b00 cmp r3, #0 + 803b390: f300 8082 bgt.w 803b498 After we are done with adjusting the pbuf pointers we must adjust the ->data pointer in the seg and the segment length.*/ struct pbuf *p = inseg.p; - 803b310: 4b27 ldr r3, [pc, #156] ; (803b3b0 ) - 803b312: 685b ldr r3, [r3, #4] - 803b314: 647b str r3, [r7, #68] ; 0x44 + 803b394: 4b27 ldr r3, [pc, #156] ; (803b434 ) + 803b396: 685b ldr r3, [r3, #4] + 803b398: 647b str r3, [r7, #68] ; 0x44 u32_t off32 = pcb->rcv_nxt - seqno; - 803b316: 687b ldr r3, [r7, #4] - 803b318: 6a5a ldr r2, [r3, #36] ; 0x24 - 803b31a: 4b24 ldr r3, [pc, #144] ; (803b3ac ) - 803b31c: 681b ldr r3, [r3, #0] - 803b31e: 1ad3 subs r3, r2, r3 - 803b320: 627b str r3, [r7, #36] ; 0x24 + 803b39a: 687b ldr r3, [r7, #4] + 803b39c: 6a5a ldr r2, [r3, #36] ; 0x24 + 803b39e: 4b24 ldr r3, [pc, #144] ; (803b430 ) + 803b3a0: 681b ldr r3, [r3, #0] + 803b3a2: 1ad3 subs r3, r2, r3 + 803b3a4: 627b str r3, [r7, #36] ; 0x24 u16_t new_tot_len, off; LWIP_ASSERT("inseg.p != NULL", inseg.p); - 803b322: 4b23 ldr r3, [pc, #140] ; (803b3b0 ) - 803b324: 685b ldr r3, [r3, #4] - 803b326: 2b00 cmp r3, #0 - 803b328: d106 bne.n 803b338 - 803b32a: 4b22 ldr r3, [pc, #136] ; (803b3b4 ) - 803b32c: f240 5294 movw r2, #1428 ; 0x594 - 803b330: 4921 ldr r1, [pc, #132] ; (803b3b8 ) - 803b332: 4822 ldr r0, [pc, #136] ; (803b3bc ) - 803b334: f005 fbec bl 8040b10 + 803b3a6: 4b23 ldr r3, [pc, #140] ; (803b434 ) + 803b3a8: 685b ldr r3, [r3, #4] + 803b3aa: 2b00 cmp r3, #0 + 803b3ac: d106 bne.n 803b3bc + 803b3ae: 4b22 ldr r3, [pc, #136] ; (803b438 ) + 803b3b0: f240 5294 movw r2, #1428 ; 0x594 + 803b3b4: 4921 ldr r1, [pc, #132] ; (803b43c ) + 803b3b6: 4822 ldr r0, [pc, #136] ; (803b440 ) + 803b3b8: f005 fbec bl 8040b94 LWIP_ASSERT("insane offset!", (off32 < 0xffff)); - 803b338: 6a7b ldr r3, [r7, #36] ; 0x24 - 803b33a: f64f 72fe movw r2, #65534 ; 0xfffe - 803b33e: 4293 cmp r3, r2 - 803b340: d906 bls.n 803b350 - 803b342: 4b1c ldr r3, [pc, #112] ; (803b3b4 ) - 803b344: f240 5295 movw r2, #1429 ; 0x595 - 803b348: 491d ldr r1, [pc, #116] ; (803b3c0 ) - 803b34a: 481c ldr r0, [pc, #112] ; (803b3bc ) - 803b34c: f005 fbe0 bl 8040b10 + 803b3bc: 6a7b ldr r3, [r7, #36] ; 0x24 + 803b3be: f64f 72fe movw r2, #65534 ; 0xfffe + 803b3c2: 4293 cmp r3, r2 + 803b3c4: d906 bls.n 803b3d4 + 803b3c6: 4b1c ldr r3, [pc, #112] ; (803b438 ) + 803b3c8: f240 5295 movw r2, #1429 ; 0x595 + 803b3cc: 491d ldr r1, [pc, #116] ; (803b444 ) + 803b3ce: 481c ldr r0, [pc, #112] ; (803b440 ) + 803b3d0: f005 fbe0 bl 8040b94 off = (u16_t)off32; - 803b350: 6a7b ldr r3, [r7, #36] ; 0x24 - 803b352: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803b3d4: 6a7b ldr r3, [r7, #36] ; 0x24 + 803b3d6: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off)); - 803b356: 4b16 ldr r3, [pc, #88] ; (803b3b0 ) - 803b358: 685b ldr r3, [r3, #4] - 803b35a: 891b ldrh r3, [r3, #8] - 803b35c: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803b360: 429a cmp r2, r3 - 803b362: d906 bls.n 803b372 - 803b364: 4b13 ldr r3, [pc, #76] ; (803b3b4 ) - 803b366: f240 5297 movw r2, #1431 ; 0x597 - 803b36a: 4916 ldr r1, [pc, #88] ; (803b3c4 ) - 803b36c: 4813 ldr r0, [pc, #76] ; (803b3bc ) - 803b36e: f005 fbcf bl 8040b10 + 803b3da: 4b16 ldr r3, [pc, #88] ; (803b434 ) + 803b3dc: 685b ldr r3, [r3, #4] + 803b3de: 891b ldrh r3, [r3, #8] + 803b3e0: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803b3e4: 429a cmp r2, r3 + 803b3e6: d906 bls.n 803b3f6 + 803b3e8: 4b13 ldr r3, [pc, #76] ; (803b438 ) + 803b3ea: f240 5297 movw r2, #1431 ; 0x597 + 803b3ee: 4916 ldr r1, [pc, #88] ; (803b448 ) + 803b3f0: 4813 ldr r0, [pc, #76] ; (803b440 ) + 803b3f2: f005 fbcf bl 8040b94 inseg.len -= off; - 803b372: 4b0f ldr r3, [pc, #60] ; (803b3b0 ) - 803b374: 891a ldrh r2, [r3, #8] - 803b376: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803b37a: 1ad3 subs r3, r2, r3 - 803b37c: b29a uxth r2, r3 - 803b37e: 4b0c ldr r3, [pc, #48] ; (803b3b0 ) - 803b380: 811a strh r2, [r3, #8] + 803b3f6: 4b0f ldr r3, [pc, #60] ; (803b434 ) + 803b3f8: 891a ldrh r2, [r3, #8] + 803b3fa: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803b3fe: 1ad3 subs r3, r2, r3 + 803b400: b29a uxth r2, r3 + 803b402: 4b0c ldr r3, [pc, #48] ; (803b434 ) + 803b404: 811a strh r2, [r3, #8] new_tot_len = (u16_t)(inseg.p->tot_len - off); - 803b382: 4b0b ldr r3, [pc, #44] ; (803b3b0 ) - 803b384: 685b ldr r3, [r3, #4] - 803b386: 891a ldrh r2, [r3, #8] - 803b388: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803b38c: 1ad3 subs r3, r2, r3 - 803b38e: 847b strh r3, [r7, #34] ; 0x22 + 803b406: 4b0b ldr r3, [pc, #44] ; (803b434 ) + 803b408: 685b ldr r3, [r3, #4] + 803b40a: 891a ldrh r2, [r3, #8] + 803b40c: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803b410: 1ad3 subs r3, r2, r3 + 803b412: 847b strh r3, [r7, #34] ; 0x22 while (p->len < off) { - 803b390: e02a b.n 803b3e8 - 803b392: bf00 nop - 803b394: 08043868 .word 0x08043868 - 803b398: 08043870 .word 0x08043870 - 803b39c: 2400e998 .word 0x2400e998 - 803b3a0: 2400e994 .word 0x2400e994 - 803b3a4: 2400e958 .word 0x2400e958 - 803b3a8: 2400e99a .word 0x2400e99a - 803b3ac: 2400e990 .word 0x2400e990 - 803b3b0: 2400e970 .word 0x2400e970 - 803b3b4: 08043500 .word 0x08043500 - 803b3b8: 08043878 .word 0x08043878 - 803b3bc: 0804354c .word 0x0804354c - 803b3c0: 08043888 .word 0x08043888 - 803b3c4: 08043898 .word 0x08043898 + 803b414: e02a b.n 803b46c + 803b416: bf00 nop + 803b418: 080438e8 .word 0x080438e8 + 803b41c: 080438f0 .word 0x080438f0 + 803b420: 2400e9a0 .word 0x2400e9a0 + 803b424: 2400e99c .word 0x2400e99c + 803b428: 2400e960 .word 0x2400e960 + 803b42c: 2400e9a2 .word 0x2400e9a2 + 803b430: 2400e998 .word 0x2400e998 + 803b434: 2400e978 .word 0x2400e978 + 803b438: 08043580 .word 0x08043580 + 803b43c: 080438f8 .word 0x080438f8 + 803b440: 080435cc .word 0x080435cc + 803b444: 08043908 .word 0x08043908 + 803b448: 08043918 .word 0x08043918 off -= p->len; - 803b3c8: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b3ca: 895b ldrh r3, [r3, #10] - 803b3cc: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803b3d0: 1ad3 subs r3, r2, r3 - 803b3d2: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803b44c: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b44e: 895b ldrh r3, [r3, #10] + 803b450: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803b454: 1ad3 subs r3, r2, r3 + 803b456: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 /* all pbufs up to and including this one have len==0, so tot_len is equal */ p->tot_len = new_tot_len; - 803b3d6: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b3d8: 8c7a ldrh r2, [r7, #34] ; 0x22 - 803b3da: 811a strh r2, [r3, #8] + 803b45a: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b45c: 8c7a ldrh r2, [r7, #34] ; 0x22 + 803b45e: 811a strh r2, [r3, #8] p->len = 0; - 803b3dc: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b3de: 2200 movs r2, #0 - 803b3e0: 815a strh r2, [r3, #10] + 803b460: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b462: 2200 movs r2, #0 + 803b464: 815a strh r2, [r3, #10] p = p->next; - 803b3e2: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b3e4: 681b ldr r3, [r3, #0] - 803b3e6: 647b str r3, [r7, #68] ; 0x44 + 803b466: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b468: 681b ldr r3, [r3, #0] + 803b46a: 647b str r3, [r7, #68] ; 0x44 while (p->len < off) { - 803b3e8: 6c7b ldr r3, [r7, #68] ; 0x44 - 803b3ea: 895b ldrh r3, [r3, #10] - 803b3ec: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803b3f0: 429a cmp r2, r3 - 803b3f2: d8e9 bhi.n 803b3c8 + 803b46c: 6c7b ldr r3, [r7, #68] ; 0x44 + 803b46e: 895b ldrh r3, [r3, #10] + 803b470: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803b474: 429a cmp r2, r3 + 803b476: d8e9 bhi.n 803b44c } /* cannot fail... */ pbuf_remove_header(p, off); - 803b3f4: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803b3f8: 4619 mov r1, r3 - 803b3fa: 6c78 ldr r0, [r7, #68] ; 0x44 - 803b3fc: f7fc f918 bl 8037630 + 803b478: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803b47c: 4619 mov r1, r3 + 803b47e: 6c78 ldr r0, [r7, #68] ; 0x44 + 803b480: f7fc f918 bl 80376b4 inseg.tcphdr->seqno = seqno = pcb->rcv_nxt; - 803b400: 687b ldr r3, [r7, #4] - 803b402: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b404: 4a91 ldr r2, [pc, #580] ; (803b64c ) - 803b406: 6013 str r3, [r2, #0] - 803b408: 4b91 ldr r3, [pc, #580] ; (803b650 ) - 803b40a: 68db ldr r3, [r3, #12] - 803b40c: 4a8f ldr r2, [pc, #572] ; (803b64c ) - 803b40e: 6812 ldr r2, [r2, #0] - 803b410: 605a str r2, [r3, #4] + 803b484: 687b ldr r3, [r7, #4] + 803b486: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b488: 4a91 ldr r2, [pc, #580] ; (803b6d0 ) + 803b48a: 6013 str r3, [r2, #0] + 803b48c: 4b91 ldr r3, [pc, #580] ; (803b6d4 ) + 803b48e: 68db ldr r3, [r3, #12] + 803b490: 4a8f ldr r2, [pc, #572] ; (803b6d0 ) + 803b492: 6812 ldr r2, [r2, #0] + 803b494: 605a str r2, [r3, #4] if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) { - 803b412: e00d b.n 803b430 + 803b496: e00d b.n 803b4b4 } else { if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) { - 803b414: 4b8d ldr r3, [pc, #564] ; (803b64c ) - 803b416: 681a ldr r2, [r3, #0] - 803b418: 687b ldr r3, [r7, #4] - 803b41a: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b41c: 1ad3 subs r3, r2, r3 - 803b41e: 2b00 cmp r3, #0 - 803b420: da06 bge.n 803b430 + 803b498: 4b8d ldr r3, [pc, #564] ; (803b6d0 ) + 803b49a: 681a ldr r2, [r3, #0] + 803b49c: 687b ldr r3, [r7, #4] + 803b49e: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b4a0: 1ad3 subs r3, r2, r3 + 803b4a2: 2b00 cmp r3, #0 + 803b4a4: da06 bge.n 803b4b4 /* the whole segment is < rcv_nxt */ /* must be a duplicate of a packet that has already been correctly handled */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno)); tcp_ack_now(pcb); - 803b422: 687b ldr r3, [r7, #4] - 803b424: 8b5b ldrh r3, [r3, #26] - 803b426: f043 0302 orr.w r3, r3, #2 - 803b42a: b29a uxth r2, r3 - 803b42c: 687b ldr r3, [r7, #4] - 803b42e: 835a strh r2, [r3, #26] + 803b4a6: 687b ldr r3, [r7, #4] + 803b4a8: 8b5b ldrh r3, [r3, #26] + 803b4aa: f043 0302 orr.w r3, r3, #2 + 803b4ae: b29a uxth r2, r3 + 803b4b0: 687b ldr r3, [r7, #4] + 803b4b2: 835a strh r2, [r3, #26] } /* The sequence number must be within the window (above rcv_nxt and below rcv_nxt + rcv_wnd) in order to be further processed. */ if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, - 803b430: 4b86 ldr r3, [pc, #536] ; (803b64c ) - 803b432: 681a ldr r2, [r3, #0] - 803b434: 687b ldr r3, [r7, #4] - 803b436: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b438: 1ad3 subs r3, r2, r3 - 803b43a: 2b00 cmp r3, #0 - 803b43c: f2c0 842a blt.w 803bc94 - 803b440: 4b82 ldr r3, [pc, #520] ; (803b64c ) - 803b442: 681a ldr r2, [r3, #0] - 803b444: 687b ldr r3, [r7, #4] - 803b446: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b448: 6879 ldr r1, [r7, #4] - 803b44a: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803b44c: 440b add r3, r1 - 803b44e: 1ad3 subs r3, r2, r3 - 803b450: 3301 adds r3, #1 - 803b452: 2b00 cmp r3, #0 - 803b454: f300 841e bgt.w 803bc94 + 803b4b4: 4b86 ldr r3, [pc, #536] ; (803b6d0 ) + 803b4b6: 681a ldr r2, [r3, #0] + 803b4b8: 687b ldr r3, [r7, #4] + 803b4ba: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b4bc: 1ad3 subs r3, r2, r3 + 803b4be: 2b00 cmp r3, #0 + 803b4c0: f2c0 842a blt.w 803bd18 + 803b4c4: 4b82 ldr r3, [pc, #520] ; (803b6d0 ) + 803b4c6: 681a ldr r2, [r3, #0] + 803b4c8: 687b ldr r3, [r7, #4] + 803b4ca: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b4cc: 6879 ldr r1, [r7, #4] + 803b4ce: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803b4d0: 440b add r3, r1 + 803b4d2: 1ad3 subs r3, r2, r3 + 803b4d4: 3301 adds r3, #1 + 803b4d6: 2b00 cmp r3, #0 + 803b4d8: f300 841e bgt.w 803bd18 pcb->rcv_nxt + pcb->rcv_wnd - 1)) { if (pcb->rcv_nxt == seqno) { - 803b458: 687b ldr r3, [r7, #4] - 803b45a: 6a5a ldr r2, [r3, #36] ; 0x24 - 803b45c: 4b7b ldr r3, [pc, #492] ; (803b64c ) - 803b45e: 681b ldr r3, [r3, #0] - 803b460: 429a cmp r2, r3 - 803b462: f040 829a bne.w 803b99a + 803b4dc: 687b ldr r3, [r7, #4] + 803b4de: 6a5a ldr r2, [r3, #36] ; 0x24 + 803b4e0: 4b7b ldr r3, [pc, #492] ; (803b6d0 ) + 803b4e2: 681b ldr r3, [r3, #0] + 803b4e4: 429a cmp r2, r3 + 803b4e6: f040 829a bne.w 803ba1e /* The incoming segment is the next in sequence. We check if we have to trim the end of the segment and update rcv_nxt and pass the data to the application. */ tcplen = TCP_TCPLEN(&inseg); - 803b466: 4b7a ldr r3, [pc, #488] ; (803b650 ) - 803b468: 891c ldrh r4, [r3, #8] - 803b46a: 4b79 ldr r3, [pc, #484] ; (803b650 ) - 803b46c: 68db ldr r3, [r3, #12] - 803b46e: 899b ldrh r3, [r3, #12] - 803b470: b29b uxth r3, r3 - 803b472: 4618 mov r0, r3 - 803b474: f7fa fd30 bl 8035ed8 - 803b478: 4603 mov r3, r0 - 803b47a: b2db uxtb r3, r3 - 803b47c: f003 0303 and.w r3, r3, #3 - 803b480: 2b00 cmp r3, #0 - 803b482: d001 beq.n 803b488 - 803b484: 2301 movs r3, #1 - 803b486: e000 b.n 803b48a - 803b488: 2300 movs r3, #0 - 803b48a: 4423 add r3, r4 - 803b48c: b29a uxth r2, r3 - 803b48e: 4b71 ldr r3, [pc, #452] ; (803b654 ) - 803b490: 801a strh r2, [r3, #0] + 803b4ea: 4b7a ldr r3, [pc, #488] ; (803b6d4 ) + 803b4ec: 891c ldrh r4, [r3, #8] + 803b4ee: 4b79 ldr r3, [pc, #484] ; (803b6d4 ) + 803b4f0: 68db ldr r3, [r3, #12] + 803b4f2: 899b ldrh r3, [r3, #12] + 803b4f4: b29b uxth r3, r3 + 803b4f6: 4618 mov r0, r3 + 803b4f8: f7fa fd30 bl 8035f5c + 803b4fc: 4603 mov r3, r0 + 803b4fe: b2db uxtb r3, r3 + 803b500: f003 0303 and.w r3, r3, #3 + 803b504: 2b00 cmp r3, #0 + 803b506: d001 beq.n 803b50c + 803b508: 2301 movs r3, #1 + 803b50a: e000 b.n 803b50e + 803b50c: 2300 movs r3, #0 + 803b50e: 4423 add r3, r4 + 803b510: b29a uxth r2, r3 + 803b512: 4b71 ldr r3, [pc, #452] ; (803b6d8 ) + 803b514: 801a strh r2, [r3, #0] if (tcplen > pcb->rcv_wnd) { - 803b492: 687b ldr r3, [r7, #4] - 803b494: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b496: 4b6f ldr r3, [pc, #444] ; (803b654 ) - 803b498: 881b ldrh r3, [r3, #0] - 803b49a: 429a cmp r2, r3 - 803b49c: d275 bcs.n 803b58a + 803b516: 687b ldr r3, [r7, #4] + 803b518: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b51a: 4b6f ldr r3, [pc, #444] ; (803b6d8 ) + 803b51c: 881b ldrh r3, [r3, #0] + 803b51e: 429a cmp r2, r3 + 803b520: d275 bcs.n 803b60e LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: other end overran receive window" "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n", seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd)); if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { - 803b49e: 4b6c ldr r3, [pc, #432] ; (803b650 ) - 803b4a0: 68db ldr r3, [r3, #12] - 803b4a2: 899b ldrh r3, [r3, #12] - 803b4a4: b29b uxth r3, r3 - 803b4a6: 4618 mov r0, r3 - 803b4a8: f7fa fd16 bl 8035ed8 - 803b4ac: 4603 mov r3, r0 - 803b4ae: b2db uxtb r3, r3 - 803b4b0: f003 0301 and.w r3, r3, #1 - 803b4b4: 2b00 cmp r3, #0 - 803b4b6: d01f beq.n 803b4f8 + 803b522: 4b6c ldr r3, [pc, #432] ; (803b6d4 ) + 803b524: 68db ldr r3, [r3, #12] + 803b526: 899b ldrh r3, [r3, #12] + 803b528: b29b uxth r3, r3 + 803b52a: 4618 mov r0, r3 + 803b52c: f7fa fd16 bl 8035f5c + 803b530: 4603 mov r3, r0 + 803b532: b2db uxtb r3, r3 + 803b534: f003 0301 and.w r3, r3, #1 + 803b538: 2b00 cmp r3, #0 + 803b53a: d01f beq.n 803b57c /* Must remove the FIN from the header as we're trimming * that byte of sequence-space from the packet */ TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) & ~(unsigned int)TCP_FIN); - 803b4b8: 4b65 ldr r3, [pc, #404] ; (803b650 ) - 803b4ba: 68db ldr r3, [r3, #12] - 803b4bc: 899b ldrh r3, [r3, #12] - 803b4be: b29b uxth r3, r3 - 803b4c0: b21b sxth r3, r3 - 803b4c2: f423 537c bic.w r3, r3, #16128 ; 0x3f00 - 803b4c6: b21c sxth r4, r3 - 803b4c8: 4b61 ldr r3, [pc, #388] ; (803b650 ) - 803b4ca: 68db ldr r3, [r3, #12] - 803b4cc: 899b ldrh r3, [r3, #12] - 803b4ce: b29b uxth r3, r3 - 803b4d0: 4618 mov r0, r3 - 803b4d2: f7fa fd01 bl 8035ed8 - 803b4d6: 4603 mov r3, r0 - 803b4d8: b2db uxtb r3, r3 - 803b4da: b29b uxth r3, r3 - 803b4dc: f003 033e and.w r3, r3, #62 ; 0x3e - 803b4e0: b29b uxth r3, r3 - 803b4e2: 4618 mov r0, r3 - 803b4e4: f7fa fcf8 bl 8035ed8 - 803b4e8: 4603 mov r3, r0 - 803b4ea: b21b sxth r3, r3 - 803b4ec: 4323 orrs r3, r4 - 803b4ee: b21a sxth r2, r3 - 803b4f0: 4b57 ldr r3, [pc, #348] ; (803b650 ) - 803b4f2: 68db ldr r3, [r3, #12] - 803b4f4: b292 uxth r2, r2 - 803b4f6: 819a strh r2, [r3, #12] + 803b53c: 4b65 ldr r3, [pc, #404] ; (803b6d4 ) + 803b53e: 68db ldr r3, [r3, #12] + 803b540: 899b ldrh r3, [r3, #12] + 803b542: b29b uxth r3, r3 + 803b544: b21b sxth r3, r3 + 803b546: f423 537c bic.w r3, r3, #16128 ; 0x3f00 + 803b54a: b21c sxth r4, r3 + 803b54c: 4b61 ldr r3, [pc, #388] ; (803b6d4 ) + 803b54e: 68db ldr r3, [r3, #12] + 803b550: 899b ldrh r3, [r3, #12] + 803b552: b29b uxth r3, r3 + 803b554: 4618 mov r0, r3 + 803b556: f7fa fd01 bl 8035f5c + 803b55a: 4603 mov r3, r0 + 803b55c: b2db uxtb r3, r3 + 803b55e: b29b uxth r3, r3 + 803b560: f003 033e and.w r3, r3, #62 ; 0x3e + 803b564: b29b uxth r3, r3 + 803b566: 4618 mov r0, r3 + 803b568: f7fa fcf8 bl 8035f5c + 803b56c: 4603 mov r3, r0 + 803b56e: b21b sxth r3, r3 + 803b570: 4323 orrs r3, r4 + 803b572: b21a sxth r2, r3 + 803b574: 4b57 ldr r3, [pc, #348] ; (803b6d4 ) + 803b576: 68db ldr r3, [r3, #12] + 803b578: b292 uxth r2, r2 + 803b57a: 819a strh r2, [r3, #12] } /* Adjust length of segment to fit in the window. */ TCPWND_CHECK16(pcb->rcv_wnd); inseg.len = (u16_t)pcb->rcv_wnd; - 803b4f8: 687b ldr r3, [r7, #4] - 803b4fa: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b4fc: 4b54 ldr r3, [pc, #336] ; (803b650 ) - 803b4fe: 811a strh r2, [r3, #8] + 803b57c: 687b ldr r3, [r7, #4] + 803b57e: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b580: 4b54 ldr r3, [pc, #336] ; (803b6d4 ) + 803b582: 811a strh r2, [r3, #8] if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { - 803b500: 4b53 ldr r3, [pc, #332] ; (803b650 ) - 803b502: 68db ldr r3, [r3, #12] - 803b504: 899b ldrh r3, [r3, #12] - 803b506: b29b uxth r3, r3 - 803b508: 4618 mov r0, r3 - 803b50a: f7fa fce5 bl 8035ed8 - 803b50e: 4603 mov r3, r0 - 803b510: b2db uxtb r3, r3 - 803b512: f003 0302 and.w r3, r3, #2 - 803b516: 2b00 cmp r3, #0 - 803b518: d005 beq.n 803b526 + 803b584: 4b53 ldr r3, [pc, #332] ; (803b6d4 ) + 803b586: 68db ldr r3, [r3, #12] + 803b588: 899b ldrh r3, [r3, #12] + 803b58a: b29b uxth r3, r3 + 803b58c: 4618 mov r0, r3 + 803b58e: f7fa fce5 bl 8035f5c + 803b592: 4603 mov r3, r0 + 803b594: b2db uxtb r3, r3 + 803b596: f003 0302 and.w r3, r3, #2 + 803b59a: 2b00 cmp r3, #0 + 803b59c: d005 beq.n 803b5aa inseg.len -= 1; - 803b51a: 4b4d ldr r3, [pc, #308] ; (803b650 ) - 803b51c: 891b ldrh r3, [r3, #8] - 803b51e: 3b01 subs r3, #1 - 803b520: b29a uxth r2, r3 - 803b522: 4b4b ldr r3, [pc, #300] ; (803b650 ) - 803b524: 811a strh r2, [r3, #8] + 803b59e: 4b4d ldr r3, [pc, #308] ; (803b6d4 ) + 803b5a0: 891b ldrh r3, [r3, #8] + 803b5a2: 3b01 subs r3, #1 + 803b5a4: b29a uxth r2, r3 + 803b5a6: 4b4b ldr r3, [pc, #300] ; (803b6d4 ) + 803b5a8: 811a strh r2, [r3, #8] } pbuf_realloc(inseg.p, inseg.len); - 803b526: 4b4a ldr r3, [pc, #296] ; (803b650 ) - 803b528: 685b ldr r3, [r3, #4] - 803b52a: 4a49 ldr r2, [pc, #292] ; (803b650 ) - 803b52c: 8912 ldrh r2, [r2, #8] - 803b52e: 4611 mov r1, r2 - 803b530: 4618 mov r0, r3 - 803b532: f7fb ff7d bl 8037430 + 803b5aa: 4b4a ldr r3, [pc, #296] ; (803b6d4 ) + 803b5ac: 685b ldr r3, [r3, #4] + 803b5ae: 4a49 ldr r2, [pc, #292] ; (803b6d4 ) + 803b5b0: 8912 ldrh r2, [r2, #8] + 803b5b2: 4611 mov r1, r2 + 803b5b4: 4618 mov r0, r3 + 803b5b6: f7fb ff7d bl 80374b4 tcplen = TCP_TCPLEN(&inseg); - 803b536: 4b46 ldr r3, [pc, #280] ; (803b650 ) - 803b538: 891c ldrh r4, [r3, #8] - 803b53a: 4b45 ldr r3, [pc, #276] ; (803b650 ) - 803b53c: 68db ldr r3, [r3, #12] - 803b53e: 899b ldrh r3, [r3, #12] - 803b540: b29b uxth r3, r3 - 803b542: 4618 mov r0, r3 - 803b544: f7fa fcc8 bl 8035ed8 - 803b548: 4603 mov r3, r0 - 803b54a: b2db uxtb r3, r3 - 803b54c: f003 0303 and.w r3, r3, #3 - 803b550: 2b00 cmp r3, #0 - 803b552: d001 beq.n 803b558 - 803b554: 2301 movs r3, #1 - 803b556: e000 b.n 803b55a - 803b558: 2300 movs r3, #0 - 803b55a: 4423 add r3, r4 - 803b55c: b29a uxth r2, r3 - 803b55e: 4b3d ldr r3, [pc, #244] ; (803b654 ) - 803b560: 801a strh r2, [r3, #0] + 803b5ba: 4b46 ldr r3, [pc, #280] ; (803b6d4 ) + 803b5bc: 891c ldrh r4, [r3, #8] + 803b5be: 4b45 ldr r3, [pc, #276] ; (803b6d4 ) + 803b5c0: 68db ldr r3, [r3, #12] + 803b5c2: 899b ldrh r3, [r3, #12] + 803b5c4: b29b uxth r3, r3 + 803b5c6: 4618 mov r0, r3 + 803b5c8: f7fa fcc8 bl 8035f5c + 803b5cc: 4603 mov r3, r0 + 803b5ce: b2db uxtb r3, r3 + 803b5d0: f003 0303 and.w r3, r3, #3 + 803b5d4: 2b00 cmp r3, #0 + 803b5d6: d001 beq.n 803b5dc + 803b5d8: 2301 movs r3, #1 + 803b5da: e000 b.n 803b5de + 803b5dc: 2300 movs r3, #0 + 803b5de: 4423 add r3, r4 + 803b5e0: b29a uxth r2, r3 + 803b5e2: 4b3d ldr r3, [pc, #244] ; (803b6d8 ) + 803b5e4: 801a strh r2, [r3, #0] LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n", - 803b562: 4b3c ldr r3, [pc, #240] ; (803b654 ) - 803b564: 881b ldrh r3, [r3, #0] - 803b566: 461a mov r2, r3 - 803b568: 4b38 ldr r3, [pc, #224] ; (803b64c ) - 803b56a: 681b ldr r3, [r3, #0] - 803b56c: 441a add r2, r3 - 803b56e: 687b ldr r3, [r7, #4] - 803b570: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b572: 6879 ldr r1, [r7, #4] - 803b574: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803b576: 440b add r3, r1 - 803b578: 429a cmp r2, r3 - 803b57a: d006 beq.n 803b58a - 803b57c: 4b36 ldr r3, [pc, #216] ; (803b658 ) - 803b57e: f240 52cb movw r2, #1483 ; 0x5cb - 803b582: 4936 ldr r1, [pc, #216] ; (803b65c ) - 803b584: 4836 ldr r0, [pc, #216] ; (803b660 ) - 803b586: f005 fac3 bl 8040b10 + 803b5e6: 4b3c ldr r3, [pc, #240] ; (803b6d8 ) + 803b5e8: 881b ldrh r3, [r3, #0] + 803b5ea: 461a mov r2, r3 + 803b5ec: 4b38 ldr r3, [pc, #224] ; (803b6d0 ) + 803b5ee: 681b ldr r3, [r3, #0] + 803b5f0: 441a add r2, r3 + 803b5f2: 687b ldr r3, [r7, #4] + 803b5f4: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b5f6: 6879 ldr r1, [r7, #4] + 803b5f8: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803b5fa: 440b add r3, r1 + 803b5fc: 429a cmp r2, r3 + 803b5fe: d006 beq.n 803b60e + 803b600: 4b36 ldr r3, [pc, #216] ; (803b6dc ) + 803b602: f240 52cb movw r2, #1483 ; 0x5cb + 803b606: 4936 ldr r1, [pc, #216] ; (803b6e0 ) + 803b608: 4836 ldr r0, [pc, #216] ; (803b6e4 ) + 803b60a: f005 fac3 bl 8040b94 } #if TCP_QUEUE_OOSEQ /* Received in-sequence data, adjust ooseq data if: - FIN has been received or - inseq overlaps with ooseq */ if (pcb->ooseq != NULL) { - 803b58a: 687b ldr r3, [r7, #4] - 803b58c: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b58e: 2b00 cmp r3, #0 - 803b590: f000 80e7 beq.w 803b762 + 803b60e: 687b ldr r3, [r7, #4] + 803b610: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b612: 2b00 cmp r3, #0 + 803b614: f000 80e7 beq.w 803b7e6 if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { - 803b594: 4b2e ldr r3, [pc, #184] ; (803b650 ) - 803b596: 68db ldr r3, [r3, #12] - 803b598: 899b ldrh r3, [r3, #12] - 803b59a: b29b uxth r3, r3 - 803b59c: 4618 mov r0, r3 - 803b59e: f7fa fc9b bl 8035ed8 - 803b5a2: 4603 mov r3, r0 - 803b5a4: b2db uxtb r3, r3 - 803b5a6: f003 0301 and.w r3, r3, #1 - 803b5aa: 2b00 cmp r3, #0 - 803b5ac: d010 beq.n 803b5d0 + 803b618: 4b2e ldr r3, [pc, #184] ; (803b6d4 ) + 803b61a: 68db ldr r3, [r3, #12] + 803b61c: 899b ldrh r3, [r3, #12] + 803b61e: b29b uxth r3, r3 + 803b620: 4618 mov r0, r3 + 803b622: f7fa fc9b bl 8035f5c + 803b626: 4603 mov r3, r0 + 803b628: b2db uxtb r3, r3 + 803b62a: f003 0301 and.w r3, r3, #1 + 803b62e: 2b00 cmp r3, #0 + 803b630: d010 beq.n 803b654 LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received in-order FIN, binning ooseq queue\n")); /* Received in-order FIN means anything that was received * out of order must now have been received in-order, so * bin the ooseq queue */ while (pcb->ooseq != NULL) { - 803b5ae: e00a b.n 803b5c6 + 803b632: e00a b.n 803b64a struct tcp_seg *old_ooseq = pcb->ooseq; - 803b5b0: 687b ldr r3, [r7, #4] - 803b5b2: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b5b4: 60fb str r3, [r7, #12] + 803b634: 687b ldr r3, [r7, #4] + 803b636: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b638: 60fb str r3, [r7, #12] pcb->ooseq = pcb->ooseq->next; - 803b5b6: 687b ldr r3, [r7, #4] - 803b5b8: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b5ba: 681a ldr r2, [r3, #0] - 803b5bc: 687b ldr r3, [r7, #4] - 803b5be: 675a str r2, [r3, #116] ; 0x74 + 803b63a: 687b ldr r3, [r7, #4] + 803b63c: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b63e: 681a ldr r2, [r3, #0] + 803b640: 687b ldr r3, [r7, #4] + 803b642: 675a str r2, [r3, #116] ; 0x74 tcp_seg_free(old_ooseq); - 803b5c0: 68f8 ldr r0, [r7, #12] - 803b5c2: f7fd fce8 bl 8038f96 + 803b644: 68f8 ldr r0, [r7, #12] + 803b646: f7fd fce8 bl 803901a while (pcb->ooseq != NULL) { - 803b5c6: 687b ldr r3, [r7, #4] - 803b5c8: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b5ca: 2b00 cmp r3, #0 - 803b5cc: d1f0 bne.n 803b5b0 - 803b5ce: e0c8 b.n 803b762 + 803b64a: 687b ldr r3, [r7, #4] + 803b64c: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b64e: 2b00 cmp r3, #0 + 803b650: d1f0 bne.n 803b634 + 803b652: e0c8 b.n 803b7e6 } } else { struct tcp_seg *next = pcb->ooseq; - 803b5d0: 687b ldr r3, [r7, #4] - 803b5d2: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b5d4: 63fb str r3, [r7, #60] ; 0x3c + 803b654: 687b ldr r3, [r7, #4] + 803b656: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b658: 63fb str r3, [r7, #60] ; 0x3c /* Remove all segments on ooseq that are covered by inseg already. * FIN is copied from ooseq to inseg if present. */ while (next && - 803b5d6: e052 b.n 803b67e + 803b65a: e052 b.n 803b702 TCP_SEQ_GEQ(seqno + tcplen, next->tcphdr->seqno + next->len)) { struct tcp_seg *tmp; /* inseg cannot have FIN here (already processed above) */ if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 && - 803b5d8: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b5da: 68db ldr r3, [r3, #12] - 803b5dc: 899b ldrh r3, [r3, #12] - 803b5de: b29b uxth r3, r3 - 803b5e0: 4618 mov r0, r3 - 803b5e2: f7fa fc79 bl 8035ed8 - 803b5e6: 4603 mov r3, r0 - 803b5e8: b2db uxtb r3, r3 - 803b5ea: f003 0301 and.w r3, r3, #1 - 803b5ee: 2b00 cmp r3, #0 - 803b5f0: d03d beq.n 803b66e + 803b65c: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b65e: 68db ldr r3, [r3, #12] + 803b660: 899b ldrh r3, [r3, #12] + 803b662: b29b uxth r3, r3 + 803b664: 4618 mov r0, r3 + 803b666: f7fa fc79 bl 8035f5c + 803b66a: 4603 mov r3, r0 + 803b66c: b2db uxtb r3, r3 + 803b66e: f003 0301 and.w r3, r3, #1 + 803b672: 2b00 cmp r3, #0 + 803b674: d03d beq.n 803b6f2 (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) { - 803b5f2: 4b17 ldr r3, [pc, #92] ; (803b650 ) - 803b5f4: 68db ldr r3, [r3, #12] - 803b5f6: 899b ldrh r3, [r3, #12] - 803b5f8: b29b uxth r3, r3 - 803b5fa: 4618 mov r0, r3 - 803b5fc: f7fa fc6c bl 8035ed8 - 803b600: 4603 mov r3, r0 - 803b602: b2db uxtb r3, r3 - 803b604: f003 0302 and.w r3, r3, #2 + 803b676: 4b17 ldr r3, [pc, #92] ; (803b6d4 ) + 803b678: 68db ldr r3, [r3, #12] + 803b67a: 899b ldrh r3, [r3, #12] + 803b67c: b29b uxth r3, r3 + 803b67e: 4618 mov r0, r3 + 803b680: f7fa fc6c bl 8035f5c + 803b684: 4603 mov r3, r0 + 803b686: b2db uxtb r3, r3 + 803b688: f003 0302 and.w r3, r3, #2 if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 && - 803b608: 2b00 cmp r3, #0 - 803b60a: d130 bne.n 803b66e + 803b68c: 2b00 cmp r3, #0 + 803b68e: d130 bne.n 803b6f2 TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN); - 803b60c: 4b10 ldr r3, [pc, #64] ; (803b650 ) - 803b60e: 68db ldr r3, [r3, #12] - 803b610: 899b ldrh r3, [r3, #12] - 803b612: b29c uxth r4, r3 - 803b614: 2001 movs r0, #1 - 803b616: f7fa fc5f bl 8035ed8 - 803b61a: 4603 mov r3, r0 - 803b61c: 461a mov r2, r3 - 803b61e: 4b0c ldr r3, [pc, #48] ; (803b650 ) - 803b620: 68db ldr r3, [r3, #12] - 803b622: 4322 orrs r2, r4 - 803b624: b292 uxth r2, r2 - 803b626: 819a strh r2, [r3, #12] + 803b690: 4b10 ldr r3, [pc, #64] ; (803b6d4 ) + 803b692: 68db ldr r3, [r3, #12] + 803b694: 899b ldrh r3, [r3, #12] + 803b696: b29c uxth r4, r3 + 803b698: 2001 movs r0, #1 + 803b69a: f7fa fc5f bl 8035f5c + 803b69e: 4603 mov r3, r0 + 803b6a0: 461a mov r2, r3 + 803b6a2: 4b0c ldr r3, [pc, #48] ; (803b6d4 ) + 803b6a4: 68db ldr r3, [r3, #12] + 803b6a6: 4322 orrs r2, r4 + 803b6a8: b292 uxth r2, r2 + 803b6aa: 819a strh r2, [r3, #12] tcplen = TCP_TCPLEN(&inseg); - 803b628: 4b09 ldr r3, [pc, #36] ; (803b650 ) - 803b62a: 891c ldrh r4, [r3, #8] - 803b62c: 4b08 ldr r3, [pc, #32] ; (803b650 ) - 803b62e: 68db ldr r3, [r3, #12] - 803b630: 899b ldrh r3, [r3, #12] - 803b632: b29b uxth r3, r3 - 803b634: 4618 mov r0, r3 - 803b636: f7fa fc4f bl 8035ed8 - 803b63a: 4603 mov r3, r0 - 803b63c: b2db uxtb r3, r3 - 803b63e: f003 0303 and.w r3, r3, #3 - 803b642: 2b00 cmp r3, #0 - 803b644: d00e beq.n 803b664 - 803b646: 2301 movs r3, #1 - 803b648: e00d b.n 803b666 - 803b64a: bf00 nop - 803b64c: 2400e990 .word 0x2400e990 - 803b650: 2400e970 .word 0x2400e970 - 803b654: 2400e99a .word 0x2400e99a - 803b658: 08043500 .word 0x08043500 - 803b65c: 080438a8 .word 0x080438a8 - 803b660: 0804354c .word 0x0804354c - 803b664: 2300 movs r3, #0 - 803b666: 4423 add r3, r4 - 803b668: b29a uxth r2, r3 - 803b66a: 4b98 ldr r3, [pc, #608] ; (803b8cc ) - 803b66c: 801a strh r2, [r3, #0] + 803b6ac: 4b09 ldr r3, [pc, #36] ; (803b6d4 ) + 803b6ae: 891c ldrh r4, [r3, #8] + 803b6b0: 4b08 ldr r3, [pc, #32] ; (803b6d4 ) + 803b6b2: 68db ldr r3, [r3, #12] + 803b6b4: 899b ldrh r3, [r3, #12] + 803b6b6: b29b uxth r3, r3 + 803b6b8: 4618 mov r0, r3 + 803b6ba: f7fa fc4f bl 8035f5c + 803b6be: 4603 mov r3, r0 + 803b6c0: b2db uxtb r3, r3 + 803b6c2: f003 0303 and.w r3, r3, #3 + 803b6c6: 2b00 cmp r3, #0 + 803b6c8: d00e beq.n 803b6e8 + 803b6ca: 2301 movs r3, #1 + 803b6cc: e00d b.n 803b6ea + 803b6ce: bf00 nop + 803b6d0: 2400e998 .word 0x2400e998 + 803b6d4: 2400e978 .word 0x2400e978 + 803b6d8: 2400e9a2 .word 0x2400e9a2 + 803b6dc: 08043580 .word 0x08043580 + 803b6e0: 08043928 .word 0x08043928 + 803b6e4: 080435cc .word 0x080435cc + 803b6e8: 2300 movs r3, #0 + 803b6ea: 4423 add r3, r4 + 803b6ec: b29a uxth r2, r3 + 803b6ee: 4b98 ldr r3, [pc, #608] ; (803b950 ) + 803b6f0: 801a strh r2, [r3, #0] } tmp = next; - 803b66e: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b670: 613b str r3, [r7, #16] + 803b6f2: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b6f4: 613b str r3, [r7, #16] next = next->next; - 803b672: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b674: 681b ldr r3, [r3, #0] - 803b676: 63fb str r3, [r7, #60] ; 0x3c + 803b6f6: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b6f8: 681b ldr r3, [r3, #0] + 803b6fa: 63fb str r3, [r7, #60] ; 0x3c tcp_seg_free(tmp); - 803b678: 6938 ldr r0, [r7, #16] - 803b67a: f7fd fc8c bl 8038f96 + 803b6fc: 6938 ldr r0, [r7, #16] + 803b6fe: f7fd fc8c bl 803901a while (next && - 803b67e: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b680: 2b00 cmp r3, #0 - 803b682: d00e beq.n 803b6a2 + 803b702: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b704: 2b00 cmp r3, #0 + 803b706: d00e beq.n 803b726 TCP_SEQ_GEQ(seqno + tcplen, - 803b684: 4b91 ldr r3, [pc, #580] ; (803b8cc ) - 803b686: 881b ldrh r3, [r3, #0] - 803b688: 461a mov r2, r3 - 803b68a: 4b91 ldr r3, [pc, #580] ; (803b8d0 ) - 803b68c: 681b ldr r3, [r3, #0] - 803b68e: 441a add r2, r3 - 803b690: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b692: 68db ldr r3, [r3, #12] - 803b694: 685b ldr r3, [r3, #4] - 803b696: 6bf9 ldr r1, [r7, #60] ; 0x3c - 803b698: 8909 ldrh r1, [r1, #8] - 803b69a: 440b add r3, r1 - 803b69c: 1ad3 subs r3, r2, r3 + 803b708: 4b91 ldr r3, [pc, #580] ; (803b950 ) + 803b70a: 881b ldrh r3, [r3, #0] + 803b70c: 461a mov r2, r3 + 803b70e: 4b91 ldr r3, [pc, #580] ; (803b954 ) + 803b710: 681b ldr r3, [r3, #0] + 803b712: 441a add r2, r3 + 803b714: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b716: 68db ldr r3, [r3, #12] + 803b718: 685b ldr r3, [r3, #4] + 803b71a: 6bf9 ldr r1, [r7, #60] ; 0x3c + 803b71c: 8909 ldrh r1, [r1, #8] + 803b71e: 440b add r3, r1 + 803b720: 1ad3 subs r3, r2, r3 while (next && - 803b69e: 2b00 cmp r3, #0 - 803b6a0: da9a bge.n 803b5d8 + 803b722: 2b00 cmp r3, #0 + 803b724: da9a bge.n 803b65c } /* Now trim right side of inseg if it overlaps with the first * segment on ooseq */ if (next && - 803b6a2: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b6a4: 2b00 cmp r3, #0 - 803b6a6: d059 beq.n 803b75c + 803b726: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b728: 2b00 cmp r3, #0 + 803b72a: d059 beq.n 803b7e0 TCP_SEQ_GT(seqno + tcplen, - 803b6a8: 4b88 ldr r3, [pc, #544] ; (803b8cc ) - 803b6aa: 881b ldrh r3, [r3, #0] - 803b6ac: 461a mov r2, r3 - 803b6ae: 4b88 ldr r3, [pc, #544] ; (803b8d0 ) - 803b6b0: 681b ldr r3, [r3, #0] - 803b6b2: 441a add r2, r3 - 803b6b4: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b6b6: 68db ldr r3, [r3, #12] - 803b6b8: 685b ldr r3, [r3, #4] - 803b6ba: 1ad3 subs r3, r2, r3 + 803b72c: 4b88 ldr r3, [pc, #544] ; (803b950 ) + 803b72e: 881b ldrh r3, [r3, #0] + 803b730: 461a mov r2, r3 + 803b732: 4b88 ldr r3, [pc, #544] ; (803b954 ) + 803b734: 681b ldr r3, [r3, #0] + 803b736: 441a add r2, r3 + 803b738: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b73a: 68db ldr r3, [r3, #12] + 803b73c: 685b ldr r3, [r3, #4] + 803b73e: 1ad3 subs r3, r2, r3 if (next && - 803b6bc: 2b00 cmp r3, #0 - 803b6be: dd4d ble.n 803b75c + 803b740: 2b00 cmp r3, #0 + 803b742: dd4d ble.n 803b7e0 next->tcphdr->seqno)) { /* inseg cannot have FIN here (already processed above) */ inseg.len = (u16_t)(next->tcphdr->seqno - seqno); - 803b6c0: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b6c2: 68db ldr r3, [r3, #12] - 803b6c4: 685b ldr r3, [r3, #4] - 803b6c6: b29a uxth r2, r3 - 803b6c8: 4b81 ldr r3, [pc, #516] ; (803b8d0 ) - 803b6ca: 681b ldr r3, [r3, #0] - 803b6cc: b29b uxth r3, r3 - 803b6ce: 1ad3 subs r3, r2, r3 - 803b6d0: b29a uxth r2, r3 - 803b6d2: 4b80 ldr r3, [pc, #512] ; (803b8d4 ) - 803b6d4: 811a strh r2, [r3, #8] + 803b744: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b746: 68db ldr r3, [r3, #12] + 803b748: 685b ldr r3, [r3, #4] + 803b74a: b29a uxth r2, r3 + 803b74c: 4b81 ldr r3, [pc, #516] ; (803b954 ) + 803b74e: 681b ldr r3, [r3, #0] + 803b750: b29b uxth r3, r3 + 803b752: 1ad3 subs r3, r2, r3 + 803b754: b29a uxth r2, r3 + 803b756: 4b80 ldr r3, [pc, #512] ; (803b958 ) + 803b758: 811a strh r2, [r3, #8] if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { - 803b6d6: 4b7f ldr r3, [pc, #508] ; (803b8d4 ) - 803b6d8: 68db ldr r3, [r3, #12] - 803b6da: 899b ldrh r3, [r3, #12] - 803b6dc: b29b uxth r3, r3 - 803b6de: 4618 mov r0, r3 - 803b6e0: f7fa fbfa bl 8035ed8 - 803b6e4: 4603 mov r3, r0 - 803b6e6: b2db uxtb r3, r3 - 803b6e8: f003 0302 and.w r3, r3, #2 - 803b6ec: 2b00 cmp r3, #0 - 803b6ee: d005 beq.n 803b6fc + 803b75a: 4b7f ldr r3, [pc, #508] ; (803b958 ) + 803b75c: 68db ldr r3, [r3, #12] + 803b75e: 899b ldrh r3, [r3, #12] + 803b760: b29b uxth r3, r3 + 803b762: 4618 mov r0, r3 + 803b764: f7fa fbfa bl 8035f5c + 803b768: 4603 mov r3, r0 + 803b76a: b2db uxtb r3, r3 + 803b76c: f003 0302 and.w r3, r3, #2 + 803b770: 2b00 cmp r3, #0 + 803b772: d005 beq.n 803b780 inseg.len -= 1; - 803b6f0: 4b78 ldr r3, [pc, #480] ; (803b8d4 ) - 803b6f2: 891b ldrh r3, [r3, #8] - 803b6f4: 3b01 subs r3, #1 - 803b6f6: b29a uxth r2, r3 - 803b6f8: 4b76 ldr r3, [pc, #472] ; (803b8d4 ) - 803b6fa: 811a strh r2, [r3, #8] + 803b774: 4b78 ldr r3, [pc, #480] ; (803b958 ) + 803b776: 891b ldrh r3, [r3, #8] + 803b778: 3b01 subs r3, #1 + 803b77a: b29a uxth r2, r3 + 803b77c: 4b76 ldr r3, [pc, #472] ; (803b958 ) + 803b77e: 811a strh r2, [r3, #8] } pbuf_realloc(inseg.p, inseg.len); - 803b6fc: 4b75 ldr r3, [pc, #468] ; (803b8d4 ) - 803b6fe: 685b ldr r3, [r3, #4] - 803b700: 4a74 ldr r2, [pc, #464] ; (803b8d4 ) - 803b702: 8912 ldrh r2, [r2, #8] - 803b704: 4611 mov r1, r2 - 803b706: 4618 mov r0, r3 - 803b708: f7fb fe92 bl 8037430 + 803b780: 4b75 ldr r3, [pc, #468] ; (803b958 ) + 803b782: 685b ldr r3, [r3, #4] + 803b784: 4a74 ldr r2, [pc, #464] ; (803b958 ) + 803b786: 8912 ldrh r2, [r2, #8] + 803b788: 4611 mov r1, r2 + 803b78a: 4618 mov r0, r3 + 803b78c: f7fb fe92 bl 80374b4 tcplen = TCP_TCPLEN(&inseg); - 803b70c: 4b71 ldr r3, [pc, #452] ; (803b8d4 ) - 803b70e: 891c ldrh r4, [r3, #8] - 803b710: 4b70 ldr r3, [pc, #448] ; (803b8d4 ) - 803b712: 68db ldr r3, [r3, #12] - 803b714: 899b ldrh r3, [r3, #12] - 803b716: b29b uxth r3, r3 - 803b718: 4618 mov r0, r3 - 803b71a: f7fa fbdd bl 8035ed8 - 803b71e: 4603 mov r3, r0 - 803b720: b2db uxtb r3, r3 - 803b722: f003 0303 and.w r3, r3, #3 - 803b726: 2b00 cmp r3, #0 - 803b728: d001 beq.n 803b72e - 803b72a: 2301 movs r3, #1 - 803b72c: e000 b.n 803b730 - 803b72e: 2300 movs r3, #0 - 803b730: 4423 add r3, r4 - 803b732: b29a uxth r2, r3 - 803b734: 4b65 ldr r3, [pc, #404] ; (803b8cc ) - 803b736: 801a strh r2, [r3, #0] + 803b790: 4b71 ldr r3, [pc, #452] ; (803b958 ) + 803b792: 891c ldrh r4, [r3, #8] + 803b794: 4b70 ldr r3, [pc, #448] ; (803b958 ) + 803b796: 68db ldr r3, [r3, #12] + 803b798: 899b ldrh r3, [r3, #12] + 803b79a: b29b uxth r3, r3 + 803b79c: 4618 mov r0, r3 + 803b79e: f7fa fbdd bl 8035f5c + 803b7a2: 4603 mov r3, r0 + 803b7a4: b2db uxtb r3, r3 + 803b7a6: f003 0303 and.w r3, r3, #3 + 803b7aa: 2b00 cmp r3, #0 + 803b7ac: d001 beq.n 803b7b2 + 803b7ae: 2301 movs r3, #1 + 803b7b0: e000 b.n 803b7b4 + 803b7b2: 2300 movs r3, #0 + 803b7b4: 4423 add r3, r4 + 803b7b6: b29a uxth r2, r3 + 803b7b8: 4b65 ldr r3, [pc, #404] ; (803b950 ) + 803b7ba: 801a strh r2, [r3, #0] LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n", - 803b738: 4b64 ldr r3, [pc, #400] ; (803b8cc ) - 803b73a: 881b ldrh r3, [r3, #0] - 803b73c: 461a mov r2, r3 - 803b73e: 4b64 ldr r3, [pc, #400] ; (803b8d0 ) - 803b740: 681b ldr r3, [r3, #0] - 803b742: 441a add r2, r3 - 803b744: 6bfb ldr r3, [r7, #60] ; 0x3c - 803b746: 68db ldr r3, [r3, #12] - 803b748: 685b ldr r3, [r3, #4] - 803b74a: 429a cmp r2, r3 - 803b74c: d006 beq.n 803b75c - 803b74e: 4b62 ldr r3, [pc, #392] ; (803b8d8 ) - 803b750: f240 52fc movw r2, #1532 ; 0x5fc - 803b754: 4961 ldr r1, [pc, #388] ; (803b8dc ) - 803b756: 4862 ldr r0, [pc, #392] ; (803b8e0 ) - 803b758: f005 f9da bl 8040b10 + 803b7bc: 4b64 ldr r3, [pc, #400] ; (803b950 ) + 803b7be: 881b ldrh r3, [r3, #0] + 803b7c0: 461a mov r2, r3 + 803b7c2: 4b64 ldr r3, [pc, #400] ; (803b954 ) + 803b7c4: 681b ldr r3, [r3, #0] + 803b7c6: 441a add r2, r3 + 803b7c8: 6bfb ldr r3, [r7, #60] ; 0x3c + 803b7ca: 68db ldr r3, [r3, #12] + 803b7cc: 685b ldr r3, [r3, #4] + 803b7ce: 429a cmp r2, r3 + 803b7d0: d006 beq.n 803b7e0 + 803b7d2: 4b62 ldr r3, [pc, #392] ; (803b95c ) + 803b7d4: f240 52fc movw r2, #1532 ; 0x5fc + 803b7d8: 4961 ldr r1, [pc, #388] ; (803b960 ) + 803b7da: 4862 ldr r0, [pc, #392] ; (803b964 ) + 803b7dc: f005 f9da bl 8040b94 (seqno + tcplen) == next->tcphdr->seqno); } pcb->ooseq = next; - 803b75c: 687b ldr r3, [r7, #4] - 803b75e: 6bfa ldr r2, [r7, #60] ; 0x3c - 803b760: 675a str r2, [r3, #116] ; 0x74 + 803b7e0: 687b ldr r3, [r7, #4] + 803b7e2: 6bfa ldr r2, [r7, #60] ; 0x3c + 803b7e4: 675a str r2, [r3, #116] ; 0x74 } } #endif /* TCP_QUEUE_OOSEQ */ pcb->rcv_nxt = seqno + tcplen; - 803b762: 4b5a ldr r3, [pc, #360] ; (803b8cc ) - 803b764: 881b ldrh r3, [r3, #0] - 803b766: 461a mov r2, r3 - 803b768: 4b59 ldr r3, [pc, #356] ; (803b8d0 ) - 803b76a: 681b ldr r3, [r3, #0] - 803b76c: 441a add r2, r3 - 803b76e: 687b ldr r3, [r7, #4] - 803b770: 625a str r2, [r3, #36] ; 0x24 + 803b7e6: 4b5a ldr r3, [pc, #360] ; (803b950 ) + 803b7e8: 881b ldrh r3, [r3, #0] + 803b7ea: 461a mov r2, r3 + 803b7ec: 4b59 ldr r3, [pc, #356] ; (803b954 ) + 803b7ee: 681b ldr r3, [r3, #0] + 803b7f0: 441a add r2, r3 + 803b7f2: 687b ldr r3, [r7, #4] + 803b7f4: 625a str r2, [r3, #36] ; 0x24 /* Update the receiver's (our) window. */ LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen); - 803b772: 687b ldr r3, [r7, #4] - 803b774: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b776: 4b55 ldr r3, [pc, #340] ; (803b8cc ) - 803b778: 881b ldrh r3, [r3, #0] - 803b77a: 429a cmp r2, r3 - 803b77c: d206 bcs.n 803b78c - 803b77e: 4b56 ldr r3, [pc, #344] ; (803b8d8 ) - 803b780: f240 6207 movw r2, #1543 ; 0x607 - 803b784: 4957 ldr r1, [pc, #348] ; (803b8e4 ) - 803b786: 4856 ldr r0, [pc, #344] ; (803b8e0 ) - 803b788: f005 f9c2 bl 8040b10 + 803b7f6: 687b ldr r3, [r7, #4] + 803b7f8: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b7fa: 4b55 ldr r3, [pc, #340] ; (803b950 ) + 803b7fc: 881b ldrh r3, [r3, #0] + 803b7fe: 429a cmp r2, r3 + 803b800: d206 bcs.n 803b810 + 803b802: 4b56 ldr r3, [pc, #344] ; (803b95c ) + 803b804: f240 6207 movw r2, #1543 ; 0x607 + 803b808: 4957 ldr r1, [pc, #348] ; (803b968 ) + 803b80a: 4856 ldr r0, [pc, #344] ; (803b964 ) + 803b80c: f005 f9c2 bl 8040b94 pcb->rcv_wnd -= tcplen; - 803b78c: 687b ldr r3, [r7, #4] - 803b78e: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b790: 4b4e ldr r3, [pc, #312] ; (803b8cc ) - 803b792: 881b ldrh r3, [r3, #0] - 803b794: 1ad3 subs r3, r2, r3 - 803b796: b29a uxth r2, r3 - 803b798: 687b ldr r3, [r7, #4] - 803b79a: 851a strh r2, [r3, #40] ; 0x28 + 803b810: 687b ldr r3, [r7, #4] + 803b812: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b814: 4b4e ldr r3, [pc, #312] ; (803b950 ) + 803b816: 881b ldrh r3, [r3, #0] + 803b818: 1ad3 subs r3, r2, r3 + 803b81a: b29a uxth r2, r3 + 803b81c: 687b ldr r3, [r7, #4] + 803b81e: 851a strh r2, [r3, #40] ; 0x28 tcp_update_rcv_ann_wnd(pcb); - 803b79c: 6878 ldr r0, [r7, #4] - 803b79e: f7fc fed5 bl 803854c + 803b820: 6878 ldr r0, [r7, #4] + 803b822: f7fc fed5 bl 80385d0 chains its data on this pbuf as well. If the segment was a FIN, we set the TF_GOT_FIN flag that will be used to indicate to the application that the remote side has closed its end of the connection. */ if (inseg.p->tot_len > 0) { - 803b7a2: 4b4c ldr r3, [pc, #304] ; (803b8d4 ) - 803b7a4: 685b ldr r3, [r3, #4] - 803b7a6: 891b ldrh r3, [r3, #8] - 803b7a8: 2b00 cmp r3, #0 - 803b7aa: d006 beq.n 803b7ba + 803b826: 4b4c ldr r3, [pc, #304] ; (803b958 ) + 803b828: 685b ldr r3, [r3, #4] + 803b82a: 891b ldrh r3, [r3, #8] + 803b82c: 2b00 cmp r3, #0 + 803b82e: d006 beq.n 803b83e recv_data = inseg.p; - 803b7ac: 4b49 ldr r3, [pc, #292] ; (803b8d4 ) - 803b7ae: 685b ldr r3, [r3, #4] - 803b7b0: 4a4d ldr r2, [pc, #308] ; (803b8e8 ) - 803b7b2: 6013 str r3, [r2, #0] + 803b830: 4b49 ldr r3, [pc, #292] ; (803b958 ) + 803b832: 685b ldr r3, [r3, #4] + 803b834: 4a4d ldr r2, [pc, #308] ; (803b96c ) + 803b836: 6013 str r3, [r2, #0] /* Since this pbuf now is the responsibility of the application, we delete our reference to it so that we won't (mistakingly) deallocate it. */ inseg.p = NULL; - 803b7b4: 4b47 ldr r3, [pc, #284] ; (803b8d4 ) - 803b7b6: 2200 movs r2, #0 - 803b7b8: 605a str r2, [r3, #4] + 803b838: 4b47 ldr r3, [pc, #284] ; (803b958 ) + 803b83a: 2200 movs r2, #0 + 803b83c: 605a str r2, [r3, #4] } if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { - 803b7ba: 4b46 ldr r3, [pc, #280] ; (803b8d4 ) - 803b7bc: 68db ldr r3, [r3, #12] - 803b7be: 899b ldrh r3, [r3, #12] - 803b7c0: b29b uxth r3, r3 - 803b7c2: 4618 mov r0, r3 - 803b7c4: f7fa fb88 bl 8035ed8 - 803b7c8: 4603 mov r3, r0 - 803b7ca: b2db uxtb r3, r3 - 803b7cc: f003 0301 and.w r3, r3, #1 - 803b7d0: 2b00 cmp r3, #0 - 803b7d2: f000 80b8 beq.w 803b946 + 803b83e: 4b46 ldr r3, [pc, #280] ; (803b958 ) + 803b840: 68db ldr r3, [r3, #12] + 803b842: 899b ldrh r3, [r3, #12] + 803b844: b29b uxth r3, r3 + 803b846: 4618 mov r0, r3 + 803b848: f7fa fb88 bl 8035f5c + 803b84c: 4603 mov r3, r0 + 803b84e: b2db uxtb r3, r3 + 803b850: f003 0301 and.w r3, r3, #1 + 803b854: 2b00 cmp r3, #0 + 803b856: f000 80b8 beq.w 803b9ca LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n")); recv_flags |= TF_GOT_FIN; - 803b7d6: 4b45 ldr r3, [pc, #276] ; (803b8ec ) - 803b7d8: 781b ldrb r3, [r3, #0] - 803b7da: f043 0320 orr.w r3, r3, #32 - 803b7de: b2da uxtb r2, r3 - 803b7e0: 4b42 ldr r3, [pc, #264] ; (803b8ec ) - 803b7e2: 701a strb r2, [r3, #0] + 803b85a: 4b45 ldr r3, [pc, #276] ; (803b970 ) + 803b85c: 781b ldrb r3, [r3, #0] + 803b85e: f043 0320 orr.w r3, r3, #32 + 803b862: b2da uxtb r2, r3 + 803b864: 4b42 ldr r3, [pc, #264] ; (803b970 ) + 803b866: 701a strb r2, [r3, #0] } #if TCP_QUEUE_OOSEQ /* We now check if we have segments on the ->ooseq queue that are now in sequence. */ while (pcb->ooseq != NULL && - 803b7e4: e0af b.n 803b946 + 803b868: e0af b.n 803b9ca pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) { struct tcp_seg *cseg = pcb->ooseq; - 803b7e6: 687b ldr r3, [r7, #4] - 803b7e8: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b7ea: 60bb str r3, [r7, #8] + 803b86a: 687b ldr r3, [r7, #4] + 803b86c: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b86e: 60bb str r3, [r7, #8] seqno = pcb->ooseq->tcphdr->seqno; - 803b7ec: 687b ldr r3, [r7, #4] - 803b7ee: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b7f0: 68db ldr r3, [r3, #12] - 803b7f2: 685b ldr r3, [r3, #4] - 803b7f4: 4a36 ldr r2, [pc, #216] ; (803b8d0 ) - 803b7f6: 6013 str r3, [r2, #0] + 803b870: 687b ldr r3, [r7, #4] + 803b872: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b874: 68db ldr r3, [r3, #12] + 803b876: 685b ldr r3, [r3, #4] + 803b878: 4a36 ldr r2, [pc, #216] ; (803b954 ) + 803b87a: 6013 str r3, [r2, #0] pcb->rcv_nxt += TCP_TCPLEN(cseg); - 803b7f8: 68bb ldr r3, [r7, #8] - 803b7fa: 891b ldrh r3, [r3, #8] - 803b7fc: 461c mov r4, r3 - 803b7fe: 68bb ldr r3, [r7, #8] - 803b800: 68db ldr r3, [r3, #12] - 803b802: 899b ldrh r3, [r3, #12] - 803b804: b29b uxth r3, r3 - 803b806: 4618 mov r0, r3 - 803b808: f7fa fb66 bl 8035ed8 - 803b80c: 4603 mov r3, r0 - 803b80e: b2db uxtb r3, r3 - 803b810: f003 0303 and.w r3, r3, #3 - 803b814: 2b00 cmp r3, #0 - 803b816: d001 beq.n 803b81c - 803b818: 2301 movs r3, #1 - 803b81a: e000 b.n 803b81e - 803b81c: 2300 movs r3, #0 - 803b81e: 191a adds r2, r3, r4 - 803b820: 687b ldr r3, [r7, #4] - 803b822: 6a5b ldr r3, [r3, #36] ; 0x24 - 803b824: 441a add r2, r3 - 803b826: 687b ldr r3, [r7, #4] - 803b828: 625a str r2, [r3, #36] ; 0x24 + 803b87c: 68bb ldr r3, [r7, #8] + 803b87e: 891b ldrh r3, [r3, #8] + 803b880: 461c mov r4, r3 + 803b882: 68bb ldr r3, [r7, #8] + 803b884: 68db ldr r3, [r3, #12] + 803b886: 899b ldrh r3, [r3, #12] + 803b888: b29b uxth r3, r3 + 803b88a: 4618 mov r0, r3 + 803b88c: f7fa fb66 bl 8035f5c + 803b890: 4603 mov r3, r0 + 803b892: b2db uxtb r3, r3 + 803b894: f003 0303 and.w r3, r3, #3 + 803b898: 2b00 cmp r3, #0 + 803b89a: d001 beq.n 803b8a0 + 803b89c: 2301 movs r3, #1 + 803b89e: e000 b.n 803b8a2 + 803b8a0: 2300 movs r3, #0 + 803b8a2: 191a adds r2, r3, r4 + 803b8a4: 687b ldr r3, [r7, #4] + 803b8a6: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b8a8: 441a add r2, r3 + 803b8aa: 687b ldr r3, [r7, #4] + 803b8ac: 625a str r2, [r3, #36] ; 0x24 LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n", - 803b82a: 687b ldr r3, [r7, #4] - 803b82c: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803b82e: 461c mov r4, r3 - 803b830: 68bb ldr r3, [r7, #8] - 803b832: 891b ldrh r3, [r3, #8] - 803b834: 461d mov r5, r3 - 803b836: 68bb ldr r3, [r7, #8] - 803b838: 68db ldr r3, [r3, #12] - 803b83a: 899b ldrh r3, [r3, #12] - 803b83c: b29b uxth r3, r3 - 803b83e: 4618 mov r0, r3 - 803b840: f7fa fb4a bl 8035ed8 - 803b844: 4603 mov r3, r0 - 803b846: b2db uxtb r3, r3 - 803b848: f003 0303 and.w r3, r3, #3 - 803b84c: 2b00 cmp r3, #0 - 803b84e: d001 beq.n 803b854 - 803b850: 2301 movs r3, #1 - 803b852: e000 b.n 803b856 - 803b854: 2300 movs r3, #0 - 803b856: 442b add r3, r5 - 803b858: 429c cmp r4, r3 - 803b85a: d206 bcs.n 803b86a - 803b85c: 4b1e ldr r3, [pc, #120] ; (803b8d8 ) - 803b85e: f240 622b movw r2, #1579 ; 0x62b - 803b862: 4923 ldr r1, [pc, #140] ; (803b8f0 ) - 803b864: 481e ldr r0, [pc, #120] ; (803b8e0 ) - 803b866: f005 f953 bl 8040b10 + 803b8ae: 687b ldr r3, [r7, #4] + 803b8b0: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803b8b2: 461c mov r4, r3 + 803b8b4: 68bb ldr r3, [r7, #8] + 803b8b6: 891b ldrh r3, [r3, #8] + 803b8b8: 461d mov r5, r3 + 803b8ba: 68bb ldr r3, [r7, #8] + 803b8bc: 68db ldr r3, [r3, #12] + 803b8be: 899b ldrh r3, [r3, #12] + 803b8c0: b29b uxth r3, r3 + 803b8c2: 4618 mov r0, r3 + 803b8c4: f7fa fb4a bl 8035f5c + 803b8c8: 4603 mov r3, r0 + 803b8ca: b2db uxtb r3, r3 + 803b8cc: f003 0303 and.w r3, r3, #3 + 803b8d0: 2b00 cmp r3, #0 + 803b8d2: d001 beq.n 803b8d8 + 803b8d4: 2301 movs r3, #1 + 803b8d6: e000 b.n 803b8da + 803b8d8: 2300 movs r3, #0 + 803b8da: 442b add r3, r5 + 803b8dc: 429c cmp r4, r3 + 803b8de: d206 bcs.n 803b8ee + 803b8e0: 4b1e ldr r3, [pc, #120] ; (803b95c ) + 803b8e2: f240 622b movw r2, #1579 ; 0x62b + 803b8e6: 4923 ldr r1, [pc, #140] ; (803b974 ) + 803b8e8: 481e ldr r0, [pc, #120] ; (803b964 ) + 803b8ea: f005 f953 bl 8040b94 pcb->rcv_wnd >= TCP_TCPLEN(cseg)); pcb->rcv_wnd -= TCP_TCPLEN(cseg); - 803b86a: 68bb ldr r3, [r7, #8] - 803b86c: 891b ldrh r3, [r3, #8] - 803b86e: 461c mov r4, r3 - 803b870: 68bb ldr r3, [r7, #8] - 803b872: 68db ldr r3, [r3, #12] - 803b874: 899b ldrh r3, [r3, #12] - 803b876: b29b uxth r3, r3 - 803b878: 4618 mov r0, r3 - 803b87a: f7fa fb2d bl 8035ed8 - 803b87e: 4603 mov r3, r0 - 803b880: b2db uxtb r3, r3 - 803b882: f003 0303 and.w r3, r3, #3 - 803b886: 2b00 cmp r3, #0 - 803b888: d001 beq.n 803b88e - 803b88a: 2301 movs r3, #1 - 803b88c: e000 b.n 803b890 - 803b88e: 2300 movs r3, #0 - 803b890: 1919 adds r1, r3, r4 - 803b892: 687b ldr r3, [r7, #4] - 803b894: 8d1a ldrh r2, [r3, #40] ; 0x28 - 803b896: b28b uxth r3, r1 - 803b898: 1ad3 subs r3, r2, r3 - 803b89a: b29a uxth r2, r3 - 803b89c: 687b ldr r3, [r7, #4] - 803b89e: 851a strh r2, [r3, #40] ; 0x28 + 803b8ee: 68bb ldr r3, [r7, #8] + 803b8f0: 891b ldrh r3, [r3, #8] + 803b8f2: 461c mov r4, r3 + 803b8f4: 68bb ldr r3, [r7, #8] + 803b8f6: 68db ldr r3, [r3, #12] + 803b8f8: 899b ldrh r3, [r3, #12] + 803b8fa: b29b uxth r3, r3 + 803b8fc: 4618 mov r0, r3 + 803b8fe: f7fa fb2d bl 8035f5c + 803b902: 4603 mov r3, r0 + 803b904: b2db uxtb r3, r3 + 803b906: f003 0303 and.w r3, r3, #3 + 803b90a: 2b00 cmp r3, #0 + 803b90c: d001 beq.n 803b912 + 803b90e: 2301 movs r3, #1 + 803b910: e000 b.n 803b914 + 803b912: 2300 movs r3, #0 + 803b914: 1919 adds r1, r3, r4 + 803b916: 687b ldr r3, [r7, #4] + 803b918: 8d1a ldrh r2, [r3, #40] ; 0x28 + 803b91a: b28b uxth r3, r1 + 803b91c: 1ad3 subs r3, r2, r3 + 803b91e: b29a uxth r2, r3 + 803b920: 687b ldr r3, [r7, #4] + 803b922: 851a strh r2, [r3, #40] ; 0x28 tcp_update_rcv_ann_wnd(pcb); - 803b8a0: 6878 ldr r0, [r7, #4] - 803b8a2: f7fc fe53 bl 803854c + 803b924: 6878 ldr r0, [r7, #4] + 803b926: f7fc fe53 bl 80385d0 if (cseg->p->tot_len > 0) { - 803b8a6: 68bb ldr r3, [r7, #8] - 803b8a8: 685b ldr r3, [r3, #4] - 803b8aa: 891b ldrh r3, [r3, #8] - 803b8ac: 2b00 cmp r3, #0 - 803b8ae: d028 beq.n 803b902 + 803b92a: 68bb ldr r3, [r7, #8] + 803b92c: 685b ldr r3, [r3, #4] + 803b92e: 891b ldrh r3, [r3, #8] + 803b930: 2b00 cmp r3, #0 + 803b932: d028 beq.n 803b986 /* Chain this pbuf onto the pbuf that we will pass to the application. */ /* With window scaling, this can overflow recv_data->tot_len, but that's not a problem since we explicitly fix that before passing recv_data to the application. */ if (recv_data) { - 803b8b0: 4b0d ldr r3, [pc, #52] ; (803b8e8 ) - 803b8b2: 681b ldr r3, [r3, #0] - 803b8b4: 2b00 cmp r3, #0 - 803b8b6: d01d beq.n 803b8f4 + 803b934: 4b0d ldr r3, [pc, #52] ; (803b96c ) + 803b936: 681b ldr r3, [r3, #0] + 803b938: 2b00 cmp r3, #0 + 803b93a: d01d beq.n 803b978 pbuf_cat(recv_data, cseg->p); - 803b8b8: 4b0b ldr r3, [pc, #44] ; (803b8e8 ) - 803b8ba: 681a ldr r2, [r3, #0] - 803b8bc: 68bb ldr r3, [r7, #8] - 803b8be: 685b ldr r3, [r3, #4] - 803b8c0: 4619 mov r1, r3 - 803b8c2: 4610 mov r0, r2 - 803b8c4: f7fb fffc bl 80378c0 - 803b8c8: e018 b.n 803b8fc - 803b8ca: bf00 nop - 803b8cc: 2400e99a .word 0x2400e99a - 803b8d0: 2400e990 .word 0x2400e990 - 803b8d4: 2400e970 .word 0x2400e970 - 803b8d8: 08043500 .word 0x08043500 - 803b8dc: 080438e0 .word 0x080438e0 - 803b8e0: 0804354c .word 0x0804354c - 803b8e4: 0804391c .word 0x0804391c - 803b8e8: 2400e9a0 .word 0x2400e9a0 - 803b8ec: 2400e99d .word 0x2400e99d - 803b8f0: 0804393c .word 0x0804393c + 803b93c: 4b0b ldr r3, [pc, #44] ; (803b96c ) + 803b93e: 681a ldr r2, [r3, #0] + 803b940: 68bb ldr r3, [r7, #8] + 803b942: 685b ldr r3, [r3, #4] + 803b944: 4619 mov r1, r3 + 803b946: 4610 mov r0, r2 + 803b948: f7fb fffc bl 8037944 + 803b94c: e018 b.n 803b980 + 803b94e: bf00 nop + 803b950: 2400e9a2 .word 0x2400e9a2 + 803b954: 2400e998 .word 0x2400e998 + 803b958: 2400e978 .word 0x2400e978 + 803b95c: 08043580 .word 0x08043580 + 803b960: 08043960 .word 0x08043960 + 803b964: 080435cc .word 0x080435cc + 803b968: 0804399c .word 0x0804399c + 803b96c: 2400e9a8 .word 0x2400e9a8 + 803b970: 2400e9a5 .word 0x2400e9a5 + 803b974: 080439bc .word 0x080439bc } else { recv_data = cseg->p; - 803b8f4: 68bb ldr r3, [r7, #8] - 803b8f6: 685b ldr r3, [r3, #4] - 803b8f8: 4a70 ldr r2, [pc, #448] ; (803babc ) - 803b8fa: 6013 str r3, [r2, #0] + 803b978: 68bb ldr r3, [r7, #8] + 803b97a: 685b ldr r3, [r3, #4] + 803b97c: 4a70 ldr r2, [pc, #448] ; (803bb40 ) + 803b97e: 6013 str r3, [r2, #0] } cseg->p = NULL; - 803b8fc: 68bb ldr r3, [r7, #8] - 803b8fe: 2200 movs r2, #0 - 803b900: 605a str r2, [r3, #4] + 803b980: 68bb ldr r3, [r7, #8] + 803b982: 2200 movs r2, #0 + 803b984: 605a str r2, [r3, #4] } if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { - 803b902: 68bb ldr r3, [r7, #8] - 803b904: 68db ldr r3, [r3, #12] - 803b906: 899b ldrh r3, [r3, #12] - 803b908: b29b uxth r3, r3 - 803b90a: 4618 mov r0, r3 - 803b90c: f7fa fae4 bl 8035ed8 - 803b910: 4603 mov r3, r0 - 803b912: b2db uxtb r3, r3 - 803b914: f003 0301 and.w r3, r3, #1 - 803b918: 2b00 cmp r3, #0 - 803b91a: d00d beq.n 803b938 + 803b986: 68bb ldr r3, [r7, #8] + 803b988: 68db ldr r3, [r3, #12] + 803b98a: 899b ldrh r3, [r3, #12] + 803b98c: b29b uxth r3, r3 + 803b98e: 4618 mov r0, r3 + 803b990: f7fa fae4 bl 8035f5c + 803b994: 4603 mov r3, r0 + 803b996: b2db uxtb r3, r3 + 803b998: f003 0301 and.w r3, r3, #1 + 803b99c: 2b00 cmp r3, #0 + 803b99e: d00d beq.n 803b9bc LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n")); recv_flags |= TF_GOT_FIN; - 803b91c: 4b68 ldr r3, [pc, #416] ; (803bac0 ) - 803b91e: 781b ldrb r3, [r3, #0] - 803b920: f043 0320 orr.w r3, r3, #32 - 803b924: b2da uxtb r2, r3 - 803b926: 4b66 ldr r3, [pc, #408] ; (803bac0 ) - 803b928: 701a strb r2, [r3, #0] + 803b9a0: 4b68 ldr r3, [pc, #416] ; (803bb44 ) + 803b9a2: 781b ldrb r3, [r3, #0] + 803b9a4: f043 0320 orr.w r3, r3, #32 + 803b9a8: b2da uxtb r2, r3 + 803b9aa: 4b66 ldr r3, [pc, #408] ; (803bb44 ) + 803b9ac: 701a strb r2, [r3, #0] if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */ - 803b92a: 687b ldr r3, [r7, #4] - 803b92c: 7d1b ldrb r3, [r3, #20] - 803b92e: 2b04 cmp r3, #4 - 803b930: d102 bne.n 803b938 + 803b9ae: 687b ldr r3, [r7, #4] + 803b9b0: 7d1b ldrb r3, [r3, #20] + 803b9b2: 2b04 cmp r3, #4 + 803b9b4: d102 bne.n 803b9bc pcb->state = CLOSE_WAIT; - 803b932: 687b ldr r3, [r7, #4] - 803b934: 2207 movs r2, #7 - 803b936: 751a strb r2, [r3, #20] + 803b9b6: 687b ldr r3, [r7, #4] + 803b9b8: 2207 movs r2, #7 + 803b9ba: 751a strb r2, [r3, #20] } } pcb->ooseq = cseg->next; - 803b938: 68bb ldr r3, [r7, #8] - 803b93a: 681a ldr r2, [r3, #0] - 803b93c: 687b ldr r3, [r7, #4] - 803b93e: 675a str r2, [r3, #116] ; 0x74 + 803b9bc: 68bb ldr r3, [r7, #8] + 803b9be: 681a ldr r2, [r3, #0] + 803b9c0: 687b ldr r3, [r7, #4] + 803b9c2: 675a str r2, [r3, #116] ; 0x74 tcp_seg_free(cseg); - 803b940: 68b8 ldr r0, [r7, #8] - 803b942: f7fd fb28 bl 8038f96 + 803b9c4: 68b8 ldr r0, [r7, #8] + 803b9c6: f7fd fb28 bl 803901a while (pcb->ooseq != NULL && - 803b946: 687b ldr r3, [r7, #4] - 803b948: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b94a: 2b00 cmp r3, #0 - 803b94c: d008 beq.n 803b960 + 803b9ca: 687b ldr r3, [r7, #4] + 803b9cc: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b9ce: 2b00 cmp r3, #0 + 803b9d0: d008 beq.n 803b9e4 pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) { - 803b94e: 687b ldr r3, [r7, #4] - 803b950: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b952: 68db ldr r3, [r3, #12] - 803b954: 685a ldr r2, [r3, #4] - 803b956: 687b ldr r3, [r7, #4] - 803b958: 6a5b ldr r3, [r3, #36] ; 0x24 + 803b9d2: 687b ldr r3, [r7, #4] + 803b9d4: 6f5b ldr r3, [r3, #116] ; 0x74 + 803b9d6: 68db ldr r3, [r3, #12] + 803b9d8: 685a ldr r2, [r3, #4] + 803b9da: 687b ldr r3, [r7, #4] + 803b9dc: 6a5b ldr r3, [r3, #36] ; 0x24 while (pcb->ooseq != NULL && - 803b95a: 429a cmp r2, r3 - 803b95c: f43f af43 beq.w 803b7e6 + 803b9de: 429a cmp r2, r3 + 803b9e0: f43f af43 beq.w 803b86a #endif /* LWIP_TCP_SACK_OUT */ #endif /* TCP_QUEUE_OOSEQ */ /* Acknowledge the segment(s). */ tcp_ack(pcb); - 803b960: 687b ldr r3, [r7, #4] - 803b962: 8b5b ldrh r3, [r3, #26] - 803b964: f003 0301 and.w r3, r3, #1 - 803b968: 2b00 cmp r3, #0 - 803b96a: d00e beq.n 803b98a - 803b96c: 687b ldr r3, [r7, #4] - 803b96e: 8b5b ldrh r3, [r3, #26] - 803b970: f023 0301 bic.w r3, r3, #1 - 803b974: b29a uxth r2, r3 - 803b976: 687b ldr r3, [r7, #4] - 803b978: 835a strh r2, [r3, #26] - 803b97a: 687b ldr r3, [r7, #4] - 803b97c: 8b5b ldrh r3, [r3, #26] - 803b97e: f043 0302 orr.w r3, r3, #2 - 803b982: b29a uxth r2, r3 - 803b984: 687b ldr r3, [r7, #4] - 803b986: 835a strh r2, [r3, #26] + 803b9e4: 687b ldr r3, [r7, #4] + 803b9e6: 8b5b ldrh r3, [r3, #26] + 803b9e8: f003 0301 and.w r3, r3, #1 + 803b9ec: 2b00 cmp r3, #0 + 803b9ee: d00e beq.n 803ba0e + 803b9f0: 687b ldr r3, [r7, #4] + 803b9f2: 8b5b ldrh r3, [r3, #26] + 803b9f4: f023 0301 bic.w r3, r3, #1 + 803b9f8: b29a uxth r2, r3 + 803b9fa: 687b ldr r3, [r7, #4] + 803b9fc: 835a strh r2, [r3, #26] + 803b9fe: 687b ldr r3, [r7, #4] + 803ba00: 8b5b ldrh r3, [r3, #26] + 803ba02: f043 0302 orr.w r3, r3, #2 + 803ba06: b29a uxth r2, r3 + 803ba08: 687b ldr r3, [r7, #4] + 803ba0a: 835a strh r2, [r3, #26] if (pcb->rcv_nxt == seqno) { - 803b988: e188 b.n 803bc9c + 803ba0c: e188 b.n 803bd20 tcp_ack(pcb); - 803b98a: 687b ldr r3, [r7, #4] - 803b98c: 8b5b ldrh r3, [r3, #26] - 803b98e: f043 0301 orr.w r3, r3, #1 - 803b992: b29a uxth r2, r3 - 803b994: 687b ldr r3, [r7, #4] - 803b996: 835a strh r2, [r3, #26] + 803ba0e: 687b ldr r3, [r7, #4] + 803ba10: 8b5b ldrh r3, [r3, #26] + 803ba12: f043 0301 orr.w r3, r3, #1 + 803ba16: b29a uxth r2, r3 + 803ba18: 687b ldr r3, [r7, #4] + 803ba1a: 835a strh r2, [r3, #26] if (pcb->rcv_nxt == seqno) { - 803b998: e180 b.n 803bc9c + 803ba1c: e180 b.n 803bd20 } else { /* We get here if the incoming segment is out-of-sequence. */ #if TCP_QUEUE_OOSEQ /* We queue the segment on the ->ooseq queue. */ if (pcb->ooseq == NULL) { - 803b99a: 687b ldr r3, [r7, #4] - 803b99c: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b99e: 2b00 cmp r3, #0 - 803b9a0: d106 bne.n 803b9b0 + 803ba1e: 687b ldr r3, [r7, #4] + 803ba20: 6f5b ldr r3, [r3, #116] ; 0x74 + 803ba22: 2b00 cmp r3, #0 + 803ba24: d106 bne.n 803ba34 pcb->ooseq = tcp_seg_copy(&inseg); - 803b9a2: 4848 ldr r0, [pc, #288] ; (803bac4 ) - 803b9a4: f7fd fb2e bl 8039004 - 803b9a8: 4602 mov r2, r0 - 803b9aa: 687b ldr r3, [r7, #4] - 803b9ac: 675a str r2, [r3, #116] ; 0x74 - 803b9ae: e16d b.n 803bc8c + 803ba26: 4848 ldr r0, [pc, #288] ; (803bb48 ) + 803ba28: f7fd fb2e bl 8039088 + 803ba2c: 4602 mov r2, r0 + 803ba2e: 687b ldr r3, [r7, #4] + 803ba30: 675a str r2, [r3, #116] ; 0x74 + 803ba32: e16d b.n 803bd10 #if LWIP_TCP_SACK_OUT /* This is the left edge of the lowest possible SACK range. It may start before the newly received segment (possibly adjusted below). */ u32_t sackbeg = TCP_SEQ_LT(seqno, pcb->ooseq->tcphdr->seqno) ? seqno : pcb->ooseq->tcphdr->seqno; #endif /* LWIP_TCP_SACK_OUT */ struct tcp_seg *next, *prev = NULL; - 803b9b0: 2300 movs r3, #0 - 803b9b2: 637b str r3, [r7, #52] ; 0x34 + 803ba34: 2300 movs r3, #0 + 803ba36: 637b str r3, [r7, #52] ; 0x34 for (next = pcb->ooseq; next != NULL; next = next->next) { - 803b9b4: 687b ldr r3, [r7, #4] - 803b9b6: 6f5b ldr r3, [r3, #116] ; 0x74 - 803b9b8: 63bb str r3, [r7, #56] ; 0x38 - 803b9ba: e157 b.n 803bc6c + 803ba38: 687b ldr r3, [r7, #4] + 803ba3a: 6f5b ldr r3, [r3, #116] ; 0x74 + 803ba3c: 63bb str r3, [r7, #56] ; 0x38 + 803ba3e: e157 b.n 803bcf0 if (seqno == next->tcphdr->seqno) { - 803b9bc: 6bbb ldr r3, [r7, #56] ; 0x38 - 803b9be: 68db ldr r3, [r3, #12] - 803b9c0: 685a ldr r2, [r3, #4] - 803b9c2: 4b41 ldr r3, [pc, #260] ; (803bac8 ) - 803b9c4: 681b ldr r3, [r3, #0] - 803b9c6: 429a cmp r2, r3 - 803b9c8: d11d bne.n 803ba06 + 803ba40: 6bbb ldr r3, [r7, #56] ; 0x38 + 803ba42: 68db ldr r3, [r3, #12] + 803ba44: 685a ldr r2, [r3, #4] + 803ba46: 4b41 ldr r3, [pc, #260] ; (803bb4c ) + 803ba48: 681b ldr r3, [r3, #0] + 803ba4a: 429a cmp r2, r3 + 803ba4c: d11d bne.n 803ba8a /* The sequence number of the incoming segment is the same as the sequence number of the segment on ->ooseq. We check the lengths to see which one to discard. */ if (inseg.len > next->len) { - 803b9ca: 4b3e ldr r3, [pc, #248] ; (803bac4 ) - 803b9cc: 891a ldrh r2, [r3, #8] - 803b9ce: 6bbb ldr r3, [r7, #56] ; 0x38 - 803b9d0: 891b ldrh r3, [r3, #8] - 803b9d2: 429a cmp r2, r3 - 803b9d4: f240 814f bls.w 803bc76 + 803ba4e: 4b3e ldr r3, [pc, #248] ; (803bb48 ) + 803ba50: 891a ldrh r2, [r3, #8] + 803ba52: 6bbb ldr r3, [r7, #56] ; 0x38 + 803ba54: 891b ldrh r3, [r3, #8] + 803ba56: 429a cmp r2, r3 + 803ba58: f240 814f bls.w 803bcfa /* The incoming segment is larger than the old segment. We replace some segments with the new one. */ struct tcp_seg *cseg = tcp_seg_copy(&inseg); - 803b9d8: 483a ldr r0, [pc, #232] ; (803bac4 ) - 803b9da: f7fd fb13 bl 8039004 - 803b9de: 6178 str r0, [r7, #20] + 803ba5c: 483a ldr r0, [pc, #232] ; (803bb48 ) + 803ba5e: f7fd fb13 bl 8039088 + 803ba62: 6178 str r0, [r7, #20] if (cseg != NULL) { - 803b9e0: 697b ldr r3, [r7, #20] - 803b9e2: 2b00 cmp r3, #0 - 803b9e4: f000 8149 beq.w 803bc7a + 803ba64: 697b ldr r3, [r7, #20] + 803ba66: 2b00 cmp r3, #0 + 803ba68: f000 8149 beq.w 803bcfe if (prev != NULL) { - 803b9e8: 6b7b ldr r3, [r7, #52] ; 0x34 - 803b9ea: 2b00 cmp r3, #0 - 803b9ec: d003 beq.n 803b9f6 + 803ba6c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803ba6e: 2b00 cmp r3, #0 + 803ba70: d003 beq.n 803ba7a prev->next = cseg; - 803b9ee: 6b7b ldr r3, [r7, #52] ; 0x34 - 803b9f0: 697a ldr r2, [r7, #20] - 803b9f2: 601a str r2, [r3, #0] - 803b9f4: e002 b.n 803b9fc + 803ba72: 6b7b ldr r3, [r7, #52] ; 0x34 + 803ba74: 697a ldr r2, [r7, #20] + 803ba76: 601a str r2, [r3, #0] + 803ba78: e002 b.n 803ba80 } else { pcb->ooseq = cseg; - 803b9f6: 687b ldr r3, [r7, #4] - 803b9f8: 697a ldr r2, [r7, #20] - 803b9fa: 675a str r2, [r3, #116] ; 0x74 + 803ba7a: 687b ldr r3, [r7, #4] + 803ba7c: 697a ldr r2, [r7, #20] + 803ba7e: 675a str r2, [r3, #116] ; 0x74 } tcp_oos_insert_segment(cseg, next); - 803b9fc: 6bb9 ldr r1, [r7, #56] ; 0x38 - 803b9fe: 6978 ldr r0, [r7, #20] - 803ba00: f7ff f8dc bl 803abbc + 803ba80: 6bb9 ldr r1, [r7, #56] ; 0x38 + 803ba82: 6978 ldr r0, [r7, #20] + 803ba84: f7ff f8dc bl 803ac40 } break; - 803ba04: e139 b.n 803bc7a + 803ba88: e139 b.n 803bcfe segment was smaller than the old one; in either case, we ditch the incoming segment. */ break; } } else { if (prev == NULL) { - 803ba06: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba08: 2b00 cmp r3, #0 - 803ba0a: d117 bne.n 803ba3c + 803ba8a: 6b7b ldr r3, [r7, #52] ; 0x34 + 803ba8c: 2b00 cmp r3, #0 + 803ba8e: d117 bne.n 803bac0 if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) { - 803ba0c: 4b2e ldr r3, [pc, #184] ; (803bac8 ) - 803ba0e: 681a ldr r2, [r3, #0] - 803ba10: 6bbb ldr r3, [r7, #56] ; 0x38 - 803ba12: 68db ldr r3, [r3, #12] - 803ba14: 685b ldr r3, [r3, #4] - 803ba16: 1ad3 subs r3, r2, r3 - 803ba18: 2b00 cmp r3, #0 - 803ba1a: da57 bge.n 803bacc + 803ba90: 4b2e ldr r3, [pc, #184] ; (803bb4c ) + 803ba92: 681a ldr r2, [r3, #0] + 803ba94: 6bbb ldr r3, [r7, #56] ; 0x38 + 803ba96: 68db ldr r3, [r3, #12] + 803ba98: 685b ldr r3, [r3, #4] + 803ba9a: 1ad3 subs r3, r2, r3 + 803ba9c: 2b00 cmp r3, #0 + 803ba9e: da57 bge.n 803bb50 /* The sequence number of the incoming segment is lower than the sequence number of the first segment on the queue. We put the incoming segment first on the queue. */ struct tcp_seg *cseg = tcp_seg_copy(&inseg); - 803ba1c: 4829 ldr r0, [pc, #164] ; (803bac4 ) - 803ba1e: f7fd faf1 bl 8039004 - 803ba22: 61b8 str r0, [r7, #24] + 803baa0: 4829 ldr r0, [pc, #164] ; (803bb48 ) + 803baa2: f7fd faf1 bl 8039088 + 803baa6: 61b8 str r0, [r7, #24] if (cseg != NULL) { - 803ba24: 69bb ldr r3, [r7, #24] - 803ba26: 2b00 cmp r3, #0 - 803ba28: f000 8129 beq.w 803bc7e + 803baa8: 69bb ldr r3, [r7, #24] + 803baaa: 2b00 cmp r3, #0 + 803baac: f000 8129 beq.w 803bd02 pcb->ooseq = cseg; - 803ba2c: 687b ldr r3, [r7, #4] - 803ba2e: 69ba ldr r2, [r7, #24] - 803ba30: 675a str r2, [r3, #116] ; 0x74 + 803bab0: 687b ldr r3, [r7, #4] + 803bab2: 69ba ldr r2, [r7, #24] + 803bab4: 675a str r2, [r3, #116] ; 0x74 tcp_oos_insert_segment(cseg, next); - 803ba32: 6bb9 ldr r1, [r7, #56] ; 0x38 - 803ba34: 69b8 ldr r0, [r7, #24] - 803ba36: f7ff f8c1 bl 803abbc + 803bab6: 6bb9 ldr r1, [r7, #56] ; 0x38 + 803bab8: 69b8 ldr r0, [r7, #24] + 803baba: f7ff f8c1 bl 803ac40 } break; - 803ba3a: e120 b.n 803bc7e + 803babe: e120 b.n 803bd02 } } else { /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) && TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/ if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno + 1, next->tcphdr->seqno - 1)) { - 803ba3c: 4b22 ldr r3, [pc, #136] ; (803bac8 ) - 803ba3e: 681a ldr r2, [r3, #0] - 803ba40: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba42: 68db ldr r3, [r3, #12] - 803ba44: 685b ldr r3, [r3, #4] - 803ba46: 1ad3 subs r3, r2, r3 - 803ba48: 3b01 subs r3, #1 - 803ba4a: 2b00 cmp r3, #0 - 803ba4c: db3e blt.n 803bacc - 803ba4e: 4b1e ldr r3, [pc, #120] ; (803bac8 ) - 803ba50: 681a ldr r2, [r3, #0] - 803ba52: 6bbb ldr r3, [r7, #56] ; 0x38 - 803ba54: 68db ldr r3, [r3, #12] - 803ba56: 685b ldr r3, [r3, #4] - 803ba58: 1ad3 subs r3, r2, r3 - 803ba5a: 3301 adds r3, #1 - 803ba5c: 2b00 cmp r3, #0 - 803ba5e: dc35 bgt.n 803bacc + 803bac0: 4b22 ldr r3, [pc, #136] ; (803bb4c ) + 803bac2: 681a ldr r2, [r3, #0] + 803bac4: 6b7b ldr r3, [r7, #52] ; 0x34 + 803bac6: 68db ldr r3, [r3, #12] + 803bac8: 685b ldr r3, [r3, #4] + 803baca: 1ad3 subs r3, r2, r3 + 803bacc: 3b01 subs r3, #1 + 803bace: 2b00 cmp r3, #0 + 803bad0: db3e blt.n 803bb50 + 803bad2: 4b1e ldr r3, [pc, #120] ; (803bb4c ) + 803bad4: 681a ldr r2, [r3, #0] + 803bad6: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bad8: 68db ldr r3, [r3, #12] + 803bada: 685b ldr r3, [r3, #4] + 803badc: 1ad3 subs r3, r2, r3 + 803bade: 3301 adds r3, #1 + 803bae0: 2b00 cmp r3, #0 + 803bae2: dc35 bgt.n 803bb50 /* The sequence number of the incoming segment is in between the sequence numbers of the previous and the next segment on ->ooseq. We trim trim the previous segment, delete next segments that included in received segment and trim received, if needed. */ struct tcp_seg *cseg = tcp_seg_copy(&inseg); - 803ba60: 4818 ldr r0, [pc, #96] ; (803bac4 ) - 803ba62: f7fd facf bl 8039004 - 803ba66: 61f8 str r0, [r7, #28] + 803bae4: 4818 ldr r0, [pc, #96] ; (803bb48 ) + 803bae6: f7fd facf bl 8039088 + 803baea: 61f8 str r0, [r7, #28] if (cseg != NULL) { - 803ba68: 69fb ldr r3, [r7, #28] - 803ba6a: 2b00 cmp r3, #0 - 803ba6c: f000 8109 beq.w 803bc82 + 803baec: 69fb ldr r3, [r7, #28] + 803baee: 2b00 cmp r3, #0 + 803baf0: f000 8109 beq.w 803bd06 if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) { - 803ba70: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba72: 68db ldr r3, [r3, #12] - 803ba74: 685b ldr r3, [r3, #4] - 803ba76: 6b7a ldr r2, [r7, #52] ; 0x34 - 803ba78: 8912 ldrh r2, [r2, #8] - 803ba7a: 441a add r2, r3 - 803ba7c: 4b12 ldr r3, [pc, #72] ; (803bac8 ) - 803ba7e: 681b ldr r3, [r3, #0] - 803ba80: 1ad3 subs r3, r2, r3 - 803ba82: 2b00 cmp r3, #0 - 803ba84: dd12 ble.n 803baac + 803baf4: 6b7b ldr r3, [r7, #52] ; 0x34 + 803baf6: 68db ldr r3, [r3, #12] + 803baf8: 685b ldr r3, [r3, #4] + 803bafa: 6b7a ldr r2, [r7, #52] ; 0x34 + 803bafc: 8912 ldrh r2, [r2, #8] + 803bafe: 441a add r2, r3 + 803bb00: 4b12 ldr r3, [pc, #72] ; (803bb4c ) + 803bb02: 681b ldr r3, [r3, #0] + 803bb04: 1ad3 subs r3, r2, r3 + 803bb06: 2b00 cmp r3, #0 + 803bb08: dd12 ble.n 803bb30 /* We need to trim the prev segment. */ prev->len = (u16_t)(seqno - prev->tcphdr->seqno); - 803ba86: 4b10 ldr r3, [pc, #64] ; (803bac8 ) - 803ba88: 681b ldr r3, [r3, #0] - 803ba8a: b29a uxth r2, r3 - 803ba8c: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba8e: 68db ldr r3, [r3, #12] - 803ba90: 685b ldr r3, [r3, #4] - 803ba92: b29b uxth r3, r3 - 803ba94: 1ad3 subs r3, r2, r3 - 803ba96: b29a uxth r2, r3 - 803ba98: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba9a: 811a strh r2, [r3, #8] + 803bb0a: 4b10 ldr r3, [pc, #64] ; (803bb4c ) + 803bb0c: 681b ldr r3, [r3, #0] + 803bb0e: b29a uxth r2, r3 + 803bb10: 6b7b ldr r3, [r7, #52] ; 0x34 + 803bb12: 68db ldr r3, [r3, #12] + 803bb14: 685b ldr r3, [r3, #4] + 803bb16: b29b uxth r3, r3 + 803bb18: 1ad3 subs r3, r2, r3 + 803bb1a: b29a uxth r2, r3 + 803bb1c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803bb1e: 811a strh r2, [r3, #8] pbuf_realloc(prev->p, prev->len); - 803ba9c: 6b7b ldr r3, [r7, #52] ; 0x34 - 803ba9e: 685a ldr r2, [r3, #4] - 803baa0: 6b7b ldr r3, [r7, #52] ; 0x34 - 803baa2: 891b ldrh r3, [r3, #8] - 803baa4: 4619 mov r1, r3 - 803baa6: 4610 mov r0, r2 - 803baa8: f7fb fcc2 bl 8037430 + 803bb20: 6b7b ldr r3, [r7, #52] ; 0x34 + 803bb22: 685a ldr r2, [r3, #4] + 803bb24: 6b7b ldr r3, [r7, #52] ; 0x34 + 803bb26: 891b ldrh r3, [r3, #8] + 803bb28: 4619 mov r1, r3 + 803bb2a: 4610 mov r0, r2 + 803bb2c: f7fb fcc2 bl 80374b4 } prev->next = cseg; - 803baac: 6b7b ldr r3, [r7, #52] ; 0x34 - 803baae: 69fa ldr r2, [r7, #28] - 803bab0: 601a str r2, [r3, #0] + 803bb30: 6b7b ldr r3, [r7, #52] ; 0x34 + 803bb32: 69fa ldr r2, [r7, #28] + 803bb34: 601a str r2, [r3, #0] tcp_oos_insert_segment(cseg, next); - 803bab2: 6bb9 ldr r1, [r7, #56] ; 0x38 - 803bab4: 69f8 ldr r0, [r7, #28] - 803bab6: f7ff f881 bl 803abbc + 803bb36: 6bb9 ldr r1, [r7, #56] ; 0x38 + 803bb38: 69f8 ldr r0, [r7, #28] + 803bb3a: f7ff f881 bl 803ac40 } break; - 803baba: e0e2 b.n 803bc82 - 803babc: 2400e9a0 .word 0x2400e9a0 - 803bac0: 2400e99d .word 0x2400e99d - 803bac4: 2400e970 .word 0x2400e970 - 803bac8: 2400e990 .word 0x2400e990 + 803bb3e: e0e2 b.n 803bd06 + 803bb40: 2400e9a8 .word 0x2400e9a8 + 803bb44: 2400e9a5 .word 0x2400e9a5 + 803bb48: 2400e978 .word 0x2400e978 + 803bb4c: 2400e998 .word 0x2400e998 #endif /* LWIP_TCP_SACK_OUT */ /* We don't use 'prev' below, so let's set it to current 'next'. This way even if we break the loop below, 'prev' will be pointing at the segment right in front of the newly added one. */ prev = next; - 803bacc: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bace: 637b str r3, [r7, #52] ; 0x34 + 803bb50: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb52: 637b str r3, [r7, #52] ; 0x34 /* If the "next" segment is the last segment on the ooseq queue, we add the incoming segment to the end of the list. */ if (next->next == NULL && - 803bad0: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bad2: 681b ldr r3, [r3, #0] - 803bad4: 2b00 cmp r3, #0 - 803bad6: f040 80c6 bne.w 803bc66 + 803bb54: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb56: 681b ldr r3, [r3, #0] + 803bb58: 2b00 cmp r3, #0 + 803bb5a: f040 80c6 bne.w 803bcea TCP_SEQ_GT(seqno, next->tcphdr->seqno)) { - 803bada: 4b80 ldr r3, [pc, #512] ; (803bcdc ) - 803badc: 681a ldr r2, [r3, #0] - 803bade: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bae0: 68db ldr r3, [r3, #12] - 803bae2: 685b ldr r3, [r3, #4] - 803bae4: 1ad3 subs r3, r2, r3 + 803bb5e: 4b80 ldr r3, [pc, #512] ; (803bd60 ) + 803bb60: 681a ldr r2, [r3, #0] + 803bb62: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb64: 68db ldr r3, [r3, #12] + 803bb66: 685b ldr r3, [r3, #4] + 803bb68: 1ad3 subs r3, r2, r3 if (next->next == NULL && - 803bae6: 2b00 cmp r3, #0 - 803bae8: f340 80bd ble.w 803bc66 + 803bb6a: 2b00 cmp r3, #0 + 803bb6c: f340 80bd ble.w 803bcea if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { - 803baec: 6bbb ldr r3, [r7, #56] ; 0x38 - 803baee: 68db ldr r3, [r3, #12] - 803baf0: 899b ldrh r3, [r3, #12] - 803baf2: b29b uxth r3, r3 - 803baf4: 4618 mov r0, r3 - 803baf6: f7fa f9ef bl 8035ed8 - 803bafa: 4603 mov r3, r0 - 803bafc: b2db uxtb r3, r3 - 803bafe: f003 0301 and.w r3, r3, #1 - 803bb02: 2b00 cmp r3, #0 - 803bb04: f040 80bf bne.w 803bc86 + 803bb70: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb72: 68db ldr r3, [r3, #12] + 803bb74: 899b ldrh r3, [r3, #12] + 803bb76: b29b uxth r3, r3 + 803bb78: 4618 mov r0, r3 + 803bb7a: f7fa f9ef bl 8035f5c + 803bb7e: 4603 mov r3, r0 + 803bb80: b2db uxtb r3, r3 + 803bb82: f003 0301 and.w r3, r3, #1 + 803bb86: 2b00 cmp r3, #0 + 803bb88: f040 80bf bne.w 803bd0a /* segment "next" already contains all data */ break; } next->next = tcp_seg_copy(&inseg); - 803bb08: 4875 ldr r0, [pc, #468] ; (803bce0 ) - 803bb0a: f7fd fa7b bl 8039004 - 803bb0e: 4602 mov r2, r0 - 803bb10: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb12: 601a str r2, [r3, #0] + 803bb8c: 4875 ldr r0, [pc, #468] ; (803bd64 ) + 803bb8e: f7fd fa7b bl 8039088 + 803bb92: 4602 mov r2, r0 + 803bb94: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb96: 601a str r2, [r3, #0] if (next->next != NULL) { - 803bb14: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb16: 681b ldr r3, [r3, #0] - 803bb18: 2b00 cmp r3, #0 - 803bb1a: f000 80b6 beq.w 803bc8a + 803bb98: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bb9a: 681b ldr r3, [r3, #0] + 803bb9c: 2b00 cmp r3, #0 + 803bb9e: f000 80b6 beq.w 803bd0e if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) { - 803bb1e: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb20: 68db ldr r3, [r3, #12] - 803bb22: 685b ldr r3, [r3, #4] - 803bb24: 6bba ldr r2, [r7, #56] ; 0x38 - 803bb26: 8912 ldrh r2, [r2, #8] - 803bb28: 441a add r2, r3 - 803bb2a: 4b6c ldr r3, [pc, #432] ; (803bcdc ) - 803bb2c: 681b ldr r3, [r3, #0] - 803bb2e: 1ad3 subs r3, r2, r3 - 803bb30: 2b00 cmp r3, #0 - 803bb32: dd12 ble.n 803bb5a + 803bba2: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bba4: 68db ldr r3, [r3, #12] + 803bba6: 685b ldr r3, [r3, #4] + 803bba8: 6bba ldr r2, [r7, #56] ; 0x38 + 803bbaa: 8912 ldrh r2, [r2, #8] + 803bbac: 441a add r2, r3 + 803bbae: 4b6c ldr r3, [pc, #432] ; (803bd60 ) + 803bbb0: 681b ldr r3, [r3, #0] + 803bbb2: 1ad3 subs r3, r2, r3 + 803bbb4: 2b00 cmp r3, #0 + 803bbb6: dd12 ble.n 803bbde /* We need to trim the last segment. */ next->len = (u16_t)(seqno - next->tcphdr->seqno); - 803bb34: 4b69 ldr r3, [pc, #420] ; (803bcdc ) - 803bb36: 681b ldr r3, [r3, #0] - 803bb38: b29a uxth r2, r3 - 803bb3a: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb3c: 68db ldr r3, [r3, #12] - 803bb3e: 685b ldr r3, [r3, #4] - 803bb40: b29b uxth r3, r3 - 803bb42: 1ad3 subs r3, r2, r3 - 803bb44: b29a uxth r2, r3 - 803bb46: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb48: 811a strh r2, [r3, #8] + 803bbb8: 4b69 ldr r3, [pc, #420] ; (803bd60 ) + 803bbba: 681b ldr r3, [r3, #0] + 803bbbc: b29a uxth r2, r3 + 803bbbe: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bbc0: 68db ldr r3, [r3, #12] + 803bbc2: 685b ldr r3, [r3, #4] + 803bbc4: b29b uxth r3, r3 + 803bbc6: 1ad3 subs r3, r2, r3 + 803bbc8: b29a uxth r2, r3 + 803bbca: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bbcc: 811a strh r2, [r3, #8] pbuf_realloc(next->p, next->len); - 803bb4a: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb4c: 685a ldr r2, [r3, #4] - 803bb4e: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb50: 891b ldrh r3, [r3, #8] - 803bb52: 4619 mov r1, r3 - 803bb54: 4610 mov r0, r2 - 803bb56: f7fb fc6b bl 8037430 + 803bbce: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bbd0: 685a ldr r2, [r3, #4] + 803bbd2: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bbd4: 891b ldrh r3, [r3, #8] + 803bbd6: 4619 mov r1, r3 + 803bbd8: 4610 mov r0, r2 + 803bbda: f7fb fc6b bl 80374b4 } /* check if the remote side overruns our receive window */ if (TCP_SEQ_GT((u32_t)tcplen + seqno, pcb->rcv_nxt + (u32_t)pcb->rcv_wnd)) { - 803bb5a: 4b62 ldr r3, [pc, #392] ; (803bce4 ) - 803bb5c: 881b ldrh r3, [r3, #0] - 803bb5e: 461a mov r2, r3 - 803bb60: 4b5e ldr r3, [pc, #376] ; (803bcdc ) - 803bb62: 681b ldr r3, [r3, #0] - 803bb64: 441a add r2, r3 - 803bb66: 687b ldr r3, [r7, #4] - 803bb68: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bb6a: 6879 ldr r1, [r7, #4] - 803bb6c: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803bb6e: 440b add r3, r1 - 803bb70: 1ad3 subs r3, r2, r3 - 803bb72: 2b00 cmp r3, #0 - 803bb74: f340 8089 ble.w 803bc8a + 803bbde: 4b62 ldr r3, [pc, #392] ; (803bd68 ) + 803bbe0: 881b ldrh r3, [r3, #0] + 803bbe2: 461a mov r2, r3 + 803bbe4: 4b5e ldr r3, [pc, #376] ; (803bd60 ) + 803bbe6: 681b ldr r3, [r3, #0] + 803bbe8: 441a add r2, r3 + 803bbea: 687b ldr r3, [r7, #4] + 803bbec: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bbee: 6879 ldr r1, [r7, #4] + 803bbf0: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803bbf2: 440b add r3, r1 + 803bbf4: 1ad3 subs r3, r2, r3 + 803bbf6: 2b00 cmp r3, #0 + 803bbf8: f340 8089 ble.w 803bd0e LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: other end overran receive window" "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n", seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd)); if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) { - 803bb78: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb7a: 681b ldr r3, [r3, #0] - 803bb7c: 68db ldr r3, [r3, #12] - 803bb7e: 899b ldrh r3, [r3, #12] - 803bb80: b29b uxth r3, r3 - 803bb82: 4618 mov r0, r3 - 803bb84: f7fa f9a8 bl 8035ed8 - 803bb88: 4603 mov r3, r0 - 803bb8a: b2db uxtb r3, r3 - 803bb8c: f003 0301 and.w r3, r3, #1 - 803bb90: 2b00 cmp r3, #0 - 803bb92: d022 beq.n 803bbda + 803bbfc: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bbfe: 681b ldr r3, [r3, #0] + 803bc00: 68db ldr r3, [r3, #12] + 803bc02: 899b ldrh r3, [r3, #12] + 803bc04: b29b uxth r3, r3 + 803bc06: 4618 mov r0, r3 + 803bc08: f7fa f9a8 bl 8035f5c + 803bc0c: 4603 mov r3, r0 + 803bc0e: b2db uxtb r3, r3 + 803bc10: f003 0301 and.w r3, r3, #1 + 803bc14: 2b00 cmp r3, #0 + 803bc16: d022 beq.n 803bc5e /* Must remove the FIN from the header as we're trimming * that byte of sequence-space from the packet */ TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) & ~TCP_FIN); - 803bb94: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bb96: 681b ldr r3, [r3, #0] - 803bb98: 68db ldr r3, [r3, #12] - 803bb9a: 899b ldrh r3, [r3, #12] - 803bb9c: b29b uxth r3, r3 - 803bb9e: b21b sxth r3, r3 - 803bba0: f423 537c bic.w r3, r3, #16128 ; 0x3f00 - 803bba4: b21c sxth r4, r3 - 803bba6: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bba8: 681b ldr r3, [r3, #0] - 803bbaa: 68db ldr r3, [r3, #12] - 803bbac: 899b ldrh r3, [r3, #12] - 803bbae: b29b uxth r3, r3 - 803bbb0: 4618 mov r0, r3 - 803bbb2: f7fa f991 bl 8035ed8 - 803bbb6: 4603 mov r3, r0 - 803bbb8: b2db uxtb r3, r3 - 803bbba: b29b uxth r3, r3 - 803bbbc: f003 033e and.w r3, r3, #62 ; 0x3e - 803bbc0: b29b uxth r3, r3 - 803bbc2: 4618 mov r0, r3 - 803bbc4: f7fa f988 bl 8035ed8 - 803bbc8: 4603 mov r3, r0 - 803bbca: b21b sxth r3, r3 - 803bbcc: 4323 orrs r3, r4 - 803bbce: b21a sxth r2, r3 - 803bbd0: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bbd2: 681b ldr r3, [r3, #0] - 803bbd4: 68db ldr r3, [r3, #12] - 803bbd6: b292 uxth r2, r2 - 803bbd8: 819a strh r2, [r3, #12] + 803bc18: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc1a: 681b ldr r3, [r3, #0] + 803bc1c: 68db ldr r3, [r3, #12] + 803bc1e: 899b ldrh r3, [r3, #12] + 803bc20: b29b uxth r3, r3 + 803bc22: b21b sxth r3, r3 + 803bc24: f423 537c bic.w r3, r3, #16128 ; 0x3f00 + 803bc28: b21c sxth r4, r3 + 803bc2a: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc2c: 681b ldr r3, [r3, #0] + 803bc2e: 68db ldr r3, [r3, #12] + 803bc30: 899b ldrh r3, [r3, #12] + 803bc32: b29b uxth r3, r3 + 803bc34: 4618 mov r0, r3 + 803bc36: f7fa f991 bl 8035f5c + 803bc3a: 4603 mov r3, r0 + 803bc3c: b2db uxtb r3, r3 + 803bc3e: b29b uxth r3, r3 + 803bc40: f003 033e and.w r3, r3, #62 ; 0x3e + 803bc44: b29b uxth r3, r3 + 803bc46: 4618 mov r0, r3 + 803bc48: f7fa f988 bl 8035f5c + 803bc4c: 4603 mov r3, r0 + 803bc4e: b21b sxth r3, r3 + 803bc50: 4323 orrs r3, r4 + 803bc52: b21a sxth r2, r3 + 803bc54: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc56: 681b ldr r3, [r3, #0] + 803bc58: 68db ldr r3, [r3, #12] + 803bc5a: b292 uxth r2, r2 + 803bc5c: 819a strh r2, [r3, #12] } /* Adjust length of segment to fit in the window. */ next->next->len = (u16_t)(pcb->rcv_nxt + pcb->rcv_wnd - seqno); - 803bbda: 687b ldr r3, [r7, #4] - 803bbdc: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bbde: b29a uxth r2, r3 - 803bbe0: 687b ldr r3, [r7, #4] - 803bbe2: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803bbe4: 4413 add r3, r2 - 803bbe6: b299 uxth r1, r3 - 803bbe8: 4b3c ldr r3, [pc, #240] ; (803bcdc ) - 803bbea: 681b ldr r3, [r3, #0] - 803bbec: b29a uxth r2, r3 - 803bbee: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bbf0: 681b ldr r3, [r3, #0] - 803bbf2: 1a8a subs r2, r1, r2 - 803bbf4: b292 uxth r2, r2 - 803bbf6: 811a strh r2, [r3, #8] + 803bc5e: 687b ldr r3, [r7, #4] + 803bc60: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bc62: b29a uxth r2, r3 + 803bc64: 687b ldr r3, [r7, #4] + 803bc66: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803bc68: 4413 add r3, r2 + 803bc6a: b299 uxth r1, r3 + 803bc6c: 4b3c ldr r3, [pc, #240] ; (803bd60 ) + 803bc6e: 681b ldr r3, [r3, #0] + 803bc70: b29a uxth r2, r3 + 803bc72: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc74: 681b ldr r3, [r3, #0] + 803bc76: 1a8a subs r2, r1, r2 + 803bc78: b292 uxth r2, r2 + 803bc7a: 811a strh r2, [r3, #8] pbuf_realloc(next->next->p, next->next->len); - 803bbf8: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bbfa: 681b ldr r3, [r3, #0] - 803bbfc: 685a ldr r2, [r3, #4] - 803bbfe: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bc00: 681b ldr r3, [r3, #0] - 803bc02: 891b ldrh r3, [r3, #8] - 803bc04: 4619 mov r1, r3 - 803bc06: 4610 mov r0, r2 - 803bc08: f7fb fc12 bl 8037430 + 803bc7c: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc7e: 681b ldr r3, [r3, #0] + 803bc80: 685a ldr r2, [r3, #4] + 803bc82: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc84: 681b ldr r3, [r3, #0] + 803bc86: 891b ldrh r3, [r3, #8] + 803bc88: 4619 mov r1, r3 + 803bc8a: 4610 mov r0, r2 + 803bc8c: f7fb fc12 bl 80374b4 tcplen = TCP_TCPLEN(next->next); - 803bc0c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bc0e: 681b ldr r3, [r3, #0] - 803bc10: 891c ldrh r4, [r3, #8] - 803bc12: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bc14: 681b ldr r3, [r3, #0] - 803bc16: 68db ldr r3, [r3, #12] - 803bc18: 899b ldrh r3, [r3, #12] - 803bc1a: b29b uxth r3, r3 - 803bc1c: 4618 mov r0, r3 - 803bc1e: f7fa f95b bl 8035ed8 - 803bc22: 4603 mov r3, r0 - 803bc24: b2db uxtb r3, r3 - 803bc26: f003 0303 and.w r3, r3, #3 - 803bc2a: 2b00 cmp r3, #0 - 803bc2c: d001 beq.n 803bc32 - 803bc2e: 2301 movs r3, #1 - 803bc30: e000 b.n 803bc34 - 803bc32: 2300 movs r3, #0 - 803bc34: 4423 add r3, r4 - 803bc36: b29a uxth r2, r3 - 803bc38: 4b2a ldr r3, [pc, #168] ; (803bce4 ) - 803bc3a: 801a strh r2, [r3, #0] + 803bc90: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc92: 681b ldr r3, [r3, #0] + 803bc94: 891c ldrh r4, [r3, #8] + 803bc96: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bc98: 681b ldr r3, [r3, #0] + 803bc9a: 68db ldr r3, [r3, #12] + 803bc9c: 899b ldrh r3, [r3, #12] + 803bc9e: b29b uxth r3, r3 + 803bca0: 4618 mov r0, r3 + 803bca2: f7fa f95b bl 8035f5c + 803bca6: 4603 mov r3, r0 + 803bca8: b2db uxtb r3, r3 + 803bcaa: f003 0303 and.w r3, r3, #3 + 803bcae: 2b00 cmp r3, #0 + 803bcb0: d001 beq.n 803bcb6 + 803bcb2: 2301 movs r3, #1 + 803bcb4: e000 b.n 803bcb8 + 803bcb6: 2300 movs r3, #0 + 803bcb8: 4423 add r3, r4 + 803bcba: b29a uxth r2, r3 + 803bcbc: 4b2a ldr r3, [pc, #168] ; (803bd68 ) + 803bcbe: 801a strh r2, [r3, #0] LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n", - 803bc3c: 4b29 ldr r3, [pc, #164] ; (803bce4 ) - 803bc3e: 881b ldrh r3, [r3, #0] - 803bc40: 461a mov r2, r3 - 803bc42: 4b26 ldr r3, [pc, #152] ; (803bcdc ) - 803bc44: 681b ldr r3, [r3, #0] - 803bc46: 441a add r2, r3 - 803bc48: 687b ldr r3, [r7, #4] - 803bc4a: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bc4c: 6879 ldr r1, [r7, #4] - 803bc4e: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803bc50: 440b add r3, r1 - 803bc52: 429a cmp r2, r3 - 803bc54: d019 beq.n 803bc8a - 803bc56: 4b24 ldr r3, [pc, #144] ; (803bce8 ) - 803bc58: f44f 62df mov.w r2, #1784 ; 0x6f8 - 803bc5c: 4923 ldr r1, [pc, #140] ; (803bcec ) - 803bc5e: 4824 ldr r0, [pc, #144] ; (803bcf0 ) - 803bc60: f004 ff56 bl 8040b10 + 803bcc0: 4b29 ldr r3, [pc, #164] ; (803bd68 ) + 803bcc2: 881b ldrh r3, [r3, #0] + 803bcc4: 461a mov r2, r3 + 803bcc6: 4b26 ldr r3, [pc, #152] ; (803bd60 ) + 803bcc8: 681b ldr r3, [r3, #0] + 803bcca: 441a add r2, r3 + 803bccc: 687b ldr r3, [r7, #4] + 803bcce: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bcd0: 6879 ldr r1, [r7, #4] + 803bcd2: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803bcd4: 440b add r3, r1 + 803bcd6: 429a cmp r2, r3 + 803bcd8: d019 beq.n 803bd0e + 803bcda: 4b24 ldr r3, [pc, #144] ; (803bd6c ) + 803bcdc: f44f 62df mov.w r2, #1784 ; 0x6f8 + 803bce0: 4923 ldr r1, [pc, #140] ; (803bd70 ) + 803bce2: 4824 ldr r0, [pc, #144] ; (803bd74 ) + 803bce4: f004 ff56 bl 8040b94 (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd)); } } break; - 803bc64: e011 b.n 803bc8a + 803bce8: e011 b.n 803bd0e for (next = pcb->ooseq; next != NULL; next = next->next) { - 803bc66: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bc68: 681b ldr r3, [r3, #0] - 803bc6a: 63bb str r3, [r7, #56] ; 0x38 - 803bc6c: 6bbb ldr r3, [r7, #56] ; 0x38 - 803bc6e: 2b00 cmp r3, #0 - 803bc70: f47f aea4 bne.w 803b9bc - 803bc74: e00a b.n 803bc8c + 803bcea: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bcec: 681b ldr r3, [r3, #0] + 803bcee: 63bb str r3, [r7, #56] ; 0x38 + 803bcf0: 6bbb ldr r3, [r7, #56] ; 0x38 + 803bcf2: 2b00 cmp r3, #0 + 803bcf4: f47f aea4 bne.w 803ba40 + 803bcf8: e00a b.n 803bd10 break; - 803bc76: bf00 nop - 803bc78: e008 b.n 803bc8c + 803bcfa: bf00 nop + 803bcfc: e008 b.n 803bd10 break; - 803bc7a: bf00 nop - 803bc7c: e006 b.n 803bc8c + 803bcfe: bf00 nop + 803bd00: e006 b.n 803bd10 break; - 803bc7e: bf00 nop - 803bc80: e004 b.n 803bc8c + 803bd02: bf00 nop + 803bd04: e004 b.n 803bd10 break; - 803bc82: bf00 nop - 803bc84: e002 b.n 803bc8c + 803bd06: bf00 nop + 803bd08: e002 b.n 803bd10 break; - 803bc86: bf00 nop - 803bc88: e000 b.n 803bc8c + 803bd0a: bf00 nop + 803bd0c: e000 b.n 803bd10 break; - 803bc8a: bf00 nop + 803bd0e: bf00 nop #endif /* TCP_OOSEQ_BYTES_LIMIT || TCP_OOSEQ_PBUFS_LIMIT */ #endif /* TCP_QUEUE_OOSEQ */ /* We send the ACK packet after we've (potentially) dealt with SACKs, so they can be included in the acknowledgment. */ tcp_send_empty_ack(pcb); - 803bc8c: 6878 ldr r0, [r7, #4] - 803bc8e: f001 fe8b bl 803d9a8 + 803bd10: 6878 ldr r0, [r7, #4] + 803bd12: f001 fe8b bl 803da2c if (pcb->rcv_nxt == seqno) { - 803bc92: e003 b.n 803bc9c + 803bd16: e003 b.n 803bd20 } } else { /* The incoming segment is not within the window. */ tcp_send_empty_ack(pcb); - 803bc94: 6878 ldr r0, [r7, #4] - 803bc96: f001 fe87 bl 803d9a8 + 803bd18: 6878 ldr r0, [r7, #4] + 803bd1a: f001 fe87 bl 803da2c if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, - 803bc9a: e01a b.n 803bcd2 - 803bc9c: e019 b.n 803bcd2 + 803bd1e: e01a b.n 803bd56 + 803bd20: e019 b.n 803bd56 } } else { /* Segments with length 0 is taken care of here. Segments that fall out of the window are ACKed. */ if (!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)) { - 803bc9e: 4b0f ldr r3, [pc, #60] ; (803bcdc ) - 803bca0: 681a ldr r2, [r3, #0] - 803bca2: 687b ldr r3, [r7, #4] - 803bca4: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bca6: 1ad3 subs r3, r2, r3 - 803bca8: 2b00 cmp r3, #0 - 803bcaa: db0a blt.n 803bcc2 - 803bcac: 4b0b ldr r3, [pc, #44] ; (803bcdc ) - 803bcae: 681a ldr r2, [r3, #0] - 803bcb0: 687b ldr r3, [r7, #4] - 803bcb2: 6a5b ldr r3, [r3, #36] ; 0x24 - 803bcb4: 6879 ldr r1, [r7, #4] - 803bcb6: 8d09 ldrh r1, [r1, #40] ; 0x28 - 803bcb8: 440b add r3, r1 - 803bcba: 1ad3 subs r3, r2, r3 - 803bcbc: 3301 adds r3, #1 - 803bcbe: 2b00 cmp r3, #0 - 803bcc0: dd07 ble.n 803bcd2 + 803bd22: 4b0f ldr r3, [pc, #60] ; (803bd60 ) + 803bd24: 681a ldr r2, [r3, #0] + 803bd26: 687b ldr r3, [r7, #4] + 803bd28: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bd2a: 1ad3 subs r3, r2, r3 + 803bd2c: 2b00 cmp r3, #0 + 803bd2e: db0a blt.n 803bd46 + 803bd30: 4b0b ldr r3, [pc, #44] ; (803bd60 ) + 803bd32: 681a ldr r2, [r3, #0] + 803bd34: 687b ldr r3, [r7, #4] + 803bd36: 6a5b ldr r3, [r3, #36] ; 0x24 + 803bd38: 6879 ldr r1, [r7, #4] + 803bd3a: 8d09 ldrh r1, [r1, #40] ; 0x28 + 803bd3c: 440b add r3, r1 + 803bd3e: 1ad3 subs r3, r2, r3 + 803bd40: 3301 adds r3, #1 + 803bd42: 2b00 cmp r3, #0 + 803bd44: dd07 ble.n 803bd56 tcp_ack_now(pcb); - 803bcc2: 687b ldr r3, [r7, #4] - 803bcc4: 8b5b ldrh r3, [r3, #26] - 803bcc6: f043 0302 orr.w r3, r3, #2 - 803bcca: b29a uxth r2, r3 - 803bccc: 687b ldr r3, [r7, #4] - 803bcce: 835a strh r2, [r3, #26] + 803bd46: 687b ldr r3, [r7, #4] + 803bd48: 8b5b ldrh r3, [r3, #26] + 803bd4a: f043 0302 orr.w r3, r3, #2 + 803bd4e: b29a uxth r2, r3 + 803bd50: 687b ldr r3, [r7, #4] + 803bd52: 835a strh r2, [r3, #26] } } } - 803bcd0: e7ff b.n 803bcd2 - 803bcd2: bf00 nop - 803bcd4: 3750 adds r7, #80 ; 0x50 - 803bcd6: 46bd mov sp, r7 - 803bcd8: bdb0 pop {r4, r5, r7, pc} - 803bcda: bf00 nop - 803bcdc: 2400e990 .word 0x2400e990 - 803bce0: 2400e970 .word 0x2400e970 - 803bce4: 2400e99a .word 0x2400e99a - 803bce8: 08043500 .word 0x08043500 - 803bcec: 080438a8 .word 0x080438a8 - 803bcf0: 0804354c .word 0x0804354c + 803bd54: e7ff b.n 803bd56 + 803bd56: bf00 nop + 803bd58: 3750 adds r7, #80 ; 0x50 + 803bd5a: 46bd mov sp, r7 + 803bd5c: bdb0 pop {r4, r5, r7, pc} + 803bd5e: bf00 nop + 803bd60: 2400e998 .word 0x2400e998 + 803bd64: 2400e978 .word 0x2400e978 + 803bd68: 2400e9a2 .word 0x2400e9a2 + 803bd6c: 08043580 .word 0x08043580 + 803bd70: 08043928 .word 0x08043928 + 803bd74: 080435cc .word 0x080435cc -0803bcf4 : +0803bd78 : static u8_t tcp_get_next_optbyte(void) { - 803bcf4: b480 push {r7} - 803bcf6: b083 sub sp, #12 - 803bcf8: af00 add r7, sp, #0 + 803bd78: b480 push {r7} + 803bd7a: b083 sub sp, #12 + 803bd7c: af00 add r7, sp, #0 u16_t optidx = tcp_optidx++; - 803bcfa: 4b15 ldr r3, [pc, #84] ; (803bd50 ) - 803bcfc: 881b ldrh r3, [r3, #0] - 803bcfe: 1c5a adds r2, r3, #1 - 803bd00: b291 uxth r1, r2 - 803bd02: 4a13 ldr r2, [pc, #76] ; (803bd50 ) - 803bd04: 8011 strh r1, [r2, #0] - 803bd06: 80fb strh r3, [r7, #6] + 803bd7e: 4b15 ldr r3, [pc, #84] ; (803bdd4 ) + 803bd80: 881b ldrh r3, [r3, #0] + 803bd82: 1c5a adds r2, r3, #1 + 803bd84: b291 uxth r1, r2 + 803bd86: 4a13 ldr r2, [pc, #76] ; (803bdd4 ) + 803bd88: 8011 strh r1, [r2, #0] + 803bd8a: 80fb strh r3, [r7, #6] if ((tcphdr_opt2 == NULL) || (optidx < tcphdr_opt1len)) { - 803bd08: 4b12 ldr r3, [pc, #72] ; (803bd54 ) - 803bd0a: 681b ldr r3, [r3, #0] - 803bd0c: 2b00 cmp r3, #0 - 803bd0e: d004 beq.n 803bd1a - 803bd10: 4b11 ldr r3, [pc, #68] ; (803bd58 ) - 803bd12: 881b ldrh r3, [r3, #0] - 803bd14: 88fa ldrh r2, [r7, #6] - 803bd16: 429a cmp r2, r3 - 803bd18: d208 bcs.n 803bd2c + 803bd8c: 4b12 ldr r3, [pc, #72] ; (803bdd8 ) + 803bd8e: 681b ldr r3, [r3, #0] + 803bd90: 2b00 cmp r3, #0 + 803bd92: d004 beq.n 803bd9e + 803bd94: 4b11 ldr r3, [pc, #68] ; (803bddc ) + 803bd96: 881b ldrh r3, [r3, #0] + 803bd98: 88fa ldrh r2, [r7, #6] + 803bd9a: 429a cmp r2, r3 + 803bd9c: d208 bcs.n 803bdb0 u8_t *opts = (u8_t *)tcphdr + TCP_HLEN; - 803bd1a: 4b10 ldr r3, [pc, #64] ; (803bd5c ) - 803bd1c: 681b ldr r3, [r3, #0] - 803bd1e: 3314 adds r3, #20 - 803bd20: 603b str r3, [r7, #0] + 803bd9e: 4b10 ldr r3, [pc, #64] ; (803bde0 ) + 803bda0: 681b ldr r3, [r3, #0] + 803bda2: 3314 adds r3, #20 + 803bda4: 603b str r3, [r7, #0] return opts[optidx]; - 803bd22: 88fb ldrh r3, [r7, #6] - 803bd24: 683a ldr r2, [r7, #0] - 803bd26: 4413 add r3, r2 - 803bd28: 781b ldrb r3, [r3, #0] - 803bd2a: e00b b.n 803bd44 + 803bda6: 88fb ldrh r3, [r7, #6] + 803bda8: 683a ldr r2, [r7, #0] + 803bdaa: 4413 add r3, r2 + 803bdac: 781b ldrb r3, [r3, #0] + 803bdae: e00b b.n 803bdc8 } else { u8_t idx = (u8_t)(optidx - tcphdr_opt1len); - 803bd2c: 88fb ldrh r3, [r7, #6] - 803bd2e: b2da uxtb r2, r3 - 803bd30: 4b09 ldr r3, [pc, #36] ; (803bd58 ) - 803bd32: 881b ldrh r3, [r3, #0] - 803bd34: b2db uxtb r3, r3 - 803bd36: 1ad3 subs r3, r2, r3 - 803bd38: 717b strb r3, [r7, #5] + 803bdb0: 88fb ldrh r3, [r7, #6] + 803bdb2: b2da uxtb r2, r3 + 803bdb4: 4b09 ldr r3, [pc, #36] ; (803bddc ) + 803bdb6: 881b ldrh r3, [r3, #0] + 803bdb8: b2db uxtb r3, r3 + 803bdba: 1ad3 subs r3, r2, r3 + 803bdbc: 717b strb r3, [r7, #5] return tcphdr_opt2[idx]; - 803bd3a: 4b06 ldr r3, [pc, #24] ; (803bd54 ) - 803bd3c: 681a ldr r2, [r3, #0] - 803bd3e: 797b ldrb r3, [r7, #5] - 803bd40: 4413 add r3, r2 - 803bd42: 781b ldrb r3, [r3, #0] - } -} - 803bd44: 4618 mov r0, r3 - 803bd46: 370c adds r7, #12 - 803bd48: 46bd mov sp, r7 - 803bd4a: f85d 7b04 ldr.w r7, [sp], #4 - 803bd4e: 4770 bx lr - 803bd50: 2400e98c .word 0x2400e98c - 803bd54: 2400e988 .word 0x2400e988 - 803bd58: 2400e986 .word 0x2400e986 - 803bd5c: 2400e980 .word 0x2400e980 - -0803bd60 : + 803bdbe: 4b06 ldr r3, [pc, #24] ; (803bdd8 ) + 803bdc0: 681a ldr r2, [r3, #0] + 803bdc2: 797b ldrb r3, [r7, #5] + 803bdc4: 4413 add r3, r2 + 803bdc6: 781b ldrb r3, [r3, #0] + } +} + 803bdc8: 4618 mov r0, r3 + 803bdca: 370c adds r7, #12 + 803bdcc: 46bd mov sp, r7 + 803bdce: f85d 7b04 ldr.w r7, [sp], #4 + 803bdd2: 4770 bx lr + 803bdd4: 2400e994 .word 0x2400e994 + 803bdd8: 2400e990 .word 0x2400e990 + 803bddc: 2400e98e .word 0x2400e98e + 803bde0: 2400e988 .word 0x2400e988 + +0803bde4 : * * @param pcb the tcp_pcb for which a segment arrived */ static void tcp_parseopt(struct tcp_pcb *pcb) { - 803bd60: b580 push {r7, lr} - 803bd62: b084 sub sp, #16 - 803bd64: af00 add r7, sp, #0 - 803bd66: 6078 str r0, [r7, #4] + 803bde4: b580 push {r7, lr} + 803bde6: b084 sub sp, #16 + 803bde8: af00 add r7, sp, #0 + 803bdea: 6078 str r0, [r7, #4] u16_t mss; #if LWIP_TCP_TIMESTAMPS u32_t tsval; #endif LWIP_ASSERT("tcp_parseopt: invalid pcb", pcb != NULL); - 803bd68: 687b ldr r3, [r7, #4] - 803bd6a: 2b00 cmp r3, #0 - 803bd6c: d106 bne.n 803bd7c - 803bd6e: 4b32 ldr r3, [pc, #200] ; (803be38 ) - 803bd70: f240 727d movw r2, #1917 ; 0x77d - 803bd74: 4931 ldr r1, [pc, #196] ; (803be3c ) - 803bd76: 4832 ldr r0, [pc, #200] ; (803be40 ) - 803bd78: f004 feca bl 8040b10 + 803bdec: 687b ldr r3, [r7, #4] + 803bdee: 2b00 cmp r3, #0 + 803bdf0: d106 bne.n 803be00 + 803bdf2: 4b32 ldr r3, [pc, #200] ; (803bebc ) + 803bdf4: f240 727d movw r2, #1917 ; 0x77d + 803bdf8: 4931 ldr r1, [pc, #196] ; (803bec0 ) + 803bdfa: 4832 ldr r0, [pc, #200] ; (803bec4 ) + 803bdfc: f004 feca bl 8040b94 /* Parse the TCP MSS option, if present. */ if (tcphdr_optlen != 0) { - 803bd7c: 4b31 ldr r3, [pc, #196] ; (803be44 ) - 803bd7e: 881b ldrh r3, [r3, #0] - 803bd80: 2b00 cmp r3, #0 - 803bd82: d055 beq.n 803be30 + 803be00: 4b31 ldr r3, [pc, #196] ; (803bec8 ) + 803be02: 881b ldrh r3, [r3, #0] + 803be04: 2b00 cmp r3, #0 + 803be06: d055 beq.n 803beb4 for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) { - 803bd84: 4b30 ldr r3, [pc, #192] ; (803be48 ) - 803bd86: 2200 movs r2, #0 - 803bd88: 801a strh r2, [r3, #0] - 803bd8a: e045 b.n 803be18 + 803be08: 4b30 ldr r3, [pc, #192] ; (803becc ) + 803be0a: 2200 movs r2, #0 + 803be0c: 801a strh r2, [r3, #0] + 803be0e: e045 b.n 803be9c u8_t opt = tcp_get_next_optbyte(); - 803bd8c: f7ff ffb2 bl 803bcf4 - 803bd90: 4603 mov r3, r0 - 803bd92: 73fb strb r3, [r7, #15] + 803be10: f7ff ffb2 bl 803bd78 + 803be14: 4603 mov r3, r0 + 803be16: 73fb strb r3, [r7, #15] switch (opt) { - 803bd94: 7bfb ldrb r3, [r7, #15] - 803bd96: 2b02 cmp r3, #2 - 803bd98: d006 beq.n 803bda8 - 803bd9a: 2b02 cmp r3, #2 - 803bd9c: dc2b bgt.n 803bdf6 - 803bd9e: 2b00 cmp r3, #0 - 803bda0: d041 beq.n 803be26 - 803bda2: 2b01 cmp r3, #1 - 803bda4: d127 bne.n 803bdf6 + 803be18: 7bfb ldrb r3, [r7, #15] + 803be1a: 2b02 cmp r3, #2 + 803be1c: d006 beq.n 803be2c + 803be1e: 2b02 cmp r3, #2 + 803be20: dc2b bgt.n 803be7a + 803be22: 2b00 cmp r3, #0 + 803be24: d041 beq.n 803beaa + 803be26: 2b01 cmp r3, #1 + 803be28: d127 bne.n 803be7a LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: EOL\n")); return; case LWIP_TCP_OPT_NOP: /* NOP option. */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n")); break; - 803bda6: e037 b.n 803be18 + 803be2a: e037 b.n 803be9c case LWIP_TCP_OPT_MSS: LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n")); if (tcp_get_next_optbyte() != LWIP_TCP_OPT_LEN_MSS || (tcp_optidx - 2 + LWIP_TCP_OPT_LEN_MSS) > tcphdr_optlen) { - 803bda8: f7ff ffa4 bl 803bcf4 - 803bdac: 4603 mov r3, r0 - 803bdae: 2b04 cmp r3, #4 - 803bdb0: d13b bne.n 803be2a - 803bdb2: 4b25 ldr r3, [pc, #148] ; (803be48 ) - 803bdb4: 881b ldrh r3, [r3, #0] - 803bdb6: 3301 adds r3, #1 - 803bdb8: 4a22 ldr r2, [pc, #136] ; (803be44 ) - 803bdba: 8812 ldrh r2, [r2, #0] - 803bdbc: 4293 cmp r3, r2 - 803bdbe: da34 bge.n 803be2a + 803be2c: f7ff ffa4 bl 803bd78 + 803be30: 4603 mov r3, r0 + 803be32: 2b04 cmp r3, #4 + 803be34: d13b bne.n 803beae + 803be36: 4b25 ldr r3, [pc, #148] ; (803becc ) + 803be38: 881b ldrh r3, [r3, #0] + 803be3a: 3301 adds r3, #1 + 803be3c: 4a22 ldr r2, [pc, #136] ; (803bec8 ) + 803be3e: 8812 ldrh r2, [r2, #0] + 803be40: 4293 cmp r3, r2 + 803be42: da34 bge.n 803beae /* Bad length */ LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); return; } /* An MSS option with the right option length. */ mss = (u16_t)(tcp_get_next_optbyte() << 8); - 803bdc0: f7ff ff98 bl 803bcf4 - 803bdc4: 4603 mov r3, r0 - 803bdc6: b29b uxth r3, r3 - 803bdc8: 021b lsls r3, r3, #8 - 803bdca: 81bb strh r3, [r7, #12] + 803be44: f7ff ff98 bl 803bd78 + 803be48: 4603 mov r3, r0 + 803be4a: b29b uxth r3, r3 + 803be4c: 021b lsls r3, r3, #8 + 803be4e: 81bb strh r3, [r7, #12] mss |= tcp_get_next_optbyte(); - 803bdcc: f7ff ff92 bl 803bcf4 - 803bdd0: 4603 mov r3, r0 - 803bdd2: b29a uxth r2, r3 - 803bdd4: 89bb ldrh r3, [r7, #12] - 803bdd6: 4313 orrs r3, r2 - 803bdd8: 81bb strh r3, [r7, #12] + 803be50: f7ff ff92 bl 803bd78 + 803be54: 4603 mov r3, r0 + 803be56: b29a uxth r2, r3 + 803be58: 89bb ldrh r3, [r7, #12] + 803be5a: 4313 orrs r3, r2 + 803be5c: 81bb strh r3, [r7, #12] /* Limit the mss to the configured TCP_MSS and prevent division by zero */ pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss; - 803bdda: 89bb ldrh r3, [r7, #12] - 803bddc: f5b3 7f06 cmp.w r3, #536 ; 0x218 - 803bde0: d804 bhi.n 803bdec - 803bde2: 89bb ldrh r3, [r7, #12] - 803bde4: 2b00 cmp r3, #0 - 803bde6: d001 beq.n 803bdec - 803bde8: 89ba ldrh r2, [r7, #12] - 803bdea: e001 b.n 803bdf0 - 803bdec: f44f 7206 mov.w r2, #536 ; 0x218 - 803bdf0: 687b ldr r3, [r7, #4] - 803bdf2: 865a strh r2, [r3, #50] ; 0x32 + 803be5e: 89bb ldrh r3, [r7, #12] + 803be60: f5b3 7f06 cmp.w r3, #536 ; 0x218 + 803be64: d804 bhi.n 803be70 + 803be66: 89bb ldrh r3, [r7, #12] + 803be68: 2b00 cmp r3, #0 + 803be6a: d001 beq.n 803be70 + 803be6c: 89ba ldrh r2, [r7, #12] + 803be6e: e001 b.n 803be74 + 803be70: f44f 7206 mov.w r2, #536 ; 0x218 + 803be74: 687b ldr r3, [r7, #4] + 803be76: 865a strh r2, [r3, #50] ; 0x32 break; - 803bdf4: e010 b.n 803be18 + 803be78: e010 b.n 803be9c } break; #endif /* LWIP_TCP_SACK_OUT */ default: LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n")); data = tcp_get_next_optbyte(); - 803bdf6: f7ff ff7d bl 803bcf4 - 803bdfa: 4603 mov r3, r0 - 803bdfc: 72fb strb r3, [r7, #11] + 803be7a: f7ff ff7d bl 803bd78 + 803be7e: 4603 mov r3, r0 + 803be80: 72fb strb r3, [r7, #11] if (data < 2) { - 803bdfe: 7afb ldrb r3, [r7, #11] - 803be00: 2b01 cmp r3, #1 - 803be02: d914 bls.n 803be2e + 803be82: 7afb ldrb r3, [r7, #11] + 803be84: 2b01 cmp r3, #1 + 803be86: d914 bls.n 803beb2 and we don't process them further. */ return; } /* All other options have a length field, so that we easily can skip past them. */ tcp_optidx += data - 2; - 803be04: 7afb ldrb r3, [r7, #11] - 803be06: b29a uxth r2, r3 - 803be08: 4b0f ldr r3, [pc, #60] ; (803be48 ) - 803be0a: 881b ldrh r3, [r3, #0] - 803be0c: 4413 add r3, r2 - 803be0e: b29b uxth r3, r3 - 803be10: 3b02 subs r3, #2 - 803be12: b29a uxth r2, r3 - 803be14: 4b0c ldr r3, [pc, #48] ; (803be48 ) - 803be16: 801a strh r2, [r3, #0] + 803be88: 7afb ldrb r3, [r7, #11] + 803be8a: b29a uxth r2, r3 + 803be8c: 4b0f ldr r3, [pc, #60] ; (803becc ) + 803be8e: 881b ldrh r3, [r3, #0] + 803be90: 4413 add r3, r2 + 803be92: b29b uxth r3, r3 + 803be94: 3b02 subs r3, #2 + 803be96: b29a uxth r2, r3 + 803be98: 4b0c ldr r3, [pc, #48] ; (803becc ) + 803be9a: 801a strh r2, [r3, #0] for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) { - 803be18: 4b0b ldr r3, [pc, #44] ; (803be48 ) - 803be1a: 881a ldrh r2, [r3, #0] - 803be1c: 4b09 ldr r3, [pc, #36] ; (803be44 ) - 803be1e: 881b ldrh r3, [r3, #0] - 803be20: 429a cmp r2, r3 - 803be22: d3b3 bcc.n 803bd8c - 803be24: e004 b.n 803be30 + 803be9c: 4b0b ldr r3, [pc, #44] ; (803becc ) + 803be9e: 881a ldrh r2, [r3, #0] + 803bea0: 4b09 ldr r3, [pc, #36] ; (803bec8 ) + 803bea2: 881b ldrh r3, [r3, #0] + 803bea4: 429a cmp r2, r3 + 803bea6: d3b3 bcc.n 803be10 + 803bea8: e004 b.n 803beb4 return; - 803be26: bf00 nop - 803be28: e002 b.n 803be30 + 803beaa: bf00 nop + 803beac: e002 b.n 803beb4 return; - 803be2a: bf00 nop - 803be2c: e000 b.n 803be30 + 803beae: bf00 nop + 803beb0: e000 b.n 803beb4 return; - 803be2e: bf00 nop + 803beb2: bf00 nop } } } } - 803be30: 3710 adds r7, #16 - 803be32: 46bd mov sp, r7 - 803be34: bd80 pop {r7, pc} - 803be36: bf00 nop - 803be38: 08043500 .word 0x08043500 - 803be3c: 08043964 .word 0x08043964 - 803be40: 0804354c .word 0x0804354c - 803be44: 2400e984 .word 0x2400e984 - 803be48: 2400e98c .word 0x2400e98c + 803beb4: 3710 adds r7, #16 + 803beb6: 46bd mov sp, r7 + 803beb8: bd80 pop {r7, pc} + 803beba: bf00 nop + 803bebc: 08043580 .word 0x08043580 + 803bec0: 080439e4 .word 0x080439e4 + 803bec4: 080435cc .word 0x080435cc + 803bec8: 2400e98c .word 0x2400e98c + 803becc: 2400e994 .word 0x2400e994 -0803be4c : +0803bed0 : void tcp_trigger_input_pcb_close(void) { - 803be4c: b480 push {r7} - 803be4e: af00 add r7, sp, #0 + 803bed0: b480 push {r7} + 803bed2: af00 add r7, sp, #0 recv_flags |= TF_CLOSED; - 803be50: 4b05 ldr r3, [pc, #20] ; (803be68 ) - 803be52: 781b ldrb r3, [r3, #0] - 803be54: f043 0310 orr.w r3, r3, #16 - 803be58: b2da uxtb r2, r3 - 803be5a: 4b03 ldr r3, [pc, #12] ; (803be68 ) - 803be5c: 701a strb r2, [r3, #0] -} - 803be5e: bf00 nop - 803be60: 46bd mov sp, r7 - 803be62: f85d 7b04 ldr.w r7, [sp], #4 - 803be66: 4770 bx lr - 803be68: 2400e99d .word 0x2400e99d - -0803be6c : + 803bed4: 4b05 ldr r3, [pc, #20] ; (803beec ) + 803bed6: 781b ldrb r3, [r3, #0] + 803bed8: f043 0310 orr.w r3, r3, #16 + 803bedc: b2da uxtb r2, r3 + 803bede: 4b03 ldr r3, [pc, #12] ; (803beec ) + 803bee0: 701a strb r2, [r3, #0] +} + 803bee2: bf00 nop + 803bee4: 46bd mov sp, r7 + 803bee6: f85d 7b04 ldr.w r7, [sp], #4 + 803beea: 4770 bx lr + 803beec: 2400e9a5 .word 0x2400e9a5 + +0803bef0 : static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif); /* tcp_route: common code that returns a fixed bound netif or calls ip_route */ static struct netif * tcp_route(const struct tcp_pcb *pcb, const ip_addr_t *src, const ip_addr_t *dst) { - 803be6c: b580 push {r7, lr} - 803be6e: b084 sub sp, #16 - 803be70: af00 add r7, sp, #0 - 803be72: 60f8 str r0, [r7, #12] - 803be74: 60b9 str r1, [r7, #8] - 803be76: 607a str r2, [r7, #4] + 803bef0: b580 push {r7, lr} + 803bef2: b084 sub sp, #16 + 803bef4: af00 add r7, sp, #0 + 803bef6: 60f8 str r0, [r7, #12] + 803bef8: 60b9 str r1, [r7, #8] + 803befa: 607a str r2, [r7, #4] LWIP_UNUSED_ARG(src); /* in case IPv4-only and source-based routing is disabled */ if ((pcb != NULL) && (pcb->netif_idx != NETIF_NO_INDEX)) { - 803be78: 68fb ldr r3, [r7, #12] - 803be7a: 2b00 cmp r3, #0 - 803be7c: d00a beq.n 803be94 - 803be7e: 68fb ldr r3, [r7, #12] - 803be80: 7a1b ldrb r3, [r3, #8] - 803be82: 2b00 cmp r3, #0 - 803be84: d006 beq.n 803be94 + 803befc: 68fb ldr r3, [r7, #12] + 803befe: 2b00 cmp r3, #0 + 803bf00: d00a beq.n 803bf18 + 803bf02: 68fb ldr r3, [r7, #12] + 803bf04: 7a1b ldrb r3, [r3, #8] + 803bf06: 2b00 cmp r3, #0 + 803bf08: d006 beq.n 803bf18 return netif_get_by_index(pcb->netif_idx); - 803be86: 68fb ldr r3, [r7, #12] - 803be88: 7a1b ldrb r3, [r3, #8] - 803be8a: 4618 mov r0, r3 - 803be8c: f7fb f8f6 bl 803707c - 803be90: 4603 mov r3, r0 - 803be92: e003 b.n 803be9c + 803bf0a: 68fb ldr r3, [r7, #12] + 803bf0c: 7a1b ldrb r3, [r3, #8] + 803bf0e: 4618 mov r0, r3 + 803bf10: f7fb f8f6 bl 8037100 + 803bf14: 4603 mov r3, r0 + 803bf16: e003 b.n 803bf20 } else { return ip_route(src, dst); - 803be94: 6878 ldr r0, [r7, #4] - 803be96: f003 fafb bl 803f490 - 803be9a: 4603 mov r3, r0 + 803bf18: 6878 ldr r0, [r7, #4] + 803bf1a: f003 fafb bl 803f514 + 803bf1e: 4603 mov r3, r0 } } - 803be9c: 4618 mov r0, r3 - 803be9e: 3710 adds r7, #16 - 803bea0: 46bd mov sp, r7 - 803bea2: bd80 pop {r7, pc} + 803bf20: 4618 mov r0, r3 + 803bf22: 3710 adds r7, #16 + 803bf24: 46bd mov sp, r7 + 803bf26: bd80 pop {r7, pc} -0803bea4 : +0803bf28 : * The TCP header is filled in except ackno and wnd. * p is freed on failure. */ static struct tcp_seg * tcp_create_segment(const struct tcp_pcb *pcb, struct pbuf *p, u8_t hdrflags, u32_t seqno, u8_t optflags) { - 803bea4: b590 push {r4, r7, lr} - 803bea6: b087 sub sp, #28 - 803bea8: af00 add r7, sp, #0 - 803beaa: 60f8 str r0, [r7, #12] - 803beac: 60b9 str r1, [r7, #8] - 803beae: 603b str r3, [r7, #0] - 803beb0: 4613 mov r3, r2 - 803beb2: 71fb strb r3, [r7, #7] + 803bf28: b590 push {r4, r7, lr} + 803bf2a: b087 sub sp, #28 + 803bf2c: af00 add r7, sp, #0 + 803bf2e: 60f8 str r0, [r7, #12] + 803bf30: 60b9 str r1, [r7, #8] + 803bf32: 603b str r3, [r7, #0] + 803bf34: 4613 mov r3, r2 + 803bf36: 71fb strb r3, [r7, #7] struct tcp_seg *seg; u8_t optlen; LWIP_ASSERT("tcp_create_segment: invalid pcb", pcb != NULL); - 803beb4: 68fb ldr r3, [r7, #12] - 803beb6: 2b00 cmp r3, #0 - 803beb8: d105 bne.n 803bec6 - 803beba: 4b44 ldr r3, [pc, #272] ; (803bfcc ) - 803bebc: 22a3 movs r2, #163 ; 0xa3 - 803bebe: 4944 ldr r1, [pc, #272] ; (803bfd0 ) - 803bec0: 4844 ldr r0, [pc, #272] ; (803bfd4 ) - 803bec2: f004 fe25 bl 8040b10 + 803bf38: 68fb ldr r3, [r7, #12] + 803bf3a: 2b00 cmp r3, #0 + 803bf3c: d105 bne.n 803bf4a + 803bf3e: 4b44 ldr r3, [pc, #272] ; (803c050 ) + 803bf40: 22a3 movs r2, #163 ; 0xa3 + 803bf42: 4944 ldr r1, [pc, #272] ; (803c054 ) + 803bf44: 4844 ldr r0, [pc, #272] ; (803c058 ) + 803bf46: f004 fe25 bl 8040b94 LWIP_ASSERT("tcp_create_segment: invalid pbuf", p != NULL); - 803bec6: 68bb ldr r3, [r7, #8] - 803bec8: 2b00 cmp r3, #0 - 803beca: d105 bne.n 803bed8 - 803becc: 4b3f ldr r3, [pc, #252] ; (803bfcc ) - 803bece: 22a4 movs r2, #164 ; 0xa4 - 803bed0: 4941 ldr r1, [pc, #260] ; (803bfd8 ) - 803bed2: 4840 ldr r0, [pc, #256] ; (803bfd4 ) - 803bed4: f004 fe1c bl 8040b10 + 803bf4a: 68bb ldr r3, [r7, #8] + 803bf4c: 2b00 cmp r3, #0 + 803bf4e: d105 bne.n 803bf5c + 803bf50: 4b3f ldr r3, [pc, #252] ; (803c050 ) + 803bf52: 22a4 movs r2, #164 ; 0xa4 + 803bf54: 4941 ldr r1, [pc, #260] ; (803c05c ) + 803bf56: 4840 ldr r0, [pc, #256] ; (803c058 ) + 803bf58: f004 fe1c bl 8040b94 optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb); - 803bed8: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 - 803bedc: 009b lsls r3, r3, #2 - 803bede: b2db uxtb r3, r3 - 803bee0: f003 0304 and.w r3, r3, #4 - 803bee4: 75fb strb r3, [r7, #23] + 803bf5c: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 + 803bf60: 009b lsls r3, r3, #2 + 803bf62: b2db uxtb r3, r3 + 803bf64: f003 0304 and.w r3, r3, #4 + 803bf68: 75fb strb r3, [r7, #23] if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) { - 803bee6: 2003 movs r0, #3 - 803bee8: f7fa fd26 bl 8036938 - 803beec: 6138 str r0, [r7, #16] - 803beee: 693b ldr r3, [r7, #16] - 803bef0: 2b00 cmp r3, #0 - 803bef2: d104 bne.n 803befe + 803bf6a: 2003 movs r0, #3 + 803bf6c: f7fa fd26 bl 80369bc + 803bf70: 6138 str r0, [r7, #16] + 803bf72: 693b ldr r3, [r7, #16] + 803bf74: 2b00 cmp r3, #0 + 803bf76: d104 bne.n 803bf82 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no memory.\n")); pbuf_free(p); - 803bef4: 68b8 ldr r0, [r7, #8] - 803bef6: f7fb fc21 bl 803773c + 803bf78: 68b8 ldr r0, [r7, #8] + 803bf7a: f7fb fc21 bl 80377c0 return NULL; - 803befa: 2300 movs r3, #0 - 803befc: e061 b.n 803bfc2 + 803bf7e: 2300 movs r3, #0 + 803bf80: e061 b.n 803c046 } seg->flags = optflags; - 803befe: 693b ldr r3, [r7, #16] - 803bf00: f897 2028 ldrb.w r2, [r7, #40] ; 0x28 - 803bf04: 729a strb r2, [r3, #10] + 803bf82: 693b ldr r3, [r7, #16] + 803bf84: f897 2028 ldrb.w r2, [r7, #40] ; 0x28 + 803bf88: 729a strb r2, [r3, #10] seg->next = NULL; - 803bf06: 693b ldr r3, [r7, #16] - 803bf08: 2200 movs r2, #0 - 803bf0a: 601a str r2, [r3, #0] + 803bf8a: 693b ldr r3, [r7, #16] + 803bf8c: 2200 movs r2, #0 + 803bf8e: 601a str r2, [r3, #0] seg->p = p; - 803bf0c: 693b ldr r3, [r7, #16] - 803bf0e: 68ba ldr r2, [r7, #8] - 803bf10: 605a str r2, [r3, #4] + 803bf90: 693b ldr r3, [r7, #16] + 803bf92: 68ba ldr r2, [r7, #8] + 803bf94: 605a str r2, [r3, #4] LWIP_ASSERT("p->tot_len >= optlen", p->tot_len >= optlen); - 803bf12: 68bb ldr r3, [r7, #8] - 803bf14: 891a ldrh r2, [r3, #8] - 803bf16: 7dfb ldrb r3, [r7, #23] - 803bf18: b29b uxth r3, r3 - 803bf1a: 429a cmp r2, r3 - 803bf1c: d205 bcs.n 803bf2a - 803bf1e: 4b2b ldr r3, [pc, #172] ; (803bfcc ) - 803bf20: 22b0 movs r2, #176 ; 0xb0 - 803bf22: 492e ldr r1, [pc, #184] ; (803bfdc ) - 803bf24: 482b ldr r0, [pc, #172] ; (803bfd4 ) - 803bf26: f004 fdf3 bl 8040b10 + 803bf96: 68bb ldr r3, [r7, #8] + 803bf98: 891a ldrh r2, [r3, #8] + 803bf9a: 7dfb ldrb r3, [r7, #23] + 803bf9c: b29b uxth r3, r3 + 803bf9e: 429a cmp r2, r3 + 803bfa0: d205 bcs.n 803bfae + 803bfa2: 4b2b ldr r3, [pc, #172] ; (803c050 ) + 803bfa4: 22b0 movs r2, #176 ; 0xb0 + 803bfa6: 492e ldr r1, [pc, #184] ; (803c060 ) + 803bfa8: 482b ldr r0, [pc, #172] ; (803c058 ) + 803bfaa: f004 fdf3 bl 8040b94 seg->len = p->tot_len - optlen; - 803bf2a: 68bb ldr r3, [r7, #8] - 803bf2c: 891a ldrh r2, [r3, #8] - 803bf2e: 7dfb ldrb r3, [r7, #23] - 803bf30: b29b uxth r3, r3 - 803bf32: 1ad3 subs r3, r2, r3 - 803bf34: b29a uxth r2, r3 - 803bf36: 693b ldr r3, [r7, #16] - 803bf38: 811a strh r2, [r3, #8] + 803bfae: 68bb ldr r3, [r7, #8] + 803bfb0: 891a ldrh r2, [r3, #8] + 803bfb2: 7dfb ldrb r3, [r7, #23] + 803bfb4: b29b uxth r3, r3 + 803bfb6: 1ad3 subs r3, r2, r3 + 803bfb8: b29a uxth r2, r3 + 803bfba: 693b ldr r3, [r7, #16] + 803bfbc: 811a strh r2, [r3, #8] LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED", (optflags & TF_SEG_DATA_CHECKSUMMED) == 0); #endif /* TCP_CHECKSUM_ON_COPY */ /* build TCP header */ if (pbuf_add_header(p, TCP_HLEN)) { - 803bf3a: 2114 movs r1, #20 - 803bf3c: 68b8 ldr r0, [r7, #8] - 803bf3e: f7fb fb67 bl 8037610 - 803bf42: 4603 mov r3, r0 - 803bf44: 2b00 cmp r3, #0 - 803bf46: d004 beq.n 803bf52 + 803bfbe: 2114 movs r1, #20 + 803bfc0: 68b8 ldr r0, [r7, #8] + 803bfc2: f7fb fb67 bl 8037694 + 803bfc6: 4603 mov r3, r0 + 803bfc8: 2b00 cmp r3, #0 + 803bfca: d004 beq.n 803bfd6 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no room for TCP header in pbuf.\n")); TCP_STATS_INC(tcp.err); tcp_seg_free(seg); - 803bf48: 6938 ldr r0, [r7, #16] - 803bf4a: f7fd f824 bl 8038f96 + 803bfcc: 6938 ldr r0, [r7, #16] + 803bfce: f7fd f824 bl 803901a return NULL; - 803bf4e: 2300 movs r3, #0 - 803bf50: e037 b.n 803bfc2 + 803bfd2: 2300 movs r3, #0 + 803bfd4: e037 b.n 803c046 } seg->tcphdr = (struct tcp_hdr *)seg->p->payload; - 803bf52: 693b ldr r3, [r7, #16] - 803bf54: 685b ldr r3, [r3, #4] - 803bf56: 685a ldr r2, [r3, #4] - 803bf58: 693b ldr r3, [r7, #16] - 803bf5a: 60da str r2, [r3, #12] + 803bfd6: 693b ldr r3, [r7, #16] + 803bfd8: 685b ldr r3, [r3, #4] + 803bfda: 685a ldr r2, [r3, #4] + 803bfdc: 693b ldr r3, [r7, #16] + 803bfde: 60da str r2, [r3, #12] seg->tcphdr->src = lwip_htons(pcb->local_port); - 803bf5c: 68fb ldr r3, [r7, #12] - 803bf5e: 8ada ldrh r2, [r3, #22] - 803bf60: 693b ldr r3, [r7, #16] - 803bf62: 68dc ldr r4, [r3, #12] - 803bf64: 4610 mov r0, r2 - 803bf66: f7f9 ffb7 bl 8035ed8 - 803bf6a: 4603 mov r3, r0 - 803bf6c: 8023 strh r3, [r4, #0] + 803bfe0: 68fb ldr r3, [r7, #12] + 803bfe2: 8ada ldrh r2, [r3, #22] + 803bfe4: 693b ldr r3, [r7, #16] + 803bfe6: 68dc ldr r4, [r3, #12] + 803bfe8: 4610 mov r0, r2 + 803bfea: f7f9 ffb7 bl 8035f5c + 803bfee: 4603 mov r3, r0 + 803bff0: 8023 strh r3, [r4, #0] seg->tcphdr->dest = lwip_htons(pcb->remote_port); - 803bf6e: 68fb ldr r3, [r7, #12] - 803bf70: 8b1a ldrh r2, [r3, #24] - 803bf72: 693b ldr r3, [r7, #16] - 803bf74: 68dc ldr r4, [r3, #12] - 803bf76: 4610 mov r0, r2 - 803bf78: f7f9 ffae bl 8035ed8 - 803bf7c: 4603 mov r3, r0 - 803bf7e: 8063 strh r3, [r4, #2] + 803bff2: 68fb ldr r3, [r7, #12] + 803bff4: 8b1a ldrh r2, [r3, #24] + 803bff6: 693b ldr r3, [r7, #16] + 803bff8: 68dc ldr r4, [r3, #12] + 803bffa: 4610 mov r0, r2 + 803bffc: f7f9 ffae bl 8035f5c + 803c000: 4603 mov r3, r0 + 803c002: 8063 strh r3, [r4, #2] seg->tcphdr->seqno = lwip_htonl(seqno); - 803bf80: 693b ldr r3, [r7, #16] - 803bf82: 68dc ldr r4, [r3, #12] - 803bf84: 6838 ldr r0, [r7, #0] - 803bf86: f7f9 ffbc bl 8035f02 - 803bf8a: 4603 mov r3, r0 - 803bf8c: 6063 str r3, [r4, #4] + 803c004: 693b ldr r3, [r7, #16] + 803c006: 68dc ldr r4, [r3, #12] + 803c008: 6838 ldr r0, [r7, #0] + 803c00a: f7f9 ffbc bl 8035f86 + 803c00e: 4603 mov r3, r0 + 803c010: 6063 str r3, [r4, #4] /* ackno is set in tcp_output */ TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), hdrflags); - 803bf8e: 7dfb ldrb r3, [r7, #23] - 803bf90: 089b lsrs r3, r3, #2 - 803bf92: b2db uxtb r3, r3 - 803bf94: b29b uxth r3, r3 - 803bf96: 3305 adds r3, #5 - 803bf98: b29b uxth r3, r3 - 803bf9a: 031b lsls r3, r3, #12 - 803bf9c: b29a uxth r2, r3 - 803bf9e: 79fb ldrb r3, [r7, #7] - 803bfa0: b29b uxth r3, r3 - 803bfa2: 4313 orrs r3, r2 - 803bfa4: b29a uxth r2, r3 - 803bfa6: 693b ldr r3, [r7, #16] - 803bfa8: 68dc ldr r4, [r3, #12] - 803bfaa: 4610 mov r0, r2 - 803bfac: f7f9 ff94 bl 8035ed8 - 803bfb0: 4603 mov r3, r0 - 803bfb2: 81a3 strh r3, [r4, #12] + 803c012: 7dfb ldrb r3, [r7, #23] + 803c014: 089b lsrs r3, r3, #2 + 803c016: b2db uxtb r3, r3 + 803c018: b29b uxth r3, r3 + 803c01a: 3305 adds r3, #5 + 803c01c: b29b uxth r3, r3 + 803c01e: 031b lsls r3, r3, #12 + 803c020: b29a uxth r2, r3 + 803c022: 79fb ldrb r3, [r7, #7] + 803c024: b29b uxth r3, r3 + 803c026: 4313 orrs r3, r2 + 803c028: b29a uxth r2, r3 + 803c02a: 693b ldr r3, [r7, #16] + 803c02c: 68dc ldr r4, [r3, #12] + 803c02e: 4610 mov r0, r2 + 803c030: f7f9 ff94 bl 8035f5c + 803c034: 4603 mov r3, r0 + 803c036: 81a3 strh r3, [r4, #12] /* wnd and chksum are set in tcp_output */ seg->tcphdr->urgp = 0; - 803bfb4: 693b ldr r3, [r7, #16] - 803bfb6: 68db ldr r3, [r3, #12] - 803bfb8: 2200 movs r2, #0 - 803bfba: 749a strb r2, [r3, #18] - 803bfbc: 2200 movs r2, #0 - 803bfbe: 74da strb r2, [r3, #19] + 803c038: 693b ldr r3, [r7, #16] + 803c03a: 68db ldr r3, [r3, #12] + 803c03c: 2200 movs r2, #0 + 803c03e: 749a strb r2, [r3, #18] + 803c040: 2200 movs r2, #0 + 803c042: 74da strb r2, [r3, #19] return seg; - 803bfc0: 693b ldr r3, [r7, #16] -} - 803bfc2: 4618 mov r0, r3 - 803bfc4: 371c adds r7, #28 - 803bfc6: 46bd mov sp, r7 - 803bfc8: bd90 pop {r4, r7, pc} - 803bfca: bf00 nop - 803bfcc: 08043980 .word 0x08043980 - 803bfd0: 080439b4 .word 0x080439b4 - 803bfd4: 080439d4 .word 0x080439d4 - 803bfd8: 080439fc .word 0x080439fc - 803bfdc: 08043a20 .word 0x08043a20 - -0803bfe0 : + 803c044: 693b ldr r3, [r7, #16] +} + 803c046: 4618 mov r0, r3 + 803c048: 371c adds r7, #28 + 803c04a: 46bd mov sp, r7 + 803c04c: bd90 pop {r4, r7, pc} + 803c04e: bf00 nop + 803c050: 08043a00 .word 0x08043a00 + 803c054: 08043a34 .word 0x08043a34 + 803c058: 08043a54 .word 0x08043a54 + 803c05c: 08043a7c .word 0x08043a7c + 803c060: 08043aa0 .word 0x08043aa0 + +0803c064 : #if TCP_OVERSIZE static struct pbuf * tcp_pbuf_prealloc(pbuf_layer layer, u16_t length, u16_t max_length, u16_t *oversize, const struct tcp_pcb *pcb, u8_t apiflags, u8_t first_seg) { - 803bfe0: b580 push {r7, lr} - 803bfe2: b086 sub sp, #24 - 803bfe4: af00 add r7, sp, #0 - 803bfe6: 607b str r3, [r7, #4] - 803bfe8: 4603 mov r3, r0 - 803bfea: 73fb strb r3, [r7, #15] - 803bfec: 460b mov r3, r1 - 803bfee: 81bb strh r3, [r7, #12] - 803bff0: 4613 mov r3, r2 - 803bff2: 817b strh r3, [r7, #10] + 803c064: b580 push {r7, lr} + 803c066: b086 sub sp, #24 + 803c068: af00 add r7, sp, #0 + 803c06a: 607b str r3, [r7, #4] + 803c06c: 4603 mov r3, r0 + 803c06e: 73fb strb r3, [r7, #15] + 803c070: 460b mov r3, r1 + 803c072: 81bb strh r3, [r7, #12] + 803c074: 4613 mov r3, r2 + 803c076: 817b strh r3, [r7, #10] struct pbuf *p; u16_t alloc = length; - 803bff4: 89bb ldrh r3, [r7, #12] - 803bff6: 82fb strh r3, [r7, #22] + 803c078: 89bb ldrh r3, [r7, #12] + 803c07a: 82fb strh r3, [r7, #22] LWIP_ASSERT("tcp_pbuf_prealloc: invalid oversize", oversize != NULL); - 803bff8: 687b ldr r3, [r7, #4] - 803bffa: 2b00 cmp r3, #0 - 803bffc: d105 bne.n 803c00a - 803bffe: 4b30 ldr r3, [pc, #192] ; (803c0c0 ) - 803c000: 22e8 movs r2, #232 ; 0xe8 - 803c002: 4930 ldr r1, [pc, #192] ; (803c0c4 ) - 803c004: 4830 ldr r0, [pc, #192] ; (803c0c8 ) - 803c006: f004 fd83 bl 8040b10 + 803c07c: 687b ldr r3, [r7, #4] + 803c07e: 2b00 cmp r3, #0 + 803c080: d105 bne.n 803c08e + 803c082: 4b30 ldr r3, [pc, #192] ; (803c144 ) + 803c084: 22e8 movs r2, #232 ; 0xe8 + 803c086: 4930 ldr r1, [pc, #192] ; (803c148 ) + 803c088: 4830 ldr r0, [pc, #192] ; (803c14c ) + 803c08a: f004 fd83 bl 8040b94 LWIP_ASSERT("tcp_pbuf_prealloc: invalid pcb", pcb != NULL); - 803c00a: 6a3b ldr r3, [r7, #32] - 803c00c: 2b00 cmp r3, #0 - 803c00e: d105 bne.n 803c01c - 803c010: 4b2b ldr r3, [pc, #172] ; (803c0c0 ) - 803c012: 22e9 movs r2, #233 ; 0xe9 - 803c014: 492d ldr r1, [pc, #180] ; (803c0cc ) - 803c016: 482c ldr r0, [pc, #176] ; (803c0c8 ) - 803c018: f004 fd7a bl 8040b10 + 803c08e: 6a3b ldr r3, [r7, #32] + 803c090: 2b00 cmp r3, #0 + 803c092: d105 bne.n 803c0a0 + 803c094: 4b2b ldr r3, [pc, #172] ; (803c144 ) + 803c096: 22e9 movs r2, #233 ; 0xe9 + 803c098: 492d ldr r1, [pc, #180] ; (803c150 ) + 803c09a: 482c ldr r0, [pc, #176] ; (803c14c ) + 803c09c: f004 fd7a bl 8040b94 LWIP_UNUSED_ARG(pcb); LWIP_UNUSED_ARG(apiflags); LWIP_UNUSED_ARG(first_seg); alloc = max_length; #else /* LWIP_NETIF_TX_SINGLE_PBUF */ if (length < max_length) { - 803c01c: 89ba ldrh r2, [r7, #12] - 803c01e: 897b ldrh r3, [r7, #10] - 803c020: 429a cmp r2, r3 - 803c022: d221 bcs.n 803c068 + 803c0a0: 89ba ldrh r2, [r7, #12] + 803c0a2: 897b ldrh r3, [r7, #10] + 803c0a4: 429a cmp r2, r3 + 803c0a6: d221 bcs.n 803c0ec * * Did the user set TCP_WRITE_FLAG_MORE? * * Will the Nagle algorithm defer transmission of this segment? */ if ((apiflags & TCP_WRITE_FLAG_MORE) || - 803c024: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 - 803c028: f003 0302 and.w r3, r3, #2 - 803c02c: 2b00 cmp r3, #0 - 803c02e: d111 bne.n 803c054 + 803c0a8: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 + 803c0ac: f003 0302 and.w r3, r3, #2 + 803c0b0: 2b00 cmp r3, #0 + 803c0b2: d111 bne.n 803c0d8 (!(pcb->flags & TF_NODELAY) && - 803c030: 6a3b ldr r3, [r7, #32] - 803c032: 8b5b ldrh r3, [r3, #26] - 803c034: f003 0340 and.w r3, r3, #64 ; 0x40 + 803c0b4: 6a3b ldr r3, [r7, #32] + 803c0b6: 8b5b ldrh r3, [r3, #26] + 803c0b8: f003 0340 and.w r3, r3, #64 ; 0x40 if ((apiflags & TCP_WRITE_FLAG_MORE) || - 803c038: 2b00 cmp r3, #0 - 803c03a: d115 bne.n 803c068 + 803c0bc: 2b00 cmp r3, #0 + 803c0be: d115 bne.n 803c0ec (!(pcb->flags & TF_NODELAY) && - 803c03c: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 - 803c040: 2b00 cmp r3, #0 - 803c042: d007 beq.n 803c054 + 803c0c0: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 + 803c0c4: 2b00 cmp r3, #0 + 803c0c6: d007 beq.n 803c0d8 (!first_seg || pcb->unsent != NULL || - 803c044: 6a3b ldr r3, [r7, #32] - 803c046: 6edb ldr r3, [r3, #108] ; 0x6c + 803c0c8: 6a3b ldr r3, [r7, #32] + 803c0ca: 6edb ldr r3, [r3, #108] ; 0x6c (!first_seg || - 803c048: 2b00 cmp r3, #0 - 803c04a: d103 bne.n 803c054 + 803c0cc: 2b00 cmp r3, #0 + 803c0ce: d103 bne.n 803c0d8 pcb->unacked != NULL))) { - 803c04c: 6a3b ldr r3, [r7, #32] - 803c04e: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c0d0: 6a3b ldr r3, [r7, #32] + 803c0d2: 6f1b ldr r3, [r3, #112] ; 0x70 pcb->unsent != NULL || - 803c050: 2b00 cmp r3, #0 - 803c052: d009 beq.n 803c068 + 803c0d4: 2b00 cmp r3, #0 + 803c0d6: d009 beq.n 803c0ec alloc = LWIP_MIN(max_length, LWIP_MEM_ALIGN_SIZE(TCP_OVERSIZE_CALC_LENGTH(length))); - 803c054: 89bb ldrh r3, [r7, #12] - 803c056: f203 231b addw r3, r3, #539 ; 0x21b - 803c05a: f023 0203 bic.w r2, r3, #3 - 803c05e: 897b ldrh r3, [r7, #10] - 803c060: 4293 cmp r3, r2 - 803c062: bf28 it cs - 803c064: 4613 movcs r3, r2 - 803c066: 82fb strh r3, [r7, #22] + 803c0d8: 89bb ldrh r3, [r7, #12] + 803c0da: f203 231b addw r3, r3, #539 ; 0x21b + 803c0de: f023 0203 bic.w r2, r3, #3 + 803c0e2: 897b ldrh r3, [r7, #10] + 803c0e4: 4293 cmp r3, r2 + 803c0e6: bf28 it cs + 803c0e8: 4613 movcs r3, r2 + 803c0ea: 82fb strh r3, [r7, #22] } } #endif /* LWIP_NETIF_TX_SINGLE_PBUF */ p = pbuf_alloc(layer, alloc, PBUF_RAM); - 803c068: 8af9 ldrh r1, [r7, #22] - 803c06a: 7bfb ldrb r3, [r7, #15] - 803c06c: f44f 7220 mov.w r2, #640 ; 0x280 - 803c070: 4618 mov r0, r3 - 803c072: f7fb f87f bl 8037174 - 803c076: 6138 str r0, [r7, #16] + 803c0ec: 8af9 ldrh r1, [r7, #22] + 803c0ee: 7bfb ldrb r3, [r7, #15] + 803c0f0: f44f 7220 mov.w r2, #640 ; 0x280 + 803c0f4: 4618 mov r0, r3 + 803c0f6: f7fb f87f bl 80371f8 + 803c0fa: 6138 str r0, [r7, #16] if (p == NULL) { - 803c078: 693b ldr r3, [r7, #16] - 803c07a: 2b00 cmp r3, #0 - 803c07c: d101 bne.n 803c082 + 803c0fc: 693b ldr r3, [r7, #16] + 803c0fe: 2b00 cmp r3, #0 + 803c100: d101 bne.n 803c106 return NULL; - 803c07e: 2300 movs r3, #0 - 803c080: e019 b.n 803c0b6 + 803c102: 2300 movs r3, #0 + 803c104: e019 b.n 803c13a } LWIP_ASSERT("need unchained pbuf", p->next == NULL); - 803c082: 693b ldr r3, [r7, #16] - 803c084: 681b ldr r3, [r3, #0] - 803c086: 2b00 cmp r3, #0 - 803c088: d006 beq.n 803c098 - 803c08a: 4b0d ldr r3, [pc, #52] ; (803c0c0 ) - 803c08c: f240 120b movw r2, #267 ; 0x10b - 803c090: 490f ldr r1, [pc, #60] ; (803c0d0 ) - 803c092: 480d ldr r0, [pc, #52] ; (803c0c8 ) - 803c094: f004 fd3c bl 8040b10 + 803c106: 693b ldr r3, [r7, #16] + 803c108: 681b ldr r3, [r3, #0] + 803c10a: 2b00 cmp r3, #0 + 803c10c: d006 beq.n 803c11c + 803c10e: 4b0d ldr r3, [pc, #52] ; (803c144 ) + 803c110: f240 120b movw r2, #267 ; 0x10b + 803c114: 490f ldr r1, [pc, #60] ; (803c154 ) + 803c116: 480d ldr r0, [pc, #52] ; (803c14c ) + 803c118: f004 fd3c bl 8040b94 *oversize = p->len - length; - 803c098: 693b ldr r3, [r7, #16] - 803c09a: 895a ldrh r2, [r3, #10] - 803c09c: 89bb ldrh r3, [r7, #12] - 803c09e: 1ad3 subs r3, r2, r3 - 803c0a0: b29a uxth r2, r3 - 803c0a2: 687b ldr r3, [r7, #4] - 803c0a4: 801a strh r2, [r3, #0] + 803c11c: 693b ldr r3, [r7, #16] + 803c11e: 895a ldrh r2, [r3, #10] + 803c120: 89bb ldrh r3, [r7, #12] + 803c122: 1ad3 subs r3, r2, r3 + 803c124: b29a uxth r2, r3 + 803c126: 687b ldr r3, [r7, #4] + 803c128: 801a strh r2, [r3, #0] /* trim p->len to the currently used size */ p->len = p->tot_len = length; - 803c0a6: 693b ldr r3, [r7, #16] - 803c0a8: 89ba ldrh r2, [r7, #12] - 803c0aa: 811a strh r2, [r3, #8] - 803c0ac: 693b ldr r3, [r7, #16] - 803c0ae: 891a ldrh r2, [r3, #8] - 803c0b0: 693b ldr r3, [r7, #16] - 803c0b2: 815a strh r2, [r3, #10] + 803c12a: 693b ldr r3, [r7, #16] + 803c12c: 89ba ldrh r2, [r7, #12] + 803c12e: 811a strh r2, [r3, #8] + 803c130: 693b ldr r3, [r7, #16] + 803c132: 891a ldrh r2, [r3, #8] + 803c134: 693b ldr r3, [r7, #16] + 803c136: 815a strh r2, [r3, #10] return p; - 803c0b4: 693b ldr r3, [r7, #16] -} - 803c0b6: 4618 mov r0, r3 - 803c0b8: 3718 adds r7, #24 - 803c0ba: 46bd mov sp, r7 - 803c0bc: bd80 pop {r7, pc} - 803c0be: bf00 nop - 803c0c0: 08043980 .word 0x08043980 - 803c0c4: 08043a38 .word 0x08043a38 - 803c0c8: 080439d4 .word 0x080439d4 - 803c0cc: 08043a5c .word 0x08043a5c - 803c0d0: 08043a7c .word 0x08043a7c - -0803c0d4 : + 803c138: 693b ldr r3, [r7, #16] +} + 803c13a: 4618 mov r0, r3 + 803c13c: 3718 adds r7, #24 + 803c13e: 46bd mov sp, r7 + 803c140: bd80 pop {r7, pc} + 803c142: bf00 nop + 803c144: 08043a00 .word 0x08043a00 + 803c148: 08043ab8 .word 0x08043ab8 + 803c14c: 08043a54 .word 0x08043a54 + 803c150: 08043adc .word 0x08043adc + 803c154: 08043afc .word 0x08043afc + +0803c158 : * @param len length of data to send (checked agains snd_buf) * @return ERR_OK if tcp_write is allowed to proceed, another err_t otherwise */ static err_t tcp_write_checks(struct tcp_pcb *pcb, u16_t len) { - 803c0d4: b580 push {r7, lr} - 803c0d6: b082 sub sp, #8 - 803c0d8: af00 add r7, sp, #0 - 803c0da: 6078 str r0, [r7, #4] - 803c0dc: 460b mov r3, r1 - 803c0de: 807b strh r3, [r7, #2] + 803c158: b580 push {r7, lr} + 803c15a: b082 sub sp, #8 + 803c15c: af00 add r7, sp, #0 + 803c15e: 6078 str r0, [r7, #4] + 803c160: 460b mov r3, r1 + 803c162: 807b strh r3, [r7, #2] LWIP_ASSERT("tcp_write_checks: invalid pcb", pcb != NULL); - 803c0e0: 687b ldr r3, [r7, #4] - 803c0e2: 2b00 cmp r3, #0 - 803c0e4: d106 bne.n 803c0f4 - 803c0e6: 4b33 ldr r3, [pc, #204] ; (803c1b4 ) - 803c0e8: f240 1233 movw r2, #307 ; 0x133 - 803c0ec: 4932 ldr r1, [pc, #200] ; (803c1b8 ) - 803c0ee: 4833 ldr r0, [pc, #204] ; (803c1bc ) - 803c0f0: f004 fd0e bl 8040b10 + 803c164: 687b ldr r3, [r7, #4] + 803c166: 2b00 cmp r3, #0 + 803c168: d106 bne.n 803c178 + 803c16a: 4b33 ldr r3, [pc, #204] ; (803c238 ) + 803c16c: f240 1233 movw r2, #307 ; 0x133 + 803c170: 4932 ldr r1, [pc, #200] ; (803c23c ) + 803c172: 4833 ldr r0, [pc, #204] ; (803c240 ) + 803c174: f004 fd0e bl 8040b94 /* connection is in invalid state for data transmission? */ if ((pcb->state != ESTABLISHED) && - 803c0f4: 687b ldr r3, [r7, #4] - 803c0f6: 7d1b ldrb r3, [r3, #20] - 803c0f8: 2b04 cmp r3, #4 - 803c0fa: d00e beq.n 803c11a + 803c178: 687b ldr r3, [r7, #4] + 803c17a: 7d1b ldrb r3, [r3, #20] + 803c17c: 2b04 cmp r3, #4 + 803c17e: d00e beq.n 803c19e (pcb->state != CLOSE_WAIT) && - 803c0fc: 687b ldr r3, [r7, #4] - 803c0fe: 7d1b ldrb r3, [r3, #20] + 803c180: 687b ldr r3, [r7, #4] + 803c182: 7d1b ldrb r3, [r3, #20] if ((pcb->state != ESTABLISHED) && - 803c100: 2b07 cmp r3, #7 - 803c102: d00a beq.n 803c11a + 803c184: 2b07 cmp r3, #7 + 803c186: d00a beq.n 803c19e (pcb->state != SYN_SENT) && - 803c104: 687b ldr r3, [r7, #4] - 803c106: 7d1b ldrb r3, [r3, #20] + 803c188: 687b ldr r3, [r7, #4] + 803c18a: 7d1b ldrb r3, [r3, #20] (pcb->state != CLOSE_WAIT) && - 803c108: 2b02 cmp r3, #2 - 803c10a: d006 beq.n 803c11a + 803c18c: 2b02 cmp r3, #2 + 803c18e: d006 beq.n 803c19e (pcb->state != SYN_RCVD)) { - 803c10c: 687b ldr r3, [r7, #4] - 803c10e: 7d1b ldrb r3, [r3, #20] + 803c190: 687b ldr r3, [r7, #4] + 803c192: 7d1b ldrb r3, [r3, #20] (pcb->state != SYN_SENT) && - 803c110: 2b03 cmp r3, #3 - 803c112: d002 beq.n 803c11a + 803c194: 2b03 cmp r3, #3 + 803c196: d002 beq.n 803c19e LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n")); return ERR_CONN; - 803c114: f06f 030a mvn.w r3, #10 - 803c118: e048 b.n 803c1ac + 803c198: f06f 030a mvn.w r3, #10 + 803c19c: e048 b.n 803c230 } else if (len == 0) { - 803c11a: 887b ldrh r3, [r7, #2] - 803c11c: 2b00 cmp r3, #0 - 803c11e: d101 bne.n 803c124 + 803c19e: 887b ldrh r3, [r7, #2] + 803c1a0: 2b00 cmp r3, #0 + 803c1a2: d101 bne.n 803c1a8 return ERR_OK; - 803c120: 2300 movs r3, #0 - 803c122: e043 b.n 803c1ac + 803c1a4: 2300 movs r3, #0 + 803c1a6: e043 b.n 803c230 } /* fail on too much data */ if (len > pcb->snd_buf) { - 803c124: 687b ldr r3, [r7, #4] - 803c126: f8b3 3064 ldrh.w r3, [r3, #100] ; 0x64 - 803c12a: 887a ldrh r2, [r7, #2] - 803c12c: 429a cmp r2, r3 - 803c12e: d909 bls.n 803c144 + 803c1a8: 687b ldr r3, [r7, #4] + 803c1aa: f8b3 3064 ldrh.w r3, [r3, #100] ; 0x64 + 803c1ae: 887a ldrh r2, [r7, #2] + 803c1b0: 429a cmp r2, r3 + 803c1b2: d909 bls.n 803c1c8 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too much data (len=%"U16_F" > snd_buf=%"TCPWNDSIZE_F")\n", len, pcb->snd_buf)); tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803c130: 687b ldr r3, [r7, #4] - 803c132: 8b5b ldrh r3, [r3, #26] - 803c134: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803c138: b29a uxth r2, r3 - 803c13a: 687b ldr r3, [r7, #4] - 803c13c: 835a strh r2, [r3, #26] + 803c1b4: 687b ldr r3, [r7, #4] + 803c1b6: 8b5b ldrh r3, [r3, #26] + 803c1b8: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803c1bc: b29a uxth r2, r3 + 803c1be: 687b ldr r3, [r7, #4] + 803c1c0: 835a strh r2, [r3, #26] return ERR_MEM; - 803c13e: f04f 33ff mov.w r3, #4294967295 - 803c142: e033 b.n 803c1ac + 803c1c2: f04f 33ff mov.w r3, #4294967295 + 803c1c6: e033 b.n 803c230 LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: queuelen: %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen)); /* If total number of pbufs on the unsent/unacked queues exceeds the * configured maximum, return an error */ /* check for configured max queuelen and possible overflow */ if (pcb->snd_queuelen >= LWIP_MIN(TCP_SND_QUEUELEN, (TCP_SNDQUEUELEN_OVERFLOW + 1))) { - 803c144: 687b ldr r3, [r7, #4] - 803c146: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c14a: 2b08 cmp r3, #8 - 803c14c: d909 bls.n 803c162 + 803c1c8: 687b ldr r3, [r7, #4] + 803c1ca: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c1ce: 2b08 cmp r3, #8 + 803c1d0: d909 bls.n 803c1e6 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too long queue %"U16_F" (max %"U16_F")\n", pcb->snd_queuelen, (u16_t)TCP_SND_QUEUELEN)); TCP_STATS_INC(tcp.memerr); tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803c14e: 687b ldr r3, [r7, #4] - 803c150: 8b5b ldrh r3, [r3, #26] - 803c152: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803c156: b29a uxth r2, r3 - 803c158: 687b ldr r3, [r7, #4] - 803c15a: 835a strh r2, [r3, #26] + 803c1d2: 687b ldr r3, [r7, #4] + 803c1d4: 8b5b ldrh r3, [r3, #26] + 803c1d6: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803c1da: b29a uxth r2, r3 + 803c1dc: 687b ldr r3, [r7, #4] + 803c1de: 835a strh r2, [r3, #26] return ERR_MEM; - 803c15c: f04f 33ff mov.w r3, #4294967295 - 803c160: e024 b.n 803c1ac + 803c1e0: f04f 33ff mov.w r3, #4294967295 + 803c1e4: e024 b.n 803c230 } if (pcb->snd_queuelen != 0) { - 803c162: 687b ldr r3, [r7, #4] - 803c164: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c168: 2b00 cmp r3, #0 - 803c16a: d00f beq.n 803c18c + 803c1e6: 687b ldr r3, [r7, #4] + 803c1e8: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c1ec: 2b00 cmp r3, #0 + 803c1ee: d00f beq.n 803c210 LWIP_ASSERT("tcp_write: pbufs on queue => at least one queue non-empty", - 803c16c: 687b ldr r3, [r7, #4] - 803c16e: 6f1b ldr r3, [r3, #112] ; 0x70 - 803c170: 2b00 cmp r3, #0 - 803c172: d11a bne.n 803c1aa - 803c174: 687b ldr r3, [r7, #4] - 803c176: 6edb ldr r3, [r3, #108] ; 0x6c - 803c178: 2b00 cmp r3, #0 - 803c17a: d116 bne.n 803c1aa - 803c17c: 4b0d ldr r3, [pc, #52] ; (803c1b4 ) - 803c17e: f240 1255 movw r2, #341 ; 0x155 - 803c182: 490f ldr r1, [pc, #60] ; (803c1c0 ) - 803c184: 480d ldr r0, [pc, #52] ; (803c1bc ) - 803c186: f004 fcc3 bl 8040b10 - 803c18a: e00e b.n 803c1aa + 803c1f0: 687b ldr r3, [r7, #4] + 803c1f2: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c1f4: 2b00 cmp r3, #0 + 803c1f6: d11a bne.n 803c22e + 803c1f8: 687b ldr r3, [r7, #4] + 803c1fa: 6edb ldr r3, [r3, #108] ; 0x6c + 803c1fc: 2b00 cmp r3, #0 + 803c1fe: d116 bne.n 803c22e + 803c200: 4b0d ldr r3, [pc, #52] ; (803c238 ) + 803c202: f240 1255 movw r2, #341 ; 0x155 + 803c206: 490f ldr r1, [pc, #60] ; (803c244 ) + 803c208: 480d ldr r0, [pc, #52] ; (803c240 ) + 803c20a: f004 fcc3 bl 8040b94 + 803c20e: e00e b.n 803c22e pcb->unacked != NULL || pcb->unsent != NULL); } else { LWIP_ASSERT("tcp_write: no pbufs on queue => both queues empty", - 803c18c: 687b ldr r3, [r7, #4] - 803c18e: 6f1b ldr r3, [r3, #112] ; 0x70 - 803c190: 2b00 cmp r3, #0 - 803c192: d103 bne.n 803c19c - 803c194: 687b ldr r3, [r7, #4] - 803c196: 6edb ldr r3, [r3, #108] ; 0x6c - 803c198: 2b00 cmp r3, #0 - 803c19a: d006 beq.n 803c1aa - 803c19c: 4b05 ldr r3, [pc, #20] ; (803c1b4 ) - 803c19e: f44f 72ac mov.w r2, #344 ; 0x158 - 803c1a2: 4908 ldr r1, [pc, #32] ; (803c1c4 ) - 803c1a4: 4805 ldr r0, [pc, #20] ; (803c1bc ) - 803c1a6: f004 fcb3 bl 8040b10 + 803c210: 687b ldr r3, [r7, #4] + 803c212: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c214: 2b00 cmp r3, #0 + 803c216: d103 bne.n 803c220 + 803c218: 687b ldr r3, [r7, #4] + 803c21a: 6edb ldr r3, [r3, #108] ; 0x6c + 803c21c: 2b00 cmp r3, #0 + 803c21e: d006 beq.n 803c22e + 803c220: 4b05 ldr r3, [pc, #20] ; (803c238 ) + 803c222: f44f 72ac mov.w r2, #344 ; 0x158 + 803c226: 4908 ldr r1, [pc, #32] ; (803c248 ) + 803c228: 4805 ldr r0, [pc, #20] ; (803c240 ) + 803c22a: f004 fcb3 bl 8040b94 pcb->unacked == NULL && pcb->unsent == NULL); } return ERR_OK; - 803c1aa: 2300 movs r3, #0 -} - 803c1ac: 4618 mov r0, r3 - 803c1ae: 3708 adds r7, #8 - 803c1b0: 46bd mov sp, r7 - 803c1b2: bd80 pop {r7, pc} - 803c1b4: 08043980 .word 0x08043980 - 803c1b8: 08043a90 .word 0x08043a90 - 803c1bc: 080439d4 .word 0x080439d4 - 803c1c0: 08043ab0 .word 0x08043ab0 - 803c1c4: 08043aec .word 0x08043aec - -0803c1c8 : + 803c22e: 2300 movs r3, #0 +} + 803c230: 4618 mov r0, r3 + 803c232: 3708 adds r7, #8 + 803c234: 46bd mov sp, r7 + 803c236: bd80 pop {r7, pc} + 803c238: 08043a00 .word 0x08043a00 + 803c23c: 08043b10 .word 0x08043b10 + 803c240: 08043a54 .word 0x08043a54 + 803c244: 08043b30 .word 0x08043b30 + 803c248: 08043b6c .word 0x08043b6c + +0803c24c : * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will not be set on last segment sent, * @return ERR_OK if enqueued, another err_t on error */ err_t tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags) { - 803c1c8: b590 push {r4, r7, lr} - 803c1ca: b09b sub sp, #108 ; 0x6c - 803c1cc: af04 add r7, sp, #16 - 803c1ce: 60f8 str r0, [r7, #12] - 803c1d0: 60b9 str r1, [r7, #8] - 803c1d2: 4611 mov r1, r2 - 803c1d4: 461a mov r2, r3 - 803c1d6: 460b mov r3, r1 - 803c1d8: 80fb strh r3, [r7, #6] - 803c1da: 4613 mov r3, r2 - 803c1dc: 717b strb r3, [r7, #5] + 803c24c: b590 push {r4, r7, lr} + 803c24e: b09b sub sp, #108 ; 0x6c + 803c250: af04 add r7, sp, #16 + 803c252: 60f8 str r0, [r7, #12] + 803c254: 60b9 str r1, [r7, #8] + 803c256: 4611 mov r1, r2 + 803c258: 461a mov r2, r3 + 803c25a: 460b mov r3, r1 + 803c25c: 80fb strh r3, [r7, #6] + 803c25e: 4613 mov r3, r2 + 803c260: 717b strb r3, [r7, #5] struct pbuf *concat_p = NULL; - 803c1de: 2300 movs r3, #0 - 803c1e0: 657b str r3, [r7, #84] ; 0x54 + 803c262: 2300 movs r3, #0 + 803c264: 657b str r3, [r7, #84] ; 0x54 struct tcp_seg *last_unsent = NULL, *seg = NULL, *prev_seg = NULL, *queue = NULL; - 803c1e2: 2300 movs r3, #0 - 803c1e4: 653b str r3, [r7, #80] ; 0x50 - 803c1e6: 2300 movs r3, #0 - 803c1e8: 64fb str r3, [r7, #76] ; 0x4c - 803c1ea: 2300 movs r3, #0 - 803c1ec: 64bb str r3, [r7, #72] ; 0x48 - 803c1ee: 2300 movs r3, #0 - 803c1f0: 647b str r3, [r7, #68] ; 0x44 + 803c266: 2300 movs r3, #0 + 803c268: 653b str r3, [r7, #80] ; 0x50 + 803c26a: 2300 movs r3, #0 + 803c26c: 64fb str r3, [r7, #76] ; 0x4c + 803c26e: 2300 movs r3, #0 + 803c270: 64bb str r3, [r7, #72] ; 0x48 + 803c272: 2300 movs r3, #0 + 803c274: 647b str r3, [r7, #68] ; 0x44 u16_t pos = 0; /* position in 'arg' data */ - 803c1f2: 2300 movs r3, #0 - 803c1f4: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803c276: 2300 movs r3, #0 + 803c278: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 u16_t queuelen; u8_t optlen; u8_t optflags = 0; - 803c1f8: 2300 movs r3, #0 - 803c1fa: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803c27c: 2300 movs r3, #0 + 803c27e: f887 3027 strb.w r3, [r7, #39] ; 0x27 #if TCP_OVERSIZE u16_t oversize = 0; - 803c1fe: 2300 movs r3, #0 - 803c200: 827b strh r3, [r7, #18] + 803c282: 2300 movs r3, #0 + 803c284: 827b strh r3, [r7, #18] u16_t oversize_used = 0; - 803c202: 2300 movs r3, #0 - 803c204: 87fb strh r3, [r7, #62] ; 0x3e + 803c286: 2300 movs r3, #0 + 803c288: 87fb strh r3, [r7, #62] ; 0x3e #if TCP_OVERSIZE_DBGCHECK u16_t oversize_add = 0; #endif /* TCP_OVERSIZE_DBGCHECK*/ #endif /* TCP_OVERSIZE */ u16_t extendlen = 0; - 803c206: 2300 movs r3, #0 - 803c208: 87bb strh r3, [r7, #60] ; 0x3c + 803c28a: 2300 movs r3, #0 + 803c28c: 87bb strh r3, [r7, #60] ; 0x3c u16_t concat_chksummed = 0; #endif /* TCP_CHECKSUM_ON_COPY */ err_t err; u16_t mss_local; LWIP_ERROR("tcp_write: invalid pcb", pcb != NULL, return ERR_ARG); - 803c20a: 68fb ldr r3, [r7, #12] - 803c20c: 2b00 cmp r3, #0 - 803c20e: d109 bne.n 803c224 - 803c210: 4ba4 ldr r3, [pc, #656] ; (803c4a4 ) - 803c212: f44f 72cf mov.w r2, #414 ; 0x19e - 803c216: 49a4 ldr r1, [pc, #656] ; (803c4a8 ) - 803c218: 48a4 ldr r0, [pc, #656] ; (803c4ac ) - 803c21a: f004 fc79 bl 8040b10 - 803c21e: f06f 030f mvn.w r3, #15 - 803c222: e32a b.n 803c87a + 803c28e: 68fb ldr r3, [r7, #12] + 803c290: 2b00 cmp r3, #0 + 803c292: d109 bne.n 803c2a8 + 803c294: 4ba4 ldr r3, [pc, #656] ; (803c528 ) + 803c296: f44f 72cf mov.w r2, #414 ; 0x19e + 803c29a: 49a4 ldr r1, [pc, #656] ; (803c52c ) + 803c29c: 48a4 ldr r0, [pc, #656] ; (803c530 ) + 803c29e: f004 fc79 bl 8040b94 + 803c2a2: f06f 030f mvn.w r3, #15 + 803c2a6: e32a b.n 803c8fe /* don't allocate segments bigger than half the maximum window we ever received */ mss_local = LWIP_MIN(pcb->mss, TCPWND_MIN16(pcb->snd_wnd_max / 2)); - 803c224: 68fb ldr r3, [r7, #12] - 803c226: f8b3 3062 ldrh.w r3, [r3, #98] ; 0x62 - 803c22a: 085b lsrs r3, r3, #1 - 803c22c: b29a uxth r2, r3 - 803c22e: 68fb ldr r3, [r7, #12] - 803c230: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803c232: 4293 cmp r3, r2 - 803c234: bf28 it cs - 803c236: 4613 movcs r3, r2 - 803c238: 84bb strh r3, [r7, #36] ; 0x24 + 803c2a8: 68fb ldr r3, [r7, #12] + 803c2aa: f8b3 3062 ldrh.w r3, [r3, #98] ; 0x62 + 803c2ae: 085b lsrs r3, r3, #1 + 803c2b0: b29a uxth r2, r3 + 803c2b2: 68fb ldr r3, [r7, #12] + 803c2b4: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803c2b6: 4293 cmp r3, r2 + 803c2b8: bf28 it cs + 803c2ba: 4613 movcs r3, r2 + 803c2bc: 84bb strh r3, [r7, #36] ; 0x24 mss_local = mss_local ? mss_local : pcb->mss; - 803c23a: 8cbb ldrh r3, [r7, #36] ; 0x24 - 803c23c: 2b00 cmp r3, #0 - 803c23e: d102 bne.n 803c246 - 803c240: 68fb ldr r3, [r7, #12] - 803c242: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803c244: e000 b.n 803c248 - 803c246: 8cbb ldrh r3, [r7, #36] ; 0x24 - 803c248: 84bb strh r3, [r7, #36] ; 0x24 + 803c2be: 8cbb ldrh r3, [r7, #36] ; 0x24 + 803c2c0: 2b00 cmp r3, #0 + 803c2c2: d102 bne.n 803c2ca + 803c2c4: 68fb ldr r3, [r7, #12] + 803c2c6: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803c2c8: e000 b.n 803c2cc + 803c2ca: 8cbb ldrh r3, [r7, #36] ; 0x24 + 803c2cc: 84bb strh r3, [r7, #36] ; 0x24 apiflags |= TCP_WRITE_FLAG_COPY; #endif /* LWIP_NETIF_TX_SINGLE_PBUF */ LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n", (void *)pcb, arg, len, (u16_t)apiflags)); LWIP_ERROR("tcp_write: arg == NULL (programmer violates API)", - 803c24a: 68bb ldr r3, [r7, #8] - 803c24c: 2b00 cmp r3, #0 - 803c24e: d109 bne.n 803c264 - 803c250: 4b94 ldr r3, [pc, #592] ; (803c4a4 ) - 803c252: f240 12ad movw r2, #429 ; 0x1ad - 803c256: 4996 ldr r1, [pc, #600] ; (803c4b0 ) - 803c258: 4894 ldr r0, [pc, #592] ; (803c4ac ) - 803c25a: f004 fc59 bl 8040b10 - 803c25e: f06f 030f mvn.w r3, #15 - 803c262: e30a b.n 803c87a + 803c2ce: 68bb ldr r3, [r7, #8] + 803c2d0: 2b00 cmp r3, #0 + 803c2d2: d109 bne.n 803c2e8 + 803c2d4: 4b94 ldr r3, [pc, #592] ; (803c528 ) + 803c2d6: f240 12ad movw r2, #429 ; 0x1ad + 803c2da: 4996 ldr r1, [pc, #600] ; (803c534 ) + 803c2dc: 4894 ldr r0, [pc, #592] ; (803c530 ) + 803c2de: f004 fc59 bl 8040b94 + 803c2e2: f06f 030f mvn.w r3, #15 + 803c2e6: e30a b.n 803c8fe arg != NULL, return ERR_ARG;); err = tcp_write_checks(pcb, len); - 803c264: 88fb ldrh r3, [r7, #6] - 803c266: 4619 mov r1, r3 - 803c268: 68f8 ldr r0, [r7, #12] - 803c26a: f7ff ff33 bl 803c0d4 - 803c26e: 4603 mov r3, r0 - 803c270: f887 3023 strb.w r3, [r7, #35] ; 0x23 + 803c2e8: 88fb ldrh r3, [r7, #6] + 803c2ea: 4619 mov r1, r3 + 803c2ec: 68f8 ldr r0, [r7, #12] + 803c2ee: f7ff ff33 bl 803c158 + 803c2f2: 4603 mov r3, r0 + 803c2f4: f887 3023 strb.w r3, [r7, #35] ; 0x23 if (err != ERR_OK) { - 803c274: f997 3023 ldrsb.w r3, [r7, #35] ; 0x23 - 803c278: 2b00 cmp r3, #0 - 803c27a: d002 beq.n 803c282 + 803c2f8: f997 3023 ldrsb.w r3, [r7, #35] ; 0x23 + 803c2fc: 2b00 cmp r3, #0 + 803c2fe: d002 beq.n 803c306 return err; - 803c27c: f997 3023 ldrsb.w r3, [r7, #35] ; 0x23 - 803c280: e2fb b.n 803c87a + 803c300: f997 3023 ldrsb.w r3, [r7, #35] ; 0x23 + 803c304: e2fb b.n 803c8fe } queuelen = pcb->snd_queuelen; - 803c282: 68fb ldr r3, [r7, #12] - 803c284: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c288: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 803c306: 68fb ldr r3, [r7, #12] + 803c308: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c30c: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 /* ensure that segments can hold at least one data byte... */ mss_local = LWIP_MAX(mss_local, LWIP_TCP_OPT_LEN_TS + 1); } else #endif /* LWIP_TCP_TIMESTAMPS */ { optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb); - 803c28c: 2300 movs r3, #0 - 803c28e: f887 3022 strb.w r3, [r7, #34] ; 0x22 + 803c310: 2300 movs r3, #0 + 803c312: f887 3022 strb.w r3, [r7, #34] ; 0x22 * * pos records progress as data is segmented. */ /* Find the tail of the unsent queue. */ if (pcb->unsent != NULL) { - 803c292: 68fb ldr r3, [r7, #12] - 803c294: 6edb ldr r3, [r3, #108] ; 0x6c - 803c296: 2b00 cmp r3, #0 - 803c298: f000 80f6 beq.w 803c488 + 803c316: 68fb ldr r3, [r7, #12] + 803c318: 6edb ldr r3, [r3, #108] ; 0x6c + 803c31a: 2b00 cmp r3, #0 + 803c31c: f000 80f6 beq.w 803c50c u16_t space; u16_t unsent_optlen; /* @todo: this could be sped up by keeping last_unsent in the pcb */ for (last_unsent = pcb->unsent; last_unsent->next != NULL; - 803c29c: 68fb ldr r3, [r7, #12] - 803c29e: 6edb ldr r3, [r3, #108] ; 0x6c - 803c2a0: 653b str r3, [r7, #80] ; 0x50 - 803c2a2: e002 b.n 803c2aa + 803c320: 68fb ldr r3, [r7, #12] + 803c322: 6edb ldr r3, [r3, #108] ; 0x6c + 803c324: 653b str r3, [r7, #80] ; 0x50 + 803c326: e002 b.n 803c32e last_unsent = last_unsent->next); - 803c2a4: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c2a6: 681b ldr r3, [r3, #0] - 803c2a8: 653b str r3, [r7, #80] ; 0x50 + 803c328: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c32a: 681b ldr r3, [r3, #0] + 803c32c: 653b str r3, [r7, #80] ; 0x50 for (last_unsent = pcb->unsent; last_unsent->next != NULL; - 803c2aa: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c2ac: 681b ldr r3, [r3, #0] - 803c2ae: 2b00 cmp r3, #0 - 803c2b0: d1f8 bne.n 803c2a4 + 803c32e: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c330: 681b ldr r3, [r3, #0] + 803c332: 2b00 cmp r3, #0 + 803c334: d1f8 bne.n 803c328 /* Usable space at the end of the last unsent segment */ unsent_optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(last_unsent->flags, pcb); - 803c2b2: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c2b4: 7a9b ldrb r3, [r3, #10] - 803c2b6: 009b lsls r3, r3, #2 - 803c2b8: b29b uxth r3, r3 - 803c2ba: f003 0304 and.w r3, r3, #4 - 803c2be: 843b strh r3, [r7, #32] + 803c336: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c338: 7a9b ldrb r3, [r3, #10] + 803c33a: 009b lsls r3, r3, #2 + 803c33c: b29b uxth r3, r3 + 803c33e: f003 0304 and.w r3, r3, #4 + 803c342: 843b strh r3, [r7, #32] LWIP_ASSERT("mss_local is too small", mss_local >= last_unsent->len + unsent_optlen); - 803c2c0: 8cba ldrh r2, [r7, #36] ; 0x24 - 803c2c2: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c2c4: 891b ldrh r3, [r3, #8] - 803c2c6: 4619 mov r1, r3 - 803c2c8: 8c3b ldrh r3, [r7, #32] - 803c2ca: 440b add r3, r1 - 803c2cc: 429a cmp r2, r3 - 803c2ce: da06 bge.n 803c2de - 803c2d0: 4b74 ldr r3, [pc, #464] ; (803c4a4 ) - 803c2d2: f44f 72f3 mov.w r2, #486 ; 0x1e6 - 803c2d6: 4977 ldr r1, [pc, #476] ; (803c4b4 ) - 803c2d8: 4874 ldr r0, [pc, #464] ; (803c4ac ) - 803c2da: f004 fc19 bl 8040b10 + 803c344: 8cba ldrh r2, [r7, #36] ; 0x24 + 803c346: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c348: 891b ldrh r3, [r3, #8] + 803c34a: 4619 mov r1, r3 + 803c34c: 8c3b ldrh r3, [r7, #32] + 803c34e: 440b add r3, r1 + 803c350: 429a cmp r2, r3 + 803c352: da06 bge.n 803c362 + 803c354: 4b74 ldr r3, [pc, #464] ; (803c528 ) + 803c356: f44f 72f3 mov.w r2, #486 ; 0x1e6 + 803c35a: 4977 ldr r1, [pc, #476] ; (803c538 ) + 803c35c: 4874 ldr r0, [pc, #464] ; (803c530 ) + 803c35e: f004 fc19 bl 8040b94 space = mss_local - (last_unsent->len + unsent_optlen); - 803c2de: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c2e0: 891a ldrh r2, [r3, #8] - 803c2e2: 8c3b ldrh r3, [r7, #32] - 803c2e4: 4413 add r3, r2 - 803c2e6: b29b uxth r3, r3 - 803c2e8: 8cba ldrh r2, [r7, #36] ; 0x24 - 803c2ea: 1ad3 subs r3, r2, r3 - 803c2ec: 877b strh r3, [r7, #58] ; 0x3a + 803c362: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c364: 891a ldrh r2, [r3, #8] + 803c366: 8c3b ldrh r3, [r7, #32] + 803c368: 4413 add r3, r2 + 803c36a: b29b uxth r3, r3 + 803c36c: 8cba ldrh r2, [r7, #36] ; 0x24 + 803c36e: 1ad3 subs r3, r2, r3 + 803c370: 877b strh r3, [r7, #58] ; 0x3a #if TCP_OVERSIZE_DBGCHECK /* check that pcb->unsent_oversize matches last_unsent->oversize_left */ LWIP_ASSERT("unsent_oversize mismatch (pcb vs. last_unsent)", pcb->unsent_oversize == last_unsent->oversize_left); #endif /* TCP_OVERSIZE_DBGCHECK */ oversize = pcb->unsent_oversize; - 803c2ee: 68fb ldr r3, [r7, #12] - 803c2f0: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 803c2f4: 827b strh r3, [r7, #18] + 803c372: 68fb ldr r3, [r7, #12] + 803c374: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 803c378: 827b strh r3, [r7, #18] if (oversize > 0) { - 803c2f6: 8a7b ldrh r3, [r7, #18] - 803c2f8: 2b00 cmp r3, #0 - 803c2fa: d026 beq.n 803c34a + 803c37a: 8a7b ldrh r3, [r7, #18] + 803c37c: 2b00 cmp r3, #0 + 803c37e: d026 beq.n 803c3ce LWIP_ASSERT("inconsistent oversize vs. space", oversize <= space); - 803c2fc: 8a7b ldrh r3, [r7, #18] - 803c2fe: 8f7a ldrh r2, [r7, #58] ; 0x3a - 803c300: 429a cmp r2, r3 - 803c302: d206 bcs.n 803c312 - 803c304: 4b67 ldr r3, [pc, #412] ; (803c4a4 ) - 803c306: f44f 72fc mov.w r2, #504 ; 0x1f8 - 803c30a: 496b ldr r1, [pc, #428] ; (803c4b8 ) - 803c30c: 4867 ldr r0, [pc, #412] ; (803c4ac ) - 803c30e: f004 fbff bl 8040b10 + 803c380: 8a7b ldrh r3, [r7, #18] + 803c382: 8f7a ldrh r2, [r7, #58] ; 0x3a + 803c384: 429a cmp r2, r3 + 803c386: d206 bcs.n 803c396 + 803c388: 4b67 ldr r3, [pc, #412] ; (803c528 ) + 803c38a: f44f 72fc mov.w r2, #504 ; 0x1f8 + 803c38e: 496b ldr r1, [pc, #428] ; (803c53c ) + 803c390: 4867 ldr r0, [pc, #412] ; (803c530 ) + 803c392: f004 fbff bl 8040b94 seg = last_unsent; - 803c312: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c314: 64fb str r3, [r7, #76] ; 0x4c + 803c396: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c398: 64fb str r3, [r7, #76] ; 0x4c oversize_used = LWIP_MIN(space, LWIP_MIN(oversize, len)); - 803c316: 8a7b ldrh r3, [r7, #18] - 803c318: 88fa ldrh r2, [r7, #6] - 803c31a: 4293 cmp r3, r2 - 803c31c: bf28 it cs - 803c31e: 4613 movcs r3, r2 - 803c320: b29b uxth r3, r3 - 803c322: 8f7a ldrh r2, [r7, #58] ; 0x3a - 803c324: 4293 cmp r3, r2 - 803c326: bf28 it cs - 803c328: 4613 movcs r3, r2 - 803c32a: 87fb strh r3, [r7, #62] ; 0x3e + 803c39a: 8a7b ldrh r3, [r7, #18] + 803c39c: 88fa ldrh r2, [r7, #6] + 803c39e: 4293 cmp r3, r2 + 803c3a0: bf28 it cs + 803c3a2: 4613 movcs r3, r2 + 803c3a4: b29b uxth r3, r3 + 803c3a6: 8f7a ldrh r2, [r7, #58] ; 0x3a + 803c3a8: 4293 cmp r3, r2 + 803c3aa: bf28 it cs + 803c3ac: 4613 movcs r3, r2 + 803c3ae: 87fb strh r3, [r7, #62] ; 0x3e pos += oversize_used; - 803c32c: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c330: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c332: 4413 add r3, r2 - 803c334: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803c3b0: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c3b4: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c3b6: 4413 add r3, r2 + 803c3b8: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 oversize -= oversize_used; - 803c338: 8a7a ldrh r2, [r7, #18] - 803c33a: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c33c: 1ad3 subs r3, r2, r3 - 803c33e: b29b uxth r3, r3 - 803c340: 827b strh r3, [r7, #18] + 803c3bc: 8a7a ldrh r2, [r7, #18] + 803c3be: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c3c0: 1ad3 subs r3, r2, r3 + 803c3c2: b29b uxth r3, r3 + 803c3c4: 827b strh r3, [r7, #18] space -= oversize_used; - 803c342: 8f7a ldrh r2, [r7, #58] ; 0x3a - 803c344: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c346: 1ad3 subs r3, r2, r3 - 803c348: 877b strh r3, [r7, #58] ; 0x3a + 803c3c6: 8f7a ldrh r2, [r7, #58] ; 0x3a + 803c3c8: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c3ca: 1ad3 subs r3, r2, r3 + 803c3cc: 877b strh r3, [r7, #58] ; 0x3a } /* now we are either finished or oversize is zero */ LWIP_ASSERT("inconsistent oversize vs. len", (oversize == 0) || (pos == len)); - 803c34a: 8a7b ldrh r3, [r7, #18] - 803c34c: 2b00 cmp r3, #0 - 803c34e: d00b beq.n 803c368 - 803c350: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c354: 88fb ldrh r3, [r7, #6] - 803c356: 429a cmp r2, r3 - 803c358: d006 beq.n 803c368 - 803c35a: 4b52 ldr r3, [pc, #328] ; (803c4a4 ) - 803c35c: f44f 7200 mov.w r2, #512 ; 0x200 - 803c360: 4956 ldr r1, [pc, #344] ; (803c4bc ) - 803c362: 4852 ldr r0, [pc, #328] ; (803c4ac ) - 803c364: f004 fbd4 bl 8040b10 + 803c3ce: 8a7b ldrh r3, [r7, #18] + 803c3d0: 2b00 cmp r3, #0 + 803c3d2: d00b beq.n 803c3ec + 803c3d4: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c3d8: 88fb ldrh r3, [r7, #6] + 803c3da: 429a cmp r2, r3 + 803c3dc: d006 beq.n 803c3ec + 803c3de: 4b52 ldr r3, [pc, #328] ; (803c528 ) + 803c3e0: f44f 7200 mov.w r2, #512 ; 0x200 + 803c3e4: 4956 ldr r1, [pc, #344] ; (803c540 ) + 803c3e6: 4852 ldr r0, [pc, #328] ; (803c530 ) + 803c3e8: f004 fbd4 bl 8040b94 * * This phase is skipped for LWIP_NETIF_TX_SINGLE_PBUF as we could only execute * it after rexmit puts a segment from unacked to unsent and at this point, * oversize info is lost. */ if ((pos < len) && (space > 0) && (last_unsent->len > 0)) { - 803c368: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c36c: 88fb ldrh r3, [r7, #6] - 803c36e: 429a cmp r2, r3 - 803c370: f080 8167 bcs.w 803c642 - 803c374: 8f7b ldrh r3, [r7, #58] ; 0x3a - 803c376: 2b00 cmp r3, #0 - 803c378: f000 8163 beq.w 803c642 - 803c37c: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c37e: 891b ldrh r3, [r3, #8] - 803c380: 2b00 cmp r3, #0 - 803c382: f000 815e beq.w 803c642 + 803c3ec: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c3f0: 88fb ldrh r3, [r7, #6] + 803c3f2: 429a cmp r2, r3 + 803c3f4: f080 8167 bcs.w 803c6c6 + 803c3f8: 8f7b ldrh r3, [r7, #58] ; 0x3a + 803c3fa: 2b00 cmp r3, #0 + 803c3fc: f000 8163 beq.w 803c6c6 + 803c400: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c402: 891b ldrh r3, [r3, #8] + 803c404: 2b00 cmp r3, #0 + 803c406: f000 815e beq.w 803c6c6 u16_t seglen = LWIP_MIN(space, len - pos); - 803c386: 88fa ldrh r2, [r7, #6] - 803c388: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c38c: 1ad2 subs r2, r2, r3 - 803c38e: 8f7b ldrh r3, [r7, #58] ; 0x3a - 803c390: 4293 cmp r3, r2 - 803c392: bfa8 it ge - 803c394: 4613 movge r3, r2 - 803c396: 83fb strh r3, [r7, #30] + 803c40a: 88fa ldrh r2, [r7, #6] + 803c40c: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c410: 1ad2 subs r2, r2, r3 + 803c412: 8f7b ldrh r3, [r7, #58] ; 0x3a + 803c414: 4293 cmp r3, r2 + 803c416: bfa8 it ge + 803c418: 4613 movge r3, r2 + 803c41a: 83fb strh r3, [r7, #30] seg = last_unsent; - 803c398: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c39a: 64fb str r3, [r7, #76] ; 0x4c + 803c41c: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c41e: 64fb str r3, [r7, #76] ; 0x4c /* Create a pbuf with a copy or reference to seglen bytes. We * can use PBUF_RAW here since the data appears in the middle of * a segment. A header will never be prepended. */ if (apiflags & TCP_WRITE_FLAG_COPY) { - 803c39c: 797b ldrb r3, [r7, #5] - 803c39e: f003 0301 and.w r3, r3, #1 - 803c3a2: 2b00 cmp r3, #0 - 803c3a4: d027 beq.n 803c3f6 + 803c420: 797b ldrb r3, [r7, #5] + 803c422: f003 0301 and.w r3, r3, #1 + 803c426: 2b00 cmp r3, #0 + 803c428: d027 beq.n 803c47a /* Data is copied */ if ((concat_p = tcp_pbuf_prealloc(PBUF_RAW, seglen, space, &oversize, pcb, apiflags, 1)) == NULL) { - 803c3a6: f107 0012 add.w r0, r7, #18 - 803c3aa: 8f7a ldrh r2, [r7, #58] ; 0x3a - 803c3ac: 8bf9 ldrh r1, [r7, #30] - 803c3ae: 2301 movs r3, #1 - 803c3b0: 9302 str r3, [sp, #8] - 803c3b2: 797b ldrb r3, [r7, #5] - 803c3b4: 9301 str r3, [sp, #4] - 803c3b6: 68fb ldr r3, [r7, #12] - 803c3b8: 9300 str r3, [sp, #0] - 803c3ba: 4603 mov r3, r0 - 803c3bc: 2000 movs r0, #0 - 803c3be: f7ff fe0f bl 803bfe0 - 803c3c2: 6578 str r0, [r7, #84] ; 0x54 - 803c3c4: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c3c6: 2b00 cmp r3, #0 - 803c3c8: f000 8225 beq.w 803c816 + 803c42a: f107 0012 add.w r0, r7, #18 + 803c42e: 8f7a ldrh r2, [r7, #58] ; 0x3a + 803c430: 8bf9 ldrh r1, [r7, #30] + 803c432: 2301 movs r3, #1 + 803c434: 9302 str r3, [sp, #8] + 803c436: 797b ldrb r3, [r7, #5] + 803c438: 9301 str r3, [sp, #4] + 803c43a: 68fb ldr r3, [r7, #12] + 803c43c: 9300 str r3, [sp, #0] + 803c43e: 4603 mov r3, r0 + 803c440: 2000 movs r0, #0 + 803c442: f7ff fe0f bl 803c064 + 803c446: 6578 str r0, [r7, #84] ; 0x54 + 803c448: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c44a: 2b00 cmp r3, #0 + 803c44c: f000 8225 beq.w 803c89a goto memerr; } #if TCP_OVERSIZE_DBGCHECK oversize_add = oversize; #endif /* TCP_OVERSIZE_DBGCHECK */ TCP_DATA_COPY2(concat_p->payload, (const u8_t *)arg + pos, seglen, &concat_chksum, &concat_chksum_swapped); - 803c3cc: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c3ce: 6858 ldr r0, [r3, #4] - 803c3d0: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c3d4: 68ba ldr r2, [r7, #8] - 803c3d6: 4413 add r3, r2 - 803c3d8: 8bfa ldrh r2, [r7, #30] - 803c3da: 4619 mov r1, r3 - 803c3dc: f004 fa88 bl 80408f0 + 803c450: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c452: 6858 ldr r0, [r3, #4] + 803c454: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c458: 68ba ldr r2, [r7, #8] + 803c45a: 4413 add r3, r2 + 803c45c: 8bfa ldrh r2, [r7, #30] + 803c45e: 4619 mov r1, r3 + 803c460: f004 fa88 bl 8040974 #if TCP_CHECKSUM_ON_COPY concat_chksummed += seglen; #endif /* TCP_CHECKSUM_ON_COPY */ queuelen += pbuf_clen(concat_p); - 803c3e0: 6d78 ldr r0, [r7, #84] ; 0x54 - 803c3e2: f7fb fa33 bl 803784c - 803c3e6: 4603 mov r3, r0 - 803c3e8: 461a mov r2, r3 - 803c3ea: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 803c3ee: 4413 add r3, r2 - 803c3f0: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 - 803c3f4: e041 b.n 803c47a + 803c464: 6d78 ldr r0, [r7, #84] ; 0x54 + 803c466: f7fb fa33 bl 80378d0 + 803c46a: 4603 mov r3, r0 + 803c46c: 461a mov r2, r3 + 803c46e: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 803c472: 4413 add r3, r2 + 803c474: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 803c478: e041 b.n 803c4fe } else { /* Data is not copied */ /* If the last unsent pbuf is of type PBUF_ROM, try to extend it. */ struct pbuf *p; for (p = last_unsent->p; p->next != NULL; p = p->next); - 803c3f6: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c3f8: 685b ldr r3, [r3, #4] - 803c3fa: 637b str r3, [r7, #52] ; 0x34 - 803c3fc: e002 b.n 803c404 - 803c3fe: 6b7b ldr r3, [r7, #52] ; 0x34 - 803c400: 681b ldr r3, [r3, #0] - 803c402: 637b str r3, [r7, #52] ; 0x34 - 803c404: 6b7b ldr r3, [r7, #52] ; 0x34 - 803c406: 681b ldr r3, [r3, #0] - 803c408: 2b00 cmp r3, #0 - 803c40a: d1f8 bne.n 803c3fe + 803c47a: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c47c: 685b ldr r3, [r3, #4] + 803c47e: 637b str r3, [r7, #52] ; 0x34 + 803c480: e002 b.n 803c488 + 803c482: 6b7b ldr r3, [r7, #52] ; 0x34 + 803c484: 681b ldr r3, [r3, #0] + 803c486: 637b str r3, [r7, #52] ; 0x34 + 803c488: 6b7b ldr r3, [r7, #52] ; 0x34 + 803c48a: 681b ldr r3, [r3, #0] + 803c48c: 2b00 cmp r3, #0 + 803c48e: d1f8 bne.n 803c482 if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) && - 803c40c: 6b7b ldr r3, [r7, #52] ; 0x34 - 803c40e: 7b1b ldrb r3, [r3, #12] - 803c410: f003 03c0 and.w r3, r3, #192 ; 0xc0 - 803c414: 2b00 cmp r3, #0 - 803c416: d115 bne.n 803c444 + 803c490: 6b7b ldr r3, [r7, #52] ; 0x34 + 803c492: 7b1b ldrb r3, [r3, #12] + 803c494: f003 03c0 and.w r3, r3, #192 ; 0xc0 + 803c498: 2b00 cmp r3, #0 + 803c49a: d115 bne.n 803c4c8 (const u8_t *)p->payload + p->len == (const u8_t *)arg) { - 803c418: 6b7b ldr r3, [r7, #52] ; 0x34 - 803c41a: 685b ldr r3, [r3, #4] - 803c41c: 6b7a ldr r2, [r7, #52] ; 0x34 - 803c41e: 8952 ldrh r2, [r2, #10] - 803c420: 4413 add r3, r2 + 803c49c: 6b7b ldr r3, [r7, #52] ; 0x34 + 803c49e: 685b ldr r3, [r3, #4] + 803c4a0: 6b7a ldr r2, [r7, #52] ; 0x34 + 803c4a2: 8952 ldrh r2, [r2, #10] + 803c4a4: 4413 add r3, r2 if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) && - 803c422: 68ba ldr r2, [r7, #8] - 803c424: 429a cmp r2, r3 - 803c426: d10d bne.n 803c444 + 803c4a6: 68ba ldr r2, [r7, #8] + 803c4a8: 429a cmp r2, r3 + 803c4aa: d10d bne.n 803c4c8 LWIP_ASSERT("tcp_write: ROM pbufs cannot be oversized", pos == 0); - 803c428: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c42c: 2b00 cmp r3, #0 - 803c42e: d006 beq.n 803c43e - 803c430: 4b1c ldr r3, [pc, #112] ; (803c4a4 ) - 803c432: f240 2231 movw r2, #561 ; 0x231 - 803c436: 4922 ldr r1, [pc, #136] ; (803c4c0 ) - 803c438: 481c ldr r0, [pc, #112] ; (803c4ac ) - 803c43a: f004 fb69 bl 8040b10 + 803c4ac: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c4b0: 2b00 cmp r3, #0 + 803c4b2: d006 beq.n 803c4c2 + 803c4b4: 4b1c ldr r3, [pc, #112] ; (803c528 ) + 803c4b6: f240 2231 movw r2, #561 ; 0x231 + 803c4ba: 4922 ldr r1, [pc, #136] ; (803c544 ) + 803c4bc: 481c ldr r0, [pc, #112] ; (803c530 ) + 803c4be: f004 fb69 bl 8040b94 extendlen = seglen; - 803c43e: 8bfb ldrh r3, [r7, #30] - 803c440: 87bb strh r3, [r7, #60] ; 0x3c - 803c442: e01a b.n 803c47a + 803c4c2: 8bfb ldrh r3, [r7, #30] + 803c4c4: 87bb strh r3, [r7, #60] ; 0x3c + 803c4c6: e01a b.n 803c4fe } else { if ((concat_p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) { - 803c444: 8bfb ldrh r3, [r7, #30] - 803c446: 2201 movs r2, #1 - 803c448: 4619 mov r1, r3 - 803c44a: 2000 movs r0, #0 - 803c44c: f7fa fe92 bl 8037174 - 803c450: 6578 str r0, [r7, #84] ; 0x54 - 803c452: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c454: 2b00 cmp r3, #0 - 803c456: f000 81e0 beq.w 803c81a + 803c4c8: 8bfb ldrh r3, [r7, #30] + 803c4ca: 2201 movs r2, #1 + 803c4cc: 4619 mov r1, r3 + 803c4ce: 2000 movs r0, #0 + 803c4d0: f7fa fe92 bl 80371f8 + 803c4d4: 6578 str r0, [r7, #84] ; 0x54 + 803c4d6: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c4d8: 2b00 cmp r3, #0 + 803c4da: f000 81e0 beq.w 803c89e LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for zero-copy pbuf\n")); goto memerr; } /* reference the non-volatile payload data */ ((struct pbuf_rom *)concat_p)->payload = (const u8_t *)arg + pos; - 803c45a: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c45e: 68ba ldr r2, [r7, #8] - 803c460: 441a add r2, r3 - 803c462: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c464: 605a str r2, [r3, #4] + 803c4de: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c4e2: 68ba ldr r2, [r7, #8] + 803c4e4: 441a add r2, r3 + 803c4e6: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c4e8: 605a str r2, [r3, #4] queuelen += pbuf_clen(concat_p); - 803c466: 6d78 ldr r0, [r7, #84] ; 0x54 - 803c468: f7fb f9f0 bl 803784c - 803c46c: 4603 mov r3, r0 - 803c46e: 461a mov r2, r3 - 803c470: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 803c474: 4413 add r3, r2 - 803c476: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 803c4ea: 6d78 ldr r0, [r7, #84] ; 0x54 + 803c4ec: f7fb f9f0 bl 80378d0 + 803c4f0: 4603 mov r3, r0 + 803c4f2: 461a mov r2, r3 + 803c4f4: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 803c4f8: 4413 add r3, r2 + 803c4fa: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 &concat_chksum, &concat_chksum_swapped); concat_chksummed += seglen; #endif /* TCP_CHECKSUM_ON_COPY */ } pos += seglen; - 803c47a: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c47e: 8bfb ldrh r3, [r7, #30] - 803c480: 4413 add r3, r2 - 803c482: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 - 803c486: e0dc b.n 803c642 + 803c4fe: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c502: 8bfb ldrh r3, [r7, #30] + 803c504: 4413 add r3, r2 + 803c506: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803c50a: e0dc b.n 803c6c6 } #endif /* !LWIP_NETIF_TX_SINGLE_PBUF */ } else { #if TCP_OVERSIZE LWIP_ASSERT("unsent_oversize mismatch (pcb->unsent is NULL)", - 803c488: 68fb ldr r3, [r7, #12] - 803c48a: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 - 803c48e: 2b00 cmp r3, #0 - 803c490: f000 80d7 beq.w 803c642 - 803c494: 4b03 ldr r3, [pc, #12] ; (803c4a4 ) - 803c496: f240 224a movw r2, #586 ; 0x24a - 803c49a: 490a ldr r1, [pc, #40] ; (803c4c4 ) - 803c49c: 4803 ldr r0, [pc, #12] ; (803c4ac ) - 803c49e: f004 fb37 bl 8040b10 + 803c50c: 68fb ldr r3, [r7, #12] + 803c50e: f8b3 3068 ldrh.w r3, [r3, #104] ; 0x68 + 803c512: 2b00 cmp r3, #0 + 803c514: f000 80d7 beq.w 803c6c6 + 803c518: 4b03 ldr r3, [pc, #12] ; (803c528 ) + 803c51a: f240 224a movw r2, #586 ; 0x24a + 803c51e: 490a ldr r1, [pc, #40] ; (803c548 ) + 803c520: 4803 ldr r0, [pc, #12] ; (803c530 ) + 803c522: f004 fb37 bl 8040b94 * Phase 3: Create new segments. * * The new segments are chained together in the local 'queue' * variable, ready to be appended to pcb->unsent. */ while (pos < len) { - 803c4a2: e0ce b.n 803c642 - 803c4a4: 08043980 .word 0x08043980 - 803c4a8: 08043b20 .word 0x08043b20 - 803c4ac: 080439d4 .word 0x080439d4 - 803c4b0: 08043b38 .word 0x08043b38 - 803c4b4: 08043b6c .word 0x08043b6c - 803c4b8: 08043b84 .word 0x08043b84 - 803c4bc: 08043ba4 .word 0x08043ba4 - 803c4c0: 08043bc4 .word 0x08043bc4 - 803c4c4: 08043bf0 .word 0x08043bf0 + 803c526: e0ce b.n 803c6c6 + 803c528: 08043a00 .word 0x08043a00 + 803c52c: 08043ba0 .word 0x08043ba0 + 803c530: 08043a54 .word 0x08043a54 + 803c534: 08043bb8 .word 0x08043bb8 + 803c538: 08043bec .word 0x08043bec + 803c53c: 08043c04 .word 0x08043c04 + 803c540: 08043c24 .word 0x08043c24 + 803c544: 08043c44 .word 0x08043c44 + 803c548: 08043c70 .word 0x08043c70 struct pbuf *p; u16_t left = len - pos; - 803c4c8: 88fa ldrh r2, [r7, #6] - 803c4ca: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c4ce: 1ad3 subs r3, r2, r3 - 803c4d0: 83bb strh r3, [r7, #28] + 803c54c: 88fa ldrh r2, [r7, #6] + 803c54e: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c552: 1ad3 subs r3, r2, r3 + 803c554: 83bb strh r3, [r7, #28] u16_t max_len = mss_local - optlen; - 803c4d2: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 - 803c4d6: b29b uxth r3, r3 - 803c4d8: 8cba ldrh r2, [r7, #36] ; 0x24 - 803c4da: 1ad3 subs r3, r2, r3 - 803c4dc: 837b strh r3, [r7, #26] + 803c556: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 + 803c55a: b29b uxth r3, r3 + 803c55c: 8cba ldrh r2, [r7, #36] ; 0x24 + 803c55e: 1ad3 subs r3, r2, r3 + 803c560: 837b strh r3, [r7, #26] u16_t seglen = LWIP_MIN(left, max_len); - 803c4de: 8b7a ldrh r2, [r7, #26] - 803c4e0: 8bbb ldrh r3, [r7, #28] - 803c4e2: 4293 cmp r3, r2 - 803c4e4: bf28 it cs - 803c4e6: 4613 movcs r3, r2 - 803c4e8: 833b strh r3, [r7, #24] + 803c562: 8b7a ldrh r2, [r7, #26] + 803c564: 8bbb ldrh r3, [r7, #28] + 803c566: 4293 cmp r3, r2 + 803c568: bf28 it cs + 803c56a: 4613 movcs r3, r2 + 803c56c: 833b strh r3, [r7, #24] #if TCP_CHECKSUM_ON_COPY u16_t chksum = 0; u8_t chksum_swapped = 0; #endif /* TCP_CHECKSUM_ON_COPY */ if (apiflags & TCP_WRITE_FLAG_COPY) { - 803c4ea: 797b ldrb r3, [r7, #5] - 803c4ec: f003 0301 and.w r3, r3, #1 - 803c4f0: 2b00 cmp r3, #0 - 803c4f2: d036 beq.n 803c562 + 803c56e: 797b ldrb r3, [r7, #5] + 803c570: f003 0301 and.w r3, r3, #1 + 803c574: 2b00 cmp r3, #0 + 803c576: d036 beq.n 803c5e6 /* If copy is set, memory should be allocated and data copied * into pbuf */ if ((p = tcp_pbuf_prealloc(PBUF_TRANSPORT, seglen + optlen, mss_local, &oversize, pcb, apiflags, queue == NULL)) == NULL) { - 803c4f4: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 - 803c4f8: b29a uxth r2, r3 - 803c4fa: 8b3b ldrh r3, [r7, #24] - 803c4fc: 4413 add r3, r2 - 803c4fe: b299 uxth r1, r3 - 803c500: 6c7b ldr r3, [r7, #68] ; 0x44 - 803c502: 2b00 cmp r3, #0 - 803c504: bf0c ite eq - 803c506: 2301 moveq r3, #1 - 803c508: 2300 movne r3, #0 - 803c50a: b2db uxtb r3, r3 - 803c50c: f107 0012 add.w r0, r7, #18 - 803c510: 8cba ldrh r2, [r7, #36] ; 0x24 - 803c512: 9302 str r3, [sp, #8] - 803c514: 797b ldrb r3, [r7, #5] - 803c516: 9301 str r3, [sp, #4] - 803c518: 68fb ldr r3, [r7, #12] - 803c51a: 9300 str r3, [sp, #0] - 803c51c: 4603 mov r3, r0 - 803c51e: 2036 movs r0, #54 ; 0x36 - 803c520: f7ff fd5e bl 803bfe0 - 803c524: 6338 str r0, [r7, #48] ; 0x30 - 803c526: 6b3b ldr r3, [r7, #48] ; 0x30 - 803c528: 2b00 cmp r3, #0 - 803c52a: f000 8178 beq.w 803c81e + 803c578: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 + 803c57c: b29a uxth r2, r3 + 803c57e: 8b3b ldrh r3, [r7, #24] + 803c580: 4413 add r3, r2 + 803c582: b299 uxth r1, r3 + 803c584: 6c7b ldr r3, [r7, #68] ; 0x44 + 803c586: 2b00 cmp r3, #0 + 803c588: bf0c ite eq + 803c58a: 2301 moveq r3, #1 + 803c58c: 2300 movne r3, #0 + 803c58e: b2db uxtb r3, r3 + 803c590: f107 0012 add.w r0, r7, #18 + 803c594: 8cba ldrh r2, [r7, #36] ; 0x24 + 803c596: 9302 str r3, [sp, #8] + 803c598: 797b ldrb r3, [r7, #5] + 803c59a: 9301 str r3, [sp, #4] + 803c59c: 68fb ldr r3, [r7, #12] + 803c59e: 9300 str r3, [sp, #0] + 803c5a0: 4603 mov r3, r0 + 803c5a2: 2036 movs r0, #54 ; 0x36 + 803c5a4: f7ff fd5e bl 803c064 + 803c5a8: 6338 str r0, [r7, #48] ; 0x30 + 803c5aa: 6b3b ldr r3, [r7, #48] ; 0x30 + 803c5ac: 2b00 cmp r3, #0 + 803c5ae: f000 8178 beq.w 803c8a2 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", seglen)); goto memerr; } LWIP_ASSERT("tcp_write: check that first pbuf can hold the complete seglen", - 803c52e: 6b3b ldr r3, [r7, #48] ; 0x30 - 803c530: 895b ldrh r3, [r3, #10] - 803c532: 8b3a ldrh r2, [r7, #24] - 803c534: 429a cmp r2, r3 - 803c536: d906 bls.n 803c546 - 803c538: 4b8c ldr r3, [pc, #560] ; (803c76c ) - 803c53a: f240 2266 movw r2, #614 ; 0x266 - 803c53e: 498c ldr r1, [pc, #560] ; (803c770 ) - 803c540: 488c ldr r0, [pc, #560] ; (803c774 ) - 803c542: f004 fae5 bl 8040b10 + 803c5b2: 6b3b ldr r3, [r7, #48] ; 0x30 + 803c5b4: 895b ldrh r3, [r3, #10] + 803c5b6: 8b3a ldrh r2, [r7, #24] + 803c5b8: 429a cmp r2, r3 + 803c5ba: d906 bls.n 803c5ca + 803c5bc: 4b8c ldr r3, [pc, #560] ; (803c7f0 ) + 803c5be: f240 2266 movw r2, #614 ; 0x266 + 803c5c2: 498c ldr r1, [pc, #560] ; (803c7f4 ) + 803c5c4: 488c ldr r0, [pc, #560] ; (803c7f8 ) + 803c5c6: f004 fae5 bl 8040b94 (p->len >= seglen)); TCP_DATA_COPY2((char *)p->payload + optlen, (const u8_t *)arg + pos, seglen, &chksum, &chksum_swapped); - 803c546: 6b3b ldr r3, [r7, #48] ; 0x30 - 803c548: 685a ldr r2, [r3, #4] - 803c54a: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 - 803c54e: 18d0 adds r0, r2, r3 - 803c550: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c554: 68ba ldr r2, [r7, #8] - 803c556: 4413 add r3, r2 - 803c558: 8b3a ldrh r2, [r7, #24] - 803c55a: 4619 mov r1, r3 - 803c55c: f004 f9c8 bl 80408f0 - 803c560: e02f b.n 803c5c2 + 803c5ca: 6b3b ldr r3, [r7, #48] ; 0x30 + 803c5cc: 685a ldr r2, [r3, #4] + 803c5ce: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 + 803c5d2: 18d0 adds r0, r2, r3 + 803c5d4: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c5d8: 68ba ldr r2, [r7, #8] + 803c5da: 4413 add r3, r2 + 803c5dc: 8b3a ldrh r2, [r7, #24] + 803c5de: 4619 mov r1, r3 + 803c5e0: f004 f9c8 bl 8040974 + 803c5e4: e02f b.n 803c646 * sent out on the link (as it has to be ACKed by the remote * party) we can safely use PBUF_ROM instead of PBUF_REF here. */ struct pbuf *p2; #if TCP_OVERSIZE LWIP_ASSERT("oversize == 0", oversize == 0); - 803c562: 8a7b ldrh r3, [r7, #18] - 803c564: 2b00 cmp r3, #0 - 803c566: d006 beq.n 803c576 - 803c568: 4b80 ldr r3, [pc, #512] ; (803c76c ) - 803c56a: f240 2271 movw r2, #625 ; 0x271 - 803c56e: 4982 ldr r1, [pc, #520] ; (803c778 ) - 803c570: 4880 ldr r0, [pc, #512] ; (803c774 ) - 803c572: f004 facd bl 8040b10 + 803c5e6: 8a7b ldrh r3, [r7, #18] + 803c5e8: 2b00 cmp r3, #0 + 803c5ea: d006 beq.n 803c5fa + 803c5ec: 4b80 ldr r3, [pc, #512] ; (803c7f0 ) + 803c5ee: f240 2271 movw r2, #625 ; 0x271 + 803c5f2: 4982 ldr r1, [pc, #520] ; (803c7fc ) + 803c5f4: 4880 ldr r0, [pc, #512] ; (803c7f8 ) + 803c5f6: f004 facd bl 8040b94 #endif /* TCP_OVERSIZE */ if ((p2 = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) { - 803c576: 8b3b ldrh r3, [r7, #24] - 803c578: 2201 movs r2, #1 - 803c57a: 4619 mov r1, r3 - 803c57c: 2036 movs r0, #54 ; 0x36 - 803c57e: f7fa fdf9 bl 8037174 - 803c582: 6178 str r0, [r7, #20] - 803c584: 697b ldr r3, [r7, #20] - 803c586: 2b00 cmp r3, #0 - 803c588: f000 814b beq.w 803c822 + 803c5fa: 8b3b ldrh r3, [r7, #24] + 803c5fc: 2201 movs r2, #1 + 803c5fe: 4619 mov r1, r3 + 803c600: 2036 movs r0, #54 ; 0x36 + 803c602: f7fa fdf9 bl 80371f8 + 803c606: 6178 str r0, [r7, #20] + 803c608: 697b ldr r3, [r7, #20] + 803c60a: 2b00 cmp r3, #0 + 803c60c: f000 814b beq.w 803c8a6 chksum_swapped = 1; chksum = SWAP_BYTES_IN_WORD(chksum); } #endif /* TCP_CHECKSUM_ON_COPY */ /* reference the non-volatile payload data */ ((struct pbuf_rom *)p2)->payload = (const u8_t *)arg + pos; - 803c58c: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c590: 68ba ldr r2, [r7, #8] - 803c592: 441a add r2, r3 - 803c594: 697b ldr r3, [r7, #20] - 803c596: 605a str r2, [r3, #4] + 803c610: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c614: 68ba ldr r2, [r7, #8] + 803c616: 441a add r2, r3 + 803c618: 697b ldr r3, [r7, #20] + 803c61a: 605a str r2, [r3, #4] /* Second, allocate a pbuf for the headers. */ if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { - 803c598: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 - 803c59c: b29b uxth r3, r3 - 803c59e: f44f 7220 mov.w r2, #640 ; 0x280 - 803c5a2: 4619 mov r1, r3 - 803c5a4: 2036 movs r0, #54 ; 0x36 - 803c5a6: f7fa fde5 bl 8037174 - 803c5aa: 6338 str r0, [r7, #48] ; 0x30 - 803c5ac: 6b3b ldr r3, [r7, #48] ; 0x30 - 803c5ae: 2b00 cmp r3, #0 - 803c5b0: d103 bne.n 803c5ba + 803c61c: f897 3022 ldrb.w r3, [r7, #34] ; 0x22 + 803c620: b29b uxth r3, r3 + 803c622: f44f 7220 mov.w r2, #640 ; 0x280 + 803c626: 4619 mov r1, r3 + 803c628: 2036 movs r0, #54 ; 0x36 + 803c62a: f7fa fde5 bl 80371f8 + 803c62e: 6338 str r0, [r7, #48] ; 0x30 + 803c630: 6b3b ldr r3, [r7, #48] ; 0x30 + 803c632: 2b00 cmp r3, #0 + 803c634: d103 bne.n 803c63e /* If allocation fails, we have to deallocate the data pbuf as * well. */ pbuf_free(p2); - 803c5b2: 6978 ldr r0, [r7, #20] - 803c5b4: f7fb f8c2 bl 803773c + 803c636: 6978 ldr r0, [r7, #20] + 803c638: f7fb f8c2 bl 80377c0 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for header pbuf\n")); goto memerr; - 803c5b8: e136 b.n 803c828 + 803c63c: e136 b.n 803c8ac } /* Concatenate the headers and data pbufs together. */ pbuf_cat(p/*header*/, p2/*data*/); - 803c5ba: 6979 ldr r1, [r7, #20] - 803c5bc: 6b38 ldr r0, [r7, #48] ; 0x30 - 803c5be: f7fb f97f bl 80378c0 + 803c63e: 6979 ldr r1, [r7, #20] + 803c640: 6b38 ldr r0, [r7, #48] ; 0x30 + 803c642: f7fb f97f bl 8037944 } queuelen += pbuf_clen(p); - 803c5c2: 6b38 ldr r0, [r7, #48] ; 0x30 - 803c5c4: f7fb f942 bl 803784c - 803c5c8: 4603 mov r3, r0 - 803c5ca: 461a mov r2, r3 - 803c5cc: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 803c5d0: 4413 add r3, r2 - 803c5d2: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 803c646: 6b38 ldr r0, [r7, #48] ; 0x30 + 803c648: f7fb f942 bl 80378d0 + 803c64c: 4603 mov r3, r0 + 803c64e: 461a mov r2, r3 + 803c650: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 803c654: 4413 add r3, r2 + 803c656: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 /* Now that there are more segments queued, we check again if the * length of the queue exceeds the configured maximum or * overflows. */ if (queuelen > LWIP_MIN(TCP_SND_QUEUELEN, TCP_SNDQUEUELEN_OVERFLOW)) { - 803c5d6: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 803c5da: 2b09 cmp r3, #9 - 803c5dc: d903 bls.n 803c5e6 + 803c65a: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 803c65e: 2b09 cmp r3, #9 + 803c660: d903 bls.n 803c66a LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: queue too long %"U16_F" (%d)\n", queuelen, (int)TCP_SND_QUEUELEN)); pbuf_free(p); - 803c5de: 6b38 ldr r0, [r7, #48] ; 0x30 - 803c5e0: f7fb f8ac bl 803773c + 803c662: 6b38 ldr r0, [r7, #48] ; 0x30 + 803c664: f7fb f8ac bl 80377c0 goto memerr; - 803c5e4: e120 b.n 803c828 + 803c668: e120 b.n 803c8ac } if ((seg = tcp_create_segment(pcb, p, 0, pcb->snd_lbb + pos, optflags)) == NULL) { - 803c5e6: 68fb ldr r3, [r7, #12] - 803c5e8: 6dda ldr r2, [r3, #92] ; 0x5c - 803c5ea: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 803c5ee: 441a add r2, r3 - 803c5f0: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 803c5f4: 9300 str r3, [sp, #0] - 803c5f6: 4613 mov r3, r2 - 803c5f8: 2200 movs r2, #0 - 803c5fa: 6b39 ldr r1, [r7, #48] ; 0x30 - 803c5fc: 68f8 ldr r0, [r7, #12] - 803c5fe: f7ff fc51 bl 803bea4 - 803c602: 64f8 str r0, [r7, #76] ; 0x4c - 803c604: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c606: 2b00 cmp r3, #0 - 803c608: f000 810d beq.w 803c826 + 803c66a: 68fb ldr r3, [r7, #12] + 803c66c: 6dda ldr r2, [r3, #92] ; 0x5c + 803c66e: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 803c672: 441a add r2, r3 + 803c674: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 803c678: 9300 str r3, [sp, #0] + 803c67a: 4613 mov r3, r2 + 803c67c: 2200 movs r2, #0 + 803c67e: 6b39 ldr r1, [r7, #48] ; 0x30 + 803c680: 68f8 ldr r0, [r7, #12] + 803c682: f7ff fc51 bl 803bf28 + 803c686: 64f8 str r0, [r7, #76] ; 0x4c + 803c688: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c68a: 2b00 cmp r3, #0 + 803c68c: f000 810d beq.w 803c8aa seg->chksum_swapped = chksum_swapped; seg->flags |= TF_SEG_DATA_CHECKSUMMED; #endif /* TCP_CHECKSUM_ON_COPY */ /* first segment of to-be-queued data? */ if (queue == NULL) { - 803c60c: 6c7b ldr r3, [r7, #68] ; 0x44 - 803c60e: 2b00 cmp r3, #0 - 803c610: d102 bne.n 803c618 + 803c690: 6c7b ldr r3, [r7, #68] ; 0x44 + 803c692: 2b00 cmp r3, #0 + 803c694: d102 bne.n 803c69c queue = seg; - 803c612: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c614: 647b str r3, [r7, #68] ; 0x44 - 803c616: e00c b.n 803c632 + 803c696: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c698: 647b str r3, [r7, #68] ; 0x44 + 803c69a: e00c b.n 803c6b6 } else { /* Attach the segment to the end of the queued segments */ LWIP_ASSERT("prev_seg != NULL", prev_seg != NULL); - 803c618: 6cbb ldr r3, [r7, #72] ; 0x48 - 803c61a: 2b00 cmp r3, #0 - 803c61c: d106 bne.n 803c62c - 803c61e: 4b53 ldr r3, [pc, #332] ; (803c76c ) - 803c620: f240 22ab movw r2, #683 ; 0x2ab - 803c624: 4955 ldr r1, [pc, #340] ; (803c77c ) - 803c626: 4853 ldr r0, [pc, #332] ; (803c774 ) - 803c628: f004 fa72 bl 8040b10 + 803c69c: 6cbb ldr r3, [r7, #72] ; 0x48 + 803c69e: 2b00 cmp r3, #0 + 803c6a0: d106 bne.n 803c6b0 + 803c6a2: 4b53 ldr r3, [pc, #332] ; (803c7f0 ) + 803c6a4: f240 22ab movw r2, #683 ; 0x2ab + 803c6a8: 4955 ldr r1, [pc, #340] ; (803c800 ) + 803c6aa: 4853 ldr r0, [pc, #332] ; (803c7f8 ) + 803c6ac: f004 fa72 bl 8040b94 prev_seg->next = seg; - 803c62c: 6cbb ldr r3, [r7, #72] ; 0x48 - 803c62e: 6cfa ldr r2, [r7, #76] ; 0x4c - 803c630: 601a str r2, [r3, #0] + 803c6b0: 6cbb ldr r3, [r7, #72] ; 0x48 + 803c6b2: 6cfa ldr r2, [r7, #76] ; 0x4c + 803c6b4: 601a str r2, [r3, #0] } /* remember last segment of to-be-queued data for next iteration */ prev_seg = seg; - 803c632: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c634: 64bb str r3, [r7, #72] ; 0x48 + 803c6b6: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c6b8: 64bb str r3, [r7, #72] ; 0x48 LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_write: queueing %"U32_F":%"U32_F"\n", lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg))); pos += seglen; - 803c636: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c63a: 8b3b ldrh r3, [r7, #24] - 803c63c: 4413 add r3, r2 - 803c63e: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 803c6ba: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c6be: 8b3b ldrh r3, [r7, #24] + 803c6c0: 4413 add r3, r2 + 803c6c2: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 while (pos < len) { - 803c642: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 803c646: 88fb ldrh r3, [r7, #6] - 803c648: 429a cmp r2, r3 - 803c64a: f4ff af3d bcc.w 803c4c8 + 803c6c6: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 803c6ca: 88fb ldrh r3, [r7, #6] + 803c6cc: 429a cmp r2, r3 + 803c6ce: f4ff af3d bcc.w 803c54c /* * Phase 1: If data has been added to the preallocated tail of * last_unsent, we update the length fields of the pbuf chain. */ #if TCP_OVERSIZE if (oversize_used > 0) { - 803c64e: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c650: 2b00 cmp r3, #0 - 803c652: d02c beq.n 803c6ae + 803c6d2: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c6d4: 2b00 cmp r3, #0 + 803c6d6: d02c beq.n 803c732 struct pbuf *p; /* Bump tot_len of whole chain, len of tail */ for (p = last_unsent->p; p; p = p->next) { - 803c654: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c656: 685b ldr r3, [r3, #4] - 803c658: 62fb str r3, [r7, #44] ; 0x2c - 803c65a: e01e b.n 803c69a + 803c6d8: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c6da: 685b ldr r3, [r3, #4] + 803c6dc: 62fb str r3, [r7, #44] ; 0x2c + 803c6de: e01e b.n 803c71e p->tot_len += oversize_used; - 803c65c: 6afb ldr r3, [r7, #44] ; 0x2c - 803c65e: 891a ldrh r2, [r3, #8] - 803c660: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c662: 4413 add r3, r2 - 803c664: b29a uxth r2, r3 - 803c666: 6afb ldr r3, [r7, #44] ; 0x2c - 803c668: 811a strh r2, [r3, #8] + 803c6e0: 6afb ldr r3, [r7, #44] ; 0x2c + 803c6e2: 891a ldrh r2, [r3, #8] + 803c6e4: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c6e6: 4413 add r3, r2 + 803c6e8: b29a uxth r2, r3 + 803c6ea: 6afb ldr r3, [r7, #44] ; 0x2c + 803c6ec: 811a strh r2, [r3, #8] if (p->next == NULL) { - 803c66a: 6afb ldr r3, [r7, #44] ; 0x2c - 803c66c: 681b ldr r3, [r3, #0] - 803c66e: 2b00 cmp r3, #0 - 803c670: d110 bne.n 803c694 + 803c6ee: 6afb ldr r3, [r7, #44] ; 0x2c + 803c6f0: 681b ldr r3, [r3, #0] + 803c6f2: 2b00 cmp r3, #0 + 803c6f4: d110 bne.n 803c718 TCP_DATA_COPY((char *)p->payload + p->len, arg, oversize_used, last_unsent); - 803c672: 6afb ldr r3, [r7, #44] ; 0x2c - 803c674: 685b ldr r3, [r3, #4] - 803c676: 6afa ldr r2, [r7, #44] ; 0x2c - 803c678: 8952 ldrh r2, [r2, #10] - 803c67a: 4413 add r3, r2 - 803c67c: 8ffa ldrh r2, [r7, #62] ; 0x3e - 803c67e: 68b9 ldr r1, [r7, #8] - 803c680: 4618 mov r0, r3 - 803c682: f004 f935 bl 80408f0 + 803c6f6: 6afb ldr r3, [r7, #44] ; 0x2c + 803c6f8: 685b ldr r3, [r3, #4] + 803c6fa: 6afa ldr r2, [r7, #44] ; 0x2c + 803c6fc: 8952 ldrh r2, [r2, #10] + 803c6fe: 4413 add r3, r2 + 803c700: 8ffa ldrh r2, [r7, #62] ; 0x3e + 803c702: 68b9 ldr r1, [r7, #8] + 803c704: 4618 mov r0, r3 + 803c706: f004 f935 bl 8040974 p->len += oversize_used; - 803c686: 6afb ldr r3, [r7, #44] ; 0x2c - 803c688: 895a ldrh r2, [r3, #10] - 803c68a: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c68c: 4413 add r3, r2 - 803c68e: b29a uxth r2, r3 - 803c690: 6afb ldr r3, [r7, #44] ; 0x2c - 803c692: 815a strh r2, [r3, #10] + 803c70a: 6afb ldr r3, [r7, #44] ; 0x2c + 803c70c: 895a ldrh r2, [r3, #10] + 803c70e: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c710: 4413 add r3, r2 + 803c712: b29a uxth r2, r3 + 803c714: 6afb ldr r3, [r7, #44] ; 0x2c + 803c716: 815a strh r2, [r3, #10] for (p = last_unsent->p; p; p = p->next) { - 803c694: 6afb ldr r3, [r7, #44] ; 0x2c - 803c696: 681b ldr r3, [r3, #0] - 803c698: 62fb str r3, [r7, #44] ; 0x2c - 803c69a: 6afb ldr r3, [r7, #44] ; 0x2c - 803c69c: 2b00 cmp r3, #0 - 803c69e: d1dd bne.n 803c65c + 803c718: 6afb ldr r3, [r7, #44] ; 0x2c + 803c71a: 681b ldr r3, [r3, #0] + 803c71c: 62fb str r3, [r7, #44] ; 0x2c + 803c71e: 6afb ldr r3, [r7, #44] ; 0x2c + 803c720: 2b00 cmp r3, #0 + 803c722: d1dd bne.n 803c6e0 } } last_unsent->len += oversize_used; - 803c6a0: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6a2: 891a ldrh r2, [r3, #8] - 803c6a4: 8ffb ldrh r3, [r7, #62] ; 0x3e - 803c6a6: 4413 add r3, r2 - 803c6a8: b29a uxth r2, r3 - 803c6aa: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6ac: 811a strh r2, [r3, #8] + 803c724: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c726: 891a ldrh r2, [r3, #8] + 803c728: 8ffb ldrh r3, [r7, #62] ; 0x3e + 803c72a: 4413 add r3, r2 + 803c72c: b29a uxth r2, r3 + 803c72e: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c730: 811a strh r2, [r3, #8] LWIP_ASSERT("last_unsent->oversize_left >= oversize_used", last_unsent->oversize_left >= oversize_used); last_unsent->oversize_left -= oversize_used; #endif /* TCP_OVERSIZE_DBGCHECK */ } pcb->unsent_oversize = oversize; - 803c6ae: 8a7a ldrh r2, [r7, #18] - 803c6b0: 68fb ldr r3, [r7, #12] - 803c6b2: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803c732: 8a7a ldrh r2, [r7, #18] + 803c734: 68fb ldr r3, [r7, #12] + 803c736: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 /* * Phase 2: concat_p can be concatenated onto last_unsent->p, unless we * determined that the last ROM pbuf can be extended to include the new data. */ if (concat_p != NULL) { - 803c6b6: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c6b8: 2b00 cmp r3, #0 - 803c6ba: d018 beq.n 803c6ee + 803c73a: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c73c: 2b00 cmp r3, #0 + 803c73e: d018 beq.n 803c772 LWIP_ASSERT("tcp_write: cannot concatenate when pcb->unsent is empty", - 803c6bc: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6be: 2b00 cmp r3, #0 - 803c6c0: d106 bne.n 803c6d0 - 803c6c2: 4b2a ldr r3, [pc, #168] ; (803c76c ) - 803c6c4: f44f 7238 mov.w r2, #736 ; 0x2e0 - 803c6c8: 492d ldr r1, [pc, #180] ; (803c780 ) - 803c6ca: 482a ldr r0, [pc, #168] ; (803c774 ) - 803c6cc: f004 fa20 bl 8040b10 + 803c740: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c742: 2b00 cmp r3, #0 + 803c744: d106 bne.n 803c754 + 803c746: 4b2a ldr r3, [pc, #168] ; (803c7f0 ) + 803c748: f44f 7238 mov.w r2, #736 ; 0x2e0 + 803c74c: 492d ldr r1, [pc, #180] ; (803c804 ) + 803c74e: 482a ldr r0, [pc, #168] ; (803c7f8 ) + 803c750: f004 fa20 bl 8040b94 (last_unsent != NULL)); pbuf_cat(last_unsent->p, concat_p); - 803c6d0: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6d2: 685b ldr r3, [r3, #4] - 803c6d4: 6d79 ldr r1, [r7, #84] ; 0x54 - 803c6d6: 4618 mov r0, r3 - 803c6d8: f7fb f8f2 bl 80378c0 + 803c754: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c756: 685b ldr r3, [r3, #4] + 803c758: 6d79 ldr r1, [r7, #84] ; 0x54 + 803c75a: 4618 mov r0, r3 + 803c75c: f7fb f8f2 bl 8037944 last_unsent->len += concat_p->tot_len; - 803c6dc: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6de: 891a ldrh r2, [r3, #8] - 803c6e0: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c6e2: 891b ldrh r3, [r3, #8] - 803c6e4: 4413 add r3, r2 - 803c6e6: b29a uxth r2, r3 - 803c6e8: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6ea: 811a strh r2, [r3, #8] - 803c6ec: e037 b.n 803c75e + 803c760: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c762: 891a ldrh r2, [r3, #8] + 803c764: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c766: 891b ldrh r3, [r3, #8] + 803c768: 4413 add r3, r2 + 803c76a: b29a uxth r2, r3 + 803c76c: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c76e: 811a strh r2, [r3, #8] + 803c770: e037 b.n 803c7e2 } else if (extendlen > 0) { - 803c6ee: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c6f0: 2b00 cmp r3, #0 - 803c6f2: d034 beq.n 803c75e + 803c772: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c774: 2b00 cmp r3, #0 + 803c776: d034 beq.n 803c7e2 struct pbuf *p; LWIP_ASSERT("tcp_write: extension of reference requires reference", - 803c6f4: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6f6: 2b00 cmp r3, #0 - 803c6f8: d003 beq.n 803c702 - 803c6fa: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c6fc: 685b ldr r3, [r3, #4] - 803c6fe: 2b00 cmp r3, #0 - 803c700: d106 bne.n 803c710 - 803c702: 4b1a ldr r3, [pc, #104] ; (803c76c ) - 803c704: f240 22e6 movw r2, #742 ; 0x2e6 - 803c708: 491e ldr r1, [pc, #120] ; (803c784 ) - 803c70a: 481a ldr r0, [pc, #104] ; (803c774 ) - 803c70c: f004 fa00 bl 8040b10 + 803c778: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c77a: 2b00 cmp r3, #0 + 803c77c: d003 beq.n 803c786 + 803c77e: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c780: 685b ldr r3, [r3, #4] + 803c782: 2b00 cmp r3, #0 + 803c784: d106 bne.n 803c794 + 803c786: 4b1a ldr r3, [pc, #104] ; (803c7f0 ) + 803c788: f240 22e6 movw r2, #742 ; 0x2e6 + 803c78c: 491e ldr r1, [pc, #120] ; (803c808 ) + 803c78e: 481a ldr r0, [pc, #104] ; (803c7f8 ) + 803c790: f004 fa00 bl 8040b94 last_unsent != NULL && last_unsent->p != NULL); for (p = last_unsent->p; p->next != NULL; p = p->next) { - 803c710: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c712: 685b ldr r3, [r3, #4] - 803c714: 62bb str r3, [r7, #40] ; 0x28 - 803c716: e009 b.n 803c72c + 803c794: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c796: 685b ldr r3, [r3, #4] + 803c798: 62bb str r3, [r7, #40] ; 0x28 + 803c79a: e009 b.n 803c7b0 p->tot_len += extendlen; - 803c718: 6abb ldr r3, [r7, #40] ; 0x28 - 803c71a: 891a ldrh r2, [r3, #8] - 803c71c: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c71e: 4413 add r3, r2 - 803c720: b29a uxth r2, r3 - 803c722: 6abb ldr r3, [r7, #40] ; 0x28 - 803c724: 811a strh r2, [r3, #8] + 803c79c: 6abb ldr r3, [r7, #40] ; 0x28 + 803c79e: 891a ldrh r2, [r3, #8] + 803c7a0: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c7a2: 4413 add r3, r2 + 803c7a4: b29a uxth r2, r3 + 803c7a6: 6abb ldr r3, [r7, #40] ; 0x28 + 803c7a8: 811a strh r2, [r3, #8] for (p = last_unsent->p; p->next != NULL; p = p->next) { - 803c726: 6abb ldr r3, [r7, #40] ; 0x28 - 803c728: 681b ldr r3, [r3, #0] - 803c72a: 62bb str r3, [r7, #40] ; 0x28 - 803c72c: 6abb ldr r3, [r7, #40] ; 0x28 - 803c72e: 681b ldr r3, [r3, #0] - 803c730: 2b00 cmp r3, #0 - 803c732: d1f1 bne.n 803c718 + 803c7aa: 6abb ldr r3, [r7, #40] ; 0x28 + 803c7ac: 681b ldr r3, [r3, #0] + 803c7ae: 62bb str r3, [r7, #40] ; 0x28 + 803c7b0: 6abb ldr r3, [r7, #40] ; 0x28 + 803c7b2: 681b ldr r3, [r3, #0] + 803c7b4: 2b00 cmp r3, #0 + 803c7b6: d1f1 bne.n 803c79c } p->tot_len += extendlen; - 803c734: 6abb ldr r3, [r7, #40] ; 0x28 - 803c736: 891a ldrh r2, [r3, #8] - 803c738: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c73a: 4413 add r3, r2 - 803c73c: b29a uxth r2, r3 - 803c73e: 6abb ldr r3, [r7, #40] ; 0x28 - 803c740: 811a strh r2, [r3, #8] + 803c7b8: 6abb ldr r3, [r7, #40] ; 0x28 + 803c7ba: 891a ldrh r2, [r3, #8] + 803c7bc: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c7be: 4413 add r3, r2 + 803c7c0: b29a uxth r2, r3 + 803c7c2: 6abb ldr r3, [r7, #40] ; 0x28 + 803c7c4: 811a strh r2, [r3, #8] p->len += extendlen; - 803c742: 6abb ldr r3, [r7, #40] ; 0x28 - 803c744: 895a ldrh r2, [r3, #10] - 803c746: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c748: 4413 add r3, r2 - 803c74a: b29a uxth r2, r3 - 803c74c: 6abb ldr r3, [r7, #40] ; 0x28 - 803c74e: 815a strh r2, [r3, #10] + 803c7c6: 6abb ldr r3, [r7, #40] ; 0x28 + 803c7c8: 895a ldrh r2, [r3, #10] + 803c7ca: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c7cc: 4413 add r3, r2 + 803c7ce: b29a uxth r2, r3 + 803c7d0: 6abb ldr r3, [r7, #40] ; 0x28 + 803c7d2: 815a strh r2, [r3, #10] last_unsent->len += extendlen; - 803c750: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c752: 891a ldrh r2, [r3, #8] - 803c754: 8fbb ldrh r3, [r7, #60] ; 0x3c - 803c756: 4413 add r3, r2 - 803c758: b29a uxth r2, r3 - 803c75a: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c75c: 811a strh r2, [r3, #8] + 803c7d4: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c7d6: 891a ldrh r2, [r3, #8] + 803c7d8: 8fbb ldrh r3, [r7, #60] ; 0x3c + 803c7da: 4413 add r3, r2 + 803c7dc: b29a uxth r2, r3 + 803c7de: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c7e0: 811a strh r2, [r3, #8] /* * Phase 3: Append queue to pcb->unsent. Queue may be NULL, but that * is harmless */ if (last_unsent == NULL) { - 803c75e: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c760: 2b00 cmp r3, #0 - 803c762: d111 bne.n 803c788 + 803c7e2: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c7e4: 2b00 cmp r3, #0 + 803c7e6: d111 bne.n 803c80c pcb->unsent = queue; - 803c764: 68fb ldr r3, [r7, #12] - 803c766: 6c7a ldr r2, [r7, #68] ; 0x44 - 803c768: 66da str r2, [r3, #108] ; 0x6c - 803c76a: e010 b.n 803c78e - 803c76c: 08043980 .word 0x08043980 - 803c770: 08043c20 .word 0x08043c20 - 803c774: 080439d4 .word 0x080439d4 - 803c778: 08043c60 .word 0x08043c60 - 803c77c: 08043c70 .word 0x08043c70 - 803c780: 08043c84 .word 0x08043c84 - 803c784: 08043cbc .word 0x08043cbc + 803c7e8: 68fb ldr r3, [r7, #12] + 803c7ea: 6c7a ldr r2, [r7, #68] ; 0x44 + 803c7ec: 66da str r2, [r3, #108] ; 0x6c + 803c7ee: e010 b.n 803c812 + 803c7f0: 08043a00 .word 0x08043a00 + 803c7f4: 08043ca0 .word 0x08043ca0 + 803c7f8: 08043a54 .word 0x08043a54 + 803c7fc: 08043ce0 .word 0x08043ce0 + 803c800: 08043cf0 .word 0x08043cf0 + 803c804: 08043d04 .word 0x08043d04 + 803c808: 08043d3c .word 0x08043d3c } else { last_unsent->next = queue; - 803c788: 6d3b ldr r3, [r7, #80] ; 0x50 - 803c78a: 6c7a ldr r2, [r7, #68] ; 0x44 - 803c78c: 601a str r2, [r3, #0] + 803c80c: 6d3b ldr r3, [r7, #80] ; 0x50 + 803c80e: 6c7a ldr r2, [r7, #68] ; 0x44 + 803c810: 601a str r2, [r3, #0] } /* * Finally update the pcb state. */ pcb->snd_lbb += len; - 803c78e: 68fb ldr r3, [r7, #12] - 803c790: 6dda ldr r2, [r3, #92] ; 0x5c - 803c792: 88fb ldrh r3, [r7, #6] - 803c794: 441a add r2, r3 - 803c796: 68fb ldr r3, [r7, #12] - 803c798: 65da str r2, [r3, #92] ; 0x5c + 803c812: 68fb ldr r3, [r7, #12] + 803c814: 6dda ldr r2, [r3, #92] ; 0x5c + 803c816: 88fb ldrh r3, [r7, #6] + 803c818: 441a add r2, r3 + 803c81a: 68fb ldr r3, [r7, #12] + 803c81c: 65da str r2, [r3, #92] ; 0x5c pcb->snd_buf -= len; - 803c79a: 68fb ldr r3, [r7, #12] - 803c79c: f8b3 2064 ldrh.w r2, [r3, #100] ; 0x64 - 803c7a0: 88fb ldrh r3, [r7, #6] - 803c7a2: 1ad3 subs r3, r2, r3 - 803c7a4: b29a uxth r2, r3 - 803c7a6: 68fb ldr r3, [r7, #12] - 803c7a8: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 + 803c81e: 68fb ldr r3, [r7, #12] + 803c820: f8b3 2064 ldrh.w r2, [r3, #100] ; 0x64 + 803c824: 88fb ldrh r3, [r7, #6] + 803c826: 1ad3 subs r3, r2, r3 + 803c828: b29a uxth r2, r3 + 803c82a: 68fb ldr r3, [r7, #12] + 803c82c: f8a3 2064 strh.w r2, [r3, #100] ; 0x64 pcb->snd_queuelen = queuelen; - 803c7ac: 68fb ldr r3, [r7, #12] - 803c7ae: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 - 803c7b2: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803c830: 68fb ldr r3, [r7, #12] + 803c832: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 + 803c836: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: %"S16_F" (after enqueued)\n", pcb->snd_queuelen)); if (pcb->snd_queuelen != 0) { - 803c7b6: 68fb ldr r3, [r7, #12] - 803c7b8: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c7bc: 2b00 cmp r3, #0 - 803c7be: d00e beq.n 803c7de + 803c83a: 68fb ldr r3, [r7, #12] + 803c83c: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c840: 2b00 cmp r3, #0 + 803c842: d00e beq.n 803c862 LWIP_ASSERT("tcp_write: valid queue length", - 803c7c0: 68fb ldr r3, [r7, #12] - 803c7c2: 6f1b ldr r3, [r3, #112] ; 0x70 - 803c7c4: 2b00 cmp r3, #0 - 803c7c6: d10a bne.n 803c7de - 803c7c8: 68fb ldr r3, [r7, #12] - 803c7ca: 6edb ldr r3, [r3, #108] ; 0x6c - 803c7cc: 2b00 cmp r3, #0 - 803c7ce: d106 bne.n 803c7de - 803c7d0: 4b2c ldr r3, [pc, #176] ; (803c884 ) - 803c7d2: f240 3212 movw r2, #786 ; 0x312 - 803c7d6: 492c ldr r1, [pc, #176] ; (803c888 ) - 803c7d8: 482c ldr r0, [pc, #176] ; (803c88c ) - 803c7da: f004 f999 bl 8040b10 + 803c844: 68fb ldr r3, [r7, #12] + 803c846: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c848: 2b00 cmp r3, #0 + 803c84a: d10a bne.n 803c862 + 803c84c: 68fb ldr r3, [r7, #12] + 803c84e: 6edb ldr r3, [r3, #108] ; 0x6c + 803c850: 2b00 cmp r3, #0 + 803c852: d106 bne.n 803c862 + 803c854: 4b2c ldr r3, [pc, #176] ; (803c908 ) + 803c856: f240 3212 movw r2, #786 ; 0x312 + 803c85a: 492c ldr r1, [pc, #176] ; (803c90c ) + 803c85c: 482c ldr r0, [pc, #176] ; (803c910 ) + 803c85e: f004 f999 bl 8040b94 pcb->unacked != NULL || pcb->unsent != NULL); } /* Set the PSH flag in the last segment that we enqueued. */ if (seg != NULL && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE) == 0)) { - 803c7de: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c7e0: 2b00 cmp r3, #0 - 803c7e2: d016 beq.n 803c812 - 803c7e4: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c7e6: 68db ldr r3, [r3, #12] - 803c7e8: 2b00 cmp r3, #0 - 803c7ea: d012 beq.n 803c812 - 803c7ec: 797b ldrb r3, [r7, #5] - 803c7ee: f003 0302 and.w r3, r3, #2 - 803c7f2: 2b00 cmp r3, #0 - 803c7f4: d10d bne.n 803c812 + 803c862: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c864: 2b00 cmp r3, #0 + 803c866: d016 beq.n 803c896 + 803c868: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c86a: 68db ldr r3, [r3, #12] + 803c86c: 2b00 cmp r3, #0 + 803c86e: d012 beq.n 803c896 + 803c870: 797b ldrb r3, [r7, #5] + 803c872: f003 0302 and.w r3, r3, #2 + 803c876: 2b00 cmp r3, #0 + 803c878: d10d bne.n 803c896 TCPH_SET_FLAG(seg->tcphdr, TCP_PSH); - 803c7f6: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c7f8: 68db ldr r3, [r3, #12] - 803c7fa: 899b ldrh r3, [r3, #12] - 803c7fc: b29c uxth r4, r3 - 803c7fe: 2008 movs r0, #8 - 803c800: f7f9 fb6a bl 8035ed8 - 803c804: 4603 mov r3, r0 - 803c806: 461a mov r2, r3 - 803c808: 6cfb ldr r3, [r7, #76] ; 0x4c - 803c80a: 68db ldr r3, [r3, #12] - 803c80c: 4322 orrs r2, r4 - 803c80e: b292 uxth r2, r2 - 803c810: 819a strh r2, [r3, #12] + 803c87a: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c87c: 68db ldr r3, [r3, #12] + 803c87e: 899b ldrh r3, [r3, #12] + 803c880: b29c uxth r4, r3 + 803c882: 2008 movs r0, #8 + 803c884: f7f9 fb6a bl 8035f5c + 803c888: 4603 mov r3, r0 + 803c88a: 461a mov r2, r3 + 803c88c: 6cfb ldr r3, [r7, #76] ; 0x4c + 803c88e: 68db ldr r3, [r3, #12] + 803c890: 4322 orrs r2, r4 + 803c892: b292 uxth r2, r2 + 803c894: 819a strh r2, [r3, #12] } return ERR_OK; - 803c812: 2300 movs r3, #0 - 803c814: e031 b.n 803c87a + 803c896: 2300 movs r3, #0 + 803c898: e031 b.n 803c8fe goto memerr; - 803c816: bf00 nop - 803c818: e006 b.n 803c828 + 803c89a: bf00 nop + 803c89c: e006 b.n 803c8ac goto memerr; - 803c81a: bf00 nop - 803c81c: e004 b.n 803c828 + 803c89e: bf00 nop + 803c8a0: e004 b.n 803c8ac goto memerr; - 803c81e: bf00 nop - 803c820: e002 b.n 803c828 + 803c8a2: bf00 nop + 803c8a4: e002 b.n 803c8ac goto memerr; - 803c822: bf00 nop - 803c824: e000 b.n 803c828 + 803c8a6: bf00 nop + 803c8a8: e000 b.n 803c8ac goto memerr; - 803c826: bf00 nop + 803c8aa: bf00 nop memerr: tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803c828: 68fb ldr r3, [r7, #12] - 803c82a: 8b5b ldrh r3, [r3, #26] - 803c82c: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803c830: b29a uxth r2, r3 - 803c832: 68fb ldr r3, [r7, #12] - 803c834: 835a strh r2, [r3, #26] + 803c8ac: 68fb ldr r3, [r7, #12] + 803c8ae: 8b5b ldrh r3, [r3, #26] + 803c8b0: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803c8b4: b29a uxth r2, r3 + 803c8b6: 68fb ldr r3, [r7, #12] + 803c8b8: 835a strh r2, [r3, #26] TCP_STATS_INC(tcp.memerr); if (concat_p != NULL) { - 803c836: 6d7b ldr r3, [r7, #84] ; 0x54 - 803c838: 2b00 cmp r3, #0 - 803c83a: d002 beq.n 803c842 + 803c8ba: 6d7b ldr r3, [r7, #84] ; 0x54 + 803c8bc: 2b00 cmp r3, #0 + 803c8be: d002 beq.n 803c8c6 pbuf_free(concat_p); - 803c83c: 6d78 ldr r0, [r7, #84] ; 0x54 - 803c83e: f7fa ff7d bl 803773c + 803c8c0: 6d78 ldr r0, [r7, #84] ; 0x54 + 803c8c2: f7fa ff7d bl 80377c0 } if (queue != NULL) { - 803c842: 6c7b ldr r3, [r7, #68] ; 0x44 - 803c844: 2b00 cmp r3, #0 - 803c846: d002 beq.n 803c84e + 803c8c6: 6c7b ldr r3, [r7, #68] ; 0x44 + 803c8c8: 2b00 cmp r3, #0 + 803c8ca: d002 beq.n 803c8d2 tcp_segs_free(queue); - 803c848: 6c78 ldr r0, [r7, #68] ; 0x44 - 803c84a: f7fc fb8f bl 8038f6c + 803c8cc: 6c78 ldr r0, [r7, #68] ; 0x44 + 803c8ce: f7fc fb8f bl 8038ff0 } if (pcb->snd_queuelen != 0) { - 803c84e: 68fb ldr r3, [r7, #12] - 803c850: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803c854: 2b00 cmp r3, #0 - 803c856: d00e beq.n 803c876 + 803c8d2: 68fb ldr r3, [r7, #12] + 803c8d4: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803c8d8: 2b00 cmp r3, #0 + 803c8da: d00e beq.n 803c8fa LWIP_ASSERT("tcp_write: valid queue length", pcb->unacked != NULL || - 803c858: 68fb ldr r3, [r7, #12] - 803c85a: 6f1b ldr r3, [r3, #112] ; 0x70 - 803c85c: 2b00 cmp r3, #0 - 803c85e: d10a bne.n 803c876 - 803c860: 68fb ldr r3, [r7, #12] - 803c862: 6edb ldr r3, [r3, #108] ; 0x6c - 803c864: 2b00 cmp r3, #0 - 803c866: d106 bne.n 803c876 - 803c868: 4b06 ldr r3, [pc, #24] ; (803c884 ) - 803c86a: f240 3227 movw r2, #807 ; 0x327 - 803c86e: 4906 ldr r1, [pc, #24] ; (803c888 ) - 803c870: 4806 ldr r0, [pc, #24] ; (803c88c ) - 803c872: f004 f94d bl 8040b10 + 803c8dc: 68fb ldr r3, [r7, #12] + 803c8de: 6f1b ldr r3, [r3, #112] ; 0x70 + 803c8e0: 2b00 cmp r3, #0 + 803c8e2: d10a bne.n 803c8fa + 803c8e4: 68fb ldr r3, [r7, #12] + 803c8e6: 6edb ldr r3, [r3, #108] ; 0x6c + 803c8e8: 2b00 cmp r3, #0 + 803c8ea: d106 bne.n 803c8fa + 803c8ec: 4b06 ldr r3, [pc, #24] ; (803c908 ) + 803c8ee: f240 3227 movw r2, #807 ; 0x327 + 803c8f2: 4906 ldr r1, [pc, #24] ; (803c90c ) + 803c8f4: 4806 ldr r0, [pc, #24] ; (803c910 ) + 803c8f6: f004 f94d bl 8040b94 pcb->unsent != NULL); } LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_write: %"S16_F" (with mem err)\n", pcb->snd_queuelen)); return ERR_MEM; - 803c876: f04f 33ff mov.w r3, #4294967295 -} - 803c87a: 4618 mov r0, r3 - 803c87c: 375c adds r7, #92 ; 0x5c - 803c87e: 46bd mov sp, r7 - 803c880: bd90 pop {r4, r7, pc} - 803c882: bf00 nop - 803c884: 08043980 .word 0x08043980 - 803c888: 08043cf4 .word 0x08043cf4 - 803c88c: 080439d4 .word 0x080439d4 - -0803c890 : + 803c8fa: f04f 33ff mov.w r3, #4294967295 +} + 803c8fe: 4618 mov r0, r3 + 803c900: 375c adds r7, #92 ; 0x5c + 803c902: 46bd mov sp, r7 + 803c904: bd90 pop {r4, r7, pc} + 803c906: bf00 nop + 803c908: 08043a00 .word 0x08043a00 + 803c90c: 08043d74 .word 0x08043d74 + 803c910: 08043a54 .word 0x08043a54 + +0803c914 : * @param pcb the tcp_pcb for which to split the unsent head * @param split the amount of payload to remain in the head */ err_t tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split) { - 803c890: b590 push {r4, r7, lr} - 803c892: b08b sub sp, #44 ; 0x2c - 803c894: af02 add r7, sp, #8 - 803c896: 6078 str r0, [r7, #4] - 803c898: 460b mov r3, r1 - 803c89a: 807b strh r3, [r7, #2] + 803c914: b590 push {r4, r7, lr} + 803c916: b08b sub sp, #44 ; 0x2c + 803c918: af02 add r7, sp, #8 + 803c91a: 6078 str r0, [r7, #4] + 803c91c: 460b mov r3, r1 + 803c91e: 807b strh r3, [r7, #2] struct tcp_seg *seg = NULL, *useg = NULL; - 803c89c: 2300 movs r3, #0 - 803c89e: 61fb str r3, [r7, #28] - 803c8a0: 2300 movs r3, #0 - 803c8a2: 617b str r3, [r7, #20] + 803c920: 2300 movs r3, #0 + 803c922: 61fb str r3, [r7, #28] + 803c924: 2300 movs r3, #0 + 803c926: 617b str r3, [r7, #20] struct pbuf *p = NULL; - 803c8a4: 2300 movs r3, #0 - 803c8a6: 613b str r3, [r7, #16] + 803c928: 2300 movs r3, #0 + 803c92a: 613b str r3, [r7, #16] u16_t chksum = 0; u8_t chksum_swapped = 0; struct pbuf *q; #endif /* TCP_CHECKSUM_ON_COPY */ LWIP_ASSERT("tcp_split_unsent_seg: invalid pcb", pcb != NULL); - 803c8a8: 687b ldr r3, [r7, #4] - 803c8aa: 2b00 cmp r3, #0 - 803c8ac: d106 bne.n 803c8bc - 803c8ae: 4b95 ldr r3, [pc, #596] ; (803cb04 ) - 803c8b0: f240 324b movw r2, #843 ; 0x34b - 803c8b4: 4994 ldr r1, [pc, #592] ; (803cb08 ) - 803c8b6: 4895 ldr r0, [pc, #596] ; (803cb0c ) - 803c8b8: f004 f92a bl 8040b10 + 803c92c: 687b ldr r3, [r7, #4] + 803c92e: 2b00 cmp r3, #0 + 803c930: d106 bne.n 803c940 + 803c932: 4b95 ldr r3, [pc, #596] ; (803cb88 ) + 803c934: f240 324b movw r2, #843 ; 0x34b + 803c938: 4994 ldr r1, [pc, #592] ; (803cb8c ) + 803c93a: 4895 ldr r0, [pc, #596] ; (803cb90 ) + 803c93c: f004 f92a bl 8040b94 useg = pcb->unsent; - 803c8bc: 687b ldr r3, [r7, #4] - 803c8be: 6edb ldr r3, [r3, #108] ; 0x6c - 803c8c0: 617b str r3, [r7, #20] + 803c940: 687b ldr r3, [r7, #4] + 803c942: 6edb ldr r3, [r3, #108] ; 0x6c + 803c944: 617b str r3, [r7, #20] if (useg == NULL) { - 803c8c2: 697b ldr r3, [r7, #20] - 803c8c4: 2b00 cmp r3, #0 - 803c8c6: d102 bne.n 803c8ce + 803c946: 697b ldr r3, [r7, #20] + 803c948: 2b00 cmp r3, #0 + 803c94a: d102 bne.n 803c952 return ERR_MEM; - 803c8c8: f04f 33ff mov.w r3, #4294967295 - 803c8cc: e116 b.n 803cafc + 803c94c: f04f 33ff mov.w r3, #4294967295 + 803c950: e116 b.n 803cb80 } if (split == 0) { - 803c8ce: 887b ldrh r3, [r7, #2] - 803c8d0: 2b00 cmp r3, #0 - 803c8d2: d109 bne.n 803c8e8 + 803c952: 887b ldrh r3, [r7, #2] + 803c954: 2b00 cmp r3, #0 + 803c956: d109 bne.n 803c96c LWIP_ASSERT("Can't split segment into length 0", 0); - 803c8d4: 4b8b ldr r3, [pc, #556] ; (803cb04 ) - 803c8d6: f240 3253 movw r2, #851 ; 0x353 - 803c8da: 498d ldr r1, [pc, #564] ; (803cb10 ) - 803c8dc: 488b ldr r0, [pc, #556] ; (803cb0c ) - 803c8de: f004 f917 bl 8040b10 + 803c958: 4b8b ldr r3, [pc, #556] ; (803cb88 ) + 803c95a: f240 3253 movw r2, #851 ; 0x353 + 803c95e: 498d ldr r1, [pc, #564] ; (803cb94 ) + 803c960: 488b ldr r0, [pc, #556] ; (803cb90 ) + 803c962: f004 f917 bl 8040b94 return ERR_VAL; - 803c8e2: f06f 0305 mvn.w r3, #5 - 803c8e6: e109 b.n 803cafc + 803c966: f06f 0305 mvn.w r3, #5 + 803c96a: e109 b.n 803cb80 } if (useg->len <= split) { - 803c8e8: 697b ldr r3, [r7, #20] - 803c8ea: 891b ldrh r3, [r3, #8] - 803c8ec: 887a ldrh r2, [r7, #2] - 803c8ee: 429a cmp r2, r3 - 803c8f0: d301 bcc.n 803c8f6 + 803c96c: 697b ldr r3, [r7, #20] + 803c96e: 891b ldrh r3, [r3, #8] + 803c970: 887a ldrh r2, [r7, #2] + 803c972: 429a cmp r2, r3 + 803c974: d301 bcc.n 803c97a return ERR_OK; - 803c8f2: 2300 movs r3, #0 - 803c8f4: e102 b.n 803cafc + 803c976: 2300 movs r3, #0 + 803c978: e102 b.n 803cb80 } LWIP_ASSERT("split <= mss", split <= pcb->mss); - 803c8f6: 687b ldr r3, [r7, #4] - 803c8f8: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803c8fa: 887a ldrh r2, [r7, #2] - 803c8fc: 429a cmp r2, r3 - 803c8fe: d906 bls.n 803c90e - 803c900: 4b80 ldr r3, [pc, #512] ; (803cb04 ) - 803c902: f240 325b movw r2, #859 ; 0x35b - 803c906: 4983 ldr r1, [pc, #524] ; (803cb14 ) - 803c908: 4880 ldr r0, [pc, #512] ; (803cb0c ) - 803c90a: f004 f901 bl 8040b10 + 803c97a: 687b ldr r3, [r7, #4] + 803c97c: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803c97e: 887a ldrh r2, [r7, #2] + 803c980: 429a cmp r2, r3 + 803c982: d906 bls.n 803c992 + 803c984: 4b80 ldr r3, [pc, #512] ; (803cb88 ) + 803c986: f240 325b movw r2, #859 ; 0x35b + 803c98a: 4983 ldr r1, [pc, #524] ; (803cb98 ) + 803c98c: 4880 ldr r0, [pc, #512] ; (803cb90 ) + 803c98e: f004 f901 bl 8040b94 LWIP_ASSERT("useg->len > 0", useg->len > 0); - 803c90e: 697b ldr r3, [r7, #20] - 803c910: 891b ldrh r3, [r3, #8] - 803c912: 2b00 cmp r3, #0 - 803c914: d106 bne.n 803c924 - 803c916: 4b7b ldr r3, [pc, #492] ; (803cb04 ) - 803c918: f44f 7257 mov.w r2, #860 ; 0x35c - 803c91c: 497e ldr r1, [pc, #504] ; (803cb18 ) - 803c91e: 487b ldr r0, [pc, #492] ; (803cb0c ) - 803c920: f004 f8f6 bl 8040b10 + 803c992: 697b ldr r3, [r7, #20] + 803c994: 891b ldrh r3, [r3, #8] + 803c996: 2b00 cmp r3, #0 + 803c998: d106 bne.n 803c9a8 + 803c99a: 4b7b ldr r3, [pc, #492] ; (803cb88 ) + 803c99c: f44f 7257 mov.w r2, #860 ; 0x35c + 803c9a0: 497e ldr r1, [pc, #504] ; (803cb9c ) + 803c9a2: 487b ldr r0, [pc, #492] ; (803cb90 ) + 803c9a4: f004 f8f6 bl 8040b94 * to split this packet so we may actually exceed the max value by * one! */ LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: split_unsent_seg: %u\n", (unsigned int)pcb->snd_queuelen)); optflags = useg->flags; - 803c924: 697b ldr r3, [r7, #20] - 803c926: 7a9b ldrb r3, [r3, #10] - 803c928: 73fb strb r3, [r7, #15] + 803c9a8: 697b ldr r3, [r7, #20] + 803c9aa: 7a9b ldrb r3, [r3, #10] + 803c9ac: 73fb strb r3, [r7, #15] #if TCP_CHECKSUM_ON_COPY /* Remove since checksum is not stored until after tcp_create_segment() */ optflags &= ~TF_SEG_DATA_CHECKSUMMED; #endif /* TCP_CHECKSUM_ON_COPY */ optlen = LWIP_TCP_OPT_LENGTH(optflags); - 803c92a: 7bfb ldrb r3, [r7, #15] - 803c92c: 009b lsls r3, r3, #2 - 803c92e: b2db uxtb r3, r3 - 803c930: f003 0304 and.w r3, r3, #4 - 803c934: 73bb strb r3, [r7, #14] + 803c9ae: 7bfb ldrb r3, [r7, #15] + 803c9b0: 009b lsls r3, r3, #2 + 803c9b2: b2db uxtb r3, r3 + 803c9b4: f003 0304 and.w r3, r3, #4 + 803c9b8: 73bb strb r3, [r7, #14] remainder = useg->len - split; - 803c936: 697b ldr r3, [r7, #20] - 803c938: 891a ldrh r2, [r3, #8] - 803c93a: 887b ldrh r3, [r7, #2] - 803c93c: 1ad3 subs r3, r2, r3 - 803c93e: 81bb strh r3, [r7, #12] + 803c9ba: 697b ldr r3, [r7, #20] + 803c9bc: 891a ldrh r2, [r3, #8] + 803c9be: 887b ldrh r3, [r7, #2] + 803c9c0: 1ad3 subs r3, r2, r3 + 803c9c2: 81bb strh r3, [r7, #12] /* Create new pbuf for the remainder of the split */ p = pbuf_alloc(PBUF_TRANSPORT, remainder + optlen, PBUF_RAM); - 803c940: 7bbb ldrb r3, [r7, #14] - 803c942: b29a uxth r2, r3 - 803c944: 89bb ldrh r3, [r7, #12] - 803c946: 4413 add r3, r2 - 803c948: b29b uxth r3, r3 - 803c94a: f44f 7220 mov.w r2, #640 ; 0x280 - 803c94e: 4619 mov r1, r3 - 803c950: 2036 movs r0, #54 ; 0x36 - 803c952: f7fa fc0f bl 8037174 - 803c956: 6138 str r0, [r7, #16] + 803c9c4: 7bbb ldrb r3, [r7, #14] + 803c9c6: b29a uxth r2, r3 + 803c9c8: 89bb ldrh r3, [r7, #12] + 803c9ca: 4413 add r3, r2 + 803c9cc: b29b uxth r3, r3 + 803c9ce: f44f 7220 mov.w r2, #640 ; 0x280 + 803c9d2: 4619 mov r1, r3 + 803c9d4: 2036 movs r0, #54 ; 0x36 + 803c9d6: f7fa fc0f bl 80371f8 + 803c9da: 6138 str r0, [r7, #16] if (p == NULL) { - 803c958: 693b ldr r3, [r7, #16] - 803c95a: 2b00 cmp r3, #0 - 803c95c: f000 80b7 beq.w 803cace + 803c9dc: 693b ldr r3, [r7, #16] + 803c9de: 2b00 cmp r3, #0 + 803c9e0: f000 80b7 beq.w 803cb52 ("tcp_split_unsent_seg: could not allocate memory for pbuf remainder %u\n", remainder)); goto memerr; } /* Offset into the original pbuf is past TCP/IP headers, options, and split amount */ offset = useg->p->tot_len - useg->len + split; - 803c960: 697b ldr r3, [r7, #20] - 803c962: 685b ldr r3, [r3, #4] - 803c964: 891a ldrh r2, [r3, #8] - 803c966: 697b ldr r3, [r7, #20] - 803c968: 891b ldrh r3, [r3, #8] - 803c96a: 1ad3 subs r3, r2, r3 - 803c96c: b29a uxth r2, r3 - 803c96e: 887b ldrh r3, [r7, #2] - 803c970: 4413 add r3, r2 - 803c972: 817b strh r3, [r7, #10] + 803c9e4: 697b ldr r3, [r7, #20] + 803c9e6: 685b ldr r3, [r3, #4] + 803c9e8: 891a ldrh r2, [r3, #8] + 803c9ea: 697b ldr r3, [r7, #20] + 803c9ec: 891b ldrh r3, [r3, #8] + 803c9ee: 1ad3 subs r3, r2, r3 + 803c9f0: b29a uxth r2, r3 + 803c9f2: 887b ldrh r3, [r7, #2] + 803c9f4: 4413 add r3, r2 + 803c9f6: 817b strh r3, [r7, #10] /* Copy remainder into new pbuf, headers and options will not be filled out */ if (pbuf_copy_partial(useg->p, (u8_t *)p->payload + optlen, remainder, offset ) != remainder) { - 803c974: 697b ldr r3, [r7, #20] - 803c976: 6858 ldr r0, [r3, #4] - 803c978: 693b ldr r3, [r7, #16] - 803c97a: 685a ldr r2, [r3, #4] - 803c97c: 7bbb ldrb r3, [r7, #14] - 803c97e: 18d1 adds r1, r2, r3 - 803c980: 897b ldrh r3, [r7, #10] - 803c982: 89ba ldrh r2, [r7, #12] - 803c984: f7fb f8c4 bl 8037b10 - 803c988: 4603 mov r3, r0 - 803c98a: 461a mov r2, r3 - 803c98c: 89bb ldrh r3, [r7, #12] - 803c98e: 4293 cmp r3, r2 - 803c990: f040 809f bne.w 803cad2 + 803c9f8: 697b ldr r3, [r7, #20] + 803c9fa: 6858 ldr r0, [r3, #4] + 803c9fc: 693b ldr r3, [r7, #16] + 803c9fe: 685a ldr r2, [r3, #4] + 803ca00: 7bbb ldrb r3, [r7, #14] + 803ca02: 18d1 adds r1, r2, r3 + 803ca04: 897b ldrh r3, [r7, #10] + 803ca06: 89ba ldrh r2, [r7, #12] + 803ca08: f7fb f8c4 bl 8037b94 + 803ca0c: 4603 mov r3, r0 + 803ca0e: 461a mov r2, r3 + 803ca10: 89bb ldrh r3, [r7, #12] + 803ca12: 4293 cmp r3, r2 + 803ca14: f040 809f bne.w 803cb56 #endif /* TCP_CHECKSUM_ON_COPY */ /* Options are created when calling tcp_output() */ /* Migrate flags from original segment */ split_flags = TCPH_FLAGS(useg->tcphdr); - 803c994: 697b ldr r3, [r7, #20] - 803c996: 68db ldr r3, [r3, #12] - 803c998: 899b ldrh r3, [r3, #12] - 803c99a: b29b uxth r3, r3 - 803c99c: 4618 mov r0, r3 - 803c99e: f7f9 fa9b bl 8035ed8 - 803c9a2: 4603 mov r3, r0 - 803c9a4: b2db uxtb r3, r3 - 803c9a6: f003 033f and.w r3, r3, #63 ; 0x3f - 803c9aa: 76fb strb r3, [r7, #27] + 803ca18: 697b ldr r3, [r7, #20] + 803ca1a: 68db ldr r3, [r3, #12] + 803ca1c: 899b ldrh r3, [r3, #12] + 803ca1e: b29b uxth r3, r3 + 803ca20: 4618 mov r0, r3 + 803ca22: f7f9 fa9b bl 8035f5c + 803ca26: 4603 mov r3, r0 + 803ca28: b2db uxtb r3, r3 + 803ca2a: f003 033f and.w r3, r3, #63 ; 0x3f + 803ca2e: 76fb strb r3, [r7, #27] remainder_flags = 0; /* ACK added in tcp_output() */ - 803c9ac: 2300 movs r3, #0 - 803c9ae: 76bb strb r3, [r7, #26] + 803ca30: 2300 movs r3, #0 + 803ca32: 76bb strb r3, [r7, #26] if (split_flags & TCP_PSH) { - 803c9b0: 7efb ldrb r3, [r7, #27] - 803c9b2: f003 0308 and.w r3, r3, #8 - 803c9b6: 2b00 cmp r3, #0 - 803c9b8: d007 beq.n 803c9ca + 803ca34: 7efb ldrb r3, [r7, #27] + 803ca36: f003 0308 and.w r3, r3, #8 + 803ca3a: 2b00 cmp r3, #0 + 803ca3c: d007 beq.n 803ca4e split_flags &= ~TCP_PSH; - 803c9ba: 7efb ldrb r3, [r7, #27] - 803c9bc: f023 0308 bic.w r3, r3, #8 - 803c9c0: 76fb strb r3, [r7, #27] + 803ca3e: 7efb ldrb r3, [r7, #27] + 803ca40: f023 0308 bic.w r3, r3, #8 + 803ca44: 76fb strb r3, [r7, #27] remainder_flags |= TCP_PSH; - 803c9c2: 7ebb ldrb r3, [r7, #26] - 803c9c4: f043 0308 orr.w r3, r3, #8 - 803c9c8: 76bb strb r3, [r7, #26] + 803ca46: 7ebb ldrb r3, [r7, #26] + 803ca48: f043 0308 orr.w r3, r3, #8 + 803ca4c: 76bb strb r3, [r7, #26] } if (split_flags & TCP_FIN) { - 803c9ca: 7efb ldrb r3, [r7, #27] - 803c9cc: f003 0301 and.w r3, r3, #1 - 803c9d0: 2b00 cmp r3, #0 - 803c9d2: d007 beq.n 803c9e4 + 803ca4e: 7efb ldrb r3, [r7, #27] + 803ca50: f003 0301 and.w r3, r3, #1 + 803ca54: 2b00 cmp r3, #0 + 803ca56: d007 beq.n 803ca68 split_flags &= ~TCP_FIN; - 803c9d4: 7efb ldrb r3, [r7, #27] - 803c9d6: f023 0301 bic.w r3, r3, #1 - 803c9da: 76fb strb r3, [r7, #27] + 803ca58: 7efb ldrb r3, [r7, #27] + 803ca5a: f023 0301 bic.w r3, r3, #1 + 803ca5e: 76fb strb r3, [r7, #27] remainder_flags |= TCP_FIN; - 803c9dc: 7ebb ldrb r3, [r7, #26] - 803c9de: f043 0301 orr.w r3, r3, #1 - 803c9e2: 76bb strb r3, [r7, #26] + 803ca60: 7ebb ldrb r3, [r7, #26] + 803ca62: f043 0301 orr.w r3, r3, #1 + 803ca66: 76bb strb r3, [r7, #26] } /* SYN should be left on split, RST should not be present with data */ seg = tcp_create_segment(pcb, p, remainder_flags, lwip_ntohl(useg->tcphdr->seqno) + split, optflags); - 803c9e4: 697b ldr r3, [r7, #20] - 803c9e6: 68db ldr r3, [r3, #12] - 803c9e8: 685b ldr r3, [r3, #4] - 803c9ea: 4618 mov r0, r3 - 803c9ec: f7f9 fa89 bl 8035f02 - 803c9f0: 4602 mov r2, r0 - 803c9f2: 887b ldrh r3, [r7, #2] - 803c9f4: 18d1 adds r1, r2, r3 - 803c9f6: 7eba ldrb r2, [r7, #26] - 803c9f8: 7bfb ldrb r3, [r7, #15] - 803c9fa: 9300 str r3, [sp, #0] - 803c9fc: 460b mov r3, r1 - 803c9fe: 6939 ldr r1, [r7, #16] - 803ca00: 6878 ldr r0, [r7, #4] - 803ca02: f7ff fa4f bl 803bea4 - 803ca06: 61f8 str r0, [r7, #28] + 803ca68: 697b ldr r3, [r7, #20] + 803ca6a: 68db ldr r3, [r3, #12] + 803ca6c: 685b ldr r3, [r3, #4] + 803ca6e: 4618 mov r0, r3 + 803ca70: f7f9 fa89 bl 8035f86 + 803ca74: 4602 mov r2, r0 + 803ca76: 887b ldrh r3, [r7, #2] + 803ca78: 18d1 adds r1, r2, r3 + 803ca7a: 7eba ldrb r2, [r7, #26] + 803ca7c: 7bfb ldrb r3, [r7, #15] + 803ca7e: 9300 str r3, [sp, #0] + 803ca80: 460b mov r3, r1 + 803ca82: 6939 ldr r1, [r7, #16] + 803ca84: 6878 ldr r0, [r7, #4] + 803ca86: f7ff fa4f bl 803bf28 + 803ca8a: 61f8 str r0, [r7, #28] if (seg == NULL) { - 803ca08: 69fb ldr r3, [r7, #28] - 803ca0a: 2b00 cmp r3, #0 - 803ca0c: d063 beq.n 803cad6 + 803ca8c: 69fb ldr r3, [r7, #28] + 803ca8e: 2b00 cmp r3, #0 + 803ca90: d063 beq.n 803cb5a seg->chksum_swapped = chksum_swapped; seg->flags |= TF_SEG_DATA_CHECKSUMMED; #endif /* TCP_CHECKSUM_ON_COPY */ /* Remove this segment from the queue since trimming it may free pbufs */ pcb->snd_queuelen -= pbuf_clen(useg->p); - 803ca0e: 697b ldr r3, [r7, #20] - 803ca10: 685b ldr r3, [r3, #4] - 803ca12: 4618 mov r0, r3 - 803ca14: f7fa ff1a bl 803784c - 803ca18: 4603 mov r3, r0 - 803ca1a: 461a mov r2, r3 - 803ca1c: 687b ldr r3, [r7, #4] - 803ca1e: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803ca22: 1a9b subs r3, r3, r2 - 803ca24: b29a uxth r2, r3 - 803ca26: 687b ldr r3, [r7, #4] - 803ca28: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803ca92: 697b ldr r3, [r7, #20] + 803ca94: 685b ldr r3, [r3, #4] + 803ca96: 4618 mov r0, r3 + 803ca98: f7fa ff1a bl 80378d0 + 803ca9c: 4603 mov r3, r0 + 803ca9e: 461a mov r2, r3 + 803caa0: 687b ldr r3, [r7, #4] + 803caa2: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803caa6: 1a9b subs r3, r3, r2 + 803caa8: b29a uxth r2, r3 + 803caaa: 687b ldr r3, [r7, #4] + 803caac: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 /* Trim the original pbuf into our split size. At this point our remainder segment must be setup successfully because we are modifying the original segment */ pbuf_realloc(useg->p, useg->p->tot_len - remainder); - 803ca2c: 697b ldr r3, [r7, #20] - 803ca2e: 6858 ldr r0, [r3, #4] - 803ca30: 697b ldr r3, [r7, #20] - 803ca32: 685b ldr r3, [r3, #4] - 803ca34: 891a ldrh r2, [r3, #8] - 803ca36: 89bb ldrh r3, [r7, #12] - 803ca38: 1ad3 subs r3, r2, r3 - 803ca3a: b29b uxth r3, r3 - 803ca3c: 4619 mov r1, r3 - 803ca3e: f7fa fcf7 bl 8037430 + 803cab0: 697b ldr r3, [r7, #20] + 803cab2: 6858 ldr r0, [r3, #4] + 803cab4: 697b ldr r3, [r7, #20] + 803cab6: 685b ldr r3, [r3, #4] + 803cab8: 891a ldrh r2, [r3, #8] + 803caba: 89bb ldrh r3, [r7, #12] + 803cabc: 1ad3 subs r3, r2, r3 + 803cabe: b29b uxth r3, r3 + 803cac0: 4619 mov r1, r3 + 803cac2: f7fa fcf7 bl 80374b4 useg->len -= remainder; - 803ca42: 697b ldr r3, [r7, #20] - 803ca44: 891a ldrh r2, [r3, #8] - 803ca46: 89bb ldrh r3, [r7, #12] - 803ca48: 1ad3 subs r3, r2, r3 - 803ca4a: b29a uxth r2, r3 - 803ca4c: 697b ldr r3, [r7, #20] - 803ca4e: 811a strh r2, [r3, #8] + 803cac6: 697b ldr r3, [r7, #20] + 803cac8: 891a ldrh r2, [r3, #8] + 803caca: 89bb ldrh r3, [r7, #12] + 803cacc: 1ad3 subs r3, r2, r3 + 803cace: b29a uxth r2, r3 + 803cad0: 697b ldr r3, [r7, #20] + 803cad2: 811a strh r2, [r3, #8] TCPH_SET_FLAG(useg->tcphdr, split_flags); - 803ca50: 697b ldr r3, [r7, #20] - 803ca52: 68db ldr r3, [r3, #12] - 803ca54: 899b ldrh r3, [r3, #12] - 803ca56: b29c uxth r4, r3 - 803ca58: 7efb ldrb r3, [r7, #27] - 803ca5a: b29b uxth r3, r3 - 803ca5c: 4618 mov r0, r3 - 803ca5e: f7f9 fa3b bl 8035ed8 - 803ca62: 4603 mov r3, r0 - 803ca64: 461a mov r2, r3 - 803ca66: 697b ldr r3, [r7, #20] - 803ca68: 68db ldr r3, [r3, #12] - 803ca6a: 4322 orrs r2, r4 - 803ca6c: b292 uxth r2, r2 - 803ca6e: 819a strh r2, [r3, #12] + 803cad4: 697b ldr r3, [r7, #20] + 803cad6: 68db ldr r3, [r3, #12] + 803cad8: 899b ldrh r3, [r3, #12] + 803cada: b29c uxth r4, r3 + 803cadc: 7efb ldrb r3, [r7, #27] + 803cade: b29b uxth r3, r3 + 803cae0: 4618 mov r0, r3 + 803cae2: f7f9 fa3b bl 8035f5c + 803cae6: 4603 mov r3, r0 + 803cae8: 461a mov r2, r3 + 803caea: 697b ldr r3, [r7, #20] + 803caec: 68db ldr r3, [r3, #12] + 803caee: 4322 orrs r2, r4 + 803caf0: b292 uxth r2, r2 + 803caf2: 819a strh r2, [r3, #12] /* By trimming, realloc may have actually shrunk the pbuf, so clear oversize_left */ useg->oversize_left = 0; #endif /* TCP_OVERSIZE_DBGCHECK */ /* Add back to the queue with new trimmed pbuf */ pcb->snd_queuelen += pbuf_clen(useg->p); - 803ca70: 697b ldr r3, [r7, #20] - 803ca72: 685b ldr r3, [r3, #4] - 803ca74: 4618 mov r0, r3 - 803ca76: f7fa fee9 bl 803784c - 803ca7a: 4603 mov r3, r0 - 803ca7c: 461a mov r2, r3 - 803ca7e: 687b ldr r3, [r7, #4] - 803ca80: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803ca84: 4413 add r3, r2 - 803ca86: b29a uxth r2, r3 - 803ca88: 687b ldr r3, [r7, #4] - 803ca8a: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803caf4: 697b ldr r3, [r7, #20] + 803caf6: 685b ldr r3, [r3, #4] + 803caf8: 4618 mov r0, r3 + 803cafa: f7fa fee9 bl 80378d0 + 803cafe: 4603 mov r3, r0 + 803cb00: 461a mov r2, r3 + 803cb02: 687b ldr r3, [r7, #4] + 803cb04: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803cb08: 4413 add r3, r2 + 803cb0a: b29a uxth r2, r3 + 803cb0c: 687b ldr r3, [r7, #4] + 803cb0e: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 #endif /* TCP_CHECKSUM_ON_COPY */ /* Update number of segments on the queues. Note that length now may * exceed TCP_SND_QUEUELEN! We don't have to touch pcb->snd_buf * because the total amount of data is constant when packet is split */ pcb->snd_queuelen += pbuf_clen(seg->p); - 803ca8e: 69fb ldr r3, [r7, #28] - 803ca90: 685b ldr r3, [r3, #4] - 803ca92: 4618 mov r0, r3 - 803ca94: f7fa feda bl 803784c - 803ca98: 4603 mov r3, r0 - 803ca9a: 461a mov r2, r3 - 803ca9c: 687b ldr r3, [r7, #4] - 803ca9e: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803caa2: 4413 add r3, r2 - 803caa4: b29a uxth r2, r3 - 803caa6: 687b ldr r3, [r7, #4] - 803caa8: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803cb12: 69fb ldr r3, [r7, #28] + 803cb14: 685b ldr r3, [r3, #4] + 803cb16: 4618 mov r0, r3 + 803cb18: f7fa feda bl 80378d0 + 803cb1c: 4603 mov r3, r0 + 803cb1e: 461a mov r2, r3 + 803cb20: 687b ldr r3, [r7, #4] + 803cb22: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803cb26: 4413 add r3, r2 + 803cb28: b29a uxth r2, r3 + 803cb2a: 687b ldr r3, [r7, #4] + 803cb2c: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 /* Finally insert remainder into queue after split (which stays head) */ seg->next = useg->next; - 803caac: 697b ldr r3, [r7, #20] - 803caae: 681a ldr r2, [r3, #0] - 803cab0: 69fb ldr r3, [r7, #28] - 803cab2: 601a str r2, [r3, #0] + 803cb30: 697b ldr r3, [r7, #20] + 803cb32: 681a ldr r2, [r3, #0] + 803cb34: 69fb ldr r3, [r7, #28] + 803cb36: 601a str r2, [r3, #0] useg->next = seg; - 803cab4: 697b ldr r3, [r7, #20] - 803cab6: 69fa ldr r2, [r7, #28] - 803cab8: 601a str r2, [r3, #0] + 803cb38: 697b ldr r3, [r7, #20] + 803cb3a: 69fa ldr r2, [r7, #28] + 803cb3c: 601a str r2, [r3, #0] #if TCP_OVERSIZE /* If remainder is last segment on the unsent, ensure we clear the oversize amount * because the remainder is always sized to the exact remaining amount */ if (seg->next == NULL) { - 803caba: 69fb ldr r3, [r7, #28] - 803cabc: 681b ldr r3, [r3, #0] - 803cabe: 2b00 cmp r3, #0 - 803cac0: d103 bne.n 803caca + 803cb3e: 69fb ldr r3, [r7, #28] + 803cb40: 681b ldr r3, [r3, #0] + 803cb42: 2b00 cmp r3, #0 + 803cb44: d103 bne.n 803cb4e pcb->unsent_oversize = 0; - 803cac2: 687b ldr r3, [r7, #4] - 803cac4: 2200 movs r2, #0 - 803cac6: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803cb46: 687b ldr r3, [r7, #4] + 803cb48: 2200 movs r2, #0 + 803cb4a: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 } #endif /* TCP_OVERSIZE */ return ERR_OK; - 803caca: 2300 movs r3, #0 - 803cacc: e016 b.n 803cafc + 803cb4e: 2300 movs r3, #0 + 803cb50: e016 b.n 803cb80 goto memerr; - 803cace: bf00 nop - 803cad0: e002 b.n 803cad8 + 803cb52: bf00 nop + 803cb54: e002 b.n 803cb5c goto memerr; - 803cad2: bf00 nop - 803cad4: e000 b.n 803cad8 + 803cb56: bf00 nop + 803cb58: e000 b.n 803cb5c goto memerr; - 803cad6: bf00 nop + 803cb5a: bf00 nop memerr: TCP_STATS_INC(tcp.memerr); LWIP_ASSERT("seg == NULL", seg == NULL); - 803cad8: 69fb ldr r3, [r7, #28] - 803cada: 2b00 cmp r3, #0 - 803cadc: d006 beq.n 803caec - 803cade: 4b09 ldr r3, [pc, #36] ; (803cb04 ) - 803cae0: f44f 7276 mov.w r2, #984 ; 0x3d8 - 803cae4: 490d ldr r1, [pc, #52] ; (803cb1c ) - 803cae6: 4809 ldr r0, [pc, #36] ; (803cb0c ) - 803cae8: f004 f812 bl 8040b10 + 803cb5c: 69fb ldr r3, [r7, #28] + 803cb5e: 2b00 cmp r3, #0 + 803cb60: d006 beq.n 803cb70 + 803cb62: 4b09 ldr r3, [pc, #36] ; (803cb88 ) + 803cb64: f44f 7276 mov.w r2, #984 ; 0x3d8 + 803cb68: 490d ldr r1, [pc, #52] ; (803cba0 ) + 803cb6a: 4809 ldr r0, [pc, #36] ; (803cb90 ) + 803cb6c: f004 f812 bl 8040b94 if (p != NULL) { - 803caec: 693b ldr r3, [r7, #16] - 803caee: 2b00 cmp r3, #0 - 803caf0: d002 beq.n 803caf8 + 803cb70: 693b ldr r3, [r7, #16] + 803cb72: 2b00 cmp r3, #0 + 803cb74: d002 beq.n 803cb7c pbuf_free(p); - 803caf2: 6938 ldr r0, [r7, #16] - 803caf4: f7fa fe22 bl 803773c + 803cb76: 6938 ldr r0, [r7, #16] + 803cb78: f7fa fe22 bl 80377c0 } return ERR_MEM; - 803caf8: f04f 33ff mov.w r3, #4294967295 -} - 803cafc: 4618 mov r0, r3 - 803cafe: 3724 adds r7, #36 ; 0x24 - 803cb00: 46bd mov sp, r7 - 803cb02: bd90 pop {r4, r7, pc} - 803cb04: 08043980 .word 0x08043980 - 803cb08: 08043d14 .word 0x08043d14 - 803cb0c: 080439d4 .word 0x080439d4 - 803cb10: 08043d38 .word 0x08043d38 - 803cb14: 08043d5c .word 0x08043d5c - 803cb18: 08043d6c .word 0x08043d6c - 803cb1c: 08043d7c .word 0x08043d7c - -0803cb20 : + 803cb7c: f04f 33ff mov.w r3, #4294967295 +} + 803cb80: 4618 mov r0, r3 + 803cb82: 3724 adds r7, #36 ; 0x24 + 803cb84: 46bd mov sp, r7 + 803cb86: bd90 pop {r4, r7, pc} + 803cb88: 08043a00 .word 0x08043a00 + 803cb8c: 08043d94 .word 0x08043d94 + 803cb90: 08043a54 .word 0x08043a54 + 803cb94: 08043db8 .word 0x08043db8 + 803cb98: 08043ddc .word 0x08043ddc + 803cb9c: 08043dec .word 0x08043dec + 803cba0: 08043dfc .word 0x08043dfc + +0803cba4 : * @param pcb the tcp_pcb over which to send a segment * @return ERR_OK if sent, another err_t otherwise */ err_t tcp_send_fin(struct tcp_pcb *pcb) { - 803cb20: b590 push {r4, r7, lr} - 803cb22: b085 sub sp, #20 - 803cb24: af00 add r7, sp, #0 - 803cb26: 6078 str r0, [r7, #4] + 803cba4: b590 push {r4, r7, lr} + 803cba6: b085 sub sp, #20 + 803cba8: af00 add r7, sp, #0 + 803cbaa: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_send_fin: invalid pcb", pcb != NULL); - 803cb28: 687b ldr r3, [r7, #4] - 803cb2a: 2b00 cmp r3, #0 - 803cb2c: d106 bne.n 803cb3c - 803cb2e: 4b21 ldr r3, [pc, #132] ; (803cbb4 ) - 803cb30: f240 32eb movw r2, #1003 ; 0x3eb - 803cb34: 4920 ldr r1, [pc, #128] ; (803cbb8 ) - 803cb36: 4821 ldr r0, [pc, #132] ; (803cbbc ) - 803cb38: f003 ffea bl 8040b10 + 803cbac: 687b ldr r3, [r7, #4] + 803cbae: 2b00 cmp r3, #0 + 803cbb0: d106 bne.n 803cbc0 + 803cbb2: 4b21 ldr r3, [pc, #132] ; (803cc38 ) + 803cbb4: f240 32eb movw r2, #1003 ; 0x3eb + 803cbb8: 4920 ldr r1, [pc, #128] ; (803cc3c ) + 803cbba: 4821 ldr r0, [pc, #132] ; (803cc40 ) + 803cbbc: f003 ffea bl 8040b94 /* first, try to add the fin to the last unsent segment */ if (pcb->unsent != NULL) { - 803cb3c: 687b ldr r3, [r7, #4] - 803cb3e: 6edb ldr r3, [r3, #108] ; 0x6c - 803cb40: 2b00 cmp r3, #0 - 803cb42: d02e beq.n 803cba2 + 803cbc0: 687b ldr r3, [r7, #4] + 803cbc2: 6edb ldr r3, [r3, #108] ; 0x6c + 803cbc4: 2b00 cmp r3, #0 + 803cbc6: d02e beq.n 803cc26 struct tcp_seg *last_unsent; for (last_unsent = pcb->unsent; last_unsent->next != NULL; - 803cb44: 687b ldr r3, [r7, #4] - 803cb46: 6edb ldr r3, [r3, #108] ; 0x6c - 803cb48: 60fb str r3, [r7, #12] - 803cb4a: e002 b.n 803cb52 + 803cbc8: 687b ldr r3, [r7, #4] + 803cbca: 6edb ldr r3, [r3, #108] ; 0x6c + 803cbcc: 60fb str r3, [r7, #12] + 803cbce: e002 b.n 803cbd6 last_unsent = last_unsent->next); - 803cb4c: 68fb ldr r3, [r7, #12] - 803cb4e: 681b ldr r3, [r3, #0] - 803cb50: 60fb str r3, [r7, #12] + 803cbd0: 68fb ldr r3, [r7, #12] + 803cbd2: 681b ldr r3, [r3, #0] + 803cbd4: 60fb str r3, [r7, #12] for (last_unsent = pcb->unsent; last_unsent->next != NULL; - 803cb52: 68fb ldr r3, [r7, #12] - 803cb54: 681b ldr r3, [r3, #0] - 803cb56: 2b00 cmp r3, #0 - 803cb58: d1f8 bne.n 803cb4c + 803cbd6: 68fb ldr r3, [r7, #12] + 803cbd8: 681b ldr r3, [r3, #0] + 803cbda: 2b00 cmp r3, #0 + 803cbdc: d1f8 bne.n 803cbd0 if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) { - 803cb5a: 68fb ldr r3, [r7, #12] - 803cb5c: 68db ldr r3, [r3, #12] - 803cb5e: 899b ldrh r3, [r3, #12] - 803cb60: b29b uxth r3, r3 - 803cb62: 4618 mov r0, r3 - 803cb64: f7f9 f9b8 bl 8035ed8 - 803cb68: 4603 mov r3, r0 - 803cb6a: b2db uxtb r3, r3 - 803cb6c: f003 0307 and.w r3, r3, #7 - 803cb70: 2b00 cmp r3, #0 - 803cb72: d116 bne.n 803cba2 + 803cbde: 68fb ldr r3, [r7, #12] + 803cbe0: 68db ldr r3, [r3, #12] + 803cbe2: 899b ldrh r3, [r3, #12] + 803cbe4: b29b uxth r3, r3 + 803cbe6: 4618 mov r0, r3 + 803cbe8: f7f9 f9b8 bl 8035f5c + 803cbec: 4603 mov r3, r0 + 803cbee: b2db uxtb r3, r3 + 803cbf0: f003 0307 and.w r3, r3, #7 + 803cbf4: 2b00 cmp r3, #0 + 803cbf6: d116 bne.n 803cc26 /* no SYN/FIN/RST flag in the header, we can add the FIN flag */ TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN); - 803cb74: 68fb ldr r3, [r7, #12] - 803cb76: 68db ldr r3, [r3, #12] - 803cb78: 899b ldrh r3, [r3, #12] - 803cb7a: b29c uxth r4, r3 - 803cb7c: 2001 movs r0, #1 - 803cb7e: f7f9 f9ab bl 8035ed8 - 803cb82: 4603 mov r3, r0 - 803cb84: 461a mov r2, r3 - 803cb86: 68fb ldr r3, [r7, #12] - 803cb88: 68db ldr r3, [r3, #12] - 803cb8a: 4322 orrs r2, r4 - 803cb8c: b292 uxth r2, r2 - 803cb8e: 819a strh r2, [r3, #12] + 803cbf8: 68fb ldr r3, [r7, #12] + 803cbfa: 68db ldr r3, [r3, #12] + 803cbfc: 899b ldrh r3, [r3, #12] + 803cbfe: b29c uxth r4, r3 + 803cc00: 2001 movs r0, #1 + 803cc02: f7f9 f9ab bl 8035f5c + 803cc06: 4603 mov r3, r0 + 803cc08: 461a mov r2, r3 + 803cc0a: 68fb ldr r3, [r7, #12] + 803cc0c: 68db ldr r3, [r3, #12] + 803cc0e: 4322 orrs r2, r4 + 803cc10: b292 uxth r2, r2 + 803cc12: 819a strh r2, [r3, #12] tcp_set_flags(pcb, TF_FIN); - 803cb90: 687b ldr r3, [r7, #4] - 803cb92: 8b5b ldrh r3, [r3, #26] - 803cb94: f043 0320 orr.w r3, r3, #32 - 803cb98: b29a uxth r2, r3 - 803cb9a: 687b ldr r3, [r7, #4] - 803cb9c: 835a strh r2, [r3, #26] + 803cc14: 687b ldr r3, [r7, #4] + 803cc16: 8b5b ldrh r3, [r3, #26] + 803cc18: f043 0320 orr.w r3, r3, #32 + 803cc1c: b29a uxth r2, r3 + 803cc1e: 687b ldr r3, [r7, #4] + 803cc20: 835a strh r2, [r3, #26] return ERR_OK; - 803cb9e: 2300 movs r3, #0 - 803cba0: e004 b.n 803cbac + 803cc22: 2300 movs r3, #0 + 803cc24: e004 b.n 803cc30 } } /* no data, no length, flags, copy=1, no optdata */ return tcp_enqueue_flags(pcb, TCP_FIN); - 803cba2: 2101 movs r1, #1 - 803cba4: 6878 ldr r0, [r7, #4] - 803cba6: f000 f80b bl 803cbc0 - 803cbaa: 4603 mov r3, r0 -} - 803cbac: 4618 mov r0, r3 - 803cbae: 3714 adds r7, #20 - 803cbb0: 46bd mov sp, r7 - 803cbb2: bd90 pop {r4, r7, pc} - 803cbb4: 08043980 .word 0x08043980 - 803cbb8: 08043d88 .word 0x08043d88 - 803cbbc: 080439d4 .word 0x080439d4 - -0803cbc0 : + 803cc26: 2101 movs r1, #1 + 803cc28: 6878 ldr r0, [r7, #4] + 803cc2a: f000 f80b bl 803cc44 + 803cc2e: 4603 mov r3, r0 +} + 803cc30: 4618 mov r0, r3 + 803cc32: 3714 adds r7, #20 + 803cc34: 46bd mov sp, r7 + 803cc36: bd90 pop {r4, r7, pc} + 803cc38: 08043a00 .word 0x08043a00 + 803cc3c: 08043e08 .word 0x08043e08 + 803cc40: 08043a54 .word 0x08043a54 + +0803cc44 : * @param pcb Protocol control block for the TCP connection. * @param flags TCP header flags to set in the outgoing segment. */ err_t tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags) { - 803cbc0: b580 push {r7, lr} - 803cbc2: b08a sub sp, #40 ; 0x28 - 803cbc4: af02 add r7, sp, #8 - 803cbc6: 6078 str r0, [r7, #4] - 803cbc8: 460b mov r3, r1 - 803cbca: 70fb strb r3, [r7, #3] + 803cc44: b580 push {r7, lr} + 803cc46: b08a sub sp, #40 ; 0x28 + 803cc48: af02 add r7, sp, #8 + 803cc4a: 6078 str r0, [r7, #4] + 803cc4c: 460b mov r3, r1 + 803cc4e: 70fb strb r3, [r7, #3] struct pbuf *p; struct tcp_seg *seg; u8_t optflags = 0; - 803cbcc: 2300 movs r3, #0 - 803cbce: 77fb strb r3, [r7, #31] + 803cc50: 2300 movs r3, #0 + 803cc52: 77fb strb r3, [r7, #31] u8_t optlen = 0; - 803cbd0: 2300 movs r3, #0 - 803cbd2: 75fb strb r3, [r7, #23] + 803cc54: 2300 movs r3, #0 + 803cc56: 75fb strb r3, [r7, #23] LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen)); LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)", - 803cbd4: 78fb ldrb r3, [r7, #3] - 803cbd6: f003 0303 and.w r3, r3, #3 - 803cbda: 2b00 cmp r3, #0 - 803cbdc: d106 bne.n 803cbec - 803cbde: 4b67 ldr r3, [pc, #412] ; (803cd7c ) - 803cbe0: f240 4211 movw r2, #1041 ; 0x411 - 803cbe4: 4966 ldr r1, [pc, #408] ; (803cd80 ) - 803cbe6: 4867 ldr r0, [pc, #412] ; (803cd84 ) - 803cbe8: f003 ff92 bl 8040b10 + 803cc58: 78fb ldrb r3, [r7, #3] + 803cc5a: f003 0303 and.w r3, r3, #3 + 803cc5e: 2b00 cmp r3, #0 + 803cc60: d106 bne.n 803cc70 + 803cc62: 4b67 ldr r3, [pc, #412] ; (803ce00 ) + 803cc64: f240 4211 movw r2, #1041 ; 0x411 + 803cc68: 4966 ldr r1, [pc, #408] ; (803ce04 ) + 803cc6a: 4867 ldr r0, [pc, #412] ; (803ce08 ) + 803cc6c: f003 ff92 bl 8040b94 (flags & (TCP_SYN | TCP_FIN)) != 0); LWIP_ASSERT("tcp_enqueue_flags: invalid pcb", pcb != NULL); - 803cbec: 687b ldr r3, [r7, #4] - 803cbee: 2b00 cmp r3, #0 - 803cbf0: d106 bne.n 803cc00 - 803cbf2: 4b62 ldr r3, [pc, #392] ; (803cd7c ) - 803cbf4: f240 4213 movw r2, #1043 ; 0x413 - 803cbf8: 4963 ldr r1, [pc, #396] ; (803cd88 ) - 803cbfa: 4862 ldr r0, [pc, #392] ; (803cd84 ) - 803cbfc: f003 ff88 bl 8040b10 + 803cc70: 687b ldr r3, [r7, #4] + 803cc72: 2b00 cmp r3, #0 + 803cc74: d106 bne.n 803cc84 + 803cc76: 4b62 ldr r3, [pc, #392] ; (803ce00 ) + 803cc78: f240 4213 movw r2, #1043 ; 0x413 + 803cc7c: 4963 ldr r1, [pc, #396] ; (803ce0c ) + 803cc7e: 4862 ldr r0, [pc, #392] ; (803ce08 ) + 803cc80: f003 ff88 bl 8040b94 /* No need to check pcb->snd_queuelen if only SYN or FIN are allowed! */ /* Get options for this segment. This is a special case since this is the only place where a SYN can be sent. */ if (flags & TCP_SYN) { - 803cc00: 78fb ldrb r3, [r7, #3] - 803cc02: f003 0302 and.w r3, r3, #2 - 803cc06: 2b00 cmp r3, #0 - 803cc08: d001 beq.n 803cc0e + 803cc84: 78fb ldrb r3, [r7, #3] + 803cc86: f003 0302 and.w r3, r3, #2 + 803cc8a: 2b00 cmp r3, #0 + 803cc8c: d001 beq.n 803cc92 optflags = TF_SEG_OPTS_MSS; - 803cc0a: 2301 movs r3, #1 - 803cc0c: 77fb strb r3, [r7, #31] + 803cc8e: 2301 movs r3, #1 + 803cc90: 77fb strb r3, [r7, #31] /* Make sure the timestamp option is only included in data segments if we agreed about it with the remote host (and in active open SYN segments). */ optflags |= TF_SEG_OPTS_TS; } #endif /* LWIP_TCP_TIMESTAMPS */ optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb); - 803cc0e: 7ffb ldrb r3, [r7, #31] - 803cc10: 009b lsls r3, r3, #2 - 803cc12: b2db uxtb r3, r3 - 803cc14: f003 0304 and.w r3, r3, #4 - 803cc18: 75fb strb r3, [r7, #23] + 803cc92: 7ffb ldrb r3, [r7, #31] + 803cc94: 009b lsls r3, r3, #2 + 803cc96: b2db uxtb r3, r3 + 803cc98: f003 0304 and.w r3, r3, #4 + 803cc9c: 75fb strb r3, [r7, #23] /* Allocate pbuf with room for TCP header + options */ if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { - 803cc1a: 7dfb ldrb r3, [r7, #23] - 803cc1c: b29b uxth r3, r3 - 803cc1e: f44f 7220 mov.w r2, #640 ; 0x280 - 803cc22: 4619 mov r1, r3 - 803cc24: 2036 movs r0, #54 ; 0x36 - 803cc26: f7fa faa5 bl 8037174 - 803cc2a: 6138 str r0, [r7, #16] - 803cc2c: 693b ldr r3, [r7, #16] - 803cc2e: 2b00 cmp r3, #0 - 803cc30: d109 bne.n 803cc46 + 803cc9e: 7dfb ldrb r3, [r7, #23] + 803cca0: b29b uxth r3, r3 + 803cca2: f44f 7220 mov.w r2, #640 ; 0x280 + 803cca6: 4619 mov r1, r3 + 803cca8: 2036 movs r0, #54 ; 0x36 + 803ccaa: f7fa faa5 bl 80371f8 + 803ccae: 6138 str r0, [r7, #16] + 803ccb0: 693b ldr r3, [r7, #16] + 803ccb2: 2b00 cmp r3, #0 + 803ccb4: d109 bne.n 803ccca tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803cc32: 687b ldr r3, [r7, #4] - 803cc34: 8b5b ldrh r3, [r3, #26] - 803cc36: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803cc3a: b29a uxth r2, r3 - 803cc3c: 687b ldr r3, [r7, #4] - 803cc3e: 835a strh r2, [r3, #26] + 803ccb6: 687b ldr r3, [r7, #4] + 803ccb8: 8b5b ldrh r3, [r3, #26] + 803ccba: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803ccbe: b29a uxth r2, r3 + 803ccc0: 687b ldr r3, [r7, #4] + 803ccc2: 835a strh r2, [r3, #26] TCP_STATS_INC(tcp.memerr); return ERR_MEM; - 803cc40: f04f 33ff mov.w r3, #4294967295 - 803cc44: e095 b.n 803cd72 + 803ccc4: f04f 33ff mov.w r3, #4294967295 + 803ccc8: e095 b.n 803cdf6 } LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen", - 803cc46: 693b ldr r3, [r7, #16] - 803cc48: 895a ldrh r2, [r3, #10] - 803cc4a: 7dfb ldrb r3, [r7, #23] - 803cc4c: b29b uxth r3, r3 - 803cc4e: 429a cmp r2, r3 - 803cc50: d206 bcs.n 803cc60 - 803cc52: 4b4a ldr r3, [pc, #296] ; (803cd7c ) - 803cc54: f240 4239 movw r2, #1081 ; 0x439 - 803cc58: 494c ldr r1, [pc, #304] ; (803cd8c ) - 803cc5a: 484a ldr r0, [pc, #296] ; (803cd84 ) - 803cc5c: f003 ff58 bl 8040b10 + 803ccca: 693b ldr r3, [r7, #16] + 803cccc: 895a ldrh r2, [r3, #10] + 803ccce: 7dfb ldrb r3, [r7, #23] + 803ccd0: b29b uxth r3, r3 + 803ccd2: 429a cmp r2, r3 + 803ccd4: d206 bcs.n 803cce4 + 803ccd6: 4b4a ldr r3, [pc, #296] ; (803ce00 ) + 803ccd8: f240 4239 movw r2, #1081 ; 0x439 + 803ccdc: 494c ldr r1, [pc, #304] ; (803ce10 ) + 803ccde: 484a ldr r0, [pc, #296] ; (803ce08 ) + 803cce0: f003 ff58 bl 8040b94 (p->len >= optlen)); /* Allocate memory for tcp_seg, and fill in fields. */ if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) { - 803cc60: 687b ldr r3, [r7, #4] - 803cc62: 6dd9 ldr r1, [r3, #92] ; 0x5c - 803cc64: 78fa ldrb r2, [r7, #3] - 803cc66: 7ffb ldrb r3, [r7, #31] - 803cc68: 9300 str r3, [sp, #0] - 803cc6a: 460b mov r3, r1 - 803cc6c: 6939 ldr r1, [r7, #16] - 803cc6e: 6878 ldr r0, [r7, #4] - 803cc70: f7ff f918 bl 803bea4 - 803cc74: 60f8 str r0, [r7, #12] - 803cc76: 68fb ldr r3, [r7, #12] - 803cc78: 2b00 cmp r3, #0 - 803cc7a: d109 bne.n 803cc90 + 803cce4: 687b ldr r3, [r7, #4] + 803cce6: 6dd9 ldr r1, [r3, #92] ; 0x5c + 803cce8: 78fa ldrb r2, [r7, #3] + 803ccea: 7ffb ldrb r3, [r7, #31] + 803ccec: 9300 str r3, [sp, #0] + 803ccee: 460b mov r3, r1 + 803ccf0: 6939 ldr r1, [r7, #16] + 803ccf2: 6878 ldr r0, [r7, #4] + 803ccf4: f7ff f918 bl 803bf28 + 803ccf8: 60f8 str r0, [r7, #12] + 803ccfa: 68fb ldr r3, [r7, #12] + 803ccfc: 2b00 cmp r3, #0 + 803ccfe: d109 bne.n 803cd14 tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803cc7c: 687b ldr r3, [r7, #4] - 803cc7e: 8b5b ldrh r3, [r3, #26] - 803cc80: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803cc84: b29a uxth r2, r3 - 803cc86: 687b ldr r3, [r7, #4] - 803cc88: 835a strh r2, [r3, #26] + 803cd00: 687b ldr r3, [r7, #4] + 803cd02: 8b5b ldrh r3, [r3, #26] + 803cd04: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803cd08: b29a uxth r2, r3 + 803cd0a: 687b ldr r3, [r7, #4] + 803cd0c: 835a strh r2, [r3, #26] TCP_STATS_INC(tcp.memerr); return ERR_MEM; - 803cc8a: f04f 33ff mov.w r3, #4294967295 - 803cc8e: e070 b.n 803cd72 + 803cd0e: f04f 33ff mov.w r3, #4294967295 + 803cd12: e070 b.n 803cdf6 } LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % LWIP_MIN(MEM_ALIGNMENT, 4)) == 0); - 803cc90: 68fb ldr r3, [r7, #12] - 803cc92: 68db ldr r3, [r3, #12] - 803cc94: f003 0303 and.w r3, r3, #3 - 803cc98: 2b00 cmp r3, #0 - 803cc9a: d006 beq.n 803ccaa - 803cc9c: 4b37 ldr r3, [pc, #220] ; (803cd7c ) - 803cc9e: f240 4242 movw r2, #1090 ; 0x442 - 803cca2: 493b ldr r1, [pc, #236] ; (803cd90 ) - 803cca4: 4837 ldr r0, [pc, #220] ; (803cd84 ) - 803cca6: f003 ff33 bl 8040b10 + 803cd14: 68fb ldr r3, [r7, #12] + 803cd16: 68db ldr r3, [r3, #12] + 803cd18: f003 0303 and.w r3, r3, #3 + 803cd1c: 2b00 cmp r3, #0 + 803cd1e: d006 beq.n 803cd2e + 803cd20: 4b37 ldr r3, [pc, #220] ; (803ce00 ) + 803cd22: f240 4242 movw r2, #1090 ; 0x442 + 803cd26: 493b ldr r1, [pc, #236] ; (803ce14 ) + 803cd28: 4837 ldr r0, [pc, #220] ; (803ce08 ) + 803cd2a: f003 ff33 bl 8040b94 LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0); - 803ccaa: 68fb ldr r3, [r7, #12] - 803ccac: 891b ldrh r3, [r3, #8] - 803ccae: 2b00 cmp r3, #0 - 803ccb0: d006 beq.n 803ccc0 - 803ccb2: 4b32 ldr r3, [pc, #200] ; (803cd7c ) - 803ccb4: f240 4243 movw r2, #1091 ; 0x443 - 803ccb8: 4936 ldr r1, [pc, #216] ; (803cd94 ) - 803ccba: 4832 ldr r0, [pc, #200] ; (803cd84 ) - 803ccbc: f003 ff28 bl 8040b10 + 803cd2e: 68fb ldr r3, [r7, #12] + 803cd30: 891b ldrh r3, [r3, #8] + 803cd32: 2b00 cmp r3, #0 + 803cd34: d006 beq.n 803cd44 + 803cd36: 4b32 ldr r3, [pc, #200] ; (803ce00 ) + 803cd38: f240 4243 movw r2, #1091 ; 0x443 + 803cd3c: 4936 ldr r1, [pc, #216] ; (803ce18 ) + 803cd3e: 4832 ldr r0, [pc, #200] ; (803ce08 ) + 803cd40: f003 ff28 bl 8040b94 lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg), (u16_t)flags)); /* Now append seg to pcb->unsent queue */ if (pcb->unsent == NULL) { - 803ccc0: 687b ldr r3, [r7, #4] - 803ccc2: 6edb ldr r3, [r3, #108] ; 0x6c - 803ccc4: 2b00 cmp r3, #0 - 803ccc6: d103 bne.n 803ccd0 + 803cd44: 687b ldr r3, [r7, #4] + 803cd46: 6edb ldr r3, [r3, #108] ; 0x6c + 803cd48: 2b00 cmp r3, #0 + 803cd4a: d103 bne.n 803cd54 pcb->unsent = seg; - 803ccc8: 687b ldr r3, [r7, #4] - 803ccca: 68fa ldr r2, [r7, #12] - 803cccc: 66da str r2, [r3, #108] ; 0x6c - 803ccce: e00d b.n 803ccec + 803cd4c: 687b ldr r3, [r7, #4] + 803cd4e: 68fa ldr r2, [r7, #12] + 803cd50: 66da str r2, [r3, #108] ; 0x6c + 803cd52: e00d b.n 803cd70 } else { struct tcp_seg *useg; for (useg = pcb->unsent; useg->next != NULL; useg = useg->next); - 803ccd0: 687b ldr r3, [r7, #4] - 803ccd2: 6edb ldr r3, [r3, #108] ; 0x6c - 803ccd4: 61bb str r3, [r7, #24] - 803ccd6: e002 b.n 803ccde - 803ccd8: 69bb ldr r3, [r7, #24] - 803ccda: 681b ldr r3, [r3, #0] - 803ccdc: 61bb str r3, [r7, #24] - 803ccde: 69bb ldr r3, [r7, #24] - 803cce0: 681b ldr r3, [r3, #0] - 803cce2: 2b00 cmp r3, #0 - 803cce4: d1f8 bne.n 803ccd8 + 803cd54: 687b ldr r3, [r7, #4] + 803cd56: 6edb ldr r3, [r3, #108] ; 0x6c + 803cd58: 61bb str r3, [r7, #24] + 803cd5a: e002 b.n 803cd62 + 803cd5c: 69bb ldr r3, [r7, #24] + 803cd5e: 681b ldr r3, [r3, #0] + 803cd60: 61bb str r3, [r7, #24] + 803cd62: 69bb ldr r3, [r7, #24] + 803cd64: 681b ldr r3, [r3, #0] + 803cd66: 2b00 cmp r3, #0 + 803cd68: d1f8 bne.n 803cd5c useg->next = seg; - 803cce6: 69bb ldr r3, [r7, #24] - 803cce8: 68fa ldr r2, [r7, #12] - 803ccea: 601a str r2, [r3, #0] + 803cd6a: 69bb ldr r3, [r7, #24] + 803cd6c: 68fa ldr r2, [r7, #12] + 803cd6e: 601a str r2, [r3, #0] } #if TCP_OVERSIZE /* The new unsent tail has no space */ pcb->unsent_oversize = 0; - 803ccec: 687b ldr r3, [r7, #4] - 803ccee: 2200 movs r2, #0 - 803ccf0: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803cd70: 687b ldr r3, [r7, #4] + 803cd72: 2200 movs r2, #0 + 803cd74: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 #endif /* TCP_OVERSIZE */ /* SYN and FIN bump the sequence number */ if ((flags & TCP_SYN) || (flags & TCP_FIN)) { - 803ccf4: 78fb ldrb r3, [r7, #3] - 803ccf6: f003 0302 and.w r3, r3, #2 - 803ccfa: 2b00 cmp r3, #0 - 803ccfc: d104 bne.n 803cd08 - 803ccfe: 78fb ldrb r3, [r7, #3] - 803cd00: f003 0301 and.w r3, r3, #1 - 803cd04: 2b00 cmp r3, #0 - 803cd06: d004 beq.n 803cd12 + 803cd78: 78fb ldrb r3, [r7, #3] + 803cd7a: f003 0302 and.w r3, r3, #2 + 803cd7e: 2b00 cmp r3, #0 + 803cd80: d104 bne.n 803cd8c + 803cd82: 78fb ldrb r3, [r7, #3] + 803cd84: f003 0301 and.w r3, r3, #1 + 803cd88: 2b00 cmp r3, #0 + 803cd8a: d004 beq.n 803cd96 pcb->snd_lbb++; - 803cd08: 687b ldr r3, [r7, #4] - 803cd0a: 6ddb ldr r3, [r3, #92] ; 0x5c - 803cd0c: 1c5a adds r2, r3, #1 - 803cd0e: 687b ldr r3, [r7, #4] - 803cd10: 65da str r2, [r3, #92] ; 0x5c + 803cd8c: 687b ldr r3, [r7, #4] + 803cd8e: 6ddb ldr r3, [r3, #92] ; 0x5c + 803cd90: 1c5a adds r2, r3, #1 + 803cd92: 687b ldr r3, [r7, #4] + 803cd94: 65da str r2, [r3, #92] ; 0x5c /* optlen does not influence snd_buf */ } if (flags & TCP_FIN) { - 803cd12: 78fb ldrb r3, [r7, #3] - 803cd14: f003 0301 and.w r3, r3, #1 - 803cd18: 2b00 cmp r3, #0 - 803cd1a: d006 beq.n 803cd2a + 803cd96: 78fb ldrb r3, [r7, #3] + 803cd98: f003 0301 and.w r3, r3, #1 + 803cd9c: 2b00 cmp r3, #0 + 803cd9e: d006 beq.n 803cdae tcp_set_flags(pcb, TF_FIN); - 803cd1c: 687b ldr r3, [r7, #4] - 803cd1e: 8b5b ldrh r3, [r3, #26] - 803cd20: f043 0320 orr.w r3, r3, #32 - 803cd24: b29a uxth r2, r3 - 803cd26: 687b ldr r3, [r7, #4] - 803cd28: 835a strh r2, [r3, #26] + 803cda0: 687b ldr r3, [r7, #4] + 803cda2: 8b5b ldrh r3, [r3, #26] + 803cda4: f043 0320 orr.w r3, r3, #32 + 803cda8: b29a uxth r2, r3 + 803cdaa: 687b ldr r3, [r7, #4] + 803cdac: 835a strh r2, [r3, #26] } /* update number of segments on the queues */ pcb->snd_queuelen += pbuf_clen(seg->p); - 803cd2a: 68fb ldr r3, [r7, #12] - 803cd2c: 685b ldr r3, [r3, #4] - 803cd2e: 4618 mov r0, r3 - 803cd30: f7fa fd8c bl 803784c - 803cd34: 4603 mov r3, r0 - 803cd36: 461a mov r2, r3 - 803cd38: 687b ldr r3, [r7, #4] - 803cd3a: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803cd3e: 4413 add r3, r2 - 803cd40: b29a uxth r2, r3 - 803cd42: 687b ldr r3, [r7, #4] - 803cd44: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 + 803cdae: 68fb ldr r3, [r7, #12] + 803cdb0: 685b ldr r3, [r3, #4] + 803cdb2: 4618 mov r0, r3 + 803cdb4: f7fa fd8c bl 80378d0 + 803cdb8: 4603 mov r3, r0 + 803cdba: 461a mov r2, r3 + 803cdbc: 687b ldr r3, [r7, #4] + 803cdbe: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803cdc2: 4413 add r3, r2 + 803cdc4: b29a uxth r2, r3 + 803cdc6: 687b ldr r3, [r7, #4] + 803cdc8: f8a3 2066 strh.w r2, [r3, #102] ; 0x66 LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen)); if (pcb->snd_queuelen != 0) { - 803cd48: 687b ldr r3, [r7, #4] - 803cd4a: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803cd4e: 2b00 cmp r3, #0 - 803cd50: d00e beq.n 803cd70 + 803cdcc: 687b ldr r3, [r7, #4] + 803cdce: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803cdd2: 2b00 cmp r3, #0 + 803cdd4: d00e beq.n 803cdf4 LWIP_ASSERT("tcp_enqueue_flags: invalid queue length", - 803cd52: 687b ldr r3, [r7, #4] - 803cd54: 6f1b ldr r3, [r3, #112] ; 0x70 - 803cd56: 2b00 cmp r3, #0 - 803cd58: d10a bne.n 803cd70 - 803cd5a: 687b ldr r3, [r7, #4] - 803cd5c: 6edb ldr r3, [r3, #108] ; 0x6c - 803cd5e: 2b00 cmp r3, #0 - 803cd60: d106 bne.n 803cd70 - 803cd62: 4b06 ldr r3, [pc, #24] ; (803cd7c ) - 803cd64: f240 4265 movw r2, #1125 ; 0x465 - 803cd68: 490b ldr r1, [pc, #44] ; (803cd98 ) - 803cd6a: 4806 ldr r0, [pc, #24] ; (803cd84 ) - 803cd6c: f003 fed0 bl 8040b10 + 803cdd6: 687b ldr r3, [r7, #4] + 803cdd8: 6f1b ldr r3, [r3, #112] ; 0x70 + 803cdda: 2b00 cmp r3, #0 + 803cddc: d10a bne.n 803cdf4 + 803cdde: 687b ldr r3, [r7, #4] + 803cde0: 6edb ldr r3, [r3, #108] ; 0x6c + 803cde2: 2b00 cmp r3, #0 + 803cde4: d106 bne.n 803cdf4 + 803cde6: 4b06 ldr r3, [pc, #24] ; (803ce00 ) + 803cde8: f240 4265 movw r2, #1125 ; 0x465 + 803cdec: 490b ldr r1, [pc, #44] ; (803ce1c ) + 803cdee: 4806 ldr r0, [pc, #24] ; (803ce08 ) + 803cdf0: f003 fed0 bl 8040b94 pcb->unacked != NULL || pcb->unsent != NULL); } return ERR_OK; - 803cd70: 2300 movs r3, #0 -} - 803cd72: 4618 mov r0, r3 - 803cd74: 3720 adds r7, #32 - 803cd76: 46bd mov sp, r7 - 803cd78: bd80 pop {r7, pc} - 803cd7a: bf00 nop - 803cd7c: 08043980 .word 0x08043980 - 803cd80: 08043da4 .word 0x08043da4 - 803cd84: 080439d4 .word 0x080439d4 - 803cd88: 08043dfc .word 0x08043dfc - 803cd8c: 08043e1c .word 0x08043e1c - 803cd90: 08043e58 .word 0x08043e58 - 803cd94: 08043e70 .word 0x08043e70 - 803cd98: 08043e9c .word 0x08043e9c - -0803cd9c : + 803cdf4: 2300 movs r3, #0 +} + 803cdf6: 4618 mov r0, r3 + 803cdf8: 3720 adds r7, #32 + 803cdfa: 46bd mov sp, r7 + 803cdfc: bd80 pop {r7, pc} + 803cdfe: bf00 nop + 803ce00: 08043a00 .word 0x08043a00 + 803ce04: 08043e24 .word 0x08043e24 + 803ce08: 08043a54 .word 0x08043a54 + 803ce0c: 08043e7c .word 0x08043e7c + 803ce10: 08043e9c .word 0x08043e9c + 803ce14: 08043ed8 .word 0x08043ed8 + 803ce18: 08043ef0 .word 0x08043ef0 + 803ce1c: 08043f1c .word 0x08043f1c + +0803ce20 : * @return ERR_OK if data has been sent or nothing to send * another err_t on error */ err_t tcp_output(struct tcp_pcb *pcb) { - 803cd9c: b5b0 push {r4, r5, r7, lr} - 803cd9e: b08a sub sp, #40 ; 0x28 - 803cda0: af00 add r7, sp, #0 - 803cda2: 6078 str r0, [r7, #4] + 803ce20: b5b0 push {r4, r5, r7, lr} + 803ce22: b08a sub sp, #40 ; 0x28 + 803ce24: af00 add r7, sp, #0 + 803ce26: 6078 str r0, [r7, #4] s16_t i = 0; #endif /* TCP_CWND_DEBUG */ LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("tcp_output: invalid pcb", pcb != NULL); - 803cda4: 687b ldr r3, [r7, #4] - 803cda6: 2b00 cmp r3, #0 - 803cda8: d106 bne.n 803cdb8 - 803cdaa: 4b8a ldr r3, [pc, #552] ; (803cfd4 ) - 803cdac: f240 42e1 movw r2, #1249 ; 0x4e1 - 803cdb0: 4989 ldr r1, [pc, #548] ; (803cfd8 ) - 803cdb2: 488a ldr r0, [pc, #552] ; (803cfdc ) - 803cdb4: f003 feac bl 8040b10 + 803ce28: 687b ldr r3, [r7, #4] + 803ce2a: 2b00 cmp r3, #0 + 803ce2c: d106 bne.n 803ce3c + 803ce2e: 4b8a ldr r3, [pc, #552] ; (803d058 ) + 803ce30: f240 42e1 movw r2, #1249 ; 0x4e1 + 803ce34: 4989 ldr r1, [pc, #548] ; (803d05c ) + 803ce36: 488a ldr r0, [pc, #552] ; (803d060 ) + 803ce38: f003 feac bl 8040b94 /* pcb->state LISTEN not allowed here */ LWIP_ASSERT("don't call tcp_output for listen-pcbs", - 803cdb8: 687b ldr r3, [r7, #4] - 803cdba: 7d1b ldrb r3, [r3, #20] - 803cdbc: 2b01 cmp r3, #1 - 803cdbe: d106 bne.n 803cdce - 803cdc0: 4b84 ldr r3, [pc, #528] ; (803cfd4 ) - 803cdc2: f240 42e3 movw r2, #1251 ; 0x4e3 - 803cdc6: 4986 ldr r1, [pc, #536] ; (803cfe0 ) - 803cdc8: 4884 ldr r0, [pc, #528] ; (803cfdc ) - 803cdca: f003 fea1 bl 8040b10 + 803ce3c: 687b ldr r3, [r7, #4] + 803ce3e: 7d1b ldrb r3, [r3, #20] + 803ce40: 2b01 cmp r3, #1 + 803ce42: d106 bne.n 803ce52 + 803ce44: 4b84 ldr r3, [pc, #528] ; (803d058 ) + 803ce46: f240 42e3 movw r2, #1251 ; 0x4e3 + 803ce4a: 4986 ldr r1, [pc, #536] ; (803d064 ) + 803ce4c: 4884 ldr r0, [pc, #528] ; (803d060 ) + 803ce4e: f003 fea1 bl 8040b94 /* First, check if we are invoked by the TCP input processing code. If so, we do not output anything. Instead, we rely on the input processing code to call us when input processing is done with. */ if (tcp_input_pcb == pcb) { - 803cdce: 4b85 ldr r3, [pc, #532] ; (803cfe4 ) - 803cdd0: 681b ldr r3, [r3, #0] - 803cdd2: 687a ldr r2, [r7, #4] - 803cdd4: 429a cmp r2, r3 - 803cdd6: d101 bne.n 803cddc + 803ce52: 4b85 ldr r3, [pc, #532] ; (803d068 ) + 803ce54: 681b ldr r3, [r3, #0] + 803ce56: 687a ldr r2, [r7, #4] + 803ce58: 429a cmp r2, r3 + 803ce5a: d101 bne.n 803ce60 return ERR_OK; - 803cdd8: 2300 movs r3, #0 - 803cdda: e1ce b.n 803d17a + 803ce5c: 2300 movs r3, #0 + 803ce5e: e1ce b.n 803d1fe } wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd); - 803cddc: 687b ldr r3, [r7, #4] - 803cdde: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 - 803cde2: 687b ldr r3, [r7, #4] - 803cde4: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803cde8: 4293 cmp r3, r2 - 803cdea: bf28 it cs - 803cdec: 4613 movcs r3, r2 - 803cdee: b29b uxth r3, r3 - 803cdf0: 61bb str r3, [r7, #24] + 803ce60: 687b ldr r3, [r7, #4] + 803ce62: f8b3 2048 ldrh.w r2, [r3, #72] ; 0x48 + 803ce66: 687b ldr r3, [r7, #4] + 803ce68: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803ce6c: 4293 cmp r3, r2 + 803ce6e: bf28 it cs + 803ce70: 4613 movcs r3, r2 + 803ce72: b29b uxth r3, r3 + 803ce74: 61bb str r3, [r7, #24] seg = pcb->unsent; - 803cdf2: 687b ldr r3, [r7, #4] - 803cdf4: 6edb ldr r3, [r3, #108] ; 0x6c - 803cdf6: 627b str r3, [r7, #36] ; 0x24 + 803ce76: 687b ldr r3, [r7, #4] + 803ce78: 6edb ldr r3, [r3, #108] ; 0x6c + 803ce7a: 627b str r3, [r7, #36] ; 0x24 if (seg == NULL) { - 803cdf8: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cdfa: 2b00 cmp r3, #0 - 803cdfc: d10b bne.n 803ce16 + 803ce7c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803ce7e: 2b00 cmp r3, #0 + 803ce80: d10b bne.n 803ce9a ", seg == NULL, ack %"U32_F"\n", pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack)); /* If the TF_ACK_NOW flag is set and the ->unsent queue is empty, construct * an empty ACK segment and send it. */ if (pcb->flags & TF_ACK_NOW) { - 803cdfe: 687b ldr r3, [r7, #4] - 803ce00: 8b5b ldrh r3, [r3, #26] - 803ce02: f003 0302 and.w r3, r3, #2 - 803ce06: 2b00 cmp r3, #0 - 803ce08: f000 81aa beq.w 803d160 + 803ce82: 687b ldr r3, [r7, #4] + 803ce84: 8b5b ldrh r3, [r3, #26] + 803ce86: f003 0302 and.w r3, r3, #2 + 803ce8a: 2b00 cmp r3, #0 + 803ce8c: f000 81aa beq.w 803d1e4 return tcp_send_empty_ack(pcb); - 803ce0c: 6878 ldr r0, [r7, #4] - 803ce0e: f000 fdcb bl 803d9a8 - 803ce12: 4603 mov r3, r0 - 803ce14: e1b1 b.n 803d17a + 803ce90: 6878 ldr r0, [r7, #4] + 803ce92: f000 fdcb bl 803da2c + 803ce96: 4603 mov r3, r0 + 803ce98: e1b1 b.n 803d1fe pcb->snd_wnd, pcb->cwnd, wnd, lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len, lwip_ntohl(seg->tcphdr->seqno), pcb->lastack)); } netif = tcp_route(pcb, &pcb->local_ip, &pcb->remote_ip); - 803ce16: 6879 ldr r1, [r7, #4] - 803ce18: 687b ldr r3, [r7, #4] - 803ce1a: 3304 adds r3, #4 - 803ce1c: 461a mov r2, r3 - 803ce1e: 6878 ldr r0, [r7, #4] - 803ce20: f7ff f824 bl 803be6c - 803ce24: 6178 str r0, [r7, #20] + 803ce9a: 6879 ldr r1, [r7, #4] + 803ce9c: 687b ldr r3, [r7, #4] + 803ce9e: 3304 adds r3, #4 + 803cea0: 461a mov r2, r3 + 803cea2: 6878 ldr r0, [r7, #4] + 803cea4: f7ff f824 bl 803bef0 + 803cea8: 6178 str r0, [r7, #20] if (netif == NULL) { - 803ce26: 697b ldr r3, [r7, #20] - 803ce28: 2b00 cmp r3, #0 - 803ce2a: d102 bne.n 803ce32 + 803ceaa: 697b ldr r3, [r7, #20] + 803ceac: 2b00 cmp r3, #0 + 803ceae: d102 bne.n 803ceb6 return ERR_RTE; - 803ce2c: f06f 0303 mvn.w r3, #3 - 803ce30: e1a3 b.n 803d17a + 803ceb0: f06f 0303 mvn.w r3, #3 + 803ceb4: e1a3 b.n 803d1fe } /* If we don't have a local IP address, we get one from netif */ if (ip_addr_isany(&pcb->local_ip)) { - 803ce32: 687b ldr r3, [r7, #4] - 803ce34: 2b00 cmp r3, #0 - 803ce36: d003 beq.n 803ce40 - 803ce38: 687b ldr r3, [r7, #4] - 803ce3a: 681b ldr r3, [r3, #0] - 803ce3c: 2b00 cmp r3, #0 - 803ce3e: d111 bne.n 803ce64 + 803ceb6: 687b ldr r3, [r7, #4] + 803ceb8: 2b00 cmp r3, #0 + 803ceba: d003 beq.n 803cec4 + 803cebc: 687b ldr r3, [r7, #4] + 803cebe: 681b ldr r3, [r3, #0] + 803cec0: 2b00 cmp r3, #0 + 803cec2: d111 bne.n 803cee8 const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, &pcb->remote_ip); - 803ce40: 697b ldr r3, [r7, #20] - 803ce42: 2b00 cmp r3, #0 - 803ce44: d002 beq.n 803ce4c - 803ce46: 697b ldr r3, [r7, #20] - 803ce48: 3304 adds r3, #4 - 803ce4a: e000 b.n 803ce4e - 803ce4c: 2300 movs r3, #0 - 803ce4e: 613b str r3, [r7, #16] + 803cec4: 697b ldr r3, [r7, #20] + 803cec6: 2b00 cmp r3, #0 + 803cec8: d002 beq.n 803ced0 + 803ceca: 697b ldr r3, [r7, #20] + 803cecc: 3304 adds r3, #4 + 803cece: e000 b.n 803ced2 + 803ced0: 2300 movs r3, #0 + 803ced2: 613b str r3, [r7, #16] if (local_ip == NULL) { - 803ce50: 693b ldr r3, [r7, #16] - 803ce52: 2b00 cmp r3, #0 - 803ce54: d102 bne.n 803ce5c + 803ced4: 693b ldr r3, [r7, #16] + 803ced6: 2b00 cmp r3, #0 + 803ced8: d102 bne.n 803cee0 return ERR_RTE; - 803ce56: f06f 0303 mvn.w r3, #3 - 803ce5a: e18e b.n 803d17a + 803ceda: f06f 0303 mvn.w r3, #3 + 803cede: e18e b.n 803d1fe } ip_addr_copy(pcb->local_ip, *local_ip); - 803ce5c: 693b ldr r3, [r7, #16] - 803ce5e: 681a ldr r2, [r3, #0] - 803ce60: 687b ldr r3, [r7, #4] - 803ce62: 601a str r2, [r3, #0] + 803cee0: 693b ldr r3, [r7, #16] + 803cee2: 681a ldr r2, [r3, #0] + 803cee4: 687b ldr r3, [r7, #4] + 803cee6: 601a str r2, [r3, #0] } /* Handle the current segment not fitting within the window */ if (lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd) { - 803ce64: 6a7b ldr r3, [r7, #36] ; 0x24 - 803ce66: 68db ldr r3, [r3, #12] - 803ce68: 685b ldr r3, [r3, #4] - 803ce6a: 4618 mov r0, r3 - 803ce6c: f7f9 f849 bl 8035f02 - 803ce70: 4602 mov r2, r0 - 803ce72: 687b ldr r3, [r7, #4] - 803ce74: 6c5b ldr r3, [r3, #68] ; 0x44 - 803ce76: 1ad3 subs r3, r2, r3 - 803ce78: 6a7a ldr r2, [r7, #36] ; 0x24 - 803ce7a: 8912 ldrh r2, [r2, #8] - 803ce7c: 4413 add r3, r2 - 803ce7e: 69ba ldr r2, [r7, #24] - 803ce80: 429a cmp r2, r3 - 803ce82: d227 bcs.n 803ced4 + 803cee8: 6a7b ldr r3, [r7, #36] ; 0x24 + 803ceea: 68db ldr r3, [r3, #12] + 803ceec: 685b ldr r3, [r3, #4] + 803ceee: 4618 mov r0, r3 + 803cef0: f7f9 f849 bl 8035f86 + 803cef4: 4602 mov r2, r0 + 803cef6: 687b ldr r3, [r7, #4] + 803cef8: 6c5b ldr r3, [r3, #68] ; 0x44 + 803cefa: 1ad3 subs r3, r2, r3 + 803cefc: 6a7a ldr r2, [r7, #36] ; 0x24 + 803cefe: 8912 ldrh r2, [r2, #8] + 803cf00: 4413 add r3, r2 + 803cf02: 69ba ldr r2, [r7, #24] + 803cf04: 429a cmp r2, r3 + 803cf06: d227 bcs.n 803cf58 * within the remaining (could be 0) send window and RTO timer is not running (we * have no in-flight data). If window is still too small after persist timer fires, * then we split the segment. We don't consider the congestion window since a cwnd * smaller than 1 SMSS implies in-flight data */ if (wnd == pcb->snd_wnd && pcb->unacked == NULL && pcb->persist_backoff == 0) { - 803ce84: 687b ldr r3, [r7, #4] - 803ce86: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 - 803ce8a: 461a mov r2, r3 - 803ce8c: 69bb ldr r3, [r7, #24] - 803ce8e: 4293 cmp r3, r2 - 803ce90: d114 bne.n 803cebc - 803ce92: 687b ldr r3, [r7, #4] - 803ce94: 6f1b ldr r3, [r3, #112] ; 0x70 - 803ce96: 2b00 cmp r3, #0 - 803ce98: d110 bne.n 803cebc - 803ce9a: 687b ldr r3, [r7, #4] - 803ce9c: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 - 803cea0: 2b00 cmp r3, #0 - 803cea2: d10b bne.n 803cebc + 803cf08: 687b ldr r3, [r7, #4] + 803cf0a: f8b3 3060 ldrh.w r3, [r3, #96] ; 0x60 + 803cf0e: 461a mov r2, r3 + 803cf10: 69bb ldr r3, [r7, #24] + 803cf12: 4293 cmp r3, r2 + 803cf14: d114 bne.n 803cf40 + 803cf16: 687b ldr r3, [r7, #4] + 803cf18: 6f1b ldr r3, [r3, #112] ; 0x70 + 803cf1a: 2b00 cmp r3, #0 + 803cf1c: d110 bne.n 803cf40 + 803cf1e: 687b ldr r3, [r7, #4] + 803cf20: f893 3099 ldrb.w r3, [r3, #153] ; 0x99 + 803cf24: 2b00 cmp r3, #0 + 803cf26: d10b bne.n 803cf40 pcb->persist_cnt = 0; - 803cea4: 687b ldr r3, [r7, #4] - 803cea6: 2200 movs r2, #0 - 803cea8: f883 2098 strb.w r2, [r3, #152] ; 0x98 + 803cf28: 687b ldr r3, [r7, #4] + 803cf2a: 2200 movs r2, #0 + 803cf2c: f883 2098 strb.w r2, [r3, #152] ; 0x98 pcb->persist_backoff = 1; - 803ceac: 687b ldr r3, [r7, #4] - 803ceae: 2201 movs r2, #1 - 803ceb0: f883 2099 strb.w r2, [r3, #153] ; 0x99 + 803cf30: 687b ldr r3, [r7, #4] + 803cf32: 2201 movs r2, #1 + 803cf34: f883 2099 strb.w r2, [r3, #153] ; 0x99 pcb->persist_probe = 0; - 803ceb4: 687b ldr r3, [r7, #4] - 803ceb6: 2200 movs r2, #0 - 803ceb8: f883 209a strb.w r2, [r3, #154] ; 0x9a + 803cf38: 687b ldr r3, [r7, #4] + 803cf3a: 2200 movs r2, #0 + 803cf3c: f883 209a strb.w r2, [r3, #154] ; 0x9a } /* We need an ACK, but can't send data now, so send an empty ACK */ if (pcb->flags & TF_ACK_NOW) { - 803cebc: 687b ldr r3, [r7, #4] - 803cebe: 8b5b ldrh r3, [r3, #26] - 803cec0: f003 0302 and.w r3, r3, #2 - 803cec4: 2b00 cmp r3, #0 - 803cec6: f000 814d beq.w 803d164 + 803cf40: 687b ldr r3, [r7, #4] + 803cf42: 8b5b ldrh r3, [r3, #26] + 803cf44: f003 0302 and.w r3, r3, #2 + 803cf48: 2b00 cmp r3, #0 + 803cf4a: f000 814d beq.w 803d1e8 return tcp_send_empty_ack(pcb); - 803ceca: 6878 ldr r0, [r7, #4] - 803cecc: f000 fd6c bl 803d9a8 - 803ced0: 4603 mov r3, r0 - 803ced2: e152 b.n 803d17a + 803cf4e: 6878 ldr r0, [r7, #4] + 803cf50: f000 fd6c bl 803da2c + 803cf54: 4603 mov r3, r0 + 803cf56: e152 b.n 803d1fe } goto output_done; } /* Stop persist timer, above conditions are not active */ pcb->persist_backoff = 0; - 803ced4: 687b ldr r3, [r7, #4] - 803ced6: 2200 movs r2, #0 - 803ced8: f883 2099 strb.w r2, [r3, #153] ; 0x99 + 803cf58: 687b ldr r3, [r7, #4] + 803cf5a: 2200 movs r2, #0 + 803cf5c: f883 2099 strb.w r2, [r3, #153] ; 0x99 /* useg should point to last segment on unacked queue */ useg = pcb->unacked; - 803cedc: 687b ldr r3, [r7, #4] - 803cede: 6f1b ldr r3, [r3, #112] ; 0x70 - 803cee0: 623b str r3, [r7, #32] + 803cf60: 687b ldr r3, [r7, #4] + 803cf62: 6f1b ldr r3, [r3, #112] ; 0x70 + 803cf64: 623b str r3, [r7, #32] if (useg != NULL) { - 803cee2: 6a3b ldr r3, [r7, #32] - 803cee4: 2b00 cmp r3, #0 - 803cee6: f000 811c beq.w 803d122 + 803cf66: 6a3b ldr r3, [r7, #32] + 803cf68: 2b00 cmp r3, #0 + 803cf6a: f000 811c beq.w 803d1a6 for (; useg->next != NULL; useg = useg->next); - 803ceea: e002 b.n 803cef2 - 803ceec: 6a3b ldr r3, [r7, #32] - 803ceee: 681b ldr r3, [r3, #0] - 803cef0: 623b str r3, [r7, #32] - 803cef2: 6a3b ldr r3, [r7, #32] - 803cef4: 681b ldr r3, [r3, #0] - 803cef6: 2b00 cmp r3, #0 - 803cef8: d1f8 bne.n 803ceec + 803cf6e: e002 b.n 803cf76 + 803cf70: 6a3b ldr r3, [r7, #32] + 803cf72: 681b ldr r3, [r3, #0] + 803cf74: 623b str r3, [r7, #32] + 803cf76: 6a3b ldr r3, [r7, #32] + 803cf78: 681b ldr r3, [r3, #0] + 803cf7a: 2b00 cmp r3, #0 + 803cf7c: d1f8 bne.n 803cf70 } /* data available and window allows it to be sent? */ while (seg != NULL && - 803cefa: e112 b.n 803d122 + 803cf7e: e112 b.n 803d1a6 lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) { LWIP_ASSERT("RST not expected here!", - 803cefc: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cefe: 68db ldr r3, [r3, #12] - 803cf00: 899b ldrh r3, [r3, #12] - 803cf02: b29b uxth r3, r3 - 803cf04: 4618 mov r0, r3 - 803cf06: f7f8 ffe7 bl 8035ed8 - 803cf0a: 4603 mov r3, r0 - 803cf0c: b2db uxtb r3, r3 - 803cf0e: f003 0304 and.w r3, r3, #4 - 803cf12: 2b00 cmp r3, #0 - 803cf14: d006 beq.n 803cf24 - 803cf16: 4b2f ldr r3, [pc, #188] ; (803cfd4 ) - 803cf18: f240 5236 movw r2, #1334 ; 0x536 - 803cf1c: 4932 ldr r1, [pc, #200] ; (803cfe8 ) - 803cf1e: 482f ldr r0, [pc, #188] ; (803cfdc ) - 803cf20: f003 fdf6 bl 8040b10 + 803cf80: 6a7b ldr r3, [r7, #36] ; 0x24 + 803cf82: 68db ldr r3, [r3, #12] + 803cf84: 899b ldrh r3, [r3, #12] + 803cf86: b29b uxth r3, r3 + 803cf88: 4618 mov r0, r3 + 803cf8a: f7f8 ffe7 bl 8035f5c + 803cf8e: 4603 mov r3, r0 + 803cf90: b2db uxtb r3, r3 + 803cf92: f003 0304 and.w r3, r3, #4 + 803cf96: 2b00 cmp r3, #0 + 803cf98: d006 beq.n 803cfa8 + 803cf9a: 4b2f ldr r3, [pc, #188] ; (803d058 ) + 803cf9c: f240 5236 movw r2, #1334 ; 0x536 + 803cfa0: 4932 ldr r1, [pc, #200] ; (803d06c ) + 803cfa2: 482f ldr r0, [pc, #188] ; (803d060 ) + 803cfa4: f003 fdf6 bl 8040b94 * - if tcp_write had a memory error before (prevent delayed ACK timeout) or * - if FIN was already enqueued for this PCB (SYN is always alone in a segment - * either seg->next != NULL or pcb->unacked == NULL; * RST is no sent using tcp_write/tcp_output. */ if ((tcp_do_output_nagle(pcb) == 0) && - 803cf24: 687b ldr r3, [r7, #4] - 803cf26: 6f1b ldr r3, [r3, #112] ; 0x70 - 803cf28: 2b00 cmp r3, #0 - 803cf2a: d01f beq.n 803cf6c - 803cf2c: 687b ldr r3, [r7, #4] - 803cf2e: 8b5b ldrh r3, [r3, #26] - 803cf30: f003 0344 and.w r3, r3, #68 ; 0x44 - 803cf34: 2b00 cmp r3, #0 - 803cf36: d119 bne.n 803cf6c - 803cf38: 687b ldr r3, [r7, #4] - 803cf3a: 6edb ldr r3, [r3, #108] ; 0x6c - 803cf3c: 2b00 cmp r3, #0 - 803cf3e: d00b beq.n 803cf58 - 803cf40: 687b ldr r3, [r7, #4] - 803cf42: 6edb ldr r3, [r3, #108] ; 0x6c - 803cf44: 681b ldr r3, [r3, #0] - 803cf46: 2b00 cmp r3, #0 - 803cf48: d110 bne.n 803cf6c - 803cf4a: 687b ldr r3, [r7, #4] - 803cf4c: 6edb ldr r3, [r3, #108] ; 0x6c - 803cf4e: 891a ldrh r2, [r3, #8] - 803cf50: 687b ldr r3, [r7, #4] - 803cf52: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803cf54: 429a cmp r2, r3 - 803cf56: d209 bcs.n 803cf6c - 803cf58: 687b ldr r3, [r7, #4] - 803cf5a: f8b3 3064 ldrh.w r3, [r3, #100] ; 0x64 - 803cf5e: 2b00 cmp r3, #0 - 803cf60: d004 beq.n 803cf6c - 803cf62: 687b ldr r3, [r7, #4] - 803cf64: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 - 803cf68: 2b08 cmp r3, #8 - 803cf6a: d901 bls.n 803cf70 - 803cf6c: 2301 movs r3, #1 - 803cf6e: e000 b.n 803cf72 - 803cf70: 2300 movs r3, #0 - 803cf72: 2b00 cmp r3, #0 - 803cf74: d106 bne.n 803cf84 + 803cfa8: 687b ldr r3, [r7, #4] + 803cfaa: 6f1b ldr r3, [r3, #112] ; 0x70 + 803cfac: 2b00 cmp r3, #0 + 803cfae: d01f beq.n 803cff0 + 803cfb0: 687b ldr r3, [r7, #4] + 803cfb2: 8b5b ldrh r3, [r3, #26] + 803cfb4: f003 0344 and.w r3, r3, #68 ; 0x44 + 803cfb8: 2b00 cmp r3, #0 + 803cfba: d119 bne.n 803cff0 + 803cfbc: 687b ldr r3, [r7, #4] + 803cfbe: 6edb ldr r3, [r3, #108] ; 0x6c + 803cfc0: 2b00 cmp r3, #0 + 803cfc2: d00b beq.n 803cfdc + 803cfc4: 687b ldr r3, [r7, #4] + 803cfc6: 6edb ldr r3, [r3, #108] ; 0x6c + 803cfc8: 681b ldr r3, [r3, #0] + 803cfca: 2b00 cmp r3, #0 + 803cfcc: d110 bne.n 803cff0 + 803cfce: 687b ldr r3, [r7, #4] + 803cfd0: 6edb ldr r3, [r3, #108] ; 0x6c + 803cfd2: 891a ldrh r2, [r3, #8] + 803cfd4: 687b ldr r3, [r7, #4] + 803cfd6: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803cfd8: 429a cmp r2, r3 + 803cfda: d209 bcs.n 803cff0 + 803cfdc: 687b ldr r3, [r7, #4] + 803cfde: f8b3 3064 ldrh.w r3, [r3, #100] ; 0x64 + 803cfe2: 2b00 cmp r3, #0 + 803cfe4: d004 beq.n 803cff0 + 803cfe6: 687b ldr r3, [r7, #4] + 803cfe8: f8b3 3066 ldrh.w r3, [r3, #102] ; 0x66 + 803cfec: 2b08 cmp r3, #8 + 803cfee: d901 bls.n 803cff4 + 803cff0: 2301 movs r3, #1 + 803cff2: e000 b.n 803cff6 + 803cff4: 2300 movs r3, #0 + 803cff6: 2b00 cmp r3, #0 + 803cff8: d106 bne.n 803d008 ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)) { - 803cf76: 687b ldr r3, [r7, #4] - 803cf78: 8b5b ldrh r3, [r3, #26] - 803cf7a: f003 03a0 and.w r3, r3, #160 ; 0xa0 + 803cffa: 687b ldr r3, [r7, #4] + 803cffc: 8b5b ldrh r3, [r3, #26] + 803cffe: f003 03a0 and.w r3, r3, #160 ; 0xa0 if ((tcp_do_output_nagle(pcb) == 0) && - 803cf7e: 2b00 cmp r3, #0 - 803cf80: f000 80e4 beq.w 803d14c + 803d002: 2b00 cmp r3, #0 + 803d004: f000 80e4 beq.w 803d1d0 pcb->lastack, lwip_ntohl(seg->tcphdr->seqno), pcb->lastack, i)); ++i; #endif /* TCP_CWND_DEBUG */ if (pcb->state != SYN_SENT) { - 803cf84: 687b ldr r3, [r7, #4] - 803cf86: 7d1b ldrb r3, [r3, #20] - 803cf88: 2b02 cmp r3, #2 - 803cf8a: d00d beq.n 803cfa8 + 803d008: 687b ldr r3, [r7, #4] + 803d00a: 7d1b ldrb r3, [r3, #20] + 803d00c: 2b02 cmp r3, #2 + 803d00e: d00d beq.n 803d02c TCPH_SET_FLAG(seg->tcphdr, TCP_ACK); - 803cf8c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cf8e: 68db ldr r3, [r3, #12] - 803cf90: 899b ldrh r3, [r3, #12] - 803cf92: b29c uxth r4, r3 - 803cf94: 2010 movs r0, #16 - 803cf96: f7f8 ff9f bl 8035ed8 - 803cf9a: 4603 mov r3, r0 - 803cf9c: 461a mov r2, r3 - 803cf9e: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cfa0: 68db ldr r3, [r3, #12] - 803cfa2: 4322 orrs r2, r4 - 803cfa4: b292 uxth r2, r2 - 803cfa6: 819a strh r2, [r3, #12] + 803d010: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d012: 68db ldr r3, [r3, #12] + 803d014: 899b ldrh r3, [r3, #12] + 803d016: b29c uxth r4, r3 + 803d018: 2010 movs r0, #16 + 803d01a: f7f8 ff9f bl 8035f5c + 803d01e: 4603 mov r3, r0 + 803d020: 461a mov r2, r3 + 803d022: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d024: 68db ldr r3, [r3, #12] + 803d026: 4322 orrs r2, r4 + 803d028: b292 uxth r2, r2 + 803d02a: 819a strh r2, [r3, #12] } err = tcp_output_segment(seg, pcb, netif); - 803cfa8: 697a ldr r2, [r7, #20] - 803cfaa: 6879 ldr r1, [r7, #4] - 803cfac: 6a78 ldr r0, [r7, #36] ; 0x24 - 803cfae: f000 f909 bl 803d1c4 - 803cfb2: 4603 mov r3, r0 - 803cfb4: 73fb strb r3, [r7, #15] + 803d02c: 697a ldr r2, [r7, #20] + 803d02e: 6879 ldr r1, [r7, #4] + 803d030: 6a78 ldr r0, [r7, #36] ; 0x24 + 803d032: f000 f909 bl 803d248 + 803d036: 4603 mov r3, r0 + 803d038: 73fb strb r3, [r7, #15] if (err != ERR_OK) { - 803cfb6: f997 300f ldrsb.w r3, [r7, #15] - 803cfba: 2b00 cmp r3, #0 - 803cfbc: d016 beq.n 803cfec + 803d03a: f997 300f ldrsb.w r3, [r7, #15] + 803d03e: 2b00 cmp r3, #0 + 803d040: d016 beq.n 803d070 /* segment could not be sent, for whatever reason */ tcp_set_flags(pcb, TF_NAGLEMEMERR); - 803cfbe: 687b ldr r3, [r7, #4] - 803cfc0: 8b5b ldrh r3, [r3, #26] - 803cfc2: f043 0380 orr.w r3, r3, #128 ; 0x80 - 803cfc6: b29a uxth r2, r3 - 803cfc8: 687b ldr r3, [r7, #4] - 803cfca: 835a strh r2, [r3, #26] + 803d042: 687b ldr r3, [r7, #4] + 803d044: 8b5b ldrh r3, [r3, #26] + 803d046: f043 0380 orr.w r3, r3, #128 ; 0x80 + 803d04a: b29a uxth r2, r3 + 803d04c: 687b ldr r3, [r7, #4] + 803d04e: 835a strh r2, [r3, #26] return err; - 803cfcc: f997 300f ldrsb.w r3, [r7, #15] - 803cfd0: e0d3 b.n 803d17a - 803cfd2: bf00 nop - 803cfd4: 08043980 .word 0x08043980 - 803cfd8: 08043ec4 .word 0x08043ec4 - 803cfdc: 080439d4 .word 0x080439d4 - 803cfe0: 08043edc .word 0x08043edc - 803cfe4: 2400e9a4 .word 0x2400e9a4 - 803cfe8: 08043f04 .word 0x08043f04 + 803d050: f997 300f ldrsb.w r3, [r7, #15] + 803d054: e0d3 b.n 803d1fe + 803d056: bf00 nop + 803d058: 08043a00 .word 0x08043a00 + 803d05c: 08043f44 .word 0x08043f44 + 803d060: 08043a54 .word 0x08043a54 + 803d064: 08043f5c .word 0x08043f5c + 803d068: 2400e9ac .word 0x2400e9ac + 803d06c: 08043f84 .word 0x08043f84 } #if TCP_OVERSIZE_DBGCHECK seg->oversize_left = 0; #endif /* TCP_OVERSIZE_DBGCHECK */ pcb->unsent = seg->next; - 803cfec: 6a7b ldr r3, [r7, #36] ; 0x24 - 803cfee: 681a ldr r2, [r3, #0] - 803cff0: 687b ldr r3, [r7, #4] - 803cff2: 66da str r2, [r3, #108] ; 0x6c + 803d070: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d072: 681a ldr r2, [r3, #0] + 803d074: 687b ldr r3, [r7, #4] + 803d076: 66da str r2, [r3, #108] ; 0x6c if (pcb->state != SYN_SENT) { - 803cff4: 687b ldr r3, [r7, #4] - 803cff6: 7d1b ldrb r3, [r3, #20] - 803cff8: 2b02 cmp r3, #2 - 803cffa: d006 beq.n 803d00a + 803d078: 687b ldr r3, [r7, #4] + 803d07a: 7d1b ldrb r3, [r3, #20] + 803d07c: 2b02 cmp r3, #2 + 803d07e: d006 beq.n 803d08e tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 803cffc: 687b ldr r3, [r7, #4] - 803cffe: 8b5b ldrh r3, [r3, #26] - 803d000: f023 0303 bic.w r3, r3, #3 - 803d004: b29a uxth r2, r3 - 803d006: 687b ldr r3, [r7, #4] - 803d008: 835a strh r2, [r3, #26] + 803d080: 687b ldr r3, [r7, #4] + 803d082: 8b5b ldrh r3, [r3, #26] + 803d084: f023 0303 bic.w r3, r3, #3 + 803d088: b29a uxth r2, r3 + 803d08a: 687b ldr r3, [r7, #4] + 803d08c: 835a strh r2, [r3, #26] } snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg); - 803d00a: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d00c: 68db ldr r3, [r3, #12] - 803d00e: 685b ldr r3, [r3, #4] - 803d010: 4618 mov r0, r3 - 803d012: f7f8 ff76 bl 8035f02 - 803d016: 4604 mov r4, r0 - 803d018: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d01a: 891b ldrh r3, [r3, #8] - 803d01c: 461d mov r5, r3 - 803d01e: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d020: 68db ldr r3, [r3, #12] - 803d022: 899b ldrh r3, [r3, #12] - 803d024: b29b uxth r3, r3 - 803d026: 4618 mov r0, r3 - 803d028: f7f8 ff56 bl 8035ed8 - 803d02c: 4603 mov r3, r0 - 803d02e: b2db uxtb r3, r3 - 803d030: f003 0303 and.w r3, r3, #3 - 803d034: 2b00 cmp r3, #0 - 803d036: d001 beq.n 803d03c - 803d038: 2301 movs r3, #1 - 803d03a: e000 b.n 803d03e - 803d03c: 2300 movs r3, #0 - 803d03e: 442b add r3, r5 - 803d040: 4423 add r3, r4 - 803d042: 60bb str r3, [r7, #8] + 803d08e: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d090: 68db ldr r3, [r3, #12] + 803d092: 685b ldr r3, [r3, #4] + 803d094: 4618 mov r0, r3 + 803d096: f7f8 ff76 bl 8035f86 + 803d09a: 4604 mov r4, r0 + 803d09c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d09e: 891b ldrh r3, [r3, #8] + 803d0a0: 461d mov r5, r3 + 803d0a2: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d0a4: 68db ldr r3, [r3, #12] + 803d0a6: 899b ldrh r3, [r3, #12] + 803d0a8: b29b uxth r3, r3 + 803d0aa: 4618 mov r0, r3 + 803d0ac: f7f8 ff56 bl 8035f5c + 803d0b0: 4603 mov r3, r0 + 803d0b2: b2db uxtb r3, r3 + 803d0b4: f003 0303 and.w r3, r3, #3 + 803d0b8: 2b00 cmp r3, #0 + 803d0ba: d001 beq.n 803d0c0 + 803d0bc: 2301 movs r3, #1 + 803d0be: e000 b.n 803d0c2 + 803d0c0: 2300 movs r3, #0 + 803d0c2: 442b add r3, r5 + 803d0c4: 4423 add r3, r4 + 803d0c6: 60bb str r3, [r7, #8] if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) { - 803d044: 687b ldr r3, [r7, #4] - 803d046: 6d1a ldr r2, [r3, #80] ; 0x50 - 803d048: 68bb ldr r3, [r7, #8] - 803d04a: 1ad3 subs r3, r2, r3 - 803d04c: 2b00 cmp r3, #0 - 803d04e: da02 bge.n 803d056 + 803d0c8: 687b ldr r3, [r7, #4] + 803d0ca: 6d1a ldr r2, [r3, #80] ; 0x50 + 803d0cc: 68bb ldr r3, [r7, #8] + 803d0ce: 1ad3 subs r3, r2, r3 + 803d0d0: 2b00 cmp r3, #0 + 803d0d2: da02 bge.n 803d0da pcb->snd_nxt = snd_nxt; - 803d050: 687b ldr r3, [r7, #4] - 803d052: 68ba ldr r2, [r7, #8] - 803d054: 651a str r2, [r3, #80] ; 0x50 + 803d0d4: 687b ldr r3, [r7, #4] + 803d0d6: 68ba ldr r2, [r7, #8] + 803d0d8: 651a str r2, [r3, #80] ; 0x50 } /* put segment on unacknowledged list if length > 0 */ if (TCP_TCPLEN(seg) > 0) { - 803d056: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d058: 891b ldrh r3, [r3, #8] - 803d05a: 461c mov r4, r3 - 803d05c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d05e: 68db ldr r3, [r3, #12] - 803d060: 899b ldrh r3, [r3, #12] - 803d062: b29b uxth r3, r3 - 803d064: 4618 mov r0, r3 - 803d066: f7f8 ff37 bl 8035ed8 - 803d06a: 4603 mov r3, r0 - 803d06c: b2db uxtb r3, r3 - 803d06e: f003 0303 and.w r3, r3, #3 - 803d072: 2b00 cmp r3, #0 - 803d074: d001 beq.n 803d07a - 803d076: 2301 movs r3, #1 - 803d078: e000 b.n 803d07c - 803d07a: 2300 movs r3, #0 - 803d07c: 4423 add r3, r4 - 803d07e: 2b00 cmp r3, #0 - 803d080: d049 beq.n 803d116 + 803d0da: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d0dc: 891b ldrh r3, [r3, #8] + 803d0de: 461c mov r4, r3 + 803d0e0: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d0e2: 68db ldr r3, [r3, #12] + 803d0e4: 899b ldrh r3, [r3, #12] + 803d0e6: b29b uxth r3, r3 + 803d0e8: 4618 mov r0, r3 + 803d0ea: f7f8 ff37 bl 8035f5c + 803d0ee: 4603 mov r3, r0 + 803d0f0: b2db uxtb r3, r3 + 803d0f2: f003 0303 and.w r3, r3, #3 + 803d0f6: 2b00 cmp r3, #0 + 803d0f8: d001 beq.n 803d0fe + 803d0fa: 2301 movs r3, #1 + 803d0fc: e000 b.n 803d100 + 803d0fe: 2300 movs r3, #0 + 803d100: 4423 add r3, r4 + 803d102: 2b00 cmp r3, #0 + 803d104: d049 beq.n 803d19a seg->next = NULL; - 803d082: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d084: 2200 movs r2, #0 - 803d086: 601a str r2, [r3, #0] + 803d106: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d108: 2200 movs r2, #0 + 803d10a: 601a str r2, [r3, #0] /* unacked list is empty? */ if (pcb->unacked == NULL) { - 803d088: 687b ldr r3, [r7, #4] - 803d08a: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d08c: 2b00 cmp r3, #0 - 803d08e: d105 bne.n 803d09c + 803d10c: 687b ldr r3, [r7, #4] + 803d10e: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d110: 2b00 cmp r3, #0 + 803d112: d105 bne.n 803d120 pcb->unacked = seg; - 803d090: 687b ldr r3, [r7, #4] - 803d092: 6a7a ldr r2, [r7, #36] ; 0x24 - 803d094: 671a str r2, [r3, #112] ; 0x70 + 803d114: 687b ldr r3, [r7, #4] + 803d116: 6a7a ldr r2, [r7, #36] ; 0x24 + 803d118: 671a str r2, [r3, #112] ; 0x70 useg = seg; - 803d096: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d098: 623b str r3, [r7, #32] - 803d09a: e03f b.n 803d11c + 803d11a: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d11c: 623b str r3, [r7, #32] + 803d11e: e03f b.n 803d1a0 /* unacked list is not empty? */ } else { /* In the case of fast retransmit, the packet should not go to the tail * of the unacked queue, but rather somewhere before it. We need to check for * this case. -STJ Jul 27, 2004 */ if (TCP_SEQ_LT(lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(useg->tcphdr->seqno))) { - 803d09c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d09e: 68db ldr r3, [r3, #12] - 803d0a0: 685b ldr r3, [r3, #4] - 803d0a2: 4618 mov r0, r3 - 803d0a4: f7f8 ff2d bl 8035f02 - 803d0a8: 4604 mov r4, r0 - 803d0aa: 6a3b ldr r3, [r7, #32] - 803d0ac: 68db ldr r3, [r3, #12] - 803d0ae: 685b ldr r3, [r3, #4] - 803d0b0: 4618 mov r0, r3 - 803d0b2: f7f8 ff26 bl 8035f02 - 803d0b6: 4603 mov r3, r0 - 803d0b8: 1ae3 subs r3, r4, r3 - 803d0ba: 2b00 cmp r3, #0 - 803d0bc: da24 bge.n 803d108 + 803d120: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d122: 68db ldr r3, [r3, #12] + 803d124: 685b ldr r3, [r3, #4] + 803d126: 4618 mov r0, r3 + 803d128: f7f8 ff2d bl 8035f86 + 803d12c: 4604 mov r4, r0 + 803d12e: 6a3b ldr r3, [r7, #32] + 803d130: 68db ldr r3, [r3, #12] + 803d132: 685b ldr r3, [r3, #4] + 803d134: 4618 mov r0, r3 + 803d136: f7f8 ff26 bl 8035f86 + 803d13a: 4603 mov r3, r0 + 803d13c: 1ae3 subs r3, r4, r3 + 803d13e: 2b00 cmp r3, #0 + 803d140: da24 bge.n 803d18c /* add segment to before tail of unacked list, keeping the list sorted */ struct tcp_seg **cur_seg = &(pcb->unacked); - 803d0be: 687b ldr r3, [r7, #4] - 803d0c0: 3370 adds r3, #112 ; 0x70 - 803d0c2: 61fb str r3, [r7, #28] + 803d142: 687b ldr r3, [r7, #4] + 803d144: 3370 adds r3, #112 ; 0x70 + 803d146: 61fb str r3, [r7, #28] while (*cur_seg && - 803d0c4: e002 b.n 803d0cc + 803d148: e002 b.n 803d150 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) { cur_seg = &((*cur_seg)->next ); - 803d0c6: 69fb ldr r3, [r7, #28] - 803d0c8: 681b ldr r3, [r3, #0] - 803d0ca: 61fb str r3, [r7, #28] + 803d14a: 69fb ldr r3, [r7, #28] + 803d14c: 681b ldr r3, [r3, #0] + 803d14e: 61fb str r3, [r7, #28] while (*cur_seg && - 803d0cc: 69fb ldr r3, [r7, #28] - 803d0ce: 681b ldr r3, [r3, #0] - 803d0d0: 2b00 cmp r3, #0 - 803d0d2: d011 beq.n 803d0f8 + 803d150: 69fb ldr r3, [r7, #28] + 803d152: 681b ldr r3, [r3, #0] + 803d154: 2b00 cmp r3, #0 + 803d156: d011 beq.n 803d17c TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) { - 803d0d4: 69fb ldr r3, [r7, #28] - 803d0d6: 681b ldr r3, [r3, #0] - 803d0d8: 68db ldr r3, [r3, #12] - 803d0da: 685b ldr r3, [r3, #4] - 803d0dc: 4618 mov r0, r3 - 803d0de: f7f8 ff10 bl 8035f02 - 803d0e2: 4604 mov r4, r0 - 803d0e4: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d0e6: 68db ldr r3, [r3, #12] - 803d0e8: 685b ldr r3, [r3, #4] - 803d0ea: 4618 mov r0, r3 - 803d0ec: f7f8 ff09 bl 8035f02 - 803d0f0: 4603 mov r3, r0 - 803d0f2: 1ae3 subs r3, r4, r3 + 803d158: 69fb ldr r3, [r7, #28] + 803d15a: 681b ldr r3, [r3, #0] + 803d15c: 68db ldr r3, [r3, #12] + 803d15e: 685b ldr r3, [r3, #4] + 803d160: 4618 mov r0, r3 + 803d162: f7f8 ff10 bl 8035f86 + 803d166: 4604 mov r4, r0 + 803d168: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d16a: 68db ldr r3, [r3, #12] + 803d16c: 685b ldr r3, [r3, #4] + 803d16e: 4618 mov r0, r3 + 803d170: f7f8 ff09 bl 8035f86 + 803d174: 4603 mov r3, r0 + 803d176: 1ae3 subs r3, r4, r3 while (*cur_seg && - 803d0f4: 2b00 cmp r3, #0 - 803d0f6: dbe6 blt.n 803d0c6 + 803d178: 2b00 cmp r3, #0 + 803d17a: dbe6 blt.n 803d14a } seg->next = (*cur_seg); - 803d0f8: 69fb ldr r3, [r7, #28] - 803d0fa: 681a ldr r2, [r3, #0] - 803d0fc: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d0fe: 601a str r2, [r3, #0] + 803d17c: 69fb ldr r3, [r7, #28] + 803d17e: 681a ldr r2, [r3, #0] + 803d180: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d182: 601a str r2, [r3, #0] (*cur_seg) = seg; - 803d100: 69fb ldr r3, [r7, #28] - 803d102: 6a7a ldr r2, [r7, #36] ; 0x24 - 803d104: 601a str r2, [r3, #0] - 803d106: e009 b.n 803d11c + 803d184: 69fb ldr r3, [r7, #28] + 803d186: 6a7a ldr r2, [r7, #36] ; 0x24 + 803d188: 601a str r2, [r3, #0] + 803d18a: e009 b.n 803d1a0 } else { /* add segment to tail of unacked list */ useg->next = seg; - 803d108: 6a3b ldr r3, [r7, #32] - 803d10a: 6a7a ldr r2, [r7, #36] ; 0x24 - 803d10c: 601a str r2, [r3, #0] + 803d18c: 6a3b ldr r3, [r7, #32] + 803d18e: 6a7a ldr r2, [r7, #36] ; 0x24 + 803d190: 601a str r2, [r3, #0] useg = useg->next; - 803d10e: 6a3b ldr r3, [r7, #32] - 803d110: 681b ldr r3, [r3, #0] - 803d112: 623b str r3, [r7, #32] - 803d114: e002 b.n 803d11c + 803d192: 6a3b ldr r3, [r7, #32] + 803d194: 681b ldr r3, [r3, #0] + 803d196: 623b str r3, [r7, #32] + 803d198: e002 b.n 803d1a0 } } /* do not queue empty segments on the unacked list */ } else { tcp_seg_free(seg); - 803d116: 6a78 ldr r0, [r7, #36] ; 0x24 - 803d118: f7fb ff3d bl 8038f96 + 803d19a: 6a78 ldr r0, [r7, #36] ; 0x24 + 803d19c: f7fb ff3d bl 803901a } seg = pcb->unsent; - 803d11c: 687b ldr r3, [r7, #4] - 803d11e: 6edb ldr r3, [r3, #108] ; 0x6c - 803d120: 627b str r3, [r7, #36] ; 0x24 + 803d1a0: 687b ldr r3, [r7, #4] + 803d1a2: 6edb ldr r3, [r3, #108] ; 0x6c + 803d1a4: 627b str r3, [r7, #36] ; 0x24 while (seg != NULL && - 803d122: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d124: 2b00 cmp r3, #0 - 803d126: d012 beq.n 803d14e + 803d1a6: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d1a8: 2b00 cmp r3, #0 + 803d1aa: d012 beq.n 803d1d2 lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) { - 803d128: 6a7b ldr r3, [r7, #36] ; 0x24 - 803d12a: 68db ldr r3, [r3, #12] - 803d12c: 685b ldr r3, [r3, #4] - 803d12e: 4618 mov r0, r3 - 803d130: f7f8 fee7 bl 8035f02 - 803d134: 4602 mov r2, r0 - 803d136: 687b ldr r3, [r7, #4] - 803d138: 6c5b ldr r3, [r3, #68] ; 0x44 - 803d13a: 1ad3 subs r3, r2, r3 - 803d13c: 6a7a ldr r2, [r7, #36] ; 0x24 - 803d13e: 8912 ldrh r2, [r2, #8] - 803d140: 4413 add r3, r2 + 803d1ac: 6a7b ldr r3, [r7, #36] ; 0x24 + 803d1ae: 68db ldr r3, [r3, #12] + 803d1b0: 685b ldr r3, [r3, #4] + 803d1b2: 4618 mov r0, r3 + 803d1b4: f7f8 fee7 bl 8035f86 + 803d1b8: 4602 mov r2, r0 + 803d1ba: 687b ldr r3, [r7, #4] + 803d1bc: 6c5b ldr r3, [r3, #68] ; 0x44 + 803d1be: 1ad3 subs r3, r2, r3 + 803d1c0: 6a7a ldr r2, [r7, #36] ; 0x24 + 803d1c2: 8912 ldrh r2, [r2, #8] + 803d1c4: 4413 add r3, r2 while (seg != NULL && - 803d142: 69ba ldr r2, [r7, #24] - 803d144: 429a cmp r2, r3 - 803d146: f4bf aed9 bcs.w 803cefc - 803d14a: e000 b.n 803d14e + 803d1c6: 69ba ldr r2, [r7, #24] + 803d1c8: 429a cmp r2, r3 + 803d1ca: f4bf aed9 bcs.w 803cf80 + 803d1ce: e000 b.n 803d1d2 break; - 803d14c: bf00 nop + 803d1d0: bf00 nop } #if TCP_OVERSIZE if (pcb->unsent == NULL) { - 803d14e: 687b ldr r3, [r7, #4] - 803d150: 6edb ldr r3, [r3, #108] ; 0x6c - 803d152: 2b00 cmp r3, #0 - 803d154: d108 bne.n 803d168 + 803d1d2: 687b ldr r3, [r7, #4] + 803d1d4: 6edb ldr r3, [r3, #108] ; 0x6c + 803d1d6: 2b00 cmp r3, #0 + 803d1d8: d108 bne.n 803d1ec /* last unsent has been removed, reset unsent_oversize */ pcb->unsent_oversize = 0; - 803d156: 687b ldr r3, [r7, #4] - 803d158: 2200 movs r2, #0 - 803d15a: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 - 803d15e: e004 b.n 803d16a + 803d1da: 687b ldr r3, [r7, #4] + 803d1dc: 2200 movs r2, #0 + 803d1de: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803d1e2: e004 b.n 803d1ee goto output_done; - 803d160: bf00 nop - 803d162: e002 b.n 803d16a + 803d1e4: bf00 nop + 803d1e6: e002 b.n 803d1ee goto output_done; - 803d164: bf00 nop - 803d166: e000 b.n 803d16a + 803d1e8: bf00 nop + 803d1ea: e000 b.n 803d1ee } #endif /* TCP_OVERSIZE */ output_done: - 803d168: bf00 nop + 803d1ec: bf00 nop tcp_clear_flags(pcb, TF_NAGLEMEMERR); - 803d16a: 687b ldr r3, [r7, #4] - 803d16c: 8b5b ldrh r3, [r3, #26] - 803d16e: f023 0380 bic.w r3, r3, #128 ; 0x80 - 803d172: b29a uxth r2, r3 - 803d174: 687b ldr r3, [r7, #4] - 803d176: 835a strh r2, [r3, #26] + 803d1ee: 687b ldr r3, [r7, #4] + 803d1f0: 8b5b ldrh r3, [r3, #26] + 803d1f2: f023 0380 bic.w r3, r3, #128 ; 0x80 + 803d1f6: b29a uxth r2, r3 + 803d1f8: 687b ldr r3, [r7, #4] + 803d1fa: 835a strh r2, [r3, #26] return ERR_OK; - 803d178: 2300 movs r3, #0 + 803d1fc: 2300 movs r3, #0 } - 803d17a: 4618 mov r0, r3 - 803d17c: 3728 adds r7, #40 ; 0x28 - 803d17e: 46bd mov sp, r7 - 803d180: bdb0 pop {r4, r5, r7, pc} - 803d182: bf00 nop + 803d1fe: 4618 mov r0, r3 + 803d200: 3728 adds r7, #40 ; 0x28 + 803d202: 46bd mov sp, r7 + 803d204: bdb0 pop {r4, r5, r7, pc} + 803d206: bf00 nop -0803d184 : +0803d208 : * @arg seg the tcp segment to check * @return 1 if ref != 1, 0 if ref == 1 */ static int tcp_output_segment_busy(const struct tcp_seg *seg) { - 803d184: b580 push {r7, lr} - 803d186: b082 sub sp, #8 - 803d188: af00 add r7, sp, #0 - 803d18a: 6078 str r0, [r7, #4] + 803d208: b580 push {r7, lr} + 803d20a: b082 sub sp, #8 + 803d20c: af00 add r7, sp, #0 + 803d20e: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_output_segment_busy: invalid seg", seg != NULL); - 803d18c: 687b ldr r3, [r7, #4] - 803d18e: 2b00 cmp r3, #0 - 803d190: d106 bne.n 803d1a0 - 803d192: 4b09 ldr r3, [pc, #36] ; (803d1b8 ) - 803d194: f240 529a movw r2, #1434 ; 0x59a - 803d198: 4908 ldr r1, [pc, #32] ; (803d1bc ) - 803d19a: 4809 ldr r0, [pc, #36] ; (803d1c0 ) - 803d19c: f003 fcb8 bl 8040b10 + 803d210: 687b ldr r3, [r7, #4] + 803d212: 2b00 cmp r3, #0 + 803d214: d106 bne.n 803d224 + 803d216: 4b09 ldr r3, [pc, #36] ; (803d23c ) + 803d218: f240 529a movw r2, #1434 ; 0x59a + 803d21c: 4908 ldr r1, [pc, #32] ; (803d240 ) + 803d21e: 4809 ldr r0, [pc, #36] ; (803d244 ) + 803d220: f003 fcb8 bl 8040b94 /* We only need to check the first pbuf here: If a pbuf is queued for transmission, a driver calls pbuf_ref(), which only changes the ref count of the first pbuf */ if (seg->p->ref != 1) { - 803d1a0: 687b ldr r3, [r7, #4] - 803d1a2: 685b ldr r3, [r3, #4] - 803d1a4: 7b9b ldrb r3, [r3, #14] - 803d1a6: 2b01 cmp r3, #1 - 803d1a8: d001 beq.n 803d1ae + 803d224: 687b ldr r3, [r7, #4] + 803d226: 685b ldr r3, [r3, #4] + 803d228: 7b9b ldrb r3, [r3, #14] + 803d22a: 2b01 cmp r3, #1 + 803d22c: d001 beq.n 803d232 /* other reference found */ return 1; - 803d1aa: 2301 movs r3, #1 - 803d1ac: e000 b.n 803d1b0 + 803d22e: 2301 movs r3, #1 + 803d230: e000 b.n 803d234 } /* no other references found */ return 0; - 803d1ae: 2300 movs r3, #0 + 803d232: 2300 movs r3, #0 } - 803d1b0: 4618 mov r0, r3 - 803d1b2: 3708 adds r7, #8 - 803d1b4: 46bd mov sp, r7 - 803d1b6: bd80 pop {r7, pc} - 803d1b8: 08043980 .word 0x08043980 - 803d1bc: 08043f1c .word 0x08043f1c - 803d1c0: 080439d4 .word 0x080439d4 + 803d234: 4618 mov r0, r3 + 803d236: 3708 adds r7, #8 + 803d238: 46bd mov sp, r7 + 803d23a: bd80 pop {r7, pc} + 803d23c: 08043a00 .word 0x08043a00 + 803d240: 08043f9c .word 0x08043f9c + 803d244: 08043a54 .word 0x08043a54 -0803d1c4 : +0803d248 : * @param pcb the tcp_pcb for the TCP connection used to send the segment * @param netif the netif used to send the segment */ static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif) { - 803d1c4: b5b0 push {r4, r5, r7, lr} - 803d1c6: b08c sub sp, #48 ; 0x30 - 803d1c8: af04 add r7, sp, #16 - 803d1ca: 60f8 str r0, [r7, #12] - 803d1cc: 60b9 str r1, [r7, #8] - 803d1ce: 607a str r2, [r7, #4] + 803d248: b5b0 push {r4, r5, r7, lr} + 803d24a: b08c sub sp, #48 ; 0x30 + 803d24c: af04 add r7, sp, #16 + 803d24e: 60f8 str r0, [r7, #12] + 803d250: 60b9 str r1, [r7, #8] + 803d252: 607a str r2, [r7, #4] u32_t *opts; #if TCP_CHECKSUM_ON_COPY int seg_chksum_was_swapped = 0; #endif LWIP_ASSERT("tcp_output_segment: invalid seg", seg != NULL); - 803d1d0: 68fb ldr r3, [r7, #12] - 803d1d2: 2b00 cmp r3, #0 - 803d1d4: d106 bne.n 803d1e4 - 803d1d6: 4b63 ldr r3, [pc, #396] ; (803d364 ) - 803d1d8: f44f 62b7 mov.w r2, #1464 ; 0x5b8 - 803d1dc: 4962 ldr r1, [pc, #392] ; (803d368 ) - 803d1de: 4863 ldr r0, [pc, #396] ; (803d36c ) - 803d1e0: f003 fc96 bl 8040b10 + 803d254: 68fb ldr r3, [r7, #12] + 803d256: 2b00 cmp r3, #0 + 803d258: d106 bne.n 803d268 + 803d25a: 4b63 ldr r3, [pc, #396] ; (803d3e8 ) + 803d25c: f44f 62b7 mov.w r2, #1464 ; 0x5b8 + 803d260: 4962 ldr r1, [pc, #392] ; (803d3ec ) + 803d262: 4863 ldr r0, [pc, #396] ; (803d3f0 ) + 803d264: f003 fc96 bl 8040b94 LWIP_ASSERT("tcp_output_segment: invalid pcb", pcb != NULL); - 803d1e4: 68bb ldr r3, [r7, #8] - 803d1e6: 2b00 cmp r3, #0 - 803d1e8: d106 bne.n 803d1f8 - 803d1ea: 4b5e ldr r3, [pc, #376] ; (803d364 ) - 803d1ec: f240 52b9 movw r2, #1465 ; 0x5b9 - 803d1f0: 495f ldr r1, [pc, #380] ; (803d370 ) - 803d1f2: 485e ldr r0, [pc, #376] ; (803d36c ) - 803d1f4: f003 fc8c bl 8040b10 + 803d268: 68bb ldr r3, [r7, #8] + 803d26a: 2b00 cmp r3, #0 + 803d26c: d106 bne.n 803d27c + 803d26e: 4b5e ldr r3, [pc, #376] ; (803d3e8 ) + 803d270: f240 52b9 movw r2, #1465 ; 0x5b9 + 803d274: 495f ldr r1, [pc, #380] ; (803d3f4 ) + 803d276: 485e ldr r0, [pc, #376] ; (803d3f0 ) + 803d278: f003 fc8c bl 8040b94 LWIP_ASSERT("tcp_output_segment: invalid netif", netif != NULL); - 803d1f8: 687b ldr r3, [r7, #4] - 803d1fa: 2b00 cmp r3, #0 - 803d1fc: d106 bne.n 803d20c - 803d1fe: 4b59 ldr r3, [pc, #356] ; (803d364 ) - 803d200: f240 52ba movw r2, #1466 ; 0x5ba - 803d204: 495b ldr r1, [pc, #364] ; (803d374 ) - 803d206: 4859 ldr r0, [pc, #356] ; (803d36c ) - 803d208: f003 fc82 bl 8040b10 + 803d27c: 687b ldr r3, [r7, #4] + 803d27e: 2b00 cmp r3, #0 + 803d280: d106 bne.n 803d290 + 803d282: 4b59 ldr r3, [pc, #356] ; (803d3e8 ) + 803d284: f240 52ba movw r2, #1466 ; 0x5ba + 803d288: 495b ldr r1, [pc, #364] ; (803d3f8 ) + 803d28a: 4859 ldr r0, [pc, #356] ; (803d3f0 ) + 803d28c: f003 fc82 bl 8040b94 if (tcp_output_segment_busy(seg)) { - 803d20c: 68f8 ldr r0, [r7, #12] - 803d20e: f7ff ffb9 bl 803d184 - 803d212: 4603 mov r3, r0 - 803d214: 2b00 cmp r3, #0 - 803d216: d001 beq.n 803d21c + 803d290: 68f8 ldr r0, [r7, #12] + 803d292: f7ff ffb9 bl 803d208 + 803d296: 4603 mov r3, r0 + 803d298: 2b00 cmp r3, #0 + 803d29a: d001 beq.n 803d2a0 /* This should not happen: rexmit functions should have checked this. However, since this function modifies p->len, we must not continue in this case. */ LWIP_DEBUGF(TCP_RTO_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_output_segment: segment busy\n")); return ERR_OK; - 803d218: 2300 movs r3, #0 - 803d21a: e09f b.n 803d35c + 803d29c: 2300 movs r3, #0 + 803d29e: e09f b.n 803d3e0 } /* The TCP header has already been constructed, but the ackno and wnd fields remain. */ seg->tcphdr->ackno = lwip_htonl(pcb->rcv_nxt); - 803d21c: 68bb ldr r3, [r7, #8] - 803d21e: 6a5a ldr r2, [r3, #36] ; 0x24 - 803d220: 68fb ldr r3, [r7, #12] - 803d222: 68dc ldr r4, [r3, #12] - 803d224: 4610 mov r0, r2 - 803d226: f7f8 fe6c bl 8035f02 - 803d22a: 4603 mov r3, r0 - 803d22c: 60a3 str r3, [r4, #8] + 803d2a0: 68bb ldr r3, [r7, #8] + 803d2a2: 6a5a ldr r2, [r3, #36] ; 0x24 + 803d2a4: 68fb ldr r3, [r7, #12] + 803d2a6: 68dc ldr r4, [r3, #12] + 803d2a8: 4610 mov r0, r2 + 803d2aa: f7f8 fe6c bl 8035f86 + 803d2ae: 4603 mov r3, r0 + 803d2b0: 60a3 str r3, [r4, #8] the window scale option) is never scaled. */ seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(pcb->rcv_ann_wnd)); } else #endif /* LWIP_WND_SCALE */ { seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd))); - 803d22e: 68bb ldr r3, [r7, #8] - 803d230: 8d5a ldrh r2, [r3, #42] ; 0x2a - 803d232: 68fb ldr r3, [r7, #12] - 803d234: 68dc ldr r4, [r3, #12] - 803d236: 4610 mov r0, r2 - 803d238: f7f8 fe4e bl 8035ed8 - 803d23c: 4603 mov r3, r0 - 803d23e: 81e3 strh r3, [r4, #14] + 803d2b2: 68bb ldr r3, [r7, #8] + 803d2b4: 8d5a ldrh r2, [r3, #42] ; 0x2a + 803d2b6: 68fb ldr r3, [r7, #12] + 803d2b8: 68dc ldr r4, [r3, #12] + 803d2ba: 4610 mov r0, r2 + 803d2bc: f7f8 fe4e bl 8035f5c + 803d2c0: 4603 mov r3, r0 + 803d2c2: 81e3 strh r3, [r4, #14] } pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; - 803d240: 68bb ldr r3, [r7, #8] - 803d242: 6a5b ldr r3, [r3, #36] ; 0x24 - 803d244: 68ba ldr r2, [r7, #8] - 803d246: 8d52 ldrh r2, [r2, #42] ; 0x2a - 803d248: 441a add r2, r3 - 803d24a: 68bb ldr r3, [r7, #8] - 803d24c: 62da str r2, [r3, #44] ; 0x2c + 803d2c4: 68bb ldr r3, [r7, #8] + 803d2c6: 6a5b ldr r3, [r3, #36] ; 0x24 + 803d2c8: 68ba ldr r2, [r7, #8] + 803d2ca: 8d52 ldrh r2, [r2, #42] ; 0x2a + 803d2cc: 441a add r2, r3 + 803d2ce: 68bb ldr r3, [r7, #8] + 803d2d0: 62da str r2, [r3, #44] ; 0x2c /* Add any requested options. NB MSS option is only set on SYN packets, so ignore it here */ /* cast through void* to get rid of alignment warnings */ opts = (u32_t *)(void *)(seg->tcphdr + 1); - 803d24e: 68fb ldr r3, [r7, #12] - 803d250: 68db ldr r3, [r3, #12] - 803d252: 3314 adds r3, #20 - 803d254: 61fb str r3, [r7, #28] + 803d2d2: 68fb ldr r3, [r7, #12] + 803d2d4: 68db ldr r3, [r3, #12] + 803d2d6: 3314 adds r3, #20 + 803d2d8: 61fb str r3, [r7, #28] if (seg->flags & TF_SEG_OPTS_MSS) { - 803d256: 68fb ldr r3, [r7, #12] - 803d258: 7a9b ldrb r3, [r3, #10] - 803d25a: f003 0301 and.w r3, r3, #1 - 803d25e: 2b00 cmp r3, #0 - 803d260: d015 beq.n 803d28e + 803d2da: 68fb ldr r3, [r7, #12] + 803d2dc: 7a9b ldrb r3, [r3, #10] + 803d2de: f003 0301 and.w r3, r3, #1 + 803d2e2: 2b00 cmp r3, #0 + 803d2e4: d015 beq.n 803d312 u16_t mss; #if TCP_CALCULATE_EFF_SEND_MSS mss = tcp_eff_send_mss_netif(TCP_MSS, netif, &pcb->remote_ip); - 803d262: 68bb ldr r3, [r7, #8] - 803d264: 3304 adds r3, #4 - 803d266: 461a mov r2, r3 - 803d268: 6879 ldr r1, [r7, #4] - 803d26a: f44f 7006 mov.w r0, #536 ; 0x218 - 803d26e: f7fc fa33 bl 80396d8 - 803d272: 4603 mov r3, r0 - 803d274: 837b strh r3, [r7, #26] + 803d2e6: 68bb ldr r3, [r7, #8] + 803d2e8: 3304 adds r3, #4 + 803d2ea: 461a mov r2, r3 + 803d2ec: 6879 ldr r1, [r7, #4] + 803d2ee: f44f 7006 mov.w r0, #536 ; 0x218 + 803d2f2: f7fc fa33 bl 803975c + 803d2f6: 4603 mov r3, r0 + 803d2f8: 837b strh r3, [r7, #26] #else /* TCP_CALCULATE_EFF_SEND_MSS */ mss = TCP_MSS; #endif /* TCP_CALCULATE_EFF_SEND_MSS */ *opts = TCP_BUILD_MSS_OPTION(mss); - 803d276: 8b7b ldrh r3, [r7, #26] - 803d278: f043 7301 orr.w r3, r3, #33816576 ; 0x2040000 - 803d27c: 4618 mov r0, r3 - 803d27e: f7f8 fe40 bl 8035f02 - 803d282: 4602 mov r2, r0 - 803d284: 69fb ldr r3, [r7, #28] - 803d286: 601a str r2, [r3, #0] + 803d2fa: 8b7b ldrh r3, [r7, #26] + 803d2fc: f043 7301 orr.w r3, r3, #33816576 ; 0x2040000 + 803d300: 4618 mov r0, r3 + 803d302: f7f8 fe40 bl 8035f86 + 803d306: 4602 mov r2, r0 + 803d308: 69fb ldr r3, [r7, #28] + 803d30a: 601a str r2, [r3, #0] opts += 1; - 803d288: 69fb ldr r3, [r7, #28] - 803d28a: 3304 adds r3, #4 - 803d28c: 61fb str r3, [r7, #28] + 803d30c: 69fb ldr r3, [r7, #28] + 803d30e: 3304 adds r3, #4 + 803d310: 61fb str r3, [r7, #28] } #endif /* Set retransmission timer running if it is not currently enabled This must be set before checking the route. */ if (pcb->rtime < 0) { - 803d28e: 68bb ldr r3, [r7, #8] - 803d290: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 - 803d294: 2b00 cmp r3, #0 - 803d296: da02 bge.n 803d29e + 803d312: 68bb ldr r3, [r7, #8] + 803d314: f9b3 3030 ldrsh.w r3, [r3, #48] ; 0x30 + 803d318: 2b00 cmp r3, #0 + 803d31a: da02 bge.n 803d322 pcb->rtime = 0; - 803d298: 68bb ldr r3, [r7, #8] - 803d29a: 2200 movs r2, #0 - 803d29c: 861a strh r2, [r3, #48] ; 0x30 + 803d31c: 68bb ldr r3, [r7, #8] + 803d31e: 2200 movs r2, #0 + 803d320: 861a strh r2, [r3, #48] ; 0x30 } if (pcb->rttest == 0) { - 803d29e: 68bb ldr r3, [r7, #8] - 803d2a0: 6b5b ldr r3, [r3, #52] ; 0x34 - 803d2a2: 2b00 cmp r3, #0 - 803d2a4: d10c bne.n 803d2c0 + 803d322: 68bb ldr r3, [r7, #8] + 803d324: 6b5b ldr r3, [r3, #52] ; 0x34 + 803d326: 2b00 cmp r3, #0 + 803d328: d10c bne.n 803d344 pcb->rttest = tcp_ticks; - 803d2a6: 4b34 ldr r3, [pc, #208] ; (803d378 ) - 803d2a8: 681a ldr r2, [r3, #0] - 803d2aa: 68bb ldr r3, [r7, #8] - 803d2ac: 635a str r2, [r3, #52] ; 0x34 + 803d32a: 4b34 ldr r3, [pc, #208] ; (803d3fc ) + 803d32c: 681a ldr r2, [r3, #0] + 803d32e: 68bb ldr r3, [r7, #8] + 803d330: 635a str r2, [r3, #52] ; 0x34 pcb->rtseq = lwip_ntohl(seg->tcphdr->seqno); - 803d2ae: 68fb ldr r3, [r7, #12] - 803d2b0: 68db ldr r3, [r3, #12] - 803d2b2: 685b ldr r3, [r3, #4] - 803d2b4: 4618 mov r0, r3 - 803d2b6: f7f8 fe24 bl 8035f02 - 803d2ba: 4602 mov r2, r0 - 803d2bc: 68bb ldr r3, [r7, #8] - 803d2be: 639a str r2, [r3, #56] ; 0x38 + 803d332: 68fb ldr r3, [r7, #12] + 803d334: 68db ldr r3, [r3, #12] + 803d336: 685b ldr r3, [r3, #4] + 803d338: 4618 mov r0, r3 + 803d33a: f7f8 fe24 bl 8035f86 + 803d33e: 4602 mov r2, r0 + 803d340: 68bb ldr r3, [r7, #8] + 803d342: 639a str r2, [r3, #56] ; 0x38 } LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n", lwip_htonl(seg->tcphdr->seqno), lwip_htonl(seg->tcphdr->seqno) + seg->len)); len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload); - 803d2c0: 68fb ldr r3, [r7, #12] - 803d2c2: 68da ldr r2, [r3, #12] - 803d2c4: 68fb ldr r3, [r7, #12] - 803d2c6: 685b ldr r3, [r3, #4] - 803d2c8: 685b ldr r3, [r3, #4] - 803d2ca: 1ad3 subs r3, r2, r3 - 803d2cc: 833b strh r3, [r7, #24] + 803d344: 68fb ldr r3, [r7, #12] + 803d346: 68da ldr r2, [r3, #12] + 803d348: 68fb ldr r3, [r7, #12] + 803d34a: 685b ldr r3, [r3, #4] + 803d34c: 685b ldr r3, [r3, #4] + 803d34e: 1ad3 subs r3, r2, r3 + 803d350: 833b strh r3, [r7, #24] if (len == 0) { /** Exclude retransmitted segments from this count. */ MIB2_STATS_INC(mib2.tcpoutsegs); } seg->p->len -= len; - 803d2ce: 68fb ldr r3, [r7, #12] - 803d2d0: 685b ldr r3, [r3, #4] - 803d2d2: 8959 ldrh r1, [r3, #10] - 803d2d4: 68fb ldr r3, [r7, #12] - 803d2d6: 685b ldr r3, [r3, #4] - 803d2d8: 8b3a ldrh r2, [r7, #24] - 803d2da: 1a8a subs r2, r1, r2 - 803d2dc: b292 uxth r2, r2 - 803d2de: 815a strh r2, [r3, #10] + 803d352: 68fb ldr r3, [r7, #12] + 803d354: 685b ldr r3, [r3, #4] + 803d356: 8959 ldrh r1, [r3, #10] + 803d358: 68fb ldr r3, [r7, #12] + 803d35a: 685b ldr r3, [r3, #4] + 803d35c: 8b3a ldrh r2, [r7, #24] + 803d35e: 1a8a subs r2, r1, r2 + 803d360: b292 uxth r2, r2 + 803d362: 815a strh r2, [r3, #10] seg->p->tot_len -= len; - 803d2e0: 68fb ldr r3, [r7, #12] - 803d2e2: 685b ldr r3, [r3, #4] - 803d2e4: 8919 ldrh r1, [r3, #8] - 803d2e6: 68fb ldr r3, [r7, #12] - 803d2e8: 685b ldr r3, [r3, #4] - 803d2ea: 8b3a ldrh r2, [r7, #24] - 803d2ec: 1a8a subs r2, r1, r2 - 803d2ee: b292 uxth r2, r2 - 803d2f0: 811a strh r2, [r3, #8] + 803d364: 68fb ldr r3, [r7, #12] + 803d366: 685b ldr r3, [r3, #4] + 803d368: 8919 ldrh r1, [r3, #8] + 803d36a: 68fb ldr r3, [r7, #12] + 803d36c: 685b ldr r3, [r3, #4] + 803d36e: 8b3a ldrh r2, [r7, #24] + 803d370: 1a8a subs r2, r1, r2 + 803d372: b292 uxth r2, r2 + 803d374: 811a strh r2, [r3, #8] seg->p->payload = seg->tcphdr; - 803d2f2: 68fb ldr r3, [r7, #12] - 803d2f4: 685b ldr r3, [r3, #4] - 803d2f6: 68fa ldr r2, [r7, #12] - 803d2f8: 68d2 ldr r2, [r2, #12] - 803d2fa: 605a str r2, [r3, #4] + 803d376: 68fb ldr r3, [r7, #12] + 803d378: 685b ldr r3, [r3, #4] + 803d37a: 68fa ldr r2, [r7, #12] + 803d37c: 68d2 ldr r2, [r2, #12] + 803d37e: 605a str r2, [r3, #4] seg->tcphdr->chksum = 0; - 803d2fc: 68fb ldr r3, [r7, #12] - 803d2fe: 68db ldr r3, [r3, #12] - 803d300: 2200 movs r2, #0 - 803d302: 741a strb r2, [r3, #16] - 803d304: 2200 movs r2, #0 - 803d306: 745a strb r2, [r3, #17] + 803d380: 68fb ldr r3, [r7, #12] + 803d382: 68db ldr r3, [r3, #12] + 803d384: 2200 movs r2, #0 + 803d386: 741a strb r2, [r3, #16] + 803d388: 2200 movs r2, #0 + 803d38a: 745a strb r2, [r3, #17] #ifdef LWIP_HOOK_TCP_OUT_ADD_TCPOPTS opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(seg->p, seg->tcphdr, pcb, opts); #endif LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(seg->tcphdr + 1)) + LWIP_TCP_OPT_LENGTH_SEGMENT(seg->flags, pcb)); - 803d308: 68fb ldr r3, [r7, #12] - 803d30a: 68db ldr r3, [r3, #12] - 803d30c: f103 0214 add.w r2, r3, #20 - 803d310: 68fb ldr r3, [r7, #12] - 803d312: 7a9b ldrb r3, [r3, #10] - 803d314: 009b lsls r3, r3, #2 - 803d316: f003 0304 and.w r3, r3, #4 - 803d31a: 4413 add r3, r2 - 803d31c: 69fa ldr r2, [r7, #28] - 803d31e: 429a cmp r2, r3 - 803d320: d006 beq.n 803d330 - 803d322: 4b10 ldr r3, [pc, #64] ; (803d364 ) - 803d324: f240 621c movw r2, #1564 ; 0x61c - 803d328: 4914 ldr r1, [pc, #80] ; (803d37c ) - 803d32a: 4810 ldr r0, [pc, #64] ; (803d36c ) - 803d32c: f003 fbf0 bl 8040b10 + 803d38c: 68fb ldr r3, [r7, #12] + 803d38e: 68db ldr r3, [r3, #12] + 803d390: f103 0214 add.w r2, r3, #20 + 803d394: 68fb ldr r3, [r7, #12] + 803d396: 7a9b ldrb r3, [r3, #10] + 803d398: 009b lsls r3, r3, #2 + 803d39a: f003 0304 and.w r3, r3, #4 + 803d39e: 4413 add r3, r2 + 803d3a0: 69fa ldr r2, [r7, #28] + 803d3a2: 429a cmp r2, r3 + 803d3a4: d006 beq.n 803d3b4 + 803d3a6: 4b10 ldr r3, [pc, #64] ; (803d3e8 ) + 803d3a8: f240 621c movw r2, #1564 ; 0x61c + 803d3ac: 4914 ldr r1, [pc, #80] ; (803d400 ) + 803d3ae: 4810 ldr r0, [pc, #64] ; (803d3f0 ) + 803d3b0: f003 fbf0 bl 8040b94 } #endif /* CHECKSUM_GEN_TCP */ TCP_STATS_INC(tcp.xmit); NETIF_SET_HINTS(netif, &(pcb->netif_hints)); err = ip_output_if(seg->p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, - 803d330: 68fb ldr r3, [r7, #12] - 803d332: 6858 ldr r0, [r3, #4] - 803d334: 68b9 ldr r1, [r7, #8] - 803d336: 68bb ldr r3, [r7, #8] - 803d338: 1d1c adds r4, r3, #4 - 803d33a: 68bb ldr r3, [r7, #8] - 803d33c: 7add ldrb r5, [r3, #11] - 803d33e: 68bb ldr r3, [r7, #8] - 803d340: 7a9b ldrb r3, [r3, #10] - 803d342: 687a ldr r2, [r7, #4] - 803d344: 9202 str r2, [sp, #8] - 803d346: 2206 movs r2, #6 - 803d348: 9201 str r2, [sp, #4] - 803d34a: 9300 str r3, [sp, #0] - 803d34c: 462b mov r3, r5 - 803d34e: 4622 mov r2, r4 - 803d350: f002 fa5c bl 803f80c - 803d354: 4603 mov r3, r0 - 803d356: 75fb strb r3, [r7, #23] + 803d3b4: 68fb ldr r3, [r7, #12] + 803d3b6: 6858 ldr r0, [r3, #4] + 803d3b8: 68b9 ldr r1, [r7, #8] + 803d3ba: 68bb ldr r3, [r7, #8] + 803d3bc: 1d1c adds r4, r3, #4 + 803d3be: 68bb ldr r3, [r7, #8] + 803d3c0: 7add ldrb r5, [r3, #11] + 803d3c2: 68bb ldr r3, [r7, #8] + 803d3c4: 7a9b ldrb r3, [r3, #10] + 803d3c6: 687a ldr r2, [r7, #4] + 803d3c8: 9202 str r2, [sp, #8] + 803d3ca: 2206 movs r2, #6 + 803d3cc: 9201 str r2, [sp, #4] + 803d3ce: 9300 str r3, [sp, #0] + 803d3d0: 462b mov r3, r5 + 803d3d2: 4622 mov r2, r4 + 803d3d4: f002 fa5c bl 803f890 + 803d3d8: 4603 mov r3, r0 + 803d3da: 75fb strb r3, [r7, #23] seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum); seg->chksum_swapped = 1; } #endif return err; - 803d358: f997 3017 ldrsb.w r3, [r7, #23] -} - 803d35c: 4618 mov r0, r3 - 803d35e: 3720 adds r7, #32 - 803d360: 46bd mov sp, r7 - 803d362: bdb0 pop {r4, r5, r7, pc} - 803d364: 08043980 .word 0x08043980 - 803d368: 08043f44 .word 0x08043f44 - 803d36c: 080439d4 .word 0x080439d4 - 803d370: 08043f64 .word 0x08043f64 - 803d374: 08043f84 .word 0x08043f84 - 803d378: 2400e958 .word 0x2400e958 - 803d37c: 08043fa8 .word 0x08043fa8 - -0803d380 : + 803d3dc: f997 3017 ldrsb.w r3, [r7, #23] +} + 803d3e0: 4618 mov r0, r3 + 803d3e2: 3720 adds r7, #32 + 803d3e4: 46bd mov sp, r7 + 803d3e6: bdb0 pop {r4, r5, r7, pc} + 803d3e8: 08043a00 .word 0x08043a00 + 803d3ec: 08043fc4 .word 0x08043fc4 + 803d3f0: 08043a54 .word 0x08043a54 + 803d3f4: 08043fe4 .word 0x08043fe4 + 803d3f8: 08044004 .word 0x08044004 + 803d3fc: 2400e960 .word 0x2400e960 + 803d400: 08044028 .word 0x08044028 + +0803d404 : * * @param pcb the tcp_pcb for which to re-enqueue all unacked segments */ err_t tcp_rexmit_rto_prepare(struct tcp_pcb *pcb) { - 803d380: b5b0 push {r4, r5, r7, lr} - 803d382: b084 sub sp, #16 - 803d384: af00 add r7, sp, #0 - 803d386: 6078 str r0, [r7, #4] + 803d404: b5b0 push {r4, r5, r7, lr} + 803d406: b084 sub sp, #16 + 803d408: af00 add r7, sp, #0 + 803d40a: 6078 str r0, [r7, #4] struct tcp_seg *seg; LWIP_ASSERT("tcp_rexmit_rto_prepare: invalid pcb", pcb != NULL); - 803d388: 687b ldr r3, [r7, #4] - 803d38a: 2b00 cmp r3, #0 - 803d38c: d106 bne.n 803d39c - 803d38e: 4b31 ldr r3, [pc, #196] ; (803d454 ) - 803d390: f240 6263 movw r2, #1635 ; 0x663 - 803d394: 4930 ldr r1, [pc, #192] ; (803d458 ) - 803d396: 4831 ldr r0, [pc, #196] ; (803d45c ) - 803d398: f003 fbba bl 8040b10 + 803d40c: 687b ldr r3, [r7, #4] + 803d40e: 2b00 cmp r3, #0 + 803d410: d106 bne.n 803d420 + 803d412: 4b31 ldr r3, [pc, #196] ; (803d4d8 ) + 803d414: f240 6263 movw r2, #1635 ; 0x663 + 803d418: 4930 ldr r1, [pc, #192] ; (803d4dc ) + 803d41a: 4831 ldr r0, [pc, #196] ; (803d4e0 ) + 803d41c: f003 fbba bl 8040b94 if (pcb->unacked == NULL) { - 803d39c: 687b ldr r3, [r7, #4] - 803d39e: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d3a0: 2b00 cmp r3, #0 - 803d3a2: d102 bne.n 803d3aa + 803d420: 687b ldr r3, [r7, #4] + 803d422: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d424: 2b00 cmp r3, #0 + 803d426: d102 bne.n 803d42e return ERR_VAL; - 803d3a4: f06f 0305 mvn.w r3, #5 - 803d3a8: e050 b.n 803d44c + 803d428: f06f 0305 mvn.w r3, #5 + 803d42c: e050 b.n 803d4d0 /* Move all unacked segments to the head of the unsent queue. However, give up if any of the unsent pbufs are still referenced by the netif driver due to deferred transmission. No point loading the link further if it is struggling to flush its buffered writes. */ for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) { - 803d3aa: 687b ldr r3, [r7, #4] - 803d3ac: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d3ae: 60fb str r3, [r7, #12] - 803d3b0: e00b b.n 803d3ca + 803d42e: 687b ldr r3, [r7, #4] + 803d430: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d432: 60fb str r3, [r7, #12] + 803d434: e00b b.n 803d44e if (tcp_output_segment_busy(seg)) { - 803d3b2: 68f8 ldr r0, [r7, #12] - 803d3b4: f7ff fee6 bl 803d184 - 803d3b8: 4603 mov r3, r0 - 803d3ba: 2b00 cmp r3, #0 - 803d3bc: d002 beq.n 803d3c4 + 803d436: 68f8 ldr r0, [r7, #12] + 803d438: f7ff fee6 bl 803d208 + 803d43c: 4603 mov r3, r0 + 803d43e: 2b00 cmp r3, #0 + 803d440: d002 beq.n 803d448 LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n")); return ERR_VAL; - 803d3be: f06f 0305 mvn.w r3, #5 - 803d3c2: e043 b.n 803d44c + 803d442: f06f 0305 mvn.w r3, #5 + 803d446: e043 b.n 803d4d0 for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) { - 803d3c4: 68fb ldr r3, [r7, #12] - 803d3c6: 681b ldr r3, [r3, #0] - 803d3c8: 60fb str r3, [r7, #12] - 803d3ca: 68fb ldr r3, [r7, #12] - 803d3cc: 681b ldr r3, [r3, #0] - 803d3ce: 2b00 cmp r3, #0 - 803d3d0: d1ef bne.n 803d3b2 + 803d448: 68fb ldr r3, [r7, #12] + 803d44a: 681b ldr r3, [r3, #0] + 803d44c: 60fb str r3, [r7, #12] + 803d44e: 68fb ldr r3, [r7, #12] + 803d450: 681b ldr r3, [r3, #0] + 803d452: 2b00 cmp r3, #0 + 803d454: d1ef bne.n 803d436 } } if (tcp_output_segment_busy(seg)) { - 803d3d2: 68f8 ldr r0, [r7, #12] - 803d3d4: f7ff fed6 bl 803d184 - 803d3d8: 4603 mov r3, r0 - 803d3da: 2b00 cmp r3, #0 - 803d3dc: d002 beq.n 803d3e4 + 803d456: 68f8 ldr r0, [r7, #12] + 803d458: f7ff fed6 bl 803d208 + 803d45c: 4603 mov r3, r0 + 803d45e: 2b00 cmp r3, #0 + 803d460: d002 beq.n 803d468 LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n")); return ERR_VAL; - 803d3de: f06f 0305 mvn.w r3, #5 - 803d3e2: e033 b.n 803d44c + 803d462: f06f 0305 mvn.w r3, #5 + 803d466: e033 b.n 803d4d0 } /* concatenate unsent queue after unacked queue */ seg->next = pcb->unsent; - 803d3e4: 687b ldr r3, [r7, #4] - 803d3e6: 6eda ldr r2, [r3, #108] ; 0x6c - 803d3e8: 68fb ldr r3, [r7, #12] - 803d3ea: 601a str r2, [r3, #0] + 803d468: 687b ldr r3, [r7, #4] + 803d46a: 6eda ldr r2, [r3, #108] ; 0x6c + 803d46c: 68fb ldr r3, [r7, #12] + 803d46e: 601a str r2, [r3, #0] if (pcb->unsent == NULL) { pcb->unsent_oversize = seg->oversize_left; } #endif /* TCP_OVERSIZE_DBGCHECK */ /* unsent queue is the concatenated queue (of unacked, unsent) */ pcb->unsent = pcb->unacked; - 803d3ec: 687b ldr r3, [r7, #4] - 803d3ee: 6f1a ldr r2, [r3, #112] ; 0x70 - 803d3f0: 687b ldr r3, [r7, #4] - 803d3f2: 66da str r2, [r3, #108] ; 0x6c + 803d470: 687b ldr r3, [r7, #4] + 803d472: 6f1a ldr r2, [r3, #112] ; 0x70 + 803d474: 687b ldr r3, [r7, #4] + 803d476: 66da str r2, [r3, #108] ; 0x6c /* unacked queue is now empty */ pcb->unacked = NULL; - 803d3f4: 687b ldr r3, [r7, #4] - 803d3f6: 2200 movs r2, #0 - 803d3f8: 671a str r2, [r3, #112] ; 0x70 + 803d478: 687b ldr r3, [r7, #4] + 803d47a: 2200 movs r2, #0 + 803d47c: 671a str r2, [r3, #112] ; 0x70 /* Mark RTO in-progress */ tcp_set_flags(pcb, TF_RTO); - 803d3fa: 687b ldr r3, [r7, #4] - 803d3fc: 8b5b ldrh r3, [r3, #26] - 803d3fe: f443 6300 orr.w r3, r3, #2048 ; 0x800 - 803d402: b29a uxth r2, r3 - 803d404: 687b ldr r3, [r7, #4] - 803d406: 835a strh r2, [r3, #26] + 803d47e: 687b ldr r3, [r7, #4] + 803d480: 8b5b ldrh r3, [r3, #26] + 803d482: f443 6300 orr.w r3, r3, #2048 ; 0x800 + 803d486: b29a uxth r2, r3 + 803d488: 687b ldr r3, [r7, #4] + 803d48a: 835a strh r2, [r3, #26] /* Record the next byte following retransmit */ pcb->rto_end = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg); - 803d408: 68fb ldr r3, [r7, #12] - 803d40a: 68db ldr r3, [r3, #12] - 803d40c: 685b ldr r3, [r3, #4] - 803d40e: 4618 mov r0, r3 - 803d410: f7f8 fd77 bl 8035f02 - 803d414: 4604 mov r4, r0 - 803d416: 68fb ldr r3, [r7, #12] - 803d418: 891b ldrh r3, [r3, #8] - 803d41a: 461d mov r5, r3 - 803d41c: 68fb ldr r3, [r7, #12] - 803d41e: 68db ldr r3, [r3, #12] - 803d420: 899b ldrh r3, [r3, #12] - 803d422: b29b uxth r3, r3 - 803d424: 4618 mov r0, r3 - 803d426: f7f8 fd57 bl 8035ed8 - 803d42a: 4603 mov r3, r0 - 803d42c: b2db uxtb r3, r3 - 803d42e: f003 0303 and.w r3, r3, #3 - 803d432: 2b00 cmp r3, #0 - 803d434: d001 beq.n 803d43a - 803d436: 2301 movs r3, #1 - 803d438: e000 b.n 803d43c - 803d43a: 2300 movs r3, #0 - 803d43c: 442b add r3, r5 - 803d43e: 18e2 adds r2, r4, r3 - 803d440: 687b ldr r3, [r7, #4] - 803d442: 64da str r2, [r3, #76] ; 0x4c + 803d48c: 68fb ldr r3, [r7, #12] + 803d48e: 68db ldr r3, [r3, #12] + 803d490: 685b ldr r3, [r3, #4] + 803d492: 4618 mov r0, r3 + 803d494: f7f8 fd77 bl 8035f86 + 803d498: 4604 mov r4, r0 + 803d49a: 68fb ldr r3, [r7, #12] + 803d49c: 891b ldrh r3, [r3, #8] + 803d49e: 461d mov r5, r3 + 803d4a0: 68fb ldr r3, [r7, #12] + 803d4a2: 68db ldr r3, [r3, #12] + 803d4a4: 899b ldrh r3, [r3, #12] + 803d4a6: b29b uxth r3, r3 + 803d4a8: 4618 mov r0, r3 + 803d4aa: f7f8 fd57 bl 8035f5c + 803d4ae: 4603 mov r3, r0 + 803d4b0: b2db uxtb r3, r3 + 803d4b2: f003 0303 and.w r3, r3, #3 + 803d4b6: 2b00 cmp r3, #0 + 803d4b8: d001 beq.n 803d4be + 803d4ba: 2301 movs r3, #1 + 803d4bc: e000 b.n 803d4c0 + 803d4be: 2300 movs r3, #0 + 803d4c0: 442b add r3, r5 + 803d4c2: 18e2 adds r2, r4, r3 + 803d4c4: 687b ldr r3, [r7, #4] + 803d4c6: 64da str r2, [r3, #76] ; 0x4c /* Don't take any RTT measurements after retransmitting. */ pcb->rttest = 0; - 803d444: 687b ldr r3, [r7, #4] - 803d446: 2200 movs r2, #0 - 803d448: 635a str r2, [r3, #52] ; 0x34 + 803d4c8: 687b ldr r3, [r7, #4] + 803d4ca: 2200 movs r2, #0 + 803d4cc: 635a str r2, [r3, #52] ; 0x34 return ERR_OK; - 803d44a: 2300 movs r3, #0 + 803d4ce: 2300 movs r3, #0 } - 803d44c: 4618 mov r0, r3 - 803d44e: 3710 adds r7, #16 - 803d450: 46bd mov sp, r7 - 803d452: bdb0 pop {r4, r5, r7, pc} - 803d454: 08043980 .word 0x08043980 - 803d458: 08043fbc .word 0x08043fbc - 803d45c: 080439d4 .word 0x080439d4 + 803d4d0: 4618 mov r0, r3 + 803d4d2: 3710 adds r7, #16 + 803d4d4: 46bd mov sp, r7 + 803d4d6: bdb0 pop {r4, r5, r7, pc} + 803d4d8: 08043a00 .word 0x08043a00 + 803d4dc: 0804403c .word 0x0804403c + 803d4e0: 08043a54 .word 0x08043a54 -0803d460 : +0803d4e4 : * * @param pcb the tcp_pcb for which to re-enqueue all unacked segments */ void tcp_rexmit_rto_commit(struct tcp_pcb *pcb) { - 803d460: b580 push {r7, lr} - 803d462: b082 sub sp, #8 - 803d464: af00 add r7, sp, #0 - 803d466: 6078 str r0, [r7, #4] + 803d4e4: b580 push {r7, lr} + 803d4e6: b082 sub sp, #8 + 803d4e8: af00 add r7, sp, #0 + 803d4ea: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_rexmit_rto_commit: invalid pcb", pcb != NULL); - 803d468: 687b ldr r3, [r7, #4] - 803d46a: 2b00 cmp r3, #0 - 803d46c: d106 bne.n 803d47c - 803d46e: 4b0d ldr r3, [pc, #52] ; (803d4a4 ) - 803d470: f44f 62d3 mov.w r2, #1688 ; 0x698 - 803d474: 490c ldr r1, [pc, #48] ; (803d4a8 ) - 803d476: 480d ldr r0, [pc, #52] ; (803d4ac ) - 803d478: f003 fb4a bl 8040b10 + 803d4ec: 687b ldr r3, [r7, #4] + 803d4ee: 2b00 cmp r3, #0 + 803d4f0: d106 bne.n 803d500 + 803d4f2: 4b0d ldr r3, [pc, #52] ; (803d528 ) + 803d4f4: f44f 62d3 mov.w r2, #1688 ; 0x698 + 803d4f8: 490c ldr r1, [pc, #48] ; (803d52c ) + 803d4fa: 480d ldr r0, [pc, #52] ; (803d530 ) + 803d4fc: f003 fb4a bl 8040b94 /* increment number of retransmissions */ if (pcb->nrtx < 0xFF) { - 803d47c: 687b ldr r3, [r7, #4] - 803d47e: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803d482: 2bff cmp r3, #255 ; 0xff - 803d484: d007 beq.n 803d496 + 803d500: 687b ldr r3, [r7, #4] + 803d502: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803d506: 2bff cmp r3, #255 ; 0xff + 803d508: d007 beq.n 803d51a ++pcb->nrtx; - 803d486: 687b ldr r3, [r7, #4] - 803d488: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803d48c: 3301 adds r3, #1 - 803d48e: b2da uxtb r2, r3 - 803d490: 687b ldr r3, [r7, #4] - 803d492: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 803d50a: 687b ldr r3, [r7, #4] + 803d50c: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803d510: 3301 adds r3, #1 + 803d512: b2da uxtb r2, r3 + 803d514: 687b ldr r3, [r7, #4] + 803d516: f883 2042 strb.w r2, [r3, #66] ; 0x42 } /* Do the actual retransmission */ tcp_output(pcb); - 803d496: 6878 ldr r0, [r7, #4] - 803d498: f7ff fc80 bl 803cd9c -} - 803d49c: bf00 nop - 803d49e: 3708 adds r7, #8 - 803d4a0: 46bd mov sp, r7 - 803d4a2: bd80 pop {r7, pc} - 803d4a4: 08043980 .word 0x08043980 - 803d4a8: 08043fe0 .word 0x08043fe0 - 803d4ac: 080439d4 .word 0x080439d4 - -0803d4b0 : + 803d51a: 6878 ldr r0, [r7, #4] + 803d51c: f7ff fc80 bl 803ce20 +} + 803d520: bf00 nop + 803d522: 3708 adds r7, #8 + 803d524: 46bd mov sp, r7 + 803d526: bd80 pop {r7, pc} + 803d528: 08043a00 .word 0x08043a00 + 803d52c: 08044060 .word 0x08044060 + 803d530: 08043a54 .word 0x08043a54 + +0803d534 : * * @param pcb the tcp_pcb for which to re-enqueue all unacked segments */ void tcp_rexmit_rto(struct tcp_pcb *pcb) { - 803d4b0: b580 push {r7, lr} - 803d4b2: b082 sub sp, #8 - 803d4b4: af00 add r7, sp, #0 - 803d4b6: 6078 str r0, [r7, #4] + 803d534: b580 push {r7, lr} + 803d536: b082 sub sp, #8 + 803d538: af00 add r7, sp, #0 + 803d53a: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_rexmit_rto: invalid pcb", pcb != NULL); - 803d4b8: 687b ldr r3, [r7, #4] - 803d4ba: 2b00 cmp r3, #0 - 803d4bc: d106 bne.n 803d4cc - 803d4be: 4b0a ldr r3, [pc, #40] ; (803d4e8 ) - 803d4c0: f240 62ad movw r2, #1709 ; 0x6ad - 803d4c4: 4909 ldr r1, [pc, #36] ; (803d4ec ) - 803d4c6: 480a ldr r0, [pc, #40] ; (803d4f0 ) - 803d4c8: f003 fb22 bl 8040b10 + 803d53c: 687b ldr r3, [r7, #4] + 803d53e: 2b00 cmp r3, #0 + 803d540: d106 bne.n 803d550 + 803d542: 4b0a ldr r3, [pc, #40] ; (803d56c ) + 803d544: f240 62ad movw r2, #1709 ; 0x6ad + 803d548: 4909 ldr r1, [pc, #36] ; (803d570 ) + 803d54a: 480a ldr r0, [pc, #40] ; (803d574 ) + 803d54c: f003 fb22 bl 8040b94 if (tcp_rexmit_rto_prepare(pcb) == ERR_OK) { - 803d4cc: 6878 ldr r0, [r7, #4] - 803d4ce: f7ff ff57 bl 803d380 - 803d4d2: 4603 mov r3, r0 - 803d4d4: 2b00 cmp r3, #0 - 803d4d6: d102 bne.n 803d4de + 803d550: 6878 ldr r0, [r7, #4] + 803d552: f7ff ff57 bl 803d404 + 803d556: 4603 mov r3, r0 + 803d558: 2b00 cmp r3, #0 + 803d55a: d102 bne.n 803d562 tcp_rexmit_rto_commit(pcb); - 803d4d8: 6878 ldr r0, [r7, #4] - 803d4da: f7ff ffc1 bl 803d460 + 803d55c: 6878 ldr r0, [r7, #4] + 803d55e: f7ff ffc1 bl 803d4e4 } } - 803d4de: bf00 nop - 803d4e0: 3708 adds r7, #8 - 803d4e2: 46bd mov sp, r7 - 803d4e4: bd80 pop {r7, pc} - 803d4e6: bf00 nop - 803d4e8: 08043980 .word 0x08043980 - 803d4ec: 08044004 .word 0x08044004 - 803d4f0: 080439d4 .word 0x080439d4 + 803d562: bf00 nop + 803d564: 3708 adds r7, #8 + 803d566: 46bd mov sp, r7 + 803d568: bd80 pop {r7, pc} + 803d56a: bf00 nop + 803d56c: 08043a00 .word 0x08043a00 + 803d570: 08044084 .word 0x08044084 + 803d574: 08043a54 .word 0x08043a54 -0803d4f4 : +0803d578 : * * @param pcb the tcp_pcb for which to retransmit the first unacked segment */ err_t tcp_rexmit(struct tcp_pcb *pcb) { - 803d4f4: b590 push {r4, r7, lr} - 803d4f6: b085 sub sp, #20 - 803d4f8: af00 add r7, sp, #0 - 803d4fa: 6078 str r0, [r7, #4] + 803d578: b590 push {r4, r7, lr} + 803d57a: b085 sub sp, #20 + 803d57c: af00 add r7, sp, #0 + 803d57e: 6078 str r0, [r7, #4] struct tcp_seg *seg; struct tcp_seg **cur_seg; LWIP_ASSERT("tcp_rexmit: invalid pcb", pcb != NULL); - 803d4fc: 687b ldr r3, [r7, #4] - 803d4fe: 2b00 cmp r3, #0 - 803d500: d106 bne.n 803d510 - 803d502: 4b2f ldr r3, [pc, #188] ; (803d5c0 ) - 803d504: f240 62c1 movw r2, #1729 ; 0x6c1 - 803d508: 492e ldr r1, [pc, #184] ; (803d5c4 ) - 803d50a: 482f ldr r0, [pc, #188] ; (803d5c8 ) - 803d50c: f003 fb00 bl 8040b10 + 803d580: 687b ldr r3, [r7, #4] + 803d582: 2b00 cmp r3, #0 + 803d584: d106 bne.n 803d594 + 803d586: 4b2f ldr r3, [pc, #188] ; (803d644 ) + 803d588: f240 62c1 movw r2, #1729 ; 0x6c1 + 803d58c: 492e ldr r1, [pc, #184] ; (803d648 ) + 803d58e: 482f ldr r0, [pc, #188] ; (803d64c ) + 803d590: f003 fb00 bl 8040b94 if (pcb->unacked == NULL) { - 803d510: 687b ldr r3, [r7, #4] - 803d512: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d514: 2b00 cmp r3, #0 - 803d516: d102 bne.n 803d51e + 803d594: 687b ldr r3, [r7, #4] + 803d596: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d598: 2b00 cmp r3, #0 + 803d59a: d102 bne.n 803d5a2 return ERR_VAL; - 803d518: f06f 0305 mvn.w r3, #5 - 803d51c: e04c b.n 803d5b8 + 803d59c: f06f 0305 mvn.w r3, #5 + 803d5a0: e04c b.n 803d63c } seg = pcb->unacked; - 803d51e: 687b ldr r3, [r7, #4] - 803d520: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d522: 60bb str r3, [r7, #8] + 803d5a2: 687b ldr r3, [r7, #4] + 803d5a4: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d5a6: 60bb str r3, [r7, #8] /* Give up if the segment is still referenced by the netif driver due to deferred transmission. */ if (tcp_output_segment_busy(seg)) { - 803d524: 68b8 ldr r0, [r7, #8] - 803d526: f7ff fe2d bl 803d184 - 803d52a: 4603 mov r3, r0 - 803d52c: 2b00 cmp r3, #0 - 803d52e: d002 beq.n 803d536 + 803d5a8: 68b8 ldr r0, [r7, #8] + 803d5aa: f7ff fe2d bl 803d208 + 803d5ae: 4603 mov r3, r0 + 803d5b0: 2b00 cmp r3, #0 + 803d5b2: d002 beq.n 803d5ba LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit busy\n")); return ERR_VAL; - 803d530: f06f 0305 mvn.w r3, #5 - 803d534: e040 b.n 803d5b8 + 803d5b4: f06f 0305 mvn.w r3, #5 + 803d5b8: e040 b.n 803d63c } /* Move the first unacked segment to the unsent queue */ /* Keep the unsent queue sorted. */ pcb->unacked = seg->next; - 803d536: 68bb ldr r3, [r7, #8] - 803d538: 681a ldr r2, [r3, #0] - 803d53a: 687b ldr r3, [r7, #4] - 803d53c: 671a str r2, [r3, #112] ; 0x70 + 803d5ba: 68bb ldr r3, [r7, #8] + 803d5bc: 681a ldr r2, [r3, #0] + 803d5be: 687b ldr r3, [r7, #4] + 803d5c0: 671a str r2, [r3, #112] ; 0x70 cur_seg = &(pcb->unsent); - 803d53e: 687b ldr r3, [r7, #4] - 803d540: 336c adds r3, #108 ; 0x6c - 803d542: 60fb str r3, [r7, #12] + 803d5c2: 687b ldr r3, [r7, #4] + 803d5c4: 336c adds r3, #108 ; 0x6c + 803d5c6: 60fb str r3, [r7, #12] while (*cur_seg && - 803d544: e002 b.n 803d54c + 803d5c8: e002 b.n 803d5d0 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) { cur_seg = &((*cur_seg)->next ); - 803d546: 68fb ldr r3, [r7, #12] - 803d548: 681b ldr r3, [r3, #0] - 803d54a: 60fb str r3, [r7, #12] + 803d5ca: 68fb ldr r3, [r7, #12] + 803d5cc: 681b ldr r3, [r3, #0] + 803d5ce: 60fb str r3, [r7, #12] while (*cur_seg && - 803d54c: 68fb ldr r3, [r7, #12] - 803d54e: 681b ldr r3, [r3, #0] - 803d550: 2b00 cmp r3, #0 - 803d552: d011 beq.n 803d578 + 803d5d0: 68fb ldr r3, [r7, #12] + 803d5d2: 681b ldr r3, [r3, #0] + 803d5d4: 2b00 cmp r3, #0 + 803d5d6: d011 beq.n 803d5fc TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) { - 803d554: 68fb ldr r3, [r7, #12] - 803d556: 681b ldr r3, [r3, #0] - 803d558: 68db ldr r3, [r3, #12] - 803d55a: 685b ldr r3, [r3, #4] - 803d55c: 4618 mov r0, r3 - 803d55e: f7f8 fcd0 bl 8035f02 - 803d562: 4604 mov r4, r0 - 803d564: 68bb ldr r3, [r7, #8] - 803d566: 68db ldr r3, [r3, #12] - 803d568: 685b ldr r3, [r3, #4] - 803d56a: 4618 mov r0, r3 - 803d56c: f7f8 fcc9 bl 8035f02 - 803d570: 4603 mov r3, r0 - 803d572: 1ae3 subs r3, r4, r3 + 803d5d8: 68fb ldr r3, [r7, #12] + 803d5da: 681b ldr r3, [r3, #0] + 803d5dc: 68db ldr r3, [r3, #12] + 803d5de: 685b ldr r3, [r3, #4] + 803d5e0: 4618 mov r0, r3 + 803d5e2: f7f8 fcd0 bl 8035f86 + 803d5e6: 4604 mov r4, r0 + 803d5e8: 68bb ldr r3, [r7, #8] + 803d5ea: 68db ldr r3, [r3, #12] + 803d5ec: 685b ldr r3, [r3, #4] + 803d5ee: 4618 mov r0, r3 + 803d5f0: f7f8 fcc9 bl 8035f86 + 803d5f4: 4603 mov r3, r0 + 803d5f6: 1ae3 subs r3, r4, r3 while (*cur_seg && - 803d574: 2b00 cmp r3, #0 - 803d576: dbe6 blt.n 803d546 + 803d5f8: 2b00 cmp r3, #0 + 803d5fa: dbe6 blt.n 803d5ca } seg->next = *cur_seg; - 803d578: 68fb ldr r3, [r7, #12] - 803d57a: 681a ldr r2, [r3, #0] - 803d57c: 68bb ldr r3, [r7, #8] - 803d57e: 601a str r2, [r3, #0] + 803d5fc: 68fb ldr r3, [r7, #12] + 803d5fe: 681a ldr r2, [r3, #0] + 803d600: 68bb ldr r3, [r7, #8] + 803d602: 601a str r2, [r3, #0] *cur_seg = seg; - 803d580: 68fb ldr r3, [r7, #12] - 803d582: 68ba ldr r2, [r7, #8] - 803d584: 601a str r2, [r3, #0] + 803d604: 68fb ldr r3, [r7, #12] + 803d606: 68ba ldr r2, [r7, #8] + 803d608: 601a str r2, [r3, #0] #if TCP_OVERSIZE if (seg->next == NULL) { - 803d586: 68bb ldr r3, [r7, #8] - 803d588: 681b ldr r3, [r3, #0] - 803d58a: 2b00 cmp r3, #0 - 803d58c: d103 bne.n 803d596 + 803d60a: 68bb ldr r3, [r7, #8] + 803d60c: 681b ldr r3, [r3, #0] + 803d60e: 2b00 cmp r3, #0 + 803d610: d103 bne.n 803d61a /* the retransmitted segment is last in unsent, so reset unsent_oversize */ pcb->unsent_oversize = 0; - 803d58e: 687b ldr r3, [r7, #4] - 803d590: 2200 movs r2, #0 - 803d592: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 + 803d612: 687b ldr r3, [r7, #4] + 803d614: 2200 movs r2, #0 + 803d616: f8a3 2068 strh.w r2, [r3, #104] ; 0x68 } #endif /* TCP_OVERSIZE */ if (pcb->nrtx < 0xFF) { - 803d596: 687b ldr r3, [r7, #4] - 803d598: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803d59c: 2bff cmp r3, #255 ; 0xff - 803d59e: d007 beq.n 803d5b0 + 803d61a: 687b ldr r3, [r7, #4] + 803d61c: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803d620: 2bff cmp r3, #255 ; 0xff + 803d622: d007 beq.n 803d634 ++pcb->nrtx; - 803d5a0: 687b ldr r3, [r7, #4] - 803d5a2: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 - 803d5a6: 3301 adds r3, #1 - 803d5a8: b2da uxtb r2, r3 - 803d5aa: 687b ldr r3, [r7, #4] - 803d5ac: f883 2042 strb.w r2, [r3, #66] ; 0x42 + 803d624: 687b ldr r3, [r7, #4] + 803d626: f893 3042 ldrb.w r3, [r3, #66] ; 0x42 + 803d62a: 3301 adds r3, #1 + 803d62c: b2da uxtb r2, r3 + 803d62e: 687b ldr r3, [r7, #4] + 803d630: f883 2042 strb.w r2, [r3, #66] ; 0x42 } /* Don't take any rtt measurements after retransmitting. */ pcb->rttest = 0; - 803d5b0: 687b ldr r3, [r7, #4] - 803d5b2: 2200 movs r2, #0 - 803d5b4: 635a str r2, [r3, #52] ; 0x34 + 803d634: 687b ldr r3, [r7, #4] + 803d636: 2200 movs r2, #0 + 803d638: 635a str r2, [r3, #52] ; 0x34 /* Do the actual retransmission. */ MIB2_STATS_INC(mib2.tcpretranssegs); /* No need to call tcp_output: we are always called from tcp_input() and thus tcp_output directly returns. */ return ERR_OK; - 803d5b6: 2300 movs r3, #0 + 803d63a: 2300 movs r3, #0 } - 803d5b8: 4618 mov r0, r3 - 803d5ba: 3714 adds r7, #20 - 803d5bc: 46bd mov sp, r7 - 803d5be: bd90 pop {r4, r7, pc} - 803d5c0: 08043980 .word 0x08043980 - 803d5c4: 08044020 .word 0x08044020 - 803d5c8: 080439d4 .word 0x080439d4 + 803d63c: 4618 mov r0, r3 + 803d63e: 3714 adds r7, #20 + 803d640: 46bd mov sp, r7 + 803d642: bd90 pop {r4, r7, pc} + 803d644: 08043a00 .word 0x08043a00 + 803d648: 080440a0 .word 0x080440a0 + 803d64c: 08043a54 .word 0x08043a54 -0803d5cc : +0803d650 : * * @param pcb the tcp_pcb for which to retransmit the first unacked segment */ void tcp_rexmit_fast(struct tcp_pcb *pcb) { - 803d5cc: b580 push {r7, lr} - 803d5ce: b082 sub sp, #8 - 803d5d0: af00 add r7, sp, #0 - 803d5d2: 6078 str r0, [r7, #4] + 803d650: b580 push {r7, lr} + 803d652: b082 sub sp, #8 + 803d654: af00 add r7, sp, #0 + 803d656: 6078 str r0, [r7, #4] LWIP_ASSERT("tcp_rexmit_fast: invalid pcb", pcb != NULL); - 803d5d4: 687b ldr r3, [r7, #4] - 803d5d6: 2b00 cmp r3, #0 - 803d5d8: d106 bne.n 803d5e8 - 803d5da: 4b2a ldr r3, [pc, #168] ; (803d684 ) - 803d5dc: f240 62f9 movw r2, #1785 ; 0x6f9 - 803d5e0: 4929 ldr r1, [pc, #164] ; (803d688 ) - 803d5e2: 482a ldr r0, [pc, #168] ; (803d68c ) - 803d5e4: f003 fa94 bl 8040b10 + 803d658: 687b ldr r3, [r7, #4] + 803d65a: 2b00 cmp r3, #0 + 803d65c: d106 bne.n 803d66c + 803d65e: 4b2a ldr r3, [pc, #168] ; (803d708 ) + 803d660: f240 62f9 movw r2, #1785 ; 0x6f9 + 803d664: 4929 ldr r1, [pc, #164] ; (803d70c ) + 803d666: 482a ldr r0, [pc, #168] ; (803d710 ) + 803d668: f003 fa94 bl 8040b94 if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) { - 803d5e8: 687b ldr r3, [r7, #4] - 803d5ea: 6f1b ldr r3, [r3, #112] ; 0x70 - 803d5ec: 2b00 cmp r3, #0 - 803d5ee: d045 beq.n 803d67c - 803d5f0: 687b ldr r3, [r7, #4] - 803d5f2: 8b5b ldrh r3, [r3, #26] - 803d5f4: f003 0304 and.w r3, r3, #4 - 803d5f8: 2b00 cmp r3, #0 - 803d5fa: d13f bne.n 803d67c + 803d66c: 687b ldr r3, [r7, #4] + 803d66e: 6f1b ldr r3, [r3, #112] ; 0x70 + 803d670: 2b00 cmp r3, #0 + 803d672: d045 beq.n 803d700 + 803d674: 687b ldr r3, [r7, #4] + 803d676: 8b5b ldrh r3, [r3, #26] + 803d678: f003 0304 and.w r3, r3, #4 + 803d67c: 2b00 cmp r3, #0 + 803d67e: d13f bne.n 803d700 LWIP_DEBUGF(TCP_FR_DEBUG, ("tcp_receive: dupacks %"U16_F" (%"U32_F "), fast retransmit %"U32_F"\n", (u16_t)pcb->dupacks, pcb->lastack, lwip_ntohl(pcb->unacked->tcphdr->seqno))); if (tcp_rexmit(pcb) == ERR_OK) { - 803d5fc: 6878 ldr r0, [r7, #4] - 803d5fe: f7ff ff79 bl 803d4f4 - 803d602: 4603 mov r3, r0 - 803d604: 2b00 cmp r3, #0 - 803d606: d139 bne.n 803d67c + 803d680: 6878 ldr r0, [r7, #4] + 803d682: f7ff ff79 bl 803d578 + 803d686: 4603 mov r3, r0 + 803d688: 2b00 cmp r3, #0 + 803d68a: d139 bne.n 803d700 /* Set ssthresh to half of the minimum of the current * cwnd and the advertised window */ pcb->ssthresh = LWIP_MIN(pcb->cwnd, pcb->snd_wnd) / 2; - 803d608: 687b ldr r3, [r7, #4] - 803d60a: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 - 803d60e: 687b ldr r3, [r7, #4] - 803d610: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 - 803d614: 4293 cmp r3, r2 - 803d616: bf28 it cs - 803d618: 4613 movcs r3, r2 - 803d61a: b29b uxth r3, r3 - 803d61c: 2b00 cmp r3, #0 - 803d61e: da00 bge.n 803d622 - 803d620: 3301 adds r3, #1 - 803d622: 105b asrs r3, r3, #1 - 803d624: b29a uxth r2, r3 - 803d626: 687b ldr r3, [r7, #4] - 803d628: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 803d68c: 687b ldr r3, [r7, #4] + 803d68e: f8b3 2060 ldrh.w r2, [r3, #96] ; 0x60 + 803d692: 687b ldr r3, [r7, #4] + 803d694: f8b3 3048 ldrh.w r3, [r3, #72] ; 0x48 + 803d698: 4293 cmp r3, r2 + 803d69a: bf28 it cs + 803d69c: 4613 movcs r3, r2 + 803d69e: b29b uxth r3, r3 + 803d6a0: 2b00 cmp r3, #0 + 803d6a2: da00 bge.n 803d6a6 + 803d6a4: 3301 adds r3, #1 + 803d6a6: 105b asrs r3, r3, #1 + 803d6a8: b29a uxth r2, r3 + 803d6aa: 687b ldr r3, [r7, #4] + 803d6ac: f8a3 204a strh.w r2, [r3, #74] ; 0x4a /* The minimum value for ssthresh should be 2 MSS */ if (pcb->ssthresh < (2U * pcb->mss)) { - 803d62c: 687b ldr r3, [r7, #4] - 803d62e: f8b3 304a ldrh.w r3, [r3, #74] ; 0x4a - 803d632: 461a mov r2, r3 - 803d634: 687b ldr r3, [r7, #4] - 803d636: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803d638: 005b lsls r3, r3, #1 - 803d63a: 429a cmp r2, r3 - 803d63c: d206 bcs.n 803d64c + 803d6b0: 687b ldr r3, [r7, #4] + 803d6b2: f8b3 304a ldrh.w r3, [r3, #74] ; 0x4a + 803d6b6: 461a mov r2, r3 + 803d6b8: 687b ldr r3, [r7, #4] + 803d6ba: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803d6bc: 005b lsls r3, r3, #1 + 803d6be: 429a cmp r2, r3 + 803d6c0: d206 bcs.n 803d6d0 LWIP_DEBUGF(TCP_FR_DEBUG, ("tcp_receive: The minimum value for ssthresh %"TCPWNDSIZE_F " should be min 2 mss %"U16_F"...\n", pcb->ssthresh, (u16_t)(2 * pcb->mss))); pcb->ssthresh = 2 * pcb->mss; - 803d63e: 687b ldr r3, [r7, #4] - 803d640: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803d642: 005b lsls r3, r3, #1 - 803d644: b29a uxth r2, r3 - 803d646: 687b ldr r3, [r7, #4] - 803d648: f8a3 204a strh.w r2, [r3, #74] ; 0x4a + 803d6c2: 687b ldr r3, [r7, #4] + 803d6c4: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803d6c6: 005b lsls r3, r3, #1 + 803d6c8: b29a uxth r2, r3 + 803d6ca: 687b ldr r3, [r7, #4] + 803d6cc: f8a3 204a strh.w r2, [r3, #74] ; 0x4a } pcb->cwnd = pcb->ssthresh + 3 * pcb->mss; - 803d64c: 687b ldr r3, [r7, #4] - 803d64e: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a - 803d652: 687b ldr r3, [r7, #4] - 803d654: 8e5b ldrh r3, [r3, #50] ; 0x32 - 803d656: 4619 mov r1, r3 - 803d658: 0049 lsls r1, r1, #1 - 803d65a: 440b add r3, r1 - 803d65c: b29b uxth r3, r3 - 803d65e: 4413 add r3, r2 - 803d660: b29a uxth r2, r3 - 803d662: 687b ldr r3, [r7, #4] - 803d664: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 + 803d6d0: 687b ldr r3, [r7, #4] + 803d6d2: f8b3 204a ldrh.w r2, [r3, #74] ; 0x4a + 803d6d6: 687b ldr r3, [r7, #4] + 803d6d8: 8e5b ldrh r3, [r3, #50] ; 0x32 + 803d6da: 4619 mov r1, r3 + 803d6dc: 0049 lsls r1, r1, #1 + 803d6de: 440b add r3, r1 + 803d6e0: b29b uxth r3, r3 + 803d6e2: 4413 add r3, r2 + 803d6e4: b29a uxth r2, r3 + 803d6e6: 687b ldr r3, [r7, #4] + 803d6e8: f8a3 2048 strh.w r2, [r3, #72] ; 0x48 tcp_set_flags(pcb, TF_INFR); - 803d668: 687b ldr r3, [r7, #4] - 803d66a: 8b5b ldrh r3, [r3, #26] - 803d66c: f043 0304 orr.w r3, r3, #4 - 803d670: b29a uxth r2, r3 - 803d672: 687b ldr r3, [r7, #4] - 803d674: 835a strh r2, [r3, #26] + 803d6ec: 687b ldr r3, [r7, #4] + 803d6ee: 8b5b ldrh r3, [r3, #26] + 803d6f0: f043 0304 orr.w r3, r3, #4 + 803d6f4: b29a uxth r2, r3 + 803d6f6: 687b ldr r3, [r7, #4] + 803d6f8: 835a strh r2, [r3, #26] /* Reset the retransmission timer to prevent immediate rto retransmissions */ pcb->rtime = 0; - 803d676: 687b ldr r3, [r7, #4] - 803d678: 2200 movs r2, #0 - 803d67a: 861a strh r2, [r3, #48] ; 0x30 + 803d6fa: 687b ldr r3, [r7, #4] + 803d6fc: 2200 movs r2, #0 + 803d6fe: 861a strh r2, [r3, #48] ; 0x30 } } } - 803d67c: bf00 nop - 803d67e: 3708 adds r7, #8 - 803d680: 46bd mov sp, r7 - 803d682: bd80 pop {r7, pc} - 803d684: 08043980 .word 0x08043980 - 803d688: 08044038 .word 0x08044038 - 803d68c: 080439d4 .word 0x080439d4 + 803d700: bf00 nop + 803d702: 3708 adds r7, #8 + 803d704: 46bd mov sp, r7 + 803d706: bd80 pop {r7, pc} + 803d708: 08043a00 .word 0x08043a00 + 803d70c: 080440b8 .word 0x080440b8 + 803d710: 08043a54 .word 0x08043a54 -0803d690 : +0803d714 : static struct pbuf * tcp_output_alloc_header_common(u32_t ackno, u16_t optlen, u16_t datalen, u32_t seqno_be /* already in network byte order */, u16_t src_port, u16_t dst_port, u8_t flags, u16_t wnd) { - 803d690: b580 push {r7, lr} - 803d692: b086 sub sp, #24 - 803d694: af00 add r7, sp, #0 - 803d696: 60f8 str r0, [r7, #12] - 803d698: 607b str r3, [r7, #4] - 803d69a: 460b mov r3, r1 - 803d69c: 817b strh r3, [r7, #10] - 803d69e: 4613 mov r3, r2 - 803d6a0: 813b strh r3, [r7, #8] + 803d714: b580 push {r7, lr} + 803d716: b086 sub sp, #24 + 803d718: af00 add r7, sp, #0 + 803d71a: 60f8 str r0, [r7, #12] + 803d71c: 607b str r3, [r7, #4] + 803d71e: 460b mov r3, r1 + 803d720: 817b strh r3, [r7, #10] + 803d722: 4613 mov r3, r2 + 803d724: 813b strh r3, [r7, #8] struct tcp_hdr *tcphdr; struct pbuf *p; p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM); - 803d6a2: 897a ldrh r2, [r7, #10] - 803d6a4: 893b ldrh r3, [r7, #8] - 803d6a6: 4413 add r3, r2 - 803d6a8: b29b uxth r3, r3 - 803d6aa: 3314 adds r3, #20 - 803d6ac: b29b uxth r3, r3 - 803d6ae: f44f 7220 mov.w r2, #640 ; 0x280 - 803d6b2: 4619 mov r1, r3 - 803d6b4: 2022 movs r0, #34 ; 0x22 - 803d6b6: f7f9 fd5d bl 8037174 - 803d6ba: 6178 str r0, [r7, #20] + 803d726: 897a ldrh r2, [r7, #10] + 803d728: 893b ldrh r3, [r7, #8] + 803d72a: 4413 add r3, r2 + 803d72c: b29b uxth r3, r3 + 803d72e: 3314 adds r3, #20 + 803d730: b29b uxth r3, r3 + 803d732: f44f 7220 mov.w r2, #640 ; 0x280 + 803d736: 4619 mov r1, r3 + 803d738: 2022 movs r0, #34 ; 0x22 + 803d73a: f7f9 fd5d bl 80371f8 + 803d73e: 6178 str r0, [r7, #20] if (p != NULL) { - 803d6bc: 697b ldr r3, [r7, #20] - 803d6be: 2b00 cmp r3, #0 - 803d6c0: d04d beq.n 803d75e + 803d740: 697b ldr r3, [r7, #20] + 803d742: 2b00 cmp r3, #0 + 803d744: d04d beq.n 803d7e2 LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", - 803d6c2: 897b ldrh r3, [r7, #10] - 803d6c4: 3313 adds r3, #19 - 803d6c6: 697a ldr r2, [r7, #20] - 803d6c8: 8952 ldrh r2, [r2, #10] - 803d6ca: 4293 cmp r3, r2 - 803d6cc: db06 blt.n 803d6dc - 803d6ce: 4b26 ldr r3, [pc, #152] ; (803d768 ) - 803d6d0: f240 7223 movw r2, #1827 ; 0x723 - 803d6d4: 4925 ldr r1, [pc, #148] ; (803d76c ) - 803d6d6: 4826 ldr r0, [pc, #152] ; (803d770 ) - 803d6d8: f003 fa1a bl 8040b10 + 803d746: 897b ldrh r3, [r7, #10] + 803d748: 3313 adds r3, #19 + 803d74a: 697a ldr r2, [r7, #20] + 803d74c: 8952 ldrh r2, [r2, #10] + 803d74e: 4293 cmp r3, r2 + 803d750: db06 blt.n 803d760 + 803d752: 4b26 ldr r3, [pc, #152] ; (803d7ec ) + 803d754: f240 7223 movw r2, #1827 ; 0x723 + 803d758: 4925 ldr r1, [pc, #148] ; (803d7f0 ) + 803d75a: 4826 ldr r0, [pc, #152] ; (803d7f4 ) + 803d75c: f003 fa1a bl 8040b94 (p->len >= TCP_HLEN + optlen)); tcphdr = (struct tcp_hdr *)p->payload; - 803d6dc: 697b ldr r3, [r7, #20] - 803d6de: 685b ldr r3, [r3, #4] - 803d6e0: 613b str r3, [r7, #16] + 803d760: 697b ldr r3, [r7, #20] + 803d762: 685b ldr r3, [r3, #4] + 803d764: 613b str r3, [r7, #16] tcphdr->src = lwip_htons(src_port); - 803d6e2: 8c3b ldrh r3, [r7, #32] - 803d6e4: 4618 mov r0, r3 - 803d6e6: f7f8 fbf7 bl 8035ed8 - 803d6ea: 4603 mov r3, r0 - 803d6ec: 461a mov r2, r3 - 803d6ee: 693b ldr r3, [r7, #16] - 803d6f0: 801a strh r2, [r3, #0] + 803d766: 8c3b ldrh r3, [r7, #32] + 803d768: 4618 mov r0, r3 + 803d76a: f7f8 fbf7 bl 8035f5c + 803d76e: 4603 mov r3, r0 + 803d770: 461a mov r2, r3 + 803d772: 693b ldr r3, [r7, #16] + 803d774: 801a strh r2, [r3, #0] tcphdr->dest = lwip_htons(dst_port); - 803d6f2: 8cbb ldrh r3, [r7, #36] ; 0x24 - 803d6f4: 4618 mov r0, r3 - 803d6f6: f7f8 fbef bl 8035ed8 - 803d6fa: 4603 mov r3, r0 - 803d6fc: 461a mov r2, r3 - 803d6fe: 693b ldr r3, [r7, #16] - 803d700: 805a strh r2, [r3, #2] + 803d776: 8cbb ldrh r3, [r7, #36] ; 0x24 + 803d778: 4618 mov r0, r3 + 803d77a: f7f8 fbef bl 8035f5c + 803d77e: 4603 mov r3, r0 + 803d780: 461a mov r2, r3 + 803d782: 693b ldr r3, [r7, #16] + 803d784: 805a strh r2, [r3, #2] tcphdr->seqno = seqno_be; - 803d702: 693b ldr r3, [r7, #16] - 803d704: 687a ldr r2, [r7, #4] - 803d706: 605a str r2, [r3, #4] + 803d786: 693b ldr r3, [r7, #16] + 803d788: 687a ldr r2, [r7, #4] + 803d78a: 605a str r2, [r3, #4] tcphdr->ackno = lwip_htonl(ackno); - 803d708: 68f8 ldr r0, [r7, #12] - 803d70a: f7f8 fbfa bl 8035f02 - 803d70e: 4602 mov r2, r0 - 803d710: 693b ldr r3, [r7, #16] - 803d712: 609a str r2, [r3, #8] + 803d78c: 68f8 ldr r0, [r7, #12] + 803d78e: f7f8 fbfa bl 8035f86 + 803d792: 4602 mov r2, r0 + 803d794: 693b ldr r3, [r7, #16] + 803d796: 609a str r2, [r3, #8] TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), flags); - 803d714: 897b ldrh r3, [r7, #10] - 803d716: 089b lsrs r3, r3, #2 - 803d718: b29b uxth r3, r3 - 803d71a: 3305 adds r3, #5 - 803d71c: b29b uxth r3, r3 - 803d71e: 031b lsls r3, r3, #12 - 803d720: b29a uxth r2, r3 - 803d722: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 - 803d726: b29b uxth r3, r3 - 803d728: 4313 orrs r3, r2 - 803d72a: b29b uxth r3, r3 - 803d72c: 4618 mov r0, r3 - 803d72e: f7f8 fbd3 bl 8035ed8 - 803d732: 4603 mov r3, r0 - 803d734: 461a mov r2, r3 - 803d736: 693b ldr r3, [r7, #16] - 803d738: 819a strh r2, [r3, #12] + 803d798: 897b ldrh r3, [r7, #10] + 803d79a: 089b lsrs r3, r3, #2 + 803d79c: b29b uxth r3, r3 + 803d79e: 3305 adds r3, #5 + 803d7a0: b29b uxth r3, r3 + 803d7a2: 031b lsls r3, r3, #12 + 803d7a4: b29a uxth r2, r3 + 803d7a6: f897 3028 ldrb.w r3, [r7, #40] ; 0x28 + 803d7aa: b29b uxth r3, r3 + 803d7ac: 4313 orrs r3, r2 + 803d7ae: b29b uxth r3, r3 + 803d7b0: 4618 mov r0, r3 + 803d7b2: f7f8 fbd3 bl 8035f5c + 803d7b6: 4603 mov r3, r0 + 803d7b8: 461a mov r2, r3 + 803d7ba: 693b ldr r3, [r7, #16] + 803d7bc: 819a strh r2, [r3, #12] tcphdr->wnd = lwip_htons(wnd); - 803d73a: 8dbb ldrh r3, [r7, #44] ; 0x2c - 803d73c: 4618 mov r0, r3 - 803d73e: f7f8 fbcb bl 8035ed8 - 803d742: 4603 mov r3, r0 - 803d744: 461a mov r2, r3 - 803d746: 693b ldr r3, [r7, #16] - 803d748: 81da strh r2, [r3, #14] + 803d7be: 8dbb ldrh r3, [r7, #44] ; 0x2c + 803d7c0: 4618 mov r0, r3 + 803d7c2: f7f8 fbcb bl 8035f5c + 803d7c6: 4603 mov r3, r0 + 803d7c8: 461a mov r2, r3 + 803d7ca: 693b ldr r3, [r7, #16] + 803d7cc: 81da strh r2, [r3, #14] tcphdr->chksum = 0; - 803d74a: 693b ldr r3, [r7, #16] - 803d74c: 2200 movs r2, #0 - 803d74e: 741a strb r2, [r3, #16] - 803d750: 2200 movs r2, #0 - 803d752: 745a strb r2, [r3, #17] + 803d7ce: 693b ldr r3, [r7, #16] + 803d7d0: 2200 movs r2, #0 + 803d7d2: 741a strb r2, [r3, #16] + 803d7d4: 2200 movs r2, #0 + 803d7d6: 745a strb r2, [r3, #17] tcphdr->urgp = 0; - 803d754: 693b ldr r3, [r7, #16] - 803d756: 2200 movs r2, #0 - 803d758: 749a strb r2, [r3, #18] - 803d75a: 2200 movs r2, #0 - 803d75c: 74da strb r2, [r3, #19] + 803d7d8: 693b ldr r3, [r7, #16] + 803d7da: 2200 movs r2, #0 + 803d7dc: 749a strb r2, [r3, #18] + 803d7de: 2200 movs r2, #0 + 803d7e0: 74da strb r2, [r3, #19] } return p; - 803d75e: 697b ldr r3, [r7, #20] + 803d7e2: 697b ldr r3, [r7, #20] } - 803d760: 4618 mov r0, r3 - 803d762: 3718 adds r7, #24 - 803d764: 46bd mov sp, r7 - 803d766: bd80 pop {r7, pc} - 803d768: 08043980 .word 0x08043980 - 803d76c: 08044058 .word 0x08044058 - 803d770: 080439d4 .word 0x080439d4 + 803d7e4: 4618 mov r0, r3 + 803d7e6: 3718 adds r7, #24 + 803d7e8: 46bd mov sp, r7 + 803d7ea: bd80 pop {r7, pc} + 803d7ec: 08043a00 .word 0x08043a00 + 803d7f0: 080440d8 .word 0x080440d8 + 803d7f4: 08043a54 .word 0x08043a54 -0803d774 : +0803d7f8 : * @return pbuf with p->payload being the tcp_hdr */ static struct pbuf * tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen, u32_t seqno_be /* already in network byte order */) { - 803d774: b5b0 push {r4, r5, r7, lr} - 803d776: b08a sub sp, #40 ; 0x28 - 803d778: af04 add r7, sp, #16 - 803d77a: 60f8 str r0, [r7, #12] - 803d77c: 607b str r3, [r7, #4] - 803d77e: 460b mov r3, r1 - 803d780: 817b strh r3, [r7, #10] - 803d782: 4613 mov r3, r2 - 803d784: 813b strh r3, [r7, #8] + 803d7f8: b5b0 push {r4, r5, r7, lr} + 803d7fa: b08a sub sp, #40 ; 0x28 + 803d7fc: af04 add r7, sp, #16 + 803d7fe: 60f8 str r0, [r7, #12] + 803d800: 607b str r3, [r7, #4] + 803d802: 460b mov r3, r1 + 803d804: 817b strh r3, [r7, #10] + 803d806: 4613 mov r3, r2 + 803d808: 813b strh r3, [r7, #8] struct pbuf *p; LWIP_ASSERT("tcp_output_alloc_header: invalid pcb", pcb != NULL); - 803d786: 68fb ldr r3, [r7, #12] - 803d788: 2b00 cmp r3, #0 - 803d78a: d106 bne.n 803d79a - 803d78c: 4b15 ldr r3, [pc, #84] ; (803d7e4 ) - 803d78e: f240 7242 movw r2, #1858 ; 0x742 - 803d792: 4915 ldr r1, [pc, #84] ; (803d7e8 ) - 803d794: 4815 ldr r0, [pc, #84] ; (803d7ec ) - 803d796: f003 f9bb bl 8040b10 + 803d80a: 68fb ldr r3, [r7, #12] + 803d80c: 2b00 cmp r3, #0 + 803d80e: d106 bne.n 803d81e + 803d810: 4b15 ldr r3, [pc, #84] ; (803d868 ) + 803d812: f240 7242 movw r2, #1858 ; 0x742 + 803d816: 4915 ldr r1, [pc, #84] ; (803d86c ) + 803d818: 4815 ldr r0, [pc, #84] ; (803d870 ) + 803d81a: f003 f9bb bl 8040b94 p = tcp_output_alloc_header_common(pcb->rcv_nxt, optlen, datalen, - 803d79a: 68fb ldr r3, [r7, #12] - 803d79c: 6a58 ldr r0, [r3, #36] ; 0x24 - 803d79e: 68fb ldr r3, [r7, #12] - 803d7a0: 8adb ldrh r3, [r3, #22] - 803d7a2: 68fa ldr r2, [r7, #12] - 803d7a4: 8b12 ldrh r2, [r2, #24] - 803d7a6: 68f9 ldr r1, [r7, #12] - 803d7a8: 8d49 ldrh r1, [r1, #42] ; 0x2a - 803d7aa: 893d ldrh r5, [r7, #8] - 803d7ac: 897c ldrh r4, [r7, #10] - 803d7ae: 9103 str r1, [sp, #12] - 803d7b0: 2110 movs r1, #16 - 803d7b2: 9102 str r1, [sp, #8] - 803d7b4: 9201 str r2, [sp, #4] - 803d7b6: 9300 str r3, [sp, #0] - 803d7b8: 687b ldr r3, [r7, #4] - 803d7ba: 462a mov r2, r5 - 803d7bc: 4621 mov r1, r4 - 803d7be: f7ff ff67 bl 803d690 - 803d7c2: 6178 str r0, [r7, #20] + 803d81e: 68fb ldr r3, [r7, #12] + 803d820: 6a58 ldr r0, [r3, #36] ; 0x24 + 803d822: 68fb ldr r3, [r7, #12] + 803d824: 8adb ldrh r3, [r3, #22] + 803d826: 68fa ldr r2, [r7, #12] + 803d828: 8b12 ldrh r2, [r2, #24] + 803d82a: 68f9 ldr r1, [r7, #12] + 803d82c: 8d49 ldrh r1, [r1, #42] ; 0x2a + 803d82e: 893d ldrh r5, [r7, #8] + 803d830: 897c ldrh r4, [r7, #10] + 803d832: 9103 str r1, [sp, #12] + 803d834: 2110 movs r1, #16 + 803d836: 9102 str r1, [sp, #8] + 803d838: 9201 str r2, [sp, #4] + 803d83a: 9300 str r3, [sp, #0] + 803d83c: 687b ldr r3, [r7, #4] + 803d83e: 462a mov r2, r5 + 803d840: 4621 mov r1, r4 + 803d842: f7ff ff67 bl 803d714 + 803d846: 6178 str r0, [r7, #20] seqno_be, pcb->local_port, pcb->remote_port, TCP_ACK, TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd))); if (p != NULL) { - 803d7c4: 697b ldr r3, [r7, #20] - 803d7c6: 2b00 cmp r3, #0 - 803d7c8: d006 beq.n 803d7d8 + 803d848: 697b ldr r3, [r7, #20] + 803d84a: 2b00 cmp r3, #0 + 803d84c: d006 beq.n 803d85c /* If we're sending a packet, update the announced right window edge */ pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; - 803d7ca: 68fb ldr r3, [r7, #12] - 803d7cc: 6a5b ldr r3, [r3, #36] ; 0x24 - 803d7ce: 68fa ldr r2, [r7, #12] - 803d7d0: 8d52 ldrh r2, [r2, #42] ; 0x2a - 803d7d2: 441a add r2, r3 - 803d7d4: 68fb ldr r3, [r7, #12] - 803d7d6: 62da str r2, [r3, #44] ; 0x2c + 803d84e: 68fb ldr r3, [r7, #12] + 803d850: 6a5b ldr r3, [r3, #36] ; 0x24 + 803d852: 68fa ldr r2, [r7, #12] + 803d854: 8d52 ldrh r2, [r2, #42] ; 0x2a + 803d856: 441a add r2, r3 + 803d858: 68fb ldr r3, [r7, #12] + 803d85a: 62da str r2, [r3, #44] ; 0x2c } return p; - 803d7d8: 697b ldr r3, [r7, #20] + 803d85c: 697b ldr r3, [r7, #20] } - 803d7da: 4618 mov r0, r3 - 803d7dc: 3718 adds r7, #24 - 803d7de: 46bd mov sp, r7 - 803d7e0: bdb0 pop {r4, r5, r7, pc} - 803d7e2: bf00 nop - 803d7e4: 08043980 .word 0x08043980 - 803d7e8: 08044088 .word 0x08044088 - 803d7ec: 080439d4 .word 0x080439d4 + 803d85e: 4618 mov r0, r3 + 803d860: 3718 adds r7, #24 + 803d862: 46bd mov sp, r7 + 803d864: bdb0 pop {r4, r5, r7, pc} + 803d866: bf00 nop + 803d868: 08043a00 .word 0x08043a00 + 803d86c: 08044108 .word 0x08044108 + 803d870: 08043a54 .word 0x08043a54 -0803d7f0 : +0803d874 : /* Fill in options for control segments */ static void tcp_output_fill_options(const struct tcp_pcb *pcb, struct pbuf *p, u8_t optflags, u8_t num_sacks) { - 803d7f0: b580 push {r7, lr} - 803d7f2: b088 sub sp, #32 - 803d7f4: af00 add r7, sp, #0 - 803d7f6: 60f8 str r0, [r7, #12] - 803d7f8: 60b9 str r1, [r7, #8] - 803d7fa: 4611 mov r1, r2 - 803d7fc: 461a mov r2, r3 - 803d7fe: 460b mov r3, r1 - 803d800: 71fb strb r3, [r7, #7] - 803d802: 4613 mov r3, r2 - 803d804: 71bb strb r3, [r7, #6] + 803d874: b580 push {r7, lr} + 803d876: b088 sub sp, #32 + 803d878: af00 add r7, sp, #0 + 803d87a: 60f8 str r0, [r7, #12] + 803d87c: 60b9 str r1, [r7, #8] + 803d87e: 4611 mov r1, r2 + 803d880: 461a mov r2, r3 + 803d882: 460b mov r3, r1 + 803d884: 71fb strb r3, [r7, #7] + 803d886: 4613 mov r3, r2 + 803d888: 71bb strb r3, [r7, #6] struct tcp_hdr *tcphdr; u32_t *opts; u16_t sacks_len = 0; - 803d806: 2300 movs r3, #0 - 803d808: 83fb strh r3, [r7, #30] + 803d88a: 2300 movs r3, #0 + 803d88c: 83fb strh r3, [r7, #30] LWIP_ASSERT("tcp_output_fill_options: invalid pbuf", p != NULL); - 803d80a: 68bb ldr r3, [r7, #8] - 803d80c: 2b00 cmp r3, #0 - 803d80e: d106 bne.n 803d81e - 803d810: 4b13 ldr r3, [pc, #76] ; (803d860 ) - 803d812: f240 7256 movw r2, #1878 ; 0x756 - 803d816: 4913 ldr r1, [pc, #76] ; (803d864 ) - 803d818: 4813 ldr r0, [pc, #76] ; (803d868 ) - 803d81a: f003 f979 bl 8040b10 + 803d88e: 68bb ldr r3, [r7, #8] + 803d890: 2b00 cmp r3, #0 + 803d892: d106 bne.n 803d8a2 + 803d894: 4b13 ldr r3, [pc, #76] ; (803d8e4 ) + 803d896: f240 7256 movw r2, #1878 ; 0x756 + 803d89a: 4913 ldr r1, [pc, #76] ; (803d8e8 ) + 803d89c: 4813 ldr r0, [pc, #76] ; (803d8ec ) + 803d89e: f003 f979 bl 8040b94 tcphdr = (struct tcp_hdr *)p->payload; - 803d81e: 68bb ldr r3, [r7, #8] - 803d820: 685b ldr r3, [r3, #4] - 803d822: 61bb str r3, [r7, #24] + 803d8a2: 68bb ldr r3, [r7, #8] + 803d8a4: 685b ldr r3, [r3, #4] + 803d8a6: 61bb str r3, [r7, #24] opts = (u32_t *)(void *)(tcphdr + 1); - 803d824: 69bb ldr r3, [r7, #24] - 803d826: 3314 adds r3, #20 - 803d828: 617b str r3, [r7, #20] + 803d8a8: 69bb ldr r3, [r7, #24] + 803d8aa: 3314 adds r3, #20 + 803d8ac: 617b str r3, [r7, #20] opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, tcphdr, pcb, opts); #endif LWIP_UNUSED_ARG(pcb); LWIP_UNUSED_ARG(sacks_len); LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(tcphdr + 1)) + sacks_len * 4 + LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb)); - 803d82a: 69bb ldr r3, [r7, #24] - 803d82c: f103 0214 add.w r2, r3, #20 - 803d830: 8bfb ldrh r3, [r7, #30] - 803d832: 009b lsls r3, r3, #2 - 803d834: 4619 mov r1, r3 - 803d836: 79fb ldrb r3, [r7, #7] - 803d838: 009b lsls r3, r3, #2 - 803d83a: f003 0304 and.w r3, r3, #4 - 803d83e: 440b add r3, r1 - 803d840: 4413 add r3, r2 - 803d842: 697a ldr r2, [r7, #20] - 803d844: 429a cmp r2, r3 - 803d846: d006 beq.n 803d856 - 803d848: 4b05 ldr r3, [pc, #20] ; (803d860 ) - 803d84a: f240 7275 movw r2, #1909 ; 0x775 - 803d84e: 4907 ldr r1, [pc, #28] ; (803d86c ) - 803d850: 4805 ldr r0, [pc, #20] ; (803d868 ) - 803d852: f003 f95d bl 8040b10 + 803d8ae: 69bb ldr r3, [r7, #24] + 803d8b0: f103 0214 add.w r2, r3, #20 + 803d8b4: 8bfb ldrh r3, [r7, #30] + 803d8b6: 009b lsls r3, r3, #2 + 803d8b8: 4619 mov r1, r3 + 803d8ba: 79fb ldrb r3, [r7, #7] + 803d8bc: 009b lsls r3, r3, #2 + 803d8be: f003 0304 and.w r3, r3, #4 + 803d8c2: 440b add r3, r1 + 803d8c4: 4413 add r3, r2 + 803d8c6: 697a ldr r2, [r7, #20] + 803d8c8: 429a cmp r2, r3 + 803d8ca: d006 beq.n 803d8da + 803d8cc: 4b05 ldr r3, [pc, #20] ; (803d8e4 ) + 803d8ce: f240 7275 movw r2, #1909 ; 0x775 + 803d8d2: 4907 ldr r1, [pc, #28] ; (803d8f0 ) + 803d8d4: 4805 ldr r0, [pc, #20] ; (803d8ec ) + 803d8d6: f003 f95d bl 8040b94 LWIP_UNUSED_ARG(optflags); /* for LWIP_NOASSERT */ LWIP_UNUSED_ARG(opts); /* for LWIP_NOASSERT */ } - 803d856: bf00 nop - 803d858: 3720 adds r7, #32 - 803d85a: 46bd mov sp, r7 - 803d85c: bd80 pop {r7, pc} - 803d85e: bf00 nop - 803d860: 08043980 .word 0x08043980 - 803d864: 080440b0 .word 0x080440b0 - 803d868: 080439d4 .word 0x080439d4 - 803d86c: 08043fa8 .word 0x08043fa8 - -0803d870 : + 803d8da: bf00 nop + 803d8dc: 3720 adds r7, #32 + 803d8de: 46bd mov sp, r7 + 803d8e0: bd80 pop {r7, pc} + 803d8e2: bf00 nop + 803d8e4: 08043a00 .word 0x08043a00 + 803d8e8: 08044130 .word 0x08044130 + 803d8ec: 08043a54 .word 0x08043a54 + 803d8f0: 08044028 .word 0x08044028 + +0803d8f4 : * header checksum and calling ip_output_if while handling netif hints and stats. */ static err_t tcp_output_control_segment(const struct tcp_pcb *pcb, struct pbuf *p, const ip_addr_t *src, const ip_addr_t *dst) { - 803d870: b580 push {r7, lr} - 803d872: b08a sub sp, #40 ; 0x28 - 803d874: af04 add r7, sp, #16 - 803d876: 60f8 str r0, [r7, #12] - 803d878: 60b9 str r1, [r7, #8] - 803d87a: 607a str r2, [r7, #4] - 803d87c: 603b str r3, [r7, #0] + 803d8f4: b580 push {r7, lr} + 803d8f6: b08a sub sp, #40 ; 0x28 + 803d8f8: af04 add r7, sp, #16 + 803d8fa: 60f8 str r0, [r7, #12] + 803d8fc: 60b9 str r1, [r7, #8] + 803d8fe: 607a str r2, [r7, #4] + 803d900: 603b str r3, [r7, #0] err_t err; struct netif *netif; LWIP_ASSERT("tcp_output_control_segment: invalid pbuf", p != NULL); - 803d87e: 68bb ldr r3, [r7, #8] - 803d880: 2b00 cmp r3, #0 - 803d882: d106 bne.n 803d892 - 803d884: 4b1c ldr r3, [pc, #112] ; (803d8f8 ) - 803d886: f240 7287 movw r2, #1927 ; 0x787 - 803d88a: 491c ldr r1, [pc, #112] ; (803d8fc ) - 803d88c: 481c ldr r0, [pc, #112] ; (803d900 ) - 803d88e: f003 f93f bl 8040b10 + 803d902: 68bb ldr r3, [r7, #8] + 803d904: 2b00 cmp r3, #0 + 803d906: d106 bne.n 803d916 + 803d908: 4b1c ldr r3, [pc, #112] ; (803d97c ) + 803d90a: f240 7287 movw r2, #1927 ; 0x787 + 803d90e: 491c ldr r1, [pc, #112] ; (803d980 ) + 803d910: 481c ldr r0, [pc, #112] ; (803d984 ) + 803d912: f003 f93f bl 8040b94 netif = tcp_route(pcb, src, dst); - 803d892: 683a ldr r2, [r7, #0] - 803d894: 6879 ldr r1, [r7, #4] - 803d896: 68f8 ldr r0, [r7, #12] - 803d898: f7fe fae8 bl 803be6c - 803d89c: 6138 str r0, [r7, #16] + 803d916: 683a ldr r2, [r7, #0] + 803d918: 6879 ldr r1, [r7, #4] + 803d91a: 68f8 ldr r0, [r7, #12] + 803d91c: f7fe fae8 bl 803bef0 + 803d920: 6138 str r0, [r7, #16] if (netif == NULL) { - 803d89e: 693b ldr r3, [r7, #16] - 803d8a0: 2b00 cmp r3, #0 - 803d8a2: d102 bne.n 803d8aa + 803d922: 693b ldr r3, [r7, #16] + 803d924: 2b00 cmp r3, #0 + 803d926: d102 bne.n 803d92e err = ERR_RTE; - 803d8a4: 23fc movs r3, #252 ; 0xfc - 803d8a6: 75fb strb r3, [r7, #23] - 803d8a8: e01c b.n 803d8e4 + 803d928: 23fc movs r3, #252 ; 0xfc + 803d92a: 75fb strb r3, [r7, #23] + 803d92c: e01c b.n 803d968 struct tcp_hdr *tcphdr = (struct tcp_hdr *)p->payload; tcphdr->chksum = ip_chksum_pseudo(p, IP_PROTO_TCP, p->tot_len, src, dst); } #endif if (pcb != NULL) { - 803d8aa: 68fb ldr r3, [r7, #12] - 803d8ac: 2b00 cmp r3, #0 - 803d8ae: d006 beq.n 803d8be + 803d92e: 68fb ldr r3, [r7, #12] + 803d930: 2b00 cmp r3, #0 + 803d932: d006 beq.n 803d942 NETIF_SET_HINTS(netif, LWIP_CONST_CAST(struct netif_hint*, &(pcb->netif_hints))); ttl = pcb->ttl; - 803d8b0: 68fb ldr r3, [r7, #12] - 803d8b2: 7adb ldrb r3, [r3, #11] - 803d8b4: 75bb strb r3, [r7, #22] + 803d934: 68fb ldr r3, [r7, #12] + 803d936: 7adb ldrb r3, [r3, #11] + 803d938: 75bb strb r3, [r7, #22] tos = pcb->tos; - 803d8b6: 68fb ldr r3, [r7, #12] - 803d8b8: 7a9b ldrb r3, [r3, #10] - 803d8ba: 757b strb r3, [r7, #21] - 803d8bc: e003 b.n 803d8c6 + 803d93a: 68fb ldr r3, [r7, #12] + 803d93c: 7a9b ldrb r3, [r3, #10] + 803d93e: 757b strb r3, [r7, #21] + 803d940: e003 b.n 803d94a } else { /* Send output with hardcoded TTL/HL since we have no access to the pcb */ ttl = TCP_TTL; - 803d8be: 23ff movs r3, #255 ; 0xff - 803d8c0: 75bb strb r3, [r7, #22] + 803d942: 23ff movs r3, #255 ; 0xff + 803d944: 75bb strb r3, [r7, #22] tos = 0; - 803d8c2: 2300 movs r3, #0 - 803d8c4: 757b strb r3, [r7, #21] + 803d946: 2300 movs r3, #0 + 803d948: 757b strb r3, [r7, #21] } TCP_STATS_INC(tcp.xmit); err = ip_output_if(p, src, dst, ttl, tos, IP_PROTO_TCP, netif); - 803d8c6: 7dba ldrb r2, [r7, #22] - 803d8c8: 693b ldr r3, [r7, #16] - 803d8ca: 9302 str r3, [sp, #8] - 803d8cc: 2306 movs r3, #6 - 803d8ce: 9301 str r3, [sp, #4] - 803d8d0: 7d7b ldrb r3, [r7, #21] - 803d8d2: 9300 str r3, [sp, #0] - 803d8d4: 4613 mov r3, r2 - 803d8d6: 683a ldr r2, [r7, #0] - 803d8d8: 6879 ldr r1, [r7, #4] - 803d8da: 68b8 ldr r0, [r7, #8] - 803d8dc: f001 ff96 bl 803f80c - 803d8e0: 4603 mov r3, r0 - 803d8e2: 75fb strb r3, [r7, #23] + 803d94a: 7dba ldrb r2, [r7, #22] + 803d94c: 693b ldr r3, [r7, #16] + 803d94e: 9302 str r3, [sp, #8] + 803d950: 2306 movs r3, #6 + 803d952: 9301 str r3, [sp, #4] + 803d954: 7d7b ldrb r3, [r7, #21] + 803d956: 9300 str r3, [sp, #0] + 803d958: 4613 mov r3, r2 + 803d95a: 683a ldr r2, [r7, #0] + 803d95c: 6879 ldr r1, [r7, #4] + 803d95e: 68b8 ldr r0, [r7, #8] + 803d960: f001 ff96 bl 803f890 + 803d964: 4603 mov r3, r0 + 803d966: 75fb strb r3, [r7, #23] NETIF_RESET_HINTS(netif); } pbuf_free(p); - 803d8e4: 68b8 ldr r0, [r7, #8] - 803d8e6: f7f9 ff29 bl 803773c + 803d968: 68b8 ldr r0, [r7, #8] + 803d96a: f7f9 ff29 bl 80377c0 return err; - 803d8ea: f997 3017 ldrsb.w r3, [r7, #23] -} - 803d8ee: 4618 mov r0, r3 - 803d8f0: 3718 adds r7, #24 - 803d8f2: 46bd mov sp, r7 - 803d8f4: bd80 pop {r7, pc} - 803d8f6: bf00 nop - 803d8f8: 08043980 .word 0x08043980 - 803d8fc: 080440d8 .word 0x080440d8 - 803d900: 080439d4 .word 0x080439d4 - -0803d904 : + 803d96e: f997 3017 ldrsb.w r3, [r7, #23] +} + 803d972: 4618 mov r0, r3 + 803d974: 3718 adds r7, #24 + 803d976: 46bd mov sp, r7 + 803d978: bd80 pop {r7, pc} + 803d97a: bf00 nop + 803d97c: 08043a00 .word 0x08043a00 + 803d980: 08044158 .word 0x08044158 + 803d984: 08043a54 .word 0x08043a54 + +0803d988 : */ void tcp_rst(const struct tcp_pcb *pcb, u32_t seqno, u32_t ackno, const ip_addr_t *local_ip, const ip_addr_t *remote_ip, u16_t local_port, u16_t remote_port) { - 803d904: b590 push {r4, r7, lr} - 803d906: b08b sub sp, #44 ; 0x2c - 803d908: af04 add r7, sp, #16 - 803d90a: 60f8 str r0, [r7, #12] - 803d90c: 60b9 str r1, [r7, #8] - 803d90e: 607a str r2, [r7, #4] - 803d910: 603b str r3, [r7, #0] + 803d988: b590 push {r4, r7, lr} + 803d98a: b08b sub sp, #44 ; 0x2c + 803d98c: af04 add r7, sp, #16 + 803d98e: 60f8 str r0, [r7, #12] + 803d990: 60b9 str r1, [r7, #8] + 803d992: 607a str r2, [r7, #4] + 803d994: 603b str r3, [r7, #0] struct pbuf *p; u16_t wnd; u8_t optlen; LWIP_ASSERT("tcp_rst: invalid local_ip", local_ip != NULL); - 803d912: 683b ldr r3, [r7, #0] - 803d914: 2b00 cmp r3, #0 - 803d916: d106 bne.n 803d926 - 803d918: 4b1f ldr r3, [pc, #124] ; (803d998 ) - 803d91a: f240 72c4 movw r2, #1988 ; 0x7c4 - 803d91e: 491f ldr r1, [pc, #124] ; (803d99c ) - 803d920: 481f ldr r0, [pc, #124] ; (803d9a0 ) - 803d922: f003 f8f5 bl 8040b10 + 803d996: 683b ldr r3, [r7, #0] + 803d998: 2b00 cmp r3, #0 + 803d99a: d106 bne.n 803d9aa + 803d99c: 4b1f ldr r3, [pc, #124] ; (803da1c ) + 803d99e: f240 72c4 movw r2, #1988 ; 0x7c4 + 803d9a2: 491f ldr r1, [pc, #124] ; (803da20 ) + 803d9a4: 481f ldr r0, [pc, #124] ; (803da24 ) + 803d9a6: f003 f8f5 bl 8040b94 LWIP_ASSERT("tcp_rst: invalid remote_ip", remote_ip != NULL); - 803d926: 6abb ldr r3, [r7, #40] ; 0x28 - 803d928: 2b00 cmp r3, #0 - 803d92a: d106 bne.n 803d93a - 803d92c: 4b1a ldr r3, [pc, #104] ; (803d998 ) - 803d92e: f240 72c5 movw r2, #1989 ; 0x7c5 - 803d932: 491c ldr r1, [pc, #112] ; (803d9a4 ) - 803d934: 481a ldr r0, [pc, #104] ; (803d9a0 ) - 803d936: f003 f8eb bl 8040b10 + 803d9aa: 6abb ldr r3, [r7, #40] ; 0x28 + 803d9ac: 2b00 cmp r3, #0 + 803d9ae: d106 bne.n 803d9be + 803d9b0: 4b1a ldr r3, [pc, #104] ; (803da1c ) + 803d9b2: f240 72c5 movw r2, #1989 ; 0x7c5 + 803d9b6: 491c ldr r1, [pc, #112] ; (803da28 ) + 803d9b8: 481a ldr r0, [pc, #104] ; (803da24 ) + 803d9ba: f003 f8eb bl 8040b94 optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb); - 803d93a: 2300 movs r3, #0 - 803d93c: 75fb strb r3, [r7, #23] + 803d9be: 2300 movs r3, #0 + 803d9c0: 75fb strb r3, [r7, #23] #if LWIP_WND_SCALE wnd = PP_HTONS(((TCP_WND >> TCP_RCV_SCALE) & 0xFFFF)); #else wnd = PP_HTONS(TCP_WND); - 803d93e: f246 0308 movw r3, #24584 ; 0x6008 - 803d942: 82bb strh r3, [r7, #20] + 803d9c2: f246 0308 movw r3, #24584 ; 0x6008 + 803d9c6: 82bb strh r3, [r7, #20] #endif p = tcp_output_alloc_header_common(ackno, optlen, 0, lwip_htonl(seqno), local_port, - 803d944: 7dfb ldrb r3, [r7, #23] - 803d946: b29c uxth r4, r3 - 803d948: 68b8 ldr r0, [r7, #8] - 803d94a: f7f8 fada bl 8035f02 - 803d94e: 4602 mov r2, r0 - 803d950: 8abb ldrh r3, [r7, #20] - 803d952: 9303 str r3, [sp, #12] - 803d954: 2314 movs r3, #20 - 803d956: 9302 str r3, [sp, #8] - 803d958: 8e3b ldrh r3, [r7, #48] ; 0x30 - 803d95a: 9301 str r3, [sp, #4] - 803d95c: 8dbb ldrh r3, [r7, #44] ; 0x2c - 803d95e: 9300 str r3, [sp, #0] - 803d960: 4613 mov r3, r2 - 803d962: 2200 movs r2, #0 - 803d964: 4621 mov r1, r4 - 803d966: 6878 ldr r0, [r7, #4] - 803d968: f7ff fe92 bl 803d690 - 803d96c: 6138 str r0, [r7, #16] + 803d9c8: 7dfb ldrb r3, [r7, #23] + 803d9ca: b29c uxth r4, r3 + 803d9cc: 68b8 ldr r0, [r7, #8] + 803d9ce: f7f8 fada bl 8035f86 + 803d9d2: 4602 mov r2, r0 + 803d9d4: 8abb ldrh r3, [r7, #20] + 803d9d6: 9303 str r3, [sp, #12] + 803d9d8: 2314 movs r3, #20 + 803d9da: 9302 str r3, [sp, #8] + 803d9dc: 8e3b ldrh r3, [r7, #48] ; 0x30 + 803d9de: 9301 str r3, [sp, #4] + 803d9e0: 8dbb ldrh r3, [r7, #44] ; 0x2c + 803d9e2: 9300 str r3, [sp, #0] + 803d9e4: 4613 mov r3, r2 + 803d9e6: 2200 movs r2, #0 + 803d9e8: 4621 mov r1, r4 + 803d9ea: 6878 ldr r0, [r7, #4] + 803d9ec: f7ff fe92 bl 803d714 + 803d9f0: 6138 str r0, [r7, #16] remote_port, TCP_RST | TCP_ACK, wnd); if (p == NULL) { - 803d96e: 693b ldr r3, [r7, #16] - 803d970: 2b00 cmp r3, #0 - 803d972: d00c beq.n 803d98e + 803d9f2: 693b ldr r3, [r7, #16] + 803d9f4: 2b00 cmp r3, #0 + 803d9f6: d00c beq.n 803da12 LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n")); return; } tcp_output_fill_options(pcb, p, 0, optlen); - 803d974: 7dfb ldrb r3, [r7, #23] - 803d976: 2200 movs r2, #0 - 803d978: 6939 ldr r1, [r7, #16] - 803d97a: 68f8 ldr r0, [r7, #12] - 803d97c: f7ff ff38 bl 803d7f0 + 803d9f8: 7dfb ldrb r3, [r7, #23] + 803d9fa: 2200 movs r2, #0 + 803d9fc: 6939 ldr r1, [r7, #16] + 803d9fe: 68f8 ldr r0, [r7, #12] + 803da00: f7ff ff38 bl 803d874 MIB2_STATS_INC(mib2.tcpoutrsts); tcp_output_control_segment(pcb, p, local_ip, remote_ip); - 803d980: 6abb ldr r3, [r7, #40] ; 0x28 - 803d982: 683a ldr r2, [r7, #0] - 803d984: 6939 ldr r1, [r7, #16] - 803d986: 68f8 ldr r0, [r7, #12] - 803d988: f7ff ff72 bl 803d870 - 803d98c: e000 b.n 803d990 + 803da04: 6abb ldr r3, [r7, #40] ; 0x28 + 803da06: 683a ldr r2, [r7, #0] + 803da08: 6939 ldr r1, [r7, #16] + 803da0a: 68f8 ldr r0, [r7, #12] + 803da0c: f7ff ff72 bl 803d8f4 + 803da10: e000 b.n 803da14 return; - 803d98e: bf00 nop + 803da12: bf00 nop LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno)); } - 803d990: 371c adds r7, #28 - 803d992: 46bd mov sp, r7 - 803d994: bd90 pop {r4, r7, pc} - 803d996: bf00 nop - 803d998: 08043980 .word 0x08043980 - 803d99c: 08044104 .word 0x08044104 - 803d9a0: 080439d4 .word 0x080439d4 - 803d9a4: 08044120 .word 0x08044120 + 803da14: 371c adds r7, #28 + 803da16: 46bd mov sp, r7 + 803da18: bd90 pop {r4, r7, pc} + 803da1a: bf00 nop + 803da1c: 08043a00 .word 0x08043a00 + 803da20: 08044184 .word 0x08044184 + 803da24: 08043a54 .word 0x08043a54 + 803da28: 080441a0 .word 0x080441a0 -0803d9a8 : +0803da2c : * * @param pcb Protocol control block for the TCP connection to send the ACK */ err_t tcp_send_empty_ack(struct tcp_pcb *pcb) { - 803d9a8: b590 push {r4, r7, lr} - 803d9aa: b087 sub sp, #28 - 803d9ac: af00 add r7, sp, #0 - 803d9ae: 6078 str r0, [r7, #4] + 803da2c: b590 push {r4, r7, lr} + 803da2e: b087 sub sp, #28 + 803da30: af00 add r7, sp, #0 + 803da32: 6078 str r0, [r7, #4] err_t err; struct pbuf *p; u8_t optlen, optflags = 0; - 803d9b0: 2300 movs r3, #0 - 803d9b2: 75fb strb r3, [r7, #23] + 803da34: 2300 movs r3, #0 + 803da36: 75fb strb r3, [r7, #23] u8_t num_sacks = 0; - 803d9b4: 2300 movs r3, #0 - 803d9b6: 75bb strb r3, [r7, #22] + 803da38: 2300 movs r3, #0 + 803da3a: 75bb strb r3, [r7, #22] LWIP_ASSERT("tcp_send_empty_ack: invalid pcb", pcb != NULL); - 803d9b8: 687b ldr r3, [r7, #4] - 803d9ba: 2b00 cmp r3, #0 - 803d9bc: d106 bne.n 803d9cc - 803d9be: 4b28 ldr r3, [pc, #160] ; (803da60 ) - 803d9c0: f240 72ea movw r2, #2026 ; 0x7ea - 803d9c4: 4927 ldr r1, [pc, #156] ; (803da64 ) - 803d9c6: 4828 ldr r0, [pc, #160] ; (803da68 ) - 803d9c8: f003 f8a2 bl 8040b10 + 803da3c: 687b ldr r3, [r7, #4] + 803da3e: 2b00 cmp r3, #0 + 803da40: d106 bne.n 803da50 + 803da42: 4b28 ldr r3, [pc, #160] ; (803dae4 ) + 803da44: f240 72ea movw r2, #2026 ; 0x7ea + 803da48: 4927 ldr r1, [pc, #156] ; (803dae8 ) + 803da4a: 4828 ldr r0, [pc, #160] ; (803daec ) + 803da4c: f003 f8a2 bl 8040b94 #if LWIP_TCP_TIMESTAMPS if (pcb->flags & TF_TIMESTAMP) { optflags = TF_SEG_OPTS_TS; } #endif optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb); - 803d9cc: 7dfb ldrb r3, [r7, #23] - 803d9ce: 009b lsls r3, r3, #2 - 803d9d0: b2db uxtb r3, r3 - 803d9d2: f003 0304 and.w r3, r3, #4 - 803d9d6: 757b strb r3, [r7, #21] + 803da50: 7dfb ldrb r3, [r7, #23] + 803da52: 009b lsls r3, r3, #2 + 803da54: b2db uxtb r3, r3 + 803da56: f003 0304 and.w r3, r3, #4 + 803da5a: 757b strb r3, [r7, #21] if ((num_sacks = tcp_get_num_sacks(pcb, optlen)) > 0) { optlen += 4 + num_sacks * 8; /* 4 bytes for header (including 2*NOP), plus 8B for each SACK */ } #endif p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt)); - 803d9d8: 7d7b ldrb r3, [r7, #21] - 803d9da: b29c uxth r4, r3 - 803d9dc: 687b ldr r3, [r7, #4] - 803d9de: 6d1b ldr r3, [r3, #80] ; 0x50 - 803d9e0: 4618 mov r0, r3 - 803d9e2: f7f8 fa8e bl 8035f02 - 803d9e6: 4603 mov r3, r0 - 803d9e8: 2200 movs r2, #0 - 803d9ea: 4621 mov r1, r4 - 803d9ec: 6878 ldr r0, [r7, #4] - 803d9ee: f7ff fec1 bl 803d774 - 803d9f2: 6138 str r0, [r7, #16] + 803da5c: 7d7b ldrb r3, [r7, #21] + 803da5e: b29c uxth r4, r3 + 803da60: 687b ldr r3, [r7, #4] + 803da62: 6d1b ldr r3, [r3, #80] ; 0x50 + 803da64: 4618 mov r0, r3 + 803da66: f7f8 fa8e bl 8035f86 + 803da6a: 4603 mov r3, r0 + 803da6c: 2200 movs r2, #0 + 803da6e: 4621 mov r1, r4 + 803da70: 6878 ldr r0, [r7, #4] + 803da72: f7ff fec1 bl 803d7f8 + 803da76: 6138 str r0, [r7, #16] if (p == NULL) { - 803d9f4: 693b ldr r3, [r7, #16] - 803d9f6: 2b00 cmp r3, #0 - 803d9f8: d109 bne.n 803da0e + 803da78: 693b ldr r3, [r7, #16] + 803da7a: 2b00 cmp r3, #0 + 803da7c: d109 bne.n 803da92 /* let tcp_fasttmr retry sending this ACK */ tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 803d9fa: 687b ldr r3, [r7, #4] - 803d9fc: 8b5b ldrh r3, [r3, #26] - 803d9fe: f043 0303 orr.w r3, r3, #3 - 803da02: b29a uxth r2, r3 - 803da04: 687b ldr r3, [r7, #4] - 803da06: 835a strh r2, [r3, #26] + 803da7e: 687b ldr r3, [r7, #4] + 803da80: 8b5b ldrh r3, [r3, #26] + 803da82: f043 0303 orr.w r3, r3, #3 + 803da86: b29a uxth r2, r3 + 803da88: 687b ldr r3, [r7, #4] + 803da8a: 835a strh r2, [r3, #26] LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n")); return ERR_BUF; - 803da08: f06f 0301 mvn.w r3, #1 - 803da0c: e023 b.n 803da56 + 803da8c: f06f 0301 mvn.w r3, #1 + 803da90: e023 b.n 803dada } tcp_output_fill_options(pcb, p, optflags, num_sacks); - 803da0e: 7dbb ldrb r3, [r7, #22] - 803da10: 7dfa ldrb r2, [r7, #23] - 803da12: 6939 ldr r1, [r7, #16] - 803da14: 6878 ldr r0, [r7, #4] - 803da16: f7ff feeb bl 803d7f0 + 803da92: 7dbb ldrb r3, [r7, #22] + 803da94: 7dfa ldrb r2, [r7, #23] + 803da96: 6939 ldr r1, [r7, #16] + 803da98: 6878 ldr r0, [r7, #4] + 803da9a: f7ff feeb bl 803d874 pcb->ts_lastacksent = pcb->rcv_nxt; #endif LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt)); err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip); - 803da1a: 687a ldr r2, [r7, #4] - 803da1c: 687b ldr r3, [r7, #4] - 803da1e: 3304 adds r3, #4 - 803da20: 6939 ldr r1, [r7, #16] - 803da22: 6878 ldr r0, [r7, #4] - 803da24: f7ff ff24 bl 803d870 - 803da28: 4603 mov r3, r0 - 803da2a: 73fb strb r3, [r7, #15] + 803da9e: 687a ldr r2, [r7, #4] + 803daa0: 687b ldr r3, [r7, #4] + 803daa2: 3304 adds r3, #4 + 803daa4: 6939 ldr r1, [r7, #16] + 803daa6: 6878 ldr r0, [r7, #4] + 803daa8: f7ff ff24 bl 803d8f4 + 803daac: 4603 mov r3, r0 + 803daae: 73fb strb r3, [r7, #15] if (err != ERR_OK) { - 803da2c: f997 300f ldrsb.w r3, [r7, #15] - 803da30: 2b00 cmp r3, #0 - 803da32: d007 beq.n 803da44 + 803dab0: f997 300f ldrsb.w r3, [r7, #15] + 803dab4: 2b00 cmp r3, #0 + 803dab6: d007 beq.n 803dac8 /* let tcp_fasttmr retry sending this ACK */ tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 803da34: 687b ldr r3, [r7, #4] - 803da36: 8b5b ldrh r3, [r3, #26] - 803da38: f043 0303 orr.w r3, r3, #3 - 803da3c: b29a uxth r2, r3 - 803da3e: 687b ldr r3, [r7, #4] - 803da40: 835a strh r2, [r3, #26] - 803da42: e006 b.n 803da52 + 803dab8: 687b ldr r3, [r7, #4] + 803daba: 8b5b ldrh r3, [r3, #26] + 803dabc: f043 0303 orr.w r3, r3, #3 + 803dac0: b29a uxth r2, r3 + 803dac2: 687b ldr r3, [r7, #4] + 803dac4: 835a strh r2, [r3, #26] + 803dac6: e006 b.n 803dad6 } else { /* remove ACK flags from the PCB, as we sent an empty ACK now */ tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW); - 803da44: 687b ldr r3, [r7, #4] - 803da46: 8b5b ldrh r3, [r3, #26] - 803da48: f023 0303 bic.w r3, r3, #3 - 803da4c: b29a uxth r2, r3 - 803da4e: 687b ldr r3, [r7, #4] - 803da50: 835a strh r2, [r3, #26] + 803dac8: 687b ldr r3, [r7, #4] + 803daca: 8b5b ldrh r3, [r3, #26] + 803dacc: f023 0303 bic.w r3, r3, #3 + 803dad0: b29a uxth r2, r3 + 803dad2: 687b ldr r3, [r7, #4] + 803dad4: 835a strh r2, [r3, #26] } return err; - 803da52: f997 300f ldrsb.w r3, [r7, #15] -} - 803da56: 4618 mov r0, r3 - 803da58: 371c adds r7, #28 - 803da5a: 46bd mov sp, r7 - 803da5c: bd90 pop {r4, r7, pc} - 803da5e: bf00 nop - 803da60: 08043980 .word 0x08043980 - 803da64: 0804413c .word 0x0804413c - 803da68: 080439d4 .word 0x080439d4 - -0803da6c : + 803dad6: f997 300f ldrsb.w r3, [r7, #15] +} + 803dada: 4618 mov r0, r3 + 803dadc: 371c adds r7, #28 + 803dade: 46bd mov sp, r7 + 803dae0: bd90 pop {r4, r7, pc} + 803dae2: bf00 nop + 803dae4: 08043a00 .word 0x08043a00 + 803dae8: 080441bc .word 0x080441bc + 803daec: 08043a54 .word 0x08043a54 + +0803daf0 : * * @param pcb the tcp_pcb for which to send a keepalive packet */ err_t tcp_keepalive(struct tcp_pcb *pcb) { - 803da6c: b590 push {r4, r7, lr} - 803da6e: b087 sub sp, #28 - 803da70: af00 add r7, sp, #0 - 803da72: 6078 str r0, [r7, #4] + 803daf0: b590 push {r4, r7, lr} + 803daf2: b087 sub sp, #28 + 803daf4: af00 add r7, sp, #0 + 803daf6: 6078 str r0, [r7, #4] err_t err; struct pbuf *p; u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb); - 803da74: 2300 movs r3, #0 - 803da76: 75fb strb r3, [r7, #23] + 803daf8: 2300 movs r3, #0 + 803dafa: 75fb strb r3, [r7, #23] LWIP_ASSERT("tcp_keepalive: invalid pcb", pcb != NULL); - 803da78: 687b ldr r3, [r7, #4] - 803da7a: 2b00 cmp r3, #0 - 803da7c: d106 bne.n 803da8c - 803da7e: 4b18 ldr r3, [pc, #96] ; (803dae0 ) - 803da80: f640 0224 movw r2, #2084 ; 0x824 - 803da84: 4917 ldr r1, [pc, #92] ; (803dae4 ) - 803da86: 4818 ldr r0, [pc, #96] ; (803dae8 ) - 803da88: f003 f842 bl 8040b10 + 803dafc: 687b ldr r3, [r7, #4] + 803dafe: 2b00 cmp r3, #0 + 803db00: d106 bne.n 803db10 + 803db02: 4b18 ldr r3, [pc, #96] ; (803db64 ) + 803db04: f640 0224 movw r2, #2084 ; 0x824 + 803db08: 4917 ldr r1, [pc, #92] ; (803db68 ) + 803db0a: 4818 ldr r0, [pc, #96] ; (803db6c ) + 803db0c: f003 f842 bl 8040b94 LWIP_DEBUGF(TCP_DEBUG, ("\n")); LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F" pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent)); p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt - 1)); - 803da8c: 7dfb ldrb r3, [r7, #23] - 803da8e: b29c uxth r4, r3 - 803da90: 687b ldr r3, [r7, #4] - 803da92: 6d1b ldr r3, [r3, #80] ; 0x50 - 803da94: 3b01 subs r3, #1 - 803da96: 4618 mov r0, r3 - 803da98: f7f8 fa33 bl 8035f02 - 803da9c: 4603 mov r3, r0 - 803da9e: 2200 movs r2, #0 - 803daa0: 4621 mov r1, r4 - 803daa2: 6878 ldr r0, [r7, #4] - 803daa4: f7ff fe66 bl 803d774 - 803daa8: 6138 str r0, [r7, #16] + 803db10: 7dfb ldrb r3, [r7, #23] + 803db12: b29c uxth r4, r3 + 803db14: 687b ldr r3, [r7, #4] + 803db16: 6d1b ldr r3, [r3, #80] ; 0x50 + 803db18: 3b01 subs r3, #1 + 803db1a: 4618 mov r0, r3 + 803db1c: f7f8 fa33 bl 8035f86 + 803db20: 4603 mov r3, r0 + 803db22: 2200 movs r2, #0 + 803db24: 4621 mov r1, r4 + 803db26: 6878 ldr r0, [r7, #4] + 803db28: f7ff fe66 bl 803d7f8 + 803db2c: 6138 str r0, [r7, #16] if (p == NULL) { - 803daaa: 693b ldr r3, [r7, #16] - 803daac: 2b00 cmp r3, #0 - 803daae: d102 bne.n 803dab6 + 803db2e: 693b ldr r3, [r7, #16] + 803db30: 2b00 cmp r3, #0 + 803db32: d102 bne.n 803db3a LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: could not allocate memory for pbuf\n")); return ERR_MEM; - 803dab0: f04f 33ff mov.w r3, #4294967295 - 803dab4: e010 b.n 803dad8 + 803db34: f04f 33ff mov.w r3, #4294967295 + 803db38: e010 b.n 803db5c } tcp_output_fill_options(pcb, p, 0, optlen); - 803dab6: 7dfb ldrb r3, [r7, #23] - 803dab8: 2200 movs r2, #0 - 803daba: 6939 ldr r1, [r7, #16] - 803dabc: 6878 ldr r0, [r7, #4] - 803dabe: f7ff fe97 bl 803d7f0 + 803db3a: 7dfb ldrb r3, [r7, #23] + 803db3c: 2200 movs r2, #0 + 803db3e: 6939 ldr r1, [r7, #16] + 803db40: 6878 ldr r0, [r7, #4] + 803db42: f7ff fe97 bl 803d874 err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip); - 803dac2: 687a ldr r2, [r7, #4] - 803dac4: 687b ldr r3, [r7, #4] - 803dac6: 3304 adds r3, #4 - 803dac8: 6939 ldr r1, [r7, #16] - 803daca: 6878 ldr r0, [r7, #4] - 803dacc: f7ff fed0 bl 803d870 - 803dad0: 4603 mov r3, r0 - 803dad2: 73fb strb r3, [r7, #15] + 803db46: 687a ldr r2, [r7, #4] + 803db48: 687b ldr r3, [r7, #4] + 803db4a: 3304 adds r3, #4 + 803db4c: 6939 ldr r1, [r7, #16] + 803db4e: 6878 ldr r0, [r7, #4] + 803db50: f7ff fed0 bl 803d8f4 + 803db54: 4603 mov r3, r0 + 803db56: 73fb strb r3, [r7, #15] LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F" err %d.\n", pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err)); return err; - 803dad4: f997 300f ldrsb.w r3, [r7, #15] + 803db58: f997 300f ldrsb.w r3, [r7, #15] } - 803dad8: 4618 mov r0, r3 - 803dada: 371c adds r7, #28 - 803dadc: 46bd mov sp, r7 - 803dade: bd90 pop {r4, r7, pc} - 803dae0: 08043980 .word 0x08043980 - 803dae4: 0804415c .word 0x0804415c - 803dae8: 080439d4 .word 0x080439d4 + 803db5c: 4618 mov r0, r3 + 803db5e: 371c adds r7, #28 + 803db60: 46bd mov sp, r7 + 803db62: bd90 pop {r4, r7, pc} + 803db64: 08043a00 .word 0x08043a00 + 803db68: 080441dc .word 0x080441dc + 803db6c: 08043a54 .word 0x08043a54 -0803daec : +0803db70 : * * @param pcb the tcp_pcb for which to send a zero-window probe packet */ err_t tcp_zero_window_probe(struct tcp_pcb *pcb) { - 803daec: b590 push {r4, r7, lr} - 803daee: b08b sub sp, #44 ; 0x2c - 803daf0: af00 add r7, sp, #0 - 803daf2: 6078 str r0, [r7, #4] + 803db70: b590 push {r4, r7, lr} + 803db72: b08b sub sp, #44 ; 0x2c + 803db74: af00 add r7, sp, #0 + 803db76: 6078 str r0, [r7, #4] struct tcp_hdr *tcphdr; struct tcp_seg *seg; u16_t len; u8_t is_fin; u32_t snd_nxt; u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb); - 803daf4: 2300 movs r3, #0 - 803daf6: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803db78: 2300 movs r3, #0 + 803db7a: f887 3027 strb.w r3, [r7, #39] ; 0x27 LWIP_ASSERT("tcp_zero_window_probe: invalid pcb", pcb != NULL); - 803dafa: 687b ldr r3, [r7, #4] - 803dafc: 2b00 cmp r3, #0 - 803dafe: d106 bne.n 803db0e - 803db00: 4b4c ldr r3, [pc, #304] ; (803dc34 ) - 803db02: f640 024f movw r2, #2127 ; 0x84f - 803db06: 494c ldr r1, [pc, #304] ; (803dc38 ) - 803db08: 484c ldr r0, [pc, #304] ; (803dc3c ) - 803db0a: f003 f801 bl 8040b10 + 803db7e: 687b ldr r3, [r7, #4] + 803db80: 2b00 cmp r3, #0 + 803db82: d106 bne.n 803db92 + 803db84: 4b4c ldr r3, [pc, #304] ; (803dcb8 ) + 803db86: f640 024f movw r2, #2127 ; 0x84f + 803db8a: 494c ldr r1, [pc, #304] ; (803dcbc ) + 803db8c: 484c ldr r0, [pc, #304] ; (803dcc0 ) + 803db8e: f003 f801 bl 8040b94 ("tcp_zero_window_probe: tcp_ticks %"U32_F " pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent)); /* Only consider unsent, persist timer should be off when there is data in-flight */ seg = pcb->unsent; - 803db0e: 687b ldr r3, [r7, #4] - 803db10: 6edb ldr r3, [r3, #108] ; 0x6c - 803db12: 623b str r3, [r7, #32] + 803db92: 687b ldr r3, [r7, #4] + 803db94: 6edb ldr r3, [r3, #108] ; 0x6c + 803db96: 623b str r3, [r7, #32] if (seg == NULL) { - 803db14: 6a3b ldr r3, [r7, #32] - 803db16: 2b00 cmp r3, #0 - 803db18: d101 bne.n 803db1e + 803db98: 6a3b ldr r3, [r7, #32] + 803db9a: 2b00 cmp r3, #0 + 803db9c: d101 bne.n 803dba2 /* Not expected, persist timer should be off when the send buffer is empty */ return ERR_OK; - 803db1a: 2300 movs r3, #0 - 803db1c: e086 b.n 803dc2c + 803db9e: 2300 movs r3, #0 + 803dba0: e086 b.n 803dcb0 /* increment probe count. NOTE: we record probe even if it fails to actually transmit due to an error. This ensures memory exhaustion/ routing problem doesn't leave a zero-window pcb as an indefinite zombie. RTO mechanism has similar behavior, see pcb->nrtx */ if (pcb->persist_probe < 0xFF) { - 803db1e: 687b ldr r3, [r7, #4] - 803db20: f893 309a ldrb.w r3, [r3, #154] ; 0x9a - 803db24: 2bff cmp r3, #255 ; 0xff - 803db26: d007 beq.n 803db38 + 803dba2: 687b ldr r3, [r7, #4] + 803dba4: f893 309a ldrb.w r3, [r3, #154] ; 0x9a + 803dba8: 2bff cmp r3, #255 ; 0xff + 803dbaa: d007 beq.n 803dbbc ++pcb->persist_probe; - 803db28: 687b ldr r3, [r7, #4] - 803db2a: f893 309a ldrb.w r3, [r3, #154] ; 0x9a - 803db2e: 3301 adds r3, #1 - 803db30: b2da uxtb r2, r3 - 803db32: 687b ldr r3, [r7, #4] - 803db34: f883 209a strb.w r2, [r3, #154] ; 0x9a + 803dbac: 687b ldr r3, [r7, #4] + 803dbae: f893 309a ldrb.w r3, [r3, #154] ; 0x9a + 803dbb2: 3301 adds r3, #1 + 803dbb4: b2da uxtb r2, r3 + 803dbb6: 687b ldr r3, [r7, #4] + 803dbb8: f883 209a strb.w r2, [r3, #154] ; 0x9a } is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0); - 803db38: 6a3b ldr r3, [r7, #32] - 803db3a: 68db ldr r3, [r3, #12] - 803db3c: 899b ldrh r3, [r3, #12] - 803db3e: b29b uxth r3, r3 - 803db40: 4618 mov r0, r3 - 803db42: f7f8 f9c9 bl 8035ed8 - 803db46: 4603 mov r3, r0 - 803db48: b2db uxtb r3, r3 - 803db4a: f003 0301 and.w r3, r3, #1 - 803db4e: 2b00 cmp r3, #0 - 803db50: d005 beq.n 803db5e - 803db52: 6a3b ldr r3, [r7, #32] - 803db54: 891b ldrh r3, [r3, #8] - 803db56: 2b00 cmp r3, #0 - 803db58: d101 bne.n 803db5e - 803db5a: 2301 movs r3, #1 - 803db5c: e000 b.n 803db60 - 803db5e: 2300 movs r3, #0 - 803db60: 77fb strb r3, [r7, #31] + 803dbbc: 6a3b ldr r3, [r7, #32] + 803dbbe: 68db ldr r3, [r3, #12] + 803dbc0: 899b ldrh r3, [r3, #12] + 803dbc2: b29b uxth r3, r3 + 803dbc4: 4618 mov r0, r3 + 803dbc6: f7f8 f9c9 bl 8035f5c + 803dbca: 4603 mov r3, r0 + 803dbcc: b2db uxtb r3, r3 + 803dbce: f003 0301 and.w r3, r3, #1 + 803dbd2: 2b00 cmp r3, #0 + 803dbd4: d005 beq.n 803dbe2 + 803dbd6: 6a3b ldr r3, [r7, #32] + 803dbd8: 891b ldrh r3, [r3, #8] + 803dbda: 2b00 cmp r3, #0 + 803dbdc: d101 bne.n 803dbe2 + 803dbde: 2301 movs r3, #1 + 803dbe0: e000 b.n 803dbe4 + 803dbe2: 2300 movs r3, #0 + 803dbe4: 77fb strb r3, [r7, #31] /* we want to send one seqno: either FIN or data (no options) */ len = is_fin ? 0 : 1; - 803db62: 7ffb ldrb r3, [r7, #31] - 803db64: 2b00 cmp r3, #0 - 803db66: bf0c ite eq - 803db68: 2301 moveq r3, #1 - 803db6a: 2300 movne r3, #0 - 803db6c: b2db uxtb r3, r3 - 803db6e: 83bb strh r3, [r7, #28] + 803dbe6: 7ffb ldrb r3, [r7, #31] + 803dbe8: 2b00 cmp r3, #0 + 803dbea: bf0c ite eq + 803dbec: 2301 moveq r3, #1 + 803dbee: 2300 movne r3, #0 + 803dbf0: b2db uxtb r3, r3 + 803dbf2: 83bb strh r3, [r7, #28] p = tcp_output_alloc_header(pcb, optlen, len, seg->tcphdr->seqno); - 803db70: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 803db74: b299 uxth r1, r3 - 803db76: 6a3b ldr r3, [r7, #32] - 803db78: 68db ldr r3, [r3, #12] - 803db7a: 685b ldr r3, [r3, #4] - 803db7c: 8bba ldrh r2, [r7, #28] - 803db7e: 6878 ldr r0, [r7, #4] - 803db80: f7ff fdf8 bl 803d774 - 803db84: 61b8 str r0, [r7, #24] + 803dbf4: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 803dbf8: b299 uxth r1, r3 + 803dbfa: 6a3b ldr r3, [r7, #32] + 803dbfc: 68db ldr r3, [r3, #12] + 803dbfe: 685b ldr r3, [r3, #4] + 803dc00: 8bba ldrh r2, [r7, #28] + 803dc02: 6878 ldr r0, [r7, #4] + 803dc04: f7ff fdf8 bl 803d7f8 + 803dc08: 61b8 str r0, [r7, #24] if (p == NULL) { - 803db86: 69bb ldr r3, [r7, #24] - 803db88: 2b00 cmp r3, #0 - 803db8a: d102 bne.n 803db92 + 803dc0a: 69bb ldr r3, [r7, #24] + 803dc0c: 2b00 cmp r3, #0 + 803dc0e: d102 bne.n 803dc16 LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n")); return ERR_MEM; - 803db8c: f04f 33ff mov.w r3, #4294967295 - 803db90: e04c b.n 803dc2c + 803dc10: f04f 33ff mov.w r3, #4294967295 + 803dc14: e04c b.n 803dcb0 } tcphdr = (struct tcp_hdr *)p->payload; - 803db92: 69bb ldr r3, [r7, #24] - 803db94: 685b ldr r3, [r3, #4] - 803db96: 617b str r3, [r7, #20] + 803dc16: 69bb ldr r3, [r7, #24] + 803dc18: 685b ldr r3, [r3, #4] + 803dc1a: 617b str r3, [r7, #20] if (is_fin) { - 803db98: 7ffb ldrb r3, [r7, #31] - 803db9a: 2b00 cmp r3, #0 - 803db9c: d011 beq.n 803dbc2 + 803dc1c: 7ffb ldrb r3, [r7, #31] + 803dc1e: 2b00 cmp r3, #0 + 803dc20: d011 beq.n 803dc46 /* FIN segment, no data */ TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN); - 803db9e: 697b ldr r3, [r7, #20] - 803dba0: 899b ldrh r3, [r3, #12] - 803dba2: b29b uxth r3, r3 - 803dba4: b21b sxth r3, r3 - 803dba6: f423 537c bic.w r3, r3, #16128 ; 0x3f00 - 803dbaa: b21c sxth r4, r3 - 803dbac: 2011 movs r0, #17 - 803dbae: f7f8 f993 bl 8035ed8 - 803dbb2: 4603 mov r3, r0 - 803dbb4: b21b sxth r3, r3 - 803dbb6: 4323 orrs r3, r4 - 803dbb8: b21b sxth r3, r3 - 803dbba: b29a uxth r2, r3 - 803dbbc: 697b ldr r3, [r7, #20] - 803dbbe: 819a strh r2, [r3, #12] - 803dbc0: e010 b.n 803dbe4 + 803dc22: 697b ldr r3, [r7, #20] + 803dc24: 899b ldrh r3, [r3, #12] + 803dc26: b29b uxth r3, r3 + 803dc28: b21b sxth r3, r3 + 803dc2a: f423 537c bic.w r3, r3, #16128 ; 0x3f00 + 803dc2e: b21c sxth r4, r3 + 803dc30: 2011 movs r0, #17 + 803dc32: f7f8 f993 bl 8035f5c + 803dc36: 4603 mov r3, r0 + 803dc38: b21b sxth r3, r3 + 803dc3a: 4323 orrs r3, r4 + 803dc3c: b21b sxth r3, r3 + 803dc3e: b29a uxth r2, r3 + 803dc40: 697b ldr r3, [r7, #20] + 803dc42: 819a strh r2, [r3, #12] + 803dc44: e010 b.n 803dc68 } else { /* Data segment, copy in one byte from the head of the unacked queue */ char *d = ((char *)p->payload + TCP_HLEN); - 803dbc2: 69bb ldr r3, [r7, #24] - 803dbc4: 685b ldr r3, [r3, #4] - 803dbc6: 3314 adds r3, #20 - 803dbc8: 613b str r3, [r7, #16] + 803dc46: 69bb ldr r3, [r7, #24] + 803dc48: 685b ldr r3, [r3, #4] + 803dc4a: 3314 adds r3, #20 + 803dc4c: 613b str r3, [r7, #16] /* Depending on whether the segment has already been sent (unacked) or not (unsent), seg->p->payload points to the IP header or TCP header. Ensure we copy the first TCP data byte: */ pbuf_copy_partial(seg->p, d, 1, seg->p->tot_len - seg->len); - 803dbca: 6a3b ldr r3, [r7, #32] - 803dbcc: 6858 ldr r0, [r3, #4] - 803dbce: 6a3b ldr r3, [r7, #32] - 803dbd0: 685b ldr r3, [r3, #4] - 803dbd2: 891a ldrh r2, [r3, #8] - 803dbd4: 6a3b ldr r3, [r7, #32] - 803dbd6: 891b ldrh r3, [r3, #8] - 803dbd8: 1ad3 subs r3, r2, r3 - 803dbda: b29b uxth r3, r3 - 803dbdc: 2201 movs r2, #1 - 803dbde: 6939 ldr r1, [r7, #16] - 803dbe0: f7f9 ff96 bl 8037b10 + 803dc4e: 6a3b ldr r3, [r7, #32] + 803dc50: 6858 ldr r0, [r3, #4] + 803dc52: 6a3b ldr r3, [r7, #32] + 803dc54: 685b ldr r3, [r3, #4] + 803dc56: 891a ldrh r2, [r3, #8] + 803dc58: 6a3b ldr r3, [r7, #32] + 803dc5a: 891b ldrh r3, [r3, #8] + 803dc5c: 1ad3 subs r3, r2, r3 + 803dc5e: b29b uxth r3, r3 + 803dc60: 2201 movs r2, #1 + 803dc62: 6939 ldr r1, [r7, #16] + 803dc64: f7f9 ff96 bl 8037b94 } /* The byte may be acknowledged without the window being opened. */ snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + 1; - 803dbe4: 6a3b ldr r3, [r7, #32] - 803dbe6: 68db ldr r3, [r3, #12] - 803dbe8: 685b ldr r3, [r3, #4] - 803dbea: 4618 mov r0, r3 - 803dbec: f7f8 f989 bl 8035f02 - 803dbf0: 4603 mov r3, r0 - 803dbf2: 3301 adds r3, #1 - 803dbf4: 60fb str r3, [r7, #12] + 803dc68: 6a3b ldr r3, [r7, #32] + 803dc6a: 68db ldr r3, [r3, #12] + 803dc6c: 685b ldr r3, [r3, #4] + 803dc6e: 4618 mov r0, r3 + 803dc70: f7f8 f989 bl 8035f86 + 803dc74: 4603 mov r3, r0 + 803dc76: 3301 adds r3, #1 + 803dc78: 60fb str r3, [r7, #12] if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) { - 803dbf6: 687b ldr r3, [r7, #4] - 803dbf8: 6d1a ldr r2, [r3, #80] ; 0x50 - 803dbfa: 68fb ldr r3, [r7, #12] - 803dbfc: 1ad3 subs r3, r2, r3 - 803dbfe: 2b00 cmp r3, #0 - 803dc00: da02 bge.n 803dc08 + 803dc7a: 687b ldr r3, [r7, #4] + 803dc7c: 6d1a ldr r2, [r3, #80] ; 0x50 + 803dc7e: 68fb ldr r3, [r7, #12] + 803dc80: 1ad3 subs r3, r2, r3 + 803dc82: 2b00 cmp r3, #0 + 803dc84: da02 bge.n 803dc8c pcb->snd_nxt = snd_nxt; - 803dc02: 687b ldr r3, [r7, #4] - 803dc04: 68fa ldr r2, [r7, #12] - 803dc06: 651a str r2, [r3, #80] ; 0x50 + 803dc86: 687b ldr r3, [r7, #4] + 803dc88: 68fa ldr r2, [r7, #12] + 803dc8a: 651a str r2, [r3, #80] ; 0x50 } tcp_output_fill_options(pcb, p, 0, optlen); - 803dc08: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 - 803dc0c: 2200 movs r2, #0 - 803dc0e: 69b9 ldr r1, [r7, #24] - 803dc10: 6878 ldr r0, [r7, #4] - 803dc12: f7ff fded bl 803d7f0 + 803dc8c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27 + 803dc90: 2200 movs r2, #0 + 803dc92: 69b9 ldr r1, [r7, #24] + 803dc94: 6878 ldr r0, [r7, #4] + 803dc96: f7ff fded bl 803d874 err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip); - 803dc16: 687a ldr r2, [r7, #4] - 803dc18: 687b ldr r3, [r7, #4] - 803dc1a: 3304 adds r3, #4 - 803dc1c: 69b9 ldr r1, [r7, #24] - 803dc1e: 6878 ldr r0, [r7, #4] - 803dc20: f7ff fe26 bl 803d870 - 803dc24: 4603 mov r3, r0 - 803dc26: 72fb strb r3, [r7, #11] + 803dc9a: 687a ldr r2, [r7, #4] + 803dc9c: 687b ldr r3, [r7, #4] + 803dc9e: 3304 adds r3, #4 + 803dca0: 69b9 ldr r1, [r7, #24] + 803dca2: 6878 ldr r0, [r7, #4] + 803dca4: f7ff fe26 bl 803d8f4 + 803dca8: 4603 mov r3, r0 + 803dcaa: 72fb strb r3, [r7, #11] LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F " ackno %"U32_F" err %d.\n", pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err)); return err; - 803dc28: f997 300b ldrsb.w r3, [r7, #11] + 803dcac: f997 300b ldrsb.w r3, [r7, #11] } - 803dc2c: 4618 mov r0, r3 - 803dc2e: 372c adds r7, #44 ; 0x2c - 803dc30: 46bd mov sp, r7 - 803dc32: bd90 pop {r4, r7, pc} - 803dc34: 08043980 .word 0x08043980 - 803dc38: 08044178 .word 0x08044178 - 803dc3c: 080439d4 .word 0x080439d4 + 803dcb0: 4618 mov r0, r3 + 803dcb2: 372c adds r7, #44 ; 0x2c + 803dcb4: 46bd mov sp, r7 + 803dcb6: bd90 pop {r4, r7, pc} + 803dcb8: 08043a00 .word 0x08043a00 + 803dcbc: 080441f8 .word 0x080441f8 + 803dcc0: 08043a54 .word 0x08043a54 -0803dc40 : +0803dcc4 : * * @param arg unused argument */ static void tcpip_tcp_timer(void *arg) { - 803dc40: b580 push {r7, lr} - 803dc42: b082 sub sp, #8 - 803dc44: af00 add r7, sp, #0 - 803dc46: 6078 str r0, [r7, #4] + 803dcc4: b580 push {r7, lr} + 803dcc6: b082 sub sp, #8 + 803dcc8: af00 add r7, sp, #0 + 803dcca: 6078 str r0, [r7, #4] LWIP_UNUSED_ARG(arg); /* call TCP timer handler */ tcp_tmr(); - 803dc48: f7fa f850 bl 8037cec + 803dccc: f7fa f850 bl 8037d70 /* timer still needed? */ if (tcp_active_pcbs || tcp_tw_pcbs) { - 803dc4c: 4b0a ldr r3, [pc, #40] ; (803dc78 ) - 803dc4e: 681b ldr r3, [r3, #0] - 803dc50: 2b00 cmp r3, #0 - 803dc52: d103 bne.n 803dc5c - 803dc54: 4b09 ldr r3, [pc, #36] ; (803dc7c ) - 803dc56: 681b ldr r3, [r3, #0] - 803dc58: 2b00 cmp r3, #0 - 803dc5a: d005 beq.n 803dc68 + 803dcd0: 4b0a ldr r3, [pc, #40] ; (803dcfc ) + 803dcd2: 681b ldr r3, [r3, #0] + 803dcd4: 2b00 cmp r3, #0 + 803dcd6: d103 bne.n 803dce0 + 803dcd8: 4b09 ldr r3, [pc, #36] ; (803dd00 ) + 803dcda: 681b ldr r3, [r3, #0] + 803dcdc: 2b00 cmp r3, #0 + 803dcde: d005 beq.n 803dcec /* restart timer */ sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); - 803dc5c: 2200 movs r2, #0 - 803dc5e: 4908 ldr r1, [pc, #32] ; (803dc80 ) - 803dc60: 20fa movs r0, #250 ; 0xfa - 803dc62: f000 f8f3 bl 803de4c - 803dc66: e003 b.n 803dc70 + 803dce0: 2200 movs r2, #0 + 803dce2: 4908 ldr r1, [pc, #32] ; (803dd04 ) + 803dce4: 20fa movs r0, #250 ; 0xfa + 803dce6: f000 f8f3 bl 803ded0 + 803dcea: e003 b.n 803dcf4 } else { /* disable timer */ tcpip_tcp_timer_active = 0; - 803dc68: 4b06 ldr r3, [pc, #24] ; (803dc84 ) - 803dc6a: 2200 movs r2, #0 - 803dc6c: 601a str r2, [r3, #0] - } -} - 803dc6e: bf00 nop - 803dc70: bf00 nop - 803dc72: 3708 adds r7, #8 - 803dc74: 46bd mov sp, r7 - 803dc76: bd80 pop {r7, pc} - 803dc78: 2400e964 .word 0x2400e964 - 803dc7c: 2400e968 .word 0x2400e968 - 803dc80: 0803dc41 .word 0x0803dc41 - 803dc84: 2400e9b0 .word 0x2400e9b0 - -0803dc88 : + 803dcec: 4b06 ldr r3, [pc, #24] ; (803dd08 ) + 803dcee: 2200 movs r2, #0 + 803dcf0: 601a str r2, [r3, #0] + } +} + 803dcf2: bf00 nop + 803dcf4: bf00 nop + 803dcf6: 3708 adds r7, #8 + 803dcf8: 46bd mov sp, r7 + 803dcfa: bd80 pop {r7, pc} + 803dcfc: 2400e96c .word 0x2400e96c + 803dd00: 2400e970 .word 0x2400e970 + 803dd04: 0803dcc5 .word 0x0803dcc5 + 803dd08: 2400e9b8 .word 0x2400e9b8 + +0803dd0c : * the reason is to have the TCP timer only running when * there are active (or time-wait) PCBs. */ void tcp_timer_needed(void) { - 803dc88: b580 push {r7, lr} - 803dc8a: af00 add r7, sp, #0 + 803dd0c: b580 push {r7, lr} + 803dd0e: af00 add r7, sp, #0 LWIP_ASSERT_CORE_LOCKED(); /* timer is off but needed again? */ if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) { - 803dc8c: 4b0a ldr r3, [pc, #40] ; (803dcb8 ) - 803dc8e: 681b ldr r3, [r3, #0] - 803dc90: 2b00 cmp r3, #0 - 803dc92: d10f bne.n 803dcb4 - 803dc94: 4b09 ldr r3, [pc, #36] ; (803dcbc ) - 803dc96: 681b ldr r3, [r3, #0] - 803dc98: 2b00 cmp r3, #0 - 803dc9a: d103 bne.n 803dca4 - 803dc9c: 4b08 ldr r3, [pc, #32] ; (803dcc0 ) - 803dc9e: 681b ldr r3, [r3, #0] - 803dca0: 2b00 cmp r3, #0 - 803dca2: d007 beq.n 803dcb4 + 803dd10: 4b0a ldr r3, [pc, #40] ; (803dd3c ) + 803dd12: 681b ldr r3, [r3, #0] + 803dd14: 2b00 cmp r3, #0 + 803dd16: d10f bne.n 803dd38 + 803dd18: 4b09 ldr r3, [pc, #36] ; (803dd40 ) + 803dd1a: 681b ldr r3, [r3, #0] + 803dd1c: 2b00 cmp r3, #0 + 803dd1e: d103 bne.n 803dd28 + 803dd20: 4b08 ldr r3, [pc, #32] ; (803dd44 ) + 803dd22: 681b ldr r3, [r3, #0] + 803dd24: 2b00 cmp r3, #0 + 803dd26: d007 beq.n 803dd38 /* enable and start timer */ tcpip_tcp_timer_active = 1; - 803dca4: 4b04 ldr r3, [pc, #16] ; (803dcb8 ) - 803dca6: 2201 movs r2, #1 - 803dca8: 601a str r2, [r3, #0] + 803dd28: 4b04 ldr r3, [pc, #16] ; (803dd3c ) + 803dd2a: 2201 movs r2, #1 + 803dd2c: 601a str r2, [r3, #0] sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); - 803dcaa: 2200 movs r2, #0 - 803dcac: 4905 ldr r1, [pc, #20] ; (803dcc4 ) - 803dcae: 20fa movs r0, #250 ; 0xfa - 803dcb0: f000 f8cc bl 803de4c + 803dd2e: 2200 movs r2, #0 + 803dd30: 4905 ldr r1, [pc, #20] ; (803dd48 ) + 803dd32: 20fa movs r0, #250 ; 0xfa + 803dd34: f000 f8cc bl 803ded0 } } - 803dcb4: bf00 nop - 803dcb6: bd80 pop {r7, pc} - 803dcb8: 2400e9b0 .word 0x2400e9b0 - 803dcbc: 2400e964 .word 0x2400e964 - 803dcc0: 2400e968 .word 0x2400e968 - 803dcc4: 0803dc41 .word 0x0803dc41 + 803dd38: bf00 nop + 803dd3a: bd80 pop {r7, pc} + 803dd3c: 2400e9b8 .word 0x2400e9b8 + 803dd40: 2400e96c .word 0x2400e96c + 803dd44: 2400e970 .word 0x2400e970 + 803dd48: 0803dcc5 .word 0x0803dcc5 -0803dcc8 : +0803dd4c : #if LWIP_DEBUG_TIMERNAMES sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg, const char *handler_name) #else /* LWIP_DEBUG_TIMERNAMES */ sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg) #endif { - 803dcc8: b580 push {r7, lr} - 803dcca: b086 sub sp, #24 - 803dccc: af00 add r7, sp, #0 - 803dcce: 60f8 str r0, [r7, #12] - 803dcd0: 60b9 str r1, [r7, #8] - 803dcd2: 607a str r2, [r7, #4] + 803dd4c: b580 push {r7, lr} + 803dd4e: b086 sub sp, #24 + 803dd50: af00 add r7, sp, #0 + 803dd52: 60f8 str r0, [r7, #12] + 803dd54: 60b9 str r1, [r7, #8] + 803dd56: 607a str r2, [r7, #4] struct sys_timeo *timeout, *t; timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT); - 803dcd4: 2006 movs r0, #6 - 803dcd6: f7f8 fe2f bl 8036938 - 803dcda: 6138 str r0, [r7, #16] + 803dd58: 2006 movs r0, #6 + 803dd5a: f7f8 fe2f bl 80369bc + 803dd5e: 6138 str r0, [r7, #16] if (timeout == NULL) { - 803dcdc: 693b ldr r3, [r7, #16] - 803dcde: 2b00 cmp r3, #0 - 803dce0: d109 bne.n 803dcf6 + 803dd60: 693b ldr r3, [r7, #16] + 803dd62: 2b00 cmp r3, #0 + 803dd64: d109 bne.n 803dd7a LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL); - 803dce2: 693b ldr r3, [r7, #16] - 803dce4: 2b00 cmp r3, #0 - 803dce6: d151 bne.n 803dd8c - 803dce8: 4b2a ldr r3, [pc, #168] ; (803dd94 ) - 803dcea: 22be movs r2, #190 ; 0xbe - 803dcec: 492a ldr r1, [pc, #168] ; (803dd98 ) - 803dcee: 482b ldr r0, [pc, #172] ; (803dd9c ) - 803dcf0: f002 ff0e bl 8040b10 + 803dd66: 693b ldr r3, [r7, #16] + 803dd68: 2b00 cmp r3, #0 + 803dd6a: d151 bne.n 803de10 + 803dd6c: 4b2a ldr r3, [pc, #168] ; (803de18 ) + 803dd6e: 22be movs r2, #190 ; 0xbe + 803dd70: 492a ldr r1, [pc, #168] ; (803de1c ) + 803dd72: 482b ldr r0, [pc, #172] ; (803de20 ) + 803dd74: f002 ff0e bl 8040b94 return; - 803dcf4: e04a b.n 803dd8c + 803dd78: e04a b.n 803de10 } timeout->next = NULL; - 803dcf6: 693b ldr r3, [r7, #16] - 803dcf8: 2200 movs r2, #0 - 803dcfa: 601a str r2, [r3, #0] + 803dd7a: 693b ldr r3, [r7, #16] + 803dd7c: 2200 movs r2, #0 + 803dd7e: 601a str r2, [r3, #0] timeout->h = handler; - 803dcfc: 693b ldr r3, [r7, #16] - 803dcfe: 68ba ldr r2, [r7, #8] - 803dd00: 609a str r2, [r3, #8] + 803dd80: 693b ldr r3, [r7, #16] + 803dd82: 68ba ldr r2, [r7, #8] + 803dd84: 609a str r2, [r3, #8] timeout->arg = arg; - 803dd02: 693b ldr r3, [r7, #16] - 803dd04: 687a ldr r2, [r7, #4] - 803dd06: 60da str r2, [r3, #12] + 803dd86: 693b ldr r3, [r7, #16] + 803dd88: 687a ldr r2, [r7, #4] + 803dd8a: 60da str r2, [r3, #12] timeout->time = abs_time; - 803dd08: 693b ldr r3, [r7, #16] - 803dd0a: 68fa ldr r2, [r7, #12] - 803dd0c: 605a str r2, [r3, #4] + 803dd8c: 693b ldr r3, [r7, #16] + 803dd8e: 68fa ldr r2, [r7, #12] + 803dd90: 605a str r2, [r3, #4] timeout->handler_name = handler_name; LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p abs_time=%"U32_F" handler=%s arg=%p\n", (void *)timeout, abs_time, handler_name, (void *)arg)); #endif /* LWIP_DEBUG_TIMERNAMES */ if (next_timeout == NULL) { - 803dd0e: 4b24 ldr r3, [pc, #144] ; (803dda0 ) - 803dd10: 681b ldr r3, [r3, #0] - 803dd12: 2b00 cmp r3, #0 - 803dd14: d103 bne.n 803dd1e + 803dd92: 4b24 ldr r3, [pc, #144] ; (803de24 ) + 803dd94: 681b ldr r3, [r3, #0] + 803dd96: 2b00 cmp r3, #0 + 803dd98: d103 bne.n 803dda2 next_timeout = timeout; - 803dd16: 4a22 ldr r2, [pc, #136] ; (803dda0 ) - 803dd18: 693b ldr r3, [r7, #16] - 803dd1a: 6013 str r3, [r2, #0] + 803dd9a: 4a22 ldr r2, [pc, #136] ; (803de24 ) + 803dd9c: 693b ldr r3, [r7, #16] + 803dd9e: 6013 str r3, [r2, #0] return; - 803dd1c: e037 b.n 803dd8e + 803dda0: e037 b.n 803de12 } if (TIME_LESS_THAN(timeout->time, next_timeout->time)) { - 803dd1e: 693b ldr r3, [r7, #16] - 803dd20: 685a ldr r2, [r3, #4] - 803dd22: 4b1f ldr r3, [pc, #124] ; (803dda0 ) - 803dd24: 681b ldr r3, [r3, #0] - 803dd26: 685b ldr r3, [r3, #4] - 803dd28: 1ad3 subs r3, r2, r3 - 803dd2a: 0fdb lsrs r3, r3, #31 - 803dd2c: f003 0301 and.w r3, r3, #1 - 803dd30: b2db uxtb r3, r3 - 803dd32: 2b00 cmp r3, #0 - 803dd34: d007 beq.n 803dd46 + 803dda2: 693b ldr r3, [r7, #16] + 803dda4: 685a ldr r2, [r3, #4] + 803dda6: 4b1f ldr r3, [pc, #124] ; (803de24 ) + 803dda8: 681b ldr r3, [r3, #0] + 803ddaa: 685b ldr r3, [r3, #4] + 803ddac: 1ad3 subs r3, r2, r3 + 803ddae: 0fdb lsrs r3, r3, #31 + 803ddb0: f003 0301 and.w r3, r3, #1 + 803ddb4: b2db uxtb r3, r3 + 803ddb6: 2b00 cmp r3, #0 + 803ddb8: d007 beq.n 803ddca timeout->next = next_timeout; - 803dd36: 4b1a ldr r3, [pc, #104] ; (803dda0 ) - 803dd38: 681a ldr r2, [r3, #0] - 803dd3a: 693b ldr r3, [r7, #16] - 803dd3c: 601a str r2, [r3, #0] + 803ddba: 4b1a ldr r3, [pc, #104] ; (803de24 ) + 803ddbc: 681a ldr r2, [r3, #0] + 803ddbe: 693b ldr r3, [r7, #16] + 803ddc0: 601a str r2, [r3, #0] next_timeout = timeout; - 803dd3e: 4a18 ldr r2, [pc, #96] ; (803dda0 ) - 803dd40: 693b ldr r3, [r7, #16] - 803dd42: 6013 str r3, [r2, #0] - 803dd44: e023 b.n 803dd8e + 803ddc2: 4a18 ldr r2, [pc, #96] ; (803de24 ) + 803ddc4: 693b ldr r3, [r7, #16] + 803ddc6: 6013 str r3, [r2, #0] + 803ddc8: e023 b.n 803de12 } else { for (t = next_timeout; t != NULL; t = t->next) { - 803dd46: 4b16 ldr r3, [pc, #88] ; (803dda0 ) - 803dd48: 681b ldr r3, [r3, #0] - 803dd4a: 617b str r3, [r7, #20] - 803dd4c: e01a b.n 803dd84 + 803ddca: 4b16 ldr r3, [pc, #88] ; (803de24 ) + 803ddcc: 681b ldr r3, [r3, #0] + 803ddce: 617b str r3, [r7, #20] + 803ddd0: e01a b.n 803de08 if ((t->next == NULL) || TIME_LESS_THAN(timeout->time, t->next->time)) { - 803dd4e: 697b ldr r3, [r7, #20] - 803dd50: 681b ldr r3, [r3, #0] - 803dd52: 2b00 cmp r3, #0 - 803dd54: d00b beq.n 803dd6e - 803dd56: 693b ldr r3, [r7, #16] - 803dd58: 685a ldr r2, [r3, #4] - 803dd5a: 697b ldr r3, [r7, #20] - 803dd5c: 681b ldr r3, [r3, #0] - 803dd5e: 685b ldr r3, [r3, #4] - 803dd60: 1ad3 subs r3, r2, r3 - 803dd62: 0fdb lsrs r3, r3, #31 - 803dd64: f003 0301 and.w r3, r3, #1 - 803dd68: b2db uxtb r3, r3 - 803dd6a: 2b00 cmp r3, #0 - 803dd6c: d007 beq.n 803dd7e + 803ddd2: 697b ldr r3, [r7, #20] + 803ddd4: 681b ldr r3, [r3, #0] + 803ddd6: 2b00 cmp r3, #0 + 803ddd8: d00b beq.n 803ddf2 + 803ddda: 693b ldr r3, [r7, #16] + 803dddc: 685a ldr r2, [r3, #4] + 803ddde: 697b ldr r3, [r7, #20] + 803dde0: 681b ldr r3, [r3, #0] + 803dde2: 685b ldr r3, [r3, #4] + 803dde4: 1ad3 subs r3, r2, r3 + 803dde6: 0fdb lsrs r3, r3, #31 + 803dde8: f003 0301 and.w r3, r3, #1 + 803ddec: b2db uxtb r3, r3 + 803ddee: 2b00 cmp r3, #0 + 803ddf0: d007 beq.n 803de02 timeout->next = t->next; - 803dd6e: 697b ldr r3, [r7, #20] - 803dd70: 681a ldr r2, [r3, #0] - 803dd72: 693b ldr r3, [r7, #16] - 803dd74: 601a str r2, [r3, #0] + 803ddf2: 697b ldr r3, [r7, #20] + 803ddf4: 681a ldr r2, [r3, #0] + 803ddf6: 693b ldr r3, [r7, #16] + 803ddf8: 601a str r2, [r3, #0] t->next = timeout; - 803dd76: 697b ldr r3, [r7, #20] - 803dd78: 693a ldr r2, [r7, #16] - 803dd7a: 601a str r2, [r3, #0] + 803ddfa: 697b ldr r3, [r7, #20] + 803ddfc: 693a ldr r2, [r7, #16] + 803ddfe: 601a str r2, [r3, #0] break; - 803dd7c: e007 b.n 803dd8e + 803de00: e007 b.n 803de12 for (t = next_timeout; t != NULL; t = t->next) { - 803dd7e: 697b ldr r3, [r7, #20] - 803dd80: 681b ldr r3, [r3, #0] - 803dd82: 617b str r3, [r7, #20] - 803dd84: 697b ldr r3, [r7, #20] - 803dd86: 2b00 cmp r3, #0 - 803dd88: d1e1 bne.n 803dd4e - 803dd8a: e000 b.n 803dd8e + 803de02: 697b ldr r3, [r7, #20] + 803de04: 681b ldr r3, [r3, #0] + 803de06: 617b str r3, [r7, #20] + 803de08: 697b ldr r3, [r7, #20] + 803de0a: 2b00 cmp r3, #0 + 803de0c: d1e1 bne.n 803ddd2 + 803de0e: e000 b.n 803de12 return; - 803dd8c: bf00 nop + 803de10: bf00 nop } } } } - 803dd8e: 3718 adds r7, #24 - 803dd90: 46bd mov sp, r7 - 803dd92: bd80 pop {r7, pc} - 803dd94: 0804419c .word 0x0804419c - 803dd98: 080441d0 .word 0x080441d0 - 803dd9c: 08044210 .word 0x08044210 - 803dda0: 2400e9a8 .word 0x2400e9a8 + 803de12: 3718 adds r7, #24 + 803de14: 46bd mov sp, r7 + 803de16: bd80 pop {r7, pc} + 803de18: 0804421c .word 0x0804421c + 803de1c: 08044250 .word 0x08044250 + 803de20: 08044290 .word 0x08044290 + 803de24: 2400e9b0 .word 0x2400e9b0 -0803dda4 : +0803de28 : #if !LWIP_TESTMODE static #endif void lwip_cyclic_timer(void *arg) { - 803dda4: b580 push {r7, lr} - 803dda6: b086 sub sp, #24 - 803dda8: af00 add r7, sp, #0 - 803ddaa: 6078 str r0, [r7, #4] + 803de28: b580 push {r7, lr} + 803de2a: b086 sub sp, #24 + 803de2c: af00 add r7, sp, #0 + 803de2e: 6078 str r0, [r7, #4] u32_t now; u32_t next_timeout_time; const struct lwip_cyclic_timer *cyclic = (const struct lwip_cyclic_timer *)arg; - 803ddac: 687b ldr r3, [r7, #4] - 803ddae: 617b str r3, [r7, #20] + 803de30: 687b ldr r3, [r7, #4] + 803de32: 617b str r3, [r7, #20] #if LWIP_DEBUG_TIMERNAMES LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: %s()\n", cyclic->handler_name)); #endif cyclic->handler(); - 803ddb0: 697b ldr r3, [r7, #20] - 803ddb2: 685b ldr r3, [r3, #4] - 803ddb4: 4798 blx r3 + 803de34: 697b ldr r3, [r7, #20] + 803de36: 685b ldr r3, [r3, #4] + 803de38: 4798 blx r3 now = sys_now(); - 803ddb6: f7f7 fe61 bl 8035a7c - 803ddba: 6138 str r0, [r7, #16] + 803de3a: f7f7 fe61 bl 8035b00 + 803de3e: 6138 str r0, [r7, #16] next_timeout_time = (u32_t)(current_timeout_due_time + cyclic->interval_ms); /* overflow handled by TIME_LESS_THAN macro */ - 803ddbc: 697b ldr r3, [r7, #20] - 803ddbe: 681a ldr r2, [r3, #0] - 803ddc0: 4b0f ldr r3, [pc, #60] ; (803de00 ) - 803ddc2: 681b ldr r3, [r3, #0] - 803ddc4: 4413 add r3, r2 - 803ddc6: 60fb str r3, [r7, #12] + 803de40: 697b ldr r3, [r7, #20] + 803de42: 681a ldr r2, [r3, #0] + 803de44: 4b0f ldr r3, [pc, #60] ; (803de84 ) + 803de46: 681b ldr r3, [r3, #0] + 803de48: 4413 add r3, r2 + 803de4a: 60fb str r3, [r7, #12] if (TIME_LESS_THAN(next_timeout_time, now)) { - 803ddc8: 68fa ldr r2, [r7, #12] - 803ddca: 693b ldr r3, [r7, #16] - 803ddcc: 1ad3 subs r3, r2, r3 - 803ddce: 0fdb lsrs r3, r3, #31 - 803ddd0: f003 0301 and.w r3, r3, #1 - 803ddd4: b2db uxtb r3, r3 - 803ddd6: 2b00 cmp r3, #0 - 803ddd8: d009 beq.n 803ddee + 803de4c: 68fa ldr r2, [r7, #12] + 803de4e: 693b ldr r3, [r7, #16] + 803de50: 1ad3 subs r3, r2, r3 + 803de52: 0fdb lsrs r3, r3, #31 + 803de54: f003 0301 and.w r3, r3, #1 + 803de58: b2db uxtb r3, r3 + 803de5a: 2b00 cmp r3, #0 + 803de5c: d009 beq.n 803de72 /* timer would immediately expire again -> "overload" -> restart without any correction */ #if LWIP_DEBUG_TIMERNAMES sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg, cyclic->handler_name); #else sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg); - 803ddda: 697b ldr r3, [r7, #20] - 803dddc: 681a ldr r2, [r3, #0] - 803ddde: 693b ldr r3, [r7, #16] - 803dde0: 4413 add r3, r2 - 803dde2: 687a ldr r2, [r7, #4] - 803dde4: 4907 ldr r1, [pc, #28] ; (803de04 ) - 803dde6: 4618 mov r0, r3 - 803dde8: f7ff ff6e bl 803dcc8 + 803de5e: 697b ldr r3, [r7, #20] + 803de60: 681a ldr r2, [r3, #0] + 803de62: 693b ldr r3, [r7, #16] + 803de64: 4413 add r3, r2 + 803de66: 687a ldr r2, [r7, #4] + 803de68: 4907 ldr r1, [pc, #28] ; (803de88 ) + 803de6a: 4618 mov r0, r3 + 803de6c: f7ff ff6e bl 803dd4c sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg, cyclic->handler_name); #else sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg); #endif } } - 803ddec: e004 b.n 803ddf8 + 803de70: e004 b.n 803de7c sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg); - 803ddee: 687a ldr r2, [r7, #4] - 803ddf0: 4904 ldr r1, [pc, #16] ; (803de04 ) - 803ddf2: 68f8 ldr r0, [r7, #12] - 803ddf4: f7ff ff68 bl 803dcc8 + 803de72: 687a ldr r2, [r7, #4] + 803de74: 4904 ldr r1, [pc, #16] ; (803de88 ) + 803de76: 68f8 ldr r0, [r7, #12] + 803de78: f7ff ff68 bl 803dd4c } - 803ddf8: bf00 nop - 803ddfa: 3718 adds r7, #24 - 803ddfc: 46bd mov sp, r7 - 803ddfe: bd80 pop {r7, pc} - 803de00: 2400e9ac .word 0x2400e9ac - 803de04: 0803dda5 .word 0x0803dda5 + 803de7c: bf00 nop + 803de7e: 3718 adds r7, #24 + 803de80: 46bd mov sp, r7 + 803de82: bd80 pop {r7, pc} + 803de84: 2400e9b4 .word 0x2400e9b4 + 803de88: 0803de29 .word 0x0803de29 -0803de08 : +0803de8c : /** Initialize this module */ void sys_timeouts_init(void) { - 803de08: b580 push {r7, lr} - 803de0a: b082 sub sp, #8 - 803de0c: af00 add r7, sp, #0 + 803de8c: b580 push {r7, lr} + 803de8e: b082 sub sp, #8 + 803de90: af00 add r7, sp, #0 size_t i; /* tcp_tmr() at index 0 is started on demand */ for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) { - 803de0e: 2301 movs r3, #1 - 803de10: 607b str r3, [r7, #4] - 803de12: e00e b.n 803de32 + 803de92: 2301 movs r3, #1 + 803de94: 607b str r3, [r7, #4] + 803de96: e00e b.n 803deb6 /* we have to cast via size_t to get rid of const warning (this is OK as cyclic_timer() casts back to const* */ sys_timeout(lwip_cyclic_timers[i].interval_ms, lwip_cyclic_timer, LWIP_CONST_CAST(void *, &lwip_cyclic_timers[i])); - 803de14: 4a0b ldr r2, [pc, #44] ; (803de44 ) - 803de16: 687b ldr r3, [r7, #4] - 803de18: f852 0033 ldr.w r0, [r2, r3, lsl #3] - 803de1c: 687b ldr r3, [r7, #4] - 803de1e: 00db lsls r3, r3, #3 - 803de20: 4a08 ldr r2, [pc, #32] ; (803de44 ) - 803de22: 4413 add r3, r2 - 803de24: 461a mov r2, r3 - 803de26: 4908 ldr r1, [pc, #32] ; (803de48 ) - 803de28: f000 f810 bl 803de4c + 803de98: 4a0b ldr r2, [pc, #44] ; (803dec8 ) + 803de9a: 687b ldr r3, [r7, #4] + 803de9c: f852 0033 ldr.w r0, [r2, r3, lsl #3] + 803dea0: 687b ldr r3, [r7, #4] + 803dea2: 00db lsls r3, r3, #3 + 803dea4: 4a08 ldr r2, [pc, #32] ; (803dec8 ) + 803dea6: 4413 add r3, r2 + 803dea8: 461a mov r2, r3 + 803deaa: 4908 ldr r1, [pc, #32] ; (803decc ) + 803deac: f000 f810 bl 803ded0 for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) { - 803de2c: 687b ldr r3, [r7, #4] - 803de2e: 3301 adds r3, #1 - 803de30: 607b str r3, [r7, #4] - 803de32: 687b ldr r3, [r7, #4] - 803de34: 2b02 cmp r3, #2 - 803de36: d9ed bls.n 803de14 - } -} - 803de38: bf00 nop - 803de3a: bf00 nop - 803de3c: 3708 adds r7, #8 - 803de3e: 46bd mov sp, r7 - 803de40: bd80 pop {r7, pc} - 803de42: bf00 nop - 803de44: 08044de8 .word 0x08044de8 - 803de48: 0803dda5 .word 0x0803dda5 - -0803de4c : + 803deb0: 687b ldr r3, [r7, #4] + 803deb2: 3301 adds r3, #1 + 803deb4: 607b str r3, [r7, #4] + 803deb6: 687b ldr r3, [r7, #4] + 803deb8: 2b02 cmp r3, #2 + 803deba: d9ed bls.n 803de98 + } +} + 803debc: bf00 nop + 803debe: bf00 nop + 803dec0: 3708 adds r7, #8 + 803dec2: 46bd mov sp, r7 + 803dec4: bd80 pop {r7, pc} + 803dec6: bf00 nop + 803dec8: 08044e68 .word 0x08044e68 + 803decc: 0803de29 .word 0x0803de29 + +0803ded0 : sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char *handler_name) #else /* LWIP_DEBUG_TIMERNAMES */ void sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg) #endif /* LWIP_DEBUG_TIMERNAMES */ { - 803de4c: b580 push {r7, lr} - 803de4e: b086 sub sp, #24 - 803de50: af00 add r7, sp, #0 - 803de52: 60f8 str r0, [r7, #12] - 803de54: 60b9 str r1, [r7, #8] - 803de56: 607a str r2, [r7, #4] + 803ded0: b580 push {r7, lr} + 803ded2: b086 sub sp, #24 + 803ded4: af00 add r7, sp, #0 + 803ded6: 60f8 str r0, [r7, #12] + 803ded8: 60b9 str r1, [r7, #8] + 803deda: 607a str r2, [r7, #4] u32_t next_timeout_time; LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("Timeout time too long, max is LWIP_UINT32_MAX/4 msecs", msecs <= (LWIP_UINT32_MAX / 4)); - 803de58: 68fb ldr r3, [r7, #12] - 803de5a: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 - 803de5e: d306 bcc.n 803de6e - 803de60: 4b0a ldr r3, [pc, #40] ; (803de8c ) - 803de62: f240 1229 movw r2, #297 ; 0x129 - 803de66: 490a ldr r1, [pc, #40] ; (803de90 ) - 803de68: 480a ldr r0, [pc, #40] ; (803de94 ) - 803de6a: f002 fe51 bl 8040b10 + 803dedc: 68fb ldr r3, [r7, #12] + 803dede: f1b3 4f80 cmp.w r3, #1073741824 ; 0x40000000 + 803dee2: d306 bcc.n 803def2 + 803dee4: 4b0a ldr r3, [pc, #40] ; (803df10 ) + 803dee6: f240 1229 movw r2, #297 ; 0x129 + 803deea: 490a ldr r1, [pc, #40] ; (803df14 ) + 803deec: 480a ldr r0, [pc, #40] ; (803df18 ) + 803deee: f002 fe51 bl 8040b94 next_timeout_time = (u32_t)(sys_now() + msecs); /* overflow handled by TIME_LESS_THAN macro */ - 803de6e: f7f7 fe05 bl 8035a7c - 803de72: 4602 mov r2, r0 - 803de74: 68fb ldr r3, [r7, #12] - 803de76: 4413 add r3, r2 - 803de78: 617b str r3, [r7, #20] + 803def2: f7f7 fe05 bl 8035b00 + 803def6: 4602 mov r2, r0 + 803def8: 68fb ldr r3, [r7, #12] + 803defa: 4413 add r3, r2 + 803defc: 617b str r3, [r7, #20] #if LWIP_DEBUG_TIMERNAMES sys_timeout_abs(next_timeout_time, handler, arg, handler_name); #else sys_timeout_abs(next_timeout_time, handler, arg); - 803de7a: 687a ldr r2, [r7, #4] - 803de7c: 68b9 ldr r1, [r7, #8] - 803de7e: 6978 ldr r0, [r7, #20] - 803de80: f7ff ff22 bl 803dcc8 + 803defe: 687a ldr r2, [r7, #4] + 803df00: 68b9 ldr r1, [r7, #8] + 803df02: 6978 ldr r0, [r7, #20] + 803df04: f7ff ff22 bl 803dd4c #endif } - 803de84: bf00 nop - 803de86: 3718 adds r7, #24 - 803de88: 46bd mov sp, r7 - 803de8a: bd80 pop {r7, pc} - 803de8c: 0804419c .word 0x0804419c - 803de90: 08044238 .word 0x08044238 - 803de94: 08044210 .word 0x08044210 + 803df08: bf00 nop + 803df0a: 3718 adds r7, #24 + 803df0c: 46bd mov sp, r7 + 803df0e: bd80 pop {r7, pc} + 803df10: 0804421c .word 0x0804421c + 803df14: 080442b8 .word 0x080442b8 + 803df18: 08044290 .word 0x08044290 -0803de98 : +0803df1c : * * Must be called periodically from your main loop. */ void sys_check_timeouts(void) { - 803de98: b580 push {r7, lr} - 803de9a: b084 sub sp, #16 - 803de9c: af00 add r7, sp, #0 + 803df1c: b580 push {r7, lr} + 803df1e: b084 sub sp, #16 + 803df20: af00 add r7, sp, #0 u32_t now; LWIP_ASSERT_CORE_LOCKED(); /* Process only timers expired at the start of the function. */ now = sys_now(); - 803de9e: f7f7 fded bl 8035a7c - 803dea2: 60f8 str r0, [r7, #12] + 803df22: f7f7 fded bl 8035b00 + 803df26: 60f8 str r0, [r7, #12] do { struct sys_timeo *tmptimeout; sys_timeout_handler handler; void *arg; PBUF_CHECK_FREE_OOSEQ(); - 803dea4: 4b1a ldr r3, [pc, #104] ; (803df10 ) - 803dea6: 781b ldrb r3, [r3, #0] - 803dea8: b2db uxtb r3, r3 - 803deaa: 2b00 cmp r3, #0 - 803deac: d001 beq.n 803deb2 - 803deae: f7f9 f90b bl 80370c8 + 803df28: 4b1a ldr r3, [pc, #104] ; (803df94 ) + 803df2a: 781b ldrb r3, [r3, #0] + 803df2c: b2db uxtb r3, r3 + 803df2e: 2b00 cmp r3, #0 + 803df30: d001 beq.n 803df36 + 803df32: f7f9 f90b bl 803714c tmptimeout = next_timeout; - 803deb2: 4b18 ldr r3, [pc, #96] ; (803df14 ) - 803deb4: 681b ldr r3, [r3, #0] - 803deb6: 60bb str r3, [r7, #8] + 803df36: 4b18 ldr r3, [pc, #96] ; (803df98 ) + 803df38: 681b ldr r3, [r3, #0] + 803df3a: 60bb str r3, [r7, #8] if (tmptimeout == NULL) { - 803deb8: 68bb ldr r3, [r7, #8] - 803deba: 2b00 cmp r3, #0 - 803debc: d022 beq.n 803df04 + 803df3c: 68bb ldr r3, [r7, #8] + 803df3e: 2b00 cmp r3, #0 + 803df40: d022 beq.n 803df88 return; } if (TIME_LESS_THAN(now, tmptimeout->time)) { - 803debe: 68bb ldr r3, [r7, #8] - 803dec0: 685b ldr r3, [r3, #4] - 803dec2: 68fa ldr r2, [r7, #12] - 803dec4: 1ad3 subs r3, r2, r3 - 803dec6: 0fdb lsrs r3, r3, #31 - 803dec8: f003 0301 and.w r3, r3, #1 - 803decc: b2db uxtb r3, r3 - 803dece: 2b00 cmp r3, #0 - 803ded0: d11a bne.n 803df08 + 803df42: 68bb ldr r3, [r7, #8] + 803df44: 685b ldr r3, [r3, #4] + 803df46: 68fa ldr r2, [r7, #12] + 803df48: 1ad3 subs r3, r2, r3 + 803df4a: 0fdb lsrs r3, r3, #31 + 803df4c: f003 0301 and.w r3, r3, #1 + 803df50: b2db uxtb r3, r3 + 803df52: 2b00 cmp r3, #0 + 803df54: d11a bne.n 803df8c return; } /* Timeout has expired */ next_timeout = tmptimeout->next; - 803ded2: 68bb ldr r3, [r7, #8] - 803ded4: 681b ldr r3, [r3, #0] - 803ded6: 4a0f ldr r2, [pc, #60] ; (803df14 ) - 803ded8: 6013 str r3, [r2, #0] + 803df56: 68bb ldr r3, [r7, #8] + 803df58: 681b ldr r3, [r3, #0] + 803df5a: 4a0f ldr r2, [pc, #60] ; (803df98 ) + 803df5c: 6013 str r3, [r2, #0] handler = tmptimeout->h; - 803deda: 68bb ldr r3, [r7, #8] - 803dedc: 689b ldr r3, [r3, #8] - 803dede: 607b str r3, [r7, #4] + 803df5e: 68bb ldr r3, [r7, #8] + 803df60: 689b ldr r3, [r3, #8] + 803df62: 607b str r3, [r7, #4] arg = tmptimeout->arg; - 803dee0: 68bb ldr r3, [r7, #8] - 803dee2: 68db ldr r3, [r3, #12] - 803dee4: 603b str r3, [r7, #0] + 803df64: 68bb ldr r3, [r7, #8] + 803df66: 68db ldr r3, [r3, #12] + 803df68: 603b str r3, [r7, #0] current_timeout_due_time = tmptimeout->time; - 803dee6: 68bb ldr r3, [r7, #8] - 803dee8: 685b ldr r3, [r3, #4] - 803deea: 4a0b ldr r2, [pc, #44] ; (803df18 ) - 803deec: 6013 str r3, [r2, #0] + 803df6a: 68bb ldr r3, [r7, #8] + 803df6c: 685b ldr r3, [r3, #4] + 803df6e: 4a0b ldr r2, [pc, #44] ; (803df9c ) + 803df70: 6013 str r3, [r2, #0] if (handler != NULL) { LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s t=%"U32_F" arg=%p\n", tmptimeout->handler_name, sys_now() - tmptimeout->time, arg)); } #endif /* LWIP_DEBUG_TIMERNAMES */ memp_free(MEMP_SYS_TIMEOUT, tmptimeout); - 803deee: 68b9 ldr r1, [r7, #8] - 803def0: 2006 movs r0, #6 - 803def2: f7f8 fd91 bl 8036a18 + 803df72: 68b9 ldr r1, [r7, #8] + 803df74: 2006 movs r0, #6 + 803df76: f7f8 fd91 bl 8036a9c if (handler != NULL) { - 803def6: 687b ldr r3, [r7, #4] - 803def8: 2b00 cmp r3, #0 - 803defa: d0d3 beq.n 803dea4 + 803df7a: 687b ldr r3, [r7, #4] + 803df7c: 2b00 cmp r3, #0 + 803df7e: d0d3 beq.n 803df28 handler(arg); - 803defc: 687b ldr r3, [r7, #4] - 803defe: 6838 ldr r0, [r7, #0] - 803df00: 4798 blx r3 + 803df80: 687b ldr r3, [r7, #4] + 803df82: 6838 ldr r0, [r7, #0] + 803df84: 4798 blx r3 do { - 803df02: e7cf b.n 803dea4 + 803df86: e7cf b.n 803df28 return; - 803df04: bf00 nop - 803df06: e000 b.n 803df0a + 803df88: bf00 nop + 803df8a: e000 b.n 803df8e return; - 803df08: bf00 nop + 803df8c: bf00 nop } LWIP_TCPIP_THREAD_ALIVE(); /* Repeat until all expired timers have been called */ } while (1); } - 803df0a: 3710 adds r7, #16 - 803df0c: 46bd mov sp, r7 - 803df0e: bd80 pop {r7, pc} - 803df10: 2400e955 .word 0x2400e955 - 803df14: 2400e9a8 .word 0x2400e9a8 - 803df18: 2400e9ac .word 0x2400e9ac + 803df8e: 3710 adds r7, #16 + 803df90: 46bd mov sp, r7 + 803df92: bd80 pop {r7, pc} + 803df94: 2400e95d .word 0x2400e95d + 803df98: 2400e9b0 .word 0x2400e9b0 + 803df9c: 2400e9b4 .word 0x2400e9b4 -0803df1c : +0803dfa0 : /** * Initialize this module. */ void udp_init(void) { - 803df1c: b580 push {r7, lr} - 803df1e: af00 add r7, sp, #0 + 803dfa0: b580 push {r7, lr} + 803dfa2: af00 add r7, sp, #0 #ifdef LWIP_RAND udp_port = UDP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND()); - 803df20: f002 fe0e bl 8040b40 - 803df24: 4603 mov r3, r0 - 803df26: b29b uxth r3, r3 - 803df28: f3c3 030d ubfx r3, r3, #0, #14 - 803df2c: b29b uxth r3, r3 - 803df2e: f5a3 4380 sub.w r3, r3, #16384 ; 0x4000 - 803df32: b29a uxth r2, r3 - 803df34: 4b01 ldr r3, [pc, #4] ; (803df3c ) - 803df36: 801a strh r2, [r3, #0] + 803dfa4: f002 fe0e bl 8040bc4 + 803dfa8: 4603 mov r3, r0 + 803dfaa: b29b uxth r3, r3 + 803dfac: f3c3 030d ubfx r3, r3, #0, #14 + 803dfb0: b29b uxth r3, r3 + 803dfb2: f5a3 4380 sub.w r3, r3, #16384 ; 0x4000 + 803dfb6: b29a uxth r2, r3 + 803dfb8: 4b01 ldr r3, [pc, #4] ; (803dfc0 ) + 803dfba: 801a strh r2, [r3, #0] #endif /* LWIP_RAND */ } - 803df38: bf00 nop - 803df3a: bd80 pop {r7, pc} - 803df3c: 24000074 .word 0x24000074 + 803dfbc: bf00 nop + 803dfbe: bd80 pop {r7, pc} + 803dfc0: 24000074 .word 0x24000074 -0803df40 : +0803dfc4 : * @param broadcast 1 if his is an IPv4 broadcast (global or subnet-only), 0 otherwise (only used for IPv4) * @return 1 on match, 0 otherwise */ static u8_t udp_input_local_match(struct udp_pcb *pcb, struct netif *inp, u8_t broadcast) { - 803df40: b580 push {r7, lr} - 803df42: b084 sub sp, #16 - 803df44: af00 add r7, sp, #0 - 803df46: 60f8 str r0, [r7, #12] - 803df48: 60b9 str r1, [r7, #8] - 803df4a: 4613 mov r3, r2 - 803df4c: 71fb strb r3, [r7, #7] + 803dfc4: b580 push {r7, lr} + 803dfc6: b084 sub sp, #16 + 803dfc8: af00 add r7, sp, #0 + 803dfca: 60f8 str r0, [r7, #12] + 803dfcc: 60b9 str r1, [r7, #8] + 803dfce: 4613 mov r3, r2 + 803dfd0: 71fb strb r3, [r7, #7] LWIP_UNUSED_ARG(inp); /* in IPv6 only case */ LWIP_UNUSED_ARG(broadcast); /* in IPv6 only case */ LWIP_ASSERT("udp_input_local_match: invalid pcb", pcb != NULL); - 803df4e: 68fb ldr r3, [r7, #12] - 803df50: 2b00 cmp r3, #0 - 803df52: d105 bne.n 803df60 - 803df54: 4b27 ldr r3, [pc, #156] ; (803dff4 ) - 803df56: 2287 movs r2, #135 ; 0x87 - 803df58: 4927 ldr r1, [pc, #156] ; (803dff8 ) - 803df5a: 4828 ldr r0, [pc, #160] ; (803dffc ) - 803df5c: f002 fdd8 bl 8040b10 + 803dfd2: 68fb ldr r3, [r7, #12] + 803dfd4: 2b00 cmp r3, #0 + 803dfd6: d105 bne.n 803dfe4 + 803dfd8: 4b27 ldr r3, [pc, #156] ; (803e078 ) + 803dfda: 2287 movs r2, #135 ; 0x87 + 803dfdc: 4927 ldr r1, [pc, #156] ; (803e07c ) + 803dfde: 4828 ldr r0, [pc, #160] ; (803e080 ) + 803dfe0: f002 fdd8 bl 8040b94 LWIP_ASSERT("udp_input_local_match: invalid netif", inp != NULL); - 803df60: 68bb ldr r3, [r7, #8] - 803df62: 2b00 cmp r3, #0 - 803df64: d105 bne.n 803df72 - 803df66: 4b23 ldr r3, [pc, #140] ; (803dff4 ) - 803df68: 2288 movs r2, #136 ; 0x88 - 803df6a: 4925 ldr r1, [pc, #148] ; (803e000 ) - 803df6c: 4823 ldr r0, [pc, #140] ; (803dffc ) - 803df6e: f002 fdcf bl 8040b10 + 803dfe4: 68bb ldr r3, [r7, #8] + 803dfe6: 2b00 cmp r3, #0 + 803dfe8: d105 bne.n 803dff6 + 803dfea: 4b23 ldr r3, [pc, #140] ; (803e078 ) + 803dfec: 2288 movs r2, #136 ; 0x88 + 803dfee: 4925 ldr r1, [pc, #148] ; (803e084 ) + 803dff0: 4823 ldr r0, [pc, #140] ; (803e080 ) + 803dff2: f002 fdcf bl 8040b94 /* check if PCB is bound to specific netif */ if ((pcb->netif_idx != NETIF_NO_INDEX) && - 803df72: 68fb ldr r3, [r7, #12] - 803df74: 7a1b ldrb r3, [r3, #8] - 803df76: 2b00 cmp r3, #0 - 803df78: d00b beq.n 803df92 + 803dff6: 68fb ldr r3, [r7, #12] + 803dff8: 7a1b ldrb r3, [r3, #8] + 803dffa: 2b00 cmp r3, #0 + 803dffc: d00b beq.n 803e016 (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) { - 803df7a: 68fb ldr r3, [r7, #12] - 803df7c: 7a1a ldrb r2, [r3, #8] - 803df7e: 4b21 ldr r3, [pc, #132] ; (803e004 ) - 803df80: 685b ldr r3, [r3, #4] - 803df82: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 803df86: 3301 adds r3, #1 - 803df88: b2db uxtb r3, r3 + 803dffe: 68fb ldr r3, [r7, #12] + 803e000: 7a1a ldrb r2, [r3, #8] + 803e002: 4b21 ldr r3, [pc, #132] ; (803e088 ) + 803e004: 685b ldr r3, [r3, #4] + 803e006: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 803e00a: 3301 adds r3, #1 + 803e00c: b2db uxtb r3, r3 if ((pcb->netif_idx != NETIF_NO_INDEX) && - 803df8a: 429a cmp r2, r3 - 803df8c: d001 beq.n 803df92 + 803e00e: 429a cmp r2, r3 + 803e010: d001 beq.n 803e016 return 0; - 803df8e: 2300 movs r3, #0 - 803df90: e02b b.n 803dfea + 803e012: 2300 movs r3, #0 + 803e014: e02b b.n 803e06e /* Only need to check PCB if incoming IP version matches PCB IP version */ if (IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ip_current_dest_addr())) { #if LWIP_IPV4 /* Special case: IPv4 broadcast: all or broadcasts in my subnet * Note: broadcast variable can only be 1 if it is an IPv4 broadcast */ if (broadcast != 0) { - 803df92: 79fb ldrb r3, [r7, #7] - 803df94: 2b00 cmp r3, #0 - 803df96: d018 beq.n 803dfca + 803e016: 79fb ldrb r3, [r7, #7] + 803e018: 2b00 cmp r3, #0 + 803e01a: d018 beq.n 803e04e #if IP_SOF_BROADCAST_RECV if (ip_get_option(pcb, SOF_BROADCAST)) #endif /* IP_SOF_BROADCAST_RECV */ { if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) || - 803df98: 68fb ldr r3, [r7, #12] - 803df9a: 2b00 cmp r3, #0 - 803df9c: d013 beq.n 803dfc6 - 803df9e: 68fb ldr r3, [r7, #12] - 803dfa0: 681b ldr r3, [r3, #0] - 803dfa2: 2b00 cmp r3, #0 - 803dfa4: d00f beq.n 803dfc6 + 803e01c: 68fb ldr r3, [r7, #12] + 803e01e: 2b00 cmp r3, #0 + 803e020: d013 beq.n 803e04a + 803e022: 68fb ldr r3, [r7, #12] + 803e024: 681b ldr r3, [r3, #0] + 803e026: 2b00 cmp r3, #0 + 803e028: d00f beq.n 803e04a ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) || - 803dfa6: 4b17 ldr r3, [pc, #92] ; (803e004 ) - 803dfa8: 695b ldr r3, [r3, #20] + 803e02a: 4b17 ldr r3, [pc, #92] ; (803e088 ) + 803e02c: 695b ldr r3, [r3, #20] if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) || - 803dfaa: f1b3 3fff cmp.w r3, #4294967295 - 803dfae: d00a beq.n 803dfc6 + 803e02e: f1b3 3fff cmp.w r3, #4294967295 + 803e032: d00a beq.n 803e04a ip4_addr_netcmp(ip_2_ip4(&pcb->local_ip), ip4_current_dest_addr(), netif_ip4_netmask(inp))) { - 803dfb0: 68fb ldr r3, [r7, #12] - 803dfb2: 681a ldr r2, [r3, #0] - 803dfb4: 4b13 ldr r3, [pc, #76] ; (803e004 ) - 803dfb6: 695b ldr r3, [r3, #20] - 803dfb8: 405a eors r2, r3 - 803dfba: 68bb ldr r3, [r7, #8] - 803dfbc: 3308 adds r3, #8 - 803dfbe: 681b ldr r3, [r3, #0] - 803dfc0: 4013 ands r3, r2 + 803e034: 68fb ldr r3, [r7, #12] + 803e036: 681a ldr r2, [r3, #0] + 803e038: 4b13 ldr r3, [pc, #76] ; (803e088 ) + 803e03a: 695b ldr r3, [r3, #20] + 803e03c: 405a eors r2, r3 + 803e03e: 68bb ldr r3, [r7, #8] + 803e040: 3308 adds r3, #8 + 803e042: 681b ldr r3, [r3, #0] + 803e044: 4013 ands r3, r2 ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) || - 803dfc2: 2b00 cmp r3, #0 - 803dfc4: d110 bne.n 803dfe8 + 803e046: 2b00 cmp r3, #0 + 803e048: d110 bne.n 803e06c return 1; - 803dfc6: 2301 movs r3, #1 - 803dfc8: e00f b.n 803dfea + 803e04a: 2301 movs r3, #1 + 803e04c: e00f b.n 803e06e } } } else #endif /* LWIP_IPV4 */ /* Handle IPv4 and IPv6: all or exact match */ if (ip_addr_isany(&pcb->local_ip) || ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) { - 803dfca: 68fb ldr r3, [r7, #12] - 803dfcc: 2b00 cmp r3, #0 - 803dfce: d009 beq.n 803dfe4 - 803dfd0: 68fb ldr r3, [r7, #12] - 803dfd2: 681b ldr r3, [r3, #0] - 803dfd4: 2b00 cmp r3, #0 - 803dfd6: d005 beq.n 803dfe4 - 803dfd8: 68fb ldr r3, [r7, #12] - 803dfda: 681a ldr r2, [r3, #0] - 803dfdc: 4b09 ldr r3, [pc, #36] ; (803e004 ) - 803dfde: 695b ldr r3, [r3, #20] - 803dfe0: 429a cmp r2, r3 - 803dfe2: d101 bne.n 803dfe8 + 803e04e: 68fb ldr r3, [r7, #12] + 803e050: 2b00 cmp r3, #0 + 803e052: d009 beq.n 803e068 + 803e054: 68fb ldr r3, [r7, #12] + 803e056: 681b ldr r3, [r3, #0] + 803e058: 2b00 cmp r3, #0 + 803e05a: d005 beq.n 803e068 + 803e05c: 68fb ldr r3, [r7, #12] + 803e05e: 681a ldr r2, [r3, #0] + 803e060: 4b09 ldr r3, [pc, #36] ; (803e088 ) + 803e062: 695b ldr r3, [r3, #20] + 803e064: 429a cmp r2, r3 + 803e066: d101 bne.n 803e06c return 1; - 803dfe4: 2301 movs r3, #1 - 803dfe6: e000 b.n 803dfea + 803e068: 2301 movs r3, #1 + 803e06a: e000 b.n 803e06e } } return 0; - 803dfe8: 2300 movs r3, #0 -} - 803dfea: 4618 mov r0, r3 - 803dfec: 3710 adds r7, #16 - 803dfee: 46bd mov sp, r7 - 803dff0: bd80 pop {r7, pc} - 803dff2: bf00 nop - 803dff4: 08044284 .word 0x08044284 - 803dff8: 080442b4 .word 0x080442b4 - 803dffc: 080442d8 .word 0x080442d8 - 803e000: 08044300 .word 0x08044300 - 803e004: 2400b9bc .word 0x2400b9bc - -0803e008 : + 803e06c: 2300 movs r3, #0 +} + 803e06e: 4618 mov r0, r3 + 803e070: 3710 adds r7, #16 + 803e072: 46bd mov sp, r7 + 803e074: bd80 pop {r7, pc} + 803e076: bf00 nop + 803e078: 08044304 .word 0x08044304 + 803e07c: 08044334 .word 0x08044334 + 803e080: 08044358 .word 0x08044358 + 803e084: 08044380 .word 0x08044380 + 803e088: 2400b9c4 .word 0x2400b9c4 + +0803e08c : * @param inp network interface on which the datagram was received. * */ void udp_input(struct pbuf *p, struct netif *inp) { - 803e008: b590 push {r4, r7, lr} - 803e00a: b08d sub sp, #52 ; 0x34 - 803e00c: af02 add r7, sp, #8 - 803e00e: 6078 str r0, [r7, #4] - 803e010: 6039 str r1, [r7, #0] + 803e08c: b590 push {r4, r7, lr} + 803e08e: b08d sub sp, #52 ; 0x34 + 803e090: af02 add r7, sp, #8 + 803e092: 6078 str r0, [r7, #4] + 803e094: 6039 str r1, [r7, #0] struct udp_hdr *udphdr; struct udp_pcb *pcb, *prev; struct udp_pcb *uncon_pcb; u16_t src, dest; u8_t broadcast; u8_t for_us = 0; - 803e012: 2300 movs r3, #0 - 803e014: 76fb strb r3, [r7, #27] + 803e096: 2300 movs r3, #0 + 803e098: 76fb strb r3, [r7, #27] LWIP_UNUSED_ARG(inp); LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("udp_input: invalid pbuf", p != NULL); - 803e016: 687b ldr r3, [r7, #4] - 803e018: 2b00 cmp r3, #0 - 803e01a: d105 bne.n 803e028 - 803e01c: 4b7c ldr r3, [pc, #496] ; (803e210 ) - 803e01e: 22cf movs r2, #207 ; 0xcf - 803e020: 497c ldr r1, [pc, #496] ; (803e214 ) - 803e022: 487d ldr r0, [pc, #500] ; (803e218 ) - 803e024: f002 fd74 bl 8040b10 + 803e09a: 687b ldr r3, [r7, #4] + 803e09c: 2b00 cmp r3, #0 + 803e09e: d105 bne.n 803e0ac + 803e0a0: 4b7c ldr r3, [pc, #496] ; (803e294 ) + 803e0a2: 22cf movs r2, #207 ; 0xcf + 803e0a4: 497c ldr r1, [pc, #496] ; (803e298 ) + 803e0a6: 487d ldr r0, [pc, #500] ; (803e29c ) + 803e0a8: f002 fd74 bl 8040b94 LWIP_ASSERT("udp_input: invalid netif", inp != NULL); - 803e028: 683b ldr r3, [r7, #0] - 803e02a: 2b00 cmp r3, #0 - 803e02c: d105 bne.n 803e03a - 803e02e: 4b78 ldr r3, [pc, #480] ; (803e210 ) - 803e030: 22d0 movs r2, #208 ; 0xd0 - 803e032: 497a ldr r1, [pc, #488] ; (803e21c ) - 803e034: 4878 ldr r0, [pc, #480] ; (803e218 ) - 803e036: f002 fd6b bl 8040b10 + 803e0ac: 683b ldr r3, [r7, #0] + 803e0ae: 2b00 cmp r3, #0 + 803e0b0: d105 bne.n 803e0be + 803e0b2: 4b78 ldr r3, [pc, #480] ; (803e294 ) + 803e0b4: 22d0 movs r2, #208 ; 0xd0 + 803e0b6: 497a ldr r1, [pc, #488] ; (803e2a0 ) + 803e0b8: 4878 ldr r0, [pc, #480] ; (803e29c ) + 803e0ba: f002 fd6b bl 8040b94 PERF_START; UDP_STATS_INC(udp.recv); /* Check minimum length (UDP header) */ if (p->len < UDP_HLEN) { - 803e03a: 687b ldr r3, [r7, #4] - 803e03c: 895b ldrh r3, [r3, #10] - 803e03e: 2b07 cmp r3, #7 - 803e040: d803 bhi.n 803e04a + 803e0be: 687b ldr r3, [r7, #4] + 803e0c0: 895b ldrh r3, [r3, #10] + 803e0c2: 2b07 cmp r3, #7 + 803e0c4: d803 bhi.n 803e0ce LWIP_DEBUGF(UDP_DEBUG, ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len)); UDP_STATS_INC(udp.lenerr); UDP_STATS_INC(udp.drop); MIB2_STATS_INC(mib2.udpinerrors); pbuf_free(p); - 803e042: 6878 ldr r0, [r7, #4] - 803e044: f7f9 fb7a bl 803773c + 803e0c6: 6878 ldr r0, [r7, #4] + 803e0c8: f7f9 fb7a bl 80377c0 goto end; - 803e048: e0de b.n 803e208 + 803e0cc: e0de b.n 803e28c } udphdr = (struct udp_hdr *)p->payload; - 803e04a: 687b ldr r3, [r7, #4] - 803e04c: 685b ldr r3, [r3, #4] - 803e04e: 617b str r3, [r7, #20] + 803e0ce: 687b ldr r3, [r7, #4] + 803e0d0: 685b ldr r3, [r3, #4] + 803e0d2: 617b str r3, [r7, #20] /* is broadcast packet ? */ broadcast = ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()); - 803e050: 4b73 ldr r3, [pc, #460] ; (803e220 ) - 803e052: 695b ldr r3, [r3, #20] - 803e054: 4a72 ldr r2, [pc, #456] ; (803e220 ) - 803e056: 6812 ldr r2, [r2, #0] - 803e058: 4611 mov r1, r2 - 803e05a: 4618 mov r0, r3 - 803e05c: f001 fcae bl 803f9bc - 803e060: 4603 mov r3, r0 - 803e062: 74fb strb r3, [r7, #19] + 803e0d4: 4b73 ldr r3, [pc, #460] ; (803e2a4 ) + 803e0d6: 695b ldr r3, [r3, #20] + 803e0d8: 4a72 ldr r2, [pc, #456] ; (803e2a4 ) + 803e0da: 6812 ldr r2, [r2, #0] + 803e0dc: 4611 mov r1, r2 + 803e0de: 4618 mov r0, r3 + 803e0e0: f001 fcae bl 803fa40 + 803e0e4: 4603 mov r3, r0 + 803e0e6: 74fb strb r3, [r7, #19] LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len)); /* convert src and dest ports to host byte order */ src = lwip_ntohs(udphdr->src); - 803e064: 697b ldr r3, [r7, #20] - 803e066: 881b ldrh r3, [r3, #0] - 803e068: b29b uxth r3, r3 - 803e06a: 4618 mov r0, r3 - 803e06c: f7f7 ff34 bl 8035ed8 - 803e070: 4603 mov r3, r0 - 803e072: 823b strh r3, [r7, #16] + 803e0e8: 697b ldr r3, [r7, #20] + 803e0ea: 881b ldrh r3, [r3, #0] + 803e0ec: b29b uxth r3, r3 + 803e0ee: 4618 mov r0, r3 + 803e0f0: f7f7 ff34 bl 8035f5c + 803e0f4: 4603 mov r3, r0 + 803e0f6: 823b strh r3, [r7, #16] dest = lwip_ntohs(udphdr->dest); - 803e074: 697b ldr r3, [r7, #20] - 803e076: 885b ldrh r3, [r3, #2] - 803e078: b29b uxth r3, r3 - 803e07a: 4618 mov r0, r3 - 803e07c: f7f7 ff2c bl 8035ed8 - 803e080: 4603 mov r3, r0 - 803e082: 81fb strh r3, [r7, #14] + 803e0f8: 697b ldr r3, [r7, #20] + 803e0fa: 885b ldrh r3, [r3, #2] + 803e0fc: b29b uxth r3, r3 + 803e0fe: 4618 mov r0, r3 + 803e100: f7f7 ff2c bl 8035f5c + 803e104: 4603 mov r3, r0 + 803e106: 81fb strh r3, [r7, #14] ip_addr_debug_print_val(UDP_DEBUG, *ip_current_dest_addr()); LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", lwip_ntohs(udphdr->dest))); ip_addr_debug_print_val(UDP_DEBUG, *ip_current_src_addr()); LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", lwip_ntohs(udphdr->src))); pcb = NULL; - 803e084: 2300 movs r3, #0 - 803e086: 627b str r3, [r7, #36] ; 0x24 + 803e108: 2300 movs r3, #0 + 803e10a: 627b str r3, [r7, #36] ; 0x24 prev = NULL; - 803e088: 2300 movs r3, #0 - 803e08a: 623b str r3, [r7, #32] + 803e10c: 2300 movs r3, #0 + 803e10e: 623b str r3, [r7, #32] uncon_pcb = NULL; - 803e08c: 2300 movs r3, #0 - 803e08e: 61fb str r3, [r7, #28] + 803e110: 2300 movs r3, #0 + 803e112: 61fb str r3, [r7, #28] /* Iterate through the UDP pcb list for a matching pcb. * 'Perfect match' pcbs (connected to the remote port & ip address) are * preferred. If no perfect match is found, the first unconnected pcb that * matches the local port and ip address gets the datagram. */ for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { - 803e090: 4b64 ldr r3, [pc, #400] ; (803e224 ) - 803e092: 681b ldr r3, [r3, #0] - 803e094: 627b str r3, [r7, #36] ; 0x24 - 803e096: e054 b.n 803e142 + 803e114: 4b64 ldr r3, [pc, #400] ; (803e2a8 ) + 803e116: 681b ldr r3, [r3, #0] + 803e118: 627b str r3, [r7, #36] ; 0x24 + 803e11a: e054 b.n 803e1c6 LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", pcb->local_port)); ip_addr_debug_print_val(UDP_DEBUG, pcb->remote_ip); LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", pcb->remote_port)); /* compare PCB local addr+port to UDP destination addr+port */ if ((pcb->local_port == dest) && - 803e098: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e09a: 8a5b ldrh r3, [r3, #18] - 803e09c: 89fa ldrh r2, [r7, #14] - 803e09e: 429a cmp r2, r3 - 803e0a0: d14a bne.n 803e138 + 803e11c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e11e: 8a5b ldrh r3, [r3, #18] + 803e120: 89fa ldrh r2, [r7, #14] + 803e122: 429a cmp r2, r3 + 803e124: d14a bne.n 803e1bc (udp_input_local_match(pcb, inp, broadcast) != 0)) { - 803e0a2: 7cfb ldrb r3, [r7, #19] - 803e0a4: 461a mov r2, r3 - 803e0a6: 6839 ldr r1, [r7, #0] - 803e0a8: 6a78 ldr r0, [r7, #36] ; 0x24 - 803e0aa: f7ff ff49 bl 803df40 - 803e0ae: 4603 mov r3, r0 + 803e126: 7cfb ldrb r3, [r7, #19] + 803e128: 461a mov r2, r3 + 803e12a: 6839 ldr r1, [r7, #0] + 803e12c: 6a78 ldr r0, [r7, #36] ; 0x24 + 803e12e: f7ff ff49 bl 803dfc4 + 803e132: 4603 mov r3, r0 if ((pcb->local_port == dest) && - 803e0b0: 2b00 cmp r3, #0 - 803e0b2: d041 beq.n 803e138 + 803e134: 2b00 cmp r3, #0 + 803e136: d041 beq.n 803e1bc if ((pcb->flags & UDP_FLAGS_CONNECTED) == 0) { - 803e0b4: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0b6: 7c1b ldrb r3, [r3, #16] - 803e0b8: f003 0304 and.w r3, r3, #4 - 803e0bc: 2b00 cmp r3, #0 - 803e0be: d11d bne.n 803e0fc + 803e138: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e13a: 7c1b ldrb r3, [r3, #16] + 803e13c: f003 0304 and.w r3, r3, #4 + 803e140: 2b00 cmp r3, #0 + 803e142: d11d bne.n 803e180 if (uncon_pcb == NULL) { - 803e0c0: 69fb ldr r3, [r7, #28] - 803e0c2: 2b00 cmp r3, #0 - 803e0c4: d102 bne.n 803e0cc + 803e144: 69fb ldr r3, [r7, #28] + 803e146: 2b00 cmp r3, #0 + 803e148: d102 bne.n 803e150 /* the first unconnected matching PCB */ uncon_pcb = pcb; - 803e0c6: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0c8: 61fb str r3, [r7, #28] - 803e0ca: e017 b.n 803e0fc + 803e14a: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e14c: 61fb str r3, [r7, #28] + 803e14e: e017 b.n 803e180 #if LWIP_IPV4 } else if (broadcast && ip4_current_dest_addr()->addr == IPADDR_BROADCAST) { - 803e0cc: 7cfb ldrb r3, [r7, #19] - 803e0ce: 2b00 cmp r3, #0 - 803e0d0: d014 beq.n 803e0fc - 803e0d2: 4b53 ldr r3, [pc, #332] ; (803e220 ) - 803e0d4: 695b ldr r3, [r3, #20] - 803e0d6: f1b3 3fff cmp.w r3, #4294967295 - 803e0da: d10f bne.n 803e0fc + 803e150: 7cfb ldrb r3, [r7, #19] + 803e152: 2b00 cmp r3, #0 + 803e154: d014 beq.n 803e180 + 803e156: 4b53 ldr r3, [pc, #332] ; (803e2a4 ) + 803e158: 695b ldr r3, [r3, #20] + 803e15a: f1b3 3fff cmp.w r3, #4294967295 + 803e15e: d10f bne.n 803e180 /* global broadcast address (only valid for IPv4; match was checked before) */ if (!IP_IS_V4_VAL(uncon_pcb->local_ip) || !ip4_addr_cmp(ip_2_ip4(&uncon_pcb->local_ip), netif_ip4_addr(inp))) { - 803e0dc: 69fb ldr r3, [r7, #28] - 803e0de: 681a ldr r2, [r3, #0] - 803e0e0: 683b ldr r3, [r7, #0] - 803e0e2: 3304 adds r3, #4 - 803e0e4: 681b ldr r3, [r3, #0] - 803e0e6: 429a cmp r2, r3 - 803e0e8: d008 beq.n 803e0fc + 803e160: 69fb ldr r3, [r7, #28] + 803e162: 681a ldr r2, [r3, #0] + 803e164: 683b ldr r3, [r7, #0] + 803e166: 3304 adds r3, #4 + 803e168: 681b ldr r3, [r3, #0] + 803e16a: 429a cmp r2, r3 + 803e16c: d008 beq.n 803e180 /* uncon_pcb does not match the input netif, check this pcb */ if (IP_IS_V4_VAL(pcb->local_ip) && ip4_addr_cmp(ip_2_ip4(&pcb->local_ip), netif_ip4_addr(inp))) { - 803e0ea: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0ec: 681a ldr r2, [r3, #0] - 803e0ee: 683b ldr r3, [r7, #0] - 803e0f0: 3304 adds r3, #4 - 803e0f2: 681b ldr r3, [r3, #0] - 803e0f4: 429a cmp r2, r3 - 803e0f6: d101 bne.n 803e0fc + 803e16e: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e170: 681a ldr r2, [r3, #0] + 803e172: 683b ldr r3, [r7, #0] + 803e174: 3304 adds r3, #4 + 803e176: 681b ldr r3, [r3, #0] + 803e178: 429a cmp r2, r3 + 803e17a: d101 bne.n 803e180 /* better match */ uncon_pcb = pcb; - 803e0f8: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0fa: 61fb str r3, [r7, #28] + 803e17c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e17e: 61fb str r3, [r7, #28] } #endif /* SO_REUSE */ } /* compare PCB remote addr+port to UDP source addr+port */ if ((pcb->remote_port == src) && - 803e0fc: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e0fe: 8a9b ldrh r3, [r3, #20] - 803e100: 8a3a ldrh r2, [r7, #16] - 803e102: 429a cmp r2, r3 - 803e104: d118 bne.n 803e138 + 803e180: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e182: 8a9b ldrh r3, [r3, #20] + 803e184: 8a3a ldrh r2, [r7, #16] + 803e186: 429a cmp r2, r3 + 803e188: d118 bne.n 803e1bc (ip_addr_isany_val(pcb->remote_ip) || - 803e106: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e108: 685b ldr r3, [r3, #4] + 803e18a: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e18c: 685b ldr r3, [r3, #4] if ((pcb->remote_port == src) && - 803e10a: 2b00 cmp r3, #0 - 803e10c: d005 beq.n 803e11a + 803e18e: 2b00 cmp r3, #0 + 803e190: d005 beq.n 803e19e ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()))) { - 803e10e: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e110: 685a ldr r2, [r3, #4] - 803e112: 4b43 ldr r3, [pc, #268] ; (803e220 ) - 803e114: 691b ldr r3, [r3, #16] + 803e192: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e194: 685a ldr r2, [r3, #4] + 803e196: 4b43 ldr r3, [pc, #268] ; (803e2a4 ) + 803e198: 691b ldr r3, [r3, #16] (ip_addr_isany_val(pcb->remote_ip) || - 803e116: 429a cmp r2, r3 - 803e118: d10e bne.n 803e138 + 803e19a: 429a cmp r2, r3 + 803e19c: d10e bne.n 803e1bc /* the first fully matching PCB */ if (prev != NULL) { - 803e11a: 6a3b ldr r3, [r7, #32] - 803e11c: 2b00 cmp r3, #0 - 803e11e: d014 beq.n 803e14a + 803e19e: 6a3b ldr r3, [r7, #32] + 803e1a0: 2b00 cmp r3, #0 + 803e1a2: d014 beq.n 803e1ce /* move the pcb to the front of udp_pcbs so that is found faster next time */ prev->next = pcb->next; - 803e120: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e122: 68da ldr r2, [r3, #12] - 803e124: 6a3b ldr r3, [r7, #32] - 803e126: 60da str r2, [r3, #12] + 803e1a4: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1a6: 68da ldr r2, [r3, #12] + 803e1a8: 6a3b ldr r3, [r7, #32] + 803e1aa: 60da str r2, [r3, #12] pcb->next = udp_pcbs; - 803e128: 4b3e ldr r3, [pc, #248] ; (803e224 ) - 803e12a: 681a ldr r2, [r3, #0] - 803e12c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e12e: 60da str r2, [r3, #12] + 803e1ac: 4b3e ldr r3, [pc, #248] ; (803e2a8 ) + 803e1ae: 681a ldr r2, [r3, #0] + 803e1b0: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1b2: 60da str r2, [r3, #12] udp_pcbs = pcb; - 803e130: 4a3c ldr r2, [pc, #240] ; (803e224 ) - 803e132: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e134: 6013 str r3, [r2, #0] + 803e1b4: 4a3c ldr r2, [pc, #240] ; (803e2a8 ) + 803e1b6: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1b8: 6013 str r3, [r2, #0] } else { UDP_STATS_INC(udp.cachehit); } break; - 803e136: e008 b.n 803e14a + 803e1ba: e008 b.n 803e1ce } } prev = pcb; - 803e138: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e13a: 623b str r3, [r7, #32] + 803e1bc: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1be: 623b str r3, [r7, #32] for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { - 803e13c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e13e: 68db ldr r3, [r3, #12] - 803e140: 627b str r3, [r7, #36] ; 0x24 - 803e142: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e144: 2b00 cmp r3, #0 - 803e146: d1a7 bne.n 803e098 - 803e148: e000 b.n 803e14c + 803e1c0: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1c2: 68db ldr r3, [r3, #12] + 803e1c4: 627b str r3, [r7, #36] ; 0x24 + 803e1c6: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1c8: 2b00 cmp r3, #0 + 803e1ca: d1a7 bne.n 803e11c + 803e1cc: e000 b.n 803e1d0 break; - 803e14a: bf00 nop + 803e1ce: bf00 nop } /* no fully matching pcb found? then look for an unconnected pcb */ if (pcb == NULL) { - 803e14c: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e14e: 2b00 cmp r3, #0 - 803e150: d101 bne.n 803e156 + 803e1d0: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1d2: 2b00 cmp r3, #0 + 803e1d4: d101 bne.n 803e1da pcb = uncon_pcb; - 803e152: 69fb ldr r3, [r7, #28] - 803e154: 627b str r3, [r7, #36] ; 0x24 + 803e1d6: 69fb ldr r3, [r7, #28] + 803e1d8: 627b str r3, [r7, #36] ; 0x24 } /* Check checksum if this is a match or if it was directed at us. */ if (pcb != NULL) { - 803e156: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e158: 2b00 cmp r3, #0 - 803e15a: d002 beq.n 803e162 + 803e1da: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e1dc: 2b00 cmp r3, #0 + 803e1de: d002 beq.n 803e1e6 for_us = 1; - 803e15c: 2301 movs r3, #1 - 803e15e: 76fb strb r3, [r7, #27] - 803e160: e00a b.n 803e178 + 803e1e0: 2301 movs r3, #1 + 803e1e2: 76fb strb r3, [r7, #27] + 803e1e4: e00a b.n 803e1fc for_us = netif_get_ip6_addr_match(inp, ip6_current_dest_addr()) >= 0; } #endif /* LWIP_IPV6 */ #if LWIP_IPV4 if (!ip_current_is_v6()) { for_us = ip4_addr_cmp(netif_ip4_addr(inp), ip4_current_dest_addr()); - 803e162: 683b ldr r3, [r7, #0] - 803e164: 3304 adds r3, #4 - 803e166: 681a ldr r2, [r3, #0] - 803e168: 4b2d ldr r3, [pc, #180] ; (803e220 ) - 803e16a: 695b ldr r3, [r3, #20] - 803e16c: 429a cmp r2, r3 - 803e16e: bf0c ite eq - 803e170: 2301 moveq r3, #1 - 803e172: 2300 movne r3, #0 - 803e174: b2db uxtb r3, r3 - 803e176: 76fb strb r3, [r7, #27] + 803e1e6: 683b ldr r3, [r7, #0] + 803e1e8: 3304 adds r3, #4 + 803e1ea: 681a ldr r2, [r3, #0] + 803e1ec: 4b2d ldr r3, [pc, #180] ; (803e2a4 ) + 803e1ee: 695b ldr r3, [r3, #20] + 803e1f0: 429a cmp r2, r3 + 803e1f2: bf0c ite eq + 803e1f4: 2301 moveq r3, #1 + 803e1f6: 2300 movne r3, #0 + 803e1f8: b2db uxtb r3, r3 + 803e1fa: 76fb strb r3, [r7, #27] } #endif /* LWIP_IPV4 */ } if (for_us) { - 803e178: 7efb ldrb r3, [r7, #27] - 803e17a: 2b00 cmp r3, #0 - 803e17c: d041 beq.n 803e202 + 803e1fc: 7efb ldrb r3, [r7, #27] + 803e1fe: 2b00 cmp r3, #0 + 803e200: d041 beq.n 803e286 } } } } #endif /* CHECKSUM_CHECK_UDP */ if (pbuf_remove_header(p, UDP_HLEN)) { - 803e17e: 2108 movs r1, #8 - 803e180: 6878 ldr r0, [r7, #4] - 803e182: f7f9 fa55 bl 8037630 - 803e186: 4603 mov r3, r0 - 803e188: 2b00 cmp r3, #0 - 803e18a: d00a beq.n 803e1a2 + 803e202: 2108 movs r1, #8 + 803e204: 6878 ldr r0, [r7, #4] + 803e206: f7f9 fa55 bl 80376b4 + 803e20a: 4603 mov r3, r0 + 803e20c: 2b00 cmp r3, #0 + 803e20e: d00a beq.n 803e226 /* Can we cope with this failing? Just assert for now */ LWIP_ASSERT("pbuf_remove_header failed\n", 0); - 803e18c: 4b20 ldr r3, [pc, #128] ; (803e210 ) - 803e18e: f44f 72b8 mov.w r2, #368 ; 0x170 - 803e192: 4925 ldr r1, [pc, #148] ; (803e228 ) - 803e194: 4820 ldr r0, [pc, #128] ; (803e218 ) - 803e196: f002 fcbb bl 8040b10 + 803e210: 4b20 ldr r3, [pc, #128] ; (803e294 ) + 803e212: f44f 72b8 mov.w r2, #368 ; 0x170 + 803e216: 4925 ldr r1, [pc, #148] ; (803e2ac ) + 803e218: 4820 ldr r0, [pc, #128] ; (803e29c ) + 803e21a: f002 fcbb bl 8040b94 UDP_STATS_INC(udp.drop); MIB2_STATS_INC(mib2.udpinerrors); pbuf_free(p); - 803e19a: 6878 ldr r0, [r7, #4] - 803e19c: f7f9 face bl 803773c + 803e21e: 6878 ldr r0, [r7, #4] + 803e220: f7f9 face bl 80377c0 goto end; - 803e1a0: e032 b.n 803e208 + 803e224: e032 b.n 803e28c } if (pcb != NULL) { - 803e1a2: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e1a4: 2b00 cmp r3, #0 - 803e1a6: d012 beq.n 803e1ce + 803e226: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e228: 2b00 cmp r3, #0 + 803e22a: d012 beq.n 803e252 } } } #endif /* SO_REUSE && SO_REUSE_RXTOALL */ /* callback */ if (pcb->recv != NULL) { - 803e1a8: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e1aa: 699b ldr r3, [r3, #24] - 803e1ac: 2b00 cmp r3, #0 - 803e1ae: d00a beq.n 803e1c6 + 803e22c: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e22e: 699b ldr r3, [r3, #24] + 803e230: 2b00 cmp r3, #0 + 803e232: d00a beq.n 803e24a /* now the recv function is responsible for freeing p */ pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src); - 803e1b0: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e1b2: 699c ldr r4, [r3, #24] - 803e1b4: 6a7b ldr r3, [r7, #36] ; 0x24 - 803e1b6: 69d8 ldr r0, [r3, #28] - 803e1b8: 8a3b ldrh r3, [r7, #16] - 803e1ba: 9300 str r3, [sp, #0] - 803e1bc: 4b1b ldr r3, [pc, #108] ; (803e22c ) - 803e1be: 687a ldr r2, [r7, #4] - 803e1c0: 6a79 ldr r1, [r7, #36] ; 0x24 - 803e1c2: 47a0 blx r4 + 803e234: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e236: 699c ldr r4, [r3, #24] + 803e238: 6a7b ldr r3, [r7, #36] ; 0x24 + 803e23a: 69d8 ldr r0, [r3, #28] + 803e23c: 8a3b ldrh r3, [r7, #16] + 803e23e: 9300 str r3, [sp, #0] + 803e240: 4b1b ldr r3, [pc, #108] ; (803e2b0 ) + 803e242: 687a ldr r2, [r7, #4] + 803e244: 6a79 ldr r1, [r7, #36] ; 0x24 + 803e246: 47a0 blx r4 } else { pbuf_free(p); } end: PERF_STOP("udp_input"); return; - 803e1c4: e021 b.n 803e20a + 803e248: e021 b.n 803e28e pbuf_free(p); - 803e1c6: 6878 ldr r0, [r7, #4] - 803e1c8: f7f9 fab8 bl 803773c + 803e24a: 6878 ldr r0, [r7, #4] + 803e24c: f7f9 fab8 bl 80377c0 goto end; - 803e1cc: e01c b.n 803e208 + 803e250: e01c b.n 803e28c if (!broadcast && !ip_addr_ismulticast(ip_current_dest_addr())) { - 803e1ce: 7cfb ldrb r3, [r7, #19] - 803e1d0: 2b00 cmp r3, #0 - 803e1d2: d112 bne.n 803e1fa - 803e1d4: 4b12 ldr r3, [pc, #72] ; (803e220 ) - 803e1d6: 695b ldr r3, [r3, #20] - 803e1d8: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 803e1dc: 2be0 cmp r3, #224 ; 0xe0 - 803e1de: d00c beq.n 803e1fa + 803e252: 7cfb ldrb r3, [r7, #19] + 803e254: 2b00 cmp r3, #0 + 803e256: d112 bne.n 803e27e + 803e258: 4b12 ldr r3, [pc, #72] ; (803e2a4 ) + 803e25a: 695b ldr r3, [r3, #20] + 803e25c: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803e260: 2be0 cmp r3, #224 ; 0xe0 + 803e262: d00c beq.n 803e27e pbuf_header_force(p, (s16_t)(ip_current_header_tot_len() + UDP_HLEN)); - 803e1e0: 4b0f ldr r3, [pc, #60] ; (803e220 ) - 803e1e2: 899b ldrh r3, [r3, #12] - 803e1e4: 3308 adds r3, #8 - 803e1e6: b29b uxth r3, r3 - 803e1e8: b21b sxth r3, r3 - 803e1ea: 4619 mov r1, r3 - 803e1ec: 6878 ldr r0, [r7, #4] - 803e1ee: f7f9 fa92 bl 8037716 + 803e264: 4b0f ldr r3, [pc, #60] ; (803e2a4 ) + 803e266: 899b ldrh r3, [r3, #12] + 803e268: 3308 adds r3, #8 + 803e26a: b29b uxth r3, r3 + 803e26c: b21b sxth r3, r3 + 803e26e: 4619 mov r1, r3 + 803e270: 6878 ldr r0, [r7, #4] + 803e272: f7f9 fa92 bl 803779a icmp_port_unreach(ip_current_is_v6(), p); - 803e1f2: 2103 movs r1, #3 - 803e1f4: 6878 ldr r0, [r7, #4] - 803e1f6: f001 f8b7 bl 803f368 + 803e276: 2103 movs r1, #3 + 803e278: 6878 ldr r0, [r7, #4] + 803e27a: f001 f8b7 bl 803f3ec pbuf_free(p); - 803e1fa: 6878 ldr r0, [r7, #4] - 803e1fc: f7f9 fa9e bl 803773c + 803e27e: 6878 ldr r0, [r7, #4] + 803e280: f7f9 fa9e bl 80377c0 return; - 803e200: e003 b.n 803e20a + 803e284: e003 b.n 803e28e pbuf_free(p); - 803e202: 6878 ldr r0, [r7, #4] - 803e204: f7f9 fa9a bl 803773c + 803e286: 6878 ldr r0, [r7, #4] + 803e288: f7f9 fa9a bl 80377c0 return; - 803e208: bf00 nop + 803e28c: bf00 nop UDP_STATS_INC(udp.drop); MIB2_STATS_INC(mib2.udpinerrors); pbuf_free(p); PERF_STOP("udp_input"); #endif /* CHECKSUM_CHECK_UDP */ } - 803e20a: 372c adds r7, #44 ; 0x2c - 803e20c: 46bd mov sp, r7 - 803e20e: bd90 pop {r4, r7, pc} - 803e210: 08044284 .word 0x08044284 - 803e214: 08044328 .word 0x08044328 - 803e218: 080442d8 .word 0x080442d8 - 803e21c: 08044340 .word 0x08044340 - 803e220: 2400b9bc .word 0x2400b9bc - 803e224: 2400e9b4 .word 0x2400e9b4 - 803e228: 0804435c .word 0x0804435c - 803e22c: 2400b9cc .word 0x2400b9cc - -0803e230 : + 803e28e: 372c adds r7, #44 ; 0x2c + 803e290: 46bd mov sp, r7 + 803e292: bd90 pop {r4, r7, pc} + 803e294: 08044304 .word 0x08044304 + 803e298: 080443a8 .word 0x080443a8 + 803e29c: 08044358 .word 0x08044358 + 803e2a0: 080443c0 .word 0x080443c0 + 803e2a4: 2400b9c4 .word 0x2400b9c4 + 803e2a8: 2400e9bc .word 0x2400e9bc + 803e2ac: 080443dc .word 0x080443dc + 803e2b0: 2400b9d4 .word 0x2400b9d4 + +0803e2b4 : * * @param old_addr IP address of the netif before change * @param new_addr IP address of the netif after change */ void udp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr) { - 803e230: b480 push {r7} - 803e232: b085 sub sp, #20 - 803e234: af00 add r7, sp, #0 - 803e236: 6078 str r0, [r7, #4] - 803e238: 6039 str r1, [r7, #0] + 803e2b4: b480 push {r7} + 803e2b6: b085 sub sp, #20 + 803e2b8: af00 add r7, sp, #0 + 803e2ba: 6078 str r0, [r7, #4] + 803e2bc: 6039 str r1, [r7, #0] struct udp_pcb *upcb; if (!ip_addr_isany(old_addr) && !ip_addr_isany(new_addr)) { - 803e23a: 687b ldr r3, [r7, #4] - 803e23c: 2b00 cmp r3, #0 - 803e23e: d01e beq.n 803e27e - 803e240: 687b ldr r3, [r7, #4] - 803e242: 681b ldr r3, [r3, #0] - 803e244: 2b00 cmp r3, #0 - 803e246: d01a beq.n 803e27e - 803e248: 683b ldr r3, [r7, #0] - 803e24a: 2b00 cmp r3, #0 - 803e24c: d017 beq.n 803e27e - 803e24e: 683b ldr r3, [r7, #0] - 803e250: 681b ldr r3, [r3, #0] - 803e252: 2b00 cmp r3, #0 - 803e254: d013 beq.n 803e27e + 803e2be: 687b ldr r3, [r7, #4] + 803e2c0: 2b00 cmp r3, #0 + 803e2c2: d01e beq.n 803e302 + 803e2c4: 687b ldr r3, [r7, #4] + 803e2c6: 681b ldr r3, [r3, #0] + 803e2c8: 2b00 cmp r3, #0 + 803e2ca: d01a beq.n 803e302 + 803e2cc: 683b ldr r3, [r7, #0] + 803e2ce: 2b00 cmp r3, #0 + 803e2d0: d017 beq.n 803e302 + 803e2d2: 683b ldr r3, [r7, #0] + 803e2d4: 681b ldr r3, [r3, #0] + 803e2d6: 2b00 cmp r3, #0 + 803e2d8: d013 beq.n 803e302 for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) { - 803e256: 4b0d ldr r3, [pc, #52] ; (803e28c ) - 803e258: 681b ldr r3, [r3, #0] - 803e25a: 60fb str r3, [r7, #12] - 803e25c: e00c b.n 803e278 + 803e2da: 4b0d ldr r3, [pc, #52] ; (803e310 ) + 803e2dc: 681b ldr r3, [r3, #0] + 803e2de: 60fb str r3, [r7, #12] + 803e2e0: e00c b.n 803e2fc /* PCB bound to current local interface address? */ if (ip_addr_cmp(&upcb->local_ip, old_addr)) { - 803e25e: 68fb ldr r3, [r7, #12] - 803e260: 681a ldr r2, [r3, #0] - 803e262: 687b ldr r3, [r7, #4] - 803e264: 681b ldr r3, [r3, #0] - 803e266: 429a cmp r2, r3 - 803e268: d103 bne.n 803e272 + 803e2e2: 68fb ldr r3, [r7, #12] + 803e2e4: 681a ldr r2, [r3, #0] + 803e2e6: 687b ldr r3, [r7, #4] + 803e2e8: 681b ldr r3, [r3, #0] + 803e2ea: 429a cmp r2, r3 + 803e2ec: d103 bne.n 803e2f6 /* The PCB is bound to the old ipaddr and * is set to bound to the new one instead */ ip_addr_copy(upcb->local_ip, *new_addr); - 803e26a: 683b ldr r3, [r7, #0] - 803e26c: 681a ldr r2, [r3, #0] - 803e26e: 68fb ldr r3, [r7, #12] - 803e270: 601a str r2, [r3, #0] + 803e2ee: 683b ldr r3, [r7, #0] + 803e2f0: 681a ldr r2, [r3, #0] + 803e2f2: 68fb ldr r3, [r7, #12] + 803e2f4: 601a str r2, [r3, #0] for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) { - 803e272: 68fb ldr r3, [r7, #12] - 803e274: 68db ldr r3, [r3, #12] - 803e276: 60fb str r3, [r7, #12] - 803e278: 68fb ldr r3, [r7, #12] - 803e27a: 2b00 cmp r3, #0 - 803e27c: d1ef bne.n 803e25e + 803e2f6: 68fb ldr r3, [r7, #12] + 803e2f8: 68db ldr r3, [r3, #12] + 803e2fa: 60fb str r3, [r7, #12] + 803e2fc: 68fb ldr r3, [r7, #12] + 803e2fe: 2b00 cmp r3, #0 + 803e300: d1ef bne.n 803e2e2 } } } } - 803e27e: bf00 nop - 803e280: 3714 adds r7, #20 - 803e282: 46bd mov sp, r7 - 803e284: f85d 7b04 ldr.w r7, [sp], #4 - 803e288: 4770 bx lr - 803e28a: bf00 nop - 803e28c: 2400e9b4 .word 0x2400e9b4 + 803e302: bf00 nop + 803e304: 3714 adds r7, #20 + 803e306: 46bd mov sp, r7 + 803e308: f85d 7b04 ldr.w r7, [sp], #4 + 803e30c: 4770 bx lr + 803e30e: bf00 nop + 803e310: 2400e9bc .word 0x2400e9bc -0803e290 : +0803e314 : #endif /* ARP_QUEUEING */ /** Clean up ARP table entries */ static void etharp_free_entry(int i) { - 803e290: b580 push {r7, lr} - 803e292: b082 sub sp, #8 - 803e294: af00 add r7, sp, #0 - 803e296: 6078 str r0, [r7, #4] + 803e314: b580 push {r7, lr} + 803e316: b082 sub sp, #8 + 803e318: af00 add r7, sp, #0 + 803e31a: 6078 str r0, [r7, #4] /* remove from SNMP ARP index tree */ mib2_remove_arp_entry(arp_table[i].netif, &arp_table[i].ipaddr); /* and empty packet queue */ if (arp_table[i].q != NULL) { - 803e298: 4915 ldr r1, [pc, #84] ; (803e2f0 ) - 803e29a: 687a ldr r2, [r7, #4] - 803e29c: 4613 mov r3, r2 - 803e29e: 005b lsls r3, r3, #1 - 803e2a0: 4413 add r3, r2 - 803e2a2: 00db lsls r3, r3, #3 - 803e2a4: 440b add r3, r1 - 803e2a6: 681b ldr r3, [r3, #0] - 803e2a8: 2b00 cmp r3, #0 - 803e2aa: d013 beq.n 803e2d4 + 803e31c: 4915 ldr r1, [pc, #84] ; (803e374 ) + 803e31e: 687a ldr r2, [r7, #4] + 803e320: 4613 mov r3, r2 + 803e322: 005b lsls r3, r3, #1 + 803e324: 4413 add r3, r2 + 803e326: 00db lsls r3, r3, #3 + 803e328: 440b add r3, r1 + 803e32a: 681b ldr r3, [r3, #0] + 803e32c: 2b00 cmp r3, #0 + 803e32e: d013 beq.n 803e358 /* remove all queued packets */ LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_free_entry: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q))); free_etharp_q(arp_table[i].q); - 803e2ac: 4910 ldr r1, [pc, #64] ; (803e2f0 ) - 803e2ae: 687a ldr r2, [r7, #4] - 803e2b0: 4613 mov r3, r2 - 803e2b2: 005b lsls r3, r3, #1 - 803e2b4: 4413 add r3, r2 - 803e2b6: 00db lsls r3, r3, #3 - 803e2b8: 440b add r3, r1 - 803e2ba: 681b ldr r3, [r3, #0] - 803e2bc: 4618 mov r0, r3 - 803e2be: f7f9 fa3d bl 803773c + 803e330: 4910 ldr r1, [pc, #64] ; (803e374 ) + 803e332: 687a ldr r2, [r7, #4] + 803e334: 4613 mov r3, r2 + 803e336: 005b lsls r3, r3, #1 + 803e338: 4413 add r3, r2 + 803e33a: 00db lsls r3, r3, #3 + 803e33c: 440b add r3, r1 + 803e33e: 681b ldr r3, [r3, #0] + 803e340: 4618 mov r0, r3 + 803e342: f7f9 fa3d bl 80377c0 arp_table[i].q = NULL; - 803e2c2: 490b ldr r1, [pc, #44] ; (803e2f0 ) - 803e2c4: 687a ldr r2, [r7, #4] - 803e2c6: 4613 mov r3, r2 - 803e2c8: 005b lsls r3, r3, #1 - 803e2ca: 4413 add r3, r2 - 803e2cc: 00db lsls r3, r3, #3 - 803e2ce: 440b add r3, r1 - 803e2d0: 2200 movs r2, #0 - 803e2d2: 601a str r2, [r3, #0] + 803e346: 490b ldr r1, [pc, #44] ; (803e374 ) + 803e348: 687a ldr r2, [r7, #4] + 803e34a: 4613 mov r3, r2 + 803e34c: 005b lsls r3, r3, #1 + 803e34e: 4413 add r3, r2 + 803e350: 00db lsls r3, r3, #3 + 803e352: 440b add r3, r1 + 803e354: 2200 movs r2, #0 + 803e356: 601a str r2, [r3, #0] } /* recycle entry for re-use */ arp_table[i].state = ETHARP_STATE_EMPTY; - 803e2d4: 4906 ldr r1, [pc, #24] ; (803e2f0 ) - 803e2d6: 687a ldr r2, [r7, #4] - 803e2d8: 4613 mov r3, r2 - 803e2da: 005b lsls r3, r3, #1 - 803e2dc: 4413 add r3, r2 - 803e2de: 00db lsls r3, r3, #3 - 803e2e0: 440b add r3, r1 - 803e2e2: 3314 adds r3, #20 - 803e2e4: 2200 movs r2, #0 - 803e2e6: 701a strb r2, [r3, #0] + 803e358: 4906 ldr r1, [pc, #24] ; (803e374 ) + 803e35a: 687a ldr r2, [r7, #4] + 803e35c: 4613 mov r3, r2 + 803e35e: 005b lsls r3, r3, #1 + 803e360: 4413 add r3, r2 + 803e362: 00db lsls r3, r3, #3 + 803e364: 440b add r3, r1 + 803e366: 3314 adds r3, #20 + 803e368: 2200 movs r2, #0 + 803e36a: 701a strb r2, [r3, #0] arp_table[i].ctime = 0; arp_table[i].netif = NULL; ip4_addr_set_zero(&arp_table[i].ipaddr); arp_table[i].ethaddr = ethzero; #endif /* LWIP_DEBUG */ } - 803e2e8: bf00 nop - 803e2ea: 3708 adds r7, #8 - 803e2ec: 46bd mov sp, r7 - 803e2ee: bd80 pop {r7, pc} - 803e2f0: 2400e9b8 .word 0x2400e9b8 + 803e36c: bf00 nop + 803e36e: 3708 adds r7, #8 + 803e370: 46bd mov sp, r7 + 803e372: bd80 pop {r7, pc} + 803e374: 2400e9c0 .word 0x2400e9c0 -0803e2f4 : +0803e378 : * This function should be called every ARP_TMR_INTERVAL milliseconds (1 second), * in order to expire entries in the ARP table. */ void etharp_tmr(void) { - 803e2f4: b580 push {r7, lr} - 803e2f6: b082 sub sp, #8 - 803e2f8: af00 add r7, sp, #0 + 803e378: b580 push {r7, lr} + 803e37a: b082 sub sp, #8 + 803e37c: af00 add r7, sp, #0 int i; LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n")); /* remove expired entries from the ARP table */ for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e2fa: 2300 movs r3, #0 - 803e2fc: 607b str r3, [r7, #4] - 803e2fe: e096 b.n 803e42e + 803e37e: 2300 movs r3, #0 + 803e380: 607b str r3, [r7, #4] + 803e382: e096 b.n 803e4b2 u8_t state = arp_table[i].state; - 803e300: 494f ldr r1, [pc, #316] ; (803e440 ) - 803e302: 687a ldr r2, [r7, #4] - 803e304: 4613 mov r3, r2 - 803e306: 005b lsls r3, r3, #1 - 803e308: 4413 add r3, r2 - 803e30a: 00db lsls r3, r3, #3 - 803e30c: 440b add r3, r1 - 803e30e: 3314 adds r3, #20 - 803e310: 781b ldrb r3, [r3, #0] - 803e312: 70fb strb r3, [r7, #3] + 803e384: 494f ldr r1, [pc, #316] ; (803e4c4 ) + 803e386: 687a ldr r2, [r7, #4] + 803e388: 4613 mov r3, r2 + 803e38a: 005b lsls r3, r3, #1 + 803e38c: 4413 add r3, r2 + 803e38e: 00db lsls r3, r3, #3 + 803e390: 440b add r3, r1 + 803e392: 3314 adds r3, #20 + 803e394: 781b ldrb r3, [r3, #0] + 803e396: 70fb strb r3, [r7, #3] if (state != ETHARP_STATE_EMPTY - 803e314: 78fb ldrb r3, [r7, #3] - 803e316: 2b00 cmp r3, #0 - 803e318: f000 8086 beq.w 803e428 + 803e398: 78fb ldrb r3, [r7, #3] + 803e39a: 2b00 cmp r3, #0 + 803e39c: f000 8086 beq.w 803e4ac #if ETHARP_SUPPORT_STATIC_ENTRIES && (state != ETHARP_STATE_STATIC) #endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ ) { arp_table[i].ctime++; - 803e31c: 4948 ldr r1, [pc, #288] ; (803e440 ) - 803e31e: 687a ldr r2, [r7, #4] - 803e320: 4613 mov r3, r2 - 803e322: 005b lsls r3, r3, #1 - 803e324: 4413 add r3, r2 - 803e326: 00db lsls r3, r3, #3 - 803e328: 440b add r3, r1 - 803e32a: 3312 adds r3, #18 - 803e32c: 881b ldrh r3, [r3, #0] - 803e32e: 3301 adds r3, #1 - 803e330: b298 uxth r0, r3 - 803e332: 4943 ldr r1, [pc, #268] ; (803e440 ) - 803e334: 687a ldr r2, [r7, #4] - 803e336: 4613 mov r3, r2 - 803e338: 005b lsls r3, r3, #1 - 803e33a: 4413 add r3, r2 - 803e33c: 00db lsls r3, r3, #3 - 803e33e: 440b add r3, r1 - 803e340: 3312 adds r3, #18 - 803e342: 4602 mov r2, r0 - 803e344: 801a strh r2, [r3, #0] + 803e3a0: 4948 ldr r1, [pc, #288] ; (803e4c4 ) + 803e3a2: 687a ldr r2, [r7, #4] + 803e3a4: 4613 mov r3, r2 + 803e3a6: 005b lsls r3, r3, #1 + 803e3a8: 4413 add r3, r2 + 803e3aa: 00db lsls r3, r3, #3 + 803e3ac: 440b add r3, r1 + 803e3ae: 3312 adds r3, #18 + 803e3b0: 881b ldrh r3, [r3, #0] + 803e3b2: 3301 adds r3, #1 + 803e3b4: b298 uxth r0, r3 + 803e3b6: 4943 ldr r1, [pc, #268] ; (803e4c4 ) + 803e3b8: 687a ldr r2, [r7, #4] + 803e3ba: 4613 mov r3, r2 + 803e3bc: 005b lsls r3, r3, #1 + 803e3be: 4413 add r3, r2 + 803e3c0: 00db lsls r3, r3, #3 + 803e3c2: 440b add r3, r1 + 803e3c4: 3312 adds r3, #18 + 803e3c6: 4602 mov r2, r0 + 803e3c8: 801a strh r2, [r3, #0] if ((arp_table[i].ctime >= ARP_MAXAGE) || - 803e346: 493e ldr r1, [pc, #248] ; (803e440 ) - 803e348: 687a ldr r2, [r7, #4] - 803e34a: 4613 mov r3, r2 - 803e34c: 005b lsls r3, r3, #1 - 803e34e: 4413 add r3, r2 - 803e350: 00db lsls r3, r3, #3 - 803e352: 440b add r3, r1 - 803e354: 3312 adds r3, #18 - 803e356: 881b ldrh r3, [r3, #0] - 803e358: f5b3 7f96 cmp.w r3, #300 ; 0x12c - 803e35c: d215 bcs.n 803e38a + 803e3ca: 493e ldr r1, [pc, #248] ; (803e4c4 ) + 803e3cc: 687a ldr r2, [r7, #4] + 803e3ce: 4613 mov r3, r2 + 803e3d0: 005b lsls r3, r3, #1 + 803e3d2: 4413 add r3, r2 + 803e3d4: 00db lsls r3, r3, #3 + 803e3d6: 440b add r3, r1 + 803e3d8: 3312 adds r3, #18 + 803e3da: 881b ldrh r3, [r3, #0] + 803e3dc: f5b3 7f96 cmp.w r3, #300 ; 0x12c + 803e3e0: d215 bcs.n 803e40e ((arp_table[i].state == ETHARP_STATE_PENDING) && - 803e35e: 4938 ldr r1, [pc, #224] ; (803e440 ) - 803e360: 687a ldr r2, [r7, #4] - 803e362: 4613 mov r3, r2 - 803e364: 005b lsls r3, r3, #1 - 803e366: 4413 add r3, r2 - 803e368: 00db lsls r3, r3, #3 - 803e36a: 440b add r3, r1 - 803e36c: 3314 adds r3, #20 - 803e36e: 781b ldrb r3, [r3, #0] + 803e3e2: 4938 ldr r1, [pc, #224] ; (803e4c4 ) + 803e3e4: 687a ldr r2, [r7, #4] + 803e3e6: 4613 mov r3, r2 + 803e3e8: 005b lsls r3, r3, #1 + 803e3ea: 4413 add r3, r2 + 803e3ec: 00db lsls r3, r3, #3 + 803e3ee: 440b add r3, r1 + 803e3f0: 3314 adds r3, #20 + 803e3f2: 781b ldrb r3, [r3, #0] if ((arp_table[i].ctime >= ARP_MAXAGE) || - 803e370: 2b01 cmp r3, #1 - 803e372: d10e bne.n 803e392 + 803e3f4: 2b01 cmp r3, #1 + 803e3f6: d10e bne.n 803e416 (arp_table[i].ctime >= ARP_MAXPENDING))) { - 803e374: 4932 ldr r1, [pc, #200] ; (803e440 ) - 803e376: 687a ldr r2, [r7, #4] - 803e378: 4613 mov r3, r2 - 803e37a: 005b lsls r3, r3, #1 - 803e37c: 4413 add r3, r2 - 803e37e: 00db lsls r3, r3, #3 - 803e380: 440b add r3, r1 - 803e382: 3312 adds r3, #18 - 803e384: 881b ldrh r3, [r3, #0] + 803e3f8: 4932 ldr r1, [pc, #200] ; (803e4c4 ) + 803e3fa: 687a ldr r2, [r7, #4] + 803e3fc: 4613 mov r3, r2 + 803e3fe: 005b lsls r3, r3, #1 + 803e400: 4413 add r3, r2 + 803e402: 00db lsls r3, r3, #3 + 803e404: 440b add r3, r1 + 803e406: 3312 adds r3, #18 + 803e408: 881b ldrh r3, [r3, #0] ((arp_table[i].state == ETHARP_STATE_PENDING) && - 803e386: 2b04 cmp r3, #4 - 803e388: d903 bls.n 803e392 + 803e40a: 2b04 cmp r3, #4 + 803e40c: d903 bls.n 803e416 /* pending or stable entry has become old! */ LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %d.\n", arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", i)); /* clean up entries that have just been expired */ etharp_free_entry(i); - 803e38a: 6878 ldr r0, [r7, #4] - 803e38c: f7ff ff80 bl 803e290 - 803e390: e04a b.n 803e428 + 803e40e: 6878 ldr r0, [r7, #4] + 803e410: f7ff ff80 bl 803e314 + 803e414: e04a b.n 803e4ac } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_1) { - 803e392: 492b ldr r1, [pc, #172] ; (803e440 ) - 803e394: 687a ldr r2, [r7, #4] - 803e396: 4613 mov r3, r2 - 803e398: 005b lsls r3, r3, #1 - 803e39a: 4413 add r3, r2 - 803e39c: 00db lsls r3, r3, #3 - 803e39e: 440b add r3, r1 - 803e3a0: 3314 adds r3, #20 - 803e3a2: 781b ldrb r3, [r3, #0] - 803e3a4: 2b03 cmp r3, #3 - 803e3a6: d10a bne.n 803e3be + 803e416: 492b ldr r1, [pc, #172] ; (803e4c4 ) + 803e418: 687a ldr r2, [r7, #4] + 803e41a: 4613 mov r3, r2 + 803e41c: 005b lsls r3, r3, #1 + 803e41e: 4413 add r3, r2 + 803e420: 00db lsls r3, r3, #3 + 803e422: 440b add r3, r1 + 803e424: 3314 adds r3, #20 + 803e426: 781b ldrb r3, [r3, #0] + 803e428: 2b03 cmp r3, #3 + 803e42a: d10a bne.n 803e442 /* Don't send more than one request every 2 seconds. */ arp_table[i].state = ETHARP_STATE_STABLE_REREQUESTING_2; - 803e3a8: 4925 ldr r1, [pc, #148] ; (803e440 ) - 803e3aa: 687a ldr r2, [r7, #4] - 803e3ac: 4613 mov r3, r2 - 803e3ae: 005b lsls r3, r3, #1 - 803e3b0: 4413 add r3, r2 - 803e3b2: 00db lsls r3, r3, #3 - 803e3b4: 440b add r3, r1 - 803e3b6: 3314 adds r3, #20 - 803e3b8: 2204 movs r2, #4 - 803e3ba: 701a strb r2, [r3, #0] - 803e3bc: e034 b.n 803e428 + 803e42c: 4925 ldr r1, [pc, #148] ; (803e4c4 ) + 803e42e: 687a ldr r2, [r7, #4] + 803e430: 4613 mov r3, r2 + 803e432: 005b lsls r3, r3, #1 + 803e434: 4413 add r3, r2 + 803e436: 00db lsls r3, r3, #3 + 803e438: 440b add r3, r1 + 803e43a: 3314 adds r3, #20 + 803e43c: 2204 movs r2, #4 + 803e43e: 701a strb r2, [r3, #0] + 803e440: e034 b.n 803e4ac } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_2) { - 803e3be: 4920 ldr r1, [pc, #128] ; (803e440 ) - 803e3c0: 687a ldr r2, [r7, #4] - 803e3c2: 4613 mov r3, r2 - 803e3c4: 005b lsls r3, r3, #1 - 803e3c6: 4413 add r3, r2 - 803e3c8: 00db lsls r3, r3, #3 - 803e3ca: 440b add r3, r1 - 803e3cc: 3314 adds r3, #20 - 803e3ce: 781b ldrb r3, [r3, #0] - 803e3d0: 2b04 cmp r3, #4 - 803e3d2: d10a bne.n 803e3ea + 803e442: 4920 ldr r1, [pc, #128] ; (803e4c4 ) + 803e444: 687a ldr r2, [r7, #4] + 803e446: 4613 mov r3, r2 + 803e448: 005b lsls r3, r3, #1 + 803e44a: 4413 add r3, r2 + 803e44c: 00db lsls r3, r3, #3 + 803e44e: 440b add r3, r1 + 803e450: 3314 adds r3, #20 + 803e452: 781b ldrb r3, [r3, #0] + 803e454: 2b04 cmp r3, #4 + 803e456: d10a bne.n 803e46e /* Reset state to stable, so that the next transmitted packet will re-send an ARP request. */ arp_table[i].state = ETHARP_STATE_STABLE; - 803e3d4: 491a ldr r1, [pc, #104] ; (803e440 ) - 803e3d6: 687a ldr r2, [r7, #4] - 803e3d8: 4613 mov r3, r2 - 803e3da: 005b lsls r3, r3, #1 - 803e3dc: 4413 add r3, r2 - 803e3de: 00db lsls r3, r3, #3 - 803e3e0: 440b add r3, r1 - 803e3e2: 3314 adds r3, #20 - 803e3e4: 2202 movs r2, #2 - 803e3e6: 701a strb r2, [r3, #0] - 803e3e8: e01e b.n 803e428 + 803e458: 491a ldr r1, [pc, #104] ; (803e4c4 ) + 803e45a: 687a ldr r2, [r7, #4] + 803e45c: 4613 mov r3, r2 + 803e45e: 005b lsls r3, r3, #1 + 803e460: 4413 add r3, r2 + 803e462: 00db lsls r3, r3, #3 + 803e464: 440b add r3, r1 + 803e466: 3314 adds r3, #20 + 803e468: 2202 movs r2, #2 + 803e46a: 701a strb r2, [r3, #0] + 803e46c: e01e b.n 803e4ac } else if (arp_table[i].state == ETHARP_STATE_PENDING) { - 803e3ea: 4915 ldr r1, [pc, #84] ; (803e440 ) - 803e3ec: 687a ldr r2, [r7, #4] - 803e3ee: 4613 mov r3, r2 - 803e3f0: 005b lsls r3, r3, #1 - 803e3f2: 4413 add r3, r2 - 803e3f4: 00db lsls r3, r3, #3 - 803e3f6: 440b add r3, r1 - 803e3f8: 3314 adds r3, #20 - 803e3fa: 781b ldrb r3, [r3, #0] - 803e3fc: 2b01 cmp r3, #1 - 803e3fe: d113 bne.n 803e428 + 803e46e: 4915 ldr r1, [pc, #84] ; (803e4c4 ) + 803e470: 687a ldr r2, [r7, #4] + 803e472: 4613 mov r3, r2 + 803e474: 005b lsls r3, r3, #1 + 803e476: 4413 add r3, r2 + 803e478: 00db lsls r3, r3, #3 + 803e47a: 440b add r3, r1 + 803e47c: 3314 adds r3, #20 + 803e47e: 781b ldrb r3, [r3, #0] + 803e480: 2b01 cmp r3, #1 + 803e482: d113 bne.n 803e4ac /* still pending, resend an ARP query */ etharp_request(arp_table[i].netif, &arp_table[i].ipaddr); - 803e400: 490f ldr r1, [pc, #60] ; (803e440 ) - 803e402: 687a ldr r2, [r7, #4] - 803e404: 4613 mov r3, r2 - 803e406: 005b lsls r3, r3, #1 - 803e408: 4413 add r3, r2 - 803e40a: 00db lsls r3, r3, #3 - 803e40c: 440b add r3, r1 - 803e40e: 3308 adds r3, #8 - 803e410: 6818 ldr r0, [r3, #0] - 803e412: 687a ldr r2, [r7, #4] - 803e414: 4613 mov r3, r2 - 803e416: 005b lsls r3, r3, #1 - 803e418: 4413 add r3, r2 - 803e41a: 00db lsls r3, r3, #3 - 803e41c: 4a08 ldr r2, [pc, #32] ; (803e440 ) - 803e41e: 4413 add r3, r2 - 803e420: 3304 adds r3, #4 - 803e422: 4619 mov r1, r3 - 803e424: f000 fe6e bl 803f104 + 803e484: 490f ldr r1, [pc, #60] ; (803e4c4 ) + 803e486: 687a ldr r2, [r7, #4] + 803e488: 4613 mov r3, r2 + 803e48a: 005b lsls r3, r3, #1 + 803e48c: 4413 add r3, r2 + 803e48e: 00db lsls r3, r3, #3 + 803e490: 440b add r3, r1 + 803e492: 3308 adds r3, #8 + 803e494: 6818 ldr r0, [r3, #0] + 803e496: 687a ldr r2, [r7, #4] + 803e498: 4613 mov r3, r2 + 803e49a: 005b lsls r3, r3, #1 + 803e49c: 4413 add r3, r2 + 803e49e: 00db lsls r3, r3, #3 + 803e4a0: 4a08 ldr r2, [pc, #32] ; (803e4c4 ) + 803e4a2: 4413 add r3, r2 + 803e4a4: 3304 adds r3, #4 + 803e4a6: 4619 mov r1, r3 + 803e4a8: f000 fe6e bl 803f188 for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e428: 687b ldr r3, [r7, #4] - 803e42a: 3301 adds r3, #1 - 803e42c: 607b str r3, [r7, #4] - 803e42e: 687b ldr r3, [r7, #4] - 803e430: 2b09 cmp r3, #9 - 803e432: f77f af65 ble.w 803e300 + 803e4ac: 687b ldr r3, [r7, #4] + 803e4ae: 3301 adds r3, #1 + 803e4b0: 607b str r3, [r7, #4] + 803e4b2: 687b ldr r3, [r7, #4] + 803e4b4: 2b09 cmp r3, #9 + 803e4b6: f77f af65 ble.w 803e384 } } } } - 803e436: bf00 nop - 803e438: bf00 nop - 803e43a: 3708 adds r7, #8 - 803e43c: 46bd mov sp, r7 - 803e43e: bd80 pop {r7, pc} - 803e440: 2400e9b8 .word 0x2400e9b8 + 803e4ba: bf00 nop + 803e4bc: bf00 nop + 803e4be: 3708 adds r7, #8 + 803e4c0: 46bd mov sp, r7 + 803e4c2: bd80 pop {r7, pc} + 803e4c4: 2400e9c0 .word 0x2400e9c0 -0803e444 : +0803e4c8 : * @return The ARP entry index that matched or is created, ERR_MEM if no * entry is found or could be recycled. */ static s16_t etharp_find_entry(const ip4_addr_t *ipaddr, u8_t flags, struct netif *netif) { - 803e444: b580 push {r7, lr} - 803e446: b08a sub sp, #40 ; 0x28 - 803e448: af00 add r7, sp, #0 - 803e44a: 60f8 str r0, [r7, #12] - 803e44c: 460b mov r3, r1 - 803e44e: 607a str r2, [r7, #4] - 803e450: 72fb strb r3, [r7, #11] + 803e4c8: b580 push {r7, lr} + 803e4ca: b08a sub sp, #40 ; 0x28 + 803e4cc: af00 add r7, sp, #0 + 803e4ce: 60f8 str r0, [r7, #12] + 803e4d0: 460b mov r3, r1 + 803e4d2: 607a str r2, [r7, #4] + 803e4d4: 72fb strb r3, [r7, #11] s16_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE; - 803e452: 230a movs r3, #10 - 803e454: 84fb strh r3, [r7, #38] ; 0x26 - 803e456: 230a movs r3, #10 - 803e458: 84bb strh r3, [r7, #36] ; 0x24 + 803e4d6: 230a movs r3, #10 + 803e4d8: 84fb strh r3, [r7, #38] ; 0x26 + 803e4da: 230a movs r3, #10 + 803e4dc: 84bb strh r3, [r7, #36] ; 0x24 s16_t empty = ARP_TABLE_SIZE; - 803e45a: 230a movs r3, #10 - 803e45c: 847b strh r3, [r7, #34] ; 0x22 + 803e4de: 230a movs r3, #10 + 803e4e0: 847b strh r3, [r7, #34] ; 0x22 s16_t i = 0; - 803e45e: 2300 movs r3, #0 - 803e460: 843b strh r3, [r7, #32] + 803e4e2: 2300 movs r3, #0 + 803e4e4: 843b strh r3, [r7, #32] /* oldest entry with packets on queue */ s16_t old_queue = ARP_TABLE_SIZE; - 803e462: 230a movs r3, #10 - 803e464: 83fb strh r3, [r7, #30] + 803e4e6: 230a movs r3, #10 + 803e4e8: 83fb strh r3, [r7, #30] /* its age */ u16_t age_queue = 0, age_pending = 0, age_stable = 0; - 803e466: 2300 movs r3, #0 - 803e468: 83bb strh r3, [r7, #28] - 803e46a: 2300 movs r3, #0 - 803e46c: 837b strh r3, [r7, #26] - 803e46e: 2300 movs r3, #0 - 803e470: 833b strh r3, [r7, #24] + 803e4ea: 2300 movs r3, #0 + 803e4ec: 83bb strh r3, [r7, #28] + 803e4ee: 2300 movs r3, #0 + 803e4f0: 837b strh r3, [r7, #26] + 803e4f2: 2300 movs r3, #0 + 803e4f4: 833b strh r3, [r7, #24] * 4) remember the oldest pending entry with queued packets (if any) * 5) search for a matching IP entry, either pending or stable * until 5 matches, or all entries are searched for. */ for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e472: 2300 movs r3, #0 - 803e474: 843b strh r3, [r7, #32] - 803e476: e0ae b.n 803e5d6 + 803e4f6: 2300 movs r3, #0 + 803e4f8: 843b strh r3, [r7, #32] + 803e4fa: e0ae b.n 803e65a u8_t state = arp_table[i].state; - 803e478: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e47c: 49a6 ldr r1, [pc, #664] ; (803e718 ) - 803e47e: 4613 mov r3, r2 - 803e480: 005b lsls r3, r3, #1 - 803e482: 4413 add r3, r2 - 803e484: 00db lsls r3, r3, #3 - 803e486: 440b add r3, r1 - 803e488: 3314 adds r3, #20 - 803e48a: 781b ldrb r3, [r3, #0] - 803e48c: 75fb strb r3, [r7, #23] + 803e4fc: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e500: 49a6 ldr r1, [pc, #664] ; (803e79c ) + 803e502: 4613 mov r3, r2 + 803e504: 005b lsls r3, r3, #1 + 803e506: 4413 add r3, r2 + 803e508: 00db lsls r3, r3, #3 + 803e50a: 440b add r3, r1 + 803e50c: 3314 adds r3, #20 + 803e50e: 781b ldrb r3, [r3, #0] + 803e510: 75fb strb r3, [r7, #23] /* no empty entry found yet and now we do find one? */ if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) { - 803e48e: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 - 803e492: 2b0a cmp r3, #10 - 803e494: d105 bne.n 803e4a2 - 803e496: 7dfb ldrb r3, [r7, #23] - 803e498: 2b00 cmp r3, #0 - 803e49a: d102 bne.n 803e4a2 + 803e512: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 + 803e516: 2b0a cmp r3, #10 + 803e518: d105 bne.n 803e526 + 803e51a: 7dfb ldrb r3, [r7, #23] + 803e51c: 2b00 cmp r3, #0 + 803e51e: d102 bne.n 803e526 LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_find_entry: found empty entry %d\n", (int)i)); /* remember first empty entry */ empty = i; - 803e49c: 8c3b ldrh r3, [r7, #32] - 803e49e: 847b strh r3, [r7, #34] ; 0x22 - 803e4a0: e095 b.n 803e5ce + 803e520: 8c3b ldrh r3, [r7, #32] + 803e522: 847b strh r3, [r7, #34] ; 0x22 + 803e524: e095 b.n 803e652 } else if (state != ETHARP_STATE_EMPTY) { - 803e4a2: 7dfb ldrb r3, [r7, #23] - 803e4a4: 2b00 cmp r3, #0 - 803e4a6: f000 8092 beq.w 803e5ce + 803e526: 7dfb ldrb r3, [r7, #23] + 803e528: 2b00 cmp r3, #0 + 803e52a: f000 8092 beq.w 803e652 LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE", - 803e4aa: 7dfb ldrb r3, [r7, #23] - 803e4ac: 2b01 cmp r3, #1 - 803e4ae: d009 beq.n 803e4c4 - 803e4b0: 7dfb ldrb r3, [r7, #23] - 803e4b2: 2b01 cmp r3, #1 - 803e4b4: d806 bhi.n 803e4c4 - 803e4b6: 4b99 ldr r3, [pc, #612] ; (803e71c ) - 803e4b8: f240 1223 movw r2, #291 ; 0x123 - 803e4bc: 4998 ldr r1, [pc, #608] ; (803e720 ) - 803e4be: 4899 ldr r0, [pc, #612] ; (803e724 ) - 803e4c0: f002 fb26 bl 8040b10 + 803e52e: 7dfb ldrb r3, [r7, #23] + 803e530: 2b01 cmp r3, #1 + 803e532: d009 beq.n 803e548 + 803e534: 7dfb ldrb r3, [r7, #23] + 803e536: 2b01 cmp r3, #1 + 803e538: d806 bhi.n 803e548 + 803e53a: 4b99 ldr r3, [pc, #612] ; (803e7a0 ) + 803e53c: f240 1223 movw r2, #291 ; 0x123 + 803e540: 4998 ldr r1, [pc, #608] ; (803e7a4 ) + 803e542: 4899 ldr r0, [pc, #612] ; (803e7a8 ) + 803e544: f002 fb26 bl 8040b94 state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE); /* if given, does IP address match IP address in ARP entry? */ if (ipaddr && ip4_addr_cmp(ipaddr, &arp_table[i].ipaddr) - 803e4c4: 68fb ldr r3, [r7, #12] - 803e4c6: 2b00 cmp r3, #0 - 803e4c8: d020 beq.n 803e50c - 803e4ca: 68fb ldr r3, [r7, #12] - 803e4cc: 6819 ldr r1, [r3, #0] - 803e4ce: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e4d2: 4891 ldr r0, [pc, #580] ; (803e718 ) - 803e4d4: 4613 mov r3, r2 - 803e4d6: 005b lsls r3, r3, #1 - 803e4d8: 4413 add r3, r2 - 803e4da: 00db lsls r3, r3, #3 - 803e4dc: 4403 add r3, r0 - 803e4de: 3304 adds r3, #4 - 803e4e0: 681b ldr r3, [r3, #0] - 803e4e2: 4299 cmp r1, r3 - 803e4e4: d112 bne.n 803e50c + 803e548: 68fb ldr r3, [r7, #12] + 803e54a: 2b00 cmp r3, #0 + 803e54c: d020 beq.n 803e590 + 803e54e: 68fb ldr r3, [r7, #12] + 803e550: 6819 ldr r1, [r3, #0] + 803e552: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e556: 4891 ldr r0, [pc, #580] ; (803e79c ) + 803e558: 4613 mov r3, r2 + 803e55a: 005b lsls r3, r3, #1 + 803e55c: 4413 add r3, r2 + 803e55e: 00db lsls r3, r3, #3 + 803e560: 4403 add r3, r0 + 803e562: 3304 adds r3, #4 + 803e564: 681b ldr r3, [r3, #0] + 803e566: 4299 cmp r1, r3 + 803e568: d112 bne.n 803e590 #if ETHARP_TABLE_MATCH_NETIF && ((netif == NULL) || (netif == arp_table[i].netif)) - 803e4e6: 687b ldr r3, [r7, #4] - 803e4e8: 2b00 cmp r3, #0 - 803e4ea: d00c beq.n 803e506 - 803e4ec: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e4f0: 4989 ldr r1, [pc, #548] ; (803e718 ) - 803e4f2: 4613 mov r3, r2 - 803e4f4: 005b lsls r3, r3, #1 - 803e4f6: 4413 add r3, r2 - 803e4f8: 00db lsls r3, r3, #3 - 803e4fa: 440b add r3, r1 - 803e4fc: 3308 adds r3, #8 - 803e4fe: 681b ldr r3, [r3, #0] - 803e500: 687a ldr r2, [r7, #4] - 803e502: 429a cmp r2, r3 - 803e504: d102 bne.n 803e50c + 803e56a: 687b ldr r3, [r7, #4] + 803e56c: 2b00 cmp r3, #0 + 803e56e: d00c beq.n 803e58a + 803e570: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e574: 4989 ldr r1, [pc, #548] ; (803e79c ) + 803e576: 4613 mov r3, r2 + 803e578: 005b lsls r3, r3, #1 + 803e57a: 4413 add r3, r2 + 803e57c: 00db lsls r3, r3, #3 + 803e57e: 440b add r3, r1 + 803e580: 3308 adds r3, #8 + 803e582: 681b ldr r3, [r3, #0] + 803e584: 687a ldr r2, [r7, #4] + 803e586: 429a cmp r2, r3 + 803e588: d102 bne.n 803e590 #endif /* ETHARP_TABLE_MATCH_NETIF */ ) { LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: found matching entry %d\n", (int)i)); /* found exact IP address match, simply bail out */ return i; - 803e506: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e50a: e100 b.n 803e70e + 803e58a: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e58e: e100 b.n 803e792 } /* pending entry? */ if (state == ETHARP_STATE_PENDING) { - 803e50c: 7dfb ldrb r3, [r7, #23] - 803e50e: 2b01 cmp r3, #1 - 803e510: d140 bne.n 803e594 + 803e590: 7dfb ldrb r3, [r7, #23] + 803e592: 2b01 cmp r3, #1 + 803e594: d140 bne.n 803e618 /* pending with queued packets? */ if (arp_table[i].q != NULL) { - 803e512: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e516: 4980 ldr r1, [pc, #512] ; (803e718 ) - 803e518: 4613 mov r3, r2 - 803e51a: 005b lsls r3, r3, #1 - 803e51c: 4413 add r3, r2 - 803e51e: 00db lsls r3, r3, #3 - 803e520: 440b add r3, r1 - 803e522: 681b ldr r3, [r3, #0] - 803e524: 2b00 cmp r3, #0 - 803e526: d01a beq.n 803e55e + 803e596: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e59a: 4980 ldr r1, [pc, #512] ; (803e79c ) + 803e59c: 4613 mov r3, r2 + 803e59e: 005b lsls r3, r3, #1 + 803e5a0: 4413 add r3, r2 + 803e5a2: 00db lsls r3, r3, #3 + 803e5a4: 440b add r3, r1 + 803e5a6: 681b ldr r3, [r3, #0] + 803e5a8: 2b00 cmp r3, #0 + 803e5aa: d01a beq.n 803e5e2 if (arp_table[i].ctime >= age_queue) { - 803e528: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e52c: 497a ldr r1, [pc, #488] ; (803e718 ) - 803e52e: 4613 mov r3, r2 - 803e530: 005b lsls r3, r3, #1 - 803e532: 4413 add r3, r2 - 803e534: 00db lsls r3, r3, #3 - 803e536: 440b add r3, r1 - 803e538: 3312 adds r3, #18 - 803e53a: 881b ldrh r3, [r3, #0] - 803e53c: 8bba ldrh r2, [r7, #28] - 803e53e: 429a cmp r2, r3 - 803e540: d845 bhi.n 803e5ce + 803e5ac: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e5b0: 497a ldr r1, [pc, #488] ; (803e79c ) + 803e5b2: 4613 mov r3, r2 + 803e5b4: 005b lsls r3, r3, #1 + 803e5b6: 4413 add r3, r2 + 803e5b8: 00db lsls r3, r3, #3 + 803e5ba: 440b add r3, r1 + 803e5bc: 3312 adds r3, #18 + 803e5be: 881b ldrh r3, [r3, #0] + 803e5c0: 8bba ldrh r2, [r7, #28] + 803e5c2: 429a cmp r2, r3 + 803e5c4: d845 bhi.n 803e652 old_queue = i; - 803e542: 8c3b ldrh r3, [r7, #32] - 803e544: 83fb strh r3, [r7, #30] + 803e5c6: 8c3b ldrh r3, [r7, #32] + 803e5c8: 83fb strh r3, [r7, #30] age_queue = arp_table[i].ctime; - 803e546: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e54a: 4973 ldr r1, [pc, #460] ; (803e718 ) - 803e54c: 4613 mov r3, r2 - 803e54e: 005b lsls r3, r3, #1 - 803e550: 4413 add r3, r2 - 803e552: 00db lsls r3, r3, #3 - 803e554: 440b add r3, r1 - 803e556: 3312 adds r3, #18 - 803e558: 881b ldrh r3, [r3, #0] - 803e55a: 83bb strh r3, [r7, #28] - 803e55c: e037 b.n 803e5ce + 803e5ca: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e5ce: 4973 ldr r1, [pc, #460] ; (803e79c ) + 803e5d0: 4613 mov r3, r2 + 803e5d2: 005b lsls r3, r3, #1 + 803e5d4: 4413 add r3, r2 + 803e5d6: 00db lsls r3, r3, #3 + 803e5d8: 440b add r3, r1 + 803e5da: 3312 adds r3, #18 + 803e5dc: 881b ldrh r3, [r3, #0] + 803e5de: 83bb strh r3, [r7, #28] + 803e5e0: e037 b.n 803e652 } } else /* pending without queued packets? */ { if (arp_table[i].ctime >= age_pending) { - 803e55e: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e562: 496d ldr r1, [pc, #436] ; (803e718 ) - 803e564: 4613 mov r3, r2 - 803e566: 005b lsls r3, r3, #1 - 803e568: 4413 add r3, r2 - 803e56a: 00db lsls r3, r3, #3 - 803e56c: 440b add r3, r1 - 803e56e: 3312 adds r3, #18 - 803e570: 881b ldrh r3, [r3, #0] - 803e572: 8b7a ldrh r2, [r7, #26] - 803e574: 429a cmp r2, r3 - 803e576: d82a bhi.n 803e5ce + 803e5e2: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e5e6: 496d ldr r1, [pc, #436] ; (803e79c ) + 803e5e8: 4613 mov r3, r2 + 803e5ea: 005b lsls r3, r3, #1 + 803e5ec: 4413 add r3, r2 + 803e5ee: 00db lsls r3, r3, #3 + 803e5f0: 440b add r3, r1 + 803e5f2: 3312 adds r3, #18 + 803e5f4: 881b ldrh r3, [r3, #0] + 803e5f6: 8b7a ldrh r2, [r7, #26] + 803e5f8: 429a cmp r2, r3 + 803e5fa: d82a bhi.n 803e652 old_pending = i; - 803e578: 8c3b ldrh r3, [r7, #32] - 803e57a: 84fb strh r3, [r7, #38] ; 0x26 + 803e5fc: 8c3b ldrh r3, [r7, #32] + 803e5fe: 84fb strh r3, [r7, #38] ; 0x26 age_pending = arp_table[i].ctime; - 803e57c: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e580: 4965 ldr r1, [pc, #404] ; (803e718 ) - 803e582: 4613 mov r3, r2 - 803e584: 005b lsls r3, r3, #1 - 803e586: 4413 add r3, r2 - 803e588: 00db lsls r3, r3, #3 - 803e58a: 440b add r3, r1 - 803e58c: 3312 adds r3, #18 - 803e58e: 881b ldrh r3, [r3, #0] - 803e590: 837b strh r3, [r7, #26] - 803e592: e01c b.n 803e5ce + 803e600: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e604: 4965 ldr r1, [pc, #404] ; (803e79c ) + 803e606: 4613 mov r3, r2 + 803e608: 005b lsls r3, r3, #1 + 803e60a: 4413 add r3, r2 + 803e60c: 00db lsls r3, r3, #3 + 803e60e: 440b add r3, r1 + 803e610: 3312 adds r3, #18 + 803e612: 881b ldrh r3, [r3, #0] + 803e614: 837b strh r3, [r7, #26] + 803e616: e01c b.n 803e652 } } /* stable entry? */ } else if (state >= ETHARP_STATE_STABLE) { - 803e594: 7dfb ldrb r3, [r7, #23] - 803e596: 2b01 cmp r3, #1 - 803e598: d919 bls.n 803e5ce + 803e618: 7dfb ldrb r3, [r7, #23] + 803e61a: 2b01 cmp r3, #1 + 803e61c: d919 bls.n 803e652 /* don't record old_stable for static entries since they never expire */ if (state < ETHARP_STATE_STATIC) #endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ { /* remember entry with oldest stable entry in oldest, its age in maxtime */ if (arp_table[i].ctime >= age_stable) { - 803e59a: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e59e: 495e ldr r1, [pc, #376] ; (803e718 ) - 803e5a0: 4613 mov r3, r2 - 803e5a2: 005b lsls r3, r3, #1 - 803e5a4: 4413 add r3, r2 - 803e5a6: 00db lsls r3, r3, #3 - 803e5a8: 440b add r3, r1 - 803e5aa: 3312 adds r3, #18 - 803e5ac: 881b ldrh r3, [r3, #0] - 803e5ae: 8b3a ldrh r2, [r7, #24] - 803e5b0: 429a cmp r2, r3 - 803e5b2: d80c bhi.n 803e5ce + 803e61e: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e622: 495e ldr r1, [pc, #376] ; (803e79c ) + 803e624: 4613 mov r3, r2 + 803e626: 005b lsls r3, r3, #1 + 803e628: 4413 add r3, r2 + 803e62a: 00db lsls r3, r3, #3 + 803e62c: 440b add r3, r1 + 803e62e: 3312 adds r3, #18 + 803e630: 881b ldrh r3, [r3, #0] + 803e632: 8b3a ldrh r2, [r7, #24] + 803e634: 429a cmp r2, r3 + 803e636: d80c bhi.n 803e652 old_stable = i; - 803e5b4: 8c3b ldrh r3, [r7, #32] - 803e5b6: 84bb strh r3, [r7, #36] ; 0x24 + 803e638: 8c3b ldrh r3, [r7, #32] + 803e63a: 84bb strh r3, [r7, #36] ; 0x24 age_stable = arp_table[i].ctime; - 803e5b8: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e5bc: 4956 ldr r1, [pc, #344] ; (803e718 ) - 803e5be: 4613 mov r3, r2 - 803e5c0: 005b lsls r3, r3, #1 - 803e5c2: 4413 add r3, r2 - 803e5c4: 00db lsls r3, r3, #3 - 803e5c6: 440b add r3, r1 - 803e5c8: 3312 adds r3, #18 - 803e5ca: 881b ldrh r3, [r3, #0] - 803e5cc: 833b strh r3, [r7, #24] + 803e63c: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e640: 4956 ldr r1, [pc, #344] ; (803e79c ) + 803e642: 4613 mov r3, r2 + 803e644: 005b lsls r3, r3, #1 + 803e646: 4413 add r3, r2 + 803e648: 00db lsls r3, r3, #3 + 803e64a: 440b add r3, r1 + 803e64c: 3312 adds r3, #18 + 803e64e: 881b ldrh r3, [r3, #0] + 803e650: 833b strh r3, [r7, #24] for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e5ce: 8c3b ldrh r3, [r7, #32] - 803e5d0: 3301 adds r3, #1 - 803e5d2: b29b uxth r3, r3 - 803e5d4: 843b strh r3, [r7, #32] - 803e5d6: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e5da: 2b09 cmp r3, #9 - 803e5dc: f77f af4c ble.w 803e478 + 803e652: 8c3b ldrh r3, [r7, #32] + 803e654: 3301 adds r3, #1 + 803e656: b29b uxth r3, r3 + 803e658: 843b strh r3, [r7, #32] + 803e65a: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e65e: 2b09 cmp r3, #9 + 803e660: f77f af4c ble.w 803e4fc } } /* { we have no match } => try to create a new entry */ /* don't create new entry, only search? */ if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) || - 803e5e0: 7afb ldrb r3, [r7, #11] - 803e5e2: f003 0302 and.w r3, r3, #2 - 803e5e6: 2b00 cmp r3, #0 - 803e5e8: d108 bne.n 803e5fc - 803e5ea: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 - 803e5ee: 2b0a cmp r3, #10 - 803e5f0: d107 bne.n 803e602 + 803e664: 7afb ldrb r3, [r7, #11] + 803e666: f003 0302 and.w r3, r3, #2 + 803e66a: 2b00 cmp r3, #0 + 803e66c: d108 bne.n 803e680 + 803e66e: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 + 803e672: 2b0a cmp r3, #10 + 803e674: d107 bne.n 803e686 /* or no empty entry found and not allowed to recycle? */ ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) { - 803e5f2: 7afb ldrb r3, [r7, #11] - 803e5f4: f003 0301 and.w r3, r3, #1 - 803e5f8: 2b00 cmp r3, #0 - 803e5fa: d102 bne.n 803e602 + 803e676: 7afb ldrb r3, [r7, #11] + 803e678: f003 0301 and.w r3, r3, #1 + 803e67c: 2b00 cmp r3, #0 + 803e67e: d102 bne.n 803e686 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty entry found and not allowed to recycle\n")); return (s16_t)ERR_MEM; - 803e5fc: f04f 33ff mov.w r3, #4294967295 - 803e600: e085 b.n 803e70e + 803e680: f04f 33ff mov.w r3, #4294967295 + 803e684: e085 b.n 803e792 * * { ETHARP_FLAG_TRY_HARD is set at this point } */ /* 1) empty entry available? */ if (empty < ARP_TABLE_SIZE) { - 803e602: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 - 803e606: 2b09 cmp r3, #9 - 803e608: dc02 bgt.n 803e610 + 803e686: f9b7 3022 ldrsh.w r3, [r7, #34] ; 0x22 + 803e68a: 2b09 cmp r3, #9 + 803e68c: dc02 bgt.n 803e694 i = empty; - 803e60a: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803e60c: 843b strh r3, [r7, #32] - 803e60e: e039 b.n 803e684 + 803e68e: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803e690: 843b strh r3, [r7, #32] + 803e692: e039 b.n 803e708 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting empty entry %d\n", (int)i)); } else { /* 2) found recyclable stable entry? */ if (old_stable < ARP_TABLE_SIZE) { - 803e610: f9b7 3024 ldrsh.w r3, [r7, #36] ; 0x24 - 803e614: 2b09 cmp r3, #9 - 803e616: dc14 bgt.n 803e642 + 803e694: f9b7 3024 ldrsh.w r3, [r7, #36] ; 0x24 + 803e698: 2b09 cmp r3, #9 + 803e69a: dc14 bgt.n 803e6c6 /* recycle oldest stable*/ i = old_stable; - 803e618: 8cbb ldrh r3, [r7, #36] ; 0x24 - 803e61a: 843b strh r3, [r7, #32] + 803e69c: 8cbb ldrh r3, [r7, #36] ; 0x24 + 803e69e: 843b strh r3, [r7, #32] LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest stable entry %d\n", (int)i)); /* no queued packets should exist on stable entries */ LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL); - 803e61c: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e620: 493d ldr r1, [pc, #244] ; (803e718 ) - 803e622: 4613 mov r3, r2 - 803e624: 005b lsls r3, r3, #1 - 803e626: 4413 add r3, r2 - 803e628: 00db lsls r3, r3, #3 - 803e62a: 440b add r3, r1 - 803e62c: 681b ldr r3, [r3, #0] - 803e62e: 2b00 cmp r3, #0 - 803e630: d018 beq.n 803e664 - 803e632: 4b3a ldr r3, [pc, #232] ; (803e71c ) - 803e634: f240 126d movw r2, #365 ; 0x16d - 803e638: 493b ldr r1, [pc, #236] ; (803e728 ) - 803e63a: 483a ldr r0, [pc, #232] ; (803e724 ) - 803e63c: f002 fa68 bl 8040b10 - 803e640: e010 b.n 803e664 + 803e6a0: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e6a4: 493d ldr r1, [pc, #244] ; (803e79c ) + 803e6a6: 4613 mov r3, r2 + 803e6a8: 005b lsls r3, r3, #1 + 803e6aa: 4413 add r3, r2 + 803e6ac: 00db lsls r3, r3, #3 + 803e6ae: 440b add r3, r1 + 803e6b0: 681b ldr r3, [r3, #0] + 803e6b2: 2b00 cmp r3, #0 + 803e6b4: d018 beq.n 803e6e8 + 803e6b6: 4b3a ldr r3, [pc, #232] ; (803e7a0 ) + 803e6b8: f240 126d movw r2, #365 ; 0x16d + 803e6bc: 493b ldr r1, [pc, #236] ; (803e7ac ) + 803e6be: 483a ldr r0, [pc, #232] ; (803e7a8 ) + 803e6c0: f002 fa68 bl 8040b94 + 803e6c4: e010 b.n 803e6e8 /* 3) found recyclable pending entry without queued packets? */ } else if (old_pending < ARP_TABLE_SIZE) { - 803e642: f9b7 3026 ldrsh.w r3, [r7, #38] ; 0x26 - 803e646: 2b09 cmp r3, #9 - 803e648: dc02 bgt.n 803e650 + 803e6c6: f9b7 3026 ldrsh.w r3, [r7, #38] ; 0x26 + 803e6ca: 2b09 cmp r3, #9 + 803e6cc: dc02 bgt.n 803e6d4 /* recycle oldest pending */ i = old_pending; - 803e64a: 8cfb ldrh r3, [r7, #38] ; 0x26 - 803e64c: 843b strh r3, [r7, #32] - 803e64e: e009 b.n 803e664 + 803e6ce: 8cfb ldrh r3, [r7, #38] ; 0x26 + 803e6d0: 843b strh r3, [r7, #32] + 803e6d2: e009 b.n 803e6e8 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d (without queue)\n", (int)i)); /* 4) found recyclable pending entry with queued packets? */ } else if (old_queue < ARP_TABLE_SIZE) { - 803e650: f9b7 301e ldrsh.w r3, [r7, #30] - 803e654: 2b09 cmp r3, #9 - 803e656: dc02 bgt.n 803e65e + 803e6d4: f9b7 301e ldrsh.w r3, [r7, #30] + 803e6d8: 2b09 cmp r3, #9 + 803e6da: dc02 bgt.n 803e6e2 /* recycle oldest pending (queued packets are free in etharp_free_entry) */ i = old_queue; - 803e658: 8bfb ldrh r3, [r7, #30] - 803e65a: 843b strh r3, [r7, #32] - 803e65c: e002 b.n 803e664 + 803e6dc: 8bfb ldrh r3, [r7, #30] + 803e6de: 843b strh r3, [r7, #32] + 803e6e0: e002 b.n 803e6e8 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d, freeing packet queue %p\n", (int)i, (void *)(arp_table[i].q))); /* no empty or recyclable entries found */ } else { LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty or recyclable entries found\n")); return (s16_t)ERR_MEM; - 803e65e: f04f 33ff mov.w r3, #4294967295 - 803e662: e054 b.n 803e70e + 803e6e2: f04f 33ff mov.w r3, #4294967295 + 803e6e6: e054 b.n 803e792 } /* { empty or recyclable entry found } */ LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); - 803e664: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e668: 2b09 cmp r3, #9 - 803e66a: dd06 ble.n 803e67a - 803e66c: 4b2b ldr r3, [pc, #172] ; (803e71c ) - 803e66e: f240 127f movw r2, #383 ; 0x17f - 803e672: 492e ldr r1, [pc, #184] ; (803e72c ) - 803e674: 482b ldr r0, [pc, #172] ; (803e724 ) - 803e676: f002 fa4b bl 8040b10 + 803e6e8: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e6ec: 2b09 cmp r3, #9 + 803e6ee: dd06 ble.n 803e6fe + 803e6f0: 4b2b ldr r3, [pc, #172] ; (803e7a0 ) + 803e6f2: f240 127f movw r2, #383 ; 0x17f + 803e6f6: 492e ldr r1, [pc, #184] ; (803e7b0 ) + 803e6f8: 482b ldr r0, [pc, #172] ; (803e7a8 ) + 803e6fa: f002 fa4b bl 8040b94 etharp_free_entry(i); - 803e67a: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e67e: 4618 mov r0, r3 - 803e680: f7ff fe06 bl 803e290 + 803e6fe: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e702: 4618 mov r0, r3 + 803e704: f7ff fe06 bl 803e314 } LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); - 803e684: f9b7 3020 ldrsh.w r3, [r7, #32] - 803e688: 2b09 cmp r3, #9 - 803e68a: dd06 ble.n 803e69a - 803e68c: 4b23 ldr r3, [pc, #140] ; (803e71c ) - 803e68e: f240 1283 movw r2, #387 ; 0x183 - 803e692: 4926 ldr r1, [pc, #152] ; (803e72c ) - 803e694: 4823 ldr r0, [pc, #140] ; (803e724 ) - 803e696: f002 fa3b bl 8040b10 + 803e708: f9b7 3020 ldrsh.w r3, [r7, #32] + 803e70c: 2b09 cmp r3, #9 + 803e70e: dd06 ble.n 803e71e + 803e710: 4b23 ldr r3, [pc, #140] ; (803e7a0 ) + 803e712: f240 1283 movw r2, #387 ; 0x183 + 803e716: 4926 ldr r1, [pc, #152] ; (803e7b0 ) + 803e718: 4823 ldr r0, [pc, #140] ; (803e7a8 ) + 803e71a: f002 fa3b bl 8040b94 LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY", - 803e69a: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e69e: 491e ldr r1, [pc, #120] ; (803e718 ) - 803e6a0: 4613 mov r3, r2 - 803e6a2: 005b lsls r3, r3, #1 - 803e6a4: 4413 add r3, r2 - 803e6a6: 00db lsls r3, r3, #3 - 803e6a8: 440b add r3, r1 - 803e6aa: 3314 adds r3, #20 - 803e6ac: 781b ldrb r3, [r3, #0] - 803e6ae: 2b00 cmp r3, #0 - 803e6b0: d006 beq.n 803e6c0 - 803e6b2: 4b1a ldr r3, [pc, #104] ; (803e71c ) - 803e6b4: f44f 72c2 mov.w r2, #388 ; 0x184 - 803e6b8: 491d ldr r1, [pc, #116] ; (803e730 ) - 803e6ba: 481a ldr r0, [pc, #104] ; (803e724 ) - 803e6bc: f002 fa28 bl 8040b10 + 803e71e: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e722: 491e ldr r1, [pc, #120] ; (803e79c ) + 803e724: 4613 mov r3, r2 + 803e726: 005b lsls r3, r3, #1 + 803e728: 4413 add r3, r2 + 803e72a: 00db lsls r3, r3, #3 + 803e72c: 440b add r3, r1 + 803e72e: 3314 adds r3, #20 + 803e730: 781b ldrb r3, [r3, #0] + 803e732: 2b00 cmp r3, #0 + 803e734: d006 beq.n 803e744 + 803e736: 4b1a ldr r3, [pc, #104] ; (803e7a0 ) + 803e738: f44f 72c2 mov.w r2, #388 ; 0x184 + 803e73c: 491d ldr r1, [pc, #116] ; (803e7b4 ) + 803e73e: 481a ldr r0, [pc, #104] ; (803e7a8 ) + 803e740: f002 fa28 bl 8040b94 arp_table[i].state == ETHARP_STATE_EMPTY); /* IP address given? */ if (ipaddr != NULL) { - 803e6c0: 68fb ldr r3, [r7, #12] - 803e6c2: 2b00 cmp r3, #0 - 803e6c4: d00b beq.n 803e6de + 803e744: 68fb ldr r3, [r7, #12] + 803e746: 2b00 cmp r3, #0 + 803e748: d00b beq.n 803e762 /* set IP address */ ip4_addr_copy(arp_table[i].ipaddr, *ipaddr); - 803e6c6: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e6ca: 68fb ldr r3, [r7, #12] - 803e6cc: 6819 ldr r1, [r3, #0] - 803e6ce: 4812 ldr r0, [pc, #72] ; (803e718 ) - 803e6d0: 4613 mov r3, r2 - 803e6d2: 005b lsls r3, r3, #1 - 803e6d4: 4413 add r3, r2 - 803e6d6: 00db lsls r3, r3, #3 - 803e6d8: 4403 add r3, r0 - 803e6da: 3304 adds r3, #4 - 803e6dc: 6019 str r1, [r3, #0] + 803e74a: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e74e: 68fb ldr r3, [r7, #12] + 803e750: 6819 ldr r1, [r3, #0] + 803e752: 4812 ldr r0, [pc, #72] ; (803e79c ) + 803e754: 4613 mov r3, r2 + 803e756: 005b lsls r3, r3, #1 + 803e758: 4413 add r3, r2 + 803e75a: 00db lsls r3, r3, #3 + 803e75c: 4403 add r3, r0 + 803e75e: 3304 adds r3, #4 + 803e760: 6019 str r1, [r3, #0] } arp_table[i].ctime = 0; - 803e6de: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e6e2: 490d ldr r1, [pc, #52] ; (803e718 ) - 803e6e4: 4613 mov r3, r2 - 803e6e6: 005b lsls r3, r3, #1 - 803e6e8: 4413 add r3, r2 - 803e6ea: 00db lsls r3, r3, #3 - 803e6ec: 440b add r3, r1 - 803e6ee: 3312 adds r3, #18 - 803e6f0: 2200 movs r2, #0 - 803e6f2: 801a strh r2, [r3, #0] + 803e762: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e766: 490d ldr r1, [pc, #52] ; (803e79c ) + 803e768: 4613 mov r3, r2 + 803e76a: 005b lsls r3, r3, #1 + 803e76c: 4413 add r3, r2 + 803e76e: 00db lsls r3, r3, #3 + 803e770: 440b add r3, r1 + 803e772: 3312 adds r3, #18 + 803e774: 2200 movs r2, #0 + 803e776: 801a strh r2, [r3, #0] #if ETHARP_TABLE_MATCH_NETIF arp_table[i].netif = netif; - 803e6f4: f9b7 2020 ldrsh.w r2, [r7, #32] - 803e6f8: 4907 ldr r1, [pc, #28] ; (803e718 ) - 803e6fa: 4613 mov r3, r2 - 803e6fc: 005b lsls r3, r3, #1 - 803e6fe: 4413 add r3, r2 - 803e700: 00db lsls r3, r3, #3 - 803e702: 440b add r3, r1 - 803e704: 3308 adds r3, #8 - 803e706: 687a ldr r2, [r7, #4] - 803e708: 601a str r2, [r3, #0] + 803e778: f9b7 2020 ldrsh.w r2, [r7, #32] + 803e77c: 4907 ldr r1, [pc, #28] ; (803e79c ) + 803e77e: 4613 mov r3, r2 + 803e780: 005b lsls r3, r3, #1 + 803e782: 4413 add r3, r2 + 803e784: 00db lsls r3, r3, #3 + 803e786: 440b add r3, r1 + 803e788: 3308 adds r3, #8 + 803e78a: 687a ldr r2, [r7, #4] + 803e78c: 601a str r2, [r3, #0] #endif /* ETHARP_TABLE_MATCH_NETIF */ return (s16_t)i; - 803e70a: f9b7 3020 ldrsh.w r3, [r7, #32] -} - 803e70e: 4618 mov r0, r3 - 803e710: 3728 adds r7, #40 ; 0x28 - 803e712: 46bd mov sp, r7 - 803e714: bd80 pop {r7, pc} - 803e716: bf00 nop - 803e718: 2400e9b8 .word 0x2400e9b8 - 803e71c: 080445e8 .word 0x080445e8 - 803e720: 08044620 .word 0x08044620 - 803e724: 08044660 .word 0x08044660 - 803e728: 08044688 .word 0x08044688 - 803e72c: 080446a0 .word 0x080446a0 - 803e730: 080446b4 .word 0x080446b4 - -0803e734 : + 803e78e: f9b7 3020 ldrsh.w r3, [r7, #32] +} + 803e792: 4618 mov r0, r3 + 803e794: 3728 adds r7, #40 ; 0x28 + 803e796: 46bd mov sp, r7 + 803e798: bd80 pop {r7, pc} + 803e79a: bf00 nop + 803e79c: 2400e9c0 .word 0x2400e9c0 + 803e7a0: 08044668 .word 0x08044668 + 803e7a4: 080446a0 .word 0x080446a0 + 803e7a8: 080446e0 .word 0x080446e0 + 803e7ac: 08044708 .word 0x08044708 + 803e7b0: 08044720 .word 0x08044720 + 803e7b4: 08044734 .word 0x08044734 + +0803e7b8 : * * @see pbuf_free() */ static err_t etharp_update_arp_entry(struct netif *netif, const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags) { - 803e734: b580 push {r7, lr} - 803e736: b088 sub sp, #32 - 803e738: af02 add r7, sp, #8 - 803e73a: 60f8 str r0, [r7, #12] - 803e73c: 60b9 str r1, [r7, #8] - 803e73e: 607a str r2, [r7, #4] - 803e740: 70fb strb r3, [r7, #3] + 803e7b8: b580 push {r7, lr} + 803e7ba: b088 sub sp, #32 + 803e7bc: af02 add r7, sp, #8 + 803e7be: 60f8 str r0, [r7, #12] + 803e7c0: 60b9 str r1, [r7, #8] + 803e7c2: 607a str r2, [r7, #4] + 803e7c4: 70fb strb r3, [r7, #3] s16_t i; LWIP_ASSERT("netif->hwaddr_len == ETH_HWADDR_LEN", netif->hwaddr_len == ETH_HWADDR_LEN); - 803e742: 68fb ldr r3, [r7, #12] - 803e744: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 803e748: 2b06 cmp r3, #6 - 803e74a: d006 beq.n 803e75a - 803e74c: 4b48 ldr r3, [pc, #288] ; (803e870 ) - 803e74e: f240 12a9 movw r2, #425 ; 0x1a9 - 803e752: 4948 ldr r1, [pc, #288] ; (803e874 ) - 803e754: 4848 ldr r0, [pc, #288] ; (803e878 ) - 803e756: f002 f9db bl 8040b10 + 803e7c6: 68fb ldr r3, [r7, #12] + 803e7c8: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 + 803e7cc: 2b06 cmp r3, #6 + 803e7ce: d006 beq.n 803e7de + 803e7d0: 4b48 ldr r3, [pc, #288] ; (803e8f4 ) + 803e7d2: f240 12a9 movw r2, #425 ; 0x1a9 + 803e7d6: 4948 ldr r1, [pc, #288] ; (803e8f8 ) + 803e7d8: 4848 ldr r0, [pc, #288] ; (803e8fc ) + 803e7da: f002 f9db bl 8040b94 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n", ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr), (u16_t)ethaddr->addr[0], (u16_t)ethaddr->addr[1], (u16_t)ethaddr->addr[2], (u16_t)ethaddr->addr[3], (u16_t)ethaddr->addr[4], (u16_t)ethaddr->addr[5])); /* non-unicast address? */ if (ip4_addr_isany(ipaddr) || - 803e75a: 68bb ldr r3, [r7, #8] - 803e75c: 2b00 cmp r3, #0 - 803e75e: d012 beq.n 803e786 - 803e760: 68bb ldr r3, [r7, #8] - 803e762: 681b ldr r3, [r3, #0] - 803e764: 2b00 cmp r3, #0 - 803e766: d00e beq.n 803e786 + 803e7de: 68bb ldr r3, [r7, #8] + 803e7e0: 2b00 cmp r3, #0 + 803e7e2: d012 beq.n 803e80a + 803e7e4: 68bb ldr r3, [r7, #8] + 803e7e6: 681b ldr r3, [r3, #0] + 803e7e8: 2b00 cmp r3, #0 + 803e7ea: d00e beq.n 803e80a ip4_addr_isbroadcast(ipaddr, netif) || - 803e768: 68bb ldr r3, [r7, #8] - 803e76a: 681b ldr r3, [r3, #0] - 803e76c: 68f9 ldr r1, [r7, #12] - 803e76e: 4618 mov r0, r3 - 803e770: f001 f924 bl 803f9bc - 803e774: 4603 mov r3, r0 + 803e7ec: 68bb ldr r3, [r7, #8] + 803e7ee: 681b ldr r3, [r3, #0] + 803e7f0: 68f9 ldr r1, [r7, #12] + 803e7f2: 4618 mov r0, r3 + 803e7f4: f001 f924 bl 803fa40 + 803e7f8: 4603 mov r3, r0 if (ip4_addr_isany(ipaddr) || - 803e776: 2b00 cmp r3, #0 - 803e778: d105 bne.n 803e786 + 803e7fa: 2b00 cmp r3, #0 + 803e7fc: d105 bne.n 803e80a ip4_addr_ismulticast(ipaddr)) { - 803e77a: 68bb ldr r3, [r7, #8] - 803e77c: 681b ldr r3, [r3, #0] - 803e77e: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803e7fe: 68bb ldr r3, [r7, #8] + 803e800: 681b ldr r3, [r3, #0] + 803e802: f003 03f0 and.w r3, r3, #240 ; 0xf0 ip4_addr_isbroadcast(ipaddr, netif) || - 803e782: 2be0 cmp r3, #224 ; 0xe0 - 803e784: d102 bne.n 803e78c + 803e806: 2be0 cmp r3, #224 ; 0xe0 + 803e808: d102 bne.n 803e810 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: will not add non-unicast IP address to ARP cache\n")); return ERR_ARG; - 803e786: f06f 030f mvn.w r3, #15 - 803e78a: e06c b.n 803e866 + 803e80a: f06f 030f mvn.w r3, #15 + 803e80e: e06c b.n 803e8ea } /* find or create ARP entry */ i = etharp_find_entry(ipaddr, flags, netif); - 803e78c: 78fb ldrb r3, [r7, #3] - 803e78e: 68fa ldr r2, [r7, #12] - 803e790: 4619 mov r1, r3 - 803e792: 68b8 ldr r0, [r7, #8] - 803e794: f7ff fe56 bl 803e444 - 803e798: 4603 mov r3, r0 - 803e79a: 82fb strh r3, [r7, #22] + 803e810: 78fb ldrb r3, [r7, #3] + 803e812: 68fa ldr r2, [r7, #12] + 803e814: 4619 mov r1, r3 + 803e816: 68b8 ldr r0, [r7, #8] + 803e818: f7ff fe56 bl 803e4c8 + 803e81c: 4603 mov r3, r0 + 803e81e: 82fb strh r3, [r7, #22] /* bail out if no entry could be found */ if (i < 0) { - 803e79c: f9b7 3016 ldrsh.w r3, [r7, #22] - 803e7a0: 2b00 cmp r3, #0 - 803e7a2: da02 bge.n 803e7aa + 803e820: f9b7 3016 ldrsh.w r3, [r7, #22] + 803e824: 2b00 cmp r3, #0 + 803e826: da02 bge.n 803e82e return (err_t)i; - 803e7a4: 8afb ldrh r3, [r7, #22] - 803e7a6: b25b sxtb r3, r3 - 803e7a8: e05d b.n 803e866 + 803e828: 8afb ldrh r3, [r7, #22] + 803e82a: b25b sxtb r3, r3 + 803e82c: e05d b.n 803e8ea return ERR_VAL; } else #endif /* ETHARP_SUPPORT_STATIC_ENTRIES */ { /* mark it stable */ arp_table[i].state = ETHARP_STATE_STABLE; - 803e7aa: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e7ae: 4933 ldr r1, [pc, #204] ; (803e87c ) - 803e7b0: 4613 mov r3, r2 - 803e7b2: 005b lsls r3, r3, #1 - 803e7b4: 4413 add r3, r2 - 803e7b6: 00db lsls r3, r3, #3 - 803e7b8: 440b add r3, r1 - 803e7ba: 3314 adds r3, #20 - 803e7bc: 2202 movs r2, #2 - 803e7be: 701a strb r2, [r3, #0] + 803e82e: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e832: 4933 ldr r1, [pc, #204] ; (803e900 ) + 803e834: 4613 mov r3, r2 + 803e836: 005b lsls r3, r3, #1 + 803e838: 4413 add r3, r2 + 803e83a: 00db lsls r3, r3, #3 + 803e83c: 440b add r3, r1 + 803e83e: 3314 adds r3, #20 + 803e840: 2202 movs r2, #2 + 803e842: 701a strb r2, [r3, #0] } /* record network interface */ arp_table[i].netif = netif; - 803e7c0: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e7c4: 492d ldr r1, [pc, #180] ; (803e87c ) - 803e7c6: 4613 mov r3, r2 - 803e7c8: 005b lsls r3, r3, #1 - 803e7ca: 4413 add r3, r2 - 803e7cc: 00db lsls r3, r3, #3 - 803e7ce: 440b add r3, r1 - 803e7d0: 3308 adds r3, #8 - 803e7d2: 68fa ldr r2, [r7, #12] - 803e7d4: 601a str r2, [r3, #0] + 803e844: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e848: 492d ldr r1, [pc, #180] ; (803e900 ) + 803e84a: 4613 mov r3, r2 + 803e84c: 005b lsls r3, r3, #1 + 803e84e: 4413 add r3, r2 + 803e850: 00db lsls r3, r3, #3 + 803e852: 440b add r3, r1 + 803e854: 3308 adds r3, #8 + 803e856: 68fa ldr r2, [r7, #12] + 803e858: 601a str r2, [r3, #0] /* insert in SNMP ARP index tree */ mib2_add_arp_entry(netif, &arp_table[i].ipaddr); LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: updating stable entry %"S16_F"\n", i)); /* update address */ SMEMCPY(&arp_table[i].ethaddr, ethaddr, ETH_HWADDR_LEN); - 803e7d6: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e7da: 4613 mov r3, r2 - 803e7dc: 005b lsls r3, r3, #1 - 803e7de: 4413 add r3, r2 - 803e7e0: 00db lsls r3, r3, #3 - 803e7e2: 3308 adds r3, #8 - 803e7e4: 4a25 ldr r2, [pc, #148] ; (803e87c ) - 803e7e6: 4413 add r3, r2 - 803e7e8: 3304 adds r3, #4 - 803e7ea: 2206 movs r2, #6 - 803e7ec: 6879 ldr r1, [r7, #4] - 803e7ee: 4618 mov r0, r3 - 803e7f0: f002 f87e bl 80408f0 + 803e85a: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e85e: 4613 mov r3, r2 + 803e860: 005b lsls r3, r3, #1 + 803e862: 4413 add r3, r2 + 803e864: 00db lsls r3, r3, #3 + 803e866: 3308 adds r3, #8 + 803e868: 4a25 ldr r2, [pc, #148] ; (803e900 ) + 803e86a: 4413 add r3, r2 + 803e86c: 3304 adds r3, #4 + 803e86e: 2206 movs r2, #6 + 803e870: 6879 ldr r1, [r7, #4] + 803e872: 4618 mov r0, r3 + 803e874: f002 f87e bl 8040974 /* reset time stamp */ arp_table[i].ctime = 0; - 803e7f4: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e7f8: 4920 ldr r1, [pc, #128] ; (803e87c ) - 803e7fa: 4613 mov r3, r2 - 803e7fc: 005b lsls r3, r3, #1 - 803e7fe: 4413 add r3, r2 - 803e800: 00db lsls r3, r3, #3 - 803e802: 440b add r3, r1 - 803e804: 3312 adds r3, #18 - 803e806: 2200 movs r2, #0 - 803e808: 801a strh r2, [r3, #0] + 803e878: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e87c: 4920 ldr r1, [pc, #128] ; (803e900 ) + 803e87e: 4613 mov r3, r2 + 803e880: 005b lsls r3, r3, #1 + 803e882: 4413 add r3, r2 + 803e884: 00db lsls r3, r3, #3 + 803e886: 440b add r3, r1 + 803e888: 3312 adds r3, #18 + 803e88a: 2200 movs r2, #0 + 803e88c: 801a strh r2, [r3, #0] /* get the packet pointer */ p = q->p; /* now queue entry can be freed */ memp_free(MEMP_ARP_QUEUE, q); #else /* ARP_QUEUEING */ if (arp_table[i].q != NULL) { - 803e80a: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e80e: 491b ldr r1, [pc, #108] ; (803e87c ) - 803e810: 4613 mov r3, r2 - 803e812: 005b lsls r3, r3, #1 - 803e814: 4413 add r3, r2 - 803e816: 00db lsls r3, r3, #3 - 803e818: 440b add r3, r1 - 803e81a: 681b ldr r3, [r3, #0] - 803e81c: 2b00 cmp r3, #0 - 803e81e: d021 beq.n 803e864 + 803e88e: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e892: 491b ldr r1, [pc, #108] ; (803e900 ) + 803e894: 4613 mov r3, r2 + 803e896: 005b lsls r3, r3, #1 + 803e898: 4413 add r3, r2 + 803e89a: 00db lsls r3, r3, #3 + 803e89c: 440b add r3, r1 + 803e89e: 681b ldr r3, [r3, #0] + 803e8a0: 2b00 cmp r3, #0 + 803e8a2: d021 beq.n 803e8e8 struct pbuf *p = arp_table[i].q; - 803e820: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e824: 4915 ldr r1, [pc, #84] ; (803e87c ) - 803e826: 4613 mov r3, r2 - 803e828: 005b lsls r3, r3, #1 - 803e82a: 4413 add r3, r2 - 803e82c: 00db lsls r3, r3, #3 - 803e82e: 440b add r3, r1 - 803e830: 681b ldr r3, [r3, #0] - 803e832: 613b str r3, [r7, #16] + 803e8a4: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e8a8: 4915 ldr r1, [pc, #84] ; (803e900 ) + 803e8aa: 4613 mov r3, r2 + 803e8ac: 005b lsls r3, r3, #1 + 803e8ae: 4413 add r3, r2 + 803e8b0: 00db lsls r3, r3, #3 + 803e8b2: 440b add r3, r1 + 803e8b4: 681b ldr r3, [r3, #0] + 803e8b6: 613b str r3, [r7, #16] arp_table[i].q = NULL; - 803e834: f9b7 2016 ldrsh.w r2, [r7, #22] - 803e838: 4910 ldr r1, [pc, #64] ; (803e87c ) - 803e83a: 4613 mov r3, r2 - 803e83c: 005b lsls r3, r3, #1 - 803e83e: 4413 add r3, r2 - 803e840: 00db lsls r3, r3, #3 - 803e842: 440b add r3, r1 - 803e844: 2200 movs r2, #0 - 803e846: 601a str r2, [r3, #0] + 803e8b8: f9b7 2016 ldrsh.w r2, [r7, #22] + 803e8bc: 4910 ldr r1, [pc, #64] ; (803e900 ) + 803e8be: 4613 mov r3, r2 + 803e8c0: 005b lsls r3, r3, #1 + 803e8c2: 4413 add r3, r2 + 803e8c4: 00db lsls r3, r3, #3 + 803e8c6: 440b add r3, r1 + 803e8c8: 2200 movs r2, #0 + 803e8ca: 601a str r2, [r3, #0] #endif /* ARP_QUEUEING */ /* send the queued IP packet */ ethernet_output(netif, p, (struct eth_addr *)(netif->hwaddr), ethaddr, ETHTYPE_IP); - 803e848: 68fb ldr r3, [r7, #12] - 803e84a: f103 022a add.w r2, r3, #42 ; 0x2a - 803e84e: f44f 6300 mov.w r3, #2048 ; 0x800 - 803e852: 9300 str r3, [sp, #0] - 803e854: 687b ldr r3, [r7, #4] - 803e856: 6939 ldr r1, [r7, #16] - 803e858: 68f8 ldr r0, [r7, #12] - 803e85a: f001 ffbd bl 80407d8 + 803e8cc: 68fb ldr r3, [r7, #12] + 803e8ce: f103 022a add.w r2, r3, #42 ; 0x2a + 803e8d2: f44f 6300 mov.w r3, #2048 ; 0x800 + 803e8d6: 9300 str r3, [sp, #0] + 803e8d8: 687b ldr r3, [r7, #4] + 803e8da: 6939 ldr r1, [r7, #16] + 803e8dc: 68f8 ldr r0, [r7, #12] + 803e8de: f001 ffbd bl 804085c /* free the queued IP packet */ pbuf_free(p); - 803e85e: 6938 ldr r0, [r7, #16] - 803e860: f7f8 ff6c bl 803773c + 803e8e2: 6938 ldr r0, [r7, #16] + 803e8e4: f7f8 ff6c bl 80377c0 } return ERR_OK; - 803e864: 2300 movs r3, #0 -} - 803e866: 4618 mov r0, r3 - 803e868: 3718 adds r7, #24 - 803e86a: 46bd mov sp, r7 - 803e86c: bd80 pop {r7, pc} - 803e86e: bf00 nop - 803e870: 080445e8 .word 0x080445e8 - 803e874: 080446e0 .word 0x080446e0 - 803e878: 08044660 .word 0x08044660 - 803e87c: 2400e9b8 .word 0x2400e9b8 - -0803e880 : + 803e8e8: 2300 movs r3, #0 +} + 803e8ea: 4618 mov r0, r3 + 803e8ec: 3718 adds r7, #24 + 803e8ee: 46bd mov sp, r7 + 803e8f0: bd80 pop {r7, pc} + 803e8f2: bf00 nop + 803e8f4: 08044668 .word 0x08044668 + 803e8f8: 08044760 .word 0x08044760 + 803e8fc: 080446e0 .word 0x080446e0 + 803e900: 2400e9c0 .word 0x2400e9c0 + +0803e904 : * * @param netif points to a network interface */ void etharp_cleanup_netif(struct netif *netif) { - 803e880: b580 push {r7, lr} - 803e882: b084 sub sp, #16 - 803e884: af00 add r7, sp, #0 - 803e886: 6078 str r0, [r7, #4] + 803e904: b580 push {r7, lr} + 803e906: b084 sub sp, #16 + 803e908: af00 add r7, sp, #0 + 803e90a: 6078 str r0, [r7, #4] int i; for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e888: 2300 movs r3, #0 - 803e88a: 60fb str r3, [r7, #12] - 803e88c: e01e b.n 803e8cc + 803e90c: 2300 movs r3, #0 + 803e90e: 60fb str r3, [r7, #12] + 803e910: e01e b.n 803e950 u8_t state = arp_table[i].state; - 803e88e: 4913 ldr r1, [pc, #76] ; (803e8dc ) - 803e890: 68fa ldr r2, [r7, #12] - 803e892: 4613 mov r3, r2 - 803e894: 005b lsls r3, r3, #1 - 803e896: 4413 add r3, r2 - 803e898: 00db lsls r3, r3, #3 - 803e89a: 440b add r3, r1 - 803e89c: 3314 adds r3, #20 - 803e89e: 781b ldrb r3, [r3, #0] - 803e8a0: 72fb strb r3, [r7, #11] + 803e912: 4913 ldr r1, [pc, #76] ; (803e960 ) + 803e914: 68fa ldr r2, [r7, #12] + 803e916: 4613 mov r3, r2 + 803e918: 005b lsls r3, r3, #1 + 803e91a: 4413 add r3, r2 + 803e91c: 00db lsls r3, r3, #3 + 803e91e: 440b add r3, r1 + 803e920: 3314 adds r3, #20 + 803e922: 781b ldrb r3, [r3, #0] + 803e924: 72fb strb r3, [r7, #11] if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) { - 803e8a2: 7afb ldrb r3, [r7, #11] - 803e8a4: 2b00 cmp r3, #0 - 803e8a6: d00e beq.n 803e8c6 - 803e8a8: 490c ldr r1, [pc, #48] ; (803e8dc ) - 803e8aa: 68fa ldr r2, [r7, #12] - 803e8ac: 4613 mov r3, r2 - 803e8ae: 005b lsls r3, r3, #1 - 803e8b0: 4413 add r3, r2 - 803e8b2: 00db lsls r3, r3, #3 - 803e8b4: 440b add r3, r1 - 803e8b6: 3308 adds r3, #8 - 803e8b8: 681b ldr r3, [r3, #0] - 803e8ba: 687a ldr r2, [r7, #4] - 803e8bc: 429a cmp r2, r3 - 803e8be: d102 bne.n 803e8c6 + 803e926: 7afb ldrb r3, [r7, #11] + 803e928: 2b00 cmp r3, #0 + 803e92a: d00e beq.n 803e94a + 803e92c: 490c ldr r1, [pc, #48] ; (803e960 ) + 803e92e: 68fa ldr r2, [r7, #12] + 803e930: 4613 mov r3, r2 + 803e932: 005b lsls r3, r3, #1 + 803e934: 4413 add r3, r2 + 803e936: 00db lsls r3, r3, #3 + 803e938: 440b add r3, r1 + 803e93a: 3308 adds r3, #8 + 803e93c: 681b ldr r3, [r3, #0] + 803e93e: 687a ldr r2, [r7, #4] + 803e940: 429a cmp r2, r3 + 803e942: d102 bne.n 803e94a etharp_free_entry(i); - 803e8c0: 68f8 ldr r0, [r7, #12] - 803e8c2: f7ff fce5 bl 803e290 + 803e944: 68f8 ldr r0, [r7, #12] + 803e946: f7ff fce5 bl 803e314 for (i = 0; i < ARP_TABLE_SIZE; ++i) { - 803e8c6: 68fb ldr r3, [r7, #12] - 803e8c8: 3301 adds r3, #1 - 803e8ca: 60fb str r3, [r7, #12] - 803e8cc: 68fb ldr r3, [r7, #12] - 803e8ce: 2b09 cmp r3, #9 - 803e8d0: dddd ble.n 803e88e + 803e94a: 68fb ldr r3, [r7, #12] + 803e94c: 3301 adds r3, #1 + 803e94e: 60fb str r3, [r7, #12] + 803e950: 68fb ldr r3, [r7, #12] + 803e952: 2b09 cmp r3, #9 + 803e954: dddd ble.n 803e912 } } } - 803e8d2: bf00 nop - 803e8d4: bf00 nop - 803e8d6: 3710 adds r7, #16 - 803e8d8: 46bd mov sp, r7 - 803e8da: bd80 pop {r7, pc} - 803e8dc: 2400e9b8 .word 0x2400e9b8 + 803e956: bf00 nop + 803e958: bf00 nop + 803e95a: 3710 adds r7, #16 + 803e95c: 46bd mov sp, r7 + 803e95e: bd80 pop {r7, pc} + 803e960: 2400e9c0 .word 0x2400e9c0 -0803e8e0 : +0803e964 : * * @see pbuf_free() */ void etharp_input(struct pbuf *p, struct netif *netif) { - 803e8e0: b5b0 push {r4, r5, r7, lr} - 803e8e2: b08a sub sp, #40 ; 0x28 - 803e8e4: af04 add r7, sp, #16 - 803e8e6: 6078 str r0, [r7, #4] - 803e8e8: 6039 str r1, [r7, #0] + 803e964: b5b0 push {r4, r5, r7, lr} + 803e966: b08a sub sp, #40 ; 0x28 + 803e968: af04 add r7, sp, #16 + 803e96a: 6078 str r0, [r7, #4] + 803e96c: 6039 str r1, [r7, #0] ip4_addr_t sipaddr, dipaddr; u8_t for_us; LWIP_ASSERT_CORE_LOCKED(); LWIP_ERROR("netif != NULL", (netif != NULL), return;); - 803e8ea: 683b ldr r3, [r7, #0] - 803e8ec: 2b00 cmp r3, #0 - 803e8ee: d107 bne.n 803e900 - 803e8f0: 4b3d ldr r3, [pc, #244] ; (803e9e8 ) - 803e8f2: f240 228a movw r2, #650 ; 0x28a - 803e8f6: 493d ldr r1, [pc, #244] ; (803e9ec ) - 803e8f8: 483d ldr r0, [pc, #244] ; (803e9f0 ) - 803e8fa: f002 f909 bl 8040b10 - 803e8fe: e06f b.n 803e9e0 + 803e96e: 683b ldr r3, [r7, #0] + 803e970: 2b00 cmp r3, #0 + 803e972: d107 bne.n 803e984 + 803e974: 4b3d ldr r3, [pc, #244] ; (803ea6c ) + 803e976: f240 228a movw r2, #650 ; 0x28a + 803e97a: 493d ldr r1, [pc, #244] ; (803ea70 ) + 803e97c: 483d ldr r0, [pc, #244] ; (803ea74 ) + 803e97e: f002 f909 bl 8040b94 + 803e982: e06f b.n 803ea64 hdr = (struct etharp_hdr *)p->payload; - 803e900: 687b ldr r3, [r7, #4] - 803e902: 685b ldr r3, [r3, #4] - 803e904: 613b str r3, [r7, #16] + 803e984: 687b ldr r3, [r7, #4] + 803e986: 685b ldr r3, [r3, #4] + 803e988: 613b str r3, [r7, #16] /* RFC 826 "Packet Reception": */ if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) || - 803e906: 693b ldr r3, [r7, #16] - 803e908: 881b ldrh r3, [r3, #0] - 803e90a: b29b uxth r3, r3 - 803e90c: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803e910: d10c bne.n 803e92c + 803e98a: 693b ldr r3, [r7, #16] + 803e98c: 881b ldrh r3, [r3, #0] + 803e98e: b29b uxth r3, r3 + 803e990: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 803e994: d10c bne.n 803e9b0 (hdr->hwlen != ETH_HWADDR_LEN) || - 803e912: 693b ldr r3, [r7, #16] - 803e914: 791b ldrb r3, [r3, #4] + 803e996: 693b ldr r3, [r7, #16] + 803e998: 791b ldrb r3, [r3, #4] if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) || - 803e916: 2b06 cmp r3, #6 - 803e918: d108 bne.n 803e92c + 803e99a: 2b06 cmp r3, #6 + 803e99c: d108 bne.n 803e9b0 (hdr->protolen != sizeof(ip4_addr_t)) || - 803e91a: 693b ldr r3, [r7, #16] - 803e91c: 795b ldrb r3, [r3, #5] + 803e99e: 693b ldr r3, [r7, #16] + 803e9a0: 795b ldrb r3, [r3, #5] (hdr->hwlen != ETH_HWADDR_LEN) || - 803e91e: 2b04 cmp r3, #4 - 803e920: d104 bne.n 803e92c + 803e9a2: 2b04 cmp r3, #4 + 803e9a4: d104 bne.n 803e9b0 (hdr->proto != PP_HTONS(ETHTYPE_IP))) { - 803e922: 693b ldr r3, [r7, #16] - 803e924: 885b ldrh r3, [r3, #2] - 803e926: b29b uxth r3, r3 + 803e9a6: 693b ldr r3, [r7, #16] + 803e9a8: 885b ldrh r3, [r3, #2] + 803e9aa: b29b uxth r3, r3 (hdr->protolen != sizeof(ip4_addr_t)) || - 803e928: 2b08 cmp r3, #8 - 803e92a: d003 beq.n 803e934 + 803e9ac: 2b08 cmp r3, #8 + 803e9ae: d003 beq.n 803e9b8 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("etharp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n", hdr->hwtype, (u16_t)hdr->hwlen, hdr->proto, (u16_t)hdr->protolen)); ETHARP_STATS_INC(etharp.proterr); ETHARP_STATS_INC(etharp.drop); pbuf_free(p); - 803e92c: 6878 ldr r0, [r7, #4] - 803e92e: f7f8 ff05 bl 803773c + 803e9b0: 6878 ldr r0, [r7, #4] + 803e9b2: f7f8 ff05 bl 80377c0 return; - 803e932: e055 b.n 803e9e0 + 803e9b6: e055 b.n 803ea64 autoip_arp_reply(netif, hdr); #endif /* LWIP_AUTOIP */ /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without * structure packing (not using structure copy which breaks strict-aliasing rules). */ IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&sipaddr, &hdr->sipaddr); - 803e934: 693b ldr r3, [r7, #16] - 803e936: 330e adds r3, #14 - 803e938: 681b ldr r3, [r3, #0] - 803e93a: 60fb str r3, [r7, #12] + 803e9b8: 693b ldr r3, [r7, #16] + 803e9ba: 330e adds r3, #14 + 803e9bc: 681b ldr r3, [r3, #0] + 803e9be: 60fb str r3, [r7, #12] IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&dipaddr, &hdr->dipaddr); - 803e93c: 693b ldr r3, [r7, #16] - 803e93e: 3318 adds r3, #24 - 803e940: 681b ldr r3, [r3, #0] - 803e942: 60bb str r3, [r7, #8] + 803e9c0: 693b ldr r3, [r7, #16] + 803e9c2: 3318 adds r3, #24 + 803e9c4: 681b ldr r3, [r3, #0] + 803e9c6: 60bb str r3, [r7, #8] /* this interface is not configured? */ if (ip4_addr_isany_val(*netif_ip4_addr(netif))) { - 803e944: 683b ldr r3, [r7, #0] - 803e946: 3304 adds r3, #4 - 803e948: 681b ldr r3, [r3, #0] - 803e94a: 2b00 cmp r3, #0 - 803e94c: d102 bne.n 803e954 + 803e9c8: 683b ldr r3, [r7, #0] + 803e9ca: 3304 adds r3, #4 + 803e9cc: 681b ldr r3, [r3, #0] + 803e9ce: 2b00 cmp r3, #0 + 803e9d0: d102 bne.n 803e9d8 for_us = 0; - 803e94e: 2300 movs r3, #0 - 803e950: 75fb strb r3, [r7, #23] - 803e952: e009 b.n 803e968 + 803e9d2: 2300 movs r3, #0 + 803e9d4: 75fb strb r3, [r7, #23] + 803e9d6: e009 b.n 803e9ec } else { /* ARP packet directed to us? */ for_us = (u8_t)ip4_addr_cmp(&dipaddr, netif_ip4_addr(netif)); - 803e954: 68ba ldr r2, [r7, #8] - 803e956: 683b ldr r3, [r7, #0] - 803e958: 3304 adds r3, #4 - 803e95a: 681b ldr r3, [r3, #0] - 803e95c: 429a cmp r2, r3 - 803e95e: bf0c ite eq - 803e960: 2301 moveq r3, #1 - 803e962: 2300 movne r3, #0 - 803e964: b2db uxtb r3, r3 - 803e966: 75fb strb r3, [r7, #23] + 803e9d8: 68ba ldr r2, [r7, #8] + 803e9da: 683b ldr r3, [r7, #0] + 803e9dc: 3304 adds r3, #4 + 803e9de: 681b ldr r3, [r3, #0] + 803e9e0: 429a cmp r2, r3 + 803e9e2: bf0c ite eq + 803e9e4: 2301 moveq r3, #1 + 803e9e6: 2300 movne r3, #0 + 803e9e8: b2db uxtb r3, r3 + 803e9ea: 75fb strb r3, [r7, #23] /* ARP message directed to us? -> add IP address in ARP cache; assume requester wants to talk to us, can result in directly sending the queued packets for this host. ARP message not directed to us? -> update the source IP address in the cache, if present */ etharp_update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), - 803e968: 693b ldr r3, [r7, #16] - 803e96a: f103 0208 add.w r2, r3, #8 - 803e96e: 7dfb ldrb r3, [r7, #23] - 803e970: 2b00 cmp r3, #0 - 803e972: d001 beq.n 803e978 - 803e974: 2301 movs r3, #1 - 803e976: e000 b.n 803e97a - 803e978: 2302 movs r3, #2 - 803e97a: f107 010c add.w r1, r7, #12 - 803e97e: 6838 ldr r0, [r7, #0] - 803e980: f7ff fed8 bl 803e734 + 803e9ec: 693b ldr r3, [r7, #16] + 803e9ee: f103 0208 add.w r2, r3, #8 + 803e9f2: 7dfb ldrb r3, [r7, #23] + 803e9f4: 2b00 cmp r3, #0 + 803e9f6: d001 beq.n 803e9fc + 803e9f8: 2301 movs r3, #1 + 803e9fa: e000 b.n 803e9fe + 803e9fc: 2302 movs r3, #2 + 803e9fe: f107 010c add.w r1, r7, #12 + 803ea02: 6838 ldr r0, [r7, #0] + 803ea04: f7ff fed8 bl 803e7b8 for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY); /* now act on the message itself */ switch (hdr->opcode) { - 803e984: 693b ldr r3, [r7, #16] - 803e986: 88db ldrh r3, [r3, #6] - 803e988: b29b uxth r3, r3 - 803e98a: f5b3 7f80 cmp.w r3, #256 ; 0x100 - 803e98e: d003 beq.n 803e998 - 803e990: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 803e994: d01e beq.n 803e9d4 + 803ea08: 693b ldr r3, [r7, #16] + 803ea0a: 88db ldrh r3, [r3, #6] + 803ea0c: b29b uxth r3, r3 + 803ea0e: f5b3 7f80 cmp.w r3, #256 ; 0x100 + 803ea12: d003 beq.n 803ea1c + 803ea14: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 803ea18: d01e beq.n 803ea58 #endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */ break; default: LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_input: ARP unknown opcode type %"S16_F"\n", lwip_htons(hdr->opcode))); ETHARP_STATS_INC(etharp.err); break; - 803e996: e020 b.n 803e9da + 803ea1a: e020 b.n 803ea5e if (for_us) { - 803e998: 7dfb ldrb r3, [r7, #23] - 803e99a: 2b00 cmp r3, #0 - 803e99c: d01c beq.n 803e9d8 + 803ea1c: 7dfb ldrb r3, [r7, #23] + 803ea1e: 2b00 cmp r3, #0 + 803ea20: d01c beq.n 803ea5c (struct eth_addr *)netif->hwaddr, &hdr->shwaddr, - 803e99e: 683b ldr r3, [r7, #0] - 803e9a0: f103 002a add.w r0, r3, #42 ; 0x2a - 803e9a4: 693b ldr r3, [r7, #16] - 803e9a6: f103 0408 add.w r4, r3, #8 + 803ea22: 683b ldr r3, [r7, #0] + 803ea24: f103 002a add.w r0, r3, #42 ; 0x2a + 803ea28: 693b ldr r3, [r7, #16] + 803ea2a: f103 0408 add.w r4, r3, #8 (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), - 803e9aa: 683b ldr r3, [r7, #0] - 803e9ac: f103 052a add.w r5, r3, #42 ; 0x2a - 803e9b0: 683b ldr r3, [r7, #0] - 803e9b2: 3304 adds r3, #4 + 803ea2e: 683b ldr r3, [r7, #0] + 803ea30: f103 052a add.w r5, r3, #42 ; 0x2a + 803ea34: 683b ldr r3, [r7, #0] + 803ea36: 3304 adds r3, #4 &hdr->shwaddr, &sipaddr, - 803e9b4: 693a ldr r2, [r7, #16] - 803e9b6: 3208 adds r2, #8 + 803ea38: 693a ldr r2, [r7, #16] + 803ea3a: 3208 adds r2, #8 etharp_raw(netif, - 803e9b8: 2102 movs r1, #2 - 803e9ba: 9103 str r1, [sp, #12] - 803e9bc: f107 010c add.w r1, r7, #12 - 803e9c0: 9102 str r1, [sp, #8] - 803e9c2: 9201 str r2, [sp, #4] - 803e9c4: 9300 str r3, [sp, #0] - 803e9c6: 462b mov r3, r5 - 803e9c8: 4622 mov r2, r4 - 803e9ca: 4601 mov r1, r0 - 803e9cc: 6838 ldr r0, [r7, #0] - 803e9ce: f000 faeb bl 803efa8 + 803ea3c: 2102 movs r1, #2 + 803ea3e: 9103 str r1, [sp, #12] + 803ea40: f107 010c add.w r1, r7, #12 + 803ea44: 9102 str r1, [sp, #8] + 803ea46: 9201 str r2, [sp, #4] + 803ea48: 9300 str r3, [sp, #0] + 803ea4a: 462b mov r3, r5 + 803ea4c: 4622 mov r2, r4 + 803ea4e: 4601 mov r1, r0 + 803ea50: 6838 ldr r0, [r7, #0] + 803ea52: f000 faeb bl 803f02c break; - 803e9d2: e001 b.n 803e9d8 + 803ea56: e001 b.n 803ea5c break; - 803e9d4: bf00 nop - 803e9d6: e000 b.n 803e9da + 803ea58: bf00 nop + 803ea5a: e000 b.n 803ea5e break; - 803e9d8: bf00 nop + 803ea5c: bf00 nop } /* free ARP packet */ pbuf_free(p); - 803e9da: 6878 ldr r0, [r7, #4] - 803e9dc: f7f8 feae bl 803773c -} - 803e9e0: 3718 adds r7, #24 - 803e9e2: 46bd mov sp, r7 - 803e9e4: bdb0 pop {r4, r5, r7, pc} - 803e9e6: bf00 nop - 803e9e8: 080445e8 .word 0x080445e8 - 803e9ec: 08044738 .word 0x08044738 - 803e9f0: 08044660 .word 0x08044660 - -0803e9f4 : + 803ea5e: 6878 ldr r0, [r7, #4] + 803ea60: f7f8 feae bl 80377c0 +} + 803ea64: 3718 adds r7, #24 + 803ea66: 46bd mov sp, r7 + 803ea68: bdb0 pop {r4, r5, r7, pc} + 803ea6a: bf00 nop + 803ea6c: 08044668 .word 0x08044668 + 803ea70: 080447b8 .word 0x080447b8 + 803ea74: 080446e0 .word 0x080446e0 + +0803ea78 : /** Just a small helper function that sends a pbuf to an ethernet address * in the arp_table specified by the index 'arp_idx'. */ static err_t etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, netif_addr_idx_t arp_idx) { - 803e9f4: b580 push {r7, lr} - 803e9f6: b086 sub sp, #24 - 803e9f8: af02 add r7, sp, #8 - 803e9fa: 60f8 str r0, [r7, #12] - 803e9fc: 60b9 str r1, [r7, #8] - 803e9fe: 4613 mov r3, r2 - 803ea00: 71fb strb r3, [r7, #7] + 803ea78: b580 push {r7, lr} + 803ea7a: b086 sub sp, #24 + 803ea7c: af02 add r7, sp, #8 + 803ea7e: 60f8 str r0, [r7, #12] + 803ea80: 60b9 str r1, [r7, #8] + 803ea82: 4613 mov r3, r2 + 803ea84: 71fb strb r3, [r7, #7] LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE", - 803ea02: 79fa ldrb r2, [r7, #7] - 803ea04: 4944 ldr r1, [pc, #272] ; (803eb18 ) - 803ea06: 4613 mov r3, r2 - 803ea08: 005b lsls r3, r3, #1 - 803ea0a: 4413 add r3, r2 - 803ea0c: 00db lsls r3, r3, #3 - 803ea0e: 440b add r3, r1 - 803ea10: 3314 adds r3, #20 - 803ea12: 781b ldrb r3, [r3, #0] - 803ea14: 2b01 cmp r3, #1 - 803ea16: d806 bhi.n 803ea26 - 803ea18: 4b40 ldr r3, [pc, #256] ; (803eb1c ) - 803ea1a: f240 22ee movw r2, #750 ; 0x2ee - 803ea1e: 4940 ldr r1, [pc, #256] ; (803eb20 ) - 803ea20: 4840 ldr r0, [pc, #256] ; (803eb24 ) - 803ea22: f002 f875 bl 8040b10 + 803ea86: 79fa ldrb r2, [r7, #7] + 803ea88: 4944 ldr r1, [pc, #272] ; (803eb9c ) + 803ea8a: 4613 mov r3, r2 + 803ea8c: 005b lsls r3, r3, #1 + 803ea8e: 4413 add r3, r2 + 803ea90: 00db lsls r3, r3, #3 + 803ea92: 440b add r3, r1 + 803ea94: 3314 adds r3, #20 + 803ea96: 781b ldrb r3, [r3, #0] + 803ea98: 2b01 cmp r3, #1 + 803ea9a: d806 bhi.n 803eaaa + 803ea9c: 4b40 ldr r3, [pc, #256] ; (803eba0 ) + 803ea9e: f240 22ee movw r2, #750 ; 0x2ee + 803eaa2: 4940 ldr r1, [pc, #256] ; (803eba4 ) + 803eaa4: 4840 ldr r0, [pc, #256] ; (803eba8 ) + 803eaa6: f002 f875 bl 8040b94 arp_table[arp_idx].state >= ETHARP_STATE_STABLE); /* if arp table entry is about to expire: re-request it, but only if its state is ETHARP_STATE_STABLE to prevent flooding the network with ARP requests if this address is used frequently. */ if (arp_table[arp_idx].state == ETHARP_STATE_STABLE) { - 803ea26: 79fa ldrb r2, [r7, #7] - 803ea28: 493b ldr r1, [pc, #236] ; (803eb18 ) - 803ea2a: 4613 mov r3, r2 - 803ea2c: 005b lsls r3, r3, #1 - 803ea2e: 4413 add r3, r2 - 803ea30: 00db lsls r3, r3, #3 - 803ea32: 440b add r3, r1 - 803ea34: 3314 adds r3, #20 - 803ea36: 781b ldrb r3, [r3, #0] - 803ea38: 2b02 cmp r3, #2 - 803ea3a: d153 bne.n 803eae4 + 803eaaa: 79fa ldrb r2, [r7, #7] + 803eaac: 493b ldr r1, [pc, #236] ; (803eb9c ) + 803eaae: 4613 mov r3, r2 + 803eab0: 005b lsls r3, r3, #1 + 803eab2: 4413 add r3, r2 + 803eab4: 00db lsls r3, r3, #3 + 803eab6: 440b add r3, r1 + 803eab8: 3314 adds r3, #20 + 803eaba: 781b ldrb r3, [r3, #0] + 803eabc: 2b02 cmp r3, #2 + 803eabe: d153 bne.n 803eb68 if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_BROADCAST) { - 803ea3c: 79fa ldrb r2, [r7, #7] - 803ea3e: 4936 ldr r1, [pc, #216] ; (803eb18 ) - 803ea40: 4613 mov r3, r2 - 803ea42: 005b lsls r3, r3, #1 - 803ea44: 4413 add r3, r2 - 803ea46: 00db lsls r3, r3, #3 - 803ea48: 440b add r3, r1 - 803ea4a: 3312 adds r3, #18 - 803ea4c: 881b ldrh r3, [r3, #0] - 803ea4e: f5b3 7f8e cmp.w r3, #284 ; 0x11c - 803ea52: d919 bls.n 803ea88 + 803eac0: 79fa ldrb r2, [r7, #7] + 803eac2: 4936 ldr r1, [pc, #216] ; (803eb9c ) + 803eac4: 4613 mov r3, r2 + 803eac6: 005b lsls r3, r3, #1 + 803eac8: 4413 add r3, r2 + 803eaca: 00db lsls r3, r3, #3 + 803eacc: 440b add r3, r1 + 803eace: 3312 adds r3, #18 + 803ead0: 881b ldrh r3, [r3, #0] + 803ead2: f5b3 7f8e cmp.w r3, #284 ; 0x11c + 803ead6: d919 bls.n 803eb0c /* issue a standard request using broadcast */ if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) { - 803ea54: 79fa ldrb r2, [r7, #7] - 803ea56: 4613 mov r3, r2 - 803ea58: 005b lsls r3, r3, #1 - 803ea5a: 4413 add r3, r2 - 803ea5c: 00db lsls r3, r3, #3 - 803ea5e: 4a2e ldr r2, [pc, #184] ; (803eb18 ) - 803ea60: 4413 add r3, r2 - 803ea62: 3304 adds r3, #4 - 803ea64: 4619 mov r1, r3 - 803ea66: 68f8 ldr r0, [r7, #12] - 803ea68: f000 fb4c bl 803f104 - 803ea6c: 4603 mov r3, r0 - 803ea6e: 2b00 cmp r3, #0 - 803ea70: d138 bne.n 803eae4 + 803ead8: 79fa ldrb r2, [r7, #7] + 803eada: 4613 mov r3, r2 + 803eadc: 005b lsls r3, r3, #1 + 803eade: 4413 add r3, r2 + 803eae0: 00db lsls r3, r3, #3 + 803eae2: 4a2e ldr r2, [pc, #184] ; (803eb9c ) + 803eae4: 4413 add r3, r2 + 803eae6: 3304 adds r3, #4 + 803eae8: 4619 mov r1, r3 + 803eaea: 68f8 ldr r0, [r7, #12] + 803eaec: f000 fb4c bl 803f188 + 803eaf0: 4603 mov r3, r0 + 803eaf2: 2b00 cmp r3, #0 + 803eaf4: d138 bne.n 803eb68 arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1; - 803ea72: 79fa ldrb r2, [r7, #7] - 803ea74: 4928 ldr r1, [pc, #160] ; (803eb18 ) - 803ea76: 4613 mov r3, r2 - 803ea78: 005b lsls r3, r3, #1 - 803ea7a: 4413 add r3, r2 - 803ea7c: 00db lsls r3, r3, #3 - 803ea7e: 440b add r3, r1 - 803ea80: 3314 adds r3, #20 - 803ea82: 2203 movs r2, #3 - 803ea84: 701a strb r2, [r3, #0] - 803ea86: e02d b.n 803eae4 + 803eaf6: 79fa ldrb r2, [r7, #7] + 803eaf8: 4928 ldr r1, [pc, #160] ; (803eb9c ) + 803eafa: 4613 mov r3, r2 + 803eafc: 005b lsls r3, r3, #1 + 803eafe: 4413 add r3, r2 + 803eb00: 00db lsls r3, r3, #3 + 803eb02: 440b add r3, r1 + 803eb04: 3314 adds r3, #20 + 803eb06: 2203 movs r2, #3 + 803eb08: 701a strb r2, [r3, #0] + 803eb0a: e02d b.n 803eb68 } } else if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_UNICAST) { - 803ea88: 79fa ldrb r2, [r7, #7] - 803ea8a: 4923 ldr r1, [pc, #140] ; (803eb18 ) - 803ea8c: 4613 mov r3, r2 - 803ea8e: 005b lsls r3, r3, #1 - 803ea90: 4413 add r3, r2 - 803ea92: 00db lsls r3, r3, #3 - 803ea94: 440b add r3, r1 - 803ea96: 3312 adds r3, #18 - 803ea98: 881b ldrh r3, [r3, #0] - 803ea9a: f5b3 7f87 cmp.w r3, #270 ; 0x10e - 803ea9e: d321 bcc.n 803eae4 + 803eb0c: 79fa ldrb r2, [r7, #7] + 803eb0e: 4923 ldr r1, [pc, #140] ; (803eb9c ) + 803eb10: 4613 mov r3, r2 + 803eb12: 005b lsls r3, r3, #1 + 803eb14: 4413 add r3, r2 + 803eb16: 00db lsls r3, r3, #3 + 803eb18: 440b add r3, r1 + 803eb1a: 3312 adds r3, #18 + 803eb1c: 881b ldrh r3, [r3, #0] + 803eb1e: f5b3 7f87 cmp.w r3, #270 ; 0x10e + 803eb22: d321 bcc.n 803eb68 /* issue a unicast request (for 15 seconds) to prevent unnecessary broadcast */ if (etharp_request_dst(netif, &arp_table[arp_idx].ipaddr, &arp_table[arp_idx].ethaddr) == ERR_OK) { - 803eaa0: 79fa ldrb r2, [r7, #7] - 803eaa2: 4613 mov r3, r2 - 803eaa4: 005b lsls r3, r3, #1 - 803eaa6: 4413 add r3, r2 - 803eaa8: 00db lsls r3, r3, #3 - 803eaaa: 4a1b ldr r2, [pc, #108] ; (803eb18 ) - 803eaac: 4413 add r3, r2 - 803eaae: 1d19 adds r1, r3, #4 - 803eab0: 79fa ldrb r2, [r7, #7] - 803eab2: 4613 mov r3, r2 - 803eab4: 005b lsls r3, r3, #1 - 803eab6: 4413 add r3, r2 - 803eab8: 00db lsls r3, r3, #3 - 803eaba: 3308 adds r3, #8 - 803eabc: 4a16 ldr r2, [pc, #88] ; (803eb18 ) - 803eabe: 4413 add r3, r2 - 803eac0: 3304 adds r3, #4 - 803eac2: 461a mov r2, r3 - 803eac4: 68f8 ldr r0, [r7, #12] - 803eac6: f000 fafb bl 803f0c0 - 803eaca: 4603 mov r3, r0 - 803eacc: 2b00 cmp r3, #0 - 803eace: d109 bne.n 803eae4 + 803eb24: 79fa ldrb r2, [r7, #7] + 803eb26: 4613 mov r3, r2 + 803eb28: 005b lsls r3, r3, #1 + 803eb2a: 4413 add r3, r2 + 803eb2c: 00db lsls r3, r3, #3 + 803eb2e: 4a1b ldr r2, [pc, #108] ; (803eb9c ) + 803eb30: 4413 add r3, r2 + 803eb32: 1d19 adds r1, r3, #4 + 803eb34: 79fa ldrb r2, [r7, #7] + 803eb36: 4613 mov r3, r2 + 803eb38: 005b lsls r3, r3, #1 + 803eb3a: 4413 add r3, r2 + 803eb3c: 00db lsls r3, r3, #3 + 803eb3e: 3308 adds r3, #8 + 803eb40: 4a16 ldr r2, [pc, #88] ; (803eb9c ) + 803eb42: 4413 add r3, r2 + 803eb44: 3304 adds r3, #4 + 803eb46: 461a mov r2, r3 + 803eb48: 68f8 ldr r0, [r7, #12] + 803eb4a: f000 fafb bl 803f144 + 803eb4e: 4603 mov r3, r0 + 803eb50: 2b00 cmp r3, #0 + 803eb52: d109 bne.n 803eb68 arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1; - 803ead0: 79fa ldrb r2, [r7, #7] - 803ead2: 4911 ldr r1, [pc, #68] ; (803eb18 ) - 803ead4: 4613 mov r3, r2 - 803ead6: 005b lsls r3, r3, #1 - 803ead8: 4413 add r3, r2 - 803eada: 00db lsls r3, r3, #3 - 803eadc: 440b add r3, r1 - 803eade: 3314 adds r3, #20 - 803eae0: 2203 movs r2, #3 - 803eae2: 701a strb r2, [r3, #0] + 803eb54: 79fa ldrb r2, [r7, #7] + 803eb56: 4911 ldr r1, [pc, #68] ; (803eb9c ) + 803eb58: 4613 mov r3, r2 + 803eb5a: 005b lsls r3, r3, #1 + 803eb5c: 4413 add r3, r2 + 803eb5e: 00db lsls r3, r3, #3 + 803eb60: 440b add r3, r1 + 803eb62: 3314 adds r3, #20 + 803eb64: 2203 movs r2, #3 + 803eb66: 701a strb r2, [r3, #0] } } } return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), &arp_table[arp_idx].ethaddr, ETHTYPE_IP); - 803eae4: 68fb ldr r3, [r7, #12] - 803eae6: f103 012a add.w r1, r3, #42 ; 0x2a - 803eaea: 79fa ldrb r2, [r7, #7] - 803eaec: 4613 mov r3, r2 - 803eaee: 005b lsls r3, r3, #1 - 803eaf0: 4413 add r3, r2 - 803eaf2: 00db lsls r3, r3, #3 - 803eaf4: 3308 adds r3, #8 - 803eaf6: 4a08 ldr r2, [pc, #32] ; (803eb18 ) - 803eaf8: 4413 add r3, r2 - 803eafa: 3304 adds r3, #4 - 803eafc: f44f 6200 mov.w r2, #2048 ; 0x800 - 803eb00: 9200 str r2, [sp, #0] - 803eb02: 460a mov r2, r1 - 803eb04: 68b9 ldr r1, [r7, #8] - 803eb06: 68f8 ldr r0, [r7, #12] - 803eb08: f001 fe66 bl 80407d8 - 803eb0c: 4603 mov r3, r0 -} - 803eb0e: 4618 mov r0, r3 - 803eb10: 3710 adds r7, #16 - 803eb12: 46bd mov sp, r7 - 803eb14: bd80 pop {r7, pc} - 803eb16: bf00 nop - 803eb18: 2400e9b8 .word 0x2400e9b8 - 803eb1c: 080445e8 .word 0x080445e8 - 803eb20: 08044758 .word 0x08044758 - 803eb24: 08044660 .word 0x08044660 - -0803eb28 : + 803eb68: 68fb ldr r3, [r7, #12] + 803eb6a: f103 012a add.w r1, r3, #42 ; 0x2a + 803eb6e: 79fa ldrb r2, [r7, #7] + 803eb70: 4613 mov r3, r2 + 803eb72: 005b lsls r3, r3, #1 + 803eb74: 4413 add r3, r2 + 803eb76: 00db lsls r3, r3, #3 + 803eb78: 3308 adds r3, #8 + 803eb7a: 4a08 ldr r2, [pc, #32] ; (803eb9c ) + 803eb7c: 4413 add r3, r2 + 803eb7e: 3304 adds r3, #4 + 803eb80: f44f 6200 mov.w r2, #2048 ; 0x800 + 803eb84: 9200 str r2, [sp, #0] + 803eb86: 460a mov r2, r1 + 803eb88: 68b9 ldr r1, [r7, #8] + 803eb8a: 68f8 ldr r0, [r7, #12] + 803eb8c: f001 fe66 bl 804085c + 803eb90: 4603 mov r3, r0 +} + 803eb92: 4618 mov r0, r3 + 803eb94: 3710 adds r7, #16 + 803eb96: 46bd mov sp, r7 + 803eb98: bd80 pop {r7, pc} + 803eb9a: bf00 nop + 803eb9c: 2400e9c0 .word 0x2400e9c0 + 803eba0: 08044668 .word 0x08044668 + 803eba4: 080447d8 .word 0x080447d8 + 803eba8: 080446e0 .word 0x080446e0 + +0803ebac : * - ERR_RTE No route to destination (no gateway to external networks), * or the return type of either etharp_query() or ethernet_output(). */ err_t etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr) { - 803eb28: b580 push {r7, lr} - 803eb2a: b08a sub sp, #40 ; 0x28 - 803eb2c: af02 add r7, sp, #8 - 803eb2e: 60f8 str r0, [r7, #12] - 803eb30: 60b9 str r1, [r7, #8] - 803eb32: 607a str r2, [r7, #4] + 803ebac: b580 push {r7, lr} + 803ebae: b08a sub sp, #40 ; 0x28 + 803ebb0: af02 add r7, sp, #8 + 803ebb2: 60f8 str r0, [r7, #12] + 803ebb4: 60b9 str r1, [r7, #8] + 803ebb6: 607a str r2, [r7, #4] const struct eth_addr *dest; struct eth_addr mcastaddr; const ip4_addr_t *dst_addr = ipaddr; - 803eb34: 687b ldr r3, [r7, #4] - 803eb36: 61bb str r3, [r7, #24] + 803ebb8: 687b ldr r3, [r7, #4] + 803ebba: 61bb str r3, [r7, #24] LWIP_ASSERT_CORE_LOCKED(); LWIP_ASSERT("netif != NULL", netif != NULL); - 803eb38: 68fb ldr r3, [r7, #12] - 803eb3a: 2b00 cmp r3, #0 - 803eb3c: d106 bne.n 803eb4c - 803eb3e: 4b73 ldr r3, [pc, #460] ; (803ed0c ) - 803eb40: f240 321e movw r2, #798 ; 0x31e - 803eb44: 4972 ldr r1, [pc, #456] ; (803ed10 ) - 803eb46: 4873 ldr r0, [pc, #460] ; (803ed14 ) - 803eb48: f001 ffe2 bl 8040b10 + 803ebbc: 68fb ldr r3, [r7, #12] + 803ebbe: 2b00 cmp r3, #0 + 803ebc0: d106 bne.n 803ebd0 + 803ebc2: 4b73 ldr r3, [pc, #460] ; (803ed90 ) + 803ebc4: f240 321e movw r2, #798 ; 0x31e + 803ebc8: 4972 ldr r1, [pc, #456] ; (803ed94 ) + 803ebca: 4873 ldr r0, [pc, #460] ; (803ed98 ) + 803ebcc: f001 ffe2 bl 8040b94 LWIP_ASSERT("q != NULL", q != NULL); - 803eb4c: 68bb ldr r3, [r7, #8] - 803eb4e: 2b00 cmp r3, #0 - 803eb50: d106 bne.n 803eb60 - 803eb52: 4b6e ldr r3, [pc, #440] ; (803ed0c ) - 803eb54: f240 321f movw r2, #799 ; 0x31f - 803eb58: 496f ldr r1, [pc, #444] ; (803ed18 ) - 803eb5a: 486e ldr r0, [pc, #440] ; (803ed14 ) - 803eb5c: f001 ffd8 bl 8040b10 + 803ebd0: 68bb ldr r3, [r7, #8] + 803ebd2: 2b00 cmp r3, #0 + 803ebd4: d106 bne.n 803ebe4 + 803ebd6: 4b6e ldr r3, [pc, #440] ; (803ed90 ) + 803ebd8: f240 321f movw r2, #799 ; 0x31f + 803ebdc: 496f ldr r1, [pc, #444] ; (803ed9c ) + 803ebde: 486e ldr r0, [pc, #440] ; (803ed98 ) + 803ebe0: f001 ffd8 bl 8040b94 LWIP_ASSERT("ipaddr != NULL", ipaddr != NULL); - 803eb60: 687b ldr r3, [r7, #4] - 803eb62: 2b00 cmp r3, #0 - 803eb64: d106 bne.n 803eb74 - 803eb66: 4b69 ldr r3, [pc, #420] ; (803ed0c ) - 803eb68: f44f 7248 mov.w r2, #800 ; 0x320 - 803eb6c: 496b ldr r1, [pc, #428] ; (803ed1c ) - 803eb6e: 4869 ldr r0, [pc, #420] ; (803ed14 ) - 803eb70: f001 ffce bl 8040b10 + 803ebe4: 687b ldr r3, [r7, #4] + 803ebe6: 2b00 cmp r3, #0 + 803ebe8: d106 bne.n 803ebf8 + 803ebea: 4b69 ldr r3, [pc, #420] ; (803ed90 ) + 803ebec: f44f 7248 mov.w r2, #800 ; 0x320 + 803ebf0: 496b ldr r1, [pc, #428] ; (803eda0 ) + 803ebf2: 4869 ldr r0, [pc, #420] ; (803ed98 ) + 803ebf4: f001 ffce bl 8040b94 /* Determine on destination hardware address. Broadcasts and multicasts * are special, other IP addresses are looked up in the ARP table. */ /* broadcast destination IP address? */ if (ip4_addr_isbroadcast(ipaddr, netif)) { - 803eb74: 687b ldr r3, [r7, #4] - 803eb76: 681b ldr r3, [r3, #0] - 803eb78: 68f9 ldr r1, [r7, #12] - 803eb7a: 4618 mov r0, r3 - 803eb7c: f000 ff1e bl 803f9bc - 803eb80: 4603 mov r3, r0 - 803eb82: 2b00 cmp r3, #0 - 803eb84: d002 beq.n 803eb8c + 803ebf8: 687b ldr r3, [r7, #4] + 803ebfa: 681b ldr r3, [r3, #0] + 803ebfc: 68f9 ldr r1, [r7, #12] + 803ebfe: 4618 mov r0, r3 + 803ec00: f000 ff1e bl 803fa40 + 803ec04: 4603 mov r3, r0 + 803ec06: 2b00 cmp r3, #0 + 803ec08: d002 beq.n 803ec10 /* broadcast on Ethernet also */ dest = (const struct eth_addr *)ðbroadcast; - 803eb86: 4b66 ldr r3, [pc, #408] ; (803ed20 ) - 803eb88: 61fb str r3, [r7, #28] - 803eb8a: e0af b.n 803ecec + 803ec0a: 4b66 ldr r3, [pc, #408] ; (803eda4 ) + 803ec0c: 61fb str r3, [r7, #28] + 803ec0e: e0af b.n 803ed70 /* multicast destination IP address? */ } else if (ip4_addr_ismulticast(ipaddr)) { - 803eb8c: 687b ldr r3, [r7, #4] - 803eb8e: 681b ldr r3, [r3, #0] - 803eb90: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 803eb94: 2be0 cmp r3, #224 ; 0xe0 - 803eb96: d118 bne.n 803ebca + 803ec10: 687b ldr r3, [r7, #4] + 803ec12: 681b ldr r3, [r3, #0] + 803ec14: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803ec18: 2be0 cmp r3, #224 ; 0xe0 + 803ec1a: d118 bne.n 803ec4e /* Hash IP multicast address to MAC address.*/ mcastaddr.addr[0] = LL_IP4_MULTICAST_ADDR_0; - 803eb98: 2301 movs r3, #1 - 803eb9a: 743b strb r3, [r7, #16] + 803ec1c: 2301 movs r3, #1 + 803ec1e: 743b strb r3, [r7, #16] mcastaddr.addr[1] = LL_IP4_MULTICAST_ADDR_1; - 803eb9c: 2300 movs r3, #0 - 803eb9e: 747b strb r3, [r7, #17] + 803ec20: 2300 movs r3, #0 + 803ec22: 747b strb r3, [r7, #17] mcastaddr.addr[2] = LL_IP4_MULTICAST_ADDR_2; - 803eba0: 235e movs r3, #94 ; 0x5e - 803eba2: 74bb strb r3, [r7, #18] + 803ec24: 235e movs r3, #94 ; 0x5e + 803ec26: 74bb strb r3, [r7, #18] mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f; - 803eba4: 687b ldr r3, [r7, #4] - 803eba6: 3301 adds r3, #1 - 803eba8: 781b ldrb r3, [r3, #0] - 803ebaa: f003 037f and.w r3, r3, #127 ; 0x7f - 803ebae: b2db uxtb r3, r3 - 803ebb0: 74fb strb r3, [r7, #19] + 803ec28: 687b ldr r3, [r7, #4] + 803ec2a: 3301 adds r3, #1 + 803ec2c: 781b ldrb r3, [r3, #0] + 803ec2e: f003 037f and.w r3, r3, #127 ; 0x7f + 803ec32: b2db uxtb r3, r3 + 803ec34: 74fb strb r3, [r7, #19] mcastaddr.addr[4] = ip4_addr3(ipaddr); - 803ebb2: 687b ldr r3, [r7, #4] - 803ebb4: 3302 adds r3, #2 - 803ebb6: 781b ldrb r3, [r3, #0] - 803ebb8: 753b strb r3, [r7, #20] + 803ec36: 687b ldr r3, [r7, #4] + 803ec38: 3302 adds r3, #2 + 803ec3a: 781b ldrb r3, [r3, #0] + 803ec3c: 753b strb r3, [r7, #20] mcastaddr.addr[5] = ip4_addr4(ipaddr); - 803ebba: 687b ldr r3, [r7, #4] - 803ebbc: 3303 adds r3, #3 - 803ebbe: 781b ldrb r3, [r3, #0] - 803ebc0: 757b strb r3, [r7, #21] + 803ec3e: 687b ldr r3, [r7, #4] + 803ec40: 3303 adds r3, #3 + 803ec42: 781b ldrb r3, [r3, #0] + 803ec44: 757b strb r3, [r7, #21] /* destination Ethernet address is multicast */ dest = &mcastaddr; - 803ebc2: f107 0310 add.w r3, r7, #16 - 803ebc6: 61fb str r3, [r7, #28] - 803ebc8: e090 b.n 803ecec + 803ec46: f107 0310 add.w r3, r7, #16 + 803ec4a: 61fb str r3, [r7, #28] + 803ec4c: e090 b.n 803ed70 /* unicast destination IP address? */ } else { netif_addr_idx_t i; /* outside local network? if so, this can neither be a global broadcast nor a subnet broadcast. */ if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) && - 803ebca: 687b ldr r3, [r7, #4] - 803ebcc: 681a ldr r2, [r3, #0] - 803ebce: 68fb ldr r3, [r7, #12] - 803ebd0: 3304 adds r3, #4 - 803ebd2: 681b ldr r3, [r3, #0] - 803ebd4: 405a eors r2, r3 - 803ebd6: 68fb ldr r3, [r7, #12] - 803ebd8: 3308 adds r3, #8 - 803ebda: 681b ldr r3, [r3, #0] - 803ebdc: 4013 ands r3, r2 - 803ebde: 2b00 cmp r3, #0 - 803ebe0: d012 beq.n 803ec08 + 803ec4e: 687b ldr r3, [r7, #4] + 803ec50: 681a ldr r2, [r3, #0] + 803ec52: 68fb ldr r3, [r7, #12] + 803ec54: 3304 adds r3, #4 + 803ec56: 681b ldr r3, [r3, #0] + 803ec58: 405a eors r2, r3 + 803ec5a: 68fb ldr r3, [r7, #12] + 803ec5c: 3308 adds r3, #8 + 803ec5e: 681b ldr r3, [r3, #0] + 803ec60: 4013 ands r3, r2 + 803ec62: 2b00 cmp r3, #0 + 803ec64: d012 beq.n 803ec8c !ip4_addr_islinklocal(ipaddr)) { - 803ebe2: 687b ldr r3, [r7, #4] - 803ebe4: 681b ldr r3, [r3, #0] - 803ebe6: b29b uxth r3, r3 + 803ec66: 687b ldr r3, [r7, #4] + 803ec68: 681b ldr r3, [r3, #0] + 803ec6a: b29b uxth r3, r3 if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) && - 803ebe8: f64f 62a9 movw r2, #65193 ; 0xfea9 - 803ebec: 4293 cmp r3, r2 - 803ebee: d00b beq.n 803ec08 + 803ec6c: f64f 62a9 movw r2, #65193 ; 0xfea9 + 803ec70: 4293 cmp r3, r2 + 803ec72: d00b beq.n 803ec8c dst_addr = LWIP_HOOK_ETHARP_GET_GW(netif, ipaddr); if (dst_addr == NULL) #endif /* LWIP_HOOK_ETHARP_GET_GW */ { /* interface has default gateway? */ if (!ip4_addr_isany_val(*netif_ip4_gw(netif))) { - 803ebf0: 68fb ldr r3, [r7, #12] - 803ebf2: 330c adds r3, #12 - 803ebf4: 681b ldr r3, [r3, #0] - 803ebf6: 2b00 cmp r3, #0 - 803ebf8: d003 beq.n 803ec02 + 803ec74: 68fb ldr r3, [r7, #12] + 803ec76: 330c adds r3, #12 + 803ec78: 681b ldr r3, [r3, #0] + 803ec7a: 2b00 cmp r3, #0 + 803ec7c: d003 beq.n 803ec86 /* send to hardware address of default gateway IP address */ dst_addr = netif_ip4_gw(netif); - 803ebfa: 68fb ldr r3, [r7, #12] - 803ebfc: 330c adds r3, #12 - 803ebfe: 61bb str r3, [r7, #24] - 803ec00: e002 b.n 803ec08 + 803ec7e: 68fb ldr r3, [r7, #12] + 803ec80: 330c adds r3, #12 + 803ec82: 61bb str r3, [r7, #24] + 803ec84: e002 b.n 803ec8c /* no default gateway available */ } else { /* no route to destination error (default gateway missing) */ return ERR_RTE; - 803ec02: f06f 0303 mvn.w r3, #3 - 803ec06: e07d b.n 803ed04 + 803ec86: f06f 0303 mvn.w r3, #3 + 803ec8a: e07d b.n 803ed88 if (netif->hints != NULL) { /* per-pcb cached entry was given */ netif_addr_idx_t etharp_cached_entry = netif->hints->addr_hint; if (etharp_cached_entry < ARP_TABLE_SIZE) { #endif /* LWIP_NETIF_HWADDRHINT */ if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) && - 803ec08: 4b46 ldr r3, [pc, #280] ; (803ed24 ) - 803ec0a: 781b ldrb r3, [r3, #0] - 803ec0c: 4619 mov r1, r3 - 803ec0e: 4a46 ldr r2, [pc, #280] ; (803ed28 ) - 803ec10: 460b mov r3, r1 - 803ec12: 005b lsls r3, r3, #1 - 803ec14: 440b add r3, r1 - 803ec16: 00db lsls r3, r3, #3 - 803ec18: 4413 add r3, r2 - 803ec1a: 3314 adds r3, #20 - 803ec1c: 781b ldrb r3, [r3, #0] - 803ec1e: 2b01 cmp r3, #1 - 803ec20: d925 bls.n 803ec6e + 803ec8c: 4b46 ldr r3, [pc, #280] ; (803eda8 ) + 803ec8e: 781b ldrb r3, [r3, #0] + 803ec90: 4619 mov r1, r3 + 803ec92: 4a46 ldr r2, [pc, #280] ; (803edac ) + 803ec94: 460b mov r3, r1 + 803ec96: 005b lsls r3, r3, #1 + 803ec98: 440b add r3, r1 + 803ec9a: 00db lsls r3, r3, #3 + 803ec9c: 4413 add r3, r2 + 803ec9e: 3314 adds r3, #20 + 803eca0: 781b ldrb r3, [r3, #0] + 803eca2: 2b01 cmp r3, #1 + 803eca4: d925 bls.n 803ecf2 #if ETHARP_TABLE_MATCH_NETIF (arp_table[etharp_cached_entry].netif == netif) && - 803ec22: 4b40 ldr r3, [pc, #256] ; (803ed24 ) - 803ec24: 781b ldrb r3, [r3, #0] - 803ec26: 4619 mov r1, r3 - 803ec28: 4a3f ldr r2, [pc, #252] ; (803ed28 ) - 803ec2a: 460b mov r3, r1 - 803ec2c: 005b lsls r3, r3, #1 - 803ec2e: 440b add r3, r1 - 803ec30: 00db lsls r3, r3, #3 - 803ec32: 4413 add r3, r2 - 803ec34: 3308 adds r3, #8 - 803ec36: 681b ldr r3, [r3, #0] + 803eca6: 4b40 ldr r3, [pc, #256] ; (803eda8 ) + 803eca8: 781b ldrb r3, [r3, #0] + 803ecaa: 4619 mov r1, r3 + 803ecac: 4a3f ldr r2, [pc, #252] ; (803edac ) + 803ecae: 460b mov r3, r1 + 803ecb0: 005b lsls r3, r3, #1 + 803ecb2: 440b add r3, r1 + 803ecb4: 00db lsls r3, r3, #3 + 803ecb6: 4413 add r3, r2 + 803ecb8: 3308 adds r3, #8 + 803ecba: 681b ldr r3, [r3, #0] if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) && - 803ec38: 68fa ldr r2, [r7, #12] - 803ec3a: 429a cmp r2, r3 - 803ec3c: d117 bne.n 803ec6e + 803ecbc: 68fa ldr r2, [r7, #12] + 803ecbe: 429a cmp r2, r3 + 803ecc0: d117 bne.n 803ecf2 #endif (ip4_addr_cmp(dst_addr, &arp_table[etharp_cached_entry].ipaddr))) { - 803ec3e: 69bb ldr r3, [r7, #24] - 803ec40: 681a ldr r2, [r3, #0] - 803ec42: 4b38 ldr r3, [pc, #224] ; (803ed24 ) - 803ec44: 781b ldrb r3, [r3, #0] - 803ec46: 4618 mov r0, r3 - 803ec48: 4937 ldr r1, [pc, #220] ; (803ed28 ) - 803ec4a: 4603 mov r3, r0 - 803ec4c: 005b lsls r3, r3, #1 - 803ec4e: 4403 add r3, r0 - 803ec50: 00db lsls r3, r3, #3 - 803ec52: 440b add r3, r1 - 803ec54: 3304 adds r3, #4 - 803ec56: 681b ldr r3, [r3, #0] + 803ecc2: 69bb ldr r3, [r7, #24] + 803ecc4: 681a ldr r2, [r3, #0] + 803ecc6: 4b38 ldr r3, [pc, #224] ; (803eda8 ) + 803ecc8: 781b ldrb r3, [r3, #0] + 803ecca: 4618 mov r0, r3 + 803eccc: 4937 ldr r1, [pc, #220] ; (803edac ) + 803ecce: 4603 mov r3, r0 + 803ecd0: 005b lsls r3, r3, #1 + 803ecd2: 4403 add r3, r0 + 803ecd4: 00db lsls r3, r3, #3 + 803ecd6: 440b add r3, r1 + 803ecd8: 3304 adds r3, #4 + 803ecda: 681b ldr r3, [r3, #0] (arp_table[etharp_cached_entry].netif == netif) && - 803ec58: 429a cmp r2, r3 - 803ec5a: d108 bne.n 803ec6e + 803ecdc: 429a cmp r2, r3 + 803ecde: d108 bne.n 803ecf2 /* the per-pcb-cached entry is stable and the right one! */ ETHARP_STATS_INC(etharp.cachehit); return etharp_output_to_arp_index(netif, q, etharp_cached_entry); - 803ec5c: 4b31 ldr r3, [pc, #196] ; (803ed24 ) - 803ec5e: 781b ldrb r3, [r3, #0] - 803ec60: 461a mov r2, r3 - 803ec62: 68b9 ldr r1, [r7, #8] - 803ec64: 68f8 ldr r0, [r7, #12] - 803ec66: f7ff fec5 bl 803e9f4 - 803ec6a: 4603 mov r3, r0 - 803ec6c: e04a b.n 803ed04 + 803ece0: 4b31 ldr r3, [pc, #196] ; (803eda8 ) + 803ece2: 781b ldrb r3, [r3, #0] + 803ece4: 461a mov r2, r3 + 803ece6: 68b9 ldr r1, [r7, #8] + 803ece8: 68f8 ldr r0, [r7, #12] + 803ecea: f7ff fec5 bl 803ea78 + 803ecee: 4603 mov r3, r0 + 803ecf0: e04a b.n 803ed88 } #endif /* LWIP_NETIF_HWADDRHINT */ /* find stable entry: do this here since this is a critical path for throughput and etharp_find_entry() is kind of slow */ for (i = 0; i < ARP_TABLE_SIZE; i++) { - 803ec6e: 2300 movs r3, #0 - 803ec70: 75fb strb r3, [r7, #23] - 803ec72: e031 b.n 803ecd8 + 803ecf2: 2300 movs r3, #0 + 803ecf4: 75fb strb r3, [r7, #23] + 803ecf6: e031 b.n 803ed5c if ((arp_table[i].state >= ETHARP_STATE_STABLE) && - 803ec74: 7dfa ldrb r2, [r7, #23] - 803ec76: 492c ldr r1, [pc, #176] ; (803ed28 ) - 803ec78: 4613 mov r3, r2 - 803ec7a: 005b lsls r3, r3, #1 - 803ec7c: 4413 add r3, r2 - 803ec7e: 00db lsls r3, r3, #3 - 803ec80: 440b add r3, r1 - 803ec82: 3314 adds r3, #20 - 803ec84: 781b ldrb r3, [r3, #0] - 803ec86: 2b01 cmp r3, #1 - 803ec88: d923 bls.n 803ecd2 + 803ecf8: 7dfa ldrb r2, [r7, #23] + 803ecfa: 492c ldr r1, [pc, #176] ; (803edac ) + 803ecfc: 4613 mov r3, r2 + 803ecfe: 005b lsls r3, r3, #1 + 803ed00: 4413 add r3, r2 + 803ed02: 00db lsls r3, r3, #3 + 803ed04: 440b add r3, r1 + 803ed06: 3314 adds r3, #20 + 803ed08: 781b ldrb r3, [r3, #0] + 803ed0a: 2b01 cmp r3, #1 + 803ed0c: d923 bls.n 803ed56 #if ETHARP_TABLE_MATCH_NETIF (arp_table[i].netif == netif) && - 803ec8a: 7dfa ldrb r2, [r7, #23] - 803ec8c: 4926 ldr r1, [pc, #152] ; (803ed28 ) - 803ec8e: 4613 mov r3, r2 - 803ec90: 005b lsls r3, r3, #1 - 803ec92: 4413 add r3, r2 - 803ec94: 00db lsls r3, r3, #3 - 803ec96: 440b add r3, r1 - 803ec98: 3308 adds r3, #8 - 803ec9a: 681b ldr r3, [r3, #0] + 803ed0e: 7dfa ldrb r2, [r7, #23] + 803ed10: 4926 ldr r1, [pc, #152] ; (803edac ) + 803ed12: 4613 mov r3, r2 + 803ed14: 005b lsls r3, r3, #1 + 803ed16: 4413 add r3, r2 + 803ed18: 00db lsls r3, r3, #3 + 803ed1a: 440b add r3, r1 + 803ed1c: 3308 adds r3, #8 + 803ed1e: 681b ldr r3, [r3, #0] if ((arp_table[i].state >= ETHARP_STATE_STABLE) && - 803ec9c: 68fa ldr r2, [r7, #12] - 803ec9e: 429a cmp r2, r3 - 803eca0: d117 bne.n 803ecd2 + 803ed20: 68fa ldr r2, [r7, #12] + 803ed22: 429a cmp r2, r3 + 803ed24: d117 bne.n 803ed56 #endif (ip4_addr_cmp(dst_addr, &arp_table[i].ipaddr))) { - 803eca2: 69bb ldr r3, [r7, #24] - 803eca4: 6819 ldr r1, [r3, #0] - 803eca6: 7dfa ldrb r2, [r7, #23] - 803eca8: 481f ldr r0, [pc, #124] ; (803ed28 ) - 803ecaa: 4613 mov r3, r2 - 803ecac: 005b lsls r3, r3, #1 - 803ecae: 4413 add r3, r2 - 803ecb0: 00db lsls r3, r3, #3 - 803ecb2: 4403 add r3, r0 - 803ecb4: 3304 adds r3, #4 - 803ecb6: 681b ldr r3, [r3, #0] + 803ed26: 69bb ldr r3, [r7, #24] + 803ed28: 6819 ldr r1, [r3, #0] + 803ed2a: 7dfa ldrb r2, [r7, #23] + 803ed2c: 481f ldr r0, [pc, #124] ; (803edac ) + 803ed2e: 4613 mov r3, r2 + 803ed30: 005b lsls r3, r3, #1 + 803ed32: 4413 add r3, r2 + 803ed34: 00db lsls r3, r3, #3 + 803ed36: 4403 add r3, r0 + 803ed38: 3304 adds r3, #4 + 803ed3a: 681b ldr r3, [r3, #0] (arp_table[i].netif == netif) && - 803ecb8: 4299 cmp r1, r3 - 803ecba: d10a bne.n 803ecd2 + 803ed3c: 4299 cmp r1, r3 + 803ed3e: d10a bne.n 803ed56 /* found an existing, stable entry */ ETHARP_SET_ADDRHINT(netif, i); - 803ecbc: 4a19 ldr r2, [pc, #100] ; (803ed24 ) - 803ecbe: 7dfb ldrb r3, [r7, #23] - 803ecc0: 7013 strb r3, [r2, #0] + 803ed40: 4a19 ldr r2, [pc, #100] ; (803eda8 ) + 803ed42: 7dfb ldrb r3, [r7, #23] + 803ed44: 7013 strb r3, [r2, #0] return etharp_output_to_arp_index(netif, q, i); - 803ecc2: 7dfb ldrb r3, [r7, #23] - 803ecc4: 461a mov r2, r3 - 803ecc6: 68b9 ldr r1, [r7, #8] - 803ecc8: 68f8 ldr r0, [r7, #12] - 803ecca: f7ff fe93 bl 803e9f4 - 803ecce: 4603 mov r3, r0 - 803ecd0: e018 b.n 803ed04 + 803ed46: 7dfb ldrb r3, [r7, #23] + 803ed48: 461a mov r2, r3 + 803ed4a: 68b9 ldr r1, [r7, #8] + 803ed4c: 68f8 ldr r0, [r7, #12] + 803ed4e: f7ff fe93 bl 803ea78 + 803ed52: 4603 mov r3, r0 + 803ed54: e018 b.n 803ed88 for (i = 0; i < ARP_TABLE_SIZE; i++) { - 803ecd2: 7dfb ldrb r3, [r7, #23] - 803ecd4: 3301 adds r3, #1 - 803ecd6: 75fb strb r3, [r7, #23] - 803ecd8: 7dfb ldrb r3, [r7, #23] - 803ecda: 2b09 cmp r3, #9 - 803ecdc: d9ca bls.n 803ec74 + 803ed56: 7dfb ldrb r3, [r7, #23] + 803ed58: 3301 adds r3, #1 + 803ed5a: 75fb strb r3, [r7, #23] + 803ed5c: 7dfb ldrb r3, [r7, #23] + 803ed5e: 2b09 cmp r3, #9 + 803ed60: d9ca bls.n 803ecf8 } } /* no stable entry found, use the (slower) query function: queue on destination Ethernet address belonging to ipaddr */ return etharp_query(netif, dst_addr, q); - 803ecde: 68ba ldr r2, [r7, #8] - 803ece0: 69b9 ldr r1, [r7, #24] - 803ece2: 68f8 ldr r0, [r7, #12] - 803ece4: f000 f822 bl 803ed2c - 803ece8: 4603 mov r3, r0 - 803ecea: e00b b.n 803ed04 + 803ed62: 68ba ldr r2, [r7, #8] + 803ed64: 69b9 ldr r1, [r7, #24] + 803ed66: 68f8 ldr r0, [r7, #12] + 803ed68: f000 f822 bl 803edb0 + 803ed6c: 4603 mov r3, r0 + 803ed6e: e00b b.n 803ed88 } /* continuation for multicast/broadcast destinations */ /* obtain source Ethernet address of the given interface */ /* send packet directly on the link */ return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), dest, ETHTYPE_IP); - 803ecec: 68fb ldr r3, [r7, #12] - 803ecee: f103 022a add.w r2, r3, #42 ; 0x2a - 803ecf2: f44f 6300 mov.w r3, #2048 ; 0x800 - 803ecf6: 9300 str r3, [sp, #0] - 803ecf8: 69fb ldr r3, [r7, #28] - 803ecfa: 68b9 ldr r1, [r7, #8] - 803ecfc: 68f8 ldr r0, [r7, #12] - 803ecfe: f001 fd6b bl 80407d8 - 803ed02: 4603 mov r3, r0 -} - 803ed04: 4618 mov r0, r3 - 803ed06: 3720 adds r7, #32 - 803ed08: 46bd mov sp, r7 - 803ed0a: bd80 pop {r7, pc} - 803ed0c: 080445e8 .word 0x080445e8 - 803ed10: 08044738 .word 0x08044738 - 803ed14: 08044660 .word 0x08044660 - 803ed18: 08044788 .word 0x08044788 - 803ed1c: 08044728 .word 0x08044728 - 803ed20: 08044e04 .word 0x08044e04 - 803ed24: 2400eaa8 .word 0x2400eaa8 - 803ed28: 2400e9b8 .word 0x2400e9b8 - -0803ed2c : + 803ed70: 68fb ldr r3, [r7, #12] + 803ed72: f103 022a add.w r2, r3, #42 ; 0x2a + 803ed76: f44f 6300 mov.w r3, #2048 ; 0x800 + 803ed7a: 9300 str r3, [sp, #0] + 803ed7c: 69fb ldr r3, [r7, #28] + 803ed7e: 68b9 ldr r1, [r7, #8] + 803ed80: 68f8 ldr r0, [r7, #12] + 803ed82: f001 fd6b bl 804085c + 803ed86: 4603 mov r3, r0 +} + 803ed88: 4618 mov r0, r3 + 803ed8a: 3720 adds r7, #32 + 803ed8c: 46bd mov sp, r7 + 803ed8e: bd80 pop {r7, pc} + 803ed90: 08044668 .word 0x08044668 + 803ed94: 080447b8 .word 0x080447b8 + 803ed98: 080446e0 .word 0x080446e0 + 803ed9c: 08044808 .word 0x08044808 + 803eda0: 080447a8 .word 0x080447a8 + 803eda4: 08044e84 .word 0x08044e84 + 803eda8: 2400eab0 .word 0x2400eab0 + 803edac: 2400e9c0 .word 0x2400e9c0 + +0803edb0 : * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. * */ err_t etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q) { - 803ed2c: b580 push {r7, lr} - 803ed2e: b08c sub sp, #48 ; 0x30 - 803ed30: af02 add r7, sp, #8 - 803ed32: 60f8 str r0, [r7, #12] - 803ed34: 60b9 str r1, [r7, #8] - 803ed36: 607a str r2, [r7, #4] + 803edb0: b580 push {r7, lr} + 803edb2: b08c sub sp, #48 ; 0x30 + 803edb4: af02 add r7, sp, #8 + 803edb6: 60f8 str r0, [r7, #12] + 803edb8: 60b9 str r1, [r7, #8] + 803edba: 607a str r2, [r7, #4] struct eth_addr *srcaddr = (struct eth_addr *)netif->hwaddr; - 803ed38: 68fb ldr r3, [r7, #12] - 803ed3a: 332a adds r3, #42 ; 0x2a - 803ed3c: 617b str r3, [r7, #20] + 803edbc: 68fb ldr r3, [r7, #12] + 803edbe: 332a adds r3, #42 ; 0x2a + 803edc0: 617b str r3, [r7, #20] err_t result = ERR_MEM; - 803ed3e: 23ff movs r3, #255 ; 0xff - 803ed40: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803edc2: 23ff movs r3, #255 ; 0xff + 803edc4: f887 3027 strb.w r3, [r7, #39] ; 0x27 int is_new_entry = 0; - 803ed44: 2300 movs r3, #0 - 803ed46: 623b str r3, [r7, #32] + 803edc8: 2300 movs r3, #0 + 803edca: 623b str r3, [r7, #32] s16_t i_err; netif_addr_idx_t i; /* non-unicast address? */ if (ip4_addr_isbroadcast(ipaddr, netif) || - 803ed48: 68bb ldr r3, [r7, #8] - 803ed4a: 681b ldr r3, [r3, #0] - 803ed4c: 68f9 ldr r1, [r7, #12] - 803ed4e: 4618 mov r0, r3 - 803ed50: f000 fe34 bl 803f9bc - 803ed54: 4603 mov r3, r0 - 803ed56: 2b00 cmp r3, #0 - 803ed58: d10c bne.n 803ed74 + 803edcc: 68bb ldr r3, [r7, #8] + 803edce: 681b ldr r3, [r3, #0] + 803edd0: 68f9 ldr r1, [r7, #12] + 803edd2: 4618 mov r0, r3 + 803edd4: f000 fe34 bl 803fa40 + 803edd8: 4603 mov r3, r0 + 803edda: 2b00 cmp r3, #0 + 803eddc: d10c bne.n 803edf8 ip4_addr_ismulticast(ipaddr) || - 803ed5a: 68bb ldr r3, [r7, #8] - 803ed5c: 681b ldr r3, [r3, #0] - 803ed5e: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803edde: 68bb ldr r3, [r7, #8] + 803ede0: 681b ldr r3, [r3, #0] + 803ede2: f003 03f0 and.w r3, r3, #240 ; 0xf0 if (ip4_addr_isbroadcast(ipaddr, netif) || - 803ed62: 2be0 cmp r3, #224 ; 0xe0 - 803ed64: d006 beq.n 803ed74 + 803ede6: 2be0 cmp r3, #224 ; 0xe0 + 803ede8: d006 beq.n 803edf8 ip4_addr_ismulticast(ipaddr) || - 803ed66: 68bb ldr r3, [r7, #8] - 803ed68: 2b00 cmp r3, #0 - 803ed6a: d003 beq.n 803ed74 + 803edea: 68bb ldr r3, [r7, #8] + 803edec: 2b00 cmp r3, #0 + 803edee: d003 beq.n 803edf8 ip4_addr_isany(ipaddr)) { - 803ed6c: 68bb ldr r3, [r7, #8] - 803ed6e: 681b ldr r3, [r3, #0] - 803ed70: 2b00 cmp r3, #0 - 803ed72: d102 bne.n 803ed7a + 803edf0: 68bb ldr r3, [r7, #8] + 803edf2: 681b ldr r3, [r3, #0] + 803edf4: 2b00 cmp r3, #0 + 803edf6: d102 bne.n 803edfe LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n")); return ERR_ARG; - 803ed74: f06f 030f mvn.w r3, #15 - 803ed78: e101 b.n 803ef7e + 803edf8: f06f 030f mvn.w r3, #15 + 803edfc: e101 b.n 803f002 } /* find entry in ARP cache, ask to create entry if queueing packet */ i_err = etharp_find_entry(ipaddr, ETHARP_FLAG_TRY_HARD, netif); - 803ed7a: 68fa ldr r2, [r7, #12] - 803ed7c: 2101 movs r1, #1 - 803ed7e: 68b8 ldr r0, [r7, #8] - 803ed80: f7ff fb60 bl 803e444 - 803ed84: 4603 mov r3, r0 - 803ed86: 827b strh r3, [r7, #18] + 803edfe: 68fa ldr r2, [r7, #12] + 803ee00: 2101 movs r1, #1 + 803ee02: 68b8 ldr r0, [r7, #8] + 803ee04: f7ff fb60 bl 803e4c8 + 803ee08: 4603 mov r3, r0 + 803ee0a: 827b strh r3, [r7, #18] /* could not find or create entry? */ if (i_err < 0) { - 803ed88: f9b7 3012 ldrsh.w r3, [r7, #18] - 803ed8c: 2b00 cmp r3, #0 - 803ed8e: da02 bge.n 803ed96 + 803ee0c: f9b7 3012 ldrsh.w r3, [r7, #18] + 803ee10: 2b00 cmp r3, #0 + 803ee12: da02 bge.n 803ee1a LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n")); if (q) { LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n")); ETHARP_STATS_INC(etharp.memerr); } return (err_t)i_err; - 803ed90: 8a7b ldrh r3, [r7, #18] - 803ed92: b25b sxtb r3, r3 - 803ed94: e0f3 b.n 803ef7e + 803ee14: 8a7b ldrh r3, [r7, #18] + 803ee16: b25b sxtb r3, r3 + 803ee18: e0f3 b.n 803f002 } LWIP_ASSERT("type overflow", (size_t)i_err < NETIF_ADDR_IDX_MAX); - 803ed96: 8a7b ldrh r3, [r7, #18] - 803ed98: 2b7e cmp r3, #126 ; 0x7e - 803ed9a: d906 bls.n 803edaa - 803ed9c: 4b7a ldr r3, [pc, #488] ; (803ef88 ) - 803ed9e: f240 32c1 movw r2, #961 ; 0x3c1 - 803eda2: 497a ldr r1, [pc, #488] ; (803ef8c ) - 803eda4: 487a ldr r0, [pc, #488] ; (803ef90 ) - 803eda6: f001 feb3 bl 8040b10 + 803ee1a: 8a7b ldrh r3, [r7, #18] + 803ee1c: 2b7e cmp r3, #126 ; 0x7e + 803ee1e: d906 bls.n 803ee2e + 803ee20: 4b7a ldr r3, [pc, #488] ; (803f00c ) + 803ee22: f240 32c1 movw r2, #961 ; 0x3c1 + 803ee26: 497a ldr r1, [pc, #488] ; (803f010 ) + 803ee28: 487a ldr r0, [pc, #488] ; (803f014 ) + 803ee2a: f001 feb3 bl 8040b94 i = (netif_addr_idx_t)i_err; - 803edaa: 8a7b ldrh r3, [r7, #18] - 803edac: 747b strb r3, [r7, #17] + 803ee2e: 8a7b ldrh r3, [r7, #18] + 803ee30: 747b strb r3, [r7, #17] /* mark a fresh entry as pending (we just sent a request) */ if (arp_table[i].state == ETHARP_STATE_EMPTY) { - 803edae: 7c7a ldrb r2, [r7, #17] - 803edb0: 4978 ldr r1, [pc, #480] ; (803ef94 ) - 803edb2: 4613 mov r3, r2 - 803edb4: 005b lsls r3, r3, #1 - 803edb6: 4413 add r3, r2 - 803edb8: 00db lsls r3, r3, #3 - 803edba: 440b add r3, r1 - 803edbc: 3314 adds r3, #20 - 803edbe: 781b ldrb r3, [r3, #0] - 803edc0: 2b00 cmp r3, #0 - 803edc2: d115 bne.n 803edf0 + 803ee32: 7c7a ldrb r2, [r7, #17] + 803ee34: 4978 ldr r1, [pc, #480] ; (803f018 ) + 803ee36: 4613 mov r3, r2 + 803ee38: 005b lsls r3, r3, #1 + 803ee3a: 4413 add r3, r2 + 803ee3c: 00db lsls r3, r3, #3 + 803ee3e: 440b add r3, r1 + 803ee40: 3314 adds r3, #20 + 803ee42: 781b ldrb r3, [r3, #0] + 803ee44: 2b00 cmp r3, #0 + 803ee46: d115 bne.n 803ee74 is_new_entry = 1; - 803edc4: 2301 movs r3, #1 - 803edc6: 623b str r3, [r7, #32] + 803ee48: 2301 movs r3, #1 + 803ee4a: 623b str r3, [r7, #32] arp_table[i].state = ETHARP_STATE_PENDING; - 803edc8: 7c7a ldrb r2, [r7, #17] - 803edca: 4972 ldr r1, [pc, #456] ; (803ef94 ) - 803edcc: 4613 mov r3, r2 - 803edce: 005b lsls r3, r3, #1 - 803edd0: 4413 add r3, r2 - 803edd2: 00db lsls r3, r3, #3 - 803edd4: 440b add r3, r1 - 803edd6: 3314 adds r3, #20 - 803edd8: 2201 movs r2, #1 - 803edda: 701a strb r2, [r3, #0] + 803ee4c: 7c7a ldrb r2, [r7, #17] + 803ee4e: 4972 ldr r1, [pc, #456] ; (803f018 ) + 803ee50: 4613 mov r3, r2 + 803ee52: 005b lsls r3, r3, #1 + 803ee54: 4413 add r3, r2 + 803ee56: 00db lsls r3, r3, #3 + 803ee58: 440b add r3, r1 + 803ee5a: 3314 adds r3, #20 + 803ee5c: 2201 movs r2, #1 + 803ee5e: 701a strb r2, [r3, #0] /* record network interface for re-sending arp request in etharp_tmr */ arp_table[i].netif = netif; - 803eddc: 7c7a ldrb r2, [r7, #17] - 803edde: 496d ldr r1, [pc, #436] ; (803ef94 ) - 803ede0: 4613 mov r3, r2 - 803ede2: 005b lsls r3, r3, #1 - 803ede4: 4413 add r3, r2 - 803ede6: 00db lsls r3, r3, #3 - 803ede8: 440b add r3, r1 - 803edea: 3308 adds r3, #8 - 803edec: 68fa ldr r2, [r7, #12] - 803edee: 601a str r2, [r3, #0] + 803ee60: 7c7a ldrb r2, [r7, #17] + 803ee62: 496d ldr r1, [pc, #436] ; (803f018 ) + 803ee64: 4613 mov r3, r2 + 803ee66: 005b lsls r3, r3, #1 + 803ee68: 4413 add r3, r2 + 803ee6a: 00db lsls r3, r3, #3 + 803ee6c: 440b add r3, r1 + 803ee6e: 3308 adds r3, #8 + 803ee70: 68fa ldr r2, [r7, #12] + 803ee72: 601a str r2, [r3, #0] } /* { i is either a STABLE or (new or existing) PENDING entry } */ LWIP_ASSERT("arp_table[i].state == PENDING or STABLE", - 803edf0: 7c7a ldrb r2, [r7, #17] - 803edf2: 4968 ldr r1, [pc, #416] ; (803ef94 ) - 803edf4: 4613 mov r3, r2 - 803edf6: 005b lsls r3, r3, #1 - 803edf8: 4413 add r3, r2 - 803edfa: 00db lsls r3, r3, #3 - 803edfc: 440b add r3, r1 - 803edfe: 3314 adds r3, #20 - 803ee00: 781b ldrb r3, [r3, #0] - 803ee02: 2b01 cmp r3, #1 - 803ee04: d011 beq.n 803ee2a - 803ee06: 7c7a ldrb r2, [r7, #17] - 803ee08: 4962 ldr r1, [pc, #392] ; (803ef94 ) - 803ee0a: 4613 mov r3, r2 - 803ee0c: 005b lsls r3, r3, #1 - 803ee0e: 4413 add r3, r2 - 803ee10: 00db lsls r3, r3, #3 - 803ee12: 440b add r3, r1 - 803ee14: 3314 adds r3, #20 - 803ee16: 781b ldrb r3, [r3, #0] - 803ee18: 2b01 cmp r3, #1 - 803ee1a: d806 bhi.n 803ee2a - 803ee1c: 4b5a ldr r3, [pc, #360] ; (803ef88 ) - 803ee1e: f240 32cd movw r2, #973 ; 0x3cd - 803ee22: 495d ldr r1, [pc, #372] ; (803ef98 ) - 803ee24: 485a ldr r0, [pc, #360] ; (803ef90 ) - 803ee26: f001 fe73 bl 8040b10 + 803ee74: 7c7a ldrb r2, [r7, #17] + 803ee76: 4968 ldr r1, [pc, #416] ; (803f018 ) + 803ee78: 4613 mov r3, r2 + 803ee7a: 005b lsls r3, r3, #1 + 803ee7c: 4413 add r3, r2 + 803ee7e: 00db lsls r3, r3, #3 + 803ee80: 440b add r3, r1 + 803ee82: 3314 adds r3, #20 + 803ee84: 781b ldrb r3, [r3, #0] + 803ee86: 2b01 cmp r3, #1 + 803ee88: d011 beq.n 803eeae + 803ee8a: 7c7a ldrb r2, [r7, #17] + 803ee8c: 4962 ldr r1, [pc, #392] ; (803f018 ) + 803ee8e: 4613 mov r3, r2 + 803ee90: 005b lsls r3, r3, #1 + 803ee92: 4413 add r3, r2 + 803ee94: 00db lsls r3, r3, #3 + 803ee96: 440b add r3, r1 + 803ee98: 3314 adds r3, #20 + 803ee9a: 781b ldrb r3, [r3, #0] + 803ee9c: 2b01 cmp r3, #1 + 803ee9e: d806 bhi.n 803eeae + 803eea0: 4b5a ldr r3, [pc, #360] ; (803f00c ) + 803eea2: f240 32cd movw r2, #973 ; 0x3cd + 803eea6: 495d ldr r1, [pc, #372] ; (803f01c ) + 803eea8: 485a ldr r0, [pc, #360] ; (803f014 ) + 803eeaa: f001 fe73 bl 8040b94 ((arp_table[i].state == ETHARP_STATE_PENDING) || (arp_table[i].state >= ETHARP_STATE_STABLE))); /* do we have a new entry? or an implicit query request? */ if (is_new_entry || (q == NULL)) { - 803ee2a: 6a3b ldr r3, [r7, #32] - 803ee2c: 2b00 cmp r3, #0 - 803ee2e: d102 bne.n 803ee36 - 803ee30: 687b ldr r3, [r7, #4] - 803ee32: 2b00 cmp r3, #0 - 803ee34: d10c bne.n 803ee50 + 803eeae: 6a3b ldr r3, [r7, #32] + 803eeb0: 2b00 cmp r3, #0 + 803eeb2: d102 bne.n 803eeba + 803eeb4: 687b ldr r3, [r7, #4] + 803eeb6: 2b00 cmp r3, #0 + 803eeb8: d10c bne.n 803eed4 /* try to resolve it; send out ARP request */ result = etharp_request(netif, ipaddr); - 803ee36: 68b9 ldr r1, [r7, #8] - 803ee38: 68f8 ldr r0, [r7, #12] - 803ee3a: f000 f963 bl 803f104 - 803ee3e: 4603 mov r3, r0 - 803ee40: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803eeba: 68b9 ldr r1, [r7, #8] + 803eebc: 68f8 ldr r0, [r7, #12] + 803eebe: f000 f963 bl 803f188 + 803eec2: 4603 mov r3, r0 + 803eec4: f887 3027 strb.w r3, [r7, #39] ; 0x27 /* ARP request couldn't be sent */ /* We don't re-send arp request in etharp_tmr, but we still queue packets, since this failure could be temporary, and the next packet calling etharp_query again could lead to sending the queued packets. */ } if (q == NULL) { - 803ee44: 687b ldr r3, [r7, #4] - 803ee46: 2b00 cmp r3, #0 - 803ee48: d102 bne.n 803ee50 + 803eec8: 687b ldr r3, [r7, #4] + 803eeca: 2b00 cmp r3, #0 + 803eecc: d102 bne.n 803eed4 return result; - 803ee4a: f997 3027 ldrsb.w r3, [r7, #39] ; 0x27 - 803ee4e: e096 b.n 803ef7e + 803eece: f997 3027 ldrsb.w r3, [r7, #39] ; 0x27 + 803eed2: e096 b.n 803f002 } } /* packet given? */ LWIP_ASSERT("q != NULL", q != NULL); - 803ee50: 687b ldr r3, [r7, #4] - 803ee52: 2b00 cmp r3, #0 - 803ee54: d106 bne.n 803ee64 - 803ee56: 4b4c ldr r3, [pc, #304] ; (803ef88 ) - 803ee58: f240 32e1 movw r2, #993 ; 0x3e1 - 803ee5c: 494f ldr r1, [pc, #316] ; (803ef9c ) - 803ee5e: 484c ldr r0, [pc, #304] ; (803ef90 ) - 803ee60: f001 fe56 bl 8040b10 + 803eed4: 687b ldr r3, [r7, #4] + 803eed6: 2b00 cmp r3, #0 + 803eed8: d106 bne.n 803eee8 + 803eeda: 4b4c ldr r3, [pc, #304] ; (803f00c ) + 803eedc: f240 32e1 movw r2, #993 ; 0x3e1 + 803eee0: 494f ldr r1, [pc, #316] ; (803f020 ) + 803eee2: 484c ldr r0, [pc, #304] ; (803f014 ) + 803eee4: f001 fe56 bl 8040b94 /* stable entry? */ if (arp_table[i].state >= ETHARP_STATE_STABLE) { - 803ee64: 7c7a ldrb r2, [r7, #17] - 803ee66: 494b ldr r1, [pc, #300] ; (803ef94 ) - 803ee68: 4613 mov r3, r2 - 803ee6a: 005b lsls r3, r3, #1 - 803ee6c: 4413 add r3, r2 - 803ee6e: 00db lsls r3, r3, #3 - 803ee70: 440b add r3, r1 - 803ee72: 3314 adds r3, #20 - 803ee74: 781b ldrb r3, [r3, #0] - 803ee76: 2b01 cmp r3, #1 - 803ee78: d917 bls.n 803eeaa + 803eee8: 7c7a ldrb r2, [r7, #17] + 803eeea: 494b ldr r1, [pc, #300] ; (803f018 ) + 803eeec: 4613 mov r3, r2 + 803eeee: 005b lsls r3, r3, #1 + 803eef0: 4413 add r3, r2 + 803eef2: 00db lsls r3, r3, #3 + 803eef4: 440b add r3, r1 + 803eef6: 3314 adds r3, #20 + 803eef8: 781b ldrb r3, [r3, #0] + 803eefa: 2b01 cmp r3, #1 + 803eefc: d917 bls.n 803ef2e /* we have a valid IP->Ethernet address mapping */ ETHARP_SET_ADDRHINT(netif, i); - 803ee7a: 4a49 ldr r2, [pc, #292] ; (803efa0 ) - 803ee7c: 7c7b ldrb r3, [r7, #17] - 803ee7e: 7013 strb r3, [r2, #0] + 803eefe: 4a49 ldr r2, [pc, #292] ; (803f024 ) + 803ef00: 7c7b ldrb r3, [r7, #17] + 803ef02: 7013 strb r3, [r2, #0] /* send the packet */ result = ethernet_output(netif, q, srcaddr, &(arp_table[i].ethaddr), ETHTYPE_IP); - 803ee80: 7c7a ldrb r2, [r7, #17] - 803ee82: 4613 mov r3, r2 - 803ee84: 005b lsls r3, r3, #1 - 803ee86: 4413 add r3, r2 - 803ee88: 00db lsls r3, r3, #3 - 803ee8a: 3308 adds r3, #8 - 803ee8c: 4a41 ldr r2, [pc, #260] ; (803ef94 ) - 803ee8e: 4413 add r3, r2 - 803ee90: 3304 adds r3, #4 - 803ee92: f44f 6200 mov.w r2, #2048 ; 0x800 - 803ee96: 9200 str r2, [sp, #0] - 803ee98: 697a ldr r2, [r7, #20] - 803ee9a: 6879 ldr r1, [r7, #4] - 803ee9c: 68f8 ldr r0, [r7, #12] - 803ee9e: f001 fc9b bl 80407d8 - 803eea2: 4603 mov r3, r0 - 803eea4: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 803eea8: e067 b.n 803ef7a + 803ef04: 7c7a ldrb r2, [r7, #17] + 803ef06: 4613 mov r3, r2 + 803ef08: 005b lsls r3, r3, #1 + 803ef0a: 4413 add r3, r2 + 803ef0c: 00db lsls r3, r3, #3 + 803ef0e: 3308 adds r3, #8 + 803ef10: 4a41 ldr r2, [pc, #260] ; (803f018 ) + 803ef12: 4413 add r3, r2 + 803ef14: 3304 adds r3, #4 + 803ef16: f44f 6200 mov.w r2, #2048 ; 0x800 + 803ef1a: 9200 str r2, [sp, #0] + 803ef1c: 697a ldr r2, [r7, #20] + 803ef1e: 6879 ldr r1, [r7, #4] + 803ef20: 68f8 ldr r0, [r7, #12] + 803ef22: f001 fc9b bl 804085c + 803ef26: 4603 mov r3, r0 + 803ef28: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803ef2c: e067 b.n 803effe /* pending entry? (either just created or already pending */ } else if (arp_table[i].state == ETHARP_STATE_PENDING) { - 803eeaa: 7c7a ldrb r2, [r7, #17] - 803eeac: 4939 ldr r1, [pc, #228] ; (803ef94 ) - 803eeae: 4613 mov r3, r2 - 803eeb0: 005b lsls r3, r3, #1 - 803eeb2: 4413 add r3, r2 - 803eeb4: 00db lsls r3, r3, #3 - 803eeb6: 440b add r3, r1 - 803eeb8: 3314 adds r3, #20 - 803eeba: 781b ldrb r3, [r3, #0] - 803eebc: 2b01 cmp r3, #1 - 803eebe: d15c bne.n 803ef7a + 803ef2e: 7c7a ldrb r2, [r7, #17] + 803ef30: 4939 ldr r1, [pc, #228] ; (803f018 ) + 803ef32: 4613 mov r3, r2 + 803ef34: 005b lsls r3, r3, #1 + 803ef36: 4413 add r3, r2 + 803ef38: 00db lsls r3, r3, #3 + 803ef3a: 440b add r3, r1 + 803ef3c: 3314 adds r3, #20 + 803ef3e: 781b ldrb r3, [r3, #0] + 803ef40: 2b01 cmp r3, #1 + 803ef42: d15c bne.n 803effe /* entry is still pending, queue the given packet 'q' */ struct pbuf *p; int copy_needed = 0; - 803eec0: 2300 movs r3, #0 - 803eec2: 61bb str r3, [r7, #24] + 803ef44: 2300 movs r3, #0 + 803ef46: 61bb str r3, [r7, #24] /* IF q includes a pbuf that must be copied, copy the whole chain into a * new PBUF_RAM. See the definition of PBUF_NEEDS_COPY for details. */ p = q; - 803eec4: 687b ldr r3, [r7, #4] - 803eec6: 61fb str r3, [r7, #28] + 803ef48: 687b ldr r3, [r7, #4] + 803ef4a: 61fb str r3, [r7, #28] while (p) { - 803eec8: e01c b.n 803ef04 + 803ef4c: e01c b.n 803ef88 LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0)); - 803eeca: 69fb ldr r3, [r7, #28] - 803eecc: 895a ldrh r2, [r3, #10] - 803eece: 69fb ldr r3, [r7, #28] - 803eed0: 891b ldrh r3, [r3, #8] - 803eed2: 429a cmp r2, r3 - 803eed4: d10a bne.n 803eeec - 803eed6: 69fb ldr r3, [r7, #28] - 803eed8: 681b ldr r3, [r3, #0] - 803eeda: 2b00 cmp r3, #0 - 803eedc: d006 beq.n 803eeec - 803eede: 4b2a ldr r3, [pc, #168] ; (803ef88 ) - 803eee0: f240 32f1 movw r2, #1009 ; 0x3f1 - 803eee4: 492f ldr r1, [pc, #188] ; (803efa4 ) - 803eee6: 482a ldr r0, [pc, #168] ; (803ef90 ) - 803eee8: f001 fe12 bl 8040b10 + 803ef4e: 69fb ldr r3, [r7, #28] + 803ef50: 895a ldrh r2, [r3, #10] + 803ef52: 69fb ldr r3, [r7, #28] + 803ef54: 891b ldrh r3, [r3, #8] + 803ef56: 429a cmp r2, r3 + 803ef58: d10a bne.n 803ef70 + 803ef5a: 69fb ldr r3, [r7, #28] + 803ef5c: 681b ldr r3, [r3, #0] + 803ef5e: 2b00 cmp r3, #0 + 803ef60: d006 beq.n 803ef70 + 803ef62: 4b2a ldr r3, [pc, #168] ; (803f00c ) + 803ef64: f240 32f1 movw r2, #1009 ; 0x3f1 + 803ef68: 492f ldr r1, [pc, #188] ; (803f028 ) + 803ef6a: 482a ldr r0, [pc, #168] ; (803f014 ) + 803ef6c: f001 fe12 bl 8040b94 if (PBUF_NEEDS_COPY(p)) { - 803eeec: 69fb ldr r3, [r7, #28] - 803eeee: 7b1b ldrb r3, [r3, #12] - 803eef0: f003 0340 and.w r3, r3, #64 ; 0x40 - 803eef4: 2b00 cmp r3, #0 - 803eef6: d002 beq.n 803eefe + 803ef70: 69fb ldr r3, [r7, #28] + 803ef72: 7b1b ldrb r3, [r3, #12] + 803ef74: f003 0340 and.w r3, r3, #64 ; 0x40 + 803ef78: 2b00 cmp r3, #0 + 803ef7a: d002 beq.n 803ef82 copy_needed = 1; - 803eef8: 2301 movs r3, #1 - 803eefa: 61bb str r3, [r7, #24] + 803ef7c: 2301 movs r3, #1 + 803ef7e: 61bb str r3, [r7, #24] break; - 803eefc: e005 b.n 803ef0a + 803ef80: e005 b.n 803ef8e } p = p->next; - 803eefe: 69fb ldr r3, [r7, #28] - 803ef00: 681b ldr r3, [r3, #0] - 803ef02: 61fb str r3, [r7, #28] + 803ef82: 69fb ldr r3, [r7, #28] + 803ef84: 681b ldr r3, [r3, #0] + 803ef86: 61fb str r3, [r7, #28] while (p) { - 803ef04: 69fb ldr r3, [r7, #28] - 803ef06: 2b00 cmp r3, #0 - 803ef08: d1df bne.n 803eeca + 803ef88: 69fb ldr r3, [r7, #28] + 803ef8a: 2b00 cmp r3, #0 + 803ef8c: d1df bne.n 803ef4e } if (copy_needed) { - 803ef0a: 69bb ldr r3, [r7, #24] - 803ef0c: 2b00 cmp r3, #0 - 803ef0e: d007 beq.n 803ef20 + 803ef8e: 69bb ldr r3, [r7, #24] + 803ef90: 2b00 cmp r3, #0 + 803ef92: d007 beq.n 803efa4 /* copy the whole packet into new pbufs */ p = pbuf_clone(PBUF_LINK, PBUF_RAM, q); - 803ef10: 687a ldr r2, [r7, #4] - 803ef12: f44f 7120 mov.w r1, #640 ; 0x280 - 803ef16: 200e movs r0, #14 - 803ef18: f7f8 fe6c bl 8037bf4 - 803ef1c: 61f8 str r0, [r7, #28] - 803ef1e: e004 b.n 803ef2a + 803ef94: 687a ldr r2, [r7, #4] + 803ef96: f44f 7120 mov.w r1, #640 ; 0x280 + 803ef9a: 200e movs r0, #14 + 803ef9c: f7f8 fe6c bl 8037c78 + 803efa0: 61f8 str r0, [r7, #28] + 803efa2: e004 b.n 803efae } else { /* referencing the old pbuf is enough */ p = q; - 803ef20: 687b ldr r3, [r7, #4] - 803ef22: 61fb str r3, [r7, #28] + 803efa4: 687b ldr r3, [r7, #4] + 803efa6: 61fb str r3, [r7, #28] pbuf_ref(p); - 803ef24: 69f8 ldr r0, [r7, #28] - 803ef26: f7f8 fca9 bl 803787c + 803efa8: 69f8 ldr r0, [r7, #28] + 803efaa: f7f8 fca9 bl 8037900 } /* packet could be taken over? */ if (p != NULL) { - 803ef2a: 69fb ldr r3, [r7, #28] - 803ef2c: 2b00 cmp r3, #0 - 803ef2e: d021 beq.n 803ef74 + 803efae: 69fb ldr r3, [r7, #28] + 803efb0: 2b00 cmp r3, #0 + 803efb2: d021 beq.n 803eff8 LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); result = ERR_MEM; } #else /* ARP_QUEUEING */ /* always queue one packet per ARP request only, freeing a previously queued packet */ if (arp_table[i].q != NULL) { - 803ef30: 7c7a ldrb r2, [r7, #17] - 803ef32: 4918 ldr r1, [pc, #96] ; (803ef94 ) - 803ef34: 4613 mov r3, r2 - 803ef36: 005b lsls r3, r3, #1 - 803ef38: 4413 add r3, r2 - 803ef3a: 00db lsls r3, r3, #3 - 803ef3c: 440b add r3, r1 - 803ef3e: 681b ldr r3, [r3, #0] - 803ef40: 2b00 cmp r3, #0 - 803ef42: d00a beq.n 803ef5a + 803efb4: 7c7a ldrb r2, [r7, #17] + 803efb6: 4918 ldr r1, [pc, #96] ; (803f018 ) + 803efb8: 4613 mov r3, r2 + 803efba: 005b lsls r3, r3, #1 + 803efbc: 4413 add r3, r2 + 803efbe: 00db lsls r3, r3, #3 + 803efc0: 440b add r3, r1 + 803efc2: 681b ldr r3, [r3, #0] + 803efc4: 2b00 cmp r3, #0 + 803efc6: d00a beq.n 803efde LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"U16_F"\n", (void *)q, (u16_t)i)); pbuf_free(arp_table[i].q); - 803ef44: 7c7a ldrb r2, [r7, #17] - 803ef46: 4913 ldr r1, [pc, #76] ; (803ef94 ) - 803ef48: 4613 mov r3, r2 - 803ef4a: 005b lsls r3, r3, #1 - 803ef4c: 4413 add r3, r2 - 803ef4e: 00db lsls r3, r3, #3 - 803ef50: 440b add r3, r1 - 803ef52: 681b ldr r3, [r3, #0] - 803ef54: 4618 mov r0, r3 - 803ef56: f7f8 fbf1 bl 803773c + 803efc8: 7c7a ldrb r2, [r7, #17] + 803efca: 4913 ldr r1, [pc, #76] ; (803f018 ) + 803efcc: 4613 mov r3, r2 + 803efce: 005b lsls r3, r3, #1 + 803efd0: 4413 add r3, r2 + 803efd2: 00db lsls r3, r3, #3 + 803efd4: 440b add r3, r1 + 803efd6: 681b ldr r3, [r3, #0] + 803efd8: 4618 mov r0, r3 + 803efda: f7f8 fbf1 bl 80377c0 } arp_table[i].q = p; - 803ef5a: 7c7a ldrb r2, [r7, #17] - 803ef5c: 490d ldr r1, [pc, #52] ; (803ef94 ) - 803ef5e: 4613 mov r3, r2 - 803ef60: 005b lsls r3, r3, #1 - 803ef62: 4413 add r3, r2 - 803ef64: 00db lsls r3, r3, #3 - 803ef66: 440b add r3, r1 - 803ef68: 69fa ldr r2, [r7, #28] - 803ef6a: 601a str r2, [r3, #0] + 803efde: 7c7a ldrb r2, [r7, #17] + 803efe0: 490d ldr r1, [pc, #52] ; (803f018 ) + 803efe2: 4613 mov r3, r2 + 803efe4: 005b lsls r3, r3, #1 + 803efe6: 4413 add r3, r2 + 803efe8: 00db lsls r3, r3, #3 + 803efea: 440b add r3, r1 + 803efec: 69fa ldr r2, [r7, #28] + 803efee: 601a str r2, [r3, #0] result = ERR_OK; - 803ef6c: 2300 movs r3, #0 - 803ef6e: f887 3027 strb.w r3, [r7, #39] ; 0x27 - 803ef72: e002 b.n 803ef7a + 803eff0: 2300 movs r3, #0 + 803eff2: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803eff6: e002 b.n 803effe LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"U16_F"\n", (void *)q, (u16_t)i)); #endif /* ARP_QUEUEING */ } else { ETHARP_STATS_INC(etharp.memerr); LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); result = ERR_MEM; - 803ef74: 23ff movs r3, #255 ; 0xff - 803ef76: f887 3027 strb.w r3, [r7, #39] ; 0x27 + 803eff8: 23ff movs r3, #255 ; 0xff + 803effa: f887 3027 strb.w r3, [r7, #39] ; 0x27 } } return result; - 803ef7a: f997 3027 ldrsb.w r3, [r7, #39] ; 0x27 -} - 803ef7e: 4618 mov r0, r3 - 803ef80: 3728 adds r7, #40 ; 0x28 - 803ef82: 46bd mov sp, r7 - 803ef84: bd80 pop {r7, pc} - 803ef86: bf00 nop - 803ef88: 080445e8 .word 0x080445e8 - 803ef8c: 08044794 .word 0x08044794 - 803ef90: 08044660 .word 0x08044660 - 803ef94: 2400e9b8 .word 0x2400e9b8 - 803ef98: 080447a4 .word 0x080447a4 - 803ef9c: 08044788 .word 0x08044788 - 803efa0: 2400eaa8 .word 0x2400eaa8 - 803efa4: 080447cc .word 0x080447cc - -0803efa8 : + 803effe: f997 3027 ldrsb.w r3, [r7, #39] ; 0x27 +} + 803f002: 4618 mov r0, r3 + 803f004: 3728 adds r7, #40 ; 0x28 + 803f006: 46bd mov sp, r7 + 803f008: bd80 pop {r7, pc} + 803f00a: bf00 nop + 803f00c: 08044668 .word 0x08044668 + 803f010: 08044814 .word 0x08044814 + 803f014: 080446e0 .word 0x080446e0 + 803f018: 2400e9c0 .word 0x2400e9c0 + 803f01c: 08044824 .word 0x08044824 + 803f020: 08044808 .word 0x08044808 + 803f024: 2400eab0 .word 0x2400eab0 + 803f028: 0804484c .word 0x0804484c + +0803f02c : etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr, const struct eth_addr *ethdst_addr, const struct eth_addr *hwsrc_addr, const ip4_addr_t *ipsrc_addr, const struct eth_addr *hwdst_addr, const ip4_addr_t *ipdst_addr, const u16_t opcode) { - 803efa8: b580 push {r7, lr} - 803efaa: b08a sub sp, #40 ; 0x28 - 803efac: af02 add r7, sp, #8 - 803efae: 60f8 str r0, [r7, #12] - 803efb0: 60b9 str r1, [r7, #8] - 803efb2: 607a str r2, [r7, #4] - 803efb4: 603b str r3, [r7, #0] + 803f02c: b580 push {r7, lr} + 803f02e: b08a sub sp, #40 ; 0x28 + 803f030: af02 add r7, sp, #8 + 803f032: 60f8 str r0, [r7, #12] + 803f034: 60b9 str r1, [r7, #8] + 803f036: 607a str r2, [r7, #4] + 803f038: 603b str r3, [r7, #0] struct pbuf *p; err_t result = ERR_OK; - 803efb6: 2300 movs r3, #0 - 803efb8: 77fb strb r3, [r7, #31] + 803f03a: 2300 movs r3, #0 + 803f03c: 77fb strb r3, [r7, #31] struct etharp_hdr *hdr; LWIP_ASSERT("netif != NULL", netif != NULL); - 803efba: 68fb ldr r3, [r7, #12] - 803efbc: 2b00 cmp r3, #0 - 803efbe: d106 bne.n 803efce - 803efc0: 4b3a ldr r3, [pc, #232] ; (803f0ac ) - 803efc2: f240 4257 movw r2, #1111 ; 0x457 - 803efc6: 493a ldr r1, [pc, #232] ; (803f0b0 ) - 803efc8: 483a ldr r0, [pc, #232] ; (803f0b4 ) - 803efca: f001 fda1 bl 8040b10 + 803f03e: 68fb ldr r3, [r7, #12] + 803f040: 2b00 cmp r3, #0 + 803f042: d106 bne.n 803f052 + 803f044: 4b3a ldr r3, [pc, #232] ; (803f130 ) + 803f046: f240 4257 movw r2, #1111 ; 0x457 + 803f04a: 493a ldr r1, [pc, #232] ; (803f134 ) + 803f04c: 483a ldr r0, [pc, #232] ; (803f138 ) + 803f04e: f001 fda1 bl 8040b94 /* allocate a pbuf for the outgoing ARP request packet */ p = pbuf_alloc(PBUF_LINK, SIZEOF_ETHARP_HDR, PBUF_RAM); - 803efce: f44f 7220 mov.w r2, #640 ; 0x280 - 803efd2: 211c movs r1, #28 - 803efd4: 200e movs r0, #14 - 803efd6: f7f8 f8cd bl 8037174 - 803efda: 61b8 str r0, [r7, #24] + 803f052: f44f 7220 mov.w r2, #640 ; 0x280 + 803f056: 211c movs r1, #28 + 803f058: 200e movs r0, #14 + 803f05a: f7f8 f8cd bl 80371f8 + 803f05e: 61b8 str r0, [r7, #24] /* could allocate a pbuf for an ARP request? */ if (p == NULL) { - 803efdc: 69bb ldr r3, [r7, #24] - 803efde: 2b00 cmp r3, #0 - 803efe0: d102 bne.n 803efe8 + 803f060: 69bb ldr r3, [r7, #24] + 803f062: 2b00 cmp r3, #0 + 803f064: d102 bne.n 803f06c LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("etharp_raw: could not allocate pbuf for ARP request.\n")); ETHARP_STATS_INC(etharp.memerr); return ERR_MEM; - 803efe2: f04f 33ff mov.w r3, #4294967295 - 803efe6: e05d b.n 803f0a4 + 803f066: f04f 33ff mov.w r3, #4294967295 + 803f06a: e05d b.n 803f128 } LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr", - 803efe8: 69bb ldr r3, [r7, #24] - 803efea: 895b ldrh r3, [r3, #10] - 803efec: 2b1b cmp r3, #27 - 803efee: d806 bhi.n 803effe - 803eff0: 4b2e ldr r3, [pc, #184] ; (803f0ac ) - 803eff2: f240 4262 movw r2, #1122 ; 0x462 - 803eff6: 4930 ldr r1, [pc, #192] ; (803f0b8 ) - 803eff8: 482e ldr r0, [pc, #184] ; (803f0b4 ) - 803effa: f001 fd89 bl 8040b10 + 803f06c: 69bb ldr r3, [r7, #24] + 803f06e: 895b ldrh r3, [r3, #10] + 803f070: 2b1b cmp r3, #27 + 803f072: d806 bhi.n 803f082 + 803f074: 4b2e ldr r3, [pc, #184] ; (803f130 ) + 803f076: f240 4262 movw r2, #1122 ; 0x462 + 803f07a: 4930 ldr r1, [pc, #192] ; (803f13c ) + 803f07c: 482e ldr r0, [pc, #184] ; (803f138 ) + 803f07e: f001 fd89 bl 8040b94 (p->len >= SIZEOF_ETHARP_HDR)); hdr = (struct etharp_hdr *)p->payload; - 803effe: 69bb ldr r3, [r7, #24] - 803f000: 685b ldr r3, [r3, #4] - 803f002: 617b str r3, [r7, #20] + 803f082: 69bb ldr r3, [r7, #24] + 803f084: 685b ldr r3, [r3, #4] + 803f086: 617b str r3, [r7, #20] LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n")); hdr->opcode = lwip_htons(opcode); - 803f004: 8ebb ldrh r3, [r7, #52] ; 0x34 - 803f006: 4618 mov r0, r3 - 803f008: f7f6 ff66 bl 8035ed8 - 803f00c: 4603 mov r3, r0 - 803f00e: 461a mov r2, r3 - 803f010: 697b ldr r3, [r7, #20] - 803f012: 80da strh r2, [r3, #6] + 803f088: 8ebb ldrh r3, [r7, #52] ; 0x34 + 803f08a: 4618 mov r0, r3 + 803f08c: f7f6 ff66 bl 8035f5c + 803f090: 4603 mov r3, r0 + 803f092: 461a mov r2, r3 + 803f094: 697b ldr r3, [r7, #20] + 803f096: 80da strh r2, [r3, #6] LWIP_ASSERT("netif->hwaddr_len must be the same as ETH_HWADDR_LEN for etharp!", - 803f014: 68fb ldr r3, [r7, #12] - 803f016: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 803f01a: 2b06 cmp r3, #6 - 803f01c: d006 beq.n 803f02c - 803f01e: 4b23 ldr r3, [pc, #140] ; (803f0ac ) - 803f020: f240 4269 movw r2, #1129 ; 0x469 - 803f024: 4925 ldr r1, [pc, #148] ; (803f0bc ) - 803f026: 4823 ldr r0, [pc, #140] ; (803f0b4 ) - 803f028: f001 fd72 bl 8040b10 + 803f098: 68fb ldr r3, [r7, #12] + 803f09a: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 + 803f09e: 2b06 cmp r3, #6 + 803f0a0: d006 beq.n 803f0b0 + 803f0a2: 4b23 ldr r3, [pc, #140] ; (803f130 ) + 803f0a4: f240 4269 movw r2, #1129 ; 0x469 + 803f0a8: 4925 ldr r1, [pc, #148] ; (803f140 ) + 803f0aa: 4823 ldr r0, [pc, #140] ; (803f138 ) + 803f0ac: f001 fd72 bl 8040b94 (netif->hwaddr_len == ETH_HWADDR_LEN)); /* Write the ARP MAC-Addresses */ SMEMCPY(&hdr->shwaddr, hwsrc_addr, ETH_HWADDR_LEN); - 803f02c: 697b ldr r3, [r7, #20] - 803f02e: 3308 adds r3, #8 - 803f030: 2206 movs r2, #6 - 803f032: 6839 ldr r1, [r7, #0] - 803f034: 4618 mov r0, r3 - 803f036: f001 fc5b bl 80408f0 + 803f0b0: 697b ldr r3, [r7, #20] + 803f0b2: 3308 adds r3, #8 + 803f0b4: 2206 movs r2, #6 + 803f0b6: 6839 ldr r1, [r7, #0] + 803f0b8: 4618 mov r0, r3 + 803f0ba: f001 fc5b bl 8040974 SMEMCPY(&hdr->dhwaddr, hwdst_addr, ETH_HWADDR_LEN); - 803f03a: 697b ldr r3, [r7, #20] - 803f03c: 3312 adds r3, #18 - 803f03e: 2206 movs r2, #6 - 803f040: 6af9 ldr r1, [r7, #44] ; 0x2c - 803f042: 4618 mov r0, r3 - 803f044: f001 fc54 bl 80408f0 + 803f0be: 697b ldr r3, [r7, #20] + 803f0c0: 3312 adds r3, #18 + 803f0c2: 2206 movs r2, #6 + 803f0c4: 6af9 ldr r1, [r7, #44] ; 0x2c + 803f0c6: 4618 mov r0, r3 + 803f0c8: f001 fc54 bl 8040974 /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without * structure packing. */ IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->sipaddr, ipsrc_addr); - 803f048: 697b ldr r3, [r7, #20] - 803f04a: 330e adds r3, #14 - 803f04c: 6aba ldr r2, [r7, #40] ; 0x28 - 803f04e: 6812 ldr r2, [r2, #0] - 803f050: 601a str r2, [r3, #0] + 803f0cc: 697b ldr r3, [r7, #20] + 803f0ce: 330e adds r3, #14 + 803f0d0: 6aba ldr r2, [r7, #40] ; 0x28 + 803f0d2: 6812 ldr r2, [r2, #0] + 803f0d4: 601a str r2, [r3, #0] IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->dipaddr, ipdst_addr); - 803f052: 697b ldr r3, [r7, #20] - 803f054: 3318 adds r3, #24 - 803f056: 6b3a ldr r2, [r7, #48] ; 0x30 - 803f058: 6812 ldr r2, [r2, #0] - 803f05a: 601a str r2, [r3, #0] + 803f0d6: 697b ldr r3, [r7, #20] + 803f0d8: 3318 adds r3, #24 + 803f0da: 6b3a ldr r2, [r7, #48] ; 0x30 + 803f0dc: 6812 ldr r2, [r2, #0] + 803f0de: 601a str r2, [r3, #0] hdr->hwtype = PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET); - 803f05c: 697b ldr r3, [r7, #20] - 803f05e: 2200 movs r2, #0 - 803f060: 701a strb r2, [r3, #0] - 803f062: 2200 movs r2, #0 - 803f064: f042 0201 orr.w r2, r2, #1 - 803f068: 705a strb r2, [r3, #1] + 803f0e0: 697b ldr r3, [r7, #20] + 803f0e2: 2200 movs r2, #0 + 803f0e4: 701a strb r2, [r3, #0] + 803f0e6: 2200 movs r2, #0 + 803f0e8: f042 0201 orr.w r2, r2, #1 + 803f0ec: 705a strb r2, [r3, #1] hdr->proto = PP_HTONS(ETHTYPE_IP); - 803f06a: 697b ldr r3, [r7, #20] - 803f06c: 2200 movs r2, #0 - 803f06e: f042 0208 orr.w r2, r2, #8 - 803f072: 709a strb r2, [r3, #2] - 803f074: 2200 movs r2, #0 - 803f076: 70da strb r2, [r3, #3] + 803f0ee: 697b ldr r3, [r7, #20] + 803f0f0: 2200 movs r2, #0 + 803f0f2: f042 0208 orr.w r2, r2, #8 + 803f0f6: 709a strb r2, [r3, #2] + 803f0f8: 2200 movs r2, #0 + 803f0fa: 70da strb r2, [r3, #3] /* set hwlen and protolen */ hdr->hwlen = ETH_HWADDR_LEN; - 803f078: 697b ldr r3, [r7, #20] - 803f07a: 2206 movs r2, #6 - 803f07c: 711a strb r2, [r3, #4] + 803f0fc: 697b ldr r3, [r7, #20] + 803f0fe: 2206 movs r2, #6 + 803f100: 711a strb r2, [r3, #4] hdr->protolen = sizeof(ip4_addr_t); - 803f07e: 697b ldr r3, [r7, #20] - 803f080: 2204 movs r2, #4 - 803f082: 715a strb r2, [r3, #5] + 803f102: 697b ldr r3, [r7, #20] + 803f104: 2204 movs r2, #4 + 803f106: 715a strb r2, [r3, #5] if (ip4_addr_islinklocal(ipsrc_addr)) { ethernet_output(netif, p, ethsrc_addr, ðbroadcast, ETHTYPE_ARP); } else #endif /* LWIP_AUTOIP */ { ethernet_output(netif, p, ethsrc_addr, ethdst_addr, ETHTYPE_ARP); - 803f084: f640 0306 movw r3, #2054 ; 0x806 - 803f088: 9300 str r3, [sp, #0] - 803f08a: 687b ldr r3, [r7, #4] - 803f08c: 68ba ldr r2, [r7, #8] - 803f08e: 69b9 ldr r1, [r7, #24] - 803f090: 68f8 ldr r0, [r7, #12] - 803f092: f001 fba1 bl 80407d8 + 803f108: f640 0306 movw r3, #2054 ; 0x806 + 803f10c: 9300 str r3, [sp, #0] + 803f10e: 687b ldr r3, [r7, #4] + 803f110: 68ba ldr r2, [r7, #8] + 803f112: 69b9 ldr r1, [r7, #24] + 803f114: 68f8 ldr r0, [r7, #12] + 803f116: f001 fba1 bl 804085c } ETHARP_STATS_INC(etharp.xmit); /* free ARP query packet */ pbuf_free(p); - 803f096: 69b8 ldr r0, [r7, #24] - 803f098: f7f8 fb50 bl 803773c + 803f11a: 69b8 ldr r0, [r7, #24] + 803f11c: f7f8 fb50 bl 80377c0 p = NULL; - 803f09c: 2300 movs r3, #0 - 803f09e: 61bb str r3, [r7, #24] + 803f120: 2300 movs r3, #0 + 803f122: 61bb str r3, [r7, #24] /* could not allocate pbuf for ARP request */ return result; - 803f0a0: f997 301f ldrsb.w r3, [r7, #31] -} - 803f0a4: 4618 mov r0, r3 - 803f0a6: 3720 adds r7, #32 - 803f0a8: 46bd mov sp, r7 - 803f0aa: bd80 pop {r7, pc} - 803f0ac: 080445e8 .word 0x080445e8 - 803f0b0: 08044738 .word 0x08044738 - 803f0b4: 08044660 .word 0x08044660 - 803f0b8: 080447e8 .word 0x080447e8 - 803f0bc: 0804481c .word 0x0804481c - -0803f0c0 : + 803f124: f997 301f ldrsb.w r3, [r7, #31] +} + 803f128: 4618 mov r0, r3 + 803f12a: 3720 adds r7, #32 + 803f12c: 46bd mov sp, r7 + 803f12e: bd80 pop {r7, pc} + 803f130: 08044668 .word 0x08044668 + 803f134: 080447b8 .word 0x080447b8 + 803f138: 080446e0 .word 0x080446e0 + 803f13c: 08044868 .word 0x08044868 + 803f140: 0804489c .word 0x0804489c + +0803f144 : * ERR_MEM if the ARP packet couldn't be allocated * any other err_t on failure */ static err_t etharp_request_dst(struct netif *netif, const ip4_addr_t *ipaddr, const struct eth_addr *hw_dst_addr) { - 803f0c0: b580 push {r7, lr} - 803f0c2: b088 sub sp, #32 - 803f0c4: af04 add r7, sp, #16 - 803f0c6: 60f8 str r0, [r7, #12] - 803f0c8: 60b9 str r1, [r7, #8] - 803f0ca: 607a str r2, [r7, #4] + 803f144: b580 push {r7, lr} + 803f146: b088 sub sp, #32 + 803f148: af04 add r7, sp, #16 + 803f14a: 60f8 str r0, [r7, #12] + 803f14c: 60b9 str r1, [r7, #8] + 803f14e: 607a str r2, [r7, #4] return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr, - 803f0cc: 68fb ldr r3, [r7, #12] - 803f0ce: f103 012a add.w r1, r3, #42 ; 0x2a + 803f150: 68fb ldr r3, [r7, #12] + 803f152: f103 012a add.w r1, r3, #42 ; 0x2a (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), ðzero, - 803f0d2: 68fb ldr r3, [r7, #12] - 803f0d4: f103 002a add.w r0, r3, #42 ; 0x2a - 803f0d8: 68fb ldr r3, [r7, #12] - 803f0da: 3304 adds r3, #4 + 803f156: 68fb ldr r3, [r7, #12] + 803f158: f103 002a add.w r0, r3, #42 ; 0x2a + 803f15c: 68fb ldr r3, [r7, #12] + 803f15e: 3304 adds r3, #4 return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr, - 803f0dc: 2201 movs r2, #1 - 803f0de: 9203 str r2, [sp, #12] - 803f0e0: 68ba ldr r2, [r7, #8] - 803f0e2: 9202 str r2, [sp, #8] - 803f0e4: 4a06 ldr r2, [pc, #24] ; (803f100 ) - 803f0e6: 9201 str r2, [sp, #4] - 803f0e8: 9300 str r3, [sp, #0] - 803f0ea: 4603 mov r3, r0 - 803f0ec: 687a ldr r2, [r7, #4] - 803f0ee: 68f8 ldr r0, [r7, #12] - 803f0f0: f7ff ff5a bl 803efa8 - 803f0f4: 4603 mov r3, r0 + 803f160: 2201 movs r2, #1 + 803f162: 9203 str r2, [sp, #12] + 803f164: 68ba ldr r2, [r7, #8] + 803f166: 9202 str r2, [sp, #8] + 803f168: 4a06 ldr r2, [pc, #24] ; (803f184 ) + 803f16a: 9201 str r2, [sp, #4] + 803f16c: 9300 str r3, [sp, #0] + 803f16e: 4603 mov r3, r0 + 803f170: 687a ldr r2, [r7, #4] + 803f172: 68f8 ldr r0, [r7, #12] + 803f174: f7ff ff5a bl 803f02c + 803f178: 4603 mov r3, r0 ipaddr, ARP_REQUEST); } - 803f0f6: 4618 mov r0, r3 - 803f0f8: 3710 adds r7, #16 - 803f0fa: 46bd mov sp, r7 - 803f0fc: bd80 pop {r7, pc} - 803f0fe: bf00 nop - 803f100: 08044e0c .word 0x08044e0c + 803f17a: 4618 mov r0, r3 + 803f17c: 3710 adds r7, #16 + 803f17e: 46bd mov sp, r7 + 803f180: bd80 pop {r7, pc} + 803f182: bf00 nop + 803f184: 08044e8c .word 0x08044e8c -0803f104 : +0803f188 : * ERR_MEM if the ARP packet couldn't be allocated * any other err_t on failure */ err_t etharp_request(struct netif *netif, const ip4_addr_t *ipaddr) { - 803f104: b580 push {r7, lr} - 803f106: b082 sub sp, #8 - 803f108: af00 add r7, sp, #0 - 803f10a: 6078 str r0, [r7, #4] - 803f10c: 6039 str r1, [r7, #0] + 803f188: b580 push {r7, lr} + 803f18a: b082 sub sp, #8 + 803f18c: af00 add r7, sp, #0 + 803f18e: 6078 str r0, [r7, #4] + 803f190: 6039 str r1, [r7, #0] LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n")); return etharp_request_dst(netif, ipaddr, ðbroadcast); - 803f10e: 4a05 ldr r2, [pc, #20] ; (803f124 ) - 803f110: 6839 ldr r1, [r7, #0] - 803f112: 6878 ldr r0, [r7, #4] - 803f114: f7ff ffd4 bl 803f0c0 - 803f118: 4603 mov r3, r0 -} - 803f11a: 4618 mov r0, r3 - 803f11c: 3708 adds r7, #8 - 803f11e: 46bd mov sp, r7 - 803f120: bd80 pop {r7, pc} - 803f122: bf00 nop - 803f124: 08044e04 .word 0x08044e04 - -0803f128 : + 803f192: 4a05 ldr r2, [pc, #20] ; (803f1a8 ) + 803f194: 6839 ldr r1, [r7, #0] + 803f196: 6878 ldr r0, [r7, #4] + 803f198: f7ff ffd4 bl 803f144 + 803f19c: 4603 mov r3, r0 +} + 803f19e: 4618 mov r0, r3 + 803f1a0: 3708 adds r7, #8 + 803f1a2: 46bd mov sp, r7 + 803f1a4: bd80 pop {r7, pc} + 803f1a6: bf00 nop + 803f1a8: 08044e84 .word 0x08044e84 + +0803f1ac : * @param p the icmp echo request packet, p->payload pointing to the icmp header * @param inp the netif on which this packet was received */ void icmp_input(struct pbuf *p, struct netif *inp) { - 803f128: b580 push {r7, lr} - 803f12a: b08e sub sp, #56 ; 0x38 - 803f12c: af04 add r7, sp, #16 - 803f12e: 6078 str r0, [r7, #4] - 803f130: 6039 str r1, [r7, #0] + 803f1ac: b580 push {r7, lr} + 803f1ae: b08e sub sp, #56 ; 0x38 + 803f1b0: af04 add r7, sp, #16 + 803f1b2: 6078 str r0, [r7, #4] + 803f1b4: 6039 str r1, [r7, #0] const ip4_addr_t *src; ICMP_STATS_INC(icmp.recv); MIB2_STATS_INC(mib2.icmpinmsgs); iphdr_in = ip4_current_header(); - 803f132: 4b87 ldr r3, [pc, #540] ; (803f350 ) - 803f134: 689b ldr r3, [r3, #8] - 803f136: 627b str r3, [r7, #36] ; 0x24 + 803f1b6: 4b87 ldr r3, [pc, #540] ; (803f3d4 ) + 803f1b8: 689b ldr r3, [r3, #8] + 803f1ba: 627b str r3, [r7, #36] ; 0x24 hlen = IPH_HL_BYTES(iphdr_in); - 803f138: 6a7b ldr r3, [r7, #36] ; 0x24 - 803f13a: 781b ldrb r3, [r3, #0] - 803f13c: f003 030f and.w r3, r3, #15 - 803f140: b2db uxtb r3, r3 - 803f142: 009b lsls r3, r3, #2 - 803f144: b2db uxtb r3, r3 - 803f146: 847b strh r3, [r7, #34] ; 0x22 + 803f1bc: 6a7b ldr r3, [r7, #36] ; 0x24 + 803f1be: 781b ldrb r3, [r3, #0] + 803f1c0: f003 030f and.w r3, r3, #15 + 803f1c4: b2db uxtb r3, r3 + 803f1c6: 009b lsls r3, r3, #2 + 803f1c8: b2db uxtb r3, r3 + 803f1ca: 847b strh r3, [r7, #34] ; 0x22 if (hlen < IP_HLEN) { - 803f148: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f14a: 2b13 cmp r3, #19 - 803f14c: f240 80e8 bls.w 803f320 + 803f1cc: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f1ce: 2b13 cmp r3, #19 + 803f1d0: f240 80e8 bls.w 803f3a4 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short IP header (%"S16_F" bytes) received\n", hlen)); goto lenerr; } if (p->len < sizeof(u16_t) * 2) { - 803f150: 687b ldr r3, [r7, #4] - 803f152: 895b ldrh r3, [r3, #10] - 803f154: 2b03 cmp r3, #3 - 803f156: f240 80e5 bls.w 803f324 + 803f1d4: 687b ldr r3, [r7, #4] + 803f1d6: 895b ldrh r3, [r3, #10] + 803f1d8: 2b03 cmp r3, #3 + 803f1da: f240 80e5 bls.w 803f3a8 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len)); goto lenerr; } type = *((u8_t *)p->payload); - 803f15a: 687b ldr r3, [r7, #4] - 803f15c: 685b ldr r3, [r3, #4] - 803f15e: 781b ldrb r3, [r3, #0] - 803f160: f887 3021 strb.w r3, [r7, #33] ; 0x21 + 803f1de: 687b ldr r3, [r7, #4] + 803f1e0: 685b ldr r3, [r3, #4] + 803f1e2: 781b ldrb r3, [r3, #0] + 803f1e4: f887 3021 strb.w r3, [r7, #33] ; 0x21 #ifdef LWIP_DEBUG code = *(((u8_t *)p->payload) + 1); /* if debug is enabled but debug statement below is somehow disabled: */ LWIP_UNUSED_ARG(code); #endif /* LWIP_DEBUG */ switch (type) { - 803f164: f897 3021 ldrb.w r3, [r7, #33] ; 0x21 - 803f168: 2b00 cmp r3, #0 - 803f16a: f000 80d2 beq.w 803f312 - 803f16e: 2b08 cmp r3, #8 - 803f170: f040 80d2 bne.w 803f318 + 803f1e8: f897 3021 ldrb.w r3, [r7, #33] ; 0x21 + 803f1ec: 2b00 cmp r3, #0 + 803f1ee: f000 80d2 beq.w 803f396 + 803f1f2: 2b08 cmp r3, #8 + 803f1f4: f040 80d2 bne.w 803f39c (as obviously, an echo request has been sent, too). */ MIB2_STATS_INC(mib2.icmpinechoreps); break; case ICMP_ECHO: MIB2_STATS_INC(mib2.icmpinechos); src = ip4_current_dest_addr(); - 803f174: 4b77 ldr r3, [pc, #476] ; (803f354 ) - 803f176: 61fb str r3, [r7, #28] + 803f1f8: 4b77 ldr r3, [pc, #476] ; (803f3d8 ) + 803f1fa: 61fb str r3, [r7, #28] /* multicast destination address? */ if (ip4_addr_ismulticast(ip4_current_dest_addr())) { - 803f178: 4b75 ldr r3, [pc, #468] ; (803f350 ) - 803f17a: 695b ldr r3, [r3, #20] - 803f17c: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 803f180: 2be0 cmp r3, #224 ; 0xe0 - 803f182: f000 80d6 beq.w 803f332 + 803f1fc: 4b75 ldr r3, [pc, #468] ; (803f3d4 ) + 803f1fe: 695b ldr r3, [r3, #20] + 803f200: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803f204: 2be0 cmp r3, #224 ; 0xe0 + 803f206: f000 80d6 beq.w 803f3b6 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast pings\n")); goto icmperr; #endif /* LWIP_MULTICAST_PING */ } /* broadcast destination address? */ if (ip4_addr_isbroadcast(ip4_current_dest_addr(), ip_current_netif())) { - 803f186: 4b72 ldr r3, [pc, #456] ; (803f350 ) - 803f188: 695b ldr r3, [r3, #20] - 803f18a: 4a71 ldr r2, [pc, #452] ; (803f350 ) - 803f18c: 6812 ldr r2, [r2, #0] - 803f18e: 4611 mov r1, r2 - 803f190: 4618 mov r0, r3 - 803f192: f000 fc13 bl 803f9bc - 803f196: 4603 mov r3, r0 - 803f198: 2b00 cmp r3, #0 - 803f19a: f040 80cc bne.w 803f336 + 803f20a: 4b72 ldr r3, [pc, #456] ; (803f3d4 ) + 803f20c: 695b ldr r3, [r3, #20] + 803f20e: 4a71 ldr r2, [pc, #452] ; (803f3d4 ) + 803f210: 6812 ldr r2, [r2, #0] + 803f212: 4611 mov r1, r2 + 803f214: 4618 mov r0, r3 + 803f216: f000 fc13 bl 803fa40 + 803f21a: 4603 mov r3, r0 + 803f21c: 2b00 cmp r3, #0 + 803f21e: f040 80cc bne.w 803f3ba LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to broadcast pings\n")); goto icmperr; #endif /* LWIP_BROADCAST_PING */ } LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); if (p->tot_len < sizeof(struct icmp_echo_hdr)) { - 803f19e: 687b ldr r3, [r7, #4] - 803f1a0: 891b ldrh r3, [r3, #8] - 803f1a2: 2b07 cmp r3, #7 - 803f1a4: f240 80c0 bls.w 803f328 + 803f222: 687b ldr r3, [r7, #4] + 803f224: 891b ldrh r3, [r3, #8] + 803f226: 2b07 cmp r3, #7 + 803f228: f240 80c0 bls.w 803f3ac LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); goto lenerr; } #if CHECKSUM_CHECK_ICMP IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_CHECK_ICMP) { if (inet_chksum_pbuf(p) != 0) { - 803f1a8: 6878 ldr r0, [r7, #4] - 803f1aa: f7f6 ff32 bl 8036012 - 803f1ae: 4603 mov r3, r0 - 803f1b0: 2b00 cmp r3, #0 - 803f1b2: d003 beq.n 803f1bc + 803f22c: 6878 ldr r0, [r7, #4] + 803f22e: f7f6 ff32 bl 8036096 + 803f232: 4603 mov r3, r0 + 803f234: 2b00 cmp r3, #0 + 803f236: d003 beq.n 803f240 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n")); pbuf_free(p); - 803f1b4: 6878 ldr r0, [r7, #4] - 803f1b6: f7f8 fac1 bl 803773c + 803f238: 6878 ldr r0, [r7, #4] + 803f23a: f7f8 fac1 bl 80377c0 ICMP_STATS_INC(icmp.chkerr); MIB2_STATS_INC(mib2.icmpinerrors); return; - 803f1ba: e0c5 b.n 803f348 + 803f23e: e0c5 b.n 803f3cc } } #endif #if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN if (pbuf_add_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) { - 803f1bc: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f1be: 330e adds r3, #14 - 803f1c0: 4619 mov r1, r3 - 803f1c2: 6878 ldr r0, [r7, #4] - 803f1c4: f7f8 fa24 bl 8037610 - 803f1c8: 4603 mov r3, r0 - 803f1ca: 2b00 cmp r3, #0 - 803f1cc: d04b beq.n 803f266 + 803f240: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f242: 330e adds r3, #14 + 803f244: 4619 mov r1, r3 + 803f246: 6878 ldr r0, [r7, #4] + 803f248: f7f8 fa24 bl 8037694 + 803f24c: 4603 mov r3, r0 + 803f24e: 2b00 cmp r3, #0 + 803f250: d04b beq.n 803f2ea /* p is not big enough to contain link headers * allocate a new one and copy p into it */ struct pbuf *r; u16_t alloc_len = (u16_t)(p->tot_len + hlen); - 803f1ce: 687b ldr r3, [r7, #4] - 803f1d0: 891a ldrh r2, [r3, #8] - 803f1d2: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f1d4: 4413 add r3, r2 - 803f1d6: 837b strh r3, [r7, #26] + 803f252: 687b ldr r3, [r7, #4] + 803f254: 891a ldrh r2, [r3, #8] + 803f256: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f258: 4413 add r3, r2 + 803f25a: 837b strh r3, [r7, #26] if (alloc_len < p->tot_len) { - 803f1d8: 687b ldr r3, [r7, #4] - 803f1da: 891b ldrh r3, [r3, #8] - 803f1dc: 8b7a ldrh r2, [r7, #26] - 803f1de: 429a cmp r2, r3 - 803f1e0: f0c0 80ab bcc.w 803f33a + 803f25c: 687b ldr r3, [r7, #4] + 803f25e: 891b ldrh r3, [r3, #8] + 803f260: 8b7a ldrh r2, [r7, #26] + 803f262: 429a cmp r2, r3 + 803f264: f0c0 80ab bcc.w 803f3be LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed (tot_len overflow)\n")); goto icmperr; } /* allocate new packet buffer with space for link headers */ r = pbuf_alloc(PBUF_LINK, alloc_len, PBUF_RAM); - 803f1e4: 8b7b ldrh r3, [r7, #26] - 803f1e6: f44f 7220 mov.w r2, #640 ; 0x280 - 803f1ea: 4619 mov r1, r3 - 803f1ec: 200e movs r0, #14 - 803f1ee: f7f7 ffc1 bl 8037174 - 803f1f2: 6178 str r0, [r7, #20] + 803f268: 8b7b ldrh r3, [r7, #26] + 803f26a: f44f 7220 mov.w r2, #640 ; 0x280 + 803f26e: 4619 mov r1, r3 + 803f270: 200e movs r0, #14 + 803f272: f7f7 ffc1 bl 80371f8 + 803f276: 6178 str r0, [r7, #20] if (r == NULL) { - 803f1f4: 697b ldr r3, [r7, #20] - 803f1f6: 2b00 cmp r3, #0 - 803f1f8: f000 80a1 beq.w 803f33e + 803f278: 697b ldr r3, [r7, #20] + 803f27a: 2b00 cmp r3, #0 + 803f27c: f000 80a1 beq.w 803f3c2 LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n")); goto icmperr; } if (r->len < hlen + sizeof(struct icmp_echo_hdr)) { - 803f1fc: 697b ldr r3, [r7, #20] - 803f1fe: 895b ldrh r3, [r3, #10] - 803f200: 461a mov r2, r3 - 803f202: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f204: 3308 adds r3, #8 - 803f206: 429a cmp r2, r3 - 803f208: d203 bcs.n 803f212 + 803f280: 697b ldr r3, [r7, #20] + 803f282: 895b ldrh r3, [r3, #10] + 803f284: 461a mov r2, r3 + 803f286: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f288: 3308 adds r3, #8 + 803f28a: 429a cmp r2, r3 + 803f28c: d203 bcs.n 803f296 LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("first pbuf cannot hold the ICMP header")); pbuf_free(r); - 803f20a: 6978 ldr r0, [r7, #20] - 803f20c: f7f8 fa96 bl 803773c + 803f28e: 6978 ldr r0, [r7, #20] + 803f290: f7f8 fa96 bl 80377c0 goto icmperr; - 803f210: e096 b.n 803f340 + 803f294: e096 b.n 803f3c4 } /* copy the ip header */ MEMCPY(r->payload, iphdr_in, hlen); - 803f212: 697b ldr r3, [r7, #20] - 803f214: 685b ldr r3, [r3, #4] - 803f216: 8c7a ldrh r2, [r7, #34] ; 0x22 - 803f218: 6a79 ldr r1, [r7, #36] ; 0x24 - 803f21a: 4618 mov r0, r3 - 803f21c: f001 fb68 bl 80408f0 + 803f296: 697b ldr r3, [r7, #20] + 803f298: 685b ldr r3, [r3, #4] + 803f29a: 8c7a ldrh r2, [r7, #34] ; 0x22 + 803f29c: 6a79 ldr r1, [r7, #36] ; 0x24 + 803f29e: 4618 mov r0, r3 + 803f2a0: f001 fb68 bl 8040974 /* switch r->payload back to icmp header (cannot fail) */ if (pbuf_remove_header(r, hlen)) { - 803f220: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f222: 4619 mov r1, r3 - 803f224: 6978 ldr r0, [r7, #20] - 803f226: f7f8 fa03 bl 8037630 - 803f22a: 4603 mov r3, r0 - 803f22c: 2b00 cmp r3, #0 - 803f22e: d009 beq.n 803f244 + 803f2a4: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f2a6: 4619 mov r1, r3 + 803f2a8: 6978 ldr r0, [r7, #20] + 803f2aa: f7f8 fa03 bl 80376b4 + 803f2ae: 4603 mov r3, r0 + 803f2b0: 2b00 cmp r3, #0 + 803f2b2: d009 beq.n 803f2c8 LWIP_ASSERT("icmp_input: moving r->payload to icmp header failed\n", 0); - 803f230: 4b49 ldr r3, [pc, #292] ; (803f358 ) - 803f232: 22b6 movs r2, #182 ; 0xb6 - 803f234: 4949 ldr r1, [pc, #292] ; (803f35c ) - 803f236: 484a ldr r0, [pc, #296] ; (803f360 ) - 803f238: f001 fc6a bl 8040b10 + 803f2b4: 4b49 ldr r3, [pc, #292] ; (803f3dc ) + 803f2b6: 22b6 movs r2, #182 ; 0xb6 + 803f2b8: 4949 ldr r1, [pc, #292] ; (803f3e0 ) + 803f2ba: 484a ldr r0, [pc, #296] ; (803f3e4 ) + 803f2bc: f001 fc6a bl 8040b94 pbuf_free(r); - 803f23c: 6978 ldr r0, [r7, #20] - 803f23e: f7f8 fa7d bl 803773c + 803f2c0: 6978 ldr r0, [r7, #20] + 803f2c2: f7f8 fa7d bl 80377c0 goto icmperr; - 803f242: e07d b.n 803f340 + 803f2c6: e07d b.n 803f3c4 } /* copy the rest of the packet without ip header */ if (pbuf_copy(r, p) != ERR_OK) { - 803f244: 6879 ldr r1, [r7, #4] - 803f246: 6978 ldr r0, [r7, #20] - 803f248: f7f8 fb90 bl 803796c - 803f24c: 4603 mov r3, r0 - 803f24e: 2b00 cmp r3, #0 - 803f250: d003 beq.n 803f25a + 803f2c8: 6879 ldr r1, [r7, #4] + 803f2ca: 6978 ldr r0, [r7, #20] + 803f2cc: f7f8 fb90 bl 80379f0 + 803f2d0: 4603 mov r3, r0 + 803f2d2: 2b00 cmp r3, #0 + 803f2d4: d003 beq.n 803f2de LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("icmp_input: copying to new pbuf failed")); pbuf_free(r); - 803f252: 6978 ldr r0, [r7, #20] - 803f254: f7f8 fa72 bl 803773c + 803f2d6: 6978 ldr r0, [r7, #20] + 803f2d8: f7f8 fa72 bl 80377c0 goto icmperr; - 803f258: e072 b.n 803f340 + 803f2dc: e072 b.n 803f3c4 } /* free the original p */ pbuf_free(p); - 803f25a: 6878 ldr r0, [r7, #4] - 803f25c: f7f8 fa6e bl 803773c + 803f2de: 6878 ldr r0, [r7, #4] + 803f2e0: f7f8 fa6e bl 80377c0 /* we now have an identical copy of p that has room for link headers */ p = r; - 803f260: 697b ldr r3, [r7, #20] - 803f262: 607b str r3, [r7, #4] - 803f264: e00f b.n 803f286 + 803f2e4: 697b ldr r3, [r7, #20] + 803f2e6: 607b str r3, [r7, #4] + 803f2e8: e00f b.n 803f30a } else { /* restore p->payload to point to icmp header (cannot fail) */ if (pbuf_remove_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) { - 803f266: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f268: 330e adds r3, #14 - 803f26a: 4619 mov r1, r3 - 803f26c: 6878 ldr r0, [r7, #4] - 803f26e: f7f8 f9df bl 8037630 - 803f272: 4603 mov r3, r0 - 803f274: 2b00 cmp r3, #0 - 803f276: d006 beq.n 803f286 + 803f2ea: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f2ec: 330e adds r3, #14 + 803f2ee: 4619 mov r1, r3 + 803f2f0: 6878 ldr r0, [r7, #4] + 803f2f2: f7f8 f9df bl 80376b4 + 803f2f6: 4603 mov r3, r0 + 803f2f8: 2b00 cmp r3, #0 + 803f2fa: d006 beq.n 803f30a LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0); - 803f278: 4b37 ldr r3, [pc, #220] ; (803f358 ) - 803f27a: 22c7 movs r2, #199 ; 0xc7 - 803f27c: 4939 ldr r1, [pc, #228] ; (803f364 ) - 803f27e: 4838 ldr r0, [pc, #224] ; (803f360 ) - 803f280: f001 fc46 bl 8040b10 + 803f2fc: 4b37 ldr r3, [pc, #220] ; (803f3dc ) + 803f2fe: 22c7 movs r2, #199 ; 0xc7 + 803f300: 4939 ldr r1, [pc, #228] ; (803f3e8 ) + 803f302: 4838 ldr r0, [pc, #224] ; (803f3e4 ) + 803f304: f001 fc46 bl 8040b94 goto icmperr; - 803f284: e05c b.n 803f340 + 803f308: e05c b.n 803f3c4 } #endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ /* At this point, all checks are OK. */ /* We generate an answer by switching the dest and src ip addresses, * setting the icmp type to ECHO_RESPONSE and updating the checksum. */ iecho = (struct icmp_echo_hdr *)p->payload; - 803f286: 687b ldr r3, [r7, #4] - 803f288: 685b ldr r3, [r3, #4] - 803f28a: 613b str r3, [r7, #16] + 803f30a: 687b ldr r3, [r7, #4] + 803f30c: 685b ldr r3, [r3, #4] + 803f30e: 613b str r3, [r7, #16] if (pbuf_add_header(p, hlen)) { - 803f28c: 8c7b ldrh r3, [r7, #34] ; 0x22 - 803f28e: 4619 mov r1, r3 - 803f290: 6878 ldr r0, [r7, #4] - 803f292: f7f8 f9bd bl 8037610 - 803f296: 4603 mov r3, r0 - 803f298: 2b00 cmp r3, #0 - 803f29a: d13c bne.n 803f316 + 803f310: 8c7b ldrh r3, [r7, #34] ; 0x22 + 803f312: 4619 mov r1, r3 + 803f314: 6878 ldr r0, [r7, #4] + 803f316: f7f8 f9bd bl 8037694 + 803f31a: 4603 mov r3, r0 + 803f31c: 2b00 cmp r3, #0 + 803f31e: d13c bne.n 803f39a LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Can't move over header in packet")); } else { err_t ret; struct ip_hdr *iphdr = (struct ip_hdr *)p->payload; - 803f29c: 687b ldr r3, [r7, #4] - 803f29e: 685b ldr r3, [r3, #4] - 803f2a0: 60fb str r3, [r7, #12] + 803f320: 687b ldr r3, [r7, #4] + 803f322: 685b ldr r3, [r3, #4] + 803f324: 60fb str r3, [r7, #12] ip4_addr_copy(iphdr->src, *src); - 803f2a2: 69fb ldr r3, [r7, #28] - 803f2a4: 681a ldr r2, [r3, #0] - 803f2a6: 68fb ldr r3, [r7, #12] - 803f2a8: 60da str r2, [r3, #12] + 803f326: 69fb ldr r3, [r7, #28] + 803f328: 681a ldr r2, [r3, #0] + 803f32a: 68fb ldr r3, [r7, #12] + 803f32c: 60da str r2, [r3, #12] ip4_addr_copy(iphdr->dest, *ip4_current_src_addr()); - 803f2aa: 4b29 ldr r3, [pc, #164] ; (803f350 ) - 803f2ac: 691a ldr r2, [r3, #16] - 803f2ae: 68fb ldr r3, [r7, #12] - 803f2b0: 611a str r2, [r3, #16] + 803f32e: 4b29 ldr r3, [pc, #164] ; (803f3d4 ) + 803f330: 691a ldr r2, [r3, #16] + 803f332: 68fb ldr r3, [r7, #12] + 803f334: 611a str r2, [r3, #16] ICMPH_TYPE_SET(iecho, ICMP_ER); - 803f2b2: 693b ldr r3, [r7, #16] - 803f2b4: 2200 movs r2, #0 - 803f2b6: 701a strb r2, [r3, #0] + 803f336: 693b ldr r3, [r7, #16] + 803f338: 2200 movs r2, #0 + 803f33a: 701a strb r2, [r3, #0] #if CHECKSUM_GEN_ICMP IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_GEN_ICMP) { /* adjust the checksum */ if (iecho->chksum > PP_HTONS(0xffffU - (ICMP_ECHO << 8))) { - 803f2b8: 693b ldr r3, [r7, #16] - 803f2ba: 885b ldrh r3, [r3, #2] - 803f2bc: b29b uxth r3, r3 - 803f2be: f64f 72f7 movw r2, #65527 ; 0xfff7 - 803f2c2: 4293 cmp r3, r2 - 803f2c4: d907 bls.n 803f2d6 + 803f33c: 693b ldr r3, [r7, #16] + 803f33e: 885b ldrh r3, [r3, #2] + 803f340: b29b uxth r3, r3 + 803f342: f64f 72f7 movw r2, #65527 ; 0xfff7 + 803f346: 4293 cmp r3, r2 + 803f348: d907 bls.n 803f35a iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS((u16_t)(ICMP_ECHO << 8)) + 1); - 803f2c6: 693b ldr r3, [r7, #16] - 803f2c8: 885b ldrh r3, [r3, #2] - 803f2ca: b29b uxth r3, r3 - 803f2cc: 3309 adds r3, #9 - 803f2ce: b29a uxth r2, r3 - 803f2d0: 693b ldr r3, [r7, #16] - 803f2d2: 805a strh r2, [r3, #2] - 803f2d4: e006 b.n 803f2e4 + 803f34a: 693b ldr r3, [r7, #16] + 803f34c: 885b ldrh r3, [r3, #2] + 803f34e: b29b uxth r3, r3 + 803f350: 3309 adds r3, #9 + 803f352: b29a uxth r2, r3 + 803f354: 693b ldr r3, [r7, #16] + 803f356: 805a strh r2, [r3, #2] + 803f358: e006 b.n 803f368 } else { iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS(ICMP_ECHO << 8)); - 803f2d6: 693b ldr r3, [r7, #16] - 803f2d8: 885b ldrh r3, [r3, #2] - 803f2da: b29b uxth r3, r3 - 803f2dc: 3308 adds r3, #8 - 803f2de: b29a uxth r2, r3 - 803f2e0: 693b ldr r3, [r7, #16] - 803f2e2: 805a strh r2, [r3, #2] + 803f35a: 693b ldr r3, [r7, #16] + 803f35c: 885b ldrh r3, [r3, #2] + 803f35e: b29b uxth r3, r3 + 803f360: 3308 adds r3, #8 + 803f362: b29a uxth r2, r3 + 803f364: 693b ldr r3, [r7, #16] + 803f366: 805a strh r2, [r3, #2] #else /* CHECKSUM_GEN_ICMP */ iecho->chksum = 0; #endif /* CHECKSUM_GEN_ICMP */ /* Set the correct TTL and recalculate the header checksum. */ IPH_TTL_SET(iphdr, ICMP_TTL); - 803f2e4: 68fb ldr r3, [r7, #12] - 803f2e6: 22ff movs r2, #255 ; 0xff - 803f2e8: 721a strb r2, [r3, #8] + 803f368: 68fb ldr r3, [r7, #12] + 803f36a: 22ff movs r2, #255 ; 0xff + 803f36c: 721a strb r2, [r3, #8] IPH_CHKSUM_SET(iphdr, 0); - 803f2ea: 68fb ldr r3, [r7, #12] - 803f2ec: 2200 movs r2, #0 - 803f2ee: 729a strb r2, [r3, #10] - 803f2f0: 2200 movs r2, #0 - 803f2f2: 72da strb r2, [r3, #11] + 803f36e: 68fb ldr r3, [r7, #12] + 803f370: 2200 movs r2, #0 + 803f372: 729a strb r2, [r3, #10] + 803f374: 2200 movs r2, #0 + 803f376: 72da strb r2, [r3, #11] MIB2_STATS_INC(mib2.icmpoutmsgs); /* increase number of echo replies attempted to send */ MIB2_STATS_INC(mib2.icmpoutechoreps); /* send an ICMP packet */ ret = ip4_output_if(p, src, LWIP_IP_HDRINCL, - 803f2f4: 683b ldr r3, [r7, #0] - 803f2f6: 9302 str r3, [sp, #8] - 803f2f8: 2301 movs r3, #1 - 803f2fa: 9301 str r3, [sp, #4] - 803f2fc: 2300 movs r3, #0 - 803f2fe: 9300 str r3, [sp, #0] - 803f300: 23ff movs r3, #255 ; 0xff - 803f302: 2200 movs r2, #0 - 803f304: 69f9 ldr r1, [r7, #28] - 803f306: 6878 ldr r0, [r7, #4] - 803f308: f000 fa80 bl 803f80c - 803f30c: 4603 mov r3, r0 - 803f30e: 72fb strb r3, [r7, #11] + 803f378: 683b ldr r3, [r7, #0] + 803f37a: 9302 str r3, [sp, #8] + 803f37c: 2301 movs r3, #1 + 803f37e: 9301 str r3, [sp, #4] + 803f380: 2300 movs r3, #0 + 803f382: 9300 str r3, [sp, #0] + 803f384: 23ff movs r3, #255 ; 0xff + 803f386: 2200 movs r2, #0 + 803f388: 69f9 ldr r1, [r7, #28] + 803f38a: 6878 ldr r0, [r7, #4] + 803f38c: f000 fa80 bl 803f890 + 803f390: 4603 mov r3, r0 + 803f392: 72fb strb r3, [r7, #11] ICMP_TTL, 0, IP_PROTO_ICMP, inp); if (ret != ERR_OK) { LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %s\n", lwip_strerr(ret))); } } break; - 803f310: e001 b.n 803f316 + 803f394: e001 b.n 803f39a break; - 803f312: bf00 nop - 803f314: e000 b.n 803f318 + 803f396: bf00 nop + 803f398: e000 b.n 803f39c break; - 803f316: bf00 nop + 803f39a: bf00 nop LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n", (s16_t)type, (s16_t)code)); ICMP_STATS_INC(icmp.proterr); ICMP_STATS_INC(icmp.drop); } pbuf_free(p); - 803f318: 6878 ldr r0, [r7, #4] - 803f31a: f7f8 fa0f bl 803773c + 803f39c: 6878 ldr r0, [r7, #4] + 803f39e: f7f8 fa0f bl 80377c0 return; - 803f31e: e013 b.n 803f348 + 803f3a2: e013 b.n 803f3cc goto lenerr; - 803f320: bf00 nop - 803f322: e002 b.n 803f32a + 803f3a4: bf00 nop + 803f3a6: e002 b.n 803f3ae goto lenerr; - 803f324: bf00 nop - 803f326: e000 b.n 803f32a + 803f3a8: bf00 nop + 803f3aa: e000 b.n 803f3ae goto lenerr; - 803f328: bf00 nop + 803f3ac: bf00 nop lenerr: pbuf_free(p); - 803f32a: 6878 ldr r0, [r7, #4] - 803f32c: f7f8 fa06 bl 803773c + 803f3ae: 6878 ldr r0, [r7, #4] + 803f3b0: f7f8 fa06 bl 80377c0 ICMP_STATS_INC(icmp.lenerr); MIB2_STATS_INC(mib2.icmpinerrors); return; - 803f330: e00a b.n 803f348 + 803f3b4: e00a b.n 803f3cc goto icmperr; - 803f332: bf00 nop - 803f334: e004 b.n 803f340 + 803f3b6: bf00 nop + 803f3b8: e004 b.n 803f3c4 goto icmperr; - 803f336: bf00 nop - 803f338: e002 b.n 803f340 + 803f3ba: bf00 nop + 803f3bc: e002 b.n 803f3c4 goto icmperr; - 803f33a: bf00 nop - 803f33c: e000 b.n 803f340 + 803f3be: bf00 nop + 803f3c0: e000 b.n 803f3c4 goto icmperr; - 803f33e: bf00 nop + 803f3c2: bf00 nop #if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING icmperr: pbuf_free(p); - 803f340: 6878 ldr r0, [r7, #4] - 803f342: f7f8 f9fb bl 803773c + 803f3c4: 6878 ldr r0, [r7, #4] + 803f3c6: f7f8 f9fb bl 80377c0 ICMP_STATS_INC(icmp.err); MIB2_STATS_INC(mib2.icmpinerrors); return; - 803f346: bf00 nop + 803f3ca: bf00 nop #endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */ } - 803f348: 3728 adds r7, #40 ; 0x28 - 803f34a: 46bd mov sp, r7 - 803f34c: bd80 pop {r7, pc} - 803f34e: bf00 nop - 803f350: 2400b9bc .word 0x2400b9bc - 803f354: 2400b9d0 .word 0x2400b9d0 - 803f358: 08044860 .word 0x08044860 - 803f35c: 08044898 .word 0x08044898 - 803f360: 080448d0 .word 0x080448d0 - 803f364: 080448f8 .word 0x080448f8 - -0803f368 : + 803f3cc: 3728 adds r7, #40 ; 0x28 + 803f3ce: 46bd mov sp, r7 + 803f3d0: bd80 pop {r7, pc} + 803f3d2: bf00 nop + 803f3d4: 2400b9c4 .word 0x2400b9c4 + 803f3d8: 2400b9d8 .word 0x2400b9d8 + 803f3dc: 080448e0 .word 0x080448e0 + 803f3e0: 08044918 .word 0x08044918 + 803f3e4: 08044950 .word 0x08044950 + 803f3e8: 08044978 .word 0x08044978 + +0803f3ec : * p->payload pointing to the IP header * @param t type of the 'unreachable' packet */ void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) { - 803f368: b580 push {r7, lr} - 803f36a: b082 sub sp, #8 - 803f36c: af00 add r7, sp, #0 - 803f36e: 6078 str r0, [r7, #4] - 803f370: 460b mov r3, r1 - 803f372: 70fb strb r3, [r7, #3] + 803f3ec: b580 push {r7, lr} + 803f3ee: b082 sub sp, #8 + 803f3f0: af00 add r7, sp, #0 + 803f3f2: 6078 str r0, [r7, #4] + 803f3f4: 460b mov r3, r1 + 803f3f6: 70fb strb r3, [r7, #3] MIB2_STATS_INC(mib2.icmpoutdestunreachs); icmp_send_response(p, ICMP_DUR, t); - 803f374: 78fb ldrb r3, [r7, #3] - 803f376: 461a mov r2, r3 - 803f378: 2103 movs r1, #3 - 803f37a: 6878 ldr r0, [r7, #4] - 803f37c: f000 f814 bl 803f3a8 -} - 803f380: bf00 nop - 803f382: 3708 adds r7, #8 - 803f384: 46bd mov sp, r7 - 803f386: bd80 pop {r7, pc} - -0803f388 : + 803f3f8: 78fb ldrb r3, [r7, #3] + 803f3fa: 461a mov r2, r3 + 803f3fc: 2103 movs r1, #3 + 803f3fe: 6878 ldr r0, [r7, #4] + 803f400: f000 f814 bl 803f42c +} + 803f404: bf00 nop + 803f406: 3708 adds r7, #8 + 803f408: 46bd mov sp, r7 + 803f40a: bd80 pop {r7, pc} + +0803f40c : * p->payload pointing to the IP header * @param t type of the 'time exceeded' packet */ void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) { - 803f388: b580 push {r7, lr} - 803f38a: b082 sub sp, #8 - 803f38c: af00 add r7, sp, #0 - 803f38e: 6078 str r0, [r7, #4] - 803f390: 460b mov r3, r1 - 803f392: 70fb strb r3, [r7, #3] + 803f40c: b580 push {r7, lr} + 803f40e: b082 sub sp, #8 + 803f410: af00 add r7, sp, #0 + 803f412: 6078 str r0, [r7, #4] + 803f414: 460b mov r3, r1 + 803f416: 70fb strb r3, [r7, #3] MIB2_STATS_INC(mib2.icmpouttimeexcds); icmp_send_response(p, ICMP_TE, t); - 803f394: 78fb ldrb r3, [r7, #3] - 803f396: 461a mov r2, r3 - 803f398: 210b movs r1, #11 - 803f39a: 6878 ldr r0, [r7, #4] - 803f39c: f000 f804 bl 803f3a8 -} - 803f3a0: bf00 nop - 803f3a2: 3708 adds r7, #8 - 803f3a4: 46bd mov sp, r7 - 803f3a6: bd80 pop {r7, pc} - -0803f3a8 : + 803f418: 78fb ldrb r3, [r7, #3] + 803f41a: 461a mov r2, r3 + 803f41c: 210b movs r1, #11 + 803f41e: 6878 ldr r0, [r7, #4] + 803f420: f000 f804 bl 803f42c +} + 803f424: bf00 nop + 803f426: 3708 adds r7, #8 + 803f428: 46bd mov sp, r7 + 803f42a: bd80 pop {r7, pc} + +0803f42c : * @param type Type of the ICMP header * @param code Code of the ICMP header */ static void icmp_send_response(struct pbuf *p, u8_t type, u8_t code) { - 803f3a8: b580 push {r7, lr} - 803f3aa: b08c sub sp, #48 ; 0x30 - 803f3ac: af04 add r7, sp, #16 - 803f3ae: 6078 str r0, [r7, #4] - 803f3b0: 460b mov r3, r1 - 803f3b2: 70fb strb r3, [r7, #3] - 803f3b4: 4613 mov r3, r2 - 803f3b6: 70bb strb r3, [r7, #2] + 803f42c: b580 push {r7, lr} + 803f42e: b08c sub sp, #48 ; 0x30 + 803f430: af04 add r7, sp, #16 + 803f432: 6078 str r0, [r7, #4] + 803f434: 460b mov r3, r1 + 803f436: 70fb strb r3, [r7, #3] + 803f438: 4613 mov r3, r2 + 803f43a: 70bb strb r3, [r7, #2] /* increase number of messages attempted to send */ MIB2_STATS_INC(mib2.icmpoutmsgs); /* ICMP header + IP header + 8 bytes of data */ q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE, - 803f3b8: f44f 7220 mov.w r2, #640 ; 0x280 - 803f3bc: 2124 movs r1, #36 ; 0x24 - 803f3be: 2022 movs r0, #34 ; 0x22 - 803f3c0: f7f7 fed8 bl 8037174 - 803f3c4: 61f8 str r0, [r7, #28] + 803f43c: f44f 7220 mov.w r2, #640 ; 0x280 + 803f440: 2124 movs r1, #36 ; 0x24 + 803f442: 2022 movs r0, #34 ; 0x22 + 803f444: f7f7 fed8 bl 80371f8 + 803f448: 61f8 str r0, [r7, #28] PBUF_RAM); if (q == NULL) { - 803f3c6: 69fb ldr r3, [r7, #28] - 803f3c8: 2b00 cmp r3, #0 - 803f3ca: d056 beq.n 803f47a + 803f44a: 69fb ldr r3, [r7, #28] + 803f44c: 2b00 cmp r3, #0 + 803f44e: d056 beq.n 803f4fe LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n")); MIB2_STATS_INC(mib2.icmpouterrors); return; } LWIP_ASSERT("check that first pbuf can hold icmp message", - 803f3cc: 69fb ldr r3, [r7, #28] - 803f3ce: 895b ldrh r3, [r3, #10] - 803f3d0: 2b23 cmp r3, #35 ; 0x23 - 803f3d2: d806 bhi.n 803f3e2 - 803f3d4: 4b2b ldr r3, [pc, #172] ; (803f484 ) - 803f3d6: f44f 72b4 mov.w r2, #360 ; 0x168 - 803f3da: 492b ldr r1, [pc, #172] ; (803f488 ) - 803f3dc: 482b ldr r0, [pc, #172] ; (803f48c ) - 803f3de: f001 fb97 bl 8040b10 + 803f450: 69fb ldr r3, [r7, #28] + 803f452: 895b ldrh r3, [r3, #10] + 803f454: 2b23 cmp r3, #35 ; 0x23 + 803f456: d806 bhi.n 803f466 + 803f458: 4b2b ldr r3, [pc, #172] ; (803f508 ) + 803f45a: f44f 72b4 mov.w r2, #360 ; 0x168 + 803f45e: 492b ldr r1, [pc, #172] ; (803f50c ) + 803f460: 482b ldr r0, [pc, #172] ; (803f510 ) + 803f462: f001 fb97 bl 8040b94 (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE))); iphdr = (struct ip_hdr *)p->payload; - 803f3e2: 687b ldr r3, [r7, #4] - 803f3e4: 685b ldr r3, [r3, #4] - 803f3e6: 61bb str r3, [r7, #24] + 803f466: 687b ldr r3, [r7, #4] + 803f468: 685b ldr r3, [r3, #4] + 803f46a: 61bb str r3, [r7, #24] ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->src); LWIP_DEBUGF(ICMP_DEBUG, (" to ")); ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->dest); LWIP_DEBUGF(ICMP_DEBUG, ("\n")); icmphdr = (struct icmp_echo_hdr *)q->payload; - 803f3e8: 69fb ldr r3, [r7, #28] - 803f3ea: 685b ldr r3, [r3, #4] - 803f3ec: 617b str r3, [r7, #20] + 803f46c: 69fb ldr r3, [r7, #28] + 803f46e: 685b ldr r3, [r3, #4] + 803f470: 617b str r3, [r7, #20] icmphdr->type = type; - 803f3ee: 697b ldr r3, [r7, #20] - 803f3f0: 78fa ldrb r2, [r7, #3] - 803f3f2: 701a strb r2, [r3, #0] + 803f472: 697b ldr r3, [r7, #20] + 803f474: 78fa ldrb r2, [r7, #3] + 803f476: 701a strb r2, [r3, #0] icmphdr->code = code; - 803f3f4: 697b ldr r3, [r7, #20] - 803f3f6: 78ba ldrb r2, [r7, #2] - 803f3f8: 705a strb r2, [r3, #1] + 803f478: 697b ldr r3, [r7, #20] + 803f47a: 78ba ldrb r2, [r7, #2] + 803f47c: 705a strb r2, [r3, #1] icmphdr->id = 0; - 803f3fa: 697b ldr r3, [r7, #20] - 803f3fc: 2200 movs r2, #0 - 803f3fe: 711a strb r2, [r3, #4] - 803f400: 2200 movs r2, #0 - 803f402: 715a strb r2, [r3, #5] + 803f47e: 697b ldr r3, [r7, #20] + 803f480: 2200 movs r2, #0 + 803f482: 711a strb r2, [r3, #4] + 803f484: 2200 movs r2, #0 + 803f486: 715a strb r2, [r3, #5] icmphdr->seqno = 0; - 803f404: 697b ldr r3, [r7, #20] - 803f406: 2200 movs r2, #0 - 803f408: 719a strb r2, [r3, #6] - 803f40a: 2200 movs r2, #0 - 803f40c: 71da strb r2, [r3, #7] + 803f488: 697b ldr r3, [r7, #20] + 803f48a: 2200 movs r2, #0 + 803f48c: 719a strb r2, [r3, #6] + 803f48e: 2200 movs r2, #0 + 803f490: 71da strb r2, [r3, #7] /* copy fields from original packet */ SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload, - 803f40e: 69fb ldr r3, [r7, #28] - 803f410: 685b ldr r3, [r3, #4] - 803f412: f103 0008 add.w r0, r3, #8 - 803f416: 687b ldr r3, [r7, #4] - 803f418: 685b ldr r3, [r3, #4] - 803f41a: 221c movs r2, #28 - 803f41c: 4619 mov r1, r3 - 803f41e: f001 fa67 bl 80408f0 + 803f492: 69fb ldr r3, [r7, #28] + 803f494: 685b ldr r3, [r3, #4] + 803f496: f103 0008 add.w r0, r3, #8 + 803f49a: 687b ldr r3, [r7, #4] + 803f49c: 685b ldr r3, [r3, #4] + 803f49e: 221c movs r2, #28 + 803f4a0: 4619 mov r1, r3 + 803f4a2: f001 fa67 bl 8040974 IP_HLEN + ICMP_DEST_UNREACH_DATASIZE); ip4_addr_copy(iphdr_src, iphdr->src); - 803f422: 69bb ldr r3, [r7, #24] - 803f424: 68db ldr r3, [r3, #12] - 803f426: 60fb str r3, [r7, #12] + 803f4a6: 69bb ldr r3, [r7, #24] + 803f4a8: 68db ldr r3, [r3, #12] + 803f4aa: 60fb str r3, [r7, #12] ip4_addr_t iphdr_dst; ip4_addr_copy(iphdr_dst, iphdr->dest); netif = ip4_route_src(&iphdr_dst, &iphdr_src); } #else netif = ip4_route(&iphdr_src); - 803f428: f107 030c add.w r3, r7, #12 - 803f42c: 4618 mov r0, r3 - 803f42e: f000 f82f bl 803f490 - 803f432: 6138 str r0, [r7, #16] + 803f4ac: f107 030c add.w r3, r7, #12 + 803f4b0: 4618 mov r0, r3 + 803f4b2: f000 f82f bl 803f514 + 803f4b6: 6138 str r0, [r7, #16] #endif if (netif != NULL) { - 803f434: 693b ldr r3, [r7, #16] - 803f436: 2b00 cmp r3, #0 - 803f438: d01b beq.n 803f472 + 803f4b8: 693b ldr r3, [r7, #16] + 803f4ba: 2b00 cmp r3, #0 + 803f4bc: d01b beq.n 803f4f6 /* calculate checksum */ icmphdr->chksum = 0; - 803f43a: 697b ldr r3, [r7, #20] - 803f43c: 2200 movs r2, #0 - 803f43e: 709a strb r2, [r3, #2] - 803f440: 2200 movs r2, #0 - 803f442: 70da strb r2, [r3, #3] + 803f4be: 697b ldr r3, [r7, #20] + 803f4c0: 2200 movs r2, #0 + 803f4c2: 709a strb r2, [r3, #2] + 803f4c4: 2200 movs r2, #0 + 803f4c6: 70da strb r2, [r3, #3] #if CHECKSUM_GEN_ICMP IF__NETIF_CHECKSUM_ENABLED(netif, NETIF_CHECKSUM_GEN_ICMP) { icmphdr->chksum = inet_chksum(icmphdr, q->len); - 803f444: 69fb ldr r3, [r7, #28] - 803f446: 895b ldrh r3, [r3, #10] - 803f448: 4619 mov r1, r3 - 803f44a: 6978 ldr r0, [r7, #20] - 803f44c: f7f6 fdcf bl 8035fee - 803f450: 4603 mov r3, r0 - 803f452: 461a mov r2, r3 - 803f454: 697b ldr r3, [r7, #20] - 803f456: 805a strh r2, [r3, #2] + 803f4c8: 69fb ldr r3, [r7, #28] + 803f4ca: 895b ldrh r3, [r3, #10] + 803f4cc: 4619 mov r1, r3 + 803f4ce: 6978 ldr r0, [r7, #20] + 803f4d0: f7f6 fdcf bl 8036072 + 803f4d4: 4603 mov r3, r0 + 803f4d6: 461a mov r2, r3 + 803f4d8: 697b ldr r3, [r7, #20] + 803f4da: 805a strh r2, [r3, #2] } #endif ICMP_STATS_INC(icmp.xmit); ip4_output_if(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP, netif); - 803f458: f107 020c add.w r2, r7, #12 - 803f45c: 693b ldr r3, [r7, #16] - 803f45e: 9302 str r3, [sp, #8] - 803f460: 2301 movs r3, #1 - 803f462: 9301 str r3, [sp, #4] - 803f464: 2300 movs r3, #0 - 803f466: 9300 str r3, [sp, #0] - 803f468: 23ff movs r3, #255 ; 0xff - 803f46a: 2100 movs r1, #0 - 803f46c: 69f8 ldr r0, [r7, #28] - 803f46e: f000 f9cd bl 803f80c + 803f4dc: f107 020c add.w r2, r7, #12 + 803f4e0: 693b ldr r3, [r7, #16] + 803f4e2: 9302 str r3, [sp, #8] + 803f4e4: 2301 movs r3, #1 + 803f4e6: 9301 str r3, [sp, #4] + 803f4e8: 2300 movs r3, #0 + 803f4ea: 9300 str r3, [sp, #0] + 803f4ec: 23ff movs r3, #255 ; 0xff + 803f4ee: 2100 movs r1, #0 + 803f4f0: 69f8 ldr r0, [r7, #28] + 803f4f2: f000 f9cd bl 803f890 } pbuf_free(q); - 803f472: 69f8 ldr r0, [r7, #28] - 803f474: f7f8 f962 bl 803773c - 803f478: e000 b.n 803f47c + 803f4f6: 69f8 ldr r0, [r7, #28] + 803f4f8: f7f8 f962 bl 80377c0 + 803f4fc: e000 b.n 803f500 return; - 803f47a: bf00 nop + 803f4fe: bf00 nop } - 803f47c: 3720 adds r7, #32 - 803f47e: 46bd mov sp, r7 - 803f480: bd80 pop {r7, pc} - 803f482: bf00 nop - 803f484: 08044860 .word 0x08044860 - 803f488: 0804492c .word 0x0804492c - 803f48c: 080448d0 .word 0x080448d0 + 803f500: 3720 adds r7, #32 + 803f502: 46bd mov sp, r7 + 803f504: bd80 pop {r7, pc} + 803f506: bf00 nop + 803f508: 080448e0 .word 0x080448e0 + 803f50c: 080449ac .word 0x080449ac + 803f510: 08044950 .word 0x08044950 -0803f490 : +0803f514 : * @param dest the destination IP address for which to find the route * @return the netif on which to send to reach dest */ struct netif * ip4_route(const ip4_addr_t *dest) { - 803f490: b480 push {r7} - 803f492: b085 sub sp, #20 - 803f494: af00 add r7, sp, #0 - 803f496: 6078 str r0, [r7, #4] + 803f514: b480 push {r7} + 803f516: b085 sub sp, #20 + 803f518: af00 add r7, sp, #0 + 803f51a: 6078 str r0, [r7, #4] /* bug #54569: in case LWIP_SINGLE_NETIF=1 and LWIP_DEBUGF() disabled, the following loop is optimized away */ LWIP_UNUSED_ARG(dest); /* iterate through netifs */ NETIF_FOREACH(netif) { - 803f498: 4b33 ldr r3, [pc, #204] ; (803f568 ) - 803f49a: 681b ldr r3, [r3, #0] - 803f49c: 60fb str r3, [r7, #12] - 803f49e: e036 b.n 803f50e + 803f51c: 4b33 ldr r3, [pc, #204] ; (803f5ec ) + 803f51e: 681b ldr r3, [r3, #0] + 803f520: 60fb str r3, [r7, #12] + 803f522: e036 b.n 803f592 /* is the netif up, does it have a link and a valid address? */ if (netif_is_up(netif) && netif_is_link_up(netif) && !ip4_addr_isany_val(*netif_ip4_addr(netif))) { - 803f4a0: 68fb ldr r3, [r7, #12] - 803f4a2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f4a6: f003 0301 and.w r3, r3, #1 - 803f4aa: b2db uxtb r3, r3 - 803f4ac: 2b00 cmp r3, #0 - 803f4ae: d02b beq.n 803f508 - 803f4b0: 68fb ldr r3, [r7, #12] - 803f4b2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f4b6: 089b lsrs r3, r3, #2 - 803f4b8: f003 0301 and.w r3, r3, #1 - 803f4bc: b2db uxtb r3, r3 - 803f4be: 2b00 cmp r3, #0 - 803f4c0: d022 beq.n 803f508 - 803f4c2: 68fb ldr r3, [r7, #12] - 803f4c4: 3304 adds r3, #4 - 803f4c6: 681b ldr r3, [r3, #0] - 803f4c8: 2b00 cmp r3, #0 - 803f4ca: d01d beq.n 803f508 + 803f524: 68fb ldr r3, [r7, #12] + 803f526: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f52a: f003 0301 and.w r3, r3, #1 + 803f52e: b2db uxtb r3, r3 + 803f530: 2b00 cmp r3, #0 + 803f532: d02b beq.n 803f58c + 803f534: 68fb ldr r3, [r7, #12] + 803f536: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f53a: 089b lsrs r3, r3, #2 + 803f53c: f003 0301 and.w r3, r3, #1 + 803f540: b2db uxtb r3, r3 + 803f542: 2b00 cmp r3, #0 + 803f544: d022 beq.n 803f58c + 803f546: 68fb ldr r3, [r7, #12] + 803f548: 3304 adds r3, #4 + 803f54a: 681b ldr r3, [r3, #0] + 803f54c: 2b00 cmp r3, #0 + 803f54e: d01d beq.n 803f58c /* network mask matches? */ if (ip4_addr_netcmp(dest, netif_ip4_addr(netif), netif_ip4_netmask(netif))) { - 803f4cc: 687b ldr r3, [r7, #4] - 803f4ce: 681a ldr r2, [r3, #0] - 803f4d0: 68fb ldr r3, [r7, #12] - 803f4d2: 3304 adds r3, #4 - 803f4d4: 681b ldr r3, [r3, #0] - 803f4d6: 405a eors r2, r3 - 803f4d8: 68fb ldr r3, [r7, #12] - 803f4da: 3308 adds r3, #8 - 803f4dc: 681b ldr r3, [r3, #0] - 803f4de: 4013 ands r3, r2 - 803f4e0: 2b00 cmp r3, #0 - 803f4e2: d101 bne.n 803f4e8 + 803f550: 687b ldr r3, [r7, #4] + 803f552: 681a ldr r2, [r3, #0] + 803f554: 68fb ldr r3, [r7, #12] + 803f556: 3304 adds r3, #4 + 803f558: 681b ldr r3, [r3, #0] + 803f55a: 405a eors r2, r3 + 803f55c: 68fb ldr r3, [r7, #12] + 803f55e: 3308 adds r3, #8 + 803f560: 681b ldr r3, [r3, #0] + 803f562: 4013 ands r3, r2 + 803f564: 2b00 cmp r3, #0 + 803f566: d101 bne.n 803f56c /* return netif on which to forward IP packet */ return netif; - 803f4e4: 68fb ldr r3, [r7, #12] - 803f4e6: e038 b.n 803f55a + 803f568: 68fb ldr r3, [r7, #12] + 803f56a: e038 b.n 803f5de } /* gateway matches on a non broadcast interface? (i.e. peer in a point to point interface) */ if (((netif->flags & NETIF_FLAG_BROADCAST) == 0) && ip4_addr_cmp(dest, netif_ip4_gw(netif))) { - 803f4e8: 68fb ldr r3, [r7, #12] - 803f4ea: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f4ee: f003 0302 and.w r3, r3, #2 - 803f4f2: 2b00 cmp r3, #0 - 803f4f4: d108 bne.n 803f508 - 803f4f6: 687b ldr r3, [r7, #4] - 803f4f8: 681a ldr r2, [r3, #0] - 803f4fa: 68fb ldr r3, [r7, #12] - 803f4fc: 330c adds r3, #12 - 803f4fe: 681b ldr r3, [r3, #0] - 803f500: 429a cmp r2, r3 - 803f502: d101 bne.n 803f508 + 803f56c: 68fb ldr r3, [r7, #12] + 803f56e: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f572: f003 0302 and.w r3, r3, #2 + 803f576: 2b00 cmp r3, #0 + 803f578: d108 bne.n 803f58c + 803f57a: 687b ldr r3, [r7, #4] + 803f57c: 681a ldr r2, [r3, #0] + 803f57e: 68fb ldr r3, [r7, #12] + 803f580: 330c adds r3, #12 + 803f582: 681b ldr r3, [r3, #0] + 803f584: 429a cmp r2, r3 + 803f586: d101 bne.n 803f58c /* return netif on which to forward IP packet */ return netif; - 803f504: 68fb ldr r3, [r7, #12] - 803f506: e028 b.n 803f55a + 803f588: 68fb ldr r3, [r7, #12] + 803f58a: e028 b.n 803f5de NETIF_FOREACH(netif) { - 803f508: 68fb ldr r3, [r7, #12] - 803f50a: 681b ldr r3, [r3, #0] - 803f50c: 60fb str r3, [r7, #12] - 803f50e: 68fb ldr r3, [r7, #12] - 803f510: 2b00 cmp r3, #0 - 803f512: d1c5 bne.n 803f4a0 + 803f58c: 68fb ldr r3, [r7, #12] + 803f58e: 681b ldr r3, [r3, #0] + 803f590: 60fb str r3, [r7, #12] + 803f592: 68fb ldr r3, [r7, #12] + 803f594: 2b00 cmp r3, #0 + 803f596: d1c5 bne.n 803f524 return netif; } #endif #endif /* !LWIP_SINGLE_NETIF */ if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) || - 803f514: 4b15 ldr r3, [pc, #84] ; (803f56c ) - 803f516: 681b ldr r3, [r3, #0] - 803f518: 2b00 cmp r3, #0 - 803f51a: d01a beq.n 803f552 - 803f51c: 4b13 ldr r3, [pc, #76] ; (803f56c ) - 803f51e: 681b ldr r3, [r3, #0] - 803f520: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f524: f003 0301 and.w r3, r3, #1 - 803f528: 2b00 cmp r3, #0 - 803f52a: d012 beq.n 803f552 - 803f52c: 4b0f ldr r3, [pc, #60] ; (803f56c ) - 803f52e: 681b ldr r3, [r3, #0] - 803f530: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f534: f003 0304 and.w r3, r3, #4 - 803f538: 2b00 cmp r3, #0 - 803f53a: d00a beq.n 803f552 + 803f598: 4b15 ldr r3, [pc, #84] ; (803f5f0 ) + 803f59a: 681b ldr r3, [r3, #0] + 803f59c: 2b00 cmp r3, #0 + 803f59e: d01a beq.n 803f5d6 + 803f5a0: 4b13 ldr r3, [pc, #76] ; (803f5f0 ) + 803f5a2: 681b ldr r3, [r3, #0] + 803f5a4: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f5a8: f003 0301 and.w r3, r3, #1 + 803f5ac: 2b00 cmp r3, #0 + 803f5ae: d012 beq.n 803f5d6 + 803f5b0: 4b0f ldr r3, [pc, #60] ; (803f5f0 ) + 803f5b2: 681b ldr r3, [r3, #0] + 803f5b4: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f5b8: f003 0304 and.w r3, r3, #4 + 803f5bc: 2b00 cmp r3, #0 + 803f5be: d00a beq.n 803f5d6 ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) { - 803f53c: 4b0b ldr r3, [pc, #44] ; (803f56c ) - 803f53e: 681b ldr r3, [r3, #0] - 803f540: 3304 adds r3, #4 - 803f542: 681b ldr r3, [r3, #0] + 803f5c0: 4b0b ldr r3, [pc, #44] ; (803f5f0 ) + 803f5c2: 681b ldr r3, [r3, #0] + 803f5c4: 3304 adds r3, #4 + 803f5c6: 681b ldr r3, [r3, #0] if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) || - 803f544: 2b00 cmp r3, #0 - 803f546: d004 beq.n 803f552 + 803f5c8: 2b00 cmp r3, #0 + 803f5ca: d004 beq.n 803f5d6 ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) { - 803f548: 687b ldr r3, [r7, #4] - 803f54a: 681b ldr r3, [r3, #0] - 803f54c: b2db uxtb r3, r3 - 803f54e: 2b7f cmp r3, #127 ; 0x7f - 803f550: d101 bne.n 803f556 + 803f5cc: 687b ldr r3, [r7, #4] + 803f5ce: 681b ldr r3, [r3, #0] + 803f5d0: b2db uxtb r3, r3 + 803f5d2: 2b7f cmp r3, #127 ; 0x7f + 803f5d4: d101 bne.n 803f5da If this is not good enough for you, use LWIP_HOOK_IP4_ROUTE() */ LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest))); IP_STATS_INC(ip.rterr); MIB2_STATS_INC(mib2.ipoutnoroutes); return NULL; - 803f552: 2300 movs r3, #0 - 803f554: e001 b.n 803f55a + 803f5d6: 2300 movs r3, #0 + 803f5d8: e001 b.n 803f5de } return netif_default; - 803f556: 4b05 ldr r3, [pc, #20] ; (803f56c ) - 803f558: 681b ldr r3, [r3, #0] -} - 803f55a: 4618 mov r0, r3 - 803f55c: 3714 adds r7, #20 - 803f55e: 46bd mov sp, r7 - 803f560: f85d 7b04 ldr.w r7, [sp], #4 - 803f564: 4770 bx lr - 803f566: bf00 nop - 803f568: 2400e94c .word 0x2400e94c - 803f56c: 2400e950 .word 0x2400e950 - -0803f570 : + 803f5da: 4b05 ldr r3, [pc, #20] ; (803f5f0 ) + 803f5dc: 681b ldr r3, [r3, #0] +} + 803f5de: 4618 mov r0, r3 + 803f5e0: 3714 adds r7, #20 + 803f5e2: 46bd mov sp, r7 + 803f5e4: f85d 7b04 ldr.w r7, [sp], #4 + 803f5e8: 4770 bx lr + 803f5ea: bf00 nop + 803f5ec: 2400e954 .word 0x2400e954 + 803f5f0: 2400e958 .word 0x2400e958 + +0803f5f4 : #endif /* IP_FORWARD */ /** Return true if the current input packet should be accepted on this netif */ static int ip4_input_accept(struct netif *netif) { - 803f570: b580 push {r7, lr} - 803f572: b082 sub sp, #8 - 803f574: af00 add r7, sp, #0 - 803f576: 6078 str r0, [r7, #4] + 803f5f4: b580 push {r7, lr} + 803f5f6: b082 sub sp, #8 + 803f5f8: af00 add r7, sp, #0 + 803f5fa: 6078 str r0, [r7, #4] ip4_addr_get_u32(ip4_current_dest_addr()) & ip4_addr_get_u32(netif_ip4_netmask(netif)), ip4_addr_get_u32(netif_ip4_addr(netif)) & ip4_addr_get_u32(netif_ip4_netmask(netif)), ip4_addr_get_u32(ip4_current_dest_addr()) & ~ip4_addr_get_u32(netif_ip4_netmask(netif)))); /* interface is up and configured? */ if ((netif_is_up(netif)) && (!ip4_addr_isany_val(*netif_ip4_addr(netif)))) { - 803f578: 687b ldr r3, [r7, #4] - 803f57a: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f57e: f003 0301 and.w r3, r3, #1 - 803f582: b2db uxtb r3, r3 - 803f584: 2b00 cmp r3, #0 - 803f586: d016 beq.n 803f5b6 - 803f588: 687b ldr r3, [r7, #4] - 803f58a: 3304 adds r3, #4 - 803f58c: 681b ldr r3, [r3, #0] - 803f58e: 2b00 cmp r3, #0 - 803f590: d011 beq.n 803f5b6 + 803f5fc: 687b ldr r3, [r7, #4] + 803f5fe: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f602: f003 0301 and.w r3, r3, #1 + 803f606: b2db uxtb r3, r3 + 803f608: 2b00 cmp r3, #0 + 803f60a: d016 beq.n 803f63a + 803f60c: 687b ldr r3, [r7, #4] + 803f60e: 3304 adds r3, #4 + 803f610: 681b ldr r3, [r3, #0] + 803f612: 2b00 cmp r3, #0 + 803f614: d011 beq.n 803f63a /* unicast to this interface address? */ if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) || - 803f592: 4b0b ldr r3, [pc, #44] ; (803f5c0 ) - 803f594: 695a ldr r2, [r3, #20] - 803f596: 687b ldr r3, [r7, #4] - 803f598: 3304 adds r3, #4 - 803f59a: 681b ldr r3, [r3, #0] - 803f59c: 429a cmp r2, r3 - 803f59e: d008 beq.n 803f5b2 + 803f616: 4b0b ldr r3, [pc, #44] ; (803f644 ) + 803f618: 695a ldr r2, [r3, #20] + 803f61a: 687b ldr r3, [r7, #4] + 803f61c: 3304 adds r3, #4 + 803f61e: 681b ldr r3, [r3, #0] + 803f620: 429a cmp r2, r3 + 803f622: d008 beq.n 803f636 /* or broadcast on this interface network address? */ ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) - 803f5a0: 4b07 ldr r3, [pc, #28] ; (803f5c0 ) - 803f5a2: 695b ldr r3, [r3, #20] - 803f5a4: 6879 ldr r1, [r7, #4] - 803f5a6: 4618 mov r0, r3 - 803f5a8: f000 fa08 bl 803f9bc - 803f5ac: 4603 mov r3, r0 + 803f624: 4b07 ldr r3, [pc, #28] ; (803f644 ) + 803f626: 695b ldr r3, [r3, #20] + 803f628: 6879 ldr r1, [r7, #4] + 803f62a: 4618 mov r0, r3 + 803f62c: f000 fa08 bl 803fa40 + 803f630: 4603 mov r3, r0 if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) || - 803f5ae: 2b00 cmp r3, #0 - 803f5b0: d001 beq.n 803f5b6 + 803f632: 2b00 cmp r3, #0 + 803f634: d001 beq.n 803f63a #endif /* LWIP_NETIF_LOOPBACK && !LWIP_HAVE_LOOPIF */ ) { LWIP_DEBUGF(IP_DEBUG, ("ip4_input: packet accepted on interface %c%c\n", netif->name[0], netif->name[1])); /* accept on this netif */ return 1; - 803f5b2: 2301 movs r3, #1 - 803f5b4: e000 b.n 803f5b8 + 803f636: 2301 movs r3, #1 + 803f638: e000 b.n 803f63c /* accept on this netif */ return 1; } #endif /* LWIP_AUTOIP */ } return 0; - 803f5b6: 2300 movs r3, #0 + 803f63a: 2300 movs r3, #0 } - 803f5b8: 4618 mov r0, r3 - 803f5ba: 3708 adds r7, #8 - 803f5bc: 46bd mov sp, r7 - 803f5be: bd80 pop {r7, pc} - 803f5c0: 2400b9bc .word 0x2400b9bc + 803f63c: 4618 mov r0, r3 + 803f63e: 3708 adds r7, #8 + 803f640: 46bd mov sp, r7 + 803f642: bd80 pop {r7, pc} + 803f644: 2400b9c4 .word 0x2400b9c4 -0803f5c4 : +0803f648 : * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't * processed, but currently always returns ERR_OK) */ err_t ip4_input(struct pbuf *p, struct netif *inp) { - 803f5c4: b580 push {r7, lr} - 803f5c6: b086 sub sp, #24 - 803f5c8: af00 add r7, sp, #0 - 803f5ca: 6078 str r0, [r7, #4] - 803f5cc: 6039 str r1, [r7, #0] + 803f648: b580 push {r7, lr} + 803f64a: b086 sub sp, #24 + 803f64c: af00 add r7, sp, #0 + 803f64e: 6078 str r0, [r7, #4] + 803f650: 6039 str r1, [r7, #0] IP_STATS_INC(ip.recv); MIB2_STATS_INC(mib2.ipinreceives); /* identify the IP header */ iphdr = (struct ip_hdr *)p->payload; - 803f5ce: 687b ldr r3, [r7, #4] - 803f5d0: 685b ldr r3, [r3, #4] - 803f5d2: 617b str r3, [r7, #20] + 803f652: 687b ldr r3, [r7, #4] + 803f654: 685b ldr r3, [r3, #4] + 803f656: 617b str r3, [r7, #20] if (IPH_V(iphdr) != 4) { - 803f5d4: 697b ldr r3, [r7, #20] - 803f5d6: 781b ldrb r3, [r3, #0] - 803f5d8: 091b lsrs r3, r3, #4 - 803f5da: b2db uxtb r3, r3 - 803f5dc: 2b04 cmp r3, #4 - 803f5de: d004 beq.n 803f5ea + 803f658: 697b ldr r3, [r7, #20] + 803f65a: 781b ldrb r3, [r3, #0] + 803f65c: 091b lsrs r3, r3, #4 + 803f65e: b2db uxtb r3, r3 + 803f660: 2b04 cmp r3, #4 + 803f662: d004 beq.n 803f66e LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", (u16_t)IPH_V(iphdr))); ip4_debug_print(p); pbuf_free(p); - 803f5e0: 6878 ldr r0, [r7, #4] - 803f5e2: f7f8 f8ab bl 803773c + 803f664: 6878 ldr r0, [r7, #4] + 803f666: f7f8 f8ab bl 80377c0 IP_STATS_INC(ip.err); IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipinhdrerrors); return ERR_OK; - 803f5e6: 2300 movs r3, #0 - 803f5e8: e107 b.n 803f7fa + 803f66a: 2300 movs r3, #0 + 803f66c: e107 b.n 803f87e return ERR_OK; } #endif /* obtain IP header length in bytes */ iphdr_hlen = IPH_HL_BYTES(iphdr); - 803f5ea: 697b ldr r3, [r7, #20] - 803f5ec: 781b ldrb r3, [r3, #0] - 803f5ee: f003 030f and.w r3, r3, #15 - 803f5f2: b2db uxtb r3, r3 - 803f5f4: 009b lsls r3, r3, #2 - 803f5f6: b2db uxtb r3, r3 - 803f5f8: 81fb strh r3, [r7, #14] + 803f66e: 697b ldr r3, [r7, #20] + 803f670: 781b ldrb r3, [r3, #0] + 803f672: f003 030f and.w r3, r3, #15 + 803f676: b2db uxtb r3, r3 + 803f678: 009b lsls r3, r3, #2 + 803f67a: b2db uxtb r3, r3 + 803f67c: 81fb strh r3, [r7, #14] /* obtain ip length in bytes */ iphdr_len = lwip_ntohs(IPH_LEN(iphdr)); - 803f5fa: 697b ldr r3, [r7, #20] - 803f5fc: 885b ldrh r3, [r3, #2] - 803f5fe: b29b uxth r3, r3 - 803f600: 4618 mov r0, r3 - 803f602: f7f6 fc69 bl 8035ed8 - 803f606: 4603 mov r3, r0 - 803f608: 81bb strh r3, [r7, #12] + 803f67e: 697b ldr r3, [r7, #20] + 803f680: 885b ldrh r3, [r3, #2] + 803f682: b29b uxth r3, r3 + 803f684: 4618 mov r0, r3 + 803f686: f7f6 fc69 bl 8035f5c + 803f68a: 4603 mov r3, r0 + 803f68c: 81bb strh r3, [r7, #12] /* Trim pbuf. This is especially required for packets < 60 bytes. */ if (iphdr_len < p->tot_len) { - 803f60a: 687b ldr r3, [r7, #4] - 803f60c: 891b ldrh r3, [r3, #8] - 803f60e: 89ba ldrh r2, [r7, #12] - 803f610: 429a cmp r2, r3 - 803f612: d204 bcs.n 803f61e + 803f68e: 687b ldr r3, [r7, #4] + 803f690: 891b ldrh r3, [r3, #8] + 803f692: 89ba ldrh r2, [r7, #12] + 803f694: 429a cmp r2, r3 + 803f696: d204 bcs.n 803f6a2 pbuf_realloc(p, iphdr_len); - 803f614: 89bb ldrh r3, [r7, #12] - 803f616: 4619 mov r1, r3 - 803f618: 6878 ldr r0, [r7, #4] - 803f61a: f7f7 ff09 bl 8037430 + 803f698: 89bb ldrh r3, [r7, #12] + 803f69a: 4619 mov r1, r3 + 803f69c: 6878 ldr r0, [r7, #4] + 803f69e: f7f7 ff09 bl 80374b4 } /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */ if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len) || (iphdr_hlen < IP_HLEN)) { - 803f61e: 687b ldr r3, [r7, #4] - 803f620: 895b ldrh r3, [r3, #10] - 803f622: 89fa ldrh r2, [r7, #14] - 803f624: 429a cmp r2, r3 - 803f626: d807 bhi.n 803f638 - 803f628: 687b ldr r3, [r7, #4] - 803f62a: 891b ldrh r3, [r3, #8] - 803f62c: 89ba ldrh r2, [r7, #12] - 803f62e: 429a cmp r2, r3 - 803f630: d802 bhi.n 803f638 - 803f632: 89fb ldrh r3, [r7, #14] - 803f634: 2b13 cmp r3, #19 - 803f636: d804 bhi.n 803f642 + 803f6a2: 687b ldr r3, [r7, #4] + 803f6a4: 895b ldrh r3, [r3, #10] + 803f6a6: 89fa ldrh r2, [r7, #14] + 803f6a8: 429a cmp r2, r3 + 803f6aa: d807 bhi.n 803f6bc + 803f6ac: 687b ldr r3, [r7, #4] + 803f6ae: 891b ldrh r3, [r3, #8] + 803f6b0: 89ba ldrh r2, [r7, #12] + 803f6b2: 429a cmp r2, r3 + 803f6b4: d802 bhi.n 803f6bc + 803f6b6: 89fb ldrh r3, [r7, #14] + 803f6b8: 2b13 cmp r3, #19 + 803f6ba: d804 bhi.n 803f6c6 LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n", iphdr_len, p->tot_len)); } /* free (drop) packet pbufs */ pbuf_free(p); - 803f638: 6878 ldr r0, [r7, #4] - 803f63a: f7f8 f87f bl 803773c + 803f6bc: 6878 ldr r0, [r7, #4] + 803f6be: f7f8 f87f bl 80377c0 IP_STATS_INC(ip.lenerr); IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipindiscards); return ERR_OK; - 803f63e: 2300 movs r3, #0 - 803f640: e0db b.n 803f7fa + 803f6c2: 2300 movs r3, #0 + 803f6c4: e0db b.n 803f87e } } #endif /* copy IP addresses to aligned ip_addr_t */ ip_addr_copy_from_ip4(ip_data.current_iphdr_dest, iphdr->dest); - 803f642: 697b ldr r3, [r7, #20] - 803f644: 691b ldr r3, [r3, #16] - 803f646: 4a6f ldr r2, [pc, #444] ; (803f804 ) - 803f648: 6153 str r3, [r2, #20] + 803f6c6: 697b ldr r3, [r7, #20] + 803f6c8: 691b ldr r3, [r3, #16] + 803f6ca: 4a6f ldr r2, [pc, #444] ; (803f888 ) + 803f6cc: 6153 str r3, [r2, #20] ip_addr_copy_from_ip4(ip_data.current_iphdr_src, iphdr->src); - 803f64a: 697b ldr r3, [r7, #20] - 803f64c: 68db ldr r3, [r3, #12] - 803f64e: 4a6d ldr r2, [pc, #436] ; (803f804 ) - 803f650: 6113 str r3, [r2, #16] + 803f6ce: 697b ldr r3, [r7, #20] + 803f6d0: 68db ldr r3, [r3, #12] + 803f6d2: 4a6d ldr r2, [pc, #436] ; (803f888 ) + 803f6d4: 6113 str r3, [r2, #16] /* match packet against an interface, i.e. is this packet for us? */ if (ip4_addr_ismulticast(ip4_current_dest_addr())) { - 803f652: 4b6c ldr r3, [pc, #432] ; (803f804 ) - 803f654: 695b ldr r3, [r3, #20] - 803f656: f003 03f0 and.w r3, r3, #240 ; 0xf0 - 803f65a: 2be0 cmp r3, #224 ; 0xe0 - 803f65c: d112 bne.n 803f684 + 803f6d6: 4b6c ldr r3, [pc, #432] ; (803f888 ) + 803f6d8: 695b ldr r3, [r3, #20] + 803f6da: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803f6de: 2be0 cmp r3, #224 ; 0xe0 + 803f6e0: d112 bne.n 803f708 netif = inp; } else { netif = NULL; } #else /* LWIP_IGMP */ if ((netif_is_up(inp)) && (!ip4_addr_isany_val(*netif_ip4_addr(inp)))) { - 803f65e: 683b ldr r3, [r7, #0] - 803f660: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f664: f003 0301 and.w r3, r3, #1 - 803f668: b2db uxtb r3, r3 - 803f66a: 2b00 cmp r3, #0 - 803f66c: d007 beq.n 803f67e - 803f66e: 683b ldr r3, [r7, #0] - 803f670: 3304 adds r3, #4 - 803f672: 681b ldr r3, [r3, #0] - 803f674: 2b00 cmp r3, #0 - 803f676: d002 beq.n 803f67e + 803f6e2: 683b ldr r3, [r7, #0] + 803f6e4: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803f6e8: f003 0301 and.w r3, r3, #1 + 803f6ec: b2db uxtb r3, r3 + 803f6ee: 2b00 cmp r3, #0 + 803f6f0: d007 beq.n 803f702 + 803f6f2: 683b ldr r3, [r7, #0] + 803f6f4: 3304 adds r3, #4 + 803f6f6: 681b ldr r3, [r3, #0] + 803f6f8: 2b00 cmp r3, #0 + 803f6fa: d002 beq.n 803f702 netif = inp; - 803f678: 683b ldr r3, [r7, #0] - 803f67a: 613b str r3, [r7, #16] - 803f67c: e02a b.n 803f6d4 + 803f6fc: 683b ldr r3, [r7, #0] + 803f6fe: 613b str r3, [r7, #16] + 803f700: e02a b.n 803f758 } else { netif = NULL; - 803f67e: 2300 movs r3, #0 - 803f680: 613b str r3, [r7, #16] - 803f682: e027 b.n 803f6d4 + 803f702: 2300 movs r3, #0 + 803f704: 613b str r3, [r7, #16] + 803f706: e027 b.n 803f758 } #endif /* LWIP_IGMP */ } else { /* start trying with inp. if that's not acceptable, start walking the list of configured netifs. */ if (ip4_input_accept(inp)) { - 803f684: 6838 ldr r0, [r7, #0] - 803f686: f7ff ff73 bl 803f570 - 803f68a: 4603 mov r3, r0 - 803f68c: 2b00 cmp r3, #0 - 803f68e: d002 beq.n 803f696 + 803f708: 6838 ldr r0, [r7, #0] + 803f70a: f7ff ff73 bl 803f5f4 + 803f70e: 4603 mov r3, r0 + 803f710: 2b00 cmp r3, #0 + 803f712: d002 beq.n 803f71a netif = inp; - 803f690: 683b ldr r3, [r7, #0] - 803f692: 613b str r3, [r7, #16] - 803f694: e01e b.n 803f6d4 + 803f714: 683b ldr r3, [r7, #0] + 803f716: 613b str r3, [r7, #16] + 803f718: e01e b.n 803f758 } else { netif = NULL; - 803f696: 2300 movs r3, #0 - 803f698: 613b str r3, [r7, #16] + 803f71a: 2300 movs r3, #0 + 803f71c: 613b str r3, [r7, #16] #if !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF /* Packets sent to the loopback address must not be accepted on an * interface that does not have the loopback address assigned to it, * unless a non-loopback interface is used for loopback traffic. */ if (!ip4_addr_isloopback(ip4_current_dest_addr())) - 803f69a: 4b5a ldr r3, [pc, #360] ; (803f804 ) - 803f69c: 695b ldr r3, [r3, #20] - 803f69e: b2db uxtb r3, r3 - 803f6a0: 2b7f cmp r3, #127 ; 0x7f - 803f6a2: d017 beq.n 803f6d4 + 803f71e: 4b5a ldr r3, [pc, #360] ; (803f888 ) + 803f720: 695b ldr r3, [r3, #20] + 803f722: b2db uxtb r3, r3 + 803f724: 2b7f cmp r3, #127 ; 0x7f + 803f726: d017 beq.n 803f758 #endif /* !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF */ { #if !LWIP_SINGLE_NETIF NETIF_FOREACH(netif) { - 803f6a4: 4b58 ldr r3, [pc, #352] ; (803f808 ) - 803f6a6: 681b ldr r3, [r3, #0] - 803f6a8: 613b str r3, [r7, #16] - 803f6aa: e00e b.n 803f6ca + 803f728: 4b58 ldr r3, [pc, #352] ; (803f88c ) + 803f72a: 681b ldr r3, [r3, #0] + 803f72c: 613b str r3, [r7, #16] + 803f72e: e00e b.n 803f74e if (netif == inp) { - 803f6ac: 693a ldr r2, [r7, #16] - 803f6ae: 683b ldr r3, [r7, #0] - 803f6b0: 429a cmp r2, r3 - 803f6b2: d006 beq.n 803f6c2 + 803f730: 693a ldr r2, [r7, #16] + 803f732: 683b ldr r3, [r7, #0] + 803f734: 429a cmp r2, r3 + 803f736: d006 beq.n 803f746 /* we checked that before already */ continue; } if (ip4_input_accept(netif)) { - 803f6b4: 6938 ldr r0, [r7, #16] - 803f6b6: f7ff ff5b bl 803f570 - 803f6ba: 4603 mov r3, r0 - 803f6bc: 2b00 cmp r3, #0 - 803f6be: d108 bne.n 803f6d2 - 803f6c0: e000 b.n 803f6c4 + 803f738: 6938 ldr r0, [r7, #16] + 803f73a: f7ff ff5b bl 803f5f4 + 803f73e: 4603 mov r3, r0 + 803f740: 2b00 cmp r3, #0 + 803f742: d108 bne.n 803f756 + 803f744: e000 b.n 803f748 continue; - 803f6c2: bf00 nop + 803f746: bf00 nop NETIF_FOREACH(netif) { - 803f6c4: 693b ldr r3, [r7, #16] - 803f6c6: 681b ldr r3, [r3, #0] - 803f6c8: 613b str r3, [r7, #16] - 803f6ca: 693b ldr r3, [r7, #16] - 803f6cc: 2b00 cmp r3, #0 - 803f6ce: d1ed bne.n 803f6ac - 803f6d0: e000 b.n 803f6d4 + 803f748: 693b ldr r3, [r7, #16] + 803f74a: 681b ldr r3, [r3, #0] + 803f74c: 613b str r3, [r7, #16] + 803f74e: 693b ldr r3, [r7, #16] + 803f750: 2b00 cmp r3, #0 + 803f752: d1ed bne.n 803f730 + 803f754: e000 b.n 803f758 break; - 803f6d2: bf00 nop + 803f756: bf00 nop && !ip4_addr_isany_val(*ip4_current_src_addr()) #endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */ ) #endif /* LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING */ { if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) || - 803f6d4: 4b4b ldr r3, [pc, #300] ; (803f804 ) - 803f6d6: 691b ldr r3, [r3, #16] - 803f6d8: 6839 ldr r1, [r7, #0] - 803f6da: 4618 mov r0, r3 - 803f6dc: f000 f96e bl 803f9bc - 803f6e0: 4603 mov r3, r0 - 803f6e2: 2b00 cmp r3, #0 - 803f6e4: d105 bne.n 803f6f2 + 803f758: 4b4b ldr r3, [pc, #300] ; (803f888 ) + 803f75a: 691b ldr r3, [r3, #16] + 803f75c: 6839 ldr r1, [r7, #0] + 803f75e: 4618 mov r0, r3 + 803f760: f000 f96e bl 803fa40 + 803f764: 4603 mov r3, r0 + 803f766: 2b00 cmp r3, #0 + 803f768: d105 bne.n 803f776 (ip4_addr_ismulticast(ip4_current_src_addr()))) { - 803f6e6: 4b47 ldr r3, [pc, #284] ; (803f804 ) - 803f6e8: 691b ldr r3, [r3, #16] - 803f6ea: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803f76a: 4b47 ldr r3, [pc, #284] ; (803f888 ) + 803f76c: 691b ldr r3, [r3, #16] + 803f76e: f003 03f0 and.w r3, r3, #240 ; 0xf0 if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) || - 803f6ee: 2be0 cmp r3, #224 ; 0xe0 - 803f6f0: d104 bne.n 803f6fc + 803f772: 2be0 cmp r3, #224 ; 0xe0 + 803f774: d104 bne.n 803f780 /* packet source is not valid */ LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip4_input: packet source is not valid.\n")); /* free (drop) packet pbufs */ pbuf_free(p); - 803f6f2: 6878 ldr r0, [r7, #4] - 803f6f4: f7f8 f822 bl 803773c + 803f776: 6878 ldr r0, [r7, #4] + 803f778: f7f8 f822 bl 80377c0 IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipinaddrerrors); MIB2_STATS_INC(mib2.ipindiscards); return ERR_OK; - 803f6f8: 2300 movs r3, #0 - 803f6fa: e07e b.n 803f7fa + 803f77c: 2300 movs r3, #0 + 803f77e: e07e b.n 803f87e } } /* packet not for us? */ if (netif == NULL) { - 803f6fc: 693b ldr r3, [r7, #16] - 803f6fe: 2b00 cmp r3, #0 - 803f700: d104 bne.n 803f70c + 803f780: 693b ldr r3, [r7, #16] + 803f782: 2b00 cmp r3, #0 + 803f784: d104 bne.n 803f790 { IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipinaddrerrors); MIB2_STATS_INC(mib2.ipindiscards); } pbuf_free(p); - 803f702: 6878 ldr r0, [r7, #4] - 803f704: f7f8 f81a bl 803773c + 803f786: 6878 ldr r0, [r7, #4] + 803f788: f7f8 f81a bl 80377c0 return ERR_OK; - 803f708: 2300 movs r3, #0 - 803f70a: e076 b.n 803f7fa + 803f78c: 2300 movs r3, #0 + 803f78e: e076 b.n 803f87e } /* packet consists of multiple fragments? */ if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) { - 803f70c: 697b ldr r3, [r7, #20] - 803f70e: 88db ldrh r3, [r3, #6] - 803f710: b29b uxth r3, r3 - 803f712: 461a mov r2, r3 - 803f714: f64f 733f movw r3, #65343 ; 0xff3f - 803f718: 4013 ands r3, r2 - 803f71a: 2b00 cmp r3, #0 - 803f71c: d00b beq.n 803f736 + 803f790: 697b ldr r3, [r7, #20] + 803f792: 88db ldrh r3, [r3, #6] + 803f794: b29b uxth r3, r3 + 803f796: 461a mov r2, r3 + 803f798: f64f 733f movw r3, #65343 ; 0xff3f + 803f79c: 4013 ands r3, r2 + 803f79e: 2b00 cmp r3, #0 + 803f7a0: d00b beq.n 803f7ba #if IP_REASSEMBLY /* packet fragment reassembly code present? */ LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip4_reass()\n", lwip_ntohs(IPH_ID(iphdr)), p->tot_len, lwip_ntohs(IPH_LEN(iphdr)), (u16_t)!!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (u16_t)((lwip_ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK) * 8))); /* reassemble the packet*/ p = ip4_reass(p); - 803f71e: 6878 ldr r0, [r7, #4] - 803f720: f000 fc92 bl 8040048 - 803f724: 6078 str r0, [r7, #4] + 803f7a2: 6878 ldr r0, [r7, #4] + 803f7a4: f000 fc92 bl 80400cc + 803f7a8: 6078 str r0, [r7, #4] /* packet not fully reassembled yet? */ if (p == NULL) { - 803f726: 687b ldr r3, [r7, #4] - 803f728: 2b00 cmp r3, #0 - 803f72a: d101 bne.n 803f730 + 803f7aa: 687b ldr r3, [r7, #4] + 803f7ac: 2b00 cmp r3, #0 + 803f7ae: d101 bne.n 803f7b4 return ERR_OK; - 803f72c: 2300 movs r3, #0 - 803f72e: e064 b.n 803f7fa + 803f7b0: 2300 movs r3, #0 + 803f7b2: e064 b.n 803f87e } iphdr = (const struct ip_hdr *)p->payload; - 803f730: 687b ldr r3, [r7, #4] - 803f732: 685b ldr r3, [r3, #4] - 803f734: 617b str r3, [r7, #20] + 803f7b4: 687b ldr r3, [r7, #4] + 803f7b6: 685b ldr r3, [r3, #4] + 803f7b8: 617b str r3, [r7, #20] /* send to upper layers */ LWIP_DEBUGF(IP_DEBUG, ("ip4_input: \n")); ip4_debug_print(p); LWIP_DEBUGF(IP_DEBUG, ("ip4_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len)); ip_data.current_netif = netif; - 803f736: 4a33 ldr r2, [pc, #204] ; (803f804 ) - 803f738: 693b ldr r3, [r7, #16] - 803f73a: 6013 str r3, [r2, #0] + 803f7ba: 4a33 ldr r2, [pc, #204] ; (803f888 ) + 803f7bc: 693b ldr r3, [r7, #16] + 803f7be: 6013 str r3, [r2, #0] ip_data.current_input_netif = inp; - 803f73c: 4a31 ldr r2, [pc, #196] ; (803f804 ) - 803f73e: 683b ldr r3, [r7, #0] - 803f740: 6053 str r3, [r2, #4] + 803f7c0: 4a31 ldr r2, [pc, #196] ; (803f888 ) + 803f7c2: 683b ldr r3, [r7, #0] + 803f7c4: 6053 str r3, [r2, #4] ip_data.current_ip4_header = iphdr; - 803f742: 4a30 ldr r2, [pc, #192] ; (803f804 ) - 803f744: 697b ldr r3, [r7, #20] - 803f746: 6093 str r3, [r2, #8] + 803f7c6: 4a30 ldr r2, [pc, #192] ; (803f888 ) + 803f7c8: 697b ldr r3, [r7, #20] + 803f7ca: 6093 str r3, [r2, #8] ip_data.current_ip_header_tot_len = IPH_HL_BYTES(iphdr); - 803f748: 697b ldr r3, [r7, #20] - 803f74a: 781b ldrb r3, [r3, #0] - 803f74c: f003 030f and.w r3, r3, #15 - 803f750: b2db uxtb r3, r3 - 803f752: 009b lsls r3, r3, #2 - 803f754: b2db uxtb r3, r3 - 803f756: b29a uxth r2, r3 - 803f758: 4b2a ldr r3, [pc, #168] ; (803f804 ) - 803f75a: 819a strh r2, [r3, #12] + 803f7cc: 697b ldr r3, [r7, #20] + 803f7ce: 781b ldrb r3, [r3, #0] + 803f7d0: f003 030f and.w r3, r3, #15 + 803f7d4: b2db uxtb r3, r3 + 803f7d6: 009b lsls r3, r3, #2 + 803f7d8: b2db uxtb r3, r3 + 803f7da: b29a uxth r2, r3 + 803f7dc: 4b2a ldr r3, [pc, #168] ; (803f888 ) + 803f7de: 819a strh r2, [r3, #12] /* raw input did not eat the packet? */ raw_status = raw_input(p, inp); if (raw_status != RAW_INPUT_EATEN) #endif /* LWIP_RAW */ { pbuf_remove_header(p, iphdr_hlen); /* Move to payload, no check necessary. */ - 803f75c: 89fb ldrh r3, [r7, #14] - 803f75e: 4619 mov r1, r3 - 803f760: 6878 ldr r0, [r7, #4] - 803f762: f7f7 ff65 bl 8037630 + 803f7e0: 89fb ldrh r3, [r7, #14] + 803f7e2: 4619 mov r1, r3 + 803f7e4: 6878 ldr r0, [r7, #4] + 803f7e6: f7f7 ff65 bl 80376b4 switch (IPH_PROTO(iphdr)) { - 803f766: 697b ldr r3, [r7, #20] - 803f768: 7a5b ldrb r3, [r3, #9] - 803f76a: 2b11 cmp r3, #17 - 803f76c: d006 beq.n 803f77c - 803f76e: 2b11 cmp r3, #17 - 803f770: dc13 bgt.n 803f79a - 803f772: 2b01 cmp r3, #1 - 803f774: d00c beq.n 803f790 - 803f776: 2b06 cmp r3, #6 - 803f778: d005 beq.n 803f786 - 803f77a: e00e b.n 803f79a + 803f7ea: 697b ldr r3, [r7, #20] + 803f7ec: 7a5b ldrb r3, [r3, #9] + 803f7ee: 2b11 cmp r3, #17 + 803f7f0: d006 beq.n 803f800 + 803f7f2: 2b11 cmp r3, #17 + 803f7f4: dc13 bgt.n 803f81e + 803f7f6: 2b01 cmp r3, #1 + 803f7f8: d00c beq.n 803f814 + 803f7fa: 2b06 cmp r3, #6 + 803f7fc: d005 beq.n 803f80a + 803f7fe: e00e b.n 803f81e case IP_PROTO_UDP: #if LWIP_UDPLITE case IP_PROTO_UDPLITE: #endif /* LWIP_UDPLITE */ MIB2_STATS_INC(mib2.ipindelivers); udp_input(p, inp); - 803f77c: 6839 ldr r1, [r7, #0] - 803f77e: 6878 ldr r0, [r7, #4] - 803f780: f7fe fc42 bl 803e008 + 803f800: 6839 ldr r1, [r7, #0] + 803f802: 6878 ldr r0, [r7, #4] + 803f804: f7fe fc42 bl 803e08c break; - 803f784: e026 b.n 803f7d4 + 803f808: e026 b.n 803f858 #endif /* LWIP_UDP */ #if LWIP_TCP case IP_PROTO_TCP: MIB2_STATS_INC(mib2.ipindelivers); tcp_input(p, inp); - 803f786: 6839 ldr r1, [r7, #0] - 803f788: 6878 ldr r0, [r7, #4] - 803f78a: f7fa f863 bl 8039854 + 803f80a: 6839 ldr r1, [r7, #0] + 803f80c: 6878 ldr r0, [r7, #4] + 803f80e: f7fa f863 bl 80398d8 break; - 803f78e: e021 b.n 803f7d4 + 803f812: e021 b.n 803f858 #endif /* LWIP_TCP */ #if LWIP_ICMP case IP_PROTO_ICMP: MIB2_STATS_INC(mib2.ipindelivers); icmp_input(p, inp); - 803f790: 6839 ldr r1, [r7, #0] - 803f792: 6878 ldr r0, [r7, #4] - 803f794: f7ff fcc8 bl 803f128 + 803f814: 6839 ldr r1, [r7, #0] + 803f816: 6878 ldr r0, [r7, #4] + 803f818: f7ff fcc8 bl 803f1ac break; - 803f798: e01c b.n 803f7d4 + 803f81c: e01c b.n 803f858 } else #endif /* LWIP_RAW */ { #if LWIP_ICMP /* send ICMP destination protocol unreachable unless is was a broadcast */ if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) && - 803f79a: 4b1a ldr r3, [pc, #104] ; (803f804 ) - 803f79c: 695b ldr r3, [r3, #20] - 803f79e: 6939 ldr r1, [r7, #16] - 803f7a0: 4618 mov r0, r3 - 803f7a2: f000 f90b bl 803f9bc - 803f7a6: 4603 mov r3, r0 - 803f7a8: 2b00 cmp r3, #0 - 803f7aa: d10f bne.n 803f7cc + 803f81e: 4b1a ldr r3, [pc, #104] ; (803f888 ) + 803f820: 695b ldr r3, [r3, #20] + 803f822: 6939 ldr r1, [r7, #16] + 803f824: 4618 mov r0, r3 + 803f826: f000 f90b bl 803fa40 + 803f82a: 4603 mov r3, r0 + 803f82c: 2b00 cmp r3, #0 + 803f82e: d10f bne.n 803f850 !ip4_addr_ismulticast(ip4_current_dest_addr())) { - 803f7ac: 4b15 ldr r3, [pc, #84] ; (803f804 ) - 803f7ae: 695b ldr r3, [r3, #20] - 803f7b0: f003 03f0 and.w r3, r3, #240 ; 0xf0 + 803f830: 4b15 ldr r3, [pc, #84] ; (803f888 ) + 803f832: 695b ldr r3, [r3, #20] + 803f834: f003 03f0 and.w r3, r3, #240 ; 0xf0 if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) && - 803f7b4: 2be0 cmp r3, #224 ; 0xe0 - 803f7b6: d009 beq.n 803f7cc + 803f838: 2be0 cmp r3, #224 ; 0xe0 + 803f83a: d009 beq.n 803f850 pbuf_header_force(p, (s16_t)iphdr_hlen); /* Move to ip header, no check necessary. */ - 803f7b8: f9b7 300e ldrsh.w r3, [r7, #14] - 803f7bc: 4619 mov r1, r3 - 803f7be: 6878 ldr r0, [r7, #4] - 803f7c0: f7f7 ffa9 bl 8037716 + 803f83c: f9b7 300e ldrsh.w r3, [r7, #14] + 803f840: 4619 mov r1, r3 + 803f842: 6878 ldr r0, [r7, #4] + 803f844: f7f7 ffa9 bl 803779a icmp_dest_unreach(p, ICMP_DUR_PROTO); - 803f7c4: 2102 movs r1, #2 - 803f7c6: 6878 ldr r0, [r7, #4] - 803f7c8: f7ff fdce bl 803f368 + 803f848: 2102 movs r1, #2 + 803f84a: 6878 ldr r0, [r7, #4] + 803f84c: f7ff fdce bl 803f3ec IP_STATS_INC(ip.proterr); IP_STATS_INC(ip.drop); MIB2_STATS_INC(mib2.ipinunknownprotos); } pbuf_free(p); - 803f7cc: 6878 ldr r0, [r7, #4] - 803f7ce: f7f7 ffb5 bl 803773c + 803f850: 6878 ldr r0, [r7, #4] + 803f852: f7f7 ffb5 bl 80377c0 break; - 803f7d2: bf00 nop + 803f856: bf00 nop } } /* @todo: this is not really necessary... */ ip_data.current_netif = NULL; - 803f7d4: 4b0b ldr r3, [pc, #44] ; (803f804 ) - 803f7d6: 2200 movs r2, #0 - 803f7d8: 601a str r2, [r3, #0] + 803f858: 4b0b ldr r3, [pc, #44] ; (803f888 ) + 803f85a: 2200 movs r2, #0 + 803f85c: 601a str r2, [r3, #0] ip_data.current_input_netif = NULL; - 803f7da: 4b0a ldr r3, [pc, #40] ; (803f804 ) - 803f7dc: 2200 movs r2, #0 - 803f7de: 605a str r2, [r3, #4] + 803f85e: 4b0a ldr r3, [pc, #40] ; (803f888 ) + 803f860: 2200 movs r2, #0 + 803f862: 605a str r2, [r3, #4] ip_data.current_ip4_header = NULL; - 803f7e0: 4b08 ldr r3, [pc, #32] ; (803f804 ) - 803f7e2: 2200 movs r2, #0 - 803f7e4: 609a str r2, [r3, #8] + 803f864: 4b08 ldr r3, [pc, #32] ; (803f888 ) + 803f866: 2200 movs r2, #0 + 803f868: 609a str r2, [r3, #8] ip_data.current_ip_header_tot_len = 0; - 803f7e6: 4b07 ldr r3, [pc, #28] ; (803f804 ) - 803f7e8: 2200 movs r2, #0 - 803f7ea: 819a strh r2, [r3, #12] + 803f86a: 4b07 ldr r3, [pc, #28] ; (803f888 ) + 803f86c: 2200 movs r2, #0 + 803f86e: 819a strh r2, [r3, #12] ip4_addr_set_any(ip4_current_src_addr()); - 803f7ec: 4b05 ldr r3, [pc, #20] ; (803f804 ) - 803f7ee: 2200 movs r2, #0 - 803f7f0: 611a str r2, [r3, #16] + 803f870: 4b05 ldr r3, [pc, #20] ; (803f888 ) + 803f872: 2200 movs r2, #0 + 803f874: 611a str r2, [r3, #16] ip4_addr_set_any(ip4_current_dest_addr()); - 803f7f2: 4b04 ldr r3, [pc, #16] ; (803f804 ) - 803f7f4: 2200 movs r2, #0 - 803f7f6: 615a str r2, [r3, #20] + 803f876: 4b04 ldr r3, [pc, #16] ; (803f888 ) + 803f878: 2200 movs r2, #0 + 803f87a: 615a str r2, [r3, #20] return ERR_OK; - 803f7f8: 2300 movs r3, #0 + 803f87c: 2300 movs r3, #0 } - 803f7fa: 4618 mov r0, r3 - 803f7fc: 3718 adds r7, #24 - 803f7fe: 46bd mov sp, r7 - 803f800: bd80 pop {r7, pc} - 803f802: bf00 nop - 803f804: 2400b9bc .word 0x2400b9bc - 803f808: 2400e94c .word 0x2400e94c + 803f87e: 4618 mov r0, r3 + 803f880: 3718 adds r7, #24 + 803f882: 46bd mov sp, r7 + 803f884: bd80 pop {r7, pc} + 803f886: bf00 nop + 803f888: 2400b9c4 .word 0x2400b9c4 + 803f88c: 2400e954 .word 0x2400e954 -0803f80c : +0803f890 : */ err_t ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest, u8_t ttl, u8_t tos, u8_t proto, struct netif *netif) { - 803f80c: b580 push {r7, lr} - 803f80e: b08a sub sp, #40 ; 0x28 - 803f810: af04 add r7, sp, #16 - 803f812: 60f8 str r0, [r7, #12] - 803f814: 60b9 str r1, [r7, #8] - 803f816: 607a str r2, [r7, #4] - 803f818: 70fb strb r3, [r7, #3] + 803f890: b580 push {r7, lr} + 803f892: b08a sub sp, #40 ; 0x28 + 803f894: af04 add r7, sp, #16 + 803f896: 60f8 str r0, [r7, #12] + 803f898: 60b9 str r1, [r7, #8] + 803f89a: 607a str r2, [r7, #4] + 803f89c: 70fb strb r3, [r7, #3] ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest, u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options, u16_t optlen) { #endif /* IP_OPTIONS_SEND */ const ip4_addr_t *src_used = src; - 803f81a: 68bb ldr r3, [r7, #8] - 803f81c: 617b str r3, [r7, #20] + 803f89e: 68bb ldr r3, [r7, #8] + 803f8a0: 617b str r3, [r7, #20] if (dest != LWIP_IP_HDRINCL) { - 803f81e: 687b ldr r3, [r7, #4] - 803f820: 2b00 cmp r3, #0 - 803f822: d009 beq.n 803f838 + 803f8a2: 687b ldr r3, [r7, #4] + 803f8a4: 2b00 cmp r3, #0 + 803f8a6: d009 beq.n 803f8bc if (ip4_addr_isany(src)) { - 803f824: 68bb ldr r3, [r7, #8] - 803f826: 2b00 cmp r3, #0 - 803f828: d003 beq.n 803f832 - 803f82a: 68bb ldr r3, [r7, #8] - 803f82c: 681b ldr r3, [r3, #0] - 803f82e: 2b00 cmp r3, #0 - 803f830: d102 bne.n 803f838 + 803f8a8: 68bb ldr r3, [r7, #8] + 803f8aa: 2b00 cmp r3, #0 + 803f8ac: d003 beq.n 803f8b6 + 803f8ae: 68bb ldr r3, [r7, #8] + 803f8b0: 681b ldr r3, [r3, #0] + 803f8b2: 2b00 cmp r3, #0 + 803f8b4: d102 bne.n 803f8bc src_used = netif_ip4_addr(netif); - 803f832: 6abb ldr r3, [r7, #40] ; 0x28 - 803f834: 3304 adds r3, #4 - 803f836: 617b str r3, [r7, #20] + 803f8b6: 6abb ldr r3, [r7, #40] ; 0x28 + 803f8b8: 3304 adds r3, #4 + 803f8ba: 617b str r3, [r7, #20] #if IP_OPTIONS_SEND return ip4_output_if_opt_src(p, src_used, dest, ttl, tos, proto, netif, ip_options, optlen); #else /* IP_OPTIONS_SEND */ return ip4_output_if_src(p, src_used, dest, ttl, tos, proto, netif); - 803f838: 78fa ldrb r2, [r7, #3] - 803f83a: 6abb ldr r3, [r7, #40] ; 0x28 - 803f83c: 9302 str r3, [sp, #8] - 803f83e: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 - 803f842: 9301 str r3, [sp, #4] - 803f844: f897 3020 ldrb.w r3, [r7, #32] - 803f848: 9300 str r3, [sp, #0] - 803f84a: 4613 mov r3, r2 - 803f84c: 687a ldr r2, [r7, #4] - 803f84e: 6979 ldr r1, [r7, #20] - 803f850: 68f8 ldr r0, [r7, #12] - 803f852: f000 f805 bl 803f860 - 803f856: 4603 mov r3, r0 + 803f8bc: 78fa ldrb r2, [r7, #3] + 803f8be: 6abb ldr r3, [r7, #40] ; 0x28 + 803f8c0: 9302 str r3, [sp, #8] + 803f8c2: f897 3024 ldrb.w r3, [r7, #36] ; 0x24 + 803f8c6: 9301 str r3, [sp, #4] + 803f8c8: f897 3020 ldrb.w r3, [r7, #32] + 803f8cc: 9300 str r3, [sp, #0] + 803f8ce: 4613 mov r3, r2 + 803f8d0: 687a ldr r2, [r7, #4] + 803f8d2: 6979 ldr r1, [r7, #20] + 803f8d4: 68f8 ldr r0, [r7, #12] + 803f8d6: f000 f805 bl 803f8e4 + 803f8da: 4603 mov r3, r0 #endif /* IP_OPTIONS_SEND */ } - 803f858: 4618 mov r0, r3 - 803f85a: 3718 adds r7, #24 - 803f85c: 46bd mov sp, r7 - 803f85e: bd80 pop {r7, pc} + 803f8dc: 4618 mov r0, r3 + 803f8de: 3718 adds r7, #24 + 803f8e0: 46bd mov sp, r7 + 803f8e2: bd80 pop {r7, pc} -0803f860 : +0803f8e4 : */ err_t ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest, u8_t ttl, u8_t tos, u8_t proto, struct netif *netif) { - 803f860: b580 push {r7, lr} - 803f862: b088 sub sp, #32 - 803f864: af00 add r7, sp, #0 - 803f866: 60f8 str r0, [r7, #12] - 803f868: 60b9 str r1, [r7, #8] - 803f86a: 607a str r2, [r7, #4] - 803f86c: 70fb strb r3, [r7, #3] + 803f8e4: b580 push {r7, lr} + 803f8e6: b088 sub sp, #32 + 803f8e8: af00 add r7, sp, #0 + 803f8ea: 60f8 str r0, [r7, #12] + 803f8ec: 60b9 str r1, [r7, #8] + 803f8ee: 607a str r2, [r7, #4] + 803f8f0: 70fb strb r3, [r7, #3] #if CHECKSUM_GEN_IP_INLINE u32_t chk_sum = 0; #endif /* CHECKSUM_GEN_IP_INLINE */ LWIP_ASSERT_CORE_LOCKED(); LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p); - 803f86e: 68fb ldr r3, [r7, #12] - 803f870: 7b9b ldrb r3, [r3, #14] - 803f872: 2b01 cmp r3, #1 - 803f874: d006 beq.n 803f884 - 803f876: 4b4b ldr r3, [pc, #300] ; (803f9a4 ) - 803f878: f44f 7255 mov.w r2, #852 ; 0x354 - 803f87c: 494a ldr r1, [pc, #296] ; (803f9a8 ) - 803f87e: 484b ldr r0, [pc, #300] ; (803f9ac ) - 803f880: f001 f946 bl 8040b10 + 803f8f2: 68fb ldr r3, [r7, #12] + 803f8f4: 7b9b ldrb r3, [r3, #14] + 803f8f6: 2b01 cmp r3, #1 + 803f8f8: d006 beq.n 803f908 + 803f8fa: 4b4b ldr r3, [pc, #300] ; (803fa28 ) + 803f8fc: f44f 7255 mov.w r2, #852 ; 0x354 + 803f900: 494a ldr r1, [pc, #296] ; (803fa2c ) + 803f902: 484b ldr r0, [pc, #300] ; (803fa30 ) + 803f904: f001 f946 bl 8040b94 MIB2_STATS_INC(mib2.ipoutrequests); /* Should the IP header be generated or is it already included in p? */ if (dest != LWIP_IP_HDRINCL) { - 803f884: 687b ldr r3, [r7, #4] - 803f886: 2b00 cmp r3, #0 - 803f888: d060 beq.n 803f94c + 803f908: 687b ldr r3, [r7, #4] + 803f90a: 2b00 cmp r3, #0 + 803f90c: d060 beq.n 803f9d0 u16_t ip_hlen = IP_HLEN; - 803f88a: 2314 movs r3, #20 - 803f88c: 837b strh r3, [r7, #26] + 803f90e: 2314 movs r3, #20 + 803f910: 837b strh r3, [r7, #26] } #endif /* CHECKSUM_GEN_IP_INLINE */ } #endif /* IP_OPTIONS_SEND */ /* generate IP header */ if (pbuf_add_header(p, IP_HLEN)) { - 803f88e: 2114 movs r1, #20 - 803f890: 68f8 ldr r0, [r7, #12] - 803f892: f7f7 febd bl 8037610 - 803f896: 4603 mov r3, r0 - 803f898: 2b00 cmp r3, #0 - 803f89a: d002 beq.n 803f8a2 + 803f912: 2114 movs r1, #20 + 803f914: 68f8 ldr r0, [r7, #12] + 803f916: f7f7 febd bl 8037694 + 803f91a: 4603 mov r3, r0 + 803f91c: 2b00 cmp r3, #0 + 803f91e: d002 beq.n 803f926 LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: not enough room for IP header in pbuf\n")); IP_STATS_INC(ip.err); MIB2_STATS_INC(mib2.ipoutdiscards); return ERR_BUF; - 803f89c: f06f 0301 mvn.w r3, #1 - 803f8a0: e07c b.n 803f99c + 803f920: f06f 0301 mvn.w r3, #1 + 803f924: e07c b.n 803fa20 } iphdr = (struct ip_hdr *)p->payload; - 803f8a2: 68fb ldr r3, [r7, #12] - 803f8a4: 685b ldr r3, [r3, #4] - 803f8a6: 61fb str r3, [r7, #28] + 803f926: 68fb ldr r3, [r7, #12] + 803f928: 685b ldr r3, [r3, #4] + 803f92a: 61fb str r3, [r7, #28] LWIP_ASSERT("check that first pbuf can hold struct ip_hdr", - 803f8a8: 68fb ldr r3, [r7, #12] - 803f8aa: 895b ldrh r3, [r3, #10] - 803f8ac: 2b13 cmp r3, #19 - 803f8ae: d806 bhi.n 803f8be - 803f8b0: 4b3c ldr r3, [pc, #240] ; (803f9a4 ) - 803f8b2: f44f 7262 mov.w r2, #904 ; 0x388 - 803f8b6: 493e ldr r1, [pc, #248] ; (803f9b0 ) - 803f8b8: 483c ldr r0, [pc, #240] ; (803f9ac ) - 803f8ba: f001 f929 bl 8040b10 + 803f92c: 68fb ldr r3, [r7, #12] + 803f92e: 895b ldrh r3, [r3, #10] + 803f930: 2b13 cmp r3, #19 + 803f932: d806 bhi.n 803f942 + 803f934: 4b3c ldr r3, [pc, #240] ; (803fa28 ) + 803f936: f44f 7262 mov.w r2, #904 ; 0x388 + 803f93a: 493e ldr r1, [pc, #248] ; (803fa34 ) + 803f93c: 483c ldr r0, [pc, #240] ; (803fa30 ) + 803f93e: f001 f929 bl 8040b94 (p->len >= sizeof(struct ip_hdr))); IPH_TTL_SET(iphdr, ttl); - 803f8be: 69fb ldr r3, [r7, #28] - 803f8c0: 78fa ldrb r2, [r7, #3] - 803f8c2: 721a strb r2, [r3, #8] + 803f942: 69fb ldr r3, [r7, #28] + 803f944: 78fa ldrb r2, [r7, #3] + 803f946: 721a strb r2, [r3, #8] IPH_PROTO_SET(iphdr, proto); - 803f8c4: 69fb ldr r3, [r7, #28] - 803f8c6: f897 202c ldrb.w r2, [r7, #44] ; 0x2c - 803f8ca: 725a strb r2, [r3, #9] + 803f948: 69fb ldr r3, [r7, #28] + 803f94a: f897 202c ldrb.w r2, [r7, #44] ; 0x2c + 803f94e: 725a strb r2, [r3, #9] #if CHECKSUM_GEN_IP_INLINE chk_sum += PP_NTOHS(proto | (ttl << 8)); #endif /* CHECKSUM_GEN_IP_INLINE */ /* dest cannot be NULL here */ ip4_addr_copy(iphdr->dest, *dest); - 803f8cc: 687b ldr r3, [r7, #4] - 803f8ce: 681a ldr r2, [r3, #0] - 803f8d0: 69fb ldr r3, [r7, #28] - 803f8d2: 611a str r2, [r3, #16] + 803f950: 687b ldr r3, [r7, #4] + 803f952: 681a ldr r2, [r3, #0] + 803f954: 69fb ldr r3, [r7, #28] + 803f956: 611a str r2, [r3, #16] #if CHECKSUM_GEN_IP_INLINE chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF; chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16; #endif /* CHECKSUM_GEN_IP_INLINE */ IPH_VHL_SET(iphdr, 4, ip_hlen / 4); - 803f8d4: 8b7b ldrh r3, [r7, #26] - 803f8d6: 089b lsrs r3, r3, #2 - 803f8d8: b29b uxth r3, r3 - 803f8da: b2db uxtb r3, r3 - 803f8dc: f043 0340 orr.w r3, r3, #64 ; 0x40 - 803f8e0: b2da uxtb r2, r3 - 803f8e2: 69fb ldr r3, [r7, #28] - 803f8e4: 701a strb r2, [r3, #0] + 803f958: 8b7b ldrh r3, [r7, #26] + 803f95a: 089b lsrs r3, r3, #2 + 803f95c: b29b uxth r3, r3 + 803f95e: b2db uxtb r3, r3 + 803f960: f043 0340 orr.w r3, r3, #64 ; 0x40 + 803f964: b2da uxtb r2, r3 + 803f966: 69fb ldr r3, [r7, #28] + 803f968: 701a strb r2, [r3, #0] IPH_TOS_SET(iphdr, tos); - 803f8e6: 69fb ldr r3, [r7, #28] - 803f8e8: f897 2028 ldrb.w r2, [r7, #40] ; 0x28 - 803f8ec: 705a strb r2, [r3, #1] + 803f96a: 69fb ldr r3, [r7, #28] + 803f96c: f897 2028 ldrb.w r2, [r7, #40] ; 0x28 + 803f970: 705a strb r2, [r3, #1] #if CHECKSUM_GEN_IP_INLINE chk_sum += PP_NTOHS(tos | (iphdr->_v_hl << 8)); #endif /* CHECKSUM_GEN_IP_INLINE */ IPH_LEN_SET(iphdr, lwip_htons(p->tot_len)); - 803f8ee: 68fb ldr r3, [r7, #12] - 803f8f0: 891b ldrh r3, [r3, #8] - 803f8f2: 4618 mov r0, r3 - 803f8f4: f7f6 faf0 bl 8035ed8 - 803f8f8: 4603 mov r3, r0 - 803f8fa: 461a mov r2, r3 - 803f8fc: 69fb ldr r3, [r7, #28] - 803f8fe: 805a strh r2, [r3, #2] + 803f972: 68fb ldr r3, [r7, #12] + 803f974: 891b ldrh r3, [r3, #8] + 803f976: 4618 mov r0, r3 + 803f978: f7f6 faf0 bl 8035f5c + 803f97c: 4603 mov r3, r0 + 803f97e: 461a mov r2, r3 + 803f980: 69fb ldr r3, [r7, #28] + 803f982: 805a strh r2, [r3, #2] #if CHECKSUM_GEN_IP_INLINE chk_sum += iphdr->_len; #endif /* CHECKSUM_GEN_IP_INLINE */ IPH_OFFSET_SET(iphdr, 0); - 803f900: 69fb ldr r3, [r7, #28] - 803f902: 2200 movs r2, #0 - 803f904: 719a strb r2, [r3, #6] - 803f906: 2200 movs r2, #0 - 803f908: 71da strb r2, [r3, #7] + 803f984: 69fb ldr r3, [r7, #28] + 803f986: 2200 movs r2, #0 + 803f988: 719a strb r2, [r3, #6] + 803f98a: 2200 movs r2, #0 + 803f98c: 71da strb r2, [r3, #7] IPH_ID_SET(iphdr, lwip_htons(ip_id)); - 803f90a: 4b2a ldr r3, [pc, #168] ; (803f9b4 ) - 803f90c: 881b ldrh r3, [r3, #0] - 803f90e: 4618 mov r0, r3 - 803f910: f7f6 fae2 bl 8035ed8 - 803f914: 4603 mov r3, r0 - 803f916: 461a mov r2, r3 - 803f918: 69fb ldr r3, [r7, #28] - 803f91a: 809a strh r2, [r3, #4] + 803f98e: 4b2a ldr r3, [pc, #168] ; (803fa38 ) + 803f990: 881b ldrh r3, [r3, #0] + 803f992: 4618 mov r0, r3 + 803f994: f7f6 fae2 bl 8035f5c + 803f998: 4603 mov r3, r0 + 803f99a: 461a mov r2, r3 + 803f99c: 69fb ldr r3, [r7, #28] + 803f99e: 809a strh r2, [r3, #4] #if CHECKSUM_GEN_IP_INLINE chk_sum += iphdr->_id; #endif /* CHECKSUM_GEN_IP_INLINE */ ++ip_id; - 803f91c: 4b25 ldr r3, [pc, #148] ; (803f9b4 ) - 803f91e: 881b ldrh r3, [r3, #0] - 803f920: 3301 adds r3, #1 - 803f922: b29a uxth r2, r3 - 803f924: 4b23 ldr r3, [pc, #140] ; (803f9b4 ) - 803f926: 801a strh r2, [r3, #0] + 803f9a0: 4b25 ldr r3, [pc, #148] ; (803fa38 ) + 803f9a2: 881b ldrh r3, [r3, #0] + 803f9a4: 3301 adds r3, #1 + 803f9a6: b29a uxth r2, r3 + 803f9a8: 4b23 ldr r3, [pc, #140] ; (803fa38 ) + 803f9aa: 801a strh r2, [r3, #0] if (src == NULL) { - 803f928: 68bb ldr r3, [r7, #8] - 803f92a: 2b00 cmp r3, #0 - 803f92c: d104 bne.n 803f938 + 803f9ac: 68bb ldr r3, [r7, #8] + 803f9ae: 2b00 cmp r3, #0 + 803f9b0: d104 bne.n 803f9bc ip4_addr_copy(iphdr->src, *IP4_ADDR_ANY4); - 803f92e: 4b22 ldr r3, [pc, #136] ; (803f9b8 ) - 803f930: 681a ldr r2, [r3, #0] - 803f932: 69fb ldr r3, [r7, #28] - 803f934: 60da str r2, [r3, #12] - 803f936: e003 b.n 803f940 + 803f9b2: 4b22 ldr r3, [pc, #136] ; (803fa3c ) + 803f9b4: 681a ldr r2, [r3, #0] + 803f9b6: 69fb ldr r3, [r7, #28] + 803f9b8: 60da str r2, [r3, #12] + 803f9ba: e003 b.n 803f9c4 } else { /* src cannot be NULL here */ ip4_addr_copy(iphdr->src, *src); - 803f938: 68bb ldr r3, [r7, #8] - 803f93a: 681a ldr r2, [r3, #0] - 803f93c: 69fb ldr r3, [r7, #28] - 803f93e: 60da str r2, [r3, #12] + 803f9bc: 68bb ldr r3, [r7, #8] + 803f9be: 681a ldr r2, [r3, #0] + 803f9c0: 69fb ldr r3, [r7, #28] + 803f9c2: 60da str r2, [r3, #12] else { IPH_CHKSUM_SET(iphdr, 0); } #endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/ #else /* CHECKSUM_GEN_IP_INLINE */ IPH_CHKSUM_SET(iphdr, 0); - 803f940: 69fb ldr r3, [r7, #28] - 803f942: 2200 movs r2, #0 - 803f944: 729a strb r2, [r3, #10] - 803f946: 2200 movs r2, #0 - 803f948: 72da strb r2, [r3, #11] - 803f94a: e00f b.n 803f96c + 803f9c4: 69fb ldr r3, [r7, #28] + 803f9c6: 2200 movs r2, #0 + 803f9c8: 729a strb r2, [r3, #10] + 803f9ca: 2200 movs r2, #0 + 803f9cc: 72da strb r2, [r3, #11] + 803f9ce: e00f b.n 803f9f0 } #endif /* CHECKSUM_GEN_IP */ #endif /* CHECKSUM_GEN_IP_INLINE */ } else { /* IP header already included in p */ if (p->len < IP_HLEN) { - 803f94c: 68fb ldr r3, [r7, #12] - 803f94e: 895b ldrh r3, [r3, #10] - 803f950: 2b13 cmp r3, #19 - 803f952: d802 bhi.n 803f95a + 803f9d0: 68fb ldr r3, [r7, #12] + 803f9d2: 895b ldrh r3, [r3, #10] + 803f9d4: 2b13 cmp r3, #19 + 803f9d6: d802 bhi.n 803f9de LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: LWIP_IP_HDRINCL but pbuf is too short\n")); IP_STATS_INC(ip.err); MIB2_STATS_INC(mib2.ipoutdiscards); return ERR_BUF; - 803f954: f06f 0301 mvn.w r3, #1 - 803f958: e020 b.n 803f99c + 803f9d8: f06f 0301 mvn.w r3, #1 + 803f9dc: e020 b.n 803fa20 } iphdr = (struct ip_hdr *)p->payload; - 803f95a: 68fb ldr r3, [r7, #12] - 803f95c: 685b ldr r3, [r3, #4] - 803f95e: 61fb str r3, [r7, #28] + 803f9de: 68fb ldr r3, [r7, #12] + 803f9e0: 685b ldr r3, [r3, #4] + 803f9e2: 61fb str r3, [r7, #28] ip4_addr_copy(dest_addr, iphdr->dest); - 803f960: 69fb ldr r3, [r7, #28] - 803f962: 691b ldr r3, [r3, #16] - 803f964: 617b str r3, [r7, #20] + 803f9e4: 69fb ldr r3, [r7, #28] + 803f9e6: 691b ldr r3, [r3, #16] + 803f9e8: 617b str r3, [r7, #20] dest = &dest_addr; - 803f966: f107 0314 add.w r3, r7, #20 - 803f96a: 607b str r3, [r7, #4] + 803f9ea: f107 0314 add.w r3, r7, #20 + 803f9ee: 607b str r3, [r7, #4] } #endif /* LWIP_MULTICAST_TX_OPTIONS */ #endif /* ENABLE_LOOPBACK */ #if IP_FRAG /* don't fragment if interface has mtu set to 0 [loopif] */ if (netif->mtu && (p->tot_len > netif->mtu)) { - 803f96c: 6b3b ldr r3, [r7, #48] ; 0x30 - 803f96e: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803f970: 2b00 cmp r3, #0 - 803f972: d00c beq.n 803f98e - 803f974: 68fb ldr r3, [r7, #12] - 803f976: 891a ldrh r2, [r3, #8] - 803f978: 6b3b ldr r3, [r7, #48] ; 0x30 - 803f97a: 8d1b ldrh r3, [r3, #40] ; 0x28 - 803f97c: 429a cmp r2, r3 - 803f97e: d906 bls.n 803f98e + 803f9f0: 6b3b ldr r3, [r7, #48] ; 0x30 + 803f9f2: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803f9f4: 2b00 cmp r3, #0 + 803f9f6: d00c beq.n 803fa12 + 803f9f8: 68fb ldr r3, [r7, #12] + 803f9fa: 891a ldrh r2, [r3, #8] + 803f9fc: 6b3b ldr r3, [r7, #48] ; 0x30 + 803f9fe: 8d1b ldrh r3, [r3, #40] ; 0x28 + 803fa00: 429a cmp r2, r3 + 803fa02: d906 bls.n 803fa12 return ip4_frag(p, netif, dest); - 803f980: 687a ldr r2, [r7, #4] - 803f982: 6b39 ldr r1, [r7, #48] ; 0x30 - 803f984: 68f8 ldr r0, [r7, #12] - 803f986: f000 fd53 bl 8040430 - 803f98a: 4603 mov r3, r0 - 803f98c: e006 b.n 803f99c + 803fa04: 687a ldr r2, [r7, #4] + 803fa06: 6b39 ldr r1, [r7, #48] ; 0x30 + 803fa08: 68f8 ldr r0, [r7, #12] + 803fa0a: f000 fd53 bl 80404b4 + 803fa0e: 4603 mov r3, r0 + 803fa10: e006 b.n 803fa20 } #endif /* IP_FRAG */ LWIP_DEBUGF(IP_DEBUG, ("ip4_output_if: call netif->output()\n")); return netif->output(netif, p, dest); - 803f98e: 6b3b ldr r3, [r7, #48] ; 0x30 - 803f990: 695b ldr r3, [r3, #20] - 803f992: 687a ldr r2, [r7, #4] - 803f994: 68f9 ldr r1, [r7, #12] - 803f996: 6b38 ldr r0, [r7, #48] ; 0x30 - 803f998: 4798 blx r3 - 803f99a: 4603 mov r3, r0 -} - 803f99c: 4618 mov r0, r3 - 803f99e: 3720 adds r7, #32 - 803f9a0: 46bd mov sp, r7 - 803f9a2: bd80 pop {r7, pc} - 803f9a4: 08044958 .word 0x08044958 - 803f9a8: 0804498c .word 0x0804498c - 803f9ac: 08044998 .word 0x08044998 - 803f9b0: 080449c0 .word 0x080449c0 - 803f9b4: 2400eaaa .word 0x2400eaaa - 803f9b8: 08044e00 .word 0x08044e00 - -0803f9bc : + 803fa12: 6b3b ldr r3, [r7, #48] ; 0x30 + 803fa14: 695b ldr r3, [r3, #20] + 803fa16: 687a ldr r2, [r7, #4] + 803fa18: 68f9 ldr r1, [r7, #12] + 803fa1a: 6b38 ldr r0, [r7, #48] ; 0x30 + 803fa1c: 4798 blx r3 + 803fa1e: 4603 mov r3, r0 +} + 803fa20: 4618 mov r0, r3 + 803fa22: 3720 adds r7, #32 + 803fa24: 46bd mov sp, r7 + 803fa26: bd80 pop {r7, pc} + 803fa28: 080449d8 .word 0x080449d8 + 803fa2c: 08044a0c .word 0x08044a0c + 803fa30: 08044a18 .word 0x08044a18 + 803fa34: 08044a40 .word 0x08044a40 + 803fa38: 2400eab2 .word 0x2400eab2 + 803fa3c: 08044e80 .word 0x08044e80 + +0803fa40 : * @param netif the network interface against which the address is checked * @return returns non-zero if the address is a broadcast address */ u8_t ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif) { - 803f9bc: b480 push {r7} - 803f9be: b085 sub sp, #20 - 803f9c0: af00 add r7, sp, #0 - 803f9c2: 6078 str r0, [r7, #4] - 803f9c4: 6039 str r1, [r7, #0] + 803fa40: b480 push {r7} + 803fa42: b085 sub sp, #20 + 803fa44: af00 add r7, sp, #0 + 803fa46: 6078 str r0, [r7, #4] + 803fa48: 6039 str r1, [r7, #0] ip4_addr_t ipaddr; ip4_addr_set_u32(&ipaddr, addr); - 803f9c6: 687b ldr r3, [r7, #4] - 803f9c8: 60fb str r3, [r7, #12] + 803fa4a: 687b ldr r3, [r7, #4] + 803fa4c: 60fb str r3, [r7, #12] /* all ones (broadcast) or all zeroes (old skool broadcast) */ if ((~addr == IPADDR_ANY) || - 803f9ca: 687b ldr r3, [r7, #4] - 803f9cc: f1b3 3fff cmp.w r3, #4294967295 - 803f9d0: d002 beq.n 803f9d8 - 803f9d2: 687b ldr r3, [r7, #4] - 803f9d4: 2b00 cmp r3, #0 - 803f9d6: d101 bne.n 803f9dc + 803fa4e: 687b ldr r3, [r7, #4] + 803fa50: f1b3 3fff cmp.w r3, #4294967295 + 803fa54: d002 beq.n 803fa5c + 803fa56: 687b ldr r3, [r7, #4] + 803fa58: 2b00 cmp r3, #0 + 803fa5a: d101 bne.n 803fa60 (addr == IPADDR_ANY)) { return 1; - 803f9d8: 2301 movs r3, #1 - 803f9da: e02a b.n 803fa32 + 803fa5c: 2301 movs r3, #1 + 803fa5e: e02a b.n 803fab6 /* no broadcast support on this network interface? */ } else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) { - 803f9dc: 683b ldr r3, [r7, #0] - 803f9de: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 803f9e2: f003 0302 and.w r3, r3, #2 - 803f9e6: 2b00 cmp r3, #0 - 803f9e8: d101 bne.n 803f9ee + 803fa60: 683b ldr r3, [r7, #0] + 803fa62: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 803fa66: f003 0302 and.w r3, r3, #2 + 803fa6a: 2b00 cmp r3, #0 + 803fa6c: d101 bne.n 803fa72 /* the given address cannot be a broadcast address * nor can we check against any broadcast addresses */ return 0; - 803f9ea: 2300 movs r3, #0 - 803f9ec: e021 b.n 803fa32 + 803fa6e: 2300 movs r3, #0 + 803fa70: e021 b.n 803fab6 /* address matches network interface address exactly? => no broadcast */ } else if (addr == ip4_addr_get_u32(netif_ip4_addr(netif))) { - 803f9ee: 683b ldr r3, [r7, #0] - 803f9f0: 3304 adds r3, #4 - 803f9f2: 681b ldr r3, [r3, #0] - 803f9f4: 687a ldr r2, [r7, #4] - 803f9f6: 429a cmp r2, r3 - 803f9f8: d101 bne.n 803f9fe + 803fa72: 683b ldr r3, [r7, #0] + 803fa74: 3304 adds r3, #4 + 803fa76: 681b ldr r3, [r3, #0] + 803fa78: 687a ldr r2, [r7, #4] + 803fa7a: 429a cmp r2, r3 + 803fa7c: d101 bne.n 803fa82 return 0; - 803f9fa: 2300 movs r3, #0 - 803f9fc: e019 b.n 803fa32 + 803fa7e: 2300 movs r3, #0 + 803fa80: e019 b.n 803fab6 /* on the same (sub) network... */ } else if (ip4_addr_netcmp(&ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) - 803f9fe: 68fa ldr r2, [r7, #12] - 803fa00: 683b ldr r3, [r7, #0] - 803fa02: 3304 adds r3, #4 - 803fa04: 681b ldr r3, [r3, #0] - 803fa06: 405a eors r2, r3 - 803fa08: 683b ldr r3, [r7, #0] - 803fa0a: 3308 adds r3, #8 - 803fa0c: 681b ldr r3, [r3, #0] - 803fa0e: 4013 ands r3, r2 - 803fa10: 2b00 cmp r3, #0 - 803fa12: d10d bne.n 803fa30 + 803fa82: 68fa ldr r2, [r7, #12] + 803fa84: 683b ldr r3, [r7, #0] + 803fa86: 3304 adds r3, #4 + 803fa88: 681b ldr r3, [r3, #0] + 803fa8a: 405a eors r2, r3 + 803fa8c: 683b ldr r3, [r7, #0] + 803fa8e: 3308 adds r3, #8 + 803fa90: 681b ldr r3, [r3, #0] + 803fa92: 4013 ands r3, r2 + 803fa94: 2b00 cmp r3, #0 + 803fa96: d10d bne.n 803fab4 /* ...and host identifier bits are all ones? =>... */ && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) == - 803fa14: 683b ldr r3, [r7, #0] - 803fa16: 3308 adds r3, #8 - 803fa18: 681b ldr r3, [r3, #0] - 803fa1a: 43da mvns r2, r3 - 803fa1c: 687b ldr r3, [r7, #4] - 803fa1e: 401a ands r2, r3 + 803fa98: 683b ldr r3, [r7, #0] + 803fa9a: 3308 adds r3, #8 + 803fa9c: 681b ldr r3, [r3, #0] + 803fa9e: 43da mvns r2, r3 + 803faa0: 687b ldr r3, [r7, #4] + 803faa2: 401a ands r2, r3 (IPADDR_BROADCAST & ~ip4_addr_get_u32(netif_ip4_netmask(netif))))) { - 803fa20: 683b ldr r3, [r7, #0] - 803fa22: 3308 adds r3, #8 - 803fa24: 681b ldr r3, [r3, #0] - 803fa26: 43db mvns r3, r3 + 803faa4: 683b ldr r3, [r7, #0] + 803faa6: 3308 adds r3, #8 + 803faa8: 681b ldr r3, [r3, #0] + 803faaa: 43db mvns r3, r3 && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) == - 803fa28: 429a cmp r2, r3 - 803fa2a: d101 bne.n 803fa30 + 803faac: 429a cmp r2, r3 + 803faae: d101 bne.n 803fab4 /* => network broadcast address */ return 1; - 803fa2c: 2301 movs r3, #1 - 803fa2e: e000 b.n 803fa32 + 803fab0: 2301 movs r3, #1 + 803fab2: e000 b.n 803fab6 } else { return 0; - 803fa30: 2300 movs r3, #0 + 803fab4: 2300 movs r3, #0 } } - 803fa32: 4618 mov r0, r3 - 803fa34: 3714 adds r7, #20 - 803fa36: 46bd mov sp, r7 - 803fa38: f85d 7b04 ldr.w r7, [sp], #4 - 803fa3c: 4770 bx lr + 803fab6: 4618 mov r0, r3 + 803fab8: 3714 adds r7, #20 + 803faba: 46bd mov sp, r7 + 803fabc: f85d 7b04 ldr.w r7, [sp], #4 + 803fac0: 4770 bx lr ... -0803fa40 : +0803fac4 : * * Should be called every 1000 msec (defined by IP_TMR_INTERVAL). */ void ip_reass_tmr(void) { - 803fa40: b580 push {r7, lr} - 803fa42: b084 sub sp, #16 - 803fa44: af00 add r7, sp, #0 + 803fac4: b580 push {r7, lr} + 803fac6: b084 sub sp, #16 + 803fac8: af00 add r7, sp, #0 struct ip_reassdata *r, *prev = NULL; - 803fa46: 2300 movs r3, #0 - 803fa48: 60bb str r3, [r7, #8] + 803faca: 2300 movs r3, #0 + 803facc: 60bb str r3, [r7, #8] r = reassdatagrams; - 803fa4a: 4b12 ldr r3, [pc, #72] ; (803fa94 ) - 803fa4c: 681b ldr r3, [r3, #0] - 803fa4e: 60fb str r3, [r7, #12] + 803face: 4b12 ldr r3, [pc, #72] ; (803fb18 ) + 803fad0: 681b ldr r3, [r3, #0] + 803fad2: 60fb str r3, [r7, #12] while (r != NULL) { - 803fa50: e018 b.n 803fa84 + 803fad4: e018 b.n 803fb08 /* Decrement the timer. Once it reaches 0, * clean up the incomplete fragment assembly */ if (r->timer > 0) { - 803fa52: 68fb ldr r3, [r7, #12] - 803fa54: 7fdb ldrb r3, [r3, #31] - 803fa56: 2b00 cmp r3, #0 - 803fa58: d00b beq.n 803fa72 + 803fad6: 68fb ldr r3, [r7, #12] + 803fad8: 7fdb ldrb r3, [r3, #31] + 803fada: 2b00 cmp r3, #0 + 803fadc: d00b beq.n 803faf6 r->timer--; - 803fa5a: 68fb ldr r3, [r7, #12] - 803fa5c: 7fdb ldrb r3, [r3, #31] - 803fa5e: 3b01 subs r3, #1 - 803fa60: b2da uxtb r2, r3 - 803fa62: 68fb ldr r3, [r7, #12] - 803fa64: 77da strb r2, [r3, #31] + 803fade: 68fb ldr r3, [r7, #12] + 803fae0: 7fdb ldrb r3, [r3, #31] + 803fae2: 3b01 subs r3, #1 + 803fae4: b2da uxtb r2, r3 + 803fae6: 68fb ldr r3, [r7, #12] + 803fae8: 77da strb r2, [r3, #31] LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n", (u16_t)r->timer)); prev = r; - 803fa66: 68fb ldr r3, [r7, #12] - 803fa68: 60bb str r3, [r7, #8] + 803faea: 68fb ldr r3, [r7, #12] + 803faec: 60bb str r3, [r7, #8] r = r->next; - 803fa6a: 68fb ldr r3, [r7, #12] - 803fa6c: 681b ldr r3, [r3, #0] - 803fa6e: 60fb str r3, [r7, #12] - 803fa70: e008 b.n 803fa84 + 803faee: 68fb ldr r3, [r7, #12] + 803faf0: 681b ldr r3, [r3, #0] + 803faf2: 60fb str r3, [r7, #12] + 803faf4: e008 b.n 803fb08 } else { /* reassembly timed out */ struct ip_reassdata *tmp; LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n")); tmp = r; - 803fa72: 68fb ldr r3, [r7, #12] - 803fa74: 607b str r3, [r7, #4] + 803faf6: 68fb ldr r3, [r7, #12] + 803faf8: 607b str r3, [r7, #4] /* get the next pointer before freeing */ r = r->next; - 803fa76: 68fb ldr r3, [r7, #12] - 803fa78: 681b ldr r3, [r3, #0] - 803fa7a: 60fb str r3, [r7, #12] + 803fafa: 68fb ldr r3, [r7, #12] + 803fafc: 681b ldr r3, [r3, #0] + 803fafe: 60fb str r3, [r7, #12] /* free the helper struct and all enqueued pbufs */ ip_reass_free_complete_datagram(tmp, prev); - 803fa7c: 68b9 ldr r1, [r7, #8] - 803fa7e: 6878 ldr r0, [r7, #4] - 803fa80: f000 f80a bl 803fa98 + 803fb00: 68b9 ldr r1, [r7, #8] + 803fb02: 6878 ldr r0, [r7, #4] + 803fb04: f000 f80a bl 803fb1c while (r != NULL) { - 803fa84: 68fb ldr r3, [r7, #12] - 803fa86: 2b00 cmp r3, #0 - 803fa88: d1e3 bne.n 803fa52 + 803fb08: 68fb ldr r3, [r7, #12] + 803fb0a: 2b00 cmp r3, #0 + 803fb0c: d1e3 bne.n 803fad6 } } } - 803fa8a: bf00 nop - 803fa8c: bf00 nop - 803fa8e: 3710 adds r7, #16 - 803fa90: 46bd mov sp, r7 - 803fa92: bd80 pop {r7, pc} - 803fa94: 2400eaac .word 0x2400eaac + 803fb0e: bf00 nop + 803fb10: bf00 nop + 803fb12: 3710 adds r7, #16 + 803fb14: 46bd mov sp, r7 + 803fb16: bd80 pop {r7, pc} + 803fb18: 2400eab4 .word 0x2400eab4 -0803fa98 : +0803fb1c : * @param prev the previous datagram in the linked list * @return the number of pbufs freed */ static int ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) { - 803fa98: b580 push {r7, lr} - 803fa9a: b088 sub sp, #32 - 803fa9c: af00 add r7, sp, #0 - 803fa9e: 6078 str r0, [r7, #4] - 803faa0: 6039 str r1, [r7, #0] + 803fb1c: b580 push {r7, lr} + 803fb1e: b088 sub sp, #32 + 803fb20: af00 add r7, sp, #0 + 803fb22: 6078 str r0, [r7, #4] + 803fb24: 6039 str r1, [r7, #0] u16_t pbufs_freed = 0; - 803faa2: 2300 movs r3, #0 - 803faa4: 83fb strh r3, [r7, #30] + 803fb26: 2300 movs r3, #0 + 803fb28: 83fb strh r3, [r7, #30] u16_t clen; struct pbuf *p; struct ip_reass_helper *iprh; LWIP_ASSERT("prev != ipr", prev != ipr); - 803faa6: 683a ldr r2, [r7, #0] - 803faa8: 687b ldr r3, [r7, #4] - 803faaa: 429a cmp r2, r3 - 803faac: d105 bne.n 803faba - 803faae: 4b45 ldr r3, [pc, #276] ; (803fbc4 ) - 803fab0: 22ab movs r2, #171 ; 0xab - 803fab2: 4945 ldr r1, [pc, #276] ; (803fbc8 ) - 803fab4: 4845 ldr r0, [pc, #276] ; (803fbcc ) - 803fab6: f001 f82b bl 8040b10 + 803fb2a: 683a ldr r2, [r7, #0] + 803fb2c: 687b ldr r3, [r7, #4] + 803fb2e: 429a cmp r2, r3 + 803fb30: d105 bne.n 803fb3e + 803fb32: 4b45 ldr r3, [pc, #276] ; (803fc48 ) + 803fb34: 22ab movs r2, #171 ; 0xab + 803fb36: 4945 ldr r1, [pc, #276] ; (803fc4c ) + 803fb38: 4845 ldr r0, [pc, #276] ; (803fc50 ) + 803fb3a: f001 f82b bl 8040b94 if (prev != NULL) { - 803faba: 683b ldr r3, [r7, #0] - 803fabc: 2b00 cmp r3, #0 - 803fabe: d00a beq.n 803fad6 + 803fb3e: 683b ldr r3, [r7, #0] + 803fb40: 2b00 cmp r3, #0 + 803fb42: d00a beq.n 803fb5a LWIP_ASSERT("prev->next == ipr", prev->next == ipr); - 803fac0: 683b ldr r3, [r7, #0] - 803fac2: 681b ldr r3, [r3, #0] - 803fac4: 687a ldr r2, [r7, #4] - 803fac6: 429a cmp r2, r3 - 803fac8: d005 beq.n 803fad6 - 803faca: 4b3e ldr r3, [pc, #248] ; (803fbc4 ) - 803facc: 22ad movs r2, #173 ; 0xad - 803face: 4940 ldr r1, [pc, #256] ; (803fbd0 ) - 803fad0: 483e ldr r0, [pc, #248] ; (803fbcc ) - 803fad2: f001 f81d bl 8040b10 + 803fb44: 683b ldr r3, [r7, #0] + 803fb46: 681b ldr r3, [r3, #0] + 803fb48: 687a ldr r2, [r7, #4] + 803fb4a: 429a cmp r2, r3 + 803fb4c: d005 beq.n 803fb5a + 803fb4e: 4b3e ldr r3, [pc, #248] ; (803fc48 ) + 803fb50: 22ad movs r2, #173 ; 0xad + 803fb52: 4940 ldr r1, [pc, #256] ; (803fc54 ) + 803fb54: 483e ldr r0, [pc, #248] ; (803fc50 ) + 803fb56: f001 f81d bl 8040b94 } MIB2_STATS_INC(mib2.ipreasmfails); #if LWIP_ICMP iprh = (struct ip_reass_helper *)ipr->p->payload; - 803fad6: 687b ldr r3, [r7, #4] - 803fad8: 685b ldr r3, [r3, #4] - 803fada: 685b ldr r3, [r3, #4] - 803fadc: 617b str r3, [r7, #20] + 803fb5a: 687b ldr r3, [r7, #4] + 803fb5c: 685b ldr r3, [r3, #4] + 803fb5e: 685b ldr r3, [r3, #4] + 803fb60: 617b str r3, [r7, #20] if (iprh->start == 0) { - 803fade: 697b ldr r3, [r7, #20] - 803fae0: 889b ldrh r3, [r3, #4] - 803fae2: b29b uxth r3, r3 - 803fae4: 2b00 cmp r3, #0 - 803fae6: d12a bne.n 803fb3e + 803fb62: 697b ldr r3, [r7, #20] + 803fb64: 889b ldrh r3, [r3, #4] + 803fb66: b29b uxth r3, r3 + 803fb68: 2b00 cmp r3, #0 + 803fb6a: d12a bne.n 803fbc2 /* The first fragment was received, send ICMP time exceeded. */ /* First, de-queue the first pbuf from r->p. */ p = ipr->p; - 803fae8: 687b ldr r3, [r7, #4] - 803faea: 685b ldr r3, [r3, #4] - 803faec: 61bb str r3, [r7, #24] + 803fb6c: 687b ldr r3, [r7, #4] + 803fb6e: 685b ldr r3, [r3, #4] + 803fb70: 61bb str r3, [r7, #24] ipr->p = iprh->next_pbuf; - 803faee: 697b ldr r3, [r7, #20] - 803faf0: 681a ldr r2, [r3, #0] - 803faf2: 687b ldr r3, [r7, #4] - 803faf4: 605a str r2, [r3, #4] + 803fb72: 697b ldr r3, [r7, #20] + 803fb74: 681a ldr r2, [r3, #0] + 803fb76: 687b ldr r3, [r7, #4] + 803fb78: 605a str r2, [r3, #4] /* Then, copy the original header into it. */ SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN); - 803faf6: 69bb ldr r3, [r7, #24] - 803faf8: 6858 ldr r0, [r3, #4] - 803fafa: 687b ldr r3, [r7, #4] - 803fafc: 3308 adds r3, #8 - 803fafe: 2214 movs r2, #20 - 803fb00: 4619 mov r1, r3 - 803fb02: f000 fef5 bl 80408f0 + 803fb7a: 69bb ldr r3, [r7, #24] + 803fb7c: 6858 ldr r0, [r3, #4] + 803fb7e: 687b ldr r3, [r7, #4] + 803fb80: 3308 adds r3, #8 + 803fb82: 2214 movs r2, #20 + 803fb84: 4619 mov r1, r3 + 803fb86: f000 fef5 bl 8040974 icmp_time_exceeded(p, ICMP_TE_FRAG); - 803fb06: 2101 movs r1, #1 - 803fb08: 69b8 ldr r0, [r7, #24] - 803fb0a: f7ff fc3d bl 803f388 + 803fb8a: 2101 movs r1, #1 + 803fb8c: 69b8 ldr r0, [r7, #24] + 803fb8e: f7ff fc3d bl 803f40c clen = pbuf_clen(p); - 803fb0e: 69b8 ldr r0, [r7, #24] - 803fb10: f7f7 fe9c bl 803784c - 803fb14: 4603 mov r3, r0 - 803fb16: 827b strh r3, [r7, #18] + 803fb92: 69b8 ldr r0, [r7, #24] + 803fb94: f7f7 fe9c bl 80378d0 + 803fb98: 4603 mov r3, r0 + 803fb9a: 827b strh r3, [r7, #18] LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff); - 803fb18: 8bfa ldrh r2, [r7, #30] - 803fb1a: 8a7b ldrh r3, [r7, #18] - 803fb1c: 4413 add r3, r2 - 803fb1e: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803fb22: db05 blt.n 803fb30 - 803fb24: 4b27 ldr r3, [pc, #156] ; (803fbc4 ) - 803fb26: 22bc movs r2, #188 ; 0xbc - 803fb28: 492a ldr r1, [pc, #168] ; (803fbd4 ) - 803fb2a: 4828 ldr r0, [pc, #160] ; (803fbcc ) - 803fb2c: f000 fff0 bl 8040b10 + 803fb9c: 8bfa ldrh r2, [r7, #30] + 803fb9e: 8a7b ldrh r3, [r7, #18] + 803fba0: 4413 add r3, r2 + 803fba2: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 803fba6: db05 blt.n 803fbb4 + 803fba8: 4b27 ldr r3, [pc, #156] ; (803fc48 ) + 803fbaa: 22bc movs r2, #188 ; 0xbc + 803fbac: 492a ldr r1, [pc, #168] ; (803fc58 ) + 803fbae: 4828 ldr r0, [pc, #160] ; (803fc50 ) + 803fbb0: f000 fff0 bl 8040b94 pbufs_freed = (u16_t)(pbufs_freed + clen); - 803fb30: 8bfa ldrh r2, [r7, #30] - 803fb32: 8a7b ldrh r3, [r7, #18] - 803fb34: 4413 add r3, r2 - 803fb36: 83fb strh r3, [r7, #30] + 803fbb4: 8bfa ldrh r2, [r7, #30] + 803fbb6: 8a7b ldrh r3, [r7, #18] + 803fbb8: 4413 add r3, r2 + 803fbba: 83fb strh r3, [r7, #30] pbuf_free(p); - 803fb38: 69b8 ldr r0, [r7, #24] - 803fb3a: f7f7 fdff bl 803773c + 803fbbc: 69b8 ldr r0, [r7, #24] + 803fbbe: f7f7 fdff bl 80377c0 } #endif /* LWIP_ICMP */ /* First, free all received pbufs. The individual pbufs need to be released separately as they have not yet been chained */ p = ipr->p; - 803fb3e: 687b ldr r3, [r7, #4] - 803fb40: 685b ldr r3, [r3, #4] - 803fb42: 61bb str r3, [r7, #24] + 803fbc2: 687b ldr r3, [r7, #4] + 803fbc4: 685b ldr r3, [r3, #4] + 803fbc6: 61bb str r3, [r7, #24] while (p != NULL) { - 803fb44: e01f b.n 803fb86 + 803fbc8: e01f b.n 803fc0a struct pbuf *pcur; iprh = (struct ip_reass_helper *)p->payload; - 803fb46: 69bb ldr r3, [r7, #24] - 803fb48: 685b ldr r3, [r3, #4] - 803fb4a: 617b str r3, [r7, #20] + 803fbca: 69bb ldr r3, [r7, #24] + 803fbcc: 685b ldr r3, [r3, #4] + 803fbce: 617b str r3, [r7, #20] pcur = p; - 803fb4c: 69bb ldr r3, [r7, #24] - 803fb4e: 60fb str r3, [r7, #12] + 803fbd0: 69bb ldr r3, [r7, #24] + 803fbd2: 60fb str r3, [r7, #12] /* get the next pointer before freeing */ p = iprh->next_pbuf; - 803fb50: 697b ldr r3, [r7, #20] - 803fb52: 681b ldr r3, [r3, #0] - 803fb54: 61bb str r3, [r7, #24] + 803fbd4: 697b ldr r3, [r7, #20] + 803fbd6: 681b ldr r3, [r3, #0] + 803fbd8: 61bb str r3, [r7, #24] clen = pbuf_clen(pcur); - 803fb56: 68f8 ldr r0, [r7, #12] - 803fb58: f7f7 fe78 bl 803784c - 803fb5c: 4603 mov r3, r0 - 803fb5e: 827b strh r3, [r7, #18] + 803fbda: 68f8 ldr r0, [r7, #12] + 803fbdc: f7f7 fe78 bl 80378d0 + 803fbe0: 4603 mov r3, r0 + 803fbe2: 827b strh r3, [r7, #18] LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff); - 803fb60: 8bfa ldrh r2, [r7, #30] - 803fb62: 8a7b ldrh r3, [r7, #18] - 803fb64: 4413 add r3, r2 - 803fb66: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 - 803fb6a: db05 blt.n 803fb78 - 803fb6c: 4b15 ldr r3, [pc, #84] ; (803fbc4 ) - 803fb6e: 22cc movs r2, #204 ; 0xcc - 803fb70: 4918 ldr r1, [pc, #96] ; (803fbd4 ) - 803fb72: 4816 ldr r0, [pc, #88] ; (803fbcc ) - 803fb74: f000 ffcc bl 8040b10 + 803fbe4: 8bfa ldrh r2, [r7, #30] + 803fbe6: 8a7b ldrh r3, [r7, #18] + 803fbe8: 4413 add r3, r2 + 803fbea: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 + 803fbee: db05 blt.n 803fbfc + 803fbf0: 4b15 ldr r3, [pc, #84] ; (803fc48 ) + 803fbf2: 22cc movs r2, #204 ; 0xcc + 803fbf4: 4918 ldr r1, [pc, #96] ; (803fc58 ) + 803fbf6: 4816 ldr r0, [pc, #88] ; (803fc50 ) + 803fbf8: f000 ffcc bl 8040b94 pbufs_freed = (u16_t)(pbufs_freed + clen); - 803fb78: 8bfa ldrh r2, [r7, #30] - 803fb7a: 8a7b ldrh r3, [r7, #18] - 803fb7c: 4413 add r3, r2 - 803fb7e: 83fb strh r3, [r7, #30] + 803fbfc: 8bfa ldrh r2, [r7, #30] + 803fbfe: 8a7b ldrh r3, [r7, #18] + 803fc00: 4413 add r3, r2 + 803fc02: 83fb strh r3, [r7, #30] pbuf_free(pcur); - 803fb80: 68f8 ldr r0, [r7, #12] - 803fb82: f7f7 fddb bl 803773c + 803fc04: 68f8 ldr r0, [r7, #12] + 803fc06: f7f7 fddb bl 80377c0 while (p != NULL) { - 803fb86: 69bb ldr r3, [r7, #24] - 803fb88: 2b00 cmp r3, #0 - 803fb8a: d1dc bne.n 803fb46 + 803fc0a: 69bb ldr r3, [r7, #24] + 803fc0c: 2b00 cmp r3, #0 + 803fc0e: d1dc bne.n 803fbca } /* Then, unchain the struct ip_reassdata from the list and free it. */ ip_reass_dequeue_datagram(ipr, prev); - 803fb8c: 6839 ldr r1, [r7, #0] - 803fb8e: 6878 ldr r0, [r7, #4] - 803fb90: f000 f8c2 bl 803fd18 + 803fc10: 6839 ldr r1, [r7, #0] + 803fc12: 6878 ldr r0, [r7, #4] + 803fc14: f000 f8c2 bl 803fd9c LWIP_ASSERT("ip_reass_pbufcount >= pbufs_freed", ip_reass_pbufcount >= pbufs_freed); - 803fb94: 4b10 ldr r3, [pc, #64] ; (803fbd8 ) - 803fb96: 881b ldrh r3, [r3, #0] - 803fb98: 8bfa ldrh r2, [r7, #30] - 803fb9a: 429a cmp r2, r3 - 803fb9c: d905 bls.n 803fbaa - 803fb9e: 4b09 ldr r3, [pc, #36] ; (803fbc4 ) - 803fba0: 22d2 movs r2, #210 ; 0xd2 - 803fba2: 490e ldr r1, [pc, #56] ; (803fbdc ) - 803fba4: 4809 ldr r0, [pc, #36] ; (803fbcc ) - 803fba6: f000 ffb3 bl 8040b10 + 803fc18: 4b10 ldr r3, [pc, #64] ; (803fc5c ) + 803fc1a: 881b ldrh r3, [r3, #0] + 803fc1c: 8bfa ldrh r2, [r7, #30] + 803fc1e: 429a cmp r2, r3 + 803fc20: d905 bls.n 803fc2e + 803fc22: 4b09 ldr r3, [pc, #36] ; (803fc48 ) + 803fc24: 22d2 movs r2, #210 ; 0xd2 + 803fc26: 490e ldr r1, [pc, #56] ; (803fc60 ) + 803fc28: 4809 ldr r0, [pc, #36] ; (803fc50 ) + 803fc2a: f000 ffb3 bl 8040b94 ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - pbufs_freed); - 803fbaa: 4b0b ldr r3, [pc, #44] ; (803fbd8 ) - 803fbac: 881a ldrh r2, [r3, #0] - 803fbae: 8bfb ldrh r3, [r7, #30] - 803fbb0: 1ad3 subs r3, r2, r3 - 803fbb2: b29a uxth r2, r3 - 803fbb4: 4b08 ldr r3, [pc, #32] ; (803fbd8 ) - 803fbb6: 801a strh r2, [r3, #0] + 803fc2e: 4b0b ldr r3, [pc, #44] ; (803fc5c ) + 803fc30: 881a ldrh r2, [r3, #0] + 803fc32: 8bfb ldrh r3, [r7, #30] + 803fc34: 1ad3 subs r3, r2, r3 + 803fc36: b29a uxth r2, r3 + 803fc38: 4b08 ldr r3, [pc, #32] ; (803fc5c ) + 803fc3a: 801a strh r2, [r3, #0] return pbufs_freed; - 803fbb8: 8bfb ldrh r3, [r7, #30] -} - 803fbba: 4618 mov r0, r3 - 803fbbc: 3720 adds r7, #32 - 803fbbe: 46bd mov sp, r7 - 803fbc0: bd80 pop {r7, pc} - 803fbc2: bf00 nop - 803fbc4: 080449f0 .word 0x080449f0 - 803fbc8: 08044a2c .word 0x08044a2c - 803fbcc: 08044a38 .word 0x08044a38 - 803fbd0: 08044a60 .word 0x08044a60 - 803fbd4: 08044a74 .word 0x08044a74 - 803fbd8: 2400eab0 .word 0x2400eab0 - 803fbdc: 08044a94 .word 0x08044a94 - -0803fbe0 : + 803fc3c: 8bfb ldrh r3, [r7, #30] +} + 803fc3e: 4618 mov r0, r3 + 803fc40: 3720 adds r7, #32 + 803fc42: 46bd mov sp, r7 + 803fc44: bd80 pop {r7, pc} + 803fc46: bf00 nop + 803fc48: 08044a70 .word 0x08044a70 + 803fc4c: 08044aac .word 0x08044aac + 803fc50: 08044ab8 .word 0x08044ab8 + 803fc54: 08044ae0 .word 0x08044ae0 + 803fc58: 08044af4 .word 0x08044af4 + 803fc5c: 2400eab8 .word 0x2400eab8 + 803fc60: 08044b14 .word 0x08044b14 + +0803fc64 : * (used for freeing other datagrams if not enough space) * @return the number of pbufs freed */ static int ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed) { - 803fbe0: b580 push {r7, lr} - 803fbe2: b08a sub sp, #40 ; 0x28 - 803fbe4: af00 add r7, sp, #0 - 803fbe6: 6078 str r0, [r7, #4] - 803fbe8: 6039 str r1, [r7, #0] + 803fc64: b580 push {r7, lr} + 803fc66: b08a sub sp, #40 ; 0x28 + 803fc68: af00 add r7, sp, #0 + 803fc6a: 6078 str r0, [r7, #4] + 803fc6c: 6039 str r1, [r7, #0] /* @todo Can't we simply remove the last datagram in the * linked list behind reassdatagrams? */ struct ip_reassdata *r, *oldest, *prev, *oldest_prev; int pbufs_freed = 0, pbufs_freed_current; - 803fbea: 2300 movs r3, #0 - 803fbec: 617b str r3, [r7, #20] + 803fc6e: 2300 movs r3, #0 + 803fc70: 617b str r3, [r7, #20] int other_datagrams; /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs, * but don't free the datagram that 'fraghdr' belongs to! */ do { oldest = NULL; - 803fbee: 2300 movs r3, #0 - 803fbf0: 623b str r3, [r7, #32] + 803fc72: 2300 movs r3, #0 + 803fc74: 623b str r3, [r7, #32] prev = NULL; - 803fbf2: 2300 movs r3, #0 - 803fbf4: 61fb str r3, [r7, #28] + 803fc76: 2300 movs r3, #0 + 803fc78: 61fb str r3, [r7, #28] oldest_prev = NULL; - 803fbf6: 2300 movs r3, #0 - 803fbf8: 61bb str r3, [r7, #24] + 803fc7a: 2300 movs r3, #0 + 803fc7c: 61bb str r3, [r7, #24] other_datagrams = 0; - 803fbfa: 2300 movs r3, #0 - 803fbfc: 613b str r3, [r7, #16] + 803fc7e: 2300 movs r3, #0 + 803fc80: 613b str r3, [r7, #16] r = reassdatagrams; - 803fbfe: 4b28 ldr r3, [pc, #160] ; (803fca0 ) - 803fc00: 681b ldr r3, [r3, #0] - 803fc02: 627b str r3, [r7, #36] ; 0x24 + 803fc82: 4b28 ldr r3, [pc, #160] ; (803fd24 ) + 803fc84: 681b ldr r3, [r3, #0] + 803fc86: 627b str r3, [r7, #36] ; 0x24 while (r != NULL) { - 803fc04: e030 b.n 803fc68 + 803fc88: e030 b.n 803fcec if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) { - 803fc06: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc08: 695a ldr r2, [r3, #20] - 803fc0a: 687b ldr r3, [r7, #4] - 803fc0c: 68db ldr r3, [r3, #12] - 803fc0e: 429a cmp r2, r3 - 803fc10: d10c bne.n 803fc2c - 803fc12: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc14: 699a ldr r2, [r3, #24] - 803fc16: 687b ldr r3, [r7, #4] - 803fc18: 691b ldr r3, [r3, #16] - 803fc1a: 429a cmp r2, r3 - 803fc1c: d106 bne.n 803fc2c - 803fc1e: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc20: 899a ldrh r2, [r3, #12] - 803fc22: 687b ldr r3, [r7, #4] - 803fc24: 889b ldrh r3, [r3, #4] - 803fc26: b29b uxth r3, r3 - 803fc28: 429a cmp r2, r3 - 803fc2a: d014 beq.n 803fc56 + 803fc8a: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc8c: 695a ldr r2, [r3, #20] + 803fc8e: 687b ldr r3, [r7, #4] + 803fc90: 68db ldr r3, [r3, #12] + 803fc92: 429a cmp r2, r3 + 803fc94: d10c bne.n 803fcb0 + 803fc96: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fc98: 699a ldr r2, [r3, #24] + 803fc9a: 687b ldr r3, [r7, #4] + 803fc9c: 691b ldr r3, [r3, #16] + 803fc9e: 429a cmp r2, r3 + 803fca0: d106 bne.n 803fcb0 + 803fca2: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fca4: 899a ldrh r2, [r3, #12] + 803fca6: 687b ldr r3, [r7, #4] + 803fca8: 889b ldrh r3, [r3, #4] + 803fcaa: b29b uxth r3, r3 + 803fcac: 429a cmp r2, r3 + 803fcae: d014 beq.n 803fcda /* Not the same datagram as fraghdr */ other_datagrams++; - 803fc2c: 693b ldr r3, [r7, #16] - 803fc2e: 3301 adds r3, #1 - 803fc30: 613b str r3, [r7, #16] + 803fcb0: 693b ldr r3, [r7, #16] + 803fcb2: 3301 adds r3, #1 + 803fcb4: 613b str r3, [r7, #16] if (oldest == NULL) { - 803fc32: 6a3b ldr r3, [r7, #32] - 803fc34: 2b00 cmp r3, #0 - 803fc36: d104 bne.n 803fc42 + 803fcb6: 6a3b ldr r3, [r7, #32] + 803fcb8: 2b00 cmp r3, #0 + 803fcba: d104 bne.n 803fcc6 oldest = r; - 803fc38: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc3a: 623b str r3, [r7, #32] + 803fcbc: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fcbe: 623b str r3, [r7, #32] oldest_prev = prev; - 803fc3c: 69fb ldr r3, [r7, #28] - 803fc3e: 61bb str r3, [r7, #24] - 803fc40: e009 b.n 803fc56 + 803fcc0: 69fb ldr r3, [r7, #28] + 803fcc2: 61bb str r3, [r7, #24] + 803fcc4: e009 b.n 803fcda } else if (r->timer <= oldest->timer) { - 803fc42: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc44: 7fda ldrb r2, [r3, #31] - 803fc46: 6a3b ldr r3, [r7, #32] - 803fc48: 7fdb ldrb r3, [r3, #31] - 803fc4a: 429a cmp r2, r3 - 803fc4c: d803 bhi.n 803fc56 + 803fcc6: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fcc8: 7fda ldrb r2, [r3, #31] + 803fcca: 6a3b ldr r3, [r7, #32] + 803fccc: 7fdb ldrb r3, [r3, #31] + 803fcce: 429a cmp r2, r3 + 803fcd0: d803 bhi.n 803fcda /* older than the previous oldest */ oldest = r; - 803fc4e: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc50: 623b str r3, [r7, #32] + 803fcd2: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fcd4: 623b str r3, [r7, #32] oldest_prev = prev; - 803fc52: 69fb ldr r3, [r7, #28] - 803fc54: 61bb str r3, [r7, #24] + 803fcd6: 69fb ldr r3, [r7, #28] + 803fcd8: 61bb str r3, [r7, #24] } } if (r->next != NULL) { - 803fc56: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc58: 681b ldr r3, [r3, #0] - 803fc5a: 2b00 cmp r3, #0 - 803fc5c: d001 beq.n 803fc62 + 803fcda: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fcdc: 681b ldr r3, [r3, #0] + 803fcde: 2b00 cmp r3, #0 + 803fce0: d001 beq.n 803fce6 prev = r; - 803fc5e: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc60: 61fb str r3, [r7, #28] + 803fce2: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fce4: 61fb str r3, [r7, #28] } r = r->next; - 803fc62: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc64: 681b ldr r3, [r3, #0] - 803fc66: 627b str r3, [r7, #36] ; 0x24 + 803fce6: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fce8: 681b ldr r3, [r3, #0] + 803fcea: 627b str r3, [r7, #36] ; 0x24 while (r != NULL) { - 803fc68: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fc6a: 2b00 cmp r3, #0 - 803fc6c: d1cb bne.n 803fc06 + 803fcec: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fcee: 2b00 cmp r3, #0 + 803fcf0: d1cb bne.n 803fc8a } if (oldest != NULL) { - 803fc6e: 6a3b ldr r3, [r7, #32] - 803fc70: 2b00 cmp r3, #0 - 803fc72: d008 beq.n 803fc86 + 803fcf2: 6a3b ldr r3, [r7, #32] + 803fcf4: 2b00 cmp r3, #0 + 803fcf6: d008 beq.n 803fd0a pbufs_freed_current = ip_reass_free_complete_datagram(oldest, oldest_prev); - 803fc74: 69b9 ldr r1, [r7, #24] - 803fc76: 6a38 ldr r0, [r7, #32] - 803fc78: f7ff ff0e bl 803fa98 - 803fc7c: 60f8 str r0, [r7, #12] + 803fcf8: 69b9 ldr r1, [r7, #24] + 803fcfa: 6a38 ldr r0, [r7, #32] + 803fcfc: f7ff ff0e bl 803fb1c + 803fd00: 60f8 str r0, [r7, #12] pbufs_freed += pbufs_freed_current; - 803fc7e: 697a ldr r2, [r7, #20] - 803fc80: 68fb ldr r3, [r7, #12] - 803fc82: 4413 add r3, r2 - 803fc84: 617b str r3, [r7, #20] + 803fd02: 697a ldr r2, [r7, #20] + 803fd04: 68fb ldr r3, [r7, #12] + 803fd06: 4413 add r3, r2 + 803fd08: 617b str r3, [r7, #20] } } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1)); - 803fc86: 697a ldr r2, [r7, #20] - 803fc88: 683b ldr r3, [r7, #0] - 803fc8a: 429a cmp r2, r3 - 803fc8c: da02 bge.n 803fc94 - 803fc8e: 693b ldr r3, [r7, #16] - 803fc90: 2b01 cmp r3, #1 - 803fc92: dcac bgt.n 803fbee + 803fd0a: 697a ldr r2, [r7, #20] + 803fd0c: 683b ldr r3, [r7, #0] + 803fd0e: 429a cmp r2, r3 + 803fd10: da02 bge.n 803fd18 + 803fd12: 693b ldr r3, [r7, #16] + 803fd14: 2b01 cmp r3, #1 + 803fd16: dcac bgt.n 803fc72 return pbufs_freed; - 803fc94: 697b ldr r3, [r7, #20] + 803fd18: 697b ldr r3, [r7, #20] } - 803fc96: 4618 mov r0, r3 - 803fc98: 3728 adds r7, #40 ; 0x28 - 803fc9a: 46bd mov sp, r7 - 803fc9c: bd80 pop {r7, pc} - 803fc9e: bf00 nop - 803fca0: 2400eaac .word 0x2400eaac + 803fd1a: 4618 mov r0, r3 + 803fd1c: 3728 adds r7, #40 ; 0x28 + 803fd1e: 46bd mov sp, r7 + 803fd20: bd80 pop {r7, pc} + 803fd22: bf00 nop + 803fd24: 2400eab4 .word 0x2400eab4 -0803fca4 : +0803fd28 : * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space) * @return A pointer to the queue location into which the fragment was enqueued */ static struct ip_reassdata * ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen) { - 803fca4: b580 push {r7, lr} - 803fca6: b084 sub sp, #16 - 803fca8: af00 add r7, sp, #0 - 803fcaa: 6078 str r0, [r7, #4] - 803fcac: 6039 str r1, [r7, #0] + 803fd28: b580 push {r7, lr} + 803fd2a: b084 sub sp, #16 + 803fd2c: af00 add r7, sp, #0 + 803fd2e: 6078 str r0, [r7, #4] + 803fd30: 6039 str r1, [r7, #0] #if ! IP_REASS_FREE_OLDEST LWIP_UNUSED_ARG(clen); #endif /* No matching previous fragment found, allocate a new reassdata struct */ ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA); - 803fcae: 2004 movs r0, #4 - 803fcb0: f7f6 fe42 bl 8036938 - 803fcb4: 60f8 str r0, [r7, #12] + 803fd32: 2004 movs r0, #4 + 803fd34: f7f6 fe42 bl 80369bc + 803fd38: 60f8 str r0, [r7, #12] if (ipr == NULL) { - 803fcb6: 68fb ldr r3, [r7, #12] - 803fcb8: 2b00 cmp r3, #0 - 803fcba: d110 bne.n 803fcde + 803fd3a: 68fb ldr r3, [r7, #12] + 803fd3c: 2b00 cmp r3, #0 + 803fd3e: d110 bne.n 803fd62 #if IP_REASS_FREE_OLDEST if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) { - 803fcbc: 6839 ldr r1, [r7, #0] - 803fcbe: 6878 ldr r0, [r7, #4] - 803fcc0: f7ff ff8e bl 803fbe0 - 803fcc4: 4602 mov r2, r0 - 803fcc6: 683b ldr r3, [r7, #0] - 803fcc8: 4293 cmp r3, r2 - 803fcca: dc03 bgt.n 803fcd4 + 803fd40: 6839 ldr r1, [r7, #0] + 803fd42: 6878 ldr r0, [r7, #4] + 803fd44: f7ff ff8e bl 803fc64 + 803fd48: 4602 mov r2, r0 + 803fd4a: 683b ldr r3, [r7, #0] + 803fd4c: 4293 cmp r3, r2 + 803fd4e: dc03 bgt.n 803fd58 ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA); - 803fccc: 2004 movs r0, #4 - 803fcce: f7f6 fe33 bl 8036938 - 803fcd2: 60f8 str r0, [r7, #12] + 803fd50: 2004 movs r0, #4 + 803fd52: f7f6 fe33 bl 80369bc + 803fd56: 60f8 str r0, [r7, #12] } if (ipr == NULL) - 803fcd4: 68fb ldr r3, [r7, #12] - 803fcd6: 2b00 cmp r3, #0 - 803fcd8: d101 bne.n 803fcde + 803fd58: 68fb ldr r3, [r7, #12] + 803fd5a: 2b00 cmp r3, #0 + 803fd5c: d101 bne.n 803fd62 #endif /* IP_REASS_FREE_OLDEST */ { IPFRAG_STATS_INC(ip_frag.memerr); LWIP_DEBUGF(IP_REASS_DEBUG, ("Failed to alloc reassdata struct\n")); return NULL; - 803fcda: 2300 movs r3, #0 - 803fcdc: e016 b.n 803fd0c + 803fd5e: 2300 movs r3, #0 + 803fd60: e016 b.n 803fd90 } } memset(ipr, 0, sizeof(struct ip_reassdata)); - 803fcde: 2220 movs r2, #32 - 803fce0: 2100 movs r1, #0 - 803fce2: 68f8 ldr r0, [r7, #12] - 803fce4: f000 fe2c bl 8040940 + 803fd62: 2220 movs r2, #32 + 803fd64: 2100 movs r1, #0 + 803fd66: 68f8 ldr r0, [r7, #12] + 803fd68: f000 fe2c bl 80409c4 ipr->timer = IP_REASS_MAXAGE; - 803fce8: 68fb ldr r3, [r7, #12] - 803fcea: 220f movs r2, #15 - 803fcec: 77da strb r2, [r3, #31] + 803fd6c: 68fb ldr r3, [r7, #12] + 803fd6e: 220f movs r2, #15 + 803fd70: 77da strb r2, [r3, #31] /* enqueue the new structure to the front of the list */ ipr->next = reassdatagrams; - 803fcee: 4b09 ldr r3, [pc, #36] ; (803fd14 ) - 803fcf0: 681a ldr r2, [r3, #0] - 803fcf2: 68fb ldr r3, [r7, #12] - 803fcf4: 601a str r2, [r3, #0] + 803fd72: 4b09 ldr r3, [pc, #36] ; (803fd98 ) + 803fd74: 681a ldr r2, [r3, #0] + 803fd76: 68fb ldr r3, [r7, #12] + 803fd78: 601a str r2, [r3, #0] reassdatagrams = ipr; - 803fcf6: 4a07 ldr r2, [pc, #28] ; (803fd14 ) - 803fcf8: 68fb ldr r3, [r7, #12] - 803fcfa: 6013 str r3, [r2, #0] + 803fd7a: 4a07 ldr r2, [pc, #28] ; (803fd98 ) + 803fd7c: 68fb ldr r3, [r7, #12] + 803fd7e: 6013 str r3, [r2, #0] /* copy the ip header for later tests and input */ /* @todo: no ip options supported? */ SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN); - 803fcfc: 68fb ldr r3, [r7, #12] - 803fcfe: 3308 adds r3, #8 - 803fd00: 2214 movs r2, #20 - 803fd02: 6879 ldr r1, [r7, #4] - 803fd04: 4618 mov r0, r3 - 803fd06: f000 fdf3 bl 80408f0 + 803fd80: 68fb ldr r3, [r7, #12] + 803fd82: 3308 adds r3, #8 + 803fd84: 2214 movs r2, #20 + 803fd86: 6879 ldr r1, [r7, #4] + 803fd88: 4618 mov r0, r3 + 803fd8a: f000 fdf3 bl 8040974 return ipr; - 803fd0a: 68fb ldr r3, [r7, #12] + 803fd8e: 68fb ldr r3, [r7, #12] } - 803fd0c: 4618 mov r0, r3 - 803fd0e: 3710 adds r7, #16 - 803fd10: 46bd mov sp, r7 - 803fd12: bd80 pop {r7, pc} - 803fd14: 2400eaac .word 0x2400eaac + 803fd90: 4618 mov r0, r3 + 803fd92: 3710 adds r7, #16 + 803fd94: 46bd mov sp, r7 + 803fd96: bd80 pop {r7, pc} + 803fd98: 2400eab4 .word 0x2400eab4 -0803fd18 : +0803fd9c : * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs. * @param ipr points to the queue entry to dequeue */ static void ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) { - 803fd18: b580 push {r7, lr} - 803fd1a: b082 sub sp, #8 - 803fd1c: af00 add r7, sp, #0 - 803fd1e: 6078 str r0, [r7, #4] - 803fd20: 6039 str r1, [r7, #0] + 803fd9c: b580 push {r7, lr} + 803fd9e: b082 sub sp, #8 + 803fda0: af00 add r7, sp, #0 + 803fda2: 6078 str r0, [r7, #4] + 803fda4: 6039 str r1, [r7, #0] /* dequeue the reass struct */ if (reassdatagrams == ipr) { - 803fd22: 4b10 ldr r3, [pc, #64] ; (803fd64 ) - 803fd24: 681b ldr r3, [r3, #0] - 803fd26: 687a ldr r2, [r7, #4] - 803fd28: 429a cmp r2, r3 - 803fd2a: d104 bne.n 803fd36 + 803fda6: 4b10 ldr r3, [pc, #64] ; (803fde8 ) + 803fda8: 681b ldr r3, [r3, #0] + 803fdaa: 687a ldr r2, [r7, #4] + 803fdac: 429a cmp r2, r3 + 803fdae: d104 bne.n 803fdba /* it was the first in the list */ reassdatagrams = ipr->next; - 803fd2c: 687b ldr r3, [r7, #4] - 803fd2e: 681b ldr r3, [r3, #0] - 803fd30: 4a0c ldr r2, [pc, #48] ; (803fd64 ) - 803fd32: 6013 str r3, [r2, #0] - 803fd34: e00d b.n 803fd52 + 803fdb0: 687b ldr r3, [r7, #4] + 803fdb2: 681b ldr r3, [r3, #0] + 803fdb4: 4a0c ldr r2, [pc, #48] ; (803fde8 ) + 803fdb6: 6013 str r3, [r2, #0] + 803fdb8: e00d b.n 803fdd6 } else { /* it wasn't the first, so it must have a valid 'prev' */ LWIP_ASSERT("sanity check linked list", prev != NULL); - 803fd36: 683b ldr r3, [r7, #0] - 803fd38: 2b00 cmp r3, #0 - 803fd3a: d106 bne.n 803fd4a - 803fd3c: 4b0a ldr r3, [pc, #40] ; (803fd68 ) - 803fd3e: f240 1245 movw r2, #325 ; 0x145 - 803fd42: 490a ldr r1, [pc, #40] ; (803fd6c ) - 803fd44: 480a ldr r0, [pc, #40] ; (803fd70 ) - 803fd46: f000 fee3 bl 8040b10 + 803fdba: 683b ldr r3, [r7, #0] + 803fdbc: 2b00 cmp r3, #0 + 803fdbe: d106 bne.n 803fdce + 803fdc0: 4b0a ldr r3, [pc, #40] ; (803fdec ) + 803fdc2: f240 1245 movw r2, #325 ; 0x145 + 803fdc6: 490a ldr r1, [pc, #40] ; (803fdf0 ) + 803fdc8: 480a ldr r0, [pc, #40] ; (803fdf4 ) + 803fdca: f000 fee3 bl 8040b94 prev->next = ipr->next; - 803fd4a: 687b ldr r3, [r7, #4] - 803fd4c: 681a ldr r2, [r3, #0] - 803fd4e: 683b ldr r3, [r7, #0] - 803fd50: 601a str r2, [r3, #0] + 803fdce: 687b ldr r3, [r7, #4] + 803fdd0: 681a ldr r2, [r3, #0] + 803fdd2: 683b ldr r3, [r7, #0] + 803fdd4: 601a str r2, [r3, #0] } /* now we can free the ip_reassdata struct */ memp_free(MEMP_REASSDATA, ipr); - 803fd52: 6879 ldr r1, [r7, #4] - 803fd54: 2004 movs r0, #4 - 803fd56: f7f6 fe5f bl 8036a18 -} - 803fd5a: bf00 nop - 803fd5c: 3708 adds r7, #8 - 803fd5e: 46bd mov sp, r7 - 803fd60: bd80 pop {r7, pc} - 803fd62: bf00 nop - 803fd64: 2400eaac .word 0x2400eaac - 803fd68: 080449f0 .word 0x080449f0 - 803fd6c: 08044ab8 .word 0x08044ab8 - 803fd70: 08044a38 .word 0x08044a38 - -0803fd74 : + 803fdd6: 6879 ldr r1, [r7, #4] + 803fdd8: 2004 movs r0, #4 + 803fdda: f7f6 fe5f bl 8036a9c +} + 803fdde: bf00 nop + 803fde0: 3708 adds r7, #8 + 803fde2: 46bd mov sp, r7 + 803fde4: bd80 pop {r7, pc} + 803fde6: bf00 nop + 803fde8: 2400eab4 .word 0x2400eab4 + 803fdec: 08044a70 .word 0x08044a70 + 803fdf0: 08044b38 .word 0x08044b38 + 803fdf4: 08044ab8 .word 0x08044ab8 + +0803fdf8 : * @param is_last is 1 if this pbuf has MF==0 (ipr->flags not updated yet) * @return see IP_REASS_VALIDATE_* defines */ static int ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p, int is_last) { - 803fd74: b580 push {r7, lr} - 803fd76: b08c sub sp, #48 ; 0x30 - 803fd78: af00 add r7, sp, #0 - 803fd7a: 60f8 str r0, [r7, #12] - 803fd7c: 60b9 str r1, [r7, #8] - 803fd7e: 607a str r2, [r7, #4] + 803fdf8: b580 push {r7, lr} + 803fdfa: b08c sub sp, #48 ; 0x30 + 803fdfc: af00 add r7, sp, #0 + 803fdfe: 60f8 str r0, [r7, #12] + 803fe00: 60b9 str r1, [r7, #8] + 803fe02: 607a str r2, [r7, #4] struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev = NULL; - 803fd80: 2300 movs r3, #0 - 803fd82: 62bb str r3, [r7, #40] ; 0x28 + 803fe04: 2300 movs r3, #0 + 803fe06: 62bb str r3, [r7, #40] ; 0x28 struct pbuf *q; u16_t offset, len; u8_t hlen; struct ip_hdr *fraghdr; int valid = 1; - 803fd84: 2301 movs r3, #1 - 803fd86: 623b str r3, [r7, #32] + 803fe08: 2301 movs r3, #1 + 803fe0a: 623b str r3, [r7, #32] /* Extract length and fragment offset from current fragment */ fraghdr = (struct ip_hdr *)new_p->payload; - 803fd88: 68bb ldr r3, [r7, #8] - 803fd8a: 685b ldr r3, [r3, #4] - 803fd8c: 61fb str r3, [r7, #28] + 803fe0c: 68bb ldr r3, [r7, #8] + 803fe0e: 685b ldr r3, [r3, #4] + 803fe10: 61fb str r3, [r7, #28] len = lwip_ntohs(IPH_LEN(fraghdr)); - 803fd8e: 69fb ldr r3, [r7, #28] - 803fd90: 885b ldrh r3, [r3, #2] - 803fd92: b29b uxth r3, r3 - 803fd94: 4618 mov r0, r3 - 803fd96: f7f6 f89f bl 8035ed8 - 803fd9a: 4603 mov r3, r0 - 803fd9c: 837b strh r3, [r7, #26] + 803fe12: 69fb ldr r3, [r7, #28] + 803fe14: 885b ldrh r3, [r3, #2] + 803fe16: b29b uxth r3, r3 + 803fe18: 4618 mov r0, r3 + 803fe1a: f7f6 f89f bl 8035f5c + 803fe1e: 4603 mov r3, r0 + 803fe20: 837b strh r3, [r7, #26] hlen = IPH_HL_BYTES(fraghdr); - 803fd9e: 69fb ldr r3, [r7, #28] - 803fda0: 781b ldrb r3, [r3, #0] - 803fda2: f003 030f and.w r3, r3, #15 - 803fda6: b2db uxtb r3, r3 - 803fda8: 009b lsls r3, r3, #2 - 803fdaa: 767b strb r3, [r7, #25] + 803fe22: 69fb ldr r3, [r7, #28] + 803fe24: 781b ldrb r3, [r3, #0] + 803fe26: f003 030f and.w r3, r3, #15 + 803fe2a: b2db uxtb r3, r3 + 803fe2c: 009b lsls r3, r3, #2 + 803fe2e: 767b strb r3, [r7, #25] if (hlen > len) { - 803fdac: 7e7b ldrb r3, [r7, #25] - 803fdae: b29b uxth r3, r3 - 803fdb0: 8b7a ldrh r2, [r7, #26] - 803fdb2: 429a cmp r2, r3 - 803fdb4: d202 bcs.n 803fdbc + 803fe30: 7e7b ldrb r3, [r7, #25] + 803fe32: b29b uxth r3, r3 + 803fe34: 8b7a ldrh r2, [r7, #26] + 803fe36: 429a cmp r2, r3 + 803fe38: d202 bcs.n 803fe40 /* invalid datagram */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fdb6: f04f 33ff mov.w r3, #4294967295 - 803fdba: e135 b.n 8040028 + 803fe3a: f04f 33ff mov.w r3, #4294967295 + 803fe3e: e135 b.n 80400ac } len = (u16_t)(len - hlen); - 803fdbc: 7e7b ldrb r3, [r7, #25] - 803fdbe: b29b uxth r3, r3 - 803fdc0: 8b7a ldrh r2, [r7, #26] - 803fdc2: 1ad3 subs r3, r2, r3 - 803fdc4: 837b strh r3, [r7, #26] + 803fe40: 7e7b ldrb r3, [r7, #25] + 803fe42: b29b uxth r3, r3 + 803fe44: 8b7a ldrh r2, [r7, #26] + 803fe46: 1ad3 subs r3, r2, r3 + 803fe48: 837b strh r3, [r7, #26] offset = IPH_OFFSET_BYTES(fraghdr); - 803fdc6: 69fb ldr r3, [r7, #28] - 803fdc8: 88db ldrh r3, [r3, #6] - 803fdca: b29b uxth r3, r3 - 803fdcc: 4618 mov r0, r3 - 803fdce: f7f6 f883 bl 8035ed8 - 803fdd2: 4603 mov r3, r0 - 803fdd4: f3c3 030c ubfx r3, r3, #0, #13 - 803fdd8: b29b uxth r3, r3 - 803fdda: 00db lsls r3, r3, #3 - 803fddc: 82fb strh r3, [r7, #22] + 803fe4a: 69fb ldr r3, [r7, #28] + 803fe4c: 88db ldrh r3, [r3, #6] + 803fe4e: b29b uxth r3, r3 + 803fe50: 4618 mov r0, r3 + 803fe52: f7f6 f883 bl 8035f5c + 803fe56: 4603 mov r3, r0 + 803fe58: f3c3 030c ubfx r3, r3, #0, #13 + 803fe5c: b29b uxth r3, r3 + 803fe5e: 00db lsls r3, r3, #3 + 803fe60: 82fb strh r3, [r7, #22] /* overwrite the fragment's ip header from the pbuf with our helper struct, * and setup the embedded helper structure. */ /* make sure the struct ip_reass_helper fits into the IP header */ LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN", sizeof(struct ip_reass_helper) <= IP_HLEN); iprh = (struct ip_reass_helper *)new_p->payload; - 803fdde: 68bb ldr r3, [r7, #8] - 803fde0: 685b ldr r3, [r3, #4] - 803fde2: 62fb str r3, [r7, #44] ; 0x2c + 803fe62: 68bb ldr r3, [r7, #8] + 803fe64: 685b ldr r3, [r3, #4] + 803fe66: 62fb str r3, [r7, #44] ; 0x2c iprh->next_pbuf = NULL; - 803fde4: 6afb ldr r3, [r7, #44] ; 0x2c - 803fde6: 2200 movs r2, #0 - 803fde8: 701a strb r2, [r3, #0] - 803fdea: 2200 movs r2, #0 - 803fdec: 705a strb r2, [r3, #1] - 803fdee: 2200 movs r2, #0 - 803fdf0: 709a strb r2, [r3, #2] - 803fdf2: 2200 movs r2, #0 - 803fdf4: 70da strb r2, [r3, #3] + 803fe68: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe6a: 2200 movs r2, #0 + 803fe6c: 701a strb r2, [r3, #0] + 803fe6e: 2200 movs r2, #0 + 803fe70: 705a strb r2, [r3, #1] + 803fe72: 2200 movs r2, #0 + 803fe74: 709a strb r2, [r3, #2] + 803fe76: 2200 movs r2, #0 + 803fe78: 70da strb r2, [r3, #3] iprh->start = offset; - 803fdf6: 6afb ldr r3, [r7, #44] ; 0x2c - 803fdf8: 8afa ldrh r2, [r7, #22] - 803fdfa: 809a strh r2, [r3, #4] + 803fe7a: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe7c: 8afa ldrh r2, [r7, #22] + 803fe7e: 809a strh r2, [r3, #4] iprh->end = (u16_t)(offset + len); - 803fdfc: 8afa ldrh r2, [r7, #22] - 803fdfe: 8b7b ldrh r3, [r7, #26] - 803fe00: 4413 add r3, r2 - 803fe02: b29a uxth r2, r3 - 803fe04: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe06: 80da strh r2, [r3, #6] + 803fe80: 8afa ldrh r2, [r7, #22] + 803fe82: 8b7b ldrh r3, [r7, #26] + 803fe84: 4413 add r3, r2 + 803fe86: b29a uxth r2, r3 + 803fe88: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe8a: 80da strh r2, [r3, #6] if (iprh->end < offset) { - 803fe08: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe0a: 88db ldrh r3, [r3, #6] - 803fe0c: b29b uxth r3, r3 - 803fe0e: 8afa ldrh r2, [r7, #22] - 803fe10: 429a cmp r2, r3 - 803fe12: d902 bls.n 803fe1a + 803fe8c: 6afb ldr r3, [r7, #44] ; 0x2c + 803fe8e: 88db ldrh r3, [r3, #6] + 803fe90: b29b uxth r3, r3 + 803fe92: 8afa ldrh r2, [r7, #22] + 803fe94: 429a cmp r2, r3 + 803fe96: d902 bls.n 803fe9e /* u16_t overflow, cannot handle this */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fe14: f04f 33ff mov.w r3, #4294967295 - 803fe18: e106 b.n 8040028 + 803fe98: f04f 33ff mov.w r3, #4294967295 + 803fe9c: e106 b.n 80400ac } /* Iterate through until we either get to the end of the list (append), * or we find one with a larger offset (insert). */ for (q = ipr->p; q != NULL;) { - 803fe1a: 68fb ldr r3, [r7, #12] - 803fe1c: 685b ldr r3, [r3, #4] - 803fe1e: 627b str r3, [r7, #36] ; 0x24 - 803fe20: e068 b.n 803fef4 + 803fe9e: 68fb ldr r3, [r7, #12] + 803fea0: 685b ldr r3, [r3, #4] + 803fea2: 627b str r3, [r7, #36] ; 0x24 + 803fea4: e068 b.n 803ff78 iprh_tmp = (struct ip_reass_helper *)q->payload; - 803fe22: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fe24: 685b ldr r3, [r3, #4] - 803fe26: 613b str r3, [r7, #16] + 803fea6: 6a7b ldr r3, [r7, #36] ; 0x24 + 803fea8: 685b ldr r3, [r3, #4] + 803feaa: 613b str r3, [r7, #16] if (iprh->start < iprh_tmp->start) { - 803fe28: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe2a: 889b ldrh r3, [r3, #4] - 803fe2c: b29a uxth r2, r3 - 803fe2e: 693b ldr r3, [r7, #16] - 803fe30: 889b ldrh r3, [r3, #4] - 803fe32: b29b uxth r3, r3 - 803fe34: 429a cmp r2, r3 - 803fe36: d235 bcs.n 803fea4 + 803feac: 6afb ldr r3, [r7, #44] ; 0x2c + 803feae: 889b ldrh r3, [r3, #4] + 803feb0: b29a uxth r2, r3 + 803feb2: 693b ldr r3, [r7, #16] + 803feb4: 889b ldrh r3, [r3, #4] + 803feb6: b29b uxth r3, r3 + 803feb8: 429a cmp r2, r3 + 803feba: d235 bcs.n 803ff28 /* the new pbuf should be inserted before this */ iprh->next_pbuf = q; - 803fe38: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe3a: 6a7a ldr r2, [r7, #36] ; 0x24 - 803fe3c: 601a str r2, [r3, #0] + 803febc: 6afb ldr r3, [r7, #44] ; 0x2c + 803febe: 6a7a ldr r2, [r7, #36] ; 0x24 + 803fec0: 601a str r2, [r3, #0] if (iprh_prev != NULL) { - 803fe3e: 6abb ldr r3, [r7, #40] ; 0x28 - 803fe40: 2b00 cmp r3, #0 - 803fe42: d020 beq.n 803fe86 + 803fec2: 6abb ldr r3, [r7, #40] ; 0x28 + 803fec4: 2b00 cmp r3, #0 + 803fec6: d020 beq.n 803ff0a /* not the fragment with the lowest offset */ #if IP_REASS_CHECK_OVERLAP if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) { - 803fe44: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe46: 889b ldrh r3, [r3, #4] - 803fe48: b29a uxth r2, r3 - 803fe4a: 6abb ldr r3, [r7, #40] ; 0x28 - 803fe4c: 88db ldrh r3, [r3, #6] - 803fe4e: b29b uxth r3, r3 - 803fe50: 429a cmp r2, r3 - 803fe52: d307 bcc.n 803fe64 - 803fe54: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe56: 88db ldrh r3, [r3, #6] - 803fe58: b29a uxth r2, r3 - 803fe5a: 693b ldr r3, [r7, #16] - 803fe5c: 889b ldrh r3, [r3, #4] - 803fe5e: b29b uxth r3, r3 - 803fe60: 429a cmp r2, r3 - 803fe62: d902 bls.n 803fe6a + 803fec8: 6afb ldr r3, [r7, #44] ; 0x2c + 803feca: 889b ldrh r3, [r3, #4] + 803fecc: b29a uxth r2, r3 + 803fece: 6abb ldr r3, [r7, #40] ; 0x28 + 803fed0: 88db ldrh r3, [r3, #6] + 803fed2: b29b uxth r3, r3 + 803fed4: 429a cmp r2, r3 + 803fed6: d307 bcc.n 803fee8 + 803fed8: 6afb ldr r3, [r7, #44] ; 0x2c + 803feda: 88db ldrh r3, [r3, #6] + 803fedc: b29a uxth r2, r3 + 803fede: 693b ldr r3, [r7, #16] + 803fee0: 889b ldrh r3, [r3, #4] + 803fee2: b29b uxth r3, r3 + 803fee4: 429a cmp r2, r3 + 803fee6: d902 bls.n 803feee /* fragment overlaps with previous or following, throw away */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fe64: f04f 33ff mov.w r3, #4294967295 - 803fe68: e0de b.n 8040028 + 803fee8: f04f 33ff mov.w r3, #4294967295 + 803feec: e0de b.n 80400ac } #endif /* IP_REASS_CHECK_OVERLAP */ iprh_prev->next_pbuf = new_p; - 803fe6a: 6abb ldr r3, [r7, #40] ; 0x28 - 803fe6c: 68ba ldr r2, [r7, #8] - 803fe6e: 601a str r2, [r3, #0] + 803feee: 6abb ldr r3, [r7, #40] ; 0x28 + 803fef0: 68ba ldr r2, [r7, #8] + 803fef2: 601a str r2, [r3, #0] if (iprh_prev->end != iprh->start) { - 803fe70: 6abb ldr r3, [r7, #40] ; 0x28 - 803fe72: 88db ldrh r3, [r3, #6] - 803fe74: b29a uxth r2, r3 - 803fe76: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe78: 889b ldrh r3, [r3, #4] - 803fe7a: b29b uxth r3, r3 - 803fe7c: 429a cmp r2, r3 - 803fe7e: d03d beq.n 803fefc + 803fef4: 6abb ldr r3, [r7, #40] ; 0x28 + 803fef6: 88db ldrh r3, [r3, #6] + 803fef8: b29a uxth r2, r3 + 803fefa: 6afb ldr r3, [r7, #44] ; 0x2c + 803fefc: 889b ldrh r3, [r3, #4] + 803fefe: b29b uxth r3, r3 + 803ff00: 429a cmp r2, r3 + 803ff02: d03d beq.n 803ff80 /* There is a fragment missing between the current * and the previous fragment */ valid = 0; - 803fe80: 2300 movs r3, #0 - 803fe82: 623b str r3, [r7, #32] + 803ff04: 2300 movs r3, #0 + 803ff06: 623b str r3, [r7, #32] } #endif /* IP_REASS_CHECK_OVERLAP */ /* fragment with the lowest offset */ ipr->p = new_p; } break; - 803fe84: e03a b.n 803fefc + 803ff08: e03a b.n 803ff80 if (iprh->end > iprh_tmp->start) { - 803fe86: 6afb ldr r3, [r7, #44] ; 0x2c - 803fe88: 88db ldrh r3, [r3, #6] - 803fe8a: b29a uxth r2, r3 - 803fe8c: 693b ldr r3, [r7, #16] - 803fe8e: 889b ldrh r3, [r3, #4] - 803fe90: b29b uxth r3, r3 - 803fe92: 429a cmp r2, r3 - 803fe94: d902 bls.n 803fe9c + 803ff0a: 6afb ldr r3, [r7, #44] ; 0x2c + 803ff0c: 88db ldrh r3, [r3, #6] + 803ff0e: b29a uxth r2, r3 + 803ff10: 693b ldr r3, [r7, #16] + 803ff12: 889b ldrh r3, [r3, #4] + 803ff14: b29b uxth r3, r3 + 803ff16: 429a cmp r2, r3 + 803ff18: d902 bls.n 803ff20 return IP_REASS_VALIDATE_PBUF_DROPPED; - 803fe96: f04f 33ff mov.w r3, #4294967295 - 803fe9a: e0c5 b.n 8040028 + 803ff1a: f04f 33ff mov.w r3, #4294967295 + 803ff1e: e0c5 b.n 80400ac ipr->p = new_p; - 803fe9c: 68fb ldr r3, [r7, #12] - 803fe9e: 68ba ldr r2, [r7, #8] - 803fea0: 605a str r2, [r3, #4] + 803ff20: 68fb ldr r3, [r7, #12] + 803ff22: 68ba ldr r2, [r7, #8] + 803ff24: 605a str r2, [r3, #4] break; - 803fea2: e02b b.n 803fefc + 803ff26: e02b b.n 803ff80 } else if (iprh->start == iprh_tmp->start) { - 803fea4: 6afb ldr r3, [r7, #44] ; 0x2c - 803fea6: 889b ldrh r3, [r3, #4] - 803fea8: b29a uxth r2, r3 - 803feaa: 693b ldr r3, [r7, #16] - 803feac: 889b ldrh r3, [r3, #4] - 803feae: b29b uxth r3, r3 - 803feb0: 429a cmp r2, r3 - 803feb2: d102 bne.n 803feba + 803ff28: 6afb ldr r3, [r7, #44] ; 0x2c + 803ff2a: 889b ldrh r3, [r3, #4] + 803ff2c: b29a uxth r2, r3 + 803ff2e: 693b ldr r3, [r7, #16] + 803ff30: 889b ldrh r3, [r3, #4] + 803ff32: b29b uxth r3, r3 + 803ff34: 429a cmp r2, r3 + 803ff36: d102 bne.n 803ff3e /* received the same datagram twice: no need to keep the datagram */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803feb4: f04f 33ff mov.w r3, #4294967295 - 803feb8: e0b6 b.n 8040028 + 803ff38: f04f 33ff mov.w r3, #4294967295 + 803ff3c: e0b6 b.n 80400ac #if IP_REASS_CHECK_OVERLAP } else if (iprh->start < iprh_tmp->end) { - 803feba: 6afb ldr r3, [r7, #44] ; 0x2c - 803febc: 889b ldrh r3, [r3, #4] - 803febe: b29a uxth r2, r3 - 803fec0: 693b ldr r3, [r7, #16] - 803fec2: 88db ldrh r3, [r3, #6] - 803fec4: b29b uxth r3, r3 - 803fec6: 429a cmp r2, r3 - 803fec8: d202 bcs.n 803fed0 + 803ff3e: 6afb ldr r3, [r7, #44] ; 0x2c + 803ff40: 889b ldrh r3, [r3, #4] + 803ff42: b29a uxth r2, r3 + 803ff44: 693b ldr r3, [r7, #16] + 803ff46: 88db ldrh r3, [r3, #6] + 803ff48: b29b uxth r3, r3 + 803ff4a: 429a cmp r2, r3 + 803ff4c: d202 bcs.n 803ff54 /* overlap: no need to keep the new datagram */ return IP_REASS_VALIDATE_PBUF_DROPPED; - 803feca: f04f 33ff mov.w r3, #4294967295 - 803fece: e0ab b.n 8040028 + 803ff4e: f04f 33ff mov.w r3, #4294967295 + 803ff52: e0ab b.n 80400ac #endif /* IP_REASS_CHECK_OVERLAP */ } else { /* Check if the fragments received so far have no holes. */ if (iprh_prev != NULL) { - 803fed0: 6abb ldr r3, [r7, #40] ; 0x28 - 803fed2: 2b00 cmp r3, #0 - 803fed4: d009 beq.n 803feea + 803ff54: 6abb ldr r3, [r7, #40] ; 0x28 + 803ff56: 2b00 cmp r3, #0 + 803ff58: d009 beq.n 803ff6e if (iprh_prev->end != iprh_tmp->start) { - 803fed6: 6abb ldr r3, [r7, #40] ; 0x28 - 803fed8: 88db ldrh r3, [r3, #6] - 803feda: b29a uxth r2, r3 - 803fedc: 693b ldr r3, [r7, #16] - 803fede: 889b ldrh r3, [r3, #4] - 803fee0: b29b uxth r3, r3 - 803fee2: 429a cmp r2, r3 - 803fee4: d001 beq.n 803feea + 803ff5a: 6abb ldr r3, [r7, #40] ; 0x28 + 803ff5c: 88db ldrh r3, [r3, #6] + 803ff5e: b29a uxth r2, r3 + 803ff60: 693b ldr r3, [r7, #16] + 803ff62: 889b ldrh r3, [r3, #4] + 803ff64: b29b uxth r3, r3 + 803ff66: 429a cmp r2, r3 + 803ff68: d001 beq.n 803ff6e /* There is a fragment missing between the current * and the previous fragment */ valid = 0; - 803fee6: 2300 movs r3, #0 - 803fee8: 623b str r3, [r7, #32] + 803ff6a: 2300 movs r3, #0 + 803ff6c: 623b str r3, [r7, #32] } } } q = iprh_tmp->next_pbuf; - 803feea: 693b ldr r3, [r7, #16] - 803feec: 681b ldr r3, [r3, #0] - 803feee: 627b str r3, [r7, #36] ; 0x24 + 803ff6e: 693b ldr r3, [r7, #16] + 803ff70: 681b ldr r3, [r3, #0] + 803ff72: 627b str r3, [r7, #36] ; 0x24 iprh_prev = iprh_tmp; - 803fef0: 693b ldr r3, [r7, #16] - 803fef2: 62bb str r3, [r7, #40] ; 0x28 + 803ff74: 693b ldr r3, [r7, #16] + 803ff76: 62bb str r3, [r7, #40] ; 0x28 for (q = ipr->p; q != NULL;) { - 803fef4: 6a7b ldr r3, [r7, #36] ; 0x24 - 803fef6: 2b00 cmp r3, #0 - 803fef8: d193 bne.n 803fe22 - 803fefa: e000 b.n 803fefe + 803ff78: 6a7b ldr r3, [r7, #36] ; 0x24 + 803ff7a: 2b00 cmp r3, #0 + 803ff7c: d193 bne.n 803fea6 + 803ff7e: e000 b.n 803ff82 break; - 803fefc: bf00 nop + 803ff80: bf00 nop } /* If q is NULL, then we made it to the end of the list. Determine what to do now */ if (q == NULL) { - 803fefe: 6a7b ldr r3, [r7, #36] ; 0x24 - 803ff00: 2b00 cmp r3, #0 - 803ff02: d12d bne.n 803ff60 + 803ff82: 6a7b ldr r3, [r7, #36] ; 0x24 + 803ff84: 2b00 cmp r3, #0 + 803ff86: d12d bne.n 803ffe4 if (iprh_prev != NULL) { - 803ff04: 6abb ldr r3, [r7, #40] ; 0x28 - 803ff06: 2b00 cmp r3, #0 - 803ff08: d01c beq.n 803ff44 + 803ff88: 6abb ldr r3, [r7, #40] ; 0x28 + 803ff8a: 2b00 cmp r3, #0 + 803ff8c: d01c beq.n 803ffc8 /* this is (for now), the fragment with the highest offset: * chain it to the last fragment */ #if IP_REASS_CHECK_OVERLAP LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start); - 803ff0a: 6abb ldr r3, [r7, #40] ; 0x28 - 803ff0c: 88db ldrh r3, [r3, #6] - 803ff0e: b29a uxth r2, r3 - 803ff10: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff12: 889b ldrh r3, [r3, #4] - 803ff14: b29b uxth r3, r3 - 803ff16: 429a cmp r2, r3 - 803ff18: d906 bls.n 803ff28 - 803ff1a: 4b45 ldr r3, [pc, #276] ; (8040030 ) - 803ff1c: f44f 72db mov.w r2, #438 ; 0x1b6 - 803ff20: 4944 ldr r1, [pc, #272] ; (8040034 ) - 803ff22: 4845 ldr r0, [pc, #276] ; (8040038 ) - 803ff24: f000 fdf4 bl 8040b10 + 803ff8e: 6abb ldr r3, [r7, #40] ; 0x28 + 803ff90: 88db ldrh r3, [r3, #6] + 803ff92: b29a uxth r2, r3 + 803ff94: 6afb ldr r3, [r7, #44] ; 0x2c + 803ff96: 889b ldrh r3, [r3, #4] + 803ff98: b29b uxth r3, r3 + 803ff9a: 429a cmp r2, r3 + 803ff9c: d906 bls.n 803ffac + 803ff9e: 4b45 ldr r3, [pc, #276] ; (80400b4 ) + 803ffa0: f44f 72db mov.w r2, #438 ; 0x1b6 + 803ffa4: 4944 ldr r1, [pc, #272] ; (80400b8 ) + 803ffa6: 4845 ldr r0, [pc, #276] ; (80400bc ) + 803ffa8: f000 fdf4 bl 8040b94 #endif /* IP_REASS_CHECK_OVERLAP */ iprh_prev->next_pbuf = new_p; - 803ff28: 6abb ldr r3, [r7, #40] ; 0x28 - 803ff2a: 68ba ldr r2, [r7, #8] - 803ff2c: 601a str r2, [r3, #0] + 803ffac: 6abb ldr r3, [r7, #40] ; 0x28 + 803ffae: 68ba ldr r2, [r7, #8] + 803ffb0: 601a str r2, [r3, #0] if (iprh_prev->end != iprh->start) { - 803ff2e: 6abb ldr r3, [r7, #40] ; 0x28 - 803ff30: 88db ldrh r3, [r3, #6] - 803ff32: b29a uxth r2, r3 - 803ff34: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff36: 889b ldrh r3, [r3, #4] - 803ff38: b29b uxth r3, r3 - 803ff3a: 429a cmp r2, r3 - 803ff3c: d010 beq.n 803ff60 + 803ffb2: 6abb ldr r3, [r7, #40] ; 0x28 + 803ffb4: 88db ldrh r3, [r3, #6] + 803ffb6: b29a uxth r2, r3 + 803ffb8: 6afb ldr r3, [r7, #44] ; 0x2c + 803ffba: 889b ldrh r3, [r3, #4] + 803ffbc: b29b uxth r3, r3 + 803ffbe: 429a cmp r2, r3 + 803ffc0: d010 beq.n 803ffe4 valid = 0; - 803ff3e: 2300 movs r3, #0 - 803ff40: 623b str r3, [r7, #32] - 803ff42: e00d b.n 803ff60 + 803ffc2: 2300 movs r3, #0 + 803ffc4: 623b str r3, [r7, #32] + 803ffc6: e00d b.n 803ffe4 } } else { #if IP_REASS_CHECK_OVERLAP LWIP_ASSERT("no previous fragment, this must be the first fragment!", - 803ff44: 68fb ldr r3, [r7, #12] - 803ff46: 685b ldr r3, [r3, #4] - 803ff48: 2b00 cmp r3, #0 - 803ff4a: d006 beq.n 803ff5a - 803ff4c: 4b38 ldr r3, [pc, #224] ; (8040030 ) - 803ff4e: f44f 72df mov.w r2, #446 ; 0x1be - 803ff52: 493a ldr r1, [pc, #232] ; (804003c ) - 803ff54: 4838 ldr r0, [pc, #224] ; (8040038 ) - 803ff56: f000 fddb bl 8040b10 + 803ffc8: 68fb ldr r3, [r7, #12] + 803ffca: 685b ldr r3, [r3, #4] + 803ffcc: 2b00 cmp r3, #0 + 803ffce: d006 beq.n 803ffde + 803ffd0: 4b38 ldr r3, [pc, #224] ; (80400b4 ) + 803ffd2: f44f 72df mov.w r2, #446 ; 0x1be + 803ffd6: 493a ldr r1, [pc, #232] ; (80400c0 ) + 803ffd8: 4838 ldr r0, [pc, #224] ; (80400bc ) + 803ffda: f000 fddb bl 8040b94 ipr->p == NULL); #endif /* IP_REASS_CHECK_OVERLAP */ /* this is the first fragment we ever received for this ip datagram */ ipr->p = new_p; - 803ff5a: 68fb ldr r3, [r7, #12] - 803ff5c: 68ba ldr r2, [r7, #8] - 803ff5e: 605a str r2, [r3, #4] + 803ffde: 68fb ldr r3, [r7, #12] + 803ffe0: 68ba ldr r2, [r7, #8] + 803ffe2: 605a str r2, [r3, #4] } } /* At this point, the validation part begins: */ /* If we already received the last fragment */ if (is_last || ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0)) { - 803ff60: 687b ldr r3, [r7, #4] - 803ff62: 2b00 cmp r3, #0 - 803ff64: d105 bne.n 803ff72 - 803ff66: 68fb ldr r3, [r7, #12] - 803ff68: 7f9b ldrb r3, [r3, #30] - 803ff6a: f003 0301 and.w r3, r3, #1 - 803ff6e: 2b00 cmp r3, #0 - 803ff70: d059 beq.n 8040026 + 803ffe4: 687b ldr r3, [r7, #4] + 803ffe6: 2b00 cmp r3, #0 + 803ffe8: d105 bne.n 803fff6 + 803ffea: 68fb ldr r3, [r7, #12] + 803ffec: 7f9b ldrb r3, [r3, #30] + 803ffee: f003 0301 and.w r3, r3, #1 + 803fff2: 2b00 cmp r3, #0 + 803fff4: d059 beq.n 80400aa /* and had no holes so far */ if (valid) { - 803ff72: 6a3b ldr r3, [r7, #32] - 803ff74: 2b00 cmp r3, #0 - 803ff76: d04f beq.n 8040018 + 803fff6: 6a3b ldr r3, [r7, #32] + 803fff8: 2b00 cmp r3, #0 + 803fffa: d04f beq.n 804009c /* then check if the rest of the fragments is here */ /* Check if the queue starts with the first datagram */ if ((ipr->p == NULL) || (((struct ip_reass_helper *)ipr->p->payload)->start != 0)) { - 803ff78: 68fb ldr r3, [r7, #12] - 803ff7a: 685b ldr r3, [r3, #4] - 803ff7c: 2b00 cmp r3, #0 - 803ff7e: d006 beq.n 803ff8e - 803ff80: 68fb ldr r3, [r7, #12] - 803ff82: 685b ldr r3, [r3, #4] - 803ff84: 685b ldr r3, [r3, #4] - 803ff86: 889b ldrh r3, [r3, #4] - 803ff88: b29b uxth r3, r3 - 803ff8a: 2b00 cmp r3, #0 - 803ff8c: d002 beq.n 803ff94 + 803fffc: 68fb ldr r3, [r7, #12] + 803fffe: 685b ldr r3, [r3, #4] + 8040000: 2b00 cmp r3, #0 + 8040002: d006 beq.n 8040012 + 8040004: 68fb ldr r3, [r7, #12] + 8040006: 685b ldr r3, [r3, #4] + 8040008: 685b ldr r3, [r3, #4] + 804000a: 889b ldrh r3, [r3, #4] + 804000c: b29b uxth r3, r3 + 804000e: 2b00 cmp r3, #0 + 8040010: d002 beq.n 8040018 valid = 0; - 803ff8e: 2300 movs r3, #0 - 803ff90: 623b str r3, [r7, #32] - 803ff92: e041 b.n 8040018 + 8040012: 2300 movs r3, #0 + 8040014: 623b str r3, [r7, #32] + 8040016: e041 b.n 804009c } else { /* and check that there are no holes after this datagram */ iprh_prev = iprh; - 803ff94: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff96: 62bb str r3, [r7, #40] ; 0x28 + 8040018: 6afb ldr r3, [r7, #44] ; 0x2c + 804001a: 62bb str r3, [r7, #40] ; 0x28 q = iprh->next_pbuf; - 803ff98: 6afb ldr r3, [r7, #44] ; 0x2c - 803ff9a: 681b ldr r3, [r3, #0] - 803ff9c: 627b str r3, [r7, #36] ; 0x24 + 804001c: 6afb ldr r3, [r7, #44] ; 0x2c + 804001e: 681b ldr r3, [r3, #0] + 8040020: 627b str r3, [r7, #36] ; 0x24 while (q != NULL) { - 803ff9e: e012 b.n 803ffc6 + 8040022: e012 b.n 804004a iprh = (struct ip_reass_helper *)q->payload; - 803ffa0: 6a7b ldr r3, [r7, #36] ; 0x24 - 803ffa2: 685b ldr r3, [r3, #4] - 803ffa4: 62fb str r3, [r7, #44] ; 0x2c + 8040024: 6a7b ldr r3, [r7, #36] ; 0x24 + 8040026: 685b ldr r3, [r3, #4] + 8040028: 62fb str r3, [r7, #44] ; 0x2c if (iprh_prev->end != iprh->start) { - 803ffa6: 6abb ldr r3, [r7, #40] ; 0x28 - 803ffa8: 88db ldrh r3, [r3, #6] - 803ffaa: b29a uxth r2, r3 - 803ffac: 6afb ldr r3, [r7, #44] ; 0x2c - 803ffae: 889b ldrh r3, [r3, #4] - 803ffb0: b29b uxth r3, r3 - 803ffb2: 429a cmp r2, r3 - 803ffb4: d002 beq.n 803ffbc + 804002a: 6abb ldr r3, [r7, #40] ; 0x28 + 804002c: 88db ldrh r3, [r3, #6] + 804002e: b29a uxth r2, r3 + 8040030: 6afb ldr r3, [r7, #44] ; 0x2c + 8040032: 889b ldrh r3, [r3, #4] + 8040034: b29b uxth r3, r3 + 8040036: 429a cmp r2, r3 + 8040038: d002 beq.n 8040040 valid = 0; - 803ffb6: 2300 movs r3, #0 - 803ffb8: 623b str r3, [r7, #32] + 804003a: 2300 movs r3, #0 + 804003c: 623b str r3, [r7, #32] break; - 803ffba: e007 b.n 803ffcc + 804003e: e007 b.n 8040050 } iprh_prev = iprh; - 803ffbc: 6afb ldr r3, [r7, #44] ; 0x2c - 803ffbe: 62bb str r3, [r7, #40] ; 0x28 + 8040040: 6afb ldr r3, [r7, #44] ; 0x2c + 8040042: 62bb str r3, [r7, #40] ; 0x28 q = iprh->next_pbuf; - 803ffc0: 6afb ldr r3, [r7, #44] ; 0x2c - 803ffc2: 681b ldr r3, [r3, #0] - 803ffc4: 627b str r3, [r7, #36] ; 0x24 + 8040044: 6afb ldr r3, [r7, #44] ; 0x2c + 8040046: 681b ldr r3, [r3, #0] + 8040048: 627b str r3, [r7, #36] ; 0x24 while (q != NULL) { - 803ffc6: 6a7b ldr r3, [r7, #36] ; 0x24 - 803ffc8: 2b00 cmp r3, #0 - 803ffca: d1e9 bne.n 803ffa0 + 804004a: 6a7b ldr r3, [r7, #36] ; 0x24 + 804004c: 2b00 cmp r3, #0 + 804004e: d1e9 bne.n 8040024 } /* if still valid, all fragments are received * (because to the MF==0 already arrived */ if (valid) { - 803ffcc: 6a3b ldr r3, [r7, #32] - 803ffce: 2b00 cmp r3, #0 - 803ffd0: d022 beq.n 8040018 + 8040050: 6a3b ldr r3, [r7, #32] + 8040052: 2b00 cmp r3, #0 + 8040054: d022 beq.n 804009c LWIP_ASSERT("sanity check", ipr->p != NULL); - 803ffd2: 68fb ldr r3, [r7, #12] - 803ffd4: 685b ldr r3, [r3, #4] - 803ffd6: 2b00 cmp r3, #0 - 803ffd8: d106 bne.n 803ffe8 - 803ffda: 4b15 ldr r3, [pc, #84] ; (8040030 ) - 803ffdc: f240 12df movw r2, #479 ; 0x1df - 803ffe0: 4917 ldr r1, [pc, #92] ; (8040040 ) - 803ffe2: 4815 ldr r0, [pc, #84] ; (8040038 ) - 803ffe4: f000 fd94 bl 8040b10 + 8040056: 68fb ldr r3, [r7, #12] + 8040058: 685b ldr r3, [r3, #4] + 804005a: 2b00 cmp r3, #0 + 804005c: d106 bne.n 804006c + 804005e: 4b15 ldr r3, [pc, #84] ; (80400b4 ) + 8040060: f240 12df movw r2, #479 ; 0x1df + 8040064: 4917 ldr r1, [pc, #92] ; (80400c4 ) + 8040066: 4815 ldr r0, [pc, #84] ; (80400bc ) + 8040068: f000 fd94 bl 8040b94 LWIP_ASSERT("sanity check", - 803ffe8: 68fb ldr r3, [r7, #12] - 803ffea: 685b ldr r3, [r3, #4] - 803ffec: 685b ldr r3, [r3, #4] - 803ffee: 6afa ldr r2, [r7, #44] ; 0x2c - 803fff0: 429a cmp r2, r3 - 803fff2: d106 bne.n 8040002 - 803fff4: 4b0e ldr r3, [pc, #56] ; (8040030 ) - 803fff6: f44f 72f0 mov.w r2, #480 ; 0x1e0 - 803fffa: 4911 ldr r1, [pc, #68] ; (8040040 ) - 803fffc: 480e ldr r0, [pc, #56] ; (8040038 ) - 803fffe: f000 fd87 bl 8040b10 + 804006c: 68fb ldr r3, [r7, #12] + 804006e: 685b ldr r3, [r3, #4] + 8040070: 685b ldr r3, [r3, #4] + 8040072: 6afa ldr r2, [r7, #44] ; 0x2c + 8040074: 429a cmp r2, r3 + 8040076: d106 bne.n 8040086 + 8040078: 4b0e ldr r3, [pc, #56] ; (80400b4 ) + 804007a: f44f 72f0 mov.w r2, #480 ; 0x1e0 + 804007e: 4911 ldr r1, [pc, #68] ; (80400c4 ) + 8040080: 480e ldr r0, [pc, #56] ; (80400bc ) + 8040082: f000 fd87 bl 8040b94 ((struct ip_reass_helper *)ipr->p->payload) != iprh); LWIP_ASSERT("validate_datagram:next_pbuf!=NULL", - 8040002: 6afb ldr r3, [r7, #44] ; 0x2c - 8040004: 681b ldr r3, [r3, #0] - 8040006: 2b00 cmp r3, #0 - 8040008: d006 beq.n 8040018 - 804000a: 4b09 ldr r3, [pc, #36] ; (8040030 ) - 804000c: f44f 72f1 mov.w r2, #482 ; 0x1e2 - 8040010: 490c ldr r1, [pc, #48] ; (8040044 ) - 8040012: 4809 ldr r0, [pc, #36] ; (8040038 ) - 8040014: f000 fd7c bl 8040b10 + 8040086: 6afb ldr r3, [r7, #44] ; 0x2c + 8040088: 681b ldr r3, [r3, #0] + 804008a: 2b00 cmp r3, #0 + 804008c: d006 beq.n 804009c + 804008e: 4b09 ldr r3, [pc, #36] ; (80400b4 ) + 8040090: f44f 72f1 mov.w r2, #482 ; 0x1e2 + 8040094: 490c ldr r1, [pc, #48] ; (80400c8 ) + 8040096: 4809 ldr r0, [pc, #36] ; (80400bc ) + 8040098: f000 fd7c bl 8040b94 } } /* If valid is 0 here, there are some fragments missing in the middle * (since MF == 0 has already arrived). Such datagrams simply time out if * no more fragments are received... */ return valid ? IP_REASS_VALIDATE_TELEGRAM_FINISHED : IP_REASS_VALIDATE_PBUF_QUEUED; - 8040018: 6a3b ldr r3, [r7, #32] - 804001a: 2b00 cmp r3, #0 - 804001c: bf14 ite ne - 804001e: 2301 movne r3, #1 - 8040020: 2300 moveq r3, #0 - 8040022: b2db uxtb r3, r3 - 8040024: e000 b.n 8040028 + 804009c: 6a3b ldr r3, [r7, #32] + 804009e: 2b00 cmp r3, #0 + 80400a0: bf14 ite ne + 80400a2: 2301 movne r3, #1 + 80400a4: 2300 moveq r3, #0 + 80400a6: b2db uxtb r3, r3 + 80400a8: e000 b.n 80400ac } /* If we come here, not all fragments were received, yet! */ return IP_REASS_VALIDATE_PBUF_QUEUED; /* not yet valid! */ - 8040026: 2300 movs r3, #0 -} - 8040028: 4618 mov r0, r3 - 804002a: 3730 adds r7, #48 ; 0x30 - 804002c: 46bd mov sp, r7 - 804002e: bd80 pop {r7, pc} - 8040030: 080449f0 .word 0x080449f0 - 8040034: 08044ad4 .word 0x08044ad4 - 8040038: 08044a38 .word 0x08044a38 - 804003c: 08044af4 .word 0x08044af4 - 8040040: 08044b2c .word 0x08044b2c - 8040044: 08044b3c .word 0x08044b3c - -08040048 : + 80400aa: 2300 movs r3, #0 +} + 80400ac: 4618 mov r0, r3 + 80400ae: 3730 adds r7, #48 ; 0x30 + 80400b0: 46bd mov sp, r7 + 80400b2: bd80 pop {r7, pc} + 80400b4: 08044a70 .word 0x08044a70 + 80400b8: 08044b54 .word 0x08044b54 + 80400bc: 08044ab8 .word 0x08044ab8 + 80400c0: 08044b74 .word 0x08044b74 + 80400c4: 08044bac .word 0x08044bac + 80400c8: 08044bbc .word 0x08044bbc + +080400cc : * @param p points to a pbuf chain of the fragment * @return NULL if reassembly is incomplete, ? otherwise */ struct pbuf * ip4_reass(struct pbuf *p) { - 8040048: b580 push {r7, lr} - 804004a: b08e sub sp, #56 ; 0x38 - 804004c: af00 add r7, sp, #0 - 804004e: 6078 str r0, [r7, #4] + 80400cc: b580 push {r7, lr} + 80400ce: b08e sub sp, #56 ; 0x38 + 80400d0: af00 add r7, sp, #0 + 80400d2: 6078 str r0, [r7, #4] int is_last; IPFRAG_STATS_INC(ip_frag.recv); MIB2_STATS_INC(mib2.ipreasmreqds); fraghdr = (struct ip_hdr *)p->payload; - 8040050: 687b ldr r3, [r7, #4] - 8040052: 685b ldr r3, [r3, #4] - 8040054: 62bb str r3, [r7, #40] ; 0x28 + 80400d4: 687b ldr r3, [r7, #4] + 80400d6: 685b ldr r3, [r3, #4] + 80400d8: 62bb str r3, [r7, #40] ; 0x28 if (IPH_HL_BYTES(fraghdr) != IP_HLEN) { - 8040056: 6abb ldr r3, [r7, #40] ; 0x28 - 8040058: 781b ldrb r3, [r3, #0] - 804005a: f003 030f and.w r3, r3, #15 - 804005e: b2db uxtb r3, r3 - 8040060: 009b lsls r3, r3, #2 - 8040062: b2db uxtb r3, r3 - 8040064: 2b14 cmp r3, #20 - 8040066: f040 8171 bne.w 804034c + 80400da: 6abb ldr r3, [r7, #40] ; 0x28 + 80400dc: 781b ldrb r3, [r3, #0] + 80400de: f003 030f and.w r3, r3, #15 + 80400e2: b2db uxtb r3, r3 + 80400e4: 009b lsls r3, r3, #2 + 80400e6: b2db uxtb r3, r3 + 80400e8: 2b14 cmp r3, #20 + 80400ea: f040 8171 bne.w 80403d0 LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: IP options currently not supported!\n")); IPFRAG_STATS_INC(ip_frag.err); goto nullreturn; } offset = IPH_OFFSET_BYTES(fraghdr); - 804006a: 6abb ldr r3, [r7, #40] ; 0x28 - 804006c: 88db ldrh r3, [r3, #6] - 804006e: b29b uxth r3, r3 - 8040070: 4618 mov r0, r3 - 8040072: f7f5 ff31 bl 8035ed8 - 8040076: 4603 mov r3, r0 - 8040078: f3c3 030c ubfx r3, r3, #0, #13 - 804007c: b29b uxth r3, r3 - 804007e: 00db lsls r3, r3, #3 - 8040080: 84fb strh r3, [r7, #38] ; 0x26 + 80400ee: 6abb ldr r3, [r7, #40] ; 0x28 + 80400f0: 88db ldrh r3, [r3, #6] + 80400f2: b29b uxth r3, r3 + 80400f4: 4618 mov r0, r3 + 80400f6: f7f5 ff31 bl 8035f5c + 80400fa: 4603 mov r3, r0 + 80400fc: f3c3 030c ubfx r3, r3, #0, #13 + 8040100: b29b uxth r3, r3 + 8040102: 00db lsls r3, r3, #3 + 8040104: 84fb strh r3, [r7, #38] ; 0x26 len = lwip_ntohs(IPH_LEN(fraghdr)); - 8040082: 6abb ldr r3, [r7, #40] ; 0x28 - 8040084: 885b ldrh r3, [r3, #2] - 8040086: b29b uxth r3, r3 - 8040088: 4618 mov r0, r3 - 804008a: f7f5 ff25 bl 8035ed8 - 804008e: 4603 mov r3, r0 - 8040090: 84bb strh r3, [r7, #36] ; 0x24 + 8040106: 6abb ldr r3, [r7, #40] ; 0x28 + 8040108: 885b ldrh r3, [r3, #2] + 804010a: b29b uxth r3, r3 + 804010c: 4618 mov r0, r3 + 804010e: f7f5 ff25 bl 8035f5c + 8040112: 4603 mov r3, r0 + 8040114: 84bb strh r3, [r7, #36] ; 0x24 hlen = IPH_HL_BYTES(fraghdr); - 8040092: 6abb ldr r3, [r7, #40] ; 0x28 - 8040094: 781b ldrb r3, [r3, #0] - 8040096: f003 030f and.w r3, r3, #15 - 804009a: b2db uxtb r3, r3 - 804009c: 009b lsls r3, r3, #2 - 804009e: f887 3023 strb.w r3, [r7, #35] ; 0x23 + 8040116: 6abb ldr r3, [r7, #40] ; 0x28 + 8040118: 781b ldrb r3, [r3, #0] + 804011a: f003 030f and.w r3, r3, #15 + 804011e: b2db uxtb r3, r3 + 8040120: 009b lsls r3, r3, #2 + 8040122: f887 3023 strb.w r3, [r7, #35] ; 0x23 if (hlen > len) { - 80400a2: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 - 80400a6: b29b uxth r3, r3 - 80400a8: 8cba ldrh r2, [r7, #36] ; 0x24 - 80400aa: 429a cmp r2, r3 - 80400ac: f0c0 8150 bcc.w 8040350 + 8040126: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 + 804012a: b29b uxth r3, r3 + 804012c: 8cba ldrh r2, [r7, #36] ; 0x24 + 804012e: 429a cmp r2, r3 + 8040130: f0c0 8150 bcc.w 80403d4 /* invalid datagram */ goto nullreturn; } len = (u16_t)(len - hlen); - 80400b0: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 - 80400b4: b29b uxth r3, r3 - 80400b6: 8cba ldrh r2, [r7, #36] ; 0x24 - 80400b8: 1ad3 subs r3, r2, r3 - 80400ba: 84bb strh r3, [r7, #36] ; 0x24 + 8040134: f897 3023 ldrb.w r3, [r7, #35] ; 0x23 + 8040138: b29b uxth r3, r3 + 804013a: 8cba ldrh r2, [r7, #36] ; 0x24 + 804013c: 1ad3 subs r3, r2, r3 + 804013e: 84bb strh r3, [r7, #36] ; 0x24 /* Check if we are allowed to enqueue more datagrams. */ clen = pbuf_clen(p); - 80400bc: 6878 ldr r0, [r7, #4] - 80400be: f7f7 fbc5 bl 803784c - 80400c2: 4603 mov r3, r0 - 80400c4: 843b strh r3, [r7, #32] + 8040140: 6878 ldr r0, [r7, #4] + 8040142: f7f7 fbc5 bl 80378d0 + 8040146: 4603 mov r3, r0 + 8040148: 843b strh r3, [r7, #32] if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) { - 80400c6: 4b8c ldr r3, [pc, #560] ; (80402f8 ) - 80400c8: 881b ldrh r3, [r3, #0] - 80400ca: 461a mov r2, r3 - 80400cc: 8c3b ldrh r3, [r7, #32] - 80400ce: 4413 add r3, r2 - 80400d0: 2b0a cmp r3, #10 - 80400d2: dd10 ble.n 80400f6 + 804014a: 4b8c ldr r3, [pc, #560] ; (804037c ) + 804014c: 881b ldrh r3, [r3, #0] + 804014e: 461a mov r2, r3 + 8040150: 8c3b ldrh r3, [r7, #32] + 8040152: 4413 add r3, r2 + 8040154: 2b0a cmp r3, #10 + 8040156: dd10 ble.n 804017a #if IP_REASS_FREE_OLDEST if (!ip_reass_remove_oldest_datagram(fraghdr, clen) || - 80400d4: 8c3b ldrh r3, [r7, #32] - 80400d6: 4619 mov r1, r3 - 80400d8: 6ab8 ldr r0, [r7, #40] ; 0x28 - 80400da: f7ff fd81 bl 803fbe0 - 80400de: 4603 mov r3, r0 - 80400e0: 2b00 cmp r3, #0 - 80400e2: f000 8137 beq.w 8040354 + 8040158: 8c3b ldrh r3, [r7, #32] + 804015a: 4619 mov r1, r3 + 804015c: 6ab8 ldr r0, [r7, #40] ; 0x28 + 804015e: f7ff fd81 bl 803fc64 + 8040162: 4603 mov r3, r0 + 8040164: 2b00 cmp r3, #0 + 8040166: f000 8137 beq.w 80403d8 ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS)) - 80400e6: 4b84 ldr r3, [pc, #528] ; (80402f8 ) - 80400e8: 881b ldrh r3, [r3, #0] - 80400ea: 461a mov r2, r3 - 80400ec: 8c3b ldrh r3, [r7, #32] - 80400ee: 4413 add r3, r2 + 804016a: 4b84 ldr r3, [pc, #528] ; (804037c ) + 804016c: 881b ldrh r3, [r3, #0] + 804016e: 461a mov r2, r3 + 8040170: 8c3b ldrh r3, [r7, #32] + 8040172: 4413 add r3, r2 if (!ip_reass_remove_oldest_datagram(fraghdr, clen) || - 80400f0: 2b0a cmp r3, #10 - 80400f2: f300 812f bgt.w 8040354 + 8040174: 2b0a cmp r3, #10 + 8040176: f300 812f bgt.w 80403d8 } } /* Look for the datagram the fragment belongs to in the current datagram queue, * remembering the previous in the queue for later dequeueing. */ for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) { - 80400f6: 4b81 ldr r3, [pc, #516] ; (80402fc ) - 80400f8: 681b ldr r3, [r3, #0] - 80400fa: 633b str r3, [r7, #48] ; 0x30 - 80400fc: e015 b.n 804012a + 804017a: 4b81 ldr r3, [pc, #516] ; (8040380 ) + 804017c: 681b ldr r3, [r3, #0] + 804017e: 633b str r3, [r7, #48] ; 0x30 + 8040180: e015 b.n 80401ae /* Check if the incoming fragment matches the one currently present in the reassembly buffer. If so, we proceed with copying the fragment into the buffer. */ if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) { - 80400fe: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040100: 695a ldr r2, [r3, #20] - 8040102: 6abb ldr r3, [r7, #40] ; 0x28 - 8040104: 68db ldr r3, [r3, #12] - 8040106: 429a cmp r2, r3 - 8040108: d10c bne.n 8040124 - 804010a: 6b3b ldr r3, [r7, #48] ; 0x30 - 804010c: 699a ldr r2, [r3, #24] - 804010e: 6abb ldr r3, [r7, #40] ; 0x28 - 8040110: 691b ldr r3, [r3, #16] - 8040112: 429a cmp r2, r3 - 8040114: d106 bne.n 8040124 - 8040116: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040118: 899a ldrh r2, [r3, #12] - 804011a: 6abb ldr r3, [r7, #40] ; 0x28 - 804011c: 889b ldrh r3, [r3, #4] - 804011e: b29b uxth r3, r3 - 8040120: 429a cmp r2, r3 - 8040122: d006 beq.n 8040132 + 8040182: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040184: 695a ldr r2, [r3, #20] + 8040186: 6abb ldr r3, [r7, #40] ; 0x28 + 8040188: 68db ldr r3, [r3, #12] + 804018a: 429a cmp r2, r3 + 804018c: d10c bne.n 80401a8 + 804018e: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040190: 699a ldr r2, [r3, #24] + 8040192: 6abb ldr r3, [r7, #40] ; 0x28 + 8040194: 691b ldr r3, [r3, #16] + 8040196: 429a cmp r2, r3 + 8040198: d106 bne.n 80401a8 + 804019a: 6b3b ldr r3, [r7, #48] ; 0x30 + 804019c: 899a ldrh r2, [r3, #12] + 804019e: 6abb ldr r3, [r7, #40] ; 0x28 + 80401a0: 889b ldrh r3, [r3, #4] + 80401a2: b29b uxth r3, r3 + 80401a4: 429a cmp r2, r3 + 80401a6: d006 beq.n 80401b6 for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) { - 8040124: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040126: 681b ldr r3, [r3, #0] - 8040128: 633b str r3, [r7, #48] ; 0x30 - 804012a: 6b3b ldr r3, [r7, #48] ; 0x30 - 804012c: 2b00 cmp r3, #0 - 804012e: d1e6 bne.n 80400fe - 8040130: e000 b.n 8040134 + 80401a8: 6b3b ldr r3, [r7, #48] ; 0x30 + 80401aa: 681b ldr r3, [r3, #0] + 80401ac: 633b str r3, [r7, #48] ; 0x30 + 80401ae: 6b3b ldr r3, [r7, #48] ; 0x30 + 80401b0: 2b00 cmp r3, #0 + 80401b2: d1e6 bne.n 8040182 + 80401b4: e000 b.n 80401b8 LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: matching previous fragment ID=%"X16_F"\n", lwip_ntohs(IPH_ID(fraghdr)))); IPFRAG_STATS_INC(ip_frag.cachehit); break; - 8040132: bf00 nop + 80401b6: bf00 nop } } if (ipr == NULL) { - 8040134: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040136: 2b00 cmp r3, #0 - 8040138: d109 bne.n 804014e + 80401b8: 6b3b ldr r3, [r7, #48] ; 0x30 + 80401ba: 2b00 cmp r3, #0 + 80401bc: d109 bne.n 80401d2 /* Enqueue a new datagram into the datagram queue */ ipr = ip_reass_enqueue_new_datagram(fraghdr, clen); - 804013a: 8c3b ldrh r3, [r7, #32] - 804013c: 4619 mov r1, r3 - 804013e: 6ab8 ldr r0, [r7, #40] ; 0x28 - 8040140: f7ff fdb0 bl 803fca4 - 8040144: 6338 str r0, [r7, #48] ; 0x30 + 80401be: 8c3b ldrh r3, [r7, #32] + 80401c0: 4619 mov r1, r3 + 80401c2: 6ab8 ldr r0, [r7, #40] ; 0x28 + 80401c4: f7ff fdb0 bl 803fd28 + 80401c8: 6338 str r0, [r7, #48] ; 0x30 /* Bail if unable to enqueue */ if (ipr == NULL) { - 8040146: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040148: 2b00 cmp r3, #0 - 804014a: d11c bne.n 8040186 + 80401ca: 6b3b ldr r3, [r7, #48] ; 0x30 + 80401cc: 2b00 cmp r3, #0 + 80401ce: d11c bne.n 804020a goto nullreturn; - 804014c: e105 b.n 804035a + 80401d0: e105 b.n 80403de } } else { if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) && - 804014e: 6abb ldr r3, [r7, #40] ; 0x28 - 8040150: 88db ldrh r3, [r3, #6] - 8040152: b29b uxth r3, r3 - 8040154: 4618 mov r0, r3 - 8040156: f7f5 febf bl 8035ed8 - 804015a: 4603 mov r3, r0 - 804015c: f3c3 030c ubfx r3, r3, #0, #13 - 8040160: 2b00 cmp r3, #0 - 8040162: d110 bne.n 8040186 + 80401d2: 6abb ldr r3, [r7, #40] ; 0x28 + 80401d4: 88db ldrh r3, [r3, #6] + 80401d6: b29b uxth r3, r3 + 80401d8: 4618 mov r0, r3 + 80401da: f7f5 febf bl 8035f5c + 80401de: 4603 mov r3, r0 + 80401e0: f3c3 030c ubfx r3, r3, #0, #13 + 80401e4: 2b00 cmp r3, #0 + 80401e6: d110 bne.n 804020a ((lwip_ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) { - 8040164: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040166: 89db ldrh r3, [r3, #14] - 8040168: 4618 mov r0, r3 - 804016a: f7f5 feb5 bl 8035ed8 - 804016e: 4603 mov r3, r0 - 8040170: f3c3 030c ubfx r3, r3, #0, #13 + 80401e8: 6b3b ldr r3, [r7, #48] ; 0x30 + 80401ea: 89db ldrh r3, [r3, #14] + 80401ec: 4618 mov r0, r3 + 80401ee: f7f5 feb5 bl 8035f5c + 80401f2: 4603 mov r3, r0 + 80401f4: f3c3 030c ubfx r3, r3, #0, #13 if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) && - 8040174: 2b00 cmp r3, #0 - 8040176: d006 beq.n 8040186 + 80401f8: 2b00 cmp r3, #0 + 80401fa: d006 beq.n 804020a /* ipr->iphdr is not the header from the first fragment, but fraghdr is * -> copy fraghdr into ipr->iphdr since we want to have the header * of the first fragment (for ICMP time exceeded and later, for copying * all options, if supported)*/ SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN); - 8040178: 6b3b ldr r3, [r7, #48] ; 0x30 - 804017a: 3308 adds r3, #8 - 804017c: 2214 movs r2, #20 - 804017e: 6ab9 ldr r1, [r7, #40] ; 0x28 - 8040180: 4618 mov r0, r3 - 8040182: f000 fbb5 bl 80408f0 + 80401fc: 6b3b ldr r3, [r7, #48] ; 0x30 + 80401fe: 3308 adds r3, #8 + 8040200: 2214 movs r2, #20 + 8040202: 6ab9 ldr r1, [r7, #40] ; 0x28 + 8040204: 4618 mov r0, r3 + 8040206: f000 fbb5 bl 8040974 /* At this point, we have either created a new entry or pointing * to an existing one */ /* check for 'no more fragments', and update queue entry*/ is_last = (IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0; - 8040186: 6abb ldr r3, [r7, #40] ; 0x28 - 8040188: 88db ldrh r3, [r3, #6] - 804018a: b29b uxth r3, r3 - 804018c: f003 0320 and.w r3, r3, #32 - 8040190: 2b00 cmp r3, #0 - 8040192: bf0c ite eq - 8040194: 2301 moveq r3, #1 - 8040196: 2300 movne r3, #0 - 8040198: b2db uxtb r3, r3 - 804019a: 61fb str r3, [r7, #28] + 804020a: 6abb ldr r3, [r7, #40] ; 0x28 + 804020c: 88db ldrh r3, [r3, #6] + 804020e: b29b uxth r3, r3 + 8040210: f003 0320 and.w r3, r3, #32 + 8040214: 2b00 cmp r3, #0 + 8040216: bf0c ite eq + 8040218: 2301 moveq r3, #1 + 804021a: 2300 movne r3, #0 + 804021c: b2db uxtb r3, r3 + 804021e: 61fb str r3, [r7, #28] if (is_last) { - 804019c: 69fb ldr r3, [r7, #28] - 804019e: 2b00 cmp r3, #0 - 80401a0: d00e beq.n 80401c0 + 8040220: 69fb ldr r3, [r7, #28] + 8040222: 2b00 cmp r3, #0 + 8040224: d00e beq.n 8040244 u16_t datagram_len = (u16_t)(offset + len); - 80401a2: 8cfa ldrh r2, [r7, #38] ; 0x26 - 80401a4: 8cbb ldrh r3, [r7, #36] ; 0x24 - 80401a6: 4413 add r3, r2 - 80401a8: 837b strh r3, [r7, #26] + 8040226: 8cfa ldrh r2, [r7, #38] ; 0x26 + 8040228: 8cbb ldrh r3, [r7, #36] ; 0x24 + 804022a: 4413 add r3, r2 + 804022c: 837b strh r3, [r7, #26] if ((datagram_len < offset) || (datagram_len > (0xFFFF - IP_HLEN))) { - 80401aa: 8b7a ldrh r2, [r7, #26] - 80401ac: 8cfb ldrh r3, [r7, #38] ; 0x26 - 80401ae: 429a cmp r2, r3 - 80401b0: f0c0 80a0 bcc.w 80402f4 - 80401b4: 8b7b ldrh r3, [r7, #26] - 80401b6: f64f 72eb movw r2, #65515 ; 0xffeb - 80401ba: 4293 cmp r3, r2 - 80401bc: f200 809a bhi.w 80402f4 + 804022e: 8b7a ldrh r2, [r7, #26] + 8040230: 8cfb ldrh r3, [r7, #38] ; 0x26 + 8040232: 429a cmp r2, r3 + 8040234: f0c0 80a0 bcc.w 8040378 + 8040238: 8b7b ldrh r3, [r7, #26] + 804023a: f64f 72eb movw r2, #65515 ; 0xffeb + 804023e: 4293 cmp r3, r2 + 8040240: f200 809a bhi.w 8040378 goto nullreturn_ipr; } } /* find the right place to insert this pbuf */ /* @todo: trim pbufs if fragments are overlapping */ valid = ip_reass_chain_frag_into_datagram_and_validate(ipr, p, is_last); - 80401c0: 69fa ldr r2, [r7, #28] - 80401c2: 6879 ldr r1, [r7, #4] - 80401c4: 6b38 ldr r0, [r7, #48] ; 0x30 - 80401c6: f7ff fdd5 bl 803fd74 - 80401ca: 6178 str r0, [r7, #20] + 8040244: 69fa ldr r2, [r7, #28] + 8040246: 6879 ldr r1, [r7, #4] + 8040248: 6b38 ldr r0, [r7, #48] ; 0x30 + 804024a: f7ff fdd5 bl 803fdf8 + 804024e: 6178 str r0, [r7, #20] if (valid == IP_REASS_VALIDATE_PBUF_DROPPED) { - 80401cc: 697b ldr r3, [r7, #20] - 80401ce: f1b3 3fff cmp.w r3, #4294967295 - 80401d2: f000 809b beq.w 804030c + 8040250: 697b ldr r3, [r7, #20] + 8040252: f1b3 3fff cmp.w r3, #4294967295 + 8040256: f000 809b beq.w 8040390 /* if we come here, the pbuf has been enqueued */ /* Track the current number of pbufs current 'in-flight', in order to limit the number of fragments that may be enqueued at any one time (overflow checked by testing against IP_REASS_MAX_PBUFS) */ ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount + clen); - 80401d6: 4b48 ldr r3, [pc, #288] ; (80402f8 ) - 80401d8: 881a ldrh r2, [r3, #0] - 80401da: 8c3b ldrh r3, [r7, #32] - 80401dc: 4413 add r3, r2 - 80401de: b29a uxth r2, r3 - 80401e0: 4b45 ldr r3, [pc, #276] ; (80402f8 ) - 80401e2: 801a strh r2, [r3, #0] + 804025a: 4b48 ldr r3, [pc, #288] ; (804037c ) + 804025c: 881a ldrh r2, [r3, #0] + 804025e: 8c3b ldrh r3, [r7, #32] + 8040260: 4413 add r3, r2 + 8040262: b29a uxth r2, r3 + 8040264: 4b45 ldr r3, [pc, #276] ; (804037c ) + 8040266: 801a strh r2, [r3, #0] if (is_last) { - 80401e4: 69fb ldr r3, [r7, #28] - 80401e6: 2b00 cmp r3, #0 - 80401e8: d00d beq.n 8040206 + 8040268: 69fb ldr r3, [r7, #28] + 804026a: 2b00 cmp r3, #0 + 804026c: d00d beq.n 804028a u16_t datagram_len = (u16_t)(offset + len); - 80401ea: 8cfa ldrh r2, [r7, #38] ; 0x26 - 80401ec: 8cbb ldrh r3, [r7, #36] ; 0x24 - 80401ee: 4413 add r3, r2 - 80401f0: 827b strh r3, [r7, #18] + 804026e: 8cfa ldrh r2, [r7, #38] ; 0x26 + 8040270: 8cbb ldrh r3, [r7, #36] ; 0x24 + 8040272: 4413 add r3, r2 + 8040274: 827b strh r3, [r7, #18] ipr->datagram_len = datagram_len; - 80401f2: 6b3b ldr r3, [r7, #48] ; 0x30 - 80401f4: 8a7a ldrh r2, [r7, #18] - 80401f6: 839a strh r2, [r3, #28] + 8040276: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040278: 8a7a ldrh r2, [r7, #18] + 804027a: 839a strh r2, [r3, #28] ipr->flags |= IP_REASS_FLAG_LASTFRAG; - 80401f8: 6b3b ldr r3, [r7, #48] ; 0x30 - 80401fa: 7f9b ldrb r3, [r3, #30] - 80401fc: f043 0301 orr.w r3, r3, #1 - 8040200: b2da uxtb r2, r3 - 8040202: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040204: 779a strb r2, [r3, #30] + 804027c: 6b3b ldr r3, [r7, #48] ; 0x30 + 804027e: 7f9b ldrb r3, [r3, #30] + 8040280: f043 0301 orr.w r3, r3, #1 + 8040284: b2da uxtb r2, r3 + 8040286: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040288: 779a strb r2, [r3, #30] LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: last fragment seen, total len %"S16_F"\n", ipr->datagram_len)); } if (valid == IP_REASS_VALIDATE_TELEGRAM_FINISHED) { - 8040206: 697b ldr r3, [r7, #20] - 8040208: 2b01 cmp r3, #1 - 804020a: d171 bne.n 80402f0 + 804028a: 697b ldr r3, [r7, #20] + 804028c: 2b01 cmp r3, #1 + 804028e: d171 bne.n 8040374 struct ip_reassdata *ipr_prev; /* the totally last fragment (flag more fragments = 0) was received at least * once AND all fragments are received */ u16_t datagram_len = (u16_t)(ipr->datagram_len + IP_HLEN); - 804020c: 6b3b ldr r3, [r7, #48] ; 0x30 - 804020e: 8b9b ldrh r3, [r3, #28] - 8040210: 3314 adds r3, #20 - 8040212: 823b strh r3, [r7, #16] + 8040290: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040292: 8b9b ldrh r3, [r3, #28] + 8040294: 3314 adds r3, #20 + 8040296: 823b strh r3, [r7, #16] /* save the second pbuf before copying the header over the pointer */ r = ((struct ip_reass_helper *)ipr->p->payload)->next_pbuf; - 8040214: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040216: 685b ldr r3, [r3, #4] - 8040218: 685b ldr r3, [r3, #4] - 804021a: 681b ldr r3, [r3, #0] - 804021c: 637b str r3, [r7, #52] ; 0x34 + 8040298: 6b3b ldr r3, [r7, #48] ; 0x30 + 804029a: 685b ldr r3, [r3, #4] + 804029c: 685b ldr r3, [r3, #4] + 804029e: 681b ldr r3, [r3, #0] + 80402a0: 637b str r3, [r7, #52] ; 0x34 /* copy the original ip header back to the first pbuf */ fraghdr = (struct ip_hdr *)(ipr->p->payload); - 804021e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040220: 685b ldr r3, [r3, #4] - 8040222: 685b ldr r3, [r3, #4] - 8040224: 62bb str r3, [r7, #40] ; 0x28 + 80402a2: 6b3b ldr r3, [r7, #48] ; 0x30 + 80402a4: 685b ldr r3, [r3, #4] + 80402a6: 685b ldr r3, [r3, #4] + 80402a8: 62bb str r3, [r7, #40] ; 0x28 SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN); - 8040226: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040228: 3308 adds r3, #8 - 804022a: 2214 movs r2, #20 - 804022c: 4619 mov r1, r3 - 804022e: 6ab8 ldr r0, [r7, #40] ; 0x28 - 8040230: f000 fb5e bl 80408f0 + 80402aa: 6b3b ldr r3, [r7, #48] ; 0x30 + 80402ac: 3308 adds r3, #8 + 80402ae: 2214 movs r2, #20 + 80402b0: 4619 mov r1, r3 + 80402b2: 6ab8 ldr r0, [r7, #40] ; 0x28 + 80402b4: f000 fb5e bl 8040974 IPH_LEN_SET(fraghdr, lwip_htons(datagram_len)); - 8040234: 8a3b ldrh r3, [r7, #16] - 8040236: 4618 mov r0, r3 - 8040238: f7f5 fe4e bl 8035ed8 - 804023c: 4603 mov r3, r0 - 804023e: 461a mov r2, r3 - 8040240: 6abb ldr r3, [r7, #40] ; 0x28 - 8040242: 805a strh r2, [r3, #2] + 80402b8: 8a3b ldrh r3, [r7, #16] + 80402ba: 4618 mov r0, r3 + 80402bc: f7f5 fe4e bl 8035f5c + 80402c0: 4603 mov r3, r0 + 80402c2: 461a mov r2, r3 + 80402c4: 6abb ldr r3, [r7, #40] ; 0x28 + 80402c6: 805a strh r2, [r3, #2] IPH_OFFSET_SET(fraghdr, 0); - 8040244: 6abb ldr r3, [r7, #40] ; 0x28 - 8040246: 2200 movs r2, #0 - 8040248: 719a strb r2, [r3, #6] - 804024a: 2200 movs r2, #0 - 804024c: 71da strb r2, [r3, #7] + 80402c8: 6abb ldr r3, [r7, #40] ; 0x28 + 80402ca: 2200 movs r2, #0 + 80402cc: 719a strb r2, [r3, #6] + 80402ce: 2200 movs r2, #0 + 80402d0: 71da strb r2, [r3, #7] IPH_CHKSUM_SET(fraghdr, 0); - 804024e: 6abb ldr r3, [r7, #40] ; 0x28 - 8040250: 2200 movs r2, #0 - 8040252: 729a strb r2, [r3, #10] - 8040254: 2200 movs r2, #0 - 8040256: 72da strb r2, [r3, #11] + 80402d2: 6abb ldr r3, [r7, #40] ; 0x28 + 80402d4: 2200 movs r2, #0 + 80402d6: 729a strb r2, [r3, #10] + 80402d8: 2200 movs r2, #0 + 80402da: 72da strb r2, [r3, #11] IF__NETIF_CHECKSUM_ENABLED(ip_current_input_netif(), NETIF_CHECKSUM_GEN_IP) { IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN)); } #endif /* CHECKSUM_GEN_IP */ p = ipr->p; - 8040258: 6b3b ldr r3, [r7, #48] ; 0x30 - 804025a: 685b ldr r3, [r3, #4] - 804025c: 607b str r3, [r7, #4] + 80402dc: 6b3b ldr r3, [r7, #48] ; 0x30 + 80402de: 685b ldr r3, [r3, #4] + 80402e0: 607b str r3, [r7, #4] /* chain together the pbufs contained within the reass_data list. */ while (r != NULL) { - 804025e: e00d b.n 804027c + 80402e2: e00d b.n 8040300 iprh = (struct ip_reass_helper *)r->payload; - 8040260: 6b7b ldr r3, [r7, #52] ; 0x34 - 8040262: 685b ldr r3, [r3, #4] - 8040264: 60fb str r3, [r7, #12] + 80402e4: 6b7b ldr r3, [r7, #52] ; 0x34 + 80402e6: 685b ldr r3, [r3, #4] + 80402e8: 60fb str r3, [r7, #12] /* hide the ip header for every succeeding fragment */ pbuf_remove_header(r, IP_HLEN); - 8040266: 2114 movs r1, #20 - 8040268: 6b78 ldr r0, [r7, #52] ; 0x34 - 804026a: f7f7 f9e1 bl 8037630 + 80402ea: 2114 movs r1, #20 + 80402ec: 6b78 ldr r0, [r7, #52] ; 0x34 + 80402ee: f7f7 f9e1 bl 80376b4 pbuf_cat(p, r); - 804026e: 6b79 ldr r1, [r7, #52] ; 0x34 - 8040270: 6878 ldr r0, [r7, #4] - 8040272: f7f7 fb25 bl 80378c0 + 80402f2: 6b79 ldr r1, [r7, #52] ; 0x34 + 80402f4: 6878 ldr r0, [r7, #4] + 80402f6: f7f7 fb25 bl 8037944 r = iprh->next_pbuf; - 8040276: 68fb ldr r3, [r7, #12] - 8040278: 681b ldr r3, [r3, #0] - 804027a: 637b str r3, [r7, #52] ; 0x34 + 80402fa: 68fb ldr r3, [r7, #12] + 80402fc: 681b ldr r3, [r3, #0] + 80402fe: 637b str r3, [r7, #52] ; 0x34 while (r != NULL) { - 804027c: 6b7b ldr r3, [r7, #52] ; 0x34 - 804027e: 2b00 cmp r3, #0 - 8040280: d1ee bne.n 8040260 + 8040300: 6b7b ldr r3, [r7, #52] ; 0x34 + 8040302: 2b00 cmp r3, #0 + 8040304: d1ee bne.n 80402e4 } /* find the previous entry in the linked list */ if (ipr == reassdatagrams) { - 8040282: 4b1e ldr r3, [pc, #120] ; (80402fc ) - 8040284: 681b ldr r3, [r3, #0] - 8040286: 6b3a ldr r2, [r7, #48] ; 0x30 - 8040288: 429a cmp r2, r3 - 804028a: d102 bne.n 8040292 + 8040306: 4b1e ldr r3, [pc, #120] ; (8040380 ) + 8040308: 681b ldr r3, [r3, #0] + 804030a: 6b3a ldr r2, [r7, #48] ; 0x30 + 804030c: 429a cmp r2, r3 + 804030e: d102 bne.n 8040316 ipr_prev = NULL; - 804028c: 2300 movs r3, #0 - 804028e: 62fb str r3, [r7, #44] ; 0x2c - 8040290: e010 b.n 80402b4 + 8040310: 2300 movs r3, #0 + 8040312: 62fb str r3, [r7, #44] ; 0x2c + 8040314: e010 b.n 8040338 } else { for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) { - 8040292: 4b1a ldr r3, [pc, #104] ; (80402fc ) - 8040294: 681b ldr r3, [r3, #0] - 8040296: 62fb str r3, [r7, #44] ; 0x2c - 8040298: e007 b.n 80402aa + 8040316: 4b1a ldr r3, [pc, #104] ; (8040380 ) + 8040318: 681b ldr r3, [r3, #0] + 804031a: 62fb str r3, [r7, #44] ; 0x2c + 804031c: e007 b.n 804032e if (ipr_prev->next == ipr) { - 804029a: 6afb ldr r3, [r7, #44] ; 0x2c - 804029c: 681b ldr r3, [r3, #0] - 804029e: 6b3a ldr r2, [r7, #48] ; 0x30 - 80402a0: 429a cmp r2, r3 - 80402a2: d006 beq.n 80402b2 + 804031e: 6afb ldr r3, [r7, #44] ; 0x2c + 8040320: 681b ldr r3, [r3, #0] + 8040322: 6b3a ldr r2, [r7, #48] ; 0x30 + 8040324: 429a cmp r2, r3 + 8040326: d006 beq.n 8040336 for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) { - 80402a4: 6afb ldr r3, [r7, #44] ; 0x2c - 80402a6: 681b ldr r3, [r3, #0] - 80402a8: 62fb str r3, [r7, #44] ; 0x2c - 80402aa: 6afb ldr r3, [r7, #44] ; 0x2c - 80402ac: 2b00 cmp r3, #0 - 80402ae: d1f4 bne.n 804029a - 80402b0: e000 b.n 80402b4 + 8040328: 6afb ldr r3, [r7, #44] ; 0x2c + 804032a: 681b ldr r3, [r3, #0] + 804032c: 62fb str r3, [r7, #44] ; 0x2c + 804032e: 6afb ldr r3, [r7, #44] ; 0x2c + 8040330: 2b00 cmp r3, #0 + 8040332: d1f4 bne.n 804031e + 8040334: e000 b.n 8040338 break; - 80402b2: bf00 nop + 8040336: bf00 nop } } } /* release the sources allocate for the fragment queue entry */ ip_reass_dequeue_datagram(ipr, ipr_prev); - 80402b4: 6af9 ldr r1, [r7, #44] ; 0x2c - 80402b6: 6b38 ldr r0, [r7, #48] ; 0x30 - 80402b8: f7ff fd2e bl 803fd18 + 8040338: 6af9 ldr r1, [r7, #44] ; 0x2c + 804033a: 6b38 ldr r0, [r7, #48] ; 0x30 + 804033c: f7ff fd2e bl 803fd9c /* and adjust the number of pbufs currently queued for reassembly. */ clen = pbuf_clen(p); - 80402bc: 6878 ldr r0, [r7, #4] - 80402be: f7f7 fac5 bl 803784c - 80402c2: 4603 mov r3, r0 - 80402c4: 843b strh r3, [r7, #32] + 8040340: 6878 ldr r0, [r7, #4] + 8040342: f7f7 fac5 bl 80378d0 + 8040346: 4603 mov r3, r0 + 8040348: 843b strh r3, [r7, #32] LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= clen); - 80402c6: 4b0c ldr r3, [pc, #48] ; (80402f8 ) - 80402c8: 881b ldrh r3, [r3, #0] - 80402ca: 8c3a ldrh r2, [r7, #32] - 80402cc: 429a cmp r2, r3 - 80402ce: d906 bls.n 80402de - 80402d0: 4b0b ldr r3, [pc, #44] ; (8040300 ) - 80402d2: f240 229b movw r2, #667 ; 0x29b - 80402d6: 490b ldr r1, [pc, #44] ; (8040304 ) - 80402d8: 480b ldr r0, [pc, #44] ; (8040308 ) - 80402da: f000 fc19 bl 8040b10 + 804034a: 4b0c ldr r3, [pc, #48] ; (804037c ) + 804034c: 881b ldrh r3, [r3, #0] + 804034e: 8c3a ldrh r2, [r7, #32] + 8040350: 429a cmp r2, r3 + 8040352: d906 bls.n 8040362 + 8040354: 4b0b ldr r3, [pc, #44] ; (8040384 ) + 8040356: f240 229b movw r2, #667 ; 0x29b + 804035a: 490b ldr r1, [pc, #44] ; (8040388 ) + 804035c: 480b ldr r0, [pc, #44] ; (804038c ) + 804035e: f000 fc19 bl 8040b94 ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - clen); - 80402de: 4b06 ldr r3, [pc, #24] ; (80402f8 ) - 80402e0: 881a ldrh r2, [r3, #0] - 80402e2: 8c3b ldrh r3, [r7, #32] - 80402e4: 1ad3 subs r3, r2, r3 - 80402e6: b29a uxth r2, r3 - 80402e8: 4b03 ldr r3, [pc, #12] ; (80402f8 ) - 80402ea: 801a strh r2, [r3, #0] + 8040362: 4b06 ldr r3, [pc, #24] ; (804037c ) + 8040364: 881a ldrh r2, [r3, #0] + 8040366: 8c3b ldrh r3, [r7, #32] + 8040368: 1ad3 subs r3, r2, r3 + 804036a: b29a uxth r2, r3 + 804036c: 4b03 ldr r3, [pc, #12] ; (804037c ) + 804036e: 801a strh r2, [r3, #0] MIB2_STATS_INC(mib2.ipreasmoks); /* Return the pbuf chain */ return p; - 80402ec: 687b ldr r3, [r7, #4] - 80402ee: e038 b.n 8040362 + 8040370: 687b ldr r3, [r7, #4] + 8040372: e038 b.n 80403e6 } /* the datagram is not (yet?) reassembled completely */ LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount)); return NULL; - 80402f0: 2300 movs r3, #0 - 80402f2: e036 b.n 8040362 + 8040374: 2300 movs r3, #0 + 8040376: e036 b.n 80403e6 goto nullreturn_ipr; - 80402f4: bf00 nop - 80402f6: e00a b.n 804030e - 80402f8: 2400eab0 .word 0x2400eab0 - 80402fc: 2400eaac .word 0x2400eaac - 8040300: 080449f0 .word 0x080449f0 - 8040304: 08044b60 .word 0x08044b60 - 8040308: 08044a38 .word 0x08044a38 + 8040378: bf00 nop + 804037a: e00a b.n 8040392 + 804037c: 2400eab8 .word 0x2400eab8 + 8040380: 2400eab4 .word 0x2400eab4 + 8040384: 08044a70 .word 0x08044a70 + 8040388: 08044be0 .word 0x08044be0 + 804038c: 08044ab8 .word 0x08044ab8 goto nullreturn_ipr; - 804030c: bf00 nop + 8040390: bf00 nop nullreturn_ipr: LWIP_ASSERT("ipr != NULL", ipr != NULL); - 804030e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040310: 2b00 cmp r3, #0 - 8040312: d106 bne.n 8040322 - 8040314: 4b15 ldr r3, [pc, #84] ; (804036c ) - 8040316: f44f 722a mov.w r2, #680 ; 0x2a8 - 804031a: 4915 ldr r1, [pc, #84] ; (8040370 ) - 804031c: 4815 ldr r0, [pc, #84] ; (8040374 ) - 804031e: f000 fbf7 bl 8040b10 + 8040392: 6b3b ldr r3, [r7, #48] ; 0x30 + 8040394: 2b00 cmp r3, #0 + 8040396: d106 bne.n 80403a6 + 8040398: 4b15 ldr r3, [pc, #84] ; (80403f0 ) + 804039a: f44f 722a mov.w r2, #680 ; 0x2a8 + 804039e: 4915 ldr r1, [pc, #84] ; (80403f4 ) + 80403a0: 4815 ldr r0, [pc, #84] ; (80403f8 ) + 80403a2: f000 fbf7 bl 8040b94 if (ipr->p == NULL) { - 8040322: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040324: 685b ldr r3, [r3, #4] - 8040326: 2b00 cmp r3, #0 - 8040328: d116 bne.n 8040358 + 80403a6: 6b3b ldr r3, [r7, #48] ; 0x30 + 80403a8: 685b ldr r3, [r3, #4] + 80403aa: 2b00 cmp r3, #0 + 80403ac: d116 bne.n 80403dc /* dropped pbuf after creating a new datagram entry: remove the entry, too */ LWIP_ASSERT("not firstalthough just enqueued", ipr == reassdatagrams); - 804032a: 4b13 ldr r3, [pc, #76] ; (8040378 ) - 804032c: 681b ldr r3, [r3, #0] - 804032e: 6b3a ldr r2, [r7, #48] ; 0x30 - 8040330: 429a cmp r2, r3 - 8040332: d006 beq.n 8040342 - 8040334: 4b0d ldr r3, [pc, #52] ; (804036c ) - 8040336: f240 22ab movw r2, #683 ; 0x2ab - 804033a: 4910 ldr r1, [pc, #64] ; (804037c ) - 804033c: 480d ldr r0, [pc, #52] ; (8040374 ) - 804033e: f000 fbe7 bl 8040b10 + 80403ae: 4b13 ldr r3, [pc, #76] ; (80403fc ) + 80403b0: 681b ldr r3, [r3, #0] + 80403b2: 6b3a ldr r2, [r7, #48] ; 0x30 + 80403b4: 429a cmp r2, r3 + 80403b6: d006 beq.n 80403c6 + 80403b8: 4b0d ldr r3, [pc, #52] ; (80403f0 ) + 80403ba: f240 22ab movw r2, #683 ; 0x2ab + 80403be: 4910 ldr r1, [pc, #64] ; (8040400 ) + 80403c0: 480d ldr r0, [pc, #52] ; (80403f8 ) + 80403c2: f000 fbe7 bl 8040b94 ip_reass_dequeue_datagram(ipr, NULL); - 8040342: 2100 movs r1, #0 - 8040344: 6b38 ldr r0, [r7, #48] ; 0x30 - 8040346: f7ff fce7 bl 803fd18 - 804034a: e006 b.n 804035a + 80403c6: 2100 movs r1, #0 + 80403c8: 6b38 ldr r0, [r7, #48] ; 0x30 + 80403ca: f7ff fce7 bl 803fd9c + 80403ce: e006 b.n 80403de goto nullreturn; - 804034c: bf00 nop - 804034e: e004 b.n 804035a + 80403d0: bf00 nop + 80403d2: e004 b.n 80403de goto nullreturn; - 8040350: bf00 nop - 8040352: e002 b.n 804035a + 80403d4: bf00 nop + 80403d6: e002 b.n 80403de goto nullreturn; - 8040354: bf00 nop - 8040356: e000 b.n 804035a + 80403d8: bf00 nop + 80403da: e000 b.n 80403de } nullreturn: - 8040358: bf00 nop + 80403dc: bf00 nop LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: nullreturn\n")); IPFRAG_STATS_INC(ip_frag.drop); pbuf_free(p); - 804035a: 6878 ldr r0, [r7, #4] - 804035c: f7f7 f9ee bl 803773c + 80403de: 6878 ldr r0, [r7, #4] + 80403e0: f7f7 f9ee bl 80377c0 return NULL; - 8040360: 2300 movs r3, #0 -} - 8040362: 4618 mov r0, r3 - 8040364: 3738 adds r7, #56 ; 0x38 - 8040366: 46bd mov sp, r7 - 8040368: bd80 pop {r7, pc} - 804036a: bf00 nop - 804036c: 080449f0 .word 0x080449f0 - 8040370: 08044b7c .word 0x08044b7c - 8040374: 08044a38 .word 0x08044a38 - 8040378: 2400eaac .word 0x2400eaac - 804037c: 08044b88 .word 0x08044b88 - -08040380 : + 80403e4: 2300 movs r3, #0 +} + 80403e6: 4618 mov r0, r3 + 80403e8: 3738 adds r7, #56 ; 0x38 + 80403ea: 46bd mov sp, r7 + 80403ec: bd80 pop {r7, pc} + 80403ee: bf00 nop + 80403f0: 08044a70 .word 0x08044a70 + 80403f4: 08044bfc .word 0x08044bfc + 80403f8: 08044ab8 .word 0x08044ab8 + 80403fc: 2400eab4 .word 0x2400eab4 + 8040400: 08044c08 .word 0x08044c08 + +08040404 : #if IP_FRAG #if !LWIP_NETIF_TX_SINGLE_PBUF /** Allocate a new struct pbuf_custom_ref */ static struct pbuf_custom_ref * ip_frag_alloc_pbuf_custom_ref(void) { - 8040380: b580 push {r7, lr} - 8040382: af00 add r7, sp, #0 + 8040404: b580 push {r7, lr} + 8040406: af00 add r7, sp, #0 return (struct pbuf_custom_ref *)memp_malloc(MEMP_FRAG_PBUF); - 8040384: 2005 movs r0, #5 - 8040386: f7f6 fad7 bl 8036938 - 804038a: 4603 mov r3, r0 + 8040408: 2005 movs r0, #5 + 804040a: f7f6 fad7 bl 80369bc + 804040e: 4603 mov r3, r0 } - 804038c: 4618 mov r0, r3 - 804038e: bd80 pop {r7, pc} + 8040410: 4618 mov r0, r3 + 8040412: bd80 pop {r7, pc} -08040390 : +08040414 : /** Free a struct pbuf_custom_ref */ static void ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref *p) { - 8040390: b580 push {r7, lr} - 8040392: b082 sub sp, #8 - 8040394: af00 add r7, sp, #0 - 8040396: 6078 str r0, [r7, #4] + 8040414: b580 push {r7, lr} + 8040416: b082 sub sp, #8 + 8040418: af00 add r7, sp, #0 + 804041a: 6078 str r0, [r7, #4] LWIP_ASSERT("p != NULL", p != NULL); - 8040398: 687b ldr r3, [r7, #4] - 804039a: 2b00 cmp r3, #0 - 804039c: d106 bne.n 80403ac - 804039e: 4b07 ldr r3, [pc, #28] ; (80403bc ) - 80403a0: f44f 7231 mov.w r2, #708 ; 0x2c4 - 80403a4: 4906 ldr r1, [pc, #24] ; (80403c0 ) - 80403a6: 4807 ldr r0, [pc, #28] ; (80403c4 ) - 80403a8: f000 fbb2 bl 8040b10 + 804041c: 687b ldr r3, [r7, #4] + 804041e: 2b00 cmp r3, #0 + 8040420: d106 bne.n 8040430 + 8040422: 4b07 ldr r3, [pc, #28] ; (8040440 ) + 8040424: f44f 7231 mov.w r2, #708 ; 0x2c4 + 8040428: 4906 ldr r1, [pc, #24] ; (8040444 ) + 804042a: 4807 ldr r0, [pc, #28] ; (8040448 ) + 804042c: f000 fbb2 bl 8040b94 memp_free(MEMP_FRAG_PBUF, p); - 80403ac: 6879 ldr r1, [r7, #4] - 80403ae: 2005 movs r0, #5 - 80403b0: f7f6 fb32 bl 8036a18 + 8040430: 6879 ldr r1, [r7, #4] + 8040432: 2005 movs r0, #5 + 8040434: f7f6 fb32 bl 8036a9c } - 80403b4: bf00 nop - 80403b6: 3708 adds r7, #8 - 80403b8: 46bd mov sp, r7 - 80403ba: bd80 pop {r7, pc} - 80403bc: 080449f0 .word 0x080449f0 - 80403c0: 08044ba8 .word 0x08044ba8 - 80403c4: 08044a38 .word 0x08044a38 + 8040438: bf00 nop + 804043a: 3708 adds r7, #8 + 804043c: 46bd mov sp, r7 + 804043e: bd80 pop {r7, pc} + 8040440: 08044a70 .word 0x08044a70 + 8040444: 08044c28 .word 0x08044c28 + 8040448: 08044ab8 .word 0x08044ab8 -080403c8 : +0804044c : /** Free-callback function to free a 'struct pbuf_custom_ref', called by * pbuf_free. */ static void ipfrag_free_pbuf_custom(struct pbuf *p) { - 80403c8: b580 push {r7, lr} - 80403ca: b084 sub sp, #16 - 80403cc: af00 add r7, sp, #0 - 80403ce: 6078 str r0, [r7, #4] + 804044c: b580 push {r7, lr} + 804044e: b084 sub sp, #16 + 8040450: af00 add r7, sp, #0 + 8040452: 6078 str r0, [r7, #4] struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref *)p; - 80403d0: 687b ldr r3, [r7, #4] - 80403d2: 60fb str r3, [r7, #12] + 8040454: 687b ldr r3, [r7, #4] + 8040456: 60fb str r3, [r7, #12] LWIP_ASSERT("pcr != NULL", pcr != NULL); - 80403d4: 68fb ldr r3, [r7, #12] - 80403d6: 2b00 cmp r3, #0 - 80403d8: d106 bne.n 80403e8 - 80403da: 4b11 ldr r3, [pc, #68] ; (8040420 ) - 80403dc: f240 22ce movw r2, #718 ; 0x2ce - 80403e0: 4910 ldr r1, [pc, #64] ; (8040424 ) - 80403e2: 4811 ldr r0, [pc, #68] ; (8040428 ) - 80403e4: f000 fb94 bl 8040b10 + 8040458: 68fb ldr r3, [r7, #12] + 804045a: 2b00 cmp r3, #0 + 804045c: d106 bne.n 804046c + 804045e: 4b11 ldr r3, [pc, #68] ; (80404a4 ) + 8040460: f240 22ce movw r2, #718 ; 0x2ce + 8040464: 4910 ldr r1, [pc, #64] ; (80404a8 ) + 8040466: 4811 ldr r0, [pc, #68] ; (80404ac ) + 8040468: f000 fb94 bl 8040b94 LWIP_ASSERT("pcr == p", (void *)pcr == (void *)p); - 80403e8: 68fa ldr r2, [r7, #12] - 80403ea: 687b ldr r3, [r7, #4] - 80403ec: 429a cmp r2, r3 - 80403ee: d006 beq.n 80403fe - 80403f0: 4b0b ldr r3, [pc, #44] ; (8040420 ) - 80403f2: f240 22cf movw r2, #719 ; 0x2cf - 80403f6: 490d ldr r1, [pc, #52] ; (804042c ) - 80403f8: 480b ldr r0, [pc, #44] ; (8040428 ) - 80403fa: f000 fb89 bl 8040b10 + 804046c: 68fa ldr r2, [r7, #12] + 804046e: 687b ldr r3, [r7, #4] + 8040470: 429a cmp r2, r3 + 8040472: d006 beq.n 8040482 + 8040474: 4b0b ldr r3, [pc, #44] ; (80404a4 ) + 8040476: f240 22cf movw r2, #719 ; 0x2cf + 804047a: 490d ldr r1, [pc, #52] ; (80404b0 ) + 804047c: 480b ldr r0, [pc, #44] ; (80404ac ) + 804047e: f000 fb89 bl 8040b94 if (pcr->original != NULL) { - 80403fe: 68fb ldr r3, [r7, #12] - 8040400: 695b ldr r3, [r3, #20] - 8040402: 2b00 cmp r3, #0 - 8040404: d004 beq.n 8040410 + 8040482: 68fb ldr r3, [r7, #12] + 8040484: 695b ldr r3, [r3, #20] + 8040486: 2b00 cmp r3, #0 + 8040488: d004 beq.n 8040494 pbuf_free(pcr->original); - 8040406: 68fb ldr r3, [r7, #12] - 8040408: 695b ldr r3, [r3, #20] - 804040a: 4618 mov r0, r3 - 804040c: f7f7 f996 bl 803773c + 804048a: 68fb ldr r3, [r7, #12] + 804048c: 695b ldr r3, [r3, #20] + 804048e: 4618 mov r0, r3 + 8040490: f7f7 f996 bl 80377c0 } ip_frag_free_pbuf_custom_ref(pcr); - 8040410: 68f8 ldr r0, [r7, #12] - 8040412: f7ff ffbd bl 8040390 -} - 8040416: bf00 nop - 8040418: 3710 adds r7, #16 - 804041a: 46bd mov sp, r7 - 804041c: bd80 pop {r7, pc} - 804041e: bf00 nop - 8040420: 080449f0 .word 0x080449f0 - 8040424: 08044bb4 .word 0x08044bb4 - 8040428: 08044a38 .word 0x08044a38 - 804042c: 08044bc0 .word 0x08044bc0 - -08040430 : + 8040494: 68f8 ldr r0, [r7, #12] + 8040496: f7ff ffbd bl 8040414 +} + 804049a: bf00 nop + 804049c: 3710 adds r7, #16 + 804049e: 46bd mov sp, r7 + 80404a0: bd80 pop {r7, pc} + 80404a2: bf00 nop + 80404a4: 08044a70 .word 0x08044a70 + 80404a8: 08044c34 .word 0x08044c34 + 80404ac: 08044ab8 .word 0x08044ab8 + 80404b0: 08044c40 .word 0x08044c40 + +080404b4 : * * @return ERR_OK if sent successfully, err_t otherwise */ err_t ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest) { - 8040430: b580 push {r7, lr} - 8040432: b094 sub sp, #80 ; 0x50 - 8040434: af02 add r7, sp, #8 - 8040436: 60f8 str r0, [r7, #12] - 8040438: 60b9 str r1, [r7, #8] - 804043a: 607a str r2, [r7, #4] + 80404b4: b580 push {r7, lr} + 80404b6: b094 sub sp, #80 ; 0x50 + 80404b8: af02 add r7, sp, #8 + 80404ba: 60f8 str r0, [r7, #12] + 80404bc: 60b9 str r1, [r7, #8] + 80404be: 607a str r2, [r7, #4] struct pbuf *rambuf; #if !LWIP_NETIF_TX_SINGLE_PBUF struct pbuf *newpbuf; u16_t newpbuflen = 0; - 804043c: 2300 movs r3, #0 - 804043e: f8a7 3046 strh.w r3, [r7, #70] ; 0x46 + 80404c0: 2300 movs r3, #0 + 80404c2: f8a7 3046 strh.w r3, [r7, #70] ; 0x46 u16_t left_to_copy; #endif struct ip_hdr *original_iphdr; struct ip_hdr *iphdr; const u16_t nfb = (u16_t)((netif->mtu - IP_HLEN) / 8); - 8040442: 68bb ldr r3, [r7, #8] - 8040444: 8d1b ldrh r3, [r3, #40] ; 0x28 - 8040446: 3b14 subs r3, #20 - 8040448: 2b00 cmp r3, #0 - 804044a: da00 bge.n 804044e - 804044c: 3307 adds r3, #7 - 804044e: 10db asrs r3, r3, #3 - 8040450: 877b strh r3, [r7, #58] ; 0x3a + 80404c6: 68bb ldr r3, [r7, #8] + 80404c8: 8d1b ldrh r3, [r3, #40] ; 0x28 + 80404ca: 3b14 subs r3, #20 + 80404cc: 2b00 cmp r3, #0 + 80404ce: da00 bge.n 80404d2 + 80404d0: 3307 adds r3, #7 + 80404d2: 10db asrs r3, r3, #3 + 80404d4: 877b strh r3, [r7, #58] ; 0x3a u16_t left, fragsize; u16_t ofo; int last; u16_t poff = IP_HLEN; - 8040452: 2314 movs r3, #20 - 8040454: 87fb strh r3, [r7, #62] ; 0x3e + 80404d6: 2314 movs r3, #20 + 80404d8: 87fb strh r3, [r7, #62] ; 0x3e u16_t tmp; int mf_set; original_iphdr = (struct ip_hdr *)p->payload; - 8040456: 68fb ldr r3, [r7, #12] - 8040458: 685b ldr r3, [r3, #4] - 804045a: 637b str r3, [r7, #52] ; 0x34 + 80404da: 68fb ldr r3, [r7, #12] + 80404dc: 685b ldr r3, [r3, #4] + 80404de: 637b str r3, [r7, #52] ; 0x34 iphdr = original_iphdr; - 804045c: 6b7b ldr r3, [r7, #52] ; 0x34 - 804045e: 633b str r3, [r7, #48] ; 0x30 + 80404e0: 6b7b ldr r3, [r7, #52] ; 0x34 + 80404e2: 633b str r3, [r7, #48] ; 0x30 if (IPH_HL_BYTES(iphdr) != IP_HLEN) { - 8040460: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040462: 781b ldrb r3, [r3, #0] - 8040464: f003 030f and.w r3, r3, #15 - 8040468: b2db uxtb r3, r3 - 804046a: 009b lsls r3, r3, #2 - 804046c: b2db uxtb r3, r3 - 804046e: 2b14 cmp r3, #20 - 8040470: d002 beq.n 8040478 + 80404e4: 6b3b ldr r3, [r7, #48] ; 0x30 + 80404e6: 781b ldrb r3, [r3, #0] + 80404e8: f003 030f and.w r3, r3, #15 + 80404ec: b2db uxtb r3, r3 + 80404ee: 009b lsls r3, r3, #2 + 80404f0: b2db uxtb r3, r3 + 80404f2: 2b14 cmp r3, #20 + 80404f4: d002 beq.n 80404fc /* ip4_frag() does not support IP options */ return ERR_VAL; - 8040472: f06f 0305 mvn.w r3, #5 - 8040476: e110 b.n 804069a + 80404f6: f06f 0305 mvn.w r3, #5 + 80404fa: e110 b.n 804071e } LWIP_ERROR("ip4_frag(): pbuf too short", p->len >= IP_HLEN, return ERR_VAL); - 8040478: 68fb ldr r3, [r7, #12] - 804047a: 895b ldrh r3, [r3, #10] - 804047c: 2b13 cmp r3, #19 - 804047e: d809 bhi.n 8040494 - 8040480: 4b88 ldr r3, [pc, #544] ; (80406a4 ) - 8040482: f44f 723f mov.w r2, #764 ; 0x2fc - 8040486: 4988 ldr r1, [pc, #544] ; (80406a8 ) - 8040488: 4888 ldr r0, [pc, #544] ; (80406ac ) - 804048a: f000 fb41 bl 8040b10 - 804048e: f06f 0305 mvn.w r3, #5 - 8040492: e102 b.n 804069a + 80404fc: 68fb ldr r3, [r7, #12] + 80404fe: 895b ldrh r3, [r3, #10] + 8040500: 2b13 cmp r3, #19 + 8040502: d809 bhi.n 8040518 + 8040504: 4b88 ldr r3, [pc, #544] ; (8040728 ) + 8040506: f44f 723f mov.w r2, #764 ; 0x2fc + 804050a: 4988 ldr r1, [pc, #544] ; (804072c ) + 804050c: 4888 ldr r0, [pc, #544] ; (8040730 ) + 804050e: f000 fb41 bl 8040b94 + 8040512: f06f 0305 mvn.w r3, #5 + 8040516: e102 b.n 804071e /* Save original offset */ tmp = lwip_ntohs(IPH_OFFSET(iphdr)); - 8040494: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040496: 88db ldrh r3, [r3, #6] - 8040498: b29b uxth r3, r3 - 804049a: 4618 mov r0, r3 - 804049c: f7f5 fd1c bl 8035ed8 - 80404a0: 4603 mov r3, r0 - 80404a2: 87bb strh r3, [r7, #60] ; 0x3c + 8040518: 6b3b ldr r3, [r7, #48] ; 0x30 + 804051a: 88db ldrh r3, [r3, #6] + 804051c: b29b uxth r3, r3 + 804051e: 4618 mov r0, r3 + 8040520: f7f5 fd1c bl 8035f5c + 8040524: 4603 mov r3, r0 + 8040526: 87bb strh r3, [r7, #60] ; 0x3c ofo = tmp & IP_OFFMASK; - 80404a4: 8fbb ldrh r3, [r7, #60] ; 0x3c - 80404a6: f3c3 030c ubfx r3, r3, #0, #13 - 80404aa: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 8040528: 8fbb ldrh r3, [r7, #60] ; 0x3c + 804052a: f3c3 030c ubfx r3, r3, #0, #13 + 804052e: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 /* already fragmented? if so, the last fragment we create must have MF, too */ mf_set = tmp & IP_MF; - 80404ae: 8fbb ldrh r3, [r7, #60] ; 0x3c - 80404b0: f403 5300 and.w r3, r3, #8192 ; 0x2000 - 80404b4: 62fb str r3, [r7, #44] ; 0x2c + 8040532: 8fbb ldrh r3, [r7, #60] ; 0x3c + 8040534: f403 5300 and.w r3, r3, #8192 ; 0x2000 + 8040538: 62fb str r3, [r7, #44] ; 0x2c left = (u16_t)(p->tot_len - IP_HLEN); - 80404b6: 68fb ldr r3, [r7, #12] - 80404b8: 891b ldrh r3, [r3, #8] - 80404ba: 3b14 subs r3, #20 - 80404bc: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 804053a: 68fb ldr r3, [r7, #12] + 804053c: 891b ldrh r3, [r3, #8] + 804053e: 3b14 subs r3, #20 + 8040540: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 while (left) { - 80404c0: e0e1 b.n 8040686 + 8040544: e0e1 b.n 804070a /* Fill this fragment */ fragsize = LWIP_MIN(left, (u16_t)(nfb * 8)); - 80404c2: 8f7b ldrh r3, [r7, #58] ; 0x3a - 80404c4: 00db lsls r3, r3, #3 - 80404c6: b29b uxth r3, r3 - 80404c8: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 80404cc: 4293 cmp r3, r2 - 80404ce: bf28 it cs - 80404d0: 4613 movcs r3, r2 - 80404d2: 857b strh r3, [r7, #42] ; 0x2a + 8040546: 8f7b ldrh r3, [r7, #58] ; 0x3a + 8040548: 00db lsls r3, r3, #3 + 804054a: b29b uxth r3, r3 + 804054c: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 8040550: 4293 cmp r3, r2 + 8040552: bf28 it cs + 8040554: 4613 movcs r3, r2 + 8040556: 857b strh r3, [r7, #42] ; 0x2a /* When not using a static buffer, create a chain of pbufs. * The first will be a PBUF_RAM holding the link and IP header. * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged, * but limited to the size of an mtu. */ rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM); - 80404d4: f44f 7220 mov.w r2, #640 ; 0x280 - 80404d8: 2114 movs r1, #20 - 80404da: 200e movs r0, #14 - 80404dc: f7f6 fe4a bl 8037174 - 80404e0: 6278 str r0, [r7, #36] ; 0x24 + 8040558: f44f 7220 mov.w r2, #640 ; 0x280 + 804055c: 2114 movs r1, #20 + 804055e: 200e movs r0, #14 + 8040560: f7f6 fe4a bl 80371f8 + 8040564: 6278 str r0, [r7, #36] ; 0x24 if (rambuf == NULL) { - 80404e2: 6a7b ldr r3, [r7, #36] ; 0x24 - 80404e4: 2b00 cmp r3, #0 - 80404e6: f000 80d5 beq.w 8040694 + 8040566: 6a7b ldr r3, [r7, #36] ; 0x24 + 8040568: 2b00 cmp r3, #0 + 804056a: f000 80d5 beq.w 8040718 goto memerr; } LWIP_ASSERT("this needs a pbuf in one piece!", - 80404ea: 6a7b ldr r3, [r7, #36] ; 0x24 - 80404ec: 895b ldrh r3, [r3, #10] - 80404ee: 2b13 cmp r3, #19 - 80404f0: d806 bhi.n 8040500 - 80404f2: 4b6c ldr r3, [pc, #432] ; (80406a4 ) - 80404f4: f44f 7249 mov.w r2, #804 ; 0x324 - 80404f8: 496d ldr r1, [pc, #436] ; (80406b0 ) - 80404fa: 486c ldr r0, [pc, #432] ; (80406ac ) - 80404fc: f000 fb08 bl 8040b10 + 804056e: 6a7b ldr r3, [r7, #36] ; 0x24 + 8040570: 895b ldrh r3, [r3, #10] + 8040572: 2b13 cmp r3, #19 + 8040574: d806 bhi.n 8040584 + 8040576: 4b6c ldr r3, [pc, #432] ; (8040728 ) + 8040578: f44f 7249 mov.w r2, #804 ; 0x324 + 804057c: 496d ldr r1, [pc, #436] ; (8040734 ) + 804057e: 486c ldr r0, [pc, #432] ; (8040730 ) + 8040580: f000 fb08 bl 8040b94 (rambuf->len >= (IP_HLEN))); SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN); - 8040500: 6a7b ldr r3, [r7, #36] ; 0x24 - 8040502: 685b ldr r3, [r3, #4] - 8040504: 2214 movs r2, #20 - 8040506: 6b79 ldr r1, [r7, #52] ; 0x34 - 8040508: 4618 mov r0, r3 - 804050a: f000 f9f1 bl 80408f0 + 8040584: 6a7b ldr r3, [r7, #36] ; 0x24 + 8040586: 685b ldr r3, [r3, #4] + 8040588: 2214 movs r2, #20 + 804058a: 6b79 ldr r1, [r7, #52] ; 0x34 + 804058c: 4618 mov r0, r3 + 804058e: f000 f9f1 bl 8040974 iphdr = (struct ip_hdr *)rambuf->payload; - 804050e: 6a7b ldr r3, [r7, #36] ; 0x24 - 8040510: 685b ldr r3, [r3, #4] - 8040512: 633b str r3, [r7, #48] ; 0x30 + 8040592: 6a7b ldr r3, [r7, #36] ; 0x24 + 8040594: 685b ldr r3, [r3, #4] + 8040596: 633b str r3, [r7, #48] ; 0x30 left_to_copy = fragsize; - 8040514: 8d7b ldrh r3, [r7, #42] ; 0x2a - 8040516: f8a7 3044 strh.w r3, [r7, #68] ; 0x44 + 8040598: 8d7b ldrh r3, [r7, #42] ; 0x2a + 804059a: f8a7 3044 strh.w r3, [r7, #68] ; 0x44 while (left_to_copy) { - 804051a: e064 b.n 80405e6 + 804059e: e064 b.n 804066a struct pbuf_custom_ref *pcr; u16_t plen = (u16_t)(p->len - poff); - 804051c: 68fb ldr r3, [r7, #12] - 804051e: 895a ldrh r2, [r3, #10] - 8040520: 8ffb ldrh r3, [r7, #62] ; 0x3e - 8040522: 1ad3 subs r3, r2, r3 - 8040524: 83fb strh r3, [r7, #30] + 80405a0: 68fb ldr r3, [r7, #12] + 80405a2: 895a ldrh r2, [r3, #10] + 80405a4: 8ffb ldrh r3, [r7, #62] ; 0x3e + 80405a6: 1ad3 subs r3, r2, r3 + 80405a8: 83fb strh r3, [r7, #30] LWIP_ASSERT("p->len >= poff", p->len >= poff); - 8040526: 68fb ldr r3, [r7, #12] - 8040528: 895b ldrh r3, [r3, #10] - 804052a: 8ffa ldrh r2, [r7, #62] ; 0x3e - 804052c: 429a cmp r2, r3 - 804052e: d906 bls.n 804053e - 8040530: 4b5c ldr r3, [pc, #368] ; (80406a4 ) - 8040532: f240 322d movw r2, #813 ; 0x32d - 8040536: 495f ldr r1, [pc, #380] ; (80406b4 ) - 8040538: 485c ldr r0, [pc, #368] ; (80406ac ) - 804053a: f000 fae9 bl 8040b10 + 80405aa: 68fb ldr r3, [r7, #12] + 80405ac: 895b ldrh r3, [r3, #10] + 80405ae: 8ffa ldrh r2, [r7, #62] ; 0x3e + 80405b0: 429a cmp r2, r3 + 80405b2: d906 bls.n 80405c2 + 80405b4: 4b5c ldr r3, [pc, #368] ; (8040728 ) + 80405b6: f240 322d movw r2, #813 ; 0x32d + 80405ba: 495f ldr r1, [pc, #380] ; (8040738 ) + 80405bc: 485c ldr r0, [pc, #368] ; (8040730 ) + 80405be: f000 fae9 bl 8040b94 newpbuflen = LWIP_MIN(left_to_copy, plen); - 804053e: 8bfa ldrh r2, [r7, #30] - 8040540: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 - 8040544: 4293 cmp r3, r2 - 8040546: bf28 it cs - 8040548: 4613 movcs r3, r2 - 804054a: f8a7 3046 strh.w r3, [r7, #70] ; 0x46 + 80405c2: 8bfa ldrh r2, [r7, #30] + 80405c4: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 + 80405c8: 4293 cmp r3, r2 + 80405ca: bf28 it cs + 80405cc: 4613 movcs r3, r2 + 80405ce: f8a7 3046 strh.w r3, [r7, #70] ; 0x46 /* Is this pbuf already empty? */ if (!newpbuflen) { - 804054e: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 - 8040552: 2b00 cmp r3, #0 - 8040554: d105 bne.n 8040562 + 80405d2: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 + 80405d6: 2b00 cmp r3, #0 + 80405d8: d105 bne.n 80405e6 poff = 0; - 8040556: 2300 movs r3, #0 - 8040558: 87fb strh r3, [r7, #62] ; 0x3e + 80405da: 2300 movs r3, #0 + 80405dc: 87fb strh r3, [r7, #62] ; 0x3e p = p->next; - 804055a: 68fb ldr r3, [r7, #12] - 804055c: 681b ldr r3, [r3, #0] - 804055e: 60fb str r3, [r7, #12] + 80405de: 68fb ldr r3, [r7, #12] + 80405e0: 681b ldr r3, [r3, #0] + 80405e2: 60fb str r3, [r7, #12] continue; - 8040560: e041 b.n 80405e6 + 80405e4: e041 b.n 804066a } pcr = ip_frag_alloc_pbuf_custom_ref(); - 8040562: f7ff ff0d bl 8040380 - 8040566: 61b8 str r0, [r7, #24] + 80405e6: f7ff ff0d bl 8040404 + 80405ea: 61b8 str r0, [r7, #24] if (pcr == NULL) { - 8040568: 69bb ldr r3, [r7, #24] - 804056a: 2b00 cmp r3, #0 - 804056c: d103 bne.n 8040576 + 80405ec: 69bb ldr r3, [r7, #24] + 80405ee: 2b00 cmp r3, #0 + 80405f0: d103 bne.n 80405fa pbuf_free(rambuf); - 804056e: 6a78 ldr r0, [r7, #36] ; 0x24 - 8040570: f7f7 f8e4 bl 803773c + 80405f2: 6a78 ldr r0, [r7, #36] ; 0x24 + 80405f4: f7f7 f8e4 bl 80377c0 goto memerr; - 8040574: e08f b.n 8040696 + 80405f8: e08f b.n 804071a } /* Mirror this pbuf, although we might not need all of it. */ newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc, - 8040576: 69b8 ldr r0, [r7, #24] + 80405fa: 69b8 ldr r0, [r7, #24] (u8_t *)p->payload + poff, newpbuflen); - 8040578: 68fb ldr r3, [r7, #12] - 804057a: 685a ldr r2, [r3, #4] + 80405fc: 68fb ldr r3, [r7, #12] + 80405fe: 685a ldr r2, [r3, #4] newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc, - 804057c: 8ffb ldrh r3, [r7, #62] ; 0x3e - 804057e: 4413 add r3, r2 - 8040580: f8b7 1046 ldrh.w r1, [r7, #70] ; 0x46 - 8040584: f8b7 2046 ldrh.w r2, [r7, #70] ; 0x46 - 8040588: 9201 str r2, [sp, #4] - 804058a: 9300 str r3, [sp, #0] - 804058c: 4603 mov r3, r0 - 804058e: 2241 movs r2, #65 ; 0x41 - 8040590: 2000 movs r0, #0 - 8040592: f7f6 ff19 bl 80373c8 - 8040596: 6178 str r0, [r7, #20] + 8040600: 8ffb ldrh r3, [r7, #62] ; 0x3e + 8040602: 4413 add r3, r2 + 8040604: f8b7 1046 ldrh.w r1, [r7, #70] ; 0x46 + 8040608: f8b7 2046 ldrh.w r2, [r7, #70] ; 0x46 + 804060c: 9201 str r2, [sp, #4] + 804060e: 9300 str r3, [sp, #0] + 8040610: 4603 mov r3, r0 + 8040612: 2241 movs r2, #65 ; 0x41 + 8040614: 2000 movs r0, #0 + 8040616: f7f6 ff19 bl 803744c + 804061a: 6178 str r0, [r7, #20] if (newpbuf == NULL) { - 8040598: 697b ldr r3, [r7, #20] - 804059a: 2b00 cmp r3, #0 - 804059c: d106 bne.n 80405ac + 804061c: 697b ldr r3, [r7, #20] + 804061e: 2b00 cmp r3, #0 + 8040620: d106 bne.n 8040630 ip_frag_free_pbuf_custom_ref(pcr); - 804059e: 69b8 ldr r0, [r7, #24] - 80405a0: f7ff fef6 bl 8040390 + 8040622: 69b8 ldr r0, [r7, #24] + 8040624: f7ff fef6 bl 8040414 pbuf_free(rambuf); - 80405a4: 6a78 ldr r0, [r7, #36] ; 0x24 - 80405a6: f7f7 f8c9 bl 803773c + 8040628: 6a78 ldr r0, [r7, #36] ; 0x24 + 804062a: f7f7 f8c9 bl 80377c0 goto memerr; - 80405aa: e074 b.n 8040696 + 804062e: e074 b.n 804071a } pbuf_ref(p); - 80405ac: 68f8 ldr r0, [r7, #12] - 80405ae: f7f7 f965 bl 803787c + 8040630: 68f8 ldr r0, [r7, #12] + 8040632: f7f7 f965 bl 8037900 pcr->original = p; - 80405b2: 69bb ldr r3, [r7, #24] - 80405b4: 68fa ldr r2, [r7, #12] - 80405b6: 615a str r2, [r3, #20] + 8040636: 69bb ldr r3, [r7, #24] + 8040638: 68fa ldr r2, [r7, #12] + 804063a: 615a str r2, [r3, #20] pcr->pc.custom_free_function = ipfrag_free_pbuf_custom; - 80405b8: 69bb ldr r3, [r7, #24] - 80405ba: 4a3f ldr r2, [pc, #252] ; (80406b8 ) - 80405bc: 611a str r2, [r3, #16] + 804063c: 69bb ldr r3, [r7, #24] + 804063e: 4a3f ldr r2, [pc, #252] ; (804073c ) + 8040640: 611a str r2, [r3, #16] /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain * so that it is removed when pbuf_dechain is later called on rambuf. */ pbuf_cat(rambuf, newpbuf); - 80405be: 6979 ldr r1, [r7, #20] - 80405c0: 6a78 ldr r0, [r7, #36] ; 0x24 - 80405c2: f7f7 f97d bl 80378c0 + 8040642: 6979 ldr r1, [r7, #20] + 8040644: 6a78 ldr r0, [r7, #36] ; 0x24 + 8040646: f7f7 f97d bl 8037944 left_to_copy = (u16_t)(left_to_copy - newpbuflen); - 80405c6: f8b7 2044 ldrh.w r2, [r7, #68] ; 0x44 - 80405ca: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 - 80405ce: 1ad3 subs r3, r2, r3 - 80405d0: f8a7 3044 strh.w r3, [r7, #68] ; 0x44 + 804064a: f8b7 2044 ldrh.w r2, [r7, #68] ; 0x44 + 804064e: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 + 8040652: 1ad3 subs r3, r2, r3 + 8040654: f8a7 3044 strh.w r3, [r7, #68] ; 0x44 if (left_to_copy) { - 80405d4: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 - 80405d8: 2b00 cmp r3, #0 - 80405da: d004 beq.n 80405e6 + 8040658: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 + 804065c: 2b00 cmp r3, #0 + 804065e: d004 beq.n 804066a poff = 0; - 80405dc: 2300 movs r3, #0 - 80405de: 87fb strh r3, [r7, #62] ; 0x3e + 8040660: 2300 movs r3, #0 + 8040662: 87fb strh r3, [r7, #62] ; 0x3e p = p->next; - 80405e0: 68fb ldr r3, [r7, #12] - 80405e2: 681b ldr r3, [r3, #0] - 80405e4: 60fb str r3, [r7, #12] + 8040664: 68fb ldr r3, [r7, #12] + 8040666: 681b ldr r3, [r3, #0] + 8040668: 60fb str r3, [r7, #12] while (left_to_copy) { - 80405e6: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 - 80405ea: 2b00 cmp r3, #0 - 80405ec: d196 bne.n 804051c + 804066a: f8b7 3044 ldrh.w r3, [r7, #68] ; 0x44 + 804066e: 2b00 cmp r3, #0 + 8040670: d196 bne.n 80405a0 } } poff = (u16_t)(poff + newpbuflen); - 80405ee: 8ffa ldrh r2, [r7, #62] ; 0x3e - 80405f0: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 - 80405f4: 4413 add r3, r2 - 80405f6: 87fb strh r3, [r7, #62] ; 0x3e + 8040672: 8ffa ldrh r2, [r7, #62] ; 0x3e + 8040674: f8b7 3046 ldrh.w r3, [r7, #70] ; 0x46 + 8040678: 4413 add r3, r2 + 804067a: 87fb strh r3, [r7, #62] ; 0x3e #endif /* LWIP_NETIF_TX_SINGLE_PBUF */ /* Correct header */ last = (left <= netif->mtu - IP_HLEN); - 80405f8: 68bb ldr r3, [r7, #8] - 80405fa: 8d1b ldrh r3, [r3, #40] ; 0x28 - 80405fc: f1a3 0213 sub.w r2, r3, #19 - 8040600: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 8040604: 429a cmp r2, r3 - 8040606: bfcc ite gt - 8040608: 2301 movgt r3, #1 - 804060a: 2300 movle r3, #0 - 804060c: b2db uxtb r3, r3 - 804060e: 623b str r3, [r7, #32] + 804067c: 68bb ldr r3, [r7, #8] + 804067e: 8d1b ldrh r3, [r3, #40] ; 0x28 + 8040680: f1a3 0213 sub.w r2, r3, #19 + 8040684: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 8040688: 429a cmp r2, r3 + 804068a: bfcc ite gt + 804068c: 2301 movgt r3, #1 + 804068e: 2300 movle r3, #0 + 8040690: b2db uxtb r3, r3 + 8040692: 623b str r3, [r7, #32] /* Set new offset and MF flag */ tmp = (IP_OFFMASK & (ofo)); - 8040610: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 - 8040614: f3c3 030c ubfx r3, r3, #0, #13 - 8040618: 87bb strh r3, [r7, #60] ; 0x3c + 8040694: f8b7 3040 ldrh.w r3, [r7, #64] ; 0x40 + 8040698: f3c3 030c ubfx r3, r3, #0, #13 + 804069c: 87bb strh r3, [r7, #60] ; 0x3c if (!last || mf_set) { - 804061a: 6a3b ldr r3, [r7, #32] - 804061c: 2b00 cmp r3, #0 - 804061e: d002 beq.n 8040626 - 8040620: 6afb ldr r3, [r7, #44] ; 0x2c - 8040622: 2b00 cmp r3, #0 - 8040624: d003 beq.n 804062e + 804069e: 6a3b ldr r3, [r7, #32] + 80406a0: 2b00 cmp r3, #0 + 80406a2: d002 beq.n 80406aa + 80406a4: 6afb ldr r3, [r7, #44] ; 0x2c + 80406a6: 2b00 cmp r3, #0 + 80406a8: d003 beq.n 80406b2 /* the last fragment has MF set if the input frame had it */ tmp = tmp | IP_MF; - 8040626: 8fbb ldrh r3, [r7, #60] ; 0x3c - 8040628: f443 5300 orr.w r3, r3, #8192 ; 0x2000 - 804062c: 87bb strh r3, [r7, #60] ; 0x3c + 80406aa: 8fbb ldrh r3, [r7, #60] ; 0x3c + 80406ac: f443 5300 orr.w r3, r3, #8192 ; 0x2000 + 80406b0: 87bb strh r3, [r7, #60] ; 0x3c } IPH_OFFSET_SET(iphdr, lwip_htons(tmp)); - 804062e: 8fbb ldrh r3, [r7, #60] ; 0x3c - 8040630: 4618 mov r0, r3 - 8040632: f7f5 fc51 bl 8035ed8 - 8040636: 4603 mov r3, r0 - 8040638: 461a mov r2, r3 - 804063a: 6b3b ldr r3, [r7, #48] ; 0x30 - 804063c: 80da strh r2, [r3, #6] + 80406b2: 8fbb ldrh r3, [r7, #60] ; 0x3c + 80406b4: 4618 mov r0, r3 + 80406b6: f7f5 fc51 bl 8035f5c + 80406ba: 4603 mov r3, r0 + 80406bc: 461a mov r2, r3 + 80406be: 6b3b ldr r3, [r7, #48] ; 0x30 + 80406c0: 80da strh r2, [r3, #6] IPH_LEN_SET(iphdr, lwip_htons((u16_t)(fragsize + IP_HLEN))); - 804063e: 8d7b ldrh r3, [r7, #42] ; 0x2a - 8040640: 3314 adds r3, #20 - 8040642: b29b uxth r3, r3 - 8040644: 4618 mov r0, r3 - 8040646: f7f5 fc47 bl 8035ed8 - 804064a: 4603 mov r3, r0 - 804064c: 461a mov r2, r3 - 804064e: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040650: 805a strh r2, [r3, #2] + 80406c2: 8d7b ldrh r3, [r7, #42] ; 0x2a + 80406c4: 3314 adds r3, #20 + 80406c6: b29b uxth r3, r3 + 80406c8: 4618 mov r0, r3 + 80406ca: f7f5 fc47 bl 8035f5c + 80406ce: 4603 mov r3, r0 + 80406d0: 461a mov r2, r3 + 80406d2: 6b3b ldr r3, [r7, #48] ; 0x30 + 80406d4: 805a strh r2, [r3, #2] IPH_CHKSUM_SET(iphdr, 0); - 8040652: 6b3b ldr r3, [r7, #48] ; 0x30 - 8040654: 2200 movs r2, #0 - 8040656: 729a strb r2, [r3, #10] - 8040658: 2200 movs r2, #0 - 804065a: 72da strb r2, [r3, #11] + 80406d6: 6b3b ldr r3, [r7, #48] ; 0x30 + 80406d8: 2200 movs r2, #0 + 80406da: 729a strb r2, [r3, #10] + 80406dc: 2200 movs r2, #0 + 80406de: 72da strb r2, [r3, #11] #endif /* CHECKSUM_GEN_IP */ /* No need for separate header pbuf - we allowed room for it in rambuf * when allocated. */ netif->output(netif, rambuf, dest); - 804065c: 68bb ldr r3, [r7, #8] - 804065e: 695b ldr r3, [r3, #20] - 8040660: 687a ldr r2, [r7, #4] - 8040662: 6a79 ldr r1, [r7, #36] ; 0x24 - 8040664: 68b8 ldr r0, [r7, #8] - 8040666: 4798 blx r3 + 80406e0: 68bb ldr r3, [r7, #8] + 80406e2: 695b ldr r3, [r3, #20] + 80406e4: 687a ldr r2, [r7, #4] + 80406e6: 6a79 ldr r1, [r7, #36] ; 0x24 + 80406e8: 68b8 ldr r0, [r7, #8] + 80406ea: 4798 blx r3 * recreate it next time round the loop. If we're lucky the hardware * will have already sent the packet, the free will really free, and * there will be zero memory penalty. */ pbuf_free(rambuf); - 8040668: 6a78 ldr r0, [r7, #36] ; 0x24 - 804066a: f7f7 f867 bl 803773c + 80406ec: 6a78 ldr r0, [r7, #36] ; 0x24 + 80406ee: f7f7 f867 bl 80377c0 left = (u16_t)(left - fragsize); - 804066e: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 - 8040672: 8d7b ldrh r3, [r7, #42] ; 0x2a - 8040674: 1ad3 subs r3, r2, r3 - 8040676: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 + 80406f2: f8b7 2042 ldrh.w r2, [r7, #66] ; 0x42 + 80406f6: 8d7b ldrh r3, [r7, #42] ; 0x2a + 80406f8: 1ad3 subs r3, r2, r3 + 80406fa: f8a7 3042 strh.w r3, [r7, #66] ; 0x42 ofo = (u16_t)(ofo + nfb); - 804067a: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 - 804067e: 8f7b ldrh r3, [r7, #58] ; 0x3a - 8040680: 4413 add r3, r2 - 8040682: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 + 80406fe: f8b7 2040 ldrh.w r2, [r7, #64] ; 0x40 + 8040702: 8f7b ldrh r3, [r7, #58] ; 0x3a + 8040704: 4413 add r3, r2 + 8040706: f8a7 3040 strh.w r3, [r7, #64] ; 0x40 while (left) { - 8040686: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 - 804068a: 2b00 cmp r3, #0 - 804068c: f47f af19 bne.w 80404c2 + 804070a: f8b7 3042 ldrh.w r3, [r7, #66] ; 0x42 + 804070e: 2b00 cmp r3, #0 + 8040710: f47f af19 bne.w 8040546 } MIB2_STATS_INC(mib2.ipfragoks); return ERR_OK; - 8040690: 2300 movs r3, #0 - 8040692: e002 b.n 804069a + 8040714: 2300 movs r3, #0 + 8040716: e002 b.n 804071e goto memerr; - 8040694: bf00 nop + 8040718: bf00 nop memerr: MIB2_STATS_INC(mib2.ipfragfails); return ERR_MEM; - 8040696: f04f 33ff mov.w r3, #4294967295 -} - 804069a: 4618 mov r0, r3 - 804069c: 3748 adds r7, #72 ; 0x48 - 804069e: 46bd mov sp, r7 - 80406a0: bd80 pop {r7, pc} - 80406a2: bf00 nop - 80406a4: 080449f0 .word 0x080449f0 - 80406a8: 08044bcc .word 0x08044bcc - 80406ac: 08044a38 .word 0x08044a38 - 80406b0: 08044be8 .word 0x08044be8 - 80406b4: 08044c08 .word 0x08044c08 - 80406b8: 080403c9 .word 0x080403c9 - -080406bc : + 804071a: f04f 33ff mov.w r3, #4294967295 +} + 804071e: 4618 mov r0, r3 + 8040720: 3748 adds r7, #72 ; 0x48 + 8040722: 46bd mov sp, r7 + 8040724: bd80 pop {r7, pc} + 8040726: bf00 nop + 8040728: 08044a70 .word 0x08044a70 + 804072c: 08044c4c .word 0x08044c4c + 8040730: 08044ab8 .word 0x08044ab8 + 8040734: 08044c68 .word 0x08044c68 + 8040738: 08044c88 .word 0x08044c88 + 804073c: 0804044d .word 0x0804044d + +08040740 : * @see ETHARP_SUPPORT_VLAN * @see LWIP_HOOK_VLAN_CHECK */ err_t ethernet_input(struct pbuf *p, struct netif *netif) { - 80406bc: b580 push {r7, lr} - 80406be: b086 sub sp, #24 - 80406c0: af00 add r7, sp, #0 - 80406c2: 6078 str r0, [r7, #4] - 80406c4: 6039 str r1, [r7, #0] + 8040740: b580 push {r7, lr} + 8040742: b086 sub sp, #24 + 8040744: af00 add r7, sp, #0 + 8040746: 6078 str r0, [r7, #4] + 8040748: 6039 str r1, [r7, #0] struct eth_hdr *ethhdr; u16_t type; #if LWIP_ARP || ETHARP_SUPPORT_VLAN || LWIP_IPV6 u16_t next_hdr_offset = SIZEOF_ETH_HDR; - 80406c6: 230e movs r3, #14 - 80406c8: 82fb strh r3, [r7, #22] + 804074a: 230e movs r3, #14 + 804074c: 82fb strh r3, [r7, #22] #endif /* LWIP_ARP || ETHARP_SUPPORT_VLAN */ LWIP_ASSERT_CORE_LOCKED(); if (p->len <= SIZEOF_ETH_HDR) { - 80406ca: 687b ldr r3, [r7, #4] - 80406cc: 895b ldrh r3, [r3, #10] - 80406ce: 2b0e cmp r3, #14 - 80406d0: d96e bls.n 80407b0 + 804074e: 687b ldr r3, [r7, #4] + 8040750: 895b ldrh r3, [r3, #10] + 8040752: 2b0e cmp r3, #14 + 8040754: d96e bls.n 8040834 ETHARP_STATS_INC(etharp.drop); MIB2_STATS_NETIF_INC(netif, ifinerrors); goto free_and_return; } if (p->if_idx == NETIF_NO_INDEX) { - 80406d2: 687b ldr r3, [r7, #4] - 80406d4: 7bdb ldrb r3, [r3, #15] - 80406d6: 2b00 cmp r3, #0 - 80406d8: d106 bne.n 80406e8 + 8040756: 687b ldr r3, [r7, #4] + 8040758: 7bdb ldrb r3, [r3, #15] + 804075a: 2b00 cmp r3, #0 + 804075c: d106 bne.n 804076c p->if_idx = netif_get_index(netif); - 80406da: 683b ldr r3, [r7, #0] - 80406dc: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 - 80406e0: 3301 adds r3, #1 - 80406e2: b2da uxtb r2, r3 - 80406e4: 687b ldr r3, [r7, #4] - 80406e6: 73da strb r2, [r3, #15] + 804075e: 683b ldr r3, [r7, #0] + 8040760: f893 3034 ldrb.w r3, [r3, #52] ; 0x34 + 8040764: 3301 adds r3, #1 + 8040766: b2da uxtb r2, r3 + 8040768: 687b ldr r3, [r7, #4] + 804076a: 73da strb r2, [r3, #15] } /* points to packet payload, which starts with an Ethernet header */ ethhdr = (struct eth_hdr *)p->payload; - 80406e8: 687b ldr r3, [r7, #4] - 80406ea: 685b ldr r3, [r3, #4] - 80406ec: 613b str r3, [r7, #16] + 804076c: 687b ldr r3, [r7, #4] + 804076e: 685b ldr r3, [r3, #4] + 8040770: 613b str r3, [r7, #16] (unsigned char)ethhdr->dest.addr[3], (unsigned char)ethhdr->dest.addr[4], (unsigned char)ethhdr->dest.addr[5], (unsigned char)ethhdr->src.addr[0], (unsigned char)ethhdr->src.addr[1], (unsigned char)ethhdr->src.addr[2], (unsigned char)ethhdr->src.addr[3], (unsigned char)ethhdr->src.addr[4], (unsigned char)ethhdr->src.addr[5], lwip_htons(ethhdr->type))); type = ethhdr->type; - 80406ee: 693b ldr r3, [r7, #16] - 80406f0: 7b1a ldrb r2, [r3, #12] - 80406f2: 7b5b ldrb r3, [r3, #13] - 80406f4: 021b lsls r3, r3, #8 - 80406f6: 4313 orrs r3, r2 - 80406f8: 81fb strh r3, [r7, #14] + 8040772: 693b ldr r3, [r7, #16] + 8040774: 7b1a ldrb r2, [r3, #12] + 8040776: 7b5b ldrb r3, [r3, #13] + 8040778: 021b lsls r3, r3, #8 + 804077a: 4313 orrs r3, r2 + 804077c: 81fb strh r3, [r7, #14] #if LWIP_ARP_FILTER_NETIF netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, lwip_htons(type)); #endif /* LWIP_ARP_FILTER_NETIF*/ if (ethhdr->dest.addr[0] & 1) { - 80406fa: 693b ldr r3, [r7, #16] - 80406fc: 781b ldrb r3, [r3, #0] - 80406fe: f003 0301 and.w r3, r3, #1 - 8040702: 2b00 cmp r3, #0 - 8040704: d023 beq.n 804074e + 804077e: 693b ldr r3, [r7, #16] + 8040780: 781b ldrb r3, [r3, #0] + 8040782: f003 0301 and.w r3, r3, #1 + 8040786: 2b00 cmp r3, #0 + 8040788: d023 beq.n 80407d2 /* this might be a multicast or broadcast packet */ if (ethhdr->dest.addr[0] == LL_IP4_MULTICAST_ADDR_0) { - 8040706: 693b ldr r3, [r7, #16] - 8040708: 781b ldrb r3, [r3, #0] - 804070a: 2b01 cmp r3, #1 - 804070c: d10f bne.n 804072e + 804078a: 693b ldr r3, [r7, #16] + 804078c: 781b ldrb r3, [r3, #0] + 804078e: 2b01 cmp r3, #1 + 8040790: d10f bne.n 80407b2 #if LWIP_IPV4 if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) && - 804070e: 693b ldr r3, [r7, #16] - 8040710: 785b ldrb r3, [r3, #1] - 8040712: 2b00 cmp r3, #0 - 8040714: d11b bne.n 804074e + 8040792: 693b ldr r3, [r7, #16] + 8040794: 785b ldrb r3, [r3, #1] + 8040796: 2b00 cmp r3, #0 + 8040798: d11b bne.n 80407d2 (ethhdr->dest.addr[2] == LL_IP4_MULTICAST_ADDR_2)) { - 8040716: 693b ldr r3, [r7, #16] - 8040718: 789b ldrb r3, [r3, #2] + 804079a: 693b ldr r3, [r7, #16] + 804079c: 789b ldrb r3, [r3, #2] if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) && - 804071a: 2b5e cmp r3, #94 ; 0x5e - 804071c: d117 bne.n 804074e + 804079e: 2b5e cmp r3, #94 ; 0x5e + 80407a0: d117 bne.n 80407d2 /* mark the pbuf as link-layer multicast */ p->flags |= PBUF_FLAG_LLMCAST; - 804071e: 687b ldr r3, [r7, #4] - 8040720: 7b5b ldrb r3, [r3, #13] - 8040722: f043 0310 orr.w r3, r3, #16 - 8040726: b2da uxtb r2, r3 - 8040728: 687b ldr r3, [r7, #4] - 804072a: 735a strb r2, [r3, #13] - 804072c: e00f b.n 804074e + 80407a2: 687b ldr r3, [r7, #4] + 80407a4: 7b5b ldrb r3, [r3, #13] + 80407a6: f043 0310 orr.w r3, r3, #16 + 80407aa: b2da uxtb r2, r3 + 80407ac: 687b ldr r3, [r7, #4] + 80407ae: 735a strb r2, [r3, #13] + 80407b0: e00f b.n 80407d2 (ethhdr->dest.addr[1] == LL_IP6_MULTICAST_ADDR_1)) { /* mark the pbuf as link-layer multicast */ p->flags |= PBUF_FLAG_LLMCAST; } #endif /* LWIP_IPV6 */ else if (eth_addr_cmp(ðhdr->dest, ðbroadcast)) { - 804072e: 693b ldr r3, [r7, #16] - 8040730: 2206 movs r2, #6 - 8040732: 4928 ldr r1, [pc, #160] ; (80407d4 ) - 8040734: 4618 mov r0, r3 - 8040736: f000 f8cb bl 80408d0 - 804073a: 4603 mov r3, r0 - 804073c: 2b00 cmp r3, #0 - 804073e: d106 bne.n 804074e + 80407b2: 693b ldr r3, [r7, #16] + 80407b4: 2206 movs r2, #6 + 80407b6: 4928 ldr r1, [pc, #160] ; (8040858 ) + 80407b8: 4618 mov r0, r3 + 80407ba: f000 f8cb bl 8040954 + 80407be: 4603 mov r3, r0 + 80407c0: 2b00 cmp r3, #0 + 80407c2: d106 bne.n 80407d2 /* mark the pbuf as link-layer broadcast */ p->flags |= PBUF_FLAG_LLBCAST; - 8040740: 687b ldr r3, [r7, #4] - 8040742: 7b5b ldrb r3, [r3, #13] - 8040744: f043 0308 orr.w r3, r3, #8 - 8040748: b2da uxtb r2, r3 - 804074a: 687b ldr r3, [r7, #4] - 804074c: 735a strb r2, [r3, #13] + 80407c4: 687b ldr r3, [r7, #4] + 80407c6: 7b5b ldrb r3, [r3, #13] + 80407c8: f043 0308 orr.w r3, r3, #8 + 80407cc: b2da uxtb r2, r3 + 80407ce: 687b ldr r3, [r7, #4] + 80407d0: 735a strb r2, [r3, #13] } } switch (type) { - 804074e: 89fb ldrh r3, [r7, #14] - 8040750: 2b08 cmp r3, #8 - 8040752: d003 beq.n 804075c - 8040754: f5b3 6fc1 cmp.w r3, #1544 ; 0x608 - 8040758: d014 beq.n 8040784 + 80407d2: 89fb ldrh r3, [r7, #14] + 80407d4: 2b08 cmp r3, #8 + 80407d6: d003 beq.n 80407e0 + 80407d8: f5b3 6fc1 cmp.w r3, #1544 ; 0x608 + 80407dc: d014 beq.n 8040808 } #endif ETHARP_STATS_INC(etharp.proterr); ETHARP_STATS_INC(etharp.drop); MIB2_STATS_NETIF_INC(netif, ifinunknownprotos); goto free_and_return; - 804075a: e032 b.n 80407c2 + 80407de: e032 b.n 8040846 if (!(netif->flags & NETIF_FLAG_ETHARP)) { - 804075c: 683b ldr r3, [r7, #0] - 804075e: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 8040762: f003 0308 and.w r3, r3, #8 - 8040766: 2b00 cmp r3, #0 - 8040768: d024 beq.n 80407b4 + 80407e0: 683b ldr r3, [r7, #0] + 80407e2: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 80407e6: f003 0308 and.w r3, r3, #8 + 80407ea: 2b00 cmp r3, #0 + 80407ec: d024 beq.n 8040838 if (pbuf_remove_header(p, next_hdr_offset)) { - 804076a: 8afb ldrh r3, [r7, #22] - 804076c: 4619 mov r1, r3 - 804076e: 6878 ldr r0, [r7, #4] - 8040770: f7f6 ff5e bl 8037630 - 8040774: 4603 mov r3, r0 - 8040776: 2b00 cmp r3, #0 - 8040778: d11e bne.n 80407b8 + 80407ee: 8afb ldrh r3, [r7, #22] + 80407f0: 4619 mov r1, r3 + 80407f2: 6878 ldr r0, [r7, #4] + 80407f4: f7f6 ff5e bl 80376b4 + 80407f8: 4603 mov r3, r0 + 80407fa: 2b00 cmp r3, #0 + 80407fc: d11e bne.n 804083c ip4_input(p, netif); - 804077a: 6839 ldr r1, [r7, #0] - 804077c: 6878 ldr r0, [r7, #4] - 804077e: f7fe ff21 bl 803f5c4 + 80407fe: 6839 ldr r1, [r7, #0] + 8040800: 6878 ldr r0, [r7, #4] + 8040802: f7fe ff21 bl 803f648 break; - 8040782: e013 b.n 80407ac + 8040806: e013 b.n 8040830 if (!(netif->flags & NETIF_FLAG_ETHARP)) { - 8040784: 683b ldr r3, [r7, #0] - 8040786: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 - 804078a: f003 0308 and.w r3, r3, #8 - 804078e: 2b00 cmp r3, #0 - 8040790: d014 beq.n 80407bc + 8040808: 683b ldr r3, [r7, #0] + 804080a: f893 3031 ldrb.w r3, [r3, #49] ; 0x31 + 804080e: f003 0308 and.w r3, r3, #8 + 8040812: 2b00 cmp r3, #0 + 8040814: d014 beq.n 8040840 if (pbuf_remove_header(p, next_hdr_offset)) { - 8040792: 8afb ldrh r3, [r7, #22] - 8040794: 4619 mov r1, r3 - 8040796: 6878 ldr r0, [r7, #4] - 8040798: f7f6 ff4a bl 8037630 - 804079c: 4603 mov r3, r0 - 804079e: 2b00 cmp r3, #0 - 80407a0: d10e bne.n 80407c0 + 8040816: 8afb ldrh r3, [r7, #22] + 8040818: 4619 mov r1, r3 + 804081a: 6878 ldr r0, [r7, #4] + 804081c: f7f6 ff4a bl 80376b4 + 8040820: 4603 mov r3, r0 + 8040822: 2b00 cmp r3, #0 + 8040824: d10e bne.n 8040844 etharp_input(p, netif); - 80407a2: 6839 ldr r1, [r7, #0] - 80407a4: 6878 ldr r0, [r7, #4] - 80407a6: f7fe f89b bl 803e8e0 + 8040826: 6839 ldr r1, [r7, #0] + 8040828: 6878 ldr r0, [r7, #4] + 804082a: f7fe f89b bl 803e964 break; - 80407aa: bf00 nop + 804082e: bf00 nop } /* This means the pbuf is freed or consumed, so the caller doesn't have to free it again */ return ERR_OK; - 80407ac: 2300 movs r3, #0 - 80407ae: e00c b.n 80407ca + 8040830: 2300 movs r3, #0 + 8040832: e00c b.n 804084e goto free_and_return; - 80407b0: bf00 nop - 80407b2: e006 b.n 80407c2 + 8040834: bf00 nop + 8040836: e006 b.n 8040846 goto free_and_return; - 80407b4: bf00 nop - 80407b6: e004 b.n 80407c2 + 8040838: bf00 nop + 804083a: e004 b.n 8040846 goto free_and_return; - 80407b8: bf00 nop - 80407ba: e002 b.n 80407c2 + 804083c: bf00 nop + 804083e: e002 b.n 8040846 goto free_and_return; - 80407bc: bf00 nop - 80407be: e000 b.n 80407c2 + 8040840: bf00 nop + 8040842: e000 b.n 8040846 goto free_and_return; - 80407c0: bf00 nop + 8040844: bf00 nop free_and_return: pbuf_free(p); - 80407c2: 6878 ldr r0, [r7, #4] - 80407c4: f7f6 ffba bl 803773c + 8040846: 6878 ldr r0, [r7, #4] + 8040848: f7f6 ffba bl 80377c0 return ERR_OK; - 80407c8: 2300 movs r3, #0 + 804084c: 2300 movs r3, #0 } - 80407ca: 4618 mov r0, r3 - 80407cc: 3718 adds r7, #24 - 80407ce: 46bd mov sp, r7 - 80407d0: bd80 pop {r7, pc} - 80407d2: bf00 nop - 80407d4: 08044e04 .word 0x08044e04 + 804084e: 4618 mov r0, r3 + 8040850: 3718 adds r7, #24 + 8040852: 46bd mov sp, r7 + 8040854: bd80 pop {r7, pc} + 8040856: bf00 nop + 8040858: 08044e84 .word 0x08044e84 -080407d8 : +0804085c : * @return ERR_OK if the packet was sent, any other err_t on failure */ err_t ethernet_output(struct netif * netif, struct pbuf * p, const struct eth_addr * src, const struct eth_addr * dst, u16_t eth_type) { - 80407d8: b580 push {r7, lr} - 80407da: b086 sub sp, #24 - 80407dc: af00 add r7, sp, #0 - 80407de: 60f8 str r0, [r7, #12] - 80407e0: 60b9 str r1, [r7, #8] - 80407e2: 607a str r2, [r7, #4] - 80407e4: 603b str r3, [r7, #0] + 804085c: b580 push {r7, lr} + 804085e: b086 sub sp, #24 + 8040860: af00 add r7, sp, #0 + 8040862: 60f8 str r0, [r7, #12] + 8040864: 60b9 str r1, [r7, #8] + 8040866: 607a str r2, [r7, #4] + 8040868: 603b str r3, [r7, #0] struct eth_hdr *ethhdr; u16_t eth_type_be = lwip_htons(eth_type); - 80407e6: 8c3b ldrh r3, [r7, #32] - 80407e8: 4618 mov r0, r3 - 80407ea: f7f5 fb75 bl 8035ed8 - 80407ee: 4603 mov r3, r0 - 80407f0: 82fb strh r3, [r7, #22] + 804086a: 8c3b ldrh r3, [r7, #32] + 804086c: 4618 mov r0, r3 + 804086e: f7f5 fb75 bl 8035f5c + 8040872: 4603 mov r3, r0 + 8040874: 82fb strh r3, [r7, #22] eth_type_be = PP_HTONS(ETHTYPE_VLAN); } else #endif /* ETHARP_SUPPORT_VLAN && defined(LWIP_HOOK_VLAN_SET) */ { if (pbuf_add_header(p, SIZEOF_ETH_HDR) != 0) { - 80407f2: 210e movs r1, #14 - 80407f4: 68b8 ldr r0, [r7, #8] - 80407f6: f7f6 ff0b bl 8037610 - 80407fa: 4603 mov r3, r0 - 80407fc: 2b00 cmp r3, #0 - 80407fe: d125 bne.n 804084c + 8040876: 210e movs r1, #14 + 8040878: 68b8 ldr r0, [r7, #8] + 804087a: f7f6 ff0b bl 8037694 + 804087e: 4603 mov r3, r0 + 8040880: 2b00 cmp r3, #0 + 8040882: d125 bne.n 80408d0 } } LWIP_ASSERT_CORE_LOCKED(); ethhdr = (struct eth_hdr *)p->payload; - 8040800: 68bb ldr r3, [r7, #8] - 8040802: 685b ldr r3, [r3, #4] - 8040804: 613b str r3, [r7, #16] + 8040884: 68bb ldr r3, [r7, #8] + 8040886: 685b ldr r3, [r3, #4] + 8040888: 613b str r3, [r7, #16] ethhdr->type = eth_type_be; - 8040806: 693b ldr r3, [r7, #16] - 8040808: 8afa ldrh r2, [r7, #22] - 804080a: 819a strh r2, [r3, #12] + 804088a: 693b ldr r3, [r7, #16] + 804088c: 8afa ldrh r2, [r7, #22] + 804088e: 819a strh r2, [r3, #12] SMEMCPY(ðhdr->dest, dst, ETH_HWADDR_LEN); - 804080c: 693b ldr r3, [r7, #16] - 804080e: 2206 movs r2, #6 - 8040810: 6839 ldr r1, [r7, #0] - 8040812: 4618 mov r0, r3 - 8040814: f000 f86c bl 80408f0 + 8040890: 693b ldr r3, [r7, #16] + 8040892: 2206 movs r2, #6 + 8040894: 6839 ldr r1, [r7, #0] + 8040896: 4618 mov r0, r3 + 8040898: f000 f86c bl 8040974 SMEMCPY(ðhdr->src, src, ETH_HWADDR_LEN); - 8040818: 693b ldr r3, [r7, #16] - 804081a: 3306 adds r3, #6 - 804081c: 2206 movs r2, #6 - 804081e: 6879 ldr r1, [r7, #4] - 8040820: 4618 mov r0, r3 - 8040822: f000 f865 bl 80408f0 + 804089c: 693b ldr r3, [r7, #16] + 804089e: 3306 adds r3, #6 + 80408a0: 2206 movs r2, #6 + 80408a2: 6879 ldr r1, [r7, #4] + 80408a4: 4618 mov r0, r3 + 80408a6: f000 f865 bl 8040974 LWIP_ASSERT("netif->hwaddr_len must be 6 for ethernet_output!", - 8040826: 68fb ldr r3, [r7, #12] - 8040828: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 - 804082c: 2b06 cmp r3, #6 - 804082e: d006 beq.n 804083e - 8040830: 4b0a ldr r3, [pc, #40] ; (804085c ) - 8040832: f44f 7299 mov.w r2, #306 ; 0x132 - 8040836: 490a ldr r1, [pc, #40] ; (8040860 ) - 8040838: 480a ldr r0, [pc, #40] ; (8040864 ) - 804083a: f000 f969 bl 8040b10 + 80408aa: 68fb ldr r3, [r7, #12] + 80408ac: f893 3030 ldrb.w r3, [r3, #48] ; 0x30 + 80408b0: 2b06 cmp r3, #6 + 80408b2: d006 beq.n 80408c2 + 80408b4: 4b0a ldr r3, [pc, #40] ; (80408e0 ) + 80408b6: f44f 7299 mov.w r2, #306 ; 0x132 + 80408ba: 490a ldr r1, [pc, #40] ; (80408e4 ) + 80408bc: 480a ldr r0, [pc, #40] ; (80408e8 ) + 80408be: f000 f969 bl 8040b94 (netif->hwaddr_len == ETH_HWADDR_LEN)); LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("ethernet_output: sending packet %p\n", (void *)p)); /* send the packet */ return netif->linkoutput(netif, p); - 804083e: 68fb ldr r3, [r7, #12] - 8040840: 699b ldr r3, [r3, #24] - 8040842: 68b9 ldr r1, [r7, #8] - 8040844: 68f8 ldr r0, [r7, #12] - 8040846: 4798 blx r3 - 8040848: 4603 mov r3, r0 - 804084a: e002 b.n 8040852 + 80408c2: 68fb ldr r3, [r7, #12] + 80408c4: 699b ldr r3, [r3, #24] + 80408c6: 68b9 ldr r1, [r7, #8] + 80408c8: 68f8 ldr r0, [r7, #12] + 80408ca: 4798 blx r3 + 80408cc: 4603 mov r3, r0 + 80408ce: e002 b.n 80408d6 goto pbuf_header_failed; - 804084c: bf00 nop + 80408d0: bf00 nop pbuf_header_failed: LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("ethernet_output: could not allocate room for header.\n")); LINK_STATS_INC(link.lenerr); return ERR_BUF; - 804084e: f06f 0301 mvn.w r3, #1 -} - 8040852: 4618 mov r0, r3 - 8040854: 3718 adds r7, #24 - 8040856: 46bd mov sp, r7 - 8040858: bd80 pop {r7, pc} - 804085a: bf00 nop - 804085c: 08044c18 .word 0x08044c18 - 8040860: 08044c50 .word 0x08044c50 - 8040864: 08044c84 .word 0x08044c84 - -08040868 <__libc_init_array>: - 8040868: b570 push {r4, r5, r6, lr} - 804086a: 4d0d ldr r5, [pc, #52] ; (80408a0 <__libc_init_array+0x38>) - 804086c: 4c0d ldr r4, [pc, #52] ; (80408a4 <__libc_init_array+0x3c>) - 804086e: 1b64 subs r4, r4, r5 - 8040870: 10a4 asrs r4, r4, #2 - 8040872: 2600 movs r6, #0 - 8040874: 42a6 cmp r6, r4 - 8040876: d109 bne.n 804088c <__libc_init_array+0x24> - 8040878: 4d0b ldr r5, [pc, #44] ; (80408a8 <__libc_init_array+0x40>) - 804087a: 4c0c ldr r4, [pc, #48] ; (80408ac <__libc_init_array+0x44>) - 804087c: f001 fbb8 bl 8041ff0 <_init> - 8040880: 1b64 subs r4, r4, r5 - 8040882: 10a4 asrs r4, r4, #2 - 8040884: 2600 movs r6, #0 - 8040886: 42a6 cmp r6, r4 - 8040888: d105 bne.n 8040896 <__libc_init_array+0x2e> - 804088a: bd70 pop {r4, r5, r6, pc} - 804088c: f855 3b04 ldr.w r3, [r5], #4 - 8040890: 4798 blx r3 - 8040892: 3601 adds r6, #1 - 8040894: e7ee b.n 8040874 <__libc_init_array+0xc> - 8040896: f855 3b04 ldr.w r3, [r5], #4 - 804089a: 4798 blx r3 - 804089c: 3601 adds r6, #1 - 804089e: e7f2 b.n 8040886 <__libc_init_array+0x1e> - 80408a0: 080457f8 .word 0x080457f8 - 80408a4: 080457f8 .word 0x080457f8 - 80408a8: 080457f8 .word 0x080457f8 - 80408ac: 080457fc .word 0x080457fc - -080408b0 : - 80408b0: 4b02 ldr r3, [pc, #8] ; (80408bc ) - 80408b2: 4601 mov r1, r0 - 80408b4: 6818 ldr r0, [r3, #0] - 80408b6: f000 b8b7 b.w 8040a28 <_malloc_r> - 80408ba: bf00 nop - 80408bc: 24000078 .word 0x24000078 - -080408c0 : - 80408c0: 4b02 ldr r3, [pc, #8] ; (80408cc ) - 80408c2: 4601 mov r1, r0 - 80408c4: 6818 ldr r0, [r3, #0] - 80408c6: f000 b843 b.w 8040950 <_free_r> - 80408ca: bf00 nop - 80408cc: 24000078 .word 0x24000078 - -080408d0 : - 80408d0: b510 push {r4, lr} - 80408d2: 3901 subs r1, #1 - 80408d4: 4402 add r2, r0 - 80408d6: 4290 cmp r0, r2 - 80408d8: d101 bne.n 80408de - 80408da: 2000 movs r0, #0 - 80408dc: e005 b.n 80408ea - 80408de: 7803 ldrb r3, [r0, #0] - 80408e0: f811 4f01 ldrb.w r4, [r1, #1]! - 80408e4: 42a3 cmp r3, r4 - 80408e6: d001 beq.n 80408ec - 80408e8: 1b18 subs r0, r3, r4 - 80408ea: bd10 pop {r4, pc} - 80408ec: 3001 adds r0, #1 - 80408ee: e7f2 b.n 80408d6 - -080408f0 : - 80408f0: 440a add r2, r1 - 80408f2: 4291 cmp r1, r2 - 80408f4: f100 33ff add.w r3, r0, #4294967295 - 80408f8: d100 bne.n 80408fc - 80408fa: 4770 bx lr - 80408fc: b510 push {r4, lr} - 80408fe: f811 4b01 ldrb.w r4, [r1], #1 - 8040902: f803 4f01 strb.w r4, [r3, #1]! - 8040906: 4291 cmp r1, r2 - 8040908: d1f9 bne.n 80408fe - 804090a: bd10 pop {r4, pc} - -0804090c : - 804090c: 4288 cmp r0, r1 - 804090e: b510 push {r4, lr} - 8040910: eb01 0402 add.w r4, r1, r2 - 8040914: d902 bls.n 804091c - 8040916: 4284 cmp r4, r0 - 8040918: 4623 mov r3, r4 - 804091a: d807 bhi.n 804092c - 804091c: 1e43 subs r3, r0, #1 - 804091e: 42a1 cmp r1, r4 - 8040920: d008 beq.n 8040934 - 8040922: f811 2b01 ldrb.w r2, [r1], #1 - 8040926: f803 2f01 strb.w r2, [r3, #1]! - 804092a: e7f8 b.n 804091e - 804092c: 4402 add r2, r0 - 804092e: 4601 mov r1, r0 - 8040930: 428a cmp r2, r1 - 8040932: d100 bne.n 8040936 - 8040934: bd10 pop {r4, pc} - 8040936: f813 4d01 ldrb.w r4, [r3, #-1]! - 804093a: f802 4d01 strb.w r4, [r2, #-1]! - 804093e: e7f7 b.n 8040930 - -08040940 : - 8040940: 4402 add r2, r0 - 8040942: 4603 mov r3, r0 - 8040944: 4293 cmp r3, r2 - 8040946: d100 bne.n 804094a - 8040948: 4770 bx lr - 804094a: f803 1b01 strb.w r1, [r3], #1 - 804094e: e7f9 b.n 8040944 - -08040950 <_free_r>: - 8040950: b537 push {r0, r1, r2, r4, r5, lr} - 8040952: 2900 cmp r1, #0 - 8040954: d044 beq.n 80409e0 <_free_r+0x90> - 8040956: f851 3c04 ldr.w r3, [r1, #-4] - 804095a: 9001 str r0, [sp, #4] - 804095c: 2b00 cmp r3, #0 - 804095e: f1a1 0404 sub.w r4, r1, #4 - 8040962: bfb8 it lt - 8040964: 18e4 addlt r4, r4, r3 - 8040966: f000 faa7 bl 8040eb8 <__malloc_lock> - 804096a: 4a1e ldr r2, [pc, #120] ; (80409e4 <_free_r+0x94>) - 804096c: 9801 ldr r0, [sp, #4] - 804096e: 6813 ldr r3, [r2, #0] - 8040970: b933 cbnz r3, 8040980 <_free_r+0x30> - 8040972: 6063 str r3, [r4, #4] - 8040974: 6014 str r4, [r2, #0] - 8040976: b003 add sp, #12 - 8040978: e8bd 4030 ldmia.w sp!, {r4, r5, lr} - 804097c: f000 baa2 b.w 8040ec4 <__malloc_unlock> - 8040980: 42a3 cmp r3, r4 - 8040982: d908 bls.n 8040996 <_free_r+0x46> - 8040984: 6825 ldr r5, [r4, #0] - 8040986: 1961 adds r1, r4, r5 - 8040988: 428b cmp r3, r1 - 804098a: bf01 itttt eq - 804098c: 6819 ldreq r1, [r3, #0] - 804098e: 685b ldreq r3, [r3, #4] - 8040990: 1949 addeq r1, r1, r5 - 8040992: 6021 streq r1, [r4, #0] - 8040994: e7ed b.n 8040972 <_free_r+0x22> - 8040996: 461a mov r2, r3 - 8040998: 685b ldr r3, [r3, #4] - 804099a: b10b cbz r3, 80409a0 <_free_r+0x50> - 804099c: 42a3 cmp r3, r4 - 804099e: d9fa bls.n 8040996 <_free_r+0x46> - 80409a0: 6811 ldr r1, [r2, #0] - 80409a2: 1855 adds r5, r2, r1 - 80409a4: 42a5 cmp r5, r4 - 80409a6: d10b bne.n 80409c0 <_free_r+0x70> - 80409a8: 6824 ldr r4, [r4, #0] - 80409aa: 4421 add r1, r4 - 80409ac: 1854 adds r4, r2, r1 - 80409ae: 42a3 cmp r3, r4 - 80409b0: 6011 str r1, [r2, #0] - 80409b2: d1e0 bne.n 8040976 <_free_r+0x26> - 80409b4: 681c ldr r4, [r3, #0] - 80409b6: 685b ldr r3, [r3, #4] - 80409b8: 6053 str r3, [r2, #4] - 80409ba: 4421 add r1, r4 - 80409bc: 6011 str r1, [r2, #0] - 80409be: e7da b.n 8040976 <_free_r+0x26> - 80409c0: d902 bls.n 80409c8 <_free_r+0x78> - 80409c2: 230c movs r3, #12 - 80409c4: 6003 str r3, [r0, #0] - 80409c6: e7d6 b.n 8040976 <_free_r+0x26> - 80409c8: 6825 ldr r5, [r4, #0] - 80409ca: 1961 adds r1, r4, r5 - 80409cc: 428b cmp r3, r1 - 80409ce: bf04 itt eq - 80409d0: 6819 ldreq r1, [r3, #0] - 80409d2: 685b ldreq r3, [r3, #4] - 80409d4: 6063 str r3, [r4, #4] - 80409d6: bf04 itt eq - 80409d8: 1949 addeq r1, r1, r5 - 80409da: 6021 streq r1, [r4, #0] - 80409dc: 6054 str r4, [r2, #4] - 80409de: e7ca b.n 8040976 <_free_r+0x26> - 80409e0: b003 add sp, #12 - 80409e2: bd30 pop {r4, r5, pc} - 80409e4: 2400eab4 .word 0x2400eab4 - -080409e8 : - 80409e8: b570 push {r4, r5, r6, lr} - 80409ea: 4e0e ldr r6, [pc, #56] ; (8040a24 ) - 80409ec: 460c mov r4, r1 - 80409ee: 6831 ldr r1, [r6, #0] - 80409f0: 4605 mov r5, r0 - 80409f2: b911 cbnz r1, 80409fa - 80409f4: f000 f8e2 bl 8040bbc <_sbrk_r> - 80409f8: 6030 str r0, [r6, #0] - 80409fa: 4621 mov r1, r4 - 80409fc: 4628 mov r0, r5 - 80409fe: f000 f8dd bl 8040bbc <_sbrk_r> - 8040a02: 1c43 adds r3, r0, #1 - 8040a04: d00a beq.n 8040a1c - 8040a06: 1cc4 adds r4, r0, #3 - 8040a08: f024 0403 bic.w r4, r4, #3 - 8040a0c: 42a0 cmp r0, r4 - 8040a0e: d007 beq.n 8040a20 - 8040a10: 1a21 subs r1, r4, r0 - 8040a12: 4628 mov r0, r5 - 8040a14: f000 f8d2 bl 8040bbc <_sbrk_r> - 8040a18: 3001 adds r0, #1 - 8040a1a: d101 bne.n 8040a20 - 8040a1c: f04f 34ff mov.w r4, #4294967295 - 8040a20: 4620 mov r0, r4 - 8040a22: bd70 pop {r4, r5, r6, pc} - 8040a24: 2400eab8 .word 0x2400eab8 - -08040a28 <_malloc_r>: - 8040a28: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 8040a2c: 1ccd adds r5, r1, #3 - 8040a2e: f025 0503 bic.w r5, r5, #3 - 8040a32: 3508 adds r5, #8 - 8040a34: 2d0c cmp r5, #12 - 8040a36: bf38 it cc - 8040a38: 250c movcc r5, #12 - 8040a3a: 2d00 cmp r5, #0 - 8040a3c: 4607 mov r7, r0 - 8040a3e: db01 blt.n 8040a44 <_malloc_r+0x1c> - 8040a40: 42a9 cmp r1, r5 - 8040a42: d905 bls.n 8040a50 <_malloc_r+0x28> - 8040a44: 230c movs r3, #12 - 8040a46: 603b str r3, [r7, #0] - 8040a48: 2600 movs r6, #0 - 8040a4a: 4630 mov r0, r6 - 8040a4c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8040a50: 4e2e ldr r6, [pc, #184] ; (8040b0c <_malloc_r+0xe4>) - 8040a52: f000 fa31 bl 8040eb8 <__malloc_lock> - 8040a56: 6833 ldr r3, [r6, #0] - 8040a58: 461c mov r4, r3 - 8040a5a: bb34 cbnz r4, 8040aaa <_malloc_r+0x82> - 8040a5c: 4629 mov r1, r5 - 8040a5e: 4638 mov r0, r7 - 8040a60: f7ff ffc2 bl 80409e8 - 8040a64: 1c43 adds r3, r0, #1 - 8040a66: 4604 mov r4, r0 - 8040a68: d14d bne.n 8040b06 <_malloc_r+0xde> - 8040a6a: 6834 ldr r4, [r6, #0] - 8040a6c: 4626 mov r6, r4 - 8040a6e: 2e00 cmp r6, #0 - 8040a70: d140 bne.n 8040af4 <_malloc_r+0xcc> - 8040a72: 6823 ldr r3, [r4, #0] - 8040a74: 4631 mov r1, r6 - 8040a76: 4638 mov r0, r7 - 8040a78: eb04 0803 add.w r8, r4, r3 - 8040a7c: f000 f89e bl 8040bbc <_sbrk_r> - 8040a80: 4580 cmp r8, r0 - 8040a82: d13a bne.n 8040afa <_malloc_r+0xd2> - 8040a84: 6821 ldr r1, [r4, #0] - 8040a86: 3503 adds r5, #3 - 8040a88: 1a6d subs r5, r5, r1 - 8040a8a: f025 0503 bic.w r5, r5, #3 - 8040a8e: 3508 adds r5, #8 - 8040a90: 2d0c cmp r5, #12 - 8040a92: bf38 it cc - 8040a94: 250c movcc r5, #12 - 8040a96: 4629 mov r1, r5 - 8040a98: 4638 mov r0, r7 - 8040a9a: f7ff ffa5 bl 80409e8 - 8040a9e: 3001 adds r0, #1 - 8040aa0: d02b beq.n 8040afa <_malloc_r+0xd2> - 8040aa2: 6823 ldr r3, [r4, #0] - 8040aa4: 442b add r3, r5 - 8040aa6: 6023 str r3, [r4, #0] - 8040aa8: e00e b.n 8040ac8 <_malloc_r+0xa0> - 8040aaa: 6822 ldr r2, [r4, #0] - 8040aac: 1b52 subs r2, r2, r5 - 8040aae: d41e bmi.n 8040aee <_malloc_r+0xc6> - 8040ab0: 2a0b cmp r2, #11 - 8040ab2: d916 bls.n 8040ae2 <_malloc_r+0xba> - 8040ab4: 1961 adds r1, r4, r5 - 8040ab6: 42a3 cmp r3, r4 - 8040ab8: 6025 str r5, [r4, #0] - 8040aba: bf18 it ne - 8040abc: 6059 strne r1, [r3, #4] - 8040abe: 6863 ldr r3, [r4, #4] - 8040ac0: bf08 it eq - 8040ac2: 6031 streq r1, [r6, #0] - 8040ac4: 5162 str r2, [r4, r5] - 8040ac6: 604b str r3, [r1, #4] - 8040ac8: 4638 mov r0, r7 - 8040aca: f104 060b add.w r6, r4, #11 - 8040ace: f000 f9f9 bl 8040ec4 <__malloc_unlock> - 8040ad2: f026 0607 bic.w r6, r6, #7 - 8040ad6: 1d23 adds r3, r4, #4 - 8040ad8: 1af2 subs r2, r6, r3 - 8040ada: d0b6 beq.n 8040a4a <_malloc_r+0x22> - 8040adc: 1b9b subs r3, r3, r6 - 8040ade: 50a3 str r3, [r4, r2] - 8040ae0: e7b3 b.n 8040a4a <_malloc_r+0x22> - 8040ae2: 6862 ldr r2, [r4, #4] - 8040ae4: 42a3 cmp r3, r4 - 8040ae6: bf0c ite eq - 8040ae8: 6032 streq r2, [r6, #0] - 8040aea: 605a strne r2, [r3, #4] - 8040aec: e7ec b.n 8040ac8 <_malloc_r+0xa0> - 8040aee: 4623 mov r3, r4 - 8040af0: 6864 ldr r4, [r4, #4] - 8040af2: e7b2 b.n 8040a5a <_malloc_r+0x32> - 8040af4: 4634 mov r4, r6 - 8040af6: 6876 ldr r6, [r6, #4] - 8040af8: e7b9 b.n 8040a6e <_malloc_r+0x46> - 8040afa: 230c movs r3, #12 - 8040afc: 603b str r3, [r7, #0] - 8040afe: 4638 mov r0, r7 - 8040b00: f000 f9e0 bl 8040ec4 <__malloc_unlock> - 8040b04: e7a1 b.n 8040a4a <_malloc_r+0x22> - 8040b06: 6025 str r5, [r4, #0] - 8040b08: e7de b.n 8040ac8 <_malloc_r+0xa0> - 8040b0a: bf00 nop - 8040b0c: 2400eab4 .word 0x2400eab4 - -08040b10 : - 8040b10: b40f push {r0, r1, r2, r3} - 8040b12: 4b0a ldr r3, [pc, #40] ; (8040b3c ) - 8040b14: b513 push {r0, r1, r4, lr} - 8040b16: 681c ldr r4, [r3, #0] - 8040b18: b124 cbz r4, 8040b24 - 8040b1a: 69a3 ldr r3, [r4, #24] - 8040b1c: b913 cbnz r3, 8040b24 - 8040b1e: 4620 mov r0, r4 - 8040b20: f000 f918 bl 8040d54 <__sinit> - 8040b24: ab05 add r3, sp, #20 - 8040b26: 9a04 ldr r2, [sp, #16] - 8040b28: 68a1 ldr r1, [r4, #8] - 8040b2a: 9301 str r3, [sp, #4] - 8040b2c: 4620 mov r0, r4 - 8040b2e: f000 fb55 bl 80411dc <_vfiprintf_r> - 8040b32: b002 add sp, #8 - 8040b34: e8bd 4010 ldmia.w sp!, {r4, lr} - 8040b38: b004 add sp, #16 - 8040b3a: 4770 bx lr - 8040b3c: 24000078 .word 0x24000078 - -08040b40 : - 8040b40: 4b16 ldr r3, [pc, #88] ; (8040b9c ) - 8040b42: b510 push {r4, lr} - 8040b44: 681c ldr r4, [r3, #0] - 8040b46: 6ba3 ldr r3, [r4, #56] ; 0x38 - 8040b48: b9b3 cbnz r3, 8040b78 - 8040b4a: 2018 movs r0, #24 - 8040b4c: f7ff feb0 bl 80408b0 - 8040b50: 63a0 str r0, [r4, #56] ; 0x38 - 8040b52: b928 cbnz r0, 8040b60 - 8040b54: 4602 mov r2, r0 - 8040b56: 4b12 ldr r3, [pc, #72] ; (8040ba0 ) - 8040b58: 4812 ldr r0, [pc, #72] ; (8040ba4 ) - 8040b5a: 214e movs r1, #78 ; 0x4e - 8040b5c: f000 f87e bl 8040c5c <__assert_func> - 8040b60: 4a11 ldr r2, [pc, #68] ; (8040ba8 ) - 8040b62: 4b12 ldr r3, [pc, #72] ; (8040bac ) - 8040b64: e9c0 2300 strd r2, r3, [r0] - 8040b68: 4b11 ldr r3, [pc, #68] ; (8040bb0 ) - 8040b6a: 6083 str r3, [r0, #8] - 8040b6c: 230b movs r3, #11 - 8040b6e: 8183 strh r3, [r0, #12] - 8040b70: 2201 movs r2, #1 - 8040b72: 2300 movs r3, #0 - 8040b74: e9c0 2304 strd r2, r3, [r0, #16] - 8040b78: 6ba4 ldr r4, [r4, #56] ; 0x38 - 8040b7a: 4a0e ldr r2, [pc, #56] ; (8040bb4 ) - 8040b7c: 6920 ldr r0, [r4, #16] - 8040b7e: 6963 ldr r3, [r4, #20] - 8040b80: 490d ldr r1, [pc, #52] ; (8040bb8 ) - 8040b82: 4342 muls r2, r0 - 8040b84: fb01 2203 mla r2, r1, r3, r2 - 8040b88: fba0 0101 umull r0, r1, r0, r1 - 8040b8c: 1c43 adds r3, r0, #1 - 8040b8e: eb42 0001 adc.w r0, r2, r1 - 8040b92: e9c4 3004 strd r3, r0, [r4, #16] - 8040b96: f020 4000 bic.w r0, r0, #2147483648 ; 0x80000000 - 8040b9a: bd10 pop {r4, pc} - 8040b9c: 24000078 .word 0x24000078 - 8040ba0: 08044e18 .word 0x08044e18 - 8040ba4: 08044e2f .word 0x08044e2f - 8040ba8: abcd330e .word 0xabcd330e - 8040bac: e66d1234 .word 0xe66d1234 - 8040bb0: 0005deec .word 0x0005deec - 8040bb4: 5851f42d .word 0x5851f42d - 8040bb8: 4c957f2d .word 0x4c957f2d - -08040bbc <_sbrk_r>: - 8040bbc: b538 push {r3, r4, r5, lr} - 8040bbe: 4d06 ldr r5, [pc, #24] ; (8040bd8 <_sbrk_r+0x1c>) - 8040bc0: 2300 movs r3, #0 - 8040bc2: 4604 mov r4, r0 - 8040bc4: 4608 mov r0, r1 - 8040bc6: 602b str r3, [r5, #0] - 8040bc8: f7e3 fe64 bl 8024894 <_sbrk> - 8040bcc: 1c43 adds r3, r0, #1 - 8040bce: d102 bne.n 8040bd6 <_sbrk_r+0x1a> - 8040bd0: 682b ldr r3, [r5, #0] - 8040bd2: b103 cbz r3, 8040bd6 <_sbrk_r+0x1a> - 8040bd4: 6023 str r3, [r4, #0] - 8040bd6: bd38 pop {r3, r4, r5, pc} - 8040bd8: 2400eabc .word 0x2400eabc - -08040bdc : - 8040bdc: b40e push {r1, r2, r3} - 8040bde: b500 push {lr} - 8040be0: b09c sub sp, #112 ; 0x70 - 8040be2: ab1d add r3, sp, #116 ; 0x74 - 8040be4: 9002 str r0, [sp, #8] - 8040be6: 9006 str r0, [sp, #24] - 8040be8: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 - 8040bec: 4809 ldr r0, [pc, #36] ; (8040c14 ) - 8040bee: 9107 str r1, [sp, #28] - 8040bf0: 9104 str r1, [sp, #16] - 8040bf2: 4909 ldr r1, [pc, #36] ; (8040c18 ) - 8040bf4: f853 2b04 ldr.w r2, [r3], #4 - 8040bf8: 9105 str r1, [sp, #20] - 8040bfa: 6800 ldr r0, [r0, #0] - 8040bfc: 9301 str r3, [sp, #4] - 8040bfe: a902 add r1, sp, #8 - 8040c00: f000 f9c2 bl 8040f88 <_svfiprintf_r> - 8040c04: 9b02 ldr r3, [sp, #8] - 8040c06: 2200 movs r2, #0 - 8040c08: 701a strb r2, [r3, #0] - 8040c0a: b01c add sp, #112 ; 0x70 - 8040c0c: f85d eb04 ldr.w lr, [sp], #4 - 8040c10: b003 add sp, #12 - 8040c12: 4770 bx lr - 8040c14: 24000078 .word 0x24000078 - 8040c18: ffff0208 .word 0xffff0208 - -08040c1c <_vsiprintf_r>: - 8040c1c: b500 push {lr} - 8040c1e: b09b sub sp, #108 ; 0x6c - 8040c20: 9100 str r1, [sp, #0] - 8040c22: 9104 str r1, [sp, #16] - 8040c24: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 - 8040c28: 9105 str r1, [sp, #20] - 8040c2a: 9102 str r1, [sp, #8] - 8040c2c: 4905 ldr r1, [pc, #20] ; (8040c44 <_vsiprintf_r+0x28>) - 8040c2e: 9103 str r1, [sp, #12] - 8040c30: 4669 mov r1, sp - 8040c32: f000 f9a9 bl 8040f88 <_svfiprintf_r> - 8040c36: 9b00 ldr r3, [sp, #0] - 8040c38: 2200 movs r2, #0 - 8040c3a: 701a strb r2, [r3, #0] - 8040c3c: b01b add sp, #108 ; 0x6c - 8040c3e: f85d fb04 ldr.w pc, [sp], #4 - 8040c42: bf00 nop - 8040c44: ffff0208 .word 0xffff0208 - -08040c48 : - 8040c48: 4613 mov r3, r2 - 8040c4a: 460a mov r2, r1 - 8040c4c: 4601 mov r1, r0 - 8040c4e: 4802 ldr r0, [pc, #8] ; (8040c58 ) - 8040c50: 6800 ldr r0, [r0, #0] - 8040c52: f7ff bfe3 b.w 8040c1c <_vsiprintf_r> - 8040c56: bf00 nop - 8040c58: 24000078 .word 0x24000078 - -08040c5c <__assert_func>: - 8040c5c: b51f push {r0, r1, r2, r3, r4, lr} - 8040c5e: 4614 mov r4, r2 - 8040c60: 461a mov r2, r3 - 8040c62: 4b09 ldr r3, [pc, #36] ; (8040c88 <__assert_func+0x2c>) - 8040c64: 681b ldr r3, [r3, #0] - 8040c66: 4605 mov r5, r0 - 8040c68: 68d8 ldr r0, [r3, #12] - 8040c6a: b14c cbz r4, 8040c80 <__assert_func+0x24> - 8040c6c: 4b07 ldr r3, [pc, #28] ; (8040c8c <__assert_func+0x30>) - 8040c6e: 9100 str r1, [sp, #0] - 8040c70: e9cd 3401 strd r3, r4, [sp, #4] - 8040c74: 4906 ldr r1, [pc, #24] ; (8040c90 <__assert_func+0x34>) - 8040c76: 462b mov r3, r5 - 8040c78: f000 f8ea bl 8040e50 - 8040c7c: f000 fe88 bl 8041990 - 8040c80: 4b04 ldr r3, [pc, #16] ; (8040c94 <__assert_func+0x38>) - 8040c82: 461c mov r4, r3 - 8040c84: e7f3 b.n 8040c6e <__assert_func+0x12> - 8040c86: bf00 nop - 8040c88: 24000078 .word 0x24000078 - 8040c8c: 08044e8a .word 0x08044e8a - 8040c90: 08044e97 .word 0x08044e97 - 8040c94: 08044ec5 .word 0x08044ec5 - -08040c98 <__errno>: - 8040c98: 4b01 ldr r3, [pc, #4] ; (8040ca0 <__errno+0x8>) - 8040c9a: 6818 ldr r0, [r3, #0] - 8040c9c: 4770 bx lr - 8040c9e: bf00 nop - 8040ca0: 24000078 .word 0x24000078 - -08040ca4 : - 8040ca4: 2300 movs r3, #0 - 8040ca6: b510 push {r4, lr} - 8040ca8: 4604 mov r4, r0 - 8040caa: e9c0 3300 strd r3, r3, [r0] - 8040cae: e9c0 3304 strd r3, r3, [r0, #16] - 8040cb2: 6083 str r3, [r0, #8] - 8040cb4: 8181 strh r1, [r0, #12] - 8040cb6: 6643 str r3, [r0, #100] ; 0x64 - 8040cb8: 81c2 strh r2, [r0, #14] - 8040cba: 6183 str r3, [r0, #24] - 8040cbc: 4619 mov r1, r3 - 8040cbe: 2208 movs r2, #8 - 8040cc0: 305c adds r0, #92 ; 0x5c - 8040cc2: f7ff fe3d bl 8040940 - 8040cc6: 4b05 ldr r3, [pc, #20] ; (8040cdc ) - 8040cc8: 6263 str r3, [r4, #36] ; 0x24 - 8040cca: 4b05 ldr r3, [pc, #20] ; (8040ce0 ) - 8040ccc: 62a3 str r3, [r4, #40] ; 0x28 - 8040cce: 4b05 ldr r3, [pc, #20] ; (8040ce4 ) - 8040cd0: 62e3 str r3, [r4, #44] ; 0x2c - 8040cd2: 4b05 ldr r3, [pc, #20] ; (8040ce8 ) - 8040cd4: 6224 str r4, [r4, #32] - 8040cd6: 6323 str r3, [r4, #48] ; 0x30 - 8040cd8: bd10 pop {r4, pc} + 80408d2: f06f 0301 mvn.w r3, #1 +} + 80408d6: 4618 mov r0, r3 + 80408d8: 3718 adds r7, #24 + 80408da: 46bd mov sp, r7 + 80408dc: bd80 pop {r7, pc} + 80408de: bf00 nop + 80408e0: 08044c98 .word 0x08044c98 + 80408e4: 08044cd0 .word 0x08044cd0 + 80408e8: 08044d04 .word 0x08044d04 + +080408ec <__libc_init_array>: + 80408ec: b570 push {r4, r5, r6, lr} + 80408ee: 4d0d ldr r5, [pc, #52] ; (8040924 <__libc_init_array+0x38>) + 80408f0: 4c0d ldr r4, [pc, #52] ; (8040928 <__libc_init_array+0x3c>) + 80408f2: 1b64 subs r4, r4, r5 + 80408f4: 10a4 asrs r4, r4, #2 + 80408f6: 2600 movs r6, #0 + 80408f8: 42a6 cmp r6, r4 + 80408fa: d109 bne.n 8040910 <__libc_init_array+0x24> + 80408fc: 4d0b ldr r5, [pc, #44] ; (804092c <__libc_init_array+0x40>) + 80408fe: 4c0c ldr r4, [pc, #48] ; (8040930 <__libc_init_array+0x44>) + 8040900: f001 fbb6 bl 8042070 <_init> + 8040904: 1b64 subs r4, r4, r5 + 8040906: 10a4 asrs r4, r4, #2 + 8040908: 2600 movs r6, #0 + 804090a: 42a6 cmp r6, r4 + 804090c: d105 bne.n 804091a <__libc_init_array+0x2e> + 804090e: bd70 pop {r4, r5, r6, pc} + 8040910: f855 3b04 ldr.w r3, [r5], #4 + 8040914: 4798 blx r3 + 8040916: 3601 adds r6, #1 + 8040918: e7ee b.n 80408f8 <__libc_init_array+0xc> + 804091a: f855 3b04 ldr.w r3, [r5], #4 + 804091e: 4798 blx r3 + 8040920: 3601 adds r6, #1 + 8040922: e7f2 b.n 804090a <__libc_init_array+0x1e> + 8040924: 08045878 .word 0x08045878 + 8040928: 08045878 .word 0x08045878 + 804092c: 08045878 .word 0x08045878 + 8040930: 0804587c .word 0x0804587c + +08040934 : + 8040934: 4b02 ldr r3, [pc, #8] ; (8040940 ) + 8040936: 4601 mov r1, r0 + 8040938: 6818 ldr r0, [r3, #0] + 804093a: f000 b8b7 b.w 8040aac <_malloc_r> + 804093e: bf00 nop + 8040940: 24000078 .word 0x24000078 + +08040944 : + 8040944: 4b02 ldr r3, [pc, #8] ; (8040950 ) + 8040946: 4601 mov r1, r0 + 8040948: 6818 ldr r0, [r3, #0] + 804094a: f000 b843 b.w 80409d4 <_free_r> + 804094e: bf00 nop + 8040950: 24000078 .word 0x24000078 + +08040954 : + 8040954: b510 push {r4, lr} + 8040956: 3901 subs r1, #1 + 8040958: 4402 add r2, r0 + 804095a: 4290 cmp r0, r2 + 804095c: d101 bne.n 8040962 + 804095e: 2000 movs r0, #0 + 8040960: e005 b.n 804096e + 8040962: 7803 ldrb r3, [r0, #0] + 8040964: f811 4f01 ldrb.w r4, [r1, #1]! + 8040968: 42a3 cmp r3, r4 + 804096a: d001 beq.n 8040970 + 804096c: 1b18 subs r0, r3, r4 + 804096e: bd10 pop {r4, pc} + 8040970: 3001 adds r0, #1 + 8040972: e7f2 b.n 804095a + +08040974 : + 8040974: 440a add r2, r1 + 8040976: 4291 cmp r1, r2 + 8040978: f100 33ff add.w r3, r0, #4294967295 + 804097c: d100 bne.n 8040980 + 804097e: 4770 bx lr + 8040980: b510 push {r4, lr} + 8040982: f811 4b01 ldrb.w r4, [r1], #1 + 8040986: f803 4f01 strb.w r4, [r3, #1]! + 804098a: 4291 cmp r1, r2 + 804098c: d1f9 bne.n 8040982 + 804098e: bd10 pop {r4, pc} + +08040990 : + 8040990: 4288 cmp r0, r1 + 8040992: b510 push {r4, lr} + 8040994: eb01 0402 add.w r4, r1, r2 + 8040998: d902 bls.n 80409a0 + 804099a: 4284 cmp r4, r0 + 804099c: 4623 mov r3, r4 + 804099e: d807 bhi.n 80409b0 + 80409a0: 1e43 subs r3, r0, #1 + 80409a2: 42a1 cmp r1, r4 + 80409a4: d008 beq.n 80409b8 + 80409a6: f811 2b01 ldrb.w r2, [r1], #1 + 80409aa: f803 2f01 strb.w r2, [r3, #1]! + 80409ae: e7f8 b.n 80409a2 + 80409b0: 4402 add r2, r0 + 80409b2: 4601 mov r1, r0 + 80409b4: 428a cmp r2, r1 + 80409b6: d100 bne.n 80409ba + 80409b8: bd10 pop {r4, pc} + 80409ba: f813 4d01 ldrb.w r4, [r3, #-1]! + 80409be: f802 4d01 strb.w r4, [r2, #-1]! + 80409c2: e7f7 b.n 80409b4 + +080409c4 : + 80409c4: 4402 add r2, r0 + 80409c6: 4603 mov r3, r0 + 80409c8: 4293 cmp r3, r2 + 80409ca: d100 bne.n 80409ce + 80409cc: 4770 bx lr + 80409ce: f803 1b01 strb.w r1, [r3], #1 + 80409d2: e7f9 b.n 80409c8 + +080409d4 <_free_r>: + 80409d4: b537 push {r0, r1, r2, r4, r5, lr} + 80409d6: 2900 cmp r1, #0 + 80409d8: d044 beq.n 8040a64 <_free_r+0x90> + 80409da: f851 3c04 ldr.w r3, [r1, #-4] + 80409de: 9001 str r0, [sp, #4] + 80409e0: 2b00 cmp r3, #0 + 80409e2: f1a1 0404 sub.w r4, r1, #4 + 80409e6: bfb8 it lt + 80409e8: 18e4 addlt r4, r4, r3 + 80409ea: f000 faa7 bl 8040f3c <__malloc_lock> + 80409ee: 4a1e ldr r2, [pc, #120] ; (8040a68 <_free_r+0x94>) + 80409f0: 9801 ldr r0, [sp, #4] + 80409f2: 6813 ldr r3, [r2, #0] + 80409f4: b933 cbnz r3, 8040a04 <_free_r+0x30> + 80409f6: 6063 str r3, [r4, #4] + 80409f8: 6014 str r4, [r2, #0] + 80409fa: b003 add sp, #12 + 80409fc: e8bd 4030 ldmia.w sp!, {r4, r5, lr} + 8040a00: f000 baa2 b.w 8040f48 <__malloc_unlock> + 8040a04: 42a3 cmp r3, r4 + 8040a06: d908 bls.n 8040a1a <_free_r+0x46> + 8040a08: 6825 ldr r5, [r4, #0] + 8040a0a: 1961 adds r1, r4, r5 + 8040a0c: 428b cmp r3, r1 + 8040a0e: bf01 itttt eq + 8040a10: 6819 ldreq r1, [r3, #0] + 8040a12: 685b ldreq r3, [r3, #4] + 8040a14: 1949 addeq r1, r1, r5 + 8040a16: 6021 streq r1, [r4, #0] + 8040a18: e7ed b.n 80409f6 <_free_r+0x22> + 8040a1a: 461a mov r2, r3 + 8040a1c: 685b ldr r3, [r3, #4] + 8040a1e: b10b cbz r3, 8040a24 <_free_r+0x50> + 8040a20: 42a3 cmp r3, r4 + 8040a22: d9fa bls.n 8040a1a <_free_r+0x46> + 8040a24: 6811 ldr r1, [r2, #0] + 8040a26: 1855 adds r5, r2, r1 + 8040a28: 42a5 cmp r5, r4 + 8040a2a: d10b bne.n 8040a44 <_free_r+0x70> + 8040a2c: 6824 ldr r4, [r4, #0] + 8040a2e: 4421 add r1, r4 + 8040a30: 1854 adds r4, r2, r1 + 8040a32: 42a3 cmp r3, r4 + 8040a34: 6011 str r1, [r2, #0] + 8040a36: d1e0 bne.n 80409fa <_free_r+0x26> + 8040a38: 681c ldr r4, [r3, #0] + 8040a3a: 685b ldr r3, [r3, #4] + 8040a3c: 6053 str r3, [r2, #4] + 8040a3e: 4421 add r1, r4 + 8040a40: 6011 str r1, [r2, #0] + 8040a42: e7da b.n 80409fa <_free_r+0x26> + 8040a44: d902 bls.n 8040a4c <_free_r+0x78> + 8040a46: 230c movs r3, #12 + 8040a48: 6003 str r3, [r0, #0] + 8040a4a: e7d6 b.n 80409fa <_free_r+0x26> + 8040a4c: 6825 ldr r5, [r4, #0] + 8040a4e: 1961 adds r1, r4, r5 + 8040a50: 428b cmp r3, r1 + 8040a52: bf04 itt eq + 8040a54: 6819 ldreq r1, [r3, #0] + 8040a56: 685b ldreq r3, [r3, #4] + 8040a58: 6063 str r3, [r4, #4] + 8040a5a: bf04 itt eq + 8040a5c: 1949 addeq r1, r1, r5 + 8040a5e: 6021 streq r1, [r4, #0] + 8040a60: 6054 str r4, [r2, #4] + 8040a62: e7ca b.n 80409fa <_free_r+0x26> + 8040a64: b003 add sp, #12 + 8040a66: bd30 pop {r4, r5, pc} + 8040a68: 2400eabc .word 0x2400eabc + +08040a6c : + 8040a6c: b570 push {r4, r5, r6, lr} + 8040a6e: 4e0e ldr r6, [pc, #56] ; (8040aa8 ) + 8040a70: 460c mov r4, r1 + 8040a72: 6831 ldr r1, [r6, #0] + 8040a74: 4605 mov r5, r0 + 8040a76: b911 cbnz r1, 8040a7e + 8040a78: f000 f8e2 bl 8040c40 <_sbrk_r> + 8040a7c: 6030 str r0, [r6, #0] + 8040a7e: 4621 mov r1, r4 + 8040a80: 4628 mov r0, r5 + 8040a82: f000 f8dd bl 8040c40 <_sbrk_r> + 8040a86: 1c43 adds r3, r0, #1 + 8040a88: d00a beq.n 8040aa0 + 8040a8a: 1cc4 adds r4, r0, #3 + 8040a8c: f024 0403 bic.w r4, r4, #3 + 8040a90: 42a0 cmp r0, r4 + 8040a92: d007 beq.n 8040aa4 + 8040a94: 1a21 subs r1, r4, r0 + 8040a96: 4628 mov r0, r5 + 8040a98: f000 f8d2 bl 8040c40 <_sbrk_r> + 8040a9c: 3001 adds r0, #1 + 8040a9e: d101 bne.n 8040aa4 + 8040aa0: f04f 34ff mov.w r4, #4294967295 + 8040aa4: 4620 mov r0, r4 + 8040aa6: bd70 pop {r4, r5, r6, pc} + 8040aa8: 2400eac0 .word 0x2400eac0 + +08040aac <_malloc_r>: + 8040aac: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8040ab0: 1ccd adds r5, r1, #3 + 8040ab2: f025 0503 bic.w r5, r5, #3 + 8040ab6: 3508 adds r5, #8 + 8040ab8: 2d0c cmp r5, #12 + 8040aba: bf38 it cc + 8040abc: 250c movcc r5, #12 + 8040abe: 2d00 cmp r5, #0 + 8040ac0: 4607 mov r7, r0 + 8040ac2: db01 blt.n 8040ac8 <_malloc_r+0x1c> + 8040ac4: 42a9 cmp r1, r5 + 8040ac6: d905 bls.n 8040ad4 <_malloc_r+0x28> + 8040ac8: 230c movs r3, #12 + 8040aca: 603b str r3, [r7, #0] + 8040acc: 2600 movs r6, #0 + 8040ace: 4630 mov r0, r6 + 8040ad0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8040ad4: 4e2e ldr r6, [pc, #184] ; (8040b90 <_malloc_r+0xe4>) + 8040ad6: f000 fa31 bl 8040f3c <__malloc_lock> + 8040ada: 6833 ldr r3, [r6, #0] + 8040adc: 461c mov r4, r3 + 8040ade: bb34 cbnz r4, 8040b2e <_malloc_r+0x82> + 8040ae0: 4629 mov r1, r5 + 8040ae2: 4638 mov r0, r7 + 8040ae4: f7ff ffc2 bl 8040a6c + 8040ae8: 1c43 adds r3, r0, #1 + 8040aea: 4604 mov r4, r0 + 8040aec: d14d bne.n 8040b8a <_malloc_r+0xde> + 8040aee: 6834 ldr r4, [r6, #0] + 8040af0: 4626 mov r6, r4 + 8040af2: 2e00 cmp r6, #0 + 8040af4: d140 bne.n 8040b78 <_malloc_r+0xcc> + 8040af6: 6823 ldr r3, [r4, #0] + 8040af8: 4631 mov r1, r6 + 8040afa: 4638 mov r0, r7 + 8040afc: eb04 0803 add.w r8, r4, r3 + 8040b00: f000 f89e bl 8040c40 <_sbrk_r> + 8040b04: 4580 cmp r8, r0 + 8040b06: d13a bne.n 8040b7e <_malloc_r+0xd2> + 8040b08: 6821 ldr r1, [r4, #0] + 8040b0a: 3503 adds r5, #3 + 8040b0c: 1a6d subs r5, r5, r1 + 8040b0e: f025 0503 bic.w r5, r5, #3 + 8040b12: 3508 adds r5, #8 + 8040b14: 2d0c cmp r5, #12 + 8040b16: bf38 it cc + 8040b18: 250c movcc r5, #12 + 8040b1a: 4629 mov r1, r5 + 8040b1c: 4638 mov r0, r7 + 8040b1e: f7ff ffa5 bl 8040a6c + 8040b22: 3001 adds r0, #1 + 8040b24: d02b beq.n 8040b7e <_malloc_r+0xd2> + 8040b26: 6823 ldr r3, [r4, #0] + 8040b28: 442b add r3, r5 + 8040b2a: 6023 str r3, [r4, #0] + 8040b2c: e00e b.n 8040b4c <_malloc_r+0xa0> + 8040b2e: 6822 ldr r2, [r4, #0] + 8040b30: 1b52 subs r2, r2, r5 + 8040b32: d41e bmi.n 8040b72 <_malloc_r+0xc6> + 8040b34: 2a0b cmp r2, #11 + 8040b36: d916 bls.n 8040b66 <_malloc_r+0xba> + 8040b38: 1961 adds r1, r4, r5 + 8040b3a: 42a3 cmp r3, r4 + 8040b3c: 6025 str r5, [r4, #0] + 8040b3e: bf18 it ne + 8040b40: 6059 strne r1, [r3, #4] + 8040b42: 6863 ldr r3, [r4, #4] + 8040b44: bf08 it eq + 8040b46: 6031 streq r1, [r6, #0] + 8040b48: 5162 str r2, [r4, r5] + 8040b4a: 604b str r3, [r1, #4] + 8040b4c: 4638 mov r0, r7 + 8040b4e: f104 060b add.w r6, r4, #11 + 8040b52: f000 f9f9 bl 8040f48 <__malloc_unlock> + 8040b56: f026 0607 bic.w r6, r6, #7 + 8040b5a: 1d23 adds r3, r4, #4 + 8040b5c: 1af2 subs r2, r6, r3 + 8040b5e: d0b6 beq.n 8040ace <_malloc_r+0x22> + 8040b60: 1b9b subs r3, r3, r6 + 8040b62: 50a3 str r3, [r4, r2] + 8040b64: e7b3 b.n 8040ace <_malloc_r+0x22> + 8040b66: 6862 ldr r2, [r4, #4] + 8040b68: 42a3 cmp r3, r4 + 8040b6a: bf0c ite eq + 8040b6c: 6032 streq r2, [r6, #0] + 8040b6e: 605a strne r2, [r3, #4] + 8040b70: e7ec b.n 8040b4c <_malloc_r+0xa0> + 8040b72: 4623 mov r3, r4 + 8040b74: 6864 ldr r4, [r4, #4] + 8040b76: e7b2 b.n 8040ade <_malloc_r+0x32> + 8040b78: 4634 mov r4, r6 + 8040b7a: 6876 ldr r6, [r6, #4] + 8040b7c: e7b9 b.n 8040af2 <_malloc_r+0x46> + 8040b7e: 230c movs r3, #12 + 8040b80: 603b str r3, [r7, #0] + 8040b82: 4638 mov r0, r7 + 8040b84: f000 f9e0 bl 8040f48 <__malloc_unlock> + 8040b88: e7a1 b.n 8040ace <_malloc_r+0x22> + 8040b8a: 6025 str r5, [r4, #0] + 8040b8c: e7de b.n 8040b4c <_malloc_r+0xa0> + 8040b8e: bf00 nop + 8040b90: 2400eabc .word 0x2400eabc + +08040b94 : + 8040b94: b40f push {r0, r1, r2, r3} + 8040b96: 4b0a ldr r3, [pc, #40] ; (8040bc0 ) + 8040b98: b513 push {r0, r1, r4, lr} + 8040b9a: 681c ldr r4, [r3, #0] + 8040b9c: b124 cbz r4, 8040ba8 + 8040b9e: 69a3 ldr r3, [r4, #24] + 8040ba0: b913 cbnz r3, 8040ba8 + 8040ba2: 4620 mov r0, r4 + 8040ba4: f000 f918 bl 8040dd8 <__sinit> + 8040ba8: ab05 add r3, sp, #20 + 8040baa: 9a04 ldr r2, [sp, #16] + 8040bac: 68a1 ldr r1, [r4, #8] + 8040bae: 9301 str r3, [sp, #4] + 8040bb0: 4620 mov r0, r4 + 8040bb2: f000 fb55 bl 8041260 <_vfiprintf_r> + 8040bb6: b002 add sp, #8 + 8040bb8: e8bd 4010 ldmia.w sp!, {r4, lr} + 8040bbc: b004 add sp, #16 + 8040bbe: 4770 bx lr + 8040bc0: 24000078 .word 0x24000078 + +08040bc4 : + 8040bc4: 4b16 ldr r3, [pc, #88] ; (8040c20 ) + 8040bc6: b510 push {r4, lr} + 8040bc8: 681c ldr r4, [r3, #0] + 8040bca: 6ba3 ldr r3, [r4, #56] ; 0x38 + 8040bcc: b9b3 cbnz r3, 8040bfc + 8040bce: 2018 movs r0, #24 + 8040bd0: f7ff feb0 bl 8040934 + 8040bd4: 63a0 str r0, [r4, #56] ; 0x38 + 8040bd6: b928 cbnz r0, 8040be4 + 8040bd8: 4602 mov r2, r0 + 8040bda: 4b12 ldr r3, [pc, #72] ; (8040c24 ) + 8040bdc: 4812 ldr r0, [pc, #72] ; (8040c28 ) + 8040bde: 214e movs r1, #78 ; 0x4e + 8040be0: f000 f87e bl 8040ce0 <__assert_func> + 8040be4: 4a11 ldr r2, [pc, #68] ; (8040c2c ) + 8040be6: 4b12 ldr r3, [pc, #72] ; (8040c30 ) + 8040be8: e9c0 2300 strd r2, r3, [r0] + 8040bec: 4b11 ldr r3, [pc, #68] ; (8040c34 ) + 8040bee: 6083 str r3, [r0, #8] + 8040bf0: 230b movs r3, #11 + 8040bf2: 8183 strh r3, [r0, #12] + 8040bf4: 2201 movs r2, #1 + 8040bf6: 2300 movs r3, #0 + 8040bf8: e9c0 2304 strd r2, r3, [r0, #16] + 8040bfc: 6ba4 ldr r4, [r4, #56] ; 0x38 + 8040bfe: 4a0e ldr r2, [pc, #56] ; (8040c38 ) + 8040c00: 6920 ldr r0, [r4, #16] + 8040c02: 6963 ldr r3, [r4, #20] + 8040c04: 490d ldr r1, [pc, #52] ; (8040c3c ) + 8040c06: 4342 muls r2, r0 + 8040c08: fb01 2203 mla r2, r1, r3, r2 + 8040c0c: fba0 0101 umull r0, r1, r0, r1 + 8040c10: 1c43 adds r3, r0, #1 + 8040c12: eb42 0001 adc.w r0, r2, r1 + 8040c16: e9c4 3004 strd r3, r0, [r4, #16] + 8040c1a: f020 4000 bic.w r0, r0, #2147483648 ; 0x80000000 + 8040c1e: bd10 pop {r4, pc} + 8040c20: 24000078 .word 0x24000078 + 8040c24: 08044e98 .word 0x08044e98 + 8040c28: 08044eaf .word 0x08044eaf + 8040c2c: abcd330e .word 0xabcd330e + 8040c30: e66d1234 .word 0xe66d1234 + 8040c34: 0005deec .word 0x0005deec + 8040c38: 5851f42d .word 0x5851f42d + 8040c3c: 4c957f2d .word 0x4c957f2d + +08040c40 <_sbrk_r>: + 8040c40: b538 push {r3, r4, r5, lr} + 8040c42: 4d06 ldr r5, [pc, #24] ; (8040c5c <_sbrk_r+0x1c>) + 8040c44: 2300 movs r3, #0 + 8040c46: 4604 mov r4, r0 + 8040c48: 4608 mov r0, r1 + 8040c4a: 602b str r3, [r5, #0] + 8040c4c: f7e3 fe64 bl 8024918 <_sbrk> + 8040c50: 1c43 adds r3, r0, #1 + 8040c52: d102 bne.n 8040c5a <_sbrk_r+0x1a> + 8040c54: 682b ldr r3, [r5, #0] + 8040c56: b103 cbz r3, 8040c5a <_sbrk_r+0x1a> + 8040c58: 6023 str r3, [r4, #0] + 8040c5a: bd38 pop {r3, r4, r5, pc} + 8040c5c: 2400eac4 .word 0x2400eac4 + +08040c60 : + 8040c60: b40e push {r1, r2, r3} + 8040c62: b500 push {lr} + 8040c64: b09c sub sp, #112 ; 0x70 + 8040c66: ab1d add r3, sp, #116 ; 0x74 + 8040c68: 9002 str r0, [sp, #8] + 8040c6a: 9006 str r0, [sp, #24] + 8040c6c: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 + 8040c70: 4809 ldr r0, [pc, #36] ; (8040c98 ) + 8040c72: 9107 str r1, [sp, #28] + 8040c74: 9104 str r1, [sp, #16] + 8040c76: 4909 ldr r1, [pc, #36] ; (8040c9c ) + 8040c78: f853 2b04 ldr.w r2, [r3], #4 + 8040c7c: 9105 str r1, [sp, #20] + 8040c7e: 6800 ldr r0, [r0, #0] + 8040c80: 9301 str r3, [sp, #4] + 8040c82: a902 add r1, sp, #8 + 8040c84: f000 f9c2 bl 804100c <_svfiprintf_r> + 8040c88: 9b02 ldr r3, [sp, #8] + 8040c8a: 2200 movs r2, #0 + 8040c8c: 701a strb r2, [r3, #0] + 8040c8e: b01c add sp, #112 ; 0x70 + 8040c90: f85d eb04 ldr.w lr, [sp], #4 + 8040c94: b003 add sp, #12 + 8040c96: 4770 bx lr + 8040c98: 24000078 .word 0x24000078 + 8040c9c: ffff0208 .word 0xffff0208 + +08040ca0 <_vsiprintf_r>: + 8040ca0: b500 push {lr} + 8040ca2: b09b sub sp, #108 ; 0x6c + 8040ca4: 9100 str r1, [sp, #0] + 8040ca6: 9104 str r1, [sp, #16] + 8040ca8: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000 + 8040cac: 9105 str r1, [sp, #20] + 8040cae: 9102 str r1, [sp, #8] + 8040cb0: 4905 ldr r1, [pc, #20] ; (8040cc8 <_vsiprintf_r+0x28>) + 8040cb2: 9103 str r1, [sp, #12] + 8040cb4: 4669 mov r1, sp + 8040cb6: f000 f9a9 bl 804100c <_svfiprintf_r> + 8040cba: 9b00 ldr r3, [sp, #0] + 8040cbc: 2200 movs r2, #0 + 8040cbe: 701a strb r2, [r3, #0] + 8040cc0: b01b add sp, #108 ; 0x6c + 8040cc2: f85d fb04 ldr.w pc, [sp], #4 + 8040cc6: bf00 nop + 8040cc8: ffff0208 .word 0xffff0208 + +08040ccc : + 8040ccc: 4613 mov r3, r2 + 8040cce: 460a mov r2, r1 + 8040cd0: 4601 mov r1, r0 + 8040cd2: 4802 ldr r0, [pc, #8] ; (8040cdc ) + 8040cd4: 6800 ldr r0, [r0, #0] + 8040cd6: f7ff bfe3 b.w 8040ca0 <_vsiprintf_r> 8040cda: bf00 nop - 8040cdc: 08041765 .word 0x08041765 - 8040ce0: 08041787 .word 0x08041787 - 8040ce4: 080417bf .word 0x080417bf - 8040ce8: 080417e3 .word 0x080417e3 - -08040cec <_cleanup_r>: - 8040cec: 4901 ldr r1, [pc, #4] ; (8040cf4 <_cleanup_r+0x8>) - 8040cee: f000 b8c1 b.w 8040e74 <_fwalk_reent> - 8040cf2: bf00 nop - 8040cf4: 08041acd .word 0x08041acd - -08040cf8 <__sfmoreglue>: - 8040cf8: b570 push {r4, r5, r6, lr} - 8040cfa: 2268 movs r2, #104 ; 0x68 - 8040cfc: 1e4d subs r5, r1, #1 - 8040cfe: 4355 muls r5, r2 - 8040d00: 460e mov r6, r1 - 8040d02: f105 0174 add.w r1, r5, #116 ; 0x74 - 8040d06: f7ff fe8f bl 8040a28 <_malloc_r> - 8040d0a: 4604 mov r4, r0 - 8040d0c: b140 cbz r0, 8040d20 <__sfmoreglue+0x28> - 8040d0e: 2100 movs r1, #0 - 8040d10: e9c0 1600 strd r1, r6, [r0] - 8040d14: 300c adds r0, #12 - 8040d16: 60a0 str r0, [r4, #8] - 8040d18: f105 0268 add.w r2, r5, #104 ; 0x68 - 8040d1c: f7ff fe10 bl 8040940 - 8040d20: 4620 mov r0, r4 - 8040d22: bd70 pop {r4, r5, r6, pc} - -08040d24 <__sfp_lock_acquire>: - 8040d24: 4801 ldr r0, [pc, #4] ; (8040d2c <__sfp_lock_acquire+0x8>) - 8040d26: f000 b8c5 b.w 8040eb4 <__retarget_lock_acquire_recursive> - 8040d2a: bf00 nop - 8040d2c: 2400eac1 .word 0x2400eac1 - -08040d30 <__sfp_lock_release>: - 8040d30: 4801 ldr r0, [pc, #4] ; (8040d38 <__sfp_lock_release+0x8>) - 8040d32: f000 b8c0 b.w 8040eb6 <__retarget_lock_release_recursive> - 8040d36: bf00 nop - 8040d38: 2400eac1 .word 0x2400eac1 - -08040d3c <__sinit_lock_acquire>: - 8040d3c: 4801 ldr r0, [pc, #4] ; (8040d44 <__sinit_lock_acquire+0x8>) - 8040d3e: f000 b8b9 b.w 8040eb4 <__retarget_lock_acquire_recursive> - 8040d42: bf00 nop - 8040d44: 2400eac2 .word 0x2400eac2 - -08040d48 <__sinit_lock_release>: - 8040d48: 4801 ldr r0, [pc, #4] ; (8040d50 <__sinit_lock_release+0x8>) - 8040d4a: f000 b8b4 b.w 8040eb6 <__retarget_lock_release_recursive> - 8040d4e: bf00 nop - 8040d50: 2400eac2 .word 0x2400eac2 - -08040d54 <__sinit>: - 8040d54: b510 push {r4, lr} - 8040d56: 4604 mov r4, r0 - 8040d58: f7ff fff0 bl 8040d3c <__sinit_lock_acquire> - 8040d5c: 69a3 ldr r3, [r4, #24] - 8040d5e: b11b cbz r3, 8040d68 <__sinit+0x14> - 8040d60: e8bd 4010 ldmia.w sp!, {r4, lr} - 8040d64: f7ff bff0 b.w 8040d48 <__sinit_lock_release> - 8040d68: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 - 8040d6c: 6523 str r3, [r4, #80] ; 0x50 - 8040d6e: 4b13 ldr r3, [pc, #76] ; (8040dbc <__sinit+0x68>) - 8040d70: 4a13 ldr r2, [pc, #76] ; (8040dc0 <__sinit+0x6c>) - 8040d72: 681b ldr r3, [r3, #0] - 8040d74: 62a2 str r2, [r4, #40] ; 0x28 - 8040d76: 42a3 cmp r3, r4 - 8040d78: bf04 itt eq - 8040d7a: 2301 moveq r3, #1 - 8040d7c: 61a3 streq r3, [r4, #24] - 8040d7e: 4620 mov r0, r4 - 8040d80: f000 f820 bl 8040dc4 <__sfp> - 8040d84: 6060 str r0, [r4, #4] - 8040d86: 4620 mov r0, r4 - 8040d88: f000 f81c bl 8040dc4 <__sfp> - 8040d8c: 60a0 str r0, [r4, #8] - 8040d8e: 4620 mov r0, r4 - 8040d90: f000 f818 bl 8040dc4 <__sfp> - 8040d94: 2200 movs r2, #0 - 8040d96: 60e0 str r0, [r4, #12] - 8040d98: 2104 movs r1, #4 - 8040d9a: 6860 ldr r0, [r4, #4] - 8040d9c: f7ff ff82 bl 8040ca4 - 8040da0: 68a0 ldr r0, [r4, #8] - 8040da2: 2201 movs r2, #1 - 8040da4: 2109 movs r1, #9 - 8040da6: f7ff ff7d bl 8040ca4 - 8040daa: 68e0 ldr r0, [r4, #12] - 8040dac: 2202 movs r2, #2 - 8040dae: 2112 movs r1, #18 - 8040db0: f7ff ff78 bl 8040ca4 - 8040db4: 2301 movs r3, #1 - 8040db6: 61a3 str r3, [r4, #24] - 8040db8: e7d2 b.n 8040d60 <__sinit+0xc> + 8040cdc: 24000078 .word 0x24000078 + +08040ce0 <__assert_func>: + 8040ce0: b51f push {r0, r1, r2, r3, r4, lr} + 8040ce2: 4614 mov r4, r2 + 8040ce4: 461a mov r2, r3 + 8040ce6: 4b09 ldr r3, [pc, #36] ; (8040d0c <__assert_func+0x2c>) + 8040ce8: 681b ldr r3, [r3, #0] + 8040cea: 4605 mov r5, r0 + 8040cec: 68d8 ldr r0, [r3, #12] + 8040cee: b14c cbz r4, 8040d04 <__assert_func+0x24> + 8040cf0: 4b07 ldr r3, [pc, #28] ; (8040d10 <__assert_func+0x30>) + 8040cf2: 9100 str r1, [sp, #0] + 8040cf4: e9cd 3401 strd r3, r4, [sp, #4] + 8040cf8: 4906 ldr r1, [pc, #24] ; (8040d14 <__assert_func+0x34>) + 8040cfa: 462b mov r3, r5 + 8040cfc: f000 f8ea bl 8040ed4 + 8040d00: f000 fe88 bl 8041a14 + 8040d04: 4b04 ldr r3, [pc, #16] ; (8040d18 <__assert_func+0x38>) + 8040d06: 461c mov r4, r3 + 8040d08: e7f3 b.n 8040cf2 <__assert_func+0x12> + 8040d0a: bf00 nop + 8040d0c: 24000078 .word 0x24000078 + 8040d10: 08044f0a .word 0x08044f0a + 8040d14: 08044f17 .word 0x08044f17 + 8040d18: 08044f45 .word 0x08044f45 + +08040d1c <__errno>: + 8040d1c: 4b01 ldr r3, [pc, #4] ; (8040d24 <__errno+0x8>) + 8040d1e: 6818 ldr r0, [r3, #0] + 8040d20: 4770 bx lr + 8040d22: bf00 nop + 8040d24: 24000078 .word 0x24000078 + +08040d28 : + 8040d28: 2300 movs r3, #0 + 8040d2a: b510 push {r4, lr} + 8040d2c: 4604 mov r4, r0 + 8040d2e: e9c0 3300 strd r3, r3, [r0] + 8040d32: e9c0 3304 strd r3, r3, [r0, #16] + 8040d36: 6083 str r3, [r0, #8] + 8040d38: 8181 strh r1, [r0, #12] + 8040d3a: 6643 str r3, [r0, #100] ; 0x64 + 8040d3c: 81c2 strh r2, [r0, #14] + 8040d3e: 6183 str r3, [r0, #24] + 8040d40: 4619 mov r1, r3 + 8040d42: 2208 movs r2, #8 + 8040d44: 305c adds r0, #92 ; 0x5c + 8040d46: f7ff fe3d bl 80409c4 + 8040d4a: 4b05 ldr r3, [pc, #20] ; (8040d60 ) + 8040d4c: 6263 str r3, [r4, #36] ; 0x24 + 8040d4e: 4b05 ldr r3, [pc, #20] ; (8040d64 ) + 8040d50: 62a3 str r3, [r4, #40] ; 0x28 + 8040d52: 4b05 ldr r3, [pc, #20] ; (8040d68 ) + 8040d54: 62e3 str r3, [r4, #44] ; 0x2c + 8040d56: 4b05 ldr r3, [pc, #20] ; (8040d6c ) + 8040d58: 6224 str r4, [r4, #32] + 8040d5a: 6323 str r3, [r4, #48] ; 0x30 + 8040d5c: bd10 pop {r4, pc} + 8040d5e: bf00 nop + 8040d60: 080417e9 .word 0x080417e9 + 8040d64: 0804180b .word 0x0804180b + 8040d68: 08041843 .word 0x08041843 + 8040d6c: 08041867 .word 0x08041867 + +08040d70 <_cleanup_r>: + 8040d70: 4901 ldr r1, [pc, #4] ; (8040d78 <_cleanup_r+0x8>) + 8040d72: f000 b8c1 b.w 8040ef8 <_fwalk_reent> + 8040d76: bf00 nop + 8040d78: 08041b51 .word 0x08041b51 + +08040d7c <__sfmoreglue>: + 8040d7c: b570 push {r4, r5, r6, lr} + 8040d7e: 2268 movs r2, #104 ; 0x68 + 8040d80: 1e4d subs r5, r1, #1 + 8040d82: 4355 muls r5, r2 + 8040d84: 460e mov r6, r1 + 8040d86: f105 0174 add.w r1, r5, #116 ; 0x74 + 8040d8a: f7ff fe8f bl 8040aac <_malloc_r> + 8040d8e: 4604 mov r4, r0 + 8040d90: b140 cbz r0, 8040da4 <__sfmoreglue+0x28> + 8040d92: 2100 movs r1, #0 + 8040d94: e9c0 1600 strd r1, r6, [r0] + 8040d98: 300c adds r0, #12 + 8040d9a: 60a0 str r0, [r4, #8] + 8040d9c: f105 0268 add.w r2, r5, #104 ; 0x68 + 8040da0: f7ff fe10 bl 80409c4 + 8040da4: 4620 mov r0, r4 + 8040da6: bd70 pop {r4, r5, r6, pc} + +08040da8 <__sfp_lock_acquire>: + 8040da8: 4801 ldr r0, [pc, #4] ; (8040db0 <__sfp_lock_acquire+0x8>) + 8040daa: f000 b8c5 b.w 8040f38 <__retarget_lock_acquire_recursive> + 8040dae: bf00 nop + 8040db0: 2400eac9 .word 0x2400eac9 + +08040db4 <__sfp_lock_release>: + 8040db4: 4801 ldr r0, [pc, #4] ; (8040dbc <__sfp_lock_release+0x8>) + 8040db6: f000 b8c0 b.w 8040f3a <__retarget_lock_release_recursive> 8040dba: bf00 nop - 8040dbc: 08044e14 .word 0x08044e14 - 8040dc0: 08040ced .word 0x08040ced - -08040dc4 <__sfp>: - 8040dc4: b5f8 push {r3, r4, r5, r6, r7, lr} - 8040dc6: 4607 mov r7, r0 - 8040dc8: f7ff ffac bl 8040d24 <__sfp_lock_acquire> - 8040dcc: 4b1e ldr r3, [pc, #120] ; (8040e48 <__sfp+0x84>) - 8040dce: 681e ldr r6, [r3, #0] - 8040dd0: 69b3 ldr r3, [r6, #24] - 8040dd2: b913 cbnz r3, 8040dda <__sfp+0x16> - 8040dd4: 4630 mov r0, r6 - 8040dd6: f7ff ffbd bl 8040d54 <__sinit> - 8040dda: 3648 adds r6, #72 ; 0x48 - 8040ddc: e9d6 3401 ldrd r3, r4, [r6, #4] - 8040de0: 3b01 subs r3, #1 - 8040de2: d503 bpl.n 8040dec <__sfp+0x28> - 8040de4: 6833 ldr r3, [r6, #0] - 8040de6: b30b cbz r3, 8040e2c <__sfp+0x68> - 8040de8: 6836 ldr r6, [r6, #0] - 8040dea: e7f7 b.n 8040ddc <__sfp+0x18> - 8040dec: f9b4 500c ldrsh.w r5, [r4, #12] - 8040df0: b9d5 cbnz r5, 8040e28 <__sfp+0x64> - 8040df2: 4b16 ldr r3, [pc, #88] ; (8040e4c <__sfp+0x88>) - 8040df4: 60e3 str r3, [r4, #12] - 8040df6: f104 0058 add.w r0, r4, #88 ; 0x58 - 8040dfa: 6665 str r5, [r4, #100] ; 0x64 - 8040dfc: f000 f859 bl 8040eb2 <__retarget_lock_init_recursive> - 8040e00: f7ff ff96 bl 8040d30 <__sfp_lock_release> - 8040e04: e9c4 5501 strd r5, r5, [r4, #4] - 8040e08: e9c4 5504 strd r5, r5, [r4, #16] - 8040e0c: 6025 str r5, [r4, #0] - 8040e0e: 61a5 str r5, [r4, #24] - 8040e10: 2208 movs r2, #8 - 8040e12: 4629 mov r1, r5 - 8040e14: f104 005c add.w r0, r4, #92 ; 0x5c - 8040e18: f7ff fd92 bl 8040940 - 8040e1c: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 - 8040e20: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 - 8040e24: 4620 mov r0, r4 - 8040e26: bdf8 pop {r3, r4, r5, r6, r7, pc} - 8040e28: 3468 adds r4, #104 ; 0x68 - 8040e2a: e7d9 b.n 8040de0 <__sfp+0x1c> - 8040e2c: 2104 movs r1, #4 - 8040e2e: 4638 mov r0, r7 - 8040e30: f7ff ff62 bl 8040cf8 <__sfmoreglue> - 8040e34: 4604 mov r4, r0 - 8040e36: 6030 str r0, [r6, #0] - 8040e38: 2800 cmp r0, #0 - 8040e3a: d1d5 bne.n 8040de8 <__sfp+0x24> - 8040e3c: f7ff ff78 bl 8040d30 <__sfp_lock_release> - 8040e40: 230c movs r3, #12 - 8040e42: 603b str r3, [r7, #0] - 8040e44: e7ee b.n 8040e24 <__sfp+0x60> - 8040e46: bf00 nop - 8040e48: 08044e14 .word 0x08044e14 - 8040e4c: ffff0001 .word 0xffff0001 - -08040e50 : - 8040e50: b40e push {r1, r2, r3} - 8040e52: b503 push {r0, r1, lr} - 8040e54: 4601 mov r1, r0 - 8040e56: ab03 add r3, sp, #12 - 8040e58: 4805 ldr r0, [pc, #20] ; (8040e70 ) - 8040e5a: f853 2b04 ldr.w r2, [r3], #4 - 8040e5e: 6800 ldr r0, [r0, #0] - 8040e60: 9301 str r3, [sp, #4] - 8040e62: f000 f9bb bl 80411dc <_vfiprintf_r> - 8040e66: b002 add sp, #8 - 8040e68: f85d eb04 ldr.w lr, [sp], #4 - 8040e6c: b003 add sp, #12 - 8040e6e: 4770 bx lr - 8040e70: 24000078 .word 0x24000078 - -08040e74 <_fwalk_reent>: - 8040e74: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} - 8040e78: 4606 mov r6, r0 - 8040e7a: 4688 mov r8, r1 - 8040e7c: f100 0448 add.w r4, r0, #72 ; 0x48 - 8040e80: 2700 movs r7, #0 - 8040e82: e9d4 9501 ldrd r9, r5, [r4, #4] - 8040e86: f1b9 0901 subs.w r9, r9, #1 - 8040e8a: d505 bpl.n 8040e98 <_fwalk_reent+0x24> - 8040e8c: 6824 ldr r4, [r4, #0] - 8040e8e: 2c00 cmp r4, #0 - 8040e90: d1f7 bne.n 8040e82 <_fwalk_reent+0xe> - 8040e92: 4638 mov r0, r7 - 8040e94: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} - 8040e98: 89ab ldrh r3, [r5, #12] - 8040e9a: 2b01 cmp r3, #1 - 8040e9c: d907 bls.n 8040eae <_fwalk_reent+0x3a> - 8040e9e: f9b5 300e ldrsh.w r3, [r5, #14] - 8040ea2: 3301 adds r3, #1 - 8040ea4: d003 beq.n 8040eae <_fwalk_reent+0x3a> - 8040ea6: 4629 mov r1, r5 - 8040ea8: 4630 mov r0, r6 - 8040eaa: 47c0 blx r8 - 8040eac: 4307 orrs r7, r0 - 8040eae: 3568 adds r5, #104 ; 0x68 - 8040eb0: e7e9 b.n 8040e86 <_fwalk_reent+0x12> - -08040eb2 <__retarget_lock_init_recursive>: - 8040eb2: 4770 bx lr - -08040eb4 <__retarget_lock_acquire_recursive>: - 8040eb4: 4770 bx lr - -08040eb6 <__retarget_lock_release_recursive>: - 8040eb6: 4770 bx lr - -08040eb8 <__malloc_lock>: - 8040eb8: 4801 ldr r0, [pc, #4] ; (8040ec0 <__malloc_lock+0x8>) - 8040eba: f7ff bffb b.w 8040eb4 <__retarget_lock_acquire_recursive> - 8040ebe: bf00 nop - 8040ec0: 2400eac0 .word 0x2400eac0 - -08040ec4 <__malloc_unlock>: - 8040ec4: 4801 ldr r0, [pc, #4] ; (8040ecc <__malloc_unlock+0x8>) - 8040ec6: f7ff bff6 b.w 8040eb6 <__retarget_lock_release_recursive> + 8040dbc: 2400eac9 .word 0x2400eac9 + +08040dc0 <__sinit_lock_acquire>: + 8040dc0: 4801 ldr r0, [pc, #4] ; (8040dc8 <__sinit_lock_acquire+0x8>) + 8040dc2: f000 b8b9 b.w 8040f38 <__retarget_lock_acquire_recursive> + 8040dc6: bf00 nop + 8040dc8: 2400eaca .word 0x2400eaca + +08040dcc <__sinit_lock_release>: + 8040dcc: 4801 ldr r0, [pc, #4] ; (8040dd4 <__sinit_lock_release+0x8>) + 8040dce: f000 b8b4 b.w 8040f3a <__retarget_lock_release_recursive> + 8040dd2: bf00 nop + 8040dd4: 2400eaca .word 0x2400eaca + +08040dd8 <__sinit>: + 8040dd8: b510 push {r4, lr} + 8040dda: 4604 mov r4, r0 + 8040ddc: f7ff fff0 bl 8040dc0 <__sinit_lock_acquire> + 8040de0: 69a3 ldr r3, [r4, #24] + 8040de2: b11b cbz r3, 8040dec <__sinit+0x14> + 8040de4: e8bd 4010 ldmia.w sp!, {r4, lr} + 8040de8: f7ff bff0 b.w 8040dcc <__sinit_lock_release> + 8040dec: e9c4 3312 strd r3, r3, [r4, #72] ; 0x48 + 8040df0: 6523 str r3, [r4, #80] ; 0x50 + 8040df2: 4b13 ldr r3, [pc, #76] ; (8040e40 <__sinit+0x68>) + 8040df4: 4a13 ldr r2, [pc, #76] ; (8040e44 <__sinit+0x6c>) + 8040df6: 681b ldr r3, [r3, #0] + 8040df8: 62a2 str r2, [r4, #40] ; 0x28 + 8040dfa: 42a3 cmp r3, r4 + 8040dfc: bf04 itt eq + 8040dfe: 2301 moveq r3, #1 + 8040e00: 61a3 streq r3, [r4, #24] + 8040e02: 4620 mov r0, r4 + 8040e04: f000 f820 bl 8040e48 <__sfp> + 8040e08: 6060 str r0, [r4, #4] + 8040e0a: 4620 mov r0, r4 + 8040e0c: f000 f81c bl 8040e48 <__sfp> + 8040e10: 60a0 str r0, [r4, #8] + 8040e12: 4620 mov r0, r4 + 8040e14: f000 f818 bl 8040e48 <__sfp> + 8040e18: 2200 movs r2, #0 + 8040e1a: 60e0 str r0, [r4, #12] + 8040e1c: 2104 movs r1, #4 + 8040e1e: 6860 ldr r0, [r4, #4] + 8040e20: f7ff ff82 bl 8040d28 + 8040e24: 68a0 ldr r0, [r4, #8] + 8040e26: 2201 movs r2, #1 + 8040e28: 2109 movs r1, #9 + 8040e2a: f7ff ff7d bl 8040d28 + 8040e2e: 68e0 ldr r0, [r4, #12] + 8040e30: 2202 movs r2, #2 + 8040e32: 2112 movs r1, #18 + 8040e34: f7ff ff78 bl 8040d28 + 8040e38: 2301 movs r3, #1 + 8040e3a: 61a3 str r3, [r4, #24] + 8040e3c: e7d2 b.n 8040de4 <__sinit+0xc> + 8040e3e: bf00 nop + 8040e40: 08044e94 .word 0x08044e94 + 8040e44: 08040d71 .word 0x08040d71 + +08040e48 <__sfp>: + 8040e48: b5f8 push {r3, r4, r5, r6, r7, lr} + 8040e4a: 4607 mov r7, r0 + 8040e4c: f7ff ffac bl 8040da8 <__sfp_lock_acquire> + 8040e50: 4b1e ldr r3, [pc, #120] ; (8040ecc <__sfp+0x84>) + 8040e52: 681e ldr r6, [r3, #0] + 8040e54: 69b3 ldr r3, [r6, #24] + 8040e56: b913 cbnz r3, 8040e5e <__sfp+0x16> + 8040e58: 4630 mov r0, r6 + 8040e5a: f7ff ffbd bl 8040dd8 <__sinit> + 8040e5e: 3648 adds r6, #72 ; 0x48 + 8040e60: e9d6 3401 ldrd r3, r4, [r6, #4] + 8040e64: 3b01 subs r3, #1 + 8040e66: d503 bpl.n 8040e70 <__sfp+0x28> + 8040e68: 6833 ldr r3, [r6, #0] + 8040e6a: b30b cbz r3, 8040eb0 <__sfp+0x68> + 8040e6c: 6836 ldr r6, [r6, #0] + 8040e6e: e7f7 b.n 8040e60 <__sfp+0x18> + 8040e70: f9b4 500c ldrsh.w r5, [r4, #12] + 8040e74: b9d5 cbnz r5, 8040eac <__sfp+0x64> + 8040e76: 4b16 ldr r3, [pc, #88] ; (8040ed0 <__sfp+0x88>) + 8040e78: 60e3 str r3, [r4, #12] + 8040e7a: f104 0058 add.w r0, r4, #88 ; 0x58 + 8040e7e: 6665 str r5, [r4, #100] ; 0x64 + 8040e80: f000 f859 bl 8040f36 <__retarget_lock_init_recursive> + 8040e84: f7ff ff96 bl 8040db4 <__sfp_lock_release> + 8040e88: e9c4 5501 strd r5, r5, [r4, #4] + 8040e8c: e9c4 5504 strd r5, r5, [r4, #16] + 8040e90: 6025 str r5, [r4, #0] + 8040e92: 61a5 str r5, [r4, #24] + 8040e94: 2208 movs r2, #8 + 8040e96: 4629 mov r1, r5 + 8040e98: f104 005c add.w r0, r4, #92 ; 0x5c + 8040e9c: f7ff fd92 bl 80409c4 + 8040ea0: e9c4 550d strd r5, r5, [r4, #52] ; 0x34 + 8040ea4: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48 + 8040ea8: 4620 mov r0, r4 + 8040eaa: bdf8 pop {r3, r4, r5, r6, r7, pc} + 8040eac: 3468 adds r4, #104 ; 0x68 + 8040eae: e7d9 b.n 8040e64 <__sfp+0x1c> + 8040eb0: 2104 movs r1, #4 + 8040eb2: 4638 mov r0, r7 + 8040eb4: f7ff ff62 bl 8040d7c <__sfmoreglue> + 8040eb8: 4604 mov r4, r0 + 8040eba: 6030 str r0, [r6, #0] + 8040ebc: 2800 cmp r0, #0 + 8040ebe: d1d5 bne.n 8040e6c <__sfp+0x24> + 8040ec0: f7ff ff78 bl 8040db4 <__sfp_lock_release> + 8040ec4: 230c movs r3, #12 + 8040ec6: 603b str r3, [r7, #0] + 8040ec8: e7ee b.n 8040ea8 <__sfp+0x60> 8040eca: bf00 nop - 8040ecc: 2400eac0 .word 0x2400eac0 - -08040ed0 <__ssputs_r>: - 8040ed0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} - 8040ed4: 688e ldr r6, [r1, #8] - 8040ed6: 429e cmp r6, r3 - 8040ed8: 4682 mov sl, r0 - 8040eda: 460c mov r4, r1 - 8040edc: 4690 mov r8, r2 - 8040ede: 461f mov r7, r3 - 8040ee0: d838 bhi.n 8040f54 <__ssputs_r+0x84> - 8040ee2: 898a ldrh r2, [r1, #12] - 8040ee4: f412 6f90 tst.w r2, #1152 ; 0x480 - 8040ee8: d032 beq.n 8040f50 <__ssputs_r+0x80> - 8040eea: 6825 ldr r5, [r4, #0] - 8040eec: 6909 ldr r1, [r1, #16] - 8040eee: eba5 0901 sub.w r9, r5, r1 - 8040ef2: 6965 ldr r5, [r4, #20] - 8040ef4: eb05 0545 add.w r5, r5, r5, lsl #1 - 8040ef8: eb05 75d5 add.w r5, r5, r5, lsr #31 - 8040efc: 3301 adds r3, #1 - 8040efe: 444b add r3, r9 - 8040f00: 106d asrs r5, r5, #1 - 8040f02: 429d cmp r5, r3 - 8040f04: bf38 it cc - 8040f06: 461d movcc r5, r3 - 8040f08: 0553 lsls r3, r2, #21 - 8040f0a: d531 bpl.n 8040f70 <__ssputs_r+0xa0> - 8040f0c: 4629 mov r1, r5 - 8040f0e: f7ff fd8b bl 8040a28 <_malloc_r> - 8040f12: 4606 mov r6, r0 - 8040f14: b950 cbnz r0, 8040f2c <__ssputs_r+0x5c> - 8040f16: 230c movs r3, #12 - 8040f18: f8ca 3000 str.w r3, [sl] - 8040f1c: 89a3 ldrh r3, [r4, #12] - 8040f1e: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8040f22: 81a3 strh r3, [r4, #12] - 8040f24: f04f 30ff mov.w r0, #4294967295 - 8040f28: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 8040f2c: 6921 ldr r1, [r4, #16] - 8040f2e: 464a mov r2, r9 - 8040f30: f7ff fcde bl 80408f0 - 8040f34: 89a3 ldrh r3, [r4, #12] - 8040f36: f423 6390 bic.w r3, r3, #1152 ; 0x480 - 8040f3a: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8040f3e: 81a3 strh r3, [r4, #12] - 8040f40: 6126 str r6, [r4, #16] - 8040f42: 6165 str r5, [r4, #20] - 8040f44: 444e add r6, r9 - 8040f46: eba5 0509 sub.w r5, r5, r9 - 8040f4a: 6026 str r6, [r4, #0] - 8040f4c: 60a5 str r5, [r4, #8] - 8040f4e: 463e mov r6, r7 - 8040f50: 42be cmp r6, r7 - 8040f52: d900 bls.n 8040f56 <__ssputs_r+0x86> - 8040f54: 463e mov r6, r7 - 8040f56: 6820 ldr r0, [r4, #0] - 8040f58: 4632 mov r2, r6 - 8040f5a: 4641 mov r1, r8 - 8040f5c: f7ff fcd6 bl 804090c - 8040f60: 68a3 ldr r3, [r4, #8] - 8040f62: 1b9b subs r3, r3, r6 - 8040f64: 60a3 str r3, [r4, #8] - 8040f66: 6823 ldr r3, [r4, #0] - 8040f68: 4433 add r3, r6 - 8040f6a: 6023 str r3, [r4, #0] - 8040f6c: 2000 movs r0, #0 - 8040f6e: e7db b.n 8040f28 <__ssputs_r+0x58> - 8040f70: 462a mov r2, r5 - 8040f72: f000 fe5f bl 8041c34 <_realloc_r> - 8040f76: 4606 mov r6, r0 - 8040f78: 2800 cmp r0, #0 - 8040f7a: d1e1 bne.n 8040f40 <__ssputs_r+0x70> - 8040f7c: 6921 ldr r1, [r4, #16] - 8040f7e: 4650 mov r0, sl - 8040f80: f7ff fce6 bl 8040950 <_free_r> - 8040f84: e7c7 b.n 8040f16 <__ssputs_r+0x46> + 8040ecc: 08044e94 .word 0x08044e94 + 8040ed0: ffff0001 .word 0xffff0001 + +08040ed4 : + 8040ed4: b40e push {r1, r2, r3} + 8040ed6: b503 push {r0, r1, lr} + 8040ed8: 4601 mov r1, r0 + 8040eda: ab03 add r3, sp, #12 + 8040edc: 4805 ldr r0, [pc, #20] ; (8040ef4 ) + 8040ede: f853 2b04 ldr.w r2, [r3], #4 + 8040ee2: 6800 ldr r0, [r0, #0] + 8040ee4: 9301 str r3, [sp, #4] + 8040ee6: f000 f9bb bl 8041260 <_vfiprintf_r> + 8040eea: b002 add sp, #8 + 8040eec: f85d eb04 ldr.w lr, [sp], #4 + 8040ef0: b003 add sp, #12 + 8040ef2: 4770 bx lr + 8040ef4: 24000078 .word 0x24000078 + +08040ef8 <_fwalk_reent>: + 8040ef8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} + 8040efc: 4606 mov r6, r0 + 8040efe: 4688 mov r8, r1 + 8040f00: f100 0448 add.w r4, r0, #72 ; 0x48 + 8040f04: 2700 movs r7, #0 + 8040f06: e9d4 9501 ldrd r9, r5, [r4, #4] + 8040f0a: f1b9 0901 subs.w r9, r9, #1 + 8040f0e: d505 bpl.n 8040f1c <_fwalk_reent+0x24> + 8040f10: 6824 ldr r4, [r4, #0] + 8040f12: 2c00 cmp r4, #0 + 8040f14: d1f7 bne.n 8040f06 <_fwalk_reent+0xe> + 8040f16: 4638 mov r0, r7 + 8040f18: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} + 8040f1c: 89ab ldrh r3, [r5, #12] + 8040f1e: 2b01 cmp r3, #1 + 8040f20: d907 bls.n 8040f32 <_fwalk_reent+0x3a> + 8040f22: f9b5 300e ldrsh.w r3, [r5, #14] + 8040f26: 3301 adds r3, #1 + 8040f28: d003 beq.n 8040f32 <_fwalk_reent+0x3a> + 8040f2a: 4629 mov r1, r5 + 8040f2c: 4630 mov r0, r6 + 8040f2e: 47c0 blx r8 + 8040f30: 4307 orrs r7, r0 + 8040f32: 3568 adds r5, #104 ; 0x68 + 8040f34: e7e9 b.n 8040f0a <_fwalk_reent+0x12> + +08040f36 <__retarget_lock_init_recursive>: + 8040f36: 4770 bx lr + +08040f38 <__retarget_lock_acquire_recursive>: + 8040f38: 4770 bx lr + +08040f3a <__retarget_lock_release_recursive>: + 8040f3a: 4770 bx lr + +08040f3c <__malloc_lock>: + 8040f3c: 4801 ldr r0, [pc, #4] ; (8040f44 <__malloc_lock+0x8>) + 8040f3e: f7ff bffb b.w 8040f38 <__retarget_lock_acquire_recursive> + 8040f42: bf00 nop + 8040f44: 2400eac8 .word 0x2400eac8 + +08040f48 <__malloc_unlock>: + 8040f48: 4801 ldr r0, [pc, #4] ; (8040f50 <__malloc_unlock+0x8>) + 8040f4a: f7ff bff6 b.w 8040f3a <__retarget_lock_release_recursive> + 8040f4e: bf00 nop + 8040f50: 2400eac8 .word 0x2400eac8 + +08040f54 <__ssputs_r>: + 8040f54: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8040f58: 688e ldr r6, [r1, #8] + 8040f5a: 429e cmp r6, r3 + 8040f5c: 4682 mov sl, r0 + 8040f5e: 460c mov r4, r1 + 8040f60: 4690 mov r8, r2 + 8040f62: 461f mov r7, r3 + 8040f64: d838 bhi.n 8040fd8 <__ssputs_r+0x84> + 8040f66: 898a ldrh r2, [r1, #12] + 8040f68: f412 6f90 tst.w r2, #1152 ; 0x480 + 8040f6c: d032 beq.n 8040fd4 <__ssputs_r+0x80> + 8040f6e: 6825 ldr r5, [r4, #0] + 8040f70: 6909 ldr r1, [r1, #16] + 8040f72: eba5 0901 sub.w r9, r5, r1 + 8040f76: 6965 ldr r5, [r4, #20] + 8040f78: eb05 0545 add.w r5, r5, r5, lsl #1 + 8040f7c: eb05 75d5 add.w r5, r5, r5, lsr #31 + 8040f80: 3301 adds r3, #1 + 8040f82: 444b add r3, r9 + 8040f84: 106d asrs r5, r5, #1 + 8040f86: 429d cmp r5, r3 + 8040f88: bf38 it cc + 8040f8a: 461d movcc r5, r3 + 8040f8c: 0553 lsls r3, r2, #21 + 8040f8e: d531 bpl.n 8040ff4 <__ssputs_r+0xa0> + 8040f90: 4629 mov r1, r5 + 8040f92: f7ff fd8b bl 8040aac <_malloc_r> + 8040f96: 4606 mov r6, r0 + 8040f98: b950 cbnz r0, 8040fb0 <__ssputs_r+0x5c> + 8040f9a: 230c movs r3, #12 + 8040f9c: f8ca 3000 str.w r3, [sl] + 8040fa0: 89a3 ldrh r3, [r4, #12] + 8040fa2: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8040fa6: 81a3 strh r3, [r4, #12] + 8040fa8: f04f 30ff mov.w r0, #4294967295 + 8040fac: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 8040fb0: 6921 ldr r1, [r4, #16] + 8040fb2: 464a mov r2, r9 + 8040fb4: f7ff fcde bl 8040974 + 8040fb8: 89a3 ldrh r3, [r4, #12] + 8040fba: f423 6390 bic.w r3, r3, #1152 ; 0x480 + 8040fbe: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8040fc2: 81a3 strh r3, [r4, #12] + 8040fc4: 6126 str r6, [r4, #16] + 8040fc6: 6165 str r5, [r4, #20] + 8040fc8: 444e add r6, r9 + 8040fca: eba5 0509 sub.w r5, r5, r9 + 8040fce: 6026 str r6, [r4, #0] + 8040fd0: 60a5 str r5, [r4, #8] + 8040fd2: 463e mov r6, r7 + 8040fd4: 42be cmp r6, r7 + 8040fd6: d900 bls.n 8040fda <__ssputs_r+0x86> + 8040fd8: 463e mov r6, r7 + 8040fda: 6820 ldr r0, [r4, #0] + 8040fdc: 4632 mov r2, r6 + 8040fde: 4641 mov r1, r8 + 8040fe0: f7ff fcd6 bl 8040990 + 8040fe4: 68a3 ldr r3, [r4, #8] + 8040fe6: 1b9b subs r3, r3, r6 + 8040fe8: 60a3 str r3, [r4, #8] + 8040fea: 6823 ldr r3, [r4, #0] + 8040fec: 4433 add r3, r6 + 8040fee: 6023 str r3, [r4, #0] + 8040ff0: 2000 movs r0, #0 + 8040ff2: e7db b.n 8040fac <__ssputs_r+0x58> + 8040ff4: 462a mov r2, r5 + 8040ff6: f000 fe5f bl 8041cb8 <_realloc_r> + 8040ffa: 4606 mov r6, r0 + 8040ffc: 2800 cmp r0, #0 + 8040ffe: d1e1 bne.n 8040fc4 <__ssputs_r+0x70> + 8041000: 6921 ldr r1, [r4, #16] + 8041002: 4650 mov r0, sl + 8041004: f7ff fce6 bl 80409d4 <_free_r> + 8041008: e7c7 b.n 8040f9a <__ssputs_r+0x46> ... -08040f88 <_svfiprintf_r>: - 8040f88: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 8040f8c: 4698 mov r8, r3 - 8040f8e: 898b ldrh r3, [r1, #12] - 8040f90: 061b lsls r3, r3, #24 - 8040f92: b09d sub sp, #116 ; 0x74 - 8040f94: 4607 mov r7, r0 - 8040f96: 460d mov r5, r1 - 8040f98: 4614 mov r4, r2 - 8040f9a: d50e bpl.n 8040fba <_svfiprintf_r+0x32> - 8040f9c: 690b ldr r3, [r1, #16] - 8040f9e: b963 cbnz r3, 8040fba <_svfiprintf_r+0x32> - 8040fa0: 2140 movs r1, #64 ; 0x40 - 8040fa2: f7ff fd41 bl 8040a28 <_malloc_r> - 8040fa6: 6028 str r0, [r5, #0] - 8040fa8: 6128 str r0, [r5, #16] - 8040faa: b920 cbnz r0, 8040fb6 <_svfiprintf_r+0x2e> - 8040fac: 230c movs r3, #12 - 8040fae: 603b str r3, [r7, #0] - 8040fb0: f04f 30ff mov.w r0, #4294967295 - 8040fb4: e0d1 b.n 804115a <_svfiprintf_r+0x1d2> - 8040fb6: 2340 movs r3, #64 ; 0x40 - 8040fb8: 616b str r3, [r5, #20] - 8040fba: 2300 movs r3, #0 - 8040fbc: 9309 str r3, [sp, #36] ; 0x24 - 8040fbe: 2320 movs r3, #32 - 8040fc0: f88d 3029 strb.w r3, [sp, #41] ; 0x29 - 8040fc4: f8cd 800c str.w r8, [sp, #12] - 8040fc8: 2330 movs r3, #48 ; 0x30 - 8040fca: f8df 81a8 ldr.w r8, [pc, #424] ; 8041174 <_svfiprintf_r+0x1ec> - 8040fce: f88d 302a strb.w r3, [sp, #42] ; 0x2a - 8040fd2: f04f 0901 mov.w r9, #1 - 8040fd6: 4623 mov r3, r4 - 8040fd8: 469a mov sl, r3 - 8040fda: f813 2b01 ldrb.w r2, [r3], #1 - 8040fde: b10a cbz r2, 8040fe4 <_svfiprintf_r+0x5c> - 8040fe0: 2a25 cmp r2, #37 ; 0x25 - 8040fe2: d1f9 bne.n 8040fd8 <_svfiprintf_r+0x50> - 8040fe4: ebba 0b04 subs.w fp, sl, r4 - 8040fe8: d00b beq.n 8041002 <_svfiprintf_r+0x7a> - 8040fea: 465b mov r3, fp - 8040fec: 4622 mov r2, r4 - 8040fee: 4629 mov r1, r5 - 8040ff0: 4638 mov r0, r7 - 8040ff2: f7ff ff6d bl 8040ed0 <__ssputs_r> - 8040ff6: 3001 adds r0, #1 - 8040ff8: f000 80aa beq.w 8041150 <_svfiprintf_r+0x1c8> - 8040ffc: 9a09 ldr r2, [sp, #36] ; 0x24 - 8040ffe: 445a add r2, fp - 8041000: 9209 str r2, [sp, #36] ; 0x24 - 8041002: f89a 3000 ldrb.w r3, [sl] - 8041006: 2b00 cmp r3, #0 - 8041008: f000 80a2 beq.w 8041150 <_svfiprintf_r+0x1c8> - 804100c: 2300 movs r3, #0 - 804100e: f04f 32ff mov.w r2, #4294967295 - 8041012: e9cd 2305 strd r2, r3, [sp, #20] - 8041016: f10a 0a01 add.w sl, sl, #1 - 804101a: 9304 str r3, [sp, #16] - 804101c: 9307 str r3, [sp, #28] - 804101e: f88d 3053 strb.w r3, [sp, #83] ; 0x53 - 8041022: 931a str r3, [sp, #104] ; 0x68 - 8041024: 4654 mov r4, sl - 8041026: 2205 movs r2, #5 - 8041028: f814 1b01 ldrb.w r1, [r4], #1 - 804102c: 4851 ldr r0, [pc, #324] ; (8041174 <_svfiprintf_r+0x1ec>) - 804102e: f7df f96f bl 8020310 - 8041032: 9a04 ldr r2, [sp, #16] - 8041034: b9d8 cbnz r0, 804106e <_svfiprintf_r+0xe6> - 8041036: 06d0 lsls r0, r2, #27 - 8041038: bf44 itt mi - 804103a: 2320 movmi r3, #32 - 804103c: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 - 8041040: 0711 lsls r1, r2, #28 - 8041042: bf44 itt mi - 8041044: 232b movmi r3, #43 ; 0x2b - 8041046: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 - 804104a: f89a 3000 ldrb.w r3, [sl] - 804104e: 2b2a cmp r3, #42 ; 0x2a - 8041050: d015 beq.n 804107e <_svfiprintf_r+0xf6> - 8041052: 9a07 ldr r2, [sp, #28] - 8041054: 4654 mov r4, sl - 8041056: 2000 movs r0, #0 - 8041058: f04f 0c0a mov.w ip, #10 - 804105c: 4621 mov r1, r4 - 804105e: f811 3b01 ldrb.w r3, [r1], #1 - 8041062: 3b30 subs r3, #48 ; 0x30 - 8041064: 2b09 cmp r3, #9 - 8041066: d94e bls.n 8041106 <_svfiprintf_r+0x17e> - 8041068: b1b0 cbz r0, 8041098 <_svfiprintf_r+0x110> - 804106a: 9207 str r2, [sp, #28] - 804106c: e014 b.n 8041098 <_svfiprintf_r+0x110> - 804106e: eba0 0308 sub.w r3, r0, r8 - 8041072: fa09 f303 lsl.w r3, r9, r3 - 8041076: 4313 orrs r3, r2 - 8041078: 9304 str r3, [sp, #16] - 804107a: 46a2 mov sl, r4 - 804107c: e7d2 b.n 8041024 <_svfiprintf_r+0x9c> - 804107e: 9b03 ldr r3, [sp, #12] - 8041080: 1d19 adds r1, r3, #4 - 8041082: 681b ldr r3, [r3, #0] - 8041084: 9103 str r1, [sp, #12] - 8041086: 2b00 cmp r3, #0 - 8041088: bfbb ittet lt - 804108a: 425b neglt r3, r3 - 804108c: f042 0202 orrlt.w r2, r2, #2 - 8041090: 9307 strge r3, [sp, #28] - 8041092: 9307 strlt r3, [sp, #28] - 8041094: bfb8 it lt - 8041096: 9204 strlt r2, [sp, #16] - 8041098: 7823 ldrb r3, [r4, #0] - 804109a: 2b2e cmp r3, #46 ; 0x2e - 804109c: d10c bne.n 80410b8 <_svfiprintf_r+0x130> - 804109e: 7863 ldrb r3, [r4, #1] - 80410a0: 2b2a cmp r3, #42 ; 0x2a - 80410a2: d135 bne.n 8041110 <_svfiprintf_r+0x188> - 80410a4: 9b03 ldr r3, [sp, #12] - 80410a6: 1d1a adds r2, r3, #4 - 80410a8: 681b ldr r3, [r3, #0] - 80410aa: 9203 str r2, [sp, #12] - 80410ac: 2b00 cmp r3, #0 - 80410ae: bfb8 it lt - 80410b0: f04f 33ff movlt.w r3, #4294967295 - 80410b4: 3402 adds r4, #2 - 80410b6: 9305 str r3, [sp, #20] - 80410b8: f8df a0c8 ldr.w sl, [pc, #200] ; 8041184 <_svfiprintf_r+0x1fc> - 80410bc: 7821 ldrb r1, [r4, #0] - 80410be: 2203 movs r2, #3 - 80410c0: 4650 mov r0, sl - 80410c2: f7df f925 bl 8020310 - 80410c6: b140 cbz r0, 80410da <_svfiprintf_r+0x152> - 80410c8: 2340 movs r3, #64 ; 0x40 - 80410ca: eba0 000a sub.w r0, r0, sl - 80410ce: fa03 f000 lsl.w r0, r3, r0 - 80410d2: 9b04 ldr r3, [sp, #16] - 80410d4: 4303 orrs r3, r0 - 80410d6: 3401 adds r4, #1 - 80410d8: 9304 str r3, [sp, #16] - 80410da: f814 1b01 ldrb.w r1, [r4], #1 - 80410de: 4826 ldr r0, [pc, #152] ; (8041178 <_svfiprintf_r+0x1f0>) - 80410e0: f88d 1028 strb.w r1, [sp, #40] ; 0x28 - 80410e4: 2206 movs r2, #6 - 80410e6: f7df f913 bl 8020310 - 80410ea: 2800 cmp r0, #0 - 80410ec: d038 beq.n 8041160 <_svfiprintf_r+0x1d8> - 80410ee: 4b23 ldr r3, [pc, #140] ; (804117c <_svfiprintf_r+0x1f4>) - 80410f0: bb1b cbnz r3, 804113a <_svfiprintf_r+0x1b2> - 80410f2: 9b03 ldr r3, [sp, #12] - 80410f4: 3307 adds r3, #7 - 80410f6: f023 0307 bic.w r3, r3, #7 - 80410fa: 3308 adds r3, #8 - 80410fc: 9303 str r3, [sp, #12] - 80410fe: 9b09 ldr r3, [sp, #36] ; 0x24 - 8041100: 4433 add r3, r6 - 8041102: 9309 str r3, [sp, #36] ; 0x24 - 8041104: e767 b.n 8040fd6 <_svfiprintf_r+0x4e> - 8041106: fb0c 3202 mla r2, ip, r2, r3 - 804110a: 460c mov r4, r1 - 804110c: 2001 movs r0, #1 - 804110e: e7a5 b.n 804105c <_svfiprintf_r+0xd4> - 8041110: 2300 movs r3, #0 - 8041112: 3401 adds r4, #1 - 8041114: 9305 str r3, [sp, #20] - 8041116: 4619 mov r1, r3 - 8041118: f04f 0c0a mov.w ip, #10 - 804111c: 4620 mov r0, r4 - 804111e: f810 2b01 ldrb.w r2, [r0], #1 - 8041122: 3a30 subs r2, #48 ; 0x30 - 8041124: 2a09 cmp r2, #9 - 8041126: d903 bls.n 8041130 <_svfiprintf_r+0x1a8> - 8041128: 2b00 cmp r3, #0 - 804112a: d0c5 beq.n 80410b8 <_svfiprintf_r+0x130> - 804112c: 9105 str r1, [sp, #20] - 804112e: e7c3 b.n 80410b8 <_svfiprintf_r+0x130> - 8041130: fb0c 2101 mla r1, ip, r1, r2 - 8041134: 4604 mov r4, r0 - 8041136: 2301 movs r3, #1 - 8041138: e7f0 b.n 804111c <_svfiprintf_r+0x194> - 804113a: ab03 add r3, sp, #12 - 804113c: 9300 str r3, [sp, #0] - 804113e: 462a mov r2, r5 - 8041140: 4b0f ldr r3, [pc, #60] ; (8041180 <_svfiprintf_r+0x1f8>) - 8041142: a904 add r1, sp, #16 - 8041144: 4638 mov r0, r7 - 8041146: f3af 8000 nop.w - 804114a: 1c42 adds r2, r0, #1 - 804114c: 4606 mov r6, r0 - 804114e: d1d6 bne.n 80410fe <_svfiprintf_r+0x176> - 8041150: 89ab ldrh r3, [r5, #12] - 8041152: 065b lsls r3, r3, #25 - 8041154: f53f af2c bmi.w 8040fb0 <_svfiprintf_r+0x28> - 8041158: 9809 ldr r0, [sp, #36] ; 0x24 - 804115a: b01d add sp, #116 ; 0x74 - 804115c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8041160: ab03 add r3, sp, #12 - 8041162: 9300 str r3, [sp, #0] - 8041164: 462a mov r2, r5 - 8041166: 4b06 ldr r3, [pc, #24] ; (8041180 <_svfiprintf_r+0x1f8>) - 8041168: a904 add r1, sp, #16 - 804116a: 4638 mov r0, r7 - 804116c: f000 f9d4 bl 8041518 <_printf_i> - 8041170: e7eb b.n 804114a <_svfiprintf_r+0x1c2> - 8041172: bf00 nop - 8041174: 08044f28 .word 0x08044f28 - 8041178: 08044f32 .word 0x08044f32 - 804117c: 00000000 .word 0x00000000 - 8041180: 08040ed1 .word 0x08040ed1 - 8041184: 08044f2e .word 0x08044f2e - -08041188 <__sfputc_r>: - 8041188: 6893 ldr r3, [r2, #8] - 804118a: 3b01 subs r3, #1 - 804118c: 2b00 cmp r3, #0 - 804118e: b410 push {r4} - 8041190: 6093 str r3, [r2, #8] - 8041192: da08 bge.n 80411a6 <__sfputc_r+0x1e> - 8041194: 6994 ldr r4, [r2, #24] - 8041196: 42a3 cmp r3, r4 - 8041198: db01 blt.n 804119e <__sfputc_r+0x16> - 804119a: 290a cmp r1, #10 - 804119c: d103 bne.n 80411a6 <__sfputc_r+0x1e> - 804119e: f85d 4b04 ldr.w r4, [sp], #4 - 80411a2: f000 bb23 b.w 80417ec <__swbuf_r> - 80411a6: 6813 ldr r3, [r2, #0] - 80411a8: 1c58 adds r0, r3, #1 - 80411aa: 6010 str r0, [r2, #0] - 80411ac: 7019 strb r1, [r3, #0] - 80411ae: 4608 mov r0, r1 - 80411b0: f85d 4b04 ldr.w r4, [sp], #4 - 80411b4: 4770 bx lr - -080411b6 <__sfputs_r>: - 80411b6: b5f8 push {r3, r4, r5, r6, r7, lr} - 80411b8: 4606 mov r6, r0 - 80411ba: 460f mov r7, r1 - 80411bc: 4614 mov r4, r2 - 80411be: 18d5 adds r5, r2, r3 - 80411c0: 42ac cmp r4, r5 - 80411c2: d101 bne.n 80411c8 <__sfputs_r+0x12> - 80411c4: 2000 movs r0, #0 - 80411c6: e007 b.n 80411d8 <__sfputs_r+0x22> - 80411c8: f814 1b01 ldrb.w r1, [r4], #1 - 80411cc: 463a mov r2, r7 - 80411ce: 4630 mov r0, r6 - 80411d0: f7ff ffda bl 8041188 <__sfputc_r> - 80411d4: 1c43 adds r3, r0, #1 - 80411d6: d1f3 bne.n 80411c0 <__sfputs_r+0xa> - 80411d8: bdf8 pop {r3, r4, r5, r6, r7, pc} +0804100c <_svfiprintf_r>: + 804100c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8041010: 4698 mov r8, r3 + 8041012: 898b ldrh r3, [r1, #12] + 8041014: 061b lsls r3, r3, #24 + 8041016: b09d sub sp, #116 ; 0x74 + 8041018: 4607 mov r7, r0 + 804101a: 460d mov r5, r1 + 804101c: 4614 mov r4, r2 + 804101e: d50e bpl.n 804103e <_svfiprintf_r+0x32> + 8041020: 690b ldr r3, [r1, #16] + 8041022: b963 cbnz r3, 804103e <_svfiprintf_r+0x32> + 8041024: 2140 movs r1, #64 ; 0x40 + 8041026: f7ff fd41 bl 8040aac <_malloc_r> + 804102a: 6028 str r0, [r5, #0] + 804102c: 6128 str r0, [r5, #16] + 804102e: b920 cbnz r0, 804103a <_svfiprintf_r+0x2e> + 8041030: 230c movs r3, #12 + 8041032: 603b str r3, [r7, #0] + 8041034: f04f 30ff mov.w r0, #4294967295 + 8041038: e0d1 b.n 80411de <_svfiprintf_r+0x1d2> + 804103a: 2340 movs r3, #64 ; 0x40 + 804103c: 616b str r3, [r5, #20] + 804103e: 2300 movs r3, #0 + 8041040: 9309 str r3, [sp, #36] ; 0x24 + 8041042: 2320 movs r3, #32 + 8041044: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 8041048: f8cd 800c str.w r8, [sp, #12] + 804104c: 2330 movs r3, #48 ; 0x30 + 804104e: f8df 81a8 ldr.w r8, [pc, #424] ; 80411f8 <_svfiprintf_r+0x1ec> + 8041052: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 8041056: f04f 0901 mov.w r9, #1 + 804105a: 4623 mov r3, r4 + 804105c: 469a mov sl, r3 + 804105e: f813 2b01 ldrb.w r2, [r3], #1 + 8041062: b10a cbz r2, 8041068 <_svfiprintf_r+0x5c> + 8041064: 2a25 cmp r2, #37 ; 0x25 + 8041066: d1f9 bne.n 804105c <_svfiprintf_r+0x50> + 8041068: ebba 0b04 subs.w fp, sl, r4 + 804106c: d00b beq.n 8041086 <_svfiprintf_r+0x7a> + 804106e: 465b mov r3, fp + 8041070: 4622 mov r2, r4 + 8041072: 4629 mov r1, r5 + 8041074: 4638 mov r0, r7 + 8041076: f7ff ff6d bl 8040f54 <__ssputs_r> + 804107a: 3001 adds r0, #1 + 804107c: f000 80aa beq.w 80411d4 <_svfiprintf_r+0x1c8> + 8041080: 9a09 ldr r2, [sp, #36] ; 0x24 + 8041082: 445a add r2, fp + 8041084: 9209 str r2, [sp, #36] ; 0x24 + 8041086: f89a 3000 ldrb.w r3, [sl] + 804108a: 2b00 cmp r3, #0 + 804108c: f000 80a2 beq.w 80411d4 <_svfiprintf_r+0x1c8> + 8041090: 2300 movs r3, #0 + 8041092: f04f 32ff mov.w r2, #4294967295 + 8041096: e9cd 2305 strd r2, r3, [sp, #20] + 804109a: f10a 0a01 add.w sl, sl, #1 + 804109e: 9304 str r3, [sp, #16] + 80410a0: 9307 str r3, [sp, #28] + 80410a2: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 80410a6: 931a str r3, [sp, #104] ; 0x68 + 80410a8: 4654 mov r4, sl + 80410aa: 2205 movs r2, #5 + 80410ac: f814 1b01 ldrb.w r1, [r4], #1 + 80410b0: 4851 ldr r0, [pc, #324] ; (80411f8 <_svfiprintf_r+0x1ec>) + 80410b2: f7df f92d bl 8020310 + 80410b6: 9a04 ldr r2, [sp, #16] + 80410b8: b9d8 cbnz r0, 80410f2 <_svfiprintf_r+0xe6> + 80410ba: 06d0 lsls r0, r2, #27 + 80410bc: bf44 itt mi + 80410be: 2320 movmi r3, #32 + 80410c0: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 80410c4: 0711 lsls r1, r2, #28 + 80410c6: bf44 itt mi + 80410c8: 232b movmi r3, #43 ; 0x2b + 80410ca: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 80410ce: f89a 3000 ldrb.w r3, [sl] + 80410d2: 2b2a cmp r3, #42 ; 0x2a + 80410d4: d015 beq.n 8041102 <_svfiprintf_r+0xf6> + 80410d6: 9a07 ldr r2, [sp, #28] + 80410d8: 4654 mov r4, sl + 80410da: 2000 movs r0, #0 + 80410dc: f04f 0c0a mov.w ip, #10 + 80410e0: 4621 mov r1, r4 + 80410e2: f811 3b01 ldrb.w r3, [r1], #1 + 80410e6: 3b30 subs r3, #48 ; 0x30 + 80410e8: 2b09 cmp r3, #9 + 80410ea: d94e bls.n 804118a <_svfiprintf_r+0x17e> + 80410ec: b1b0 cbz r0, 804111c <_svfiprintf_r+0x110> + 80410ee: 9207 str r2, [sp, #28] + 80410f0: e014 b.n 804111c <_svfiprintf_r+0x110> + 80410f2: eba0 0308 sub.w r3, r0, r8 + 80410f6: fa09 f303 lsl.w r3, r9, r3 + 80410fa: 4313 orrs r3, r2 + 80410fc: 9304 str r3, [sp, #16] + 80410fe: 46a2 mov sl, r4 + 8041100: e7d2 b.n 80410a8 <_svfiprintf_r+0x9c> + 8041102: 9b03 ldr r3, [sp, #12] + 8041104: 1d19 adds r1, r3, #4 + 8041106: 681b ldr r3, [r3, #0] + 8041108: 9103 str r1, [sp, #12] + 804110a: 2b00 cmp r3, #0 + 804110c: bfbb ittet lt + 804110e: 425b neglt r3, r3 + 8041110: f042 0202 orrlt.w r2, r2, #2 + 8041114: 9307 strge r3, [sp, #28] + 8041116: 9307 strlt r3, [sp, #28] + 8041118: bfb8 it lt + 804111a: 9204 strlt r2, [sp, #16] + 804111c: 7823 ldrb r3, [r4, #0] + 804111e: 2b2e cmp r3, #46 ; 0x2e + 8041120: d10c bne.n 804113c <_svfiprintf_r+0x130> + 8041122: 7863 ldrb r3, [r4, #1] + 8041124: 2b2a cmp r3, #42 ; 0x2a + 8041126: d135 bne.n 8041194 <_svfiprintf_r+0x188> + 8041128: 9b03 ldr r3, [sp, #12] + 804112a: 1d1a adds r2, r3, #4 + 804112c: 681b ldr r3, [r3, #0] + 804112e: 9203 str r2, [sp, #12] + 8041130: 2b00 cmp r3, #0 + 8041132: bfb8 it lt + 8041134: f04f 33ff movlt.w r3, #4294967295 + 8041138: 3402 adds r4, #2 + 804113a: 9305 str r3, [sp, #20] + 804113c: f8df a0c8 ldr.w sl, [pc, #200] ; 8041208 <_svfiprintf_r+0x1fc> + 8041140: 7821 ldrb r1, [r4, #0] + 8041142: 2203 movs r2, #3 + 8041144: 4650 mov r0, sl + 8041146: f7df f8e3 bl 8020310 + 804114a: b140 cbz r0, 804115e <_svfiprintf_r+0x152> + 804114c: 2340 movs r3, #64 ; 0x40 + 804114e: eba0 000a sub.w r0, r0, sl + 8041152: fa03 f000 lsl.w r0, r3, r0 + 8041156: 9b04 ldr r3, [sp, #16] + 8041158: 4303 orrs r3, r0 + 804115a: 3401 adds r4, #1 + 804115c: 9304 str r3, [sp, #16] + 804115e: f814 1b01 ldrb.w r1, [r4], #1 + 8041162: 4826 ldr r0, [pc, #152] ; (80411fc <_svfiprintf_r+0x1f0>) + 8041164: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 8041168: 2206 movs r2, #6 + 804116a: f7df f8d1 bl 8020310 + 804116e: 2800 cmp r0, #0 + 8041170: d038 beq.n 80411e4 <_svfiprintf_r+0x1d8> + 8041172: 4b23 ldr r3, [pc, #140] ; (8041200 <_svfiprintf_r+0x1f4>) + 8041174: bb1b cbnz r3, 80411be <_svfiprintf_r+0x1b2> + 8041176: 9b03 ldr r3, [sp, #12] + 8041178: 3307 adds r3, #7 + 804117a: f023 0307 bic.w r3, r3, #7 + 804117e: 3308 adds r3, #8 + 8041180: 9303 str r3, [sp, #12] + 8041182: 9b09 ldr r3, [sp, #36] ; 0x24 + 8041184: 4433 add r3, r6 + 8041186: 9309 str r3, [sp, #36] ; 0x24 + 8041188: e767 b.n 804105a <_svfiprintf_r+0x4e> + 804118a: fb0c 3202 mla r2, ip, r2, r3 + 804118e: 460c mov r4, r1 + 8041190: 2001 movs r0, #1 + 8041192: e7a5 b.n 80410e0 <_svfiprintf_r+0xd4> + 8041194: 2300 movs r3, #0 + 8041196: 3401 adds r4, #1 + 8041198: 9305 str r3, [sp, #20] + 804119a: 4619 mov r1, r3 + 804119c: f04f 0c0a mov.w ip, #10 + 80411a0: 4620 mov r0, r4 + 80411a2: f810 2b01 ldrb.w r2, [r0], #1 + 80411a6: 3a30 subs r2, #48 ; 0x30 + 80411a8: 2a09 cmp r2, #9 + 80411aa: d903 bls.n 80411b4 <_svfiprintf_r+0x1a8> + 80411ac: 2b00 cmp r3, #0 + 80411ae: d0c5 beq.n 804113c <_svfiprintf_r+0x130> + 80411b0: 9105 str r1, [sp, #20] + 80411b2: e7c3 b.n 804113c <_svfiprintf_r+0x130> + 80411b4: fb0c 2101 mla r1, ip, r1, r2 + 80411b8: 4604 mov r4, r0 + 80411ba: 2301 movs r3, #1 + 80411bc: e7f0 b.n 80411a0 <_svfiprintf_r+0x194> + 80411be: ab03 add r3, sp, #12 + 80411c0: 9300 str r3, [sp, #0] + 80411c2: 462a mov r2, r5 + 80411c4: 4b0f ldr r3, [pc, #60] ; (8041204 <_svfiprintf_r+0x1f8>) + 80411c6: a904 add r1, sp, #16 + 80411c8: 4638 mov r0, r7 + 80411ca: f3af 8000 nop.w + 80411ce: 1c42 adds r2, r0, #1 + 80411d0: 4606 mov r6, r0 + 80411d2: d1d6 bne.n 8041182 <_svfiprintf_r+0x176> + 80411d4: 89ab ldrh r3, [r5, #12] + 80411d6: 065b lsls r3, r3, #25 + 80411d8: f53f af2c bmi.w 8041034 <_svfiprintf_r+0x28> + 80411dc: 9809 ldr r0, [sp, #36] ; 0x24 + 80411de: b01d add sp, #116 ; 0x74 + 80411e0: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80411e4: ab03 add r3, sp, #12 + 80411e6: 9300 str r3, [sp, #0] + 80411e8: 462a mov r2, r5 + 80411ea: 4b06 ldr r3, [pc, #24] ; (8041204 <_svfiprintf_r+0x1f8>) + 80411ec: a904 add r1, sp, #16 + 80411ee: 4638 mov r0, r7 + 80411f0: f000 f9d4 bl 804159c <_printf_i> + 80411f4: e7eb b.n 80411ce <_svfiprintf_r+0x1c2> + 80411f6: bf00 nop + 80411f8: 08044fa8 .word 0x08044fa8 + 80411fc: 08044fb2 .word 0x08044fb2 + 8041200: 00000000 .word 0x00000000 + 8041204: 08040f55 .word 0x08040f55 + 8041208: 08044fae .word 0x08044fae + +0804120c <__sfputc_r>: + 804120c: 6893 ldr r3, [r2, #8] + 804120e: 3b01 subs r3, #1 + 8041210: 2b00 cmp r3, #0 + 8041212: b410 push {r4} + 8041214: 6093 str r3, [r2, #8] + 8041216: da08 bge.n 804122a <__sfputc_r+0x1e> + 8041218: 6994 ldr r4, [r2, #24] + 804121a: 42a3 cmp r3, r4 + 804121c: db01 blt.n 8041222 <__sfputc_r+0x16> + 804121e: 290a cmp r1, #10 + 8041220: d103 bne.n 804122a <__sfputc_r+0x1e> + 8041222: f85d 4b04 ldr.w r4, [sp], #4 + 8041226: f000 bb23 b.w 8041870 <__swbuf_r> + 804122a: 6813 ldr r3, [r2, #0] + 804122c: 1c58 adds r0, r3, #1 + 804122e: 6010 str r0, [r2, #0] + 8041230: 7019 strb r1, [r3, #0] + 8041232: 4608 mov r0, r1 + 8041234: f85d 4b04 ldr.w r4, [sp], #4 + 8041238: 4770 bx lr + +0804123a <__sfputs_r>: + 804123a: b5f8 push {r3, r4, r5, r6, r7, lr} + 804123c: 4606 mov r6, r0 + 804123e: 460f mov r7, r1 + 8041240: 4614 mov r4, r2 + 8041242: 18d5 adds r5, r2, r3 + 8041244: 42ac cmp r4, r5 + 8041246: d101 bne.n 804124c <__sfputs_r+0x12> + 8041248: 2000 movs r0, #0 + 804124a: e007 b.n 804125c <__sfputs_r+0x22> + 804124c: f814 1b01 ldrb.w r1, [r4], #1 + 8041250: 463a mov r2, r7 + 8041252: 4630 mov r0, r6 + 8041254: f7ff ffda bl 804120c <__sfputc_r> + 8041258: 1c43 adds r3, r0, #1 + 804125a: d1f3 bne.n 8041244 <__sfputs_r+0xa> + 804125c: bdf8 pop {r3, r4, r5, r6, r7, pc} ... -080411dc <_vfiprintf_r>: - 80411dc: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 80411e0: 460d mov r5, r1 - 80411e2: b09d sub sp, #116 ; 0x74 - 80411e4: 4614 mov r4, r2 - 80411e6: 4698 mov r8, r3 - 80411e8: 4606 mov r6, r0 - 80411ea: b118 cbz r0, 80411f4 <_vfiprintf_r+0x18> - 80411ec: 6983 ldr r3, [r0, #24] - 80411ee: b90b cbnz r3, 80411f4 <_vfiprintf_r+0x18> - 80411f0: f7ff fdb0 bl 8040d54 <__sinit> - 80411f4: 4b89 ldr r3, [pc, #548] ; (804141c <_vfiprintf_r+0x240>) - 80411f6: 429d cmp r5, r3 - 80411f8: d11b bne.n 8041232 <_vfiprintf_r+0x56> - 80411fa: 6875 ldr r5, [r6, #4] - 80411fc: 6e6b ldr r3, [r5, #100] ; 0x64 - 80411fe: 07d9 lsls r1, r3, #31 - 8041200: d405 bmi.n 804120e <_vfiprintf_r+0x32> - 8041202: 89ab ldrh r3, [r5, #12] - 8041204: 059a lsls r2, r3, #22 - 8041206: d402 bmi.n 804120e <_vfiprintf_r+0x32> - 8041208: 6da8 ldr r0, [r5, #88] ; 0x58 - 804120a: f7ff fe53 bl 8040eb4 <__retarget_lock_acquire_recursive> - 804120e: 89ab ldrh r3, [r5, #12] - 8041210: 071b lsls r3, r3, #28 - 8041212: d501 bpl.n 8041218 <_vfiprintf_r+0x3c> - 8041214: 692b ldr r3, [r5, #16] - 8041216: b9eb cbnz r3, 8041254 <_vfiprintf_r+0x78> - 8041218: 4629 mov r1, r5 - 804121a: 4630 mov r0, r6 - 804121c: f000 fb4a bl 80418b4 <__swsetup_r> - 8041220: b1c0 cbz r0, 8041254 <_vfiprintf_r+0x78> - 8041222: 6e6b ldr r3, [r5, #100] ; 0x64 - 8041224: 07dc lsls r4, r3, #31 - 8041226: d50e bpl.n 8041246 <_vfiprintf_r+0x6a> - 8041228: f04f 30ff mov.w r0, #4294967295 - 804122c: b01d add sp, #116 ; 0x74 - 804122e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} - 8041232: 4b7b ldr r3, [pc, #492] ; (8041420 <_vfiprintf_r+0x244>) - 8041234: 429d cmp r5, r3 - 8041236: d101 bne.n 804123c <_vfiprintf_r+0x60> - 8041238: 68b5 ldr r5, [r6, #8] - 804123a: e7df b.n 80411fc <_vfiprintf_r+0x20> - 804123c: 4b79 ldr r3, [pc, #484] ; (8041424 <_vfiprintf_r+0x248>) - 804123e: 429d cmp r5, r3 - 8041240: bf08 it eq - 8041242: 68f5 ldreq r5, [r6, #12] - 8041244: e7da b.n 80411fc <_vfiprintf_r+0x20> - 8041246: 89ab ldrh r3, [r5, #12] - 8041248: 0598 lsls r0, r3, #22 - 804124a: d4ed bmi.n 8041228 <_vfiprintf_r+0x4c> - 804124c: 6da8 ldr r0, [r5, #88] ; 0x58 - 804124e: f7ff fe32 bl 8040eb6 <__retarget_lock_release_recursive> - 8041252: e7e9 b.n 8041228 <_vfiprintf_r+0x4c> - 8041254: 2300 movs r3, #0 - 8041256: 9309 str r3, [sp, #36] ; 0x24 - 8041258: 2320 movs r3, #32 - 804125a: f88d 3029 strb.w r3, [sp, #41] ; 0x29 - 804125e: f8cd 800c str.w r8, [sp, #12] - 8041262: 2330 movs r3, #48 ; 0x30 - 8041264: f8df 81c0 ldr.w r8, [pc, #448] ; 8041428 <_vfiprintf_r+0x24c> - 8041268: f88d 302a strb.w r3, [sp, #42] ; 0x2a - 804126c: f04f 0901 mov.w r9, #1 - 8041270: 4623 mov r3, r4 - 8041272: 469a mov sl, r3 - 8041274: f813 2b01 ldrb.w r2, [r3], #1 - 8041278: b10a cbz r2, 804127e <_vfiprintf_r+0xa2> - 804127a: 2a25 cmp r2, #37 ; 0x25 - 804127c: d1f9 bne.n 8041272 <_vfiprintf_r+0x96> - 804127e: ebba 0b04 subs.w fp, sl, r4 - 8041282: d00b beq.n 804129c <_vfiprintf_r+0xc0> - 8041284: 465b mov r3, fp - 8041286: 4622 mov r2, r4 - 8041288: 4629 mov r1, r5 - 804128a: 4630 mov r0, r6 - 804128c: f7ff ff93 bl 80411b6 <__sfputs_r> - 8041290: 3001 adds r0, #1 - 8041292: f000 80aa beq.w 80413ea <_vfiprintf_r+0x20e> - 8041296: 9a09 ldr r2, [sp, #36] ; 0x24 - 8041298: 445a add r2, fp - 804129a: 9209 str r2, [sp, #36] ; 0x24 - 804129c: f89a 3000 ldrb.w r3, [sl] - 80412a0: 2b00 cmp r3, #0 - 80412a2: f000 80a2 beq.w 80413ea <_vfiprintf_r+0x20e> - 80412a6: 2300 movs r3, #0 - 80412a8: f04f 32ff mov.w r2, #4294967295 - 80412ac: e9cd 2305 strd r2, r3, [sp, #20] - 80412b0: f10a 0a01 add.w sl, sl, #1 - 80412b4: 9304 str r3, [sp, #16] - 80412b6: 9307 str r3, [sp, #28] - 80412b8: f88d 3053 strb.w r3, [sp, #83] ; 0x53 - 80412bc: 931a str r3, [sp, #104] ; 0x68 - 80412be: 4654 mov r4, sl - 80412c0: 2205 movs r2, #5 - 80412c2: f814 1b01 ldrb.w r1, [r4], #1 - 80412c6: 4858 ldr r0, [pc, #352] ; (8041428 <_vfiprintf_r+0x24c>) - 80412c8: f7df f822 bl 8020310 - 80412cc: 9a04 ldr r2, [sp, #16] - 80412ce: b9d8 cbnz r0, 8041308 <_vfiprintf_r+0x12c> - 80412d0: 06d1 lsls r1, r2, #27 - 80412d2: bf44 itt mi - 80412d4: 2320 movmi r3, #32 - 80412d6: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 - 80412da: 0713 lsls r3, r2, #28 - 80412dc: bf44 itt mi - 80412de: 232b movmi r3, #43 ; 0x2b - 80412e0: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 - 80412e4: f89a 3000 ldrb.w r3, [sl] - 80412e8: 2b2a cmp r3, #42 ; 0x2a - 80412ea: d015 beq.n 8041318 <_vfiprintf_r+0x13c> - 80412ec: 9a07 ldr r2, [sp, #28] - 80412ee: 4654 mov r4, sl - 80412f0: 2000 movs r0, #0 - 80412f2: f04f 0c0a mov.w ip, #10 - 80412f6: 4621 mov r1, r4 - 80412f8: f811 3b01 ldrb.w r3, [r1], #1 - 80412fc: 3b30 subs r3, #48 ; 0x30 - 80412fe: 2b09 cmp r3, #9 - 8041300: d94e bls.n 80413a0 <_vfiprintf_r+0x1c4> - 8041302: b1b0 cbz r0, 8041332 <_vfiprintf_r+0x156> - 8041304: 9207 str r2, [sp, #28] - 8041306: e014 b.n 8041332 <_vfiprintf_r+0x156> - 8041308: eba0 0308 sub.w r3, r0, r8 - 804130c: fa09 f303 lsl.w r3, r9, r3 - 8041310: 4313 orrs r3, r2 - 8041312: 9304 str r3, [sp, #16] - 8041314: 46a2 mov sl, r4 - 8041316: e7d2 b.n 80412be <_vfiprintf_r+0xe2> - 8041318: 9b03 ldr r3, [sp, #12] - 804131a: 1d19 adds r1, r3, #4 - 804131c: 681b ldr r3, [r3, #0] - 804131e: 9103 str r1, [sp, #12] - 8041320: 2b00 cmp r3, #0 - 8041322: bfbb ittet lt - 8041324: 425b neglt r3, r3 - 8041326: f042 0202 orrlt.w r2, r2, #2 - 804132a: 9307 strge r3, [sp, #28] - 804132c: 9307 strlt r3, [sp, #28] - 804132e: bfb8 it lt - 8041330: 9204 strlt r2, [sp, #16] - 8041332: 7823 ldrb r3, [r4, #0] - 8041334: 2b2e cmp r3, #46 ; 0x2e - 8041336: d10c bne.n 8041352 <_vfiprintf_r+0x176> - 8041338: 7863 ldrb r3, [r4, #1] - 804133a: 2b2a cmp r3, #42 ; 0x2a - 804133c: d135 bne.n 80413aa <_vfiprintf_r+0x1ce> - 804133e: 9b03 ldr r3, [sp, #12] - 8041340: 1d1a adds r2, r3, #4 - 8041342: 681b ldr r3, [r3, #0] - 8041344: 9203 str r2, [sp, #12] - 8041346: 2b00 cmp r3, #0 - 8041348: bfb8 it lt - 804134a: f04f 33ff movlt.w r3, #4294967295 - 804134e: 3402 adds r4, #2 - 8041350: 9305 str r3, [sp, #20] - 8041352: f8df a0e4 ldr.w sl, [pc, #228] ; 8041438 <_vfiprintf_r+0x25c> - 8041356: 7821 ldrb r1, [r4, #0] - 8041358: 2203 movs r2, #3 - 804135a: 4650 mov r0, sl - 804135c: f7de ffd8 bl 8020310 - 8041360: b140 cbz r0, 8041374 <_vfiprintf_r+0x198> - 8041362: 2340 movs r3, #64 ; 0x40 - 8041364: eba0 000a sub.w r0, r0, sl - 8041368: fa03 f000 lsl.w r0, r3, r0 - 804136c: 9b04 ldr r3, [sp, #16] - 804136e: 4303 orrs r3, r0 - 8041370: 3401 adds r4, #1 - 8041372: 9304 str r3, [sp, #16] - 8041374: f814 1b01 ldrb.w r1, [r4], #1 - 8041378: 482c ldr r0, [pc, #176] ; (804142c <_vfiprintf_r+0x250>) - 804137a: f88d 1028 strb.w r1, [sp, #40] ; 0x28 - 804137e: 2206 movs r2, #6 - 8041380: f7de ffc6 bl 8020310 - 8041384: 2800 cmp r0, #0 - 8041386: d03f beq.n 8041408 <_vfiprintf_r+0x22c> - 8041388: 4b29 ldr r3, [pc, #164] ; (8041430 <_vfiprintf_r+0x254>) - 804138a: bb1b cbnz r3, 80413d4 <_vfiprintf_r+0x1f8> - 804138c: 9b03 ldr r3, [sp, #12] - 804138e: 3307 adds r3, #7 - 8041390: f023 0307 bic.w r3, r3, #7 - 8041394: 3308 adds r3, #8 - 8041396: 9303 str r3, [sp, #12] - 8041398: 9b09 ldr r3, [sp, #36] ; 0x24 - 804139a: 443b add r3, r7 - 804139c: 9309 str r3, [sp, #36] ; 0x24 - 804139e: e767 b.n 8041270 <_vfiprintf_r+0x94> - 80413a0: fb0c 3202 mla r2, ip, r2, r3 - 80413a4: 460c mov r4, r1 - 80413a6: 2001 movs r0, #1 - 80413a8: e7a5 b.n 80412f6 <_vfiprintf_r+0x11a> - 80413aa: 2300 movs r3, #0 - 80413ac: 3401 adds r4, #1 - 80413ae: 9305 str r3, [sp, #20] - 80413b0: 4619 mov r1, r3 - 80413b2: f04f 0c0a mov.w ip, #10 - 80413b6: 4620 mov r0, r4 - 80413b8: f810 2b01 ldrb.w r2, [r0], #1 - 80413bc: 3a30 subs r2, #48 ; 0x30 - 80413be: 2a09 cmp r2, #9 - 80413c0: d903 bls.n 80413ca <_vfiprintf_r+0x1ee> - 80413c2: 2b00 cmp r3, #0 - 80413c4: d0c5 beq.n 8041352 <_vfiprintf_r+0x176> - 80413c6: 9105 str r1, [sp, #20] - 80413c8: e7c3 b.n 8041352 <_vfiprintf_r+0x176> - 80413ca: fb0c 2101 mla r1, ip, r1, r2 - 80413ce: 4604 mov r4, r0 - 80413d0: 2301 movs r3, #1 - 80413d2: e7f0 b.n 80413b6 <_vfiprintf_r+0x1da> - 80413d4: ab03 add r3, sp, #12 - 80413d6: 9300 str r3, [sp, #0] - 80413d8: 462a mov r2, r5 - 80413da: 4b16 ldr r3, [pc, #88] ; (8041434 <_vfiprintf_r+0x258>) - 80413dc: a904 add r1, sp, #16 - 80413de: 4630 mov r0, r6 - 80413e0: f3af 8000 nop.w - 80413e4: 4607 mov r7, r0 - 80413e6: 1c78 adds r0, r7, #1 - 80413e8: d1d6 bne.n 8041398 <_vfiprintf_r+0x1bc> - 80413ea: 6e6b ldr r3, [r5, #100] ; 0x64 - 80413ec: 07d9 lsls r1, r3, #31 - 80413ee: d405 bmi.n 80413fc <_vfiprintf_r+0x220> - 80413f0: 89ab ldrh r3, [r5, #12] - 80413f2: 059a lsls r2, r3, #22 - 80413f4: d402 bmi.n 80413fc <_vfiprintf_r+0x220> - 80413f6: 6da8 ldr r0, [r5, #88] ; 0x58 - 80413f8: f7ff fd5d bl 8040eb6 <__retarget_lock_release_recursive> - 80413fc: 89ab ldrh r3, [r5, #12] - 80413fe: 065b lsls r3, r3, #25 - 8041400: f53f af12 bmi.w 8041228 <_vfiprintf_r+0x4c> - 8041404: 9809 ldr r0, [sp, #36] ; 0x24 - 8041406: e711 b.n 804122c <_vfiprintf_r+0x50> - 8041408: ab03 add r3, sp, #12 - 804140a: 9300 str r3, [sp, #0] - 804140c: 462a mov r2, r5 - 804140e: 4b09 ldr r3, [pc, #36] ; (8041434 <_vfiprintf_r+0x258>) - 8041410: a904 add r1, sp, #16 - 8041412: 4630 mov r0, r6 - 8041414: f000 f880 bl 8041518 <_printf_i> - 8041418: e7e4 b.n 80413e4 <_vfiprintf_r+0x208> - 804141a: bf00 nop - 804141c: 08044ee8 .word 0x08044ee8 - 8041420: 08044f08 .word 0x08044f08 - 8041424: 08044ec8 .word 0x08044ec8 - 8041428: 08044f28 .word 0x08044f28 - 804142c: 08044f32 .word 0x08044f32 - 8041430: 00000000 .word 0x00000000 - 8041434: 080411b7 .word 0x080411b7 - 8041438: 08044f2e .word 0x08044f2e - -0804143c <_printf_common>: - 804143c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} - 8041440: 4616 mov r6, r2 - 8041442: 4699 mov r9, r3 - 8041444: 688a ldr r2, [r1, #8] - 8041446: 690b ldr r3, [r1, #16] - 8041448: f8dd 8020 ldr.w r8, [sp, #32] - 804144c: 4293 cmp r3, r2 - 804144e: bfb8 it lt - 8041450: 4613 movlt r3, r2 - 8041452: 6033 str r3, [r6, #0] - 8041454: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 - 8041458: 4607 mov r7, r0 - 804145a: 460c mov r4, r1 - 804145c: b10a cbz r2, 8041462 <_printf_common+0x26> - 804145e: 3301 adds r3, #1 - 8041460: 6033 str r3, [r6, #0] - 8041462: 6823 ldr r3, [r4, #0] - 8041464: 0699 lsls r1, r3, #26 - 8041466: bf42 ittt mi - 8041468: 6833 ldrmi r3, [r6, #0] - 804146a: 3302 addmi r3, #2 - 804146c: 6033 strmi r3, [r6, #0] - 804146e: 6825 ldr r5, [r4, #0] - 8041470: f015 0506 ands.w r5, r5, #6 - 8041474: d106 bne.n 8041484 <_printf_common+0x48> - 8041476: f104 0a19 add.w sl, r4, #25 - 804147a: 68e3 ldr r3, [r4, #12] - 804147c: 6832 ldr r2, [r6, #0] - 804147e: 1a9b subs r3, r3, r2 - 8041480: 42ab cmp r3, r5 - 8041482: dc26 bgt.n 80414d2 <_printf_common+0x96> - 8041484: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 - 8041488: 1e13 subs r3, r2, #0 - 804148a: 6822 ldr r2, [r4, #0] - 804148c: bf18 it ne - 804148e: 2301 movne r3, #1 - 8041490: 0692 lsls r2, r2, #26 - 8041492: d42b bmi.n 80414ec <_printf_common+0xb0> - 8041494: f104 0243 add.w r2, r4, #67 ; 0x43 - 8041498: 4649 mov r1, r9 - 804149a: 4638 mov r0, r7 - 804149c: 47c0 blx r8 - 804149e: 3001 adds r0, #1 - 80414a0: d01e beq.n 80414e0 <_printf_common+0xa4> - 80414a2: 6823 ldr r3, [r4, #0] - 80414a4: 68e5 ldr r5, [r4, #12] - 80414a6: 6832 ldr r2, [r6, #0] - 80414a8: f003 0306 and.w r3, r3, #6 - 80414ac: 2b04 cmp r3, #4 - 80414ae: bf08 it eq - 80414b0: 1aad subeq r5, r5, r2 - 80414b2: 68a3 ldr r3, [r4, #8] - 80414b4: 6922 ldr r2, [r4, #16] - 80414b6: bf0c ite eq - 80414b8: ea25 75e5 biceq.w r5, r5, r5, asr #31 - 80414bc: 2500 movne r5, #0 - 80414be: 4293 cmp r3, r2 - 80414c0: bfc4 itt gt - 80414c2: 1a9b subgt r3, r3, r2 - 80414c4: 18ed addgt r5, r5, r3 - 80414c6: 2600 movs r6, #0 - 80414c8: 341a adds r4, #26 - 80414ca: 42b5 cmp r5, r6 - 80414cc: d11a bne.n 8041504 <_printf_common+0xc8> - 80414ce: 2000 movs r0, #0 - 80414d0: e008 b.n 80414e4 <_printf_common+0xa8> - 80414d2: 2301 movs r3, #1 - 80414d4: 4652 mov r2, sl - 80414d6: 4649 mov r1, r9 - 80414d8: 4638 mov r0, r7 - 80414da: 47c0 blx r8 - 80414dc: 3001 adds r0, #1 - 80414de: d103 bne.n 80414e8 <_printf_common+0xac> - 80414e0: f04f 30ff mov.w r0, #4294967295 - 80414e4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 80414e8: 3501 adds r5, #1 - 80414ea: e7c6 b.n 804147a <_printf_common+0x3e> - 80414ec: 18e1 adds r1, r4, r3 - 80414ee: 1c5a adds r2, r3, #1 - 80414f0: 2030 movs r0, #48 ; 0x30 - 80414f2: f881 0043 strb.w r0, [r1, #67] ; 0x43 - 80414f6: 4422 add r2, r4 - 80414f8: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 - 80414fc: f882 1043 strb.w r1, [r2, #67] ; 0x43 - 8041500: 3302 adds r3, #2 - 8041502: e7c7 b.n 8041494 <_printf_common+0x58> - 8041504: 2301 movs r3, #1 - 8041506: 4622 mov r2, r4 - 8041508: 4649 mov r1, r9 - 804150a: 4638 mov r0, r7 - 804150c: 47c0 blx r8 - 804150e: 3001 adds r0, #1 - 8041510: d0e6 beq.n 80414e0 <_printf_common+0xa4> - 8041512: 3601 adds r6, #1 - 8041514: e7d9 b.n 80414ca <_printf_common+0x8e> +08041260 <_vfiprintf_r>: + 8041260: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 8041264: 460d mov r5, r1 + 8041266: b09d sub sp, #116 ; 0x74 + 8041268: 4614 mov r4, r2 + 804126a: 4698 mov r8, r3 + 804126c: 4606 mov r6, r0 + 804126e: b118 cbz r0, 8041278 <_vfiprintf_r+0x18> + 8041270: 6983 ldr r3, [r0, #24] + 8041272: b90b cbnz r3, 8041278 <_vfiprintf_r+0x18> + 8041274: f7ff fdb0 bl 8040dd8 <__sinit> + 8041278: 4b89 ldr r3, [pc, #548] ; (80414a0 <_vfiprintf_r+0x240>) + 804127a: 429d cmp r5, r3 + 804127c: d11b bne.n 80412b6 <_vfiprintf_r+0x56> + 804127e: 6875 ldr r5, [r6, #4] + 8041280: 6e6b ldr r3, [r5, #100] ; 0x64 + 8041282: 07d9 lsls r1, r3, #31 + 8041284: d405 bmi.n 8041292 <_vfiprintf_r+0x32> + 8041286: 89ab ldrh r3, [r5, #12] + 8041288: 059a lsls r2, r3, #22 + 804128a: d402 bmi.n 8041292 <_vfiprintf_r+0x32> + 804128c: 6da8 ldr r0, [r5, #88] ; 0x58 + 804128e: f7ff fe53 bl 8040f38 <__retarget_lock_acquire_recursive> + 8041292: 89ab ldrh r3, [r5, #12] + 8041294: 071b lsls r3, r3, #28 + 8041296: d501 bpl.n 804129c <_vfiprintf_r+0x3c> + 8041298: 692b ldr r3, [r5, #16] + 804129a: b9eb cbnz r3, 80412d8 <_vfiprintf_r+0x78> + 804129c: 4629 mov r1, r5 + 804129e: 4630 mov r0, r6 + 80412a0: f000 fb4a bl 8041938 <__swsetup_r> + 80412a4: b1c0 cbz r0, 80412d8 <_vfiprintf_r+0x78> + 80412a6: 6e6b ldr r3, [r5, #100] ; 0x64 + 80412a8: 07dc lsls r4, r3, #31 + 80412aa: d50e bpl.n 80412ca <_vfiprintf_r+0x6a> + 80412ac: f04f 30ff mov.w r0, #4294967295 + 80412b0: b01d add sp, #116 ; 0x74 + 80412b2: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} + 80412b6: 4b7b ldr r3, [pc, #492] ; (80414a4 <_vfiprintf_r+0x244>) + 80412b8: 429d cmp r5, r3 + 80412ba: d101 bne.n 80412c0 <_vfiprintf_r+0x60> + 80412bc: 68b5 ldr r5, [r6, #8] + 80412be: e7df b.n 8041280 <_vfiprintf_r+0x20> + 80412c0: 4b79 ldr r3, [pc, #484] ; (80414a8 <_vfiprintf_r+0x248>) + 80412c2: 429d cmp r5, r3 + 80412c4: bf08 it eq + 80412c6: 68f5 ldreq r5, [r6, #12] + 80412c8: e7da b.n 8041280 <_vfiprintf_r+0x20> + 80412ca: 89ab ldrh r3, [r5, #12] + 80412cc: 0598 lsls r0, r3, #22 + 80412ce: d4ed bmi.n 80412ac <_vfiprintf_r+0x4c> + 80412d0: 6da8 ldr r0, [r5, #88] ; 0x58 + 80412d2: f7ff fe32 bl 8040f3a <__retarget_lock_release_recursive> + 80412d6: e7e9 b.n 80412ac <_vfiprintf_r+0x4c> + 80412d8: 2300 movs r3, #0 + 80412da: 9309 str r3, [sp, #36] ; 0x24 + 80412dc: 2320 movs r3, #32 + 80412de: f88d 3029 strb.w r3, [sp, #41] ; 0x29 + 80412e2: f8cd 800c str.w r8, [sp, #12] + 80412e6: 2330 movs r3, #48 ; 0x30 + 80412e8: f8df 81c0 ldr.w r8, [pc, #448] ; 80414ac <_vfiprintf_r+0x24c> + 80412ec: f88d 302a strb.w r3, [sp, #42] ; 0x2a + 80412f0: f04f 0901 mov.w r9, #1 + 80412f4: 4623 mov r3, r4 + 80412f6: 469a mov sl, r3 + 80412f8: f813 2b01 ldrb.w r2, [r3], #1 + 80412fc: b10a cbz r2, 8041302 <_vfiprintf_r+0xa2> + 80412fe: 2a25 cmp r2, #37 ; 0x25 + 8041300: d1f9 bne.n 80412f6 <_vfiprintf_r+0x96> + 8041302: ebba 0b04 subs.w fp, sl, r4 + 8041306: d00b beq.n 8041320 <_vfiprintf_r+0xc0> + 8041308: 465b mov r3, fp + 804130a: 4622 mov r2, r4 + 804130c: 4629 mov r1, r5 + 804130e: 4630 mov r0, r6 + 8041310: f7ff ff93 bl 804123a <__sfputs_r> + 8041314: 3001 adds r0, #1 + 8041316: f000 80aa beq.w 804146e <_vfiprintf_r+0x20e> + 804131a: 9a09 ldr r2, [sp, #36] ; 0x24 + 804131c: 445a add r2, fp + 804131e: 9209 str r2, [sp, #36] ; 0x24 + 8041320: f89a 3000 ldrb.w r3, [sl] + 8041324: 2b00 cmp r3, #0 + 8041326: f000 80a2 beq.w 804146e <_vfiprintf_r+0x20e> + 804132a: 2300 movs r3, #0 + 804132c: f04f 32ff mov.w r2, #4294967295 + 8041330: e9cd 2305 strd r2, r3, [sp, #20] + 8041334: f10a 0a01 add.w sl, sl, #1 + 8041338: 9304 str r3, [sp, #16] + 804133a: 9307 str r3, [sp, #28] + 804133c: f88d 3053 strb.w r3, [sp, #83] ; 0x53 + 8041340: 931a str r3, [sp, #104] ; 0x68 + 8041342: 4654 mov r4, sl + 8041344: 2205 movs r2, #5 + 8041346: f814 1b01 ldrb.w r1, [r4], #1 + 804134a: 4858 ldr r0, [pc, #352] ; (80414ac <_vfiprintf_r+0x24c>) + 804134c: f7de ffe0 bl 8020310 + 8041350: 9a04 ldr r2, [sp, #16] + 8041352: b9d8 cbnz r0, 804138c <_vfiprintf_r+0x12c> + 8041354: 06d1 lsls r1, r2, #27 + 8041356: bf44 itt mi + 8041358: 2320 movmi r3, #32 + 804135a: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 804135e: 0713 lsls r3, r2, #28 + 8041360: bf44 itt mi + 8041362: 232b movmi r3, #43 ; 0x2b + 8041364: f88d 3053 strbmi.w r3, [sp, #83] ; 0x53 + 8041368: f89a 3000 ldrb.w r3, [sl] + 804136c: 2b2a cmp r3, #42 ; 0x2a + 804136e: d015 beq.n 804139c <_vfiprintf_r+0x13c> + 8041370: 9a07 ldr r2, [sp, #28] + 8041372: 4654 mov r4, sl + 8041374: 2000 movs r0, #0 + 8041376: f04f 0c0a mov.w ip, #10 + 804137a: 4621 mov r1, r4 + 804137c: f811 3b01 ldrb.w r3, [r1], #1 + 8041380: 3b30 subs r3, #48 ; 0x30 + 8041382: 2b09 cmp r3, #9 + 8041384: d94e bls.n 8041424 <_vfiprintf_r+0x1c4> + 8041386: b1b0 cbz r0, 80413b6 <_vfiprintf_r+0x156> + 8041388: 9207 str r2, [sp, #28] + 804138a: e014 b.n 80413b6 <_vfiprintf_r+0x156> + 804138c: eba0 0308 sub.w r3, r0, r8 + 8041390: fa09 f303 lsl.w r3, r9, r3 + 8041394: 4313 orrs r3, r2 + 8041396: 9304 str r3, [sp, #16] + 8041398: 46a2 mov sl, r4 + 804139a: e7d2 b.n 8041342 <_vfiprintf_r+0xe2> + 804139c: 9b03 ldr r3, [sp, #12] + 804139e: 1d19 adds r1, r3, #4 + 80413a0: 681b ldr r3, [r3, #0] + 80413a2: 9103 str r1, [sp, #12] + 80413a4: 2b00 cmp r3, #0 + 80413a6: bfbb ittet lt + 80413a8: 425b neglt r3, r3 + 80413aa: f042 0202 orrlt.w r2, r2, #2 + 80413ae: 9307 strge r3, [sp, #28] + 80413b0: 9307 strlt r3, [sp, #28] + 80413b2: bfb8 it lt + 80413b4: 9204 strlt r2, [sp, #16] + 80413b6: 7823 ldrb r3, [r4, #0] + 80413b8: 2b2e cmp r3, #46 ; 0x2e + 80413ba: d10c bne.n 80413d6 <_vfiprintf_r+0x176> + 80413bc: 7863 ldrb r3, [r4, #1] + 80413be: 2b2a cmp r3, #42 ; 0x2a + 80413c0: d135 bne.n 804142e <_vfiprintf_r+0x1ce> + 80413c2: 9b03 ldr r3, [sp, #12] + 80413c4: 1d1a adds r2, r3, #4 + 80413c6: 681b ldr r3, [r3, #0] + 80413c8: 9203 str r2, [sp, #12] + 80413ca: 2b00 cmp r3, #0 + 80413cc: bfb8 it lt + 80413ce: f04f 33ff movlt.w r3, #4294967295 + 80413d2: 3402 adds r4, #2 + 80413d4: 9305 str r3, [sp, #20] + 80413d6: f8df a0e4 ldr.w sl, [pc, #228] ; 80414bc <_vfiprintf_r+0x25c> + 80413da: 7821 ldrb r1, [r4, #0] + 80413dc: 2203 movs r2, #3 + 80413de: 4650 mov r0, sl + 80413e0: f7de ff96 bl 8020310 + 80413e4: b140 cbz r0, 80413f8 <_vfiprintf_r+0x198> + 80413e6: 2340 movs r3, #64 ; 0x40 + 80413e8: eba0 000a sub.w r0, r0, sl + 80413ec: fa03 f000 lsl.w r0, r3, r0 + 80413f0: 9b04 ldr r3, [sp, #16] + 80413f2: 4303 orrs r3, r0 + 80413f4: 3401 adds r4, #1 + 80413f6: 9304 str r3, [sp, #16] + 80413f8: f814 1b01 ldrb.w r1, [r4], #1 + 80413fc: 482c ldr r0, [pc, #176] ; (80414b0 <_vfiprintf_r+0x250>) + 80413fe: f88d 1028 strb.w r1, [sp, #40] ; 0x28 + 8041402: 2206 movs r2, #6 + 8041404: f7de ff84 bl 8020310 + 8041408: 2800 cmp r0, #0 + 804140a: d03f beq.n 804148c <_vfiprintf_r+0x22c> + 804140c: 4b29 ldr r3, [pc, #164] ; (80414b4 <_vfiprintf_r+0x254>) + 804140e: bb1b cbnz r3, 8041458 <_vfiprintf_r+0x1f8> + 8041410: 9b03 ldr r3, [sp, #12] + 8041412: 3307 adds r3, #7 + 8041414: f023 0307 bic.w r3, r3, #7 + 8041418: 3308 adds r3, #8 + 804141a: 9303 str r3, [sp, #12] + 804141c: 9b09 ldr r3, [sp, #36] ; 0x24 + 804141e: 443b add r3, r7 + 8041420: 9309 str r3, [sp, #36] ; 0x24 + 8041422: e767 b.n 80412f4 <_vfiprintf_r+0x94> + 8041424: fb0c 3202 mla r2, ip, r2, r3 + 8041428: 460c mov r4, r1 + 804142a: 2001 movs r0, #1 + 804142c: e7a5 b.n 804137a <_vfiprintf_r+0x11a> + 804142e: 2300 movs r3, #0 + 8041430: 3401 adds r4, #1 + 8041432: 9305 str r3, [sp, #20] + 8041434: 4619 mov r1, r3 + 8041436: f04f 0c0a mov.w ip, #10 + 804143a: 4620 mov r0, r4 + 804143c: f810 2b01 ldrb.w r2, [r0], #1 + 8041440: 3a30 subs r2, #48 ; 0x30 + 8041442: 2a09 cmp r2, #9 + 8041444: d903 bls.n 804144e <_vfiprintf_r+0x1ee> + 8041446: 2b00 cmp r3, #0 + 8041448: d0c5 beq.n 80413d6 <_vfiprintf_r+0x176> + 804144a: 9105 str r1, [sp, #20] + 804144c: e7c3 b.n 80413d6 <_vfiprintf_r+0x176> + 804144e: fb0c 2101 mla r1, ip, r1, r2 + 8041452: 4604 mov r4, r0 + 8041454: 2301 movs r3, #1 + 8041456: e7f0 b.n 804143a <_vfiprintf_r+0x1da> + 8041458: ab03 add r3, sp, #12 + 804145a: 9300 str r3, [sp, #0] + 804145c: 462a mov r2, r5 + 804145e: 4b16 ldr r3, [pc, #88] ; (80414b8 <_vfiprintf_r+0x258>) + 8041460: a904 add r1, sp, #16 + 8041462: 4630 mov r0, r6 + 8041464: f3af 8000 nop.w + 8041468: 4607 mov r7, r0 + 804146a: 1c78 adds r0, r7, #1 + 804146c: d1d6 bne.n 804141c <_vfiprintf_r+0x1bc> + 804146e: 6e6b ldr r3, [r5, #100] ; 0x64 + 8041470: 07d9 lsls r1, r3, #31 + 8041472: d405 bmi.n 8041480 <_vfiprintf_r+0x220> + 8041474: 89ab ldrh r3, [r5, #12] + 8041476: 059a lsls r2, r3, #22 + 8041478: d402 bmi.n 8041480 <_vfiprintf_r+0x220> + 804147a: 6da8 ldr r0, [r5, #88] ; 0x58 + 804147c: f7ff fd5d bl 8040f3a <__retarget_lock_release_recursive> + 8041480: 89ab ldrh r3, [r5, #12] + 8041482: 065b lsls r3, r3, #25 + 8041484: f53f af12 bmi.w 80412ac <_vfiprintf_r+0x4c> + 8041488: 9809 ldr r0, [sp, #36] ; 0x24 + 804148a: e711 b.n 80412b0 <_vfiprintf_r+0x50> + 804148c: ab03 add r3, sp, #12 + 804148e: 9300 str r3, [sp, #0] + 8041490: 462a mov r2, r5 + 8041492: 4b09 ldr r3, [pc, #36] ; (80414b8 <_vfiprintf_r+0x258>) + 8041494: a904 add r1, sp, #16 + 8041496: 4630 mov r0, r6 + 8041498: f000 f880 bl 804159c <_printf_i> + 804149c: e7e4 b.n 8041468 <_vfiprintf_r+0x208> + 804149e: bf00 nop + 80414a0: 08044f68 .word 0x08044f68 + 80414a4: 08044f88 .word 0x08044f88 + 80414a8: 08044f48 .word 0x08044f48 + 80414ac: 08044fa8 .word 0x08044fa8 + 80414b0: 08044fb2 .word 0x08044fb2 + 80414b4: 00000000 .word 0x00000000 + 80414b8: 0804123b .word 0x0804123b + 80414bc: 08044fae .word 0x08044fae + +080414c0 <_printf_common>: + 80414c0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 80414c4: 4616 mov r6, r2 + 80414c6: 4699 mov r9, r3 + 80414c8: 688a ldr r2, [r1, #8] + 80414ca: 690b ldr r3, [r1, #16] + 80414cc: f8dd 8020 ldr.w r8, [sp, #32] + 80414d0: 4293 cmp r3, r2 + 80414d2: bfb8 it lt + 80414d4: 4613 movlt r3, r2 + 80414d6: 6033 str r3, [r6, #0] + 80414d8: f891 2043 ldrb.w r2, [r1, #67] ; 0x43 + 80414dc: 4607 mov r7, r0 + 80414de: 460c mov r4, r1 + 80414e0: b10a cbz r2, 80414e6 <_printf_common+0x26> + 80414e2: 3301 adds r3, #1 + 80414e4: 6033 str r3, [r6, #0] + 80414e6: 6823 ldr r3, [r4, #0] + 80414e8: 0699 lsls r1, r3, #26 + 80414ea: bf42 ittt mi + 80414ec: 6833 ldrmi r3, [r6, #0] + 80414ee: 3302 addmi r3, #2 + 80414f0: 6033 strmi r3, [r6, #0] + 80414f2: 6825 ldr r5, [r4, #0] + 80414f4: f015 0506 ands.w r5, r5, #6 + 80414f8: d106 bne.n 8041508 <_printf_common+0x48> + 80414fa: f104 0a19 add.w sl, r4, #25 + 80414fe: 68e3 ldr r3, [r4, #12] + 8041500: 6832 ldr r2, [r6, #0] + 8041502: 1a9b subs r3, r3, r2 + 8041504: 42ab cmp r3, r5 + 8041506: dc26 bgt.n 8041556 <_printf_common+0x96> + 8041508: f894 2043 ldrb.w r2, [r4, #67] ; 0x43 + 804150c: 1e13 subs r3, r2, #0 + 804150e: 6822 ldr r2, [r4, #0] + 8041510: bf18 it ne + 8041512: 2301 movne r3, #1 + 8041514: 0692 lsls r2, r2, #26 + 8041516: d42b bmi.n 8041570 <_printf_common+0xb0> + 8041518: f104 0243 add.w r2, r4, #67 ; 0x43 + 804151c: 4649 mov r1, r9 + 804151e: 4638 mov r0, r7 + 8041520: 47c0 blx r8 + 8041522: 3001 adds r0, #1 + 8041524: d01e beq.n 8041564 <_printf_common+0xa4> + 8041526: 6823 ldr r3, [r4, #0] + 8041528: 68e5 ldr r5, [r4, #12] + 804152a: 6832 ldr r2, [r6, #0] + 804152c: f003 0306 and.w r3, r3, #6 + 8041530: 2b04 cmp r3, #4 + 8041532: bf08 it eq + 8041534: 1aad subeq r5, r5, r2 + 8041536: 68a3 ldr r3, [r4, #8] + 8041538: 6922 ldr r2, [r4, #16] + 804153a: bf0c ite eq + 804153c: ea25 75e5 biceq.w r5, r5, r5, asr #31 + 8041540: 2500 movne r5, #0 + 8041542: 4293 cmp r3, r2 + 8041544: bfc4 itt gt + 8041546: 1a9b subgt r3, r3, r2 + 8041548: 18ed addgt r5, r5, r3 + 804154a: 2600 movs r6, #0 + 804154c: 341a adds r4, #26 + 804154e: 42b5 cmp r5, r6 + 8041550: d11a bne.n 8041588 <_printf_common+0xc8> + 8041552: 2000 movs r0, #0 + 8041554: e008 b.n 8041568 <_printf_common+0xa8> + 8041556: 2301 movs r3, #1 + 8041558: 4652 mov r2, sl + 804155a: 4649 mov r1, r9 + 804155c: 4638 mov r0, r7 + 804155e: 47c0 blx r8 + 8041560: 3001 adds r0, #1 + 8041562: d103 bne.n 804156c <_printf_common+0xac> + 8041564: f04f 30ff mov.w r0, #4294967295 + 8041568: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 804156c: 3501 adds r5, #1 + 804156e: e7c6 b.n 80414fe <_printf_common+0x3e> + 8041570: 18e1 adds r1, r4, r3 + 8041572: 1c5a adds r2, r3, #1 + 8041574: 2030 movs r0, #48 ; 0x30 + 8041576: f881 0043 strb.w r0, [r1, #67] ; 0x43 + 804157a: 4422 add r2, r4 + 804157c: f894 1045 ldrb.w r1, [r4, #69] ; 0x45 + 8041580: f882 1043 strb.w r1, [r2, #67] ; 0x43 + 8041584: 3302 adds r3, #2 + 8041586: e7c7 b.n 8041518 <_printf_common+0x58> + 8041588: 2301 movs r3, #1 + 804158a: 4622 mov r2, r4 + 804158c: 4649 mov r1, r9 + 804158e: 4638 mov r0, r7 + 8041590: 47c0 blx r8 + 8041592: 3001 adds r0, #1 + 8041594: d0e6 beq.n 8041564 <_printf_common+0xa4> + 8041596: 3601 adds r6, #1 + 8041598: e7d9 b.n 804154e <_printf_common+0x8e> ... -08041518 <_printf_i>: - 8041518: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} - 804151c: 7e0f ldrb r7, [r1, #24] - 804151e: 9d0c ldr r5, [sp, #48] ; 0x30 - 8041520: 2f78 cmp r7, #120 ; 0x78 - 8041522: 4691 mov r9, r2 - 8041524: 4680 mov r8, r0 - 8041526: 460c mov r4, r1 - 8041528: 469a mov sl, r3 - 804152a: f101 0243 add.w r2, r1, #67 ; 0x43 - 804152e: d807 bhi.n 8041540 <_printf_i+0x28> - 8041530: 2f62 cmp r7, #98 ; 0x62 - 8041532: d80a bhi.n 804154a <_printf_i+0x32> - 8041534: 2f00 cmp r7, #0 - 8041536: f000 80d8 beq.w 80416ea <_printf_i+0x1d2> - 804153a: 2f58 cmp r7, #88 ; 0x58 - 804153c: f000 80a3 beq.w 8041686 <_printf_i+0x16e> - 8041540: f104 0542 add.w r5, r4, #66 ; 0x42 - 8041544: f884 7042 strb.w r7, [r4, #66] ; 0x42 - 8041548: e03a b.n 80415c0 <_printf_i+0xa8> - 804154a: f1a7 0363 sub.w r3, r7, #99 ; 0x63 - 804154e: 2b15 cmp r3, #21 - 8041550: d8f6 bhi.n 8041540 <_printf_i+0x28> - 8041552: a101 add r1, pc, #4 ; (adr r1, 8041558 <_printf_i+0x40>) - 8041554: f851 f023 ldr.w pc, [r1, r3, lsl #2] - 8041558: 080415b1 .word 0x080415b1 - 804155c: 080415c5 .word 0x080415c5 - 8041560: 08041541 .word 0x08041541 - 8041564: 08041541 .word 0x08041541 - 8041568: 08041541 .word 0x08041541 - 804156c: 08041541 .word 0x08041541 - 8041570: 080415c5 .word 0x080415c5 - 8041574: 08041541 .word 0x08041541 - 8041578: 08041541 .word 0x08041541 - 804157c: 08041541 .word 0x08041541 - 8041580: 08041541 .word 0x08041541 - 8041584: 080416d1 .word 0x080416d1 - 8041588: 080415f5 .word 0x080415f5 - 804158c: 080416b3 .word 0x080416b3 - 8041590: 08041541 .word 0x08041541 - 8041594: 08041541 .word 0x08041541 - 8041598: 080416f3 .word 0x080416f3 - 804159c: 08041541 .word 0x08041541 - 80415a0: 080415f5 .word 0x080415f5 - 80415a4: 08041541 .word 0x08041541 - 80415a8: 08041541 .word 0x08041541 - 80415ac: 080416bb .word 0x080416bb - 80415b0: 682b ldr r3, [r5, #0] - 80415b2: 1d1a adds r2, r3, #4 - 80415b4: 681b ldr r3, [r3, #0] - 80415b6: 602a str r2, [r5, #0] - 80415b8: f104 0542 add.w r5, r4, #66 ; 0x42 - 80415bc: f884 3042 strb.w r3, [r4, #66] ; 0x42 - 80415c0: 2301 movs r3, #1 - 80415c2: e0a3 b.n 804170c <_printf_i+0x1f4> - 80415c4: 6820 ldr r0, [r4, #0] - 80415c6: 6829 ldr r1, [r5, #0] - 80415c8: 0606 lsls r6, r0, #24 - 80415ca: f101 0304 add.w r3, r1, #4 - 80415ce: d50a bpl.n 80415e6 <_printf_i+0xce> - 80415d0: 680e ldr r6, [r1, #0] - 80415d2: 602b str r3, [r5, #0] - 80415d4: 2e00 cmp r6, #0 - 80415d6: da03 bge.n 80415e0 <_printf_i+0xc8> - 80415d8: 232d movs r3, #45 ; 0x2d - 80415da: 4276 negs r6, r6 - 80415dc: f884 3043 strb.w r3, [r4, #67] ; 0x43 - 80415e0: 485e ldr r0, [pc, #376] ; (804175c <_printf_i+0x244>) - 80415e2: 230a movs r3, #10 - 80415e4: e019 b.n 804161a <_printf_i+0x102> - 80415e6: 680e ldr r6, [r1, #0] - 80415e8: 602b str r3, [r5, #0] - 80415ea: f010 0f40 tst.w r0, #64 ; 0x40 - 80415ee: bf18 it ne - 80415f0: b236 sxthne r6, r6 - 80415f2: e7ef b.n 80415d4 <_printf_i+0xbc> - 80415f4: 682b ldr r3, [r5, #0] - 80415f6: 6820 ldr r0, [r4, #0] - 80415f8: 1d19 adds r1, r3, #4 - 80415fa: 6029 str r1, [r5, #0] - 80415fc: 0601 lsls r1, r0, #24 - 80415fe: d501 bpl.n 8041604 <_printf_i+0xec> - 8041600: 681e ldr r6, [r3, #0] - 8041602: e002 b.n 804160a <_printf_i+0xf2> - 8041604: 0646 lsls r6, r0, #25 - 8041606: d5fb bpl.n 8041600 <_printf_i+0xe8> - 8041608: 881e ldrh r6, [r3, #0] - 804160a: 4854 ldr r0, [pc, #336] ; (804175c <_printf_i+0x244>) - 804160c: 2f6f cmp r7, #111 ; 0x6f - 804160e: bf0c ite eq - 8041610: 2308 moveq r3, #8 - 8041612: 230a movne r3, #10 - 8041614: 2100 movs r1, #0 - 8041616: f884 1043 strb.w r1, [r4, #67] ; 0x43 - 804161a: 6865 ldr r5, [r4, #4] - 804161c: 60a5 str r5, [r4, #8] - 804161e: 2d00 cmp r5, #0 - 8041620: bfa2 ittt ge - 8041622: 6821 ldrge r1, [r4, #0] - 8041624: f021 0104 bicge.w r1, r1, #4 - 8041628: 6021 strge r1, [r4, #0] - 804162a: b90e cbnz r6, 8041630 <_printf_i+0x118> - 804162c: 2d00 cmp r5, #0 - 804162e: d04d beq.n 80416cc <_printf_i+0x1b4> - 8041630: 4615 mov r5, r2 - 8041632: fbb6 f1f3 udiv r1, r6, r3 - 8041636: fb03 6711 mls r7, r3, r1, r6 - 804163a: 5dc7 ldrb r7, [r0, r7] - 804163c: f805 7d01 strb.w r7, [r5, #-1]! - 8041640: 4637 mov r7, r6 - 8041642: 42bb cmp r3, r7 - 8041644: 460e mov r6, r1 - 8041646: d9f4 bls.n 8041632 <_printf_i+0x11a> - 8041648: 2b08 cmp r3, #8 - 804164a: d10b bne.n 8041664 <_printf_i+0x14c> - 804164c: 6823 ldr r3, [r4, #0] - 804164e: 07de lsls r6, r3, #31 - 8041650: d508 bpl.n 8041664 <_printf_i+0x14c> - 8041652: 6923 ldr r3, [r4, #16] - 8041654: 6861 ldr r1, [r4, #4] - 8041656: 4299 cmp r1, r3 - 8041658: bfde ittt le - 804165a: 2330 movle r3, #48 ; 0x30 - 804165c: f805 3c01 strble.w r3, [r5, #-1] - 8041660: f105 35ff addle.w r5, r5, #4294967295 - 8041664: 1b52 subs r2, r2, r5 - 8041666: 6122 str r2, [r4, #16] - 8041668: f8cd a000 str.w sl, [sp] - 804166c: 464b mov r3, r9 - 804166e: aa03 add r2, sp, #12 - 8041670: 4621 mov r1, r4 - 8041672: 4640 mov r0, r8 - 8041674: f7ff fee2 bl 804143c <_printf_common> - 8041678: 3001 adds r0, #1 - 804167a: d14c bne.n 8041716 <_printf_i+0x1fe> - 804167c: f04f 30ff mov.w r0, #4294967295 - 8041680: b004 add sp, #16 - 8041682: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} - 8041686: 4835 ldr r0, [pc, #212] ; (804175c <_printf_i+0x244>) - 8041688: f881 7045 strb.w r7, [r1, #69] ; 0x45 - 804168c: 6829 ldr r1, [r5, #0] - 804168e: 6823 ldr r3, [r4, #0] - 8041690: f851 6b04 ldr.w r6, [r1], #4 - 8041694: 6029 str r1, [r5, #0] - 8041696: 061d lsls r5, r3, #24 - 8041698: d514 bpl.n 80416c4 <_printf_i+0x1ac> - 804169a: 07df lsls r7, r3, #31 - 804169c: bf44 itt mi - 804169e: f043 0320 orrmi.w r3, r3, #32 - 80416a2: 6023 strmi r3, [r4, #0] - 80416a4: b91e cbnz r6, 80416ae <_printf_i+0x196> - 80416a6: 6823 ldr r3, [r4, #0] - 80416a8: f023 0320 bic.w r3, r3, #32 - 80416ac: 6023 str r3, [r4, #0] - 80416ae: 2310 movs r3, #16 - 80416b0: e7b0 b.n 8041614 <_printf_i+0xfc> - 80416b2: 6823 ldr r3, [r4, #0] - 80416b4: f043 0320 orr.w r3, r3, #32 - 80416b8: 6023 str r3, [r4, #0] - 80416ba: 2378 movs r3, #120 ; 0x78 - 80416bc: 4828 ldr r0, [pc, #160] ; (8041760 <_printf_i+0x248>) - 80416be: f884 3045 strb.w r3, [r4, #69] ; 0x45 - 80416c2: e7e3 b.n 804168c <_printf_i+0x174> - 80416c4: 0659 lsls r1, r3, #25 - 80416c6: bf48 it mi - 80416c8: b2b6 uxthmi r6, r6 - 80416ca: e7e6 b.n 804169a <_printf_i+0x182> - 80416cc: 4615 mov r5, r2 - 80416ce: e7bb b.n 8041648 <_printf_i+0x130> - 80416d0: 682b ldr r3, [r5, #0] - 80416d2: 6826 ldr r6, [r4, #0] - 80416d4: 6961 ldr r1, [r4, #20] - 80416d6: 1d18 adds r0, r3, #4 - 80416d8: 6028 str r0, [r5, #0] - 80416da: 0635 lsls r5, r6, #24 - 80416dc: 681b ldr r3, [r3, #0] - 80416de: d501 bpl.n 80416e4 <_printf_i+0x1cc> - 80416e0: 6019 str r1, [r3, #0] - 80416e2: e002 b.n 80416ea <_printf_i+0x1d2> - 80416e4: 0670 lsls r0, r6, #25 - 80416e6: d5fb bpl.n 80416e0 <_printf_i+0x1c8> - 80416e8: 8019 strh r1, [r3, #0] - 80416ea: 2300 movs r3, #0 - 80416ec: 6123 str r3, [r4, #16] - 80416ee: 4615 mov r5, r2 - 80416f0: e7ba b.n 8041668 <_printf_i+0x150> - 80416f2: 682b ldr r3, [r5, #0] - 80416f4: 1d1a adds r2, r3, #4 - 80416f6: 602a str r2, [r5, #0] - 80416f8: 681d ldr r5, [r3, #0] - 80416fa: 6862 ldr r2, [r4, #4] - 80416fc: 2100 movs r1, #0 - 80416fe: 4628 mov r0, r5 - 8041700: f7de fe06 bl 8020310 - 8041704: b108 cbz r0, 804170a <_printf_i+0x1f2> - 8041706: 1b40 subs r0, r0, r5 - 8041708: 6060 str r0, [r4, #4] - 804170a: 6863 ldr r3, [r4, #4] - 804170c: 6123 str r3, [r4, #16] - 804170e: 2300 movs r3, #0 - 8041710: f884 3043 strb.w r3, [r4, #67] ; 0x43 - 8041714: e7a8 b.n 8041668 <_printf_i+0x150> - 8041716: 6923 ldr r3, [r4, #16] - 8041718: 462a mov r2, r5 - 804171a: 4649 mov r1, r9 - 804171c: 4640 mov r0, r8 - 804171e: 47d0 blx sl - 8041720: 3001 adds r0, #1 - 8041722: d0ab beq.n 804167c <_printf_i+0x164> - 8041724: 6823 ldr r3, [r4, #0] - 8041726: 079b lsls r3, r3, #30 - 8041728: d413 bmi.n 8041752 <_printf_i+0x23a> - 804172a: 68e0 ldr r0, [r4, #12] - 804172c: 9b03 ldr r3, [sp, #12] - 804172e: 4298 cmp r0, r3 - 8041730: bfb8 it lt - 8041732: 4618 movlt r0, r3 - 8041734: e7a4 b.n 8041680 <_printf_i+0x168> - 8041736: 2301 movs r3, #1 - 8041738: 4632 mov r2, r6 - 804173a: 4649 mov r1, r9 - 804173c: 4640 mov r0, r8 - 804173e: 47d0 blx sl - 8041740: 3001 adds r0, #1 - 8041742: d09b beq.n 804167c <_printf_i+0x164> - 8041744: 3501 adds r5, #1 - 8041746: 68e3 ldr r3, [r4, #12] - 8041748: 9903 ldr r1, [sp, #12] - 804174a: 1a5b subs r3, r3, r1 - 804174c: 42ab cmp r3, r5 - 804174e: dcf2 bgt.n 8041736 <_printf_i+0x21e> - 8041750: e7eb b.n 804172a <_printf_i+0x212> - 8041752: 2500 movs r5, #0 - 8041754: f104 0619 add.w r6, r4, #25 - 8041758: e7f5 b.n 8041746 <_printf_i+0x22e> - 804175a: bf00 nop - 804175c: 08044f39 .word 0x08044f39 - 8041760: 08044f4a .word 0x08044f4a - -08041764 <__sread>: - 8041764: b510 push {r4, lr} - 8041766: 460c mov r4, r1 - 8041768: f9b1 100e ldrsh.w r1, [r1, #14] - 804176c: f000 fa92 bl 8041c94 <_read_r> - 8041770: 2800 cmp r0, #0 - 8041772: bfab itete ge - 8041774: 6d63 ldrge r3, [r4, #84] ; 0x54 - 8041776: 89a3 ldrhlt r3, [r4, #12] - 8041778: 181b addge r3, r3, r0 - 804177a: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 - 804177e: bfac ite ge - 8041780: 6563 strge r3, [r4, #84] ; 0x54 - 8041782: 81a3 strhlt r3, [r4, #12] - 8041784: bd10 pop {r4, pc} - -08041786 <__swrite>: - 8041786: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 804178a: 461f mov r7, r3 - 804178c: 898b ldrh r3, [r1, #12] - 804178e: 05db lsls r3, r3, #23 - 8041790: 4605 mov r5, r0 - 8041792: 460c mov r4, r1 - 8041794: 4616 mov r6, r2 - 8041796: d505 bpl.n 80417a4 <__swrite+0x1e> - 8041798: f9b1 100e ldrsh.w r1, [r1, #14] - 804179c: 2302 movs r3, #2 - 804179e: 2200 movs r2, #0 - 80417a0: f000 f9d0 bl 8041b44 <_lseek_r> - 80417a4: 89a3 ldrh r3, [r4, #12] - 80417a6: f9b4 100e ldrsh.w r1, [r4, #14] - 80417aa: f423 5380 bic.w r3, r3, #4096 ; 0x1000 - 80417ae: 81a3 strh r3, [r4, #12] - 80417b0: 4632 mov r2, r6 - 80417b2: 463b mov r3, r7 - 80417b4: 4628 mov r0, r5 - 80417b6: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} - 80417ba: f000 b869 b.w 8041890 <_write_r> - -080417be <__sseek>: - 80417be: b510 push {r4, lr} - 80417c0: 460c mov r4, r1 - 80417c2: f9b1 100e ldrsh.w r1, [r1, #14] - 80417c6: f000 f9bd bl 8041b44 <_lseek_r> - 80417ca: 1c43 adds r3, r0, #1 - 80417cc: 89a3 ldrh r3, [r4, #12] - 80417ce: bf15 itete ne - 80417d0: 6560 strne r0, [r4, #84] ; 0x54 - 80417d2: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 - 80417d6: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 - 80417da: 81a3 strheq r3, [r4, #12] - 80417dc: bf18 it ne - 80417de: 81a3 strhne r3, [r4, #12] - 80417e0: bd10 pop {r4, pc} - -080417e2 <__sclose>: - 80417e2: f9b1 100e ldrsh.w r1, [r1, #14] - 80417e6: f000 b8db b.w 80419a0 <_close_r> +0804159c <_printf_i>: + 804159c: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} + 80415a0: 7e0f ldrb r7, [r1, #24] + 80415a2: 9d0c ldr r5, [sp, #48] ; 0x30 + 80415a4: 2f78 cmp r7, #120 ; 0x78 + 80415a6: 4691 mov r9, r2 + 80415a8: 4680 mov r8, r0 + 80415aa: 460c mov r4, r1 + 80415ac: 469a mov sl, r3 + 80415ae: f101 0243 add.w r2, r1, #67 ; 0x43 + 80415b2: d807 bhi.n 80415c4 <_printf_i+0x28> + 80415b4: 2f62 cmp r7, #98 ; 0x62 + 80415b6: d80a bhi.n 80415ce <_printf_i+0x32> + 80415b8: 2f00 cmp r7, #0 + 80415ba: f000 80d8 beq.w 804176e <_printf_i+0x1d2> + 80415be: 2f58 cmp r7, #88 ; 0x58 + 80415c0: f000 80a3 beq.w 804170a <_printf_i+0x16e> + 80415c4: f104 0542 add.w r5, r4, #66 ; 0x42 + 80415c8: f884 7042 strb.w r7, [r4, #66] ; 0x42 + 80415cc: e03a b.n 8041644 <_printf_i+0xa8> + 80415ce: f1a7 0363 sub.w r3, r7, #99 ; 0x63 + 80415d2: 2b15 cmp r3, #21 + 80415d4: d8f6 bhi.n 80415c4 <_printf_i+0x28> + 80415d6: a101 add r1, pc, #4 ; (adr r1, 80415dc <_printf_i+0x40>) + 80415d8: f851 f023 ldr.w pc, [r1, r3, lsl #2] + 80415dc: 08041635 .word 0x08041635 + 80415e0: 08041649 .word 0x08041649 + 80415e4: 080415c5 .word 0x080415c5 + 80415e8: 080415c5 .word 0x080415c5 + 80415ec: 080415c5 .word 0x080415c5 + 80415f0: 080415c5 .word 0x080415c5 + 80415f4: 08041649 .word 0x08041649 + 80415f8: 080415c5 .word 0x080415c5 + 80415fc: 080415c5 .word 0x080415c5 + 8041600: 080415c5 .word 0x080415c5 + 8041604: 080415c5 .word 0x080415c5 + 8041608: 08041755 .word 0x08041755 + 804160c: 08041679 .word 0x08041679 + 8041610: 08041737 .word 0x08041737 + 8041614: 080415c5 .word 0x080415c5 + 8041618: 080415c5 .word 0x080415c5 + 804161c: 08041777 .word 0x08041777 + 8041620: 080415c5 .word 0x080415c5 + 8041624: 08041679 .word 0x08041679 + 8041628: 080415c5 .word 0x080415c5 + 804162c: 080415c5 .word 0x080415c5 + 8041630: 0804173f .word 0x0804173f + 8041634: 682b ldr r3, [r5, #0] + 8041636: 1d1a adds r2, r3, #4 + 8041638: 681b ldr r3, [r3, #0] + 804163a: 602a str r2, [r5, #0] + 804163c: f104 0542 add.w r5, r4, #66 ; 0x42 + 8041640: f884 3042 strb.w r3, [r4, #66] ; 0x42 + 8041644: 2301 movs r3, #1 + 8041646: e0a3 b.n 8041790 <_printf_i+0x1f4> + 8041648: 6820 ldr r0, [r4, #0] + 804164a: 6829 ldr r1, [r5, #0] + 804164c: 0606 lsls r6, r0, #24 + 804164e: f101 0304 add.w r3, r1, #4 + 8041652: d50a bpl.n 804166a <_printf_i+0xce> + 8041654: 680e ldr r6, [r1, #0] + 8041656: 602b str r3, [r5, #0] + 8041658: 2e00 cmp r6, #0 + 804165a: da03 bge.n 8041664 <_printf_i+0xc8> + 804165c: 232d movs r3, #45 ; 0x2d + 804165e: 4276 negs r6, r6 + 8041660: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8041664: 485e ldr r0, [pc, #376] ; (80417e0 <_printf_i+0x244>) + 8041666: 230a movs r3, #10 + 8041668: e019 b.n 804169e <_printf_i+0x102> + 804166a: 680e ldr r6, [r1, #0] + 804166c: 602b str r3, [r5, #0] + 804166e: f010 0f40 tst.w r0, #64 ; 0x40 + 8041672: bf18 it ne + 8041674: b236 sxthne r6, r6 + 8041676: e7ef b.n 8041658 <_printf_i+0xbc> + 8041678: 682b ldr r3, [r5, #0] + 804167a: 6820 ldr r0, [r4, #0] + 804167c: 1d19 adds r1, r3, #4 + 804167e: 6029 str r1, [r5, #0] + 8041680: 0601 lsls r1, r0, #24 + 8041682: d501 bpl.n 8041688 <_printf_i+0xec> + 8041684: 681e ldr r6, [r3, #0] + 8041686: e002 b.n 804168e <_printf_i+0xf2> + 8041688: 0646 lsls r6, r0, #25 + 804168a: d5fb bpl.n 8041684 <_printf_i+0xe8> + 804168c: 881e ldrh r6, [r3, #0] + 804168e: 4854 ldr r0, [pc, #336] ; (80417e0 <_printf_i+0x244>) + 8041690: 2f6f cmp r7, #111 ; 0x6f + 8041692: bf0c ite eq + 8041694: 2308 moveq r3, #8 + 8041696: 230a movne r3, #10 + 8041698: 2100 movs r1, #0 + 804169a: f884 1043 strb.w r1, [r4, #67] ; 0x43 + 804169e: 6865 ldr r5, [r4, #4] + 80416a0: 60a5 str r5, [r4, #8] + 80416a2: 2d00 cmp r5, #0 + 80416a4: bfa2 ittt ge + 80416a6: 6821 ldrge r1, [r4, #0] + 80416a8: f021 0104 bicge.w r1, r1, #4 + 80416ac: 6021 strge r1, [r4, #0] + 80416ae: b90e cbnz r6, 80416b4 <_printf_i+0x118> + 80416b0: 2d00 cmp r5, #0 + 80416b2: d04d beq.n 8041750 <_printf_i+0x1b4> + 80416b4: 4615 mov r5, r2 + 80416b6: fbb6 f1f3 udiv r1, r6, r3 + 80416ba: fb03 6711 mls r7, r3, r1, r6 + 80416be: 5dc7 ldrb r7, [r0, r7] + 80416c0: f805 7d01 strb.w r7, [r5, #-1]! + 80416c4: 4637 mov r7, r6 + 80416c6: 42bb cmp r3, r7 + 80416c8: 460e mov r6, r1 + 80416ca: d9f4 bls.n 80416b6 <_printf_i+0x11a> + 80416cc: 2b08 cmp r3, #8 + 80416ce: d10b bne.n 80416e8 <_printf_i+0x14c> + 80416d0: 6823 ldr r3, [r4, #0] + 80416d2: 07de lsls r6, r3, #31 + 80416d4: d508 bpl.n 80416e8 <_printf_i+0x14c> + 80416d6: 6923 ldr r3, [r4, #16] + 80416d8: 6861 ldr r1, [r4, #4] + 80416da: 4299 cmp r1, r3 + 80416dc: bfde ittt le + 80416de: 2330 movle r3, #48 ; 0x30 + 80416e0: f805 3c01 strble.w r3, [r5, #-1] + 80416e4: f105 35ff addle.w r5, r5, #4294967295 + 80416e8: 1b52 subs r2, r2, r5 + 80416ea: 6122 str r2, [r4, #16] + 80416ec: f8cd a000 str.w sl, [sp] + 80416f0: 464b mov r3, r9 + 80416f2: aa03 add r2, sp, #12 + 80416f4: 4621 mov r1, r4 + 80416f6: 4640 mov r0, r8 + 80416f8: f7ff fee2 bl 80414c0 <_printf_common> + 80416fc: 3001 adds r0, #1 + 80416fe: d14c bne.n 804179a <_printf_i+0x1fe> + 8041700: f04f 30ff mov.w r0, #4294967295 + 8041704: b004 add sp, #16 + 8041706: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 804170a: 4835 ldr r0, [pc, #212] ; (80417e0 <_printf_i+0x244>) + 804170c: f881 7045 strb.w r7, [r1, #69] ; 0x45 + 8041710: 6829 ldr r1, [r5, #0] + 8041712: 6823 ldr r3, [r4, #0] + 8041714: f851 6b04 ldr.w r6, [r1], #4 + 8041718: 6029 str r1, [r5, #0] + 804171a: 061d lsls r5, r3, #24 + 804171c: d514 bpl.n 8041748 <_printf_i+0x1ac> + 804171e: 07df lsls r7, r3, #31 + 8041720: bf44 itt mi + 8041722: f043 0320 orrmi.w r3, r3, #32 + 8041726: 6023 strmi r3, [r4, #0] + 8041728: b91e cbnz r6, 8041732 <_printf_i+0x196> + 804172a: 6823 ldr r3, [r4, #0] + 804172c: f023 0320 bic.w r3, r3, #32 + 8041730: 6023 str r3, [r4, #0] + 8041732: 2310 movs r3, #16 + 8041734: e7b0 b.n 8041698 <_printf_i+0xfc> + 8041736: 6823 ldr r3, [r4, #0] + 8041738: f043 0320 orr.w r3, r3, #32 + 804173c: 6023 str r3, [r4, #0] + 804173e: 2378 movs r3, #120 ; 0x78 + 8041740: 4828 ldr r0, [pc, #160] ; (80417e4 <_printf_i+0x248>) + 8041742: f884 3045 strb.w r3, [r4, #69] ; 0x45 + 8041746: e7e3 b.n 8041710 <_printf_i+0x174> + 8041748: 0659 lsls r1, r3, #25 + 804174a: bf48 it mi + 804174c: b2b6 uxthmi r6, r6 + 804174e: e7e6 b.n 804171e <_printf_i+0x182> + 8041750: 4615 mov r5, r2 + 8041752: e7bb b.n 80416cc <_printf_i+0x130> + 8041754: 682b ldr r3, [r5, #0] + 8041756: 6826 ldr r6, [r4, #0] + 8041758: 6961 ldr r1, [r4, #20] + 804175a: 1d18 adds r0, r3, #4 + 804175c: 6028 str r0, [r5, #0] + 804175e: 0635 lsls r5, r6, #24 + 8041760: 681b ldr r3, [r3, #0] + 8041762: d501 bpl.n 8041768 <_printf_i+0x1cc> + 8041764: 6019 str r1, [r3, #0] + 8041766: e002 b.n 804176e <_printf_i+0x1d2> + 8041768: 0670 lsls r0, r6, #25 + 804176a: d5fb bpl.n 8041764 <_printf_i+0x1c8> + 804176c: 8019 strh r1, [r3, #0] + 804176e: 2300 movs r3, #0 + 8041770: 6123 str r3, [r4, #16] + 8041772: 4615 mov r5, r2 + 8041774: e7ba b.n 80416ec <_printf_i+0x150> + 8041776: 682b ldr r3, [r5, #0] + 8041778: 1d1a adds r2, r3, #4 + 804177a: 602a str r2, [r5, #0] + 804177c: 681d ldr r5, [r3, #0] + 804177e: 6862 ldr r2, [r4, #4] + 8041780: 2100 movs r1, #0 + 8041782: 4628 mov r0, r5 + 8041784: f7de fdc4 bl 8020310 + 8041788: b108 cbz r0, 804178e <_printf_i+0x1f2> + 804178a: 1b40 subs r0, r0, r5 + 804178c: 6060 str r0, [r4, #4] + 804178e: 6863 ldr r3, [r4, #4] + 8041790: 6123 str r3, [r4, #16] + 8041792: 2300 movs r3, #0 + 8041794: f884 3043 strb.w r3, [r4, #67] ; 0x43 + 8041798: e7a8 b.n 80416ec <_printf_i+0x150> + 804179a: 6923 ldr r3, [r4, #16] + 804179c: 462a mov r2, r5 + 804179e: 4649 mov r1, r9 + 80417a0: 4640 mov r0, r8 + 80417a2: 47d0 blx sl + 80417a4: 3001 adds r0, #1 + 80417a6: d0ab beq.n 8041700 <_printf_i+0x164> + 80417a8: 6823 ldr r3, [r4, #0] + 80417aa: 079b lsls r3, r3, #30 + 80417ac: d413 bmi.n 80417d6 <_printf_i+0x23a> + 80417ae: 68e0 ldr r0, [r4, #12] + 80417b0: 9b03 ldr r3, [sp, #12] + 80417b2: 4298 cmp r0, r3 + 80417b4: bfb8 it lt + 80417b6: 4618 movlt r0, r3 + 80417b8: e7a4 b.n 8041704 <_printf_i+0x168> + 80417ba: 2301 movs r3, #1 + 80417bc: 4632 mov r2, r6 + 80417be: 4649 mov r1, r9 + 80417c0: 4640 mov r0, r8 + 80417c2: 47d0 blx sl + 80417c4: 3001 adds r0, #1 + 80417c6: d09b beq.n 8041700 <_printf_i+0x164> + 80417c8: 3501 adds r5, #1 + 80417ca: 68e3 ldr r3, [r4, #12] + 80417cc: 9903 ldr r1, [sp, #12] + 80417ce: 1a5b subs r3, r3, r1 + 80417d0: 42ab cmp r3, r5 + 80417d2: dcf2 bgt.n 80417ba <_printf_i+0x21e> + 80417d4: e7eb b.n 80417ae <_printf_i+0x212> + 80417d6: 2500 movs r5, #0 + 80417d8: f104 0619 add.w r6, r4, #25 + 80417dc: e7f5 b.n 80417ca <_printf_i+0x22e> + 80417de: bf00 nop + 80417e0: 08044fb9 .word 0x08044fb9 + 80417e4: 08044fca .word 0x08044fca + +080417e8 <__sread>: + 80417e8: b510 push {r4, lr} + 80417ea: 460c mov r4, r1 + 80417ec: f9b1 100e ldrsh.w r1, [r1, #14] + 80417f0: f000 fa92 bl 8041d18 <_read_r> + 80417f4: 2800 cmp r0, #0 + 80417f6: bfab itete ge + 80417f8: 6d63 ldrge r3, [r4, #84] ; 0x54 + 80417fa: 89a3 ldrhlt r3, [r4, #12] + 80417fc: 181b addge r3, r3, r0 + 80417fe: f423 5380 biclt.w r3, r3, #4096 ; 0x1000 + 8041802: bfac ite ge + 8041804: 6563 strge r3, [r4, #84] ; 0x54 + 8041806: 81a3 strhlt r3, [r4, #12] + 8041808: bd10 pop {r4, pc} + +0804180a <__swrite>: + 804180a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 804180e: 461f mov r7, r3 + 8041810: 898b ldrh r3, [r1, #12] + 8041812: 05db lsls r3, r3, #23 + 8041814: 4605 mov r5, r0 + 8041816: 460c mov r4, r1 + 8041818: 4616 mov r6, r2 + 804181a: d505 bpl.n 8041828 <__swrite+0x1e> + 804181c: f9b1 100e ldrsh.w r1, [r1, #14] + 8041820: 2302 movs r3, #2 + 8041822: 2200 movs r2, #0 + 8041824: f000 f9d0 bl 8041bc8 <_lseek_r> + 8041828: 89a3 ldrh r3, [r4, #12] + 804182a: f9b4 100e ldrsh.w r1, [r4, #14] + 804182e: f423 5380 bic.w r3, r3, #4096 ; 0x1000 + 8041832: 81a3 strh r3, [r4, #12] + 8041834: 4632 mov r2, r6 + 8041836: 463b mov r3, r7 + 8041838: 4628 mov r0, r5 + 804183a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} + 804183e: f000 b869 b.w 8041914 <_write_r> + +08041842 <__sseek>: + 8041842: b510 push {r4, lr} + 8041844: 460c mov r4, r1 + 8041846: f9b1 100e ldrsh.w r1, [r1, #14] + 804184a: f000 f9bd bl 8041bc8 <_lseek_r> + 804184e: 1c43 adds r3, r0, #1 + 8041850: 89a3 ldrh r3, [r4, #12] + 8041852: bf15 itete ne + 8041854: 6560 strne r0, [r4, #84] ; 0x54 + 8041856: f423 5380 biceq.w r3, r3, #4096 ; 0x1000 + 804185a: f443 5380 orrne.w r3, r3, #4096 ; 0x1000 + 804185e: 81a3 strheq r3, [r4, #12] + 8041860: bf18 it ne + 8041862: 81a3 strhne r3, [r4, #12] + 8041864: bd10 pop {r4, pc} + +08041866 <__sclose>: + 8041866: f9b1 100e ldrsh.w r1, [r1, #14] + 804186a: f000 b8db b.w 8041a24 <_close_r> ... -080417ec <__swbuf_r>: - 80417ec: b5f8 push {r3, r4, r5, r6, r7, lr} - 80417ee: 460e mov r6, r1 - 80417f0: 4614 mov r4, r2 - 80417f2: 4605 mov r5, r0 - 80417f4: b118 cbz r0, 80417fe <__swbuf_r+0x12> - 80417f6: 6983 ldr r3, [r0, #24] - 80417f8: b90b cbnz r3, 80417fe <__swbuf_r+0x12> - 80417fa: f7ff faab bl 8040d54 <__sinit> - 80417fe: 4b21 ldr r3, [pc, #132] ; (8041884 <__swbuf_r+0x98>) - 8041800: 429c cmp r4, r3 - 8041802: d12b bne.n 804185c <__swbuf_r+0x70> - 8041804: 686c ldr r4, [r5, #4] - 8041806: 69a3 ldr r3, [r4, #24] - 8041808: 60a3 str r3, [r4, #8] - 804180a: 89a3 ldrh r3, [r4, #12] - 804180c: 071a lsls r2, r3, #28 - 804180e: d52f bpl.n 8041870 <__swbuf_r+0x84> - 8041810: 6923 ldr r3, [r4, #16] - 8041812: b36b cbz r3, 8041870 <__swbuf_r+0x84> - 8041814: 6923 ldr r3, [r4, #16] - 8041816: 6820 ldr r0, [r4, #0] - 8041818: 1ac0 subs r0, r0, r3 - 804181a: 6963 ldr r3, [r4, #20] - 804181c: b2f6 uxtb r6, r6 - 804181e: 4283 cmp r3, r0 - 8041820: 4637 mov r7, r6 - 8041822: dc04 bgt.n 804182e <__swbuf_r+0x42> - 8041824: 4621 mov r1, r4 - 8041826: 4628 mov r0, r5 - 8041828: f000 f950 bl 8041acc <_fflush_r> - 804182c: bb30 cbnz r0, 804187c <__swbuf_r+0x90> - 804182e: 68a3 ldr r3, [r4, #8] - 8041830: 3b01 subs r3, #1 - 8041832: 60a3 str r3, [r4, #8] - 8041834: 6823 ldr r3, [r4, #0] - 8041836: 1c5a adds r2, r3, #1 - 8041838: 6022 str r2, [r4, #0] - 804183a: 701e strb r6, [r3, #0] - 804183c: 6963 ldr r3, [r4, #20] - 804183e: 3001 adds r0, #1 - 8041840: 4283 cmp r3, r0 - 8041842: d004 beq.n 804184e <__swbuf_r+0x62> - 8041844: 89a3 ldrh r3, [r4, #12] - 8041846: 07db lsls r3, r3, #31 - 8041848: d506 bpl.n 8041858 <__swbuf_r+0x6c> - 804184a: 2e0a cmp r6, #10 - 804184c: d104 bne.n 8041858 <__swbuf_r+0x6c> - 804184e: 4621 mov r1, r4 - 8041850: 4628 mov r0, r5 - 8041852: f000 f93b bl 8041acc <_fflush_r> - 8041856: b988 cbnz r0, 804187c <__swbuf_r+0x90> - 8041858: 4638 mov r0, r7 - 804185a: bdf8 pop {r3, r4, r5, r6, r7, pc} - 804185c: 4b0a ldr r3, [pc, #40] ; (8041888 <__swbuf_r+0x9c>) - 804185e: 429c cmp r4, r3 - 8041860: d101 bne.n 8041866 <__swbuf_r+0x7a> - 8041862: 68ac ldr r4, [r5, #8] - 8041864: e7cf b.n 8041806 <__swbuf_r+0x1a> - 8041866: 4b09 ldr r3, [pc, #36] ; (804188c <__swbuf_r+0xa0>) - 8041868: 429c cmp r4, r3 - 804186a: bf08 it eq - 804186c: 68ec ldreq r4, [r5, #12] - 804186e: e7ca b.n 8041806 <__swbuf_r+0x1a> - 8041870: 4621 mov r1, r4 - 8041872: 4628 mov r0, r5 - 8041874: f000 f81e bl 80418b4 <__swsetup_r> - 8041878: 2800 cmp r0, #0 - 804187a: d0cb beq.n 8041814 <__swbuf_r+0x28> - 804187c: f04f 37ff mov.w r7, #4294967295 - 8041880: e7ea b.n 8041858 <__swbuf_r+0x6c> - 8041882: bf00 nop - 8041884: 08044ee8 .word 0x08044ee8 - 8041888: 08044f08 .word 0x08044f08 - 804188c: 08044ec8 .word 0x08044ec8 - -08041890 <_write_r>: - 8041890: b538 push {r3, r4, r5, lr} - 8041892: 4d07 ldr r5, [pc, #28] ; (80418b0 <_write_r+0x20>) - 8041894: 4604 mov r4, r0 - 8041896: 4608 mov r0, r1 - 8041898: 4611 mov r1, r2 - 804189a: 2200 movs r2, #0 - 804189c: 602a str r2, [r5, #0] - 804189e: 461a mov r2, r3 - 80418a0: f7e2 ffa7 bl 80247f2 <_write> - 80418a4: 1c43 adds r3, r0, #1 - 80418a6: d102 bne.n 80418ae <_write_r+0x1e> - 80418a8: 682b ldr r3, [r5, #0] - 80418aa: b103 cbz r3, 80418ae <_write_r+0x1e> - 80418ac: 6023 str r3, [r4, #0] - 80418ae: bd38 pop {r3, r4, r5, pc} - 80418b0: 2400eabc .word 0x2400eabc - -080418b4 <__swsetup_r>: - 80418b4: 4b32 ldr r3, [pc, #200] ; (8041980 <__swsetup_r+0xcc>) - 80418b6: b570 push {r4, r5, r6, lr} - 80418b8: 681d ldr r5, [r3, #0] - 80418ba: 4606 mov r6, r0 - 80418bc: 460c mov r4, r1 - 80418be: b125 cbz r5, 80418ca <__swsetup_r+0x16> - 80418c0: 69ab ldr r3, [r5, #24] - 80418c2: b913 cbnz r3, 80418ca <__swsetup_r+0x16> - 80418c4: 4628 mov r0, r5 - 80418c6: f7ff fa45 bl 8040d54 <__sinit> - 80418ca: 4b2e ldr r3, [pc, #184] ; (8041984 <__swsetup_r+0xd0>) - 80418cc: 429c cmp r4, r3 - 80418ce: d10f bne.n 80418f0 <__swsetup_r+0x3c> - 80418d0: 686c ldr r4, [r5, #4] - 80418d2: 89a3 ldrh r3, [r4, #12] - 80418d4: f9b4 200c ldrsh.w r2, [r4, #12] - 80418d8: 0719 lsls r1, r3, #28 - 80418da: d42c bmi.n 8041936 <__swsetup_r+0x82> - 80418dc: 06dd lsls r5, r3, #27 - 80418de: d411 bmi.n 8041904 <__swsetup_r+0x50> - 80418e0: 2309 movs r3, #9 - 80418e2: 6033 str r3, [r6, #0] - 80418e4: f042 0340 orr.w r3, r2, #64 ; 0x40 - 80418e8: 81a3 strh r3, [r4, #12] - 80418ea: f04f 30ff mov.w r0, #4294967295 - 80418ee: e03e b.n 804196e <__swsetup_r+0xba> - 80418f0: 4b25 ldr r3, [pc, #148] ; (8041988 <__swsetup_r+0xd4>) - 80418f2: 429c cmp r4, r3 - 80418f4: d101 bne.n 80418fa <__swsetup_r+0x46> - 80418f6: 68ac ldr r4, [r5, #8] - 80418f8: e7eb b.n 80418d2 <__swsetup_r+0x1e> - 80418fa: 4b24 ldr r3, [pc, #144] ; (804198c <__swsetup_r+0xd8>) - 80418fc: 429c cmp r4, r3 - 80418fe: bf08 it eq - 8041900: 68ec ldreq r4, [r5, #12] - 8041902: e7e6 b.n 80418d2 <__swsetup_r+0x1e> - 8041904: 0758 lsls r0, r3, #29 - 8041906: d512 bpl.n 804192e <__swsetup_r+0x7a> - 8041908: 6b61 ldr r1, [r4, #52] ; 0x34 - 804190a: b141 cbz r1, 804191e <__swsetup_r+0x6a> - 804190c: f104 0344 add.w r3, r4, #68 ; 0x44 - 8041910: 4299 cmp r1, r3 - 8041912: d002 beq.n 804191a <__swsetup_r+0x66> - 8041914: 4630 mov r0, r6 - 8041916: f7ff f81b bl 8040950 <_free_r> - 804191a: 2300 movs r3, #0 - 804191c: 6363 str r3, [r4, #52] ; 0x34 - 804191e: 89a3 ldrh r3, [r4, #12] - 8041920: f023 0324 bic.w r3, r3, #36 ; 0x24 - 8041924: 81a3 strh r3, [r4, #12] - 8041926: 2300 movs r3, #0 - 8041928: 6063 str r3, [r4, #4] - 804192a: 6923 ldr r3, [r4, #16] - 804192c: 6023 str r3, [r4, #0] - 804192e: 89a3 ldrh r3, [r4, #12] - 8041930: f043 0308 orr.w r3, r3, #8 - 8041934: 81a3 strh r3, [r4, #12] - 8041936: 6923 ldr r3, [r4, #16] - 8041938: b94b cbnz r3, 804194e <__swsetup_r+0x9a> - 804193a: 89a3 ldrh r3, [r4, #12] - 804193c: f403 7320 and.w r3, r3, #640 ; 0x280 - 8041940: f5b3 7f00 cmp.w r3, #512 ; 0x200 - 8041944: d003 beq.n 804194e <__swsetup_r+0x9a> - 8041946: 4621 mov r1, r4 - 8041948: 4630 mov r0, r6 - 804194a: f000 f933 bl 8041bb4 <__smakebuf_r> - 804194e: 89a0 ldrh r0, [r4, #12] - 8041950: f9b4 200c ldrsh.w r2, [r4, #12] - 8041954: f010 0301 ands.w r3, r0, #1 - 8041958: d00a beq.n 8041970 <__swsetup_r+0xbc> - 804195a: 2300 movs r3, #0 - 804195c: 60a3 str r3, [r4, #8] - 804195e: 6963 ldr r3, [r4, #20] - 8041960: 425b negs r3, r3 - 8041962: 61a3 str r3, [r4, #24] - 8041964: 6923 ldr r3, [r4, #16] - 8041966: b943 cbnz r3, 804197a <__swsetup_r+0xc6> - 8041968: f010 0080 ands.w r0, r0, #128 ; 0x80 - 804196c: d1ba bne.n 80418e4 <__swsetup_r+0x30> - 804196e: bd70 pop {r4, r5, r6, pc} - 8041970: 0781 lsls r1, r0, #30 - 8041972: bf58 it pl - 8041974: 6963 ldrpl r3, [r4, #20] - 8041976: 60a3 str r3, [r4, #8] - 8041978: e7f4 b.n 8041964 <__swsetup_r+0xb0> - 804197a: 2000 movs r0, #0 - 804197c: e7f7 b.n 804196e <__swsetup_r+0xba> - 804197e: bf00 nop - 8041980: 24000078 .word 0x24000078 - 8041984: 08044ee8 .word 0x08044ee8 - 8041988: 08044f08 .word 0x08044f08 - 804198c: 08044ec8 .word 0x08044ec8 - -08041990 : - 8041990: b508 push {r3, lr} - 8041992: 2006 movs r0, #6 - 8041994: f000 f9b8 bl 8041d08 - 8041998: 2001 movs r0, #1 - 804199a: f7e2 ff03 bl 80247a4 <_exit> +08041870 <__swbuf_r>: + 8041870: b5f8 push {r3, r4, r5, r6, r7, lr} + 8041872: 460e mov r6, r1 + 8041874: 4614 mov r4, r2 + 8041876: 4605 mov r5, r0 + 8041878: b118 cbz r0, 8041882 <__swbuf_r+0x12> + 804187a: 6983 ldr r3, [r0, #24] + 804187c: b90b cbnz r3, 8041882 <__swbuf_r+0x12> + 804187e: f7ff faab bl 8040dd8 <__sinit> + 8041882: 4b21 ldr r3, [pc, #132] ; (8041908 <__swbuf_r+0x98>) + 8041884: 429c cmp r4, r3 + 8041886: d12b bne.n 80418e0 <__swbuf_r+0x70> + 8041888: 686c ldr r4, [r5, #4] + 804188a: 69a3 ldr r3, [r4, #24] + 804188c: 60a3 str r3, [r4, #8] + 804188e: 89a3 ldrh r3, [r4, #12] + 8041890: 071a lsls r2, r3, #28 + 8041892: d52f bpl.n 80418f4 <__swbuf_r+0x84> + 8041894: 6923 ldr r3, [r4, #16] + 8041896: b36b cbz r3, 80418f4 <__swbuf_r+0x84> + 8041898: 6923 ldr r3, [r4, #16] + 804189a: 6820 ldr r0, [r4, #0] + 804189c: 1ac0 subs r0, r0, r3 + 804189e: 6963 ldr r3, [r4, #20] + 80418a0: b2f6 uxtb r6, r6 + 80418a2: 4283 cmp r3, r0 + 80418a4: 4637 mov r7, r6 + 80418a6: dc04 bgt.n 80418b2 <__swbuf_r+0x42> + 80418a8: 4621 mov r1, r4 + 80418aa: 4628 mov r0, r5 + 80418ac: f000 f950 bl 8041b50 <_fflush_r> + 80418b0: bb30 cbnz r0, 8041900 <__swbuf_r+0x90> + 80418b2: 68a3 ldr r3, [r4, #8] + 80418b4: 3b01 subs r3, #1 + 80418b6: 60a3 str r3, [r4, #8] + 80418b8: 6823 ldr r3, [r4, #0] + 80418ba: 1c5a adds r2, r3, #1 + 80418bc: 6022 str r2, [r4, #0] + 80418be: 701e strb r6, [r3, #0] + 80418c0: 6963 ldr r3, [r4, #20] + 80418c2: 3001 adds r0, #1 + 80418c4: 4283 cmp r3, r0 + 80418c6: d004 beq.n 80418d2 <__swbuf_r+0x62> + 80418c8: 89a3 ldrh r3, [r4, #12] + 80418ca: 07db lsls r3, r3, #31 + 80418cc: d506 bpl.n 80418dc <__swbuf_r+0x6c> + 80418ce: 2e0a cmp r6, #10 + 80418d0: d104 bne.n 80418dc <__swbuf_r+0x6c> + 80418d2: 4621 mov r1, r4 + 80418d4: 4628 mov r0, r5 + 80418d6: f000 f93b bl 8041b50 <_fflush_r> + 80418da: b988 cbnz r0, 8041900 <__swbuf_r+0x90> + 80418dc: 4638 mov r0, r7 + 80418de: bdf8 pop {r3, r4, r5, r6, r7, pc} + 80418e0: 4b0a ldr r3, [pc, #40] ; (804190c <__swbuf_r+0x9c>) + 80418e2: 429c cmp r4, r3 + 80418e4: d101 bne.n 80418ea <__swbuf_r+0x7a> + 80418e6: 68ac ldr r4, [r5, #8] + 80418e8: e7cf b.n 804188a <__swbuf_r+0x1a> + 80418ea: 4b09 ldr r3, [pc, #36] ; (8041910 <__swbuf_r+0xa0>) + 80418ec: 429c cmp r4, r3 + 80418ee: bf08 it eq + 80418f0: 68ec ldreq r4, [r5, #12] + 80418f2: e7ca b.n 804188a <__swbuf_r+0x1a> + 80418f4: 4621 mov r1, r4 + 80418f6: 4628 mov r0, r5 + 80418f8: f000 f81e bl 8041938 <__swsetup_r> + 80418fc: 2800 cmp r0, #0 + 80418fe: d0cb beq.n 8041898 <__swbuf_r+0x28> + 8041900: f04f 37ff mov.w r7, #4294967295 + 8041904: e7ea b.n 80418dc <__swbuf_r+0x6c> + 8041906: bf00 nop + 8041908: 08044f68 .word 0x08044f68 + 804190c: 08044f88 .word 0x08044f88 + 8041910: 08044f48 .word 0x08044f48 + +08041914 <_write_r>: + 8041914: b538 push {r3, r4, r5, lr} + 8041916: 4d07 ldr r5, [pc, #28] ; (8041934 <_write_r+0x20>) + 8041918: 4604 mov r4, r0 + 804191a: 4608 mov r0, r1 + 804191c: 4611 mov r1, r2 + 804191e: 2200 movs r2, #0 + 8041920: 602a str r2, [r5, #0] + 8041922: 461a mov r2, r3 + 8041924: f7e2 ffa7 bl 8024876 <_write> + 8041928: 1c43 adds r3, r0, #1 + 804192a: d102 bne.n 8041932 <_write_r+0x1e> + 804192c: 682b ldr r3, [r5, #0] + 804192e: b103 cbz r3, 8041932 <_write_r+0x1e> + 8041930: 6023 str r3, [r4, #0] + 8041932: bd38 pop {r3, r4, r5, pc} + 8041934: 2400eac4 .word 0x2400eac4 + +08041938 <__swsetup_r>: + 8041938: 4b32 ldr r3, [pc, #200] ; (8041a04 <__swsetup_r+0xcc>) + 804193a: b570 push {r4, r5, r6, lr} + 804193c: 681d ldr r5, [r3, #0] + 804193e: 4606 mov r6, r0 + 8041940: 460c mov r4, r1 + 8041942: b125 cbz r5, 804194e <__swsetup_r+0x16> + 8041944: 69ab ldr r3, [r5, #24] + 8041946: b913 cbnz r3, 804194e <__swsetup_r+0x16> + 8041948: 4628 mov r0, r5 + 804194a: f7ff fa45 bl 8040dd8 <__sinit> + 804194e: 4b2e ldr r3, [pc, #184] ; (8041a08 <__swsetup_r+0xd0>) + 8041950: 429c cmp r4, r3 + 8041952: d10f bne.n 8041974 <__swsetup_r+0x3c> + 8041954: 686c ldr r4, [r5, #4] + 8041956: 89a3 ldrh r3, [r4, #12] + 8041958: f9b4 200c ldrsh.w r2, [r4, #12] + 804195c: 0719 lsls r1, r3, #28 + 804195e: d42c bmi.n 80419ba <__swsetup_r+0x82> + 8041960: 06dd lsls r5, r3, #27 + 8041962: d411 bmi.n 8041988 <__swsetup_r+0x50> + 8041964: 2309 movs r3, #9 + 8041966: 6033 str r3, [r6, #0] + 8041968: f042 0340 orr.w r3, r2, #64 ; 0x40 + 804196c: 81a3 strh r3, [r4, #12] + 804196e: f04f 30ff mov.w r0, #4294967295 + 8041972: e03e b.n 80419f2 <__swsetup_r+0xba> + 8041974: 4b25 ldr r3, [pc, #148] ; (8041a0c <__swsetup_r+0xd4>) + 8041976: 429c cmp r4, r3 + 8041978: d101 bne.n 804197e <__swsetup_r+0x46> + 804197a: 68ac ldr r4, [r5, #8] + 804197c: e7eb b.n 8041956 <__swsetup_r+0x1e> + 804197e: 4b24 ldr r3, [pc, #144] ; (8041a10 <__swsetup_r+0xd8>) + 8041980: 429c cmp r4, r3 + 8041982: bf08 it eq + 8041984: 68ec ldreq r4, [r5, #12] + 8041986: e7e6 b.n 8041956 <__swsetup_r+0x1e> + 8041988: 0758 lsls r0, r3, #29 + 804198a: d512 bpl.n 80419b2 <__swsetup_r+0x7a> + 804198c: 6b61 ldr r1, [r4, #52] ; 0x34 + 804198e: b141 cbz r1, 80419a2 <__swsetup_r+0x6a> + 8041990: f104 0344 add.w r3, r4, #68 ; 0x44 + 8041994: 4299 cmp r1, r3 + 8041996: d002 beq.n 804199e <__swsetup_r+0x66> + 8041998: 4630 mov r0, r6 + 804199a: f7ff f81b bl 80409d4 <_free_r> + 804199e: 2300 movs r3, #0 + 80419a0: 6363 str r3, [r4, #52] ; 0x34 + 80419a2: 89a3 ldrh r3, [r4, #12] + 80419a4: f023 0324 bic.w r3, r3, #36 ; 0x24 + 80419a8: 81a3 strh r3, [r4, #12] + 80419aa: 2300 movs r3, #0 + 80419ac: 6063 str r3, [r4, #4] + 80419ae: 6923 ldr r3, [r4, #16] + 80419b0: 6023 str r3, [r4, #0] + 80419b2: 89a3 ldrh r3, [r4, #12] + 80419b4: f043 0308 orr.w r3, r3, #8 + 80419b8: 81a3 strh r3, [r4, #12] + 80419ba: 6923 ldr r3, [r4, #16] + 80419bc: b94b cbnz r3, 80419d2 <__swsetup_r+0x9a> + 80419be: 89a3 ldrh r3, [r4, #12] + 80419c0: f403 7320 and.w r3, r3, #640 ; 0x280 + 80419c4: f5b3 7f00 cmp.w r3, #512 ; 0x200 + 80419c8: d003 beq.n 80419d2 <__swsetup_r+0x9a> + 80419ca: 4621 mov r1, r4 + 80419cc: 4630 mov r0, r6 + 80419ce: f000 f933 bl 8041c38 <__smakebuf_r> + 80419d2: 89a0 ldrh r0, [r4, #12] + 80419d4: f9b4 200c ldrsh.w r2, [r4, #12] + 80419d8: f010 0301 ands.w r3, r0, #1 + 80419dc: d00a beq.n 80419f4 <__swsetup_r+0xbc> + 80419de: 2300 movs r3, #0 + 80419e0: 60a3 str r3, [r4, #8] + 80419e2: 6963 ldr r3, [r4, #20] + 80419e4: 425b negs r3, r3 + 80419e6: 61a3 str r3, [r4, #24] + 80419e8: 6923 ldr r3, [r4, #16] + 80419ea: b943 cbnz r3, 80419fe <__swsetup_r+0xc6> + 80419ec: f010 0080 ands.w r0, r0, #128 ; 0x80 + 80419f0: d1ba bne.n 8041968 <__swsetup_r+0x30> + 80419f2: bd70 pop {r4, r5, r6, pc} + 80419f4: 0781 lsls r1, r0, #30 + 80419f6: bf58 it pl + 80419f8: 6963 ldrpl r3, [r4, #20] + 80419fa: 60a3 str r3, [r4, #8] + 80419fc: e7f4 b.n 80419e8 <__swsetup_r+0xb0> + 80419fe: 2000 movs r0, #0 + 8041a00: e7f7 b.n 80419f2 <__swsetup_r+0xba> + 8041a02: bf00 nop + 8041a04: 24000078 .word 0x24000078 + 8041a08: 08044f68 .word 0x08044f68 + 8041a0c: 08044f88 .word 0x08044f88 + 8041a10: 08044f48 .word 0x08044f48 + +08041a14 : + 8041a14: b508 push {r3, lr} + 8041a16: 2006 movs r0, #6 + 8041a18: f000 f9b8 bl 8041d8c + 8041a1c: 2001 movs r0, #1 + 8041a1e: f7e2 ff03 bl 8024828 <_exit> ... -080419a0 <_close_r>: - 80419a0: b538 push {r3, r4, r5, lr} - 80419a2: 4d06 ldr r5, [pc, #24] ; (80419bc <_close_r+0x1c>) - 80419a4: 2300 movs r3, #0 - 80419a6: 4604 mov r4, r0 - 80419a8: 4608 mov r0, r1 - 80419aa: 602b str r3, [r5, #0] - 80419ac: f7e2 ff3d bl 802482a <_close> - 80419b0: 1c43 adds r3, r0, #1 - 80419b2: d102 bne.n 80419ba <_close_r+0x1a> - 80419b4: 682b ldr r3, [r5, #0] - 80419b6: b103 cbz r3, 80419ba <_close_r+0x1a> - 80419b8: 6023 str r3, [r4, #0] - 80419ba: bd38 pop {r3, r4, r5, pc} - 80419bc: 2400eabc .word 0x2400eabc - -080419c0 <__sflush_r>: - 80419c0: 898a ldrh r2, [r1, #12] - 80419c2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 80419c6: 4605 mov r5, r0 - 80419c8: 0710 lsls r0, r2, #28 - 80419ca: 460c mov r4, r1 - 80419cc: d458 bmi.n 8041a80 <__sflush_r+0xc0> - 80419ce: 684b ldr r3, [r1, #4] - 80419d0: 2b00 cmp r3, #0 - 80419d2: dc05 bgt.n 80419e0 <__sflush_r+0x20> - 80419d4: 6c0b ldr r3, [r1, #64] ; 0x40 - 80419d6: 2b00 cmp r3, #0 - 80419d8: dc02 bgt.n 80419e0 <__sflush_r+0x20> - 80419da: 2000 movs r0, #0 - 80419dc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 80419e0: 6ae6 ldr r6, [r4, #44] ; 0x2c - 80419e2: 2e00 cmp r6, #0 - 80419e4: d0f9 beq.n 80419da <__sflush_r+0x1a> - 80419e6: 2300 movs r3, #0 - 80419e8: f412 5280 ands.w r2, r2, #4096 ; 0x1000 - 80419ec: 682f ldr r7, [r5, #0] - 80419ee: 602b str r3, [r5, #0] - 80419f0: d032 beq.n 8041a58 <__sflush_r+0x98> - 80419f2: 6d60 ldr r0, [r4, #84] ; 0x54 - 80419f4: 89a3 ldrh r3, [r4, #12] - 80419f6: 075a lsls r2, r3, #29 - 80419f8: d505 bpl.n 8041a06 <__sflush_r+0x46> - 80419fa: 6863 ldr r3, [r4, #4] - 80419fc: 1ac0 subs r0, r0, r3 - 80419fe: 6b63 ldr r3, [r4, #52] ; 0x34 - 8041a00: b10b cbz r3, 8041a06 <__sflush_r+0x46> - 8041a02: 6c23 ldr r3, [r4, #64] ; 0x40 - 8041a04: 1ac0 subs r0, r0, r3 - 8041a06: 2300 movs r3, #0 - 8041a08: 4602 mov r2, r0 - 8041a0a: 6ae6 ldr r6, [r4, #44] ; 0x2c - 8041a0c: 6a21 ldr r1, [r4, #32] - 8041a0e: 4628 mov r0, r5 - 8041a10: 47b0 blx r6 - 8041a12: 1c43 adds r3, r0, #1 - 8041a14: 89a3 ldrh r3, [r4, #12] - 8041a16: d106 bne.n 8041a26 <__sflush_r+0x66> - 8041a18: 6829 ldr r1, [r5, #0] - 8041a1a: 291d cmp r1, #29 - 8041a1c: d82c bhi.n 8041a78 <__sflush_r+0xb8> - 8041a1e: 4a2a ldr r2, [pc, #168] ; (8041ac8 <__sflush_r+0x108>) - 8041a20: 40ca lsrs r2, r1 - 8041a22: 07d6 lsls r6, r2, #31 - 8041a24: d528 bpl.n 8041a78 <__sflush_r+0xb8> - 8041a26: 2200 movs r2, #0 - 8041a28: 6062 str r2, [r4, #4] - 8041a2a: 04d9 lsls r1, r3, #19 - 8041a2c: 6922 ldr r2, [r4, #16] - 8041a2e: 6022 str r2, [r4, #0] - 8041a30: d504 bpl.n 8041a3c <__sflush_r+0x7c> - 8041a32: 1c42 adds r2, r0, #1 - 8041a34: d101 bne.n 8041a3a <__sflush_r+0x7a> - 8041a36: 682b ldr r3, [r5, #0] - 8041a38: b903 cbnz r3, 8041a3c <__sflush_r+0x7c> - 8041a3a: 6560 str r0, [r4, #84] ; 0x54 - 8041a3c: 6b61 ldr r1, [r4, #52] ; 0x34 - 8041a3e: 602f str r7, [r5, #0] - 8041a40: 2900 cmp r1, #0 - 8041a42: d0ca beq.n 80419da <__sflush_r+0x1a> - 8041a44: f104 0344 add.w r3, r4, #68 ; 0x44 - 8041a48: 4299 cmp r1, r3 - 8041a4a: d002 beq.n 8041a52 <__sflush_r+0x92> - 8041a4c: 4628 mov r0, r5 - 8041a4e: f7fe ff7f bl 8040950 <_free_r> - 8041a52: 2000 movs r0, #0 - 8041a54: 6360 str r0, [r4, #52] ; 0x34 - 8041a56: e7c1 b.n 80419dc <__sflush_r+0x1c> - 8041a58: 6a21 ldr r1, [r4, #32] - 8041a5a: 2301 movs r3, #1 - 8041a5c: 4628 mov r0, r5 - 8041a5e: 47b0 blx r6 - 8041a60: 1c41 adds r1, r0, #1 - 8041a62: d1c7 bne.n 80419f4 <__sflush_r+0x34> - 8041a64: 682b ldr r3, [r5, #0] - 8041a66: 2b00 cmp r3, #0 - 8041a68: d0c4 beq.n 80419f4 <__sflush_r+0x34> - 8041a6a: 2b1d cmp r3, #29 - 8041a6c: d001 beq.n 8041a72 <__sflush_r+0xb2> - 8041a6e: 2b16 cmp r3, #22 - 8041a70: d101 bne.n 8041a76 <__sflush_r+0xb6> - 8041a72: 602f str r7, [r5, #0] - 8041a74: e7b1 b.n 80419da <__sflush_r+0x1a> - 8041a76: 89a3 ldrh r3, [r4, #12] - 8041a78: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8041a7c: 81a3 strh r3, [r4, #12] - 8041a7e: e7ad b.n 80419dc <__sflush_r+0x1c> - 8041a80: 690f ldr r7, [r1, #16] - 8041a82: 2f00 cmp r7, #0 - 8041a84: d0a9 beq.n 80419da <__sflush_r+0x1a> - 8041a86: 0793 lsls r3, r2, #30 - 8041a88: 680e ldr r6, [r1, #0] - 8041a8a: bf08 it eq - 8041a8c: 694b ldreq r3, [r1, #20] - 8041a8e: 600f str r7, [r1, #0] - 8041a90: bf18 it ne - 8041a92: 2300 movne r3, #0 - 8041a94: eba6 0807 sub.w r8, r6, r7 - 8041a98: 608b str r3, [r1, #8] - 8041a9a: f1b8 0f00 cmp.w r8, #0 - 8041a9e: dd9c ble.n 80419da <__sflush_r+0x1a> - 8041aa0: 6a21 ldr r1, [r4, #32] - 8041aa2: 6aa6 ldr r6, [r4, #40] ; 0x28 - 8041aa4: 4643 mov r3, r8 - 8041aa6: 463a mov r2, r7 - 8041aa8: 4628 mov r0, r5 - 8041aaa: 47b0 blx r6 - 8041aac: 2800 cmp r0, #0 - 8041aae: dc06 bgt.n 8041abe <__sflush_r+0xfe> - 8041ab0: 89a3 ldrh r3, [r4, #12] - 8041ab2: f043 0340 orr.w r3, r3, #64 ; 0x40 - 8041ab6: 81a3 strh r3, [r4, #12] - 8041ab8: f04f 30ff mov.w r0, #4294967295 - 8041abc: e78e b.n 80419dc <__sflush_r+0x1c> - 8041abe: 4407 add r7, r0 - 8041ac0: eba8 0800 sub.w r8, r8, r0 - 8041ac4: e7e9 b.n 8041a9a <__sflush_r+0xda> - 8041ac6: bf00 nop - 8041ac8: 20400001 .word 0x20400001 - -08041acc <_fflush_r>: - 8041acc: b538 push {r3, r4, r5, lr} - 8041ace: 690b ldr r3, [r1, #16] - 8041ad0: 4605 mov r5, r0 - 8041ad2: 460c mov r4, r1 - 8041ad4: b913 cbnz r3, 8041adc <_fflush_r+0x10> - 8041ad6: 2500 movs r5, #0 - 8041ad8: 4628 mov r0, r5 - 8041ada: bd38 pop {r3, r4, r5, pc} - 8041adc: b118 cbz r0, 8041ae6 <_fflush_r+0x1a> - 8041ade: 6983 ldr r3, [r0, #24] - 8041ae0: b90b cbnz r3, 8041ae6 <_fflush_r+0x1a> - 8041ae2: f7ff f937 bl 8040d54 <__sinit> - 8041ae6: 4b14 ldr r3, [pc, #80] ; (8041b38 <_fflush_r+0x6c>) - 8041ae8: 429c cmp r4, r3 - 8041aea: d11b bne.n 8041b24 <_fflush_r+0x58> - 8041aec: 686c ldr r4, [r5, #4] - 8041aee: f9b4 300c ldrsh.w r3, [r4, #12] - 8041af2: 2b00 cmp r3, #0 - 8041af4: d0ef beq.n 8041ad6 <_fflush_r+0xa> - 8041af6: 6e62 ldr r2, [r4, #100] ; 0x64 - 8041af8: 07d0 lsls r0, r2, #31 - 8041afa: d404 bmi.n 8041b06 <_fflush_r+0x3a> - 8041afc: 0599 lsls r1, r3, #22 - 8041afe: d402 bmi.n 8041b06 <_fflush_r+0x3a> - 8041b00: 6da0 ldr r0, [r4, #88] ; 0x58 - 8041b02: f7ff f9d7 bl 8040eb4 <__retarget_lock_acquire_recursive> - 8041b06: 4628 mov r0, r5 - 8041b08: 4621 mov r1, r4 - 8041b0a: f7ff ff59 bl 80419c0 <__sflush_r> - 8041b0e: 6e63 ldr r3, [r4, #100] ; 0x64 - 8041b10: 07da lsls r2, r3, #31 - 8041b12: 4605 mov r5, r0 - 8041b14: d4e0 bmi.n 8041ad8 <_fflush_r+0xc> - 8041b16: 89a3 ldrh r3, [r4, #12] - 8041b18: 059b lsls r3, r3, #22 - 8041b1a: d4dd bmi.n 8041ad8 <_fflush_r+0xc> - 8041b1c: 6da0 ldr r0, [r4, #88] ; 0x58 - 8041b1e: f7ff f9ca bl 8040eb6 <__retarget_lock_release_recursive> - 8041b22: e7d9 b.n 8041ad8 <_fflush_r+0xc> - 8041b24: 4b05 ldr r3, [pc, #20] ; (8041b3c <_fflush_r+0x70>) - 8041b26: 429c cmp r4, r3 - 8041b28: d101 bne.n 8041b2e <_fflush_r+0x62> - 8041b2a: 68ac ldr r4, [r5, #8] - 8041b2c: e7df b.n 8041aee <_fflush_r+0x22> - 8041b2e: 4b04 ldr r3, [pc, #16] ; (8041b40 <_fflush_r+0x74>) - 8041b30: 429c cmp r4, r3 - 8041b32: bf08 it eq - 8041b34: 68ec ldreq r4, [r5, #12] - 8041b36: e7da b.n 8041aee <_fflush_r+0x22> - 8041b38: 08044ee8 .word 0x08044ee8 - 8041b3c: 08044f08 .word 0x08044f08 - 8041b40: 08044ec8 .word 0x08044ec8 - -08041b44 <_lseek_r>: - 8041b44: b538 push {r3, r4, r5, lr} - 8041b46: 4d07 ldr r5, [pc, #28] ; (8041b64 <_lseek_r+0x20>) - 8041b48: 4604 mov r4, r0 - 8041b4a: 4608 mov r0, r1 - 8041b4c: 4611 mov r1, r2 - 8041b4e: 2200 movs r2, #0 - 8041b50: 602a str r2, [r5, #0] - 8041b52: 461a mov r2, r3 - 8041b54: f7e2 fe90 bl 8024878 <_lseek> - 8041b58: 1c43 adds r3, r0, #1 - 8041b5a: d102 bne.n 8041b62 <_lseek_r+0x1e> - 8041b5c: 682b ldr r3, [r5, #0] - 8041b5e: b103 cbz r3, 8041b62 <_lseek_r+0x1e> - 8041b60: 6023 str r3, [r4, #0] - 8041b62: bd38 pop {r3, r4, r5, pc} - 8041b64: 2400eabc .word 0x2400eabc - -08041b68 <__swhatbuf_r>: - 8041b68: b570 push {r4, r5, r6, lr} - 8041b6a: 460e mov r6, r1 - 8041b6c: f9b1 100e ldrsh.w r1, [r1, #14] - 8041b70: 2900 cmp r1, #0 - 8041b72: b096 sub sp, #88 ; 0x58 - 8041b74: 4614 mov r4, r2 - 8041b76: 461d mov r5, r3 - 8041b78: da08 bge.n 8041b8c <__swhatbuf_r+0x24> - 8041b7a: f9b6 300c ldrsh.w r3, [r6, #12] - 8041b7e: 2200 movs r2, #0 - 8041b80: 602a str r2, [r5, #0] - 8041b82: 061a lsls r2, r3, #24 - 8041b84: d410 bmi.n 8041ba8 <__swhatbuf_r+0x40> - 8041b86: f44f 6380 mov.w r3, #1024 ; 0x400 - 8041b8a: e00e b.n 8041baa <__swhatbuf_r+0x42> - 8041b8c: 466a mov r2, sp - 8041b8e: f000 f8d7 bl 8041d40 <_fstat_r> - 8041b92: 2800 cmp r0, #0 - 8041b94: dbf1 blt.n 8041b7a <__swhatbuf_r+0x12> - 8041b96: 9a01 ldr r2, [sp, #4] - 8041b98: f402 4270 and.w r2, r2, #61440 ; 0xf000 - 8041b9c: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 - 8041ba0: 425a negs r2, r3 - 8041ba2: 415a adcs r2, r3 - 8041ba4: 602a str r2, [r5, #0] - 8041ba6: e7ee b.n 8041b86 <__swhatbuf_r+0x1e> - 8041ba8: 2340 movs r3, #64 ; 0x40 - 8041baa: 2000 movs r0, #0 - 8041bac: 6023 str r3, [r4, #0] - 8041bae: b016 add sp, #88 ; 0x58 - 8041bb0: bd70 pop {r4, r5, r6, pc} +08041a24 <_close_r>: + 8041a24: b538 push {r3, r4, r5, lr} + 8041a26: 4d06 ldr r5, [pc, #24] ; (8041a40 <_close_r+0x1c>) + 8041a28: 2300 movs r3, #0 + 8041a2a: 4604 mov r4, r0 + 8041a2c: 4608 mov r0, r1 + 8041a2e: 602b str r3, [r5, #0] + 8041a30: f7e2 ff3d bl 80248ae <_close> + 8041a34: 1c43 adds r3, r0, #1 + 8041a36: d102 bne.n 8041a3e <_close_r+0x1a> + 8041a38: 682b ldr r3, [r5, #0] + 8041a3a: b103 cbz r3, 8041a3e <_close_r+0x1a> + 8041a3c: 6023 str r3, [r4, #0] + 8041a3e: bd38 pop {r3, r4, r5, pc} + 8041a40: 2400eac4 .word 0x2400eac4 + +08041a44 <__sflush_r>: + 8041a44: 898a ldrh r2, [r1, #12] + 8041a46: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8041a4a: 4605 mov r5, r0 + 8041a4c: 0710 lsls r0, r2, #28 + 8041a4e: 460c mov r4, r1 + 8041a50: d458 bmi.n 8041b04 <__sflush_r+0xc0> + 8041a52: 684b ldr r3, [r1, #4] + 8041a54: 2b00 cmp r3, #0 + 8041a56: dc05 bgt.n 8041a64 <__sflush_r+0x20> + 8041a58: 6c0b ldr r3, [r1, #64] ; 0x40 + 8041a5a: 2b00 cmp r3, #0 + 8041a5c: dc02 bgt.n 8041a64 <__sflush_r+0x20> + 8041a5e: 2000 movs r0, #0 + 8041a60: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8041a64: 6ae6 ldr r6, [r4, #44] ; 0x2c + 8041a66: 2e00 cmp r6, #0 + 8041a68: d0f9 beq.n 8041a5e <__sflush_r+0x1a> + 8041a6a: 2300 movs r3, #0 + 8041a6c: f412 5280 ands.w r2, r2, #4096 ; 0x1000 + 8041a70: 682f ldr r7, [r5, #0] + 8041a72: 602b str r3, [r5, #0] + 8041a74: d032 beq.n 8041adc <__sflush_r+0x98> + 8041a76: 6d60 ldr r0, [r4, #84] ; 0x54 + 8041a78: 89a3 ldrh r3, [r4, #12] + 8041a7a: 075a lsls r2, r3, #29 + 8041a7c: d505 bpl.n 8041a8a <__sflush_r+0x46> + 8041a7e: 6863 ldr r3, [r4, #4] + 8041a80: 1ac0 subs r0, r0, r3 + 8041a82: 6b63 ldr r3, [r4, #52] ; 0x34 + 8041a84: b10b cbz r3, 8041a8a <__sflush_r+0x46> + 8041a86: 6c23 ldr r3, [r4, #64] ; 0x40 + 8041a88: 1ac0 subs r0, r0, r3 + 8041a8a: 2300 movs r3, #0 + 8041a8c: 4602 mov r2, r0 + 8041a8e: 6ae6 ldr r6, [r4, #44] ; 0x2c + 8041a90: 6a21 ldr r1, [r4, #32] + 8041a92: 4628 mov r0, r5 + 8041a94: 47b0 blx r6 + 8041a96: 1c43 adds r3, r0, #1 + 8041a98: 89a3 ldrh r3, [r4, #12] + 8041a9a: d106 bne.n 8041aaa <__sflush_r+0x66> + 8041a9c: 6829 ldr r1, [r5, #0] + 8041a9e: 291d cmp r1, #29 + 8041aa0: d82c bhi.n 8041afc <__sflush_r+0xb8> + 8041aa2: 4a2a ldr r2, [pc, #168] ; (8041b4c <__sflush_r+0x108>) + 8041aa4: 40ca lsrs r2, r1 + 8041aa6: 07d6 lsls r6, r2, #31 + 8041aa8: d528 bpl.n 8041afc <__sflush_r+0xb8> + 8041aaa: 2200 movs r2, #0 + 8041aac: 6062 str r2, [r4, #4] + 8041aae: 04d9 lsls r1, r3, #19 + 8041ab0: 6922 ldr r2, [r4, #16] + 8041ab2: 6022 str r2, [r4, #0] + 8041ab4: d504 bpl.n 8041ac0 <__sflush_r+0x7c> + 8041ab6: 1c42 adds r2, r0, #1 + 8041ab8: d101 bne.n 8041abe <__sflush_r+0x7a> + 8041aba: 682b ldr r3, [r5, #0] + 8041abc: b903 cbnz r3, 8041ac0 <__sflush_r+0x7c> + 8041abe: 6560 str r0, [r4, #84] ; 0x54 + 8041ac0: 6b61 ldr r1, [r4, #52] ; 0x34 + 8041ac2: 602f str r7, [r5, #0] + 8041ac4: 2900 cmp r1, #0 + 8041ac6: d0ca beq.n 8041a5e <__sflush_r+0x1a> + 8041ac8: f104 0344 add.w r3, r4, #68 ; 0x44 + 8041acc: 4299 cmp r1, r3 + 8041ace: d002 beq.n 8041ad6 <__sflush_r+0x92> + 8041ad0: 4628 mov r0, r5 + 8041ad2: f7fe ff7f bl 80409d4 <_free_r> + 8041ad6: 2000 movs r0, #0 + 8041ad8: 6360 str r0, [r4, #52] ; 0x34 + 8041ada: e7c1 b.n 8041a60 <__sflush_r+0x1c> + 8041adc: 6a21 ldr r1, [r4, #32] + 8041ade: 2301 movs r3, #1 + 8041ae0: 4628 mov r0, r5 + 8041ae2: 47b0 blx r6 + 8041ae4: 1c41 adds r1, r0, #1 + 8041ae6: d1c7 bne.n 8041a78 <__sflush_r+0x34> + 8041ae8: 682b ldr r3, [r5, #0] + 8041aea: 2b00 cmp r3, #0 + 8041aec: d0c4 beq.n 8041a78 <__sflush_r+0x34> + 8041aee: 2b1d cmp r3, #29 + 8041af0: d001 beq.n 8041af6 <__sflush_r+0xb2> + 8041af2: 2b16 cmp r3, #22 + 8041af4: d101 bne.n 8041afa <__sflush_r+0xb6> + 8041af6: 602f str r7, [r5, #0] + 8041af8: e7b1 b.n 8041a5e <__sflush_r+0x1a> + 8041afa: 89a3 ldrh r3, [r4, #12] + 8041afc: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8041b00: 81a3 strh r3, [r4, #12] + 8041b02: e7ad b.n 8041a60 <__sflush_r+0x1c> + 8041b04: 690f ldr r7, [r1, #16] + 8041b06: 2f00 cmp r7, #0 + 8041b08: d0a9 beq.n 8041a5e <__sflush_r+0x1a> + 8041b0a: 0793 lsls r3, r2, #30 + 8041b0c: 680e ldr r6, [r1, #0] + 8041b0e: bf08 it eq + 8041b10: 694b ldreq r3, [r1, #20] + 8041b12: 600f str r7, [r1, #0] + 8041b14: bf18 it ne + 8041b16: 2300 movne r3, #0 + 8041b18: eba6 0807 sub.w r8, r6, r7 + 8041b1c: 608b str r3, [r1, #8] + 8041b1e: f1b8 0f00 cmp.w r8, #0 + 8041b22: dd9c ble.n 8041a5e <__sflush_r+0x1a> + 8041b24: 6a21 ldr r1, [r4, #32] + 8041b26: 6aa6 ldr r6, [r4, #40] ; 0x28 + 8041b28: 4643 mov r3, r8 + 8041b2a: 463a mov r2, r7 + 8041b2c: 4628 mov r0, r5 + 8041b2e: 47b0 blx r6 + 8041b30: 2800 cmp r0, #0 + 8041b32: dc06 bgt.n 8041b42 <__sflush_r+0xfe> + 8041b34: 89a3 ldrh r3, [r4, #12] + 8041b36: f043 0340 orr.w r3, r3, #64 ; 0x40 + 8041b3a: 81a3 strh r3, [r4, #12] + 8041b3c: f04f 30ff mov.w r0, #4294967295 + 8041b40: e78e b.n 8041a60 <__sflush_r+0x1c> + 8041b42: 4407 add r7, r0 + 8041b44: eba8 0800 sub.w r8, r8, r0 + 8041b48: e7e9 b.n 8041b1e <__sflush_r+0xda> + 8041b4a: bf00 nop + 8041b4c: 20400001 .word 0x20400001 + +08041b50 <_fflush_r>: + 8041b50: b538 push {r3, r4, r5, lr} + 8041b52: 690b ldr r3, [r1, #16] + 8041b54: 4605 mov r5, r0 + 8041b56: 460c mov r4, r1 + 8041b58: b913 cbnz r3, 8041b60 <_fflush_r+0x10> + 8041b5a: 2500 movs r5, #0 + 8041b5c: 4628 mov r0, r5 + 8041b5e: bd38 pop {r3, r4, r5, pc} + 8041b60: b118 cbz r0, 8041b6a <_fflush_r+0x1a> + 8041b62: 6983 ldr r3, [r0, #24] + 8041b64: b90b cbnz r3, 8041b6a <_fflush_r+0x1a> + 8041b66: f7ff f937 bl 8040dd8 <__sinit> + 8041b6a: 4b14 ldr r3, [pc, #80] ; (8041bbc <_fflush_r+0x6c>) + 8041b6c: 429c cmp r4, r3 + 8041b6e: d11b bne.n 8041ba8 <_fflush_r+0x58> + 8041b70: 686c ldr r4, [r5, #4] + 8041b72: f9b4 300c ldrsh.w r3, [r4, #12] + 8041b76: 2b00 cmp r3, #0 + 8041b78: d0ef beq.n 8041b5a <_fflush_r+0xa> + 8041b7a: 6e62 ldr r2, [r4, #100] ; 0x64 + 8041b7c: 07d0 lsls r0, r2, #31 + 8041b7e: d404 bmi.n 8041b8a <_fflush_r+0x3a> + 8041b80: 0599 lsls r1, r3, #22 + 8041b82: d402 bmi.n 8041b8a <_fflush_r+0x3a> + 8041b84: 6da0 ldr r0, [r4, #88] ; 0x58 + 8041b86: f7ff f9d7 bl 8040f38 <__retarget_lock_acquire_recursive> + 8041b8a: 4628 mov r0, r5 + 8041b8c: 4621 mov r1, r4 + 8041b8e: f7ff ff59 bl 8041a44 <__sflush_r> + 8041b92: 6e63 ldr r3, [r4, #100] ; 0x64 + 8041b94: 07da lsls r2, r3, #31 + 8041b96: 4605 mov r5, r0 + 8041b98: d4e0 bmi.n 8041b5c <_fflush_r+0xc> + 8041b9a: 89a3 ldrh r3, [r4, #12] + 8041b9c: 059b lsls r3, r3, #22 + 8041b9e: d4dd bmi.n 8041b5c <_fflush_r+0xc> + 8041ba0: 6da0 ldr r0, [r4, #88] ; 0x58 + 8041ba2: f7ff f9ca bl 8040f3a <__retarget_lock_release_recursive> + 8041ba6: e7d9 b.n 8041b5c <_fflush_r+0xc> + 8041ba8: 4b05 ldr r3, [pc, #20] ; (8041bc0 <_fflush_r+0x70>) + 8041baa: 429c cmp r4, r3 + 8041bac: d101 bne.n 8041bb2 <_fflush_r+0x62> + 8041bae: 68ac ldr r4, [r5, #8] + 8041bb0: e7df b.n 8041b72 <_fflush_r+0x22> + 8041bb2: 4b04 ldr r3, [pc, #16] ; (8041bc4 <_fflush_r+0x74>) + 8041bb4: 429c cmp r4, r3 + 8041bb6: bf08 it eq + 8041bb8: 68ec ldreq r4, [r5, #12] + 8041bba: e7da b.n 8041b72 <_fflush_r+0x22> + 8041bbc: 08044f68 .word 0x08044f68 + 8041bc0: 08044f88 .word 0x08044f88 + 8041bc4: 08044f48 .word 0x08044f48 + +08041bc8 <_lseek_r>: + 8041bc8: b538 push {r3, r4, r5, lr} + 8041bca: 4d07 ldr r5, [pc, #28] ; (8041be8 <_lseek_r+0x20>) + 8041bcc: 4604 mov r4, r0 + 8041bce: 4608 mov r0, r1 + 8041bd0: 4611 mov r1, r2 + 8041bd2: 2200 movs r2, #0 + 8041bd4: 602a str r2, [r5, #0] + 8041bd6: 461a mov r2, r3 + 8041bd8: f7e2 fe90 bl 80248fc <_lseek> + 8041bdc: 1c43 adds r3, r0, #1 + 8041bde: d102 bne.n 8041be6 <_lseek_r+0x1e> + 8041be0: 682b ldr r3, [r5, #0] + 8041be2: b103 cbz r3, 8041be6 <_lseek_r+0x1e> + 8041be4: 6023 str r3, [r4, #0] + 8041be6: bd38 pop {r3, r4, r5, pc} + 8041be8: 2400eac4 .word 0x2400eac4 + +08041bec <__swhatbuf_r>: + 8041bec: b570 push {r4, r5, r6, lr} + 8041bee: 460e mov r6, r1 + 8041bf0: f9b1 100e ldrsh.w r1, [r1, #14] + 8041bf4: 2900 cmp r1, #0 + 8041bf6: b096 sub sp, #88 ; 0x58 + 8041bf8: 4614 mov r4, r2 + 8041bfa: 461d mov r5, r3 + 8041bfc: da08 bge.n 8041c10 <__swhatbuf_r+0x24> + 8041bfe: f9b6 300c ldrsh.w r3, [r6, #12] + 8041c02: 2200 movs r2, #0 + 8041c04: 602a str r2, [r5, #0] + 8041c06: 061a lsls r2, r3, #24 + 8041c08: d410 bmi.n 8041c2c <__swhatbuf_r+0x40> + 8041c0a: f44f 6380 mov.w r3, #1024 ; 0x400 + 8041c0e: e00e b.n 8041c2e <__swhatbuf_r+0x42> + 8041c10: 466a mov r2, sp + 8041c12: f000 f8d7 bl 8041dc4 <_fstat_r> + 8041c16: 2800 cmp r0, #0 + 8041c18: dbf1 blt.n 8041bfe <__swhatbuf_r+0x12> + 8041c1a: 9a01 ldr r2, [sp, #4] + 8041c1c: f402 4270 and.w r2, r2, #61440 ; 0xf000 + 8041c20: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000 + 8041c24: 425a negs r2, r3 + 8041c26: 415a adcs r2, r3 + 8041c28: 602a str r2, [r5, #0] + 8041c2a: e7ee b.n 8041c0a <__swhatbuf_r+0x1e> + 8041c2c: 2340 movs r3, #64 ; 0x40 + 8041c2e: 2000 movs r0, #0 + 8041c30: 6023 str r3, [r4, #0] + 8041c32: b016 add sp, #88 ; 0x58 + 8041c34: bd70 pop {r4, r5, r6, pc} ... -08041bb4 <__smakebuf_r>: - 8041bb4: 898b ldrh r3, [r1, #12] - 8041bb6: b573 push {r0, r1, r4, r5, r6, lr} - 8041bb8: 079d lsls r5, r3, #30 - 8041bba: 4606 mov r6, r0 - 8041bbc: 460c mov r4, r1 - 8041bbe: d507 bpl.n 8041bd0 <__smakebuf_r+0x1c> - 8041bc0: f104 0347 add.w r3, r4, #71 ; 0x47 - 8041bc4: 6023 str r3, [r4, #0] - 8041bc6: 6123 str r3, [r4, #16] - 8041bc8: 2301 movs r3, #1 - 8041bca: 6163 str r3, [r4, #20] - 8041bcc: b002 add sp, #8 - 8041bce: bd70 pop {r4, r5, r6, pc} - 8041bd0: ab01 add r3, sp, #4 - 8041bd2: 466a mov r2, sp - 8041bd4: f7ff ffc8 bl 8041b68 <__swhatbuf_r> - 8041bd8: 9900 ldr r1, [sp, #0] - 8041bda: 4605 mov r5, r0 - 8041bdc: 4630 mov r0, r6 - 8041bde: f7fe ff23 bl 8040a28 <_malloc_r> - 8041be2: b948 cbnz r0, 8041bf8 <__smakebuf_r+0x44> - 8041be4: f9b4 300c ldrsh.w r3, [r4, #12] - 8041be8: 059a lsls r2, r3, #22 - 8041bea: d4ef bmi.n 8041bcc <__smakebuf_r+0x18> - 8041bec: f023 0303 bic.w r3, r3, #3 - 8041bf0: f043 0302 orr.w r3, r3, #2 - 8041bf4: 81a3 strh r3, [r4, #12] - 8041bf6: e7e3 b.n 8041bc0 <__smakebuf_r+0xc> - 8041bf8: 4b0d ldr r3, [pc, #52] ; (8041c30 <__smakebuf_r+0x7c>) - 8041bfa: 62b3 str r3, [r6, #40] ; 0x28 - 8041bfc: 89a3 ldrh r3, [r4, #12] - 8041bfe: 6020 str r0, [r4, #0] - 8041c00: f043 0380 orr.w r3, r3, #128 ; 0x80 - 8041c04: 81a3 strh r3, [r4, #12] - 8041c06: 9b00 ldr r3, [sp, #0] - 8041c08: 6163 str r3, [r4, #20] - 8041c0a: 9b01 ldr r3, [sp, #4] - 8041c0c: 6120 str r0, [r4, #16] - 8041c0e: b15b cbz r3, 8041c28 <__smakebuf_r+0x74> - 8041c10: f9b4 100e ldrsh.w r1, [r4, #14] - 8041c14: 4630 mov r0, r6 - 8041c16: f000 f8a5 bl 8041d64 <_isatty_r> - 8041c1a: b128 cbz r0, 8041c28 <__smakebuf_r+0x74> - 8041c1c: 89a3 ldrh r3, [r4, #12] - 8041c1e: f023 0303 bic.w r3, r3, #3 - 8041c22: f043 0301 orr.w r3, r3, #1 - 8041c26: 81a3 strh r3, [r4, #12] - 8041c28: 89a0 ldrh r0, [r4, #12] - 8041c2a: 4305 orrs r5, r0 - 8041c2c: 81a5 strh r5, [r4, #12] - 8041c2e: e7cd b.n 8041bcc <__smakebuf_r+0x18> - 8041c30: 08040ced .word 0x08040ced - -08041c34 <_realloc_r>: - 8041c34: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 8041c38: 4680 mov r8, r0 - 8041c3a: 4614 mov r4, r2 - 8041c3c: 460e mov r6, r1 - 8041c3e: b921 cbnz r1, 8041c4a <_realloc_r+0x16> - 8041c40: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} - 8041c44: 4611 mov r1, r2 - 8041c46: f7fe beef b.w 8040a28 <_malloc_r> - 8041c4a: b92a cbnz r2, 8041c58 <_realloc_r+0x24> - 8041c4c: f7fe fe80 bl 8040950 <_free_r> - 8041c50: 4625 mov r5, r4 - 8041c52: 4628 mov r0, r5 - 8041c54: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8041c58: f000 f894 bl 8041d84 <_malloc_usable_size_r> - 8041c5c: 4284 cmp r4, r0 - 8041c5e: 4607 mov r7, r0 - 8041c60: d802 bhi.n 8041c68 <_realloc_r+0x34> - 8041c62: ebb4 0f50 cmp.w r4, r0, lsr #1 - 8041c66: d812 bhi.n 8041c8e <_realloc_r+0x5a> - 8041c68: 4621 mov r1, r4 - 8041c6a: 4640 mov r0, r8 - 8041c6c: f7fe fedc bl 8040a28 <_malloc_r> - 8041c70: 4605 mov r5, r0 - 8041c72: 2800 cmp r0, #0 - 8041c74: d0ed beq.n 8041c52 <_realloc_r+0x1e> - 8041c76: 42bc cmp r4, r7 - 8041c78: 4622 mov r2, r4 - 8041c7a: 4631 mov r1, r6 - 8041c7c: bf28 it cs - 8041c7e: 463a movcs r2, r7 - 8041c80: f7fe fe36 bl 80408f0 - 8041c84: 4631 mov r1, r6 - 8041c86: 4640 mov r0, r8 - 8041c88: f7fe fe62 bl 8040950 <_free_r> - 8041c8c: e7e1 b.n 8041c52 <_realloc_r+0x1e> - 8041c8e: 4635 mov r5, r6 - 8041c90: e7df b.n 8041c52 <_realloc_r+0x1e> +08041c38 <__smakebuf_r>: + 8041c38: 898b ldrh r3, [r1, #12] + 8041c3a: b573 push {r0, r1, r4, r5, r6, lr} + 8041c3c: 079d lsls r5, r3, #30 + 8041c3e: 4606 mov r6, r0 + 8041c40: 460c mov r4, r1 + 8041c42: d507 bpl.n 8041c54 <__smakebuf_r+0x1c> + 8041c44: f104 0347 add.w r3, r4, #71 ; 0x47 + 8041c48: 6023 str r3, [r4, #0] + 8041c4a: 6123 str r3, [r4, #16] + 8041c4c: 2301 movs r3, #1 + 8041c4e: 6163 str r3, [r4, #20] + 8041c50: b002 add sp, #8 + 8041c52: bd70 pop {r4, r5, r6, pc} + 8041c54: ab01 add r3, sp, #4 + 8041c56: 466a mov r2, sp + 8041c58: f7ff ffc8 bl 8041bec <__swhatbuf_r> + 8041c5c: 9900 ldr r1, [sp, #0] + 8041c5e: 4605 mov r5, r0 + 8041c60: 4630 mov r0, r6 + 8041c62: f7fe ff23 bl 8040aac <_malloc_r> + 8041c66: b948 cbnz r0, 8041c7c <__smakebuf_r+0x44> + 8041c68: f9b4 300c ldrsh.w r3, [r4, #12] + 8041c6c: 059a lsls r2, r3, #22 + 8041c6e: d4ef bmi.n 8041c50 <__smakebuf_r+0x18> + 8041c70: f023 0303 bic.w r3, r3, #3 + 8041c74: f043 0302 orr.w r3, r3, #2 + 8041c78: 81a3 strh r3, [r4, #12] + 8041c7a: e7e3 b.n 8041c44 <__smakebuf_r+0xc> + 8041c7c: 4b0d ldr r3, [pc, #52] ; (8041cb4 <__smakebuf_r+0x7c>) + 8041c7e: 62b3 str r3, [r6, #40] ; 0x28 + 8041c80: 89a3 ldrh r3, [r4, #12] + 8041c82: 6020 str r0, [r4, #0] + 8041c84: f043 0380 orr.w r3, r3, #128 ; 0x80 + 8041c88: 81a3 strh r3, [r4, #12] + 8041c8a: 9b00 ldr r3, [sp, #0] + 8041c8c: 6163 str r3, [r4, #20] + 8041c8e: 9b01 ldr r3, [sp, #4] + 8041c90: 6120 str r0, [r4, #16] + 8041c92: b15b cbz r3, 8041cac <__smakebuf_r+0x74> + 8041c94: f9b4 100e ldrsh.w r1, [r4, #14] + 8041c98: 4630 mov r0, r6 + 8041c9a: f000 f8a5 bl 8041de8 <_isatty_r> + 8041c9e: b128 cbz r0, 8041cac <__smakebuf_r+0x74> + 8041ca0: 89a3 ldrh r3, [r4, #12] + 8041ca2: f023 0303 bic.w r3, r3, #3 + 8041ca6: f043 0301 orr.w r3, r3, #1 + 8041caa: 81a3 strh r3, [r4, #12] + 8041cac: 89a0 ldrh r0, [r4, #12] + 8041cae: 4305 orrs r5, r0 + 8041cb0: 81a5 strh r5, [r4, #12] + 8041cb2: e7cd b.n 8041c50 <__smakebuf_r+0x18> + 8041cb4: 08040d71 .word 0x08040d71 + +08041cb8 <_realloc_r>: + 8041cb8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8041cbc: 4680 mov r8, r0 + 8041cbe: 4614 mov r4, r2 + 8041cc0: 460e mov r6, r1 + 8041cc2: b921 cbnz r1, 8041cce <_realloc_r+0x16> + 8041cc4: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} + 8041cc8: 4611 mov r1, r2 + 8041cca: f7fe beef b.w 8040aac <_malloc_r> + 8041cce: b92a cbnz r2, 8041cdc <_realloc_r+0x24> + 8041cd0: f7fe fe80 bl 80409d4 <_free_r> + 8041cd4: 4625 mov r5, r4 + 8041cd6: 4628 mov r0, r5 + 8041cd8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8041cdc: f000 f894 bl 8041e08 <_malloc_usable_size_r> + 8041ce0: 4284 cmp r4, r0 + 8041ce2: 4607 mov r7, r0 + 8041ce4: d802 bhi.n 8041cec <_realloc_r+0x34> + 8041ce6: ebb4 0f50 cmp.w r4, r0, lsr #1 + 8041cea: d812 bhi.n 8041d12 <_realloc_r+0x5a> + 8041cec: 4621 mov r1, r4 + 8041cee: 4640 mov r0, r8 + 8041cf0: f7fe fedc bl 8040aac <_malloc_r> + 8041cf4: 4605 mov r5, r0 + 8041cf6: 2800 cmp r0, #0 + 8041cf8: d0ed beq.n 8041cd6 <_realloc_r+0x1e> + 8041cfa: 42bc cmp r4, r7 + 8041cfc: 4622 mov r2, r4 + 8041cfe: 4631 mov r1, r6 + 8041d00: bf28 it cs + 8041d02: 463a movcs r2, r7 + 8041d04: f7fe fe36 bl 8040974 + 8041d08: 4631 mov r1, r6 + 8041d0a: 4640 mov r0, r8 + 8041d0c: f7fe fe62 bl 80409d4 <_free_r> + 8041d10: e7e1 b.n 8041cd6 <_realloc_r+0x1e> + 8041d12: 4635 mov r5, r6 + 8041d14: e7df b.n 8041cd6 <_realloc_r+0x1e> ... -08041c94 <_read_r>: - 8041c94: b538 push {r3, r4, r5, lr} - 8041c96: 4d07 ldr r5, [pc, #28] ; (8041cb4 <_read_r+0x20>) - 8041c98: 4604 mov r4, r0 - 8041c9a: 4608 mov r0, r1 - 8041c9c: 4611 mov r1, r2 - 8041c9e: 2200 movs r2, #0 - 8041ca0: 602a str r2, [r5, #0] - 8041ca2: 461a mov r2, r3 - 8041ca4: f7e2 fd88 bl 80247b8 <_read> - 8041ca8: 1c43 adds r3, r0, #1 - 8041caa: d102 bne.n 8041cb2 <_read_r+0x1e> - 8041cac: 682b ldr r3, [r5, #0] - 8041cae: b103 cbz r3, 8041cb2 <_read_r+0x1e> - 8041cb0: 6023 str r3, [r4, #0] - 8041cb2: bd38 pop {r3, r4, r5, pc} - 8041cb4: 2400eabc .word 0x2400eabc - -08041cb8 <_raise_r>: - 8041cb8: 291f cmp r1, #31 - 8041cba: b538 push {r3, r4, r5, lr} - 8041cbc: 4604 mov r4, r0 - 8041cbe: 460d mov r5, r1 - 8041cc0: d904 bls.n 8041ccc <_raise_r+0x14> - 8041cc2: 2316 movs r3, #22 - 8041cc4: 6003 str r3, [r0, #0] - 8041cc6: f04f 30ff mov.w r0, #4294967295 - 8041cca: bd38 pop {r3, r4, r5, pc} - 8041ccc: 6c42 ldr r2, [r0, #68] ; 0x44 - 8041cce: b112 cbz r2, 8041cd6 <_raise_r+0x1e> - 8041cd0: f852 3021 ldr.w r3, [r2, r1, lsl #2] - 8041cd4: b94b cbnz r3, 8041cea <_raise_r+0x32> - 8041cd6: 4620 mov r0, r4 - 8041cd8: f000 f830 bl 8041d3c <_getpid_r> - 8041cdc: 462a mov r2, r5 - 8041cde: 4601 mov r1, r0 - 8041ce0: 4620 mov r0, r4 - 8041ce2: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} - 8041ce6: f000 b817 b.w 8041d18 <_kill_r> - 8041cea: 2b01 cmp r3, #1 - 8041cec: d00a beq.n 8041d04 <_raise_r+0x4c> - 8041cee: 1c59 adds r1, r3, #1 - 8041cf0: d103 bne.n 8041cfa <_raise_r+0x42> - 8041cf2: 2316 movs r3, #22 - 8041cf4: 6003 str r3, [r0, #0] - 8041cf6: 2001 movs r0, #1 - 8041cf8: e7e7 b.n 8041cca <_raise_r+0x12> - 8041cfa: 2400 movs r4, #0 - 8041cfc: f842 4025 str.w r4, [r2, r5, lsl #2] - 8041d00: 4628 mov r0, r5 - 8041d02: 4798 blx r3 - 8041d04: 2000 movs r0, #0 - 8041d06: e7e0 b.n 8041cca <_raise_r+0x12> - -08041d08 : - 8041d08: 4b02 ldr r3, [pc, #8] ; (8041d14 ) - 8041d0a: 4601 mov r1, r0 - 8041d0c: 6818 ldr r0, [r3, #0] - 8041d0e: f7ff bfd3 b.w 8041cb8 <_raise_r> - 8041d12: bf00 nop - 8041d14: 24000078 .word 0x24000078 - -08041d18 <_kill_r>: +08041d18 <_read_r>: 8041d18: b538 push {r3, r4, r5, lr} - 8041d1a: 4d07 ldr r5, [pc, #28] ; (8041d38 <_kill_r+0x20>) - 8041d1c: 2300 movs r3, #0 - 8041d1e: 4604 mov r4, r0 - 8041d20: 4608 mov r0, r1 - 8041d22: 4611 mov r1, r2 - 8041d24: 602b str r3, [r5, #0] - 8041d26: f7e2 fd2b bl 8024780 <_kill> - 8041d2a: 1c43 adds r3, r0, #1 - 8041d2c: d102 bne.n 8041d34 <_kill_r+0x1c> - 8041d2e: 682b ldr r3, [r5, #0] - 8041d30: b103 cbz r3, 8041d34 <_kill_r+0x1c> - 8041d32: 6023 str r3, [r4, #0] - 8041d34: bd38 pop {r3, r4, r5, pc} - 8041d36: bf00 nop - 8041d38: 2400eabc .word 0x2400eabc - -08041d3c <_getpid_r>: - 8041d3c: f7e2 bd18 b.w 8024770 <_getpid> - -08041d40 <_fstat_r>: - 8041d40: b538 push {r3, r4, r5, lr} - 8041d42: 4d07 ldr r5, [pc, #28] ; (8041d60 <_fstat_r+0x20>) - 8041d44: 2300 movs r3, #0 - 8041d46: 4604 mov r4, r0 - 8041d48: 4608 mov r0, r1 - 8041d4a: 4611 mov r1, r2 - 8041d4c: 602b str r3, [r5, #0] - 8041d4e: f7e2 fd78 bl 8024842 <_fstat> - 8041d52: 1c43 adds r3, r0, #1 - 8041d54: d102 bne.n 8041d5c <_fstat_r+0x1c> - 8041d56: 682b ldr r3, [r5, #0] - 8041d58: b103 cbz r3, 8041d5c <_fstat_r+0x1c> - 8041d5a: 6023 str r3, [r4, #0] - 8041d5c: bd38 pop {r3, r4, r5, pc} - 8041d5e: bf00 nop - 8041d60: 2400eabc .word 0x2400eabc - -08041d64 <_isatty_r>: - 8041d64: b538 push {r3, r4, r5, lr} - 8041d66: 4d06 ldr r5, [pc, #24] ; (8041d80 <_isatty_r+0x1c>) - 8041d68: 2300 movs r3, #0 - 8041d6a: 4604 mov r4, r0 - 8041d6c: 4608 mov r0, r1 - 8041d6e: 602b str r3, [r5, #0] - 8041d70: f7e2 fd77 bl 8024862 <_isatty> - 8041d74: 1c43 adds r3, r0, #1 - 8041d76: d102 bne.n 8041d7e <_isatty_r+0x1a> - 8041d78: 682b ldr r3, [r5, #0] - 8041d7a: b103 cbz r3, 8041d7e <_isatty_r+0x1a> - 8041d7c: 6023 str r3, [r4, #0] - 8041d7e: bd38 pop {r3, r4, r5, pc} - 8041d80: 2400eabc .word 0x2400eabc - -08041d84 <_malloc_usable_size_r>: - 8041d84: f851 3c04 ldr.w r3, [r1, #-4] - 8041d88: 1f18 subs r0, r3, #4 - 8041d8a: 2b00 cmp r3, #0 - 8041d8c: bfbc itt lt - 8041d8e: 580b ldrlt r3, [r1, r0] - 8041d90: 18c0 addlt r0, r0, r3 - 8041d92: 4770 bx lr - 8041d94: 0000 movs r0, r0 - ... - -08041d98 : - 8041d98: b470 push {r4, r5, r6} - 8041d9a: ee10 1a90 vmov r1, s1 - 8041d9e: ee10 2a10 vmov r2, s0 - 8041da2: f04f 34ff mov.w r4, #4294967295 - 8041da6: 4294 cmp r4, r2 - 8041da8: f101 4040 add.w r0, r1, #3221225472 ; 0xc0000000 - 8041dac: 4c72 ldr r4, [pc, #456] ; (8041f78 ) - 8041dae: f500 1090 add.w r0, r0, #1179648 ; 0x120000 - 8041db2: eb74 0000 sbcs.w r0, r4, r0 - 8041db6: ed2d 8b02 vpush {d8} - 8041dba: ea4f 4311 mov.w r3, r1, lsr #16 - 8041dbe: d35c bcc.n 8041e7a - 8041dc0: 4b6e ldr r3, [pc, #440] ; (8041f7c ) - 8041dc2: 4299 cmp r1, r3 - 8041dc4: bf08 it eq - 8041dc6: 2a00 cmpeq r2, #0 - 8041dc8: f000 80c6 beq.w 8041f58 - 8041dcc: eeb7 7b00 vmov.f64 d7, #112 ; 0x3f800000 1.0 - 8041dd0: ee30 0b47 vsub.f64 d0, d0, d7 - 8041dd4: 4b6a ldr r3, [pc, #424] ; (8041f80 ) - 8041dd6: ee20 2b00 vmul.f64 d2, d0, d0 - 8041dda: ed93 6b12 vldr d6, [r3, #72] ; 0x48 - 8041dde: ee20 4b02 vmul.f64 d4, d0, d2 - 8041de2: ed93 7b10 vldr d7, [r3, #64] ; 0x40 - 8041de6: eea6 7b00 vfma.f64 d7, d6, d0 - 8041dea: ed93 6b14 vldr d6, [r3, #80] ; 0x50 - 8041dee: ed93 5b18 vldr d5, [r3, #96] ; 0x60 - 8041df2: eea6 7b02 vfma.f64 d7, d6, d2 - 8041df6: ed93 6b16 vldr d6, [r3, #88] ; 0x58 - 8041dfa: eea5 6b00 vfma.f64 d6, d5, d0 - 8041dfe: ed93 5b1a vldr d5, [r3, #104] ; 0x68 - 8041e02: ed93 3b1e vldr d3, [r3, #120] ; 0x78 - 8041e06: eea5 6b02 vfma.f64 d6, d5, d2 - 8041e0a: ed93 5b1c vldr d5, [r3, #112] ; 0x70 - 8041e0e: eea3 5b00 vfma.f64 d5, d3, d0 - 8041e12: ed93 3b20 vldr d3, [r3, #128] ; 0x80 - 8041e16: eea3 5b02 vfma.f64 d5, d3, d2 - 8041e1a: ed93 3b22 vldr d3, [r3, #136] ; 0x88 - 8041e1e: eeb0 2b40 vmov.f64 d2, d0 - 8041e22: eea3 5b04 vfma.f64 d5, d3, d4 - 8041e26: ed93 3b0e vldr d3, [r3, #56] ; 0x38 - 8041e2a: eea5 6b04 vfma.f64 d6, d5, d4 - 8041e2e: eea6 7b04 vfma.f64 d7, d6, d4 - 8041e32: ed9f 6b4b vldr d6, [pc, #300] ; 8041f60 - 8041e36: eeb0 1b47 vmov.f64 d1, d7 - 8041e3a: eeb0 5b40 vmov.f64 d5, d0 - 8041e3e: eea0 5b06 vfma.f64 d5, d0, d6 - 8041e42: eea0 5b46 vfms.f64 d5, d0, d6 - 8041e46: ee30 8b45 vsub.f64 d8, d0, d5 - 8041e4a: ee25 7b05 vmul.f64 d7, d5, d5 - 8041e4e: ee30 5b05 vadd.f64 d5, d0, d5 - 8041e52: eea7 2b03 vfma.f64 d2, d7, d3 - 8041e56: ee30 6b42 vsub.f64 d6, d0, d2 - 8041e5a: eea7 6b03 vfma.f64 d6, d7, d3 - 8041e5e: ee23 3b08 vmul.f64 d3, d3, d8 - 8041e62: eea3 6b05 vfma.f64 d6, d3, d5 - 8041e66: eeb0 0b46 vmov.f64 d0, d6 - 8041e6a: eea1 0b04 vfma.f64 d0, d1, d4 - 8041e6e: ee32 0b00 vadd.f64 d0, d2, d0 - 8041e72: ecbd 8b02 vpop {d8} - 8041e76: bc70 pop {r4, r5, r6} - 8041e78: 4770 bx lr - 8041e7a: f1a3 0410 sub.w r4, r3, #16 - 8041e7e: f647 70df movw r0, #32735 ; 0x7fdf - 8041e82: 4284 cmp r4, r0 - 8041e84: d923 bls.n 8041ece - 8041e86: 1894 adds r4, r2, r2 - 8041e88: eb41 0001 adc.w r0, r1, r1 - 8041e8c: 4320 orrs r0, r4 - 8041e8e: d105 bne.n 8041e9c - 8041e90: ecbd 8b02 vpop {d8} - 8041e94: 2001 movs r0, #1 - 8041e96: bc70 pop {r4, r5, r6} - 8041e98: f000 b882 b.w 8041fa0 <__math_divzero> - 8041e9c: 4839 ldr r0, [pc, #228] ; (8041f84 ) - 8041e9e: 4281 cmp r1, r0 - 8041ea0: bf08 it eq - 8041ea2: 2a00 cmpeq r2, #0 - 8041ea4: d0e5 beq.n 8041e72 - 8041ea6: 041a lsls r2, r3, #16 - 8041ea8: d404 bmi.n 8041eb4 - 8041eaa: f647 72f0 movw r2, #32752 ; 0x7ff0 - 8041eae: ea32 0303 bics.w r3, r2, r3 - 8041eb2: d104 bne.n 8041ebe - 8041eb4: ecbd 8b02 vpop {d8} - 8041eb8: bc70 pop {r4, r5, r6} - 8041eba: f000 b889 b.w 8041fd0 <__math_invalid> - 8041ebe: ed9f 7b2a vldr d7, [pc, #168] ; 8041f68 - 8041ec2: ee20 7b07 vmul.f64 d7, d0, d7 - 8041ec6: ec53 2b17 vmov r2, r3, d7 - 8041eca: f1a3 7150 sub.w r1, r3, #54525952 ; 0x3400000 - 8041ece: f101 4340 add.w r3, r1, #3221225472 ; 0xc0000000 - 8041ed2: f503 13d0 add.w r3, r3, #1703936 ; 0x1a0000 - 8041ed6: 0d1e lsrs r6, r3, #20 - 8041ed8: 1e14 subs r4, r2, #0 - 8041eda: 4a29 ldr r2, [pc, #164] ; (8041f80 ) - 8041edc: eebf 5b00 vmov.f64 d5, #240 ; 0xbf800000 -1.0 - 8041ee0: f3c3 3046 ubfx r0, r3, #13, #7 - 8041ee4: 0536 lsls r6, r6, #20 - 8041ee6: 1b8d subs r5, r1, r6 - 8041ee8: eb02 1100 add.w r1, r2, r0, lsl #4 - 8041eec: ed91 7b24 vldr d7, [r1, #144] ; 0x90 - 8041ef0: ec45 4b16 vmov d6, r4, r5 - 8041ef4: 151b asrs r3, r3, #20 - 8041ef6: eea6 5b07 vfma.f64 d5, d6, d7 - 8041efa: ee07 3a90 vmov s15, r3 - 8041efe: ee25 2b05 vmul.f64 d2, d5, d5 - 8041f02: eeb8 6be7 vcvt.f64.s32 d6, s15 - 8041f06: ed92 4b00 vldr d4, [r2] - 8041f0a: ee25 1b02 vmul.f64 d1, d5, d2 - 8041f0e: ed91 7b26 vldr d7, [r1, #152] ; 0x98 - 8041f12: eea4 7b06 vfma.f64 d7, d4, d6 - 8041f16: ee35 4b07 vadd.f64 d4, d5, d7 - 8041f1a: ee37 0b44 vsub.f64 d0, d7, d4 - 8041f1e: ed92 7b02 vldr d7, [r2, #8] - 8041f22: ee30 0b05 vadd.f64 d0, d0, d5 - 8041f26: eea7 0b06 vfma.f64 d0, d7, d6 - 8041f2a: ed92 7b04 vldr d7, [r2, #16] - 8041f2e: ed92 6b08 vldr d6, [r2, #32] - 8041f32: eea7 0b02 vfma.f64 d0, d7, d2 - 8041f36: ed92 7b06 vldr d7, [r2, #24] - 8041f3a: ed92 3b0c vldr d3, [r2, #48] ; 0x30 - 8041f3e: eea6 7b05 vfma.f64 d7, d6, d5 - 8041f42: ed92 6b0a vldr d6, [r2, #40] ; 0x28 - 8041f46: eea3 6b05 vfma.f64 d6, d3, d5 - 8041f4a: eea6 7b02 vfma.f64 d7, d6, d2 - 8041f4e: eea1 0b07 vfma.f64 d0, d1, d7 - 8041f52: ee30 0b04 vadd.f64 d0, d0, d4 - 8041f56: e78c b.n 8041e72 - 8041f58: ed9f 0b05 vldr d0, [pc, #20] ; 8041f70 - 8041f5c: e789 b.n 8041e72 - 8041f5e: bf00 nop - 8041f60: 00000000 .word 0x00000000 - 8041f64: 41a00000 .word 0x41a00000 - 8041f68: 00000000 .word 0x00000000 - 8041f6c: 43300000 .word 0x43300000 + 8041d1a: 4d07 ldr r5, [pc, #28] ; (8041d38 <_read_r+0x20>) + 8041d1c: 4604 mov r4, r0 + 8041d1e: 4608 mov r0, r1 + 8041d20: 4611 mov r1, r2 + 8041d22: 2200 movs r2, #0 + 8041d24: 602a str r2, [r5, #0] + 8041d26: 461a mov r2, r3 + 8041d28: f7e2 fd88 bl 802483c <_read> + 8041d2c: 1c43 adds r3, r0, #1 + 8041d2e: d102 bne.n 8041d36 <_read_r+0x1e> + 8041d30: 682b ldr r3, [r5, #0] + 8041d32: b103 cbz r3, 8041d36 <_read_r+0x1e> + 8041d34: 6023 str r3, [r4, #0] + 8041d36: bd38 pop {r3, r4, r5, pc} + 8041d38: 2400eac4 .word 0x2400eac4 + +08041d3c <_raise_r>: + 8041d3c: 291f cmp r1, #31 + 8041d3e: b538 push {r3, r4, r5, lr} + 8041d40: 4604 mov r4, r0 + 8041d42: 460d mov r5, r1 + 8041d44: d904 bls.n 8041d50 <_raise_r+0x14> + 8041d46: 2316 movs r3, #22 + 8041d48: 6003 str r3, [r0, #0] + 8041d4a: f04f 30ff mov.w r0, #4294967295 + 8041d4e: bd38 pop {r3, r4, r5, pc} + 8041d50: 6c42 ldr r2, [r0, #68] ; 0x44 + 8041d52: b112 cbz r2, 8041d5a <_raise_r+0x1e> + 8041d54: f852 3021 ldr.w r3, [r2, r1, lsl #2] + 8041d58: b94b cbnz r3, 8041d6e <_raise_r+0x32> + 8041d5a: 4620 mov r0, r4 + 8041d5c: f000 f830 bl 8041dc0 <_getpid_r> + 8041d60: 462a mov r2, r5 + 8041d62: 4601 mov r1, r0 + 8041d64: 4620 mov r0, r4 + 8041d66: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} + 8041d6a: f000 b817 b.w 8041d9c <_kill_r> + 8041d6e: 2b01 cmp r3, #1 + 8041d70: d00a beq.n 8041d88 <_raise_r+0x4c> + 8041d72: 1c59 adds r1, r3, #1 + 8041d74: d103 bne.n 8041d7e <_raise_r+0x42> + 8041d76: 2316 movs r3, #22 + 8041d78: 6003 str r3, [r0, #0] + 8041d7a: 2001 movs r0, #1 + 8041d7c: e7e7 b.n 8041d4e <_raise_r+0x12> + 8041d7e: 2400 movs r4, #0 + 8041d80: f842 4025 str.w r4, [r2, r5, lsl #2] + 8041d84: 4628 mov r0, r5 + 8041d86: 4798 blx r3 + 8041d88: 2000 movs r0, #0 + 8041d8a: e7e0 b.n 8041d4e <_raise_r+0x12> + +08041d8c : + 8041d8c: 4b02 ldr r3, [pc, #8] ; (8041d98 ) + 8041d8e: 4601 mov r1, r0 + 8041d90: 6818 ldr r0, [r3, #0] + 8041d92: f7ff bfd3 b.w 8041d3c <_raise_r> + 8041d96: bf00 nop + 8041d98: 24000078 .word 0x24000078 + +08041d9c <_kill_r>: + 8041d9c: b538 push {r3, r4, r5, lr} + 8041d9e: 4d07 ldr r5, [pc, #28] ; (8041dbc <_kill_r+0x20>) + 8041da0: 2300 movs r3, #0 + 8041da2: 4604 mov r4, r0 + 8041da4: 4608 mov r0, r1 + 8041da6: 4611 mov r1, r2 + 8041da8: 602b str r3, [r5, #0] + 8041daa: f7e2 fd2b bl 8024804 <_kill> + 8041dae: 1c43 adds r3, r0, #1 + 8041db0: d102 bne.n 8041db8 <_kill_r+0x1c> + 8041db2: 682b ldr r3, [r5, #0] + 8041db4: b103 cbz r3, 8041db8 <_kill_r+0x1c> + 8041db6: 6023 str r3, [r4, #0] + 8041db8: bd38 pop {r3, r4, r5, pc} + 8041dba: bf00 nop + 8041dbc: 2400eac4 .word 0x2400eac4 + +08041dc0 <_getpid_r>: + 8041dc0: f7e2 bd18 b.w 80247f4 <_getpid> + +08041dc4 <_fstat_r>: + 8041dc4: b538 push {r3, r4, r5, lr} + 8041dc6: 4d07 ldr r5, [pc, #28] ; (8041de4 <_fstat_r+0x20>) + 8041dc8: 2300 movs r3, #0 + 8041dca: 4604 mov r4, r0 + 8041dcc: 4608 mov r0, r1 + 8041dce: 4611 mov r1, r2 + 8041dd0: 602b str r3, [r5, #0] + 8041dd2: f7e2 fd78 bl 80248c6 <_fstat> + 8041dd6: 1c43 adds r3, r0, #1 + 8041dd8: d102 bne.n 8041de0 <_fstat_r+0x1c> + 8041dda: 682b ldr r3, [r5, #0] + 8041ddc: b103 cbz r3, 8041de0 <_fstat_r+0x1c> + 8041dde: 6023 str r3, [r4, #0] + 8041de0: bd38 pop {r3, r4, r5, pc} + 8041de2: bf00 nop + 8041de4: 2400eac4 .word 0x2400eac4 + +08041de8 <_isatty_r>: + 8041de8: b538 push {r3, r4, r5, lr} + 8041dea: 4d06 ldr r5, [pc, #24] ; (8041e04 <_isatty_r+0x1c>) + 8041dec: 2300 movs r3, #0 + 8041dee: 4604 mov r4, r0 + 8041df0: 4608 mov r0, r1 + 8041df2: 602b str r3, [r5, #0] + 8041df4: f7e2 fd77 bl 80248e6 <_isatty> + 8041df8: 1c43 adds r3, r0, #1 + 8041dfa: d102 bne.n 8041e02 <_isatty_r+0x1a> + 8041dfc: 682b ldr r3, [r5, #0] + 8041dfe: b103 cbz r3, 8041e02 <_isatty_r+0x1a> + 8041e00: 6023 str r3, [r4, #0] + 8041e02: bd38 pop {r3, r4, r5, pc} + 8041e04: 2400eac4 .word 0x2400eac4 + +08041e08 <_malloc_usable_size_r>: + 8041e08: f851 3c04 ldr.w r3, [r1, #-4] + 8041e0c: 1f18 subs r0, r3, #4 + 8041e0e: 2b00 cmp r3, #0 + 8041e10: bfbc itt lt + 8041e12: 580b ldrlt r3, [r1, r0] + 8041e14: 18c0 addlt r0, r0, r3 + 8041e16: 4770 bx lr + +08041e18 : + 8041e18: b470 push {r4, r5, r6} + 8041e1a: ee10 1a90 vmov r1, s1 + 8041e1e: ee10 2a10 vmov r2, s0 + 8041e22: f04f 34ff mov.w r4, #4294967295 + 8041e26: 4294 cmp r4, r2 + 8041e28: f101 4040 add.w r0, r1, #3221225472 ; 0xc0000000 + 8041e2c: 4c72 ldr r4, [pc, #456] ; (8041ff8 ) + 8041e2e: f500 1090 add.w r0, r0, #1179648 ; 0x120000 + 8041e32: eb74 0000 sbcs.w r0, r4, r0 + 8041e36: ed2d 8b02 vpush {d8} + 8041e3a: ea4f 4311 mov.w r3, r1, lsr #16 + 8041e3e: d35c bcc.n 8041efa + 8041e40: 4b6e ldr r3, [pc, #440] ; (8041ffc ) + 8041e42: 4299 cmp r1, r3 + 8041e44: bf08 it eq + 8041e46: 2a00 cmpeq r2, #0 + 8041e48: f000 80c6 beq.w 8041fd8 + 8041e4c: eeb7 7b00 vmov.f64 d7, #112 ; 0x3f800000 1.0 + 8041e50: ee30 0b47 vsub.f64 d0, d0, d7 + 8041e54: 4b6a ldr r3, [pc, #424] ; (8042000 ) + 8041e56: ee20 2b00 vmul.f64 d2, d0, d0 + 8041e5a: ed93 6b12 vldr d6, [r3, #72] ; 0x48 + 8041e5e: ee20 4b02 vmul.f64 d4, d0, d2 + 8041e62: ed93 7b10 vldr d7, [r3, #64] ; 0x40 + 8041e66: eea6 7b00 vfma.f64 d7, d6, d0 + 8041e6a: ed93 6b14 vldr d6, [r3, #80] ; 0x50 + 8041e6e: ed93 5b18 vldr d5, [r3, #96] ; 0x60 + 8041e72: eea6 7b02 vfma.f64 d7, d6, d2 + 8041e76: ed93 6b16 vldr d6, [r3, #88] ; 0x58 + 8041e7a: eea5 6b00 vfma.f64 d6, d5, d0 + 8041e7e: ed93 5b1a vldr d5, [r3, #104] ; 0x68 + 8041e82: ed93 3b1e vldr d3, [r3, #120] ; 0x78 + 8041e86: eea5 6b02 vfma.f64 d6, d5, d2 + 8041e8a: ed93 5b1c vldr d5, [r3, #112] ; 0x70 + 8041e8e: eea3 5b00 vfma.f64 d5, d3, d0 + 8041e92: ed93 3b20 vldr d3, [r3, #128] ; 0x80 + 8041e96: eea3 5b02 vfma.f64 d5, d3, d2 + 8041e9a: ed93 3b22 vldr d3, [r3, #136] ; 0x88 + 8041e9e: eeb0 2b40 vmov.f64 d2, d0 + 8041ea2: eea3 5b04 vfma.f64 d5, d3, d4 + 8041ea6: ed93 3b0e vldr d3, [r3, #56] ; 0x38 + 8041eaa: eea5 6b04 vfma.f64 d6, d5, d4 + 8041eae: eea6 7b04 vfma.f64 d7, d6, d4 + 8041eb2: ed9f 6b4b vldr d6, [pc, #300] ; 8041fe0 + 8041eb6: eeb0 1b47 vmov.f64 d1, d7 + 8041eba: eeb0 5b40 vmov.f64 d5, d0 + 8041ebe: eea0 5b06 vfma.f64 d5, d0, d6 + 8041ec2: eea0 5b46 vfms.f64 d5, d0, d6 + 8041ec6: ee30 8b45 vsub.f64 d8, d0, d5 + 8041eca: ee25 7b05 vmul.f64 d7, d5, d5 + 8041ece: ee30 5b05 vadd.f64 d5, d0, d5 + 8041ed2: eea7 2b03 vfma.f64 d2, d7, d3 + 8041ed6: ee30 6b42 vsub.f64 d6, d0, d2 + 8041eda: eea7 6b03 vfma.f64 d6, d7, d3 + 8041ede: ee23 3b08 vmul.f64 d3, d3, d8 + 8041ee2: eea3 6b05 vfma.f64 d6, d3, d5 + 8041ee6: eeb0 0b46 vmov.f64 d0, d6 + 8041eea: eea1 0b04 vfma.f64 d0, d1, d4 + 8041eee: ee32 0b00 vadd.f64 d0, d2, d0 + 8041ef2: ecbd 8b02 vpop {d8} + 8041ef6: bc70 pop {r4, r5, r6} + 8041ef8: 4770 bx lr + 8041efa: f1a3 0410 sub.w r4, r3, #16 + 8041efe: f647 70df movw r0, #32735 ; 0x7fdf + 8041f02: 4284 cmp r4, r0 + 8041f04: d923 bls.n 8041f4e + 8041f06: 1894 adds r4, r2, r2 + 8041f08: eb41 0001 adc.w r0, r1, r1 + 8041f0c: 4320 orrs r0, r4 + 8041f0e: d105 bne.n 8041f1c + 8041f10: ecbd 8b02 vpop {d8} + 8041f14: 2001 movs r0, #1 + 8041f16: bc70 pop {r4, r5, r6} + 8041f18: f000 b882 b.w 8042020 <__math_divzero> + 8041f1c: 4839 ldr r0, [pc, #228] ; (8042004 ) + 8041f1e: 4281 cmp r1, r0 + 8041f20: bf08 it eq + 8041f22: 2a00 cmpeq r2, #0 + 8041f24: d0e5 beq.n 8041ef2 + 8041f26: 041a lsls r2, r3, #16 + 8041f28: d404 bmi.n 8041f34 + 8041f2a: f647 72f0 movw r2, #32752 ; 0x7ff0 + 8041f2e: ea32 0303 bics.w r3, r2, r3 + 8041f32: d104 bne.n 8041f3e + 8041f34: ecbd 8b02 vpop {d8} + 8041f38: bc70 pop {r4, r5, r6} + 8041f3a: f000 b889 b.w 8042050 <__math_invalid> + 8041f3e: ed9f 7b2a vldr d7, [pc, #168] ; 8041fe8 + 8041f42: ee20 7b07 vmul.f64 d7, d0, d7 + 8041f46: ec53 2b17 vmov r2, r3, d7 + 8041f4a: f1a3 7150 sub.w r1, r3, #54525952 ; 0x3400000 + 8041f4e: f101 4340 add.w r3, r1, #3221225472 ; 0xc0000000 + 8041f52: f503 13d0 add.w r3, r3, #1703936 ; 0x1a0000 + 8041f56: 0d1e lsrs r6, r3, #20 + 8041f58: 1e14 subs r4, r2, #0 + 8041f5a: 4a29 ldr r2, [pc, #164] ; (8042000 ) + 8041f5c: eebf 5b00 vmov.f64 d5, #240 ; 0xbf800000 -1.0 + 8041f60: f3c3 3046 ubfx r0, r3, #13, #7 + 8041f64: 0536 lsls r6, r6, #20 + 8041f66: 1b8d subs r5, r1, r6 + 8041f68: eb02 1100 add.w r1, r2, r0, lsl #4 + 8041f6c: ed91 7b24 vldr d7, [r1, #144] ; 0x90 + 8041f70: ec45 4b16 vmov d6, r4, r5 + 8041f74: 151b asrs r3, r3, #20 + 8041f76: eea6 5b07 vfma.f64 d5, d6, d7 + 8041f7a: ee07 3a90 vmov s15, r3 + 8041f7e: ee25 2b05 vmul.f64 d2, d5, d5 + 8041f82: eeb8 6be7 vcvt.f64.s32 d6, s15 + 8041f86: ed92 4b00 vldr d4, [r2] + 8041f8a: ee25 1b02 vmul.f64 d1, d5, d2 + 8041f8e: ed91 7b26 vldr d7, [r1, #152] ; 0x98 + 8041f92: eea4 7b06 vfma.f64 d7, d4, d6 + 8041f96: ee35 4b07 vadd.f64 d4, d5, d7 + 8041f9a: ee37 0b44 vsub.f64 d0, d7, d4 + 8041f9e: ed92 7b02 vldr d7, [r2, #8] + 8041fa2: ee30 0b05 vadd.f64 d0, d0, d5 + 8041fa6: eea7 0b06 vfma.f64 d0, d7, d6 + 8041faa: ed92 7b04 vldr d7, [r2, #16] + 8041fae: ed92 6b08 vldr d6, [r2, #32] + 8041fb2: eea7 0b02 vfma.f64 d0, d7, d2 + 8041fb6: ed92 7b06 vldr d7, [r2, #24] + 8041fba: ed92 3b0c vldr d3, [r2, #48] ; 0x30 + 8041fbe: eea6 7b05 vfma.f64 d7, d6, d5 + 8041fc2: ed92 6b0a vldr d6, [r2, #40] ; 0x28 + 8041fc6: eea3 6b05 vfma.f64 d6, d3, d5 + 8041fca: eea6 7b02 vfma.f64 d7, d6, d2 + 8041fce: eea1 0b07 vfma.f64 d0, d1, d7 + 8041fd2: ee30 0b04 vadd.f64 d0, d0, d4 + 8041fd6: e78c b.n 8041ef2 + 8041fd8: ed9f 0b05 vldr d0, [pc, #20] ; 8041ff0 + 8041fdc: e789 b.n 8041ef2 + 8041fde: bf00 nop + 8041fe0: 00000000 .word 0x00000000 + 8041fe4: 41a00000 .word 0x41a00000 + 8041fe8: 00000000 .word 0x00000000 + 8041fec: 43300000 .word 0x43300000 ... - 8041f78: 000308ff .word 0x000308ff - 8041f7c: 3ff00000 .word 0x3ff00000 - 8041f80: 08044f60 .word 0x08044f60 - 8041f84: 7ff00000 .word 0x7ff00000 - -08041f88 : - 8041f88: b513 push {r0, r1, r4, lr} - 8041f8a: 4604 mov r4, r0 - 8041f8c: ed8d 0b00 vstr d0, [sp] - 8041f90: f7fe fe82 bl 8040c98 <__errno> - 8041f94: ed9d 0b00 vldr d0, [sp] - 8041f98: 6004 str r4, [r0, #0] - 8041f9a: b002 add sp, #8 - 8041f9c: bd10 pop {r4, pc} + 8041ff8: 000308ff .word 0x000308ff + 8041ffc: 3ff00000 .word 0x3ff00000 + 8042000: 08044fe0 .word 0x08044fe0 + 8042004: 7ff00000 .word 0x7ff00000 + +08042008 : + 8042008: b513 push {r0, r1, r4, lr} + 804200a: 4604 mov r4, r0 + 804200c: ed8d 0b00 vstr d0, [sp] + 8042010: f7fe fe84 bl 8040d1c <__errno> + 8042014: ed9d 0b00 vldr d0, [sp] + 8042018: 6004 str r4, [r0, #0] + 804201a: b002 add sp, #8 + 804201c: bd10 pop {r4, pc} ... -08041fa0 <__math_divzero>: - 8041fa0: b082 sub sp, #8 - 8041fa2: 2800 cmp r0, #0 - 8041fa4: eeb7 6b00 vmov.f64 d6, #112 ; 0x3f800000 1.0 - 8041fa8: eebf 7b00 vmov.f64 d7, #240 ; 0xbf800000 -1.0 - 8041fac: fe06 7b07 vseleq.f64 d7, d6, d7 - 8041fb0: ed8d 7b00 vstr d7, [sp] - 8041fb4: ed9d 0b00 vldr d0, [sp] - 8041fb8: ed9f 7b03 vldr d7, [pc, #12] ; 8041fc8 <__math_divzero+0x28> - 8041fbc: 2022 movs r0, #34 ; 0x22 - 8041fbe: ee80 0b07 vdiv.f64 d0, d0, d7 - 8041fc2: b002 add sp, #8 - 8041fc4: f7ff bfe0 b.w 8041f88 +08042020 <__math_divzero>: + 8042020: b082 sub sp, #8 + 8042022: 2800 cmp r0, #0 + 8042024: eeb7 6b00 vmov.f64 d6, #112 ; 0x3f800000 1.0 + 8042028: eebf 7b00 vmov.f64 d7, #240 ; 0xbf800000 -1.0 + 804202c: fe06 7b07 vseleq.f64 d7, d6, d7 + 8042030: ed8d 7b00 vstr d7, [sp] + 8042034: ed9d 0b00 vldr d0, [sp] + 8042038: ed9f 7b03 vldr d7, [pc, #12] ; 8042048 <__math_divzero+0x28> + 804203c: 2022 movs r0, #34 ; 0x22 + 804203e: ee80 0b07 vdiv.f64 d0, d0, d7 + 8042042: b002 add sp, #8 + 8042044: f7ff bfe0 b.w 8042008 ... -08041fd0 <__math_invalid>: - 8041fd0: eeb0 7b40 vmov.f64 d7, d0 - 8041fd4: eeb4 7b47 vcmp.f64 d7, d7 - 8041fd8: eef1 fa10 vmrs APSR_nzcv, fpscr - 8041fdc: ee30 6b40 vsub.f64 d6, d0, d0 - 8041fe0: ee86 0b06 vdiv.f64 d0, d6, d6 - 8041fe4: d602 bvs.n 8041fec <__math_invalid+0x1c> - 8041fe6: 2021 movs r0, #33 ; 0x21 - 8041fe8: f7ff bfce b.w 8041f88 - 8041fec: 4770 bx lr +08042050 <__math_invalid>: + 8042050: eeb0 7b40 vmov.f64 d7, d0 + 8042054: eeb4 7b47 vcmp.f64 d7, d7 + 8042058: eef1 fa10 vmrs APSR_nzcv, fpscr + 804205c: ee30 6b40 vsub.f64 d6, d0, d0 + 8042060: ee86 0b06 vdiv.f64 d0, d6, d6 + 8042064: d602 bvs.n 804206c <__math_invalid+0x1c> + 8042066: 2021 movs r0, #33 ; 0x21 + 8042068: f7ff bfce b.w 8042008 + 804206c: 4770 bx lr ... -08041ff0 <_init>: - 8041ff0: b5f8 push {r3, r4, r5, r6, r7, lr} - 8041ff2: bf00 nop - 8041ff4: bcf8 pop {r3, r4, r5, r6, r7} - 8041ff6: bc08 pop {r3} - 8041ff8: 469e mov lr, r3 - 8041ffa: 4770 bx lr - -08041ffc <_fini>: - 8041ffc: b5f8 push {r3, r4, r5, r6, r7, lr} - 8041ffe: bf00 nop - 8042000: bcf8 pop {r3, r4, r5, r6, r7} - 8042002: bc08 pop {r3} - 8042004: 469e mov lr, r3 - 8042006: 4770 bx lr +08042070 <_init>: + 8042070: b5f8 push {r3, r4, r5, r6, r7, lr} + 8042072: bf00 nop + 8042074: bcf8 pop {r3, r4, r5, r6, r7} + 8042076: bc08 pop {r3} + 8042078: 469e mov lr, r3 + 804207a: 4770 bx lr + +0804207c <_fini>: + 804207c: b5f8 push {r3, r4, r5, r6, r7, lr} + 804207e: bf00 nop + 8042080: bcf8 pop {r3, r4, r5, r6, r7} + 8042082: bc08 pop {r3} + 8042084: 469e mov lr, r3 + 8042086: 4770 bx lr diff --git a/Debug/EchoNewBB0825.map b/Debug/EchoNewBB0825.map index 44e1630..64efeb9 100644 --- a/Debug/EchoNewBB0825.map +++ b/Debug/EchoNewBB0825.map @@ -37198,7 +37198,7 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext 0x0000000008020000 g_pfnVectors 0x0000000008020298 . = ALIGN (0x4) -.text 0x00000000080202a0 0x21d68 +.text 0x00000000080202a0 0x21de8 0x00000000080202a0 . = ALIGN (0x4) *(.text) .text 0x00000000080202a0 0x40 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o @@ -37511,1839 +37511,1844 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .text.HAL_I2C_MspInit 0x0000000008023bb0 0xec ./Core/Src/i2c.o 0x0000000008023bb0 HAL_I2C_MspInit - .text.main 0x0000000008023c9c 0x4a0 ./Core/Src/main.o - 0x0000000008023c9c main + .text.Actuator_Start + 0x0000000008023c9c 0x30 ./Core/Src/main.o + 0x0000000008023c9c Actuator_Start + .text.Actuator_Task + 0x0000000008023ccc 0xac ./Core/Src/main.o + 0x0000000008023ccc Actuator_Task + .text.main 0x0000000008023d78 0x448 ./Core/Src/main.o + 0x0000000008023d78 main .text.SystemClock_Config - 0x000000000802413c 0x108 ./Core/Src/main.o - 0x000000000802413c SystemClock_Config + 0x00000000080241c0 0x108 ./Core/Src/main.o + 0x00000000080241c0 SystemClock_Config .text.CV_GV_Init - 0x0000000008024244 0x4c ./Core/Src/main.o - 0x0000000008024244 CV_GV_Init + 0x00000000080242c8 0x4c ./Core/Src/main.o + 0x00000000080242c8 CV_GV_Init .text.MPU_Config - 0x0000000008024290 0x9c ./Core/Src/main.o + 0x0000000008024314 0x9c ./Core/Src/main.o .text.Error_Handler - 0x000000000802432c 0xa ./Core/Src/main.o - 0x000000000802432c Error_Handler - *fill* 0x0000000008024336 0x2 + 0x00000000080243b0 0xa ./Core/Src/main.o + 0x00000000080243b0 Error_Handler + *fill* 0x00000000080243ba 0x2 .text.MX_QUADSPI_Init - 0x0000000008024338 0x58 ./Core/Src/quadspi.o - 0x0000000008024338 MX_QUADSPI_Init + 0x00000000080243bc 0x58 ./Core/Src/quadspi.o + 0x00000000080243bc MX_QUADSPI_Init .text.HAL_QSPI_MspInit - 0x0000000008024390 0x178 ./Core/Src/quadspi.o - 0x0000000008024390 HAL_QSPI_MspInit + 0x0000000008024414 0x178 ./Core/Src/quadspi.o + 0x0000000008024414 HAL_QSPI_MspInit .text.HAL_MspInit - 0x0000000008024508 0x34 ./Core/Src/stm32h7xx_hal_msp.o - 0x0000000008024508 HAL_MspInit + 0x000000000802458c 0x34 ./Core/Src/stm32h7xx_hal_msp.o + 0x000000000802458c HAL_MspInit .text.NMI_Handler - 0x000000000802453c 0x6 ./Core/Src/stm32h7xx_it.o - 0x000000000802453c NMI_Handler + 0x00000000080245c0 0x6 ./Core/Src/stm32h7xx_it.o + 0x00000000080245c0 NMI_Handler .text.HardFault_Handler - 0x0000000008024542 0x6 ./Core/Src/stm32h7xx_it.o - 0x0000000008024542 HardFault_Handler + 0x00000000080245c6 0x6 ./Core/Src/stm32h7xx_it.o + 0x00000000080245c6 HardFault_Handler .text.MemManage_Handler - 0x0000000008024548 0x6 ./Core/Src/stm32h7xx_it.o - 0x0000000008024548 MemManage_Handler + 0x00000000080245cc 0x6 ./Core/Src/stm32h7xx_it.o + 0x00000000080245cc MemManage_Handler .text.BusFault_Handler - 0x000000000802454e 0x6 ./Core/Src/stm32h7xx_it.o - 0x000000000802454e BusFault_Handler + 0x00000000080245d2 0x6 ./Core/Src/stm32h7xx_it.o + 0x00000000080245d2 BusFault_Handler .text.UsageFault_Handler - 0x0000000008024554 0x6 ./Core/Src/stm32h7xx_it.o - 0x0000000008024554 UsageFault_Handler + 0x00000000080245d8 0x6 ./Core/Src/stm32h7xx_it.o + 0x00000000080245d8 UsageFault_Handler .text.SVC_Handler - 0x000000000802455a 0xe ./Core/Src/stm32h7xx_it.o - 0x000000000802455a SVC_Handler + 0x00000000080245de 0xe ./Core/Src/stm32h7xx_it.o + 0x00000000080245de SVC_Handler .text.DebugMon_Handler - 0x0000000008024568 0xe ./Core/Src/stm32h7xx_it.o - 0x0000000008024568 DebugMon_Handler + 0x00000000080245ec 0xe ./Core/Src/stm32h7xx_it.o + 0x00000000080245ec DebugMon_Handler .text.PendSV_Handler - 0x0000000008024576 0xe ./Core/Src/stm32h7xx_it.o - 0x0000000008024576 PendSV_Handler + 0x00000000080245fa 0xe ./Core/Src/stm32h7xx_it.o + 0x00000000080245fa PendSV_Handler .text.SysTick_Handler - 0x0000000008024584 0xc ./Core/Src/stm32h7xx_it.o - 0x0000000008024584 SysTick_Handler + 0x0000000008024608 0xc ./Core/Src/stm32h7xx_it.o + 0x0000000008024608 SysTick_Handler .text.DMA1_Stream0_IRQHandler - 0x0000000008024590 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024590 DMA1_Stream0_IRQHandler + 0x0000000008024614 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024614 DMA1_Stream0_IRQHandler .text.DMA1_Stream1_IRQHandler - 0x00000000080245a4 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080245a4 DMA1_Stream1_IRQHandler + 0x0000000008024628 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024628 DMA1_Stream1_IRQHandler .text.DMA1_Stream2_IRQHandler - 0x00000000080245b8 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080245b8 DMA1_Stream2_IRQHandler + 0x000000000802463c 0x14 ./Core/Src/stm32h7xx_it.o + 0x000000000802463c DMA1_Stream2_IRQHandler .text.DMA1_Stream3_IRQHandler - 0x00000000080245cc 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080245cc DMA1_Stream3_IRQHandler + 0x0000000008024650 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024650 DMA1_Stream3_IRQHandler .text.DMA1_Stream4_IRQHandler - 0x00000000080245e0 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080245e0 DMA1_Stream4_IRQHandler + 0x0000000008024664 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024664 DMA1_Stream4_IRQHandler .text.DMA1_Stream5_IRQHandler - 0x00000000080245f4 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080245f4 DMA1_Stream5_IRQHandler + 0x0000000008024678 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024678 DMA1_Stream5_IRQHandler .text.DMA1_Stream6_IRQHandler - 0x0000000008024608 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024608 DMA1_Stream6_IRQHandler + 0x000000000802468c 0x14 ./Core/Src/stm32h7xx_it.o + 0x000000000802468c DMA1_Stream6_IRQHandler .text.FDCAN1_IT0_IRQHandler - 0x000000000802461c 0x14 ./Core/Src/stm32h7xx_it.o - 0x000000000802461c FDCAN1_IT0_IRQHandler + 0x00000000080246a0 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246a0 FDCAN1_IT0_IRQHandler .text.FDCAN2_IT0_IRQHandler - 0x0000000008024630 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024630 FDCAN2_IT0_IRQHandler + 0x00000000080246b4 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246b4 FDCAN2_IT0_IRQHandler .text.TIM1_UP_IRQHandler - 0x0000000008024644 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024644 TIM1_UP_IRQHandler + 0x00000000080246c8 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246c8 TIM1_UP_IRQHandler .text.USART1_IRQHandler - 0x0000000008024658 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024658 USART1_IRQHandler + 0x00000000080246dc 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246dc USART1_IRQHandler .text.USART2_IRQHandler - 0x000000000802466c 0x14 ./Core/Src/stm32h7xx_it.o - 0x000000000802466c USART2_IRQHandler + 0x00000000080246f0 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080246f0 USART2_IRQHandler .text.USART3_IRQHandler - 0x0000000008024680 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024680 USART3_IRQHandler + 0x0000000008024704 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024704 USART3_IRQHandler .text.TIM8_UP_TIM13_IRQHandler - 0x0000000008024694 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024694 TIM8_UP_TIM13_IRQHandler + 0x0000000008024718 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024718 TIM8_UP_TIM13_IRQHandler .text.UART4_IRQHandler - 0x00000000080246a8 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246a8 UART4_IRQHandler + 0x000000000802472c 0x14 ./Core/Src/stm32h7xx_it.o + 0x000000000802472c UART4_IRQHandler .text.UART5_IRQHandler - 0x00000000080246bc 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246bc UART5_IRQHandler + 0x0000000008024740 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024740 UART5_IRQHandler .text.ETH_IRQHandler - 0x00000000080246d0 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246d0 ETH_IRQHandler + 0x0000000008024754 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024754 ETH_IRQHandler .text.USART6_IRQHandler - 0x00000000080246e4 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246e4 USART6_IRQHandler + 0x0000000008024768 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024768 USART6_IRQHandler .text.UART7_IRQHandler - 0x00000000080246f8 0x14 ./Core/Src/stm32h7xx_it.o - 0x00000000080246f8 UART7_IRQHandler + 0x000000000802477c 0x14 ./Core/Src/stm32h7xx_it.o + 0x000000000802477c UART7_IRQHandler .text.QUADSPI_IRQHandler - 0x000000000802470c 0x14 ./Core/Src/stm32h7xx_it.o - 0x000000000802470c QUADSPI_IRQHandler + 0x0000000008024790 0x14 ./Core/Src/stm32h7xx_it.o + 0x0000000008024790 QUADSPI_IRQHandler .text.I2C4_EV_IRQHandler - 0x0000000008024720 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024720 I2C4_EV_IRQHandler + 0x00000000080247a4 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080247a4 I2C4_EV_IRQHandler .text.I2C4_ER_IRQHandler - 0x0000000008024734 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024734 I2C4_ER_IRQHandler + 0x00000000080247b8 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080247b8 I2C4_ER_IRQHandler .text.BDMA_Channel0_IRQHandler - 0x0000000008024748 0x14 ./Core/Src/stm32h7xx_it.o - 0x0000000008024748 BDMA_Channel0_IRQHandler + 0x00000000080247cc 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080247cc BDMA_Channel0_IRQHandler .text.LPUART1_IRQHandler - 0x000000000802475c 0x14 ./Core/Src/stm32h7xx_it.o - 0x000000000802475c LPUART1_IRQHandler - .text._getpid 0x0000000008024770 0x10 ./Core/Src/syscalls.o - 0x0000000008024770 _getpid - .text._kill 0x0000000008024780 0x24 ./Core/Src/syscalls.o - 0x0000000008024780 _kill - .text._exit 0x00000000080247a4 0x14 ./Core/Src/syscalls.o - 0x00000000080247a4 _exit - .text._read 0x00000000080247b8 0x3a ./Core/Src/syscalls.o - 0x00000000080247b8 _read - .text._write 0x00000000080247f2 0x38 ./Core/Src/syscalls.o - 0x00000000080247f2 _write - .text._close 0x000000000802482a 0x18 ./Core/Src/syscalls.o - 0x000000000802482a _close - .text._fstat 0x0000000008024842 0x20 ./Core/Src/syscalls.o - 0x0000000008024842 _fstat - .text._isatty 0x0000000008024862 0x16 ./Core/Src/syscalls.o - 0x0000000008024862 _isatty - .text._lseek 0x0000000008024878 0x1a ./Core/Src/syscalls.o - 0x0000000008024878 _lseek - *fill* 0x0000000008024892 0x2 - .text._sbrk 0x0000000008024894 0x70 ./Core/Src/sysmem.o - 0x0000000008024894 _sbrk + 0x00000000080247e0 0x14 ./Core/Src/stm32h7xx_it.o + 0x00000000080247e0 LPUART1_IRQHandler + .text._getpid 0x00000000080247f4 0x10 ./Core/Src/syscalls.o + 0x00000000080247f4 _getpid + .text._kill 0x0000000008024804 0x24 ./Core/Src/syscalls.o + 0x0000000008024804 _kill + .text._exit 0x0000000008024828 0x14 ./Core/Src/syscalls.o + 0x0000000008024828 _exit + .text._read 0x000000000802483c 0x3a ./Core/Src/syscalls.o + 0x000000000802483c _read + .text._write 0x0000000008024876 0x38 ./Core/Src/syscalls.o + 0x0000000008024876 _write + .text._close 0x00000000080248ae 0x18 ./Core/Src/syscalls.o + 0x00000000080248ae _close + .text._fstat 0x00000000080248c6 0x20 ./Core/Src/syscalls.o + 0x00000000080248c6 _fstat + .text._isatty 0x00000000080248e6 0x16 ./Core/Src/syscalls.o + 0x00000000080248e6 _isatty + .text._lseek 0x00000000080248fc 0x1a ./Core/Src/syscalls.o + 0x00000000080248fc _lseek + *fill* 0x0000000008024916 0x2 + .text._sbrk 0x0000000008024918 0x70 ./Core/Src/sysmem.o + 0x0000000008024918 _sbrk .text.SystemInit - 0x0000000008024904 0x11c ./Core/Src/system_stm32h7xx.o - 0x0000000008024904 SystemInit + 0x0000000008024988 0x11c ./Core/Src/system_stm32h7xx.o + 0x0000000008024988 SystemInit .text.MX_TIM1_Init - 0x0000000008024a20 0xa8 ./Core/Src/tim.o - 0x0000000008024a20 MX_TIM1_Init + 0x0000000008024aa4 0xa8 ./Core/Src/tim.o + 0x0000000008024aa4 MX_TIM1_Init .text.MX_TIM8_Init - 0x0000000008024ac8 0xa8 ./Core/Src/tim.o - 0x0000000008024ac8 MX_TIM8_Init + 0x0000000008024b4c 0xa8 ./Core/Src/tim.o + 0x0000000008024b4c MX_TIM8_Init .text.HAL_TIM_Base_MspInit - 0x0000000008024b70 0x90 ./Core/Src/tim.o - 0x0000000008024b70 HAL_TIM_Base_MspInit + 0x0000000008024bf4 0x90 ./Core/Src/tim.o + 0x0000000008024bf4 HAL_TIM_Base_MspInit .text.MX_LPUART1_UART_Init - 0x0000000008024c00 0xa8 ./Core/Src/usart.o - 0x0000000008024c00 MX_LPUART1_UART_Init + 0x0000000008024c84 0xa8 ./Core/Src/usart.o + 0x0000000008024c84 MX_LPUART1_UART_Init .text.MX_UART4_Init - 0x0000000008024ca8 0xa8 ./Core/Src/usart.o - 0x0000000008024ca8 MX_UART4_Init + 0x0000000008024d2c 0xa8 ./Core/Src/usart.o + 0x0000000008024d2c MX_UART4_Init .text.MX_UART5_Init - 0x0000000008024d50 0xa8 ./Core/Src/usart.o - 0x0000000008024d50 MX_UART5_Init + 0x0000000008024dd4 0xa8 ./Core/Src/usart.o + 0x0000000008024dd4 MX_UART5_Init .text.MX_UART7_Init - 0x0000000008024df8 0xb0 ./Core/Src/usart.o - 0x0000000008024df8 MX_UART7_Init + 0x0000000008024e7c 0xb0 ./Core/Src/usart.o + 0x0000000008024e7c MX_UART7_Init .text.MX_USART1_UART_Init - 0x0000000008024ea8 0xb0 ./Core/Src/usart.o - 0x0000000008024ea8 MX_USART1_UART_Init + 0x0000000008024f2c 0xb0 ./Core/Src/usart.o + 0x0000000008024f2c MX_USART1_UART_Init .text.MX_USART2_UART_Init - 0x0000000008024f58 0xb0 ./Core/Src/usart.o - 0x0000000008024f58 MX_USART2_UART_Init + 0x0000000008024fdc 0xb0 ./Core/Src/usart.o + 0x0000000008024fdc MX_USART2_UART_Init .text.MX_USART3_UART_Init - 0x0000000008025008 0xb0 ./Core/Src/usart.o - 0x0000000008025008 MX_USART3_UART_Init + 0x000000000802508c 0xb0 ./Core/Src/usart.o + 0x000000000802508c MX_USART3_UART_Init .text.MX_USART6_UART_Init - 0x00000000080250b8 0xb0 ./Core/Src/usart.o - 0x00000000080250b8 MX_USART6_UART_Init + 0x000000000802513c 0xb0 ./Core/Src/usart.o + 0x000000000802513c MX_USART6_UART_Init .text.HAL_UART_MspInit - 0x0000000008025168 0xa3c ./Core/Src/usart.o - 0x0000000008025168 HAL_UART_MspInit + 0x00000000080251ec 0xa3c ./Core/Src/usart.o + 0x00000000080251ec HAL_UART_MspInit .text.Reset_Handler - 0x0000000008025ba4 0x50 ./Core/Startup/startup_stm32h743vgtx.o - 0x0000000008025ba4 Reset_Handler + 0x0000000008025c28 0x50 ./Core/Startup/startup_stm32h743vgtx.o + 0x0000000008025c28 Reset_Handler .text.Default_Handler - 0x0000000008025bf4 0x2 ./Core/Startup/startup_stm32h743vgtx.o - 0x0000000008025bf4 RTC_Alarm_IRQHandler - 0x0000000008025bf4 EXTI2_IRQHandler - 0x0000000008025bf4 TIM8_CC_IRQHandler - 0x0000000008025bf4 HRTIM1_Master_IRQHandler - 0x0000000008025bf4 UART8_IRQHandler - 0x0000000008025bf4 SPI4_IRQHandler - 0x0000000008025bf4 TIM1_CC_IRQHandler - 0x0000000008025bf4 BDMA_Channel6_IRQHandler - 0x0000000008025bf4 DMA2_Stream5_IRQHandler - 0x0000000008025bf4 HRTIM1_FLT_IRQHandler - 0x0000000008025bf4 JPEG_IRQHandler - 0x0000000008025bf4 BDMA_Channel1_IRQHandler - 0x0000000008025bf4 HRTIM1_TIMD_IRQHandler - 0x0000000008025bf4 TAMP_STAMP_IRQHandler - 0x0000000008025bf4 EXTI3_IRQHandler - 0x0000000008025bf4 LPTIM4_IRQHandler - 0x0000000008025bf4 TIM8_TRG_COM_TIM14_IRQHandler - 0x0000000008025bf4 LPTIM2_IRQHandler - 0x0000000008025bf4 DFSDM1_FLT1_IRQHandler - 0x0000000008025bf4 DMAMUX2_OVR_IRQHandler - 0x0000000008025bf4 I2C3_ER_IRQHandler - 0x0000000008025bf4 DFSDM1_FLT2_IRQHandler - 0x0000000008025bf4 MDMA_IRQHandler - 0x0000000008025bf4 LPTIM3_IRQHandler - 0x0000000008025bf4 HSEM1_IRQHandler - 0x0000000008025bf4 EXTI0_IRQHandler - 0x0000000008025bf4 I2C2_EV_IRQHandler - 0x0000000008025bf4 FPU_IRQHandler - 0x0000000008025bf4 OTG_HS_WKUP_IRQHandler - 0x0000000008025bf4 FDCAN1_IT1_IRQHandler - 0x0000000008025bf4 LTDC_ER_IRQHandler - 0x0000000008025bf4 DMA2_Stream2_IRQHandler - 0x0000000008025bf4 HRTIM1_TIME_IRQHandler - 0x0000000008025bf4 SPI1_IRQHandler - 0x0000000008025bf4 TIM6_DAC_IRQHandler - 0x0000000008025bf4 DCMI_IRQHandler - 0x0000000008025bf4 HRTIM1_TIMC_IRQHandler - 0x0000000008025bf4 DMA2_Stream3_IRQHandler - 0x0000000008025bf4 SAI2_IRQHandler - 0x0000000008025bf4 DFSDM1_FLT3_IRQHandler - 0x0000000008025bf4 TIM17_IRQHandler - 0x0000000008025bf4 BDMA_Channel7_IRQHandler - 0x0000000008025bf4 LPTIM5_IRQHandler - 0x0000000008025bf4 ADC3_IRQHandler - 0x0000000008025bf4 DMA2_Stream0_IRQHandler - 0x0000000008025bf4 TIM4_IRQHandler - 0x0000000008025bf4 BDMA_Channel2_IRQHandler - 0x0000000008025bf4 I2C1_EV_IRQHandler - 0x0000000008025bf4 DMAMUX1_OVR_IRQHandler - 0x0000000008025bf4 TIM16_IRQHandler - 0x0000000008025bf4 BDMA_Channel5_IRQHandler - 0x0000000008025bf4 TIM3_IRQHandler - 0x0000000008025bf4 RCC_IRQHandler - 0x0000000008025bf4 TIM8_BRK_TIM12_IRQHandler - 0x0000000008025bf4 TIM1_TRG_COM_IRQHandler - 0x0000000008025bf4 Default_Handler - 0x0000000008025bf4 ECC_IRQHandler - 0x0000000008025bf4 CEC_IRQHandler - 0x0000000008025bf4 EXTI15_10_IRQHandler - 0x0000000008025bf4 ADC_IRQHandler - 0x0000000008025bf4 DMA1_Stream7_IRQHandler - 0x0000000008025bf4 HRTIM1_TIMA_IRQHandler - 0x0000000008025bf4 SPI5_IRQHandler - 0x0000000008025bf4 TIM7_IRQHandler - 0x0000000008025bf4 SDMMC1_IRQHandler - 0x0000000008025bf4 TIM5_IRQHandler - 0x0000000008025bf4 DMA2_Stream7_IRQHandler - 0x0000000008025bf4 TIM15_IRQHandler - 0x0000000008025bf4 PVD_AVD_IRQHandler - 0x0000000008025bf4 I2C3_EV_IRQHandler - 0x0000000008025bf4 EXTI9_5_IRQHandler - 0x0000000008025bf4 RTC_WKUP_IRQHandler - 0x0000000008025bf4 LTDC_IRQHandler - 0x0000000008025bf4 SAI3_IRQHandler - 0x0000000008025bf4 ETH_WKUP_IRQHandler - 0x0000000008025bf4 SPDIF_RX_IRQHandler - 0x0000000008025bf4 SPI2_IRQHandler - 0x0000000008025bf4 OTG_HS_EP1_IN_IRQHandler - 0x0000000008025bf4 CRS_IRQHandler - 0x0000000008025bf4 EXTI4_IRQHandler - 0x0000000008025bf4 RNG_IRQHandler - 0x0000000008025bf4 HRTIM1_TIMB_IRQHandler - 0x0000000008025bf4 FDCAN2_IT1_IRQHandler - 0x0000000008025bf4 BDMA_Channel4_IRQHandler - 0x0000000008025bf4 OTG_HS_EP1_OUT_IRQHandler - 0x0000000008025bf4 WWDG_IRQHandler - 0x0000000008025bf4 SPI6_IRQHandler - 0x0000000008025bf4 MDIOS_IRQHandler - 0x0000000008025bf4 TIM2_IRQHandler - 0x0000000008025bf4 OTG_FS_WKUP_IRQHandler - 0x0000000008025bf4 OTG_HS_IRQHandler - 0x0000000008025bf4 DMA2D_IRQHandler - 0x0000000008025bf4 TIM1_BRK_IRQHandler - 0x0000000008025bf4 EXTI1_IRQHandler - 0x0000000008025bf4 SDMMC2_IRQHandler - 0x0000000008025bf4 OTG_FS_EP1_OUT_IRQHandler - 0x0000000008025bf4 BDMA_Channel3_IRQHandler - 0x0000000008025bf4 MDIOS_WKUP_IRQHandler - 0x0000000008025bf4 DFSDM1_FLT0_IRQHandler - 0x0000000008025bf4 SAI4_IRQHandler - 0x0000000008025bf4 I2C2_ER_IRQHandler - 0x0000000008025bf4 DMA2_Stream1_IRQHandler - 0x0000000008025bf4 FLASH_IRQHandler - 0x0000000008025bf4 DMA2_Stream4_IRQHandler - 0x0000000008025bf4 OTG_FS_IRQHandler - 0x0000000008025bf4 SPI3_IRQHandler - 0x0000000008025bf4 WAKEUP_PIN_IRQHandler - 0x0000000008025bf4 OTG_FS_EP1_IN_IRQHandler - 0x0000000008025bf4 I2C1_ER_IRQHandler - 0x0000000008025bf4 FMC_IRQHandler - 0x0000000008025bf4 FDCAN_CAL_IRQHandler - 0x0000000008025bf4 SWPMI1_IRQHandler - 0x0000000008025bf4 COMP1_IRQHandler - 0x0000000008025bf4 LPTIM1_IRQHandler - 0x0000000008025bf4 DMA2_Stream6_IRQHandler - 0x0000000008025bf4 SAI1_IRQHandler + 0x0000000008025c78 0x2 ./Core/Startup/startup_stm32h743vgtx.o + 0x0000000008025c78 RTC_Alarm_IRQHandler + 0x0000000008025c78 EXTI2_IRQHandler + 0x0000000008025c78 TIM8_CC_IRQHandler + 0x0000000008025c78 HRTIM1_Master_IRQHandler + 0x0000000008025c78 UART8_IRQHandler + 0x0000000008025c78 SPI4_IRQHandler + 0x0000000008025c78 TIM1_CC_IRQHandler + 0x0000000008025c78 BDMA_Channel6_IRQHandler + 0x0000000008025c78 DMA2_Stream5_IRQHandler + 0x0000000008025c78 HRTIM1_FLT_IRQHandler + 0x0000000008025c78 JPEG_IRQHandler + 0x0000000008025c78 BDMA_Channel1_IRQHandler + 0x0000000008025c78 HRTIM1_TIMD_IRQHandler + 0x0000000008025c78 TAMP_STAMP_IRQHandler + 0x0000000008025c78 EXTI3_IRQHandler + 0x0000000008025c78 LPTIM4_IRQHandler + 0x0000000008025c78 TIM8_TRG_COM_TIM14_IRQHandler + 0x0000000008025c78 LPTIM2_IRQHandler + 0x0000000008025c78 DFSDM1_FLT1_IRQHandler + 0x0000000008025c78 DMAMUX2_OVR_IRQHandler + 0x0000000008025c78 I2C3_ER_IRQHandler + 0x0000000008025c78 DFSDM1_FLT2_IRQHandler + 0x0000000008025c78 MDMA_IRQHandler + 0x0000000008025c78 LPTIM3_IRQHandler + 0x0000000008025c78 HSEM1_IRQHandler + 0x0000000008025c78 EXTI0_IRQHandler + 0x0000000008025c78 I2C2_EV_IRQHandler + 0x0000000008025c78 FPU_IRQHandler + 0x0000000008025c78 OTG_HS_WKUP_IRQHandler + 0x0000000008025c78 FDCAN1_IT1_IRQHandler + 0x0000000008025c78 LTDC_ER_IRQHandler + 0x0000000008025c78 DMA2_Stream2_IRQHandler + 0x0000000008025c78 HRTIM1_TIME_IRQHandler + 0x0000000008025c78 SPI1_IRQHandler + 0x0000000008025c78 TIM6_DAC_IRQHandler + 0x0000000008025c78 DCMI_IRQHandler + 0x0000000008025c78 HRTIM1_TIMC_IRQHandler + 0x0000000008025c78 DMA2_Stream3_IRQHandler + 0x0000000008025c78 SAI2_IRQHandler + 0x0000000008025c78 DFSDM1_FLT3_IRQHandler + 0x0000000008025c78 TIM17_IRQHandler + 0x0000000008025c78 BDMA_Channel7_IRQHandler + 0x0000000008025c78 LPTIM5_IRQHandler + 0x0000000008025c78 ADC3_IRQHandler + 0x0000000008025c78 DMA2_Stream0_IRQHandler + 0x0000000008025c78 TIM4_IRQHandler + 0x0000000008025c78 BDMA_Channel2_IRQHandler + 0x0000000008025c78 I2C1_EV_IRQHandler + 0x0000000008025c78 DMAMUX1_OVR_IRQHandler + 0x0000000008025c78 TIM16_IRQHandler + 0x0000000008025c78 BDMA_Channel5_IRQHandler + 0x0000000008025c78 TIM3_IRQHandler + 0x0000000008025c78 RCC_IRQHandler + 0x0000000008025c78 TIM8_BRK_TIM12_IRQHandler + 0x0000000008025c78 TIM1_TRG_COM_IRQHandler + 0x0000000008025c78 Default_Handler + 0x0000000008025c78 ECC_IRQHandler + 0x0000000008025c78 CEC_IRQHandler + 0x0000000008025c78 EXTI15_10_IRQHandler + 0x0000000008025c78 ADC_IRQHandler + 0x0000000008025c78 DMA1_Stream7_IRQHandler + 0x0000000008025c78 HRTIM1_TIMA_IRQHandler + 0x0000000008025c78 SPI5_IRQHandler + 0x0000000008025c78 TIM7_IRQHandler + 0x0000000008025c78 SDMMC1_IRQHandler + 0x0000000008025c78 TIM5_IRQHandler + 0x0000000008025c78 DMA2_Stream7_IRQHandler + 0x0000000008025c78 TIM15_IRQHandler + 0x0000000008025c78 PVD_AVD_IRQHandler + 0x0000000008025c78 I2C3_EV_IRQHandler + 0x0000000008025c78 EXTI9_5_IRQHandler + 0x0000000008025c78 RTC_WKUP_IRQHandler + 0x0000000008025c78 LTDC_IRQHandler + 0x0000000008025c78 SAI3_IRQHandler + 0x0000000008025c78 ETH_WKUP_IRQHandler + 0x0000000008025c78 SPDIF_RX_IRQHandler + 0x0000000008025c78 SPI2_IRQHandler + 0x0000000008025c78 OTG_HS_EP1_IN_IRQHandler + 0x0000000008025c78 CRS_IRQHandler + 0x0000000008025c78 EXTI4_IRQHandler + 0x0000000008025c78 RNG_IRQHandler + 0x0000000008025c78 HRTIM1_TIMB_IRQHandler + 0x0000000008025c78 FDCAN2_IT1_IRQHandler + 0x0000000008025c78 BDMA_Channel4_IRQHandler + 0x0000000008025c78 OTG_HS_EP1_OUT_IRQHandler + 0x0000000008025c78 WWDG_IRQHandler + 0x0000000008025c78 SPI6_IRQHandler + 0x0000000008025c78 MDIOS_IRQHandler + 0x0000000008025c78 TIM2_IRQHandler + 0x0000000008025c78 OTG_FS_WKUP_IRQHandler + 0x0000000008025c78 OTG_HS_IRQHandler + 0x0000000008025c78 DMA2D_IRQHandler + 0x0000000008025c78 TIM1_BRK_IRQHandler + 0x0000000008025c78 EXTI1_IRQHandler + 0x0000000008025c78 SDMMC2_IRQHandler + 0x0000000008025c78 OTG_FS_EP1_OUT_IRQHandler + 0x0000000008025c78 BDMA_Channel3_IRQHandler + 0x0000000008025c78 MDIOS_WKUP_IRQHandler + 0x0000000008025c78 DFSDM1_FLT0_IRQHandler + 0x0000000008025c78 SAI4_IRQHandler + 0x0000000008025c78 I2C2_ER_IRQHandler + 0x0000000008025c78 DMA2_Stream1_IRQHandler + 0x0000000008025c78 FLASH_IRQHandler + 0x0000000008025c78 DMA2_Stream4_IRQHandler + 0x0000000008025c78 OTG_FS_IRQHandler + 0x0000000008025c78 SPI3_IRQHandler + 0x0000000008025c78 WAKEUP_PIN_IRQHandler + 0x0000000008025c78 OTG_FS_EP1_IN_IRQHandler + 0x0000000008025c78 I2C1_ER_IRQHandler + 0x0000000008025c78 FMC_IRQHandler + 0x0000000008025c78 FDCAN_CAL_IRQHandler + 0x0000000008025c78 SWPMI1_IRQHandler + 0x0000000008025c78 COMP1_IRQHandler + 0x0000000008025c78 LPTIM1_IRQHandler + 0x0000000008025c78 DMA2_Stream6_IRQHandler + 0x0000000008025c78 SAI1_IRQHandler .text.LAN8742_RegisterBusIO - 0x0000000008025bf6 0x64 ./Drivers/BSP/Components/lan8742/lan8742.o - 0x0000000008025bf6 LAN8742_RegisterBusIO + 0x0000000008025c7a 0x64 ./Drivers/BSP/Components/lan8742/lan8742.o + 0x0000000008025c7a LAN8742_RegisterBusIO .text.LAN8742_Init - 0x0000000008025c5a 0x150 ./Drivers/BSP/Components/lan8742/lan8742.o - 0x0000000008025c5a LAN8742_Init + 0x0000000008025cde 0x150 ./Drivers/BSP/Components/lan8742/lan8742.o + 0x0000000008025cde LAN8742_Init .text.LAN8742_GetLinkState - 0x0000000008025daa 0x10e ./Drivers/BSP/Components/lan8742/lan8742.o - 0x0000000008025daa LAN8742_GetLinkState + 0x0000000008025e2e 0x10e ./Drivers/BSP/Components/lan8742/lan8742.o + 0x0000000008025e2e LAN8742_GetLinkState .text.HAL_Init - 0x0000000008025eb8 0x78 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025eb8 HAL_Init + 0x0000000008025f3c 0x78 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008025f3c HAL_Init .text.HAL_InitTick - 0x0000000008025f30 0x6c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025f30 HAL_InitTick + 0x0000000008025fb4 0x6c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008025fb4 HAL_InitTick .text.HAL_IncTick - 0x0000000008025f9c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025f9c HAL_IncTick + 0x0000000008026020 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008026020 HAL_IncTick .text.HAL_GetTick - 0x0000000008025fc4 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025fc4 HAL_GetTick + 0x0000000008026048 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008026048 HAL_GetTick .text.HAL_Delay - 0x0000000008025fdc 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008025fdc HAL_Delay + 0x0000000008026060 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x0000000008026060 HAL_Delay .text.HAL_GetREVID - 0x0000000008026024 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x0000000008026024 HAL_GetREVID + 0x00000000080260a8 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x00000000080260a8 HAL_GetREVID .text.HAL_SYSCFG_ETHInterfaceSelect - 0x000000000802603c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x000000000802603c HAL_SYSCFG_ETHInterfaceSelect + 0x00000000080260c0 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x00000000080260c0 HAL_SYSCFG_ETHInterfaceSelect .text.LL_ADC_SetCommonClock - 0x0000000008026064 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080260e8 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetCommonPathInternalCh - 0x000000000802608a 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802610e 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_GetCommonPathInternalCh - 0x00000000080260b0 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026134 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetOffset - 0x00000000080260cc 0x40 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026150 0x40 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetDataRightShift - 0x000000000802610c 0x32 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026190 0x32 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetOffsetSignedSaturation - 0x000000000802613e 0x36 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080261c2 0x36 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_REG_IsTriggerSourceSWStart - 0x0000000008026174 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080261f8 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_REG_SetSequencerRanks - 0x000000000802619a 0x58 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802621e 0x58 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetChannelSamplingTime - 0x00000000080261f2 0x56 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026276 0x56 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_SetChannelSingleDiff - 0x0000000008026248 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080262cc 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_GetMultimode - 0x0000000008026290 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026314 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_GetMultiDMATransfer - 0x00000000080262ac 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026330 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_DisableDeepPowerDown - 0x00000000080262c8 0x24 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802634c 0x24 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_IsDeepPowerDownEnabled - 0x00000000080262ec 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026370 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_EnableInternalRegulator - 0x0000000008026314 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026398 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_IsInternalRegulatorEnabled - 0x000000000802633c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080263c0 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_Enable - 0x0000000008026364 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080263e8 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_Disable - 0x000000000802638c 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026410 0x28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_IsEnabled - 0x00000000080263b4 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008026438 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .text.LL_ADC_IsDisableOngoing - 0x00000000080263da 0x26 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 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ADC_ConversionStop + 0x0000000008027330 0x178 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000008027330 ADC_ConversionStop .text.ADC_Enable - 0x0000000008027424 0x114 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - 0x0000000008027424 ADC_Enable + 0x00000000080274a8 0x114 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080274a8 ADC_Enable .text.ADC_Disable - 0x0000000008027538 0xbe ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - 0x0000000008027538 ADC_Disable - *fill* 0x00000000080275f6 0x2 + 0x00000000080275bc 0xbe ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x00000000080275bc ADC_Disable + *fill* 0x000000000802767a 0x2 .text.ADC_ConfigureBoostMode - 0x00000000080275f8 0x214 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - 0x00000000080275f8 ADC_ConfigureBoostMode + 0x000000000802767c 0x214 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x000000000802767c ADC_ConfigureBoostMode .text.__NVIC_SetPriorityGrouping - 0x000000000802780c 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x0000000008027890 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x0000000008027854 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x00000000080278d8 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o .text.__NVIC_EnableIRQ - 0x0000000008027870 0x3c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x00000000080278f4 0x3c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o .text.__NVIC_SetPriority - 0x00000000080278ac 0x54 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x0000000008027930 0x54 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o .text.NVIC_EncodePriority - 0x0000000008027900 0x66 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - *fill* 0x0000000008027966 0x2 + 0x0000000008027984 0x66 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0x000000000802a06c 0x358 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.DMA_CalcBaseAndBitshift - 0x000000000802a340 0x164 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x000000000802a3c4 0x164 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.DMA_CheckFifoParam - 0x000000000802a4a4 0xf8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x000000000802a528 0xf8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.DMA_CalcDMAMUXChannelBaseAndMask - 0x000000000802a59c 0x134 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x000000000802a620 0x134 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.DMA_CalcDMAMUXRequestGenBaseAndMask - 0x000000000802a6d0 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x000000000802a754 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .text.HAL_ETH_Init - 0x000000000802a7b8 0x1cc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802a7b8 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./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b168 HAL_ETH_EEECallback .text.HAL_ETH_WakeUpCallback - 0x000000000802b0f8 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b0f8 HAL_ETH_WakeUpCallback + 0x000000000802b17c 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b17c HAL_ETH_WakeUpCallback .text.HAL_ETH_ReadPHYRegister - 0x000000000802b10c 0xa8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b10c HAL_ETH_ReadPHYRegister + 0x000000000802b190 0xa8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b190 HAL_ETH_ReadPHYRegister .text.HAL_ETH_WritePHYRegister - 0x000000000802b1b4 0xa8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b1b4 HAL_ETH_WritePHYRegister + 0x000000000802b238 0xa8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b238 HAL_ETH_WritePHYRegister .text.HAL_ETH_GetMACConfig - 0x000000000802b25c 0x3a8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b25c HAL_ETH_GetMACConfig + 0x000000000802b2e0 0x3a8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b2e0 HAL_ETH_GetMACConfig .text.HAL_ETH_SetMACConfig - 0x000000000802b604 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b604 HAL_ETH_SetMACConfig + 0x000000000802b688 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b688 HAL_ETH_SetMACConfig .text.HAL_ETH_SetMDIOClockRange - 0x000000000802b638 0xb0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - 0x000000000802b638 HAL_ETH_SetMDIOClockRange + 0x000000000802b6bc 0xb0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b6bc HAL_ETH_SetMDIOClockRange .text.ETH_SetMACConfig - 0x000000000802b6e8 0x238 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b76c 0x238 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o .text.ETH_SetDMAConfig - 0x000000000802b920 0x10c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802b9a4 0x10c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o .text.ETH_MACDMAConfig - 0x000000000802ba2c 0x13a ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802bab0 0x13a ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o .text.ETH_DMATxDescListInit - 0x000000000802bb66 0x92 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802bbea 0x92 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o .text.ETH_DMARxDescListInit - 0x000000000802bbf8 0xba ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - *fill* 0x000000000802bcb2 0x2 + 0x000000000802bc7c 0xba ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + *fill* 0x000000000802bd36 0x2 .text.ETH_Prepare_Tx_Descriptors - 0x000000000802bcb4 0x51c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x000000000802bd38 0x51c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o .text.HAL_FDCAN_Init - 0x000000000802c1d0 0x3bc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c1d0 HAL_FDCAN_Init + 0x000000000802c254 0x3bc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c254 HAL_FDCAN_Init .text.HAL_FDCAN_Start - 0x000000000802c58c 0x56 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c58c HAL_FDCAN_Start + 0x000000000802c610 0x56 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c610 HAL_FDCAN_Start .text.HAL_FDCAN_AddMessageToTxFifoQ - 0x000000000802c5e2 0xb6 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c5e2 HAL_FDCAN_AddMessageToTxFifoQ + 0x000000000802c666 0xb6 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c666 HAL_FDCAN_AddMessageToTxFifoQ .text.HAL_FDCAN_GetRxMessage - 0x000000000802c698 0x2dc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c698 HAL_FDCAN_GetRxMessage + 0x000000000802c71c 0x2dc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c71c HAL_FDCAN_GetRxMessage .text.HAL_FDCAN_ActivateNotification - 0x000000000802c974 0xf4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802c974 HAL_FDCAN_ActivateNotification + 0x000000000802c9f8 0xf4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802c9f8 HAL_FDCAN_ActivateNotification .text.HAL_FDCAN_IRQHandler - 0x000000000802ca68 0x4bc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802ca68 HAL_FDCAN_IRQHandler + 0x000000000802caec 0x4bc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802caec HAL_FDCAN_IRQHandler .text.HAL_FDCAN_ClockCalibrationCallback - 0x000000000802cf24 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf24 HAL_FDCAN_ClockCalibrationCallback + 0x000000000802cfa8 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cfa8 HAL_FDCAN_ClockCalibrationCallback .text.HAL_FDCAN_TxEventFifoCallback - 0x000000000802cf3a 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf3a HAL_FDCAN_TxEventFifoCallback + 0x000000000802cfbe 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cfbe HAL_FDCAN_TxEventFifoCallback .text.HAL_FDCAN_RxFifo1Callback - 0x000000000802cf50 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf50 HAL_FDCAN_RxFifo1Callback + 0x000000000802cfd4 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cfd4 HAL_FDCAN_RxFifo1Callback .text.HAL_FDCAN_TxFifoEmptyCallback - 0x000000000802cf66 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf66 HAL_FDCAN_TxFifoEmptyCallback + 0x000000000802cfea 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cfea HAL_FDCAN_TxFifoEmptyCallback .text.HAL_FDCAN_TxBufferCompleteCallback - 0x000000000802cf7a 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf7a HAL_FDCAN_TxBufferCompleteCallback + 0x000000000802cffe 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802cffe HAL_FDCAN_TxBufferCompleteCallback .text.HAL_FDCAN_TxBufferAbortCallback - 0x000000000802cf90 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cf90 HAL_FDCAN_TxBufferAbortCallback + 0x000000000802d014 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d014 HAL_FDCAN_TxBufferAbortCallback .text.HAL_FDCAN_RxBufferNewMessageCallback - 0x000000000802cfa6 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cfa6 HAL_FDCAN_RxBufferNewMessageCallback + 0x000000000802d02a 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d02a HAL_FDCAN_RxBufferNewMessageCallback .text.HAL_FDCAN_TimestampWraparoundCallback - 0x000000000802cfba 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cfba HAL_FDCAN_TimestampWraparoundCallback + 0x000000000802d03e 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d03e HAL_FDCAN_TimestampWraparoundCallback .text.HAL_FDCAN_TimeoutOccurredCallback - 0x000000000802cfce 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cfce HAL_FDCAN_TimeoutOccurredCallback + 0x000000000802d052 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d052 HAL_FDCAN_TimeoutOccurredCallback .text.HAL_FDCAN_HighPriorityMessageCallback - 0x000000000802cfe2 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cfe2 HAL_FDCAN_HighPriorityMessageCallback + 0x000000000802d066 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d066 HAL_FDCAN_HighPriorityMessageCallback .text.HAL_FDCAN_ErrorCallback - 0x000000000802cff6 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802cff6 HAL_FDCAN_ErrorCallback + 0x000000000802d07a 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d07a HAL_FDCAN_ErrorCallback .text.HAL_FDCAN_TT_ScheduleSyncCallback - 0x000000000802d00a 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802d00a HAL_FDCAN_TT_ScheduleSyncCallback + 0x000000000802d08e 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d08e HAL_FDCAN_TT_ScheduleSyncCallback .text.HAL_FDCAN_TT_TimeMarkCallback - 0x000000000802d020 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802d020 HAL_FDCAN_TT_TimeMarkCallback + 0x000000000802d0a4 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d0a4 HAL_FDCAN_TT_TimeMarkCallback .text.HAL_FDCAN_TT_StopWatchCallback - 0x000000000802d036 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802d036 HAL_FDCAN_TT_StopWatchCallback + 0x000000000802d0ba 0x18 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d0ba HAL_FDCAN_TT_StopWatchCallback .text.HAL_FDCAN_TT_GlobalTimeCallback - 0x000000000802d04e 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - 0x000000000802d04e HAL_FDCAN_TT_GlobalTimeCallback + 0x000000000802d0d2 0x16 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d0d2 HAL_FDCAN_TT_GlobalTimeCallback .text.FDCAN_CalcultateRamBlockAddresses - 0x000000000802d064 0x30c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d0e8 0x30c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o .text.FDCAN_CopyMessageToRAM - 0x000000000802d370 0xfc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x000000000802d3f4 0xfc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o .text.HAL_GPIO_Init - 0x000000000802d46c 0x360 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - 0x000000000802d46c HAL_GPIO_Init + 0x000000000802d4f0 0x360 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + 0x000000000802d4f0 HAL_GPIO_Init .text.HAL_GPIO_WritePin - 0x000000000802d7cc 0x32 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - 0x000000000802d7cc HAL_GPIO_WritePin + 0x000000000802d850 0x32 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + 0x000000000802d850 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x000000000802d7fe 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - 0x000000000802d7fe HAL_GPIO_TogglePin - *fill* 0x000000000802d832 0x2 + 0x000000000802d882 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + 0x000000000802d882 HAL_GPIO_TogglePin + *fill* 0x000000000802d8b6 0x2 .text.HAL_I2C_Init - 0x000000000802d834 0x120 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802d834 HAL_I2C_Init + 0x000000000802d8b8 0x120 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802d8b8 HAL_I2C_Init .text.HAL_I2C_EV_IRQHandler - 0x000000000802d954 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802d954 HAL_I2C_EV_IRQHandler + 0x000000000802d9d8 0x34 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802d9d8 HAL_I2C_EV_IRQHandler .text.HAL_I2C_ER_IRQHandler - 0x000000000802d988 0xc2 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802d988 HAL_I2C_ER_IRQHandler + 0x000000000802da0c 0xc2 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802da0c HAL_I2C_ER_IRQHandler .text.HAL_I2C_SlaveTxCpltCallback - 0x000000000802da4a 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da4a HAL_I2C_SlaveTxCpltCallback + 0x000000000802dace 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802dace HAL_I2C_SlaveTxCpltCallback .text.HAL_I2C_SlaveRxCpltCallback - 0x000000000802da5e 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da5e HAL_I2C_SlaveRxCpltCallback + 0x000000000802dae2 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802dae2 HAL_I2C_SlaveRxCpltCallback .text.HAL_I2C_AddrCallback - 0x000000000802da72 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da72 HAL_I2C_AddrCallback + 0x000000000802daf6 0x1c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802daf6 HAL_I2C_AddrCallback .text.HAL_I2C_ListenCpltCallback - 0x000000000802da8e 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802da8e HAL_I2C_ListenCpltCallback + 0x000000000802db12 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802db12 HAL_I2C_ListenCpltCallback .text.HAL_I2C_ErrorCallback - 0x000000000802daa2 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802daa2 HAL_I2C_ErrorCallback + 0x000000000802db26 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802db26 HAL_I2C_ErrorCallback .text.HAL_I2C_AbortCpltCallback - 0x000000000802dab6 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - 0x000000000802dab6 HAL_I2C_AbortCpltCallback + 0x000000000802db3a 0x14 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802db3a HAL_I2C_AbortCpltCallback .text.I2C_Slave_ISR_IT - 0x000000000802daca 0x206 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802db4e 0x206 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITAddrCplt - 0x000000000802dcd0 0x108 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802dd54 0x108 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITSlaveSeqCplt - 0x000000000802ddd8 0xbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802de5c 0xbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITSlaveCplt - 0x000000000802de94 0x3f0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802df18 0x3f0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITListenCplt - 0x000000000802e284 0xac ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e308 0xac ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_ITError - 0x000000000802e330 0x1a0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e3b4 0x1a0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_TreatErrorCallback - 0x000000000802e4d0 0x4e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e554 0x4e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_Flush_TXDR - 0x000000000802e51e 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e5a2 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_DMAAbort - 0x000000000802e566 0x3c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e5ea 0x3c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.I2C_Disable_IRQ - 0x000000000802e5a2 0xbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x000000000802e626 0xbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .text.HAL_I2CEx_ConfigAnalogFilter - 0x000000000802e65e 0x96 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - 0x000000000802e65e HAL_I2CEx_ConfigAnalogFilter + 0x000000000802e6e2 0x96 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + 0x000000000802e6e2 HAL_I2CEx_ConfigAnalogFilter .text.HAL_I2CEx_ConfigDigitalFilter - 0x000000000802e6f4 0x98 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - 0x000000000802e6f4 HAL_I2CEx_ConfigDigitalFilter + 0x000000000802e778 0x98 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + 0x000000000802e778 HAL_I2CEx_ConfigDigitalFilter .text.HAL_MDMA_Abort_IT - 0x000000000802e78c 0x4e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o - 0x000000000802e78c HAL_MDMA_Abort_IT - *fill* 0x000000000802e7da 0x2 + 0x000000000802e810 0x4e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o + 0x000000000802e810 HAL_MDMA_Abort_IT + *fill* 0x000000000802e85e 0x2 .text.HAL_PWREx_ConfigSupply - 0x000000000802e7dc 0x74 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o - 0x000000000802e7dc HAL_PWREx_ConfigSupply + 0x000000000802e860 0x74 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o + 0x000000000802e860 HAL_PWREx_ConfigSupply .text.HAL_QSPI_Init - 0x000000000802e850 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802e850 HAL_QSPI_Init + 0x000000000802e8d4 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802e8d4 HAL_QSPI_Init .text.HAL_QSPI_IRQHandler - 0x000000000802e938 0x374 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - 0x000000000802e938 HAL_QSPI_IRQHandler + 0x000000000802e9bc 0x374 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x000000000802e9bc HAL_QSPI_IRQHandler .text.HAL_QSPI_ErrorCallback - 0x000000000802ecac 0x14 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0x68 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x00000000080373e4 pbuf_alloc_reference .text.pbuf_alloced_custom - 0x00000000080373c8 0x68 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x00000000080373c8 pbuf_alloced_custom + 0x000000000803744c 0x68 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x000000000803744c pbuf_alloced_custom .text.pbuf_realloc - 0x0000000008037430 0x110 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x0000000008037430 pbuf_realloc + 0x00000000080374b4 0x110 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x00000000080374b4 pbuf_realloc .text.pbuf_add_header_impl - 0x0000000008037540 0xd0 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x00000000080375c4 0xd0 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o .text.pbuf_add_header - 0x0000000008037610 0x1e ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x0000000008037610 pbuf_add_header - *fill* 0x000000000803762e 0x2 + 0x0000000008037694 0x1e ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x0000000008037694 pbuf_add_header + *fill* 0x00000000080376b2 0x2 .text.pbuf_remove_header - 0x0000000008037630 0xa4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x0000000008037630 pbuf_remove_header + 0x00000000080376b4 0xa4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x00000000080376b4 pbuf_remove_header .text.pbuf_header_impl - 0x00000000080376d4 0x42 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x0000000008037758 0x42 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o .text.pbuf_header_force - 0x0000000008037716 0x24 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x0000000008037716 pbuf_header_force - *fill* 0x000000000803773a 0x2 + 0x000000000803779a 0x24 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x000000000803779a pbuf_header_force + *fill* 0x00000000080377be 0x2 .text.pbuf_free - 0x000000000803773c 0x110 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x000000000803773c pbuf_free + 0x00000000080377c0 0x110 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x00000000080377c0 pbuf_free .text.pbuf_clen - 0x000000000803784c 0x2e ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x000000000803784c pbuf_clen - *fill* 0x000000000803787a 0x2 + 0x00000000080378d0 0x2e ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x00000000080378d0 pbuf_clen + *fill* 0x00000000080378fe 0x2 .text.pbuf_ref - 0x000000000803787c 0x44 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x000000000803787c pbuf_ref + 0x0000000008037900 0x44 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x0000000008037900 pbuf_ref .text.pbuf_cat - 0x00000000080378c0 0xac ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x00000000080378c0 pbuf_cat + 0x0000000008037944 0xac ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x0000000008037944 pbuf_cat .text.pbuf_copy - 0x000000000803796c 0x1a4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x000000000803796c pbuf_copy + 0x00000000080379f0 0x1a4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x00000000080379f0 pbuf_copy .text.pbuf_copy_partial - 0x0000000008037b10 0xe4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x0000000008037b10 pbuf_copy_partial + 0x0000000008037b94 0xe4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x0000000008037b94 pbuf_copy_partial .text.pbuf_clone - 0x0000000008037bf4 0x64 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x0000000008037bf4 pbuf_clone + 0x0000000008037c78 0x64 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x0000000008037c78 pbuf_clone .text.tcp_init - 0x0000000008037c58 0x24 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008037c58 tcp_init + 0x0000000008037cdc 0x24 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037cdc tcp_init .text.tcp_free - 0x0000000008037c7c 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008037c7c tcp_free + 0x0000000008037d00 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037d00 tcp_free .text.tcp_free_listen - 0x0000000008037cb4 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - .text.tcp_tmr 0x0000000008037cec 0x2c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008037cec tcp_tmr + 0x0000000008037d38 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + .text.tcp_tmr 0x0000000008037d70 0x2c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037d70 tcp_tmr .text.tcp_remove_listener - 0x0000000008037d18 0x54 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037d9c 0x54 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_listen_closed - 0x0000000008037d6c 0x74 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037df0 0x74 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_close_shutdown - 0x0000000008037de0 0x1c4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008037e64 0x1c4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_close_shutdown_fin - 0x0000000008037fa4 0xd4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038028 0xd4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_close - 0x0000000008038078 0x58 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038078 tcp_close + 0x00000000080380fc 0x58 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080380fc tcp_close .text.tcp_abandon - 0x00000000080380d0 0x17c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080380d0 tcp_abandon + 0x0000000008038154 0x17c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038154 tcp_abandon .text.tcp_abort - 0x000000000803824c 0x18 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803824c tcp_abort + 0x00000000080382d0 0x18 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080382d0 tcp_abort .text.tcp_bind - 0x0000000008038264 0x130 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038264 tcp_bind + 0x00000000080382e8 0x130 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080382e8 tcp_bind .text.tcp_accept_null - 0x0000000008038394 0x40 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038418 0x40 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_listen_with_backlog - 0x00000000080383d4 0x22 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080383d4 tcp_listen_with_backlog - *fill* 0x00000000080383f6 0x2 + 0x0000000008038458 0x22 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038458 tcp_listen_with_backlog + *fill* 0x000000000803847a 0x2 .text.tcp_listen_with_backlog_and_err - 0x00000000080383f8 0x154 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080383f8 tcp_listen_with_backlog_and_err + 0x000000000803847c 0x154 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803847c tcp_listen_with_backlog_and_err .text.tcp_update_rcv_ann_wnd - 0x000000000803854c 0xb4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803854c tcp_update_rcv_ann_wnd + 0x00000000080385d0 0xb4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080385d0 tcp_update_rcv_ann_wnd .text.tcp_recved - 0x0000000008038600 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038600 tcp_recved + 0x0000000008038684 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038684 tcp_recved .text.tcp_new_port - 0x00000000080386a0 0x8c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038724 0x8c ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_slowtmr - 0x000000000803872c 0x680 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803872c tcp_slowtmr + 0x00000000080387b0 0x680 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080387b0 tcp_slowtmr .text.tcp_fasttmr - 0x0000000008038dac 0xc8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038dac tcp_fasttmr + 0x0000000008038e30 0xc8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038e30 tcp_fasttmr .text.tcp_process_refused_data - 0x0000000008038e74 0xf8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038e74 tcp_process_refused_data + 0x0000000008038ef8 0xf8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038ef8 tcp_process_refused_data .text.tcp_segs_free - 0x0000000008038f6c 0x2a ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038f6c tcp_segs_free + 0x0000000008038ff0 0x2a ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008038ff0 tcp_segs_free .text.tcp_seg_free - 0x0000000008038f96 0x30 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038f96 tcp_seg_free - *fill* 0x0000000008038fc6 0x2 + 0x000000000803901a 0x30 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803901a tcp_seg_free + *fill* 0x000000000803904a 0x2 .text.tcp_setprio - 0x0000000008038fc8 0x3c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008038fc8 tcp_setprio + 0x000000000803904c 0x3c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803904c tcp_setprio .text.tcp_seg_copy - 0x0000000008039004 0x58 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039004 tcp_seg_copy + 0x0000000008039088 0x58 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039088 tcp_seg_copy .text.tcp_recv_null - 0x000000000803905c 0x6c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803905c tcp_recv_null + 0x00000000080390e0 0x6c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080390e0 tcp_recv_null .text.tcp_kill_prio - 0x00000000080390c8 0x9c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803914c 0x9c ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_kill_state - 0x0000000008039164 0x94 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080391e8 0x94 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_kill_timewait - 0x00000000080391f8 0x60 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803927c 0x60 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_handle_closepend - 0x0000000008039258 0x4c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080392dc 0x4c ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_alloc - 0x00000000080392a4 0x108 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080392a4 tcp_alloc + 0x0000000008039328 0x108 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039328 tcp_alloc .text.tcp_new_ip_type - 0x00000000080393ac 0x1c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080393ac tcp_new_ip_type + 0x0000000008039430 0x1c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039430 tcp_new_ip_type .text.tcp_recv - 0x00000000080393c8 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080393c8 tcp_recv + 0x000000000803944c 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803944c tcp_recv .text.tcp_sent - 0x000000000803940c 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803940c tcp_sent - .text.tcp_err 0x0000000008039450 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039450 tcp_err + 0x0000000008039490 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039490 tcp_sent + .text.tcp_err 0x00000000080394d4 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080394d4 tcp_err .text.tcp_accept - 0x0000000008039494 0x2e ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039494 tcp_accept - *fill* 0x00000000080394c2 0x2 + 0x0000000008039518 0x2e ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039518 tcp_accept + *fill* 0x0000000008039546 0x2 .text.tcp_pcb_purge - 0x00000000080394c4 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080394c4 tcp_pcb_purge + 0x0000000008039548 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039548 tcp_pcb_purge .text.tcp_pcb_remove - 0x0000000008039564 0x128 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x0000000008039564 tcp_pcb_remove + 0x00000000080395e8 0x128 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080395e8 tcp_pcb_remove .text.tcp_next_iss - 0x000000000803968c 0x4c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803968c tcp_next_iss + 0x0000000008039710 0x4c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039710 tcp_next_iss .text.tcp_eff_send_mss_netif - 0x00000000080396d8 0x74 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080396d8 tcp_eff_send_mss_netif + 0x000000000803975c 0x74 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000000803975c tcp_eff_send_mss_netif .text.tcp_netif_ip_addr_changed_pcblist - 0x000000000803974c 0x64 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080397d0 0x64 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .text.tcp_netif_ip_addr_changed - 0x00000000080397b0 0x7c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x00000000080397b0 tcp_netif_ip_addr_changed + 0x0000000008039834 0x7c ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008039834 tcp_netif_ip_addr_changed .text.tcp_free_ooseq - 0x000000000803982c 0x28 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000000803982c tcp_free_ooseq + 0x00000000080398b0 0x28 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x00000000080398b0 tcp_free_ooseq .text.tcp_input - 0x0000000008039854 0x818 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - 0x0000000008039854 tcp_input + 0x00000000080398d8 0x818 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x00000000080398d8 tcp_input .text.tcp_input_delayed_close - 0x000000000803a06c 0x80 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803a0f0 0x80 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_listen_input - 0x000000000803a0ec 0x1fc ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803a170 0x1fc ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_timewait_input - 0x000000000803a2e8 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803a36c 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_process - 0x000000000803a3dc 0x7e0 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803a460 0x7e0 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_oos_insert_segment - 0x000000000803abbc 0x110 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803ac40 0x110 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_free_acked_segments - 0x000000000803accc 0xf8 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803ad50 0xf8 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_receive - 0x000000000803adc4 0xf30 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803ae48 0xf30 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_get_next_optbyte - 0x000000000803bcf4 0x6c ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803bd78 0x6c ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_parseopt - 0x000000000803bd60 0xec ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803bde4 0xec ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .text.tcp_trigger_input_pcb_close - 0x000000000803be4c 0x20 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - 0x000000000803be4c tcp_trigger_input_pcb_close + 0x000000000803bed0 0x20 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000000803bed0 tcp_trigger_input_pcb_close .text.tcp_route - 0x000000000803be6c 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803bef0 0x38 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_create_segment - 0x000000000803bea4 0x13c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803bf28 0x13c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_pbuf_prealloc - 0x000000000803bfe0 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803c064 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_write_checks - 0x000000000803c0d4 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803c158 0xf4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_write - 0x000000000803c1c8 0x6c8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803c1c8 tcp_write + 0x000000000803c24c 0x6c8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803c24c tcp_write .text.tcp_split_unsent_seg - 0x000000000803c890 0x290 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803c890 tcp_split_unsent_seg + 0x000000000803c914 0x290 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803c914 tcp_split_unsent_seg .text.tcp_send_fin - 0x000000000803cb20 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803cb20 tcp_send_fin + 0x000000000803cba4 0xa0 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803cba4 tcp_send_fin .text.tcp_enqueue_flags - 0x000000000803cbc0 0x1dc ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803cbc0 tcp_enqueue_flags + 0x000000000803cc44 0x1dc ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803cc44 tcp_enqueue_flags .text.tcp_output - 0x000000000803cd9c 0x3e8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803cd9c tcp_output + 0x000000000803ce20 0x3e8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803ce20 tcp_output .text.tcp_output_segment_busy - 0x000000000803d184 0x40 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d208 0x40 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_output_segment - 0x000000000803d1c4 0x1bc ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d248 0x1bc ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_rexmit_rto_prepare - 0x000000000803d380 0xe0 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d380 tcp_rexmit_rto_prepare + 0x000000000803d404 0xe0 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d404 tcp_rexmit_rto_prepare .text.tcp_rexmit_rto_commit - 0x000000000803d460 0x50 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d460 tcp_rexmit_rto_commit + 0x000000000803d4e4 0x50 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d4e4 tcp_rexmit_rto_commit .text.tcp_rexmit_rto - 0x000000000803d4b0 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d4b0 tcp_rexmit_rto + 0x000000000803d534 0x44 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d534 tcp_rexmit_rto .text.tcp_rexmit - 0x000000000803d4f4 0xd8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d4f4 tcp_rexmit + 0x000000000803d578 0xd8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d578 tcp_rexmit .text.tcp_rexmit_fast - 0x000000000803d5cc 0xc4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d5cc tcp_rexmit_fast + 0x000000000803d650 0xc4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d650 tcp_rexmit_fast .text.tcp_output_alloc_header_common - 0x000000000803d690 0xe4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d714 0xe4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_output_alloc_header - 0x000000000803d774 0x7c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d7f8 0x7c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_output_fill_options - 0x000000000803d7f0 0x80 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d874 0x80 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .text.tcp_output_control_segment - 0x000000000803d870 0x94 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - .text.tcp_rst 0x000000000803d904 0xa4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d904 tcp_rst + 0x000000000803d8f4 0x94 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + .text.tcp_rst 0x000000000803d988 0xa4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x000000000803d988 tcp_rst .text.tcp_send_empty_ack - 0x000000000803d9a8 0xc4 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - 0x000000000803d9a8 tcp_send_empty_ack + 0x000000000803da2c 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0x000000000803dd0c tcp_timer_needed .text.sys_timeout_abs - 0x000000000803dcc8 0xdc ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + 0x000000000803dd4c 0xdc ./Middlewares/Third_Party/LwIP/src/core/timeouts.o .text.lwip_cyclic_timer - 0x000000000803dda4 0x64 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + 0x000000000803de28 0x64 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o .text.sys_timeouts_init - 0x000000000803de08 0x44 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - 0x000000000803de08 sys_timeouts_init + 0x000000000803de8c 0x44 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + 0x000000000803de8c sys_timeouts_init .text.sys_timeout - 0x000000000803de4c 0x4c ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - 0x000000000803de4c sys_timeout + 0x000000000803ded0 0x4c ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + 0x000000000803ded0 sys_timeout .text.sys_check_timeouts - 0x000000000803de98 0x84 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - 0x000000000803de98 sys_check_timeouts + 0x000000000803df1c 0x84 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + 0x000000000803df1c sys_check_timeouts .text.udp_init - 0x000000000803df1c 0x24 ./Middlewares/Third_Party/LwIP/src/core/udp.o - 0x000000000803df1c udp_init + 0x000000000803dfa0 0x24 ./Middlewares/Third_Party/LwIP/src/core/udp.o + 0x000000000803dfa0 udp_init .text.udp_input_local_match - 0x000000000803df40 0xc8 ./Middlewares/Third_Party/LwIP/src/core/udp.o + 0x000000000803dfc4 0xc8 ./Middlewares/Third_Party/LwIP/src/core/udp.o .text.udp_input - 0x000000000803e008 0x228 ./Middlewares/Third_Party/LwIP/src/core/udp.o - 0x000000000803e008 udp_input + 0x000000000803e08c 0x228 ./Middlewares/Third_Party/LwIP/src/core/udp.o + 0x000000000803e08c udp_input .text.udp_netif_ip_addr_changed - 0x000000000803e230 0x60 ./Middlewares/Third_Party/LwIP/src/core/udp.o - 0x000000000803e230 udp_netif_ip_addr_changed + 0x000000000803e2b4 0x60 ./Middlewares/Third_Party/LwIP/src/core/udp.o + 0x000000000803e2b4 udp_netif_ip_addr_changed .text.etharp_free_entry - 0x000000000803e290 0x64 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + 0x000000000803e314 0x64 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o .text.etharp_tmr - 0x000000000803e2f4 0x150 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o - 0x000000000803e2f4 etharp_tmr + 0x000000000803e378 0x150 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + 0x000000000803e378 etharp_tmr .text.etharp_find_entry - 0x000000000803e444 0x2f0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + 0x000000000803e4c8 0x2f0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o .text.etharp_update_arp_entry - 0x000000000803e734 0x14c ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + 0x000000000803e7b8 0x14c ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o .text.etharp_cleanup_netif - 0x000000000803e880 0x60 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o - 0x000000000803e880 etharp_cleanup_netif + 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0x000000000803f5f4 0x54 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o .text.ip4_input - 0x000000000803f5c4 0x248 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o - 0x000000000803f5c4 ip4_input + 0x000000000803f648 0x248 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + 0x000000000803f648 ip4_input .text.ip4_output_if - 0x000000000803f80c 0x54 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o - 0x000000000803f80c ip4_output_if + 0x000000000803f890 0x54 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + 0x000000000803f890 ip4_output_if .text.ip4_output_if_src - 0x000000000803f860 0x15c ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o - 0x000000000803f860 ip4_output_if_src + 0x000000000803f8e4 0x15c ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + 0x000000000803f8e4 ip4_output_if_src .text.ip4_addr_isbroadcast_u32 - 0x000000000803f9bc 0x82 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o - 0x000000000803f9bc ip4_addr_isbroadcast_u32 - *fill* 0x000000000803fa3e 0x2 + 0x000000000803fa40 0x82 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o + 0x000000000803fa40 ip4_addr_isbroadcast_u32 + *fill* 0x000000000803fac2 0x2 .text.ip_reass_tmr - 0x000000000803fa40 0x58 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o - 0x000000000803fa40 ip_reass_tmr + 0x000000000803fac4 0x58 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x000000000803fac4 ip_reass_tmr .text.ip_reass_free_complete_datagram - 0x000000000803fa98 0x148 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x000000000803fb1c 0x148 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .text.ip_reass_remove_oldest_datagram - 0x000000000803fbe0 0xc4 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x000000000803fc64 0xc4 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .text.ip_reass_enqueue_new_datagram - 0x000000000803fca4 0x74 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x000000000803fd28 0x74 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .text.ip_reass_dequeue_datagram - 0x000000000803fd18 0x5c ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x000000000803fd9c 0x5c ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .text.ip_reass_chain_frag_into_datagram_and_validate - 0x000000000803fd74 0x2d4 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x000000000803fdf8 0x2d4 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .text.ip4_reass - 0x0000000008040048 0x338 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o - 0x0000000008040048 ip4_reass + 0x00000000080400cc 0x338 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x00000000080400cc ip4_reass .text.ip_frag_alloc_pbuf_custom_ref - 0x0000000008040380 0x10 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x0000000008040404 0x10 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .text.ip_frag_free_pbuf_custom_ref - 0x0000000008040390 0x38 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tcp_pcb_lists + 0x0000000008044e58 0x10 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000008044e58 tcp_pcb_lists .rodata.lwip_cyclic_timers - 0x0000000008044de8 0x18 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - 0x0000000008044de8 lwip_cyclic_timers + 0x0000000008044e68 0x18 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + 0x0000000008044e68 lwip_cyclic_timers .rodata.ip_addr_any - 0x0000000008044e00 0x4 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o - 0x0000000008044e00 ip_addr_any + 0x0000000008044e80 0x4 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o + 0x0000000008044e80 ip_addr_any .rodata.ethbroadcast - 0x0000000008044e04 0x6 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o - 0x0000000008044e04 ethbroadcast - *fill* 0x0000000008044e0a 0x2 + 0x0000000008044e84 0x6 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o + 0x0000000008044e84 ethbroadcast + *fill* 0x0000000008044e8a 0x2 .rodata.ethzero - 0x0000000008044e0c 0x6 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o - 0x0000000008044e0c ethzero - *fill* 0x0000000008044e12 0x2 + 0x0000000008044e8c 0x6 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o + 0x0000000008044e8c ethzero + *fill* 0x0000000008044e92 0x2 .rodata._global_impure_ptr - 0x0000000008044e14 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-impure.o) - 0x0000000008044e14 _global_impure_ptr + 0x0000000008044e94 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-impure.o) + 0x0000000008044e94 _global_impure_ptr .rodata.srand.str1.1 - 0x0000000008044e18 0x72 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-rand.o) + 0x0000000008044e98 0x72 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-rand.o) .rodata.__assert_func.str1.1 - 0x0000000008044e8a 0x3c d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-assert.o) + 0x0000000008044f0a 0x3c d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-assert.o) 0x3d (size before relaxing) - *fill* 0x0000000008044ec6 0x2 + *fill* 0x0000000008044f46 0x2 .rodata.__sf_fake_stderr - 0x0000000008044ec8 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) - 0x0000000008044ec8 __sf_fake_stderr + 0x0000000008044f48 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) + 0x0000000008044f48 __sf_fake_stderr .rodata.__sf_fake_stdin - 0x0000000008044ee8 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) - 0x0000000008044ee8 __sf_fake_stdin + 0x0000000008044f68 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) + 0x0000000008044f68 __sf_fake_stdin .rodata.__sf_fake_stdout - 0x0000000008044f08 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) - 0x0000000008044f08 __sf_fake_stdout + 0x0000000008044f88 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) + 0x0000000008044f88 __sf_fake_stdout .rodata._svfprintf_r.str1.1 - 0x0000000008044f28 0x11 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-svfprintf.o) + 0x0000000008044fa8 0x11 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-svfprintf.o) .rodata._vfprintf_r.str1.1 - 0x0000000008044f39 0x11 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-vfprintf.o) + 0x0000000008044fb9 0x11 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-vfprintf.o) .rodata._printf_i.str1.1 - 0x0000000008044f39 0x22 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o) - *fill* 0x0000000008044f5b 0x5 + 0x0000000008044fb9 0x22 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-vfprintf_i.o) + *fill* 0x0000000008044fdb 0x5 .rodata.__log_data - 0x0000000008044f60 0x890 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libm.a(lib_a-log_data.o) - 0x0000000008044f60 __log_data - 0x00000000080457f0 . = ALIGN (0x4) + 0x0000000008044fe0 0x890 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libm.a(lib_a-log_data.o) + 0x0000000008044fe0 __log_data + 0x0000000008045870 . = ALIGN (0x4) .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) -.ARM 0x00000000080457f0 0x8 - 0x00000000080457f0 __exidx_start = . +.ARM 0x0000000008045870 0x8 + 0x0000000008045870 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x00000000080457f0 0x8 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard\libgcc.a(_udivmoddi4.o) - 0x00000000080457f8 __exidx_end = . + .ARM.exidx 0x0000000008045870 0x8 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard\libgcc.a(_udivmoddi4.o) + 0x0000000008045878 __exidx_end = . -.rel.dyn 0x00000000080457f8 0x0 - .rel.iplt 0x00000000080457f8 0x0 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o +.rel.dyn 0x0000000008045878 0x0 + .rel.iplt 0x0000000008045878 0x0 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o -.preinit_array 0x00000000080457f8 0x0 - 0x00000000080457f8 PROVIDE (__preinit_array_start = .) +.preinit_array 0x0000000008045878 0x0 + 0x0000000008045878 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x00000000080457f8 PROVIDE (__preinit_array_end = .) + 0x0000000008045878 PROVIDE (__preinit_array_end = .) -.init_array 0x00000000080457f8 0x4 - 0x00000000080457f8 PROVIDE (__init_array_start = .) +.init_array 0x0000000008045878 0x4 + 0x0000000008045878 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x00000000080457f8 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x00000000080457fc PROVIDE (__init_array_end = .) + .init_array 0x0000000008045878 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x000000000804587c PROVIDE (__init_array_end = .) -.fini_array 0x00000000080457fc 0x4 +.fini_array 0x000000000804587c 0x4 [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x00000000080457fc 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o + .fini_array 0x000000000804587c 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x0000000008045800 _sidata = LOADADDR (.data) + 0x0000000008045880 _sidata = LOADADDR (.data) -.data 0x0000000024000000 0xdc load address 0x0000000008045800 +.data 0x0000000024000000 0xdc load address 0x0000000008045880 0x0000000024000000 . = ALIGN (0x4) 0x0000000024000000 _sdata = . *(.data) @@ -39405,11 +39410,11 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext 0x00000000240000dc . = ALIGN (0x4) 0x00000000240000dc _edata = . -.igot.plt 0x00000000240000dc 0x0 load address 0x00000000080458dc +.igot.plt 0x00000000240000dc 0x0 load address 0x000000000804595c .igot.plt 0x00000000240000dc 0x0 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard/crtbegin.o 0x00000000240000dc . = ALIGN (0x4) -.bss 0x00000000240000dc 0xe9e8 load address 0x00000000080458dc +.bss 0x00000000240000dc 0xe9f0 load address 0x000000000804595c 0x00000000240000dc _sbss = . 0x00000000240000dc __bss_start__ = _sbss *(.bss) @@ -39575,263 +39580,268 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext 0x000000002400aed8 0x4 ./Core/Src/fdcan.o .bss.hi2c4 0x000000002400aedc 0x4c ./Core/Src/i2c.o 0x000000002400aedc hi2c4 - .bss.ledTick 0x000000002400af28 0x4 ./Core/Src/main.o - 0x000000002400af28 ledTick - .bss.hqspi 0x000000002400af2c 0x4c ./Core/Src/quadspi.o - 0x000000002400af2c hqspi + .bss.g_state 0x000000002400af28 0x1 ./Core/Src/main.o + 0x000000002400af28 g_state + *fill* 0x000000002400af29 0x3 + .bss.g_tick 0x000000002400af2c 0x4 ./Core/Src/main.o + 0x000000002400af2c g_tick + .bss.ledTick 0x000000002400af30 0x4 ./Core/Src/main.o + 0x000000002400af30 ledTick + .bss.hqspi 0x000000002400af34 0x4c ./Core/Src/quadspi.o + 0x000000002400af34 hqspi .bss.__sbrk_heap_end - 0x000000002400af78 0x4 ./Core/Src/sysmem.o - .bss.htim1 0x000000002400af7c 0x4c ./Core/Src/tim.o - 0x000000002400af7c htim1 - .bss.htim8 0x000000002400afc8 0x4c ./Core/Src/tim.o - 0x000000002400afc8 htim8 - .bss.hlpuart1 0x000000002400b014 0x90 ./Core/Src/usart.o - 0x000000002400b014 hlpuart1 - .bss.huart4 0x000000002400b0a4 0x90 ./Core/Src/usart.o - 0x000000002400b0a4 huart4 - .bss.huart5 0x000000002400b134 0x90 ./Core/Src/usart.o - 0x000000002400b134 huart5 - .bss.huart7 0x000000002400b1c4 0x90 ./Core/Src/usart.o - 0x000000002400b1c4 huart7 - .bss.huart1 0x000000002400b254 0x90 ./Core/Src/usart.o - 0x000000002400b254 huart1 - .bss.huart2 0x000000002400b2e4 0x90 ./Core/Src/usart.o - 0x000000002400b2e4 huart2 - .bss.huart3 0x000000002400b374 0x90 ./Core/Src/usart.o - 0x000000002400b374 huart3 - .bss.huart6 0x000000002400b404 0x90 ./Core/Src/usart.o - 0x000000002400b404 huart6 + 0x000000002400af80 0x4 ./Core/Src/sysmem.o + .bss.htim1 0x000000002400af84 0x4c ./Core/Src/tim.o + 0x000000002400af84 htim1 + .bss.htim8 0x000000002400afd0 0x4c ./Core/Src/tim.o + 0x000000002400afd0 htim8 + .bss.hlpuart1 0x000000002400b01c 0x90 ./Core/Src/usart.o + 0x000000002400b01c hlpuart1 + .bss.huart4 0x000000002400b0ac 0x90 ./Core/Src/usart.o + 0x000000002400b0ac huart4 + .bss.huart5 0x000000002400b13c 0x90 ./Core/Src/usart.o + 0x000000002400b13c huart5 + .bss.huart7 0x000000002400b1cc 0x90 ./Core/Src/usart.o + 0x000000002400b1cc huart7 + .bss.huart1 0x000000002400b25c 0x90 ./Core/Src/usart.o + 0x000000002400b25c huart1 + .bss.huart2 0x000000002400b2ec 0x90 ./Core/Src/usart.o + 0x000000002400b2ec huart2 + .bss.huart3 0x000000002400b37c 0x90 ./Core/Src/usart.o + 0x000000002400b37c huart3 + .bss.huart6 0x000000002400b40c 0x90 ./Core/Src/usart.o + 0x000000002400b40c huart6 .bss.hdma_lpuart1_tx - 0x000000002400b494 0x78 ./Core/Src/usart.o - 0x000000002400b494 hdma_lpuart1_tx + 0x000000002400b49c 0x78 ./Core/Src/usart.o + 0x000000002400b49c hdma_lpuart1_tx .bss.hdma_uart4_tx - 0x000000002400b50c 0x78 ./Core/Src/usart.o - 0x000000002400b50c hdma_uart4_tx + 0x000000002400b514 0x78 ./Core/Src/usart.o + 0x000000002400b514 hdma_uart4_tx .bss.hdma_uart5_tx - 0x000000002400b584 0x78 ./Core/Src/usart.o - 0x000000002400b584 hdma_uart5_tx + 0x000000002400b58c 0x78 ./Core/Src/usart.o + 0x000000002400b58c hdma_uart5_tx .bss.hdma_uart7_tx - 0x000000002400b5fc 0x78 ./Core/Src/usart.o - 0x000000002400b5fc hdma_uart7_tx + 0x000000002400b604 0x78 ./Core/Src/usart.o + 0x000000002400b604 hdma_uart7_tx .bss.hdma_usart1_tx - 0x000000002400b674 0x78 ./Core/Src/usart.o - 0x000000002400b674 hdma_usart1_tx + 0x000000002400b67c 0x78 ./Core/Src/usart.o + 0x000000002400b67c hdma_usart1_tx .bss.hdma_usart2_tx - 0x000000002400b6ec 0x78 ./Core/Src/usart.o - 0x000000002400b6ec hdma_usart2_tx + 0x000000002400b6f4 0x78 ./Core/Src/usart.o + 0x000000002400b6f4 hdma_usart2_tx .bss.hdma_usart3_tx - 0x000000002400b764 0x78 ./Core/Src/usart.o - 0x000000002400b764 hdma_usart3_tx + 0x000000002400b76c 0x78 ./Core/Src/usart.o + 0x000000002400b76c hdma_usart3_tx .bss.hdma_usart6_tx - 0x000000002400b7dc 0x78 ./Core/Src/usart.o - 0x000000002400b7dc hdma_usart6_tx - .bss.uwTick 0x000000002400b854 0x4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - 0x000000002400b854 uwTick + 0x000000002400b7e4 0x78 ./Core/Src/usart.o + 0x000000002400b7e4 hdma_usart6_tx + .bss.uwTick 0x000000002400b85c 0x4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x000000002400b85c uwTick .bss.EthernetLinkTimer - 0x000000002400b858 0x4 ./LWIP/App/lwip.o - 0x000000002400b858 EthernetLinkTimer - .bss.gnetif 0x000000002400b85c 0x38 ./LWIP/App/lwip.o - 0x000000002400b85c gnetif - .bss.ipaddr 0x000000002400b894 0x4 ./LWIP/App/lwip.o - 0x000000002400b894 ipaddr - .bss.netmask 0x000000002400b898 0x4 ./LWIP/App/lwip.o - 0x000000002400b898 netmask - .bss.gw 0x000000002400b89c 0x4 ./LWIP/App/lwip.o - 0x000000002400b89c gw + 0x000000002400b860 0x4 ./LWIP/App/lwip.o + 0x000000002400b860 EthernetLinkTimer + .bss.gnetif 0x000000002400b864 0x38 ./LWIP/App/lwip.o + 0x000000002400b864 gnetif + .bss.ipaddr 0x000000002400b89c 0x4 ./LWIP/App/lwip.o + 0x000000002400b89c ipaddr + .bss.netmask 0x000000002400b8a0 0x4 ./LWIP/App/lwip.o + 0x000000002400b8a0 netmask + .bss.gw 0x000000002400b8a4 0x4 ./LWIP/App/lwip.o + 0x000000002400b8a4 gw .bss.IP_ADDRESS - 0x000000002400b8a0 0x4 ./LWIP/App/lwip.o - 0x000000002400b8a0 IP_ADDRESS + 0x000000002400b8a8 0x4 ./LWIP/App/lwip.o + 0x000000002400b8a8 IP_ADDRESS .bss.NETMASK_ADDRESS - 0x000000002400b8a4 0x4 ./LWIP/App/lwip.o - 0x000000002400b8a4 NETMASK_ADDRESS + 0x000000002400b8ac 0x4 ./LWIP/App/lwip.o + 0x000000002400b8ac NETMASK_ADDRESS .bss.GATEWAY_ADDRESS - 0x000000002400b8a8 0x4 ./LWIP/App/lwip.o - 0x000000002400b8a8 GATEWAY_ADDRESS + 0x000000002400b8b0 0x4 ./LWIP/App/lwip.o + 0x000000002400b8b0 GATEWAY_ADDRESS .bss.memp_tab_RX_POOL - 0x000000002400b8ac 0x4 ./LWIP/Target/ethernetif.o + 0x000000002400b8b4 0x4 ./LWIP/Target/ethernetif.o .bss.RxAllocStatus - 0x000000002400b8b0 0x1 ./LWIP/Target/ethernetif.o - *fill* 0x000000002400b8b1 0x3 - .bss.heth 0x000000002400b8b4 0xb0 ./LWIP/Target/ethernetif.o - 0x000000002400b8b4 heth - .bss.TxConfig 0x000000002400b964 0x38 ./LWIP/Target/ethernetif.o - 0x000000002400b964 TxConfig - .bss.LAN8742 0x000000002400b99c 0x20 ./LWIP/Target/ethernetif.o - 0x000000002400b99c LAN8742 - .bss.ip_data 0x000000002400b9bc 0x18 ./Middlewares/Third_Party/LwIP/src/core/ip.o - 0x000000002400b9bc ip_data - .bss.ram 0x000000002400b9d4 0x4 ./Middlewares/Third_Party/LwIP/src/core/mem.o - .bss.ram_end 0x000000002400b9d8 0x4 ./Middlewares/Third_Party/LwIP/src/core/mem.o - .bss.lfree 0x000000002400b9dc 0x4 ./Middlewares/Third_Party/LwIP/src/core/mem.o + 0x000000002400b8b8 0x1 ./LWIP/Target/ethernetif.o + *fill* 0x000000002400b8b9 0x3 + .bss.heth 0x000000002400b8bc 0xb0 ./LWIP/Target/ethernetif.o + 0x000000002400b8bc heth + .bss.TxConfig 0x000000002400b96c 0x38 ./LWIP/Target/ethernetif.o + 0x000000002400b96c TxConfig + .bss.LAN8742 0x000000002400b9a4 0x20 ./LWIP/Target/ethernetif.o + 0x000000002400b9a4 LAN8742 + .bss.ip_data 0x000000002400b9c4 0x18 ./Middlewares/Third_Party/LwIP/src/core/ip.o + 0x000000002400b9c4 ip_data + .bss.ram 0x000000002400b9dc 0x4 ./Middlewares/Third_Party/LwIP/src/core/mem.o + .bss.ram_end 0x000000002400b9e0 0x4 ./Middlewares/Third_Party/LwIP/src/core/mem.o + .bss.lfree 0x000000002400b9e4 0x4 ./Middlewares/Third_Party/LwIP/src/core/mem.o .bss.memp_memory_UDP_PCB_base - 0x000000002400b9e0 0x103 ./Middlewares/Third_Party/LwIP/src/core/memp.o - 0x000000002400b9e0 memp_memory_UDP_PCB_base - *fill* 0x000000002400bae3 0x1 + 0x000000002400b9e8 0x103 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400b9e8 memp_memory_UDP_PCB_base + *fill* 0x000000002400baeb 0x1 .bss.memp_tab_UDP_PCB - 0x000000002400bae4 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400baec 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o .bss.memp_memory_TCP_PCB_base - 0x000000002400bae8 0x30f ./Middlewares/Third_Party/LwIP/src/core/memp.o - 0x000000002400bae8 memp_memory_TCP_PCB_base - *fill* 0x000000002400bdf7 0x1 + 0x000000002400baf0 0x30f ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400baf0 memp_memory_TCP_PCB_base + *fill* 0x000000002400bdff 0x1 .bss.memp_tab_TCP_PCB - 0x000000002400bdf8 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400be00 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o .bss.memp_memory_TCP_PCB_LISTEN_base - 0x000000002400bdfc 0xe3 ./Middlewares/Third_Party/LwIP/src/core/memp.o - 0x000000002400bdfc memp_memory_TCP_PCB_LISTEN_base - *fill* 0x000000002400bedf 0x1 + 0x000000002400be04 0xe3 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400be04 memp_memory_TCP_PCB_LISTEN_base + *fill* 0x000000002400bee7 0x1 .bss.memp_tab_TCP_PCB_LISTEN - 0x000000002400bee0 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400bee8 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o .bss.memp_memory_TCP_SEG_base - 0x000000002400bee4 0x103 ./Middlewares/Third_Party/LwIP/src/core/memp.o - 0x000000002400bee4 memp_memory_TCP_SEG_base - *fill* 0x000000002400bfe7 0x1 + 0x000000002400beec 0x103 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400beec memp_memory_TCP_SEG_base + *fill* 0x000000002400bfef 0x1 .bss.memp_tab_TCP_SEG - 0x000000002400bfe8 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400bff0 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o .bss.memp_memory_REASSDATA_base - 0x000000002400bfec 0xa3 ./Middlewares/Third_Party/LwIP/src/core/memp.o - 0x000000002400bfec memp_memory_REASSDATA_base - *fill* 0x000000002400c08f 0x1 + 0x000000002400bff4 0xa3 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400bff4 memp_memory_REASSDATA_base + *fill* 0x000000002400c097 0x1 .bss.memp_tab_REASSDATA - 0x000000002400c090 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400c098 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o .bss.memp_memory_FRAG_PBUF_base - 0x000000002400c094 0x16b ./Middlewares/Third_Party/LwIP/src/core/memp.o - 0x000000002400c094 memp_memory_FRAG_PBUF_base - *fill* 0x000000002400c1ff 0x1 + 0x000000002400c09c 0x16b ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400c09c memp_memory_FRAG_PBUF_base + *fill* 0x000000002400c207 0x1 .bss.memp_tab_FRAG_PBUF - 0x000000002400c200 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400c208 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o .bss.memp_memory_SYS_TIMEOUT_base - 0x000000002400c204 0x33 ./Middlewares/Third_Party/LwIP/src/core/memp.o - 0x000000002400c204 memp_memory_SYS_TIMEOUT_base - *fill* 0x000000002400c237 0x1 + 0x000000002400c20c 0x33 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400c20c memp_memory_SYS_TIMEOUT_base + *fill* 0x000000002400c23f 0x1 .bss.memp_tab_SYS_TIMEOUT - 0x000000002400c238 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400c240 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o .bss.memp_memory_PBUF_base - 0x000000002400c23c 0x103 ./Middlewares/Third_Party/LwIP/src/core/memp.o - 0x000000002400c23c memp_memory_PBUF_base - *fill* 0x000000002400c33f 0x1 + 0x000000002400c244 0x103 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400c244 memp_memory_PBUF_base + *fill* 0x000000002400c347 0x1 .bss.memp_tab_PBUF - 0x000000002400c340 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400c348 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o .bss.memp_memory_PBUF_POOL_base - 0x000000002400c344 0x2603 ./Middlewares/Third_Party/LwIP/src/core/memp.o - 0x000000002400c344 memp_memory_PBUF_POOL_base - *fill* 0x000000002400e947 0x1 + 0x000000002400c34c 0x2603 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400c34c memp_memory_PBUF_POOL_base + *fill* 0x000000002400e94f 0x1 .bss.memp_tab_PBUF_POOL - 0x000000002400e948 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x000000002400e950 0x4 ./Middlewares/Third_Party/LwIP/src/core/memp.o .bss.netif_list - 0x000000002400e94c 0x4 ./Middlewares/Third_Party/LwIP/src/core/netif.o - 0x000000002400e94c netif_list + 0x000000002400e954 0x4 ./Middlewares/Third_Party/LwIP/src/core/netif.o + 0x000000002400e954 netif_list .bss.netif_default - 0x000000002400e950 0x4 ./Middlewares/Third_Party/LwIP/src/core/netif.o - 0x000000002400e950 netif_default + 0x000000002400e958 0x4 ./Middlewares/Third_Party/LwIP/src/core/netif.o + 0x000000002400e958 netif_default .bss.netif_num - 0x000000002400e954 0x1 ./Middlewares/Third_Party/LwIP/src/core/netif.o + 0x000000002400e95c 0x1 ./Middlewares/Third_Party/LwIP/src/core/netif.o .bss.pbuf_free_ooseq_pending - 0x000000002400e955 0x1 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - 0x000000002400e955 pbuf_free_ooseq_pending - *fill* 0x000000002400e956 0x2 + 0x000000002400e95d 0x1 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x000000002400e95d pbuf_free_ooseq_pending + *fill* 0x000000002400e95e 0x2 .bss.tcp_ticks - 0x000000002400e958 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000002400e958 tcp_ticks + 0x000000002400e960 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000002400e960 tcp_ticks .bss.tcp_bound_pcbs - 0x000000002400e95c 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000002400e95c tcp_bound_pcbs + 0x000000002400e964 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000002400e964 tcp_bound_pcbs .bss.tcp_listen_pcbs - 0x000000002400e960 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000002400e960 tcp_listen_pcbs + 0x000000002400e968 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000002400e968 tcp_listen_pcbs .bss.tcp_active_pcbs - 0x000000002400e964 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000002400e964 tcp_active_pcbs + 0x000000002400e96c 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000002400e96c tcp_active_pcbs .bss.tcp_tw_pcbs - 0x000000002400e968 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000002400e968 tcp_tw_pcbs + 0x000000002400e970 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000002400e970 tcp_tw_pcbs .bss.tcp_active_pcbs_changed - 0x000000002400e96c 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - 0x000000002400e96c tcp_active_pcbs_changed + 0x000000002400e974 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000002400e974 tcp_active_pcbs_changed .bss.tcp_timer - 0x000000002400e96d 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x000000002400e975 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .bss.tcp_timer_ctr - 0x000000002400e96e 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - *fill* 0x000000002400e96f 0x1 - .bss.inseg 0x000000002400e970 0x10 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .bss.tcphdr 0x000000002400e980 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000002400e976 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + *fill* 0x000000002400e977 0x1 + .bss.inseg 0x000000002400e978 0x10 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .bss.tcphdr 0x000000002400e988 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .bss.tcphdr_optlen - 0x000000002400e984 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000002400e98c 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .bss.tcphdr_opt1len - 0x000000002400e986 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000002400e98e 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .bss.tcphdr_opt2 - 0x000000002400e988 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000002400e990 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .bss.tcp_optidx - 0x000000002400e98c 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - *fill* 0x000000002400e98e 0x2 - .bss.seqno 0x000000002400e990 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .bss.ackno 0x000000002400e994 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000002400e994 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + *fill* 0x000000002400e996 0x2 + .bss.seqno 0x000000002400e998 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .bss.ackno 0x000000002400e99c 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .bss.recv_acked - 0x000000002400e998 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .bss.tcplen 0x000000002400e99a 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .bss.flags 0x000000002400e99c 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000002400e9a0 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .bss.tcplen 0x000000002400e9a2 0x2 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .bss.flags 0x000000002400e9a4 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .bss.recv_flags - 0x000000002400e99d 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - *fill* 0x000000002400e99e 0x2 + 0x000000002400e9a5 0x1 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + *fill* 0x000000002400e9a6 0x2 .bss.recv_data - 0x000000002400e9a0 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000002400e9a8 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .bss.tcp_input_pcb - 0x000000002400e9a4 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - 0x000000002400e9a4 tcp_input_pcb + 0x000000002400e9ac 0x4 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x000000002400e9ac tcp_input_pcb .bss.next_timeout - 0x000000002400e9a8 0x4 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + 0x000000002400e9b0 0x4 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o .bss.current_timeout_due_time - 0x000000002400e9ac 0x4 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + 0x000000002400e9b4 0x4 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o .bss.tcpip_tcp_timer_active - 0x000000002400e9b0 0x4 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - .bss.udp_pcbs 0x000000002400e9b4 0x4 ./Middlewares/Third_Party/LwIP/src/core/udp.o - 0x000000002400e9b4 udp_pcbs + 0x000000002400e9b8 0x4 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + .bss.udp_pcbs 0x000000002400e9bc 0x4 ./Middlewares/Third_Party/LwIP/src/core/udp.o + 0x000000002400e9bc udp_pcbs .bss.arp_table - 0x000000002400e9b8 0xf0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + 0x000000002400e9c0 0xf0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o .bss.etharp_cached_entry - 0x000000002400eaa8 0x1 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o - *fill* 0x000000002400eaa9 0x1 - .bss.ip_id 0x000000002400eaaa 0x2 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + 0x000000002400eab0 0x1 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + *fill* 0x000000002400eab1 0x1 + .bss.ip_id 0x000000002400eab2 0x2 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o .bss.reassdatagrams - 0x000000002400eaac 0x4 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x000000002400eab4 0x4 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .bss.ip_reass_pbufcount - 0x000000002400eab0 0x2 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o - *fill* 0x000000002400eab2 0x2 + 0x000000002400eab8 0x2 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + *fill* 0x000000002400eaba 0x2 .bss.__malloc_free_list - 0x000000002400eab4 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-mallocr.o) - 0x000000002400eab4 __malloc_free_list + 0x000000002400eabc 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-mallocr.o) + 0x000000002400eabc __malloc_free_list .bss.__malloc_sbrk_start - 0x000000002400eab8 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-mallocr.o) - 0x000000002400eab8 __malloc_sbrk_start - .bss.errno 0x000000002400eabc 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-reent.o) - 0x000000002400eabc errno + 0x000000002400eac0 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-mallocr.o) + 0x000000002400eac0 __malloc_sbrk_start + .bss.errno 0x000000002400eac4 0x4 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-reent.o) + 0x000000002400eac4 errno .bss.__lock___malloc_recursive_mutex - 0x000000002400eac0 0x1 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-lock.o) - 0x000000002400eac0 __lock___malloc_recursive_mutex + 0x000000002400eac8 0x1 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-lock.o) + 0x000000002400eac8 __lock___malloc_recursive_mutex .bss.__lock___sfp_recursive_mutex - 0x000000002400eac1 0x1 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-lock.o) - 0x000000002400eac1 __lock___sfp_recursive_mutex + 0x000000002400eac9 0x1 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-lock.o) + 0x000000002400eac9 __lock___sfp_recursive_mutex .bss.__lock___sinit_recursive_mutex - 0x000000002400eac2 0x1 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-lock.o) - 0x000000002400eac2 __lock___sinit_recursive_mutex + 0x000000002400eaca 0x1 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-lock.o) + 0x000000002400eaca __lock___sinit_recursive_mutex *(COMMON) - 0x000000002400eac4 . = ALIGN (0x4) - *fill* 0x000000002400eac3 0x1 - 0x000000002400eac4 _ebss = . - 0x000000002400eac4 __bss_end__ = _ebss + 0x000000002400eacc . = ALIGN (0x4) + *fill* 0x000000002400eacb 0x1 + 0x000000002400eacc _ebss = . + 0x000000002400eacc __bss_end__ = _ebss ._user_heap_stack - 0x000000002400eac4 0x1404 load address 0x00000000080458dc - 0x000000002400eac8 . = ALIGN (0x8) - *fill* 0x000000002400eac4 0x4 + 0x000000002400eacc 0x1404 load address 0x000000000804595c + 0x000000002400ead0 . = ALIGN (0x8) + *fill* 0x000000002400eacc 0x4 [!provide] PROVIDE (end = .) - 0x000000002400eac8 PROVIDE (_end = .) - 0x000000002400eec8 . = (. + _Min_Heap_Size) - *fill* 0x000000002400eac8 0x400 - 0x000000002400fec8 . = (. + _Min_Stack_Size) - *fill* 0x000000002400eec8 0x1000 - 0x000000002400fec8 . = ALIGN (0x8) + 0x000000002400ead0 PROVIDE (_end = .) + 0x000000002400eed0 . = (. + _Min_Heap_Size) + *fill* 0x000000002400ead0 0x400 + 0x000000002400fed0 . = (. + _Min_Stack_Size) + *fill* 0x000000002400eed0 0x1000 + 0x000000002400fed0 . = ALIGN (0x8) -.lwip_sec 0x0000000030000000 0x40260 load address 0x00000000080458dc +.lwip_sec 0x0000000030000000 0x40260 load address 0x000000000804595c 0x0000000030030000 . = ABSOLUTE (0x30030000) *fill* 0x0000000030000000 0x30000 *(.Rx_PoolSection) @@ -40113,7 +40123,7 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libm.a LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+dp/hard\libgcc.a -.debug_info 0x0000000000000000 0x4b350 +.debug_info 0x0000000000000000 0x4b3b9 .debug_info 0x0000000000000000 0x8e0 ./Core/BASE/Src/BSP/BHBF_ROBOT.o .debug_info 0x00000000000008e0 0xd77 ./Core/BASE/Src/BSP/bsp_DLT_Log.o .debug_info 0x0000000000001657 0x669 ./Core/BASE/Src/BSP/bsp_EEPROM.o @@ -40135,58 +40145,58 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .debug_info 0x000000000000cc74 0x15d4 ./Core/Src/fdcan.o .debug_info 0x000000000000e248 0x6c5 ./Core/Src/gpio.o .debug_info 0x000000000000e90d 0x13fa ./Core/Src/i2c.o - .debug_info 0x000000000000fd07 0x2354 ./Core/Src/main.o - .debug_info 0x000000000001205b 0x1436 ./Core/Src/quadspi.o - .debug_info 0x0000000000013491 0x4a4 ./Core/Src/stm32h7xx_hal_msp.o - .debug_info 0x0000000000013935 0x2ec5 ./Core/Src/stm32h7xx_it.o - .debug_info 0x00000000000167fa 0x6ee ./Core/Src/syscalls.o - .debug_info 0x0000000000016ee8 0x175 ./Core/Src/sysmem.o - .debug_info 0x000000000001705d 0xd07 ./Core/Src/system_stm32h7xx.o - .debug_info 0x0000000000017d64 0x1167 ./Core/Src/tim.o - .debug_info 0x0000000000018ecb 0x193d ./Core/Src/usart.o - .debug_info 0x000000000001a808 0x22 ./Core/Startup/startup_stm32h743vgtx.o - .debug_info 0x000000000001a82a 0x648 ./Drivers/BSP/Components/lan8742/lan8742.o - .debug_info 0x000000000001ae72 0x15d7 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - .debug_info 0x000000000001c449 0x1f9c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - .debug_info 0x000000000001e3e5 0x116d ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - .debug_info 0x000000000001f552 0xcd5 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o - .debug_info 0x0000000000020227 0x2b55 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - .debug_info 0x0000000000022d7c 0x2dae ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - .debug_info 0x0000000000025b2a 0xd28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - .debug_info 0x0000000000026852 0x23b3 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - .debug_info 0x0000000000028c05 0xe39 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - .debug_info 0x0000000000029a3e 0xc89 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o - .debug_info 0x000000000002a6c7 0x109d ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o - .debug_info 0x000000000002b764 0x1392 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - .debug_info 0x000000000002caf6 0xf4a ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o - .debug_info 0x000000000002da40 0x12b4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o - .debug_info 0x000000000002ecf4 0x2dd1 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o - .debug_info 0x0000000000031ac5 0x18f4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o - .debug_info 0x00000000000333b9 0x4c42 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o - .debug_info 0x0000000000037ffb 0x100b ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o - .debug_info 0x0000000000039006 0x60e ./LWIP/App/lwip.o - .debug_info 0x0000000000039614 0x2fba ./LWIP/Target/ethernetif.o - .debug_info 0x000000000003c5ce 0x3af ./Middlewares/Third_Party/LwIP/src/core/def.o - .debug_info 0x000000000003c97d 0x665 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o - .debug_info 0x000000000003cfe2 0xeb ./Middlewares/Third_Party/LwIP/src/core/init.o - .debug_info 0x000000000003d0cd 0x516 ./Middlewares/Third_Party/LwIP/src/core/ip.o - .debug_info 0x000000000003d5e3 0x590 ./Middlewares/Third_Party/LwIP/src/core/mem.o - .debug_info 0x000000000003db73 0x636 ./Middlewares/Third_Party/LwIP/src/core/memp.o - .debug_info 0x000000000003e1a9 0xcde ./Middlewares/Third_Party/LwIP/src/core/netif.o - .debug_info 0x000000000003ee87 0x18bc ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - .debug_info 0x0000000000040743 0x1ebf ./Middlewares/Third_Party/LwIP/src/core/tcp.o - .debug_info 0x0000000000042602 0x162a ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .debug_info 0x0000000000043c2c 0x1a8c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - .debug_info 0x00000000000456b8 0xd03 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - .debug_info 0x00000000000463bb 0xf53 ./Middlewares/Third_Party/LwIP/src/core/udp.o - .debug_info 0x000000000004730e 0xf08 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o - .debug_info 0x0000000000048216 0x9c3 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o - .debug_info 0x0000000000048bd9 0xa66 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o - .debug_info 0x000000000004963f 0x715 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o - .debug_info 0x0000000000049d54 0xe7a ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o - .debug_info 0x000000000004abce 0x782 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o + .debug_info 0x000000000000fd07 0x23bd ./Core/Src/main.o + .debug_info 0x00000000000120c4 0x1436 ./Core/Src/quadspi.o + .debug_info 0x00000000000134fa 0x4a4 ./Core/Src/stm32h7xx_hal_msp.o + .debug_info 0x000000000001399e 0x2ec5 ./Core/Src/stm32h7xx_it.o + .debug_info 0x0000000000016863 0x6ee ./Core/Src/syscalls.o + .debug_info 0x0000000000016f51 0x175 ./Core/Src/sysmem.o + .debug_info 0x00000000000170c6 0xd07 ./Core/Src/system_stm32h7xx.o + .debug_info 0x0000000000017dcd 0x1167 ./Core/Src/tim.o + .debug_info 0x0000000000018f34 0x193d ./Core/Src/usart.o + .debug_info 0x000000000001a871 0x22 ./Core/Startup/startup_stm32h743vgtx.o + .debug_info 0x000000000001a893 0x648 ./Drivers/BSP/Components/lan8742/lan8742.o + .debug_info 0x000000000001aedb 0x15d7 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + .debug_info 0x000000000001c4b2 0x1f9c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + .debug_info 0x000000000001e44e 0x116d ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + .debug_info 0x000000000001f5bb 0xcd5 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + .debug_info 0x0000000000020290 0x2b55 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + .debug_info 0x0000000000022de5 0x2dae ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + .debug_info 0x0000000000025b93 0xd28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + .debug_info 0x00000000000268bb 0x23b3 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + .debug_info 0x0000000000028c6e 0xe39 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + .debug_info 0x0000000000029aa7 0xc89 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o + .debug_info 0x000000000002a730 0x109d ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o + .debug_info 0x000000000002b7cd 0x1392 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + .debug_info 0x000000000002cb5f 0xf4a ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o + .debug_info 0x000000000002daa9 0x12b4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o + .debug_info 0x000000000002ed5d 0x2dd1 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o + .debug_info 0x0000000000031b2e 0x18f4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o + .debug_info 0x0000000000033422 0x4c42 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o + .debug_info 0x0000000000038064 0x100b ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o + .debug_info 0x000000000003906f 0x60e ./LWIP/App/lwip.o + .debug_info 0x000000000003967d 0x2fba ./LWIP/Target/ethernetif.o + .debug_info 0x000000000003c637 0x3af ./Middlewares/Third_Party/LwIP/src/core/def.o + .debug_info 0x000000000003c9e6 0x665 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o + .debug_info 0x000000000003d04b 0xeb ./Middlewares/Third_Party/LwIP/src/core/init.o + .debug_info 0x000000000003d136 0x516 ./Middlewares/Third_Party/LwIP/src/core/ip.o + .debug_info 0x000000000003d64c 0x590 ./Middlewares/Third_Party/LwIP/src/core/mem.o + .debug_info 0x000000000003dbdc 0x636 ./Middlewares/Third_Party/LwIP/src/core/memp.o + .debug_info 0x000000000003e212 0xcde ./Middlewares/Third_Party/LwIP/src/core/netif.o + .debug_info 0x000000000003eef0 0x18bc ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + .debug_info 0x00000000000407ac 0x1ebf ./Middlewares/Third_Party/LwIP/src/core/tcp.o + .debug_info 0x000000000004266b 0x162a ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .debug_info 0x0000000000043c95 0x1a8c ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + .debug_info 0x0000000000045721 0xd03 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + .debug_info 0x0000000000046424 0xf53 ./Middlewares/Third_Party/LwIP/src/core/udp.o + .debug_info 0x0000000000047377 0xf08 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + .debug_info 0x000000000004827f 0x9c3 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o + .debug_info 0x0000000000048c42 0xa66 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + .debug_info 0x00000000000496a8 0x715 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o + .debug_info 0x0000000000049dbd 0xe7a ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + .debug_info 0x000000000004ac37 0x782 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o -.debug_abbrev 0x0000000000000000 0x9b91 +.debug_abbrev 0x0000000000000000 0x9b9a .debug_abbrev 0x0000000000000000 0x1f7 ./Core/BASE/Src/BSP/BHBF_ROBOT.o .debug_abbrev 0x00000000000001f7 0x229 ./Core/BASE/Src/BSP/bsp_DLT_Log.o .debug_abbrev 0x0000000000000420 0x266 ./Core/BASE/Src/BSP/bsp_EEPROM.o @@ -40208,58 +40218,58 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .debug_abbrev 0x00000000000023b6 0x1fd ./Core/Src/fdcan.o .debug_abbrev 0x00000000000025b3 0x17b ./Core/Src/gpio.o .debug_abbrev 0x000000000000272e 0x240 ./Core/Src/i2c.o - .debug_abbrev 0x000000000000296e 0x3ab ./Core/Src/main.o - .debug_abbrev 0x0000000000002d19 0x21e ./Core/Src/quadspi.o - .debug_abbrev 0x0000000000002f37 0xda ./Core/Src/stm32h7xx_hal_msp.o - .debug_abbrev 0x0000000000003011 0x1d0 ./Core/Src/stm32h7xx_it.o - .debug_abbrev 0x00000000000031e1 0x1aa ./Core/Src/syscalls.o - .debug_abbrev 0x000000000000338b 0xa4 ./Core/Src/sysmem.o - .debug_abbrev 0x000000000000342f 0x147 ./Core/Src/system_stm32h7xx.o - .debug_abbrev 0x0000000000003576 0x20b ./Core/Src/tim.o - .debug_abbrev 0x0000000000003781 0x269 ./Core/Src/usart.o - .debug_abbrev 0x00000000000039ea 0x12 ./Core/Startup/startup_stm32h743vgtx.o - .debug_abbrev 0x00000000000039fc 0x145 ./Drivers/BSP/Components/lan8742/lan8742.o - .debug_abbrev 0x0000000000003b41 0x289 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - .debug_abbrev 0x0000000000003dca 0x2bf ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - .debug_abbrev 0x0000000000004089 0x329 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - .debug_abbrev 0x00000000000043b2 0x239 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o - .debug_abbrev 0x00000000000045eb 0x2bd ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - .debug_abbrev 0x00000000000048a8 0x278 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - .debug_abbrev 0x0000000000004b20 0x1ec ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - .debug_abbrev 0x0000000000004d0c 0x243 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - .debug_abbrev 0x0000000000004f4f 0x1e1 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - .debug_abbrev 0x0000000000005130 0x1ea ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o - .debug_abbrev 0x000000000000531a 0x28f ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o - .debug_abbrev 0x00000000000055a9 0x238 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - .debug_abbrev 0x00000000000057e1 0x2b8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o - .debug_abbrev 0x0000000000005a99 0x25c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o - .debug_abbrev 0x0000000000005cf5 0x25d ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o - .debug_abbrev 0x0000000000005f52 0x265 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o - .debug_abbrev 0x00000000000061b7 0x325 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o - .debug_abbrev 0x00000000000064dc 0x2bd ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o - .debug_abbrev 0x0000000000006799 0x216 ./LWIP/App/lwip.o - .debug_abbrev 0x00000000000069af 0x3e9 ./LWIP/Target/ethernetif.o - .debug_abbrev 0x0000000000006d98 0x137 ./Middlewares/Third_Party/LwIP/src/core/def.o - .debug_abbrev 0x0000000000006ecf 0x18c ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o - .debug_abbrev 0x000000000000705b 0x8d ./Middlewares/Third_Party/LwIP/src/core/init.o - .debug_abbrev 0x00000000000070e8 0x12f ./Middlewares/Third_Party/LwIP/src/core/ip.o - .debug_abbrev 0x0000000000007217 0x1b0 ./Middlewares/Third_Party/LwIP/src/core/mem.o - .debug_abbrev 0x00000000000073c7 0x221 ./Middlewares/Third_Party/LwIP/src/core/memp.o - .debug_abbrev 0x00000000000075e8 0x300 ./Middlewares/Third_Party/LwIP/src/core/netif.o - .debug_abbrev 0x00000000000078e8 0x339 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - .debug_abbrev 0x0000000000007c21 0x3d8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - .debug_abbrev 0x0000000000007ff9 0x324 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .debug_abbrev 0x000000000000831d 0x2f9 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - .debug_abbrev 0x0000000000008616 0x2f8 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - .debug_abbrev 0x000000000000890e 0x352 ./Middlewares/Third_Party/LwIP/src/core/udp.o - .debug_abbrev 0x0000000000008c60 0x2a2 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o - .debug_abbrev 0x0000000000008f02 0x26b ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o - .debug_abbrev 0x000000000000916d 0x266 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o - .debug_abbrev 0x00000000000093d3 0x267 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o - .debug_abbrev 0x000000000000963a 0x2f2 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o - .debug_abbrev 0x000000000000992c 0x265 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o + .debug_abbrev 0x000000000000296e 0x3b4 ./Core/Src/main.o + .debug_abbrev 0x0000000000002d22 0x21e ./Core/Src/quadspi.o + .debug_abbrev 0x0000000000002f40 0xda ./Core/Src/stm32h7xx_hal_msp.o + .debug_abbrev 0x000000000000301a 0x1d0 ./Core/Src/stm32h7xx_it.o + .debug_abbrev 0x00000000000031ea 0x1aa ./Core/Src/syscalls.o + .debug_abbrev 0x0000000000003394 0xa4 ./Core/Src/sysmem.o + .debug_abbrev 0x0000000000003438 0x147 ./Core/Src/system_stm32h7xx.o + .debug_abbrev 0x000000000000357f 0x20b ./Core/Src/tim.o + .debug_abbrev 0x000000000000378a 0x269 ./Core/Src/usart.o + .debug_abbrev 0x00000000000039f3 0x12 ./Core/Startup/startup_stm32h743vgtx.o + .debug_abbrev 0x0000000000003a05 0x145 ./Drivers/BSP/Components/lan8742/lan8742.o + .debug_abbrev 0x0000000000003b4a 0x289 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + .debug_abbrev 0x0000000000003dd3 0x2bf ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + .debug_abbrev 0x0000000000004092 0x329 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + .debug_abbrev 0x00000000000043bb 0x239 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + .debug_abbrev 0x00000000000045f4 0x2bd ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + .debug_abbrev 0x00000000000048b1 0x278 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + .debug_abbrev 0x0000000000004b29 0x1ec ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + .debug_abbrev 0x0000000000004d15 0x243 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + .debug_abbrev 0x0000000000004f58 0x1e1 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + .debug_abbrev 0x0000000000005139 0x1ea ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o + .debug_abbrev 0x0000000000005323 0x28f ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o + .debug_abbrev 0x00000000000055b2 0x238 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + .debug_abbrev 0x00000000000057ea 0x2b8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o + .debug_abbrev 0x0000000000005aa2 0x25c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o + .debug_abbrev 0x0000000000005cfe 0x25d ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o + .debug_abbrev 0x0000000000005f5b 0x265 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o + .debug_abbrev 0x00000000000061c0 0x325 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o + .debug_abbrev 0x00000000000064e5 0x2bd ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o + .debug_abbrev 0x00000000000067a2 0x216 ./LWIP/App/lwip.o + .debug_abbrev 0x00000000000069b8 0x3e9 ./LWIP/Target/ethernetif.o + .debug_abbrev 0x0000000000006da1 0x137 ./Middlewares/Third_Party/LwIP/src/core/def.o + .debug_abbrev 0x0000000000006ed8 0x18c ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o + .debug_abbrev 0x0000000000007064 0x8d ./Middlewares/Third_Party/LwIP/src/core/init.o + .debug_abbrev 0x00000000000070f1 0x12f ./Middlewares/Third_Party/LwIP/src/core/ip.o + .debug_abbrev 0x0000000000007220 0x1b0 ./Middlewares/Third_Party/LwIP/src/core/mem.o + .debug_abbrev 0x00000000000073d0 0x221 ./Middlewares/Third_Party/LwIP/src/core/memp.o + .debug_abbrev 0x00000000000075f1 0x300 ./Middlewares/Third_Party/LwIP/src/core/netif.o + .debug_abbrev 0x00000000000078f1 0x339 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + .debug_abbrev 0x0000000000007c2a 0x3d8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + .debug_abbrev 0x0000000000008002 0x324 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .debug_abbrev 0x0000000000008326 0x2f9 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + .debug_abbrev 0x000000000000861f 0x2f8 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + .debug_abbrev 0x0000000000008917 0x352 ./Middlewares/Third_Party/LwIP/src/core/udp.o + .debug_abbrev 0x0000000000008c69 0x2a2 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + .debug_abbrev 0x0000000000008f0b 0x26b ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o + .debug_abbrev 0x0000000000009176 0x266 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + .debug_abbrev 0x00000000000093dc 0x267 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o + .debug_abbrev 0x0000000000009643 0x2f2 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + .debug_abbrev 0x0000000000009935 0x265 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o -.debug_aranges 0x0000000000000000 0x2f18 +.debug_aranges 0x0000000000000000 0x2f28 .debug_aranges 0x0000000000000000 0x50 ./Core/BASE/Src/BSP/BHBF_ROBOT.o .debug_aranges @@ -40303,107 +40313,107 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .debug_aranges 0x0000000000000580 0x30 ./Core/Src/i2c.o .debug_aranges - 0x00000000000005b0 0x40 ./Core/Src/main.o + 0x00000000000005b0 0x50 ./Core/Src/main.o .debug_aranges - 0x00000000000005f0 0x30 ./Core/Src/quadspi.o + 0x0000000000000600 0x30 ./Core/Src/quadspi.o .debug_aranges - 0x0000000000000620 0x20 ./Core/Src/stm32h7xx_hal_msp.o + 0x0000000000000630 0x20 ./Core/Src/stm32h7xx_hal_msp.o .debug_aranges - 0x0000000000000640 0x120 ./Core/Src/stm32h7xx_it.o + 0x0000000000000650 0x120 ./Core/Src/stm32h7xx_it.o .debug_aranges - 0x0000000000000760 0xa8 ./Core/Src/syscalls.o + 0x0000000000000770 0xa8 ./Core/Src/syscalls.o .debug_aranges - 0x0000000000000808 0x20 ./Core/Src/sysmem.o + 0x0000000000000818 0x20 ./Core/Src/sysmem.o .debug_aranges - 0x0000000000000828 0x28 ./Core/Src/system_stm32h7xx.o + 0x0000000000000838 0x28 ./Core/Src/system_stm32h7xx.o .debug_aranges - 0x0000000000000850 0x38 ./Core/Src/tim.o + 0x0000000000000860 0x38 ./Core/Src/tim.o .debug_aranges - 0x0000000000000888 0x68 ./Core/Src/usart.o + 0x0000000000000898 0x68 ./Core/Src/usart.o .debug_aranges - 0x00000000000008f0 0x28 ./Core/Startup/startup_stm32h743vgtx.o + 0x0000000000000900 0x28 ./Core/Startup/startup_stm32h743vgtx.o .debug_aranges - 0x0000000000000918 0x88 ./Drivers/BSP/Components/lan8742/lan8742.o + 0x0000000000000928 0x88 ./Drivers/BSP/Components/lan8742/lan8742.o .debug_aranges - 0x00000000000009a0 0x198 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + 0x00000000000009b0 0x198 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o .debug_aranges - 0x0000000000000b38 0x228 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + 0x0000000000000b48 0x228 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o .debug_aranges - 0x0000000000000d60 0x120 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + 0x0000000000000d70 0x120 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o .debug_aranges - 0x0000000000000e80 0xa0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + 0x0000000000000e90 0xa0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o .debug_aranges - 0x0000000000000f20 0x1d8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + 0x0000000000000f30 0x1d8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o .debug_aranges - 0x00000000000010f8 0x338 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + 0x0000000000001108 0x338 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o .debug_aranges - 0x0000000000001430 0x58 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + 0x0000000000001440 0x58 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o .debug_aranges - 0x0000000000001488 0x290 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + 0x0000000000001498 0x290 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o .debug_aranges - 0x0000000000001718 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + 0x0000000000001728 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o .debug_aranges - 0x0000000000001760 0xc0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o + 0x0000000000001770 0xc0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o .debug_aranges - 0x0000000000001820 0x158 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o + 0x0000000000001830 0x158 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o .debug_aranges - 0x0000000000001978 0x148 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + 0x0000000000001988 0x148 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o .debug_aranges - 0x0000000000001ac0 0x88 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o + 0x0000000000001ad0 0x88 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o .debug_aranges - 0x0000000000001b48 0xf8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o + 0x0000000000001b58 0xf8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o .debug_aranges - 0x0000000000001c40 0x3e0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o + 0x0000000000001c50 0x3e0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o .debug_aranges - 0x0000000000002020 0x188 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o + 0x0000000000002030 0x188 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o .debug_aranges - 0x00000000000021a8 0x248 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o + 0x00000000000021b8 0x248 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o .debug_aranges - 0x00000000000023f0 0xa0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o + 0x0000000000002400 0xa0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o .debug_aranges - 0x0000000000002490 0x38 ./LWIP/App/lwip.o + 0x00000000000024a0 0x38 ./LWIP/App/lwip.o .debug_aranges - 0x00000000000024c8 0xa8 ./LWIP/Target/ethernetif.o + 0x00000000000024d8 0xa8 ./LWIP/Target/ethernetif.o .debug_aranges - 0x0000000000002570 0x48 ./Middlewares/Third_Party/LwIP/src/core/def.o + 0x0000000000002580 0x48 ./Middlewares/Third_Party/LwIP/src/core/def.o .debug_aranges - 0x00000000000025b8 0x60 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o + 0x00000000000025c8 0x60 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o .debug_aranges - 0x0000000000002618 0x20 ./Middlewares/Third_Party/LwIP/src/core/init.o + 0x0000000000002628 0x20 ./Middlewares/Third_Party/LwIP/src/core/init.o .debug_aranges - 0x0000000000002638 0x18 ./Middlewares/Third_Party/LwIP/src/core/ip.o + 0x0000000000002648 0x18 ./Middlewares/Third_Party/LwIP/src/core/ip.o .debug_aranges - 0x0000000000002650 0x60 ./Middlewares/Third_Party/LwIP/src/core/mem.o + 0x0000000000002660 0x60 ./Middlewares/Third_Party/LwIP/src/core/mem.o .debug_aranges - 0x00000000000026b0 0x58 ./Middlewares/Third_Party/LwIP/src/core/memp.o + 0x00000000000026c0 0x58 ./Middlewares/Third_Party/LwIP/src/core/memp.o .debug_aranges - 0x0000000000002708 0xe8 ./Middlewares/Third_Party/LwIP/src/core/netif.o + 0x0000000000002718 0xe8 ./Middlewares/Third_Party/LwIP/src/core/netif.o .debug_aranges - 0x00000000000027f0 0x138 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + 0x0000000000002800 0x138 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o .debug_aranges - 0x0000000000002928 0x1b8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + 0x0000000000002938 0x1b8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o .debug_aranges - 0x0000000000002ae0 0x70 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + 0x0000000000002af0 0x70 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o .debug_aranges - 0x0000000000002b50 0xd8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + 0x0000000000002b60 0xd8 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o .debug_aranges - 0x0000000000002c28 0x68 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + 0x0000000000002c38 0x68 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o .debug_aranges - 0x0000000000002c90 0xa0 ./Middlewares/Third_Party/LwIP/src/core/udp.o + 0x0000000000002ca0 0xa0 ./Middlewares/Third_Party/LwIP/src/core/udp.o .debug_aranges - 0x0000000000002d30 0x88 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + 0x0000000000002d40 0x88 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o .debug_aranges - 0x0000000000002db8 0x38 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o + 0x0000000000002dc8 0x38 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o .debug_aranges - 0x0000000000002df0 0x48 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + 0x0000000000002e00 0x48 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o .debug_aranges - 0x0000000000002e38 0x48 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o + 0x0000000000002e48 0x48 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o .debug_aranges - 0x0000000000002e80 0x70 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + 0x0000000000002e90 0x70 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .debug_aranges - 0x0000000000002ef0 0x28 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o + 0x0000000000002f00 0x28 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o -.debug_ranges 0x0000000000000000 0x2c88 +.debug_ranges 0x0000000000000000 0x2c98 .debug_ranges 0x0000000000000000 0x40 ./Core/BASE/Src/BSP/BHBF_ROBOT.o .debug_ranges 0x0000000000000040 0x38 ./Core/BASE/Src/BSP/bsp_DLT_Log.o .debug_ranges 0x0000000000000078 0x98 ./Core/BASE/Src/BSP/bsp_EEPROM.o @@ -40425,55 +40435,55 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .debug_ranges 0x0000000000000438 0x28 ./Core/Src/fdcan.o .debug_ranges 0x0000000000000460 0x10 ./Core/Src/gpio.o .debug_ranges 0x0000000000000470 0x20 ./Core/Src/i2c.o - .debug_ranges 0x0000000000000490 0x30 ./Core/Src/main.o - .debug_ranges 0x00000000000004c0 0x20 ./Core/Src/quadspi.o - .debug_ranges 0x00000000000004e0 0x10 ./Core/Src/stm32h7xx_hal_msp.o - .debug_ranges 0x00000000000004f0 0x110 ./Core/Src/stm32h7xx_it.o - .debug_ranges 0x0000000000000600 0x98 ./Core/Src/syscalls.o - .debug_ranges 0x0000000000000698 0x10 ./Core/Src/sysmem.o - .debug_ranges 0x00000000000006a8 0x18 ./Core/Src/system_stm32h7xx.o - .debug_ranges 0x00000000000006c0 0x28 ./Core/Src/tim.o - .debug_ranges 0x00000000000006e8 0x58 ./Core/Src/usart.o - .debug_ranges 0x0000000000000740 0x20 ./Core/Startup/startup_stm32h743vgtx.o - .debug_ranges 0x0000000000000760 0x78 ./Drivers/BSP/Components/lan8742/lan8742.o - .debug_ranges 0x00000000000007d8 0x188 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - .debug_ranges 0x0000000000000960 0x218 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - .debug_ranges 0x0000000000000b78 0x110 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - .debug_ranges 0x0000000000000c88 0x90 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o - .debug_ranges 0x0000000000000d18 0x1c8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - .debug_ranges 0x0000000000000ee0 0x328 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - .debug_ranges 0x0000000000001208 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - .debug_ranges 0x0000000000001250 0x280 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - .debug_ranges 0x00000000000014d0 0x38 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - .debug_ranges 0x0000000000001508 0xb0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o - .debug_ranges 0x00000000000015b8 0x148 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o - .debug_ranges 0x0000000000001700 0x138 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - .debug_ranges 0x0000000000001838 0x78 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o - .debug_ranges 0x00000000000018b0 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o - .debug_ranges 0x0000000000001998 0x3d0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o - .debug_ranges 0x0000000000001d68 0x178 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o - .debug_ranges 0x0000000000001ee0 0x268 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o - .debug_ranges 0x0000000000002148 0x90 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o - .debug_ranges 0x00000000000021d8 0x28 ./LWIP/App/lwip.o - .debug_ranges 0x0000000000002200 0x98 ./LWIP/Target/ethernetif.o - .debug_ranges 0x0000000000002298 0x38 ./Middlewares/Third_Party/LwIP/src/core/def.o - .debug_ranges 0x00000000000022d0 0x50 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o - .debug_ranges 0x0000000000002320 0x10 ./Middlewares/Third_Party/LwIP/src/core/init.o - .debug_ranges 0x0000000000002330 0x50 ./Middlewares/Third_Party/LwIP/src/core/mem.o - .debug_ranges 0x0000000000002380 0x48 ./Middlewares/Third_Party/LwIP/src/core/memp.o - .debug_ranges 0x00000000000023c8 0xd8 ./Middlewares/Third_Party/LwIP/src/core/netif.o - .debug_ranges 0x00000000000024a0 0x140 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - .debug_ranges 0x00000000000025e0 0x1a8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o - .debug_ranges 0x0000000000002788 0x108 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .debug_ranges 0x0000000000002890 0x140 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - .debug_ranges 0x00000000000029d0 0x70 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - .debug_ranges 0x0000000000002a40 0x90 ./Middlewares/Third_Party/LwIP/src/core/udp.o - .debug_ranges 0x0000000000002ad0 0x78 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o - .debug_ranges 0x0000000000002b48 0x40 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o - .debug_ranges 0x0000000000002b88 0x38 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o - .debug_ranges 0x0000000000002bc0 0x38 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o - .debug_ranges 0x0000000000002bf8 0x78 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o - .debug_ranges 0x0000000000002c70 0x18 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o + .debug_ranges 0x0000000000000490 0x40 ./Core/Src/main.o + .debug_ranges 0x00000000000004d0 0x20 ./Core/Src/quadspi.o + .debug_ranges 0x00000000000004f0 0x10 ./Core/Src/stm32h7xx_hal_msp.o + .debug_ranges 0x0000000000000500 0x110 ./Core/Src/stm32h7xx_it.o + .debug_ranges 0x0000000000000610 0x98 ./Core/Src/syscalls.o + .debug_ranges 0x00000000000006a8 0x10 ./Core/Src/sysmem.o + .debug_ranges 0x00000000000006b8 0x18 ./Core/Src/system_stm32h7xx.o + .debug_ranges 0x00000000000006d0 0x28 ./Core/Src/tim.o + .debug_ranges 0x00000000000006f8 0x58 ./Core/Src/usart.o + .debug_ranges 0x0000000000000750 0x20 ./Core/Startup/startup_stm32h743vgtx.o + .debug_ranges 0x0000000000000770 0x78 ./Drivers/BSP/Components/lan8742/lan8742.o + .debug_ranges 0x00000000000007e8 0x188 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + .debug_ranges 0x0000000000000970 0x218 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + .debug_ranges 0x0000000000000b88 0x110 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + .debug_ranges 0x0000000000000c98 0x90 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + .debug_ranges 0x0000000000000d28 0x1c8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + .debug_ranges 0x0000000000000ef0 0x328 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + .debug_ranges 0x0000000000001218 0x48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + .debug_ranges 0x0000000000001260 0x280 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + .debug_ranges 0x00000000000014e0 0x38 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + .debug_ranges 0x0000000000001518 0xb0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o + .debug_ranges 0x00000000000015c8 0x148 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o + .debug_ranges 0x0000000000001710 0x138 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + .debug_ranges 0x0000000000001848 0x78 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o + .debug_ranges 0x00000000000018c0 0xe8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o + .debug_ranges 0x00000000000019a8 0x3d0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o + .debug_ranges 0x0000000000001d78 0x178 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o + .debug_ranges 0x0000000000001ef0 0x268 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o + .debug_ranges 0x0000000000002158 0x90 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o + .debug_ranges 0x00000000000021e8 0x28 ./LWIP/App/lwip.o + .debug_ranges 0x0000000000002210 0x98 ./LWIP/Target/ethernetif.o + .debug_ranges 0x00000000000022a8 0x38 ./Middlewares/Third_Party/LwIP/src/core/def.o + .debug_ranges 0x00000000000022e0 0x50 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o + .debug_ranges 0x0000000000002330 0x10 ./Middlewares/Third_Party/LwIP/src/core/init.o + .debug_ranges 0x0000000000002340 0x50 ./Middlewares/Third_Party/LwIP/src/core/mem.o + .debug_ranges 0x0000000000002390 0x48 ./Middlewares/Third_Party/LwIP/src/core/memp.o + .debug_ranges 0x00000000000023d8 0xd8 ./Middlewares/Third_Party/LwIP/src/core/netif.o + .debug_ranges 0x00000000000024b0 0x140 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + .debug_ranges 0x00000000000025f0 0x1a8 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + .debug_ranges 0x0000000000002798 0x108 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .debug_ranges 0x00000000000028a0 0x140 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + .debug_ranges 0x00000000000029e0 0x70 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + .debug_ranges 0x0000000000002a50 0x90 ./Middlewares/Third_Party/LwIP/src/core/udp.o + .debug_ranges 0x0000000000002ae0 0x78 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + .debug_ranges 0x0000000000002b58 0x40 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o + .debug_ranges 0x0000000000002b98 0x38 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + .debug_ranges 0x0000000000002bd0 0x38 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o + .debug_ranges 0x0000000000002c08 0x78 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + .debug_ranges 0x0000000000002c80 0x18 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o .debug_macro 0x0000000000000000 0x4e885 .debug_macro 0x0000000000000000 0x656 ./Core/BASE/Src/BSP/BHBF_ROBOT.o @@ -40691,7 +40701,7 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .debug_macro 0x000000000004e20b 0x10 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .debug_macro 0x000000000004e21b 0x66a ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o -.debug_line 0x0000000000000000 0x532f9 +.debug_line 0x0000000000000000 0x53363 .debug_line 0x0000000000000000 0xf39 ./Core/BASE/Src/BSP/BHBF_ROBOT.o .debug_line 0x0000000000000f39 0x1135 ./Core/BASE/Src/BSP/bsp_DLT_Log.o .debug_line 0x000000000000206e 0xfe9 ./Core/BASE/Src/BSP/bsp_EEPROM.o @@ -40713,58 +40723,58 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .debug_line 0x000000000000faeb 0xa74 ./Core/Src/fdcan.o .debug_line 0x000000000001055f 0x95e ./Core/Src/gpio.o .debug_line 0x0000000000010ebd 0x98b ./Core/Src/i2c.o - .debug_line 0x0000000000011848 0x1486 ./Core/Src/main.o - .debug_line 0x0000000000012cce 0x9a4 ./Core/Src/quadspi.o - .debug_line 0x0000000000013672 0x8f3 ./Core/Src/stm32h7xx_hal_msp.o - .debug_line 0x0000000000013f65 0xbf7 ./Core/Src/stm32h7xx_it.o - .debug_line 0x0000000000014b5c 0xde6 ./Core/Src/syscalls.o - .debug_line 0x0000000000015942 0xbde ./Core/Src/sysmem.o - .debug_line 0x0000000000016520 0xaaa ./Core/Src/system_stm32h7xx.o - .debug_line 0x0000000000016fca 0x9de ./Core/Src/tim.o - .debug_line 0x00000000000179a8 0xf9a ./Core/Src/usart.o - .debug_line 0x0000000000018942 0x88 ./Core/Startup/startup_stm32h743vgtx.o - .debug_line 0x00000000000189ca 0x805 ./Drivers/BSP/Components/lan8742/lan8742.o - .debug_line 0x00000000000191cf 0xea2 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - .debug_line 0x000000000001a071 0x23fa ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - .debug_line 0x000000000001c46b 0xea8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - .debug_line 0x000000000001d313 0x27f1 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o - .debug_line 0x000000000001fb04 0x1be8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - .debug_line 0x00000000000216ec 0x2803 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - .debug_line 0x0000000000023eef 0xd65 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - .debug_line 0x0000000000024c54 0x38ba ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - .debug_line 0x000000000002850e 0xb12 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - .debug_line 0x0000000000029020 0x1519 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o - .debug_line 0x000000000002a539 0xfbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o - .debug_line 0x000000000002b4f5 0x1515 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - .debug_line 0x000000000002ca0a 0x1410 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o - .debug_line 0x000000000002de1a 0x1bca ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o - .debug_line 0x000000000002f9e4 0x3f6f ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o - .debug_line 0x0000000000033953 0x1e48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o - .debug_line 0x000000000003579b 0x3efb ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o - .debug_line 0x0000000000039696 0xf80 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o - .debug_line 0x000000000003a616 0xdf9 ./LWIP/App/lwip.o - .debug_line 0x000000000003b40f 0x11f1 ./LWIP/Target/ethernetif.o - .debug_line 0x000000000003c600 0xd9a ./Middlewares/Third_Party/LwIP/src/core/def.o - .debug_line 0x000000000003d39a 0xef2 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o - .debug_line 0x000000000003e28c 0xe43 ./Middlewares/Third_Party/LwIP/src/core/init.o - .debug_line 0x000000000003f0cf 0xce0 ./Middlewares/Third_Party/LwIP/src/core/ip.o - .debug_line 0x000000000003fdaf 0x10c7 ./Middlewares/Third_Party/LwIP/src/core/mem.o - .debug_line 0x0000000000040e76 0x104e ./Middlewares/Third_Party/LwIP/src/core/memp.o - .debug_line 0x0000000000041ec4 0x1402 ./Middlewares/Third_Party/LwIP/src/core/netif.o - .debug_line 0x00000000000432c6 0x182f ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - .debug_line 0x0000000000044af5 0x1fbf ./Middlewares/Third_Party/LwIP/src/core/tcp.o - .debug_line 0x0000000000046ab4 0x20ba ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .debug_line 0x0000000000048b6e 0x1c67 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - .debug_line 0x000000000004a7d5 0x10c7 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - .debug_line 0x000000000004b89c 0x1401 ./Middlewares/Third_Party/LwIP/src/core/udp.o - .debug_line 0x000000000004cc9d 0x145a ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o - .debug_line 0x000000000004e0f7 0xee0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o - .debug_line 0x000000000004efd7 0x10d9 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o - .debug_line 0x00000000000500b0 0xfb0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o - .debug_line 0x0000000000051060 0x13d0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o - .debug_line 0x0000000000052430 0xec9 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o + .debug_line 0x0000000000011848 0x14f0 ./Core/Src/main.o + .debug_line 0x0000000000012d38 0x9a4 ./Core/Src/quadspi.o + .debug_line 0x00000000000136dc 0x8f3 ./Core/Src/stm32h7xx_hal_msp.o + .debug_line 0x0000000000013fcf 0xbf7 ./Core/Src/stm32h7xx_it.o + .debug_line 0x0000000000014bc6 0xde6 ./Core/Src/syscalls.o + .debug_line 0x00000000000159ac 0xbde ./Core/Src/sysmem.o + .debug_line 0x000000000001658a 0xaaa ./Core/Src/system_stm32h7xx.o + .debug_line 0x0000000000017034 0x9de ./Core/Src/tim.o + .debug_line 0x0000000000017a12 0xf9a ./Core/Src/usart.o + .debug_line 0x00000000000189ac 0x88 ./Core/Startup/startup_stm32h743vgtx.o + .debug_line 0x0000000000018a34 0x805 ./Drivers/BSP/Components/lan8742/lan8742.o + .debug_line 0x0000000000019239 0xea2 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + .debug_line 0x000000000001a0db 0x23fa ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + .debug_line 0x000000000001c4d5 0xea8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + .debug_line 0x000000000001d37d 0x27f1 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + .debug_line 0x000000000001fb6e 0x1be8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + .debug_line 0x0000000000021756 0x2803 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + .debug_line 0x0000000000023f59 0xd65 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + .debug_line 0x0000000000024cbe 0x38ba ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + .debug_line 0x0000000000028578 0xb12 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + .debug_line 0x000000000002908a 0x1519 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o + .debug_line 0x000000000002a5a3 0xfbc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o + .debug_line 0x000000000002b55f 0x1515 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + .debug_line 0x000000000002ca74 0x1410 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o + .debug_line 0x000000000002de84 0x1bca ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o + .debug_line 0x000000000002fa4e 0x3f6f ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o + .debug_line 0x00000000000339bd 0x1e48 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o + .debug_line 0x0000000000035805 0x3efb ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o + .debug_line 0x0000000000039700 0xf80 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o + .debug_line 0x000000000003a680 0xdf9 ./LWIP/App/lwip.o + .debug_line 0x000000000003b479 0x11f1 ./LWIP/Target/ethernetif.o + .debug_line 0x000000000003c66a 0xd9a ./Middlewares/Third_Party/LwIP/src/core/def.o + .debug_line 0x000000000003d404 0xef2 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o + .debug_line 0x000000000003e2f6 0xe43 ./Middlewares/Third_Party/LwIP/src/core/init.o + .debug_line 0x000000000003f139 0xce0 ./Middlewares/Third_Party/LwIP/src/core/ip.o + .debug_line 0x000000000003fe19 0x10c7 ./Middlewares/Third_Party/LwIP/src/core/mem.o + .debug_line 0x0000000000040ee0 0x104e ./Middlewares/Third_Party/LwIP/src/core/memp.o + .debug_line 0x0000000000041f2e 0x1402 ./Middlewares/Third_Party/LwIP/src/core/netif.o + .debug_line 0x0000000000043330 0x182f ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + .debug_line 0x0000000000044b5f 0x1fbf ./Middlewares/Third_Party/LwIP/src/core/tcp.o + .debug_line 0x0000000000046b1e 0x20ba ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .debug_line 0x0000000000048bd8 0x1c67 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + .debug_line 0x000000000004a83f 0x10c7 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + .debug_line 0x000000000004b906 0x1401 ./Middlewares/Third_Party/LwIP/src/core/udp.o + .debug_line 0x000000000004cd07 0x145a ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + .debug_line 0x000000000004e161 0xee0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o + .debug_line 0x000000000004f041 0x10d9 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + .debug_line 0x000000000005011a 0xfb0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o + .debug_line 0x00000000000510ca 0x13d0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + .debug_line 0x000000000005249a 0xec9 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o -.debug_str 0x0000000000000000 0x1aa4f8 +.debug_str 0x0000000000000000 0x1aa552 .debug_str 0x0000000000000000 0x189172 ./Core/BASE/Src/BSP/BHBF_ROBOT.o 0x189999 (size before relaxing) .debug_str 0x0000000000189172 0x9733 ./Core/BASE/Src/BSP/bsp_DLT_Log.o @@ -40807,104 +40817,104 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext 0x17efe6 (size before relaxing) .debug_str 0x0000000000196104 0x2b5 ./Core/Src/i2c.o 0x1801f1 (size before relaxing) - .debug_str 0x00000000001963b9 0xbf9 ./Core/Src/main.o - 0x193ed9 (size before relaxing) - .debug_str 0x0000000000196fb2 0x432 ./Core/Src/quadspi.o + .debug_str 0x00000000001963b9 0xc49 ./Core/Src/main.o + 0x193f29 (size before relaxing) + .debug_str 0x0000000000197002 0x432 ./Core/Src/quadspi.o 0x180149 (size before relaxing) - .debug_str 0x00000000001973e4 0x2c ./Core/Src/stm32h7xx_hal_msp.o + .debug_str 0x0000000000197434 0x2c ./Core/Src/stm32h7xx_hal_msp.o 0x17ef1b (size before relaxing) - .debug_str 0x0000000000197410 0xc30 ./Core/Src/stm32h7xx_it.o + .debug_str 0x0000000000197460 0xc30 ./Core/Src/stm32h7xx_it.o 0x180e20 (size before relaxing) - .debug_str 0x0000000000198040 0xf9c ./Core/Src/syscalls.o + .debug_str 0x0000000000198090 0xf9c ./Core/Src/syscalls.o 0x185921 (size before relaxing) - .debug_str 0x0000000000198fdc 0x6b ./Core/Src/sysmem.o + .debug_str 0x000000000019902c 0x6b ./Core/Src/sysmem.o 0x184f76 (size before relaxing) - .debug_str 0x0000000000199047 0x281 ./Core/Src/system_stm32h7xx.o + .debug_str 0x0000000000199097 0x281 ./Core/Src/system_stm32h7xx.o 0x17ede9 (size before relaxing) - .debug_str 0x00000000001992c8 0x142 ./Core/Src/tim.o + .debug_str 0x0000000000199318 0x142 ./Core/Src/tim.o 0x17ff5a (size before relaxing) - .debug_str 0x000000000019940a 0x103 ./Core/Src/usart.o + .debug_str 0x000000000019945a 0x103 ./Core/Src/usart.o 0x180353 (size before relaxing) - .debug_str 0x000000000019950d 0x71 ./Core/Startup/startup_stm32h743vgtx.o - .debug_str 0x000000000019957e 0x1eee ./Drivers/BSP/Components/lan8742/lan8742.o + .debug_str 0x000000000019955d 0x71 ./Core/Startup/startup_stm32h743vgtx.o + .debug_str 0x00000000001995ce 0x1eee ./Drivers/BSP/Components/lan8742/lan8742.o 0x5ba4 (size before relaxing) - .debug_str 0x000000000019b46c 0x7bc ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o + .debug_str 0x000000000019b4bc 0x7c6 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o 0x17fca5 (size before relaxing) - .debug_str 0x000000000019bc28 0xad6 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o + .debug_str 0x000000000019bc82 0xad6 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o 0x17fb1a (size before relaxing) - .debug_str 0x000000000019c6fe 0x265 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o + .debug_str 0x000000000019c758 0x265 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o 0x17f6a8 (size before relaxing) - .debug_str 0x000000000019c963 0x7db ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o + .debug_str 0x000000000019c9bd 0x7db ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o 0x17f4c9 (size before relaxing) - .debug_str 0x000000000019d13e 0x112d ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o + .debug_str 0x000000000019d198 0x112d ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o 0x180696 (size before relaxing) - .debug_str 0x000000000019e26b 0x1a02 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o + .debug_str 0x000000000019e2c5 0x1a02 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o 0x180a7d (size before relaxing) - .debug_str 0x000000000019fc6d 0xc8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o + .debug_str 0x000000000019fcc7 0xc8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o 0x17ed46 (size before relaxing) - .debug_str 0x000000000019fd35 0xd69 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o + .debug_str 0x000000000019fd8f 0xd69 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o 0x17fdab (size before relaxing) - .debug_str 0x00000000001a0a9e 0xb8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o + .debug_str 0x00000000001a0af8 0xb8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o 0x17f19f (size before relaxing) - .debug_str 0x00000000001a0b56 0x4a6 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o + .debug_str 0x00000000001a0bb0 0x4a6 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o 0x17f0c3 (size before relaxing) - .debug_str 0x00000000001a0ffc 0x624 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o + .debug_str 0x00000000001a1056 0x624 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o 0x17f207 (size before relaxing) - .debug_str 0x00000000001a1620 0x641 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o + .debug_str 0x00000000001a167a 0x641 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o 0x17f4a0 (size before relaxing) - .debug_str 0x00000000001a1c61 0x21a ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o + .debug_str 0x00000000001a1cbb 0x21a ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o 0x17f12a (size before relaxing) - .debug_str 0x00000000001a1e7b 0x61e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o + .debug_str 0x00000000001a1ed5 0x61e ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o 0x17f5e2 (size before relaxing) - .debug_str 0x00000000001a2499 0xdc0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o + .debug_str 0x00000000001a24f3 0xdc0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o 0x17feb9 (size before relaxing) - .debug_str 0x00000000001a3259 0x587 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o + .debug_str 0x00000000001a32b3 0x587 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o 0x17f7f1 (size before relaxing) - .debug_str 0x00000000001a37e0 0x965 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o + .debug_str 0x00000000001a383a 0x965 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o 0x17fc43 (size before relaxing) - .debug_str 0x00000000001a4145 0x240 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o + .debug_str 0x00000000001a419f 0x240 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o 0x17f1e9 (size before relaxing) - .debug_str 0x00000000001a4385 0x4b3 ./LWIP/App/lwip.o + .debug_str 0x00000000001a43df 0x4b3 ./LWIP/App/lwip.o 0x188a60 (size before relaxing) - .debug_str 0x00000000001a4838 0x376 ./LWIP/Target/ethernetif.o + .debug_str 0x00000000001a4892 0x376 ./LWIP/Target/ethernetif.o 0x18c368 (size before relaxing) - .debug_str 0x00000000001a4bae 0xb1 ./Middlewares/Third_Party/LwIP/src/core/def.o + .debug_str 0x00000000001a4c08 0xb1 ./Middlewares/Third_Party/LwIP/src/core/def.o 0x184d92 (size before relaxing) - .debug_str 0x00000000001a4c5f 0x20f ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o + .debug_str 0x00000000001a4cb9 0x20f ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o 0x186d01 (size before relaxing) - .debug_str 0x00000000001a4e6e 0x1e80 ./Middlewares/Third_Party/LwIP/src/core/init.o + .debug_str 0x00000000001a4ec8 0x1e80 ./Middlewares/Third_Party/LwIP/src/core/init.o 0x18b594 (size before relaxing) - .debug_str 0x00000000001a6cee 0xd6 ./Middlewares/Third_Party/LwIP/src/core/ip.o + .debug_str 0x00000000001a6d48 0xd6 ./Middlewares/Third_Party/LwIP/src/core/ip.o 0x188b41 (size before relaxing) - .debug_str 0x00000000001a6dc4 0x3f9 ./Middlewares/Third_Party/LwIP/src/core/mem.o + .debug_str 0x00000000001a6e1e 0x3f9 ./Middlewares/Third_Party/LwIP/src/core/mem.o 0x1861d1 (size before relaxing) - .debug_str 0x00000000001a71bd 0x897 ./Middlewares/Third_Party/LwIP/src/core/memp.o + .debug_str 0x00000000001a7217 0x897 ./Middlewares/Third_Party/LwIP/src/core/memp.o 0x18bbdc (size before relaxing) - .debug_str 0x00000000001a7a54 0x7f1 ./Middlewares/Third_Party/LwIP/src/core/netif.o + .debug_str 0x00000000001a7aae 0x7f1 ./Middlewares/Third_Party/LwIP/src/core/netif.o 0x18bc4d (size before relaxing) - .debug_str 0x00000000001a8245 0x4b4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o + .debug_str 0x00000000001a829f 0x4b4 ./Middlewares/Third_Party/LwIP/src/core/pbuf.o 0x18b63e (size before relaxing) - .debug_str 0x00000000001a86f9 0x638 ./Middlewares/Third_Party/LwIP/src/core/tcp.o + .debug_str 0x00000000001a8753 0x638 ./Middlewares/Third_Party/LwIP/src/core/tcp.o 0x18b3c6 (size before relaxing) - .debug_str 0x00000000001a8d31 0x2b8 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o + .debug_str 0x00000000001a8d8b 0x2b8 ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o 0x18b1fd (size before relaxing) - .debug_str 0x00000000001a8fe9 0x35a ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o + .debug_str 0x00000000001a9043 0x35a ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o 0x18b21f (size before relaxing) - .debug_str 0x00000000001a9343 0x255 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o + .debug_str 0x00000000001a939d 0x255 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o 0x18b6a8 (size before relaxing) - .debug_str 0x00000000001a9598 0x2cd ./Middlewares/Third_Party/LwIP/src/core/udp.o + .debug_str 0x00000000001a95f2 0x2cd ./Middlewares/Third_Party/LwIP/src/core/udp.o 0x189a1d (size before relaxing) - .debug_str 0x00000000001a9865 0x583 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o + .debug_str 0x00000000001a98bf 0x583 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o 0x189220 (size before relaxing) - .debug_str 0x00000000001a9de8 0x103 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o + .debug_str 0x00000000001a9e42 0x103 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o 0x189091 (size before relaxing) - .debug_str 0x00000000001a9eeb 0xec ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o + .debug_str 0x00000000001a9f45 0xec ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o 0x18aef9 (size before relaxing) - .debug_str 0x00000000001a9fd7 0xb1 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o + .debug_str 0x00000000001aa031 0xb1 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o 0x187e88 (size before relaxing) - .debug_str 0x00000000001aa088 0x3ed ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o + .debug_str 0x00000000001aa0e2 0x3ed ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o 0x1893f9 (size before relaxing) - .debug_str 0x00000000001aa475 0x83 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o + .debug_str 0x00000000001aa4cf 0x83 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o 0x189652 (size before relaxing) .comment 0x0000000000000000 0x50 @@ -40980,7 +40990,7 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .comment 0x0000000000000050 0x51 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o .comment 0x0000000000000050 0x51 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o -.debug_frame 0x0000000000000000 0xce80 +.debug_frame 0x0000000000000000 0xceb8 .debug_frame 0x0000000000000000 0x114 ./Core/BASE/Src/BSP/BHBF_ROBOT.o .debug_frame 0x0000000000000114 0xd8 ./Core/BASE/Src/BSP/bsp_DLT_Log.o .debug_frame 0x00000000000001ec 0x274 ./Core/BASE/Src/BSP/bsp_EEPROM.o @@ -41002,96 +41012,96 @@ LOAD d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.ext .debug_frame 0x00000000000010b8 0x94 ./Core/Src/fdcan.o .debug_frame 0x000000000000114c 0x34 ./Core/Src/gpio.o .debug_frame 0x0000000000001180 0x78 ./Core/Src/i2c.o - .debug_frame 0x00000000000011f8 0xbc ./Core/Src/main.o - .debug_frame 0x00000000000012b4 0x78 ./Core/Src/quadspi.o - .debug_frame 0x000000000000132c 0x38 ./Core/Src/stm32h7xx_hal_msp.o - .debug_frame 0x0000000000001364 0x3a4 ./Core/Src/stm32h7xx_it.o - .debug_frame 0x0000000000001708 0x2c4 ./Core/Src/syscalls.o - .debug_frame 0x00000000000019cc 0x38 ./Core/Src/sysmem.o - .debug_frame 0x0000000000001a04 0x58 ./Core/Src/system_stm32h7xx.o - .debug_frame 0x0000000000001a5c 0xa0 ./Core/Src/tim.o - .debug_frame 0x0000000000001afc 0x13c ./Core/Src/usart.o - .debug_frame 0x0000000000001c38 0x20c ./Drivers/BSP/Components/lan8742/lan8742.o - .debug_frame 0x0000000000001e44 0x690 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal.o - .debug_frame 0x00000000000024d4 0xa28 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.o - .debug_frame 0x0000000000002efc 0x4b8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cortex.o - .debug_frame 0x00000000000033b4 0x2b4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.o - .debug_frame 0x0000000000003668 0x898 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.o - .debug_frame 0x0000000000003f00 0xf9c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_fdcan.o - .debug_frame 0x0000000000004e9c 0x14c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_gpio.o - .debug_frame 0x0000000000004fe8 0xbf0 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c.o - .debug_frame 0x0000000000005bd8 0x100 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_i2c_ex.o - .debug_frame 0x0000000000005cd8 0x34c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.o - .debug_frame 0x0000000000006024 0x580 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.o - .debug_frame 0x00000000000065a4 0x5ec ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_qspi.o - .debug_frame 0x0000000000006b90 0x1f8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.o - .debug_frame 0x0000000000006d88 0x3f4 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc_ex.o - .debug_frame 0x000000000000717c 0x121c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim.o - .debug_frame 0x0000000000008398 0x6d8 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_tim_ex.o - .debug_frame 0x0000000000008a70 0xa94 ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart.o - .debug_frame 0x0000000000009504 0x29c ./Drivers/STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_uart_ex.o - .debug_frame 0x00000000000097a0 0x9c ./LWIP/App/lwip.o - .debug_frame 0x000000000000983c 0x284 ./LWIP/Target/ethernetif.o - .debug_frame 0x0000000000009ac0 0xf8 ./Middlewares/Third_Party/LwIP/src/core/def.o - .debug_frame 0x0000000000009bb8 0x158 ./Middlewares/Third_Party/LwIP/src/core/inet_chksum.o - .debug_frame 0x0000000000009d10 0x34 ./Middlewares/Third_Party/LwIP/src/core/init.o - .debug_frame 0x0000000000009d44 0x160 ./Middlewares/Third_Party/LwIP/src/core/mem.o - .debug_frame 0x0000000000009ea4 0x134 ./Middlewares/Third_Party/LwIP/src/core/memp.o - .debug_frame 0x0000000000009fd8 0x3d0 ./Middlewares/Third_Party/LwIP/src/core/netif.o - .debug_frame 0x000000000000a3a8 0x52c ./Middlewares/Third_Party/LwIP/src/core/pbuf.o - .debug_frame 0x000000000000a8d4 0x77c ./Middlewares/Third_Party/LwIP/src/core/tcp.o - .debug_frame 0x000000000000b050 0x1bc ./Middlewares/Third_Party/LwIP/src/core/tcp_in.o - .debug_frame 0x000000000000b20c 0x3b0 ./Middlewares/Third_Party/LwIP/src/core/tcp_out.o - .debug_frame 0x000000000000b5bc 0x170 ./Middlewares/Third_Party/LwIP/src/core/timeouts.o - .debug_frame 0x000000000000b72c 0x288 ./Middlewares/Third_Party/LwIP/src/core/udp.o - .debug_frame 0x000000000000b9b4 0x228 ./Middlewares/Third_Party/LwIP/src/core/ipv4/etharp.o - .debug_frame 0x000000000000bbdc 0xa8 ./Middlewares/Third_Party/LwIP/src/core/ipv4/icmp.o - .debug_frame 0x000000000000bc84 0xf0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4.o - .debug_frame 0x000000000000bd74 0xf4 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_addr.o - .debug_frame 0x000000000000be68 0x1a0 ./Middlewares/Third_Party/LwIP/src/core/ipv4/ip4_frag.o - .debug_frame 0x000000000000c008 0x58 ./Middlewares/Third_Party/LwIP/src/netif/ethernet.o - .debug_frame 0x000000000000c060 0x2c d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-init.o) - .debug_frame 0x000000000000c08c 0x30 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-malloc.o) - .debug_frame 0x000000000000c0bc 0x28 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-memcmp.o) - .debug_frame 0x000000000000c0e4 0x28 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-memcpy-stub.o) - .debug_frame 0x000000000000c10c 0x28 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-memmove.o) - .debug_frame 0x000000000000c134 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-memset.o) - .debug_frame 0x000000000000c154 0x38 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-freer.o) - .debug_frame 0x000000000000c18c 0x4c d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-mallocr.o) - .debug_frame 0x000000000000c1d8 0x74 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-printf.o) - .debug_frame 0x000000000000c24c 0x44 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-rand.o) - .debug_frame 0x000000000000c290 0x5c d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-reent.o) - .debug_frame 0x000000000000c2ec 0x2c d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-sbrkr.o) - .debug_frame 0x000000000000c318 0x6c d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-sprintf.o) - .debug_frame 0x000000000000c384 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-strcmp.o) - .debug_frame 0x000000000000c3a4 0x3c d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-vsprintf.o) - .debug_frame 0x000000000000c3e0 0x40 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-assert.o) - .debug_frame 0x000000000000c420 0x20 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-errno.o) - .debug_frame 0x000000000000c440 0x14c d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-findfp.o) - .debug_frame 0x000000000000c58c 0x64 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-fprintf.o) - .debug_frame 0x000000000000c5f0 0x54 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-fwalk.o) - .debug_frame 0x000000000000c644 0xb0 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-lock.o) - .debug_frame 0x000000000000c6f4 0x30 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-mlock.o) - .debug_frame 0x000000000000c724 0x90 d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-svfprintf.o) - .debug_frame 0x000000000000c7b4 0xac d:/st/stm32cubeide_1.10.1/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.10.3-2021.10.win32_1.0.0.202111181127/tools/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard\libc_nano.a(lib_a-nano-vfprintf.o) - .debug_frame 0x000000000000c860 0x60 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